1989_National_General_Purpose_Linear_Devices_Databook 1989 National General Purpose Linear Devices Databook
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~ National
~
Semiconductor
400026
General Purpose
Linear Devices
Databook
1989 Edition
General Information
Alphanumeric
Available Hybrid Products
Additional Available Linear Devices
Industry Cross Reference Guide by Part Number
Package Cross Reference Guide
Continuous Voltage Regulators
Switching Voltage Regulators
•
Operational Amplifiers
•
Buffers·
•
Voltage Comparators
•
Instrumentation Amplifiers
•
Surface Mount
,.
Appendices/Physical Dimensions
•
iii
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iv
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FIRST MONOLITHIC VOLTAGE REGULATOR ... LM100.ln
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vi
Table of Contents
Alphanumeric Index ................................................. .' . . . . . . . . .
Available Hybrid Products .....................................................
Additional Available Linear Devices .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cross Reference by Part Number. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Industry Package Cross Reference Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Section 1 Continuous Voltage Regulators
Voltage Regulators Definition ofTerms ... .. ... . . .. ... .. .. .. . .. .... . .... .........
Continuous Voltage Regulators Selection Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH0075 Positive Precision Programmable Regulator ..............................
LH0076 Negative Precision Programmable Regulator.............................
* LH7001 Positive/Negative Adjustable Regulator ......... " . .. ......... ...........
LM104/LM204/LM304 Negative Regulators. .. .. ..... ...... . ....................
LM105/LM205/LM305/LM305A1LM376 Voltage Regulators.......................
LM109/LM309 5-Volt Regulator. . .... .. ... . ......... .... . ...... ..... ... .. ......
LM117/LM117A1LM317/LM317A 3-Terminal Adjustable Regulators.... ............
LM 117HVILM317HV 3-Terminal Adjustable Regulator ............................
LM120/LM320 Series 3-Terminal Negative Regulators ............. " ......... ....
LM123A/LM123/LM323A/LM323 3-Amp, 5-Volt Positive Regulators................
LM125/LM325/LM325A, LM126/LM326 Voltage Regulators.......................
LM133/LM333 3-Amp Adjustable Negative Voltage Regulators. . . . . . . . . . . . . . . . . . . . .
LM137/LM337 3-Terminal Adjustable Negative Regulators........................
LM137HV/LM337HV 3-Terminal Adjustable Negative Regulators (High Voltage)..... .
LM138/LM138A1LM338/LM338A 5-Amp Adjustable Power Regulators.............
LM140AlLM140/LM340A/LM340 Series 3-Terminal Positive Regulators. . . . . . . . . . . .
LM140LlLM340L Series 3-Terminal Positive Regulators. . ... ...... .... ......... ...
LM145/LM345 Negative 3-Amp Regulators.. .... .. .. ...... ......... .... .. .......
LM150/LM150AlLM350/LM350A 3-Amp Adjustable Power Regulators .............
LM196/LM39610-Amp Adjustable Voltage Regulators............................
LM317L3-Terminal Adjustable Regulator........................................
LM320L 3-Terminal Negative Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .. .. ..
LM330 3-Terminal Positive Regulator...........................................
LM337L 3-Terminal Adjustable Regulator........................................
* LM341 Series 3-Terminal Positive Regulators....................................
* LM342 Series 3-Terminal Positive Regulators....................................
* LM431 A Adjustable Precision Zener Shunt Regulator .............................
LM723/LM723C Voltage Regulators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM2925 Low Dropout Regulator with Delayed Reset .............................-.
LM2930 3-Terminal Positive Regulator.. .... ...... .. .... . .. ... .. ..... .. .........
LM2931 Series Low Drop-Out Regulators........................................
LM2935 Low Dropout Dual Regulator ...........................................
* LM2936 Ultra-Low Quiescent Current 5V Regulator ...... : . . . . . . . . . . . . . . . . . . . . . . . .
* LM2940 1A Low Dropout Regulator.............................................
LM2940C 1A Low Dropout Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . ..
* LM2941 1A Low Dropout Adjustable Regulator.. .. .. . .. . .. . .. .. .. .. .. . .. .. . • .. .. .
* LM2941 C 1A Low Dropout Adjustable Regulator. . . . . . . . . . . . . . . . . . . .. . . . . . . . . . .. . .
LM2984C Microprocessor Power Supply System .................................
LM78XX Series Voltage Regulators... .. . ............. .. ........ ... .. . .. .... .. ..
* LM7800 Series Voltage Regulators ...................... , .. ... .................
* LM78G/LM79G 4-Terminal Adjustable Regulators....... ....... .. ... ..... .... .. ..
LM78LXX Series 3-Terminal Positive Regulators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
* LM78LOO Series 3-Terminal Positive Regulators. .. .. .. . . ...... .... .. ... ... .......
·Devlces Not Covered In Last Publication
vii
xii
xix
xxi
xxviii
xxxiii
1-4
1-5
1-8
1-13
1-18
1-28
1-32
1-39
1-45
1-57
1-67
1-76
1-82
1-90
1-97
1-103
1-109
1-121
1-129
1-133
1-137
1-149
1-161
1-172
1-177
1-182
1-184
1-188
1-193
1-200
1-209
1-215
1-220
1-226
1-234
1-239
1-244
1-248
1-253
1-258
1-271
1-274
1-284
1-294
1-299
Table of Contents (Continued)
Section 1 Continuous Voltage Regulators (Continued)
* LM78MG/LM79MG 4-Terminal Positive Regulators. ... .... .... ......... . .. .... ...
* LM78MXX Series 3-Terminal Positive Regulators.. . .. . . ... .. .. .. ...... ....... .. . .
LM79XX Series 3-Terminal Negative Regulators. .. ... .. ... .. .... .... .. ........ ...
* LM7900 Series 3-Terminal Negative Regulators.. .. ... .. .. . .. .. .. .... .•... ... . .. .
LM79LXXAC Series 3-Terminal Adjustable Negative Regulators.. .. .... .. ...... . .. .
* LM79MXX Series 3-Terminal Negative Regulators.. ... .. .. . ...... .... .. ... .. . ... .
LP2950/LP2950AC/LP2950C 5V and LP2951/LP2951 AC/LP2951 C Adjustable
Micropower Voltage Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Section 2 Switching Voltage Regulators
Switching Voltage Regulators Selection Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
HS7067 IHS71 07 7 -Amp, Multimode, High Efficiency Switching Regulator. . . . . . . . . . . .
* LH1605/LH1605C 5-Amp, High Efficiency Switching Regulator '" ...... '" .........
• LM494 Pulse Width Modulated Control Circuit.. . . ... .. .... . .. •. .... .. ... .. ... . ...
• LM1524D/LM2524D/LM3524D Regulating Pulse Width Modulator. . . . . . . . . . . . . . . . . .
• LM1525A1LM3525A1LM1527AlLM3527 A Pulse Width Modulator. . . . . . . . . . . . . . . . . .
• LM1575-5.0/LM2575-5.0 Simple Switcher Step-Down Voltage Regulator. . . . . . . . . . . .
LM1578A1LM2578A/LM3578A Switching Regulators. .. . .. . . .... ..... . ... ... ... . .
* LM2579 Switching Regulator. .... .. .. .. ..... .... ..... .... . .... .. .... ... .. . ... ..
* LM78S40 Universal Switching Regulator Subsystem ............................. ,
LMC7660 Switched Capacitor Voltage Converter .•...... . . . . . . . . . . . . . . . . . . . . . . . . .
Section 3 Operational Amplifiers
Operational Amplifiers Definition ofTerms .......................................
Operational Amplifiers Selection Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LF147/LF347/LF347B Wide Bandwidth Quad JFET Input Operational Amplifiers.....
LF155/LF156/LF157 Series Monolithic JFET Input Operational Amplifiers. . . . . . . . . . .
LF351 Wide Bandwidth JFET Input Operational Amplifier ..........................
LF353 Wide Bandwidth Dual JFET Input Operational Amplifier... .. .. .. .... . ... .. . ..
LF400AlLF400 Fast Settling JFET Input Operational Amplifier ............. ;.......
LF401A/LF401 Precision Fast Settling JFET Input Operational Amplifier. • . . . . . . . . . . .
LF411 AlLF411 Low Offset, Low Drift JFET Input Operational Amplifier. . . . . . . . . . . . . .
LF412A/LF412 Low Offset, Low Drift Dual JFET Operational Amplifier •.............
LF441 AlLF441 Low Power JFET Input Operational Amplifier. . . . . . . . . . . . . . . . . . . .. . .
LF442A1LF442 Dual Low Power JFET Input Operational Amplifier ... . . . . . . . . . . . . . . .
LF444A1LF444 Quad Low Power JFET Input Operational Amplifier ........... '" .. ,
* LF451 Wide-Bandwidth JFET Input Operational Amp!ifier . . . . . . . . . . . . . . . . . . . . . . . . . .
* LF453 Wide-Bandwidth Dual JFET Input Operational Amplifier. . . . . . . . . . . . . . . . . . . . . .
LF13741 Monolithic JFET Input Operational Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH0003/LH0003C Wide Bandwidth Operational Amplifier....... ... .. .... ..... . ... .
LH0004/LH0004C High Voltage Operational Amplifier. .. . ..... .. .. .. .. .. .•.... ... .
LH0020/LH0020C High Gain Operational Amplifier ................ , ., ........ '" .
LH0021 ILH0021 C 1.0-Amp Power Operational Amplifier ..........................
LH0041 ILH0041 C 0.2-Amp Power Operational Amplifier ..........................
LH0022/LH0022C High Performance FET Operational Amplifier. . . . . . . . . . . . . . . . . . . .
LH0042/LH0042C Low Cost FET Operational Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH0052/LH0052C Precision FET Operational Amplifier. . . . . . . . . . . . . . . . . .. . . . . . . . . .
LH0024/LH0024C High Slew Rate Operational Amplifier .......... ~.. .. .... . ... . ..
LH0032/LH0032A1LH0032C/LH0032AC Ultra Fast FET-Input Operational Amplifier..
LH0044 Series Precision Low Noise Operational Amplifiers ........................
LH0045/LH0045C Two Wire Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH0061/LH0061C 0.5 Amp Wide Band Operational Amplifier.. .. .. ......... . .. . ...
'Devices Not Covered In Last Publication
viii
1-307
1-318
1-325
1-332
1-337
1-342
1-345
2-3
2-4
2-14
2-17
2-24
2-41
2-51
2-59
2-73
2-86
2-93
3-5
3-6
3-15
3-24
3-39
3-47
3-56
3-67
3-76
3-83
3-90
3-97
3-106
3-113
3-119
3-126
3-138
3-141
3-145
3-148
3-148
3-156
3-156
3-156
3-168
3-172
3-179
3-187
3-199
Table of Contents (Continued)
Section 3 Operational Amplifiers (Continued)
LH0062/LH0062C High Speed FET Operational Amplifier .........................
LH0082 Optical Communication Receiver1Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH0086/LH0086C Digitally-Programmable-Gain Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . .
LH01 01/LH01 01 C/LH01 01 AlLH01 01 AC Power Operational Amplifier ..............
* LH2101A1LH2201A1LH2301A Dual High Performance Operational Amplifiers. .. . . . ..
* LH21 08/LH21 08A1LH2308/LH2308A Dual Super Beta Operational Amplifiers. . . . . . .
LH41 01/LH41 01 C Wideband High Current Operational Amplifier ...................
LH41 04/LH41 04C Fast Settling High Current Operational Amplifier .. . . . . . . . . . . . . . . .
LH4105 Precision Fast Settling High Current Operational Amplifier. . . . . . . . . . . . . . . . . .
* LH41 06/LH41 06C ±5V High Speed Operational Amplifier.........................
* LH4117/LH4117C Precision RF Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
* LH4118/LH4118A1LH4118C Low Gain Wide Band RF Amplifier. . . . . . . . . . . . . . . . . . . .
* LH4124C High Slew Rate Operational Amplifier ..................................
* LH4141 C 0.2-Amp Power Operational Amplifier ..................................
* LH4161A1LH4161/LH4161C High Speed Operational Amplifier....................
* LH4162A1LH4162/LH4162C Dual High Speed Operational Amplifier. . . . . . . . . . . . . . . .
* LH4200 General Purpose GaAs FET Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM10/LM10B(L)/LM10C(L) Operational Amplifier and Voltage Reference.. .... .. ...
LM11/LM11 C/LM11 CL Operational Amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM 12(L/C/CL) 150W Operational Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM101A1LM201A1LM301A Operational Amplifiers... . .. ... .. .. ...... ... . .. ... . ...
LM1 07/LM207/LM307 Operational Amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM 1081 LM2081 LM308 Operational Amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM1 08A/LM208A1LM308A Operational Amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM 1121 LM2121 LM312 Operational Amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM 1181 LM2181 LM318 Operational Amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM124/LM224/LM324/LM124A/LM224A/LM324A/LM2902 Low Power Quad
Operational Amplifiers ........................... ;..........................
LM143/LM343 High Voltage Operational Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM144/LM344 High Voltage, High Slew Rate Operational Amplifiers. . . . . . . . . . . . . . . .
LM146/LM246/LM346 Programmable Quad Operational Amplifiers. . .... . .. . ... . .. .
LM148/LM248/LM348 Quad 741 Operational Amplifiers; LM149/LM249/LM349 Wide
Band Decompensated (Av(MIN) = 5) . .. . .. . .. .. .. . .. .. . .. .. . . .. .. . .. .. .. .. .. .
LM158/LM258/LM358/LM158A/LM258A/LM358A, LM2904 Low Power Dual
Operational Amplifiers ......................................................
LM392/LM2924 Low Power Operational AmplifierlVoltage Comparators ...•........
LM359 Dual, High Speed, Programmable Current Mode (Norton) Amplifier. ..........
LM604A1LM604 4-Channel MUX-Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM607/LM607A/LM607B Precision Operational Amplifier.........................
LM611 Adjustable Micropower Floating Voltage Reference and Single-Supply
Operational Amplifier. .. .. .. ... .. . ... . .... . .. .. ... . .. .. .. ... .... . .. ... . ... ..
* LM613A1LM613 Dual Operational Amplifiers, Dual Comparators, and Adjustable
Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM614A1LM614 Quad Operational Amplifier and Adjustable Reference. . .. . ... ... . .
* LM627/LM637 Precision Operational Amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM675 Power Operational Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
* LM725/LM725A/LM725C Operational Amplifiers. . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . .
LM741/LM741A1LM741C/LM741E Operational Amplifier.........................
* LM759 Power Operational Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
* LM776 Multi-Purpose Programmable Operational Amplifier. . . . . . . . . . . . . . . . . • . . . . . . .
LM833 Dual Audio Operational Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
'Devices Not Covered In Last Publication
ix
3-202
3-211
3-225
3-232
3-243
3-246
3-249
3-254
3-260
3-266
3-271
3-277
3-287
3-291
3-298
3-304
3-312
3-319
3-335
3-348
3-361
3-371
3-377
3-384
3-390
3-395
3-405
3-418
3-428
3-435
3-447
3-460
3-473
3-477
3-495
3-508
3-516
3-528
3-544
3-557
3-566
3-573
3-581
3-584
3-595
3-604
Table of Contents (Continued)
Section 3 Operational Amplifiers (Continued)
LM837 Low Noise Quad Operational Amplifier. .... .. ...... ... ...... . .. .... .......
LM1558/LM1458 Dual Operati(:mal Amplifier .........• " . . .. . . . . . . . . . . . . . . . . . . .. .
LM2900/LM3900/LM3301/LM3401 Quad Amplifiers .............................
LM3080/LM3080A Operational Transconductance Amplifier. .. . . . . . . . . . . . . . . . . . . . .
.. LM3303/LM3403/LM3503 Quad Operational Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . .
.. LM4136 Quad Operational Amplifier ........... " .... '" ... ...... . ... .... .... . . .
LM4250/LM4250C Programmable Operational Amplifier ................... :. . . . . . .
.. LM6118/LM6218A1LM6218 Fast Settling Dual Operational Amplifier. . . . . . . . . . . . . .. .
LM6161/LM6261/LM6361 High Speed Operational Amplifiers .....................
LM6164/LM6264/LM6364 High Speed Operational Amplifiers .....................
LM6165/LM6265/LM6365 High Speed Operational Amplifiers .............•.......
.. LM6313 High Speed, High Power Operational Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM13080 Programmable Power Operational Amplifier ....... , ......................
LM13600/LM13600A Dual Operational Transconductance Amplifier with Linearizing
Diodes and Buffers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM13700/LM13700A Dual Operational Transconductance Amplifier with Linearizing
Diodes and Buffers. . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LMC660AM/LMC660AI/LMC660C CMOS Quad Operational Amplifiers .............
.. LMC662AM/LMC662AI/LMC662C CMOS Dual Operational Amplifiers. . . . . . . . . . . . . .
LMC669 Auto Zero ................................................... , ... ... .
LP124/LP2902/LP324 Micropower Quad Operational Amplifiers ...................
.. LPC660AM/LPC660AI/LPC6601 CMOS Quad Operational Amplifier ................
.. LPC662AM/LPC662AI/LPC6621 CMOS Dual Operational Amplifier ... . . . . . . . . . . . . . ..
.. OP-07 Low Offset, Low Drift Operational Amplifier ........ . . . . . . . . . . . . . . . . . . . . . . . .
TL081CP Wide Bandwidth JFET Input Operational Amplifier. .... .... .. . . . .. .. . .....
TL082CP Wide Bandwidth Dual JFET Input Operational Amplifier. ;... . ... ...... ... .
Section 4 Buffers
Buffers Definition of Terms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Buffers Selection Guide ....................... " . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . .
LH0002/LH0002C Current Amplifier .................. ; ............ ;............
LH0033/LH0033A1LH0033C/LH0033AC, LH0063/LH0063C Fast Buffer Amplifiers. ..
.. LH211 0/LH221 0/LH231 0 Dual Voltage Followers ........................ , .. .. . . .
LH4001 Wideband Current Buffer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH4002 Wideband Video Buffer ... . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . .
LH4003/LH4003C Precision RF Closed Loop Buffer .... . . . . . . . . . . . . . . . . . . . . . . . . . .
lH4004/LH4004C Wideband FET Input Bufferl Amplifier ..........................
LH4006 Precision RF Closed Loop Buffer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.. LH4008/LH4008C Fast Buffer .................................................
.. LH4009/LH4009C Fast Buffer .................................................
.. LH4010/LH4010C Fast FET Buffer.............................................
.. LH4011/LH4011 C Fast Open Loop Buffer ............................... ; ... ; . . .
.. LH4012/LH4012C Wideband Buffer ............................................
.. LH4033C/LH4063C Fast and Ultra Fast Buffer Amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . .
LM102/LM302 Voltage Followers ...... " ...... ... . .. .... ... ..... .... .. ...... ..
LM110/LM210/LM310 Voltage Followers .......................................
LM6121/LM6221/LM6321 High Speed Buffers...................................
LM6125/LM6225/LM6325 High Speed Buffers...................................
Section 5 Voltage Comparators
Voltage Comparators Definition of Terms. . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . .. . . . .. . .
Voltage Comparators Selection Guide. . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . .
'Devlces Not Covered In Last PublicatIon
x
3-613
3-619
3-621
3-639
3-643
3-651
3-659
3-666
3-675
3-682
3-689
3-696
3-705
3-713
3-731
3-751
3-759
3-768
3-782
3-789
3-796
3-803
3-809
3-816
4-3
4-4
4-5
4-8
4-19
4-21
4-25
4-30
4-36
4-42
4-48
4-55
4-62
4~70
4-78
4-86
4-97
4-103
4-116
4-121
5-3
5-4
Table of Contents (Continued)
Section 5 Voltage Comparators (Continued)
LF111/LF211/LF311 Voltage Comparators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
* LH2111/LH2211/LH2311 Dual Voltage Comparators. . . . . • . . . . . . . . . . . . . . . . . . . . . . .
LM106/LM206/LM306 Voltage Comparators....................................
LM111/LM211/LM311 Voltage Comparators ....................................
LM119A1LM119/LM219/LM319A1LM319 High Speed Dual Comparators ...........
LM139/LM239/LM339/LM139A1LM239A1LM339A, LM2901/LM3302 Low Power
Low Offset Voltage Quad Comparators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM160/LM260/LM360 High Speed Differential Comparators..... ........... . ......
LM161/LM261/LM361 High Speed Differential Comparators. . . . . .. . . . . . . . . . . . . . . . .
LM193/LM293/LM393, LM193A1LM293A1LM393A1LM2903 Low Power Low Offset
Voltage Dual Comparators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
* LM710/LM710C Voltage Comparator... .. ..... .. . . ........... ... .. ... .. ...... ..
* LM1514/LM1414 Dual Differential Voltage Comparators...........................
LP265/LP365 Micropower Programmable Quad Comparators. . . . . . . . . . . . . . . . . . . . . .
LP311 Voltage Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LP339 Ultra-Low Power Quad Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .
Section 6 Instrumentation Amplifiers
Instrumentation Amplifiers Definition of Terms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Instrumentation Amplifiers Selection Guide ......................................
LH0036/LH0036C Instrumentation Amplifier. . . . . . . . . . . . . . . . • . . . . . . . . • . • . • . . . . . . .
LH00381 LH0038C True Instrumentation Amplifier .................•..............
LH0084/LH0084C Digitally-Programmable-Gain Instrumentation Amplifier. . . . . . . . . . .
LM221/LM321/LM321A Precision Preamplifiers .......................... " . . . . . .
LM363 Precision Instrumentation Amplifier.. ... .. ... .... .... .....................
Section 7 Surface Mount
Surface Mount .... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AN-450 Small Outline (SO) Package Surface Mounting Methods-Parameters and Their
Effect on Product Reliability. . . . . . . . . . .. . . . . . . . . . . . .. . . . . . .. . . . . . . . . . . . . . . . . . .
Section 8 Appendices/Physical Dimensions
Appendix A General Product Marking and Code Explanation .......................
Appendix B Application Note Referenced by Part Number. . . . . . . . . . . . . . . . . . . . . . . . . .
Appendix C Summary of Commercial Reliability Programs. . . . . . . . . . . . . . . . . . . . . . . . . .
Appendix D Military Aerospace Programs from National Semiconductor ........ ,. ....
Appendix E Understanding Integrated Circuit Package Power Capabilities. . . . . . . . . . . .
~pendix F How to Get the Right Information from a Datasheet . . . . . . . . . . . . . . . . . . . . .
ApJfendix G Obsolete Product Replacement Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bookshelf
Distributors
'Devices Not Covered In Last Publication
xi
5-5
5-14
5-17
5-21
5-34
5-40
5-52
5-56
5-61
5-70
5-74
5-76
5-84
5-88
6-3
6-4
6-5
6-14
6-25
6-37
6-46
7-3
7 -13
8-3
8-4
8-10
8-11
8-18
8-23
8-27
8-28
Alpha-Numeric Index
HS7067 7-Amp, Multimode, High Efficiency Switching Regulator .........................•... : ... 2-4
HS7107 7-Amp, Multimode, High Efficiency Switching Regulator ....................... .' ......... 2-4
LF111 Voltage Comparator ......................... '........... ; .. : ......................... 5-5
LF147Wide Bandwidth Quad JFET Input Operational Amplifiers ................................ 3-15
LF155 Series Monolithic JFET Input Operational Amplifiers ...................... , .... '......... 3-24
LF156 Series Monolithic JFET Input Operational Amplifiers ... ; .•.............................. 3-24
LF157 Series Monolithic JFET Input Operational Amplifiers· ... ; ................................ 3-24
LF211 Voltage Comparator ................................................................. 5-5
LF255 Series Monolithic JFET Input Operational Amplifiers .................................... 3-24
LF256 Series Monolithic JFET Input Operational Amplifiers .................................... 3-24
LF257 Series Monolithic JFET Input Operational Amplifiers ..........................•......... 3-24
LF311 Voltage Comparator ................................................................. 5-5
LF347 Wide Bandwidth Quad JFET Input Operational Amplifiers ................. :............... 3-15
LF347B Wide Bandwidth Quad J FET Input Operational Amplifiers .. : ............................ 3-15
LF351 Wide Bandwidth JFET Input Operational Amplifier .......... : •........ ; ................. 3-39
LF353 Wide Bandwidth Dual JFET Input Operational Amplifier .................................. 3-47
LF355 Series Monolithic JFET Input Operational Amplifiers ...... '.............................. 3-24
LF356 Series Monolithic JFET Input Operational Amplifiers .................................... 3-24
LF357 Series Monolithic JFET Input Operational Amplifiers .................................... 3-24
LF400 Fast Settling JFET Input Operatiqnal Amplifier .... ; .............. , ..................... 3-56
LF401 Precision Fast Settling JFET Input Operational Amplifier ...........•..................... 3-67
LF411 Low Offset, Low Drift JFET Input Operational Amplifier .................................. 3-76
LF412 Low Offset, Low Drift Dual J FET Operational Amplifier .................................. 3-83
LF441 Low Power JFET Input Operational Amplifier ........... : ............................... 3-90
LF442 Dual Low Power JFET Input Operational Amplifier ......................•................ 3-97
LF444 Quad Low Power JFET Input Operational Amplifier .................................... 3-106
LF451 Wide-Bandwidth JFET Input Operational Amplifier ..................................... 3-113
LF453 Wide-Bandwidth Dual JFET Input Operational Amplifier ..............•................. 3-119
LF13741 Monolithic JFET Input Operationai Amplifier ...................•.................... 3-126
LH0002 Current Amplifier ................................................................... 4-5
LH0003 Wide Bandwidth Operational Amplifier .............................................. 3-138
LH0004 High Voltage Operational Amplifier ................................................. 3-141
LH0020 High Gain Operational Amplifier .................................................... 3-145
LH0021 1.0-Amp Power Operational Amplifier .........................................•..... 3-148
LH0022 High Performance FET Operational Amplifier ..... ; .................................. 3-156
LH0024 High Slew Rate Operational Amplifier ............................................... 3-168
LH0032 Ultra Fast FET-Input Operational Amplifier .......................................... 3-172
LH0033 Fast Buffer Amplifier ............................................... '................. 4-8
LH0036 Instrumentation Amplifier ......................................... ~ .................. 6-5
LH0038 True Instrumentation Amplifier .•.•................. ; ................................ 6-14
LH0041 0.2-Amp Power Operational Amplifier .......................................•....... 3-148
LH0042 Low Cost FET Operational Amplifier ....•...•....•...............•.................. 3-156
LH0044 Series Precision Low Noise Operational Amplifiers •.................................. 3-179
LH0045 Two Wire Transmitter •.•..•.•.••................................................. 3-187
LH0052 Precision FET Operational Amplifier ...•..•......•....•............••............... 3-156
LH0061 0.5 Amp Wide Band Operational Amplifier ..•....•................................... 3-199
LH0062 High Speed FET Operational Amplifier ....................•....••...•..••....•....•. 3-202
LH0063 Fast Buffer Amplifier •....•....•...••....•.•...................••..•..........•...... 4-8
LH0075 Positive Precision Programmable Regulator .........•......••......•.•••.•..••........ 1-8
LH0076 Negative Precision Programmable Regulator .•.•..•.•................................ 1-13
LH0082 Optical Communication Receiverl Amplifier •.•..••............•...................... 3-211
xii
Alpha-Numeric
Index(continued)
LH0084 Digitally-Programmable-Gain Instrumentation Amplifier ................................. 6-25
LH0086 Digitally-Programmable-Gain Amplifier .............................................. 3-225
LH0101 Power Operational Amplifier ....................................................... 3-232
LH1605 5-Amp, High Efficiency Switching Regulator .......................................... 2-14
LH2101A Dual High Performance Operational Amplifier ...................................... 3-243
LH2108 Dual Super Beta Operational Amplifier .............................................. 3-246
LH2110 Dual Voltage Follower ............................................................. 4-19
LH2111 Dual Voltage Comparator .......................................................... 5-14
LH2201A Dual High Performance Operational Amplifier ...................................... 3-243
LH2210 Dual Voltage Follower ............................................................. 4-19
LH2211 Dual Voltage Comparator .......................................................... 5-14
LH2301 A Dual High Performance Operational Amplifier .......................................3-243
LH2308 Dual Super Beta Operational Amplifier .............................................. 3-246
LH2310 Dual Voltage Follower .............................................................. 4-19
LH2311 Dual Voltage Comparator .......................................................... 5-14
LH4001 Wideband Current Buffer ........................................................... 4-21
LH4002 Wideband Video Buffer ............................................................ 4-25
LH4003 Precision RF Closed Loop Buffer .................................................... 4-30
LH4004 Wideband FET Input Buffer/Amplifier ................................................ 4-36
LH4006 Precision RF Closed Loop Buffer .................................................... 4-42
LH4008 Fast Buffer ..................................................................•.... 4-48
LH4009 Fast Buffer .......•............................................................... 4-55
LH4010 Fast FET Buffer ................................................................... 4-62
LH4011 Fast Open Loop Buffer ............................................................ 4-70
LH4012 Wideband Buffer .................................................................. 4-78
LH4033C Fast and Ultra Fast Buffer Amplifiers ...........................................1• • • • 4-86
LH4063C Fast and Ultra Fast Buffer Amplifiers ............................................... 4-86
LH4101 Wideband High Current Operational Amplifier ......................................... 3-249
LH41 04 Fast Settling High Current Operational Amplifier ..................................... 3-254
LH41 05 Precision Fast Settling High Current Operational Amplifier ............................. 3-260
LH4106 ± 5V High Speed Operational Amplifier ............................................. 3-266
LH4117 Precision RF Amplifier ......................................................•..... 3-271
LH4118 Low Gain Wide Band RF Amplifier ...............................................•. 3-277
LH4124C High Slew Rate Operational Amplifier ............................................. 3-287
LH4141 C 0.2-Amp Power Operational Amplifier ............................................. 3-291
LH4161 High Speed Operational Amplifier .....................•............................ 3-298
LH4162 Dual High Speed Operational Amplifier ............................................. 3-304
LH4200 General Purpose GaAs FET Amplifier .............................................. 3-312
LH7001 Positive/Negative Adjustable Regulator ..•................•......................•.•. 1-18
LM10 Operational Amplifier and Voltage Reference .......................................... 3-319
LM11 Operational Amplifier ............................................................... 3-335
LM12(L) 150W Operational Amplifier .................•.................................•... 3-348
LM78G 4-Terminal Adjustable Regulator ................................................... 1-284
LM78LOO Series 3-Terminal Positive Regulators ............................................. 1-299
LM78LXX Series 3-Terminal Positive Regulators ............................................. 1-294
LM78MG 4-Terminal Positive Regulator ..............•.................................•... 1-307
LM78MXX Series 3-Terminal Positive Regulators ...............................•............ 1-318
LM78S40 Universal Switching Regulator Subsystem .......................................... 2-86
LM78XX Series Voltage Regulators .•..•....•..........•...••..........•................... 1-271
LM79G 4-Terminal Adjustable Regulator , .................................................. 1-284
LM79LXXAC Series 3-Terminal Adjustable Negative Regulators .....•........•....•....•...... 1-337
xlii
Alpha-Numeric
Index(continUed)
LM79MG 4-Terminal Positive Regulator ...................•.... , ..•...•..••......•......... 1-307
LM79MXX Series 3-Terminal Negative Regulators ................... , ....................... 1-342
LM79XX Series 3-Terminal Negative Regulators •.•......•.....•..........•••....••.••••.••.• 1-325
LM101A Operational Amplifier .................................. ~ ................... , ..... 3-361
LM102 Voltage Follower ........•........................•.••.......•.•.•...••.. '•••••••.... 4-97
LM104 Negative Regulator .......................••...........•...........•••.•.....•.•.•• 1-28
LM105 Voltage Regulator ..•.. '............................•......•..•.•••.......•....•.... 1-32
LM106 Voltage Comparator ..........•.......................••.•..........•••.•.•....•••.• 5-17
LM107 Operational Amplifier .......... , ................................................... 3-371
LM108 Operational Amplifier .........................................•...•..............•. 3-377
LM1 08A Operational Amplifier ............................................................ 3-384
LM109 5-Volt Regulator ................................•..............•••.........•....... 1-39
LM110 Voltage Follower .................................•.......•.........••.•••....••.. 4-103
LM1l1 Voltage Comparator .......................................•....•............•...... 5-21
LM112 Operational Amplifiers ........................................... : ................. 3-390
LM117 3-Terminal Adjustable Regulator ........•...........•..•...•• , ...•...••.•••••.•.•.... 1-45
LM 117HV 3-Terminal Adjustable Regulator ....................•....•.......•.•..•.•......••. 1-57
LM118 Operational Amplifiers ............................................•..••....••..•... 3-395
LM119 High Speed Dual Comparator .•.....................................•••.••.•.••.•.••• 5-34
LM 120 Series 3-Terminal Negative Regulator ...............................••...•...•....... 1-67
LM123 3-Amp, 5-Volt Positive Regulator ..........................•....••...••............•.• 1-76
LM124 Low Power Quad Operational Amplifiers ............................................. 3-405
LM125 Voltage Regulator ...•..........•..........•....•.........•.••.•....•••••.••••..•.. 1-82
LM126 Voltage Regulator ................................................•....••.••.•.•••• 1-82
LM133 3-Amp Adjustable Negative Voltage Regulator .....•..........••••••••...•..•.••••..... 1-90
LM137 3-Terminal Adjustable Negative Regulator .•.........................••.•.•.•.•••.•••. 1-97
LM137HV 3-Terminal Adjustable Negative Regulator (High Voltage) •..•......•••.•••........•• 1-103
LM138 5-Amp Adjustable Power Regulator ................................................. 1-109
LM139 Low Power Low Offset Voltage Quad Comparator •........•..•.•..•.•.••••••••.•.•.•.•• 5-40
LM140 Series 3-Terminal Positive Regulators ................•.• , .........................•. 1-121
LM140L Series 3-Terminal Positive Regulators .............................................. 1-129
LM143 High Voltage Operational Amplifier ....•.•..........•.•........•..•..........•••••... 3-418
LM144 High Voltage, High Slew Rate Operational Amplifier ..............•....•••.••.•.•....•• 3-428
LM145 Negative 3-Amp Regulator ............•................•..........•.•........•.•... 1-133
LM146 Programmable Quad Operational Amplifier ...................•. ; .....••.•••.•.•....•• 3-435
LM148 Quad 741 Operational Amplifiers .......................•.............••...........•. 3-447
LM149 Wide Band Decompensated (Av(MIN) = 5) ..............•......•..........•..•.•.... 3-447
LM150 3-Amp Adjustable Power Regulator ...... ; ............. ; ............................ 1-137
LM158 Low Power Dual Operational Amplifier ............................................... 3-460
LM160 High Speed Differential Comparator .................................................. 5-52
LM161 High Speed Differential Comparator ....................••.•........•..•...•.....•.... 5-56
LM193 Low Power Low Offset Voltage Dual Comparator ........•...•...•••.••....•.•.•••.•.... 5-61
LM 196 1O-Amp Adjustable Voltage Regulator ............................................... 1-149
LM201A Operational Amplifier ..........•........•.•..•......•.•......•...•.••.••••....••. 3-361
LM204 Negative Regulator ...................................•.......•••...•.....•••.••... 1-28
LM205 Voltage Regulator ................•...•....•••........••••••...•..••••••••••••••.•• 1-32
LM206 Voltage Comparator ..................................•...•.....•••..•.....•..••.... 5-17
LM207 Operational Amplifier ................................ '....•......•••.......••..•.•.. 3-371
LM208 Operational Amplifier ..•...............•..........•.•.......•.••.•.••••.•••.••.••.. 3-377
LM208A Operational Amplifier ..................•.......•.•..•••••••.......•••.......•••.. 3-384
LM210 Voltage Follower •.•.•................•............•.......•..••...••••••••••..•.. 4-103
xiv
Alpha",Numeric Index (Continued)
LM211 Voltage Comparator ................................................................ 5-21
LM212 Operational Amplifiers ............................................................. 3-390
LM218 Operational Amplifiers ............................................................. 3-395
LM219 High Speed Dual Comparator ........................................................ 5-34
LM221 Precision Preamplifier .............................................................. 6-37
LM224 Low Power Quad Operational Amplifiers ............................................. 3-405
LM239 Low Power Low Offset Voltage Quad Comparator ...................................... 5-40
LM246 Programmable Quad Operational Amplifier ........................................... 3-435
LM248 Quad 741 Operational Amplifiers .................................................... 3-447
LM249 Wide Band Decompensated (Av(MIN) = 5) .......................................... 3-447
LM258 Low Power Dual Operational Amplifier ............................................... 3-460
LM260 High Speed Differential Comparator .................................................. 5-52
LM261 High Speed Differential Comparator .................................................. 5-56
LM293 Low Power Low Offset Voltage Dual Comparator ....................................... 5-61
LM301A Operational Amplifier ............................................................ 3-361
LM302 Voltage Follower ................................................................... 4-97
LM304 Negative Regulator ................................................................ 1-28
LM305 Voltage Regulator ................................................................. 1-32
LM306 Voltage Comparator ................................................................ 5-17
LM307 Operational Amplifier .............................................................. 3-371
LM308 Operational Amplifier .............................................................. 3-377
LM308A Operational Amplifier ............................................................ 3-384
LM309 5-Volt Regulator ................................................................... 1-39
LM310 Voltage Follower ................................................................. 4-103
LM311 Voltage Comparator ........................................................... , .... 5-21
LM312 Operational Amplifiers ............................................................. 3-390
LM317 3-Terminal Adjustable Regulator ..................................................... 1-45
LM317HV 3-Terminal Adjustable Regulator .................................................. 1-57
LM317L 3-Terminal Adjustable Regulator ......................................... , ......... 1-161
LM318 Operational Amplifiers ............................................................. 3-395
LM319 High Speed Dual Comparator ........................................................ 5-34
LM320 Series 3-Terminal Negative Regulator ................................................ 1-67
LM320L 3-Terminal Negative Regulator .................................................... 1-172
LM321 Precision Preamplifier .............................................................. 6-37
LM323 3-Amp, 5-Volt Positive Regulator ..................................................... 1-76
LM324 Low Power Quad Operational Amplifiers ............................................. 3-405
LM325 Voltage Regulator ................................................................. 1-82
LM326 Voltage Regulator ................................................................. 1-82
LM330 3-Terminal Positive Regulator ...................................................... 1-177
LM333 3-Amp Adjustable Negative Voltage Regulator ......................................... 1-90
LM337 3-Terminal Adjustable Negative Regulator ............................................ 1-97
LM337HV 3-Terminal Adjustable Negative Regulator (High Voltage) ........................... 1-103
LM337L 3-Terminal Adjustable Regulator ................................................... 1-182
LM338 5-Amp Adjustable Power Regulator ................................................. 1-109
LM339 Low Power Low Offset Voltage Quad Comparator ...................................... 5-40
LM340 Series 3-Terminal Positive Regulators ........................ , ...................... 1-121
LM340L Series 3-Terminal Positive Regulators .............................................. 1-129
LM341 Series 3-Terminal Positive Regulators ............................................... 1-184
LM342 Series3-Terminal Positive Regulators ............................................... 1-188
LM343 High Voltage Operational Amplifier .................................................. 3-418
LM344 High Voltage, High Slew Rate Operational Amplifier ................................... 3-428
xv
Alpha-Numeric
Index(continUed)
LM345 Negative 3-Amp Regulator ........................................••......•........ 1-133
LM346 Programmable Quad Operational Amplifier ........................................... 3-435
LM348 Quad 741 Operational Amplifiers .................................................... 3-447
LM349 Wide Band Decompensated (Av(MIN) = 5) .......................................... 3-447
LM350 3-Amp Adjustable Power Regulator ................................................. 1-137
LM358 Low Power Dual Operational Amplifier ........................•.•.................... 3-460
LM359 Dual, High Speed, Programmable Current Mode (Norton) Amplifier ...................... 3-477
LM360 High Speed Differential Comparator .................................................. 5-52
LM361 High Speed Differential Comparator .................................................. 5-56
LM363 Precision Instrumentation Amplifier ................................................... 6-46
LM376 Voltage Regulator ..............•..........................................•...•... 1-32
LM392 Low Power Operational AmplifierlVoltage Comparator ....................••........... 3-473
LM393 Low Power Low Offset Voltage Dual Comparator ....................................... 5-61
LM39610-Amp Adjustable Voltage Regulator ..........................................•...• 1-149
LM431 A Adjustable Precision Zener Shunt Regulator ..........•............................. 1-193
LM494 Pulse Width Modulated Control Circuit .............•...•...•.......................... 2-17
LM604 4-Channel MUX-Amp ..................•...........................•..•......••.... 3-495
LM607 Precision Operational Amplifier ............................•....•.....••..•......... 3-508
LM611 Adjustable Micropower Floating Voltage Reference and Single-Supply
'Operational Amplifier ........•..•.•..•.•............................. '...•...•••...••... 3-516
LM613 Dual Operational Amplifiers, Dual Comparators, and Adjustable Reference' .•..•.•..••...• 3-528
LM614 Quad Operational Amplifier and Adjustable Reference .....•..•.•..•................... 3-544
LM627 Precision Operational Amplifiers ..........•...•...•............................•..•. 3-557
LM637 Precision Operational Amplifiers ...........................•....•.....••............ 3-557
LM675 Power Operational Amplifier ...........••..•.•..•....•.............................• 3-566
LM710 Voltage Comparator .................................•...••...•...•.•......•........ 5-70
LM723 Voltage Regulator .•..............................•.•...•....................•.... 1-200
LM725 Operational Amplifier ..........•.....•.......................................••.•.. 3-573
LM741 Operational Amplifier ...............................•.•...•........................ 3-581
LM759 Power Operational Amplifier ............•......................•.••..•..•••..•.••.•• 3-584
LM776 Multi-Purpose Programmable Operational Amplifier .•.•.•............................. 3-595
LM833 Dual Audio Operational Amplifier ..................•...•............................. 3-604
LM837 Low Noise Quad Operational Amplifier ...........................•..••...•.....•..... 3-613
LM1414 Dual Differential Voltage Comparator ..........•..................................... 5-74
LM1458 Dual Operational Amplifier ...............................•.......•...•....•..•.... 3-619
LM1514 Dual Differential Voltage Comparator .............•.•................................ 5-74
LM1524D Regulating Pulse Width Modulator ................................................. 2-24
LM1525A Pulse Width Modulator .......•..........................•.....•.................. 2-41
LM1527A Pulse Width Modulator .....................•...•.•.........................•..... 2-41
LM 1558 Dual Operational Amplifier ....•............................•.............•........ 3-619
LM1575-5.0 Simple Switcher Step-Down Voltage Regulator ..•................................. 2-51
LM1578A Switching Regulator •..... ; ...................................... : ..............• 2-59
LM2524D Regulating Pulse Width Modulator ................................•..•......•...... 2-24
LM2575-5.0 Simple Switcher Step-Down Voltage Regulator .......•............................ 2-51
LM2578A Switching Regulator ..•............•..................................•....•....• 2-59
LM2579 Switching Regulator ......•...............................•........................ 2-73
LM2900 Quad Amplifier ..............................•.............................••.... 3-621
LM2901 Low Power Low Offset Voltage Quad Comparator ..................................... 5-40
LM2902 Low Power Quad Operational Amplifiers .............................•......•....... 3-405
LM2903 Low Power Low Offset Voltage Dual Comparator .•...•............................... 5-61
LM2904 Low Power Dual Operational Amplifier ..........................•...••....••.•...... 3-460
xvi
Alpha-Numeric
Index(continUed)
LM2924 Low Power Operational Amplifier/Voltage Comparator ............................... 3-473
LM2925 Low Dropout Regulator with Delayed Reset ......................................... 1-209
LM2930 3-Terminal Positive Regulator .....................•..........................•.... 1-215
LM2931 Series Low Drop-Out Regulators ....•.............................................. 1-220
LM2935 Low Dropout Dual Regulator ...................................................... 1-226
LM2936 Ultra-Low Quiescent Current 5V Regulator .......................................... 1-234
LM2940 1A Low Dropout Regulator ................•....................................... 1-239
LM2940C 1A Low Dropout Regulator .............................•............•........... 1-244
LM2941 1A Low Dropout Adjustable Regulator .............................................. 1-248
LM2941 C 1A Low Dropout Adjustable Regulator ............................................ 1-253
LM2984C Microprocessor Power Supply System .••.•....•.........•....•.........•...•..... 1-258
LM3080 Operational Transconductance Amplifier ....••.•...........•....••...•............. 3-639
LM3301 Quad Amplifier ......•.........•........................•........................ 3-621
LM3302 Low Power Low Offset Voltage Quad Comparator ..•..•......•......•................. 5-40
LM3303 Quad Operational Amplifier •...................................•....•............. 3-643
LM3401 Quad Amplifier ......................•........................................... 3-621
LM3403 Quad Operational Amplifier " ...•...•....•...................•.................... 3-643
LM3503 Quad Operational Amplifier ...........•....•....•....•....••.•..•....•.........•.. 3-643
LM3524D Regulating Pulse Width Modulator ...•....................•........................ 2-24
LM3525A Pulse Width Modulator ......•....•....••.....•.........•.••••..•.............•.•. 2-41
LM3527 A Pulse Width Modulator ••...•.........•.•..•.•.•.••...•..••.•..•....•.........•... 2-41
LM3578A Switching Regulator ...............................•..................•....•..... 2-59
LM3900 Quad Amplifier •....•.....•.............•.........•....•...•.•.••...••......•.•.. 3-621
LM4136 Quad Operational Amplifier ....................................................... 3-651
LM4250 Programmable Operational Amplifier ..•..••.....•.........•...........••.....•..... 3-659
LM6118 Fast Settling Dual Operational Amplifier ............................................ 3-666
LM6121 High Speed Buffer ......................................•....•................... 4-116
LM6125 High Speed Buffer ......•.•......••...•••..••.•....•..•.•..........•....••...•... 4-121
LM6161 High Speed Operational Amplifier ..................................•....•.........• 3-S75
LM6164 High Speed Operational Amplifier •.•.....•...•..........•..•....••............•.... 3-S82
LM61S5 High Speed Operational Amplifier •....•......................••.•.•.•..•........... 3-S89
LM6218 Fast Settling Dual Operational Amplifier ........•....•...•...•....•....•..•.•..•.•.. 3-666
LM6221 High Speed Buffer ••..••.•..•....•....•...•....•....•....•....•.................. 4-116
LM6225 High Speed Buffer .............•....•.........•.............•..•..•.•.........•.. 4-121
LM6261 High Speed Operational Amplifier ...........•.....•........•............•.......... 3-S75
LM62S4 High Speed Operational Amplifier ...............•........•..••.•.••..•.•........... 3-S82
LM6265 High Speed Operational Amplifier .....•.......•...•.•.......•....••................ 3-689
LM6313 High Speed, High Power Operational Amplifier .............••...•......•....•....•... 3-S96
LM6321 High Speed Buffer ...........•...••.•.•..••.•.•.•........••..•........••...••..•. 4-116
LMS325 High Speed Buffer .............................................•.•.•.•..•..•..... 4-121
LM6361 High Speed Operational Amplifier ..........•...•......••.•..•...•............•....• 3-S75
LM6364 High Speed Operational Amplifier .................•...........••..•.•.•............ 3-S82
LMS365 High Speed Operational Amplifier ....................•...••...•.•............••.... 3-S89
LM7800 Series Voltage Regulators ..••...•..•.•......•...••..•.•..••.•...•...••.•......... 1-274
LM7900 Series 3-Terminal Negative Regulators ............................................. 1-332
LM 13080 Programmable Power Operational Amplifier •...•....•...........•........•..•••.... 3-705
LM13S00 Dual Operational Transconductance Amplifier with Linearizing Diodes and Buffers ...... 3-713
LM13700 Dual Operational Transconductance Amplifier with Linearizing Diodes and Buffers ...... 3-731
LMCS60 CMOS Quad Operational Amplifier ........•.....•....•..•.....•..............•...•. 3-751
LMCS62 CMOS Dual Operational Amplifier ••.....•.......•.................••.•............ 3-759
LMC669 Auto Zero ...................................•....•....•.•..•.•................• 3-768
xvii
Alpha-Numeric Index (Continued)
LMC7660 Switched Capacitor Voltage Converter ......•.................•..•..•.............. 2·93
LP124 Micropower Quad Operational Amplifier ............................... ; .............. 3-782
LP265 Micropower Programmable Quad Comparator ...•...••............•••.•.... , ........... 5·76
LP311 Voltage Comparator .•................................•.... '......................... 5·84
LP324 Micropower Quad Operational Amplifier .......................................•...... 3-782
LP339 Ultra-Low Power Quad Comparator .•....•.....•....••..........•..................... 5-88
LP365 Micropower Programmable Quad Comparator .......................................... 5-76
LP2902 Micropower Quad Operational Amplifier •..•..•......•......•............•........... 3·782
LP2950 5V Adjustable Micropower Voltage Regulator. : .....................•................ 1-345
LP2951 Adjustable Micropower Voltage Regulator ........................................... 1-345
LPC660 CMOS Quad Operational Amplifier ................................................. 3·789
LPC662 CMOS Dual Operational Amplifier .................................................. 3-796
OP-07 Low Offset, Low Drift Operational Amplifier ....•..••.................................. 3-803·
TL081CP Wide Bandwidth JFET Input Operational Amplifier ..........•...... , .... '" .. ; ...... 3·809
TL082CP Wide Bandwidth Dual JFET Input Operational Amplifier .............................. 3-816
xviii
~National
~ Semiconductor
Available Hybrid Products
Device Number
Databook
ADC121 01 ADC1211
AF100
AF150
AF151
AH00141 AH00151 AH0019
DHOO06
DHOO08
DH0011
DH0034
DH0035
DH3467
DH3725
LHOO02
LHOO03
LHOO04
LH0020
LH0021/LH0041
LH0022/LHOO42/LHOO52
LHOO23/LH0043
LHOO24
LHOO32
LHOO33/LHOO63
LHOO36
LHOO38
LHOO44
LHOO45
LHOO53
LHOO61
LHOO62
LHOO70/LHOO71
LHOO75
LHOO76
LHOO82
LHOO84
LHOO86
LHOO91
LHOO94
LH0101
Data Acquisition Linear Devices
Data Acquisition Linear Devices
Data Acquisition Linear Devices
Data Acquisition Linear Devices
Data Acquisition Linear Devices
Individual Datasheet
Individual Datasheet
Individual Datasheet
Individual Datasheet
Individual Datasheet
Individual Datasheet
Individual Datasheet
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
Data Acquisition Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
Data Acquisition Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
Data Acquisition Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
Special Purpose Linear Devices
Special Purpose Linear Devices
General Purpose Linear Devices
xix
Device Number
Databook
LH1605
LH2101
LH2108/LH2308
LH2110/LH2210/LH2310
LH2111/LH2211/LH2311,
LH2422
LH4001
LH4002
LH4003
LH4004
LH4006
LH4008
LH4009
LH4010
LH4011
LH4012
LH4033 I LH4063
LH4101
LH41 04
LH4105
LH4106
LH4117
LH4118
:
LH4124
LH4141
LH4161
LH4162
, ,
LH4200
LH4266
LH4860
LH7001
LH7Q70/LH7071
HS7067
HS7107
MHOO07
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
Special Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose LinearDevices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
Special Purpose Linear Devices
Data Acquisition Linear Devices
General Purpose Linear Devices
Data Acquisition Linear Devices
General Purpose Linear Devices
General Purpose Linear Devices
Individual Datasheet
xx
~National
~ Semiconductor
Additional Available Linear Devices
Device
Databook
ADC0800 8-Bit AID Converter ...................................... Data Acquisition Linear Devices
ADC0801 8-Bit /LP Compatible AID Converter ........................ Data Acquisition Linear Devices
ADC0802 8-Bit /LP Compatible AID Converter ........................ Data Acquisition Linear Devices
ADC0803 8-Bit /LP Compatible AID Converter ........................ Data Acquisition Linear Devices
ADC0804 8-Bit /LP Compatible AID Converter ........................ Data Acquisition Linear Devices
ADC0805 8-Bit /LP Compatible AID Converter ........................ Data Acquisition Linear Devices
ADC0808 8-Bit /LP Compatible AID Converter with 8-Channel
Multiplexer ..................................................... Data Acquisition Linear Devices
ADC0809 8-Bit /LP Compatible AID Converter with 8-Channel
Multiplexer ..................................................... Data Acquisition Linear Devices
ADC0811 8-Bit Serial 1/0 AID Converter with 11-Channel Multiplexer .... Data Acquisition Linear Devices
ADC0816 8-Bit /LP Compatible AID Converter with 16-Channel
Multiplexer ..................................................... Data Acquisition Linear Devices
ADC0817 8-Bit /LP Compatible AID Converter with 16-Channel
Multiplexer ..................................................... Data Acquisition Linear Devices
ADC0819 8-Bit Serial 1/0 AID Converter with 19-Channel Multiplexer .... Data Acquisition Linear Devicei;;
ADC0820 8-Bit High Speed /LP Compatible AID Converter with
TracklHold Function ............................................ Data Acquisition Linear Devices
ADC0829 /LP Compatible 8-Bit AID with 11-Channel MUX/Digitallnput .. Data Acquisition Linear Devices
ADC0831 8-Bit Serial 1/0 AID Converter with Multiplexer Options ....... Data Acquisition Linear Devices
ADC0832 8-Bit Serial 1/0 AID Converter with Multiplexer Options ....... Data Acquisition Linear Devices
ADC0833 8-Bit Serial 1/0 AID Converter with 4-Channel Multiplexer ..... Data Acquisition Linear Devices
ADC0834 8-Bit Serial 1/0 AID Converter with Multiplexer Options ....... Data Acquisition Linear Devices
ADC0838 8-Bit Serial 1/0 AID Converter with Multiplexer Options ....... Data Acquisition Linear Devices
ADC0841 8-Bit /LP Compatible AID Converter ........................ Data Acquisition Linear Devices
ADC0844 8-Bit /LP Compatible AID Converter with Multiplexer Options .. Data Acquisition Linear Devices
ADC0848 8-Bit /LP Compatible AID Converter with Multiplexer Options .. Data Acquisition Linear Devices
ADC0852 Multiplexed Comparator with 8-Bit Reference Divider ......... Data Acquisition Linear Devices
ADC0854 Multiplexed Comparator with 8-Bit Reference Divider ......... Data Acquisition Linear Devices
ADC1001 1O-Bit /LP Compatible AID Converter ....................... Data Acquisition Linear Devices
ADC1005 1O-Bit /LP Compatible AID Converter ....................... Data Acquisition Linear Devices
ADC1021 1O-Bit /LP Compatible AID Converter ....................... Data Acquisition Linear Devices
ADC1025 1O-Bit /LP Compatible AID Converter ....................... Data Acquisition Linear Devices
ADC1205 12-Bit Plus Sign /LP Compatible AID Converter .............. Data Acquisition Linear Devices
ADC1210 12-Bit CMOS AID Converter .............................. Data Acquisition Linear Devices
ADC1211 12-Bit CMOS AID Converter .............................. Data Acquisition Linear Devices
ADC1225 12-Bit Plus Sign /LP Compatible AID Converter .............. Data Acquisition Linear Devices
ADC3511 3%-Digit Microprocessor Compatible AID Converter ......... Data Acquisition Linear Devices
ADC3711 3%-Digit Microprocessor Compatible AID Converter ......... Data Acquisition Linear Devices
ADD3501 3%-Digit DVM with Multiplexed 7-Segment Output ........... Data Acquisition Linear Devices
ADD3701 3%-Digit DVM with Multiplexed 7-Segment Output ........... Data Acquisition Linear Devices
AF1 00 Universal Active Filter. ; ..................................... Data Acquisition Linear Devices
AF150 Universal Wide band Active Filter ............................. Data Acquisition Linear Devices
AF151 Dual Universal Active Filter .................................. Data Acquisition Linear Devices
AH0014 Dual DPST-TTL/DTL Compatible MOS Analog Switch ......... Data Acquisition Linear Devices
xxi
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Additional Available Linear Devices (Continued)
Device
Databook
AH0015 Quad SPST Dual DPST-TIL/DTL Compatible MOS Analog
Switch ......•...........................................•.•.•.. Data Acquisition Linear Devices
AH0019 Dual DPST-TIL/DTL Compatible MOS Analog Switch ......... Data Acquisition Linear Devices
AH5009 Monolithic Analog Current Switch ........................... Data Acquisition Linear Devices
AH5010 Monolithic Analog Current Switch ........................... Data Acquisition Linear Devices
AH5011 Monolithic Analog Current Switch ........................... Data Acquisition Linear Devices
AH5012 Monolithic Analog Current Switch ........................... Data Acquisition Linear Devices
AH5020C Monolithic Analog Current Switch .......................... Data Acquisition Linear Devices
CD4016BM Quad Bilateral Switch ................................... Data Acquisition Linear Devices
CD4051 BM Single 8-Channel Analog Multiplexer/Demultiplexer ........ Data Acquisition Linear Devices
CD4052BM Dual 4-Channel Analog Multiplexer/Demultiplexer .......... Data Acquisition Linear Devices
CD4053BM Triple 2-Channel Analog Multiplexer/Demultiplexer ......... Data Acquisition Linear Devices
CD4066BM Quad Bilateral Switch ................................... Data Acquisition Linear Devices
CD4529BC Dual 4-Channel or 8-Channel Analog Data Selector ......... Data Acquisition Linear Devices
DAC0630 Triple 6-Bit Video DAC with Color Pallette ................... Data Acquisition Linear Devices
DAC0631 Triple 6-Bit Video DAC with Color Pallette ................... Data Acquisition Linear Devices
DAC0800 8-Bit D/ A Converter ...................................... Data Acquisition Linear Devices
DAC0801 8-Bit D/ A Converter ................................•..... Data Acquisition Linear Devices
DAC0802 8-Bit D/ A Converter ...................................... Data Acquisition Linear Devices
DAC0806 8-Bit D/ A Converter ...............•...•.................. Data Acquisition Linear Devices
DAC0807 8-Bit D/ A Converter ...................................... Data Acquisition Linear Devices
DAC0808 8-Bit D/ A Converter .............•.....•...... : ........... Data Acquisition Linear Devices
DAC0830 8-Bit JLP Compatible Double-Buffered 0/ A Converter ......... Data Acquisition Linear Devices
DAC0831 8-Bit JLP Compatible Double-Buffered D/ A Converter ......... Data Acquisition Linear Devices
DAC0832 8-Bit JLP Compatible Double-Buffered D/ A Converter ......... Data Acquisition Linear Devices
DAC1000 p.P Compatible, Double-Buffered 0/ A Converter ............. Data Acquisition Linear Devices
DAC1001 p.P Compatible, Double-Buffered D/ A Converter ............. Data Acquisition Linear Devices
DAC1002 p.P Compatible, Double-Buffered D/ A Converter ..........•.. Data Acquisition Linear Devices
DAC1006 p.P Compatible, Double-Buffered D/ A Converter ............. Data Acquisition Linear Devices
DAC1007 JLP Compatible, Double-Buffered D/ A Converter ............. Data Acquisition Linear Devices
DAC1008 JLP Compatible, Double-Buffered D/ A Converter ............. Data Acquisition Linear Devices
DAC1020 10-Bit Binary Multiplying D/ A Converter ..................... Data Acquisition Linear Devices
DAC1021 10-Bit Binary Multiplying D/ A Converter ..................... Data Acquisition Linear Devices
DAc1022 1O~Bit Binary Multiplying D/ A Converter ..................... Data Acquisition Linear Devices
DAC1208 12-Bit p.P Compatible Double-Buffered D/ A Converter ........ Data Acquisition Linear Devices
DAC1209 12-Bit JLP Compatible Double-Buffered D/ A Converter ........ Data Acquisition Linear Devices
DAC1210 12-Bit JLP Compatible Double-Buffered D/ A Converter ........ Data Acquisition Linear Devices
DAC1218 12-Bit Multiplying D/ A Converter . ~ ......................... Data Acquisition Linear Devices
DAC1219 12-Bit Multiplying D/ A Converter ........................... Data Acquisition Linear Devices
DAC1220 12-Bit Binary Multiplying D/ A Converter ..................... Data Acquisition Linear Devices
DAC1221 12-Bit Binary Multiplying D/ A Converter .......... , .......... Data Acquisition Linear Devices
DAC1222 12-Bit Binary Multiplying D/ A Converter ..................... Data Acquisition Linear Devices
DAC1230 12-Bit p.P Compatible Double-Buffered 0/ A Converter ........ Data Acquisition Linear Devices
DAC1231 12-Bit p.P Compatible Double-Buffered D/ A Converter ........ Data Acquisition Linear Devices
DAC1232 12-Bit p.P Compatible Double-Buffered D/ A Converter ........ Data Acquisition Linear Devices
DAC1265 Hi-Speed 12-Bit D/ A Converter with Reference ..........•... Data Acquisition Linear Devices
DAC1266 Hi-Speed 12-Bit D/ A Converter ............................ Data Acquisition Linear Devices
DM2502 Successive Approximation Register .......................... Data Acquisition Linear Devices
DM2503 Successive Approximation Register ......................... Data Acquisition Linear Devices
DM2504 Successive Approximation Register ......................... Data Acquisition Linear Devices
LF198 Monolithic Sample and Hold Circuit ........................... Data Acquisition Linear Devices
LF298 Monolithic Sample and Hold Circuit ............................ Data Acquisition Linear Devices
xxii
»
Additional Available Linear Devices
(Continued)
Device
Databook
LF398A Monolithic Sample and Hold Circuit .......................... Data Acquisition Linear Devices
LF11201 Quad SPST JFET Analog Switch ........................... Data Acquisition Linear Devices
LF11202 Quad SPST JFET Analog Switch ........................... Data Acquisition Linear Devices
LF11331 Quad SPST JFET Analog Switch ........................... Data Acquisition Linear Devices
LF11332 Quad SPST JFET Analog Switch ........................... Data Acquisition Linear Devices
LF11333 Quad SPST JFET Analog Switch ........................... Data Acquisition Linear Devices
LF13006 Digital Gain Set .......................................... Data Acquisition Linear Devices
LF13007 Digital Gain Set .......................................... Data Acquisition Linear Devices
LF13201 Quad SPST JFET Analog Switch ........................... Data Acquisition Linear Devices
LF13202 Quad SPST JFET Analog Switch ........................... Data Acquisition Linear Devices
LF13331 Quad SPST JFET Analog Switch ........................... Data Acquisition Linear Devices
LF13332 Quad SPST JFET Analog Switch ........................... Data Acquisition Linear Devices
LF13333 Quad SPST JFET Analog Switch ........................... Data Acquisition Linear Devices
LF13508 8-Channel Analog Multiplexer .............................. Data Acquisition Linear Devices
LF13509 4-Channel Analog Multiplexer .............................. Data Acquisition Linear Devices
LH0023 Sample and Hold Circuit .................................... Data Acquisition Linear Devices
LH0043 Sample and Hold Circuit .................................... Data Acquisition Linear Devices
LH0053 High Speed Sample and Hold Amplifier ....................... Data Acquisition Linear Devices
LH0070 Series BCD Buffered Reference ............................. Data Acquisition Linear Devices
LH0071 Series Precision Buffered Reference ......................... Data Acquisition Linear Devices
LH0091 True RMS to DC Converter ................................. Special Purpose Linear Devices
LH0094 Multifunction Converter .................................... Special Purpose Linear Devices
LH2422 CRT Video Driver Amplifier ................................. Special Purpose Linear Devices
LH4266 SPDT RF Switch .......................................... Special Purpose Linear Devices
LH4860 Super Fast 12-Bit Track-Hold Amplifier ....................... Data Acquisition Linear Devices
LH7070 Series Precision BCD Buffered Reference .................... Data Acquisition Linear Devices
LH7071 Series Precision Binary Buffered Reference ................... Data Acquisition Linear Devices
LM34 Precision Fahrenheit Temperature Sensor ...................... Data Acquisition Linear Devices
LM35 Precision Centigrade Temperature Sensor ...................... Data Acquisition Linear Devices
LM113 Reference Diode ........................................... Data Acquisition Linear Devices
LM122 Precision Timer ............................................ Special Purpose Linear Devices
LM129 Precision Reference ........................................ Data Acquisition Linear Devices
LM131 Precision Voltage-to-Frequency Converter ..................... Data Acquisition Linear Devices
LM 134 3-Terminal Adjustable Current Source ......................... Data Acquisition Linear Devices
LM 135 Precision Temperature Sensor ............................... Data Acquisition Linear Devices
LM136-2.5V Reference Diode ...................................... Data Acquisition Linear Devices
LM136-5.0V Reference Diode ...................................... Data Acquisition Linear Devices
LM168 Precision Voltage Reference ................................. Data Acquisition Linear Devices
LM169 Precision Voltage Reference ................................. Data Acquisition Linear Devices
LM185 Adjustable Micropower Voltage Reference .................... Data Acquisition Linear Devices
LM185-1.2 Micropower Voltage Reference Diode ..................... Data Acquisition Linear Devices
LM185-2.5 Micropower Voltage Reference Diode ..................... Data Acquisition Linear Devices
LM194 SuperMatch Pair ........................................... Special Purpose Linear Devices
LM195 Ultra Reliable Power Transistor .............................. Special Purpose Linear Devices
LM 199 Precision Reference ........................................ Data Acquisition Linear Devices
LM231 Precision VOltage-to-Frequency Converter ..................... Data Acquisition Linear Devices
LM234 3-Terminal Adjustable Current Source ......................... Data Acquisition Linear Devices
LM235 Precision Temperature Sensor ............................... Data Acquisition Linear Devices
LM236-2.5V Reference Diode ...................................... Data Acquisition Linear Devices
LM236-5.0V Reference Diode ...................................... Data Acquisition Linear Devices
LM268 Precision Voltage Reference ................................. Data Acquisition Linear Devices
LM285 Adjustable Micropower Voltage Reference .................... Data Acquisition Linear Devices
xxiii
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Additional Available Linear Devices (Continued)
Device
Databook
LM285-1.2 Micropower Voltage Reference Diode ..................... Data Acquisition Linear Devices
LM285-2.5 Micropower Voltage Reference Diode ..................... Data Acquisition Linear Devices
LM295 Ultra Reliable Power Transistor .............................. Special Purpose Linear Devices
LM299 Precision Reference ........................................ Data Acquisition Linear Devices
LM313 Reference Diode ........................................... Data Acquisition Linear Devices
LM322 Precision Timer ............................................ Special Purpose Linear Devices
LM329 Precision Reference ........................................ Data Acquisition Linear Devices
LM331 Precision VOltage-to-Frequency Converter ..................... Data Acquisition Linear Devices
LM334 3-Terminal Adjustable Current Source ......................... Data Acquisition Linear Devices
LM335 Precision Temperature Sensor ............................... Data Acquisition Linear Devices
LM336-2.5V Reference Diode ...................................... Data Acquisition Linear Devices
LM336-5.0V Reference Diode ...................................... Data Acquisition Linear Devices
LM368 Precision Voltage Reference ................................. Data Acquisition Linear Devices
LM368-2.5 Precision Voltage Reference ............................. Data Acquisition Linear Devices
LM369 Precision Voltage Reference ................................. Data Acquisition Linear Devices
LM380 Audio Power Amplifier ...................................... Special Purpose Linear Devices
LM381 Low Noise Dual Preamplifier ........... '" ................... Special Purpose Linear Devices
LM382 Low Noise Dual Preamplifier ............•.................... Special Purpose Linear Devices
LM383 7 Watt Audio Power Amplifier ................................ Special Purpose Linear Devices
LM384 5 Watt Audio Power Amplifier .......•.............•.......... Special Purpose Linear Devices
LM385 Adjustable Micropower Voltage Reference .................... Data Acquisition Linear Devices
LM385-1.2 Micropower Voltage Reference Diode ....•.....•.......... Data Acquisition Linear Devices
LM385-2.5 Micropower Voltage Reference Diode ...............•..... Data Acquisition Linear Devices
LM386 Low Voltage Audio Power Amplifier ......•.......•............ Special Purpose Linear Devices
LM387 Low Noise Dual Preamplifier ................................. Special Purpose Linear Devices
LM388 1.5-Watt Audio Power Amplifier .......•................•...... Special Purpose Linear Devices
LM389 Low Voltage Audio Power Amplifier with NPN Transistor Array ... Special Purpose Linear Devices
LM390 1 Watt Battery Operated Audio Power Amplifier ...•............ Special Purpose Linear Devices
LM391 Audio Power Driver ......................................... Special Purpose Linear Devices
LM394 SuperMatch Pair ........................................... Special Purpose Linear Devices
LM395 Ultra Reliable Power Transistor .................•............ Special Purpose Linear Devices
LM399 Precision Reference ...........................•............ Data Acquisition Linear Devices
LM555 Timer ..................................................... Special Purpose Linear Devices
LM555C Timer .•....•............................................ Special Purpose Linear Devices
LM556 Dual Timer ................................................ Special Purpose Linear Devices
LM556C Dual Timer ............................................... Special Purpose Linear Devices
LM565 Phase Locked Loop ........................................ Special P·urpose Linear Devices
LM565C Phase Locked Loop ....................................... Special Purpose Linear Devices
LM566C Voltage Controlled Oscillator ............................... Special Purpose Linear Devices
LM567 Tone Decoder ................•............................ Special Purpose Linear Devices
LM567C Tone Decoder ............................................ Special Purpose Linear Devices
LM592 Differential Video Amplifier .................................. Special Purpose Linear Devices
LM621 Brushless Motor Commutator ................................ Special Purpose Linear Devices
LM628 Precision Motion Controller .................................. Special Purpose Linear Devices
LM629 Precision Motion Controller .................................. Special Purpose Linear Devices
LM733 Differential Video Amplifier .................................. Special Purpose Linear Devices
LM733C Differential Video Amplifier ................................. Special Purpose Linear Devices
LM831 Low Voltage Audio Power Amplifier ........................... Special Purpose Linear Devices
LM832 Dynamic Noise Reduction System DNR ....................... Special Purpose Linear Devices
LM903 Fluid Level Detector ...............•........................ Special Purpose Linear Devices
LM1035 Dual DC Operated TonelVolume/Balance Circuit ............. Special Purpose Linear Devices
LM1036 Dual DC Operated TonelVolume/Balance Circuit ............. Special Purpose Linear Devices
xxiv
Additional Available Linear Devices (Continued)
Device
Databook
LM1 037 Dual Four-Channel Analog Switch ........................... Special Purpose Linear Devices
LM1038 Dual Four-Channel Analog Switch ........................... Special Purpose Linear Devices
LM1040 Dual DC Operated ToneNolume/Balance Circuit with Stereo
Enhancement Facility ........................................... Special Purpose Linear Devices
LM1042 Fluid Level Detector ....................................... Special Purpose Linear Devices
LM1 044 Analog Video Switch ....................................... Special Purpose Linear Devices
LM1112A Dolby B-Type Noise Reduction Processor ................... Special Purpose Linear Devices
LM 1112B Dolby B-Type Noise Reduction Processor ................... Special Purpose Linear Devices
LM1112C Dolby B-Type Noise Reduction Processor ................... Special Purpose Linear Devices
LM1131A Dual Dolby B-Type Noise Reduction Processor .... '" ....... Special Purpose Linear Devices
LM1201 Video Amplifier System .................................... Special Purpose Linear Devices
LM1203 RGB Video Amplifier System ............................... Special Purpose Linear Devices
LM1211 Broadband Demodulator System .... " ............... '" .... Special Purpose Linear Devices
LM1391 Phase-Locked Loop ....................................... Special Purpose Linear Devices
LM1496 Balanced Modulator-Demodulator ..... , ..................... Special Purpose Linear Devices
LM1596 Balanced Modulator-Demodulator ........................... Special Purpose Linear Devices
LM1800 Phase-Locked Loop FM Stereo Demodulator ................. Special Purpose Linear Devices
LM1801 Battery Operated Power Comparator ........................ Special Purpose Linear Devices
LM1812 Ultrasonic Transceiver ..................................... Special Purpose Linear Devices
LM 1815 Adaptive Sense Amplifier ................................... Special Purpose Linear Devices
LM1818 Electronically Switched Audio Tape System .................. Special Purpose Linear Devices
LM 1819 Air-Core Meter Driver ...................................... Special Purpose Linear Devices
LM1823 Video IF Amplifier/PLL Detection System .................... Special Purpose Linear Devices
LM1830 Fluid Detector ............................................ Special Purpose Linear Devices
LM1837 Low Noise Preamplifier for Autoreversing Tape Playback
System ...................................•.................... Special Purpose Linear Devices
LM1851 Ground Fault Interrupter ................................... Special Purpose Linear Devices
LM1863 AM Radio System for Electronically Tuned Radio .............. Special Purpose Linear Devices
LM 1865 Advanced FM IF System .............................•..... Special Purpose Linear Devices
LM 1866 Low Voltage AM/FM Receiver .............................. Special Purpose Linear Devices
LM1868 AM/FM Radio System ..................................... Special Purpose Linear Devices
LM1870 Stereo Demodulator with Blend ..................•..•....... Special Purpose Linear Devices
LM 1871 RC Encoder ITransmitter ................................... Special Purpose Linear Devices
LM1872 Radio Control Receiver/Decoder ............................ Special Purpose Linear Devices
LM1875 20 Watt Power Audio Amplifier .............................. Special Purpose Linear Devices
LM 1877 Dual Power Audio Amplifier .........................•....... Special Purpose Linear Devices
LM1880 No-Holds Vertical/Horizontal ............................... Special Purpose Linear Devices
LM1881 Video Sync Separator ............. " ...................... Special Purpose Linear Devices
LM 1884 TV Stereo Decoder ........................................ Special Purpose Linear Devices
LM 1886 TV Video Matrix D to A ..................................... Special Purpose Linear Devices
LM 1889 TV Video Modulator ...................•................... Special Purpose Linear Devices
LM 1893 Carrier Current Transceiver ................................. Special Purpose Linear Devices
LM1894 Dynamic Noise Reduction System DNR ...................... Special Purpose Linear Devices
LM1895 Audio Power Amplifier ..................................... Special Purpose Linear Devices
LM 1896 Dual Power Audio Amplifier ................................. Special Purpose Linear Devices
LM 1897 Low Noise Preamplifier for Tape Playback System ............. Special Purpose Linear Devices
LM1921 1 Amp Industrial Switch .................................... Special Purpose Linear Devices
LM 1946 Over/Under Current Limit Diagnostic Circuit .................. Special Purpose Linear Devices
LM1949 Injector Drive Controller .................................... Special Purpose Linear Devices
LM1951 Solid State 1 Amp Switch .................................. Special Purpose Linear Devices
LM 1964 Sensor Interlace Amplifier .................................. Special Purpose Linear Devices
LM 1965 Advanced FM IF System ................................... Special Purpose Linear Devices
xxv
Additional Available Linear Devices (Continued)
Device
Databook
LM2002 8 Watt Audio Power Amplifier ............................... Special Purpose Linear Devices
LM2005 20 Watt Automotive Power Amplifier ......................... Special Purpose Linear Devices
LM2065 Advanced FM IF System ................................... Special Purpose Linear Devices
LM2877 Dual 4 Watt Power Audio Amplifier .......•.................. Special Purpose Linear Devices
LM2878 Dual 5 Watt Power Audio Amplifier .......................... Special Purpose Linear Devices
LM2879 Dual 8 Watt Audio Amplifier ................................. Special Purpose Linear Devices
LM2889 TV Video Modulator .......................•............... Special Purpose Linear Devices
LM2893 Carrier Current Transceiver .................•............... Special Purpose Linear Devices
LM2896 Dual Power Audio Amplifier ................................. Special Purpose Linear Devices
LM2905 Precision Timer ........................... ; ............... Special Purpose Linear Devices
LM2907 Frequency to Voltage Converter •........................... Special Purpose Linear Devices
LM2917 Frequency to Voltage Converter ........•........•.......... Special Purpose Linear Devices
LM3045 Transistor Array ......... , ..............•.................. Special Purpose Linear Devices
LM3046 Transistor Array .......................... " ............... Special Purpose Linear Devices
LM3086 Transistor Array ........................................... Special Purpose Linear Devices
LM3089 FM Receiver IF System .................................... Special Purpose Linear Devices
LM3146 High Voltage Transistor Array ............................... Special Purpose Linear Devices
LM3189 FM IF System ............................................ Special Purpose Linear Devices
LM3361A Low Voltage/Power Narrow Band FM IF System ............. Special Purpose Linear Devices
LM3820 AM Radio System ......................................... Special Purpose Linear Devices
LM3905 Precision Timer ........................................... Special Purpose Linear Devices
LM3909 LED Flasher/Oscillator .................................... Special Purpose Linear Devices
LM3911 Temperature Controller .................................... Data Acquisition Linear Devices
LM3914 Dot/Bar Display Driver ......... , ........................... Special Purpose Linear Devices
LM3915 Dot/Bar Display Driver ..................................... Special Purpose Linear Devices
LM3916 Dot/Bar Display Driver ..................................... Special Purpose Linear Devices
LM3999 Precision Reference ....................................... Data Acquisition Linear Devices
LM4500A High Fidelity FM Stereo Demodulator with Blend ......... ; ... Special Purpose Linear Devices
LM18293 Four Channel Push Pull Driver ............................. Special Purpose Linear Devices
LMC555 CMOS Timer ............................................. Special Purpose Linear Devices
LMC567 Low Power Tone Decoder ................................. Special Purpose Linear Devices
LMC568 Low Power Phase-Locked Loop ............................ Special Purpose Linear Devices
LMC835 Digital Controlled Graphic Equalizer ......................... Special Purpose Linear Devices
LMF90 4th-Order LMCMOSTM Programmable Elliptic Notch Filter ....... Data Acquisition Linear Devices
LMF100 High Performance Dual Switched Capacitor Filter ............. Data Acquisition Linear Devices
LMF120 Mask Programmable Switched Capacitor Filter ................ Data Acquisition Linear Devices
LP395 Ultra Reliable Power Transistor ............................... Special Purpose Linear Devices
MF4 4th Order Switched Capacitor Butterworth Lowpass Filter .......... Data Acquisition Linear Devices
MF5 Universal Monolithic Switched Capacitor Filter ................... Data Acquisition Linear Devices
MF66th Order Switched Capacitor Butterworth Lowpass Filter .......... Data Acquisition Linear Devices
MF8 4th Order Switched Capacitor Bandpass Filter .................... Data AcquiSition Linear Devices
MF10 Universal Monolithic Dual Switched Capacitor Filter ............. ; Data AcquiSition Linear Devices
MM54C905 12-Bit Successive Approximation Register ................. Data Acquisition Linear Devices
MM54HC4016 Quad Analog Switch ................................. Data AcquiSition Linear Devices
MM54HC4051 8-Channel Analog Multiplexer ......................... Data Acquisition Linear Devices
MM54HC4052 Dual 4-Channel Analog Multiplexer· ................•... Data Acquisition Linear Devices
MM54HC4053 Triple 2-Channel Analog Multiplexer .................... Data AcquiSition Linear Devices
MM54HC4066 Quad Analog Switch ................................. Data AcquiSition Linear Devices
MM54HC4316 Quad Analog Switch with Level Translator .............. Data Acquisition Linear Devices
MM74C905 12-Bit Successive Approximation Register ................. Data Acquisition Linear Devices
MM74HC4016 Quad Analog Switch ................................. Data Acquisition Linear Devices
MM74HC4051 8-Channel Analog Multiplexer ......................... Data Acquisition Linear Devices
xxvi
~
a.
Additional Available Linear Devices (Continued)
Device
MM74HC4052 Dual4-Channel Analog Multiplexer .................... Data Acquisition
MM74HC4053 Triple 2-Channel Analog Multiplexer .................... Data Acquisition
MM7 4HC4066 Quad Analog Switch ................................. Data Acquisition
MM74HC4316 Quad Analog Switch with Level Translator .............. Data Acquisition
f.LA9708 6-ChanneI8-Bit f.LP Compatible AID Converter ................ Data Acquisition
;::;:
Databook
Linear Devices
Linear Devices
Linear Devices
Linear Devices
Linear Devices
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xxvii
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~NatiOnal
Semiconductor
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CROSS REFERENCE BY PART NUMBER
CP
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A complete interchangeability list of Linear IC's offered by most Integrated Circuit
Manufacturers are listed in this section and reference the nearest National Semiconductor Corp. direct replacement or recommended replacement with either an
improved or functional replacement. The following notations are appended to assist you in finding the best option.
CP
Gi
a:
..
en
en
0
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No reference note ...... "DIRECT REPLACEMENT"
Note (1) ............... "IMPROVED REPLACEMENT" Pinfor-Pin replacement with "SUPERIOR" Electrical Specifications.
Note (2) ............... "FUNCTIONAL
REPLACEMENT"
Similar device. Consult datasheet to
determine the suitability for specific
application.
Note (3) ............... "SIMILAR DEVICE" with superior
performance. Consult datasheet to
determine suitability of the replacement for specific application.
ANALOG
DEVICES
AD0042
AD101A
AD201A
AD301A
AD3542
AD5035
AD506
AD509
AD521
AD521
AD524
AD537
AD562
AD563
AD565A
AD566A
AD567
AD573
AD5B1
AD5B1
AD5B2
AD5B3
AD5BB
AD5B9M
AD5B9U
AD590
AD590
AD590
AD590
AD611J
AD611K
AD614
AD624
AD650
AD651
AD654
NATIONAL
LH0042
LM101A
LM210A
LM301A
LH0042
LH0042
LH0022
LHOO03
LH0036
LM363
LH003B
LM331
DAC1266
DAC1265
DAC1265
DAC1266
DAC1230
ADC1005
LH0070
LM5B1
LF39B
LF19B
LM369
LM3B5
LM1B5
LM134
LM135
LM34
LM35
LF411C
LF411AC
LHOOB6
LH003B
LM331
LM331
LM331
(2)
(1)
(1)
(1)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(3)
(3)
(2)
(2)
(1)
(2)
(3)
(2)
(1)
(1)
(2)
(2)
(3)
(3)
(1)
(1)
(2)
(2)
(2)
(2)
(2)
AD673
AD741
AD7502
AD7516
AD7523
AD7523
AD7523
AD7524
AD7524
AD7524
AD7533
AD7533
AD7533
AD7541
AD7541
AD7541A
AD7541A
AD7542
AD7542
AD7542
AD7545
AD7545
AD7545
AD754B
AD754B
AD754B
AD7552
AD7552
AD7571
AD7571
AD7575
AD7576
AD757B
AD757B
AD7B20
ADDAC-OB
ADDAC-OB
ADCOB41
LM741
LF13509
CD4066B
DACOB30
DACOB31
DACOB32
DACOB30
DACOB31
DACOB32
DAC1020
DAC1021
DAC1022
DAC121B
DAC1219
DAC121B
DAC1219
DAC120B
DAC1209
DAC1210
DAC120B
DAC1209
DAC1210
DAC1230
DAC1231
DAC1232
ADC1220
ADC1225
ADC1005
ADC1025
ADCOB20
ADCOB20
ADC1205
ADC1225
ADCOB20
DACOBOO
DACOB01
xxviii
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
(1)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
ADDAC·OB
ADDACBO
ADDACB5
ADLH0032
ADLH0033
ADOP07
DACOB02
DAC12BO+
DAC21BO+
LH0032
LH0033
LM607
(1)
(1)
(2)
(2)
(1)
APEX
PA01
PA01
PA07
PA010
PA010
PA011
PA51
PA73
NATIONAL
LH0101
LM12
LM12
LH0101
LM12
LM12
LM12
LM12
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
BURR-BROWN
3507
3533
3542
3550
3551
3553
3554
3571
3572
3573
3626
3629
3606A6
3606A6
HOS-100
INA102
SHC29BA
SHCBO
SHCB5
NATIONAL
LM6361
LH0033
LH0042
LM6361
LM6361
LH0063
LH0032
LM675
LH0021
LM675
LH0036
LH003B
LHOOB4
LHOOB6
LH0033
LH003B
LF39BA
LF39B
LF39B
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
(2)
(2)
CTS
CTSOO02
CTSOO04
CTS0021
CTS0024
CTS0032
CTS0033
CTS0041
CTS0042
CTS2101A
CTS2111
ELANTEC
EHA2500
EHA2502
EHA2505
EHA2510
EHA2512
EHA2515
EHA2520
EHA2522
EHA2525
EHA2600
EHA2602
EHA2605
EHA2620
EHA2622
EHA2625
EL2006
EL2006C
ELHOO02
ELH0021
ELH0032
ELH0033
ELH0041
ELH0101
NATIONAL
LM6161
LM6161
LM6361
LM6161
LM6161
LM6361
LM6164
LM6164
LM6364
LM6161
LM6161
LM6361
LM6164
LM6164
LM6364
LM6161
LM6261
LHOO02
LH0021
LHOO32
LH0033
LH0041
LH0101
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
(1)
(1)
(1)
(1)
(1)
EXAR
XR-1001
XR-1002
XR084
XR1458
XR146
XR246
XR346
NATIONAL
MF4C-100
MF4C-50
LF347
LF147
LM1458
LF146
LF246
LF346
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
HARRIS (Incl.
GE/RCA/
INTERSIL)
AD7520
AD7520
AD7521
AD7521
AD7521
AD7530
AD7530
AD7530
AD7531
AD7531
AD7531
AD7533
AD7533
AD7533
AD7541
AD7541
ADCOB01
ADCOB02
ADCOB03
ADCOB04
CAOB1
NATIONAL
DAC1021
DAC1022
DAC1220
DAC1221
DAC1222
DAC1020
DAC1021
DAC1022
DAC1220
DAC1221
DAC1222
DAC1020
DAC1021
DAC1022
DAC1218
DAC1219
ADCOB01
ADC0802
ADCOB03
ADCOB04
LF411M
XROS,;,r.A
..
n
NATIONAL
LH002
LHOO04
LH0021
LH0024
LH0032
LH0033
LH0041
LH0042
LH2101A
LH2111
(3)
(3)
(3)
(2)
CAOB1A
CAOB1B
CA081C
CAOB2
CA082A
CA082B
CA082C
CA084
CA084B
CA084C
CA124
CA139
CA139A
CA1458
CA1558
CA158
CA158A
CA224
CA239
CA239A
CA258
CA258A
CA301A
CA307
CA31 05
CA311
CA324
CA3290
CA339
CA339A
CA3401
CA358
CA358A
CA741
CA747
CA748
DG201
DG211
DG212
HA-OP07
HA2400
HA2404
HA2405
HA2406
HA2500
HA2502
HA2505
HA251 0
HA2512
HA2515
HA2520
HA2520
HA2522
HA2522
HA2525
HA2525
HA2530
HA2535
HA2540
HA2541-2
HA2541-5
HA2542
HA2542-2
HA2542-5
HA2600
HA2602
HA2605
HA2620
HA2622
HA2625
HA2640
LF411C
LF411C
TL081C
LF412M
LF412C
LF412C
TL082C
LF147
LF347B
LF347
LM124
LM139
LM139A
LM1458
LM1558
LM158
LM158A
LM224
LM239
LM239A
LM258
LM258A
LM301A
LM307
LM675
LM311
LM324
LM393
LM339
LM339A
LM3401
LM358
LM358A
LM741
LM747
LM748
LF11201
LF13201
LF13202
LM607
LM604AM
LM604AM
LM604C
LM604C
LM6161
LM6161
LM6361
LM6161
LM6161
LM6361
LHOO03
LM6164
LHOO03
LM6164
LHOO03
LH6364
LH0024
LH0024
LH0032
LM6161
LM6361
LH0032
LM6164
LM6164
LM6161
LM6161
LM6361
LM6164
LM6164
LM6364
LHOO04
xxix
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(2)
(1)
(1)
(2)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
HA5033
HA5162
HA5180
HF-l0
HI-201
HI-300
ICH8530
ICL7114
ICL7114
ICL7660
ICL8069
ICL8069
IH5009
IH5010
IH5011
IH5012
IH6108
IH6208
LM741
,...A748
LH0033
LH0062
LH0052
MF10
LF13201
AH5020
LH010l
ADC1205
ADC1225
LMC7660
LM313
LM385-1.2
AH5009
AH5010
AH5011
AH5012
LF13508
LF13509
LM741
LM748
(1)
(2)
(1)
HEWLETT·
PACKARD
HCTL·100
NATIONAL
LM628
(3)
HITACHI
HA13421A
HA17082
HA17082A
HA17084
HA17084A
HA17094
HA17301
HA17324
HA17339
HA17358
HA17393
HA17458
HA17741
HA17747
HA17901
HA17902
HA17903
NATIONAL
LM18293
LF353
LF412
LF347
LF347B
LM2904
LM3301
LM324
LM339
LM358
LM393
LM1458
LM741
LM747
LM2901
LM2902
LM2903
(3)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
LINEAR
TECHNOLOGY
AD581
AD581
LM1009M
LM129
LM134
LM185
LM199
LM234
LM329
LM334
LM385
LM399
LT1001
LT1004C
LT1004M
LT1009C
LT1019C
LT1019M
LT1020
LT1021C
LT1021M
LT1029C
LT1029M
LT1031
LT117A
NATIONAL
LH0070
LM581
LM136-2.5
LM129
LM134
LM185
LM199
LM234
LM329
LM334
LM385
LM399
LM607A
LM385
LM185
LM336·2.5
LM368
LM168
LP2951
LM369
LM169
LM336-5.0
LM136-5.0
LH0070
LM117A
0
UJ
UJ
:JJ
CD
CD
(2)
(2)
(2)
(2)
(1)
;;;
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CD
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..
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CD
(1)
(2)
(2)
(3)
(1)
(1)
...III
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III
Co)
c
...
III
III
I II
a:
II)
II)
...0
0
LT123A
LT13SA
LT150A
LT317A
LT323A
LT33SA
LT350A
REF-01
REF-01
SG1524
SG1525A
SG1527A
SG3524
SG3525A
SG3527A
LM123A
LM13SA
LM150A
LM317A
LM323A
LM33SA
LM350A
LM16S
LM36S
LM1524D
LM1525A
LM1527A
LM3524D
LM3525A
LM3527A
LSI
COMPUTER
LS7261
LS7263
NATIONAL
LM621
LM621
MICRA
MCOOO2
MCOOO3
MCOOO4
MCOO32
MCOO33
MCOO41
MCOO63
NATIONAL
LHOOO2
LHOOO3
LHOOO4
LHOO32
LHOO33
LHOO41
LHOO63
(1)
(1)
(1)
(2)
(2)
(1)
(2)
(2)
(3)
(3)
MICRO POWER NATIONAL
MP10S
MP10SA
MP155
MP155A
MP156
MP156A
MP157
MP157A
MP20S
MP20SA
MP2108A
MP308
MP308A
MP355A
MP356A
MP357A
MP5010G
MP5010G
MP5010H
MP5010H
MP5010L
MP5010L
MPOP07
LM10S
LM10SA
LF155
LF155A
LF156
LF156A
LF157
LF157A
LM20S
LM208A
LH2108A
LM308
LM308A
LF355A
LF356A
LF357A
LM185
LM385
LM185
LM385
LM185
LM385
LM607
MOTOROLA
AD562A
AD563A
DAC-08
DAC-08
DAC-08
LM109H
LM109K
LM117K
LM123K
LM137K
LM150K
LM2931
LM309K
LM317K
NATIONAL
(2)
DAC1266
DAC1265
(2)
DAC0800
DAC0801
DAC0802
LM109H
LM1 09K STEEL
LM117K STEEL
LM123K STEEL
LM137K STEEL
LM150K STEEL
LM2931
LM309K STEEL
LM317K STEEL
(1)
LM323K
LM337K
LM350K
MC140S
MC140S
MC140S
MC1414
LM1436
MC14442
MC14444
MC145040
MC145041
MC145S
MC1496
MC150S
MC1514
MC1536
MC155S
MC1596
MC1709
MC1710
MC1723
MC1723C
MC1741
MC1747
MC174S
MC3301
MC3302
MC3361
MC34001
MC34001A
MC340018
MC34002
MC34002A
MC340028
MC34004
MC34004
MC340048
MC340048
MC3401
MC3410
MC3412
MC35001
MC35001A
MC350018
MC35002
MC35002A
MC350028
MC3510
MC4741
MC78LXXACG
MC78LXXACP
MC78LXXCG
MC78LXXCP
MC78MXXCT
MC78MXXCT
MC78MXXCT
MC78XXACT
MC78XXCK
MC78XXCT
MC79LXXACG
MC79LXXACP
MC79LXXCP
MC79LXXCP
MC79MXXAKC
MC79XXACT
MC79XXAKC
MC79XXCK
MC79XXCK
MC79XXCT
LM323K STEEL
LM337K STEEL
LM350K STEEL
DACOS06
DACOS07
DACOSOS
LM1414
LM343
ADCOS29
ADCOS30
ADCOS11
ADCOS11
LM145S
LM1496
DACOSOS
LM1514
LM143
LM155S
LM1596
LM709
LM710
LM723
LM723C
LM741
LM747
LM74S
LM3301
LM3302
LM3361A
LF351
LF411C
LF411C
LF353
LF412A
LF412C
LF147
LF347
LF147
LF3478
LM3401
DAC1020
DAC1265
LF411M
LF411M
LF411M
LF412M
LF412AM
LF412M
DAC1020
LM348
LM78LXXACH
LM78LXXACZ
LM78LXXCH
LM78LXXSACZ
LM341P-XX
LM342P-XX
LM78MXXCT
LM340AT-XX
LM78XXCK
LM78XXCT
LM320H-XX
LM320LZ-XX
LM79LXXCZ
LM79LXXCZ
LM320MP-XX
LM320T-XX
LM320K-XX
LM320K-XX
LM79XXCK
LM79XXCT
xxx
(1)
(2)
(2)
(2)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(2)
(1)
(1)
(1)
(1)
(1)
(1)
(2)
PRECISION
MONOLITHIC
INC.
ADC·910
ADC·910
AMP·01
8UF·03
DAC-02
DAC-02
DAC-02
DAC-03
DAC-03
DAC-03
DAC-05
DAC-05
DAC-05
DAC-OS
DAC-OS
DAC-OS
DAC-100
DAC-100
DAC-100
DAC-140S
DAC-140S
DAC-140S
DAC-312
DAC-S012
DAC-S012
DAC-S012
DAC-SSS
DAC-SSS
DAC-SSS
MUX-OSE
MUX-24E
OP-05
OP-07
OP-15
OP-215
OP-77
PM-1OS
PM-108A
PM-139
PM-139A
PM-155
PM-155A
PM-156
PM-156A
PM-157
PM-157A
PM-208
PM-208A
PM-2108A
PM-308
PM-308A
PM-339A
PM-355
PM-355A
PM-356
PM-357
PM-357A
PM-725
PM-741
PM-747
PM-7533
PM-7533
PM-7533
PM-7541
PM-7541
PM356A
PM420
NATIONAL
ADC1005
ADC1025
LHOO3S
LHOO33
DAC1020
DAC1021
DAC1022
DAC1020
DAC1021
DAC1022
DAC1020
DAC1021
DAC1022
DACOSOO
DACOS01
DACOS02
DAC1020
DAC1021
DAC1022
DACOS06
DACOS07
DACOSOS
DAC1266
DAC120S
DAC1209
DAC1210
DAC·OS30
DACOS31
DACOS32
LF1350S
LF13509
LM607
LM607
LF411
LF412
LM607
LM10S
LM108A
LM139
LM139A
LF155
LF155A
LF156
LF156A
LF157
LF157A
LM208
LM208A
LH2108A
LM308
LM308A
LM339A
LF355
LF355A
LF356
LF357
LF357A
LM725
LM741
LM747
DAC1020
DAC1021
DAC1022
DAC1218
DAC1219
LF356A
LM124
(2)
(2)
(2)
(1)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
(1)
(1)
(1)
(1)
.
(")
REF-01CJ
REF-02
REF-43
REF-01
SW-06B
SW-06F
SW-06G
SW-201B
SW-201F
SW-201G
SW-202B
SW-202F
SW-202G
LM36B-1.0
LM36B-5.0
LM36B-2.5
LM369
LFl1333
LF13333
LF13333
LFl1201
LF13201
LF13201
LF11202
LF13202
LF13202
RAYTHEON
LP365
RC145B
RC155B
RC714
RC741
RC747
REF-01
REF-OH
REF-02
REF-03
NATIONAL
LP365
LM145B
LM155B
LM607
LM741
LM747
LM369
LM36B
LM36B-5.0
LM36B-5.0
SAMSUNG
KA3524
KA431
KA7BS40
LM741
MC7BLXX
MC7BMXX
MC7BXX
MC79MXX
MC79XX
NATIONAL
LM3524D
LM431
LM7BS40
LM741
LM7BLXX
LM7BMXX
LM7BXX
LM79MXX
LM79XX
SGSTHOMSON
L123CB
L293
L4940
L4941
L4960
L4962
L7BMXXCV
L7BS05CV
L7BXXACV
L7BXXCT
L7BXXCV
L790XXACV
L79XXCT
L79XXCV
LF19B
LF29B
LF39B
LM105H
LM109K
LMl17H
LM117K
LMl17K
LM123K
LM134
LM135
LM137H
LM137K
LM13BK
LM234
LM235
LM2930A
LM2931A
NATIONAL
LM723CN
LM1B293
LM2940T-5.0
LM2940T-5.0
LM2579
LM2579
LM341P-XX
LM323K-5.0
LM340AT-XX
LM7BXXCK
LM7BXXCT
LM320T-XX
LM79XXCK
LM79XXCT
LF19BA
LF29B
LF39BA
LM105H
LM109K STEEL
LMl17H
LF117K
LF1171< STEEL
LF123K STEEL
LM134
LM135
LM137H
LM137KSTEEL
LM13BK STEEL
LM234
LM235
LM2930T-5.0
LM2931AT-5.0
(1)
(3)
(1)
(1)
(1)
(1)
(1)
(3)
(1)
(1)
(2)
(2)
(2)
(2)
(2)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
LM2935
LM305H
LM309H
LM309K
LM317H
LM317K
LM317K
LM317T
LM323K
LM334
LM335
LM335A
LM337H
LM337K
LM33BK
LM74B
LM7B05MK
SG1524
SG1525A
SG1527A
SG2524
SG3524
SG3525A
SG3527A
TBC0136
TCA30B9
TDA231 0
J.'A741
J.'A74B
J.'A7B05CK
J.'A7B12CK
J.'A7B12MK
J.'A7B15CK
J.'A7B15MK
J.'A7905CK
,...-A7905MK
J.'A7912CK
J.'A7912MK
J.'A7915CK
J.'A7915MK
LM2935
LM305H
LM309H
LM309K STEEL
LM317H
LM317K
LM317K STEEL
LM317T
LM323K STEEL
LM334
LM335
LM335A
LM337H
LM337K STEEL
LM33BK STEEL
LM74B
LM140K-5.0
LM1524D
LM1525A
LM1527A
LM2524D
LM3524D
LM3525A
LM3527A
LM336
LM30B9
LM3B1
LM741
LM74B
LM7B05KC
LM7812KC
LM140K-12
LM7B15KC
LM140K-15
LM7905KC
LM120K-5.0
LM7912KC
LM120K-12
LM7915KC
LM120K-15
SIEMENS
TCA365
NATIONAL
LH0101
SIGNETICS
7BLXXACS
7BLXXADB
78LXXCDB
7BLXXCS
7BXXCU
7BXXDA
79XXCU
79XXDA
ADCOB01
ADCOB02
ADCOB03
ADCOB04
ADCOB05
DAC-OB
DAC-OB
DAC-OB
LF19B
LF29B
LF39B
LM109DB
LM309DA
LM309DB
LM340XXDA
LM340XXLL
MC140B
MC140B
MC140B
NATIONAL
LM7BLXXACZ
LM7BXXACH
LM7BLXXCH
LM7BLXXACZ
LM7BXXCT
LM7BXXCK
LM79XXCT
LM79XXCK
ADCOB01
ADCOB02
ADCOB03
ADC0804
ADCOB05
DACOBOO
DAC0801
DACOB02
LF19B
LF29B
LF39B
LM109H
LM309K
LM309H
LM340KXX
LM340T-XX
DACOB06
DACOB07
DACOBOB
xxxi
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
MC1496N
MC150B
MC1596K
NE455B
NE455BD
NE455BN
NE5034
NE511B
NE529
NE532
NE5410
NE5532
NE5532N
NE5532P
NE555N
SA532
SA534
SE511B
SE529
SE532
SE541 0
SE567
J.'A723CF
J.'A723CL
J.'A723CN
J.'A723F
J.'A723L
J.'A741
J.'A747
LM1496N
DACOBOB
LM1596H
LM833
LMB33CM
LMB33CN
ADC0841
DACOB30
LM361
LM35B
DAC1020
LMB33
LMB33CN
LMB33CN
LM555CN
LM2904
LM2902
DAC0830
LM161
LM15B
DAC1020
LM567
LM723CJ
LM723CH
LM723CN
LM723J
LM723H
LM741
LM747
SILICON
GENERAL
SG101
SG101A
SG104
SG105
SG107
SG109
SG117
SG1173
SGl17A
SGl17MV
SG120-XX
SG123
SG123A
SG124
SG137
SG13B
SG138A
SG140-XX
SG1436
SG150
SG150A
SG1524
SG1524B
SG1525A
SG1527A
SG1536
SG201
SG201A
SG204
SG205
SG207
SG224
SG2524
SG2524B
SG301A
SG304
SG305
SG307
SG309
SG317
NATIONAL
LM101A
LM101A
LM104
LM105
LM107
LM109
LM117
LM675
LMl17A
LM117HV
LM120-XX
LM123
LM123A
LM124
LM137
LM13B
LM13BA
LM140-XX
LM343
LM150
LM150A
LM1524D
LM1524D
LM1525A
LM1527A
LM143
LM201A
LM201A
LM204
LM205
LM207
LM224
LM2524D
LM2524D
LM301A
LM304
LM305
LM307
LM309
LM317
0
UJ
UJ
(2)
(2)
(2)
(2)
(2)
(1)
(1)
(2)
(2)
(2)
::a
CD
CD
(i;
:=I
n
CD
c:r
'<
"'a
I»
:L
Z
c
3
(1)
(1)
(2)
(1)
(1)
(2)
(2)
(1)
(1)
(1)
(1)
(1)
(2)
(1)
(1)
(1)
(1)
(1)
(1)
.
c:r
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...
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0
SG3173
SG317A
SG317MV
SG320-XX
SG323
SG323A
SG324
SG337
SG338
SG338A
SG340-XX
SG350
SG350A
SG3524
SG3524B
SG3525A
SG3527A
SG723
SG723C
SG741
SG78XX
SG78XXA
SG78XXAC
SG78XXC
SG79XX
SG79XXA
SG79XXAC
SG79XXC
LM675
LM317A
LM317HV
LM320-XX
LM323
LM323A
LM324
LM337
LM338
LM338A
LM340-XX
LM350
LM350A
LM3524D
LM3524D
LM3525A
LM3527A
LM723
LM723C
LM741
LM140-XX
LM140A-XX
LM340A-XX
LM78XXC
LM120-XX
LM120-XX
LM320-XX
LM79XXC
SILICONIX
DG201
DG202
DG211
DG212
DG508
DG509
NATIONAL
LF13201
LF13202
LF13201
LF13202
LF13508
LF13509
SPRAGUE
SG3525A
SG3527A
UDN2993B
NATIONAL
LM3525A
LM3527A
LM18293
TELEDYNE
TPOO32
TPOO33
NATIONAL
LHOO32
LHOO33
TEXAS
INSTRUMENTS
ADC0801
ADC0802
ADC0803
ADC0804
ADC0805
ADC0808
ADC0809
ADC0831
ADC0832
NATIONAL
ADC0801
ADC0802
ADC0803
ADC0804
ADC0805
ADC0808
ADC0809
ADC0831
ADC0832
(2)
(1)
(1)
(1)
(2)
(2)
(2)
(2)
(3)
ADC0834
ADC0838
LM317KC
RC4558
RC4588D
RV4558D
TL071
TL071A
TL071B
TL072
TL072A
TL072B
TL074
TL074A
TL081
TL081A
TL081B
TL082
TL082A
TL082B
TL084
TL084A
TL087
TL088
TL288
TL487N
TL489N
TL490N
TL491N
TL520
TL521
TL522
TL530
TL531
TL532
TLC532A
TL533
TLC533A
TLC274AC
TLC274AI
TLC274AM
TLC274BC
TLC274BI
TLC274BM
TLC274C
TLC2741
TLC274M
TLC540
TLC541
TLC549
TL061
TL061A
TL061B
TL062
TL062A
TL0628
TL064
ADC0834
ADC0838
LM317T
LM833
LM833CM
LM833CM
LF351
LF411
LF411
LF353
LF412
LF412
LF347
LF347B
TL081
LF411
LF411
TL082
LF412
LF412
LF347
LF347B
LF411A
LF411A
LF412A
LM3915N
LM3914N
LM3914N
LM3914N
ADC0848
ADC0848
ADC0848
ADC0830B
ADC0830C
ADC0829B
ADC0829B
ADC0829C
ADC0829C
LMC660AI
LMC660AI
LMC660AM
LMC660AI
LMC660AI
LMC660AM
LMC660C
LMC660AI
LMC660AM
ADC0811
ADC0811
ADC0831
LF441
LF441
LF441 A
LF442
LF442A
LF442
LF444
xxxii
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1 )
(1)
(1)
(1)
(1)
(1)
(1)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
TL064A
).LA709
).LA723CJ
/LA723CN
/LA723MJ
/LA733CN
/L A741
/L A747
/LA78LXXACL
/LA78MXXCKD
/LA78XXCKC
/LA79MXXCKD
/LA79XXCKC
LF444A
LM709
LM723CJ
LM723CN
LM723J
LM733CN
LM741
LM747
LM78LXXACZ
LM78MXXCP
LM78XXCT
LM79MXXCP
LM79XXCT
TOSHIBA
TA7504
TA75339
TA75358
TA75393
TA75902
NATIONAL
LM741
LM2901
LM2904
LM2903
LM2902
UNITRODE
L293
UC117
UC137
UC150
UC1524
UC1524A
UC1525A
UC1527A
UC2524
UC2524A
UC317
UC337
UC350
UC3524
UC3524A
UC3525A
UC3527A
UC494
UC78XXACK
UC78XXAK
UC78XXCK
UC78XXCK
UC78XXK
UC79XXACK
UC79XXAK
UC79XXCK
UC79XXK
NATIONAL
LM18293
LM117
LM137
LM150
LM1524D
LM1524D
LM1525A
LM1527A
LM2524D
LM2524D
LM317
LM337
LM350
LM3524D
LM3524D
LM3525A
LM3527A
LM494
LM340AK-XX
LM140AK-XX
LM340K-XX
LM78XXCK
LM140K-XX
LM320K-XX
LM120K-XX
LM79XXCK
LM120K-XX
(1)
(1)
(1)
(1)
(1)
(1)
(2)
(1)
(2)
(1)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
~
Industry Package Cross-Reference Guide
CJ
wmw
~=
NSC
NSC
p.A
Signetics
Motorola
4/16 Lead
Glass/Metal DIP
D
D
I
L
Glass/Metal
Flat Pack
F
F
Q
F
TO-99, TO-100, TO-5
H
H
T,
K,
L,
DB
B-, 14- and 16-Lead
Low Temperature
Ceramic DIP
J
F
~
IDOIII
@
CJ
~
?
0
D
m
R,
D
TI
RCA
Hitachi
NEC
LTC
D
C
D
D
F,
S
K
F
G
L
S',
V1"
U
J
G
Q
A
H
D
J,
JB
(Steel)
K
TO-3
KS
K
KC
K
DA
K
K
N
T,
P
V,
A,
B
P
P,
N
(Aluminum)
B-, 14- and 16-Lead
Plastic DIP
'With dual-in-Iine formed leads
"With radically formed leads
xxxiii
E
P
C
N,
NB
NSC
f~
~~
~
~
mm
0
TO-202
(D-40, Durawalt)
TO-220
3-&5-Lead
TO-220
11-,15- & 23-Lead
NSC
/LA
Signelics
Motorola
TI
P
T
RCA
Hitachi
NEC
LTC
T
H
T
H
Z
G
5
KD
U
U
KC
T
Low Temperature
Glass Hermetic
Flat Pack
W
F
TO-92
(Plastic)
Z
W
M
5
F
W
5
P
LP
D
D
0
lRiiRAAil
RRRRRRRRRR
50
(Narrow Body)
(Wide Body)
D
DW
WM
)
•
I:U:I 1::11::11::1 1::1 I:HII::I 1::1
btilAARPJUiRJ
xxxiv
M
MP
NSC
NSC
,...A
Signetics
Motorola
TI
RCA
Hitachi
NEC
PCC
V
Q
A
FN
FN
Q
CP
L
LCC
Leadless Ceramic
Chip Carrier
E
L1
G
U
BJ
CG
K
~
~6
~
~O§
U
.........
,
~
~OOOOOOO~
§
~
CI
~
~
CJ
~DDDDDDD~
II~~~~~~~II
xxxv
FKI
FG/FH
LTC
Section 1
Continuous Voltage
Regulators
•
Section 1 Contents
Voltage Regulators Definition of Terms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-4
Continuous Voltage Regulators Selection Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-5
LH0075 Positive Precision Programmable Regulator ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-8
LH0076 Negative Precision Programmable Regulator ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-13
LH7001 Positive/Negative Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-18
LM104/LM204/LM304 Negative Regulators....... .......... .. . . ..... ... .. .... .... . ...
1-28
LM1 05/LM205/LM305/LM305A1LM376 Voltage Regulators ............................
1-32
LM109/LM309 5-Volt Regulator......................................................
1-39
LM117 /LM117 A/LM317 /LM317A 3-Terminal Adjustable Regulators. . . . . . . . . . . . . . . . . . . . . .
1-45
LM117HV/LM317HV 3-Terminal Adjustable Regulator..................................
1-57
LM120/LM320 Series.3-Terminal Negative Regulators.. .. ... .. ..... ... ..... . ...... ... ..
1-67
1-76
LM123A1LM123/LM323A1LM323 3-Amp, 5-Volt Positive Regulators.....................
LM125/LM325/LM325A, LM126/LM326 Voltage Regulators ........................... ,
1-82
LM133/LM333 3-Amp Adjustable Negative Voltage Regulators.. .................... .....
1-90
LM137/LM337 3-Terminal Adjustable Negative Regulators..............................
1-97
LM 137HV/LM337HV 3-Terminal Adjustable Negative Regulators (High Voltage) . . . . . . . . . . . . 1-103
LM138/LM138A/LM338/LM338A 5-Amp Adjustable Power Regulators. .. .. ... .... ... .... 1-109
LM140AlLM140/LM340AlLM340 Series 3-Terminal Positive Regulators.... .... ..... ..... 1-121
LM 140Ll LM340L Series 3-Terminal Positive Regulators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-129
LM145/LM345 Negative 3-Amp Regulators............................................ 1-133
LM150/LM150A/LM350/LM350A 3-Amp Adjustable Power Regulators . . . . . . . . . . . . . . . . . . . 1-137
LM196/LM39610-Amp Adjustable Voltage Regulators.................................. 1-149
LM317L 3-Terminal Adjustable Regulator............. ............. ...... .... ....... ... 1-161
LM320L 3-Terminal Negative Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-172
LM330 3-Terminal Positive Regulator ...... .. . .. . .. .. .. .. . . .. . .. .. .. .. .. . .. .. .. .. .. .. . 1-177
LM337L 3-Terminal Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . 1-182
LM341 Series 3-Terminal Positive Regulators . . . . . . . .. . . . . . . . . . . . . . . . . . .. . . . . . . . .. . . . . . 1-184
LM342 Series 3-Terminal Positive Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . .. . . . . . . . . . 1-188
LM431A Adjustable Precision Zener Shunt Regulator. . . . . . . . . . . .. .. . . . . . . . . . . . . . . . . . . .. 1-193
LM723/LM723C Voltage Regulators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-200
LM2925 Low Dropout Regulator with Delayed Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-209
LM2930 3-Terminal Positive Regulator................................................ 1-215
LM2931 Series Low Drop-Out Regulators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . .. . . . . . . .. 1-220
LM2935 Low Dropout Dual Regulator ............. .. .. . .. .. . .. . .. .. .. . .. .. .. .. .. .. .. .. 1-226
LM2936 Ultra-Low Quiescent Current 5V Regulator. . . . . . . . . . . . .. . . . .. . . . . .. . . . . . . . . . . .. 1-234
LM2940 1A Low Dropout Regulator............... ..... ..... ... ..... .. .. ...... .... .... 1-239
LM2940C 1A Low Dropout Regulator ................................................. 1-244
LM2941 1A Low Dropout Adjustable Regulator. . . .. . . .. . . . . . . . . . . . . . . . . . . . . . . .. . . . . .. .. 1-248
LM2941 C 1A Low Dropout Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-253
LM2984C Microprocessor Power Supply System ....................................... 1-258
LM78XX Series Voltage Regulators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-271
LM7800Series Voltage Regulators.......... .. .... .... .. .... ........... ... ........... 1-274
LM78G/LM79G 4-Terminal Adjustable Regulators ...................... , . .. . ......... .. 1-284
LM78LXX Series 3-Terminal Positive Regulators. . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-294
LM78LOO Series 3-Terminal Positive Regulators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-299
LM78MG/LM79MG 4-Terminal Positive Regulators.. .... ... ... ..... ..... . ... ........ ... 1-307
LM78MXX Series 3-Terminal Positive Regulators.......... .... ........... .............. 1-318
LM79XX Series 3-Terminal Negative Regulators..... .. ... .. ... . .... ..... . ... .. ......... 1-325
1-2
Section 1 Contents (Continued)
LM7900 Series 3-Terminal Negative Regulators .......... ,... ..... .......... .....•..• ..
LM79LXXAC Series 3-Terminal Adjustable Negative Regulators .. , . .... .....•...... .... ..
LM79MXX Series 3-Terminal Negative Regulators.. ........ .. ... .. .... ...... .....•.....
LP2950/LP2950AC/LP2950C 5Vand LP2951/LP2951 AC/LP2951 C Adjustable Micropower
Voltage Regulators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-3
1-332
1-337
1-342
1-345
~National
~ Semiconductor
Voltage Regulators
Definition of Terms
Current-Limit Sense Voltage: The voltage across the current limit terminals required to cause the regulator to current-limit with a short circuited outpul. This voltage is used
to determine the value of the external current-limit resistor
when external booster transistors are used.
Dropout Voltage: The input-output voltage differential at
which the circuit ceases to regulate against further reductions in input voltage.
Feedback Sense Voltage: The voltage, referred to ground,
on the feedback terminal of the regulator while it is operating in regulation.
Input Voltage Range: The range of dc input voltages over
which the regulator will operate within specifications.
Line Regulation: The change in output voltage for a
change in the input voltage. The measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected.
Output-Input Voltage Differential: The voltage difference
between the unregulated input voltage and the regulated
output voltage for which the regulator will operate within
specifications.
Output Noise Voltage: The RMS ac voltage at the output
with constant load and no inut ripple, measured over a
specified frequency range.
Output Voltage Range: The range of regulated output voltages over which the specifications apply.
Output Voltage Scale Factor: The output voltage obtained
for a unit value of resistance between the adjustment terminal and ground.
Quiescent Current: That par of input current to the regulator that is not delivered to the load.
Rlpply Rejection: The line regulation for ac inupt Signals at
or above a given frequency with a specified value of bypass
capacitor on the reference bypass terminal.
Standby Current Drain: That part of the operating current
of the regulator which does not contribute to the load currenl. (See Quiescent Current)
Temperature Stability: The percentage change in output
voltage for a thermal variation from room temperature to
either temperature extreme.
Thermal Regulation: Percentage change in output voltage
for a given change in power diSSipation over a specified time
period.
Load Regulation: The change in output voltage for a
change in load current at constant chip temperature.
Long Term Stability: Output voltage stability under accelerated life-test conditions at 12SoC with maximum rated voltages and power dissipation for 1000 hours.
Maximum Power Dissipation: The maximum total device
dissipation for which the regulator will operate within specifications.
1-4
oo
-
~NatiOnal
::::J
S"
c
Semiconductor
oc
en
Continuous Voltage Regulators Selection Guide
<
o
s:
CD
CD
:a
CD
CD
C
~
Voltage Regulators
Ul
Adjustable Positive Voltage Regulators
Amps
10.0
Device
LM196K
LM396K
Output Voltage
Package
1.2SV-1SV
1.2SV-1SV
TO-3
TO-3
S.O
tLM138K
LM338K, T
1.2V-32V
1.2V-32V
TO·3
TO-3, TO-220
3.0
tLM1S0K
LM3S0K, T, AT
1.2V-33V
1.2V-33V
TO·3
TO-3, TO-220
1.S
tLM117K
tLM117HVK
LM317K, T, AK, AT
LM317HVK
1.2V-37V
1.2V-S7V
1.2V-37V
1.2V-S7V
TO-3
TO-3
TO-3, TO·220
TO-3
1.0
LM2941T,CT
LM78GCP
SV-20V
SV-30V
TO-220
TO-220 (4 Pin)
O.S
tLM117H
tLM117HVH
LM317H
LM317HVH
LM317MP
LM78MGCT'
1.2V-37V
1.2V-S7V
1.2V-S7V
1.2V-37V
1.2V-37V
SV-30V
TO-39
TO-39
TO-39
TO-39
TO-202
TO·220 (4-Pin)
0.2
tLH007SG, CG
0.1
LM317LZ, M
LM2931CT
tLP29S1CN, J, H, M
0-27V
TO·8
1.2V-37V
3.0V-24V
1.24V-29V
TO-92,80-8
TO-220, S-LEAD
DIP, CERDIP, HEADER, 80-8
'These products were formerly manufactured by Fairchild Semiconductor Corporation. The prefixes have been changed from I'A to LM and may be found with the
former prefix as well as the latter.
tMilitary qualified device. More more information, consult the Militaryl Aerospace Selection Guide.
1-S
en
CD
CD
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::::J
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C
a:
CD
CD
"CI
'S
CJ
Voltage Regulators (Continued)
c
o
I
Adjustable Negative Voltage Regulators
Device
Output Voltage
Package
3.0
LM133K
LM333K, T
-1.2V - -32V
-1.2V - -32V
TO-3
TO-3, TO-220
1.5
tLM137K
tLM137HVK
LM337K, T
LM337HVK
-1.2V
-1.2V
-1.2V
-1.2V
-37V
-47V
-37V
-47V
TO-3
TO-3
TO-3, TO-220
TO-3
1.0
LM79GCP
-2.2V--30V
TO-220 (4-Pin)
0.5
tLM137H
tLM137HVH
LM337H
LM337HVH
LM337MP
LM79MGCTo
-1.2V - -37V
-1.2V - -47V
-1.2V - -37V
-1.2V - -47V
-1.2V- -37V
-2.2V--30V
TO-39
TO-39
TO-39
TO-39
TO-202
TO-224 (4 Pin)
0.2
tLH0076G, CG
0-27V
TO-8
0.1
LM337LZ, M
-1.2V - -37V
TO-92,80-8
Amps
i
'3
I
i~
In
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C
8
-
Adjustable Positive/Negative Voltage Regulator
Amps
Device
Output Voltage
Package
±0.1
LH7001
± 1.2V to ±37V
DIP, TO-5
Fixed Positive Voltage Regulators
Amps
3.0
tLM123K
LM323K,AK
1.0
tLM109K
tLM140AK
tLM140K
tLM2940T
LM2940CT
LM309K
LM340AK, T
LM340K, T
LM78xxCK, T"
0.5
0.2
0.15
0.1
0.05
Output Voltage
Package
5V
5V
TO-3
TO-3
5V
5V,12V,15V
5V,12V,15V
5V, 8V,10V, 12V
5V,12V,15V
5V
5V, 12V, 15V
5V, 12V, 15V
. 5V, BV, BV, 12V, 15V, 18V, 24V
TO-3
TO-3
TO-3
TO-220
TO-220
TO-3
TO-3, TO-220
TO-3, TO-220
TO-3, TO-220
Device
LM2984CT·
LM341T, P
LM78MxxCT, H"
5V,12V,15V
5V, 12V, 15V
5V,BV,8V, 12V, 15V,24V
TO-220, TO-202
TO-220, TO-202
TO-220, TO-39
5V
5V
5V,12V,15V
TO-39
TO-39
TO-202
tLM109H
LM309H
LM342P
LM2930T
tLM140LAH
LM2931Z, T
LM340LZ, H
LM78LxxACZ, H, M"
LP2950CZ
5V,BV
TO-220
5V,12V,15V
5V
5V, 12V, 15V
5V, B.2V, 8.2V, 9V, 12V,15V
5V
TO-39
TO-92, TO-220
TO-92, TO-39
TO-92, TO-39, 80-8
TO-92
5V
TO-92
LM293BZ
'The LM320 has better electrical characteristics than the LM79xx.
LM100Series
+SS'Cto +15O"C
LM300Series
O'C to + 12S'C
"These products were formerly manufactured by Fairchild Semiconductor Corporation. The prefixes have been changed from p.A to LM and may be found with the
former prefix as well as the latter.
tMilitary qualified device. For more Information. consult the MilitarylAerospace Selection Guide.
1-B
Voltage Regulators
oo
:::I
(Continued)
S·
c
Fixed Negative Voltage Regulators
Amps
Device
3.0
tLM145K
LM345K
1.5
tLM120K
LM320K, T
LM79xxCT, K"
0.5
LM320MP
LM79MxxCT, H"
0.2
c
Package
-5V, -5.2V
-5V, -5.2V
TO-3
TO-3
-5V, -12V, -15V
-5V, -12V, -15V
-5V, -BV, -12V, -15V
TO-3
TO-3, TO-220
TO-220, TO-3
-5V, -12V, -15V
-5V, -BV, -12V,-15V
TO-220
TO-220, TO-39
-5V, -12V, -15V
-5V, -12V, -15V
TO-39
TO-39
th
-5V, -12V, -15V
-5V, -12V, -15V
TO-92
TO-92,SO-B
O·
tLM120H
LM320H
0.1
o
Output Voltage
LM320LZ
LM79LxxACZ, M
en
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;::;
II)
CO
(1)
:c
(1)
CO
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ao
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(1)
CD
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c
Low Dropout Regulators
Amps
Device
Output Voltage
Package
5V
TO-92
5V,ADJ
5V
ADJ
TO-220, TO-92
TO-92
DIP, CERDIP, HEADER
0.050
LM2936Z
0.100
LM2931T, Z
LP2950CZ
LP2951N,J,H
0.150
LM2930T
0.500
LM29B4CT
TRIPLE 5V
0.750
LM2925T
LM2935T
5V WITH DELAYED RESET
DUAL5V
TO-220, 5-LEAD
TO-220, 5-LEAD
1.0
tLM2940T
LM2940CT
LM2941T
LM2941CT
5V,BV,10V,12V
5V, 12V, 15V
Adjustable (5V to 20V)
Adjustable (5V to 20V)
TO-220
TO-220
TO-220
TO-220
5V,BV
+ WATCHDOG
TO-220
TO-220, 11-LEAD
Shunt Regulators
Amps
Device
Output Voltage
Package
0.15
LM431ACZ, M
2.5V-36V
TO-92,SO-B
Building Block Regulators
Device
Title
Package
tLM104/204/304
tLM105/205/305
LM376
tLM723
Negative Regulator
Voltage Regulator (Positive)
Voltage Regulator (Positive)
Voltage Regulator
TO-39
TO-39
B-Pin Plastic DIP
14-Pin DIP, TO-39
... *These products were formerly manufactured by Fairchild Semiconductor Corporation. The prefixes have been changed from ~A to LM and may be found with the
former prefix as well as the latter.
tMilitary qualified device. For more information. consult the Military/Aerospace Selection Guide.
1-7
is:
(1)
,... r------------------------------------------------------------------------------------,
~
g
3 ~National
~ Semiconductor
LH0075 Positive Precision Programmable Regulator
General Description
Features
The LH0075 is a precision programmable regulator for positive voltages. Regulated output voltages from 0 to 27V may
be obtained using one external resistor. Also available without any external components are several fixed regulated
voltages with accuracies to 0.1 % (5V, 6V, 10V, 12V and
15V). The output current limit is adjustable from 0 to 200 mA
using two external resistors. These features provide an ·in:
ventory of precision regulated values in one package.
•
•
•
•
•
•
•
•
Output adjustable to OV
Line regulation typically 0.008%1V
Load regulation typically 0.075%
Remote voltage sensing
Ripple rejection of 80 dB
Adjustable precision current limit
Output currents to 200 mA
Popular voltages available without external resistors
Schematic Diagram
Rl
Connection Diagram
R8
R4
Typical Applications
10-8 Metal Can Package
Precision 15V Reference Supply without Current Limit
r-------------------:=.-O
'SENSE
VOUT
D.1$iF*
TO'VIEW
Case is electrically Isolated
Order Number
LH0075Gor
LH0075CG
See NS Package
NumberH12B
1-8
TL/H/5549-1
'Needed if device Is far from finer capacitors
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 4)
Input Voltage
32V
Output Voltage
27V
Output Current
200 rnA
Power Dissipation
See Curve
Operating Temperature Range
LH0075
LH0075C
Storage Temperature
Lead Temp. (Soldering, 10 seconds)
- 55'C to + 125'C
O'Cto +70'C
-65'C to + 150'C
300'C
Electrical Characteristics Conditions for TMIN ~TA~TMAX unless otherwise noted
Parameter
Min
Line Regulation
TA=25'C
Load Regulation
TA=25'C,
1 mA
-
lL -SOmA
l-
....... ~"2aomA
=-0.0&
~ -O.DI
-...-50 -21
a
I
I
IS
10
-
1 I
:.
g;c
21
II
7&
.......
I
......
Cc
,.u"....
-1.Z
.........
n
....=:"
lOW
~a::
."
i'-..
-1
REXrERN'L~
-10 -21
-2
-50 -25
50
CI:.:.!
25
:~
"E·
10
:>
3.0
~
D
Ii
50
75
.00 125
1\
1,4-1-
'OUT"
211"'-
10~"'lII1iA
J.
-10 -25
II
50
J5
'aD 115
....
i..
"1=
$
ii:
I
I
80
CR~~" 2.2,}Fd
V
""" r'\
~
80
"\
CREF! a
40
V'N"'IV
........
'OUT - 200mA
VOUT "IOV
TJ - 21 C
20
80
'0
~
.k
'00
--........
.00k
.M
FREQUENCY IHrI
V,N -IIV
VOUT - IV
CREF - a
Line Transient Response
~~ .500
~!
16..
V,N"·5V
VOUT" 5V
CREF" Il.F.
:s
;
500
~= -5DOa
..~~
1
gl
0.&
....
.... c
3DD
4DD
Output Impedance
.03
1000
i; 1000
,.~
.UD 125
Ripple Rejection
~
-.l
60
".....
.ao
II:
20
..
TIME
71
TEMPERATURE rCI
V,N "15V
lOUT· 100 mA, MAX
CREF' 0
r- l o t - -
'"9c
Line Transient Response
200
II
~
\.
TlME,..1
• ao
25
2.'
U
0
II:
Iii"
3.2
I
........
S~
.
=:
lao
r-..
V
~
....
....... ......
.co
Uc
/"
u
l"- I'-....
260
220
'10
II:
~c .40
.... .! .00
60
1l
20
I'
ID
-u
,...
~.:c
:.
40
f
....
1'0.
Input"Output Differential
Voltage
Load Transient Response
(Current Mode)
20
-OA
./
TEMPERATURE I"CI
Load Transient Response
(Voltage Mode)
9
"
'1111 '25
TEMPERATURE I CI
"'-
c
g
""
i"""
RINTERNAI.
........,. L
.......
3.&
~M
100 lIS
V,N "IIV
VOUT - 5V
CREF -0
-.
......
TEMPERATURE I·CI
u
DA
Current Limit
~
75
~
VI.".IV
TEMPERATURE I"CI
Output Voltage Change with
Temperature (Normalized)
!
O~
~
.......
J.
J.
I
-D.I
::!
!
~
.......
u
......
LBj' - lOO'C/W
...
..
VI.".5V
D.I
Temperature Stability
1.Z
I
ill
~
t-AM.'E~~ ~
;;
Ii!
...i!
~
...
.
u
1.Z
!Ii""
U
i
I
l
VIN ,5V
1&1
•
.0
VOUT"IV
I .'ODIIIA
.,,0
1
10-
I--V
laD
lao
TlMEI.tl
3DO
4DO
.rID
1l1li
V
Ii
/
11k
~
I.
111
••
FREQUENCY IHII
TLlH/5549-2
1-10
~
o
o
Typical Applications (Continued)
....
U1
2A Regulator with Current Limit
r--~-------------------------~~-oVOUT
RLiMIT
VIN
o-+_t-+--+---+---(
Variable Voltage Reference with Current Limit
ITO lOU
r--t;-----~==::::::::::::::=::::::;~~r_0VOUT
RSENSE
VIN 0-....-
....-+--+----(
'Needed if device is far Irom filter capacitors
··Optlonal-improves transient response
R
_ VOUT Desired
PROG 1 mA
TL/H/5549-3
RLIMIT
IOUT(MAX) = [ - RSENSE
+ 1]
X 100 II.A
r-
IOUT:;;:200mA
Applications Information
The LH0075 does not require capacitors for stable operation, but an input bypass is recommended if device is far
from filter capacitors. A 0.1 /LF for input bypassing should
be adequate for almost all applications.
1-11
~ r---------------------------------------------------------------------------~
.....
g Applications Information (Continued)
:5
Since a current source is used as a reference, this makes
remote voltage programming possible.
DESCRIPTION OF OPTIONS
Ripple Rejection Compensation. (Increases Ripple ReJection Typically to 80 dB)
The ripple rejection may be improved by connecting an external capacitor between pin 9 and ground. (The typical performance curves show the rejection with a capacitance of
2.2/LFd.)
Current Limit Programming
The maximum current output of the device may be limited
by adding two external resistors as shown below. The resistor values are easily calculated with the following equation:
RLiMIT
]
IOUT(MAX) = [ -R----+1
SENSE
Internal Voltage Programming
The LM0075 provides various precision output voltages simply by using one or more of the internal resistors. A particular voltage may be obtained by external connections as
shown in Table I.
x 100/LA
where RSENSE = 1 to 10n
RSENSE
VIN
o-....+--t----(
R5, RS, R7 and R12 are
precision-trimmed to 0.1 %.
RS
10k
R12
6k
RI
2k
TL/H/5549-5
FIGURE 2. Current Limit Programmng
TL/H/5549-4
FIGURE 1
This programmable current limit feature can be extended to
make the LH0075 a programmable constant current source.
This can be done by leaving pin 9 open and setting
RUMIT and RSENSE as desired.
For applications where the current limit is used, a minimum
load current of 100 /LA is established at the output. This
arises from the fact that the constant current used in setting
maximum output current is 100 1lA, and it goes directly to
the output of the LH0075. If the total current drawn from the
output is less than the minimum, the output will rise.
External Voltage Programming
An external resistance can be connected between pin 9 and
ground to obtain any voltage from 0 to 27V using the following equation:
R
EXT
VOUT Desired
1 mA
The reference current (IREF) has a typical temperature coefficient of-65 ppml"C. Choosing a resistive material with a
temperature coefficient of 65 ppml"C will compensate the
negative temperature coefficient, resulting in an output voltage with minimal change over the operating temperature
range. Example of a good resistive material is Nichrome,
which has a typical temperature coefficient of 80 ppml"C.
As in the remote voltage adjustment application, remote
current sensing can be applied similarly. RSENSE must be
placed as close to the output of the LH0075 as pOSSible, but
RUMIT can be a fixed resistor or potentiometer located remotely from the device.
TABLE I. Connection Scheme for Internal Available Output Voltages
OUTPUT
VOLTAGE (V)
PINS
PIN6
5
PIN7
PIN8
PINg
Gnd
•
6
8
10
12
15
Gnd
•
Gnd
•
Gnd
•
18
1-12
•
~National
~ Semiconductor
LH0076 Negative Precision Programmable Regulator
General Description
Features
The LH0076 is a precision programmable regulator for negative voltages. Regulated output voltages from 0 to -27V
may be obtained by using 1 external resistor. Also available
without any external components are several fixed regulated voltages with accuracies to 0.1% (-3V. -5V. -6V.
-8V. -ev. -12V. -15V and -18V). The output current
limit is adjustable from 0 to 200 mA using 2 external resistors. These features provide an inventory of precision regulated values in 1 package.
•
•
•
•
•
•
•
Line regulation typically 0.005%1V
Load regulation typically 0.02%
Remote voltage sensing
Ripple rejection-70 dB
Output Adjustable to OV
Adjustable precision current limit
Output current to 200 mA
Schematic Diagram
.
•
,.. o---~----~--------~~------~~---------o
RI
.1
....-------------------0•
VSENS.
RII
,
RLiMIT
-L..'A"
R,
"
nRNALI
A
I
I
I
L~"!'_
' 'M'T-,ao'A!
,...
RI
R"
z,
RID
.,
•
V-o-~~--------------~--------------------~
Connection Diagram
Typical Applications
,
Metal Can Package
Precision -15V Reference Supply without Current Limit
}--.........-o -VOUT
v-
VIENIE
JO'VIEW
Case is eiectrically isoiated
Order Number
LH0076G
LH0076CG
'Recommended if device is far from filter capacitors
See NS Package H12B
1-13
TL/H/SS4B-1
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 4)
Input Voltage
Operating Temperature Range
LH0076
-S2V
-27V
Output Voltage
Output Current
Power Dissipation
- 55'C to + 125'C
LH0076C
Storage Temperature
-25'Cto +85'C
- 65'C to + 150'C
Lead Temperature
(Soldering, 10 seconds)
200mA
SOO'C
See Curve
Electrical Characteristics Conditions are for TMINS:TAS:TMAX unless otherwise noted
Parameter
LHOO76
Conditions
Min
LHOO76C
Typ
Max
Min'
Units
Typ
Max
Line Regulation
TA=25'C
0.005
0.02
0.005
0:04
"10 IV
Load Regulation
TA=25'C,
1 mA
.....
'LOAD. ZOO mA
2.5
l-
2.3 I-- ILOtO - 5mA
5
gu
lao 115
2.1
-5a -Z5
25
sa
75
loa lZ5
-5D -2&
2&
50
75
laa 125
TEMPERATURE 1"&1
TEMPERATURE I'CI
Load Transient Response
(Voltage Mode)
Load Transient Response
(Current Mode)
Line Transient Response
s,......,....,.......-.-,....,....,......-r-...........
VIN- -zav ++-H++H
VOur- -sv+-H-+++-H
-1 HH-++-I-+-H-++~
~~++-~-++~H~
-z
....:r 1
..
:::t
l"""- i'-..
TEMPERATURE I'CI
:::tc
..
:::t
a.,
a.4
TEMPERATURE I'CI
lj~
~
.
IDa 125
=~ 0.2
c
Ii
t"'-..
VIN"' -fiV
1.2
TEMPERATURE I'CI
Output Voltage Change with
Temperature (Normalized)
..
!..
....
..,..
..
...5
..,..~
e:
l...
Ii' = 7rC/W
~::
VIN - -20V
I
lOUT -laa mA IMAXI
-I-H-+-I
+-H-+-I
VIN - -15V
.. 1 :: H-+++H-+++-H-I
~ I:
o ~
~;l:::t:UU::t4t:t:j
I: HH-+++-+-H-+++-I
120
:;
l
ZDII HH-+-+-+-~H-+++-I
lli
za
411
&1
TIME!.s)
la
IDa
za
.a
&a
la
loa
lID
-
Z5"C
12&'C
-5S"C-
II. V
III
a
i=
.....
r:l
Yl
,rIJ
it;;;
VIN" -15V
I-VOUT" ·5V
IL -laamA
~CREF
la
-za
-3D
INPUT VOLTAGE IVI
/
~
20
a
-10
/
-a.l .Fd
CREF-~
.a
la
laa
lk
saa
Output Impedance
VIN--1SV
lID f-IOUT' ZID mA
Ii
VOUT - -~V
:!!
la
10-
..
4IID
103
12a
-I..... I-:
~
I~ ~ I- ~
3QO
TIME,"sl
Ripple Rejection
Quiescent Input Current
II
• Il
zoa
TIME ""I
J-"'
~
10k llDk
FREQUENCY IHzl
1M
i...-'
10-3
10M
10
100
lk
lak 10ak
1M
11M
FREQUENCY 1Hz)
TL/H/554B-3
1·15
U) r-----------------------------------------------------------------------------------~
I'
g Typical Applications (Continued)
3
Variable Voltage Reference with Current Limit
"sENSE
2-Amp Regulator with Current Limit
RSENSE
TLIHI554B-4
'Recommended if device is far from fiRer capacitors
Application Information
The LH0076 does not require external capacitors for stable
operation. However, an input bypass is recommended if the
device is far from filter capacitors. A 0.1 /tF for input bypassing should be adequate for most applications.
DESCRIPTION OF OPTIONS
External Voltage Programming
An external resistance can be connected between pin 10
and ground to obtain any voltage from 0 to - 27V using the
following equation:
R
The reference current (IREF) has a typical temperature coefficient of -60 ppml'C. Choosing a resistive material with a
temperature coefficient of 60 ppm/·C will compensate the
negative tempco of the reference current, resulting in an
output voltage with minimal change over the operating temperature range. Example of a good resistive material is nichrome, which has a typical. tempco of 80 ppml'C. Nichrome is the resistive material used in the LH0076, resulting in output voltage drift of 20 ppmrC typically.
..:.- VOUT desired
EXT-1mA
1-16
,-------------------------------------------------------------------------, r
::E:
Application Information (Continued)
<:)
<:)
"'oJ
Because a current source is used as a reference, remote
voltage programming is possible.
Q)
RSENSE
. . . - - - - - -.....-¥.,.,.......OV ••T
Internal Voltage Programming
The LH0076 provides various precision output voltages simply by using 1 or more of the internal programming resistors.
These voltages may be obtained by using the connections
as shown in Table 1.
RUMIT
RTOTAL is the total resistance between pin 10 and ground
TLlH/554B-6
~
FIGURE 2. Current Limit Programming
r,
For application where the current limit is used, a minimum
load current of 100 ",A is established at the output. This
arises from the fact that the constant current used in setting
maximum output current is 100 ",A, and it comes directly
from the output of the LH0076. If the total current is less
than this minimum current, the output will drop.
VOUT =; IREF x (RTOTAU
11
,.
As in the remote voltage adjustment application, remote
current sensing can be applied similarly. RSENSE should be
placed as close to the output of the LH0076 as possible, but
RLiMIT can be a resistor or potentiometer located remotely
from the device.
TLlH/554B-5
R4, RS, R6 and RS are precision trimmed to 0.1 %
FIGURE 1
Current Limit Programming
RSENSE
r------.....J\I\rv-~==-o '••
The maximum current output of the device may be limited
by adding 2 external resistors as shown in Figure 2. The
resistor values are calculated using the following equation:
RUMIT
]
IOUT(MAX) = [ -R--- + 1 x 100",A
SENSE
where RSENSE = 1 to 10n
This programming current limit feature can be extended to
make the LH0076 a programmable current sink. This can be
done by leaving pin 10 open and setting RUMIT and RSENSE
as desired. (See Figure 3).
T
RUMIT
TLlH/554S-7
FIGURE 3. Precision Current Sink
TABLE 1. Connection Scheme for Internally Available Output Voltages
OUTPUT
VOLTAGE (V)
PIN 1
PIN2
PIN7
PIN 10
-3
PIN 11
GND
-5
-6
nd
-8
-9
Gnd
-12
Gnd
•
-15
Gnd
-18
Gnd
•
1-17
~
o
o
r------------------------------------------------------------------------------------,
..... ~National
::t:
...I
PRELIMINARY
~ Semiconductor
LH7001
Positive/Negative Adjustable Regulator
General Description
The LH7001 combines a positive and a negative adjustable
regulator in one package. Both can supply 100 mA over a
1.2V to 37V output range. It is exceptionally easy to use and
requires only two external resistors on each side to set the
output voltage.
In addition to high performance both sides of the LH7001
offer full overload protection. Included are current limit, thermal overload protection and safe area protection. All overload protection Circuitry remains fully functional even if the
adjustment terminal is disconnected.
The LH7001 is intended for voltage and current regulation in
systems where both polarities are required. This is, e.g., the
case with supplies for op-amps and buffers, where the
LH7001 can also be used to protect from overloads.
Normally, for stable operation, no external capaCitor is
needed on the positive side. The negative side requires only
a single 1 p.F solid tantalum capacitor. On both sides, larger
output capacitors can be added to improve transient response. In case the device is further than 6 inches from the
input filter capaCitors, input bypass capaCitors are needed.
The adjustment terminals can be bypassed to achieve very
high ripple rejection.
The positive and the negative regulator are electrically separated and can therefore be used independent from each
other. Since each regulator is "floating" and sees only the
input to output differential voltage, supplies of several hundred volts can be regulated as long as the maximum inputto-output differential is not exceeded.
The LH7001 is available in a standard molded 8 pin DIP as
LH7001CN with a temperature range of -40"C to + 125'C,
and in an 8 pin TO-5 package as LH7001 H with a temperature range from - 55'C to + 150'C.
Features
•
•
•
•
•
•
•
•
Dual output down to ± 1.2V
Guaranteed ± 100 mA output current
Line regulation typically 0.Q1 %N
Load regulation typically 0.5%
Current limit constant with temperature
Standard 8 pin DIP and 8 pin TO-5 packages
80 dB ripple rejection
Output is short circuit protected
Applications
•
•
•
•
Dual precision voltage regulator
Dual precision current limiter
Voltage and current protection for op-amps
Dual tracking regulator
Connection Diagrams
Metal Can Package
(TO-5, 8 Pin)
PlastiC Package
(Dual-In-Line, 8 Pin)
8
POS. VOUT
N/c
NEG. VIN
NEG. VOUT
7
3
6
4
5
POS. VIN
POS. ADJUST
POS. VIN
N/C
NEG. ADJUST
TLIK110127-1
Top View
Order Number LH7001CN
See NS Package Number N08E
TLIK110127-2
Top View
Order Number LH7001H
See NS Package Number H08D
1-18
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Power Dissipation
Internally Limited
40V
Input·Output Voltage Differential
Operating Junction Temperature
LH7001CN
-40'C to + 125'C
LH7001H
-55'Cto +150'C
Storage Temperature
Lead Temperature (Soldering)
LH7001CN
LH7001H
ESDRating
-55'C to + 150'C
4 sec. to 260'C
10 sec. to 300'C
TBD
Electrical Characteristics (Note 1) (unless otherwise noted, these specifications apply:
-55'C < Tj < + 150'C for the LH7001 and -40'C ,,;; TJ < + 125'C for the LH7001 C, iVlN - vOUTI = 5V and lOUT = 40 rnA.
Although power dissipation is internally limited, these specifications are applicable for power dissipations up to 600 mW for
LH7001 H and up to 900 mW for LH7001 CN, IMAX is 100 rnA. Specifications apply for both positive and negative current limiter.
Parameter
Line Regulation
Load Regulation
Conditions
3V < IVIN - vOUTI
(Note 4)
< 40V
5 rnA < lOUT < IMAX
(Note 4), P ,,;; 625 mW
Typ
Tj = 25'C
Tj = 25'C
0.01
0.04
0.02
0.07
0.5
0.8
1.5
Adjustment Pin Current
Adjustment Pin
Current Change
5mA < IL < 100mA
3V < IVIN - vOUTI < 40V, P ,,;; 625 mW
Reference Voltage
3V < IVIN - vOUTI < 40V, (Note 4)
5 rnA < lOUT < 100mA
Current Limit
3V
< IVIN - vOUTI < 13V
IVIN - vOUTI
Tested Limit
(Note 2)
< 40V
Design Limit
(Note 3)
Units
(Max. Unless
Otherwise Noted)
%N
%
50
100
p.A
4
10
p.A
1.25
1.3
1.2
V(Min)
200
300
100
rnA
rnA (Min)
50
120
25
rnA
,rnA (Min)
Thermal Regulation
TJ = 25'C, 10 ms Pulse
0.04
0.2
%/W
Minimum Load Current
IVIN - vOUTI < 40V
3 < IVIN - vOUTI < 15V
3.5
5
rnA
1.5
3.5
rnA
< f < 10kHz
RMS Output Noise,
%ofVOUT
Tj = 25'C, 10Hz
Ripple Rejection Ratio
VOUT = 10V, f = 120 Hz
CADJ = Op.F
CADJ = 10 p.F
0.003
%
65
80
dB
Long Term Stability
Ti = 125'C, 1000 Hrs.
0.3
%
Thermal Resistance
Junction to Ambient
(No Heat Sink)
H Package (TO·5)
180
'C/W
N Package (DIP)
110
'C/W
Thermal Resistance
H Package (TO·5)
'C/W
75
Junction to Case
Note 1: Boldface limits are guaranteed over full temperature range. Operating junction temperature range of LH7001CN is -2S"C to + 12S"C, and LH7001H is
- SS"C to + lS0"C.
Note 2: Tested limits are guaranteed and 100% production tested.
Note 3: DeSign limits are guaranteed (but not production tested) over the Indicated temperature or temperature range. These limits are not used to calculated
outgoing quality level.
Note 4: This parameter is measured at constant junction temperature, using pulse testing with a low duty cycle, Changes in output voltage due to heating effects
are covered under the specification for thermal regulation.
1·19
.-
~
:s
.-------------------------------------------------------------------------------------~
Typical Performance Characteristics
Positive Regulator
Load Regulation
vs Temperature
o.s
D.2
g
g
0
z
;-0.2
>
~ -.oA
r-
~-0.6
5
~-oJI
~
-
IL =O.IA
r--. .....
VIN =4.25V..!
I
I
rl,
0.7
0.6
./
Q
IVorli20i
-1.0
-75 -50 -25 0 25 50 75 100 125 150
III
~
Ii!
I
Q.5
G.4
/
Q.3
o
o
irfII
TJI2~
1VIN 1=
"i
o
o
D.2
-75 -so -25 0 25 50 75 100 125 150
·lj=-55"1:
TJti
0.3
s
15
... 0.2
~
I I
I I
r- ...... ~J=125"1:- r-0.1
.~
TJ = 25"1:
o
Pos. Regulator
Dropout Voltage
vs Temperature
~
55
o
1,
Ij,=10mA
i
.5
IL=I~"'" ~ r- ....
Q.5
-75 ,-50 -2S 0 25 50 75 100 125 150
-75 -50 -25 0 25 50 75 lOll 125 150
TEMPERAlURE ("1:)
TENPERAlURE ("1:)
60
..... .....
...... .....
1.27
45
50
I..-
..........
30
-75 -50-25 0 25 50 75 100 125150
TEMPERAlURE ("1:)
Negative Regulator
Reference Voltage
Stability vs Temperature
1.30
...... ~
.......
1-0.
45
30
-75 ~ -25 0 25 50 7S 100 125 150
TENPERAlURE ("1:)
~
Positive Regulator
Reference Voltage
Stability vs Temperature
50
I:
I
55
I: "
1.0
Negative Regulator
Adjustment Pin
Current vs Temperature
II!
TJi-551"1:
10
20
30
40
INPUT - OUTPUT DIFFERENlIAL (V)
Positive Regualtor
Adjustment Pin
Current vs Temperature
IL = 100mA
1j,=100mA
Q.5
I
TJ=25~rr yo
Negative Regulator
Dropout Voltage
vs Temperature
~
1.0
55
r-. ~ TJi 125"1:
60
I1:, ~
o.I
o
3.5
i
~
o
10
20
30
40
INPUT - OUTPUT DIFFERENTlAL (V)
~3.0
.5
0.2
i"'":'
TJ =-55 "I:
o
10
20
30
40
INPUT - OUTPUT DIFFERENTlAL (V)
TJ=125"1:
Neg. Regulator Output
Current limit vs
I nput-Output Differential
Pos. Regulator Output
Current Limit vs
Input-Output Differential
I
~
10
20
30
40
INPUT - OUTPUT DlFFERENlIAL (v)
TENPERAlURE ("1:)
1M' iP'""-
~
TJr5~+
I
~
jTJ=I25"1:
t
5V
0.3
I I I
I I I
I I I
-
IL=O.IA_
VOU!= 1.2OV
Neg. Regulator Min.
Operating Current vs
Input-Output Differential
-
",
V
TENPERAlURE ("1:)
,
Positive Regulator Min.
Operating Current
vs Input-output Differential
Negative Regulator
Load Regulation
vs Temperature
V
""-
1/
\
1.25
-75 -50 -25 0 25 50 75 100 125 150
TEMPERAlURE ("1:)
1-20
1.22
-75-50-25 0 25 50 75100125150
TEMPERAlURE ("1:)
TL/K/l0127-3
Application Hints
......
LH7001
In operation, the positive regulator develops a nominal
1.25V reference voltage, VREF, between the output and the
adjust terminal (Figure 1). The negative regulator develops
-1.25V. The reference voltage is impressed across program resistor Rt and, since the voltage is constant, a constant current 11 then flows through the output set resistor
R2, giving an output voltage of VOUT = VREF (1 + R2/R1)
+ IADJ (R2)
+VIN
r
:::t:
pos. HALF
+YOUT
+YIN
I:)
I:)
.....
(1)
-
TL/K/l0127-5
Your
7
NEG. HALF
LH7001
(8)
!11
-YIN
-Your
Your
VREF = 1.2SV nominal
TL/K/l0127-4
TLlK/l0127-6
Pinout shown for DIP (TO·S in parenthesis)
Pinout shown for DIP (TO·S in parenthesis)
FIGURE 1. Positive Voltage Regulator
FIGURE 2. Choice of Capacitors for Stable Operation
Since the current from the adjustment terminal represents
an error term, the LH7001 was designed to minimize IADJ
and make it very constant with line and load changes. To do
this, all quiescent operating current is returned to the output
establishing a minimum load current requirement. If there is
insufficient load on the output, the output voltage will rise.
IADJ is typically 50 poA (see graph in Typical Performance
Characteristics).
0.1 pF
IIH
Cl
7 (8)
IN
Stability
8
III-""",..,........w~-I
AOJ
(3)
An input bypass capacitor is recommended for both the
positive and the negative regulator in case the regulator is
more than 6 inches away from the usual large filter capacitor. A 0.1 poF disk or 1 poF tantalum on the inputs is suitable
bypassing for almost all applications. The device is more
sensitive to the absence of input bypassing when adjustment or output capacitors are used, but the above values
will eliminate the possibility of problems.
I
:
~o
:.,,3~
"':
our I !C
•
The positive regulator is stable with no output capacitors.
However, like any feedback circuit, certain values of external capacitance can cause excessive ringing. For the positive regulator these values are between 500 pF and
5000 pF. Additional capacitance on the output will correct
the problem.
To stabilize the negative side, a lossy capacitor of more
than 0.1 poF is needed from the negative output to ground. A
1 poF tantalum or 3.90 in series with a 0.1 poF ceramic will
meet the requirement (Figure 2). However, in some applications, like on the supply voltage for an op-amp, a high grade
bypass capacitor is needed. In this case a lossy ceramic
bead in series with the negative output, followed by 0.1 poF
to ground, is recommended (Figure 3). The bead needs to
be optimized for frequencies around 1 MHz, a Fair-Rite
2673000101 works well.
(6)
IIH
0.1 ",F
TLlK/l0127-7
The negative regulator is stabilized with ferrite bead and C3.
Pinout shown for DIP (TO·S in parenthesis)
FIGURE 3. LH7001 Supplying an Op-Amp
1-21
~
CI
r------------------------------------------------------------------------------------------,
~
Stability (Continued)
Improved Ripple Rejection
...I
A resistor value of 3.90 in series with the output followed by
a 0.1 p.F to ground is another way to suppress oscillations
of the negative regulator, but this is only acceptable where
the load regulation is not critical (Figure 4).
The adjustment terminals on both the positive and the negative regulator can be bypassed to ground to improve ripple
rejection and noise. These bypass capacitors prevent ripple
and noise from being amplified. With 10 p.F bypass capacitors 80 dB ripple rejection is obtainable at any output level.
Increases over 10 p.F do not appreciable increase the ripple
rejection at frequencies above 120 Hz. If bypass capacitors
are used, it is sometimes necessary to include protection
diodes (see next section) to prevent the capacitors from
discharging through internal low current paths and damaging the device (Figure 6).
:J:
CI
IIH
O.lpF
7 (8)
~
II
1-'W........W\~(3):-I
I
!!~~
~ :5
8 ADJ
OUT
TL/K/l0127-11
NEG. HALF
LH700.
C4
3 (6)
IIH
'OpF
0.1 lOr.
G!
-v..
TL/K/l0127-8
The negative regulator is stablized by Rs, C3.
TL/K/l0127-12
'FIGURE 4_ LH7001 Supplying an Op-Amp'
FIGURE 6. LH7001 with Improved Ripple ReJection'
In the current limit mode the negative regulator has a series
sense resistor which separates the device from the load and
its bypass capacitor. A 0.1 ",F ceramic capacitor in series
with 3.90 from the output to ground will suppress oscillations (Figure 5).
Protection Diodes
When external capacitors are used with any IC regulator, it
is sometimes necessary to add protection diodes to prevent
the capacitors from discharging through low current points
into the regulator. Most 10 ",F capacitors have low enough
internal series resistance to deliver 20A spikes when shorted. Although the surge is short, there is enough energy to
damage the device.
.vlN 0--_--=1 ,•
When an output capacitor is connected to a regulator and
the input is shorted, the output capacitor will discharge into
the output of the regulator. Figure 7 shows how to protect
the device with discharge diodes.
TUK/l0127-9
-v,.O-_---=-!
TL/K/l0127-10
RI, CI Stabilize the negative side. lOUT
~
±1.25 V/Rs,
FIGURE 5. LH7001 as Dual Current Limiter'
'Plnout shown for DIP (T0·5 in parenthesis)
1-22
mum performance. The current set resistor connected between the adjustment terminal and the output terminal (usually 2400.) should be tied directly to the output of the regulator rather than near the load. This eliminates line drops from
appearing effectively in series with the reference and degrading regulation. For example, a 15V regulator with
50 mo. resistance between the regulator and load will have
a load regulation due to line resistance of 50 mo. x IL. If the
set resistor is connected near the load the effective line
resistance will be 50 mo. (1 + R2/R1) or, in this case, 11.5
times worse.
Protection Diodes
I-':':':-t---....-o +VOUT
Figure 8 shows the effect of resistance between the regulator and the connection of the set resistor.
TLIKll0127-13
+VOUT
7
(8) ~"""'T-....I (1)
NEG. HALF
R1
LH7001
2400.
R2
TLIK110127-15
FIGURE 8. Positive Regulator with Line
Resistance in Output Lead"
It is easy to minimize the resistance from the case to the set
resistor, by using two separate leads to the output pin. The
ground of R2 can be returned near the ground of the load to
provide remote ground sensing and improve load regulation.
TLIK110127-14
FIGURE 7. LH7001 with Large Capacitive Loads'
The discharge current depends on the value of the capaci·
tor, the output voltage of the regulator, and the rate of decrease of VIN. In the LH7001 the discharge path is through
a large junction that is able to sustain a 2A surge without
being degraded. For output capacitors of 10 J.l.F or less, the
LH7001's ballast resistors and output structure limit the
peak current to a low enough level so that there is no need
to use protection diodes.
The setting resistor is normally chosen to be 2400. The
reference voltage of 1.25V causes a current of 5.2 rnA to
flow, which is much larger than the maximally 100 ",A flowing through the adjustment pin. This makes the regulation
very stable. However, if a smaller set current is desired, the
setting resistor can be increased at the expense of voltage
accuracy, e.g. to 2 ko..
The bypass capacitor on the adjustment terminal can discharge through a low current junction. Discharge occurs
when either the input or output is shorted. When shorts
might occur and the capacitance is in excess of 10 J.l.F discharge diodes are recommended (Figure 6).
Thermal Regulation
When power is dissipated in an IC, temperature gradient
occurs across the chip affecting the individual IC circuit
components. With an IC regulator, this gradient can be especially severe since power dissipation is large. Thermal
regulation is the effect of these temperature gradients on
output voltage (in percentage output change) per Watt of
power change in a specified time. Thermal regulation error
is independent of electrical regulation or temperature coefficient and occurs within 5 ms to 50 ms atter a change in
power dissipation. Thermal regulation depends on IC layout
as well as electrical design. The thermal regulation of a voltage regulator is defined as the percentage change of VOUT,
per Watt, within the first 10 ms atter a step of power is
applied. The LH7002 specification is 0.2 %/W, maximum.
Capacitors
In general, the best type of capacitor to use are solid tantalum. These capacitors have low impedance even at high
frequencies. Depending on capacitor construction, it takes
about 25 J.l.F in aluminum electrolytic to equal 1 J.l.F solid
tantalum at high frequencies. Ceramic capacitors are also
good at high frequencies, but some types have a large decrease in capacitance at frequencies around 5 MHz. For this
reason, a 0.01 J.l.F disk may work better than a 0.1 J.l.F disk
as a bypass.
Load Regulation
The LH7001 is capable of providing extremely good load
regulation, but a few precautions are needed to obtain maxi-
'Pinout shown for DIP
(TO·S in parenthesis)
1-23
....
o
o
""
:J:
...J
Current Limiting and Thermal Protection
Both the positive and the negative regulator protect themselves as well as the loads. They do this by limiting the
current and by a thermal shutdown feature that cuts in
should the temperature in the regulator get too high.
pas. HALF
LH7001
:----~u~11
7
v+
(8)
The current limiting is relatively constant over temperature.
The limit is constant up to about 15V input-to-output differential, then drops (see the graphs in the Typical Performance Characteristics).
ADJ
81 (3)
TLlK/l0127-17
The thermal shutdown will cut the current off as soon as the
thermal sensor reaches typically 162'C. Thus the cut-off depends on the power dissipated in the LH7001 and the thermal resistance:
IMAX
=
NEG. HALF
LH7001
TMAX/RTH (VIN - VOUT)
~
0
"-
~in
~
o.s
1
III
I
--
TLlK/l0127-18
'Pinout shown for DIP (TO·S in parenthesis)
FIGURE 10. Circuit Used to Determine
Dissipation Characteristics'
I
~
'"'"
~
I
~
~
-- - -
NEG. REGUL.
I
I
"0
I
LH7001H
ILIMIT = 100 rnA
TA=25"C
1.0
/-
I
POS. Be NEG. '/
REG."
I.t'
o.s
in
)I'
~
,
1/
\
pas. REGUL.
\
0
0
10
I
I
20
INPUT-To-OUTPUT VOLTAGE DIFFERENTIAL (:tV)
TLlK/l0127-19
FIGURE 11. Dissipated Power of Positive and Negative
Regulator vs In-to-out Voltage Differential in a Typical
LH7001H (TO-S Package)
I I I I
I ''[ I I I
Jo"'I.J I
ILIMIT = 100 rnA fTA=25"C
f-
I.........
1(5)
12.5
Ill-'F
TANTALUM
I
pas. Be NEG./" ....., NEG. REGUL.
I I I I
LH7001CN
II.
1
ADJ
5 (7)
REG. _
'"~
0
I
~----~u~14
(6)
Figure 9 shows the dissipation of the positive and the negative regulator for the DIP package. The conditions are symmetrical as shown in Figure 10. The current through the
regulators is held at a constant ± 100 mAo With increasing
voltage the dissipation in the device increases, and the positive regulator starts to turn off in a pulsed fashion. When the
power is increased further, the positive regulator is OFF and
the negative regulator goes into pulsed thermal shutdown.
Figure 11 shows the same graph for the TO-5 package.
It needs to be mentioned that the LH7001CN in the DIP
package will be protected from catastrophic failure, but if
operated in thermal shutdown frequently or for long durations the thermal shutdown temperature of nominally 162'C,
will reduce the lifetime of the plastic package.
I
I
3
V-
There are also two time constants involved. One is the time
constant of the chip; it is typically 100 ms. The other one is
the time constant of the package; it is typically 20 sec (the
exact value depends on the type of cooling, heatsink, etc.).
This means that for a short time the device can absorb more
power than in a steady state condition.
The thermal protection on each side is independent of the
other. When the protection cuts in, the output current becomes pulse width modulated. In this way the dissipation in
the device is limited. The repetition time can range from
several tens to several hundreds of milliseconds, with the
faster times for the higher overstress. Normally, under symmetrical electric conditions, the positive side will go into
thermal protection before the negative side.
1.0
12.5
1(1)
pas. REGUL. r-
O~~~~~~II_~II~
a
10
20
INPUT-TO-OUTPUT VOLTAGE DIFFERENTIAL (:tV)
TLlK/l0127-16
FIGURE 9. Dissipated Power of Positive and Negative
Regulator vs In-to-Out Voltage Differential
In a Typical LH7001CN (DIP Package)
1-24
r-
::c
c:
Schematic Diagrams
LH7001CN (DIP)
o
.....
LH7001H (TO·5)
+VOUT
+VOUT
+ADJ.
+ADJ.
TL/K/I 0127-22
TUK/l0127-20
-VOUT
-VOUT
-ADJ.
-ADJ.
TL/K/l0127-21
TL/K/l0127-23
For detailed schematic diagrams see LM317L and LM337L datasheets.
Typical Applications
Dual Current Limiter'
Dual Voltage Regulator·
+15V
+V
O.lpF
HII
10pF
IIH
IN
::;!
I ...
C;
ADJI ": ~
n~3
(3)
OUT 1
O.OlpF
II
IIH
I (I)
Ilk
Ik
O.lpF
IIH
100
RUM
OUTPUT
0.01 pF
O.lpF
IIH
100
RLiM
IIH
Cz·
Ilk
10pF
IIH
Ik
4 (5)
3 (6)
OUT 1
-15V
:
ADJ
1
IN
1
(7)
~ C;
~
:~:s
3 (6)
TL/K/I 0127-24
-v
TL/K/l0127-25
'Pinout shown for DIP (TOoS In parenthesis)
1·25
,..
CI
:s~
r-------------------------------------------------------------------~----------__,
Typical Applications (Continued)
Dual Current and Voltage Protection'
IS
IOI---~
Slopt= •
.!
RS
7(8)
VI
-l
V2 Vs
!-1.85V
Diode Voltage Vo ... 0.6V
TL/K/l0127-27
RS = 1.2SV + Vo
10
R, = 1 kO (Chosen)
R2
R2= R'(~- I)
1.25
V, = V2 -loRs
R2
Rl
IN
3(6)
0.11"
HII
TL/K/l0127-26
'Plnout shown for DIP (TO-S In parenthesis)
1-26
Typical Applications
(Continued)
Tracking Regulator·
POS. HALF
LH7001
+V'N 0 - -...---1
O.I}OF
I
_
..- -....-"""T-O +VOUT
.......~_... (1)
5}OF
~TI-P::-T-t-5-k-of.2>/\40('---'
Rl
- l~~~uST
10k
4.7K
R2
10k
~~-<1""'-""-O -VOUT
=
'LOAD 5 rnA MIN.
1 }OF
ITANTALUM
TL/K/l0127-28
Aj
=
LM301A, LM307 or LF13741 Only
Rj, R2
= Matched resistors with good Te tracking
• Pinout shown for DIP (TO·S in parenthesis)
± 10V High Stability Regulator·
POS. HALF
LH7001
+VIN
0--.-----1
O.I}'F
I
1---<1,....-1......- 0
....."""'T_....
+IOVOUT
1:11:
(I)
300k
2k
5:11:
6.9V
u.t 329
2k
5:11:
6.9V
LM 329
300k
1.5k
1:11:
1:11:
1.5k
5 (7)
1:11:
-VIN o--,--~
O.I},F
TL/K/l0127-29
1
~~""'-+--O -IOVOUT
I }OF
ITANTALUt.4
TUK/l0127-30
'Pinout shown for DIP (To.S in parenthesis).
"To trim the output voltages Rj and R2 can be replaced by a series combination of 240a and a 100a potentiometer.
1-27
~
c
,----------------------------------------------------------------------------,
~ ~National
~ ~ Semiconductor
~C!;
LM 104/LM204/LM304 Negative Regulator
.,...
:; General Description
The LM104 series are precision voltage regulators which
can be programmed by a single external resistor to supply
any voltage from 40V down to zero while operating from a
single unregulated supply. They can also provide O.Q1-percent regulation in circuits using a separate, floating bias
supply, where the output voltage is limited only by the
breakdown of external pass transistors. Although designed
primarily as linear, series regulators, the circuits can be used
as switching regulators, current regulators or in a number of
other control applications. Typical performance characteristics are:
.
•
•
•
•
•
The LM104 series is the complement of the LM105 positive
regulator, intended for systems requiring regulated negative
voltages which have a common ground with the unregulated
supply. By themselves, they can deliver output currents to
25 mA, but external transistors can be added to get any
desired current. The output voltage is set by external resistors, and either constant or folilback current limiting is made
available.
The LM104 .is specified for operation over the -55"C to
+ 125"C military temperature range. The LM204 is specified
for operation over the - 25"C to + 85"C temperature range.
The LM304 is specified for operation from O"C to + 70"C.
Subsurface zener reference
1 mV regulation no load to full load
0.01 %IV line regulation
0.2 mVIV ripple rejection
0.3% temperature stability over military temperature
range
Schematic Diagram
ADJUSTMENT
1
9
019
... 018
I~I~
R14
2K
07
R4
14K
~
01
011
rC°
~.,
Rl
2.lK
or
R2
UK
Otz
J
'---4
Dl~
~05
-YOI6
020
~015
--
RS
UK
04
014....
010'"
~O&
~
RI
2.2K
~
2
REFERENCE
1"022
R9 ..
10K
Cl
.....L BOOSTER
OUTPUT
023
RtO
lK
~p~
C2~
R3
7K
Rn
lK
021
",013
6.lV
R15
15K
~ REGULATED
OUTPUT
I
9
k
GROUND
Rl&
15K
Rll
UK
. 6 CURRENT
LIMIT
~
024
Rl1
10K
5 UNREGULATED
INPUT
15pFT
4
COMPENSATION
3
REFERENCE
SUPPL Y
TL/H/n54-1
1-28
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
(Note 6)
LM104/LM204
50V
Input Voltage
Input·Output Voltage Differential
Power Dissipation (Note 1)
Operating Temperature Range
LM104
LM204
LM304
Storage Temperature Range
LM304
40V
50V
40V
500mW
500mW
- 55'C to + 125'C
-25'Cto + 85'C
-65'Cto +150'C
O'Cto +70'C
- 65'C to + 150'C
260'C for plastic
300'C for hermetic
Lead Temperature (Soldering, 10 sec.)
Electrical Characteristics
Parameter
LM304
LM104/LM204
Conditions
Min
Typ
Max
Min
Typ
Units
Max
Input Voltage Range
-50
-8
-40
-8
Output Voltage Range
-40
-0.Q15
-30
-0.035
V
2.0
0.5
50
50
2.0
0.5
40
40
V
V
=
=
Output·lnput Voltage
Differential (Note 3)
10
10
Load Regulation (Note 4)
0,,:: 10":: 20 rnA
Line Regulation (Note 5)
VOUT":: -5V
.Il.VIN = 0.1 VIN
Rsc
Ripple Rejection
20 rnA
5mA
=
150
C19 = 10 fLF, f = 120 Hz
VIN < -15V
-7V ~ VIN ~ -15V
=
1.8
Output Voltage Scale Factor
R2.3
Temperature Stability
Vo":: -lV
Output Noise Voltage
10Hz,,::f,,:: 10kHz
Vo ,,:: -5V, Cl.9 = 0
Cl.9 = 10 fLF
Standby Current Drain
IL
=
2.4k
5 rnA, Vo
Vo
Vo
=
=
=
1
5
1
5
mV
0.056
0.1
0.056
0.1
%
0.2
0.5
0,.5
1.0
0.2
0.5
0.5
1.0
mVIV
mVIV
2.0
2.2
2.0
2.2
V/kO
0.3
1.0
0.3
1.0
%
1.8
0.007
15
0.007
15
0
-30V
-40V
V
1.7
2.5
3.6
5.0
1.7
3.6
%
fLY
2.5
5.0
rnA
rnA
rnA
0.01
1.0
%
Vo":: -1V
0.01
1.0
Note 1: The maximum junction temperature of the LM104 Is 150'0, while that of the LM204 Is 125'0 and LM304 is 100'0. For operating at elevated temperatures,
devices In the Hl00 package must be derated based on a thermal resistance of 150'0/W.lunctlon to ambient, or 45'0/W, Junction to case.
Note 2: These specifications apply for Junction temperatures between - 55'0 and 160'0 (between - 26'0 and 100'0 for the LM204 and 0'0 to +85'0 for the
LM304) and for Input and output voltages within the ranges given, unless otherwise specified. The load and line regulation specifications are lor constantlunctlon
temperature. Temperature drift effecta must be taken Into account separately when the unit Is operating under conditions of high dissipation.
Note 3: When exlernal booster transistors are used, the minimum output·lnput voltage differential Is Increased, In the worst case, by approximately 1V.
Noto 4: Tho output currants glvon, as well as the load regulation. can be Increased by the addition of external transistors. The Improvement factor will be roughly
equal to the composite current gain of the added transistors.
Nole 5: With zero output. the de line regulation Is determined from tho rlpplo rejection. Honea, with output voltagos betwoen OVand - 5V, a de output variation,
determined from the ripple relection, must be added to find the worst·case line regulation.
Nota 6: Refer to RETSt04X drawing for military specifications for the LM104.
Long Term Stability
1·29
Typical Performance Characteristics
Load Regulation
I
>-
I
~.I
.!
I
'0.:jil'}l ~~
,~
-1
.!
Load Regulation
I
I
~
,.5..
~co
~
~
-I
~
,
~
1\
co
•
I
lD
11
2D
-8
I I
Rsc "m
10
20
10
Supply Voltage Rejection With
Preregulated Reference Supply
z
V,,- -IV
~
OM
..c::~
0.02
o
o
10
20
31
0.01
20
DC INPUT VOL TAGE IV)
V!,pp,~. IIV P'~'
f= 128 Hl
l!!
0.4
i
0.2
20
30
40
I
\
50
o
~
11.11
20
10
30
Minimum Input Voltage
8.0
-toU~=I~V
_Rsc' O
~ 11.11
Ii
III G.7
i
~
.
~
0
" 110
21 50 7& 100 115
II
!1i
H
=
~
~
~
...
VO~T' lav
25 50 15 100 125 150
..'"
i..
~
......
..
40
VOUT
.!
.a.V,II- 1V
r\c,•• ,
\os··
~.\
,-c,.-a.o1 "F
"/
-2D
0
8.0
-II -50 -Z5
L
w
Standby Current Drain
~F-
In -lSmA
t.:S6nl
-
,....
\.-"
I
IL
-20
~
-10
"
TIME",,)
21
3D
o
-40
10
TIME I..)
20
-
V,J'-5~V
INL-&mA.._
r\
\
25 50 75 100 125 150
8
-,ov
Ceur"
20
0
JUNCTION TEMPERATURE rC)
Load Transient Response
:>
l:ouT-,,,.F
!co
-so -25
JUNCTION TEMPERATURE I'C)
Line Transient Response
i
....
I--' r-~:5:~~+_
10
-7&
JUNCTION TEMPERATURE I'C)
40
~;;;o;o
L,..oo fo"""
1-1'""
l"oo
IA
-II -10 -21
;-
/
.,., ..p. , /
\~
....
D.I
:I D.I
w
50
40
DC INPUT VOLTAGE IV)
Regulator Dropout Voltage
12
-
-
C,," 10IJ.F
0.6
DC INPUT VOLTAGE IV)
Current LImit Sense Voltage
60
50
40
'"'",.
o
10
1.1
30
Ripple Rejection
I;
!..... "
50
40
I
:>
.! 0.8
.."'"
~
i;:
-I'""
!
".-
1.0
" 0.82
~
iil
a.oc
f~-
LDAD CURRENT ImA)
0.03
\
_.,.1- I-~-
o
40
30
r-
I;;; r- ~I ~r- ~-
I
LOAO CURRENT ImA)
OM
OM
-.,. I -
"" -- --: ~. II--a!
~ - ~ r- I -
-10
D
II
1\
..~
~
I......
LOAD CURREIT \mAl
0.1
~
_~I ...
i -,
~"'"
Rac· un
21
I
10
-6
Supply Voltage Rejection
.
."
i
.....
"""""
-4
OM
.... "111
-4
-2
i.
~.~=r:
I
-3
co
r,o~'c
-2
OM
i..
Current Limiting
30
o
ID
I---"
2D
30
40
OUTPUT VOLTAGE IV)
TLlHI7754-7
1-30
Connection Diagram
Metal Can Package
NC
REG
OUTPUT
REF
REF
SUPPLY
BOOSTER
UNREG
INPUT
TL/H/7754-2
Note: Pin 5 connecled to case.
Top View
Order Number LM104H, LM204H or LM304H
See NS Package H10C
Typical Applications
Operating with Separate Bias Supply
~
____
~,-,,
Basic Regulator Circuit
_____________ GNO
~--------~.----t~--~------GNO
CII
CII
4.1.F
4.1.F
~------------~------~__~~---VOUT'~
l-. .------
VOUT •
S~~
01
2N3140
.....---------4~---4....-------- V'N
tSolid Tantalum
Trim Rl for exact scale factor.
tSolid Tantalum
TL/H/7754-5
TLlHI7754-3
High Current Regulator
Switching Regulator
r-----~----f-----~--_.------GND
~-----9----'---~----~------GND
} - _...._ . ._ _ _ VOUT • -IOV
lOUT <2A
OUT • -SV
>-++-__-.._----- VlOUT
<3A
01
R3
0.2
lN388D
.....--.......---------V,N <-12V
tSolid Tantalum
TLlH/7754-4
RS
41
.....- - - - - - - - - - - - - - - -...-----4....- - - - V,N
< -8.SV
TL/H/7754-6
tSolid Tantalum
'60 turns IF 20 on Arnold Engineering A930157-2 Molybdenum Permalloy Core.
1-31
~National
~ Semiconductor
LM 105/LM205/LM305/LM305A,
LM376 Voltage Regulators
General Description
• DC line regulation guaranteed at 0.03%1V
.• Ripple rejection on 0.01%V
• 45 mA output current without external pass transistor
(LM305A)
The LM105 series are positive voltage regulators similar to.
the LM100, except that an extra gain stage has been added
for improved regulation. A redesign of the biasing circuitry
removes any minimum load current requirement and at the
same time reduces standby current drain, permitting higher
voltage operation. They are direct, plug-in replacements for
the LM 100 in both linear and switching regulator circuits
with output voltages greater than 4.5V. Important characteristics of the circuits are:
• Output voltage adjustable from 4.5V to 40V
• Output currents in excess of 10A possible by adding
external transistors
• Load regulation better than 0.1 %, full load with current
limiting
Like the LM100, they also feature fast response to both load
and line transients, freedom from oscillations with varying
resistive and reactive loads and the ability to start reliably on
any load within rating. The circuits are built on a single silicon chip and are supplied in either an a-lead, TO-5 header
or a 1/4" x 1/4" metal flat package.
The LM105 is specified for operation for -55·C ,;; TA ,;;
+ 125·C, the LM205 is specified for - 25·C ,;; TA ,;; + a5·C,
and the LM305/LM305A, LM376 is specified for O·C ,;; TA
,;; +70·C.
Schematic and Connection Diagrams
Dual·ln·Llne Package
~---...- - - - - _.....- -....- , - UNREGULATED INPUT
CURREIfI
UMIT
REGULATED
DUTPUT
1
2 BDDSIBl DUTPUT
7 CDMPENSATIDN
UNREG
INPUT
3
i
mDIIACK
..." " " _ - CURRENTUMIT
S REFERENCE
BYPASS
GRDUND 4
....._.....;8;.... REGULATED DUTPUT
TUH/7755-2
Top View
...- -....- - - - CDMPENSATIDN
SHUTDDWN
Order Number LM376N
See NS Package Number NOSE
Metal Can Package
REGULATED OUTPUT
CURREN
a
COMPENSATION
LIMIT
I T1.
SHUTDOWN
.J---t--....~i FEEDBACK
L...~--+---""'----REFERENCE BYPASS
L..._~""_""
__""__""________
GRDUND
TL/H/7755-1
Pin connections shown are for metal can.
1-32
·BDDmR
OUTPUT
UNREGULATED
INPUT
.
2
6 FEEDBACK
J
4
S REFERENCE
BYPASS
GROUND
TL/H/7755-3
Top View
Order Number LM105H,
LM205H, LM305H or LM305AH
See NS Package Number HOSC
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
(Note 5)
LM105
LM376
LM205
LM305
LM305A
Input Voltage
50V
50V
40V
50V
40V
Input·Output Differential
40V
40V
40V
40V
40V
Power Dissipation (Note 1)
800mW
800mW
800mW
800mW
400mW
Operating Temperature Range
- 25'C to + 85'C
-O'Cto +70'C
- 55'C to + 125'C
O'Cto +70'C
O'Cto +70'C
Storage Temperature Range
- 65'C to + 150'C
- 65'C to + 150'C
- 65'C to + 150'C
- 65'C to + 150'C
- 65'C to + 150'C
Lead Temperature (Soldering, 10 seconds)
300'C
300'C
300'C
300'C
260'C
Electrical CharEcteristics (Note 2)
Parameter
LM105
Conditions
Min
c"
'"
Typ
LM205
Max
Min
Typ
LM305
Max
Min
Typ
LM305A
Max
Min
Typ
LM376
Max
Min
Typ
Units
Max
Input Voltage Range
8.5
50
8.5
50
8.5
40
8.5
50
9.0
40
V
Output Voltage Range
4.5
40
4.5
40
4.5
30
4.5
40
5.0
37
V
Input-Output Voltage
Differential
3.0
30
3.0
30
3.0
30
3.0
30
3.0
30
V
Load Regulation
(Note 3)
Rsc = 10n, TA = 25'C
0.02
0.05
0.02
0.05
0.02
0.05
%
RSC = 10n, TA = TA(MAX)
0.03
0.1
0.03
0.1
0.03
0.1
%
0.03
0.1
0.03
0.1
0.03
0.1
%
RSC = 10n, TA = TA(MIN)
0,;; 10';; 12 rnA
0,;; 10';; 12 rnA
0,;; 10';; 12 rnA
Rsc = on, TA = 25'C
0.02
0.2
0.2
%
Rsc = on, TA = 70'C
0.03
0.4
0.5
%
0.4
0.5
%
Rsc = on, TA = O'C
0.03
0,;; 10';; 45 rnA
Line Regulation
TA = 25'C
0.03
0.1
O'C,;; TA';; +70'C
Temperature Stability
0';; 10';; 25 rnA
%/V
%/V
VIN - VOUT ,;; 5V, T A = 25'C
0.025
0.06
0.025
0.06
0.025
0.06
0.025
0.06
%N
VIN - VOUT;;' 5V, TA = 25'C
0.015
0.03
0.015
0.03
0.015
0.03
0.015
0.03
%/V
0.3
1.0
0.3
1.0
0.3
1.0
0.3
1.0
%
T A(MIN) ,;; T A ,;; T A(MAX)
9L&Wl/VSO&Wl/S0&Wl/S0~Wl/S0 ~ Wl
II
LM105/LM205/LM305/LM305A/LM376
Electrical Characteristics (Note 2) (Continued)
Parameter
LM105
Conditions
Feedback Sense Voltage
Output Noise Voltage
10Hz:;;;
CREF
CREF
Standby Current Drain
VIN
=
=
=
LM205
LM305
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
1.63
1.7
1.81
1.63
1.7
1.81
1.63
1.7
1.81
1.55
1.7
1.85
1.60
1.72
1.80
0
0.1,..F
30V. T A
=
0.005
0.005
0.005
0.005
0.002
0.002
0.002
0.002
-
10 ,..F.
f
=
Epoxy Dual-In-Line Package
6JA
TO-5 Board Mount
0.8
225
in Still Air
6JA
0.8
2.0
-300
375
225
0.8
2.0
300
375
225
300
mA
mA
2.0
375
225
0.8
2.0
300
375
mA
300
mV
140
0.1
0.1
0.1
0.1
%
0.003
0.003
0.003
0.003
%IV
·C/W
230
230
230
230
·C/W
92
92
92
92
·C/W
25
25
25
25
·C/W
TO-5 Board Mount in
400 LF/Min Air Flow
6JC
%
2.5
120 Hz
6JA
c:.,
"'"
=
%
25·C
= 40V
= 50V
TA = 25·C. Rsc = 10n.
VOUT = OV. (Note 4)
CREF
V
f:;;; 10kHz
Long Term Stability
Ripple Rejection
Units
Typ
VIN
Sense Voltage
LM376
Min
VIN
Current Limit
LM305A
TO-5
Note I: The maximum junction temperatura of the LMI 05 and LM305A is 150"C, the LM205 and LM376 is lOO"C, and the LM305 is S5"C. For operation at elevated temperatures, devices in the HOSC package must be derated based
on a thermal resistance of 16S'C/W junction to ambient or 25'C/W junction to case. For the epoxy dual·in·line peckage, derating is based on a thermal resistance of 13S'C/W junction to ambient Peak dissipations to IW are
allowable providing the dissipetion rating is not exceeded with the power average over a five second interval for the LMI05 and LM205, and averaged over a two second interval for the LM305_
Note 2: Unless otherwise specified, these specifications apply for temperatures within the operating temperature range, for input and output voltages within the range given, and for a divider impedance seen by the feedback terminal
of 2 kll. Load and line regulation specifications are for a constant junction temperature_ Temperature drill effects must be taken into account separately when the unR is operating under condRions of high dissipation.
_ Note 3: The output currents given, as well as the load regulation, can be Increased by the addition of external transistors. The improvement factor will be roughly equal to the composite current gain of the added transistors.
Note 4: Wrth no extemal pass transistor.
Note 5: Refer to RETSI05X Drawing for milRary specifications for the LMI05.
---
Typical Performance Characteristics LM105/LM205/LM305/LM305A
Load Regulation
.
&
~
~
~ t::..-
,
~ ·a.ol
>
~
~
~
-
.,\0..
'1"·1$'1:
R.aD
'
I
I I
-0.13
..
1 1
10
zo
15
. ...
.. ',",set
-0.04
•
lo$5mA
...........
'.3
......
-
-0,1 0
'"
""
i.,..-'
I"
.
--..
~
ZOmA
'j'
'~
IL=5mA
50
-25
0
25
50
J!fI 1110
125
I.'
Hld-H-l-+-+-+-+-i
I.' H-I"IId-l--t--I--t-lH
I.' H+t+t'~,,';..;-I--+--H
!.I
-15 -50 -JS
lD
IL alOmA
. ...,.
0
25
SO
15
..
Minimum Output Voltage
/
1/
"
10
"
~
I'
~
-15 -50 -lS
0
25 50 75100125
TEM'ERATURE lOCI
You,' lOY
lA' zs·c
I'--.. C",-'
_ C •••• ,O"F.
!
0002
I
0001
I,·tnl
100125
10
..
Standby Current Drain
-55·C
...
~
. &- . - "
~.
~'-'
0'·'0
ID
,"
...
...
' 1""'
15"
-r
125"1:
3D
40
INPUT VOLTAGE lVI
50
Transient Response
"'c'llII
.6.V,,,,·5V
LINE
"
20
INPUT OUTPUT VOL lAGE DIFfERENTIAl IVI
1.1
1/
Supply Voltage Rejection
0005
TEMPERATURE I~CI
.
.
50
ZI
aUTPUTVOLTAGE (VI
D.al
I I
I I
,,
H+H-l--l'o.f.3""'".......
d--'H
• lIZ
IL
so
1\t+t+l-,.-,":.:.'r'·,::;,'.:.'V:;''''.''-r--i
....
RIC" Ion
;""
.
3.'
-n 0 15 50 7S 100 US 150
AMBIErIT TEMPERATURE '"C)
VOIJ' : IOV
....
30
Rl11R2 a Z.n
Regulator Dropout Voltage
I
211
3.ro-rrrr------------,
.....
......,....,
10
Optimum Divider Resistance
Values
A.-Uln
A.-IW
•
OUTPUT CURRENT ImAI
1 1
.....
..... 1"
-75 -5D
"
3
-V~u,~4.5~
~f-
Z Rlc.,on I
..
Short Circuit Current
-75 -50
I.'
.
10
• i"""'-Io.. .... ..... ......
A.-zan 1""0 .... ~ ....
•
Minimum Input Voltage
ID
-7f-
',"'U-'::
•
.
I
~-; .~-,
.t- --~
t- -~
•
-u
"
" "-I'
I
T,o·!fIS-C:
,
LOAD CURRENT (mAl
Current Limit Sense Voltage
"-
,
r-T"'5G'CI
LOAD CURRENT ImAI
•
~
~
-1.1I
•
A.·1D~U_
~~
.... ~ .. ..
....
·O.DZ
~
~
1
TI"'SIIC
IT",~ ~
:;
Current Limiting
Characteristics
Load Regulation
. jOUf'I'DV
-c,,-a
___ C..
~11'f
..
.,.,
.... , ..L
1'·0•
so
r--~c·'m
1,,,,20 ...
r 'Vou,tOV
NL.·1.O.A
~
~
10
~
J
30
TL/H17755-6
1-35
Typical Performance Characteristics LM376
Load Regulation
l
z
"
.....~
~
"
>
..
I-
Current Limiting Characteristics
,, ,, ,,
OA
D.3
T.·7rC
.:>
.
~~~
...
0.1
"
I!:
...lE
i!
T.'O C
T.·25', l\
0.2
..
Roc "0
).It
I-
Ii"co
.
1.U0
1.58
>
!;
Ii!
&.I
....
&.l
~
~
I"'"
!
.300
~
.z10
I-
G!
~
15
ZO
25
OUTPUT CURRENT (mA)
.zoo
3G
25
50
70
AMBIENTTEMPERATURE rc)
Regulator Dropout Voltage
.~
1/
~
I-
!!"
&.8
'.5
60
70
Z6
AMIIENTTEMPERATURE rC)
,
Optimum Divider Resistance
3.0
2.9
VOUT = 10V
Roc =IOU
1.. =2amA
....
11.9
11.8
I'
11.7
ih
11.&
1,"IOmA/)f
11.6
11.4 H"jljA/I
.11.3
25
60
70
AMBIENTTEMPERATURE re)
-
~
....
.350
III
I
12.3
122
12.1
12.0
1o~I~A
=ADD
~
I
10
Current Limiting Sense Voltage
lE
...
~
I
I
I
r- I
r- -:
I
30
lE
...
.....
~'I:.n
!::
Vo uT =5V
.~
. I.e
lE
...
T.·7I1"CT.-25'CT.-II"C
o.l6
Minimum Input Voltage
7.3
7.z
7.1
7.0
, ,,
,
0.21
S
ill
~10
20
LDAD CURRENT (mA)
,
,
.
~
l!I
Ii
Ii
~
2.B
2.7
2.6
2.1
Z.4
2.3
2.2
2.1
2.0
R1 ·'·11 Vo K"
R2·~~l.;Z
Vo= 1.12. (.:; + ~
\
~
r-.1'
5101620Z53D36
OUTPUT VOLrAGE (V)
Standby Current Drain
Supply Voltage Rejection
TA = 25"C
2.00
1.16
C 1.10
~0.03G
i
1.10
Vo= tOY
B us
1.15
.. 1.80
1.51
1.50
i-"'
f~
~p.- ~;::-rOil~
15
20 Z5
30
35
INPUT VOLTAGE (V)
a
..
,--- ~."'18Il
.aV1N -IV
Roc -10"
Your-'Oy
-CL-O
.... C,·I.F
,..,.. , ....
J
1, .. -20mA
INI. ·'.0mA
YOuT • tOV
...
LOAD
10.010
40
,
LINE,
~
~0.011
..
.J,...i-"'
10
IZOH,
CREF-
i\
: o.uza
~
= 1.70
!
Ii IJ.IIZ6
:5
-
Transient Response
zaac
i!;
.! 1.15
40
YOUT-1OV
TA •
I
6
10
II
ZO
26
30
INPUT·OUTPUTVOLTAOE OIFFERENTIAL (V)
10
I
ZI
TIME..,,)
3G
TL/H17755-7
1·36
r-
s:::
.....
c
Typical Applications
10A Regulator with Foldback Current Limiting
U1
......
r-
C3t
s:::
•
N
C
3.3~F ..,..
lBV
....L
~
r-
s:::
Q3
2N3772
Co)
c
U1
......
r-
s:::
Co)
c
~
rC4t
4.7 ~F
s:::
J;:
Co)
~
VIN
TLlH17755-4
1.0A Regulator with Protective Diodes
02t
UTR330S
r---I.---"'--4~----~t---'-"'-VOUT - 2BV
Cl
R3
0.2
•
4.7~F
3SV
01*
Rl
UTR330S
31K
1%
~~13K
1%
VIN - - . - -. .- - _ - - '
tPToteelS against shorted Input aT IndUelive leads on
unregulated supply.
'ProteelS against input voltage reversal.
*Protects against output voltage reversal.
C3
l~F
35V
TLlH17755-5
Linear Regulator with Foldback Current Limiting
Current Regulator
r--------------.....
--~~-- V,N
r--<.......,..,.,......- - - - - -....- -..... ~8:rm~ lSV
Rl
16.7K
ct
47pF
1%
C2
1_ '"F
ro-......- ...
Cl
47pF
V,. > lSV .....-+-ooA
R2
2K
Rl
1.8
2W
10UT- IA
TLIHI7755-B
TLIH17155-9
1·37
Typical Applications (Continued)
Shunt Regulator
DI
INl821
l.lV
"I
11.1K
)--4--+--.1%
R2
2.44K
1%
TLlH17755-10
Basic Positive Regulator with Current Limiting
Switching Regulator
".
"'
2M
I-<~-""'- VOUT "" 1.72
r-+'""-r-""?----t-.--..-.....,~ VOUT .,. 5V
01
VUllO
R1 ;2R2
v
v"
32'
Isc""-mA
Rsc
VIN> 8.5V
02
tSolid tantaium.
:~K
*125 turns ~22 on Arnold
Engineering A262123-2
molybdenum perm ally
core.
TL/H/7755-12
TL/H/7755-11
1.0A Regulator with Protective Diodes
02'
UTR3lDS
...
r-----t.---~~-~
...
--~
~~~I--VOUT "'2aV
01
t
UTR330S
C2
41pF
tProtects against shorted
input or inductive loads on
unregulated supply.
V'N-"-~""----4
·Protects against input
voltage reversal.
"2
2.13K
*Protects against output
1%
voltage reversal.
TLlH17755-13
Linear Regulator with Foldback Current Limiting
R4
S
r--~...--.l\JI/II---. .---.--.-~ggr~
15V
"'
43
lM:J1&
VIN> 1av
"2
R3
2,27K
510
1%
TL/H/7755-14
1-38
.-------------------------------------------------------------ir
3:
.....
Q
~National
U)
~ Semiconductor
"r
3:
Co)
Q
LM109/LM309 5-Volt Regulator
U)
General Description
The LM109 series are complete BV regulators fabricated on
a single silicon chip. They are designed for local regulation
on digital logic cards, eliminating the distribution problems
association with single-point regulation. The devices are
available in two standard transistor packages. In the solidkovar TO-B header, it can deliver output currents in excess
of 200 mA, if adequate heat sinking is provided. With the
TO-3 power package, the available output current is greater
than 1A.
The regulators are essentially blowout proof. Current limiting
is included to limit the peak output current to a safe value. In
addition, thermal shutdown is provided to keep the IC from
overheating. If internal dissipation becomes too great, the
regulator will shut down to prevent excessive heating.
Considerable effort was expended to make these devices
easy to use and to minimize the number of external components. It is not necessary to bypass the output, although this
does improve transient response somewhat. Input bypassing is needed, however, if the regulator is located very
far from the filter capacitor of the power supply. Stability is
also achieved by methods that provide very good rejection
of load or line transients as are usually seen with TTL logic.
Although designed primarily as a fixed-voltage regulator, the
output of the LM1 09 series can be set to voltages above BV,
as shown. It is also possible to use the circuits as the control element in precision regulators, taking advantage of the
good current-handling capability and the thermal overload
protection.
Features
• Specified to be compatible, worst case, with TTL and
DTL
• Output current in excess of 1A
• Internal thermal overload protection
• No external components required
Schematic Diagram
r-----.-----~--~----_.--------~--.--INPUT
R14
0.3
zr----------_.--+-----1--------i--OUTPUT
412
04
6.3V
L---+---~--~---4--~----~--+_--~-GROUND
TL/HI7'3B-'
1-39
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 3)
Input Voltage
Power Dissipation
Operating Junction Temperature Range
- 55'C to
LM109
LM309
Storage Temperature Range
35V
Internally Limited
O'C to
-65'C to
Lead Temperature (Soldering, 10 sec.)
+ 150'C
+ 125'C
+ 150'C
300'C
Electrical Characteristics (Note 1)
Parameter
LM109
Conditions
= 25'C
Output Voltage
Tj
Line Regulation
Tj = 25'C
7.10V,;; VIN ,;; 25V
Load Regulation
TO-5 Package
TO-3 Package
Tj = 25'C
5 mA ,;; lOUT';; 0.5A
5 mA,;; lOUT';; 1.5A
Output Voltage
7.40V ,;; VIN ,;; 25V,
5 mA ,;; lOUT';; IMAX,
P < PMAX
Quiescent Current
7.40V ,;; VIN ,;; 25V
Quiescent Current Change
7.40V ,;; VIN ,;; 25V
5 mA ,;; lOUT';; IMAX
Output Noise Voltage
TA = 25'C
10Hz';; f ,;; 100 kHz
Tj
Max
Min
Typ
Max
4.7
5.05
5.3
4.8
5.05
4.0
50
4.0
15
15
50
100
15
15
4.6
5.4
5.2
4.75
10
5.2
0.5
0.8
= 25'C
Units
Typ
Long Term Stability
Ripple Rejection
LM309
Min
5.2
V
50
mV
50
100
mV
mV
5.25
V
10
mA
0.5
0.8
mA
mA
40
40
/LV
10
20
mV
50
50
dB
Thermal Resistance,
(Note 2)
Junction to Case
'C/W
15
TO-5 Package
15
2.5
2.5
'C/W
TO-3 Package
Note 1: Unless otherwise specified, these specifications apply -SS'C os; Ti os; + 1S0'C for the LM109 and O'C os; Ti os; + 12S'C for the LM309; VIN ~ 10V; and
lOUT ~ 0.1A for the TO-39 package or lOUT ~ O.SA for the TO-3 package. For the TO-39 package, IMAX ~ 0.2A and PMAX ~ 2.0W. For the TO-3 package, IMAX
~ 1.0A and PMAX ~ 20W.
Note 2: Without a heat sink, the thermal resistance of the TO-39 package is about lS0'C/W, while that of the TO-3 package is approximately 3S·C/W. With a heat
sink, the effective thermal resistance can only approach the values specified, depending on the efficiency of the sink.
Note 3: Aefer to AETSf09H drawing for LM109H or AETSf09K drawing for LM109K military specifications.
Connection Diagrams
Metal Can Packages
GND
OUTPUTA~(CASEI
~OUTPUT
2
•
,,0
GND
..'''~''''''
'
TLlH17138-3
Order Number LM109K STEEL or LM309K STEEL
See NS Package Number K02A
Order Number LM109H or LM309H
See NS Package Number H03A
For Aluminum Package
Order Number LM309K
See NS Package Number KC02A
1-40
Application Hints
a. Bypass the Input of the LM109 to ground with;:;: 0.2 "F
ceramic or solid tantalum capacitor if main filter capacitor
is more than 4 inches away.
f. Preventing latchoff for loads connected to negative
voltage:
If the output of the LM109 is pulled negative by a high current supply so that the output pin is more than 0.5V negative
with respect to the ground pin, the LM1 09 can latch off. This
can be prevented by clamping the ground pin to the output
pin with a germanium or Schottky diode as shown. A silicon
diode (1 N4001) at the output is also needed to keep the
positive output from being pulled too far negative. The 100
resistor will raise + VOUT by ;:::; 0.05V.
b. Use steel package instead of aluminum if more than
5,000 thermal cycles are expected. (AT;:;: 50'C)
c. Avoid insertion of regulator into "live" socket if input
voltage is greater than 10V. The output will rise to within
2V of the unregulated input if the ground pin does not
make contact, possibly damaging the load. The LM109
may also be damaged if a large output capacitor is
charged up, then discharged through the internal clamp
zener when the ground pin makes contact.
d. The output clamp zener is designed to absorb transients only. It will not clamp the output effectively if a
failure occurs in the internal power transistor structure.
Zener dynamic impedance is ;:::; 40. Continuous RMS
current into the zener should not exceed 0.5A.
LM109
t-.......----,r----....-+VOUT
02
lN4UOl
~
I
.
I
I
e. Paralleling of LM109s for higher output current is not
recommended. Current sharing will be almost nonexistent, leading to a current limit mode operation for devices
with the highest initial output voltage. The current limit
devices may also heat up to the thermal shutdown point
(;:::; 175"C). Long term reliability cannot be guaranteed
under these conditions.
:COM--_....- -....- .
I-VIN
1-...-----4~--VOUT
TLlH/7138-7
Crowbar Overvoltage Protection
Input Crowbar
+VIN
Output Crowbar
.I--_-+VoUT
t - -...- .......--+VOUT
+VIN
Rl
50
Rl
50
TL/HI7138-8
TLlH/7138-9
·Zener is internal to LM109.
·"'Q1 must be able to withstand 7A continuous current if fusing is not used at regulator input. LM109 bond wires will fuse at currents above 7A.
"l"Q2 is selected for surge capability. Consideration must be given to filter capacitor size, transformer impedance, and fuse blowing time.
ttTrip point is '" 7.SV.
1-41
Typical Performance Characteristics
. Maximum Average
Power Dissipation (LM.309K)
Maximum Average
Power Dissipation (LM109K)
M~--r---r---r---~-,
M~~~-r~~~r-T-~
."
201---~--+-~t----f----1
Output Impedance
101 VIN'10V
. ~IL'200mA
~ 100
g
CL-4.7.F ~
TANT LUM"
;::
SOLID
::
!
I
liD
A11IIENTTEMPERATURE rCI
21
10
7&
IDO
AMBIENTTEMPERATURE I'CI
100
121
1M
1k
10k
11I0I0
FREQUENCY IHzI
TL/HI7138-10
Maximum Average
Power Dissipation (LM109H)
Maximum Average
Power Dissipation (LM309H)
Ripple Rejection
120
VIN.\OV
.VIN· 3 V.·.
Ti' Z5 jC
100
i
_,f" ~""
z
"
!;i
..
I
0
i
0
o.B
';:;
'I
~lmA
. ...
IL':I\
0
OA
O~~~~~~~~~
-50 -21
0 21 10 75 100 125 liD
AMBIENT TEMPERATURE I'CI
I
20
10
100
Ik
10k
lOOk
FREQUENCY IHzI
AMBIENT TEMPERATURE I'CI
1M
TLlHI7138-11
Current Limit
Characteristics (Note 1)
Thermally Induced Output
Voltage Variation
5
I 2~-;
Ripple Rejection
0
3
__
D
~'~~__+-__r-4
"\..
V
I
" ..........
0
VIN -IOV
TI'21'C
l'II°Hz
0~1--~'0~-I~I--~H~~21~~3~0~3-1
B0
INPUT·OUTPUT VOLTABE IVI
o
0.1
1.0
OUTPUT CURRENT tAl
u
TLlH17138-12
Note 1: Current limiting foldback characteristics
are determined by input output dlfferen·
tial, not by output voltage.
1·42
Typical Performance Characteristics
2.5
_
lE
I..
2.0
1.5
;;
~
1.0
~
U
~
Input-Output Differential (V)
.;:~
Output Voltage (V)
I
&.21
IL"IIA
1.010
-::s=
.....;;~ ~
IL·IOmA
Output Voltage (V)
5.075
---
ILJIA
(Continued)
Tj"rl'C
&.15
lE
~ 5.025
!
:---. .::: ......
-
~
§&.05
Ti'I~C
5.000
g~ 4.950
......
.".
">
TI'-15'C
;: •.976
ILtOI';-
VIN"IDV
IL"&IIIA
~4.l15
II
4.15
4.925
~VOU~"IIOOmr
0
-75 -50 -2&
0
I
4.900&
25 50 71100126 150
7
8
INPUT VOLTAGE (VI
JUNCTION TEMPERATURE (OC)
4.7!75 -50 -2& 0 25 &0 7& 100 IZ& 160
JUNCTION TEMPERATURE ('CI
9
TL/H17138-13
Quiescent Current
5.3
...
/'
oS
I§
5.1
-r--. .'\
Quiescent Current
5.4
......
VIN" IOV
..iii .
u
IL' 0
/--
~
\,,~
::l 4.9
Output Voltage Noise
-
I
1.0
TJ--SSOC
'".,.
NOISE OENSI
i
5.1
iii
-
TI-15D'C
4.8
4.7
100
:;
.3
~ 4.9
4·~7& -50 -25 0 25 &0 75100125 150
Ti- z5°e
~>
~ 5.0
~~
~
A ~
..ssz
~
IL'I
Tj"2&'C
/1---"
5
10
JUNCTION TEMPERATURE ('CI
10
0.1
~
I-- f - I -
TOT L
I
l-
3D
25
15 20
INPUT VOLTAGE (VI
35
0.01
10
40
100
Ik
Et
10k
UIzI
.
i
~
I
10l1li
FREnUENCY/BAN~WlDTH
TL/H17138-14
Line Transient Response
Load Transient Response
~i
15
CL"'O.lpF
VIN"IOV
1> 10
E
Tj'2S'C
1>'" &
co"
>;:
:1>
=~
SQ-IDD
-"
~~
....
~~
....=>"
"co
~~
»
~S
s
~z 200
~~
IL"IA
0
•&
rr. .... ...
U IL-SmA
-10
IL. ."
1\
TJ-ZioC
0
1/
lj"'
!:II.§. 400
1.0
;:!li
~VIN"IV
r:~ 200
0.5
0
t-- rCL"D.I.F
::t§
0
CO"
I
2
3 4
TIME ""I
&
0
t,-.,-100",
I
0
I
2
3 4
TIME Ilol
&
8
TL/H17138-15
1·43
en
~
:!l
....en
....
::E
.-------------------------------------------------------------------------------~
Typical Applications
Fixed 5V Regulator
Q
.....
INPUT --4.......;01
I-=-_.__
tl*
Adjustable Output Regulator
OUTPUT
INPUT--t"--"4
·~Y
HI
~~O SY =YOUT .. 2.SV
Cl
C2 ~ 1.000F t
1.0""
SOLID
TANTALUM
~-4"--OUTPI/T
0.22 p.f
SOLID
H2
TANTALUM
lK
TL/H17138-4
TL/HI7138-2
'Required If regulalor Is localed more lhan 4" from power supply filter ca·
pacltor.
tAlthough no output capacitor is needed for stability, "does Improve transient response.
C2 should be used whenever long wires are used to connect to the load, or
when transient respense is critical.
Nole: Pin 3 electrically connected to case.
High Stability Regulator'
OUTPUT
f---------~~--------------------~~---10V
'--'T.:"-'"
$tA
R2
6K
.005%
Rct
510
0.2%
Ql
lNI29
6.2V
'Regulation better than 0.01 %, load, line and temperature, can be obtained.
tDetermlnes zener current. May be adjusted to minimize thermal drift.
TL/HI7138-5
*Solld tantalum.
Current Regulator
INPUT--t~...:.t
Ct
O.22_F
1
Hl*
'----.--OUTPUT
TL/H17138-6
'Determines output currenl. If wirewound reslslor Is used, bypass wllh 0.1 "F.
1-44
~National
~ Semiconductor
LM117A/LM117/LM317A/LM317
3-Terminal Adjustable Regulator
General Description
The LM117 series of adjustable 3-terminal positive voltage
regulators is capable of supplying in excess of 1.5A over a
1.2V to 37V output range. They are exceptionally easy to
use and require only two external resistors to set the output
voltage. Further, both line and load regulation are better
than standard fixed regulators. Also, the LM 117 is packaged
in standard transistor packages which are easily mounted
and handled.
The LM117 series devices with a "K" suffix are packaged in
standard TO-3 transistor packages, while those with an "H"
suffix are in a solid Kovar-base TO-39 transistor package.
The LM117A and LM117 are rated for operation from
-55'C to + 150'C, the LM317A from -40'C to +125'C,
and the LM317 from O'C to + 125'C. The LM317AT and the
LM317T are available in a TO-220 plastic package and the
LM317MP in a TO-202 plastic package.
In addition to higher performance than fixed regulators, the
LM117 series offers full overload protection available only in
IC's. Included on the chip are current limit, thermal overload
protection and safe area protection. All overload protection
circuitry remains fully functional even if the adjustment terminal is disconnected.
For applications requiring greater output current, see LM150
series (3A) and LM138 series (5A) data sheets. For the negative complement, see LM137 series data sheet.
LM117 Series Packages and Power Capability
Part Number
Suffix
Normally, no capacitors are needed unless the device is
situated more than 6 inches from the input filter capacitors
in which case an input bypass is needed. An optional output
capacitor can be added to improve transient response. The
adjustment terminal can be bypassed to achieve very high
ripple rejection ratios which are difficult to achieve with standard 3-terminal regulators.
Besides replacing fixed regulators, the LM117 is useful in a
wide variety of other applications. Since the regulator is
"floating" and sees only the input-to-output differential voltage, supplies of several hundred volts can be regulated as
long as the maximum input to output differential is not exceeded, i.e., avoid short-circuiting the output.
Also, it makes an especially simple adjustable switching regulator, a programmable output regulator, or by connecting a
fixed resistor between the adjustment pin and output, the
LM117 can be used as a precision current regulator. Supplies with electronic shutdown can be achieved by clamping
the adjustment terminal to ground which programs the output to 1.2V where most loads draw little current.
Package
Rated
Power
Dissipation
Design
Load
Current
K
TO-3
20W
1.5A
H
TO-39
2W
0.5A
T
TO-220
20W
1.5A
MP
TO-202
2W
0.5A
Features
• Guaranteed 1 % output voltage tolerance
(LM117A, LM317A)
• Guaranteed max. 0.01 %IV line regulation
(LM117A, LM317A)
• Guaranteed max. 0.3% load regulation
(LM117A, LM117)
• Guaranteed 1.5A output current
• Adjustable output down to 1.2V
• Current limit constant with temperature
• 100% electrical burn-in
• 80 dB ripple rejection
• Output is short-circuit protected
Typical Applications
Digitally Selected Outputs
1.2V-25V Adjustable Regulator
LMtt7
LMm
VIN~ZI'vmIN
~VDUTtt
AD'
YOUT
•,.
T',!" :.!
I
~:':
....,
"M
VIN-----tV,N AD/DUTI---.... VDUT
,..
RI
;~.,t
.,..
TL/H/S063-1
Full ou1put current not available at high Input-output voltages
'Needed If device Is more than Blnches from filter capacitors.
tOptional-improves transient response. Output capacitors In the range of
1 I'F to 1000 I'F of aluminum or tantalum electrolytic are commonly used
to provide improved output Impedance and rejection of transients.
ttVOUT
= 1.2SV ( 1 +~)
~
RZ·
+IADJ(R21
~~~~
.,;..._,;...-.-I._I_.....J1,
INPUTS
TL/H/S063-2
'Sets maximum VOUT
1-45
*
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 2)
Power Dissipation
Internally Limited
Input-Output Voltage Differential
+40V, -0.3V
Storage Temperature
- 65·C to + 150·C
Lead Temperature
Metal Package (Soldering, 10 seconds)
300·C
260·C
Plastic Package (Soldering, 4 seconds)
ESD Tolerance (Note 5)
3kV
Operating Temperature. Range
LM117A1LM117
LM317A
LM317
-55·C
-40·C
O·C
s: TJ s:
s: TJ s:
s: TJ s:
+ 150"C
+ 125·C
+ 125·C
Preconditioning
Thermal Limit Burn-In
All Devices 100%
Electrical Characteristics
Specifications with standard type face are for TJ = 25·C, and those with boldface type apply over full Operating Temperature Range. Unless otherwise specified, VIN - VOUT = 5V, and lOUT = 10 mA. (Note 3)
Parameter
Reference Voltage
3V s: (VIN - VOUT) s: 40V,
10 mA s: lOUT s: IMAX, P s: PMAX
Line Regulation
3V
s: (VIN
- VOUT)
s: lOUT s:
Load Regulation
10 mA
Thermal Regulation
20 ms Pulse
Min
Typ
Max
1.238
1.250
1.262
1.225
1.250
1.270
s: 40V (Note 4)
IMAX (Note 4)
10 mA s: lOUT s: IMAX
3V s: (VIN - VOUT) s: 40V
Temperature Stability
TMIN
Minimum Load Current
(VIN - VOUT)
= 40V
Current limit
(ViN - VOUT)
K Package
H Package
s:
(VIN - VOUT)
KPackage
H Package
= 40V
10Hz s: f
VOUT = 10V,f
CADJ = 0 p,F
= 120Hz,
VOUT = 10V, f
CADJ = 10p,F
= 120 Hz,
Thermal Resistance,
Junction-to-Case
Thermal Resistance, Junctionto-Ambient (No Heat Sink)
Units
Max
V
1.20
1.25
1.30
V
0.005
0.Q1
0.Q1
0.02
%/V
0.01
0.02
0.02
0.05
%/V
0.1
0.3
0.1
0.3
%
1
0.3
1
%
0.07
0.03
0.07
%/W
50
100
50
100
p,A
0.2
5
0.2
5
p,A
3.5
5
3.5
5
mA
1.5
0.5
2.2
0.8
3.4
1.8
1.5
0.5
2.2
0.8
3.4
1.8
A
A
0.3
0.15
0.4
0.2
0.3
0.15
0.4
0.2
A
A
0.003
0.003
%
85
65
dB
80
dB
1
%
1
15V
RMS Output NOise, % of VOUT
TJ
Typ
0.3
s: TJ s: TMAX
Ripple Rejection Ratio
Long-Term Stability
Min
0.03
Adjustment Pin Current
Adjustment Pin Current Change
LM117
LM117A
Conditions
s: 10kHz
66
= 125·C, 1000 hrs
80
68
0.3
1
0.3
1
%
K Package
H Package
2.3
12
3
15
2.3
12
3
15
·C/W
·C/W
K Package
H Package
35
140
1-46
35
140
·C/W
·C/W
r-
Electrical Characteristics (Continued)
Specifications with standard type face are for TJ = 25'C, and those with boldface type apply over full Operating Temperature Range. Unless otherwise specified, VIN - VOUT = 5V, and lOUT = 10 mA. (Note 3)
Parameter
LM317A
Conditions
Reference Voltage
SV ~ (VIN - VOUT) ~ 40V,
10 mA ~ lOUT ~ IMAX, P ~ PMAX
Line Regulation
SV ~ (VIN - VOUT) ~ 40V (Note 4)
Load Regulation
10 mA ~ lOUT ~ IMAX (Note 4)
Thermal Regulation
Typ
Max
1.2S8
1.250
1.262
1.225
1.250
1.270
0.005
20ms Pulse
Adjustment Pin Current
%/V
.......
0.01
0.02
0.02
0.07
%/V
0.1
0.5
0.1
0.5
%
.........
0.3
1
0.3
1.5
%
0.04
0.Q7
0.04
0.07
%/W
50
100
50
100
",A
0.2
5
0.2
5
",A
3.5
10
3.5
10
mA
3.4
1.8
1.5
0.5
0.5
2.2
0.8
0.8
3.4
1.8
1.8
A
A
A
0.15
0.Q75
0.Q75
0.4
0.2
0.2
A
A
A
O.OOS
O.OOS
%
65
65
dB
80
dB
Current Limit
(VIN - VOUT) ~ 15V
K and T Package
H Package
P Package
1.5
0.5
2.2
0.8
(VIN - VOUT) = 40V
K and T Package
H Package
P Package
0.15
0.075
0.4
0.2
~
=
120 Hz,
VOUT = 10V, f
CADJ = 10 ",F
=
120 Hz,
=
f
~
10 Hz
Long-Term Stability
TJ
Thermal Resistance, Junctionto-Case
K Package
Thermal Resistance, Junctionto-Ambient (No Heat Sink)
1
10 kHz
66
125'C, 1000 hrs
H Package
TPackage
P Package
K Package
1
80
66
%
O.S
1
0.3
1
%
2.3
12
4
3
15
5
2.3
12
4
7
3
15
'C/W
'C/W
'C/W
'C/W
35
140
50
H Package
TPackage
P Package
35
140
50
80
'C/W
'C/W
'C/W
'C/W
Note I: Absolute Maximum Ratings Indicate limits beyond which damage to the device may occur. Operating Ratings Indicate conditions for which the device Is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions. see the Electrical Characteristics.
The guaranteed specifications apply only for the test conditions listed.
Note 2: Refer to RETSI17AH drawing for the LM117AH. the RETS117H drawing for the LM117H, the RETSI17AK drawing for the LM117AK, or the RETSI17K for
the LM117K military specifications.
Note 3: Although power dissipation Is Internally limited, these specifications are applicable for maximum power dissipations of 2W for the T0-39 and TO·202. and
20W for the TO·3 and TO·220. IMAX is I.SA for the TO-3 and TO-220 packages and O.SA for the TO-39 and TO-202 packages. All limits (I.e., the numbers in the
Min. and Max. columns) are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 4: Regulation is measured at a constant juncUon temperature, using pulse testing with a low duty cycle. Changes In output voltage due to heating effects are
covered under the specifications for thermal regulaUon.
Note 5: Human body model, 100 pF discharged through a 1.5 kn resistor.
1-47
....
0.04
(VIN - VOUT)
1.20
.......
ri!l:
Co)
0.Q1
TMIN ~ TJ ~ TMAX
VOUT = 10V, f
CADJ = O",F
V
0.01
Minimum Load Current
Ripple Rejection Ratio
Units
Max
V
Temperature Stability
40V
Typ
1.30
10 mA ~ lOUT ~ IMAX
SV ~ (VIN - VOUT) ~ 40V
RMS Output Noise, % of VOUT
Min
1.25
Adjustment Pin Current Change
=
LM317
Min
........i!l:
~ri!l:
....
....
.....
~
r-
i!l:
Co)
Typical Performance Characteristics
Output Capacitor = 0 p.F unless otherwise noted
Load Regulation
0.2
..
Ii
.a:
."~
..~
60
Il . lo.5A -
~
z
~
Adjustment Current
Current Limit
i
~ .....
-02
i
IDUT=I.s'A'.,
-0.4
I-
55
/"
50
/
I-
z
;a
> -0.6
I-
~~U~ ~5~OY-
-0.1 -
1··1
"
1
45
V
40
i
l5
-75 -50 -25 0 25 50 75 100 125 ISO
-1.0
-15 -&0 -25 D 25 50 75 100 125 150
INPUT~DUTPUT DIFFERENTIAL IVI
TEMPERATURE rCI
Dropout Voltage
TEMPERATURE I-C)
Temperature Stability
Minimum Operating Current
4.5
1.260
4.0
;;
:; 1.250
~..
"/
.......
"""
~ 1.240
"
.!l
!;;
..
r-...
~
1l
I-
\
ill
ffi
~ 1.230
1.0 L-L--L--.l..-.l..-:.:....~..........l..~
-75 -60 -25
25 50 75 lDO 125 150
~
;;
Ripple Rejection
I
CAOJ·,....,
t;
60
..
4D
~
;;:co
\
~
YIN-VOUT' 5V
t
0:
t
lour """ 600 RIA
0:
20 -'-120H.
Ti- 2n
o
o
10
15
t;
60
..
... ~ ~J'~
;;:
i
80
20
3D
25
Ik
=~
S laD
~z
§:!
I-C
~
.. .
~s -0.5
CAOJ" 0
,.
I-~
!
,.
ci·
1.0
0.5
-1.0
A
10k
I!',
t;
;;:co
~
t0:
lOOk
CADI' I....,
~~
f~i
!!Sc
II
100
Il
I.
FREGUENCY IH.I
lDOk
1= 120Hz
0.01
=
1M
>-
~$
=:1:::
il:"
Tj·25·C
5
I-
~co
1.0
0.5
."
1l
zo
TIME....,
- f-
~
SOmA
10
I
......
==~
If
3D
40
10
0.1
OUTPUT CURRENT IAI
Load Transient Response
,,-
>j!i
10-3
VIN -15V
VoUT-l0Y
20
~
-1.5
I-
10-Z
~ADJ'O
40
Ti=25·~111
l~L-O,CADJ-O
loUT
~
i.-"
60
o
1M
C~DJ ~ I~F
VDUT~'0~
40
CADI-Io,.F
z
Line Transient Response
~
lO
\\\\\\
FREOUENCY 1Hz)
1.6
20
. -
........
100
10
:!!
"'\.
10
l5
I
o
m 10
~~
Output Impedance
..S
~
1.0
0.5
Ripple Rejection
20
o
101
~ 10-1
1.5
100
lOUT - 500mA
I'""""'--. \
"'\.\
40
~:'5O'C
INPUT -OUTPUT DIFFERENTIAL IVI
.......CADJ.IO"F VIN -15V
~ YOUT-IOV
/
Tj-25'C
/ / .........CADJ" 0 '\:
OUTPUT YOLTAOE IVI
...
I
.. '"
~Tj-Z5"C
~ P"
Ripple Rejection
100
z
2.0
TEMPERATURE rCI
100
.
2.5
o
1.220
-75 -50 -25 0 25 50 75 100 IZ5 150
TEMPERATURE I"CI
;
TII'-5~: ~
l.5
l.O
Z
"
10
-
~
-I
-2
-l
1.6
1.0
0.5
0
I I I
Ct-O,CA~J-~ -
I...., !-:- ~ ~i:L • M, CADJ'
VIN-15V
Vour 'IDV
V
INL "'SOmA
TJ.ZS·C
I
II
1\ 1 1
1\ I I
lD
2B
lO
40
TlME"'1
TL/H/9063-4
1-48
Application Hints
In operation, the LM117 develops a nominal 1.25V reference voltage, VREF, between the output and adjustment terminal. The reference voltage is impressed across program
resistor R1 and, since the voltage is constant, a constant
current 11 then flows through the output set resistor R2, giving an output voltage of
VOUT = VREF (1
tween 500 pF and 5000 pF. A 1 /LF solid tantalum (or 25 /LF
aluminum electrolytic) on the output swamps this effect and
insures stability. Any increase of the load capacitance larger
than 10 /LF will merely improve the loop stability and output
impedance.
Load Regulation
The LM117 is capable of providing extremely good load regulation but a few precautions are needed to obtain maximum performance. The current set resistor connected between the adjustment terminal and the output terminal (usually 2400) should be tied directly to the output (case) of the
regulator rather than near the load. This eliminates line
drops from appearing effectively in series with the reference
and degrading regulation. For example, a 15V regulator with
0.050 resistance between the regulator and load will have a
load regulation due to line resistance of 0.050 x IL. If the
set resistor is connected near the load the effective line
resistance will be 0.050 (1 + R2/R1) or in this case, 11.5
times worse.
+ :~) + IADJR2
LMll1
Figure 2 shows the effect of resistance between the regulator and 2400 set resistor.
LMll1
TL/H/9063-5
FIGURE 1
Since the 100 /LA current from the adjustment terminal represents an error term, the LM117 was designed to minimize
IADJ and make it very constant with line and load changes.
To do this, all quiescent operating current is returned to the
output establishing a minimum load current requirement. If
there is insufficient load on the output, the output will rise.
VIN
.L~s...
VOUT Il-lV\v"'v_~VOUT
AOJ
I
~
RI
~~ 240
External Capacitors
An input bypass capacitor is recommended. A 0.1 /LF disc
or 1 /LF solid tantalum on the input is suitable input bypassing for almost all applications. The device is more sensitive
to the absence of input bypassing when adjustment or output capacitors are used but the above values will eliminate
the possibility of problems.
TUH/9063-6
FIGURE 2. Regulator with Line Resistance
in Output Lead
With the TO-3 package, it is easy to minimize the resistance
from the case to the set resistor, by using two separate
leads to the case. However, with the TO-5 package, care
should be taken to minimize the wire length of the output
lead. The ground of R2 can be returned near the ground of
the load to provide remote ground senSing and improve
load regulation.
The adjustment terminal can be bypassed to ground on the
LM117 to improve ripple rejection. This bypass capacitor
prevents ripple from being amplified as the output voltage is
increased. With a 10 /LF bypass capacitor 80 dB ripple re:
jection is obtainable at any output level. Increases over
10 /LF do not appreciably improve the ripple rejection at
frequencies above 120 Hz. If the bypass capacitor is used, it
is sometimes necessary to include protection diodes to prevent the capacitor from discharging through internal low current paths and damaging the device.
In general, the best type of capacitors to use is solid tantalum. Solid tantalum capacitors have low impedance even at
high frequencies. Depending upon capacitor construction, it
takes about 25 /LF in aluminum electrolytic to equal 1 /LF
solid tantalum at high frequencies. Ceramic capacitors are
also good at high frequencies; but some types have a large
decrease in capacitance at frequencies around 0.5 MHz.
For this reason, 0.Q1 /LF disc may seem to work better than
a 0.1 /LF disc as a bypass.
Although the LM117 is stable with no output capacitors, like
any feedback circuit, certain values of external capacitance
can cause excessive ringing. This occurs with values be-
Protection Diodes
When external capacitors are used with any IC regulator it is
sometimes necessary to add protection diodes to prevent
the capacitors from discharging through low current points
into the regulator. Most 10 /LF capaCitors have low enough
internal series resistance to deliver 20A spikes when shorted. Although the surge is short, there is enough energy to
damage parts of the IC.
When an output capacitor is connected to a regulator and
the input is shorted, the output capaCitor will discharge into
the output of the regulator. The discharge current depends
on the value of the capacitor, the output voltage of the regulator, and the rate of decrease of VIN. In the LM117, this
discharge path is through a large junction that is able to
sustain 15A surge with no problem. This is not true of other
types of positive regulators. For output capaCitors of 25 p.F
or less, there is no need to use diodes.
1-49
Application Hints (Continued)
current. No protection is needed for' output voltages of 25V
or less and 10 /loF capacitance. Figure 3 shows an LM117
with protection diodes included for use with outputs greater
than 25V and high values of output capacitance.
The bypass capacitor on the adjustment terminal can discharge through a low current junction.' Discharge occurs
when either the input or output is shorted. Internal to the
LM117 is a 500. resistor which limits the peak discharge
DI
IN40IIZ
LM117
VIN AOJVOUTH'"""'-+--.....-VOUT
AI
02
240
IN4IIO.Z
-:r
VOUT = t.25V (t
+~)
+IADJR2
CI
01 proJects against Ct
02 protects against C2
T,e.F
+
C2
":'
TLIH/S063-7
FIGURE 3. Regulator with Protection Diodes
Schematic Diagram
r----1~--~t-----~----~-----t--~----------------------------._--------~~~-V,.
TL/H/9063-6
1-50
ris:
.....
.....
Typical Applications (Continued)
5V Logic Regulator with Electronic Shutdown·
VIN7V-35V
~r-
Slow Turn-On 15V Regulator
H~~~~9UT
......"'"T'---...
~t-----------e--~~lT
...
......~:..-
is:
.....
.....
::::!
ris:
tN4002
C2
D.I~F
t-""""""""'_-TTl
25~F
'Min. output '" 1.2V
......
TLlH/9063-9
TLlH/9063-3
Adjustable Regulator with Improved
Ripple Rejection
High Stability 10V Regulator
~:~-. .--...
.....- - - -...._~~VUT
Rt
........::y::.---'
2.
DI*
lN4DD2
5%
R2
u.
1%
tSolid tantalum
-
'Discharges Ct If output is shorted to ground
TL/H/9063-10
TL/H/9063-11
High Current Adjustable Regulator
3-LM195'S IN PARALLEL
R3
500
IN4002
*
tSolid tantalum
·Minimum load current = 30 rnA
*Optlonal-improves ripple rejection
1-51
~
......
ris:
w
.....
Ct
tk
w
.....
TL/H/9063-12
Typical Applications (Continued)
oto 30V Regulator
Power Follower
10V-40V
VOUT
C1
-=!=" O.l~r-F_h
INPUT -~"""-+-f
R1
10k
LM117
R2
2A
Full output current not avaIlable at high input-output voltages
-IOV
TL/H/B063-t3
TL/H/B063-t4
SA Constant Voltage/Constant Current Regulator
MJ4502
r-------------.-------.---~
R3
0.2.
R1
33
5W
.... ..........----...-----I----4~--.... ~~~~~V
~;.-.
C5
75pF
R5
330k
-8V
tSolid tantalum
'Ughts In constant current mode
1-52
TLlH/9063- t 6
......r-s::
~
......
r......s::
Typical Applications (Continued)
1.2V-20V Regulator with
Minimum Program Current
lA Current Regulator
High Gain Amplifier
v·
LMll1
H2
2.4
~
Ii:
...
Co)
OUTPUT
INPUT
TlIH/9063-16
LM195
TL/H/9063-17
·Minimum load current::::: 4 rnA
":'
TL/H/9063-1B
Low Cost 3A Switching Regulator
01
2N3192-,.._ _ _ _ _ _ _ _~J-~!':"!~..,
OV-35V
t-"",..,....- i - - - -....
~~""""'''''-I
-1.8V TO 32V
+
01
lN3alO
tSolid lanlalum
TlIH/OO63-19
'Core-Arnold A·25416B·2 60 turns
4A Switching Regulator with Overload Protection
Precision Current Limiter
...... .......H ....W'Ir-.... lour ~ v:~•
~
2N2905-,..._ _ _ _
~:::::::;::::::~i\5f\~3f\0,...
*0.80:;; Rl :;; 1200
TL/H/9063-21
I-~,e
Ht
3D
H4
2.6
LMtI1
+ Cl
H6
16k
~'Do.F.
C2
lDDpF
=
LI
IDo.H*
VOUT
I.IV TO 32V
HI
240
01
IN3alD
HI
tOO
":'
tSolid tanlalum
'Core-Arnold A·254168·2 60 turns
TL/H/9063-20
1-53
~
......
r-
HI
10k
...s::
Co)
......
,..
..C')
:5
r---------------------------------------------------------------------------------,
Typical Applications (Continued)
:c,....-
Tracking Preregulator
R2
720
C')
:5,......
....::&
...I
:c,....-
VOUT
R3
120
..-
:5
TL/H/9063-22
Current Limited Voltage Regulator
YQUT = 1.25Y (1
+ ~) + IADJR2
r----'
I
I
I
I
I
TRANSFORMERS,
RECTIFIERS,
AND
FILTER
CAPACITOR
1-
L ____ -I
-Short circuit current Is approximately 6O~:V, or 120 mA
(Compared
TUH/9063-23
to LMII7's higher current limit)
- At 50 mA output only % volt of drop occurs in R3 and R4
Adjusting Multiple On-Card Regulators with Single Control'
""'-+-VOUT
I
'---+--------1- ______ J
• All outputs within ± 100 mV
tMinimum load-l0 mA
1-54
TL/H/9063-24
Typical Applications (Continued)
50 mA Constant Current Battery Charger
AC Voltage Regulator
120
12Vp·p
lA
24Vp·p
rv
480
TL/H/9063-27
480 ~.
Adjustable 4A Regulator
\...J
TL/H/9063-2S
12V Battery Charger
t-"'#Y~~"'-4.5V TO
25V
5k
5k
TL/HJ9063-26
.
'As-sels oulpullmpedance
of charger: ZOUT = As
( + Ai"~)
1
Use of AS allows low charging rates with fully charged battery.
TL/H/9063-26
Current Limited 6V Charger
9VTO~a
240
'Sets peak current (0.6A for 1ill
"The 1000 I'F is recommended 10 filler oul inpul
transients
1.1k
100
2N2222
1*
TL/HJ9063-29
1·55
.....
,..
C')
:::!i
Connection Diagrams (See Physical Dimension section for further information)
...I
~
,..
(TO-3)
Metal Can Package
C')
:::!i
(TO-39)
Metal Can Package
...I
o-~~--INPUT
......
.....
,..
,..
:::!i
...I
:c,.......
cr_~-
,..
OUTPUT
TL/H/9063-31
CASE IS OUTPUT
:::!i
Bottom View
...I
TL/H/9063-30
Order Number LM117AH, LM117H, LM317AH or LM317H
See NS Package Number H03A
Bottom View
Steel Packages
Order Number LM117AK STEEL, LM117K STEEL,
LM317AK STEEL or LM317K STEEL
See NS Package Number K02A
Aluminum Packages
Order Number LM317AKC or LM317KC
See NS Package Number KC02A
(TO-202)
Plastic Package
(TO-220)
Plastic Package
0
..... Your
,
lI
ADJ
-
ADJ ___
----
0
-
VOUT
r-
__VI N
LVOUT
VOUT
TL/H/9063-33
Front View
TL/H/9063-32
Front View
Order Number LM317MP
See NS Package Number P03A
Order Number LM317AT or LM317T
See NS Package Number T03B
1·56
r-------------------------------------------------------------------------,r
3i:
.....
.....
.....
~National
~ Semiconductor
::J:
~
r
3i:
Co)
LM 117HVILM317HV 3-Terminal Adjustable Regulator
.....
.....
<
::J:
General Description
The LM117HV/LM317HV are adjustable 3-terminal positive
voltage regulators capable of supplying in excess of 1.5A
over a 1.2V to 57V output range. They are exceptionally
easy to use and require only two external resistors to set the
output voltage. Further, both line and load regulation are
better than standard fixed regulators. Also, the LM117HV is
packaged in standard transistor packages which are easily
mounted and handled.
Also, it makes an especially simple adjustable switching regulator, a programmable output regulator, or by connecting a
fixed resistor between the adjustment and output, the
LM117HV can be used as a precision current regulator.
Supplies with electronic shutdown can be achieved by
clamping the adjustment terminal to ground which programs
the output to 1.2V where most loads draw little current.
In addition to higher performance than fixed regulators, the
LM 117HV series offers full overload protection available
only in IC's. Included on the chip are current limit, thermal
overload protection and safe area protection. All overload
protection circuitry remains fully functional even if the adjustment terminal is disconnected.
Normally, no capaCitors are needed unless the device is
situated more than 6 inches from the input filter capaCitors
in which case an input bypass is needed. An optional output
capaCitor can be added to improve transient response. The
adjustment terminal can be bypassed to achieve very high
ripple rejections ratios which are difficult to achieve with
standard 3-terminal regulators.
Besides replacing fixed regulators, the LM 117HV is useful in
a wide variety of other applications. Since the regulator is
"floating" and sees only the input-to-output differential voltage, supplies of several hundred volts can be regulated as
long as the maximum input to output differential is not exceeded, i.e. do not short the output to ground.
The LM117HVK STEEL, and LM317HVK STEEL are packaged in standard TO-3 transistor packages while the
LM117HVH, and LM317HVH are packaged in a solid Kovar
base TO-39 transistor package. The LM 117HV is rated for
operation from - 55·C to + 150·C, and the LM317HV from
O·C to + 125·C.
Features
•
•
•
•
•
•
•
•
•
Adjustable output down to 1.2V
Guaranteed 1.5A output current
Line regulation typically 0.01 %IV
Load regulation typically 0.1 %
Current limit constant with temperature
100% electrical burn-in
Eliminates the need to stock many voltages
Standard 3-lead transistor package
80 dB ripple rejection
g Output is short-circuit protected
Typical Applications
1.2V-4SV Adjustable Regulator
Digitally Selected Outputs
LM111HV
H'""""....-V.UT"
VIN-48V
v'o-----1
SV Logic Regulator with
ElectroniC Shutdown·
.....- - _ V O U T
VIN7V-15V
e,'
1,.
Your
••
C2
O.h,F
TTL
"
TUH/9062-1
TL/H/9062-3
Full output current not available
at high input·output voltages
INPUTS
tOptional-improves transient responss. Output
capaCitors in the range of I p.F to 1000 p.F of
aluminum or tantalum electrolytic are commonly
used to provide improved output impedance and
rejection of transients.
TUH/9062-2
'Sels maximum VOUT
·Needed if device is more than 6 inches from
filter capacitors.
ttVOUT
~ 1.25V ( I
+
l*) +
*Min. output::::: 1.2V
IADJ R2
1-57
•
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 3)
Storage Temperature
Lead Temperature (Soldering, 10 sec.)
Preconditioning Burn-In in
Thermal Limit
ESD Tolerance (Note 4)
Power Dissipation
Internally limited
Input-Output Voltage Differential
+60V, -0.3V
Operating Junction Temperature Range
LM117HV
- 55'C to + 150'C
LM317HV
O'C to + 125'C
- 65'C to + 150'C
300'C
100% All Devices
2000V
Electrical Characteristics (Note 1)
Parameter
LM117HV
Conditions
LM317HV
Units
Min Typ Max Min Typ Max
Line Regulation
TJ = 25'C, 3V s: VIN - VOUT
(Note 2)1L = 10 rnA
Load Regulation
TJ
Thermal Regulation
TJ
s:
60V
0.01 0.02
= 25'C,10 rnA s: lOUT s: IMAX
= 25'C, 20 ms Pulse
0.1
10 mA s: IL s: IMAX
3.0 V s: (VIN - VOUT)
Temperature Stability
s: 60V
3.0 V s: (YIN - VOUT) s: 60V, (Note 3)
10 rnA s: lOUT s: IMAX' P s: PMAX
3.0V s: (YIN - VOUT) s: 60V, IL = 10 rnA, (Note 2)
10 rnA s: lOUT s: IMAX (Note 2)
TMIN s: TJ s: TMAX
Minimum Load Current
(YIN - VOUT)
= 60V
Current Limit
(VIN - VOUT)
K Package
H Package
(VIN - VOUT)
KPackage
H Package
s:
Reference Voltage
Line Regulation
Load Regulation
VOUT = 10V, f
CADJ = 10 /LF
100
50
100
p.A
0.2
5
0.2
5
/LA
0.3
V
0.02 0.07 %IV
1
0.3
1
3.5
1.5
7
%
%
1
3.5
12
rnA
2.2
0.8
3.7
1.9
A
A
15V
= 120 Hz
66
= 125'C
H Package
KPackage
%
50
0.02 0.05
= 25'C, 10 Hz s: f s: 10 kHz
TJ
Thermal Resistance, Junction to Case
0.5
2.2
0.8
3.5 1.5
1.8 0.5
s: '60V
Ripple Rejection Ratio
TJ
0.1
0.04 0.07 %/W
1.20 1.25 1.30 1.20 1.25 1.30
1.5
0.5
RMS Output Noise, % of VOUT
Long-Term Stability
0.3
0.03 0.07
Adjustment Pin Current
Adjustment Pin Current Change
0.01 0.04 %IV
0.1
0.03
0.1
0.03
0.003
0.003
%
65
80
65
80
dB
dB
66
A
A
0.3
1
0.3
1
12
2.3
15
3
12
2.3
15 'C/W
3 'C/W
%
140
Thermal Resistance, Junction to Ambient H Package
'C/W
140
(no heat sink)
KPackage
35
35
'C/W
Note 1: Unless otherwise specified. these specifications apply: -SS'C s: TJ s: + lSO'C for the LMl17HV, andO'C s: TJ s: + 125'C for the LM317HV;VIN - VOUT
= 5V and lOUT = 0.1 A for the T0-39 package and lOUT = O,SA for the T0-3 package. Although power disSipation Is internally limited. these specifications are
applicable for power dissipations of 2W for the TO-39 and 20W for the TO-3. IMAX is 1.5A for the TO-3 and O.SA for the T0-39 package.
Note 2: Regulation Is measured at constant junction temperature. Changes in output voltage due to heating effects must be taken Into account separately. Pulse
testing with low duty cycle is used.
Note 3: Refer to RETSl17HVH for LMl17HVH or RETSl17HVK for LM117HVK military specmcatioins,
Note 4: Human body model, 1.S kO in series with 100 pF.
1-58
Typical Performance Characteristics (K Package)
Load Regulation
Current Limit
~
ILI.ot
§
!i
~
.'"
~
I
-
-0.2
~ ......
-0.4
I'..
IL·'.5~
Q
Adjustment Current
3.0 r---r-,---;-,---,-,
0.2
"....
55
ffi
45
i!
40
.iii
~
"
..~
-O.B _~IN"5V _
lour '~V
-75 -50 -25 0 25 50 75 100 125 150
Dropout Voltage
TEMPERATURE I'CI
Temperature Stability
r-r-r-.,-.,-,---..,.,-,
Minimum Operating Current
4.5
1.260
.lVOUT "100 mV
4.0
:>
~ 1.250
......
...........
~
~ 1.240
"ill
oS
....
~
....~
\
"
~
~
..
::l
=
1.0 '--'---'---'--'-~"-'~-'--"
-75 -50 -25 0 25 50 75 100 125 150
;;
1.220
-75 -50 -25 a
TEMPERATURE I C)
Ripple Rejection
'"§
~
~
~,Io
40
I
I
20
o
r-I"20H.
Tj" 25'C
BO
"'"
§"
60
OJ
=
40
a:
20
w
V,N-VoUT' 5V
IL;; 500mA
~
;;;
r-.....
10
15
20
25
30
35
OUTPUT VOLTAGE (V)
10-3
10
100
~
~!
lk
Ik
~
1.0
0.5
>;::
""
s:!:
==~ -0.5
",,,
/
Q
.I'CADJ"O;.F"",
FREQUENCY IHl/
a:
-!:ADJ' a
40
lOOk
VIN"5V
VoUT"0V
f= 120 Hz
Tj ·25 C
20
w>
~!ii
i! ~:i
i\CL,O;CAoJ-O
0.01
1M
10
0.1
I\.
Load Transient Response
3
'".:~
~"
>""
5~
....~>
1/
1/
~
I- -I
-1.5
1.0
ffi
1.5
1.0
..
0.5
=
~
0.5
I
~
"'''
"
5
-1.0
:-
OUTPUT CURRENT (AI
IA: : C~"tF;C~OJI.,JFVOUT! lO~
Il·50mA
Ti'25"C
CA~rmr
.....
a
1M
-2
-3
I-
I I
Ct'OICA~J'~ -
:::CL' M; CAoJ '1M ;;h
V,N,'5V
1\
VoUT"OV
INL "SOmA
Tj'25'C _
IV
~
I
II
10
20
TlME!.,1
30
40
~
I I
1\ I
'-
Q
>~
10k
1111111111
r-
~
""
lOOk
~
=
60
""
\
10k
BO
Line Transient Response
1.5
VIN"5V
VoUT"0V
~.Il =5DOmA
Tj'25'C
--
lao
!
FREQUENCV (Hzl
Output Impedance
r-- r-CADJ"~
100
\'-
10
40
30
20
10
Ripple Rejection
a
o
I
a
INPUT -OUTPUT DIFFERENTIAL IVI
,\
~
~
~ ~Tj"25'C
1.0
a
I
I
CADJ"O.F
1""--.
/
~ IP"
0.5
25 50 75 lao 125 150
'L '500mA
VIN"5V
VoUT' lOV
Ti'25 C
/ / ~CADJ'O ' ' \
CAOJ"O;.F
60
il:
a:
,
1.5
Ripple Rejection
lao
...
..
2.0
TEMPERATURE I C)
100
T;"-5b~ ~
~:'50C
3.5
3.0
= 2.5
~
tt; 1.230
BO
V
V
INPUT/OUTPUT DIFFERENTIAL tv)
TEMPERATURE I C)
;;;
I-
35
-75 -50 -25 a 25 50 75 100 125 150
-1.0
3.0
/,/
~ 50
=
~
!:;
> -0.6
"5
--
60
10
20
30
40
TIME!.,)
TL/H/9062-4
1-59
>
:J:
.....
....
('I)
:::i
.....
>
:J:
.....
........
Application Hints
In operation, the LM117HV develops a nominal1.25V reference voltage, VREF, between the output and adjustment terminal. The reference voltage is impressed across program
resistor R1 and, since the voltage is constant, a constant
current 11 then flows through the output set resistor R2, giving an output voltage of
:::i
.....
Your
=
VREF ( 1 +
:~)
tance can cause excessive ringing. This occurs with values
between 500 pF and 5000 pF. A 1 p.F solid tantalum (or 25
p.F aluminum electrolytic) on the output swamps this effect
and insures stability. Any increase of load capacitance larger than 10 p.F will merely improve the loop stability and
output impedance.
Load Regulation
The LM117HV is capable of providing extremely good load
regulation but a few precautions are needed to obtain maximum performance. The current set resistor connected between the adjustment terminal and the output terminal (usually 2400) should be tied directly to the output of the regulator rather than near the load. This eliminates line drops from
appearing effectively in series with the reference and degrading regulation. For example, a 15V regulator with 0.050
resistance between the regulator and load will have a load
regulation due to line resistance of 0.050 x IL. If the set
resistor is connected near the load the effective line resistance will be 0.050 (1 + R2/R1) or in this case, 11.5 times
worse.
Figure 2 shows the effect of resistance between the regulator and 2400 set resistor.
+ IADJR2
LM117HV
VIN
vOUTII-!-~t-_·1, 11~
1
ADJ
t
VREF
Rl
._~_.:.I_.
.
IAOJ
II
;~R2
I
VOUT
~
":::F
TL/H/9062-5
LMI17HV
FI~URE
1
Since the 100 p.A current from the adjustment terminal represents an error term, the LM117HV was designed to minimize IADJ and make it very constant with line and load
changes. To do this, all quiescent operating current is retumed to the output establishing a minimum load current
requirement. If there is insufficient load on the output, the
output will rise.
VIN
.I
RS
VOUT II-~"""",,,,-VOUT
ADJ
I
~ Rl
=240
External Capacitors
An input bypass capacitor is recommended. A 0.1 p.F disc
or 1 p.F solid tantalum on the input is suitable input bypassing for almost all applications. The device is more sensitive
to the absence of input bypassing when adjustment or output capacitors are used but the above values will eliminate
the possiblity of problems.
The adjustment terminal can be bypassed to ground on the
LM117HV to improve ripple rejection. This bypass capacitor
prevents ripple from being amplified as the output voltage is
increased. With a 10 p.F bypass capacitor 80 dB ripple rejection is obtainable at any output level. Increases over 10
p.F do not appreciably improve the ripple rejection at frequencies above 120 Hz. If the bypass capacitor Is used, It is
sometimes necessary to Include protection diodes to prevent the capacitor from discharging through intemallow current paths and damaging the device.
In general, the best type of capacitors to use are solid tantalum. Solid tantalum capacitors have low Impedance even at
high frequencies. Depending upon capacitor construction, It
takes about 25 ",F In aluminum electrolytic to equal 1 ",F
solid tantalum at high frequencies. Ceramic capacitors are
also good at high frequenciesj but some types have a large
decrease In capacitance at frequencies around 0.5 MHz.
For this reason, 0.01 ",F disc may seem to work better than
a 0.1 ",F disc as a bypass.
Although the LM117HV Is stable with no output capacitors,
like any feedback circuit, certain values of external capaci-
TUH/9062-6
FIGURE 2. Regulator with Line
Resistance In Output Lead
With the TO-3 package, it is easy to minimize the resistance
from the case to the set resistor, by using two separate
leads to the case. However, with the TO-5 package, care
should be taken to minimize the wire length of the output
lead. The ground of R2 can be returned near the ground of
the load to provide remote ground sensing and improve
load regulation.
Protection Diodes
When external capacitors are used with any IC regulator it is
sometimes necessary to add protection diodes to prevent
the capaCitors from discharging through low current pOints
Into the regulator. Most 10 ",F capacitors have low enough
Internal series resistance to deliver 20A spikes when shorted. Although the surge Is short, there Is enough energy to
damage parts of the IC.
When an output capaCitor Is connected to a regulator and
the Input is shorted, the output capaCitor will discharge into
the output of the regulator. The discharge current depends
on the, value of the capacitor, the output voltage of the regulator, and the rate of decrease of VIN. In the LM117HV, this
discharge path is through a large junction that is able to
sustain 15A surge with no problem. This Is not true of other
types of positive regulators. For output capacitors of 25 ",F
or less, there is no need to use diodes.
1-60
The bypass capacitor on the adjustment terminal can discharge through a low current junction. Discharge occurs
when either the input or output is shorted. Internal to the
LM117HV is a 50n resistor which limits the peak discharge
current. No protection is needed for output voltages of 25V
or less and 10 /J-F capacitance. Figure :; shows an
LM117HV with protection diodes included for use with outputs greater than 25V and high values of output capacitance.
D'
IN4DOZ
LMll1HV
V'N ADJvOUTH-.....--.._-VOUT
D.
..--.........
IN4002
~;o
+
T
C
'
c.
J'O"
R.
TlIH/9062-7
FIGURE 3. Regulator with Protection Diodes
VOUT
= 1.25V ( 1 +
1*) +
'ADJR2
01 protects against C1
02 protects against C2
Schematic Diagram
....
r-...,r--,...--~--~--""1
....----.. . .- .....
~--------------
-V,N
."
3
..-~-~~--~~~~-~-4-~~~_t::~~::jt::::~::~t:::::::::::::::::~::~:::VOUT
.on
ADJ
TL/H/9062-8
1-61
Typical Applications (Continued)
Adjustable Regulator with Improved
Ripple Rejection
Slow Turn-on 15V Regulator
LMI17HV
lN4QDZ
TL/H/9062-9
TL/H/9062-10
tSolid tantalum
noutput Is shorted to ground
'Discharges Cl
High Stability 10V Regulator
V,N
High Current Adjustable Regulator
VOUT
15V
lav
RI
2k
6%
03
2N2.0.-,...._ _...._ _-"Y'O"'0'v-_.....
R2
Uk
1%
LM3211A
O.
02
5k
LM117HV
22
v••
VIN
R3
.......- ...--+- VOUT
VOUT ~~-~
AOJ
ZII
1N4002
1%
+
Cl
111#.1Ft
0'
5k
TL/H/9062-11
TL/H/9082-12 '
tSol1d tantalum
'Minimum load current = 30 mA
*Optional-lmproves ripple reJection
oto 30V Regulator
Power Follower
lav-cav
INPUT .....1V\o,..,..-I
01
10k
LMl1lHV
OZ
2,4,
R3
110
-IOV
TLlH/9082-13
TLlH/9062-14
Full oulput current not available
a1 high Input-output voltages
1·62
I"'"
a:
........
Typical Applications (Continued)
"::c
5A Constant Voltage/Constant Current Regulator
~
r-------------.-------.---~
a:
W
I"'"
MJ45D2
Rl
33
l5V_....~""".........
....
R3
CURRENT
ADJUST
~
0.2
5W
<
t-...- - - -....- - -....-+---~~----~.~~~~~V
~..::r=---'
R6
C5
15 pF
tSoljd tantalum
• Lights in constant current mode
-BV
R5
3l0k
200
R7
220
RS
5k
VOLTAGE
ADJUST
TL/H/9062-15
1.2V-20V Regulator with
Minimum Program Current
1A Current Regulator
LM311HV
LMI11HV
VOUT*
III
TLlH/9062-16
TLlH/9062-17
'Minimum load current:::: 4 mA
1·63
>
:z::
.....
....
Typical Applications (Continued)
CO)
:IE
.....
:>:z::
.....
....
....
:5
High Gain Amplifier
v+
Low Cost 3A Switching Regulator
111
2N31I12;-_ _ _ _ _ _ _....-:-r-'!,-~-r:-'!,-~
LM117HV
IV-35V -41~'1111"'""""-1
R2
2.4
....""",.,...-+----.....
_1.8V TO 32V
+
Rl
10k
INPUT...J
.........
::I:
Connection Diagrams (See Physical Dimension section for further information)
CO)
::::E
.....
....
~
.....
........
(To-39)
Metal Can Package
(TO·3 Steel)
Metal Can Package
I--""'r-,--
INPUT
::::E
.....
o---..!L-- OUTPUT
TL/H/9D82-30
Case Is Output
Bottom View
TL/H/9062-29
Case Is Output
Bottom View
Order Number LM117HVH,
orLM317HVH
See NS Package Number H03A
Order Number LM117HVK STEEL,
LM317HVK STEEL
See NS Package Number K02A
1·66
~National
~ Semiconductor
LM120/LM320
Series 3-Terminal Negative Regulators
General Description
The LM120 series are three-terminal negative regulators
with a fixed output voltage of - 5V, -12V, and -15V, and
up to 1.5A load current capability. Where other voltages are
required, the LM137 and LM137HV series provide an output
voltage range of -1.2V to -47V.
The LM120 need only one external component-a compensation capacitor at the output, making them easy to apply.
Worst case guarantees on output voltage deviation due to
any combination of line, load or temperature variation assure satisfactory system operation.
Exceptional effort has been made to make the LM120 Series immune to overload conditions. The regulators have
current limiting which is independent of temperature, combined with thermal overload protection. Internal current limiting protects against momentary faults while thermal shutdown prevents junction temperatures from exceeding safe
limits during prolonged overloads.
Features
Preset output voltage error less than ± 3%
Preset current limit
Internal thermal shutdown
Operates with input-output voltage differential down to
1V
• Excellent ripple rejection
• Low temperature drift
• Easily adjustable to higher output voltage
•
•
•
•
LM 120 Series Packages and Power Capability
Device
LM120/LM320
Although primarily intended for fixed output voltage applications, the LM120 Series may be programmed for higher output voltages with a simple resistive divider. The low quiescent drain current of the devices allows this technique to be
used with good regulation.
Package
Rated
Power
Dissipation
Design
Load
Current
TO-3(K)
20W
1.5A
TO-39 (H)
2W
0.5A
LM320
TO-220m
15W
1.5A
LM320M
TO-202(P)
7.5W
O.5A
Typical Applications
Dual Trimmed Supply
+ INPUT
Fixed Regulator
1-'--....- ....- - - -....-0 +5.0V
OUTPUT
..."""I'v-.......
D}t
Output Noise Voltage TA = 25·C, CL = 1 ,...F, IL = 5 rnA,
VIN = 10V, 10 Hz,:; f,:; 100 kHz
'Q:-t'
.~
Long Term Stability
,'lr:
Thermal Resistance
Junction to Case
Junction to Ambient
&~~
Max
~~
-4.9
0.1(}'
25
Typ
Min
60,
40
-7
-"-~ .~~-.t-
-25
<5;'
54
"~:
100
':"
'
-1'
-4.75 -5.20
,1'0
'0,1-
0.4
0.4
0.00'fi.04
~'tf
50
,ecce
'~~5:=
50
'::li'
3
35
:~;j
i~:,:'
3
35
;;~.
10·
,~,c~
-7
O.5A
7.5W
Min
Typ
Max
-5.2 c.:.5 -4.8
-7
~,
~~O:
50
."
-5.25
,C';;~~
•....
:.
~,1
2
'
0.04
' ....
50
Typ
Max
-5.2
I}t~
-4.8
V
;:4&
40
mV
~
,
. -7.5
64
40
V
dB
100
-4.75 -5.25 -5 -4.75
mV
V
'"",
-"1"
2
0.4
0.4
0,1'
;0.1
0.4
0.4
'-,
-1~
50
'10.
Note 4
c": ,':'
4
:.;(£
Note 4
Note 4
100
2
150
'?!lu,
50
-25
54
64
Units
Min
40
-7.5
-4.75 -5.25
'..'\._7'>"
50
-25
54
y.
0_05
0.4
0.4
.1~
40
"
--25'
54
·i~
,",,"
;150
1.5A
15W
"
-5.2 ~~. -4.8
"":,~:"
;'l:f",,",:
LM320MP-5.0
(TO-202)
.,
it~; -4.80
2
I,"
0.4
0.4
~~;
Max
LM320T-5.0
(TO-220)
''<.'
'<"P'¥b
'~"..
:~,:~
TYi!
Power Plastic Package
LM320H-5.0
(TO-39)
O.5A·
2W
.~:~ Note 4
:5Q'
'1'
.
2
0;05 0.3
P:u4
1f'~~
~;'<:--:::""'~:
"'m~
0.25
rnA
rnA
rnA
,...V
mV
<~<>;<'X?
·1Z:.
:-70
·C/W
·C/W
Note 1: This specification applies over -55°C s TJ S +150°C for the LM120 and O°C s TJ 5: +125°C for the LM320.
Note 2: Regulation is measured at constant junction temperature. Changes in output voltage due to heating effects must be taken into account separately. To ensure constant junction temperature, low duty cycle, pulse testing is
used. The LM120/LM320 series does have low thermal feedback, improving line and load regulation. On all other tests, even though power dissipation is internally limited, electrical specifications apply only up to PO.
Note 3: For -5V 3 amp regulators., see LM145 data sheet
Note 4: Thermal resistance of typically 85 C/W (in 400 linear feet air flow), 224D C/W (in static air) junction to ambient, of typically 21 CIW junction to case.
D
Note 5: Refer to RETSt20-5H drawing for LMI20H-5.0 or RETSI20-5K drawing for LM120-5K military specifications.
D
-12 Volt Regulators
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 4)
Power DisSipation
Input-Output Voltage Differential
See Note 1
Storage Temperature Range
- 65'C to
+ 150'C
Lead Temperature (Soldering, 10 sec.)
Internally Umited
Input Voltage
30V
Junction Temperatures
300'C
-35V
Electrical Characteristics
Metal Can Package
LM120K-12
(To-3)
LM320K-12
(TO-3)
LM120H-12
(TO-39)
LM320H-12
(TO-39)
LM320T-12
(TO-220)
LM320MP-12
(TO-202)
Design Output Current (ID)
Device Dissipation (PD)
1A
20W
1A
20W
0.2A
2W
0.2A
2W
1A
15W
O.SA
7.5W
Parameter
ffi
Power Plastic Package
Order Numbers
Conditions (Note 1)
Output Voltage
TJ = 25'C, VIN = 17V,
ILOAD = 5mA
Une Regulation
TJ = 25'C, ILOAD = 5 rnA,
VMIN ,;:; VIN ,;:; VMAX
Min
Typ Max
f=120Hz
Load Regulation,
(Note 2)
TJ = 25'C, VIN = 17V,
5mA,;:; ILOAD';:; ID
Output Voltage,
(Note 1)
14.5V,;:; VIN ,;:; VMAX,
5 rnA S; ILOAD ,;:; ID' P ,;:; PD
Typ Max
Min
Typ Max
Min
Typ
Max
Min
Typ
Max
4
56
10
-14
80
30
-12.5
4
-32
56
80
20
-14
80
30
-11.5 -12.6
4
-32
56
80
10
-14
80
10
4
-32
56
25
-14
10
4
-32
56
80
-11.5 -12.6
-11.4 -12.5
20
40
20
30
-11.4 -12.6
80
VMIN ,;:; VIN ,;:; VMAX
2
4
2
4
2
4
2
4
2
4
0.1
0.1
0.4
0.4
0.1
0.1
0.4
0.4
0.05
0.03
0.4
0.4
0.05
0.03
0.4
0.4
0.1
0.1
0.4
0.4
Long Term Stability
12
120
3
35
12
120
3
35
12
120
Note 3
Note 3
12
-14.5
40
V
mV
V
dB
100
mV
-11.4
V
4
rnA
2
0.05 0.3
0.04 0.25
rnA
rnA
400
400
/LV
120
24
24
mV
Note 3
Note 3
4
50
12
70
'C/W
'C/W
400
400
400
24
80
-11.4 -12.6
TJ = 25'(;
VMIN S; VIN S; VMAX
5 rnA ,;:; ILOAD ,;:; ID
400
4
56
Quiescent Current
Thermal Resistance
Junction to Case
Junction to Ambient
Typ Max
-14.5 -32
80
Quiescent Current
Change
Output Noise Voltage TA = 25'C, CL = 1/LF,IL = 5 rnA,
VIN = 17V, 10 Hz,;:; f,;:; 100 kHz
Min
-12.3 -12 -11.7 -12.4 -12 -11.6 -12.3 -12 -11.7 -12.4 -12 -11.6 -12.4 -12 -11.6 -12.5 -12 -11.5
-32
Input Voltage
Ripple Rejection
Min
Units
Note 1: This specification applies over -55"C ,; TJ ,; + 150"C for Ihe LM120 and O"C ,; TJ ,; + 125'C for Ihe LM320.
Note 2: Regulation is measured at constant junction temperature. Changes in output voltage due to heating effects must be taken into account separately. To ensure constant junction temperature, low duty cycle, pulse testing is
used. The LM120/LM320 series does have low Ihermal feedback. improving line and load regulation. On all other lests. even though power dissipation is internally limited, etectrical specifications apply only up to Po.
Note 3: Thermal resistance of typically B5"C/W (in 400 linear feet/min air flow), 224"CIW ~n static air) junclion to ambient. of typically 21"C/W junction to case.
Note 4: Aefer to AETS120H·12 drawing for LM120H·12 or AETS120·12K drawing for LM120K·12 military speCifications.
- -
O~£W'IO~UI\I'
LM120/LM320
-15 Volt Regulators
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 4)
Input-Output Voltage Differential
Junction Temperatures
Stora T
tu R
ge empera re ange
Power Dissipation
Lead Temperature (Soldering, 10 sec.)
Internally Limited
Input Voltage
LM120/LM320
LM320T/LM320MP
30V
See Note 1
- 65'C t + 150'C
0
300'C
-40V
-35V
Electrical Characteristics
Order Numbers
.
Design Output Current (ID)
Device Dissipation (PD)
Parameter
.:,.
Conditions (Note 1)
LM120K-15
(TO-3)
1A
20W
Min
TJP;
1A
20W
Max
O.2A
2W
Min~, Max
Min
'M
Power Plastic Package
LM320T-15
LM320MP-15
(TO-220)
(TO-202)
O.2A
2W
Max
Min
Tjp
1A
15W
Max
O.5A
7.5W
Min .'t~ Max
-14.7 -15.4::l;}; -14.6 -15.3 ~t#i -14.7 -15.4::"'1~ -14.6 -15.5 ..~;t~ -14.5
." ,(~·tr:;;:'~
\;;11
TIJ = 2:'C
, VAIN = 20V,
LOAD - 5 m
Line Regulation
Input Voltage
TJ = 25'C, ILOAD = 5mA,
'\..'~ 10
VMIN ;;; VIN ;;; V M A X : :
-35 .•.. -17
Ripple Rejection
f = 120Hz
Load Regulation,
(Note 2)
TJ = 25'C, VIN = 20V,
5 mA ;;; ILOAD ;;; ID
~u~f~~~o'tage,
~7~:: :I~~~: ~rD~p;;; PD
56
.
SO.
'~6
.:5,
:. •
-35
.,. '
bioi;' -17
80\$9;;
0':
-15S:,.'?, ' -14.5
-15.6
VMIN ;;; VIN ;;; VMAX
~,~.
TJ = 25'C
VMIN ;;; VIN ;;; VMAX
5 mA ;;; ILOAD ;;; ID
'.:!,~""
,WI'.' 0 . 4 0 : 1 .
0.1. 0.4
.0.1
4
80
. ,2'
4
,,'SO:
'L:.~;
~''.\,;.
-15.5:,~).
.:-?:
1'~
;,'
C'
;-
>•
150
3
35
,il~
~~~
-35"
56
25
-17
·1(j;
..
4
2
::~\
.\.~.
20
-35
56
llQ
-14.5 -15.6
40
:,'c'
;,00
so.
0.4
0.4
QiQ!t
0.03
150
. 1$'
Min
biiI
k%l~
f*'.
~
30
-17.5 - 3 5 T -17.5
56
80
00
V
mV
V
dB
,.~ 100
LJ0::
-14.4 -15.7:~,:~:·: -14.3 -15.7~1-14.3
4;;~.
4
g 4
,
.
Units
Max
-15.6~L14.4
20
,.(
mV
V
mA
@!
0.4
0.4
400
:40.0
Output Noise Voltage TA = 25'C, CL = 1 fL F, IL = 5 mA,~OO
VIN = 20V, 10 Hz;;; f;;; 100 kHz
. " ; , , ' ,
Long Term Stability
~.5i'
, ..
10
-35. ;".t -17
56
i :',:, -14.4
Quiescent Current
Change
:>f;"'
t·;~.·
20
56-'SP,
Quiescent Current
Thermal Resistance
Junction to Case
Junction to Ambient
LM320H-15
(TO-39)
-15.3~~~
Output Voltage
o
Metal Can Package
LM320K-15
LM120H-15
(TO-3)
(TO-39)
0.,05
0,03
0.4
0.4
0,1....
0.1
40040Q
. .
.
150
\5,
" '
3"
Note 3
3 5 , "'$ Note 3
150
Note 3
Note 3
so.
.4
.$0
0.4
0.4
:~
.\q
~
::-;If
'3il
"k' (.
;,.2'
"79'"
0.3
0.25
mA
mA
fL
mV
'C/W
'C/W
Note 1: This specification applies over -55°C"; TJ ..; +15DoG for the LM12D and DOG" TJ ..; + 125°G for the LM32D.
Note 2: Regulation is measured at constant junction temperature. Changes in output voltage due to heating effects must be taken into account separately. To ensure constant junction temperature, low duty cycle, pulse testing is
used. The lM120/lM320 series does have low thermal feedback. improving line and load regulation. On all other tests, even though power dissipation is internally limited, electrical specifications apply only up to·PD_
Note 3: Thermal resistance of typically 85°C/W (in 400 linear feet/min air flow), 224°C/W (in statiC air) junction to ambient, of typically 21°C/W junction to case.
Note 4: Refer to RETS12D·15H drawing for LM12DH·15 or RETS12D·15K drawing for LM12DK-15 military specifications.
V
Typical Performance Characteristics
Output Voltage vs
Temperature
1.01
1.00
~ 0.995
~O.990
- r- V!uT~12V~N;;':;'; ~
~
"'"~
~
"ti
i
1.01
~
--
1.tI05
,
0.99S I:::: :: I-- ViUT ",-51
0.990
-50 -25 0
25
a:
r-
u
~
60
'"
2.5
~
:;
,.,'"
,.!!
10" L-_l-_I.----JI.----J_---J
O.Olk O.lk
lk
10k
lOOk
1M
1.1
15
,y
.lib'
-TI"-5~C
"'"
1.1
0.5
Ti"2i"C-
Yi"150'C
Quiescent Current vs
Input Voltage
....
1.15
~
1.05
!li
z
~
1.2
- -,~ •~5i"J- J
.....
~
1.1
T,'2i"C-
1.0
T, =150·C
0.95
10
15 20
25
,.~
...
~
!i'"
!!
I
0.15
3D
INPUT VOL TAGECVI
LM120·5
"!.
~
1'...:
1.2
a:
r--
1.0
1.25
I.B
/
I.B
_ I - - Ti>2i"C
~
1.4
I-"Z
Ti'
12
1.0
Tj>15O'C'-
J
J..,.oo'"
OJ
~-- ~
U
1.5
0.1
1.1
i,..oo"
!:i
~
1.0
0.9
35 40
~
T,,,,26°C
.- --r
I
,.
o
T, >lSO'c
- ':::
I
0.25
0.5
0.15
21
19
i
is
E
iii
is
a:
11
IS
1.0
1.25 1.5
I'...
-
"
13
11
9
~
,
I
0.3
OA
Ol
TO·3,ZOCIW
HEATSINK*
\.(wAKEfl,ELO ~IAI_
\
TO·3.S'CIW
~ HEATSINK*
\.IWAKEfIELO
610U AI
~
~
TO.3*I"C~
.HEAT SINK
2
t--+..
o
OUTPUT CURRENT IAI
0.2
Maximum Average Power
Dissipation (TO-3)
~
-
I
..",
V
..-
5s'c~~I-
OUTPUT CURRENT IAI
T,· S5"C ~
i5
I
~
0.9
5
t:;;
I
1
~
0.5
1M
2.2
2.0
Quiescent Current vs
Load Current
1.3
lOOk
Minimum Input-Output
Differential TO-S and
TO-202 Packa es
. OUTPUT CURRENT IAI
I
1-V
I
10k
1k
0.4
o us
fREQUENCY IHzl
~
.
~
~
/
0.9
"
100
2A
I
/
0.1
!.
,
10-2
Minimum Input-Output
Differential TO-3 and
To-220 Packages
2.1
1.9
1.3
COUT' 25.f
ALUMINUM
V ._-
fREQUENCY 1Hz)
2.3
LM12Q.5
..
,
fREQUENCY 1Hz)
F.a=n=d",T=O=-2",O~2=P'lt---~t--oCOMMON
O'
lN4001
INPUT
'lOUT
TL/H/77S7-7
~
I rnA
+
S.OV
RI
TLlH/7767-B
± 15V, 1 Amp Tracking Regulators
'Resistor tolerance of RI and R2 determine matching of (+) and (-)
inputs.
.y.o-....--....:;,."I
"""Necessary only if raw supply capacitors are more than 3" from regulators
An LM3086N array may substitute for 01, 01 and 02 for belter stability and
tracking. In the array diode transistors 05 and 04 (in parallel) make up 02;
similarly, 01 and 02 become 01 and 03 replaces the 2N2222.
1=-=-.-------t----1>---9------------...._--....OYaUT C-II&V
-y. 0-....
IOmV
100 "Vrms
+50mV
150 "Vrms
ImV
100 "Vrms
+50mV
ISO "Vrms
'Resistor tolerance of R4 and R5 determine matching of (+) and
(-) outputs.
-300n
-7S0n
-1k
··Necessary only if raw supply filter capacitors are more than 2"
from regulators.
Light Controllers Using Silicon Photo Cells
I
I
I
CI'....L!
25,d'-r
I
I
I
61l.-16V
BUlB
BV -15V
BULB
USA
MAX TURN-ON
CURRENT
USA
MAX TURN· ON
CURRENT
C2
251lf
TL/H/77B7-11
'Lamp brightness Increases u~lil i, ~ 10 (I rnA) + 5V1RI.
TLlHI77B7-IO
tNecessary only If raw supply filler cspacltor is more than 2" from LM320.
'Lamp brightness Increases until I, ~ 5V1RI 01 can be set as low as 1 "A).
tNecessary only of raw supply filler capacitor Is more than 2" from
LM320MP.
1-73
Connection Diagrams
. ·V11!r.
;xC
OUTPUT
INPUT
(CASE)
TL/H17767-13
TlIH/7767-14
BoHomVlew
Metal Can Package TO-39 (H)
Order Number LM120H-5.0,
LM120H-12, LM120H-15, LM320H5.0, LM320H-12 or LM320H-15
See NS Package Number H03A
,
INPUT
(CASE)
TlIH/7767-15
Bottom View
BoHomVlew
Steel Metal Can Package To-3 (K)
Order Number LM120K-5.0,
LM120K-12, LM120K-15, LM320K5.0, LM320K-12 or LM320K-15
See NS Package Number K02A
Aluminum Metal Can
Package TO-3 (KC)
Order Number LM320KC-5.0,.
LM320KC-12 or LM320KC-15
See NS Package Number KC02A
INPUT
INPUT
t
""'""'"
......
0
;)
OUT
;)
IN
;;)
GNO
~
......r""
TL/H17767 -16
TlIH/7767-17
Front View
Front View
. Power Package To-202 (P)
Order Number LM320MP-5.0,
LM320MP-12 or LM320MP-15
See NS Package Number P03A
Power Package TO-220 (T)
Order Number LM32OT-5.0, LM320T-12 or LM320T-15
See NS Package Number T03S
Schematic Diagrams
-5V
AlB
Rig
4k
5k
An
1)3
6.2V
R20
20.
R21 Al&
150 0.05
V.N O-....-6-....- -....-
------------l
....- ....- -....- - - - - - -....- ...
TlIH/7767-18
1-74
Schematic Diagrams (Continued)
-12Vand -15V
RIS
RU
4k
5k
R17
RZI RI6
50 0.05
VINo-~~--+---~~~--~----~------------~--~---------------------J
TUH/nS7-19
1·75
~National
~ Semiconductor
LM 123A/LM 123/LM323A/LM323
3-Amp, 5-Volt Positive Regulator
General Description
The LM123 is a three-terminal positive regulator with Ii preset 5V output and a load driving capability of 3 amps. New
circuit design and processing techniques are used to provide the high output current without sacrificing the regulation
characteristics of lower current devices.
The LM123A and LM323A offer improved precision over the
standard LM123 and LM323. Parameters with tightened
specifications include output voltage tolerance, line regulation, and load regulation.
The 3 amp regulator is virtually blowout proof. Current limiting, power limiting, and thermal shutdown provide the same
high level of reliability obtained with these techniques in the
LM1091 amp regulator.
No external components are required for operation of the
LM123. If the device is more than 4 inches from the filter
capacitor, however, a 1 IJ-F solid tantalum capacitor should
be used on the input. A 0.1 IJ-F or larger capacitor may be
used on the output to reduce load transient spikes created
by fast switching digital logic, or to swamp out stray load
capacitance.
An overall worst case specification for the combined effects
of input voltage, load currents, ambient temperature, and
power dissipation ensure that the LM123 will perform satisfactorily as a system element.
For applications requiring other voltages, see LM150 series
adjustable regulator data sheet.
Operation is guaranteed over the junction temperature
range -55'C to +150'C for LM123A1LM123, -40'C to
+ 125'C for LM323A, and O'C to + 125'C for LM323. A hermetic TO-3 package is used for high reliability and low thermal resistance.
Features
•
•
•
•
•
•
•
Guaranteed 1% initial accuracy (A version)
3 amp output current
Internal current and thermal limiting
0.01 n typical output impedance
7.5V minimum input voltage
30W power dissipation
100% electrical burn-in
Connection Diagram
Metal Can Package
OUTPUT
X
GND
(CASE)
~
INPUT).(
TL/H/7771-2
Order Number LM123AK STEEL, LM123K STEEL, LM323AK STEEL or LM323K STEEL
See NS Package Number K02A
Typical Applications
Basic 3 Amp Regulator
t--.--o Vour 'sv
'V ,N 0 - -...........-1
CIN •
+
l"F
SOLID
TANTALUM
TL/HI7771-3
'Required if LM123 is more than 4" from filter capaCitor.
tRegulator is stable with no load capacitor into resistive loads.
1-76
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 4)
Input Voltage
Power Dissipation
Storage Temperature Range
20V
+ 150'C
300'C
ESD Tolerance (Note 5)
2000V
Preconditioning
Internally Limited
Operating Junction Temperature Range
LM123A, LM123
-55'Cto
LM323A
-40'C to
LM323
O'C to
-65'Cto
Lead Temperature (Soldering, 10 sec.)
Burn-In In Thermal Limit
100% All Devices
+ 150'C
+ 125'C
+ 125'C
LM123A/LM123 Electrical Characteristics (Note 1)
Parameter
Output Voltage
LM123A
Conditions
TI = 25'C
VIN = 7.5V, lOUT
= OA
7.5V :;; VIN :;; 15V
OA :;; lOUT:;; 3A, P :;; 30W
LM123
Units
Min
Typ
Max
Min
Typ
Max
4.95
5
5.05
4.7
5
5.3
V
·5.15
4.6
5.4
V
4.85
Line Regulation (Note 3)
TI = 25'C
7.5V :;; VIN :;; 15V
5
10
5
25
mV
Load Regulation (Note 3)
Ti = 25'C, VIN = 7.5V,
OA:;; lOUT:;; 3A
25
50
25
100
mV
Quiescent Current
7.5V :;; VIN :;; 15V,
OA:;; lOUT:;; 3A
12
20
12
20
mA
Output Noise Voltage
Ti = 25'C
10 Hz:;; f :;; 100 kHz
40
Short Circuit Current Limit
Ti = 25'C
VIN = 15V
VIN = 7.5V
3
4
Long Term Stability
40
4.5
6
3
4
35
Thermal Resistance Junction
to Case (Note 2)
2
2
/LVrms
4.5
5
A
A
35
mW
-
'C/W
•
1-77
LM323A/LM323 Electrical Characteristics (Note 1)
LM323A
Parameter
Conditions
Tj = 25'C
VIN = 7.5V, lOUT
Output Voltage
=
OA
7.5V,;:; VIN ,;:; 15V
OA ,;:; lOUT';:; 3A, P ,;:; 30W
LM323
Units
Min
Typ
Max
Min
Typ
Max
4.95
5
5.05
4.8
5
5.2
V
5.15
4.75
5.25
V
4.85
Line Regulation (Note 3)
Tj = 25'C
7.5V,;:; VIN ,;:; 15V
5
10
5
25
mV
Load Regulation (Note 3)
Tj = 25'C, VIN = 7.5V,
OA,;:; lOUT';:; 3A
25
50
25
100
mV
Quiescent Current
7.5V';:; VIN ,;:; 15V,
OA,;:; lOUT';:; 3A
12
20
12
20
mA
Output Noise Voltage
Tj = 25'C
10 Hz ,;:; f ,;:; 100 kHz
40
Short Circuit Current Limit
Tj = 25'C
VIN = 15V
VIN = 7.5V
40
3
4
4.5
3
4
6
Long Term Stability
35
Thermal Resistance Junction
to Case (Note 2)
",Vrms
4.5
5
A
A
35
mW
'C/W
2
2
Note 1: Unless otherwise noted. specifications apply for -SS'C ,; Ti ,; + IS0'C for the LM123A and LM123, -40'C ,; TJ ,; + 12S'C for the LM323A, and O'C ,;
Ti ,; + 12S'C for the LM323. Although power dissipation is internally limited. specifications apply only for P ,; 30W.
Note 2: Without a heat sink, the thermal resistance of the TO-3 package is about 3S'C/W. With a heat sink, the effective thermal resistance can only approach the
specified values of 2'C/W, depending on the efficiency of the heat sink.
Note 3: Load and line regulation are specified at constant junction temperature. Pulse testing is required with a pulse width :s;: 1 ms and a duty cycle
Note 4: Refer to RETS123K drawing for LM123K, and to RETS123AK for LM123AK military specifications.
Note 5: Human body model. 1.5 kG in series with 100 pF.
Typical Applications (Continued)
Adjustable Output 5V -1 OV 0.1 % Regulation
II
+VIN
/
I
3
tr
7
lM105
3
6
Cl
--50,F
R3'
6.8K
R2
3.6K
...
RL
5
4
VOUT (5V)
D2
1~57
LMI03
4.7V
8
I
2
2
LMI23
RI
1Zn
RO"
!
25mA
+
CL- ' ?5"FT
V-
-=
UNREGULATED
'Select to Set Output Voltage
TL/H/7771-4
"Select to Draw 25 rnA from V-
1-78
$;
5%.
r-
Typical Performance Characteristics
==
-"
N
Co)
):.
Maximum Average Power
Dissipation for LM123A, LM123
.. r---,.--,--,---,
I... H~~~~~~~ i
i.
I
i!:
i
i
..
100
7S
I
50
15
100
==
Co)
N
L
10
100
Co)
I
lK
10K
lOOK 1M
FREQUENCY IH.I
Short Circuit Current
..
:;:
.5
~..
~
~
>
ffi
I""'iili ~
TI.!SS'C
r-T~~~
,
.....
N
Ripple Rejection
-TI -2S'e
:::s::~
10
IS
20
1.0
t-
i5
1.5
-
1.0
~
!:l
ILT1A
f::::::::
20
15
_i
5.0
lUg
2.5
ii
......
I
\
~~ -2.&
~~
....
~~
i!~
e
o
.
....
~
V
-5.0
c
4.90
.S
-IS -50 -IS
.
....
~§
;~
0.2
VIN -,OV
T,'2S'C
~
/
/
~
f--0.2
~
...
I\.
~~;I~~~NTALUM
CL -D.1"F
1.0
OUtl)ut Noise Voltage
i
.:!
!
:=
~
!il
0.1
~
c
z
~
/
•oII
..
.
..~
S
I
'I.
;!:>
gl!!l
I
0 Ii 50 75 100125 IIlI
TEMPERATURE ('CI
Load Transient Response
~
......
4.15
TIME ""I
TI" -5S'C .......
10K lOOK 1M
--
-
5.D5
> 5.00
~
1.0
Quiescent Current
IK
VIN = 10V
IL"'ZIImA
~
lUNcnON TEMPERATURE rCI
TJ 'li'C:::"TI='12S"C
5.10
!:i
-IS -10 -ZS 0 ZS 50 75 100 '15 150
I
100
Output Voltage
~15
~
I
LL
II
10
FREQUENCY 1Hz)
IL -lS0mA
CL ·O.lpF TI ,2S"C _
~
~
~~
0.5
7.5
~z
»
~
I
40
10
'0
5
Line Transient Response
;!:
II
60
t;
INPUT VOLTAGE (VI
Lt+=
IL'IOO~
;!i
"'
o
Dropout Voltage
~
D
:!!
:::
INPUT VOLTAGE IVI
i
r-
TANTALUM
TA - AM81ENT TEMPERATURE I'CI
TI ~ lS'e
S
'4
~
.......
C~;Lll~F
/
-VIN"7.IV
IS
o
Ii
I
10~~~=-~~~~~--~
B
I.S
==
N
=ZITHERMAL EFFECT! IT.-.!.;;::;-
""'-l.
lIS
T,.JSS"C
T,'I:sa"C
i
Co)
T.- 2S'e
80
I--
~
I!
1"-1
Co)
==~1N'15V
Peak Available Output Current
~
CL··M_-J
.......
r-
30~~~~r-~r-~
8
.
~.
..
-"
N
lOUT -1A
I
III
==
Output Impedance
~
T.- AMBIENT TEMPERATURE I'CI
~
.......
r-
Maximum Average Power
Dissipation for LM323A, LM323
~
12
INPUT VOLTAGE (VI
18
10
.01
TIME
""I
"
IDI
IK
10K
FREQUENCY 1Hz!
TL/H/777' -5
1·79
Typical Applications (Continued)
10 Amp Regulator with Complete Overload Protection
HI
.10
zw
H4'
-ZOmA
HZ
.10
ZW
-R5'
ZOmA
R3
.10
ZW
-V ,N
VOUT
+5V
o-...-"\I\;I\,-. .---------+--~
t'N
I,.F
SOLID
TANTALUM
'Select for 20 mA Current from Unregulated Negative Supply
TL/H/7771-6
Adjustable Regulator OV-10V
IZV'; V,N
,;
@
3A
20V
:!:.L..
HI'
..,..... CI
10K
R4
IK
H5
UK
V-
'R6=-12mA
Al-LM101A
.,. (-IOV TO ZOV)
NEED NOT BE REGULATED
CI-2 ,.F Optional-Improves Ripple Rejection, Noise, and Transient Response
1-80
TL/H/7771-7
r
Typical Applications
:s::
......
(Continued)
N
~
......
Trimming Output to 5V
r
:s::
......
..,:...........- ...........-<> '5V
N
Co)
CONL
RJ
..."V'I/'v....<;;IK
II'F--
I
Rl
I
12n
......
_I_C,
r
:s::
1j&F
Co)
N
Co)
»
......
r
:s::
V-5V TO -15V
REGULATED
Co)
N
Co)
TLlH/7771-B
Schematic Diagram
INPUT
OUTPUT
R21
5K
R22
OK
DJ
62
03
1.
....
L---4~-~-"~'--
A4
101
RI
RI
RII
12K
lK
4K
R23
024
l'
__----..----..
----__
20.
"---4~~-~--~~
e-<>GND
TLlH/7771-1
1-81
U) , - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ,
N
. CO)
:I ~National
iij ~ Semiconductor
....
:I LM 125/LM325/LM325A, LM 126/LM326 Voltage
~N Regulators
CO)
~ General Description
U;
N
CO)
~
.....
LC)
....:::E
N
....I
Features
These are dual polarity tracking regulators designed to provide balanced positive and negative output voltages at current up to 100 mA, the devices are set for ± 15V and ± 12V
outputs respectively. Input vO.ltages up to ± 30V can be
used and there is provision for adjustable current limiting.
These devices are available in two package types to accommodate various power requirements and temperature
ranges.
• ± 15V and ± 12V tracking outputs
• Output current to 100 mA
• Output voltage balanced to within 1% (LM125, LM126,
LM325A)
• Line and load regulation of 0.06%
• Internal thermal overload protection
• Standby current drain of 3 mA
• Externally adjustable current limit
• Internal current limit
Schematic and Connection Diagrams
...-___....._-..:._..,.._____-'--__r--.,--o0
Dual-In-Une Package
III
'4 +SENSl
+ ......
13 +CtJRRENT
lit
u.~
"NC
+v.
L----'-'-+=-t--00 III
1}----JViiI.---.....-o0) ""
L-.-.-..,..-.,.----p--o 0 ""
-VIN
-CUIUIBIf
IJMIT
-
.....
•
NC
-......
-vour
TL/HI7776-2
Top View
Order Number LM325AN,
LM325N or LM326N .
See NS Package Number N14A
0
Metal Can Package
111
GIlD
-VIN
Case connected to - VIN
TLlHI7776-3
Top View
CD I"
-_-0 CD
;1-=-+-"--___
III
(')1111
TLlHI7776-1
1-82
Order Number LM125H,
LM325H, LM126H or LM326H
See NS Package Number H10C
r3:
Absolute Maximum Ratings
Operating Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 5)
Operating Free Temperature Range
LM125
LM325, LM325A
- 55'C to + 125'C
O'Cto +70'C
Storage Temperature Range
-65'C to + 150'C
Input Voltage
Lead Temperature (Soldering, 10 sec.)
±30V
Forced Vo+ (Min) (Note 1)
-0.5V
Forced Vo- (Max) (Note 1)
+0.5V
Power Dissipation (Note 2)
-"
N
300'C
3:
Ct.)
N
U1
.....
r-
3:
Ct.)
N
U1
>
.....
r-
PMAX
Continuous
Output Short-Circuit Duration (Note 3)
U1
.....
r-
3:
Electrical Characteristics
-"
N
Parameter
Conditions
Output Voltage
LM125/LM325A
LM325
Tj
Min
Typ
Max
Q)
Input·Output Differential
15
15
15.2
15.5
2.0
Line Regulation
VIN = lBVt030V, IL
Tj = 25'C
Line Regulation Over Temperature Range
VIN
Load Regulation
Vo+
Vo-
IL
Tj
= 0 to 50 mA, VIN = ±30V,
= 25'C
= 20 mA,
Load Regulation Over Temperature Range
Vo+
Vo-
IL
= 0 to 50 mA, VIN = ±30V
Output Voltage Balance
LM125, LM325A
LM325
Tj
Output Voltage Over Temperature Range
LM125, LM325A
LM325
P ,;; PMAX, 0 ,;; 10 ,;; 50 mA,
lBV,;; IViNI ,;; 30
= 1BV to 30V, IL = 20 mA,
V
2.0
10
mV
2.0
20
mV
3.0
5.0
10
10
mV
mV
4.0
7.0
20
20
mV
mV
±150
±300
mV
mV
15.35
15.73
V
V
14.65
14.27
Temperature Stability of Vo
= 25'C
Output Noise Voltage
±0.3
%
260
mA
Tj
= 25'C, BW = 100 - 10 kHz
150
Positive Standby Current
Tj
= 25'C
1.75
3.0
Negative Standby Current
Tj
= 25'C
3.1
5.0
Long Term Stability
(Still Air)
(400 Lflmin Air Flow)
Junction to Ambient
LM325AN, LM325N
V
V
= 25'C
Tj
(Still Air)
",Vrms
mA
mA
0.2
%/kHr
20
215
B2
'C/W
'C/W
'C/W
90
'C/W
Note 1: That voltage to which the output may be forced without damage to the device.
Note 2: Unless otherwise specified these specifications apply for Tj = 55°C to
LM325, VIN
~
±20V, IL
~
a rnA, IMAX ~
100 rnA, PMAX
~
3:
Ct.)
N
14.B
14.5
Thermal Resistance Junction to
Case (Note 4)
LMI25H, LM325H
Junction to Ambient
Junction to Ambient
Units
= 25'C
Short Circuit Current Limit
.....
rQ)
LMI25/LM325/LM325A (Note 2)
+ 150°C on
2.0W for the Hl0 Package.IMAX
LM125, Tj
~
=
O°C to -+- 125°C on LM325A, Tj = O°C to
100 mA.IMAX
~
100 rnA, PMAX
~
+ 125°C on
1.0W forthe DIP N Package.
Note 3: If the junction temperature exceeds 150°C, the output short circuit duration is 60 seconds.
Note 4: Without a heat sink, the thermal resistance junction to ambient of the H10 Package is about 155°C/W. With a heat sink, the effective thermal resistance
can only approach the junction to case values specified, depending on the efficiency of the sink.
Note 5: Refer to RETS125X drawing for military specification of LM125.
1-B3
Absolute Maximum Ratings
Operating Conditions
If Military/Aerospace specified dev:lces are required,
please contact the National Semiconductor sales
Office/Distributors for availability and specifications.
(Note 5)
Input Voltage
±30V
Forced Vo + (Min)(Note 1)
-0.5V
Forced Vo- (Max) (Note 1)
+0.5V
Power Dissipation (Note 2)
Internally Limited
Output Short·Circuit Duration (Note 3)
Continuous
Operating Free Temperature Range
LM126
LM326
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
- 55'C to + 125'C
O'Cto +70'C
-65'C to + 150'C
300'C
Electrical Characteristics LM126/LM326 (Note 2)
Parameter
Output Voltage
LM126/LM326
Conditions
Min
Typ
Max
Units
11.8
11.5
12
12.2
12.5
V
V
Tj = 25'C
Input·Output Differential
2.0
V
Line Regulation
VIN =.15Vt030V
IL = 20 mA, TI = 25'C
2.0
10
mV
Line Regulation Over Temperature Range
VIN = 15Vto 30V,IL = 20 mA
2.0
20
mV
Load Regulation
Vo+
Vo-
IL = 0 to 50 mA, VIN = ±30V,
T] = 25'C
3.0
5.0
10
10
mV
mV
Load Regulation Over Temperature Range
Vo+
Vo-
IL = 0 to 50 mA, VIN = ±30V
4.0
7.0
20
20
mV
mV
Output Voltage Balance
LM126, LM326
TI = 25'C
±125
±250
mV
mV
Output Voltage Over Temperature Range
LM126
LM326
P ~ PMAX,O ~ 10
15V ~ IVINI ~ 30
12.32
12.68
V
V
~
50mA,
Temperature Stability of Vo
11.68
11.32
±0.3
%
260
mA
Short Circuit Current Limit
TI = 25'C
Output Noise Voltage
Tj = 25'C, BW = 100 - 10 kHz
100
Positive Standby Current
l"L = 25'C, IL = 0
1.75
3.0
TI = 25'C, IL = 0
3.1
5.0
Negative Standby Current
Long Term Stability
Thermal Resistance Junction to
Case (Note 4)
LM126H, LM326H
Junction to Ambient
Junction to Ambient
(Still Air)
(400 Lflmin Air Flow)
",Vrms
mA
mA
0.2
%/kHr
20
155
62
'C/W
'C/W
'C/W
Junction to Ambient LM326N
150
'C/W
Note 1: That voltage to which the output may be loread without damage to the device.
Note 2: Unless otherwise specified these specifications apply 10rTI = 55'Cto +150'C on LM126, TJ = O'Cto + 125'C on LM326, VIN = ±20V,IL = 0 mA,lMAX
= 100 mA, PMAX = 2.0W lor the H10 Package. IMAX = 100 mAo IMAX = 100 mA, PMAX = 1.0W lor the DIP N Package.
Nole 3: II the junction lemperature exceeds 150'C, the output short circuit duration Is 60 seconds.
Nole 4: Without a heat sink, the thenmal resistance junction to ambient of the Hl 0 Package is about 155'C/W. With a heat sink, the effective thenmal resistance
can only approach the junction to case values specified, depending on the efficiency 01 the sink.
Note 5: Reier to RETS126X drawing lor military specification 01 LM126.
1·84
Typical Performance Characteristics
LM125 Load Regulation
~
2.0
~
4.0
"'
6.0
8.0
,--
~
~
"
.~~
NEG
10
12
!
~
:i_,,~
~~~ ~
-
_ _ _ ~,: ~~~~~c_ , - I-
16
18
- - - 1:".25-C -
o
20
.
...... ~
I
I
,.
20
-
POS REG =
~
LM126 Load Regulation
40
60
80
~
~
,.
5;
I;
•
Q
1-..~
2.0
~
poinh-f
T,'+25'~r....
6.0 TI·+1511'~.....
1.0 '." -&S'C
NE~. nIEG.! /
10 T," -55'~1
12
'." +25'C
14 T.
4.0
a
100
LM125/126 Regulator
Dropout Voltage for
Negative Regulator
2.0
;: 400
1.51--1--1--b/'--i----i
is
i--i--b"'--t-7'r-;
...~
0.5 l----ihl~~:;o>'~'-:1;;:--t
"'"
20
iii
40
50
.... r-.
.......
>-....
/
'\.
I'...
2D
BO
&0
40
80
100
~
. . . f:::
200
POSITIVE
REGULATOR
:::::~
'"
~
10
'"~
os
'"
;;
iii
r-
~ ~~
20
40
rTT
50
-50
100
~
~ 0.60
~~
-55 -25
TIi.
~>
"I'-..
0.70
ill
; 0.60
"1"-
I",
0.40
..'"
~ 0.30
r---
... 0.20
-50 -25 0 25 50 15 100 125 150
T. - AMBIENT TEMPERATURE I'C!
!
i
i'
"i'
B030
-so
-25
0 25
so
15 100 121
no
JUNCTION TEMPERATURE I'CI
LM126
Load Transient Response
+1&0
o-IOmA
NEGA liVE REGULATOR
loll-
t.11 -0 -10 rnA
- SUPPLY
i'
0.40
LM125
Load Transient Response
for Negative Regulator
4.0
AMBIENT TEMPERATURE I'CI
0.50
JUNCTION TEMPERATURE I'C)
LM125/126
Standby Current Drain
"
"25 ·50 "15 .100 +125
~ 090
0.50
100
-
0
LM 125/126 Current Limit Sense
Voltage vs Temperature
for Positive Regulator
.. 0.80
Iii
15
..........
I
0.1
150
r......
!:
!
I
O
_ 0.80
:;
100
=NO HEAT~~~
JUNCTION TEMPERATURE I'CI
~ 0.70
10
INFINITE HEAT SINK
Hl0
-=
1.0
LM125/126 Current Limit Sense
Voltage vs Temperature
tor Negative Regulator
~
60
LM125/126 Maximum Average
Power Dissipation vs
Ambient Temperature
10
N~ i-
100
100
10
TA '" -55·C
V-
1.5
LOAD CURRENT (mAl
II
i"-
LOAO CURRENT 1m A!
50
...
~VO's 1~0 ~V
lOO
LM325/326 Maximum Average
Power Dissipation vs
Ambient Temperature
25
6
T,.,%
·55'C
~
sao
.s...
~
;;
'
...... ""'17"
LM125/126 Peak Output
Current vs
Junction Temperature
i'"
1.0
/
2.0
LOAD CURRENT ImAI
2.5 ,.....~r--r-~r--r-"""""
'"I;
i!~
~'"
~K
".,5"C
a
~
...6
-
25
~
I I I
16
LOAD CURRENT ImAI
-
... ....
LM125/126 Regulator
Dropout Voltage for
Positive Regulator
+100
l.O TA =j2S'C
'50
T.. '" +125'C
2.0
1.0
./
TA = -51'C
TA • +25'C
T.. " +125'C
18
20
~V
V
22
24
'SD
:\11
• SUPPLY
I"
-50
-so
-100
-100
IL "0
25
INPUT VOLTAGE ltV!
28
lO
TIME !1J101l0IVI
TIME l1~'OIVJ
TLlHI7776-4
1-85
Typical Performance Characteristics
(Continued)
LM125
Load Transient Response
LM126
for Positive Regulator
Load Transient Response
<40
;;
61,
..
Ii
..
.~ -zO
:;.'"
~
z
~DI_IIO~A
VI\
~
II
~
co
co
co
§:
§:
5
~
-60
~
~
-60
~
r-T. .-T-r-T.....-..-r-r...,.....-,,-,
=
+ZOD
H--t.+-H++--H-++-H-,j
~
+100
H~it-H++-H-++-H--;
~
~~~ 1~
TO -Z3V
~
>
I
-100
..
;;
3
•
5
10
ZO
3D
40
1,1-ll~I~A'
""
'"ew
!
___
5
!~
I lite
tjlllttltfllill-trf'!!1IH
WillI.
t t.i.I., . . .
1.0
J
0.1
.."
==
PO~ln~~ REGU~~.'OR
Uk
I,' IGlnA
V,. -+2'V
211 INPUT RIPPLE -10 V..
~ftiffilrl
3D rtHttmrrH-Hffl-t~~~~Htt~
40
L&l"-REG
!ii
c
~
CL • I/oiF
_ _ C,-Oj,
100
LM126
Ripple Rejection
Frequency
10
NEGATlV:L
ur:.~
-50
TIME II""IDIVI
i
1-'
70
10
VB
IIII II! II
6D
~ +50
10
REGUI~~~OR
i. ~
!
c
LM125
Output Impedance
VI71;1:1~5V
,
.'" 1'\
..,
.~ 1
I 1
TIME (lO",IDIVI
INPUT RIPPLE -10 V, .•
50
'VIN " ,5V TO -18V
IL ='OmA
NEGATIVE REGULATOR
-100
LM125
Ripple Rejection
0
;;
~
:: +100
....>
~ -100
I
-200
LM126
Line Transient Response
+150
w
......~
TIME 1l.,IDlvl
....
:z:v
co
>
i..
TlMEI~DIVI
.300
~
co
~
-200
LM125
Line Transient Response
for Negative Regulator
II
+100
jJ
TIME IljalDIVI
.VIN " +'OV TO +23V
IL '" IOmA
POSITIVE REGULATOR
c
1
~ -100
-40
LM126
Line Transient Response
~
t
+100
~
TlMEII,..,OIVI
! ..zoo
"'VIN .. +lOY TO +ZlV
IL '" lOrnA
Ii
~
~ -20
-40
+300
-+300
~
~ +ZOO
~
>
.'"
~..
..
;;
AIL cO-1DmA
POSITIVE REGULATOR
'20
=
LM125
Line Transient Response
for Positive Regulator
0.01
lOOk
1M
100
fREQUENCY IH,I
!.Ok
10k
lOOk
1M
fREOUENCY IH,)
100
1.0k
10k
F~EOUENCY
lOOk
!.OM
IHr!
LM126
Output Impedance
va Frequency
10
i
'"ew
..
1.0
i....
~
0.1
!iic
..
1.0k
10k
lOOk
1.0M
fREOUENCY IH'I
TL/HI7776-5
1·86
Typical Applications
Basic Regulatorttt
r--r--I
GND -
-
'Ctt...L.
1PF~
I -+-+~
.V OUT
TLlH/7776-10
tSolid tantalum
ttShort pins 6 and 7 on dip
• Required if regulator is located an appreciable distance from power supply
filter.
"Although no capacitor is needed for stability, It does help transient re·
sponse. (If needed use 1 p.F electrolytic).
1·89
~
~
~
:!l....
,----------------------------------------------------------------------------,
~National
...., ~ Semiconductor
~
~
:!l LM 133/LM333 3-Ampere Adjustable Negative Regulators
General Description
Features
The LM133/LM333 are adjustable 3-terminal negative voltage regulators capable of supplying in excess of -3.0A
over an output voltage range of -1.2V to '-32V. These
regulators are exceptionally easy to apply, requiring only 2
external resistors to set the output voltage and 1 output
capacitor for frequency compensation. The circuit design
has been optimized for excellent regulation and low the mal
transients. Further, the LM133 series features internal current limiting, thermal shutdown and safe-area compensation, making them virtually blowout-proof against overloads.
•
•
•
•
•
•
•
•
•
•
•
The LM133/LM333 serve a wide variety of applications including local on-card regulation, programmable-output voltage regulation or precision current regulation. The LM133/
LM333 are ideal complements to the LM150/LM350 adjustable positive regulators.
Connection Diagrams
Output voltage adjustable from -1.2V to -32V
3.0A output current guaranteed, - 55°C to + 150"C
Line 'regulation typically O.ot %IV
Load regulation typically 0.1 %
Excellent rejection of thermal transients
50 ppm/DC temperature coefficient
Temperature-independent current limit
Internal thermal overload protection
100% electrical burn-in
Standard 3-lead transistor package
Output is short circuit protected
Typical Applications
Adjustable Negative Voltage Regulator
TO-3
Metal Can Package
CASEIS
+
-VIN
C2*
120
TUH/9065-1
Bottom View
Steel To-3 Metal Can Package (K
STEEL)
Order Number LM133K STEEL or
LM333K STEEL
See NS Package Number K02A
ADJUST
1--4~-...- - -VOUT
TUH/9065-3
Full output current not available at high input-output voltages.
-Vour = -1.25V ( 1 + 1:~n) + ( -IADJ X R2)
tCI = I ",F solid tantalum or 10 ",F aluminum electrolytic required for stability.
'C2 = I ",F solid tantalum Is required only If regulator is more than 4' from power supply fiRer capaci-
To-220
Plastic Package
0
-YlN-....- - I
tor.
TAB IS
Output capaCitors in the range of I ",F to 1000 ",F of aluminum or tantalum electrolytic ara commonly
used to provide Improved output impedance and rejection of transients.
-VIN
VoUT
VtN
TUH/9065-2
Bottom View
3-Lead TO-220 PlastiC Package (T)
Order Number LM333T
See NS Package Number T03B
1-90
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Power Dissipation
Internally Limited
Storage Temperature
Lead Temperature (Soldering, 10 sec.)
TO-3 Package
TO-220 Package
35V
Input-Output Voltage Differential
Operating Junction Temperature Range
TMINtoTMAX
LM133
- 55·C to + 150·C
-40·C to + 125·C
LM333
-65·C to
+ 150·C
300·C
260·C
Preconditioning
100% All Devices
Burn-In In Thermal Limit
Electrical Characteristics LM 133 (Note 1) (Note 5)
Parameter
Reference Voltage
Conditions
Typical
TJ = 25·C, IL = 10 rnA
TMIN ~ TJ ~ TMAX, 3V ~ IVIN - vOUTI ~ 35V,
10 rnA ~ IL ~ 3A, P ~ PMAX
LM133
LM133
Line Regulation
TJ = 25·C, 3V ~ MN - vOUTI ~ 35V,
lOUT = 50 rnA (Note 2)
LM133
Load Regulation
TJ = 25·C, 10 rnA ~ lOUT s; 3A, P ~ PMAX
(Notes 2 and 6)
LM133
Thermal Regulation
TJ = 25·C,10 ms Pulse
Tested Limit
(Note 3)
Design Limit
(Note 4)
Units
(Max Unless
Noted)
-1.250
-1.238
-1.262
V(MIN)
V(MAX)
-1.250
-1.225
-1.275
V(MIN)
V(MAX)
0.Q1
0.02
%N
0.02
0.05
%N
0.2
0.5
%
0.4
1.0
%
0.002
0.Q1
%/W
Temperature Stability
TMIN ~ TJ ~ TMAX
0.4
Long Term Stability
TJ = 125·C, 1000 Hours
0.15
Adjust Pin Current
TJ = 25·C
LM133
LM133
65
90
70
100
2
2
5
5
2.5
5.0
rnA
1.2
2.5
rnA
3.9
3.0
A(MIN)
2.4
1.25
A(MIN)
0.4
0.3
Adjust Pin Current
Change
TJ = 25·C,10 rnA ~ IL ~ 3A
TJ = 25·C, 3.0V ~ IVIN - vOUTI ~ 35V
Minimum Load
Current
IVIN - vOUTI ~ 35V, TJ = 25·C
LM133
MN - vOUTI ~ 10V, TJ = 25·C
LM133
Current Limit
(Note 6)
3V ~ IVIN - vOUTI s; 10V, TJ = 25·C
LM133
MN - vOUTI= 20V, TJ = 25·C
LM133
MN - vOUTI = 30V, TJ = 25·C
LM133
%
0.8
%
/LA
/LA
8
8
/LA
/LA
A(MIN)
0.003
0.010
% (rms)
60
77
55
70
dB
dB
TO-3 Package (K STEEL)
TO-220 Package In
1.2
3
1.8
4
·C/W
·C/W
LM133
LM133
163
190
·C(MIN)
·C(MAX)
Output Noise
(%ofVOUT)
10 Hz to 10 kHz, TJ = 25·C
Ripple Rejection
VOUT = 10V, f = 120 Hz, TJ = 25·C
CADJ = O/LF
CADJ = 10/LF
Thermal Resistance
Thermal Shutdown
Temperature
1-91
150
Electrical Characteristics LM 133 (Note 1) (Note 5)
Parameter
Reference Voltage
Typical
Conditions
TJ
= 25°C, IL = 10 mA
-1.250
TMIN :s; TJ :s; TMAl<, 3V :s; iVlN - vOUTI :s; 35V,
10 mA:s; IL:S; 3A, P:S; PMAX
Line Regulation
Load Regulation
Thermal Regulation
TJ = 25°C,3V :s; IVIN - vOUTI :s; 35V,
lOUT = 50 mA (Note 2)
TJ
= 25°C, 10 ms Pulse
TMIN :s; TJ :s; TMAX
TJ
TJ
Adjust Pin Current
Change
= 25°C, 10 mA :s; IL :s; 3A
= 25°C, 3.0V:s; IVIN :s; s: 35V
iVlN - vOUTI :s; 35V, TJ = 25°C
iVlN - vOUTI :s; 10V, TJ = 25°C
3V :s; iVlN - vOUTI :s; 10V, TJ = 25°C
iVlN - vOUTI = 20V, TJ = 25°C
IVIN - vOUTI = 30V, TJ = 25°C
10 Hz to 10 kHz, TJ = 25°C
0.2
Current Limit
(Note 6)
Output Noise
(% ofVOUT)
Ripple Rejection
Thermal Resistance
Junction to Case
%/V
%/V
1.5
%
%
0.02
%/W
%
0.2
TJ
TJ
VOUT = 10V, f
CADJ = 0 p.F
CADJ = 10 p.F
0.07
1.0
O.B
%
95
100
p.A
p.A
2.5
2.5
7
7
8
8
p.A
p.A
2."
1.'"
10
5.0
10
5.0
mA
mA
3.9
2.4
2.0
1.0
0.20
3.0
1.0
0.2
A(MIN)
A(MiN)
A(MIN)
0.003
0.010
% (rms)
60
50
66
dB
dB
1.2
3
1.B
4
°C/W
°C/W
163
150
190
°C(MIN)
°C(MAX)
70
Minimum Load
Current
-1.213
-1.287
0.5
65
Units
(MaxUnleaa
Noted)
V(MIN)
V(MAX)
V(MIN)
V(MAX)
0.004
0.4
0.002
= 125°C, 1000 Hours
= 25°C
Long Term Stability
Adjust Pin Current
-1.2110
0.001
Design Limit
(Note 4)
-1.225
-1.275
0.02
TJ = 25°C, 10 mA:s; IOUT:S; 3A, P:S; PMAX
(Notes 2 and 6)
Temperature Stability
Tested Limit
(Note 3)
0.4
= 120 Hz, TJ = 25°C
77
TO·3 Package (K STEEL)
TO·220 Package (T)
Thermal Shutdown
Temperature
Thermal Resistance
KPackage
35
°C/W
Junction to Ambient
(No Heatsink)
TPackage
50
°C/W
Not. 1: Unles.oth.rwlse.paclfi.d. th••••p.cification. apply: -65'C:S: TJ :s: +150'Clorth. LMt33;and -4O'C:s: TJ + 125"Clorth. LM333; IVIN - vOUTI =
5V; and lOUT = O.5A. Although pow.r dissipation I. Int.mally IImlt.d, th.s••paclflcatlons are appllcsbl. lor pow.r dls.ipations up to 30W.
Note 2: Regulation Is measur.d at constant junction temp.rature, using pul•• testing wlth a low duty cycle. Chang•• In output voltag. due to heating aff.cts are
cov.rad under th. spscHicstion lor th.rmal ragulation. Load regulation I. measured on th. output pin at a point 1/8' below the base alth. T0-3 paci
::J:
.....
C')
C')
::ill
...I
:>
::J:
.....
C')
.,...
::ill
...I
Thermal Regulation
When power is dissipated in an IC, a temperature gradient
occurs across the IC chip affecting the individual IC circuit
components. With an IC regulator, this gradient can be especially severe since power dissipation is large. Thermal
regulation is the effect of these temperature gradients on
output voltage (in percentage output change) per Watt of
power change in a specified time. Thermal regulation error
is independent of electrical regulation or temperature coefficient, and occurs within 5 ms to. 50 ms after a change in
power dissipation. Thermal reguliltion depends on IC layout
as well as electrical design. The thermal regulation of a voltage regulator is defined as the percentage change of VOUT,
per Watt, within the first 10 ms after a step of power is
applied. The LM137HV's specification is 0.02%/W, max.
In Figure 1, a typical LM137HV's output drifts only 3 mV (or
0.03% of VOUT = -10V) when a 10W pulse is applied for
10 ms. This performance is thus well inside the specification
limit of 0.02%/W x 10W = 0.2% max. When the 10W pulse
is ended, the thermal regulation again shows a 3 mV step as
the LM137HV chip cools off. Note that the load regulation
error of about 8 mV (0.08%) is additional to the thermal
regulation error. In Figure 2, when the 10W pulse is applied
for 100 ms, the output drifts only slightly beyond the drift in
the first 10 ms, and the thermal error stays well within 0.1 %
(10 mY).
r
r
0.1% 1-+--1f-+--1-+-t-+-+-+--1
0.1%
L~~~~~~~~~
./
1--l/i""'1F~*~=(--I--+--+---l
L~~~~~~~~~
i\
-I
10ms
I-
1---100 ms---l
TL/H/9066-3
LM137HV, VOUT
~
TL/H/9066-4
-10V
LM137HV, VOUT
V,N-VOUT ~ -40V
IL
~
V,N-VOUT
OA .... O.25A .... OA
IL
Vertical sensitivity, 5 mV Idiv
~
~
~
-10V
-40V
OA .... O.25A .... OA
Horizontal sensitivity, 20 ms/div
FIGURE 1
FIGURE 2
Connection Diagram (See Physical Dimensions section for further information)
TO-3
Metal Can Package
TO-39
Metal Can Package
. -.....- - ADJUSTMENT
o-_"---INPUT
CASE IS INPUT
TL/H/9066-6
Bottom View
TL/H/9066-S
Order Number LM137HVH or LML337HVH
See NS Package Number H03B
Bottom View
Order Number LM137HVK Steel or LM337HVK Steel
See NS Package Number K02A
10106
Typical Applications (Continued)
Adjustable High Voltage Regulator
+5DV--+--.,
t-=~~--4~- 1.2V TO +47V
...- . .- - -1.2V TO -47V
t-:~
-5DV
---4.--....
TL/H/S066-7
Full output curient not available
at high input·output voltages
'The 10 ",F capacitors are optional to improve ripple rejection
Current Regulator
Adjustable Current Regulator
hF
I
OUT =
VREF
"R1
Rl
1
• O.Bn ,;; AI ,;; 120n
lOUT
1.5V) ± 16% adjustable
= ( R1
TL/H/S066-B
TLiH/S066-9
Negative Regulator with Protection Diodes
High Stability -40V Regulator
+
02**
lN4DD2
~=r~I'!"!"4"'-"--"
hF
1.5k*
1%'
~~-~-~--~:~J
L--m~
35ppmrc
__ =~f.yT
01**
lN4DD2
-46V
--4.--.. .
TL/H/9066-11
-VIN-_..._ _ _....J
• Use resistors wHh good tracking TC
TL/H/9066-10
'When CL is larger than 20 ",F, 01 protects the
LM 137HV in case the Input supply is shorted
"When C21s larger than 10 ",F and -VOUT is larger than
- 25V, 02 protects the LM137HV is case the oulput is
shorted
1-107
< 25 ppmrC
Typical Performance Characteristics (H and K-STEEL Package)
Load Regulation
Current Limit
I~' 015A --t-.,
~
t: -Dol
S
~ -OA
=
:!
c=
PACKAGED
DEVICES
IL -1.5A
-0.•
>
-.-.-¥. - -Ire
- - - - I='IO'C
~ I I
-.~
\
-0.8
..~ ~:::
~ACKAD~
o
-1.4
-15 -50 -25 0 25 50 15 '00 125 '50
'".~
C
.
.
r-- f-::'
il
,~
~I!!
VIN' -15V
VOUT =-IOV
I
~~~
c
__ to.:::
l Lf
EV CE
o
TEMPERATURE ('CI
'0
2D
3G
40
Adjustment Current
80
~"'2rc
15
10
1""'0
15
81
'"
55
50
-75 -SO-25 0 25 50 75 '00 '25 '50
50
INPUT-IIUTPUT DIFFERENTIAL (V)
TEMPERATURE ('CI
'.210 Temperature Stability
3
Minimum Operating Current
:>
i
1.2&0
.
1--
~
~ 1.2&0
I
.
~
0.5 '--'--'--'--"-"--'--'--'-...1
-15 -50 -25 0 25 50 15 '00. 125 150
...
!.
iii!
-75 -50 -Z5 0 25 50 75 '00 '25 '50
TEMPERATURE rCI
10
- f---
-
r~~&:~~I' 5V
20
f' '20 H,
10
E
aD
..
....;C~D)O- - -
40
!
!3a:
i
~
~15V
-ZO.
-3D
'0
.-40
"
VIN'
VDUT' -'ov
Il '500mA
TI'25'C
zo
o
.'0"
,
CAOJ~,
40
'GO
...tl
ii
I" .1.
CADJ"M_
",
'k
30
-,
;;!
a:
'\
' - I'~
~
'Ok
i
40
50
r-
111'11
60
]\01'0
40
-,J~
VIN'
VOUT' -'ov
zo
f· ,20H,
TI'ZI'~'III
o
,GOk·,M
~IU,UJ
-
aD
:5
D.'
0.0'
FREOUENCY (HII
OUTPUT VOLTAGE IVI
ZO
Ripple Rejection
'00
TI'25'C
o
"'0
INPUT·OUTPUT DIFFERENTIAL (V)
Ripple Rejection
cALJ.F
r'...
r
~~~
IJ~
I,.",
. 0
'00
10
o
o
1.230
Ripple Rejection
I
TI"21 ~~
Tj'15D"C~
1.240
'00
TJJ.~,
r--
r-- -
.....
TEMPERATURE ('CI
"
i--"
,
'0
OUTPUT CURRENT (A)
i "
Line Transient Response
0.1
IU
:~!
=!
.. c
CI
-0.2
1M
-OA
=2..
~
'GO
'k
'Ok
'OOk
FREOUENCY (HII
,M
I I
~l
0
0
I : -0.5
i~ -'.0
~=
J
aD
'-1.1.
J\CAOJ'O
0.2
....
;!
I L
0••
0.4
I
:OJ::
..
0.5
'0
B -1.0
,
20
TIME "'.1
t. CAOI' 'o.F
L
-QA
i1- 0 - r -
Tj 'Z5'C
r-- I,Cli'·F,
-f ~CfJ',O I
.-
C -0.' : - - "
-IVOJT· ~ ,OV
r-- .....
ll'50mA
t-
0,4
OJ
....i1!-o.z
~
CADI' 'M
Load Transient Response
.
3D
40
!
-1.6
=~
V~N,~,.J
VOUT' -'OV
INL'5DmA
Tj"ZS'C
CL' '.F
'0
ZI'
-'/
"
lL
3D
40
TIME"'.)
TLlH/9068-'2
1.-108
.-----------------------------------------------------------------------~
~National
r
!!:
...
Co)
;......
~ Semiconductor
...cor
!!:
LM 138A/LM 138, LM338A/LM338
5-Amp Adjustable Regulators
Co)
......
~
Co)
Co)
General Description
The LM138 series of adjustable 3-terminal positive voltage
regulators is capable of supplying in excess of SA over a
1.2V to 32V output range. They are exceptionally easy to
use and require only 2 resistors to set the output voltage.
Careful circuit design has resulted in outstanding load and
line regulation-comparable to many commercial power'
supplies. The LM138 family is supplied in a standard 3-lead
transistor package.
A unique feature of the LM138 family is time-dependent currerit limiting. The current limit circuitry allows peak currents
of up to 12A to be drawn from the regulator for short periods
of time. This allows the LM138 to be used with heavy transient loads and speeds start-up under full-load conditions.
Under sustained loading conditions, the current limit decreases to a safe value protecting the regulator. Also included on the chip are thermal overload protection and safe
area protection for the power transistor. Overload protection
remains functional even if the adjustment pin Is accidentally
disconnected.
Normally, no capacitors are needed unless the device is
situated more than 6 inches from the input filter capacitors
in which case an input bypass is needed. An output capacitor can be added to improve transient response, while bypassing the adjustment pin will increase the regulator's ripple rejection.
Besides replacing fixed regulators or discrete designs, the
LM138 is useful in a wide variety of other applications. Since
the regulator is "floating" and sees only the input-to-output
differential voltage, supplies of several hundred volts can be
regulated as long as the maximum Input to output differential is not exceeded, i.e., do not short-circuit output to
ground. The part numbers in the LM138 series which have a
K suffix are packaged in a standard Steel TO-3 package,
while those with a T suffix are packaged in a TO-220 plastic
package. The LM138A1LM138 are rated for -SS'C :S: TJ :S:
+ lS0'C, while the LM338A is rated for - 40'C :S: TJ :S:
+ 12S'C, and the LM338 is rated for O'C :S: TJ :S: + 12S'C.
Features
Guaranteed 7 A peak output current
Guaranteed SA output current
Adjustable output down to 1.2V
Guaranteed thermal regulation
Current limit constant with temperature
100% electrical bum-in in thermal limit
Output is short-circuit protected
Guaranteed 1% output voltage tolerance (LM138A,
LM338A)
• Guaranteed max. 0.Q1 %N line regulation (LM138A,
LM338A)
• Guaranteed max. 0.3% load regulation (LM138A,
LM338A)
•
•
•
•
•
•
•
•
Applications
• Adjustable power supplies
• Constant current regulators
• Battery chargers
Con nection Diag rams (See Physical Dimension section for further Information)
(TO-3 STEEL)
Metal Can Package
(TO-220)
Plaatlc Package
TLIHI90BO-31
Front View
Order Number LM338AT/LM338T
See NS Package Number T03B
TLIHI9060-30
Bottom View
Order Number LM138AK STEEL/LM138K STEELI
LM338AK STEEL/LM338K STEEL
See NS Package Number K02A
1-109
co
~
r
!!:
Co)
Co)
co
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 4)
Power Dissipation
ESD Tolerance
Operating Temper,ature Range
Input/Output Voltage Differential
+40V, -0.3V
-65·C to + 150·C
Lead Temperature
Metal Package (Soldering, 10 seconds)
Plastic Packag~ (Soldering, 4 seconds)
-55·C :5: TJ :5: + 1!~O·C
-40·C:5: TJ:5: +125·C
O·C:5: TJ:5: +125·C
LM138A1LM138
LM338A
LM338
Internally limited
Storage Temperature
TBD
,
Preconditioning
Thermal Limit Burn-In
300·C
260·C
All Devices 100%
Electrical Characteristics
Specifications with standard type face are for TJ = 25·C, and those with boldface type apply over full Operatl'ng Temperature Range. Unless otherwise specified, VIN - VOUT = 5V; and lOUT = 10 rnA. (Note 2) ,
Parameter
Reference Voltage
LM138A
Conditions
lOUT = 10 rnA, TJ = 25·C
3V :5: (VIN - VOUT) :5:. 35V,
10 mA:5: IOUT:5: 5A, P:5: 50W
Line Regulation
Load Regulation
Thermal Regulation
Typ
Max
1.238
1.250
1.262
10 rnA :5: lOUT) :5: 5V (Note 3)
20 ms Pulse
Adjustment Pin Current
10 rnA :5: lOUT s; 5A,
3V S; (VIN-VOUT) S; 35V
Temperature Stability
TMIN
Minimum Load Current
VIN - VOUT. = 35V
Current Limit
VIN - VOUT S; 10V
DC
0.5 ms Peak
S;
TJ
S;
5
7
0.01
0.005
0.04
0.02 0.04
10 kHz
VOUT = 10V, f = 120 Hz, CADJ = O/LF
VOUT = 10V, f = 120 Hz, CADJ = 10 /LF
Long-Term Stability
TJ = 125·C,1000 Hrs
Thermal Resistance,
Junction to Case
KPackage
0.3
0.1
0.3
%
0.6
0.3
0.8
%
0.002
0.01
0.002
0,01
%/W
45
100
45
100
/LA
0.2
5
0.2
5
/LA
5
3.5
5
rnA
1
8
12
5
'7
60
75
0.3
35
1-110
A
A
1
60
1
%
8
12
A
0.003
%
60
75
dB
dB
0.3
1
Thermal ReSistance, Junction to
K Package
Ambient (No Heat Sink)
%N
%N
0.1
0.001
60
V
0.3
1
Ripple Rejection Ratio
S;
0,01
0.005
3.5
10 H,z
Units
Max
0.02
VIN - VOUT = 30V
f
Typ
V
1
TMAX
RMS Output Noise, % of VOUT
S;
Min
1.225 1.250 1.270 1.19 1.24 1.29
3V :5: (VIN - VOUT) :5: 35V (Note 3)
Adjustment Pin Current Change
LM138
Min
35
1
%
1
·C/W
·C/W
Electrical Characteristics (Continued)
Specifications with standard type face are for TJ = 25'C, and those with boldface type apply over full Operating Temperature Range. Unless otherwise specified, VIN - VOUT = 5V; and lOUT = 10 rnA. (Note 2)
Parameter
LM338A
Conditions
Reference Voltage
lOUT
= 10 mA, TJ = 25'C
3V ,,;: (VIN - VOUT) ,,;: 35V,
10 mA ,,;: lOUT";: 5A, P ,,;: 50W
Line Regulation
Typ
Max
1.238
1.250
1.262
10 mA ,,;: lOUT) ,,;: 5V (Note 3)
Thermal Regulation
20 ms Pulse
Adjustment Pin Current
Adjustment Pin Current Change
10 mA,,;: lOUT";: 5A,
3V ,,;: (VIN - VOUT) ,,;: 35V
Temperature Stability
TMIN ,,;: TJ ,,;: TMAX
Minimum Load Current
VIN - VOUT
Current Limit
VIN - VOUT";: 10V
DC
0.5 ms Peak
RMS Output Noise, % of VOUT
Ripple Rejection Ratio
5
7
TJ
K Package
TPackage
V
0.03
0.005
0.02 0.06 %N
%
0.1
0.3
0.1
0.5
0.3
0.6
0.3
1
%
0.002
0.02
0.002
0.02
%/W
45
100
45
100
p.A
0.2
5
0.2
5
p.A
10
3.5
10
mA
1
8
12
5
7
60
75
%
8
12
A
A
1
A
0.003
%
60
75
dB
dB
60
0.3
0.3
1
1
4
Thermal Resistance, Junction to K Package
Ambient (No Heat Sink)
TPackage
%N
0.Q1
0.04
1
60
V
0.02
0.001
= 125'C, 1000 hrs
Long-Term Stability
Max
0.005
3.5
= 10V, f = 120 Hz, CADJ = 0 p.F
= 10V, f = 120 Hz, CADJ = 10 p.F
Thermal Resistance
Junction to Case
Units
Typ
1
= 35V
VIN - VOUT = 30V
10Hz,,;:f,,;:10kHz
VOUT
VOUT
Min
1.225 1.250 1.270 1.19 1.24 1.29
3V ,,;: (VIN - VOUT) ,,;: 35V (Note 3)
Load Regulation
LM338
Min
1
%
1
4
'C/W
'C/W
'C/W
'C/W
35
50
35
50
Nota 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: These specifications are applicable for power dissipations up to 50W for the TO·3 (K) package and 25W for the TO-220 (T) package. Power dissipation is
guaranteed at these values up to 15V input-output differential. Above 15V differential. power dissipation will be limited by internal protection circuitry. All limits (i.e.,
tihe numbers in the Min. and Max. columns) are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 3: Regulation is measured at a constant iunclion temperature, using pulse testing with a low duty cycle. Changes in output voltage due to heating effects are
covered under the specifications for thermal regulation.
Note 4: Refer to RETS138K drawing for military specifications of LMI38K.
Typical Performance Characteristics
Current Limit
12
S
;
co
B
~.
18
~
• r-
10
I'
I
Owl
VIN-VOUT -15V
VI~~VO~
2r-
VIN~VOUT- 30V
11111111
D.l
la
l.a
TIME(ms)
1111111
100
8
I
4
==
TCASE-2&oC
fie
PR1LOAr'
_
12
VIN-VOUP 10V
4
0
-
T
C
PRII
.....
Current Limit
Current Limit
14
r--.
;;-r-
.\ rt' ~RELrAO i 3~1
I
b iI
~.r"'I-.J
1'""1--l
0
10
20
3a
INPUT·OUTPUT DIFFERENTIAL (V)
z
40
12 • • 011111111
PRELOAO-IA
10
I
PRELh~IO~
~
~
\ . KPrELi AD IA
0
S....
~
:;.; PRELOAD" 5A-
""
14
~~AM~~:~NL~~:~IT
A
: tPTlililiil
VIN -10V
2 VOUT"5V
TCASE -, ~,~:c
0
0.1
1
~
r-
10
loa
TIME (ms)
TL/H/9060-4
1-111
co
CO)
CO)
:i
r---------------------------------------------------------------------------------,
Typical Performance Characteristics
i
Load Regulation
CO)
::E
....
~
....
:::E
....
~
....
:::E
....
CO)
..;
i!
z
~
~
~
-'-rIA
-D.1
-0.2
-G.3
"
-G.'
~
VIN-l~V
I
VOUT -IOV
\;
5;
i"
'"'"
i
PRELOAD' 50 mA
-
r-.
~
5D
~...
45
!
-
;;
<
I
./~
//
I
40
I
/
35
i-""
30
15 50 -Z5 0 Z. .0 1. lID 125 150
TEMPERATURE I'C)
TEMPERATURE rCI
TEMPERATURE rCI
:
w
~ 1.240
./
~
w
~ 1.230
V
iii
~ 1.220
V
i-"" I-
'"
'0 ' .-....:..,r--,=----r--r--,
--
Ti"' 55"C
/
10-6
L...._'-_'---'-=::""_-'
10
100
60
20
o
101
10DI
D
1M
I-
..
Ripple Rejection
·80
ii
'"
I I
~
tii!
I
=
10
..
40
w
1
,=
Ulltz
TJ we
5
80
~
Ul
Im=ZA
o
2
Ii
20
25
-20
30
35
'"..z
!
I'\.
VII = I&V
V..,=IIY
IIIII'''' 2A
T.... = 25'C
10
OUTPUT VOLTAGE IV)
100
lk
10k
~'I"
C~iO;IAOJ"O
--
lOOk
1.0
e:~ 0.6
~5
-
It
ii!
....... CADJ"O
N.
I;V
VIN O
VoUT,'0V
50
f= 120 Hl
TCASE"Z' C
40
1M
0.1
10
Load Transient Response
1
i!=-'
!i~
-Z
I I I
g
-3
i
4
!
I I I
J I I
20
I
~i! 0
T) = H'C
10
lit
f-L
OUTPUT CURRENT IA)
BE
\.
:/
I I I
V..,-11Y
~> -1.1
60
~
3
lour=lI_
.......,=
10
FREQUENC'" 1Hz!
I-~L' \ .F:CL ~ 10~F
40
30
Ripple Rejection
w
Line Transient Response
1.6
20
.... CADJ"10.F
ii
"
.-....'CADJ'D"::
20
lD
III
,.... I"C~DI"'0.F
80
CADl.J.F
VII-VJ=J
o
INPUT·oUTPUT DIFFERENTIAL IVI
10D
40
It
I.
FREQUENCV IHzl
Ripple Rejection
E
J
I
'F-o
10D
i
~
l«!:25 C
~l""TioZ5°C
TEMPERATURE rC)
10
Minimum Operating
Current
Output Impedance
1210
-15 -50 -25 0 25 50 15 100 125 150
ii!
~~3A
3
-15 -50 -25 0 25 50 15 10D 125 150
~1250
~
"...is
.....
.... - SA
1
1.26D
~
I
-Ii -50 -25 0 25 50 15 101 125 150
Temperature Stability
.
55
t
.lVOUT· 100 mY
-la~=~
~
Adjustment
Current
Dropout Voltage
LI
0.1
(Continued)
30
I
40
B
10
ZO
30
40
TIME",,)
TIME(.~
TLlH/9060-5
1·112
r-
Load Regulation
The LM 138 is capable of providing extremely good load regulation but a few precautions are needed to obtain maximum performance. The current set resistor connected between the adjustment terminal and the output terminal (usually 240!1) should be tied directly to the output of the regulator (case) rather than near the load. This eliminates line
drops from appearing effectively in series with the reference
and degrading regulation. For example, a 15V regulator with
0.05!1 resistance between the regulator and load will have a
load regulation due to line resistance of 0.05!1 x IL. If the
set resistor is connected near the load the effective line
resistance will be 0.05!1 (1 + R2/Rl) or in this case, 11.5
times worse.
Figure 2 shows the effect of resistance between the regulator and 240!1 set resistor.
Application Hints
In operation, the LM138 develops a nominal 1.25V reference voltage, VREF, between the output and adjustment terminal. The reference voltage is impressed across program
resistor R 1 and, since the voltage is constant, a constant
current 11 then flows through the output set resistor R2, giving an output voltage of
VOUT
=
VREF (1
+
:~)
+
IADJR2.
LM338
1
VOUT
LMJ38
VIN
J
RS
VOUTI-N£v........._VOUT
ADJ
'I
~
R1'
> 120
TL/H/9060-6
FIGURE 1
Since the 50 p,A current from the adjustment terminal represents an error term, the LM138 was designed to minimize
IADJ and make it very constant with line and load changes.
To do this, all quiescent operating current is returned to the
output establishing a minimum load current requirement. If
there is insufficient load on the output, the output will rise.
TLiH/9060-7
FIGURE 2. Regulator with Line
Resistance in Output Lead
With the TO-3 package, it is easy to minimize the resistance
from the case to the set resistor, by using 2 separate leads
to the case. The ground of R2 can be returned near the
ground of the load to provide remote ground sensing and
improve load regulation.
External Capacitors
An input bypass capacitor is recommended. A 0.1 p,F disc
or 1 p,F solid tantalum on the input is suitable input bypassing for almost all applications. The device is more sensitive
to the absence of input bypassiing when adjustment or output capacitors are used but the above values will eliminate
the possiblity of problems.
Protection Diodes
When external capacitors are used with any IC regulator it is
sometimes necessary to add protection diodes to prevent
the capacitors from discharging through low current pOints
into the regulator. Most 20 p,F capacitors have low enough
internal series resistance to deliver 20A spikes when shorted. Although the surge is short, there is enough energy to
damage parts of the IC.
When an output capacitor is connected to a regulator and
the input is shorted, the output capacitor will discharge into
the output of the regulator. The discharge current depends
on the value of the capacitor, the output voltage of the regulator, and the rate of decrease of VIN. In th'3 LM138 this
discharge path is through a large junction that is able to
sustain 25A surge with no problem. This is not true of other
types of positive regulators. For output capacitors of 100 p,F
or less at output of 15V or less, there is no need to use
diodes.
The bypass capacitor on the adjustment terminal can discharge through a low current junction. Discharge occurs
when either the input or output is shorted. Internal to the
LM138 is a 50!1 resistor which limits the peak discharge
current. No protection is needed for output voltages of 25V
or less and 10 p,F capacitance. Figure 3 shows an LM138
with protection diodes included for use with outputs greater
than 25V and high values of output capacitance.
The adjustment terminal can be bypassed to ground on the
LM138 to improve ripple rejection. This bypass capacitor
prevents ripple from being amplified as the output voltage is
increased. With a 10 p,F bypass capacitor 75 dB ripple rejection is obtainable at any output level. Increases over
20 p,F do not appreciably improve the ripple rejection at
frequencies above 120 Hz. If the bypass capacitor is used, it
is sometimes necessary to include protection diodes to prevent the capacitor from discharging through internal low current paths and damaging the device.
In general, the best type of capacitors to use are solid tantalum. Solid tantalum capacitors have low impedance even at
high frequencies. Depending upon capacitor construction, it
takes about 25 p,F in aluminum electrolytic to equal 1 p,F
solid tantalum at high frequencies. Ceramic capacitors are
also good at high frequencies; but some types have a large
decrease in capacitance at frequencies around 0.5 MHz.
For this reason, 0.01 p,F disc may seem to work better than
a 0.1 p,F disc as a bypass.
Although the LM 138 is stable with no output capacitors, like
any feedback circuit, certain values of external capacitance
can cause excessive ringing. This occurs with values between 500 pF and 5000 pF. A 1 p,F solid tantalum (or 25 p,F
aluminum electrolytic) on the output swamps this effect and
insures stability.
1-113
::
....
w
(XI
»
.......
r-
::
....
w
(XI
.......
r-
::
w
w
(XI
»
.......
r-
::
w
w
(XI
Application Hints (Continued)
PI
IN4DDZ
RZ
TL/H/9060-B
01 protects against CI
02 protects against C2
VOUT
= 1.2SV (I
+~)
+IADJR2
FIGURE 3. Regulator with Protection Diodes
Typical Applications
Regulator and Voltage Reference
Temperature Controller
.........- - - - - . . . , . ....-
VDUT
RI
1.2k
HEATER
R2
8D
TL/H/9080-3
TUH/9060-10
Full output current not available
at high input-output voltages
1.2V-2SV Adjustable Regulator
tOptional-improves transient response. Output capaCitors In the range of
1 ",F 10 1000 ",F of aluminum orlantalum electrolytic are commonly used
to provide improved output Impedance and rejection of transients.
'Needed if device is more than 6 inches from filler capacitors.
ttVOUT
= 1.2SV (I + ~) + IADJ (R2)
"RI = 2400 for LMI3B. RI, R2 as an assembly can be ordered from
Bourns:
MIL part no. 710SA·AT2-502
COMM part no. 7105A·AT7·502
1-114
en
(')
:::T
CD
3
I»
,
,
5'
,
,
,
"
,
,
VIN
o
iii'
co
~
I»
3
01
C
:: I
m
ntO
r~~1
::lrn
B
12.4k
il
01r.s,.r
015
.........
02
6.lV
I
~-~F =~~
021
f~:~
~!!
~
~lJOJ
.J.........
.J
L
_..:....r-:.:TI -----.
ID
6.3V
--~
01
6.3V
R24
160
RIO
4.1k
R9
180
6'
,
~
~
< Rl1 < R12
< 5.Bk S 12
~
~
R13
5.1k
~
C2
R14
12k
30pF
i ______
~
~~_
~ ~
tt~~l~~~
BY
R26
0.03
"W\i;
"
S
R25
3
Vour
~
son
TLiH/9060-9
8&&Wl/\f8&&Wl/8& ~ Wl/\f8& ~ Wl
co
CO)
CO)
:i
~
.-------~------------~----------------------------------------------------------.
Typical Applications (Continued)
Precision Power Regulator with Low Temperature Coefficient
CO)
CO)
1---..- - - - - - -...-
::E
VOUT .. 4V
..J
.....
co
CO)
.,...
::E
.....
..J
:!i
.,...
Rl
CO)
375
::E
..J
T~/H/90aO'12
'Adiustlor 3.75 across Rl
Slow Turn·On .1SV Regulator
Adjustable Regulator with Improlled Ripple Rejection
01*
lN4002
TLlH/90aO·14
TL/H/9060·13
tSolid tantalum
'Discharges Cl II output Is shorted to ground
"AI
High Stability 10V Regulator
~~e-"'-'"
Digitally Selected Outputs
.....
io.-':;:;:::"--'
= 2400 lor LM138
- - - 4.... ~eJ'T
1----+- VOUT
VIN------t
Rl
2k
6%
R1·*
120
R2
Uk
1%
INPUTS
TLlH/90aO·15
TL/H/90aO·16
'Sets maximum VOUT
"Rl = 2400 'or LM138
1·116
Typical Applications (Continued)
15A Regulator
RS
0.1
R4
2k
RI
0.05
R6
0.1
R2
0.1
1---------+--...-
Vour*
+
CI
10ilF
'Minimum load-I 00 mA
TL/H/9060-17
5V Logic Regulator with Electronic Shutdown··
o to 22V Regulator'
VOUT
5V
VIN 7V-JSV
C2
o.I/'oF
TTL
Ik
··Minimum o~tput ~ 1.2V
TLIH/9060-1 B
Light Controller
TL/H/9060-19
'AI
~
24011, A2
~
5k for LMI38
Full output currenl not available
at high input·output volteges
TL/H/9060-11
1·117
Typical Applications (Continued)
12V Battery Charger
500
R6
0.2
+
TO 12V
BATTERY
Rl
3k
+
0.1 "F
TL/H/9060-20
Adjustable Current Regulator
Precision Current Limiter
....."",..,...--- ~~~lA
........"V'IAI-t..... ,OUT =
'---..:;:.---'
VREF
iii"
a....."'::;:::""-...J
TL/H/9060-22
LMI17
Tracking Preregulator
R2
720
V-BVTO -lOY
TL/H/9060-21
5A Current Regulator
TL/H/9060-24
TL/H/9060-23
1-118
,----------------------------------------------------------------------,r
is:
.....
Typical Applications (Continued)
w
;.....
Adjusting Multiple On·Card Regulators with Single Control'
r
is:
.....
I-........-VOUT
w
I
~
~
IN4DD2
w
w
co
!:
r
is:
tMinimum load-IO mA
• All outputs within ± 100 mV
TL/H/9060-2S
Power Amplifier
~-------t~--------------------~--~-35V
lOOk
IOOOI'F
~~.........-t~
INPUT
LM338
O.II'F
0.4
= I, RF = 10k, CF = 100 pF
Av = 10, RF = lOOk, CF = 10 pF
AV
Bandwidth
;0,
100 kHz
TL/H/9060-27
Distortion ,;; 0.1 %
Simple 12V BaHery Charger
TLlH/9060-2B
'Rs-aets output Impedance of charger ZOUT
= Rs ( 1 + ~)
U.e of Rs allow. low charging rate. with fully charged battery.
.. "'The 1000 ,u.F is recommended to filter out input transients
1·119
w
w
co
Typical Applications (Continued)
Adjustable 15A Regulator
Current Limited 6V Charger
VIN
9V TO JOV
240
+
1001lpF"
1.1k
I-..."VV\,-....-
4.SV TO 2SV
0.2*
Sk
TL/H/9060-29
·Set max charge current to 3A
.. -The 1000 .....F is recommended to filter out input transients.
Sk
TUH/9060-26
10A Regulator
R
0.1
R3
2k
R
0.1
VIN -+-~NIr--+---I----'"
DUTPUT*
1--4.....- , .2V TO 20V
"Minimum load-100 rnA
TL/H/9060-2
1-120
~National
~ Semiconductor
LM 140A/LM 140/LM340A/LM340 Series
3-Terminal Positive Regulators
LM340AlLM340 series is also available in the TO-220 plastic power package as well as an aluminum TO-3 package.
General Description
The LM140AlLM140/LM340AlLM340 series of positive 3terminal voltage regulators are designed to provide superior
performance as compared to the previously available 78XX
series regulator. Computer programs were used to optimize
the electrical and thermal performance of the packaged IC
which results in outstanding ripple rejection, superior line
and load regulation in high power applications (over 15W).
With these advances in design, the LM340 is now guaranteed to have line and load regulation that is a factor of 2
better than previously available devices. Also, all parameters are guaranteed at 1A vs 0.5A output current. The
LM140AlLM340A provide tighter output voltage tolerance,
±2% along with 0.01%1V line regulation and 0.3%/A load
regulation.
For output voltages other than 5V, 12V, and 15V, the LM117
and LM117HV series provide an output voltage range from
+1.2Vto +57V.
Features
• Complete specifications at 1A load
• Output voltage tolerances of ± 2% at Tj = 25°C and
±4% over the temperature range (LM140AlLM340A)
• Fixed output voltages available 5, 12, and 15V
• Line regulation of 0.01% of VOUTIV of aVIN at 1A load
(LM140AlLM340A)
• Load regulation of 0.3% of VOUT/A (LM140AlLM340A)
• Internal thermal overload protection
• Internal short-circuit current limit
• Output transistor safe area protection
• 100% thermal limit burn-in
• Special circuitry allows start-up even if output is pulled
to negative voltage (± supplies)
Current limiting is included to limit peak output current to a
safe value. Safe area protection for the output transistor is
provided to limit internal power dissipation. If internal power
dissipation becomes too high for the heat sinking provided,
the thermal shutdown circuit takes over limiting die temperature.
LM140 Series Package and Power Capability
Considerable effort was expended to make the LM140-XX
series of regulators easy to use and minimize the number of
external components. It is not necessary to bypass the output, although this does improve transient response. Input
bypassing is needed only if the regulator is located far from
the filter capacitor of the power supply.
Device
Although designed primarily as fixed voltage regulators,
these devices can be used with external components to obtain adjustable voltages and currents.
The entire LM140AlLM140/LM340AlLM340 series of regulators is available in the steel TO-3 power package. The
Rated
Power
Dissipation
Package
Design
Output
Current
LM1401
LM340
TO-3(K)
20W
1.5A
LM340
TO-220(T)
15W
1.5A
Typical Applications
Fixed Output Regulator
INPUT
I
CI'..L I
LM340·XX
l
GND
D.2Z.FT
DUTPUT
+.~.
Adjustable Output Regulator
I
I NPUT
~~""'---11
LM34D·5.D
I
OUTPUT
II-~;'=~'
I
RI
~
Current Regulator
l
,;;;IN;;,;PU:,;T...._-t
.l CI
I
--
OUTPUT
R2
lOUT
TLlH/7781-3
'Required if Ihe regulator is located far from the
power supply filter.
ed, use 0.1 "",F, ceramic disc).
\--
RI
D.22 "F
TUH17781-1
"Although no output capacitor is needed for stability, it does help transient response. (If need·
LM34D·XX
I'--_r----'
. Y2·3
lOUT ~
R1 +
TL/H/7781-2
YOUT ~ 5Y + (5Y1Rl + 10) R2 5Y1Rl > 310.
load regulation (L,) :::: I(RI + R2)/Rll (Lr of
LM340-5).
1-121
10
Ala ~ 1.3 rnA over line and load changes.
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 3)
Input Voltage (Vo = 5V, 12V, 15V)
35V
Internal Power Dissipation (Note 1)
Internally Limited
Operating Temperature Range (TA)
LM140AlLM140
-55'Cto + 125'C
LM340AlLM340
O'Cto +70"C
Maximum Junction Temperature
(TO·3 Package K, KC)
(TO·220 Package
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
TO·3 Package K, KC
TO·220 Package T
ESD Tolerance (Note 4)
150"C
150'C
-65'Cto + 150"C
n
300"C
230'C
2000V
Electrical Characteristics LM140AlLM340A (Note 2)
lour= 1A, -55'C
Symbol
s:
Tj
s:
+ 150'C (LM140A), or O'C
1:.Vo
Tj
s:
5V
12V
15V
10V
19V
23V
Output Voltage
Line Regulation
I
Conditions
4.9
TI = 25'C
Po s: 15W, 5 mA s: 10
VMIN s: VIN s: VMAX
10 = 500mA
1:.VIN
s: 1A
10
Quiescent Current
1:.10
Quiescent Current
Change
Ro
Dropout Voltage
Output Resistance
Short·Circuit Current
Peak Output Current
Average TC 01 Vo
5
5.1
4.8
(7.5
s:
(7.5
s: VIN s: 20)
(7.5
s: VIN s: 20)
11.75
5.2 11.5
VIN s: 20) (14.8
3
(8
s: VIN s:
Tj = 25'cl~mA s: 10 s: 1.5A
250 mA s: 10 s: 750 mA
12
s:
12.25 14.7
10
s:
15.3
V
15.6
VIN s: 30)
V
V
18
s: VIN s: 27)
(14.5
s: VIN s: 27)
4
10
4
12
12)
15
12.5 14.4
VIN s: 27) (17.9
(14.8
(16
s: VIN s:
25
15
12
22
mV
V
(17.9
s: VIN s: 30)
(17.5
s: VIN s: 30)
mV
V
10
30
26)
mV
mV
V
35
21
mV
mV
4
18
9
30
22)
Unite
I Typ I Max
Min
(20
s: VIN s:
32
19
12
22
Over Temperature,
5 mA s: 10 s: 1A
25
60
75
mV
Tj = 25'C
Over Temperature
6
6.5
6
6.5
6
6.5
mA
mA
0.5
0.5
0.5
mA
0.8
VIN s: 30)
mA
V
0.8
mA
V
5mA
s:
10
s:
1A
Tj = 2S'C,Io = 1A
VMIN s: VIN s: VMAX
(7.S
10 = SOOmA
VMIN s: VIN s: VMAX
Output Noise Voltage TA = 2S'C, 10 Hz s: 1 s: 100 kHz
VN
,WIN Ripple Rejection
1:.VOUT
I Typ I Max
10
Tj = 25'C
Over Temperature
1:.VIN
Load Regulation
I
Min Typ Max Min
Tj = 25'C
1:.VIN
1:.Vo
+ 125'C (LM340A) unless otherwise specilied
Input Voltage (unless otherwise noted)
Parameter
Vo
s:
Output Voltage
Tj = 2S'C,I = 120 Hz, 10 = 1A
or 1 = 120 Hz, 10 = SOO mA,
Over Temperature,
VMIN s: VIN s: VMAX
s:
0.8
VIN s: 20) (14.8
s:
0.8
VIN s: 27) (17.9
0.8
(8
s: VIN s: 2S)
0.8
(1S
40
68
68
80
(8
s: VIN s:
Tj = 2S'C,Io = 1A
1 = 1 kHz
Tj = 2S'C
Tj = 2S'C
Min, Tj = O'C, 10 = 5 mA
2.0
8
2.1
2.4
-0.6
s: VIN s: 30)
(17.9
7S
18)
s:
61
61
72
(1S
s: VIN s:
2.0
18
1.S
2.4
-1.S
60
60
2S) (18.S
s: VIN s: 30)
90
/LV
70
dB
dB
s: VIN s: 28.S)
2.0
19
1.2
2.4
-1.8
V
V
mfl
A
A
mVl'C
Input Voltage
Tj = 2S'C
7.S
Required to Maintain
14.S
17.S
V
Line Regulation
Nota 1: Thermal resistance of the TO-3 package (K, KC) is typically 4'C/W lunction to case and 35'C/W case to ambient. Thermal resistanca of the TO-220
package (T) Is typically 4'C/W junction to case and 5CY'C/W case to ambient.
Note 2: All characteristics are measured with a capaCitor acro.s the Input of 0.22 !'oF and a capaCitor across the output of 0.1 !'oF. All characteMstlcs excapt noise
voltage and ripple rejection ratio are measured using pulse techniques (Iw ,; 10 ms. duty cycle,; 5%). Output voltage changes due to changes in internal
temperature must be taken Into account separately.
Note 3: Refer to RETSI40A-12K for LMI40K-12, RETSI40A-15K for LMI40K-15. or RETSI40A-05K for LMI40K-5.0 military drawing specifications.
Nota 4: Human body model, 1.5 kG In series wHh 100 pF.
VIN
1-122
Electrical Characteristics LM140 (Note 2) Symbol
5V
12V
15V
Input Voltage (unless otherwise noted)
10V
19V
23V
Parameter
Vo
55'C ,;; Tj ,;; + 150'C unless otherwise specified
Output Voltage
CondItIons
Output Voltage
TJ
= 25'C, 5 mA ,;; 10';;
MIn
1A
4.B
Line Regulation
10
= 500mA
10';; lA
AVo
Load Regulation
10
Quiescent Current
Ala
Quiescent Current
Change,
' Tj
= 25'C
5
15
15.6
V
V
V
mV
V
-55'C,;; TJ';; +150'C
AVIN
50
(B,;; VIN';; 20)
120
(15,;; VIN ,;; 27)
150
(1 B.5 ,;; VIN ,;; 30)
mV
V
50
120
(7.5 ,;; VIN ,;; 20) (14.6';; VIN ,;; 27)
150
(17.7';; VIN ,;; 30)
mV
V
Tj = 25'C
AVIN
-55'C';; Tj';; +150'C
AVIN
25
(B ,;; VIN ,;; 12)
60
(16,;; VIN ,;; 22)
75
(20 ,;; VIN ,;; 26)
mV
V
5mA,;;10';;1.5A
250 mA ,;; Ip ,;; 750 mA
10
12
12
150
75
mV
mV
= 25'C, 10 Hz,;; f,;;
120
150
mV
6
7
6
7
mA
mA
0.5
0.5
0.5
mA
O.B
(B';; VIN';; 20)
O.B
(15';; VIN ,;; 27)
O.B
(1 B.5 ,;; VIN ,;; 30)
mA
V
O.B
(B,;; VIN ,;; 25)
O.B
(15,;; VIN ,;; 30)
O.B
(1 B.5 ,;; VIN ,;; 30)
mA
V
90
".V
70
dB
dB
40
Ro
Dropout Voltage
Output Resistance '
Short·Circuit Current
Peak Output Current
Average TC of VOUT'
Tj = 25'C, 10 = lA
f = 1 kHz
TJ = 25'C
Ti = 25'C
O'C ,;; T ,;; + 150'C,I0
VIN
Input Voltage
TJ
Required to Maintain
Line Regulation
120
60
6
7
100 kHz
f0';; lA, Tj = 25'C or
f = 120Hz
10';; 500mA,
-55'C,;; Tj';; + 150'C
VMIN ,;; VIN ,;; VMAX
= 25'C,I0 ,;;
50
25
50
Tj = 25'C
-55'C,;; Ti';; +150'C
5 mA,;; 10';; lA
AVOUT
14.4
4
150
(17.5 ,;; VIN ,;; 30)
Tj = 25'C, 10 ,;; 1A
, VMIN ,;; VIN ,;; VMAX
' Output Noise Voltage TA
12.5
UnIts
I Typ I Max
4
120
(14.5 ,;; VIN ,;; 30)
Ripple Rejection
AVIN
12
Min
3
50
(7';; VIN';; 25)
10 = 500 mA, -55'C';; Tj';; + 150'C
VMIN ,;; VIN ,;; VMAX
VN
11.5
I Typ I Max
Tj = 25'C
AVIN
-55'C,;; Ti';; + 150'C, 5 mA,;; 10';; 11
10';; lA
5.2
MIn
15.75
4.75
5.25 11.4
12.6 14.25
(B';; VIN ,;; 20) (15.5 ,;; VIN ,;; 27) (1 B.5 ,;; VIN ,;; 30)
Po';; 15W, 5 mA,;; 10';; lA
VMIN ,;; VIN ,;; VMPoX
AVo
I Typ IMax
6B
6B
BO
75
61
61
72
60
60
(B,;; VIN';; lB)
(15,;; VIN ,;; 25)
(1 B.5 ,;; VIN ,;; 2B.5)
V
2.0
B
2.1
2.4
-0.6
2.0
lB
1.5
2.4
-1.5
2.0
19
1.2
2.4
-1.B
V
mO
A
A
mV/'C
= 5 mA
lA
7.5
14.6
17.7
V
Nate 2: All characteristics are measured with a capaCitor acress the input of 0.22 ,.F and a capaCitor across the output of 0.1 ,.F. All characteristics except noise
voltage and ripple reiection ratio are measured using pulse techniques (Iw ,;; 10 ms. duty cycle,;; 5%), Output voltage changes d~e to changes In internal
temperature must be taken into account separately.
1·123
Electrical Characteristics LM340 (Note 2) OOC s: Tj s: + 125·C unless otherwise specified
Symbol
Output Voltage
5V
12V
15V
Input Voltage (unless otherwise noted)
10V
19V
23V
Parameter"
Vo
Output Voltage
I
Conditions
Tj
= 25·C, 5 mA s:. 10 s: 1A
Po s: 15W, 5 mA s: 10 s: 1A
VMIN s: VIN s: VMAX
aVO
Line Regulation
s:
16
Load Regulation
10
Quiescent Current
alo
Quiescent Current
Change
Tj
= 25·C
5 mA
10
s:
5mA
aVIN Ripple Rejection
aVOUT
f
RO
s: VIN s: 20)
10
+ 125·C
s: 1A
(7.5
s: + 125·C
s: VIN s:
= 5 mA
s:
s: VIN s:
2.0
8
2.1
2.4
-0.6
V
V
V
4
(17.5
s: VIN s: 30)
mV
V
(18.5
s: VIN s:
150
30)
mV
V
150
(17.7
s: VIN s: 30)
mV
V
120
(14.6
s: VIN s: 27)
60
(16
s: VIN s: 22)
12
150
75
(20
mV
V
s: VIN s: 26)
120
60
12
150
75
mV
mV
50
120
150
mV
8
8.5
8
8.5
8
.8.5
mA
mA
0.5
0.5
0;5
mA
1.0
VIN s: 30)
mA
V
1.0
mA
V
s:
1.0
VIN s: 27) (17.9
s: VIN s: 30)
(17.5
75
55
55
18)
s:
1.0.
(14.5
40
(8
s:
120
s: VIN s: 27)
50
25
s: VIN s: 25)
80
15.6'
15.75
VIN s: 30)
15
120
(15
1.0
VIN s: 20) (14.8
62
62
Units
I Typ I Max
Min
12.5 14.4
s: VIN s: 30)
1.0
(7
or 10 s: 500mA,
O·C s: Tj s: + 125·C
VMAX
Tj = 25"C, 10 = 1A
f = 1 kHz
Tj = 25·C
Tj = 25·C
OOC s: Tj s: + 125·C, 10
4
(14.5
25
s: VIN s: 12)
s: TI s: + 125·C
1A, O·C
Tj = 25·C
OOC s: TI s:
= 120Hz'
12
50
5 mA s: 10 s: 1.5A
250 mA s: 10 s: 750 mA
= 25·C, 10 Hz s: f s: 100 kHz
fO s: 1A, Tj = 25"C
VMIN
Dropout Voltage
Output Resistance
Short-Circuit Current
Peak Output Current
Average TC ofVOuT
s: VIN s: 20)
(8
Tj = 25·C, 10 s: 1A
VMIN s: VIN s: VMAX
Output Noise Voltage TA
VN
11.5
50
(8
s: + 125·C
10 = 500 mA, O·C s: Tj
VMIN s: VIN s: VMAX
I
50
s: 10 s:
10
5.2
s: VIN s: 25)
(7.5
1A
s:
5
(7
s: + 125·C
Tj = 25"C
aVIN
1A
O·C s: Tj
aVIN
aVo
4.8
3
aVIN
O·C s: Tj
aVIN
I
11.4'
4.75 5.25
12.6 14.25
(7.5 s: VIN s: 20) (14.5 s: VIN s: 27) (17.5
= 500mA Tj = 25·C
10
I
Min Typ Max Min Typ Max
(15
72
s: VIN s: 25)
2.0
18
1.5
2.4
-1.5
54
54
(18.5
s: VIN s: 30)
90
p.V
70
dB
dB
s: VIN s: 28.5)
2.0
19
1.2
2.4
-1.8
V
V
mn
A
A
. mVI"C
Input Voltage
Tj = 25·C, 10 s: 1A
17;7
. Required to Maintain
7.5
14.6
V
Line Regulation
Note 2: All characteristics are measured wHh a capacHor across the Input of 0,22 "F and a capacitor across the output of 0.1 "F. All characteristics except noise
voltage and ripple rejection ratio are measured using pulse techniques (Iw :s: 10 ms, duty cycle :s: 5%). Output voltage .changea due to changes In Intemal
tempereture must be taken Into account separately.
VIN
Typical Performance Characteristics
Maximum Average Power
Dissipation
.
-
i
20
t=
1&
~
10
::!
Ie
25
TO·3
INFINITE
HEATSINK
..
'\
WITH III"CIW HEAT SINK
~
NO HEAT SINK
r-t-lI I
o
-15 -10 -21
a
10
~
15
..
~
'" "
E
111111
Peak Output Current
3.1
I
5
a
25 50 15 100 125
2.6
E
..
a
s 1.6
.
..[;
WITH III"CII'I HEAT SINK
NO HEAT SINK
~
H-!-I.J..J
III III II
25
10
0
11
20
~
50
OJ
Ie
~ UB5
t-t-t-+":i'!
~ 0.910
1-+-+-.....,0+
:; O.llI
I-+-+-+!;t
...
40
...ti
..~
j
;g
HH-f;"
~.
0.110 L-L-L...-J"""'''''
-15 -50 -25 0 25 50 15 100 125 liD
20
IB
30
35
90
BO
;;
..§"
II
Ripple Rejection
100
I-t-t-fl'
'I 1 ........
10
INPUT TO OUTPUT DIFFERENTIAL (VI
Ripple Rejection
.
~
T"15D'~
-
0.5
AMBIENT TEMPERATURE I'CI
~,.o'O
~ 0.995
~U90
- 'i'o...",,\..
0
o
AMBIENT TEMPERATURE I'CI
~ 1.005
...... r--.. Tj.l-55'~ _
Tj'2~ K.
INFINITE HEAT SINK
10
i
~VOUT 'lOa mV
TO·220
ij
~
I 1"'-
i
Maximum Average Power
Dissipation
~
10
JUNCTION TEMPERATURE I'CI
100
Ik
10k
FREQUENCY IH.,
lOOk
BO
.
10
'.120 Hz
60 I-V,N-VOUT' BVoC' 3.5Vrmll-'OUToiA
Ti'25 C
50
10
IS
20
25
·0
-
OUTPUT VOLTAGE (VI
Note: Shaded area refers to LM340AlLM340.
Output Impedance
s
...
§
.....
.
w
:il
0.1
Dropout Voltage
V,N"OV
~COUT'o~
VOUT' 5V
lOUT" 500mA
Tj'25'C
I
~
Dropout Characteristics
2.5
B
LM140K-5.0 1
Ti'2S'C
AJ:'
'OUT'DA
,=
/1
0.01
I~
AI 'I;;uT" 500 mA
COUTo I.F
TANTALUM
...~
==
o.oat
10
100
Ik
I
I
10k
lOOk
FREQUENCY IHzl
-15 -50 -25
a
II+t
10PT",IA
I
Ol......l--l.-L......-'-"'-""'-'I-...I
1M
1
I
10
25 50 15 100 115 150
INPUT VOLTAGE (VI
JUNCTION TEMPERATURE ('CI
Nole: Shaded area refers to LM340AlLM340.
Quiescent Current
Quiescent Current
B.5
VOUT'IV
IOUT-l. mA
1
~
5.5
Ie
a
§III
r --Tj -2S"C
4.5
,..-
~
3.1 '-'-.1.-...............
-15 -50 -25 a 25 50 15 lOa 125 t50
3.5
5
JUNCTION TEMPERATURE rCI
Nole: Shaded area reiers to LM340AlLM340.
1-125
10
15
20 2S
30
INPUT VOLTAGE (VI
35
TLlH17781-4
Typical Performance Characteristics
(Continued)
Load Regulation
Line Regulation
140AK-S.O, VIN = 10V, TA = 25"C
140AK-S.O, lOUT
= 1A, TA = 2S'C
..
~
co
~
~~
4.995
4.995
4.990
wE!
CD> 4.990
;:!E
..oe
co
co
c
1.5 :;I
5
~
co
1
>
..
~
0.5 ~
c
20 <
co
10 !::;
o :E
0
=i
g
"
'"ill
:!i
TIME (5 msJDIV)
TIME (5 m,/DIV)
TL/H/7781-5
5
TL/H17781-6
Equivalent Schematic
,..,...----t-------""'1---.. . . --....
VIN
RI
10k
Q12
RI6
0.25
'"----+--t-......-
co
r-r--
1.0
Ik
10k
lOOk
1M
1
1
;;
Vr- -
.....,:;0; T,' Z C
10M
10M
1
-5.2
~ -5.1
< -5.0
!:;
§:
-4.9
THERMAL
SHUTDOWN
.... -4.1
~
co
-
J
-4.7
I I
-4.6
1
t
1 1
1 1
-4.4
-4.2
1
-50
QUTPUT CURRENT (AMPS)
1- FREQUENCY 1Hz)
1M
-5.3
T,' +l50'C
1 1
1 1
lOOk
-5.4
1
1
'1
D••
10k
Output Voltage vs
Temperature
+t- -,/~
V1 ~
I
0.4
0.01
100
lk
1- FREOUENCY (Hz)
T"-55'C
0.6
10
100
Z.4
E
lOUT '11IOmA
E V,. '-IOV
!- T,' Z5'C
§
125
100
Minimum Input·Output
Voltage Differential
Output Impedance
10
75
T. - AMBIENTTEMPERATURE rc)
50
I DO
150
T - TEMPERATURE rc)
TLlH17785-4
Typical Applications (Continued)
----~----~~----~-----------t~----~------------------~t_---VoUT(+1
Dl
LM129A
200 pF
H2'
C1··
4.7~F
+
+
C2tt
10~F
SOLID
TANTALUM
VIN - VOUT ~ 3V
R4t
0.5%
~~
______
-4~
R3'
____________________
~~
LMI45
____ VoUT(-1
-aVTD -12V
TL/H17785-5
'Select resistors to set output voltage. 1 ppm/C tracking suggested.
"Cl Is not needed If power supply filter capacitor Is within 3" of regulator.
tDetermlnes zener current. May be adjusted to minimize temperature drift.
ttSolid tantalum.
Load and line regulation < 0.01 %
Temperature drift < 0.001 %/C
1-135
~ ~------------------------------~------------~----------------~-----------,
"II'
C")
~
Typical Applications (Continued)
High Stability Regulator
~
....
. 5V ,;; V+ ,;; 25V·
(UNREGULATED)
~
01
lN457
Cl'
:'50"F
-15V ,;; VIN ,;; -4.6V 0-.........
TLlH/n85-6
"Cl is not needed if power supply filter capacitor is within 3" of regulator.
tKeep C4 within 2" of LM345.
"02 sats initial output voltage accuracy. The LM113 is available in -5, -2, and -.1% tolaranca.
-2V Eel Termination Regulator
Variable Output (-5.0V to -15V)
Dual 3 Amp Trimmed Supply
+INPUT
LMI2J
+5.0V
Cl
ISO
I.F
SOLID
TANTALUM
+
lk
2.2,AF
SOLIO
TANTALUM
4J.F
SOLID
TANTALUM
+
22
INPUT
2.2,.F
SOLID
TANTALUM
- INPUT
+
COM
+ 4.1.F
SOLID
_ TANTALUM
.22
OUTPUT
TUH17785-8
'Optional. Improves transient
respilnse and ripple rejecUon •
• JJO
lk
LM145-S
R2
220
-5.0Y
TUH17785-7
1-136
(Rl + R2)
VOUT= -5V ~
r3:
.....
~National
U1
~
.....
r-
~ Semiconductor
LM150A/LM150, LM350A/LM350
3-Amp Adjustable Regulators
3:
.....
U1
o
.....
r-
General Description
U1
The LM1S0 series of adjustable 3-terminal positive voltage
regulators is capable of supplying in excess of 3A over a
1.2V to 33V output range. They are exceptionally easy to
use and require only 2 external resistors to set the output
voltage. Further, both line and load regulation are comparable to discrete designs. Also, the LM1S0 is packaged in
standard transistor packages which are easily mounted and
handled.
In additio.n to higher performance than fixed regulators, the
LM1S0 series offers full overload protection available only in
IC's. Included on the chip are current limit, thermal overload
protection and safe area protection. All overload protection
circuitry remains fully functional even if the adjustment terminal is accidentally disconnected.
Normally, no capacitors are needed unless the device is
situated more than 6 inches from the input filter capacitors
in which case an input bypass is needed. An output capacitor can be added to improve transient response, while bypassing the adjustment pin will increase the regulator's ripple rejection.
Besides replacing fixed regulators or discrete designs, the
LM1S0 is useful in a wide variety of other applications. Since
the regulator is "floating" and sees only the input-to-output
differential voltage, supplies of several hundred volts can be
regulated as long as the maximum input to output differential is not exceeded, i.e., avoid short-circuiting the output.
By connecting a fixed resistor between the adjustment pin
and output, the LM1S0 can be used as a precision current
regulator. Supplies with electronic shutdown can be
achieved by clamping the adjustment terminal to ground
3:
Co)
which programs the output to 1.2V where most loads draw
little current.
The part numbers in the LM1S0 series which have a K suffix
are packaged in a standard Steel TO-3 package, while
those with a T suffix are packaged in a TO-220 plastic package. The LM1S0AlLM1S0 are rated for -SS·C ,;; TJ ,;;
+1S0·C, while the LM3S0A is rated for -40·C ,;; TJ ,;;
+ 12S·C, and the LM3S0 is rated for O·C ,;; TJ ,;; + 12S·C.
Features
•
•
•
•
•
•
•
•
Adjustable output down·to 1.2V
Guaranteed 3A output current
Guaranteed thermal regu·lation
Output is short circuit protected
Current limit constant with temperature
100% electrical burn-in in thermal limit
86 dB ripple rejection.
Guaranteed 1% output voltage tolerance
(LM1S0A, LM3S0A)
• Guaranteed max. 0.01 %/v line regulation
(LM1S0A, LM3S0A)
• Guaranteed max. 0.3% load regulation
(LM1S0A, LM3S0A)
Applications
• Adjustable power supplies
• Constant current regulators
• Battery chargers
Connection Diagrams
. (TO-220)
Plastic Package
(TO-3 STEEL)
Metal Can Package
Your
TL/H/9061-5
Front View
TUH/9061-4
Order Number LM350AT or LM350T
See NS Package Number T03B
Bottom View
Order Number LM150AK STEEL, LM150K STEEL,
LM350AK STEEL or LM350K STEEL
See NS Package Number K02A
1-137
~r-
3:
Co)
U1
o
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the NatIonal SemIconductor Sales
Office/DistrIbutors for availability and specifications.
(Note 4)
Power Dissipation
Input·Output Voltage Differential
Storage Temperature
ESD Tolerance
Operating Temperature Range
TBD
-55·C ~ TJ ~ +150·C
-40"C ~ TJ ~ + 125·C
O·C ~ TJ ~ +125·C
LM150AlLM150
LM350A
LM350
Internally Limited
+35V
-65·Cto + 150"C
Preconditioning
Thermal Limit Burn·ln
Lead Temperature
Metal Package (Soldering, 10 sec.)
Plastic Package (Soldering, 4 sec.)
All Devices 100%
300·C
2f30·C
Electrical Characteristics
Specifications with standard type face are for T j' = 25·C, and 'those with boldface type apply over full Operating Tempera·
ture Range. Unless otherwise specified, VIN - Your = 5V, and lour;" 10 mAo (Note 2)
Parameter
Reference Voltage
LM150A
Conditions
lour:= 10 mA, \J = 25·C
3V ~ (YIN - Your) ~ 35V,
10 mA ~ lour ~ 3A, P ~ 30W
Line Regulation
Load Regulation
3V
~
(YIN - Your)
LM150
MIn
Typ
Max
1.238
1.250
1.262
Min
Typ
UnIts
Max
V
1.225 1.250 1.270 1.20 1.25 1.30
~ 35V (Note 3)
10 mA ~ lOUT ~ 3A (Note 3)
V
,0.005
0.01
0.005 ·0.01' %IV
0.02
0.05
0.02 0.05 %IV
0.1
0.3
0.1
0.3
%
0.3
1
0.3
1
%
0.002
0.Q1
Adjustment Pin Current
50
100
50
100
/LA
Adjustment Pin Current Change 10 mA ~ lOUT ~ 3A, 3V ~ (YIN"" Your) ~ 35V
0.2
5
0.2
5
/LA
5
mA
Thermal Regulation
20msPulse
Temperature Stability
TMIN ~ TJ ~ TMAX
Minimum Load Current
VIN - Your = 35V,
Current Limit
VIN ...: Vour ~ 10V
VIN - Your = 30V
RMS Output Noise, % of Vour 10 Hz
~
f
~
",'
0.002 0.Q1 %/W
1
3.5
3.5
5
3.0
4.5
3.0
4.5
0.3
1
0.3
1
10 kHz
%
1
A
A
0.001
0.001
%
~5
85
dB
Ripple Rejection Ratio
VOUT = 10V, f = 120 Hz, CADJ = O/LF
Long·Term Stability
TJ = 125·C, 1000 hrs
0.3
1
0.3
Thermal Resistance, Junction
to Case
K Package
1.2
1.5
1.2
1.5 ·C/W
Thermal Resistance, Junction
to Ambient (No Heat Sink)
KPackage
35
35
·C/W
Vour = 10V, f = 120 Hz, CADJ = 10 /LF
1·138
66
86
6e
88
dB
1
%
Electrical Characteristics
(Continued)
Specifications with standard type face are for TJ = 25'C, and those with boldface type apply over full Operating Tempera·
ture Range. Unless otherwise specified, VIN - VOUT = 5V, and lOUT = 10 mA. (Note 2) (Continued)
Parameter
Reference Voltage
LM350A
Conditions
lOUT = 10 mA, TJ = 25'C
3V s: (VIN - VOUT) s: 35V,
10 rnA s: lOUT s: 3A, P s: 30W
Line Regulation
3V
s: (VIN
- VOUT)
Typ
Max
1.238
1.250
1.262
10 rnA
Thermal Regulation
20 ms Pulse
s: 35V (Note 3)
Adjustment Pin Current
s: lOUT s: 3A,3V s: (VIN
s: TJ s: TMAX
Adjustment Pin Current Change 10 rnA
Temperature Stability
TMIN
Minimum Load Current
VIN - VOUT = 35V
Current Limit
VIN - VOUT s: 10V
VIN - VOUT = 30V
RMS Output Noise, % of VOUT 10Hz
s: f s:
Min
Typ
Units
Max
V
1.225 1.250 1.270 1.20 1.25 1.30
s: lOUT s: 3A (Note 3)
Load Regulation
LM350
Min
- VOUT)
s: 35V
0.005
0.01
0.005 0.03 %IV
0.02
0.05
0.02 0.07 %/V
0.1
0.3
Long-Term Stability
TJ = 125'C, 1000 hrs
Thermal Resistance, Junction
to Case
KPackage
TPackage
VOUT = 10V, f = 120 Hz, CADJ = 10 p.F
0.5
%
0.3
1.5
%
0.3
1
0,01
50
100
50
100
p.A
0.2
5
0.2
5
p.A
10
3.5
10
rnA
0.002 0.03 %/W
1
1
3.0
4.5
3.0
4.5
0.3
1
0.25
1
10kHz
VOUT = 10V, f = 120 Hz, CADJ = 0 p.F
0.1
0.002
3.5
Ripple Rejection Ratio
66
V
%
A
A
0.001
0.001
%
65
65
dB
86
66
1
0.25
1.2
3
1.5
1.2
3
4
dB
86
0.25
1
%
1.5 'C/W
4 'C/W
Thermal Resistance, Junction KPackage
'C/W
35
35
to Ambient (No Heat Sink)
TPackage
50
50
'C/W
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device Is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications end test condHions, see the Electrical Characteristics.
Note 2: These specifications are applicable for power dissipations up to 30W for the T0-3 (K) package and 25W for the TO·220 (T) package. Power dissipation Is
guaranteed at these values up to 15V input·oulput differential. Above 15V differential, power dissipation will be IImHed by internal protection circuitry. All limits (I.e.,
the numbers in the Min. and Max. columns) are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 3: Regulation is measured at a constant junction temperature, using pulse testing with a low duty cycle. Changes In output voltage due to heating effects are
covered under the specifications for thermal regulation.
Note 4: Refer to RETS150K drawing for military specifications of the LM150K.
1-139
Typical Performance Characteristics
Load Regulation
...ii
g
D.2
Current Limit
Il-'.ao~
~ -0.2
,,
III
'/~
'!rJ"-lrc
~ -La
!;
~ -0.'
..
..... i"'""
tot-:? ~
~ur~~
.... -I.IA
=
-u
~
Adjustment Current
I
I
V,N"'IV
VOUT' ,OY
-,
-Z5
-15
Z5
75
'ZI
'0
I
TEMPERATURE rc)
'I
V
T)-ZS'e
~
'1 1
ZD
ZI
30
30
35
4.1
;c
r-....
",.
.
;.
r--.
13
I..
3
1.1
75
TEMPERATURE C'C)
TEMPERATURE C'C)
Ripple Rejection
S
o
8
~TI"ZI'C
'Z5
I I
10
11
10
II
30
31
INPUT-OUTPUT DIFFERENTIAL IV)
Ripple Rejection'
Ripple Rejection
100
.
10
I:
t..
:
Z&
,JIll'
0.1
o
1.2Z
~
.
~
f-TJ" 110';'.1.&
5
-ZI
'ZI
I I
I I
TI'-li~ ~
4
.!! 3.1
1\
-75
71
Minimum Operating Current
1.21
'00
ZI
TEMPERATURE rc)
Temperature Stability
Dropout Voltage .
:a
-Z5
-75
INPUT-OUTPUT DifFERENTIAL CV)
-
. CJDJ.tF
..........
--=-
E
~
i
ViN - Vour - IV
'aur - IGOIIIA
ZO
80
10
..
r--
~AOli 0
S
:a
'='20",
S
"'\
/"
CADI "
a'\
40
\.. ~
',- ZS'C
VIN'; 18V
Vou, - .ov
T," zrc
80
2
,\
'our - IGOIIIA
10
.
.~
:a
CAO}·'0.F
~
~
10
40
~ tmllil o
V,N
10
"nU"
1
~!~lo "H~OV-;-ttttttlH-+++i!IfI
TI=15'C
o~~~~~~~~~
I
10 II ZD ZI 3D
OUTPUT VOLTAOE IV)
31
10
Ik
10k
YO
",
!E
il
r
r- CAOI"0.JI
'M
CL·G.CADI"O
D.I
.1.
-0.1
CL"' !F,
Uo
/I
..
I
I
c~olL 10~
100
Ik
Vour" lOY
'IUI" IOmA
',- ZI'C
r
FREQUENCY IH.)
lOOk
Load Transient Response
IE
II
IG
20
TIME",,)
30
1.1 r-l"""1--;:::-:n-;;:-:~-'-"'T'""
1 H'-t-T-T- ~-rAHH
0.5
O~~~~~~
-1.5
~
1M
IG
II-~~ t-++I--'-+-
". CADI" '0 ""
10k
0.1
OUTPUT CURRENT CAl
'0-3
10
0.01
Line Transient Response
VIN - 'IV
V... -IIY
'our - IGOIIIA
T,-Zl'C _
lOOk
FREQUENCY CH.)
Output Impedance
I---
100
4G
i : : ~1-+-t-~'-t---11r+--r--j
o .....L...J...J._ _
10
...J...I.I.-l..~
10
30
4D
TIME,,..)
TLlH/9061-6
1-140
Application Hints
In operation, the LM150 develops a nominal 1.25V reference voltage, VREF, between the output and adjustment terminal. The reference voltage is impressed across program
resistor Rl and, since the voltage is constant, a constant
current 1, then flows through the output set resistor R2, giving an output voltage of
VOUT = VREF (1
LOAD REGULATION
The LM150 is capable of providing extremely good load regulation but a few precautions are needed to obtain maximum performance. The current set resistor connected between the adjustment terminal and the output terminal (usually 240m should be tied directly to the output (case) of the
regulator rather than near the load. This eliminates line
drops from appearing effectively in series with the reference
and degrading regulation. For example, a 15V regulator with
0.050 resistance between the regulator and load will have a
load regulation due to line resistance of 0.050 x lOUT. If
the set resistor is connected near the load the effective line
resistance will be 0.050 (1 + R2/Rl) or in this case, 11.5
times worse.
Figure 2 shows the effect of resistance between the regulator and 2400 set resistor.
+ :~) + IADJ R2.
RS
.....""".,.--VOUT
R1
240
TLIHIB061-7
FIGURE 1
Since the 50 p.A current from the adjustment terminal represents an error term, the LM150 was designed to minimize
IADJ and make it very constant with line and load changes.
To do this, all quiescent operating current is returned to the
output establishing a minimum load current requirement. If
there is insufficient load on the output, the output will rise.
TLIHIBOSl-8
FIGURE 2. Regulator with Line Resistance
In Output Lead
With the TO-3 package, it Is easy to minimize the resistance
from the case to the set resistor, by using two separate
leads to the case. The ground of R2 can be returned near
the ground of the load to provide remote ground sensing
and improve load regulation.
EXTERNAL CAPACITORS
An input bypass capacitor is recommended. A 0.1 p.F disc
or 1 p.F solid tantalum on the input is suitable input bypassing for almost all applications. The device Is more sensitive
to the absence of input bypassing when adjustment or output capacitors are used but the above values will eliminate
the possibility of problems.
The adjustment terminal can be bypassed to ground on the
LM150 to improve ripple rejection. This bypass capacitor
prevents ripple from being amplified as the output voltage Is
increased. With a 10 p.F bypass capacitor 86 dB ripple rejection is obtainable at any output level. Increases over
10 p.F do not appreciably improve the ripple rejection at
frequencies above 120 Hz. If the bypass capacitor is used, it
is sometimes necessary to Include protection diodes to prevent the capacitor from discharging through Internal low current paths and damaging the device.
In general, the best type of capacitors to use Is solid tantalum. Solid tantalum capacitors have low Impedance even at
high frequencies. Depending upon capacitor construction, It
takes about 25 p.F In aluminum electrolytic to equal 1 p.F
solid tantalum at high frequencies. Ceramic capacitors are
also good at high frequencies, but some types have a large
decrease in capacitance at frequencies around 0.5 MHz.
For this reason, 0.01 p.F disc may seem to work better than
a 0.1 p.F disc as a bypass.
Although the LM 150 is stable with no output capacitors, like
any feedback circuit, certain values of external capacitance
can cause excessive ringing. This occurs with values between 500 pF and 5000 pF. A 1 p.F solid tantalum (or 25 p.F
aluminum electrolytic) on the output swamps this effect and
insures stability.
PROTECTION DIODES
When external capacitors are used with any IC regulator It Is
sometimes necessary to add protection diodes to prevent
the capacitors from discharging through low current points
into the regulator. Most 10 p.F capacitors have low enough
internal series resistance to deliver 20A spikes when short·
ed. Although the surge is short, there Is enough energy to
damage parts of the IC.
When an output capacitor Is connected to a regulator and
the input Is shorted, the output capacitor will discharge Into
the output of the regulator. The discharge current depends
on the value of the capacitor, the output voltage of the regu·
lator, and the rate of decrease 01 VIN. In the LM160, this
discharge path Is through a large Junction that Is able to
sustain 25A surge with no problem. This Is not true 01 other
types of positive regulators. For output capacitors 01 25 p.F
or less, there Is no need to use diodes.
The bypass capacitor on the adjustment terminal can discharge through a low current Junction. Discharge occurs
when either the Input or output Is shorted. Internal to the
LM 150 is a 500 resistor which limits the peak discharge
current. No protection is needed for output voltages of 25V
or less and 10 p.F capacitance. Figure 3 shows an LM150
with protection diodes included for use with outputs greater
than 25V and high values of output capacitance.
1-141
Application Hints (Continued)
01
lN400Z
01 protects against Cl
H ....~......- -...-VOUT
02 pro1ects against C2
VOUT
= 1.25V
(I + ~) + IADJR2
TL/H/S061-S
FIGURE 3. Regulator with Protection Diodes
Schematic Diagram
r--1""----t---.,...--...,.--""'1-.,..--------------....----....
- 9 - - v,•
."
3
L.--4---~-------'--~--~-4~~--~-1t:~::~~:::j::::::~::~::~;;::::::::::::::~~::::,VOUT
AOJ
IV
TLfH/9061-10
Typical Applications
Full output current not available
at high Input-output voltages.·
1.2V-25V Adjustable Regulator
tOptional-improvestransient response. Output capacitors in the range of I
/,F to 1000 /,F of aluminum or tentalum electrolytic are commonly used to
provide improved output impedance and rejection of transients.
'Needed If device Is more than 6 Inches from filter capacitors.
""'''-+-VOUTtt
Rl
240
+
C2t
hF
TLfH/9061-1
1·142
ttvOUT = 1.25V
(I + ~) + IADJ (R2)
Note: Usually Rl
= 2400 for LMI50 and RI =
1200 for LM350.
r-
....s::
Typical Applications (Continued)
en
Precision Power Regulator with
Low Temperature Coefficient
~
......
Slow Turn·ON 15V Regulator
r-
t-<.....- - - -...- ~:VUT
L.-"T-.......
1--~~-----~~VDUT~4V
....s::en
Q
......
r-
Uk
lN4DD2
s::
Co)
en
~
......
r-
s::
HI
315
Co)
en
Q
LM331 A:---+C
TL/H/9061-14
1N451
'Adjust for 3.75V across Rl
TUH/9061-13
Adjustable Regulator with Improved
Ripple Rejection
High Stability 10V Regulator
~
I5V
VOOT
10V
RI
2k
5%
DI*
lN40D2
R2
Uk
1%
R3
211
1%
tSolid tantalum
TUH/9061-15
·Discharges C1 If output is shorted to ground
TL/H/9061-16
Digitally Selected Outputs
Regulator and Voltage Reference
I---~~VOUT
VIN------I
VIN
Rl
240
R2
Uk
VREF·I.D5V
TUH/9061-3
INPUTS
TL/H/9061-17
'Sels maximum VOUT
1·143
Typical Applications
(Continued)
10A Regulator
0.1
2k
0.05
0.1
0.1
....- .....
I--------~
I - - VOUT*
120
+
2hF
'Minimum load current 50 mA
TL/H/9061-18
oto 30V Regulator
5V Logic Regulator with
Electronic Shutdown'
H ....."""'4..... :: UT
"--T-~
.........""'' ' -TTL
lk
TL/H/D061-19
'Min output'" 1.2V
R3
680
-IDV
TLiH/D061-20
Full output current not available at high Input-output voltages
1-144
..r-
3:
Typical Applications (Continued)
UI
o
l>
......
r3:
5A Constant Voltage/Constant Current Regulator
..
MJ45D2
,---------------~------~~--~
R3
0.2
5W
Rl
33
UI
o
......
r-
3:
Co)
..... ~.~~~~!V
1-. .---~.....----~I----4--~
C3
UI
~
......
r-
+
1DPFtT
3:
Co)
UI
o
C5
15 pF
tSolid tantalum
R5
33Dk
-BVTO -15V
*Ughts in constant current mode
TL/H/9061-21
12V Battery Charger
500
R6
0.2
+
TO 12V
BATIERY
RI
3k
0.1 pF
+
TLIH/9061-22
1-145
C)
Lt)
CO)
:i
~
CO)
:i
c:;
r---------------------------------------------------------------------------------,
Typical Applications (Continued)
Adjustable Current Regulator
t-~~~~
Precision Current Limiter
_____ IOUT
OT/I3A
Lt)
.-
TUH/B061-24
:i.....
'0.4:': R1 :.: 1200
LM117
f the package on the output pin. Negative side sensing is a
true Kelvin connection; with the bottom of the output divider
returned to the negative side of the load.
1-152
Application Hints (Continued)
Although it may not be immediately obvious, best load regulation is obtained when the top of the divider is connected
directly to the output pin, not to the load. This is illustrated in
Figure 2. If R1 were connected to the load, the effective
resistance between the regulator and the load would be
TC = Temperature coefficient of output voltage.
iliA = Thermal resistance from junction to ambient. iliA is
approximately 0.5'C/W + II of heat sink.
For the same conditions as before, with TC = 0.003%I'C,
and iliA = 1.5'C/W, the change in output voltage will be
0.18%. Because these two thermal terms can have either
polarity, they may subtract from, or add to, electrical load
regulation. For worst-case analysis, they must be assumed
to add. If the output of the regulator is trimmed under load,
only that portion of the load that changes need be used in
the previous calculations, significantly improving output accuracy.
(Rw) x (R2 :1 R1)
Rw = Line Resistance
Connected as shown, Rw is not multiplied by the divider
ratio. Rw is about 0.004.0 per foot using 16 gauge wire. This
translates to 40 mV /ft at 10A load current, so it is important
to keep the positive lead between regulator and load as
short as possible.
Rw
PARASITIC
LM39&
LINE RESISTANCE
VIN
VOUT~
,,,,,
J
AOJ
Line Regulation
Electrical line regulation is very good on the LM196-typically less than 0.005% change in output voltage for a 1V
change in input. This level of regulation is achieved only for
very low load currents, however, because of thermal effects. .Even with a thermal regulation of O.002%.W, and a
temperature coefficient of 0.003%I'C, DC line regulation
will be dominated by thermal effects as shown by the following example:
DO NOT CONNECT
Rl TO LOAD
I"
+
Assume VOUT = 5V, VIN = 9V, lOUT = 8A
Following a 10% change in input voltage (0.9), the output
will change quickly (';; 100 /Ls), due to electrical effects, by
(0.005%V) X (0.9V) = 0.0045%. In the next 20 ms, the
output will change an additional (0.002%/W) X (8A) x
(0.9V) = 0.0144% due to thermal gradients across the die.
After a much longer time, determined by the time constant
of the heat sink, the output will change an additional
(0.003%I'C) X (8A) x (0.9V) X (2'C/W) = 0.043% due to
the temperature coefficient of output voltage and the thermal resistance from die to ambient. (2'C/W was chosen for
this calculation). The sign of these last two terms varies
from part to part, so no assumptions can be made about any
cancelling effects. All three terms must be added for a proper analYSis. This yields 0.0045 + 0.0144 + 0.043 =
0.062% using typical values for thermal regulation and temperature coefficient. For worst-case analysis, the maximum
data sheet specifications for thermal regulation and temperature coefficient should be used, along with the actua/thermal resistance of the heat sink being used.
:~R2
•
~~
----------------~i
CONNECTR2
TO LOAD
TL/H/9059-2
FIGURE 2. Proper Divider Connection
The input resistance of the sense pin is typically 6 kn, modeled as a resistor between the sense pin and the output pin.
Load regulation will start to degrade if a resistance higher
than 10.0 is inserted in series with the sense. This assumes
a worst-case condition of 0.5V between output and sense
pins. Lower differential voltage will allow'higher sense series
resistance.
Thermal Load Regulation
Thermal, as well as electrical, load regulation must be considered with IC regulators. Electrical load regulation occurs
in microseconds, thermal regulation due to die thermal gradients occurs in the 0.2 ms-20 ms time frame, and regulation due to overall temperature changes in the die occurs
over a 20 ms to 20 minute period, depending on the time
constant of the heat sink used. Gradient induced load regu-'
lation is calculated from
.:\VOUT = (VIN - VOUT) X (.:\IOUT) X (.8)
{3 = Thermal regulation specified on data sheet.
For VIN = 9V, VOUT = 5V, .:\IOUT = ,10A, and {3 =
0.005%/W, this yields a 0.2% change in output voltage.
Changes in output voltage due to overall temperature rise
are calculated from
VOUT = (VIN- VOUT) X (':\IOUT) X (TC)
x (lIiN
Paralleling Regulators
Direct paralleling of regulators is not normally recOmmend. ed because they do not share currents equally. The regulator with the highest reference voltage will supply all the current to the load until it current limits. With an 18A load, for
instance, one regulator might be operating in current limit at
16A while the second device is only carrying 2A. Power dissipation in the high current regulator is extremely high with
attendant high junction temperatures. Long term reliability
cannot be guaranteed under these conditions.
Quasi-paralleling may be accomplished if load regulation is
not critical. The connection shown in Figure 5a will typically
share to within 1A, with a worst-case of about 3A. Load
regulation is degraded by 150 mV at 20A loads. An external
op amp may be used as in Figure 5b to improve load regulation and provide remote sensing.
, 1-153
Application Hints (Continued)
VNOM = Nominal line voltage AC rms
VLOW = Low line voltage AC rms
lOUT = DC output current
Example: lOUT = 10A, VOUT = 5V
Assume: VREG = 2.2V, VRECT = 1.2V
VRIPPLE = 2Vp-p, VNOM = 115V,
VLOW = 105V
Input and Output. Capacitors
The LM196 will tolerate a wide range of input and output
capacitance, but long wire runs or small values of output
capacitance can sometimes cause problems. If an output
capacitor is used, it should be 1 ,...F or larger. We suggest 10
,...F solid tantalum if significant improvements In high frequency outPl.lt impedance are needed (see output impedance graph). This capacitor should be as close to the regulator as possible, with short leads, to reduce the effects of
lead inductance. No input capacitor is needed if thEi regulator is within 6 inches of the power supply filter capacitor,
using 18 gauge stranded wire. For longer wire runs,' the
LM196 input should be bypassed locally with a 4.7 ,...F (or
larger) solid tantalum capacitor, or a 100 ,...F (or larger) aluminum electrolytic capacitor.
V
= (5
,ms
105.
The diodes used in a full-wave rectified capaCitor input supply must have a DC current rating considerably higher than
the average current flowing through them. In a 10A supply,
for instance, the average current through each diode is only
5A, but the diodes should have a rating of 1OA-15A. There
are many reasons for this, both thermal and electrical. The
diodes conduct current in pulses about 3.5 ms wide with a
peak value of 5-8 times the average value, and an rms
value 1.5-2.0 times the average value. This results in long
term diode heating roughly equivalent to 10A DC current.
The most demanding condition however, may be the one
cycle surge through the diode during power turn on. The
peak value of the surge is about 10-20 times the DC output
current of the supply, or 100A-200A for a 10A supply. The
diodes must have a one cycle non-repetitive surge rating of
200A or more, and this is usually not found in a diode with
less than 10A average current rating. Keep in mind that
even though the LM196 may be used at current levels below 1OA, the diodes may still have to survive shorted output
conditions where average current could rise to 12A-15A.
Smaller transformers and filter capacitors used in lower current supplies will reduce surge currents, but unless specific
information is available on worst-case surges, it is best. not
to economize on diodes. Stud-mounted devices in a 00-4
package are recommended. Cathode-to-case types may be
bolted directly to the same heat sink as the LM196 because
the case of the regulator is its power input. Part numbers to
consider are the 1N1200 series rated at 12A average current in a 00-4 stud package. Additional types include common cathode duals in a TO-3 package, both standard and
Schottky, and various duals in plastiC filled assemblies.
Schottky diodes will improve efficiency, especially in low
voltage applications. In a 5V supply for instance, Schottky
diodes will decrease wasted power by up to 6W, or alternatively provide an additional 5% "drop,out" margin for lowline conditions. Several manufacturers are producing "high
efficiency" diodes with a forWard voltage drop nearly as
good as Schottkys at high current levels. These devices do
not have the low breakdown 'voltages of Schottkys, so are
much less prone to reverse breakdown induced failures.
Transformers and Diodes
Proper transformer ratings are very important in a high current supply because of the conflicting requirements of efficiency and tolerance to low-line conditions. A transformer
with a high secondary voltage will waste power and cause
unnecessary heating in the regulator. Too Iowa secondary
voltage will cause loss of regulation under low-line conditions. The following formulas may be used to, calculate the
required secondary voltage and cU,rrent ratings using a fullwave center tap:
+ VREG + VRECT + VRIPPLE)
,f2
.J2
= 8.01 V,ms
. C _ (5.3 X 10- 3) (lOUT)
Capacltor
2 V
X RIPPLE
= (5.3 x 10-3){10) = 26500 II.F
2
,,..
Correcting for Output Wire Losses (LM196/LM396)
Three-terminal regulators can only provide partial Kelvin
load sensing (see Load Regulation). Full remote sensing.
can be added by using an external op amp to cancel the
effect of voltage drops in the unsensed positive output lead.
In Figure 7, the LM301A op amp forces the voltage loss
across the unsensed output lead to appear across'R3. The
current through R3 then flows out the V- pin of the op amp
through R4. The voltage drop across R4 will raise the output
voltage by an amount equal to the line loss, just cancelling
the line loss itself. A small ("" 40 mY) initial output voltage
error is created by the quiescent current of the op amp.
Cancellation range is limited by the maximum output current
of the op amp, about 300 mV as shown. This can be raised
by increasing R3 or R4 at the expense of more initial output
error.
- (VOUT
V
,ms -
+ 2.2 + 1.2 + 1) (~) 1 1
,
(~:~~)( (1.1)')
(Full-wave center tap)
Irms = (lOUT) (1.2)
where:
VOUT = DC regulated output voltage
VREG = Minimum input-output voltage of regulator
VRECT = Rectifier forward voltage drop at three times DC
output current
VRIPPLE = 1/2 peak-to-peak capacitor ripple voltag!!
= (5.3X 10- 3) (lOUT)
2C
'The factor of 1.1 is only an approximate factor accounting for load regulation of the transformer.
1-154
r
s:
......
Typical Performance Characteristics
~
e
....
a
>
a
;::
'ai"
I-+-:-±=l::::*::::!:--+---'
2.0
~
1.0
~
a
...
~
::;
5
..
..
~ -1.0 ~~-+-!__+-'
z
~ -2.0
Minimum Input-Output
Differential'
Minimum Input-Output
Differentia"
Reference Drift
~~
I-+--t-t-+-I--i-'
a
2.2
2.0
1.8
Tj!Jc
~
Tj'25~
1.4
1.2
I-"" ~~ (
~~ Tj=15O"C
=
1.6
Trot
f-+-
2.0
~
1,9
i5
~
1.B
1.1
I!:
~
~_
-
50
100
150
o
1
2
TEMPERATURE rCI
3
4
5
6
7
B
Co)
co
Q)
I
roo-
10UT= IDA
r-.....
r-... .............. ,........
r-....
I
t-...I
"-
1-"'"
' " lOUT" SA
1.5
1.4
N
loUT=2A'
1.3
-50 -25
9 10
s:
1
r- roo-
2.1
ffi
1.0
-50
2.2
cc
;::
~
l.....- I-""
~
2.3
-~
........ ~~ .....
- --
f-'"
1.6
co
Q)
.......
r
0
25
50
75 100 125 150
JUNCTION TEMPERATURE I'C)
OUTPUT CURRENT IAI
TL/H/9059-3
'VIN is reduced until output drops 2%
Maximum Power
Dissipation'
Current Limit
20
-"
lB
5
1&
...::;
14
...~
10
0:
0:
12
.
Tj"25'C f - "
MEA~UREo 100 ms
."\..
I
"I!:
"
I
I
.'\..
I
o
~
AFTER SHORT IS
,APPLIED
./SUAllAffrEfIJ "
MINIMUM
o
"'VIN is reduced until output drops 2%
10
0:
~
Ii!
t\..
~
15
20
120
110
100
90
BO
70
60
50
40
30
20
10
0
25
Maximum Heat Sink
Thermal Resistance'
1.5
~
LMI95
.....
1.1
z
0.9
'"
In
..
LM39&
1.3
"-
!1i
~
"'"~
...
1\
...
~
I\~"'"
0.7
0.5
0.3
-:~\.
..~~ ~
~\b~~~;
~
30
0
INPUT·OUTPUT DIFFERENTIAL IV)
60
90
120
<'~-
,,;;,
0.1
o
LMJ96
.~
o
20
CASE TEMPERATURE I'C)
I\..
40
60
Bo
100
120
POWER DISSIPATION IWI
TL/H/9059-4
"'As limited by maximum junction temperature.
TO-3 Interface Thermal
Resistance Using Thermal
Joint Compound
Maximum Heat Sink
Thermal Resistance'
1.5
...~
..
;
~
ill
..~
...
~
'~A~2~'C
1.3
TA "100'C
TA' Bo'C
1.1
TA" 60°C
f
0.9
;--'TA- 4 C
0.7
!
LM196
0.2
~
0.15
z
..
..~
40
60
Bo
100
120
POWER DISSIPATION IW)
I
I
1
NO INSULATOR
.,r
./
V
Thermal Regulation
./
r--
./
fJ
./
MOUNTING THICKNESS' O.IB" ALUM •
JOINT COMPOUND' o.oolB
r-~'r'
T) = 25'C
~
./
0.1
~ 0.05
!!
0.1 TA • 12o'C
20
...~.....
!1i
0.5
0.3
I
·See "Heat Sinking" under Applications Hints.
rc',~~L
1.
t
~ii~5W
o
TOTAL SURFACE RUNOUT IMILS/INCH)
!INCLUDES TO·3 AND HEATSINK RUNOUTI
,
I
2 4 6
B
ro u
~
ro "
H
TIME 1m.)
TL/H/S05S-5
'See "Heat Sinking" under Application Hlnls:
1-155
Typical Performance Characteristics
(Continued)
i
7&
~
a5
...
80
ft
I
70
51
50
45
to
FREQUENCY (kHzl
FREQUENCY (Hzl
"'-'L-I-J.........-'-""-"'-'-'
o I
100
2 3 4 I
8 7 • I 10
OUTPUT CURRENT (AI
TL/H/9059-B
'To obtain output noise, multiply by
VOUTtl.25 If adjustment plnls not bypassed.
a5 Adjustment Current
l
&0
8
&I
I
10
Ii!
45
;
4D
c
35
ID
....
.r
Output Impedance
Adjustment PIn Bypassed
(C = 25 p.F)
1. 1==11 I U==~I'~
1;
1/I'
O.ol~~
0.01
0.001
30
-75
-25
25
7&
125
t::±:::i=i::::t:::j
10
100
Ik
10k
lOOk
EE
0.001
10
I",
100
FREQUENCY (Hzl
TEMPERATURE rCI
Ik
IDk
lOOk
1M
FREQUENCY (Hzl
TL/H/9059-7
• For OUtpUI voltages olher than 5V, multiply ver·
tical scale readings by VOUTt5.
LIne TransIent Response
Adjustment PIn Bypassed
.1Y,N' O.IY
I-
tr,I'lp.
r±COUT'
CADI' &pF
ALL TRACES
P TN
: ~U~ ,IIA~,dA
I'
I
4D
.110UT"A
10C' IA -IDA
80
10
TIME (pol
120
CADI' 25 pF ALL TRACEB_
20
4D
co
!i
~r'PF ANT
r-.COUT' 100 pF ALUM
100
Une TransIent Response·
ii
~1
f-COUT' 10 pF TANT
C U ".100 pF ALUM
20
tr.I:S;IOOn. r-
~COUT'O
oCqUT' I p TANI
CUT"
Load TransIent Response
Adjustment PIn Bypassed
10
TIME (pol
10
r100
120
I
I
tr,t- 1 ""
r-.1Y,N'O.5Y
r-
,.,...COUT'O
D"I'Y
I COUT' I pF TANT
'OUT"A
IDA
COUT ' 10 pF TANT
YOUT'&Y
F- COyT' lOO,.F ALU~+-H20
4D
&0
8D
100
120
TIME (PSI
TL/H/9059-8
'With no adjustmenl pin bypass. For output volt·
ages olher than 5V, multiply vertical scale by
VOUTtS.
1·156
Typical Performance Characteristics
(Continued)
Load Transient Response'
Ir.f~100nl-1-
-
' •.8
E~i
:!ac
>ji
L
~=
"w
1 1
0.5
1
o
...I~
1
8
TIME"'~
W
12 "
\
,
'-
~
~
100
....
10-1
"
10k
lOOk
1M
10
100
100
50
~
I
W
:g
g;
~
CL·'.F
CADJoIO.F
1 1 I 1\
'0
I
20
TIME",,)
.... :;;
~>
=~
.
1'2~\
1
30
10k
lOOk
1M
Thermal Regulation
~>
1 I LII..
VIN.',5J
VOUTolOV
INL' 5mA
Ik
FREQUENCY (Hz)
bL.10 1
-r- CADJoO"",1
1
248
101
10-2
Ik
-
4D
3D
w
u
Load Transient Response
1.5
I
CADJ"O.F
.
:!
FREQUENCY (Hz)
Line Transient Response
20
102
1
o
35
OUTPUT VOLTAGE (V)
1.5
1 1 I
10
§
.......
-
40
.=T)'25'C
10
1.0
Output Impedance
~
1
80
Ul
IL=40mA
I-120 Hz
f:.'
~"25'C~
INPUT-OUTPUT DIFFERENTIAL (V)
I--C~OJ"O~F- r--
-
40 I-- V,N-VOUT 0 5V
20
--Iot.,..-
25 50 15 100 125 ISO
80
"'-
l""-
Tj'25'C_
'II I
Tjo -25'C
Ripple Rejection
100
a;
CA~
2.0
TEMPERATURE rc)
Ripple Rejection
~
-
_L J I
TEMPERATURE ('C)
80
3.0
1.230
-15 -50 -25 0 25 50 15 .00 125 ISO
CAriJo.J.F I--
"
C
s·
....
i1.260
U'--'--'--'--''--J'--J'-'--'--'
m
-15 -50 -25 0 25 50 15 100 125 150
40
!!
'".."
40
Reference Voltage
Temperature Stability
I--+-+-+++-I--l--f-l
.00
..a
V
l
INPUT·OUTPUT DIFFERENTIAL IV)
;! 2.5
1.0
i-"~
35
0
Dropout Voltage
~~
~
0
r--1n-,--.-,:""--r-r..,
e
55
....
ill
Ti'·~5'C
3.0
~
..;I
0.1
TEMPERATURE ('C)
~
C
2~'C
.-
0.2
-15 -50 -25 0 25 50 15 '00 125 .50
~
Adjustment Current
60
0.3
~
~
Current Limit
Load Regulation
g
ill
..
0 ",F unless otherwise noted.)
40
3D
-10
-20
i
-3D
"
1.0
i"
VDur" OY
llPDWER'!W
20
10
r-..
~
1.5
I
0.5
0
10
20
3D
40
TIME (m,)
TLlH/9064-6
1-163
•
Application Hints
In operation, the LM317L develops a nominal1.25V reference voltage, VREF, between the output and adjustment terminal. The reference voltage is impressed across program
resistor R1 and, since the voltage is constant, a constant
current 11 then flows through the output set resistor R2; giving an output voltage of
VOUT = VREF (1
+, R2)
+ IADJ(R2):
R1
Since the 100 poA current frpm the adjustment terminal represents an error term, the' LM317L was designed to minimize IADJ and make it very constant with line and load
changes. To do, this, all quiescent operating current is returned to the output establishing a minimum load current
requirement. If there is insufficient load on the output, the
output will rise.
It'
"REF
-
IAOJ
Rt
1
VOUT
I
Tl/H/90S4-7
FIGURE 1
External Capacitors
An input bypass capacitor is recommended in case the regulator Is more than 6 Inches away from the usual large filter
capacitor. A 0.1 poF disd or 1 poF solid tantalum on the input
Is suitable input bypassing for almost all applications. The
device is more sensitive to the absence of Input bypassing
when adjustment or output capacitors are used, but the
above values will eliminate the posslblity of problems.
The adjustment terminal can be bypassed to ground on the
LM317L to improve ripple rejection and noise. This bypass
capacitor prevents ripple and noise from being amplified as
the output voltage Is Increased. With a 10 poF bypass capacItor 80 dB ripple rejection' is obtainable at any output level.
Increases over 10 "F do not appreciably Improve the ripple
rejection at frequencies above 120 Hz. If the bypass capacitor is used, It Is sometimes necessary to Include protection
diodes to prevent the capacitor from discharging through
inlernallow current paths and damaging the device.
In general, the best type of capacitors to use is solid tantalurri. Solid tantalum capacitors have low impedance even at
high frequencies. Depending upon capacitor construction, it
takes about 25 poF in aluminum electrolytic to equal 1 poF
solid tantalum at high frequencies. C,eramic capacitors are
,",also good at high frequencies; but some types have a large
decrease in capacitance at frequencies around 0.5 MHz.
For this reason, a 0.01 poF disc may seem to work better
than a 0.1 poF disc as a bypass.
'
Although the LM317L is stable with no output capacitors,
like any feedback circuit, certain values of external capacitance can cause excessive ringing. This occurs with values
between 500 pF and 5000 pF. A 1 poF solid tantalum (or 25
poF aluminum electrolytic) on the output swamps this effect
and insures stability.
,Load Regulation
The LM317L is capable of providing extremely good load'
'regulation but a few precautions are needed to obtain maxirrium performance. The current set resistor connected between the adjustment terminal and the output terminal (usually 2400) should be tied directly to the output of the regula, tor rather than near the load. This eliminates line drops from
'appearing effectively in series with the reference and degrading regulation. For example, a 15V regulator with 0.050
resistance between the regulator, and load will have a load
regulation due to line resistance of 0.050 x 'L. If the set
resistor is connected near the load the effective line resist, anoe will be 0.050 (1 + R2/R1) or in this case, 11.5 times
worse.
Figure 2 shows the effect of resistance between the regulator and 2400 set resistor.
With the TO-92 package, it is easy to minimize the reSistance from the case to the set resistor, by using two separate leads to the output pin. The ground of R2 can be returned near the ground of the load to provide remote ground
sensing and improve load regulation.
Tl/H/90S4-S
FIGURE 2. Regulator with Line Resistance
In Output Lead
'
1-164
r-
Application Hints (Continued)
Co)
vent the capacitors from discharging through low current
pOints into the regulator. Most 10 p.F capacitors have low
enough internal series resistance to deliver 20A spikes
when shorted. Although the surge is short, there is enough
energy to damage parts of the IC.
Thermal Regulation
When power is dissipated in an IC, a temperature gradient
occurs across the IC chip affecting the individual IC circuit
components. With an IC regulator, this gradient can be especially severe since power dissipation is large. Thermal
regulation is the effect of these temperature gradients on
output voltage (in percentage output change) per watt of
power change in a specified time. Thermal regulation error
is independent of electrical regulation or temperature coefficient, and occurs within 5 ms to 50 ms after a change in
power dissipation. Thermal regulation depends on IC layout
as well as electrical design. The thermal regulation of a voltage regulator is defined as the percentage change of VOUT,
per watt, within the first 10 ms after a step of power is applied. The LM317L specification is 0.2%/W, maximum.
When an output capacitor is connected to a regulator and
the input is shorted, the output capacitor will discharge into
the output of the regulator. The discharge current depends
on the value of the capacitor, the output voltage of the regulator, and the rate of decrease of VIN. In the LM317L, this
discharge path is through a large junction that is able to
sustain a 2A surge with no problem. This is not true of other
types of positive regulators. For output capacitors of 25 p.F
or less, the LM317L's ballast resistors and output structure
limit the peak current to a low enough level so that there is
no need to use a protection diode.
The bypass capacitor on the adjustment terminal can discharge through a low current junction. Discharge occurs
when either the input or output is shorted. Internal to the
LM317L is a 500 resistor which limits the peak discharge
current. No protection is needed for output voltages of 25V
or less and 10 p.F capacitance. Figure 3 shows an LM317L
with protection diodes included for use with outputs greater
than 25V and high values of output capacitance.
In the Thermal Regulation curve at the bottom of the Typical
Performance Characteristics page, a typical LM317L's output changes only 7 mV (or 0.07% of VOUT = -10V) when
a 1W pulse is applied for 10 ms. This performance is thus
well inside the specification limit of 0.2%/W X 1W = 0.2%
maximum. When the 1W pulse is ended, the thermal regulation again shows a 7 mV change as the gradients across the
LM317L chip die out. Note that the load regulation error of
about 14 mV (0.14%) is additional to the thermal regulation
error.
Protection Diodes
When external capacitors are used with any IC regulator it is
sometimes necessary to add protection diodes to pre-
I~
LM317L
VIN
........s::
-,UV1N
.-,
ll-4....._
VOUT
ADJ
·1
D2 lN4002 ~
~
~
...------..__
. -VOUT
-'-
~ Rl
:~ 240
T
Cl
-~C2
1
10llF
FIGURE 3. Regulator with Protection Diodes
TL/H/9064-9
VOUT = 1.25V (1
+~) IADJ R2
01 protects against Cl
02 protects against C2
1-165
r-
LM317L
W
::r
CD
3
a
n
c
i"
ca
IN
i
3
R20
300k
D18
&.2V
R25
4.7k
R12
,
0.3
~
~
8l
D19
Rll
60
&.2V
R14
15k
AlB
10
Al6
0.3
OUT
TUH/9064-10
Typical Applications (Continued)
Digitally Selected Outputs
High Gain Amplifier
.....- -........ VOUT
LM31iL
RI
240
R2
12
R2*
RI
10k
INPUT -M....,t-t
INPUTS
TLlH/9064-12
TL/H/9064-11
'Sets maximum VOUT
Adjustable Current Limiter
Precision Current Limiter
-1.2
.........Y,,.,,.. .-IOUT= AI
~::r-...I
TL/H/9064-13
12,; Rl ,; 240
TLlH/9064-14
Slow Turn-On 15V Regulator
Adjustable Regulator with
Improved Ripple Rejection
01*
lN4002
TLlH/9064-1S
tSolid tantalum
'Discharges Cl if output is shorted to ground
High Stability 10V Regulator
TLlH/9D64-16
Adjustable Regulator with Current Limiter
r----.,+
I
I
I
I
I
I
I
I
I
LM317L
VIN AOjVOUTI-....--VOUT= 1.250V
I
(~.,)
Rl
120
ITRANSFORMER,'
I :~~T~~~;:: I
I
R3
287
111
CAPACITOR
I
II
II
I
I
I
I
IL _____ I~_~~~~...I
TL/H/9064-17
01
TLlH/9064-18
Short circuit current Is approximately 600 mVIR3, or 60 mA (compared to
LM3t 7LZ's 200 mA current limit).
At 25 rnA output only 3/4V of drop occurs In R3 and R4.
1-167
~
...."
CO)
::i
~
r-----------------------------------------------------------------------------,
Typical Applications (Continued)
OV-30V Regulator
Regulator With 15 mA Short Circuit Current
Power Follower
10V-40V
Cl
-=!='" O.I~....F_.....,
INPUT
-1\1\""
.........
Rl
10k
120k
LM317L
R2
12
-10V
TLlH/9064-20
TLlH/9064-19
TL/H/9064-21
Full outpul current not available at high input·out.
put voltages
Adjusting Multiple On-Card Regulators with Single Control'
I-+-VOUT
I...-_-+_____.......J _ _ _ i-- _
I
__ J
'AII,outputs within ± 100 mV
tMinimum load -SmA
TUH/9064-22
100 mA Current Regulator
1.2V-12V Regulator with Minimum
Program Current
50 mA Constant Current Battery
Charger for Nickel-Cadmium
Batteries
15V
TL/H/9064-25
TUH/9064-23
'Minimum load current::: 2 mA
1-168
TL/H/9064-24
Typical Applications (Continued)
5V Logic Regulator with Electronic Shutdown'
Current Limited 6V Charger
YIN
9YTO 3DY
.........:.;;;:..........H""-"'-~9UT
IDDDI'F··
t-+-JVV'-- TTL
1.Ik
Ik
Rl
10·
TL/H/9064-26
*Minimum output::::: 1.2V
TL/H/9064-27
'Sets peak currenl,
IpEAK
= O.SV/RI
··1000 IJoF is recommended to filter out any input transients.
Short ,Circuit Protected BOV Supply
BLACK
115
~~ II-+-------.
11/8 AMP, TYPE 'BAG
I
I
BLACK·YELLOW
FUSE OR CIRCUIT BREAKER
.J
IN4DD2
LM311L
TL/H/S064-28
1·169
.....,...
:I
~r-----------------------------------------------------------~-.
CO)
Typical Applications (Continued)
Basic High Voltage Regulator
LM317L
VOUT
VOUT 1--....- - -. .-1.2VTO
180V.2&mA
AOJ
R7
2.7
C2
~,.D"F
02
lN40Dl
R6
20k
5W
R4
100
01,02: NSD134 or similar
C1, C2: 1 I'F, 200V mylar"
·Heat sink
TL/H/9064-29
Precision High voltage Reg~lator
VIN
:?;nov - ...----"""'4IP---,
LM317L
VOUTt-...-
...-
AOJ
VOUT
...-1V TO
180VilZ5mA
RS
Uk
D2
lN4DDl
01, 02: NSD134 or similar
C1, C2: 1 I'F, 200V mylar"
'Heat sink
....-
T
R7
2Dk
5W
Cl
1.0 Ilf
":'
"Mylar Is a registered trademark of DuPont Co.
1-170
TLlH/9064-30
r-
Tracking Regulator
Regulator With Trlmmable Output Voltage
VIN
VIN (25V TO 4DV)
H~",,_VDUT
H5
18k
.%
.,rT
R2
10.'
...w.....
i:
Typical Applications (Continued)
GND
-1.. _~._ ...
, ~FTANTALUM
TLlH/9064-32
Trim Procedure:
- If VOUT Is 2S.08V or higher, cut out RS (If lower, don't cut ~ out).
- Then If VOUT is 22.47V or higher, cut out R4 (If lower, don't).
- Then If VOUT Is 22.16V or higher, cut out RS (If lower, don't).
This will trim the output to well within ± I % of 22.00 Vee, w~hout any of the
expense or uncertainty of a trim pot (see LB-46). Of course, this technique
can be used at any output voltage level.
TLlH/9064-31
AI = LM30lA, LM307, or LFI3741 only
RI, R2 = matched resistors with good TC tracking
Precision Reference with Short-CIrcuit Proof Output
15V--.....- -_ _ _ _ _ _ _ _...._ _--.
10,OODV OUTPUT
lppmfCMAX
r
I
I
I
I
I
L
POWER
COMMON--~----~~------~~------I
OUTPUT
RETURN
TL/H/9064-33
'RI-R4 from thin·film network,
Beckman 694-3·R2K·D or similar
1-171
r-
~
r-----~----------------------------------------------------------------_.
C
N
::e ~National
C')
~
~ Semiconductor
LM320L 3-Terminal Negative Regulators
General Description
Features
The LM320L series of 3-terminal negative voltage regulators features fixed output voltages of -5V, -12V, and
-15V, with output current capabilities in excess of 100 mA.
These devices were 'designed using the latest computer
techniques for optimizing the packaged Ie thermal/electrical performance. The LM320L series, even when combined
with a minimum output compensation capacitor of 0.1 ",F,
exhibits an excellent transient response, a maximum line
regulation of 0.07% VolV, and a maximum load regulation
of 0.01 % Vo/mA.
The LM320L series also includes, as self-protection circuitry: safe operating area circuitry for output transistor power
dissipation limiting, a temperature independent short circuit
current limit for peak output current limiting, and a thermal
shutdown circuit to prevent excessive junction temperature.
Although designed primarily as fixed voltage regulators,
these devices may be combined with simple external circuitry for boosted and/or adjustable voltages and currents. The
LM320L series is available in the 3-lead TO-92 package.
For output voltages other than -5V, -12V and -15V, the
LM137 and LM137HV series provide .an output voltage
range from -1.2V to -47V.
• Preset output voltage error is less than ±5% over load,
line and temperature
.
• LM320L is specified at an output current of 100 mA
• Internal short-circuit, thermal and safe operating area
protection
• Easily adjustable to higher output voltages
• Maximum line regulation less than 0.07% VOUTIV
• Maximum load regulation less than 0.01 % VouT/mA
• Easily compensated with a small 0.1 ",F output
capacitor
Device
Package
Rated
Power
Dissipation
Design
Output.
Current
LM320L
TO-92 (l)
0.6W
0.1A
Connection Diagram
TO·92 Plastic Package (Z)
TL/H/7821-1
Order Number LM320LZ·5.0,
LM320LZ·12 or LM320LZ·15
See NS Package Number Z03A
1-172
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Molded TO·92
Lead Temperature
(Soldering, 10 sec.)
Input Voltage
-35V
VOUT = -5V 12Vand 15V
Internal Power Dissipation
(Notes 1 and 3)
O'Cto +70'C
+ 125'C
- 55'C' to + 150'C
260'C
Internally Limited
Electrical Characteristics (Note 2) TA =
O'C to + 70'C unless otherwise noted.
Output Voltage
-5V
-12V
-15V
Input Voltage (unless otherwise noted)
-10V
-17V
-20V
Symbol
Vo
Parameter
Output Voltage
Conditions
:s: 10 :s: 100 mA
:s: VIN :s: VMAX
1 mA :s: 10 :s: 40 mA '.
VMIN :s: VIN :s: VMAX
Line Regulation
Load Regulation
-5
-5.25
(-20:S: VIN
-5.25
(-20
TJ = 25'C, 10 = 100 mA
(-20
VMIN :s: VIN :s: VMAX
TJ = 25'C, 10 = 40 mA
VMIN :s: VIN :s: VMAX
aVO
I Typ I Max
Tj = 25'C,Io = 100 mA -5.2
1 mA
VMIN
aVo
Min
TJ = 25'C
1 mA :s: 10
:s:
aVO
Long Term Stability
la
Quiescent Current
10 = 100mA
ala
Quiescent Current
Change
1 mA:S: 10
-4.8 -12.5
:s:
Ripple Rejection
Tj = 25'C, 10 = 100 mA
f = 120 Hz
45
-17.7)
mV
V
45
-17.5)
mV
V
125
mV
45
-14.5) (-30:S: VIN
1mA:S:lo:S:40mA
aVIN
aVo
:s: VIN :s:
:s: VIN :s:
2
(-20
:s: VIN :s:
48
2
mV/khr
60
6
2
6
0.3
0.3
0.3
0.1
0.1
0.1
0.25
-7.5) (-27
40
50
:s:
100
6
:s: VIN :s:
0.25
-14.8)
(-30
52
:s: VIN :s:
120
96
50
V
:s:
60
(-20:S: VIN:S: -7) (-27
50
-14.4
-14.25
:s: -18)
-14.25
-17.5)
45
-14:6) (-30
100 mA
Output Noise Voltage Tj = 25'C, 10 = 100 mA
f = 10 Hz-10 kHz
-15
-11.4 -15.75
-14.8) (-30 :s: VIN
:s: VIN :s:
:s: VIN :s:
20
Vn
:s:
-11.5 -15.6
-4.75 -12.6
-11.4 -15.75
VIN :s: -7) . (-27 :s: VIN:S: -14.5) (-30 :s: VIN
100 mA
10 = 100 mA
VMIN :s: VIN :s: VMAX
-12
-4.75 -12.6
-7.5) (-27 :s: VIN
Units
I Typ I Max
Min
60
-7.3) (-27
10 = 100mA
:s:
:s:
I Typ I Max
Min
0.25
-18)
mA
mA
mA
V
p.V
dB
Input Voltage
Tj = 25'C
-14.6
-17.7
V
-7.3
Required to Maintain 10 = 100mA
-17.5
-14.5
Line Regulation
-7.0
10 = 40mA
Note 1: Thermal resistance 01 Z package Is typically eo'o/w 9Jc, 232"0/W 91A at still air, and SS'O/W at 400 Itlmln 01 air. The maximum lunctlon temperature shall
not exceed 125'0 on electrical parameters.
Note 2: To ensure constant lunctlon temperature pulse testing Is used.
1·173
...I
~
Typical Performance Characteristics
:3
Maximum Average Power
Dissipation (TO-92)
0.7
0.25
0.25
!
0.20
I'
0.15
IJ= .....
TJ=I25OC
r--
.0.,0
15
30
-45
60
o
o
75
!
~~
--......;
5
Dropout Voltage
60 YOUT=-5Y
i
30
o
~~
]:
2.5 I--- I-TJI=ooc
Iis
2.0
/
Output Impedance
VOUT =-I2V
VIN=-IOV
'OUT=SOmA
I' TA =25OC,
l
-S
I
TJ=I25OC
I I
I I
1.0
0.990 ' - - ' - _......_'---'-...;::0..
o 25. 50 75 100 125
TJ- JUHCTlON TEMPERATURE (OC)
lOS
10
~J=25OC
~ 1-11
I
1.5
1.01(11---+--,--.---+---1
11.ooo~~~.~~
102
103
104
FREQUENCY (Hz)
I I
a
-5 -10 -15 -20 -25 -JO -35
fi'
1,.oooF~~~
~
'Quiescent Current
3.0
.....
Output Voltage vs
Temperature (Normalized
to 1V@25"C)
1IiTA=25OC
101
125.
"
~
i"-.. ......... "-
INPUT VOLTAGE (V)
~AYIN=7V";1
IoUT=SO
TJ-JUNCTION TEMPERATURE (OC)
~
o
o
30
YIN-YoUT=-SY
30
10
100
il'l
III
III
VOUT=OOC
0.05
VouT~'~12V
I:
75.
0.10
~
25
Tl =I25OC
1
70
~
50
20
I~I
0.15
Ripple Rejection
80
AY OUT = 100mY
'iii'
25
15
TJ~25OC
INPUT-OUTPUT DlrrEftENTIAL (V)
TA- AMBIENT TEi.iPERATURE (OC)
-2.0 -I2V AND -15V
10
0.20
g
TJ~OOC
S
0.05
o
~
AVOUTalOOmV
kl:-0.I25" LEAD LEN~=
FROM PC BOAR~_
~:""ooo. FREE AIR
0.4" LEAD LENGTH
;:-....
I- FROM PC BOARD
~
FREE AIR
.....
0.1
Short Circuit Output
Current
.
Peak Output Current
1.0
VOUT=-SV
louT = 40 mA
-10 -IS -20 -25 -30
==
== ~Co=~
E frI,=I/'F
t= AL MINUM -"' 31a
1·176
,-------------------------------------------------------------------------, I
==
~National
Col
Col
I:)
~ Semiconductor
LM330 3-Terminal Positive Regulator
General Description
Features
The LM330 5V 3-terminal positive voltage regulator features
an ability to source 150 mA of output current with an inputoutput differential of 0.6V or less. Familiar regulator features
such as current limit and thermal overload protection are
also provided.
The low dropout voltage makes the LM330 useful for certain
battery applications since this feature allows a longer battery discharge before the output falls out of regulation. For
example, a battery supplying the regulator input voltage may
discharge to 5.6V and still properly regulate the system and
load voltage. Supporting this feature, the LM330 protects
both itself and regulated systems from negative voltage inputs resulting from reverse installations of batteries.
Other protection features include line transient protection
up to 26V, when the output actually shuts down to avoid
damaging internal and external circuits. Also, the LM330
regulator cannot be harmed by a temporary mirror-image
insertion.
•
•
•
•
•
•
•
•
Input-output differential less than 0.6V
Output current of 150 mA
Reverse battery protection
Line transient protection
Internal short circuit current limit
Internal thermal overload protection
Mirror-image insertion protection
100% electrical burn-in in the thermal limit
Schematic and Connection Diagrams
GNO
TLiH/9306-1
(TO-220)
Plastic Package
TLiH/9306-2
Front View
Order Number LM330T-S.O
See NS Package Number T03B
1-177
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage
Operating Range
Line Transient Protection (1000 ms)
Internal Power Dissipation
Internally Limited
O·Cto +70·C
Operating. Temperature Range
Maximum Junction Temperature
+ 125·C
- 65·C to + 150·C
Storage Temperature Range
26V
40V
Lead Temperature (Soldering, 10 sec.)
+300·C
Electrical Characteristics (Note 1)
Symbol
Vo
t.Vo
Parameter
Conditions
Output Voltage
Tj
=
Output Voltage
Over Temp
5
6
< 10 < 150 mA
< VIN < 26V; O·C
Line Regulation
9
6
< VIN <
< VIN <
5
< 10 <
Load Regulation
25·C
16V, 10
26V, 10
Min
Typ
Max
4.8
5
5.2
V
,,; Tj ,,; 100·C
=
=
4.75
5 mA
5 mA
150mA
Long Term Stability
10 = 10mA
10 = 50 mA
10 = 150 mA
Line Transient
Reverse Polarity
VIN
VIN
t.IQ
Quiescent Current
Change
6
VIN
Overvoltage Shutdown
Voltage
7
30
25
60
14
50
=
=
3.5
5
18
40V, RL = 100n,1s
-6V, RL = 100n
< VIN <
mV
mV/1000 hrs
7
11
40
mA
14
-80
26V
%
10
26
38
60
Max Line Transient
V
50
1s, Vo ,,; 5.5V
Reverse Polarity
Input Voltage
5.25
20
Quiescent Cumint
IQ
Units
-30
> -
=
100n
-12
Output Noise Voltage
10 Hz-100 kHz
50
p.V
Output Impedance
10 = 100 mADC + 10 mArms
200
mn
DC Vo
0.3V, RL
Ripple Rejection
dB
56
Current Li m it
150
Dropout Voltage
10 = 150 mA
Thermal Resistance
Junction to Case
Junction to Ambient
400
700
mA'
0.32
0.6
V
4
50
·C/W
Nole 1: Unless otherwise specified: VIN ~ 14V, 10 ~ 150 rnA, Tj ~ 25'C, Cl ~ O.II'F, C2 '" 10 I'F. All characteristics except noise voltage and ripple rejection
are measured using pulse techniques (tw' s: 10 ms, duty cycle ::s: 5%). Output voltage changes due to changes in inte~nal temperature must be taken into account
separately.
1-178
,-----------------------------------------------------------------------------'r
s:::
Typical Performance Characteristics
Dropout Voltage
0.6
0.6
~ '0.5
~
...~
:E:
0.4
0.3 ~
-
...-
10= If0 rnA
i!: 0.2
~
~ 0.1 V
l!i
S
i!l;
:0
:0
0
I
10= 50 rnA
..
~
o
o
25
50
75
100
125
Dropout Voltage
6.0
TJ=2S0 C
5.5
0.5
./
0.2
0.1
1/
$!
3.5
5
3.0
5
./
0
50
JUNCTION TEMPERATURE (OC)
8
i:i
V
o
o
150
100
150
Line Transient Response
Load Transient Response
TJ=2SOC
10= 150 rnA
~! ~ C~~~~~F H-t--+-+-H-t--I
C2= IO I'F
~~
o
It
0
IB
o
g
~
~
25
~
~
15
Peak Output Current
TJJsoC
r
~OoC
-
~
~
TJ-12S0 C
I
,~
15
!
is
Quiescent Current
22
V,N =14V
TJ=2S0 C
30
VIM: 14V
!...
25
::1
~
...z
15
i'li
:0
<.>
I:!
!Il
:0
",,"
,.,.
10
a
'"
'"
'"
B
10
15
20
25
o
o
~
Quiescent Current
o
30
60
90
120
150
z
§
~
:0
iil
10=IS0mA
~
~
10=OrnA 'o-SOmA
10
-60
~
INPUT VOLTAGE (V)
80
120
160
/
OUTPUT CURRENT (rnA)
4
i
/
/
2.5
200
51=
5~
!...
10=150mA
~ 4.5
l!! 4.0
0.3
~
Low Voltage Behavior
s.o
0.4
l!i
10= OrnA
Co)
100
lk
10k lOOk
FREQUENCY (Hz)
1-179
1M
o
o
V,N -VOUT =9V
fO=120Hz
50
100
150
OUTPUT CURRENT (rnA)
TL/H/9306-3
C) r---------------~----------------------------------------------------------_.
('I)
~
Typical Performance Characteristics
(Continued)
-I
Output Impedance
10
Overvoltage Supply Current
30
1o=50mA
TJ =25"C
25
1["'...
1
20
15
V
0.1
Reverse Supply Current
50
RL = 10011
TJ=25"C
./
10
IE
",
/'
o
0.01
1
10
100
lK
10K lOOK
111
0.1
20
RL= ...
"
-200
-e
-12 -10
(vJ
-6
-4
-2
INPUT VOLTAGE (V)
Output Voltage (Normalized
to 5V at TJ = 25"C)
J
5.D25
V,N=14V
TJ=25"C
~
I
~
i-'
-e
-6
0.1
I
-4
",..
0.15
I'\.
~
"I
1
-12 -10
,/'
-150
Output at Overvoltage
J
/'
V
-100
25
INPUT VOLTAGE
RL= ...
TJ=25"C
-D.5
"
-50
-250
FREQUENCY (Hz)
Output at Reverse Supply
iii
TJ=25"C
D.05
....... I-
o
-2
30
INPUT VOLTAGE (V) ,
-
-
4.900
-60-40-20 0 20 40 60
35
INPUT VOLTAGE (V)
so 100120140
JUNCTION TEIotPERATURE ("C)
TL/H/9306-4
Typical Applications
The LM330 is designed specifically to operate at lower Input
to output voltages. The device is designed utilizing a power
lateral PNP transistor which reduces dropout voltage from
2.0V to 0',3V when compared to Ie regulators using NPN
pass transistors. Since the LM330 cim operate at a much
lower input voltage, the device power dissipation is reduced,
heat sinking can be simpler and' device reliability 1m·
50
V,N
UNREGULATED
INPUT
Cl'
O.I~FI
proved through lower chip operating temperature. Also, a
cost savings can be utilized through use of lower power/
voltage components. In applications utilizing battery power,
the LM330 allows the battery voltage to drop to within 0.3V
of output voltage prior to the voltage regulator dropping out
of regulation.
VOUT
+
REGULATED
OUTl'UT
40
C2"
Il0~F
I
I
v
..........
i'...
"
'\
TL/H/9306-S
• Required Hregulator Is located far from power supply filter•
.. C2 may be either an Aluminum or Tantalum type capaCitor but
must be rated to' operate at -40'C to guarantee regulator stability
to that temperature extreme. 10 "F Is the minimum value raqulred
for stability and may be Increased without bound. Locate as close
as posslble to the regulaUon.
o
o
'25
50
,75
100
125
150
loUT (mA)
TL/H/9306-6
Not.: Compared to IC regulator with 2.0V dropout voltage and
lOmax. = 8.0 mAo '
1·180
r3:
Definition of Terms
Dropout Voltage: The input-output voltage differential at
which the circuit ceases to regulate against further reduction in input voltage. Measured when the output voltage has
dropped 100 mV from the nominal value obtained at 14V
input, dropout voltage is dependent upon load current and
junction temperature.
Input Voltage: The DC voltage applied to the input terminals with respect to ground.
Input-Output Differential: The voltage difference between
the unregulated input voltage and the regulated output voltage for which the regulator will operate.
Line Regulation: The change in output voltage for a
change in the input voltage. The measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected.
c.:I
c.:I
Long Term Stability: Output voltage stability under accelerated life-test conditions after 1000 hours with maximum
rated voltage and junction temperature.
Output Noise Voltage: The rms AC voltage at the output,
with constant load and no input ripple, measured over a
specified frequency range.
Quiescent Current: That part of the positive input current
that does not contribute to the positive load current. The
regulator ground lead current.
Ripple Rejection: The ratio of the peak-to-peak input ripple
voltage to the peak-to-peak output ripple voltage.
Temperature Stability of Vo: The percentage change in
output voltage for a thermal variation from room temperature to either temperature extreme.
Load Regulation: The change in output voltage for a
change in load current at constant chip temperature.
1-181
0
.J
~
:::&
.J
r-------------------------------------------~----------------------------------~
J?A National
~ Semiconductor
LM337L 3-Terminal Adjustable Regulator
General Description
The LM337L is an adjustable 3-terminal negative voltage
regulator capable of supplying 100 mA over a 1.2V to 37V
output range. It is exceptionally easy to use and requires
only two external resistors to set the output voltage. Furthermore, -both line and load regulation are better than standard fixed regulators. Also, the LM337L is packaged in a
standard TO-92 transistor package which is easy to use.
The LM337L is available in a standard TO-92 transistor
package and a 56-8 surface mount package. The LM337L
is rated for operation over a - 25'C to 125'C range.
For applications requiring greater output current in excess
of 0.5A and 1.5A, see LM137 series data sheets. For the
positive complement, see series LM117 and LM317L data
sheets.
.
.
In addition to higher performance than fixed regulators, the
LM337L offers full overload protection. Included on the chip
are current limit, thermal overload protection and safe area
protection. All overload protection circuitry remains fully
functional even if the adjustment terminal is disconnected.
Normally, only a single 1 /-LF solid tantalum output capacitor
is needed unless the device is situated more than 6 inches
from the input filter capacitors, in which case an input bypass is needed. A larger output capacitor can be added to
improve transient response. The adjustment terminal can be
bypassed to achieve very high ripple rejection ratios which
are difficult to achieve with standard 3-terminal regulators.
•
•
•
•
•
•
•
•
•
Besides replacing fixed regulators, the LM337L is useful in a
wide variety of other applications. Since the regulator is
"floating" and sees only the input-to-output differential voltage, supplies of several hundred volts can be regulated as
long as the maximum input-to-output differential is not exceeded.
Also, it makes an especially simple adjustable switching regulator, a programmable output regulator, or by connecting a
fixed resistor between the adjustment and output, the
LM337L can be used as a precision current regulator. Supplies with electronic shutdown can be achieved by clamping
the adjustment terminal to ground which programs the output to 1.2V where most loads draw little current.
+
Features
Adjustable output down to 1.2V
Guaranteed'1 00 mA output current
Line regulation typically 0.01 %/V
Load regulation typically 0.1 %
Current limit constant with temperature
Eliminates the need to stock many voltages
Standard 3-lead transistor package
80 dB ripple rejection
Output is short circuit protected
Connection Diagram
v:: ~O:::
TL/H/9134-1
-'OJ 4
5
Bottom View
TL/H/9134-2
Top View
Order Number LM337LM or LM337LZ
See NS Package Number M08A or Z03A
Typical Applications
1.2V-25V Adjustable Regulator
Regulator with Trlmmable Output Voltage
"'\
R2
3.92.11
:tIll
+ II'F
R5
16kn
SOLID
TANTALUM
511
~;';""'~------------- 31a, Load Aegulation (LA)
~
[(AI
+ A2)/Al1 x
(L, of LM342-05)
Current Regulator
INPUT
o---~--tl
LM342-XX
I-
IL.-_ _r--_--'
III
Rl
-
~--------~--_oOUW~
lOUT
TL/H/l048S-8
lOUT
Ala
~
:s:
V2-3/Al
+ la
1.5 mA over line and load changes
1-191
Typical Applications (Continued)
High Output Voltage Regulator
1-.....- ....0
Lt.t342-15
VOUT=39V 4» 250mA
D3··
lN4001
II
lN5359
24V
TL/H110485-7
'Necessary if regulator is located far from the power supply filter
"03 aids In full load start·up and protacta the regulator during short circuits from high Input to output Yoltage differentials
± 15V, 250 mA Dual Power Supply
Lt.t342-15
""""---0 VOUT =15V 4» 250mA
GNDo---~----~-----t--,-o~D
Lt.t320MP-15
..........- - 0 -VOUT =-15V 4» 250mA
TL/H/l0485-8
Variable Qutput Regulator 0.5V-18V
VIN = 20V
LM342-5.0
I
R2
Cl
o.22 }'F
I
110
el·
1 }'F
R3
Rl
6
-VIN =-10V
R4
t
R5
VOUT
= VG + 5V, Rl = (-VIN/IQ LM342)
VOUT = 5V(R2/R4) for (R2 + R3) = (R4 + R5)
A 0.5V output will correspond to (R2/R4) = 0.1, (R3/R4) = 0.9
30 pF
TUH/l0485-9
'Solid tantalum
1·192
,--------------------------------------------------------------------------------, r-
==
~National
"'w"
.....
~ Semiconductor
l>
LM431A
Adjustable Precision Zener Shunt Regulator
General Description
Features
The LM431A is a 3-terminal adjustable shunt regulator with
guaranteed temperature stability over the entire temperature range of operation. The output voltage may be set at
any level greater than 2.5V (VREF) up to 36V merely by
selecting two external resistors that act as a voltage divided
network. Due to the sharp turn-on characteristics this device
is an excellent replacement for many zener diode applications.
• Average temperature coefficient 50 ppm/'C
• Temperature compensated for operation over the full
temperature range
• Programmable output voltage
• Fast turn-on response
• Low output noise
Connection Diagrams
I
REF
CATHODE- 1
3
2
"
~-"
8 I-REFERENCE
ANODE- 2
'T" .-~
"
71-ANODE
ANODE- 3
I
61-ANODE
NC- 4
CATHODE
51-NC
TLlH/l0055-2
ANODE
TL/H/l0055-1
Top View
Top View
Order Number LM431ACM
See NS Package Number MOSA
Order Number LM431ACZ or LM431AIZ
See NS Package Number Z03A
III
1-193
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
pleaae contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature Range
-65°C to + 150"C
Operating Temperature Range
Industrial (LM431AI)
-40"Cto +S5°C
Commercial (LM431AC)
O"Cto +70"C
Lead Temperature
TO·92 Package/SO·S Package
(Soldering, 10 sec.)
265°C
Internal Power Dissipation (Notes 1, 2)
TO·92 Package
0.7SW
SO·S Package
0.S1W
LM431A
Electrical Characteristics TA =
Symbol
Cathode Voltage
37V
-10mAto +150mA
Continuous Cathode Current
-0.5V
Reference Voltage
Reference Input Current
10mA
Operating Conditions
Min
Max
37V
Cathode Voltage
VREF
Cathode Current
1.0mA
100mA
Nole 1: TJ Max - 150'C.
Note 2: Ratings appy to amblenttemperalUre at 25'C. Above this tempera·
lUre, derate the T0-92 at 6.2 mW/'C. and the SO·8 at 6.5 mW/'C.
25°C unless otherwise specified
Min
Typ
Max
Unite
2.440
2.495
2.550
V
S.O
17
mV
Vz from VREF to 10V
-1.4
-2.7
Vz from 10V to 36V
-1.0
-2.0
Conditions
Parameter
VREF
Reference Voltage
Vz = VREF,II = 10 mA (Figure 1)
Voev
Deviation of Reference
Input Voltage Over
Temperature (Note 3)
Vz = VREF,II = 10 mA,
TA = Full Range (Figure 1)
~VREF
Ratio of the Change in
Reference Voltage to the
Change In Cathode
Voltage
AVz
Iz = 10mA
(Figure 2)
mVIV
IREF
Reference Input Current
R1 = 10kn,R2 = 00,
II = 10 mA (Figure 2)
2.0
4.0
/J- A
cx:IREF
Deviation of Reference
Input Current over
Temperature
Rl = 10kn,R2 = 00,
11=10mA,
TA = Full Range (Agure 2)
0.4
1.2
/J-A
Minimum Cathode Current
for Regulation
Vz = VREF (Figure 1)
0.4
1.0
mA
IZ(MIN)
Off·State Current
Vz = 36V, VREF = OV (Figure 3)
0.3
1.0
/J- A
Dynamic Output
Vz = VREF,
0.75
n
Impedance (Note 4)
Frequency = 0 Hz (Figure 1)
Note 3: Deviation of reference input voltage. VOEV. is defined as the maxi·
The average temperature coefficient of the reference input voltage. ",VREF.
mum variallon of the reference Inpul voltage over the fulllemperalUre range.
is defined as:
IZ(OFF)
rz
V ppm
'" REF-;C =
VMAX -
VIlIN
I
I
I
I
I
I
",VREF =
Note 4: The
I
11
TEMPERATURE
T2 - Tl
T2- Tl
Where:
T2 - T1 = full temperature change.
"'VREF can be posillve or negative depending on whether Ihe slope is positive or negative.
Example: VOEV = 6.0 mY, VREF = 2495 mY. T2 - Tl = 70'C. slope Is
pOSitive.
r-----
v.y~-y~
±[ VREF
VMax-VMIn]
±[ VREFVOEV
]
(aI25"C) lOB
(aI25"C) loB
[ B.OmV ]
2495.iiVloB
70'C
+46ppm/'C
dynamic output Impedance. rz. is defined as:
rz= b.Vz
b.lz
When the device Is programmed with two external resistors. RI and R2. (see
F/gurs 21. the dynamic output Impedance of the overall circuit, rz. is defined
as:
T2
TLlH/l0055-7
b.Vz [ rz1+Rl]
rz=-=ro
b.lz
1·194
R2
Equivalent Circuit
~
____________________________
~~-'
__
-1~--~~---CA~ODE
(VZ)
R3
2.5 kll.
Rl
3.3ll.
RS
640ll.
L-------------4I------------....-------------1~--~.....--- (GND)
ANODE
TL/H/10055-3
DC Test Circuits
IN
1,-
--JV'''IIv-~~-
Vz
IN -.J\I\fv-.-,.--- Vz
Rl
R2
_....
TUH/10055-4
FIGURE 1. Test Circuit for Vz
=
TL/H/10055-5
VREF
Note:Vz
= VREF(1 + R1/R2) +
IREF o R1
FIGURE 2. Test Circuit for Vz > VREF
•
TUH/10055-6
FIGURE 3. Test Circuit for Off-State Current
1-195
-..
4
CO)
r---------------------------~--------------------------------------_,
Typical Performance Characteristics
::&
....
Input Current vs Vz
TA
Vz
..
/
.......
50D
.R
;
:i 100
1.0
2.0
CATHODE VOLTAGE - V
= 25'C
Vz = VREI' f--I--I--f----1
~
V
Input Current vs VZ
TA
I ~
~
MIN
J
o
t!lO
I
liz
o
Thermal Information
E tOOO
=25'C
=VREF
I
I
"
~
70 85
25
tOO f--I--I---1----1I--f----1
50
125
CATHODE VOLTAGE - V
TEllPERATURE - 'C
TL/H/l0055-8
Dynamic Impedance vs
Frequency
15
TA
= 25'C
"'"
I
Vz = vREF
1.0k.D.
I
I
/
o
l.ok
10k
lOOk
I.oM
10M
FREQUENCY - Hz
TUHI1 0055-1 0
TL/H110055-9
Note 1: The areas under the curves represent condalon. that may cause the
device to oscillate. For curves B. C. and D. R2 and V+ were adjusted to
establish the initial Vz and Iz conditions with CL = o. V + and CL were then
adjusted to determine the ranges of stability.
Stability Boundary Conditions
J
100
1
I
90 A Vz = VREf
BVZ=5VATlz =10mA
I
80 C Vz = 10V AT IZ = lOrnA
70 o Vz = 15V AT IZ 10mA
~
60
a
50
~
30
20
10
I
(NOTE 1)
=
STABLE
A
B
C
1\
STABLE
~ ~
/
TA
J
=250C
Ih I
~
V.// ~~ \\
o
10pl'
l00pl'
lOCOpi'
0.01},!,
0.1},!,
I}'!'
10},!,
LOAD CAPACITANCE
TL/H110055-11
Test Circuit for Curve A Above
Test Circuit for Curves B, C and D Above
150.0.
+
+
TUH110055-12
V+
TL/HI10055-13
1-196
r-----------------------------------------------------------------------------,
Typical Applications
Co)
Single Supply Comparator with
Temperature Compensated Threshold
V+
V+--~~-1~~----.-----~I~I-----VO
VREF
~
-
t--+
I
........
"
R2
--
01:00
Shunt Regulator
I. Rl
~
!!:
*
:
+-----OUT
I
I
I
I
I
VON'" 2V
VOFF
=V+
TL/H/l0055-14
-
.....- -.....- - - - GND
TL/H/l0055-15
Series Regulator
v+----.---------------------------,
Output Control of a Three
Terminal Fixed Regulator
V+-----.
t-....--VO
TL/H110055-1B
Vo = (1
+ ~)
TL/H/l0055-17
VRcF
Vo MIN = VRcF + 5V
1-197
:J>
Typical Applications (Continued)
Higher Current Shunt Regulator
CrowBar
V+--~~~-----t------~~--Vo
v+
R1
R2
TL/H/l0055-18
Vo= (1
TL/H/l0055-19
+~)VREF
VLlMIT:::: ( 1 +
~)VREF
Over Voltage/Under Voltage
Protection Circuit
V+--~~-----------'----~------~
OUT ON
RIA
WHEN
LOW
HIGH
LIIilIT
I;
Iito
!!:
VOUT • IV. VIN .... IV
'Ion rr-r-
..
~
0.8
I.
O.S
~
D.J
~
TA - '25·C
To' ZS'C- f--,
I I 1
rD.4 ) -
' ... ·_sloe
~
1:
ZO
41
&0
10
f--
_
-50
4.0
12
s
5... .!...
<
!i
1:
. ....~
~
....01
S .
to
~
2.0
~
~
I""" .!U.!!.UT VOLTABE-
.z.1
I'"
-we
T...
1 lise' 0
....0
3&
:II
II:
80
1'\
~
i'
I'--~
40 ~
100
Tl·jl·J-r-
T~'~I'~-r-
1.0
T
D.B
D.4
IL -0
==
to
45
10
-10
OUTPUT VOLTAGE"
-+12V
VOUT"'+&V
IL -40mA
-20
T.· 25"C
-3D
VIN
1
;\
1Ise'0
-5
15
TIME"'"
25
35
41
10
Output Impedence va
Fraquency
4.0
....0
3D
20
INPUT VOLTAGE (VI.
a
~
..
!il
§" c
=
..;;; Ii
! ~
~
Vou,-"&V
VIN -".2V
10
,.-~
"'~5,J-
VOUT = VREF
10
~
~
41
1.1
150
:;
~
35
1.6
1A
1.2
D.2
50
25
1;; D.B
I
!i
'.0
>
I; -4.0
2&
ifi
C
ro...l'0
LOAD CURRENT
to
VOUT ·+IV
I,'IIIA
I.
.!
Load Transient Response
2.D
-I
....
.." ....
C
~
E
JUNCTION TEMPERATURE rCI
4.D
-4.0
160
111
100
INPUT VOLTAGE
VIN -+12
15
Standby Currant Drain V8
Input Voltage
::!
~~URRENT
IIse·IIIlI
1.3
Une Transient Response
..~
IL -'mAtoIL-5IImA
2.U
200
120
l"""t--4..
~+-
VIN - YOUT IV~
~
f--H~'i'
OUTPUT CU~RENT 'mAl
!Iii
IIse-O
TA ·ZloC
-5
100
"'l
LlM1TCURR~
D.4
to
to
o
I"""
0.5
!
r-
5:II 0.2
o
10
1 I
"- 1'\ SENSE
VOLTAGE
~
0.8
O.B
-=:~
Vouy:a+5V
-lI.l
Current Limiting
Characterlstica va
Junction Temperature
1.0
r-
SO
40
1
LINE
OUTPUT CURRENT 'mAl
Current Limiting
Characteristics
1.2
0.1
-D.2
o
3D
1
\I
r-- To ·m'c
-8.4
o
:I
r.':
to
\Ti"~5',C-
1
VOUT' ~IJ. v:. .,2V
Asc-IlIll
VOUT-+&V
lise' 0
T.... +21°C
.6.V -+3V
... ·1 mA
D.2
1=
To'ZS'C~
OUTPUT CURRENT 'mAl
~
I
~
1\ ~
To' IZS'C ~
-8.2
.J..
..
.
~
"1'001.""
4..
-D.25
~
D.3
i"'IlII!.
1'>01.
I
S
Load & Une Regulation va
Input-Output Voltage
Differential
VOUT • IV. VIN· "ltv
Asc'IOII r-r-r-
~ -0."
=
~
Load Regulation
Characterlstice with
Current Limiting
1Ise'0
T.·
J..r1
25'C
IL-&DmA
1.0
~.f
0.1
to
.01
41
100
Ik
lOll
lDOIl
1M
fREQUENCY (Hz)
TIME"'"
TL/H/85B3-6
Maximum Power. Ratings
100
80
Nolee va Filter Cspacltor
(CAEF In Circuit of FIgure 1)
(Bandwidth 100 Hz to 10 kHz)
1000
900
800
ro...
" ....
o
o
,
,"
.DOl
Hloe
\.:
1:
.01
.1
CmCPFl
of'4QO
300
200
100
~
10
1000
900
800
DIP
7DD
20
LM723C
Power Dleelpatlon V8
Ambient Temperatura
LM723
Power Dleelpetlon va
Ambient Temperature
7DD
~
~
~800
S50D
~
t=
AX =II5O'C
165OC/« (H1OC)
11m a 115O'C/W (011')
o NO HEAT SINK
10
I-- I-- ~
of'4QO
I'
-55 -25 0 25 SO 75 100 125 ISO
TA AMBIEHT 1!NPERAlURE (OC)
300 TMAX ~ 115O'C
'"
.~
200 ~~I65"C/« (H1OC)
100 RTH =115O'C/« (OIf)
o NO HEAT SINK
-55 -25 0 25 SO 75 100 125 ISO
TA AMBIENT 1!NPERAlURE (OC)
TL/H/B5B3-7
1-202
TABLE I. Resistor Values (kO) for Standard Output Voltage
Fixed
Output
±5%
Output
Adjustable
± 10% (Note 5)
Positive
Output
Voltage
App"cable
Figures
(Note 4)
R1
R2
R1
P1
R2
+3.0
1,5,6,9,12 (4)
4.12
3.01
1.8
0.5
+3.6
1,5,6,9,12 (4)
3.57
3.65
1.5
+5.0
1,5,6,9,12 (4)
2.15
4.99
+6.0
1,5,6,9,12 (4)
1.15
6.04
+9.0
2,4, (5, 6, 9,12)
1.87
7.15
+12
2,4, (5, 6, 9,12)
4.87
+15
2,4, (5, 6, 9,12)
7.87
+28
2,4, (5, 6, 9,12)
21.0
7.15
5.6
+45
7
3.57
48.7
2.2
+75
7
3.57
78.7
2.2
Fixed
Output
±5%
5% Output
Adjustable
±10%
Negative
Output
Voltage
App"cable
Figures
R1
R2
R1
P1
1.2
+100
7
3.57
102
2.2
10
91
0.5
1.5
+250
7
3.57
255
2.2
10
240
0.75
0.5
2.2
-6 (Note 6)
3, (10)
3.57
2.43
1.2
0.5
0.75
0.5
0.5
2.7
-9
3,10
3.48
5.36
1.2
0.5
2.0
0.75
1.0
2.7
-12
3,10
3.57
8.45
1.2
0.5
3.3
7.15
2.0
1.0
3.0
-15
3,10
3.65
11.5
1.2
0.5
4.3
7.15
3.3
1.0
3.0
-28
3,10
3.57
24.3
1.2
0.5
10
1.0
2.0
-45
8
3.57
41.2
2.2
10
33
10
39
-100
8
3.57
97.6
2.2
10
91
10
68
-250
8
3.57
249
2.2
10
240
R2
TABLE II. Formulae for Intermediate Output Voltages
Outputs from + 2 to + 7 volts
(Figures " 5, 6, 9, 12, [4])
VOUT
Outputs from + 4 to + 250 volts
(Figure?)
= (VREF X R1 :2 R2)
VOUT
Outputs from + 7 to + 37 volts
(Figures2, 4, [5, 6, 9, 12])
VOUT
=
(
Current Limiting
ILiMIT = VSENSE
Rsc
R2 - R1 )
= (VREF
-2- x -R-1- ; R3 = R4
Outputs from -6 to - 250 volts
(Figures 3, 8, 10)
R1 + R2)
VREF X ~
VOUT
=
(VREF
-2-
x
R1 + R2)
-R-1- ; R3
Foldback Current Limiting
I
KNEE
= R4
= (VOUT R3 +
RSC R4
ISHORTCKT
VSENSE (R3 + R4»)
RSC R4
R3 + R4)
= (VSENSE
-Rsc
-- x R4
Typical Applications
.h~
VOUT
~'i
VRE'
LM72l
LM72le
eL
r--
...
':'
LM723
LM723C
R3
R3
~
Rl R2
1
Note: R3 = Rl + R2
for minimum temperature drift,
VOUT
VnEF
R3
cs
N.I.
Vee
,..,lise
CL
INV.
COMP
-
REGULATED
OUTPUT
Rl
0
reo"
I
V'
r--
REOULATED
OUTPUT
cs
..LC1100PF
"---
INV.
V"
TUH/B563-B
Typical Performance
Regulated Output Voltage
Line Regulation (AV,N = 3V)
Load Regulation (AIL = SO mAl
N.I.
Rl
11
rOMP
-L
Cl
RZ
T'00pF
SV
O.SmV
I.SmV
'::"
"::
TL/H/B5B3-9
FIGURE 1. Basic Low Voltage Regulator
(VOUT = 2 to 7 Volts)
R1R2
Note: R3 = Rl + R2
for minimum temperature drift,
R3 may be eliminated for
minimum component count
Typical Parformanca
Ragulated OUtput Voltage
Une Regulation (AV,N = 3V)
Load Regulation (AIL = SO rnA)
FIGURE 2. Basic High Voltage Regulator
(VOUT = 7 to 37 Volts)
1-203
ISV
I,SmV
4.5mV
Typical Applications (Continued)
V,N
v~
R4
IK
C,
100IlF
R3
II
L--_....
...._ :~~~:TED
--4~------+-
TL/H/B5B3-10
Typical Performance
Regulated Output Voltage
-15V
Line Regulation (bo VIN = 3V)
1 mV
Load Regulation (boll = 100 mAl 2 mV
TL/H/B563- "
Typical Performance
Regulated Output Voltage
+ 15V
Line Regulation (boVIN = 3V) 1.5 mV
Load Regulation (boll = 1A)
15 mV
FIGURE 3. Negative Voltage Regulator
FIGURE 4. Positive Voltage Regulator
(External NPN Pass Transistor)
V,N
V,N
Vee
R3
10
y+
Rae
"'o,.,.... ~~~~~:TED
VOUTI-_-4.-1'Io3
Vee
R3
UK
VRI!F
LM723
LM723C
Rl
Roc
REGULATED
OUTPUT
N.I.
R2
TL/H/B563-13
Typical Performance
Regulatad Output Voltage
+ 5V
Line Regulation (boVIN = 3V)
0.5 mV
Load Regulation (boll = 10 mAl 1 mV
Short Circuit Current
20 mA
TLlH/B563-'2
Typical Performance
Regulated Output Voltage
+5V
Line Regulation (boVIN = 3V) 0.5 mV
Load Regulation (boll = 1A)
5 mV
FIGURE 6. Foldback Current Limiting
FIGURE 5. Positive Voltage Regulator
(External PNP Pass Transistor)
1-204
Typical Applications (Continued)
,
V,N
R6200
y+
TVcc
VREF
VOUT
~N3234
Vz
.
Dl 36V r; ~
lN1364 ...
R4
3.0K
LM123
LM123C
Rl
CL
cs--,
N.I.
-H
R3
3.0K
RZ
INV•
I
v-
CDMP
R5
In
.L
-,soICI
500 pF
REGULATED
DUTPUT
_....
TL/H/8563-14
Typical Performance
Regulated Output Voltage
Line Regulation (.!o Y,N = 20V)
Load Regulation (.!oIL = 50 mAl
+ 50V
15 mV
20 mV
FIGURE 7. Positive Floating Regulator
V,N
\I
R610K
-!-
I
y+
~
-
Vee
VREF
R6
• 10K
VOUT
rJ D112V
'.4 .. lN1426
R2
Tl
Vz
R3
3K
LM123
LM123C
~2N5281
•
CLCS-
INV.
-1-,
CDMP
T
N.I.
Rl
1~~=
v-
I
Cl
100 pF
REGULATED
OUTPUT
TL/H/8583-16
Typical Performance
Regulaled Output Voltage
Line Regulation (.!o Y,N = 20V)
Load Regulation (.!oIL = 100 mAl
-100V
30 mV
20 mV
FIGURE 8. Negative Floating Regulator
1-205
Typical Applications (Continued)
V,N
Ri
3K
V'
Vee
.-----1 V
RE•
H'
LM7Z3
LM7Z3C
R3'K
...---.I-"W\r-e-"" N.I.
RZ
R4
v-
COMP
'M
TL/H/8563-18
Typical Performanca
Regulated Output Voltage
Line Regulation (II.VIN = 30V)
Load Regulation (II.IL = 2A)
+ 5V
10 mV
80 mV
FIGURE 9. Positive Switching Regulator
V,N
V'
Vee
VREF
VOUT
'K
'::'
RZ
0'
Cl
'NZD71
Vz
0.1 ~F
LM7Z3
LM7Z3C
R3'K
REGULATED
OUTPUT
N.I.
RI
R4
1M
V-
CDMP
TCII&PF
CZ
J'OM
TLlH/8563-17
Typical Performance
-15V
Regulated Output Vo"age
Line Regulation (II.VIN = 20V) 8mV
Load Regulation (II.IL = 2A)
8mV
FIGURE 10. Negative Switching Regulator
1·206
Typical Applications (Continued)
Vee
....---IVREF
lM723
lM723C
Ht
CL
csl-~.....- _ . . J
. .---tN.t.
H2
tNV.
v-
R4
2K
'-...I\.JVI-...t"I lOGIC INPUT
TLlH/8563-18
Typical Performance
Regulated Output Voltage
Line Regulation (1l.vIN = 3V)
Load Regulation (all = SO mAl
Note: Current
1imit transistor may be
used for shutdown if current 1im·
iting is not required.
+ SV
O.S mV
I.S mV
FIGURE 11. Remote Shutdown Regulator with Current Limiting
R4
100
VOUT
R3100
RI
Vz
LM723
LM723C
CL
":'
CS
INV.
N.I.
TL/H/8583-19
Typical Performance
Regulated Output Voltage
Line Regulation (aVIN = 10V)
Load Regulation (all = 100 mAl
+SV
0.5 mV
1.5 mV
FIGURE 12. Shunt Regulator
1-207
Typical Applications (Continued)
Rl
PI
R2
V-
TL/H/8563-20
FIGURE 13. Output Voltage Adjust
(See Note 5)
Schematic Diagram
r-~~__~~~____________~~~__~~____~________~8~
7 Vc
r-_ _
6 VOUT
D3
Vz
4 VREF
9 COMPENSATION
409
R16
11.89k
R17
R24 10 CURRENT
LIMIT
400
1 CURRENT
SENSE
2 INVERTING
INPUT
3 NON-INVERTING
INPUT
lk
1.7k
R22
300
Rll
SyTL/H/8563-1
1-208
~National
~ Semiconductor
LM2925 Low Dropout Regulator with Delayed Reset
General Description
Features
The LM2925 features a low dropout, high current regulator.
Also included on-chip is a reset function with an externally
set delay time. Upon power up, or after the detection of any
error in the regulated output, the reset pin remains in the
active low state for the duration of the delay. Types of errors
detected include any that cause the output to become
unregulated: low input voltage, thermal shutdown, short circuit, input transients, etc. No external pull-up resistor is necessary. The current charging the delay capaCitor is very low,
allowing long delay times.
•
•
•
•
•
•
•
•
•
•
•
Designed primarily for automotive applications, the LM2925
and all regulated circuitry are protected from reverse battery
installations or two-battery jumps. During line transients,
such as a load dump (60V) when the input voltage to the
regulator can momentarily exceed the specified maximum
operating voltage, the 0.75A regulator will automatically
shut down to protect both internal circuits and the load. The
LM2925 cannot be harmed by temporary mirror-image insertion. Familiar regulator features such as short circuit and
thermal overload protection are also provided.
5V, 750 mA output
Externally set delay for reset
Input-output differential less than 0.6V at 0.5A
Reverse battery protection
60V load dump protection
- 50V reverse transient protection
Short circuit protection
Internal thermal overload protection
Available in plastic TO-220
Long delay times available
100% electrical burn-in In thermal limit
Typical Application Circuit
Vi
-!-Cl"
~l~F
Vour 5V
75DmA
II
INPUT
OUTPUTr-!VOLTAGE VOLTAGE
+
C2""
~10~F
RES~....! RESET
FLAG
-Required if regulator is located far from
power supply filter.
LM2925
"CoUT must be at least 10 "F to maintain
stability. May be increased withoul bound
to maintain regulation during transients.
~LAY
GNO
P
~C3
0.1
Locate as close as possible 10 Ihe regulator. This capaCitor must be rated over the
same operating temperature range as the
~F
regulator. The equivalent series resist-
ance (ESR) of this capaCitor is critical;
see curve.
*
TL/H/526B-1
FIGURE 1. Test and Application Circuit
Connection Diagram
TO-220 5-Lead
1~.1 I
.. ....
~'4 DELAY"
3 GROUND
2 OUTPUT VOLTAGE (Vour)
1 INPUT VOLTAGE (VIN)
FRONT VIEW
TL/H/526B-2
Order Number LM2925T
See NS Package Number T05A
1-209
Absolute Maximum Ratings
Operating Temperature Range
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage
Operating Range
Overvoltage Protection
+
- 65'C to
+
125'C
150'C
Storage Temperature Range
150'C
Lead Temperature
(Soldering, 10 seconds)
26V
60V
Internal Power Dissipation (Note 1)
-40'Cto
Maximum Junction Temperature
260'C
ESD rating is to be determined
Internally Limited
Electrical Characteristics for VOUT
VIN = 14V, C2 = 10 fLf, 10 = 500 mA, TJ = 25'C (Note 3) (unless otherwise specified)
Parameter
Min
Conditions
Typ
Max
Units
Note 2
Output Voltage
6V'S. VIN 'S. 26V, 10 'S. 500 mA,
-40'C'S. TJ 'S. + 125'C
Line Regulation
9V 'S. VIN 'S. 16V,I0 = 5 mA
6V 'S. VIN 'S. 26V, 10 = 5 mA
V
4.75
5.00
5.25
4
10
25
50
10
50
mV
mV
Load Regulation
5 mA 'S. 10 'S. 500 mA
Output Impedance
500 mADC and 10 mArms,
100 Hz-10 kHz
Quiescent Current
10'S.10mA
10 = 500 mA
10 = 750 mA
3
40
90
10 Hz-100 kHz
100
fLVrms
20
mV/1000 hr
Output Noise Voltage
mV
mO
200
Long Term Stability
Ripple Rejection
fo = 120Hz
66
Dropout Voltage
10= 500mA
10 = 750mA
0.45
0.82
Current Limit
Maximum Operational
Input Voltage
mA
mA
mA
100
dB
0.6
V
V
0.75
1.2
A
26
31
V
Maximum Line Transient
Vo'S. 5.5V
60
70
V
Reverse Polarity Input
Voltage, DC
Vo:2: - 0.6V, 100 Load
-15
-30
V
Reverse Polarity Input
Voltage, Transient
1 % Duty Cycle,
100 Load
-50
'-80
V
T
'S. 100 ms,
Electrical Characteristics for Reset Output
VIN = 14V, C3 = 0.1 fLF, TA = 25'C (Note 3) (unless otherwise specified)
Parameter
Conditions
Min
Typ
Max
Units
Note 2
Reset Voltage
Output Low
Output High
ISINK = 1.6 mA, VIN = 35V
ISOURCE = 0
4.5
Reset Internal Pull-up Resistor
Reset Output Current Limit
VRESET = 1.2 V
VOUT Threshold
Delay Time
C3 = .005 fLF
C3 = 0.1 fLF
C3 = 4.7 fLF tantalum
150
0.3
5.0
0.6
5.5
V
V
30
kO
5
mA
4.5
V
12
250
12
ms
ms
s
300
1.2
1.95
2.5
Delay Current
Pin4
fLA
Note 1: Thermal resistance without a heat sink for iunction to case temperature is S'C/W (TO-220). Thermal resistance for TO-220 case to ambient temperature Is
50'C/W.
Note 2: These parameters are guaranteed and 100% production tested.
Note 3: To ensure constant junction temperature, low duty cycle pulse testing is used.
1-210
,-----------------------------------------------------------------------------, r
N
Typical Circuit Waveforms
==
CQ
N
U1
60V
INPUT
VOLTAGE
PIN 1
(V)
26V
14V
14V
OV
5V
OUTPUT
VOLTAGE
PIN 2
(V)
OV
RESET
VOLTAGE
PIN 5
(V)
OV
OV
SYSTEM
CONOITION
LINE NOISE, ETC,
I
I
VOUT
SHORT
CIRCUIT
THERMAL
SHUTOOWN
TURN
OFF
TL/H/S268-3
FIGURE 2
Typical Performance Characteristics
Reset Voltage
Reset Voltage
HIGH
1>=0
~
--
LOW
1>=1,6mA
-- ' - -
-40
105
~
1.2
t;;
!!!
-
o
2,0
1.6
>
-
106
...
'"
Delay Time
2,4
-
O.B
0.4
!...
;::
'"
J
_V
~
~
RESET CURRENT IrnAI
V"
100
V"
10
V"
TL/H/S26B-S
Reset Voltage
on Power-up
100
TL/H/S268-B
Reset Pull-up
Resistor R10
Delay Time
6
50
220
C3=0.1 pF
cJ=O I
r-IO=500 rnA
o
103
0,1
10- 4 10- 3 10- 2 10- 1 1
10
OELAY CAPACITOR (pFI
0.0
TL/H/S26B-4
o /
~
~
0
40
80
120 160
JUNCTION TEMPERATURE ('C)
V
~
10 4
If
_ 210
~ 200
/
~
co
.... -
3
4
INPUT VOLTAGE (VI
~
...!
40
~
V
z
V
..........
190
180
-40
0
40
80
1;]
'"
120
160
JUNCTION TEMPERATURE ('C)
TL/H/526B-7
TL/H/S268-8
1-211
~
,-r--.....
./
30
V
20
-40
0
40
80
120 160
JUNCTION TEMPERATURE I'CI
TL/H/S26B-9
U)
N
G)
N
:E
r---------------------------------------------------------------------------------,
Typical Performance Characteristics
....I
Dropout Voltage
(Continued)
Ripple Rejection
Line Transient Response
lnr-~--~--~---r--~
BOr-.....,.---.--,----,---~
10=120 Hz
o.6l----t---+---+----1-----l
lOUT = 500 mA
_
0.4~~~
i
o~~--~I~--~~
-.40
0 040 80 120 160
10
20 30 40 50
TIME(,..)
~~--~--~~--~
o
60
TL/H/5266-12
Quiescent Current
J
Output Voltage
100 ,..---,----,---"'T"""--,----,
! :: H-HtlIIII-t-tt!
i§
VoUT
i3ti 60 I
loUT = 500 mA
80 1----1----1------11------11--/71
7r-r-,-.,.....,ro-."-,,,
6 RL=10IlH -+++-H -+-I
~
5
4H-t--+-I--H~HI+--t--i
60I----t---+--~--jL---I
3H-+-I--I-ff-l-+"'-fI--I-H
/
50 ~~ffffirC,2=,I~Om~~F;_f~mffl
2H-t--+-H-+-HI+--t--i
lH-I--+-H-+-HI+--t--i
040 I----I----\-:-V----Y-~-l
40' ~-++HIIII-++ttItIH--+-HttHti
20
lk '
100
FREQUENCY (Hz)
150 300 450 600, 750
OUTPUT CURRENT (mA)
TL/H/5266-11
Ripple Rejection
30 10
40 I---I---t--+--+---I
30
o
JUNcnON TEl/PERATURE (OC)
TL/H/526B-l0
~a:
_""---'
~-4--~::~~~~
60
50~-+---+---+--+--4
D.2 1---t."OU-T=<=If.OO"'m"'A.t----1-----l
a:
..
i
'll_- 70 ~
,----,.
1--1----+---+---+---1
Q8
oV
10k
o
o i.o'
V
150
-1
30D
450
600
Ff-l--+-H-+-H-+--t--i
60
-40 -20 0
20 40
INPUT VOLTAGE (V)
TL/H/62BB-15
750
OUTPUT CURRENT (mA)
TLlH/6266-13
TL/H/6268-14
Quiescent Current
040 6.~~'0~UT!.:=:.t5;;;0;0~m!ltA~4-=-_l
301--11---+----+---+---1
~
i...
10 1---r.'0-UT-:=""5'"0"'m:oA-I---+---I
O~--'----'--"""'--"""'--~
0
40
80
120
~
l~=rmA
75
6
0
160
1.0 1--.1+--11--1--1---1--1
~..
I
0.5 1-+1.1--+--11--+---11--1
0
20
40
i'-'
0
60
10
20
30
40 50
60
TIMEI'ls'
TL/H/526B-1B
Maximum Power
, DIssipation (TO·220)
:
Ia
.
I'\.
TL/H/5268-17
2r--r-"""T...;",.....-'-""T"".....,.~
1--+/--::;I00000.....~~C---t--l
5!i
lou~= 0 m~
-040 -20
~~ -60
6=-100
-ISO
is O.B
0.6
9", 0.4
::0 0.2
0
~
1
INPUT VOLTAGE (V)
Peak Output Current
1.5
IT
25
JUNcnON TEMPERATURE (OC)
TLlH/526B-19
is
1\loJT = oJmA
50
160
100
!::is. 50
ii§
0
!!;;
! J.
100
a
-40
Load Transient Response
Quiescent Current
125
_I.J
50
Output Capacitor ESR
H-+.;;;IN~F1N~ITE=-rHEA_Tr"SI.,.NK""+-t.-I
18~-+-r~+-~-+-P~~
18~-+-I-~+-r-t-+-I--I
14 ~-+-I--+-+-r-t-+-I--I
OL-...I--L.__L-....J...-L.~
o
5
10 15 20 25 30
INPUT VOLTAGE (V)
TL/H/626B-20
12 H-+-+~+-H-+-+-l
10 F"t......!:r---I-~1oac.d."'W"'HEA::-!J""S:!"N""Kr-t
81--1-+~~r,~~=+~
I~-+-I-~~~~~,-I--I
4 r- NO HEAT SINKHH-I'''''''od
~EJ~Ij:tj:±~:~~~:3
o 10 20
30
040 50 60 70 BO 90 100
AMBIENT TEllPERATURE (oe)
TLlH/526B-21
1·212
i
~-
10
t
ill
0.01
c
.!
till
co
~
~
./
100
lk
10k
lOOk
20
1M
FREQUENCY IH.I
Output at Reverse
25
30
35
INPUT VOLTAGE IVI
IS
..~
...
0.16
co
0.1
>
~
-10
-8
-a
-4
-2
INPUT VOLTAGE IVI
Output Voltage (Normalized
to 1VatTJ=25'C)
I--+-+-+-+-+-+--+-t
1.005
r--r-.,....-r--r-.,.--,,..-,.....,.....,
~ 1.000
~
t-+--:l;;;;ool-....d--t-t-+-t
".
I'--.
I'\.
co
I'"
~OJ95 t-+-++-+-t~~~~-t~
1-+--1f-+-+-+--+-+--I
-
5
!;co
co -a.2
-200
~
~
t-
,/
/'
-250
-12
0.2 r-;-'T"""T-,-r-;--;--,
-u
V
-100
-150
~
/
-50
Output at Overvoltage
RL .oa
~
>
.
i.
'"
40
Tj' 26'c+++-!H-+++-i
...
~
co
50
Tj' 25'C
RL -10011
Ti' 25'C
0
10·
SUpply 0.1
Reverse Supply Current
Overvoltage Supply Current
25
t-
ill
co
til
!t-
30
lo-~"mA
0.05
-I-
i-""
~
g 0.990 t-+-+-+-+-t-+-+-f---l
!:!"
~
~
0.9B5 t-+-+-t-t-+-+-t-+-t
co
3D
INPUT VOLTAGE IV)
35
INPUT VOLTAGE IV)
40
z 0.B80 L-.l-...J......J.......L_I-..L......L.......L.....J
-40 -20 0 20 40 80 80 100 120 140
JUNCTION TEMPERATURE
rc) .
TLfH/5539-4
1-217
Typical Performance Characteristics
Dropout Voltalle
0.1
~
I
GA
lo",110mA
-~
0.3
!;
;
Dropout Voltalle
D.'
0.&
I
0.1
,-
0.1
E
Ii
o
-
Low Voltalle Behavior
T)"2I'C
LM1811.fi
10 "110mA
.. D.I
I.;:
-
10"I~mA
i
I
~Ii
lo"'DmA
~
DA
0.3
~
0.2
0.1
IOU
JUNCTION TEMPERATURE rCI
&0
lID
&.0
!
4.D
=
3.D
t-
~
..
l.;' V
o
"""'"
o
(Continued)
1/
1/
2.0
I'
a
60
100
1.0
IUD
110
2.0
Hlllh Voltalle Behavior
Line Transient Response
4.D
6.0
1.0
Load Tranalent Response
~N-VQ~T"IV
T)"2&'C
10"'60mA
LMl830·1
RL "lOon
3.0
INPUT VOL TAOE IVI
OUTI'UT CURRENT ImAI
"10#
I
I
II
o
o
10
20
30
40
1&
INPUT VOLTAGE IVI
Peak Output Current
800
C
.s
.a
..~
I-
is
co
400
/"
300
..... ~O'C
,'~
200
TI"125'C
C
.s
..~a
I-
100
25
.
~
50
.....
30
80
80
I.
120
§
z
10
20
INPUT VOLTAGE IV)
II
a
.~..
~
/
Ul
40
..
20
o
1
10
100
I
I
80
10"·OmA
0
I
Ripple Rejection
""
IO·1IDIIA
0
I
10" 0 I
80
30
,"o"OmA
I
40
10
120 180
JUNCTION TEMPERATURE rC)
.IO"50mA
VIN - VOUT" 9V
40
10
I
- f - IJ5LI
150
.......
20
I
t-
Ripple Rejection
&0
is
t-
18
1&
5
fo"'"
. 0
LM213f1.5
80
~
10" 150mA
is
..... ~
10
Quiescent Current
C
1/ .....
III
20
OUTI'UT CURRENT ImA)
70
.st-
...
.iii
is
20
o
30
C
.st-
15
4&
Quiescent Current
22
VIN"4V
TI'2&"C
30
30
TIMEIIi~
35
I~
10
Ii
20
25
INPUT VOLTAGE IVI
15
45
Quleicent Current
~~'C
i-'"
500
30
TIME I.,)
,.
10k
FREIIUENCY 1Hz)
100.
1M
VIN-VOUT" BV
'0 "120 Hz
o
50
109
I&D
OUTPUT CURRENT ImA)
TUH/5539-2
1·218
r-------------------------------------------------------------'r
3:
Definition of Terms
N
Dropout Voltage: The input-output voltage differential at
which the circuit ceases to regulate against further reduction in input voltage. Measured when the output voltage has
dropped 100 mV from the nominal value obtained at 14V
Input, dropout voltage is dependent upon load current and
junction temperature.
Input Voltage: The DC voltage applied to the input terminals with respect to ground.
Input-Output Differential: The voltage difference between
the unregulated input voltage and the regulated output voltage for which the regulator will operate.
Line Regulation: The change in output voltage for a
change in the input voltage. The measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected.
Load Regulation: The change in output voltage for a
change in load current at constant chip temperature.
Long Term Stability: Output voltage stability under accelerated life-test conditions after 1000 hours with maximum
rated voltage and junction temperature.
Output Noise Voltage: The rms AC voltage at the output,
with constant load and no input ripple, measured over a
specified frequency range.
Quiescent Current: That part of the positive input current
that does not contribute to the positive load current. The
regulator ground lead current.
Ripple ReJection: The ratio of the peak-to-peak input ripple
voltage to the peak-to-peak output ripple voltage.
Temperature Stability of Vo: The percentage change in
output voltage for a thermal variation from room temperature to either temperature extreme.
Maximum Power
Dissipation (TO-220)
22
§:
z
14
0.
12
Vi
!!!
10
f5
8
6
c
~
0
0.
I\"
16
0
!;;:
INFINITE HEAT SINK
20
18
4
2
r-..
"
~
j1""" ~OOC W HEAT SINK
r- NO HEAT ~INK1""-1-0.
o
o
~~
I
10 20 30 40 50 60 70 80 90 100
AMBIENT TEMPERATURE (OC)
TLiH/5539-6
1-219
CQ
~
CI
,..
Sl
C"I
~
r-------------------------------------------------------------------~----------_,
~National
~ Semiconductor
LM2931 Series Low Dropout Regulators
General Description
Features
The LM2931 positive voltage regulator ·features a very low
quiescent current of 1 mA or less when supplying 10 mA
loads. This unique characteristic and the extremely low input-output differential required for proper regulation (0.2V
for output currents of 10 mAl make the LM2931 the ideal
regulator for standby power systems. Applications include
memory standby circuits, CMOS and other low power processor power supplies as well as systems demanding as
much as 100 mA of output current.
Designed Originally for automotive applications, the LM2931
and all regulated circuitry are protected from reverse battery
installations or 2 battery jumps. During line transients, such
as a load dump (60V) when the input voltage to the regulator can momentarily exceed the specified maximum operating voltage, the regulator will automatically shut down to
protect both internal circuits and the load. The LM2931 cannot be harmed by temporary mirror-image insertion. Familiar
regulator features such as short circuit and thermal overload
protection are also provided.
Fixed output of 5V Is available in the plastic TO-220 power
package or the popular TO-92 package. An adjustable output version, with on/off switch, is available i~ a 5-lead TO220 package.
•
•
•
•
•
•
•
•
•
•
•
•
Very low '1uiescent current
Output current in excess of 100 mA
Input-output differential less than 0.6V
Reverse battery protection
60V load dump protection
- 50V reverse transient protection
Short circuit protection
Internal thermal overload protection
Mirror-image insertion protection
Available in plastic TO-220 or TO-92
Available as adjustable with TIL compatible switch
100% electrical burn-in in thermal limit
Output Voltage Options
LM2931T-5.0
LM2931Z-5.0
LM2931CT
5V
LM2931AT-5.0
5V
LM2931AZ-5.0
Adjustable from 3V to 26V
5V
5V
Schematic and Connection Diagrams
V,N
01P----------------....-----------,
TO·220 3-Lead
FrontVlaw
Order Number LM2931
See NS Package T03B, Z03A, T05A
T0-92
OUTP~PUT
GN'><-/
VOUT
BoUomVlew
"'
iV,Zlk
ADJ:·
"'i
'411.
T()'220 5·Lead
"'Ilk2
R2
IV: 110"
AD.I:A' •
...n
10 ,1
I
rUT
;bOFF
ADJUST
Front View
TL/H/5254- ,
1-220
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage
26V
Operating Range
Overvoltage Protection
LM2931A. LM2931CT Adjustable
60V
LM2931
50V
Internal Power Dissipation (Note 1)
Operating Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Lead Temp. (Soldering. 10 seconds)
Internally Limited
-40·C to + 85·C
125·C
-65·C to + 150·C
230·C
Electrical Characteristics
VIN = 14V. 10 = 10 mAo TJ = 25·C (Note 1). C2 = 100 ",F (unless otherwise specified)
LM2931A-S.O
Parameter
Conditions
Output Voltage
5
5.25
4.75
5.19
4.81
5.25
4.75
6.0VS:VINS:26V.10 100 mA
-40·CS:TjS: 125·C
Line Regulation
9VS:VINS:16V
6VS:VINS:26V
2
4
10
30
14
50
Load Regulation
5 mAS:10S:100 mA
Output Impedance
100 mADe and 10 mArms • 100 Hz-10kHz 200
Quiescent Current
10S:10 mAo 6VS:VINS:26V
- 40·C s: T) s: 125·C
10=100 mAo VIN=14V. Tj=25·C
0.4
10 Hz-100 kHz. COUT = 100 ",F
Output Noise Voltage
LM2931-S.0
Test
Design
Tested Design
Typ Limit
Limit
Limit Typ Limit
(Note 2) (Note 3)
(Note 2) (Note 3)
Long Term Stability
VMAX
VMIN
5.5
4.5
2
4
10
30
14
50
Units
Limit
VMAX
VMIN
mVMAX
mVMAX
mVMAX
600
200
1.0
0.4
15
30
5
15
500
1000
500
",VrmSMAX
20
50
20
mV/1000 hr
55
80
Ripple Rejection
10=120 Hz
80
Dropout Voltage
10= 10 mA
10=100mA
0.05
0.3
1.0
0.2
0.6
0.05
0.3
mOMAX
1.0
1.0
mAMAX
mAMIN
mAMAX
mAMIN
dBMIN
0.2
0.6
VMAX
VMAX
26
VMAX
VMIN
Maximum Operational
Input Voltage
33
Maximum Line Transient RL =5000. VoS:5.5V.100 ms
70
60
70
50
VMIN
-30
-15
-30
-15
VMIN
Reverse Polarity Input
Voltage. DC
33
26
Vo'? -0.3V. RL = 5000
Reverse Polarity Input
1% Duty Cycle. T s: 100 ms. RL = 5000
-50
-80 -50
-80
Voltage. Transient
VMIN
Note 1: To ensure constant junction temperature, low duty cycle pulse testing Is used.
Note 2: Guaranteed and 100% production tested.
Note 3: Guaranteed (but not 100% production tested) over the operating temperature and input current ranges. These limits are not used to calculate outgoing
quality levels.
Note 4: Thermal resistance junction·to·case (8iO> is 3'C/W; case-to-ambient is 50'C/W.
1-221
III
Electrical Characteristics for Adjustable LM2931CT
VIN= 14V, VOUT=3V, 10= 10 mA, TJ=25°C (Note 1), R1 = 27k, C2= 100 JJ.F (unless otherwise specified)
Parameter
Typ
Conditions
Reference Voltage
1.20
Tested
Limit
Design
Limit
1.26
1.14
VMAX
VMIN
1.32
1.08
10:S:100 mA, -40°C:S:Tj= :S:125°C, R1 =27k
Measured from VOUT to Adjust Pin
Output Voltage Range
Units
Limit
VMAX
VMIN
24
3
VMAX
VMIN
mVIVMAX
Line Regulation
VOUT+0.6V:S:VIN:S:26V
0.2
1.5
Load Regulation
5 mA:S:10:S:100 mA
0.3
1
Output Impedance
100 mAocand 10 mArms ,100 Hz-10 kHz
40
Quiescent Current
10=10mA
10=100mA
During Shutdown RL = 500n
0.4
15
0.8
Output Noise Voltage
10 Hz-100 kHz
100
p.Vrms/V
0.4
%/1000 hr
Long Term Stability
Ripple Rejection
fo=120 Hz
0.02
Dropout Voltage
10:S:10mA
10=100mA
0.05
0.3
Maximum Operational Input
Voltage
Maximum Line Transient
10= 10 mA, Reference Voltage :S:1.5V
Reverse Polarity Input
Voltage, DC
Vo~
Reverse Polarity Input
Voltage, Transient
1% Duty Cycle, T:S: 100 ms, RL = 500n
On/Off Threshold Voltage
On
Off
Vo=3V
%MAX
mnlV
1
1
mAMAX
mA
mAMAX
%IV
0.2
0.6
VMAX
VMAX
33
26
VMIN
70
60
VMIN
-30
-15
VMIN
-80
-50
VMIN
2.0
2.2
1.2
3.25
VMAX
VMIN
20
50
p.AMAX
-0.3V, RL = 500n
On/Off Threshold Current
1·222
r-----------------------------------------------------------------------------, r
i:
I\)
Typical Performance Characteristics
CD
....
Co)
Dropout Voltage
Dropout Voltage
0.6
E
tI!
0.5
0.3
J
0.1
0
i
--
0.4
~
;;
9,.
I I
~
0.2
I
~
I
10 = 10 rnA
0.5
5.0
.....
40
80
Junellon Temperalure (CI
l!I
10
:! -
~~
I
0
~~
-2
I
o
L
....
;u.
Peak Output Current
500
-
Ti
I
J
2S"C
1 400
!3DO II~
o
o
C 25
1
U
25
20
r-- -
10
Jo
IJ
= 10
o
30
:2- 75
c0
-
i..
a.
a:
-
40 so
InpU1 Vol1l91 (V)
Quiescent Current
15
10
=-r-- c-
60
a.
if
70
,.
.!!
Q
-t--
- 101=~J- t-- r-
o
40
-40
80
120
85
TANT
iii'
'J
60
55
/
rJ
, I
50 t- LM2931·5.0
10 = lOrnA
45
I
10 100 Ik
r-- r-:~
Ripple Rejection
~F
AWM
65
10·SOmA
Junction Temperature (OCI
I
~F
45
III
90
C2 = 100
C2 = 100
30
20
Ripple Rejection
80
mAl
i-"'"
.",
60
iii'
~
-5
-20 -10 0 10 20 30
1000-"
IS
Output Current (mAl
r-- r-- ~=~~L - 10
.
85
~loo:mA -
IS
,.
o
30
I I I
I I I
30
is
~
u
is
,.
Quiescent Current
1
0
C
,.
1npU1 VoHage (V)
35
~
.5.
1: 20
~
U 15
is
§ 10
Q
20
10
ISO
25
.5.
1
o~~~~~t-n~!l
~
TIme (~sl
.!!
I
100
lOO~FH+;!:-i-+-H
!is
VIN = 14V
~
40 C2 =
-40 HoVY-t-i-++t-i-+-H
Quiescent Current
Tj = -40OC
200
45
6.D
~~
30
Tj~ ~
1
i!:
,.
IS
30
Time (~sl
3.0
4.0
5.0
Input Voltage (V)
Load Transient Response
~
u
Ii
SU
-2
-20 -10 0 10 20 30 40 50 60
Inpul Voltage (VI
600
2.0
§!r::
'S ~
-
fE-3
~
".
100
VIN • Vour = 9V
C2 = 10Mf"I\:
3
2
a!!! -I
'/
2.0
Line Transient Response
&i
r
~
0
1.0
50
Output Currenl (mAl
12 Output at Voltage Extremes
~
, ~--
~
;; 3.0
-
".,
4.0
~
i-"'"
120
LM2931·5.o
RL = SOOO
LM2931·5.0
10 = 100 rnA
~
0.4
S
I I
I""""
6.0
c 0.3
S
~ 0.2
0
;;
a. 0.1
10= 50 rnA
~ i"-"'
o
I
10 = 100 mA-
E
~I!
Low Voltage Behavior
0.6
I
~
10k lOOk 1M
FleCluency (Hzl
:2c
i
a:
80
75
70
65
60
~
~ 55
50
45
10 = 120 Hz
I I
o
25
50
75
100
Output Current (rnA)
TUH/5254-2
1·223
•
Typical Performance Characteristics
Output Impedance
.0
.
..-:i.-1.8
I
•
5co
1/
d••
D.O'
40
•
10
•
CD- 1oo",F
RL. IGDIl
&
4
2
0
-Z
-'00
.M
22
20
·.B
4.0
~ 3.B LM2931CT ADJUSTABLE
~
O~
....
100'"
I
...
0
3
.4
.2
lao
'"
8
B
0
6 9 12 15 18 21
OUTPUT VOLTAGE (V)
:~
t-.
6 9 12 15 18 2.
OUTPUT VOLTAGE IV)
24
0.1
0.1
0.1
0.8
0.5
I
I
..i!! R""'
I- 0.'~1·1EA~ LE~OTH-b" ~ ~M
i
to..:::
PC BOARD
I.4"LE~~~
co 0.4 rLENGTH
FROM
0.3 r I jBOARi
--.,;:
0.2
I I I
D.•
I I I.
I
0
0 1. 20 3D 40 II 10 10 80 91
i
I""
0
0 10 2D 30 40 50 60 70 BO 90 100
24
......
1.D
•rI'C/ WH£AT SINK l-
NO H£AT JINK
3
.....
Maximum Power Dissipation
(T0·92)
i
""1;;
...... 10..
.. 1.14
1.12
1.10
INFINITE H£AT SINK
.o~
~
ON
~
S
l
e
I·
J.;'
...
401
200 3DO
TIME 1II1II
!: .6
z
I
$I:z:
.ao
.....
m1.'6
Maximum Power Dissipation
(T0·220)
On/Off Threshold
3.2.
III 3.0
~ 2.B
> 2.6
2.4
z 2.2
2.0
•
FREQUENCY 1Hz)
3.6
:z: 3.4
1.24
1.22
;:: 1.20
~ 1.18
•0
>
.00fI
~
!!
...
21
~!
COil
.1111
~1.2B
.~. JIG I...
3D
2
I
.ao .k
1.30
LM2931 CT ADJUSTABLE
1.2B
II
!:Ie
-!:<
co
>
i
~
1 II'..
I
Reference Voltage
70
10
....2
'0' limA
g
(Continued)
Operation During Load
Dump
AMB.ENT TEMPERATURE rC)
AMsm ,)[MPERATURE (OC)
Output Capacitor ESR
.00
S
'1IuT=I00jil'
Vo=5V
I
10
1
M
§
REGION
2!
~
~
STABLE
0..
I
0.01
80
OUTPUT CURRENT (mA)
0
20
40
60
100
TUH/5254-3
Typical Applications
LM2931 Adjustable
LMDlt
R£GULATED
V'i~r·UT
OUTPUT
Vee
UNIEGULAllD
IlINT
"l.tT
........- D'], -..&!.
" ••
T'DifoI
F
la
'="
'="
'="
AI
"'
TL/H/5254-4
....-L!!!....
OUT
'OUT
Off
VOUT~ Reference Voltage x
1.1C~;~
Rl
+ R2
Rt
i'
~
DN
"'
''''
;
I~ k ~~:;:F
LMl131
AD.lUSTAILE
R2
Note: Using 28k for Rl will automatically com·
pensate for errors in VOUT due 10 the input bias
currenl of the ADJ pin (approximalely t ",A).
.l,
must be a1 least 100 p.F to maintain stability. May be increased 'wi1houl bound 10 mainlain regulation during transients. Locate as
"COUT
close as possible to the 'regulator. This capacitor must be rated over the same operating tem-
perature range as the regu)alor. The equivalent
series resiSlance (ESR) of lhis capacRor is crR·
ical; see curve.
TL/H/5254-5
1-224
'Required if regulalor is localed far from power
supply filter.
,-----------------------------------------------------------------------------'r
i:
Application Hints
One of the distinguishing factors of the LM2931 series regulators is the requirement of an output capacitor for device
stability. The value required varies greatly depending upon
the application circuit and other factors. Thus some comments on the characteristics of both capacitors and the regulator are in order.
High frequency characteristics of electrolytic capacitors depend greatly on the type and even the manufacturer. As a
result, a value of capacitance that works well with the
LM2931 for one brand or type may not necessary be sufficient with an electrolytic of different origin. Sometimes actual bench testing, as described later, will be the only means
to determine the proper capacitor and value. Experience
has shown that, as a rule of thumb, the more expensive and
higher quality electrolytics generally allow a smaller value
for regulator stability. As an example, while a high-quality
100 /LF aluminum electrolytic covers all general application
circuits, similar stability can be obtained with a tantalum
electrolytic of only 47 /LF. This factor of two can generally
be applied to any special application circuit also.
At this pOint, the procedure for bench testing the minimum
value of an output capacitor in a special application circuit
should be clear. Since worst-case occurs at minimum operating temperatures and maximum operating currents, the
entire circuit, including the electrolytic, should be cooled to
the minimum temperature. The input voltage to the regulator
should be maintained at O.SV above the output to keep internal power dissipation and die heating to a minimum.
Worst-case occurs just after input power is applied and before the die has had a chance to heat up. Once the minimum value of capaCitance has been found for the brand
and type of electrolytic in question, the value should be doubled for actual use to account for production variations both
in the capacitor and the regulator. (All the values in this
section and the remainder of the data sheet were determined in this fashion.)
Definition of Terms
Dropout Voltage: The input-output voltage differential at
which the circuit ceases to regulate against further reduction in input Voltage. Measured when the output voltage has
dropped 100 mV from the nominal value obtained at 14V
input, dropout voltage is dependent upon load current and
junction temperature.
Input Voltage: The DC voltage applied to the input terminals with respect to ground.
Input-Output Differential: The voltage difference between
the unregulated input voltage and the regulated output voltage for which the regulator will operate.
Another critical characteristic of electrolytics is their performance over temperature. While the LM2931 is designed
to operate to -40'C, the same is not always true with all
electrolytics (hot is generally not a problem). The electrolyte
in many aluminum types will freeze around -30'C, reducing
their effective value to zero. Since the capacitance is needed for regulator stability, the natural result is oscillation (and
lots of it) at the regulator output. For all application circuits
where cold operation is necessary, the output capacitor
must be rated to operate at the minimum temperature. By
coincidence, worst-case stability for the LM2931 also occurs at minimum temperatures. As a result, in applications
where the regulator junction temperature will never be less
than 25'C, the output capacitor can be reduced approximately by a factor of two over the value needed for the
entire temperature range. To continue our example with the
tantalum electrolytic, a value of only 22 /LF would probably
thus suffice. For high-quality aluminum, 47 J-LF would be adequate in such an application.
Another regulator characteristic that is noteworthy is that
stability decreases with higher output currents. This sensible
fact has important connotations. In many applications, the
LM2931 is operated at only a few milliamps of output current or less. In such a circuit, the output capacitor can be
further reduced in value. As a rough estimation, a circuit that
is required to deliver a maximum of 10 mA of output current
from the regulator would need an output capacitor of only
half the value compared to the same regulator required to
deliver the full output current of 100 mA. If the example of
the tantalum capaCitor in the circuit rated at 25'C junction
temperature and above were continued to include a maximum of 10 mA of output current, then the 22 J-LF output
capacitor could be reduced to only 10 /LF.
In the case of the LM2931 CT adjustable regulator, the minimum value of output capacitance is a function of the output
voltage. As a general rule, the value decreases with higher
output voltages, since internal loop gain is reduced.
Line Regulation: The change in output voltage for a
change in the input voltage. The measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected.
Load Regulation: The change in output voltage for a
change in load current at constant chip temperature.
Long Term Stability: Output voltage stability under accelerated life-test conditions after 1000 hours with maximum
rated voltage and junction temperature.
Output Noise Voltage: The rms AC voltage at the output,
with constant load and no input ripple, measured over a
specified frequency range.
Quiescent Current: That part of the positive input current
that does not contribute to the positive load current. The
regulator ground lead current.
Ripple Rejection: The ratio of the peak-to-peak input ripple
voltage to the peak-to-peak output ripple Voltage.
Temperature Stability of Vo: The percentage change in
output voltage for a thermal variation from room temperature to either temperature extreme.
1-225
N
CD
.....
(0)
U)
~
N
:i
...I
r----------------------------------------------------------------------------,
~National
~ Semiconductor
LM2935 Low Dropout Dual Regulator
General Description
Features
The LM2935 dual 5V regulator provides a 750 mA output as
well as a 10 mA standby output. It features a low quiescent
current of 3 mA or less when supplying 10 mA loads from
the 5V standby regulator output. This unique characteristic
and the extremely low input-output differential required for
proper regulation (0.55V for output currents of 10 mAl make
the LM2935 the ideal regulator for power systems that include standby memory. Applications include microprocessor
power supplies demanding as much as 750 mA of output
current.
•
•
•
•
•
•
•
•
•
•
•
•
•
Designed for automotive applications, the LM2935 and all
regulated circuitry are protected from reverse battery installations or 2 battery jumps. During line transients, such as a
load dump (60V) when the input voltage to the regulator can
momentarily exceed the specified maximum operating voltage, the 0.75A regulator will automatically shut down to protect both internal circuits and the load while the standby
regulator will continue to power any standby load. The
LM2935 cannot be harmed by temporary mirror-image insertion. Familiar regulator features such as short circuit and
thermal overload protection are also provided.
Two 5V regulated outputs
Output current in excess of 750 mA
Low quiescent current standby regulator
Input-output differential less than 0.6V at 0.5A
Reverse battery protection
60V load dump protection
- 50V reverse transient protection
Short circuit protection
Internal thermal overload protection
Available in 5-lead TO-220
ON/OFF switch controls high current output
Reset error flag
100% electrical bum-in in therrnallimit
Typical Application Circuit
6~ -!-Cl*
'Required if regulator is located far from power
supply filter.
Tl
ON/O:~ -,... ,*0.1,.F
INPUT
OUTPUT 2
VOLTAGE VOLTAGE
+T
~c2**
,*10~F
~~k
RESET o-....~____4:.t:~~HI
FLAG
"CoUT must be at least 10 "F to maintain stability.
May be increased without bound to maintain regulation during transients. Locate as close as possible to the regulator. This capaCitor must be rated over the same operating temperature range
as the regulator. The equivalent series rasistance
(ESR) of this capacitor is critical; see curve.
VOUT 5V
750 mA
LM2935
(FOR YoUT ONLY)
5
+T
GNO
13
STANOBY5V
OUTPUT 10 mA
:::;:: C3**
...
1 _ _ _ _--"I ' 10~F
*
TL/H/5232-1
FIGURE 1. Test and Application Circuit
Connection Diagram
TO-220 5-Lead
I~I
I
~ 5 STANDBY OUTPUT
4 SWITCH/RESET
3 GROUND
2 OUTPUT VOLTAOE (VOUT)
1 INPUT VOLTAGE (VIN)
TL/H/5232-B
Front View
Order Number LM2935T
See NS Package Number T05A
1-226
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage
Operating Range
26V
Overvoltage Protection
60V
Internal Power Dissipation (Note 1)
Operating Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Lead Temp. (Soldering, 10 seconds)
Internally Limited
-40'Cto + 125'C
150'C
-65'C to + 150'C
230'C
Electrical Characteristics for VOUT
VIN = 14V, 10 = 500 mA, TJ = 25'C (Note 4). C2 = 10 p.F (unless otherwise specified)
Parameter
Conditions
Output Voltage
6V5:VIN5: 26V, 5 mA5:105:500 mA,
-40'C5:TJ5:125'C (Note 2)
Line Regulation
9V5:VIN5:16V, 10=5 mA
6V5:VIN 5: 26V, 10=5 mA
Typ
Tested
Limit
(Note 3)
Units
Limit
5.00
5.25
4.75
VMAX
VMIN
4
10
25
50
mVMAX
mVMAX
10
50
mVMAX
Load Regulation
5 mA5:105:500 mA
Output Impedance
500 mADe and 10 mArms , 100 Hz-10kHz
Quiescent Current
105: 10 mA, No Load on Standby
10 = 500 mA, No Load on Standby
10 = 750 mA, No Load on Standby
3
40
90
10 Hz-100 kHz
100
p.Vrms
20
mVl1000 hr
Output Noise Voltage
Long Term Stability
200
mn
100
mA
mAMAX
mA
Ripple Rejection
fo=120Hz
66
Dropout Voltage
10=500mA
10=750mA
0.45
0.82
0.6
VMAX
1.2
0.75
AMIN
31
26
VMIN
70
60
V
-30
-15
V
Current Limit
Maximum Operational
Input Voltage
Maximum Line Transient
Vo5:5.5V
Reverse Polarity Input
Voltage, DC
dB
Reverse Polarity Input
Voltage, Transient
1% Duty Cycle,T 5: 100 ms,
10n Load
-80
-50
V
Reset Output Voltage
Low
High
R1 =20k, VIN=4.0V
R1 =20k, VIN= 14V
0.9
5.0
1.2
6.0
4.5
VMAX
VMAX
VMIN
Reset Output Current
Reset=1.2V
ON/OFF Resistor
R1 (± 10% Tolerance)
20
knMAX
mA
5
Note 1: Thermal resistance without a heat sink for iunction to case temperature is 3'C/W(TO·220). Thermal resistance for TO·220 case to ambient temperature is
50'CIW.
Note 2: The temperature extremes are guaranteed but not 100% production tested. This parameter Is not used to calculate outgoing AQL.
Note 3: Tested Limits are guaranteed and 100% tested in production.
Note 4: To ensure constant iunction temperature, low duty cycle pulse testing is used.
1·227
Electrical Characteristics for Standby Output
10=10 mAo VIN=14V. S1 open. Cour=10 /LF. TJ=25·C (Note 4). (unless otherwise specified)
Standby Output
Conditions
Parameter
Typ
Tested
Limit
Units
Limit
5.00
5.25
4.75
VMAX
VMIN
Output Voltage
10S;10 mAo 6VS;VINS;26V.
-40·CS;TJS; 125·C
Tracking
Your-Standby Output Voltage
50
200
mVMAX
Line Regulation
6VS;VINS;26V
4
50
mVMAX
Load Regulation
1 mAS;loS;10 mA
10
50
mVMAX
Output Impedance
10 mAce and 1 mArms • 100 Hz-10kHz
1
Quiescent Current
10S;10 mAo
Your OFF (Note 2)
2
3
mAMAX
Output Noise Voltage
10 Hz-100 kHz
Long Term Stability
0
300
/LV
20
mV/1000hr
Ripple Rejection
fo=120Hz
66
Dropout Voltage
10S;10 mA
0.55
0.7
VMAX
70
25
mAMIN
70
60
VMIN
Current limit
dB
Maximum Operational
Input Voltage
VoS;6V
Reverse Polarity Input
Voltage. DC
Vo'? -0.3V. 5100 Load
-30
-15
VMIN
Reverse Polarity Input
Voltage. Transient
1% Duty Cycle T S; 100 ms
5000 Load
-80
-50
VMIN
Typical Circuit Waveforms
BOV
i\
INPUT
VOIJA8E 14V
PIN 1
(VI
31V
.......
3V
~il-n
SI::&~ OPEN
OUTPUT
VOIJAOE
PIN 2
(VI
RESET
VOIJAOE
PIN 4
(VI
STANDBY
VDIJAoE
PIN 5
(V)
CLOSED
5V
OV-
V
oV-
OPEN
5V
\/
,....;!....
~
ov
I
5V
U U
I
5V
5Y
SYSTEM
CONDlnoN
14V
5V
L/
J LJ
h
~
5V
j\.!:!U
TURN
ON
LOAD
DUMP
LOWVJN
LINE NOISE. ETC.
Vour
SHORT
CIRCUIT
THERMAL
SHUTDOWN
TURN
OFF
TLlH/5232-2
FIGURE 2
1-228
Typical Performance Characteristics
E 1.0
Dropout Voltage (VOUT)
Dropout Voltage (VOUT)
~
~
~
I
...
~ 0,9
0.6
lOUT ~500 mA
0.2
C>
I
:!5
0.6
L
~ 0.5
is 0.4
~ ·0.3
~ 0.2
:! 0.1 i"'" 1..0"
~
0
:!5
0 100 200 300 400 500 600 700 BOO
OUTPUT CURRENT (mA)
'"
I
o
-40
0.9
O.B
:;;! 0.7
~ 0.6
~ 0.5
is 0.4
t- 0.3
1/
~
I-- f- louLl00 mA- I--
,!.
~
... 0.7
-
o
40
BO
120 160
JUNCTION TEMPERATURE ('C)
Low Voltage Behavior
1
~C>>!:;
~
~ 0.8
0.8
is 0.4
~~
Dropout Voltage (VSTBY)
§!:
~
./
:!
0.2
0.1
:!5
o
~
Output Voltage (VOUT)
lOUT =500 mA
ISTYBY = 10 mA
,..
..".
o
5
10
15
OUTPUT CURRENT (mA)
20
Output Voltage (VSTBY)
RL-500n
RL=10n
I
VST~~ ,"VoUT
~
'(f
I)
o
o
234567B
INPUT VOLTAGE (V)
-1 100'
-1
-2
-2
Line Transient Response
(VOUT)
20
lOUT =500 mA
IA
\ ... '--
~
5" 10
~ S.
~
j:!
Ii
0
20
40
INPUT VOIJAGE (V)
60
Line Transient Response
(VSTBY)
c>z
S
IY
-40 -20
ij
it
.0
lAo.
5
0
-5
-10
-40 -20
0
20
40
INPUT VOLTAG~ (V)
60
Load Transient Response
(VOUT)
150
, I-
~i 100
50
0
E!5 -50
!:l-
.I
~~
IV
~
II
~~-100
~
-150
O.B
t0.6
g
CI
9~ 0.4
B 0.2 I -
o
i
10
20 3D 40
TIME(p')
50
60
0102030405060
TIME(~.)
Load Transient Response
(VSTBY)
150 r-'--'---'-r-..,--,-.....,
1--+-+-1-+-+-+-1
1--....-+-1--+-+-1--1
! ~
1-+-+_1-.-+"""11-1
~~
1-+-+-1-....-+--;1--1
~ ;-1011 1-+-+-+-+-+-+--1
-150 .1:-+-+--,1-+-+-+---1
~ i 20 f-+-+-+-+-+-+-..:r
15~~~~~-+-4~
i i 10 1--+-+-1--+-+-1---1
~ ~ 5 1-'+--+-/-+-+-1--1
~
0102030405060
TlME(~.)
Peak Output Current (VOUT)
Peak Output Current (VSTBY)
100
100
50
~ 0
!L50
,.. !j -
O~~~~~~~--J
o
10
20 3D 40
TlME(p.)
50
60
g
...
1.5
'"to
1.0
~
~
~
...
~
I!:
5
~
~
!;
JI
0.5
o
i
l-"'"
o
§
10 15 20
25
INPUT VOLTAGE (V)
3D
,
80
60
40
/
~
II
20
o
o
10
20
3D 40 50
INPUT VOLTAGE (V)
60
TUH/5232-3
1·229
~
&l
~
Typical Performance Characteristics
Quiescent Current (VOUT)
120
110
jl00
_ 10
i
i3
Iii..
f!!
ill
Quiescent Current (VSTBY)
5
Imy=10mA
70
""
o ~ P""""
o 100 200 300 400 600 600 TOO 800
~
o
o
¥OuT-OUTPUT CURRENT (mAl
!
81 OPEN
¥OUT OFF
3
I
b,-
IITlY=O mA
I
o
-40
-
jl40
-120
..
lOUT =
500mA
I
lOUT =
OmA
,.'"
iii
40
80
120 180
JUNGnON TEMPERATURE ('CI
-:-
::::
7
-
iz
~
...Ul
¥OUT
loUT a 600 mA
~-10,.F r-
10
100
lk
FREQUENCY (Hz)
Output Impedance
70
'""-
~
r"+- r:-410~ J60 InA
t-t-
o
-40
0
40
80 120 160
JUNCTION TEMPERATURE ('CI
9
81 OPEN
VOUT OFF
:;;
.!.
..
.
i
I
I
Isr=ll0~ ~
:0
r:J
IAI'I
2
IfBYiOf- I-
1
o
au
-20 -10 0 10 20 3D 40 60 60
INPUT VOLTAGE (VI
Ripple Rejection (VSTBY)
80
10=120 Hz
80
lOUT =250 mA
Ii
-
10=120 Hz
iD 70
~
z
e 60
IiiUl
...
50
50
E 40
i!
3D
150 3D0 450 600
OUTPUT CURRENT (mAl
0
750
Reset on Startup
10
3D
20
10
Ripple Rejection (VOUT)
3D
lilt<
50
40
Ii'"
i!
.......
3D
f=
E 40
t-
..
Quiescent Current (VSTBY)
-20 -10 0 10 20 3D 40 50
INPUT VOIJAOE (VI
au
'lmy
Imy=10mA
C3=10,.F
lOUT -750 mA·=
il00
80
80
40
20
Ripple Rejection
au
60
IITlY =10 mA
180
_11~=101nA_ I - -
i-f-- _11~=600mA '-~
!
5
10
15
20
21i
STANDBY OUTPUT CURRENT (mA)
I I
Imy=l. mA
70
Quiescent Current
Quiescent Current (VSTBY)
4
80 Quiescent Current (VOUT)
I
I8
~/
I
f
".
/
/
I
I
60
50
40
30
20
10
51 OPEN
VouTOFF
!
'I
Ii 80
(Continued)
0
25
Maximum Power
Dissipation (TO-220)
22
_~~=~k
10
15
20
OUTPUT CURRENT (mA)
INFINITE HEAT SINK
20
18
18
RL=100
14
12
t/
1/
100
1k
FREQUENCY (Hz)
10k
o~
o
"
10
WHEAT SilK
r-- ID"C
.........
....
. . . . l!Io HEAT ~IIIK
~
o
2345678
INPUT VOLTAGE (VI
o
10 20 .10 <40
so
60 70 60 90 100
AMBIENT TEMPERATURE (OC)
TLlH/5232-4
1,,230
Load Regulation: The change in output voltage for a
change in load current at constant chip temperature.
Long Term Stability: Output voltage stability under accelerated life-test conditions after 1000 hours with maximum
rated voltage and junction temperature.
Output Noise Voltage: The rms AC voltage at the output,
with constant load and no input ripple, measured over a
specified frequency range.
Typical Performance
Characteristics (Continued)
Output Capacitor ESR
(Standby Output, Pin 5)
~ 100~--r---~--~------~
S.
tl
~
COUT = IOI'F
Quiescent Current: The part of the positive input current
that does not contribute to the positive load current. The
regulator ground lead current.
Ripple Rejection: The ratio of the peak-to-peak input ripple
voltage to the peak-to-peak output ripple voltage.
Temperature Stability of Vo: The percentage change in
output voltage for a thermal variation from room temperature to either temperature extreme.
10~~+---~---+--~--~
~
'"~
~
§
0.1
rr,~+----;----+--~---4I
~
:;
S
Application Hints
2
10
8
6
EXTERNAL CAPACITORS
The LM2935 output capacitors are required for stability.
Without them, the regulator outputs will oscillate, sometimes
by many volts. Though the 10,..F shown are the minimum
recommended values, actual size and type may vary depending upon the application load and temperature range.
Capacitor effective series resistance (ESR) also factors in
the IC stability. Since ESR varies from one brand to the
next, some bench work may be required to determine the
minimum capaCitor value to use in production. Worst-case is
usually determined at the minimum ambient temperature
and maximum load expected.
Output capacitors can be increased in size to any desired
value above the minimum. One possible purpose of this
would be to maintain the output voltage during brief conditions of negative input transients that might be characteristic of a particular system.
Capacitors must also be rated at all ambient temperatures
expected in the system. Many aluminum type electrolytics
will freeze at temperatures less than -30·C, reducing their
effective capaCitance to zero. To maintain regulator stability
down to -40·C, capaCitors rated at that temperature (such
as tantalums) must be used.
OUTPUT CURRENT (rnA)
TLlH/5232-9
Output Capacitor ESR
(Main Output, Pin 2)
s:...
100
~
10
0
en
~
~,
= IOI'F
' / / / ' / / / ' / / / '//~
STABLE
REGION
~/.
ffi
en
....I
CaUT
%'~ ~
%
'"~
.......z
,.,..,
///
//
~
/
/~
0.1
~
:;
S
0.D1
o
100
200 300
400
OUTPUT CURRENT (mA)
500
TL/H/5232-10
Definition of Terms
Dropout Voltage: The input-output voltage differential at
which the circuit ceases to regulate against further reduction in input voltage. Measured when the output voltage has
dropped 100 mV from the nominal value obtained at 14V
input, dropout voltage is dependent upon load current and
junction temperature.
No capaCitor must be attached to the ON/OFF and ERROR
FLAG pin. Due to the internal circuits of the IC, oscillation on
this pin could result.
STANDBY OUTPUT
The LM2935 differs from most fixed voltage regulators in
that it is equipped with two regulator outputs instead of one.
The additional output is intended for use in systems requiring standby memory circuits. While the high current regulator output can be controlled with the ON/OFF pin described
below, the standby output remains on under all conditions
as long as sufficient input voltage is applied to the IC. Thus,
memory and other circuits powered by this output remain
unaffected by positive line transients, thermal shutdown,
etc.
The standby regulator circuit is deSigned so that the quiescent current to the IC is very low «3 mAl when the other
regulator output is off.
Input Voltage: The DC voltage applied to the input terminals with respect to ground.
Input-Output Differential: The voltage difference between
the unregulated input voltage and the regulated output voltage for which the regulator will operate.
Line Regulation: The change in output voltage for a
change in the input voltage. The measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected.
1-231
~ r-------------------------------------------------------------~----~
C')
m
Application Hints (Continued)
:E
In applications where the standby output is not needed, it
may be disabled by connecting a resistor from the standby
output to the supply voltage. This eliminates the need for a
more expensive capacitor on the output to prevent unwanted oscillations. The value of the resistor depends upon the
minimum input voltage expected for a given system. Since
the standby output is shunted with an internal 5.7V zener
(Figure 3), the current through the external resistor should
be sufficient to bias R2 and R3 up to this point. Approximately 60 /LA will suffice, resulting in a 10k external resistor
fOr most applications (Figure 4).
N
....I
ON/OFF AND ERROR FLAG PIN
This pin has the ability to serve a dual purpose if
desired. When controlled in the manner shown in Figure 1
(common in automotive systems where 81 is the ignition
switch), the pin also serves as an output flag that is active
low whenever a fault condition is detected with the high
current regulated output. In other words, under normal
operating conditions, the output voltage of this pin is high
(5V). This is set by an internal clamp. If the high current
output becomes unregulated for any reason (line transients,
short circuit, thermal shutdown, low input voltage, etc.) the
pin switches to the active low state, and is capable of sinking several milliamps. This output signal can be used to initiate any reset or start-up procedure that may be required of
the system.
Ra
10k
The ON/OFF pin can also be driven directly from open collector logic circuits. The only requirement is that the 20k
pull-up resistor remain in place (Figure 5). This will not affect
the logic gate since the voltage on this pin is limited by the
internal clamp in the LM2935 to 5V.
STANDBY
OUTPUT
LM2935
I
...1..C3
l'
:~k
I
~
CMOS MM74C04
OR EQUIVALENT
TL/H/5232-6
DELAYED
RESET
OUT
FIGURE 4. Disabling Standby Output to Eliminate C3
HIGH CURRENT OUTPUT
Unlike the standby regulated output, which must remain on
whenever pOSSible, the high current regulated output is fau It
protected against overvoltage and also incorporates thermal shutdown. If the input voltage rises above approximately 30V (e.g., load dump), this output will automatically shutdown. This protects the internal circuitry and enables the IC
to survive higher voltage transients than would otherwise be
expected. Thermal shutdown is effective against die overheating since the high current output is the dominant source
of power dissipation in the IC.
Rl
20k
LM2935
4 SWITCH I
RESET
TL/H/5232-11
FIGURE 6. Reset Pulse on Power-Up
(with approximately 300 ms delay)
Lt.f2935
0t.17405
TL/H/5232-7
FIGURE 5. ContrOlling ON/OFF Terminal with
a Typical Open Collector Logic Gate
1-232
o
=i'
n
c
::;:
SWITCH/RESET
4
VIN
en
n
::T
CD
3
ac;'
PH
•
[P1S
~
VaUl
R30
R3
R31
II'
Nza
GND
TUH/5232-5
FIGURE 3
S&6~W'
~National
~ Semiconductor
LM2936 Ultra-Low Quiescent Current 5V Regulator
General Description
Features
The LM2936 ultra-low quiescent current regulator features
low dropout voltage and low current in the standby mode.
With less than 15 )J-A quiescent current at a 100 )J-A load,
the LM2936 is ideally suited for automotive and other battery operated systems. The LM2936 retains all of the features that are common to low dropout regulators including a
low dropout PNP pass device, short circuit protection, reverse battery protection, and thermal shutdown. The
LM2936 has a 40V operating voltage limit, -40'C to
+ 125'C operating temperature range, and ± 2% output
voltage tolerance over the entire output current, input voltage, and temperature range. The LM2936 is available in a
TO-92 package with a fixed 5V output.
• Ultra low quiescent current (IQ ,;; 15 )J-A for
10 ,;; 100 )J-A)
• Fixed 5V, 50 mA output
• Output tolerance ± 2% over line, load, and temperature
• Dropout voltage typically 200 mV @ 10 = 50 mA
• Reverse battery protection
• - 50V reverse transient protection
• Internal short circuit current limit
• Internal thermal shutdown protection
• 40V operating voltage limit
Typical Application
• Required if regulator is located more than 2" from power supply filter
capacitor.
U
Required for stability. Must be rated for 10 JLF minimum over intended
operating temperature range. Effective series resistance (ESR) is critical,
see curve. Locate capaCitor as close as possible to the regulator output and
ground pins. Capacitance may be increased without bound.
Input-_ VIN
LM2936
Vol-........-Output
TL/H/9759-1
Connection Diagram
TO-92 Plastic Package (Z)
TL/H/9759-2
Bottom View
Order Number LM2936Z
See NS Package Number Z03A
1-234
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage (Survival)
+60V, -50V
ESD Susceptability (Note 2)
2000V
Power Dissipation (Note 3)
Internally limited
Junction Temperature (TJmax)
150'C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
- 65'C to + 150'C
260'C
Operating Ratings
Operating Temperature Range
Maximum Input Voltage (Operational)
- 40'C to + 125'C
40V
Electrical Characteristics
VIN = 14V, 10 = 10 mA, TJ = 25'C, unless otherwise specified. Boldface limits apply over entire operating temperature range
Parameter
Output Voltage
Line Regulation
Load Regulation
5.5V ~ VIN ~ 26V,
10 ~ 50 mA (Note 7)
Quiescent Current
Output Noise Voltage
Dropout Voltage
5.1
Vmax
VIN
~
16V
5
10
6V
~
VIN
~
40V, 10 = 1 mA
10
30
10
30
10
30
~
~
10
10
~
~
5 mA
50mA
10 = 30 mAdc and 10 mArms,
f= 1000Hz
10 = 100 ].LA, 8V
~
VIN
~
450
24V
10 = 10 mA, 8V
~
VIN
~
24V
10 = 50 mA, 8V
~
VIN
~
24V
10 Hz-100 kHz
Units
Vmin
V
~
100].LA
Design
Limit
(Note 6)
4.9
5
mVmax
mVmax
m.o.
9
15
0.20
0.50
J.LAmax
mAmax
1.5
2.5
mAmax
500
Long Term Stability
Ripple Rejection
Tested
Limit
(Note 5)
9V
5mA
Output Impedance
Typical
(Note 4)
Conditions
].LVrms
mV/1000 Hr
20
Vrioole = 1 Vrms, frioole = 120 Hz
10=100].LA
60
40
0.05
0.10
dBmin
Vmax
10 = 50mA
0.20
0.40
Vmax
-15
Vmln
-80
-50
Vmln
-0.1
-600
].LAmax
Reverse Polarity
DC Input Voltage
RL = 500.0., Vo:2: -0.3V
Reverse Polarity
Transient Input Voltage
RL = 500.0., T = 1 ms
Output Leakage with
Reverse Polarity Input
VIN = -15V, RL = 500.0.
Maximum Line Transient
RL = 500.0., Vo
Short Circuit
Current
Vo= OV
~
5.5V, T = 40 ms
120
60
Vmin
250
mAmax
65
mAmin
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specijications do not apply when operating
the device beyond Its specHied operating ratings.
Note 2: Human body model, 100 pF discharge through a 1.5 kO resistor.
Note 3: The maximum power dissipation is a function of TJmax, 6JA. and TA. The maximum allowable power dissipation at any ambient temperature is
Po = (TJmax - TA)/6JA' If this dissipation Is exceeded, the die temperature will rise above 150'C and the LM2936 will go Into thermal shutdown. For the
LM2936Z, the junction·lo-ambientthermal resistance (6JAlls 195'C/W.
Note 4: Typicals are at 25'C (unless otherwise specified) and represent the most likely parametric norm.
Note 5: Tested limits are guaranteed to National's AOQL (Average Outgoing Quality Level) and 100% tested.
Note 6: Design IImHs are guaranteed to National's AOQL (Average OutgOing QualHy Level) but not 100% tested.
Note 7: To ensure constant junction temperature, pulse testing Is used.
1·235
U)
(II)
re
r---------------------------------------------------------------------------------,
Typical Performance Characteristics
:l
Maximum Power
Dissipation (TO-92)
Q5 Dropout Voltage
lD~rnrnrn~""'"
~
~
!;!
~
~
I
Q5 Dropout Voltage
0.91-P'1d-IH-IH-I-H-H-H-H--l
o.a 1-+t-Ptod+++I-+t-++++-H
TJ=dsoc
~~~~~~~~-H~
D.6
H-1-HH-If-PI..t--l-H-H-H--l
--
Q5t-++++t+t+-P'Id-t--H-+-H
D.4 ~~~H-IH-I-?I~-H~
0.3 H-H-H-IH-IH-I-Hf-Pld-t--l
D.2 ~~~~H-IH-I~-?I.-I
0.1 H-H-H-H-I-H-H-H-Hil
. OD L..l.JL..J...J..J....L..J....1...1..J...J....J....L.J..l...W
-.w
«l
III
OD
-so
AMBIENT TIltPERATURE(OC)
60
50
o
o
~ I--"
10
-10
-20 -10 0
I I
VIN =14V
I- TJ=25OC
'o=100J!A
o
-50
INPUT VOLTAGE(V)
3.5
15
1.5
~
lD
5
Q5
150
o
o
IN=14
10
-
20
./
30
«l
50
OUTPUT CURRENT (rnA)
Quiescent Current
2D
IS
TJ =25OC
Output Capacitor ESR
l00~~~-r-r~~~~
I
'o~50IrnA
I
I
I~
I
10 =50 rnA
'0 =110 rnA
'0= lOrnA
D.2
-05
-20
100
JUNCTION TEMPERATURE (OC)
Quiescent Current
4D
50
/
~
2
10 20 30 «l 50 60
50
Quiescent Current
Ilo=OJSA
3D
«l
;!II
Alo=100JSA
10
i
20
OUTPUT CURRENT (rnA)
VIN =14V
18
14
12
10
I I
20
150
16
110=1 rnA
30
100
Quiescent Current
20
J=25OC
1\ I I
«l
50
I"
JUNCTION TEMPERATURE(OC)
Quiescent Current
I I
I-
'our= lOrnA
1-
120
-
'our~~
-10
10
INPUT VOLTAGEM
20
;!II
o
-so
0~1~~~~~~~~~
50
100
JUNCTION TEMPERATURE (OC)
150
o
W
20
30
«l
50
OUTPUT CURRENT (rnA)
TLlH/9759-3
1-236
Typical Performance Characteristics (Continued)
250 Peak Output Current
]: 200
;
-I
150
5
I!:
:0
100
~
50
Peak Output Current
~0r.V~~=714J.V-;-'r-r-.-'-,
TJ =25OC
0
o I
o
-
I--
;
I
~
150~+-+-4--r-r-+-+-;
loo~~~~~~~U
-50
50
100
150
CoUT=IOpF
1o=10mA
~ D.D2 VIN=14V
~~ D.04
10
'iD'
z
0
~
~
Y
iil
1ll-lJ.06
!:!i~
17
~~
14
a;
E
II
-2
o.oIl.20AQ6Q61Dl.21A
-10 0
10
Load Transient Response
~~ D.04
!i!~
s~
0
~-D.02
-D.04
-IJ.06
J
1\
\
G
I
/
(
211
10
0
50
20
30
60
60
1\
\ I
40
~
30
20
1
10
LL
40
50
60
lIME(p.)
1.0
3.0
2.0
INPUT VOLTAGE(V)
lk
10k lOOk
1M
Output Impedance
I
VIN =14V,
1o=30mA
CoUT=10pF
L
4.0
100
FREQUENCY (Hz)
/
1.0
10
II
VIN =14V
lo=10mA
10D
IO=10mA
TJ=25OC
1 «l
30
~i
40
30
200 250
150
50
Low Voltage Behavior
5.0
CoUT=IOpF
0D2
20
100
70 CoUT=10pF
INPUT VOLTAGE (V)
lIME(m.)
IJ.06
50
Ripple Rejection
80
RL =5004
T=25'C
0
-0,04
1
OUTPUT CURRENT(mA)
Output at
Voltage Extremes
12
si
~-D.02
0
J
1
o
o
JUNCTION TEMPERATURE(OC)
IJ.06
!i!1!J
./
L
5Or-r-t-+-+-+-+-~~
Line Transient Response
g
)
O~~~~~~~~~
510152O~
T,=25'C
VIN =14V
]:200H--+-+-+-+-+--t--I
INPUT VOLTAGE (V)
...
Current limit
7
5.0
0. 1
1
10
100
lk
,
n
r-
10k lOOk
1M
FREQUENCY (Hz)
TL/H/9759-4
Applications Information
Unlike other PNP low dropout regulators, the LM2936 remains fully operational to 40V. Owing to power dissipation
characteristics of the TO-92 package, full output current
cannot be guaranteed for all combinations of ambient temperature and input voltage. As an example, consider an
LM2936 operating at 25'C ambient. Using the formula for
maximum allowable power dissipation given in Note 3, we
find that PO max = 641 mW at 25'C. Including the small
contribution of the quiescent current to total power dissipation the maximum input voltage (while still delivering 50 mA
output current) is 17.3V. The device will go into thermal
shutdown if it attempts to deliver full output current with an
input voltage of more than 17.3V. Similarly, at 40V input and
25'C ambient the LM2936 can deliver 18 mA maximum.
Under conditions of higher ambient temperatures, the voltage and current calculated in the previous examples will
drop. For instance, at the maximum ambient of 125'C the
LM2936 can only dissipate 128 mW, limiting the input voltage to 7.34V for a 50 mA load, or 3.5 mA output current for
a40Vinput.
While the LM2936 maintains regulation to 60V, it will not
withstand a short circuit above 40V because of safe operating area limitations in the internal PNP pass device. Above
60V the LM2936 will break down with catastrophic effects
on the regulator and possibly the load as well. Do not use
this device in a design where the input operating voltage
may excee::! 40V, or where transients are likely to exceed
60V.
1-237
LM2936
m
.Q
-,
0;>'
049-1
'I
~
r--
C
I
~
04
::::::..
c..
051
~23
~ 052
.......
Z2
01
~
CD
02
~~11
<..
""""
R3
09
+
-
'I:
~
R6
....
"r
O~
It ~
038
039
.....
~$l~""
i"
cc
SiJ
R19
C1
r-
07~:R13
~
08
C:;"
c
~
044
~35
028
017
~
O~
3
037
025
02;.t
t-!!,15
053t
-I
R15
036
R5
055 -I
~
R11
>--
03
"'1*'048
R12
R4
2
~
::sCD
3D)
~47
_L
~
t
04
o~
::s
e(')n
- :r
0-~
-
l..S"
I*'~F
..... 020
:c:"
D)
CD
~46
I
~. J,~
""-
R7
050 ~
t
r
~
I
~43
~R18
~
R8
1
3
O~
~3
IGNol
*
~7
R2
Il~r
R10
......
Y:
R14
O~ .....;.,042
0401~~)
R16
R17
TL/H/9759-5
r-------------------------------------------------------------------------, r
3:
~National
N
CD
~
~ Semiconductor
o
LM2940 1A Low Dropout Regulator
General Description
Features
The LM2940 positive voltage regulator features the ability to
source 1A of output current with a dropout voltage of typically 0.5V and a maximum of 1V over the entire temperature
range. Futhermore, a quiescent current reduction Circuit has
been included which reduces the ground current when the
differential between the input voltage and the output voltage
exceeds approximately 3V. The quiescent current with 1A of
output current and an input-output differential of 5V is therefore only 30 mA. Higher quiescent currents only exist when
the regulator is in the dropout mode (Vin - You! ,,; 3V).
•
•
•
•
•
•
•
Designed also for vehicular applications, the LM2940 and
all regulated circuitry are protected from reverse battery installations or 2 battery jumps. During line transients, such as
load dump (60V) when the input voltage can momentarily
exceed the specified maximum operating voltage, the regulator will automatically shut down to protect both the internal
circuits and the load. The LM2940 cannot be harmed by
temporary mirror-image insertion. Familiar regulator features
such as short circuit and thermal overload protection are
also provided.
LM2940T-5.0
Dropout voltage typically 0.5V @Io = 1A
Output current in excess of 1A
Output voltage trimmed before assembly
Reverse battery protection
Internal short circuit current limit
Mirror image insertion protection
100% electrical burn-in in thermal limit
Output Voltages
LM2940T-B.0
5V
BV
LM2940T-10
10V
For output voltages of 5V, 12V, and 15V, refer to the
LM2940C datasheet.
Equivalent Schematic Diagram
~----~~----------------------------------------------------------~---1--~~.
TUH/BB22-1
Order Number LM2940T-5.0, LM2940T-8.0, LM2940T-10
See NS Package Number T03B
1-239
Absolute Maximum Ratings
Operating Temperature Range (TAl
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage
Survival Voltage ("; 100 ms)
Operational Voltage
Conditions
SV
8V
5 mA"; 10 "; 1A
Line Regulation
Load Regulation
10V
Tested Design
Tested Design
Tested Design
Units
Limit Typ Limit
Limit
Typ Limit
Limit Typ Limit
(Note 2) (Note 3)
(Note 2) (Note 3)
(Note 2) (Note 3)
6.2SV ,,; VIN ,,; 26V
Output Voltage
230'C
ESD susceptibility rating is to be determined
Vo +5V,l o = 1A,Cout = 22,...F, TJ = 25'C unless otherwise specified.
Output Voltage (Vo)
Parameter
- 65'C to + 150'C
Lead Temperature
(Soldering, 10 seconds)
Internally Limited
Electrical Characteristics Yin =
150'C
Storage Temperature Range
60V
26V
Internal Power Dissipation (Note 1)
-40'Cto + 125'C
Maximum Junction Temperature
5.00
4.85
5.15
Vo + 2V,,; Vin"; 26V,
10 = 5mA
20
50
50 mA"; 10 "; 1A
35
50
Output Impedance 100 mADC and 20 mArms
fo = 120Hz
35
< 26V,I o =
4.75
5.25
80
9.4V ,,; VIN ,,; 26V
8.00
7.76
8.24
20
80
55
80
7.60
8.40
130
55
11.SV ,,; VIN ,,; 26V
10.00
9.70
10.30
20
100
65
100
9.50 VMIN
10.50 VMAX
mVMAX
165
mVMAX
mO
65
Quiescent
Current
Vo +2V,,; Yin
5mA 10
15
20
10
15
20
10
15
20
mAMAX
Yin = Vo + 5V,I o = 1A
30
45
60
30
45
60
30
45
60
mAMAX
Output Noise
Voltage
10 Hz - 100 kHz
10 = 5mA
150
Ripple Rejection
fo = 120 Hz, 1 Vrms;
II = 100mA
Long Term
Stability
Dropout Voltage
60
54
66
300
54
48
32
20
63
""VRMS
51
45
dBMIN
mVl
1000 Hr
36
10 = 1A
0.5
0.8
1.0
0.5
0.8
1.0
0.5
0.8
1.0
VMAX
10 = 100mA
110
150
200
110
150
200
110
150
200
mVMAX
1.9
1.6
1.9
1.6
1.9
1.6
Short Circuit
Current
Maximum Line
Transient
72
240
Ro=1000
T,,; 100ms
Maximum
Operational Input
Voltage
Reverse Polarity
Input Voltage DC
Ro = 1000
Reverse Polarity
Input Voltege
Transient
T,,; 100 ms, Ro = 1000
Vo"; 6V
Vo
< 9V
Vo
AMIN
< 11V
75
60
60
75
60
60
75
60
60
31
26
26
31
26
26
31
26
26
Vdc
-30
-15
-15
-30
-15
-15
-30
-15
-15
VMIN
-75
-50
-50
-75
-50
-50
-75
-50
-50
VMIN
VMIN
Note 1: Thermal resistance wHhout a heatslnk for junction·to-case temperal1Jre is 3'C/W. Thermal resistance cas...to-amblentls 50'C/W.
Note 2: Tested UmHs are guarantaed and 100% production tested.
Note 3: Design UmHs are guaranteed (but not 100% production tested) over the operating temperal1Jre and supply voltage range. These limits are not used to
calculate outgoing quality levels.
1·240
Typical Performance Characteristics
Dropout Voltage
0.9
~
0.8
~
0.7
;
5
TJ =25OC
~
w
co
0.5
,;'
D.4
0.3
!1;
0.2
!l;
0.1
~
~
".
o/
o
-
0.1
200
600
<100
800
o
1000
hi
~
... 1-"
r-
D.4
0.3
0.2
/"'"
~
lA
I ...
~
0
0.8
0.7
0.6
0.5
-40
~
5
5oo.!!!!1-1-"
~
I
100mA
40
OUTPUT CURRENT (rnA)
Output Voltage
vs Temperature
5.10
0.9
0.6
5
Dropout Voltage
vs Temperature
1.0
80
120
5.08
5.06
5.D4
5.02
5.00
... --
I-r-
4.98
4.96
4.94
4.92
4.90
-40
160
40
TEMPERATURE (OC)
80
120
160
TEMPERATURE (OC)
Quiescent Current
so vs Temperature
1
§
1
40
I
i
30
1A
"'" "'"
i3
~
gj
20
5
10
~
500 rnA
lOrnA
a
I
I
o
-40
40
Quiescent Current
200
180
r-r- riIN=,O+5v
160
140
120
r lOOrnA
60
40
~~
5;
s~
0°
1\
~§
slil
o
10
30
CJ.s)
40
so
60
0.5
r+- _
1-1- _
0.2 r-r- 1-1- 0.4
0.3
0.1
I
0.20
0
o.os
-°1.5.0
a
0.5
o
-10
2
~
10
FREQUENCY (Hz)
1M
1.0
= 22 )IF-t-Hll-HtIlllH-HllIf-H1111i1
8S Caur
10= lOrnA
Vo=5V
75
§
iJ
'"
i
8S
55
45
20
30
40
1
CJ.s)
INFINITE HEAT SINK
10
100
Ik
10k lOOk 1M
FREQUENCY (Hz)
Peak Output Current
3.0
to...
....
I-
2
10k lOOk
0.8
35
o
o
lk
0.6
Ripple Rejection
.
0.01
100
0.4
95 Y,N = 10VUlI.
~~~
-0.2
-0.3
-0.4
0.02
10
0.2
LOAD CURRENT (A)
V,N =14V
1O"C/W HEAT SINK
-;....L.I
No..
1
o
35
Maximum Power
Dissipation (TO-220)
0.50
0.10
5
30
z
22
20
18
16
14
12
10
Y,N -1 OV. III~
5.00 Caur=22)1F
Ig =50 rnA
2.00
Vo=5V
1.00
5
25
....
0
Output Impedance
Ij
V,N =10V
Caur=22)1F
TJ =2SOC
Vo=5V
TIME
10.00
s:
15. 20
-o.~
g
!iliS
9a:::
20
_r-
Load Transient Response
~s:~oz
TIME
10
INPUT VOLTAGE (V)
w
10
a
o
o
Line Transient Response
30
20
10
0
-10
-20
-30
-r-7"
20
~
r500rnA
lA
X
TEMPERATURE (OC)
l!:s;~..s
V,N =14V - 1 - Vo=5V
TJ =25OC
30
~
o
160
40
i3
20
80
1
§
"\
120
100
80
Quiescent Current
so
1.0
NO HEAT SINK
10 20 30 40 50 60 70 80 90 100
AMBIENT TEMPERATURE (OC)
D
-40
40
80
120
16D
TEMPERATURE (OC)
TL/H/8822-4
o r----------------------------------------------------------------------------,
..,.
ro
Typical Performance Characteristics
(Continued)
:2
..J
5.0
~ 4.0
Low Voltage Behavior
10 lA
TJ = 25'C
Vo = 5V
,J
1lI
13
S!
,J
3.0
/
~ 10
/
2.0
1.0
1.0
2.0
10
18
~
w
,
>~
>:0
'"
I
3.0
4.0
5.0
INPUT VOLTAGE (VI
6.0
~
o
'"
o
4 6 B 10 1Z
INPUT VOLTAGE (VI
14
I
~
w
'"
~
'"
>
I
1
~
:0
'"
'I'"
-2
10
20
30
40
12
15
INPUT VOLTAGE (VI
20
18
Rl=IJon
Vo=10V
15
10
...>->:0
:0
'"
I
1/
-5
-4
0
-30 -20 -10 0 10 20
INPUT VOLTAGE (VI
INPUT VOLTAGE (V)
L
25
RL 1=loJn
Vo=BV
12
w
'"cr:
!::;
c:>
>
>-
o
1
Output at
Voltage Extremes
20
16
~
-30-20-10
/
...~
~
Output at
Voltage Extremes
RL=10DIJ
Vo=5V
10 ~ lA'
TJ - 25'C
Vo = 10V
15
!::;
c:>
>
>:0
/
o
Low Voltage Behavior
12
1lI
cr:
'"~
'">
Output at
Voltage Extremes
12
,
10'= 1~
TJ =: 25'C
Vo = BV
12
/
~
>-
~
g
14 Low Voltage Behavior
30
40
-30 -20 -10 0 10 20 30
INPUT VOLTAGE (VI
40
TLlH/8822-5
Output CapaCitor ESR
100
=
=
COUT 22JLF
Yo 5Y10
-"
~""
~,",,'<
'"""
,,",,
"-
.....
~
~::>
S
0.01
STABLE
REGION -
~'\
0.1
"
~,
o
,,",,,",,'
200
,"
400
"'""~
~
"
600
800
,""
1000
OUTPUT CURRENT (mA)
TL/H/8822-6
Typical Application
Connection Diagram
!I
(TO-220) Plastic Package
UNREGULATED
VINfT
LM2940
I V o U REGULATED
T
INPUT
OUTPUT
Cl·
.47 PF
I
':"
10
':"
+ CoUT""
22pF
':"
TL/H/8822-3
"'Required if regulator is located far from power supply fitter.
··COUT must be at least 22 MoF to maintain stability. May be increased without bound to maintain regulation during transients. Locate as close as possible to the regulator. This capaCitor must be rated over the same operating
temperature range as the regulator and the ESR is critical; see curve.
TL/H/8822-2
Front View
Order Number LM2940T-5.0, LM2940T-S.O, LM2940T-10
See NS Package Number T03B
1-242
.-------------------------------------------------------~r
i:
I\)
Definition of Terms
Dropout Voltage: The input-output voltage differential at
which the circuit ceases to regulate against further reduction in input voltage. Measured when the output voltage has
dropped 100 mV from the nominal value obtained at (Vo +
5V) input, dropout voltage is dependent upon load current
and junction temperature.
Input Voltage: The DC voltage applied to the input terminals with respect to ground.
Load Regulation: The change in output voltage for a
change in load current at constant chip temperature.
Long Term Stability: Output voltage stability under accelerated life-test conditions after 1000 hours with maximum
rated voltage and junction temperature.
Output Noise Voltage: The rms AC voltage at the output,
with constant load and no input ripple, measured over a
specified frequency range.
Input-Output Differential: The voltage difference between
the unregulated input voltage and the regulated output voltage for which the regulator will operate.
Quiescent Current: That part of the positive input current
that does not contribute to the positive load current. The
regulator ground lead current.
Line Regulation: The change in output voltage for a
change in the input voltage. The measurement Is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected.
Ripple ReJection: The ratio of the peak-to-peak input ripple
voltage to the peak-to-peak output ripple voltage.
CD
~
Temperature Stability of Vo: The percentange change in
output voltage for a thermal variation from room temperature to either temperature extreme.
•
1-243
~National
~ Semiconductor
LM2940C 1A Low Dropout Regulator
General Description
The LM2940C positive voltage regulator features the ability
to source 1A of output current with an input-output differential of typically 0.5V and a maximum of 1V over the entire
temperature range. Familiar regulator features such as internal current limit and thermal overload protection are also
provided. Furthermore, a quiescent current reduction circuit
has been added which reduces the ground current when the
differential between the input voltage and the output voltage
exceeds approximately 3V. The quiescent current with 1A of
output current and an input-output differential of 5V is therefore only 30 mAo Higher quiescent currents only exist when
the regulator is in the dropout mode (VIN - VOUT " 3V).
The low dropout voltage coupled with the high output current capability make the LM2940C useful in applications
where the input voltage is maintained at a level within one or
two volts of the output voltage to reduce power dissipation
and increase overall system efficiency.
The LM2940C is particularly suited for applications where
battery life and reverse installation of batteries is a concern.
For automotive temperature range (- 40'C to
plications, refer to the LM2940 datasheet.
+ 125°C) ap•
Features
•
•
•
•
•
•
•
Dropout voltage typically 0.5V @ 10 = 1A
Output current in excess of 1A
Output voltage trimmed before assembly
Reverse battery protection
Internal short circuit current limit
Mirror image insertion protection
100% electrical burn-in in thermal limit
Output Voltages
LM2940CT-5.0
5V
LM2940CT-12
12V
LM2940CT-15
15V
For output voltages of 5V, BV, and 10V, refer to the LM2940
datasheet.
Equivalent Schematic
r----t----------------------------.......p--"t--l.J v"
.--__+...;:::.....+--I---.....--+-H.....r:lVOUT
~-1_--_~~--~~~---~--~--~--_+--~~--~--~~.JGND
TL/H/6158-1
TO-220 3-Lead PlastiC Package
0 I ~~::::T
IL........Jl-.II
Front View
1-244
Order Number LM2940CT-5,O,
LM2940CT·12, and LM2940CT·15
See NS Package T03B
TL/H/6158-4
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage
Survival Voltage (';; 1 ms)
Operational Voltage
Vo
Output Voltage (VO)
Parameter
+ 5V, 10 =
2000V
1A, COUT = 22 fLF, Tj = 25'C, unless otherwise specified.
12V
5.00
VMIN
VMAX
Line Regulation
Vo + 2V ,;; VIN ,;; 26V,
10 = 5mA
Load Regulation
50 rnA ,;; 10';; 1A
Output Impedance
100 mADC and 20 mArms
35
fo = 120 Hz
4.85
5.15
4.75
5.25
6.25V ,;; VIN ,;; 26V
Vo + 2V ,;; VIN ,;; 26V,
10 = 5 rnA
+ 5V, 10
= 1A
Output Noise
Voltage
10 Hz-100 kHz
10 = 5 rnA
Ripple Rejection
fo = 120 Hz, 1 Vrms,
10 = 100 rnA
12.00
11.64
12.36
11.40
12.60
13.6V ,;; VIN ,;; 26V
15.00
14.55
15.45
14.25
15.75
16.75V ,;; VIN ,;; 26V
20
50
20
120
20
150
mVMAX
35
50
55
120
70
150
mVMAX
80
10
15
30
45
60
150
Long Term
Stability
15V
Units
5 rnA,;; 10';; 1A
VIN = Vo
260'C
ESD Susceptability (Note 5)
Tested Design
Tested Design
Tested Design
Typ Limit
Limit
Limit Typ
Limit Typ
Limit
Limit
(Note 2) (Note 3)
(Note 2) (Note 3)
(Note 2) (Note 3)
Output Voltage
Quiescent
Current
+ 150'C
Lead Temperature
(Soldering, 10 seconds)
5V
Conditions
- 65'C to
150'C
Storage Temperature Range
Internally limited
Electrical Characteristics VIN =
+ 125'C
Maximum Junction Temperature
45V
26V
Internal Power Dissipation (Note 1)
O'C to
Operating Temp. Range (TA)
100
10
15
30
45
60
360
72
60
66
20
mO
10
15
SO
45
mAMAX
60
450
54
64
48
mAMAX
fLVrms
dBmin
52
mV/1000Hr
60
10= 1A
0.5
0.8
1.0
0.5
0.8
1.0
0.5
0.8
1.0
VMAX
10 = 100 rnA
110
150
200
110
150
200
110
150
200
mVMAX
Short Circuit
Current
VINMAX = 26V
(Note 4)
1.9
1.6
1.9
1.6
1.9
1.6
Maximum Line
Transient
RL = 1000, T ,;; 1 ms
55
45
55
Dropout Voltage
Vo
< 6V
Reverse Polarity
DC Input Voltage
RL = 1000, Vo ;;, -0.6V -30
-15
Reverse Polarity,
Transient
Input Voltage
T ,;; 1 ms, RL = 1000
-55
-45
45
Vo
-45
<
-30
-15
-55
-45
55
45
Vo
13V
-45
AMIN
<
-30
-15
-55
-45
VMIN
16V
VMIN
-45
VMIN
Note 1: Thermal resistance without a heat sink for iunction~to·case temperature is 3°C/W. Thermal resistance case-ta-ambient is 50"C/W.
Note 2: Tested Limits are guaranteed and 100% production tested.
Note 3: Design Limits are guaranteed (but not 100% production tested) over the operating temperature and supply voltage range. These limits are not used to
calculate outgoing quality levels.
Note 4: Output current will decrease with increasing temperature, but will not go below 1A at the maximum specified temperature.
Note 5: Human body model, 100 pF discharged through a 1.5 kl1 resistor.
Typical Application
·Required if regulator is located far from power supply filter.
VIN
UNREGULATED
INPUT
C,·
.47 11F
VOUT
LM294DC
1
llQ
I
··COUT must be at least 22 JJ-F to maintain stability. May be increased without bound to maintain regulation during transients. Locate as close as possible to the regulator. This capaCitor must be rated over the Same operating
temperature range as the regulator. The equivalent series resistance (ESR)
of this capacitor is critical; see curve.
REGULATED
OUTPUT
+
Couru
2211F
'::'
TL/H/6158-2
1-245
II
or---------------------------------------------------------------~
i
Typical Performance Characteristics
:l
Output Impedance
Quiescent Current
ID.OO
5.011
~
~~~~~+4~+1
i»
B
SI.OO
1
;~a::t4~tjl::t~
'·011
0.50
!! D.2D
~~4-~~~~-4
g
§ II~-H-H
i
0.10
.0"",,,,"'1"4-~~4-H-4
i
0.01
o~-L~~~~~-J
D.01
35
0I120AQ.lQl1.0
•
.0
'011
Maximum Power
Dissipation (TO·220)
1&
!
.4
.2
•i •
'0
I
1
10k .00k .M
ID
1011
lk
lDk 10Dk 1M
FREDUEIICY (Hz)
Line Transient Response
Dropout Voltage
IE
IIF1111E HUT SINK
••
E
.k
FREQUEIICY (Hzl
LOAD CURROO' (AI
22
20
0.05
0.1 r=--"::::rT""r-T""1""T"T""t
O.B TJ _25·C
I::~
H-+++-H-++t--i
~
1-++-+-+-,...1-7'19--+-1
0.5 H-+++-H-+++",,~
.. 0.4 H-+-+-+-H-+-u.~
a
'l1'C/w HrAT SIlK
"IooJ
0.3
~ 0.2
"'IooJ.
NOHrAT_
• D.'
EEttl:rffiH;ftj
,20
o
o
o '0203O~!OlOlIIlOlO100
110 '30
"
o
40D
2IQ
BOD
BOD
, ODD
OUTPUT CURRENT (MI
AllIllltT1EIIP£IIAT1II£('c1
Output Capacitor ESR
Quiescent Current
Load Transient Response
0.5
u
; _ 0.3
C!:.
0.2
III D.l
I;; -D.~
II
§i1ij-D.2
I-
YIN
eo.,
20D
.10
DY
I22,.,
I- T. H·C
I- ¥omSV
!
ii3
-0.3
1:11
-0.4
I
g-;::
!I
0.5
II
10
2D
TIME",,)
3D
40
'10
140
120
1011
10
10
4D
20
0
0
,.
rlOOIllA
5
10
.5
r 50DIIIA
20
25
30
15
IllPUTYDLTIG[M
TL/H/6158-3
1·246
Typical Performance Characteristics
Low Voltage Behavior
5.0
E
4.0
10
lA
TJ = 25'C
Vo = 5V
Low Voltage Behavior
14
j/
~
~ 3.0
....
co 2.0
1.0
2.0
....
~
::0
o
4.0
5.0
6.0
10
Output at
Voltage Extremes
co
>
!i!
/
::0
co
I
o
8
10
12
14
o
12
15
18
Output at
Voltage Extremes
RL1=loJn
Vo=12V
.
E
w
co
>
....
20
R!=IJon
:-- Vo=15V
15
If
-30 -20 -10 0
10
10
J
1/
~
::0
co
-4
~
9
25
I
I
~
co
::0
~
6
!;i
>
....
::0
I
3
INPUT VOLTAGE (VI
12
!:i
co
w
/
::0
Output at
Voltage Extremes
16
0 ro
INPUT VOLTAGE (VI
/
...........
20
RL=100n
Vo=5V
-~-w-ro
/
/
4
/
12
INPUT VOLTAGE (VI
E
w
-2
o
10 ~ lA I
TJ = 25'C
Vo = 15V
15
!;i
/
INPUT VOI1AGE (VI
12
,
co
3.0
.
E
w
/
!:;
co
>
I
1.0
/
!i!
jV
~
::0
1~
10
Low Voltage Behavior
18
10 1=
TJ = 25'C
Vo = 12V
12
E
w
jV
ll!
(Continued)
20
INPUT VOLTAGE (VI
30
40
-5
-30
-w -10
0
10
20
30
40
INPUT VOLTAGE (VI
TL/H/615B-5
1·247
.'11:1'
G)
N
.------------------------------------------------------------------------------------,
~National
:::il
....
~ Semiconductor
LM2941 1A Low Dropout Adjustable Regulator
General Description
The LM2941 positive voltage regulator features the ability to
source 1A of output current with a typical dropout voltage of
0.5V and a maximum of 1V over the entire temperature
range. Furthermore, a quiescent current reduction circuit
has been included which reduces the ground pin current
when the differential between the input voltage and the output voltage exceeds approximately 3V. The quiescent current with 1A of output current and an input-output differential of 5V is therefore only 30 mAo Higher quiescent currents
only exist when the regulator is in the dropout mode (Y,N VOUT"; 3V).
Designed also for vehicular applications, the LM2941 and
all regulated circuitry are protected from reverse battery installations or two-battery jumps. During line transients, such
as load dump (60V) when the input voltage can momentarily
exceed the specified maximum operating voltage, the regu-
lator will automatically shut down to protect both the internal
circuits and the load. Familiar regulator features such as
short circuit and thermal overload protection are also provided.
Features
•
•
•
•
•
•
•
•
•
Output voltage adjustable from 5V to 20V
Dropout voltage typically 0.5V @ 10 = 1A
Output current in excess of 1A
Trimmed reference voltage
Reverse battery protection
Internal short circuit current limit
Mirror image insertion protection
100% electrical burn-in in thermal limit
TTL, CMOS compatible ON/OFF switch
Equivalent Schematic and Connection Diagram
. - - - - -.....- - - - - - - - - - - - - - - - - - - - - - - - - - _ -.......-IDVIN
H--t-"--+--+---+-lJADJ
L-~~-~~~-~~~-~~-~--~-~-~~-~~-+_~GND
L-----------------IDDN/OFF
TL/H/8823-1
(TO-220)
PlastiC Package
TL/H/8823-2
Front View
Order Number LM2941T
See NS Package Number T05A
1-248
Absolute Maximum Ratings
-40'Cto +125'C
Operating Temperature Range (TAl
Maximum Junction Temperature
150'C
-65'C to + 150'C
Storage Temperature Range
Lead Temperature
260'C
(Soldering, 10 seconds)
ESD susceptibility rating is to be determined.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage
Survival Voltage (:S: 100 ms)
60V
Operational Voltage
26V
Internal Power Dissipation (Note 1)
Internally limited
Electrical Characteristics
5V :s: Vo :s: 20V, VIN = Vo + 5V, Co = 22 ,...F, TJ = 25'C (unless otherwise specified)
Parameter
Conditions
Typ
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
(Limits)
1.275
1.237
1.313
1.211
1.339
V(min)
V(max)
Reference Voltage
5 mA :s: 10 :s: 1A, (Note 4)
Line Regulation
Vo + 2V :s: VIN :s: 26V, 10 = 5 mA
4
10
Load Regulation
50mA:s: 10:S: 1A
7
10
Output Impedance
100 mADC and 20 mArms
fo = 120 Hz
7
Quiescent Current
Vo + 2V :s: VIN
< 26V, 10 = 5 mA
VIN = Vo + 5V, 10 = 1A
mOIV
10
15
20
mA(max)
45
60
mA(max)
10 Hz-100 kHz
10=5mA
0.003
Ripple Rejection
to
0.005
Long Term Stability
mVIV(max)
30
RMS Output Noise,
% ofVOUT
= 120 Hz, 1 Vrms, IL = 100 mA
mVIV(max)
16
%
0.02
0.04
%1V(max)
%/1000 Hr
0.4
10 = 1A
0.5
0.8
1.0
V(max)
10 = 100mA
110
200
200
mV(max)
Short Circuit Current
VIN max = 26V (Note 5)
1.9
1.6
Maximum Line
Transient
Vo max 1V above nominal Vo
Ro = 1000, T :s: 100 ms
75
60
60
V(min)
31
26
26
Voo
-30
-15
-15
V(min)
-75
-50
-50
V(min)
1.30
0.80
0.80
V(max)
1.30
2.00
2.00
V(min)
Dropout Voltage
Maximum Operational
Input Voltage
Reverse Polarity
DC Input Voltage
Ro = 1000, Vo ;;, -0.6V
Reverse Polarity
Transient Input Voltage
T:S: 100 ms, Ro = 1000
ON/OFF
Threshold Voltage
ON
10:S: 1A
ON/OFF
Threshold Voltage
OFF
10:S: 1A
A(min)
ON/OFF
VON/OFF = 2.0V,
100
300
",A(max)
50
Threshold Current
10:S: 1A
Note 1: The maximum power dissipation is a function of TJ(max), 6JA, and TA. The maximum allowable power dissipation at any ambient temperature is
Po = (TJ(max) - TAl/6JA. If this dissipation is exceeded, the die temperature will rise above t50"0 and the LM2941 will go into thermal shutdown. For the
LM2941 , the junction·to-ambient thermal resistance Is 53"C/W, and the iunclion·to-case thermal resistance is 3'C/W.
Note 2: Tested Umits are guaranteed and 100% production tested.
Note 3: Design Limits are guaranteed (but not 100% production tested) over the operating temperature and supply voltage range. These limits are not used to
calculate outgoing quality levels.
Note 4: The output voltage range is 5V to 20V and is determined by the two external resistors, Rl and R2. See Typical Application Circuit.
Note 5: Output current will decrease with increasing temperature, but will not go below 1A at the maximum specified temperatures.
1·249
Typical Performance Characteristics
Dropout Voltage vs
Temperature
Dropout Voltage
0.9
£
0.8
~
0.7
~
is
5
0.4
~
0.2
~
£
0.5
5
'"
TJ =25OC
0.6
0.3
~
~
oV
o
0.8
0.7
0.6
0.5
0100
600
800
-I-
I
o
-010
1000
010
!
....
I~
-I5DOmA
--
I-
o
-010
0
010
I"j'
,.<>gj
10mA
I
I
80
120
200
180
160
1010
120
100
80
60
010
20
~..s
"
n
'"
~£
oz
S~
g10.2
0.1
5", -o.~
'"
,
~~
20
30
010
50
60
l'A I
-~
r5DOmA
A
0
5
10
15
20
25
30
35
2.DO '0=50 mA-;;,.-+H!II~.Hl!III-HI!IIII
Vo=5V
I:j
1.00
~
0.50
;!
D.2O
5
0.10
'"
D.05
5
0
.!1N=10V
- - r- - r-- COur = 22 "F
- ' - r- TJ =25OC
-,-- r-- VO=5V
0.6
0.8
1.0
LOAD CURRENT (A)
Ripple Rejection
95
7-~
VIN=I~'!.lft~
COur=22"F
!
%
Ei'"
iil
i
1.0
D.5
o
004
0.2
85 '0= 10mA
VO=5V
75
85
55
45
35
-10
10
20
010
1
10
TIME ",.)
~ ~;~~:~~~~~~~
'"
r'DOmA
22
20
18
16
14
12
10
lk
100
10k lOOk 1M
FREQUENCY (Hz)
Maximum Power
Dissipation (To-220)
Output Impedance
S
r----
r--,
./
TIME (PO)
10.00 nr'=-rIII7'1III'"TT1TImrTlTIIII"'mmurTmrno
160
I-'"
-0.2
-0.3
"'i
3V
120
V,N = 14V
Vo=5V
TJ =25OC
Load Transient Response
0.5
80
Quiescent Current
50
INPUT VOLTAGE (V)
Vo-~ r--
10
010
"\
o
o
160
II
-10 0
-010
TEMPERATURE (OC)
-0.4
'C' -0.5
at
....
01.98
01.96
01.94
01.92
01.90
VO=5V
Line Transient Response
30
20
10
0
-10
-20
-30
-- -
5,02
5.00
160
I
TEMPERATURE (OC)
~S
120
- - Vo=5V
Quiescent Current
VIN =14V
Vo=5V
IA
80
5.10
5.D8
5.D6
5.D4
TEMPERATURE (OC)
Quiescent Current vs
Temperature
r--r--
"'
100mA
OUTPUT CURRENT (mA)
50
- .... -
~
500m
0.1
200
...
~
~
>
IA
....
-
0.4
0.3
0.2
[;o'fo""
0.1
Output Voltage
1.0
0.9
INFINITE HEAT SINK
Peak Output Current
3.D
v,~=i4V
.... Vo=5V
2.D
....
1O"C/W HEAT SINK
1.0
-;....J
-+-...
NO HEAT SINK
0.D2
o
0.01
I
10
100
lk
10k lOOk 1M
FREQUENCY (Hz)
o 10 20 30 010 50 60 70 80 90 100
AMBIENT TEMPERATURE(OC)
o
-010
0
010
80
120
160
TEMPERATURE (OC)
TL/H/8823-4
1·250
Typical Performance Characteristics
5.0
~ 4.0
Low Voltage Behavior
'0
~ lA
TJ = 2S'C
Vo ~ SV
"IV
V
/
w
'"~
:;
!
18
3.0
w
'"""
1.0
1.0
2.0
I
TJ = 25'C
Vo = 15V
tj
~
1/
12
IL
/
~
I
3.0
4.0
5.0
INPUT VOLTAGE (VI
12
10
6.0
25
Rl=100n
Vo=5V
20
~
'"w
'"
~
...'"
w
~
!:l
:;
I
~
I
r;! "
STA8LE
REGION
0.,~
o
18
200
lOO
I
I
600
800
,
,
1000
OUTPUT CURRENT (mA)
Output at
Voltage Extremes
Output at
Voltage Extremes
c
1
S 0.01
6
12
15
INPUT VOLTAGE (VI
...
COUT =22!'f
Vo=5V
10
~
~
~
Output Capacitor ESR
100
~
/
""
g
I
s:
'0 ~ lA
...=>~
/V
2.0
Low Voltage Behavior
15
~
(Continued)
15
10
~
V
)
If
c
i"'"
-2
R~=1010n
I- Vo =15V
-5
-30 -20 -10
0
10
20
30
40
-30 -20 -10 0 10 20
INPUT VOLTAGE (VI
INPUT VOLTAGE (VI
30
40
TL/H/8823-5
Definition of Terms
Dropout Voltage: The input-voltage differential at which
the circuit ceases to regulate against further reduction in
input voltage. Measured when the output voltage has
dropped 100 mV from the nominal value obtained at (VOUT
+ 5V) input, dropout voltage is dependent upon load current and junction temperature.
Input Voltage: The DC voltage applied to the input terminals with respect to ground.
Input-Output Differential: The voltage difference between
the unregulated input voltage and the regulated output voltage for which the regulator will operate.
Line Regulation: The change in output voltage for a
change in the input voltage. The measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected.
Load Regulation: The change in output voltage for a
change in load current at constant chip temperature.
Long Term Stability: Output voltage stability under accelerated life-test conditions after 1000 hours with maximum
rated voltage and junction temperature.
Output Noise Voltage: The rms AC voltage at the output,
with constant load and no input ripple, measured over a
specified frequency range.
Quiescent Current: That part of the positive input current
that does not contribute to the positive load current. The
regulator ground lead current.
Ripple Rejection: The ratio of the peak-to-peak input ripple
voltage to the peak-to-peak output ripple voltage.
Temperature Stability of Vo: The percentage change in
output voltage for a thermal variation from room temperature to either temperature extreme.
1-251
~ r-----------------------------------------------------------------------------------~
~ Typical Applications
:5
5V to 20V Adjustable Regulator
-
orr
tON/orr
...- -...-o 5V
Yourto 20V
r--..&;:;IN~,2.!!ll...._
OUT
~
@IA
R2
LM2941
ADJ
ON
Rl
GND
TLlH/8823-3
VOUT
= Reference voltage x
Solving for R2: R2 = R1
Rl + R2
--R-1-- where VREF = 1.275 typical
C~~F
-
1)
Note: Using 1k for R1 will ensure that the Input bias current error of the
adjust pin will be negligible. Do not bypass R1 or R2. This will lead to Instabll·
lties.
'Required If regulator Is located far from power supply fllter.
"CoUT must be at least 22 fLF to maintain stability. May be Increased with·
out bound to maintain regulation during transients. Locate as close as possl·
ble to the regulator. This capacitor must be rated oyer the same operating
temperature range as the regulator and the ESR Is critical; see curve.
1ASwitch
liN
R3
33ka"·
OUT
ON/orr
l
orr
51
1 ~~IN4001 II~I
LM2941
~p.r
--
ON
J!ND
-==
- J.~I
LOAD
~DJ
TL/H/8823-8
"'To assure shutdown, select Resistor R3 to guarantee a11east 300 fLA of pull·up current when S1 Is open. (Assume 2V at the ON/OFF pin.)
1-252
,-------------------------------------------------------------------------,
~National
~
!!:
N
....,..
CD
~ Semiconductor
o
LM2941 C 1A Low Dropout Adjustable Regulator
General Description
The LM2941 C positive voltage regulator features the ability
to source 1A of output current with a typical dropout voltage
of 0.5V and a maximum of 1V over the entire temperature
range. Furthermore, a quiescent current reduction circuit
has been included which reduces the ground pin current
when the differential between the input voltage and the output voltage exceeds approximately 3V. The quiescent current with 1A of output current and an input-output differential of 5V is therefore only 30 mAo Higher quiescent currents
only exist when the regulator is in the dropout mode
(VIN - VOUT :;;: 3V).
Low dropout voltage, coupled with 1A current capability,
makes the LM2941 C useful in applications where the input
voltage is maintained at a level within one or two volts of the
output voltage. Operation at these low input-output voltage
differentials reduces regulator power dissipation and increases overall system efficiency.
The LM2941 C can be used to provide on-board regulation
and post-switcher regulation. Other applications include
'
fault protected 1A switches.
Features
•
•
•
•
•
•
•
•
•
Output voltage adjustable from 5V to 20V
Dropout voltage typically 0.5V @ 10 = 1A
Output current in excess of 1A
Trimmed refe'rence voltage
Reverse battery protection
Internal short circuit current limit
Mirror image insertion protection
100% electrical burn-in in thermal limit
TTL, CMOS compatible ON/OFF switch
Equivalent Schematic and Connection Diagram
.---......-----------------------"""1-..,....,UV'N
.--..,.--1--'''-+--f---..,...-+_+6-[J Vou, ,
H--+w..-f---+--+-o ADJ
L-~~--~4_-~__~--+_~-~--~-~-~~--+--~...,UGND
'------------------I;.JON/OFF
TLlH/10367-1
(TO-220)
Plastic Package
TLlH/10367-2
Front View
Order Number LM2941CT
See NS Package Number T05A
1-253
Absolute Maximum Ratings
Operating Temperature Range (TA>
O"C to
Maximum Junction Temperature
-65·C to
Storage Temperature Range
Lead Temperature
(Soldering, 10 seconds)
ESD susceptibility rating is to be determined.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage
Survival Voltage (~ 100 ms)
45V
Operational Voltage
26V
Intemal Power Dissipation (Note 1)
Intemally limited
+ 125·C
150"C
+ 150·C
260"C
Electrical Characteristics
5V
~
Vo
~
20V, VIN = Vo
+
5V, Co = 22IJ.F, TJ =, 25·C (unless otherwise specified)
Parameter
Conditions
~
10 ~ 1A, (Note 4)
Typ
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
. (Limits)
1.275
1.237
1.313
1.211
1.339
V(min)
V(max)
4
10
mVIV(max)
7
10
mVIV(max)
Reference
Voltage
5 mA
Line Regulation
Vo
Load Regulation
50mA
Output Impedance
100 mADC and 20 mArms
fo=120Hz
Quiescent
Current
Vo
RMS Output Noise,
% ofVOUT
10 Hz-100 kHz
10 = 5mA
0.003
Ripple Rejection
fo = 120 Hz, 1 Vrms,lL ":' 100 mA
0.005
+ 2V ~ VIN
~
10
~
~
26V, 10 = 5 mA
1A
+ 2V ~ VIN < 26V, 10 =
+ 5V, 10 = 1A
5 mA
VIN = Vo
Long Term
Stability
Dropout Voltage
mOIV
7
10
15
30
45
mA(max)
60'
mA(max)
%
0.02
%1V(max)
%/1000 Hr
0.4
10 = 1A
0.5
0.8
1.0
V(max)
10 = 100mA
110
200
200
mV(max)
1.9
1.6
A(min)
55
45
V(min)
31
26
VDC
-30
-15
V(min)
-55
-45
V(min)
1.30
0.80
V(max)
1.30
2.00
V(min)
Short Circuit
Current
VIN max = 26V (Note 5)
Maximum Line
Transient
Vo max 1V above nominal Vo
Ro = 1000, T ~ 100 ms
Maximum
Operational
Input Voltage
Reverse Polarity
DC Input Voltage
Ro = 1000, Vo :2: -0.6V
Reverse Polarity
Transient Input Voltage
T
ON/OFF
Threshold Voltage
ON
10 ~ 1A
ON/OFF
Threshold Voltage
OFF
10 ~ 1A
~
100 ms, Ro = 1000
ON/OFF
VON/OFF = 2.0V
Threshold
50
100
IJ.A(max)
10 ~ 1A
Current
Note 1: The maximum power dissipation Is a function of TJ(max)' 8JAand TA. The maximum allowable power dissipation at any amblent temperature is Po =
(TJ(max) - T..J/8JA· If this dissipation Is exceeded, the die temparature will rise above 150'C and the LM2941C will go Into thermal shutdown. For the LM2941C,
the junction-to-amblent thermal resistance Is 53'C/W, and the Junctlon-to-case thermal resistance is 3'C/W.
Note 2: Tested Limits are guaranteed and 100% production tesled.
Note 3: Design limits are guaranteed (but not 100% production lested) over the operating temperature and supply voltage range. These IIm~s are not used to
calculate outgoing quality levels.
Note 4: The output voltage range is 5V to 20V and is determined by the two extemal resi~tors, R1 and R2. See Typical Application Circuit.
Note 5: Output current will decrease with Increasing temperature, but will not go bel~ 1A at the maximum specified temperatures.
.
1-254
r-
~
N
Typical Performance Characteristics
Dropout Voltage
0.9
~
0.8
I
0.7
~
0.6
t::
!:l
0.5
0.4
~
0.3
[.,0 .....
0.1
oV
o
200
<100
600
0.5
5
0.4
0.3
i
I--'
800
5.10
5,08
-
..-
40
~
i-""
--
I-
10
Iis
~
ill5
10mA
0
I
o
-40
0
40
80
I
120
,
60
40
20
30
r
OZ
0.2
!j':='
-
lu I
r 500mA
15
25
X
5
10
20
30
B
10
20
30
40
VIN = 10V
COI/T=22/AF
TJ =25OC
- f - Vo=5V
0.3
50
60
!
I~
0
2.00
75 Vo=5V
85
55
45
10
30
20
40
1
~!~~ HttIIIHtltmH~HtlIHII
'0 =50 mA~".-HttIIIlf-tlllII-ftllImHtfIllll
Vo=5V
1.00
0.50
0.20
10
100
lk
10k lOOk 1M
FR£OUENCY (Hz)
Maximum Power
Dissipation (TO·220)
INFINITE HEAT SINK
20
1.0
35
-10
22
0.8
cg'ur
E
Output Impedance
0.6
Ripple Rejection
t~t=
1.0
0.5
o
0.4
95 v = 10V, 11m.
= 22 JAF
85 10= 10mA
TIME (pa)
10.00 m-=.,..r-TTITIIII'"Tllmnr-n_'T'TTm
s:
0.2
LOAD CURRENT (A)
!iii
TIME (so.)
5.00
0
35
Q
5!i
9~
io""
......
_r-""
10
-0.3
-10 0
./
20
lOOmA
-I-I-I-
s~ o.~
5o -o.z
-0.1
1/
160
VM=UV
f-r---Vo=5V
TJ =25CC I-r--
40
Load Transient Response
0.5
0.4
120
0
o
!l!~
80
Quiescent Current
50
I
-0,4
~-o.s
ov
40
TEMPERATURE (CC)
INPUT VOLTAGE (V)
VO=~
-20
-30
-40
160
,
Line Transient Response
~~ -1~
120
"\
120
100
80
o
160
30
ol!l
80
Vo=5V
160
140
TEMPERATUR£ (OC)
~! :
4.98
4.96
4.94
Quiescent Current
180
500mA
20
-,...
--
5.02
5.00
4.92
4.90
I
-40
200
-,...
30
~
~O
5.04
TEMPERATURE (OC)
VIN =14V
1 - - Vo=5V
lA
~
100mA
Quiescent Current vs
Temperature
40
u ......
50'l.!!li 1--
OUTPUT CURRENT (mA)
50
~
-1--
0.2
0.1
o
1000
-I- Vo=5V
5.06
0.8
0.7
0.6
~
o
Output Voltage
1.0
0.9
TJ =25OC
0.2
:.....
Dropout Voltage vs
Temperature
Peak Output Current
3.0
VI~=114V
18
1'-0.. Vo=5V
16
14
12
10
2.D
~
0.10
lO"C!W HEAT SINK
-;....L.l
1.0
r-;....
0.05
NO HEAT SINK
o.oz
o
0.01
1
10
100
lk
10k lOOk
FREQUENCY (Hz)
1M
o 10 20 30 40 50 60 70 80 90 100
AMBIENT TEMPERATURE (OC)
40
80
120
160
TEMPERATURE (OC)
TL/H/l0367-3
1-255
•
....
&l
:E
ur-------------------------------------------------~
Typical Performance Characteristics
(Continued)
Low Voltage Behavior
....I
5.0
E
co
,.~
4.0
10 -lA
TJ = 25'C
Vo = &V
~
Low Voltage Behavior
18
V
~V
3.0
l!I 12
~
co
,.
,....
,.e:co
V
~
~
!; 2.0
co
1.0
1.0
2.0
I
o
3.0
4.0
5.0
6.0
INPUT VOLTAGE (V)
Output at
Voltage Extremes
12
10
10,!, lA I
TJ = 26'C
Vo = 16V
15
E
1./
t
o
1./
lL
L
3
6
9 12
15
INPUT VOLTAGE (V)
18
Output at
Voltage Extremes
25
RL=IOO1l
¥o=5V
20
~
~
,
~
r- Rl=I~11
¥o=15V
15
V
10
j
!;
e:
is
5
1/
i"""
-2
-~-H-W
0 W H
~
-5
~
-30 -20 -10 0
INPUT VOLTAGE (V)
10
H
30 40
INPUT VOLTAGE (V) TL/H/l0367-4
Definition of Terms
Dropout Voltage: The input-voltage differential at which
the circuit ceases to regulate against further reduction in
input voltage. Measured when the output voltage has
dropped 100 mV from the nominal value obtained at (VOUT
+ 5V) input, dropout voltage is dependent upon load current and junction temperature.
Input Voltage: The DC voltage applied to the input terminals with respect to ground.
Input.()utput Differential: The voltage difference between
the unregulated input voltage and the regulated output voltage for which the regulator will operate.
Une Regulation: The change in output voltage for a
change in the input voltage. The measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantlyaffected.
Load Regulation: The change in output voltage for a
change in load current at constant chip temperature.
Long Term Stability: Output voltage stability under accelerated life-test conditions after 1000 hours with maximum
rated voltage and junction temperature.
Output Noise Voltage: The rms AC voltage at the outputl
with constant load and no input ripple, measured over a
specified frequency range.
Quiescent Current: That part of the positive input current
that does not contribute to the positive load current. The
regulator ground lead current.
Ripple ReJection: The ratio of the peak-to-peak input ripple
voltage to the peak-to-peak output ripple voltage.
Temperature Stability of VO: The percentage change in
output voltage for a thermal variation from room temperature to either temperature extreme.
1-256
....
Typical Applications
...oco==
N
0l:Io
5V to 20V Adjustable Regulator
+VIN
...._ _....""",,"O VOUT
r-_.&.::.:IN-l!2!!!~_
OUT
5V to 20V
OFF
@1A
tON/OFF
~
R2
Lt.t2941C
ADJ
ON
R1
TL/H110367-5
RI + R2
VOUT - Reference voltage x -R-I- where VREF - 1.275 typical
Solving for R2: R2 - RI
(V:~F -
'Required if regulator is located far from power supply filter.
"COUT must be at least 22 /LF to maintain stability. May be increased with·
out bound to maintain regulation during transients. Locate as close as possi
I )
Note: Using Ik for RI will ensure that the input bias current error of the
adjust pin will be negligible. Do not bypass R I or R2. This will lead to instabilities.
1ASwitch
12V
R3
33 k.D. •••
ON/OFF
l
e
ble to the regulator. This capacitor must be rated over the same operating
temperature range as the regulator and should have an ESR less than I n to
maintain stabilily.
Lt.t2941C
ON
OFF
51
TLlH/l0367-6
"'To assure shutdown, select resistor R3 to guarantee at least 300 /LA of pull·up current when 51 is open. (Assume 2V at the ON/OFF pin.)
1-257
i~ ~National
~ Semiconductor
LM2984C Microprocessor Power Supply System
General Description
The LM2984C positive voltage regulator features three independent and tracking outputs capable of delivering the
power for logic Circuits, peripheral sensors and standby
memory in a typical microprocessor system. The LM2984C
includes circuitry which monitors both its own high-current
output and also an extemal ",P. If any error conditions are
sensed in either, a reset error flag is set and maintained until
the malfunction terminates. Since these functions are included in the same package with the three regulators, a
great saving in board space can be realized in the typical
microprocessor system. The LM2984C also features very
low dropout voltages on each of its three regulator outputs
(O.SV at the rated output current). Furthermore, the quiescent current can be reduced to 1 mA in the standby mode.
DeSigned also for vehicular applications, the LM2984C and
all regulated cirCUitry are protected from reverse battery installations or 2-battery jumps. Familiar regulator features
such as short circuit and thermal overload protection are
also provided. Fixed outputs of 5V are available in the plastic TO-220 power package.
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
Three low dropout tracking regulators
Output current in excess of 500 mA
Low quiescent current standby regulator
Microprocessor malfunction RESET flag
Delayed RESET on power-up
Accurate pretrimmed 5V outputs
Reverse battery protection
Overvoltage protection
Reverse transient protection
Short circuit protection
Internal thermal overload protection
ON/OFF switch for high current outputs
100% electrical burn-in in thermal limit
Typical Application Circuit
LM2984C
VIN
5V
rJ-
RRST
1pF
1];
5V, 500 mA
11
..h. 1DpF
pP
J;
PPMON
RESET IN
RESET
.Jz.
r
B
1OpF
~ ON/OFF
PERIPHERAL
SENSORS
INPUT
9
~
RT
STANDBY
MEMORY
5Y, 100 mA
10
LM2984C
MONITOR OUT
...
VBUFFER
YOUT
=fCT
5Y, 5 mA
=fCMON
"7
+
- '"'"1DpF
"J;
Order Number LM2984CT
See NS Package Number TA 11B
1-258
COUT must be at least 10 ".F to
maintain stability. May be Increased
without bound to maintain regulation
during transients. Locate as close as
possible to the regulator. This capac- TL/H/8821-1
ltor must be rated over the same 0perating temparature range as the
regulator. The equivalent series resistance (ESR) of this capacitor Is
critical; see curve.
r-
s::
Absolute Maximum Ratings
N
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage
Survival Voltage « 100 ms)
Operational Voltage
Internal Power Dissipation
Internally Limited
Operating Temperature Range (TA)
O'C to + 125'C
Maximum Junction Temperature (Note 1)
Storage Temperature Range
35V
26V
150'C
-65'Cto +150'C
Lead Temperature (Soldering, 10 sec.)
230'C
ESD rating is to be determined.
Electrical Characteristics
VIN
= 14V, lOUT = 5 mA, COUT = 10 ,..,F, Tj = 25'C (Note 6) unless otherwise indicated
Parameter
Conditions
Typical
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
5.00
4.85
5.15
4.75
5.25
Vmin
V max
VOUT(Pin 11)
Output Voltage
5 mA ~ 10 ~ 500 mA
6V ~ VIN ~ 26V
9V ~ VIN ~ 16V
2
25
mV max
7V ~ VIN ~ 26V
5
50
mV max
Load Regulation
5 mA ~ lOUT ~ 500 mA
12
50
mVmax
Output Impedance
250 mAde and 10 mA rms ,
fa = 120 Hz
24
Quiescent Current
lOUT
= 500 mA
38
100
mAmax
lOUT
= 250mA
14
50
mAmax
Line Regulation
Output Noise Voltage
10 Hz-100 kHz, lOUT
= 100 mA
Long Term Stability
= 120 Hz
mn
100
,..,V
20
mV/1000 hr
Ripple Rejection
fa
70
60
Dropout Voltage
lOUT
= 500mA
0.53
0.80
1.00
V max
lOUT
= 250mA
0.28
0.50
0.60
V max
0.92
0.75
32
26
26
Vmin
45
35
35
Vmin
-30
-15
-15
Vmin
-55
-35
-35
Vmin
Current Limit
Maximum Operational
Input Voltage
Continuous DC
Maximum Line Transient
VOUT ~ 6V, ROUT
Reverse Polarity
Input Voltage DC
VOUT ~ -0.6V, ROUT
Reverse Polarity Input
Voltage Transient
T
~
100 ms, ROUT
= 100n
= 100n
= 100n
1-259
dBmin
Amin
co
CD
"""
o
Electrical Characteristics (Continued)
VIN
= 14V,lbu! = 5 rnA, ~uf = 10 ,..F, TJ = 25'C (Note 6) unless otherwise indicated
Parameter
Conditions
Typical
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
5.00
4.85
5.15
4.75
5.25
Vmln
Vmax
Vbuffer (Pin 10)
Output Voltage
Line Regulation
5mA,;; 10 ';; 100 rnA
6V,;; VIN';; 26V
9V,;; VIN ';;16V
2
25
mVmax
7V,;; VIN';; 26V
5
50
mVmax
50
mVmax
15.0
mAmax
Load Regulation
5mA,;; Ibuf';; 100 rnA
15
Output Impedance
50 mAde and 10 mArms,
200
Quiescent Current
Ibuf
Output Noise Voltage
10 Hz-100 kHz, lOUT
= 100 rnA
8.0
= 100 rnA
Long Term Stability
Ripple Rejection
Dropout Voltage
= 120 Hz
Ibuf = 100mA
fo
Current Limit
Maximum Operational
Input Voltage
Continuous DC
Maximum Line
Transient
Vbuf';; 6V, Rbuf
Reverse Polarity
Input Voltage DC
Vbu! ~ -0.6V, Rbu!
Reverse Polarity Input
Voltage Transient
T,;; 100 ms, Rbuf
= 1000
= 1000
= 1000
mO
100
,..V
20
mVl1000 hr
70
60
0.35
0.50
0.23
0.15
32
26
26
Vmln
45
35
35
Vmin
-30
-15
-15
Vmln
-55
-35
-35
Vmin
dBmin
0.60
Vmax
Amin
Electrical Characteristics
VIN
= 14V, Istby = 1 rnA, Cslby = 10 ,..F, TJ = 25'C (Note 6) unless otherwise indicated
Typical
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
5.00
4.85
5.15
4.75
5.25
Vmin
Vmax
9V,;; VIN';; 16V
2
25
mVmax
s: VIN ,;; 26V
5
50
mVmax
6
50
mVmax
1.2
2.0
mAmax
0.9
1.5
mAmax
Parameter
Conditions
Vstsndby (Pin 9)
Output Voltage
Line Regulation
1 rnA ,;; 10 ,;; 7.5 mA
6V,;; VIN';; 26V
7V
Load Regulation
0.5 rnA ,;; Istby ,;; 7.5 rnA
Output Impedance
5 m~e and 1 mArms , fo
Quiescent Current
ISlby
= 120 Hz
= 7.5 rnA
ISlby = 2mA
1·260
0.9
0
Electrical Characteristics (Continued)
VIN = 14V, Istby = 1 rnA, Cstby = 10 p.F, Tj = 25°C (Note 6) unless otherwise indicated
Parameter
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Conditions
Typical
Units
10 Hz-100 kHz, Istby = 1 mA
100
p.V
20
mVl1000 hr
Vstandbv (Continued)
Output Noise Voltage
Long Term Stability
Ripple Rejection
Dropout Voltage
Dropout Voltage
fo=120Hz
70
60
Istby_ = 1 mA
0.26
0.50
0.50
Istby = 7.5 mA
0.38
0.60
0.70
15
12
Current Limit
dBmin
Vmax
Vmax
mAmin
Maximum Operational
Input Voltage
4.5V ,;; Vstby ,;; 6V
Rstby = 10000.
45
35
35
Vmin
Maximum Line
Transient
Vstby';; 6V,
Rstby = 10000.
45
35
35
Vmln
Reverse Polarity
Input Voltage DC
Vstby:2: -0.6V,
Rstby = 10000.
-30
-15
-15
Vmin
Reverse Polarity Input
Voltage Transient
T ,;; 100 ms, Rstby = 10000.
-55
-35
-35
Vmln
Electrical Characteristics
VIN = 14V, Tj = 25°C (Note 6) COUT = 10 p.F, Cbuf = 10 p.F, Cstby = 10 p.F unless otherwise specified
Parameter
Conditions
Typical
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
Tracking and Isolation
Tracking
VOUT-Vstby
lOUT';; 500 mA, Ibuf = 5 rnA,
Istby';; 7.5 mA
±30
±100
mVmax
Tracking
Vbuf-Vstby
lOUT = 5 rnA, Ibuf';; 100 rnA,
Istbv';; 7.5 mA
±30
±100
mVmax
Tracking
VOUT-Vbuf
lOUT';; 500 mA, Ibuf ,;;100 mA,
Istby = 1 mA
±30
±100
mVmax
Isolation'
Vbuf from VOUT
ROUT = 10., Ibuf';; 100 rnA
5.00
4.50
5.50
Vmln
Vmax
Isolation'
VstbyfromVOUT
ROUT = 10., Istby';; 7.5 rnA
5.00
4.50
5.50
Vmin
Vmax
Isolation'
VOUT from Vbuf
Rbuf = 10., lOUT';; 500 mA
5.00
4.50
5.50
Vmin
Vmax
Isolation'
4.50
Rbuf = 10., Istby';; 7.5 mA
5.00
5.50
VStby from Vbuf
'Isolation refers to the ability of the specified output to remain within the tested limits when the other oulput is shorted to ground.
1·261
Vmin
Vmax
Electrical Characteristics (Continued)
VIN = 14V, lOUT = 5 mA, Ibut
otherwise specified
=
5 mA, Istby
Parameter
=
5 mA, Rt
=
130k,
Conditions
Ct =
0.33 ""F, Cmon
= 0047 ""F, Tj =
Typical
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
5
2
1
mAmln
0.10
0.40
1.22
1.15
Vmin
1.22
1.30
Vmax
50
45
mSmin
50
55
mSmax
4.00
3.60
Vmin
4.00
4.40
Vmax
25°C (Note 6) unless
Computer Monitor/Reset Functions
=
=
lreset Low
VIN
VresetLow
VIN
Rtvoltaga
(Pin 2)
= 0.4V
4V, Irst = 1 mA
4V, Vrst
Power On Reset
Delay
V""Pmon = 5V
(Tdly = 1.2 Rt Ctl
VOUTLow
Reset Threshold
(Note 4)
VOUTHigh
Reset Threshold
(Note 4)
Reset Output
Leakage
V""Pmon
=
5V, Vrst
""Pmon Input
Current (Pin 4)
V""Pmon
=
V""Pmon
Vmax
5.50
5.25
Vmin
5.50
6.00
Vmax
0.01
1
""Amax
2.4V
7.5
25
""Amax
= OAV
0.01
10
1.22
0.80
0.80
Vmin
1.22
2.00
2.00
Vmax
=
12V
""Pmon Input
Threshold Voltage
~max
""p Monitor Reset
Oscillator Period
V""Pmon = OV
(Twindow = 0.82 RtCmon)
50
45
50
55
""p Monitor Reset
Oscillator Pulse Width
V""Pmon = OV
(RESETpw = 2000 Cmon)
1.0
0.7
0.5
mSmin
1.0
1.3
2.0
mSmax
Minimum ""p Monitor
Input Pulse Width
(Note 5)
Reset Fall Time
Rrst
Reset Rise Time
Rrst
On/Off Switch Input
Current (Pin 8)
VON
VON
=
=
10k, Vrst
10k, Vrst
mSmin
mSmax
2
=
=
""smax
5V, Crst:S; 10 pF
0.20
1.00
""smax
5V, Crst:S; 10 pF
0.60
1.00
""smax
7.5
25
""Amax
0.01
10
1.22
0.80
= 2AV
= 0.4V
On/Off Switch Input
Threshold Voltage
""Amax
0.80
Vmin
1.22
2.00
2.00
Vmax
Note 1: Thermal resistance without a heatsink for junction-to-case temperatura is 3"C/W. Thermal resistance case-to-ambient is 4O'C/W.
Nole 2: Tested Um"s are guaranteed and 100% production tested.
Nole 3: Design Limits are guaranteed (but not 100% production tested) over the indicated temperature and supply voltage range. These IimHs are not used to
calculate outgoing qualHy levels.
Note 4: An intemal comparator detects when the main regulator output (VOUT) drops below 4.0V or rises above 5.5V. If either condition exists at the output, the
Reset Error Flag Is held low until the error condition has terminated. The Reset Error Flag is then allowed to go high again after a delay set by Rt and Ct. (See
Applications Section.)
Note 5: This parameter is a measure of how short a pulse can be detected at the poP Monitor Input. This parameter is primarily influenced by the value of Crnen.
(See Typical Performance Characteristics and Applications Section.)
Note 6: To ensure constant junction temperature, low duty cycle pulse testing is used.
1·262
Block Diagram
VIN
ON/OFF SWITCH
1
8
ON/OFF
THERMAL SHUTDOWN
rr+
11
5V.500mA
REGULATOR
i'-
I
5V.7.5mA
REGULATOR
5•5V
"-.FI,.OV
POWER-UP
RESET
TIMER
--
I
Vour
COMPARATOR ...
2
I
9
do- , VSTANDBV
.I,Csmv
-
VIN
I
I
3
5V.l00mA
REGULATOR
I
I
10
J..,
V8UFFER
.I,CBUF
--
Cli
--
pP MONITOR
J..,
Vour
.I,Cour
VIN
PEAK DETECTOR
4
COMPUTER RESET
TIMER/OSCILLATOR
5
--,- ......,-
JRRST
7
1-
Ct.lON:£.
-
RESET
TLIH18821-2
Pin Description
Pin No.
Pin Name
1
2
3
VIN
Rt
Ct
P.Pmon
C mon
Ground
Reset
4
5
6
7
8
9
10
11
ON/OFF
Vstandby
Vbuffer
VOUT
Comments
Positive supply input voltage
Sets internal timing currents
Sets power-up reset delay timing
Microcomputer monitor input
Sets ,.,.C monitor timing
Regulator ground
Reset error flag output
Enables/disables high current regulators
Standby regulator output (7.5 mA)
Buffer regulator output (100 mA)
Main regulator output (500 mA)
External Components
Component
Typical Value
Component Range
Ctc
Rtc
1 JIoF
130k
0.33 JIoF
0.01 JIoF
10k
0.47 JIoF-l0 JIoF
24k-l.2M
0.033 JIoF-3.3 JIoF
0.001 JIoF-O.l JIoF
lk-l00k
Cmon
0.47 JIoF
0.047 JIoF-4.7 JIoF
Rrst
10k
5k-l00k
Cstby
10 JIoF
10 JIoF - no bound
Cbuf
10 JIoF
10 JIoF - no bound
COUT
10 JIoF
10 JIoF-no bound
CIN
Rt
Ct
Comments
Required if device is located far from power supply filter.
Sets internal timing currents.
Sets power-up reset delay.
Establishes time constant of AC coupled computer monitor.
Establishes time constant of AC coupled computer monitor. (See
applications section.)
Sets time window for computer monitor. Also determines period and pulse
width of computer malfunction reset. (See applications section.)
Load for open collector reset output. Determined by computer reset input
requirements.
A 10 JIoF is required for stability but larger values can be used to maintain
regulation during tranSient conditions.
A 10 JIoF is required for stability but larger values can be used to maintain
regulation during transient conditions.
A 10 JIoF is required for stability but larger values can be used to maintain
regulation during transient conditions.
1·263
0
~
co
en
Typical Circuit Waveforms
N
3SV
:::i
....I
INPUT
VOLTAGE
PIN 1
ON/OFF
SWITCH
PIN 8
OUTPUT
VOLTAGE
PIN 11
STANDBY
OUTPUT
PIN 9
TIMING
CAPACITOR
PIN 3
31V
'--_ _ _ _ _"'\ 4.6V
14V
OV
SV
OV
6V
SV
OV
SV
OV
2V
OV
RESET
VOLTAGE
PIN 7
J.lP MONITOR
VOLTAGE
PIN 4
SV
OV
SV
IIII
OV
TURN
ON
HIGH
Y,N
II
III
HIGH
LOW
VOUT
VOUT
III
/
COMPUTER
MALFUNCTION
II
TURN
OFF
J.lP
MALFUNCTION
TL/H/8821-3
Connection Diagram
/
TO-220 II-LEAD
TAB IS .GROUND
o
11
MAIN OUTPUT
10
BUFFER OUTPUT
9
STANDBY OUTPUT
8
ON/OFF SWITCH
7
RESET ERROR FLAG
5
J.lP MONITOR CAPACITOR
GROUND
4
J.lP MONITOR INPUT
3
TIMING CAPACITOR
2
TIMING RESISTOR
INPUT VOLTAGE
TL/H/8821-4
Order Number LM2984CT
See NS Package Number TA 11 B
1·264
Typical Performance Characteristics
Dropout Voltage (Vour)
Dropout Voltage (Vbu,)
1.2
~
0.8
0
D.6
!:l
>
'01lT= 500 mA
~
".
III
D.4
~
0.3
!:l
5
i
D.6
D.5
\.0
~
III
5
D.4 I--JjJmA
:.-
0.2
0
-50 -25 0
i
0.2
r~
25 50 75 100125150
2l
0.8
~
III
D.6
/
D.4
V
D.6
5
:i!
D.4
2l
0.2
0.2
0.3
0.4
0.5
~
I!l
o.s
5
]:
400
I
300
~
D.4
0
EO
III
100
120
0
4O~ 10;;;;; =101lT=500mA
I
2O~
~
0
-SO -2S 0
-
~J501 r- -::
25 50 75 100 125 ISO
JUNcnOH TEMPERATURE (CC)
2
I
5
5
0
100
~=>
8
u
§
~
a
10
40
3D
2 0 - I--- t- V\N=14V
10
0
-50 -25 0
25 50 75 100125150
25 so 75 100 125 ISO
JUNcnOH TEMPERATURE (CC)
Quiescent Current (Vbu,)
12
8
6
Peak Output Current (Vstby)
]:
200
]:
4
OUTPUT CURRENT (mA)
50
16
'aUF = 'srrrt=0
EO
-
0.21"""
JUHcnOH TEMPERATURE (CC)
V\N=14V
!Z
i
40
0
-50 -25 0
25 50 75 100125150
--
0
20
V'N=14V
QuIescent Current (Vour)
III
~
D.4
Peak Output Current (Vbu,)
JUHcnON TEMPERATURE (CC)
8
5
:i!
2l
0
0
]:
D.6
OUTPUT CURRENT (mA)
V'N= 14V
25 50 75 100125150
0.8
!:l
500
-50 -2S 0
0.1
Dropout Voltage (Vstby)
0.2
Peak Output Current (Vour)
0
_1--~;:;mA
~
0.6
1.6
1.2
0.2 ~
~
JUNcnON TEMPERATURE (CC)
0
0.1
0.3 ~
0
-50 -25 0
25 50 75 100125150
0.8
!:l
l7.5 lmA
01lT-
_,...-r-
ID
OUTPUT CURRENT (A)
5
i
~
,/
0
i8
0
>
5
Dropout Voltage (Vbu,)
0
3
!:l
ID
~
5
:i!
:.-
-
i
D.4 I--- _
JUHcnON TEMPERATURE (CC)
Dropout Voltage (Vour)
~
-
III
~
'01lT=50 MA
0
-50 -25 0
ID
!:l
~hJ~
D.5
~
0.1
JUHcnOH TEMPERATURE (CC)
~
Dropout Voltage (Vstby)
D.6
QuIescent Current (Vstby)
4D
V'N=14V
loUT = 'ST8Y= 0
'auF=I00mA
4 r- -
'-'iF=rOj
0
-50 -25 0
-
r-
25 SO 75 100 1251SO
JUNcnoH TEMPERATURE (CC)
I--- -
]:
3D
I§
2D
~
lD
5
a
r- -
V'N=14V
I--- VOUT OFF -
-
I---
r- IVaUF OFF - rI
- -
1
,~=17.51- '7 'I
-r-r-rrri-
0
-50 -25 0
t/
H -
25 50 75 100 125 150
JUHcnOH TEMPERATURE (CC)
TL/H/8821-5
1·265
Typical Performance Characteristics
Quiescent Current (VOUT)
(Continued)
Quiescent Current (Vbutl
100
Quiescent Current (Vslby)
3D
20
]:
/
/
--
.......
o
o
100 200
./
:!GO
400
500 600
I
]:
18
I
12
,.
i
..... V
o
o
Quiescent Current (VOUT)
I I I
-' I I
60
"\ ~.:cr1""10.. .
10
IJ
-10
-10 -5
0
I I I
I I I
5
10 15 20 25 30
~
1.0
&
05
_....
100
60
o
120
2
Quiescent Current (Vstby)
10
~
)
-10 5
0
1ST8Y= 10mA -
'eur=100mA
I
~
'euF=50LmA L
-5
5
10 15 20 25 30
10
20
INPUT VOLTAGE (V)
Output Voltage (Vbutl
Output Voltage (Vstby)
7
RBlJF =l00Q
R$ray=1 kJl
~
-1
-40
INPUT VOLTAGE (V)
~
-1
-20
20
-40
INPUT VOLTAGE (V)
Low Voltage Behavior (VOUT)
-20
20
INPUT VOLTAGE (V)
Low Voltage Behavior (Vbuf)
Low Voltage Behavior (VslbY)
8
8
lour = 250 mA ~
~=5ImAl
-1
-10
INPUT VOLTAGE (V)
1IOur=100l1
8
10
15
7
20
_f-r-
4
Output Voltage (VOUT)
~
~~
·OUlPUT CURRENT (rnA)
Quiescent Current (Vbutl
INPUT VOLTAGE (V)
7
60
20
,,- Jr=Jso+-
20
15
OUtpUT CURRENT (mA)
OUlPUT CURRENT (mA)
70
2D
u
o
.w
20
2.5
5
1/
I' /
-IBUF=
50mA
1our=500mA
I
1/
I
Ism =
lmAl
1sUr= l00mA
I
1ST8Y= 75 mA
II
o
012345878
INPUT VOLTAGE (V)
o
012345878
INPUT VOLTAGE (V)
o
012345878
INPUT VOLTAGE (V)
Tl/H/8821-8
1·266
Typical Performance Characteristics
Line Transient
Response (VOUT)
Line Transient
Response (Vbutl
5
0
1\
1\
0
0
5
5
5
0
3
2
I
0
I
-10
0
I
-10
0
I
-10
0
10
20
30
TIME
C!e'
!:l~
Output Impedance (Vbutl
F'REQUENCY (Hz)
It:
<40
30
o
L-J...l..J.JL.WlL-L.LL
~
20
50
0
-100 0
I~
10
100
10
Load Transient
Response (Vstby)
10
0,
10
0
TIME (,"s)
TIME (,"s)
s
~
60
-so
Output Impedance (VOUT)
70
50
1\
\
25
TlWE (ps)
80
<40
30
75
0
-250
-100 0
a;-
20
Load Transient
Response (Vbutl
a'1 250
0.001
10
TIME (ps)
~~
-200
!Z
0
Ills 50
Si:;-Ioo
iJ
5
I
0
~~
0
1/
2
300
OC
"'"
3
=~
200
a-,oo
~~
0
3
2
I
Load Transient
Response (YOUT)
~
Line Transient
Response (Vstby)
5
0
0
5
0
II
5
(Continued)
.~~llblI~
UWJ~~
'"
50
50
r-
50
r<40 ' -
<40
10
100
IK
FREQUENCY (Hz)
10K
10
<40
100
IK
FREQUENCY (Hz)
10K
10
100
IK
10K
FREQUENCY (Hz)
Tl/H/BB21-7
1-267
Typical Performance Characteristics
(Continued)
Device Dissipation vs
Ambient Temperature
Output Voltage
22
~r-r-r-",,-'-'-'
g
!!I
~
16
5.10
1-+-+--+-++++-1
5.OD
1;;ooi--r-"'t-+4;;;;;J;-f""""l
;!
INFINITE HEAT SINK
20
18
5.2D1-+-+--l--j--+-+-If---l
"
14
12
10
~ ~ f---l--+-+-+--+-l--I--I
"""
r-.. 5CC/W HEAT SINK
.....
....
8 1O"C/\Y'
H~T ~INK
o
470
o
L-.l..-.l...-..L-...1......J.......J.......J.........J
-50 -25 0
o
25 50 7S 100 125 150
I
.......
i"""
NO HEAT SINK
4.al1-+-+--+--t--t--t-t----l
I
10 20 30
.j()
50 60 70 80 90 100 .
AMBIENT TEMPERATURE(CC)
JUNCTION TEMPERATURE (CC)
TL/H/8821-9
TL/H/8821-8
Output Capacitor ESR
(Standby Output, Pin 9)
g
100
I
'''V
g
I
100
~
Cour= 1Ol'F
~~~~-
10
~
~
~
CoUT= 10l'F
......
~0
Ij
'1"
1
Output Capacitor ESR
(Main Output, Pin 11)
Output Capacitor ESR
(Buffer Output, Pin 10)
1
~
/
STABLE
Rl:GION- ~
/,
3.D
4.5
6
7.5
o
10
:/I'-'/. ~
~
/~
/,
STABLE
//
~ o.1
REG~~N -
~
~
~
Sl'o.o1
S 0.01
OUTPUT CURRENT (mA)
CoUT = 10l'F
r'lo...
II!
ill
1.5
100
Ij
§ O.1~'
1
g
20
60
.j()
80
100
OUTPUT C~RRENT (mA)
TL/H/8821-13
TL/H/8821-14
o
100
200
300
.j()Q
500
OUTPUT CURRENT (mA)
TLlH/8821-15
Application Hints
OUTPUT CAPACITORS
The LM2984C output capacitors are required for stability.
Without them, the regulator outputs will oscillate, sometimes
by many volts. Though the 10 /LF shown are the minimum
recommended values, actual size and type may vary depending upon the application load and temperature range.
Capacitor effective series resistance (ESR) also affects the
IC stability. Since ESR varies from one brand to the next,
some bench work may be required to determine the minimum capacitor value to use in production. Worst case is
usually determined at the minimum ambient temperature
and the maximum load expected.
Output capacitors can be increased in size to any desired
value above the minimum. One possible purpose of this
would be to maintain the output voltages during brief conditions of negative input transients that might be characteristic of a particular system.
Capacitors must also be rated at all ambient temperatures
expected in the system. Many aluminum type electrolytics
will freeze at temperatures less than -30'C, reducing their
effective capacitance to zero. To maintain regulator stability
down to -40"C, capaCitors rated at that temperature (such
as tantalums) must be used.
Each output must be terminated by a capaCitor, even if it is
not used.
, outputs are controlled with the ON/OFF pin described later,
the standby output remains on under all conditions as long
as sufficient input voltage is supplied to the IC. Thus, memory and other circuits powered by this output remain unaffected by positive line transients, thermal shutdown, etc.
The standby regulator circuit is designed so that the quiescent current to the IC is very low « 1.5 rnA) when the other
regulator outputs are off.
The capacitor on the output of this regulator can be increased without bound. This will help maintain the output
voltage during negative input transients and will also help to
reduce the noise on all three outputs. Because the other
two track the standby output: therefore any noise reduction
here will also reduce the other two noise voltages.
BUFFER OUTPUT
The buffer output is designed to drive peripheral sensor circuitry in a /LP system. It will track the standby and main
regulator within a few millivolts in normal operation. Therefore, a peripheral sensor can be powered off this supply and
have the same operating voltage as the /LP system. This is
important if a ratiometric sensor system is being used.
The buffer output can be short circuited while the other two
outputs are in normal operation. This protects the /LP system from disruption of power when a sensor wire, etc. is
temporarily shorted to ground, i.e. only the sensor signal
would be interrupted, while the p.P and memory circuits
would remain operational.
The buffer output is similar to the main output in that it is
controlled by the ON/OFF switch in order to save power in
STANDBY OUTPUT
The standby output is intended for use In systems requiring
standby memory circuits. While the high current regulator
1-268
Application Hints (Continued)
the standby mode. It is also fault protected against overvoltage and thermal overload. If the input voltage rises above
approximately 30V (e.g. load dump), this output will automatically shut down. This protects the internal circuitry and
enables the IC to survive higher voltage transients than
would otherwise be expected. Thermal shutdown is necessary since this output is one of the dominant sources of
power dissipation in the IC.
MAIN OUTPUT
The main output is designed to power relatively large loads,
i.e. approximately 500 rnA. It is therefore also protected
against overvoltage and thermal overload.
This output will track the other two within a few millivolts in
normal operation. It can therefore be used as a reference
voltage for any signal derived from circuitry powered off the
standby or buffer outputs.-This is important in a ratiometric
sensor system or any system requiring accurate matching of
power supply voltages.
ON/OFF SWITCH
The ON/OFF switch controls the main output and the buffer
output. The threshold voltage is compatible with most logic
families and has about 20 mV of hysteresis to insure 'clean'
switching from the standby mode to the active mode and
vice versa. This pin can be tied to the input voltage through
a 10 kO resistor if the regulator Is to be powered continuously.
POWER DOWN OVERRIDE
Another possible approach is to use a diode in series with
the ON/OFF signal and another in series with the main output in order to maintain power for some period of time after
the ON/OFF signal has been removed (see Figure 1). When
the ON/OFF switch is initially pulled high through diode 01,
thi:l main output will turn on and supply power through diode
02 to the ON/OFF switch effectively latching the main output. An open collector transistor 01 is connected to the
ON/OFF pin along with the two diodes and forces the regulators off after a period of time determined by the J.l.P. In this
way, the J.l.P can override a power down command and store
data, do housekeeping, etc. before reverting back to the
standby mode.
ON/OFF ~y.RV\1,....,~~~-MI-"III\r-.....
CONTROL 10 k4
DELAYED RESET
Resistor Rt and capaCitor Ct set the period of time that the
RESET output is held low after a main output error condition
has been sensed. The delay is given by the formula:
Tdly = 1.2 RtCt (seconds)
The delayed RESET will be initiated any time the main output is outside the 4V to 5.5V window, i.e. during power-up,
short circuit, overvoltage, low line, thermal shutdown or
power-down. The J.l.P is therefore RESET whenever the output voltage is out of regulation. (It is important to note that a
RESET is only initiated when the main output is in error. The
buffer and standby outputs are not directly monitored for
error conditions.)
J.l.P MONITOR RESET
There are two distinct and independent error monitoring
systems in the LM2984C. The one described above monitors the main regulator output and initiates a delayed RESET whenever this output is in error. The other error monitoring system is the J.l.P watchdog. These two systems are
OR'd together internally and both force the RESET output
low when either type of error occurs.
This watchdog circuitry continuously monitors a pin on the
J.l.P that generates a positive going pulse during normal operation. The period of this pulse is typically on the order of
milliseconds and the pulse width is typically on the order of
10's of microseconds. If this pulse ever disappears, the
watchdog circuitry will time out and a RESET low will be
sent to the J.l.P. The time out period is determined by two
external components, Rt and Cmon, according to the formula:
Twindow = 0.82 RtCmon (seconds)
The width of the RESET pulse is set by Cmon and an internal resistor according to the following:
RESETpw = 2000 Cmon (seconds)
A square wave signal can also be monitored for errors by
filtering the Cmon input such that only the positive edges of
the signal are detected. Figuf8 2 is a schematic diagram of a
typical circuit used to differentiate the Input Signal. Resistor
Rtc and capaCitor, Ctc pass only the rising edge of the
square wave and create a short positive pulse suitable for
the J.l.P monitor input. If the incoming Signal continues in a
high state or In a low state for too long a period of time, a
RESET low will be generated.
~
FROM p.P
SHUTDOWN
JI- l ~4 p.P MONITOR INPUT
..Jr-IL..Jr-IL. -,
TliH/BB21-10
....
Ric
FIGURE 1. Power Down Override
RESET OUTPUT
This output is an open collector NPN transistor which is
forced low whenever an error condition is present at the
main output or when a J.l.P error is sensed (see J.l.P Monitor
section). If the main output voltage drops below 4V or rises
above 5.5V, the RESET output is forced low and held low
for a period of time set by two external components, Rt and
Ct. There is a slight amount of hysteresis in these two
threshold voltages so that the RESET output has a fast rise
and fall time compatible with the requirements of most J.l.P
RESET inputs.
C
;t,cmon
TL/H/BB21-11
FIGURE 2. Monitoring Square Wave J.l.P Signals
The threshold voltage and input characteristics of this pin
are compatible with nearly all logic families.
There is a limit on the width of a pulse that can be reliably
detected by the watchdog circuit. This is due to the output
resistance of the' transistor which discharges Cmon when a
high state is detected at the input. The minimum detectable
pulse width can be determined by the following formula:
PWmin = 20 Cmon (seconds)
1-269
LM2984C
""
.Q
C
~"
CD
~
tn
n
:::r
CD
3
!.
n"
c
iii"
cc
AI
3
i\,
c:
TUH/8821-12
r------------------------------------------------------------------------,
~National
~
3:
......
~
~ Semiconductor
><
LM78XX Series Voltage Regulators
General Description
of external components. It is not necessary to bypass the
output, although this does improve transient response. Input
bypassing is needed only if the regulator is located far from
the filter capacitor of the power supply.
The LM78XX series of three terminal regulators is available
with several fixed output voltages making them useful in a
wide range of applications. One of these is local on card
regulation, eliminating the distribution problems associated
with single point regulation. The voltages available allow
these regulators to be used in logic systems, instrumentation, HiFi, and other solid state electronic equipment. Although designed primarily as fixed voltage regulators these
devices can be used with external components to obtain
adjustable voltages and currents.
For output voltage other than SV, 12V and 1SV the LM117
series provides an output voltage range from 1.2V to S7V.
Features
•
•
•
•
•
•
The LM78XX series is available in an aluminum TO-3 package which will allow over 1.0A load current if adequate heat
. sinking is provided. Current limiting is included to limit the
peak output current to a safe value. Safe area protection for
the output transistor is provided to limit internal power dissipation. If internal power dissipation becomes too high for
the heat sinking provided, the thermal shutdown circuit
takes over preventing the IC from overheating.
Considerable effort was expanded to make the LM78XX series of regulators easy to use and mininize the number
Output current in excess of 1A
Internal thermal overload protection
No external components required
Output transistor safe area protection
Internal short circuit current limit
Available in the aluminum TO-3 package
Voltage Range
LM780SC
sv
LM7812C
12V
LM781SC
1SV
Schematic and Connection Diagrams
r - -......- - - -.....- - - -......-~~IN'UT
Metal Can Package
TO-3(K)
Aluminum
O U T P U T D ND
AIS
o
2'
0
INPUT
A"
TLJH17746-2
G.l
.....----+----......
Bottom View
OU"UT
All
AI
"Ik
Order Number LM7805CK,
LM7812CK or LM7815CK
See NS Package Number KC02A
Plastic Package
TO-220(T)
A"
2.111
TL/H17746-3
Top View
A.
Order Number LM7805CT,
LM7812CT or LM7815CT
See NS Package Number T03B
Uk
GNO
TLlH17746-1
1-271
><
><
eX)
Absolute Maximum Ratings
"'"
..J
:E
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage (Va
= 5V, 12Vand 15V)
35V
Internal Power Dissipation (Note 1)
Internally Limited
Operating Temperature Range (TAl
O'Cto +70'C
Electrical Characteristics LM78XXC
Symbol
Lead Temperature (Soldering, 10 sec.)
TO,3 Package K
TO-220 Package T
Output Voltage
5V
12V
15V
10V
19V
23V
Conditions
Parameter
Min
Line Regulation
ITyp IMax
Po';; 15W, 5 mA,;; 10';; 1A
4.7S
5.25 11.4
12.6 14.25
1S.75
(7.5 ,;; VIN ,;; 20) (14.5 ,;; VIN ,;: 27) (17.S ,;: VIN ,;; 30)
V
V
Tj = 2S'C
10';; 1A
~VIN
O'C ,;; Tj ,;: + 125'C
~VIN
Load Regulation
IQ
Quiescent Current
10';; 1A
~IQ
Quiescent Current
Change
SmA,;; 10';; 1A
Tj = 25'C
10';; SOO mA, O'C,;: Tj ,;; + 12S'C
VMIN ,;; VIN ,;; VMAX
mV
V
SO
(8';: VIN ,;; 20)
120
(1S ,;: VIN ,;; 27)
150
(18.5 ,;; VIN ,;; 30)
mV
V
50
(7.5 ,;; VIN ,;; 20)
120
(14.6';: VIN ,;; 27)
1S0
(17.7';; VIN ,;; 30)
mV
V
25
(8';; VIN';; 12)
60
(16,;; VIN ,;; 22)
75
(20 ,;; VIN ,;; 26)
mV
V
10
12
12
mV
mV
~VOUT
{
f
= 120 Hz
50
25
150
75
120
150
mV
8
8.5
8
8.S
8
8.S
mA
mA
O.S
O.S
O.S
mA
1.0
(7.5 ,;; VIN ,;; 20)
1.0
(14.8';; VIN';: 27)
1.0
(17.9';; VIN ,;; 30)
mA
V
1.0
(7';; VIN';: 2S)
1.0
(14.S ,;; VIN';: 30)
1.0
(17.S ,;; VIN ,;; 30)
mA
V
90
",V
70
dB
dB
40
10';; 1A, Tj = 25'Cor
10';; 500 mA
120
60
50
Output Noise Voltage TA =25'C, 10 Hz';; f,;; 100 kHz
Ripple Rejection
15
4
150
(17.S ,;; VIN ,;: 30)
Tj = 2S'C
O'C ,;; Tj ,;; + 125'C
VMIN ,;; VIN ,;; VMAX
14.4
4
120
14.5';; VIN ,;; 30)
SmA,;: 10';: 1A,0'C';; Tj,;; +12S'C
Tj = 25'C, 10';; 1A
12:5
3
50
(7';; VIN';; 25)
5 mA ,;; 10 ,;; 1.SA
250 mA ,;; 10 ,;: 750 mA
~Vo
12
Units
I Typ I Max
V
~VIN
11.5
Min
15.6
= SOOmA Tj = 25'C
5.2
I Typ IMax
4.8
10
5
Min
Tj = 25'C, 5 mA ,;: 10 ,;: 1A
O'C,;; Tj,;; +125'C
~VIN
300'C
230'C
(Note 2) O·C ,;: Tj,;: 125'Cunlessotherwisenoted.
~VIN
VN
-65'C to + 150'C
Storage Temperature Range
VMIN ,;; VIN ,;; VMAX
l:,vo
150'C
1SOOC
Input Voltage (unless otherwise noted)
Output Voltage
Va
Maximum Junction Temperature
(K Package)
(T Package)
62
62
80
7S
55
55
72
54
54
O'C ,;; Tj ,;: + 125'C
VMIN ,;; VIN ,;: VMAX
(8';; VIN';; 18)
(15';; VIN ,;; 25)
(18.5 ,;; VIN ,;; 28.5)
V
2.0
18
1.5
2.4
1.5
2.0
19
1.2
2.4
1.8
V
mn.
A
A
mVI'C
RO
Dropout Voltage
Output Resistance
Short-Circuit Current
Peak Output Current
Tj = 25'C, lOUT = 1A
f = 1 kHz
Tj = 25'C
Tj = 25'C
Average TC of VOUT O'C ,;; Tj ,;; + 125'C, 10 = 5 mA
2.0
8
2.1
2.4
0.6
VIN
Input Voltage
Required to Maintain Tj
Line Regulation
7.5
= 25'C, 10
,;; 1A
14.6
17.7
V
Note 1: Thermal resistance of the TO-3 package (K. KG) is typically 4'C/W junction to case and 3S'C/W case to ambient. Thermal resistance of the TO·220
package (T) is typically 4'C/W iunction to case and 50'C/W case to ambient.
Note 2: All characteristics are measured with capacitor across the input of 0.22 ""F, and a capacitor across the output of O.1""F. All characteristics except noise
voltage and ripple rejection ratio are measured using pulse techniques (Iw ,,; to ms, duty cycle,; S%). Output voltage changes due to changes in internal
temperature must be taken into account separately.
1-272
r3:
......
Typical Performance Characteristics
Maximum Average Power
Dissipation
zs
g
20
~
;:
15
~"
..a
I~FINITE
t- HEATSINK
25
1\
WITH 10 C/W HEAT SINK
10
~
\
t'-...
NO HEATSINK
i1
r-t-I-..
0
20
'""
~
15
..
10
25
111111
~
1.5
II
NO HEAT SINK
o
50 15 100 125
o
o
25
50
lauy=5mA
......
"\
BO
m
iii
:!!
:!!
""
30
35
~..
~
i:l
40
it
i<
i<
20
25 50 75 100125 150
10
100
0.01
1/
COUT-O&
~
~t
"
~
a
I
10
100
Ik
s
I
100k
OUTPUT VOLTAGE IVI
lOOk
Dropout Characteristics
.o.VOUT" 100 mV
.....::
1.5
i--"
1M
....
ii:l
...
~
4.5
,.I"~
I I
I I
0.5
10UT'IA
11++
OJ I
1
o
-16 -50 -2. 0
o
25 60 75 100 125 150
10
INPUT VOLTAGE IV)
JUNCTION TEMPERATURE ( CI
Quiescent Current
VIN '" 10V
..
VOUT = 5V
lOUT" SmA
.!
1'1
.AI ~T'500mA
10~T -:t- ~"'"
Quiescent Current
..
lOUT' OA
r-...l""t- i--
FREQUENCY 1Hz)
5.5
I
I
LM1805C
Tj =25"C
....... ~IOUT' 500 mA
~
IIlk
10k
I-- ---:.- -lOUT _IIA .
S
~
COUT'I "F
TANTALUM
::'"
I
2.5
5
1:
I
Ik
Dropout Voltage
t/~
I
1=120H,
60 !-VIN-VOUT' BVOC+3.5 Vrm.10UT= IA
r- Tj • 25'&
50
o
10
15
20
25
FREQUENCY IH.)
Output Impedance
0.1
10
-
JUNCTION TEMPERATURE I C)
VIN 'IOV
~
VOUT' 5V
lOUT' 500 mA
Tj'25"C
BO
'"
c
60
it
-1. -50 -25 0
0.001
25
90
'" 0.910
e
20
-
'g;" 0.915
u
15
Ripple Rejection
Ripple Rejection
~ 0.980
'"~
....~
10
INPUT TO OUTPUT DIFFERENTIAL IV)
~
-
o
15
100
~ 0.995
0.9B5
0.5
VIN - VOUT " 5V
i 1.005
~
0990
"N-f-I...l.l
III II
I
AMBIENT TEMPERATURE I C)
1.lI10
~
~.~ :s..I,oc .~ --I. rK
~
....
~
"
~
~ r--- Ti"l~
I
'"
"
......WITH 10 C/W HEAT SINK
i1
Output Voltage (Normalized
to 1V at Tj = 25'C)
~
2.5
:5
AMBIENT TEMPERATURE I CI
;;
C.VOUT" 100 mV
INFINITE HEAT SINK
~
........
Peak Output Current
3.5
TO·220
I-
l"""- f-,;:
j
-15 -50 -25
g
~
"
~
"N
I 1"1..
><
><
Maximum Average Power
Dissipation
TO·3
I I
Q)
6.5
VOUT·5V
lOUT -10 mA
Tj '" 25°C
oS
t-
""
.~
i:l
....
:5
.!:i
.
::l
;;
5.5
4.5
-
-I-- I--
[
;;
3.5
-75 -50 -ZS 0 25 50 15 100 125 150
3.5
5
JUNCTION TEMPERATURE ("CI
10
15
20
25
30
35
INPUT VOLTAGE IV)
TLlH/7746-4
1·273
~= ~National
g ~ Semiconductor
~
~ LM7800 Series
3-Terminal Positive Voltage Regulators
General Description
Features
The LM7800 series of monolithic 3-terminal positive voltage
regulators employ internal current-limiting, thermal shutdown and safe-area compensation, making them essentially
indestructible. If adequate heat sinking is provided, they can
deliver over 1.0A output current. They are intended as fixed
voltage regulators in a wide range of applications including
local (on-card) regulation for elimination of noise and distribution problems associated with single-point regulation. In
addition to u1\e as fixed voltage regulators, these devices
can be used with external components to obtain adjustable
output voltages and currents.
•
•
•
•
•
•
•
•
Output current in excess of 1.0A
No external components
Internal thermal overload protection
Internal short circuit current-limiting
Output transistor safe-area compensation
Available in JEDEC TO-220 and TO-3 packages
Output voltages of
8V, 18V and 24V (See Note)
Available in extended temperature range
av,
Connection Diagrams
TLIHI10D52-1
Top View
Order Number LM7806K, LM7808K, LM7818K,
LM7824K, LM7806CK, LM780BCK,
LM7818CK or LM7824CK
See NS Package Number K02A
@rl
Lead 3 connected
to lab.
~I~!~f.-~
\:=: COMMON
TUHI10052-2
Top View
Order Number LM7806CT, LM780BCT
LM7818CT or LM7824CT
See NS Package Number T03B
Note: See General Purpose Linear Databook for specificstionson similar devices with 5V, 12V, or 15Voutputs. These
parts can be found under LM140/LM340, LM140AlLM340A
(for tighter output tolerance) and LM78XX datasheets.
1-274
.-:s::
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Lead Temperature
TO-3 Metal Can (Soldering, 60 sec.)
TO-220 Package (Soldering, 10 sec.)
Power Dissipation
Storage Temperature Range
TO-3 Metal Can
-6S·C to + 17S·C
TO-220 Package
-6S·Cto +1S0·C
Operating Junction Temperature Range
Extended (LM7BOO)
-SS·Cto +1S0·C
Commercial (LM7BOOC)
O·C to + 1S0·C
Input Voltage
6.0Vto 1BV
24V
ESD Susceptibility
300·C
26S·C
Internally Limited
3SV
40V
(to be determined)
LM7806C
Electrical Characteristics
o·c ,,; TA ,,; + 12S·C, VI = 11V, 10 = SOO mA, CI = 0.33 /LF, Co = 0.1 /LF, unless otherwise specilied
Symbol
Parameter
Conditions (Note 1)
Vo
Output Voltage
TJ = 2S·C
VR LINE
Line Regulation
TJ = 2S·C
VRLOAD
Load Regulation
TJ = 2S·C
Min
Typ Max
S.7S
6.0
6.2S
B.OV ,,; VI ,,; 2SV
5.0
120
9.0V ,,; VI ,,; 13V
1.S
60
S.O mA,,; 10"; 1.SA
14
120
2S0mA,,; 10"; 7S0mA
4.0
60
Vo
Output Voltage
B.OV,,; VI ,,; 21V, S.O mA,,; 10"; 1.0A, P"; 1SW
la
Quiescent Current
TJ = 2S·C
ala
Quiescent Current
Change
No
IWith Line
IWith Load
Noise
S.7
4.3
mV
V
mA
1.3
O.S
S9
mV
8.0
S.O mA,,; 10"; 1.0A
1 = 2400 Hz, 10 = 3S0 mA, TJ = 2S·C
V
6.3
B.OV ,,; VI ,,; 2SV
TA = 2S·C, 10Hz ,,; I,,; 100kHz
aVI/aVo Ripple Rejection
Units
mA
4S
/LV
7S
dB
2.0
V
VDO
Dropout Voltage
10 = 1.0A, TJ = 2S·C
Ro
Output Resistance
1 = 1.0 kHz
19
mn
los
Output Short Circuit Current
TJ = 2S·C, VI = 3SV
SSO
mA
Ipk
Peak Output Current
TJ = 2S·C
2.2
A
aVo/aT
Average Temperature
Coefficient 01 Output Voltage
10 = S.O mA, O·C ,,; TA ,,; + 12S·C
0.8
mvrc
LM7808
Electrical Characteristics
-ss·c ,,; TA ,,; +12S·C, VI = 14V, 10 = SOO mA, CI = 0.33 p.F, Co = 0.1 p.F, unless otherwise specilied
Symbol
Parameter
Output Voltage
TJ'= 2S·C
VR LINE
Line Regulation
TJ = 2S·C
VRLOAD
Load Regulation
Min
Typ
Max
Units
7.7
B.O
B.3
V
10.SV"; VI ,,; 2SV
6.0
80
11V,,;VI,,;17V
2.0
40
S.O mA,,; 10"; 1.SA
12
100
2S0mA,,; 10"; 7S0mA
4.0
40
Conditions (Note 1)
Vo
TJ = 2S·C
Vo
Output Voltage
11.SV"; VI ,,; 23V, S.O mA,,; 10"; 1.0A, P"; 1SW
la
Quiescent Current
TJ = 2S·C
ala
Quiescent Current
Change
I With Line
I With Load
7.6
4.3
mV
B.4
V
6.0
mA
11.SV"; VI"; 2SV
0.8
S.O mA,,; 10"; 1.0A
O.S
1-27S
mV
mA
~
o
o
(J)
....
CD
m'
LM7808
Electrical Characteristics (Continued)
-55'C ,;: TA ,;: + 125'C, VI
Symbol
No
=
14V, 10
=
500 mA, CI
0.33 /loF, Co
Parameter
TA
=
RO
Output Resistance
f
los
Output Short Circuit Current
TJ
IPk
Peak Output Current
10
AVO/AT Average Temperature
Coefficient of Output Voltage
TJ
=
=
25'C
10
=
5.0mA
25'C, VI
Line Regulation
/loVIVO
=
0.75 1.2
=
1.3 2.2
1-55'C';: TA';: +25'C
= 0.1
25'C
mn
3.3
0.4 mVI'C/
Vo
0.3
Typ
Max
Units
7.7
8.0
8.3
V
,10.5V ,;: VI';: 25V
6.0
160
11V,;: VI ,;: 17V
2.0
80
5.0 mA ,;: 10';: 1.5A
12
160
250 mA ,;: 10 ,;: 750 mA
4.0
80
8.4
V
4.3
8.0
mA
Output Voltage
10.5V';: VI ,;: 23V, 5.0 mA,;: 10';: 1.0A, P';: 15W
Quiescent Current
TJ
Ala
Quiescent Current
Change
7.6
25'C
10.5V ,;: VI';: 25V
1.0
5.0 mA,;: 10';: 1.0A
0.5
No
Noise
TA
AVI/AVO
Ripple Rejection
f
Veo
Dropout Voltage
Ro
Output Resistance
= 25'C,10 Hz,;: f,;: 100 kHz
= 2400 Hz, 10 = 350 mA, TJ = 25'C
10 = 1.OA, TJ = 25'C
f = 1.0 kHz
los
Output Short Circuit Current
TJ
TJ
=
=
25'C, VI
Peak Output Current
AVO/AT
Average Temperature
Coefficient of Output Voltage
10
=
5.0mA
=
35V
56
mV
mA
52
/loV
dB
2.0
V
16
mn
450
mA
0.8
1·276
mV
72
. 2.2
25'C
A
.A
Min
10
Ipk
V
/loF, unless otherwise specified
Vo
=
2.5
16
Conditions (Note 1)
TJ
dB
35V
= 25'C
TJ = 25'C
I With Line
I With Load
72
2.0
TJ
Load Regulation
62
40
25'C
0.33 /loF, Co
Parameter
VR LINE
Units
8.0
I+ 25'C ,;: TA ,;: + 125'C
LM7808C
Electrical Characteristics
O'C ,;: TA ,;: + 125'C, VI = 14V, 10 = 500 mA, CI =
Output Voltage
Min Typ Max
25'C,10 Hz,;: f,;: 100 kHz
= 1.0A, TJ =
= 1.0 kHz
Veo
Vo
0.1 ,.iF, unless otherwise specified
f = 2400 Hz, 10 = 350 mA, TJ = 25'C
Dropout Voltage
Symbol
=
Conditions (Note 1)
Noise
AVI/AVO Ripple Rejection
VRLoAe
=
A
mVl'C
r3:
~
o
o
LM7818
Electrical Characteristics
-55DC :s: TA :s: + 125DC, VI = 27V, 10 = 500 mA, CI = 0.33 fJ.F, Co = 0.1 fJ.F, unless otherwise specified
Symbol
Parameter
Conditions (Note 1)
Vo
Output Voltage
TJ = 25DC
VR LINE
Line Regulation
TJ = 25DC
VRLOAD
TJ = 25DC
Load Regulation
Max
Units
17.3 1B.0
1B.7
V
15
1BO
24V:s: VI:S: 30V
5.0
90
5.0 mA:S: 10 :s: 1.5A
12
1BO
250 mA :s: 10 :s: 750 mA
4.0
90
22V :s: VI :s: 33V, 5.0 mA:s: 10 :s: 1.0A, P :s: 15W
10
Quiescent Current
TJ = 25DC
ala
Quiescent Current
Change
IWith Line
IWith Load
en
CD
Typ
21V:S: VI:S: 33V
Output Voltage
Vo
Min
17.1
4.5
mV
V
6.0
mA
O.B
5.0 mA:S: 10 :s: 1.0A
0.5
mA
No
Noise
TA = 25DC,10 Hz :s: f:s: 100 kHz
aVjlaVo
Ripple Rejection
f = 2400 Hz, 10 = 350 mA, TJ = 25DC
VDO
Dropout Voltage
10 = 1.0A, TJ = 25DC
2.0
V
Ro
Output Resistance
f = 1.0 kHz
22
mO
los
Output Short Circuit Current
TJ = 25DC, VI = 35V
Ipk
Peak Output Current
TJ = 25DC
aVo/aT
Average Temperature
Coefficient of Output Voltage
B.O
59
69
fJ.VIVO
dB
0.75
A
3.3
A
-.55DC:S: TA:S: +25DC
0.4
mV/DC/
+ 25DC :s: TA:S: +125DC
0.3
Vo
1.3
10 = 5.0mA
40
2.2
en
mV
1B.9
22V:s: VI:S: 33V
...(ii'
LM7818C
Electrical Characteristics
ODC :s: TA :s: + 125DC, VI = 27V, 10 = 500 mA, CI = 0.33 fJ.F, Co = 0.1 fJ.F, unless otherwise specified.
Symbol
Parameter
Conditions (Note 1)
Va
Output Voltage
TJ = 25DC
VRLINE
Line Regulation
TJ = 25DC
VRLOAD
Load Regulation
TJ = 25DC
Min
Typ
Max
Units
17.3
1B.0
1B.7
V
21V:s: VI:S: 33V
15
360
24V:S: VI:S: 30V
5.0
1BO
5.0 mA:S: 10 :s: 1.5A
12
360
250 mA :s: 10 :s: 750 mA
4.0
1BO
Vo
Output Voltage
21V:s: VI :s: 33V, 5.0 mA:S: 10:S: 1.0A, P :s: 15W
10
Quiescent Current
TJ = 25DC
17.1
4.5
1-277
mV
mV
1B.9
V
B.O
mA
III
LM7818C
Electrical Characteristics (Continued)
O'C
s:
s:
TA
+ 125'C, VI = 27V, 10 = 500 mA, CI = 0.33 /LF, Co = 0.1 /LF, unless otherwise specified
Symbol
Parameter
Conditions (Note 1)
I With Line
I With Load
Typ
Max
Units
No
Noise
~VI/~VO
Ripple Rejection
f = 2400 Hz, 10
Voo
Dropout Voltage
10 = 1.0A, TJ = 25'C
2.0
V
Ro
Output Resistance
f = 1.0 kHz
22
mO
(;luiescent Current
Change
21V
s:
Min
s: 33V
5.0 mA s: 10 s: 1.0A
TA = 25'C, 10 Hz s: f s:
~IO
VI
==
1.0
mA
0.5
100 kHz
350 mA, TJ = 25'C
53
110
/LV
69
dB
los
Output Short Circuit Current
TJ = 25'C, VI = 35V
200
mA
Ipk
Peak Output Current
TJ = 25'C
2.1
A
~Vo/~T
Average Temperature
Coefficient of Output Voltage
10 = 5.0mA
1.0
mV/'C
LM7824
Electrical Characteristics
s:
-55'C
TA
s:
Symbol
+ 125'C, VI = 33V, 10 = 500 mA, CI = 0.33 /LF, Co = 0.1 /LF, unless otherwise specified
Parameter
Conditions (Note 1)
Vo
Output Voltage
TJ = 25'C
VRLlNE
Line Regulation
TJ = 25'C
Vo
Output Voltage
s: VI s: 38V
30V s: VI s: 36V
5.0 mA s: 10 s: 1.5A
TJ =.25'C
250 mA s: 10 s: 750 mA
28V s: VI s: 38V, 5.0 mA s: 10 s: 1.0A, P s: 15W
10
Quiescent Current
TJ = 25'C
~Io
Quiescent Current
Change
Load Regulation
VRLOAO
I With Line
28V
I With Load
5.0 mA
s:
Min
Typ
Max
Units
23.0
24.0
25.0
V
18
240
6.0
120
12
240
4.0
120
27V
22.8
4.6
s: 38V
10 s: 1.0A
25'C, 10 Hz s: f s:
V
6.0
mA
0.8
s:
0.5
Noise
TA =
~VI/~VO
Ripple Rejection
f = 2400 Hz, 10 = 350 mA, TJ = 25'C
Voo
Dropout Voltage
10 = 1.0A, TJ = 25'C
2.0
Ro
Output Resistance
f = 1.0 kHz
28
los
Output Short Circuit Current
TJ = 25'C, VI = 35V
Ipk
Peak Output Current
TJ = 25'C
~Vo/~T
Average Temperature
Coefficient of Output Voltage
10 = 5.0mA
100 kHz
8.0
56
+25'C
s: TA s:
s: TA s:
40
66
mA
/LVIVO
dB
2.5
V
mO
0.75
1.2
A
2.2
3.3
A
+25'C
0.4
+125'C
0.3
mV/'C/
Vo
1.3
-55'C
mV
25.2
VI
No
mV
LM7824C
Electrical Characteristics
O'C
s:
TA
Symbol
s:
+ 125'C, VI = 33V, 10 = 500 mA, CI = 0.33 ,...F, Co = 0.1 /LF, unless otherwise specified
Characteristics
Conditions (Note 1)
Vo
Output Voltage
TJ = 25'C
VR LINE
Line Regulation
TJ = 25'C
Vo
Output Voltage
s: VI s: 38V
30V s: VI s: 36V
TJ = 25'C
5.0 mA s: 10 s: 1.5A
250 mA s: 10 s: 750 mA
27V s: VI s: 38V, 5.0 mA s: 10 s: 1.0A, P s: 15W
10
Quiescent Current
TJ = 25'C
VRLOAO
Load Regulation
Min
Typ
Max
Units
23.0
24.0
25.0
V
18
480
6.0
240
12
480
4.0
240
27V
22.8
4.6
1-278
mV
mV
25.2
V
8.0
mA
riii:
LM7824C
Electrical Characteristics
""-I
co
o
(Continued)
O'C :0: TA :0: + 125'C, VI = 33V, 10 = 500 mA, CI = 0.33 ""F, Co = 0.1 ""F, unless otherwise specified
Symbol
Quiescent Current
Change
Ala
I With Line
I With Load
(J)
Min
Typ
Max
27V:o: VI:O: 38V
1.0
5.0 mA:O: 10 :0: 1.0A
0.5
No
Noise
TA = 25'C, 10 Hz:o: f:O: 100 kHz
AVI/AVo
Ripple Rejection
f = 2400 Hz, 10 = 350 mA, TJ = 25'C
VDO
Dropout Voltage
10 = 1.0A, TJ = 25'C
Ro
los
50
Units
!/)
mA
170
""V
66
dB
2.0
V
Output Resistance
f = 1.0 kHz
28
m.(1
Output Short Circuit Current
TJ = 25'C, VI = 35V
150
mA
IPk
Peak Output Current
TJ = 25'C
2.1
A
AVo/AT
Average Temperature
Coefficient of Output Voltage
10 = 5.0mA
1.5
mV/,C
Note 1: For all tables, all characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw ~ 10 ms, duty cycle s 5%).
Output voltage changes due to changes in internal temperature must be taken into account separately.
Equivalent Circuit
IN
RB
100.11
R4
100k.l1
R18
500.11
OB
I
~12
R5
3.3k.l1
010
~
~-
j
Rl
1.0kll.
~
01
10-
R2
20k.l1
K07
~
R21~~017
I
"(
6BO.l1
R17
200.11
R12
240.11
Rll
0.3.11
OUT
~,
2.0 k.l1
R15
6.0 k.l1
... ~
... ~D2
016
05
R6
2.7kll.
10k.l1
09
O~
~
~ 013
~ R13
R9
100.11
/,
~ R20
0-19kll.
011
Cl
~,
04
R7
500.11
01~
RIO
6.0k.l1 ~
~ 02
03
R3
1.0k.l1
R19
5.0k.l1
R14
6.0 k.l1
COMMON
TLlH/100S2-3
1-279
...(ii'
CD
Conditions (Note 1)
Parameter
o
Typical Performance Characteristics
Worst Case Power DIssipation vs
Ambient Temperature (TO-3)
Peak Output Current vs
Input/Output
Voltage Differential
Worst Case Power Dissipation vs
Ambient Temperature (TO-220)
8.DrT-r~-r~rr'-rT'
H-t.~H-+-+-II-LM7805
"'
I
F"'1-Ir-:-I.....1:==!'....,.d-++--l
10
4.0
IB
1.0
~
5.0=r::-:_~
~:g H=:~""311'1"-.c,""'*1
0.5
0.4
0.3
50
75
100
125
150
100
AMBIENT TEIotPERATlJRE - "C
125
0
0
150
Current-Limiting
Characteristics
Dropout Voltage vs
Junction Temperature
8.D
12.2
2.5
LM7B05
LM7812
>
I
5.0
~
>
12.I
III
;:!!
~ 12.0
5o 119 _
......
v, = 19V
I
OAOB
8.D
r--r-
,
o
I
f I I
4.D
8.D
8.D
i
8.D
10
IS
20
25
30
35
-75 -50 -25 0 25 50 75 100 125150 175
INPUT VOLTAGE - V
JUNcnON TEMPERATlJRE - "C
Line Transient Response
40
INPUT VOLTAGE
>
I
I
Io
60
2D
I
10
100
I.oK
.
-20
10K
FREOUENCY - Hz
lOOK
o
>
I
~!i!
~
TJ = 25"C
10 = 500 rnA
Vo = 5.0V
1
TJ,~,2.5"C III I
1o: 5OOrnA
o
50
~~~~~~A.G~
v, = B.OV TO IBV
Vo = 5.0V
4.D
20
LM7805
I
i
/
3.6
5.010
80
40
LM7805
- ...
4.2
i:
LM7805
iil
r-r-
B
Ripple Rejection vs
Frequency
~
Vo = 5.0V
10 = 500 rnA
I
1o=1,.O A t
2.0
I- V, = 10V I
1 «
10 = 500rnA
100
Z
0
Quiescent Current vs
Junction Temperature
LM7B05
Vo - 5.0V
'L = 20 rnA
TJ = 2.5"C
INPUT VOLTAGE - V
~
JUNcnOH TEMPERATlJRE - "C
~ 10= 100mA
I
o
o
4B
~78~
I I
.fA ~ I I
I
I I
DROPOUT CONDITION5
/i,Vo = 5.11'.: or Vo I
-75-!iO-25 0 25 50 75100125150175
2.02.4
IB
F::~
I! ~o",. r--
......
Quiescent Current vs
Input Voltage
II
1.1
1.2
LM78XX
1.01- -
~-
r:::::::,
OUTPUT CURRENT - A
Dropout Characteristics
10 = 0,
1.0
~
Y
o
o
JUNCTION TEMPERATURE - "C
8.D
-r--.
~ 0.5
Vo = 5.0V
TJ = 25"C
I
-75 -!iO -25 0 25 50 75 100 125150 175
Vo = 5.0V
TJ = 2.5"C
5
5
v, = 10V
Vo = 12V
10 = 20rnA
liB -
~
1.5
I
I! ~
i"'-
2.0
is
...... t-..,
5
5.01015202530
INPUT/OUTPUT DlFFEREN1lAL - V
AMBIENT TEMPERATlJRE - "C
Output Voltage vs
Junction Temperature
>
1.5
1.0
0.5
= 15O"C
TJ MAX
25
I
2.0
0
o~~
>
2.5H-fI-+-'~-+-t-t--ir-+--H
z
8.D
0
!
~
!:l
!i!
5
2.0
1.0
Load Transient Response
V, = 10V
Vo = 5.0V
LOAD CURRENT
LM7805 2.0
1.0
1
I
~
iB
OUTPUT VOLTAGE
DEVlAnOH
§ -1.0
-2.0
2.0
4.D
8.D
8.D
nME -1'1
10
12
0102030405060
nME
-}II
TL/HI10OS2-4
1-280
r----------------------------------------------------------------------,r
:s:::
.......
Typical Performance Characteristics (Continued)
o
o
Output Impedance vs
Frequency
102
cj
I
1~:I=ll~V'
101
'"
u
z
i:'!i
'"
11.
1
LM780S
Vo = S.OV
TA = 2SoC
CL = O~F
11.
Jl
B1
VI
10 - 20 rnA
10°
0.33~F
±
LM7800
10-1
10 - SOO mA
10-2
10
100
lK
10K
III Wl
lOOK 1 M
FREQUENCY - Hz
TL/H/l0052-5
Note: The other LM7800 series devices have similar cUlVes.
1-281
iii'
til
2
±O'l~F
p
-b
-
0
..
en
CD
DC Parameter Test Circuit
;!
....=>
....=>
CD
Vo
TL1H/10052-6
Design Considerations
The LM7800 fixed voltage regulator series has thermal
overload protection from excessive power dissipation, internal short circuit protection which limits the regulator's maximum current, and output transistor safe-area compensation
for reducing the output current as the voltage across the
pass transistor is increased.
Although the internal power dissipation is limited, the junction temperature must be kept below the maximum specified temperature (150·C for LM7800, 125·C for LM7800C) in
order to meet data sheet specifications. To calculate the
maximum junction temperature or heat sink required, the
following thermal resistance values should be used:
Typ9JC
Max9JC
Typ9JA
Max9JA
·C/W
·C/W
·C/W
·C/W
TO-3
3.5
5.5
35
40
TO-220
3.0
5.0
40
60
Package
=
TJ M9BX TA (without heat sink)
JA
.
9CA = IIcs + liSA
Solving for TJ:
TJ = TA + Po (9JC + IIcAl or
= TA + P09JA (without heat sink)
Where:
TJ = Junction Temperature
TA = Ambient Temperature
Po = Power Dissipation
9JC = Junction-to-Case Thermal Resistance
9CA = Case-to-Amblent Thermal Resistance
IIcs = Case-to-Heat Sink to Thermal Resistance
liSA = Heat Sink-to-Ambient Thermal Resistance
9JA = Junction-to-Ambient Thermal Resistance
Typical Applications
Fixed Output Regulator
High Input Voltage Circuits
2
2
I--f---Vo
I--'----Vo
0.33pF
0.33pF
O.lpF
(NOTE 2)
(NOTE 2)
TLlH/l0052-7
TLlH/l0052-8
Not. 1: To specify an output voltage, substitute voltage value for "00".
Note 2: Bypass capacitors are recommended for optimum stability and transient response, and should be located as close as possible to the regulator.
I -.......-Vo
TL/H/l0052-9
High Current Voltage Regulator
01
VI _
I
...._ _-\:2N6133r-_ _ _....;;;;;;;Ql=.;...._ _ _- ,
Rl
3.04
LM7800
0.33pF
.B(Ql);'
Rl
2
10 MAX
-Vo
0.1 pF
10 Max
IREGMax
=~ =
IREG
.B(Ql)VSE(Ql1
IREG Max (.B + 1) - 10 Max
TLlH/l0052-10
1-282
,-----------------------------------------------------------------------------, r
s:::
Typical Applications (Continued)
!
High Output Current, Short Circuit Protected
Q
U)
CD
::l.
RSC
m
Q2
2N6124
2
I -..........--OUT
Rl
0.1 ).IF
0.33).1F
3.0.0.
0.8
Rse = Ise
Rl
=
TUH/l0052-11
/lVSE(011
IREG Max (Jl
+ 1) - 10 Max
Positive and Negative Regulator
LM7800
2
1-....._ - -.....- - + OUT
1.-....._ _ _....._ _ _...._ _......._
- OUT
TLlH/10052-12
1-283
~:!!
~ National
~ ~ Semiconductor
~
:=; LM78G/LM79G
4·Terminal Adjustable Voltage Regulators
General Description
Features
The LM7BG and LM79G are 4-terminal adjustable voltage
regulators. They are designed to deliver continuous load
currents of up to 1.0A with a maximum input voltage of
+40V for the positive regulator LM7BG and -40V for the
negative regulator LM79G. Output current capability can be
increased to greater than 1.0A through use of one or more
external transistors. The output voltage range of the LM7BG
positive voltage regulator is + 5V to + 30V and the output
voltage range of the negative LM79G is -30V to -2.55V.
For systems requiring both a positive and negative, the
LM7BG and LM79G are excellent for use as a dual tracking
regulator with appropriate external circuitry.
•
•
•
•
•
•
Connection Diagrams
-
0
--v-;
CONT
3
2
IN
Output current in excess. of 1A
LM7BG positive output + 5V to + 30V
LM79G negative output -30V to -2.55V
Internal thermal overload protection
Internal short circuit protection
Output transistor safe-area protection
- -"""4
OUT
0
COMM
3
2
IN
OUT
CONT
COMM
TLlH/t0054-2
TLlH/t0054-t
Top View
. Top View
Heat sink tabs connected to common through device substrate.
Heat sink tabs connected to input through device substrate. Not recommended for direct elactrical connection.
Order Number LM78GCP or LM79GCP
See NS Package Number P04A
1-284
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature Range
- 65·C to + 150·C
Operating Junction
O·Cto + 150·C
Temperature Range
Lead Temperature (Soldering, 10 sec.)
265·C
LM78G
Electrical Characteristics
o·c ~ TA ~ 125·C, CI = 0.33 p.F, Co = 0.1
Symbol
VIR
VOR
Output Voltage Range
Vo
Output Voltage
Tolerance
p.F, VI
= 25·C
VI = Vo +
5.0V
(Vo + 3.0V) ~ VI ~ (Vo + 15V),
5.0 rnA ~ 10 ~ 1.0A
Po ~ 15W, VI Max = 38V
TJ = 25·C, Vo ~ 10V
(I/o + 2.5V) ~ VI ~ (I/o + 20V)
VOLOAO
Load Regulation
TJ = 25·C,
VI ~ Vo + 5.0V
TJ
~
~
V+
V-
~
~
Vo
OV
250 rnA
5.0 rnA
~
~
10
10
Max
Units
7.5
40
V
5.0
30
V
Min
TJ
Line Regulation
Control Lead Current
OV
Vo-
= 10V, 10 = 500 rnA, Test Circuit 1, unless otherwise specified
Conditions (Notes 1, 3)
VOLINE
Ie
+40V
-40V
"
Parameter
Input Voltage Range
Internally Limited
Power Dissipation
Input Voltage
LM78G
LM79G
Control Lead Voltage
LM78G
LM79G
TJ
Typ
= 25·C
4.0
%Vo
5.0
1.0
~
~
750 rnA
1.0
1.5A
2.0
= 25·C
1.0
5.0
%Vo
%Vo
p.A
8.0
10
Quiescent Current
TJ
= 25·C
3.2
6.0
rnA
7.0
1:.vl/t.vO
Ripple Rejection
8.0V ~ VI ~ 18V, f = 2400 Hz,
Vo = 5.0V, Ie = 350 rnA
No
Nois'e
TJ = 25·C, 10 Hz < f < 100 kHz,
Vo = 5.0V, 10 = 5.0 rnA
VOO
Dropout Voltage
(Note 2)
los
Output Short
Circuit Current
TJ
Ipk
Peak Output Current
TJ
t.vo/A.T
Average Temperature
Coefficient of Output
Voltage
Ve
Control Lead Voltage
(Reference)
= 25·C, VI = 30V
= 25·C
Vo = 5.0V,
10 = 5.0 rnA
TJ
68
1.3
dB
78
8.0
40
p.VlVo
2.0
2.5
V
0.750
1.2
A
2.2
3.3
A
TA
= -55·Cto +25·C
0.4
TA
= 25·C to + 125·C
0.3
= 25·C
4.8
4.75
5.0
5.2
mV/·ClVo
V
5.25
.
,
R1 + R2
NDle 1: Vo IS defIned for the LM78G as Vo = ~ (5.0);
Note 2: Dropout Voltage is defined as that Input/output voltage differential which causes the output vollage to decrease by 5% 01 its initial value.
Nole 3: All characteristics except noise vollage and ripple rejection ratio are measured using pulse techniques (lw <: 10 ms, duty cycle <: 5%). Output voltage
changes due to changes in internal temperature must be laken into account separately.
1-285
LM79G
Electrical Characteristics O°C :$; TA :$; 125°C for LM79G, VI =
Co = 0.1 IlF, Test Circuit 2 and Note 3, unless otherwise specified
Symbol
-10V, 10
= 500 mA, CI = 2.0 IlF,
Max
Units
VIR
Input Voltage Range
TJ
= 25°C
-40
-7.0
V
VOR
Nominal Output
Voltage Range
VI
= Vo - 5.0V
-30
-2.55
V
Vo
Output Voltage
Tolerance
(Vo - 15V) :$; VI:$; (Vo - 3.0V),
5.0mA:$; lo:$; 1.0A
Po:$; 15W, VI Max = -3.8V
Parameter
Conditions (Note 1)
VOLINE
Une Regulation
TJ = 25°C, Vo ~ -10V
(Vo - 20V) :$; VI :$; (Vo - 2.5V)
VOLOAO
Load Regulation
TJ = 25°C,
VI = Vo = -5.0V
Ie
Control Lead Current
TJ
Min
TJ
Typ.
= 25°C
4.0
1.0
250 mA :$; 10 :$; 750 mA
1.0
5.0 mA:$; 10 :$; 1.5A
2.0
= 25°C
0.4
2.0
3.0
IQ
Quiescent Current
TJ
%Vo
5.0
= 25°C
2.5
2.0
%Vo
%Vo
IlA
rnA
8.0
AVI/AVo
Ripple Rejection
Vo = -8.0V, VI
Ie = 350mA
No
Noise
TJ = 25°C,10 HZ:$; f:$; 100 kHz,
Vo = -8.0V,lo = 5.0 mA
Voo
Dropout Voltage
(Note 2)
los
Output Short
CirCUit Current
TJ
= 25°C, VI = -30V
IPk
Peak Output Current
TJ
= 25"C
AVo/AT
Average Temperature
Coefficient of Output
Voltage
Vo = -5.0V,
10 = 5.0mA
Control Lead Voltage
(Reference)
TJ
Ve
= -13V, f = 2400 Hz,
50
1.3
25
80
IlVIVO
1.1
2.3
V
0.25
1.2 .
A
2.1
3.3
A
= -55°C to +25°C
TA = 25°C to 125°C
0.3
TA
= 25°C
dB
60
0.3
-.2.65
-2.68
-2.55
-2.45
rnVloClVo
V
-2.43
.
Rt + R2
Note 1: Vo IS defined for the LM79G as Vo = ~(-2.55).
Note 2: Dropout Voltage Is defined as that input/output voltage differential which causes the output voltage to decrease by·5% of Its Initial value.
Note 3: The convention for negetive regulators Is the algebraic value, thus -t5V is less than -tOV.
Note 4: All characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (Iw s: to ms. duty cycle s: ·5%). Output voltage
changes due to changes In Intemal tempersture must be taken into account separetely.
1-286
LM78G Equivalent Circuit
~---'------------'--------------'--------~~--~----~~--IN
R4
100 ko.
RIB
5000.
QI51-......=::=-I-W_.
Rll
0.3 ko.
R5
3.3 ko.
~~--------;---~~------~~----~---OUT
I-------+--------------------------coNTROL
R6
2.7 ko.
Dl
Rl
lko.
R7
5000.
.....------~~~~--~~-----------------COMMON
~--_.--_.--_.----_.--
TLlH/l0054-3
1-287
LM78G/LM79G
r-
t
,
JD~'
t
,
iC
~
t
COMMON
G)
m
.a
c
~.
Dl
..
CD
D2
~
(')
_I
~
CONTROL
R23
4kA.
-'"
~
OUT
•
IQ16
R9
15kA
1
R6
8000
R22
0.04kA
RIO
15kn:
R13
0.05kA
I
I
I 1- I l l 1
ft
1
1
IN
TlIH/l0054-4
~
;:;:
C
Typical Performance Curves for LM78G
Peak Output Current vs
Input/Output Differential Voltage
3D
g
I
5
1.0
5
!
2S
2D
Quiescent Current vs
Input Voltage
"
1bl"8~~S
,,~ ::;:;:~~
1.5
~~~!iii ~~~}::~
~oSt
D
0.5
~
40
I
10
15
25
20
30
INPUT/OUTPUT DIFFERENTIAL (V)
IO=·DDmA
Vo =5.DY
lD
I
If
5
~
W
""
~
~
-....
;;;;::~
VI=IOV
0.5 Vo =5.DV
10= 5DDmA
o
I
~
bt,l
-~
~-
-~
~
JUNCTION TEMPERATURE ('C)
....
125
175
1\
75
1\
z
~
r-..
iii
i
7D
800
llX10
.... 6 ...1:
~
~
15
60
o
1015202530
DUTPUT VDLTAGE (V)
Load Transient Response
Ripple Rejection vs Frequency
100
~~=5.o
-
LOAD CURRENT
1
'-
lD'
z
!
r!!UTPUT VOLTAGE
DEVIATION
c--
i
VI
80
~
D
-75-50-25 D 25 50 75100125150175
...... r--.
75
Ripple Rejection vs
Output Voltage
III
l=lDY
I
I
I
1' ....
-25 0 25
OUTPUT CURRENT (mA)
~.
o
1\
1.0
-75
lD'
-17.5
pA78G
DROPOUT CONDITIONS
4Vo=5:! Drvo
..... TJ=25'C
.....
-10.0
Dropout Voltage
vs Junction Temperature
vs Frequency
....
I'
r-.....
-715
INPUT VOlTAGE (V)
2S
I'
1.5
V1=10V
Vo=5.DY
-15.0
25
2.0
TEMPERATURE ('C)
-12.5
V
TJ=l25'C
I
Differential Control Voltage
vs Output Current
-s.o
;!
~8~
Ij
o
0.0
!-2.5
......
III
2
~
D
2.5
INPUT VOLTAGE (V)
Differential Control Voltage
vs Input Voltage
12
~
2DLL.L-'-.J....J'-'--'-...........L.-'-L...I
-5
lD
15
20
25 30 35
0
0
VO=5V It-H+t-l-l--H
IL =2DmA
TJ=25'C t-l-l-+H+t-l
3DH',-+-+-1-++-H-I-+-H
i
Control Current vs
Junction Temperature
3.D
60
<40
1=
ro 18
2D Vo =5.0V
-3
-2
o
D
10
~
~
nME (pa)
<40
50
60
10
~~~'CmAl
100
1.Dk
lDk
10D1e
mEQUENCY (Hz)
TL/H/l0D54-5
h289
Typical Performance Curves for LM79G
Une Transient Response
forLM78G
s'
..5,
3D
20
78Y05
INPUT VOlTAGE
30
6
~=I00mA
I'.
;,+~
~+ ~
OUTPUT VOLTAGE
DE'llATION
ro.
N
!:k~~
~~
10 = 500 mA
Vo=5.OV
o
4
6
10
20
15
25
o
o
30
o
1.0
.9
4JI
............ ~
V,=IOV
Vo=5.OV
",.,
T~=15"C
10=500mA
Vo"-5.DV
200
INPUT VOLTAGE (V)
.RJNCIIOH TEMPERATURE (CC)
Ripple Rejection
vs Output Voltage
...
"
20
1.1
~.
1.0
Ii
r-.
25
30
1000
~~ tIa.~ ..~
0.8 f-f-
80
i
~b.l"',t1.4
60
i""'
-fl~~ :""
11>4 -...;t"-
r~~W~~NS
0.4
20
v:~~~
o ?'=25CC
......
-75-50-15 0 15 50 75100125150175
OIIIPUT VOlTAGE (V)
600
100
I
I
.....~
0.8
600
Ripple Rejection
vs Frequency
1.4
~
~.
400
OUTPUT CURRENT (mA)
Dropout Voltage VB
Junction Temperature
III
1/
/
o
-75-50-25 0 15 50 75100115150175
15
1/
1.0
~
~
~
"- I'..
"
40
Differential Control Voltage
vs Output Current
.... ~
v
10
~
20 15 30
..... r...T~=I15CC
o
o
~
W
INPUT VOLTAGE (v)
Differential Control Voltage
vs Input Voltage
"-
40
5
INPUT/OUTPUT DlFFERENlW. (V)
Control Current vs
Junction Temperature
...
V
1
:'fI'Io...'-.
o
o
-20
11
10
nYE (PO)
.8
.7
.8
.5
'\
.4
.5
.1 V,=- OV
=5.DV
1 ~=-350mA
~:~~
1
1
-20
Quiescent Current vs
Input Voltage
Peak Output Current vs
Input/Output Differential Voltage
10
100
.RJNCIIOH TEMPERATURE (CC)
lk
10k
lOOk
F1IEQUENCY (Hz)
TUH/l0054-6
2
INPUT VOLTAGE
1
1
-2
Line Transient Response
Load Transient Response
3
II I I
I
I
I I
-
INPUT VOLTAGE
1
1\
I
I
- f - f- OUTP;IA~~AGE_ - f -
f-f-
I I
-;i~~~~A~fI
"
10 =500 mA
Vo=5V I
V,=IOV
Vo=5V
20
01020304050
nNE (PO)
40
60
60
100
nNE (PI)
TL/H/I 0054-1 0
TL/H/l0054-7
1·290
r-----------------------------------------------------------------------------'r
put transistor safe-area protection for reducing the output
current as the voltage across each pass 'transistor is increased.
Test Circuits
LM78G Test Circuit 1
Although the internal power dissipaiion is limited, the junction temperature must be kept below the maximum specified temperature in order to meet data sheet specifications.
To calculate the maximum junction temperature or heat sink
required, the following thermal resistance values should be
used:
+ R2)
--""R2
VCONT Nominal
~
Max
Typ
Max
'C/W
'C/W
'C/W
7.5
11
75
BO
.......
CXI
Ii)
.....
r
3:
.......
CD
Ii)
Package
TVH/l0054-8
Rl
Vo ~ (
Typ
'C/W
3:
Power Watt
VCONT
5.0V
P
_ TJMax-TA
o Max - 8JC + 8CA or
LM79G Test Circuit 2
= TJ Max - T A (without a heat sink)
8JA
8CA = 8CS + 8SA
Solving for TJ:
TJ = TA + Po(8JC + 8CA) or
= T A + Po8JA (without heat sink)
Where:
TJ = Junction Temperature
TA = Ambient Temperature
TL/H/l0054-9
Po = Power Dissipation
+ R2) VCONT
--""R2
Rl
Vo ~ (
VCONT Nominal
~
8JA = Junctiuon to Ambient Thermal Resistance
-2.55V
8JC = Junction to Case Thermal Resistance
Recommended R2 current '" 1.0 rnA
:. R2 ~ 5.0 kG (LM7BG)
R2 ~ 2.55 kG (LM79G)
8CA = Case to Ambient Thermal Resistance
8cs = Case to Heat Sink Resistance
8SA = Heat Sink to Ambient Thermal Resistance
Design Considerations
LM78G and LM79G
Power Tab (U1) Package
Worst Case Power Dissipation
100 vs Ambient Temperature
The LM7BG and LM79G Adjustable Voltage Regulators
have an output voltage which varies from VCONT to typically
R1 + R2
VI- 2.0Vby VO = VCONT~
LIMIT 78G/79G -The nominal reference in the LM7BG is 5.0V and LM79G is
-2.55V. If we allow 1.0 mA to flow in the control string to
eliminate bias current effects, we can make R2 = 5.0 kO in
the LM7BG. Then, the output voltage is; Vo = (R1 + R2)V,
where R1 and R2 are in kOso
Example: If R2 = 5.0 kO and R1 = 10 kO then
Vo = 15V nominal, for the LM7BG
R2 = 2.55 kO and R1 = 12.B kO then
Vo = -15.35 nominal, for the LM79G
III
By proper wiring of the feedback resistors, load regulation of
the device can be improved significantly.
Both LM7BG and LM79G regulators have thermal overload
protection from excessive power, internal short circuit protection which limits each circuit's maximum current, and out-
AMBIENT TEMPERATURE (OC)
TL/H/l0054-11
1-291
Typical Applications for LM78G .
Bypassing of the input and output (0.33 j.lF and 0.1 j.lF,
respectively) is necessary.
Positive High Current Short
Circuit, Protected Regulator
Basic Positive Regulator
Rse
I-~~-....-+vo
r-;;;;~.-_L..-+vo
loi'!.ax)
0.1 pF
TL/H/l0054-12
TL/H/l0054-15
Rl + R2)
VO=VCONT ( ~
± 10V, 1.0A, Dual Tracking
Regulator (Note 2)
Positive 5.0V to 30V
AdJustable Regulator
OUTI-....- -....-.VO
LM78G
1----4,.......- ....-.vo
.15V-.....--1IN
CONTROL
COMMON
TO.
1 J'F
7.55k.o.RCONTROL
TL/H/l0054-13
LM79G
-15V~....-tl~N_~O~UT~"'--"'--10V
Positive 5.0V to 30V
AdJustable Regulator
(10 > 5.0A) (Note 1)
Ql
1.0pF
7.45k.o.
TL/H/l0054-16
Positive High Current, Short...
Circuit Protected Regulator
1)4.0A2N6124
+vl -
--------::::=:---,
....
I-_+-+....-.VO
IN
32V_>-"\jrvY..........
I .. 220 mA-
OUT 1---..........--1
LM78G
CONTROL
COMMON
O.l3pF
TL/H/l0054-14
TLlH/l0054-17
Note 1: External series pass device is not short circuit protected.
Note 2: If load is not ground referenced. connect reverse biased diodes from
outputs to ground.
1·292
Typical Applications for LM79G
All LM78G applications apply to the LM79G under the following conditions: R2 values are 2.5 kn, all external transistors and
diodes reverse polarity.
.
- 30V to - 2.5V
Adjustable Regulator
Basic Negative Regulator
I - - -.....-
OUT
LM79G
.....O-VOUT
HP-.....- .....-O-vOUT
SOkl!.
2.5 kl!.
TLIHll0054-19
TLIHll0054-18
VOUT
RI + R2)
= -VCONT ( ""'R2
Negative High Current Short
Circuit Protected Regulator
Rsc
r-;;;1-.........
..!-1>-O-VOUT
31!.
VBc[Q1J)
( RSC=--
Isc
TLIHll0054-20
Adjustable Dual Tracking Regulator
OUTI--....LM78G
Negative High Current Voltage
Regulator External Series Pass
......-o+OUTPUT
PI
25kl!.
+INo---t---1H
-VOUT
R2
2.Skl!.
TLIHll0054-22
LM79G
-INo--.....------4HIN
P2
25k4
OUTI----+-....-o~OUTPUT
TLIHll0054-21
'Rx = Parallel combination of
(RI
+
PI) and (R2
+
P2).
Applications Hints
Bypass capacitors are recommended for stable operation of
the LM79G series of regulators over the input voltage and
output current ranges. Output bypass capacitors will improve the transient response of the regulator.
The bypass capacitors (2 ""F on the input, 1 ""F on the output), should be ceramic or solid tantalum which have good
high frequency characteristics. If aluminum electrolytics are
used, their values should be 10 ""F or larger. The bypass
capacitors should be mounted with the shortest leads, and if
possible, directly across the regulator terminals.
1-293
><
~ ~National
:I ~ Semiconductor
LM78LXX Series 3-Terminal Positive Regulators
General Description
The LM78LXX series of three terminal positive regulators is
available with several fixed output voltages making them
useful in a wide range of applications. When used as a zener diode/resistor combination replacement, the LM78LXX
usually results in an effective output impedance improvement of two orders of magnitude, and lower quiescent current. These regulators can provide local on card regulation,
eliminating the distribution problems associated' with single
point regulation. The voltages available allow the LM78LXX
to be used in logic systems, instrumentation, HiFi, and other
solid state electronic eqUipment. Although designed primarily as fixed voltage regulators these devices can be used
with external components to obtain adjustment voltages
and currents.
The LM78LXX is available in the metal three lead TO-39(H)
the plastic TO-92 (Z), and SO-8 plastic. With adequate heat
sinking the regulator can deliver 100 rnA output current.
Current limiting is included to limit the peak output current to
a safe value. Safe area protection for the output transistors
is provided to limit internal power dissipation. If internal power dissipation becomes too high for the heat sinking provided, the thermal shutdown circuit takes over.' preventing the
IC from overheating.
For output voltage other than 5V, 12V and 15V the LM117L
series provides an output voltage range from 1.2V to 37V.
Features
• Output voltage tolerances of ± 5% (LM78LXXAC) over
the temperature range
.
•
•
•
•
•
Output current of 100 rnA
Internal thermal overload protection
Output transistor safe area protection
Internal short circuit current limit
Available in plastic TO-92 and metal TO-39 and plastic
SO-8 low profile packages
Voltage Range
LM78L05
5V
LM78L12
LM78L15
12V
15V
Connection Diagrams
SO-8 Plastic
(Narrow Body)
Metal Can Package
OUTPUT
GNU
(CASE I
INPUT
VOUT -
1-
'-'
GND- 2
Plastic Package
OUT~PUT
8 -VIN
7 -GND
GND- 3
6 -GND
NC- 3 10. load regulation (t..-) '" URI
1·297
+
R2)/R1] (L, of LM78L05)
Typical ~ppllcatlons (Continued)
Current Regulator
--4..........
INPUT
RI
-
' - - - - -. .- - OUTPUT
lOUT
loUT == (V23/AI)
> Ie =
+
Ie
TL/HI7744-IO
1-.5 mA over line and load changes,
5V, 500 mA ,Regulator with Short Circuit Protection
1.1
V'N 'IOV o-"~N,,""+--L
VOUT
=5V AT &GO mA
4.4
'Sclld tantalum.
TUH/7744-11
"Heat sink 01.
"'Optional: Improves ripple rejection and transient response.
Load Aegulation: 0.6% 0 ,; IL ,; 250 mA pulsad with toN = 50 ms.
± 15V, 100 mA Dual Power Supply
+V'N '20V
o--...~
i - - - -...-o+V~T·,6VATloamA
-V'N • -20V
0--.....
~""--4""O -VOUT· -15V AT loa mA
TUH17744-12
'Solid tantalum.
Variable Output Regulator 0.5V-18V
~-...--~~----. .--t~V~T
+
R4
~I
":' RS
30 pF
TUH/7744-13
'Solld tantalum.
VOUT
VOUT
= VG + 5V. AI = (-VINlie LM78LOsl
== 5V (A2/A4) for (A2 + A3) == (A4 + A5)
A 0.5V output will correspond
to (A2/A4) ==
1·298
0.1 (A3/A4)
==
0.9
,------------------------------------------------------------------------. r
==
~National
"
b
Q)
~ Semiconductor
o
LM78LOO Series
3-Terminal Positive Voltage Regulators
General Description
Features
The LM7BLOO series of 3-terminal positive voltage regulators employ internal current-limiting and thermal shutdown,
making them essentially indestructible. If adequate heat
sinking is provided, they can deliver up to 100 mA output
current. They are intended as fixed voltage regulators in a
wide range of applications including local (on-card) regulation for elimination of noise and distribution problems associated with Single-point regulation. In addition, they can be
used with power pass elements to make high current voltage regulators. The LM7BLOO, used as a Zener diode/resistor combination replacement, offers an effective output impedance improvement of typically two orders of magnitude,
along with lower quiescent current and lower noise.
•
•
•
•
•
•
•
Connection Diagram
Output current up to 100 mA
No external components
Internal thermal overload protection
Internal short circuit current-limiting
Available in JEDEC TO-92
Output Voltages of 5.0V, 6.2V, B.2V, 9.0V, 12V, 15V
Output voltage tolerances of ±5% over the
temperature range
2
I
OUT
3
II
II
I
~-"-r '-SL IN
COt.lt.lON
TL/H/l00Sl-l
Top View
Order Number LM78L05ACZ. LM78L09ACZ.
LM78L 12ACZ. LM78L 15ACZ. LM78L62ACZ or LM78L82ACZ
See NS Package Number Z03A
1-299
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature Range
- 65°C to + 150°C
Operation Junction Temperature Range
Commercial (LM7BLOOAC)
O°C to + 125~C
Lead Temperature
TO·92 Package/SO·S
(Soldering, 10 sec.)
Power Dissipation
Input Voltage
5.0Vto 15V
ESD Susceptibility
265°C
Internally Limited
35V
to be determined
LM78L05AC
Electrical Characteristics
o"c ::;; TA ::;; + 125°C, VI = 10V, 10 = 40 mA, CI = 0.33 p.F, Co = 0.1
Symbol
Parameter
Vo
Output Voltage
VR LINE
Line Regulation
VRLOAD
Vo
TJ
Output Voltage
(Note 2)
la
Quiescent Current
Quiescent Current
Change
Conditions
= 25°C
TJ = 25°C
Min
Typ
Max
Units
4.8
5.0
5.2
V
7.0V ::;; VI ::;; 20V
55
150
B.OV ::;; VI ::;; 20V
45
100
1.0 mA::;; 10 ::;; 100V
11
60
1.0 mA ::;; 10 ::;; 40 mA
5.0
30
TJ
Load Regulation
ala
p.F, unless otherwise specified (Note 1)
= 25°C
7.0V ::;; VI ::;; 20V
1.0mA::;; 10::;; 40mA
4.75
5.25
7.0V ::;; VI ::;; VMax
1.0 mA::;; 10 ::;; 70 mA
4.75
5.25
2.0
I With Line
I With Load
5.5
B.OV ::;; VI ::;; 20V
1.5
1.0 mA ::;; 10 ::;; 40 mA
0.1
= 25°C,10 Hz::;; f::;; 100 kHz
= 120 Hz, 8.0V::;; VI ::;; 18V, TJ = 25°C
TJ = 25°C
TJ = 25°C
No
Noise
TA
aVI/aVo
Ripple Rejection
f
VOO
Dropout Voltage
Ipkllos
Peak Output/Output
Short Circuit Current
aVo/aT
Average Temperature
Coefficient of Output Voltage
10
= 5.0mA
.
41
mV
mV
V
mA
mA
40
p.V
49
dB
1.7
V
140
mA
-0.65
mV/oC
Note 1: The maximum sleady stale usable oulpul currenl and Inpul voltage are very dependenl on Ihe heal sinking andlor lead lenglh 01 the package. The data
above represenl pulse lesl condRlons wllh juncllon lemperatures as indicaled allhe Inilialion ollesls.
Note 2: Power Dissipation" O.7SW.
1·300
LM78L62AC
Electrical Characteristics
O'C:s: TA:S:
+ 125'C, VI =
Symbol
= 40 mA, CI = 0.33 ,..,F, Co = 0.1
Parameter
Vo
Output Voltage
VR LINE
Line Regulation
VRLOAO
12V, 10
Load Regulation
10
Quiescent Current
ala
Quiescent Current
Change
No
Noise
Conditions
= 25'C
TJ = 2S'C
Min
Typ
Max
Units
5.95
6.2
6.45
V
B.5V :s: VI :s: 20V
65
175
9.0V :s: VI :s: 20V
55
125
TJ
TJ
Output Voltage
(Note 2)
Vo
,..,F, unless otherwise specified (Note 1)
= 25'C
B.5V :s: VI :s: 20V
B.5V
s: VI
:s: VMax
1.0mA:S: 10:S: 100mA
13
BO
1.0 mA:S: 10 :s: 40 mA
6.0
40
1.0mA:S: 10:S: 40mA
5.90
6.5
1.0mA:s: 10:S: 70mA
5.90
6.5
2.0
I With Line
I With Load
1.5
aVI/aVo
Voo
Dropout Voltage
Ipk/los
Peak Output/Output
Short Circuit Current
aVO/aT
Average Temperature
Coefficient of Output Voltage
= 25'C,10 Hz :s: f s: 100 kHz
f = 120 HZ,10V s: VI :s: 20V, TJ = 25'C
TJ = 25'C
TJ = 25'C
10
mV
V
mA
mA
0.1
TA
Ripple Rejection
5.5
s: VI s: 20V
1.0 mA :s: 10 s: 40 mA
B.OV
mV
40
= 5.0mA
50
,..,V
46
dB
1.7
V
140
mA
-0.75
mVl'C
LM78L82AC
Electrical Characteristics
O'C
s:
TA
s: + 125'C, VI = 14V, 10 = 40 mA, CI = 0.33 ,..,F, Co = 0.1
Symbol
Parameter
Vo
Output Voltage
VR LINE
Line
VRLOAO
Vo
= 25'C
TJ = 25'C
Load Regulation
TJ
Output Voltage
(Note 2)
10
Quiescent Current
Quiescent Current
Change
Min
Typ
Max
Units
7.87
8.2
8.53
V
s: VI s: 23V
12V s: VI s: 23V
1.0 mA:s: 10 s: 100 mA
80
175
70
125
15
80
1.0 mA :s: 10:S: 40 mA
8.0
40
TJ
Regula~ion
ala
,..,F, unless otherwise specified (Note 1)
Conditions
11V
= 25'C
11V s: VI :s: 23V
1.0mA:s: 10
s: 40mA
7.8
B.5
11V:s: VI :s: VMax
1.0 mA:s: 10:S: 70 mA
7.8
8.6
2.1
I With Line
I With Load
5.5
12V:s: VI:S: 23V
1.5
1.0 mA :s: 10 :s: 40 mA
0.1
= 25'C,10 Hz s: f:s:
No
Noise
TA
aWaVo
Ripple Rejection
VOO
Dropout Voltage
Ipk/los
Peak Output/Output
Short Circuit Current
= 120 Hz, 12V:s: VI s: 22V, TJ = 25'C
TJ = 25'C
TJ = 25'C
aVo/aT
Average Temperature
Coefficient of Output Voltage
f
10
= 5.0mA
100 kHz
39
mV
mA
V
mA
mA
60
,..,V
45
dB
1.7
V
140
mA
-0.8
mV/'C
Note 1: The maximum steady state usable output current and Input voltage are very dependent on the heat sinking andlor lead length 01 the package. The data
above represent pulse test conditions with junCllon temperatures as Indicated at the Initiation 01 tests.
Nola 2: Power Dissipation,; O.75W.
1·301
LM78L09AC
Electrical Characteristics
O°C :s: TA :s:
+ 125°C, VI =
Symbol
Output Voltage
VRLINE
Line Regulation
Vo
= 40 mA, CI = 0.33 ,...F, Co = 0.1 ,...F, unless otherwise specified (Note 1)
Parameter
Vo
VRLOAD
15V, 10
Conditions
= 25°C
TJ = 25°C
Load Regulation
TJ
Output Voltage
(Note 2)
10
Quiescent Current
ala
Quiescent Current
Change
Min
Typ
Max
Units
8.64
9.0
9.36
V
. 11.5V:S: VI:S: 24V
90
200
13V:S: VI:S: 24V
100
150
1.0mA:s: 10:S: 100mA
20
90
1.0 mA :s: 10:S: 40 mA
10
45
TJ
= 25°C
11.5V:S: VI:S: 24V
1.0 mA:S: 10 :s: 40 mA
8.55
9.45
11.5V:S: VI :s: VMax
.1.0mA:S: 10:S: 70mA
8.55
9.45
2.1
11.5V:S: VI:S: 24V
1.5
I With Load
1.0 mA :s: 10:S: 40 mA
0.1
aVI/aVo
Ripple Rejection
= 25°C, 10 Hz:s: f:s: 100 kHz
f = 120 Hz, 15V:s: VI :s: 25V, TJ = 25°C
VDO
Dropout Voltage
TJ
Ipk/los
Peak Output/Output
Short Circuit Current
aVO/aT
Average Temperature'
Coefficient of Output Voltage
No
Noise
TA
+ 125°C, VI = .19V, 10 =
Symbol
10
= 5.0mA
Output Voltage
VRLlNE
Line Regulation
VRLOAD
Vo
Conditions
= 25°C
TJ = 25°C
TJ
Output Voltage
(Note 2)
10
Quiescent Current
ala
Quiescent Current
Change
mA
mA
70
,...V
44
dB
1.7
V
140
mA
-0.9
mVI"C
Min
Typ
Max
Units
11.5
12
12.5
V
14.5V :S:VI':S: 27V
120
250
16V:S: VI:S: 27V
100
200
= 25°C
1.0mA:S: 10:S: 100mA
20
100
1.0mA:S: 10:S: 40mA
10
50
14.5V :s:' VI :s: 27V
1.0 mA:S: 10:S: 40 mA
11.4
12.6
14.5V :s: VI :s: VMax
1.0mA:S: 10:S: 70mA
11.4
12.6
2.1
I With Line
I With Load
V
= 0.33 ,...F, Co = 0.1 ,...F, unless otherwise specified (Note 1)
TJ
Load Regulation
mV
.', '~. "
40 mA, CI
Parameter
Vo
38 '
= 25°C
TJ = 25°C
LM78L12AC
Electrical Characteristics
O°C :s: TA :s:
5.5
I With Line
mV
,5.5
16V:S: VI:S: 27V
1.5
1.0 mA:S: 10:S: 40 mA
0.1
= 25°C, 10 Hz:s: f:S: 100 kHz
= 120 Hz, 15V:s: VI :s: 25V, TJ = 25°C
TJ = 25°C
TJ = 25°C
NO
Noise
TA
aVI/aVo
Ripple Rejection
f
VDO
Dropout Voltage
Ipk/los
Peak Output/Output
Short Circuit Current
37
mV
mV
V
mA
mA
80
,...V
42
dB
1.7 "
V
140
mA
Average Temperature
10 = 5.0mA
-1.0
mVI"C
Coefficient of Output Voltage
Note 1: The maximum sleady stale usable output currenl and Inpul voltage are very dependenl on Ihe heat sinking and/or lead length of Ihe package. The data
above represent pulse lest conditions with junction tamperatures as indicaled allhe inlliation of lesls.
Note 2: Power Dissipation s; O.75W.
aVO/aT
1-302
LM78L15AC
Electrical Characteristics
o'c ~ TA ~ + 125'C, v, = 23V, 10 = 40 mA, C, = 0.33 ,...F, Co = 0.1 ,...F, unless otherwise specilied (Note 1)
Symbol
Parameter
Conditions
Vo
Output Voltage
TJ
VRLlNE
Line Regulation
TJ
= 25'C
= 25'C
Vo
Load Regulation
TJ
Output Voltage
(Note 2)
= 25'C
~
17.5V
V,
Quiescent Current
41a
Quiescent Current
Change
~
~
V,
Max
Units
V
15
15.6
130
300
V,
~
110
250
100mA
25
150
12
75
30V
30V
1.0mA~ 10~
~
30V
17.5V ~ V, ~ VMax
la
Typ
14.4
~
17.5V
20V
VRLOAD
Min
1.0 mA
~
10
~
40 mA
1.0mA
1.0mA
~
10
~
40mA
14.25
15.75
~
10
~
70mA
14.25
15.75
2.2
I With Une
I With Load
20V
~
V,
1.0mA
~
~
5.5
30V
1.5
~
0.1
10
40mA
= 25'C, 10 Hz ~ 1 ~
NO
Noise
TA
4Vj!4VO
Ripple Rejection
1 = 120 Hz, 18.5V
Voo
Dropout Voltage
Ipkllos
Peak Output/Output
Short Circuit Current
= 25'C
TJ = 25"C
~
V,
28.5V, TJ
= 25'0
V
mA
mA
90
,...V
dB
1.7
V
140
mA
34
TJ
mV
39
100 kHz
~
mV
Average Temperature
10 = 5.0mA
-1.3
mV/'C
Coefficient 01 Output Voltage
Note 1: The maximum steady stete usable output current and input voltage are very dependent on the heat sinking and/or lead length of the package. The data
above represent pulse test conditions with Junction temperatures as Indicated at the Inftiation of tests.
Note 2: Power Dissipation,; O.75W.
4Vo/4T
Equivalent Circuit
IN
-~
J_
l ..,
05
~
~~ ~
--:(0\7
Ot5~
m?- ~~
"-
C3
~
JL
02
"
OIO~
::~
r
I.OkA
R8
O.4kA
OUT
,A
~ ~~:34kA TO
12.43kA
'--R9
2.566kA
H4
-(03
Z,5.6Y
R23
3.3kA
R7
CI 013
IOpr
H6
I 2.078 kA
H2
8.952k4
~~
R21
I.OkA
~,:U
c~
'i
RIg
tOOkA
Oll~
O.805kA
HI
O.724kA
"'lI
012
H5
O.834kA
COMMON
TI.lH/l00SI-2
1-303
Typical Performance Characteristics
Worst Case Power
Dissipation vs
Ambient Temperature (TO-92)
.,.
I
'5.0
1
. Dropout Voltage vs
Junction Temperature
I I
>
=
ff-
2.0
;!!
~
I
I
.1'"
2.0
~
-,..
1.5
m
15
~~f_
0.2 0.125 IN. LEAD UNGTH
o1_
FROU P.e. BOARD.
.
I I FREE AIR
lui781.05
1
0.125 IN. LEAD UNGTH
FROM P.e. BOARD;~=:+::1.0 iii. r- WITH 72"C/W ~EAT SINK
I i
0.5
z
Dropout Characteristics
BD
2.5.
II ,"70,£=-rJ!.'" 40 1114
II ,",.01114 ~
!5 1.0
0.05 ;:::: i=tA IN. LEAD LENGTH f- ~ .
0.02 ' FROM p.c. BOARD.
0.01 . '
I I I FREEAlR
25
50
75
100
125 . 150
r=
10= 1.0mA ""-
~~
5
2.0
0
~
I
I
4.0
!5
5
~ 0.5
so
25
75
100
10 = lOOmA
I
I
0
0
125
!)r
~
10 = 4OmA,
DROPOUTS CONDITIONS
-i-:rAVo = S.OX OF Vo
0
0
ui7s.1s
BD
1
...
-- f-
Vo "s.oV
TJ.= 25"1:
>
BD
4.0
2.0
BD
10
'I,;'
JUNCI10N ltMPERATURE - "C
AMBIENT ltMPERATURE - "C
Quiescent Current vs
Iflput Voltage
711
1
~o==~.::,x-
611
.u
1-4.0
TJ = 25"C
1
138
i. 5D4.0
i3
§
!:!
5
Ii3
2.0
III
0
.5D
LU~B~S
r-."
Ripple Rejection vs
Frequency
..
100
LU78L05
-,
80
'II
1
:-..
3.6
i
3.0
,
Quiescent Current vs
Temperature
LM78L05
.....
3.4
z
80
~
"
iil
"i\
32
VI = 10V
3.0 Vo = s.ov
'o=4OmA
40
E
2.8
10
20
IS
25
30
0
25
INPUT VOLTAGE - V
50
75
Line Transient Response
1
INPUT VOLTAGE
300
LU78LOS
I
I
100
I11K
D
10
125
1
15
10
200
III 100
0
~OUTPUT VOLTAGE
DEVlAlION
0
1
~
~
~"
y
is
!5
Vo = S.OV
-zoo
0
2.0
LOAD CURRENT
3.0
LU78L05
100
0
!
~
~
S
lOOK
2.0
0
t
1
is
III
II!
OUTPUT VOLTAGE
J, DEVlA110N
0
i3
§
,f
~ -Ill, VI = 10V
5-100 '0 = lOOmA (RESIS11VE LOAD)
0
z
10K
FREQUENCY - Hz
>
>
1
~
=
J = 25"1: III
Load Transient Respon~
4.0
20
'
z
>!i
100
VI.:' B.OY TO ~v
20 Vo S.DV
~=IOOmA
AUBIENT ltMPERATURE - "C
«XI.
'Ii
INPUT VOLTAGE - V
-2.0 Vo = S.OY
4.0
611
BD
10.0 12.0
0
10
liME - PI
20
30
4)
50
60
liME - PI,
TLlHI1 0051-3
Note: Olher LM78LOO Series devices have similar curves. .•
"
"
1·304
r-
s::
......
Design Considerations
co
The LM~BL series regulators have thermal overload protection from excessive power, internal short-circuit protection
which limits each circuit's maximum current, and output
transistor safe-area protection for reducing the output current as the voltage across each pass transistor is increased.
b
o
1PE (WATIS)
Although the internal power dissipation is limited, the junction temperature must be kept below the maximum specified temperature (125·C) in order to meet data sheet specifications. To calculate the maximum junction temperature or
heat sink required, the following thermal resistance values
should be used:
TA
'----.......----1:111---1
TL/H/100S1-4
Package
Typ
IIJC
Max
IIJC
TO-92
Typ
IIJA
Max
IIJA
1S0
1S0
FIGURE 1. TO-92 Thermal Equivalent Circuit
Methods of Heat Sinking
With two external thermal resistances in each leg of a parallel network available to the circuit designer as variables, he
can choose the method of heat sinking most applicable to
his particular situation. To demonstrate, consider the effect
of placing a small 72 ·C/W flag type heat sink, such as the
Staver F1-7D-2, on the LM7BLOO molded case. The heat
sink effectively replaces the IICA (Figure 2) and the new
thermal resistance, II' JA, equals 145 ·C/W (assuming, 0.125
inch lead length).
Thermal Considerations
The TO-92 molded package is capable of unusually high
power dissipation due to the lead frame design. However, its
thermal capabilities are generally overlooked because of a
lack of understanding of the thermal paths from the semiconductor junction to ambient temperature. While thermal
resistance is normally specified for the device mounted
1 cm above an infinite heat sink, very little has been mentioned of the options available to improve on the conservatively rated thermal capability.
The net change of 15 ·C/W increases the 1l1l0wable power
dissipation to O.BSW with a minimal inserted cost. A still
further decrease in II JA could be achieved by using a heat
sink rated at4S·C/W, such as the Staver FS-7A. Also, if the
case sinking does not provide an adequate reduction in total
II JA, the other external thermal resistance, II LA, may be reduced by shortening the lead length from package base to
mounting medium. However, one point must be kept in
mind. The lead thermal path includes a thermal resistance,
liSA, from the leads at the mounting point to ambient, that is,
the mounting medium. liLA is then equal to ilLS + liSA. The
new model is shown in Figure 2.
In the case of a socket, liSA could be as high as 270 ·C/W,
thus causing a net increase in IIJA and a consequent decrease in the maximum dissipation capability. Shortening
the lead length may return the net IIJA to the original value,
but lead sinking would not be accomplished.
In those cases where the regulator is inserted into a copper
clad printed circuit board, it is advantageous to have a maximum area of copper at the entry points of the leads. While it
would be desirable to rigorously define the effect of PC
board copper, the real world variables are too great to allow
anything more than a few general observations.
An explanation of the thermal paths of the TO-92 will allow
the designer to determine the thermal stress he is applying
in any given application.
The TO-92 Package
The TO-92 package thermal paths are complex. In addition
to the path through the molding compound to ambient temperature, there is another path through the leads, in parallel
with the case path, to ambient temperature, as shown in
Figure 1.
The total thermal resistanqe in this model is then:
IIJA = (IIJC + IICA) (IIJL + liLA>
IIJC + IICA + IIJL + liLA
(1)
Where:
IIJC =
thermal resistance of the case between the regulator die and a point on the case directly above
the die location.
IICA = thermal resistance between the case and air at
ambient temperature.
IIJL =
liLA =
IIJA =
thermal resistance from regulator die through the
input lead to a point 1f16 inch below the regulator
case.
total thermal resistance of the input/output
ground leads to ambient temperature.
junction to ambient thermal resistance.
1-305
C)
r----------------------------------------------------------------------------,
:I Methods of Heat Sinking (Continued)
:e
:::E
...I
The best analogy for PC board copper is to compare it with
parallel resistors. Beyond some point, additional resistors
are not significantly effective; beyond some pOint, additional
copper area is not effective.
I
p[ (WATTS)
TA
Regulator power dissipation at maximum input voltage and
maximum load current is now
Po Max ;" (V1 - Vol ILMax + vila
where:
V1 = VI Max - (lLMax + 10) R1'
The presence of R1 will affect load regulation according to .
the equation:
(4)
Load regulation (at constant VI)
= load regulation (at constant V1)
+ line regulation (mV per V)
x (RI) x (.1IL>.
As an example, consider a 15V regulator with a supply voltage of 30 ± 5.0V, required to supp,ly a maximum load current of 30 mA. 10 is 4.3 mA, and minimum load current is to
be 10 mA.
L..---~--IIIt__----I
R1 =
TL/H/l00Sl -s
FIGURE 2. TO-92 Thermal Equivalent Circuit
(Lead at other than Ambient Temperature)
(5)
=354+115
= 470 mW, which permit operation up to
R1
Cl
TL/H/l00Sl -6
70"C in most applications.
Line regulation of this circuit is typically 110 mV for an input
range of 25V-35V at Ii constant load current; i.e. 11 mV/V.
(6)
Load regulation = constant V1 load regulation
(typically 10 mV, 10, mA-30 mA IL)
+ (11 mV/v) x 0.24 x 20 mA
(typically 53 mV)
= 63 mV for a load current change of
20 mA at a cons.tant VI of ~OV.
Typical Applications
C2
0.1 JlF 10-30mA
RL
I N - - -........
C1
O.33I'F
(NOTE 2)
TLlH/l00S1-7
Where it is necessary to operate a LM78LOO regulator with a
large input/output differential voltage, the addition of series
resistor R 1 will extend the output current range of the device by sharing the total power dissipation between R1 and
the regulator.
R1 = VI Min - Vo - 2.0V
ILMax + 10
.
25 -15 - 2 . 8
30 + 4.3 = 34.3 "" 2400
V1 = 35 - (30 + 4.3) 0.24 = 35 - ~.2 ,;, 26.8V
Po Max = (26.8 -15) 30 + 26.8 (4.3)
High Dissipation Applications
T
(3) .
t-......---OUT
C2
O.lI'F ,
(NOTE 2)
TL/H/l00S1-6
Note 1: To specify an OIItput voltage. substitute voltage value for "00".
Note 2: Bypass capacitors are recommended for optimum stability and tran·
sient response and should be located as close as pO~ible to the regulator.
(2)
where:
10 is the regulator quiescent current.
1-306
JI?'A National
~ Semiconductor
LM78MG/LM79MG
4-Terminal Adjustable Voltage Regulators
General Description
Features
The LM7BMG and LM79MG are 4-terminal adjustable voltage regulators. They are designed to deliver continuous
load currents of up to 500 mA with a maximum input voltage
of +40V for the positive regulator LM7BMG and -40V for
the negative regulator LM79MG. Output current capability
can be increased to greater than 1OA through use of one or
more external transistors. The output voltage range of the
LM7BMG positive voltage regulator is 5.0V to 30V and the
output voltage range of the negative LM79MG is -30V to
-2.2V. For systems requiring both a positive and negative,
the LM7BMG and LM79MG are excellent for use as a dual
tracking regulator.
•
•
•
•
•
•
Connection Diagrams
Ordering Information
-
0
LM78MG
-...r-;4
3
2
1
CONT
OUT
IN
COMM
TUH/l0058-1
Top View
Heat sink tabs connected to input through device substrate. Not recom-
mended for direct electrical connection.
-0
LM79MG
-...r-;4
3
2
1
IN
OUT
CONT
COMM
TL/H/l0058-2
Top View
Heat sink tabs connected to Input through device substrate. Not recom·
mended for direct electrical connection.
1-307
Output current in excess of 0.5A
LM7BMG positive output voltage + 5.0V to + 30V
LM79MGnegative output voltage -30V to -2.2V
Internal thermal overload protection
Internal short circuit current protection
Output transistor safe-area protection
Device
Code
Package
Code
Package
Description
LM7BMGCT
LM79MGCT
P04A
P04A
Molded 4-Lead TO-202
Molded 4-Lead TO-202
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage
LM78MGC
LM79MGC
Storage Temperature Range
Control Lead Voltage
LM78MGC
LM79MGC
- 65'C to + 150'C
Operating Junction Temperature
Range
Lead Temperature (Soldering, 10 sec.)
O'Cto + 150'C
. +40V
-40V
265'C
Internal Power Dissipation
Internally Limited
LM78MGC
Electrical Characteristics
Co
=
O'c ~ TA ~ 125'C lor LM78MGC, VI
0.1 ,...F, Test Circuit 1, unless otherwise specified
Symbol
Parameter
TJ
VOR
Output Voltage Range
VI
Vo
Output Voltage Tolerance
(Vo + 3.0V) ~ VI ~ (VO + 15V),
5.0 mA ~ 10 ~ 350 mA,
Po ~ 5.OW, VI Max = 38V
VOLOAO
Load Regulation
Ie
Control Lead Current
10V, 10
=
. Min
= 25'C
= Vo +5.OV
VIR
Line Regulation
=
Conditions (Notes 1, 3)
Input Voltage Range
VOLINE
OV ~ V+ ~ Vo
. Vo- ~ V- ~ OV
Typ
7.5
5.d
TJ
=
= 25'C, 5.0 mA
= Vo +7.0V
TJ = 25'C
~
10
0.33·,...F,
Max
Units
40
V
30
V
4.0
25'C
TJ = 25'C,IO = 200 mA, Vo ~ 10V,
(Vo + 2.5V) ~ VI ~ (Vo + 20V),
TJ = 25'C,IO = 200 mA, Vo ~ 10V
TJ
VI
=
350 mA, CI
~ 500 mA,
1.0
5.0
% (VO)
1.0
%(Vo)
1.0
% (Vo)
6.0
,...A
7.0
IQ
Quiescent Current
=
TJ
2.8
25'C
5.0
mA
6.0
RR
Ripple Rejection
10 = 125 mA, 8.0V
=
Vo
NO
Output Noise Voltage
VOO
Dropout Voltage
(Note 2)
=
~ VI ~ 18V,
2400 Hz
10 Hz ~ I ~ 100 kHz, Vo
= 35V, TJ =
= 25'C
los
Short Circuit Current
VI
Ipk
Peak Output Current
TJ
AVo/AT
Average Temperature
Coefficient 01 Output
Voltage
Vo
Control Lead Voltage
(Relerence)
TJ
Ve
5.OV, f
=
5.OV,
10 = 5.OmA
=
=
62
5.OV
80
8
40
,...V/
Vo
2
2.5
V
600
mA
1.4
A
25'C
0.4
TA
TA
=
=
dB
0.8
-55'Cto +25'C
0.4
25'C to 125'C
0.3
4.8
25'C
4.75
1·308
5.0
5.2
5.25
mV/'C/
Vo
V
LM79MGC
Electrical Characteristics
Co
O'C ,,; TJ ,,; 125'C for LM79MGC, VI
Symbol
Conditions (Notes 1, 3 & 5)
Parameter
= 25'C
VI = Vo - 5.0V
VIR
Input Voltage Range
VOR
Output Voltage Range
Vo
Output Voltage Tolerance (Vo - 15V) ,,; VI ,,; (Vo - 3.0V),
5.0 rnA ,,; 10 ,,; 350 rnA,
PD"; 5.0W, VI Max = -3aV
VOLINE
Line Regulation
VOLOAD Load Regulation
Control Lead Current
Ie
= -14V, 10 = 350 rnA, CI = 2.0 ",F,
= 1.0 ",F, Test Circuit 2, unless otherwise specified
TJ
TJ
Max
Units
-40
Min
Typ
-7.0
V
-30
-2.23
V
= 25'C
4.0
5.0
% (Vo)
TJ = 25'C,IO = 200 mA, Vo ,,; -10V,
(Vo - 20V) ,,; VI ,,; (Vo - 2.5V),
TJ = 25'C,IO = 200 mA, Vo"; -10V
1.0
% (Vo)
VI = Vo - 7.0V, 5.0 mA ,,; 10 ,,; 500 rnA,
TJ = 25'C
1.0
% (Vo)
TJ
= 25'C
2.0
",A
3.0
Quiescent Current
IQ
TJ
= 25'C
0.5
2.5
mA
3.5
RR
Ripple Rejection
TJ = 25'C,10 = 125 mA, VI
Va = -5.0V, f = 2400 Hz
No
Noise
10 Hz,,; f ,,; 100 kHz, Va
IL = 50mA
VDO
Dropout Voltage
los
Short Circuit Current
Ipk
Peak Output Current
I1Voll1T Average Temperature
Coefficient of Output
Voltage
Ve
Control Lead Voltage
(Reference)
= -13V,
50
= -a.ov,
dB
25
1.1
VI
= 35V, TJ = 25'C
0.4
Vo = -5.0V,
10 = -5.0mA
TJ
TA
TA
= -55'Cto +25'C
= 25'Cto 125'C
= 25'C
0.65
ao
2.3
V
600
rnA
1.4
rnA
0.3
0.3
-2.32 -2.23 -2.14
-2.35
",VI
Va
mVl'CI
Va
V
-2.11
.
~+~
~+~
Note 1: Vo IS defined for the LM78MGC as Vo = R2(S.O); the LM79MGC as Vo = ~ (-2.23).
Note 2: Dropout voltage is defined as that input/output voltage differential which causes the output voltage to decrease by 5% of its initial value.
Note 3: All characteristics except noise voltage and rtpple rejection ratio are measured using pulse techniques (tw s: 10 ms, duty cycle s: 5%). Output voltage
changes due to changes in Internal temperalllre must be taken Into account separately.
Note 4: The convention for negative regulators is the Algebraic value, thus -15V is less than -IOV.
1-309
LM78MG Equivalent Circuit
~---'------------~--------------~--------~~---'~----'----IN
R9
400D.
R4
100 kD.
R18
SOOD.
R13
10 kD.
02
Rll
0.6kD.
RS
3.3 kD.
~~--------~~--~----------~----~----OUT
I----+--------------CONTROL
R6
2.7kD.
01
R7
SOOD.
~--~--~~~~--~~~~------~--~~--~~-----------------COMMON
TL/H/10058-3
1-310
r
s:
.....
CO
s:
COMMON
~
m
01
....
.... -02
.a
c
~~
I
<'
I
I»
iii'
:s
CONTROL
R23
4k.ll.
~
c.,
I
~I
~
I
I
II
I I I I II I
I
t
J
n
Q
""I
n
C
;:::;:
Z
9CD
~
-=
I I
l ~ ,P-
OUT
,
IN
9.4k.ll.
Q16
R9
7.5k.ll.
Rll
17.5
k.ll.
R6
800.ll.
,
,
,
'"
,
,
"
TUH/10058-4
Nate 1: Resistor values in
n unless otherwise noted.
9W6lWl/9W9lWl
Design Considerations
Typical Applications for
LM78MG (Note 1)
The LM78MG and LM79MG variable voltage regulators
have an output voltage which varies from VCONT to typically
VI - 2.0Vby VO = VCONT
(R1
Bypass capacitors are recommended for stable operation of
the LM78MG over the input voltage and output current
ranges. Output bypass capacitors will improve the transient
response of the regulator.
+ R2)
R2
The nominal reference in the LM78MG is 5.0V and
LM79MG is -2.23V. If we allow 1.0 mA to flow in the control swing to eliminate bias current effects, we can make R2
= 5 k!l. in the LM78MG. The output voltage is then: Vo =
(R1 + R2) Volts, where R1 and R2 are in k!l.s.
Example: If R2
Vo =
R2 =
Vo =
The bypass capacitors, (0.33 fLF on the input, 0.1 fLF on the
output) should be ceramic or solid tantalum which have
good high frequency characteristics. The bypass capacitors
should be mounted with the shortest leads, and if pOSSible,
directly across the regulator terminals.
= 5.0 k!l. and R1 = 10 k!l. then
Note 1: All resistor values in ohms.
15V nominal, for the LM78MG;
2.2 k!l. and R1 = 12.8 k!l. then
-15.2V nominal, for the LM79MG.
Basic Positive Regulator
By proper wiring of the feedback resistors, load regulation of
the devices can be improved significantly.
OUT I - -.....- .....-+Vo
LM78MG
Both LM78MG and LM79MG regulators have thermal overload protection from excessive power, internal short circuit
protection which limits each circuit's maximum current, and
output transistor safe-area protection for reducing the output current as the voltage across each pass transistor is
increased.
0.1
0.33p.r
Although the internal power dissipation is limited, the junction temperature must be kept below the maximum specified temperature in order to meet data sheet specifications.
To calculate the maximum junction temperature or heat sink
required, the following thermal resistance values should be
used:
Package
Power Watt
Typ
Max
Typ
Max
OJC
OJC
OJA
OJA
8.0
12.0
70
75
TL/H/10058-8
R1 + R2)
YO~YCONT ( ~
Positive S.OV to 30V Adjustable Regulator
OUT ...............--1-+Vo
LM78MG
0.1
O.33p.r
TJ Max - T A (without a heat sink)
OJA
OCA = Ocs + OSA
Solving for TJ:
TL/H/10058-9
Positive S.OV to 30V
Adjustable Regulator 10 > 1.SA
TJ = TA + Po(OJC + 0CA) or
T A + POOJA (without heat sink)
Where
TJ
=
Junction Temperature
=
Ambient Temperature
Po
=
Power Dissipation
OJC
=
Junction-to-Case Thermal Resistance
1>1.5A01
Rl
=
Case-to-Heat Sink Thermal Resistance
0SA
=
Heat Sink-to-Ambient Thermal Resistance
OJA
=
Junction-to-Ambient Thermal Resistance
2N6124
....................-.-+Vo
6A
+32V-4I--'\M.....-1~>-\
1",,'00mA-
0.33p.r
OCA = Case-to-Ambient Thermal Resistance
Ocs
p'r
5kA
P
_TJMax-TA or
OMax - 0JC + 0CA
TA
p'r
R2
TL/H/1 0058-1 0
R1 ~
/lYSEIQ1)
IRMaxlll)
1-312
10
r-----------------------------------------------------------------------------, r
3:
......
Typical Applications for LM78MG (Note 1) (Continued)
± 10V, 500 rnA Dual Tracking ,Regulator
co
Positive High-Current Voltage Regulator
TO.1
, +VI-t---1IN
OUT I--~-I
LM78MG
E
G)
pF
+Vo
Rl
7.23k,o
R2
1.0pF
7.77k,o
1-....----4~-10V
TLIH1100S8-12
TLIH1100S8-11
Note: External serie. pass device is not short circuit protected.
Positive High Current
Short Circuit Protected Regulator
Rsc
r--~1-.-~-1-.--!vo
Rl
6.D
10 Max
TLIHI1 00S8-1 ~
External Series Pass (a)
0.1 pF
+VI
R1
=
+ 1)
OUT ~-""-4--I
CONTROL
COMMON
PVSE{Qll
VR Max(ll
IN
LM78MG
TLIH1100S8-14
10 Max
If load Is not ground referenced, connect reverse biased diodes from outputs
to ground.
L----+-o+vo
TLlH1100S8-1S
Short-Circuit Limit (b)
Output Waveform
30V-------
.
,
,,
,
,
,
~·64STEPS
5Vr
OV------------------Note 1: All resistor values in ohms.
1-313
TLIH1100S8-16
....G)r
3:
......
CD
3:
t-.....- -.....-+Vo
5k,o
3:
Typical Applications for LM79MG(Note 1)
Bypass capacitors are recommended for stable operation of
the LM79MG over the Input voltage and output current
ranges. Output bypass capacitors will improve the transient
response of the regulator.
The bypass capacitors, (2.0 ""F on the Input, I.Q ""F on the
output) should be ceramic or solid tantalum which have
good high frequency characteristics. If aluminum electrolytIcs are used, their values should be,10 ""F'or larger. The
bypass capacitors should be mounted with the shortest
leads, and If possible, ,directly across the regulator terminals.
Negative High Current Voltage Regulator
EXternal Series Pass '
IN
OUT t -....""""f
Lt.t79t.tG
-VI
Negative High Current "
Short Circuit ,Protected Regulator
Rsc
TL/H/10058-18
LM78MG rest Circuit 1
OUT 1-1'"""'...........-~Vo
10 Max
OUTt-.....-
O.I/AF
....-Vo
Rl
R2
TLlHI10058-17
T1 = '
IIVBE!Qll
TLlH/10058-20
IRMax(pI-IOMax
Vo =
Basic Negative Regulator
(~)VCONT
R2 '
VCONT Nominally '= 5V
t - -....- ....--VO
LM79MG Test Circuit 2
t-.....- .....--Vo
2.0/AF
TL/H/10058-19
R1 + R2)
vo= -VCONT ( ~
TL/H/10058-22
, -30V to -2.2V Adjustable Regulator
Vo = (R1 :2 R2)vCONT
VCONT Nominally = - 2.23V
Recommended R2 current '" 1 mA
:.R2
-VI-+-""""f
R2
I.OIAF
TLlH/10058-21
Note 1: All resistor values in ohms.
1·314
= 5 kO (LM78MG)
= 2.2 kO (LM79MG)
,-----------------------------------------------------------------------------, r
s::
.....
Typical Performance Characteristics for LM78MG
m
Peak Output Current
vs Input/Output
Differential Voltage
Quiescent Current
vs Input Voltage
s::
C)
.....
r
s::
.....
CD
s::
C)
Control ~urrent
vs Temperature
1.4
1.2
k= ,....
1.0
]:
TJ=OCC
Q8
/I
........ :-
TJ=25OC
..... TJ=25~ .......
0,6
D.4
~ r-....
0.2
o
o
1.5
3.0
r\
§
a
~is
2.D
.....
0.5
VO=5.0
'L=100mA
TJ=25"C
1.0
1015202530
10=500 mA
Vo=5.0V
J
II
/
5
10
15
!l!l
-2.5
~
-s.o
g
-7S
V
-
liS
-15.D
;
~!i!
_~IJoo~
r..~
5
5
0
~I~20"F1""
T
1.0 DROPOUT CONDITIONS
AVo=5l1:OF Vo
o
o
I
25
50
75
III
100
125
150
7D
65
\
60
'\
55
45
BOO
1000
TJ =25OC
o
10
15
20
25
30
OUTPUT VOLTAGE (V)
Ripple Rejection
vs Frequency
Load Transient Response
2
BO
1
LOAD CU RENT
~
~§
'0''100
i-o
~~
1.5
2
125
10= 200 mA
50
IIXl
100
l'l
75
OUTPUT CURRENT (mA)
III
..
2.D
ii!
i
-2Il.D
200
Dropout Voltage vs
Junction Temperature
~
0
§
. . . . 1'-
INPUT VOLTAGE (V)
2.5
!z
E -17.5
30
75
f""}...l
80
I'- TJ=25OC
..............
-12.5
50
Ripple Rejection
vs Output Voltage
85
V,= 10V
O=5.0V
0.0
25
20
25
TEMPERATlJRE (OC)
r
....... ......
1-'
~
TJ =125OC
o
o
Differential Control Voltage
vs Output Current
0.0
....
i'
D
INPUT VOLTAGE (V)
Differential Control Voltage
vs Input Voltage
10
V,=10V
Vo =5.0V
10 =350 mA
101520253035
5
INPUT/OUTPUT DIFFERENTIAL (V)
12
r\
1.0
z
0
60
ii!
40
§
i
1
V,=B.OV TO lBV
20 Vo =5.0V
10=500mA
TJ=25OC Till
o
150
10
'O!l
1
-2
lk
10k
lOOk
FREQUENCY (Hz)
JUNCTION TEMPERATlJRE (OC)
OUTPUT VOLTAGE
DEVIATION
,=10V
VO=5.0V
o
10
20
30
40
50
60
TIME (PI)
Line Transient Response
20
40
~z
~
~
l!l
~
INPUT VOLTAGE
30
1
20
10
OUTPUT VOLTAGE
DEVIATION
!i!
5
5
1
-10
0
-20
-5
10= OmA
vo="ov
o
,B
10
-10
12
TIME (PI)
TL/H/l005B-5
1-315
~ r---------------------------------------------------------~--~----__,
==
~
Typical Performance Characteristics for LM79MG
:i
....
Peak Output Current
vs Input/Output
Differential Voltage
~
:E
~
~
800
700
!
..,-
600
I ::
-
Control Current
vs Temperature
Quiescent Current
vs Input Voltage
-1.5
0.7
VO=-5.OV
TJ=25"1:
1a=-2.OA
""'" .....
!
,I
\
I
i
,I
\
I ::
\
./
V
100
OOC<
><
0.1 /IoF, unless 01herwise specified
Conditions
(Note 1)
Parameter
Vo
=
0.33 /IoF, Co
mV/oC
LM78M24C
Electrical Characteristics
O°C s: TA s: 125°C, VI = 33V, 10 = 350 mA, CI = 0.33 p.F, Co = 0.1
Symbol
Conditions
(Note 1)
Parameter
Vo
Output Voltage
TJ
;=
VRLINE
Line Regulation
TJ
= 25°C
VRLOAD
p.F, unless otherwise specified
Load Regulation
TJ
Min
Typ
Max
Units
23.0
24.0
25.0
V
27V s: VI s: 38V,
10 = 200mA
10
100
28V s: VI s: 36V,
10 = 200mA
5.0
50
25°C
= 25°C
5.0 mA
5.0 mA
mV
s: 10 s: 500 mA
s: 10 s: 200 mA
27V s: VI s: 38V,
5.0 mA s: 10 s: 350 mA
Vo
Output Voltage
la
Quiescent Current
Ala
Quiescent
Current Change
TJ
I with Line
I with Load
30
480
10
240
22.8
= 25°C
5.0
s: VI s: 38V, 10 = 200 mA
5.0 mA s: 10 s: 350 mA
TA = 25°C, 10 Hz s: 1 s: 100 kHz
27V
mV
25.2
V
8.0
mA
0.8
mA
0.5
No
Noise
AVI/AVO
Ripple Rejection
1 = 2400 Hz, 10
TJ = 25°C
VDO
Dropout Voltage
TA
2.0
V
los
Output Short Circuit Current
TJ
240
mA
700
mA
1.2
mV/oC
Ipk
Peak Output Current
AVO/AT
Average Temperature
Coefficient 01 Output Voltage
170
= 125 mA, VI = 30V,
50
70
= 25"C
= 35°C, VI = 35V
TJ = 25°C
10 = 5.0mA
p.V
dB
"
Note 1: All characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (Tw ,;; 10 ms, duty cycle,;; 5%). Output voltage
changes due to changes in internal temperature must be taken into account saparately.
Equivalent Circuit
IN
~;
1004
R4
IOOkll
RIB
5004
~2
. R5
3.3k4
~
RI
2.7k4
~~DI
.~
~'4
~
~
(
~~~.
R2
20k4
r-:- rl
7
RI2
20104
RII
O.sk4
OUT
skll
"'R20
o-I9k4
QII '
fl
. 0:
RIO
6k4
~6
R21
RI7
2004
~.
6k1l
Q7
R7
5004
~~D2
~
C-J
RI
IkIl
RI3
IOk4
01004
JR9
3~~F
R3
I k4
.......
~
RI9
5k1l
Q3
RI4
skll
COWNON
1-322
TLIHll0053-3
Typical Performance Characteristics
Worst Case Power Dissipation vs
Ambient Temperature (TO-S9)
Peak Output Current vs
Input/Output Voltage
Differential
Worst Case Power Dissipation vs
Ambient Temperature (TO-220)
10
1.2
1.0
DB
"
" ~~~'I:
0.6
~
~~
-~
0.2
100
125
150
50
AMBIENT TEMPERAlIJRE ("C)
£
~
125
2.5
LM~8JI2
o
o
1.5
I"
......
5
toO
~
0.5
5
I'-.
11.84
11.80
-75-50-25 025 50 75100125150175
fl;
o
jo..,
r0- ~~
b":' ~
n- ~
i
I
DROPOUT CONDmONS
4Vo=5:1 OF Vo
Quiescent Current vs
Input Voltage
Quiescent Current vs
Temperature
TJ =25"C
4.5
4.4
4.3
II
~
o
o
15
20
25
30
35
10
INPUT VOLTAGE (V)
Ripple Rejection vs
Frequency
100
50
......
60
III
1= .ov TO BY
Vo=5.0V
~=200mA
3.0
INPUT VOLTAGE (V)
I
~~Io=IOOmA
4.2
10
30
LM~8J05
IT
J
10 = 4OmA10= ,~
4.1
4.0
5
25
....'...,v
LM~8J05
V1=IOV
4JI Vo =5.0
4.7 10=200
4JI
LM78M05
L
-
-75-50-25 0 25 50 75100125150175
JUNcnoN TEMPERAlIJRE ("C)
~~
2D
I
TJ =25
-
I I
I I
I I
JUNcnoN TEMPERAlIJRE ("C)
15
Dropout Characteristics
VO=5~
.bL. -
1""':::::::::::"
10
INPUT/OUTPUT VOLTAGE DlFFEREN11AL (V)
I I
....
....
2.0
Ve~~~
150
Dropout Voltage vs
Junction Temperature
.....
12.04
~ 12.00
!? 11.96
O 11.92
5
11.88
100
AMBIOO TEMPERAlIJRE ("C)
Output Voltage vs
Junction Temperature
12.20
VI _19V I
12.16 Vo=12V
12.12 1o=5.0mA
12.OB
75
-75-50 -25 0 25 50 75100125150175
AMBIENT TEMPERAlIJRE ("C)
o
10
=25"C
100
I.Dle
101c
lOOk
FREOUENCY (Hz)
TLlH/l0053-4
Note: Other LM78MOO Series devices have similar curves.
1-323
Typical Performance Characteristics
(Continued)
LIne Tranalent Response
40
!z
INPUT VOLTAGE
30
20
...
10
Q
10
<.0
~
....:::>
I!:
:::>
0
5
OUTPUT VOLTAGE
DEVIATION
0
§!
€
15
0
~
4.0
LII781105 20
I I
0
z
0
€
~
2
V,=10V
I
V =5.0V
3.0 o
LOAD CU RENT
~
2.0
~
~
1.0
§!
§!
0
I!:
:::>
-1.0
~
!3
a..
1--
....:::>
2:
L1178M05
1.0
0.5
]:
0
I
Q
-10 TJ = 25"C
'o=500mA
-20 Vo=5.0V
0
Load Transient Response
.......
Z
-'
r!!UTPUT VOLTAGE
DEVIATION
"""":::>u
I'
...9
Q
V
0
-2.0
4
6
8
10
12
0
10
20
30
40
50
60
TIME {J's)
TIME (J's)
TLlH/l0053-5
TL/H/l0053-6
Design Considerations
The LM78MXX fixed voltage regulator series has thermaloverload protection from excessive power, internal short circuit protection which limits the circuit's maximum current,
and output transistor safe-area compensation for reducing
the output short circuit current as the voltage across the
pass transistor Is increased.
Although the Intemal power dissipation is limited, the junelion temperature must be kept below the maximum specified temperature ( + 125'C for LM78MXXC) in order to meet
data sheet specifications. To calculate the maximum junction temperature or heat sink required, the following thermal
resistance values should tie used:
Package
Typ
IJJc
. Max
. IJJc
Typ
IJJA
Max
IJJA
TO-39
TO-220
18
3.0
25
5.0
120
60
140
40
Po Max
=
Where:
TJ =
TA =
Po =
IJJC =
IJCA =
IJcs =
IJSA =
IJJA =
Typical Applications
Fixed Output Regulator
IN
TJMax-TA
IJ + IJ
or
JC
CA
= TJ Max -
1
.~~+
(NOTE 2)
LM78MXX
(NOTE 1)
3
2
~/O"
OUT
J'F
(NOTE 2)
TA (Without a Heat Sink)
IJJA
IJCA
Junction Temperature
Ambient Temperature
Power Dissipation
Junction to Case. Thermal Resistance
Case-to-Amblent Thermal Resistance
Case-to-Heat Sink to Resistance
Heat Sink-to-Ambient Thermal Resistance
Junction-to-Ambient Thermal Resistance
-==
-
= 9cs + IJSA
TLlH/l0053-7
Solving for TJ:
TJ = TA + Po (IJJC + IJcAlor
= TA + Po IJJA (Without a Heat Sink)
Note 1: To specify an output voHage. substitue voltage value for "XX".
Note 2: Bypass capacitors are recommended for optimum stability and translent response and should be located as close as possible to the regulator.
1-324
~National
~ Semiconductor
LM79XX Series 3-Terminal Negative Regulators
General Description
The LM79XX series of 3-terminal regulators is available with
fixed output voltages of - 5V, -12V, and -15V. These devices need only one external component-a compensation
capacitor at the output. The LM79XX series is packaged in
the TO-220 power package and is capable of supplying
1.5A of output current.
These regulators employ internal current limiting safe area
protection and thermal shutdown for protection against virtually all overload conditions.
Low ground pin current of the LM79XX series allows output
voltage to be easily boosted above the preset value with a
resistor divider. The low quiescent current drain of
these devices with a specified maximum change with line
and load ensures good regulation in the voltage boosted
mode.
For applications requiring other voltages, see LM137 data
sheet.
Features
•
•
•
•
Thermal, short circuit and safe area protection
High ripple rejection
1.5A output current
4% preset output voltage
Typical Applications
± 15V, 1 Amp Tracking Regulators
+V'N
0-. .------4
t--+-----..
---+--~~ VOUT 1+115V
I
I
R4*
10k
1%
I
I
I
01
lN4001
C4**..l.±
RS*
10k
1%
2S"F-r
I
I
I
. .-----_e-_e--~~--------~--~----_e_oCDMMON
C2
R3
2S_F
Sk
"-'fV'~..c OUTPUT TRIM
TO -IS.DV
-Y,N
o-...------......j
+
02
lN4001
....
1---~----------------_4I---~
O VOUT H 15V
TL/H17340-1
1-15)
Load Regulation at .:l.IL = I A
40mV
Output Ripple, CIN = 3000 "F, IL = lA
100 "Vrms
Temperature Stability
50mV
OUlput Noise 10Hz,. I ,. 10kHz
150 "Vrms
'Resistor tolerance of R4 and R5 determine matching of
oulputs.
(+15)
2mV
100 "Vrms
50mV
150 "Vrms
1+) and (-)
"Necessary only II raw supply Iliter capaCitors are more than 3' from regulators.
1-325
Input-Output Differential
(Vo = 5V)
(Vo = 12Vand 15V)
Power Dissipation (Note 1)
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Internally Limited
Operating Junction Temperature Range
Input Voltage
(Vo = 5V)
(Vo = 12Vand 15V)
+ 125'C. Power Dissipation
- 65'C to
=
500 mA, CIN
230'C
2.2 p.F, COUT
5V
Input Voltage (unless otherwise specified)
-10V
Parameter
Conditions
Vo
AVO
Line Regulation
TJ
AVO
Load Regulation
TJ = 25'C, (Note 2)
5 mA:S; IOUT:S; 1.5A
250 mA :s; lOUT :s; 750 mA
=
=
la
Quiescent Current
TJ
Quiescent Current
Change
With Line
Output Noise Voltage
TA
Ripple Rejection
f
Typ
Units
I
. Max
-4.8
-5.0
-5.2
-4.75
-5.25
(-20:S; VIN:S; -7)
8
50
(-25:S; VIN:S; -7)
2
15
(-12:S; VIN:S; -8)
25'C, (Note 2)
Ala
I
Min
TJ = 25'C
5 mA :s; IOUT:S; lA,
P:S; 15W
15
5
1
25'C
=
=
120Hz
=
54
=
2
mA
0.5
mA
V
mA
125
p.V
66
(-18 :s; VIN :s; -8)
dB
V
1.1
V
Dropout Voltage
TJ
Peak Output Current
TJ"; 25'C
2.2
A
Average Temperature
Coefficient of
Output Voltage
lOUT = 5mA,
OC:S; TJ:S; 100'C
0.4
mV/'C
25'C, lOUT
lA
Typical Applications (Continued)
Variable Output
.l!.
L;
C3.
-~ Z5"F
Cl
2.M-..:!:.
SOLID -~
TANTALUM
INPUT _
-!
I• Rl
CZ
-..!.M
-~SOLIO
3
t
1
LM79XXCT
J
2
~
R2
-
TANTALUM
~
OUTPUT
TL/HI7340-2
'Improves transient response and ripple reiection. Do not Increase beyond 50
"F.
+ R2)
= VSET (Rl
""""i'i2
Select R2 as follows:
LM7905CT
LM7912CT
LM7915CT
mV
V
mV
V
mV
mV
mV
0.5
25'C, 10 Hz:s; f:S; 100 Hz
V
V
V
100
50
(-25 :s; VIN :s; -7)
With Load, 5 mA :s; lOUT :s; 1A
VOUT
1 p.F,
LM7905C
Output Voltage
lOMAX
=
:s; 1.5W.
Part Number
Vn
+ 125'C
+ 150'C
Lead Temperature (Soldering, 10 sec.)
Output Voltage
Symbol
O'C to
Storage Temperature Range
-35V
-40V
Electrical Characteristics Conditions unless otherwise noted: lOUT =
O'C :s; TJ :s;
25V
30V
300n
750n
lk
1-326
Electrical Characteristics
(Continued) Conditions unless otherwise noted: lOUT = 500 mA, CIN = 2.2 "F,
= 1.5W.
+ 125'C, Power Dissipation
COUT = 1 "F, O'C ~ TJ ~
Part Number
LM7912C
Output Voltage
12V
15V
Input Voltage (unless otherwise specified)
-19V
-23V
Symbol
Parameter
Conditions
Vo
Output Voltage
TJ = 25'C
5 mA ~ lOUT ~ 1A,
P ~ 15W
AVo
Line Regulation
TJ = 25'C, (Note 2)
I
Min
I
Typ
5
80
VIN ~ -14.5)
30
3
-22 ~ VIN ~ -16)
~
AVo
Load Regulation
TJ = 25'C, (Note 2)
5 mA ~ lOUT ~ 1.5A
250 mA ~ lOUT ~ 750 mA
15
15
5
10
Quiescent Current
TJ = 25'C
1.5
Ala
Quiescent Current
Change
With Line
(-30
~
VIN
~
With Load, 5 mA ~ lOUT ~ 1A
lOMAX
~
Max
-11.5 -12.0 -12.5
-11.4
-12.6
(-27 ~ VIN ~ -14.5)
(-30
Vn
LM7915C
f
~
100 Hz
Min
I
Max
Typ
-14.4 -15.0 -15.6
-14.25
-15.75
(-30 ~ VIN ~ -17.5)
V
V
V
5
mV
V
mV
V
(-30
~ VIN~
(-26
~
3
VIN
200
200
75
15
15
5
3
1.5
0.5
-14.5)
0.5
Units
(-30
100
-17.5)
50
~-20)
200
200
75
3
~VIN ~
mV
mV
mV
mA
0.5
-17.5)
0.5
mA
V
mA
-17.5)
"V
dB
V
Output Noise Voltage
TA = 25'C, 10 Hz
Ripple Rejection
f = 120Hz
375
Dropout Voltage
TJ = 25'C, lOUT = 1A
1.1
1.1
V
Peak Output Current
TJ = 25'C
2.2
2.2
A
300
54
(-25
70
VIN
~
~
54
(-30
-15)
70
~ VIN~
-1.0
Average Temperature lOUT = 5mA,
-0.8
mV/'C
Coefficient of
OC ~ TJ ~ 100'C
Output Voltage
Note 1: For calculations of junction temperature rise due to power dissipation, thermal resistance junction to ambient (8JAl is 5O'CIW (no heat sink) and 5'CIW
(infinite heat sink).
Note 2: Regulation is measured at a constant junction temperature by pulse testing with a low duty cycle. Changes in output voltage due to heating effects must be
taken Into account.
Typical Applications (Continued)
Fixed Regulator
.J:.
":'
INPUT
...l.!. c1*
2.2"F
-
3
I
..J.:!:. czl
_ 11'F
t
LM79XXCT
Dual Trimmed Supply
2
t
INPUT C>--4
OUTPUT
TLIHI7340-3
'Required if regulator is separated from filter ca-
"
18'
_'-
D.22"F_~
.A~!
3
"".-
...
-.4
lk
~
01
~ lN4001
:= 33
padter by more than 3". For value given, ca-
paeltor must be solid tantalum. 25 "F aluminum
electrolytic may be substituted.
tRequired for stability, For value given, capacitor
must be solid tantalum. 25 "F aluminum electrolytic may be substituted. Values given may be
increased without 11m".
For output capacitance in excess of 100 "F, a
high current diode from input to output
(1 N4001, etc.) will protect the regulator from
+5.0V
LM340·5
~M
-
~
2.2~F
=::
momentary input shorts.
- INPUT C>--4
-'"
33
470
e'
1-327
LM7905CT
5k
COM
~I- 02
~~ lN4001
-5.0V
TL/H17340-4
~
Typical Applications (Continued)
:i
High Stability 1 Amp Regulator
- -...- -. .- -. .- - - - -...- -. .--------~....-VouT(+1
RZ*
+
+ Cl tt
cztt
_ lo.F
_ Z.2"F
R3*
..- - - - - - - - - - - ' = - - - V O U T H
~+--Load and line regulalion
< 0,01 % 1empera1ure slability ,: 0.2%
TUHI7340-5
tDelermlne Zener currenl
ttSolid lan1a1um
'Select resistors 10 set oulpul voHage. 2 ppmrC tracking suggesled
Current Source
- , RL
I
2l.F
SOLID
TANTALUM
I
+
;.J
Rl*
INPUT
'IOUT=lmA+~
Rl
TUHI7340-7
Ught Controllers Using Silicon Photo Cells
I
I
6V -15V
BULB
..J.!.
Cit
25.F - , -
1.75A
MAX TURN·ON
CURRENT
I
C2
I
2S.F
TUHI7340-B
'Lamp brightness Increase until il = Ia (= 1 mAl + 5V1Rl.
tNecesssry only H raw supply filter capacitor Is more than 2" from LM790SCT
1·328
r---------------------------------------------------~----------__,r
....s:
Typical Applications (Continued)
~
><
I
I
I
Cl t
BV -15V
BULB
1.15A
MAX TURN·ON
CURRENT
....L!.
25~F-r
I
I
I
TLlH17340-9
'Lamp brightness increases until ii
~
5V1Rt (Ii can be set as low as t pA)
tNeceSS8J)l only if raw supply filter capacitor is more than 2" from LM7905CT
.moo:::
Connection Diagrams
TO-3 Package
TO-220 Package
GNO><
TL/H17340-t 0
TL/H/7340-tt
Bottom View
Order Number LM7905CK, LM7912CK or LM7915CK
See NS Package Number KC02A
Top View
Order Number LM7905CT, LM7912CTor LM7915CT
See NS Package Number T03B
1-329
LM79XX
(/)
n
:::r
CD
3
I»
n
-5V
C
i"
':"
R18
4k
01
-.a.
~
02
R6
7k
R5
15k
06
~
'"
~
I I
t'
"r
~131
r
t
•
20 pF
co
r
iii
3
UJ
5k
d'"
!.'":'~ .;.:: t
Fl h fii-l l
~
0
'00.
03
6.2V
. I
R20
20k
-
R4
V,,,O
I Ii i
i~
(
_
R8
20k.
R9
20k
) (
R13
5k
R21
150
~R16
0.2
TUH/7340':12
I
en
n
:T
CD
3D)
-12Vand -15V
0"
C
iii"
':"
ca
""I
D)
~R19
RIB
4k
3
5k
en
00
'"
""
'"
I:
CD
S.
I
....
c.,
~I
T
~__
...:-
II
-.~
t
~
012
r(
R4
V'NO
I It i
f
•
..."J
I...~
I I
i~
RI7
~7
F1 h
•
OVOUT
03
6.2V
fii:"
1I
R20
20.
I
20 pF
.....
013
RB
20.
R9
20k
) (
RIl
5k
R21
50
fR!6
0.2
TUHI7340-13
XX6LW'
r----------------------------------------------------------------------------,
~ ~National
o
Q)
ga> ~ Semiconductor
" LM7900 Series
:i
3-Terminal Negative Voltage Regulators
General Description
Features
The LM7900 series of monolithic 3-terminal negative regulators are intended as complements to the popular LM7800
series of positive voltage regulators, and they are available
in voltage options from - 5.0V to -15V. The LM7900 series
employ internal current-limiting, thermal shutdown, and
safe-area compensation, making them virtually indestructible.
•
•
•
•
•
•
Output current in excess of 1.0A
Internal thermal overload protection
Internal short circuit current-limiting
Output transistor safe-area compensation
Available in JEDEC TO-220 and TO-3 packages
Output voltage of -8V (See Note)
Connection Diagrams
OUT
8*1·
~Ii
'-IN
Lead 3 connected to case.
Top View
TLlH/l0050-1
. Top View
Order Number LM7908K and LM7908CK
See NS Package Number K02A
Note: See the LM79xx datasheet in the General Purpose
Linear Databook for specifications on products in this series
with -5V, -12V, and -15Voutputs. Refer to the LM1201
LM320 datasheet for '-5V, -12V, and -15V regulators
specified over extended temperature ranges.
1-332
Order Number LM7908CT
See NS Package Number T03B
TL/H/l0050-2
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature Range
TO·3 Metal Can
-65°C to + 175°C
T0-220 Package
-65°Cto + 1500C
Operating Junction Temperature Range
Extended (LM7900)
-55°C to + 150°C
Commercial (LM7900C)
OOC to + 150°C
Lead Temperature
TO·3 Metal (soldering, 60 sec.)
300°C
TO·220 Package (soldering, 10 sec.)
265°C
Power Dissipation
Internally Limited
Input Voltage
-5Vto -15V
-35V
ESD Susceptibility
2000V
Note 1: The convention for Negative Regulators Is the Algebraic value, thus
-t5V Is less then -tOV.
LM7908
Electrical Characteristics
-55°C:!: TA :!: 125°C, VI
Symbol
=
= 500 mA, CI = 2.0 ,...F, Co = 1.0 ,...F, unless otherwise specified
Parameter
Vo
Output Voltage
VR LINE
Line Regulation
VRLOAD
-14V, 10
Conditions (Note 1)
= 25°C
TJ = 25°C
Min
Typ
Max
Units
-7.7
-8.0
-8.3
V
-10.5V:!: VI:!: -25V
6.0
80
-11V :!: VI :!: - 17V
2.0
40
5.0mA:!: lo:!: 1.5A
12
100
250 mA :!: 10 :!: 750 mA
4.0
40
TJ
. Load Regulation
TJ
= 25°C
Vo
Output Voltage
-11.5V:!: VI:!: -23V,
5.0 mA :!: 10 :!: 1.0A, P :!: 15W
la
Quiescent Current
TJ
Ala
Quiescent Current
Change
I With Line
J With Load
-7.6
= 25°C
3.5
V
7.0
mA
-11.5V:!: VI:!: -25V
1.0
0.5
Noise
TA
AVI/AVO
Ripple Rejection
f = 2400 Hz, VI = -13V
10 = 350 mA, TJ = 25°C
54
60
Veo
Dropout Voltage
10
2.3
V
Peak Output Current
TJ
1.3
2.1
3.3
A
AVO/AT
Average Temperature
Coefficient of Output Voltage
= 1.0A, TJ = 25°C
= 25°C
10 = 5.0 mA, -55°C:!: TA:!: 125°C
1.1
Ipk
0.3
mVloClVo
los
Output Short Circuit Current
1.2
A
= -35V, TJ = 25°C
1·333
25
80
mA
No
VI
100 kHz
mV
-8.4
5.0 mA :!: 10 :!: 1.0A
= 25°C, 10 Hz:!: f:!:
mV
,...VlVo
dB
•
LM7908C
Ele~trical
O'C
s:
TA
s:
Characteristics
125'C, VI
Symbol
=
-14V, 19
=
500 mA, CI
=
2.0 ,...F, Co
=
=
25'C
Parameter
1.0 ,...F, unless otherwise specified
Conditions (Note 1)
Vo
Output Voltage
TJ
VR LINE
Line Regulation
TJ
VRLOAD
=
s: VI s: -25V
-11V s: VI s: -17V
5.0 mA s: 10 s: 1.5A
TJ = 25'C
250 mA s: 10 s: 750 mA
-10.5V s: VI s: 23V,
5.0 mA s: 10 s: 1.0A, P s: 15W
Load Regulation
Vo
Output Voltage
10
Quiescent Current
.110
Quiescent Current
Change
TJ
I With Line
I With Load
No
Noise
.1VI/.1VO
Ripple Rejection
Voo
Dropout Voltage
Ipk
Peak Output Current
aVo/aT
Average Temperature
Coefficient of Output Voltage
=
2,5'C
Min
Typ
Max
Units
-7.7
-8.0
-8.3
V
6.0
160
2.0
80
12
160
4.0
80
-10.5V
-7.6
3.5
25'C
s: VI s: -25V
5.0 mA s: 10 s: 1.0A
TA = 25'C,10 Hz s: f s:
-10.5V
mV
mV
-8.4
V
7.0
mA
1.0
mA
0.5
200
,...V
60
dB
10
1.1
V
TJ
2.1
A
0.6
mV/'C
100 kHz
f = 2400 Hz, VI = -13V
10 = 350 mA, TJ = 25'C
= 1.0A, TJ = 25'C
= 25'C
10 = 5.0 mA, O'C s: T A'S:
54
125'C
Note 1: All characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw ,; 10 ms. duty cycle,; 5%). Qulput voltage
changes due to changes in internal temperature must be taken into account separately.
Equivalent Circuit
"~Dl
'~D2
04
OPTIONS
------,...~~ka
~2
6Ak~
R4
~
R5
4204
---
:
:
I
I
I
I
I
I
I
I
I
03
-t2&
R23
4.0kll
~
012
rrl
O~'I
L
~
1
013
R24
1.7kll
TO 18kll
~7
:i2V';;d-:15V
OPTIONS
- .....
R12
4004
~
:rs ~
R7
1.0kll
R8
4.&kII
O~
N8'
R15
3.0kll
::
R9
15kll
O:J
r--
~&
~
R&
80011
R25
4.5kll
TO 6.3kll
,,'
-S.DV and -B.OV
Rl
7.8k11
-
COMUON
~
'"
R2
1.4kll
RIO
ISkII
Cl
3.5
pF
l t~r fT.
pF
Rl\(
17.5
kll
R16
4.7kll
~03
~20
R19
S.3kll
R14
2.3
kll
R17
3,okll
_our
R21
17k11
R3D
2_
R22
0.044
RI3
0.054
IN
TLlH/l0050-3
1-334
,-----------------------------------------------------------------------------,
Typical Performance Characteristics
Worst Case Power Dlulpatlon vs
Ambient Temperature (TOOS)
100
uwrr FOR pA7900c
~I
:II!I HEA~
OC.,
• £8
"'~"'5"c
-o:! H&'r
~~
1
I UT.,'=JA
0.1
. 25
T
~I
1N1Nr
100
125
150
25
~
~
r...
1
lD
.....
0
z -0.1
I""'"
........
~l'
l-om
~ -0.1 0
100
1.2
loa 1o=200mA~
i
VI = Vo-5.ov
5 \li5'li
~~
I!! -75-50-25 0
25 50 75 100 125150 175
125
150
1'1:
5D
20
1
1
1 1
\I=I.OA
8.0
1"
5D
I~
IE
r ,..,...
10 = 500 mA
~~
./
I'
2D
1.5
o
5D W
~
20 25 30
Ripple Rejection vs
Frequency
100
-
I-r-......
-75 -50-25 0 25 50 75 100 125150 175
o
. TJ =25CC
AVI=IOVp-p
'o=120H1
1o=200mA
AVI=10Vp-p
\I = 200 mA
TJ =25CC
10
100
AIIBIENT lEIIPERATURE (CC)
!.Ole
1Ole
o
lOOk
4J)
8.0 8.0 10 12 14 16 18 20 22 24
NOWINAL OUTPUT VOLTAGE (-V)
FREQUENCY (Hz)
Line Transient Response
40
Ripple Rejection vs
Output Voltages
.....
U
~
INPUT VOLTAGE (-V)
100
.....
30
25
Quiescent Current va
JUNCTION lEIIPERATURE (CC)
VI =VO-5.OV
\I = 500 mA
15
115 Input Voltage
""iN.
Quiescent Current va
Temperature
10
INPUT/OUTPUT VOLTAGE DIFFERENTIAL (V)
,~l'
1o=20mA
CIa nROPOlIT CON
~
AVo = 511 OF Vo
D.A
-75 -50-25 0 25 50 75 100 125150 175
JUNcnoN lEIIPERATURE (CC)
~~
o
o
104
~ 0.1 5
>
~0lI5
75
Nl)~ ....
..~,~-;'.t~!'Ioi
1•0
0.5
I'
~~
~~ ~?;~~
'i'J'to)o..ro.
1
......"'-l\
l"
Dropout Voltage vs
Junction Temperature
lrQ.3)
5
I""'"
I _I,
AIIBIDIT lEIIPERATURE.(CC)
Output Voltage vs
Junction Temperature
0.1 0
~K
50
~
2.0
11.5
F'JC=5.O"C,IW
~I'JA
-65CC,IW
OIWC= 15W"1
AIIBIENT lEIIPERATURE (CC)
~
2.5
!!i
~~::r;,.--I-
H
3.0
8
~
11.0
0.1
75
Peak Output Current va
Input/Output Voltage
DIHerentlal
...
EAT SINK
~
ft£8 I-~
.... ."'l'\.
'JC=5.5CC,IW
= 45CC,IW
DIWC=15W'1
50
uwrr FOR pA7900C
~ ~ 1"-- .....
1'"-0
I I
...
CD
Worst Case Power Dlulpatlon vs
Ambient Temperature (TO-nO)
100
Output Impedance vs
Frequency
Load Transient Response
20
2D
INPUT VOLTAGE
1
CUR T
1.0
1
0
'0=
Yo=-o••y
2.0
-2.0
4.0
8.0
llWE (PO)
8.0
-
OUTPUT VOLTAGE
DEVlAllON
OUTPUT VOLTAGE
DEVlAllON
10
12
1=Yo=-o,.Y
o
10
g
1
i
liP
6
i
10"1
---
10-2 UJII,.UJ.IU.LIlU..I.IIU.......u.w..u.uu
20
~
!!:
.....
30 40
llWE (PO)
50
60
10 100 1.0Ie 101e lOOk 1.DW lOW l00W
FREOUENCY (Hz)
TL/H/l005D-4
1-335
CI
CI
(I)
..
m"
CD
Fixed Output ~egulator
Design Considerations
The LM7900 fixed voltage regulator series has thermal
overload protection from excessive power dissipation, internal short circuit. protection which limits the circuit's maximum current, and output transistor safe-area compensation
for reducing the output current as the voltage across the
pass transistor is increased.
Although the internal power dissipation is limited, the junction temperature must be kept below the maximum specified temperature (150·C for LM7900, 1;!5·C for LM7900C) in
order to meet data sheet specifications. To calculate the
maximum junction temperature or heat sink required, the
following thermal resistance values should be used:.
Typ
Typ
IIJC
·C/W
Max
IIJC
·C/W
IIJA
·C/W
Max
IIJA
·C/W
TO-3
3.5
5.5
40
35
TO-220
3.0
5.0
60
40
Package
3
2.OpF:::~
2
LIot7900
:::~1.0p
1
.L
TL/H/10050-5
High Current Voltage Regulator
~~~----------------~--~
LIot7900
P
TJMax-TA TJMaxTA
o MAX = IIJC + IICA or~
IICA = IICS
Solving for TJ:
+
2
r
1•OI'F
TLlH/10050-6
liSA (without heat sink)
Output Current HIGH, Foldback Current-limited
TJ = TA + Po (IIJC + IICA) or
= TA + PollJA (without heat sink)
Where:
TJ
TA
Yo
~--------------.-~
= Junction Temperature
= Ambient Temperature
Po = Power Dissipation
IIJA = Junction-to-Ambient Thermal Resistance
IIJC = Junction-to-Case Thermal Resistance
1.01'F
IICA = Case-to-Ambient Thermal Resistance
IIcs = Case-to-Heat Sink Thermal Resistance
TL/H/10050-7
liSA = Heat Sink-to-Ambient Thermal Resistance
Output Current HIGH, Short Circuit Protected
Typical Applications
Vl .....--..-'IM_
Bypass capacitors are necessary for stable operation of the
LM7900 series of regulators. over the input voltage and output current ranges. Output bypass capacitors will improve
the transient response by the regulator.
~~~---------------.-vo
LIot7900
The bypass capacitors, (2.0 /LF on the input, 1.0 /LF on the
output) should be ceramic or solid tantalum wliich have
good high frequency characteristics. If aluminum electrolytics are used, their values should be 10 /LF or larger. The
bypass capacitors should be mounted with the shortest
leads, and if possible, directly across the regulator terminals.
.
.
TL/H/1oo50-8
Rse = VSE(Q2)
lOS
1-336
,-------------------------------------------------------------------------, r
3:
.....
CD
~National
!::
><
~ Semiconductor
~
LM79LXXAC Series 3-Terminal Negative Regulators
General Description
The LM79LXXAC series of 3-terminal negative voltage regulators features fixed output voltages of - 5V, - 12V, and
-15V with output current capabilities in excess of 100 mA.
These devices were designed using the latest computer
techniques for optimizing the packaged IC thermal/electrical performance. The LM79LXXAC series, even when combined with a minimum output compensation capacitor of 0.1
,...F, exhibits an excellent transient response, a maximum
line regulation of 0.07% VolV, and a maximum load regulation of 0.01 % Vo/mA.
The LM79LXXAC series also includes, as self-protection circuitry: safe operating area circuitry for output transistor power dissipation limiting, a temperature independent short circuit current limit for peak output current limiting, and a thermal shutdown circuit to prevent excessive junction temperature. Although designed primarily as fixed voltage regulators, these devices may be combined with simple external
circuitry for boosted and/or adjustable voltages and currents. The LM79LXXAC series is available in the 3-lead TO92 package, and SO-8; 8 lead package.
Typical Applications
For output voltage other than -5V, -12V and -15V the
LM137L series provides an output voltage range from 1.2V
to 47V.
Features
• Preset output voltage error is less than ± 5% overload,
line and temperature
• Specified at an output current of 100 mA
• Easily compensated with a small 0.1 ,...F output
capacitor
• Internal short-circuit, thermal and safe operating area
protection
• Easily adjustable to higher output voltages
• Maximum line regulation less than 0.07% VourlV
• Maximum load regulation less than 0.01 % VourmA
• TO-92 package
Connection Diagrams
Fixed Output Regulator
so-a Plastic (Narrow Body)
1·
8
NC
-YIN
2
7
-YIN
-YIN
3
6
-YIN
"
5
GND
-YOUT
--!
NC
LMJ9LXXACZ
-VINo--....
TL/H/774B-1
'Required if the regulator is located far from the power supply filter. A 1 ,..F
aluminum electrolytic may be sUbstituted.
"Required for stability. A 1 ,..F aluminum electrolytic may be substituted.
Order Number LM79L05ACM,
LM79L 12ACM or LM79L 15ACM
See NS Package Number MOaA
TO-92 Plastic Package (Z)
Adjustable Output Regulator
+
TL/HI774B-4
Top View
+
C2
D.l.F
Rl
TL/HI774B-2
1---....- -...-0
Bottom View
-VO
TUHI774B-3
-vo
~
-5V - (5V1Rl
+ 10). R2,
5V/RI > 310
1-337
Order Number LM79L05ACZ,
LM79L 12ACZ or LM79L 15ACZ
See NS Package Number Z03A
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage
Vo = -5V, -12V, -15V
-35V
Internal Power DisSipation (Note 1)
Internally Limited
Electrical Characteristics (Note 2) TA =
Output Voltage
-5V
-12V
-10V
-17V
Parameter
Output Voltage
Conditions
1 mA s: 10 s: 40mA
VMIN s: VIN s: VMAX
AVo
Line Regulation
Load Regulation
Tj = 25'C
1 mA s: 10
s:
-5
-5.25
(-20 s: VIN
(-20
s: VIN s:
Long Term Stability
10=100mA
20
Quiescent Current
10=100mA
2
Ala
Quiescent Current
Change
s:
1 mA s:
s: 100 mA
10 s: 40 mA
10
10 = 100 mA
s:
VIN
s:
-12
s:
Vn
Output Noise Voltage Tj = 25'C, 10 = 100 mA
f = 10Hz -10kHz
AVIN
AVo
Ripple Rejection
Tj = 25'C, 10 = 100 mA
f = 120Hz
Input Voltage
Required to
Maintain Line
Regulation
Tj = 25'C, 10 = 100 mA
10 = 40mA
(-20
s: VIN s:
-11.4 -15.75
-14.25
-14.8) (-30 s: VIN s: -18)
s:
VIN
s:
45
-17.7)
mV
V
45
-14.5) (-30 S:VIN
s:
45
-17.5)
mV
V
125
mV
s:
VIN
s:
60
-7) (-27
s:
VIN
s:
s:
100
48
6
2
V
-14.25
-17.5)
45
-14.6) (-30
60
6
mV/khrs
2
6
mA
0.3
0.3
0.3
0.1
0.1
0.1
mA
0.25
mA
-18)
V
0.25
-7.5) (-27
40
s: VIN s:
-14.8) (-30
96
50
-7.3
-7.0
s:
VIN
s:
120
",V
50
52
-14.6
-14.5
Note I: Thermal resistance of Z package is 6CY'C/W 81e, 23'Z'C/W 8Jo at still air, and 88'C/W at 400 It/min of air. The
The maximum junction temperature shall not exceed 125'C on electrical parameters.
Nota 2: To ensure conslsnt junction temperature, low duty cycle pulse testing is used.
1·338
Units
-11.5 -15.6 -15 -14.4
60
-7.3) (-27
0.25
VMAX
-20V
ITyp I Max
Min
-12.6 -11.4 -15.75
s: VIN.S: -14.5) (-30 s: VIN
50
100mA
10
VMIN
-4.8 -12.5
-4.75 -12.6
-7.5) (-27 s: VIN
s: VIN s:
AVo
1 mA
s:
-15V
I Typ I Max
Min
-5.25
-4.75
(-20 s: VIN s: -7) (-27
Tj = 25'C, 10 = 100 mA
(-20
VMIN s: VIN s: VMAX
Tj = 25'C, 10 = 40 mA
VMIN s: VIN s: VMAX
AVo
ITyp I Max
Min
Tj = 25'C, 10 = 100 mA .,-5.2
1 mAS: 10 s: 100 mA
VMIN s: VIN s: VMAX
O'Cto +70'C
+ 125'C
- 55'C to + 150'C
260'C
O'C to + 70'C unless otherwise noted.
Input Voltage (unless otherwise noted)
Symbol
Vo
Operating Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
dB
-17.7
-17.5
Mpackage 810 is 18CY'C/W in still air.
V
V
Typical Performance Characteristics
Maximum Average Power
Dissipation
--
•.1
ez
..
i
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~
DA
-
a.12&" LEAD LENGT"
FROM PC IOARO
FREEAIR
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FROM P:"~~~~:_ ~
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B
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15
30
45
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o
.
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.
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il:
0.15
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10
15
20
25
..;
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aa
-5 -10 -IS -20 -25
a
125
la
.
..~
Ik
1.010
'---'_-J._-'-_....L.;;:=O'-l
10k
a
lOOk
50
15
IUD
125
a
..
...
..
!l
c
it!
iii
I
I-
TI·125'C
-15
25
Tj - JUNCTION TEMPERATURE I'C)
la
TI'~C
I
~--l---+--+--+---I
1.000
FREQUENCY 1Hz)
I
-35
i a.aaa r::J~~~~~
7VP'Pllllim'
lao
-3~
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IOUT'~t
TA=,~~:,C ! IllIIm
,...::: ~25"C
-Ia
o
l-
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1
-5
........
i::l t~t~f~~~
~ 0.•90 ~--l---+--+--+---I
V,N - VaUT'-IV
,:\VI.·
........
iii
CD
2a
Il1o..
INPUT VOLTAGE IV)
,
VOUT'-5V
Quiescent Current
~
TI'125"C
Output Voltage vs.
Temperature (Normalized
l.alO t...
O_1_V...@_2_5"rC
...;I-r_,.--......
vour'!-12V
Tj - JUNCTION TEMPERATURE I"C)
,...-
~
VOUT,av
0.a5
30
Ripple Rejection
15
TI'25'C
I-
o
o
Ba
3
g
,,
=~
- .......
a.z
INPUT-OUTPUT DIFFERENTIAL IV)
Dropout Voltage
50
~~
......
TA - AMBIENT TEMPERATURE I"C)
25
TI'2~'C
TI'125'C
0.1
1&
III
TI'~C
g
I! us
if
""'t-.....
........
CI
a
Short Circuit Output
Current
0.25
dVOUT"~mv
0.2
O.z
0.1
Peak output Current
a.z5
r- VaUT"-5V
I!:
-
a.l
IOTCDt-2a --25
-3D
-35
lDO
INPUT VOLTAGE IV)
It
10k
laak
1M
FREQUENCY I"Z)
TL/HI774B-5
Typical Applications (Continued)
± 15V, 100 mA Dual Power Supply
1--e--oVOUT = 15V@ 100 rnA
C2
0.01
~F
GNOo-~----4~--~~<)
C4
0.01 ~F
,V1No-. ._-I
20V
t--,,-o-VOUT = -15V@100rnA
TL/HI774B-6
1·339
LM79LXXAC
en
()
:::r
-5V
CD
3C»
C:;"
c
i"
cc
iii
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tn
c'.:.
....
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R22
-VIN
TUH17748-7
en
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-12Vand -15V
GND
CD
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B
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::
TLiH/774S-S
O\fXX16LWl
~National
~ Semiconductor
LM79MXX Series
3-Terminal Negative Regulators
General Description
The LM79MXX series of 3-terminal regulators is available
with fixed output voltages of -5V, -12V, and -15V. These
devices need only one external component-a compensation capacitor at the output. The LM79MXX series is packaged in the TO-202 power package and TO-39 metal can
and is capable of supplying O.5A of output current.
These regulators employ internal current limiting, safe area
protection, and thermal shotdown for protection against virtually all overload conditions.
Low ground pin current of the LM79MXX series allows output voltage to be easily boosted above the preset value with
a resistor divider. The low quiescent current of these devices with a specified maximum change with line and load ensures good regulation in the voltage boosted mode.
For output voltage other than -5V, -12V, and -15V the
LM137 series provides an output voltage range from 1.2V to
57V.
Features
•
•
•
•
Thermal, short circuit and safe area protection
High ripple rejection
O.5A output current
4% preset output voltage
Connection Diagram
TO-202 (P) Plastic Package
INPUT
1
o 'F1
:~~~UT
'--__....IU====::::I;
GND
TL/H/l04B3-5
Front View
Order Number LM79M05CP, LM79M12CP or LM79M15CP
See NS Package Number P03A
1-342
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage
Va = 5V
Va = 12Vand 15V
O'C to + 125'C
- 65'C to + 150'C
Storage Temperature Range
Lead Temperature (Soldering. 10 sec.)
-25V
-35V
Input/Output Differential
Va = 5V
Va = 12Vand 15V
Internally Limited
Power Dissipation
Operating Junction Temperature Range
230'C
TBD
ESD Susceptability
r3:
......
CD
3:
><
><
..
f/)
CD
iii'
til
25V
30V
Electrical Characteristics
Conditions unless otherwise noted: lOUT
= 350 rnA, CIN = 2.2 ",F, COUT = 1 ",F. O'C ,;; TJ ,;; +125'C
LM79M05C
LM79M12C
LM79M15C
Output Voltage
Part Number
-5V
-12V
-15V
Input Voltage (Unless Otherwise Specified)
-10V
-19V
-23V
Symbol
Va
dVo
Parameter
Output Voltage
Line Regulation
Conditions
TJ
= 25"C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
-4.8
-5.0
-5.2
-11.5
-12.0
-12.5
-14.4
-15.0
-15.6
V
-12.6 -14.25
-15.75
-11.4
(-27';; VIN ,;; -14.5)
(-30';; VIN ,;; -17.5)
V
5 rnA ,;; lOUT';; 350 rnA
-4.75
-5.25
(-25';; VIN';; -7)
= 25'C (Note 2)
8
50
(-25';; VIN';; -7)
2
30
(-18 ,;; VIN ,;; - 8)
5
80
(-30';; VIN ,;; -14.5)
3
30
(-25';; VIN ,;; -15)
5
80
(-30';; VIN';; -17.5)
3
50
(-28';; VIN ,;; -18)
mV
30
100
30
240
30
240
mV
1
2
1.5
3
1.5
3
rnA
TJ
dVo
Load Regulation
TJ = 25"C, (Note 2)
5 rnA ,;; lOUT';; 0.5A
IQ
Quiescent Current
TJ
dlQ
Quiescent Current
Change
With Input Voltage
= 25"C
0.4
(-25';; VIN';; -8)
With Load,
5 rnA ,;; lOUT';; 350 rnA
Output Noise Voltage TA = 25'C,
10Hz';; I,;; 100Hz
Vn
lOMAX
Units
0.4
(-30';; VIN';; -14.5)
0.4
mV
0.4
(-30';; VIN ,;; -27)
rnA
0.4
rnA
0.4
750
400
400
",V
54
66
(-18';; VIN';; -8)
54
70
(-25';; VIN';; -15)
70
54
(-30';; VIN';; -17.5)
dB
1.1
1.1
1.1
V
Peak Output Current TJ = 25"C
800
800
800
rnA
Average Temperature lOUT = 5 rnA.
Coefficient 01
O"C ,;; TJ ,;; 100"C
Output Voltage
-0.4
-0.8
-1.0
mVrC
12
12
12
'C/W
70
70
70
"C/W
Ripple Rejection
1 = 120 Hz
Dropout Voltage
TJ
= 25"C, lOUT = 0.5A
Thermal Resistance
Junction to Case
P Package
Thermal Resistance
Junction to Ambient
P Package
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: Regulation is measured at a constant junction temperature by pulse testing with a low duty cycle. Changes in output voltage due to heating effects must be
taken into account.
1-343
III
Typical Applications
± 15V. 1 Amp Tracking Regulators
--,..-O
t--....----1~-....
I
C4"
25p.F
VOUT +15V
R4·
I
I
I
I
I
10k
1%
..l!
T
R5·
01
lN4001
10k
1%
~--~~~J[-+---~::::~~-~~_oCOMMON
I
I
C5··
25p.F
..l!
02
T
lN4001
I
I
I---:-....---...;.--.....- ......--"1
I---.....~...........----+--o -5.0V
TL/HII0483-4
1·344
~-------------------------------------------------------------------------------.
r"'tJ
~National
N
CD
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o
......
~ Semiconductor
r-
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N
CD
LP2950/LP2950AC/LP2950C 5V and
LP2951/LP2951 AC/LP2951 C Adjustable
Micropower Voltage Regulators
(II
~
o
......
r-
"'tJ
N
CD
(II
General Description
o
The LP2950 and LP2951 are micropower voltage regulators
with very low quiescent current (75 p.A typ.) and very low
dropout voltage (typ. 40 mV at light loads and 3BO mV at
100 mAl. They are ideally suited for use in battery-powered
systems. Furthermore, the quiescent current of the
LP2950/LP2951 increases only slightly in dropout, prolonging battery life.
tolerance (.5% typ.), extremely good load and line regulation (.05% typ.) and a very low output voltage temperature
coefficient, making the part useful as a low-power voltage
reference.
•
•
•
•
•
•
•
•
One such feature is an error flag output which warns of a
low output voltage, often due to falling batteries on the input. It may be used for a power-on reset. A second feature
is the logic-compatible shutdown input which enables the
regulator to be switched on and off. Also, the part may be
pin-strapped for a 5V output or programmed from 1.24V to
29V with an external pair of resistors.
"'tJ
...
(II
~
......
r-
"'tJ
N
CD
...o
(II
Block and Connection Diagrams
Metal Can Package (H)
INPUT
SV@
IOOmA
MAX
4
GROUND
TUH/B546-19
Top View
Order Number LP2951H
See NS Package Number H08C
TO CMOS
OR TTL
TO-92 Plastic Package (Z)
OUTPUT91NPUT
TL/H/B546-1
Order Number LP2951J, LP2951ACJ,
LP2951CJ, LP2951ACN or LP2951CN
See NS Package Number J08A or N08E
Order Number LP2951ACM or LP2951CM for SO-8
See NS Package Number M08A
1-345
...
(II
N
CD
• Error flag warns of output dropout
• Logic-controlled electronic shutdown
• Output programmable from 1.24 to 29V
(LP2951 Pinout for H, J, M and N Packages)
"'tJ
N
CD
r-
High accuracy 5V, guaranteed 100 mA output
Extremely low quiescent current
Low dropout voltage
Extremely tight load and line regulation
Very low temperature coefficient
Use as Regulator or Reference
Needs only 1 p.F for stability
Current and Thermal Limiting
LP2951 versions only
Careful design of the LP2950/LP2951 has minimized all
contributions to the error budget. This includes a tight initial
r-
......
Features
The LP2950 in the popular 3-pin TO-92 package is pin-compatible with older 5V regulators. The B-Iead LP2951 is available in plastic, ceramic dual-in-line, or metal can packages
and offers additional system functions.
o
......
GND
TL/H/B546-2
Bottom View
Order Number LP2950ACZ-5.0
or LP2950CZ-5.0
See NS Package Number Z03A
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Seles
Office/Distributors for availability and specifications.
Power Dissipation
Internally Umlted
Lead Temp. (Soldering, 5 seconds)
260"C
Storage Temperature Range
-65· to + 150"C
Operating Junction Temperature Range (Note 8)
LP2951
-55· to +15O"C
LP2950AC/LP2950C,
LP2951AC/LP2951C
-40" to + 125·C
Input Supply Voltage
Feedback Input Voltage
(Notes 9 and 10)
Shutdown Input Voltage
(Note 9)
Error Comparator Output
Voltage (Note 9)
ESD Rating is to be determined.
-0.3 to +30V
-1.5to +30V
-0.3 to +30V
-0.3 to +30V
Electrical Characteristics (Note 1)
LP2950AC
LP2951AC
LP2951
Parameter
Conditions
(Note 2)
Typ
Output Voltage
TJ = 25·C
-25·C
~
TJ
5.0
~
100 pA ~ IL
TJ ~ TJMAX
~
20
Line Regulation
(Note 14)
6V ~ Vin ~ 30V
(Note 15)
Load Regulation
(Note 14)
100 pA
Dropout Voltage
(Note 5)
IL = 100 "A
IL
~
5.0
5.025
4.975
Tested Design
Umlt
Limit
(Note 3) (Note 4)
5.025
4.975
5.08
4.84
15.075
4.825
100 mA
Output Voltage
(Note 12)
Temperature Coefficient
~
Typ
0.03
120
20
0.1
0.03
0.1
15.08
4.84
15.07
4.83
15.1
4.8
8.12
4.88
V max
Vmin
150
ppm/·C
0.4
% max
% max
0.3
% max
% max
180
mVmax
mVmax
800
mVmax
mVmax
100
0.1
380
0.1
50
IL = 100 "A
75
380
Vin = 4.5V
IL = 100 "A
110
120
Current Limit
Vout = 0
160
170
75
380
120
80
450
75
120
140
8
12
8
12
110
170
110
170
200
180
200
220
160
14
200
"A max
pAmax
220
mAmax
mAmax
200
220
V max
Vmin
"A max
"A max
mAmax
mAmax
140
14
200
200
50
450
14
Dropout
Ground Current
0.2
800
12
8
0.2
180
140
IL = 100mA
0.1
80
800
Ground
Current
0.04
0.2
80
450
80
0.2
0.04
V max
Vmin
V max
Vmin
150
IL = 100mA
5.05
4.95
Units
5.075
4.925
0.3
50
Tested Design
Umlt
Umlt
(Note 3) (Note 4)
5.05
4.95
0.5
100 mA 0.04
Typ
5.0
85·C
Full Operating
Temperature Range
Output Voltage
Tested
Limit
(Note 3)
LP2950C
LP2951C
Thermal Regulation
(Note 13)
0.05
Output Noise,
10 Hz to 100 KHz
CL=1"F
430
430
430
"Vrms
CL = 200 "F
160
160
160
"Vrms
CL = 3.3 "F
(Bypass = 0.01 "F
Pins 7 to 1 (LP2951))
100
100
100
"Vrms
8·Pln Versions only
0.2
0.05
LP2951
Reference
Voltage
1.235
1.235
1.2
1.27
1.18
1·346
0.2
%/Wmax
LP2951C
1.25
1.235
1.26
1.28
1.28
(Note 7)
0.05
LP2951AC
1.25
1.22
Reference
Voltage
0.2
1.22
1.27
1.21
1.2
1.27
1.18
1.2
1.2815
1.185
V max
V max
V min
Vmin
V max
Vmln
r
'V
Electrical Characteristics (Note 1) (Continued)
Parameter
LP2951
Conditions
- (Note2)
Typ
LP2951AC
Tested
Limit
(Note 3)
Typ
Tested
Limit
(Note 3)
N
CD
U1
LP2951C
Design
Limit
(Note 4)
Typ
Tested
Design
Limit
(Note 3)
Limit
(Note 4)
Units
o
......
r
'V
N
CD
U1
a·Pln Versions only (Continued)
Feedback Pin
Bias Current
Reference Voltage
20
40
20
40
20
60
(Note 12)
40
60
20
20
60
50
nAmax
nAmax
ppml'C
0.1
0.1
nAl'C
0.1
Current Temperature
Coefficient
'V
0.Q1
VOH = 30V
Output Low
Voltage
Yin = 4.5V
IOL = 400/LA
150
Upper Threshold
Voltage
(Note 6)
60
Lower Threshold
Voltage
(Note 6)
1
0.Q1
0.Q1
1
2
250
150
250
400
40
60
60
40
25
75
95
75
75
95
/LA max
/LA max
....
......
400
mVmax
mVmax
N
25
mVmin
mVmin
250
40
25
140
(Note 6)
150
400
95
140
~
2
1
2
mVmax
140
mVmax
15
15
15
mV
1.3
1.3
1.3
V
V max
r
'V
CD
.....
U1
l;
......
r
'V
N
CD
U1
.....
Shutdown Input
0.6
2.0
Low (Regulator ON)
High (Regulator OFF)
Vshutdown = 2.4V
30
V shutdown = 30V
450
0.7
2.0
50
30
50
450
600
100
600
(Note 11)
3
0.7
2.0
30
50
450·
600
100
750
10
750
3
10
3
20
20
Vmin
/LA max
100
/LA max
750
/LA max
/LA max
20
/LA max
/LA max
10
Note 1: Boldlace limits apply at temperature extremes.
Note 2: Unless otherwise specified all limits guaranteed lor TJ ~ 25"C. Vln ~ 6V, IL ~ 100 p.A and CL ~ 1 p.F. Additional conditions lor the B-pin versions are
Feedback tied to 5V Tap and Output tied to Output Sense (Voul ~ 5V) and Vshuldown ,;: O.BV.
Note 3: Guaranteed and 100% production tested.
Note 4: Guaranteed but not 100% production tested. These limits are not used to calculate outgoing AQL levels.
Note 5: Dropout Voltage is defined as the input to output dillerential at which the output voltage drops 100 mV below its nominal value measured at I V differential.
At very low values 01 programmed output voltage, the minimum input supply voltage 01 2V (2.3V over temperature) must be taken into account.
Note 6: Comparator thresholds are expressed In terms of a voltage differential at the Feedback terminal below the nominal reference voltage measured at 6V
Inpul To express these thresholds in terms 01 output voltage change, multiply by the error amplifier gain ~ VoutlVr.f ~ (Rl + R2)/R2. For example, at a
programmed output voltage olSV, the Error output Is guaranteed to go low when the output drops by 95 mV x 5V11 .2S5V ~ SB4 mY. Thresholds remain constant
as a percent of VOUl as Voulls varied, with the dropout warning occurring at typically 5% below nominal, 7.5% guaranteed.
Note 7: Vref ,;: Voul ,;: (Vln - IV), 2.SV ,;: Vln ,;: SOV, 100 p.A ,;: IL ,;: 100 rnA, TJ ,;: TJMAX.
Note 8: The junction-to-ambient thermal resistance of the TO·92 package Is lBO'C/W with 0.4" leads and 160'C/W with 0.2S" leads to a PC board. The thermal
resistance 01 the B-pin DIP packages is 105'C/W lor the molded plastic (N) and 1SO'C/W lor the cerdip (J) Junction to ambient when soldered directly to a PC
board. Thermal resistance lor the metal can (H) is I 60'C/W junction to ambient and 20'C/W junction to case. Junction to ambient thermal resistance lor the S.O.
(M) package is 160'C/W.
Note
Q
N
Output Leakage
Current
Regulator
Output Current
in Shutdown
o
r
Error Comparator
Shutdown Pin
Input Current
'V
N
U1
Feedback Pin Bias
Input
Logic
Voltage
r
CD
Temperature Coefficient
Hysteresis
~
......
9: May exceed Input supply voltage.
Note 10: When used in dual-supply systems where the output terminal sees loads returned to a negative supply, the output voltage should be diode",lamped to
ground.
Note 11: Vshutdown :. 2V, Yin ,;: SOV, Voul ~ 0, Feedback pin tied to SV Tap.
Note 12: Output or reference voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range.
Note 13: Thermal regulation is defined as the change in output voltage at a time T after a change in power dissipation Is applied, excluding load or line regulation
effects. Specifications are lor a SO rnA load pulse at VIN ~ SOV (1.2SW pulse) lor T ~ 10 ms.
Note 14: Regulation is measured at constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to heating effects are
covered under the specification for thermal regulation.
Note 15: Line regulation lor the LP29S1 Is testad at 1SO'C lor IL ~ 1 rnA. For IL ~ 100 p.A and TJ
Typical Performance Characteristics lor line regulation versus temperature and load current.
1-347
~
12S'C, line regulation Is guaranteed by design to 0.2%. See
o
Typical Performance Characteristics
Quiescent Current
10
Dropout Chsracterlstlcs
6
Input Current
250
I
225
]:
§'
IB
~
~
:z
ii:
Q
[!i
0.1
RL=504 -
1
10
o
o
100
1
LOAD CURRENT (mA)
120
2
3
I
I
10
~
I
140
I
120
8
Quiescent Current
'""
]:
- - Ii
i"""
...
r-..
I'
'"
,.-
600 Dropout
I/PUT VOLTAGE (V)
500 Dropout
....
..{1~I~
i-"" i-""
130
-~!-~-
110
i
L =\I00j
-,","
100
-75 -50-25 0 25 50 75 100 125150
!
400
~
300
Voltage
H-ttI-HltI--+-IItH1jjf-t+l1ffilH
~
.'
TEMPERAlURE ('C)
012345678
Voltage
i"""
o
-75 -50-25 0 25 50 75 100 125150
lBIPERAlURE C'C)
t'-..
IL=100mA
J
o
-75 -50-25 0 25 50 75 100 125150
lBIPERAlURE ('C)
Short Circuit Current
i-""
VIN=6V- rft.=100mA
,/
7
lBIPERAlVRE ('C)
150
INPUT VOLTAGE (VOLTS)
1.
60
15
IL=O
012345678
Quiescent Current
VI/=6V_ r-rIL =I00pA
r-..
",L 11
~
II
lBIPERAlURE (OC)
Quiescent Current
......
ro
o
U4
-75-50 -25 0 25 50 75 100 125 150
1 2 3 4 5 6 7 8 9 10
50
-75-50-25 0 25 50 75 100 125150
160
1 2 3 4 5 6 7 8 9
,,
t
70
~
I
I
I'
160 Quiescent Current
•
100
170
•
0.21
110
80
R~=.!- - l -
r
v
INPUT VOLTAGE (VOLTS)
90
75
50
25
140
II
o
o
I I
I I
,....
INPUT VOLTAGE (VOLTS)
Output Voltage vs.
Temperature of 3
5.06 Representative Units
i :
120
150
125
100
o
o
5
RL=504, -
:
E
20
10
4
175
INPUT VOLTAGE (VOLTS)
Input Current
110
100
I
~
.
0.1
~
IS
5
0.01
I
i!!
5
H
]:
~
IS
r- ,RL=50kA
~
I
R~=Jok~ -f-
200
1/
I : ~rnr~'C++I+HIHl-++ttHH
o
l00pA
lmA
10mA
l00mA
OUTPUT CURRENT
TL/H/8546-3
1·348
.-----------------------------------------------------------------------------'r
-a
Typical Performance Characteristics
N
CD
(Continued)
UI
22
2.1
~
2D
10
\
r-... r-...
1.9
-... .....
us
!
~G
~
~
y
./
1.7
-20
1.6
-30
-75 -50-25 0 25 50 75 100 125 150
-75 -50 -25 0 25 50 75 100 125 150
lEMPERAlURE (OC)
I
u
r
PIN 7 DRIVEN BY EXTERNAL
SOURCE (REGULATOR RUN
OPEH LOOP) -r--,d""''''1
~
-10
Q
.....
LP2951
Feedback Pin Current
50
~
~
LP2951
20 Feedback Bias Current
LP2951
Minimum Operating Voltage
1---1r-:..+'~'----t---t---t
-50
-100
I
i§
UI
~
.....
r
i§
UI
Q
'--...I.....--'----'
-250
~';';""....J.._ _
-2.0 -1.5 -1.0
-o.s
o.s
0
1.0
FEEDBACK VOLTAGE (Y)
lEMPERAlURE (OC)
!?
~
UI
8
LP2951
Error Comparator Output
2.5
LP2951
Comparator Sink Current
I
H~ESISI
l-
2D
-
T
-2
os
SEPARAlt 5V SUPPLY
0.0
I I
J
~r;
250
CD
.-
c,,=lpF
'L=lmA
80
200
60
1,\
400
600
7
LP2951
Enable Transient
I--
I
I
.pCL=l p F
r-..;
T
~ E 100
~';;;' 50
U~
'II"
1-
VOUTi5V~+
-,
12
90
10
-"
16
20
TIME (PI)
Ripple Rejection
II)
II)
2
Iii'
s
70
os
~
60
02
0.1
0lIl
CLQ'l
lID
IK
111(
nmUENCY (Hz)
lOll(
iil
50
i
«l
!t'1-c,,=10/
1M
FR[QUENCY (Hz)
FR£QUENCY (Hz)
TLIHI8548-4
1-349
•
Typical Performance Characteristics
III
Ripple Rejection
(Continued)
35 Output N_o.,.ls.,.e,.,...",;-....,.,.mm
' L=I00mA ~
!tl
\
10 '0'
I
I
\
VOUT=5V
W
10'
111
o
111
F'REIIUENCY (Hz)
1.2
30
!
1.8
REGULATOR
-75 -50-25 0 25 50 75 100 125150
10'
1.8 Shutdown Threshold Voltage
"-
orr
i
.,....
,..
25
20
15
10 TJ =15O"C_
5
I
D.6
-75 -so -2S 0 25 50 75 100 125 150
LP2951 Maximum
Rated Output Current
120 .--...,....--,-'-..,--=-=::-:==--,
1t.=100~
~
0
5
0
BD
60
40
20
'-5
-10
0
5
10
15
20
30
25
10
0
15
2D
25
30
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Thermal Response
5
120
5
5
1t.=100""
TJ=I25OC
LP2950 Maximum
Rated Output Current
i3
5
100
i3
10
TEMPERATURE (OC)
§
1
§
1t.=lmA
..........,.-
~
D.8
TEMPERATURE (OC)
Line Regulation
~
REGULATOR ON
1
100
N
f'IIEQUENCY (Hz)
1.4
~
iI!
'\. .J
v
, ....
1\lO
iI!
g
~
,.
300
~
II!...
~
f-- C1.=II'F
f---: VIN=6V
LP2951 Divider Resistance
400
1t.=50mA
100
-r-r-
80
~~
BD
,g
40
z
0
10
15
2D
25
1
j-r-r- -I~w -r-i-
I~ 0
D-1 o
20
0
-2
30
INPUT VOLTAGE (V)
10
20
30
40
50
T1ME!!'s)
TL/H/8546-5
Application Hints
the error amplifier at lower gains so that more output capacitance is needed. For the worst-case situation of a 100 mA
load at ,1.23V output (Output shorted to Feedback) a 3.3 p.f
(or greater) capacitor should be used.
Unlike many other regulators, the L2950 will remain stable
and in regulation with no load in addition to the internal voltage divider. This is especially important in CMOS RAM
keep-alive applications. When setting the output voltage of
the LP2951 version with external resistors, a minimum load
of 1 p.A is recommended.
'
A 0.1 p.f capacitor should be placed from the
LP2950/LP2951 input to ground if there is more than 10
inches of wire between the input and the AC filter capaCitor
or if a battery is used as the input.
EXTERNAL CAPACITORS
A 1.0 p.f (or greater) capacitor is required between the
LP2950/LP2951 output and ground for stability. Without this
capacitor the part will oscillate. Most types of tantalum or
aluminum electrolytics work fine here; even film types work
but are not recommended for reasons of cost. Many aluminum electrolytlcs have electrolytes that freeze at about
-300C, so solid tantalums are recom'mended for operation
below - 25°C. The important parameters of the capacitor
are an ESR of about 5 n or less and a resonant frequency
above 500 kHz. The value of this capacitor may be increased without limit.
At lower values of output current, less output capacitance is
required for stability. The capacitor can be reduced to 0.33
p.f for currents below 10 mA or 0.1 p.f for currents below
1 mAo USing the a-Pin versions at voltages below 5V runs
Stray capacitance to the LP2951 Feedback terminal (pin 7)
can cause instability. This may especially be a problem
1-350
Application Hints (Continued)
when using high value external resistors to set the output
voltage. Adding a 100 pf capacitor between Output and
Feedback and increasing the output capacitor to at least 3.3
/Lf will fix this problem.
The complete equation for the output voltage is
VOUT = VREF· (1
+ :~) + IFBR1
where VREF is the nominal 1.235 reference voltage and IFB
is the feedback pin bias current, nominally -20 nA. The
minimum recommended load current of 1 /LA forces an upper limit of 1.2 MO on the value of R2, if the regulator must
work with no load (a condition often found in CMOS in
standby). IFB will produce a 2% typical error in Your which
may be eliminated at room temperature by trimming R1. For
better accuracy, choosing R2 = lOOk reduces this error to
0.17% while increasing the resistor program current to 12
/LA. Since the LP2951 typically draws 60 /LA at no load with
Pin 2 open-circuited, this is a small price to pay.
ERROR DETECTION COMPARATOR OUTPUT
The comparator produces a logic low output whenever the
LP2951 output falls out of regulation by more than approximately 5%. This figure is the comparator's built-in offset of
about 60 mV divided by the 1.235 reference voltage. (Refer
to the block diagram in the front of the datasheet.) This trip
level remains "5% below normal" regardless of the programmed output voltage of the 2951. For example, the error
flag trip level is typically 4.75V for a 5V output or II.4V for a
12V output. The out of regulation condition may be due either to low input voltage, current limiting, or thermal limiting.
REDUCING OUTPUT NOISE
Figure 1 below gives a timing diagram depicting the ERROR
In reference applications it may be advantageous to reduce
the AC noise present at the output. One method is to reduce
the regulator bandwidth by increasing the size of the output
capacitor. This is the only way noise can be reduced on the
3 lead LP2950 but is relatively ineffiCient, as increasing the
capacitor from 1 /LF to 220 /LF only decreases the noise
from 430 /LV to 160 /LV rms for a 100 kHz bandwidth at 5V
output.
signal and the regulated output voltage as the LP2951 input
is ramped up and down. The ERROR signal becomes valid
(low) at about 1.3V input. It goes high at about 5V input (the
input voltage at which VOUT = 4.75). Since the LP2951's
dropout voltage is load-dependent (see curve in typical performance characteristics), the input voltage trip point (about
5V) will vary with the load current. The output voltage trip
point (approx. 4.75V) does not vary with load.
Noise can be reduced fourfold by a bypass capacitor accross R1, since it reduces the high frequency gain from 4 to
unity. Pick
The error comparator has an open-collector output which
requires an external pull up resistor. This resistor may be
returned to the 5V output or some other supply voltage depending on system requirements. In determining a value for
this resistor, note that while the output is rated to sink 400
/LA, this sink current adds to battery drain in a low battery
condition. Suggested values range from lOOk to 1 MO. The
resistor is not required if this output is unused.
1
CBYPASS eo 21TR1 .200 Hz
or about O.ot /LF. When doing this, the output capacitor
must be increased to 3.3 /LF to maintain stability. These
changes reduce the output noise from 430 /LV to 100 /LV
rms for a 100 kHz bandwidth at 5V output. With the bypass
capacitor added, noise no longer scales with output voltage
so that improvements are more dramatic at higher output
voltages.
PROGRAMMING THE OUTPUT VOLTAGE (LP2951)
The LP2951 may be pin-strapped for 5V using its internal
voltage divider by tying Pin 1 (output) to Pin 2 (sense) and
Pin 7 (feedback) to Pin 6 (5V Tap). Alternatively, it may be
programmed for any output voltage between its 1.235V reference and its 30V maximum rating. As seen in Figure 2, an
external pair of resistors is required.
V~~~~~
ERROR.----: I
I f--·-
ERROR
+VIN
":o;:;;uyp=u"'r,.....-=-I ERROR
Your
Your
1.2 -+ 30V
1-=--+-'--4-
LP2951
.. SHUTDOWN 3 SD
INPUT
INPUT
VOLTAGE
TL/H/8546-7
TLlH/8546-20
FIGURE 2. Adjustable Regulator
'See Application Hints
'In shutdown mode, ERROR will go high If It has been pulled up to an
external 5V supply. To avoid this Invalid response, ERROR should be
pulled up to Your (see Figure 2).
FIGURE 1. ERROR Output Timing
Vout
= VRef (1
+~)
"Drive with TIL·high to shut down. Ground or leave open if shutdown feature is not to be used.
Nota: Pins 2 and 6 are left open.
1-351
Typical Applications
1A Regulator with 1.2V Dropout·
UNREGULATED - -....- -....---4~--..,
INPUT
OUTPUT
t=-_ _...._~5V*'''@
OTOIA
TL/H/8548-22
300 mA Regulator with 0.75V Dropout
Wide Input Voltage Range Current
Limiter
UNREGOLATED-.....- - - - - - - - - - - -....- . ,
INPUT
+VIN
2N5432
(2)
8
ERROR
5
~=,......:::t
OUTPUT
~_ _~_-i~~5V
ERROR
+VIN
1 -Vour RlVIN
VOUT ..,:.-...;.;;.;......;;;...
lP2951
OUTPUT
TLlH/8546-21
TLlH/8546-8
'Minimum Inpul-OUlpul voltage ranges· from
40 mV 10 400 mY. depending on load current.
Current IImij Is'typically 180 rnA.
Low Drift Current Source
+V=2-+3OV
.__ L.
I
I
5 Volt Current Limiter
:IL=I~
._-
Id:
LOAD
I
5V BUS
I
+VIN
8
LP2950Z
- Vour Rl5V
VourJ--....-
YOUT
LP2951
SHUTDOWN 3 SO
INPUT
GNO
4
GNO
TLlH/8546-10
'Minimum inpul-output voltage ranges from 40 mV to 400 mY. depending on
load current Current lim~ Is typically 180 mAo
R
'"
TLlH/8546-8
1-352
Typical Applications (Continued)
2 Ampere Low Dropout Regulator
CURRENT
LIMIT SECTION
Regulator with Early Warning
and Auxiliary Output
+--
0.05
470
ZN3906
+VOUT 02A
.033:
I
D.
8
RESET
330kn.
-
3 SO
ERROR
4
TL/H/8546-13
+ViN
• SLEEP
INPUT
I~
GNO
RZ
5V Regulator with 2.5V Sleep Function
+
5
100
,EANT·II'F
-
+~)
VOO
LP2951
#2
+
For 5Vout, use internal resistors. Wire pin 6 to 7, & wire pin 2 to + Vout Buss.
",p
+V'N
~---.'"
4.7
47
I
I
I
Vout - 1.23V ( 1
0,
FB
VOUT
I
I
20k4
2.7Mn.
SO
GNO
220
RI +
LP2951
3
47kn.
470kn.
8
.;ER::::R=OR~~5=i ERROR
TLlH/8546-11
+V'N
OUTPUT
• Early warning flag on low Input voltage
LP2951
• Main output latches off at lower input voltages
SHUTDOWN 3 SO
INPUT
• Battery backup on auxiliary output
Operation: Reg. # l's Vout Is programmed one diode drop above 5V. Its error
flag becomes active when Vln ,;: 5.7V. When Vln drops below 5.3V, the error
flag of Reg. # 2 becomes active and via Ql latches the main output off.
When Vin again exceeds 5.7V Reg. #1 is back in regulation and the early
warning Signal rises, unlatching Reg. # 2 via C3.
100kn.
Latch Off When Error Flag Occurs
'High input lowers Vout to 2.5V
+Vln
TL/H/8546-14
Open Circuit Detector for
4 -+ 20 mA Current Loop
+5V
4.7k4
4--20mA
RI
FB
RESET
Rz
OUTPUT'
S
+
VIN
I~
IN
4001
VOUT
LP2951
4
• HIGH FOR
\..<3.5mA
TLlH/8546-12
360
MIN. VOLTAGEI:j4V
1-353
TL/H/B546-15
II
Typical Applications (Continued)
Regulator with State-of·Charge Indicator
+VIN
...---Q,Ut-..... ERROR
+VOUT=5V
Vour ~....- ......~
LP2951
> ....~~SD
rB 7
6
39k.B
+
fN
-=.LBAllERY
100k.B
LIAD-ACIl
<5.8V"
100k.B
<6.OV··
Cl-C4
LP339
100k.B
<6.2V··
1"
TLlH/8546-18
'Optional Latch off when drop out occurs. Adjust R3 lor C2 SwItching when Vln I. 6.0V.
"Outputs go low when Viii drops below designated thresholds.
For values shown. Regulator shuts down when Vln
+
Low Battery Disconnect
< 5.5V and turns on again at a.ov. Current drain In disconnected mode Is '" 150 ",A.
fN
_ SEALED
::::: LEAD-ACID
BATTERY
.L
_
SOURCE
8
+VIN
MAIN V+
Vour ~--...-II~-'::::::';":'';'
LP2951
Rl400k.B •
MEMORY V+
SENSE 2
FOR 5.5V
GND
4
20.B
+
-=-
1.
'Sets disoonnect Voltage
"Sets disconnect HysteresiS
NI-CAD
BACKUP
BAntRY
TL/H/8546-17
1-354
Typical Applications (Continued)
System Overtemperature Protection Circuit
+VIN
10kA
5° PRE-SHUTDOWN FLAG
,:;::AU:::;X::,.• .:::SH::.:U:..::TDO=W::;Nt-~3 SD
INPUT
LP2951
Your
GND
1------.-------- ---
FB
EXTERNAL CIRCUIT
PROTECTED FROM
OVER TEMPERATURE
(V+ GOES OFF WHEN
TEMP.> 125°)
7
TEMP.
SENSOR
.......,~
B.2kA
TLfHf8548-18
LM34 for 125'F Shutdown
LM35 for 125"C Shutdown
•
1·355
LP29501 LP2950ACI LP2950CI LP29511 LP2951ACI LP2951C
en
n
::r
IN
CD
3
m
n'
c
i'
Dl
ca
3
R28
60kA
~
R30
30kA
50kA
<4
13kA
S ~~~ _
L-....L
- - - - DENOltS CONNECTION ON
LP2950 ONLY
___ = I f '
,
'IGND
TUH/8546-23
Section 2
Switching Voltage
Regulators
•
Section 2 Contents
Switching Voltage Regulators Selection Guide .........................................
HS7067/HS7107 7-Amp, Multimode, High Efficiency Switching Regulator .................
LH1605/LH1605C 5-Amp, High Efficiency Switching Regulator................ .... .......
LM494 Pulse Width Modulated Control Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM1524D/LM2524D/LM3524D Regulating Pulse Width Modulator............... ........
LM1525A1LM3525A1LM1527AlLM3527A Pulse Width Modulator . . . . . . . . . . . . . . . . . . . . . . . .
LM1575-5.0/LM2575-5.0 Simple Switcher Step-Down Voltage Regulator. . . . . . . . . . . . . . . . . .
LM1578A1LM2578A1LM3578A Switching Regulators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM2579 Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM78S40 Universal Switching Regulator Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LMC7660 Switched Capacitor Voltage Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . .
2-2
2-3
2-4
2-14
2-17
2-24
2-41
2-51
2-59
2-73
2-86
2-93
_National
Semiconductor
Switching Voltage Regulators Selection Guide
Switching Voltage Regulators
Amps
Device
Operation Modes
VIN Range
Package
10V-100V
10V-60V
TO-3
TO-3
Step-Up, Step-Down, Invert
2V-50V
TO-220
7.0
tHS7107CK
tHS7067CK
Step-Down, Invert, Flyback
Step-Down, Invert, Flyback
5.0
LH1605CK
Step-Down
3.0
LM2579
TO-3
1.5
tLM78S40CN
Step-Up, Step-Down, Invert
2.5V-40V
16-Pin DIP
1.0
LM1575-5.0
Step-Down
8V-40V
TO-220
tLM1578H
LM2578H, N
LM3578N, H, M
Step-Up, Step-Down,
Invert, Flyback
2V-40V
TO-39,
8-Pin DIP
SO-8
1.5V-10V
8-Pin DIP
0.75
0.05
LMC7660lN
Invert
Switching Controllers
Device
Title
LM1524/2524/3524
Switching Regulator
LM1525A13525A
Switching Regulator
LM 1527Al3527 A
Switching Regulator
LM494
Pulse Width Modulated
Control Circuit
Package
16-Pin Plastic DIP, SO-16
16-Pin Ceramic DIP
16-Pin Plastic DIP
16-Pin Ceramic DIP
16-Pin Plastic DIP
16-Pin Ceramic DIP
16-Pin Plastic and
Ceramic DIP
tMilitary qualified devics. For more information, consult the Militaryl Aerospace Selection Guide.
•
2-3
...o
r- ,----------------------------------------------------------------------------,
~;::: ~National
~ Semiconductor
~::c
PRELIMINARY
HS7067/HS7107 7 Amp, Multimode, High Efficiency
Switching Regulator
.General Description
Features
The HS7067/HS7107 is a hybrid high efficiency switching
regulator with high output current capability. The device is
housed in a standard TO-3 package containing a temperature compensated voltage reference, a pulse-width modulator with programmable oscillator frequency, error amplifier,
high current, high voltage output switch and steering diode.
The HS7067/HS7107 operates in a step-down, inverting, as
well as in a transformer-coupled mode.
The HS7067/HS7107 can supply up to 7A of continuous
output current over a wide range of input and output voltages.
•
•
•
•
•
•
•
HS7067-10V to 60V input
HS7107-10V to 100V input
7A continuous output current .
Step-down, inverting, and transformer-coupled operation
Frequency adjustable to 200 kHz
High-efficiency (>75%)
Standard 8-pin TO-3 package
Block and Connection Diagrams
---1_--.....-~
INPUT0-,5+----_ _ _
.--......---1_+-8 000UTPUT
STEERINO
DIOOE
(ANODE)
CLOCK~+-----.....,
TIMING ~4+-"""-I
CAP
3
ERROR
t----....--+.oo AMP INPUT
....-...;..-Fo(l EXTERNAL
t----~
CAP (YaEF)
PWMCONmOL 1
AND COMPENSATION 0 - + - - - - - - - - - - . . . . . 1
TUK/6746-1
Metal Can Package
TUK/8748-2
Top View
C_lsground
Order Number HS7067CK, HS7067K,
HS7107CK or HS7107K
See NS Package Number K08A
2-4
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
VIN, Input Voltage
HS7067
65V
HS71 07
105V
lOUT, Output Current
8A
TJ, Operating Temperature
150'C
Po, Internal Power Dissipation
25W
Electrical Characteristics Tc =
Symbol
VIN-VOUT
Vs
TA, Operating Temperature Range
HS7067C17107C
HS706717107
TSTG, Storage Temperature Range
VR(VS-7),
Steering Diode Reverse Voltage
Conditions
I HS7067
I HS7107
Switch Saturation Voltage
Min
10V s: VIN s: VIN(MAX)
lOUT = 2A (Note 6)
Ic = 7.0A, VIN = 10V
Steering Diode On Voltage
10 = 7.0A
VIN
TMIN
TMIN
I HS7107
I HS7607
1.6
I HS71 07
TBD
10
100
V
60
/LA
6
100% Duty Cycle (V3 = OV)
26
Clock Output High
IClK = - 750 jJ.A
Clock Output Low
IClK = 80/LA
aV2
Line Regulation of
Reference Voltage on Pin 2
VMIN
RA
Resistance on Pin 3 to Ground
(Note 4)
VOUT
Feedback Resistor R, Tol. ± 1%
s: VIN s: VMAX
2.3
2.5
1.2
1.6
Voltage Swing-Pin 4
mA
2.7
V
0.9
V
V
mV
4.0
I H57107
4
V
mA
5
I HS7067
V4
V
60
0% Duty Cycle (V3 = 3.0V)
s: TA s: TMAX
V
10
Quiescent Current (Note 3)
VClKH
V
TBD
IQ
VClKl
V
1.7
VR = 100V
TMIN
V
1'.9
1.3
Steering Diode Reverse Current
V2
V
TBD
0.9
s: TA s: TMAX
s: TA s: TMAX
Units
V
1.0
IR
Reference Voltage on Pin 2
Max
3.0
10 = 2.0A
I HS7067
I HS7107
Typ
3.0
I HS7607
Supply Voltage Range
. (Note7)
8A
25'C, VIN = 20V (unless otherwise specified)
Ic = 2.0A, VIN = 10V
VF
105V
IO(l7-S),
Steering Diode Forward Current
Parameter
Min VINIVOUT Differential
- 25'C to + 85'C
-55'Cto + 125'C
- 65'C to + 150'C
kO
TBD
%
9
3.0
V
14
Charging Current-Pin 4
IClK
Clock Input Current - Pin 6
VClK = 3.5V
330
tr
Transistor Current Rise Time
10 = 2.0A (Note 6)
70
ns
10 = 7.0A (Note 6)
120
ns
10 = 2.0A (Note 6)
100
ns
1.75
/LA
4
mA
t,
Transistor Current Fall Time
10 = 7.0A (Note 6)
160
ns
Is
1cI
Diode Storage TIme
10 = 7.0A (Note 6)
120
ns
Delay Time
10 = 7.0A (Note 6)
600
fMAX
Max Clock Frequency
(Note 5)
2-5
ns
200
kHz
Electrical Characteristics Tc =
Symbol
25'C, VIN = 20V (unless otherwise specified) (Continued)
Parameter
Conditions
ZPINl
Impedance at Pin 1
(Note 6)
'1/
Efficiency
VOUT = 5V
lOUT = 1A
Thermal Resistance
liJC
Min
I
I fa = 200 kHz (Note 5)
fa = 25 kHz (Note 6)
(Note 1)
Typ
Max
Units
5
MO
80
%
70
%
4.0
'C/W
Nole 1: 8JA is typically 3S'C/W for natural convection cooling.
Nole 2: VOUT and lOUT refer to the output DC voltage and output current of a switching supply after the output LC filter as shown in Figure 1.
Nole 3: Quiescent current depends on the duty cycle of the switching translator.
Nole 4: This test includes the input bias current of the error amplifier.
NOle 5: Circuit configured as shown In Figure 1.
Nole 6: These parameters are not tested. They are given for Informational purposes only.
Nole 7: Functionally tested at limits only (pass·fail).
Typical Performance Characteristics
Frequency vs Timing
CapaCitance
Power Derating Curve
::
1--+--lI\~....
!:
15
I-+-+-+"',rr---+-+-l
e
10r-r-~r-~~,rr-r~
o
'--'--'-_'--'--"'=-'-....1
o 25 50 75 100 125 150 175
AMBIENT TEMPERATURE I'C)
8JC = 4'C/W
8JA = 35'C/W
100~.
lM~.
300k~
INF!NITEI._1-i\EAT SINK
5~ffi4-~
Typical Compensation
Input Voltage vs Rc
~IOOk'lgli
1=
s
10
10k L-....J....J..J...I.1.LI.1I...--L-L...1...U.1JII
100
1000
10000
CT-TiMINO CAPACITANCE (pF)
L-_~_~-'-~~~
20k
2k
RcID)
1
fa = 10k x CT
R
C=
TL/K/6746-3
[200k]
VIN(MAX) 0
CC=KCxffO F
RC
Typical Applications
THE BUCK CONVERTER (Step Down)
The buck converter is the most common application in
switching-power conversion. It allows to step down a voltage with a minimum of components and a maximum of efficiency (for further information on the theory of operation of
a buck converter, see AN-343).
fa
25 kHz
L
86,.,.H
21,.,.H
CT
0.0039,.,.F
330pF
Cc
0.2,.,.F
0.068,.,.F
RC
COUT
VIN
~
10V to
3SV
VOUT ~ SV
lOUT ~ lA to 6A
200 kHz
4kO
4kO
5.7kO
5.7kO
1500,.,.F
680,.,.F
Load Regulation ~ 40 mV
Line Regulation ~ 5 mV
TL/K/6746-4
2-6
Typical Applications (Continued)
Design equations:
Capacitor Losses (Pel
Following are the design equations for a buck converter application using the HS 710717067:
P = ESR X (Vo (T - DTl)2
C
4L
1
Or =
Diode DC Losses (Po)
104 X fo
Po = Vf X 10 X (1 - D)
L
(VIN(MAX)-VO) Vo
MIN = VIN(MAX) X fO X AI
(Note7,9)
_
AI
MIN - 4fo (eo - AI X ESR)
(NoteS, 9)
C
Drive Circuit Losses (DLl
DL = 0.02 X VIN X 0
Inductor Losses (PLl
PL = 102 X RL (DC winding resistance)
Cc=J10LC
RC
Power Output (Po)
R _ 2X10 5
C - VIN(MAX)
Rf = 4k(VO -2.5
2.5
Po = «VIN - Vs) tON) - «VF) toFF) X 10
tON + tOFF
)0.
Efficiency (1j)
Po
Po
Nate 7: lMIN is the minimum value of output filter inductance, l, for stable
operation.
1j=~=~+Pr+~+~+~+~+%
Note 8: CMIN is the minimum value of output filter capacitance, C, necessary
to achieve an output ripple voltage, eo. ESR is the Effective Series
Resistance of the output filter capacitor, C, at the operating frequen·
TRANSFORMER COUPLED CONVERTERS
In addition to the implementation of a buck converter, the
HS 710717067 can be used in various transformer coupled
configurations. They can be used in various topologies such
as: step-up, step-down, inverter, multiple outputs and isolated converters.
cy, fo·
= Peak to Peak Ripple current through the Inductor and the
.
"'I
"'I
capacitor. '2 < 10 MIN and '2 < 7 - 10 MAX·
Note 9: "'I
There are basically two different methods in implementing
transformer coupled converters: the flyback and the foward
topology
Efficiency Equations
Since high efficiency is the principal advantage of switchedmode power conversion, switching regulator losses are an
important design concern. Losses and efficiency of a buck
converter can be calculated with the following equations.
The Flyback Principle
Figure 1 shows a functional diagram of a flyback converter.
Depending on the turn ratio N2/N1 and the feedback voltage, it can be implemented as a step-down or step-up converter.
Nate: Pin 7 is grounded; 10 = average output current at pin 8
SWitching Period (T)
1
T=-=tON+tOFF
fo
When the switch is on, the current (Ip) flows through the
primary winding creating a magnetic flux In the core and
storing the energy. At this time, the voltage at the secondary
keeps the same polarity (with respect to the dotted terminals), the diode is off and no current flows through it. When
the switch is off, the voltage at the secondary and primary
becomes reversed and the diode turns-on (Id)' The stored
energy is then transferred to the load and the output filter
capaCitor. The energy stored in the capaCitor will supply the
load current during the next turn-on.
Duty Cycle (D)
D=_~to:!!.N_
.
toN + toFF
Transistor DC Losses (Pr)
Pr = Vs X 10 X 0
Transistor Switching Losses (Ps)
Ps = (VIN + VF) X 10 X
(~+ tf; 2ts)fo
TUK/6746-5
FIGURE 1. Typical Flyback Functional Diagram
2-7
•
Typical Applications (Continued)
Torr
TON
T=I/F
I
I
1--'
V,
Vp
Vas
V.
= Vol18ge al primary
Ip
Id
10
= Current at primary
= Current through diode
= Current through output cap
= Output current of lhe converter
= Ripple current
lout
.1.1
o
F
Vdf
'r-
'--
'n
= Voltage at the secondary
~UK ~
LI .
t
r1 r1
U u=
'BIAS
::w
= Ton/(Toff + Tonl
= Switching frequency
= Forward vol18ge drop of the diode
I
t
--
'~b u
= Voltage across the switch
.,......
Vs
= VOU! X N,1N2
V,
V3
V2 = Yin + Vou' N,1N2·
= Saturation vol18ge of the switch
V4
= VoU!
+ Vdf
V5 = Yin X N21N,
'D
1
DDC.
t
;--,
m
'c
Fl
.
TL/K/6746-6
FIGURE 2. Typical Flyback Waveforms
The load current is not supplied directly by the input source
when the switch is on, but only by the energy stored in the
output capacitor. The output voltage is monitored by the
feedback loop which controls the duty cycle (D) through the
PWM (Pulse Width Modulator) which in turn, modulates the
amount of energy being transferred from the input to the
output. Figure 2 shows the waveforms of a continuous
mode flyback converter (primary current Ip is DC biased).
The Forward Principle
The forward converter is a little more complex and requires
more components than the flyback, but the output ripple
voltage is smaller. Agure 3 shows a simplified diagram of II
forward converter.
When the switch turns·on, a voltage Vs = V, X N2/N,
appears at the secondary of the transformer. The diode 02
TUK/6746-7
FIGURE 3. Typical Forward Functional Diagram
2-8
~------------------------------------------------I%
functional principle of the demagnetizing winding is similar
to the flyback in the sense that, during the turn-off time, the
residual magnetism will generate a reverse voltage at the
demagnetizing winding (with respect to the dotted terminals)
turning on the diode 03.
In the forward mode, when the switch is off, the load current
is supplied by the energy stored in the output capaCitor and
the choke inductor but when the switch is on, it is supplied
by the input source through the transformer. This accounts
for the lower output ripple voltage.
The output voltage is monitored by the feedback loop,
which controls the duty cycle through the PWM, which in
turn modulates the amount of energy being transferred from
the input to the output.
Typical Applications (Continued)
is off while 01 turns-on, allowing the current to flow through
the inductor L (ld1 and Ill, storing energy in its core, and
supplying the load current (lout> and the capacitor current
(Iel at the same time. When the switch turns-off, the magnetic energy stored in the core of the inductor creates a
current (ld2) which flows through the diode 02. The load
current lout therefore, equals to Id2 + Ic.
During the "off" time of the switch, some residual magnetism will stay in the core of the transformer and has to be
removed before the next cycle, so that it does not accumulate, leading to core saturation.
A demagnetizing winding is used to "dump" the residual
energy back to the input or output of the converter. The
- _.
TD
Vp
I
V,N
Voltage at primary
Voltage across the swHch
Voltage at secondary
Current at primary
Current through diode 01
Current through diode 02
1d2
Current through diode Oa
Ida
Current through Inductor L
IL
Current through output cap
Ie
Output current of the converter
1001
Ripple current
&1
F
= SwHchlng frequency
0
= Ton I IToH + Ton>
VI
=Vln X NIlNa Va = Vln
V2
= Vln + VI
V4
= Saturation voltage of the switch
Vs
= Vln X N21N1
Vs = Vln X N2INa
Figure 4 shows the waveforms of the forward converter.
When the switch is off, Vas = Vin + (Vln X N11N3) during
the demagnetization time (Td) and then, drops to Vas = Vin
as indicated in Figure 4.
vp
V..
V.
Ip
Idl
=
=
=
=
=
=
=
=
=
=
=
l"-
VI
TON
I
I
I
I
__ U
TOFF
.. -
T=I/F
I
n
I
n
Q
.....
c
~-t:::::::::=:r .
~ --~,
--
.............
.............
TLlK/S746-B
FIGURE 4. Typical Forward Waveforms
2-9
....
t
•t
.............
:::!
%
en
.....
I
o o
AI -
~
m
.1
r-U r-U rI
en
•
~ r-----------------------------------------------------------~----------------------------~
o
....
~
U)
::J:
~
Typical Applications (Continued)
With both flyback and forward topologies, it is possible to
design an inverting converter by using an external op-amp
(Figure 5).
Isolated Flyback Converter
Figure 7 shows an isolated flyback converter using a sense
winding for feedback. Although, in practice the line, regulation is acceptable, the,load regulation can be marginal if the
coupling between the windings is poor. However, the sense
winding cannot detect any ohmic voltage drop in the main
output so, a heavier gauge wire should be used to reduce
this regulation error. Also, the sense winding will not 'sense
the non-linear voltage drop across the diode, and this accounts for most of the 'load regulation inaccuracy.'Therefore, the sense winding method is only recommended for
applications where load variations are small.
U)
::J:
Figure 7 shows an isolated flyback converter with an output
of 5V at 2A. The input voltage range is from + 10V to
+40V. The output can be adjusted to +5V by using the
5 kO trimpot.
TlIK/6746-10
Performance Data
FIGURE 5
Parameter
Conditions
Result
Efficiency
Vout = 5V@2A
Vin = 30V
75%
Line Regulation
Vout = 5V@2A
10V S; Vin S; 40V
5%
Load Regulation
Vln = 30V
lA S; lout S; 2A
7%
Flyback Step-Up Application
Figure 6 shows flyback converter in a step-up mode where
an input voltage of + 12V to + 30V will be converted into a
regulated output voltage of + 50V.
Performance Data
Parameter
Conditions
Result
Efficiency
Vout = 50V@300mA
Vln = 15V
82%
Line Regulation
Vout = 50V@300mA
12V S; Vin S; 30V
0.2%
Load Regulation
Vin = 15V
Vout = 50V
50 mA S; lout
0.2%
S;
Isolated Forward Converter
As described previously, forward converters exhibit lower
output ripple voltage and the opto-coupler feedback
scheme provides good regulation as well as input to output
isolation.
An opto-coupler feedback is usually difficult to implement
because the transfer function of the opto-coupler is non-linear, the current transfer ratio changes with time and temperture and also from one unit to another. Figure 8 shows the
circuit diagram of a 5V @ 3A powe~ converter w!th an input
voltage range of + 14V to + 30V u'sing I;In Isolated forward
t6pology.
300 mA
V~IN~r-----:::::::::::Jr:::~~l:::::j-----_t
t---IM~p-~ 50V
0300mA
12V TO 30V
330/loF
1 NF
.....- - -........ OV
0= Unltrode UES1302
T = Pulse Engineering PE64428
150D.
.13D.
2W
= 100 kHz
lout (min) = 50 mA
10
• ELECTROLYTIC CAPACITOR
TL/K/6746-11
A 12V to sov input Voltage Range I. possible by replacing the HS7067 with a HS7107. The oonverter will operate In a dlsoontlnuous mode above 30V WIth a
300 mA load (the translonner's secondary current drops to zero before the switch tume on) and therefore. may generate more switching noise.
FIGURE 6. Flyback Step-Up Converter
2-10
Typical Applications (Continued)
01
02
IOU! (mini
fo
T
~
~
International Rectifier 5080060
lN414B
1A
~
100 kHz
~
~
Transformer made of a core Fenoxcube 1811PA2503B7
PrImSIY
= 8 IIIrns with 5 strands # 29
SecondSIY ~ 8 IIIms with 15 strends # 30
Sense
= 25 turns with 1 strand # 30
windings should be Interleaved In order to Improve
the coupling and regulation.
IOV TO 40V
330pF
....---4~.OV
lNF
.134
3k4
2W
FIGURE 7. Isolated Flyback Converter
• ELECTROLYTIC CAPACITOR
TL/K/B748-12
02 ~ International Rectifier 50saoeO
Da
~ Unitrode UES1302
T
~ Pulse Engineerlng PE84423
L
~ Pulse Engineering PE52711
fo
~ 50 kHz
1001 (min) ~ 0.5A
01
~
....----~~------------~--~~~
3k4
45.3k4
• ELECTROLYTIC CAPACITOR
FIGURE 8a. Isolated Forward Converter
TLlK/6748-13
TLlK/6746-9
F/glJrB 8b shows the Iyplcalforward converter waveforms In continuous mode which can be observed using the circuit from F/gur9 88. Top waveform is the voHage
aero.. the switch (20Vldlv). Bottom waveform Is the current throughout the switch (lA1dv). Horizontal Scale ~ 5 p.S/dir. Vln ~ 20V; VOUI ~ 5V til 3A.
Figure8b.
2-11
~
~
.,...
Iii
:::t:
~
:::t:
r-----------------------------------------------------------------------------,
Typical Applications (Continued)
An LM 385z (adjustable reference) is used as a comparator
and error amplifier. This reference always wants to maintain
1.2V between pins 1 and 2 and will draw as much current as
necessary from the opto-coupler to achieve this. Therefore,
the feedback loop is virtually independent of the gain of the
opto-coupler.
Performance Data
Conditions
Result
Efficiency
Vout = 5V@3A
Yin = 30V
78%
Line Regulation
Vout = 5V@3A
14V ~ Yin ~ 30V
0.1 %
Load Regulation
Vout = 5V
Yin = 20V
0.5A ~ lout ~ 3A
0.1 %
Result
VI = 5.1V@2A
V2= -12V@150mA
Va = 12V@100mA
IVinl = 48V
62%
Line Regulation
on Main Secondary
40V ~ IVlnl ~ 60V
VI = 5.1V@2A
V2 = -12V @ 150 mA
Vs = +12V@ 150 mA
0.8%
Load Regulation
on Main Secondary
!Vinl = 48V
VI'" 5.1V
V2 = 12V@150mA
Va = 12V@150mA
0.5 ~ lout ~ 2A
1%
!Vinl = 48V
VI = 5.1V@2A
V2 = -12V
Va = 12V
75 mA ~ lout ~ 150 mA
5%
Efficiency
Performance Data
Parameter
Conditions
Parameter
Load Regulation
on 12V Secondary
for Simultaneous
Load Changes
Isolated Telecom Converter
Figure 9 shows an isolated triple output converter which will
transform positive or negative input voltage of 32V to 60V
to an uncommitted triple output of +12V, -12V, and 5V,
which may be later referenced to the system ground. This
converter is ideal for a step down converter of high positive
voltage or high. negative voltage such as -48V used in tele- :.
com circuits.
a
+12V
0150mA
Dl
D,
T
~
~
D2 ~ D3 UnHrode UES1302
Pulse Engineering PE64379
10
~
100 kHz
Pout (min)
~
. V3
OV
5W
V2
-12V
0150mA
+5.1V
021<
+
VI
iii-
12
OV
100J'F
~
II
76.8kA
• ElECTROLYTIC CAPACITOR
Note 10: An input voltage of -10V \0 -30V may cause the transformer \0 operate at a higher temperature at !Ullioad.
FIGURE 9. Telecom Flyback Converter
2-12
TL/K/6746-14
:::I:
Application Hints
The sense resistor should be a low inductance type, otherwise the series inductance creates a high impedance at
transients and activates the shutdown circuitry. If such a
resistor cannot be found, a 0.1 /LF connected in parallel with
it will compensate the series inductance.
When such a circuitry is used, the duty cycle limiting diode
becomes optional, but the soft start capacitor should still be
at least 10 /LF.
DUTY CYCLE LIMITING
In a flyback converter, the error amplifier sees OV at the
output of the converter during the initial turn-on, and forces
the duty cycle to 100% until it sees the output voltage rising
to the final value; but no voltage will appear if the switch
does not turn off (see flyback principle). The result is that
the core will saturate, reducing the effective impedance of
the transformer to about 00, and destroying the pass transistor. To prevent this, the duty cycle must be limited to a
value at which the core does not saturate. A diode connected between pins 1 and 2 (Figure 10), will limit the duty cycle
to about 80%.
T
DECOUPLING AND GROUNDING
Special attention should be given to the decoupling of the
HS 710717067 itself at the input (pin 5), where the capaCitor
must be at least 100 /LF and connected as close to the
device as possible. Large switching spikes at the input of
the pass transistor can cause breakdown of the junction
and destroy the device. (See Figure 12.)
ihe waveform at the top of the picture represents the voltage across the switch of a typical BUCK (step down) converter. When the switch is turned off, the current in the inductor falls to zero (see waveform at the bottom) and a
switching spike occurs across the switch. This spike can
reach several tens of volts on top of the normally expected
voltage across the switch and lead to stress on the device if
the overall voltage exceeds the maximum rating.
T
TUK/6746-15
FIGURE 10. Duty Cycle Limiting Circuit
SOFT START
For any converter, connecting a large capacitor (20 to
200 /LF) between pin 2 and the case is recommended to
allow the reference voltage to slowly reach its final value
after start-up. This allows the HS 706717107 to start-up
smoothly and minimizes the inrush current. The time constant can be calculated by:
T = 103 X C
The picture below shows a spike of about ten volts with a
330 /LF capacitor of average quality.
VOLTAGE ACROSS
PIN 5&.PIN 8
-It is always a good practice to incorporate soft start and duty
cycle limiting when designing a switching power converter,
especially when a current limit circuitry is not utilized.
CURRENT LIMIT
CURRENT
THROUGH
SWITCH
The schematic in Figure 11 shows how to protect the pass
transistor against excessive current, by sensing the current
through a series resistor, and shorting the PWM control voltage at pin 1 to ground, using transistor 2N5772 (this is made
possible by the 5 MO output impedance of the error amplifier), which will cause the pass transistor to turn off.
VERTICAL SCALE: 20 VOLTS IDiV
HORIZONTAL SCALE: 2,.SIDIV
TLlK/6746-17
FIGURE 12
The reference voltage (pin 2) must be decoupled with at
least 10 /LF and the compensation network (pin 1) should
be decoupled with a ceramic capacitor of 1 nF to 10 nF.
Switching noise on the reference voltage pin (pin 2) or on
the compensation pin (pin 1) can create different types of
oscillations and instabilities.
Because of the high current and high voltage capability of
the HS 710717067 a single point grounding or, at least a
grounding where the force ground is separated from the
circuit ground, is highly recommended.
TUKl6746-16
FIGURE 11. Current Limit Circuitry
Ordering Information (Transformers and Inductors)
PULSE ENGINEERING INC.
Tel: (619) 268-2400
7250 Convoy Court
San Diego, CA 92111
TWX: 910-335-1527
FAX: 619 268-2515
USA
2-13
~
.....
....
:::I:
en
en
.........
o
.....
o
8CD
....
~National
PRELIMINARY
.....
...... ~ Semiconductor
:::E:
it)
CI
.... LH 1605/LH 1605C
CD
:::E:
.....
5 Amp, High Efficiency Switching Regulator
General Description
Features
The LH1605 is a hybrid switching regulator with high output
current capabilities. It incorporates a temperature-compensated voltage reference, a duty cycle modulator with the
oscillator frequency programmable, error amplifier, high current-high voltage output switch, and a power diode. The
LH 1605 can supply up to 5A of output current over a wide
range of regulated output voltage.
•
•
•
•
•
•
Step down switching regulator
Output adjustable from 3.0V to 30V
5A output current
High efficiency
Frequency adjustable to 100 kHz
Standard a-pin TO-3 package
Block and Connection Diagrams
INPuT
5
Case Is Ground
OUTPUT
STEERING
DIODE
(ANODE)
7
N.C.
VREF
OUTPUT
DIODE
N.C.
CASE
GROUND
TL/K/l0114-2
nMING
CAPCy
ERROR
AMPLIFIER
INPUT
4
EXT. CAP.
(VREF)
TLlK/l0114-1
2-14
Top View
Order Number LH1605K or
LH1605CK
See NS Package Number K08A
~
.......
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage (VIN)
35Vmax
Output Current (10)
SA
Internal Power Dissipation (Po) (Note 1)
Operating Temperature (TAl
LH1S05C
LH1S05
Duty Cycle (D.C.)
SOV
- 25'C to + 85'C
-55'Cto +125'C
Characteristics
Conditions
Min
VOUT
Output Voltage Range
VIN;;' Va +5V
10 = 2A
(Note 2)
Vs
Switch Saturation Voltage
Ic
Ic
VF
Steering Diode On Voltage
VIN
Supply Voltage Range
IR
Steering Diode Reverse Current
=
=
10 =
10 =
10V unless otherwise specilied
Typ
3.0
=
Max
Min
30
3.0
Typ
Units
Max
30
5.0A
2.0A
1.S
1.0
2.0
1.2
1.6
1.0
2.0
1.2
5.0A
2.0A
1.2
1.0
2.8
2.0
1.2
1.0
2.8
2.0
0.1
5.0
0.1
5.0
10
VR
LH1605C
LH1605
25V
=
35
10
V
35
20
p.A
10
Quiescent Current
V2
Voltage on Pin 2
2.5
2.5
V
AV2/AT
V2 Temperature Coelf.
100
100
ppml'C
V4
Voltage Swing-Pin 4
3.0
3.0
V
14
Charging Current-Pin 4
70
70
p.A
RA
Resistance Pin 3 to GND
2.0
2.0
kO
ppml'C
lOUT
ARA/AT
Resistance Temp. Coeff.
tr
Voltage Rise Time
lOUT
lOUT
tf
Voltage Fall Time
t.
Storage Time
!(j
Delay Time
Po
Power Dissipation
'Ij
Efficiency
0.2A
20
75
75
2.0A
5.0A
350
500
350
500
lOUT
lOUT
=
=
=
=
2.0A
5.0A
300
400
300
400
lOUT
=
5.0A
VOUT = 10V
lOUT = 5.0A
2-15
rnA
ns
1.5
1.5
p.s
100
100
ns
1S
16
W
75
75
Thermal Resistance (Note 1)
5.0
5.0
Note 1: 8JA is typically arrc/w for natural convection cooling.
Note 2: VOUT refers to the output voltage range of switching supply after the output LC filter as shown in the Typical Application circuit.
8JC
UI
......
r-
:I:
.......
en
C)
UI
SA
20W
Electrical Characteristics Tc = 25'C, VIN = 15V, VOUT =
Symbol
20% to 80%
Steering Diode Reverse Voltage
(VR) (VS-7)
Steering Diode Forward Current
(10) (l7-S)
150'C
Operating Temperature (TJ)
-65'C to + 150'C
Storage Temperature Range (TSTG)
en
C)
%
'C/W
(")
or----------------------------------------------------------------------.
~
CD
....
8 --OUT
+
%
67 pH
t-~T1"T'~~-"'"T-
....I
+ -1"'""-1---1
U,
C)
....
%
CD
....I
TLlK/10114-3
Minimum VIN - VOUT = 5V for Proper Operation
R _ 2 X 103 (VOUT - 2.5)
S 2.5
VIN = 10 -18V
VOUT = 5V
lOUT = 3A (Max)
lOUT = 1A (Min)
'II'" 70%
Load Reg. = 50 mV
Line Reg. = 10 mV
Ripple = 20 mV
Frequency vs Timing
Capacitance
Power Derating Curve
25r---r--r---r--r---r---.
lOOk
w~~~~~~~~~
'N"
C
~ 15r--r-+-~.-~~r-~
is
:::>
g
~
"-
S
~ 10r--r-+--+-~~r-~
e:
'"
10k
"'r\
~
!
iii0
loOk
o~~-~~-~~~
o
25
50
75
100
125
100
150
AMBIENT TEMPERATURE (OC)
1,000
Cr TLlK/10114-4
TLlK/10114-5
Design Equations
Elf.
()
POUT X 100
PIN
IClency 'II =
Transistor DC Losses (PT) = lOUT X Vs (t
Diode DC Losses (Po) = lOUT X VF (
ON
to~
)
+ OFF
tOFF
)
toN + tOFF
Drive Circuit Losses (DLl = V310N02 X
tON
tON
+ tOFF
Switching Losses Transistor (Ps) = VIN X lOUT X 2( tr + tf
tON + tOFF
Transistor Duty Cycle =
tON
Diode Duty Cycle =
toN
= VOUT
+ tOFF VIN
tOFF
= 1 _ VOUT
toN + tOFF
VIN
Power Inductor (PLl = lour2 X RL (Winding Resistance)
. .
( ) Elficlency
'II - V
I
OUT OUT
10,000
nMING CAPACITOR (pF)
VOUTIOUT
DP
P
+,D-I + P
0 + L+ S + L
2-16
X
100%
r--------------------------------------------------------------------------------, r-
i:
~
~National
""
~ Semiconductor
LM494
Pulse Width Modulated Control Circuit
General Description
Features
The LM494 is a monolithic integrated circuit which includes
all the necessary building blocks for the design of pulse
width modulated (PWM) switching power supplies, including
push-pull, bridge and series configurations. The device can
operate at switching frequencies between 1.0 kHz and
300 kHz and output voltages up to 40V. The operating temperature range specified for the LM494C is O·C to 70·C and
for the LM494V is -40·C to +BS·C.
• Uncommitted output transistors capable of 200 mA
source or sink
• On-chip error amplifiers
• On-chip S.OV reference
• Internal protection from double pulsing of outputs with
narrow pulse widths or with supply voltages below
specified limits
• Dead time control comparator
• Output control selects single ended or push-pull operation
• Easily synchronized (slaved) to other circuits
Block Diagram
PULSE STEERING
FLIP FLOP
OUT
CONTROL
RT------r--,
Cr-.._ _ _ _---l°SCILlATOR
Cl
DEAD
nME+---II-q
ca=
CONTROL
5.0V REF
vcc
VREI'
GND
COMPENSATION!pWM
COMPARATOR INPUT
TLlH/loo56-2
Connection Diagram
Ordering Information
16-Lead DIP
+IN 1 ";"'1----1
-IN 1 -11-----1
COMPEN/ ....;..~-----I
PWN CONP IN
DEAD nME
CONTROL
C2
~D-~====----I
Cl
...-----+-El
TL/H/l0056-1
Top View
2-17
Device
Code
Package
Code
Package
Description
LM4941N
LM494CJ
LM494CN
N16A
J16A
N16A
Molded DIP
Ceramic DIP
Molded DIP
•
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the Nstlonal Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature Range
Ceramic DIP
Molded DIP
Operating Temperature Range
Industrial (LM4941)
Commercial (LM494C)
Output Collector Voltage
-65"Cto + 175"C
- 65"C to + 150'C
Power Supply Voltage (Vee>
1.50W
1.04W
470 pF to 10 I£F
Timing Resistor (RT)
1.8 kn to 500 kn
1.0 kHz to 300 kHz
Oscillator Frequency (fose>
VCC + 0.3V
LM494
Electrical Characteristics TA = O'C to + 70'C for the LM494C, TA =
I
200mA
Output Collector Current (lel. le21
Timing Capacitor (Or)
42V
Voltage from Any Lead to Ground
(except Lead 8 and Lead 11)
Symbol
-0.3VtoVee + 0.3V
-0.3Vt040V
Output Voltage Collector (VC1. VC2)
Supply Voltage
=
7.0Vto40V
Voltage on Any Lead
except Leads 8 and 11
(Referenced to Ground) (VI)
300"C
265'C
Intemal Power Dissipation (Notes 1. 2)
16L·Ceramic DIP
16L·Molded DIP
15V, fosc
250mA
(to be determined)
Recommended Operating
Conditions
- 40"C to + 85"C
O"Cto +70"C
Lead Temperature
Ceramic DIP (Soldering, 60 sec.)
Molded DIP (Soldering, 10 sec.)
42V
Peak Collector Current
(lCl andlC2)
ESD Susceptibility
-40'C to + 85"C for the LM4941, Vcc
=
10kHz, unless otherwise specified
Parameter
I
Conditions
I
Min
I
Typ
I
Max
I
Units
REFERENCE SECTION
VREF
Reference Voltage (Note 3)
IREF
=
RegLiNE
Line Regulation of
Reference Voltage
7.0V
s: Vcc s: 40V
TCVREF
Temperature Coefficient of
Reference Voltage
O"C
RegLoAD
Load Regulation of
Reference Voltage
1.0 mA
los
Output Short Circuit Current
VREF
4.75
1.0 rnA
s: TA s: 70"C
s: IREF s: 10 mA
=
I O'C s: TA s: +70"C
I -40"C s: TA s: +85'C
OV
10
5.0
5.25
V
2.0
25
mV
0.Q1
0.03
%I"C
1.0
15
mV
35
50
rnA
35
OSCILLATOR SECTION
=
=
fose
Oscillator Frequency
(Figure 10)
CT
RT
afose
Oscillator Frequency Change
CT = 0.Q1 I£F,
RT = 12kn
0.Q1 I£F,
12kn
10
l O'C s: TA s: +70"C
I -40"C s: TA s: +85'C
kHz
2.0
%
2.0
DEAD TIME CONTROL SECTION
=
s: V4 s:
IIB(DT)
Input Bias Current
Vee
DC(Max)
Maximum Duty Cycle,
Each Output
Vee = 15V, Lead 4 = OV,
Output Control = VREF
VTH(in)
Input Threshold Voltage
Zero Duty Cycle
15V, OV
-2.0
5.25V
I£A
%
45
3.0
Maximum Duty Cycle
-10
3.3
·0
V
ERROR AMPLIFIER SECTIONS
=
=
=
VIO
Input Offset Voltage
V3
110
Input Offset Current
V3
liB
Input Bias Current
V3
VICR
Input Common Mode
Voltage Range
7.0V
s: Vcc s: 40V
-0.3
Avs
Large Signal Voltage Gain
0.5V
s: V3 s: 3.5V
60
BW
Bandwidth
2.5V
2.0
10
2.5V
25
250
nA
2.5V
0.2
1.0
I£A
Vee
V
2-18
mV
74
dB
650
kHz
LM494
Electrical Characteristics TA =
O'C to + 70'C for the LM494C, TA = -40'C to + 85'C for the LM4941,
Vcc = 15V, fosc = 10 kHz, unless otherwise specified (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
4.0
4.5
V
PWM COMPARATOR SECTION (Figure 9)
VTHI
Inhibit Threshold Voltage
Zero Duty Cycle
10-
Output Sink Current
(Note 4)
0.5V :5: V3 :5: 3.5V
10+
Output Source Current
(Note 4)
0.5V :5: V3 :5: 3.5V
-0.6
-0.2
mA
mA
2.0
OUTPUT SECTION
Output Saturation
Voltage Common Emitter
Configuration (Figure 3)
VE = OV,
Ic = 200mA
Emitter Follower
Configuration (Figure 4)
Vc = 15V, IE = 200 mA
IC(oll)
Collector Off·State Current
Vcc = 40V, VCE = 40V
IE(oll)
Emitter Off·State Current
Vcc = Vc = 40V,
VE = 0
VCE(sat)
O'C:5: TA:5: +70'C
-40'C:5: TA :5: +85'C
1.1
1.3
V
1.5
2.5
2.0
100
/LA
-100
/LA
0.4
V
O'C:5: TA :5: +70'C,
-40'C:5: TA :5: +85'C
OUTPUT CONTROL (Figure 6)
VOCl
VOCH
Output Control Voltage
Required for Single Ended or
Parallel Output Operation
Output Control Voltage
Required for Push·Pull
Operation
2.4
V
TOTAL DEVICE
Icc
I Standby Power Supply Current I
I
I
6.0
I
10
I
mA
OUTPUT AC CHARACTERISTICS Use Recommended Operating Conditions with TA = 25'C
tr
tf
Rise Time of Output Voltage
Common Emitter Configuration
(Figure 3)
100
Emitter Follower Configuration
(Figure 4)
100
200
Fall Time of Output Voltage
Common Emitter Configuration
(Figure 3)
25
100
200
ns
ns
Emitter Follower Configuration
40
100
(Figure 4)
Note 1: TJ Max = t50'C fOlthe Molded DIP, and t75"C for the Ceramic DIP.
Note 2: Ratings apply to ambient temperature at 25'C. Above this temperature, derate the t6l·Ceramic DIP at to mW/"C, and the t6l·Molded DIP at B.3 mWI"C.
Note 3: Selected devices with tightened tolerance reference voltage available.
Note 4: These limits apply when the voltage measured at Lead 3 is within the range specified.
2·19
Functional Description
15V
The basic oscillator (switching) frequency is controlled by an
external resistor (RT) and capacitor (Or). The relationship
between the values of RT. CT and frequency is shown in
684
Vc
Figure 10.
EACH
OUTPUT
TRANSISTOR
The level of the sawtooth wave form is compared with an
error voltage by the pulse width modulated comparator. The
output of the PWM Comparator directs the pulse steering
flip-flop and the output control logic.
The error voltage is generated by the error amplifier. The
error amplifier boosts the voltage difference between the
output and the 5.OV internal reference. See Figure 7 for
error amp sensing techniques. The second error amp is typically used to implement current-limiting.
TUHl1oo56-5
9~ -ir---"Ii
The output control logic selects either push-pull or singleended operation of the output transistors (see Figure 6).
The dead time control prevents on-state overlap of the output transistors as can be seen in Figure 5. The dead time is
approximately 3.0% or 5.0% of the total period if the dead
time control is grounded. This dead time can be increased
by connecting the dead time control to a voltage up to 5.OV.
TL/H/l0056-6
FIGURE 3. Common Emitter Configuration
Test Circuit and Waveform
15V
The frequency response of the error amps (Figure 11) can
be modified by using external resistors, and capaCitors.
These components are typically connected between the
compensation terminal and the inverting input of the error
amps.
EACH
OUTPUT
TRANSISTOR
The switching frequency of two or more LM494 circuits can
be synchronized. The timing capaCitor. Or. is connected as
shown in Figure 8. Charging current is provided by the master circuit. Discharging is through all the circuits slaved to
the master. RT is required only for the master circuit.
TUH/loo56-7
Test Circuits
GND
TL/H/loo56-6
FIGURE 4. Emitter Follower Configuration
Test Circuit and Waveform '
Ycc=15V
TUH/l0056-3
FIGURE 1. Error Amplifier Test Circuit
1504
1504
12
~{
12k4
4 DEAD- Vcc
3 liME
FEED8ACK
Cl 8
6 R
5 T
C2 11
E2 10
1
16
15
13
+ } ERROR'"
_
50kll
OUT 1
AMP
-
OUT 2
-
+ } ERROR
AMP
~UT
CONTROL GND
FIGURE 2. Current Limit Sense
Amplifier Test Circuit
'ZII
El 9
Cy
TL/HI10056-4
'ZII
REF 14
OUT
7
-=
TL/H/l0056-9
FIGURE 5. Dead Time and Feedback
Control Test Circuit
2-20
ri:
.co.
co
.co.
Typical Applications
o/'......::""""''--.,...-~ QC
Cl
(250 mA (MAX)
OUT
CONtROL
El
(1 TO 500 mA MAX
0';VOC ",0.4V
11
OUT
CONTROL
·,.,...,..,...........- - · Q E
C2
(250 mA (MAX)
10
E2
TL/H/l0056-10
TL/H/l0056-11
FIGURE 6. Output Connections for Single Ended
and Push·Pull Configurations
v
TO OUT
VOLTAGE or
SYSTEM
R2
Rl
3
3
NEGATIVE OUT VOLTAGE
Rl
R2
REF (1+~)
PosmVE OUT VOLTAGE Vo =V
Vo
TUH/l0056-12
TO OUT
VOLTAGE or
SYSTEM
TUH/l0056-1S
FIGURE 7. Error Amplifier Sensing Techniques
MASTER
SLAVE
(AOOmONAL
CIRCUITs)
TL/H/l0056-14
FIGURE 8. Slaving Two or More Control Circuits
2-21
•
Typical Applications (Continued)
v~-------.---------------------.
VREF-------+------t---------,
TO REMAINDER
OF ERROR
AMPLIFIER
CIRCUIT
TO REMAINDER
OF ERROR
AMPLIFIER
CIRCUIT
TO COMPENSATlON!PWM
....- - - - - - - - - - - COMPARATOR IN
LEAD 3
0.6 rnA"'
TL/H/l0056-1S
FIGURE 9. Error Amplifier and Current Limit
Sense Amplifier Output Circuits
Typical Performance Characteristics
..
:z:
:z:
I
t;
is
'"f3
e:
'"g
:s
.....
0
II>
0
lOOk
10k
10k
4.Ok
I.Ok
0400
100 I40 I10
l.Ok
....
100
Iv~= 15V-:
TA =OOC to
.~~
700C
~~
00
'-'<'"
m
'"0
I
t;
is
'=
....
'"f3
'"....
'"0
0'
""'I.'"""
5
lib".0-,<,..
14.Ok 10k
:!
v
II>
0
40k lOOk
90
80
~
70
60
50
40
30
20
10
Vee = 15V
AVO 3.0V
TA =25OC
=
I\.
~
~
o
o4OOk 1M
100
TIMING RESISTANCE - A
I.Ok
10k
lOOk
1.OM
FREQUENCY - Hz
TL/H/l0056-16
TL/H/l0056-17
FIGURE 10. Oscillator Frequency
vs Timing Resistance
FIGURE 11. Amplifier Voltage Gain vs Frequency
2-22
Voltage Waveforms
- - - -Vee
VOLTAGE
AT Cl
-------0
- - - -Vee
VOLTAGE
AT C2
-------0
VOLTAGE
AT Cr
ZERO DUlY CYCLE
DEAD TIME THRESHOLD POIt-lT
CONTROL
IN
LEAD 4
FEEDBACK
IN
LEAD 3
TUH/1OO56-18
•
2-23
~National
~ Semiconductor
LM 1524D/LM2524D/LM3524D
Regulating Pulse Width Modulator
General Description
The LM1524D family is an improved version of the industry
standard LM1524. It has improved specifications and additional features yet is pin for pin compatible with existing
1524 families. New features reduce the need for additional
external circuitry often required in the original version.
The LM1524D has a ± 1% precision 5V reference. The current carrying capability of the output drive transistors has
been raised to 200 mA while reducing VCEsat and increasing
VCE breakdown to 60V. The common mode voltage range
of the error-amp has been raised to 5.5V to eliminate the
need for a resistive divider from the 5V reference.
In the LM1524D the circuit bias line has been isolated from
the shut-down pin. This prevents the oscillator pulse amplitude and frequency from being disturbed by shut-down. Also
at high frequencies ("" 300 kHz) the max. duty cycle per
output has been improved to 44% compared to 35% max.
duty cycle in other 1524s.
In addition, the LM1524D can now be synchronized externally, through pin 3. Also a latch has been added to insure
one pulse per period even in noisy environments. The
LM1524D includes double pulse suppression logic that insures when a shut-down condition is removed the state of
the T-flip-flop will change only after the first clock pulse has
arrived. This feature prevents the same output from being
pulsed twice in a row, thus reducing the possibility of core
saturation in push-pull designs.
Features
• Fully interchangeable with standard LM1524 family
• ± 1% precision 5V reference with thermal shut-down
• Output current to 200 mA DC
• 60V output capability
• Wide common mode input range for error-amp
• One pulse per period (noise suppression)
• Improved max. duty cycle at high frequencies
• Double pulse suppression
• Synchronize through pin 3
Block Diagram
---
15
V'N~;.......- - - - - - - - - - - - - -....- - - I
16
VREF
5V TO
INTERNAL CIRCUITRY
INV INPUT
NIINPUT
""--1
COMPENSATION ~9_ _
- _____
+CLSENSE
-CLSENSE
EMITTER A
2000
10 1 kl1
SHUTOOWN ~;;"''W'v-....-MiI'-I
10k.O.
20011
J1.JUL
~7_~:...:...:...:...__~r~::J~____________-=3<>OSClLLATOR
~6
..c..!o ~
RT~---------1L~::J
GND
TL/H/BBSO-l
2-24
Absolute Maximum Ratings (Note 5)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
40V
Collector Supply Voltage
(LM1524D)
(LM2524D)
(LM3524D)
Operating Junction Temperature Range J Package (Note 2)
- 55·C to + 150·C
LM1524D
-40·C to + 150"C
LM2524D
Operating Maximum Junction Temperature N Package
(Note 2)
-40·Cto +125·C
LM2524D
O"C to + 125·C
LM3524D
150·
Maximum Junction Temperature
60V
55V
40V
200mA
Output Current DC (each)
Oscillator Charging Current (Pin 7)
-65·C to + 150·C
Storage Temperature Range
300·C
Lead Temperature (Soldering 10 sec.) J Pkg.
5mA
1W
Internal Power Dissipation
Lead Temperature (Soldering 4 sec.) N Pkg.
260"C
Electrical Characteristics (Note 1)
LM1524D
Symbol
Parameter
Conditions
Typ
LM2524D
LM3524D
Tested Design
Tested Design
Tested Design
Limit
Limit Typ Limit
Limit Typ Limit
Limit
(Note 3) (Note 4)
(Note 3) (Note 4)
(Note 3) (Note 4)
Units
REFERENCE SECTION
VREF
Output Voltage
4.95
5
4.85
4.80
5.05
5.10
VRLlne
Line Regulation
VIN = 8V to 40V
VRLoad Load Regulation IL =
~VIN
~VREF
los
omAto20 mA
4.75
VMln
5.25
VMax
5
5.15
5.20
10
20
10
15
30
10
25
50
mVMax
5
15
10
15
25
10
25
50
mVMax
Ripple Rejection f=120Hz
66
Short Circuit
Current
VREF = 0
50
Output Noise
10 Hz ::; f ::; 10 kHz
Long Term
Stability
TA = 125·C
66
25' .
66
40
40
200
100
20
20
mAMin
50
180
100
dB
25
25
50
150
NO
4.80
5
40
mAMax
100
P.VrmsMax
20
mVlkHr.
350
kHzMin
OSCILLATOR SECTION
fosC
Max. Freq.
RT = 1k, CT = 0.001 p.F
550
(Note 7)
fosc
Initial
Accuracy
RT = 5.6k, ~
(Note 7)
= 0,01 p.F
RT = 2.7k, ~
(Note 7)
= 0.01 p.F
500
550
17.5
18.5
20
VIN
~fosc
Freq. Change
with Temp.
TA = -55·Cto + 125·C
at 20 kHz RT = 5.6k,
~ = 0,01 p.F
=
8t040V
0.5
Vosc
Output Amplitude RT = 5.6k, CT = 0.01 p.F
(Pin 3) (Note 8)
tpw
Output Pulse
Width (Pin 3)
RT
= 5.6k, ~ =
0.01 p.F
kHzMln
21.5
22.5
22.5
kHzMax
36
34
30
kHzMln
46
kHzMax
1.0
%Max
38
40
Freq. Change
withVIN
17.5
20
20
38
~fOSC
500
38
42
0.5
1
5
1
0.5
5
5
%
3
2.4
3
2.4
3
2.4
VMln
0.5
1.5
0.5
1.5
0.5
1.5
P.SMax
2·25
Electrical Characteristics (Continued)
LM1524D
Symbol
Parameter
Conditions
LM3524D
LM2524D
Tested Design
Tested Design
rested Design
Units
Typ Limit Limit Typ Limit Limit Typ Limit Limit
{Note 3 {Note 4
{Note 3 (Note 4)
{Note 3) (Note 4)
OSCILLATOR SECTION (Continued)
Sawtooth Peak
Vol\8ge
RT
= 5.6k, Or = 0.01 ,...F
Sawtooth Valley
Voltage
RT
= 5.6k, Or = 0.01 ,...F
3.4
3.8
3.4
3.6
3.8
3.B
VMax
1.1
0.8
1.1
O.B
0.8
0.6
VMln -
0.5
S
2
B
10
2
10
mVMax
1
S
1
B
10
1,
10
,...AMax,
0.5
1
0.5
1.0
1
0.5
1
,...AMax
65
,...AMin
ERROR-AMP SECTION
0-
VIO
Input Offset
!Voltage-
VCM
= 2.5V
liB
Input Bias
Current
VOM
= 2.5V
110
Input Offset
Current
VCM
= 2.5V
ICOSI
Compensation
Current (Sink)
VIN(I) :- VIN(NI)
lcoso
Compensation
Current (Source)
AYOL
Open Loop Gain
VCMR
Common Mode
Input Voltage Range
= 150 mV
75
65
95
VIN(NI) - VIN(I)
= 150 mV
95
115
125
125
,..,AMax
-115
-125
-125
,...AMln
-95
RL
= 00, VCM = 2.5V
BO
-95
90
= I) dB, VOM = 2.5V
GBW,
Unity Gain
Bandwidth
AYOL
Vo
Output Voltage
Swing
RL
= 00
, PSRR
Power Supply
Rejection Ratio
VIN
= Bt040V
-9f
- -65
-75
-65
74
74
80
1.5
5.5
1.4
S.4
BO
1.S
S.S
CMRR Common Mode
Rejection Ratio
95
BO
90
3
91)
BO
BO
0.5
5.5
76
70
BO
70
jLAMax
60
dBMin
1.5
5.5
VMin
VMax
70
dBMln
2
3
0.5
5.5
BO
MHz
0.5
5.5
VMin
VMax
BO
65
dbMln
_ COMPARATOR SECTION
tON
tose
Minimum Duty
Cycle
Pin 9 = O.BV,
[RT = 5.6k, Or
= 0.01 ,...F]
0
0
0
0
0
0
'YoMax:
toN
tose
Maximum Duty
Cycle
Pin9 = 3.9V,
[RT = 5.6k, CT
= 0.01.,...F]
49
47
49
45
49
45
'YoMin
toN
tose
Maximum Duty
Cycle
Pin 9 = 3.9V,
[RT = 1k, Or
= 0.001 ,...F]
44
40
44
35
44
35
'YoMln
VC:OMPZ Input Threshold
(Pin 9)
Zero Duty Cycle
VCOMPM Input Threshold
(Pin 9)
Maximum Duty Cycle
liB
Input Bias
purrent
1
1
1
V
3.5
3.5
3.5
V
-1
-1
-1
p.A
2-26
Electrical Characteristics (Continued)
LM1524D
Symbol
Parameter
Conditions
LM2524D
LM3524D
Tested Design
Tested Design
Tested Design
Units
Typ Limit
Limit Typ Limit
Limit Typ Limit
Limit
(Note 3) (Note 4)
(Note 3) (Note 4)
(Note 3) (Note 4)
CURRENT LIMIT SECTION
VSEN
Sense Voltage
V(Pin2) - V(Pin1);;"
150mV
200
190
180
220
210
TC-Vsense Sense Voltage T.C.
Common Mode
Voltage Range
0.2
Vs - V4
=
-0.7
1
300 mV
180
mVMin
220
mVMax
200
200
0.2
0.2
mVI'C
-0.7
1
-0.7
1
VMin
VMax
SHUT DOWN SECTION
VSD
High Input
Voltage
V(Pin2) - V(Pin1);;"
150mV
1
ISD
High Input
Current
l(pln10)
1
0.5
1.5
1
0.5
1.5
1
1
0.5
1.5
1
VMin
VMax
rnA
OUTPUT SECTION (EACH OUTPUT)
VCES
Collector Emitter
Ic s; 100,...A
Voltage Breakdown
ICES
Collector Leakage
Current
VCE
VCE
VCE
=
=
=
=
=
=
60V
VEO
Emitter Output
Voltage
IE
tR
Rise Time
VIN = 20V,
IE = -250,...A
Rc = 2k
Fall Time
tF
Rc
40
0.1
50
,...AMax
0.1
50
20 rnA
0.2
0.4
0.2
0.5
0.2
0.7
200 rnA
1.5
2.2
1.5
2.2
1.5
2.5
18
17
18
17
. 18
17
50mA
=
2k
VMin
50
40V
IE
IE
0.1
55
55V
Saturation
Voltage
VCESAT
60
VMax
VMln
200
200
200
ns
100
100
100
ns
SUPPLY CHARACTERISTICS SECTION
VIN
Input Voltage
Range
T
Themnal Shutdown (Note 2)
Temp.
liN
After Turn-on
8
40
8
40
160
160
8
40
160
VMin
VMax
'C
Stand By Current
10
5
10
5
10
rnA
5
VIN = 40V (Note 6)
Note 1: Unless otherwise stated, these specifications apply for TA = TJ = 2S'C. Boldface numbers apply over the rated temperature range: LM1524D Is - 55'C to
12S'C, LM2S24D Is -40' to 85'C and LM3524D is O'C to 70'C. VIN = 20V and fose = '20 kHz,
Note 2: For operation at elevated temperatures, devices in the J package !1'ust be derated based on a thermal resistance of 132'C/W, lunctlon to ambient, and
devices In the N package must be derated based on a thermal resistance of 8S'C/W, lunction to ambienl
Nole 3: Tested limits are guaranteed and 100% tested in production.
Note 4: Design limits are guaranteed (but not 100% production tested) over the Indicated temperature and supply voltage range. These limits are not used to
calculate outgoing quality level.
Note 5: Absoluta maximum ratings indicata limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its ratad operating conditions.
Note 6: Pins I, 4, 7, 8, II, and 14 are grounded; Pin 2 = 2V. All other inputs and outputs open.
Nota 7: The vafue of a Ct capacitor can vary with frequency. Careful selection of this capaCitor must be made for high frequency operation. Polystyrene was used in
this tast. NPO ceramic or polypropylene can also be used.
Note 8: OSC amplitude is measured open circuil Available currant Is limited to 1 rnA so care must be exercised to limit capacitive loeding of fast pulses.
2-27
•
Q ,----------------------------------------------------------------------..
~.
~
~
.....
Q.
i~
..
o
an
....
('01.
~
Typical Performance Characteristics
Maximum Average Power
10 Dissipation (N Package)
Maximum Average Power
IODlaslpatlon (J Package) .
1.0_ 1.0_
8JA=I32°C
041
0
25
so
0.1
15
T
I
-eo
041
45
0
25
-
~
-
e§!
......
15 II1l 125
17.8
-eo
......
~E=-50mA
i
RT= 5.6 kA
CT=O.OOIj1f
1.115
! ::
-eo
041
0
25
so
0
25
50
75 100 125
Reference Transistor
';25 Peak Output Current
~
I
5'
I;
0
I
100
..... ......
75
so
o
75 II1l 125
.......
-r-.,
25
-!ill 041
0
25
so
..... ......
.....
Y =40'1
~REr=OmA
so
-50 -25 0 25
YIN -INPUT VOLTAGE (Y)
!
210
~
2IlO
I
190
jl
1111
~
..... ~
PIH2=2Y
PINS 1.4.7.8.11.14=OV l -I PINS 3.5.6.9. 10. 12. 13 = OPEN
12162024283236
-
15 lDO 125
Current Limit Sense Voltage
220
71i
.,
......
TA-AIIBIENT mlPERAlURE ('C)
Standby Current
vs Temperature
31i
041
TA- AMBIENT mlPERAlURE (OC)
oS>
lout REF =0 mA
B
~
TA- AMBIENT TEIIPERAlURE ('C)
Standby Current
vsVoltage
.I.
~
~
TA- AMBIENT TEMPERAlURE ('C)
TA=25'C
/
./
182
I
:I:'
so
:l.5O Y1Na2OV
~
75
60
-I~J~
~
III 18.6
~
I--L=20mA
o
50
YIN=2OV
~=~OO~ I--- ~
..
3.l6
!C
~
Output Transistor EmlHer
Voltage
i
19.0
~.
lAO
TA- AIIBIENT TEIiPERAlURE ('C)
Output Transistor
Saturation Voltage
I
..
f
Q9
o
75 100 125
TA-AMBIENT mlPERAlURE (OC)
2.5
3AI5
8JA=86"C
0.1
-eo
Maximum a Minimum
Duty Cycle Threshold
Voltage
75 lDO 125
TA-AMBIENT TEllPERATURE ('C)
......
,..
~
/
-
-
~
170
-eo
041
0
25
so
15 lDO 125
, TA-AMBIENT TEIIPERAlURE ('C)
SWitching Transistor
Peak Output Current
vs Temperature
3IlO
........
""-eo
041
0
25
.....
so
"75 100 125
TA-AMBENT TEllPERAlURE ('C)
TUH/8650-3
2-28
Test Circuit
VIN
1-40V
2k
IW
CB
~ VIN
o..!
~
13
} OUTPUTS
CA
OSC OUT
YREF
NI
INPUT
2
LM1524D I LM2524D I LM3524D
INY
INPUT
SHUT
DOWN
-p
2k
O.I.F: :::
2k
IW
L....+
COMP
4
2k
10k
2k
+CL
SENSE
10
5
EB~
OND EA
CT
RT
B
1
.!!..
8
RT
10k
L-'k
-tL
SENSE
12
: : : : CT
E+-
GNO
TL/H/8650-4
Functional Description
INTERNAL VOLTAGE REGULATOR
If two or more LM1524D'smust be synchronized together,
the easiest method is to interconnect all pin 3 terminals, tie
all pin 7's (together) to a single CT, and leave all pin 6's
open except one which is connected to a single RT. This
method works well unless the LM1524D's are more than 6"
apart.
The LM1524D has an on-chip 5V, 50 rnA, short circuit protected voltage regulator. This voltage regulator provides a
supply for all internal circuitry of the device and can be used
as an external reference.
For input voltages of less than BV the 5V output should be
shorted to pin 15, VIN, which disables the 5V regulator. With
these pins shorted the input voltage must be limited to a
maximum of 6V. If input voltages of 6V -BV are to be used, a
pre-regulator, as shown in Figure 1, must be added.
A second synchronization method is appropriate for any circuit layout. One LM1524D, deSignated as master, must
have its RTCT set for the correct period. The other slave
LM1524D(s) should each have an RTCT set for a 10% longer period. All pin 3's must then be interconnected to allow
the master to properly reset the slave units.
15
5.5V
The oscillator may be synchronized to an external clock
source by setting the internal free-running oscillator frequency 10% slower than the external clock and driving pin 3
with a pulse train (approx. 3V) from the clock. Pulse width
should be greater than 50 ns to insure full synchronization .
_vdUiO-_......!.I
L---....---1
TLlH/8650-10
'Minimum Co of 10 ,..F required for stability.
FIGURE 1
OSCILLATOR
The LM1524D provides a stable on-board oscillator. Its frequency is set by an external resistor, RT and capacitor, Or.
A graph of RT, Or vs oscillator frequency is shown is Figure
2. The oscillator's output provides the signals for triggering
an internal flip-flop, which directs the PWM information to
the outputs, and a blanking ·pulse to turn off both outputs
during transitions to ensure that cross conduction does not
occur. The width of the blanking pulse, or dead time, is controlled by the value of Or, as shown in Figure 3. The recommended values of RT are 1.B kCl to 100 kCl, and for CT,
0.001 I£F to 0.1 I£F.
5 10 20
50 100200 500 lk
OSCILLATOR PERIOD IIt'I
TL/H/8650-5
FIGURE 2
2-29
•
Functional Description (Continued)
10
The duty cycle is calculated as the percentage ratio of each
output's ON-time to the oscillator period. Paralleling the outputs doubles the observed duty cycle.
VCC'2OY
TA -25"C
4
]
...
50
i!
...'"
'"::>
...
..
.
g
OA
I!:
::>
~
u
30
~
20
i:i
0.1
0.001
0.004
0.01
0.04
co
0.1
CT (PF)
10
TLlH/8650-6
FIGURE 3
o
80
z
60
C
CD
III
CD
:!
...
1:1
>
40
" .....
20
r\
'\
RL =RESISTANCE FROM PIN 9
TOONO
0
10
100' lk
10k
lOOk
FREQUENCY (Hz)
3.5
4
TL/H/8650-S
OUTPUT STAGES
The outputs of the LM1524D are NPN transistors, capable
of a maximum current of 200 mAo These transistors are driven 180" out of phase and have non-committed open collectors and emitters as shown in Figure 6.
~
1M
2.5
CURRENT LIMITING
The function of the current limit amplifier is to override· the
error amplifier's output and take control of the pulse width.
The output duty cycle drops to about 25% when a current
limit sense voltage of 200 mV is applied between the + CL
and -CL sense terminals. Increasing the sense voltage approximately 5% results in a 0% output duty cycle. Care
should be taken to ensure the - 0.7V to + 1.0V input common-mode range is not exceeded.
".....
RL =~Ok
1.5
FIGURES
The amplifier's inputs have a common-mode input range of
1.5V-S.5V. The on board regulator is useful for biasing the
inputs to within this range.
~
RL =~DOk
RL = lOOk
/
lL
/
VOLTAGE ON PIN 9 (V)
RL =00
RL=IM
iii
V
I
ERROR AMPLIFIER
The error amplifier is a differential input, transconductance
amplifier. Its gain, nominally 86 dB, is set by either feedback
or output loading. This output loading can be done with either purely resistive or a combination of resistive and reactive components. A graph of the amplifier's gain vs output
load resistance is shown in Figure 4.
:s
L
40
10M
TLlH/S650-7
FIGURE 4
The output of the amplifier, or input to the pulse width modulator, can be overridden easily as its output impedance is
very high (ZO "" 5 MO). For this reason a DC voltage can
be applied to pin 9 which will override the error amplifier and
force a particular duty cycle to the outputs. An example of
this could be a non-regulating motor speed control where a
variable voltage was applied to pin 9 to control motor speed.
A graph of the output duty cycle vs the voltage on pin 9 is
shown in Figure 5. .
.
OUTPUT_. ._-t
DRIVE ...
EB
TLlH/S6S0-9
FIGURE 6
2,.30
r-----------------------------------------------------------------------------,
Typical Applications
~
....
3:
UI
~
V,No----------------,
Design Equations
~
AF 5k (~-1)
I\)
=
2.5
~
3:
UI
I\)
olio
5k"'---f
I05C",_I-
5k
L1 = 2.5V'N 2 (VO - V,N>
fosclo V0 2
3:
c -
~
C
ArCT
5k
0-
'o(Vo - Y,N)
lose b.Vo Vo
V,N
lo(MAX) = liN Vo
GNDo-~~-~~~------~~~--~~~GND
FIGURE 7. Positive Regulator, Step-Up Basic Configuration (IIN(MAX)
=
!2
~
w
TL/H/8650-11
80 mAl
V,NO---I--------.:.....---.......- - -...---.
+
Co
GND
GND
. FIGURE 8. Positive Regulator, Step-Up Boosted Current Configuration
2·31
Tl/H/8650-12
fII
Typical Applications (Continued)
Design EquaUons
Rr
RF=5kn(~-I)
2.5
PIN 1
•
5k
VR
INV
NI
~
TO~
+«;.
-«;.
Eg-
[A
SD
Cr
COMP
GND
RT
=~Cr
RETURN
Ll
Ll
- .......,
~
ro
~
0.001 p.F
~
10(MAX)
lose .. _1_
CB
LM3524D
CA
RT
~
Current Limit
SenseVoR
RCL =
Y,N
0- OSC
5k
5k
J
~ 50k ~ ~Dl
=:=
Vol
'0 VINICSC
Co = (VIN - Vol VoT2
8 AVo VINLI
VIN
lo(MAX) ~ liN Vo
+
:'=<:0
GND
~
RCL
TO -CL PIN
Vo
RrCT
= 2.5Vo (VIN -
TO
+«;. PIN
TL/H/8850-13
FIGURE 9. Positive Regulator, Step-Down Basic Configuration (IIN(MAX) = 80 mAl
Rr
V,N o----1I------....;.-----1....-""
Vo
PIN 1
5k
t----t
5k
~--. .--~----------~~~------~~----. ._oGND
FIGURE 10. Positive Regulator, Step-Down Boosted Current Configuration
2·32
TL/H/8650-14
Typical Applications (Continued)
RF
VINo--;::=;:::t========~i-i--'
5k
PIN 1
Design Equation.
RF=5k(1-~)
2.5
+CL
Lt.t35240
-CL
r----+-IRT
Cr
GNO
GNOo-+-4~""-""'------"""-""-""'-""-oGNO
TL/H/8850-15
FIGURE 11. Boosted Current Polarity Inverter
The circuit works as follows: 01 is used as a switch, which
has ON and OFF times controlled by the pulse width modulator. When 01 is ON, power is drawn from VIN and supplied
to the load through L1; VA Is at approximately VIN, 01 is
reverse biased, and Co is charging. When 01 turns OFF the
inductor L1 will force VA negative to keep the current flowing in It, 01 will start conducting and the load current will
flow through 01 and L1. The voltage at VA is smoothed by
the LI, Co filter giving a clean OC output The current flowing through L1 is equal to the nominal OC load current plus
some AIIL which is due to the changing voltage across it. A
good rule of thumb Is to set AILp.p '" 40% x I~ .
BASIC SWITCHING REGULATOR THEORY
AND APPLICATIONS
The basic circuit of a step·down switching regulator circuit is
shown in Figure 12, along with a practical circuit design us·
ing the LM35240 in Figure 15.
VINo---,
. .--. .~Vo
~--~rr~~
T
VD{
10
01
TLlH/8850-18
FIGURE 12. Basic Step-Down Switching Regulator
,.
. TL/H/8650-17
FIGURE 13'
2-33
Typical Applications (Continued)
Solving the above for L1
d·
VLT
From the relation VL = L~, AIL'" L1
Lt = 2.5 Vo (YIN - Vol
.'
loVINf
"AI + = (YIN - Vol toN. AI _ = Vo toFF
L1' L
U
" L
Neglecting VSAT, Vo, and settling AIL + = AIL-;
Vo "" VIN (toFFto; toN
= VIN
where: L1 is in Henrys
f is switching frequency in Hz
Also, see LM1578 data sheet for graphical methods of inductor selection.
(~N)
where T = Total Period
CALCULATING OUTPUT FILTER CAPACITOR Co:
The above shows the relation between VIN, Vo and duty
cycle.
Figure 14 shows U's current with respect to 01's toN and
toFF times. This curent must flow to the load and Co. Co's
current will then be the difference between IL' and 10.
IIN(OC) = IOUT(DC) CON
t~~OFF)'
Ico = IL -10
From Figure 14 it can be seen that current will be flowing
into Co for the second half of toN through the first half of
toFF, or a time, toN/2 + toFF/2. The current flowing for this
time is AIL/4. The resulting l1I.vc or AVo is described by:
as 01 only conducts during tON.
PIN = IIN(OC) VIN = (lo(OC»{toN
t~NtoFF) VIN
Po = 10Vo
The efficiency, "1/, of the circuit is:
AV
=.:!- X AIL X (toN + toFF)
oP-PC4
22
10Vo
- Po _
"1/ MAX - - .
PIN
I (toN) V + (YSAT toN + VOl tOFF) I
o T
IN"
T
"0
= AIL '(toN + toFF)
4C
2
Since AIL =
"= ·~"V
"~ forVSAT = VOl = tV.
Vo + 1
"
VolT - toN)
VoT
U
and toN = VIN
( T VoT)
AV
= Vo
op-p
4C L1
V;
"l/MAX will be further decreased due to switching losses in
01. For this reason 01 should be selected to"have the maximum possible fT, which implies very "fast rise and fall times~
(2:)
2
= (YIN - Vol VoT2 or
8VINCoL1
"
C _ (YIN - VolVo T2
o8AVoVINU
CALCULATING INDUCTdR L 1
'
(AIL +) X L1
(AIL -) X L1
toN '" (YIN - Vol ,toFF =
Vo
where: C is in farads, T is
(AIL +) X U
(AIL -) X U
toN+tOFF=T=(y
V)+
V
IN - Q
0
= 0.410U
+ 0.410U
(VIN - Vol
Vo
Since AIL + = AIL - = 0.410
1
". h· f
SWltC Ing requency
AVo is pop output ripple
For best regulation, the induCtor's current cannot be allowed to fall to zero. Some minimum load current 10, and
thus inductor current, is required as shown below:
10(MIN) =
(VIN - Vol toN
2L1
IL
VA
(COLLECTOR
or PNP)
O~~_lo(t.fIN)
TL/H/B650" 16 .
FIGURE 14
TL/H/8650-19
2-34
r-----------------------------------------------------------------------------,~
....
!!:
Typical Applications (Continued)
where VNI is the voltage at the error amplifier's non-inverting input.
A complete step-down switching regulator schematic, using
the LM3524D, is illustrated in Figure 15. Transistors 01 and
02 have been added to boost the output to 1A. The 5V
regulator of the LM3524D has been divided in half to bias
the error amplifier's non-inverting input to within its common-mode range. Since each output transistor is on for half
the period, actually 45%, they have been paralleled to allow
longer possible duty cycle, up to 90%. This makes a lower
possible input voltage. The output voltage is set by:
Vo = VNI (1
Resistor R3 sets the current limit to:
CI1
N
A
C
.......
~
!!:
200mV
200mV
~ =
= 1.3A.
"""""ii:15
Figure 16 and 17 show a PC board layout and stuffing diagram for the 5V, 1A regulator of Figure 15. The regulator's
performance is listed in Table I.
~
~
~
~
!!:
~
A
+ :;),
C
ill
Ll
~
5k
RIO
.-
~
'"U
Yo=5Y
010=1 A
f=20k Hz
Q2
R9
R4
Sk
'=~
C
10~F
C3
O.I~F
R5
Sk
I
R2
Sk
R8
510
15
16
2
1
R6
6.5k
6
Cl
O.~llpF
7
II
YREF
YIN
NI
EA
tNY
CB
LM3S24D
Ea
RT
9
R7
30k
11
GND
-CL
'0. .1
.... ,
-
.n.
C5~:-1
13
O.I PF - b f f
500~F
14
~~
+C L L
Cr
C~~ COMP
O.OI~F--
CA
12
Dl
~~ MR8S0
1-
8
GND
R3
0.15
RETURN
TLIH/8650-20
'Mounted to Staver Heatsink No. V5-1.
01 = BD344
02 = 2N5023
L1
= > 40 turns No. 22 wire on Ferroxcube No. K300502 Torroid cora.
FIGURE 15. 5V, 1 Amp Step-Down Switching Regulator
2-35
Q
i
r----------------------------------------------------------------------,
Typical Applications (Continued)
:E
g'
"III'
~
....
:E
Q
"III'
C\I
....
....
'II)
:E
TABLE I
Parameter
Conditions
Output Voltage'
Switching Frequency
Short Circuit
Current Limit
Load Regulation
VIN = 10V, 10 =1A
VIN = 10V, 10 = 1A
Line Regulation
Efficiency
Output Ripple
VIN = 10V
VIN = 10V
10 = 0.2 -1A
aVIN = 10 - 20V,
fo = 1A
VIN = 10V, 10 = 1A
VIN = 10V, 10 = 1A
Typical
Characteristics
5V
20kHz
' 1.3A
3mV
SmV
80%
10 mVp-p
TL/H/8850-21
FIGURE 16. 5V, 1 Amp Switching Regulator, Foil Side
TL/H/8650-22
FIGURE 17. Stuffing Diagram, Component Side
2-36
,-----------------------------------------------------------------------------, r
3:
.....
Typical Applications (Continued)
U1
THE STEP-UP SWITCHING REGULATOR
N
Figure 18 shows the basic circuit for a step-up switching
regulator. In this circuit 01 is used as a switch to alternately
apply VIN across inductor L 1. During the time, tON, 01 is ON
and energy is drawn from VIN and stored in L 1; 01 is reverse biased and 10 is supplied from the charge stored in Co.
When 01 opens, IoFF, voltage V1 will rise positively to the
point where 01 turns ON. The output current is now supplied through L1, 01 to the load and any charge lost from Co
during ioN is replenished. Here also, as in the step-down
regulator, the current through L 1 has a OC component plus
some all. all is again selected to be approximately 40% of
Il. Figure 19 shows the inductor's current in relation to 01's
ON and OFF times.
.......
0l:Io
C
r
3:
N
U1
N
0l:Io
t----it+--.---~-oVo
10
C
.......
r
3:
w
U1
N
0l:Io
C
TLlH/8650-23
FIGURE 18. Basic Step-Up Switching Regulator
<=
LM1525A, LM1527A
-55·Cto + 150·C
O·C to + 150"C
LM3525A, LM3527A
Lead Temperature (Soldering, 4 Seconds)
J Package
+300"C
+ 260·C
N Package
Power Dissipation (Note 9)
1 Watt
5mADC
ESD Tolerance
Czap = 100 pF, Rzap = 1.5k
-0.3Vto +Vin
±6V
2000V
-0.3Vto +5.5V
Electrical Characteristics
Yin = 20 Vdc, Boldface limits apply from TMIN to TMAX (Note 1),
all other limits Tj
= 25·C unless otherwise noted
LM1525A
LM"l527A
Parameter
Conditions
Typical
LM3525A
LM3527A
Tested Design
Tested Design
Umlt
Limit
Typical
Umlt
Umlt
(Note 2) (Note 3)
(Note 2) (Note 3)
REFERENCE SECTION
Reference Voltage Output
Units
.'
Tj "" 25·C
5.10
5.05
5.1!?
5.10
5.00
5.20
Vmin
Vmax
Line Regulation
+8.0V::;;; Vin::;;; + 35V
10
20
10
15
20
Load Regulation
o mA ::;;; IL ::;;; 20 mA
20
SO
20
20 .
SO
mVmax
20
50
mVmax
5.08
5.2S
4.95
Vmax
Vmin
Temperature Stability
Reference Voltage Output
50
20
+8.0V ::;;; Vln ::;;; +35V
o mA ::;;; IL ::;;; 20 mA
5.08
5.20
5.00
100
mVmax
And Over Operating Temp.
Short Circuit Current
Tj = 25·C Vref = OV
70
Output Noise Voltage
10Hz::;;; f::;;; 10kHz
Tj = 25·C
40
200
40
200
I£Vrms
max
Long Term Stability
Tj = 125·C
20
50
20
50
mVIKHour
OSCILLATOR SECTION (Note 4) Unless otherwise specified
Initial Accuracy
Tj = 25·C
Accuracy of Freq. vs. Temp.
70
100
mAmax
,
. ±2
±2
±6
±3
±8
±3
±0.3
±1
±0.3
±6
±10
%
±2
%
Voltage Stability
8.0V ::;;; Yin ::;;; 35V
Temperature Stability
aFosc/Fosc
±3
Minimum Frequency
RT = 300 kfi, Cr = 0.11£F,
RD = 0 (Note 5)
70
100
70
Maximum Frequency
RT = 2.0kfi,CT = 1 nF,
RD = 0
450
400
Current Mirror Ipln 5
IRT = 2.0mA
2.0
1.7
2.2
Clock Amplitude
Atpin4
3.5
3.0
3.5
3.0
Vmln
Clock Width
Tj = 25·C
0.5
1.0
0.3
0.5
1.0
0.3
1£8 max
1£8 min
Sync Threshold
(Note 6)
1.8
1.2
2.8
1.8
1.25
2.8
1.2
2.8
Vmln
V max
Sync Input Current
Sync Voltage = 3.5V
1.0
2.5
1.0
2.30
2.5
mAmax
2·42
±8
±2
%
±3
±8
%
90
100
Hz max
450
430
400
kHz min
2.0
1.8
2.1
1.7
2.2
mAmln
mAmax
Electrical Characteristics
Yin
= 20 Vdc. Boldface limits apply from TMIN to TMAX (Note 1). all other limits Tj = 25°C unless otherwise noted (Continued)
LM1525A
LM1527A
Parameter
Conditions
Typical
ERROR AMPLIFIER SECTION VCM
Units
0.5
5
2
7
10
mVmax
1
10
1
2
10
",Amax
0.1
1
0.1
O.B
1
",Amax
88
BO
66
80
dB min
1
MHzmln
Vmax
Input Bias Current
Input Offset Current
DC Open Loop Gain
RL;;' 10 MO
BO
Gain Bandwidth Product
Av = O. Tj = 25°C
CL:S: 30pF
2
Output Low Level
Output High Level
Supply Voltage Rejection
Tested Design
Tested Design
Limit
Limit
Limit Typical Limit
(Note 2) (Note 3)
(Note 2) (Note 3)
= 5.1V. Unless otherwise noted
Input Offset Voltage
Common Mode Rejection
LM3525A
LM3527A
1
2
0.2
0.5
0.2
0.4
0.5
5.6
3.8
5.6
4.1
3.8
Vmln
BO
88
BO
70
8.
dBmin
90
80
90
64
80
dB min
0
0
"lomax
"10 min
= 1.5Vt05.2V
VIN = BV to 35V
VCM
P.W.M. COMPARATOR
0
Minimum Duty Cycle
49
45
49
46
45
Input Threshold
Zero Duty Cycle
0.9
0.8
0.9
0.70
0.8
Vmln
Input Threshold
Max. Duty Cycle
3.3
3 ••
3.3
3.6
3 ••
Vmax
1.0
",Amax
Maximum Duty Cycle
Input Bias Current
1.0
0.05
0.05
SOFT-START SECTION
50
80
25
50
74
36
80
25
",Amax
IJoAmln
0.35
0.8
0.35
0.5
0 ••
Vmax
0.4
= 2.5V
= 20V. Unless otherwise noted
1.0
0.4
0.B5
1.0
mAmax
0.2
0.4
0.2
0.35
0.4
Vmax
ISINK;: 100 mA
1.0
2.0
1.0
1.9
2.0
Vmax
= 20 mA
ISOURCE = 100 mA
VCOMP and VSS = High
19
18
19
1B.2
18
Vmln
18
17
18
17.4
17
Vmin
7
8
8
7
7.7
6.3
8
Vmax
Vmin
200
IJoAmax
Soft Start Current
VSHUTDOWN ;: OV
Soft Start Voltage
VSHUTDOWN ;: 2.0V
Shutdown Input Current
VSHUTDOWN
OUTPUT DRIVERS (Each Output) Vc
0.2
Undervoltage Lockout Hysteresis
Output Low Level
Output High Level
Undervoltage Lockout
ISINK
= 20 mA
ISOURCE
Collector Leakage
LM1525A and LM3525A Only
Vc;: 35V
Rise Time
CL
Fall TIme
= 1 nf. Tj = 25°C
CL = 1 nf. Tj ;: 25°C
V
0.2
200
120
•
100
600
100
600
nsmax
50
300
50
300
nsmax
2-43
•
Electrical Characteristics
Vin = 20 Vdc, Boldface limits apply from T MIN to TMAX (Note 1), all other limits TI = 25°C unless otherwise noted (Continued)
LM1525A
LM1527A
Parameter
Conditions
Tested
Limit
(Note 2)
Typical
$hutdown Delay
VSD = 3V,CL
Ti = 25°C'
= 0,
LM3525A
LM3527A
200
Design
Limit
(Note 3)
Typical
500
200
Tested
Limit
(Note 2)
Units
Design
Limit
(Note 3)
500
nsmax
TOTAL STANDBY CURRENT
I VIN = 35V
I 13 I
Note 1: Unless otherwise noted these specHications apply: - 55'C TI
Supply Current
<
I
I
I
I
I
18
13
14.5
20
mA
< + 125'C for LMt525A and LMt527A, O'C <- TI < + 125'C for LM3525A and LM3527A.
Note 2: Tested limits are guaranteed and tOO% tested In production.
Note 3: Design limits are guaranteed (but not 100% production tested) over the indicated temperature and supply ranges.
Note 4: Tested at Fesc = 40 kHz (Rt = 3.6k, Ct = 0.01 "F, Rd = 0).
Note 5: These specifICations are also guaranteed with Rt = "50k, Ct = 0.2 "F, Rd = O.
Note 6: Tested with a pulse of width 500 n. and ampl~udes of '.2 and 2.8V at 50 kHz.
Note 7: Absolute Maximum Ratings Indicate limits beyond which damage to the device may occur. DC and AC electrical specHications do not apply when operating
the device beyond its rated operating conditions. See Note 1 and conditions.
Note 8: Do not ground pin 6.
Note 9: For' operation at elevated temperatures, devices in the J package must be derated based on thermal resistance of 90'C/W Ounction to ambient), or
8S'C/W in the N package.
Holding pin 10 high for a long time will ultimately discharge
the soft-start capacitor, thus recycling slow turn on upon
release. This method of shutdown is the fastest shutdown
possible.
SHUTDOWN OPTIONS (See Block.Diagram)
1. Since both the compensation and soft-start terminals
(pins 9 and 8) have current source pull-ups, either can
readily accept ,a pull-down signal which only has to sink a
maximum of 100 /LA to turn off the outputs. This is subject to the added requirement of discharging whatever
external capacitance may be attached to these pins.
2. An alternative approach is the use of the shutdown circuitry of pin 10. Activating this circuit by applying a positive-going pulse at pin 10 will result in the output of the
comparator going high, and thus turning off the outputs.
The pulse will start the fast discharge of the soft-start
capacitor. If the shutdown command is short, the PWM '
signal is terminated without significant, discharge of the
soft-start capaCitor, thus allowing, for example, a convenient implementation of pulse-by-pulse current limiting.
SYNCHRONIZATION PROCEDURE
The device may be synchronized to an external clock; how,
ever the following pOints have to be observed: a) The fre- ,
quency of the free-running oscillator of the device must be
set at least 10% less than the frequency of the external
clock. b) The extemal clock pulse must be at least 300 ns
wide but must not exceed the free-running pulse width (pin
4) by more than 200 ns. c) The amplitude of the external
pulse must be between;! and 5V.
Multiple devices may be synchronized together by connecting all pin 4's together and all pin 5's together; pins 6 and 7
of slave oscillatqr must be left open.
2-44
,
r-
....3:
LM1525A Comparator
U1
N
U1
»
......
r3:
....
U1
N
»'""
......
RAMP
FROM
OSCILLATOR
ERROR
AMP OUT
r-
3:
c.)
TO
OUTPUT
U1
N
U1
»
......
r-
3:
CLOCK
FROM
OSCILLATOR
c.)
U1
N
»'""
GND
TL/H/9112-3
LM 1525A Output Section
500 J'A
+
14
D2
'04 omitted in LM1527A.
09 replaced by a 2K resistor in LM 1527A.
PWM
LATCH
UV
OSC
TL/H/9112-6
2-45
LM1525A Oscillator
VREF
TL/H/9112-5
LM1525A Error Amplifier
TL/H/9112-4
2-46
4 Vsat
4 Vsat VS Islnk
VS Source Current
Vsat vs Temp at 100 mA
3
K
1I ~
TIU
TI=-~i!-11
If
I
=150
TI12~~
II--
II
o
0.01
~~ocdl
' _LL
0.1
0.01 0.G2
IsINK(AWPS)
0.1
IrOf
SI~KINIG
0
-75-50-25 0 25 5075100125150175
D.2
TEMP (OC)
Vref Short-Circuit
Current/Temp
Typical Vref VS
Temperature
8r-----r---~~--~
5.15
~5.10
!S
~
i
120
...
1'1- ...
-6'------'------'-------L.l
28
BO
v..ro
I
60
1.00
-75-50-25 0 25 50 75 100125150175
38
"' "
100
>5.G5
18
J'I-I-
lSOURCE (AMPS)
Line Regulation
8
SOURCING 100mA
I
Tiii
o
r-...
2
20
-55-30 -5 20 45 70 95 120 145 170
TEMP (OC)
1IIIP (OC)
VIN (VOLTS)
Duty Cycle Vs
I4.GO Supply Current vs Temp.
15 Supply Current vs VIN
13.75
14
./
/
13
13.25
1: 13.00
/
/
13.50
.Jf'
OSC AT 40kHz
12.75
.I'
--
50 Pin 9 Voltage
....
OSC AT 40KHz
12.50
o
10
20
30
40
VIN (VOLTS)
o/
VOLTS AT PIN 9
Error Amplifier Open-Loop
140Frequency Response
Oscillator Charge
RT
100
lD"
50
100
~
BO
!:i
10
120
~
~
20
200
2000
20000
50
500
5000
CHARGE TIME (PS)
/
I
TEMP (OC)
200 Time vs
!
/
/
10
12.00
-75-50-25 0 25 50 75 100125150175
/
/
20
12.25
12
7
30
.-
~
60
§!
40
i
-<
20
10
DISCHARGE TIME (PI)
100 200
<
()
I~
Rz=20k.ll
I} '\I.
"~I'\.
-20
20
..
""~~
I
10 100 IK 10K lOOK 1M lOY 100M
f, FREQUENCY (Hz)
TUH/9112-14
2-47
LM1525A Typical Timing Diagram
..
ClOCK
ER~
~
'k~~~
n
RAMP
,pC'
~
--
\;7"~~
n
n
n
~n
<::\ .....
,.-
rL
COMPo
Q_---.. .
FLOP-FLOP
AN&fg~tA
n
n
O~JkUJ;~:
-,'
CLOCK,
'
I.._ _ _ _ _ _ _ _....
•
I..- - - - - - - . . . . .
n
•
I
. . . . - -.....- - - -
FLOP-FLOP
'0'
n
OUTPUT (B):
NOR OF '0',
CLOCK,
•
AND COMPo - - - - - . . . . .
n . . ___
L..-_-....I
•
. . . . - - - - - -.....
TL/H/9112-7
Typical Applications
5 Watt Single Ended Step Down Converter
4.7K
4.7K
-EA
2
+EA
SYNC
4
1504
V 13
OSC OUT
e
Lt.t1525A
GND 12
Cr
-GnF
151<11
RT
7
DISCH.
-
SOFT-START
30K
COMPENSATION 9
Re
VIN
~
28V
O.01I'F
t~TLlH/9112-8
Q ~ D45Cl·12
5,1V 0 = IN5821
L ~ 150 I'H
Co ~ 500 I'F
VOUT ~
2-48
Typical Applications (Continued)
3 MOSFET Drive for Push·Pull Converters
Bipolar Drive for Push·Pull Converters
+VSUPPLY 0 - - -...- - - - - - - - - - .
+VSUPPLY
C1
+Vs
+Vs
A
A
LM1525A
~
Lt.t1525A
B
B
RETURN
Tl
II
~
RETURN
-
TI.IH/SI12-S
TL/H/SI12-10
Direct Drive for Transformer
+VSUPPLY
C1
+Vs
A
Lt.t1525A
RElURN o--....________....___- J
TL/H/SI12-11
2·49
Typical Applications (Continued)
LM1525A11527A Lab Test Fixture
.-----------------------------.
CLOCK
3K
PWM'
ADJ.
10K
1.5K
3.6K
1 =VOS
2=1(+)
3=1(-)
D.U.T.
__
._---------------------------_.
2·50
TL/H/9112-12
riI:
en
.....
en
....
~National
~ Semiconductor
en
Q
.......
riI:
N
en
LM 1575-5.0/LM2575-5.0
Simple Switcher Step-Down Voltage Regulator
.....
Cf'
en
Q
General Description
The LM 1575/LM2575 are monolithic integrated circuits that
provide all the active functions for a step-down (buck)
switching regulator. These devices feature a 5V output capable of driving a 1A load with excellent line and load regulation.
Requiring a minimum number of external components,
these regulators are simple to use and include internal frequency compensation and a fixed-frequency oscillator.
The LM1575/2575 offers a high efficiency replacement for
popular three-terminal linear regulators. It substantially reduces the size of the heat sink, and in many cases no heat
sink is required.
A standard series of inductors are available from several
different manufacturers optimized for use with the LM1575/
LM2575. This feature greatly simplifies the design of switchmode power supplies.
Other features include a guaranteed ±3% tolerance on output voltage within specified input voltages and output load
conditions, and ± 10% on the oscillator frequency. External
shutdown is included, featuring less than 200 p.A standby
current. The output switch includes current limiting, as well
as thermal shutdown for full protection under fault conditions.
Features
•
•
•
•
•
•
•
•
•
5Voutput, ±3% Max over line and load conditions
Guaranteed 1A output current
Wide input voltage range, 7V to 35V
Requires only 4 external components
52 kHz fixed frequency internal oscillator
Low power standby mode, 10 typically <200 p.A
82% efficiency
Uses readily available standard inductors
Thermal shutdown and current limit protection
Applications
• Simple high-efficiency step-down regulator
• Efficient pre-regulator for IiJ;lear regulators
• On-card switching regulators
Typical Application
F..
7-32V
dback
V
Unr. gulat.d:.-...._+""IN
7i Lt.t2575-5.0 4
DC Input
1
+5V@IA
'-_....;.R.gulat.d
Output
330 p.H
L...._-r...Jtr,---,r
+
Not.: Pin numb.rs are
for 10-220 Package
I-=
01
CIN
l00p.r
lN5822
TLlH/10527-1
Connection Diagram and Order Information
4-Lead TO-3 (K)
II
5-Lead TO-220 (T)
lIlliCH/OFF
r ••dback
Ground
Output
VIN
TL/H/10527-3
TL/H/10527-2
Top View
Order Number LM2575T-5.0
See NS Package Number T05A
Bottom View
Order Number LM1575K-5.0, LM2575K-5.0
See NS Package Number K04A
For information about LM2575 in dual-in-line or surface-mount packages, contact the factory.
2-51
Absolute Maximum Ratings
(Note 1)
If Mllitery/Aerospace specified devices are required,
please contect the National Semiconductor Sales
Office/Distributors for availability and specifications.
Totel Supply Voltege (see Figure 5)
40V
-1';: V,;: 15V
ON/OFF Pin Input Voltage
-1V
Output Voltege to Ground (Steady Stete)
Power Dissipation
Minimum ESD Rating
(C = 100 pF, R = 1.5 kO)
Lead Temperature
(Soldering, 10 sec.)
2600C
150·C
Maximum Junction Temperature
Operating Temperature Range
LM1575·5.0
LM2575·5.0
Internally Limited
-65·Cto + 150·C
Storage Temperature Range
2kV
-55·C';: TJ';: +1500C
-400C';: TJ ,;: +125·C
Electrical
~haracteristics Specifications with stendard typeface are forTJ = 25·C, and those with boldface
type apply over full Operating Temperature Range. Unless otherwise specified, VIN = 12V, and ILOAD = 200 rnA.
Symbol
Parameter
Conditions
Typ
LM1575-5.0
Limit
(Note 2)
LM2575-5.0
Limit
(Note 3)
4.950
5.050
4.900
5.100
V
V (Min)
V (Max)
4.850/4.800
5.150/5.200
4.800/4.750
5.200/5.250
V
V (Min)
V (Max)
Units
(Limits)
SYSTEM PARAMETERS (Note 4) Test Circuit Figure 1
"
VOUT
Output Voltage,
VIN
= 12V,ILOAD = 0.2A
5.0
,,'
VOUT
'IJ
Output Voltage
0.2A ,;: ILOAD ,;: 1A, 8V ,;: VIN ,;: 35V
Efficiency
VIN
DEVICE PARAMETERS
fo
DC
ICL
Oscillator Frequency
52
'
Saturation Voltege
lOUT
Max Duty Cycle (ON)
= 1A (Note 5)
(Note 6)
Current Limit
IQ
Quiescent Current
VIN
= 35V, (Note 7), Output = OV
Output = -1V
(Note 7)
OJA
OJC
Standby Quiescent
,',
Current
Thermal Resistence
ON/OFF Pin
:
,',
°JA
OJC
kHz
kHz (Min)
kHz (Max)
1.2/1.4
1.2/1.4
V
V (Max)
93
93
%
% (Min)
1.7/1.3
3.0/3.2
1.7/1.3
3.0/3.2
A
A (Min)
A (Max)
2
2
30
30
mA(Max)
mA
mA(Max)
10/12
10
mA
mA(Max)
200/500
200
p.A
p.A(Max)
2.2
7.5
5
"
ISTBY
47/42
58/83
98
Peak Current, ioN ,;: 3 p.s (Note 5)
Output Leakage Current
47/43
58/82
0.9
,"
IL
%
82
"
,
VSAT
= 12V,ILOAD = 1A, VOUT = 5V
5.0
= 5V (OFF)
K Package, Junction to Ambient
K Package, Junction to Case
T Package, Junction to Ambient
T Package, Junction to Case
50
·C/W
35
1.5
40
2
ON/OFF CONTROL Test Circuit Figure 1
= 5V
= OV
VIH
VIL
ON/OFF Pin Threshold
Voltage
VOUT
VOUT
IIH
ON/OFF Pin Input
Current
ON/OFF Pin
IlL
ON/OFF Pin
1.4
1.2
= 5V (OFF)
= OV (ON)
2.2/2.4
1.0/0.8
30
30
p.A
p.A (Max)
10
10
p.A
p.A(Max)
12
0
2·52
V (Min)
V (Max)
22/2.4
1.0/0.8
r
Note 1: Absolute Maximum Ratings Indicate lim"s beyond which damage to the device ~ay occur. Operating Ratings Indicate conditions for which the device Is
Intended to be functional. but do not guarantee specific performance limits. For guaranteed specifications and test conditions, sea the Electrical Characteristics.
Note 2: All limits guaranteed at room temperature (standard type face) and at temperature extreme. (bold type lace). All limits are used to calculate Average
Outgoing Quality Level, and all are 100% production tested.
Note 3: All limits guaranteed at room temperature (standard type face) and at temperature extreme. (bold type lace). All room temperature limits are 100%
production tested. All limits at temperature extreme. are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.
Not. 4: External components such as the catch diode, inductor, input and output capaCitors can affect switching regulator system perlormance. When the
LM1575/LM2575Is used as shown In the Figum t test circui~ system performance will be as shown in system parameters section of Electrical Characteristics.
Nota 5: Output (pin 2) sourcing current. No diode, inductor or capacitor connected to output.
Note 6: Feedback (pin 4) removed from output and connected to OV.
Note 7: Feedback (pin 4) removed from output and connected to 12V to force the output transistor OFF.
Typical Performance Characteristics
Normalized
Output Voltage
+100
~
I!l
~
+75
+50
-25
5
-50
~
~
0
TJ=25"C
+25
~
0
"..
r"'
"""
~
Normalized to YIII = 12Y
+75 ILOAD = 200 rnA
TJ =25CC
+50
~
+25
I!l
~
o·
-25
5
-50
'"0
-75
>
I!:
-75
-tOO
-75 -50-25 0 25 50 75 100 125150
r-- ....
o
- I
T 'II
I
1~"lUrod
at
Ground Pin
o
o
t;
+4
+2
I
-2
z:
....
-6
~
1'\
10 15 20 25 30 35 40
~
YIII=I
I.
T
Y~/++ l-
100
!!i
~
50
o
YIII =·12Y
-75 -50 -25 0 25 50 75 100 125 150'
Efficiency
~
....
-55"C
1'7
.... I--i"'"
2CC ~
125CC
~ ::::;
....
:::::~~
i"'"
o
T
I
I
90
ILOAD= IA
80
r""ILOAD=20~
70
....
I
I
60
50
0.2Q.40.&081.o
SWITCH CURRENT (A)
1".00
I I
I I
100
0.&
Q.4
I I
-
~
co
r.v
-8
·-75-50-25 0 25 50 75 100125150
JUNCTION TEMPERATURE (CC)
I§
JUNCTION TEMPERATURE (CC)
1.2
08 - 4OOC
~1N=35Y
I I VIN =35V
150
Switch
Saturation Voltage
1.0
/'
eo
I I
-75-50-25 0 25 50 75 100 125150
INPUT YOLTAGE (y)
Oscillator Frequency
is
~+fr
~
T
-1t.oAo=~ ~ -
f- -
T"'t- tI I
Standby
Quiescent Current
~LA -
~
JUNCIION TEMPERATURE (CC)
'"
S
.........
200
I
10
~
Normanzed at 25CC
IlOAD=IA
JUNCTION TEMPERATURE (CC)
I
15
~
-75-50-25 0 25 50 75100 125150
I I
r- ....
o
10 15 20 25 30 35 40
20
!
o
+8
.
1.0
Supply Current
1
g
1.5
I-
INPUT YOLTAGE (y)
YIII = 2Y
+8
-
4 YOUT=5::1
0.5
Current Limit
......
'"
~
-100
2.0
:...
JUNCTION TEMPERATURE (CC)
............
Dropout Voltage
Line Regulation
YIN=I2Y
ILOAD = 200 rnA
NarmallDd at
o
10 15 20 25 30 35 40
INPUT VOLTAGE (V)
TLlH/l0527-4
2-53
.....
UI
I.
UI
b
......
r
s::
I\)
~
UI
U,
b
(Circuit of Figure 1 )
+100
,I.
s::
.....
UI
o
:g.....
.-----------------------------------------------------------------------------~
Typical Performance Characteristics
an
(Continued)
Load Transient Response
C'II
Switching Waveforms
:::I!!
...J
~.....
....
an
Output
Voltage
Change
+IOOmV
0
-IOOmV
:=I
lA
C.5:
[
1.0A
Output
Current
O.5A
DC
o
TUH/l0S27-6
IOOp.sec/div.
A:
B:
C:
D:
TUHI10S27-S
Output pin voltage. 10Vldiv
Output pin current. lA1div
Inductor current, 0.5A1div
Output ripple voltage. 20 mVldIV, AC-coupled
Horlzontat 6 ,..aec/dlv
Test Circuit and Layout Guidelines
As in any switching regulator, layout is very important. Rapidly switching currents associated with wiring inductance
generate voltage transients which cause problems. For minimal stray inductance and ground loops, the length of the
leads indicated by heavy lines should be kept as short as
possible. Single-point grounding (as indicated) or ground
plane construction should be used for best results.
TL/HI10527-7
Nota: Pin numbers are for the T0-220 package.
CIN
- 5090RSA 107M05OS (Sprague)
5090RSA227M010S (Sprague)
01 - any manufacturer
'for VIN S; 35V, 01 should be 31 D005 or MBR350.
L1 - 415-D926 (AlE) for ILOAD S; 0.9A. 43Q.()635 (AlE) for ILOAD
S-pin T0-220 socket-2396 (Loranger Mfg. Co.)
4-pin T0-3 socket~112·AG7 (Augat Inc.)
CaUl -
S;
1.0A
FIGURE 1
Block Diagram and Typical Application
Unregula""te""dP':--~
DC Input-
I------......- - i
L.;;;;iE;;;;.;;;;'"
t - - - - - - I 5 ON OFF
'--_.....
Note: Pin numbers are for the
TO·220 package.
TL/H/l0S27-6
FIGURE 2
2-54
LM1575/LM2575 Design Procedure
Example
Procedure
Given:
VIN (Max) = Maximum input voltage
ILOAD (Max) = Maximum load current
Given:
VIN (Max) = 1BV
ILOAD (Max) = O.BA
1.
1.
Inductor Selection (L 1)
A. From Figure 3, identify inductor code for region
indicated by VIN (Max) and ILOAD (Max).
B. From Figure 4, identify inductor value from the
inductor code.
C. Select from the three manufacturer's part numbers
listed in Figure 4.
Alternately, another inductor of the appropriate value may
be used. It must be rated for operation at the LM2575
switching frequency (typically 52 kHz), and for a current
rating of 1.25 x ILOAD (Max).
40
!:i§!
...
~~oo~
16
Z~O /V'
10./
:::>
H680:
a..
i!5
2
:::>
B
7'
/
S::"l
/'
./
./
L:I~/
v/VV/V
9/
::Ii!
x
:i
~~~ ~ ~ H3 ~~~
~
7~3~
./
7
0.3
"
330 ,.H
C. Choose AlE 415-0926, Pulse Engineering
PE 52627, or Renco RL 1952
..... :~~~Z!l
11
~
=
B. Value
30
20
Inductor Selection (L1)
A. Code = L330
/
L>/
0.4
0.5
0.6
~lk
0.7 O.B 0.9 1.0
MAXIMUM LOAD CURRENT (A)
TL/H/l0527-9
FIGURE 3. Inductor Value Selection Guide
Inductor Code
, Inductor Valve
AlES
,Pulse Eng.9
Renc0 10
RL1955
L100
100,.H
415-0930
PE-9210B
L150
150,.H
415-0953
PE-53113
RL1954
L220
220,.H
415-0922
PE-52626
RL1953
L330
330,.H
415-0926
PE-52627
RL1952
L470
470,.H
415-0927
PE-53114
RL1951
L6BO
6BO,.H
415-0928
PE-52629
RL1950
H330
330,.H
430-0635
PE-53117
RL1962
H470
470,.H
430-0634
PE-5311B
RL1961
H6BO
680,.H
415-0935
PE-53119
RL1960
Hl000
1000,.H
415-0934
' PE-53120
,RL1959
FI~URE
4. Inductor Selection by Manufacturer's Part Number.
Note 9: Pulse Engineering. (619) 268·2400 '
P.O. Box 12235. San Diego. CA 92112
Note 8: AlE Magnetics, Div. Vematron Corp. Passive Components Group.
(813) 347-2181
2801 72nd Street North. 51. Petersburg. FL 33710
Note 10: Renco Electronics Inc., (516) 586-5566
60 Jeffryn Blvd. East. Deer Park, NY 11729
2-55
•
LM1575/LM2575 Design Procedure (Continued)
Example (Continued)
Procedure (Continued)
2.
3.
Output Capacitor Selection (COUT)
A. The output capacitor value and the type of capacitor
used will determine the amount 6f ripple voltage that
appears as the output. A value of between 220 /LF and
1000 /LF is recommended. Selecting a low ESR
(Equivalent Series Resistance) capaCitor will result in the
lowest amount of ripple. The lower capacitor values will
allow typically 50 mV to 1S0 mV of output ripple, while
larger-value capaCitors will reduce the ripple to
approximately 3S mV to SO mV.
To further reduce the output ripple voltage, several lowvalue standard capacitors may be paralleled, or a highergrade capa.citor may be used. Such capaCitors are often
called "high-frequency", "low-inductance", or "Iow-ESR".
These will reduce the output ripple to 10 mV to 20 mV.
However, reducing the ESR below O.OSO can cause
instability. For this reason, the use of tantalum capacitors
is not recommended.
B. The capacitor's voltage rating should be at least 1.2S
times greater than the output voltage. For a SV regulator,
a rating of at least 6.3V is appropriate, and a 10V rating is
recommended.
Catch Diode Selection (01)
The catch diode current rating must be at least 1.2 times
greater than the maximum load current. Also, if the power
supply design must withstand continuous shorted output
conditions, the diode current rating should be greater than
3A. The most stressful condition for this diode is an
overload or short circuit condition.
A. The reverse voltage rating of the diode should be at
least 1.2S times the maximum input voltage.
B. Because of their fast switching speed and low forward
voltage drop, Schottky diodes provide the best efficiency,
especially in SV switching regulators. Fast-Recovery,
High-Efficiency, or Ultra-Fast Recovery diodes are also
suitable, but some types with an abrupt turn-off
characteristic may cause instability and EMI problems. A
fast-recovery diode with soft recovery characteristics is a
better choice. To prevent damage to the LM2575, fastrecovery diodes should not be used for VIN:2: 35V,
Standard 60 Hz diodes (e.g., 1N4001, etc.) are also not
suitable, See Figure 5 for Schottky and "soft" fastrecovery diode selection guide.
2.
Output CapaCitor Selection (COUT)
A. COUT = 220 /LF to 1000 /LF standard aluminum
electrolytic or
GoUT = 470 /LF to 1000 /LF high-grade capaCitor
(see text)
B. CapaCitor voltage rating = 1OV
3,
Catch Diode Selection (01)
A. For this example, a 20V rating Is adequate.
B. Use the 1NS821 or 31 0003 Schottky diodes, or any of
the suggested fast-recovery diodes.
VIN (Max)
Current
Rating
Use Part Number (or Equivalent)
Schottky
20V
3A
1NS821
310003
30V
3A
1NS822or
310004
40V
3A
31000S
MBR3S0
Fast-Recovery
FR302, HER302
orMR8S0
(All These are
Rated over 3SV)
Not Recommended
(See Text)
FIGURE 5. Diode Selection Guide
Application Hints
RMS ripple current rating should be greater than 1.2 x
(toNtn x ILOAD.
Input CapaCitor (CIN)
To maintain stability, the regulator Input pin must be bypassed with at least a 22 /LF electrolytic capaCitor. The capacitor's leads must be kept short, and located as close as
possible to the regulator.
If the operating temperature range includes temperatures
below -2SoC, the input capaCitor value may need to be
larger. (This also applies to the output capaCitor.) With'most
electrolytic capacitors, the capacitance value decreases
and the ESR increases with lower temperatures and age.
For maximum capacitor operating lifetime, the capacitor's
Feedback Connection
The LM2S75 feedback 'circuitry Is designed so that, when
the output voltage is connected directly to the Feedback
pin, the output voltage is 5V.
ON/OFF Input
For normal operation, the ON/OFF pin should be grounded
or driven with a low-level TIL voltage. To put the regulator
Into standby mode, drive this pin with a high-level TIL signal.
2-56
Application Hints (Continued)
Grounding
To maintain output voltage stability, the power ground connections must be low-impedance (see Figure 1). For the
TO-3 style package, the case is ground. For the 5-lead
TO-220 style package, both the tab and pin 3 are ground
and either connection may be used, as they are both part of
the same copper leadframe.
Catch Diode
The diode which provides a return path for the load current
when the LM2575 switch is OFF.
Duty Cycle (D)
Ratio of the output switch's on-time to the oscillator period.
D = toN = VOUT for buck regulator
VIN
T
where T is the oscillator period, typically 1/52 kHz.
Heat Sink/Thermal Considerations
In many cases, no heat sink is required to keep the LM2575
junction temperature within the allowed operating range. For
each application, to determine whether or not a heat sink
will be required, the following must be identified:
1. Maximum ambient temperature (in the application).
2. Maximum regulator power dissipation (in application).
Efficiency (71)
The proportion of input power actually delivered to the load.
POUT
71 =
P;; =
POUT
-'-P"'OU"-T'--+-P-L-O-S-S
3. Maximum allowed junction temperature (1500C for
LM1575 or 125'C for the LM2575). For a safe, conservative deSign, a temperature approximately 15'C cooler
than the maximum temperatures should be selected.
Equivalent Series Inductance (ESL)
The pure inductance component of a capaCitor (see Figure
6). The amount of inductance is determined to a large extent on the capacitor's construction.
4. LM2575 package thermal resistances 8JA and 8JC.
Total power dissipated by the LM2575 can be calculated as
follows:
~IESR
Po = (VIN)(lS) + (VOIVIN)(lLOAO)(VSAT)
where Is (supply current) and VSAT can be found in the
Characteristic Curves shown previously, VIN is the applied
minimum input voltage, Vo is the regulated output voltage,
and ILOAO Is the load current. The dynamic losses during
turn-on and turn-off are negligible if a Schottky is used as
the catch diode.
ESL
C
TUH/10527-10
FIGURE 6. Simple Model of a Real CapaCitor
Equivalent Series Resistance (ESR)
The purely resistive component of a' real capaCitor's impedance. (see Figure 6). It causes power loss resulting in capaCitor heating, which directly affects the capacitor's operating lifetime. When used as a switching regulator output
filter, higher ESR values result In higher output ripple voltages.
Most standard aluminum electrolytic capacitors in the
220 ""F-1000 ""F range have 0.10. to 0.30 ESA. Highergrade capaCitors ("Iow-ESR", "high-frequency", or "low-inductance") in the 220 ""F-l000 ""F range generally have
ESR of less than 0.150.
When no heat sink Is used, the junction temperature rise
can be determined by the following:
~TJ = (Po)(8JN
To arrive at the actual operating junction temperature, add
the junction temperature rise to the maximum ambient temperature.
TJ = ~TJ + TA
If the actual operating junction temperature is greater than
the selected safe operating junction temperature determined step 3, then a heat sink is required.
Output Ripple Voltage
The AC component of the switching regulator's output voltage. It is usually dominated by the output capaCitor's ESR
multiplied by the inductor'S ripple current. The peak-to-peak
value of this sawtooth ripple current will be typically 40% of
the maximum load current (when the Design Procedure in
the datasheet is followed).
When using a heat sink, the junction temperature rise can
be determined by the following:
~TJ = (Po)(8JC + 8interface + OHeat sink)
The operating junction temperature will be:
Ripple Current
RMS value of the maximum allowable alternating current at
which a capacitor can be operated continuously at a specified temperature.
TJ = TA + ~TJ
As above, if the actual operating junction temperature is
greater than the selected safe operating junction temperature, then a larger heat sink is required (one that has a lower
thermal reSistance).
Standby Current (ISTBY)
Supply current required by the LM2575 when in the standby
mode (ON/OFF pin is driven to TTL-high voltage), thus turning the output switch OFF.
Definition of Terms
Buck Regulator
A switching regulator topology in which a higher voltage is
converted to a lower voltage. Also known as a step-down
SWitching regulator.
2-57
•
Pin
Name
Pin
Number
(TO·220
Pkg.)
Feedback
4
Observed
Problem
Normal
Operation
Voltage Waveform
It Values
DC, VOUT (5V Typ.) Plus
Tri-Wave Ripple Voltage
Plus Switching Noise
Probable
Reason
Condition
Solution
o OV
Ph, Control Not Set for
Normal Operation
(Improper Logic or
Connection)
3
(Tab)
DC,OV
Noisy
Probe Ground Lead Is
Picking up Switchin!!
Noise
DC, VIN (from
Unregulated Source)
0< V1 100 Mn
Nole 3: 'LM1578 max duty cycle is 90%
TUH/8711-3
Definition of Terms
Input Reference Voltage: The reference voltage referred
to ground, applied to either the inverting or non-inverting
inputs, which will cause the output to switch ON or OFF.
tor's collector connected to Vin, the Emitter Saturation Voltage is the collector-to-emitter voltage for a given emitter
current.
Input Reference Current: The current applied to either the
inverting or the non-inverting input which will cause the output to switch ON or OFF.
Input Level Shift Accuracy: If there are two equal resistors
sinking current from the inverting and non-inverting input
terminals, the Input Level Shift Accuracy is the ratio of the
voltage across the resistors to produce a given duty cycle at
the output.
Collector Saturation Voltage: With the inverting input terminal grounded thru a 10 k!1 resistor and the output transistor's emitter connected to ground, the Collector Saturation
Voltage is the collector-to-emitter voltage for a given collector current.
Emitter Saturation Voltage: With the inverting input terminal grounded thru a 10 k!1 resistor and the output transis-
Collector Emitter Sustaining Voltage: The collector-emitter breakdown voltage of the output transistor, measured at
a specified current.
Current Limit Sense Voltage: The voltage at the Current
Limit pin, referred to either the supply or the ground terminal, which (via logiC circuitry) will cause the output transistor
to turn OFF and resets cycle-by-cycle at the oscillator frequency.
Current Limit Sense Current: The bias current for the Current Limit terminal with the applied voltage equal to the Current Limit Sense Voltage.
Supply Current: The IC power supply current, excluding the
current drawn through the output transistor, with the oscillator operating.
2-63
Functional Description
The LM1578A is a pulse-width modulator designed for use
as a switching regulator controller. It may also be used in
other applications which require controlled pulse-width voltage drive.
A control signal, usually representing output voltage, fed
into the LM1578A's comparator is compared with an internally-generated reference. The resulting error signal and the
oscillator's output are fed to a logic network which determines when the output transistor will be turned ON or OFF.
The following is a brief description of the subsections of the
LM1578A.
OUTPUT TRANSISTOR
The output transistor is capable of delivering up to 750 mA
with a saturation voltage of less than 0.9V. (see Col/ector
Saturation Voltage and Emitter Ssturation Voltage curves).
The emitter must not be pulled more than 1V below ground
(this limit Is 0.6V for TJ ~ 100'C). Because of this limit, an
external transistor must be used to develop negative output
voltages (see the lilVerting Regulator Typical Application).
Other configurations may need protection against violation
of this limit (see the Emitter Output section of the Applications Information).
COMPARATOR INPUT STAGE
The LM157.8A's comparator input stage is unique in that
both the inverting and non-inverting inputs are available to
the user, and both contain a 1.0V reference. This is accomplished as follows: A 1.0V reference is fed into a modified
voltage follower circuit (see FUNCTIONAL DIAGRAM).
When both input pins are open, no current flows through R1
and R2. Thus, both inputs to the comparator will have the
potential of the 1.0V reference, VA. When one input, for
example the non-inverting input, is pulled Il.V away from VA,
a current of Il.VIR1 will flow through R1. This same current
flows through R2, and the comparator sees a total voltage
of 21l.V between its inputs. The high gain of the system,
through feedback, will correct for this .imbalance and return
both Inputs to the 1.0V level.
This unusual comparator input stage Increases circuit flexibility, while minimizing the total number of external components required for a voltage regulator system. The inverting
switching regulator configuration, for example, can be set up
without having to use an external op amp for feedback polarity reversal (see TYPICAL APPLICATIONS).
CURRENT LIMIT
The LM1578A's current limit may be referenced to either
the ground or the Yin pins, and operates on a cycle-by-cycle
basis.
The current limit section consists of two comparators: one
with its non-inverting input referenced to a voltage 110 mV
below Yin, the other with its inverting input referenced
110 mV above ground (see FUNCTIONAL DIAGRAM). The
current limit is activated whenever the current limit terminal
is pulled 110 mV away from either Yin or ground.
Applications Information
CURRENT LIMIT
As mentioned in the functional description, the current limit
terminal may be referenced to either the Vln or the ground
terminal. Resistor R3 converts the current to be sensed into
a voltage for current limit detection.
V,N
OSCILLATOR
The LM 1578A provides an on-board oscillator which can be
adjusted up to 100 kHz. Its frequency Is set by a single
external capacitor, C10 as shown in Figura 1, and follows the
equation
fose = 8X10- 5/C,
The oscillator provides a blanking pulse to limit maximum
duty cycle to 90%, and a reset pulse to the internal circuitry.
LM1578A
"
5
R3
TUH/B711-15
FIGURE 2_ Current Limit, Ground Referred
lM1578A
~I~~~~~-L~~~
1
10
5
100
FREQUENCY (kHz)
TUH/B711-4
FIGURE 1_ Value of Timing Capacitor ys
Oscillator Frequency
TUH/B711-16
FIGURE 3. Current LImit, V'n Referred
2-64
Applications Information
r......
==
U1
......
(Continued)
CURRENT LIMIT TRANSIENT SUPPRESSION
co
VIN
When noise spikes and switching transients interfere with
proper current limit operation, R1 and C1 act together as a
low pass filter to control the current limit circuitry's response
time.
Because the sense current of the current limit terminal varies according to where it is referenced, R 1 should be less
than 2 kO when referenced to ground, and less than 1000
when referenced to Vin.
»
.....
r==
8
I\)
U1
......
7
2
Lt.l1578A
co
»
.......
6
r-
RI
5
==
U1
Co)
......
co
TL/H/8711-20
FIGURE 7. Current Limit Sense Voltage Multiplication,
Vln Referred
2
3
»
LMI578A
4
UNDER-VOLTAGE LOCKOUT
Under-voltage lockout is accomplished with few external
components. When Vln becomes lower than the zener
breakdown voltage, the output transistor Is turned off. This
occurs because diode 01 will then become forward biased,
allowing resistor A3 to sink a greater current from the noninverting input than is sunk by the parallel combination of R1
and R2 at the inverting terminal. R3 should be one-fifth of
the value of R1 and R2 in parallel.
6
5
RI
R2
l
eI
TL/H/B711-17
FIGURE 4. Current Limit Transient Suppressor,
Ground Referred
R1
2
LMI578A
lN457
RI
5
3
LMI578A
4
TLlH/B711-1B
FIGURE 5. Current Limit Transient Suppressor,
Vln Referred
TLlH/B711-22
FIGURE 8. Under-Voltage Lockout
C.L. SENSE VOLTAGE MULTIPLICATION
When a larger sense resistor value is desired, the voltage
divider network, consisting of R1 and R2, may be used. This
effectively multiplies the sense voltage by (1 + R1/R2).
Also, R1 can be replaced by a diode to increase current limit
sense voltage to about 800 mV (diode VI + 110 mV).
MAXIMUM DUTY CYCLE LIMITING
The maximum duty cycle can be externally limited by adjusting the charge to discharge ratio of the oscillator capacitor
with a single external resistor. Typical values are 50 /LA for
the charge current, 450 /LA for the discharge current, and a
voltage swing from 200 mV to 750 mV. Therefore, R1 is
selected for the desired charging and discharging slopes
and C1 is readjusted to set the oscillator frequency.
VIN
2
LMI578A
TL/H/B711-19
FIGURE 6. Current Limit Sense Voltage Multiplication,
Ground Referred
2-65
•
Applications Information (Continued)
Rl
8
Rl
8
7
LM1578A
7
6
LM1578A
5
4
6
5
TLlH/8711-21
FIGURE 9. Maximum Duty Cycle Limiting
DUTY CYCLE ADJUSTMENT
When manual or mechanical selection of the output transis·
tor's duty cycle is needed, the cirucit shown below may be
used. The output will turn on with the beginning of each
oscillator cycle and turn off when the current sunk by R2
and R3 from the non-inverting terminal becomes greater
than the current sunk from the inverting terminal.
With the resistor values as shown, R3 can be used to adjust
the duty cycle from 0% to 90%.
When the sum of R2 and R3 is twice the value of R1, the
duty cycle will be about 50%. C1 may be a large electrolytic
capacitor to lower the oscillator frequency below 1 Hz.
TLlH/8711-24
FIGURE 11. Shutdown Occurs when VL Is High
EMITTER OUTPUT
When the LM1578A output transistor is in the OFF state, if
the Emitter output swings below the ground pin voltage, the
output transistor will turn ON because its base is clamped
near ground. The Collector Cuffent with Emitter Output Below Ground curve shows the amount of Collector current
drawn in this mode, vs temperature and Emitter voltage.
When the Collector-Emitter voltage is high, this current will
cause high power dissipation in the output transistor and
should be avoided.
This situation can occur in the high-current high-voltage
buck application if the Emitter output is used and the catch
diode's forward voltage drop is greater than 0.6V. A fast-recovery diode can be added in series with the Emitter output
to counter the forward voltage drop of the catch diode (see
Figure 2). For better efficiency of a high output current buck
regulator, an external PNP transistor should be used as
shown in Figure 16.
YIN
LM1578A
TLlH/8711-23
FIGURE 10. Duty Cycle Adjustment
REMOTE SHUTDOWN
The LM1578A may be remotely shutdown by sinking a
greater current from the non-inverting input than from the
inverting input. This may be accomplished by selecting resistOr R3 to be approximately one-half the value of R1 and
R2 in parallel.
TL/H/8711-30
FIGURE 12. D1 Prevents Output Transistor from
Improperly Turning .ON due to D2's Forward Voltage
2-66
,-----------------------------------------------------------------------------,
Applications Information
(Continued)
SYNCHRONIZING DEVICES
When several devices are to be operated at once, their oscillators may be synchronized by the application of an external signal. This drive signal should be a pulse waveform with
a minimum pulse width of 2 ",s. and an amplitude from 1.5V
to 2.0V. The Signal source must be capable of 1.) driving
capacitive loads and 2.) delivering up to 500 ",A for each
LM1578A.
....3:c.n
-..
....;
where:
3:
~
V is the current limit sense voltage, 0.11V
Isw(max) is the maximum allowable current thru the output transistor.
L 1 is the inductor and may be found from the inductance
calculation chart (Figure 16) as follows:
Capacitors C1 thru CN are tO,be selected for a 20% slower
frequency than the synchronization frequency.
Given Yin = 15V
V o ' = 5V
-
01
Step 1: Calculate the maximum DC current through the inductor, IL(max). The necessary equations are indicated at
the top of the chart and show that IL(max) = lo(max) for the
buck configuration. Thus, IL(max) = 350 rnA.
----...1
Step 2: Calculate the inductor Volts-sec product, E-Top , according to the equations given from the chart. For the Buck:
0-__- - -.....
21'S.
(min.)
E-Top = (Vin - yo) (VoNin) (1000/fos e)
= (15 - 5) (5/15) (1000/59)
TL/H/B711-25
FIGURE 13. Synchronizing Devices
= 66V-",s.
with the oscillator frequency; fose, expressed in kHz.
Typical Applications
The LM1578A may be operated in either the continuous or
the discontinuous conduction mode. The following applications (except for the Buck-Boost Regulator) are designed
for continuous conduction operation. That is, the inductor
current is not allowed to fall to zero. This mode of operation
has higher efficiency and lower EMI characteristics than the
'
discontinuous mode.
Vin = lSV
va = SV
Vripple
BUCK REGULATOR
= D X Yin = Yin X
(lon)/(ton
= 10,mV
10 = 3S0 mA
'ose = so kHz
'R1 = 40 kO
'R2=10kO
R3 = 0.lS0
Cl = 1820 pF
C2 = 220I'F
C3 = 20pF
L1 = 470l'H
01 = 1NS818
The buck configuration is used to step an input voltage
down to a lower level. Transistor Q1 in Figure 14 chops the
input DC voltage into a squarewave. This squarewave is
then converted back into a DC voltage of lower magnitude
by the low pass filter consisting of L1 and C1. The duty
cycle, D, of the squarewave relates the output voltage to the
input voltage by the following equation:
Vout
~
w
c.n
Note that since the circuit will become discontinuous at
20% of lo(max), the load currerit must not be allowed to fall
below 70 rnA.
ALL DIODES ARE lN914
OV
I
~
lo(max) = 350 rnA fOSC = 50 kHz
Discontinuous at 20% of lo(max).
1~~JlJl'
2V
~
Component values are selected as follows:
R1 = (Vo - 1) x R2 where R2 = 10 k!}
R3 = VII sw(max)
RS = 0.15!}
TL/H/B711-B
FIGURE 15. Buck or Step·Down Regulator
Step 3: Using the graph with axis labeled "Discontinuous At
% lOUT" and "IL(max, DC)" find the point where the desired
maximum inductor current, IL(max. DC) intercepts the desired
discontinuity percentage.
'+ Ioff).
L1
In this example, the' p'oint of interest is where the 0.35A line
intersects with the 20% line. This is nearly the midpoint of
the horizontal axis.
Step 4: This last step is merely the translation of the point
found in Step 3 to the graph directly below it. This Is accom·
plished by moving straight down the page to the pOint which
intercepts the desired E·Top. For this example, E·Top is
66V·",s and the desired inductor value is 470 ",H. Since this
example was for 20% discontinuity, the bottom chart could
have been used directly, as noted in step S of the chart
instructions.
TL/H/B711-5
FIGURE 14. Basic Buck Regulator
Figure 15 is a 15V to 5Vbuck regulator with an output current, 10 , of 350 rnA. The circuit becomes discontinuous at
20% of lo(max), has 10 mV of output yoltage ripple, an efficiency of 75%, a load regulation of 30 mV (70 rnA to
350 rnA) and a line regulation of 10 mV (12 :s; Vln :s; 18V).
2·67
•
LM1578A/LM2578A/LM3578A
HOW TO USE 11115 CHART
•CD tALCULATE
BUCK
IL =I LOAD
' .. MAX DC
HERE
® tALCULATE
Vo
1000
(VIN-VO> • VII • r, kHI
[-Top HERE ~
@::ox~
IlISCONlINUITY
.
= 4\.'1001
2ia..MAX DC
.
HERE
IF "2OX" PROCEED
TOCi)
.
....
;:;
5
i
!i
IL=I LOAD
~
INVERT.
BOOST
'
Vo
VIN
(V -V ). VIN • 1000
o IN Vo F,kHI
VJN+lVol
IL =I LOAD . - VIN
VIN.~.
VIN+lVol
1000
r,kHI
~
IL
~
'a
"2-
[-TOp
~
O·
f
::s
.0
'§
s
.S'
~ ..
-~
2
~
is
@PROCEED-+
HORIZONTALLY TO
I.. MAX DC
FROIIG)
i
@FROII
I.. MAX DC
PROCEED
1
VERllCALLY
TO
[-Top FRO'.-
CD
@R£AD ;
IlOUCTAIICE .
VALU[ AT
[-Top FOR
1.. 1/AlC DC
Ci)R£AD
I.. MAX DC
FROII
HERE
CD 4 ® READ INOUCTANCE
VALUE AT E-TOP
FOR I.. MAX DC
t
:£
.....
FOR ZOX DISCONTINUITY: IL.MAX DC (AIIPS) -
©
NATIONAL SEMICONDUCTOR CORP. 1988
TLlH/8711-31
FIGURE 17. DC/DC Inductance Calculator
Typical Applications (Continued)
For a full line of standard inductor values, contact Pulse
Engineering (San Diego, Calif.) regarding their PE526XX series, or A. I. E. Magnetics (Nashville, Tenn.).
The remainder of the components of Figure 15 are chosen
as follows:
C1 is the timing capacitor found in Figure 1.
A more precise inductance value may be calculated for the
Buck, Boost and Inverting Regulators as follows: .
C2 ~ Vo (Vin - Vo)/(8f~sc 2VinV,ippleL1)
where V'ipple is the peak-to-peak output voltage ripple.
C3 is necessary for continuous operation and is generally in the 10 pF to 30 pF range.
BUCK
L = Vo (Vin - Vo)/(AIL Yin foscl
BOOST
01 should be a Schottky type diode, such as the
1N5818 or 1N5819.
L = Vin2 (VO - Vin)/(AIL lose Vo2)
INVERT
BUCK WITH BOOSTED OUTPUT CURRENT
L = Vin2lVol/[AldVin + IVol)2loscl
where AIL is the current ripple through the inductor. AIL is
usually chosen based on the minimum load current expected 01 the circuit. For the buck regulator, since the inductor
current IL equals the load current 10,
For applications requiring a large output current, an external
transistor may be used as shown in Figure 17. This circuit
steps a 15V supply down to 5V with 1.5A of output current.
The output ripple is 50 mV, with an efficiency of 80%, a load
regulation of 40 mV (150 mA to 1.5A), and a line regulation
of 20 mV (12V ,,; Yin ,,; 18V).
Component values are selected as outlined for the buck
regulator with a discontinuity factor of 10%, with the addition of R4 and R5:
AIL = 2· 10(min)
AIL = 140 mA for this circuit. AIL can also be interpreted as
AIL = 2 • (Discontinuity Factor) • IL
where the Discontinuity Factor is the ratio of the minimum
load current to the maximum load current. For this example,
the Discontinuity Factor is 0.2:
R4 = 10VBE1B,/lp
R5 = (Vln - V - YBEl - Vsatl B,/(lL(max, DC)
where:
+ IR4)
VBEl is the VBE of transistor 01.
Vsat is the saturation voltage 01 the LM1578A output
transistor.
.
V is the current limit sense voltage.
B, is the forced current gain of transistor 01 (B, = 30
for Figure 17).
IR4= VBE1 /R4
.Ip = IL(max, DC)
Vln
+ 0.5AIL
=
15V
5V
Vripple = 50 mV
10 = 1.5A
'ose = 50 kHz
Rl = 40 kl1
R2 = 10 kl1
R3 = 0.0511
va =
HI
C3
R2
CI
TL/H/B711-B
FIGURE 17. Buck Converter with Boosted Output Current
2-69
.
R4 =
20011
= 33011
Cl = 1820 pF
C2 = 330 f'F
R5
C3=20pF
Ll= 220 f'H
01
Q1
= lN5B19
= 045
Typical Applications (Continued)
C2~
10 (Vo - Vin)/(fosc Vo Vripplel·
01 is a Schottky type diode such as a'IN58'18or IN5819.
BOOST REGULATOR
The boost regulator converts a low input voltage into a higher output voltage. The basic configuration is shown in Figure
18. Energy is stored in the inductor,while the transistor is on
and then transferred with the input ,voltage to the output
capacitor for filtering when the transistor is off. Thus,
L1 is found as described in the buck converter section.
INVERTING REGULATOR
Figure 20 shows the basic configuration for an inverting reg,
ulator. The input voltage is of a positive polarity, but the
output is negative. The output may be less than, equal to, or
greater in magnitude than the input. The relation"hip b'etween the magnitude of the input voltage and the output
. '
voltage is Vo = Vin x (ton/toff).
Vo = Vln + Vln(ton/toff)' .
.
Ll
01
~T2l1 11"°"
01
r-----1--+~-.--O~
, TLIH18711-9
FIGURE 18. Basic Boost Regulator
The circuit of Figure 19 converts a 5V.supply into a 15V
supply with 150 mA of output current, a load regulation of
14 mV (30 mA to 150 mAl, and a line regulation of 35 mV
(4.5V :s:; Vin :s:; 8.5V).
TUH18711-10
FIGURE 20. Basic Inverting 'Regulator
Vln = 5V
Vo = 15V
Vripple = 10 mV
10 = 150 mA
fooc = 50 kHz
Rl = 140 kO
R2 = 10 kO
Rl
'
Rgure 21 shows an LM1578A configured ,as a 5" ~o -15V
polarity inverter with an output current of 300 mA, a load
regulation of 44 mV (60 mA to 300 mAl and a line regulation
of 50 mV (4.5V :s:; Vin :s:; 8.5V).
R1 = (IVol +1)R2whereR2 = 10kO.
R3 = VI(lL(max, DC) + 0.5 ~ILl.
P-f...~l+o()vo ~!: ~~OOkO
R4 = 10VeEJBf/(IL(max,DC) + 0.5~ILl
where:
Cl = 1820 pF
C2 = 470,..F
C3=20pF
C4 = 0.0022 ,..F
L1 = 330,..H
01 = lN5818
TUH18711-11
V, VeE1, Vsat, and Bf are defined in the "Buck Converter
with Boosted Output Current" section.
R1 = (Vo - 1) R2where R2 = 10 kO.
~IL = 2(1LOAD(min»(Vin + IVol)IVIN
R5 is defined in the "Buck with Boosted Output Current" section.
R6 serves the same purpose' as R4 iii the Boost Regulator circuit and is typically 220 kO.
R3 = VI(IL(max, DC) + 0.5 ~ILl
where:
C1, C3 and C4 are defined in the "Boost Regulator"
section.
FIGURE 19. Boost or Step-Up Regulator
C2 ~ 10 IVol/[fosc+vo
TL/H/B711-14
FIGURE 23. R5-232 Line Driver Power Supply
2-71
±12V
10 = ±4OmA
fose = 80 kHz
Rl = 10kG
R2 = 240 kG
R3 = 240 kG
R4 = 0.1 G
Cl = 820 pF
C2 = 10 pF
C3 = 220,.F
01.02. 03 = lN5819
T1 = PE-M287
Typical Applications (Continued)
For good efficiency, the diodes must have a low forward
voltage drop and be fast switching. 1N5819 Schottky diodes
work well.
Transformer selection should be picked for an output transistor "on" time of 0.4/fosc, and a primary inductance high
enough to prevent the output transistor switch from ramping
higher than the transistor's rating of 750 mA. Pulse Engineering (San Diego, Calif.) and Renco Electronics, Inc.
(Deer Park, N.Y.) can provide further assistance in selecting
the proper transformer for a specific application need. The
transformer used in Figure 23 was a Pulse Engineering
PE-64287.
Capacitor C1 sets the oscillator frequency and is selected
from Figure 1.
Capacitor C2 serves as a compensation capacitor for synchronous operation and a value of 10 to 50 pF should be
sufficient for most applications.
A minimum value for an ideal output capacitor C3, could be
calculated as C = 10 x II Ii V where 10 is the load current, t
is the transistor on time (typically 0.4/fosc), and IiV is the
peak-to-peak output voltage ripple. A larger output capacitor
than this theoretical value should be used since electrolytics
have poor high frequency performance. Experience has
shown that a value from 5 to 10 times the calculated value
should be used.
2-72
r-------------------------------------------------------------------------.r
3:
I\)
~National
~
~ Semiconductor
CD
LM2579 Switching Regulator
General Description
Features
The LM2579 can easily be used in switching regulator configurations, such as the buck, boost, and inverting, to perform DC-to-DC voltage conversion. The LM2579 features a
unique comparator input stage which not only has separate
pins for both the inverting and non-inverting inputs, but also
provides an internal 1.0V reference to each input, thereby
simplifying circuit design and p.c. board layout. The output
can switch up to 3A and has output pins for both its collector and emitter to promote design flexibility. An external current limit terminal may be referenced to either the ground or
the VIN terminal, depending upon the application. In addition, the LM2579 has an onboard oscillator, which sets the
switching frequency with a single external capacitor, from
< 1 Hz to 100 kHz (typical).
•
•
•
•
•
Inverting and non-inverting feedback inputs
1.0V reference at inputs
Operates from supply voltages of 3.5V to 40V
Output current up to 3A, saturation less than 0.75V
Emitter output can swing below ground terminal, for
ease of use in inverting applications
• Current limit and thermal shutdown
• Duty cycle up to 90%
Applications
• Switching regulators in buck, boost, inverting, and single-ended transformer configurations
• Motor speed control
• Lamp flasher
Functional Diagram
VIN
r-------~---------------.------~------cPINB
CURRENT
LIMIT
PIN 9
COMPAR.
PIN 1
INPUTS
PIN 2
5JJ.A
5JJ.A
LATCHES
GATES
AND DRIVER
COLLECTOR
PIN 7
EMITTER
PIN 5
-------+-----------.....- - - 0 PIN
GROUND
4
1..-------....
TUH/l0355-1
2-73
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Total Supply Voltage
50V
Maximum Junction Temperature
ESD Tolerance (Note 4)
Collector Output to Ground
Emitter Output to Ground (Note 2)
Power Dissipation (Note 3)
-0.3Vto +50V
-20Vto +50V
Internally limited
Ambient Temperature
3A
-65·C to + 150·C
Junction Temperature
Supply Voltage
Output Current
Storage Temperature
Lead Temperature
(Soldering, 10 seconds)
260"C
150"C
2kV
Operating Ratings
-40"C
~
TA:S: +S5·C
-40·C ~ TJ ~ +125·C
3.5V ~ VIN ~ 40V
Electrical Characteristics
These specifications apply for 3.5V :s: VIN :s: 40V, timing capacitor Or = 3900 pF, and 25% :s: duty cycle :s: 75%, unless
otherwise specified. Values in standard type{ace are for TJ = 25·C, values in boldface type apply for '--40"C ~ TJ :s: + 125"C.
Symbol
Parameter
Typical
(Note 5)
Conditions
Limit
(Note 6)
Units
OSCILLATOR
fosc
Frequency
20
24
16
Afosc/AT
Frequency Drift with Temperature
Amplitude
kHz
kHz (max)
kHz (min)
-0.13
%rC
550
mVp•p
REFERENCE/COMPARATOR (Note 7)
VR
AVR/AVIN
IINV
Input Reference Voltage.'
Input Reference Voltage.
Line Regulation
11 = 12 = OmAand
11 = 12 = 1 mA ± 1% (Note S)
1.0
11 ,; 12 = O.mAand
11 = 12 = 1 mA ±1% (NoteS)
0.003
1.050/1.070
0.950/0.930
%N
0.01/0.02
Inverting Input Current
11 = 12 = 0 mA, duty cycle = 25%
Level Shift Accuracy
Level Shift Current
= 1rnA
0.5
Input Reference Voltage
Long Term Stability
%1V(max)
p.A
1.0
10/13
AVR/At
V
V (max)
V (min)
%
% (max)
ppm/l000h
100
OUTPUT
Vc(sat)
VE(sat)
ICES
ICEX
BVCEO(SUS)
Collector Saturation Voltage
Emitter Saturation Voltage
Collector Leakage Current
Emitter Leakage Current
Collector-Emitter
Sustaining Voltage
Ic
=
3A Pulsed, Emitter Grounded
10 = 3A Pulsed, VIN = Vc = 40V
0.55
0.1
VIN = Vc ,;; 20V,
VE '" - 20V, Output OFF
0.1
=
0.2A (Pulsed), VIN
=
0
V
V (max)
1.9/2.0
V(m~)
1.7
VIN = VCE = 40V,
Emitter Grounded, Output OFF
ISUST
0.75/1.0
V
/LA
600/750
p.A(max)
600/750
/LA (max)
/LA
60
50
2-74
V
V (Min)
Electrical Characteristics
(Continued)
These specifications apply for 3.5V ~ VIN ~ 40V, timing capacitor CT = 3900 pF, and 25% ~ duty cycle ~ 75%, unless
otherwise specified. Values in standard typeface are for TJ = 25'C, values in boldface type apply for -40'C ~ TJ ~ + 125'C.
Symbol
Parameter
Typical
(Note 5)
Conditions
Limit
(Note 6)
Units
CURRENT LIMIT
VOL
Sens!, Voltage Shutdown Level
115
Referred to VIN or Ground
80
160
!NOl/fl.T
Sense Voltage Temperature Drift
IOL
Sense Bias Current
mV
mV(min)
mV(max)
0.3
%/'C
Referred to VIN
Referred to Ground
40
0.4
p.A
p.A
Output OFF, VE = OV
3.0
DEVICE POWER CONSUMPTION
Is
Supply Current
Output ON, Ic = SA Pulsed,
VE = OV
5.017.0
mA
mA(max)
75/150
mA,peak
(max)
55
Note 1: Absolule Maximum Ralings indicale limils beyond which damage 10 the device may occur. DC and AC electrical specifications do nol apply when operallng
the device beyond lis rated operallng conditions.
Nole 2: Maximum voltage between emiller and collector or supply is 50V.
Nole 3: At elevated lemperalures. devices must be deratad based on package thenmal resistance. The device In Ihe 11·lead TO-220 package musl be derated al
36"C/W. junction I(l ambient. or I"C/W,lunction to case.
Nole 4: Huma~ body. model. R = 1.5 kIl, C = 100 pF.
Nole 5: Typical values are for TJ = 25'C and represent the moslilkety parametric nonm.
Note 6: All limits guaranleed al room temperalure (slandard type face) and al temperature extremes (bold type lace). Room temperature limits are 100%
production lested. Umits· at lemperalure extremes are guaranleed via correlation using standard Statistical Quality Conlrol (SQC) methods. All IImHs are used to
calculate Average Oulgoing Quality Level (AOQL).
Note 7: Input tenminals are protected from accidental shorts to ground but If mannal voltages higher Ihan the reference voltage is applied. excessive current will
flow and should be IImiled to less than 5 mA.
Note 8: 11 and 12 are the external sink currents althe inputs (refer 10 Test CIrcuil).
Connection Diagram and Ordering Information
11 N.C.·
10 N.C.·
9 IUNIT
8 VIN
7 COLLECTOR
6 N.C.·
5 EMmER
4 GND
0
3
Cr
2 (+) INPUT
1 (-) INPUT
TLlH/l0355-2
Top View
Tab connected to Pin 4 (Ground)
·N.C. = No Internal connection
Order Number LM2579T
See NS Package Number TA 11B
2·75
•
....CD r------------------------------------------------------------------------------------------,
\I)
N
:2
Typical Performance Characteristics
..J
Collector, Saturation Voltage, .
(Sinking Current, .
Emitter Grounded)
Input Reference Voltage
Drift with Temperature
1.D.lO
ID2D
3.5r---r----r---,---...,.;-..:.....,
-
~ UDJ
gQ.990
~0.91l0
!
r-
-
-zs
0
25
50
Q.4
112
75 lOll 125
Current Limit Sense Voltage
Drift with Temperature .
~~
~
~
lOll ...-::::
~
~ i---" ~
;....- , v" REFERRED
-so
-25
0
25
so
~
~
r-
5
r-1--
!
-
150
OUTPUT
J'" m~LLECTOR
V'N=15V
g~
120
•
110
90
o
W
~
-so
III
120
~
lOll 1---'----1__--1--_\
III
601---1---1__-'>P'!~<---j
-IOI---~~~~I___\
205;;iiO!'F---+-~+--I
O~~--~--~--~
o
1.0
2n
. 80D
Oscillator Voltage Swing
I I
I
~
r......
!I!
-25
30
COllECTOR CURRENT (A)
0
so
25
75 lOll 125
UPPER UIIrr
700
500
4.D
70
!
iB
~
II::
,iii.
60
i---' ~
250
200
l- I-"
ISO
lOll
'SO -25
miPERATURE ("C)
Supply Current
vs Output Current
~
..... .......
03
20 25 50 ~ -10
SUPPLY VOLTAGE (V)
!is
fi
1111E (soo) .
VIN REFERRED
I I I
5
EIIIlTER
OUTPUT
VIN =15V
=100.0
012345678
!
~
i-d
lit.
=1004
750
',- r--.
I I
R~EDr-
I- !!,t- t
OSCillator Frequency Change
with Temperature
-l-L 1
lOll
~
=e
1.3
GND REFERRED
JJ I
. v.. REFERRED
.... ..-
1111E (soo)
III
III
I I I
Kli
012345678
Current Limit Sense Voltage
vs Supply Voltage
1-10
I
I I I
I I I
I lilt.
75 100 125
Current Limit Response Time
for Various Over Drives
GND REFERRED
l
Q.4OB1.2I.62n
EIII11ER-COI.l.ECTR VOLTAGE (V)
I I I
I I I
~!
TEMPERATURE (oe)
ISO
o
Y,N REFERRED
IS
10
60
r-
10
COLWR OUTPUT
SWING = 15Vl
VIj = 15V
80
,I
I I
o
1.0
Current Limit Response Time
for Various Over Drives
IS
i---"
GND REFER/
120
.OJ!
Q&
COLLECTOII-EIIIlTER VOLTAGE (V)
160
!
-
2n
IS
Os
TEMPERATURE (oe)
1-10
= 15V
1,.0
......
-50
vlN
82,5
OSlU
m0S60
0.950
I II
B/~ ~
........
" ,.,.-" ...."
30
".
~ IDIO
Emltte~ Saturation Voltage
(Sourcing Current,
3.5 Collector at VIN)
LOWER Ullrr
0
25
so
75 lOll 125
TEIIPERATURE (oe)
Supply Current
-V~ = lov
.....;
so
-
OUTPUT ON
,.,,~
I I
-10
~ I:
!
18 ~
I-+-+-r.....,~+==-+-I
I--l-10.1-
OUTPUT ON
'-to,=O.IA I--
50
20
I I
10
o
-so
I--
OUTPUT OFT
-25
0
25
so
75 lOll 125
TEMPERATURE (oe)
SUPPLY VOLTAGE (V)
TL/H/10355-3
2-78
Test Circuitt
Definition of Terms
Parameter tests can be made using the test circuit shown.
Select the desired VIN, collector voltage and duty cycle with
adjustable power supplies. A digital volt meter with an input
resistance greater than 100 MO should be used to measure
the following:
Input Reference voltage to Ground; SI in either position.
Level Shift Accuracy (%) = Tp3(V)/1V) • 100%; SI at
11 = 12 = 1 mAo
Input current (mA) = (1V - Tp3(V»/l MO; SI at
11 = 12 = 0 mAo
Oscillator parameters can be measured at TP4 using a frequency counter or an oscilloscope.
The Current Limit Sense Voltage is measured by connecting
an adjustable O-to-1V floating power supply in series with
the current limit terminal and referring it to either the ground
or the VIN terminal. Set the duty cycle to 90% and monitor
test point T P5 while adjusting the floating power supply voltage until the LM2579's duty cycle just reaches 0%. This
voltage is the Current Limit Sense Voltage.
The Supply Current should be measured with the duty cycle
at 0% and SI in the 11 = 12 = 0 mA pOSition.
tLM2579 specifications are measured using automated test
equipment. This circuit is provided for the customer's convenience when checking parameters. Due to possible variations in testing conditions, the measured values from these
testing procedures may not match those of the factory.
Input Reference Voltage: The reference voltage referred
to ground, applied to either the inverting or non-inverting
inputs, which will cause the output to switch ON or OFF.
Input Reference Current: The current applied to either the
inverting or the non-inverting input which will cause the output to switch ON or OFF.
Input Level Shift Accuracy: If there are two equal resistors
sinking current from the inverting and non-inverting input
terminals, the Input Level Shift Accuracy is the ratio of the
voltage across the resistors to produce a given duty cycle at
the output.
Collector Saturation Voltage: With the inverting input terminal grounded through a 10 kO resistor and the output
transistor's emitter connected to ground, the Collector Saturation Voltage is the collector-to-emitter voltage for a given
collector current.
Emitter Saturation Voltage: With the inverting input terminal grounded through a 10 kO resistor and the output transistor~s collector connected to VIN, the Emitter Saturation
Voltage is the collector-to-emitter voltage for a given emitter
current.
Collector-Emitter Sustaining Voltage: The collector-emitter breakdown voltage of the output transistor, measured at
a specified current.
VIN
3.S TO 40V
VCOLLECTOR
5 TO 40V
o1
+15V
lN914
R7
lk
INPUT
REFERENCE R1
VOLTAGES 10k
O2
2W
lN914
RB
lOOk
Tplo-..J\J~---~.....----1
RIO
50k
LM3B5
1.2V
Tp2D--IV'tIIr.....- - - - I - - - - - I
R2
'10k
COLLECTOR
SWING
L - - - - - - - 4 - - - - D Tp5
R5
III
1%
Ru
lOOk
-<
Tp3o-..J\J~---..........- - 1 I - - - - - - - -.....
LII385
LEVEL SHIFT ACCURACY
2.4
AND INPUT CURRENT
RIB
2k
DUlY
CYCLE
SET
'90%=OV
75%=-O.45V
SO%=-O.9V
25%=-1.35V
0%=-2V
TL/H/l0355-4
Nota 1: Op amp supplies are + 15V.
Note 2: DVM Inpul resistance> 100 MO.
Note 3: 'LM2579 max duty cycle Is 90%.
2-77
....en r---------------------------------------------------------------------------------,
without having to use an external op amp for feedback poDefinition of Terms (Continued).
larity reversal (See TYPICAL APPLICATIONS). .
Current Limit Sense Voltage: The voltage at the current
:i Limit pin, referred to either the VIN terminal or the ground OSCILLATOR
II)
N
terminal, which (via logic circuitry) will cause the output tran~
sistor to turn OFF. The logic circuitry is reset at the beginning of each. oscillator cycle.
Current Limit Sense Current: The bias current for the Current limit terminal with the applied voltage equal to the Current Limit Sense Voltage.
The LM2579 provides an on-board oscillator Which can be
adjusted up to 100kHz. Its frequency is set by a single
external capacitor, C1, as shown in Figure 1, and ·follows the
equation
fose = 8 X 10-5/C1
The oscillator provides a blanking pulse to limit maximum
duty cycle to 90%, and a reset pulse to the internal Circuitry.
Supply Current: The IC power supply current, excluding
current drawn through the output transistor, with the oscillator operating.
OUTPUT TRANSISTOR
The output transistor is capable of delivering uP. t6 3A with a
saturation voltage of less than 0.75V (see Col/ector Saturation Voltage and Emitter Saturation Voltage curves).
Functional Description
The LM2579 is a pulse-width modulator designed for use as
a ·switching regulator controller. It may also be used in other
applications which require controlled pulse-width voltage
drive.
The emitter can be pulled below ground, as long as the total
voltage between the emitter pin and collector or supply pin
does not exceed 50V. This feature allows the LM2579 to be
used in an inverting regulator configuration without an additional output transistor which would normally be required to
protect the device from the negative output voltage.
A control signal, usually· representing output voltage, fed
into the LM2579's comparator is compared with an internally-generated reference. The resulting error signal and the
oscillator's output are fed to a logic network which determines when the output transistor will be turned ON or OFF.
The following is a brief description of the subsections of the
LM2579.
CURRENT LIMIT
The LM2579's current limit may be referenced to either the
ground or the VIN pin, and operates on a cycle-by-cycle
basis:
The current limit section consists of two comparators: one
with its non-inverting input referenced to a· voltage 115 mV
below VIN, the other with its inverting input referenced
115 mV above ground (see FUNCTIONAL DIAGRAM). The
current limit is activated whenever the current limit terminal
is pulled 115 mV away from either VIN or ground.
COMPARATOR INPUT STAGE
The LM2579's comparator input stage is unique in that both
the inverting and non-inverting inputs are available to the
user, and both contain a 1.0V reference. This is accomplished as follows: A 1.0V reference is fed into a modified
voltage follower circuit (see FUNCTIONAL DIAGRAM).
When both input pins are open, no current flows through R1
and R2. Thus, both inputs to the comparator will have the
potential of the 1.0V reference, VA. When one input, for
example the non-inverting input, is pulled /i V away from VA,
a current of /iV/R1 will flow through R1. This same current
flows through R2, and the comparator sees a total voltage.
of 2/iV between its inputs. The high gain of the system,
through feedback, will correct for this imbalance and return
both inputs to the 1.0V level.
Application Information
CIRCUIT BOARD LAYOUT
Because of fast switching of high output currents, the circuit
board layout should be carefully thought out. The comparator inputs are sensitive to noise, and should be kept away
from the high-energy switching signals. Feedback resistors
should be located near the input terminals. A single-point
ground should be used for the oscillator capacitor, device
ground, and feedback (when appropriate) to avoid ground
loops.
This unusual comparaior input stage increases circuit flexibility, while minimizing the totar number of external components required for a voltage regulator system. The inverting
switching regulator configuration, for example, can be set up
LEAD INDUCTANCE IMPACTS DIODE CHOICE
It is always important to use diodes deSigned for switching
applications. Schottky diodes generally provide superior
performance, although fast recovery diodes can also be
used. Fast recovery diodes differ from Schottky diodes in
their turn-on and turn-off characteristics, which can cause
voltage transients that will affect circuit operation.
The turn-off, or "recovery," time of a diode refers to the time
it takes for the charge that has been stored in the diode
during the forward conduction period to be depleted. During
this recovery period, the diode appears to be a short, causing a fast current pulse to flow through the switch. Since the
LM2579's output is capable of switching current at a rate of
approximately 30 AlIJ.$, and one Inch of 20-gauge wire has
approximately 30 nH of Inductance, a transient of nearly 1V
can be generated for every Inch of stray wire (V = L dlldt =
30 nH x 30 AlIJ.S = 0.9V). Since the LM2579's current limit
sense voltage Is 115 mV (typ.), transients like these can
l00mtmm~
-.;:-
.s
10
Ij
z
8
§
1.0
0.1
1
10
100
FREQUENCY (kHz)
TL/H/l0355-5
FIGURE 1. Value of Timing Capacitor
vs OSCillator Frequency
2-78
Application Information
(Continued)
greatly affect circuit operation. They can be minimized by
keeping all lead lengths short, thus reducing stray inductances. Additional methods of suppressing noise spikes and
switching transients are described in the Current Limit Transient Suppression section.
C. L. SENSE VOLTAGE MULTIPLICATION
When a larger sense resistor value is desired, a voltage
divider network may be used (see Figures 5, 6). This effectively multiplies the sense voltage by (1 + R1 IR2). Alternatively, R1 can be replaced by a diode to increase current
limit sense voltage to about 800 mV (diode Vd + 115 mY).
The turn-on time of the switching diode must also be considered. A slow turn-on can cause an increase in the voltage
across the output transistor, which is rated for 50V (maximum) in the LM2579). This condition can exist in all configurations.
(-)
2
50V
(+)
40V
.---tM-..... Your =
~
~ C.l.
:3
5
Rl
OSC GND
40V
R2
3
OV
+.L..____-+ time
TLlH/l0355-9
FIGURE 5. Current Limit Sense Voltage
Multiplication, Ground Referred
TL1H/10355-6
FIGURE 2. Transient Applied to Output Transistor
by Slow Turn-On of Diode
Referring to Figure 2, at t1 the transistor turns OFF; at t2,
the diode turns ON. This delay allows buildup of voltage
across the non-conducting diode, which is applied to the
transistor until the diode begins conducting.
R2
(-)~
CURRENT LIMIT
2
As noted in the functional description, the current limit terminal may be referred to either VIN or ground (see Figures 3,
4). The resistor RCL converts the current to be sensed into
a voltage for current limit detection.
~
(+)
:3
R1
C.L.
5
OSC GND
3
4
TLlH/l0355-10
FIGURE 6. Current Limit Sense Voltage
Multiplication, VIN Referred
2
CURRENT LIMIT TRANSIENT SUPPRESSION
(-)~
~ C.L.
(+)
:3
When noise spikes and switching transients interfere with
proper current limit operation, an RC low· pass filter can be
used to control the current limit circuitry's response time
(see Figures 7, 8).
5
OSC GND
RCl
4
3
TL/H/l0355-7
FIGURE 3. Current Limit, Ground Referred
(-)
RCL
VIN
2
8
VIN
C
7
(-) ~
2
(+)
~
~ C.L.
9
:3
ose
GND
3
4
~ C.L.
(+) :3
5
OSC GND
3
TLlH/l0355-11
4
FIGURE 7. Current Limit Transient Suppressor,
Ground Referred
TLlH/l0355-6
FIGURE 4. Current Limit, VIN Referred
2-79
•
~
C'I
::&
Application Information
(Continued)
VIN
-I
. 8
(-)
2
(-) ~
9
gJ C.L.
2
(+) :i
5
~
gJ C.L.
(+)
:i
E
CSC GND
3
7
C
C
5
Rd
4
CSC
E
GND
3
4
TL/H/l0355-12
FIGURE 8: Current Limit Transient
Suppressor, VIN Referred
Because the input current of the current limit terminal varies
according to its reference point, Rs should be less than
2 kn when referred to ground, and less than loon when
referred to VIN. Cs is typically 0.01 ",F.
TUH/l0355-14
FIGURE 10. Maximum Duty Cycle Limiting
DUTY CYCLE ADJUSTMENT
When manual or mechanical selection of the output transistor's duty cycle is needed, the circuit shown in Figure 11
may be used. The output will turn ON with the beginning of
each oscillator cycle, and turn OFF when the current sunk
by Ra1 and Ra2 from the non-inverting terminal becomes
greater than the current sunk from the inverting terminal.
UNDER-VOLTAGE LOCKOUT
Under-VOltage lockout requires few external components,
as shown in Figure 9. When Vllil becomes lower than the
zener breakdown voltage, the LM2579's output transistor is
turned OFF. This occurs because diode 01 will then become forward biased, allowing resistor RU to sink a greater
current from the non-inverting input than is sunk by the parallel combination of the feedback resistors, R1 and R2, at
the inverting terminal. RU should be one-fifth of the value of
Rl and R2 in parallel.
With the resistor values as shown, Ra2 can be used to adjust the duty cycle from 0% to 90%. When the sum of Ral
and Ra2 is twice the value of Rp, the duty cycle will be about
50%. Cl may be a large electrolytic capaCitor, to lower the
oscillator frequency below 1 Hz if appropriate for the application.
VIN
,...---+---..
VIN
VIN
Rl
C
(-) ~
gJ
C.L.
2
Z1
(+)
8
:i
E
C
7
5
Ra2
250k.Cl
7
9
Ra1
100 k.Cl
E
GND
5
4
TUH/l0355-13
01
= 1N457 or similar
TUH/l0355-15
FIGURE 9. Under-Voltage Lockout
FIGURE 11. Duty Cycle Adjustment
MAXIMUM DUTY CYCLE LIMITING
The maximum duty cycle can be externally limited by adjusting the charge-to-discharge ratio of the oscillator capacitor
with a single external resistor, as shown in Figure 10. Typical values are 50 ",A for the charge current, 450 /LA for the
discharge current and a voltage swing from 200 mV to
750 mY. Therefore, Rd is selected for the desired charging
and discharging slopes, and Cl is readjusted to set the oscillator frequency.
REMOTE SHUTDOWN
The LM2579 may be remotely shut down by sinking a greater current from the non-inverting input than from the inverting input. This may be accomplished by selecting resistor
Rs to be approximately one-half the value of the parallel
combination of Rl and R2 (see Figure 12). Shutdown will
occur when VL is high.
2-80
Application Information
(Continued)
YIN
8
Rl
YIN
C
(-)~
9
:!;l C.L.
(+) :i
5
2
R2
7
TLlH/l0355-1B
Ql
= 2N2222.
FIGURE 14. Collector· Emitter Saturation Prevented
by Darlington Construction of Output Stage
(Simplified Schematic)
2N3904
or similar
To achieve Collector-Emitter saturation. the base for the
LM2579 output transistor Q3 must be driven higher than its
Collector. This cannot happen if the Collector is tied to \lIN.
However. by increasing VIN to 1.5V or more above Ve. Collector-Emitter saturation can occur (see Figure 15). Techniques for accomplishing this are shown in the Typical Applications examples.
TUH/l0355-16
FIGURE 12. Remote Shutdown
SYNCHRONIZING DEVICES
When several devices are to be operated at once. their oscillators may be synchronized by the application of an external signal. as shown in Figure 13. This drive signal should
be a pulse waveform with a minimum pulse width of 2 /Ls.
and an amplitude of from 1.5V to 2.0V. The signal source
must be capable of both driving capacitive loads and delivering up to 500 /LA for each LM2579.
Capacitors C1 through Cn are to be selected for a 20%
slower frequency than the synchronizing frequency.
LN2579
LN2579
LN2579
TL/H/l0355-19
FIGURE 15. Increasing VIN Above Vc Allows
Coliector·Emitter Saturation
1.5V
~~J1Jl
ov _
21"0
(min.)
01
.:E
1 02
ADAPTING LM 1578 DESIGNS TO THE LM2579
On
All LM1578 designs may be adapted for use with the
LM2579 to achieve higher output power. The LM2579 is
based on the design of the LM1578 switching regulator controller. with a few modifications. The output switching transistor is capable of delivering 3A (peak or DC). compared to
the 0.75A maximum current rating of the LM1578. and the
Emitter output can swing more negative than the ground
terminal. Because of the difference in current rating. the
LM2579 is in the TO-220 style package so it may be easily
heat-sunk. Heat sinking is necessary for most LM2579 designs. especially those operating at high switch currents.
For example. the loss of 3W in the output switch of a converter operating at 35'C ambient would raise the die temperature near its maximum rating of 150'C if no heat sink were
used (see Note 3 in the Electrical Characteristics).
The other modification seen in the LM2579 is the 20 pF
capacitor that is used. in LM1578 applications. to inject an
end-of-cycle signal into the error comparator. improving
synchronization of the switching to the oscillator. It is not
necessary to add this capacitor in LM2579 applications.
o---;lI---_~-------I
All dlod.. are lN914 or similar
TL/H/l0355-17
FIGURE 13. Synchronizing Devices
IMPROVING TRANSISTOR SATURATION
The efficiency of a switching regulator is highest when the
power transistor is allowed to fully saturate. minimizing the
Collector-Emitter voltage when the transistor is ON. When
the Collector is used as the output. with the Emitter grounded. the output transistor will fully saturate. Saturation voltage depends on the load current (see Collector Saturation
Voltage curve). and is normally under 0.8V. over temperature.
.
However. when the Emitter is used as the output (Collector
tied to VIN. as in Figure 14). the output transistor cannot
fully saturate because of the Darlington configuration of the
output stage. This results in a 1.7V drop (typically) across
the power device Q3 during the conduction period (refer to
Emitter Saturation Voltage curve).
Typical Applications
The LM2579 can be used in all standard configurations
which require a single switching transistor. These include
the buck (or step-down). boost (or step-up). invert. flyback.
and forward styles.
2-81
Typical Applications (Continued)
Output ripple voltage is about 40 mVpp when the output
filter capacitor, C2, is a standard 1000 poF electrolytic. ReplaCing this capacitor with a 1500 poF "low ESR" (equivalent
series reSistance) capacitor reduces the ripple to 20 mVpp.
The minimum value of this capacitor can be determined by
the following equation
C2 ~ Vo (VIN - Vol I (8 VIN VRIPPLE L fosc 2)
Several design examples follow which include a variety of
techniques to improve regulator performance.
Inductors having the standard values shown in the nomograph of Figure 17 are available from Pulse Engineering
(San Diego, CA);· AlE Magnetics; division of Vernatron (St.
Petersburg, FL); and Renco Electronics (Deer Park, NY).
BUCK REGULATOR
where VRIPPLE is the desired maximum output voltage ripple
in peak-to-peak Volts. The ripple will be greater than predicted by this equation due to effects of ESR in C2.
In the buck regulator of Rgure 16, a 28V input is converted
to 5V, with a load of up to 2.5A. Efficiency at maximum load
is approximately 80%, and load regulation is approximately
0.05%/A in the range 0.3A ,;; ILOAD ,;; 2.5A. Switching frequency has been set to 40 kHz by the choice of 2 nF for Cl
(see Figure 1).
Figure 16 illustrates the single-point grounding and supply
bypassing necessary for this type of moderate-to-high current switching regulator. For best regulation, all high-current
paths, including ground, must be kept low-resistance.
The value of the inductor, L, is determined by the use of the
Inductance Calculator (Figure 17). or by the equation
-Note: When pin 5, the Emitter of the LM2579 output transistor, is used to drive the output filter, it may oscillate when
driven into positive saturation and when loaded with capacitance of between 100 pF and 500 pF. This capacitance is
usually caused by socket capacitance, input capacitance of
external components (such as the Schottky diode), and
stray capaCitance in the layout. The oscillation, which is usually near 30 MHz, can be eliminated by adding a series RC
of 4.7n to Ion and 1 nF from the Emitter (pin 5) to Ground.
L = Vo (VIN - Vol I (1l1L VIN fosel
where IlIL is the current ripple through the inductor. IlIL is
usually chosen based on the minimum load current expected of the circuit: For the Buck regulator, since IL = ILOAD,
IlIL is twice the minimum load current value IlIL = 350 mA
for this circuit, so operation will become discontinuous at
(1lIL(min)/2)(100%/IL(max» = 7% of the maximum load current. (This is the "% Discontinuity" referred to in the Inductance Calculator.)
In the Emitter-driven configurations, the Collector output
(pin 7) is normally tied to VIN (pin 8). If this connection uses
long lead lengths (greater than 3" total), the Collector
should be bypassed to VIN with 0.01 poF (or greater), attached directly to the terminals. In addition, when current
limiting is used, connections to the Current Limit pin (pin 9)
should be made with short leads. Use of these techniques
to minimize lead inductance will also minimize switching
transients, thus reducing conducted noise.
At this minimum value, the inductor current will just reach
zero at the end of every switching periop. Below the "minimum," the inductor will "run dry" and the regulator will be
"discontinuous," as the inductor current is zero for part of
each cycle. In this mode, the inductor is no longer storing
energy, so is not an effective part of the output filter. Regulation will continue but performance will be degraded.
28V
(Input)
33 rnD.
8
Rl
39k
VIN
(-)
(+)
~
:!l
3
C
C.L.
E
7
9
300!,H
5
5V
+
R2
10k
(output)
C2
1000 !,F
TUH/10355-20
FIGURE 16. Buck Converter: 28V to SVat 2.SA
-Refer to Note in text.
2-82
~
'0
(i"
HOW TO USE THIS CHART
I
:::>
,~
\)ll
\)ll~.\)~~
\).
~
,.
~~~~~~~~~~~~-~~~~~~~~
:z
!!:l
a
0"
:J
tn
15
'"g-c:
CD
~~~~~m~~~~IA~----~2~--~~~~.5~~~.8~I~A~----~2~--~~~~5~~~8~1~0~~~A~----~2~~'~
.s
1L,IIAXDc (AMPS)_
CD
'"
®FROM
IL,IIAX DC
PROCEED
VERTICALLY
TO
1
E-TOp FROM
®
®READ
INDUCTANCE
VALUE AT
E-TOp FOR
'L,MAX DC
.l.
® READ INDUCTANCE
VALUE AT E-TOp
FOR I L.IIAX DC
FOR 20% DISCONTINUnY: I L,IIAX DC (AMPS)-
©
NATIONAL SEMICONDUCTOR CORP. 1988
TUH/l0355·21
FIGURE 17. DC/DC Inductance Calculator
6lS~W'
Typical Applications (Continued)
BOOST REGULATOR
The boost converter of Figure 18 produces 15V at up to
BOO mA from a 5V Input, with B2% efficiency. The output
ripple (with an BOO mA load) is 100 mV when a standard
1000 ""F electrolytic output capacitor is used, or 75 mV if a
1500 ""F low-ESR electrolytic is used. The minimum value
of C2 may be calculated using the same equation as shown
In the BUCK REGULATOR section.
The inductor value is selected either using the Inductance
Calculator (Figu/'fJ 17), or by the equation
L = VIN 2 (Vo - VIN) I (all Vo2 fosc)
where, as in the previous section, all is determined by minimum'expected DC inductor current. For.the boost regulator,
INVERTING REGULATOR
The Inverting regulator of Flgu/'fJ 19 converts a 15V Input to
-15Vat 1A. The load regulation is about 30 mViA for the
range 0.1A ,,; IlOAD ,,; 1.0A.
The inductor value is determined either by the Inductance
Calculator (Figu/'fJ 17), or by the equation
L = vIN21voII [all (VIN + IvoI)2 foscl
where all is based on minimum DC inductor current, and
may be calculated as follows:
all = 2 IlOAD(mln) (VIN + IVol) I VIN
The output voltage ripple (at full load) is approximately
120 mVpp when C2 is a 1000 ""F standard electrolytic capaCitor, or 60 mVpp when a 1500 ""F low-ESR capacitor is
used. The minimum value of C2 may be calculated using the
equation shown in the BUCK REGULATOR section.
The efficiency of this regulator is approximately 76%. To
achieve higher efficiency, the circuit may be modified (as
shown in Figu/'fJ 20) to Increase the supply voltage to the
LM2579, which reduces the saturation voltage of the output
transistor.
all = 2IlOAD(mln) (VoIVIN)
Load regulation for this circuit is approximately 0.04%/A in
the range 50 mA ,,; IlOAD ,,; BOO mAo Line regulation is
4 mVIV for the input range 4.5V ,,; VIN ,,; B.5V.
Stability of the circuit is improved with the use of a series
R-C network from the Current Limit pin to the Inverting Input.
5V
(Input)
Rl
140k
-b
f:[
220 P
-- ,
-
2
150k
~ 300pH
8
VIN
_ '"
( ) \(i
(+)
:3
7
C
C.L.
i ...."
~
5
3
4
Cl :
2nF
=
2;;ri~
(output)
+
0-
:: r= c2
OSC GND
R2
10k
15V
.....
lN5821
10OOpF
electrolytlc
33 rnjl
--
FIGURE 18. Boost Converter: 5V to 15V at 800 mA
2-B4
TL/H/10355-22
Typical Applications (Continued)
+15Y
(Input)
100P~+
1:.
-
-
8
YIN
1
2
Rl
25k t
t
. R2
10k
-
lQ C.L
(+)
IR31DQQ04
(3A,40Y
Schottky)
9
:3
E
OSC GND
3 4
24k
50k
7
C(-)~
5
~
"))
"......
u".
) 300 pH"
2~:
-15Y
(output)
~
"'""
+ 1000pF
low ESR
33 m.o.
CIT"
2nF
-==
-
TLlH/l0355-23
tOutpul voltage trim
·Winrwound resistor may be used here
"See text
FIGURE 19. Inverting Regulator:
To improve circuit stability, a series R-C network is added
from the Current Limit pin to the Inverting Input. In addition,
an R-C damper may be required from the Emitter to Ground,
as described in the BUCK REGULATOR section Note.
+ 15V to -15V at 1A
··Note: The additional winding La shown in Figure 20 is
used to create a flyback effect which provides an extra 3V
to the LM2579 supply Voltage. In this example, the inductor
L was 46 turns of 20-gauge wire on an Arnold 4F-068200-2
toroid core, providing 300 ",H; booster winding La was 20
turns of '" 28 wire on the same core.
Regulator efficiency will be increased to about 86% with the
boosted supply voltage, as this allows the saturation voltage
of the output transistor to decrease to about 0.55V (from the
typical Emitter saturation voltage of 1.7V).
+15Y
(Input)
•
-15Y
(output)
33mll
Feedback
~ Is 1N4148 or similar
TL/H/l0355-24
FIGURE 20. Optional Modification to Inverting Regulator of Figure 19 for Increased Efficiency
2-85
C) r-------------------------------------------------------------------------------~
~::&
~National
.... ~ Semiconductor
LM78S40
Universal Switching Regulator Subsystem
General Description
Features
The LM78S40 is a monolithic regulator subsystem consistIng of all the active building blocks necessary for switching
regulator systems. The device consists of a temperature
compensated voltage reference, a duty-cycle controllable
oscillator with an active current limit circuit, an error amplifier, high current, high voltage output switch, a power diode
and an uncommitted operational amplifier. The device can
drive external NPN or PNP transistors when currents in excess of 1.SA or voltages In excess of 40V are required. The
device can be used for step-down, step-up or inverting
switching regulators as well as for series pass regulators. It
features wide supply voltage range, low standby power disSipation, high efficiency and low drift. It Is useful for any
stand-alone, low part count switching system and works extremely well in battery operated systems.
• Step-up, step~own or inverting switching regulators
• Output adjustable from 1.2SV to 40V
• Peak currents to 1.SA without external transistors
II Operation from 2;SV to 40V input
.• Low standby current drain
.• 80 dB line and load regulation
• High gain, high current, independent op amp
• Pulse width modulation with no double pulsing
Block and Connection Diagrams
·COMPARATOR
+IN
COMPARATOR
-IN
TIMING
CAPACITOR
DRIVER
SWITCH
COLLECTOR COLLECTOR
16-LeadDIP
1
CA~C:
18
=A= 2
3
4
Of AljP OUT
Of AljP
SIIPPlY
OP AljP -IN
REFERENCE
D1
REFERENCE
VOLTAGE
OP AMP
-IN
OP AMP
+IN
OP AMP
SUPPLY
OP AMP
OUT
----n--
SWITCH
EMITTER
DIODE
DIODE
ANODE CATHODE
TLlHfl0057-2
7
VOLTAGE
@o~R
14
1,. SENSt
13
VI
12
lIMING CAPACITOR
11
eND
10
COMPARAtoR -IN
9
COMPARAtoR +IN
TLfHfl0057-1
",
TopVlew
Ordering Information
Device
Code
LM78S40J
LM78S40N
LM78S40CJ
LM78S40CN
2-86
=CTOR
15
Package Package
Code Description
J16A
N16A
J16A
N16A
Ceramic DIP
Molded DIP
Ceramic DIP
Molded DIP
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage -Temperature Range
Ceramic DIP
-65·Cto + 175·C
- 65·C to + 150·C
Molded DIP
Operating Temperature Range
Extended (LM78S40J)
- 55·C to + 125·C
-40·Cto + 125·C
Industrial (LM78S40N)
Commercial (LM78S40CN)
O·Cto +70·C
Lead Temperature
Ceramic DIP (Soldering, 60 sec.)
300·C
265·C
Molded DIP (Soldering, 10 sec.)
Internal Power Dissipation (Notes 1, 2)
16L-Ceramic DIP
1.50W
16L-Molded DIP
1.04W
Input Voltage from V+ to V40V
Input Voltage from V+ Op Amp to V40V
Common Mode Input Range
. (Error Amplifier and Op Amp)
Differential Input Voltage
(Note 3)
Output Short Circuit
Duration (Op Amp)
Current from VREF
voltage from Switch
Collectors to GND
Voltage from Switch
Emitters to GND
Voltage from Switch
Collectors to Emitter
Voltage from Power Diode to GND
Reverse Power Diode Voltage
Current through Power Switch
Current through Power Diode
ESD Susceptibility
-0.3toV+
±30V
Continuous
10mA
40V
40V
40V
40V
40V
1.5A
1.5A
(to be determined)
LM78S40
Electrical Characteristics
TA
= Operating temperature range, VI = 5.0V, VOp Amp = 5.0V, unless otherwise specified
Symbol
I
Parameter
GENERAL CHARACTERISTICS
Icc
Icc
Supply Current
(Op Amp Disconnected)
Supply Current
(Op Amp COnnected)
I
Conditions
=
=
VI =
VI =
I Min I Typ I Max I Units
VI
5.0V
1.8
3.5
mA
VI
40V
2.3
5.0
mA
5.0V
4.0
mA
40V
5.5
mA
1.245
1.310
V
REFERENCE SECTION
= 1.0 mA
Extend -55·C < TA < + 125·C,
CommO < TA < +70·C,
Indus -40·C < TA < +85·C
Reference Voltage
(Note 4)
IREF
VR LINE
Reference Voltage
Line Regulation
VI = 3.0V to VI = 40V,
IREF = 1.0 mA, TA = 25·C
0.04
0.2
mVIV
VRLOAO
Reference Voltage
Load Regulation
IREF = 1.0 mA to IREF
TA = 25·C
0.2
0.5
mV/mA
VREF
1.180
= 10 mA,
OSCILLATOR SECTION
ICHG
Charging Current
ICHG
Charging Current
IOISCHG
Discharge Current
IOISCHG
Discharge Current
VOSC
Oscillator Voltage Swing
ton/loll
Ratio of Chargel
Discharge Time
VI
5.0V, TA = 25·C
20
50
/LA
VI
=
=
VI =
VI =
VI =
= 25·C
5.0V, TA = 25·C
40V, TA = 25·C
5.0V, TA = 25·C
20
70
/LA
150
250
/LA
150
350
/LA
40V, TA
2-87
0.5
V
6.0
/Lsi /Ls
•
LM78S40
Electrical Characteristics (Continued)
TA = OPE!rating Temperature Range, VI = 5.0V, VOp Amp = 5.0V, unless otherwise specified
Parameter
Symbol I
Conditions
I
I
Min
ITypl
Max
I Unite
I
250
I
350
I mV
CURRENT LIMIT SECTION
I Current Limit Sense Voltage
VCLS
OUTPUT SWITCH SECTION
VSAT1
Output Saturation Voltage 1
VSAT2
Output Saturation Voltage 2
hFE
Output Transistor Current Gain
IL
Output Leakage Current
= 25'C
ITA
= 1.0A (Figure 1)
= 1.0A (Figure 2)
Ic = 1.0A, VCE = 5.0V, TA = 25'C
Vo = 40V, TA = 25'C
I
Isw
1.1
1.3
V
Isw
0.45
0.7
V
70
10
nA
POWER DIODE
VFO
Forward Voltage Drop
Diode Leakage Current
lOR
COMPARATOR
VIO
Input Offset Voltage
liB
Input Bias Current
110
Input Offset Current
VCM
PSRR
Common Mode Voltage Range
Power Supply Rejection Ratio
10
= 1.0A
= 40V, TA = 25'C
1.25
1.5
V
Vo
10
VCM
= VREF
= VREF
VCM = VREF
TA = 25'C
VI = 3.0V to 40V, TA = 25'C
1.5
15
mV
VCM
35
200
nA
5.0
75
nA
0
70
nA
V1-2
96
V
dB
OUTPUT OPERATIONAL AMPLIFIER
VIO
Input Offset Voltage
liB
Input Bias Current
110
Input Offset Current
Avs+
Voltage Galn+
Avs-
Voltage Gain-
VCM
CMR
Common Mode Voltage Range
Common Mode Rejection
PSRR
Power Supply Rejection Ratio
10+
Output Source Current
10-
Output Sink Current
SR
Slew Rate
VOL
Output Voltage LOW
VOH
Output Voltage High
= 2.5V
= 2.5V
VCM = 2.5V
RL = 2.0 kO to GND;
Vo = 1.0Vt02.5V, TA = 25'C
RL = 2.0 kO to V+ (Op Amp)
Vo = 1.0V to 2.5V, TA = 25'C
TA = 25'C
VCM = OVt03.0V, TA = 25'C
V+ OpAmp = 3.0Vt040V, TA = 25'C
TA = 25'C
TA = 25'C
TA = 25'C
IL = -5.0 mA, TA = 25'C
IL = 50 mA, TA = 25'C
VCM
4.0
15
mV
VCM
30
200
nA
5.0
75
nA
25
250
VlmV
25
250
VlmV
Vcc- 2
0
V
76
100
76
100
dB
75
150
mA
10
dB
35
mA
0.6
V//Jos
1.0
V+Op
Amp - 3V
V
V
1: TJ Max = 15O"C for the Molded DIP. and 175"C for the Ceramic DIP.
Ratings apply to ambient temperature at 25'C. Above this temperature, derate the 16l-Ceramic DIP at 10 mW/'C. and the 16l·Molded DIP at 8.3 mW/'C.
Nota 3: For supply voltages less than 30V, the absolute maximum voltage is equal to the supply voltaga.
Nota 4: Selected devices with tightened tolerance reference voltage available.
Note
Nota 2:
2·88
Typical Performance Characteristics
Reference Voltage vs
Junction Temperature
Capacitance vs OFF Time
470
VI = 5.0V
I- TA =25OC
'aI
47
...uz
~
u
if
cj 4.7
/
/
I
V
1.220
1.218
>1.216
/
VI =5.0V
\
~1.214
r- I -
!:jl.212
~1.210
-
-
rzll.208
~1.206
~1.204
1.202
1.200
-75 -so -25 0
0.47
1.0
\
10
100
1000
25 50 75 100 125
JUNCTION TEMPERATURE - OC
OFF TIME-po
TL/H/l00S7-7
TL/H/l00S7-6
Discharge Current vs
Input Voltage
250
,
_TA=25OC
./
...i5
...
400
/
I- TA=25OC
1-I
'"
'"
i3
Current Limit Sense
Voltage vs Input Voltage
/
'EI
V
350
I:
'"
:::l
200
,/
is
I
I-
300
--
I-
'"
'"
i3
150
250
200
0
10
40
20
30
INPUT VOLTAGE - V
0
50
10
20
30
40
50
INPUT VOLTAGE-V
TLlH/l00S7-6
TLlH/l00S7-9
Design Formulas
CharacteristIc
Step-Down
Step-Up
ton
Vo+ Vo
Vo + Vo - VI
Ivol + Vo
toff
VI- VSAT - Vo
VI- VSAT
VI- VSAT
(ton + toff)
Max
1
-fMln
CT
4 X 10- 5 ton
IPk
2 lOMax
-
Inverting
1
-1
fMin
o Max
.ton+toff
toff
,...8
fMIN
4 X 10- 5 t on
21
UnIts
4 X 10- 5 ton
21
OMax
• ton + 10ff
--toff
,...F
A
LMln
(VI- VSAT- Vo)
I
ton Max
pk
(VI- VSAT)
I
ton Max
pk
(VI- VSAT)
I
ton Max
pk
,...H
RSC
O.3311 pk
O.3311 pk
0.33/1 pk
n
Co
IPk (ton + toff)
::::~·ton
,...F
8 Vripple
10
: : : : - - . ton
Vripple
Note: VSAT = Saturation voltage of lhe switching element.
Vo = Forward voltage of lhe fJyback diode.
2-89
Vripple
Typical Applications
Functional Description
The LM7BS40 is a variable frequency, variable duty cycle
device. The initial switching frequency is set by the timing
capacitor (Note 1). The initial duty cycle is 6:1. This switching frequency and duty cycle can be modified by two machanism&-the current limit circuitry (Ipk sense> and the comparator.
The comparator modifies the OFF time. When the output
voltage is correct, the comparator output is in the HIGH
state and has no effect on the circuit operation. If the output
voltage is too high then the comparator output goes LOW.
In the LOW state the comparator inhibits the tum-on of the
output stage switching transistors. As long as the comparator is LOW the system is in OFF time. As the output current
rises the OFF time decreases. As the output current nears
its maximum the OFF time approaches its minimum value.
The comparator can inhibit several ON cycles, one ON cycle or any portion of an ON cycle. Once the ON cycle has
begun the comparator cannot inhibit until the beginning of
the next ON cycle.
The current limit modifies the ON time. The current limit is
activated when a 300 mV potential appears between lead
13 (Vcc) and lead 14 (Ipk). This potential is intended to result when designed for peak current flows through Rsc.
When the peak current is reached the current limit is turned
on. The current limit circuitry provides for a quick end to ON
time and the immediate start of OFF time.
Generally the oscillator is free running but the current limit
action tends to reset the timing cycle.
Increasing load results in more current limited ON time and
less OFF time. The switching frequency increases with load
current
VFO is the forward voltage drop across the internal power
diode. It is listed on the data sheet as 1.25V typical, 1.5V
maximum. If an external diode Is used, then Its own forward
voltage drop must be used for VFO.
VSAT is the voltage across the switch element (output transistors 01 and 02) when the switch is closed or ON. This is
listed on the data sheet as output saturation voltage.
Output saturation voltage 1-defined as the switching element voltage for 02 and 01 in the Darlington configuration
with coliectors tied together. This applies to Figure 1, the
step down mode.
Output saturation voltage 2-switching element voltage for
01 only when used as a transistor switch. This applies to
F/{/ure 2, the step up mode.
For the inverting mode, F/{/ure 3, the saturation voltage of
the external transistor should be used for VSAT.
VI
2SV
RSC
0.33.0
-------
Vo
10V
L
300~H
R2
l2kD.
10.1)'F
R1
8SkD.
TUH/l0057-3
FIGURE 1. Typical Step-Down Operational
Performance (TA = 2S0C)
CharacterisHe
Typical
Value
Output Voltage
10
= 200mA
10V
Une Regulation
20V:os: VI:OS: 30V
1.5mV
Load Regulation
5.0mA:os: 10
10:OS: 300mA
3.0mV
Max Output Current
Vo
500mA
Output Ripple
10
50mV
Efficiency
Note 1: OSCIllator frequency Is set by a single external capSCltor and may be
varied over a range 01 100 Hz to 100 kHz.
Condition
Standby Current
= 9.5V
= 200mA
10 = 200mA
10 = 200mA
74%
2.BmA
Note A: For 10 ;, 200 rnA use external diode to limit on-chip power dissipa·
tlon.
Note B: It is recommended Ihallhe Intemal reference (lead 8) be bypassed
by 8 0.1 ,..F capacitor directly to Oead II) the ground point of the LM78S40.
2-90
Typical Applications (Continued)
L
RSC
300~H
0.334
VI
12V
Rsc
0.334
D2
nDl
Vo
25V
Rl
230kn.
112kA
25 k4
TL/H/10057-4
Vo
-15V
Co
1
200 J'F
FIGURE 2. Typical Step-Up Operational
Performance (TA = 25"C)
TLfHf10057-5
FIGURE 3. Typical Inversion Operational
Performance (TA = 25'C)
Characteristic
Condition
Typical
Value
Condition
Typical
Value
25V
Output Voltage
10 = 100mA
-15V
4.0mV
Line Regulation
8.0V ~ VI ~ 18V
5.0mV
Load Regulation
S.OmA ~ 10
10 ~ 150mA
3.0mV
160mA
Max Output Current
Vo = 14.2SV
160mA
10 = 50mA
30mV
Output Ripple
10=100mA
20mV
10 = 50mA
79%
Efficiency
10 = 100mA
70%
10 = 50mA
2.6mA
Standby Current
10 = 100mA
2.3mA
Output Voltage
10=50mA
Line Regulation
5.0V
Load Regulation
5.0mA ~ 10
10 ~ 100mA
2.0mV
Max Output Current
Vo = 23.75V
Output Ripple
Efficiency
Standby Current
Characteristic
~
VI
~
15V
2-91
II
Typical Applications (Continued)
loopH
FREQ: '20 kHz
30V IN
-t:-----....----....;;W;;;.....-4~ii=4~O;:".,
+
;'oopF ,
1804
0.004 pF
IIBR4030
.----+--~~
SHOTlKY
Dl
----W-8.2 kA
0.02pF
30kA
;
1.0pF
0.005pF
TLlHI10057-10
FIGURE 4. Pulse Width Modulator
2-92
~National
~ Semiconductor
LMC7660 Switched Capacitor Voltage Converter
General Description
Features
The LMC7660 is a CMOS voltage converter capable of converting a positive voltage in the range of + 1.5V to + 10V to
the corresponding negative voltage of -1.5V to -10V. The
LMC7660 is a pin-for-pin replacement for the industry-standard 7660. The converter features: operation over full temperature and voltage range without need for an external diode, low quiescent current, and high power effiCiency.
• Operation over full temperature and voltage
range without an external diode
• Low supply current, 200 /-LA max
• Pin-for-pin replacement for the 7660
• Wide operating range 1.5V to 10V
• 97% Voltage Conversion Efficiency
• 95% Power Conversion Efficiency
• Easy to use, only 2 external components
• Extended temperature range
The LMC7660 uses its built-in oscillator to switch 4 power
MOS switches and charge two inexpensive electrolytic capacitors.
Block Diagram
TL/H/9136-1
Pin Configuration
Ordering Information
LMC7660MJ - 55·C ~ TA ~
LMC7660
N/C08v+
Cap+ 2
Gnd 3
Cap· 4
LMC7660lN -40"C
7 Ose
6 LV
5 Vout
TL/H/9136-2
2-93
~
TA
~
+ 125·C
+85·C
I
Absolute Maximum Ratings (Note 1)
..
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
OHlce/Dlstrlbutora for availability and specifications.
Supply VoHage
10.5V
Input Voltage on Pin 6, 7
(Note 2)
-0.3V to (V+ + 0.3V)
forV+ < 5.5V
(V+ - 5.5V) to (V+ + 0.3V)
forV+ > 5.5V
20p.A
Current into Pin 6 (Note 2)
Output Short Circuit Duration
(V+ S; 5.5V)
Continuous
Package
Power Dissipation
(Note 3)
Tj
(Note 3)
8ja (Note 3)
Storage Temp. Range
Lead Temp.
(Soldering, 5 sec)
ESD Tolerance (Note 8}
J.
0.9W
Max
N
1.4W
150"C
140"C/W
- 65'C
260"C
S;
T
S;
150'C
90'C/W
15.O"C
' 260'C
±2000V
,.
Electrical Characteristics (Note 4)
,
Symbol
Parameter
Conditions
Is
Supply Current
RL
V+H
Supply VoHage
Range High (Note 7)
V+L
Supply Voltage
Range Low
Output Source
Resistance
Rout
Typ
= 00
LMC7660MJ
Tested
Limit
(Note 5)
LMC7660lN
Tested
Design
Umlt
Limit
(NoteS)
(Note 6)
Units
Limits
120
200
400
200
400
p.A
max
RL = 10 k{}, Pin 6 Open
Voltage Efficiency ~ 90%
3to 10
3to 10
3to 10
3to 10
V
RI.: = 10 k{}, Pin 6 to ~nd.
Voltage Efficiency ~ 90%'
1.5to 3.5
1.5 to 3.S
1.5t03.5
1.5 to 3.5
V
100
120
200
300
IL
= 20mA
55
V = 2V, IL = 3 mA
Pin 6 Short to Gnd.
Fosc
Oscillator
Frequency
Pelf
Power Efficiency
RL
= 5k{}
VoeH
Voltage Conversion
Efficiency
RL
= 00
110
100
150
200
300
10
97
99.9
{}
max
{}
max
kHz
95
90
95
90
'%
min
97
95
97 ..
95
%
min
Pin 7 = Gnd.orV+
Oscillator Sink or
3
p.A
Source Current.
Note 1: Absolute Maximum raUngs Indicate limits beyond which damage to the device may occur. Dc 'and AC electrical specifications do not apply when operating
the device beyond Its rated operating conditions. See Note 4 for conditions.
Note 2: Connecting any Input terminal to Yoltages greater than V+or less than ground may cause destructive latchup. It Is recommended that no Inputs from
aour088 operating from external supplies be applied prior to "power·up" of the LMC7660.
Note 3: For operation at elevated temperature, these devices must be derated based on a thermal resistance of 8)8 and TJ max, TJ = TA + 8J8 Po.
Note 4: 801c1face numbers apply at temperature extremes. All other numbers apply at TA = 2S'C, V+ = 5V, CoSo' = 0, and apply for the LMC7660 unless
oth8!WIae apecHIed. Test elrcu~ Is shown in FIf1IJf9 1.
Note S: Guaranteed and 100% production tested.
Note 8: Guaranteed over the operating temperature range (but not 100% tested). These limits are not used to calculate outgOing quality levels.
Note 7: The LMC7660 can operate ~ an external diode oyer the lull temperature and Yoltage range. The LMC7660 can also be used with the external diode
Ox, when replacing previous 7660 designs.
Note 8: The test clrcuft consists of the human body model of 100 pF In series wHh ISoo0.
lose
2·94
8
N/C
2
Lt.lC7660
+_ Vou\
L...._ _ _ _ _
C,
(-5.)
r~10J.lF
TL/H/9136-5
FIGURE 1. LMC7660 Test Circuit
Typical Performance Characteristics
osc Freq. vs OSC
Capacitance
105
3 Vout
vs lout@ V+ = 2V
Vout vs lout
5
@ V+ =
5V
·
··
••
1
1
--
1
l- i""'"'
~
-,..
20
r--. ....
V
V
V
o I'
[/'
"
V
V ~'1
"
1
1
8
6
4
V
~
!:(
2
~
!
0
0123456789
g
t;
!
I!i
~
~~
~
~
1/
.I
!
.I
~
20
30
40
6,
2DO
150
!:>
100
~
50
25
15
~
'"~
.....
'"
TEMPERAlIJRE (CC)
v+=5V
lout=20mA
0
25
50
75
100 125
@
V+ = 5V
~11out=~
96
94
92
90
88
86
84
'1111111111
Cp=C,= IO l'f
HIIII
B2
TA =25CC
80
10
o
.1"';-
r-
Pelf VS OSC Freq.
Ili
75 100 125
~
.....
l°OrTTTTTmr-IIIIT"""llrTllrmlllllrii--rII-rITT
1111""'1
98
GROUND
50
I-
TEMPERAlIJRE (CC)
LV OPEN
LVTO~
0
50
-50 -25
60
~
6
-50 -25
60
v+=2Y
o
g
"- ........
50
250
~
~
Output R vs Supply Voltage
I--
40
300
LOAD CURRENT (mA)
8
30
Output Source Resistance as a
Function of Temperature
~
0
10
2D
350
~ E-'"
I
/
/
o/
o
1106
90
80
70
!:(
60
50
40
30
20
10
103
0
10
LOAD ClJRRENT (mA)
.......
Unloaded Oscillator Frequency
as a Function of Temperature
2D
~
."....
i-'""""'
o
Supply Current & Power Efficiency
vs Load Current (V+ = 5Vl
100
90
80
70
60
50
40
30
20
10
LOAD ClJRROO (mA)
2
/
.L
LOAD CURRENT (mA)
Supply Current & Power Efficiency
vs Load Current (V+ = 2V)
100
90
80
70
60
50
40
30
20
10
-5
-2
0123456,78
1~
102
c... (pF)
10
1
-2
-3
-4
..... ~
12345678
SUPPLY VOLTAGE
(V")
102
103
1~
OSCIlLATOR FREQUENCY (Hz)
TL/H/9136-4
2-95
C)
CD
CD
~
~
r---------------------------------------------------------------------------------,
CIRCUIT DESCRIPTION
The LMC7660 closely approaches 1 and 2 above. By using
a large pump capacitor Cp, the charge removed while supplying the reservoir capacitor is small compared to Cp's total
charge. Small removed charge means small changes in the
pump capacitor voltage, and thus small energy loss and
high efficiency. The energy loss by Cp is:
E = YzCp (V12 - V22)
The LMC7660 contains four large CMOS switches which
are switched in a sequence to provide supply inversion You!
= - Yin. Energy transfer and storage are provided by two
inexpensive electrolytic capacitors. Figure 2 shows how the
LMC7660 can be used to generate -V+ from V+. When
switches 81 and 83 are closed, Cp charges to the supply
voltage V+. During this time interval, switches 82 and S4
are open. After Cp charges to V+, 81 and S3.are opened,
52 and 84 are then closed. By connecting 82 to ground, Cp
develops a voltage -V+ 12 on Cr. After a number of cycles
Cr will be pumped to exactly -V+. This transfer will be
exact assuming no load on Cr, and no loss in the switches.
In the circuit of Figure 2, 81 is a P-channel device and 82,
53, and 54 are N-channel devices. Because the output is
biased below ground, it is important that the p- wells of 53
and 54 never become forward biased with respect to either
their sources or drains. A substrate logic circuit guarantees
that these p- wells are always held at the proper. voltage.
Under .all conditions 54 p- well must be at the lowest potential in the circuit. To switch off 54, a level translator generates VGS4 = OV, and this is accomplished by biasing the
level translator from the 84 p- well.
By using a large reservoir capacitor, the output ripple can be
reduced to an acceptable level. For example, if the load
current is 5 mA and the accepted ripple is 200 mV, then the
reservoir capaCitor can omit approximately be calculated
from:
dv
Is = Crift
-
CrX ~
4/Fosc
0.5mA .
Cr = 0.5V1ms = 10 p.F
PRECAUTIONS
1) Do not exceed the maximum supply voltage or junction
temperature.
2) Do not short pin 6 (LV terminal) to ground for supply voltages greater than 3.5V.
3) Do not short circuit the output to V+.
An internal RC oscillator and + 2 circuit provide timing signals to the level translator. The built-In regulator biases the
oscillator and divider to reduce power diSSipation on high
supply voltage. The regulator becomes active at about V +
= 6.5V. Low voltage operation can be improved if the LV
pin Is shorted to ground for V+ :s;; 3.5V. For V+ ;;: 3.5V, the
LV pin must be left open to prevent damage to the part.
4) External electrolytiC capacitors Cr and Cp should have
their polarities connected as shown In Figure 1.
REPLACING PREVIOUS 7660 DESIGNS
To prevent destructive latchup, previous 7660 designs require a diode in series with the output when operated at
elevated temperature or supply voltage. Although this prevented the latchup problem of these deSigns, it lowered the
available output voltage and Increased the output series resistance.
The National LMC7660 has been designed to solve the inherent latch problem. The LCM7660 can operate over the
POWER EFFICIENCY AND RIPPLE
It is theoretically possible to approach 100% efficiency if the
following conditions are met:
1) The drive circuitry consumes little power.
2) The. power switches are matched and have low Ron.
3) The impedance of the reservoir and pump capacitors are
negligibly small at the pumping frequency.
y+ (pin 8) 51/
(pin 2) 52/
o---- 7V, the output stays in regulation up to IL = 25
mAo The error flag on pin 5 of the LP2951 sets low when the
regulated output at pin 4 drops by about 5%. The LP2951
can be shutdown by taking pin 3 high; the LMC7660 can be
shutdown by shorting pin 7 and pin 8.
The LP2951 can be reconfigured to an adjustable type regulator, which means the LMC7660 can give a regulated output from - 2.0V to -10V dependent on the resistor ratios
Rl and R2, as shown in Figure 12, Vref = 1.235V:
Thermometer Spans 180·C
Using the combined negative and positive multiplier of Rgure 10 with an LM35 it is possible to make a ",Power thermometer that spans a 1eo·c temperature range. The LM35
temperature sensor has an output sensitivity of 10 mVrC,
while drawing only 50 ",A of quiescent current. In order for
the LM35 to measure negative temperatures, a pull down to
a negative voltage is required. Figure 10 shows a thermometer circuit for measuring temperatures from - 55·C to
+ 125·C and requiring only two 1.5V cells. End of battery life
can be extended by replacing the up converter diodes with
Schottky's.
You! = Vref (1
Regulating - YOU!
It is possible to regulate the output of the LMC7660 and still
maintain ",Power performance. This is done by enclosing
v*
D
+
:~)
*
+
:!:l.
1.5V
!.5V
47k
V*
D
Vout
1---=::---4I-OUTPUT= tOmvjOC
-55OC to + 1250C
"'For lower Yoltage operation, use Schottky rectifiers
TL/H/9136-15
FIGURE 10. ",Power Thermometer Spans 1800C, and Pulis Only 150 ",A
2-100
Typical Applications (Continued)
+V1n 6V
to 25V
8
7
LMC7660
LP2951
3
330k
6
Error
5
4
Output
Regulated
-You!
TL/H/9136-16
FIGURE 11. Regulated -5V with 200 p.A Standby Current
+Vln 6V
to 25V
2
LMC7660
3
LP2951
6
330k
4
5
Error
___.f~--""-'-";~
___.f:.....t-""'-output
R2
Vout
Vref
= V,et (1
= 1.235V
+~)
Rl
TUH/9136-17
'Low voltage operation
FIGURE 12. LMC7660 and LP2951 Make a Negative Adjustable Regulator
2·101
Section 3
Operational Amplifiers
•
Section 3 Contents
Operational Amplifiers Definition of Terms ............................................ .
Operational Amplifiers Selection Guide ............................................... .
LF147 ILF347ILF347B Wide Bandwidth Quad JFET Input Operational Amplifiers .......... .
LF155/LF156/LF157 Series Monolithic JFET Input Operational Amplifiers ......•..........
LF351 Wide Bandwidth JFET Input Operational Amplifier ............................... .
LF353 Wide Bandwidth Dual JFET Input Operational Amplifier ..•....•....................
LF400A/LF400 Fast Settling JFET Input Operational Amplifier .........................•.
LF401A/LF401 Precision Fast Settling JFET Input Operational Amplifier .................. .
LF411A/LF411 Low Offset, Low DriftJFET Input Operational Amplifier ..............••....
LF412A1LF412 Low Offset, Low Drift Dual JFET Operational Amplifier ................... .
LF441 A/LF441 Low Power JFET Input Operational Amplifier ............................ .
LF442A1LF442 Dual Low Power JFET Input Operational Amplifier .......................•
LF444A/LF444 Quad Low Power JFET Input Operational Amplifier ..•.....•..............
LF451 Wide-Bandwidth JFET Input Operational Amplifier ............................... .
LF453 Wide-Bandwidth Dual JFET Input Operational Amplifier .................•.........
LF13741 Monolithic JFET Input Operational Amplifier .................................. .
LH0003/LH0003C Wide Bandwidth Operational Amplifier ...............................•
LH0004/LH0004C High Voltage Operational Amplifier .....•..•........•...•...•.........
LH0020/LH0020C High Gain Operational Amplifier .................................... .
LH0021/LH0021 C 1.0-Amp Power Operational Amplifier ................•...............
LH0041/LH0041 C 0.2-Amp Power Operational Amplifier ............................... .
LH0022/LH0022C High Performance FET Operational Amplifier ......................... .
LH0042/LH0042C Low Cost FET Operational Amplifier ...........................•.....
LH0052/LH0052C Precision FET Operational Amplifier ................................. .
LH0024/LH0024C High Slew Rate Operational Amplifier ............................... .
___ 1 - - LH0032/LH0032A1LH0032C/LH0032AC Ultra Fast FET-Input Operational Amplifier ....... .
LH0044 Series Precision Low Noise Operational Amplifiers ............................•.
LH0045/LH0045C Two Wire Transmitter ............................................. .
LH0061 ILH0061 C 0.5 Amp Wide Band Operational Amplifier ...•...•......•••...........
LH0062/LH0062C High Speed FET Operational Amplifier .............................. .
LH0082 Optical Communication Receiverl Amplifier ...............•.....•..••...........
LH0086/LH0086C Digitally-Programmable-Gain Amplifier .............................. .
LH01 01/LH01 01 C/LH01 01 AlLH01 01 AC Power Operational Amplifier ................... .
LH21 01 AlLH2201 AlLH2301 A Dual High Performance Operational Amplifiers .............•
LH21 08/LH21 08A1LH2308/LH2308A Dual Super Beta Operational Amplifiers .•...•.......
LH41 01/LH41 01 C Wide band High Current Operational Amplifier ........................•
LH41 04/LH41 04C Fast Settling High Current Operational Amplifier ....•..•.•.•...........
LH41 05 Precision Fast Settling High Current Operational Amplifier ....................•..•
LH41 06/LH41 06C ± 5V High Speed Operational Amplifier .............................. .
LH4117/LH4117C Precision RF Amplifier ................................••...........
LH4118/LH4118A1LH4118C Low Gain Wide Band RF Amplifier ......................... .
LH4124C High Slew Rate Operational Amplifier ....................................... .
LH4141 C 0.2-Amp Power Operational Amplifier ....................................... .
LH4161A1LH4161/LH4161C High Speed Operational Amplifier .............. ~ .......... .
LH4162A1LH4162/LH4162C Dual High Speed Operational Amplifier ..................... .
LH4200 General Purpose GaAs FET Amplifier ......................................... .
LM1 0/LM1 OB(L)/LM1 OC(L) Operational Amplifier and Voltage Reference ................ .
LM11 ILM11 C/LM11 CL Operational Amplifiers ........................................ .
3-2
3-5
3-6
3-15
3-24
3-39
3-47
3-56
3-67
3-76
3-83
3-90
3-97
3-106
3-113
3-119
3-126
3-138
3-141
3-145
3-148
3-148
3-156
3-156
3-156
3-168
3-172
3-179
3-187
3-199
3-202
3-211
3-225
3-232
3-243
3-246
3-249
3-254
3-260
3-266
3-271
3-277
3-287
3-291
3-298
3-304
3-312
3-319
3-335
Section 3 Contents (Continued)
LM12(L/C/CL) 150W Operational Amplifier ..................................•.........
LM101A/LM201A1LM301A Operational Amplifiers .................................... .
LM107lLM207/LM307 Operational Amplifiers ........................................ .
LM108/LM208/LM308 Operational Amplifiers ........................................ .
LM108A/LM208A1LM308A Operational Amplifiers .................................... .
LM112/LM212/LM312 Operational Amplifiers ........................................ .
LM118/LM218/LM318 Operational Amplifiers ........................................ .
LM124/LM224/LM324/LM 124A1LM224A1LM324A1LM2902 Low Power Quad Operational
Amplifiers ...................................................................... .
LM143/LM343 High Voltage Operational Amplifier ..................................... .
LM144/LM344 High Voltage, High Slew Rate Operational Amplifiers ..................... .
LM146/LM246/LM346 Programmable Quad Operational Amplifiers ...................... .
LM148/LM248/LM348 Quad 741 Operational Amplifiers; LM149/LM249/LM349 Wide Band
Decompensated (Av(MIN) = 5) ................................................... .
LM158/LM258/LM358/LM158A1LM258A1LM358A, LM2904 Low Power Dual Operational
Amplifiers ...................................................................... .
LM392/LM2924 Low Power Operational Amplifier/Voltage Comparators ................. .
LM359 Dual, High Speed, Programmable Current Mode (Norton) Amplifier ................ .
LM604A1LM604 4-Channel MUX-Amp ............................................... .
LM607 ILM607A/LM607B Precision Operational Amplifier .............................. .
LM611 Adjustable Micropower Floating Voltage Reference and Single-Supply Operational
Amplifier ....................................................................... .
LM613A/LM613 Dual Operational Amplifiers, Dual Comparators, and Adjustable Reference.
LM614A1LM614 Quad Operational Amplifier and Adjustable Reference .................. .
LM627/LM637 Precision Operational Amplifiers .........................•..............
LM675 Power Operational Amplifier .................................................. .
LM725/LM725A/LM725C Operational Amplifiers ...................................... .
LM741 ILM741 AlLM7 41 C/LM741 E Operational Amplifier ..•............................
LM759 Power Operational Amplifier .................................................. .
LM776 Multi-Purpose Programmable Operational Amplifier ............................. .
LM833 Dual Audio Operational Amplifier ...............•.......•...•......•............
LM837 Low Noise Quad Operational Amplifier ......................................... .
LM1558/LM1458 Dual Operational Amplifier .............•....•........................
LM2900/LM3900/LM3301/LM3401 Quad Amplifiers ............•......................
LM3080/LM3080A Operational Transconductance Amplifier ............................ .
LM3303/LM3403/LM3503 Quad Operational Amplifier .............•.....•....•.........
LM4136 Quad Operational Amplifier ...............................................•..
LM4250/LM4250C Programmable Operational Amplifier .....•..........................
LM6118/LM6218A/LM6218 Fast Settling Dual Operational Amplifier .............•........
LM6161/LM6261/LM6361 High Speed Operational Amplifiers .......................... .
LM6164/LM6264/LM6364 High Speed Operational Amplifiers ......................•....
LM6165/LM6265/LM6365 High Speed Operational Amplifiers .......................... .
LM6313 High Speed, High Power Operational Amplifier ................................. .
LM 13080 Programmable Power Operational Amplifier .................................. .
LM 13600/LM1360OA Dual Operational Transconductance Amplifier with Linearizing Diodes
and Buffers ..................................................................... .
LM13700/LM1370OA Dual Operational Transconductance Amplifier with Linearizing Diodes
and Buffers ..................................................................... .
LMC660AM/LMC660AIILMC660C CMOS Quad Operational Amplifiers .................. .
LMC662AM/LMC662AIILMC662C CMOS Dual Operational Amplifiers ................... .
LMC669 Auto Zero ................................................................ .
LP124/LP2902/LP324 Micropower Quad Operational Amplifiers ........................ .
3-3
3-348
3-361
3-371
3-377
3-384
3-390
3-395
3-405
3-418
3-428
3-435
3-447
3-460
3-473
3-477
3-495
3-508
3-516
3-528
3-544
3-557
3-566
3-573
3-581
3-584
3-595
3-604
3-613
3-619
3-621
3-639
3-643
3-651
3-659
3-666
3-675
3-682
3-689
3-696
3-705
3-713
3-731
3-751
3-759
3-768
3-782
•
Section 3 Contents (Continued)
LPC660AM/LPC660AI/LPC6601 CMOS Quad Operational Amplifier. . . . . . . . • • . • . . • . . . . . • .
LPC662AM/LPC662AI/LPC6621 CMOS Dual Operational Amplifier.. ... . .. .. . . . .•. . .. . . •.
OP-07 Low Offset, Low Drift Operational Amplifier . . . . . . . . . . . . . . . . . . . . . . . . • . . . • . . . • • . . ..
TL081 CP Wide Bandwidth JFET Input Operational Amplifier ...............•••..••.......
TL082CP Wide Bandwidth Dual JFET Input Operational Amplifier ............ ; . . . . . . • . . • ..
3·4
3-789
3-796
3-803
3-809
3-816
o
'0
~National
CD
a
o·
~ Semiconductor
::I
!!!.
~
Operational Amplifiers
Definition' of Terms
3
-g
=:
CD
T
c
large-Signal Voltage Gain: The ratio of the output voltage
swing to the change In Input voltage required to drive the
output from zero to this voltage.
Output Impedance: The ratio of output voltage to output
current under the stated conditions for source resistance
(Rs) and load resistance (Au.
Output Resistance: The small signal resistance seen at the
output with the output voltage near zero.
Bandwidth: That frequency at which the voltage gain is reduced to 1/./2 times the low frequency value.
Common-Mode Rejection Ratio: The ratio of the input
common-mode voltage range to the peak-to-peak change in
input offset voltage over this range.
Harmonic Distortion: That percentage of harmonic distor-,
tion being defined as one-hundred times the ratio" of the
root-mean-square (rms) sum of the harmonics to the fundamental. % "harmonic distortion =
!!I.
S·
::;:
o·
::I
2.
';;}
...3
UJ
Output Voltage Swing: The peak output voltage swing, referred to zero, that can be obtained without Clipping.
Offset Voltage Temperature Drift: The average drift rate
of offset voltage for a thermal variation from room temperature to the indicated temperature extreme.
Power Supply ReJection: The ratio of the change in input
offset voltage to the change in power supply voltages producing it.
Settling Time: The time between the initiation of the input
step function and the time when the output voltage has settled to within a specified error band of the final output voltage.
Slew Rate: The internally-limited rate of change in output
voltage with a large-amplitude step function applied to the
input.
Supply Current: The current required from the power supply to operate the amplifier with no load and the output midway between the supplies.
Transient Response: The closed-loop step-function response of the amplifier under small-signal conditions.
(v22 + V3 2 + V42 + .. .)1/2 (100%)
V1
where V1 is the rms amplitude of the fundamental and V2,
V3, V4, ... are the rms amplitudes of the individual harmonics.
Input Bias Current: The average of the two input currents.
Input Common-Mode Voltage Range (or Input Voltage
Range): The range of voltages on the input terminals for
which the amplifier is operational. Note that the specifications are not guaranteed over the full common-mode voltage range unless specifically stated.
Input Impedance: The ratio of input voltage to input current
under the stated conditions for source resistance (Rs) and
load resistance (Ru.
Input Offset Current: The difference in the currents into
the two inPut terminals when the output is at zero.
Input Offset Voltage: That voltage which must be applied
between the input terminals through two equal resistances
, to obtain zero output voltage.
Unity Gain Bandwidth: The frequency range from dc to the
frequency where the amplifier open loop gain rolls off to
one.
Voltage Gain: The ratio of output voltage to input voltage
under the stated conditions for source resistance (Rs) and
load resistance (Ru.
Input Resistance: The ratio of the change in input voltage
to the change in input current on either input with the other
grounded.
3-5
•
II)
CP
"tJ
·s
CJ
~NatiOnal
Semiconductor
c
o
n
"
,~
CP
Cii
General Purpose Operational
Amplifier Selection Guide
...
U)
CP
:E
1i
E
c(
"iii
c
o
E
:;:;
Part #
CP
Co
Vos
mV(Max)
18
nA("IIax)
GBW
MHz,(Typ)
Slew
Rate
VII'S (Typ)
o
Military Temperature Range (-SSOC to
Supply
Current
(Note 3)
mA(Max)
Supply
Voltage
Min
V
+ 12S0C) Specs at TA =
Special
Features
Max
V'
2SoC (Note 1)
LH0044A
0.025
15
0.4
O.OS
3
,±2
±20,
Low Noise
LMS07A .
0.025
.2
1.8
0.7
1.5
±3
±18
Improved OP-07
LH0044
0.05"
30
0.4
O.OS
4
±2
±20
Low Noise
LMS07B
O.OS
3
1.8
.0.7
1.5
±3
±18
Improved OP-07
LM11
0.3
0.8
0.3
O.S
±2.5
±20
LF411A
0.5
0.2
4
15
2.8
±S
±22
LF441 A
0.5
0.05
1
1
0.2
±S
±22
LH2108A
0.5
2
1
0.3
1.2
±2
±20
LM108A
0.5
2
1
0.3
0.4
±2.
±20
LH0052
0.5
0.003
1
3
3.5
±5
±22
LF412A
1
0.2
4
15
5.S
±S
±22
Dual
LF442A
1
0.05
1
±S
±22
Dual
LH0004 "
1
100
10
.
0.4
0.15
±5
±45
LMS04A
1
40
7
2
8
4
3S
LH'21 01 A
2
75
1
0.5
5
±3
±22
LF155A
2
0.05
2.5
5
4
±5
±22
LF15SA
2
0.05
5
12
7
,±5
±22
LF157A
2
0.05
25
50
7
±5
±22
LF411
2
0.2
4
15
3.4
±S
±18
LMCSSOA
2
0.02
1.5
1.7
2.2
5
15
LM10
2
20
0.09
0.1
0.4
±O.S
±22.5
3
±3
±22
0.05 .
1
Dual LM108A
Multiplexed Op Amp
Dual LM101A
Minimum Gain of 5
Quad CMOS
Op Amp
LM101A
2
75
1
0.5
LM107
2
75
1
0.5
3
±3
±22
LM108
2
2
1
0.3
0.4
±2
±20
LM112
2
2
1
0.2
O.S
±2
±20
LM124A
2
50
1
0.5
3
3
32
Quad
LM158A
2
50
1
0.5
1.2
3
32
Dual
LP124
2
4
0.1
0.13
3
32
Quad
2.5
250
.
0.05
•
5
±5
±22
LF412
3
0.2
4
15
S.8
±6
±18
LM741 A
3
80
1.5
0.7
2.8
±3
±22
LH0020
3·S
+ Reference
Compensated LM101A
Compensated LM108
Dual
General Purpose Operational Amplifier Selection Guide (Continued)
Part #
GBW
la
nA(Max)
vos
mV(Max)
MHz (Typ)
Slew
Rate
V/,.,.s(TYP)
Military Temperature Range (-SS'C to
Supply
Current
(Note 3)
mA(Max)
Supply
Voltage
Min
V
+ 12S'C) Specs atTA =
Special
Features
Max
V
2S'C (continued)
LH0022
4
0.01
1
3
2.5
±5
±22
LF155
5
0.1
2.5
5
4
±5
±22
LF156
5
0.1
5
12
7
±5
±22
LF157
5
0.1
20
50
7
±5
±22
Minimum Gain of 5
LF147
5
0.2
4
13
11
±6
±22
Quad
LF442
5
0.1
1
1
0.5
±6
±18
Dual
LF444A
5
0.1
1
1
0.80
±6
±22
Quad
LH0086
5
0.5
3
10
15.5
±8
±18
Programmable Gain OA
LM124
5
150
1
0.5
3
3
32
LM143
5
20
1
2.5
4
±4
±40
LM144
5
20
1
2.5
4
±4
±40
Minimum Gain of 10
LM146
5
100.
1.2
0.4
2
±1.5
±22
(Note 5)
LM148
5
100
1
0.5
3.6
±5
±22
Quad
LM149
5
100
4
2
3.6
±5
±22
LM158
5
150
1
0.5
1.2
3
32
Dual
LM192
5
150
1
0.5
2
3
32
Comparator
±22
Quad
Minimum Gain of 5, Quad
+ Op Amp
LM741
5
500
1
0.5
5
500
.
2.8
LM1558
.
±3
5
±3
±22
Dual
LM4250
5
50
0.2
0.2
0.1
±1
±18
(Note 5)
LH0042
20
0.025
1
3
3.5
±5
±22
Vos
mV(Max)
la
nA(Max)
GBW
LM604
3
60
7
3
9
4
36
Multiplexed Op Amp
LMC660A
3
0.02
1.4
1.1
2.2
5
15
Quad CMOS
LMC662A
3
0.02
1.4
1.1
1.3
5
15
Dual CMOS
LP2902
4
20
0.1
0.05
0.15
3
26
Quad
LM2902
7
250
1
0.5
3
3
26
Quad
LM2904
7
250
1
0.5
2
3
26
Dual
LM2924
7
250
26
Comparator
Part #
MHz (Typ)
Slew
Rate
VI,.,.s (Typ)
Supply
Current
(Note 3)
mA(Max)
Automotive Temperature Range (- 40"C to
1
0.5
3·7
2
Supply
Voltage
Min
V
Special
Features
Max
V
+ 8S'C)
3
+ Op Amp
~
"CI
·s
General Purpose Operational Amplifier Selection Guide (Continued)
CJ
c
o
:g
. GBW
3
~
::;;
...eniii"
+ 70'C) (Notes 1 and 2)
CD
6
±8
±22
Autozero Block
iii
0.7
.
1.5
±3
±18
Improved OP-07
0"
6
±8
±22
Autozero Block
1.8
0.7
1.5
±3
±18
Improved OP-07
10
1.8
0.7
1.8
±3
±18
Improved OP-07
0.5
0.2
4
15
2.8
±6
±22
0.5
0.05
1
1
0.2
±6
±22
LM308A
0.5
7
1
0.3
0.8
±2
±20
LMI1C
0.6
0.1
0.8
0.3
0.8
±2.5
±20
LF412A
1
0.2
4
15
5.6
±6
±22
Dual
LF442A
1
0.05
1
1
0.4
±6
±22
Dual
LM604A
1
40
C5/)
3
9
4
36
LF355A
2
0.05
2.5
5
4
±5
±22
LF356A
2
0.05
5
12
10
±5
±22
LF357A
2
0.05
20
50
10
±5
±22
LF411
2
0.2
4-:\
15
3.4
±6
±22
LF412
3
0.2
4)
15
6.8
±6
±22
Dual
LM324A
3
100
1
0.5
3
3
32
Quad
LM358A
3
100
1
0.5
2
3
32
Dual
LM604
3
60
(5-·)
7
9
4
36
Multiplexed Op Amp
LM741E
3
80
1.5
0.7
2.8
±3
±22
LM10C(L)
4
30
0.09
0.1
0.5
0.1
0.05
0.15
3
32
13
11
±6
±22
5
4
±5
±22
-"
(Note 4)
LP324
4
10
LF347B
5
0.2
LF355B
5
0.1
LF356B
5
0.1
5
12
4
±5
±22
LF357B
5
0.1
20
50
7
±5
±22
LF441
5
0.1
1
1
0.25
±6
±22
LF442
5
0.1
1
1
0.5
±6
±22
LM11CL
5
0.2
0.8
0.3
0.8
±2.5
±20
LF451
5
0.2
(4,\
13
3.4
10
32
/4")
2.5
:::l
C)
C
c::
CD
UI
Multiplexed Op Amp
Minimum Gain of 5
Op Amp
+ Reference
Quad
•
Dual
SOPkg
LF453
5
0.2
\ 4 )
13
6.5
10
32
SOPkg Dual
LM611
5
35
1.4
0.7
0.3
3
36
OpAmp
LM613
5
35
0.8
0.7
1
3
36
20pAmps +
2 Comparators
3-9
2-
+ Ref
+ Ref
~
'C
"5
General Purpose Operational Amplifier Selection Guide (Continued)
C!'
c
o
t;
CI)
G)
...
Vos
mV(Max)
Part #
UJ
18
GBW
nA(Max)
MHz (Typ)
Slew
Rate
VI/Ls (Typ)
CI)
=
a.
Supply
Current
(Note 3)
mA(Max)
Commercial Temperature Range (O'C to
Supply
Voltage
Min
V
Max
V
+ 70'C) (Notes 1 and 2)
E
011(
LM614
5
fti
c
LM392
5
LM833
5
LMC660
6
0.002
LMC662
6
0.002
1.4
1.1
1.6
LM346
6
250
0.5
0.4
2.5
LM348
6
200
1
0.5
4.5
±5
±18
LM349
6
200
4
2
4.5
±5
±18
LM741C
6
500
1.5
2.8
±3
±18
LM1458
6
500
.
0.5
•
5.6
±3
±18
LM4250C
6
75
0.2
0.2
0.1
±1
±18
LM324
7
250
1
0.5
3
3
32
o
~
Q.
o
CI)
LM358
/.00
[
Special
Features
0.8
0.7
250
1
0.5
2
3
32
1000
10
5
8
±5
±18
1.4
1.1
2.7
5
15
Quad CMOS
5
15
Dual CMOS
±1.5
±22
35
1
3
36
7
250
1
0.5
2
3
32
LM301A
7.5
250
1
0.5
3
±3
±18
LM307
7.5
250
1
0.5
3
±3
±18
Quad Op Amp
+ Ref
Dual Low Noise
(Note 5)
(Note 5)
Compensated LM301A
LM308
7.5
7
1
0.3
0.8
±2
±18
LM312
7.5
7
1
0.2
0.8
±2
±18
LM343
8
40
1
2.5
5
±4
±34
LM344
8
40
1
2.5
5
±4
±34
Minimum Gain of 10
Quad
LF347 fl.C
10
0.2
( 4')
13
11
±6
±18
LF351
f'.,\C
10
0.2
4
13
3.4
±6
±18
LF353
r-c.
10
·iti·'
0.2
4
13
6.8
±6
±18
LF355
10
0.2
2.5
5
4
±5
±18
LF356
10
0.2
5
12
10
±5
±18
Compensated LM308
Dual
LF357
10
0.2
20
50
10
±5
±18
Minimum Gain of 5
LF444
10
0.1
(1)
1
1
±6
±-18
Quad
LF13741
15
0.2
1
0.5
4
•
±18
TL081C
15
0.2
4
13
2.8
±6
±18
5.6
±6
±18
TL082C
15
0.2
4
13
Dual
'Not Specified.
Nole 1: Datasheet should be referred to for test conditions and more detailed information.
Nole 2: Those looking for a commercial part should also look at the Industrial Temp Range guide as many Hybrids are listed there.
Note 3: Supply current Is for all amplifiers In a package.
Note 4: The LM10 has 2 versions: one a high voltage part, good 10 45V and a low voltage part, good 10 7V. Refer to Ihe datasheel for more information.
Note 5: The LM146 and LM4250 are programmable amplifiers. The data shown is for Vs = ± 15V and ISET = 10 "A Refer 10 Ihe datasheels for more Information.
3-10
_NatiOnal
Semiconductor
Low IBIAS Selection Guide
S:5pA
I
S:20 pA
I
S:50 pA
I
s: 100 pA
I
S:200pA
I
S:500 pA
I
s:
1 nA
TA = 25°C
-LHOO22
LMC668
LHOO32A
LHOO32
LF401A
LH4101
LMC660
LF155A1156A1
LF155/156/
LF401
LHOO32C
LMC662
LF157A
LHOO22C
LF355A1356A1
LF157
LF255/256/
LHOO52
LHOO42
LHOO52C
LHOO42C
LF441 A
LF355B/356B/
LHOO62
LHOO62C
LF442A
LF357B
LF357A
LF257
LF400A
._-
LF400
TL081
LH4004
LHOO32AC
LF351
LF444A
LF441
LF411A1411
LM11
LF442
LF355/356/
LF444
LF357
LM11C
LF147/347B/347
LF353
LH0101
LF412A1412
LHOO86
LF13741
LHOO86C
LM11CL
LHOO84
LHOO84C
LH4104
LH4104C
LH4105
LH4105C
LH4117
LH4117C
Note: Datasheet should be referred to for conditions and more detailed information.
3-11
•
IJNatiOnal
Semiconductor
High Speed Operational
Amplifier Selection Guide
Part #
Slew Rate
Vlp.s (Typ)
GBW
MHz (Typ)
Vos
mV(Max)
Is
mA(Max)
(Note 1)
Notes
GBW:2! 4 MHz, TA = 25'C
LH4117
2500
400
20
±45
LH4118A
2400
300
2
±25
Low Vos, Current Feedback
LH4004
600
200
15
±40
FET Input, Current Feedback
LH0024
500
70
4
±15
LH0032
500
70
5
±20
LH4124
400
70
8
±15
Low Cost LH0024
LH4161A
300
50
1
±6.5
Trimmed LM6161
LH4162A
300
50
2
±13
Dual LH4161A
LM6161
300
50
7
6.8
Unity Gain Stable, VIPTM
LM6164
300
175
4
6.8
Min Gain of 5, VIP
LM6165
300
725
3
6.8
Min Gain of 25, VIP
LH41 01
250
40
15
±40
Medium Power JFET
LH41 06
170
34
20
±20
Drives 50n Loads
LM6313
250
35
20
23
Hi Speed Hi Power
LM6218
140
17
3
7
LF400
70
16
0.5
12
Fast Settling JFET
LF401
70
16
0.2
12
Precision Fast Settling JFET
LHOO03
70
30
3
±3
LH0062
70
15
5
±8
LM118
70
15
4
7
LF157
50
20
2
7
LH41 04
40
18
10
±25
Medium Power Fast Settling JFET
LH41 05
40
18
2
Trimmed LH41 04
LM359
30
30
.
±25
22
Dual Current Mode (Norton) Amp
LF411
15
4
0.5
2.8
JFET
LF412
15
4
1.0
5.6
DualJFET
LF147
13
4
5
11
QuadJFET
LF451
13
4
5
3.4
SOPkg
LF453
13
4
5
6.5
SO Pkg Dual
LF351
13
4
10
3.4
JFET
LF353
13.
4
10
6.8
LF156
12
4.5
2
7
JFET
LM833
7
15
5
8
Dual Low Noise
'Not specified.
Note 1: Supply current is for all amplifiers In a package.
3-12
FET Input, Current Feedback
FETlnput
Fast Settling Dual, VIP
FET Input
Min Gain of 5, JFET
DualJFET
o
'0
CD
IJNatiOnal
Semiconductor
i0"
::s
~
»
3
Medium and· High Power Operational Amplifier
Selection Guide (> 0.1 A Output)
(TA = 25°C, Note 1)
'2;
:::;:
(ii"
....
en
CD
Cii
,.
2,.
0"
::s
PBW(Typ)
10
±25
40
600 kHz
0.1
15
±40
250
8MHz
0.1
2
±25
40
600 kHz
A(Typ)
Vos
mV(Max)
LH41 04
0.1
LH4101
LH41 05
Part #
G)
mA(Max)
Slew Rate
V/",S(Typ)
lOUT
Is
LH4118
0.1
2
±25
2400
55 MHz
LH0041
0.2
3
±3.5
3
20 kHz
LH4141
0.2
6
±4
3
20 kHz
LH4117
0.2
20
±45
2500
40 MHz
LH0061
0.6
4
±10
70
1 MHz
LH0021
1.2
3
±3.5
3
20 kHz
LH0101A
2.2
3
±35
10
300 kHz
LH0101
.2.2
10
±35
10
300 kHz
LM675
3
10
50
8
•
LM12(L)
(Note 2)
7
80
9
60 kHz
LM12C(L)
(Note 2)
15
120
9
60 kHz
'Not Specified
Note 1: Refer to Datasheet for conditions and more detailed information.
Note 2: lOUT for the LM12 is dependent on the amount of power dissipated in the output transistor. The datasheet should be referred to. to determine amount of
current available.
3-13
c
c:
CD
(II
~NatiOnal
Semiconductor
Special Amplifier Selection Guide
Amplifiers with Added Functions
Featuring the new Super-Block™ family, these amplifiers have additional special functions within their packages which help
minimize the number of components required in an application. These devices are often used in control circuits, power supplies,
and automatic test systems.
LH0045
Two-Wire Transmitter
LM10
Op Amp and Adjustable Voltage Reference
LM392
Op Amp and Comparator.
LM604
Super-Block Multiplexed Op Amp (4 Inputs, 1 Output)
LM611
Super-Block Op Amp and Adjustable Voltage Reference
LM613
Super-Block Dual Op Amp, Dual Comparator, and Adjustable Voltage Reference
LM614
Super-Block Quad Op Amp and Adjustable Voltage Reference
Transconductance Amplifiers (Voltage In, Current Out)
These amplifiers provide a transconductance (gm) proportional to their bias current, which is controlled externally. This programmable gain makes the amplifiers useful in applications such as voltage-controlled amplifiers, current-controlled amplifiers, AGC
circuits, and voltage multipliers.
LM3080
Operational Transconductance Amplifier
LM13600
Dual Operational Transconductance Amplifier
. with Linearizing Diodes and Buffers
LM13700
Improved Dual Operational Transconductance
Amplifier with Linearizing Diodes and Buffers
Transimpedance Amplifiers (Current In, Voltage Out)
Transimpedance amplifiers are widely used to amplify photo-diode signals, and to ground-reference differential voltage signals
which have high common-mode voltages. The LH0082 was deSigned to receive and amplify analog and digital signals transmitted by fiber optics. Like the LM359, the LH0082 can also be used as a video amplifier. The LM2900 series has found popularity
in filter applications, as well as general-purpose amplifiers.
LH0082
20 MHz Transimpedance AmplifierIComparator
LM359
Dual Current Mode (Norton) Amplifier
LM2900
LM3900
LM3301
LM3401
Quad Current Mode (Norton) Amplifier
I
3-14
r-----------------------------------------------------------------------~
.....
""......
.....
r
~National
~ Semiconductor
~
BI.FET IITM Technology
LF147/LF347/LF347B Wide Bandwidth
Quad JFET Input Operational Amplifiers
General Description
Features
The LF147 is a low cost, high speed quad jFET input operational amplifier with an internally trimmed input offset voltage (BI-FET IITM technology). The device requires a low
supply current and yet maintains a large gain bandwidth
product and a iast slew rate. In addition, well matched high
voltage JFET input devices provide very low input bias and
offset currents. The LF147 is pin compatible with tlie standard LM14B. This feature allows designers to immediately
upgrade the overall performance of existing LF14B and
LM124 designs.
•
•
•
•
•
•
•
•
The LF147 may be used in applications such as high speed
integrators, fast 01 A converters, sample-and-hold circuits
and many other circuits requiring low input offset voltage,
low input bias current, high input impedance, high slew rate
and wide bandwidth. The device has low noise and offset
voltage drift.
Simplified Sc~ematic
w
""......!XI
Connection Diagram
Dual-In-Line Package
0----"",------""--",,
VD
INTERNALLY
TRIMMED
INTERN~LLY
TRIMMED
-VEE
----<.....-----<.....---'
_ TUH15647-1
C>--...
TLIH15647-13
TopView·
Order Number LF147D, LF347D, LF147J, LF347BJ,
LF347J, LF347M, LF347WM, LF347BN or LF347N
See NS Package Number D14E, J14A, M14A,
M14BorN14A
3-15
""......
.....
r
."
5 mV max
Internally trimmed offset voltage
50 pA
Low input bias current
0.01 pAl.tHz
Low input noise current
4 MHz
Wide gain bandwidth
13 V//Ls
High slew rate
7.2 mA
Low supply current
10120.
High input impedance
<0.02%
Low total harmonic distortion Av = 10,
RL =10k, Vo=20 Vp-p, BW=20 Hz-20 kHz
50 Hz
• Low 1/f noise corner
• Fast settling time to 0.01 %
2/Ls
% Quad
Vee
r
."
Absolute Maximum Ratings
LF147 LF347B/LF347
. (Note 4)
(N6te4)
Operating Temperature
Range
Storage Temperature
Range
-65'CS:TAS: 1.50'C
Lead Temperature
260'C·
(Soldering, 10 sec.)
2600C
Soldering Information
Dual-In-Line Package
Soldering (10 seconds)
2600C
Small Outline Package
Vapor Phase (60 seconds)
215'C
Infrared (15 seconds)
220'C
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other. methods of soldering surface mount devices.
ESD -rating to be determined.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
LF147
LF347B/LF347
Supply Voltage
±22V
±1BV
Differential Input Voltage
±38V
±30V
±1·5V
Input Voltage Range
±19V
(Note 1)
Output Short Circuit
Continuous
Continuous
Duration (Note 2)
Power Dissipation
900mW
1000mW
(Notes 3 and 9)
1500C
150'C
Tjmax
9JA
Cavity DIP (D) Package
Ceramic DIP (J) Package
Plastic DIP (N) Package
Surface Mount Narrow (M)
Surface Mount Wide (WM)
800C/W
700C/W
75'C/W
1000C/W
85'C/W
DC Electrical Characteristics
Symbol
Parameter
(Note 5)
Min
Ves
Input Offset Voltage
t..Voslt..T Average TC of Input Offset
LF347B -
LF147
Conditions
Typ
Rs=10 kO, TA=25'C
Over Temperature
1
RS=10kO
10
Max Min
5
8
Typ
3
LF347
Max Min
5
7-
Max
5
10
13
- -
10
Units
Typ
mV
mV
p'vrc
10
Voltage
loS
Input Offset Current
TJ = 25'C, (Notes 5, 6)
Over Temperature
25
100
25
25
100
4
25
100
4
pA
nA
18
Input Bias Current
Tj = 25'C, (NOtes 5, 6)
Over Temperature
50
200
50
50
200
8
50
200
8
pA
nA
RIN
Input Resistance
TJ=25'C
AVOL
Large Signal Voltage Gain
Vs= ±15V, TA=25'C
Vo= ±
RL =2 kO
Over Temperature
1012
1012
50
100
50
100
25
1012
0
100
VlmV
tov,
25
Vs=±15V,RL=10kO ±12 ±13.5
Vo
Output Voltage Swing
VCM
Input Common-Mode Voltage
Range
CMRR
Common-Mode Rejection Ratio RsS:10kO
80
100
PSRR
Supply Voltage Rejection Ratio (Note 7)
80
100
Is
Supply Current
±11
Vs= ±15V
7.2
3-16
±12 ±13.5
+15
-12
11
±12 ±13.5
+15
-12·
± 11
80
100
80
100
±11
V/mV
15
25
7.2
11
V
+15
-12
V
V
70
100
dB
70
100
7.2
dB
11
mA
r-
-n
.....a:o.
......
.....
AC Electrical Characteristics (Note 5)
Symbol
Parameter
Min
Amplifier to Amplifier'Coupling
LF347B
LF147
Conditions
Typ
Max Min
LF347
Max Min
-120
-120
TA = 25°C,
Typ
Typ
-120
Units
Max
(Input Referred)
Slew Rate
Vs= ±15V, TA=25°C
8
VS= ±15V, TA=25°C
2.2
GBW
Gain-Bandwidth Product
en
Equivalent Input Noise Voltage TA=25°C, RS=100n,
in
Equivalent Input Noise Current
13
8
4
2.2
13
8
4
2.2
13
V/p.s
4
MHz
20
20
20
nV/.JHz
0.01
0.01
0.01
pAl.JHz
f=1000 Hz
Tj=25°C, f= 1000 Hz
Note 1: Unless otherwise specified the absolute maximum negative input voltage Is equal to the negative power supply voltage.
Note 2: Any of the amplifier outputs can be shorted to ground indefinitely, however. more than one should not be simultaneously shorted as the maximum junction
temperature will be exceeded.
Note 3: For operating at elevated temperature. these devices must be derated based on a thermal resistance of 81A'
Note 4: The LF147 is available In the military temperature range -55'C:>TA:> 125'C. while the LF3478 and the LF347 are available in the commercial temperature
range O'C:>TA:>70'C. Junction temperature can rise to TI max = 150'C.
Nota 5: Unless otherwise specified the specifications apply over the full temperature range and for Vs = ± 20V for the LF147 and for Vs = ± 15V for the LF34781
LF347. Vos. Ie. and los are measured at VCM=O.
Note 6: The input bias currents are junction leakage currents which approximately double for every 10'C increase in the junction temperature, TJ. Due to limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of intemal power dissipation. Po. TJ = TA + 8jA Po where 8jA is the thermal resistance from junction to ambient. Use of a heat sink is
recommended If input bias current is to be kept to a minimum.
Nota 7: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from
Vs = ± 5V to ±15V for the LF347 and LF347B and from Vs = ±20V to ±5V for the LF147.
Nota 6: Refer to RETS147X for LF147D and LF147J military specifications.
Note 9: Max. Power Dissipation Is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate
outside guaranteed IIm"s.
3-17
-n
.a:o.
dB
f= 1 Hz-20 kHz
SR
r-
w
......
.....
r-
-n
w
.a:o.
......
m
I.
Typical Performance Characteristics
Input Bias Current
100
i-
ii
IU
i
21
Va=±15V
lA_25°C
10 Supply Current
VCII-O
Vs= ±15V
-
4U
L
-r- _55°C,
_f-
-5
5
COMMON-MODE VO\l'AGE (V)
10
-50 -25 0 25 50 75 100 125
TEMPERATURE (OC)
10
Positive Common·Mode
Input Voltage Limit
-25
-55°CsTAsI211'C
5
Negative Common·Mode
Input Voltage Limit
~
-Ii5"CsTAsI21fC
I~
Ii
I
5
~
~
o
25
11-
10
~ 'k
125°C\ 25°C\-550
o
10
\
:z:
I;;
iI
4.5
!
z 3.5
3
-50 -25
25
30 1-+-+-+-t--+-+7'f-I-+-t
I
20 H--I--1>-to"'l-lH-+-t-t
1/
4U
o
5
10
15
20
SUPPLY VOIJAGE (±V)
25
......
I
i
a
GAIN ......
-10
a 25 IU 75 100 125
TEMPERATURE (OC)
-20
Ct.n~,fr
..... hJ~'
-30
24
!
~
i
!
-100
-1&0
0.1
25 Slew Rate
150
R!.=2k 100
,
1
10
FREQUENCY (MHz)
10
0.1
RL-OUTPUT LOAD (kO)
30 Bode Plot
r-
o
oL..J.....I......L....L.....L..J......L-L......!.....J
10
........
30
40
OUTPUT SOURCE CURRENT (mA)
4UH-+--+--HH-++-H
20
t\ .......
20
5
20
30
OUTPUT SINK CURRENT (mA)
\.
° ...
r!!d
30 Output Voltage Swing
Vs= ±15
\
'\
II
10
-10 -15 -20 -25
NEGATIVE SUPPlY
VOIJAGE(V)
=
Gain Bandwidth
15.5
-5
RL=2Il
TA 25°C
Ii
\
1-5
0
o
50 Output Voltage Swing
Vr±15V
......
~
-- li.'.
10
15
21
POsnm SUPPlY
VOLTABE(V)
-
25
vs= ±15V
Ilj
Negative Current Limit
1-
t:
'"
r-.::: ~
./
~-15
I
-
II"
o
20
~
II"
10
D
I
10
Positive Current Limit
15
I
II"
15
o
SUPPLYVOIJAIIE (± V)
!!IS; 20
;i
25°C~ - f -
125°C
D
-10
25
Input Bias Current
100
22
20
Vs=±I5V
RL-2k
Av=1
FALLING
18
r-.
16
14
TSINO
12
10
-50 -25
a
25 50 75 100 125
TEMPERATURE (OC)
TL/H/5647-2
3·18
,-----------------------------------------------------------------------------, r
(Continued)
Undlstorted Output Voltage
Swing
Distortion vs Frequency
30
0.2
l~
D.15 1-1-+.,.,.,I---+-4-
!!
i!i
Ii
....Ao
."
Typical Performance Characteristics
Ao
~
r
10\0
Ii
~i
gi"
... :1
co
:;;
i
I-t-=-+-+-'+--+--;--IIIH
is 0.05
-
120
100
8D
8D
"-
~
Ao
.....
ID
i'..
i'..
0\0
I\,.
20
o I...I...I.==I::::I:==:I!!!::=!.....J
10
100
lk
10k
fREQUENCY (Hz)
o
lOOk
Common-Mode Rejection
Ratio
i
~i
160 ...........----::-Ys-c""'±"=IS=Y
140
RL=2k
120
TA = 25°C
100 1--I-=l-CM
;;;::RR=20 LOG
+
v:
~ :!
• i!i
8D
~
40
OPEN LOOP
VOI1AGE
GAIN
~ti 8D
20
o~~~~~~~~
10
100
lk 10k lOOk 1M 10M
FREQUENCY (Hz)
1M
lOOk
FREOUENCY (Hz)
10k
Power Supply Rejection
Ratio
M
i! i
120 ~=I-_....L.::=;t,-TA=25'C
............+SUPPLY
100 ~~-~~+-~-~
iI i
80
Ii!
20
so
40
1
10 100 lk 10k lOOk 1M 10M
FREQUENCY (Hz)
70 Voltage
60
1-+-H+H-+tiH-+ttH-tttI
10
H-ttliH-+ttH-+ttH+ttl
....
1-......
-t'""""~--f....i----1
I--+--t'~t--i"'~
I----I---SU~" " -
I--+--tl_-+--i+,~
"
OL-....L_..l..---''---'-----'
10
100
lk
10k lOOk
FREQUENCY (Hz)
1M
Open Loop Voltage Gain
1M
r.....
o
Equivalent Input Noise
140 .....~-......-~Y~s-_~±7.15~Y
~
5
lSO
Vs= ±15V
RL=2k
TA=25 °C
Av=1
<111 01ST
i\
0.1
~
Open Loop Frequency
Response
0L..>.........L-L..l..LLL..I............................
10
100
lk
10k
FREOUENCY (Hz)
lOOk
10 Inverter Settling Time
I III III I
RL=2k
-55°C:sTA:s12SoC
10mV '/lmV
~
~
~
10mV l\lmV
11111\\1
-10
10k
5
10
15
SUPPLY VOI1ABE (± Y)
20
lk
10k
lOOk
FREOUENCY (Hz)
1M
0.1
1
SmUNG TIME
u.s)
10
TL/H/5847-3
3·19
•
ID
I"..,.
(f)
Pulse Response RL=2kO,CL=10pF
LL
....I
......
..,.
I"-
(f)
LL
....I
......
I"..,.
....
LL
....I
Small Signal Inverting
Small Signal Non-Inverting
>
is
>
is
:>E
e
:>E
...
!c:t
c:t
Z
Z
ii
ii
III
III
OIl
OIl
...co
C
...co
C
~
~
>
>
~
~
::>
a.
::>
::>
:::>
a.
~
~
co
co
TIME (0.2 pS/DIV)
TIME (0.21's/DIY)
TL/H/5647-4
TL/H/5647-5
Large Signal Inverting
Large Signal Non-Inverting
>
is
>
is
:>
e
:>
e
OIl
OIl
ii
ii
c:t
C
C
z
Z
III
OIl
III
...co
~
!::;
>
CI
>
~
~
. ::>
a.
:::>
::>
::>
a.
~
~
CI
CI
TIME (21's/DIV)
TIME (21's/DIV)
TL/H/5647-6
TUH/5647-7
>
~
c:t
z
ii
III
c:t
~
CI
.>
~
::>
~
co
TIME (51's/DIV)
TL/Hi5647-6
Application Hints
The LF147 is an op amp with an internally trimmed input
offset voltage and JFET input devices (BI-FET IITM). These
JFETs have large reverse breakdown voltages from gate to
source and drain eliminating the need for clamps across the
inputs. Therefore, large differential input voltages can easily
be accommodated without a large increase in input current.
The maximum differential input voltage is independent of
the supply voltages. However, neither of the input voltages
should be allowed to exceed the negative supply as this will
cause large currents to flow which can result in a destroyed
unit.
Exceeding the negative common-mode limit on either input
will force the output to a high state, potentially causing a
reversal of phase to the output. Exceeding the negative
common-mode limit on both inputs will force the amplifier
3-20
Application Hints (Continued)
output to a high state. In neither case does a latch occur
since raising the input back within the common-mode range
again puts the input stage and thus the amplifier in a normal
operating mode.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
wards in a socket as an unlimited current surge through the
resulting forward diode within the IC could cause fusing of
the internal conductors and result in a destroyed unit.
Because these amplifiers are JFET rather than MOSFET
input op amps they do not require special handling.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the
input to minimize "pick-up" and maximize the frequency of
the feedback pole by minimizing the capacitance from the
input to ground.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many
instances the frequency of this pole is much greater than
the expected 3 dB frequency of the closed loop gain and
consequently there is negligible effect on stability margin.
However, if the feedback pole is less than approximately 6
times the expected 3 dB frequency a lead capaCitor should
be placed from the output to the input of the op amp. The
value of the added capaCitor should be such that the RC
time constant of this capacitor and the resistance it parallels
is greater than or equal to the original feedback pole time
constant.
The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
Each amplifier is individually biased by a zener reference
which allows normal circuit operation on ±4.5V power supplies. Supply voltages less than these may result in lower
gain bandwidth and slew rate.
The LF147 will drive a 2 kO load resistance to ±10V over
the full temperature range. If the amplifier is forced to drive
heavier load currents, however, an increase in input offset
voltage may occur on the negative voltage swing and finally
reach an active current limit on both positive and negative
swings.
Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed back-
Detailed Schematic
VCCo------------9----------~----t_----._------------__,
Vo
•
-VEEo-.....-__4~-.....- - - - - -.....- - . . . , _.....__4~-.....-
....- - - -....- -.......
TL/H/S647-9
3-21
Typical Applications
Digitally Selectable Precision Attenuator
'.
',.
••,...
All resistors 1% tolerance
A1 A2 A3
0
0
0
0
0
0
0
0
__ ::n:::
Vo
F
Attenuation
0
1
0
0
-1 dB
-2dB
-3dB
-4dB,
-5dB
-6dB
-7dB
0
0
AnENUATION SELECT INPUTS
TLIHI5647-10
• Accuracy of beller than 0,4% with standard 1% value resistors
• No offset adjustment necessaoy
• Expandable to any number of stages
• Veoy high input impedance
Long Time Integrator with Reset, Hold and Starting Threshold Adjustment
,---,
',.
VOUT
.
r---'lM.---....-o ••
ANALOG
LFIIDI
L____~===~_.J ...
T
~
TA-25'C=
.00k
~
~ §TA-·25'e
z
::!
..
-15
NEGATIVE SUPPLY VOLTS IVI
-20
.0
24
5
~
20
::!
.2
.."
.....
.."
4
.5
SUPPLY VOLTAGE I±VI
20
Vs =±15V
TA·25'C
V-
15
::!
I
'Ok
5
~
~
z
~
~
"
-'0
TA = -55'e I--
./
.M
Output Voltage Swing
28
AL '2k
AS'50
w
o
-5
:>
~
z
...
..::
TA -125'e ~WP'
......
....I
.0
~
125°1
15
/
1\ I
>
Negative Common-Mode
Input Voltage Limit
N
U.
g
-55°C ~ TA::;::125°&
vS' ±'I'V
f
II)
~
II)
.,...
......
II)
II)
.,...
~
1\25'C \
10
II)
('I)
......
II)
~
OUTPUT SINK CURRENT (rnA)
......
II)
....I
b b
~
t'-.. r..... "\ '\ ""OC
>
II)
II)
('I)
U.
~
VS' ~15V
20
E
c(
Positive Common-Mode
Input Voltage Limit
Positive Current Limit
15
I
o
.0
'.0
OUTPUT LOAD AL IkrJI
TLiH/5646-3
3-28
r......
."
Typical AC Performance Characteristics
Gain Bandwidth
Gain Bandwidth
~
~ I-
U'I
U'I
I.B
LFI55
~
~
I
!b..~VS·"5V_ I-
~~
I"""
1.4
1.2
\
"'iiii~I_vs'±2ov
1.0
LFI56
I~
=
~~F15L
U'I
v~. ,i5V
~
....
r-
."
~~
N
U'I
U'I
....
r-
O.B
~
.20V ~ ~
I
±10V
~V
r
I
O.B
-
-
2}
0.4
U'I
U'I
....
0.2
=:::::
Co)
o
-55-35 -IS 5 25 45 55 B5 IDS 125
TEMPERATURE I'C)
-55 -35 -IS 5 25 45 &5 B5 IDS 125
TEMPERATURE I'C)
-55 -35 -IS 5 25 45 55 B5 IDS 125
TEMPERATURE I'C)
I I
1.&
LFI51 CURVES IDENTICAL
BUT MULTIPLIED BY 4
~\.
VS"IOV- I-
..........
Normalized Slew Rate
TLIH/5646-4
U'I
U'I
....
l:o
Co)
U'I
U'I
Output Impedance
Output Impedance
1000 r-;:==;-~!I'I-,,"-,"'111
.g
100
."
§
§ IDa
w
~
....
rOJ
Output Impedance
......
U'I
en
......
....
10
~
g
U'I
~
....
r-
~
10
s
S
!;
;
"
."
N
0.1
"
10k
lOOk
1M
U'I
10k
10M
IDDk
1M
10k
10M
FREDUENCY 1Hz)
FREDUENCY IHr)
lOOk
1M
FREDUENCY IHr)
IDM
;;
~E
!co
~
w
~
r......
."
>
....
U'I
~
......
.
..
:0
TIME (0.5 ""DIV)
TIME (0.5 ""DIV)
U'I
e;
:0
:0
Co)
en
..~
..
:0
e:
....
~
w
:"....
e:
....
:0
U'I
l:o
E
~
~
:-
2}
!co
co
co
U'I
TIME (0.1 ""DIV)
TLIHI5646-6
TLlHI5646-5
U'I
....ren
en
~
~w
Z
Small Signal Pulse
Response, Av = + 5
a
;;
~E
!co
"
LF156 Small Signal Pulse
Response, Av= + 1
."
Co)
TLlH15646-12
LF155 Small Signal Pulse
Response, Av= + 1
en
....
r-
TLIH15646-7
~r-
."
LF155 Large Signal Pulse
Response, Av= + 1
;;
LF156 Large Signal Pulse
Response, Av= + 1
~
co
i
w
~
Iiw
~:-
:-
~
e
is
..'"
~
e:J
w
co
~
S
.e:
U'I
.
.e;
~
....
..
Co)
U'I
......
OJ
:0
:0
. TIME 111.5 ""DIY)
TIME!I~IY)
TIME 11 ""DIV)
Co)
co
e:
:0
TLIH/5646-B
TLIH15646-9
3-29
~.
....~
;:
.....
z
S
~
Co)
co
co
:-
LF157 Large Signal Pulse
Response, Av = + 5
TLIHI5646-IO
Typical AC Performance Characteristics
Inverter Settling Time
II
III
lFIS5
TA·2SOC
VS' mv
~
:II
"II:
Inverter Settling Time
~
111
""0/
I
!..
IIII
.
e
~
~
-5
~
,\.I
1111
-10
o
0.5
1-++I-HMr--I-+++HttI
Bode Plot
10
~H!s~1. I-l~'5~
lao
II
1&
Vs. ±15V
so
GAIN
-5
I
!co
I
I
-II
25
rtP'
-IS
-2a
-2S
-ZI
-lS
\
1111
!..
;;;
.:!!
!
eD
8
-5
-1.
..
..ii
i...
•I..
100
~
II
co
~
z
z
t-, '\
10
lFI&5/~
ca
2G
I\.
I\.lFJ51
,
'\
Undlstorted Output Voltage
Swing
...
Ii.
e"
i..
l
>
:24
21
r-
v•• ±lIV
Rl"n
TA"2SoC
AV"'
.L.J...................W
III
la
1.0
"il
>
-5
Vs··1&V-
~
&D
~
I
~~
10
~
~" -II
lamv'\: ImV
~
ID
::;
Ii
Open Loop Frequency
Response
II'
10
~
/;' ..V
)
..
Ii
5
eo..
"
(Continued)
Ik
I.
Equivalent Input Noise
Voltage (Expanded Seele)
TA"as·c._
VS"·,IV
ID
sa 1\
CD ~\
1\'-
'-
21
=
a•
lFISS
lFl&l/l
II
Ik
FREQUENCY 1Hz)
I.
TUH/5646-11
3-30
r
....c.n
c.n
.....
....
c.n
~
r
."
Detailed Schematic
r------r----"'t'"------,---~-------o tllcc
III
~
c.n
!!!
r
~
c.n
!!!
Co)
c.n
t - - -.....,.,.,.+-o OUT
+---01
til
~
.....
Co)
c.n
c.n
~
r
....
.....
....
c.n
."
c.n
Q)
~
.....
r
~
c.n
.....
r
Q)
Rl
n
RI
SD
."
---+---......- .....---J---.l...--L-l~.L-I.-!...J-.L----o-VEE
L - -.....
'C
141
= 3 pF in LF157 series.
TL/H/5646-13
Co)
c.n
.....
r
Q)
."
Co)
c.n
~
Connection Diagrams (Top Views)
Co)
Metal Can Package (H)
Dual·ln·Line Package (J)
14
NC
BALANCE
NC
INPUT
y+
INPUT
OUTPUT
yOrder Number
LF155AH, LF156AH, LF157AH,
LF155H,LF156H,LF157H,
LF255H,LF256H,LF257H,
LF355AH, LF356AH, LF357AH,
LF3558H, LF3568H, LF3578H,
LF355H, LF356H or LF357H
See NS Package Number H08C
NC
BALANCE
NC
INPUT
v'
INPUT
OUTPUT
NC
NC
TL/H/5646-14
NC
Dual·ln·Line Package (M and N)
BALANCE
7
8
v-
BALANCE
NC
TL/H/5646-29
TUH/5646-30
Order Number
LF155J,LF156J,LF157J,
LF355J,LF356J,LF357J,
LF3558J, LF356BJ or LF357BJ
See NS Package Number J14A
Order Number
LF355M, LF356M, LF357M,
LF356BM, LF355BN, LF356BN,
LF357BN, LF355N, LF356N or
LF357N
See NS Package Number
M08Aor N08E
c.n
Q)
m
.....
r
....c.n
....
.....
....
c.n
....;;:
."
r
~
::!r
~
....
.....
c.n
Co)
c.n
~
....c.n
m
Co)
3-31
Application Hints
The LF155/617 series are op amps with. JFET input devices. These JFETs have large reverse breakdown voltages
from gate to source and drain eliminating the need for
clamps across the inputs. Therefore large differential input
voltages can easily be accomodated without a large increase in input current. The maximum differential input voltage is independent of the supply voltages. However, neither
of the input voltages should be allowed to exceed the negative supply as this will cause large currents to flow which
can result in a destroyed unit.
polarity or that the unit is not inadvertently installed backwards in a socket as an unlimited current surge through the
resulting forward diode within the IC could cause fusing of
the internal conductors and result in a destroyed unit.
Because these amplifiers are JFET rather than MOSFET
input op amps they do not require special handling.
All of the bias currents in these amplifiers are set by FET
current sources. The drain currents for the amplifiers are
therefore essentially independent of supply voltage.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the
input to minimize "pickup" and maximize the frequency of
the feedback pole by minimizing the capacitance from the
input to ground.
Exceeding the negative common-mode limit on either input
will force the output to a high state, potentially causing a
reversal of phase to the output. Exceeding the negative
common-mode limit on both inputs will force the amplifier
output to a high state. In neither case does a latch occur
since raising the input back within the common-mode range
again puts the input stage and thus the amplifier in a normal
operating mode.
Exceeding the positive common-mode limit on a Single input
will not change the phase of the output however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to ac ground set the frequency of the pole. In many
instances the frequency of this pole is much greater than
the expected 3 dB frequency of the closed loop gain and
consequently there is negligible effect on stability margin.
However, if the feedback pole is less than approximately six
times the expected 3 dB frequency a lead capacitor should
be placed from the output to the inp.ut of the op amp. The
value of the added capaCitor should be such that the RC
time constant of this capacitor and the resistance it parallels
is greater than or equal to the original feedback pole time
constant.
These amplifiers will operate with the common-mode input
voltage equal to the positive supply. In fact, ~he commonmode voltage can exceed the positive supply by approximately 100 mV independent of supply voltage and over the
full operating temperature range. The positive supply can
therefore be used as a reference on an input as, for example, in a supply current monitor and/or limiter.
Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in
Typical Circuit Connections
Vos Adjustment
Driving Capacitive Loads
LF157_ A Large Power BW Amplifier
y+
ta. ,
5'
"
v,.o-I
• The potentiometer wiper Is connected to V+
TL/H/5646-15
'LF155/6 R=5k
LF157 R=I.25k
For distortion,;; 1% and a 20 Vp-p VOUT swing.
power bandwidth is: 500 kHz.
• For potentiometers wHh temperature coefficient of 100 ppm/'C or
less the additional drift wHh adiust
Is :::: 0.5 p.W'C/mV of adjustment
Due to a unique output stage deSign. these amplifiers have the ability to drive large capacitive
loads and still maintain stability. Cl(MAX) '" 0,01
p.F.
• Typical overall drift: 5 p.W'C ± (0.5
p.V/'C/mV of adi.)
Overshoot,;; 20%
Settling time (Is) '" 5 p.s
3-32
r-
....
~
....
~r-
."
Typical Applications
CJ'I
Settling Time Test Circuit
CJ'I
2k,O.I%
+16V
~
CJ'I
CJ'I
......
2k.D.1%
r-
*400.0.1%
."
IOYS
o
Your
•
Sk,D.1%
*l.Ok,D.l%
Settling time is tested with the LF155/6 connected
as unity gain inverter and LF157 connected for
SUMMING
NODE-...,.
5k.D.l%
•
FET used to isolate the probe capacitance
•
Output
•
Ay
=
=
......
c.:I
CJ'I
CJ'I
Ay = -5
-1.Yo---4o----t-----'
c.:I
CJ'I
CJ'I
l>
......
c.:I
CJ'I
CJ'I
10V step
m
......
-5 for LF157
r-
....
~
......
....
."
CJ'I
TUH/5646-16
en
l>
......
r-
."
Large Signal inverter Output, VOUT (from Settling Time Circuit)
I\)
CJ'I
LF355
LF356
~
r-
LF357
."
c.:I
CJ'I
en
......
r-
."
c.:I
CJ'I
~
......
c.:I
CJ'I
en
m
......
Z""DIV
hs/DIV
TL/H/5646-17
r-
1 ""DIV
TL/H/5646-1B
....
......
....
~r."
TL/H/5646-19
CJ'I
~
CJ'I
Low Drift Adjustable Voltage Reference
Z.~~I------""
•
tJ. VOUT/tJ.T= ±O.002%I'C
•
All resistors and potentiometers should be wire·wound
•
PI: drift adjust
•
P2: VOUT adjust
•
V+;;'5V
Use LF155 for
• Low Ie
.....-1--0 Your" lOY
• Low drift
• Low supply current
~
CJ'I
~
r-
~
CJ'I
~
......
c.:I
CJ'I
~
......
c.:I
CJ'I
~
m
RZ
300k
R3
1IOk
TL/H/5646-2D
3-33
m
t-
1.1)
CO)
Typical Applications
(Continued)
Fast Logarithmic Converter
~
1.1)
CO)
t-
1.1)
,----t---'II""":=::<> VREF-SV
+IIV
f2
•
..J
t-
~
..J
~
-
Dynamic range: 100 ",A ,;: II ,;: 1 mA (5 dec·
ades), Ivol~1Vfdecade
• Transient response: 3 ,..,5 for A.lj = 1 decade
1.1)
•
C1, C2, R2, R3: added dynamic compensation
•
Vos adjust the LF156 to minimize quiescent error
•
RT: Tel Labs type OS1
+
0,3%f"C
,...
1.1)
t-
,...
TLfHf5646-21
1.1)
u..
..J
IVOUTI ~ [ 1
R2] -lnVI
kT
[R
+ -R
V
r ]
T
q
1
~ logVIRI R2 ~ 15,7k,RT ~ 1k,0.3%f'C(fortemperaturecompensatlon)
Ir
REFRI
m
co
Precision Current Monitor
1.1)
CO)
<
co
1.1)
CO)
u..
..J
co
1.1)
•
Vo~5 R1fR2 (VfmA of 15)
•
R1, R2, R3: 0.1 % resistors
•
Use LF155 for
• Common-mode range to supply range
f2
..J
• Low Is
co
• Low Vos
• Low Supply CUrrent
~
..J
~
,...
1.1)
~
,...
u..
..J
Vo
"'
Ok
TLIHf5646-31
8·Bit 01 A Converter with Symmetrical Offset Binary Operation
IIV
ill
1.1)
1.1)
CO)
~
1.1)
CO)
1.1)
1.1)
EO
f2
..J
1.1)
1.1)
C'II
u..
~
1.1)
,...
1.1)
1.1)
,...
u..
..J
TLfHf5646-32
-15V
..J
EO
B1
+9.920
+0.040
-0.040
-9.920
1
t
0
0
•
R1, R2 should be matched within ±0.05%
•
Full-scale response time- 3JLS
B2 B3 B4 B5 B6 B7 B8
1
1
1
1
1
t
t
0
0
0
0
0
0
0
t
t
t
t
t
t
t
0
0
0
0
0
0
0
3-34
Comments
Positive Full-Scale
( + ) Zero-Scale
( -) Zero-Scale
Negative Full-Scale
Typical Applications (Continued)
Wide BW Low Noise, Low Drift Amplifier
Isolating Large Capacitive Loads
.,
OJ
1.1"
...------.--'\M-....
-o Vo.r
.
fMAX!!!24DkHz
••
-~:~
v-
vo Power BW: fMAX =
o Overshoot 6%
TL/H/5646-22
o t. 10 I's
o When driving large CL, the VOUT slew rate determined by CL and
IOUT(MAX):
-4-<>VOUT
R'
+1SV
R3
-'&V
-1&V
TL/H/5646-26
VOUT = R3 [2R2
R R1 + 1 ]
•
•
"'V, V-
+ 2V ,: VIN common-mode,:
V+
System Vos adjusted via A2 Vos adjust
Trim R3 to boost up CMRR to 120 dB. Instrumentation amplifier
resistor array recommended for best accuracy and lowest drift
3-36
Typical Applications (Continued)
Fast Sample and Hold
TLlH/5646-33
• Both amplifiers (AI, A2) have feedback loops individually closed with stable responses (overshoot negligible)
• Acquisition time TA. estimated by:
1
TA .. [2RON~~'N' Ch y, provided !hat
Y,N
V,NCh
.
< 2..S, RON Ch and TA > IOUT(MAJ<)' RON IS of SWI
If inequality not satisfied: TA '"
~~N~~
• LF156 develops full S, output capability for V'N"' IV
• Addition of SW2 improves accuracy by putting the voltage drop across SWI Inside the feedback loop
• Ove,a11 accuracy of syslem determined by the accuracy of both amplifiers, Aland A2
High Accuracy Sample and Hold
+t5V
TLlH/5646-27
• By closing !he loop through A2,!he VOUT accuracy will be determined uniquely by AI.
No Vos adjust required for A2.
• TA can be estimated by same considerations as previously but, because of the added
propagation delay In the feedback loop (A2) the overshoot is not negligible.
• Overall system slower than fast sample and hold
• RI,
Ce: additional compensation
• Use LFI56 for
• Fasl settling time
• LowVOS
3·37
Typical Applications
(Continued)
High Q Band Pass Filter
,,_
&1
.,0II1,..F
• By adding positive .eedback (A2)
Q Increases to 40
• 'BP=100 kHz
· VallT = loJCi
AI
VIN
12k
• Clean layout recommended
>=-+--0 VOUT
• Aesponse
to a 1 Vp-p tone burst
300 p.s
TL/H/5646-28
High Q Notch Filter .
• 2Al = A = 10 Mil
2C = Cl = 300pF
• Capacitors should be matched to obtain high Q
• 'NOTCH
100
>=-1-0VOUT
=
120 Hz, notch
• Use LF155 'or
o Low la
o Low supply current
TUH/5646-34
3-38
= - 55
dB, Q
>
r-
."
Co)
(II
J?"A National
~ Semiconductor
....
LF351 Wide Bandwidth JFET Input Operational Amplifier
General Description
The LF351 is a low cost high speed JFET input operational
amplifier with an internally trimmed input offset voltage
(BI-FET IITM technology). The device requires a low supply
current and yet maintains a large gain bandwidth product
and a fast slew rate. In addition, well matched high voltage
JFET input devices provide very low input bias and offset
currents. The LF351 is pin compatible with the standard
LM741 and uses the same offset voltage adjustment circuitry. This feature allows designers to immediately upgrade the
overall performance of existing LM741 designs.
The LF351 may be used in applications such as high speed
integrators, fast 01 A converters, sample-and-hold circuits
and many other circuits requiring low input offset voltage,
low input bias current, high input impedance, high slew rate
and wide bandwidth. The device has low noise and offset
voltage drift, but for applications where these requirements
are critical, the LF356 is recommended. If maximum supply
Typical Connection
R,
current is important, however, the LF351 is the better
choice.
Features
10 mV
Internally trimmed offset voltage
50 pA
Low input bias current
25 nV/./Hz
Low input noise voltage
0.01 pAl./Hz
Low input noise current
4MHz
Wide gain bandwidth
13 V/p.s
High slew rate
1.8 rnA
Low supply current
10120.
High input impedance
<0.02%
Low total harmonic distortion Av = 10,
RL = 10k, Vo=20 Vp-p, BW=20 Hz-20 kHz
50 Hz
• Low 1/f noise corner
2 p.s
• Fast settling time to 0.Q1 %
•
•
•
•
•
•
•
•
•
Simplified Schematic
VCCo-------. .- - - - - - - - - - - -. .----~
VCC
Ri
INTERNALLY
TRIMMED
INTERNALLY
TRIMMED
Connection Diagrams (Top Views)
-VEE
0----4-----...--------....------'
Dual-In-Llne Package
Metal Can Package
NC
BALANCE
NC
INPUT
V+
INPUT
OUTPUT
INVE:'J:~~ 2
V-
V-
BALANCE
Note. Pin 4 connected to case.
TOP VIEW
Order Number LF351H
See NS Package Number HOSC
Order Number LF351J,
LF351M or LF351N
See NS Package Number JOSA, MOSA or NOSE
3-39
TL/H/564B-l
....
It)
~
...I
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
°jA
±18V
Power Dissipation (Notes 1 and 6)
670mW
Operating Temperature Range
115'C
Input Voltage Range (Note 2)
±15V
Output Short Circuit Duration
Continuous
Storage Temperature Range
- 65'C to + 150'C
±30V
Lead Temp. (Soldering, 10 sec.)
Metal Can
DIP
N Package
120'C/W
21'C/W
°jC
Soldering Information
Dual-In-Line Package
Soldering (10 sec.)
Small Outline Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
O'Cto +70'C
Tj(MAX)
Differential Input Voltage
H Package
164'C/W (Still Air)
66'C/W
(400 LF/min Air Flow)
260'C
215'C
220'C
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
300'C
260'C
ESD rating to be deiermined.
DC Electrical Characteristics (Note 3)
Symbol
Parameter
LF351
Conditions
Min
Units
Typ
Max
5
10
13
Vas
Input Offset Voltage
Rs = 10 k!l, TA = 25'C
Over Temperature
I:l.VosllH
Average TC of Input Offset
Voltage
Rs=10k!l
los
Input Offset Current
Tj = 25'C, (Notes 3, 4)
Tj';; 70'C
25
100
4
pA
nA
Is
Input Bias Current
Tj = 25'C, (Notes 3, 4)
Tj';; ±70'C
50
200
8
pA
nA
RIN
Input Resistance
Tj=25'C
AVOL
Large Signal Voltage Gain
Vs= ±15V, TA=25'C
Vo= ±10V, RL =2 k!l
Over Temperature
25
Va
Output Voltage Swing
Vs= ±15V, RL =10 k!l
±12
VCM
Input Common-Mode Voltage
Range
Vs= ±15V
±11
10
/LvrC
1012
!l
100
V/mV
V/mV
15
±13.5
V
+15
V
-12
V
dB
CMRR
Common-Mode Rejection Ratio
Rs,;;10 k!l
70
100
PSRR
Supply Voltage Rejection Ratio
(Note 5)
70
100
Is
Supply Current
1.8
3-40
mV
mV
dB
3.4
mA
r-
."
AC Electrical Characteristics (Note 3)
Symbol
Parameter
Co)
....
U1
LF351
Conditions
Min
Typ
Units
Max
SR
Slew Rate
Vs= ±15V, TA=25'C
13
V/JLs
GBW
Gain Bandwidth Product
Vs= ±15V, TA=25'C
4
MHz
en
Equivalent Input Noise Voltage
TA = 25'C, Rs = 100n,
f= 1000 Hz
25
nV/,fHz
in
Equivalent Input Noise Current
Tj=25'C, f=1000 Hz
0.01
pAl,fHz
Note 1: For operating at elevated temperature, the device must be derated based on the thermal resistance, 8JA.
Note 2: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
Nole 3: These specifications apply for Vs~ ±15V and O'C<:TA<: +70·C. Vas. Ie and los are measured at VCM~O.
Note 4: The input bias currents are junction leakage currents which approximately double for every 10"C increase in the junction temperature, Tj. Due to the limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, Po. Tj = TA+ OjA Po where 0jA is the thermal resistance from junction to ambient. Use of a heat sink is
recommended if input bias current is to be kept to a minimum.
Note 5: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice. From
±15Vto ±5V.
Note 6: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate
outside guaranteed limits.
•
3-41
,...
It)
~
.....
Typical Performance Characteristics
Input Bias Current
Input Bias Current
Supply Current
1k
2.2
101 r-Vs' ,15V
l
.fj
I-
T =Z5"C
aD
.1':
:l
;;;
40
I;
~
ill
.....
-
;;;
10
~
~~
V
50
60
70
15
....
10
15
7D"C
o
10
15
20
..a.
ii...
.~
~
z
20
I--I--+--t-'b''t--t--+--l
25'C
">
-5
~
O'C
10'C
o
10
20
o
40
30
...c
.......
i'
'"
:li
>
!i
VS. :t:1&V
15
ZO
fo.,
....
........
vs= +15V
~
-50
r-
3
30
40
SO
TEMPERATURE rCI
10
V
o
10
70
15
:l!
~
i
5
14
~ a
.
~ !
; ;:
13
VS·±1IiV
RL on
I
AV·'
FALLING
I
-
J-,
RIS!NG
lZ
-100
-150
-3D
20
10
lOG
RL '2k
CL ,'DopF
50
GAIN
-20
'"
10
15
0.1
PHASE
-10
i--"'"
RL - OUTPUT LOAD (om
10
iii
........
o
TA - 25'C
Slew Rate
i1
z
40
30
20
20
110
:s
3.5
Z5
Bode Plot
_
RL -2k
CL"IODpF-
4.5
10
3D
V~-±IJV
i
ZO
30
SUPPLY VOLTAGE (.V)
Gain Bandwidth
jij
"
o ~~~~~_L-~~~
-0
OUTPUT SINK CURRENT (mAl
~
10
Output Voltage Swing
r-.,---r-;-r-..,.,....,.-,
!;i
!!
o
1l
I;
D'C
OUTPUT SOURCE CURRENT (mA)
Voltage Swing
4U
~ -1.
!l:
~
" "qi'IC
10
NEGAnVE SUPPLY VOLTAGE (VI
Negative Current Limit
ii...
r.... t...
,/
20
-15
25
ZO
/
POSITIVE SUPPLY VOLTAGE (VI
:il
z
I-
,/
"'"
2
15
Positive Current Limit
,/
r.
V
ll!
10
10
,/
,,~
B~
o
o
1&
hi
/
V
",
SUPPLY VOLTAGE (.V)
"t:
/
10
l-
...~>
40
D"C:;;TAS+70'C
I:0
/
B~
"'''
~>
iE
lil
30
Negative Common·Mode
Input Voltage Limit
O'C';;TA$ +10'C
15
o
20
20
I;
V
TEMPERATURE rCI
20
1=
1.6
1.2
o
10
Positive Common·Mode
Input Voltage Limit
,,~
1'>:
10
-5
COMMON-MOOE VOLTAGE (VI
~~
1.'
= 1A
~
20
i
~
I;
-10
!i
..
/V'
100
:l
o
~
1
I-
ill
10
D" ";TA ';;+10'C
VCM'O
VS' "IV
~
10
0.1
FREGUENCY (MHz)
100
11
o
10
ZO
3040
506010
TEMPERATURE ('C)
TL/H/564B-2
3·42
r
'T1
Typical Performance Characteristics (Continued)
o.z
Distortion vs Frequency
30
VS. :t1&V
0.175
o.lS
i!
.
.....,
a.aso
i" Q.l25
1
~
~Y."20YP1I
I I~I
i'"
..'"'"...
AY"00
In om5
Ay"'0~
I I
0.1126
100
lk
vS" .,BV
RL=2k
TA"2S'C
Ay"1
\
a
100
'"co
..
i....
--k
I_ I
0:
..
i..'"
co
co
50
~I
9
20
a
11
100
1k
10k
lOOk
!co
!;j
.
§
..
i..
0:
1411
120
Yj
01
"
"
+ OPEN LOOP
I I
~
1M lDM
.......
100
80
,
i""'--
.......
lK
f'.
10k
lOOk
I;
!l!
§
"
1M
~
10M
~
Equivalent Input
Noise Voltage
50
40
"
30
20
10
0
10
...'"
...,...-:
TA" 7rC
10
~
I
...i!!
:Ii
9
~
co
5
iii
§Ay" 100
fAy" I!!; ~
Ay"10
L
0.1
10K
..::
Ii..
..~
>
10mV
5
SUPPLY VOLTAQE I,VI
20
lmY
"
lk
10k
lDDk
FREQUENCY 1Hz}
1M
IBM
VS" .,BY
TA"25'C
10mV
-5
co -10
100
'IlmV
0
I;
LOI
15
lOOk
10k
I/!
i:
/
.Y
1k
10
f!:
10
100
Inverter Settling Time
~.
I
"
10k lOOk 1M 10M
lk
FREQUENCY 1Hz}
Vs' .15V
TA" 25"C
S
w
I'\.
70
Output Impedance
>
5
100
FREQUENCY IH,I
TA"rCTO+25'C
!:; lOOK
:II
100
::;:;.-~
10
..e'" so
...
i'\.
0
RL "2k
.
w
I'\..:SUPPLY
-SUPPLY,
100
.s
~
"
40
Open Loop Voltage
Gain (V/V)
~
I
~;::
VS"~'5V
20
10
1M
..~.
20
FREQUENCY 1Hz}
TA' 2S'C
60
FREQUENCY IH,I
~
""
60
411
1M
Power Supply
Rejection Ratio
1l1li INk
'\.
10
0
0
. co
1.1.
CMRR - 20 LOG YCM
Yo
VQLfAQE ~AIN I
40
w
'"'"
FREQUENCY 1Hz}
YS""SY
RL "2k
~ TA"H'C
f?F
10
'"
~
Common"Mode
Rejection Ratio
!;j
i!
VS·"SVTA" 2S"C
>
~
lDDk
10k
RL"'2k
z
~
"
oj
f- ~
a
:!! 100
.~
10
FREQUENCY 1Hz}
120
Open Loop Frequency
Response
120
!:;
0
10
Undistorted Output
Voltage Swing
w
10k
0.1
0:
I I
Tr 2S;C
Co)
.....
UI
0.1
I
~\
I
1\'
1
10
SETILING TIME "'"
TL/H/564B-3
3-43
....
It)
C")
u.
..J
Pulse Response
Small Signal Inverting
Small Signal Non-Inverting
;;
is
;;
co
~
E
is
~
E
e
;
CD
Z
CD
z
i...
i...
CD
...e~
>
....
.......=>
CD
.......
.......=>....
=>
e
e=>
TIME (0.2 jlS/OIV)
TIME (0.2 ""DIV)
TUH/564B-4
TlIH/564B-5
Large Signal Inverting
Large Signal Non-Inverting
;;
;;
is
is
~
~
e
e
CD
Z
CD
CD
CD
z
i...
i...
~
e
>
....=>
...e~
>
...........=>
.......
=>
co
=>
e
TIME (2 !ISIDIV)
TIME (2 ""DIV)
TlIH/564B-6
Tl/H/564B-7
Current Limit (RL = 1000)
TIME (5!1S1D IV)
TUH/564B-B
Application Hints
The LF351 is an op amp with an internally trimmed input
offset voltage and JFET input devices (BI-FET IITM). These
JFETs have large reverse breakdown voltages from gate to
source and drain eliminating the need for clamps across the
inputs. Therefore, large differential input voltages can easily
be accommodated without a large increase in input current.
The maximum differential input voltage is independent of
the supply voltages. However, neither of the input voltages
should be allowed to exceed the negative supply as this will
cause large currents to flow which can result in a destroyed
unit.
Exceeding the negative common-mode limit on either input
will force the output to a high state, potentially causing a
reversal of phase to the output.
Exceeding the negative common-mode limit on both inputs
will force the amplifier output to a high state. In neither case
does a latch occur since raising the input back within the
3-44
....
."
Application Hints (Continued)
Co)
wards in a socket as an unlimited current surge through the
resulting forward diode within the IC could cause fusing of
the internal conductors and result in a destroyed unit.
common-mode range again puts the input stage and thus
the amplifier in a normal operating, mode.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
The amplifier will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
The LF351 is biased by a zener reference which allows normal circuit operation on ± 4V power supplies. Supply voltages less than these may result in lower gain bandwidth and
slew rate.
Because these amplifiers are JFET rather than MOSFET
input op amps they do not require special handling.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the
input to minimize "pick-up" and maximize the frequency of
the feedback pole by minimizing the capacitance from the
input to ground.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many
instances the frequency of this pole is much greater than
the expected 3 dB frequency of the closed loop gain and
consequently there is negligible effect on stability margin.
However, if the feedback pole is less than approximately 6
times the expected 3 dB frequency a lead capacitor should
be placed from the output to the input of the op amp. The
value of the added capacitor should be such that the RC
time constant of this capacitor and the resistance it parallels
is greater than or equal to the original feedback pole time
constant.
The LF351 will drive a 2 kO load resistance to ± 1DV over
the full temperature range of D'C to + 7D'C. If the amplifier
is forced to drive heavier load currents, however, an increase in input offset voltage may occur on the negative
voltage swing and finally reach an active current limit on
both positive and negative swings.
Precautions should be taken to ensure that the power supply
for the integrated circuit never becomes reversed in polarity
or that the unit is not inadvertently installed back-
Detailed Schematic
VCCo-------------.---------------.----.~----_.--------------------~
Vos
ADJUST
..--~~------~~~~--~--_6----..--~--------~----~
-VEEo---~----
3-45
TL/H/564B-9
U'I
.....
....
II)
~
....I
Typical Applications
Hi-lJN Inverting Amplifier
Supply Current Indicator/Umlter
cz
RS
VSUPPLY o-"-_"IIV'Y~~---t---__.. ~~~;ra~~:~~~:noN
RZ
IS
+
Yo
lN914
Rl
V• VOUT switches high when Rsls
V-
> Vo
Parasitic Input capacitance Cl .. (3 pF for LF351
plus any additional layout capecHance) Interacts
with feedback elements and creetes undesirable
high frequency pole. To compensate, add C2 such
that: R2C2 '" RICI.
Ultra-Low (or High) Duty Cycle
Pulse Generator
lN914
AI
IN914
RZ
Long Time Integrator
y+
...-t,,--..I\IV\J-,,-oOUTPUT
y+
y+
y'
1M
1M
YOUT=
'z
~f
VIN DIT
"
1M
Y4.8 - 2Vs
• IoUTPUT HIGH'" RIC In 4.8 _ Vs
YTLlH/5B48-10
2Vs - 7.8
• IoUTPUT LOW '" R2C In Vs _ 7.8
where Vs
= V+
+
'Low leakage capacHor
lv-I
• 50k pot used for less sensitive Vos adjust
'low leakage capacHor
3-46
r-
."
Co)
~National
U1
Co)
~ Semiconductor
BI.FET II ™ Technology
LF353 Wide Bandwidth Dual
JFET Input Operational Amplifier
General Description
Features
These devices are low cost, high speed, dual JFET input
operational amplifiers with an internally trimmed input offset
voltage (BI-FET IITM technology). They require low supply
current yet maintain a large gain bandwidth product and fast
slew rate. In addition, well matched high voltage JFET input
devices provide very. low input bias and offset currents. The
LF353 is pin compatible with the standard LM1558 allowing
designers to immediately upgrade the overall performance
of existing LM1558 and LM358 designs.
•
•
•
•
•
•
•
•
•
These amplifiers may be used in applications such as high
speed integrators, fast 01 A converters, sample and hold
circuits and many other circuits requiring low input offset
voltage, low input bias current, high input impedance, high
slew rate and wide bandwidth. The devices also exhibit low
noise and offset voltage drift.
Typical Connection
10mV
Internally trimmed offset voltage
50pA
Low input bias current
16 nV/,fHz
Low input noise voltage
0.01 pAl,fHz
Low input noise current
4 MHz
Wide gain bandwidth
13 V//Ls
High slew rate
3.6 rnA
Low supply current
1012n
High input impedance
<0.02%
Low total harmonic distortion Av= 10,
RL=10k, Vo=20Vp-p, BW=20 Hz-20 kHz
50 Hz
• Low 111 noise corner
• Fast settling time to 0.01 %
2/Ls
Connection Diagrams
R;
Metal Can Package (Top View)
v'
INVERTING
INPUT B
6
v-
Order Number LF353H
See NS Package Number H08C
Simplified Schematic
112 Dual
•
vcco---_p-----_ip-_ _.,
Dual-ln·Llne Package (Top View)
vo
v'
OUTPUT A
INVERTING INPUT A
OUTPUT B
NON·INVERTING 3
INPUT A
vINTEANALLY
TAIMMED
-VEE
INTERNALLY
TRIMMED
INVERTING INPUT B
5
NON·INVERTING
INPUTS
Order Number LF353J, LF353M or LF353N
See NS Package Number J08A, M08A or N08E
o--....- -...- - - _...__.J
TLfHf5649-1
3·47
Absolute Maximum Ratings
Storage Temperature Range
-S5·C to + 150·C
Lead Temp. (Soldering, 10 sec.)
2S0·C
Soldering Information
Dual-In-Line Package
·2S0·C
Soldering (10 sec.)
Small Outline Package
Vapor Phase (SO sec.)
215·C
Infrared (15 sec.)
220·C
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
ESD rating.to be determined.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
±18V
(Note 1)
Power Dissipation
Operating Temperature Range
O·Cto +70"C
150·C
Tj(MAX)
Differential Input Voltage
±30V
±15V
Input Voltage Range (Note 2)
Output Short Circuit Duration
Continuous
DC Electrical Characteristics (Note 4)
Symbol
LF353
Conditions
Parameter
Min
Units
Typ
Max
5
10
..13
Vos
Input Offset Voltage
Rs=10kO, TA=25·C
Over Temperature
AVos/AT
Average TC of Input Offset
Voltage
Rs=10kO
Input Offset Current
Tj = 25·C, (Notes 4, 5)
TI'S:70"C
25
100
4
pA
nA
Input Bias Current
Tj = 25·C, (Notes 4, 5)
50
200
8
pA
nA
, los
18
10
Tj~70'C
mV
mV
/J-V/·C
1012
0
100
V/mV
RIN
Input Resistance
Tj=25'C
AVOL
Large Signal Voltage Gain
Vs= ±15V, TA=25'C
Vo= ± 10V, RL =2 kO
Over Temperature
25
Vo
Output Voltage Swing
Vs= ±15V, RL =10kO
±12
±13.5
V
VCM
Input Common-Mode Voltage
Range
±11
+15
-12
V
V
70
100
dB
70
100
15
Vs= ±15V
CMRR
Common-Mode Rejection Ratio
Rs~
PSRR
Supply Voltage Rejection Ratio
(NoteS)
Is
Supply Current
10kO
V/mV
3.6
dB
6.5
mA
AC Electrical Characteristics (Note 4)
Symbol
Parameter
LF353
Conditions
Min
Amplifier to Amplifier Coupling
TA=25'C,f=1 Hz-20kHz
(Input Referred)
Typ
Units
Max
-120
dB
SR
Slew Rate
Vs= ±15V, TA=25'C
8.0
13
V//J-s
GBW
Gain Bandwidth Product
VS= ±15V, TA=25'C
2.7
4
MHz
en
Equivalent Input Noise Voltage
TA=25'C, Rs=1000,
f=1000Hz
25
nVl.JHz
-
0.Q1
Equivalent Input Noise Current
Tj=25'C, f=1000 Hz
pAl.JHz
in
Note 1: For operating at elevatad tamperatures, the device must be derated based on a thermal resistance of 115"C/W typ junction to ambient for the Npackage,
and 158'C/W typ junction to ambient for the H package.
Note 2: Unless otherwise specified the absolute maximum negative Input voltage is equal to the negative power supply voltage.
Note 3: The power dissipation limit, however, cannot be exceeded.
Note 4: These specifications apply for VS= ±15V and O"CS:TAS: +70"C. vos, Ie and los are measured at VCM-O.
Note 6: The Input bias currents are junction leakage currents which approximately double for every 10"C increase in the junction temperature, TI' Due to the limitad
production test time, the input bias currents measured are correlatad to junction temperature. In normal operation the junction temperature rises above the ambient
tamperature as a resuH of internal power dissipation, PD. TI= TA + 61A Po where 6/A is the thermal resistance from junction to ambient Use of a heat sink is
recommended if Input bias current is to be kept to a minimum.
Note 6: Supply voltage rejection ratio Is measured for both supply magnitudes Increasing or decreasing simultaneously in accordance with common practice.
Vs = ±6V to ±15V.
3-48
r-
."
Typical Performance Characteristics
Co)
UI
Co)
Input Bias Current
Ik
l....
100 f-VS' 'I5V
TA'15 C
.~
10
iii
40
:!
10
~
~
:
.~
-
.-
:
-5
~
~~
.
,.
oC
0,.~
/
e
0
~
10'C
'"
-0
5
.~
.'"c
.
o
20
10
10
"-
C
10
C
IS
....
'"
'"
S
~
0
10
10
i..
~
3
10
15
20
-
....
~
.UJl~E
GAIN
-10
20
30
40
50
TEMPERATURE I"C)
&0
10
IS
100
RL ·Ik
CL'IOOpF
If-
50
~
~
14
10
.
~
:;
13
III
~
II
~
Slew Rate
VS··ISY
RL ·Ik
AY'I
FALLING
~
m
0
-50
-
"-
RisiNG
-100
-ISO
-30
10
I
0.1
ISO
-20
o
V
RL - OUTPUT LOAD Ik!!)
I'~S"I5V
10
'"~
r--- ....
40
10
10
Bode Plot
30
......
30
o
0
~
3.5
VS" ±15V
TA"15"C
IS
SUPPLY VOLTAGE ltV)
;
10
~
0
RL 'Ik
CL" lOOpF
........
10
Output Voltage Swing
i.
V~"IJV
4.5
o
30
I..
40
3D
o
OUTPUT SOURCE CURRENT ImA)
RL" Ik
-TA" 15"C
Gain Bandwidth
:i
~
IS
3D
~
'"
IrC
i
~
ID
5
OUTPUT SINK CURRENT ImA)
!.
'"
~
!:i
0
-5
~
'"
~
~
15"C
O-C
~
Voltage Swing
~..
'"
S
, I rc
IIrC
NEGATIVE SUPPLY VOLTAGE IV)
o
a
~
40
-10
'\~
10
o
0
10
IS
10
I- ..... Ilo..
'"
S
/
Negative Current Limit
~
~
~
/
POSITIVE SUPPLY VOLTAGE IV)
....
IS
u
/
10
IS
Positive Current Limit
...
/
'"
10
~
~
IS
5
SUPPLY VOLTAGE I.V)
/
~'"
~
10
o
~
IS
~o
Iii
i
10
~
u!:i
V
o
&0
O"C~TA~+l~C
!!i!t:::
",!Ii
/
~'"
50
Negative Common-Mode Input
Voltage Limit
~
/
~o
40
......
1.6
TEMPERATURE I C)
/
u!:i
3D
10
10
oC ~ TA ~ +lO'C
10
a.. -15
3.1
~
,/
1.4
10
0
10
IS
o
::;
10
S
,."
oC
3.6
~
:!
10
,.~
.
1l
Positive Common-Mode Input
Voltage Limit
0-
....
iii
100
COMMON·MOOE VOLTAGE IV)
",!Ii
.!
V
~
-10
~a
~~
C
iii
o
!!
Ir~TA~+lO"C
VS' 'I5V
iii
,.,.
60
4.4
.-
t::-~~IM:t'-
....
iii
Supply Current
Input Bias Current
0.1
I
10
FREQUENCY IMHZ)
100
"
01010304050
&0
10
TEMPERATURE I"C)
TUH/5649-2
3-49
Typical Performance Characteristics
Undlstorted Output Voltage
Swing
.Distortion vs Frequency
0.2
0.15
~VOi20rp·p
it
Z 0.125
"
~
~
I I
T~=25;C
10k
0.1
AV"IOO
to
Ii; 0.015
is
D.DSO
~
~I
I
0.025
.
i..
'"
~
.....
to
>
AV"IO~I-I
"'
10
1\
10k
"
100
i...
80
lOOk
""
~
"II
"w
I
40
I
0
10
100
Ik
10k lOOk
1M 10M
80
i'....
..
40
~
I
o
100
10k
~
I"
lOOk 1M
TA'n!!+26'C
a
~
VS" .15V
TA·2S··C
10
I
TA '10"C
i
~
~
!
i
"
10K
10M
10
16
SUPPLY VOLTAGE ('VI
10
IUD lk
~
m
a
,
I
~AV"IOD
1
Equivalent Input Noise
Voltage
10
SO
50
40
3D
10
10
0
10
~
20
100
Ik
L
IDk
lOOk
lk
10k
I IIII II
lDmV
III
~V'I~
FREQUENCY (Hz)
100
lOOk
Inverter Settling Time
10
i:
AV"ID
0.1
~
11k lOOk 1M 10M
FREQUENCY Uizl
0.01
5
...~
!
8
Output Impedance
RL" Ik
!:i lOOK
i'.
100
~ r;;..-
"'
10
FREQUENCY (Hz)
Open Loop Voltage Gain (V/V)
~
IK
~
....5
;
~+SUPPLY
-SUPPLY~
10
1M
...
~
40
I
~
20
FREQUENCY (Hz)
~
'"c
~
so
FREQUENCY (Hz)
VS' ;15V
TA' 25'C
r--. I"
.. so "" ,
CMRR" 20 LOB VVO + OPEN LOOP
CM
VQLTAGE GAIN
20
120
"Ei
5
VS",15VTA" 15"C
!\..
80
1M
140
"
S
.. 100
~VO
~ VCM _ Ik
60
R~' a'
'\..
" o
Power Supply Rejection
Ratio
i
:e
S
..
-
100
FREQUENCY (Hz)
Common-Mode Rejection
Ratio
120
co
!:;
..r
lUk
lOOk
C
L
o
lk
...'"
">
"~
to
100
120
I
c
10
FREQUENCY (Hz)
&I
VS' '15V
RL"lk
TA·15··C
AV'I
,
is
>
is
">e
">e
co
co
.
.
!!!
co
!!!
co
ii...
co
:=...
~
...
co
co
...'"
co
l-
I-
I-
>
>
=
l=
co
=
a..
I=
co
a..
TIME (O.21's/DIV)
TIME (O.2l's/DIV)
TUH/5649-4
TL/H/5649-5
Large Signal Inverting
Large Signal Non-Inverting
TIME (2 PS/DIV)
TIME (2I's/DIV)
TL/H/5649-6
TL/H/5649-7
Current Limit (RL = 100n)
>
is
~
.
~
...
'"
~
co
>
I-
=
a..
I-
=
co
TIME (5 PS/DIV)
TL/H/5649-8
Application Hints
These devices are op amps with an internally trimmed input
offset voltage and JFET input devices (BI-FET II). These
JFETs have large reverse breakdown voltages from gate to
source and drain eliminating the need for clamps across the
inputs. Therefore, large differential input voltages can easily
be accommodated without a large increase in input current.
The maximum differential input voltage is independent of
the supply voltages. However, neither of the input voltages
should be allowed to exceed the negative supply as this will
cause large currents to flow which can result in a destroyed
unit.
Exceeding the negative common-mode limit on either input
will force the output to a high state, potentially causing a
reversal of phase to the output. Exceeding the negative
common-mode limit on both inputs will force the amplifier
output to a high state. In neither case does a latch occur
since raising the input back within the common-mode range
again puts the input stage and thus the amplifier in a normal
operating mode.
3-51
•
~ r-----------------------------------------------------------~----------------------------_,
Ln
~
..J
Application Hints (Continued)
ing forward diode within the IC could cause fusing of the
internal conductors and result in a destroyed unit.
Because these amplifiers are JFET rather than MOSFET
input op amps they do not require special handling.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the
input to minimize "pick-up" and maximize the frequency of
the feedback pole by minimizing the capacitance from the
input to ground.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many
instances the frequency of this pole is much greater than
the expected 3 dB frequency of the closed loop gain and
consequently there is negligible effect on stability margin.
However, if the feedback pole is less than approximately 6
times the expected 3 dB frequency a lead capacitor should
be placed from the output to the input of the op amp. The
value of the added capacitor should be such that the RC
time constant of this capacitor and the resistance it parallels
is greater than or equal to the original feedback pole time
constant.
Each amplifier is individually biased by a zener reference
which allows normal circuit operation on ±6V power supplies. Supply voltages less than these may result in lower
gain bandwidth and slew rate.
The amplifiers will drive a 2 kO load resistance to ±10V
over the full temperature range of O·C to + 70·C. If the amplifier is forced to drive heavier load currents, however, an
increase in input offset voltage may occur on the negative
voltage swing and finally reach an active current limit on
both positive and negative swings.
Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards
in a socket as an unlimited current surge through theresult-
Detailed Schematic
vcco-----------~~------------~--~t_----_.----------------~__,
D3
TLlH/5649-9
3-52
.-"T1
Typical Applications
Co,)
U1
Co,)
Three-Band Active Tone Control
BOOST ~ CUT
BASS
11k
3.6k
Uk
>""''''-0 OUT
J 111111
+20
(NOTE 21
+15
(NOTE 4
1\
IIII L
IIV!
WhTJl
+10
+5
'"
:s
z
Ci -5
'"
'\
-10
-15
-20
/
II~lr5
10
100
lk
~nm
11111
10k
lOOk
FREQUENCY (Hzl
TL/H/5649-10
Note 1: All controls flat.
Note 2: Bass and treble boost, mid flat
Note 3: Bass and treble cut, mid flat.
Note 4: Mid boost, bass and treble flat.
Note 5: Mid cut, bass and treble flat.
•
All potentiometers are linear taper
•
Use the LF347 Quad for stereo applications
3-53
&I
Typical Applications
(Continued)
Improved CMRR Instrumentation Amplifier
Vs
l'i'C>tI+--+H
••
Va
Hott--+t....,
-Vs
Vs
Vs'
.1
.1
-
-
h
h
!
!
-'s
-VS'
SEPARATE
R5
R4
m
and ~
are separate isolated grounds
Matching of R2's, R4', and R5's control CMRR
With AVT = 1400, resistor matching = 0.01%: CMRR
•
Very high input impedance
•
Super high CMRR
= 136 dB
Fourth Order Low Pass Butterworth Filter
c'
0.01
.,
,,>
V'No--"N.........-'\M..........-""I
Your
•3
11k
••
-UiV
lOOk
'3'
11k
'='
j
;-:::;::,
-15V
...
lOOk
'='
•
Corner frequency (fe)
•
•
•
Passband gain (HO) = (1 + R4/R3) (1 + R4'/R3')
First stage Q = 1.31
Second stage Q = 0.541
•
•
Circuit shown uses nearest 5% tolerance resistor values for a filter with a corner frequency of 100 Hz and a passband gain of 100
Offset nulling necessary for accurate DC performance
=
R1R;CCl
2"
2"
TUH/5649-11
3-54
Typical Applications
(Continued)
Fourth Order High Pass Butterworth Filter
VIN
A"
24011
o-1
C
0.001
A3
200k
A3'
200k
• Comer frequency (fc)
,.--r-
1
~
1
=VR1R2C2·2; = V~·2;
• Passband gain (Ho=(1 +R4/R3) (1 +R4'/R3')
• First stage Q
= 1.31
• Second stage Q
= 0,541
• Circuit shown uses closest 5% tolerance resistor values for a filter with a comer frequency of 1 kHz and a passband gain of 10.
Ohms to Volts Converter
L...--"-o-15V
Va = _'_V_ x Rx
RLADDER
Where RLADDER is the resistance from switch SI pole to pin 7 of the LF353.
3-55
TLlH/5649-13
C)
r----------------------------------------------------------------------------,
~ ~National
....
~ ~ Semiconductor
II
.... LF400A/LF400
C)
BI.FET II ™ Technology
Fast-Settling JFET-Input Operational Amplifier
General Description
Applications
The LF400 is a fast-settling (under 400 ns to 0.01 % for a
10V output step) Bi-FET operational amplifier. Features include 16 MHz bandwidth, 60Vlp.s inverting slew rate, low
input offset voltage (0.5 mV for the LF400A at 25'C), and
adjustable output current limit, enabling the amplifier to drive
600n loads.
•
•
•
•
•
•
Typical Connection
Connection Diagram
DAC output amplifiers
High speed ramp generators
Fast buffers
Sample-and-holds
Fast integrators
Piezoelectric transducer signal conditioners
HIGH-CURRENT
OUTPUT
2k
VOUT
2k
INVERTING 2
INPUT
>--{6§} CURRENTLIMITED
OUTPUT
I
22 PF
TL/H/9414-1
Note: Pin 4 connected to case.
TL/H/9414-2
Top View
Order Number LF400ACH, LF400CH,
LF400AMH or LF400MH
See NS PBckage Number H08B
Simplified Schematic
~---1----~r_----~-~~--._-._---__O~
7
6 CURRENT-LIMITED
.....- .......l\NH~ OUTPUT
t---+-o
8
HIGH-CURRENT
OUTPUT
4
~_+-1--~--------~-~~~+_-+_-~--~~
3-56
TL/H/9414-3
r
Absolute Maximum Ratings (Notes 1 & 2)
Operating Ratings (Notes 1 & 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Temperature Range
LF400AMH, LF400MH
LF400ACH. LF400CH
Supply Voltage
Positive Supply Voltage
±18V
±32V
±16V
Differential Input Voltage
Input Voltage Range (Note 3)
Output Short Circuit Duration (Pin 6)
Power Dissipation (Note 4) H package
Continuous
Junction Temperature (TJMAX)
Storage Temperature
Lead Temperature (Soldering, 10 sec.)
ESD Susceptibility (Note 9)
150'C
-65'Cto + 150'C
~
o
TMIN S; TA S; TMAX
-55'C S; TA S; +125'C
O'C S; TA S; +70'C
+10Vto +16V
-10Vto -16V
Negative Supply Voltage
500mW
+300'C
800V
AC Electrical Characteristics
(LF400ACH, LF400CH)
The following specifications apply for V+ = + 15V and V- = -15V unless otherwise specified.
Tested Limits in Boldface apply for T J = 25'C to 95'C. Design Limits in Boldface apply for T A = TMIN to
TMAX; other Design Limits are for TA = 25'C; all other limits for TJ = 25'C.
LF400ACH
. Symbol
Parameter
Conditions
ts
Settling Time to 0.Q1 %
to 0.10%
See Figure 1
See Figure 1
GBW
Minimum Gain
Bandwidth Product
Av = +1,CL = 10pF
SR
Minimum Slew Rate
LF400CH
Tested Design
Tested Design
Typical
Typical
Limit
Limit
Limit
Limit
(Note 6)
(Note 6)
(Note 7) (Note 8)
(Note 7) (Note 8)
365
200
365
200
Units
ns
ns
16
14
16
14
MHz
Av = + 1, CL = 10 pF
30
27
30
27
V//LS
Av = -1,CL = 10pF
60
60
V//LS
Phase Margin
Av = +1, CL = 10pF
60
60
Degrees
en
Input Noise Voltage
f = 1 kHz, Rs = 1000
Broadband, Rs = 1000,
10 Hz to 10 kHz
23
2.3
23
2.3
nV/./Hz
/LVrms
in
Input Noise Current
f = 1 kHz
Broadband
10 Hz to 10 kHz
0.01
1.0
0.01
1.0
pAl./Hz
pArms
THD
Total Harmonic Distortion f = 1 kHz, Av = -1,
RL = 10k
0.002
0.002
%
CIN
Input CapaCitance
7
7
pF
3-57
~
......
r
~
o
o
DC Electrical Characteristics
(LF400ACH, LF400CH)
The following specifications apply for V+ = + 15V and V- = -15V unless otherwise specified.
Tested Limits In Boldface apply for TJ = 25·C to 95·C. Design Limits In Boldface apply for TA
TMAX; other Design Limits are for TA = 25·C; all other limits for TJ = 25·C.
LF400ACH
Symbol
Vos
Parameter
Maximum Input Offset Voltage
=
TMIN to
LF400CH
Tested Design
Tested Design Units
Typical
Typical
Limit
Limit
Limit
Limit
(Note 6)
(Note 6)
(Note 7) (Note 8)
(Note 7) (Note 8)
Conditions
VCM = OV,
TJ = 25·C
Rs = 0,
RL = 00
TJ = 70"C
±0.5
±3.0
mV
±2.0
±5.0
mV
los
Maximum Input Offset Current
VCM = OV (Note 5)
±50
±100
±2.5
±50
±100
±2.5
pA
nA
18
Maximum Input Bias Current
VCM = OV (Note 5)
100
200
100
200
pA
nA
26
1011
1011
-12to
+14
± 11
-12to
+14
±11
V
300
100
300
100
V/mV
280
100
280
100
V/mV
±12.5
±12.0
±12.5
±12.0
V
±12.0
±11.0
±12.0
±11.0
V
15
45
100
mA
mA
mA
mA
RIN
Input Resistance
VCM
Input Common-Mode Voltage
Range
AVOL
Minimum Large Using Pin 6
Signal Voltage Using Pin 8
Gain
Vo= ±10V,RL=2kn
Minimum Output Using Pin 6
Voltage Swing UsingPin8
RL = 2kn
RL = 6000.
Output
Short Circuit
Current
Pulse Test
25
Vo
Iso
Ro
Output
Resistance
Vo = ± 10V, RL = 6000.
MIN Using Pin 6
MAX Using Pin 6
MIN Using Pin 8
0.
25
15
45
100
Using Pin 6
Open Loop, DC
75
75
0.
Using Pin 8
Open Loop, DC
50
50
0.
CMRR Minimum DC Common Mode
Rejection Ratio
-11VS:VINS: +11V
PSRR
Minimum DC Power Supply
Rejection Ratio
+ 10V s: V+
-15V s: VVCM = OV
Maximum Supply Current
Vo = OV, RL =
Is
26
s:
s:
+ 15V,
-10V,
00
3-58
100
90
100
80
dB
100
90
100
80
dB
11.0
13.0
11.0
13.0
mA
r
"TI
AC Electrical Characteristics (LF400AMH, LF400MH)
0l:Io
The following specifications apply for V+ = + 15V, V- = -15V, and TJ
Tested Limits in Boldface apply for T J = - 55'C to + 1 25'C
=
ts
Settling Time to 0.01 %
toO.10%
See Figure 1
See Figure 1
GBW
Minimum Gain
Bandwidth Product
Av
SR
Minimum Slew Rate
= 10 pF
= 10 pF
Av
+ 1, CL = 10 pF
f = 1 kHz, Rs = 100n
Broadband, Rs = 100n,
Av
Av
=
+ 1, CL
=
=
=
365
200
365
200
=
"TI
LF400MH
Tested Design
Tested Design
Typical
Typical
Limit
Limit
Limit
Limit
(Note 6)
(Note 6)
(Note 7) (Note 8)
(Note 7) (Note 8)
Conditions
Parameter
»
......
r
LF400AMH
Symbol
o
o
25'C unless otherwise specified.
0l:Io
Units
ns
ns
16
14
10
16
14
10
+ 1, CL
30
27
30
27
-1, CL
60
60
V/p.,s
60
60
Degrees
23
2.3
23
2.3
nV/~
p.,Vrms
0.01
1.0
0.01
1.0
pAl~
pArms
0.002
0.002
%
7
7
pF
q,
Phase Margin
en
Input Noise Voltage
in
Input Noise Current
THD
Total Harmonic Distortion f = 1 kHz, Av
RL = 10k
CIN
Input Capacitance
10 pF
o
o
MHz
MHz
V/p.,s
10 Hz to 10 kHz
f = 1 kHz
Broadband
10Hz to 10kHz
=
-1,
DC Electrical Characteristics
(LF400AMH, LF400MH)
The following specifications apply for V+ = + 15V, V- = -15V, and TJ
Tested Limits in Boldface apply for TJ = -55'C to + 125'C.
=
25'C unless otherwise specified.
LF400MH
LF400AMH
Symbol
Vos
Parameter
Maximum Input
Offset Voltage
Conditions
VCM = OV,
Rs = 0,
RL = co
TJ
=
Typical
(Note 6)
25'C
Tested Design Unit
Tested Design
Typical
Limit
Limit
Limit
Limit
(Note 6)
(Note 7) (Note 8)
(Note 7) (Note 8)
±0.5
±3.0
mV
±2.0
±5.0
mV
los
Maximum Input
Offset Current
VCM
=
OV (Note 5)
±50
±100
±15
±50
±100
±25
pA
nA
18
Maximum Input
Bias Current
VCM
= OV (Note 5)
100
200
35
100
200
50
pA
nA
RIN
Input Resistance
VCM
Input Common-Mode
Voltage Range
AVOL
Minimum Large Using Pin6 Vo
Signal Voltage
USing Pin 8 Vo
Gain
1011
=
=
± 10V, RL
±10V, RL
= 2 kn
= 600n
3-59
1011
n
-12to
+14
±11
-12to
+14
±11
V
300
100
300
50
V/mV
280
100
280
50
V/mV
•
DC Electrical Characteristics
(LF400AMH, LF400MH)
The following specifications apply for V + = + 15V, V- = -15V, and TJ = 25'C unless otherwise specified.
Tested Limits in Boldface apply for T J = - 55'C to + 125'C. (Continued)
LF400AMH
Symbol
Vo
Isc
Parameter
Conditions
Minimum Output Using Pin 6
Voltage Swing
RL
Using Pin 8
RL
Output
Short Circuit
Current
=
=
±12.5
±12.0
±11.5
±12.5
±12.0
± 11.5
±12.0
± 11.0
±12.0
±11.0
V
15
45
100
mA
mA
mA
mA
2kO
6000
Pulse Test
25
MIN Using Pin 6
MAX Using Pin 6
MIN Using Pin 8
Ro
Output
Resistance
CMRR
Minimum DC Common Mode
Rejection Ratio
PSRR
Minimum DC Power Supply
Rejection Ratio
Is
Maximum Supply Current
LF400MH
Tested Design
Tested Design Units
Typical
Typical
Limit
Limit
Limit
Limit
(Note 6)
(Note 6)
(Note 7) (Note 8)
(Note 7) (Note 8)
25
15
45
100
0
75
Using Pin 6
Open Loop, DC
Using Pin 8
Open Loop, DC
50
-11V:s: VIN:S: +11V
100
90
80
100
80
75
dB
dB
+10V:s: V+ :S: +15V,
-15V:s: V- :S: -10V,
100
90
85
100
80
75
dB
dB
11.0
13.0
13.0
11.0
13.0
15.0
mA
mA
= OV
= OV,RL =
75
V
V
50
0
VCM
Vo
00
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.
Note 2: All voltages are with respect to ground.
Note 3: Unless otherwise specified, the Absolute Minimum Input Voltage is equal to the negative power supply voltage.
Note 4: The maximum power dissipation must be derated at elevated temperatures as is dictated by TJMAX, 9JA, and the ambient temperature TA. 9JA for the
LF400H is 150'C/W in free air, so a heat sink will generally be requirad when TA is greater than about 70'C. 9JC for the LF400H is f7'C/W, which dictates the use
of a heat sink with 9CA less than about 3S'C/W when TA = + 125'C.
Note 5: The input bias currents are iunction leakage currents which approximately double for every to'C increase in the junction temperature TJ. Due to limited
production test time,lnput bias currents are measured at TJ = 25°C. In normal operation the junction temperature rises above the ambient temperature as a result
of internal power dissipation Po. Use of a heat sink is recommended when input bias current must be minimized.
Note 6: Typicals represent the most likely parametric norm.
Note 7: Guarantead to National's AOQL (Average Outgoing Quality Level).
Note 8: Guaranteed, but not 100% production tested. These limits are not used to calculate outgoing quality levels.
Note 9: Human body model, 100 pF discharged through a 15000 resistor.
c
3-60
r-
~
Typical Performance Characteristics
Inverter Settling Time
TA=25CC
VS=tI5V 10
III
mVV
120
'iii'
~
100
PHASE
80
IIII
"t!lL
100
lk
SETTtING TIME (1'5)
'0:
6Of--r-+--+--l--+-l--j
sof--t-+--+--l--+-l--j
z:.
C>
20
4Of---+--t--f---+--t------1r---i
~
15
>
10
.!.
~
I-~!-:=~+-!-,-I--f"""-H
!:l
0
2Of--r-+--+--l--+-l--j
$
10f---+--t--f---+--t------1r---i
o
10
20
30
60
50
0.1
0.01
~IC
0
~
80
~
ro
50
TA~~,~,CC
1111111
103
104
fREQUENCY (Hz)
100
:s
~
: PI
102
103
105
106
120
110
100
90
iii.
!:l§!
t
z
~
104
70
10&
Equivalent Input
Noise Voltage
ffilil
80
I~~WI~,~~
70
60
TA=25CC
RS=OJl
so
40
30
'"
20
10
10 '
105
fREQUENCY (Hz)
Common-Mode Input
Voltage Range
25
~i~t~
TA=25CC
70
/'
-SUPPLY
60
1111111
!l:
iil
40
30
Vs~t'15V
.~
11111111
-
5
TA~~,~,CC
20
10
0
~
11111111
10'
102
103
104
fREQUENCY (Hz)
I
,;,., I
80
50
i
60
0
iil
~
VS=tI5V
50
0 ,02
AC Power Supply Rejection
lii'
102
10
fREQUENCY (Hz)
AC Common-Mode
Rejection
10'
15
0
11111111
'0'
20
10
0
~
~
Ro'
fREQUENCY (Hz)
5'"
'"8'"
~
20
90
~~~:::~ RMS
0.001
~
40
fREQUENCY (Hz)
:'S=·!5V
S
40
30
25
C>
Distortion vs Frequency
~
;$
120
110
100
90
30
~
::a
;:!
I
i
10&
~
0
20
Undistorted Output
Voltage Swing
0
~
0.01
!!l
0
10
$
Ii
60
~
>
z
S
0
10
C
30
0
iil
~
'0:
g
~.
~
!rl
12
i!l
fREQUENCY (Hz)
I
z
14
i5
C
JUNCTION TEMPERATURE (CC)
70
o.lm~F!lm
!
~
....'-
0
5
Distortion vs Frequency
S:::!
5
""
VS=tI5V
6
25
AMBIENT TEMPERATURE (CC)
I
16
10M
__L-~~
40
~
t;
30
Vs=t15V
OL-~~~~
10k lOOk 1M
lBO
t;;
ili
lB
Undistorted Output
Voltage Swing
ro~~~~=~_I~~~-+--~
30
135
~8
e
¥
a
fREQUENCY (Hz)
Slew Rate vs Temperature
80
Pha ..
Margin
53·
1111 1111 r
1111 11111
1\1
1()"1
90
GAIN 1!ll1
20
I
11111 \
111111
45
60
40
'1 mV
10mV'
r-
."
20
1 mV
-
Gain Bandwidth
vs Temperature
Bode Plot
I II
III
c
:z>
105
106
........
-5
-10
-15
-20
-25
v. ~p~~O~o~~~i- COMMON MODE
........ INPUT VOLTAGi-
r··
I
I
o
10
15
I
I
I
20
25
t SUPPLY VOLTAGE (V)
TL/H/9414-10
3-61
•
C)
C)
L::
..I
r---------------------------------------------------------------------------------,
Typical Performance Characteristics
......
~
C)
Output Voltage Swing
vs Supply Voltage
L::
£'
~
~
..
0
10
V
~
250K
i:l
200K
~
,,
15
V
I 1~ f-+-+-fiF-=;~211!1111"",,",--l
~
150K
15
102 I--+----\;;;;.~I-:-~---t-
SOK
g
10
105 1-+---+-+-+-+-+-1
\5
9 lOOK
~
1'; vs Temperature
! 1~ f-+-+--If-+--+---l.olllll
0
>
5
5
DC Gain vs Supply Voltage
~ ~K~+--r-+--~+-~-4
20
..
Input Bias Current
~ 350K
TA=25OC
..I
(Continued)
1~1~~~--~~~~~
0
20
5
10
i POWER SUPPLY VOLTAGE (V)
010203040506070
15
i POWER SUPPLY VOLTAGE (V)
JUNCllON mlPERATURE (OC)
Power Supply Current vs
Power Supply Voltage
18
16
1:
14
::1
10
12
~
TA=OOC
i3
I
~
II:
TA=70OC
I
Ii:
TA~25~
'1
o
o
I
I
All
2.5
5
7Jj
10 12.5 15 17Jj 20
i POWER SUPPLY VOLTAGE (V)
Settling Time-Positive Output Swing
TL/H/9414-11
Settling Time-Negative Output Swing
TIME (100 n,/DIV)
TIME (100 n,/DIV)
TL/H/9414-12
TL/H/9414-13
Step Response
TIME(IDDns/DlV)
TL/H/9414-14
3·62
Typical Performance Characteristics
!:;;
.j:>.
(Continued)
o
o
»
......
Voltage Transfer Characteristic
Step Response
r-
.."
.j:>.
o
o
20
15
10
"5
10
TIME (100 no/DlV)
" 15
TLlH/9414-15
"""20
-200 -150 -lOa -50
50
100
150
200
TL/H/9414-16
Voltage Transfer Characteristic;
20
20
15
15
10
10
-5
-5
- 10
-" 10
- 15
15
20
- 20
,.
t;
~
""200
-150 -lOa -50
50
100
150
200
-200 -150 -10050
V,N (I'V)
50
100
150
200
V,N CuV)
, TL/H/9414-17
TL/H/9414-1 B
3-63
•
CI
CI
~
...I
Typical Performance Characteristics
(Continued)
j
200
200
LL.
...I
150
150
Common-Mode Voltage Transfer Characteristic
100
S
.=,
100
50
S
.=,
t:
5!
~
~
50
..
t:
~
:§
-50
-100
-50
-100
-150
-150
-200
-20 -15
-10
-5
10
15
-200
20
INPUT COMMON·MODE VOLTAGE IV)
-20 -15 -10 -5
0
10
15
20
INPUT COMMON·MODE VOLTAGE (V)
TLlH/9414-19
TUH/9414-20
Application Hints
The LF400 is a high-speed, low input bias current Bi-FET
operational amplifier capable of settling to 0.01 % of a 10V
output swing in less than 400 ns. The rugged JFET inputs
allow differential input voltages as high as 32V without a
large increase in input current. However, the inputs should
never be driven to voltages lower than the negative supply,
as this can result in input currents large enough to damage
the device. To prevent this from occurring when power is
first applied, always turn the positive and negative power
supplies on simultaneously, or turn the negative supply on
first.
Exceeding the common-mode input range will not damage
the device as long as the Absolute Maximum Ratings are
not violated, but it will result in a high output voltage. Latching will not occur, however, and when the offending signal is
removed the LF400 will recover quickly.
The nominal power supply voltage is ± 15V, but the LF400
will operate satisfactorily from ± 1OV to ± 16V. The LF400 is
functional down to ±5V, but performance will be degraded.
(See Typical Performance curves.)
input capacitance. Since input capacitance is made up of
several stray capacitances that are difficult to predict, the
compensation capacitor will generally have to be determined empirically for best settling time. A good starting
point is around 10 pF for Av = -1.
Settling time may be verified using a circuit similar to the
one in Figure 1. The LF400 is connected for inverting operation, and the output voltage is summed with the input voltage step. When the LF400's output voltage is equal to the
input voltage, the voltage on the gate of 01 will be zero. Any
voltage appearing at this point will represent an error. The
FET source follower output is observed on an oscilloscope,
and the settling time is equal to the time required for the
error signal displayed on the oscilloscope to decay to less
than one-half the necessary accuracy (see oscilloscope
photos of "Settling Time-Positive Output Swing" and "Settling Time-Negative Output Swing"). For a 10V input signal, settling time to 0.01 % (1 mY) will occur when the displayed error is less than % mY. Since settling time is strongly dependent on slew rate, settling will be faster for smaller
signal swings. The LF400's inverting slew rat!! is faster than
its non-inverting slew rate, so settling will be faster for inverting applications, as well.
It is important to note that the oscilloscope input amplifier
will be overdriven during a settling time measurement, so
the oscilloscope must be capable of recovering from overdrive very quickly. Very few oscilloscopes are suitable for
this sort of measurement. The signal generator used for set-
Settling Time Considerations
The settling performance of any high-speed operational amplifier is highly dependent on the external components and
circuit board layout. Capacitance between the amplifier
summing junction and ground affects the closed-loop transfer function and should be minimized. The compensation
capacitor Cc between the output and the inverting input
should be carefully chosen to counteract the effect of the
3-64
,---------------------------------------------------------------------------------, r-
Application Hints
"T1
.j:>.
(Continued)
o
o
».......
7 pF
r-
lK
"T1
33.!l
.j:>.
o
o
lK
+5V
r-Vin
-5V - - '
SETTLING SIGNAL
TO SCOPE
H.P.5082-2810
-15V
TLlH/9414-21
FIGURE 1. Simplified Settling Time Test Circuit (see Tellt)
tling time testing must be able to drive 50D. with a very clean
± 5V square wave. For more information on measuring settling time, see Application Note AN-428.
Output Drive and Current Limit
The LF400 can drive heavier resistive loads than most operational amplifiers. The output at pin 6 is internally currentlimited when the voltage drop across the 25D. output resistor reaches about 0.55V (lOUT = 22 mAl. When more output current is needed, pin 8 provides a means of increasing
the maximum output current up to about 100 mAo A resistor
may be connected from pin 8 to pin 6, paralleling the internal sense resistor and increasing the current limit threshold
(Figure 3). Pins 6 and 8 may be shorted together to completely bypass the current limiting circuit. To avoid damaging
the LF400, observe the power dissipation limitations mentioned in the Absolute Maximum Ratings and in Note 4.
The effective load impedance (including feedback resistance) should be kept above 500D. for fastest settling. Load
capacitance should also be minimized if good settling time
is to be optimized. Large feedback resistors will make the
circuit more susceptible to stray capacitance, so in highspeed applications keep the feedback resistors in the 1 kD.
to 2 kD. range wherever practical. Avoid the use of inductive
feedback resistors (some wirewounds for example) as these
will degrade settling time.
Output Compensation
When operating at very low temperatures, a compensation
network should be added to the LF400's output. The 100D.!
22 pF network shown on the first page of this data sheet
should be used when the junction temperature might reach
25°C (roughly O°C ambient when the LF400 is "warmed
up"). In applications where the device will be operating with
a junction temperature near O°C, the output RLC network in
Figure 1 should be used. This network will provide a small
(about 20 ns) improvement in settling time at higher temperatures, as well.
Supply Bypassing
Power supply bypassing is extremely important for good
high-speed performance. Ideally, multiple bypass capacitors
as in Figure 2 should be used. A 10 J.LF tantalum, a 2.2 J.LF
ceramic, and a 0.47 J.LF ceramic work well. All bypass capacitor leads should be very short. For best results, the
ground leads of the capacitors should be separated to reduce the inductance to ground. A ground plane layout approach will give the best results. For simplicity, bypass capacitors have been omitted from some of the schematics in
this data sheet, but they should always be used.
O.55V
ILimit ::::: Rxl125fl
TLlH/9414-23
FIGURE 3. Increasing the current limit using pin 8.
Current limit is now determined by Rx in parallel with
the internal 25D. sense resistor•
Vos Adjustment
Offset voltage can be nulled using a 27k resistor and a 10k
potentiometer connected to pins 1 and 5 as shown in Figure
4a. Bypassing the Vas adjust pins with 0.1 J.LF capaCitors will
help to avoid noise pickup. When not used for offset adjustment, pins 1 and 5 can often be left open, but to minimize
the possibility of noise pickup the unused Vas trim pins
should be connected to ground or V - .
2.2).1F
CERAMIC.I,
VTL/H/9414-22
FIGURE 2. Power Supply Bypassing (see Text)
3-65
•
C) .-------------------------------------------------------------------------------~
C)
;
Application Hints
(Continued)
In very critical applications where a manual adjustment is
impractical, the LMC669 Auto Zero circuit may be used to
reduce the effective input offset voltage to around 5 p.V as
in Figure 4b. The LF400 will perform better than slower amplifiers in an auto zero loop, because its fast settling capability keeps its summing node voltage more stable. Therefore,
the LMC669 is able to more accurately sample the summing
node voltage before making an offset correction.
~
C)
;
Input Bias Current
The JFET input stage of the LF400 ensures low input bias
current (200 pA maximum) when the die is at room temperature, but this current approximately doubles for every 10·C
increase in temperature. In applications that demand the
lowest possible input bias current, a heat sink should be
used with the LF400. "Press on" heat sinks from manufacturers such as Thermalloy and AAVID can reduce junction
temperature by roughly 1O·C to 40·C.
TL/H/9414-24
FIGURE 4a. Vos Adjust Circuit
+15
Typical Applications
.>-_~-VOUT
High-Speed DAC with Voltage Output
-15V
+15V
TLlH/9414-26
TL/H/9414-25
FIGURE 4b. Automatic Offset
Adjustment Using LMC669
3-66
r---------------------------------------------------------------------------~
r-
I!
Q
~National
.........r-
~ Semiconductor
LF401/LF401A Precision Fast Settling
JFET Input Operational Amplifier
BI.FET II ™ Tachnology
General Description
Applications
The LF401A is a fast settling (guaranteed under 400 ns to
0.01 % for a 10V output step) BI·FET operational amplifier.
The input offset voltage of the LF401 A is guaranteed less
than 200 I" V maximum at 25'C. The LF401 also features 16
MHz bandwidth, 70 V/ I"s inverting slew rate and adjustable
short circuit current limit, enabling it to drive 600n loads
easily.
•
•
•
•
•
•
Typical Connection
Connection Diagram
I!
.....
»
Q
DAC output amplifiers
Fast buffers
High speed ramp generators
Sample-and·holds
Fast integrators
Piezoelectric transducer signal conditioners
Dual-In-Llne Package
VOS ADJ
INV. INPUT
12
3
N.I. INPUT
V- 4
5
BYPASS
6
BYPASS
7
N.C.'
VOUT
100D.
-15V
1
2
22 F
=:=P
TUH/BB39-1
14 RAW OUTPUT
13 v.
12 CURRENT-Llt.lITED
11 OUTPUT
VOS ADJ
10 N.C.'
9 N.C.'
8 N.C.'
• t.lUST BE LEFT UNCONNECTED
'See Figure 2 for Power Supply Bypassing.
TUH/8839-2
Order Number LF401ACD or LF401CD
See NS Package Number D14E
Simplified Schematic
~_.---~---_1~------_1~---------._------------.__.---~_1~_1~------------~V·
13
.........~Nv+-o(l'2 CURRENT-LIMITED
OUTPUT
t-----t~,4 RAW OUTPUT
BYPASS
4
~~---~~~---------------------~~~~---~---~~---------~VTL/H/8B39-3
3·67
•
....cc
Absolute Maximum Ratings
CI
Operating Ratings (Notes 1 & 2)
(Notes 1 & 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V+ - V-)
±18V
~
...I
......
....
CI
"G'
&L
...I
Differential Input Voltage
Input Voltage Range (Note 3)
Output Short Circuit Duration (Pin 12)
Power Dissipation (Note 4) D package
Junction Temperature (TJMAX)
Storage Temperature
Temperature Range
TMIN:S;; TA:S;; TMAX
O·C:s;; TA:S;; +70·C
LF401 ACD, LF401 CD
Positive Supply Voltage
+ 10V to + 16V
-10Vto -16V
Negative Supply Voltage
Total Supply Voltage (V+ - V-)
±32V
20Vt032V
±16V
Continuous
500mW
115"C
-65·Cto + 1500C
Lead Temperature (Soldering, 10 sec.)
ESD Susceptibility (Note 10)
+300·C
500V
AC Electrical Characteristics
The lollowing specifications apply for V+ = + 15V and V- = -15V unless otherwise specified. Tested Limits in Boldface
apply for TJ = 2S·C to 9SOC. Design Limits in Boldface apply for TA = TMIN to TMAX; other Design Limits are for TA =
25·C; all other limits lor TJ = 25·C.
LF401ACD
Symbol
Parameter
LF401CD
Typical Tested Design Typical Tested Design
Limit
Limit
Limit
Limit
(Note 6) (Note 7) (Note 8) (Note 6) (Note 7) (Note 8)
Conditions
ts
Maximum Settling Time to 0.01 % See Figure 1, CL :s;; 50 pF
toO.l0% See Figure 1, CL :s;; 50 pF
.'
GBW
Minimum Gain Bandwidth Product Av = +l,CL = 10pF,
I = 100kHz
SR
Minimum Slew Rate
Unit
335
200
400
335
200
500
ns
ns
16
14
16
14
MHz
27
VIILS
VIILS
Av = + 1, CL = 10 pF
27
Av= -l,CL= 10pF
70
70
.
Minimum Phase Margin
Avol = +1, CL = 10 pF
60
60
en
input Noise Voltage
f = 1 KHz,Rs = lOOn
Broadband, Rs = lOOn,
10 Hz to 10 kHz
23
2.3
23
2.3
nV/,JRZ
ILVrms
in
Input Noise Current
1= 1 kHz
Broadband
10 Hz to 10 kHz
0.01
2.0
0.01
2.0
pA/,JRZ
pArms
THD
Total Harmonic Distortion (Max)
f = 1 kHz,Av = -1,
RL = 10k
0.002
0.002
%
CIN
Input Capacitance
Differential
7
7
pF
3-68
r-
."
DC Electrical Characteristics
The following specifications apply for V+ = + 15V and V- = -15V unless otherwise specified. Tested Limits In Boldface
apply for TJ = 25"C to 95'C. Design Limits in Boldface apply for T A = T MIN to T MAX; other Design Limits are for TA =
25'C; all other limits for TJ = 25'C.
LF401ACD
Symbol
Parameter
LF401CD
Tested Design Typical Tested Design
Unit
Limit
Limit
Limit
Limit
(Note 6) (Note 7) (Note 8) (Note 6) (Note 7) (Note 8)
Typical
Conditions
Vas
Maximum Input Offset Voltage
(Note 9)
VCM = OV, TA = 25'C
Rs = 0,
TA = 70'C
RL = 00
±200
±600
los
Maximum Input Offset Current
VCM = OV. (Note 5)
±100
18
Maximum Input Bias Current
VCM = OV. (Note 5)
200
±500
±1500
±400
±2.5
±100
1011
RIN
Input Resistance
Input Common· Mode Voltage
Range
TJ = 25'C
AVOL
Minimum Large Using Pin 12
Signal Voltage Using Pin 14
Gain
Vo = ±10V, RL = 2kn
Vo = ±10V, RL = 600n
Vo
Minimum Outpu Using Pin 12
Voltage Swing Using Pin 14
RL = 2 kn
RL = 600n
ISC
Output
Short Circuit
Current
MIN Using Pin 12
MAX Using Pin 12
MIN Using Pin 14 Pulse Test
Ro
Output
Resistance
Using Pin 12
Using Pin 14
±400
±2.5
pA
nA
26
pA
nA
200
26
VCM
/LV
/LV
10 11
n
+ 141 -12
±11
+14/-12
±11
V
300
300
100
100
300
300
100
100
V/mV
V/mV
±12.5
±12
±.12
±11
±12.5
±12
±12
± 11
V
V
15
45
100
mA
mA
mA
15
45
100
Open Loop. DC
Open Loop. DC
75
50
CMRR Minimum DC Common Mode
Rejection Ratio
-11V";; VIN";; +11V
100
90
100
80
dB
PSRR
+10V,,;; V+
-15V";; VVCM = OV
< +15V.
< -10V,
100
90
100
80
dB
Is
Minimum DC Power Supply
Rejection Ratio
75
50
n
n
12
mA
Maximum Supply Current
Vo = OV. RL = 00
9
12
9
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.
Note 2: All voltages are with respect to ground.
Note 3: Unless otherwise specified, the Absolute Maximum Negative Input Voltage is equal to the negative power supply voltage.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX. 8JA, and the ambient temperature TA. The maximum
allowable power dissipation at any temperature is Po = (TJMAX - TAl/8JA or 500 mW. whichever is less. 8JA for the LF401 D Is typically S7'C/W.
Note 5: The input bias currents are junction leakage currents which approximately double for every 100C Increase in the junction temperature TJ. Due to limited
production lest lime. input bias currents are measured at TJ = 25'C. In normal operation the junction temperature rises above the ambient temperature as a result
of Internal power dissipation Po. Use of a heat sink is recommended when input bias current must be minimized.
Note 6: Typicals represent the most likely parametric norm.
Note 7: Guaranteed to Natlonal's AOQL (Average OutgOing Quality Level).
Note 8: Guaranteed, but not 100% production tested. These limits are not used to calculate outgoing quality levels.
Note 9: Tested and correlated to a 10 minute warm up period.
Note 10: Human body model. 100 pF discharged through a 15000 resistor.
3·69
"'o"
......
......
r-
."
"'"
o
......
::J>
....o
~r--------------------------------------------------------------------'
i!
-'
.....
....
Typical Performance Characteristics
10
o
i!
Inverter Settlin ~ Time
Bode Plot
I IIII I II
mV/ III
TA=25OC
VS=tI5V 10
-'
'N'
120
~.
~
-5
10mV'
lmV
IIIIII \
I
II
111111
uri
<15
100
80
60
40
20
PHASE
90
1111 Pha..
i'1'IIl
Ma!llin
53"
GAlNMI
18
t;
16
100
lk
10k lOOk 1M
I ...
~
~ g
OJ
135
1111 11111'
1111 11111
SETTUNG TIME (Ps)
80
'"
~
lmV
Gain Bandwidth
vs• Temperature
20
180
~
!l
~
Vs=tI5V
-
14
12
10
~
6
1111
010203040506070
FREQUENCY (Hz)
JUNCTION TEMPERATURE (OC)
Slew Rate vs Temperature
VS=tI5V
70
~
Ay=-I
60
i.
25
~!i!
15
~
50
40
30
Ay=+1
~
i..
20
;;!;
ill
~
~
!i!
10
!;
20
10
o
o
10
20
40
50
60
70
0
102
AMBIENT TEMPERATURE (OC)
0.1
Distortion vs.
0.1
g
z
·z
IiiIS
~y
~
Y
0.01
0
ij
~
~
'"~
[t=;~oc ULL
g
loS
101
I
o
120
"iil"
·3
§
!ii!
!:;
VS=iI5V
TA~~I~IOC
111111111
101
102
FREQUENCY (Hz)
il
J~llil~l~v
70
60
102
103
104
""
101
loS
~
I
~
~
i
60
,.111
,.ij
8
103
104
FREQUENCY (Hz)
104
loS
25 Voltage
~
102
103
Common-Mode Input
Range
AC Power Supply Rejection
101
102
FREQUENCY (Hz)
110
100
90
80
70
50
40
30
20
10
0
TA=25OC
RS=OIl
1\
50
40
30
20
10
FREQUENCY (Hz)
AC Common-Mode
Rejection
80
70
60
50
40
30
20
10
ill
PII~ l
80
o
FREQUENCY (Hz)
I:
oS
~
~
lc 10
0.001
i
~
10UT~~~ RIIS
0.01
1111111 II
1111111 II
90
~
110
Equivalent Input
Voltage
100 Noise
f~S=i
'"~
.~
"iil"
3
Iff'
FREQUENCY (Hz)
Distortion vs.
~
120
102
FREQUENCY (Hz)
g
z
10
~
0
30
15
!;
~
I I
25
20
Iff'
Iff'
TA=25OC
20
15
10
5
-5
-10
-15
-20
-25
I
J,.-",
........
~~~~~oM~-COMMON MO~_
,INPUT VOLTAGE
1'"-_
o
I
I
I
10
I
I
15
I
I
I
20
25
i SUPPLY VOLTAGE (V)
TL/H/8839-4
3-70
Typical Performance Characteristics
Output Voltage Swing
vs. Supply Voltage
3 250K 1-+-+----1f----+-+-t---l
TA=25OC
~
~
~
~
,,
10
/
~ ~Kf----+-+~--+-+-+~
g
~o'
r-n
o"'
"'.....
»
~
10' I---+--H-;:'=~.-d.l~f----l
~
10' f----+-----b4~'1-:--:-'c:-=+'
il
~ 150K f----+-+--l--+-+-+~
/
........
Input Bias Current
vs. Temperature
10' r-r-.--.--r-r---r---,
10' f----+-+-I----j--l--+---1
:; 104 f----+-+--l--+-+-h.&:l
~~K~+-4--r-+~--~
'A =25OC
S
DC Gain vs.
Supply Voltage
~~Kr-.--r-'-'~r-'-,
20
15
r-n
o.....
"'"'
(Continued)
l00Kf----+-+--l--+-+-+~
5OKf----+-+--l--+-+-+~
1~1L-~~~--~~~~
5
5
10
15
o
20
:I: POWER SUPPLY VOLTAGE (V)
10
20
30
40
50
60
70
JUNCnON TENPERATURE (OC)
:I: POWER SUPPLY VOLTAGE (v)
Power Supply Current vs.
Power Supply Voltage
18
16
!
iil
,.
12
T.=OOC
10
T.=700c
~
T.=25~_
ID
;;:
'(I
o
o
I
I
II
2.5
5
75 10 12.5 15 175 20
:I: POWER SUPPLY VOLTAGE (V)
Settling Time-Positive Output Swing
TLiH/BB39-5
Settling Time-Negative Output Swing
TIME (100 nslDlV)
TIME (100 nsiDIV)
TLiH/BB39-7
TLiH/BB39-6
Step Response
Step Response
TIME (100 nslDlV)
TIME (100 nsiDIV)
TLiH/BB39-9
TLiH/BB39-22
3-71
,-,-,-VOUT
v-
RESET
V+COM POUT 4 N.C.
CAP 6
0.002 J'F
OUTPUT ~7_ _- t
LMC669
OUTREF 5
DGND 14
10k.o.
1--.;.;;.;;.;.........-+15V
10.0.
TL/H/8839-20
FIGURE 4b. Automatic Offset Adjustment Using LMC669
Typical Applications
High-Speed DAC with Voltage Output
(See Figure 2 for Recommended Bypass Components)
•
50.0.
50.0.
100.0.
TL/H/8839-21
3-75
........
~
..... ~National
U.
..J
c(
....
.... ~ Semiconductor
~
U.
..J
BI.FET "TM Technologv
LF411A/LF411 Low Offset, Low Drift
JFET Input Operational Amplifier
General Description
Features
These devices are low cost, high speed, JFET input operational amplifiers with very low input offset voltage and guaranteed input offset voltage drift. They require low supply
current yet maintain a large gain bandwidth product and fast
slew rate. In addition, well matched high voltage JFET input
devices provide very low input bias and offset currents. The
LF411 is pin compatible with the standard LM741 allowing
designers to immediately upgrade the overall performance
of existing designs.
These amplifiers may be used in applications such as high
speed integrators, fast DI A converters, sample and hold
circuits and many other circuits requiring low input offset
voltage and drift, low input bias current, high input impedance, high slew rate and wide bandwidth.
•
•
•
•
•
•
•
•
•
Typical Connection
"'S
Ordering Information
AI
X
Vee
0.5 mV(max)
Internally trimmed offset voltage
10 ",VI'C(max)
Input offset voltage drift
50 pA
Low input bias current
0.01 pAl~
Low input noise current
3 MHz(min)
Wide gain bandwidth
1OV I ",s(min)
High slew rate
1.8 mA
Low supply current
1012n
High input impedance
<0.02%
Low total harmonic distortion Av=10,
RL = 10k, Vo=20 Vp-p, BW=20 Hz-20 kHz
II Low 1If noise corner
50 Hz
• Fast settling time to 0.01 %
2
Y
Ai
Z
Connection Diagrams
LF411XYZ
indicates electrical grade
Metal Can Package
Ne
indicates temperature range
"MOO for military
"COO for commercial
indicates package type
UH" or liN"
vTL/H/5655-5
Top View
-VEE
Note: Pin 4 connected to case.
TL/H/5655-1
Order Number LF411AMH,
LF411MH, LF411ACH or LF411CH
See NS Package Number H08B
Simplified Schematic
vccO-------. .-------------4~----_,
Dual-In-Llne Package
BALANCE
NC
INPUT
v·
INPUT --=..1'-<-0,"
OUTPUT
Vo
v-
BALANCE
TLlH/5655-7
INTERNALLY
TRIMMED
.VEE
INTERNALLY
TRIMMEO
o----4_----.....--------....._____..J
TL/H/5655-6
3-76
Top View
Order Number
LF411ACN or LF411CN
See NS Package Number N08E
........~
»
Absolute Ma)(imum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 8)
LF411A
±22V
±38V
LF411
±18V
±30V
±19V
±15V
Continuous
Continuous
Supply Voltage
Differential Input Voltage
Input Voltage Range
(Note 1)
Output Short Circuit
Duration
H Package
N Package
670mW
670mW
15O"C
162"C/W (Still Air)
65"C/W (400 LF/min
AirFlow)
115"C
120"C/W
.........
.......
Power Dissipation
(Notes 2 and 9)
Tjmax
IIjA
."
01:00
20"C/W
IIjC
Operating Temp.
Range
(Note 3)
(Note 3)
Storage Temp.
-65"C';:TA';:150"C
Range
Lead Temp.
(Soldering, 10 sec.)
260"C
ESD rating to be determined.
-65"C';:TA';:150"C
260"C
DC IElectrical Characteristics (Note 4)
Symbol
Parameter
LF411A
Conditions
Min
Vas
Input Offset Voltage
Rs= 10 kO, TA=25"C
tNos/t:.T
Average TC of Input
Offset Voltage
Rs= 10 kO (Note 5)
los
Input Offset Current
Vs= ±15V
(Notes 4, 6)
Max
0.3
0.5
Tj=25"C
Input Bias Current
AVOL
Vs= ±15V, Vo= ±10V,
RL =2k, TA=25"C
Va
Output Voltage Swing
VS= ± 15V, RL = 10k
VCM
Input Common-Mode
Voltage Range
CMRR
Common-Mode
Rejection Ratio
Rs,;:10k
PSRR
Supply Voltage
Rejection Ratio
(Note 7)
Is
Supply Current
mV
p.Vl"C
100
25
100
pA
2
nA
2
25
50
200
50
25
nA
200
pA
4
nA
50
nA
4
50
1012
Large Signal Voltage
Gain
2.0
25
Tj=125"C
Tj=25"C
0.8
7
Tj=70"C
Input Resistance
Max
10
Tj=25"C
RIN
Units
Typ
7
Tj=70"C
Vs= ±15V
(Notes 4, 6)
Min
20
(Note 5)
Tj=125"C
Is
LF411
Typ
50
Over Temperature
200
25
1012
0
200
V/mV
V/mV
25
200
15
200
±12
±13.5
±12
±13.5
V
±16
+19.5
±11
+14.5
V
-11.5
V
-16.5
80
100
70
100
dB
80
100
70
100
dB
1.8
2.8
1.8
3.4
mA
AC IElectrical Characteristics (Note 4)
Symbol
Parameter
LF411A
Conditions
Min
Typ
LF411
Max
Min
Typ
Units
Max
SR
Slew Rate
Vs= ±15V, TA=25"C
10
15
8
15
V/p.s
GBW
Gain-Bandwidth Product
Vs= ±15V, TA=25"C
3
4
2.7
4
MHz
en
Equivalent Input Noise Voltage
TA = 25"C, Rs = 1000,
f= 1 kHz
25
25
nvN.JHz
in
Equivalent Input Noise Current
TA=25'C, f=1 kHz
0.Q1
0.01
pAlv'.JHz
3-77
•
.,..
.,..
"'="
Note 1: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
La.
....I
Note 2: For operating at elevated temperature, these devices must be derated based on a thermal resistance of 6jA.
c:c
.,..
Note 3: These devices are available in both the commercial temperature range 0'C:nA,,70"C and the military temperature range -55'C"TA,,125'C. The
temperature range is designated by the position just before the package type in the device number. A "e" indicates the commercial temperature range and an "M"
.....
.,..
"'="
La.
....I
indicates the military temperature range. The military temperature range is available in "H" package only.
Note 4: Unless otherwise specified. the specifications apply over the full temperatura range and for VS= ±20V for the LF411A and for Vs= ± 15V for the LF411.
VOS. la. and los are measured at VCM = O.
Note 5: The LF411A is 100% tested to this specification. The LF411 is sample tested to insure at least 90% of the units meet this specification.
Note 6: The input bias currents are junction leakage currents which approximately double for every 10"C increase in the junction temperature, TI' DUB to limited
production test tima, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, Po. Tj=TA+8iA Po where 6jA is the thermal resistance from junction to ambient. Use of a heat sink is
recommended if input bias current is to be kept to a minimum.
Note 7: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice, from
± 15V to ± 5V for the LF411 and from ± 20V to ± 5V for the LF411 A.
Note 8: Refer to RETS 411AX for LF411AMH military specifications and to RETS 411X for LF411MH military specifications.
Note 9: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate
outside guaranteed limits.
Typical Performance Characteristics
100
~ 80
Input Bias Current
Input Bias Current
10k
VS=±15V
TA=25'C
~
~
'"
=>
0-
1k
..
100
IB
60
~
40
~
~
20
;IE
;IE
l- I-""
...
~
o
-10
-5
w",,,,
20
~~
15
8~
10
"'• !!:::
2w
2"
w'"
",,,,
2.0
i
1.B
-25
-
'"
1.6
:::>
I
J5"J.z~c ~ - f -
~f-r
I
I
1.4
o
25 50 75 100 125
TEMPERATURE ('C)
10
15
20
SUPPLY VOLTAGE (±V)
25
Positive Current Limit
15
-55"C:sTA:s125"C
Vs= ±15V
:;;;;;; ;;::..
r'1i
~ ......
I'
V
~
f;';f,c
I'
"'~;IE...
~......
25"C
L
125"C
-55'C
./
o
o
10
15
20
POSITIVE SUPPLY
VOLTAGE (V)
o
25
Negative Current Limit
-15
w
.... f::: to- "=:::
\
'""'- -10
...... ~
o
-5
-10 -15 -20
NEGATIVE SUPPLY
VOtJAGE (V)
-55'C
w
125'C
.w
!!!;:;:
U
'"
25'C
!i:
ffi
z
o
o
10
20
30
OUTPUT SINK CURRENT (mA)
40
~
~~
~2:.
0-"
~i
=>'"
20
co
o
40
25
20
15
/
10
il
10
o
10
20
30
OUTPUT SOURCE
CURRENT (mA)
Output Voltage Swing
40
~:! 30
-,5
o
30
RL=2k
TA=25'C
0-"
"'3
o
-25
Output Voltage Swing
50
Vs= ±115V
0-",
e:=>=>;IE..~cn
..'"'"
-f-
Negative Common-Mode
Input Voltage Limit
-55'C:sTA:s125"C
E!;
.13
2.2
ffi
......
"
10
Positive Common-Mode
Input Voltage Limit
1
=>
COMMON·MOOE VOLTAGE (V)
25
1/
./
1
-50 -25
10
Supply Current
2.4
VCM OV
Vs ±15V
5
10
15
20
SUPPLY VOLTAGE (± V)
o
25
0.1
1
RL -OUTPUT LOAD (kG)
10
TL/H/5655-2
3·78
r-
"T1
Typical Performance Characteristics
Gain Bandwidth
S.S
S
1:1;;
z~
::Oz
...'"
""
4
3.5
3
lS0
20
10
z
0
~
-20
-30
2.5
-50 -25
Vs= ±15V
TA= 25°r
I
0.15
z
:;;= 0.1
.
~
ti
10k
~
o.OS
10
~a::
!:i.!..
1-=
~j
='"
=
-
100
lk
10k
FREQUENCY (Hz)
iD 120
w~
i~
zll:
=z
:E=
:IE;::
8fd
iil
100
f--
~~
CMRR=20 LOG VCM+
Vo
OPEN LOOP
oorM
'1-..
80
40 h~ VCM
20 r-.~
0
10 100
~L~AGE
GAIN
lk 10k lOOk
FREQUENCY (Hz)
10
--
:II
~9c
z'"
Ie
=
,.,'"'=
~~
60
ffi
40
2
-
.........
0 25 50 75 100 125
TEMPERATURE I 'CI
1M 10M
Vs- ±lSV
TA=25"C
............+SUPPlY
.........
,
!~
~i
I-w
"','" "
'\.
"-
lk
10k lOOk
FREQUENCY (Hz)
s~
20
;!~
'"
1\
40
\
10
0
10
1M
§
...~
w
10
==
10
I~~ 1'00
l::0
e:
IIVIII}l
V
'"z
~-
.. >
!:l=
=:E
>=
lOOk
1111 I
10 mV '/1 mV
5
~vl
j
e:
6
II
0.1
lk
lOOk
10k
FREQUENCY IHzl
0
1-'"
="-
=
100
lk
10k
FREQUENCY (Hzl
~:?!.
Av 10
I
100
Inverter Settling Time
Output Impedance
~
20
SO
30
Vs +15V
T. 25°C
it!
10k
60
z",
!il
~
10 100 lk 10k lOOk 1M 10M
FREQUENCY (Hzl
Equivalent Input Noise
Voltage
70
w
2!
'~"
f - - !--iSUPPLr
100
"1
Power Supply
Rejection Ratio
10
100
~
- "'
"-
1M
0
-
120
0
20
I
10
15
SUPPLY VOLTAGE (±VI
10
-50-25
20
::>
5
RISING
.....
14
~ _ 100
=
...
>~
=z 80
9~ 60
z
~
40
=
lOOk
FREQUENCY (Hz)
100
l;l
Ul"'0: 80
RL 2k
55 D C
>-
Av=10~
.j.\....
I I
'"
0l:Io
140
':"
I I I
0
.6§
~tci:
-100
....,
w
--'-
':"
:2';
30
I I
I!Av=100
1.
rn.'-'~
§:
is
I
I
24
~~
r-
"T1
Vs= ±lSV
RL=2k
Av=l
Undistorted Output
Voltage Swing
Distortion vs Frequency
0.2
0
- 50
10
1
FREQUENCY (MHz)
0.1
0 25 50 75 100 125
TEMPERATURE (oC)
SO
~H~~
~
GAIN
'" -10
~
CL=110~1 fil
f-
:a:
26
Vs- ±lS
RL=2k 100
.......
...
»
........
Slew Rate
Bode Plot
30
Vs= ±lSV
RL=2k
CL=l00 pF
'r-...
~
z:E 4.S
~~
.....
.....
0l:Io
(Continued)
-5
10mV l \ l mV
,\
-10
1M
01
1
10
SETTLING TIME 1,'1
TllH/5655-3
3-79
......
....
......
......
'OS'
U.
Pulse Response RL =2 kn, CL10 pF
ij!
r~
E
5co
co
TIME (2 ,.a/DIY)
TIME (2 ,.a/DIY)
Current Limit (RL = 100n)
TIME (5 ,.a/DIY)
TL/H/5655-4
Application Hints
The LF411 series of internally trimmed JFET input op amps
(BI-FET IITM) provide very low input offset voltage and guaranteed input offset voltage drift. These JFETs have large
reverse breakdown voltages from gate to source and drain
eliminating the need for clamps across the inputs. Therefore, large differential input voltages can easily be accommodated without a large increase in input current. The maximum differential input voltage is independent of the supply
voltages. However, neither of the input voltages should be
allowed to exceed the negative supply as this will cause
large currents to flow which can result in a destroyed unit.
Exceeding the negative common-mode limit on either input
will force the output to a high state, potentially causing a
reversal of phase to the output. Exceeding the negative
common-mode limit on both inputs will force the amplifier
output to a high state. In neither case does a latch occur
since raising the input back within the common-mode range
again puts the input stage and thus the. amplifier in a normal
operating mode.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both
inputs exceed the limit, the output of the amplifier may be
forced to a high state.
3-80
r-
Application Hints (Continued)
Because these amplifiers are JFET rather than MOSFET
input op amps they do not require special handling.
The amplifier will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
The LF411 is biased by a zener reference which allows normal circuit operation on ±4.5V power supplies. Supply voltages less than these may result in lower gain bandwidth and
slew rate.
The LF411 will drive a 2 kO load resistance to ± 1OV over
the full temperature range. If the amplifier is forced to drive
heavier load currents, however, an increase in input offset
voltage may occur on the negative voltage swing and finally
re~ch an active current limit on both positive and negative
sWings.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the
input to minimize "pick-up" and maximize the frequency of
the feedback pole by minimizing the capaCitance from the
input to ground.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many
instances the frequency of this pole is much greater .than
the expected 3 dB frequency of the closed loop gain and
consequently there is negligible effect on stability margin.
~owever, if the feedback pole is less than approximately 6
times the expected 3 dB frequency, a lead capacitor should
be placed from the output to the input of the op amp. The
value of the added capaCitor should be such that the RC
time constant of this capacitor and the resistance it parallels
is greater than or equal to the original feedback pole time
constant.
Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards
in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the
internal conductors and result in a destroyed unit.
Typical Applications
Ultra High Speed Current Booster
lk
15V
B.2
SOLIO
TANTALUM
+
~
33
30t
Uk
15V
INPUT
It
10k
10
15pF
05
0.001
2N2222
470
10
OUTPUT
510
30k
15pF
300
~
PNP=2N2905
NPN = 2N2219 unless noled
TO·5 heal sinks for 06·07
-15V
TL/H/5655-9
3-B1
I!
....
....
~
r-
I!
....
....
.,...
.,...
-:t'
LL.
...I
Typical Applications (Continued)
10·Blt Linear DAC with No Vos Adjust
:(
.,...
.,...
iI
...I
MSB
LSB
AI A2 A3 A4 AS A6 Al A8 A9 AID
15V
±IDV
>~"-'OVOUT
VOUT = -VREF (
AI
A2
A3
Al0 )
"2 + 4" + "'8 + ... 1024
-IOV ,;; VREF ,;; 10V
-ISV
1023
0,;; VOUT';; -1024 VREF
LOAD
where AN ~ I if the AN digital input is high
AN ~ 0 if the AN digilal inpul is low
Single Supply Analog Switch with Buffered Output
3.3k
Vc
2k
1 • SWtTCH OFF o--'lN_ _-4
0= SWITCH ON
2Dk
Vo
10k
Detailed Schematic
Vcco------------_1~--------_1~--_t----_1~------------~
Vo
2Dk
AOJ~g¥ o--,\M~.
-VEEo---1~--...--...--------. .--. .--~--~--~~--. .----_'----~
3·82
.-------------------------------------------------------------------------, r
....~
~
....
~National
~ Semiconductor
s
LF412A/LF412 Low Offset, Low Drift
Dual JFET Input Operational Amplifier
General Description
Features
These devices are low cost, high speed, JFET input operational amplifiers with very low input offset voltage and guaranteed input offset voltage drift. They require low supply
current yet maintain a large gain bandwidth product and fast
slew rate. In addition, well matched high voltage JFET input
devices provide very low input bias and offset currents.
LF412 dual is pin compatible with the LM 1558, allowing designers to immediately upgrade the overall performance of
existing designs.
These amplifiers may be used in applications such as high
speed integrators, fast DI A converters, sample and hold
circuits and many other circuits requiring low input offset
voltage and drift, low input bias current, high input impedance, high slew rate and wide bandwidth.
•
•
•
•
•
•
•
•
•
Typical Connection
I\)
1 mV (max)
Internally trimmed offset voltage
10 povrc (max)
Input offset voltage drift
50 pA
Low input bias current
0.01 pAl./Hz
Low input noise current
3 MHz (min)
Wide gain bandwidth
1OV I pos (min)
High slew rate
1.8 mAl Amplifier
Low supply current
1012,{)
High input impedance
:0:0.02%
Low total harmonic distortion Av=10,
RL =10k, VO=20 Vp-p, BW=20 Hz-20 kHz
50 Hz
• Low 1If noise corner
2 pos
• Fast settling time to 0.01 %
Ordering Information
Connection Diagrams
LF412XYZ
X indicates electrical grade
RI
Y indicates temperature range
"M" for military
R,
Metal Can Package
"c" for commercial
Z indicates package type
V·
"H" or "N"
6 INVERTING
INPUTB
V-
Note. Pin 4 connected to case.
TOP VIEW
Simplified Schematic
1/2 Dual
Order Number LF412AMH,
LF412MH, LF412ACH or LF412CH
See NS Package Number HOSB
VCCo-------~------------._----_,
Dual-in-Line Package
v'
OUTPUT A
Vo
OUTPUT B
INVERTING INPUT A
NON·INVERTING
INPUT A
INVERTING INPUT B
5
V-
INTERNALL V
TRIMMED
INTERNAllY
TRIMMED
NON·INVERTING
INPUT B
TOPVIEW
-VEE o---~------"'--------"'----""'"
TLiH/5656-1
Order Number LF412ACJ, LF412CJ,
LF412ACN or LF412CN
See NS Package Number JOSA or NOSE
3-83
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
(Note 9)
HPackage
NPackage
LF412A
LF412
(Note 3)
670mW
Power Dissipation (Note 10)
Supply Voltage
±18V
±22V
150'C
115'C
Tjmax
Differential Input Voltage
±38V
±30V
115'C/W
152'C/W
IIjA (Typical)
Input voltage Range
Operating Temp. Range
(Note 4)
(Note 4)
(Note 1)
±19V
±15V
-65'C,,;TA"; 150'C-65'C";TA"; 150'C
Storage Temp.
Output Short Circuit
Range
Duration (Note 2)
Continuous
Continuous
Lead Temp.
(Soldering, 10 sec.)
260'C
260'C
ESD rating to be determined.
DC Electrical Characteristics (Note 5)
LF412A
Symbol
Parameter
Conditions
Vas
Input Offset Voltage
Rs=10 kO. TA=25'C
AVoslIH
Average TC 01 Input
Offset Voltage
Rs= 10 kO (Note 6)
los
Input Offset Current
Vs= ±15V
(Notes 5 and 7)
Input Bias Current
18
Min
Max
0.5
1.0
Tj=25'C
Vs= ±15V
(Notes 5 and 7)
LF412
Typ
Min
Large Signal Voltage
Gain
Vs= ±15V, Vo= ±10V,
Rl =2k, TA=25'C
Vo
Output Voltage Swing
VCM
Input Common-Mode
Voltage Range
100
25
100
nA
Tj=125'C
25
25
nA
50
200
50
4
50
50
25
200
PSRR
Supply Voltage
Rejection Ratio
(Note 8)
IS
Supply Current
Vo = OV, Rl =
200
pA
4
nA
50
nA
1012
0
200
V/mV
25
200
15
200
V/mV
±12
±13.5
±12
±13.5
V
±16
+19.5
±11
+14.5
V
-11.5
V
-16.5
Rs";10k
pA
25
2
Vs= ±15V, Rl =10k
Common-Mode
Rejection Ratio
p.V/'C
7
2
Over Temperature
CMRR
mV
10
1012
AVOl
3.0
7
Tj=125'C
Tj=25'C
1.0
20
(Note 6)
Tj=70'C
Input Resistance
Max
Tj=70'C
Tj=25'C
RIN
Units
Typ
80
100
70
100
dB
80
100
70
100
dB
3.6
00
5.6
3.6
6.5
rnA
AC Electrical Characteristics (Note 5)
Symbol
Parameter
LF412A
Conditions
Min
Amplifier to Amplifier
Coupling
TA = 25'C, 1= 1 Hz-20 kHz
(Input Relerred)
Typ
LF412
Max . Min
-120
Typ
Units
Max
-120
dB
SR
Slew Rate
Vs= ±15V, TA=25'C
10
15
8
15
V/p.s
GBW
Gain-Bandwidth Product
VS= ±15V, TA=25'C
3
4
2.7
4
MHz
en
Equivalent Input Noise
Voltage
TA=25'C, Rs=1000,
1= 1 kHz
25
25
nV/.JHz
in
Equivalent Input Noise
Current
TA=25'C,I=1 kHz
0.01
O.ot
pAl.JHz
3-84
Note I: Unless otherwise specified the absolute maximum negative Input voltage Is equal to the negative power supply voltage.
Note 2: Any of the amplifier outputs can be shorted to ground Indefintely, however, more than one should not be simultaneously shorted as the maximum junction
temperature will be exceeded.
Note 3: For operating at elevated temperature, these devices must be derated based on a thermal resistance of 8jA'
Note 4: These devices are available In both the commercial temperature range crC,;TA,;70'C and the military temperature range -SS'C,;TA,;12S'C. The
temperature range Is designated by the position just before the package type in the device number. A "C" indicates the commercial temperature range and an "M"
indicates the military temperature range. The military temperature range is available in "H" package only. In all cases the maximum operating temperature Is limited
by intemal junction temperature Tj max.
Note 5: Unless otherwise specified, the specifications apply over the full temperature range and for Vs= ±20V for the LF412A and for Vs= ±lSV for the LF412.
VOS, IB' and los are measured at VCM = O.
Note 6: The LF412A is 100% tested to this specification. The LF4121s sample tested on a per amplifier basis to Insure at least 85% of the amplifiers meet this
specification.
Note 7: The input bias currents are junction leakage currents which approximately double for every 10'C increase in the junction temperature, Tj. Due to limited
production test time, the Input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of Intemal power dissipation, Po. Tj = TA+ 8jA Po where 8jA is the thermal resistance from junction to ambient. Use of a heat sink is
recommended If Input bias current Is to be kept to a minimum.
Note 8: Supply voltage rejection ratio is measured for both supply magnitudes Increasing or decreasing simultaneously In accordance with common practice.
Vs = ±6V to ± ISV.
Note 9: Refer to RETS412AX for LF412AMH military specifications and to RETS412X for LF412MH military specifications.
Note 10: Max. Power Dissipation Is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate
outside guaranteed limits.
Typical Performance Characteristics
Input Bias Current
100
10k
¥S=±15V
TA=25'C
~
!i
'"
~
li!
o
..=-
-5
5
COMMON·MOOE VOLTAGE (V)
Positive Common-Mode
Input Voltage Limit
-55'CsTASI25'C
10
0
3.6
'"
3.2
~
~
9
I-'"
n room
~
~
LA""
2.8
125'C
"'"
o
5
10
15
20
SUPPLY VOLTAGE (±V)
-25
1~!~~~A~~:ce Limit
15
Positive Current Umit
~ ~I",..
Vs±15V
K ~I'-..
r\
~~-15
,r
8t§
!l!~ -10
a~
z~
E5
o
10
15
20
POSITIVE SUPPLY
VOLTAGE (V)
~ ~~
~
-55'C
o
-5
-10 -15 -20
NEGATIVE SUPPLY
VOLTAGE (V)
Output Voltage Swing
.......
U
.
w
T.=25'C
H-/;A-+++-H-+-l
OL......l-L....L......I-........1-L......I-L...J
o
10
30
20
OUTPUT SfNK CURRENT (mA)
40
o
S
10
15
20
SUPPLY VOLTAGE (± V)
20
'j
-src
~
~
25
.,.-.,.
s!
.
lV_ 20
~%:
....
20 f-HH-l7'l-f-f.-f.-I--l
10
ro
o
25'C
25
Output Voltage Swing
30
40 hH-+-+-++++-H
§ ~ ~ ~t-t-t-+-+-~f-+-t-1
25'C
c I-
Ir
OUTPUT SOURCE CURRENT (mA)
=~
125'C
o
-25
50 r.R~L-=~2k~~~~~~-r-'
Vs= ±115V
~
I-
-5
o
25
Negative Current Limit
"""' .......
25
Negative Common-Mode
.-
2li!
o
~
I:
~i
10
-15
....-
I'
4.0
~>-20
z:&
15
:&w
o
.i.'"
.
100
TEMPERATURE ('C)
.. ::l
....
4.4
.!.
-~-~
10
l!I> 20
~~
w"
,.,.
C'
Ik
I
-10
Supply Current
4.8
¥eM OV
Vs ±15V
.=~
......
25
Input Bias Current
15
/
Eli!
10
II
o
10
0.1
RL -OUTPUT LOAD (kO)
TLiH/5656-2
3-85
•
TYi)ical Performance. Characteristics (Continued)
Gain Bandwidth
5.5
5
i
~!.
i§
=1
I\.
\..
4.5
I'\..
4
Bode Plot
3.5
20
10
""
0
c-
iii'
:s
z
"-
~
-20
I'
-30
~
~
e
~
0.1
1 1 1
JJl
j~:r
...
'.
10k
1 1
Av=10{
I 1 I·
0
10
.-
"'~
~a.
20
140
iii'12O
~~
",",
0
w:S
!~
100
02
80
.;::
50
lEo
8~
0:
...
lOOk
20 f-.
0
10
... I
I
100
~LTAGE
GAIN
......
o:~
80
~5
60
......
I
~-
0>
~~
~100k
IS;!;
::
,
"",
""
10
100
-
z
"""
lk
10k lOOk
FREQUENCY (Hz)
'"
~
§
....
~
ii!
....
==
10k
z ..
~~
>0
50
50
40
S>
20
10
10
i
~e;
olE
lOOk
10
III I
10mV '/1 mV
5
0
>0
.... 0:
.......
","-
Av 1
c
'"
I
100
100
lk
10k
FREQUENCY (Hz)
w>
Av 10
V
I'
0
z
1~~_ll0~ II
1
1\
30
Ii!
.
.."'--
0.1
20
I\..
10 100 lk 10k lOOk 1M 10M
FREQUENCY (Hz)
Inverter Settling Time
0
'"
10
15
SUPPLY VOLTAGE (±V)
w
!!!
1M
Vs +15V
TA 25'C
10
I\..
70
Output Impedance
g
w
..,
"-
40
Equivalent Input NOise
Voltage
.........
0
;~
5
60
1
~~
~!
.... w
"-
1SUPPLr
100
w
80
1M
..........
20
1M 10M
~
0
,
40
~.
"'--2k
-55'C:sTA:s125'C
Open Loop Frequency
Response
20
Vs- ±15V
TA=25'C
Open Loop Voltage Gain
1M
~
............+SUPPLY
100
Ul-
i
2k
-
160
0
lOOk
FREQUENCY (Hz)
120
,.,""0
lk 10k lOOk
FREQUENCY (Hz)
Ar~1
;~
140
z
~
Vo
OPEN LOOP
_"
VI_ ±15V
RL=2k
10
-50 -25 0 25 50 75 100 125
TEMPERATURE ('C)
Power Supply Rejection
Ratio
CMRR=20LOG~ +
.
14
....
'~ISIN~
18
12
gi
Vs= ±15V
RL=2k
10
0
10k
~
Ii!
r~
40 h~ VeM
18
120
Ta=2GoC
Av=1
<1% OIST
v
r-~ J-.....
.--
20
!!
ii
100
......
Vs= ±15V
RL=2k
TA=25'C
r- t---
I~
-150
100
~::.
Common-Mode Rejection
Ratio
150
i
-100
\
~\
100
lk
10k
FREQUENCY (Hz)
13
~LLlJG
22
140
w
-
v
~
0.05
o
Undistorted Output Voltage
Swing
f?F'"'~
z
f~
m~
30
1
Vs-±15V
TA=25'C
0.15
24
50
-50
10
1
FREQUENCY (MHz)
0.1
Distortion vs Frequency
0.2
~
l\
2.5
-50 -25 0 25 50 75 100 125
TEMPERATURE ('C)
26
150
VB= ±15
RL=2k 100
.CL=100 pF
-10
t'-..
3
Slew Rate
30
VB= ±15V
RL=2k
CL=100 pF
lk
10k
lOOk
FREQUENCY (Hz)
-5
10 mV
,\
-10
1M
l\ 1 mV
0.1
1
SEnLiNG TIME (.s)
10
TLlH/5656-3
3-86
~------------------------------------------------------------------------------------,
r-
~
.....
Pulse Response RL=2kO,CL=10pF
Small Signal Inverting
~
~
.....
Small Signal Non-Inverting
...z
CD
Z
N
i
ls:-
~!!!
"'~~
~!!
S!!!.
!!!j'
~'r!
'Ii
co
>co
e:
:::>
co
co
TIME (0.2 I'll/DIY)
TIME (0.2 I'll/DIY)
Large Signal Inverting
Large Signal Non-Inverting
...z
...z
.
!
i
:!Is:-
~>
~~
!;
co>
~e
!!i~
!5~
~
e:
:::>
co
co
TIME (2 i'll/illY)
TIME (2 I'll/DIY)
Current Limit (RL = 1000)
TIME (5 I'll/DIY)
TLiH/5656-4
Application Hints
The LF412 series of JFET input dual op amps are internally
trimmed (BI-FET IITM) providing very low input offset voltages and guaranteed input offset voltage drift. These JFETs
have large reverse breakdown voltages from gate to source
and drain eliminating the need for clamps across the inputs.
Therefore, large differential input voltages can easily be accommodated without a large increase in input current. The
maximum differential input voltage is independent of the
supply voltages. However, neither of the input voltages
should be allowed to exceed the negative supply as this will
cause large currents to flow which can result in a destroyed
unit.
Exceeding the negative common-mode limit on both inputs
will force the amplifier output to a high state. In neither case
does a latch occur since raising the input back within the
common-mode range again puts the input stage and thus
the amplifier in a normal operating mode.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output, however, if both
inputs exceed the limit, the output of the amplifier may be
forced to a high state.
The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
Exceeding the negative common-mode limit on either input
will cause a reversal of the phase to the output and force
the amplifier output to the corresponding high or low state.
3-B7
•
,
...
~ r-----------------------------------------------------------------------------------------~
~
~...
~
Application Hints (Continued)
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the
input to minimize "pick-up" and maximize the frequency of
the feedback pole by minimizing the capacitance from the
Input to ground.
Each amplifier is individually biased by a zener reference
which allows normal circuit operation on ±6.0V power supplies. Supply voltages less than these may result in lower
gain bandwidth and slew rate.
The amplifiers will drive a 2 kO load resistance to ± 1OV
over the full temperature range. If the amplifier is forced to
drive heavier load currents, however, an increase in input
offset voltage may occur on the negative voltage swing and
finally reach an active current limit on both positive and negative swings.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many
instances the frequency of this pole is much greater than
the expected 3 dB frequehcy of the closed loop gain and
consequently there is negligible effect on stability margin.
However, if the feedback pole is less than approximately 6
times the expected 3 dB frequency a lead capacitor should
be placed from the output to the input of the op amp. The
value of the added capacitor should be such that the RC
time constant of this capacitor and the resistance it parallels
is greater than or equal to the original· feedback pole time
constant:
Precautions should be taken to ensure that the power supply for the Integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards
in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the
internal conductors and result in a destroyed unit.
Because these amplifiers are JFET rather than MOSFET
input op amps they do not require special handling.
3-88
r-
"T1
Typical Application
.....
.j::o.
~
......
Single Supply Sample and Hold
r-
"T1
.j::o.
.....
N
Vo
Detailed SChne~m~a~t~iC~_Y
_ _ _4_~__I
Vee ().
____1
Vo
OJ
TL/H/5656-9
3-89
&I
...- r--------------------------------------------------------------------------------,
:;c
..~ Semiconductor
~ ~National
.....
.-
~
BI.FET "TM Technology
LF441A/LF441 Low Power JFET
Input Operational Amplifier
General Description
The LF441 Al441 low power operational amplifier provides
many of the same AC characteristics as the industry standard LM741 while greatly improving the DC characteristics
of the LM741. The amplifier has the same bandwidth, slew
rate, and gain (10 kO load) as the LM741 and only draws
one tenth the supply current of the LM741. In addition, the
well matched high voltage JFET input devices of the
LF441 Al441 reduce the input bias and offset currents by a
factor of 10,000 over the LM741. A combination of careful
layout design and internal trimming guarantees very low input offset voltage and voltage drift. The LF441 Al441 also
has a very low equivalent input noise voltage for a low power amplifier.
The LF441 Al441 is pin compatible with the LM741 , allowing
an immediate 10 times reduction in power drain in many
applications. The LF441 Al441 should be used where low
power dissipation and good electrical characteristics are the
major considerations.
Features
• 1/1 0 supply current of a LM741
•
•
•
•
•
•
•
•
•
Typical Connection
Low input bias current
Low input offset voltage
Low input offset voltage drift
High gain bandwidth
High slew rate
Low noise voltage for low power
Low input noise current
High input impedance
High gain Vo = ±10V, RL = 10k
200 ",A (max)
50 pA (max)
0.5 mV (max)
10 ",VI'C (max)
1 MHz
1 V/",s
35 nV/y'Hz
0.01 pAl y'Hz
10120
50k (min)
Ordering Information
LF441XYZ
X indicates electrical grade
Y indicates temperature range
VCC
"M" for military,
"C" for commercial
Z
-VEE
indicates package type
TL/H/9297 -,
Connection Diagrams
Dual-In-Llne Package
Metal Can Package
NC
BALANCE
Ne
INPUT
y+
")
INVE~J~~¥ 2
INPUT
yV-
BALANCE
TLlH/9297-2
Top View
TL/H/9297 -4
Note: Pin 4 connected to case.
Top View
Order Number LF441ACN, LF441CJ,
LF441CM or LF441CN
See NS Package Number J08A, M08A or N08E
Order Number LF441AMH or LF441CH
See NS Package Number H08B
3-90
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
Differential Input Voltage
LF441A
±22V
±38V
LF441
±18V
±30V
Tjmax
(JjA(Typical)
Board Mount in still air
Board Mount in 400 LF/
min airflow
(JjG
Operating Temp. Range
Storage Temp. Range
LF441
±19V
±15V
Output Short Circuit
Duration
Continuous
Continuous
J Package
H Package
Power Dissipation
(Notes 2 and 9)
LF441A
Input Voltage Range
(Note 1)
N Package
670mW
670mW
150'C
115'C
130'C/W
M Package
185'C/W
165'C/W
65'C/W
25'C/W
(Note 3)
-65'C,;; TA ,;; 150'C
Lead Temperature
(Soldering, 10 seconds)
(Note 3)
-65'C,;; TA';; 150'C
300'C
300'C
260'C
25'C
(JjG
Soldering Information
Dual-In-Line Package
Soldering (10 sec.)
Small Outline Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
LF441A
LF441
260'C
260'C
215'C
220'C
215'C
220'C
See AN·450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
ESD rating to be determined.
DC Electrical Characteristics (Note 4)
Symbol
Parameter
Min
Vos
Input Offset Voltage
LF441
LF441A
Conditions
Rs = 10 kO, TA = 25'C
Typ
Max
0.3
0.5
Min
Typ
1
Over Temperature
AVos/AT
Average TC of Input
Offset Voltage
Rs = 10 kO (Note 5)
los
Input Offset Current
Vs= ±15V
(Notes 4 and 6)
Is
Input Bias Current
Vs = ±15V
(Notes 4 and 6)
7
Tj = 25'C
5
10
10
25
5
Tj = 70'C
1.5
Tj = 125'C
10
Tj = 25'C
10
Tj = 70'C
Tj = 125'C
20
10
Input Resistance
Tj = 25'C
AVOL
Large Signal Voltage
Gain
Vs = ±15V, Vo = ±10V,
RL = 10 kO, TA = 25'C
Vo
Output Voltage Swing
Vs = ± 15V, RL = 10 kO
VGM
Input Common·Mode
Voltage Range
CMRR
Common-Mode
Rejection Ratjo
Over Temperature
50
100
25
±13
±12
25
±12
±16
Rs';; 10 kO
80
3-91
mV
mV
)J-V/,C
50
pA
1.5
nA
100
pA
3
nA
nA
1012
RIN
5
7.5
nA
50
3
Units
Max
10 12
0
100
V/mV
V/mV
15
+18, -17
100
±11
70
±13
V
+14, -12
V
95
dB
•
,
DC Electrical Characteristics (Note 4) (Continued)
Symbol
PSRR
Supply Voltage
Rejection Ratio
Is
Supply Current
LF441A
Conditions
Parameter
(Note 7)
Min
Typ
80
100
150
LF441
Max
Min
Typ
70
90
200
Units
Max
dB
150
250
",A
AC Electrical Characteristics (Note 4)
Symbol
Parameter
LF441A
Conditions
Min
Typ
LF441
Max
Min
Typ
Units
Max
SR
Slew Rate
Vs = ±15V, TA = 25°C
0.8
1
0.6
1
V/",s
GBW
Gain-Bandwidth Product
Vs = ±15V, TA = 25°C
0.8
1
0.6
1
MHz
en
Equivalent Input Noise Voltage
T A = 25°C, Rs = 100n,
f = 1 kHz
35
35
nV/v'Hz
in
Equivalent Input Noise Current
TA = 25°C,f = 1 kHz
0.01
0.01
pAlv'Hz
Note 1: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
Note 2: For operating at elevated temperature, these devices must be derated based on a thermal resistance of 8JA.
Nole 3: The LF441A is available In both the commercial temperature range O'C ,;; TA ,;; 70"C and the military temperature range -55'C ,;; TA ,;; 125'C. The
LF441 Al441 is available In the commercial temperature range only. The temperature range is designated by the position just before the package type in the device
number. A "e" indicates the commercial temperature range and an "M" indicates the military temperature range. The military temperature range is available in "H"
package only.
Note 4: Unless otherwise specified the specifications apply over the fulltemperalure range and forVs
Vos, la, and los are measured at VCM ~ O.
~
±20V for the LF441A and for Vs
~
± 15V for the LF441.
Note 5: The LF441A is 100% tested to this specffication.
Nole 6: The Input bias currents are junction leakage currents which approximately double for every 10"C increase in the junction temperature, Tj. Due to limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, Po: Tj = TA + 9jA Po where 9jA is the thermal resistance from junction to ambient: Use of a heat sink is
recommended if input bias current is to be kept to a minimum.
Note 7: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice. From
± 15V to ± 5V for the LF441 and from ± 20V to ± 5V for the LF441 A.
Note 8: Refer to RETS441AX for LF44IAMH milHary specifications.
Note 9: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipatio~ may cause the part to operate
outside guaranteed limits.
Typical Performance Characteristics
40 Input Bias Current
!; au
I!
10k Input Bias Current
±15V
I
./
20
./
10
E
;E
v.
TA=250C
....
0
-10
-10
~
IL
L
-5
0
5
COMMON-MODE VOI1AGE (VI
!;
Ik
Ii
100
i
20
01:"
co"
15
Be
10
~~
5
a~
z;E
g~
.. t:
iii I!!
~~
~ii
EO-
"E
~;E
w_
0
0
5
10
15
2D
25
POSITIVE SUPPLY VOLTAGE (VI
l:~
I
~
-25
.a
190
±15Y
~
10
Positive Common-Mode
25 Input Voltage Limit
-55°CslAS125°C
v,
1
-50 -25
10
200 Supply Current
Ve. DV
Negative Common-Mode
Input Voltage Limit
~~
-10
25 jC
5
10
15
2D
SUPPLY VOLTAGE (± VI
=-
I!!
13co
V
V
-5
V
0
>0->
10
~;;
51
i
~
5
-5 -10 -15 -20 -25
NEGATIVE SUPPLY VOLTAGE (VI
V.~ ±115V
~~
25'C.""""'
~
-55'C
~i\
~
0
0
25
Positive Current Limit
15
-20
-15
i1
0
0 25 50 75 100 125
TEMPERATURE ('CI
-55'C"TA"125'~_
CO"
"w
J5'rl25'C
160
150
140
130
120
110
100
i\\I\
0 I 2 3 4 5 6 7 8
OUTPUT SOURCE CURRENT (mAl
TLlH/9297-5
3-92
Typical Performance Characteristics (Continued)
Negative Current Limit
Output Voltage Swing
-15
"
w
'"~
co
>- -10
~z
.......-
y55'C
-5
~t
=
..
3D
~j
20
='"
=
~
125'C
\
\ 25'C\
0
5
10
15
20
OUTPUT SINK CURRENT (mA)
0
;i
::) !i
.,""
1.25
i'...
..........
I'....
......
20
!
Z
r---. r-
:;;:
=
1.5
::
1.0
~
'"
is
....
1011
i
I-- I--
I~
I - - I--
Vs= ±15V
TA=25'C
Ay=100/
r
w
!U
= ..
~i
~i
.,Z'"
:Ii
:Ii
=
100
lk
FREQUENCY (Hz)
8
..........
......
1.0
'"
0.5
w
~
....
:
yc• •
Vs= ±15V
RL=10k
TA=25'C
i'-..
.....
CMR~ = 2~ LOG V;M + OPEN LOOP
VOLTAGE GAIN
10
100
140
120
,'%
!!!
....
Iii
100
"'ill
80
",,,,
60
~
40
10M
RL=JOk
Vs= ±15V
TA a 25'C
""
80
60
40
~
-SUPPLY
'20
0
10
100
1
10
"
.........
I""
100 lk 10k lOOk 1M
FREQUENCY (Hz)
•
Equivalent Input
Noise Voltage
""-i'... ~UP~Yf'...
0 25 50 75 100 125
TEMPERATURE ('C)
120
lOOk
Vs= ±15V
TA=j5'C
"'-
FA~LlNGIRISING
~ iD 100
0
51
r---
140
~i
10k
FREQUENCY (Hz)
........
I I
160
co
Z
100
Open Loop Frequency
Response
10
0
lk 10k lOOk 1M
FREQUENCY (Hz)
Vs= ±15V
RL=10k
Ay=1
0
-50 -25
Power Supply
Rejection Ratio
i;;"
=Ii
0
!ii
10
vs-± 15V
RL= 10k
TA=25'C
Ay=1
OIST
\
lk
80
40
gj
1.5
0
iil-
20
S
~
-150
20
10k
~'
".~
10
RL -OUTPUT LOAD (kO)
20
100
60
0
~
-50 ~
.!!J
1
FREQUENCY (MHz)
>-
~!iiJi
160
w_
,.:ll
-100
30
Common-Mode
Rejection Ratio
120
f'
GAiN'
50
/Av-l0
10
~
III
PHASE
2.0
Undistorted Output
Voltage Swing
.- .-
0
140
r-:;
0.1
1
Slew Rate
150
Vs- ±15V
RL=10k
CL=10o pF 100
-3~
Tft·~ I-- I-'='
0
25
-20
0.5
z
5
10
15
20
SUPPlY VOLTAGE (± V)
0
0 25 50 75 100 125
TEMPERATURE ('C)
II
5
'" -10
0.5
2.0
IS
L
10
Bode Plot
Distortion vs Frequency
~
=
10
0.15
0.25
-50 -25
z
si!i
3D
1.0
2.5
...
E~
0
Vs= ±15V
RL=10k
CL=100 pF
1.50
i
=>
10
Gain Bandwidth
z
~- 20
~t
. .-
0
25
1.75
c;'
~~
VS= ±15V
25 TA=25'C
w
co_
~~
~~
3D
RL=10k
-55'C:sTA:s125'C .
40
~
5~
:;:iJi
Output Voltage Swing
50
Vs= ±15V
"
~
"
r--
10k lOOk
lk
FREQUENCY (Hz)
1M
70
w
i~
~;;:
;!s.
§~
~!i
fiI
60
50
40
r-.
3D
20
10
0
10
100
10k
lk
FREQUENCY (Hz)
lOOk
TL/H/9297 -6
3-93
,..
::u..
....I
r-----------------------------------------------------------------------------------~
Typical Performance Characteristics (Continued)
:;c
,..
;;-
....I
~
u..
:II
10
I
1
§: 100
r--l 0
If
:.v
lmY
Vs=±15V
TA=25°C
~
i
-55°C
, lOOk
...
~ 5°C
9
125°f
co
lk
RL-l0k
~
§
Inverter Settling Time
Output Impedance
1M Open Loop Voltage Gain
"'II'
"'II'
:0-
!!!
~
co
z
10
co
~
1,~
0.1
Vs=±15V
TA=25°C
co
'10k
5
10
15
SUPPLY VOLTAGE (±V)
20
0.01
I-
rltrtiWl
-10
100
lk
10k
lOOk
FREQUENCY (Hz)
1M
1
100
10
smLlNG TIME (,..)
TLlH/9297 -7
Simplified Schematic
VCC~--------e-------------~~----__,
-VEE~--~e-------e_--------~~----~
Pulse Response RL =
TL/H/9297-3
10 kn, CL = 10 pF
Small Signal Inverting
TIME (0.5 "s/DlV)
TL/H/9297 -8
3·94
.----------------------------------------------------------------------"
Pulse Response
."
01:>0
RL = 10 kG, CL = 10 pF (Continued)
01:>0
.....
,»......
Small Signal Non-Inverting
."
01:>0
01:>0
.....
'":z3i
"'w>
'''is
!:3;;;
c::>E
>c::>
.... U>
::>-
:=
::>
c::>
TIME (0.5 jLs/DlV)
TL/H/9297-9 .
Large Signal Inverting
'"3i
:z
'"w _
"'>
~~
c::»
.... "....
::>
>U>
::>
c::>
TIME (10 jLs/DlV)
TLlH/9297-10
Large Signal Non-Inverting
•
'":z
~w_
"'>
~~
c::»
....>!e,
e;
::>
c::>
TIME (10 jLs/OIV)
TL/H/9297-11
3-95
_
~
;;c
-~
r-~----------------------------------------------------------------I
Application Hints
The amplifier will drive a 10 kO load resistance to ± 10V
over the full temperature range.
This device is a low power op amp with an internally
trimmed input offset voltage and JFET Input devices
(BI-FET II). These JFETs have large reverse breakdown
voltages from gate to source and drain, eliminating the need
for clamps across the inputs. Therefore, large differential
input voltages can easily be accominodated without a large
increase in input current. The maximum differential input
voltage is independent of the supply voltages. However, neither of the Input voltages should be allowed to exceed the
negative supply as this will cause large currents to flow
which can result in a destroyed unit.
Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards
in a socket, as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the
intemal conductors and result in a destroyed unit.
, Because this amplifier is a JFET rather than MOSFET input
op amp it does not require special handling.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the
input to minimize "pick-up" and maximize the frequency of
the feedback pole by minimizing the capacitance from the
input to ground.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input
to AC ground) set the frequency of this pole. In many instances the frequency of this pole is much greater than the
expected 3 dB frequency, of the closed loop gain and consequently there is negligible effect on stability margin. However, if the feedback pole is less than approximately 6 times
the expected 3 dB frequency, a lead capacitor should be
placed from the output to the input of the op amp. The value
of the added capacitor should be such that the RC time
constant of this capaCitor and the resistance it parallels is
greater than or equal to the original feedback pole time constant.
Exceeding the negative common-mode limit on either input
will force the output to a high state, potentially causing a
reversal of phase to the output; Exceeding the negative
common-mode limit on both inputs, will force the amplifier
output to a high state. In neither case does a latch occur
since raising the input back within the common-mode range
again puts the input stage and thus the amplifier in a normal
operating mode.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
The amplifier will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
The amplifier is biased to allow normal circuit operation with
power supplies of ±3V. Supply voltages less than these
may degrade the common-mode rejection and restrict the
output voltage swing.
Detailed Schematic
~--~-------------------------------t-oV+
v,
Q19
V.. .lDluSt
3-96
TLlH/9297 -13
r-----------------------------------------------------------------------~
~Nalional
~
......
~ Semiconductor
r
BI·FET II ™ Technology
LF442A/LF442 Dual Low Power
JFET Input Operational Amplifier
General Description
Features
II
Y,o supply current of a LM1458
400 ",A (max)
50 pA (max)
1 mV (max)
10 ",vrc (max)
1 MHz
1 V/",s
35 nV/.JHz
0.01 pAl.JHz
10120
50k (min)
III Low input bias current
III Low input offset voltage
til
Low input offset voltage drift
iii High gain bandwidth
II High slew rate
•
•
II
II
Low noise voltage for low power
Low input noise current
High input impedance
High gain Vo = ±10V, RL = 10k
The LF442 is pin compatible with the LM1458 allowing an
immediate 10 times reduction in power drain in many applications. The LF442 should be used where low power dissipation and good electrical characteristics are the major considerations.
Ordering Information
Connection Diagrams
LF442XVZ
Metal Can Package
X indicates electrical grade
V indicates temperature range
R;
v+
"M" for military
"c" for commercial
Z indicates package type
"H" or "N"
vTL/H/9155-2
Top View
TL/H/9155-1
Note: Pin 4 connected to case
Simplified Schematic
Order Number LF442AMH, LF442ACH
orLF442CH
See NS Package Number H08B
% Dual
Vcco----....- - - - -.....-----,
Dual-In-Llne Package
Vo
V+
OUTPUT A
A-,40-_--I- OUTPUT B
INVERTING INPUT A
NON.INVERTING
INPUT A
3
INVERTING INPUT B
INTERNALLY
TRIMMED
-VEE
Tl/H/9155-4
Top View
o--. .--_~---_6-----I
TL/H/9'55-3
3-97
."
01:00
01:00
~
The LF442 dual low power operational amplifiers provide
many of the same AC characteristics as the industry standard LM1458 while greatly improving the DC characteristics
of the LM1458. The amplifiers have the same bandwidth,
slew rate, and gain (10 kO load) as the LM1458 and only
draw one tenth the supply current of the LM1458. In addition the well matched high voltage JFET input devices of the
LF442 reduce the input bias and offset currents by a factor
of 10,000 over the LM1458. A combination of careful layout
design and internal trimming guarantees very low input offset voltage and voltage drift. The LF442 also has a very low
equivalent input noise voltage for a low power amplifier.
Typical Connection
r
."
01:00
01:00
Order Number LF442CJ, LF442ACN or LF442CN
See NS Package Number J08A or N08E
Absolute Maximum Ratings
If MIlitary/Aerospace specified devices are required,
please contact the National Semiconductor sales
Office/Distributors for availability and specifications.
(Note 9)
LF442A
±22V
LF442
±18V
Differential Input Voltage
±38V
±30V
Input Voltage Range
(Note 1)
±19V
±15V
Output Short Circuit
Duration (Note 2)
Continuous
Continuous
Supply Voltage
Tjmax
8JA (Typical)
(NoteS)
(Note 4)
6JC (Typical)
Operating Temperature
Range
Storage Temperature
Range
H Package
150'C
N Package
115'C
65'C/W'
165'C/W
21'C/W
(Note 4)
114'C/W
152'C/W
(Note 4)
-65'CS:TAS:150'C -65'Cs:TAS:150'C
Lead Temperature
(Soldering. 10 seconds)
ESD rating to be determined.
260'C
260'C
DC Electrical Characteristics (Note 6)
Symbol
Parameter
LF442A
Conditions
Min
VOS
Input Offset Voltage
l:",vos/lJ.T
Average TC of Input
Offset Voltage
RS = 10kO
los
Input Offset Current
Vs = ±15V
(Notes 6 and 7)
Rs = 10 kO. TA = 25'C
LF442
Typ
Max
0.5
1.0
Min
Max
1.0
5.0
mV
7.5
mV
Over Temperature
Ie
Input Bias Current
Vs = ±15V
(Notes 6 and 7)
7
Tj = 25'C
5
10
7
25
5
Tj = 70'C
1.5
Tj = 125'C
10
10
Tj = 25'C
3
Tj = 125'C
20
Input Resistance
Tj = 25'C
Large Signal Voltage
Gain
Vs = ±15V, Vo = ±10V,
RL = 10 kO. TA = 25'C
Vo
Output Voltage Swing
VCM
Input Common-Mode
Voltage Range
CMRR
Common-Mode
Rejection Ratio
Rs
PSRR
Supply Voltage
Rejection Ratio
(Note 8)
Is
Supply Current
Over Temperature
Vs = ±15V. RL = 10 kO
s: 10kO
50
200
pA
nA
10
100
3
pA
nA
nA
25
1012
0
200
V/mV
25
200
15
200
V/mV
±12
±13
±12
±13
V
±16
+18
-17
±11
+14
-12
V
V
eo
100
70
95
dB
80
100
70
90
dB
300
3-98
50
nA
1012
RIN
AVOL
IJ-V/'C
1.5
50
Tj = 70'C
Units
Typ
400
400
500
IJ-A
r"TI
.a:o.
.a:o.
AC Electrical Characteristics (Note 6)
Symbol
Parameter
N
LF442A
Conditions
Min
=
TA
Coupling
(Input Referred)
SR
Slew Rate
Vs
GBW
Gain-Bandwidth Product
Vs
Equivalent Input Noise
Voltage
T A = 25°C, Rs
f = 1 kHz
Equivalent Input Noise
TA
en
in
=
=
=
25°C, f
=
Amplifier to Amplifier
1 Hz-20 kHz
±1SV, TA
±1SV, TA
25°C, f
=
=
=
=
Typ
LF442
Max
Min
-120
Typ
Units
Max
-120
dB
2SoC
O.B
1
0.6
1
V/pos
2SoC
O.B
1
0.6
1
MHz
35
3S
nV/,fHz
0.Q1
0.Q1
pAl,fHz
100.0.,
1 kHz
Current
l>
r'"
"TI
.a:o.
.a:o.
N
Note 1: Unless otherwise specified the absolute maximum negative Input voltage is equal to the negative power supply voltage.
Note 2: Any of the amplifier outputs can be shorted to ground Indefinitely, however. more than one should not be simultaneously shorted as the maximum Juncllon
temperatuns will be exceeded.
Note 3: The value given is in 400 linear feeUmin air flow.
Note 4: The value given Is in static air.
Note 5: These devices are available in both the commercial temperature range O'C ,; TA ,; 70'C and the military temperature range - 55"'C ,; TA ,; 125·C. The
temperature range is designated by the position Just befons the package type in the device number. A '"C'" Indicates the commercial temperature range and an '"M'"
Indicates the military temperature range. The military temperature range Is available In '"H'" package only.
Note 6: Unless otherwise specified, the specifications apply over the full temperature range and for Vs = ± 20V for the lF442A and for Vs = ± 15V for the lF442.
Vos, IB' and los are measured at VCM = O.
Note 7: The input bias currents are junction leakage currents which approximately double for every 10'C increase in the Junction temperature, TI' Due to limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operallon the Junction temperature nses above the ambient
temperature as a result of internal power dissipation, Po. TI = TA + 81APO where 81A Is the thermal resistance from Junction to ambient. Use of a heat sink Is
recommended If Input bias current is to be kept to a minimum.
Nole 8: Supply voltage rejection ratio Is measured for both supply magnitudes increasing or decreasing simultaneously In accordance with common practice from
± 15V to ± 5V for the lF442 and ± 20V to ± 5V for the lF442A.
Nole 9: Refer to RETS442AX for lF442AMH military specifications and to RETS442X for lF442MH military specifications.
•
3-99
..~
~
i
r------------------------------------------------------------------------------------------,
Typical Performance Characteristics
Input Bias Current
10k Input Bias Current
40
i
I8
~
30
Vs= ±15V
TA=25°C
i
/
./
10
i
"
~ 10
!!
~360
...iii
a:
a:
"
~ 100
1/
,.,. "
i
"
i
./
20
VCM=OV
VS=±15V
1k
-5
0
5
COMMON-MODE VOIJAGE (VI
:0
I:
:0
'"
Positive Common-Mode
Input Voltage Limit
25
,
-55°C:sTA:s125°C
",>
"'-
20
*!
15
Ill§!
10
"'IE!::
IE",
~~
,
o
o
"'"'>
0-
-20
0::1
-15
'~i
!hi
V'
B~
"'0
»
~
...
~i
Negative Current Limit
-15
'-
o
2
,
V
o
~
4
6
'"
20
~~
8
~
n
~
I'...
~
OUTPUT SINK CURRENT (mAl
ffi
...
~!!
~!
~
"r\
\
V
I(
o
-5 -10 -15 -20 -25
NEGATIVE SUPPLY VOLTAGE (VI
1\
-:.
~
~-
t\
r-
-
01234567
OUTPUT SOURCE CURRENT (mAl
Output Voltage Swing
30
.. '"
30
25
VS=±15V
~
'"
~I
0>
>-
:::::: ~ ....
1\
RL=10k
-55°C:sTA:s125°C
40
~
5
10
15
20
SUPPLY VOIJAGE (± VI
V
Output Voltage Swing
~~i'.'~~ f-
o
V
-
Positive Current Limit
50
Vs= ±15V
~
o
V
-5
10
15
20
25
POSITIVE SUPPLY VOIJAGE (VI
m
15
-10
o
~
I-rT
I I I
Negative Common-Mode
Input Voltage Limit
-55°C:sTA:S 125°C
V'
Illi
2!!
-25
0 25 ~ n
TEMPERmJRE (OCI
-55°C
240
200
-9-25
~
1""'1
I- 25°C
-,
u
1
-~
12~OC~
320
~ 280
./
-10
Supply Current
400
~%:
Vs= ±15V
25 TA=25°C
1/
20
...... 15 1/
ie!!
§!!:.
!;!
0
0
10
10
o
o
10
15
20
SUPPLY VOLTAGE (±VI
25
o
1
10
RL-OUTPUT LOAD (kill
100
TLlH/9155-5
3-100
Typical Performance Characteristics
1.75
Gain Bandwidth
1.50
i
z
c;;
~S
~i
::t!
1.25
1'00...
1.0
r-... .........
0.75
Bode Plot
30
VS=±15V
RL=10k
CL=100pF
(Continued)
20
r-:::
10
-, II
"
'"
z
<
~
.........
.
r--.. I"'---
0.5
-10
0 25 50 75 100 125
TEMPERATURE ('C)
Vs=± 15V
RL= 10k
T.=25'C
Av=l
OIST
\
\,'%
~
1.0
0.5
10
100
lk
FREQUENCY (Hz)
10k
Common-Mode Rejection
Ratio
~!
ge
~i
§j!
:e
8
140
r-.....
......
100
80
~'
':' VCM
120
§"Ill
..,-
100
~S!
.
~i
i'..
20 CMRR' = 2~ LOG VCM + OPEN LOOP
VOLTAGE GAIN Vo
10 100
z
""!""'-"-
60
40
~
Vs=±15V
T.=25'C
!:i _ 100
"""
"'~
~ i'
-SUPPLY
20
o
lk 10k lOOk 1M 10M
FREQUENCY (Hz)
60
III
40
70
'"
i'..
100
'"
9
z=
1M
100
co~
~
5
10
15
SUPPLY VOLTAGE (±V)
lOOk
Inverter Settling Time
I
r- '0mV
ItIl
1 mV
Vs=± 15V
TA=25'C
II.
10
1 mV
-5
0.1
0.01
20
I--- 10 mv'lIll
Vs= ±15V
T.=25'C
co
10k
lk
10k
FREQUENCY (Hz)
15
125'f
z
rr~~-nm-rTnr,-nm
""
lk
10k lOOk
FREQUENCY (Hz)
Output Impedance
~
-55'C
1"'-..
I'10
~
5'C
""
100 lk 10k lOOk 1M
FREQUENCY (Hz)
60 H--t-hH---l-t-Hf--HH-H-t-+tH
.,
~
10
Equivalent Input Noise
Voltage
e: 100
~
~
1
10
z
...'"'"
""
80
9~
z
+SUP!LY-
K.
RL-l0k
E'
lOOk
RL=10k
Vs= ±15V
T.=25'C
120
1
r--.......
80
Open Loop Voltage Gain
1M
!:!
~
lOOk
10k
FREQUENCY (Hz)
t---..
5!
10k,,:,
.......
Vs= ±15V
RL=lok
TA=25'C
60
40
o
160
140
o
lk
25 50 75 100 125
TEMPERATURE ('C)
Open Loop Frequency
Response
Power Supply Rejection
Ratio
160
120
0.4
-50 -25
20
o
0
-
I-'"
0.8 1 /
Undistorted Output Voltage
Swing
z
&3
V
FREQUENCY (MHz)
co 1.5
140
1.4
0.6
10
1
2.0
~
~~
1.2
-100
3D
is
1.6
"''''
!!!;;:;
"''''
2.5
:;;
~i
,.,
-150
0.1
VS=±15V
RL=10k
Av-l
1.8
-50 ~ ~
-3~
Distortion vs Frequency
§:
50
PHASE
GA;;;-"
-20
0.25
-50 -25
Slew Rate
150
VS-±15V
RL=IOk
CL=loopF 100
w.....J...-'JJ.-.L.....L...J..U....I....l..J.JJ.-.I,....l"w
100
lk
10k
lOOk
FREQUENCY (Hz)
1M
111100
-10
1
10
SmLlNG TIME (ps)
100
TLlH/9155-6
3-101
•
~
...r
i%:
....I
r-------------------------------------------------------------------------------------,
Pulse Response RL =
......
~
...r
10 kO. CL = 10 pF
Small Signal Inverting
Small Signal Non-Inverting
i%:
....I
",.
I
I
I
'\
/
\
,\
\
\
\
I'\...
TL/H/9155-7
TIME (0.5 ",/DIVl
TUH/9155-8
Large Signal Inverting
/
/.
j
,! ..
Large Signal Non-Inverting
1\
/
\,
I
.I
1\
'\
j
\
TIWE(10 ",/DIVl
TL/H/9155-9
TUH/9155-1D
3-102
Application Hints
The amplifiers will drive a 10 kO load resistance to ± 10V
over the full temperature range.
This device is a dual low power op amp with internally
trimmed input offset voltages and JFET input devices
(BI-FET II). These JFETs have large reverse breakdown
voltages from gate to source and drain eliminating the need
for clamps across the inputs. Therefore, large differential
input voltages can easily be accommodated without a large
increase in input current. The maximum differential input
voltage is independent of the supply voltages. However, neither of the input voltages should be allowed to exceed the
negative supply as this will cause large currents to flow
which can result in a destroyed unit.
Exceeding the negative common-mode limit on either input
will force the output to a high state, potentially causing a
reversal of phase to the output. Exceeding the negative
common-mode limit on both inputs will force the amplifier
output to a high state. In neither case does a latch occur
since raising the input back within the common-mode range
again puts the input stage and thus the amplifier in a normal
operating mode.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards
in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the
internal conductors and result in a destroyed unit.
Because these amplifiers are JFET rather than MOSFET
input op amps they do not require special handling.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the
input to minimize "pick-up" and maximize the frequency of
the feedback pole by minimizing the capacitance from the
input to ground.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many
instances the frequency of this pole is much greater than
the expected 3 dB frequency of the closed loop gain and
consequenty there is negligible effect on stability margin.
However, if the feedback pole is less than approximately 6
times the expected 3 dB frequency a lead capacitor should
be placed from the output to the input of the op amp. The
value of the added capacitor should be such that the RC
time constant of this capaCitor and the resistance it parallels
is greater than or equal to the original feedback pole time
constant.
The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
Each amplifier is individually biased to allow normal circuit
operation with power supplies of ± 3.0V. Supply voltages
less than these may degrade the common-mode rejection
and restrict the output voltage SWing.
Typical Applications
Battery Powered Strip Chart Preamplifier
TIME CONSTANT
151050100
sa: sa: sa: sa: sa:
Runs from 9v batteries (± 9V supplies)
Fully sellable gain and lime constant
Battery powered supply allows dlrecl plug·in interface to strip chart recorder without commonmode problems
1M
5M
10M
&OM
m.Ck
°1 i1
2I0Il;
XI
X5
118i
Xl0
> .....
OUTPUT TO
~)JST.,P
lUll
CHART
-15V
XIO Xloo
GAIN
TL/H/9155-11
3-103
N r.--------------------------------------------------------------------------..,.
~ Typical Applications (Continued)
"No FET" Low Power V -'F Converter
~..,.
1
~
03
10k
Trim 1M pot for
put
kHz full-scale out-
15 mW power drain
No Integrator reset Fer required
Mount 01 and 02 in close proximity,
1% linearity to 1 kHz
15'
TLlH/9155-12
High Efficiency Crystal Oven Controller
15.
• Tcontrol = 75°C
• A1's output represents the amplified difference between the LM335
temperature sensor and the crystal
oven's temperature
15Y
1.2M
lOOk
---,
1.2M
• A2, a free running duty cycle modulator, drives the LM395 to com-
I
I
I
plete a servo loop
lOOk
• Switched mode operation yields
high efficiency
I
I
I
1k
I
1k
I
I
L ________r'!!.M~E~A~'_ ~ _ ' _ _ _ _ .J
lOOk
• 1 % metal film resistor
15V 0-.....'1\1"'.........../
LM135
TEll'
SENSOR
,~O,'
TL/H/9155-13
Conventional Log Amplifier
5k
10"'
r-'W~-'-J\I\"""-15V
120k*
LMI85-1.2
LM394
15'
~.(O+-"""'M~~
OF:~~ f,+--IIM..-.-JV<>/YO--!I
vOLTAGE
ADJUST
-15'
TL/H/9155-14
EOUT = - [lOg 10
(~::) + 5]
RT = Tel Labs type OBI
Trim 5k for 10
!LA through the 5k-120k combination
"1 % film resistor
3-104
Typical
AppIDca~ilQ)D1s (Continued)
Ql, Q2, Q3 are included on LM3B9
amplifier chip which is temperaturestabilized by the LM3B9 and Q2-Q3,
Unconveniiorml Log Amplifier
which act as a heater-sensor pair.
Q1, the logging transistor, is thus immune to ambient temperature variation and requires no temperature
compensation at all.
B'--fl
l~JJ
lOOk
SCALE
FACTOR
ADJUST
_7_-1
02 6
\j
9
lN914
27
15V
2,2k*
.' '1
lk
TL/H/9155-15
Yo Dual
r-----V-------------------------------------ir-o v
+
81
11,7k
Vo
oI2 1--Ir--Q
019
TL/H/9155-16
3-105
~
~
.----------------------------------------------------------------------------,
i! ~National
.....
...J
~
~
i!
...J
~ Semiconductor
LF444A/LF444 Quad Low Power JFET
Input Operational Amplifier
General Description
Features
The LF444 quad low power operational amplifier provides
many of the same AC characteristics as the industry standard LM148 while greatly improving the DC characteristics
of the LM148. The amplifi.er has the same bandwidth, slew
rate, and gain (10 kO load) as the LM148 and only draws
one fourth the supply current of the LM148. In addition the
well matched high voltage JFET input devices of the LF444
reduce the input bias and offset currents by a factor of
10,000 over the LM148. The LF444 also has a very low
equivalent input noise voltage for a low power amplifier.
The LF444 is pin compatible with the LM148 allowing an
immediate 4 times reduction in power drain in many applications. The LF444 should be used wherever low power dissipation and good electrical characteristics are the major considerations.
• % supply current of a LM148
Simplified Schematic
Connection Diagram
•
•
•
•
•
•
•
200 /LA1 Amplifier (max)
50 pA (max)
Low input bias current
1 MHz
High gain bandwidth
1 VI/Ls
High slew rate
35 nV/v'Hz
Low noise voltage for low power
0.01 pAlv'Hz
Low input noise current
10120
High input impedance
50k (min)
High gain Vo = ±10V, RL = 10k
% Quad
LF444AMD/LF444CD/LF444ACN/LF444CN
Dual-In-Llne Package
VCCo----+-------e__--.
DUT4
IN4-
IN4+
y-
,+
y+
IN3-
DUT3
Vo
-VEE
o--......--~......- - -.....- - - - I
OUT 1
IN
TL/H/S156-1
IN z+
IN Z-
Dun
TL/H/9156-2
Top View
Order Number LF444AMD, LF444CD, LF444CJ,
LF444CM, LF444CWM, LF444ACN or LF444CN
See NS Package Number D14E, J14A, M14A, M14B or
N14A
Ordering Information
LF444XYZ
X indicates electrical grade
Y indicates temperature range
"M" for military, "C" for commercial
Z indicates package type "0", "M" or "N"
3-106
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
LF444A
±22V
±38V
±19V
LF444
±18V
±30V
±15V
Continuous
Continuous
Supply Voltage
Differential Input Voltage
Input Voltage Range
(Note 1)
Output Short Circuit
Duration (Note 2)
Power Dissipation
(Notes 3 and 9)
Tjmax
IIjA (Typical)
D Package
900mW
N, WM Packages
670mW
150'C
100'C/W
115'C
85'C/W
LF444A1LF444
(Note 4)
Operating Temperature Range
Storage Temperature Range
ESD rating to be determined.
-65'C ,,; TA ,,; 150'C
Soldering Information
Dual-In-Line Packages
(Soldering, 10 sec.)
260'C
Small Outline Package
Vapor Phase (60 sec.)
215'C
Infrared (15 sec.)
220'C
See AN-450 "Surface Mounting Methods and Their Effect
on Product' Reliability" for other methods of soldering surface mount devices.
DC Electrical Characteristics (Note 5)
LF444A
Symbol
Parameter
Conditions
Min
Vos
Input Offset Voltage
Rs = 10k, TA = 25'C
Typ
2
O'C,,; TA"; +70'C
AVos/AT
Rs=10kfi
lOS
Input Offset Current
Vs = ±15V
(Notes 5, 6)
Input Bias Current
Vs = ±15V
(Notes5,6)
Min
5
Tj = 25'C
"!J. =
Max
3
10
mV
12
mV
mV
10
"!J. =
Typ
8
5
25
5
10
25'C
50
10
AVOL
Large Signal Voltage
Gain
Vs = ±15V, Vo = ±10V
RL = 10 kfi, TA = 25'C
Vo
Output Voltage Swing
"eM
Input Common-Mode
Voltage Range
CMRR
Common-Mode
Rejection Ratio
Rs"; 10kfi
PSRR
Supply Voltage
Rejection Ratio
(Note 7)
Is
Supply Current
Over Temperature
nA
nA
1012
fi
100
V/mV
25
±12
±13
±12
±13
V
±16
+18
-17
±11
+14
-12
V
V
80
100
70
95
dB
80
100
70
90
dB
15
0.6
3-107
pA
3
100
50
25
Vs = ±15V, RL = 10 kfi
nA
100
20
1012
RIN
pA
nA
3
Tj = 125'C
Tj = 25'C
50
1.5
10
TL = 70'C
Input Resistance
/Lvrc
10
1.5
70'C
Tj = 125'C
Ie
Units
Max
6.5
-55'C,,; TA"; +125'C
Average TC of Input
Offset Voltage
LF444
0.8
V/mV
0.8
1.0
mA
AC Electrical Characteristics (Note 5)
Symbol
Parameter
LF444A
Conditions
Min
Typ
Amplifier-to-Amplifier
Coupling
LF444
Max
Min
Units
Typ
Max
-120
-120
dB
SR
Slew Rate
Vs = ±15V, TA = 25"C
1
1
V/",s
GBW
Gain-Bandwidth Product
Vs =
1
1
MHz
en
Equivalent Input Noise Voltage
TA = 25"C, Rs = 100n,
35
35
nV/.JHz
0.01
0.01
pAl.JHz
±15V, TA = 25"C
f = 1 kHz
Equivalent Input Noise Current
in
kHz
TA = 25"C, f = 1
Note 1: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply Yoltage.
Note 2: Any of the amplifier outputs can be shorted to ground indefinitely. however. more than one should not be simultaneously shorted as the maximum iunction
temperature will be exceeded.
Note 3: For operating at elevated temperature. these devices must be derated based on a thermal resistance of OjA.
Note 4: The LF444A is available in both the commercial temperature range O°C
s:
TA
s:
70"C and the military temperature range -55°C
s:
TA
s:
125°C. The
LF444 is available in the commercial temperature range only. The temperature range is designated by the position just before the package type in the device
number. A "C" indicates the commercial temperature range and an "M" indicates the military temperature range. The military temperature range is available in "0"
package only.
Note 5: Unless otherwise specified the specifications apply over the full temperature range and for Vs = ± 20V for the LF444A and for Vs = ± 15V for the LF444:
Vos. lB. and fos are measured at VCM = O.
Note 6: The input bias currents are junction leakage currents which approximately double for every 10°C increase in the junction temperature, Tj. Due to limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, PD. Tj = T A + 6jAPO where OjA is the thermal resistance from junction to ambient. Use of a heat sink is
recommended if input bias current is to be kept to a minimum.
Note 7: Supply voltage rejection ratio Is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from
± 15V to ± 5V for the LF444 and from ± 20V to ± 5V for the LF444A.
Note 8: Refer to RETS444AX for LF444AMD military specifications.
Note 9: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate
outside guaranteed limits.
Typical Performance Characteristics
Input Bias Current
Input Bias Current
...~
i....
~
30
...
!;
0
E
Vs= ±15V
TA=25°C
...~
/
/
20
10
1000 Supply Current
10k
40
~
/
V
'"
~
VCM-OV
Vs= ±15V
lk
....
'"
100
E
...~
10
/
1 800
i=
/
12J"C
600
25"C
_55°C
i:l 400
~
il:
/
ill
!;
200
./
-10
-10
1
-5
0
5
15
Input Voltage Limit
I'
10
~~
5
I'
E!:;
iI'
I'
-20
"'::::I
-15
~i
2 ...
2 ..
V
5~
V
...2:>'"
-10
z!;
-5
~~
0
5
10
15
20
POStTIVE SUPPLY VOtJAGE (V)
25
15
20
25
Positive Current Limit
~ .."
~
i:ico
V
>... >
.....
"'.....
/
vs = ±i 5V
l
;;;:::; ~
"'='
r':, r"J-
\~~
"r-.; 1\ 1\
10
'/l.
... z
/
6~
/
~
1/
5
\
1\
~
V
0
0
10
15
-55°CsTAS125°C
...Q>co-
5
SUPPLY VDtJAGE (±V)
-25
2"
~~
0
15 100 125
Negative Common-Mode
2!::
8~
50
Positive Common-Mode
-55"C"TA,,125"C
~~
2 ...
25
TEMPERATURE (OCI
25
20
0
COMMON-MODE VOLTAGE (V)
Input Voltage Limit
...Q>
co-
0
-50 -25
10
0
0
-5
-10
-15
-20
NEGATIVE SUPPLY
VOLTAGE (V)
-25
0
1
2
3
4
5
6
7
8
OUTPUT SOURCE CURRENT (rnA)
TLlH/9156-3
3-108
Typical Performance Characteristics
Negative Current Limit
-15
~
o
Output Voltage Swing
."" -
~~
RL=10k
-55°CsTA,,12SoC
40
~
~Q.
""~'.sl
"'t~
c>
>-
......
===
~2
('I
-~t~ ~
1\ 1\'
10
~
o
20
o
~5!
S~
:Ii
1.0
10
20
z
:;;:
""
-10
-30
50 75 100 125
w
~~
='"
c
Av=10o
160
140
Ed
120
ge
100
80
~~
;U
!i1
..
8
60
411
20
o
'"
10k
10
100
lk
~ ;,..,"10k,:"
10k lOOk 1M 10M
FREQUENCY (Hz)
lOOk
100
='1l
80
Ee
~i
60
III
40
~
20
;:
'"
"- ~
+SUP~LY"'- i".. I\..
-SUPPLY
o
10
100
lk
"
i'..
10k
FREQUENCY (Hz)
~
~OH5
RL=JOk
Vs= ±15V
TA'=2SoC
1411
~
120
Eliii'100
1"-
40
o
70
VS= ±15V
TA=j5 0 C
r--....
120
50
~
1
10
" ""'-1"'-...
100
lk
1"'-...
10k lOOk 1M
FREOUENCY (Hz)
Power Supply
Rejection Ratio
VS=±15V
~
RL=10k
TA=25°C
•
•
V
eMRR = 20 LOG ....!?!! + OPEN LOOP
VOLTAGE GAIN Vo
0
160
FREOUENCY (Hz)
140
Veil
o
-50-~
~
10
lk
z
~
0.5
>~
o
10k
lk
FA!LlNG1RISING
:t; Z" 80
~~ 60
Common-Mode
Rejection Ratio
........
~
'"
I
r-
Open Loop
Frequency Response
Vs-± 15V
RL= 10k
TA=25°C
Av=l
\<1% OIST
\
20
FREQUENCY (Hz)
;
1.0
w
20
0
100
TEMPERATURE (OC)
Av=10
100
~
-150
~~
10
c
Undistorted Output
Voltage Swing
.!3%:-
0.5
~
~
Vs= ±15V
RL=10k
Av=l
FREQUENCY (MHz)
~
1.0
3!
1.5
10
2.5
ti
S
-100
0.1
30
~
2.0
g
-50 jJ
III
III
Distortion vs Frequency
1.5
50
PHASE
GAiIl'-l\
TEr.IPERATURE (OC)
l!i
10
1
RL -OUTPUT LOAD (kD)
-III
-20
25
o
25
150
Vs- ±15V
RL=10k
100
CL=lo o pF
"
'"
- .
0.5
-50 -25 0
20
Slew Rate
30
~
0.25
15
Bode Plot
-r- I-
0.75
/
/
SUPPLY VOLTAGE (±V)
10
....... .......
:ij!;
20
Vs= ±15V
TA=25°C
10
Vs= ±15V
R!.=10k
CL=100 pF
~
10
......
20
Gain Bandwidth
2!;;!!. 1.25
15
~i
='"
<>
~
<»
OUTPUT SINK CURRENT (mA)
1.5
>-
~Q.
30
c
15
1.75
.-
25
w
w
~ if'o
o
Output Voltage Swing
30
50
VS- ±15V
f-
(Continued)
'"
r-....
lOOk
1M
Equivalent Input
Noise Voltage
60~++~~~+-~~~
50
i'
40
30
20
10
0
10
100
10k
lOOk
FREQUENCY (Hz)
TLlH/9156-4
3-109
Typical Performance Characteristics
Open Loop Voltage Gain
1M
Output Impedance
lk
RL=10k
5'C
J
~~
20
15
10
5
lmV
f- 1OmV
va= :t:15V
TA=2&'C
1,~
Va=:t:15V
TA=2&'C
\VOl
10k
~
I I
~
II
~
125'f
Inverter Settling Time
10
~.IA
-&5~
iii!!!'::
(Continued)
lk
SUPPLY VOLfAGE (:t:VI
10k
lOOk
f--10
1M
~II
1°nlll
1
100
10
1
FREQUENCY (HzI
smUNG TIME (",I
TLlH/9156-5
Pulse Response RL =
10 kG, CL = 10 pF
Small Signal Inverting
~
Small Signal Non-Inverting
I"
I
I
Ii!
~
III
~
g
I
""
""
""
~
1\
I
E
S.
I
.\
\
,
... .
",.
""
.\
~
~
I
i'....
,"
.... ..
,
,",
,
. ... ,
,.,
Large Signal Inverting
L
".,.
,','
1IIIE(O.5p./llIY)
TL/H/9156-6
I
n
/
E
...
\
TLlH/9156-7
Large Signal Non-Inverting
-
:\
I
~--~--
1\
\,
./
I
(
\
., ..
/
nME (10 p./DIV)
n"E(10,../D1'I)
TL/H/9156-8
TL/H/9156-9
3-110
Application Hints
The amplifiers will drive a 10 kO load resistance to ± 10V
over the full temperature range. If the amplifier is forced to
drive heavier load currents, however, an increase in input
offset voltage may occur on the negative voltage swing and
finally reach an active current limit on both positive and negative swings.
Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not Inadvertently installed backwards
In a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the
internal conductors and result in a destroyed unit.
Because these amplifiers are JFET rather than MOSFET
input op amps they do not require special handling.
This device is a quad low power op amp with JFET input
devices (BI-FETTM). These JFETs have large reverse breakdown voltages from gate to source and drain eliminating the
need for clamps across the inputs. Therefore, large differential input voltages can easily be accommodated without a
large Increase in input current. The maximum differential input voltage is independent of the supply voltages. However,
neither of the input voltages should be allowed to exceed
the negative supply as this will cause large currents to flow
which can result in a destroyed unit.
Exceeding the negative common-mode limit on either input
will force the output to a high state, potentially causing a
reversal of phase to the output. Exceeding the negative
common-mode limit on both inputs will force the amplifier
output to a high state. In neither case does a latch occur
since raising the input back within the common-mode range
again puts the input stage and thus the amplifier in a normal
operating mode.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
Each amplifier is individually biased to allow normal circuit
operation with power supplies of ± 3.0V. Supply voltages
less than these may degrade the common-mode rejection
and restrict the output voltage swing.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the
input to minimize "pick-up" and maximize the frequency of
the feedback pole by minimizing the capacitance from the
input to ground.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many
instances the frequency of this pole is much greater than
the expected 3 dB frequency of the closed loop gain and
consequently there is negligible effect on stability margin.
However, if the feedback pole is less than approximately 6
times the expected 3 dB frequency a lead capacitor should
be placed from the output to the input of the op amp. The
value of the added capacitor should be such that the RC
time constant of this capacitor and the resistance it parallels
is greater than or equal to the original feedback pole time
constant.
Typical Application
pH Probe Amplifier/Temperature Compensator
"·For R2 = SDk, R4 = 33Dk ± 1%
ForR2 = 1DOk.R4 = 75k ±1%
For R2 = 2DDk. R4 = 56k ±1%
"""Polystyrene
·Film resistor type RN6DC
To calibra1e. insert probe in pH =7 s0lution. Set the "TEMPERATURE ADJUST" po~ R2. 10 correspond 10 the
solution temperabJre: full clockwise for
O'C. and proportionately for Intermedi·
ate temperatures, using a tums-countIng dial. Then set "CALIBRATE" pot so
output reads 7V.
Typical probe =
#465-35
..... cw
TEMPEftATURE
ADJUST
R3 1.00k·
R4***
RB
3.3M
TUH/9156-10
Ingold Electrodes
3-111
Detailed Schematic
% Quad
~--~~----------------------------------~-oV+
81
11.7k
0121--+--....
019
TUH/9156-11
3-112
S
en
....
~National
~ Semiconductor
BI.FET "TM Technologv
lF451 Wide-Bandwidth
JFET-Input Operational Amplifier
General Description
Features
The LF451 is a low-cost high-speed JFET-input operational
amplifier with an internally trimmed input offset voltage (BIFET IITM technology). The device requires a low supply current and yet maintains a large gain bandwidth product and a
fast slew rate. In addition, well matched high voltage JFET
input devices provide very low input bias and offset currents. The LF451 is pin compatible with the standard
LM741, allowing designers to upgrade the overall performance of existing designs.
The LF451 may be used in such applications as high-speed
integrators, fast 01 A converters, sample-and-hold circuits
and many other circuits requiring low input bias current, high
input impedance, high slew rate and wide bandwidth.
•
•
•
•
•
•
•
•
Connection Diagram
Typical Connection
Internally trimmed offset voltage
5.0 mV (max)
Low input bias current
50 pA (typ)
Low input noise current
0.01 pAl,fHz (typ)
Wide gain bandwidth
4 MHz (typ)
High slew rate
13 VI p.s (typ)
Low supply current
3.4 mA (max)
High input impedance
1012n (typ)
Low total harmonic distortion Av = 10, <0.02% (typ)
RL = 10k, Vo = 20 Vp _ p, f = 20 Hz-20 kHz
• Low 1/f noise corner
50 Hz (typ)
• Fast settling time to 0.Q1 %
2 p.s (typ)
s.o. Package
Rf
v+
Ne
BALANCE
- INPUT
v+
+ INPUT
OUTPUT
v-
RI
BALANCE
TLlH/9660-2
Top View
Order Number LF451CM
See NS Package Number MOSA
vTLlH/9660-1
Simplified Schematic
~o-------~----------------~---,
•
vo
INTERNALLY
TRIMMED
INTERNALLY
TRIMMED
~o-----~--~--------------~--~
3-113
TL/H/9660-3
.,...
it)
i!
...I
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V + - V -)
Input Voltage Range
36V
V- s VIN S v+
ESD Susceptibility (Note 4)
2000V
Soldering Information (Note 5)
SO Package: Vapor Phase (60 sec)
Infrared (15 sec)
215·C
220·C
Differential Input Voltage (Note 2)
±30V
Operating Ratings (Note 1)
Junction Temperature (TJ MAX)
150·C
Temperature Range
Output Short Circuit Duration
Power Dissipation (Note 3)
TMIN s TA s TMAX
O·C s TA s +70·C
LF451CM
Continuous
125·C
Junction Temperature (TJ maxl
500mW
Supply Voltage (V+ - V-)
10Vto 32V
EI~ctrical
The following specifications apply for V+ = + 15V and V- = -15V. Bold·
face limits apply for T MIN to T MAX; all other limits T A = TJ = 25'C.
DC
Characteristics
LF451CM
Symbol
Parameter
Conditions
Typical
(Note 6)
Tested
Limit
(Note 7)
Vos
Maximum Input Offset Voltage
Rs = 10 kn, (Note 10)
0.3
5
los
Maximum Input Offset Current
(Notes 9, 10)
TJ = 25·C
TJ = 70·C
25
100
TJ = 25·C
TJ = 70·C
50
Is
Maximum Input Bias Current
(Notes 9, 10)
Design
Limit
(Note 8)
Units
mV
2
pA
nA
4
pA
nA
200
RIN
Input Resistance
TJ = 25·C
1012
AVOL
Minimum Large Signal
Voltage Gain
Vo= ±10V,RL=2kn
(Note 10)
200
50
25
V/mV
Vo
Minimum Output Voltage Swing
RL = 10k
±13.5
±12
±12
V
VCM
Minimum Input Common Mode
Voltage Range
+14.5
-11.5
+11
-11
+ 11
-11
V
V
CMRR
Minimum Common·Mode
Rejection Ratio
Rss10kn
100
80
80
dB
PSRR
Minimum Supply Voltage
Rejection Ratio
(Note 11)
100
80
80
dB
Is
Maximum Supply Current
3.4
3.4
mA
n
AC Electrical Characteristics
The following specifications apply for V+ = + 15V and V- = -15V. Bold·
face limits apply for T MIN to T MAX; all other limits T A = T J = 25·C.
LF451CM
Symbol
Parameter
Typical
(Note 6)
Conditions
Tested
Limit
(Note 7)
SR
Slew Rate
Av= +1
13
8
GBW
Minimum Gain-Bandwidth Product
f = 100 kHz
4
2.7
en
Equivalent Input Noise Voltage
Rs = 100n, f = 1 kHz
25
Design
Limit
(Note 8)
Units
V/p.s
MHz
nV/v'Hz
Equivalent Input Noise Current
Rs = 100n, f = 1 kHz
0.01
pAlv'Hz
in
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating ratings.
Note 2: When the input voltage exceeds the power supplies, the current should be limited to 1
rnA.
Note 3: The maximum pow~n dissipation must be derated at elevated temperatures and is dictated by TJ MAX, 0JA and the ambient temperature, TA. The maximum
allowable power dissipation at any temperature is Po = (TJ MAX - TA)/8JA or the number given in the Absolute Maximum Ratings, whichever is lower. For
guaranteed operation TJ max = 125'C. The typical thermal resistance (OJAJ of the LF451CM when board-mounted is 170'C/W.
Note 4: Human body model, 100 pF discharged through a 1.5 kG resistor.
Note 5: See AN-450 "Surface Mounting Methods and Their Effect on Product Reliability" (Appendix OJ for other methods of soldering surface mount devices.
Hate 6: Typicals are at TJ = 25°C and represent most likely parametric norm.
3-114
Nole 7: Tested limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Nole 8: Design limits are guaranteed to National's AOQL, but not 100% tested.
Nole 9: The Input bias currents are Junction leakage currents which approximately double for every 10'C Increase In the Junction temperature TJ. Due to limited
production test time, the Input bias currents are correlated to Junction temperature. In normal operation the Junction temperature rises above the ambient
temperature as a result of Internal power dissipation. Po. TJ = TA + 6JAPO where 6JA Is the thermal resistance from Junction to ambient.
Nole 10: Vos, Ie, AVOL. and lOS are measured at VCM = OV.
Note 11: Supply voltage rejection ratio Is measured for both supply magnitudes Increasing or decreasing simultaneously in accordance with common practice.
Typical Performance Characteristics
Open Loop Frequency
Response
Undlstorted Output
Voltage Swing
Distortion vs Frequency
r-r-r-..-..-.,.-.,.-..,.-n
VS·t1IV I
I
0.2
0.175
T~'21;C I
D.II
I
;
I
~
1..1.
o~o.IZI~.
vo·zoVpop
5
0.1
;;
~
Ay. 100
10k
~
t;a.a75
~
I~
~
:l;
I
9
o.D5D I-I-I-II-I-AI-v.-I,I-O-f.-+-..j+l
.~
E±:±::E::JE~~:1~
o.OZ:
10
lDO
Ii
10k
10Dk
lOOk
10k
i
I--+---I;---t',...."ol--+-I---l
I--+---I--+--+'-"<+-+---l
20
f---+---I--+--+-+'-"
.~
~
g
I~
S
I
0.1
I
A
~AV"'OO
~
G!
20
~
10
II
20
§
~
~
l!:
II
!
1
L
.~a
"'
'0 r--;'-nn~"rr"nnnn
III III VS""IV
10mV '(f
TA"n'c
5 1-++I-H*~'-m.,jV~--+1H+1-+l
10k
loak
FREQUENCY IH.I
1M
10M
1-++H'i,N.' mV t-t-+H+1f!
~ -I 1-+,'",Drimr=rV-RtII\--++lH-ttttl
~
0.01
11
H-t1rtt-t-t-ttH-+lrtt-+Htl
o'':"0-'-'-":,O...D..L....LJ.L,......L....LJ.L,0......L....u.LI
, DDk
:g
AV"IO
i.Yli1AV·'~1
100
r-r-n'TT'''''''T1T''"r'T'I~-rm
H-I-Ht-+tHH-ttlt+tHl
1H-I-Ht-+tHH-I-tlt+tHl
Hrl-iHt-+tHH-I-Ht-+tHl
~ 3Dt!j~:t1ii:~ut~~
~
!;
SUPPLY VOLTAGE l,vl
10M
Inverter Settling Time
TA"n'c
~
10k lOOk 1M
FREQUENCY IHd
VS'>1SV
100~~
10
&0
40
Output Impedance
oS
70
~
FREQUENCY IH.I
Open Loop Voltage
Gain (V/V)
Ik
FREQUENCY IH.I
1-.........
-1-""',,:--+--+-+-1
100
100
Equivalent Input
Noise Voltage
.. IZO f"'ood--+--+-+
10
60
Power Supply
Rejection Ratio
'---'---II..-..J....--I_-L--I
,
I--+---I,...."cl---+-+-+---l
40
FREQUENCY IH.I
Common·Mode
Rejection Ratio
I
80
o'---'-L....L..L.L.LI.Ll-...J.....l...I..J..J.I.llJ
FREQUENCY IHd
10K
100 - ,
I I ~\
I
l~
-10 L-..J......L..J...LIJWJ....l.JL..J-UWJ.II
0.1
I
10
SETTLING TIME 1.,1
TLlH/9660-5
3-115
~
~
r-----------------------------------------------------------------------------------------------,
Typical Performance Characteristics
Input Bias Current
120
6r--r--,--,--,---,
VAl"O
VS" .,IV
.e
!
:!
il
i
i
/v
./
80
20
10
:.s
0
5
10
o~~--~--~--~~
=~
fjt:
.....
i
!!
~~
V
/
8~
i~
~s
.
/
10
/
/
1=>
c
o
10
15
20
o
o
POSITIVE SUPPLY VOLTAGE (VI
E
,
I
;
~
E
..
Ii
-11
~
co
i...
..~
~.
..
>
-0
7rc
o
rc
20
10
J'
5
-5
~
-10
-15
30
o
5
21 ~
RL"n
CL "100,F
;
NegatiVe SYilng
15
TEMPERATURE rCi
ii
...
21
=
~,.
15
VS" "5V
TA"2I'C
10
V
0.1
..
. Slew Rate
lSI
PHASE
-10
15
IOU
RL"n
CL"IDOpF
&0
GAIN
II
RL - OUTPUT LOAO 'knr
I'~s" ,'IV
~
,/
o
....
.~
a
ill
l\
-50
!
l~
..515
wl
14
13
VS' "IV
RL"n
AV"I
FALLINO
-
~
RIJNB
12
-IDO
-1&0
-30
010213140501071
2&
20
-20
3
I
I
l'I..l
I 11
10
~
r--..
10
20
40
30
OUTPUT SOURCE CURRENT (mAl
~
I I J
I I I
10
31
V~' "~V
........
o
l''qI"C
O'C
Output Voltage Swing
Bode Plot
i""o
o
SUPPLY VOLTAGE ('VI
Gain Bandwidth
......
7rc
I
I
30
.¥r
I
PosItive SwIng
0
OUTPUT SINK CURRENT (mAl
•
20
J~
.1
RL .2kll
TA .25'C
15
-20
10
15
10
Voltage Swing
20
ZS'C
-Ii
10
,~
NEGATIVE SUPPLY VOLTAGE (VI
Negative Current Limit
-15
i
/
III
o
..§,.
i..
/
!ilt:
.!!
/
/
~>
15
25
Positive Current Limit
r- r-. L!o..
rc"TA,;;+7D"C
!;
/
10
Negative Common-Mode
Input Voltage Limit
20
0"C';;TA';;+7O"C
II
5
10
15
20
SUPPLY VOLTAGE ('VI
TEMPERATURE ('CI
Positive Common-Mode
Input Voltage Limit
21
o
010203040&06070
15
COMMon·MODE VOLTAGE IVI
.
1=
3r--r--+--+--~~
40
-15 -10
.!!
~
,,~"C -+----l--t
41-0 "ITA
80
o
~
Supply Current
,. Input Bias Current
¥:~
C 100
(Continued)
1.1
10
FREOUENCY IMH.I
100
11
010213040101070
TEMPERATURE rCI
TL/H/9660-4
3-116
r-
....""
Pulse Response
.Qo
U1
Small Signal Inverting
Small Signal Non-Inverting
>
Ci
>
:;:
:-CiE
E
co
e
...z
a
...
'"COl
!e
z
a
...
...
....co....'"
COl
i!
...
>
co
....
'"....
>
....
Ao
'"
I!:
'"
co
'"
co
TIME (O.2!lS1DIV)
TIME (O.2!lS1DIV)
TLlH/9660-6
TLlH/9660-7
Large Signal Inverting
Large Signal Non-Inverting
TIME (2!lS1DIV)
TIME (2!lS1DIV)
TLlH/9660-9
TL/H/9660-8
Current Limit (RL = 1000)
TIME (5!lS1DIV)
TL/H/9660-10
Application Hints
The LF451CM is an op amp with an internally trimmed input
offset voltage and JFET input devices (BI-FET II). These
JFETs have large reverse breakdown voltages from gate to
source and drain eliminating the need for clamps across the
inputs. Therefore, large differential input voltages can easily
be accommodated without a large increase in input current.
The maximum differential input voltage is independent of
the supply voltages. However, neither of the input voltages
should be allowed to exceed the negative supply as this will
cause large currents to flow which can result in a destroyed
unit.
Exceeding the negative common-mode limit with the non-inverting input, or with both inputs, will force the output to a
high state,' potentially causing a reversal of phase to the
output.
In neither case does a latch occur since raising the input
back within the common-mode range again puts the input
stage and thus the amplifier in a normal operating mode.
3-117
•
..
~
II)
IL
.....
r-----------------------------------------------------------------------------------------,
Application Hints (Continued)
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both
inputs exceed the limit, tlie output of the amplifier will be
forced to a high state.
The amplifier will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
put to an input should be placed with the body close to the
input to minimize "pick-up" and maximize the frequency of
the feedback pole by minimizing the capacitance from the
.
input to ground.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many
instances the frequency of this pole is much greater than
the expected 3 dB frequency of the closed loop gain and
consequently there is negligible effect on stability margin.
However, if the feedback pole is less than IIPproximately 6
times the expected 3 dB frequency a lead capacitor should
be placed from the output to the input of the op amp. The
value of the added capacitor should be such that the RC
time constant of this capacitor and the resistance it parallels
is greater than or equal to the original feedback pole time
constant.
The benefit of the S.O. package results from its very small
size. It follows, however, that the die inside the S.O. package is less protected from external physical forces than a
die in a standard DIP would be, because there is so much
less plastic in the S.O. Therefore, not following certain precautions when board mounting the LF451 CM can put mechanical stress on the die; lead frame, and/or bond wires.
This can cause shifts in the LF451CM's parameters, even
causing them to exceed limits specified in the Electrical
Characteristics. For recommended practices in LF451 CM
surface mounting refer to Application Nqte AN-450 "Surface Mounting Methods and Their Effect on Product Reliability" and to Section 6 "Surface Mount" found in any
Rev. 1 Linear Databook volume.
The LF451 is biased by a zener reference which allows normal circuit operation on ± 4V power supplies. Supply voltages less than these may result in lower gain bandwidth and
slew rate.
The LF451 will drive a 2 kO load resistance to ± 10V over
the full temperature range of O"C to + 70·C. If the amplifier
is forced to drive heavier load currents, however, an increase in input offset voltage may occur on the negative
voltage swing and finally reach an active current limit on
both positive and negative swings.
Precautions should be taken to ensure that tt19 power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards
in a socket as an unlimited current surge through the resulting forward diode wit~in the IC could cause fusing of the
internal conductors and result in a destroYEid unit.
Because these amplifiers are JFET rather than MOSFET
input op anips they are more resistant to ESD (see Absolute
Maximum' Ratings).
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order to ensure·stability. For example, resistors from the out-
Detailed Schematic
~o-------1----------------.------------~------------------__,
R5
2211
t---------~--ovo
R6
3011
~O---~~_+--;---~~---4---4--~-----+-----4--~------4-~
SUBSlRAlt
BALANCE
BALANCE
TLlH/9660-11
3-118
.-----------------------------------------------------------------------~r
~
'?'A National
~ Semiconductor
en
Co)
BI.FET II ™ Technology
LF453 Wide-Bandwidth Dual
JFET-Input Operational Amplifiers
General Description
Features
The LF453 is a low-cost, high-speed, dual JFET-input operational amplifier with an internally trimmed input offset voltage (BI-FET II technology). The device requires a low supply
current and yet the amplifiers maintain a large gain bandwidth product and a fast slew rate. In addition, well matched
high voltage JFET input devices provide very low input bias
and offset currents. The LF453 is pin compatible with the
standard LM1558, allowing designers to upgrade the overall
performance of existing deSigns.
The LF453 may be used in such applications as high-speed
integrators, fast 01 A converters, sample-and-hold circuits
and many other circuits requiring low input bias current, high
input impedance, high slew rate and wide bandwidth.
•
•
•
•
•
•
•
•
Typical Connection
Connection Diagram
Internally trimmed offset voltage
Low input bias current
Low input noise current
Wide gain bandwidth
High slew rate
Low supply current
High input impedance
Low total harmonic distortion
Av = 10, RL = 10k,
Vo = 20 V p_ p, f = 20 Hz-20 kHz
• Low 111 noise corner
• Fast settling time to 0.01 %
Rf
5.0 mV (max)
50 pA (typ)
0.D1 pAtVHz (typ)
4 MHz (typ)
13 V/p.s (typ)
6.5 mA (max)
1012{). (typ)
<0.02% (typ)
50 Hz (typ)
2 p.s (typ)
SO Package
v+
r---+-V+
OUTPUT A
RI
- INPUT A
2
OUTPUT B
+ INPUT A ~I-=~
v- ~f------'
- INPUT B
L-_+-_ + INPUT B
TL/H/9710-2
Top View
Order Number LF453CM
See NS Package Number M08A
vTL/H/9710-1
Simplified Schematic
v+o-----~---------_.--_,
•
INTERNALLY
TRIMMED
INTERNALLY
TRIMMED
~o------4---4----------------~--~
3-119
TL/H/971 0-3
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V+ -V-)
36V
Input Voltage Range
Differential Input Voltage (Note 2)
Soldering Information (Note 5)
SO Package: Vapor Phase (60 sec.)
'
Infrared (15 sec.)
,
Operating Ratings (Note 1)
V- ~ VIN ~ V+
Junction Temperature (TJ MAX)
Output Short Circuit Duration
Power Dissipation (Note 3)
ESD Susceptability (Note 4)
215'C
220'C
Temperature Range
LF453CM
±30V
15'0'C
Junction Temperature (TJ max)
Supply Voltage (V+ -V-)
Continuous
500mW
2000V
TMIN ~ TA ~ TMAX
O'C s; TA +70'C
125'C
10Vto 32V
DC Electrical
Charact~ristics The following specifications applyforV+ .,; +15VandV- = -15V. Boldface limits apply for TMIN to T MAX; all other limits TA = TJ = 25·C.
LF453CM
Symbol
Parameter
Conditions
Typical
(NoteS)
Tested
Limit
(Note 7)
100
Vas
Maximum Input Offset Voltage
Rs = 10 kll, (Note 10)
los
Maximum Input Offset Current
(Notes 9,10) TJ = 25'C
TJ = 700C
25
(Notes9,10)TJ = 25'C
TJ = 70'C
50
18
Maximum Input Bias Current
= 25'C
5
TJ
Vo= ±10V,RL=2kn
(Note 10)
Va
Minimum Output Voltage Swing
RL = 10k
VCM
Minimum Input Common
Mode Voltage Range
CMRR
Minimum' Common.Mode
Rejection Ratio
Rs s; 10 kn
PSRR
Minimum Supply Voltage
Rejection Ratio
(Note 11)
Is
Maximum Supply Current
Units
mV
2
pA
nA
4
pA
nA
200
1012
Input Resistance
Minimum Large Signal
Voltage Gain
RIN
AVOL
Design
Limit
(Note 8) ,
n
200
50
25
V/mV
±13.5
±12
±12
V
+14.5
-11.5
+11
-11
+ 11
-11
V
V
100
80
80
dB
100
80
80
dB
6.5
6.5
rnA
AC Electrical Characteristics The following specifications apply for V+ = + 15V and V- = -15V. Limits
apply for TA = TJ = 25·C.
LF453CM
Symbol
Parameter
Conditions
SR
Slew Rate
GBW
Minimum Gain-Bandwidth Product
Av = +1
f = 100kHz
en
Equivalent Input Noise \loltage
Rs
= 100n, f = 1 kHz
Typical
(NoteS)
Tested
Limit
(Note 7)
13
8
4
2.7
25
Design
Limit
(Note 8)
Units
V/ILS
MHz
nV/v'Hz
Equivalent Input Noise Current ,
0.01
RS = 100n, f = 1 kHz
pAlv'Hz
in
Note 1: Absoluts Maximum Ratings indicate limHs beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond Its specified operating ratings,
Note 2: When the input voltage exceeds the power s~pplies, the current should be limited to 1 mAo
Note 3: The maximum power dissipation must be derated at elevated temperatures and Is dicteted by TJ MAX, @JA and the ambient temperature, TA: The
maximum allowable power dissipation at any temperature Is Po = (TJ MAX - TAl/@JA or the number given in the Absolute Maximum Ratings, whichever Is lower,
For guarant..d operation TJ max = 12S'C. The typical thermal resiStance (@JAl of the LF453CM when board·mounted Is 160'C/W,
Nole 4: Human body model, 100 pF discharged through a I.S kn resistor.
Note 5: See AN-4S0 "Surface Mounting Methods and Their Effect on Product Reliability" (section titled "Surface Mount") for other methods of soldering surface
mount devices.
Nole 6: Typicals are at TJ = 2S'C and represent most likely parametric norm.
Nole 7: Tested limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Nole 8: Design limits are guaranteed to National's AOOL. but not 100% tested.
Note 9: The Input bias currents are junction leakage currents which approximately double for every 100C increase in the junction temperature TJ. Due to limited
production test time, the Input bias currents are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, Po, TJ = TA + @JA Po where @JA is the thermal resistance from iunction to ambient.
Note 10: Vas, Ie, AVOL and los are measured at VCM = OV.
NOle 11: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice,
3-120
Typical Performance Characteristics
Input Bias Current
Input Bias Current
Supply Current
120
..
Vs =±ISV
TA .2S'C
...
.. 100
.!!
-
BO
.
~
ill
i/
60
40
e..
it
iii
20
o
10 L-..I........J..........JL.-..I........J..........J'--.J
-15
-10
10
-5
o
15
1020
Positive Common-Mode Input
Voltage Limit
/
~
~§
~
~~
.
....~>
-
V
2:"
~
o
o
/
10
10
/
o
.
i..
~
-
-10
~
~
..
"/!
0
!i!"
25""C
-5
10·C
i
O'C
!i
!::
"
.."!Ii
w
~
-0
o
10
30
20
15
10
z
RL .2kll
TA .2S'C
5
·5
o
10
15
..'"
..:c
4.0
i""'- t'---
:::i
;;:
.....
3.5
ii
r--
!::
z
o
10 20 30 40
!i!
-5
~
-10
~
50 60
TEMPERATURE ('C)
I
I-"""
1"""--1\
·15
0.1
20
'"z
;}
10
0
~
r-
Gain
PhU.1
Margm
\
.."'I\
-10
70
-30
0.1
50
0
50
100
1.0
1.0
10
RL - OUTPUTLOAO (kn)
Slew Rate
·20
'"
3.0
~
Vs .±ISV 150
RL·2kll
CL -100 F 100
20
I'
~
Bode Plot
30
Vs .±I~1t
4.5 RL ·2Kn
:c
b
fi
5
w
I I I
I I I
NegatIVe SWing
~J~lW
A -2S'C
10
SUPPLY VOLTAGE ('V)
Gain Bandwidth
i
"
~
z
"'N. I
I I..,.
-20
OUTPUT SINK CURRENT (mA)
g
~
.J.o1" I
-15
40
Output Voltage Swing
Positive SWing
.....
-10
40
30
15
I IJ
,
zo
QUTPUT SQURCE CURRENT (mA)
Voltage Swing
20
;;:
~..
10
20
NEGATIVE SUPPLY VOLTAGE (V)
Negative Current Limit
-15
15
10
POSITIVE SUPPLY VOLTAGE (V)
~
D"C
/
o
ZO
15
'\ zr c
10··C
/
~~
"
"'I~
L
~
,,~
~~
u~
25
i""ol:!o..
15
~~
/
..
~
~~
20
Positive Current Limit
ItC$TA'f+1D'C
;;
V
10
u~
~
/
15
SUPPLY VOLTAGE ('V)
~
15
10
0
Negative Common-Mode Input
Voltage Limit
~
~
;;
~a
..
0
506010
20
o C:::;TA$:+10"C
~
40
2
TEMPERATURE ( C)
COMIJON·MOOE VOLTAGE (V)
20
3D
4
10
FREQUENCY (MH.)
150
100
..
~I:
]
.
"~ .
I!J ~
2:
~
=<
20
18 ~·ys .±I5V- I-- f-Falling
.2kll
16 r-~L
Av =+1
14
12
RiSing
10
I--
F=
4
2
o
o
10 20 30 40
50
60
70
TEMPERATURE rC)
TL/H/9710-4
3-121
~
Typical Performance Characteristics
Distortion vs Frequency
Undlstorted Output
Voltage Swing
3D
0.2
(Continued)
0.171
'.11
!D.l2I
~
i
i
IDO
-...
'"
...
ID
e
II
~
E
0.071
iii
!
U5D 1-~~~+-A.j..V-.1.j..07-1-'rJ-tI
i
o.U:~±::t:±~::~~~j
100
ID
1l1li
Ii
lID
j
IDD.
I
I : fv?Fi
I
.!!.
ID
III
Ik
~
~
!:
I I
50
40
I
60
;
20
30
§ 1111111111111111111
...
~
10
~
1M 10M
0'0
Open Loop Voltage Gain (V/V)
loa
RL ·n
TA. DOC TO +21"C
.....
.,..
~~
'"'".,rJ
.......-:
ID
Output Impedance
I5
Iico
5
~AV·IDD
Av· 'D
~
D.I
...,
..i.~
..,....
....
~
r
I
10
IIIII II
i::
•co
I
,
'A~.I!!! ~
IhlV
&
1&
SUPPLY VOLTAGE I,V)
'Ok
'OOk
2D
IDD
I.
IDk
IlDk
FREQUENCY 'Hz)
1M
10M
'I
VS·.IIV
TA· ZI'C
ImV
D
ImV
IDmV
-&
II
II
I!:
D.OI
11K
ID
'k
Inverter Settling Time
~
vs. ,IIV
TA·2n
c
TA·7D'C
!
&
'DO
FREQUENCY IHzI
1M
~
~ tllK
co
IDk lOOk 1M 10M
~'~v+H~~~~~
FREQUENCY 1Hz)
~
!
'-
Ik
Equivalent Input
~"
1l1li I .
100
70 Noise Voltage
,
T
I
II,
CMRR· 10 LOB
+ OPEN LOO.
VCM
VOL JADE ~AIN I
4G
I
IliI2D0
ID
I
FREIIUENCY 1Hz!
Vs·.IIV
RL-Zk
TA·II'C
I. I ~
IDO
~
2D
1M
Power Supply
Rejection Ratio
I~
,,
I\..
4G
FREQUENCY IH.)
Common·Mode
Rejection Ratio
LJ
o
RL·al
VS· .IIVTA·'I'C
0
100.
FREIIUENCY 1Hz!
=:
Open Loop
Frequency Response
..
D.I
i
12D
-ID
0.1
~\
1\'
I
ID
BEnUNB TIME '"'I
TL/H/971 0-5
3-122
....
."
Pulse Response
""en
Co)
Small Signal Inverting
Small Signal Non-Inverting
>
Ci
>
~E
>-E
e'"
e'"
'"z
'"z
~
~
III
III
::...'"co
>
=
!;
'"::...
co
>
I-
=
~
=
co
I-
co
TIME (UI's/DIY)
TIME (O.2l's/DIV)
TL/H/9710-6
TLlH/9710-7
Large Signal Inverting .
Large Signal Non-Inverting
>
is
>-e
'"
2:
~
III
"'"...co
>
...=
=
co
I-
II-
TIME (21's/DIV)
TIME (2I's/DIV)
TL/H/9710-B
TLlH/971 0-9
Current Limit (RL = 1000)
TIME (5jjS/DIV)
TL/H/9710-10
3-123
CO)
It)
~
....I
Application Hints
These devices are op amps with an internally trimmed input
offset voltage and JFET input devices (BI-FET 11). These
JFETs haife large reverse breakdown voltages from gate to
source and drain eliminating the need for clamps across the
inputs. Therefore, large differential input voltages can easily
be accommodated without a large increase in input current.
The maximum differential input voltage is independent of
the supply voltages. However, neither of the input voltages
should be allowed to exceed the negative supply as this will
cause large currents to flow which can result in a destroyed
unit.
in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the
internal conductors and result in a destroyed unit.
Because these amplifiers are JFET rather than MOSFET
input op amps they are more resistant to ESD (see Absolute
Maximum Ratings).
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the
input to minimize "pick-up" and maximize the frequency of
the feedback pole by minimizing the capacitance from the
input to ground.
Exceeding the negative common-mode limit with the non-inverting input, or with both inputs, will force the output to a
high state, potentially causing a reversal of phase to the
output. In neither case does a latch occur since raising the
input back within the common-mode range again puts the
input stage and thus the amplifier in a normal operating
mode.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance
from the input of the device (usually the inverting input) to
AC ground set the frequency of the pole. In many instances
the frequency of this pole is much greater than the expected
3 dB frequency of the closed loop gain and consequently
there is negligible effect on stability margin. However, if the
feedback pole is less than approximately 6 times the expected 3 dB frequency a lead capaCitor should be placed
from the output to the input of the op amp. The value of the
added capacitor should be such that the RC time constant
of this capaCitor and the resistance it parallels is greater
than or equal to the original feedback pole time constant.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may' be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
The benefit of the SO package results from its very small
size. It follows, however, that the die inside the SO package
is less protected from external physical forces than a die in
a standard DIP would be, because there is so much less
plastiC in the SO. Therefore, not following certain precautions when board mounting the LF453CM can put mechanical stress on the die, lead frame, and/or bond wires. This
can cause shifts in the LF453CM's parameters, even causing them to exceed limits specified in the Electrical Characteristics. For recommended practices in LF453CM surface
mounting refer to Application Note AN450 "Surface Mounting Methods and Their Effect on Product Reliability" and to
the section titled "Surface Mount" found in any Rev 1. linear Databook volume.
Each amplifier is individually biased by a zener reference
which allows normal circuit operation on ± 5V power supplies. Supply voltages less than these may result in lower
gain bandwidth and slew rate.
The amplifiers will drive a 2 kO load resistance to ± 1OV
over the full temperature range of O°C to + 70°C. If the amplifier is forced to drive heavier load currents, however, an
increase in input offset voltage may occur on the negative
voltage swing and finally reach an active current limit on
both positive and negative swings.
Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards
3-124
Detailed Schematic
v+O--------1~----------------~------------------~~--------------------_,
R9
22n
t-----------1---0 vo
RIO
30n
R6
20n
RB
160n
v-o-----1-----------*-_4----~--_6----~~------_4~----~--~------~~
SUBSTRATE
TLiH/9710-11
3-125
.~
r-----------------------------------------------------------------------------------~
~ ~National
~ ~ Semiconductor
BI.FET "TM Technology
LF13741
Monolithic JFET Input Operational Amplifier
General Description
The LF13741 is a 741 with BI-FETTM input followers on the
same die. Familiar operating characteristics-those of a
741-with the added advantage of low input bias current
make the LF13741 easy to use. Monolithic fabrication
makes this "drop-in-replacement" operational amplifier very
economical.
Applications in which the LF13741 excels are those which
require low bias current, moderate speed and low cost. A
few examples include high impedance transducer amplifiers, photocell amplifiers, buffers for high impedance, slow to
moderate speed sources and buffers in sample-and-hold
type systems where leakage from the hold capacitor node
must be kept to a minimum.
Systems designers can take full advantage of their knowledge of the 741 when designing with the LF13741 to
achieve extremely rapid "design times." The LF13741 can
also be used in existing sockets to make the "error budget"
for input bias and/or offset currents negligible and in many
cases eliminate trimming. For higher speed and lower noise
use the LF155, LF156, LF157 series of BI-FET operational
amplifiers.
Features
• Low input noise current
• High input impedance
• Familiar operating characteristics
0,01 pAlJHz
5 X 1011 0
Advantages
• FET inputs-741 operating characteristics
•
•
•
•
•
•
Low cost
Ease of use
Standard supplies
Standard pin outs
Non-rectifying input for RF environment
Rapid "design time"
Applications
•
•
•
•
•
•
•
•
•
Smoke detectors
I to V converters
High impedance buffers
Low drift sample and hold circuits
High input impedance, slow comparators
Long time timers
Low drift peak detectors
Supply current monitors
Low error budget systems
• Low input bias current
50 pA
• Input common-mode range to positive supply voltage
Simplified Schematic
Typical Applications
Inexpensive Microprocessor D/A
SERIAL DATA OUT
(LSB FIRsn
MICRO·
PROCESSOR
HOLD
ANALOG
CONTROL
OUTPUT
All on one die.
TL/H/9296-1
RESET
TL/H/9296-2
3-126
.....
."
W
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
Operating Temperature Range
±18V
O'Cto +70'C
100'C
±30V
±16V
Tj(MAX)
Differential Input Voltage
Input Voltage Range (Note 3)
Output Short Circuit Duration
Storage Temperature Range
H Package
0jA (Typical)
(Note 1)
70'C/W
(Note 2)
175'C/W
25'C/W
0jC (Typical)
Metal Package Lead Temperature
(Soldering, 10 sec.)
Plastic Package (Soldering, 4 sec.)
ESD rating to be determined.
Continuous
- 65'C to + 150'C
......
....
N Package
~
163'C/W
218'C/W
300'C
260'C
DC Electrical Characteristics (Note 4)
Symbol
Vos
Parameter
Input Offset Voltage
Conditions
Min
Rs = 10 kfi, TA = 25'C
Typ
Max
5
15
mV
Over Temperature
Voltage Offset Adjustment
Range
20
10
aVos/aT
Average TC of Input Offset
Voltage
Rs = 10kfi
los
Input Offset Current
Tj = 25'C (Notes 4, 5)
Ie
Input Bias Current
Units
mV
10
",VI'C
10
50
pA
2
nA
Tj = 25'C (Notes 4, 5)
50
200
pA
Tj"; 70'C
1.6
8
nA
5 X 1011
fi
100
V/mV
Tj"; 70'C
RIN
Input Resistance
Tj = 25'C
AVOL
Large Signal Voltage Gain
Vs = ±15V, TA = 25'C
Vo= ±10V,RL=2kfi
Vo
Output Voltage Swing
Vs= ±15V,RL= 10kfi
VCM
Input Common-Mode Voltage
Range
Vs = ±15V
CMRR
Common-Mode Rejection Ratio
PSRR
Supply Voltage Rejection Ratio
Is
Supply Current
Over Temperature
25
15
VlmV
±12
±13
V
±11
+15.1
-12
V
Rs,,;10kfi
70
90
dB
(Note 6)
77
96
2
3-127
dB
4
mA
AC Electrical Characteristics (Note 4)
Symbol
Parameter
Min
Typ
Max
Units
±1SV, TA = 2S"C
O.S
V/pos
Gain-Bandwidth Product
Vs =
±1SV, TA = 2S"C
1.0
MHz
Equivalent Input Noise Voltage
TA = 2S"C, Rs
f ='100Hz
f = 1000Hz
Slew Rate
GBW
en
in
Conditions.
Vs =
SR
Equivalent I nput Noise Current
= 1000
Tj = 2S"C
f = 100Hz
f = 1000Hz
SO
nV/.JHz
37
nVl./Hz
0.01
0.01
pAl./Hz
pAl./Hz
Note I: The value given Is in 400 Unear Feet/Min air flow.
Note 2: The value given is in static air.
Note 3: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
Note 4: These specifications apply for Vs
=
±15V and O'C ,;; TA ,;; +70"C. Vos, la. and los are measured at VCM
= O.
Note 5: The Input bias currents are junction leakage currents which approximately double for every IO"C Increase in the junction temperature, TJ. Due to limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, Po. TJ = TA + 8jA Po where 8jA is the thermal resistance from junction to ambJent. Use of a heat sink Js
recommended if input bias current is to be kept to a minimum.
Note 6: Supply Voltage Reiection Ratio Is measured for both supply magnitudes increasing or decreasing simultanaously in accordance with common practica from
Vs '" ±IOV to ±15V.
3-128
Typical Performance Characteristics
Input Bias Current
..~
l
Input Bias Current
V~='15V
1110
TA-n"C
i
J
80
~
ii
40
~
!
2D
~
.
~~~~~~!~~!~
1 1 1 1 1 1/
ltl
B
o
-10
0
-5
100
1 1 1 1
1 1
10
1 L 1 1
1 1
10
10
COMMON./,IOOE VOLTAGE (V)
2:
.'"
-15 ;-.
~
....
\
w
-10
..
00
30
40
F-: 1"'-1'0..
60
2.4
'"~
>
1.6
!
0.9
o
70
V
o
\
~ t\
1\
10
"
15
a~
.. w
....
.....
..
.. c
~!:i
O!:>
O.'C
10
f
V
5
20
3D
40
10
z!
RL -2k
D"CSTA S+7D"C
15
/
ec
~
w"
>00
~~
~!!
10
1/
o
5
ro
l/
::
~
24
i
20
.~00
16
>
5
.,~
~
10k '--'_-'-_-'-_"'----''--J
5
10
15
20
2D
NEGATIVE SUPPLY VOLTAGE (V)
12
V
V
0.1
3D
I-+-+-+-+-+-h/q...-l
ZO
1-+-+-I--ho4-I-+--I
i
~
~
!i:
Slew Rate
~
i
1200
;
1100
;
1000
.
..!
..
0.9
VS"i15V
0.1
I-...
0.7
I""r--.....
900
~ BOO
10
I-+-+A-I--I--+-+--l
i::
700
iii
--
.. 600
00
600
SUPPLY VOLTAGE (tV)
10
OUTPUT LOAD (RL) kn
SUPPLV VOLTAGE (.V)
Gain Bandwidth
~
20
Vt-
Vs= ±15V
TA = 2S"C
4
1300
..
15
w
/V
5
10
Output Voltage Swing
.
.,~
.
5
L
21
10m
o-c -s; TA ~ +10~C
1I
It''
lL
POSITIVE SUPPL V VOLTAGE (V)
Open Loop Voltage Gain (V IV)
20
"'w
",,,,
o
40
3D
OUTPUT SOURCE CURRENT (mA)
Negative Common-Mode
Input Voltage Limit
we>
.,:;!::
20
25
IrC::;;TA$.+10·C
i5~
70"C
10
20
20
Sl!!::
C
-5
OUTPUT SINK CURRENT ImA}
15
Positive Common-Mode
Input Voltage Limit
..
/Zr
~
SUPPLVVOLTAGE (.V)
w
>
I
50
!ii
Positive Current Limit
O'CSTAST7D"C
~
20
3.2
TEMPERATURE ("C)
Negative Current Limit
~
~
0"CSTAS+7D"C
;c
.!
~
&0
~
laO
~
1/
Supply Current
4
E~CM=OV
FVS-115V
'"
::
w
~
..
c
'"
~
1L6
0.5
0.4
0.3
D.2
0.1
o
0
10
20
3D
40
50
TEMPERATURE I"C)
60
10
0
10
20
3D
40
50
60
10
TEMPERATURE ("C)
TLlH/9296-3
3-129
~
~
C':I
r------------------------------------------------------------------------------------------,
Typical Performance Characteristics
5
Bode Plot
2D
1&
"
i
!i
.
vs-uW
:--..~
lD
100
10
10
10
60
&0
0
-6
-10
-1&
-40
-4&
-'.10
J
1\~A1N
\,
40
30
PHASE
-'.15
III
20
10
1111
-10
0.1
Common-Mode Rejection
Ratio
I
128
Q
100
i ......
= ID
.~
w
.,
.,
i=
80
40
I
~
!:i
Vs·;t1liV
RL -21
TA -I&'C
AV-l
<1"0IST
II
~
""
.
"
o
10
100
lk
10k
lOOk
FREQUENCY (Hz,
Undlstorted Output
Voltage Swing
Z1
II
z
20
10
12
;
140
Equivalent Input
Noise Voltage
~j!
120
100
I-
i
aD
.,~
"
1M
~
ao
40
I
I-~~""",---+-
10 I-~~.r--~~+-~
i
~
..
Power Supply Rejection
Ratio
r--,--r-"'T""-'T"""'-'
100
I-~-~--+--~~
1--+--+-+--+--1
20
o I..-.....L_...I..__' - - - L _ - I
10M
10
100
lk
10k
lOOk
1M
FREQUENCY (Hz)
Output Impedance
11
t-:1~tulI~+tIW~:tIj1l
~I ~IIIIIIII
i
~
iii 120
:!!
i
Vs' .,&V
RL-2k TA-25'C
FREQUENCY (MHz)
t
(Continued)
i""'lIi
40
aa
o
lk
10k
lOOk
1M
FREQUENCY (Hz'
2: 10
100
lk
10k
0,1
100
FREDUENCY (Hz)
10k
lk
lOOk
1M
FREQUENCY (Hz)
TLlH/929B-4
LF13741 Pulse Responses
Small Signal Inverting
Pulse Response
Small Signal Non-Inverting
Pulse Response .
.' TIME D.5 ~s/DIV
TIME 0.5 ~S/DIV
TL/H/9296-B
TL/H/929B-5
Av =
+ 1(Followerj
Av
3·130
=
-1(lnverter)
r-----------------------------------------------------------------------------, r"T1
....
Typical Performance Characteristics (Continued)
.....
....
LF13741 Pulse Responses (Continued)
Co)
.1:00
Large Signal Non-Inverting
Pulse Response
Large Signal Inverting
Pulse Response
TIME 10 ps/DIV
TIME 10 ps/DIV
TL/H/9296-7
TL/H/9296-6
Application Hints
GENERAL CHARACTERISTICS
The LF13741 makes the job of converting from a bipolar to
an FET Input op amp easy. As a systems designer you are
probably very familiar with the operating characteristics of a
741 op amp. In fact, many of you have used 741s with FET
input followers-that's just what the LF13741 is, but it's all
on a single die.
When you need a low cost, reliable, well known op amp with
low input currents and moderate speed, use an LF13741.
If you take only one of the Inputs of the LF13741 Into the
first range, the output phase will remain correct. When you
take both inputs into this range the output will go toward the
positive supply voltage.
If you force either or both of the inputs into the second
range, an internal diode will be turned "ON." Unless you
externally limit the diode current to about 1 mA, the device
will be destroyed. In either case, limited or unlimited input
current, you cannot predict the output.
DIFFERENTIAL INPUTS
You don't have to use clamps across the inputs for dlfferentiallnput voltages of less than 40V. The Input JFETs of the
LF13741, in addition to being well matched, have large reverse breakdown voltages from gate to source and drain.
HANDLING
You do not have to take any special precautions In handling
the LF13741. It has JFET, as opposed to fragile MOSFET,
inputs.
POSITIVE INPUT COMMON-MODE
VOLTAGE LIMIT
With the LF13741 (unlike the normal 741) you can take both
inputs above the positive supply voltage by more than 0.1 V
before the amplifier ceases to function. This feature enables
you to use the LF13741 to monitor and/or limit the current
from the same supply used to power it (see typical applications).
If you exceed the positive common-mode voltage limit on
only one Input, the output phase will remain correct. When
you exceed the limit on both inputs, the output phase is
unpredictable.
APPLYING POWER
You should never: reverse the power supplies to the
LF13741; plug a part in backwards in a powered socket or
board; make the negative supply voltage more positive than
an Input voltage.
Anyone of these supply conditions will forward bias an Internal diode. If you have not externally limited the resulting
current, the device will be destroyed.
LAYOUT
To ensure stability of response you should take care with
lead dress, component placement and power supply decoupiing. For example, the body of feedback resistors (from
output to Input pins) should be placed close to the inverting
input pin. Noise "pickup" and capaCitance to ground from
the input pin will be minimized-effects which are usually
desirable.
Because of the very low Input bias currents of the LF13741,
speCial care should be taken in printed circuit board layouts
to prevent unnecessary leakage from the input nodes, (see
Typical Applications).
NEGATIVE INPUT COMMON-MODE
VOLTAGE LIMIT
There are two negative input voltage ranges of interest:
1. The range between the negative common-mode voltage
limit and the negative supply voltage.
2. Voltages which are more negative than the negative supply voltage.
3-131
•
Y- ~-----------------------------------------------------------------------------------------,
~
Y-
~
Application Hints (Continued)
FEEDBACK POLE
You create a feedback pole when you place resistive feedback around an amplifier. The parallel resistance and capacitance from the input of the device (usually the inverting
input) to AC ground set the frequency of the pole. In many
instances the frequency of this· pole is much greater than
the expected 3 dB frequency of the closed loop gain and
there is negligible effect on stability margin. However, if the
feedback pole is less than approximately six times the expected 3 dB frequency (a distinct possibility when using FET
op amps), you should place a lead capaCitor from the output
to the input of the op amp. The value of the added capaCitor
should be such that the RC time constant of this capacitor
and the resistance it parallels is greater than or. equal to the
original feedback pole time constant (Figure 1).
C2
R2
VTUH/9296-9
Parasitic Input capacitance CI '" (3 pF for LFI3741 plus any addnlonal
layout capacitance) Interacts with feedback elements and' creates undesirable high frequency pole. To compensate, add C2 such that R2C2 '" RICI.
FIGURE 1
Typical Applications (Continued)
Circuits Using Guard Rings to Prevent Leakage Currents Between Inputs and VGuarded Voltage Follower
Guarded Inverting Amplifier
RI
y+
>"""4I_O VOUT
>:""-0 VOUT
TL/H/9296-10
PC Layout
AV=
.
-~
RI
R3 = RIIIR2
TLlH/9296-11
PC Layout
O---n
OUTPUT
B O---0UTPUT
GriARO
TLlH/9296-12
01
TL/HI9296-13
Typical Applications (Continued)
Guarded Instrumentation Amplifier
V·
R2
lOOk
V-
RI
10k
~--OVOUT
R3
10k
R6
lOOk
R4
lOOk
DC REFERENCE
VOLTAGE
OR GROUND
V-
_ VOUT ~~. RI ~ RS R2 ~ R4
VIN
RI'
,
-CMRR depends upon RI-RS,
R2-R4 matching
-Trim R4 to boost CMRR
-RS, R6 5% resistors
VTL/H/9296-14
Bridge Amplifier
>",-oVOUT
ForR,>R
V
o
~
VREF
2
(~)
R
(_a
)
l+a
TL/H/9296-15
3-133
•
~
~
C")
r-----------------------------------------------------------------------------------------------,
Typical Applications (Continued)
~
U.
Auto Zero Circuit for LF356
....I
r-""'1........-o I&V
Uk
Ik
51k
TL/H/9296-16
o Wnh the output having a 10k load resistor minimum pulse width to zero '" 800 itS
o The capacitor on the output reduces the output switch glnch
Long Time Timer
114 LF1JJJJ
y.
TIME
S
RESET
Ultra-Low (or High) Duty Cycle
Pulse Generator
15V
RI
---~
,.914
R2
....-I..--JV.IIY_....OOUTPUT
c*
y+
T
1M
1M
1M
• Low leakage capacitor
OUTPUT
yTUH/9296-18
4.8 - 2Vs
o loUTPUT HIGH'" RIC
In 4.8 _ Vs
o loUTPUT LCN/ '" R2C
In Vs _ 7.8
2VS -7.8
TUH/9296-17
where Vs = V+ +
·
Cl V
o TIme =
THRESHOLD
'i;"
o Output goes high on time out
• Reverse op amp I"puls for output low on time out
• Cl low leakage capacitor
3-134
lv-I
r
....
.....
....
."
Typical Applications (Continued)
Co)
n
~
Up/Down Staircase Generator/Step and Hold
UP
o!:
16
1/4LF13333
HOLD
6
V-
Y
~£ .is
&
1/4 LFI3333
4,:,
1
1
1
1
1
1
I
I
I
I
12
STEP
II'
1114 LFI3333
11/4 LFI3333
1
1
I
I
1
I
1&
1&
UP
V-
DOWN
TLlH/9296-19
Supply Current Indicator/Limiter
Low Drift Adjustable Voltage Reference
r-_ _....,2N411rB_ _ _.,
RS
VSUPPLY o-..."""M".......
---+----+ ~~~~ra~~:_:c"T10N
250k><......- -......
1&V
IN914
RI
300t
V-
• VREF
TL/H/9296-20
= 10 (P' +
RI + R2)
R2
10"loss (I - ":r,sy
• VOUT switches high when Rs Is > Vo
IBOt
• Trim 250k potentiometer for drift adjust
TLlH/9296-21
• Trim lOOk potentiometer for VREF adjust
Low Drift Peak Detector
T
Ch
VOUT
RR/
RECOVERY
TIME ADJUST
':'
TLlH/9296-23
'Low leakage capacitor
3·135
Typical Applications (Continued)
. Ultra-Low Drift Peak Detector
2Dk
YOUT
v-
RR
RECOYERY TIME
'::' AOJUST
• Low leakage capacitor
TUH/9296-24
oBy adding 01 and R,. VOl ~ 0 during hold mode. Leakage of 02 provided by feedback path through Rf.
oLeakage of circuit is 18 plus leakage of Ch.
003 clamps VOUT AI to VIN - V03 to improve speed and to limit the reverse bias of 02.
-Maximum input frequency should be
« %'IT Af C02. where C02 is the shunt capacitance of D2.
Comparator with Offset Adjust for HI-Z Inputs
Low Current Ammeter
or
YOUT
RS
Y-
0.1 "F
TL/H/9296-25
V- + 3V,;; VIN';; V+ + O.IV
Y'::'
TL/H/9296-26
3-136
IFULLSCALE
RF
Rs
100nA
1.5M
1.5M
500nA
300k
300k
lp.A
300k
0
5p.A
60k
0
10p.A
30k
0
50p.A
6k
0
100p.A
3k
0
.-
."
Typical Applications (Continued)
Long Time Integrator
Precision Current Sink
V+
RESET
.IOUT
---,
--.r-
INTEGRATE
I
.....
W
.....
,j::o.
.....
C*
R
R
12
1
>-C>-O VOUT = RC /
VIN DIT
TL/H/9296-28
11
lOUT ~
VIN
FI' where lOUT';; loss
-Low leakage capacitor
VTL/H/9296-27
Photo Cell Amplifier (I to V Converter)
R
>-C_OVOUT
VOUT ~ loR
':'
V-
VTLiH/9296-29
Connection Diagrams
(Top Views)
TO-99 Metal Can Pacl(age
Dual-In-Line Package
•
NC
BALANCE
INPUT
INPUT
V-
VTUH/9296-30
Note: Pin 4 connected to case.
TL/H/9296-31
Order Number LF13741H
See NS Pacl(age Number HOSC
Order Number LF13741N
See NS Package Number NOSE
3-137
o ,-------------------------------------------------------------------,
C')
o
o
o
::I:
..J
......
C')
~National
PRELIMINARY
~ Semiconductor
o
o
o
::I:
..J
LH0003/LH0003C
Wide Bandwidth Operational Amplifier
General Description
Features
The LH0003/LH0003C is a general purpose operational
amplifier which features: slewing rate up to 70 VI p,s, a gain
bandwidth of up to 30 MHz, and high output currents.
The LH0003 is specified for operation over the -55'C to
+ 125'C military temperature range. The LH0003C is specified for operation over the O'C to + 85'C temperature range.
•
•
•
•
Typically 0.4 mV
Very low offset voltage
Large output swing
High CMRR
Good large signal
frequency response
> ± 10V into 100n load
Typically > 90 dB
50 kHz to 400 kHz depending on compensation
Schematic and Connection Diagrams
Cl
_C~O~M~P~-+_---~~~~
'---t-__ l0
~~~MP
COMPENSATION
5 COMP
R3
R4
10K
10K
R5
TL/H/5561-2
lK
Top View
v-
Order Number LH0003H or LH0003CH
See NS Package Number H10G
TL/H/5561-1
Typical Compensation
Full Output Frequency
Slew Rate
pF pF RL> 2000, V/l"BeC RL> 2000 VOUT = ± 10V
Cl C2
Circuit Gain
:>40
:>10
:> 5
:> 2
:> 1
3-138
0
5
15
50
90
0
30
30
50
90
70
30
15
5
2
350
'00
250
100
50
1
kHz
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications,
(Note 3)
±20V
Supply Voltage
Power Dissipation
Differential Input Voltage
Load Current
Operating Temperature Range
LHOO03
LHOO03C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
ESD rating to be determined.
See Curve
±7V
Input Voltage
120mA
- 55·C to + 125·C
O·Cto + 85·C
-65·Cto + 150·C
260·C
Equal to Supply
Electrical Characteristics (Notes 1 & 2)
Parameter
Conditions
Input Offset Voltage
Min
Typ
Max
Units
0.4
3.0
mV
0.02
0.2
p.A
0.4
2.0
p.A
1.2
3
mA
Rs < 1000
Input Offset Current
Input Bias Current
Supply Current
Vs = ±20V
Voltage Gain
Output Voltage Swing
RL = 100k, Vs = ±15V, VOUT = ±10V
20
70
V/mV
RL = 2k, Vs = ±15V, VOUT = ±10V
15
40
V/mV
±10
±12
V
100
kO
Vs = ± 15V, RL = 1000
Input Resistance
Rs ~ 1000
Average Temperature
Coefficient of Offset
Voltage
4
Average Temperature
Coefficient of Bias
Current
p.V/·C
-
8
nAl·C
CMRR
Rs < 1000, Vs = ±15V, VIN = ±10V
70
90
dB
PSRR
Rs<1000,Vs= ±15V,aV=5Vt020V
70
90
dB
Equivalent Input
Noise Voltage
Rs = 1000,f = 10 kHz to 100 kHz
p.Vrms
1.8
Vs = ±15Vdc
Note 1: These specifications apply for Pin 7 grounded, for ±5V < Vs < ±20V, with capacitor Cl = 90 pF from Pin 1 to Pin 10 and C2 = 90 pF from Pin 5 to
ground. over the specified operating temperature range, unless otherwise specified.
Note 2: Typical values are for TA = 25'C unless otherwise specified.
Note 3: Refer to RETS0003X for LH0003H military specifications.
Typical Performance Characteristics
Maximum Power
Dissipation
llHN1
800
&00
INFINITE HEAT SINK
0
'\
" !'
50
f,:;;·af
10
,
B
6
4
11 J I
J I I I
25
Vs -±15V
tA = 2S·C
'2
NO HEAT SINK
8JA - 200' CIW
111111111
,4
I'8" - 111' CIW
400
200
Large Signal
Frequency Response
~!::O'F ~ IINlIII\11
100
TEMPERATURE rCI
'2S
104
10'
10'
FREQUENCY 1Hz!
10'
I v".,sv_
I '.' 2S'C
120
100
80
RL"" 1001t
R"2DIlfi~
60
40
20
0
:UWU NJlJrl N
1S
Open Loop
Frequency Response
'6
I-- -
~L.L
C2'0
" ",
C"90:~
C2'90,F
"\\
"
100 10' 102 l[i3 IDol 105 10& 10' 10S
FREQUENCY 1Hz!
TL/H/5561-5
3-139
~
g
Typical Applications
::r:
....I
"-
High Slew Rate Unity Gain Inverting Amplifier
§::r:
....I
)------.----OuTpuT
lK
lK
20K
. .--------~Nv_--~-...J1\f\jrv_1NPUT
TL/H/5561-3
Unity Gain Follower
v'
100 pF
lK
INPUT
--4...'VlI/Iv-"--(
l---oft--
OUTPUT
v-
lK
100 pF
TLiH/5561-4
3-140
.-------------------------------------------------------------------------, :J:
~
~ NatDo81la~
Q
Q
Q
~ Semiconducltor
~
~
:J:
Q
Q
Q
lH0004/lH0004C High Voltage Operational Amplifier
o-'="
lJ Low input offset current typically 20 nA for the LH0004
General Description
and 45 nA for the LH0004C
[] Low input offset voltage typically 0.3 mV
[] Frequency compensation with 2 small capacitors
CI Low power consumption 8 mW at ± 40V
The LH0004/LH0004C is a general purpose operational
amplifier designed to operate from supply voltages up to
±40V. The device dissipates extremely low quiescent power, typically 8 mW at 25'C and Vs = ±40V.
The LH0004's high gain and wide range of operating voltages make it ideal for applications requiring large output
swing and low power dissipation'.
Applications
[] Precision high voltage power supply
1:1 Resolver excitation
iii Wide band high voltage amplifier
III Transducer power supply
The LH0004 is specified for operation over the - 55'C to
+ 125'C military temperature range. The LH0004C is specified for operation over the O'C to + 85'C temperature range.
Features
C Capable of operation over the range of ± 5V to ± 40V
iii Large output voltage typically ± 35V for the LH0004
and ±33V for the LH0004C into ,a 2 kn load with
±40V supplies
Schematic and Connection Diagrams
r-~cr------_c~--~cr------_C>_~9 v'
R2
401(
BIAS .;;6_06..."
BIAS
-INPUT
COMPENSATION
";"---+--"'"Il
TL/H/5559-2
Note: Pin 7 must be grounded or connected to a
voltage at least 5V more negative than the positive
supply (Pin 9). Pin 7 may be connected to the nega·
tive supply; however, the standby current will be in
creased. A resistor may be inserted in series with
Pin 7 to Pin 9. The value of the resistor should be a
maximum of 100 kn per volt of potential between
Pin 3 and Pin 9.
e
'INPUT
10 CLAMP
COMP -1___~------~----~----~::~----r_~ANO
COMPENSATION
5
Order Number LH0004H or LH0004CH
See NS Package Number H10G
COMP---+---~~~
R3
300K
R4
300K
R5
50K
~--~----Ir------~--vTL/H/5559-1
3-141
•
~
o
o
o
:::z:::
..J
i
o
:::z:::
..J
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 2)
Supply Voltage, Continuous
Short Circuit Duration
±45V
400mW
±7V
Power Dissipation (see Curve)
Differential Input Voltage
Input Voltage
3 sec
Operating Temperature Range
LHOO04
LHOO04C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
ESD rating to be determined.
- 55°C to + 125°C
O°Cto +85°C
- 65°C to + 1500C
2600C
Equal to Supply
Electrical Characteristics (Note 1)
Parameter
LHOOO4
Conditions
Min
= 25°C
LHOOO4C
Typ
Max
0.3
Units
Typ
Max
1.0
2.0
0.3
1.5
3.0
mV
Min
Input Offset Voltage
Rs::;; 1000., TA
Rs::;; 1000.
Input Bias Current
TA
= 25°C
20
100
300
30
120
300
nA
Input Offset Current
TA
= 25°C
3
20
100
10
45
150
nA
Positive Supply Current
Vs
Vs
110
150
175
110
150
175
/l-A
80
100
135
80
100
135
/l-A
Negative Supply Current
Voltage Gain
Output Voltage
CMRR
PSRR
Average Temperature
Coefficient Offset Voltage
= ±40V, TA = 25°C
= NOV
Vs = ±40V, TA = 25"C
Vs = ±40V
Vs = ±40V, RL = 100k, TA = 25°C
VOUT = ±30V
Vs = ±40V, RL = 100k
VOUT = ±30V
Vs = ±40V, RL = 10k
Vs = ±40V, Rs ::;; 5k
VIN = ±33V
Vs = ±40V, RS ::;; 5k
AV = 20Vt040V
Rs::;; 1000.
Average Temperature
Coefficient 01
Offset Current
Equivalent Input
Noise Voltage
Rs = 1000, Vs = ±40V
1 = 500 Hz to 5 kHz, TA = 25°C
30
60
30
10
60
VlmV
10
±35
±30
±33
3-142
±30
V
70
90
70
90
dB
70
90
70
90
dB
4.0
4.0
/l-VrC
0.4
0.4
nArC
3.0
3.0
/l-Vrms
Note 1: These specifications apply for ±5V ,;; Vs'; ±40V, Pin 7 grounded, with capacRorsCl = 39 pF between Pin 1 and Pin 10, C2
ground, - 55°C to + 125"C for the LH0004, and O"C to + 85°C for the LH0004C unless otherwise specified.
Note 2: Refer to RETSOO04X for LH0004H milRary specHicatlons.
VlmV
= 22 pF between Pin 5 and
r::I:
o
o
o
~
r::I:
o
o
o
Typical Applications
Voltage Follower
InputOHset
Voltage Adjust
RI·
y+
.a:o.
(')
>--·-4I....-OUTPUT
5M
1
C2
22
'May be zero or equal
5M
to source resistance for
minimum offset.
PF
TLlH/5559-3
y-
External Current
Limiting Method
TL/H/5559-4
High Compliance
Current Source
Dl
10K
D2
+40
D3
D4
10K
EIN
4
8
DUTPUT
...--
>-~
RLI'M
±E 1N
10 = TiiK
'v, = average 10{Ward
-
V,*
vollage drop 01
diodes 01 to 04
al 20 p.A to 50 p.A.
10K
RLIM
TL/H/5559-5
ZZpF
~
10K
TLlH/5559-6
3·143
•
Typical Performance Characteristics
cs Input Voltage Range
80
-ssoe f- I---'
TA •
~w
..~
~
35
.
25
i
15
...
v.
v..,"
>
~
a:
c- 1--
~·I
16
5
j
...
E
I~
&0
40
t-
20
r-
!i
I
I
o
8
o
35
25
45
o
Negative Supply Current
160
..
TA
T. -26'C""
~
!C
i
T.-IZS'C ""
--
II
-1---
48
o
•
..
~
w
~
>
~e~ ~ ;;:
20
;;;;
l- I-
48
•
I- r-
0.1
10
>
r--
~
>
40
30
i
80
80
10M
V
,-
'-
1
III
1
1 RL = l00HO
1 MINUS SOURCE
T•. -125'C ;--
o
21
10
3D
40
SUPPLY VOLTAGE (,vl. .
w
.
2P
~
~~
.... 1--"'
40
o
D
20
10
40
30
SUPPLY VOLTAGE (tVI
SUPPLY VOLTAGE (>VI
1"\ l'
q;
TAo -2SoC
T,,--SSDC
70
40
40
Large Signal
Frequency Response
Package Power Dissipation
Vs '" t40V
'j'2j'C
\
'\
It
ll111k
FREDUENCY (Hzl
'"
0 IP ,.,...
~
;:
30
"
:l:
.6
80
,.....,
10--
80
~
"K Ct-cz-. ,..... rI'.
Cl~39~
CZ-ZZ,F 1"\ l"\
I
..~
30
20
- ----
8
SUPPLY VOLTAGE ('VI
R,-It
r- p
I r r- I--
10
TA '121'C ....
RL-ID
10
I.
TA 12J,c
l-
T,,"'ZSDC_
120
a:
~
I I
I I
120
.
ill
"-
Open Loop Frequency
Response
Vs =:!:av
I
180
j
10
...
~ ~ I--
~
-
l-
-
~.L
TA =-5&'C _
C
.!!
~
120
8
;:
!ril
=_ssDe
Jc-
'"..~
Positive Supply Current
110
...ill
-
iD
I I
T 1_ 26
1I
100
SUPPLY VOLTAGE (.VI
SUPPLY VOLTAGE ('VI·
C
.!!
Voltage Gain
Input Bias Current
20
-
o
~
\'
\
10
It
800
9JC
400
I zao
FREDUENCY (Hzl
o
100M
12PCfW
Nl(
1\
'\
J J" .1\
9,. - 250' CfW
"
lOOk
~
NO HfAT SlNl(
a:
\1\
.\
0.1
I.,
1 1,\ IIIRNITEHEAT
1 1 '\ .
"~
Cl'38pF ,\CI=C2=0
-C2-22pF
10
100
I I
1 I
o
511
I"
'\
"
100
1511
TEMPERATURE ('CI
TL/H/5559-7
3-144
,-------------------------------------------------------------------------, :::c
~
~National
Q
2
~ Semiconductor
~
5:
~
o
Q
LH0020/LH0020C High Gain Operational Amplifier
General Description
Features
The LH0020/LH0020C is a general purpose operational
amplifier designed to source and sink 50 mA output currents. In addition to its high output capability, the LH00201
LH0020C exhibits excellent open loop gain, typically in excess of 100 dB. The parameters of the LH0020 are guaranteed over the temperature range of - 55·C to + 125·C and
± 5V ~ Vs ~ ± 22V, while those of the LH0020C are guaranteed over the temperature range of O·C to +85·C and
±5V ~ Vs ~ ±18V.
Output current capability, excellent input characteristics,
and large open loop gain make the LH0020/LH0020C suitable for application in a wide variety of applications from
precision DC power supplies to precision medium power
comparator.
• Low offset voltage typically 1.0 mV at 25·C over the
entire common-mode voltage range
• Low offset current typically 10 nA at 25·C for the
LH0020 and 30 nA for the LH0020C
• Offset voltage is adjustable to zero with a single potentiometer
• ±14V, 50 mA output capability
Schematic and Connection Diagrams
COMPENSATION
OFFSET A:.;OJ;;.US;.;T_ _ _......I
•
COMPENS~~~~~
4
9
INPUT GNO
COMPEN·
SATION
10
vTLlH/5554-1
4 HI--f-l
INVERTING
INPUT
Top View
Order Number LH0020G or LH0020CG
See NS Package Number G12B
3-145
TLlH/5554-2
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 3)
Supply Voltage
±22V
Power Dissipation
1.5W
Differential Input Voltage
±30V
±15V
Input Voltage (Note 1)
Output Short Circuit Duration
Operating Temperature Range
LH0020
LH0020C
Storage Temperature
Lead Temperature (Soldering, 10 sec.)
ESD rating to be determined.
Continuous
- 55'C to + 125'C
O'Cto +85'C
-65'Cto + 1500C
300'C
Electrical Characteristics (Note 2) Tmin ,;; TA ,;; Tmax unless otherwise specified
Parameter
\
LHOO20
Conditions
Min
LHOO20C
Typ
Max
Min
Units
Typ
Max
Input Offset
Voltage
Rs';; 1000, TA = 25'COverTemp.
1.0
2.0
2.5
4.0
1.0
3.0
6.0
7.5
mV
mV
Input Offset
Current
TA = 25'C Over Temp.
10
50
100
30
200
300
nA
nA
Input Bias
Current
TA = 25'C Over Temp.
60
250
500
200
500
800
nA
nA
Supply Current
Vs = ±15V, TA = 25°C
3.5
5.0
3.6
6.0
mA
Input Resistance
TA = 25'C
0.6
1.0
0.3
1.0
Large Signal
Voltage Gain
MO
Vs = ±15V, RL = 3000, Va = ±10V, TA = 25'C
Vs = ±15V, RL = 3000, Va = ±10V, TA = 25'C
100
50
300
50
30
150
V/mV
V/mV
Output Voltage
Swing
Vs = ± 15V, RL = 3000, TA = 25'C Over Temp.
14.2
14.0
14.5
14.0
13.5
14.2
V
V
Output Short
Circuit Current
Vs = ±15V, RL = 00, TA = 25'C
25
120
Input Voltage
Range
Vs= ±15V
Common-Mode
Rejection Ratio
Rs';; 1000
100
±12
90
130
±12
96
90
140
rnA
V
96
dB
Power Supply
Rs';; 1000
90
96
90
96
dB
Rejection Ratio
Note I: For supply voltages less than ±15V, the absolute maximum Input voltage Is equal to the supply voltage.
Note 2: These specifications apply for ±5V :s: Vs :s: ±22V for the LH0020, ±5V :s: Vs :s: ±18V for the LH0020C, pin 9 grounded, and a 5000 pF capaCitor
between pins 2 and 3, unless otherwise specffied.
Note 3: Refer to RETS0020G for LH0020G militiary specifications.
3-146
r
:::E:
Typical Applications
Q
Q
Offset Adjustment
~
r
Unity Gain Frequency Compensation
+15
:::E:
CI
5DOD pF
Q
Q
N
Q
11
n
OUTPUT
°Rs
IK
>-*-OUTPUT
INPUT .....""'''''''.......-t
'RS C2
~
3 X 10-1
°CZ
3DDpF
-15
TL/H/5554-3
TL/H/55S4-4
3-147
....
(,)
;g ~National
o
3..... ~ Semiconductor
....
"IS'
.0
o LH0021/LH0021C 1.0 Amp Power Operational Amplifier
3..... LH0041/LH0041 C 0.2 Amp Power Operational Amplifier
....
(,)
('II
o
o
....3....
('II
g
3
General Description
The LH0021/LH0021C and LH0041/LH0041C are general
purpose operational amplifiers capable of delivering large
output currents not usually associated with conventional IC
Op Amps. The LH0021 wil provide output currents in excess
of one ampere at voltage levels of ± 12V; the LH0041 delivers currents of 200 rnA at voltage levels closely approaching the available power supplies. In addition, both the inputs
and outputs are protected against overload. The devices
are compensated with a single external capaCitor and are
free of any unusual oscillation or latch-up problems.
Features
1.0 Amp
0.2 Amp
±12V into 100
±14V into 1000
• Output current
• Output voltage swing
• Wide full power bandwidth
• Low input offset
voltage and current
(LH0021)
(LH0041)
(LH0021)
(LH0041)
15 kHz
1mV and 20 nA
100 mW at ± 15V
• Low standby power
3.0Vl/J-s
• High slew rate
100 dB
• High open loop gain
The excellent input characteristics and high output capability of the LH0021 make it an ideal choice for power applications such as DC servos, capstan drivers, deflection yoke
drivers, and programmable power supplies.
The LH0041 is particularly suited for applications such as
torque driver for inertial guidance systems, diddle yoke driver for alpha-numeric CRT displays, cable drivers, and programmable power supplies for automatic test equipment.
The LH0021 is supplied in a 8-pin TO-3 package rated at 20
watts with suitable heatsink. The LH0041 is supplied in both
12-pin TO-8 (2.5 watts with clip on heatsink) and a power 8pin ceramic DIP (2 watts with suitable heatsink). The
LH0021 and LH0041 are guaranteed over the temperature
range of - 55'C to + 125'C while the LH0021 C and
LH0041C are guaranteed from -25'C to + 85'C.
Schematic and Connection Diagrams
Y+
CASE IS
Isc+
Rsc·
OUTP~
sc-
se'
yo
v+
NON-INY.
INPUT
INY. INPUT
GND
r---:::--+--9 cowp
C (EXT) 3000 pf
.C>-~-~~-i-Oo~
TL/K/10115-2
Top View
Order Number LH0021K or LH0021CK
See NS Package Number K08A
COMPo
Y-
GND
TUK/10115-1
"Rsc external on "Gil and uK" packages. Rsc internal
on uJ" package. Offset Null connections available
only on "G" package.
OUTP~
'~~8
,
NON-IHV.
INP~
NC
2
7
1~~iJT
GND
3
6
OUTPUT
yo
4
5
COWP.
TUK/10115-22
Top View
TUK/10115-3
Order Number LH0041G or LH0041CG
See NS Package Number G12B
Order Number LH0041CJ
See NS Package Number HY08A
3-148
r-
::J:
Absolute Maximum Ratings
CI
If Military/Aerospace specified devices are required,
pleaae contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
±18V
Output Short Circuit Duration (Note 3)
Operating Temperature Range
LH0021/LH0041
LH0021C/LH0041C
Storage Temperature Range
See curves
±30V
±15V
Power Dissipation
Differential Input Voltage
Input Voltage (Note 1)
Peak Output Current (Note 2)
LH0021/LH0021C
LH0041/LH0041C
Continuous
-55'Cto + 125'C
- 25'C to + 85'C
-65'C to + 150'C
Lead Temperature (Soldering, 10 sec.)
300'C
....N
o
......
r-
::J:
....""
......
r-
::J:
CI
CI
....
Limits
Parameter
Conditions
LH0021
Min
Input Offset Voltage
Rs';; 100n, Tc = 25'C
Rs';; 100n
Voltage Drift with Temperature
Rs';; 100n
LH0021C
Offset Voltage Change with Output Power
Tc = 25'C
Offset Current Drift with Temperature
Offset Current Drift with Time
Typ Max
1.0
3.0
5.0
3.0
6.0
7.5
3
25
5
30
5
Tc = 25'C
Input Resistance
Tc = 25'C
0.3
Input CapaCitance
15
5
20
/LV/watt
100
300
50
200
500
nA
nA
0.1
1.0
0.2
1.0
2
300
1.0
1.0
200
0.3
3
Common Mode Rejection Ratio
Rs';; 100n, aVCM = ± 10V
Input Voltage Range
Vs = ±15V
Power Supply Rejection Ratio
Rs';; 100n, aVs = ± 10V
Voltage Gain
Vs
RL
Vs
RL
=
=
=
=
70
90
70
±12
±15V, Vo = ±10V
1 kn, Tc = 25'C,
±15V, Vo = ±10V
100n
/LV/'C
/LV/week
5
100
nArC
nAlweek
500
1.0
1.0
nA
/LA
Mn
3
pF
90
dB
±12
V
80
96
70
90
dB
100
200
100
200
V/mV
25
V/mV
20
±13.5 ±14
±11.0 ±12
±13 ±14
±10 ±12
V
V
Output Voltage Swing
Vs = ±15V, RL = 100n
Vs = ±15V, RL = 10n, Tc = 25'C
Output Short Circuit Current
Vs = ±15V, Tc = 25'C, Rse = 0.5n
1.2
1.6
1.2
1.6
Power Supply Current
Vs = ±15V, Your = 0
2.5
3.5
3.0
4.0
rnA
Power Consumption
Vs = ±15V, Your = 0
75
105
90
120
mW
AC Electrical Characteristics for LH0021 /LH0021 C (TA =
Slew Rate
Av = +1, RL = 100n
Power Bandwidth
RL = 100n
0.8
Small Signal Overshoot
aVIN = 10V, Av = + 1
Overload Recovery Time
Harmonic Distortion
f = 1 kHz, Po = 0.5W
Input Noise Voltage
Rs = 50n, B.W. = 10 Hz to 10 kHz
Input Noise Current
B.W. = 10 Hz to 10 kHz
3-149
Amps
25'C, Vs = ± 15V, Cc = 3000 pF)
0.8
3.0
1.0
20
Small Signal Transient Response
0.8
o""
mV
mV
30
2
Input Bias Current
Units
Typ Max Min
5
Offset Voltage Drift with Time
Settling Time (0.1 %)
::J:
g
CI
CI
2.0 Amps
0.5 Amps
DC Electrical Characteristics for LH0021 /LH0021 C (Note 4)
Input Offset Current
S
....
......
r-
3.0
V//LS
20
kHz
0.3
1.0
0.3
1.5
/Ls
5
20
10
30
%
4
4
/Ls
3
3
/Ls
0.2
0.2
%
5
5
/LVrms
0.05
0.05
nArms
•
o....
00:1'
o
o
DC Electrical Characteristics forLH0041/LH0041C(Note4)
3......
Limits
....00:1'
Parameter
Conditions
8
LHOO41
.Mln
LHOO41C
Typ
Max
1.0
3.0
5.0
Min
Units
Typ
Max
3.0
6.0
7.5
3
Input Offset Voltage
Rs:;;: 1000, TA = 25°C
Rs:;;: 1000
8
Voltage Drift with Temperature
Rs:;;: 1000
....
Offset Voltage Change with Output Power
Offset Voltage Adjustment Range
(Note 5)
3
Input Offset Current
TA = 25°C
30
100
300
50
200
500
nA
nA
0.1
1.0
0.2
1.0
nAloC
300
1.0
200
....U
3......
8
Offset Voltage Drift with Time
Offset Current Drift with Temperature
Offset Current Drift with Time
3
5
IJ.V/oC
5
5
IJ.V/week
15
15
IJ.V/watt
20
20
2
Input Bias Current
TA = 25°C
Input Resistance
TA = 25°C
100
0.3
Input Capacitance
RS:;;: 1000,aVCM = ±10V
70
Input Voltage Range
Vs = ±15V
±12
Power Supply Rejection Ratio
Rs:;;: 1000, aVs = ±10V
Voltage Gain
Vs
RL
Vs
RL
=
=
=
=
±15V, Vo = ±10V
1 kO, TA = 25°C
±15V, Vo = ±10V
1000
mV
nA/week
2
1.0
0.3
90
500
1.0
1.0
nA
IJ.A
MO
3
pF
90
dB
±12
V
3
Common Mode Rejection Ratio
mV
mV
70
80
96
70
90
dB
100
200
100
200
V/mV
25
20
±13.0 ±14.0
V/mV
±13.0 ±14.0
Output Voltage Swing
Vs = ±15V, RL = 1000
Output Short Circuit Current
Vs= ±15V,TA=25°C(Note6)
200
300
200
300
mA
Power Supply Current
Vs = ±15V, VOUT = 0
2.5
3.5
3.0
4.0
mA
Power Consumption
Vs = ±15V, VOUT = 0
75
105
90
120
mW
AC Electrical Characteristics forLH0041/LH0041C (TA =
Slew Rate
Av = + 1, RL = 1000
Power Bandwidth
RL = 1000
Small Signal Overshoot
Settling Time (0.1 %)
25°C, Vs = ±15V, Cc = 3000 pF)
1.5
3.0
1.0
20
Small Signal Transient Response
aVIN = 10V,Av = +1
Overload Recovery TIme
Harmonic Distortion
f = 1 kHz, Po = 0.5W
Input Noise Voltage
Rs = 500, B.W. = 10 Hz to 10 kHz
V
3.0
V/IJ.S
20
kf;lz
0.3
1.0
0.3
1.5
IJ.s
5
20
10
30
%
4
4
IJ.s
3
3.
IJ.s
0.2
0.2
%
5
5
IJ.V/rms
0.05
nArms
Input Noise Current
B.W. = 10 Hz to 10 kHz
0.05
Nole 1: Rating applies for supply voltages above ± 15V. For supplies less than ± 15V, rating is equal to supply voltage.
Nole 2: Rating applies for LH0041 G and LH0021 K with Rsc = on.
Note 3: Rating applies as long as package power rating is not exceeded.
Nole 4: Specifications apply for Vg = ±5V to ±18V, and -55"C ,: Te ,: +125'C for LH0021K and LH0041G, and -25"C': Te ,: +S5"C for LHOO21CK.
LH0041CG and LH0041CJ unless otherwise specified. Typical values are for 25"C only.
Nole 5: TO·S "G" packages only.
Nole 6: Rating applies for "J" DIP package and for TO·8 "G" package with Rge = 3.3n.
3-150
,-----------------------------------------------------------------------------. r
:c
o
Typical Performance Characteristics
Power Deratlng-LH0021
'Je = 2OC/W
INFINITE HEAT SINK
\
25
z
20
~
15
Po;
10
15
~
~
25
18
.:!!.
50
~
100
r--
l i-'"
-2.0
-IS -10
I~
I~
I~
120
A~
~ '/
-.I
.:!!.
z 80
V
4
~
6
~
'RL=1011
(LH0021 ONLY)
5
10
W
8
e!i!
tl W
~
~
~
1
-4
'\
Ik
10k
2.0
<"
OUTPUT
i
1.6
.
1.2
B
1.0
I:
0.8
~
10
IS
SUPPLY VOLTAGE (IV)
......
1 I--+--+'--'ir-+--+-"!~
r--
ISO
125 ~.o::-+---'I-+--+-----1---l
1-+--+-=~d--+-1---l
-
-25
0
25
50
75 100 125
CASE TEMPERATURE (OC)
I
0.2
-75
I
I
0 25 50 75 100 125 ISO
Voltage Gain
I
Te = I_ssori
!
110
I
~
100
Te =125OC r-- f--
r-- r--
Te= 12SOC_ r--
o
~
I I
I
Te =
90 ~
20
5
r--
~
~
80
10
15
SUPPLY VOLTAGE (IV)
-so -25
120
r-- --
5
......
r--- ~
CASE TrUPERATURE (OC)
75
~SOI-+--+-I-+--+-1---l
Rse = 0.511
Rse = 1.011
o
20
'" ..,......
r---- .....L
0.6
Input Bias Current
400
175
-so
1M
L
I
I
Vs = 115V
.:!!. 1.4
,
25~L-~~~~~~
lOOk
Short Circuit Current vs
Temperature LH0021/LH0021C
l' ~ I-f-P"k-+--i'--t--l
100
o
FREQUENCY (Hz)
1''1: = 3000pr
Vs = 115V
g
....
J IllIlIll l
o
FREQUENCY (Hz)
Short Circuit vs
Temperature LH0041/LH0041C
22S
ISO
~
1111111111
10 100 lk 10k lOOk 1M
10 15 ~ 25 30 35
T1ME(}Ls)
5
125
111111
'\
1ll
o
100
II~~~
H-+++ttftt-~'~I"",-,,-:-::1",*
IIIffl
RL = 10011
12
10
Ii 0.4
-12
75
Vs = 115VI!'
-8
~
so
r
:c
Hf+!+!!!IhH1-H ee = 3000pF
14
,
INPUT
"
....
......
Large Signal Frequency
=
!i!
100OC/W
o
.j:o,
RL = lOll
(LH0021 ONLY) ~1Hl-+!-ttt1Hl
J
o
'\.
16 Response
I'
1
r
:c
o
CASE
FREE AIR
25
:c
o
Q
TEMPERATURE (OC)
Vs :l:15Y
RL =1QOn-
~
~
M
Voltage Follower Pulse
Response
e'"
~
OS
RL = 10011 .....
40
i\.
" "I,
1.2
15
Vs = 115V
ee = 3000pF
TA = 250C
RL = I k
~
~
~
0
'\.
1.5
0.3
~
SUPPLY VOLTAGE (IV)
s
-5
I
hl 60
RL = 10011
2
--
2100
V
IA
12
--
i
~
Open Loop Frequency
Response
10
I
-1.5
Output Voltage Swing
RL = 1 kll
a1;1
....
......
r
~
....
63OC/W
~ 1.8
i
t:
I\.
2.I
Vs = 115V
Te = 250C
i" ~
125
~
14
1.0
OUTPUT VOLTAGE (V)
hl 12
!i!
75
...... .....,
1.5
Package Power Dissipation
LH0041/LH0041C
2.4
..-1-"1
TEMPERATURE (OC)
Rse = 011
16
s
~
2.0 Safe Operating Area-LH0021
3:
\
'JA = 25OC/W
oI\)
I
-5::;"::
Te - 250C
1 1
Te = 1250C
I I
I I
10
IS
SUPPLY VOLTAGE (IV)
~
TL/K/l0115-4
3-151
•
o
....
'Of'
Q
Typical Performance Characteristics
(Continued)
Q
3.......
....
400
Input Current
g
= t15V
s-
...I
'\
(3
....
'\
S
Q
C\I
Q
Q
~
12
., /
I!I
BIAS
!:!
/'
-
{
~
;:!
~
!1!
-joo....,
o
-75
-so -25
0
-
......
I
'"
~
is
~_
o
25 50 75 100 125
....
!il
§!
r-.. OFFSET
Input Noise Voltage
15
"N'10""
....
.!!. 16
:::t:
3.......
....
Input Voltage Range
20
Vs
'Of'
CASE TEMPERATURE (CC)
10""16
10
20
10
15
SUPPLY VOLTAGE (tV)
5
100
Ik
10k
lOOk
FREQUENCY (Hz)
:::t:
...I
Input Noise Current
Distortion vs Frequency
~10""24~.
~
I
= tl5V
,.., = 10
Cc = 3000 pF
Vs
~
3.0
'11111
I~ S
10""25
~ 10""~~~~~-u~-u~
10
100
I k'
10k
Ik
lOOk
10k
lOOk
FREQUENCY (Hz)
FREQUENCY (Hz)
TL/K/l0115-5
Typical Applications
Programmable One Amp Power Supply
p------------.
12.4k 1%
I
24.9k IX
r-____________~8~1--6
17
lOOk 1%
141
+15V
17
I
II
141
I
I
I
I
I
I
+15Vo!!J
1
I
-15V~
I
I
I
I
1
I
-----·7
8.14
10k
-15V
~------~v~----~
TIL/Dll BCD INPUTS
DISABLE
TL/K/l0115-6
3·152
Typical Applications
~
o
(Continued)
o
....
~
10 WATT (rms) Audio Amplifier
r
"::c
CRT Deflection Yoke Driver
91k
o
o
+15V
....
~
o
"r
::c
o
o
....
r
"::c
o
o
....o
~
DEFLECTION YOKE
~
-15V
lOUT
-15V
INPUT
lOOk
Rl
1 ohm
lW
:::: )) 2011 LOAD
= VIN
Rl
+15V
TLlK/l0115-9
0.511 3 nF
-15V
TL/K/l0115-7
Dual Tracking One Amp Power Supply
+16TO+36V 0-.....------0------,
8
+15V
7
3
R2
8.87k
1%
VOUT1 =
6.2 (R2+Rl)
Rl
Rl
6.19k
1%
R3
>-..........-0 -15V
15k
1%
VOUT2
R3
= -VOUT
= R4
R4
15k -16TO-36V
1%
3-153
TLlK/l0115-B
or-------~~-----------------------------------------------------------.
,...
g
Typical Applications
(Continued)
~
....
......
,...
Two Way Intercom
g
Programmable High Current Source/Sink
+15Y
R2
Ik
~
....
o,...
8
~
....
......
,...
so
((~
~))
'----'\/IIR3......---v+>10V
-1V(VOI/T+5V
OUTPUT
OUTPUT
V"" (-5V
V->-36V+V+
TL/K/l0llS-20
Operation from Non-Symmetrical Supplies
'For additional offset null eireuR leehnlques see National Unear Applications Handbook.
3-155
TL/K/l0llS-21
o
N
It)
o
o
:::E:
....I
......
N
~National
~ Semiconductor
It)
o
o
LH0022/LH0022C High Performance FET Op Amp
(3 LH0042/LH0042C Low Cost FET Op Amp
..,.No LH0052/LH0052C Precision FET Op Amp
:::E:
....I
o
:::E:
General Description
......
N
....I
..,.
o
o
:::E:
....I
......
oN
N
o
o
:::E:
....I
......
N
N
o
o
:s
The LH0022/LH0042/LH0052 are a family of FET input operational amplifiers with very closely matched input characteristics, very high input impedance, and ultra-low input currents with no compromise in noise, common mode rejection
ratio, open loop gain, or slew rate. The internally laser nulled
LH0052 offers 500 J.LV maximum offset and 2 J.LVI'C offset
drift. Input offset current is less than 500 femtoamps at
room temperature and 500 pA maximum at 125'C. The
LH0022 and LH0042 are not internally nulled but offer comparable matching characteristics. All devices in the family
are internally compensated and are free of latch-up and unusual oscillation problems. The devices may be offset nulled
with a single 10k trimpot with negligible effect in CMRR.
The LH0022, LH0042 and LH0052 are specified for operation over the - 55'C to + 125'C military temperature range.
The LH0022C, LH0042C and LH0052C are specified for operation over the -25'C to +85'C temperature range.
The LH0022/LH0042/LH0052 family of IC op amps are intended to fulfill a wide variety of applications for process
control, medical instrumentation, and other systems requiring very low input currents and tightly matched input offsets.
The LH0052 is particularly suited for long term high
accuracy integrators and high accuracy sample and hold
buffer amplifiers. The LH0022 and LH0042 provide low cost
high performance for such applications as electrometer and
photocell amplification, pi co-ammeters, and high input impedance buffers.
Special electrical parameter selection is available on special
request.
For additional application information and information on
other National operational amplifiers, see Available Linear
Applications Literature.
Features
•
•
•
•
•
•
•
Low input offset current-500 femtoamps max (LH0052)
Low input offset drift-2 J.LV/'C typ (LH0052)
Low input offset voltage-l 00 J.LV typ
High open loop gain-fOO dB typ
Excellent slew rate-3.0 VI J.Ls typ
Internal 6 dB/octave frequency compensation
Pin compatible with standard IC op amps (TO-5 package)
Connection Diagrams
Metal Can Package
Dual·ln·Line Package
NC
NC 1
14 NC
NC 2
13 NC
'~~~CJ
12 rNOp~.}NVERT
3 ......- - - ,
NC 4
11 NC
v-
5
10 mET
6
9 V+
OF:~n
NC 7
2
v-
TL/K/5557-3
Top View
Order Number LH0022H, LH0022CH, LH0042H,
LH0042CH, LH0052H or LH0052CH
See NS Package Number HOBD
"--....,1-8 OUTPUT
TL/K/5557-2
Top View
Leadless Chip Carrier
Order Number LH0022D, LH0022CD, LH0042D,
LH0042CD, LH0052D or LH0052CD
See NS Package Number D14E
V·
NON-INV. INPUT
INV. INPUT
OFFSET NULL
OUTPUT
Order Number LH0042E
See NS Package Number E20A
TL/K/5557-4
3-156
r
:::r:
o
Absolute Maximum Ratings
o
Short Circuit Duration
Operating Temperature Range
LH0022,LH0042,LH0052
LH0022C, LH0042C, LH0052C
-55'Cto +125'C
- 25'C to + 85'C
Power Dissipation (see Graph)
Input Voltage (Note 1)
Differential Input Voltage (Note 2)
Voltage Between Offset Null and V-
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
-65'C to + 150'C
300'C
500mW
±15V
N
Continuous
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
±22V
~
r
:::r:
o
o
N
N
n
......
r
:::r:
o
±30V
±0.5V
o
DC Electrical Characteristics for LH0022/LH0022C (Note 3) TA =
""Nr
......
:::r:
o
TJ(Max)
Limits
Parameter
Conditions
LHOO22
Min
Input Offset Voltage
Rs"; 100 k.o., TA = 25'C
Vs = ±15V
Typ
Max
2.0
4.0
Min
Units
""
n
......
N
Typ
Max
3.5
6.0
mV
o
o
7.0
mV
N
......
r
:::r:
o
r
:::r:
CJ1
Rs"; 100 k.o., Vs = ±15V
Temperature Coefficient of
Input Offset Voltage
o
LHOO22C
5.0
Rs"; 100 k.o.
10
15
".vrc
3
4
".V/week
o
CJ1
Offset Voltage Drift with Time
Input Offset Current
5.0
pA
2.0
0.5
nA
Doubles Every 10'C
Doubles Every 10'C
0.1
0.1
(Note 4)
0.2
Temperature Coefficient of
Input Offset Current
Offset Current Drift with Time
Input Bias Current
(Note 4)
2.0
1.0
pA
10
2.5
nA
Doubles Every 10'C
Doubles Every 10°C
Differential Input Resistance
1012
1012
.0.
Common Mode Input Resistance
1012
1012
.0.
4.0
pF
Temperature Coefficient of
Input Bias Current
Input Capacitance
10
pA/week
25
5
10
4.0
±12
±13.5
±12
±13.5
V
RS"; 10 k.o., VIN = ±10V
80
90
70
90
dB
Supply Voltage Rejection Ratio
Rs"; 10 k!1, ±5V,,; Vs"; ±15V
80
90
70
90
dB
Large Signal Voltage Gain
RL = 2 k!1, Your = ±10V
TA = 25'C, Vs = ± 15V
100
200
75
160
V/mV
RL = 2 k!1, Your = ±10V
Vs= ±15V
50
Input Voltage Range
VS= ±15V
Common Mode Rejection Ratio
Output Voltage Swing
Output Current Swing
RL = 1 k!1, TA = 25'C
Vs = ±15V
±10
RL = 2k!1, Vs = ±15V
±10
Your = ±10V, TA = 25'C
±10
V/mV
50
±12.5
±10
±12
V
±10
±15
±10
V
±15
mA
Output Resistance
75
75
.0.
Output Short Circuit Current
25
25
mA
Supply Current
Vs = ±15V
Power Consumption
Vs = ±15V
2.0
2.5
75
3-157
2.4
N
n
2.8
mA
85
mW
-
~
II)
o
o
DC Electrical Characteristics for LH0042/LH0042C (Note 3)
~
Limits
....I
~
II)
o
o
~
Parameter
Min
....I
Input Offset Voltage
Rs"; 100kO
o
N
Temperature Coefficient of
Input Offset Voltage
RS,,;100kO
"II'
o
o
~
Input Offset Current
o
o
Temperature Coefficient of
Input Offset Current
....I
.....
oN
Offset Current Drift with Time
o
o
Temperature Coefficient of
Input Bias Current
~
Input Bias Current
LHOO42C
Typ
Max
5.0
20
Min
10
(Note 4)
Max
6.0
20
5.0
Doubles Every 1O·C
/LV/week
2.0
10
pA
Doubles Every 10·C
0.1
pAiweek
0.1
10
mV
/LVI'C
10
1.0
(Note 4)
Units
Typ
15
7.0
Offset Voltage Drift with Time
....I
.....
N
"II'
LHOO42
Conditions
25
50
15
pA
N
~
....I
Doubles Every 10·C
Doubles Every 10·C
Differential Input Resistance
1012
1012
o
o
Common Mode Input Resistance
1012
1012
....I
Input Capacitance
4.0
4.0
N
N
~
°
°
pF
±12
±13.5
±12
±13.5
V
Common Mode Rejection Ratio
Rs ,,; 10 kO, VIN = ± 10V
70
86
70
80
dB
Supply Voltage Rejection Ratio
Rs"; 10 kO, ±5V,,; Vs ,,; ±15V
70
86
70
86
dB
Large Signal Voltage Gain
Rs"; 2kO, VOUT = ±10V
50
150
25
100
V/mV
Output Voltage Swing
RL = 1 kO, T A = 25·C
±10
±12.5
±10
±12
V
RL = 2kO
±10
Output Current Swing
VOUT = ±10V
±10
±15
mA
Input Voltage Range
±10
±15
±10
V
Output Resistance
75
75
Output Short Circuit Current
20
20
Supply Current
2.5
3.5
Power Consumption
°
mA
2.8
105
4.0
mA
120
mW
DC Electrical Characteristics for LH0052/LH0052C (Note 3)
Limits
Parameter
Conditions
LHOO52
Min
Input Offset Voltage
Rs < 100 kO, Vs = +15V
TA = 25·C
Temperature Coefficient of
Input Offset Voltage
Vs= 100kO,VS= ±15V
Max
0.1
1.0
RS<100kO,Vs= ±15V
Min
2.0
Max
0.4
2.0
mV
3.0
mV
5.0
2.0
(Note 4)
0.01
Doubles Every 10·C
Offset Current Drift with Time
0.1
3·158
/LVI'C
4.0
5.0
0.02
500
Temperature Coefficient of
Input Offset Current
Units
Typ
2.0
Offset Voltage Drift with Time
Input Offset Current
LHOO52C
Typ
/LV/week
1.0
pA
100
pA
Doubles Every 10·C
0.1
pAiweek
r-
::I:
o
o
I\)
DC Electrical Characteristics for LH0052/LH0052C (Note 3) (Continued)
I\)
......
Limits
Parameter
LHOO52
Conditions'
Min
Input Bias Current
(Note 4)
LHOO52C
Typ
Max
0.5
Min
2.5
Doubles Every 10'C
Max
1.0
5.0
pA
0.5
nA
o
I\)
I\)
o
......
r-
::I:
o
o
Doubles Every 10'C
~
I\)
Differential Input Resistance
1012
1012
n
Common Mode Input Resistance
1012
1012
n
4.0
4.0
pF
Input Capacitance
r-
::I:
o
Typ
2.5
Temperature Coefficient of
Input Bias Current
Units
......
r-
::I:
o
o
~
I\)
Input Voltage Range
Vs = ±15V
±12
±13.5
±12
±13.5
V
o
......
Common Mode Rejection Ratio
Rs';;; 10 kn, VIN = ±10V
74
90
70
90
dB
::I:
Supply Voltage Rejection Ratio
Rs';;; 10 kn, ±5V,;;; Vs';;; ±15V
74
90
70
90
dB
Large Signal Voltage Gain
RL=2kn,VOUT= ±10V
Vs = ±15V, TA = 25'C
100
200
75
160
V/mV
RL = 2 kn, VOUT = ±10V
Vs = ±15V
50
Output Voltage Swing
Output Current Swing
RL = 1 kn, TA = 25'C
Vs = ±15V
±10
RL = 2kn, Vs = ±15V
±10
VOUT = ±10V, TA = 25'C
±10
. Output Resistance
Output Short Circuit Current
Supply Current
Vs = ±15V
Power Consumption
Vs = ±15V
50
±12.5
±10
V/mV
±12
V
±10
±15
±10
±15
mA
75
75
n
25
25
mA
3.0
3.5
3.0
105
AC Electrical Characteristics for all amplifiers (TA =
V
3.B
mA
114
mW
25'C, Vs = ± 15V)
Limits
Parameter
Conditions
Slew Rate
Voltage Follower
Large Signal Bandwidth
Voltage Follower
LHOO22C/42C/52C
LHOO22/42/52
Min
Typ
1.5
3.0
Max
Min
Typ
1.0
3.0
Units
Max
V/p.s
40
40
kHz
Small Signal Bandwidth
1.0
1.0
MHz
Rise Time
0.3
1.5
0.3
1.5
P.s
Overshoot
10
30
15
40
%
Settling Time (0.1 %)
Overload Recovery
.a.VIN = 10V
4.5
4.5
p.s
4.0
4.0
P.s
3·159
r-
o
o
(II
I\)
......
r-
::I:
o
o
(II
I\)
o
AC Electrical Characteristics for all amplifiers (TA =
25'C, Vs = ± 15V) (Continued)
Limits
Parameter
LH0022/42/52
Conditions
Typ
Min
Input Noise Voltage
LH0022C/42C/52C
Min
Max
Typ
Units
Max
Rs = 10kO,fo = 10Hz
150
150
nVtVHz
Rs = 10 kO, fo = 100 Hz
55
55
nV/VHz
Rs = 10 kO, fo = 1 kHz
35
35
nVlVHz
Rs = 10 kO, fo = 10 kHz
30
30
nVlVHz
BW= 10 Hz to 10kHz, Rs= 10kO
12
12
I'Vrms
Input Noise Current
BW = 10 Hz to 10kHz
<0.1
<0.1
pArms
Note 1: For supply voltsges less than ± 15V. the absolute maximum input voltsge Is equal to the supply voltsge.
Note 2: Rating applies for minimum source resistsnce of 10 kil. for source resistsnces less than 10 kil. maximum differential input voltage is ± SV.
Note 3: UnlessotherwisespecHied,thesespeclficationsapplyfor ±SV,;; Vs';; +20Vand -SS'C,;; TA';; + 12S'C for the LH0022/42/52 and -25"C';; TA';;
+ 85'C for the LH0022C/42C/S2C. Typical values are given for TA = 2S'C.
Note 4: Input currents are a strong function of temperature. Due to high speed testing they are specified at a junction temperature TJ = 2S'C. SeH heating will
cause an increase in current in manual tests. 25°C spec is guaranteed by testing at 125°C.
Auxiliary Circuits (Shown for TO-5 pin out)
Protecting Inputs from ± 150V Transients
Offset Null
INPUT
r~
FET
.~~
6
V'
....
.......
'"~"'
,,~[
-" 10K
y+..-
lOOK
'y
z~
.A
." ~
lOOK
-'"'
.
OPAMP
&
OUTPUT
ly4
.A
)
VNote: All diodes are ultra low leakage.
TL/K/5557-5
I
FET
.......
......
VO
TLlK/5557 -6
Boosting Output Drive to ± 100 mA
'-f~~S
;rV
La-!
+
4
OUTPUT
4
I
3-160
vTL/K/5557-7
r-
::I:
Schematic Diagram
0
0
N
N
+
:>
....
r-
I
:>
::I:
0
0
N
N
(")
~
a:~
......
r-
::I:
0
0
0l:Io
N
....
r-
-'"
"'~
::I:
0
0
0l:Io
N
(")
....
r::I:
0
0
UI
N
....r-
::I:
0
0
UI
N
(")
~!
m",
"'51
...
~----
--
U"
Q
,.....----+---0 I;j::l
~E
~'"
a:_
,,I
I
'(
-,.
a:_
~
I !!
I
I
......------01
+
3-161
I::::l
~i
Typical Applications
Low Drift Sample and Hold
Al
11K
GUARD
,..------
A~~~ 0--:;-------..
nLSAMPLEIHOLD O"""4H--.,~
CONTROL
__
~~
___ ...J
TLlK/5557-8
Precision Voltage Comparator
V'
-SV
INPUT o-~""'w-oi04
01
IN914
TTL
'>~fN,,""-.-o OUTPUT
RZ
OZ
1N814
10K
REFERENCE o-~""'w-oi04
V-
TLlK/5557 -9
Plcoamp Amplifier for pH Meters and Radiation Detectors
RL
ID"n
V'
PROBE
>-4I~O OUTPUT
VTLlK/5557-10
3-162
.-
%
o
o
Typical Applications (Continued)
N
N
......
Precision Subtractor for Automatic Test Gear
o
o
v+
IIN1~
I
I
I
I
.-%
N
N
o
......
I
-,
:
I
5:
o
>-4~oeoUT
g
N
......
--( !
'''~O IL 't
fin
__
_±.J
.-:t:
I
o
o
"'~"
......
~
o
"Low I.akage
elNZ
0-----------...
10K
10-33pF
TL/K/5557-11
eOUT = lOX (elNl - elN21
~
99K
'15V
lK
>~~OOUTPUT
1M
O'l1'F
]
LOW LEAKAGE
";'POLYrrYRENE
-15V
TL/K/5777-12
Ultra Low Level Current Source
.15V
!
lOUT •
120 nA
2N4117
LMI13
'VI' 1.22V
3K
-15V
3-163
.-:t:
o
~
Sensitive Low Cost "VTVM"
INPUT 0-. .---....,
o
~
......
TL/K/6657-13
Typical Applications (Continued)
True Instrumentation Amplifier .
V·
SHIELD
500K
.05%
+15
V·
V·
INPUTS
4DK
.05%
lDK
,05%
40K
.05%
10K
,05%
OUTPUT
V·
-IS
V·
CMRR
TEN TURN
lOOK
AOJ
-
SHIELD
+
o-e====3-1
lOOK
TL/K/5557 -14
Precision Integrator
TIL
13r -
-
-
-
AHOlii'" -
-
-
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INTEGRATE/RESET
I
I
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CONTROL
10
14
.-----------------------------------------------------~~
Typical Applications (Continued)
§
~
Precision Sample and Hold
~
~
~
I
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INPUT
o
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SAMPlE/HO~ ~i
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I
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I
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3·165
TLlK/5557·17
0,----------------------------------------------------------------------.
C'I
in
Typical Performance Characteristics
Q
Q
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C'I
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li
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10k
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o
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..
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I
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lOS
Total Input Noise Voltage·
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t
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f
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Input Voltage
lDOD
Q
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TEMPERATURE ('C)
oC'I
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50
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85
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125
25
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Q
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10,DOD
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300
I
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~
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TO"hndOIP
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Input Bias Current vs
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1,000 .--..--'-..--..--..--,.
100
Q
Q
........
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vs Temperature
Maximum Power Dissipation
C'I
in
' .."LY
L
-20
D
28
CD
II
•
101
TIME FROM HEAT APPLICATIGN ( .
TLIK15657-18
'Noise voltage Includes contribution lrom source resistance,
3-166
r
::I:
Typical Performance Characteristics (Continued)
o
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Supply Voltage vs
Supply Current
r--r-,.-.----r---,-.,---,
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ii
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12
10
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Signal Response
15
20
25
U1
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10k
lOOk
.
Frequency Characteristics vs
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IVs" :15V
TIRA~SIE~T
1.2
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itvt.
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100
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100
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120
10
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140
~
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Frequency Characteristics vs
Supply Voltage
SE1RAiE
CLOSED LOOP
RL =2k
-10
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1M
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SUPPLY VOLTAGE (,VI
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I
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FREQUENCY (Hz)
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10'
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......
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\
10"
10
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Ik
10k lOOk 1M 10M
FREQUENCY (Hz)
TL/K/5557-Ie
3-167
~National
~ Semiconductor
LH0024/LH0024C High Slew Rate Operational Amplifier
General Description
The LH0024/LH0024C is a very wide bandwidth, high slew
rate operational amplifier intended to fulfill a wide variety of
high speed applications such as buffers to A to D and D to A
converters and high speed comparators. The device exhibits useful gain in excess of 50 MHz making it possible to use
in video applications requiring higher gain accuracy than is
usually associated with such amplifiers.
The LH0024/LH0024C's combination of wide bandwidth
and high slew rate make it an ideal choice for a variety of
high speed applications including active filters, oscillators,
and comparators as well as many high speed general pur, pose applications.
The LH0024 is guaranteed over the temperature range
- 55°C to + 125°C, whereas the LH0024C is guaranteed
- 25°C to + 85°C.
Features
•
•
•
•
•
•
•
Very high slew rata-SOO V/p.s at Av = +1
Wide small signal bandwidth-70 MHz
Wide large signal bandwidth-IS MHz
High output swing-±12V into lk
Offset null with single pot
Low input offset-2 mV
Pin compatible with standard Ie op amps
Schematic and Connection Diagrams
COMP/NULL
Metal Can Package
S
COMP/NULL
r---~'---~~-4~------------~---ov+
RI
RI
RS
I
COMP/NULLo-----...._---+--~
I OUTPUT
COMP
.._---+--0
v6
INPUTS
TLlK/5552-2
OUTPUT
Top View
Note: For heat sink use Thermalloy 2230·5
series.
Order Number LH0024H or
LH0024CH
See NS Package Number H08B
R3
""'----"'--+--"'-""-0
4
v-
TLlK/5552-1
3-168
r::t:
Q
Absolute Maximum Ratings
Q
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 2)
Supply Voltage
Input Voltage
Differential Input Voltage
Operating Temperature Range
LH0024
LH0024C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
ESD rating to be determined.
±18V
Equal to Supply
±5V
Power Dissipation
N
-55°C to + 125°C
-25°C to +85°C
:!:!
r-
-65°C to + 150°C
260°C
Q
DC Electrical Characteristics (Note 1)
LHOO24
Conditions
Min
LHOO24C
Typ
Max
2.0
4.0
6.0
Min
Units
Typ
Max
5.0
8.0
10.0
Input Offset Voltage
Rs = 50n, TA = 25°C
Rs = 50n
Average Temperature
Coefficient of Input
Offset Voltage
Vs = ±15V, Rs = 50n
-55°C to 125°C
-20
Input Offset Current
TA = 25°C
2.0
5.0
10.0
4.0
15.0
20.0
/LA
/LA
Input Bias Current
TA = 25°C
15
30
40
18
40
50
/LA
/LA
12.5
15
12.5
15
Supply Current
Large Signal Voltage
Gain
Vs = ±15V, RL = 1k, TA = 25°C
Vs= ±15V,RL= 1k
-25
mV
mV
/LVrC
mA
4
3
5
3
2.5
4
V/mV
V/mV
Input Voltage Range
Vs = ±15V
±12
±13
±12
±13
V
Output Voltage
Swing
Vs = ±15V, RL = 1k, TA = 25°C
Vs = ±15V, RL = 1k
±12
±10
±13
±10
±10
±13
V
V
Slew Rate
Vs = ±15V, RL = 1k,
C1 = C2 = 30pF,
Av = +1, TA = 25°C
400
500
250
400
V//Ls
60
dB
Common·Mode
Rejection Ratio
Vs = ±15V, ,W,N = ±10V,
Rs = 50n
60
Power Supply
±5V:s: Vs:S: ±18V,
60
60
Rejection Ratio
Rs = 50n
Nole 1: These speclflcaUons apply for Vs = ±15Vand -55'C to + 125'C for the LH0024 and -25'C to +85'C for the LHOO24C.
Nole 2: Refer to RETS0024H for LH0024H military specifications.
dB
Frequency Compensation
Frequency Compensation Circuit
TABLE I
CJ
Closed
Loop Gain
Cl
C2
C3
100
0
0
0
20
0
0
0
10
0
20pF
1 pF
1
30pF
30pF
3pF
rlf
AJ
1
'15V
~
H2
0.1 "F
Ib.
-J- c: ~
2 ~1
I
&
LHDD24
...
OUTPUT
5
..AAI
J
~rl~
0.1,..F
·15V
3·169
~
n
600mW
Parameter
::t:
Q
":"
TL/K/5552-6
~
«:)
«:)
..
Typical Performance Characteristics
::J:
-I
.....
liD
«:)
«:)
::J:
-I
Large Signal Frequency
Response
Maximum Power Dissipation
N
~
110
~IGD
..I!!
Z5
INFINITE HEAT SINK
"
NO HEAT SINK ~
15 300
j20
III
25
V,· 'IIV
ClaC2=30pF
~ & RL -IK
..
50
n 100 125
TEMPERATURE I"CI
Av·~!.1
0
>
;;;+10
r--t-:~:!~
>
~
+1
T.-2s'e
cz
a:
.flS
c~ 10
III
....
15
~
100
S
&
!!
"
V
0
5
10
T.I._nlc
13
L
~
•
a: 11
t
iil
10
•L
•
4
~ 20
:,...- .... T
B
>
V
5
0
~
~•• +2&·C
i i
-
!;;
I--
.~!
i--
~
I I I
I I
I
10
12
15
20
- r- t-Tl· -&J·c- - I
1
-"""-
~ 15
~5'C- I-I-""
I
10
SUPPLY VOLTAGE I'VI
Input Bias Current
vsVoltage
Z&
12
5
20
15
14
!
V
V
SUPPLY VOLTAGE I'VI
Supply Current vs
Supply Voltage
C
10
0
0
&OD
4GI
200
300
TlMElnrJ
~
>
l.a
0
100M
Output Voltage Swing
.
,
-10
1M
IDIII
FREQUENCY IH"
ZD
~
0
-&
IIIIk
RL ·IK
>
~
is
100M
lD
c
:
I.
0
10M
1M
FREGUENCY IH"
Input Voltage vs Supply
Voltage
Cl=C2-30pF
t-TA·2S·~-
..
.
lD
II
lOOK
10K
150
Voltage Follower Pulse
Response
V,-!"
"
411
......
~
"
0
T,.'"Z&'e
15
~
c
~
100
D
Vs·ttS
RL ·l"
&0
!::; 10
>
' .. - 250'C/W
1200
Open Loop Frequency
Response
~
'" "
410
.
..
'JC - 180'C/W
["-...
i no
..
I18
•
5~
L.+~c - ~A 112s-c' - I-'"
I
I
I
0
14
II
4
II
SUPPLY VOLTAGE I.VI
6
8
10 12 14 18
SUPPLY VOLTAGEl-VI
II
TUK/5552-7
Applications Information
LAYOUT CONSIDERATIONS
quire adjustment in order to perfectly cancel the input capacitance of the device.
The LH0024/LH0024C, like most high speed circuitry, is
sensitive to layout and stray capacitance. Power supplies
should be by-passed as near the device as is practicable
with at least 0.01 I£F disc type capacitors. Compensating
capacitors should also be placed as close to device as possible.
When operating the LH0024/LH0024C at a gain of
the value of R1 should be at least 1 kn.
+ 1,
The case of the LH0024 is electrically isolated from the circuit; hence, it may be advantageous to drive the case in
order to minimize stray capacitances.
COMPENSATION RECOMMENDATIONS
HEAT SINKING
Compensation schemes recommended in Table 1 work well
under typical conditions. However, poor layout and long
lead lengths can degrade the performance of the LH0024 or
cause the device to oscillate. Slight adjustments in the values for Cl, C2, and C3 may be necessary for a given layout.
In particular, when operating at a gain of -1, C3 may re-
The LH0024/LH0024C is specified for operation without the
use of an explicit heat sink. However, internal power dissipation does cause a significant temperature rise. Improved
offset voltage drift can be obtained by limiting the temperature rise with a clip-on heat sink such as the Thermalloy
2228B or equivalent.
3-170
r-
:c
o
Typical Applications
o
TIL Compatible Comparator
N
:e:r-
Offset Null
10K
I pF
:c
o
o
'I5V
N
~
AI
lDO
AZ
10K
'I5V
~ZOPF
lDO
V,..
00-""""'---1
AI
IK
INPUT 00-""'.".,.......-"'"
>""-4..~:» OUTPUT
TLlK/5552-3
TL/K/5552-4
Video Amplifier
'IZV
o I.F
r---____--e-"""""i~
A3
10K
30 pF
AS
AI
10K
ZOK
O.I.F
~
IK
INPUT - - , t-."""N~+--~
AZ
10K
Al = A2
R4
10K
=
A3
= A4
A _A5+(R3R4)_
-
-
3-171
v-
(R3) (R4)
- 5
TLlK/5552-5
~National
~ Semiconductor
LH0032/LH0032A/LH0032C/LH0032AC
Ultra Fast FET-Input Operational Amplifier
General Description
Features
The LH0032/LH0032A is a high slew rate, high input impedance differential operational amplifier suitable for diverse
application in fast signal handling. The high allowable differential input voltage, ease of output clamping, and high output drive capability particularly suit it for comparator applications. It may be used in applications normally reserved for
video amplifiers allowing the use of operational gain setting
and frequency response shaping into the megahertz region.
•
•
•
•
•
•
•
•
The LH0032's wide bandWidth, high input impedance and
high output capacity make it an ideal choice for applications
such as summing amplifiers in high speed D to A converters, buffers in data acquisition systems and sample and
hold circuits. Additional applications include high speed integrators and video amplifiers. The LH0032 and LH0032A are
guaranteed for operation over the temperature range
- 55'C to + 125'C, the LH0032C and LH0032AC are guaranteed for -25'C to +85'C.
500 V/ /l-s slew rate
70 MHz bandwidth
10120. input impedance
As low as 2 mV max input offset voltage
FET input
Offset null with single pot
No compensation for gains above 50
Peak output current to 100 mA
Block Diagram
~~I~Z
____~~__~~____-4~________"
RZ
BALANCEI {
COMPENSATION
________________-'
R3
4
~-----.----~----~--~
OUTPUT
COMPENSATION
INVERT
INPUT
C~--_O.I~__..._--l
NON.INI~~~~ o.;:....--------+-----~
R5
R5
R7
07
OB
• ____1_10 OUTPUT
R6
RB
09
R4
V_~IO~
e-____
______~~________
~I-
____ ______________
~
~
TL/K/5265-1
3-172
r-
:::z:::
o
Absolute Maximum Ratings
Supply Voltage, Vs
±18V
Input Voltage, VIN
Differential Input Voltage
Power Dissipation, Po
±Vs
±30Vor ±2Vs
LH0032CG! ACG
Operating Junction Temperature, TJ
1.5W, derate 100'C/Wto 125'C (Note 1)
2.2W, derate 70'C/W to 125'C (Note 1)
TA = 25'C
Tc = 25'C
oCo)
Operating Temperature Range, TA
LH0032G! AG!E
Storage Temperature Range
Lead Temp. (Soldering, 10 seconds)
N
.....
-55'C to + 125'C
-25'Cto + 85'C
r-
175'C
-65'C to + 150'C
300'C
~
......
:::z:::
o
oCo)
r-
:::z:::
DC Electrical Characteristics
Symbol
Parameter
LHOO32A
Test Conditions
Min
Vas
Input Offset
Voltage
AVos! Average Offset
Voltage Drift
AT
los
Input Offset
Current
VIN=O
Input Bias
Current
Is
Common Mode
AVIN= ±10V
Rejection
Ratio
AVOL
Open-Loop
Voltage
Gain
Vo= ±10V,
f=1 kHz
RL = 1 kO
(Note 6)
Va
Output Voltage RL = 1 kO
Swing
Is
Power Supply
Current
TA=25'C,
10=0 (Note 5)
PSRR
Power Supply
Rejection
Ratio
AVs=10V
(±5 to ±15V)
1
(Note 4)
15
2
5
2
30
15
N
LHOO32C
Units
Typ Max Min Typ Max
5
7
2
30
15
5
10
2
50
15
15
20
mV
50 jJ.V!'C
10
250
10
30
500
3
25
250
25
50
500
5
pA
pA
nA
TJ=25'C (Note 3)
TA = 25'C (Note 5)
50
1
25
150
5
10
100
1
50
500
5
15
pA
nA
nA
TJ=25'C
Parameter
SR
Slew Rate
ts
Settling Time to 1% of Final Value
ts
Settling Time to 0.1 % of Final Value
tR
Small Signal Rise Time
to
Small Signal Delay Time
±10 ±12
±10 ±12
±10 ±12
±10 ±12
50
60
50
60
50
60
50
60
dB
60
70
60
70
60
70
60
70
dB
57
57
57
57
±10 ±13.5
±10 ±13
±10 ±13.5
±10 ±13
18
50
60
20
20
50
22
60
18
50
20
60
20
50
60
o
.....
r:::z:::
o
o
Co)
TJ=25'C (Note 3)
TA = 25'C (Note 5)
AC Electrical Characteristics Vs =
Symbol
LHOO32
LHOO32AC
Typ Max Min Typ Max Min
TA=TJ=25'C
(Note 3)
·VINCM Input Voltage
Range
CMRR
o
oCo)
Vs = ± 15V, T MIN';;: TA ,;;: T MAX unless otherwise noted (Note 2) (TA = Tj)
~
o
V
V
22
mA
dB
± 15V, RL = 1kO, TJ = 25'C (Note 7)
Conditions
Av = +1
Av = -1,
Min
Typ
350
500
AVIN = 20V
Max
V!)J-s
100
300
Av = +1, AVIN = 1V
Units
ns
8
20
10
25
< ± 15V when TA or TC exceeds specific values
depending on the Po within the device package. Total Po is the sum of quiescent and load·related dissipation. See applications notes AN·277, "Applications Of
Wide-Sand Buffer Amplifiers" and AN·253, "High-Speed Operational·Amplifler Applications" for a discussion of load·related power dissipation.
Note 2. LH0032AG/G are 100% production tested as specified at 25'C, 125'C, and -55'C. LH0032ACG/CG are 100% production tested at 25'C only.
Specifications at temperature extremes are verified by sample testing, but these limits are not used to calculate outgoing quality level.
Note 3. Specffication is at 25'C junction temperature due to requirements of high-speed automatic testing. Actual values at operating temperature will exceed the
value at TJ ~ 25 C. When supply voltage. are ± 15V, no·load operating junction temperature may rise 40-60'C above ambient, and more under load conditions.
Accordingly, Vos may change one to several mV, and 18 and los will change significantly during warm-up. Refer to 18 and los vs. temperature graph for expected
Note 1. In order to limit maximum junction temperature to + 175°C, it may be necessary to operate with VS
values.
Note 4. LH0032AG/G are 100% production tested for this parameter. LH0032ACG/CG are sample tested only. Limits are not used to calculate outgoing quality
levels. I!Nosl AT is the average value calculated from measurements at 25'C and TMAX.
Note 5. Measured in still air 7 minutes after application of power. Guaranteed thru correlated automatic pulse testing.
Note 6. Guaranteed thru correlated automatic pulse testing at TJ ~ 25'C.
Note 7. Not 100% production tested; verified by sample testing only. Limits are not used to calculate outgoing quality level.
'Guaranteed by CMRR test condition.
3-173
•
Connection Diagrams
OUTPUT
COMPENSATION
OUTPUT COt.fP
INY. INPUT
NON-INY. INPUT
INY
INPUT
OUT
Y·
OUTPUT
NC
TL/K/5265-25
TOPYIEW
Order Number LH0032E
See NS Package Number E48B
TLlK/5285-23
Order Number LH0032G, LH0032AG, .
LH0032CG or LH0032ACG
See NS Package Number G12B
Auxiliary Circuits
Output Short Circuit Protection
Offset Null
_-e---y+
LM113
11
-I
620
YTL/K/5265-15
Y-
. TLlK/5285-16
3-174
....
::z::
o
Typical Performance Characteristics
Maximum Power
Dissipation
2.5
~
2.0
9
1.5
'"
~
;;
24
INFINITE HEAT SINK
I'\..
~ 1.0
=
~
'"
.........
9JC =70'C/W-
l
20
I'...
ffi
g§
18
.
.
::0
~
I- NO HEAT SINK ........ ~
j
rj
o
1
25
;;
16
~
~
'"
~
.
PHASE
40
'"~
co
80
90
135
180
GAIN
20
o
10k
I
225
!
iii'" ~
."
~ '"
= ~
~ co
~
:0-
PHASE
~
~
~
~
~
~'"
60
90
11111
11111
o
10k
I
~
lOOk
1M
10M
FREQUENCY (Hz)
f
~
co
i
m ...
135 .;
20
~....
'/
::z::
-
o
~
~
co
100M
5
10
15
SUPPLY VOLTAGE (±V)
20
1M
100
~
RL=lk
-
.
....
10M
100M
10
Vs= ±15V
Av= +10
RL=lk
~
~
50
co
40
::0
I'
30
20
10
::
::0
co
-10
o
10k
lOOk
1M
10M
100
100M
200
300
400
100
500
200
300
400
500
TIME (ns)
TIME (ns)
Normalized Input Bias and Offset
CUrrent vs. Junction Temperature
Normalized Input Bias
Current During Warm-Up
Total Input Nols.
Voltage va. Frequency'
100
10'
-5
-10
FREQUENCY (Hz)
I~
~
:s
Vs +15V
TA 2S'C
120
110
100
9.
8.
~
70
&.
50
AS ~ lOOk
.0
I
J.
I
10"
1
25
45 65 85 '105 125 145 165
JUNCTION TEMPERATURE ('C)
o
.......
20
.0
AS= 10
o
4
10
TIME FROM POWER TURN·ON (MINUTES)
'0
11111
.ao
"
FREQUENCY (Hz)
TLlK/5265-2
*Noise voltage includes contribution
from source resistance.
3-175
~
o
oCI.)
~
FREQUENCY (Hz)
:~~!:5V_
I-
.....
Large Signal Pulse
Response
I\..
+10
o
24
22
20
18
16
14
12
10
8
6
10
Large Signal Pulse
Response
RL=lk
I-
I-
GAIN
100M
IW~±Js'v
~ 70
45
40
Common Mode Rejection
9
o
Larg. Signal Frequency
26 Respons.
60
270
lOOk
1M
10M
FREQUENCY (Hz)
90
80
20
'Vs=±15V
Ratio vs. Frequency
QI
15
10
SUPPLY VOLTAGE (±V)
.....
....
::z::
L
'/
o
Bode Plot (Unity Gain
Compensation)
60
/./
12
6
45
~
./ ' /
VIN-
~
Bode Plot
(Uncompensated)
111111
111I
.1
Vou,/~
10
~
50
75 100 125 ISO
TEMPERATURE ('C)
VS=±15V
15
!;
~
10
80
/
:t!
II: 14
::0
........
If 0.5 I- 9.J = 10 C/
o
RL=lk
I-Tc=25'C
22
1
I........
o
Input Voltage Range and Output
20 Voltage vs Supply Voltage
CI.)
I\)
Typical Applications
Unity Gain Amplifier
10X Buffer Amplifier
8 pF-l0 pF
5 pF
2k
INPUT -JIll,.".......
INPUT
>.;.;II~"'OUTPUT
OUTPUT
Bk
y-
lk
100
TL/K/S2BS-17
TLlK/S26S-18
Non-Compensated Unity Gain Inverter
100X Buffer Amplifier
y.
10k
11
+
10k
INPUT...JW_"'-~
11
y-
270
10k
O,OI
100
TLlKIS265-19
~~~OUTPUT
T
TL/KIS265-20
3-176
r
::c
Typical Applications (Continued)
~5:
High Speed Sample and Hold
1000
Q
a
~r
VOUT
::c
Q
Q
W
N
o
....
r
::c
Q
Q
W
v+--..../\J'VY--..
LOGIC
CONTROL
~
"""'1'-"--'
'Use polYSlyrene dleleC1ric for minimum drift
TL/K/5265-21
v-
r---¥----,I
High Speed Current Mode MUX
I
3.8 pF
R5
Al---+-~VV~-~--~-1~-,
>l;.;.l+-_VOUI
H>-....--,
A4-+--M,.--~__
12
14
TL/K/5265-22
Applications Information
POWER SUPPLY DECOUPLING
INPUT CURRENT
Because the input dJvices are FETs, the input bias current
may be expected to double for each 11°C junction temperature rise. This characteristic is plotted in the typical performance characteristics graphs. The device will self-heat due to
internal power dissipation after application of power thus
raising the FET junction temperature 40-600C above freeair ambient temperature when supplies are ± 15V. The de-
The LH0032/LH0032A, like most high speed circuits, is sensitive to layout and stray capacitance. Power supplies
should be by passed as near to pins 10 and 12 as practicable with low inductance capacitors such as 0.01 J.LF disc
ceramics. Compensation components should also be
located close to the appropriate pins to minimize stray
reactances.
3-177
•
Applications Information
(Continued)
vice temperature will stabilize within 5-10 minutes after application of power, and the input bias currents measured at
that time will be indicative of normal operating currents. An
additional rise would occur as power is delivered to a load
due to additional internal power dissipation.
strongly dependent on layout and closed loop gain, but will
typically be in the neighborhood of several picofarads.
In the non-inverting configuration, it may be advantageous
to bootstrap the case and/or a guard conductor to the inverting input. This serves both to divert leakage currents
away from the non-inverting input and to reduce the effective input capaCitance. A unity gain follower so treated will
have an input capacitance under a picofarad.
There is an additional effect on input bias current as the
input voltage is changed. The effect, common to all FETs, is
an avalanche-like increase in gate current as the FET gateto-drain voltage is increased above a critical value depending on FET geometry and doping levels. This effect will be
noted as the input voltage of the LH0032 is taken below
ground potential when the supplies are ± 15V. All of the
effects described here may be minimized by operating the
device with Vs"; ±15V.
HEAT SINKING
While the LH0032/LH0032A is specified for operation without any explicit heat sink, internal power dissipation does
cause a significant temperature rise. Improved bias current
performance can thus be obtained by limiting this temperature rise with a small heat sink such as the Thermalloy No.
2241 or equivalent. The case of the device has no internal
connection, so it may be electrically connected to the sink if
this is advantageous. Be aware, however, that this will affect
the stray capaCitances to all pins and may thus require adjustment of circuit compensation values.
These effects are indicated in the typical performance
curves.
INPUT CAPACITANCE
The input capacitance to the LH0032/LH0032C is typically
5pF and thus may form a significant time constant with high
value resistors. For optimum performance, the input capacitance to the inverting input should be compensated by a
small capacitor across the feedback resistor. The value is
For additional applications Information request Application Note AN-253.
3-178
~Nationai
~ Semiconductor
LH0044 Series Precision Low Noise
Operational Amplifiers
General Description
The LH0044 Series is a low noise, ultra-stable, high gain,
precision operational amplifier family intended to replace either chopper-stabilized monolithic or modular amplifiers.
The devices are particularly suited for differential mode, inverting, and non-inverting mode applications requiring very
low initial offset, low offset drift, very high gain, high CMRR,
and high PSRR. In addition, the LH0044 Series' low initial
offset and offset drift eliminate costly and time consuming
null adjustments at the systems level. The superior performance afforded by the LH0044 Series is made possible by
advanced processing and testing techniques, as well as active laser trim of critical metal film resistors to minimize offset voltage and drift. Unique construction eliminates thermal
feedback effects.
fers. The LH0044 is guaranteed over the temperature range
of - 55'C to + 125'C, and the LH0044AC, LH0044B, and
LH0044C are guaranteed from - 25'C to + B5'C. The device is available in standard TO-5 op amp pin out and is
compatible with LM10BA, LM725, and LM741 type amplifiers.
Features
• Low input offset voltage
25,...V max
CI Excellent long-term stability
±1,...V/month max
IiJ Low offset drift
0.5,...VI'C max
I!I Very low noise
0.7,...Vp-p max 0.1 Hz to 10 Hz
10 High CMRR and PSRR
120 dB min
I!l High open loop gain
120 dB min
Ii Wide common-mode range
±13V min
II Wide supply voltage range
±2V to ±20V
The LH0044 Series is an excellent choice for a wide range
of precision applications including strain gauge bridges,
thermocouple amplifiers, and ultrastable reference ampli-
Equivalent Circuit
OVER CaMP
COMPo----------------o------------~------~~
OUTPUT
C1
1DDpF
R5
500
INVERTING
INPUT
01
NON·INVERTING
INPUT
3
R6
500
RI
5Dk
L---~~----------~------~----~vTUKf5551-1
3-179
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 6)
Supply Voltage
Output Short-Circuit Duration
±20V
Power Dissipation
Differential Input Voltage (Note 4)
Input Voltage (Note 5)
Continuous
Operating Temperature Range
LH0044
LH0044AC,LH0044B,LH0044C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
600mW
±1V
- 55°C to + 125°C
- 25°C to + 85°C
-65°C to + 150°C
260°C
ESD rating to be determined.
±15V
DC Electrical Characteristics (Note 1)
Limits
Parameter
Conditions
LHOO44/
LHOO44B/LHOO44C
LH0044AC
Min
Typ
Max
8
25
Input Offset Voltage
TA=25°C, Rs=500, VCM=OV
LH0044C Only
Input Offset Voltage
Rs = 500, VCM = OV
LH0044A and LH0044B Only
Average Input Offset
Voltage Drift
TMin ~ TA ~ TMax
LH0044B Only
Long-Term Stability
(Note 2)
0.2
1
Input Noise Voltage (Note 3)
BW=0.1 Hz to 10 Hz, Rs=500
Rs= 10 kO Imbalance
0.35
0.50
0.7
0.9
Min
Typ
Max
12
50
100
/LV
/LV
180
80
/LV
/LV
1.3
0.5
/LVrC
/LVrC
0.3
2
/LV/month
0.35
0.50
0.8
1.0
/LVp-p
/LVp-p
55
75
0.1
Thermal Feedback Coefficient
0.5
0.2
0.005
Units
0.005
/LV/mW
Open Loop Voltage Gain
RL = 10kO
120
145
114
140
dB
Common-Mode Rejection Ratio
-10V ~ VCM ~ +10V
120
145
114
140
dB
Power Supply Rejection Ratio
±3V ~ Vs ~ ±18V
120
145
114
140
dB
±13
±13.8
±12
±13.5
V
±13
±13.7
±12
±13.5
Input Voltage Range
Output Voltage Swing
RL = 10kO
Input Offset CUrrent
25°C ~ TA ~ TMax
TMln ~ TA < 25°C
Average Input Offset
Current Drift
Input Bias Current
25°C ~ TA ~ TMax
TMin ~ TA < 25°C
Average Input Bias Current Drift
Differential Input Impedance
5
Supply Current
2.5
5.0
1.5
5.0
10.0
nA
nA
5
40
15
80
pArc
8.5
15
50
10
30
100
nA
nA
50
300
100
600
pAloC
10
2.5
2x 1011
Common Mode Input Impedance
IL = 0
Power Dissipation
3-180
V
1.0
MO
8
2x 10 11
0
0.9
3.0
1.0
4.0
mA
27
90
30
120
mW
AC Electrical Characteristics TA =
Parameter
Input Noise Voltage
25'C, Vs =
±15V
Conditions
to
Typ
Units
= 10 Hz
11
nV/,JHz
Rs=1kO,to=1kHz
9
nVl,JHz
0.06
V/p.s
1
kHz
Rs = 1 kO,
Slew Rate
Av= +1,RL=10kO,VIN= ±10V
Large Signal Bandwidth
Av =
+1, RL = 10kO, VIN =
Overload Recovery Time
Av =
+ 100, VIN = -100 mY, aVIN = 200 mV
5
p.s
Small Signal Bandwidth
Av= +1,RL= 10kO
400
kHz
Small Signal Rise Time
Av= +1,RL= 10kO,VIN= 10mV
2.5
p.s
Overshoot
Av= +1,RL= 10kO,VIN= 10mV,CL= 100pF
10
±10V
Note 1: All specifications apply for all device grades. at Vs = ± 15V, and from TMin to TMax unless otherwise specified. TMin Is - 55"C and TMax is
LH0044. TMin Is - 25"C and TMax is + 85"C for the LH0044AC. LH0044B and LH0044C. Typicals are given for TA = 25"C.
%
+ 125"C for the
Note 2: This parameter is not 100% tested; however, 90% of the devices are guaranteed to meet this specification after one month of operation and after initial
tum-on stabilization.
Note 3: Noise Is 100% tested on the LH0044AC and LH0044B only. 90% of the LH0044 and LH0044C devices are guaranteed to meet this specmcation.
Note 4: The inputs are shunted by back-to-back diodes for over-voltage protection. Excessive current will flow for differential input voltages In excess of lV. Input
current should be limited to less than 1 mAo
Note 5: For supply voltages less than ± 15V. the absolute maximum input voltage is equal to the supply voltage.
Note 6: Refer to RETSOO44AH for LH0044AH military specifications and RETS0044H for LH0044H military specflllcations.
.
3·181
•
••
~
....
Typical Performance Characteristics
Total Input Noise
Voltage vs Frequency
Zi
I
..
....
..
>
~
~
A
!
TA aZIOt
.~~
w
~
20
TA' -SI'C
As -Ikn
ID
Input Voltage Range
Input Bias Current
3D
I V~"~ .!lV
U
10 ~
i
i
~
:!
....
POSITIV~
20
4'
.A
TA -25'C
10
T~ ·\25'C
A
~
I
10
100
Ik
10k
lOOk
d
FREQUENCY (HzI
.t1D
.ttS
,5
'20
SUPPLY VOLTAGE (VI
Input Bias Current vs CommonMode Input Voltage
160
ie
D.I
r;:
0.1
>
0.1
1.5 LL-'-_.l..--L_.l....--L----l
-15 -10 -5
I
5
10
15
'r
0.4
.
.~
...
>
!;
I!:
••
T...
t11
_nOt
.
:
J,': ~'l~~
100
II!
BD
.
TA :0 25°C
I
r-....
100
CD
20
20
10
100
FREQUENCY (HzI
1\
\
I
v, -.,IV
Co -D.DI.F
o
0.2 0.4 0.1 0.8 1.0 t.2 U
Maximum Power Dissipation
TA "25°t
\
0.1
'0
100
1k
100
!
510
I
I'-
10k lOOk 1M
I
INFINITE HEAT SiNK
l"-
'\.. 9JC ~ 1511"CIW
r--..l\.
NO HEAT SINK"" '\
9J. ~ 2DII"CIW
200
1\
1
7GII
i:
\.
I\.
•
100
~V"'OV
"'-
~
R, -10k
I
TIME Imsl
~, -.15v
I--
120
40
0.1
-5
CMRR vs Frequency
ICD
60
0
/
-10
-15
.1
.6
eo
ID
10
w
OUTPUT CURRENT (mAl
.lV. -:tIDY
120
;;;
3
..~
.
~..
~
III
.2
IDIk
Power Supply Rejection
Ratio vs Frequency
140
15
>
....
±S
fREQUENCY (Hzl
IBD
Large Signal Pulse
Response
T"'-55'C -
10k
10 100 Ik 10k llIk 1M
I
FREQUENCY IHzI
"
~
Ik
40
0.01 0.1
'ID
Vs-d5Y
f100
.15
TA .. 2&"C
E
o
""
o
.10
TA -125°C
!....
.4
.2
60
TA "25°C
20
,5
~
~ :1:10
\
.6
80
Output Swing
RL -'Ok
i\
TA • ...125·&
RL '"'Ok
fo-
SUPPLY VOLTAGE (VI
V,'- ~j~~'
f-
100
~
~
•
Large Signal Voltage
Response
~ .10
z
II
o
COMIIION.. OOE INPUT VOLTAGE (VI
,12
IijIII
1
120
~
D.'
0.5
::ta. ~
T. - 25'C
......-r'T
§
V~ .t1~V
I
140
TA = _55°C
1.0
,20
,15
Open Loop Frequency .
Response
t.2
1
....
"0
SUPPLY VOLTAGE IVI
Supply Current vs
Supply Voltage
1.1
iiw
NEGATIVE
A
I
100
~
"'\
I
21
51
FREQUENCY IHzI
15
100
125
150
TEMPERATURE I'CI
\
TL/K/5551-3
3-182
Applications Information
LOW DRIFT CONSIDERATIONS
COMPENSATION
Achieving ultra-low drift in practical applications requires
strict attention to board layout, thermocouple effects, and
input guarding. For specific recommendations refer to
AN-63 and AN-79.
For closed loop gains in excess of 10, no external components are required for frequency stability. However, for gains
of 10 or less, a 0.01,...F disc capacitor is recommended between pin 7 (V+) and pin 8 (Comp). An improvement in ac
PSRR will also be realized by use of the 0.01,...F capacitor.
A point worth stressing with regard to low drift specifications
is testing of the LH0044. Simply stated-it is virtually impossible to test the device using a thermoprobe or other form of
local heating. A one degree centigrade temperature gradient can account for tens of microvolts of virtual offset (or
drift). The test circuit of Figure 1 is recommended for use in
a stabilized oven or continuously stirred oil bath with the
entire circuit inside the oven or bath. Isothermal layout of
the resistors is advised in order to minimize thermocouple
induced EMF's.
OFFSET NULL
In general, further nulling of LH0044 is neither necessary
nor recommended. For most applications the specified initial offset is sufficient.
However, for those applications requiring additional null, an
obviOUS temptation might be to place a pot between pins 1
and 8 with the wiper returned to V+. This technique will
usually result in reduced gain and increased offset drift due
to mismatch in the TCR of the pot and R1 and R2. The
technique is, therefore, not generally recommended.
OVER COMPENSATION
The LH0044 may be overcompensated in order to minimize
noise bandwidth by paralleling the internal 100 pF capacitor
with an external capacitor connected between pins 1 and 6.
Unity gain frequency may be predicted by:
The recommended technique for offset nulling the LH0044
is shown in Figure 2. Null is accomplished in A2 and all
errors are divided by the closed loop gain of the LH0044.
Additional offset and drift incurred due to the use of A2 is
less than 1,...VIV for V+ and V- changes and O.Q1,...VI'C
drift for the values shown in Figure 2.
4 x 10-5
f = 100 pF
+ Cext pF (Hz)
r----...---...--i~+15V
r--R-l'------~r---T--,
I
10k
ISOTHERMAL
q) A~~~\
>::-+-"I--~~ VOUT :
I
1000 Ves
R3'
20
I
6------....-~~
-15V
I
I
h-
OVEN. _55°C ,;;TA S +125°C
'Wire-wound conslruction (TCR ,; 10 pppl"C)
EDGE CONNECTOR
TUK/5551-4
FIGURE 1. LH0044 Temperature Test Circuit
1M
10k
+15V
+15V
10k
lOOk
±150mv
l
lk
-15V
TL/K/5551-5
FIGURE 20 LH0044 Null Technique
3-183
Typical Applications
Buffered Output for Heavy Loads
R.
TL/K/5551-6
X1000 Instrumentation Amp
~{
= 9m RL
;, 0.2 X 103 (Rl
·Wire-wound resistors
Gain
+ R2) for YIN'; 10 mY
TL/K/5551-7
Precision Dual Tracking Regulator
:;".------...-----;1;,..- - - 0
v
+1&VOUTPUT
_ Vz(R2+R3}
QUT-
--R-I-
lOUT $100 mA
lOUT $100 mA
-~~o-~----------e~-J
:""-------=c)-----<> -15V OUTPUT
TL/K/5551-6
'Wire-wound for minimum drift.
Une and load regulation ,; 0.005%
3-184
Typical Applications
(Continued)
10V Reference Supply
R2
2 2.171k
R2
+15V
90k
0.111
RI
I
15k
Rl
252.5
R'
Z5k
Cl
O.OI.F
RI
&lSI
R7
15k
R5
m
INVERTING
INPUT
DUTPUT
NON·INVERTING
eo" 10V
INPUT
R12
2U
RI
18 252.5
Rl1
m
RI
RII
U5k
11
10
15k
15 2•7J1k
"
-16V
12
RIO
13
TUK/5551-10
STANDARD
~ CELL
TL/K/5551-9
Precision Instrumentation Amplifier
Overall
Gain
Input Stage
Gain
Output Stage
Gain
X1
X2
X5
X10
X20
X50
X100
X200
X500
X995
X1
X1
X1
X10
X10
X10
X100
X100
X100
X199
X1
X2
X5
X1
X2
X5
X1
X2
X5
X5
Noise Test Circuit
0.1 Hz HIGH PASS FILTER
10 Hz LOW PASS FILTER
~------~--------~"~------~'------~
II
5k
TL/K/5551-11
3-185
~
~
o
o
,----------------------------------------------------------------------------,
Noise Test Circuit (Continued)
3
VERT: 200 nVlDIV
HDRIZ: 5 SECIDIV
TL/K/5551-12
Connection Diagram
Metal Can Package
COMP
vTL/K/5551-2
Top View
Case Is electrically Isolated
Nole: Compensation Is not normally required. However, for maximum stability, a 0.01 "F capacitor should be placed between pins 7 and B when device
Is used below closed loop gains of 10.
Order Number LH0044H, LH0044CH,
LH0044ACH or LH0044BH
See NS Package Number HOSB
3-186
r------------------------------------------------------------------------, ::J:
~
~National
8Ao
~ Semiconductor
c.n
......
~
::J:
Q
Q
LH0045/LH0045C Two Wire Transmitter
Ao
c.n
(")
General Description
The LH0045/LH0045C Two Wire Transmitters are linear integrated circuits designed to convert the voltage from a sensor to a current, and send it through to a receiver, utilizing
the same simple twisted pair as the supply voltage.
The LH0045 and LH0045C contain an internal reference
designed to power the sensor bridge, a sensitive input amplifier, and an output current source. The output current
scale can be adjusted to match the industry standards of
4.0 mA to 20 mA or 10 mA to 50 mAo
Designed for use with various sensors, the LH0045/
LH0045C will interlace with thermocouples, strain gauges,
or thermistors. The use of the power supply leads as the
signal output eliminates two or three extra wires in remote
signal applications. Also, current output minimizes susceptibility to voltage noise spikes and eliminates line drop problems.
The LH0045/LH0045C is intended to fulfill a wide variety of
process control, instrumentation, and data acquisition applications. The LH0045 is guaranteed over the temperature
range of -55·C to + 125·C; whereas the LH0045C is guaranteed from - 25·C to + 85·C.
Features
•
•
•
•
•
High sensitivity
Low input offset voltage
Low input bias current
Single supply operation
Programmable bridge reference
(LH0045G)
• Non-interactive span and null adjust
• Over compensation capability
• Supply reversal protection
>
10 p.A/p.V
1.0 mV
2.0 nA
10V to 50V
5.0V to 30V
Equivalent Schematic
02
r-------~-------------------1~~~~LI
VREF~~---i---------i------.,
RJ
2.0k
RJ
INVERTING
INPUTH
~1;.;.l-------'\ll".Of\k_-----I
R4
1.0k
10
NON·INVERTING O-::.:..----~I\f\_-----t
INPUT (+)
R9
100
RS
1.0k
BRIOGE~~----~~~--~r_--t_----~--~--_1~~.-~~--oL2
RETURN
OVER
COMPENSATION
tHote: Pins shown are for the
12 pin to 8 (uGU) package.
COMMON
TUK/5556-1
3-187
Absolute Maximum Ratings
Power Dissipation
LH0045G
Operating Temperature Range
LH0045
LH0045C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
ESD rating to be determined.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Otflce/Dlstrlbutors tor availability and specifications.
(Note 2)
Supply Voltage (L1 to common)
+50V
Input Current
+20mA
Input Voltage (Either Input to Common)
Differential Input Voltage
OVtoVREF
±20V
Output Current (Either L1 or L2)
Reference Output Current
1.5W
-55"C to + 125"C
- 25"C to + 85"C
-65"Cto + 150"C
+ 260"C
50mA
5.0mA
Electrical Characteristics (Note 1)
Limits
Parameter
Conditions
LHOO45
Min
LH0045C
Typ
Max
0.7
2.0
3.0
Min
Units
Typ
Max
2.0
7.5
10
Input Offset Voltage (Vas)
Is = 4.0 mA, TA = 25"C
Is = 4.0mA
Offset Voltage Temperature
Coefficient (f:>.VOSI t:. T)
Is = 4.0mA
Input Bias Current (IB)
TA = 25"C
0.8
2.0
3.0
1.5
7.0
10
nA
nA
Input Offset Current (los)
TA = 25"C
0.05
0.2
0.4
0.2
1.0
1.5
nA
nA
Open Loop
Transconductance (gMOU
t:.ls = 4.0 mA to 20 mA
t:.ls = 10 mA to 50 mA
3.0
106
2X106
Supply Voltage Range (Vs)
p.VI"C
6.0
107
2X10 7
106
2X106
mV
mV
107
2X10 7
p.O
p.O
LH0045G Pins 5 and 6 Open
9.0
15
50
50
9.0
15
50
50
V
V
LH0045G Pins 5 and 6 Open
1.0
1.0
3.3
7.6
1.0
1.0
3.3
7.6
V
V
Input Voltage Range (VIN)
Open Loop Output
Impedance (ROUT)
Vs=10Vt045V,ls=4.0 mA,
TA = 25"C
Common Mode Rejection
Ratio (CMRR)
t:. VIN = 1.0V to 3.3V,
Is = 12mA
0.1
0.05
Power Supply Rejection
Ratio (PSRR)
t:.Vs = 10Vt045V,
Is = 12mA
0.1
0.01
Open Loop Supply
Current (Isou
Vs = 50V
Reference Voltage Load
Regulation (t:. VREFI t:.IREF)
t:.IREF = 0 mA to 2.0 mA,
TA = 25"C,
Reference Voltage Line
Regulation (t:. VREFI t:. Vs)
t:.Vs = 10Vt045V,
TA = 25"C
Reference Voltage Temperature
Coefficient (t:.VREFI t:.T)
IREF = 2.0mA
Reference Voltage (VREF)
IREF = 2.0 mA, TA = 25"C
IREF = 2.0 mA, TA = 25"C,
LH0045G Pins 5 and 6 Open
1.0
1.0
MO
0.1
0.05
mVIV
0.1
0.Q1
mVIV
2.0
3.0
2.0
3.0
mA
0.05
0.2
0.05
0.2
%
0.3
0.5
0.3
0.7
mVIV
0.004
3-188
4.3
8.6
5.1
10.3
%I"C
0.004
5.9
12
. 4.3
8.6
5.1
10.3
5.9
12
V
V
Electrical Characteristics (Note 1) (Continued)
Limits
Parameter
Conditions
Resistor R9
Is
Average Temperature
Coefficient of R9 (TCRs)
Is
ResistorR5
Is
Average Temperature
Coefficient of R5 (TCRs)
Is
Input Resistance (RIN)
TA
=
=
12 mA, TA
=
=
1.0 mA, TA
=
=
LHOO45
25°C
25°C
Units
Typ
Max
Min
Typ
Max
95
100
105
95
100
105
n
50
300
PPM/DC
1000
1050
n
50
300
PPMI"C
12mA
=
LHOO45C
Min
950
50
300
1000
1050
50
300
1.0mA
50
50
25°C
950
Mn
Note 1: Unless otherwise specified. these specifications apply for + 10V ,; Vs ,; +SOV. pin S shorted to pin 6 on the LH004SG. over the temperature range
- SS'C to + 12S'C for the LH004S and - 2S'C to + 8S'C for the LHOO4SC.
Note 2: Refer to RETS 004SG for LH004SG military specifications.
Connection Diagram
I
.L
000
0
@
<0
0
0 0 0.0
L2IV-)
COMMON
BRIDGE
RETURN
1
A~~~~
Ll(V+1
•
NC
12
\-"
t-:NVERTING
.. , -
•
V REF
OUTPUT
'1
B
9
'• • 0->
NON·INVERTING
INPUT(+)
T
T-
NC
COMPENSATION
TL/K/5556-2
Top View
• Note: Pin S is shorted to Pin 6 to obtain a
Nominal +S.1V, VREF. LeflopenVREF ~ +10V.
The case is isolated from the circuit
for both to 3 and to 8.
Order Number LH0045G or LHOO45CG
See NS Package Number G12B
3-189
o
Ln
'III'
o
o
Typical Performance Characteristics
:::E:
...I
....
Ln
LH0045G Maximum Power
Dissipation
2.4
'III'
o
o
-
2.1
:::E:
6~~±-
"\. ;::IN:E HEAT SlNK-
~ I.B
...I
~
~
ili0;
'"
1.5
1.2
t-F:0 ,;:
0.9
8l'C
IJJA"'W""
0.6
0.3
1--+-
oS
"\.
........::
I 1\ T • 25'C
I \t C
40
;0
r'-..
~
~
Safe Operating Area
50
~
30
>-
~
20
~
10
f-- _ "G" PACKAG~
25
50
75
100
150
125
10
0
TEMPERATURE I'CI
Input Noise Voltage
111111
111111
0;
Fils' lOOk
z
~
;0
1.0
~
0.5
.s
lis-1M
::l 100
'"'"il
0
F
111111
~
0.10
0.05
IIIIII
10
10
100
10k
Uk
FREQUENCY IHzl
m
120
ii"
'"~
§
Ul
'">II:
~
10
,:
60
0
~ -5.0
~
z
"i!i
-10
-15
0
-20
10k
lOOk
FREQUENCY 1Hz!
26
24
~
~
22
"I:j>
20
~
ill
5,
II:
,:
VREF vs Resistance Between
Pin 5 and Pin 3
TA =25°C
LH0045G ONLY
\
II
2.10
2.0B
;0 2.06
\
oS 2.04
i
II:
1\
16
il
...-;1:""
10'
10'
~
10'
I
I I
'1\,:
~
10'
I
1.0
1.0 10 100 t.Ok 10k lOOk 100M 10M 100M
FREQUENCY (Hz)
vlEF~'o~
~
lOOk
RESISTANCE IETWEEN PIN 6 AND PIN 3 (01
oS
"'"
~
u
~
VREF ;!IS.IV
~
'";!
2.02
2.00
'"z
50
40 f30
20
10
0
-10
V.:~~~I:~
~~
~~
~
~~~
"':<:<;;: ~~
((;;
-20
-3~
1-1- I-
-40
-50
0 5.0 10 15 20 25 3D 35 40 45 50
-75 -50 -25 0 25 50 75 100125
SUPPLY VOLTAGE IVI
TEMPERATURE I'CI
Open Loop Supply
Current vs Temperature
1.0
Change In R9 with Temperature
Normalized to 25'C
O.B
0.6
"
""
§
ll!
;!
~
'"z
"i!i
I\..
~
-75 -50 -25 0
25
50
~
0.4
1/
0.2
".
0
-0.2
",
-0.4
-0.6
1.92
1.90
10
>
I-
"i!i
t
12
Variation of VREF with
Temperature Normalized
to 25'C
II
a
10k
~
4.0 mA~4ls ~20mA
Ys;; 24V
TA " 25'e
~
9
ILHO~~5GI
>- 1.91
1.96
1.94
14
!.Ok
"~
10'
~
20
I.Ok
VAEF = S.lV
10'
25 45 65 ,85 105 125
1--
f"',20 Hz
Z
100
z
~
oS 5.0
I
40
u
10'
:l; 10'
OFFSET
TA=25'C
>
10
10
~
....
4Vs=J5V
'S"2mA
,
I"-
~
VREF Line Regulation
4Vs~10VtD45V
!
r--- r-- BIA~- f-- f--
~
15
VRE~I~I~.IV
100
50
TEMPERATURE ('CI
Power Supply Rejection
Ratio vs Frequency
~
~
0
-55 -35 -15 5
lOOk
40
Open Loop
Transconductance
vs Frequency
5; 0.15
lis' 0
30
Input Currents
1.5
~
20
SUPPLY VOLTAGE IVI
2.0
~
r-;
I
0
1000
PMAX "1.5W
75 100 125
TEMPERATURE I'CI
-O.B
-1.0
-75 -50 -25 0 25 50 75 100 125 150
TEMPERATURE I'CI
TL/K/5556-3
3·190
r:::J:
o
o
~
en
"r:::J:
o
o
~
en
Typical Applications
Thermocouple Input Transmitter
(5.1V)
o
4.6M
R
9.Zk
~ D.Bl5p~
11
--~+VS
'····~jr
.. BODn
ATTHIS
NODE
1.6M
I.D"A (FUll SCALE)
TUK/5556-4
For 1 p.A Full Scale, RIN ~ VIN/l p.A = Source Impedance
e.g., VIN (Full Scale) ~ 10 mY, RIN ~ 10k
Bridge Impedance ~ O.8k, R ~ 10k - 0.8k ~ 9.2k
@
Pin 11
Resistance Bridge Input Transmitter
(5.1VI
Uk
Rl
R2
2.5k
2.5k
r
--~+VS
,...•.•j
AV
2.DmA
~
185k
(2.5k)II(120) '" 1600
e.g., Jl.R4
=1
~
Full Scale
S1RAIN GAUGE OR
RESISTANCE THERMOMETER
TL/K/5556-5
3·191
Typical Applications (Continued)
Electronic Temperature Sensor
r---
(S.IV)
I
I
I
lM,111
I
I
I
I
4.0 rnA = 0% = IrC
20 rnA = 100% = 10lrC
100
111
TL/K/5556-B
Remote Sensing Digital Thermometer
uo
3311
Uk
1.111t
106M
'000
L_
SPAN
COLD JUNCTION
COMPENSAnDN
'100
TL/K/555B-7
•All yol1ages Indicalec:i by () are measured w~h respec110 common, pin 3,
Instrumentation Amplifier Transmitter
.,....
+1DV
RG
/'-----LH..,.-----,
"
I
I
I
I
o--T~+
""
=[
~O,OOO ]
VIN -1
Where: VIN
e.g.
VIN
= Full Scale Input Vol1age
= 10 mV (Full Scale), RG = 505
I1V,FU
• 82.5'
INPUTS
R.
.
....
L __
_
_ _ _ oJ
(UV)
1!%"-UVf21,aA1
10C1%- -2,OVO'lIlAI
TL/K/555B-B
•All vol1ages Indicated by ( ) are measured with respec110 common, pin 3,
3-t92
r-----------------------------------------------------------------------------, r
::I:
o
Applications Information
o
0I:loo
CIRCUIT DESCRIPTION AND OPERATION
THERMAL CONSIDERATIONS
A simplified schematic of the LH0045/LH0045C is shown in
Figure 1. Differential amplifier, A2 converts very low level
signals to an output current via transistor 01. Reference
voltage diode D1 is used to supply voltage for operation of
A2 and to bias an external bridge. Current source 11 minimizes fluctuation in the bridge reference voltage due to
changes in Vs.
The power output transistor of the LH0045 is thermally isolated from the signal amplifier, A2. Nevertheless, a change
in the power dissipation will cause a change in the temperature of the package and thus may cause amplifier drift.
These temperature excursions may be minimized by careful
heat sinking to hold the case temperature equal to the ambient. With the TO-8 (G) package this is best accomplished by
a clip-on heat sink such as the Thermalloy # 2240A or the
Wakefield #215-CB. The case is electrically isolated from
the circuit.
In addition, the power change can be minimized by operating the device from relatively high supply voltages in series
with a relatively high load resistance. When the signal
forces the supply current higher, the voltage across the device will be reduced and the internal power dissipation kept
nearly equal to the low current, high voltage condition.
For example, take the case of a 4.0 mA to 20 mA transmitter with a 24 V supply and a 100n load resistance. The power at 4.0 mA is (23.6V) X (4.0 mAl = 94.4 mW while at full
scale the power is (22V) X (20 mAl = 440 mW. The net
change in power is 345 mW. This change in power will
cause a change in temperature and thus a change in offset
voltage of A2.
If the optimum load resistance of 800n (from Figure 2) is
used, the power at null is [24V - (4.0 mAl X (800n))
(4.0 mAl = 83 mW. The power at full scale is [24V (20 mAl X (800n)1 (20 mAl = 160 mW. The net change is
77 mW. This change is significantly less than without the
resistor.
In normal operation, the LH0045/LH0045C is used in conjunction with an external bridge comprised of RS1 through
RS4. The bridge resistors in conjunction with bridge return
resistor, R5, bias A2 in its linear region and sense the input
signal; e.g. RS4 might be a strain sensitive resistor in a strain
gauge bridge. RT is adjusted to purposely unbalance the
bridge for 4.0 mA output (null) for zero signal input. This is
accomplished by forcing 2.5 /LA more through RS3 than
RS4·
The 2.5 /LA imbalance causes a voltage rise of (2.5 /LA) X
(100n) or 250 /LV at the top of RS3. Terminal L2 may be
viewed as the output of an op amp whose closed loop gain
is approximately RF/RS3 = 1600.
The 250 /LV rise at the top of RS3 causes a voltage drop of
(1600) x (250 /LV) or -O.4V across R9. An output current,
Is, equal to O.4V IR9 or 4.0 mA is thus established in 01. If
RS4 is now decreased by 1.0n (due to application of a strain
force), a -1.0 mV change in input voltage will result. This
causes L2 to drop to -2.0V. The output current would then
be 2.0V/100n or 20 mA (Full Scale). If RS3 is a resistor of
the same material as RS4 but not subjected to the strain,
temperature drift effects will be equal in the two legs and will
cancel.
In actual practice the loading effects of RB2 on the gain
(span) and RF on output current must be taken into account.
Is =4.0 mA (NULL. 0%)
Is = 20 mA (100% FULL SCALE)
L1
RBl
2.5k
+
RB3
100
L
____
~H~
_____
.J L2
RF
160k
VL2
VL2
=-0.4V (NULL)
=
-2.0V (FULL SCALE)
TL/K/5556-9
FIGURE 1. LH0045 Simplified Schematic
3-193
U1
.....
r
::I:
o
o
0I:loo
U1
o
Applications Information (Continued)
If the supply voltage is increased to 48V and the load resistance chosen to be the optimum value from Figure 2 (1.95k),
then the power at null is [48V - (4.0 mAl x (1.95k)1
(4.0 mAl = 160.8 mW and the power at full scale is [48 (20) x (1.95k)1 (20 mAl = 180 mW for a net change of
19.2 mW.
Bridge Return
An applications resistor is provided in the LH0045 with a
nominal value of 1.0 kO. The primary application for the
resistor is to maintain the minimum common mode input
voltage (1.0V) required by the signal amplifier, A2. A typical
input application might utilize a strain gauge or thermistor
bridge where the resistance of the sensor is 1000. Since
only 1.0 mA may be drawn from VREF, the 1.0 kO bridge
return resistor is used to bias A2 in its linear region as
shown in Figure 3 .
3.0
.
...
2.5
~
2.0
:!!
z
...ina:
CI
Is=4-20~~
1.5
C
CI
....
liE
1.0
V
=
..
~
0.5
V
L
V
V
1.0mA
~
0.5mA
~ ~r'0~50m~
10
20
30
40
50
60
SUPPLY VOLTAGE IV)
100
TL/K/5556-10
FIGURE 2. Optimum Load Resistance vs Supply Voltage
1.0mA
1.0 m.~ X I.Dkn = 1.0V
Note that the optimized load resistance is actually the sum
of the line resistance, receiver resistances and added external load resistance. However, in many applications the line
resistance and receiver resistances are negligible compared
to the added external load resistance and thus may be omitted In calculations.
TL/K/5556-11
FIGURE 3. Use of Bridge Return
Over Compensation-Pin 8
Over compensation of the signal amplifier, A2, may be desirable in DC applications where the noise-bandwidth must be
minimized. A capaCitor should be placed between pin 8 and
pin 3, common.
Typically,
AUXILIARY PINS
The LH0045 has several auxiliary pins designed to provide
the user with enhanced flexibility and performance. The following is a discussion of possible uses for these pins.
Programmable VREF-Plns 5 and 6
The LH0045G provides pins 5 and 6 to allow the user to
program the value of the reference voltage. The factory
trimmed 10V value Is obtained by leaving 5 and 6 open. A
short between 5 and 6 will program the reference to a nominaI5.1V.
f3 db = 2 1T R (C,
+ CEXT)
where:
R = 400MO
Cl = Internal Compensation Capacitor = 100 pF
CEXT = External (overcompensation) Capacitor
A resistor or pot may be placed between pin 5 and common
(pin 3) to obtain reference voltages between 10V and 30V
or between pin 5 and pin 7 for reference voltages below
10V. Increased reference voltage might be useful to extend
the positive common mode range or to accommodate transducers requiring higher supply voltage. A plot of resistance
between pin 5 and pin 3 versus VREF is given in the typical
electrical characteristics section. VREF may be adjusted
about its nominal value by arranging a pot from VREF to
common and feeding a resistor from the wiper into pin 5 so
that it may either inject or extract current. Lastly, pin 5 may
be used as a nominal 1.7V reference pOint, if care is taken
not to unduly load it with either DC current or capacitance.
Obviously, higher supply voltages must be used to obtain
the higher reference values. The minimum supply voltage to
reference voltage differential is about 4.0V.
Input Guard-Pins 9 and 12
Pins 9 and 12 have no internal connection whatever and
thus need not be used. In some critical low current applications there may be an advantage to running a guard conductor between the inputs and the adjacent pins to intercept
stray leakage currents. Pins 9 and 12 may be connected to
this guard to simplify the PC board layout and allow the
guard to continue under the device. (See AN-63 for further
discussion of guarding techniques.)
NULL AND SPAN ADJUSTMENTS
Most applications of the LH0045 will require potentiometers
to trim the initial tolerances of the sensor, the external resistors and the LH0045 itself. The preferred adjustment proce-
3-194
r-----------------------------------------------------------------------------, :::I:
~
c
Applications Information (Continued)
c
dure is to stimulate the sensor, alternating between two
known values, such as zero and full scale. The span and
null are adjusted by monitoring the output current on a chart
recorder, meter, or oscilloscope. A full scale stimulus is applied to the sensor and the span potentiometer adjusted for
the desired full scale. Then, to adjust the null, apply a zero
percent signal to the sensor and adjust the null potentIometer for the desired zero percent current indication.
Selection of RF
Input bias current to the LH0045C is guaranteed less than
10 nA. Furthermore, the change in IB over the temperature
range of interest is typically under 1.0 nA. If 12 SPAN is selected to be 1.0 /LA (1000 alB) errors due to alBIaT will be
less than 0.1%. For SPAN = 16mA.
If it is impractical to cycle the sensor during the calibration
procedure, the signal may be simulated electrically with two
cautions: 1) the calibration signal must be floating and 2) the
calibration thus achieved does not account for sensor inaccuracies andlor errors in the signal generator.
where R9 = Internal Current Set Resistor = 1000.
oCIo
U1
.....
~
:::I:
c
c
oCIo
U1
o
VSPAN = aV1 = -(16 mA)(R9) = - 1.6V
For 12 SPAN = 1.0 p.A,
RF = VSPAN = -1.6V = 1.6M
12 SPAN
1.0 p.A
SENSOR SELECTION
RF = 1.6MO
Generally it is easiest to use an insulated sensor. If it is
necessary to use a grounded sensor, the power supply must
be isolated from chassis ground to avoid extraneous circulating currents.
Nole: For appllcalions wilh DC gain (ratio of feedback and input reSistance)
less than B, it is recommended that a Schottky barrier diode be connected between pin 11 (cathode) and pin 3 (anode). This prevents the
possibility of latch up resulting from the Inverting Input being forced
beyond the amplifier supply voltage during power up.
DESIGN EXAMPLE
Selection of RBl and RB2
The minimum input common mode voltage, VMIN required at
the pin 10 input of A2 is 1.0V. Furthermore, the maximum
open loop supply current (lsoLl drawn by the LH0045 is
3.0 mAo That leaves IMIN = 4.0 mA - 3.0 mA = 1.0 mA left
to bias the bridge at nUll. Hence:
There are numerous circuit configurations that may be utilized with the LH0045. The following is intended as a general design example which may be extended to specific
cases.
Circuit Requirements
Output Characteristics
a. 0% = 4.0 mA (NULL)
RB2
b.100% = 20 mA (SPAN = 16 mAl
c. Supply Voltage = 24V
~
VMIN = 1.0V = 1.0 kO
IMIN
1.0mA
And,
Input (Sensor) Characteristics
VREF RB2 = 1.0V
RS1 + RS2
a. VIN = 100 mV (Full Scale)
b. VIN = 0 mV (Zero Scale)
c. Source Impedance:!> 1.00
RSl = RS2
VREF -1.0V
1.0V
General Characteristics
= 1.0k (5.1 -1.0)
a. O'C:!> TA :!> +75'C
b. Overall Accuracy:!> 0.5%
VAEF
..
RSI
4.0.
RS
SI.0
RS1 .. 4.0 kO
5.1V
Alternatively, an LM113, 1.22V reference diode, or an op
amp such as the LM108 may be used to bias the signal
amplifier, A2, as shown in Figure 5. These techniques have
the advantage of lowering the impedance seen at pin 10.
Ros
4.6M
R
lOOk
Selection of Ros
Res is selected to provide the null current of 4.0 mA,
V 1 NULL = 4.0 mA x 1000 = 0.4V. From previous calculations we know that VMIN = 1.0V. The voltage pin 11, V2 is:
VzQll1.0V
v,.
VMIN" 1.0V
V2 = VMIN + Ves "" VMIN
forVIN = OV
Hence, the current required to generate the null voltage,
12 NULL is:
R"
1.0k
I:ZSPAN
=1.DpA
R,
1.6M
I
VMIN - V1 NULL
2 NULL =
RF
TL/K/5556-12
= 1.0V - (-0.4V) = 0.875
FIGURE 4_ Design Example Circuit
1.6MO
A
/L
This current must be provided by Res from VREF; hence:
R
VREF - VMIN
OS =
12 NULL
3-195
•
Applications Information (Continued)
i.1V
V,N
l.OV
TL/K/5556-14
TLlK/5556-13
FIGURE 5. Alternate Biasing Techniques
The nominal value for VREF Is 5.1V. therefore the nominal
value for Ros is:
5.1V -1.0V or'
0.875/LA
2.
Select 12 SPAN so that it is large compared to ~IB'
1000 ~IB is a good value.
3.
4.
5.
Determine VSPAN = ~V2 = (lSPAN) (R9).
Determine RF = (VSPAN"2 SPAN)
Select
Ros = 4.6MO
R
B2
1V
INULL - ISOL
Where:
VMIN = minimum common mode input voltage
IMIN = minimum available bridge current
ISOL = maximum open loop supply current
6.
R
= Total impedance in signal path between
R9
Y,N
= Current setting resistor = 1000
= Full scale input voltage = 100 mV
7.
8.
pin 10 and pin 11
B2
VREF - VMIN
VMIN
Determine V2 NULL = INULL RS
Determine
VMIN - V2 NULL
I
2 NULL =
RF
S.
Determine
(V,N)(RF)
(ISPAN(R9)
ROS= VREF - VMIN
12 NULL
R = (100 mY) (1.6 MO)
(16 mAl (1000)
10.
Determine
R=
R = 100 kO
As before. uncertainties in device parameters might dictate
that RF be made a pot of appropriate value.
(V,N) (RF)
(ISPAN) (RS)
Where:
Y,N = Sensor full scale output voltage
Summary of the Steps to Determine External Resistor
Values
1.
R
Bl =
where:
:.R =
Determine
X R9
R
IMIN
RB2~:---~
1
RF
ISPAN = Y'N
~ VMIN
R
It should be noted however. that the variation of VREF may
be as high as 5.9V or as low as 4.3V. Furthermore. the
tolerances of R9 (1000). RBI' RB2. and the input Vas of A2
would predict values for Ros as low as 3.9SM and as high
as 5.43M. The implication is that in the specific case. Ros
should be implemented with a pot. of appropriate value. in
order to accommodate the tolerances of VREF. R9. Vos.
RBI. RB2. etc.
Selection of R
SPAN is required to be 16 mAo From feedback theory and
the gain equation we know:
Select IFULL SCALE = INULL + ISPAN for the desired application. (INULL is frequently 4.0 mA and
IFULL SCALE is frequently 20 mA.)
3-196
r-----------------------------------------------------------------------------.r::::E:
o
Applications Information (Continued)
o
Where:
ERROR BUDGET ANALYSIS
Errors Due to Change In VREF (a VREF)
There are several factors which could cause a change in
VREF. First, as the ambient temperature changes, a VREF
drift of ± 0.2 mV
might be expected. Secondly, supply
voltage variations could cause a 0.5 mVIV change in VREF.
Lastly, self-heating due to power dissipation variations can
cause drift of the reference.
aVREF = Total change in VREF
K =
rc
ISPAN = Change in output current from
0% to 100%
For example, a VREF = 24 mY, K = 0.2, R9 = 100n, ISPAN
= 16 mAo Hence, a 0.12% worst case error might be expected in output currents due to a VREF effects.
aVREF
aVREF= [(O)(aPDlss)+aTAl ~
\,
RB2
RBl + RB2
R9 = Current set resistor
An overall expression for change in VREF is:
)
Error Due to Vos Drift
One of the primary causes of error in Is is caused by VOS
drift. Drift may be induced either by self heating of the device or ambient temperature changes. The input offset voltage drift, aVos/aT, is nominally 3.3 /Lvrc per millivolt of.
initial offset. An expression for the total temperature dependent drift is:
Thermal Effects
+ aVREF (aVs)
}
\ avs
Supply Voltage Effects
Where:
o = Thermal resistance, either
junction-to-ambient or junctionto-case
Where:
o=
aPOISS = Change in avg. power dissipation
Thermal resistance either junctionto-ambient or junction-to-case
aTA = Change in ambient temperature
aPOISS = Change in average power dissipation
a :~EF = Reference voltage drift (in mV rC)
aTA = Change in ambient temperature
The bracketed term may be minimized by heat sinking and
using the power minimization technique described under
"Thermal Considerations". For the LH0045G design example, avos = 0.352 mV under ambient conditions and
0.263 mV using a heat sink and RL = 800n.
REF = Une regulation of VREF
a VV
a S
Several steps may be taken to minimize the bracketed
terms in the equation above. For example, operating the
LH0045G with a heat sink reduces the thermal resistance
from 8jA = 83°C/W to 0jC = 60°C/W. The aPOISS term
may be significantly reduced using the power minimization
technique described under "Thermal Considerations". For
the design example, aPolSS is reduced from 384 mW to
77 mW (RL = 800n). Evaluating the LH0045G with a heat
sink and RL = 800n yields.
The error in output current due to aVOS is:
als (in %)= 100X
aVos
ISPAN
Y,N (FULLSCALE)
= 100 X
RF
(R) (R9) (lSPAN)
For the design example, avos = 0.263 mY, Y,N (Full Scale)
= 100 mY. Hence, 0.26 mV + 100 mV or 0.26% worst
case error could be expected in output current effects.
---;c-
600 C (0.077W)+ 75°C ) (0.2 mY)
aVREF= ( "Vi'
Errors Due to Changes In R9
The temperature coefficient of R9 (TCR) will produce errors
in the output current. Changes in R9 may be caused by selfheating of the device or by ambient temperature changes.
+ 0.5 mV (16V)
V
aVREF = 24 mV
als .
aR9
-,-(In %) = 1007
T (8 POISS + a TAl
SPAN
'"
An expression for error in the output current due to a VREF
is:
Where:
alS (%)= 100(K)(Ros)(aVREF)-(1-K)(aVREF)(RF)
ISPAN
(R9) (Ros) (lSPAN
8
= Thermal resistance either from
junction-to-amblent or junction-tocase
aPDlSS = Change in average power dissipation
3-197
"'"
.....
r
U'I
::::E:
o
o
"'"
o
U'I
o
In
g
Applications Information
(Continued)
ATA = Change in ambient temperature
::c
...I
......
AR9 = TCR of R9
AT
In
'01:1'
C)
C)
:5
The following or their equivalents are recommended:
Sockets:
G - 12-Lead TO-8: Barnes Corp. #MGX-12
Textool #212-100-323
Using
the
LH0045G
design
example,
AR91 AT
0.03%/OC, hence a 3.2% worst case error in output current
might be expected for operation without a heat sink over the
temperature range.
Heat sinking the device and using RL = 8000, reduces
Als/lsPAN to 2.3%.
The error analysis indicates that the internal current set resistor, R9, is inadequate to satisfy high accuracy design criterion. In these instances, an external 1000 reSistor should
be substituted for R9.
Obviously, the TCR of the resistor should be low. Metal film
or wire-wound resistors are the best choice offering TCR's
less than 10 ppmfOC versus 50 ppmfOC typical drift for R9.
External Causes of Error
The components external to the LH0045 are also critical in
determining errors. Specifically, the composition of resistors
RBI, Ros, RF, R, etc. in the design example will influence
both drift and long term stability.
In particular, resistors and potentiometers of wire wound
construction are recommended. Also, metal-film resistors
with low TCR (S: 10 ppmrC) may be used for fixed resistor
applications.
.
Error Analysis Summary
The overall errors attributable to the LH0045 may be minimized using heat sinking, and utilization of an external load
resistor. Although RL reduces the compliance of the circuit,
its use is generally advisable in precision applications. Extemal components should.be selected for low TCR and long
term stability.
.
The design example errors, using an external 1000 wire
wound resistor for R9 equal:
Als =0.12%+0.26%+0.08%=0.46%
ISPAN
'-.,J
'-r--'
AVREF
V
AVos
AR9
SOCKETS AND HEAT SINKS
Mounting sockets, test sockets and heat sinks are available
for the G package.
Heat Sinks:
G - 12-Lead TO-8: Thermalloy .. 2240A
Wakefield #215-CB
Definition of Terms
Input Offset Voltage, Vos: The voltage which must be applied between the input terminals through equal resistances
to obtain 4.0 mA of supply (output) current.
Input Bias Current, Is: The average of the two input currents.
Input Offset Current, los: The difference in the current into
the two input terminals when the supply (output) current is
4.0 mA.
Input Resistance, RIN: The ratio of the change in input
voltage to the change in input current at either input with the
other input connected to 1.0 VDC.
Open Loop Transconductance, gMOL: The ratio of the
supply (output) current SPAN to the input voltage required
to produce that SPAN.
Open Loop Output Resistance, ROUT: The ratio of a specified supply (output) voltage change to the resulting change
in supply (output) current at the specified current level.
Common Mode Rejection Ratio, CMRR: The ratio of the
change in input offset voltage to the peak-to-peak input voltage range.
Power Supply Rejection Ratio, PSRR: The ratio of the
change in input offset voltage to the change in supply (output) voltage producing it.
Input Voltage Range, VIN: The range of voltages on the
input terminals for which the device operates within specifications.
Open Loop Supply Current, Is: The supply current required with the signal amplifier A2 biased off (inverting input
positive, non-iiwerting input negative) and no load on the
VREF terminal.
This represents a measure of the minimum low end signal
current.
Reference Voltage Line Regulation, AVREFI AVs: The ratio of the change in VREF to the peak-to-peak change in
supply (output) voltage producing it.
Reference Voltage Load Regulalon, AVREFI AIREF: The
change in VREF for a stipulated change in IREF.
3-198
,------------------------------------------------------------------------, r
:J:
o
o
~National
en
....
......
~ Semiconductor
r
:J:
o
o
en
LH0061/LH0061C 0.5 Amp
Wide Band Operational Amplifier
....
(')
General Description
Features
The LH0061/LH0061C is a wide band, high speed, operational amplifier capable of supplying currents in excess of
0.5 ampere at voltage levels of ±12V. Output short circuit
protection is set by external resistors, and compensation is
accomplished with a single external capacitor. With a suitable heat sink the device is rated at 20W.
The wide bandwidth and high output power capabilities of
the LH0061/LH0061 C make it ideal for such applications as
AC servos, deflection yoke drivers, capstan drivers, and audio amplifiers. The LH0061 is guaranteed over the temperature range -55·C to +125·C; whereas, the LH0061C is
guaranteed from - 25·C to + 85·C.
•
•
•
•
•
0.5A
1 MHz
70V/p.s
240 mW
300 nA Max
Output current
Wide large signal bandwidth
High slew rate
Low standby power
Low input current
Schematic and Connection Diagrams
.----.....-----(:;),""" -,
y'
}-
R'
'0
R2
Rl
"K
"0
fR..
I
-..I
sO"
IIIlV.INPUT
C'o---.....-i
NON·INV,INPUT
&!)--_.....
----I-------'
,,..,
TUK/6861-1
TO-3 Package
v-
v'
NON·INY.
INPUT
TLlK/8861-2
Top View
Order Number LH0061CK
See NS Package Number K08A
3-199
o
'P'"
§
:5
....
§
'P'"
::c
....I
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 5)
Supply Voltage
Peak Output Current
Output Short Circuit Duration (Note 4)
Operating Temperature Range
LH0061
LH0061C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
±lSV
See Curve
±10mA
Power Dissipation
Differential Input Current (Note 2)
Input Voltage (Note 3)
±15V
2A
Continuous
- 55'C to + 125'C
-25'Cto +S5'C
-65'Cto + 150'C
260'C
ESD rating to be determined.
DC Electrical Characteristics (Note lj
Limits
Parameter
Conditions
LHOO61
Min
Input Offset Voltage
Rs:5: 10 kll, Te = 25'C, Vs = ±15V
Rs:5: 10 kll, Vs = ±15V
Voltage Drift with Temperature
Rs:5:10kll
1.0
Offset Voltage Change with Output Power
Input Offset Current
Min
4.0
6:0
",VI'C
Input Resistance
Te = 25'C
100
300
50
300
1.0
200
1
Input Voltage Range
Vs = ±15V
1.0
0.3
90
60
±11
Power Supply Rejection Ratio
Rs';; 10 kll, b.Vs = ± 10V
Voltage Gain
Vs=
RL =
Vs =
RL =
±15V,Vo= ±10V
1 kll, Tc = 25'C
±15V, Vo = ±10V
2011
200
500
nA
nA
nArC
1
3
70
mV
mV
",V/watt
100
Rs';; 10 kll, b.VeM = ± 10V
10
15
5
Te = 25'C
Common Mode Rejection Ratio
3.0
5
Input Bias Current
0.3
Max
5
30
Input Capacitance
Units
Typ
5
Te = 25'C
Offset Current Drift with Temperature
LHOO61C
Typ Max
500
1.0
1.0
nA
",A
Mil
3
pF
SO
dB
± 11
V
70
SO
50
70
dB
50
100
25
50
V/mV
V/mV
2.5
5
Output Voltage Swing
Vs·= ±15V, RL = 2011
Output Short Circuit Current
Vs = ±15V, Te = 25'C, Rse = 1.011
Power Supply Current
Vs = ±15V, VOUT = 0
7
10
10
15
mA
Power Consumption
Vs = ±15V, VOUT = 0
210
300
300
450
mW
3-200
±10 ±12
±10 ±12
600
V
600
mA
r
AC Electrical Characteristics (Te =
::::t
C)
C)
25'C, Vs = ± 15V, Ce = 3000 pF)
en
.....
......
Limits
Parameter
Slew Rate
AV =
+ 1, RL =
LHOO61C
LHOO61
Conditions
100n
Min
Typ
25
70
Max
Typ
25
70
V//ks
MHz
Power Bandwidth
1
1
30
30
Small Signal Overshoot
5
aV,N = 10V,Av = +1
f = 1 kHz, Po = 0.5W
Max
ns
10
%
30
0.8
0.8
/ks
1
1
/ks
0.2
0.2
%
Overload Recovery Time
Harmonic Distortion
20
Note 1: Specifications apply for ±SV ,;: Vs ,;: ±ISV, Ce ~ 3000 pF, and -SS'C ,;: Te ,;: + 12S'C for the LH0061K and -2S'C ,;: Te ,;: +SS'C for the
LH0061CK. Typical values are forTe = 2S'C.
Note 2: The inputs are shunted with back-to·back diodes for overvoltage protection. Excessive current will flow if a differential voltage In excess of IV is applied
between the inputs without limiting resistors.
Note 3: For supply voltages less than ± ISV, the absolute maximum input voltage is equal to the supply voltage.
Note 4: Rating applies as long as package power rating is not exceeded.
Note 5: Refer to RETS0061 K for LH0061 K military specifications.
Typical Performance Characteristics
Power Derating
;::
Ii!
2
I
r--
\
20
10
OJA - 25"C/W
5
25
0
~
15
50
100
1---t1-"-+:"""~I"'~~VS.,15v-l
1.5
I+-+-t--+--t---I--..JH
I-+-+-+--t-+---i-+I
~ -1.0
1-t+-t--+--t---IJi""i
H+-t::"+""""'t--I---j
---L....Iol"'v'--I-----'----'_.J.........J
-1.5
-2.0
125
-15
TEMPERATURE ( CI
-10
-5
5
10
Large Signal Frequency
Response
15
Tc ;2J'CI
Vs ·±15V
,
\
10
~ -0.5
..
-
14
12
Tc '" 25~C
1.0
I 0.:
\
15
...-.....,..-.,.---.--,--::::l.......,
2.0
.J.
OJC ~ 2'C/W
25 -INFINITE HfATSINK' -
.1,
..i
iii
.."
lr
Safe Operating Area
8
Rio "20u
\
6
41+1ff1--H"tH+H++--+-+t-i
2 f-ttI#-+-H~fttt--++tI
o LJ..UJ.L......J.....J....J..J...J.Ju=_ _...J....LJ
0.5M 1M
2M
5M
10M 20M
50M
FREQUENCY (Hz)
OUTPUT VOLTAGE (VI
TUK/6861-3
Typical Applications
Unity Gain Driver
AC Servo Amplifier
lK
90.9K
L~
6
1+ L/'>:CA':":S~EI--O
i
OUTPUT
INPUTo-...JW"""~V
tK
TUK/6861-4
TUK/6861-5
3-201
r-
::::t
C)
C)
Min
Small Signal Transient Response
Settling Time (0.1 %)
Units
en
.....
0
~National
~ Semiconductor
LH0062/LH0062C High Speed
FET Operational Amplifier
General Description
The LH0062/LH0062C is a precision, high speed FET input
operational amplifier with more than an order of magnitude
improvement in slew rate and bandwidth over conventional
FET IC op amps. In addition it features very closely matched
input characteristics, very high input impedance, and ultra
low input currents with no compromise in noise, common
mode rejection ratio or open loop gain. The device has internal unity gain frequency compensation, thus assuring stability in all normal applications. This considerably simplifies its
application, since no external components are necessary
for operation. However, unlike most internally compensated
amplifiers, external frequency compensation may be added
for optimum performance. For inverting applications, feedforward compensation will boost the slew rate to over 120
V/p.s and almost double the bandwidth. (See LB-2, LB-14,
and LB-17 for discussions of the application of feed-forward
techniques). Over-compensation can be used with the amplifier for greater stability when maximum bandwidth is not
needed. Further, a single capacitor can be added to reduce
the 0.1 % settling time to under 1 p.s. In addition It Is free of
latch-up and may be simply offset nulled with negligible effect on offset drift or CMRR.
The LH0062 is designed for applications requiring wide
bandwidth, high slew rate and fast settling time while at the
same time demanding the high input impedance and low
input currents characteristic of FET inputs. Thus it is particularly suited for such applications as video amplifiers, sample/hold circuits, high speed integrators, and buffers for
AID conversion and multiplex system. The LH0062 is specified for the full military temperature range of - 55· to
+ 125·C while the LH0062C is specified to operate over a
- 25·C to + 85·C temperature range.
Features
•
•
•
•
•
•
•
•
High slew rate
70 VI p.s
Wide bandwidth
15 MHz
Settling time (0.1 %)
1 p.s
Low input offset voltage
2 mV
Low Input offset current
1 pA
Wide supply range
±5V to ±20V
Internal 6 dB/octave frequency compensation
Pin compatible with std IC op amps (TO-5 pkg)
Schematic Diagram
IAlANC(lCllMPI
,,"PI
I
I
;---t--.---1I---.....---+--.....--------""""1>----, ,.
'"
""
~
~~
___
+_-~-+_--_~~--~~
___
"'"
+_------_4----~~~---.
,.
TUK/68B2-1
'Pin Numbers Shown for T0-5 Package
3-202
r-
::E:
o
Absolute Maximum Ratings
o
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 5)
Supply Voltage
Power Dissipation (see graph)
Short Circuit Duration
Operating Temperature
LH0062
LH0062C
±20V
-55°C to + 125°C
- 25°C to + 85°C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
ESD rating to be determined.
500mW
±5V
±30V
Input Voltage (Note 1)
Differential Input Voltage (Note 2)
Continuous
-65°C to
+ 150°C
260°C
DC Electrical Characteristics (Note 3)
Limits
Parameter
LHOO62
Conditions
Min
Input Offset Voltage
Rs';; 100kn, TA = 25°C,
Rs';; 100kn
Temperature Coefficient of
Input Offset Voltage
Rs';; 100kn
Offset Voltage Drift with Time
Input Offset Current
TA = 25°C
2
5
7
Typ
Max
10
15
20
mV
mV
25
25
p.VI"C
4
5
p.V/week
2
2
1
5
0.2
Doubles every 10°C
0.1
0.1
5
TA = 25°C
(Note 4)
Temperature Coefficient of
Input Bias Current
Min
Doubles every 10°C
Offset Current Drift with Time
Input Bias Current
Max
0.2
Temperature Coefficient of
Input Offset Current
Units
LHOO62C
Typ
10
10
10
pA
nA
pAlweek
65
2
pA
nA
Doubles every 10°C
Doubles every 10°C
Differential Input Resistance
1012
1012
n
Common Mode Input Resistance
1012
1012
n
4
pF
Input Capacitance
4
Input Voltage Range
Vs = ±15V
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Large Signal Voltage Gain
Output Voltage Swing
Output Current Swing
±10
±12
±10
±12
V
Rs';;10kn,VIN= ±10V
80
90
70
90
dB
Rs';; 10 kn, ±5V,;; Vs';; ±15V
80
90
70
90
dB
RL
TA
RL
Vs
50
200
25
160
V/mV
=
=
=
=
2 kn, VOUT = ± 10V,
25°C, Vs = ±15V
2 kn, VOUT = ±10V,
±15V
RL = 2 kn, TA = 25°C,
Vs = ±15V
RL=2kn,Vs= ±15V
±12
VOUT = ±10V, TA = 25°C
±10
Output Short Circuit Current
TA = 25°C
Supply Current
Vs = ±15V
Power Consumption
Vs = ±15V
±13
±12
±10
Output Resistance
13
V
±10
±15
±10
V
±15
rnA
75
75
n
25
25
rnA
5
8
240
3·203
V/mV
25
25
7
12
rnA
360
mW
0)
I\)
.....
r-
::E:
o
o
0)
I\)
o
o
fg
AC Electrical Characteristics (TA = 25'C, Vs =
±15V)
CI
::I:
Limits
...I
.....
C\I
Parameter
Conditions
LHOO62
CD
CI
CI
::I:
...I
Slew Rate
Voltage Follower
Large Signal Bandwidth
Voltage Follower
Small Signal Bandwidth
Rise Time
Overshoot
~V'N
Settling Time (0.1 %)
=
10V
Overload Recovery
=
=
=
=
=
=
=
Max
Min
Typ
50
70
Max
Vlp.s
2
2
MHz
15
15
MHz
25
25
ns
10
15
%
1
1
p.s
0.9
0.9
p.s
150
nV/yHz
100 Hz
55
55
nV/yHz
1 kHz
35
35
nV/yHz
30
30
nV/yHz
12
12
p.Vrms
<0.1
<0.1
pArms
Input Noise Voltage
Rs
Input Noise Voltage
Rs
Input Noise Voltage
Rs
Input Noise Voltage
BW= 10 Hz to 10kHz, Rs= 10kO
Input Noise Current
BW= 10Hztol0kHz
10 kO, fa
70
150
Rs
10 kO, fa
Typ
50
Units
10 Hz
Input Noise Voltage
10 kO, fa
Min
LHOO62C
10 kO, fa = 10 kHz
Note 1: For supply voltages less than ± 15V, the absolute maximum input voltage is equal to the supply voltage.
Nole 2: Inputs are protected from excessive voltages by back·ta-back diodes. Input currents should be IimHed to 1 rnA.
Nole3:Unlessotherwisespecified,thesespecHicationsapplyfor ±5V,. Vs,. ±20Vand -55'C,. TA" + 125'C for the LH0062 and -25'C,. TA" +85'C
for the LHOO62C. Typical values are given for TA = 25'C. Power supplies should be bypassed with 0.1 ",F ceramic capacitors.
Nole 4: Input currents are a strong function of tamperature. Due to high speed testing they are specified at a iunction temperature T = 25'C , self heating will
cause an increase in current in manual tests. 25"C spec Is guaranteed by testing at 125'C.
Note 5: Refer to RETS0062X for LH0062D and LHOO62H military specifications.
Connection Diagrams
Metal Can Package
Dual·ln·Line Package
COMP 2
NC.....!
8
BALANCE/ 1
COMP 1
INVERTING 2
INPUT
NON-INVERTING 3
INPUT
Nc....l
3
INVERT INPUT
NC....!
v--2.
7 V+
+
4
V-
6 OUTPUT
BAlANCE/COMP 3.J.
5 BALANCE/
COMP 3
COMP 2..2.
'-'
.!!...NC
.!L NC
I I
V
12 NON-INVERT INPUT
rlLNC
~BALANCE/COMP
1
~v+
8
OUTPUT
TL/K/6B62-3
Top View
TUK/BB62-2
Top View
Order Number LH0062D or LHOO62CD
See NS Package Number D14E
Order Number LH0062H or LHOO62CH
See NS Package Number HOBO
3-204
,
.-::t:
o
o
en
Typical Performance Characteristics
N
Input Offset
Current vs Temperature
Maximum Power Dissipation
100
I I I
I I I
700
~
"
.
i."
1,000
600
1\
4GO
300
i
100
fl..
10
~
"~
\.
~ 200
~
\ WITH HEAT
INK
-
FREE AIR
a
./
./
50
100
150
200
I
45
25
TEMPERATURE rc)
,
\
10
co
i5
To~ zJ,d
Vs- tl5V
9
~
.
-
II
co
w
~
!:;
>
"
SM
-6
10M 20M
I
-"""
Y
50M
200
I
\
Vs=tISV
T" = 25 C
'I-
-
\
_Ll
-9
400
l-
100
.'"
ii
80
ii
co
60
~
40
"
Zo
w
!:;
>
L
•
noe
Vs·~15V
..
~
10
co
t
i
.
~
w
~
!:;
~
"'"
">
FEEDFORWARD
r-...
o
1M
10M
3M
Jill
3.
10011
~
-I
--1-r-1INPIUT
\
\
. ' - I;
-12
-16
-ZO
-0.1
I
I
~~
- ..
--'"
OUTPUT
'/
FEEDFORWARO
.:::-:.:.
100
ii
ID
ii
6D
co
w
co
~
>
I
10
..~
IItID~V
0.5
0.7
i!
w
Vs - ,15V
To'ZS'C
">
~
"
I.V
100+
-5
~
-15
C,-IOpF
Cs,,·D."F
0.03
0,1
!'OIllV
-j"j
0.3
TIllE
•.."
II
~
14
::Ii
'"
12
:\I
I ..V
Rs-s.n
R,'Un lOOjV
-10
'"
10
"'~
22
20
co
18
~ ~
\
'\tIN
"'
lao
r:--.
40
Ik
1l1li lOOk 1M lOll 100M
" '"
rV
ZO
v~. 'IJV
To' 25'': -
P~V
~
I\..
FEIEDFOIRWA~D
10
IIID
r-.t'~
i'
120 I-
JS.jI5~HV.·,IDV_
'"
VsstlV
J
I:
135 ~
l:
:1
lk
IIIk IDIIk 1M IBM I _
Voltage Follower Slew Rate
...... r:::.:3:t:::-.
......
lID
FREQUENCY 1Hz)
130
~s"2DV
::::::
......
226
I
-20
0.9
24
i
l
l'...
GAIN'
Vs'" ±15V
0.3
2Z5
Open Loop Frequency
Response
Unity Gain Bandwidth
Inverter Settling Time
~
Vs -:t15V
PHASE
TIME(Pll
15
TA =25°C
TA = 25°&
0.1
IZ5
FREQUENCY 1Hz)
IZO
16
12
IDS
i-
10
800
20
TA
1--""
85
-ZO
600
Inverter Pulse Response
14
65
120
TIME (as.
Large Signal Frequency
Response
IZ
45
T - TEMPERATURE I"C)
--
-3 I-li'U(
FREQUENCY 1Hz)
.
Z5
Open Loop Frequency
Response
I'0UTPUT
-12
-15
2M
IZ5
105
1\
\
~
t;
"
O.SM 1M
85
Voltage Follower
Pulse Response
15
12
~
o
65
T - TEMPERATURE rc)
Large Signal Frequency
Response
12
~
./
d.1
D
~
o
y
./
i!!
100
14
o
o
en
10,000
N
i
TO·SAND DIP
5011
......
.::t:
Input Bias
Current vs Temperature
r"" 1;:::::::
i'
"......
10
I
-55 -35 -15 5 Z5 45 85 15 105 125
TEMPERATURE I'C)
110
~
a
r,l.SI~IVE ~LE~
r-.
~
r"
IIID
90
NEGATIVE SLEW
ID
70
V.· ,15V
As· A, = 1DDkn
c,.Z.OpF
II-h
ID
-65 -35 -IS 5 25 45 IS IS 105 125
TEMPERATURE I'C)
TL/K/6862-4
3-205
o
C\II
CD
CI
CI
Typical Performance Characteristics (Continued)
:::E:
-I
C\i
CD
CI
CI
:::E:
-I
BI
Input Bias Current
vs Input Voltage
_IOOO
'"!.
=
~
Vs = 'ISV
100
i:l
!
I~~~~~~~I~-J
-10
-5
-2
c;
z
f
zoo
:!!
e
o
10
...ti
;5
.
....'"
m
:!!
.,-...c;
IDS - TA '12n
w
'~"
15
10
60
i
T.·25 C_
lk
10k
\.
'\
V
4.0
5
-
~
I--
i5
'\.
lOOk
1M
10M
1.
SUPPLY VOLTAGE I'V)
NEGArVE
-20
100
,.
Sur ~
LY....
10k
,~.
lOOk
1M
"
10M
10'
Vs" ·15V
TA "2S"t
10'
10
TA ,,25'&
'"
20
PDSI~IVE-
SUPPLY
Closed Loop Output
Impedance
~co
11}-'
15
"
40
~
FREQUENCY IH.)
12
-
10M
T·i 25 ·C
FREQUENCY IHr)
"'":: -T"25'C-
1M
:::..
60
Current Limiting
T.-125;C.5
~
20
~
lC
Vi"'"
c-- .
..
~.
80
lil
:!!
20
100
lOOk
Power Supply Rejection
Rs"2k1!
!
co
20
5.5
1:1
-"
IDO
Supply Current
5.0
10k
SOURCE RESISTANCE I")
o
TA-~
IJl
Ik
100
co
100
z
lOOk
Common Mode Rejection
SUPPL Y VOLTAGE I'V)
..
~.
10k
FREQUENCY IHr)
95
C
.!
II
'0'" 1 KHz
o
n
100
;'},'sv
to: 10Hz
50
10
........ ~Jc/ ' T.·Z5"C
10
250
Vs
TA " 25 C
i!
120
5
300
~
~
Voltage Gain
110
~
Total Input Noise Voltage·
vs Source Resistance
:: zoo
!I.!
i 150
~ 100
~ 100
liS
~
~>
~ 350
..
COMMON MODE INPUT VOLTAGE IV)
.
I~. coo
~
~ 10~~'~~~~tT~~'~Z5~"C~.~~~
_
Vs: 'I5V
T.· 25 C
TA -+lZS'C -
to-
.
Total Input Noise
Voltage· vs Frequency
10
15
20
OUTPUT CURRENT ImA)
25
10
Avy
V
r- , /
100
lk
10k
lOOk
1M
FREQUENCY IHr)
TL/K/6862-5
·Noise Voltage Includes Contribution from Source Resistance
3-206
r-
::J:
c
c
en
Auxiliary Circuits
Feedforward Compensation for Greater
Inverting Slew Ratet
Offset Balancing
N
.....
r-
V'
::J:
5.
c
c
en
200.
J.
N
n
'"PUT
--'lJ""~""'-~""'--=-!
::.-::...-..... . - - OUTPUT
27.
1%
tSlew rate typically 150Vll's.
TL/K/6882-7
"Balance circuit necessary for
increased slew.
TLlK/6862-6
Compensation for Minimum Settlingt Time
Isolating Large Capacitive Loads
R,
2-10pF
,...._...jW....._ _...
-~.-OUTPUT
100'
10pF
100
v'
Rs
INPUT ....." "......=-4
lOOK
lNPUT .....""',.,.... . .'"1
OUTPUT
51.
r
tSlew and settling time
to 0.1% for a 10V step
TLlK/6862-9
changes is 800 ns.
TL/K/6862-8
Boosting Output Drive to ± 100 mA
Overcompensation
r----.....- .....--O v·
OUTPUT
TUK/6862-10
~------~~---e---oy
TLlK/6862-11
Typical Applications*
Fast Voltage Follower
Fast Summing Amplifier
'"
Differential Amplifier
1M
'"
5,'
5K
"K
INPUT
-JWr-'l1-'-j
OUTPUT
1M
INPUT-~""-"".!..j
0U1M
OUTPUT
INPUT
TL/K/6862-13
1·1DpF
TLlK/6862-12
TL/K/6862-14
3-207
Typical Applications oj<
(Continued)
High Speed Subtractor
I
I
I
I
I
I
:L i___~-2,"I!,!!
"low le.k.g.
'IN'O----------....
'::"
10-33pF
TL/K/6862-15
Fast Precision Voltage Comparator
V·
INPUT 0--'11""'--1
R3
RZ
2K
10K
REF£RENCE o--'V"""~
V·
TUK/6862-16
Wide Range AC Voltmeter
...-
...... IS
SV
40K
12K
.......""""....... CAl
TUK/6862-17
3·208
Typical Applications*
(Continued)
Video DC Restoring Amplifier
R2
10K
V·
RI
""'''""---.'"1
IK
VIDEO IN 0------41......- -......
r-
""'-.:....0......"
I
I
LOGIC CONTROL
I
I
CI
TIOOOPF
o-+D--C:>.J
L
_I~HO.!!!
0 UTPUT
.J
_
v-
'Pin numbers shown for TO-S package
TLlK/6862- 1B
High Speed Positive Peak Detector
>~"'OOUTPUT
INPUT
TL/K/6882- 19
Precision Integrator
TTL
Ilr -
-
-
-
AHOlll
-----,
INTEGRATE/RESET
CONTROL
I
I
I
I
10
•
14
R1
1000n
R2
10K
CI
0.1,.F
OUTPUT
Rl
10K
CONOI;~~~I~~ Q------'lJy.,...;.-t
'Pln numbers shown for TO·S package
TL/K/8862-20
3·209
0,------------------------------------------------------------------.
N
CD
g Typical Applications* (Continued)
PrecisIon WIde Range Current to PerIod Converter
3
C\i
10'
3
10
g
10'
!
g
....
'\
'\
10- 1
iii
~ 10-'
10- 3
" , '\
10-"
10-5
10-"
10-·
10-'
1'\
10-'
......
10- 3
INPUT CURRENT (AMPS)
TLlK/6662-21
5K
2N4111
-
I'N
>:...t~ OUTPUT
TL/K/6B62-22
3-210
~National
~ Semiconductor
LH0082 Optical Communication ReceiverI Amplifier
II Low input bias current
General Description
II Pin selectable sensitivity: -45
The LHOOB2 is a general purpose, low-noise, fiber-optic receiver, which may also be used as a fast current to voltage
converter, or as a high speed voltage amplifier. The circuit
includes a wide-bandwidth FET-input amplifier, a 2.4V reference, a comparator with hysteresis, and all the necessary
resistors and capacitors for feedback and coupling, all integrated in a hermetic dual-in-line package. The large gainbandwidth of the preamp enables fast response even with
high capacitance photodiodes. A separate analog output
permits the reception of analog signals to 20 MHz via a
fiber-optic link. The internal comparator converts a low level
analog signal to a CMOS/TTL compatible logic signal at
data rates up to 5 Mbits/s NRZ. The LHOOB2 can be used
with an external comparator at data rates to 40 Mbits/s.
dBm/-35 dBm'
II CMOS/TTL compatibility
II Can be used with photodiodes, PIN photodiodes, pho-
totransistors, avalanche photodiodes, and photomultipliers
II Hermetic dual-in-line metal package
II Highly versatile building block
II > 21 dB dynamic range
Applications
II Data terminals
III Secure communication
II Peripheral control/communication
III Video transmission
II Wideband amplifier
Features
II High speed current to voltage converter
.. Fiber-optic repeater
II Video amplifier
II Industrial machine control
III Single 4.5V to 12V supply
II 600 MHz unity gain bandwidth
II Low noise
III Low edge jitter
III <10- 9 bit error rate
'Assumes 0.5 AlW PIN diode Input
Schematic Diagrams
COMPARATOR
PREAMP
COMPARATOR
------,
Vee
Vee
r-------- ,
I
I
I
Preamp
I
I
I
LHOOB2
I
I
I
I
I
I
I
I
'k
I
PREAMP
I
I
I
> - 6 - - ( ' 0 COMPARATOR OUTPUT
INPUT
1M
+--.. . . IM,.----{
lOOk
6
HYSTERESIS
L -_ _ _ _ _..{ 5 COMPARATOR+
1-----
e:
2.3
"-
....
,""-
ill
~ 1.9
10
8
10
9
~5DO
Preamp Input Spot
Voltage
-
~
I-'"
,........
§!
f-""
o
TA 25"C
Vec=5V +++i!II~H+HlIII-++H1~
RF = 100 k!l+++HIII--HffIIlH-t+f-HKII
~~20~~~=E~l=tE~~~~
"'~
~~
i~ 10
.... .s
IE
!11~il~llil
!
=
Preamp Open Loop Voltage
vs. Supply Voltage
50
I
N
'Ii"
~~
45
40
V ...... ....~
~
>
Go
9
15
20
10
OUTPUT CURRENT (mAl
Hysteresis Voltage vs.
60 Comparator Supply Voltage
:;: 10
9
z
!. 50
...!
!:l 40
!
:;:
.!l!
>
i 30
e...'" 20
...=
;! 10
TA=+125"~
...... ~
'/~
::;:::TA=-55"C
......
:::~
e
04
5
6
7
8
9 10 11 12 13
COMPARATOR SUPPlY VOLTAGE (VI
I
I
6
7
t+
10
8
Preamp Supply Current
34
I I
V
V
V
/
32
V
V
TA=-55"C/
~ 3D
ia
28
~
24
ii:
22
II::
/
TA=+25"C / "
26
'>"
"-'l'
20
1
0
o 1
..... t"--lI
tlnJ"C ' -
r-
I
SUPPLY VQLTAGE (VI
TA=-55"C TO +125"C
§!
r-- r--
35
lOOk
I
I
TA-+75"C
Preamp Output Voltage
Swing
III
~
..~.
100
lk
10k
FREQUENCY IHzI
-~
TA=+25"C
..... rJ
...... ....-
O~UW~~~~~-U~.
10
10
6
4
SUPPLY VOLTAGE (VI
3D NOise
~
w
Ii
TEMPERATURE ("CI
L I
!
..= " / '
.if'"
-55-35-15 5 25 45 65 85 105 125
Comparator Output
TA=25"C
Vee = +5V
./
'"
~
Go 1.5
1000 Saturation Voltage
./
./
10
II::
:>
" r-....
PREAMP SUPPLY VOLTAGE
~
6
=
=
'"~
"I"-
10
L
TA=55"C TO +125"C
ill 15
~ 1.7
7
5
6
7
8
9
PREAMP SUPPLY VOLTAGE (VI
Comparator Supply
Current (Output High)
~
....
~
20
........ ~
:>
62.1
6
4
20
"
~ 2.5
S
4
V
20
10
10
8
Output Voltage
III
Rt= 100k!l
-
3D
II::
:>
1/
2.0
TA=125 "C
Rt=100k
40
:>
>
w
50 Supply Current
COMPARATOR SUPPLY VOLTAGE (VI
·tA~251"CI.
....
I
;I
!:l
lG
Response Time
60
!.
....
FlIEQUENCY (HzI
70
.
;I
TA=25"C
a
w
-180
1M
lOOk
Q
Reference Voltage
180
I~vl
II>
Q
co
I\)
2 3 4 5 6 7 8 9 10
PREAMP SUPPlY VOLTAGE (VI
18
4
"
7/
/
./
V./
~
TA=+125"C
10
SUPPLY VOLTAGE (VI
TL/H/9325-B
3·215
Typical Performance Characteristics
800
i
(Continued)
itance photodiode possible for the application. When using
phototransistors, only the collector-base junction should be
used for fastest response. Additional sensitivity may be
gained by using a phototransistor in the transistor mode,
although this will result in slower circuit response, and poor
DC stability due to beta multiplication of the dark current of
the phototranslstor. Avoid capacitive loading at the output of
the comparator to achieve maximum data rates.
Comparator Output
Saturation Voltage
1
1
1
Vcc = +5V
700
TA=+125"C
1/
1/
11/ L i-"'"
III
i:!;600
:
~
... &00
~
I~ ~
TA=-55"C
Avalanche photodiodes can be used for improved sensitivity
and speed. Overall speed is limited by the internal comparator. Use of an external comparator such as the LM160 will
enable the full speed capability to be realized. This requires
the use of an additional power supply, see Figure 5.
./
Cil400
5
10
15
For operations at higher data rates, Figure 5 shows the use
of an external comparator to enable speeds to 50 Mbit NRZ.
Figure 6, 7 and 8 demonstrate interfacing techniques to avalanche photodiodes and phototransistors.
2D
OUTPUT CURRENT (rnA)
TL/H/9325-9
With a few additional components, the LHOOB2 can be used
as a repeater as shown in Figure 9. Interfacing to a microcomputer-bus, (Figure 10), is also easy when the LHOOB2 is
teamed with an INSB250 Asynchronous Communications
Element. This provides a full duplex link capable of bit rates
to 56 kbits/s NRZ.
Applications Information
The gain-bandwidth of the LHOOB2 preamp is nearly 2 GHz,
thus good bypassing of the supply voltage is necessary; a
3.3 p.F tantalum capacitor in parallel with a 0.01 p.F ceramic
disc is recommended, placed as close as possible to the
device pins.
Analog data can be sent along a fiber-optic cable via digital
means, (Figure 11 ). Low temperature drift can be obtained
in the analog mode, by using the circuit shown in Agure 12.
Careful shielding of pins 2, 13 and 14 is necessary if the
LHOOB2 is used in a high noise environment. Minimize stray
capacitance to pin 14 from ground, Vee or pin 3 to avoid
slowing overall circuit response. Choose the lowest capacVee: = +5V
-----,
r-------
I
I
I
I
10pF
I
I
LH0082
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TL/H/9325-10
FIGURE 1. Preamp Test Circuit
3-216
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Applications Information
co
Vee = +5V
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TYPICAL COMPARATOR RESPONSE
30mv
VIN
(PIN 3)
5V+------....
4
0.01""
Your 3
(PIN 10) ~ •
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o
1M
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100
200
TIME (nl)
lOOk
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TUH/932S-11
FIGURE 2. Comparator Test Circuit
2.22
t-----..JVol'v-----....- - - - - - -......- - - Q Vec=5V
-----.,
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TL/H/9325-12
FIGURE 3. Fiber-Optic Receiver, Basic High Sensitivity: 150 nW, 400 kbps NRZ
3-217
I
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Applications Information (CooII.." ..
Z.ZQ
t-----JtiIIII'v-----.....- - - - - - -.....---o Vcc=5V
-----,
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LHODBZ
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+
TL/H/9325-13
FIGURE 4. Fiber-Optic ~ecelv.r, Basic Low Sensitivity: 2 p.W, 5 Mblt, NRZ
3·218
Applications Information (Continued)
2.211
....----J"J>/tr----------------oO
VCC=5V
r----
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LH0D82
I
PINO
LMI68
+5
........I:"""---------L;:> ~l~A OUT
10
-5
3k
TL/H/9325-14
FIGURE 5. High Speed-Low Sensitivity Receiver
3·219
~
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....
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Applications Information
(Continued)
0.01,.1'
2.211
r-~----~--_i~--~----~--------~~~--------~--------------------_{+5
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LHo082
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0.01#
1M
lOOk
RalAS
V-150 TO -300
VOLTS
TLlH/9325-15
FIGURE 6. Connection to Avalanche Photodlode
2.21:1
0.01
,.F
~~~------------------_.--------~~~------._~--------__{+5
+
3.3
I -I#
":'"
-=-
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PHOTO TRANSISTOR
TLlH/9325-16
FIGURE 7. Connection to Phototranslstor-High Sensitivity, Low Speed
3-220
,-----------------------------------------------------------------------------, r
Applications Information
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(Continued)
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2.211
I\)
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---,
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TL/H/9325-17
FIGURE 8. Connection to Phototransistor-Low Sensitivity, High Speed Receiver
2.212
* * ,----
; 3.3"F r+-:.O::-l~~------------------.....--------JVo-lv---------.....- - - - - - - - - - - - -.....-----T +5
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50
PINO
22LEO
TL/H/9325-1B
FIGURE 9. Fiber-Optic Link Repeater
3-221
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Applications Information
(Continued)
:::E:
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TO SYSTEM TTL CLOCK
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INS8250
HI--------------.J
ASYNCHRONOUS COMMUNICATIONS
ELEMENT
00-07
MEMR
MEMW
00-07
XTAl
OISTR
Vee
+5
OOSTR
INTR
RESET
AD
MICROBUS
Al
A2
A5
A6
A7
INTRPT
OISTR
MR
OOSTR
AD
ADS
A1
GNO
A2
2.... SERIAL LIGHT
2.. OUTPUT TO OPTICAL
FIBER
.",.
51
CSO
ffi
SOUT
CS1
BANOOUT
.",.
RClK
SIN
3.3~F
~~+......,......--~-----'-----O+5
2.22
ti1~F
SERIAL INPUT
FROM OPTICAL
FIBER
~
Tl/H/9325-19
FIGURE 10. Optical Link to Microbus
3·222
.------------------------------------------------------------------------------, I
Applications Information
%
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(Continued)
Q
+15
CO
N
lOOk
VIN
C>-_'VI/'v--......- - - - - - I
47
+5
lOOk
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12k
5k GAIN
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2.2Q
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lOOk
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LM2907N
2k
10
F·V
' - _ - ' _ ' Your
12
2k
.,..
O.Ol#1
6.2k
TL/H/9325-20
FIGURE 11. Analog Data Link Using VIF and F/V
3·223
Applications Information (Continued)
33""
2.211
~~'+~--------------~r---------------~~--------------~+5
,VOl
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Uk
VOUT
Uk
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2-
2-
PlNO
'hLF353
'hLF353
-IS
TL/H/9325-21
FIGURE 12. Low Temperature Drift Analog Receiver
Connection Diagram
Dual·ln·Llne Package
PREAMP Vee
14
RF2
13
PREAMP INPUT
RFI
PREAMP OUTPUT
REFERENCE
COMPARATOR -
GNO
COMPARATOR
+
COMPARATOR OUTPUT
HYSTERESIS
COMPARATOR Vee
NO CONNECTION
CASE
TL/H/9325-2
Top View
Order Number LH0082CD
See NS Package Number D14F
3-224
,------------------------------------------------------------------------, r
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LH0086/LH0086C
CD
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Digitally-Programmable-Gain Amplifier
General Description
Features
The LH0086 is a self-contained, high-accuracy, digitally-programmable-gain amplifier. It consists of a FET-input operational amplifier, a precision resistor ladder, and a digitallyprogrammable switch network. A three-bit TIL-compatible
digital input selects accurate gain settings of 1, 2, 5, 10, 20,
50, 100, or 200.
The LH0086 exhibits low offset voltage, high input impedance, fast settling, high power supply rejection ratio, and
excellent gain accuracy and gain non-linearity.
The LH0086 is specified for operation from -55·C to
+ 125·C. The LH0086C is specified from - 25·C to + 85·C.
Both devices are hermetically sealed in a 14-lead dual-inline metal package.
•
•
•
•
•
•
•
0.01 % maximum gain accuracy at gain = 1
0.005% typical gain non-linearity
1 ppml"C typical gain drift
10100 input impedance
80 dB minimum PSRR.
TIL-compatible digital inputs
2 p.s settling to 0.01 %
Applications
• Data acquisition systems
• Auto range DVMs
• Adaptive servo loops
Simplified Schematic and Connection Diagrams
OFFSET
ADJUST
V+
~--......:&-o I'OUT
"
r-- V'N- 1)0-"'0'--_ _-4
I
v- 0-.:::'3'--_ _--1
--=
L
11
(FDRCE)--,
I
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Dual-In-Llne Package
DIGITAL UNO
02
DIGITAL
INPUT
14
v+
'3
y-
lZ
0'
11
DO
10
I'OUT (SEHSE)
I)ONAlOND
F£EDIACK
\IN-
I'OUT (FORCE)
OFFSET ADJ
ViN+
OFFSET ADJ
Top View
CASE IS ELECTRICAllY ISOLATED
Order Number LH0086D or LH0086CD
See NS Package Number D14F
~~~w {:~
02
OIU[:k
0.:...
' _ _-1
TLlKf5657 -1
3-225
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 5)
Supply Voltage (Note 1)
±lBV
Vs
Analog Input Voltage (Note 2)
±15V
VIN
VIL(H) Digital Input Voltage
-4V, +VS
Power Dissipation
500mW
Po
Output Short Circuit Duration
Continuous
Operating Temperature Range:
LHOOB6
LHOOB6C
TSTG Storage Temperature
Lead Temperature
(Soldering, 10 seconds)
ESD rating to be determined.
TA
-55"Cto + 125"C
- 25"C to + B5"C
-65"Cto +150"C
+300"C
DC Electrical Characteristics
Vs= ±15V, RL =10 kO, TMIN'" TA '" TMAX, Pin 10 connected to Pin 11, Pin 5 connected to Pin 6 (Non-inverting)
Symbol
Parameter
Min
VOS
Input Offset Voltage
LHOO86C
LHOO86
Conditions
Typ
0.3
TJ=25"C
Max
Min
5.0
Max
0.3
10
Input Offset Voltage
Change with Temperature
VIN=OV
Ie
Input Bias Current
(Notes 3, 4)
10
10
100
TJ=25"C
500
100
500
RIN
Input Resistance
VIN
Input Voltage Range
Av
Voltage Gain
Gain Error
10
±10
±10
1.0
V
2.0
for Digital Gain-
10
10
Control Codes
20
20
AAV/AT
Gain Temperature Coefficient
Av=l
PSRR
Power Supply Rejection Ratio
±8V ",Vs '" ±18V
TA=25"C
80
nA
1.0
5.0
Av=l
pA
100
±11.5
2.0
TA=25"C
500
GO
5.0
Av=l
Av=2,5
Av=10,20
Av=50,100,200
p.V/"C
10
See Table 1
Av=l
Av=2,5
Av=10,20
Av=50,100,200
Gain Non-Linearity
±11.5
mV
13
7.0
Ves/AT
Units
Typ
50
50
100
100
200
200
VIV
0.003
0.03
0.05
0.1
0.01
0.05
0.1
0.3
0.003
0.05
0.1
0.15
0.03
0.1
0.2
0.4
0.003
0.03
0.1
0.15
0.02
0.1
0.2
0.4
0.003
0.05
0.1
0.15
0.06
0.2
0.3
0.5
%
0.002
0.002
0.005
0.005
1.0
1.0
ppm/DC
90
dB
90
70
%
Output Voltage Swing
±10
±12
±10
±12
RL~ 10 kO
V
Vo
Note 1: Improper supply power·on sequence may damage the device. See Power Supply Connection Section under Applications Information.
Note 2: for supply voltages less than ± ISV the maximum Input voltage Is equal 10 the supply voltage.
Note 3: Due to short production test time. these parameters are speclfled at lunction temperature. TJ= 2S·C. In normal operation the lunction temperature rises
above the ambient temperature. TA, as a result of the Internal power dissipation, PD. TJ=TA+9JAxPO where 9JA Is the thermal resistance from junction to
ambient (typically 6S'C/W).
Note 4: The Input bias currents are junction leakage currents which approximately double for every 100C Increase In junction temperature.
Note 6: Refer to RETS00660 for LH00660 military specifications.
3-226
DC Electrical Characteristics
Vs = ± 15V, RL = 10 kn, T MIN:S: TA
Symbol
Isc
(Continued)
:s: T MAX, Pin 10 connected to Pin 11, Pin 5 connected to Pin 6 (Non-inverting).
Parameter
LHOO86
Conditions
I TA=25°C
Output Short-Circuit Current
LHOO86C
Units
Min
Typ
Max
Min
Typ
Max
±5
±1B
±40
:l;5
±1B
±40
±40
±2
±2
Ro
Output Resistance
VIL
Digital "0" Input Voltage
0.05
VIH
Digital "1" Input Voltage
IlL
Digital "0" Input Current
VIN=O.4V
1.5
IIH
Digital "1 " Input Current
VIN=2.4V
0.01
Vs
Supply Voltage Range
Is(+)
Positive Supply Current
Is(-)
Negative Supply Current
AVCL =1
0.05
0.7
n
0.7
V
2.0
2.0
4.0
1.5
4.0
p.A
0.01
:l;1B
±B.O
Vs= ±18V
mA
±40
:l;1B
±B.O
B.5
15.5
B.5
15.5
-4.5
-B.5
-4.5
-B.5
V
mA
AC Electrical Characteristics
Vs= ±15V, TA=25°C, RL = 10 kn, Pin 10 connected to Pin 11, Pin 5 connected to Pin 6 (Non-Inverting)
Symbol
BW
Parameter
Conditions
Smail Signal Bandwidth
Av=1
-3dB
Av=50
Av=200
-10/0
Power Bandwidth
SR
Slew Rate
ts
Settling Time (Figure 7) 0.01 0/0
ts
Settling Time After Gain
Change
eN
Equivalent Input Noise
Voltage (Figure 6)
iN
Equivalent Input Noise Current
Max
Units
3000
60
15
425
Av=50
B.5
Vo= :l;10V
IlVo=20V
Typ
Av=1
Av=200
PBW
Min
kHz
2
159
kHz
10
V/p.s
Av=1
2.5
Av=50
20
p.s
Av=200
75
p.s
10
BW=0.1-10Hz
Rs=100n
Av=100
f= 1 kHz
3·227
3
p.Vp-p
25
nv/1/RZ
0.01
pAlVHz
•
0
CD
CO
CI
CI
Closed Loop Output
%
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120
CO
lOU
.....
CD
CI
CI
%
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ii'
Power Supply Re ectlon
15
lJ1IJ~
Input Voltage Range
D
milD
80
~.
II 60
./'
mil
Ie
4G
/
J8~IU
20 VCM-O
10
100
o
lIil
lk
10k
FREQUENCY (Hz)
5
lOOk
100 Settling Time
14
V.I
•01~h Va.l%
!
'" 10
10
15
SUPPLY VOLTAOE (:tVI
Ii
~50
/
V
1
VS=:t15V
AVQ=±20V
RS=5011
RL=lkll
·T~:-55'Ccl--+--+--l
E 6 ..::::::.
TA·i5'C:~__+--+':.,....j
:::::; !.~::~~~: ~...
4 ."""'1'""" ••
1".
...... IS -)
......... .
__~-L__L-~
10
15
2D
SUPPLY VOLTAOE (:tV)
2L-~~
10 20 50 100 200
DAIN{y/V)
5
5
10 2D
OAIN {V/VI
50 100
Equivalent Input Noise
Voltage
w 40
liSi+i
i"' ..........
~~--I-·~~·F··~···,·--+-~
iil
V
1
§.
TA=-5SOC
TA-25'C "\.
TA=125"e
..':. ••••••• •••
12
]. 10
1
2D
B
i
1
~
Supply Current
c
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-
V
.. :t18
TA·I~~~
o
V
10 Resistance
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!!!
Iii
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W
10
0
10
L...
100
lk
10k
FREQUENCY (Hzl
lOOk
TL/K/5657-2
Wideband Noise
TLlK/5657-3
TL/K/5657 -4
RS = 50n. Bandwidth = 0.1 Hz to 10Hz
1 /J-V Idivision Vertical, 5 seconds/division Horizontal
RS = 50n. Bandwidth = 10Hz to 10kHz
5 /J-V/division Vertical, 1 ms/division Horizontal
3-228
r-
:z:
o
Applications Information
o
co
Theory of Operation
The LH0086 is a digitally programmable gain amplifier with
3-bit digital gain control. It contains a FET-input operational
amplifier, a precision resistor ladder, and a digitally programmable switch network.
Care must be taken in the power-on sequence. The LH0086
may suffer irreversible damage if the V+ supply is applied
prior to the powering on of the V- supply. In most applications using dual-tracking supplies and with the device supply
pins adequately bypassed, this will not present a problem. If
this cannot be guaranteed, a germanium or Schottky protection diode should be connected between the digital ground
pin and the V- pin as shown in Figure 1.
The LH0086 was designed for use in a non-inverting configuration, thus the following discussion covers the LH0086 as
used as a non-inverting amplifier. The gain of the LH0086 is
given by the familiar gain equation of a non-inverting amplifier.
Grounding Considerations
Av = 1 + RF
Rs
Care should be taken in the connection of digital and analog
grounds. Digital switching currents can introduce noise on
the analog ground pin. If pOSSible, both grounds should go
to a ground plane beneath the device, otherwise each
ground should be run separately to a single point ground.
The idea is to keep digital current from passing through the
analog ground line. If long ground leads are used, diode
clamps should be placed as close to the device as possible
(Figure 1).
Each gain step is set by the ratio of the ladder resistors. The
resistor ladder is constructed with high stability, low temperature-coefficient resistors precision laser-trimmed to the required values. FET switches are used to select the desired
ratio. Since the FET switches are in series with the operational amplifier input, their "on resistance" and temperature
drift do not degrade amplifier accuracy. The FET switches
are selected by a 1 of 8 decoder, by applying the proper
logic levels at digital inputs DO, 01, and 02. The gains are
set as given in Table I.
Programmable Attenuator
The LH0086 may be used as a programmable attenuator
when connected as in Figure 2. The accuracy of this attenuator will be typically 0.1"fo.
TABLE I. Gain-Control Codes
02
01
DO
1
0
0
0
2
0
0
1
0
Gain
5
0
1
10
0
1
1
20
1
0
0
50
1
0
1
100
1
1
0
200
1
1
1
Note: Max. VIN = ± 11 Volts.
>----+=~'_ YoUT
Power Supply Connection
Proper power supply connections are shown in Figure 1.
The power supplies should be bypassed to ground as close
as possible to device supply pins. For most applications, the
bypass capacitor should be 0.1 ,..F.
TLlK/5657-5
FIGURE 2. Programmable Attenuator
'GERMANIUM OR SCHOTIKY
FIGURE 1. Power Supply and Ground Connections
3-229
en
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Applications Information (Continued)
TABLE II. Attenuator Codes
:::I:
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02
01
00
Attenuation
0
0
0
1
0
0
1
2
0
1
0
5
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0
1
1
10
1
0
0
20
1
0
1
50
1
1
0
100
1
1
1
200
TABLE III. Inverting Gain Chart
02
01
00
Gain
RIN (.n)
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Ay=O
Ay=1
Ay=4.
Ay=9
Ay=19
Ay=49
Ay=99
Ay=199
30k.
15k
6k
3k
1.5k
600
300
150
Remote Output Sense
Inverting Mode
The VOUT sense pin of the LH0086 should be connected at
the load in order to eliminate errors due to lead resistance.
In any case the output sense and output force must be tied
together at some point. See Figure 4.
The LH0086 may be used in the inverting mode, however,
there are several design considerations.
1. Input resistance is low at high gains (see gain chart for
input resistance at each gain).
2. Each gain step gets a one subtracted from the non·invert·
ing gain. (See inverting gain chart for available gains.)
3. The first gain step (digital code of 000) cannot be used
because the output will remain at virtual ground regardless of the input.
SENSE
~N
LHOG8&
t
v.".
>-+''-t-- YoUT
10
FIGURE 4. Remote Output Sense
11
FIGURE 5. Offset Adjustment
LH0088
00
01
oz
FIGURE 6. Noise Measurement Circuit
20W STEP ~H----1
1kll
OUTPUT E8ROR TO SCOPl! INPUT
12
~N--------------~
1kQ
FIGURE 3. LHOOB6 Inverting Gain Configuration
TLlK/5657-6
FIGURE 7. Settling Time Test Circuit
3-230
Vos
Offset Voltage: The voltage that must be applied to force the output to 0 volts.
18
Input Bias Current: The current into Pin 7 with
the device connected in the non-inverting configuration.
RIN
Po
V'H
Input Resistance: The ratio of the change in input voltage to the change in input current on either input with the other grounded.
Power Dissipation: The power dissipated in the
device with no load and with the analog as well
as the digital inputs 'at OV.
Digital "1" Input Voltage: Minimum voltage required at the digital input to guarantee a high logic state.
Digital "0" Input Voltage: The current into a digital input at specified logic level.
Input Voltage Range: The voltage range for
which the device is operational.
t:..VOS/t:..T Average Input Offset Voltage Drift: The ratio
of input offset voltage change from 25'C to either
temperature extreme divided by the temperature
range.
PSRR
Power Supply Rejection Ratio: The ratio of the
specified change in supply voltage to the change
in input offset voltage over this range.
Ay
Voltage Gain: The ratio of output voltage change
to the input voltage change producing it.
t:..Ay/t:..T Average Gain Temperature Coefficient: The
ratio in gain from 25'C to either temperature extreme divided by the temperature range.
Gain Error: The deviation in percent between the
ideal voltage gain and the value obtained when
the device is configured for that gain.
BW
Bandwidth: The frequency at which the voliage
gain is reduced to 3 dB below the low frequency
value.
PBW
Power Bandwidth: Maximum frequency for
which the output swing is a large signal sinewave without noticeable distortion.
SR
Slew Rate: The internally limited rate of change
in output voltage with a large amplitude step
function applied at the input.
ts
Settling Time: The time between the initiation of
an input step function and the time when the output voltage has settled to within a specified error
band of the final output voltage.
Gain Non-Linearity: The deviation of the gain
from a straight line drawn through the end-points
expressed as a percent of full scale (10V for operation with ± 15V supplies). For testing purposes it is the difference between positive swing
gain (OV to 10V) and average gain ( -1 OV to 10V)
or between negative swing gain (OV to -10V)
and average gain.
Vo
Output Voltage Swing: The peak output voltage
swing referenced to ground into specified load.
IO(SC)
Output Short-Circuit Current: The current supplied by the device with the output connected directly to ground.
RO
Closed Loop Output Resistance: The ratio of
change in output voltage to change to output current at a specific gain.
Vs
Supply Voltage Range: The supply voltage
range for which the device is operational.
IS
Supply Current: The current required from the
supply to operate the device with no load and
with the analog as well as the digital inputs at OV.
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Definition of Terms
Gain Switching Time: The time between the initiation of a gain logic change and the time when
the final gain switches are closed. It includes
overdrive recovery time, but not settling to final
value.
Equivalent Input Noise Voltage: The rms or
peak noise voltage referred to the input (RTI)
over a specified frequency band.
iN
3-231
Equivalent Input Noise Current: The rms or
peak noise current referred to the input (RTI)
over a specified frequency band.
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LH0101/LH0101C,LH0101A/LH0101AC
Power Operational Amplifier
~
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~
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"..........
C)
C)
~
..J
Features
The LH0101 is a wideband power operational amplifier featuring FET inputs, internal compensation, virtually no crossover distortion, and rapid settling time. These features make
the LH0101 an ideal choice for DC or AC servo amplifiers,
deflection yoke drives, programmable power supplies, and
disk head positioner amplifiers. The LH0101 is packaged in
an 8 pin TO-3 hermetic package, rated at 60 watts with a
suitable heat sink.
•
•
•
•
•
•
•
•
5 Amp peak, 2 Amp continuous output current
300 kHz power bandwidth
850 mW standby power (± 15V supplies)
300 pA input bias current
10 V/JLs slew rate
Virtually no crossover distortion
2 JLs settling time to 0.01 %
5 MHz gain bandwidth
Schematic and Connection Diagrams
SC+
CASE IS
/OUTPUT
+
OUTPUT (CASE)
TUK/5558-2
Top View
Order Numbers LH0101K,
LH0101CK, LH0101AK or
LH0101ACK
See NS Package Number K08A
SC-
yTUK/5558-1
Nota: Electrically connected internally. no
connection should be made to pin.
3-232
r-
::I:
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 5)
±22V
Supply Voltage, Vs
62W
5A
Peak Output Current (50 ms pulse), 10(PK)
Output Short Circuit Duration
(within rated power dissipation,
Rsc = 0.35n, TA = 25'C)
Continuous
Operating Temperature Range, TA
LH0101AC,LH0101C
- 25'C to + 85'C
LH0101A, LH0101
-55'C to + 125'C
- 65'C to + 150'C
Storage Temperature Range, TSTG
±Vs
Maximum Junction Temperature, TJ
Lead Temperature (Soldering < 10 sec.)
±Vs
ESD rating to be determined.
Power Dissipation at TA = 25'C. Po
Derate linearly at 25'C/W to zero at 150'C,
5W
Power Dissipation at TC = 25'C
Derate linearly at 2'C/W to zero at 150'C
Differential Input Voltage, VIN
±40V but
Input Voltage Range, VCM
±20V but
Thermal ResistanceSee Typical Performance Characteristics
DC Electrical Characteristics
Symbol
Parameter
<
<
LH0101AC
LH0101A
~Vos/~PD Change in
S;
Ie
Change in
Input Offset Voltage
with Temperature
TMAX
LH0101C
LH0101
Max
Min
3
Units
Typ
Max
5
10
mV
15
(Note 2)
150
300
",V/W
10
10
",VI'C
VCM = 0
Input Bias Current
T
los
A
S;
T
.ILH0101C/AC
MAX
'I
LH0101/A
Input Offset Current
TA
S;
TMAXILH0101C/AC
'I
AVOL
Large Signal
Voltage Gain
Va
Output Voltage Swing RSC = 0
Va = ±10VRL = 10n
RL = 100n
LH0101/A
300
1000
60
60
300
1000
75
250
15
15
75
250
50
200
50
200
±12
±12.5
±12
±12.5
Av = +1
RL = 10n
± 11.25 ±11.6
±11.25 ±11.6
Note 3
RL = 5n
±10.5
±11
±10.5
±11
±10V
85
100
85
100
±5Vto ±15V
85
100
85
100
CMRR
Common Mode
Rejection Ratio
~VIN =
PSRR
Power Supply
Rejection Ratio
~Vs =
Is
Quiescent Supply
Current
r-
::I:
o......
o......
li
......
(')
7
Input Offset Voltage
with Dissipated Power
~Vos/~T
Typ
1
TA
o
......
o
......
):0
......
r-
(Note 1) Vs = ± 15V, TA = 25'C unless otherwise noted
input Offset Voltage
S;
r-
::I:
::I:
Conditions
TMIN
......
o......
o
......
Min
Vas
150'C
260'C
o
......
o
......
pA
nA
pA
nA
V/mV
V
dB
28
3·233
35
28
35
mA
o
....
o
....
o
:E:
...I
....
~
....o
....
o
AC Electrical Characteristics (Note 1), Vs = ±15V, TA = 25'C
Symbol
...I
en
Equivalent Input
f
= 1 kHz
CIN
Input Capacitance
f
= 1 MHz
Power Bandwidth, - 3 dB
....
o
SR
...........I
....oo
t" tf
Slew Rate
7.5
RL
Av= + 1
Small Signal Overshoot
GBW
Gain-Bandwidth Product
RL
t8
Large Signal Settling
Time to 0.01 %
THD
Total Harmonic Distortion
Po
RL
LH0101C
LH0101AC
Max
Min
Typ
25
Units
Max
nVJHz
3.0
3.0
pF
300
300
kHz
10
10
Vlp.s
200
200
ns
10
10
%
5.0
5.0
MHz
2.0
2.0
p.s
0.008
0.008
%
(Note 4)
= 100
Small Signal Rise or
Fall Time
Typ
25
Noise Voltage
:E:
:s
LH0101
LH0101A
Conditions
Min
:E:
:c....o
Parameter
4.0
(Note 4)
= 00
= 10W,f = 1 kHz
= 100
Note 1: Specification Is at TA = 25'C. Actual values at operating temperature may differ from the TA = 25'C value. When supply voltages are ± 15V, quiescent
operating junction temperature will rise approximately 20'C without heat sinking. Accordingly, Vos may change 0.5 mV and Ie and los will change Significantly
during warm-ups. Refer to the Ie vs. temperature and power dissipation graphs for expected values. Power supply voltage Is ± 15V. Temperature testa are made
only at extremes.
Note 2: Change In offset voltage with dissipated power Is due entirely to average device temperature rlse and not to differential thermal feedback effects. Test Is
performed without any heat sink.
Note 3: At light loads, the output swing may be limited by the second stage rather than the output stage. See the application section under "Output swing
enhancement" for hints on how to obtaln extended operation.
Note 4: These parameters are sample tested to 10% LTPD.
Note 6: Refer to RETS0101AK lor the LH0101AK military specifications and RETS0101K for the LH0101K military specifications.
3-234
r-----------------------------------------------------------------------------~r
::r:
o....
o....
Typical Performance Characteristics
Maximum Power Dissipation
100
.
!!
'"
Iii
l!i
if!
II:
i
~
5 Safe Operating Area
VSa:t15V
BJC-2'C/W
BJAa250C/W
90
80
70
60
50
40
3D
20
10
~ 2
.......
"
1-- -
o
o
INFINITE
HEAT SINK
f- ' - ~
75
100
1
~
-1
~
i
I
125
B
~
2
100
/
10
~
Je
;
V
V
4
;
2
36
95
65
1
125
.TC. CASE TEMPERATURE (OC)
120
~~~;gv
110
r-....
100
i
~
60
40
'-GAIN
"-
20
PHASE
-0
"'" "
,
~
-20
10
I
24
..
20
~ i
c;
16
+90 )i1
~
~
100
lK
10K lOOK
1M
~
I
-90 !!
-180
10M
~
!j
~
.
Ii
II:
~
iil
80
!d
60
~
40
I
20
~
-
lK
III
I'!
~
V-
I
i
1/
4
5
Output Voltage Swing
vs. Frequency
¥::r5\~V
AV-l
HL=co
:1:25
V
V V
;"
POSITIVE
15
/. VNEOATIVE
V
V V
V V
V
10
'"
=10
=1&
:;; 100
:!!.
5!
Ii
II:
BO
-....
,
TA = 250C
VS= :15V
"-
60
~
'\.
"-
40
20
8
~
i
lOOK
1M
10M
:25
Common-Mode Rejection
Ratio va. Frequency
i!i
.~
=20
Va. SUPPLY VOLTAGE (VI
.
i'l
"-
a
10
100
I\.
lK 10K lOOK 1M
FREQUENCY (Hzl
10M
•
g
10
AV=-l
Vs =15V
TA-26'C
z
L
~
l!!
I:!
~Vl0gLOAD
~:II
0.5
!:i
10mV NO LOAD-
lOOK 1M
FREQUENCY (Hz)
10M
::r:
o
....
o
....
o
....
20
:1:5
iii
iil
g
10K
:t20
o
1
-,lmVNOL~
10K
::.
I
o
:t15
Input Common-Mode
Range
Settling Time
~
100
=10
26 Voltage
VS==15V
TA=25OC
NO HEAT SINK
I\.
10
....
~
z
r'\.
....oo
~
:E
r'\.
::r:
1250C
VS. POWER SUPPLY VOLTAGE (V)
FREQUENCY (Hzl
~~:~~~V
i'..
~
.......
r
.......
r
12
Power Supply Rejection
RatiO VB. Frequency
=>
'i:i
10
±20
:!: ±15
r--
1.0
T~'~~d-t
VS= ±15V
~
II
II
~
Equivalent Input NOise Voltage
200
~
111111
~IJ61~w
VO=""~,¥,
2.0
'-'
-
±5
FREQUENCY (Hz)
±10
±15
±20
±25
VS, POWER SUPPLY VOLTAGE (V)
...J
Output Voltage Swing vs.
±15
TA
~
~
~
§!
:-WI~HJU+ l.I.
±10
I
~
I IIIIIIII
111111
I 11111111
~
VS=±15V
±5
1
~
~
15.0
Si
12.5
z
iF
I ITA=-55"C
f =10KHz
Vs= ±15V
TA=25"C
~ 17.5
1-~~~~~eEJJNTi-bf--Hf-+-H-ItH
....
20.0
+25"C. 125"C
WIT~
s-k~~~~= !s5"C
ENHANCEMENT
Z
Open-Loop Output Resistance
;:L.:.o.:.ad;::..:.R:..:e;.:s;:;is:;.t;;a;.:n.:.ce::""'-'-,..,..rrm
II
TA=25"C
~
10.0
~
7.5
...~
"
Z
i;i
~...
11
~=>
5.0
Ii
ITA=125"C
VS= ±15V
TA=Z5"C
1.2
in
....
1.4
Open-Loop Output
Resistance vs Frequency
'"
2.5
1.0
0.8
0.6
f;;:
..j.f- t-
1
400 A
IOfw
0.2
100
10
100
RL, LOAD RESISTANCE (11)
1000
10, OUTPUT CURRENT (mA)
10.0
~
lOOK
1M
FREQUENCY (Hz)
....
_
~
2. 0
f\
8'1.0
<=
~
10K
Short Circuit Current
vs.RSC
t::
U
lK
r-VS-±15
:<
;: 5.0
t
--
I II
I 11111
10
I--""
IOUT-150mA
0.4
Te= 550C
o. 5
'"'"
~o. 21--
C
O. 1
0.1
""
TC=+125'i;::?~
1il ni~,
0.2
0.4
1
2 345
10
RSC, CURRENT LfMIT RESISTOR (11)
TL/K/5558-4
Small Signal Pulse Response (No Load)
Large Signal Pulse Response (RL = 100.)
TL/K/5558-5
TL/K/5558-6
3-236
r-
::I:
Application Hints
Electrostatic shielding of high impedance circuitry is advisable.
Error voltages can also be generated in the external circuitry. Thermocouples formed between dissimilar metals can
cause hundreds of microvolts of error in the presence of
temperature gradients.
Since the LH0101 can deliver large output currents, careful
attention should be paid to power supply, power supply bypassing and load currents. Incorrect grounding of signal inputs and load can cause significant errors.
Input Voltages
The LH0101 operational amplifier contains JFET input devices which exhibit high reverse breakdown voltages from
gate to source or drain. This eliminates the need for input
clamp diodes, so that high differential input voltages may be
applied without a large increase in input current. However,
neither input voltage should be allowed to exceed the negative supply as the resultant high current flow may destroy
the unit.
Exceeding the negative common-mode limit on either input
will cause a reversal of the phase to the output and force
the amplifier output to the corresponding high or low state.
Exceeding the negative common-mode limit on both inputs
will force the amplifier output to a high state. In neither case
does a latch occur since raising the input back within the
common-mode range again puts the input stage and thus
the amplifier in a normal operating mode.
Every attempt should be made to achieve a single point
ground system as shown in the figure below.
o
......
o......
......
r-
::I:
o......
o
......
l:o
......
r-
::I:
o......
o
......
~
......
r-
::I:
o
......
o
......
Y+I~i-
o
r----I~ ~cax
$
1
Exceeding the positive common-mode limit on a single input
will not change the phase of the output however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
-
LH0101
-_
..; /
I
~L-.J.
VS
RF
V-I
I
-Lca
These amplifiers will operate with the common-mode input
voltage equal to the positive supply. In fact, the commonmode voltage may exceed the positive supply by approximately 100 mV, independent of supply voltage and over the
full operating temperature range. The positive supply may
therefore be used as a reference on an input as, for example, in a supply current monitor and/or limiter.
With the LH0101 there is a temptation to remove the bias
current compensation resistor normally used on the non-inverting input of a summing amplifier. Direct connection of
the inputs to ground or a low-impedance voltage source is
not recommended with supply voltages greater than 3V.
The potential problem involves loss of one supply which can
cause excessive current in the second supply. Destruction
of the IC could result if the current to the inputs of the device is not limited to less than 100 mA or if there is much
more than 1 ,...F bypass on the supply buss.
Although difficulties can be largely avoided by installing
clamp diodes across the supply lines on every PC board, a
conservative design would include enough resistance in the
input lead to limit current to 10 mA if the input lead is pulled
to either supply by internal currents. This precaution is by no
means limited to the LH0101.
\
VOUT+
LOAD
HIGH
CURRENT
POWER
SUPPLY
TL/K/5558-7
FIGURE 1. Single-Point Grounding
Bypass capaCitor Csx should be used if the lead lengths of
bypass capaCitors Cs are long. If a single point ground system is not possible, keep signal, load, and power supply
from intermingling as much as possible. For further information on proper grounding techniques refer to "Grounding
and Shielding Techniques in Instrumentation" by Morrison,
and "Noise Reduction Techniques in Electronic Systems"
by Ott (both published by John Wiley and Sons).
Leads or PC board traces to the supply pins, short-circuit
current limit pins, and the output pin must be substantial
enough to handle the high currents that the LH0101 is capable of producing.
Layout Considerations
When working with circuitry capable of resolving pico-ampere level signals, leakage currents in circuitry external to
the op amp can significantly degrade performance. High
quality insulation is a must (Kel-F and Teflon rate high).
Proper cleaning of all insulating surfaces to remove fluxes
and other residues is also required. This includes the IC
package as well as sockets and printed circuit boards.
When operating in high humidity environments or near O'C,
some form of surface coating may be necessary to provide
a moisture barrier.
Short Circuit Current Limiting
Should current limiting of the output not be necessary, SC+
should be shorted to V + and SC - should be shorted to
V -. Remember that the short circuit current limit is dependent upon the total resistance seen between the supply and
current limit pins. This total resistance includes the desired
resistor plus leads, PC Board traces, and solder joints.' Assuming a zero TCR current limit resistor, typical temperature
coefficient of the short circuit will be approximately .3%.
'Short circuit current will be limited to approximately :~~.
The effects of board leakage can be minimized by encircling
the input circuitry with a conductive guard ring operated at a
potential close to that of the inputs.
3-237
or----------------------------------------------------------------------.
.,...
o
.,...
Application Hints (Continued)
::I:
Thermal Resistance
o
.......I
o
cc
.,...
o.,...
o
::I:
...I
;c
.,...
o.,...
o
::I:
....
.,...
...I
o
.,...
o
::I:
ground set the frequency of the pole. In many instances the
frequency of this pole is much greater than the expected 3
dB frequency of the closed loop gain and consequently
there is negligible effect on stability margin. However, if the
feedback pole is less than approximately six times the expected 3 dB frequency a lead capacitor should be placed
from the output to the input of the op amp. The value of the
added capacitor should be such that the RC time consistant
of this capaCitor and the resistance it parallels is greater
than or equal to the original feedback pole time constant.
The thermal resistance between two pOints of a conductive
system is expressed as:
812 = T1 -
T2 0C/W
Po
where subscript order indicates the direction of heat flow. A
simplified heat transfer circuit for a cased semiconductor
and heat sink system is shown in the figure below.
The circuit is valid only if the system is in thermal equilibrium
(constant heat flow) and there are, indeed, single specific
temperatures TJ, Tc and Ts (no temperature distribution in
junction, case, or heat sink). Nevertheless, this is a reasonable approximation of actual performance.
Some inductive loads may cause output stage oscillation. A
.01 ,..F ceramic capaCitor in series with a 10n resistor from
the output to ground will usually remedy this situation.
V+
HEAT INPUT "'\
...I
TJ>TC>TS>TA
INDUCTIVE
LOAD
BSA
'::" AMBIENT TEMP. TA
VTL/K/555B-B
TL/K/555B-9
FIGURE 2. Semiconductor-Heat Sink Thermal Circuit
The junction-to-case thermal resistance 8JC specified in the
data sheet depends upon the material and size of the package, die size and thickness, and quality of the die bond to
the case or lead frame. The case-to-heat sink thermal resistance 8cs depends on the mounting of the device to the
heat sink and upon the area and quality of the contact surface. Typical Bcs for a TO-3 package is 0.5 to 0.7°C/W, and
0.3 to 0.5°C/W using silicone grease.
FIGURE 3. Driving Inductive Loads
Capacitive loads may be compensated for by traditional
techniques. (See "Operational Amplifiers: Theory and Practice" by Roberge, published by Wiley):
Cc
The heat sink to ambient thermal resistance 8SA depends
on the quality of the heat sink and the ambient conditions.
Cooling is normally required to maintain the worst case operating junction temperature TJ of the device below the
specified maximum value TJ(MAX)' TJ can be calculated
from known operating conditions. Rewriting the above equation, we find:
ViN-M........
HC
CAPACITIVE
~LOAD
V-
TL/K/555B-10
TJ - TA
8JA = --_oC/W
Po
TJ = TA + P08JA °C
Where: Po (Vs - VOUT)IOUT + Iv+
for a DC Signal
IJJA = IJJC + IJcs + BSA and Vs
BJC for the LH0101 is about 2°C/W.
=
-
FIGURE 4. Rc and Cc Selected to
Compensate for Capacitive Load
A similar but alternative technique may be used for the
LH0101:
(V-)lla
V+
Supply Voltage
Stability and Compensation
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in'order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the
input to minimize "pickup" and maximize the frequency of
the feedback pole by minimizing the capacitance from the
input to ground.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance from the input device (usually the inverting input) to ac
TUK/555B-11
FIGURE 5. Alternate Compensation for Capacitive Load
3-238
r-
::r:
C)
Application Hints (Continued)
.....
C)
Output Swing Enhancement
Output Resistance
When the feedback pin is connected directly to the output,
the output voltage swing is limited by the driver stage and
not by output saturation. Output swing can be increased as
shown by taking gain in the output stage as shown in High
Power Voltage Follower with Swing Enhancement below.
Whenever gain is taken in the output stage, as in swing
enhancement, either the output stage, or the entire op amp
must be appropriately compensated to account for the additional loop gain.
The open loop output resistance of the LH0101 is a function
of the load current. No load output resistance is approximately 100. This decreases to under on 0 for load currents
exceeding 100 mAo
......
.....
r-
::r:
C)
......
C)
......
!:
r::r:
C)
......
C)
......
Q
Typical Applications
!i:
See AN261 for more information.
C)
......
C)
......
o
+15
VIN
52
52
TL/K/5558-12
TL/K/5558-13
FIGURE 6. High Power Voltage Follower
FIGURE 7. High Power Voltage Follower
with Swing Enhancement
v+
YoUT
v-
TL/K/5558-14
FIGURE 8. Restricting Outputs to Positive Voltages Only
Following is a partial list of sockets and heat dissipators for use with the LH01 01. National assumes no responsibility for their
quality or availability.
8-Lead TO-3 Hardware
SOCKETS
Keystone 4626 or 4627
Robinson Nugent 0002011
Azimuth 6028 (test socket)
HEAT SINKS
Thermalloy 2266B (35'C/W)
IERC LAIC3B4CB
IERC HP1-T03-33CB (7'C/W)
MVID 5791B
MICA WASHERS
Keystone 4658
MVID Engineering
30 Cook Court
Laconia, New Hampshire 03246
Keystone Electronics Corp.
49 Bleecker St.
New York, NY 10012
Azimuth Electronics
2377 S. EI Camino Real
San Clemente, CA 92572
Robinson Nugent Inc.
800 E. 8th SI.
New Albany, IN 47150
IERC
135 W. Magnolia Blvd.
Burbank, CA 91502
Thermalloy
P.O. Box 34829
Dallas, TX 75234
3-239
o
.....
CI
.....
CI
Typical Applications (Continued)
:::E:
......J
V+-.----.--------,
~
.....
CI
.....
CI
:::E:
•
..J
.....
CI
.....
CI
:::E:
......J.....
CI
.....
CI
TLIK/555B-15
FIGURE 9. Generating a Split Supply from a Single Voltage Supply
:::E:
..J
VREF
OAC1218
DO
011
TLiK/5558-16
FIGURE 10. Power DAC
lk
81l
2k
-20
TLiK/555B-17
FIGURE 11. Bridge Audio Amplifier
3-240
r-----------------------------------------------------------------------------~
r
::t:
o
o
....
....
.....
Typical Applications (Continued)
r
::t:
+40
....
....
o
o
lk
~
6.9Y
LM199
r
::t:
o
o
t----
....
....
li
.....
r
+5 TO +35
::t:
....oo
....
o
~GNO
~--_ -5 TO -35
TLlK/5558-18
FIGURE 12.
± 5 to ±35 Power Source or Sink
+15
TLlK/5558-19
FIGURE 13. Remote Loudspeaker via Infrared Link
•
+15
YIN
lOUT = RSENSE
YIN
DEFLECTION
YOKE
TLlK/5558-20
FIGURE 14. CRT Deflection Yoke Driver
3·241
......o
3
~...
...o
3
...o...
CJ
Typical Applications (Continued)
•
o
3....
...
...
o
o
TUK/5558-21
FIGURE 15. DC Servo Amplifier
3
+15
TUK/5558-22
FIGURE 16. High Current Source/Sink
3·242
5:
~National
N
.....
Q
.....
~ Semiconductor
~
r::r:
N
lH2101A/lH2201A/lH2301A
N
Dual High Performance Operational Amplifiers
Q
.....
~
5:
N
General Description
Co)
The LH2101A series of dual operational amplifiers are two
LM101A type op amps in a single hermetic package. Featuring all the same performance characteristics of the single,
these duals offer in addition closer thermal tracking, lower
weight, reduced insertion cost, and smaller size than two
singles. For additional information, see the LM101A data
sheet and National's Linear Application Handbook.
The LH2101A is specified for operation over the -55'C to
+ 125'C military temperature range. The LH2201 A is specified for operation over the - 25'C to + 85'C temperature
range. The LH2301A is specified for operation over the O'C
to + 70'C temperature range.
Features
11/ Low offset voltage
III Low offset current
III Guaranteed drift characteristics
13 Offsets guaranteed over entire common mode and sup-
ply voltage ranges
1:1 Slew rate of 10 V / J1-s as a summing amplifier
Connection Diagram
r----~y+
, - - - - 0 BALANCE
OUTPUT
INY. INPUT
NON-INY. INPUT
, - - - 0 COMPENSATION
>--0 OUTPUT
L---o BAL/COMPENSATION
~--o()y-
....---0 BALANCE
OUTPUT
COMPENSATION
OUTPUT
INY. INPUT 0-----1
NON-INY. INPUT 0----1
BAL/COMPENSATION
L--_o()
y+
TLlK/l0llB-l
Order Number LH2101AD, LH2201AD or LH2301AD
See NS Package Number D16C
3-243
Q
.....
:J>
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
plesse contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
Power Dissipation (Note 1)
Differential Input Voltage
Input Voltage (Note 2)
Output Short·Clrcult Duration
Operating Temperature Range
LH2101A
LH2201A
LH2301A
Storage Temperature Range
Lead Temperature
(Soldering, 10 Sec.)
±22V
500mW
±30V
±15V
Continuous
- 55·C to + 125·C
- 25·C to + 85·C
O·Cto +70·C
- 65·C to + 150·C
300·C
Electrical Characteristics Each Side (Note 3)
Parameter
Limits
Conditions
Units
LH2101A
LH2201A
LH2301A
Input Offset Voltage
TA = 25·C, Rs s; 50 kO
2.0
2.0
7.5
mVMax
Input Offset Current
TA = 25·C
10
10
50
nAMax
Input Bias Current
TA = 25·C
75
75
250
nAMax
Input Resistance
TA = 25·C
1.5
1.5
0.5
MOMin
Supply Current
TA = 25·C, Vs ±20V
3.0
3.3
3.0
mAMax
Large Signal Voltage Gain
TA = 25·C, Vs ±15V
VOUT= ±10V,RL::<:2kO
50
50
25
V/mVMin
Input Offset Voltage
Rs s; 50 kO
3.0
3.0
10
mVMax
15
15
30
fJoVI"CMax
Average Temperature
Coefficient of Input
Offset Voltage
Input Offset Current
Average Temperature
Coefficient of Input
Offset Current
25·C S; TA S; 125·C
- 55·C S; TA S; 25·C
Input Bias Current
20
20
70
nAMax
0.1
0.2
0.1
0.2
0.3
0.6
nAI"CMax
300
100
100
Supply Curent
TA = + 125·C, Vs = ±20V
2.5
2.5
Large Signal Voltage Gain
Vs = ±15V, VOUT = ±10V
RL::<: 2kO
25
25
15
V/mVMin
Output Voltage Swing
Vs = ±15V, RL = 10 kO
RL = 2kO
±12
±10
±12
±10
±12
±10
V Min
Input Voltage Range
Vs = ±20V
±15
±15
±12
V Min
Common Mode
Rejection Ratio
Rs
80
80
70
dB Min
S;
50 kO
nAMax
mAMax
Supply Voltage
Rs<50kO
80
80
70
dB Min
Rejection Ratio
Note 1: The maximum lunctlon temperature of the LH2101A Is lSO'C, while that of the LH2201A is 100'C. For operating temperatures of devices in the flat
package, the derating is based on a thermal resistance of 18S'C/W when mounted on a 'A.·lnch-thick epoxy glass board wilh 0.03·lnch-wide, 2·ounce copper
conductors. The thermal resistance of the dual-In·line package Is 100'C/W,Iunction to ambient.
Note 2: For supply voltages less than ±lSV, the absolute maximum input voltage Is equal to the supply voltage.
Note 3: These speciflcations apply for ±SV ,;; Vs ,;; ±20Vand -SS'C ,;; TA ,;; + 12S'C, unless otherwise specified. With the LH2201A, however, all temperature
specifications are limited to -2S'C ,;; TA';; +8S'C. For the LH2301A these speCifications applylorO'C s: TA ,;; +70'C, and ±SV s: Vs ,;; +ISV. Supply current
and Input voltage range are speclfled as Vs = ±ISV lor the LH2301A. Cl = 30 pF unless otherwise speCified.
3·244
,-----------------------------------------------------------------------------, r
::E:
....
....
I\)
Auxiliary Circuits
Q
Inverting Amplifier with Balancing
Circuit
Rl
Alternate Balancing Circuit
Single Pole Compensation
~
r
::E:
I\)
I\)
R2
....
l>
Q
R2
Rl
.....
r
::E:
OUTPUT
I\)
c.:I
....l>
Q
TL/K110116-4
Cl
3Qpf
TL/K/l0118-2
tMay be zero or equal to parallel combination of
Rl and R2 for minimum offset.
TL/KI1 0116-3
Two Pole Compensation
Feedforward Compensation
C2
R2
Rl
YOUT
C,;" R, CS
R, + R2
Cs
C2
= 30pF
= 10Cl
1
C2
TLlKI101.16-5
= 2'ITfoR2
fo =3MHz
Cl
150pf
TLlK110116-6
•
3-245
:§
oCf)
C'I
~National
..... ~ Semiconductor
::J:
....I
!
LH2108/LH2208/LH2308,
:5 LH2108A/LH2208A/LH2308A Dual Super Beta
~ Operational Amplifiers
o
C'I
....
:5«f
C'I
~
C'I
:5
;;0
o
C'I
C'I
:5.....
co
....o
:5
C'I
General Description
The LH210BAlLH220BAlLH230BA and LH210B/LH220B/
LH230B series of dual operational amplifiers are two
LM10BA or LM10B type op amps in a single hermetic package. Featuring all the same performance characteristics of
the single device, these duals also offer closer thermal
tracking, lower weight, reduced insertion cost, and smaller
size than two single devices. For additional information see
the LM10BA or LM10B data sheet and National's Linear Application Handbook.
The LH210BAlLH210B is specified for operation over the
- SS·C to + 12S·C military temperature range. The
LH220BAlLH220B is specified for operation over the
- 2S·C to + BS·C temperature range. The LH230BAI
LH230B is specified for operation over the O·C to + 70"C
temperature range.
Features
SO pA
0.7 mV
0.3 mV
0.7 mV
±1SV
±3V to ±20V
• Low offset current
.• Low offset voltage
• Low offset voltage LH210BA
LH210B
• Wide input voltage range
• Wide operating supply range
Connection Diagram
r----~y+
OUTPUT
.----0 COMP
INV
INPUT
NON-INV
INPUT
>---0
OUTPUT
L-_-oINPUT
COMP
t---OVINV
INPUT
NON-INV
INPUT
Order Number LH2108AD, LH220BAD, LH2208AD,
LH2308AD,LH2108D,LH2208D,orLH2308D
See NS Package Number D16C
OUTPUT
COMP
0---1
0---1
OUTPUT
COMP
INPUT
L...-""";;'-o
y+
TL/K/l0117-1
Auxiliary Circuits
Standard Compensation Circuit
Rl
-VIN
Rl
R3
VOUT
+VIN
,;
C,
Ct
R1Co
Rl + R2
Co~30pF
TL/K/l0117-2
Feedback Compensation
Alternate' Frequency
Compensation
R2
C2
R2
-VIN~3
+VIN
VOUT
Rl
R2
+
'Improves relection of
power supply noise by a
factor of ten.
VOUT
Cs
I l 0 0 PF
R3
TL/K/l0117-3
1
C2~ 2.".fOR2
Cl
lS0pF
fo~3MHz
TL/K/l0117-4
3-246
r
::J:
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
Power Dissipation (Note 1)
Differential Input Current (Note 2)
Input Voltage (Note 3)
Output Short Circuit Duration
Operating Temperature Range
LH2108A1LH2108
LH2208A1LH2208
LH2308A1LH230B
Storage Temperature Range
Lead Temperature (Soldering, 10 sec)
±20V
500mW
±10mA
±15V
Continuous
300'C
::J:
I\)
I\)
o
r
I\)
c.,)
o
co
i-
::J:
Limits
Conditions
I\)
l>
......
LH2108
LH2208
LH2308
2.0
2.0
7.5
mVMax
Input Offset Current
TA = 25'C
0.2
0.2
1.0
nAMax
co
Input Bias Current
TA = 25'C
2.0
2.0
7.0
nAMax
Input Resistance
TA = 25'C
30
30
10
MOMin
Supply Current
TA = 25'C
0.6
0.6
0.8
mAMax
Large Signal Voltage Gain
TA = 25'C, Vs = ±15V
VOUT = ±10V, RL > 10 kO
50
50
25
V/mVMin
Input Offset Voltage
3.0
3.0
10
mVMax
Average Temperature Coefficient
of Input Offset Current
15
15
30
",VI'C Max
Input Offset Current
0.4
0.4
1.5
nAMax
Average Temperature Coefficient
of Input Offset Current
2.5
2.5
10
pAI'C Max
10
Input Bias Current
3.0
3.0
Supply Current
TA = +125'C
0.4
0.4
Large Signal Voltage Gain
Vs= ±15V,VOUT= ±10V
RL>10kO
25
25
Output Voltage Swing
Vs= ±15V,RL= 10kO
Input Voltage Range
Vs = ±15V
r
::J:
I\)
I\)
o
co
l>
......
r
::J:
I\)
c.,)
o
co
:J>
nAMax
mAMax
15
V/mVMin
VMin
±13
±13
±13
±13.5
±13.5
±14
VMin
Common Mode Rejection Ratio
85
85
80
dB Min
Supply Voltage Rejection Ratio
80
80
80
dB Min
Electrical Characteristics Each Side (Note 4)
Limits
Conditions
....
o
Units
TA = 25'C
Units
LH2108A
LH220BA
LH230BA
Input Offset Voltage
TA = 25'C
0.5
0.5
0.5
mVMax
Input Offset Current
TA = 25'C
0.2
0.2
1.0
nAMax
Input Bias Current
TA = 25'C
2.0
2.0
7.0
nAMax
Input Resistance
TA = 25'C
30
30
10
MOMin
Supply Current
TA = 25'C
0.6
0.6
0.8
mAMax
Large Signal Voltage Gain
TA = 25'C, Vs = ±15V
VOUT = ±10V, RL > 10 kO
80
80
80
V/mVMin
3-247
r
::J:
co
......
Input Offset Voltage
Parameter
co
......
-55'Cto +125'C
- 25'C to + 85'C
O'Cto +70'C
-65'C to + 150'C
Electrical Characteristics Each Side (Note 4)
Parameter
....o
I\)
•
~
o
C')
Electrical Characteristics
Each Side (Note 4) (Continued)
N
::J:
...I
......
Parameter
Limits
Conditions
c(
CO
o
Input Offset Voltage
N
Average Temperature Coefficient
of Input Offset Voltage
N
::J:
...I
......
c(
Units
LH2108A
LH2208A
LH2308A
1.0
1.0
0.73
mVMax
5
5
5
/Lvrc Max
CO
Input Offset Current
0.4
0.4
1.5
nAMax
N
Average Temperature Coefficient
of Input Offset Current
2.5
2.5
10
pArC Max
3.0
3.0
10
0.4
0.4
40
40
o
.,...
::J:
...I
o:r
oC')
Input Bias Current
=
=
Supply Current
TA
...I
Large Signal Voltage Gain
Vs
±15V, VOUT
RL> 10 k!l.
N
N
Output Voltage Swing
Vs
Input Voltage Range
Vs
N
::J:
......
CO
o
::J:
...I
......
CO
o
.,...
N
::J:
...I
=
=
+125°C
±15V, RL
=
=
±10V
10k!l.
±15V
Common Mode Rejection Ratio
nAMax
mAMax
60
V/mVMin
VMin
±13
±13
±13
±13.5
±13.5
±14
VMin
96
96
96
dBMin
dBMin
96
96
Supply Voltage Rejection Ratio
96
Note 1: The maximum iunction temperature of the LH2108A/LH2108 is IS0°C, while that of the LH2208A/LH2208 is 100°C and that of the LH2308A1LH2308 is
85°C. For operating devices in the flat package at elevated temperatures, the derating is based on a thermal resistance of 185°C/W when mounted on a Ywinchthick epoxy glass board with O.03-inch-wide, 2-ounce copper conductors. The thermal resistance of the dual-in-line package is 100°C/W, junction to ambient.
Note 2: The inputs are shunted with back-ta-back diodes for overvoltage protection. Therefore, excessive current will flow if a differential input voltage in excess of
1V is applied between the inputs unless some limiting resistance is used.
Note 3: For supply voltages less lhan ± ISV, the absolute maximum input vollage is equal to lhe supply voltage.
Note 4: These specifications apply for ±SV S; Vs S; ±20Vand -SsoC S; TA S; 12SoC, unless otherwise specified. With the LH2208A/LH2208. however, all
temperature specifications are limited to -2SoC S; TA S; 8S·C and with the LH2308A1LH2308 for ±SV S; Vs S; 15Vand O·C S; TA S; 70·C.
3-248
~------------------------------------------------------~~
01:0
....
~National
............
::J:
«:)
~ Semiconductor
....
....
o
A
LH4101/LH4101C Wideband High Current
Operational Amplifier
«:)
General Description
Features
The LH4101 is a high slew rate, FET input, wideband operational amplifier designed for applications that require an op
amp to provide up to 200 rnA peak and 100 rnA continuous
output current. This feature eliminates the need for a buffer
to provide the additional current drive not available with
most wideband op amps.
• 45 MHz bandwidth
• 10120. input impedance
• Pin strappable gain settings of 1, 2,3,4, -1, -2, -3
•
•
•
•
•
Designed for use with minimum external circuitry, the
LH4101 provides internal compensation for unity gain stability and all the gain set resistors for most popular gain settings, as well as internal supply bypass capacitors. These
features minimize the circuit's sensitivity to external layout
conditions. These features are provided in a 24 pin hermetic
dual in-line package.
Unity gain stable
Internal supply bypassing
100 rnA continuous output current
24 pin hermetic DIP
Directly drives 500. loads
The LH41 01's wide bandwidth, programmable gain settings,
and high output current make it an ideal choice for fast buffering applications such as video distribution. It is also appropriate for use in summing amplifiers, sample and hold circuits, and high speed integrators.
Block and Connection Diagrams
12
11
10
8
7
6
5
4
2
3
Dual In-Line Package
OFF5ET
V+
V-
OUTPUT
1\
24
NC
V+
V+
2
23
3
22
VV-
NC
4
21
NC
GND
5
20
GND
GND
6
19
GND
NC
7
18
OUTPUT
OFF. ADJ.
8
17
53
16
52
51
OFF. ADJ.
lk.D.
lk.D.
13
14
15
16
17
18
19
20
21
22
23
24
TLlK/8543-1
3-249
NC
10
15
NC
11
14
NC
VIN (+}
12
13
VIN (-}
TUK/8543-2
Order Number LH4101D or
LH4101CD
See NS Package Number 0240
•
o
....
I:)
.....
Absolute Maximum Ratings
~
::I:
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage, Vs
±17V
Power Dissipation, at TA = 25'C, Po
2W
Input Voltage Range, VCM
±Vs
±100mA
Steady State Output Current, 10
....I
.....
....
....
I:)
~
::I:
....I
DC Electrical Characteristics Vs =
Symbol
Parameter
Input Offset Voltage
Vos
Operating Temperature Range, TA
LH4101CD
- 25'C to + 85'C
LH4101D
-55'Cto + 125'C
- 65'C to + 150'C
Storage Temperature Range, TSTG
Maximum Junction Temperature, TJ
175'C
Lead Temperature (Soldering < 10 sec.)
300'C
ESD rating to be determined
± 15V, TMIN';; TA ,;; TMAX unless otherwise specified
Test Conditions
Min
Typ
TA = TJ = 25'C (Note 1)
VIN = OV
,
Max
Units
15
25
mV
mV
I1Vos
I1T
Average Offset
Voltage Drift
18
Input Bias Current
TA = TJ = 25'C (Note 1)
TA=TJ=Tmax
500
500
pA
nA
los
Input Offset Current
TA = TJ = 25'C (Note 1)
TA=TJ=Tmax
200
200
pA
nA
CMRR
Common Mode
Rejection Ratio
I1VIN = ±10V
PSRR
Power Supply
Rejection Ratio
I1Vs = ±10V
AVOL
Open-Loop
Voltage Gain
Vo
Output Voltage Swing
25
",V/'C
50
60
dB
50
60
dB
Vo = ± 10V, RL = 1 kO, f = 1 kHz
Vo = ±5V, RL = 500, f = 1 kHz, TA = 25'C
60
57
65
62
dB
dB
VIN = ±15V, RL = 1 kO
VIN = ±5.5V, RL = 500, TJ = 25'C (Note 2)
±10
±5
±13.5
V
V
Is
Supply Current
RL = 1 kO
25
40
mA
e-3
Gain Error Av = -3
VIN = ±1V, RL = 500, TJ = 25'C
0.8
2
%
Gain Error Av = -1
0.8
2
%
e-1
Note 1: SpecHlcatlon Is at 2S'C iunetlon temperature due to requirements of high speed automatic testing. Actual values at operating temperature will exceed the
value at TJ = 2S·C.
Note 2: The output swing Is limited by the maximum output current of ±100 mA when RL = son. When the LH4101 is operated at elevated temperature (such as
12S'C), some form of heatsinking or forced air COOling is required. The quiescent power with Vs of ±ISV is 1.2W max, whereas the package can only handle
7S0 mW without a heatsink at 12S·C.
AC Electrical Characteristics Av =
Symbol
+ 1, RL = 500, TA = 25'C unless otherwise specified
Min
Typ
200
250
V/",s
VIN = 100 mVrms
45
MHz
Settling Time to 1%
Settling Time to 0.1 %
I1VIN = 10V
140
300
ns
ns
Small Signal Rise Time
VIN = OVto +100mV
10
ns
Parameter
Conditions'
SR
Slew Rate
VIN = ±5V
f-3d8
Small Signal Bandwidth
Is
tr
3-250
Max
Units
,-----------------------------------------------------------------------------'r
:c
Applications Information
....
Gain Settings
Power Supply Bypassing
....
.....
~
Q
The LH4101 will perform well in most circuit boards even
without external supply bypassing; however, it is recommended that some bulk bypassing be provided. One 10 I£F
electrolytic on each supply is recommended. Proximity to
the device pins is not critical, but the bypass will be most
effective if located within an inch of the part.
The LH4101 provides internal gain set resistors for most
popular gain settings. A chart is provided to assist in determining the proper pins to connect to achieve these gains.
The internal gain resistors are trimmed and matched to insure the gain accuracy to 0.8% typically. The LH4101 can
operate at other gain settings, but the user must supply additional gain set resistors external to the part.
Input Capacitance
The input capacitance to the LH4101 is typically 5 pF and
for source impedances greater than 1000., the input time
constant should be considered.
Frequency Response
(Av = + 1 Closed Loop)
s
'V =i1:12V'
10
Offset Null
Frequency Response
(Open Loop)
,.........--v+
2'3~lI0k.n_
70
RL=50D. ..
EO
50
-..!!.
INPUTS{ 13
~ .co
~ !O
lU
lIN
o
10lI01
lC1<
FREQUENCY (HZ)
-1111
1111(
IU
lIN
FREQUENCY (HZ)
v-
10lI01
TLlK/8543-4
TL/K/8543-3
Gain
Pin Number
Comment
+1
Voutt051
Voutt052
18 to 15
18to 16
For all positive gains, the
Input is Vln( +), pin 12.
+2
Voutto 52
and
51 toGND
18to 16
+3
Voutt053
and
52 to Vln(-)
and
51 toGND
18 to 17
+4
Connect
OUTPUT
22,23
10
1111(
1B
LH4101
•...;.;.. -
2D
lC1<
e
+
15to 19
16to 13
15 to 19
Voutt053
and
51 toGND
18 to 17
-1
52 to Vout
16t018
-2
Vln(-) to 52
and
53 to Vout
13 to 16
-3
53toVout
17 to 18
15 to 19
17 to 18
3-251
For all negative gains,
input is 51, pin 15. Also,
Vin(+), pin 12, MU5T BE
CONNECTED TO
GROUND.
TL/K/8543-7
r
:c
~
....
....o
Q
ur---------------------------------------------------------~
....
CI
....
Typical Applications
:::E:
Unity Gain Follower
The LH4101 can be used as a unity gain follower to provide
output current to drive 500 or 750 coax cable directly. By
shorting pins 15, 16 and 18, a follower circuit is configured
as seen In Figure 1a. This configuration features a band·
~
...I
.....
....
CI
....
~
:s
width greater than 40 MHz with an input Signal of 1.0 Vp•p
and greater than 16 MHz with a 5 Vp•p input signal. This is
all achieved without any external components. Figures 1b
and1e show the small and large signal pulse responses,
respectively.
v+
2,3
INPUT -...;.::..t----I
5,6,19,20
SOll
22,23
v-
TL/K/8543-5
FIGURE 1a. Unity Gain Follower
Large Signal Pulse Response
Small Signal Pulse Response
Input
Input
Output
Output
Vs
=
TL/K/8543-9
±15V
Vs
Ay = 1
RL = son
Ay
RL
= ±15V
TL/K/8543-10
=1
= son
FIGURE 1b
FIGURE 1c
s.o
Maximum Power Dissipation
T
4.5
~
4,0
:z:
3.S
!;i
3.0
0
I
i
1
t::= KSE8~40.6/w
2.S
2.0
" 1'- I'-.
l.s
AW~;;r.
1.0
8JA=7S.~/W
o.s
o
o
f--
r--.... ......
I
25
so
7S
100 125
TEljPERATlJRE (OC)
3·252
ISO
TLlK/8543-13
Non-Inverting Amplifier
To configure the LH4101 as a non-inverting amplifier with a
gain of 4, short pins 17 to 18 and 15 to 19, as shown in
Figure 2a. Again, no external components are necessary.
This configuration provides a bandwidth of 25 MHz with an
input sine wave of 1.0 Vp_p and a bandwidth of 10 MHz with
an input of 5 Vp_p while providing 100 mA of output current.
This eliminates the need of an additional buffer in the circuit
to provide the output current to drive large loads. Figures 2b
and 2c show the small and large signal pulse responses,
respectively.
V+
son.
V-
TL/K/B543-B
FIGURE 2a. Non-Inverter with Gain of
Large Signal Pulse Response
+4
Small Signal Pulse Response
Input
Input
Output
Output
Vs
Av
RL
= ±15V
=4
= 50n
TL/K/B543-11
Vs = ±15V
Av = 4
RL = son
TL/K/B543-12
FIGURE2b
FIGURE2c
To configure the LH4101 as a differential amplifier, two additional1 kO resistors are required. Figure 3 shows this con-
figuration, where Vo = VI - V2. The gain accuracy of this
circuit is dependent upon the gain accuracy of the additional
1 kO resistors.
Differential Amplifier
V+
2,3
1k.D.
VI
Vour =Vl-V2
12
1 kD.
V2
15
lkD.
50D.
V-
FIGURE 3. Wideband Differential Amplifier
3-253
TUK/B543-6
r::z:::
....
"'CI"
....
........
5:
....
"'CI"
....
o
o
'IIiI'
;
:s......
'IIiI'
;
:s
~National
PRELIMINARY
~ Semiconductor
LH41 04/LH41 04C Fast Settling High Current
Operational Amplifier
General Description
Features
The LH4104 is a fast settling high current Bi-Fet op amp
designed for applications that require a fast settling time of
500 ns to 0.Q1 % and 100 mA continuous output current.
The high output current eliminates the need for a buffer to
provide the additional current drive not available in most
operational amplifiers. The operational amplifier also features a gain bandwidth product of 18 MHz and a slew rate of
40V/p.s.
•
•
•
•
•
Applications
•
•
•
•
•
•
Designed for use with minimum external circuitry, the
LH41 04 provides internal compensation for unity gain stability as well as internal supply bypass capacitors. These features minimize the circuit's sensitivity to external layout conditions.
Schematic Diagram
OFFSEr OFfsEr
ADJ ADJ
3(7)
GND
V.
8')
7(13)
500 ns settling time to 0.01 % for a 10V step
100 mA continuous output current
18 MHz gain bandwidth product
Internal supply bypassing
Unity gain stable
1(3)
Cable Drivers
High Speed Ramp Generators
DAC Output Amplifiers
Fast Buffers
Sample and Holds
Fast Integrators
Ve.
12(6)
+-+";,:;(5:.,) OUTPUT
10(4)
V-
Ve-
TUK18840-1
Pinout shown for metal can package (for molded package in parenthesis)
'On melal can package (G) pins # 2 and # 8 are internally connected. The case is electrically isolaled. The molded package (N) does not have ground
connections or bypass capacitors.
Connection Diagrams
16-Lead Molded Dual-In-Line Package (N)
Metal Can Package
Ne
1°
16
Ne
V.
2
15
VcOUTPUT
14
13
5
6
7
12
Ve·
OFrsrr AOJUST
-INPUT
8
9
11
10
Ne
VNe
OFFsrr AOJUST
Ne
.,NPUT
Ne
Ne
TLIK18840-2
TLIK18840-14
TOp View
Top View
Order Number LH4104CG or LH4104G
See NS Package Number H12B
Order Number LH4104CN
See NS Package Number N16A
3-254
r
::r:
~
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage, Vs
±18V
Steady State Output Current, 10
Power Dissipation (See Curves)
TA = 25"C, LH4104G, LH4104CG
LH4104CN
Tc = 25"C, LH4104G, LH4104CG
1.5W
1.56W
2.5W
-55"C to + 125"C
-25"Cto +85"C
-65"Cto +150"C
150"C
Lead Temperature (Soldering < 10 sec.)
ESD rating is to be determined.
Parameter
Typ
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
5
10
Conditions
Vas
Input Offset Voltage
Rs = 500
2
VOS/AT
Offset Voltage Drift
Rs = 500
20
IB
Input Bias Current
Tj
=
25"C, (Note 4) VCM
los
Input Offset Current
Ti
=
25"C, VCM = OV
RIN
Input Resistance
Ti
=
25"C
AVOL
Large Signal Voltage Gain
RL
=
OV
200
600
Output Voltage Swing
20
400
87
1 kO
106
87
dB (Min)
80
±10
1000 (Note 5)
V (Min)
RL=lkO
VCM
Input Common Mode Range
CMRR
Common Mode Rejection Ratio
VIN = -11Vto +11V
PSRR
Power Supply Rejection Ratio
VCC
Is
Supply Current
±10Vto ±15V
± 15V, TA
=
±13
±10
±10
±12
±11
±10
V (Min)
100
80
70
dB (Min)
100
80
70
dB (Min)
20
25
mA
25"C unless otherwise noted
LH4104C
Symbol
Parameter
Conditions
ts
Settling Time to 0.01 %
Av
SR
Slew Rate
VIN
= -1, VIN = -5Vto +5V, RL =
= -10Vto +10V, RL = 1000
GBW
Gain Bandwidth Product
tr
Small Signal Rise Time
Av
=
1000
Typ
Tested
Limit
(Note 2)
500
800
40
Design
Limit
(Note 3)
Units
(Max Unless
Otherwise
Stated)
32
V/p.s(min)
ns
18
1, RL
=
10
1000
3-255
nA
0
106
AC Electrical Characteristics VCC =
nA
pA
1011
1000
=
mV
pA
200
Va
Units
(Max Unless
Otherwise
Stated)
p'vrc
250
=
RL =
RL =
300"C
± 15V, T A = 25"C unless otherwise noted (Note 1)
LH4104C
Symbol
~
±2Vs
±18Vbut ~ ±Vs
Input Voltage Range, VCM
Operating Temperature Range, TA
LH41 04
LH4104C
Storage Temperature Range, TSTG
Maximum Junction Temperature, Tj
100mA
DC Electrical Characteristics Vs =
±30V but
Differential Input Voltage, VIN
MHz
20
ns
...o
.....
r~
...::r:o
~
~
DC Electrical Characteristics Vcc =
± 1SV, TA = 2SOC unless otherwise noted (Notes 1 and 6)
LH4104
Symbol
Parameter
Conditions
son
son
Vas
Input Offset Voltage
Rs =
Vas/AT
Offset Voltage Drift
Rs =
18
Input Bias Current
Tj = 2SoC, (Note 4) VCM = OV
los
Input Offset Current
Typ
Tested
Limit
(Note 2)
2
10
Design
Limit
(Note 3)
mV
/J-Vloc
20
TJ = 2SoC, VCM = OV
Units
{Max Unless
Otherwise
Stated)
200
20
600
pA
350
nA
400
pA
250
nA
1011
RIN
Input Resistance
Tj = 2SoC
AvaL
Large Signal Voltage Gain
RL = 1000
106
RL = 1 kO
106
0
87
87
dB (Min)
80
Va
Output Voltage Swing
±10
RL = 1000 (Note S)
RL = 1 kO
VCM
Input Common Mode Range
GMRR
Common Mode Rejection Ratio
VIN -11Vto+11V
±13
±10
±12
±10
100
80
V (Min)
V (Min)
dB (Min)
70
PSRR
Power Supply Rejection Ratio
Vee = ±10Vto ±1SV
100
80
dB (Min)
70
Is
Supply Current
20
AC Electrical Characteristics Vee =
2S
mA
±1SV, TA = 2SoC unless otherwise noted
LH4104
Symbol
Parameter
Typ
Tested
Limit
{Note 2)
800
Conditions
ts
Settling Time to 0.01 %
Av = -1, VIN = -SVto +SV, RL = 1000
SOO
SR
Slew Rate
VIN = -10Vto +10V, RL = 1000
40
GBW
Gain Bandwidth Product
18
Design
Limit
{Note 3)
Units
(MaxUnleaa
Otherwise
Stated)
ns
32
VI/J-s(min)
MHz
Small Signal Rise Time
10
20
ns
Av= 1,RL= 1000
Note 1: Boldlace limits are guaranteed over lull temperature range. Operating ambient temperature range of LH4104C is -2S"C to +8S"C, and LH4104is
- S5"C to + 12S"C.
Note 2: Tested limits are guaranteed and 100% production tested.
Note 3: Design limits are guaranteed (but not production tested).
Note 4: Specifications is at 2S'C junction temperature due to requirements of high speed automatic testing. Actual vaiues at operating temperature will exceed
value at Tl = 2S·C.
Note 5: The output Swing is IImHed by the maximum output current of ± 100 mA when RL = loon.
Note 6: When the LH4104 is operated at elevated temperture (such as 125"C), some form of heat sinking or forced air cooling is required. The quiescent power
with Vee of ± ISV is 750 mW, whereas the package can only handle 500 mW wHhout a heatsink at 12S"C.
tr
.
3-2S6
r-
::c
0Iloo
....
o
Typical Performance Characteristics
100
r-..
80
'iii'
..,~...
+90
I"
60
40
;:!
....
g
20
0
3.0
VCC=:t 15V
TA=25OC-
1'\
3
"- 1-0..
GAIN
""-
+45
0
"
PHA~E
-20
-45
~
g..,
z:
2.5
""
~
a..
CJE
III
1.5
ffi
1.0 I 8 JA lOOOC/W
0.5
~
~
a..
"," -90
J"'......
i
o
o
"
AI.4BI~
I
I
~
""
............
I
I
25
FREQUENCY (Hz)
....
50
75
~
100
125
TUK/8840-5
LH4104CN Power Dissipation
Settling Signal
2.5
1.5
'"~
..,'"
1.0
a..
0.5
e,
~
-
.... II .. · .... ....
2.0
z:
Q
-
o
o
I--
"'- ~=80OC/W
V
"
i'-.,
"'
25
50
75
150
TEMPERATURE (OC)
TL/K/8840-4
!;;:
2
n
~8 JC = 50oC/W - I -
2.0
~
8'"
e..,
::c
0Iloo
I
I
0
10 100 lK 10K lOOK 11.4 101.4 1001.4
~
~
r-
LH4104G, CG Power Dissipation
120 Open Loop Frequency Response
100
125
....
....
.. ....
150
TEMPERATURE (OC)
I
.... .... ",1 .. ·1- .. · ....
INPUT- (SCALE=5VIDIV)
K
T
SJLlNG >-SIGNAL
(SCALE=2mVIDIV)
.... .... "'T"T"~(""
1200n~/Dlv
TUK/8840-3
TL/K/8840-15
Applications Information
POWER SUPPLY BYPASSING
currents vary with temperature and input voltage range. IB
will normally double with each II'C rise in junction temperature.
The LH4104 will perform well in most circuit boards even
without external supply bypassing; however it is recommended that some bulk bypassing be provided to maintain
optimum settling time. A 0.1 fLF disc ceramic capacitor and
1 fLF tantalum capacitor on each supply is recommended.
Place the bypass capacitors close to the amplifiers supply
pins.
LAYOUT PRECAUTIONS
Grounding and circuit layout are extremely important in preserving the settling time of the LH41 04. It is important to use
single point ground returns for inputs, loads, and feedback
components and to keep the returns short. Compensation
components should be located close to the appropriate pins
to minimize stray reactances. Keep the system's digital signals (or any other signals with fast rise times) separated
from the amplifier. If such signals are too close to the amplifier, they can couple capacitively to the amplifier's inputs,
resulting in undesirable signals at the output.
COMPENSATION
To minimize the effects of input capacitance at the
LH4104's inverting input and any additional layout capacitance, an external compensation capacitor must be used.
The compensation capacitor (Cl) used in Figure 2 (Test
Circuit Section) is typically 66 pF. The optimum value for the
compensation capacitor depends on the application circuit
and the board layout.
PRESERVING AND VERIFYING THE LH4104'S FAST
SETTLING TIME
INPUT BIAS CURRENT
To realize optimum settling performance in circuits using the
LH41 04, both the deSign and layout must be meticulous.
Application note AN-428, "Preserving and Verifying the
The input devices are JFETs, and will normally have input
bias (IB) currents in the tens of picoamps. However, these
3-257
Applications Information (Continued)
mended that the negative supply be turned on first, if the
supplies can be turned on independently.
Also, even if the input stage is well protected with clamp
diodes and current limiting, the inputs should not be allowed
to be heavily unbalanced (for example, one input at ground
and the other at the rail) for extended periods of time (for
example, many hours). The long-term effects of an unbalanced differential pair are increased offset voltage and offset current.
LF400's Fast Settling Time", explains the required design
and measurement techniques. Although this application
note was written for the LF400, it suggests good guidelines
and is directly applicable to the LH4104. Only the sections
covering supply bypassing and output load limitations
should be ignored. This is because the LH4104 has internal
bypassing capacitors and substantially greater output drive
current than the LF400. The suggested circuits require only
small and straightforward modifications; even the printed
circuit board layout can be easily modified to accept the
footprint of the LH41 04 without impacting setting time.
PROTECTION SCHEMES FOR THE LH4104
The LH4104 has similar input characteristics of National
Semiconductor's BI-FETTM family of operational amplifiers.
As such, designing with this part requires that several precautions are observed which are uncharacteristic of other
op amps. Application Note AN-447 covers these caveats in
greater detail for the whole product family. (The LH4104's
input stage shares its topology with the LF400.)
NEVER LEAVE AN INPUT UNATTENDEDI
If an Input to the LH4104 Is left open circuited (or connected
to an analog multiplexer in a high impedance state), the
input bias current will be drawn from the very small parasitic
input capacitance « 10 pF). This capacitor will rapidly
charge up to the power supply rail at a rate of dv/dt =
ISIAS/CIN. Since the LH4104 is a capable of large output
currents and has no internal current limiting, it will easily be
destroyed by excessive power diSSipation if such an input
condition exists while driving a low Impedance load (e.g.
500).
To avoid this condition in circuits where the LH41 04 is buffering the FET switch of an analog multiplexer, one must
connect a resistor between the input and ground to provide
a bias current path. This will invariably degrade the effective
input impedance of the device, so a large resistor is desirable.
For example, selecting a 1 MO resistor will result in a harmless 25 mV output signal during the "deselected" state (for
the worst case bias current of 25 nA). Increasing this resistor will increase the output signal for the deseiected" state;
decreasing it will reduce this signal while degrading the input impedance. Depending on the user's circuit specifications, a compromise must be selected. This resistor will not
introduce an increase in the effective offset voltage during
the "seiected" state because the input is driven by a low
impedance source.
v-
TL/K/ee40-13
FIGURE 1. Clamping Inputs of Op Amp
Vos ADJUSTMENT
Offset voltage can be nulled using a 56K resistor and a 25K
potentiometer connected to pins 3 and 7 as shown In Figure
3. Bypassing the Vos adjust pins with 0.1 IJoF capacitors will
help to avoid noise pickup. When not used for offset adlustment, pins 3 and 7 can often be left open, but to minimize
the possibility of noise pickup the unused Vos trim pins
should be connected to ground or V - •
Test Circuit for Pulse Response
y+
INPUT
POWER SUPPLY SEQUENCING
Adding the clamp diodes shown in Figure 1 not only protects the inputs from transients when the circuit is operating,
but protects them as power is being applied to the circuit.
Because the parasitic transistor apears when the input voltage is less than the negative supply, applying the positive
suppiy or input voltage before the negative supply is applied
can cause this problem. For this reason, it is always'racom-
C,
TLlK/e840-e
FIGURE 2*
'Pinouts shown are for the metal can package (LH4104G or LH4104CG)
3-258
Typical Applications
y+
TL/K/BB40-9
y-
FIGURE 4. Using Resistor Current Limiting·
TL/K/8B40-B
FIGURE 3. Offset Null·
v+
y+
INPUT
INPUT
OUTPUT
OUTPUT
1 k,Q
9KI!.
66pF
TL/K/B840-11
TL/K/B840-10
FIGURE 6. 10X Buffer Amplifier·
FIGURE 5. Unity Gain Follower·
y+
10 k,Q
INPUT-I\M-+"'I
OUTPUT
TL/K/8B40-12
FIGURE 7. Unity Gain Inverter·
'Plnouts shown are for the metal can package (LH4104G or LH4104CG)
3·259
~National
PRELIMINARY
~ Semiconductor
LH4105/LH4105C Precision Fast Settling High
Current Operational Amplifier
General Description
Features
The LH4105 is a fast settling high current Bi-Fet op amp
deSigned for applications that require a fast settling time of
500 ns to 0.Q1 % and 100 rnA continuous output current.
The high output current eliminates the need for a buffer to
provide the additional current drive not available in most
operational amplifiers. The operational amplifier also features a gain bandwidth product of 1B MHz and a slew rate of
40Vlp.s.
Designed for use with minimum external circuitry, the
LH41 05 provides internal compensation for unity gain stability as well as internal supply bypass capacitors. These features minimize the circuit's sensitivity to external layout conditions.
•
•
•
•
•
500 P.V offset voltage
500 ns settling time to 0.01 % for a 10V step
100 rnA continuous output current
Internal supply bypassing
Unity gain stable
Applications
•
•
•
•
•
•
Cable Drivers
High Speed Ramp Generators
DAC Output Amplifiers
Fast Buffers
Sample and Holds
Fast Integrators
Schematic Diagram
• INPUT
II
OUTPUT
- INPUT
GIlD
v-
TUK/9159-1
Pins #2 & #8 are internally connected. Case i. electrically isolated. Pins 3 and 8 are used internally. do not connect to these pins
Connection Diagram
Metal Can Package
TL/K/9159-2
Top View
Note: 2 and 8 are Internally connected. Case Is electrically Isolated. Pins 3 and 8 are used internally. Do not connect to these pins.
Order Number LH4105G or LH4105CG
See NS Package Number G12B
3-260
I"'"
::I:
Absolute Maximum Ratings
Steady State Output Current, 10
Power Dissipation at, PD
TA = 25'C, derate linearly at 100'C/W
TC = 25'C, derate linearly at 50'C/W
±30V but,;; ±2Vs
±18Vbut,;; ±Vs
Differential Input Voltage, VIN
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
±18V
Supply Voltage, Vs
Input Voltage Range, VCM
Operating Temperature Range, TA
-55'Cto + 125'C
LH4105
- 25'C to + 85'C
LH4105C
-65'Cto + 150'C
Storage Temperature Range, TSTG
150'C
Maximum Junction Temperature, Tj
300'C
Lead Temperature (Soldering < 10 sec.)
100mA
2.5W
1.5W
.....
""
o
U1
.......
I"'"
::I:
.....
""
g
o
ESD rating is to be determined.
DC Electrical Characteristics Vs =
±15V, TA = 25'C unless otherwise noted (Note 1)
LH4105C
Symbol
Parameter
Typ
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
0.5
2
Conditions
Vos
Input Offset Voltage
Rs = 500
0.2
Voslt:..T
Offset Voltage Drift
Rs = 500
20
18
Input Bias Current
Tj = 25'C, (Note 4) VCM = OV
200
600
los
Input Offset Current
Tj = 25'C, VCM = OV
20
400
pA
RIN
Input Resistance
Tj = 25'C
10 11
AVOL
Large Signal Voltage Gain
RL = 1000
106
87
RL = 1 kO
106
87
RL = 1 kO
nA
0
80
±10
RL = 1000 (Note 5)
nA
pA
200
Output Voltage Swing
mV
/J-VI'C
250
Va
Units
(Max Unless
Otherwise
Stated)
dB (Min)
V (Min)
±13
±10
±10
VCM
Input Common Mode Range
±12
±11
±10
V (Min)
CMRR
Common Mode Rejection Ratio
VIN = -11Vto +11V
100
80
70
dB (Min)
PSRR
Power Supply Rejection Ratio
VCC = ±10Vto ±15V
100
80
70
dB (Min)
Is
Supply Current
20
25
AC Electrical Characteristics Vs =
mA
± 15V, TA = 25'C unless otherwise noted
LH4105C
Symbol
Parameter
Conditions
Typ
Tested
Limit
(Note 2)
800
Is
Settling Time to 0.Q1 %
Av = -1, VIN = -5Vto +5V, RL = 1000
500
SR
Slew Rate
VIN= -10Vto+10V,RL= 1000
40
GBW
Gain Bandwidth Product
t,
Small Signal Rise Time
Design
Limit
(Note 3)
ns
32
10
3-261
V//J-s(min)
MHz
18
AV = 1, RL = 1000
Units
(Max Unless
Otherwise
Stated)
20
ns
•
~
CI
.......
DC Electrical Characteristics Vs =
± 15V, TA = 25'C unless otherwise noted (Notes 1 and 6)
:::E:
LH4105
..J
.....
II)
CI
.......
Symbol
Parameter
Typ
Tested
Limit
(Note 2)
2
Conditions
:::E:
..J
Vos
Input Offset Voltage
Rs = 500
0.2
VosIl!T
Offset Voltage Drift
Rs = 500
20
Ie
Input Bias Current
Tj = 25'C, (Note 4) VCM = OV
200
Design
Limit
(Note 3)
Units
(Max Unless
Otherwise
Stated)
mV
",VI'C
600
20
pA
350
nA
400
pA
250
nA
los
Input Offset Current
Tj = 25'C, VCM = OV
RIN
Input Resistance
Tj = 25'C
1011
AVOL
Large Signal Voltage Gain
RL = 1000
106
87
RL=lkO
106
87
0
dB (Min)
80
Vo
Output Voltage Swing
±10
RL = 1000 (Note 5)
RL = 1 kO'
VCM
Input Common Mode Range
CMRR
Common Mode Rejection Ratio
VIN -l1Vto +11V
V (Min)
±13
±10
±12
±10
100
V (Min)
80
dB (Min)
70
PSRR
Power Supply Rejection Ratio
VCC = ±10Vto ±15V
100
80
dB (Min)
70
Is
Supply Current
20
AC Electrical Characteristics Vs =
25
rnA
± 15V, TA = 25'C unless otherwise noted
LH4105
Symbol
Parameter
Typ
Tested
Limit
(Note 2)
800
Conditions
Is
Settling Time to 0.01 %
Av = -1, VIN = -5Vto +5V, RL = 1000
500
SR
Slew Rate
VIN = -10Vto +10V,RL = 1000
40
GBW
Gain Bandwidth Product
18
Design
Limit
(Note 3)
Units
(Max Unless
Otherwise
Stated)
32
V/",s(min)
ns
MHz
Small Signal Rise Time
10
20
ns
Av = 1, RL = 1000
tr
Note 1: Boldfacellmlls are guaranteed Dyer lull temperature range. Operating ambient temperature range of LH4105C is -25'C to +85'C, and LH4105 is
- 55'C to + 125'C.
Note 2: Tested limlls are guaranteed and 100% production tested.
Note 3: Design IImHs are guaranteed (but not production tested). These IImHs are not used to calculate outgoing quality levels.
Note 4: Specifications is at 25'C lunction temperature due to requirements of high speed ·automatic testing. Actual values at operating temperature will exceed
value at T/ = 25'C.
Note 5: The output Swing Is IImHed by the maximum output current of ± 100 mA when RL = 1000.
Note 6: When the LH41 05 is operated at elevated temperture (such as 125'C), some form of heat sinking or forced air cooling Is required. The quiescent power
with Vee of ± 15V Is 750 mW, whereas the package can only handle 500 mW without a heatslnk at 125'C.
3·262
,-----------------------------------------------------------------------------, I
::J:
Typical Performance Characteristics
""......o
UI
Settling Signal
I
::J:
....
....
""......o
1
.... .... .. , . .... ~I····I···· . ...
-
...
UI
o
INPUT(SCALE=5V/DIV)
I--
II.
....
.......
IV
.. ... , .... ....
....
I
I'-::
~
SETtNG SIGNAL
(SCALE=2mV/DlV)
···T···j···:I·····
1200n~/Dlv
TL/K/9159-3
120 Open Loop Frequency Response
100
'iii'
3
z
:;;:
'"
.....
'"~
0
>
80
60
40
20
0
~
"
'\. .....
'iii'
+90
I"
GAIN
"-
+45
O
"-
"-
PHASE
!
E
.....
'"
S
e.....
z
10 100
lK
I
I'...
"-
20
~
D-
1.5
CAJE
'"9JC = 50"C/W - f - -
.............
iii
...:x:
Vl
Ci
'".....;.
D-
0
-90
D-
I
-20
I
2.5
0
Vl
-45
,~
Maximum Power Dissipation
3.0
VCC=:l:15V
TA=25"C-
9 JA il000C/W
'""-I'...
~
0.5
o
FREQUENCY (Hz)
AMBI~
1.0 -
o
10K lOOK 1M 10M 100M
"-
~
I
25
50
75
100
125
150
TEMPERATURE (OC)
TL/K/9159-4
TLlK/9159-5
3-263
o
Lt)
....oo:r
C)
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.....
Lt)
C)
....
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::J:
-I
Applications Information
POWER SUPPLY BYPASSING
NEVER LEAVE AN INPUT UNATTENDED
The LH4105 will perform well in most circuit boards even
without external supply bypassing; however it is recommended that some bulk bypassing be provided to maintain
optimum settling time. A 0.1 p.F disc ceramic capacitor and
1 p.F tantalum capacitor on each supply is recommended.
Place the bypass capacitors close to the amplifiers supply
pins.
If an input to the LH41 05 is left open circuited (or connected
to an analog multiplexer in a high impedance state), the
input bias current will be drawn from the very small parasitic
input capacitance «10 pF). This capacitor will rapidly
charge up to the power supply rail at a rate of dv/dt =
IBIAS/CIN. Since the LH4105 is capable of large output currents and has no internal current limiting, it will easily be
destroyed by excessive power dissipation if such an input
condition exists while driving a low impedance load (e.g.
50n).
COMPENSATION
To minimize the effects .of input capacitance at the
LH4105's inverting input and any additional layout capacitance, an external compensation capacitor must be used.
The compensation capacitor (C1) used in Figure 2 (Test
Circuit Section) is typically 66 pF. The optimum value for the
compensation capacitor depends on the application circuit
and the board layout.
To avoid this condition in circuits where the LH4105 is buffering the FET switch of an analog multiplexer, one must
connect a resistor between the input and ground to provide
a bias current path. This will invariably degrade the effective
input impedance of the device, so a large resistor is desirable.
INPUT BIAS CURRENT
For example, selecting a 1 MO resistor will result in a harmless 25 mV output Signal during the "deselected" state (for
the worst case bias current of 25 nA). Increasing this resistor will increase the output signal for the deselected state;
decreasing it will reduce this signal while degrading the input impedance. Depending on the user's circuit specifications, a compromise must be selected. This resistor will not
introduce an increase in the effective offset voltage during
the "selected" state because the input is driven by a low
impedance source.
The input devices are JFETs, and will normally have input
bias (IB) currents in the tens of picoamps. However, these
currents vary with temperature and input voltage range. IB
will normally double with each 11 'C rise in junction temperature.
LAYOUT PRECAUTIONS
Grounding and circuit layout are extremely important in preserving the settling time of the LH41 05. It is important to use
single pOint ground returns for inputs, loads, and feedback
components and to keep the returns short. Compensation
components should be located close to the appropriate pins
to minimize stray reactances. Keep the system's digital signals (or any other signals with fast rise times) separated
from the amplifier. If such signals are too close to the amplifier, they can couple capacitively to the amplifier's inputs,
resulting in undesirable signals at the output.
POWER SUPPLY SEQUENCING
Adding the clamp diodes shown in Figure 1 not only protects the inputs from transients when the circuit is operating,
but protects them as power is being applied to the circuit.
Because the parasitic transistor appears when the input
voltage is less than the negative supply, applying the positive supply or input voltage before the negative supply is
applied can damage the device. For this reason, it is always
recommended that the negative supply be turned on first, if
the supplies can be turned on independently.
PRESERVING AND VERIFYING THE LH4104'S FAST
SETTLING TIME
To realize optimum settling performance in circuits using the
LH4105, both the design and layout must be meticulous.
Application note AN-428, "Preserving and Verifying the
LF400's Fast Settling Time", explains the required design
and measurement techniques. Although this application
note was written for the LF400, it suggests good guidelines
and is directly applicable to the LH4105. Only the sections
covering supply bypassing and output load limitations
should be ignored. This is because the LH4105 has internal
bypassing capacitors and substantially greater output drive
current than the LF400. The suggested circuits require only
small and straightforward modifications; even the printed
circuit board layout can be easily modified to accept the
footprint of the LH4105 without impacting settling time. In
addition, bypassing offset adjust pins 3 and 7 with 0.1 p.F
capacitors will minimize noise pickup and preserve the settling time.
Also, even if the input stage is well protected with clamp
diodes and current limiting, the inputs should not be allowed
to be heavily unbalanced (for example, one input at ground
and the other at the rail) for extended periods of time (for
example, many hours). The long-term effects of an unbalanced differential pair are increased offset voltage and offset current.
~I
PROTECTION SCHEMES FOR THE LH4104
The LH4105 has similar input characteristics of National
Semiconductor's BI-FETTM family of operational amplifiers.
As such, designing with this part requires that several precautions are observed which are uncharacteristic of other
op amps. Application Note AN-447 covers these caveats in
greater detail for the whole product family. (The LH4105's
input stage shares its topology with the LF400.)
yTUK/9159-6
FIGURE 1. Clamping Inputs of Op Amp
3-264
r::z::
....o
Test Circuit for Pulse Response
01:00
U1
.......
r::z::
....
v+
01:00
o
U1
o
INPUT
TL/K/9159-7
FIGURE 2
Typical Applications
v+
INPUT
66 pF
TL/K/9159-8
TL/K/9159-9
FIGURE 3. Using Resistor Current Limiting
FIGURE 4. Unity Gain Follower
v+
10k.D.
INPUT
INPUT-'\""".....'"
10k.D.
OUTPUT
lk.D.
9K.D.
TL/K/9159-11
FIGURE 6. Unity Gain Inverter
TLiK/9159-10
FIGURE 5. 10X Buffer Amplifier
3·265
~
;
:srg
~National
:s;
LH4106/LH4106C +5V High Speed Operational Amplifier
~ Semiconductor
General Description
Features
The LH4106 is a wideband op amp designed to operate with
± 5V power supplies. It features a 30 MHz bandwidth and
can drive 50 or 750 loads directly at slew rates in excess of
170 V/JJ-s.
It is intended to fulfill a wide range of applications; such as,
precision cable drivers, buffers in high speed data acquisition systems, and high speed peak detectors.
•
•
•
•
•
•
Operates from Vs of ± 5V
Unity gain stable
Very high slew rate-170 V/JJ-s
Wide small signal bandwidth-32 MHz
Low supply current-16 rnA
Drives 50 or 750 directly
Applications
•
•
•
•
•
Flash AID input buffers
Video amplifier
High speed summing amplifiers
Pulse amplifiers
Precision cable drivers
Block Diagram
Output
TL/K/9317-10
Connection Diagrams
LH4106CN
Vos
-INPUT
NC
+INPUT
+VSl
NC
Vas
-VSl
-VS2
Ne
Ne
Ne
12
11
7
10
8
9
+VS2
Ne
Ne
OUTPUT
. -INPUT
TL/K/9317-1
TL/K/9317-13
Order Number LH4106CN
See NS Package Number N16A
Top View
TO-5 Metal Can Package (H)
Order Number LH4106CH or LH4106H
See NS Package Number H10F
3-266
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating Temperature Range, TA
LH4106
LH4106C
Supply Voltage, Vs
±7.5V
Storage Temperature Range, TSTG
Steady State Output Current, 10
Power Dissipation, PD.
(See Curve)
40mA
Maximum Junction Temperature. TJ
Lead Temperature (Soldering < 10 sec.)
Differential Input Voltage, VIN
Input Voltage Range, VCM
600mW
- 55'C to + 125'C
- 25'C to + 85'C
ESDRating
(100 pF in series with 1500 ohms)
±Vs
(V+ - 0.7V) to (V- - 7V)
-65'C to + 150'C
150'C
300'C
±700V
DC Electrical Characteristics
Vs
=
±5V. TA
=
25·C. Rs
=
500, RL
=
1000 unless otherwise noted (Note 1)
LH4106C
Parameter
Symbol
Conditions
=
Typ
Tested
Limit
(Note 2)
5
15
Design
Limit
(Note 3)
Units
(Max Unless
Otherwise
Stated)
Vos
Input Offset Voltage
VOS/AT
Offset Voltage Drift
Is
Input Bias Current
(Note 4)
2
6
p.A
los
Input Offset Current
(Note 4)
150
1200
nA
CIN
Input Capacitance
Av
=
1.5
pF
325
kO
VIN
OV
mV
10
RIN
Input Resistance
AVOL
Large Signal Voltage Gain
RL
Vo
Output Voltage Swing
RL
=
=
+ 1 @ 10 MHz
1 kO, VOUT "" ±2V
I +Vo
I -Yo
1000
VCM
Input Common Mode Range
SeeCMRR
CMRR
Common Mode Rejection Ratio
VIN = -3V
RL = 1 kO
PSRR
Power Supply Rejection Ratio
Is
Supply Current
p.VI'C
65
60
+3
+2
-2.6
-2
dB (Min)
V (Min)
+Vs - 1.5
-Vs + 2.0
V (Min)
90
70
db (Min)
VOC = ±3Vto ±6V,
RL = 1 kO
80
70
dB (Min)
No Load
16
20.
mA
s:
VCM
s:
+ 3.5V
DC Electrical Characteristics
Vs
=
±5V. TA
=
25'C, Rs
=
500, RL
=
1000 unless otherwise noted (Note 1)
LH4106
Symbol
Parameter
Vas
Input Offset Voltage
Vas/AT
Offset Voltage Drift
Is
Input Bias Current
Conditions
VIN
=
OV
Typ
Tested
Limit
(Note 2)
5
20
Design
Limit
(Note 3)
Units
(Max Unless
Otherwise
Stated)
mV
p.V/·C
10
(Note 4)
2
8
p.A
1500
nA
los
Input Offset Current
(Note 4)
150
CIN
Input Capacitance
Av
=
1.5
pF
RIN
Input Resistance
325
kO
AVOL
Large Signal Voltage Gain
RL
=
+1 @10MHz
1 kO, VOUT "" ±2V
3·267
65
60
dB (Min)
DC Electrical Characteristics
Vs = ±SV, TA = 2S0C, Rs = son, RL = 100.0 unless otherwise noted (Note 1) (Continued)
LH4106
Symbol
Vo
Parameter
Output Voltage Swing
Conditions
I +Vo
I -Vo
RL = 100.0
Typ
Tested
Limit
(Note 2)
+3
+2
-2
-2.6
VCM
Input Common Mode Range
SeeCMRR
CMRR
Common Mode Rejection Ratio
VIN = -3V:S; VCM :s; + 3.SV
RL = 1 kn
90
70
PSRR
Power Supply Rejection Ratio
VOC = ±3Vto ±6V,
RL=1kn
80
70
Is
Supply Current
No Load
16
20
AC Electrical Characteristics Vs =
Design
Limit
(Note 3)
V (Min)
+Vs - 1.S
-Vs + 2.0
db (Min)
mA
±sv, TA = 25°C, Rs = RL = son unless otherwise noted (Note 1)
LH4106/LH4106C
Symbol
Parameter
Units
(Max Unless
Otherwise
Ststed)
Conditions
Typ
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
(Max Unless
Otherwise
Stated)
ts
Settling Time to 0.1 %
SR
Slew Rate
Vo = ±2V
170
tr
Small Signal Rise Time
Av = 1, Vo = ±0.1V
11
ns
7
MHz
120
ns
120
V/p.s (Min)
Power Bandwidth
(Note 6)
Differential Gain
NTSC,Av = +4
<0.1
%
Differential Phase
NTSC,Av = +4
0.1
degrees
34
MHz
GBWP
60
degrees
Input Noise Voltage
f = 10kHz
15
nV/,JHz
Input Noise Current
f=10kHz
1.5
pa/,JHz
Phase Margin
SSBW
Small Signal Bandwidth
(Note 7)
MHz
32
Nole 1: Boldface lim"s are guaranteed over full temperature range. Operating ambient temperature range of LH410SC is - 2S'C to + as'c. and LH4106 is - SS'C
to + 12S'C.
Nole 2: Tested limHs are guaranteed and 100% production tested.
Nole 3: DeSign limits are guaranteed (but not production tested) over the Indicated temperature or temperature range. These IimHs are not used to calculate
outgoing quality level.
Note 4: Specification is at 25"C junction temperature due to requirements of high speed automa~ic testing. Actual values at operating temperature may exceed
value at TI = 25'C.
Nota 5: When the LH4106 is operated at elevated temperature (such as 125'), some form of heatsinklng or forced air cooling Is required. The quiescant powerwHh
Vs = ±5V is 160 mW, whereas, the package is only rated to 170 mW without a heatsink at 125"C.
Nota 6: Power bandwidth is calculated from slew rate measurement using BW = Slew Rate/271'V Peak.
NDta 7: Calculated from t, using SSBW = 0.3S/fr.
3·268
r-
..."'o"
::J:
Typical Performance Characteristics
Small Signal Pulse Response
CD
......
r-
Large Signal Pulse Response
..."'o"
::J:
CD
TOP=INPUT
o
TOP= INPUT
BonOM = OUTPUT
Rs=Rl =50n
BonOM = OUTPUT
RS=Rl =50n
TLlK/9317-3
TLlK/9317-4
Typical Applications
Maximum Power Dissipation
Bode Plot LH4106
600
3:
.5.
:z
25
'\tWBIENT\ 8 JC=
fREE
SOO
D-
iii
~
...""
~
D-
8JA =
300
200
~
20
I~RHITE
'i\
t6O"C/W\
\
1\
15
HEAT
SINK
400
Q
<
tl0"C/W
~
~
...
Q
100
10
"- r-...
5
E;
0
:z
~
-5
""
-10
-15
-20
o
o
-25
25
50
75
100
125
1
ISO
TEMPERATURE (OC)
0
-45
10
...
S
-90
-135
-180
-225
100
e...
VI
<
::t:
D-
FREQUENCY (MHz)
TL/K/9317-5
TL/K/9317-6
•
3-269
oCD
....-=r
CI
Typical Applications (Continued)
v-
:::E:
-I
8....
-=r
:5
OUTPUT
INPUT
OUTPUT
1004
TLIKI9317-B
TLIKI9917-7
FIGURE 2. 10X Buffer Amplifier
FIGURE 1. Unity Gain Fo"ower with Offset Adjust
lK
INPUT 1
lK
INPUT -'IIV'v-.....
OUTPUT
INPUT 2
1 k.o.
TLIKI9317-9
R Is selected for Gain.
CONTROL
FIGURE 3. Unity Gain Inverter
TLIK19317-15
FIGURE 4. Switched Video Amplifier
AC Test Circuit
Circuit Schematic
@
TUKl9317-2
-VS2
®
TL/K/9317-14
Pin numbers In circle denote pin connections for the dual-in-line package.
3-270
r-----------------------------------------------------------------------~
~National
PRELIMINARY
~ Semiconductor
r
:J:
........
....
....r
:J:
........
?J
~
~
LH4117/LH4117C Precision RF Amplifier
General Description
The LH4117 is a FET-input wideband amplifier optimized for
high speed, low gain applications. It is an ideal alternative to
low precision open loop buffers and conventional operational amplifiers. It features a closed loop -3 dB unity gain
bandwidth in excess of 150 MHz. Unlike conventional opamps, the bandwidth is relatively independent of closed
loop gain between 1 and 20. A high current output stage is
also incorporated, allowing the LH4117 to drive 500 terminated lines directly. It is an ideal choice for video distribution, flash converter input buffering and ATE pin drivers.
•
•
•
•
3.3 ns rise and fall times
Output current to 200 mA
FET-input, low bias current
2500 V/ /J-S slew rate
(1000 load)
• ± 0.3 dB gain flatness
(Av = 20)
Applications
•
•
•
•
Features
• 150 MHz bandwidth
• 9 ns settling time to 0.2%
Unity gain buffers
Low gain op amp
High speed peak detectors
Video amplifier
LH4117 Simplified Schematic
6
-IN 05_ _-+_--1H
> ......-+_109 OUTPUT
6
9
-vs
TL/K/934B-1
3-271
•
~
....
....'OIl'
:::I:
...I
......
.........
....'OIl'
3
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage Range, (VCM)
±Vs
Supply Voltage, (Vs)
±18V
Operating Temperature Range, (TAl
LH4117CD
LH4117D
Power Dissipation, (Po) See Graph
2.0W
Storage Temperature Range, (TSTG)
- 25°C to + 85°C
- 25°C to + 125°C
-65°C to
+ 150°C
Maximum Junction Temperature, (Tj)
175°C
Lead Temperature (Soldering, <10 sec.)
300°C
DC Electrical Characteristics
Vs
=
±15V, Rs
=
500., RL
= loon, TA =
25°C unless otherwise noted. (Note I)
LH4117D
Symbol
Parameter
Conditions
Typical
VIN = OV, TA =
TJ = 25°C (Note 4)
Input Offset Voltage
Vos
=
15
AVos/AT
Offset Voltage Drift
VIN
OV
100
18
Non-Inverting Input
Bias Current
TA = TJ = 25°C
Pin 4 (Note 4)
0.2
=
Output Voltage Swing
RL
PSRR
Power Supply
Rejection Ratio
AVs = ±10V
to ±15V
70
10
Peak Output Current
TA = TJ
(Note5)
200
Is
Supply Current
TA
Po
Quiescent Power Dissipation
(Note5) .
1000.
25°C
= Tj =
25°C
Design
Limit
(Note 3)
20
rnV
25
JJ.V/oC
2
nA
5
±11
Vo
=
Tested
Limit
(Note 2)
Units
(Max
Unless
Otherwise
Noted)
V (Min)
60
dB (Min)
50
rnA
45
mA
1.35
W
LH4117CD
DC Electrical Characteristics
Vs
=
±15V, Rs
Symbol
=
500., RL
= loon,
TA
=
25°C unless otherwise noted. (Note I)
Parameter
Typical
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
(Max
Unless
Otherwise
Noted)
15
20
25
rnV
Conditions
VIN = OV,
T A = Tj = 25°C (Note 4)
Vos
Input Offset Voltage
AVos/AT
Offset Voltage Drift
18
Non-Inverting Input
Bias Current
TA = Tj = 25°C
Pin 4 (Note 4)
Vo
Output Voltage Swing
RL
PSRR
Power Supply
Rejection Ratio
AVs = ±10V
to ±15V
70
10
Peak Output Current
TA = TJ
(Note 5)
200
Is
Supply Current
Po
Quiescent Power
Dissipation
JJ.VloC
100
=
0.2
1000.
=
25°C
(Note5)
3-272
2
5
nA
±11
±11
V (Min)
50
dB (Min)
rnA
45
mA
1.35
W
AC Electrical Characteristics
Vs =
±15V, Rs = 500, RL = 1000, TA = 25'C unless otherwise noted. (Note 1)
LH4117D/LH4117CD
Units
Tested
Design
Unless
Limit
Limit
Otherwise
(Note 2)
(Note 3)
Noted)
(Max
Symbol
Parameter
Conditions
Typical
tr
Small Signal Rise Time
Vo=5V,Av= +20
3
10%-90%
ns
ts
Settling Time to 0.2%
Vo = 10V
f-3 dB
Small Signal Bandwidth
Vo = 4 vpp, Av = 20
150
100
MHz (Min)
L3dB
Large Signal Bandwidth
Vo = 20Vpp,Av = 20
70
40
MHz
-1 dB Gain Compression
Yo, f = 50 MHz, Av = +20
20
Vpp
SR
Slew Rate
VIN = ±1V,Av = +20
2500
Vo = 10%-90%, Vo = ±4V
6000
V/p.s
V/p.s
-50
dB
Harmonic Distortion
9
Second Order,
Vo = 4 Vpp, 20 MHz
Gain Flatness
VIN = 100 mVpp, Av = +20
ns
±0.3
f = DC to 50 MHz
f = DC to 70 MHz
dB
±0.9
Differential Gain
(Note 6)
0.01
dB
Differential Phase
(Note 6)
0.01
deg
Note I: Boldface lim"s are guaranteed over full temperature range. Operating ambient temperature range of LH4117C is - 2S'C to + 8S'C. and LH4117 is - SS'C
to +12S'C.
Note 2: Tested limits are guaranteed and 100% production tested.
Note 3: Design limits are guaranteed (but not production tested) over the indicated temperature or temperature range. These limits are not used to calculate
outgoing quality level.
Note 4: Specifications Is at 2S'C iunction temperature due to requirements of high speed automatic testing. Actual values at operating temperature will exceed
value at Ti = 25'C.
Note 5: When the LH4117 is operated at elevated temporature (such as 12S'C). some form of heat sinking of forced air cooling Is required. The quiescent power
with Vs = ±15V is 1.2W. whereas the package can only handle 660 mW without a heatsink at12S'C.
Note 6: Differential gain and phase were measured at video leveis (0 mV-7S0 mV) between IS.7 kHz and 3.S8 MHz. The actual values are smaller than 0,01 dB
and 0.01 deg, but could not be accurately measured with existing equipment.
Connection Diagram
NC....!.
!!..NC
GND....!.
3
VS+4
+INPUT
-INPUT
5
6
NORMALLl7'
SHORTED __
I G>t
~NC
~NC
FLNC
20
~vs+
19 OUTPUT
. / ~VS-
NC..!
VS-"!
10
GNDNC...!.!.
NC..1!.
~NC
~NC
~NC
~NC
t2!-NC
LH4117
TL/K/934B-2
Order Number LH4117D or LH4117CD
See NS Package Number D24J
3-273
AC Test Circuit
3K
RG
TUK/9348-3
The 22n resistors In the supply line are for limiting the short circuit current.
For a gain of 20 select RG = 52n.
Slew rate measurement is done with RG = 56n, ---I
Ill-o--'lIII'v--0
.....
01:>0
.....
~ Semiconductor
o
lH4141C
0.2 Amp Power Operational Amplifier
General Description
Features
The LH4141 C is a general purpose operational amplifier capable of delivering large output currents not usually associated with conventionallC Op Amps. The LH4141C delivers
currents of 200 mA at voltage levels closely approaching
the available power supplies. In addition, both the inputs
and outputs are protected against overload. The devices
are compensated with a single external capacitor and are
free of any unusual oscillation or latch-up problems.
•
•
•
•
•
The LH4141 C is particularly suited for applications such as
torque driver for inertial guidance systems, diddle yoke driver for alpha-numeric CRT displays, cable drivers, and programmable power supplies for automatic test equipment.
Output current
Output voltage swing
Wide full power bandwidth
Low standby power
Low input offset voltage
and current
• High slew rate
• High open loop gain
0.2 Amp
±14V into 100n
15 kHz
100 mW at ±15V
1 mV and 20 nA
3.0V/I',s
100 dB
Applications
•
•
•
•
Yoke driver
Programmable power supplies
Cable driver
Servo amplifier
Schematic and Connection Diagrams
IN (-)....:.t---,
IN(+)
COMP
C(EXT) 3000 pF
OFFSET NULL 3
OUT
V_
IscNC
v.
7
NC 8
TL/K/10009-2
Order Number LH4141CN
See NS Package Number N16A
V-"',
GND
'-.JIN-'
,'I
sc-
Rsc·
TL/K/10009-1
·RSC is an external short circuit current limiting resistor.
3-291
•
o
.,...
•.,...
:s•
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
Peak Output Current (Note 2)
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Output Short Circuit Duration
(Note 3)
Supply Voltage
Power Dissipation
Differential Input Voltage
Input Voltage (Note 1)
Operating Temperature Range
±18V
See Curves
±30V
±15V
0.5 Amp
Continuous
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
- 25°C to + 85°C
-65°C to +150°C
300°C
DC Electrical Characteristics (Notes 4 & 5)
Parameter
Limits
Conditions
Min
Input Offset Voltage
Rs';;; 1000., TA = 25°C
Rs';;; 1000.
Voltage Drift with Temperature
Rs';;; 1000.
Max
3.0
6.0
7.5
5
. Offset Voltage Drift with Time
: /LVlWeek
/LV/W
15
Offset Voltage Adjustment Range
mV
20
TA = 25°C
Offset Current Drift with Temperature
Offset Current Drift with Time
mV
mV
/Lvrc
.5
Offset Voltage Change with Output Power
Input Offset Current
Units
Typ
50
200
500
nA
nA
0.2
1.0
nAloC
nAlWeek
2
Input Bias Current
TA = 25°C
200
Input Resistance
TA = 25°C
0.3
1.0
3
pF
Common Mode Rejection Ratio
Rs';;; 1000., t.VCM = ±10V
70
90
dB
Input Voltage Range
Vs = ±15V
Power Supply Rejection Ratio
Rs';;; 1000., t.Vs = ± 10V
70
90
dB
Voltage Gain
Vs =
RL =
Vs=
RL =
100
200
VlmV
Input Capacitance
500
1.0
Mn
±12
±15V, Vo = ±10V
1 kn, TA = 25°C
±15V,Vo= ±10V
1000.
V
20
V/mV
Output Voltage Swing
Vs = ±15V, RL = 1000.
Output Short Circuit Current
Vs = ±15V, TA = 25°C
(Note 6)
200
Power Supply Current
Vs = ±15V, VOUT = OV
3.0
4.0
mA
Power Consumption
Vs = ±15V, VOUT = OV
90
120
mW
3·292
±13.0
nA
/LA
±14.0
V
300
rnA
AC Electrical Characteristics (Note 7), T A = 2SoC, Vs =
Parameter
±1SV,Cc
=
Limits
Conditions
Slew Rate
Av
=
+1, RL
Power Bandwidth
RL
=
1000
=
3000pF
1000
Min
Typ
1.0
3.0
Units
Max
V/p.s
20
kHz
Small Signal Transient Response
0.3
1.S
p.s
Small Signal Overshoot
10
30
%
Settling Time (0.1
%)
AVIN
=
10V,Av
=
+1
Overload Recovery Time
=
Harmonic Distortion
f
Input Noise Voltage
RS
Input Noise Current
B.W.
1 kHz, Po
=
=
SOO, B.W.
=
O.SW
=
10 Hz to 10 kHz
10Hzt010kHz
Note 1: Rating applies for supply voltages above ± lSV. For supplies less than
±l~V.
4
p.s
3
p.s
0.2
%
S
p.V(rms)
O.OS
nA(rms)
rating is equal to supply voltage.
Note 2: Rating applies for Rsc = on.
Note 3: Rating applies as long as package power dissipation rating is not exceeded.
Note 4:
Spec~ications
apply for ± SV
s:
Vs
s:
± 1BV, and - 2S'C
s: To s: + B5'C unless olherwise specified. Typical values are for 2S'C only.
Note S: LH4141C is 100% production tested at 2S'C only. specifications at temperature extremes are verified by sample lesllng but these limits are nol used to
calculate outgoing quality fevel.
Nole 6: Rallng applies for Rso
= 3.3n.
Note 7: Noll 00% production lasled; verified by sample tesling only. Umits are nol used to calculale oulgoing quality level.
•
3·293
u.--------------------------------------------------------------------,
....'III'
Typical Performance Characteristics
....
'III'
Open Loop Frequency
~
Package Power Dissipation
..I
S
14
l!I
12
!5!
S
10
~
r---,
Rt.=Ik4
>.::
j!!
"
~
o
25
50
75
!':~
()
~
A
8
~~
6
100 125 150
VS=tI5V
120 1--1-+--+-1- Cc = 3000 pF
~Rt.=Ik4
TA=25OC
W
I"":::
,~
'=Y'I04
4
6
W
8
~
20
~
Large Signal Frequency
Response
Voltage Follower Pulse
Response
12
111111 VS=tI5V
14
10 100 lk 10k lOOk 111
FREQUENCY (Hz)
1
No Load Supply Current
~r-~~--.--r--r-~
"C=.>UUup
VS=t15V
: \ "L=lOIlll
Cc=3000p
1IIIITA=25OC
1!L;;'10011
\
rr-
10
I--I-+-+-+--Po".-+--I
20
~
U
SUPPLY VOLTAGE (tV)
12
!5! ~I--I-+--+-+~I--I-,
l - f-
1EIIPERATURE(OC)
16
4L=10~
~1-f-+--r~~I-+-,
O~~~~~~~~~
2
o
IA
Rsc=1l4i
16
'J.=8O"CjW "
Response
Output Voltage Swing
18
OUTPUT
I PUT
~
~
-a
o
-12
10k
lk
o
111
lOOk
FREQUENCY (Hz)
Short Circuit Current vs
Temperature
...... ........1
225
1 200
i
~
~
i
ili
Rsc=5.311
150
.........
1
125
i"""'- N.
100
Rsc=6.211
75
50
1
25
1
......
......
~
~
!5!
o
~~
100
i-"""
~
90
10
20
15
SUPPLY VOLTAGE (tV)
I
e~ ,
i
./
12
I ' II1AS
...... 100..0FfSE\' I'
8
-
-75 -50 -25 0 25 50 75 100 125
CASE TEMPERATURE (OC)
L
~
-
5
~
20
~
I
10
15
SUPPLY VOLTAGE (tV)
1
IIr'5
e~
I
4
o
TA =85OC
Input Nolae Voltage
~
,
18
1 TA=25OC
10
5
Input Voltage Range
-
J250C ;;;;;;
1
15
SUPPLY VOLTAGE (tV)
80
5
~
.,....
~
~
TA
110
TA=85OC
20
o
!
T)SOC I--
VS=tI5V
~
1
I
100
Input Current
"
Voltage Gain
TA=-25OC
...-
Ii32DO
-50 -25 0 25 50 75 100 125
CASE TEMPERATURE (OC)
,
20
120
1
~300
.....
10
15
SUPPLY VOLTAGE (tV)
Input Bias Current
Vs=t15V
I~
~175
-
5 10 15 20 25 30 35
nilE (PO)
20
;I
llT'"
10
100
lk
10k
FREQUENCY (Hz)
lOOk
TL/KI100Q9-3
3·294
r-----------------------------------------------------------------------------,
Typical Performance Characteristics
~
~
a
~
(Continued)
Input Noise Current
24
10-
Distortion vs Frequency
~
4.0
II 111111
Vs=:tl,~~
:z
I ~II§IIIIIII
0
2.0
'"ea:
25
I
!!!
Q
... 10-
~
:::E
3.0 I-Ay=10
Cc = 3000 pF
g
a:
1.0
RL = 1004
II
o
10-26 L.....J...LJJ.uw......LJ..WII1'-.J..J..JJ.1l111.....J...U.lllW
10
100
lk
10k
lOOk
100
10k
lk
FREQUENCY (Hz)
II
lOOk
FREQUENCY (Hz)
TLlK/10009-4
Typical Applications
Dual Tracking One Amp Power Supply
+16 TO +36VO-,~_O-15V
VOUT2 =-VOUT
R3=R4
R4
15k
1%
-16 TO -36V
TLlK/10009-5
Two Way Intercom
+15V
.--------- ------------.
I
I
I
I
I
I
lI r-r----9
I
I
I
I
I
I
I
I
I
>:..:..........,:
I
I
-15V
lOOk
STATiON
47.0.
2
20nF
TLlK/10009-B
3-295
r
......""
""
o
:::I:
o....
....
"'II'
r---------------------------------------------------------------------~
Typical Applications (Continued)
"'II'
:::E:
..J
Programmable High Current Source/Sink
Power Comparator
R2
+15V
lk
10k
INPUT 0-.1\1\,..,..",
•
•
-15V
*Type 327 Lamp
TL/K/l0009-7
TL/K/l0009-B
Unity Gain Circuit with Short Circuit Limiting
Offset Voltage Null Circuit·
R2
Rl
INPUT o-W1r-<1-'t
OUTPUT
>~--oOUTPUT
INPUT
vTLlK/l0009-9
TL/K110009-10
3·296
r-
Typical Applications
::r:
oIloo
.....
oIloo
.....
(Continued)
o
Operation from Single Supplies
10V:SV+:S36V
lV:SVOUT :Sv+-1V
TL/K/l0009-ll
V-+1V:SVOUT :S-1V
TL/K/l0009-l2
Operation from Non·Symmetrlcal Supplies
•
TL/K/l0009-l4
TLlK/l0009-l3
'For addillonal o!fsal null circuit techniques see National Linear Applications Handbook.
3·297
o
....
....
CI)
"II'
:t:
..J
......
....
....
"II'
~National
PRELIMINARY
~ Semiconductor
CD
:t:
..J
......
OUTPUT
v-....;.+-......
N/c
TL/K/9767-2
Top View
Order Number LH4161AJ, LH4161J or LH4161CJ
See NS Package Number J08A
vTLlK/9767-1
Top View
Order Number LH4161AH, LH4161H or LH4161CH
See NS Package Number H10F
3-298
r-
::t:
Absolute Maximum Ratings
.Q.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
SupplyVoltage(V+ -V-)
36V
Lead Temperature (Soldering. 10 sec.)
260'C
Storage Temperature Range
-65'Cto +150'C
Operating Temperature Range (Note 2)
LH4161A1LH4161
-55'C to + 125'C
LH4161C
-25'Cto +85'C
Max. Junction Temperature
150'C
ESD Tolerance (Notes 8 and 9)
±700V
Operating Supply Voltage Range
4.75Vt032V
±8V
Differential Input Voltage (Note 8)
(V+ - 0.7V) to (V- - 7V)
CMVoltage
Output Short Circuit to GND
(Note 1)
Continuous
DC Electrical Characteristics
Conditions
Input Offset Voltage
Typ
0.5
Input Offset Voltage
Average Drift
Input Offset Current
Input Offset Current
Average Drift
1
3
2
5
4
6
",A
Max
150
350
800
350
800
1500
1900
nA
Max
0.4
nAI'C
k!1
1.5
Large Signal
Voltage Gain
Vour= ±10V,RL=2k!1
(Note 11)
Supply = +5V
(Note 6)
Common-Mode
Rejection Ratio
-10V:s; VCM:S; +10V
Power Supply
Rejection Ratio
±10V:s;V±:S; ±16V
Output Voltage
Swing
Supply = ± 15V
andRL=2k!1
Supply = +5V
and RL = 2 k!1
(Note 6)
Source
Sink
",VI'C
6
325
RL= 10k!1
mV
Max
5
Differential
Input Common-Mode Supply = ± 15V
Voltage Range
Units
3
6
Av= +1@10MHz
Supply Current
Tested Design Tested Design Tested Design
Limit
Limit
Limit
Limit
Limit
Limit
(Note 4) (Note 5) (Note 4) (Note 5) (Note 4) (Note 5)
3
6
Input Capacitance
pF
550
300
550
300
+14.0
+13.9
+13.8
+13.9
+13.8
+13.8
+ 13.7
V
Min
-13.2
-12.9
-12.7
-12.9
-12.7
-12.8
-12.7
V
Min
4.0
3.9
3.8
3.9
3.8
3.8
3.7
V
Min
1.8
2.0
2.2
2.0
2.2
2.1
2.2
V
Max
94
80
74
80
74
72
70
dB
Min
90
80
74
80
74
72
70
dB
Min
+14.2
+13.5
+ 13.3
+13.5
+13.3
+13.4
+13.3
V
Min
-13.4
-13.0
-12.7
-13.0
-12.7
-12.9
-12.8
V
Min
4.2
3.5
3.3
3.5
3.3
3.4
3.3
V
Min
1.3
1.7
2.0
1.7
2.0
1.8
1.9
V
Max
65
30
20
30
20
30
25
rnA
Min
65
30
20
30
20
30
25
mA
Min
5.0
6.5
6.8
6.5
6.8
6.8
6.9
mA
Max
750
.Q.
......
Q)
......
.......
r-
::t:
.Q.
......
Q)
o
LH4161C
2
Input Resistance
Output Short
Circuit Current
LH4161
10
Input Bias Current
::t:
......
(Note 3)
LH4161A
Parameter
......
......
»
.......
rQ)
400
350
2900
VIV
Min
VIV
3-299
o
....
....CD
AC Electrical Characteristics (Notes 3 & 7)
00:1'
::c
..J
.....
....
....CD
3
~
....CD
....
LH4161A
Parameter
Conditions
Typ
00:1'
00:1'
::c
Gain-Bandwidth
Product
Slew Rate
@F
= 20 MHz
Supply = ±5V
Av
= + 1 (Note 10)
Tested
Design
Limit
Limit
(Note 4)
(Note 5)
50
40
LH4161
LH4161C
Tested
Design
Tested
Limit
Limit
Limit
Limit
(Note 4)
(Note 5)
(Note 4)
(Note 5)
40
Design
Units
35
MHz
35
300
Min
225
V//J-s
200
225
Min
..J
Supply = ±5V
200
V//J-s
Power Bandwidth
Your
4.5
MHz
Settling Time
10V Step to 0.1%
120
ns
45
Deg
Av
= 20Vpp
= -1, RL = 2 kO
Phase Margin
Differential Gain
NTSC,Av = +4
<0.1
%
Differential Phase
NTSC,Av = +4
0.1
Deg
Input Noise Voltage
f=10kHz
15
nV/.JHz
Input Noise Current
f = 10 kHz
1.5
pA/.JHz
Note 1: Continuous short-circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 1S00C.
Note 2: The typical iunction·to·ambient thermal resistance of the cerdip (J) package is 125'C/W, and the TO·5 (H) package is 155'C/W. All numbers apply for
packages soldered directly into a printed circuit board.
Nota 3: Unless otherwise specHied, all limits guaranteed for TA = TJ
over the range listed under "Operating Temperature Range" with TA
= 25'C with supply voltage = ± 15V, VCM = OV, and RL :,
= TJ in the "Absolute Maximum Ratings" section.
100 kn. Boldface limits apply
Note 4: Guaranteed and 100% production tested. These limits are used to calculate outgoing AOL levels.
Note 5: Guaranteed but not 100% production tested. These .limits are not used to calculate outgoing AOL levels.
Note 6: For Single supply operation, the following conditions apply: V+
= 5V, V-. = OV, VCM = 2.5V, VOUT = 2.5V.
Note 7: CL " 5 pF.
Note 8: In order to achieve optimum AC performance, the input stage was deSigned without protective clamps. Exceeding the maximum differential input voltage
results in reverse breakdown of the base-emitter junction of one of the input transistors and probable degradation of the input parameters (especially VOS, lOS and
Noise).
Note 9: The average voltage that the weakest pin combinations (those involving Pin 2 or Pin 3) can withstand and still conform to the datasheet limits. The test
circuit used consists of the human body model of 100 pF in series with 1500n.
Note 10: VIN = 8V step. For supply = ±5V, VIN = 5V step.
Note 11: Voltage Gain Is the total output swing (20V) divided by the inputsignal required to produce that swing.
-
3-300
r-
Typical Performance Characteristics
::E:
~
RL = 10k and TA = 25°C unless otherwise specified
......
en
......
»
Power Dissipation Curve
g
1.3
1.2
1.1
1.0
i!i
~
~
os
!i
Input Current Noise
lk
~
r!~FINIlE HEAT SINK ~
0.7
ANB1ENT
8JC= 125CC/WATT
D.5
!
~Is
~ ~0.2
100
"-I--
16
12
8
4
o
0.1
10
100
TEMPERATlJRE (CC)
lk
5
--
o
-15
1.6
--
r-
2
20
--
Input Offset Voltage
1.5
!:!!l
l-
~
t;
~
D.4
o~
......
D.5
'" ~
i-
§!
D.6
125CC
6 Representative
Units
lD
""-
1.4
1.2
1.0
0.8
20
FREQUENCY(MHz)
6 Representative
Units
1.8
1
1M
Input Offset Current
2D
25CC
IDle lOOk
FREQUENCY (Hz)
Bias Current vs
Common-Mode Voltage
-5JCC
....en
....
o
~
0.1
1
-il.5
-ID
0.2
-10
-5
10
15
-1.5
-ss -35 -15
-55 -35 -15 5 25 45 6S 85 lOS 125
COMMON-MODE VOLTAGE (V)
TEMPERATlJRE (OC)
Common-Mode Input
Saturation Voltage
Output Resistance
100
T. =25OC
RL =2kll
T. =25CC
1
1
-2
-2
5 25 45 65 85 lOS 125
TEMPERATlJRE (OC)
Output Saturation Voltage
V+
V+
/
10
II
v-
V4
6
B
W
~
W
~
~
246
+/- SUPPLY VOLTAGE(V)
+/-
1000
.~
§!
60
25CC
600
~
W
~
9
34D
1
-55OC
2OH-Hf+!!fi-I-+1fHt!tI-++1-HttH
RL =I00kll
300
~
~
~
1
200
~
*
2
1
-55OC Vi
220
6
+/-
8
W
250C
180
W
SUPPLY VOLTAGE (V)
~
~
10
LOAD RESISTANCE(kll)
100
./
1250C
1
2
4
"
/
1
~
/
I'
140
4
~
1
I
260
1
o
100M
Positive Slew Rate
-55CC
/
0
10M
FREQUENCY (Hz)
1-+-++I-I!!H--I::'25fojOCIf'F~+-I+Hl!!f
&
1M
20k
SUPPLY VOLTAGE(V)
1
400
1
10k
~
11111111
~
V
~
W
IIOro~mm-'Trrmr,,~m
~
900
8
Voltage Gain vs
Load Resistance
Gain vs Supply Voltage
~z
-
1
2
~
::E:
.......
z
01020304050607011090100110120130
::E:
....en
....
........
r-
"-
10
111
0
o
r-
Vs=tI5V_
AV-+ l T.=25OCTHD< 1:>:-
!
8JC = 75CC/WATT
........
Power Bandwidth
1
6
8
10 12 14 16 18
SUPPLY VOLTAGE (+/-V)
TUK/9767-S
3-301
o
....
....CD
Typical Performance Characteristics
(Continued)
"II'
:z::
....I
.....
....
....
"II'
Input Noise Voltage
:(
~~
10k
....
"II'
~
lk
~
:5
....CD
:z::
....I
Negative Slew Rate
lOOk
CD
330
~
A
250
.5.
§!
'"~
RL=100k.ll
290
100
z
"
"-
10
1
10
7
-550(;
210
"-~ -
100
lk
10k lOOk
I.
"
./
/
1'/
/
250(;' ./
170
I
1250(;
130
1M
2
FREQUENCY (Hz)
8
4
10 12 14 16 18
SUPPLY YOLTAGE(+/-Y)
TL/K/9767-6
TL/K/9767-4
Typical AC Characteristics
Step Response; Av =
+1
Gain'" Phase; Av =
+ 100
TLlK/9767 -7
TLlK/9767-B
Application Hints
The LH4161 has been compensated for unity-gain operation. Since this compensation involved adding emitter-degeneration resistors in the op amp's input stage, the openloop gain was reduced as the stability increased. Gain error
due to reduced AVOL is most apparent at high gains.
0.1 JlF ceramic capacitors should be used (from each supply "rail" to ground); if the device is far away from its power
supply source, an additional 2.2 to 10 p.F of tantalum may
be required for extra noise reduction.
Keep all leads short to reduce stray capacitance and lead
inductance, and make sure ground paths are low-impedance, especially where heavier currents will be flowing.
Stray capacitance in the circuit layout can cause signal coupling from one pin, input or lead to another, and can cause
circuit gain to unintentionally vary with frequency.
The LH4161 is unusually tolerant of capacitive loads. Most
op amps tend to oscillate when their load capacitance is
greater than about 200 pF (espeCially in low-gain circuits).
However, load capacitance on the LH4161 effectively increases its compensation capacitance, thus slowing the op
amp's response and reducing its bandwidth.
Breadboarded circuits will work best if they are built using
generic PC boards with a good ground plane. If the op amps
are used with sockets, as opposed to being soldered into
the circuit, the additional input capacitance may degrade
circuit performance.
Power supply bypaSSing is not as critical for the LH4161 as
it is for other op amps in its speed class. However, bypassing will improve the stability and transient response of the
LH4161, and is recommended for every design. 0.01 JlF to
3-302
r:::c
.co.
....
en
....
Typical Applications
....:J>r-
1 MHz Low-Pass Filter
fe = %'11' ~(R1R2C1C2)
:::c
.co.
....
en
....
....
r:::c
.co.
....en
....
o
TL/K/9767-9
t 1% tolerance
"Matching determines filter precision
Modulator with Dlfferentlal-to-Slngle-Ended Converter
+12V
+12V
3.9k
3.9k
3.9k
OUTPUT
-12V
TL/K/9767-10
•
3-303
~National
PRELIMINARY
~ Semiconductor
LH4162A/LH4162/LH4162C
Dual High Speed Operational Amplifier
General Description
Features
The LH4162 high-speed amplifier exhibits an excellent
speed-power product in delivering 300 V/p.s and 50 MHz
unity gain stability with only 5 mA of supply current. Further
power savings and application convenience are possible by
taking advantage of the wide dynamic range In operating
supply voltage which extends all the way down to + 5V.
These amplifiers are built with National's new VIPTM (Vertically Integrated PNP) process which provides fast PNP transistors that are true complements to the already fast NPN
devices. This advanced junction-isolated process delivers
high-speed performance without the need for complex and
expensive dielectric isolation.
In addition, they are precision laser trimmed to guarantee
low offset voltage.
•
•
•
•
•
•
•
•
•
•
High slew rate
High unity gain frequency
Low supply current
Fast settling
Low differential gain
Low differential phase
Wide supply range
Stable with unlimited capacitive load
Well behaved, easy to apply .
Low offset voltage
300 V/ p.s
50 MHz
5 mA
120 ns to 0.1 %
<0.1 %
0.10
4.75V to 32V
± 1 mV
Applications
• Low differential gain and phase video amplifiers
• Fast pulse amplifiers
• High frequency filters and oscillators
Connection Diagrams
V+(1)
1
Nle
2
Nle
3
Nle
+ INPUT(l)
V-(2)
V+(l)
OUTPUT (1)
V-(I)
+INPUT(I)
-INPUT(l)
-INPUT (2)
+INPUT(2)
V-(2)
OUTPUT (2)
+ INPUT (2)
Nle
Nle
Nle
V+(2)
V+(2)
TL/K/9769-2
TL/K/9769-1
Top View
Top View
Order Number LH4162AH, LH4162H or LH4162CH
See NS Package Number H10F
Order Number LH4162AJ, LH4162J or LH4162CJ
See NS Package Number J16A
3-304
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V+ - V-)
36V
±8V
Differential Input Voltage (Note 8)
(V+ - 0.7V) to (V- - 7V)
CMVoltage
Output Short Circuit to GND
(Note 1)
Continuous
Lead Temperature (Soldering, 10 sec.)
260'C
Storage Temperature Range
-65'C to + 150'C
Operating Temperature Range (Note 2)
-55'Cto + 125'C
LH4162A1LH4162
LH4162C
- 25'C to + 85'C
Max. Junction Temperature
150'C
±700V
ESD Tolerance (Notes 8 and 9)
4.75V to 32V
Operating Supply Voltage Range
DC Electrical Characteristics (Note 3)
LH4162A
Parameter
Typ
Conditions
Input Offset Voltage
0.5
Input Offset Voltage
Average Drift
Input Offset Current
Input Offset Current
Average Drift
Input Resistance
Differential
Input Capacitance
Av
Large Signal
Voltage Gain
VOUT = ±10V, RL
(Note 11)
=
+1
@
10 MHz
2
4
3
6
4
6
=
2 kO
RL = 10kO
Supply = +5V
(Note 6)
Common-Mode
Rejection Ratio
-10V"; VCM"; +10V
Power Supply
Rejection Ratio
±10V,,;V±,,; ±16V
Output Voltage
Swing
Supply = ± 15V
andRL = 2kO
Supply = +5V
andRL = 2kO
(Note 6)
Source
Sink
Per Amplifier
Units
mV
Max
p.VI'C
2
3
6
3
6
5
6
p.A
Max
150
350
800
350
800
1500
1900
nA
Max
0.4
nArC
325
kO
pF
1.5
Input Common-Mode Supply = ± 15V
Voltage Range
Supply Current
LH4162C
10
Input Bias Current
Output Short
Circuit Current
LH4162
Tested Design Tested Design Tested Design
Limit
Limit
Limit
Limit
Limit
Limit
(Note 4) (NoteS) (Note 4) (Note 5) (Note 4) (Note 5)
VIV
Min
550
300
550
300
+14.0
+13.9
+13.8
+13.9
+13.8
+13.8
+13.7
V
-Min
-13.2
-12.9
-12.7
-12.9
-12.7
-12.8
-12.7
V
Min
4.0
3.9
3.8
3.9
3.8
3.8
3.7
V
Min
1.8
2.0
2.2
2.0
2.2
2.1
2.2
V
Max
94
80
74
80
74
72
70
dB
Min
90
80
74
80
74
72
70
dB
(Min)
+14.2
+13.5
+13.3
+13.5
+13.3
+13.4
+13.3
V
Min
-13.4
-13.0
-12.7
-13.0
-12.7
-12.9
-12.8
V
Min
4.2
3.5
3.3
3.5
3.3
3.4
3.3
V
Min
1.3
1.7
2.0
1.7
2.0
1.8
1.9
V
Max
65
30
20
30
20
30
25
mA
Min
65
30
20
30
20
30
25
mA
Min
5.0
6.5
6.8
6.5
6.8
6.8
6.9
mA
Max
750
400
350
2900
VIV
3-305
AC Electrical Characteristics (Notes 3 & 7)
LH4162A
Parameter
Gain-Bandwidth
Conditions
@F= 20 MHz
V+ = ±5V
LH4162C
Tested
Design
Tested
Design
Tested
Limit
Limit
Limit
Limit
Limit
Limit
(Note 4)
(Note 5)
(Note 4)
(Note 5)
(Note 4)
(Note 5)
50
Product
Slew Rate
Typ
LH4162
40
40
Design
Units
MHz
35
Min
35
Av = + 1 (Note 10)
V+ = ±5V
Power Bandwidth
VOUT = 20Vpp
Settling Time
10V Step to 0.1
%
Av= -1,RL=2kO
Phase Margin
300
MHz
225
225
V/ILS
200
Min
200
V/ILS
4.5
MHz
120
ns
3
45
Deg
Differential Gain
NTSC,Av = +4
<0.1
%
Differential Phase
NTSC,Av = +4
0.1
Deg
Input Noise Voltage
f = 10kHz
15
nVlVHz
I nput Noise Current
f = 10kHz
1.5
pAlVHZ
Note 1: Continuous short-circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 1500C.
Nole 2: The typical junction-to-ambient thermal resistance of the cerdip (J) package is 85'C/W, and the TO·5 (H) package is 155'C/W. All numbers apply for
packages soldered direcUy into a printed cireuit board.
Nole 3: Unless otherwise specified, all limits guaranteed for TA = TJ
over the range listed under "Operating Temperature Range" with TA
= 25'C wHh supply voltage = ± 15V, VCM = OV, and RL .,
= TJ in the "Absolute Maximum Ratings" section.
100 kO. Boldface limits apply
Note 4: Guaranteed and 100% production tested. These limns are used to calculate outgoing AOL levels.
Nole 5: Guaranteed but not 100% production tested. These limits ere not used to calculate outgoing AOL levels.
Nole 8: For single supply operation, the following conditions apply: V+
= 5V, V- = OV, VCM = 2.5V, VOUT = 2.5V.
Note 7: CL :s; 5 pF.
Note 8: In order to achieve optimum AC performance, the input stage was designed without protective clamps. Exceeding the maximum differential Input voltage
results In reverse breakdown of the base·emitter junction of one of the Input transistors and probable degradation of the Input parameters (especially Vos, los and
Noise).
Note 9: The average voltage that the weakest pin combinations (those involving Pin 2 or Pin 3) can withstand and still conform to the datasheet limits. The test
clreuH used consists of the human body model of 100 pF In series with 15000.
Note 10: VIN
= 8V step. For supply = ± 5V, VIN = 5V step.
Note 11: Voltage Gain is the total output swing (20V) divided by the Input signal required to produce that swing.
3-306
r-
::r:
Typical Performance Characteristics RL =
01:00
.....
10k and TA = 25°C unless otherwise specified
en
N
Power Dissipation
Curve
2.6
g
100
'Ol'
~
S
§
~
0
40
c
ANBIENT
'JA=8SOC/w'ATT
eo r-....
60
"~
"8'"
'\.
20
60
~
i-r--- -sJoc
....... 1"""
t;
~
30
i!l
20
§
~I
~
".
40
lk
10k lOOk
4
6
I-
10
" . I"""'
Rise Tlma
,.'1
300
<=-
InF
~
~
'"
10nF lOOnF II'F
LOAO CAPACITANCE
200
100
o
GAIN
VS=:t15V
AV(C.L.)= 1
50
g
40
b
0
30
~
J
\
20
10
.......
1 nF
10nF lOOnF II'F
oI
10pF
\
....
OdB
loopF
lOOOpF
0.01/'F
LOAD CAPACITANCE
Frequency Response,
Ay = -1
\
r-.
60
LOAD CAPACITANCE
Frequency Response,
Ay = + 1 (Follower)
10
Overshoot vs
Load CapaCitance
~
10pF loopF
1:1
Vs=:t15V
RL =2kJl
40
:r
'\.
o
../
INPUT STEP (V)
"\.\
N.g.
V
'V
60
VS=:t15V
Ay=+1
T.=25OC
i'{os.
~
~
O. 1
10pF loopF
LL
80
Slew Rate vs
Load Capacitance
400
T =25OC
"-"-
0.1'1
100
TENPERATURE(OC)
Ay(c.L.) = 300
I
"
-55-35-15 5 25 45 65 B5 lOS 125
VS=:t15V
lNHz
//
1=
Ay=-1
VOUT =:tO.5V
RL = 10kJl
o
Gain-Bandwidth Product
vs Load Capacitance
............
~
~
~
100KHz
120
§
W W
10KHz
Settling Time vs
Input Step
Prop. Delay
+/- SUPPLY VOLTAGE(V)
1000
1KHz
140
12
Frequency Response,
Ay = +3
II
J
/111
"
r-
PHASE
"ll!I~
\
OdB
GAIN
PHASE
P
IIII
1111
IIII
IN
10M
GAlN=10dB/DIY
PHASE = 450 /D1Y
lOON
1M
ION
GAIN = 10 dB/DIY
PHASE = 45°/DIY
100M
1M
ION
100M
GAIN = 10dS/DIY
PHASE = 450/D1Y
TLlK/9769-3
3-307
......
!i:
N
FREQUENCY (Hz)
14
~~ -
8 W g
10M
16
j....~
10
2
1M
N
o
Propagation Delay
and Rise Time
/ ".~ -~OC
/'
o
I--
01:00
.....
en
01:00
.....
en
7D
60
50
40
30
20
10
FREQUENCY (Hz)
Gain-Bandwidth
Product
50
eo
O~-u~~~~~~uaw
100
1
TEMPERATURE. OC
1
90
"- .........l"-
o
10 30 50 70 90 110 130 150 170
::r:
140 r-rn'TTTTrr-T""I"rrm1T"'"T"T'TTTT1T1
130 1-1-ti+tttIt-t+ftttttr.-'::;!;;!;O!tttI
120 1-1-ti+tttIt-t+ftttttF
110
100
T. =25OC
iiiw
r-
Power Supply
Rejection Ratio
Common-Mode
Rejection Ratio
Win-I HEAT SINK
'Jc';3SOC ATT
U
E' 2.2
2.0
1.8
z 1.6
0
1.4
1.2
~ 1.0
0.8
~ 0.6
~ 0.4
0.2
l>
......
Typical Performance Characteristics
Input Current Noise
Input Noise Voltage
1Il00
i
1110
i
10
~
1'-
1Il00
T.=25CC
"-
i
!
I
r'-... r- f--
~
I
~
z
10
lOll
Ik
lac lOIJc
1M
lOll
'r'-...
10
T. =25CC
THD
V
RL =100k.o.
w
"
::>
<>
Negative Slew Rate
5.0
VI
..- '125 C
8
W g
/.
...J
..... ~
",
-55°C
210
25OC'
170
re
/
,
:J:
.....
""en
"
N
......
./
""en.....
r-
:J:
/'
N
o
./
/
0
W
V/
7
~
r-
1250C
130
ffi
2
+/- SUPPLY VOLTAGE
4
6
8
10
12
14 16
18
SUPPLY VOLTAGE{+/-V)
TL/K/9769-6
TL/K/9769-5
Typical AC Characteristics
Step Responsej Av =
+1
Gain & Phasej Av =
+ 100
TL/K/9769-8
TlIK/9769-9
3-309
Application Hints
The LH4162 has been compensated for unity-gain operation. Since this compensation involved adding emitter-degeneration resistors in the op amp's input stage, the openloop gain was reduced as the stability increased. Gain error
due to reduced AVOL is most apparent at high gains.
0.1 ,...F ceramic capacitors should be used (from each supply "rail" to ground); if the device is far away from its power
supply source, an additional 2.2 ,...F to 10 ,...F of tantalum
may be required for extra noise reduction.
Keep all leads short to reduce stray capacitance and lead
inductance, and make sure ground paths are low-impedance, especially where heavier currents will be flowing.
Stray capacitance in the circuit layout can cause signal coupling from one pin, input or lead to another, and can cause
circuit gain to unintentionally vary with frequency.
The LH4162 is unusually tolerant of capacitive loads. Most
op amps tend to oscillate when their load capacitance is
greater than about 200 pF (especially in low-gain circuits).
However, load capacitance on the LH4162 effectively increases its compensation capacitance, thus slowing the op
amp's response and reducing its bandwidth.
Breadboarded circuits will work best if they are built using
generic PC boards with a good ground plane. If the op amps
are used with sockets, as opposed to being soldered into
the circuit, the additional input capacitance may degrade
circuit performance.
Power supply bypassing is not as critical for the LH4162 as
it is for other op amps in Its speed class. However, bypassing will improve the stability and transient response of the
LH4162 and is recommended for every design. 0.01 ,...F to
Typical Applications
1 MHz Low·Phase Filter
fc = %'IT ~(R1 R2 C1 C2)
TL/K/9769-10
t1 % tolerance
"Matching determines filter precision
3-310
Typical Applications (Continued)
Modulator with Dlfferentlal-to-Slngle-Ended Converter
+12V
+12V
lk
3.9k
3.9k
+--6--t
CARRIER--jH--......- - - - I 8 Lt.l1496 6 i - -.....
SIGNAL 0.01
",r
91---......---1
OUTPUT
10k
t
-12V
-12V
TL/K/9769-11
Full Wave Rectifier
lk
~
>--4'-4_ OUTPUT
TL/K/9769-12
•
3-311
C)
r---------------------------------------------------------------------------~
~ ~National
:z:
....I
PRELIMINARY
~ Semiconductor .
LH4200 General Purpose GaAs FET Amplifier
General Description
This is a general purpose low noise, AC coupled, high frequency amplifier useful for applications from 500 KHz to
1 GHz. It features a Gallium Arsenide input stage for high
frequency performance and bipolar second and third stages
for low output impedance. Series feedback may be provided
for gain stabilization and input impedance improvement. A
control input is available to vary the open loop gain of the
amplifier making it useful for AGC and mixer applications.
Features
• High gain
• Wide AGC range
38 dB at 100 MHz
60 dB at 100 MHz
1 MO
3 dB, 500
• High i!1Put impedance
• Low noise figure
Applications
•
•
•
•
•
•
Voltage Controlled Amplifiers
Feedback Stabilized Amplifiers
Mixer-Amplifiers
HF-UHF Oscillators
Video Diode Receivers
Fiber Optics
Simplified Schematic
High Frequency Amplifier
Vee1
INPUT 1 _ ...INPUT 2
........ r-
-+-..........~ L_
1M
OUTPUT
1M
GROUND
FEEDBACK
TUK/9330-1
Connection Diagrams
.----
Vee l
24
GROUND
INPUT 1
FEEDBACK
INPUT 2
Vee l
GROUND
NC
Ne
INPUT 2
GROUND
INPUT 1
OUTPUT
GND
GND
OUTPUT
GROUND
13
FEEDBACK
TL/K/9330-9
GND
GND
TL/K/9330-10
Top View
Top View
Order Number LH420OCO
See NS Package Number 0240
See NS Package Number G12B
Order Number LH4200G
Note: UnspecKied pins are No Connection.
3-312
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
12V
Supply Voltage (VCClo VCC2)
Power Dissipation (Po) at TA = 25°C
9BOmW
Output Current (10)
40 rnA
Voltage
Input 1
+1.4to -4V
+2.5to -4V
Input 2
Operating Temperature Range
LH4200C
- 25°C to + B5°C
- 55·C to + 125·C
LH4200G
-65·Cto + 150·C
Storage Temperature Range (TSTG)
150·C
Maximum Junction Temperature (TJ)
Lead Temperature (Soldering < 10 sec.)
3000C
ESD Tolerance (Note 1)
150V
DC Electrical Characteristics
Unless otherwise specified. Vcc
Symbol
= Vco = 10V, Rs = 50n, RL = 50n, TA = 25·C (Note 4)
Description
Vl0
Output Bias Voltage
Va
FET Source Bias
Vo
Output Voltage Swing
Is
Supply Current
liN
Input Impedance
Conditions
Typ
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
4.5
V (Min)
0.5
0.4
V (Min)
5
VINI
= VIN2 = OV
100 kHz
0.6
3
Vp.p
45
70
rnA (Max)
1 Meg
200k
n(Min)
AC Electrical Characteristics
Unless otherwise specified. Vs
Symbol
S21
PI
Description
Power Gain
(Note 4)
Power Output
@1 dB Compression
AGCRange
NF
= 10V, Rs = 50n, RL = 50n, TA = 25·C (Note 4)
Noise Figure
Conditions
10 MHz
VINI = OV, VIN2
= +1.5V
100MHz
VINI = OV, VIN2
= +1.5V
500 MHz
VINI = OV, VIN2
= +1.5V
1000 MHz
VINI = OV, VIN2
= + 1.5V
Design
Limit
(Note 3)
Typ
Tested
Limit
(Note 2)
50
42
dB
37
30
dB
1B
14
dB
Units
dB
3
10MHz
15
12
dBm
100 MHz
14
10
dBm
500 MHz
6
4
dBm
1000 MHz
1
dBm
= -2V
10-500 MHz. Rs = 50
Rs = BOO
60
dB
3
dB
2
dB
100 MHz. VG2
Note 1: Human body model, 100 pF discharged through a 1.5 kG resistor.
Note 2: Testad limits are guaranteed and 100% testad in production.
Note 3: Design limits are guaranteed (but not 100% production tested) over indicated temperature and supply voltage ranges. These limits are nol used 10
calculale oulgoing quality levels. Boldface limits are guaranteed over full temperature range.
Note 4: These measurements are taken with the LH4200 open loop.
3-313
•
C) r-----------------------------------------------------------------------------------------~
C)
CIII
..,.
:::E:
..J
General Information
The LH4200 is useful for a variety of RF, VHF, and UHF
applications including feedback, AGC amplifiers, and signal
sources. The amplifier is internally bypassed for good high
frequency performance, but should be bypassed externally
with a large (10 ",F aluminum electrolytic or better) capacitor to prevent low frequency stability (oscillation) problems.
The amplifier has three inputs: Two high impedance gates
for signal input, and a low impedance source for series
mode Feedback (Pin 3).
power gain and increase input impedance. A typical connection is shown along with the feedback components needed
to achieve several different gain settings. (See Figure 5. )
The performance of the LH4200 degrades from ideal above
250 MHz as indicated by the S parameters. The input impedance decreases and is capacitive while the output impedance increases and is inductive. For maximum performance in the 250 MHz to 900 MHz area, some performance
improvement can be obtained with suitable matching networks.
Normally, Input 1 is used as the signal input while Input 2 is
used to control the gain of the amplifier for those applications using Automatic Gain Control (AGC). Gain control
ranges of over 60 dB are possible to 100 MHz. Input 2 is
biased at + 1.5V for maximum gain and - 2V for minimum
gain. Input 2 and Feedback (Pin 3) are normally bypassed
with 0.01 ",F capacitors for maximim gain.
LH4200 TYPICAL S PARAMETERS
VCCl = VCC2 = 10V, Vlnput 2 = 1.5V
Frequency
The second gate, Input 2 may be used as a second isolated
input for small signal operation. The open loop gain from
this input is approximately 6 dB less than from Input 1.
The LH4200 may be used as a feedback amplifier, in which
case, the third input, Feedback, is connected to the output
with a suitable resistor to set the overall power gain. In this
manner, voltage series feedback is used to establish the
S11
S21
dB
MHz
Mag
Ang
10
100
250
500
750
1000
0.96
0.97
0.86
0.64
0.41
0.23
-0.5 50
-15 36
-32 26
-62 18
-105 10
168 3.5
S12
S22
Ang
dB
Mag Ang
-49
-130
150
39
70
-160
-48
-45
-43
-40
-33
-37
0.99
0.93
0.93
0.82
0.7
0.71
6dB PAD
RF
R
6dB PAD
TL/K/9330-2
Note: Pinout shown for
0240 package.
Ferrite Bead
Stackpole 57 0257
RF. R. A: HP8505A Network Analyzer Connections
FIGURE 1. S21 Measurement Circuit
3-314
181
152
115
73
52
42
r-
:I:
General Information (Continued)
"'"
N
o
o
. - - - - - - - - - . _ -....- - -... + lOY
O.D1p.F
I.
0.01 p.F
TL/K/9330-3
Note: Pinout shown for 0240 package.
FIGURE 2. Applications Board
...----.---_10Y
334
1.SK
..L
10K
>'o::--t...0-l.O~
Cl
L1t~
-==
TLiK/9330-4
Note: Pinout shown for 0240 package.
FIGURE 3. VHF-UHF Oscillator
•
3-315
General Information
(Continued)
The LH4200 may be used as a Colpitts Oscillator to above
500 MHz (see Rgure 3). It is stable and features load isolation and will provide + 15 dBm to a 50n load. Capacitors C2
and C3 provide feedback from source to gate of the input
GaAs FET. The resonator network, L1-C4, is coupled to the
active device through Cl. Approximate values suitable for
beginning design are:
101<4
Frequency
C1
C2
C3
L1
MHz
pF
pF
pF
nH
75-150
5
30
60
150
150-300
3
6
10
100
300-500
1.5
3
6
50
821<4
r-W\r-.....--'lM.....- - -.....- - -... l0V
~~
33A
>'-::-4""0-l.O~
TLlK/9330-5
Note: Pinout shown for 0240 package.
FIGURE 5. Feedback Amplifier
Gain
Bandwidth
R
C
30dB
150MHz
1.5k
9-30 pF
25 dB
300 MHz
B60n
2-BpF
20 dB
500 MHz
430n
<1 pF
RF IN
OUTPUT
+10V
10K
O.ll-'f
I
3K
TLlK/9330-6
Note: Pinout shown for 0240 package.
FIGURE 6. Video Diode Receiver (Opto or RF)
3-316
r---------------------------------------------------------------~r
::E:
.a=a.
LH4200 Video Diode Receiver
N
The LH4200 may be used for crystal video receiver applications (see Figure 6). Crystal video receivers, although much
less sensitive than their superhetrodyne counterparts, offer
the advantage of simplicity. Typical applications include receivers for radar beacons, missile guidance, fuze activation
and countermeasures; as well as signal monitoring and
power leveling detectors.
high source impedances. Measured noise figure is 7 dB
from a 500 source and less than 4 dB from a 1 kO source.
AGe Application
This circuit provides a constant RF output signal level over a
broad range of input signal levels (see Figure 7). Diode Dl
provides a DC signal proportional to the RF output level.
This signal is compared to a reference voltage at the input
to the LM358, which in turn controls the voltage at Input 2,
controlling the gain of the LH4200.
This circuit shows two LH4200 amplifiers cascaded to provide a gain of 60 dB with a bandwidth of over 100 MHz.
Series mode feedback provides high input impedance over
the operating frequency range and low noise figure from
.....---------..-+10Y
lOOK
3311
INPUT
0.01
~OUT
HP 5882-2800
01
1M
100D.
lOOK
-5Y
Nota 1: Pinout shown for 0240 package.
Nota 2: All capacitance values are in microfarads.
FIGURE 7. AGe Application
3-317
TL/K/9330-7
o
o
LH4200 Performance Characteristics
Gain vs. Frequency
....
50
!
'""
~
z
.....
30
20
10
10
100
60
.......
30
-
III
1 dB COUPRESSION
3
211
40
10
10
100
o
10
1000
100
Feedback Amplifier Performance
-
Maximum Power Dissipation
R=I.SK
I"-.....
30
.....
I'\.
r-
500 MHz
\- I-. 200 MHz
DO MHz
tr-lSOMH.
0
-1.0
V INPUT 2 (VoLTS)
-2.D
!
R=B20
iiiz
R=430
1i
~
-
~~
.......
..;;><
211
z
"
.....
OJ!
IS
D.4
~
500
F (MHz)
OJ!
!i!
!
200
Vs I.= WITl1
12V
1.0
r~UA~LOr
7
6085
'
.!.
'JA=92OC/W
liN1\.
1- I NO HEATSINK
Vs = lOY
r-
0
f
10
100
1000
FREQUENCY (UHz)
FREQUENCY (MHz)
AGC Characteristics
+1.0
THIRO ORDER INTERCEPT POINT
50
..III~
1000
1111
30
FREQUENCY (MHz)
...
Signal Handling Capabilities
AGC Characteristics
70
1000
D.2
50
100
AMBIENT TEMPERAlIJRE (OC)
TUK/9330-8
3·318
r-
3:
....
~National
~
r3:
o
~ Semiconductor
....
.!!!
LM 1O/LM 108(L)/LM 1OC(L) Operational Amplifier
and Voltage Reference
..c:
.....
r-
....
3:
o
General Description
The LM10 series are monolithic linear ICs consisting of a
precision reference, an adjustable reference buffer and an
independent, high quality op amp.
The unit can operate from a total supply voltage as low as
1.1 V or as high as 40V, drawing only 270pA A complementary output stage swings within 15 mV of the supply terminals or will deliver ± 20 rnA output current with ± 0.4V saturation. Reference output can be as low as 200 mV. Some
other characteristics of the LM10 are
2.0 mV (max)
• input-offset voltage
0.7 nA (max)
• input-offset current
20 nA (max)
• input-bias current
0.1% (max)
• reference regulation
2p.VI'C
• offset-voltage drift
0.002%I'C
• reference drift
The circuit is recommended for portable equipment and is
completely specified for operation from a single power cell.
In contrast, high output-drive capability, both voltage and
current, along with thermal overload protection, suggest it in
demanding general-purpose applications.
The device is capable of operating in a floating mode, independent of fixed supplies. It can function as a remote comparator, signal conditioner, SCR controller or transmitter for
analog signals, delivering the processed signal on the same
line used to supply power. It is also suited for operation in a
wide range of voltage- and current-regulator applications,
from low voltages to several hundred volts, providing greater precision than existing ICs.
This series is available in the three standard temperature
ranges, with the commercial part having relaxed limits. In
addition, a low-voltage specification (suffix "L") is available
in the limited temperature ranges at a cost savings.
Connection and Functional Diagrams
Metal Can Package (H)
Dual-In-Llne Package (N)
REFERENCE
FEEDBACK
v-
REFERENCE
OUTPUT
1
REFERENCE
FEEDBACK
OPAMP
INPUTH
2
v+
OPAMP
INPUT(+)
3
6
4
Y-
OPAMP
OUTPUT
BALANCE
TOP YIEW
TOP VIEW
TLlH/5652-1
Order Number LM10H, LM10BH, LM10CH,
LM10BLH or LM10CLH
See NS Package Number H08A
TL/H/5652-15
Order Number LM10CN or LM10CLN
See NS Package Number N08E
Small Outline Package (M)
14
NC
NC
REF OUTPUT
Op AMP INPUT(-)
Op AMP INPUT(+)
2
13
3
12
4
5
-..c:
o
BALANCE
OUTPUT
REFERENCE
FEEDBACK
r---~----~~----'-~--V+
NC
NC
REF FEEDBACK
y+
1
INPUTS
REFERENCE
OUTPUT
Op AMP OUTPUT
Y-
BALANCE
NC
NC
REFERENCE
~--------~----~--~VTL/H/5652-17
Order Number LM10CWM or LM10CLWM
See NS Package Number M14B
3-319
TLlH/5652-16
:::r
0'
....
CI
:i!!
....
:Jar
CI
....
:i!!
....
......
...
CI
:i!!
....
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 7)
LM10BL/LM10CL
7V
±7V
LM10/LM10B/LM10C
45V
±40V
Total Supply Voltage
Differential Input Voltage (note 1)
Power Dissipation (note 2)
internally limited
Output Short-circuit Duration (note 3)
continuous
-55'C to + 150'C
Storage-Temp. Range
Lead Temp. (Soldering, 10 seconds)
Metal Can
300'C
Lead Temp. (Soldering, 10 seconds) DIP
260'C
215'C
Vapor Phase (60 seconds)
Infrared (15 seconds)
220'C
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
ESD rating is to be determined.
Electrical Characteristics
TJ=25'C, TMINs:'TJS:TMAX (note 4) (Boldface type refers to limits over temperature range)
Parameter
LM10C
LM10/LM10B
Conditions
Typ
Max
Input offset voltage
0.3
Input offset current
(note 5)
Min
Input bias current
Min
Units
Typ
Max
2.0
3.0
0.5
4.0
5.0
mV
mV
0.25
0.7
1.5
0.4
2.0
3.0
nA
nA
10
20
30
12
30
40
nA
nA
250
150
500
150
115
400
kO
kO
120
80
50
20
1.5
0.5
400
80
50
25
15
1.0
0.75
400
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
1.2V (1.3V)S:VOUTS:40V,
RL=1.1kO
0.1 mAS:loUTS:5 mA
1.5VS:V+ S:40V, RL =2500
0.1 mAS:loUTS:20 mA
14
33
10
33
VlmV
6
8
4
25
6
6
4
25
V/mV
V/mV
V/mV
Common-mode
rejection
-20VS:VCMS:19.15V (19V)
Vs= ±20V
93
87
102
90
87
102
dB
dB
Supply-voltage
rejection
-0.2V'?V- '? -39V
V+=1.0V(1.1V)
1.0V (1.1V)S:V+ S:39.8V
V-=-0.2V
90
84
96
90
96
87
84
93
90
96
dB
dB
dB
dB
Input resistance
Large signal voltage
gain
Shunt gain (note 6)
Vs= ±20V, IOUT=O
VOUT= ±19.95V
Vs= ±20V, VOUT= ±19.4V
IOUT= ±20 mA (± 15 mA)
Vs= ±0.6V (0.65V), IOUT= ±2 mA
VOUT= ±0.4V (±0.3V), VCM= -0.4V
130
3.0
106
130
3.0
106
Offset voltage drift
2.0
5.0
/J-V/'C
OffsE1t current drift
2.0
5.0
pAI'C
60
90
pAI'C
Bias current drift
Tc<100'C
Line regulation
1.2V (1.3V)S:VsS:40V
0S:IREFS:1.0 mA, VREF=200 mV
0.001
0.003
0.006
0.001
0.008
0.01
%IV
%IV
Load regulation
OS: IREFS: 1.0 mA
V+ -VREF'?1.0V (1.1V)
0.01
0.1
0.15
0.Q1
0.15
0.2
%
%
3-320
........5:or-
Electrical Characteristics
TJ=25'C, TMIN"TJ"TMAX, (note 4) (Boldface type refers to limits over temperature range) (Continued)
Parameter
Amplifier gain
LM10/LM10B
Conditions
0.2V" VREF" 35V
Feedback sense
voltage
Min
Typ
50
23
75
195
194
200
205
206
20
50
65
Feedback current
r-
LM10C
Max
Units
Min
Typ
25
15
70
Max
190
189
200
210
211
mV
mV
22
75
90
nA
nA
V/mV
V/mV
%rC
Reference drift
0.002
Supply current
270
400
500
300
500
570
p.A
p.A
15
75
15
75
~IA
Supply current change
Parameter
1.2V (1.3V)"Vs,,40V
0.003
LM10BL
Conditions
LM10CL
Typ
Max
Input offset voltage
0.3
Input offset current
(note 5)
Input bias current
Min
Input resistance
Large signal voltage
gain
Vs= ±3.25V,IOUT=0
VOUT= ±3.2V
Vs= ±3.25V,IOUT= 10 mA
VOUT= ±2.75 V
Vs= ±0.6V (0.65V), IOUT= ±2 mA
VOUT= ±O.4V (±0.3V), VCM= -0.4V
Units
Typ
Max
2.0
3.0
0.5
4.0
5.0
mV
mV
0.1
0.7
1,5
0.2
2.0
3.0
nA
nA
10
20
30
12
30
40
nA
nA
Min
250
150
500
150
115
400
kO
kO
60
40
10
4
1.5
0.5
300
40
25
5
3
1.0
0.75
300
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
8
4
30
6
4
30
V/mV
V/mV
25
3.0
25
3.0
Shunt gain (note 6)
1.5V"V+ ,,6.5V, RL =5000
0.1 mA" lOUT" 10 mA
Common-mode
rejection
-3.25V"VCM,,2.4V (2.25V)
Vs= ±3.25V
89
B3
102
80
74
102
dB
dB
Supply-voltage
rejection
-0.2V~V- ~ -5.4V
V+ = 1.0V (1.2V)
1.0V (1.1V)"V+ "6.3V
V-=0.2V
86
BO
96
96
94
106
80
74
80
74
dB
dB
dB
dB
BB
106
Offset voltage drift
2.0
5.0
p'vrc
Offset current drift
2.0
5.0
pArC
Bias current drift
60
90
pArC
Line regulation
1.2V (1.3V)"Vs,,6.5V
0"IREF,,0.5 mA, VREF=200 mV
0.001
0.01
0.02
0.001
0.02
0.03
%IV
%/V
Load regulation
0"IREF,,0.5 mA
V+ -VREF~1.0V (1.1V)
0.01
0.1
0.15
0,01
0.15
0.2
%
%
Amplifier gain
0.2V" VREF" 5.5V
30
20
3-321
70
20
15
70
V/mV
V/mV
...
5:
o
...
m
~
r-
5:
o
o
.c
....I
0'
0
.,...
Electrical Characteristics
TJ=25°C, TMIN,;;TJ,;;TMAX, (note 4) (Boldface type refers to limits over temperature range) (Continued)
:!il
....I
......
Parameter
iii'
0
.,...
Feedback sense
voltage
:!il
Feedback current
:::r
....I
......
0.,...
:!il
....I
LM10CL
LM10BL
Conditions
Min
Typ
195
200
194
20
Max
Min
Typ
205
190
200
206
189
Reference drift
0.002
260
75
90
65
Supply current
210
211
22
50
Units
Max
280
500
570
500
nA
nA
%/'C
0.003
400
mV
mV
,."A
,."A
Note 1: The Input voltage can exceed the supply voltages provided that the voltage from the input to any other terminal does not exceed the maximum differential
input voltage and excess dissipation is accounted for when VIN90'C, lOS ~ay exceed 1.S nA for VCM=V-. With TJ=12S'C and V-s;VCMS;V-+O.IV, 10S';'S nA.
Note 6: This defines operation in floating applications such as the bootstrapped regulator or two-wire transmitter. Output is connected to the V+ terminal of the Ie
and input common mode is referred to V- (see typical applications). Effect of larger output-voltage swings with higher load resistance can be accounted for by
adding the positive-supply rejection error.
Note 7: Refer to RETStOX for LM10H military specifications.
Definition of Terms
Input offset Yoltage: That voltage which must be applied
between the input terminals to bias the unloaded output in
the linear region.
Supply-Yoltage rejection: The ratio of the specified supply-voltage change to the change in offset voltage between
the extremes.
Input offset current: The difference in the currents at the
input terminals when the unloaded output is in the linear
region.
Input bias current: The absolute value of the average of
the two input currents.
Line regulation: The average change in reference output
voltage over the specified supply voltage range.
Load regulation: The change in reference output voltage
from no load to that load specified.
Input resistance: The ratio of the change in input voltage to
the change in input current on either input with the other
grounded.
Feedback sense Yoltage: The voltage, referred to V-, on
the reference feedback terminal while operating in regulation.
Large signal Yoltage gain: The ratio of the specified output
voltage swing to the change in differential input voltage required to produce it.
Reference amplifier gain: The ratio of the specified reference output change to the change in feedback sense voltage required to produce it.
Shunt gain: The ratio of the specified output voltage swing
to the change in differential input voltage required to produce it with the output tied to the V+ terminal of the IC. The
load and power source are connected between the V+ and
V- terminals, and input common-mode is referred to the
V- terminal.
Feedback current: The absolute value of the current at the
feedback terminal when operating in regulation.
Supply current: The current required from the power
source to operate the amplifier and reference with their outputs unloaded and operating in the linear range.
Common-mode rejection: The ratio of the input voltage
range to the change in offset voltage between the extremes.
3-322
r-
;::
....
Typical Performance Characteristics (Op Amp)
Input Current
-r-
IS
-
I--
1....
z
::>
I-
S'
Vs '"dOV
l:!
0:
.......
:tv-:::::".
0.6
!!i
o
-0.5 ~-+-I---+-I--+::::::;:I--t
'" -1.0
..."',.
:::;
V-
--
~
OFFSET ,..t!!
u
Q
-0.5
-0.5
0
25
50
75
100 125
-25
25
Input Noise Voltage
~
100
110
'""'~
.
1
1
1120 ~A
r--2~mA
0.2
0.1 r--IOmA
cl> D.D5 I-- -3mA
-1mA
~ D.D2
IL"-O.1mA
0.01
..
0.5
..
0.2
Ik
I~mA
"_.J._:~.'mA
-;=
3mA
, IL"O.lmA
- -- 0
.. Wo
NP~_
--PNP
Vs' .2V
TA =-55'C
D.D02
0.001
-0.3 -0.2 -0.1
0.1
0.2
0.3
'---'-.J..tJ.........w......JL.......I....J...J...L.LLU
100
0.01 D.OZ
Minimum Supply Voltage
1.8
~
!:;
>
1.4
I:
::> 1.2
--
i== ImA
JJ1 ,,
-:!!~
o.B
0.3
0.2
iii
0.02
S
_"""<-+--r-IW...r~'
f--:~;.L-hft-!-1;-~""~~
I=;~~~-fff\:-""=+-l
0.01
~ 0.005 I==t:=~-JI--'\;=::b~
0.002
0.001 L......J.._J",.,O!:....L_..l-.......I_-'
-11.3 -Ill -0.1
0.1
0.2 0.3
OJ
1.0
1.0
Output Saturation
Characteristics
.--,-.,--nTn","",,",,,=!:r""'1
0.5 h"=>C+7f:H
~
1.:11
~~
iii
~
f:!
:l
0.2
0.1
1:::I::~~~t-hf;~;=j~~
~~~~~~~
0.05 rc
0.02 r:;~,,*~:::""+IJ.:4::~=t
0.01 i-+--+--l---7't1-+-+--;f---i
D.DDS F.-o!::;;:;;I:::;o1~f-+
0.002 i-+--+--l++-+V.' ,ZV
0.001 L.....I-..J.......d:....::...L.....J......;T.::A_·..,;'Z..;&'.,;..rC
D.Z DA 0.1
1.0 -0.1 -0.1 -1IA -0.2
OFFSET VOLTAGE CHANGE (mY)
Minimum Supply Voltage
I.B "--'-""T'"-;-:-...:...,.-""T'"""--1
J.
1.
~
g
0.1
0.05
D.Z
0
-imA
-IO
I, '-20mA
1
Ol
0.05 0.1
OFFSET VOLTAGE CHANGE (.mV)
OFFSET VOLTAGE CHANGE (mV)
OFFSET VOLTAGE CHANGE (mV)
-NPN
--PNP
I.B TA = -55'C
VSAT '"1.0V
~
~
'''-r:.a.--
~O.005
50
100
20
~ 0.1 ~~~~~I!~~~~~
~
OJI-+-+I-r-+~~;;t;;-=
I.';';:::j.:::t.;:~_
S
1.0
r-
1.0 r--r--'rr--r""T'"~--:""-''''
1
100 12&
0:
0:
Output Saturation
Characteristics
1.0
75
r-
"'
~lrn I
10k
50
! !~"!II~Em~~
..
~10~9D.
~
LOAD RESISTANCE (n)
Output Saturation
Characteristics
;;l
~~C~
", ~iiill
90
lOOk
lOOk
2&
Transconductance
I~W,~
> 100
1IIlIL
1111111
FREOUENCY (Hz)
..b
I,
0
TEMPERATURE ('C)
1I111i11 I
r-.. TA '-55'C
z
1111111111111111
Ik
10k
10
...
;;; 120
1111111
-50 -25
I"C)
III Vo"
Vs -±IZV
tlDV
:!!
Rs" 0
100 125
DC Voltage Gain
J!ljll,oJk
..'"'"
..
..
75
130
Rs = 1M
..:!
50
TEMPERATURE
Ik
10
-.c:
o
TEMPERATURE ('C)
~
"'
'\.
z
-50 -25
0.5
I-""
F=+-I-+-I-+-l--j
....
m
......c:
r;::
....
Q
-
-
V'
~
.
..5i
-IS
::>
~
;::
Offset Voltage Drift
0.5
I
VCM=V-~
BIAS
VCM
Q
Common Mode Limits
1
.....
r-
0.1
\_ 2D!~-
I
.!-
--
lOrnA
-0.1
OFFSET VOLTAGE CHANGE (mV)
-0.2
o.B 1---1._"'---'_-'-_'--.....
0.3 0.2 0.1
0 -0.1 -0.2 -0.3
OFFSET VOLTAGE CHANGE (mY)
3·323
0.1
"""'=_'---'-_'--........
--1
1.&
I.D
0.&
0
-0.& -1.0 -1.1
INPUT YOLTAGE CHANGE (mY)
TL/H/5652-2
•
Typical Performance Characteristics (Op Amp) (Continued)
Typical Stability Range
Frequency Response
140
120
iii
'".:cz
..~
~
co
100 ' 80
1
To = 25'C
~ r-...GAI~
!
250
~
200
:
~
&0
Ik
j
"" \ I
40
20
>
~ .!.HT~ r--
-20
I~' ~
ISO
-40
.
~
100
.
.. i..."
;; .."
10
~
~
IDa
......
a
~ c
co
'i: '"
I!:
50
0.1
1.0
10 100
Ik
10k lOOk 1M
10k
FREQUENCY IH,I
1M
Comparator Response
Time For Various
Input Overdrives
Comparator Response
Time For Various
Input Overdrives
Large Signal Response
1&
lOOk
FREQUENCY IH,I
Vs ·:t15V
Voo ·5mV
TA =2&OC
\
\
10mV
II
50mV
1\
\.
......
o
10k
Ik
lOOk
50
0
i
rr-
1
-50
-0.2 0 0.2 0.4 0.6 0.6 1.0 1.2 1A 1.& 1.8
FREQUENCY IH,I
~
c:I
100
co
50
i
-50
~
>
-02 a 0.2 0.4 0.6 0.8 1.0 1.2 IA 1.6 1.8
TIME Innl
Rejection Slew Limiting
Noise Rejection
140
10
.~ ""I-
~
~
....
-10
>
"
I!:
~/.
m'c
IQ:'
25'C
- - -55'C
1/
10
~~
"
co
-10
100
.~
120
~'
RL 2: 10k
yo = 5V
v- =0
To' 25'C
TIMElm.1
Follower Pulse
Response
.
!z
I~
10
~co
lOa ~""""'-"~"'
~\ios
~
~
Vs:t.ZOV
V~uTi 0
25
50
75
100 125
5
..
NPN
Iiouri20jA
1
r-
11
PNP
lOUT -ZamA
IL 1/
~
r-
1
V.±20V
Vou,- 0
-0.05
-0.1
TEMPERATURE I'CI
'OUT- 0
~
1--'1/
PNP
-r- ~ 100r~0~A
co
1\
~-it.OS
~ 0.0&
0
0.1
co
r...-i'
~
I"'-
~ -0.1
~
,
1M
-20
20
40
TIME Imsl
60
80
-20
20
40
TIME Im.1
6D
80
TL/H/5652-3
3-324
r-
....==
Typical Performance Characteristics (Op Amp) (Continued)
Shunt Gain
Shunt Gain
O~~~
>
s-UI
..
~.
-il.1D
CI
.....
r-
>
~ -0.1 I-ho
~
!!
i... -0.2 f-:..!"71"""--b""f---,:Ioo"''+-t
..
5 -0.4
~
e
....
.c
m
~~~~~-t-+--+--t
-0.&
">
~ -OA
£-0.20
....
==
CI
Shunt Gain
~
r-
==
CI
o
t; -D.8
!!
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
TL/H/5652-4
Typical Performance Characteristics (Reference)
Line Regulation
Load Regulation
0.1
II II
II II
. ,
;: 0.05
....~
I'
ill
ili
"
j....-
,,"
..!!
co
' ....
25°H
:i!
...
TA '125 C
z
~ -0.1
~
ill
ili
:z
'"
~-O.05
-0.1
10
Minimum Supply Voltage
co
!:;
~
~co
I
!
i
i5
1.2
.....
1.0
!i"
!:;
>
"
0.8
...'"
O.B
::0
TEMPERATURE
rc)
1.0
z
:l
0.1 '-=----'-----'-=""-1
-50 -25
0 25 50 75 100 125
z"
......
100
~
~
~
I
ll!
J
10
10
I
.W
100
10k
lk
lOOk
FREQUENCY (Hz)
Output Saturation
~
...
~
!!l
t-
=O.2V
~
i
I
1.2
>
VREF
LOAD CURRENT (mA)
1.4
~
lk
I
-0.2
TOTAL SUPPLY VOLTAGE
....
."
TA ' 25"C
-0.3
• 0
100
V· ·1.5V
V- '0
TA'-~l:-~I-,
TA =125°C
l<
Reference Noise Voltage
0.1
Typical Stability Range
1.2V" VS" 4DV
-55°C" TA ,,+125°C
0.1%
P, t--~~11lJ4
r-....
...... r--.... I ' ..4T--- t- V
J'-. o.~
REF •
VR"'2~
r-
1'"
~
J'-.
~
r' ,
r~OTENTIAL LY
UNSTABL E~
~
10-10
0.4
-50 -25
25
50
75
TEMPERATURE (OC)
100
125
0.01
0.1
1.0
10
LOAD CURRENT (mA)
TUH/5652-5
3-325
•
Typical Applications t t
(Pin numbers are for devices in B-pin packages)
Op Amp Offset Adjustment
Standard
Limited Range
V'
Limited Range With Boosted
Reference
y'
V'
VREF
VREf
VREF
Rl
V-
R2
150
R3
250
V-
y-
Positive Regulatorst
Best Regulation
Low Voltage
Zero Output
VIN > l1V
VOUT
loV
VOUT
oVTO IV
VOUT
3V
R2
98K
RZ
UK
Rl
2K
'::"
'::"
TL/H/5652-6
tUse only electrolytic output capacitors.
ttClrcuit descriptions available In application note AN-211.
3-326
r-
Typical Applications tt
....s::
o
(Pin numbers are for devices in a-pin packages) (Continued)
........
Current Regulator
r-
....s::o
Shunt Regulator
-.c
CI'
a.OII'F
ID
r---..-+
........
r-
....s::o
t--"'·""'Ir--t---,-+VOUT (1 +~) VIIEF
S
.,
.Q
I .IRZioRJIVAEf
OUT
RIRl
.c
.,
.,
HI
·Aequired For Capacitive Loading
Negative Regulator
Precision Regulator
.-'--'---1>-V,.
r-----1~----1>-GRDUND
CI'
2hF
>=-4-....-
Your c -IOV
'--+--...- - - - -....- ....
- VOUT = SOY
.,
It
1%
CI
O.ool"F
'Electrolytic
'---+-----------+-OAOUNO
Laboratory Power Supply
r-------.---.--..-
..
,oa
Uk
.,
."
••
.,
I---+---.......I----<~---VOUT
IN4&1
IO'
"
v"
RIO
CI
o.OI"F
,.,'...
aOOI"F
C4
50"
I-t----.. . .
I -.......
II-SIV
D-IA
----<~--------------~---c~
TL/H/5652-7
'VOUT= 10- 4 R3
ttCircuit descriptions available In application note AN·211.
3-327
Typical Applications tt (Pin numbers are for devices in 8-pin packages) (Continued)
HV Regulator
Protected HV Regulator
r-------.....- -.....- - - -....-Zllvsv .. suav
,....-_t--_t-- VlN .... 2I14V
,.....
,".....
DI
L..-!--....---_t--....._VOUT -IDDY
.....-;--+--4I--+---...------t-----~:'A~:=S15...
L..__....______....____ COMMDN
A
....---------+----GN.
L..~~...-------
Flame Detector
Light Level Sensor
.----.-+
V'
sv
_.--l
PLATINUMRHODIUM
PROBE
-.~
.,
.z'
TOMOSOR
TTL lOGIC
'M
.,
Z'"
"..
-BOO'C Threshold Is Established By Connecting Balance To VREF.
.,
,,,
03'
·Provides Hysteresis
Remote Thermocouple Amplifier
Remote Amplifier
..
•• 1
"'
'OM
13.1k
v·
I..
.,t
II.
,.
....""'\ro1.....- ....+-+
.,
.
X'·
'"
Vou•
4VSVOUTS20V
200"CsTp':700"C
tSpan Trim
CHRDMEL
ILevel-shift Trim
ALUMEl
PROlE
·Cold·junctlon Trim
.
R4
'"
':"
..
...••
•zII•
ttCircuit descriptions available in application note AN·211.
3-328
TL/H/5652-8
r-
Typical Applications t t
I
I
I
I
I
I
I
I
VRIF
(Pin numbers are for devices in a-pin packages) (Continued)
Transmitter for Bridge Sensor
,
r
I
l
...==
o
......
r==
...o
-.c
...
.c
I:D
01
tOOk
1%
......
..
r-
==
o
lOOk
V"
1%
o
I
R5
I
J
L
R3
800k
730k
1%
1%
07
R6
50
'Ok
1%
m
RESlsTlveJ
BRIDGE
Precision Thermocouple Transmitter
0'
IO/J.V/"C
PLATINUM
RHODIUM
PROBE
+
R3
392k
383k
1%
...---t-t--.._'::"+
1%
;---+----1--...:.t
lOUT
Rl"
13.1k
1%
A5
87
J93t
t%
84
:~Zk
60k
COLD
t
1%
JUNCTION
R8
Vou T>6V
R9
'20k
t:C:::OM:::P_+~10k
I
OlD
Zk
1%
1%
1%
10 mA';:lour:S:SO mA
SOO"C:S:Tp:S: ISOO"C
RB
20
1%
*
·Gain Trim
SOURCE
IFIPASS
Resistance Thermometer Transmitter
Optical Pyrometer
~ ~ IRSTOP
01
02
03
lN457
ttLevel-shift Trim
·Scale Factor Trim
tCopper Wire Wound
I mA:S:lour:S:S mA
0.Q1 :s:!!B:s: 100
IDI
--~VOUT
01
R2
R'l
ttCircuil descriptions available in application note AN-211.
R3t*
R2
.99
82
1%
1%
TLlH/5652-9
3-329
•
::J'
0'
CI
,..
Typical Applications t t
(Pin numbers are for devices in a-pin packages) (Continued)
:!!
..J
:J-
ar
CI
,..
Thermocouple Transmitter
Logarithmic Light Sensor
-
~------~----.-+
::E
..J
lOUT
c:;
,..
Dl
1N4i7
::E
..J
CHROMEL
ALUMEL
PROBE
200'C,;Tp ';700'C
Rl
1.65.
1%
1 mA,;loUT,;5 mA
tGain Trim
RI
1 mA,;IOUT';5 mA
Ra t *
RI
.99
.00
.%
*50 ",A,; 10,;500 ",A
ttCenter Scale Trim
tScale Factor Trim
'Copper Wire Wound
84
.%
.%
R3
50
Battery-threahold Indicator
Battery-level Indicator
+
R.
BlOk
RI
R4
Uk
R3
58Dk
ISOk
vTH-av
IDt-SmA
Dl
Single-ceil Voltage Monitor
R3
R.
10k
4.7
Double-ended Voltage Monitor
r----t----~--v·
,...----1-- v•
R5
Ik
RI
""""
R.
RI
10k
3.3M
61Dk
r-~~>N.....f----4---.....I VTH •• "V
C.
VTH -BV
20/JF
R.
l10k
Flash Rate Increases
Above 6V and Below 15V
Flashes Above 1.2V
R3
lOOk
R3
100.
Rate Increases With
Voltage
TL/H/5652-10
ttClrcuit descriptions available in application note AN·211.
3-330
r-
Typical Applications t t
....
o==
r-
(Pin numbers are for devices in a-pin packages) (Continued)
"-
I.
Meter Amplifier
AI
Thermometer
.---------11------ "'>1.
R2
UM
11\
1%
INPUT
D-1I1O"C
D-IDDIoIA
10 mV, 100nA
FULL-SCALE r--1~-""---!.j
SI
01
1.51
OZ
1N451
....o==
m
."-c:
r....o==
o
.c:
-
LUlU
AZ
JM
R5
:~
+
Bl
1,5V
j
A.
RZt
1.511
1%
5'
..
·Trim For Span
tTrim For Zero
Uk
~---4--4~~~SI
Light Meter
RI
Ilk
R3
40k
CAL
AI
....""""".. . .
lik 5015.
LM10/LM 1OB(L)/LM 1OC(L)
.>
j
()
CD
S»
:~~
I
,
,I'
•
I
I
I ,
j
I, ,I
a.
-...
-...
j
CD
j
!!.
R51
5>
:xJ
v~
CD
ca
c
iii'
0
c.>
l
II
c.>
~
~ R61 ~ R62
o5~1
2.1.
148.
V~
R71
19.1k
v-
"il
:r
R75
40>
:>
c:
3
.I>-
t:r
CD
iil
REFERENCE I
OUTPUT -
1
O~
·1
1
ell
6lJ
Q~
R59
t-
I 11 Q~
!li
~
CX>
R64
824k
R66
2.5>
R81
lOk
~.
"0
I»
0
,..
~
CD
.Ie.
8
REFERENCE
fEEDBACK
TUH/5652-14
r3:
......
......
r3:
......
......
~National
....
LM11/LM11C/LM11CL Operational Amplifiers
Q
General Description
......
o
~ Semiconductor
r3:
......
The LMll is a precision dc amplifier combining the best
features of existing bipolar and FET op amps. It is similar to
the LM 1DBA, except that input currents have been reduced
by more than a factor of ten. Offset voltage and drift have
also been approved.
The LMll is internally compensated, but external compensation can be added for improved frequency stability, particularly with capacitive loads. Offset voltage balancing is also
provided, with the balance range determined by a low-resistance potentiometer.
Compared to FETs, the device provides inherently lower offset voltage and offset voltage drift, along with at least an
order of magnitude better long-term stability. Low frequency
noise is also somewhat reduced. Bias current is significantly
lower even under laboratory conditions, and its low drift
makes compensation practical. Offset current is almost unmeasureable. Although not as fast as FETs, it does have a
much lower power drain. This low dissipation has the added
advantage of eliminating warm up time in critical applications.
Otherwise, the device is the electrical equivalent of the
LM1 DB, except that the negative common-mode limit is O.BV
less, performance Is specified down to ±2.5V and the guaranteed output drive has been increased to ± 2 mAo The
input noise is somewhat higher, but amplifier noise is obscured by resistor noise with higher source resistances.
Typical characteristics for 25°C (-55°C to 12soCl are:
• offset voltage: 100 p.V (200 p.V)
• bias current: 25 pA (65 pAl
• offset current: 0.5 pA (3 pAl
r-
This monolithic IC has obviously applications as electrometer amplifiers, charge integrators, analog memories, low frequency active filters or for frequency shaping in slow servo
loops. It can be substituted for existing circuits to provide
improved performance or eliminate trimming operations.
The greater preCision can also be used to extend the dynamiC range of logarithmic amplifiers, light meters and sOlidstate particle detectors.
The LMll is manufactured with standard bipolar processing
using super-gain transistors.
• temperature drift: 1 p'vrc
• long-term stability: 10 p.V/year
Connection Diagrams
Metal Can'
Mini-DIP
vTUHf5653-1
Top View
TLfHf5653-31
Order Number LM11H, LM11CH or LM11CLH
See NS Package H08C
'Case connected to
Top View
Order Number LM11CN or LM11CLN
See NS Package NOSE
v-
3-335
•
-I
.,..
.,..
Absolute Maximum Ratings
.,..
.,..
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 5)
(.)
:s(3
:i
-I
....
.,..
.,..
Total Supply Voltage
Input Current (Note 1)
Power Dissipation (Note 2)
Output Short-Circuit Duration (Note 3)
500mW
Indefinite
-65·Cto + 1500C
Storage Temperature Range
Lead Temp. (Soldering, 10 seconds)
(DIP)
(Metal Can)
40V
±10mA
:s
2600C
3000C
ESD Tolerance
(RZAP = 1.5k. CZAP = 100 pF)
TJ = 25°C, TMIN ~ TJ
(Boldface type refers to limits over temperature range.)
Electrical Characteristics
~ TMAX (Note 4)
LMII
Parameter
1500V
LMI1C
Conditions
LMllCL
Typ
Lim
Typ
Lim
Typ
Lim
Units
Input Offset Voltage
(Note 4)
0.1
0.3
0.6
0.2
0.6
0.8
0.5
5
6
mV
mV
Input Offset Current
(Note 4)
0.5
10
30
1
10
20
4
25
50
pA
pA
Input Bias Current
(Note 4)
25
50
150
40
100
150
70
200
300
pA
pA
Input Resistance
(Note 4)
1011
Offset Voltage Drift
(Note 4)
1
Offset Current Drift
(Note 4)
20
Bias Current Drift
(Note 4)
0.5
1.5
0.8
Large Signal Voltage Gain
Vs±15V,IOUT= ±2 mA
VOUT= ±12V(± 11.5Y)
Vs= ± 15V.IOUT= ±0.5 mA
VOUT±12V
300
100
50
250
100
300
1200
1011
3
2
5
0
3
/LVrC
50
fA/·C
3
1.4
pArC
100
50
250
100
300
10
1200
1011
800
25
15
50
30
V/mV
VlmV
V/mV
VlmV
Common-Mode Rejection
-13V (-12.5V)~VCM~14V
Vs= ±15V
130
110
100
130
110
100
110
96
90
dB
dB
Power Supply Rejection Ratio
±2.5V~Vs~
118
100
96
118
100
96
100
84
80
dB
dB
Supply Current
(Note 4)
0.3
0.6
0.8
0.3
0.8
1
0.3
0.8
1
mA
mA
Output Short-Circuit Current
TJ= 150·C
±20V
±15
mA
Note 1: The Inputs are shunted with back·to·back diodes for overvoltage protection. Therefore, excessive current will flow If a differential Input voltage in excess of
1V is applied between the Inputs unless some limiting resistance is used. In addition, a 2 kO minimum resistance in each input Is advised to avoid possible latch up
inRiated by supply reversals.
Nole 2: The maximum operating-junction temperature Is 150'C for the LM11 and 85'C for Ihe LM11C(L). Devices must be derated at 150'C/W for the metal can
and 155'C/W lor the plastic DIP. The metal can has a thermal resistance of 45'C/W for the junction to case If a heat sink Is used.
Note 3: Current limiting protects the output when RIs shorted to ground or any voltage less than the supplies. With continuous ove~oads, package dissipation must
be taken into account and heat sinking provided when necessary.
Nole 4: These specifications apply for Y- + 2Y (I.SV) s: YCM s: y+ - 1V and ±2.5Y s: Ys s: ±20Y, unless otherwise specified. Normal typeface Indicates
25'C limits. Boldface t,pe Indicates limits for full-temperature range operaUon. This is - 55'C s: _.TJ s: 125'C for the LMII and O'C s: TJ s: 70'C for
the LMllC(L).
Nole 5: Referto RETSllX for LMII military specifications.
3-336
riii!:
....
Typical Characteristics
Input Bias Current
150
~
...z
..8
,z.SV
5
'Z.5V
~
~~Ml1~\
r-..,
so
K
LMl1
-SO
"1\
so
100
""
o
-50
150
l'
500
TMIN ~ TJ ~TMAX
-MAXIMUM
---TYPICAL
zoo
100
'L/
,/
'//
LMl1}1
ZO
/
. / ./
10
i.
LMl1
,/
~>
...g~
ZO
l'
10
~
CURRENT _
.
2
J
1 I
..... i-J.I
-50
50
100
lit
:a
lZ0
......~
.
OJ
~
.....~
..
..:ii
.
-
-
I.... Fii'l i;;:.,
Vs ~ '15V
4VOS·10.V
4VOS' ZO.V (1Z5'C)
2
5
~
o
- - --
-10
-20
100
""8
.!l!
.
:a
~
;;:
~
;
~
"
100
1.
10' 100.
FREQUENCY (Hz)
ii...
~
......
.~
2
>
-55'C
120
I'
110
,
100
.
.
z
BO
60
OJ
>-
~
...
..... .. ...
10-'
lZS'C
I
o
lZ
16
SUPPLY VOLTAGE (.V)
•
Supply Current
400
---125'C
-25'C
- - - -55'C
100
§
10-
... ~ Kilc
~
0.01
1M
.~
130
Supply Rejection
;;
400
'~O.1 Hz
VSAT ·1.5V
RL:>ZVS (.n)
m
;!:
~
0
120
:a
~
1
140
s
2
r\.
10
300
Large Signal Voltage Gain
1
20
zoo
TIME(s)
\4VOS <100.V
40
150
---125°C
25'C
-55'C
±Z.5V~
>
~~
1
100.
~
60
,JfIJ\~A.
r.\t
~.
i~
_2
.6.VCMmax
CMRR,
BO
Output Saturation Threshold
~
w....
>
~~
VS' mv
"'J
100
TEMPERATURE lOCI
V·
ill
2
~
10'
......... -4~
2
~
NEGATIVE
o
140
2
1 I
l;-v-
1.
10
c
VOLTAGE100
'MAX' 1 Hz
Rs =100kO
TJ' 25'C
:>
Common·Mode Rejection
s: s ;: lzov
4VOS<10.V
"~
..~~'"
'" ..~
2
FREQUENCY (Hz)
I\. v· ~OSI+IVE
I I I
±Z.5~
20
1-- -
zoo
Common·Mode Limits
r- :---.
'!'
0.5 F'---+':::iO~-!.o''--f---I
Input Noise
Z.
SOURCE RESISTANCE (Il)
-1
r-
1.0
SOURCE RESISTANCE (Il)
50
10
!::
iii!:
....
....
o
ISO
5'
100
~
100
100
.... ,
..~... "
.s
j
40
l
II
20
I
V-
o
-20
zoo
10
LOAD CURRENT ('mA)
100
1.
........iii!:
o
0.2
TJ = 25°C
~
_ ...r-
r- r-
./
so
> 500
--LM11 , , '
o
~
Input Noise
10.
//
/
/ / 1I
so
~
....
.....
r.....
r-
20
TEMPERATURE ('C)
Drift: Single Source
Resistor (Unbalanced)
>
~...
1
"-
TEMPERATURE ('CI
to:
50 TJ'25'C
~
i;;
-50
.
......~"
100
I
20V
.~
:--.
.....;;
...... r-.., t-....
~
>
.:I
~
LJl1CL1
0;
F
Vs
\
100
::!
~
a;
Input Offset Current
s: Vs ~ zov
Offset: Single Source Resistor
(Unbalanced)
10'
100.
FREQUENCY (Hz)
1M
10M
1
10
100
SUPPLY VOLTAGE (.V)
TL/H/5653-2
3·337
~r---------------------------------------------------------------~
o
....
....
Typical Characteristics (Continued)
:i
Open Loop Response
~
.....
110
o
....
....
:i
.....
........
~
:i
~
-,
100
.
;;;
!!!
80
C
co
60
~,
~
">
>
..... GAIN
135
;ll
Z;
PHASE;'"
~
co
Follower Final Settling Time
100
110
,-
40
20
0.1
10
100
lk
~
,-"
45 -
-- ~
---Cc'O
---Cc-l000pF
-ZO
.....
90 ~
.s
~
co
10
"
!:.
E~ f=
r=
~;
POSITIVE STEP: 10",
NEGATIVE STEP: 60",
AVOUT -ZOV
~ R,-R,-ZOk
VS"'5V
~
0.1
10k lOOk 1M
o
0.1
10
20
0.01
10
C
'
100
·30
40
50
Z.O
i,\
o
10
Closed Loop
Output Impedance
I....
1.8
'"cot;
."
:'i!
~
1=
~
co
'"~
>
"
"-
,. ,II
, L;
I.Z
1.1
1/ ,I'
L...
1/
~r;.
L....
10k
EXTERNAL COMPENSATION CAPACITOR (pFI
~
1,'
..
jOO,F.4.1k
"I'.
I
..!
0iOI ~F.l~OOrFI1Zk
1.0
10- 10 10-9
10-8 10-1
"-"-
10-&
CAPACITIVE LOAD (FI
§
..
..~ .""~
.. ..
g "~
100
lOUT' ±1 mA ~.t.- 11"'~
t- t--~v·;OOO
10-5
-;
./'
~
3
I
lk
~
1.1
I-t-IooJ Flo
1.6
1.4
10
r;;o
-3mA~IL~3mA
AV=+1
"-
lk
~~ ~
TIME (",I
Stability With
Over-Compensation
1=
T
SLEW DELAY:
POSITIVE STEP: 10",
NEGATIVE STEP: 50",
t - AVDUT= ZOV
R,- R,"ZOk
Vs - "IV
TIME",,)
~
1=
I
~E
~
t-
1\
Slew Rate
3.
10
">
'"co
'"ffi
FREQUENCY (H.I
'"
~
...
Inverter Final Settling Time
100
~ SLEW DELAY:
10
J
Ii
Ii
co
Av' 1
/
0.1
,;
0.01
10
100
lk
10k
lOOk
1M
10M
FREQUENCY (H,I
TUH/5653-3
Application Hints
tor connections. Problems can be avoided by keeping low
level circuitry away from heat generating elements. Mounting the IC directly to the PC board while keeping package
leads short and the input leads close together can also
help.
With the LM11 there is a temptation to remove the bias-current-compensation resistor normally used on the non inverting input of a summing amplifier. Direct connection of the
inputs to ground or a low-impedance voltage source is not
recommended with supply voltages greater than about 3V.
The potential problem involves reversal of one supply which
can cause excessive current in the second supply. Destruction of the IC could result if the output current of the second
supply is not limited to about 100 mA or if there is much
more than 1 /J-F bypass on the supply buss.
Just disconnecting one supply will generally involve reversal
because of loading to the other supply both within the IC
and in external Circuitry. Although difficulties can be largely
avoided by installing clamp diodes across the supply lines
on every PC board, a conservative design would include
enough resistance in the input lead to limit current to 1b mA
if the input lead is pulled to either supply by internal currents. This precaution is by no means limited to the LM11.
When working with circuitry capable of resolving picoam·
pere level signals, leakage currents in circuitry external to
the op amp can significantly degrade performance. High
quality insulation is a must (Kel-F and Teflon rate high).
Proper cleaning of all insulating surfaces to remove fluxes
and other residues is also required. This includes the IC
package as well as sockets and printed circuit boards.
When operating in high humidity environments or near O'C,
some form of surface coating may be necessary to provide
a moisture barrier.
The effects of board leakage can be minimized by encircling
the input circuitry with a conductive guard ring operated at a
potential close to that of the inputs. For critical applications,
dual-in-line packages are available that include input guard
pins.
Electrostatic shielding of high impedance circuitry is advisable.
Error voltages can also be generated in the external circuitry. Thermocouples formed between dissimilar metals can
cause hundreds of microvolts of error in the presence of
temperature gradients. The most troublesome thermocouples are the junction of the IC package and the printed circuit board (35 /J-V t=C for copper-kovar) and internal resis-
3-338
~
.....
Application Hints (Continued)
Input Guarding
Input guarding can drastically reduce surface leakage. Layout for metal can is shown here. Guarding both sides of
board is required. Bulk leakage reduction is less and depends on guard ring width.
Input Protection
Current is limited by R2 even when input is connected to
voltage source outside common mode range. If one supply
reverses, current is controlled by R1. These resistors do not
affect normal operation.
1-\
BALANCE
v'
••
,.'"r.....__"111",.._--.
'.1
OUTPUT,s
1
.....
......
ri:
.....
.....
~
ri:
.....
.....
o
r-
A2
10k
1,
OUTPUT
COMPENSATION. 5
v_I
TL/H/5653-5
Input resistor controls current when input exceeds supply
voltages, when power for op amp is turned off or when output is shorted.
BOTTOM VIEW
TL/H/5653-4
Guard ring is connected to low impedance point at same
potential as sensitive input leads. Connections for various
op amp configurations are here.
.,
.,
RZ
INPUT--'lM_t----'IIVIr---,
OUTPUT
10k
INPUT-WIr-...<.!
TL/H/6653-6
OUTPUT
Balancing And Over-Compensation
Over-compensation will improve stability with capacitive
loading (see curves). Offset voltage adjustment range is determined by balance potentiometer resistance as indicated
in the table.
.3
OUTPUT
CI
INPUT
CIt
.,
T
.z
..,.
OUTPUT
INPUT
TL/H/5653-7
3-339
t
See .tability with
over-compensation curve
TUH/5653-8
mln.adl
range
R
±4mV
±2
±O.8
±O.4
lOOk!}
10k
3k
Ik
•
~r---------------------------------------------------------~
......
:i....
......
:i
.......
.....
(J
(J
Application Hints (Continued)
Resistance Multiplication
A high-Input-Impedance ac amplifier for a piezoelectric
transducer. Input resistance of 880 MO and gain of 10 is
obtained.
Equivalent feedback resistance is 10 GO, but only standard
resistors are used. Even though the offset voltage is multiplied by 100, output offset is actually reduced because error
is dependent on offset current rather than bias current. Voltage on summing junction is less than 5 mV.
:s
.......
..
R3
x, c::I
~
'::"
I.
OUTPUT
.,
.IM
1%
.
Vour
Rf=R2
(1+~)
••
1%
R2»R3iiR4
!II
""..
.3
III
1....
gain trim
TLlH/5653-10
R =R1
IN
TL/H/5653-9
Follower input resistance is 1 GO. With the input open, offset voltage is multiplied by 100, but the added error is not
great because the op amp offset is low.
(1+~)
RS
A =R2+RS+R4
v
R2+RS
Cable Bootstrapping
Bootstrapping input shield for a follower reduces cable capacitance, leakage and spurious voltages from cable flexing. Instability can be avoided with small capacitor on input.
.3
'"
Your
V'N
"'
OUTPUT
'OIl
.,
INPUT
I•
....
TLlH/5653-12
TL/H/5653-11
With summing amplifier, summing node is at virtual ground
so input shield is best grounded. Small feedback capacitor
insures stability .
This circuit multiplies RC time constant to 1000 seconds
and provides low output impedance.
•3
1alll
R1
RZ
I.,UT ......V'\I'.............'~OII"'-_...l/
.,
OUTPUT
INPUT
OUTPUT
TL/H/5653-13
TL/H/5653-14
3-340
r
Application Hints (Continued)
Differential Amplifiers
This differential amplifier handles high input voltages. Resistor mismatches and stray capacitors should be balanced
out for best common-mode rejection.
Two op-amp instrumentation amplifier has poor ac common
mode rejection. This can be improved at the expense of
differential bandwidth with C2.
INPUTS { -
'IOVMAX
..,.
.......Wlr-......-
8'
''''
,%
OUTPUT
OUTPuT
....-..:j
IODM
czl
IDpF
:s::
........
or
m
8"
',.
M
....
Q
r
,.8'·
CI
5p'
:s::
........
.....
r
:s::
....
vs= ±15V
t
,...
8,1
Trim lor de CMRR
*Trim lor ae CMRR
• Gain set
TLlH/5653-15
t Trim lor de CMRR
10=10 Hz
High gain differential instrumentation amplifier includes input guarding, cable bootstrapping and bias current compensation.
Differential bandwidth is reduced by C1 which also makes common-mode rejection less dependent on matching of input
amplifiers.
v'
,,,..
8",.
,,,.
811
..
8'
20Dk
.."
.,.
8'0'
1M
INPUTS
AI ......
'Dk
OUTPUT
8"
lOOk
,.
,,,.
m
8'
tt Current zero
* Voltage balance
'n Gain
t de CMRR
.... acCMRR
TLlH/5653-16
For moderate-gain instrumentation amplifiers, input amplifiers can be connected as followers. This simplifies circuitry, but A3
must also have low drift.
RI =R3; R2=R4
Av=~
RI
tTrim lor de CMRR
tSet lor Be CMRR
INPUT
OUTPUT
TL/H/5653-17
3-341
•
..J
o
....
....
:i
..J
o........
:l......
........
:l
Application Hints (Continued)
Bias Current Compensation
Precise bias current compensation for use with unregulated
supplies. Reference voltage is available for other circuitry.
This circuit shows how bias current compensation can be
used on a voltage follower.
v'
"'
'"'"
A.
'" HZ
-.
0,
1.21/
INPur ....._ - - ' !
TL/H/5853-18
Voltmeter
High input impedance millivoltmeter. Input current is proportional to input voltage, about 10 pA at full scale. 'Reference could be
used to make direct reading linear ohmmeter.
_v·
"'..
r - - -....~·v
v'-.---.----.
.IB
U.
HZ
"'
01
LM311
1.2V
Til
I .v
-L
" q
HI
10k
.ID
••
!-?c
NfDfF
..L~
BATTERIES
IJM
NO"
V·
Til
I .V
-L
'IB
Uk
v- ....-
_ _- -...
...
"
SCALE
....- - - - I ..----~-....- .........- -......;I~.
HI
HI
.ID
Ult
,."
'",.
0"
."
U.
to
01
IN41i7
02
IN4I7
R14-
15k
• 1 x scale calibrate
t 3 X scale calibrate
tt Includes reversing switch
RANGE
ImV
IOmV
loamV
IV
TUH/5853-19
3·342
ri:
....
Application Hints (Continued)
Ammeter
Current meter ranges from 100 pA to 3 mA full scale. Voltage across input is 100 /LV at lower ranges rising to 3 mVat 3 mAo
Buffers on op amp are to remove ambiguity with high-current overload. Output can also drive DVM or DPM.
31Z
....
......
ri:
........
~
ri:
........
o
3.3211
33.211.
r-
v'
3311e
R'
I"
~IZ'
'M
D'
LMlI5
I.IV
...
'OM
RI
'DDM
,.
R3
3..
,.
,.
R5
,..
RI
'NPUT {:
...
R'I
t 1 X scale calibrate
• 3 x scale calibrate
tt Includes reversing switch
Current Source
Precision current source has 10 /LA to 10 mA ranges with output compliance of 30V to -5V. Output current is fully adjustable on
each range with a calibrated. ten-turn potentiometer. Error light indicates saturation.
ON/DFF
REVERSE
R'
3.lk
ERROR!
BATTERY
UK
N
I'-=I
1>5.'V'.1.
IV
•
.
1,111
R'
IDU
t-___-t___.......JiJ''i·Ir--o<~R-A••;.;.E01D iliA
,."'
1k
·Calibrate range
'mA
"'
1.5k
I
~
3-343
tSelect for leBo';; 100 pA
""
1000M
lUnA
TLIH/5653-21
..J
o
....
....
::Ii
..J
.....
o
....
....
:I.....
....
....
Application Hints
(Continued)
Fast Amplifiers
These inverters have bias current and offset voltage of
LM11 along with speed of the FET op amps. Open loop gain
is about 140 dB and settling time to 1 mV about 8 /loS. Overload-recovery delay can be eliminated by direct coupling the
FET amplifier to summing node.
..J
.
,.,
.,
I.
::Ii
Follower has 10 /loS setting to 1 mV, but signal repetition
frequency should not exceed 10kHz if the FET amplifier is
ac coupled to input. The circuit does not behave well if common-mode range is exceeded.
.,
''''''' .....w,,......t---''!
10k
'.'.T~-'\"""_"
C1
ISIpF
.,
"1A7"F
I.
Cl
til..'
.,
.,..
INPUT
.,
AI
.,..
.,.,
1N451
lMIl
.,
.,
DUTPUT
1M
y-
••
11k
TUH/5653-23
Heater Control
Proportional control crystal oven heater uses lead/lag compensation for fast settling. Time constant is changed with
R4 and compensating resistor RS. If Q2 is inside oven, a
regulated supply is recommended for 0.1°e control.
C1
IDOpF
.,
OUTPUT
1M
C3
.. ,F
TUH/5653-22
This 100X amplifier has small and large signal bandwidth of
1 MHz. The LM11 greatly reduces offset voltage, bias current and gain error. Eliminating long recovery delay for
greater than 100% overload requires direct coupling of A2.
to input.
"*
LII33IZ
..
,..
,-.,
%.IV
.,.
I."'T~W,~~--+-=I
C'
....F
TL/H/5653-25
• Solid tantalum
OUTPUT
t Mylar
*
Cloea thermal coupling between senaor and oven shell Is recommended.
"
"F
TL/H/5653-24
3-344
Ii:...
.......r-
Application Hints (Continued)
Leakage Isolation
Switch leakage in this sample and hold does not reach storage capacitor.
v'
INPUT
• Polystyrene or Teflon
OUTPUT
""t-+--"I.,.,.--1t--_...
SAMPLE ..........
U
tRequired if protected·
gate switch Is used
......a:
~
......~
o
r-
TUH/5653-26
A peak detector designed for extended hold. Leakage currents of peak-detecting diodes and reset switch are absorbed before
reaching storage capacitor.
'
••
!G'
D'
IN9'4
C2
50pF
OUTPUT
INPUT
300 p.S min single pulse
tRequired if 01 has gate·
protection diode
'Polystyrene or Teflon
200 p.S min repetitive pulse
300 Hz max sine wave error < 5 mV
."'T ......,:::.:=UI+TL/H/5653-27
Standard-Cell Buffer
Reset is provided for this integrater and switch leakage is
isolated from the summing junction. Greater precision can
be provided if bias-current compensation is included.
Battery powered buffer amplifier for standard cell has negligible loading and disconnects cell for low supply voltage or
overload on output. Indicator diode extinguishes as disconnect circuitry is activated .
.
,
INPUT'-'\M~~
OUTPUT
••..
O.
••
3NIG:J
IN451
.,'
10k
.,
."
1·
T
81
I
"
..L
••
..,
....
.2
')~..
I
N
DI
v'
'Polystyrene or Teflon
tRequired if protected'gate
switch Is used
RESET
u
TLiH/5653-28
'Cannot have gale protection diode; VTH > VOUT
3-345
•
~
...:E...
.....
......
..........:=I
(J
~
(J
r-----------------------------------------------------------------------------,
Application Hints (Continued)
Logarithmic Amplifiers
Unusual frequency compensation gives this logarithmic converter a 100 ,...s, time constant from 1 mA down to 100 ,...A, increasing from 200,...s to 200 ms from 10 nA to 10 pA. Optional bias current compensation can give 10 pA resolution from -SsoC to
100"C. Scale factor is W/decade and temperature compensated.
"
47a,F
:::Ii!
~
."
i.n
." .",.
&.1111
i.l1M
"r<.....'Io'..•........-"oI\I\,o-1~5v
,.'...3
.
.,
IUk
,%
.,
.s
HIt
Uk
Ik
"
.3
TO,lt,..,
a. Set RII for VOUT=O at IIN= 100 nA
b. Set RS for Vour=3V at IIN=IOO pA
c: Set R3 for VOUT= -4V at IIN= 10 pA
t 3500 ppM/'C. Type QSI available
from Tel Labs Inc., Londonderry. N.H.
Ught meter has eight.cJecade range. Bias current compensation can give Input current resolution of better than ± 2 pA over 1SoC
to SsoC.
"
o.U02ZJ,lf
.3
D",IoIfT
v-
':'
...
'2k
.,
••
"
Uk
••
.,
v-
"
'ID
':'
RlIt.
'M
Q3
ZN425D
a-IDaliA
*
VI =O@ IIN= 100 nA
t VI = -0.24V@IIN=IOpA
• MI =O@IIN=IO pA
"MI=fs@IIN=1 mA
TL/H/5653-29
3-346
........~
......
r........==
Schematic Diagram
~
~
....
....
o
r-
'--+----<~. OUTPUT
'"""1-+"':'+-+-+-+--1'
·
L . . . . . - -..........._ _ _
,'"..
+-+-___-+-__---J_-~----!.vTLIH/5653-30
Definition of Terms
Common-mode reJection: The ratio of the input voltage
range to the change in offset voltage between the extremes.
Temperature drift: The change of a parameter measured
at 25'C and either temperature extreme divided by the temperature change.
Power Supply Rejection Ratio: The ratio of the specified
supply-voltage change (either or both supplies) to the
change in offset voltage between the extremes.
Supply current: The current required from the power
source to operate the amplifier with the output unloaded
and operating in the linear range.
Input offset voltage: That voltage which must be applied
between the input terminals to bias the unloaded output In
the linear region.
Input offset current: The difference in the currents at the
Input terminals when the output is unloaded in the linear
region.
Input bias current: The absolute value of the average of
the two input currents.
Input resistance: The ratio of the change in Input voltage to
the change in input current on either input with the other
grounded.
Large signal voltage gain: The ratio of the specified output
voltage swing to the change in differential input voltage required to produce it.
3-347
....
:i
~ r-----------------------------------------------------------------------~
~National
~ Semiconductor
LM 12 (L/C/CL) 150W Operational Amplifier
General Description
The LM12 is a power op amp capable of driving ±35Vat
±10A while operating from ±40V supplies. The monolithic
IC can deliver 150W of sine wave power into a 40 load with
0.Q1 % distortion. Power bandwidth is 60 kHz. Further, a
peak dissipation capability of 800W allows it to handle reactive loads such as transducers, actuators or small motors
without derating. Important features include:
• input protection
• controlled turn on
• thermal limiting
• overvoltage shutdown
• output-current limiting
• dynamic safe-area protection
The IC delivers ± 1OA output current at any output voltage
yet is completely protected against overloads, including
shorts to the supplies. The dynamic safe-area protection is
provided by instantaneous peak-temperature limiting within
the power transistor array.
The turn-on characteristics are controlled by keeping the
output open-circuited until the total supply voltage reaches
14V. The output is also opened as the case temperature
exceeds 150"C or as the supply voltage approaches the
BVCEO of the output transistors. The IC withstands overvoltages to 100V.
This monolithic op amp is compensated for unity·gain feedback, with a small-signal bandwidth of 700 kHz. Slew rate is
9V1 p.s, even as a follower. Distortion and capacitive-load
stability rival that of the best designs using complementary
output transistors. Further, the IC withstands large differential input voltages and is well behaved should the commonmode range be exceeded.
The LMt2 establishes that monolithic ICs can deliver considerable output power without resorting to complex switching schemes. Devices can be paralleled or bridged for even
greater output capability. Applications include operational
power supplies, high-voltage regulators, high-quality audio
amplifiers, tape-head positioners, x-y plotters or other servo-control systems.
.
The LM12 is supplied in a four-lead, TO-3 package with Von the case. A gOld-eutectic die-attach to a molybdenum
interface is used to avoid thermal fatigue problems. Two
voltage grades are available; both are specified for either
military or commercial temperature range.
Typical Application *
Connection Diagram
4·pin glass epoxy TO·3
1.5n
socket is available from
AUGATINC.
r-+-"M-.....o-J nnil...._~OUT
OUT
1.1k
IN......,I--I
1k
common
ground?
point
":"
+IN
V"(CASE)
TUH/8704-2
TUH/8704-1
Bottom View
Order Number LM12K, LM12CK or LM12CLK
See NS Package Number K04A
3-348
'Low distortion (0.01 %) audio amplifier
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Total Supply Voltage LM12/LM12C
100V
LM12L1LM12CL
sov
Input Voltage
Note 1
Output Current
Internally Limited
Junction Temperature
Note 2
- 65b C to 150'C
Storage Temperature Range
SOO'C
Lead Temperature (Soldering. 10 seconds)
ESD Rating to be Determined.
Operating Ratings
Total Supply Voltage
LM12/LM12C
LM12L1LM12CL
15Vto SOV
15Vt060V
Electrical Characteristics (Note S)
Parameter
Input Offset Voltage
±10V ~ Vs
VCM = 0
~
LM12
LM12L
LM12C
LM12CL
Limits
Limits
2
7/15
15/20
mV(max)
Typ
25'C
Conditions
±0.5VMAX,
Units
Input Bias Current
V
+ 4V ~ VCM ~ V+ -2V
0.15
0.S/1.0
0.7/1.0
p.A (max)
Input Offset Current
V
+4V ~ VCM ~ V+ -2V
O.OS
0.1/0.3
0.2/0.3
p.A (max)
Common Mode
Rejection
V
+4V ~ VCM ~ V+ -2V
S6
75/70
70/65
dB (min)
Power Supply
Rejection
V+ = 0.5 VMAX.
-6V ~ V- ~ -0.5 VMAX
V- = -0.5 VMAX,
6V ~ V+ ~ 0.5 VMAX
90
75/70
70/65
110
SO/75
75170
dB (min)
1.S
4
5
2.2/2.5
5/7
8
2.2/2.5
517
V (max)
V (max)
V (max)
100
50
50/30
20/15
SO/20
15/10
V/mV(min)
V/mV(min)
= 50W, tON = 65 ms
SO
50
100
p.V/W(max)
Output Saturation
Threshold
tON = 1 ms,
ilVIN = 5 (10) mV,
lOUT
= 1A
8A
10A
dB (min)
Large Signal Voltage
Gain
tON = 2ms,
VSAT = 2V, lOUT = 0
VSAT = SV, RL = 40
Thermal Gradient
Feedback
POISS
Output-Current
Limit
toN
= 10 ms, VOISS = 10V
1S
16
16
A (max)
tON
= 100 ms, VOISS = 58V
1.5
1.5
1.0/0.6
1.7
0.9/0.6
1.7
A (min)
A (max)
LM12/LM12C
tON = 100 ms, VDlSS
Power Dissipation
Rating
DC Thermal Resistance
AC Thermal Resistance
= 78V
tON = 100 ms, VOISS = 20V
VOISS = 58V
(Note 4)
VOISS = 20V
VOISS = 58V
(Note 4)
0.7
0.6/0.4
0.5/0.35
A (min)
100
SO
90/40
58/35
SO/55
52/35
W(min)
W(min)
2.S
2.7
2.6
4.0
2.9
4.5
'C/W(max)
'C/W(max)
1.6
1.9
2.1
'C/W(max)
Supply Current
120/140
mA(max)
60
80/90
VOUT = 0, lOUT = 0
Note 1. Neither input should exceed the supply voltage by more than 50 volts nor should the voltage between one input and any other tenmlnal exceed 80 volls for
the LM12/LM12C or 60 volls for the LM12L/LMI2CL.
Note 2. Operating iunction temperature is internally limited near 225"C within the power transistor and 160'C for the control circuitry.
Note 3. The supply voltage Is ±40V (VMAX = BOV) for the LM12/LM12C and ±30V (VMAX = 60V) for the LMI2L/LMI2CL. unless otherwise speCified. The
voltage across the conducting output transistor (supply to output) is VOISS and Internal power dissipation is POISS. Temperature range is - 55'C ,,; Tc ,,; 125'C for
the LM12/LM12L and O'C ,,; Tc ,,; 70'C for LM12C/LM12CL, where TC is the case temperature. Standard typeface indicates limits at 25'Cwhlle botdlace type
relera to IImlta or special condlOon. over lull temperature range. With no heat sink, the package will heat at a rate of 35'C/sec per 100W of Internal
dissipation.
Note 4. This thenmal resistance is based upon a peak temperature of 200'C in the center of the power transistor and a case temperature of 25'C measured at the
center of the package bottom. The maximum junction temperature of the control circuitry can be estimated based upon a de thermal resistance of O.!1'C/W or an ac
thermal resistance of 0.6'C/W for any operating voltage.
Although the output and supply leads are resistant to electrostatic discharges from handling, the Input leads are not.
The part should be treated accordingly.
S-349
•
....
:i
C'I
Output-Transistor Ratings (guaranteed)t
Safe Area
DC Thermal Resistance
Pulse Thermal Resistance
6
10
TC=25°C - - TJ=200"C
700C--. -~I--
.::!.
!
5.0
'\'
,,,"~=D.3'"
" I'..
,~
"I"
I' ""~t:::
t-..
2.0
Tc=25O C
TJ =200"C
1.0
0.5
o
125o C -
3.0
~
........
.
2
20
80
40
I.'
I'..
.....
~
de
80
o
~
,
1/ ,
./ ,
-
60
40
r--i-""
.....
L.I "
......
~
20
VCE =4OV Tc=25O C
58V--- TJ =200"C
78V--
~
80
o i-"
0.1
1.0
COLLECTOR-ElIITTER VOLTAGE (V)
COLLECTOR-ElIITTER VOLTAGE (V)
10
100
PULSE wtDlH (ml)
TLlH/8704-3
tLMI2/LMI2L The power rallngs of the LMI2C/LMI2CL are IO'percent less at 20V and 15·percent less at 60V, with a corresponding increase in thermal
resistance and decrease In safe area current.
Typical Performance Characteristics
Pulse Power Limit
\
I I IIILTLly=23O"C
i
- I-
100
Tc=~Jg"
g
Pulse Power Limit
120
500 l""'T'"tmrrrm'-r'Mlmrn
111II""'-'I"TTTrnn
...... ~250C
80
200
100
I"
111111111
~
11111
1.0
80
0.1
o
o
100
lI1IE (ma)
B
-
tsA
t\A
o
-so
s
~
IDO
CASE TElIPERTAllJRE (0 C)
0.8
1.6
1.2
!lYE (ma)
30
Follower Pulse Response
.....
ISO
I
r
20
I
'""-
=
l-
VIN =tI5V
I
so
004
20
"
UA
Tc=25O C
I I
o
80
I II
r--. ;;::: ~J~ f-- -
r-
60
40
Large Signal Response
30
...... I-
Tc= 100"C
o
20
VS=t30V
Vour=O
'-'\
COLLECTOR-EMITTER VOLTAGE (V)
Output Saturation Voltage
toN=1 ms
12
,..;;:: :-
-
'oN = lOOms
TUY= 2300 C
-
20
10
Peak Output Current
Tc=IJ~C ~
r-
60
Tc=J~\
16
I
VS=*30V
THO~5X
RL=44
10
I
!\
\
-30
lOOk
FREQUENCY (Hz)
\
\11" ,..-
-20
o
10k
\
1M
o
10
15
20
25
30
!lME (PI)
TL/H/B704-4
3·350
r-
Typical Performance Characteristics
so Large Signal Gain
~
~
~
t!:
!:l
0
>
....:s:::
(Continued)
N
Thermal Response
.co
Total Harmonic Distortion
0.1
SbURCk_
30
- -- -':F- -
......
~
'"
20
VS=t30V
Vour=t25V
10 RL=4A
1=100Hz
o
-so
I,'
1/.'
~PON=50W
-1
50
100
150
II
o
Frequency Response
,,
"
,
60
180
.co
"'\
20
~
90
!!il
45
I,,\:
10
100
1k
Q
if
1'\
-20
80
100
-45
10k lOOk 1M 10M
80
60
g
I
IL=O
~,
1.0
lD"
,
~
z
0
§
--
.co
iil
lA
20
0.1
lOOk
1M
0
100
10M
lk
fREQUENCY (Hz)
Input Bias Current
10k
lk
fREQUENCY (Hz)
Output Impedance
. fREQUENCY (Hz)
0.8
60
1
135
..... 1\
PHASE
10
225
I\..GAIN
'-
~
TlWE (mo)
-....
80
SINK
I
20
CASE TEMPERATURE (OC)
100
g
~ om
1
lk
10k
lOOk
1M
fREQUENCY (Hz)
Input Noise Voltage
Common Mode Rejection
100
I
l"-
·Vs=t30V
0.6
80
.~
i'-.
lD"
~
.5
004
~
~
\
8
D.2
z
0
,VCU =25V
§
~
iil
Vcu=-25V
1
o
I'" :::::::
I
-50
""'" ---r=
50
100
150
10 L...W.IlllJJl-Ll.
10
100
CASE l[IjPERATURE (0 C)
100
80 -louT=O
.....
60
120
1
1
~25OC
1
100
1
1
1
o
o
10
20
SUPPLY VOLTAGE (tv)
10k
lk
lOOk
10k
~
I......
I
1
1
Tc=250 C
lour=O -
1
1
1
1
~
~
1-20
1
lW
Jlill
20
OUTPUT VOLTAGE (V)
0.5
Cross-Supply Current
004
r-V~UJ
1
...... ~ ~~s=UOV _
_Vs=t20V
lOOk
fREQUENCY (Hz)
1
vs~uhv
TC=-550 C
20
20
lk
Supply Current
1
- f- TC~125:s.
......... -r
.co
fREQUENCY (Hz)
Supply Current
- VOUT=O
,
60
g
D.3
!
D.2
,
Vour=t25V
ILiO
0.1
o
--
1k
3k
,i.
F'R;.=4A
10k
30k
lOOk
fREQUENCY (Hz)
TL/H/8704-5
3-351
,..
~ r-------------------------------------------------------------------------------~
:i
Application Information
The current in the supply leads is a rectified component of
the load current. If adequate bypassing is not provided, this
distorted signal can be fed back into internal Circuitry. Low
distortion at high frequencies requires that the supplies be
bypassed with 470 fLF or more, at the package terminals.
GENERAL
Twenty five years ago the operational amplifier was a specialized design tool used primarily for analog computation.
However, the availability of low cost IC op amps in the late
1960's prompted their use in rather mundane applications,
replacing a few discrete components. Once a few basic
principles are mastered, op amps can be used to give exceptionally good results in a wide range of applications
while minimizing both cost and deSign effort.
The availability of a monolithic power op amp now promises
to extend these advantages to high-power designs. Some
conventional applications are given here to illustrate op amp
design principles as they relate to power circuitry. The inevitable fall in prices, as the economies of volume production
are realized, will prompt their use in applications that might
now seem trivial. Replacing single power transistors with an
op amp will become economical because of improved performance, simplification of attendant circuitry, vastly improved fault protection, greater reliability and the reduction
of design time.
Power op amps introduce new factors into the design equation. With current transients above 10A, both the inductance
and resistance of wire interconnects become important in a
number of ways. Further, power ratings are a crucial factor
in determining performance. But the power capability of the
IC cannot be realized unless it is properly mounted to an
adequate heat sink. Thus, thermal deSign is of major importance with power op amps.
This application summary starts off by identifying the origin
of strange problems observed while using the LM12 in a
wide variety of designs with all sorts of fault conditions. A
few simple precautions will eliminate these problems. One
would do well to read the section on supply bypassing,
lead Inductance, output clamp diodes, ground loops
and reactive loading before doing any experimentation.
Should there be problems with erratic operation, blowouts, excessive distortion or oscillation, another look at
these sections Is in order.
The management and protection circuitry can also affect
operation. Should the total supply voltage exceed ratings or
drop below 15-20V, the op amp shuts off completely. Case
temperatures above 150'C also cause shut down until the
temperature drops to 145'C. This may take several seconds, depending on the thermal system. Activation of the
dynamic safe-area protection causes both the main feedback loop to lose control and a reduction in output power,
with possible oscillations. In ac applications, the dynamic
protection will cause waveform distortion. Since the LM 12 is
well protected against thermal overloads, the suggestions
for determining power dissipation and heat sink requirements are presented last.
LEAD INDUCTANCE
With ordinary op amps, lead-inductance problems are usually restricted to supply bypassing. Power op amps are also
sensitive to inductance in the output lead, particularly with
heavy capacitive loading. Feedback to the input should be
taken directly from the output terminal, minimizing common
inductance with the load. Sensing to a remote load must be
accompanied by a high-frequency feedback path directly
from the output terminal. Lead inductance can also cause
voltage surges on the supplies. With long leads to the power
source, energy stored in the lead inductance when the output is shorted can be dumped back into the supply bypass
capaCitors when the short is removed. The magnitude of
this transient is reduced by increasing the size of the bypass
capaCitor near the IC. With 20 fLF local bypass, these voltage surges are important only if the lead length exceeds a
couple feet (> 1 fLH lead inductance). Twisting together the
supply and ground leads minimizes the effect.
GROUND LOOPS
With fast, high-current circuitry, all sorts of problems can
arise from improper grounding. In general, difficulties can be
avoided by returning all grounds separately to a common
point. Sometimes this is impractical. When compromising,
special attention should be paid to the ground returns for
the supply bypasses, load and input signal. Ground planes
also help to provide proper grounding.
Many problems unrelated to system performance can be
traced to the grounding of line-operated test equipment
used for system checkout. Hidden paths are particularly difficult to sort out when several pieces of test eqUipment are
used but can be minimized by using current probes or the
new isolated oscilloscope pre-amplifiers. Eliminating any direct ground connection between the Signal generator and
the oscilloscope synchronization input solves one common
problem.
OUTPUT CLAMP DIODES
When a push-pull amplifier goes into power limit while driving an inductive load, the stored energy in the load inductance can drive the output outside the supplies. Although
the LM 12 has internal clamp diodes that can handle several
amperes for a few milliseconds, extreme conditions can
cause destruction of the IC. The internal clamp diodes are
imperfect in that about half the clamp current flows into the
supply to which the output is clamped while the other half
flows across the supplies. Therefore, the use of external
diodes to clamp the output to the power supplies is strongly
recommended. This is particularly important with higher supply voltages.
Experience has demonstrated that hard-wire shorting the
output to the supplies can induce random failures if these
external clamp diodes are not used and the supply voltages
are above ± 20V. Therefore it is prudent to use output-
SUPPLY BYPASSING
All op amps should have their supply leads bypassed with
low-inductance capaCitors having short leads and located
close to the package terminals to avoid spurious oscillation
problems. Power op amps require larger bypass capacitors.
The LM12 is stable with good-quality electrolytic bypass capaCitors greater than 20 fLF. Other considerations may require larger capaCitors.
3-352
Application Information (Continued)
clamp diodes even when the load is not particularly inductive. This also applies to experimental setups in that blowouts have been observed when diodes were not used. In
packaged equipment, it may be possible to eliminate these
diodes, providing that fault conditions can be controlled.
and expected nature of the load, but are not critical. A 4 p.H
inductor is obtained with 14 turns of number 1B wire, close
spaced, around a one-inch-diameter form.
01
OUT
IN
~-""'~""'-OUT
IN
-------.-...-v.
02
TLiH/8704-8
The LM12 can be made stable for all loads with a large
capaCitor on the output, as shown above. This compensation gives the lowest possible closed-loop output impedance at high frequencies and the best load-transient response. It is appropriate for such applications as voltage
regulators.
A feedback capaCitor, C1, is connected directly to the output
pin of the IC. The output capaCitor, C2, is connected at the
output terminal with short leads. Single-point grounding to
avoid dc and ac ground loops is advised.
TL/H/8704-6
Heat sinking of the clamp diodes is usually unimportant in
that they only clamp current transients. Forward drop with
15A fault transients is of greater- concern. Usually, these
transients die out rapidly. The clamp to the negative supply
can have somewhat reduced effectiveness under worst
case conditions should the forward drop exceed 1.0V.
Mounting this diode to the power op amp heat sink improves
the situation. Although the need has only been demonstrated with some motor loads, including a third diode (03
above) will eliminate any concern about the clamp diodes.
This diode, however, must be capable of dissipating continuous power as determined by the negative supply current of
the op amp.
The impedance, Zl, is the wire connecting the op amp output to the load capacitor. About 3-inches of number-1B wire
(70 nH) gives good stability and 1B-inches (400 nH) begins
to degrade load-transient response. The minimum load capaCitance is 47 ,..F, if a solid-tantalum capaCitor with an
equivalent series resistance (ESR) of 0.10 is used. Electrolytic capaCitors work as well, although capacitance may
have to be increased to 200 ,..F to bring ESR below 0.10.
Loop stability is not the only concern when op amps are
operated with reactive loads. With time-varying Signals,
power diSSipation can also increase markedly. This is particularly true with the combination of capacitive loads and
high-frequency excitation.
REACTIVE LOADING
The LM12 is normally stable with resistive, inductive or
smaller capacitive loads. Larger capacitive loads interact
with the open-loop output resistance (about 10) to reduce
the phase margin of the feedback loop, ultimately causing
oscillation. The critical capaCitance depends upon the feedback applied around the amplifier; a unity-gain follower can
handle about 0.01 ,..F, while more than 1 ,..F does not cause
problems if the loop gain is ten. With loop gains greater than
unity, a speedup capacitor across the feedback resistor will
aid stability. In all cases, the op amp will behave predictably
only if the supplies are properly bypassed, ground loops are
controlled and high-frequency feedback is derived directly
from the output terminal, as recommended earlier.
So-called capacitive loads are not always capacitive. A
high-Q capacitor in combination with long leads can present
a series-resonant load to the op amp. In practice, this is not
usually a problem; but the situation should be kept in mind.
INPUT COMPENSATION
The LM12 is prone to low-amplitude oscillation bursts coming out of saturation if the high-frequency loop gain is near
unity. The voltage follower connection is most susceptible.
This glitching can be eliminated at the expense of smail-signal bandwidth using input compensation. Input compensation can also be used in combination with LR load isolation
to improve capacitive load stability.
L1
4p.
OUT
> .....-M-_-OUT
IN
R1
4.7
TLiH/8704-7
TLiH/8704-9
Large capacitive loads (including series-resonant) can be
accommodated by isolating the feedback amplifier from the
load as shown above. The inductor gives low output impedance at lower frequencies while providing an isolating impedance at high frequencies. The resistor kills the Q of series resonant circuits formed by capacitive loads. A low inductance, carbon-composition resistor is recommended.
Optimum values of Land R depend upon the feedback gain
An example of a voltage follower with input compensation is
shown here. The R2C2 combination across the input works
with R1 to reduce feedback at high frequencies without
greatly affecting response below 100 kHz. A lead capaCitor,
C1, improves phase margin at the unity-gain crossover frequency. Proper operation requires that the output impedance of the circuitry driving the follower be well under 1 kO
at frequencies up to a few hundred kilohertz.
3-353
~
,..
:!i
.-----------------------------------------------------------------------------,
Application Information
(Continued)
equalization resistors. More output buffers, with individual
equalization resistors, may be added to meet even higher
drive requirements ..
INJoAI\o-9--....-ii--,
R3
5k
C2
OUT
0.221'
> ....oI\I\IV--+-OUT
IN
Rl
lk
TL/H/8704-10
Extending input compensation to the Integrator connection
is shown here. Both the follower and this integrator will handle 1 /LF capacitive loading without LR output isolation.
TLlH/8704-13
CURRENT DRIVE
RIO,
10k
R2°
10k
IN~IIv-+--'I/II1r--1
This connection allows increased output capability without
requiring a separate control amplifier. The output buffer, A2,
provides load current through Rs equal to that supplied by
the main amplifier, AI, through R4' Again, more output buffers can be added.
Current sharing among paralleled amplifiers can be affected
by gain error as the power-bandwidth limit is approached. In
the first circuit, the operating current Increase will depend
upon the matching of high-frequency characteristics. In the
second circuit, however, the entire input error of A2 appears
across R4 and Rs. The supply current increase can cause
power limiting to be activated as the slew limit is approached. This will not damage the LM12. It can be avoided
in both cases by connecting A1 as an Inverting amplifier and
restricting bandwidth with C1.
R2VIN
lOUT
= R1 AS
>-+-WH~OUT
TL/H/8704-11
This circuit provides an output current proportional to the
input voltage. Current drive is sometimes preferred for servo
motors because it aids in stabilizing the servo loop by reducIng phase lag caused by motor Inductance. In applications
requiring high output resistance, such as operational power
supplies running in the current mode, matching of the feedback resistors to 0.Q1 % is required. Alternately, an adjustable resistor can be used for trimming.
SINGLE-8UPPLYOPERATION
PARALLEL OPERATION
+IN JVV\r-.....----JW~...
R4
. 0.1
IN
OUT
Rl
10k
R5
0.1
-IN JVV\r-+---'I/II\r-....
TLlH/8704-14
Although op amps are usually operated from dual supplies,
single-supply operation Is practical. This bridge amplifier
supplies bi-directional current drive to a servo motor while
operating from a single positive supply. The output Is easily
converted to voltage drive by shorting Rs and connecting
R7 to the output of A2, rather than A1.
Either input may be grounded, with bi-directional drive provided to the other. It is also possible to connect one input to
a positive reference, with the input signal varying about this
voltage. If the reference voltage is above 5V, R2 and R3 are
not required.
TL/H/8704-12
Output drive beyond the capability of one power amplifier
can be provided as shown here. The power op amps are
wired as followers and connected in parallel with the outputs coupled through equalization resistors. A standard,
high-voltage op amp is used to provide voltage gain. Overall
feedback compensates for the voltage dropped across the
equalization resistors.
With parallel operation, there may be an increase in unloaded supply current related to the offset voltage across the
3-354
r-----------------~--------------------------------------------------------__. ~
..,!i:....
Application Information (Continued)
HIGH VOLTAGE AMPLIFIERS
-IN-M"""....--"""",.".,
RI
Ik
IN ......,.",.,.,......---'IM,....,
R3
Ik
R5
Ik
R7
Ik
-."""+---""""tv-J
TL/H/8704-15
+IN ....
The voltage swing delivered to the load can be doubled by
using the bridge connection shown here. Output clamping to
the supplies can be provided by using a bridge-rectifier assembly.
TL/H/8704-18
One limitation of the standard bridge connection is that the
load cannot be returned to ground. This can be circumvented by operating the bridge with floating supplies, as shown
above. For single-ended drive, either input can be grounded.
Cl R2
R3 C2
=40V
200p 10k
470 0.22S'
INJVl.I\r-4-""""'NY.......~fIIv--..- ......--+~
RI
Ik
.......,
R6
5k
>-......j~~OUT
TL/H/8704-17
This circuit shows how two amplifiers can be cascaded to double output swing. The advantage over the bridge is that the output
can be Increased with any number of stages, although separate supplies are required for each.
OUT
RI3
3.3
•
IN
RI
Ik
0.1%
TL/H/8704-18
Discrete transistors can be used to increase output drive to ± 90V at ± 1OA as shown above. With proper thermal design, the IC
will provide safe-area protection for the external transistors. Voltage gain is about thirty.
3-355
.... r-------------------------------------------------------------------------------------,
~
:=!I
Application Information (Continued)
OPERATIONAL POWER SUPPLY
+ISV
Note: Supply voltages for the
LM318s are ±15V
Rll
10k
R12
lk
IN~~4-------------------~----------~------~
TL/H/8704- I 9
External current limit can be provided for a power op amp as shown above. The positive and negative current limits can be set
precisely and independently. Fast response is assured by D, and D2. Adjustment range can be set down to zero with potentiometers R3 and R7. Alternately, the limit can be programmed from a voltage supplied to R2 and Rs. This is the set up required for
an operational power supply or voltage-programmable power source.
SERVO AMPLIFIERS
When making servo systems with a power op amp, there is
a temptation to use it for frequency shaping to stabilize the
servo loop. Sometimes this works; other times there are
better ways; and occaSionally it just doesn't fly. Usually it's a
matter of how quickly and to what accuracy the servo must
stabilize.
Rl
RS
10k
10k
0.1%
Rl
160
D3
7.SV
D = 60· and 0 is' the absolute value of the phase
angle of ZL. Equivalent pulse width is tON '" 0.4'1" for 0 = 0
and tON'" 0.2'1" for 0 ~ 20·, where 'I" is the period of the
output waveform.
If there is ripple on the supply bus, it is valid to use the
average value in worst-case calculations as long as the
peak rating of the power transistor is not exceeded at the
ripple peak. With 120 Hz ripple, this is 1.5 times the continuous power rating.
DISSIPATION DRIVING MOTORS
A motor with a locked rotor looks like an inductance in series with a resistance, for purposes of determining driver
dissipation. With slow-response servos, the maximum signal
amplitude at frequencies where motor inductance is significant can be so small that motor inductance does not have
to be taken into account. If this is the case, the motor can
be treated as a simple, resistive load as long as the rotor
speed is low enough that the back emf· is small by comparison to the supply voltage of the driver transistor.
Dissipation requirements are not so easily established with
time varying output signals, especially with reactive loads.
Both peak and continuous dissipation ratings must be taken
into account, and these depend on the signal waveform as
well as load characteristics.
With a sine wave output, analysis is fairly straightforward.
With supply voltages of ±Vs, the maximum average power
dissipation of both output transistors is
=
2VS2
P
MAX
1T2 ZLCOSO'
0
A permanent-magnet motor can build up a back emf that is
equal to the output swing of the op amp driving it. Reversing
this motor from full speed requires the output drive transistor to operate, initially, along a loadline based upon the motor resistance and total supply voltage. Worst case, this
loadline will have to be within the continuous dissipation
rating of the drive transistor; but system dynamics may permit taking advantage of the higher pulse ratings. Motor inductance can cause added stress if system response is
fast.
Shunt- and series-wound motors can generate back emf's
that are considerably more than the total supply voltage,
resulting in even higher peak dissipation than a permanentmagnet motor having the same locked-rotor resistance.
< 40.;
and
PMAX =
~~: [:; -
COSO]'
0
~ 40·,
where ZL is the magnitude of the load impedance and 0 its
phase angle. Maximum average dissipation occurs below
maximum output swing for 0 < 40·.
.
100
Vour =:t25V
9=400 I
80
g
z
I
60
40
I
0
~
IIIII>
is
20
/ ." /
I
0V0
30
60
1""\
I
.I_
Vour=:t 19.1V
8=0
VOLTAGE REGULATOR DISSIPATION
\
'\
J
The pass transistor dissipation of a voltage regulator is easily determined in the operating mode. Maximum continuous
dissipation occurs with high line voltage and maximum load
current. As discussed earlier, ripple voltage can be averaged if peak ratings are not exceeded; however, a higher
average voltage will be required to insure that the pass transistor does not saturate at the ripple minimum.
\
'\
Vs=:t30V
ZL =4.D./COS 9
90
120
150
~~: [ 1-cos (-0) ] ,
Conditions during start-up can be more complex. If the input
voltage increases slowly such that the regulator does not go
into current limit charging output capacitance, there are no
problems. If not, load capacitance and load characteristics
must be taken into account. This is also the case if automatic restart is required in recovering from overloads.
Automatic restart or start-up with fast-rising input voltages
cannot be guaranteed unless the continuous dissipation rating of the pass transistor is adequate to supply the load
current continuously at all voltages below the regulated output voltage. In this regard, the LM12 performs much better
than IC regulators using foldback current limit, especially
with high-line input voltage above 20V.
180
CONDUCTION ANGLE (DEGREES)
TLlH/8704-26
The instantaneous power dissipation over the conducting
half cycle of one output transistor is shown here. Power
dissipation is near zero on the other half cycle. The output
level is that resulting in maximum peak and average dissipation. Plots are given for a resistive and a series RL load. The
latter is representative of a 40 loudspeaker operating below
resonance and would be the worst case condition in most
3-358
Application Information
(Continued)
POWER LIMITING
case temperature as measured at the center of the package
bottom. With power pulses of longer duration than 100 ms,
case temperature is almost entirely dependent on heat sink
design and the mounting of the IC to the heat sink.
l00~~
-60
o
-6
5
10
15
TIME (m.)
20
25
TL/H/B704-27
Should the power ratings of the LM12 be exceeded, dynamic safe-area protection is activated. Waveforms with this
power limiting are shown for the LM12 driving ± 36V at
40 Hz into 40. in series with 24 mH (/I = 45"). With an
inductive load, the output clamps to the supplies in power
limit, as above. With resistive loads, the output voltage
drops in limit. Behavior with more complex RCL loads is
between these extremes.
Secondary thermal limit is activated should the case temperature exceed 150'C. This thermal limit shuts down the IC
completely (open output) until the case temperature drops
to about 145'C. Recovery may take several seconds.
POWER SUPPLIES
Power op amps do not require regulated supplies. However,
the worst-case output power is determined by the low-line
supply voltage in the ripple trough. The worst-case power
dissipation is established by the average supply voltage with
high-line conditions. The loss in power output that can be
guaranteed is the square of the ratio of these two voltages.
Relatively Simple off-line switching power supplies can provide voltage conversion, line isolation and 5-percent regulation while reducing size and weight.
The regulation against ripple and line variations can provide
a substantial increase in the power output that can be guaranteed under worst-case conditions. In addition, switching
power supplies can convert low-voltage power sources
such as automotive batteries up to regulated, dual, highvoltage supplies optimized for powering power op amps.
HEAT SINKING
A semiconductor manufacturer has no control over heat
sink deSign. Temperature rating can only be based upon
The design of heat sink is beyond the scope of this work.
Convection-cooled heat sinks are available commercially,
and their manufacturers should be consulted for ratings.
The preceding figure is a rough guide for temperature rise
as a function of fin area (both sides) available for convection
cooling.
Proper mounting of the IC is required to minimize the thermal drop between the package and the heat sink. The heat
sink must also have enough metal under the package to
conduct heat from the center of the package bottom to the
fins without excessive temperature drop.
A thermal grease such as Wakefield type 120 or Thermalloy
Thermacote should be used when mounting the package to
the heat sink. Without this compound, thermal resistance
will be no better than 0.5'C/W, and probably much worse.
With the compound, thermal resistance will be 0.2'C/W or
less, assuming under 0.005 inch combined flatness runout
for the package and heat sink. Proper torquing of the
mounting bolts is important. Four to six inch-pounds is recommended.
Should it be necessary to isolate V- from the heat sink, an
insulating washer is required. Hard washers like berylium
oxide, anodized aluminum and mica require the use of thermal compound on both faces. Two-mil mica washers are
most common, giving about O.4'C/W interface resistance
with the compound. Silicone-rubber washers are also available. A 0.5'C/W thermal resistance is claimed without thermal compound. Experience has shown that these rubber
washers deteriorate and must be replaced should the IC be
dismounted.
3-359
....
~ r-------------------------------------------------------------~
:5
Definition of Terms
Input offset voltage: The absolute value of the voltage
between the input terminals with the output voltage and current at zero.
Thermal gradient feedback: The input offset voltage
change caused by thermal gradients generated by heating
of the output transistors, but not the package. This effect is
delayed by several milliseconds and results in increased
gain error below 100 Hz.
Input bias current: The absolute value of the average of
the two input currents with the output voltage and current at
zero.
Output-current limit: The output current with a fixed output
voltage and a large input overdrive. The limiting current
drops with time once the protection circuitry is activated.
Input offset current: The absolute value of the difference
in the two input currents with the output voltage and current
at zero.
Power dissipation rating: The power that can be dissipated for a specified time interval without activating the protection circuitry. For time intervals in excess of 100 ms, dissipation capability is determined by heat sinking of the IC package rather than by the IC itself.
Common-mode rejection: The ratio of the input voltage
range to the change in offset voltage between the extremes.
Supply-voltage reJection: The ratio of the specified supply-voltage change to the change in offset voltage between
the extremes.
Thermal resistance: The peak, junction-temperature rise,
per unit of internal power dissipation, above the case temperature as measured at the center of the package bottom.
Output saturation threshold: The output swing limit for a
specified input drive beyond that required for zero output. It
is measured with respect to the supply to which the output is
swinging.
The dc thermal resistance applies when one output transistor is operating continuously. The ac thermal resistance applies with the output transistors conducting alternately at a
high enough frequency that the peak capability of neither
transistor is exceeded.
Large signal voltage gain:The ratio of the output voltage
swing to the differential input voltage required to drive the
output from zero to either swing limit. The output swing limit
is the supply voltage less a specified quasi-saturation voltage. A pulse of short enough duration to minimize thermal
effects is used as a measurement signal.
Supply current: The current required from the power
source to operate the amplifier with the output voltage and
current at zero.
.
Equivalent Schematic (excluding active protection circuitry)
.-~~~------------.----1--~--~~--+--~
141
1m
1 13
80)'
R16
1
011
Rl
3k
+
R3
01
5~
°014
012
01
04
IN
R2
3k
~~----+------+----~--~~--~--~OUT
02
C2
03
20p
°015
°output clamps: hf[ Rll
TLlH/8704-29
3-360
r3:
....o
....»
~National
~ Semiconductor
LM101A/LM201A/LM301A Operational Amplifiers
General Description
The LM101A series are general purpose operational amplifiers which feature improved performance over industry standards like the LM709. Advanced processing techniques
make possible an order of magnitude reduction in input currents, and a redesign of the biasing circuitry reduces the
temperature drift of input current. Improved specifications
include:
• Offset voltage 3 mV maximum over
temperature (LM101A1LM201A)
• Input current 100 nA maximum over
temperature (LM101A1LM201A)
• Offset current 20 nA maximum over
temperature (LM101A1LM201A)
• Guaranteed drift characteristics
• Offsets guaranteed over entire common mode and supply voltage ranges
Ii Slew rate of 10V/J.Ls as a summing amplifier
This amplifier offers many features which make its application nearly foolproof: overload protection on the input and
......
r3:
N
o
output, no latch-up when the common mode range is exceeded, and freedom from oscillations and compensation
with a single 30 pF capacitor. It has advantages over internally compensated amplifiers in that the frequency compensation can be tailored to the particular application. For example, in low frequency circuits it can be overcompensated
for increased stability margin. Or the compensation can be
optimized to give more than a factor of ten improvement in
high frequency performance for most applications.
In addition, the device provides better accuracy and lower
noise in high impedance circuitry. The low input currents
also make it particularly well suited for long interval integrators or timers, sample and hold circuits and low frequency
waveform generators. Further, replacing circuits where
matched transistor pairs buffer the inputs of conventionallC
op amps, it can give lower offset voltage and a drift at a
lower cost.
The LM101A is guaranteed over a temperature range of
- 55'C to + 125'C, the LM201 A from - 25'C to + 85'C,
and the LM301A from O'C to +70'C.
Schematic** and Connection Diagrams (Top View)
Metal Can Package
COMPENSATION
INPUT
INPUT
o-t+-+--+--H
TL/H/7752-2
Note: Pin 4 connected to case.
Order Number LM101AH,
LM201AH or LM301AH
See NS Package Number HOSC
Dual-In-Line Package
14
vTLlH/7752-1
Dual-In-Line Package
BALANCE/
COMPENSATION
INPUT
INPUT
v-
13
BALANCEI
COMPENSATION 3
INPUT
4
12 COMPENSATION
11
v+
COMPENSATION
2
3
4
v+
10 OUTPUT
OUTPUT
9
BALANCE
BALANCE
TL/H/7752-4
Order Number LM101AJ,
LM301AJ, LM201AN or LM301AN
See NS Package Number JOSA or NOSA
TL/H/7752-3
Order Number LM101AJ-14
See NS Package Number J14A
"'·Pin connections shown are for e·pin packages.
3-361
....
»
......
r3:
(,,)
o
....
»
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
Differential Input Voltage
Input Voltage (Note 1)
Output Short Circuit Duration (Note 2)
Operating Ambient Temp. Range
LM101A1LM201A
±22V
±30V
±15V
Continuous
-55'Cto + 125'C (LM101A)
- 25'C to + 85'C (LM201 A)
LM301A
±18V
±30V
±15V
Continuous
O'Cto +70'C
150'C
150'C
150'C
100'C
100'C
100'C
500mW
1200mW
900mW
1000mW
300mW
700mW
500mW
650mW
165'C/W
67'C/W
135'C/W
110'C/W
165'C/W
67'C/W
135'C/W
TJMax
H·Package
N·Package
J·Package
M·Package
Power Dissipation at TA = 25'C
H·Package (Still Air)
(400 LF/Min Air Flow)
N·Package
J·Package
M·Package
Thermal Resistance (Typical) 0jA
H·Package (Still Air)
(400 LF/Min Air Flow)
N Package
J·Package
M·Package
(Typical) 0jC
H·Package
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
Metal CaR or Ceramic
Plastic
ESD Tolerance (Note 5)
110'CmW
25'C/W
25'C/W
-65'C to + 150'C
- 65'C to + 150'C
300'C
260'C
2000V
300'C
260'C
2000V
Electrical Characteristics (Note 3) TA = TJ
Parameter
LM101A1LM201A
Conditions
Min
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Resistance
Supply Current
= 25'C, Rs:S: 50 kO
TA = 25'C
TA = 25'C
TA = 25'C
TA = 25'C
TA = 25'C, Vs = ±15V
VOUT = ±10V, RL ~ 2 kO
Input Offset Voltage
RS:S: 50kO
1.5
=
Ivs =
Ivs
Max Min
2.0
2.0
7.5
mV
1.5
10
3.0
50
nA
30
75
70
250
4.0
0.5
2.0
mA
1.8
160
25
V/mV
10
mV
6.0
30
p.VI'C
15
70
nA
0.01
0.1
0.01
0.3
nArC
0.02
0.2
0.02
0.6
nAl'C
20
3·362
mA
3.0
Input Offset Current
Average Temperature Coefficient 25'C:S: TA:S: TMAX
of Input Offset Current
TMIN:S: TA:S: 25'C
3.0
160
3.0
Average Temperature Coefficient Rs:S: 50kO
of Input Offset Voltage
nA
MO
3.0
±15V
50
Units
Max
1.8
±20V
LM301A
Typ
0.7
TA
Large Signal Voltage Gain
Typ
I"'"
Electrical Characteristics (Note 3) TA =
Parameter
s::
....
CI
TJ (Continued)
LM101A1LM201A
Conditions
Min
Max Min
Typ
Input Bias Current
Typ
TA = TMAX,VS = ±20V
Large Signal Voltage Gain
Vs= ±15V,VOUT= ±10V
RL ~ 2k
Output Voltage Swing
Vs = ±15V
1.2
0.3
2.5
»
.......
I"'"
s::
IJ-A
rnA
15
25
V/mV
I\)
....CI
i!!
I"'"
s::
Co)
....
CI
RL=10kO ±12
±14
±12
±14
V
±10
±13
±10
±13
V
RL = 2 kO
Input Voltage Range
Units
Max
0.1
Supply Current
.....
LM301A
±15
Vs = ±20V
V
±15, -13
Vs = ±15V
s: 50 kO
Rs s: 50 kO
»
±12 +15, -13
V
Common-Mode Rejection Ratio Rs
80
96
70
90
dB
Supply Voltage Rejection Ratio
80
96
70
96
dB
Not. 1: For supply voltages less than ± ISV, the absolute maximum input voltage is equal to the supply voltage.
Not. 2: Continuous short circuit is allowed for case temperatures to 12S'C and ambient temperatures to 7S'C for LM101A1LM201A, and 70'C and SS'C
respectively for LM301A.
Note 3: Unless othelWise specified, these specifications apply for Cl = 30 pF, ±SV :s; Vs :s; ±20Vand -SS'C :s; TA ,;; + 12S'C (LM101A), ±SV ,;; Vs:S; ±20V
and -2S'C :s; TA ,;; +8S'C (LM201A), ±SV :s; Vs :s; ±ISV and O'C ,;; TA :s; +70'C (LM301A).
Not. 4: Refer to RETS101AX for LM101A military specifications.
Not. 5: Human body model, 100 pF discharged through 1.5 kfi.
Guaranteed Performance Characteristics LM101A1LM201A
Input Voltage Range
zo
ZD
~
...
!i
...
..~
0:
...'"'"
E
!!
11
..
~
#:.~ " ,
tZr-
~~-4."/
r-- 4~~
I~
,
41;""
a
jj
I -
7-,
1
1
1
la
11
SUPPLY VOLTAGE 11'11
5
i..
1
-I.!C ""~
SINGLE POLE
21
I-I-t--
"
~~"~"'
:~~~~~ArION
'\..
T... =ZSoC
20
FREOUENCV IHzI
10K
IK
100
FREQUENCY (Hz)
",.I'Kn
""
TA=2SCC
o
30
;;M~r'11V
w
TA _aoc
4S
AMBIENT TEMPERATURE I'CI
•
10
15
20
2S
OUTPUT CURRENT , ...AI
-
..
10-10
100
Common Mode Rejection
;.00
I ......
"'
10
TEMPERATURE eCI .
,rM
I
~r.. ~fE'.I. L~IJIAJLMZOIA
-60
1;
300
40
T. '125'C
JFF~ET~ L~30\A
3
z:
II
.. 200
I
"
BIAS. LMI0IAILM2D1A
20
10
4
METAL CAN
400
Current Limiting
I~L
r'"o;;;
TA ·121°1:
&00
!
..
10
IS
SUPPLV VOLTAGE ItVl
&
J~IAS LM30IAti-
40
3D
I
I
n
21
Input Current,
LM101A/LM201A1LM301A
~
~
1,., -21 C.
kP ".-
---
\0
\I
SUPPLV VOLTAOE (tV)
811
10
811
50
100
I
-t~ .....'c
-
!
Maximum Power Dissipation
lID
10
IDa
Ik
Ilk
1_
1M
11M
FREQUENCY IHII
Closed Loop Output
Impedance
10'
,-::"""'r---,.-....,--...,....-.,
10-' '---'~-'--'---'--...
10
100
Ik
10k
lOOk
1M
FREQUENCY IHII
TL/H/7752-7
3·364
Typical Performance Characteristics for Various Compensation Circuits**
Single Pole Compensation
Two Pole Compensation
R2
Feedforward Compensation
R2
C2
RI
Rl
VOUT
YOUT
Cl:;' Rl Cs
Rl + R2
Cs ~ 30pF
R3
CI
150pF
TL/H17752-16
TLlH/7752-12
Open Loop Frequency
Response
lH
Open Loop Frequency
Response
~~-T--~~-r~~
lH
m
11111 I-"~""'k--f--+-
....
lH
twO 'OLE
r\ K
BAINTA _ZIDe
r\
v. • ... av
__L-~~
,. 11111 ll111k 1M 10M
1
10
11111
Cl -3DpF
CZ ·3II1I,F
I
,. 1l1li
lk
I
Iii .~~~~-H~~~
c,.
i
pF
SINGLE
18
\
z
11K
lDOK
....
10M
i...
~
.
I I I
..z
=-..
.
-1.
INPUT+i
...
o
,.
I
~
T.I.~.~l'
vr . .t.
10 ZI 3D 40 liD ID III ID
TtMEIIoI
'"
~
Ii!
~
!
4 .... k- I-IN.JT
2
0
-2
f;;;
1\
\
'"
I.
Large Signal Frequency
Response
IJ
~
12
Vi • ... av
T. -125~
\
U
i •
II
~
FEEIFORWARI
i!: 4
I III
1M
lOOk
1M
FREGUENCY IH.,
..
-10
I I
I I
_I•.•J.
!Ap.°t~T
TL/H/7752-1 B
o
102D3D4O IDID101D
TtMEIPIi
• ·Pin connections shown are for a-pin packages.
3-365
.
•
~
!
!
2
0
OU'r.U~\ - f -
-- ..
T. _21°1:
V..... IV
-2
':-4
'"
... ~
"""
-·IN.UT
-I
-I
-1'
'''-1-1''
FEEOFORWARO
I
I
I
"2341811
TllII!fptI
TLlH17752-15
TL/H/7752-11
Inverter Pulse Response
II
"'
T. ·2rc
v. -t1IV
Cl·3D,F
CZ·3II1IpF
-I
I
TL/H/7752-17
..
jOr01
.: -4
411
11111 1II1II 11;'1 10:.1 100M
TL/H/7752-14
I
r--
FREQUENCY IH.,
Voltage Follower Pulse
Response
I
.,...
",,~
.
OUTPUT'
f--f- ~:L~LE f-
II 100
FREQUENCY 1Hz)
10
~
iAIN
~
lOOk
11k
Voltage Follower Pulse
Response
I
,
H
-..II
1M
1II
135~
.... ~ I- aai
,tSE
FEEOFORWARD
"
225
I
~
II
TLlH/7752-10
~
40
lWD.OLE
co
FREQUENCY IHII
,.
:1
II
IJ
IlIN..
o 111111
lK
,
..
....Iii
~ 12
UIII
111111
BD
V, .ltl~VI
TA _Z&DI:
Cl ·3DpF
cz • 31111 pF
I!:
\ rntE,
co
T~ • 25}C v, -±1&V-
....
TL/H17752-13
~~p.j:l~--UIII-~. !~!~
Ii!
131 ~
Large Signal Frequency
Response
"rT~-rTn~-n~~~,
V.· . .
~
ID
10k IIOk 1M 1111.1
TL/H/7752-9
5V
12rt~+1~~4ffi~Nffirl
::!
Ii:
l;
[\.
FREQUENCY 1Hz)
Large Signal Frequency
Response
!
lID
J
~
~
FREQUENCY 1Hz)
11111
225
'H~
1\
~L-~~~~
Open Loop Frequency
Response
TL/H/7752-19
•
c(
.....
CI
C")
Typical Applications * *
:E
...J
Variable Capacitance Multiplier
;C
.....
Simulated Inductor
R2
100
~
:E
•
R3
lOll
...J
.....
CI
.....
:E
£.-4~
________~~________~~__-J
L .. A1 A2CI
...J
As = A2
Ap = A1
TL/H17752-21
Fast Inverting Amplifier
with High Input Impedance
Inverting Amplifier
with Balancing Circuit
CI
'pF
RI
RZ
INPUT o-~M,.-4""--'IIII'v---.,
....-o OUTPUT
>~
OUTPUT
tMay be zero or equal
10 parallel comblnalion of A1 and A2 for
minimum offset
--JV\,.,...
3DpF
JVIIY-() vR3
50kn
TLlHI77S2-23
TL/H/nS2-22
Integrator with Bias Current
Compensation
Sine Wave Oscillator
SINE OUTPUT
,....-+-M.,.-v'
C2
2GlpF
Re
iK
'"
.---1
I----,,-COSINE OUTPUT
RI
..
V,.-~¥o_"'----;;;"'-
RI
IZGK
1%
You,
RI
22IK
1%
01
uv
TLlH17752-25
AI
IK
fo
= 10kHz
DI
uv
TLlH17752-24
··Pin connections shown are for a-pin packages.
3-366
• Adjust for zoro Intogralor drift. Current drift typically
0.1 nAl'C over - SS'C to + 125"C temperature range.
Application Hints**
Protecting Against Gross
Fault Conditions
Compensating for Stray Input Capacitances
or Large Feedback Resistor
C2
R3
C2
tNPUT~W"'''"1
OUTPUT
RIO
C2
TEST POIIIT
= At Cs
A2
IIIPUT·""'M_--'t
R3
·Protects input
tProtec1s output
~Prolec1s
CI
TL/H/7752-26
TLlH/7752-27
output-not needed when A4 Is used.
Isolating Large Capacitive Loads
r--..JItNlr--. .-4'-OUTPUT
RZ
R4
TL/H/7752-2B
Although the LM101A is designed for trouble free operation,
experience has indicated that it is wise to observe certain
precautions given below to protect the devices from abnormal operating conditions. It might be pOinted out that the
advice given here is applicable to practically any Ie op amp,
although the exact reason why may differ with different devices.
Precautions should be taken to insure that the power supplies for the integrated circuit never become reversedeven under transient conditions. With reverse voltages
greater than 1V, the IC will conduct excessive current, fusing internal aluminum Interconnects. If there is a possibility
of this happening, clamp diodes with a high peak current
rating should be installed on the supply lines. Reversal of
the voltage between V+ and V- will always cause a problem, although reversals with respect to ground may also
give difficulties in many circuits.
The minimum values given for the frequency compensation
capacitor are stable only for source resistances less than
10 kO, stray capacitances on the summing junction less
than 5 pF and capacitive loads smaller than 100 pF. If any
of these conditions are not met, it becomes necessary to
overcompensate the amplifier with a larger compensation
capacitor. Alternately, lead capacitors can be used in the
feedback network to negate the effect of stray capacitance
and large feedback resistors or an RC network can be added to isolate capacitive loads.
When driving either input from a low-impedance source, a
limiting resistor should be placed in series with the input
lead to limit the peak instantaneous output current of the
source to something less than 100 mA. This is especially
important when the inputs go outside a piece of equipment
where they could accidentally be connected to high voltage
sources. Large capacitors on the input (greater than 0.1 /LF)
should be treated as a low source impedance and isolated
with a resistor. Low impedance sources do not cause a
problem unless their output voltage exceeds the supply voltage. However, the supplies go to zero when they are turned
off, so the isolation is usually needed.
The output circuitry is protected against damage from shorts
to ground. However, when the amplifier output is connected
to a test point, it should be isolated by a limiting resistor, as
test pOints frequently get shorted to bad places. Further,
when the amplifer drives a load external to the equipment, it
is also advisable to use some sort of limiting resistance to
preclude mishaps.
Although the LM101A is relatively unaffected by supply bypassing, this cannot be ignored altogether. Generally it is
necessary to bypass the supplies to ground at least once on
every circuit card, and more bypass points may be required
if more than five amplifiers are used. When feed-forward
compensation is employed, however, it is advisable to bypass the supply leads of each amplifier with low inductance
capacitors because of the higher frequencies involved.
··Pin connections shown are for a-pin packages.
3-367
Typical Applications**
(Continued)
Standard Compensation and
Offset Balancing Circuit
Fast Summing Amplifier
C2
3pF
R2
3DK
At
3DK
VIN -~M_-4I"""";-I
6
>~""-Vour
Power Bandwidth: 250 kHz
Small Signal Bandwiidth: 3.S MHz
Slew Aate: I OVl,.•
..-....Jw\r-- yTLlH/7752-3D
TL/HI7752-29
Fast Voltage Follower
Bilateral Current Source
R3
SOK
0.1%
y,N-....V\~-. .-t
>..;.....~yOUT
1
C2
300PF
Slew Aate: 1VI,.s
I
OUT
CI
30 pF
RI
10K
-
=
A3VIN
Al AS
HZ
.-
A3=A4+AS
AI = A2
RS
SOO
1%
..
..
--~~r------~
R4
41.6K
0.1%
0.1%
-IOUT
TLlH17752-31
TLlH/7752-32
Fast AC/DC Converter"
R6
20K
1%
R2
20K
1%
INPUT -
. .JVV\o,..... .:.t
+
R3
10K
1%
"",.,..-4...
r--4....
C2
10 "F
...
-~N~-4
-~N""'"--.- OUTPUT
01
lNB14
02
lN914
C3*
'Feedlorward compensation
can be used to maka a last lull
wave rectifier without a fllter.
3D pF
TLlH/7752-33
"Pin connections shown are lor 8-pln package••
3-368
Typical Applications* * (Continued)
Instrumentation Amplifier
R3 t
10K
0.1%
Rl"
1M
0.1%
>-+-OUTPUT
Rl
= R4; R2 = R3
Av= 1
• ......----INPUTS - - -____ +
+!:!!
R2
'. tMatching determines CMRR.
TL/H/7752-34
Integrator with Bias Current Compensation
R3
Voltage Comparator for Driving RTL Logic or
High Current Driver
r---~I-~~~--V'
ZOK
R4
75K
RZ'
Z.ZM
RI
VI.
-~N~""""'------"""
CI
TL/H17752-37
>~""-VDUT
... Adjust for zero integrator
drift. Currenl drift typically
0.1 nAl'C over O'C 10 + 70'C
temperature range.
TL/H/7752-35
Low Frequency Square Wave Generator
Rl
1M
lOW IMPEOANCE
OUTPUT
R4
5K
CLAMPED
OUTPUT
Dl
6.2V
D2
6.2V
TL/H17752-36
··Pin connections shown are for B-pin packages.
3·369
Typical Applications**
(Continued)
Low Drift Sample and Hold
Voltage Comparator for Driving
DTL or TTL Integrated Circuits
OUTPUT,.._ _ _ _ _ _,.._ _ _ _. .
OUTPUT
v+
INPUTS
czi
ID.1PF
CI
3DpF
"Pin connections shown are for 8-1'In packages.
'Polycarbonale.dielectrlc capacitor
TL/H/7752-38
3-370
TLlH/7752-38
r------------------------------------------------------------------------,
~National
r
s::
.....
CI
......
......
~ Semiconductor
r
s::
N
CI
......
......
LM 107/LM207/LM307 Operational Amplifiers
r
s::
Co)
General Description
CI
tors. Further, replacing circuits where matched transistor
The LM1 07 series are complete, general purpose operationpairs buffer the inputs of conventional IC op amps, it can
al amplifiers, with the necessary frequency compensation
give lower offset voltage and drift at a lower cost.
built into the chip. Advanced processing techniques make
the input currents a factor of ten lower than industry stanThe LM107 is guaranteed over a -55'Cto + 125'Ctemperdards like the 709. Yet, they are a direct, plug-in replaceature range, the LM207 from -25'C to +S5'C and the
ment for the 709, LM101A and 741.
LM307 from O'C to + 70'C.
The LM107 series offers the features of the LM1 01 A, which .
makes its application nearly foolproof. In addition, the deFeatures
vice provides better accuracy and lower noise in high im• Offset voltage 3 mV maximum over temperature
pedance circuitry. The low input currents also make it partic• Input current 100 nA maximum over temperature
ularly well suited for long interval integrators or timers, sam• Offset current 20 nA maximum over temperature
ple and hold circuits and low frequency waveform genera• Guaranteed drift characteristics
Connection Diagrams
Metal Can Package
Dual-in-Line Package
~I
OUTPUT
B~
INPUT 2
INPUTS
INPUT 3
v-
1
-+--4
v'
6 OUTPUT
5 Nt
Y- 4
TL/H17757 -2
Nole: Pin 4 connected to case.
TL/H/7757 -3
Top View
Top View
Order Number LM1D7H, LM207H or LM307H
See NS Package Number H08C
Order Number LM107J, LM207J or LM307J
See NS Package Number JOSA
Order Number LM307M
See NS Package Number M08A
Order Number LM307N
See NS Package Number N08A
3-371
......
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
(Note 4)
Supply Voltage
Power Dissipation (Note 1)
Differential Input Voltage
Input Voltage (Note 2)
Output Short Circuit Duration
Operating Temperature Range (TAl
(LM107)
(LM207)
Storage Temperature Range
Lead Temperature (Soldering, 10 sec)
LM107lLM207
±22V
500mW
±30V
±15V
Continuous
LM307
±18V
500mW
±30V
±15V
Continuous.
- 55·C to + 125·C
- 25·C to + 85·C
- 65·C to + 150·C
260·C
O·Cto +70·C
TMAX
TMIN
-55·C
+ 125·C
LM107
-25·C
LM207
+ 85·C
O·C
LM307
+70"C
ESD rating to be determined.
-65·C to + 150·C
260"C
Electrical Characteristics (Note 3)
Parameter
LM307
LM107lLM207
Conditions
Min
Typ
Max
Min
Typ
Units
Max
Input Offset Voltage
TA = 25·C, Rs:S: 50 kO
0.7
2.0
2.0
7.5
mV
Input Offset Current
TA = 25·C
1.5
10
3.0
. 50
nA
TA = 25·C
30
75
70
250
nA
Input Bias Current
Input Resistance
TA = 25·C
Supply Current
TA= 25·C
Vs = ±20V
Vs = ±15V
Large Signal Voltage
Gain
TA = 25·C, Vs = ±15V
VOUT = ±10V, RL:?: 2 kO
Input Offset Voltage
Rs:S: 50kO
1.5
1.8
50
25
3.0
15
0.Q1
0.02
0.1
0.2
100
TA = + 125·C. Vs = ±20V
1.2
3-372
2.5
mA
mA
V/mV
10
mV
6.0
30
".V/·C
70
nA
0.01
0.02
0.3
0.6
nArC
nArC
20
Input Bias Current
3.0
160
3.0
25·C:s: TA:S: TMAX
TMIN :s: TA:S: 25·C
MO
3.0
160
Input Offset Current
Supply Current
2.0
1.8
Average Temperature
Coefficient of Input
Offset Voltage
Average Temperature
Coefficient of Input
Offset Current
0.5
4.0
300
nA
mA
r-
Ei:
.....
Q
Electrical Characteristics (Note 3) (Continued)
Parameter
LM107lLM207
Conditions
Typ
Min
Large Signal Voltage
Vs
=
±15V, VOUT
Gain
RL:<: 2kfl
OutPLIt Voltage Swing
Vs
=
Common Mode
Typ
Min
Units
Max
.....a
......
r-
Ei:
N
Q
15
25
VlmV
:::!
r-
Ei:
w
±12
±14
±12
±14
V
±10
±13
±10
±13
V
+15
-13
±12
+15
-13
V
80
96
70
90
dB
80
96
70
96
dB
±15
Rs:S; 50kfl
Rejection Ratio
Supply Voltage
Max
±10V
= ±15V
RL = 10kfl
RL = 2kfl
Vs = ±20V
Vs = ±15V
Input Voltage Range
LM307
Rs:S; 50kfl
Rejection Ratio
Q
.....a
V
Note 1: The maximum junction temperature of the LM107 is 15Q<'C, and the LM207/LM307 is 100"C. For operating at elevated temperatures. devices in the HOS
package must be derated based on a thermal resistance of 165°C/W, iunction to ambient, or 30"C/W, junction to case. The thermal resistance of the dual·in·line
package is 100"C/W, junction to ambient.
Nole 2: For supply voltages less than ± 15V, the absolute maximum input voltage is equal to the supply voltage.
Nole 3: These speeHieations apply for ±5V,;: Vs';: +20Vand -55°C';: TA';: +125°CfortheLM1070r -25°C,;: TA + 85°C for the LM207, and O"C ,;: TA';:
+ 70°C and ± 5V ,;: Vs ,;: ± 15V for the LM307 unless otherwise specified.
Nole 4: Aefer to AETS107X for LM107H and LM107J military specifications.
Schematic Diagram*
f'
ci)
J.PIIT'~'
INPUT 2
Lrt- .~."
fl
~~
.11
II
IJ
2,F
C2
f-J,
'"H'R12
3Qpf
~r
.."
r~
v.,
r.:
1
620
1*013
.....09
.10
.6
6
25
OUT
Rl4
1.51(
RIO
65
..-----'
012
KOl1
•
R7
8DK
40«
"I
~
- . / : 018
~o"
Q2~ f-----<
~
81
5K
2:
"3
450
R8
850
02~
R3
10K
R4
250
v-
·Pin connections shown are for metal can.
3-373
4
TLlH17757-1
Guaranteed Performance Characteristics LM107/LM207
Input Voltage Range
21 Output
m~-r-'~T--r~r-,
!
Swing
101Voltage
•,..
1&
I--+-+----'
\I
..
lJj
g
..
10
M
u
~
~
"~
">
~
"
p
IZ
~,~
L~I'I: -H'C $T, $II5'C
r-- rr-1.mIl:
-25'C $T. $I&'C
7.
I--
J
10
I
I
10
5
SUPPLY VOLTAGE I±VI
SUPPLY VOLTAGE 1±v1
Gain
I
za
1&
SUPPLY VOLTAGE I±VI
TL/H/7757-4
Guaranteed Performance Characteristics LM307
Input Voltage Range
Output Swing
ZD
~
1&
a:
IZ
.....
.~
Voltage Gain
ZD
~
~
~
i.;'
"....>
,.....
~
I.;
~
."
"~I
I- I- ~
>I~
"I
~
I'
.
;
15
i..
10
100
~
>/,.,-,'
~"'",
I-r- ~~
I
I
~
1-1-
~."\.
ioIIIIIF- -
II"CST,SI8"C
1
~~
•,.z
94
... ..
..~
C
~
IZ
>
·'''''''1 ·1·
18
.--
"""~'"
;;.;.-rI
DOC;S;'A,
zo
15
10
I
ID
&
Current Limiting
..
!
;
"
.~
1'1.
""'I
10
. bFJSEt. ~M3~1
-rlF~E~, L~1U7ILMZoI
-50
60
100
150
zoo
TEMPERATURE I'CI
~
""'"
TA -125"C
30
zo
~ lIr'•
Ys= :!:15V
"\
i!;
1'1
f- JIAJ, L~IJ71L~Z~1
40
Input Noise Voltage
....... t -.....
10.0
zo
1&
10
SUPPLY VOLTAGE I±VI
SUPPLY VOLTAGE I±VI
~
....
ill
60
1
I
5
~
~
TA .. 1ZSoC
NN'" Lr3r t-
10
50
~
I
1
a
1&.0
T.,Z5&
~ i"""'"
~~
II
I
Tl·b
110
~
1
0.5
Bo In lJut Current
1m Voltage Gain
I
:'10
"::!>
...
is
.
.51..
TA ; 25°C
z
5.0
~
~
:!
a
a
10
15
zo
Z5
OUTPUT CURRENT I...AI
30
•10
~ 10-'
100
Ik
IDk
FREQUENCY IHzl
lOOk
fREQUENCY IHzl
TLIH/7757 -6
3-374
r-----------------------------------------------------------------------------,r
Typical Performance Characteristics
Open Loop
Frequency Response
120
100
~
80
~
60
z
.
....
t-...
~
i"..
>
40
!i~
"-
..~
-20
100
lK
"
o
10K lOOK 1M 10M
lK
FREQUENCY IH.I
10K
"
1 1 1
1 1 1r -
~
2
0
~ -2
i\
1\
10
~
12
I\..
20
1
Voltage Follower
Pulse Response
lo"-r'-T,IJ~~L,,-r'
Large Signal
Frequency Response
TA " 25°C
Vs a:t15V
Ys .. U5V
~
!:;
18
T.I'25°~_
....ciii:
(Continued)
i-r-
1-~1~\-+-f'N~PU~T~~~ft/_t~
H,-\-f-++-ffif-~TPUT
HH\\+-+-H-ft-+-1H
1
......
......
r
iii:
N
C
......
......
r
iii:
(.)
c
......
~ ~: tj~~~-~-~~~~~~~~-T.+lo-2+J500--lC
-8 I---iH-+-+++--t vs • t15V
-10
-I 1
o
lOOK
10 20 30 40 50 60 10 80
FREQUENCY 1Hz!
TIME I...,
TLlH/7757-7
Typical Applications * *
Inverting Amplifier
Non-Inverting AC Amplifier
R2
RI
RZ
1M
10M
R3
9lOK
VOUT
RIN = R3
TLlH/7757 -8
R3
=
RII/R2
TL/H17757-9
Non-Inverting Amplifier
R2
RI
TL/H/7757-10
•
• ·Pin connections shown are for metal can.
3-375
Typical Applications**
(Continued)
Turntable Notch Filter
Rl
lOOK
0.1%
R2
lOOK
0.1%
>.;......- - V
Cl
500 pF
OUT
R1 = R2 = R3
A4=A5=~
2
10
1
2'11'~C, C2 A4 A5
= 60Hz
TUHI77S7-11
Differential Input Instrumentation Amplifier
RZ
6
lK
0.1%
R4
lOOK
0.1%
TUHI77S7-12
"Pin connections shown are for metal can.
3-376
,------------------------------------------------------------------------.r
==:
...
~National
<:)
CD
.....
r
~ Semiconductor
==:
N
<:)
lM108/lM208/lM308 Operational Amplifiers
CD
.....
r
==:
Co)
General Description
<:)
The LM108 series are precision operational amplifiers having specifications a factor of ten better than FET amplifiers
over a - SS·C to + 12S·C temperature range.
The devices operate with supply voltages from ± 2V to
± 20V and have sufficient supply rejection to use unregulated supplies. Although the circuit is interchangeable with and
uses the same compensation as the LM101A, an alternate
compensation scheme can be used to make it particularly
insensitive to power supply noise and to make supply bypass capacitors unnecessary.
The low current error of the LM108 series makes possible
many designs that are not practical with conventional amplifiers. In fact, it operates from 10 Mfl source resistances,
introducing less error than devices like the 709 with 10 kfl
sources. Integrators with drifts less than SOO p.V/sec and
analog time delays in excess of one hour can be made using capacitors no larger than 1 p.F.
The LM108 is guaranteed from -SS·C to + 125·C, the
LM208 from - 2S·C to + 8S·C, and the LM308 from O·C to
+70·C.
features
III Maximum input bias current of 3.0 nA over temperature
III Offset current less than 400 pA over temperature
III Supply current of only 300 p.A, even in' saturation
iii Guaranteed drift characteristics
Compensation Circuits
Standard Compensation Circuit
-v IN
Alternate" Frequency Compensation
Al
Al
R2
--'lJ'V\~-&---'VI""----.
'>-+-VOUT
AJ
8
RJ
Rt C
Cf;' Rt + ~2
Co
R2
-V'N --'lJ'V\~.--"""'VIN--""",
'V ,N
-J\J"". . .---i
>-"-VOUT
Cs
TIOOPF
= 30pF
c,**
TL/H/775B-t
TUH/775B-2
"Bandwidth and slew rale are proportional 10 t/Cf
·'mproves rejection of power supply noise by a factor of ten.
"Bandwidth and slew rate are proportional to 1/Cs
Feedforward Compensation
C2
5 pF
INPUT
-""'1/\,.......0004
> ......-- OUTPUT
Cl
500 pF
TUH/775B-3
3-377
CD
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
(Note 5)
LM30B
±18V
500mW
±10mA
±15V
Continuous
O·Cto +700C
LM10B/LM20B
Supply Voltage
±20V
Power Dissipation (Note 1)
500mW
Differential Input Current (Note 2)
±10mA
Input Voltage (Note 3)
±15V
Output Short·Circuit Duration
Continuous
Operating Temperature Range (LM1 08)
- 55·C to + 125·C
- 25·C to + 85·C
(LM208)
-65·Cto + 150·C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec)
DIP
260·C
H Package Lead Temp
300·C
(Soldering 10 seconds)
Soldering Information
Dual-In-Line Package
260·C
Soldering (10 seconds)
Small Outline Package
Vapor Phase (60 seconds)
215·C
220·C
Infrared (15 seconds)
See AN-450 "Surface Mounting Methods and Their Effect on Product
Reliability" for other methods of soldering surface mount devices.
ESD Tolerance (Note 6)
2000V
- 65·C to + 150·C
2600C
300·C
Electrical Characteristics (Note 4)
Parameter
LM10B/LM208
Condition
Min
Typ
LM308
Max
Min
Units
Typ
Max
Input Offset Voltage
TA = 25·C
0.7
2.0
2.0
7.5
mV
Input Offset Current
TA = 25·C
0.05
0.2
0.2
1
nA
Input Bias Current
TA = 25·C
0.8
2.0
1.5
7
Input Resistance
TA = 25·C
Supply Current
TA = 25·C
Large Signal Voltage
Gain
TA = 25·C, Vs = ±15V
Your = ±10V, RL;;' 10 kll
30
0.3
50
10
70
0.6
300
Input Offset Voltage
40
0.3
25
3.0
Input Offset Current
15
6.0
0.4
Average Temperature
Coefficient of Input
Offset Current
0.5
2.5
0.15
0.4
Input Bias Current
2.0
3.0
Supply Current
TA = +125·C
Large Signal Voltage
Gain
Vs = ±15V, Your = ±10V
RL;;' 10 kll
Output Voltage Swing
Vs= ±15V,RL= 10kll
25
±13
3-378
mA
V/mV
10
mV
30
/LVrC
1.5
nA
10
pArC
10
nA
mA
V/mV
15
±14
0.8
300
3.0
Average Temperature
Coefficient of Input
Offset Voltage
nA
Mll
±13
±14
V
.-i!:
......
Electrical Characteristics (Note 4) (Continued)
Min
Vs = ±15V
Input Voltage Range
0
LM108/LM208
Condition
Parameter
Typ
±13.5
LM308
Max
Min
Typ
Units
Max
CO
......
.-i!:
~
±14
V
0
CO
......
Common Mode
Rejection Ratio
85
100
80
100
dB
.-i!:
Supply Voltage
Rejection Ratio
80
96
80
96
dB
0
CO
Co)
Nole I: The maximum junction lemperalure of the LMI 08 is 150"C, for the LM208, 100·C and for the LM308, 85·C. For operating at elevated lemperatures, devices
in the HOB package must be derated based on a thermal resistance of 16frC/W, junction to ambient, or 20°C/W, junction to case. The thermal resistance of the
dual·in·line package is 100"C/W. junction to ambient.
Note 2: The inputs are shunted with back-ta-back diodes for Qvervoltage protection. Therefore, excessive current will flow if a differential input voltage in excess of
1V is applied between the inputs unless some limiting resistance is used.
Nole 3: For supply voltages less than ± 15V, the absolute maximum input voltage is equal
to the supply voltage.
Nole 4: These specifications apply for ±5V ,; Vs ,; +20Vand -55·C ,; TA ,; + I 25·C, unless otherwise specified. With the LM208, however, ali temperature
specifications are limited to - 25·C ,; TA ,; 85·C, and for the LM308 Ihey are limited 10 O·C ,; TA ,; 70·C.
Nole 5: Refer to RETSI08X for LMI08 military specifications.
Nole 6: Human body model, 1.5 kG in series with 100 pF.
Schematic Diagram
COMPENSATION
COMPENSATION
r---------_e---+~1-i~_t~----_e_+~8----_t~------------------_4t_--------7 V·
R4
20K
'11----j1t-..JV1I\r....=-6 0 UTPUT
INPUTS
+ ---+-----....-t
Rl
2K
RIZ
820
4
~~~--~~~~--~~~~----e_~~----_e-------V-
TL/H17758-8
3-379
Typical Performance Characteristics LM108/LM208
Offset Error
Input Currents
Drift Error
u
u
1
E
.!,
......
1.0
-...!\! f- -
0.&
,.....
l"'-
a:
B
!; I.Ii
!!
0.1.
i" 100.
0.0&
OFFSET
1 1
o
-a
-3& -'5 5
'M
25 45 15 IS 'DS 125
'20
Power Supply Rejection
'00
t.-='....I-_I-_I--!::~cc
'DOl
~
§
10'
.
10 1
...
I.
..
:I
~
i
"'
~
~
'K
10K
FREDUENCY IH.I
110
w
..~
100
>
'5
I I
-
fA -zsoc
.
~
..~
!
~-Sl"C
~"25'C
V
I J
I I
10
...
e.
!!
c
>
10
10
"
. ./
i .,..
~
i'
.I'
~
V
,.
'31
10
.
~ ~.
I ..,.
!
~
~
\
12
FREOUENCY 1HZ!
'00
15
20
SUPPLY VOLTAGE ItVI
Voltage Follower
Pulse Response
\ 1111111
TA ::.ISoC
Vs" :!:'SY
.
.....~
..
~
Cf~3pF
,.30pF
,~
10K 10111 1M , .
125°1:
II
I-
10
1111111
110
C.-lOa,:~ ~
'K
TA
200
Large Signal
Frequency Response
c
!;;
>
IK
IDK
lOOK
FREDUENCY IH,I
•
&
1
1
r-
INPUT
\
0
-2
OUTPUT
J 1 1
A-k&·~-
1\
-4
V,""5V_
Ct-30,F
-&
r~
Ct"30.F
10
2S~C
10
45
-28
TA '"
B
OUTPUT CURRENT (....AI
Ct- 30,F
GAl. PIIASE - - -
TA '" -55"C
400
2D
Co-, ••.--, "V-
40
20
500
\
TA~ -51"e
Ct'3 .~-t-C"3'Fm-
'1M
&00
Vs·:t15V
/'
TA~25JC
1M
FREDUENCY (H"
18
~
Vs=:tUV
'OK lOOK
Supply Current
.... "'" "-
A""25"C
'-IIOH,
128
!
...
I
TA =25"1:
lout· tl mA
300
Open Loop
Frequency Response
~~
-
AY ',':C"30.F
Ay" iaoo.cj·O.F
lAy. IGOO. Ct ~ 30 ,F
I
,0,oa'K
Output Swing
10
CI'O
II
'0
SUPPLY VOLTAGE ItVI
100
,M,OM
J
FREDUENCY IH"
Voltage Gain
;;
'OOK
~
\t
'0'
lo-l
'00
-7
_/
'< \, /'
o 1It"'
-20
...
p-
I
u
~
'""'C
Closed Loop
Output Impedance
,0'
Vs· :!:'5Y
'28
!DOM
taM
INPUT RESISTANCE IIlI
TE_RATURE I'CI
-I
-10
,M
"
20 40 BIt
n.oo
120141 110
TIME I.s)
TL/H/775B-6
3-380
r
3:
.....
Typical Performance Characteristics LM308
o
co
......
Input Currents
..
i.
~
~
z
0.25
0.20
....,..
..it..
....
.
1
-
. . . . r-...
1
J•
~- -
0.10
~
~
.
....ffi
..
100
~
10
iC
~
ill
1
1M
TEMPERATURE I 'CI
Power Supply Rejection
100
TA =25°C
'"li
!
10'
100
z
[;1
10'
~
40
5....
IOU
5
20
!;
10
lK
10K
lOOK
100
FREOUENCY IHd
Voltage Gain
lK
10K
lOOK
1M
"'
!-T. '10'C
100
""
Av=' •• C.",O,F
I
lOUT::!:' mA
Vs· ±15V
100
10K
lOOK
1M
10M
Supply Current
I f"'II:::f'
-
lK
40a
Vs= ""IV
T.! a'c-
350
TA -7a'C ...
:£
Ie
i:!
TA=25'C-
~
T~ .a!c
T... = ZS"C
I
TA ·21c e
FREQUENCY 1Hz'
Output Swing
==
-
110
tV"000,Cf~31I'F
.....
10
10M
15
T.'~OC
/
FREQUENCY IHd
120
;;;
~ Av~ ~Cf:3aPF
lo-~
-20
100
10-'
)
\/..
~
.
/'
./
\(
"'(
~
;;
>
~
§
BD
IV
/
10'
60
t;
~
,.~
Closed Loop
Output Impedance
Ay = 1
;;;
co
co
INPUT RESISTANCE IIll
Vs= !:'5V
~
'"
IS~
120
IODD
z
C
100M
10M
INPUT RESISTANCE
Input Noise Voltage
10
r
3:
Co)
o
co
;.
~
1
01020304050601010
:::is
o
co
......
~
!;;
BIAS
0.15
Drift Error
l'oOO
I
I
-
!
Offset Error
r
3:
I\)
~
25a
~
150
110
=Z5~C
T. -lO'C
.... 1---
200
ill
It:
Cp 0
'-100Hz
TA
31Ia
50
a
90
10
15
SUPPLY VOLTAGE I'VI
5
2a
Open Loop
Frequency Response
Large Signal
Frequency Response
120
100
;;;
10
'z"
~
60
co
4a
,.
2a
..
~
10
11
:s;;; ~ Cf=3PFtCI"3P~1Ir
""
~
I-'"
C, • 100 'F;:;
180
135
CplDpF
""
GAIN
PHAtE - - -
C"''',:~
~
C.. 3D pF
-20
1
10
100
45
IK
10K tOOK 1M
FREQUENCY 1Hz,
10M
Voltage Follower
Pulse Response
9
~'"
~
l;
Ii....
~
ga
20
10
15
SUPPLY VOLTAGE I'VI
5
OUTPUT CURRENT l'mAI
12
~
E
co
INPUT
z
co
!
z
.~
_\
~
co
I~
,.
co
-2
-I
OUTPUT
1\
I
'I TA'~5~Vs"
-6
a
lK
laK
IODK
FREQUENCY IHd
1M
tIS~_
CplOpF
-9
-la
o 20 40 &0 la 110 12a 140 III
TIME,".)
TL/HI775B-7
3·381
co
oCO)
:E
Typical Applications
...I
~
C\I
Sample and Hold
v'
:::E
...I
"CO
R1
1M
INPUT
o
.,...
:::E
...I
SAMPLE
OUTPUT
tTellon polyethylene or
polycarbonate dielectric
capacitor
Worst case drill less than
2.5 mVlsec
C2
30 pF
TLlH17758-4
High Speed Amplifier with Low Drift and Low Input Current
RIN
INPUT
RF
--"fV'.v-_...-----.---...J'AI~----...-
OUTPUT
.00Zl'l'
150K
.00Z"F
150K
Tl/H17758-5
3·382
r-
Typical Applications
...3:
(Continued)
Q
co
......
r3:
Fastt Summing Amplifier
cst
N
Q
co
......
r3:
Co)
R,
Q
co
Rs
INPUT-"VII'v~t-----------...
-""1
Rl
IS0K
Cl
0.002 I'F
C4
150 pF
CJ
0.0021'F
OUTPUT
R2
1M
*In addition to increasing
speed, the LM101A raises
high and low frequency
gain, increases output
drive capability and eliminates
thermal feedback.
RJ
1M
tPower Bandwidth: 250 KHz
Small Signal Bandwidth: 3.5 MHz
Slew Rate: 10VI/LS
6 X 10-8
tC5=--R-,-
TUH/7758-12
Connection Diagrams
Metal Can PaCkage
Dual-In-Line Package
COMP2
COMP2
COMP
INPUT OUTPUT
INPUT +
OUTPUT
INPUTS
NC
TL/H/7758-15
TLlH/7758-13
Top View
Order Number LM10SH, LM20SH or LM30SH
See NS Package Number HOSC
Order Number LM10SJ-8, LM208J-S, LM30SJ-S,
LM308M or LM30SN
See NS Package Number J08A, MOSA or N08E
'Package is connected to Pin 4 (V-)
"·Unused pin (no internal connection) to allow far input anti-leakage guard
ring on printed circuit board layout.
3-383
~National
~ Semiconductor
LM 108A/LM208A/LM308A Operational Amplifiers
General Description
The LM108/LM108A series are precision operational amplifiers having specifications about a factor of ten better than
FET amplifiers over their operating temperature range. In
addition to low input currents, these devices have extremely
low offset voltage, making it possible to eliminate offset adjustments, in most cases, and obtain performance approaching chopper stabilized amplifiers.
The devices operate with supply voltages from ± 2V to
±18V and have sufficient supply rejection to use unregulated supplies. Although the circuit is interchangeable with and
uses the same compensation as the LM101A, an alternate
compensation scheme can be used to make it particularly
insensitive to power supply noise and to make supply bypass capacitors unnecessary.
The low current error of the LM108A series makes possible
many designs that are not practical with conventional amplifiers. In fact, it operates from 10 Mfl source resistances,
introducing less error than devices like the 709 with 10 kfl
sources. Integrators with drifts less than 500 p,V/sec and
analog time delays in excess of one hour can be made using capacitors no larger than 1 p,F.
The LM208A is identical to the LM108A, except that the
LM208A has its performance guaranteed over a -25'G to
+85'G temperature range, instead of -55'C to + 125'C.
The LM308A devices have slightly-relaxed specifications
and performances over a O'G to + 70'G temperature range.
Features
•
•
•
•
•
Offset voltage guaranteed less than 0.5 mV
Maximum input bias current of 3.0 nA over temperature
Offset current less than 400 pA over temperature
Supply current of only 300 p,A, even in saturation
Guaranteed 5 p,V I'C drift
Compensation Circuits
Standard Compensation Circuit
Rl
Alternate' Frequency Compensation
-V'N -JVVV~"'--J\,/VV----,
-V'N -.III'VY~~--.III'VY----,
>-+-V
OUT
R3
+VIN
R2
Rl
RZ
>-"'-V
OUT
R3
+V .. -~""'---I
-.III'VY---t
Ct;;, Rl Co
R1+R2
*Improves rejection of power supply
noise by a factor of ten.
Co = 30pF
Cf **
T_
C.
1000pF
TL/H/7759-1
"Bandwidth and slew rate are proportional to l/Ct.
TL/H/7759-2
··Bandwidth and slew rate are proportional to 1/Cs .
Feedforward Compensation
C2
5 pF
Rl
10K
INPUT
-Y\,."....~-I
~~..---- OUTPUT
CJ
~10PF
Cl
500 pF
TL/H17759-3
3-384
LM108A/LM208A Absolute Maximum Ratings
-65'C to
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.) (DIP)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 5)
Supply Voltage
±20V
Power Dissipation (Note 1)
500mW
±10mA
Differential Input Current (Note 2)
±15V
Input Voltage (Note 3)
Soldering Information
Dual-In-Line Package
Soldering (10 sec.)
Small Outline Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
+ 150'C
260'C
260'C
215'C
220'C
See An-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
2000V
ESD Tolerance (Note 6)
Output Short-Circuit Duration
Continuous
Operating Free Air Temperature Range
LM108A
-55'Cto + 125'C
LM208A
- 25'C to + 85'C
Electrical Characteristics (Note 4)
Typ
Max
Units
Input Offset Voltage
TA = 25'C
0.3
0.5
mV
Input Offset Current
TA = 25'C
0.05
0.2
nA
Input Bias Current
TA = 25'C
0.8
2.0
nA
Parameter
Conditions
Input Resistance
TA = 25'C
Supply Current
TA = 25'C
Large Signal Voltage Gain
TA = 25'C, Vs = ±15V,
VOUT = ±10V, RL:2: 10 kO
Min
30
70
0.3
80
1.0
Input Offset Current
Average Temperature Coefficient
of Input Offset Current
0.5
Input Bias Current
0.15
Supply Current
TA = 125'C
Large Signal Voltage Gain
Vs = ±15V, VOUT = ±10V,
RL:2: 10 kO
Output Voltage Swing
Vs = ±15V, RL = 10 kO
Input Voltage Range
Vs = ±15V
1.0
mV
5.0
p.VI'C
0.4
nA
2.5
pAl'C
3.0
nA
0.4
rnA
V/mV
40
±13
rnA
V/mV
300
Input Offset Voltage
Average Temperature Coefficient
of Input Offset Voltage
MO
0.6
±14
V
±13.5
V
Common Mode Rejection Ratio
96
110
dB
Supply Voltage Rejection Ratio
96
110
dB
Note 1: The maximum iunction temperature 01 the LMI 08A is 150"C, while that 01 the LM208A Is 100"C. For operating at elevated temperatures, devices in the HOS
package must be derated based on a thermal resistance 01 160"C/W,Iunction to ambient, or 20"C/W, junction to case. The thermal resistance 01 the dual-In-line
package is l00'C/W, junction to ambient.
Note 2: The inputs are shunted wilh back-to-back diodes lor overvoltage protection. Therelore,
1V is applied between the inputs unless some limiting resistance is used.
excessive current wilillow il a differential input voltage in excess 01
For supply voltages less than ± 15V, the absolute maximum input voltage is equal to the supply voltage.
These specHications apply lor ±5V ,. Vs ,. ±20Vand -55'C ,. TA ,. 125'C, unless otherwise specHied. With the LM208A, however, all temperature
specifications are limited to - 25'C ,. TA ,. 85'C.
Note 5: Reier to RETS108AX lor LM108AH and LM10SAJ-8 military specilications.
Note 6: Human body model, 1.5 kn in series with 100 pF.
Note 3:
Note 4:
3-385
LM308A Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
±18V
Power Dissipation (Note 1)
500mW
±10mA
Differential Input Current (Note 2)
Input Voltage (Note 3)
±15V
Output Short-Circuit Duration
Continuous
Operating Temperature Range
OOCto +70·C
- 65·C to + 150·C
Storage Temperature Range
H-Package Lead Temperature
(Soldering. 10 sec.)
300·C
Lead Temperature (Soldering, 10 sec.) (DIP)
260·C
Soldering Information
Dual·ln-Line Package
Soldering (10 sec.)
2600C
Small Outline Package
Vapor phase (60 sec.)
215·C
Infrared (15 sec.)
2200C
See An-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
ESD rating to be determined.
Electrical Characteristics (Note 4)
Parameter
Conditions
Min
Typ
Max
Units
mV
Input Offset Voltage
TA = 25·C
0.3
0.5
Input Offset Current
TA = 25·C
0.2
1
nA
Input Bias Current
TA = 25·C
1.5
7
nA
Input Resistance
TA = 25·C
Supply Current
Large Signal Voltage Gain
10
TA = 25·C. Vs = ±15V
TA = 25·C, Vs = ±15V,
.VOUT= ±10V.RL:;;' 10kO
Input Offset Voltage
Vs = ±15V. Rs = 1000
Average Temperature Coefficient
of Input Offset Voltage
Vs = ±15V. Rs = 1000
40
0.3
80
Input Offset Current
2.0
Input Bias Current
Large Signal Voltage Gain
Vs= ±15V,VOUT= ±10V.
RL:;;' 10kO
Output Voltage Swing
Vs = ±15V. RL = 10 kO
±13
Input Voltage Range
Vs = ±15V
±14
Common Mode Rejection Ratio
mA
V/mV
0.73
mV
5.0
/LvrC
1.5
nA
10
pAl·C
10
nA
V/mV
60
96
0.8
300
2.0
Average Temperature Coefficient
of Input Offset Current
MO
±14
V
110
dB
V
Supply Voltage Rejection RatiO
110
96
dB
Note 1: The maximum iunction temperature of the LM30BA is B5"C. For operating at elevated temperaturas, devices in the HOB package must be derated based on
a thermal resistance of 160'C/W, junction to ambient, or 20'C/W, junction to case. The thermal resistance of the dual~n-line package is 100'C/W, junction to
ambient.
Note 2: The inputs are shunted with back-to-back diodes for ovelVoltage protection. Therefore, excessive current will flow if a differential Input voltage In excess of
tV is applied .between 1he Inputs unless some limiting resistance is used.
Note 3: For supply voltages less than ± 15V, the absolute maximum input voltage is equal to the supply voltage.
Note 4: These specHications apply for ± 5V ,;: Vs ,;: ± 15V and O'C ,;: TA ,;: + 70'C, unless otherwise specified.
3-386
Typical Applications
Sample and Hold
INPUT
OUTPUT
treHon, polyethylene or polycarbonate dielectric capacitor.
Worst case drift less than 2.5 mV/sec.
TLlH/7759-4
High Speed Amplifier with Low Drift and Low Input Current
INPUT -..J\N\r_-.-----~t_---...J\N\r_----.- OUTPUT
.002pF
150K
5K
.002 pF
150K
I'·"
TL/H/7759-5
3-387
i
:::E
....I
~o
N
:::E
.......
....I
c(
CO
....
o
:::E
....I
Application Hints
A very low drift amplifier poses some uncommon application
and testing problems. Many sources of error can cause the
apparent circuit drift to be much higher than would be predicted.
Resistors can cause other errors besides gradient generated voltages. If the gain setting resistors do not track with
temperature a gain error will result. For example, a gain of
1000 amplifier with a constant 10 mV input will have a 10V
output. If the resistors mistrack by 0.5% over the operating
temperature range, the error at the output is 50 mY. Referred to input, this is a 50 p.V error. All of the gain fixing
resistor should be the same material.
Testing low drift amplifiers is also difficult. Standard drift
testing technique such as heating the device in an oven and
having the leads available through a connector, thermoprobe, or the soldering iron method-do not work. Thermal
gradients cause much greater errors than the amplifier drift.
Coupling microvolt signal through connectors is especially
bad since the temperature difference across the connector
can be 50·C or more. The device under test along with the
gain setting resistor should be isothermal.
Thermocouple effects caused by temperature gradient
across dissimilar metals are perhaps the worst offenders.
Only a few degrees gradient can cause hundreds of microvolts of error. The two places this shows up, generally, are
the package-to-printed circuit board interface and temperature gradients across resistors. Keeping package leads
short and the two input leads close together helps greatly.
Resistor choice as well as physical placement is important
for minimizing thermocouple effects. Carbon, oxide film and
some metal film resistors can cause large thermocouple errors. Wirewound resistors of evanohm or manganin are best
since they only generate about 2 p.V I·C referenced to copper. Of course, keeping the resistor ends at the same temperature is important. Generally, shielding a low drift stage
electrically and thermally will yield good results.
Schematic Diagram
COMPENSATION
COMPENSATION
r-________~--~1~t-_t~----~~8~--_t~------------------~------~7
R5
R6
20K
10K
v'
'11-.....~JVV\,....6:.. OUTPUT
INPUTS
-+________~~
+~3____
RI
2K
R12
820
Tl/H/7759-6
3-388
.....
3:
-10
o
Connection Diagrams
Metal Can Package
;.......
Dual-In-Line Package
.....
COMP2
COMP
3:
o
COMP2
N
V·
~
OCI
INPUT-
.....
3:
o
c.:I
INPUTS
OCI
l>
v-
v-
Ne
TL/H/7759-7
Pin 4 is connected to the case,
TL/H/7759-8
Top View
... ·Unused pin (no internal connection) to allow for input anti·leakaga guard
ring on printed circuit board layout.
Order Number LM108AJ-8, LM208AJ-8, LM308AJ-8,
LM308AM or LM308AN
See NS Package Number J08A, M08A or N08E
Order Number LM108AH, LM208AH or LM208AH
See NS Package Number H08C
3-389
~
.....
r----------------------------------------------------------------------------,
~ ~National
~ ~ Semiconductor
~
:l~ LM112/LM212/LM312 Operational Amplifiers
.....
.....
:l General Description
The LM112 series are micropower operational amplifiers
with very low offset-voltage and input-current errors-at
least a factor of ten better than FET amplifiers over a
-55·C to + 125·C temperature range. Similar to the LM108
series, that also use supergain transistors, they differ in that
they include internal frequency compensation and have provisions for offset adjustment with a single potentiometer.
known to suffer catastrophic failure caused by short-duration overvoltage spikes on the supplies. Unlike other internally-compensated Ie amplifiers, it is possible to overcompensate with an external capacitor to increase stability margin.
The LM212 is identical to the LM112, except that the LM212
has its performance guaranteed over a - 25·C to + 85·C
temperature range instead of - 55·C to + 125·C. The
LM312 is guaranteed over a O·C to +70·C temperature
range.
These amplifiers will operate on supply voltages of ± 2V to
±20V, drawing a quiescent current of only 300 pA Performance is not appreciably affected over this range of voltages, so operation from unregulated power sources is easily
accomplished. They can also be run from a single supply
like the 5V used for digital circuits.
Features
!II Maximum input bias current of 3 nA over temperature
The LM112 series are the first IC amplifiers to improve reliability by including overvoltage protection for the MOS compensation capacitor. Without this feature, IC's have been
!II Offset current less than 400 pA over temperature
!II Low noise
!II Guaranteed drift specifications
Connection Diagram
Metal Can Package
vTL/H/77S1-4
Top View
Order Number LM112H, LM212H, or lM312H
See NS Package Number H08e
Auxiliary Circuits
Overcompensation for Greater Stability Margin
Offset Balancing
AI
lOOK
.-i--V'
TLlH/77S1-2
TL/H/77S1-3
3-390
rs::
......
......
Absolute Maximum Ratings
N
.......
If Military/Aerospace specified devices are required, please contact the
National Semiconductor Sales Office/Distributors for availability and
specifications.
(Note 5)
r-
s::
N
......
N
LM112/LM212
±20V
LM312
±18V
.......
Power Dissipation (Note 1)
500mW
500mW
w
......
Differential Input Current (Note 2)
±10mA
±10mA
±15V
±15V
Supply Voltage
Input Voltage (Note 3)
Output Short-Circuit Duration
r-
s::
N
Continuous
Continuous
Operating Temperature Range
LM112
LM212
-55·C to + 125·C
- 25·C to + 85·C
O·Cto +70·C
Storage Temperature Range
- 65·C to + 150·C
-65·Cto +150·C
300·C
300·C
Lead Temperature (Soldering, 10 sec.)
ESD rating to be determined.
Electrical Characteristics (Note 4)
Parameter
LM112/LM212
Conditions
Min
Typ
LM312
Max
Min
Units
Typ
Max
Input Offset Voltage
TA
= 25·C
0.7
2.0
2.0
7.5
mV
Input Offset Current
TA
= 25·C
0.05
0.2
0.2
1
nA
Input Bias Current
TA
= 25·C
0.8
2.0
1.5
7
Input Resistance
TA
= 25·C
70
Supply Current
TA
= 25·C
Large Signal Voltage Gain
TA = 25·C, Vs = ±15V
VOUT = ±10V, RL:;' 10 kfl.
30
0.3
50
10
0.6
300
Input Offset Voltage
40
0.3
25
3.0
Input Offset Current
15
6.0
0.4
Average Temperature
Coefficient of Input
Offset Current
0.5
2.5
0.15
0.4
Input Bias Current
2.0
3.0
= 125·C
Supply Current
TA
Large Signal Voltage Gain
Vs = ±15V, VOUT
RL:;' 10kfl.
Output Voltage Swing
Vs
= ±15V, RL = 10 kfl.
Input Voltage Range
Vs
= ±15V
0.8
300
3.0
Average Temperature
Coefficient of Input
Offset Voltage
nA
Mfl.
rnA
V/mV
10
mV
30
",vrc
1.5
nA
10
pArC
10
nA
rnA
= ±10V
25
±13
V/mV
15
±14
±13.5
±13
±14
V
±14
V
Common-Mode Rejection Ratio
85
100
80
100
dB
Supply Voltage Rejection Ratio
80
96
80
96
dB
Note 1: The maximum junction temperature of the LM112 is 150"C, LM212 is 100"C and LM312 is 85"C. For operating at elevated temperatures, devices in the HOB
package must be derated based on a thermal resistance of 160"C/W, junction to ambient, or 20"C/W. junction to case.
Note 2: The inputs are shunted with shunt diodes for Qvervoltage protection. Therefore, excessive current will flow if a differential input voltage in excess of 1V is
applied between the inputs unless some limiting resistance is used.
Nole 3: For supply voltages less than ± 15V, the absolule maximum input voltage is equal 10 the supply voltage.
Nole 4: These specifications apply for ±5V ,; Vs ,; ±20Vand -55°C'; TA ,; +125°c (LM112), -25°C'; TA ,; +85°c (LM212), ±5V,; Vs ,; ±15Vand
0° C'; TA ,; + 70°C (LM312) unless olherwise noted.
Nole 5: Refer to RETS112X for LM112H military specificalions.
3-391
Typical Performance Characteristics LM112/LM212
Input Currents
z.a
1.5
C
oS
.8
I-
:Ii
I-
2
~
~
1.8
i' r--.
0.5
~
IIJ-
Offset Error
'18
'T~ ~ 25:C.
==
-==
--
Drift Error
1I0Il
~
u
~
-
0.15
0.10
...........
0.05
~
:il
~
I
o
-55 -35 -15 5 Z5 45 65 85 105 125
lOOK
1M
121
-.,
S
!
i 1.
i
:!!
laD
Ii
...
:;!
~
iii
~
10
40
11
10k
~
POSITIVE SUPPLY
100
-
.
i..
~
T.! Z5'C
T&--55"C
j·=lC-
-
0
>
40
21
_
Co' \1110
--
t-t-t--
/-
~~;;,i
135
-
Co'II1OO'F--'~t--
....
110 11 10k 1101 1M
FREQUENCY CH'I
L-~
10
__~__L-~__~--J
laD
:I!
~
aD !j;
.
::;
45
.
!
i..
'"
I!:
'"
0
100
3
...~
..
8
~ -5~'C
~
iii
...
I I
lA. _55 I1C
4DD
3DD
V
~
2DD
I--
laD
o
--
5
10
10
TA -25"C
V... i11Y
...
!l
•
~
..~
.
>
~
10K
FREQUENCY CHz!
I I
I I
15
Voltage Follower Pulse
Response
I
I
I
r--
INPUT
l\
w
11
T~ "Z5~
T~ '.1J·C
SUPPLY VOLTAGE CtVl
lIt-
10M
Supply Current
C
III
\
laD
10K 110K 1M
FREQUEIICY Cilli
Large Signal Frequency
Response
12
1K
SOD
'-
-ZO
10
10M
1\
a
110
.......
0.1
1M
Vs" t1SV
T.
11
GAIN
PHASEI=r
w
18-t
OUTPUT CURRENT C,,"AI
121
80
CI
T.=Z5'Cil
15
110
10
!;
...
T" .. 125a C
~
Open Loop Frequency
Response
~
laDK
10
o
10
10K
11
--"
SUPPLY VOLTAGE CtVl
...
~
c0 10'
l:!
!!
!; 10'
Output Swing
15
''''' Hz
5
:!!
~
10'
FREQUENCY Cilli
aD
;;;
.
~
lr'
1111
Voltage Gain
~
!:;
0
>
111'
§
['\..
ZO
laDl
120
w
at
!""-..NEGATIVE SUPPLY
~
FREQUENCY Cilli
110
Av
1_
10M
Closed Loop
Output Impedance
-zo
180
10
1M
INPUT RESISTANCE cnl
Y... :t:1IiV
T" ·Z5"e
I'-..
10
0
10
~
1.0
lOOk
100M
IbM
Power Supply Rejection
I• • •
i!!
10
~
INPUT RESISTANCE C!ll
Input Noise Voltage
:!!
to:
111111
D.1
TEIftRATURE C'CI
;;;
100
i<
0
~I~AL
==
....
0
r-'
~
!i
OFFSET
103
V.·
TA -!SoC
I
-2
...
:1:15V
-t-Jt-t:
II
OUTPUT
-I
-I
-10
laDk
o
501aDI5D2Cll2S03CII3S0olGll
TIMEc.s1
TLlH17751-5
3-392
r-
Typical Performance Characteristics
Input Currents
3:
.....
.....
I\)
LM312
Offset Error
~ 1000
......
r-
Drift Error
1000,,_
~
~
UIIAS
~
'"~
~
I..
~
~
z
.25
........ .......
.20
-
.15
~
~
~~ 10~1I~~m
10
20
30 40
50
60
70
~
80
100M
Closed Loop
Output Impedance
120
10'
,---,--,---,-,--;r--o
100
~
100
~~lt~~~I§JI
lK
100
10K
1---""---1---1--
80
~ 601-"""t---''Ic--+-+--j
OJ
'"
I--t-""'ct----'lrr--+--j
40
i 201--t--+-"o,od-'~-+--l
z
-20 '-_'----'_-L_-'-_-'
IK
10K
tOOK
1M
10M
100
lOOK
FREQUEr4CY 1Hz)
100
FREQUENCY (Hzl
Voltage Gain
400
;;;
TA
liD
~ ;;;::
Vr
t
:
5V
350
j
TA "DOC
",I Z5OC
~
~
P'T. -o'c
'"
V
iTA :2SoC _ _ _
TA '" 70 0 e
lOOK
1M
10M
250
~
150
'"
...
200
---
_~._oJc
-
300
~
B
,.
t·\o'c
100
10K
Supply Current
Output Swing
15
,::Z I Hz
IK
FREQUENCY (Hz)
120
~
10M
1M
INPUT RESISTANCE (ll)
Power Supply Rejection
Input Noise Voltage
~
"z
10.l1li
INPUT RESISTANCE (ll)
~
!
3:
Co)
.....
I\)
1.0'0LOK--'-.llWlJI'-M--'-.llWJJ'0'-M--'-.llUWJ'DOM
TEMPERATURE I'CI
1000
100
;;
I
o
~
t;:
.....
I\)
......
r-
'"'"
'"'"w
'"
~ET- I--
.10
o
i
lDO
3:
I\)
fA :z25"'C
TA = 70 0 e
100
50
so
o
10
20
15
I
120
iii
"z
~
'0
w
~
"~
'"
~
40
20
Cs'
\Ooo~~~
--z '"' -
r- cI"'
r-r- - ,
r- "-- Cs ·1000pF-'
R-. -
-20
0.1
10
100
IK
10K tOOK 1M
FREQUENCY (Hz)
10
135
%
90
45
Voltage Follower Pulse
Response
10
TA '" 25°C
~
1;
:;
~
,
12
Vs· ±15V
-
~
'"z
iii
"~
~
iii
~
~
~
~
>
o
100
IK
TA '" 25°C
Vs '" ±15V
\
"
10K
FREQUENCY (Hz)
20
15
(SUPPLY VOLTAGE (:tV)
Large Signal Frequency
Response
16
GAIN
180
PHASE I " " ' F
60
5
OUTPUT CURRENT (±mA)
Open Loop Frequency
Response
100
o
o
SUPPLY VOLTAGE I±V)
-r.lt±
II
INPUT
-2
-4
-6
\
\
~
I
I
I
OUTPUT
1/
-8
-10
lOOK
50 1001502110250300 350 400
TIME (IU)
TLlH/7751-6
3-393
•
LM112/LM212/LM312
IALANCE
r " •••
tn
COMPENSATION
•
()
r •
•
•
:::T
CD
y'
3
!
(;'
o
iii'
cc
Rl
2K
iii
3
RID
200
01
R9
RI
4SY
2SD
1
~.
100
OUTPUT
&
c.>
l>
~
•
••
•
I~
INPUTS
+
•
RII
2K
. . .,~.
•
~..
•
4y_
TL/H/nSl-l
riii:
....
....
~National
Q)
~ Semiconductor
........
riii:
....
N
LM118/LM218/LM318
Operational Amplifiers
Q)
........
riii:
(0)
....
Q)
General Description
The LM118 series are precision high speed operational amplifiers designed for applications requiring wide bandwidth
and high slew rate. They feature a factor of ten increase in
speed over general purpose devices without sacrificing DC
performance.
The LM118 series has internal unity gain frequency compensation. This considerably simplifies its application since
no external components are necessary for operation. However, unlike most internally compensated amplifiers, external frequency compensation may be added for optimum
performance. For inverting applications, feedforward compensation will boost the slew rate to over 150V/ ",s and almost double the bandwidth. Overcompensation can be
used with the amplifier for greater stability when maximum
bandwidth is not needed. Further, a single capacitor can be
added to reduce the 0.1 % settling time to under 1 "'S.
The high speed and fast settling time of these op amps
make them useful in AID converters, oscillators, active fil-
ters, sample and hold circuits, or general purpose amplifiers.
These devices are easy to apply and offer an order of magnitude better AC performance than industry standards such
as the LMl09.
The LM218 is identical to the LM118 except that the LM218
has its performance specified over a - 25·C to + 85·C temperature range. The LM318 is specified from O·C to + lO·C.
Features
III 15 MHz small signal bandwidth
iii Guaranteed 50V/
"'S slew rate
II Maximum bias current of 250 nA
a Operates from supplies of ±5V to ±20V
a Internal frequency compensation
III Input and output overload protected
III Pin compatible with general purpose op amps
Connection Diagrams
Dual-In-Line Package
Metal Can Package"
COMPENSATION-2
COMP -2
BAL/COMP -1
INPUT....;;2+-~......
INPUT""";;+--"""-
y-
y_
4
OUTPUT
BAl/COMP-3
TL/H17766-2
Top View
TL/H/7766-3
·Pin connections shown on schematic diagram
Top View
and typical applications are for TO·5 package.
Order Number LM118J-8, LM31BJ-B,
LM31BM or LM31BN
See NS Package Number JOBA, MOBA or NOBB
Order Number LM11BH, LM21BH or LM31BH
See NS Package Number HOBC
3-395
•
co
..C')
::!
....I
.....
co
..-
C'!
:E
....I
.....
co
...,....
:E
....I
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 6)
Supply Voltage
±20V
Power DiSSipation (Note 1)
Differential Input Current (Note 2)
Input Voltage (Note 3)
Operating Temperature Range
LM118
LM218
LM318
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
Hermetic Package
Plastic Package
500mW
±10mA
±15V
Output Short·Circuit Duration
- 55'C to + 125'C
- 25'C to + 85'C
O'Cto +70'C
-65'Cto +150'C
300'C
260'C
Soldering Information
Dual·ln·Line Package
Soldering (10 sec.)
Small Outline Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
Continuous
260'C
215'C
220'C
See AN·450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
ESD Tolerance (Note 7)
2000V
Electrical Characteristics (Note 4)
Parameter
LM118/LM218
Conditions
Min
Typ
LM318
Max
Min
Typ
Units
Max
Input Offset Voltage
TA = 25'C
2
4
4
10
mV
Input Offset Current
TA = 25'C
6
50
30
200
nA
Input Bias Current
TA = 25'C
120
250
150
500
Input Resistance
TA = 25'C
Supply Current
TA = 25'C
Large Signal Voltage Gain
TA = 25'C, Vs = ±15V
VOUT = ±10V, RL;;' 2 kO
50
200
25
200
V/mV
Slew Rate
TA = 25'C, Vs = ± 15V, Av = 1
(Note 5)
50
70
50
70
V/,..s
Small Signal Bandwidth
TA = 25'C, Vs = ±15V
1
3
5
0.5
8
3
5
15
nA
MO
10
15
rnA
MHz
Input Offset Voltage
6
15
mV
Input Offset Current
100
300
nA
Input Bias Current
500
750
Supply Current
TA = 125'C
Large Signal Voltage Gain
Vs = ±15V, VOUT = ±10V
RL;;' 2kO
Output Voltage Swing
Vs = ±15V,RL = 2kO
Input Voltage Range
4.5
25
±12
±13
Vs = ±15V
80
±12
V/mV
±13
V
100
dB
±11.5
100
nA
rnA
20
±11.5
Common·Mode Rejection Ratio
7
70
V
Supply Voltage Rejection Ratio
70
80
65
80
dB
Nole 1: The maximum junction temperature of the LMI18 is 150"C, the LM218 is II O"C, and the LM318 is II O"C. For operating at elevated temperatures, devices
in the H08 package must be derated based on a thermal resistance of 160"C/W, junclion to ambient, or 20'C/W, junction to case. The thermal resistance of the
dual·in·line package is 100'C/W, junclion to ambient.
Note 2: The inputs are shunted with back-to·back diodes for overvoltage protection. Therefore, excessive current will flow if a differential input voltage in excess of
1V is applied between the inputs unless some limiting resistance is used.
Nole 3: For supply voltages less than ± 15V. the absolute maximum input voltage is equal to the supply voltage.
Nole 4: These specifications apply for ±5V,;; Vs ,;; ±20Vand -55'C,;; TA';; + 125'C (LMI18), -25"C ,;; TA ,;; + 85'C (LM218), and O"C';; TA';; +70"C
(LM318). Also, power supplies must be bypassed with 0.1 "F disc capaCitors.
Nole 5: Slew rate is tested w~h Vs = ±15V. The LMI18 is in a unity·gain non.inverting configuration. VIN is stepped from -7.5V to +7.5V and vice versa. The
slew rales between - 5.0V and + 5.0V and vice versa are tested and guaranteed to exceed 50V I"s.
Nole 6: Refer to RETSI18X for LMI18H and LMI18J-8 military specifications.
Note 7: Human body model, 1.5 kll in series with 100 pF.
3·396
.-is:
.....
.....
Typical Performance Characteristics LM118, LM218
Input Current
Voltage Gain
j;;;;; t-!hs
150
100
1
Vs "±1SV
m
50
Z
..~
;
10
~
U
I-
OFFSET
~
~
Z
o
80
....... ~/r,025°C
-coz
I::-T1,)C
110
z
I-
'"'"
100
115
200
-r-c:;
25 45 65
85 105 125
5
20
-20
IDa
20
15
10
1000
~
100
~
3D
:::
'~"
300
~g
80
'~"
40
~
''""
10
:3
60
10k
lk
100
T."'2S-C_
100
lOOk
§
~
u
la'
~
10"
z
~
~
co
.......
10-3
"
\i
V
10
100
I\.
'"B
\
>-
20
'"
S
18
~
:::z
~
............. ~~
.......
lOOk
10
Vs "'±5V
>-
12
ii
10
I
l-
-55 -35 -15
5
20
Input Current
TA = 2S·C
400
~
200
~
-200
I.
~s=±1D~_
~
~::::::
.....
,
25 45 65 85 105 125
TEMPERATURE (OC)
15
20
\
\
-600
-0.8 -0.6 -G.4 -0.2
25
130
120
110
~
100
~
90
80
10
r- r-P~SI~'VE ~LE~
r-
..
I""'-
.."
NEGATIVE SLEW
60
-55 -35 -15 5
~
25 45 65 85 105 125
TEMPERATURE (OCI
1
~
1 mV
100
!;;
eo
10~V
I
10
~
>
Vs =±15V
Rs=A,,, lOW
Cf=SpF
0.2 0.4 0.6 0.8
Inverter Settling Time
15
:-
0
DIFFERENTIAL INPUT IVI
Voltage Follower Slew Rate
I I
8
600
OUTPUT CURRENT (mAl
Jso115~H-
...J
14
15
10
!!
1M
I I
I""'- ~I::-I""'r-...:
16
5
-400
10k
."('
V
SUPPLY VOLTAGE (±VI
TA =2S-C
CJ
f- ~
4.0
~
I
=::::::.;!..s ::t:2DV
i--:t:::j::..
T.,125:!:4.5
10M
T
10 ~--+---+-~~--~--;
Unity Gain Bandwidth
~
'"
1M
,,/
lit
10M
V
!;;
/
24
-;;
tOOk
~
12~~--+-~~;t--1
~
'"
Supply Current
Current Limiting
FREQUENCY IHd
22
10k
1M
".s...ill V . . . -:::: ~,'2i°C-
~
AVOY
- -
tit
lOOk
Vs "±1SV
~
Av lo 1000
10"
10'2
14
Vs ,,:t15V
TA :2S·C
10'
10k
T.'~
FREOUENCY (Hz)
Closed Loop Output
Impedance
10'
tit
5.0
20
FREQUENCY (Hz!
co
Rs=2ltn
o
10
rv\
5.5
-"
100
Co)
.....
FREQUENCY (HII
Common Mode Rejection
120
is:
"-
....
SUPPLY VOLTAGE !±VI
3000
~
NEGATIVES~
~
TEMPERATURE reI
co
.....
.-
~OS1TlVE SUPPL V
~
95
·55 -35 -15 5
is:
N
.....
TA =2S·C
~,
40
>-
100
Power Supply Rejection
60
~
105 i--T. '125°C
co
.....
.-
-5
~
co
-10
-15
Vs ·::t15Y ~
TA = 2S·C
Rs=UR
R,'5kn IOOiV
Ct = 'UpF
C,., 'O,IF
0,03
0.1
1 mV
!,omv
I I
D.l
TIME ""'
TLlH/7766-4
3-397
Typical Performance Characteristics LM118, LM218 (Continued)
Large Signal Frequency
Response
14
..
i
~
!
III
3
II
~
40
~
II
i!
T.-Irc
vr*l~v-
-
PH~I
~
K'
~
~
'\
!:;
,
GAIN"
-a
D
lUll III
211
511
111M 211M
SlIM
II
.
i
..S
Large Signal Frequency
Response
lID
f-
IDO ~
T.=2rc
Vs=:t15V
a
10
5
1'-
~
311
10M
c
-4
.... - \,
I.
..
esl .'"
III!!
J I II
!:;
-I
-12
V.-*lSV
T.=WC·-
-I.
-211
-1.2
G.2
T.-2rc - 225
l
.
'HA~ 131i~,. .
....... ., I\c
I .'"
I.:!!
~
16
II
1.1
e&
:I
-4
\
-I
-II
TA -IS·C
Vs=::ttiV
I I
-ID
1110 I . 1M 111M 11011
--- -
FEEDFORWARD
-I.
.,10
~OUT'UT
INPUT-
~
c
I
'H-
F\
--- -1""1-
~
IO!!
Fj"0F0I"'A~O
, . ,.
fA
Inverter Pulse Response
!:;
10
1.0
...
2D
GAIN'
lD011
.3OM
.... OUTPUT
I
Ie
28
-iIvt-
IN'U~-
TIME 1_,1
~
40
'"
FEEOFORWARO
1M
~
I:
J
n
I
I I
131iS;
V~=*lJv
~ aD
o
In:!!
Open Loop Frequency
Response
I.
...'"
i'..
\I
12
I
FREQUENCY 1Hz!
14
II
221
II. I . 1M 1011 1I0Il
1111 I.
FREQUENCY 1Hz!
i
Voltage Follower Pulse
Response
II
r-
1111
Vs-:il1V
\
ID
118
T.~2~CI
,
12
Open Loop Frequency
Response
-0.1
0.1
0.3
FREQUENCY 1Hz!
0.5
D.'
'.9
TIME"..,
TL/H/7766-5
Typical Performance Characteristics LM318
Input Current
1&0
~1:
~
..
~
..'"
iii 110
0
e:::"",.
C
>
~ 40
~105
I
I
o
60ID
70
~
..
§
..
!
IODO
aD
;;:
~ 100
~
co
co
:E
z
30
Ii:E.
10
l3
1II1II
"-
f\
'~
-10
100
ZO
Ik
10k
~
...
~
:\
·ZO
1110
~.=r~
lJ.. ,....
It k'"
1
;: 5.0
'\
1M
~
>
~
r'\.
'"
10M
Supply Current
5.5
4D
lOOk
FREQUENCY 1Hz!
Rs·ZIen
T.=zrc-
&0
o
FREQUENCY 1Hz!
15
-
100
co
~ 300
SU~
10
Common Mode Rejection
lZ0
10k
NEGATIVE
40
SUPPLY VOLTAGE ItVI
Input Noise Voltage
Ik
10
5
30DD
1110
'~SITIVE SUPPLY
iil
TEMPERATURE rei
IE
TA = 25·C
60
95
010103040
:::c;
..
ti
..;;;
T.-,rc
> 100
10 ~
!
L
co
OFFSET
10
·rc
l ... -25-e
~
~ 38
i! 28
.
1110
T...
BIAS
Power Supply Rejection
Voltage Gain
m
100
V
/T:I
4.5
-
~r-
_15°C \
'''jl0·C
~
4.0
,.
10k
100.
FREQUENCY 1Hz}
1M
111M
5
10
15
10
SUPPLY VOLTAGE ltV}
TUH/7766-6
3-398
r-
........==
Typical Performance Characteristics LM318 (Continued)
(1)
......
10'
Closed Loop Output impedance
,----,--,----r--,----,
10'
1---1---1---+
r-
.
Current Limiting
Input Current
14
..
12
i
lU
!!!
I
e-
TA = 11ft
ili
~
....==
N
600
r-
==
....
oS 200
~
~
&
Co)
(1)
_\
0:
i-
TA-In:
(1)
......
40U
S -200
~
"
\
-400
Vs "':t:1SV
U
10-' ' - - " - - " - - " - - " - - - '
10
11111
1.
10k
lOOk
1M
o
10
Unity Gain Bandwidth
'20
1-+---1-+
IIU
22
'"
:;
20
II 1oo;;:I---,=!-~~.
"
1&
'"~
14
NEGATIVE SLEW
L-~~_"-~~_~~
70
,20
" ...,.,.ni--,......,rrM"T",.--,......,-n
l!!
ili
~tog
I
T.;2~cl
I
Vs~±I~VI
IOU
f-ttIt!---l,H--t-t-1
1 rl-tttt-++
i ti.
10
I
I
1\
i
N} II
l!
I
I 1'Ii ~
..j
6U
i!:;
48
"
ZO
>
J II
ouwW-~~~u=~~~
0.5M 1M
2M
5M
10lIl 211M
1111
C
co
j
4 H+ttt--j-~++I-It+--+--'-+-l
I
o
10
20
-
i
- 'r--..
..
..
I
I
I
II
o
1M
,
i\l ' i
~
"
3M
I:!\i !
I
FEEDFOAWARD
11'1'-.,
,11M
Voltage Follower Pulse
Response
T~ - 25lC
Vs -±15Vi I
I
PHASE
K' i-'"
11111
1.
20
'6
225
180
IJ:
..
12
j
..
0
-4
:! ~
135 ~
90
~
co
os! !:;,."
"
B
4
I
I
I
-I
1\
\
J I III
311M
FREQUENCY (Hz)
101JM
'00
10
~
60
~
40
,.~
20
T."Z!i'& -
I
r--...
f-- f-::
r- V
~
FEIEDFOIRWA~O
-f
-I
1.
PHA~
-o.z
..
..~
20
16
12
1
~ 8
1
~
~
9
"
10k lOOk 1M 10M 100M
FREQUfNCY IHzl
I
-
-20
225
-20
100
I
j
Vs =±15V
TA -25"&
o.Z
0.6
to
'.4
1.1
Inverter Pulse Response
GAIN'
10
I-OUTPUT
TIME 1",1
V~'±1JV
I"
-M-
INPUT-
-16
Iii lOOk 1M 111M 100M
r--,.
I
HI
I L
I I
-IZ
Open Loop Frequency
Response
'!!
I'
TIMEIpol
\
10
120
Vs=:ti!iV
,
,
0.3
0.'
70
FREQUENCY IHzl
10
!;
60
-20
50M
i.! iJ·c
i
511
GAIN'\
Large Signal Frequency
Response
'2
4D
-10
Open Loop frequency
Response
FREilUEHCV (nzi
14
3D
-
TEiiPfRATURE r~1
Large Signal frequency
Response
\
r-
('CI
I-ttttt'\-HI-+H-tttt-
'0 H-t+tttt------1H-.i-I-lli4f-'-=-=t''--I
Rs=ii,=10KO
0102U3D4U.66010
!
-,-
10
12
0.2 0.4 0.6 0.6
Cf =ipF
!!i
TEMPERATURE
0
DIFFERENTIAL INPUT IVI
vs •I:I:1.vl
..;..±---t---l
12
-61111
-0.1 -0.6 -0.4 -0.2
25
Voltage Follower Slew Rate
POSITIVE SLEW
i!!
'"
:i
C
20
OUTFUT CURRENT [rnA)
FREDUfHCY (Hz)
I
15
....
-'2
~.
-1-1-
.~
\
.. FEEOFORWARO
-16
-20
-0.'
:--OUTPUT
I
II
1\
\
1--
I
I
h
INPUT-
4
0
-4
> -8
-
I
I
0.1
0.3
-
TA =25"C
V.'±15V
0.5
0.7
D-9
TIMEIpol
TLlH/7766-7
3-399
•
....co
CO)
:iii
Auxiliary Circuits
-'
......
co
Feedforward Compensation
for Greater Inverting Slew Ratet
....
C'I
:iii
Compensation for Minimum Settllngt Time
5K
-'
5 pF
;;0
....
....
3K
:iii
10K
-'
-...1\""..,.....---4....- ..
5K
INPUT
OUTPUT
10K
INPUT
tSlew rate typically 150VIf's.
"'Balance circuit necessary for
increased slew.
27K
1%
lK
2.SK
BALANCE-
SK
TL/H17766-6
TL/H/7766-9
Offset Balancing
Isolating Large Capacitive Loads
yt
Overcompensation
RF
OUTPUT
100
10 pF
5K
INPUT -'V'II'II-4.....of
TL/H/7766-12
TL/H/7766-10
TL/H/7766-11
Typical Applications
Fast Voltage Follower·
Integrator or Slow Inverter
5 pF
Rl
10K
5pF
OUTPUT
CF = Large
(CF;;' 50 pF)
10K
INPUT
-1\1\""'.....
TL/H/7766-14
"'00 not hard-wire as integrator or slow inverter; insert a
TL/H/7766-13
10k-5 pF network in series with the input, to prevent oscillation.
3-400
,-----------------------------------------------------------------------------, r
iii:
........
Typical Applications (Continued)
Fast Summing Amplifier
co
......
Differential Amplifier
r
iii:
10K
5 pF
....
N
co
......
r
iii:
w
10K
INPUT -,.."".,,-4111-"-4
10K
....co
~--...--- OUTPUT
5K
INPUT-"",.".......
10K
INPUT - " " " "_ _
OUTPUT
TL/H17766-16
TL/H/7766-15
Fast Sample and Hold
10pF
5K
OUTPUT
INPUT ~...- - - . ,
SAMPLE
TLlHI7766-1 B
01 A Converter Using Ladder Network
5pF
5K
5K
5K
OUTPUT
FROM SWITCHES
5K
TV'
O.I.F·
·Optiona~Reduces settling time.
TL/H/7766-19
3-401
LM118/LM218/LM318
-I
'<
'0
0'
et
»
Four Quadrant Multiplier
'0
"20'
15V
J»
0'
::::I
tn
3pF
'0
0
:::l
g.
c:
CD
laDK
8
1%
xv
~-.
10
15V
_--...~<: 10K,',
-15V
TL/H/7766-17
r-
Typical Applications
i:
.....
.....
CO
(Continued)
01 A Converter Using Binary Weighted Network
Fast Summing Amplifier with Low Input Current
5,_
5,_
i:
N
.....
CO
......
R,
OUTPUT
INPUT
.ODZ/lf
...
.....
rrw
.....
i:
CO
zo•
•••
OUTPUT
,.0K
15DK
'::'
FROM SWITCHES
.DD1I =-"'--DUTPUT
u'
HZ
500
211.
'"
-.N.UT-M,.....,H
'Ll-l0V-14 rnA bulb ELDEMA 1869
Rl = R2
Cl
= C2
TLlH/7766-22
1
... ,
.
200K
) 'Ga.n ;, -R- lor 1.5K ,; Rg ,; 200K
...
9
1= 2'11'R2Cl
LMI8&-1.2
2.
.%
I.
.%
~-~t---"---'5Y
TLlH/7766-23
3-403
....
~r-------------------------------------------------I
CO)
:::E
.....
Schematic Diagram
«;
....
C'I
:::E
.....
.....
....
....
~
:::E
.....
3·404
~National
~ Semiconductor
LM 124/LM224/LM324, LM 124A/LM224A/LM324A,
LM2902 Low Power Quad Operational Amplifiers
General Description
Advantages
The LM 124 series consists of four independent, high gain,
internally frequency compensated operational amplifiers
which were designed specifically to operate from a single
power supply over a wide range of voltages. Operation from
split power supplies is also possible and the low power supply current drain is independent of the magnitude of the
power supply Voltage.
• Eliminates need for dual supplies
II Four internally compensated op amps in a Single
package
• Allows directly sensing near GND and VOUT also goes
toGND
• Compatible with all forms of logic
• Power drain suitable for battery operation
Application areas include transducer amplifiers, DC gain
blocks and all the conventional op amp circuits which now
can be more easily implemented in single power supply systems. For example, the LM124 series can be directly operated off of the standard +5 Voc power supply voltage which
is used in digital systems and will easily provide the required
interface electronics without requiring the additional
± 15 Voc power supplies.
Unique Characteristics
• In the linear mode the input common-mode voltage
range includes ground and the output voltage can also
swing to ground, even though operated from only a single power supply voltage.
• The unity gain cross frequency is temperature
compensated.
II The input bias current is also temperature
compensated.
Connection Diagram
Features
• Internally frequency compensated for unity gain
• Large DC voltage gain
100 dB
• Wide bandwidth (unity gain)
1 MHz
(temperature compensated)
• Wide power supply range:
Single supply
3 Voc to 32 Voc
or dual supplies
±1.5 Voc to ±16 Voc
• Very low supply current drain (700 jJA)-essentially independent of supply voltage
45 nAoc
• Low input biasing current
(temperature compensated)
• Low input offset voltage
2 mVOC
and offset current
5 nAoc
• Input common-mode voltage range includes ground
• Differential input voltage range equal to the power supply voltage
0 VOC to V+ - 1.5 VOC
• Large output voltage swing
Schematic Diagram
(Each Amplifier)
v'
Dual-In-Line Package
OUTPUT 4 INPUT 4-
INPUT 4+
GND
INPUT 3-t
INPUT 3-
OUTPUT 3
-l~
ourpUT 1 INPUT ,-
INPUT
,+
Y·
INPUT 2+
INPUT 2-
OUTPUT
OUTPUT 2
TL/H/9299-1
Top View
TLlH/9299-2
Order Number LM124J, LM124AJ, LM224J,
LM224AJ, LM324J, LM324AJ, LM324M, LM324AM,
LM2902M, LM324N, LM324AN or LM2902N
See NS Package Number J14A, M14A or N14A
3-405
•
LM 124/LM224/LM324/LM 124A1LM224A1LM324A/LM2902
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
(Note 9)
LM124/LM224/LM324
LM124/LM224/LM324
LM2902
LM2902
LM 124A1LM224A1LM324A
LM 124A1LM224A1LM324A
Supply Voltage. V+
Storage Temperature Range
-65°C to + 150°C
-65°C to + 150°C
32 Voc or ± 16 Voc
26 Voc or ± 13 Voc
Differential Input Voltage
Lead Temperature (Soldering, 10 seconds) 260°C
32Voc
260°C
26Voc
Soldering Information
Input Voltage
-0.3Vocto + 32Voc
-0.3 Voc to +26Voc
Dual-In-Line Package
Input Current
Soldering (10 seconds)
260°C
260°C
50mA
50mA
(VIN < -0.3 Vocl (Note 3)
Small Outline Package
Power Dissipation (Note 1)
Vapor Phase (60 seconds)
215°C
215°C
1130 mW
Molded DIP
1130mW
Infrared (15 seconds)
220°C
220°C
Cavity DIP
1260 mW
1260 mW
See AN-450 "Surface Mounting Methods and Their Effect on Product Reliability" for
Small Outline Package
800mW
800mW
other methods of soldering surface mount devices.
Output Short-Circuit to GND
ESD Tolerance (Note 10)
250V
250V
(One Amplifier) (Note 2)
Continuous
Continuous
V+ s 15VOC and TA = 25°C
-40°C to +85°C
Operating Temperature Range
O°Cto + 70°C
LM324/LM324A
LM224/LM224A
- 25°C to + 85°C
- 55°C to + 125°C
LM124/LM124A
Electrical Characteristics v+
'"o~
'"
= + 5.0 Voc, (Note 4), unless otherwise stated
LM124A
Conditions
Parameter
LM224A
LM324A
LM124/LM224
LM2902
LM324
Min Typ
Max
Min Typ
Max
Min Typ
Max
Min Typ
Max
Min Typ
Max
Min Typ
Max
Units
Input Offset Voltage
(Note 5) TA = 25°C
±1
±2
±1
±3
±2
±3
±2
±5
±2
±7
±2
±7
mVoc
Input Bias Current
(Note 6)
IIN(+) or IIN(-), VCM = OV,
TA = 25°C
20
50
40
80
45
100
45
150
45
250
45
250
nAoc
Input Offset Current
IIN(+) - IIN(-), VCM = OV,
TA = 25°C
±2
±10
±2
±15
±5
±30
±3
±30
±5
±50
±5
±50
nAOC
Input Common-Mode
Voltage Range (Note 7)
V+ = 30 Voc, (LM2902, V+ = 26 Vocl,
TA = 25°C
Supply Current
Over Full Temperature Range
RL = co On All Op Amps
v+ = 30V (LM2902 v+ = 26V)
v+ = 5V
V+-1.5 0
0
1.5
0.7
3
1.2
V+-1.5 0
1.5
0.7
V+ -1.5 0
1.5
0.7
3
1.2
V+ -1.5 0
1.5
0.7
3
1.2
V+-1.5 0
1.5
0.7
3
1.2
3
1.2
V+ -1.5 VOC
1.5
0.7
Large Signal
Voltage Gain
V+ = 15Voc, RL;;" 2kn,
(Vo = 1 VOC to 11 Vocl. TA = 25°C
50 100
50 100
25 100
50 100
25 100
25 100
Common-Mode
Rejection Ratio
DC, VCM = OV to V+ - 1.5 VOC,
TA = 25°C
70
70 85
65
70
65
50
Power Supply
Rejection Ratio
DC, V+ = 5 VOC to 30 Voc
(LM2902, V+ = 5 VOC to 26 Vocl,
TA = 25°C
65 100
65 100
65 100
_ ..
85
85
85
65 100
85
65 100
70
50 100
3
1.2
mAoc
V/mV
dB
dB
Electrical Characteristics v+
Parameter
= + 5.0 Voe (Note 4) unless otherwise stated (Continued)
LM124A
Conditions
Min Typ
Amplifier-to-Amplifier
Coupling (Note 8)
f = 1 kHz to 20 kHz. TA = 25°C
(Input Referred)
Output Current Source VIN + = 1 Voe. VIN = OVoc.
v+ = 15Voc. Va = 2Voc. TA = 25°C
Sink
-120
LM324A
Max Min Typ
-120
LM124/LM224
Max Min Typ
-120
LM2902
LM324
Max Min Typ
-120
Max Min Typ
-120
40
20
40
20
40
20
40
20
40
20
40
10
20
10
20
10
20
10
20
10
20
10
20
VIN = 1 Voe. VIN + = 0 Voc.
12
v+ = 15 Voc. Va = 200 mVoc. TA = 25°C
50
12
50
12
50
12
50
12
50
12
50
VIN = 1 Voc. VIN+ = OVoc.
v+ = 15 Voc. Va = 2Voc. TA = 25°C
Input Offset Voltage
(Note 5)
Input Offset
Voltage Drift
Rs = on
Input Offset Current
IIN(+) - IIN(-). VCM = OV
Input Offset
Current Drift
Rs= on
Input Bias Current
IIN(+) or IIN(-)
40
±7
60
40
60
40
±4
±20
±7
60
±20
±7
±75
±10 ±200
±10 ±200
±10 ±200
40
100
40
60
40
±7
±30
±30
100
40
±5
±30
40
±7
±150
±10
40
40
±7
±100
200
60
±9
±10
300
40
500
0
V+-2 0
V+-2 0
V+-2 0
V+-2 0
V+-2 0
25
25
15
25
15
15
Output Voltage VOH
Swing
V+ = +30VOC.RL=2kn
26
26
26
26
26
22
VOL
V+ = 5VoC.RL ~ 10kn
27
27
28
5
20
27
28
5
20
28
5
27
20
28
5
27
20
28
5
60
mAoc
±10
mVoc
±7
p'vrc
±45 ±200
nAoc
40
V+ = +15Voc
(Va Swing = 1 Voc to 11 Vocl
RL ~ 2kn
10kn
(LM2902. V+ = 26 Vocl
p.Aoe
±10
Large Signal
Voltage Gain
RL~
dB
mAoc
±4
Input Common-Mode
V+ = +30Voc
Voltage Range (Note 7) (LM2902. V+ = 26 Vocl
Units
Max
-120
20
Short Circuit to Ground (Note 2) v+ = 15 Voe. TA = 25°C
~
.....
LM224A
Max Min Typ
23
20
pAocrC
500
nAoc
V+-2
Vae
V/mV
Vac
24
5
100
mVoc
~06~W1/""~£W1/""~~W1/""~ ~ W1/"~£W1/"~~W1/"~ ~ Wl
II
LM 124/LM224/LM324/LM 124A1LM224A/LM324A/LM2902
Electrical Characteristics v+
Parameter
Output Current
=
LM124A
Conditions
,
Vo
= + 5.0 Voc (Note 4) unless otherwise stated (Continued)
LM224A
LM324A
LM124/LM224
LM324
LM2902
I Units
Min Typ Max Min Typ Max Min Typ Max Min Typ Max Min Typ Max Min Typ Max
2VDC VIN+
VIN -
VIN
VIN +
= +1 VOC,
= 0 VOC, V+ =
= +1 VOC,
= 0 VOC, V+ =
15 VOC
15 VOC
10
20
10
20
10
20
10
20
10
20
10
20
10
15
5
8
5
8
5
8
5
8
5
8
mAoc
Note 1: For operating at high temperatures, the LM324/LM324A. LM2902 must be derated based on a + 12S"C maximum junction temperature and a thermal resistance of 88"C/W which applies for the device soldered in a printed
circuit board, operating in a still air ambient. The LM224JLM224A and LM124/LM124A can be derated based on a + 150°C maximum junction temperature. The dissipation is the total of all four amplifiers-use external resistors,
where possible, to allow the amplifier to saturate of to reduce the power which is dissipated in the integrated circuit.
Note 2: Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output current is approximately 40 rnA independent of the magnitude of
V+. At values of supply voltage in excess of + 15 VDC. continuous short-circuits can exceed the power dissipation ratings and cause eventual destruction. Destructive dissipation can result from simultaneoUs shorts on all amplifiers.
Note 3: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode
clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC Chip. This transistor action can cause the output voltages of the op amps to go to the V+ voltage level (or to ground for a large
overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage. which was negative, again returns to a value greater than -0.3 VOC (at 25°C).
Note 4: These speCifications are limited to -55°C" TA " + 125°C for the LM124/LM124A. With the LM224/LM224A, all temperature specifications are limited to -25°C" TA " +B5°C, the LM324/LM324A temperature
speCifications are limited to O"C :5: TA :s;;
+ 70"C,
and the LM2902 specifications are limited to - 40"C :s;; T A
~
+ 85"C.
Note 5: Vo '" 1.4 Voc, Rs ~ 00 with V+ from 5 Voc to 30 Voc; and over the full input common-mode range (0 Voc to V+ - 1.5 Voc) at 25°C; for LM2902, V+ from 5 Voc to 26 Voc.
Note 6: The direction of the input current is out of the
Ie due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the input lines.
Note 7: The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V (at 25°C). The upper end of the common-mode voltage range is V+ - 1.5V (at 25°C), but either or both
inputs can go to +32 Voc without damage (+26 VOC for LM2902), independent of the magnitude of V+.
c.>
~
CD
Note 8: Due to proximity of external components, insure that coupling is not Originating via stray capacitance between these external parts. This typically can be detected as this type of capacitance increases at higher frequencies.
Note 9: Refer to RETSI24AX for LMI24A military speCifications and refer to RETSI24X for LMI24 military speCifications.
Note 10: Human body model, 1.5 kO in series with 100 pF.
r-----------------------------------------------------------------------------,
Typical Performance Characteristics
~
iii:
.....
I\)
0l:Io
Input Voltage Range
Input Current
15r-~~--~_,~~71
11
-!!.
~
10~--~----~~~-1
~
~
90
1
I
I
~
.;ff-
.!l'
..
I
o
'I'
10
OR
I
50
70
'I'
60
I
'I'
.fO
I I I
= +3OVoc
= +15Voc
--
'1'1 = ~5VDC
--
30
20 I- l - I10
o
v- - POWER SUPPLY VOLTAGE (~Vocl
1 - TA 1=
.cs
I\)
I\)
0l:Io
"
~
iii:
w
I\)
I
65 85 105 125
TA
10
'I' -
TA - lDIPERATURE ("1:)
:.t
nod TO +125"C ~ I'---
r
I I I
-55 -35 -15 5 25
15
~
~
IVcu=OVoc
i"'"
50
"iii:
Supply Current
~
iii:
.....
i -55120
I\)
30
SUPPLY VOLTAGE (Vocl
~
.....
~
iii:
Open Loop Frequency
Response
Voltage Gain
160
Common Mode Rejection
Ratio
lii'
~
"
100
w
I\)
50
'"
~
!'"
I\)
~
z
1000'"
~
iii:
0
--;...
ElOJ
RL = 2kl1
I!!
0
~
iii:
§I
CD
8'"
2
I
10
'I' -
20
30
100 tOk 10k lOOk 1.0l0i 10M
.fO
~
Ik
f - FREQUENCY (Hz)
SUPPLY VOLTAGE (Vocl
Voltage Follower Pulse
Response
~
120
0
RL = 20kl1
I\)
I\)
10k
lOOk
1M
f - FREQUENCY (Hz)
Voltage Follower Pulse
Response (Small Signal)
Large Signal Frequency
Response
20
RL::S2.0k
v+=15V,i
~
_J
1
I
II
\
!:.cso
;:!
i..
I 350t-~~~-+-T-;~r-;
IS
~ ~r-+t~~-+~~~~
~
III
l-
-
-a:
15
z
~
~
5
10
0
I
250L-L-L-L-L-~~~
10
20
30
012345678
t - TIME (PO)
10k
t - TIME (PO)
Output Characteristics
Current Sinking
'l
10~~
§!
0.1
I
~
1
10
100
10· - OUTPUT SOURCE CURRENT (mAocl
0.001 0.01
I
20
":P
10
o
0.G1
0.1
1:
I:
5
0.01
Current Limiting
90
I:
!i~
IS
0
0.1
III
lOOk
f - FREQUENCY (Hz)
10
100
10 - OUTPUT SINK CURRENT (mAocJ
I I I
l- II- lI"'"
.
~
'-- l-
;-- :--- l-
r....
-55 -35 -15 5 25
" ....
.cs
I'""
65 85 105125
TA - lDIPERATURE ("1:)
TUH/9299-3
3-409
•
Typical Performance Characteristics (LM2902 only)
Input Current
Voltage Gain
100
160
"0
~
.5-
...
a""
RL =20k.D.
75
!Z
r
~
RL='2_0~_
II<
v
50
I-
~
<>~
I
25
liE
-~
o
o
10
I-""'TA =+25OC
20
yt- SUPPLY VOLTAGE
o
o
30
(vael
10
20
30
yt- SUPPLY VOLTAGE (VOC>
TL/H/9299-4
Application Hints
The LM124 series are op amps which operate with only a
single power supply voltage, have true-differential inputs,
and remain in the linear mode with an input common-mode
voltage of 0 Voc- These amplifiers operate over a wide
range of power supply voltage with lillie change in performance characteristics. At 25'C amplifier operation is possible
down to a minimum supply voltage of 2.3 Voc.
The pinouts of the package have been designed to simplify
PC board layouts. Inverting inputs are adjacent to outputs
for all of the amplifiers and the outputs have also been
placed at the comers of the package (pins 1, 7, 8, and 14).
Precautions should be taken to insure that the power supply
for the integrated circuit never becomes reversed in polarity
or thatthe unit is not inadvertently installed backwards in a
test socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the
internal conductors and result in a destroyed unit.
'
Where the load is directly coupled, as in dc applications,
there is no crossover distortion.
Capacitive loads which are applied directly to the output of
the amplifier reduce the loop stability margin. Values of
50 pF .can be accommodated using the worst-case non-inverting unity gain connection. Large closed loop gains or
resistive isolation should be used if larger load capaCitance
must be driven by the amplifier.
The bias network of the LM124 establishes a drain current
which is independent of the magnitude of the power supply
voltage over the range of from 3 Voc to 30 Voc.
Output short circuits either to ground or to the positive power supply should be of short time duration. Units can be
destroyed, not as a result of the short circuit current causing
metal fusing, but rather due to the large increase in IC chip
dissipation which will cause eventual failure due to excessive junction temperatures. Pulling direct short-circuits on
more than one amplifier at a time will increase the total IC
power dissipation to destructive levels, if not properly protected with external dissipation limiting resistors in series
with the output leads of the amplifiers. The larger value of
output source current which is available at 25'C provides a
larger output current capability at elevated temperatures
(see typical performance characteristics) than a standard IC
opamp.
The circuits presented in the section on typical applications
emphasize operation on only a single power supply voltage.
If complementary power supplies are available, all of the
standard op amp circuits can be used. In general, introducing a pseudo-ground (a bias voltage reference of V+ 12) will
allow operation above and below this value in Single power
supply systems. Many application circuits are shown which
take advantage of the wide input common-mode voltage
range which includes ground. In most cases, input biasing is
not required and input voltages which range to ground can
easily be accommodated.
Large differential input voltages can be easily accommodated and, as input differential voltage protection diodes are
not needed, no large input currents result from large differential input voltages. The differential input voltage may be
larger than V+ without damaging the device .. Protection
should be provided to prevent the input voltages from gOing
negative more than -0.3 Voc (at 25'C). An input clamp
diode with a resistor to the IC input terminal can be used.
To reduce the power supply drain, the amplifiers have a
class A output stage for small signal levels which converts
to class B in a large signal mode. This allows the amplifiers
to both source and sink large output currents. Therefore
both NPN and PNPextemal current boost transistors can
be used to extend the power capability of the basic amplifiers. The output voltage needs to raise approximately 1 diode drop above ground to bias the on-Chip vertical PNP
transistor for output current sinking applications.
For ac applications, where the load is capacitively coupled
to the output of the amplifier, a resistor should be used, from
the output of the amplifier to ground to increase the class A
bias current and prevent crossover distortion.
3-410
Typical Single-Supply Applications (v+
= 5.0 Voe)
Non-Inverting DC Gain (OV Input = OV Output)
+5V
HI
------
= 101 (AS SHOWN)
10k
not needed due to temperature
·R
independenlllN
V,N (mV)
TUH/9299-5
DC Summing Amplifier
Power Amplifier
(VIN'S :;;, 0 VDC and Vo :;;, VDc)
Rl
910k
H
lOOk
+V, o-.JVV'w--.
R
>-4IHOVo
lOOk
--"'-0
R
lOOk
Va
+V3 0-.JVV'w.......
Va = o Vecfor VIN = OVec
+V. o-"'IIVY-
Av= 10
R
lOOk
TL/H/9299-7
TL/H/9299-6
Where: Va
(VI
= VI + V2 + Vi) ;,
(V3
V3 - V4
V.) 10 keep Va> 0 Vec
+
LED Driver
"BI-QUAD" RC Active Bandpass Filter
HI
lOOk
Cl
JJO pF
H5
410k
TUH/9299-B
C2
JJOpF
HJ
lOOk
R6
410k
~t-~~-4I~----------~~-----oVo
R1
lOOk
~---~------t-~~~V+
fo=lkHz
= 50
Av = 100 (40 dB)
HS
lOOk
Q
TLlH/9299-9
3-411
~
Q
en
~
r------------------------------------------------------------------------------------------,
Typical Single-Supply Applications
(v+
=
5.0 VDcl (Continued)
:::i
...I
......
Fixed Current Sources
c:(
Lamp Driver
v+
-=r
~
Cf)
:::i
...I
......
~
~
R2
2V
~
:::i
...I
......
~
.,...
~
:::i
...I
TL/H/9299-11
......
-=r
~
Cf)
:::i
...I
......
-=r
~
~
TLlH/9299-10
~
......
-=r
.,...
Current Monitor
~
~
Driving TTL
-
RI"
0.1
IL
R2
100
TL/H/9299-13
va
R3
Ik
lV(ILl
VO~1A
VL '" V+ - 2V
'(Increase RI for IL small)
TL/H/9299-12
Voltage Follower
Pulse Generator
RI
1M
R2
lOOk
>"-0 Va
TLlH/9299-14
3-412
IN914
IN914
.-----------------------------------------------------------------------------, r
iii:
Typical Single-Supply Applications (V+ = 5.0 Vee> (Continued)
.....
~
Squarewave Oscillator
:e:r
Pulse Generator
Rl
Rl
lOOk
Vo
RZ
:Lf1Jl..
150k _
iii:
IN914
30k
~
~
"""
r
'"
iii:
1
Co)
~
r"""
'"
iii:
>+-oVo
.....
~
~
R3
lOOk
r
'"
iii:
R5
lOOk
~
~
TUH/9299-16
Tl/H/9299-17
High Compliance Current Sink
~
r
iii:
Co)
~
~
Low Drift Peak Detector
-
r
'"
iii:
I_
~
CD
-
> ....--oVo
o
~
ZOUT
+
...L.
1
10
C
""T'M
(POlYCARBONATE OR
POLYETHYLENE) ."::"
RE
= 1 amp/volt VIN
2N929"
"hi p AT 10o.A
(Increase RE for 10 small)
Tl/H/9299-18
HIGH ZIN
LOWZOUT
-
I_
R
1M
INPUT CURRENT
COMPENSATION
TL/H/9299-19
Comparator with Hysteresis
+V'N
Ground Referencing a Differential Input Signal
0------1
Rl
Rl
1M
>-4~OVo
10k
>+-OVO
v.
R
R3
1M
TUH/9299-20
-
+VCM
TL/H/9299-21
3-413
•
N
o
m
N
r--------------------------------------------------------------------------,
Typical Single-Supply Applications (V+
::::iE
...J
~N
O.05JJF
C")
R12
::::iE
lOOk
...J
......
~
N
N
= 5.0 Voe) (Continued)
Voltage Controlled Oscillator Circuit
+Vc*
::::iE
...J
51k
......
.....o OUTPUT 1
>~
~
N
.,...
::::iE
...J
;;r
. . .----------+-0
N
C")
10k
::::iE
OUTPUT 2
...J
......
~
N
N
::::iE
TLlH/9299-22
...J
......
~
'Wide control voltage range: 0 Vee ,; Vc ,; 2 (V+ -1.5 Vee)
.,...
N
::::iE
Photo Voltaic-Cell Amplifier
...J
R,
1M
ICELL
r
> ....-oVo
(CELL HASOV
ACROSS IT)
TL/H/9299-23
AC Coupled Inverting Amplifier
R,
lOOk
".{
1':
1\./\
V
RL
_
R2
lOOk
-
R3
1
3 Vpp
T
10k
+ lOOk
AV =
~ (As shown, Av =
10)
TLlH/9299-24
3-414
Typical Single-Supply Applications
(v+
= 5.0 VDcl (Continued)
AC Coupled Non-Inverting Amplifier
R2
1M
RI
lOOk
. 1
/\
C 1 °VoO
RL
_
/\
JVpp
"T
10k
R4
lOOk
..- -.....J..,..~-o v+
C2
+
R5
IO~FT
R2
Ay-l+Fi1
lOOk
Ay - 11 (As shown)
TUH/9299-25
DC Coupled Low-Pass RC Active Filter
CI
O.OI~F
RI
16k
> ....HOVo
R4
lOOk
fO-lkHz
Q -
1
fo
Ay - 2
TL/H/9299-26
High Input Z, DC Differential Amplifier
R2
lOOk
•
> ...-oVo
For ~ -
Vo - 1
~ (CMRR depends on this resistor ratio match)
+ ~(V2
R3
- V,)
As shown: Vo - 2(V2 - V,)
3-415
TLlH/9299-27
Typical Single-Supply Applications
(V+ = 5.0 Voc) (Continued)
High Input Z Adjustable-Gain
DC Instrumentation Amplifier
RI
lOOk
R3
R4
lOOk
lOOk
+V,
>+-oVo
R6
R7
lOOk
lOOk
+V.
If Rl
= R5 & R3 = R4 = R6 = R7 (CMRR depends on match)
Vo
=
1
+
As shown Vo
TL/H/9299-28
2Rl\"12 - V,)
R2
= 101\"12 -
Vd
Bridge Current Amplifier
Using Symmetrical Amplifiers to
Reduce Input Current (General Concept)
R.
I'N
>,,-oVo
+V'N o-~t----t
I.
~
For8«landR,»R
VO~VREF m~
TL/H/9299-30
R
1.5M
-
I.
INPUT CURRENT
COMPENSATION
TLlH/9299-29
3-416
~--------------------------------------------------------------------------------,
Typical Single-Supply Applications
(v+
r-
iii:
-0.
= 5.0 VDcl (Continued)
N
~
......
!i:
Bandpass Active Filter
N
N
:t
riii:
(0)
N
~
......
RI
390k
r-
iii:
-0.
N
:t......
r-
iii:
>-..-0 yo
~
R3
620k
......
r-
iii:
(0)
fO=1kHz
y.
Q
= 25
N
:t......
r-
TUH/9299-31
iii:
N
8N
3-417
~
-=t
~
::E
....I
.....
r----------------------------------------------------------------------------,
~National
....-=t ~ Semiconductor
~
::E
....I
LM143/LM343 High Voltage
Operational Amplifier
General Description
Features
The LM143 is a general purpose high voltage operational
amplifier featuring operation to ±40V, complete input overvoltage protection up to ± 40V and input currents comparable to those of other super-/:l op amps. Increased slew rate,
together with higher common-mode and supply rejection,
insure improved performance at high supply voltages. Operating characteristics, in particular supply current, slew rate
and gain, are virtually independent of supply voltage and
temperature. Furthermore, gain is unaffected by output
loading at high supply voltages due to thermal symmetry on
the die. The LM143 is pin compatible with general purpose
op amps and has offset null capability.
Application areas include those of general purpose op
amps, but can be extended to higher voltages and higher
output power when externally boosted. For example, when
used in audio power applications, the LM143 provides a
power bandwidth that covers the entire audio spectrum. In
addition, the LM143 can be reliably operated in environments with large overvoltage spikes on the power supplies,
where other internally-compensated op amps would suffer
catastrophic failure.
The LM343 is similar to the LM143 for applications in less
severe supply voltage and temperature environments.
•
•
•
•
•
Wide supply voltage range
± 4.0V to ± 40V
Large output voltage swing
± 37V
Wide input common-mode range
± 38V
Input overvoltage protection
Full ±40V
Supply current is virtually independent of supply voltage
and temperature
Unique Characteristics
• Low input bias current
8.0 nA
• Low input offset current
1.0 nA
• High slew rate-essentially independent of temperature
and supply voltage
2.Sv/ /Ls
• High voltage gain-:-virtually independent of resistive
loading, temperature, and supply voltage
100k min
• Internally compensated for unity gain
• Output short circuit protection
• Pin compatible with general purpose op amps
Connection Diagram
Metal Can Package
Top View
NC
INVERTING
2
OUTPUT
INPUT
vTUHI7783-1
Order Number LM143H or LM343H
See NS Package Number H08C
3-418
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
(Note 4)
LM143
±40V
6BOmW
BOV
±40V
- 55'C to + 125'C
- 65'C to + 150'C
5 seconds
300'C
Supply Voltage
Power Dissipation (Note 1)
Differential Input Voltage (Note 2)
Input Voltage (Note 2)
Operating Temperature Range
Storage Temperature Range
Output Short Circuit Duration
Lead Temperature (Soldering. 10 sec.)
ESD rating to be determined.
LM343
±34V
6BOmW
6BV
±34V
O'Cto +70"C
-65'C to + 150'C
5 seconds
300'C
Electrical Characteristics (Note 3)
Parameter
LM143
Conditions
Min
=
=
TA =
TA =
Typ
LM343
Max
Min
Units
Typ
Max
Input Offset Voltage
TA
25'C
2.0
5.0
2.0
8.0
Input Offset Current
TA
25'C
1.0
3.0
1.0
10
nA
25'C
B.O
20
B.O
40
nA
10
100
10
200
p.V/v
Input Bias Current
Supply Voltage
Rejection Ratio
25'C
Output Voltage Swing
TA = 25·C. RL ;;;, 5 kfi
Large Signal Voltage
Gain
TA = 25·C. VOUT
RL;;;' 100kfi
Common-Mode
Rejection Ratio
TA
Input Voltage Range
TA
Supply Current (Note 5)
Short Circuit Current
Slew Rate
Power Bandwidth
Unity Gain Frequency
Input Offset Voltage
Input Offset Current
Input Bias Current
Large Signal Voltage
Gain
Output Voltage Swing
=
=
±10V.
25'C
= 25'C
TA = 25'C
TA = 25'C
TA = 25·C.Av = 1
TA = 25·C. VOIJT = 40Vp-p•
RL = 5 kfi. THO ~ 1%
TA = 25'C
TA = Max
TA = Min
TA = Max
TA = Min
TA = Max
TA = Min
RL;;;' 100 kfi. TA = Max
RL;;;' 100 kfi. TA = Min
RL ;;;, 5.0 kfi. TA = Max
RL ;;;, 5.0 kfi. T A = Min
mV
22
25
20
25
V
100k
1BOk
70k
1BOk
V/v
80
90
70
90
dB
±24
±26
±22
±26
2.0
4.0
2.0
mA
20
20
mA
2.5
2.5
V/p.s
20k
20k
Hz
1.0M
Hz
1.0M
6.0
6.0
50k
50k
V
5.0
10
10
mV
O.B
1.B
4.5
7.0
0.8
1.B
14
14
nA
5.0
16
35
35
5.0
16
55
55
nA
150k
220k
50k
50k
150k
220k
V/v
22
26
20
26
V
25
20
25
22
Note 1: Absolute maximum ratings are not necessarily concurrent, and care must be taken not to exceed the maximum junclion temperature of the LMl43 (l50"C)
or the LM343 (l00"C). For operating at elevated temperatures, devices in the HOB package must be derated based on a thermal resistance of lSS"C/W, junction to
ambient, or 2C1'C/W, junction to case.
Note 2: For supply voltage less than ±40V for the LM143 and less than ±34V for the LM343, the absolute maximum input voltage is equal to the supply voltage.
Note 3: These specifications apply forVs = ±2BV. For LM143, TA = max = 12S'C and TA = min = -SS·C. For LM343, TA = max = 7C1'C andTA = min =
O"C.
Note 4: Refar to RETSl43X for LMl43H and LM1S36H military specifications.
Note 5: The maximum supply currents are guaranteed at Vs = ±40V for the LM143 and Vs = ±34V for the LM343.
3-419
•
LM 143/LM343
W
::r
!..oy+
CD
3
an"
c
i"
ca
D;
3
HI2
,t T
Z8
t&OOUTPUT
HI3
21
CI
3.8pF
~
05
HZ!
1.
OFFSET
lULL
S
~ H/&
,
HZ!
HZZ
1.
,
"
,
•
•
•
,
,
'·ov-
OFFSET
NULL
TUHI7783-2
Typical Performance Characteristics
Voltage Follower Slew Rate
U
.,.
-'!
~
....
:i
~
I
4.0
..
4.0
..
..
3.0
>
2.0
....z
w
z.o
il
L
§
:Z5°C•. -
r- "j 1
1.0
TEMPERATURE c·C)
1.0
~
0.5
-I- ......
I'"-
~
..
--
~
!
100
g
10
.~
I-
I'TI-
§
Input Noise Voltage
100
10
10
t- .........
;;:
w
10
~
41
~
20
1.0
10
lID
..
!"
10k
120
!z
"fi
:;:
.
>
it
i!
~
lOOk
"-
DO
60
100
~
&0
:!
~
20
TA "2S·C
I-v, "mv
-20
1
i
~f
10
100
lk
~
I
1.0
135
90
45
1"'\
"'
10k lOOk 1M
FREQUENCY CHz)
I"
20
20
1&
J
PHASE
Large Signal Frequency
Response
25
'"'"
10
100
20
~
..
15
~
1D
i
~
T... =ZSoC
"
Vs =±28V
RL =5kn'
I".
o
180
1"'\
40
FREQUENCY CHz)
..
10k
lOOk
THOS1"
1M
.
100
3!
~
.,;;
~
.,
i::
l1!
..
2
..'"~
12
w
~
">
Voltage Follower Pulse
Response
I
I~PUT
1
-4
-8
1\
,
20
TIME C.I)
30
40
">
ilNPUT
-C-.~-
1"1-
-
_\
w
~
,'"ral'-
10
.ill
c=
1\
z
~.~
-12
-1&
-20
lDM
.
\~UT~UT
If
1/
1M
lOOk
Inverter Pulse Response
20
1&
12
2
If
10k
FREQUENCY 1Hz)·
FREQUENCY (Hz)
["\
w
~
NEGATIVE SUPPL
40
1M
~GAIN
10
"-
TA ·2S·C
Open Loop Frequency
Response
b...
lOOk
POS~SUPPLY
100
FREQUENCY CH.)
120
10k
. Power Supply Rejection
T~"
25lc
V,-t28V-
~
..
FREOUENCY 1Hz)
Common-Mode Rejection
lDO
0.01 L...I..j.WWL..J..JJJJIA...J...........................
lk
10k
10
100
lOOk
1.0
TEMPERATURE rCI
120
Input Noise Current
10
-55-35 -15 5 25 45 &5 85 105 125
.
ill
-55-35-15 5 25 45 15 85 105125
~
:5
.
10
r-- J I
s~u;;re-.j T
I I
TEMPERATURE rc)
~
!
~
-
~'NL
l::.:.l-
.......
-55-35-15 5 25 45 &5 85 105 125
~
1:1
I I
TEMPERATURE I"CI
~
.
I I
-55 -35 -15 5 25 45 &5 IS 105 125
Unity Gain Bandwidth
.
..
".."
."
i
20
u
i'" JZI,
1.5
!
"~
3D
ill
28
o
....
.~
a:
POS1TIVE SLEW
40
.§
.§
N'EGA1'IVl SLJW
3.0
1.0
..
.
Short Circuit Current
Supply Current
5.0
/
-4
-8
-12
~I-
OUTPUT
T:-"i;:~-
-1&
" "(21,
-20
10
20
30
co
TIME"'"
TL/H/7783-4
3·421
•
Typical Performance Characteristics (Continued)
eo
~w
co
Input Voltage Range
31
./
IE
:
..
w
~
>
..~
2D
./
~
31
~~+-4-~-+~~~
10
~
H ~~+-~-r.~~r-t-;
&0
~
~hI"+-+--f--+-!: : !S:!
o
10
ZO
31
40
10
Supply Current
..t
iil
'".ill
1&
J,..
'"
U1
,
3
o
Q!
•
•
I'"
Ov+
(1)
(1)
±65V
REGULATED
OUTPUT
~
'"
.::!
DB
lN5230
tPut on common heat sink.
All resistors are % watt, 5%, except as noted.
t
CB
D.l.F
TCERAMIC
-
Hhe 38V supplies allow for a 5% voltage tolerance. All resistors are V. watt, axcapt as noted.
'
j; 0
:F :~~
ii~~~GULATED
C4
--
TL/H/7783-11
eteWl/et~Wl
Typical Applications :j:
(Continued) (For more detail see AN-127)
90W Audio Power Amplifier with Safe Area Protection
RI
2 MEG
t_---_,
v+ = +Jav o--1.....---1.....------~,........
T
C5
O.I,.F
CERAMIC
!
R2
lOOk
10
OUTPUT
RJ
lOOk
R1
2.1k
tPut on common heat sink
v- = -JaV
·34 tums of no. 20 wire on a %H form
•• Adjust R6 10 set 10
~
C6
D.1"F
TCERAMIC
100 mA
Hhe 3aV supplies allow for a 5% voltage tolerance. All resistors are
TUH17783-12
V. watt. except as noted.
3-426
Typical Applications :j:
(Continued) (For more detail see AN-127)
1 Amp Power Amplifier with Short Circuit Protection
v+ =+Jav
Rll
lOOk
1%
C]
O.lpF
TCERAMIC
RIO
10k
..- - - i
>~~-
t--...-~....- ...- -..-o VOUT
V,No----...~
V-
=-Jav
tPut on common heat sink.
All Diodes are 1N3193.
C4
O.lI'F
CERAMICT
TL/H17783-13
Hhe 38V supplies allow for a 5% voltage tolerance. All resistors are % watt, except as noted.
•
3-427
~
~
,-------------------------------------------------------------------------------------,
CO)
:::E ~National
....
.....
~
~
..-
~ Semiconductor
:::E
.... LM 144/LM344 High Voltage, High Slew Rate Operational
Amplifier
General Description
The LM144 is a general purpose high voltage, uncompensated operational amplifier featuring operation to ±36V,
complete input overvoltage protection up to the supply voltages and input currents comparable to those of other super{3 op amps. Increased slew rate, together with high common-mode and supply rejection, insure excellent performance at high supply voltages. Operating characteristics, in
particular supply current, slew rate and gain, are virtually
independent of supply voltage and temperature. Furthermore, due to thermal symmetry on the die, gain is unaffected by output loading at high supply voltages.
With the unique advantages of low input current, high gain,
and high slew rate, the LM144 can increase accuracy and
useful frequency range in many existing applications. For
example, the LM144 is a plug-in replacement for the
LM101A, as well as other general purpose op amps.
The LMl44 can be compensated with a single capacitor,
thus giving the user the ability to optimize ac parameters to
suit the application. For example, in applications such as
audio power amplifiers, the LM144 with a gain of 10 can
provide a ± 30V output swing, a slew rate of approximately
30V I ,,"S, and a 120 kHz full power bandwidth.
In applications where capacitive loads or cables must be
driven, the LM144 can be overcompensated for increased
stability.
The LM344 is similar to the LM144 for applications in less
severe supply voltage and temperature environments.
Features
.. External compensation provides
large power bandwidth (Ay :;;: 10)
120 kHz
±4.0V to ±36V
• Wide operating voltage range
±30V
• Large output voltage swing
• Wide input common-mode range
• Input overvoltage protection
• Electrical characteristics independent of supply voltage
and temperature
Unique Characteristics
•
•
•
•
•
6.0 nA
1.0 nA
Low input bias current
Low input offset current
High slew rate (Ay :;;: 10)
High voltage gain
Offset voltage null capability
30V/,,"s
lOOk min
Typical Application
Large Power Bandwidth, Current Boosted Audio Line Driver
r--"'---o
+36V
10k
lOOk
+36V
10k
15
":'
VOUT
15
V,N
50k
300
":'
-36V
":'
--o -36V
L....-...
TUH/7784-1
3-426
Absolute Maximum Ratings (These ratings are not concurrent)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Offlcel
Distributors for availability and specifications.
(Note 4)
LM144
LM344
Supply Voltage
±40V
±34V
Power Dissipation (Note 1)
680mW
680mW
Differential Input Voltage (Note 2)
80V
68V
Input Voltage (Note 2)
±40V
±34V
Operating Temperature Range
-55·Cto +125·C
O·Cto +70·C
Storage Temperature Range
-65·C to + 150·C
-65·Cto +150·C
Output Short Circuit Duration
5 seconds
5 seconds
300·C
300·C
Lead Temperature (Soldering, 10 sec)
ESD rating to be determined.
Electrical Characteristics (Note 3)
Parameter
LM344
LM144
Conditions
Min
Typ
Max
2.0
5.0
Min
Units
Typ
Max
2.0
8.0
mV
Input Offset Voltage
TA = 25·C
Input Offset Current
TA = 25·C
1.0
3.0
1.0
10
nA
Input Bias Current
TA = 25·C
8.0
20
8.0
40
nA
Supply Voltage
Rejection Ratio
TA = 25·C
10
100
10
200
",VIV
Output Voltage Swing
TA = 25·C, RL :?! 5 kO
Large Signal Voltage
Gain
TA = 25·C, VOUT = ±10V,
RL:?! 100 kO
Common-Mode Rejection
Ratio
TA = 25·C
Input Voltage Range
TA = 25·C
Supply Current
TA = 25·C
22
25
20
25
V
100k
180k
70k
180k
VIV
80
90
70
90
dB
24
26
2.0
22
26
2.0
4.0
V
5.0
rnA
Short Circuit Current
TA = 25·C
20
20
mA
Slew Rate
TA = 25·C,Av = 1
TA = 25·C, Av = 10, C1 = 3 pF
2.5
30
2.5
30
V/",s
V/",s
Power Bandwidth
TA = 25·C, VOUT = 40 Vp.p,
RL = 5 kO, THO s: 1%, Av = 1
20k
20k
Hz
1.0M
Unity Gain Frequency
TA = 25·C
Input Offset Voltage
TA = Max
TA = Min
Input Offset Current
TA = Max
TA = Min
0.8
1.8
4.5
7.0
Input Bias Current
TA = Max
TA = Min
5.0
16
35
35
Large Signal Voltage Gain
RL:?! 100 kO, TA = Max
RL:?! 100 kO, TA = Min
1.0M
6.0
6.0
50k
50k
Output Voltage Swing
150k
220k
50k
50k
Hz
10
10
mV
mV
0.8
1.8
14
14
nA
nA
5.0
16
55
55
nA
nA
150k
220k
VIV
VIV
RL:?! 5.0 kO, TA = Max
22
26
20
26
V
RL:?! 5.0 kO, TA = Min
22
25
20
25
V
Note 1: The maximum junction temperature of the LM 144 is ISO"C, while that of the LM344 is IOO'C. For operating at elevated temperatures, devices in the H06
package must be derated based on a thermal resistance of ISO"C/W, junction to ambient, or 20"C/W, junction to case.
Note 2: For supply voltage less than ± 40V for the LMI44 and less than ± 34V for the LM344, the absolute maximum input voltage is equal to the supply voltage.
Note 3: These specifications apply forVs ~ ±26V. For the LMI44, TA ~ max ~ 12S'C and TA ~ min ~ -S5"C. Forthe LM344, TA ~ max ~ 70"C and TA ~
min ~ O"C.
Note 4: Refer to RETSI44X for LMI44H specifications.
3-429
Typical Performance Characteristics
Input Voltage Range
Output Voltage Swing
Voltage Gain
120
40
..
:Ii
...
i
1
~
>
i
.
i.
!
~
~
3D
~
./
zo
I.
o
lDO
t--t-+-t-I7''t--I----jH
20
~
o
10
zo
30
1-+--t7o
TfT
..j
...
~
0
80
80
4.
>
OFFSET
20
Vee'" iZIV
R,' "tDkI'-
-55 -35 -15 5 25 45 65 85 105 125
-55-35-15 5 25 45 65 85 105 125
TEMPERATURE I'CI
TEMPERATURE ("C)
TLlHI77B4-3
3·430
Typical Performance Characteristics (Continued)
Voltage Follower Slew Rate
5.0
1
4.0
""2:
~
..
is
Supply Current
Short Circuit Current
5.0
40
4.0
....
~
~
3.0
2.0
~
::;
L
;;l
~
-25"C
1.0
Vs :±28V-
1.0
I
TEMPERATURE I"C)
TEMPERATURE I"C)
Input Noise Voltage
Input Noise Current
lk
t- l-
1.0
I'-
--
~
:a
I-
10
.
10
i
0.1
w
~
z
"
fl-~1 p~
1.0
<;
<;
Vs :±2BY-
~
:!
'"~
'">iJ!
z
IUD
~
0.5
!:
0.01
1.0
10
-55 -35 -15 5 25 45 65 85 105 125
100
TEMPERATURE 1°C)
:!! 100
z
I--
'"
!
80
w
60
z
40
r-.....
20
U
10
80
8
60
~
"'-~
..iii'"
....=>
~
co
1.0
;;:
&0
135
'"!:;c
>
'"
4D
so
20
45
1k
1111 1 . 1M
FREDUENCY 1Hz)
lk
10k
lOOk
0
100
1M
I.
3!
5 ~'"
iJj"
..
12
8
~
la
..'"
--
INPUT
~
\
w
!:;
CO
>
-4
-8
-12
I-
I
\'tiuT
1/
_,"-l
t-:7c:
Vs "28~_
C1 "'27 pF
-16
-20
"'"iJj
.'"
.
w
!:;
co
>
I- ---
-4
-8
20
TIME I",)
1M
Ja
40
..2~U! __
r-
\
!I
-I\-
-12
OUTPUT
10
-~--
T. 'Z5"CV.' .28~_
Cl- 21pf
I
I
-16
-20
10
lOOk
Inverter Pulse Response
20
16
12
I
~
~
10k
lk
fREQUENCY IHd
Voltage Follower Pulse
Response
lID
1.
10
FREQUENCY (Hz)
80
I.
100
10
20
16
1
15
20
Open Loop Frequency
Response
-20
Large Signal Frequency
Response
0
100
lOOk
20
40
1M
120
10k
~
cc
::;
lk
25
100
z
;J
100 lk 1010 lOOk
FREQUENCY 1Hz)
100
10
fREQUENCY IHd
iD
:!!
co
~
lOOk
Power Supply Rejection
Vs:±28V~
C1 =21 pF
f'.
10k
120
T~ _25lC
a;
lk
fREQUENCY IH,)
Common-Mode Rejection
120
'"w
I
TEMPERATURE I"C)
>
z
", "j
-55-35 -15 5 25 45 65 85 105125
'"z
:l
:!!
s~uJ;""
-55-35-15 5 25 45 65 85 105 125
~
a;
r--. ~J
10
'"
ill
~
.."'"
...B'"
I-
l:.:.i-
-55-35-15 5 25 45 65 85 105125
Unity Gain Bandwidth
~
LNL
t-...
f0-
" -,28'1
1.5
z
20
;:;
....cc
Cl- 21 pf
....%
!!l
~
2.0
o
'"
!:
3D
~
cc
::l
POSITIVE SLEW
....
I
JJ
,g
,g
N1EGAITlvJ SLJW
J.D
I
;;:
;;:
20
Ja
40
TIME "'"
TL/H/7784-4
3-431
Application Hints (See Also AN-127)
For example, with high source resistances, care should be
taken to prevent the magnitude of the PC board leakage
currents, although quite small, from approaching those of
the op amp input currents. These leakage currents become
larger at 125'C and are made worse by high supply voltages. To prevent this, PC boards should be properly
cleaned and coated to prevent contamination and to provide protection from condensed water vapor when operating below O'C. A guard ring is also recommended to significantly reduce leakage currents from the op amp input pins
to the adjacent high voltge pins in the standard op amp pin
connection as shown in Figure 1. Figures 2, 3 and 4 show
how the guard ring is connected for the three most common
op amp configurations.
The LM144 is designed for trouble-free operation at any
supply voltage up to a maximum of ± 40V. Input overvoltage
protection, both common-mode and differential, is 100%
tested and guaranteed at the maximum supply voltage. Furthermore, all possible high voltage destructive modes during
supply voltage turn-on have been eliminated by design. As
with most IC op amps, however, certain precautions should
be observed to insure that the LM144 remains virtually
blow-out proof.
Although output short circuits to ground or either supply can
be sustained indefinitely for supply voltages, below ± 18V,
these short circuits should be of limited duration when operating at higher supply voltages. Units can be destroyed by
any combination of high ambient temperature, high supply
voltages, and high power dissipation which results in excessive die temperature. This is also true when driving low impedance or reactive loads or loads that can revert to low
impedance; for example, the LM144 can drive most general
purpose op amps outside of their maximum input voltage
range, causing heavy current to flow and possibly destroying both devices.
The minimum values given for the frequency compensation
capacitor are stable only for source resistances less than 10
kO, stray capacitances on the summing junction less than 5
pF and capacitive loads smaller than 100 pF. If any of these
conditions are not met, it becomes necessary to overcompensate the amplifier with a larger compensation capacitor.
Alternately, lead capacitors can be used in the feedback
network to negate the effect of stray capacitance and large
feedback resistors or an RC network can be added to isolate capacitive loads. See Figures 5, 6 and 7.
Precautions should be taken to insure that the power supplies never become reversed in polarily-even under transient conditions. With reverse voltage, the IC will conduct
excessive current, fusing the internal aluminum interconnects. Voltage reversal between the power supplies will almost always result in a destroyed unit.
Finally, caution should be exercised in high voltage applications as electrical shock hazards are present. Since the
negative supply is connected to the case, users' may inadvertantly contact voltages equal to those across the power
supplies.
In high voltage applications which are sensitive to very low
input currents, special precautions should be exercised.
GUARD
BALANCE. 5
I
Rl ~ RsoURCE
TLIHI7784-8
v-
FIGURE 2. Guarded Voltage Follower
TUHI7784-5
RI
BoHomVlew
R2
""r-+----'V\lI'y---....,
INPUT O-.....
FIGURE 1. Printed Circuit Layout for
Input Guarding with TO-5 Package
R2
RI
RJ
GUARD
INPUT o------4~~
R3 x Rl x R2
Rl + R2
RSOURCE
R3
TLIHI7784-7
Rl x R2
Rl + R2
TLIH/7784-8
FIGURE 4. Guarded Inverting Amplifier
FIGURE 3. Guarded Non-Inverting Amplifier
3-432
Application Hints (Continued)
R2
r--.-J\Ao'\t--_........ OUTPUT
R2
VOUT
RI
INPUT J\J'V\o~,"""
Cl
= R~' ~2
Cl
= R1R; :
NON·INVERTING
INVERTING
CI
Cc= 27PF
TLlH17784-9
TLlHI77B4-10
FIGURE 6. Isolating Large Capacitive Loads
FIGURE 5. Single Pole Compensation
RJ
C2
,..._......" ' ' \ t - - -....... OUTPUT
C2
RI
INPUT~\Ao"'~
OUlPUT
_.Rlr_ Cs
C2=R1Cs
R2
'Protects Input
tProtects oUlpu!
TLlH/nB4-11
FIGURE 7. Compensating For Stray Input Capacitances
or Large Feedback Resistor
~e~~~~~~~~t~~~d
TLlH/77B4-12
FIGURE S. Protecting Against Gross Fault Conditions
Connection Diagram
Metal Can
INVERTING INPUT
Packag~
2
NON·INVERTING INPUT
VTLlH17784-13
TLlH/7784-14
Top View
FIGURE 9. Balancing Circuit
Pin 4 is connected to case
Order Number LM144H or LM344H
See NS Package Number HOSC
3-433
•
Schematic Diagram
COMPENSATION
,
If
812
20
....P--~·'oOUTPUT
813
27
.,
3.Gpf
....
817
D4
D3
Di
RM
Uk
BALANCE
RU
,31.
8ALANC£ICOMPENSATlQN
TLlHI77B4-2
3-434
~National
~ Semiconductor
LM146/LM246/LM346 Programmable Quad
Operational Amplifiers
General Description
Features (ISET= 10 p.A)
The LM146 series of quad op amps consists of four independent, high gain, internally compensated, low power, programmable amplifiers. Two external resistors (RSET) allow
the user to program the gain bandwidth product, slew rate,
supply current, input bias current, input offset current and
input noise. For example, the user can trade-off supply current for bandwidth or optimize noise figure for a given
source resistance. In a similar way, other amplifier characteristics can be tailored to the application. Except for the
two programming pins at the end of the package, the
LM146 pin-out is the same as the LM124 and LM14B.
•
•
•
•
•
•
•
•
•
•
Connection Diagram
Programmable electrical characteristics
Battery-powered operation
Low supply current
350 p.A/ amplifier
Guaranteed gain bandwidth product
O.B MHz min
Large DC voltage gain
120 dB
Low noise voltage
2B nV /,IHZ
Wide power supply range
± 1.5V to ± 22V
Class AB output stage-no crossover distortion
Ideal pin out for Biquad active filters
Input bias currents are temperature compensated
(Dual-In-Line Package, Top View)
PROGRAMMING EQUATIONS
Total Supply Current
~
Gain Bandwidth Product
v-
1.4 rnA (ISET/10 I'A)
~
1 MHz (ISET/10 I'A)
Slew Rate ~ 0.4/1'5 (ISET/10 I'A)
Input Bias Current'" 50 nA (ISET/10 I'A)
ISET = Current into pin 8, pin 9 (see schematic·
diagram)
ISET ~
SETe
v+ - V- - 0.6V
RSET
LM146
TLlH/5654-1
Order Number LM146J, LM246J, LM346J,
LM346M or LM346N
See NS Package Number J16A, M16A or N16A
Schematic Diagram
, . - - - - -_ _ _ _ _ _- . ._ _ _ _ _...-_ _ _ _--QV+(41
+--+--+---0
OUT
TO OTHER
OPAMPS
ISET
SETA,B,D,
('1
V-(1l)
3-435
TLlH/5654-2
•
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales .Office/
Distributors for availability and specifications.
(Note 5)
LM346
LM146
LM246
±18V
±18V
Supply Voltage
±22V
±30V
±30V
Differential Input Voltage (Note 1)
±30V
±15V
±15V
CM Input Voltage (Note 1)
±15V
Power Dissipation (Note 2)
900mW
500mW
500mW
Continuous
Continuous
Output Short-Circuit Duration (Note 3)
Continuous
OOCto +70'C
Operating Temperature Range
- 55'C to + 125'C
- 25'C to + 85'C
100'C
Maximum Junction Temperature
150'C
1100C
- 65'C to + 150'C
- 65'C to + 150'C
Storage Temperature Range
- 65'C to + 150'C
260'C
260'C
Lead Temperature (Soldering, 10 seconds)
260'C
Thermal Resistance (OjAl, (Note 2)
900mW
900mW
900mW
Cavity DIP (J)
Pd
100'C/W
1000C/W
1000C/W
°jA
115'C/W
Small Outline (M) 0jA
Molded DIP (N) Pd
500mW
900C/W
OJA
Soldering Information
Dual-In-Line Package
Soldering (10 seconds)
+ 260'C
+ 260'C
+ 260'C
Small Outline Package
+215'C
+215'C
Vapor Phase (60 seconds)
+215'C
Infrared (15 seconds)
+ 220'C
+ 220'C
+ 220'C
See AN-450 "Surface Mounting Methods and Their Effect on Product Reliability" for other methods of soldering surface mount
devices.
ESD rating is to be determined.
DC Electrical Characteristics (Vs= ±15V, ISET=10JLA, Note 4)
Parameter
LM246/LM346
LM146
Conditions
Min
Typ
Max
Min
Typ
Units
Max
Input Offset Voltage
VCM=OV, Rs:S:500, TA=25'C
0.5
5
0.5
6
mV
Input Offset Current
VCM=OV, TA=25'C
2
20
2
100
nA
Input Bias Current
VCM= OV, TA=25'C
50
100
50
250
nA
Supply Current (4 Op Amps)
TA=25'C
1.4
2.0
1.4
2.5
mA
Large Signal Voltage Gain
RL =10 kO, aVOUT= ±10V,
TA=25'C
100
1000
50
1000
±13.5
±14
±13.5
±14
V
80
100
70
100
dB
dB
V/mV
Input CM Range
TA=25'C
CM Rejection Ratio
Rs:S:10kO, TA=25'C
Power Supply Rejection Ratio
Rs:S:10 kO, TA=25'C
80
100
74
100
Output Voltage Swing
RL:<:10 kO, TA=25'C
±12
±14
±12
±14
Short-Circuit
TA=25'C
5
20
5
20
Gain Bandwidth Product
TA=25'C
0.8
1.2
0.5
1.2
Phase Margin
TA=25'C
60
60
Deg
Slew Rate
TA=25'C
0.4
0.4
VlJLs
35
V
35
mA
MHz
Input Noise Voltage
f=1 kHz, TA=25'C
28
28
nV/.JHZ
Channel Separation
RL = 10 kO, aVOUT=OVto
±12V, TA=25'C
120
120
dB
Input Resistance
TA=25'C
1.. 0
1.0
MO
Input Capacitance
TA=.25·C
2.0
2.0
Input Offset Voltage
VCM=OV, Rs:S:500
0.5
Input Offset Current
VCM=OV
2
25
Input Bias Current
VCM=OV
50
100
1.7
2.2
1.7
Supply Current (4 Op Amps)
Large Signal Voltage Gain
50
RL =10 kO, aVOUT= ±10V
3-436
1000
6
25
pF
7.5
mV
2
100
nA
50
250
nA
2.5
mA
0.5
1000
V/mV
DC Electrical Characteristics
Parameter
(Continued) (VS= ± 15V, ISET= 10 ILA)
Input CM Range
CM Rejection Ratio
RS:5:50n
Power Supply Rejection Ratio
RS:5:50n
Min
Typ
±13.5
70
Output Voltage Swing
DC Electrical Characteristic (Vs =
Parameter
Units
Min
Typ
±14
±13.5
±14
v
100
70
100
dB
Max
Max
76
100
74
100
dB
±12
±14
±12
±14
v
± 15V, ISET= 1 ILA)
LM146
Conditions
Min
Input Offset Voltage
LM246/LM346
LM146
Conditions
VCM=OV, Rs:5:50n,
TA=25°C
LM246/LM346
Typ
Max
0.5
5
Min
Units
Typ
Max
0.5
7
mV
Input Bias Current
7.5
20
7.5
100
nA
Supply Current (4 Op Amps)
140
250
140
300
ILA
100
80
Gain Bandwidth Product
50
kHz
100
DC Electrical Characteristics ('IS = ±1.5V, ISET=10 ILA)
Parameter
Min
Input Offset Voltage
LM246/LM346
LM146
Conditions
VCM=OV, Rs:5:50n,
TA=25°C
Input CM Range
Typ
Max
0.5
5
Min
±0.7
Max
0.5
7
mV
±0.7
V
80
CM Rejection Ratio
80
±0.6
Output Voltage Swing
Units
Typ
dB
V
±0.6
Note 1: For supply voltages less than ± 15V, the absolute maximum input voltage is equal to the supply voltage.
Note 2: The maximum power dissipation for these devices must be derated at elevated temperatures and is dictated by liMAX. 6jA. and the ambient temperature,
TA. The maximum available power dissipation at any temperature is Pd= (TjMAX • T AlIBjA or the 25°C PdMAX. whichever is less.
Note 3: Any of the amplifier outputs can be shorted to ground indefinitely; however, more than one should not be simultaneously shorted as the maximum junction
temperature will be exceeded.
Note 4: These specifications apply over the absolute maximum operating temperature range unless otherwise noted.
Nole 5: Refer to RETS146X for LM146J military specifications.
Typical Performance Characteristics
Input Bias Current vs ISET
..
100
i:l
~...
"
~
160
10
1k
!
!5
a;
.....
..
~
140
..
....
.
~
'20
~
40
~
ill
~
:!!
z
oS
:;
i:l
10
Open Loop Voltage Gain
VSISET
Supply Current vs ISET
>
0.1
!:l
co
100
80
60
Vs =±ISV
TA' 2S"C
20
o
10
0.1
ISET (pAl
3-437
ISETIstAI
100
TL/H/5654-3
•
Typical Performance Characteristics
Slew Rate vs ISET
11
g
gt;
Gain Bandwidth Product
vslSET
111M
ID
10
e'"
~..
a sa
....'"
1M
:z:
~
:z
100.
40
~
10k
~
1
10
10
100
w
~>
..~
i
iii 120
f-
100
z
10
~
-
D.3
D.2
0.1
'"o
~
I-
a.1
a.&
D.5 ~
DA
lao
Common"Mode Rejection
Ratio vs ISET
-
1
a.,
a.1
~
60
YS·:t15V
40
..
20
I
TA"ZSOC
10
!
120
CI
100
~
"
!
Power Supply Rejection
Ratio vs ISET
-
VS=:t15V
~
0.1
100
10
~
40
'"
20
~
VS·sHY
TA =2.5°C
o
100
Output Voltage Swing vs
Supply Voltage
'SET "",I
Input Bias Current vs
Input Common-Mode
Voltage
Input Voltage Range vs
Supply Voltage
100
I.
'SET = 'OllA
>
.!!.
! "lZ
...,::
w
z
10
14
1
12
~>
!:;
>
.~
0
2
I
4
10 12
14
16
o
SUPPLY VOLTAGE (tV)
100
sa r-r-r=
~ sa
40
~
3t\
...
ZD
10
'SET"'0jIA
-
o
-55 -35 -15 5 Z5 45 65 85 105 121
TEMPERATURE rCI
15
~ISET= "IIA
~..
r-
2 SET =I 11A
;::
I
I
I I
'SET"ljIA
10
10
.!
~
-5
Supply Current vs
Temperature
'
c
n
-10
INPUT COMMON-MOOE VOL lAGE tV)
10
10
;;
-15
024&810121416
Input Offset Current vs
Temperature
VS· :t15V
8D
VS· :t15V
I TA=ZSOC
0.1
SU'PLY VOLTAGE (:tV)
Input Bias Current vs
Temperature
'SET=O.I""
~
~
;!
'SET"""
10
...
~
TA= 2rc
'SET" lallA
RL=16kn
0
::!
i;
10
w
~
!...
100
10
0.1
'SETfI
e
"
70
&0
IE
I:i
Phase Margin vs ISET
110
>
t
D.'
ii!
VS=:t15V
1
'SET"1011A
o
-55 -35-15 5 25 45 65 15 105 125
TEMPER~TURE
C'CI
VS .. :t15V
0.01
-55 -35 -15 5 Z5 45 65 85 105 125
TEMPERATURE COC)
TLlH/5654-4
3-438
Typical Performance Characteristics
.
.'"
:!!
Open Loop Voltage Gain
vs Temperature
to
w
100
!:;
CI
>
80
~
"
=
g
'SET=I.AT010.A
120
;;:
Gain Bandwidth Product
CI
CI
~
CI
'SET=10.A-
106
'"
z
:ii
'SET = O.I.A
104
z
~
20
Vs= ±15V
o
TEMPERATURE ('CI
~
I-
~
100
90
80
~
70
60
50 ~
40
lO
20
Vs - ±15V
10
TA = 25'C
10
~
~
~121lW
'S!T ~ 151!~
~
0:
B
w
'"c;
'SET = 10.A
Z
I-
~
'SET = 20.A
~
11111111
100
5 25 45 65 85 105 125
lk
.
12
~
to
'"
!:;
>
CI
\:SET ~ I~~.A
III1
III]JY'SET= 10.A0.6
1J,::'SET=5.A ::
0.8
~ ~I
0.4
~Al
0.2
IC 's~\ ~ : ,~~, _
80
I--+-T-P'rl-+--I
60
I--+--j--"!.o--+........t---I
40
1--+--j--t--'II.-+-"cI
20
11111
100
10k
lk
10
50
I-
~
I
I-
"
CI
I \OUTPUT
:;-
-50
50
oS
I-
'---
I-
~
~
-50
-
-20
200
lk
10k
lOOk
1M
FREQUENCY (Hz)
:;oS
I
i\l
100
100
Voltage Follower Transient
Response
'SET = lo.A
Vs = ±15V
TA - 25'C
1/
-4
120
~ 100 t-"--kc-f--+-+--I
FREQUENCY (Hz)
/
-8
-12
-16
I I I
0:
10
,NPUT
~w
;
1.2
10k
I
I
I
'SET = O.I.A
Power Supply Rejection
Ratio vs Frequency
Voltage Follower Pulse
Response
16
E
TEMPERATURE ('C)
Vs = ±15V
TA=25'C
1.4
FREnUENCY (Hzl
20
I I I
==
I-
'S!T
o
I I I
0.01
Input Noise Current vs
Frequency
'SET-l.A
r--
'SET = I.A
TEMPERATURE ('CI
Input Noise Voltage vs
Frequency
I~
~~
0.1
Vs' ±15V
0.001
-55 -l5 -15 5 25 45 65 85 105 125
110
'5
'SET 1O.A
~
Vs ±15V
10l
-55 -l5 -15
-55 -l5 -15 5 25 45 65 85 105 125
~~
0:
3:
CI
40
~
w
'SET I.A- I--
105
ICI
60
~
if
CI
~
Slew Ratevs
Temperature
107 vs Temperature
140
z
(Continued)
r
i\
\
'SET= lo.A
VS=±15V
TA=25'C
CL=I00pF
RL = 10k"
&I
lOO
T'ME (.,)
T'ME(.,)
TL/H/5654-5
Transient Response Test Circuit
TL/H/5654-6
3-439
Application Hints
Avoid reversing the power supply polarity; the device will
fail.
Common-Mode Input Voltage: The negative commonmode voltage limit is one diode drop above the negative
supply voltage. Exceeding this limit on either input will result
in an output phase reversal. The positive common-mode
limit is typically 1V below the positive supply voltage. No
output phase reversal will occur if this limit is exceeded by
either input.
Isolation Between Amplifiers: The LM146 die is isothermally layed out such that crosstalk between 81/4 amplifiers
is in excess of -105 dB (DC). Optimum isolation (better
than -110 dB) occurs between amplifiers A and D, Band
C; that is, if amplifier A dissipates power on its output stage,
amplifier D is the one which will be affected the least, and
vice versa. Same argument holds for amplifiers Band C.
LM146 Typical Performance Summary: The LM146 typical behaviour is shown in Figure 3. The device is fully predictable. As the set current, ISET' increases, the speed, the
bias current, and the supply current increase while the noise
power decreases proportionally and the Vas remains constant. The usable GBW range of the op amp is 10 kHz to
3.5-4 MHz.
Output Voltage Swing vs ISE" For a desired output voltage swing the value of the minimum load depends on the
positive and negative output current capability of the op
amp. The maximum available positive output current,
(ICl +), of the deVice increases with ISET whereas the negative output current (ICl -) is independent of ISET. Figure 1
illustrates the above.
28
!
24
Ii
20
i"
1.
~
12
5
I
~
10M
0.4
1M
1-1- "CURRENT LIMIT flCL-I-
50
iii
f
'"~
lOOk
+CURRENT LIMIT (ICL~
0.D4
~
~
pi-'
10k
0.1
TA"'2Su C
o
100
10
VS·.±15V
o
w
SUPPLY CURRENT ,"AI
I
111111111
0.1
1
10
ISET""I
111111111
•
10
ISET(!UI)
I
TUH/5654-7
FIGURE 1. Output Current Limit vs ISET
(85)2
I IIIIIIM
(861 2
&.
Input Capacitance: The input capacitance, CIN, of the
LM146 is approximately 2 pF; any stray capaCitance, Cs,
(due to external circuit circuit layout) will add to CIN. When
resistive or active feedback is applied, an additional pole is
added to the open loop frequency response of the device.
For instance with resistive feedback (Figure 2), this pole
occurs at %71" (R1iiR2) (CIN + Cs). Make sure that this pole
occurs at least 2 octaves beyond the expected - 3 dB frequency corner of the closed loop gain of the amplifier; if not,
place a lead capacitor in the feedback such that the time
constant of this capaCitor and the resistance it parallels is
equal to the RI(Cs + CIN), where RI is the input resistance
of the circuit.
,
L
.,2("::)
(85)2
18
TL/H/5654-8
FIGURE 3. LM146 Typical Characteristics
Low Power Supply Operation: The quad op amp operates
down to ± 1.3V supply. Also, since the internal circuitry is
biased through programmable current sources, no degradation of the device speed will occur.
Speed vs Power Consumption: LM146 vs LM4250 (single
programmable). Through Figure 4, we observe that the
LM146's power consumption has been optimized for GBW
products above 200 kHz, whereas the LM4250 will reach a
GBW of no more than 300 kHz. For GBW products below
200 kHz, the LM4250 will consume less power.
lDM
1M
0.4
~
~
~
TUH/5654-9
!
O.D4 =
f
lOOk
FIGURE 2
Temperature Effect on the GBW: The GBW (gain bandwidth product), of the LM146 is directly proportional to ISET
and inversely proportional to the absolute temperature.
When using resistors to set the bias current, ISET' of the
device, the GBW product will decrease with increasing temperature. Compensation can be provided by creating an
ISET current directly proportional to temperature (see typical
applications).
10
1Ga
SUPPLY CURRENT (uA)
TL/H/5654-10
FIGURE 4. LM146 vs LM4250
3-440
.-----------------------------------------------------------------------------.r
s:::
.....
Typical Applications
.co.
en
......
r
s:::
Single (Positive) Supply Biasing
Dual Supply or Negative Supply Biasing
I\)
.co.
en
......
r
s:::
Co)
it
v-
RSET B SET
SET.
-=
RSET
LM34&
ISET
':'
V+-O.6V
iV-i-o.6v
ISET
RSET
Current Source Biasing
with Temperature Compensation
RSET
Blasing all 4 Amplifiers
with Single Current Source
LM334Z
-
ISET
B SET
SET
RI
LM346
R2
TUH/5654-11
67.7 mV
ISET=----RSET
ISET1 R2
67.7 mV
- - - = - , ISET1 +ISET2=----ISET2 R1
RSET
• The LM334 provides an ISET directly proportional to
absolute temperature. This cancels the slight GBW product
Temperature coefficient of the LM346.
• For ISETI "ISET2 resistors RI and R2 are not required
H a slight error between the 2 set currents can be tolerated.
If no~ then use R1
these resistors.
3·441
= R2 to create a lOa mV drop across
Active Filters Applications
Basic (Non-Inverting "State Variable") Active Filter Building Block
10111<
TL/H/5654-12
• The LM146 quad programmable op amp is especially suHed lor active Iilters because 01 their adequate GBW product
and low power consumption.
Circuit synthesis equations (lor circuit analysis equations. consult wHh the LM148 data sheet).
Need to know desired: 10
= cenler frequency measured at the BP output
0 0 = qualHy factor measured at the BP output
Ho = gain at the output of Interest (BP or HP or LP or all 01 them)
• Relation between differenl gains: Ho(BP) = 0.316 x 0 0 x Ho(lP); Ho(Lp) = 10 X Ho(Hp)
•R
xC=
5.033 X 10-2 (sec)
10
.ForBPoutput'RQ= (3.478'Oo-Ho/BPl
.
105
• For HP ouput: RQ =
1.1
x
Ho/BPl
105 x 3.748
,
105
3.47800 (l.t - HOIHP)) - HoIHP)
x 00
• RIN =
)-I'
R =
• IN
( 3.47800 _ 1 )
Ho{BPI
1
0- 5
RO+ 1
1.1
Ho(HPl - 1
...!... + 10- 5
RO
Note. All resistor values are given in ohms.
•
•
_
11 X 105
_
•
For LP output RQ - 3 7 0 (I1-H -\-H
• RIN oiL"!,
o(lP)
.4 8 0
_'_'__ 1
~
...!... + 10-5
RO
• For BR (notch) output: Use the 4th amplifier of the LM146 to sum the LP and HP outputs 01 the basic liUer.
LP O--'VV'v-........
HPo-~M"""'~
TUH/5654-13
Determine RF acoording to the desired gains: HOIBR)
If< >'notch
• Where
=~RRFo(HP)
H
to use ampliller C: Examine the 'above gain relations and determine the dynamiCS 01 the filter. Do not allow slew rate limiting in any output (VHP. VBP.
VLPl. that Is:
VIN(peak) <63.66
x 103 X
ISET
10 p.A
1
x 10 X
Ho (Votta)
II necessary. use amplHler C. biased at higher ISET. where you get the largest output swing.
DevlaUon from TheoreUcal Predictions: Due to the linite GBW products 01 the op amps the 10 , 0 0 will be slightly diff",ent ircm the theoretical predictions.
fo
lre.1 .. --2-1-' Oreai
1 + GB~
'"
00
32f X 0
1- • GOBW 0
3-442
Active Filters Applications (Continued)
A Simple-to-Design BP, LP Filter Building Block
3.9k
3.9k
RO
TL/H/5654-14
- If resistive biasing is used to set the LM346 performance. the 0 0 of this filter building block is nearly insensijive to the op amp's GBW product temperature drift; it
has also better noise performance than the state variable filter.
Circuit Synthesis Equations
0.159
RQ
R
- ; Ra=Qo x R; RIN = - - = - fo
HO(BP)
HO(LP)
• For the eventual use of amplifier C, see comments on the previous page.
Ho(BP) = QoHO(LP); R X
C=
A 3-Ampllfier Notch Filter (or Elliptic Filter Building Block)
Uk
3.9k
RO
'>:~~OVOUT (BRI
TL/H/5654-15
Circuit Synthesis Equations
0.159
0.159 x fo
R x C = - f-;Ro=Qo X R;RIN = f".'
f2
,x
o
R
Ho(BR)1
= - HO(BR)I
f< >fnotch
-For nothing but a notch output RIN=R. C'=C.
notch
C'
C
3-443
•
Active Filters Applications (Continued)
Capacltorless Active Filters (Basic Circuit)
YIN
R4
R3
RZ
RID
R9
8R
RI
R7
'::'
'::'
TLlH/5654-16
• This is a BP, LP, BR filter. The filter characteristics are created by using the tunable frequency respense of the LM346.
• Umltatlons: Q o
< 10, fo x
.
.
• Design equatIOns: a
fo(8R)
= fo(8p), ( 1 -
RS
Qo
63.66 x lOS
ISET(pA)
< 1.5 MHz, output voHage should not exceed Vpeak(out) ,;; - - fo- - x 10 pA
+ R5
R2
R3
R7
RIO
fb
(V)
= AS' b = Rl + R2' c = R3 + R4' d = RS + Ri e = R( + RIO' fo(BP) = f"'l;: HoISP) = a x
~)
'" folBP) (C
< < 1) provided that d = HoIBP) x e, HoIBR) =
c
c, HoILP)
= ii' Q o = ./aXfi
~~.
• Advantage: foOo, Ho can be independently adjusted; that is, the filter is extremely easy to tune.
• Tuning procedure (ex. BP tuning)
1. Pick up a convenient value for b; (b < 1)
2. Adjust Qo through R5
3, Adjust HoIBP) through R4
4. Adjust fo through RSET' This adjusts the unily gain frequency (fu) of the op amp.
A 4th Order Butterworth Low Pass Capacitorless Filter
Your
TUH/5654-17
Ex: fe
= 20 kHz, Ho (gain of the filter) = 1, 001 = 0.541, Qo2 = 1.30S.
• Since for this filter the GBW product of all 4 amplHlers has baen designed to be the same (-1 MHz) only ona current source can be used to bias the circuit Fine
tuning can ba further accomplished through Rb'
3-444
Miscellaneous Applications
A Unity Gain Follower
with Bias Current Reduction
Circuit Shutdown
YIN 0-...-----1
Your
SY"iiri]
~oY
• For better performance, use a matched NPN pair.
• By pulling the SET pin(s) to V- the op amp(s) shuts down and its output
goes to a high impedance state. According to this property. the LM346
can be used as a very low speed analog switch.
Voice Activated Switch and Amplifier
y+
y+
O.1I'F
tSY
o-i . . . . . --1
MIC IN..
CONTROL
RSET
AUDIO OUT
D.SM
t.3M
TL/H/5654-1B
3-445
•
...
:E
.....
...
q) r-----------------------------------------------------------------------------------~
C")
Miscellaneous Applications
(Continued)
..I
q)
:1'"
....~
:iii
X10 Mlcropower Instrumentation Amplifier with Buffered Input Guarding
RSET1
III
..I
R3
m
R4
2&10
R
m
R
m
• CMRR: 100 dB (typ)
18
• Power dissipation: 0.4 mW
R3
LI'~
Y-·-I.5V
m
-
TLlH/5654-19
3·446
r--------------------------------------------------------------------------------,r-
~National
....==
LM148/LM149 Series Quad 741 Op Amp
ct
.....
r-
LM148/LM248/LM348 Quad 741 Op Amps
LM149/LM249/LM349 Wide Band Decompensated (Av (MIN)
==
""r.....
"".....r....
==
OC)
~ Semiconductor
I\)
OC)
5)
==
""CD
.....
I\)
General Description
Features
The LM14B series is a true quad 741. It consists of four
independent, high gain, internally compensated, low power
operational amplifiers which have been designed to provide
functional characteristics identical to those of the familiar
741 operational amplifier. In addition the total supply current
for all four amplifiers is comparable to the supply current of
a single 741 type op amp. Other features include input offset currents and input bias current which are much less than
those of a standard 741. Also, excellent isolation between
amplifiers has been achieved by independently biasing each
amplifier and using layout techniques which minimize thermal coupling. The LM149 series has the same features as
the LM14B plus a gain bandwidth product of 4 MHz at a gain
of 5 or greater.
III 741 op amp operating characteristics
III
III
II
III
III
III
iii
Low supply current drain
0.6 mAl Amplifier
Class AB output stage-no crossover distortion
Pin compatible with the LM124
Low input offset voltage
1 mV
Low input offset current
4 nA
30 nA
Low input bias current
Gain bandwidth product
~
Co)
""
.....
OC)
r-
==
Co)
""
CD
1.0 MHz
LM14B (unity gain)
LM149 (Av :2: 5)
III High degree of isolation between amplifiers
III Overload protection for inputs and outputs
4MHz
120 dB
The LM14B can be used anywhere multiple 741 or 155B
type amplifiers are being used and in applications where
amplifier matching or high packing density is required.
Schematic Diagram
...------1>------------9--0
+Vee
2S
OUT
•
2S
lOOk
7Sk
J4D
L---4~-_6-~------
__-~----~-~_O-V,'
TL/H/77BB-l
'1 pF in the LM149
3-447
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Officel
Distributors for availability and specifications.
(Note 4)
LM248/LM249
LM348/LM349
LM148/LM149
Supply Voltage
±22V
±18V
±18V
Differential Input Voltage
±44V
±36V
±36V
Output Short Circuit Duration (Note 1)
Continuous
Continuous
Continuous
Power Dissipation (Pd at 25·C) and
Thermal Resistance (OjA). (Note 2)
Molded DIP (N) Pd
°jA
Cavity DIP (J) Pd
°JA
Maximum Junction Temperature (TjMAx)
Operating Temperature Range
Storage Temperature Range
-
-
1100mW
110·c/W
800mW
110·C/W
150"C
-55·C:s; TA:S; +125·C
110·C
-25·C:s; TA:S; +85·C
-65·Cto + 150·C
- 65·C to + 150·C
300·C
Lead Temperature (Soldering. 10 sec.) Ceramic
Lead Temperature (Soldering. 10 sec.) Plastic
Soldering Information
Dual-In-Line Package
Soldering (10 seconds)
Small Outline Package
Vapor Phase (60 seconds)
Infrared (15 seconds)
300·C
750mW
100·C/W
700mW
110·C/W
100·C
O·C:S;, TA:S; +70·C
-65·C to + 150·C
300·C
260"C
260·C
260·C
260·C
215"C
220·C
215·C
220·C
215·C
220·C
See AN-450 "Surface Mounting Methods and Their Effect on Product Reliability" for other methods of soldering surface mount
devices.
ESD tolerance (Note 5)
500V
500V
500V
Electrical Characteristics (Note 3)
Parameter
Conditions
LM148/LM149
LM248/LM249
LM348/LM349
Typ
Max Min
Typ
Max Min
Typ
Max
Min
Units
Input Offset Voltage
TA = 25·C. Rs:S; 10 kO
1.0
5.0
1.0
6.0
1.0
6.0
Input Offset Current
TA = 25·C
4
25
4
50
4
50
nA
Input Bias Current
TA = 25·C
30
100
30
200
30
200
nA
Input Resistance
TA = 25·C
0.8
Supply Current All Amplifiers TA = 25·C, Vs = ±15V
2.5
2.4
Large Signal Voltage Gain
TA = 25·C, Vs = ±15V
VOUT = ±10V,RL ~ 2kO
Amplifier to Amplifier
Coupling
TA = 25·C, f = 1 Hz to 20 kHz
(Input Referred) See Crosstalk
Test Circuit
Small Signal Bandwidth
LM148 Series
TA = 25·C
LM149 Series
Phase Margin
LM148 Series (Av = 1)
TA = 25·C
LM149 Series (Av = 5)
60
Slew Rate
LM148 Series (Av = 1)
TA = 25·C
LM149 Series (Av = 5)
0.5
2.0
Output Short Circuit Current
TA = 25·C
25
Input Offset Voltage
Rs:S; 10kO
50
0.8
3.6
160
2.5
2.4
25
0.8
4.5
160
2.5
2.4
25
mV
MO
4.5
mA
160
V/mV
-120
-120
-120
dB
1.0
1.0
1.0
MHz
4.0
4.0
4.0
MHz
60
60
60
degrees
60
60
degrees
0.5
0.5
V/}J-s
2.0
2.0
V/}J-s
25
25
mA
6.0
7.5
7.5
mV
Input Offset Current
75
125
100
nA
Input Bias Current
325
500
400
nA
3-448
Electrical Characteristics (Note 3) (Continued)
Parameter
LM148/LM149
Conditions
Min
Large Signal Voltage Gain
Vs = ±15V, VOUT = ±10V,
RL> 2 kD.
Output Voltage Swing
Vs= ±15V,RL= 10kD.
RL = 2kD.
±12
±10
±12
Input Voltage Range
Vs = ±15V
Common-Mode Rejection
Ratio
Rs:S;10kD.
Supply Voltage Rejection
Rs:S; 10 kD., ±5V:S; Vs:S; ±15V
Typ
Max
LM248/LM249
Min
Typ
Max
15
25
±13
±12
±12
±10
LM348/LM349
Typ
Min
V/mV
15
±13
±12
±12
±10
±12
Units
Max
±13
±12
V
V
V
±12
70
90
70
90
70
90
dB
77
96
77
96
77
96
dB
Note 1: Any of the amplifier outputs can be shorted to ground indefinitely; however, more than one should not be simultaneously shorted as the maximum junction
temperature will be exceeded.
Note 2: The maximum power dissipation for these devices must be derated at elevated temperatures and is dicated by TjMAX. OjA, and the ambient temperature,
TA. The maximum available power dissipation at any temperature is Pd = (TjMAX - TpJ/OjA or the 25°C PdMAX, whichever is less.
Note 3: These specifications apply for Vs = ± 15V and over the absolute maximum operating temperature range (TL
Note 4:
Refer to RETS 14BX for
LM14B
:=s;:
TA :;:,: T H) unless otherwise noted.
military specifications.
Note 5: Human body model, 1.5 kfl in series with 100 pF.
Cross Talk Test Circuit
Sk
1k
'"
'Ok
1_
2~
v'
(+
1/4LM14Bf
"0
-!-
lour
~I"VPEAK'
TL/H/7786-6
Crosstalk ~
Vs
~
1_
".9.1J'~
UNDER
"f+V"···
'·OUT
14
'
TL/H/7786-7
-20 log
e'OUT
(dB)
101 x eOUT
±15V
Application Hints
The LM148 series are quad low power 741 op amps. In the
proliferation of quad op amps, these are the first to offer the
convenience of familiar, easy to use operating characteristics of the 741 op amp. In those applications where 741 op
amps have been employed, the LM148 series op amps can
be employed directly with no change in circuit performance.
The LM149 series has the same characteristics as the
LM148 except it has been decompensated to provide a
wider bandwidth. As a result the part requires a minimum
gain of 5.
The package pin-outs are such that the inverting input of
each amplifier is adjacent to its output. In addition, the amplifier outputs are located in the corners of the package
which simplifies PC board layout and minimizes package
related capacitive coupling between amplifiers.
The input characteristics of these amplifiers allow differential input voltages which can exceed the supply voltages. In
addition, if either of the input voltages is within the operating
common-mode range, the phase of the output remains correct. If the negative limit of the operating common-mode
range is exceeded at both inputs, the output voltage will be
positive. For input voltages which greatly exceed the maximum supply voltages, either differentially or common-mode,
resistors should be placed in series with the inputs to limit
the current.
back connection) and the capacitance to reduce the phase
shift resulting from the capacitive loading.
The output current of each amplifier fn the package is limited. Short circuits from an output to either ground or the
power supplies will not destroy the unit. However, if multiple
output shorts occur simultaneously, the time duration should
be short to prevent the unit from being destroyed as a result
of excessive power dissipation in the IC chip.
As with most amplifiers, care should be taken lead dress,
component placement and supply decoupling in order to
ensure stability. For example, resistors from the output to an
input should be placed with the body close to the input to
minimize "pickup" and maximize the frequency of the feedback pole which capacitance from the input to ground creates.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many
instances the frequency of this pole is much greater than
the expected 3 dB frequency of the closed loop gain and
consequently there is negligible effect on stability margin.
However, if the feedback pole is less than approximately six
times the expected 3 dB frequency a lead capacitor should
be placed from the output to the input of the op amp. The
value of the added capacitor should be such that the RC
time constant of this capacitor and the resistance it parallels
is greater than or equal to the original feedback pole time
constant.
Like the LM741 , these amplifiers can easily drive a 100 pF
capacitive load throughout the entire dynamic output voltage and current range. However, if very large capacitive
loads must be driven by a non-inverting unity gain amplifier,
a resistor should be placed between the output (and feed3-449
•
Typical Performance Characteristics
Supply Current
Input Bias Current
90
!....
+H"C",,,/
55°&
,;;t::. Y
~ r::::: ~
o
I
o
10
il
50
!....
40
a:
a:
f..-"'"
-
70
l\l
"ill
30
20
~"";'20VS
~...."
.... -.....1.. I-
10
15
.
I I
..
I
..
a -15
Vs =:t15
'\ '\
~
w
~
>
~
..
,\-55"C
\~
20
-10
-5
100
:;;
..i'i
:a
a:
"
30
10
r--
40
15
20
o
10
100
~"~"
"'~
FREQUENCY
100
iii!!
iii
:s
!I..
~
1M
-25
-30
!~IIII~.
-15
-8
-25
-30
-35
,.
10k
lOOk
0.1
1M
~
-15 ;II
-ltl !!!
Av · '
-10
-78
-tiD
I
V.
RL ~2k
r-
t-
40
80
0
a
~
II
TA ·25°&
-1
1&0
ZID
\
1
\
or- r - - I- r'12k
V,N
I I
I I
I I
2
120
ill
-10
Av =5
Vs =:t:15V
2
TIME"'~
..
;;
I v. I
>
v.
I
I
I
-1 0
~
i
10
·1
0
IT. -25"C r--f\-
a
!
Large Signal Pulse
Response (LM149)
Vs =::t16V r-:S;r-
....5
10
FREQUENCY IMHzI
a
oil!:
INJ
0.1
I
I
:: ~ !S-1 O If
a -PHAS~\tti
-35
~
0
GAIN
101
80
80
70
80
50
40
30
20
10
FREQUENCY (MHz!
Large Signal Pulse
Response (LM 148)
DO
75
v.·±15V
T A =25"C
I'N.'W.I
II1t
~10
100
1M
lOOk
10k
~~ L~m~-
FREQUENCY (Hz!
135
120
105
~
1111
-5
LMI48
(HzI
.•
~-~~
_
lk
LMI49
10
25
Bode Plot LM148
o
5
-20
o.:-==__
ZO
15
10
11
10M
8
ffi
FREQUENCY (Hri
-10
:: I
D
ro
100
3D
Vs·:!:15V
1.. -2Ire
-5
-10
-15
o
0.,11
30
Vs=+15V
50
Bode Plot LM149
48
35
3D
25
20
15
10
o
V
10
1,,=25"C
98
LM141- r.-
10k
V
Open Loop Frequency
Response
70
,.
10
lk
r-LM(4B
21
V
Output Impedance
25
110
1'\:"
I'
20
OUTPUT SINK CURRENT (mAl
V.=,'5V
T,,'=25°C
80
I'
V
SUPPLY VOLTAGE (.V)
~
25
1'\,
80
....
"~"
"
+125J
w
Common-Mode Rejection
Ratio
,
30
~
I
25"e
"
~ ~ t--.-5~C
+25~,\
OUTPUT SOURCE CURRENT (mAl
lZ0
.."
..~
Vs· :!:15V
>
;::
+2r C\
15
!;
TA
Negative Current Limit
....
10
"~
40
TE.... ERATURE rCI
Positive Current Limit
+12S'C
L
a..
-55 -35 -15 5 25 45 65 85 105 125
20
15
I
-~
VSI
SUPPLY VOLTAGE ('VI
a
"5V~_I-_
~::;-:I:-",-~'~jVs
I
o
10
'r
Voltage Swing
50
10
20
40
&0
10
100
T1ME~
TL/H/nS6-3
3-450
Typical Performance Characteristics
Small Signal Pulse
Response (lM148)
Vo
100
!..
~
1\
1\
-IUO
VON
-100
TA '"25°t
\
Vs -!15V
HL -Zk
T•• ZS·C
Av = 1
< "IOIST.
ZI
Z4
\
-100
i
I
I
3Z
Av· S
I
!
i
Undistorted Output
Voltage Swing
Vs =:!:I&V
TA " 25"C
i>'
iii 100
Vo
100
Vs· !15V
I
:3'"
Small Signal Pulse
Response (lM149)
A\I"'1
I
(Continued)
I-IZ
v"
ZO
~
16
i>'
I
I
o
-20
100
TIME (/JI)
Gain Bandwidth
..,.
I'
4.0
. ~MI4~_
......~
..
l! 3.0
"i
:s"
z
..
i!!
c
-
f-
I'" ......
t-
2.0
1.0
IMI4I
- f - f-
-'!
~
S
~
LM149- -
f-
1\
I
\
TA,III25°C
0
Z.O
.0
1.0
0
I
o
'N
-Z .0
o
zo
-55 -3& -15 5 25 45 IS 85 105 125
TEWERATURE C·CI
TEMPERATURE C·C)
TIMEc"d
Input Noise Voltage and
Noise Current
Positive Common-Mode
Input Voltage limit
II
Vs'"J:15V
RL -2k
Av=-1
T. -Z5"C
\
1
-10....::
\
10
0
o
~
~
.....~
.."!!l...'"
..
v••
10
1.6
160
V.
0
~
J
V1 -:t1fiV
RL -Zk
Ay --6
-55 -35 -15 5 25 45 65 85 IDS 125
10V
"'"
I
0
3.0
Inverting Large Signal Pulse
Response (lM 148)
a
v.
a
LMI48
1
o
V~ •• J5V
4.0
.,.
lOOk
Inverting Large Signal Pulse
Response (lM149)
Slew Rate
1 Vs··15V
.....
10k
lk
FREQUENCY CHII
TIME C.d
:\l
Vs· :t1iV
TA -noe
140
zo
I.Z
100
1.0
80
0.1
80
0.6
40
D.4
20
0.2
/
&
100
TIME c"d
/
5
Ik
FREQUENCY (Hz)
30 40 50 80 10 10 &0 100
-Sloe'S: TA 'S: fo125"C
1.4
IZO
20 40 10 80 100120140 liD 1I1Z00
10
/
1/
/
/
10
1&
20
POSITIVE SUPPLY VOLTAGE CV)
TL/HI7786-4
Negative Common-Mode Input
Voltage limit
-zo r--r=-r--r-,.----.---,
~ ~~-~~-~~~
-5
-10
-15
-ZO
NEGATIVE SUPPLY VOLTS (V)
TLlH/7786-5
3-451
•
Typical Applications-LM 148
One Decade Low Distortion Sinewave Generator
R3
R4
R5
H6
Cl
HI
1
1 = 2".R1CI
Ii>
R4R5(1
-S
X.", K = ""R3
1
1)
+ R4 + As
'
rDS'"
'U
= 5 kHz, THO S; 0.03% '
= lOOk pol Cl = 0.0047 "F, C2 = 0.01
RON
(V)
1 - V~S Yo
Tl/H/77S6-S
'MAX
Rl
diode (ex. LMl03), Vs
=
"F, C3
= 0.1
= 24OU, Q = NS5102,01
R3 = 5.11<, R4 = 12U, R5
"F, R2
= R6 = R7 = 1M,
= IN914,02 = 3.6Vavalanche
±15V
A simpler version with some distortion degradation at high frequencies can be made by using Alas a
simple inverting amplifier, and by puHing back to back zeners in the leadback loop 01 A3.
Low Cost Instrumentation Amplifier
Hi2
Ri2
Your =
2(~ + 1) ,Vs -
TLlH/7786-9
3VS;VINCM S; Vs+ - 3V,
= ±15V
= R2, trim R2 to boost CMRR
Vs
R
3-452
Typical Applications-LM 148 (Continued)
Low Drift Peak Detector with Bias Current Compensation
ZOk
>-.....-oV
pEAK
V,"
Adjust R for minimum drift
03 low leakage diode
R2
2M
01 added 10 improve speed
Vs
=
-
±ISV
I.
R
1M
m
3
TLlHI7786-IO
Universal State-Variable Filter
R~
lOOk
CI
0.001
R6
10k
RI
R4
R,
> ....._DV ••
Tune Q Ihrough RO,
For predictable resulls: 10 Q ,;; 4 x 1()4
Use Band Pass outpul to lune lor Q
~ =!::!I!l,
V,NCs)
NHPCS)
I
o
I
Dcs)
DCs)
= 52 + SOlo + 0102
TLlH/77as-l1
Q
= S2 HOHP,
NBPCS)
= -SOlOQHOBP
NLP
= 0102 HOLP-
=....!.. ~ [T I = RC Q = (1 + R41RS + R4IRO) (~!!)%
2". vRs Vi1i2' I
I J,
1 + R61RS
RS 12
_....!.. (.2!tL)%
_ 1 + R61RS
_ 1 + R41RS + R41RO
NOTCH - 2".
H
_
OlP - 1
+
Rlll 12
,HOHP - 1
+ RslRO + RsIR4' HOBP - 1 + RslRO + RsIR4
1 + RsIR6
RslRO + RsIR4
3·453
Typical Applications-LM 148 (Continued)
A 1 kHz 4 Pole Butterworth
lOOk
50.3k
V,N
o--OVIIY-."'ooof
150k
50.3k
:>-.....- 0 V
OUTI
lOOk
lOOk
lOOk
50.3k
> ........-oV
39.4k
OUT2
TLlH/7786-12
Use general equations, and tune each section separately
QlstSECTION ~ 0.541, Q2ndSECTION ~ 1.306
The response should have 0 dB peaking
A 3 Amplifier BI-Quad Notch Filter
R1
H8
Rl
CZ
Cl
RZ
VOUT ")
R3
A5
R4
V.. ,,)
0-"'-----------"'-----------""
TLlH17786-13
JRa
~ 2;VR7
Necessary condition lor notch:
fa ~ R:~7
Q
~ VR7
1
X ./R2R3C1C2' INOTCH
3 kHz, Q ~ 5, Rl ~ 270k, R2 ~ R3 ~ 20k, R4
Better noise performance than the state-space approach.
Ex: INOTCH
~
1
JRa
R1CI
X 4R3C2R2Cl ' 10
~
~
1
2".
R6
R3R5R7C1C2
27k, R5
~
201<, R6
3-454
~
RS
~
10k, R7
~
lOOk, Cl
~
C2
~
0.001 ,.F
r-----------------------------------------------------------------------------~
Typical Applications-LM 148 (Continued)
r
...:s:::
,a:..
.....
r
(XI
A 4th Order 1 kHz Elliptic Filter (4 Poles, 4 Zeros)
...:s:::
,a:..
CD
.....
E
N
,a:..
.....
r
(XI
RJ
:s:::
RO
N
,a:..
CD
.....
r
R.
:s:::
AICI = A2C2 = I
A'IC'I = A'2C'2 = I'
R,
Co)
,a:..
.....
r
(XI
R'5
:s:::
Co)
,a:..
CD
R'O
Va
TLlH/71B6-14
= 1 kHz, Is = 2 kHz, Ip = 0.543, Iz = 2.14, Q = 0.B41, I' p = 0.9B7, I' z = 4.92, Q' = 4.403, normalized 10 ripple BW
I =...!... ~ X ~
=...!... & X ~ = (I + A41A3 + A4IAO) X ~ '= /R'6
I + A'41A'O
p 2".
I' Iz 2". "F\. I' Q
I + A61AS
Q
I + A'61A'S + A'61Ap
Ie
"As
"As'
"As
Ap =
AHAL
AH + AL
Use Ihe BP outputs 10 lune Q, Q', lune Ihe 2 sections separalely
AI
A'I
= A2 = 92.6k, A3 = A4 = AS = lOOk, A6 = 10k, AO = 107.8k, AL = lOOk, AH = ISS.lk,
= A'2 = 50.91<, A'4 = A'S = lOOk, A'6 = 10k, A'O = S.78k, A'L = lOOk, A'H = 24B.12k, A'I = lOOk. All capacitors are 0.001
Lowpass Response
-10
\
1\
;;; -20
..
:s
Ci
-3D
\
-40
-50
....0
-70
100
Ik
10k
lOOk
FREQUENCY (Hz,
TL/H17766-15
3-455
I'F.
Typical Applications-LM 149
Minimum Gain to Insure LM149 Stability
The LM149 as a Unity Gain Inverter
4R
R
Y,N
-....,NVt--..-'i
VIN -_IV'II'--....-t
4R
>-"'--oVOUT
R
VOUT
TL/HI7786-16
ACL(S) = VOUT =
VIN
(1
Vol
-4
+
TL/HI7786-17
'" -4
VOUT
-1 - )
ACL(S) = - = ( -VIN
6
S )
AOL(S)
"'-1
1+-AoL(S)
'" ±SVOS
vol
VIN = 0
Power BW = 40 kHz
'" ±SVOS
VIN= 0
Small Signal BW = G BW/S
Small Signal BW = G BW/S
Non-inverting-Integrator Bandpass Filter
R
R6
Ro
R7
R5
R'N
LP
>-t....._OsP
elN
TL/H/7786-18
For stability purposes: A7 = A6/4, 10A6 = AS,
~x..!... a=~ ~
10=2..
2".VAs
AC'
A VAs'
Co
= 10C
HOBP= AQ
AIN
10(MA><), aMAX = 20 kHz, 10
Belter
A7,
a sensitivity with respect to open loop gain variations than the state variable filter.
Co added lor compensation
3-456
Typical Applications-LM 149 (Continued)
Active Tone Control with Full Output Swing (No Slew Limiting at 20 kHz)
lOOk
BOOST
CUT
Rl
11k
R7
11k
R5
3,6k
R5
3.6k
R4
500k
TREBLE
Vs = ± 15V, VOUT(MAX) = 9,1 VAMS,
fMAX
IH
= 20 kHz, THO " 1%
=
1
21TR5C3' fHB
TL/H/7786-19
= 21T(Rl + 2R7) C3
Duplicate the above circuit for stereo
Max 8ass Gain '" (Rl
1 ___
1_ f ___
1_
L - 21TR2Cl' LB - 21TR1Cl
Max Treble Gain '" (Rl
+ R2)/Rl
+ 2R7)/R5
as shown: fL '" 32 Hz, fLB '" 320 Hz
fH'" 11 kHz, fHB '" 1.1 Hz
Triangular Squarewave Generator
Cl
O.ODI,u.F
R'2
10k
H2
10k
20k
RI
ZOk
10k
v+o-..--.,
ZOk
20k
...-...-0 vZOk
TL/H/7786-20
_ KXVIN
_
,2VI
+ _ _
_
I-SV+C1Rl,K-R2/R2'''j(,,25V,V -V,Vs-±15V
Use LM125 lor ±15V supply
The circuit can be used as a low frequency VIF for process control.
01,03: KE4393, 02, 04: Pl0S7E, 01-04
= lN914
3-457
LM 148/LM 149/LM248/LM249/LM348/LM349
~
"~'
LM148, LM149, LM741 Macromodel for Computer Simulation
en
3'
Vee
Vee
1
!.
-=-,.B03V
RC2
5.3k
_
c
o·:::J
V.
C2'
30 pF
+O~--~----------~-,
,
----1'~-,'-111-,
~--'------~----~'r-----='[-
R.,
VtA.
Vb
32
OVa
w
02
V.
O~.r.U
t.>
~
V.
DG.150.&,.U
R2
lOOk
Vb
Gb
241.5mU
R02
42.B7k
G.V.
46.96U
I
V.
-VEE
Cc
lEE
20.2&,111
J2.4IPF
-VEE
TLlH/n66-21
Pol = 112
= 8 X 10- 16
'C2 = 6 pFfor LMI49
- = - 2.803V
IS
P02 = 144
For more details, see IEEE Journal of Solid-State Circuits, Vol. SC-9, No.6, December 1974
TLlH/n66-22
Connection Diagram
Dual-In-Line Package
OUT4
IN4
IN4'
QUTI
IN 1
INI"
v-
IN3'
IN 3
OUTl
IN 2"
IN2
DUl2
TLlH/7786-2
Top View
Order Number LM148J, LM248J, LM348J, LM149J, LM249J, LM349J, LM348M, LM348N or LM349N
See NS Package Number J14A, M14A or N14A
•
3-459
~
c
en
(\I
:iii
,----------------------------------------------------------------------------,
~National
~ Semiconductor
«
co
..J
......
In
('I)
:iii
..J
......
~
In
(\I
LM 158/LM258/LM358, LM 158A/LM258A/LM358A,
LM2904 Low Power Dual Operational Amplifiers
:iii
General Description
......
The LM 158 series consists of two independent, high gain,
internally frequency compensated operational amplifiers
which were designed specifically to operate from a single
power supply over a wide range of voltages. Operation from
split power supplies is also possible and the low power supply current drain is independent of the magnitude of the
power supply voltage.
..J
~
In
.,...
:iii
..J
......
co
In
('I)
:iii
..J
......
co
In
(\I
:iii
..J
......
co
In
.,...
:iii
..J
Application areas include transducer amplifiers, dc gain
blocks and all the conventional op amp circuits which now
can be more easily implemented in single power supply systems. For example, the LM158 series can be directly operated off of the standard + 5 Voc power supply voltage which
is used in digital systems and will easily provide the required
interface electronics without requiring the additional ± 15
Voc power supplies.
Unique Characteristics
• In the linear mode the input common-mode voltage
range includes ground and the output voltage can also
swing to ground, even though operated from only a single power supply voltage.
• The unity gain cross frequency is temperature
compensated.
• The input bias current is also temperature
compensated.
• Allows directly sensing near GND and VOUT also goes
to GND
• Compatible with all forms of logic
• Power drain suitable for battery operation
• Pin-out same as LM1558/LM1458 dual operational
amplifier
Features
• Internally frequency compensated for unity gain
• Large dc voltage gain
100 dB
• Wide bandwidth (unity gain)
1 MHz
(temperature compensated)
• Wide power supply range:
Single supply
3 Voc to 32 Voc
or dual supplies
± 1.5 Voc to ± 16 Voc
• Very low supply current drain (500 I-'A)-essentially independent of supply voltage
45 nAoc
• Low input biasing current
(temperature compensated)
• Low input offset voltage
2 mVoc
and offset current
5 nAoc
• Input common-mode voltage range includes ground
• Differential input voltage range equal to the power supply voltage
Voc to V+ - 1.5 Voc
• Large output voltage swing
o
Advantages
• Eliminates need for dual supplies
• Two internally compensated op amps in a single
package
Connection Diagrams (Top Views)
Metal Can Package
v+
OUTPUT A
INVERTING INPUT A
6
INVERTING
INPUT B
NON.INVERTING _...;;3+-_-,
INPUT A
v'
~-I-'-- OUTPUT B
INVERTING INPUT B
GNO-1---.....
GND
TL/H/7787-1
TL/H/7787 -2
Order Number LM158AH, LM158H, LM258AH,
LM258H, LM358AH or LM358H
See NS Package Number H08e
Order Number LM158J, LM158AJ or LM358J
See NS Package Number J08A
Order Number LM358M, LM358AM or LM2904M
See NS Package Number M08A
Order Number LM358AN, LM358N or LM2904N
See NS Package Number N08E
3-460
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
(Note 9)
LM158/LM258/LM358
Supply Yoltage, Y+
Differential Input Yoltage
Input Yoltage
Power Dissipation (Note 1)
Molded DIP (LM358N)
Metal Can (LM158HI
LM258H/LM358H)
Small Outline Package
Output Short-Circuit to GND
(One Amplifier) (Note 2)
Y+ ,;; 15 Yoc and TA = 25·C
Input Current (YIN
(Note 3)
LM158/LM258/LM358
LM2904
LM158A/LM258A/LM358A
32 YOC or ± 16 Yoc
26 Yoc or ±13 Yoc
32Yoc
-O.3Yocto + 32Yoc
26Yoc
-0.3Yocto + 26Yoc
830mW
830mW
550mW
530mW
530mW
Continuous
Continuous
50mA
50mA
LM2904
LM158A/LM258A/LM358A
Operating Temperature Range
LM358
LM258
LM158
Storage Temperature Range
Lead Temperature, DIP
(Soldering, 10 seconds)
O·Cto +70·C
-25·C to +85·C
-55·Cto +125·C
-65·Cto + 150·C
- 65·C to + 150·C
260·C
260·C
300·C
3000C
260·C
260·C
215·C
220·C
215·C
220·C
Lead Temperature, Metal Can
(Soldering, 10 seconds)
Soldering Information
Dual-In-Line Package
Soldering (10 seconds)
Small Outline Package
Vapor Phase (60 seconds)
Infrared (15 seconds)
< -0.3 Yocl
~I
-40·C to + 85·C
See AN-450 "Surface Mounting Methods and Their Effect on Product
Reliability" for other methods of soldering surface mount devices.
ESD Tolerance (Note 10)
250Y
250Y
Electrical Characteristics Y+
Parameter
LM158A
Conditions
Input Offset Yoltage (Note 5), TA
=
IIN(+) or IIN(-), TA = 25·C,
YCM = OY, (Note 6)
Input Offset Current
IIN(+) - IIN(-), YCM
=
OY, TA
Input Common-Mode Y+ = 30 Yoc, (Note 7)
Yoltage Range
(LM2904, Y+ = 26Y), TA
=
=
25·C
Over Full Temperature Range
RL = 00 on All Op Amps
Y+ = 30Y (LM2904 Y+ = 26Y)
Y+ = 5Y
LM258A
LM358A
LM158/LM258
LM358
LM2904
Units
Min Typ
Max
Min Typ
Max
Min Typ
Max
Min Typ
Max
Min Typ
Max
Min Typ
Max
±1
±2
±1
±3
±2
±3
±2
±5
±2
±7
±2
±7
mYoc
20
50
40
80
45
100
45
150
45
250
45
250
nAoc
±2
±10
±2
±15
±5
±30
±3
±30
±5
±50
±5
±50
nAoc
25·C
Input Bias Current
Supply Current
= + 5.0 Yoc, unless otherwise stated
25·C
Y+-1.5
0
1
0.5
2
1.2
Y+-1.5
0
1
0.5
2
1.2
Y+ -1.5
0
1
0.5
2
1.2
Y+-1.5
0
1
0.5
2
1.2
Y+-1.5
0
1
0.5
2
1.2
Y+ -1.5 Yoc
0
1
0.5
2
1.2
mAoc
mADc
l706l:Vlll/V8SEVlll/V8Sl:Vlll/V8S ~ V111/8SEVIIl/8Sl:VIIl/8S ~ VIIl
LM 158/LM258/LM358/LM 158A/LM258A/LM358A/LM2904
Electrical Characteristics
Parameter
(Continued) V+ =
+ 5.0 Voc, Note 4, unless otherwise stated
LM158A
LM258A
Min
Typ
Typ
Max Min Typ
Max Min Typ
Max Min Typ
Conditions
Max Min
LM358A
LM158/LM258
LM358
LM2904
Max
Min
Typ
Units
Max
Large Signal Voltage
Gain
V+ = 15VoC.TA = 25°C,
RL:2: 2 kn, (ForVo = 1 Voc
to 11 Voc)
50
100
50
100
25
100
50
100
25
100
25
100
V/mV
Common-Mode
Rejection Ratio
DC, TA = 25°C,
VCM = OVtoV+-1.5Voc
70
85
70
85
65
85
85
85
65
85
50
70
dB
Power Supply
Rejection Ratio
DC, V+ = 5 Voc to 30 Voc
(LM2904, V+ = 5 Voc
to 26 Voc), TA = 25°C
65
100
65
100
65
100
65
100
65
100
50
100
dB
Amplifier-to-Amplifier
Coupling
f = 1 kHz to 20 kHz, TA = 25°C
(Input Referred), (Note 8)
-120
dB
Output Current
Source
VIN+ = 1 Voc,
VIN- = OVoc,
V+ = 15 Voc,
Vo = 2 Voc, TA = 25°C
20
40
20
40
20
40
20
40
20
40
20
40
mAoc
Sink
VIN- = 1 Voc, VIN+ = 0 Voc
V+ = 15 Voc, TA = 25°C,
Vo= 2Voc
10
20
10
20
10
20
10
20
10
20
10
20
mAoc
VIN- = 1 Voc,
VIN+ = OVoc
TA = 25°C, Vo = 200 mVoc,
V+ = 15Voc
12
50
12
50
12
50
12
50
12
50
12
50
/LAOC
c.>
.h
-120
-120
-120
-120
-120
a>
I\)
Short Circuit to Ground TA = 25°C, (Note 2),
V+ = 15Voc
Input Offset Voltage
(Note 5)
Input Offset Voltage
Drift
Rs = on
Input Offset Current
IIN(+) - IIN(-)
Input Offset Current
Drift
Rs = on
Input Bias Current
IIN(+) or IIN(-)
40
60
40
±4
7
15
60
40
±4
7
±30
15
60
40
±5
7
±30
20
60
40
±7
7
±75
200
10
200
10
300
10
40
100
40
100
40
200
40
7
±150
40
60
mAoc
±10
mVoc
7
10
300
40
±9
±100
10
60
±45
/Lvrc
±200
10
500
40
nAoc
pAocrC
500
nAoc
Electrical Characteristics (Continued) V+
Parameter
= + 5.0 Vec, Note 4, unless otherwise stated
LM158A
Conditions
Min Typ
Input Common-Mode
V+ = 30 Vec, (Note 7)
Voltage Range
(LM2904, V+ = 26 Vecl
Large Signal Voltage
V+ = +15Vec
Gain
(Vo = 1 Vecto 11 Vecl
Max
V+-2
0
LM258A
Min Typ
LM358A
Max
V+-2
0
Min Typ
Max
V+-2
0
LM158/LM258
Min Typ
Max
V+-2
0
LM2904
LM358
Min Typ
V+-2
0
25
25
15
25
26
26
26
26
26
27
27
27
Max
Min Typ
V+ -2
0
Vec
V/mV
15
15
Units
Max
RL ~ 2k!l
Output Voltage Swing
VOH
V+ = +30Vec,RL=2k!l
RL ~ 10 k!l
(LM2904, V+ = 26 Vecl
VOL
Output Current
Source
'"
i
28
5
27
20
28
5
20
28
5
20
28
5
20
5
23
Vec
24
5
20
Vec
100
mVeC
Vo = 2Vec
VIN+ = +1 Vec, VIN- = OVec,
V+ = 15Vec
Sink
27
V+ = 5Vec,RL ~ 10k!l
22
28
VIN- = +1 Vec, VIN+ = OVec,
V+= 15Voc
10
20
10
20
10
20
10
20
10
20
10
20
mAec
10
15
5
8
5
8
5
8
5
8
5
8
mAec
Note 1: For operating at high temperatures. the LM358/LM358A, LM2904 must be derated based on a + 125"C maximum iunction temperature and a thermal resistance of 120'C/W which applies for the device soldered in a printed
circu~ board, operating in a still air ambient. The LM258/LM2S8A and LM1S8/LM1S8A can be derated based on a + 1S0'C maximum iunction temperature. The dissipation is the total of both amplifiers-use external resistors. where
possible, to allow the amplifier to saturate or to reduce the power which is dissipated in the integrated circuit.
Note 2: Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short cirucits to ground. the maximum output current is approximately 40 rnA independent of the magnitude of
V+ . At values of supply voltage in excess of + 15 Vee. continuous short·circuits can exceed the power dissipation ratings and cause eventual destruction. Destructive dissipation can result from simultaneous shorts on all amplifiers.
Note 3: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode
clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC Chip. This transistor action can cause the output voltages of the op amps to go to the V+ voltage level (or to ground for a large
overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than -0.3 Voc (at 25"C).
Note 4: These specifications are lim~ed to -SS'C ,;; TA ,;; + 12S'C for the LM1S8/LMI58A. With the LM2S8/LM258A, all temperature specifications are limited to -2S'C ,;; TA ,;; +8S'C, the LM3S8/LM3S8A temperature
specifications are limited to O'C ,;; TA ,;; + 70'C. and the LM2904 specifications are limited to - 40'C ,;; TA ,;; + 8S'C.
Note 5: Vo .. 1.4 Vee, Rs
= on ~h V+ from 5 Vee to 30 Vee; and over the full input common·mode range (0 Vee to V+
-1.5 Vecl at 2S'C. For LM2904, V+ from 5 Vee to 26 Vee.
Note 6: The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the input lines.
Note 7: The input common-mode voltage of either input Signal voltage should not be allowed to go negative by more than 0.3V (at 2S'C). The upper end of the common·mode voltage range is V + -1.5V (at 25"C). but either or both
inputs can go to +32 Vee without damage (+26 Vee for LM2904), independent of the magnitude of V+.
Note 8: Due to proximity of external components, insure that coupling is not originating via stray capacitance between these external parts. This typically can be detected as this type of capacitance increases at higher frequencies.
Note 9: Refer to RETS1S8AX for LM1S8A military specHications and to RETS1S8X for LM1S8 military specifications.
Note 10: Human body model, 1.5
kn in series with 100 pF.
t06~Wl/"8seWl/"8S~Wl/"8S ~ Wl/8SeWl/8S~Wl/8S ~ Wl
iii
Typical Performance Characteristics
Input Voltage Range
Input Current
90
j
}
;!!.
III
~
!'!
~,
..
~
50
~,
30
.J!>
0
5
V" OR
10
V" = +30Voc
,....
60
i- i- V" = +15Voc
40
r-r-r-
20
~5Voc
V"I =
~
-55 -55 -15 5 25 .j5 65 85 lOS 125
15
10
T. - TllIPERATURE (CC)
~
~
100
~
60
z
-"""1
i1
= 2k4
8
'"
,.,.~
20
30
100 loOk 10k lOOk 1.!I.t IIlM
'0
(Voel
Voltage Follower Pulse
Response
30
(Voel
120
0
10
20
Common-Mode
Rejection Ratio
....
RL = 20kll
V" - SUPPLY VOLTAGE
i -55CC-
V" - SUPPLY VOLTAGE
Open Loop Frequency
Response
Voltage Gain
T.
I 1
1 1 1
o
oed TO +125CC ~ I'--
1 - TA 1=
r-
160
~
~
~
10
v- POWER SUPPLY VOLTAGE (tvoel
i.o""
4
1
IVcu=OVoc
1 1 1
70
;
Supply Current
1 1
80
60
8
,.g;
..,
lk
10k
lOOk
1M
I - FREOUENCY (Hz)
I - FREOUENCY (Hz)
Voltage Follower Pulse
Response (Small Signal)
Large Signal Frequency
Response
4
20
RL2: 2.0k
5£
5
~
0 ...
3
~~
1
2
,!j
-
/
V"=15VoC"
J
\
'i1.
i
III
i 550~R-+-+-~~~~-1
:0 300 I-t+.p.o+-+--;o':~;';-Y
~
~
2
-
15
'"
~
5
5
~400
3
1
!450
,
0
250L-~~~~~~~
10
20
10k
0.1
~111~Y+~2~~_
Pfl
--..1-
OoOl l Y1O"lllll1 i;=+25cc -=;11
10
100
10+ - OUTPUT SOURCE CURREHT (mAocJ
0.001 0.01
10 -
0.1
1
lOOk
1M
f - FREQUENCY (Hz)
V" =+15V~
V" = +30Voc
1111,
1
lk
t - TIME (1'.)
Output Characteristics
Current Sinking
10 1=
"'j'§I"Il!§Fv+'~lI.':'mm;m
V' = +SVOC-s
0.1
0
012345678
30
t - TIME (ps)
0.01
10
10
100
OUTPUT SINK CURRENT (mAocJ
Current Limiting
90
1
i0
5
§
,
1 1
60
70
l-I60 - I -
50
40
30
....
~
-
1--
,-- - -
+
-r-.
20
:-..
~ 10
o
-55 -55 -15 5 25
.j5
65 85 105 125
T. - TEMPERATURE (CC)
TL/H/7767 -4
3-464
r-----------------------------------------------------------------------------,~
iii:
.....
Typical Performance Characteristics (Continued) (LM2902 only)
Input Current
.
.s
....
i
"iii:
~
1&0
~
1&
"~
&D
..
...'"
v
5
!!I
co
Voltage Gain
100
1
U1
!:;
>
~ r"'"T.· +2S'C
25
20
R L -201IO
U1
120
io""""
co
RL'2.~-
80
"iii:
40
~
~
Co)
I
J
~
10
I\)
~
iii:
.....
3D
10
v+ - SUPPLY VOLTAGE (VDCt
v+ -
2D
U1
co
3D
~
SUPPLY VOLTAGE tVDd
TL/H/7787-5
"iii:
~
I\)
U1
Application Hints
The LM158 series are op amps which operate with only a
single power supply voltage, have true-differential inputs,
and remain in the linear mode with an input common-mode
voltage of 0 Vee. These amplifiers operate over a wide
range of power supply voltage with little change in performance characteristics. At 25'C amplifier operation is possible
down to a minimum supply voltage of 2.3 Vee.
Capacitive loads which are applied directly to the output of
the amplifier reduce the loop stability margin. Values of 50
pF can be accomodated using the worst-case non-inverting
unity gain connection. Large closed loop gains or resistive
isolation should be used if larger load capacitance must be
driven by the amplifier.
The bias network of the LM158 establishes a drain current
which is independent of the magnitude of the power supply
voltage over the range of 3 Vee to 30 Vee.
Output short circuits either to ground or to the positive power supply should be of short time duration. Units can be
destroyed, not as a result of the short circuit current causing
metal fusing, but rather due to the large increase in IC chip
dissipation which will cause eventual failure due to excessive function temperatures. Putting direct short-circuits on
more than one amplifier at a time will increase the total IC
power dissipation to destructive levels, if not properly protected with external dissipation limiting resistors in series
with the output leads of the amplifiers. The larger value of
output source current which is available at 25'C provides a
larger output current capability at elevated temperatures
(see typical performance characteristics) than a standard IC
op amp.
The circuits presented in the section on typical applications
emphasize operation on only a single power supply voltage.
If complementary power supplies are available, all of the
standard op amp circuits can be used. In general, introducing a pseudo-ground (a bias voltage reference of V+ /2) will
allow operation above and below this value in single power
supply systems. Many application circuits are shown which
take advantage of the wide input common-mode voltage
range which includes ground. In most cases, input biasing is
not required and input voltages which range to ground can
easily be accommodated.
Precautions should be taken to insure that the power supply
for the integrated circuit never becomes reversed in polarity
or that the unit is not inadvertently installed backwards in a
test socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the
internal conductors and result in a destroyed unit.
Large differential input voltages can be easily accomodated
and, as input differential voltage protection diodes are not
needed, no large input currents result from large differential
input voltages. The differential input voltage may be larger
than V + without damaging the device. Protection should be
provided to prevent the input voltages from going negative.
more than -0.3 Vee (at 25'C). An input clamp diode with a
resistor to the IC input terminal can be used.
To reduce the power supply current drain, the amplifiers
have a class A output stage for small signal levels which
converts to class B in a large signal mode. This allows the
amplifiers to both source and sink large output currents.
Therefore both NPN and PNP external current boost transistors can be used to extend the power capability of the
basic amplifiers. The output voltage needs to raise approximately 1 diode drop above ground to bias the on-chip vertical PNP transistor for output current sinking applications.
For ac applications, where the load is capacitively coupled
to the output of the amplifier, a resistor should be used, from
the output of the amplifier to ground to increase the class A
bias current and prevent crossover distortion. Where the
load is directly coupled, as in dc applications, there is no
crossover distortion.
3-465
~
~
Co)
U1
;
"iii:
~
I\)
CD
CI
.j:a,
•
Typical Single-Supply Applications (V+
= 5.0 VOC)
Non-Inverting DC Gain (OV Input = OV Output)
+5V
>-"-O+Vo
RZ
GAIN = 1 + iii
RI
10k
'R not needed due to
temperature independent liN
= 101 (AS SHOWN)
V,N (mVI
TUH17787-6
TL/H/7787 -7
DC Summing Amplifier
(VIN'S ~ 0 Voc and Vo ~ 0 Voc)
Power Amplifier
R
Rl
lOOk
910k
+V,
+V2
R
lOOk
Vo
R
lOOk
+V3
+VIN
R
lOOk
Where: Vo
(V,
TL/H/7787 -8
=
+
V, + V2 + V3 + V4
V21 ;" (V3 + V'll to keep Vo
>
TL/H/7787-9
0 Vee
"BI-QUAD" RC Active Bandpass Filter
Rl
lOOk
Cl
330 pF '
RZ
lOOk
V,N
R5
470k
o-~N~+"-I
R3
lOOk
R6
470k
~
fO=lkHz
Q = 50
Av
= 100 (40 dB)
__~~-4'-------------+------OVo
R7
lOOk
~------~'-------------~~~~"'OV+
R8
lOOk
TL/H17787 -10
3-466
r-----------------------------------------------------------------------------,
Typical Single-Supply Applications (V+
= 5.0 Voe) (Continued)
Fixed Current Sources
~
r
3!:
I\)
c.n
~
Lamp Driver
!i:
Co)
R2
2V
r
....3!:c.n
c.n
CC)
.....
r
....3!:c.n
CC)
~
.....
r
TLIHI7787 -12
~
.....
r
Current Monitor
Rl·
lmA
12
IL
0.1
=
3!:
c.n
I\)
!5:
-
Co)
c.n
~
.....
r
(!!..R21 ) 11
TLIHI7787-11
3!:
LED Driver
I\)
CD
o
~
NSl1D2
Vo
= 1V(It.l
lA
-=
TLIHI7787-13
'(Increase RI for IL small)
R3
lk
VL';; V+ -2V
-
Driving TTL
TLIH17787 -14
Pulse Generator
-=
Rl
1M
IN914
R2
lOOk
lN914
o.oOl.F
TUH/7787 -15
P
Voltage Follower
Vo
:JLJ1.
R3
lOOk
V'
Vo
R4
lOOk
+VIN
-=
TLIH/7787 -17
3-467
TLIH17787 -16
~
C)
Q)
N
,---------------------------------------------------------------------------------,
Typical Single-Supply Applications
(V+ = 5.0 Vocl (Continued)
:::i
..J
~
Squarewave Oscillator
Pulse Generator
Rl
Rl
lOOk
LI)
C")
IN914
30k
:::E
..J
~
LI)
:Lrl1L
:::i
..J
....
~
LI)
.,..
J
R2
Va
N
150k":,
R3
lOOk
:l....
co
LI)
C")
TL/H/77B7 -1 B
R5
lOOk
":'
TL/H/77B7-19
:::E
..J
......
co
Low Drift Peak Detector
-
LI)
N
Is
:::i
..J
......
co
.,..
LI)
-
>-t....-ovo
:::i
..J
ZOUT
+
C
(POLYCARBONATE DR
POLYETHYLENE)
"'1"M
..L
':'
2N929"
"hi ~ AT 100 nA
HIGH ZIN
LOW loUT
Zis
~
R
1M
-
Is
INPUT CURRENT
COMPENSATION
TL/HI7787-20
High Compliance Current Sink
Comparator with Hysteresis
+VIN
Q------t
HI
>-t....OVo
10k
TL/H/77B7 -22
10
~
R.
1 amp/vall VIN
I
(Increase RE for 10 small)
':"
TLlH/nB7-21
3-468
r-----------------------------------------------------------------------------, r
Typical Single-Supply Applications
5:
....
(V+ = 5.0 VDCI" (Continued)
CI\
CD
.....
r
Voltage Controlled Oscillator (VCO)
5:
O.05,JF
N
CI\
CD
.....
r
R
lOOk
5:
Co)
CI\
CD
.....
r
+Vc*
5lk
....5:
>-1--0 OUTPUT 1
CI\
CD
»
.....
r
V·/2 5lk
R/2
50k
5:
N
CI\
'-----------+-0 OUTPUT 2
~r
10k
5:
Co)
CI\
TL/H/7787-23
'WIDE CONTROL VOLTAGE RANGE: 0 Vee:;; Ve :;; 2 (V+ -l.5Veel
;.....
r
5:
N
AC Coupled Inverting Amplifier
CQ
o
R,
lOOk
-
.j:>,
'1':
_
R2
lOOk
•
R3
lOOk
Cl
-=
Av
~
1\./\
V
R,
Ai"
R,
10k
(As shown, AV
~
1
3 Vpp
T
10)
10~FT
TLIH17787 -24
Ground Referencing a Differential Input Signal
R1
1M
>-1~OVo
v.
R
R3
1M
.VCM
•
.J\jM~-"'--JV\;,\~-"'"
TL/H17787 -25
3-469
~ .-----------------------------------------------------~--------------------------.
o
G)
N
Typical Single-Supply Applications
(V+ = 5.0 Vocl (Continued)
:&
....I
AC Coupled Non-Invel:l:lng Amplifier
~
R2
1M
Rl
lOOk
1.1)
C")
:&
1
....I
~
1.1)
' \ / ' 3Vpp
N
:&
T
C'N
,·f
....I
c(
fg
.,..
:&
....I
CD
1.1)
C")
R4
lOOk
"--+-JlNII-O
v+
RS
:&
lOOk
....
Av
=1+~
Av
= 11
Rl
(As Shown)
....I
CD
1.1)
TL/H/n87 -26
N
:&
DC Coupled Low-Pass RC Active Filter
....I
~
1.1)
Cl
.,..
O.01~F
::5
Rl
16k
> ..-oVo
'o~
fO=lkHz
Q
=1
Av
=
R4
lOOk
o
10
2
TL/H17787 -27
Bandpass Active Filter
Cl
O.01~F
Rl
390k
V,N
o-...J\NIr"""-"-I
R3
620k'
fO=lkHz
Q = 25
C3
RS
10~FJ
lOOk
V+
TUH/n87-28
3-470
r-
Typical Single-Supply Applications
.....
==
(V+ = 5.0 VDcl (Continued)
CI1
....
rCO
High Input Z, DC Differential Amplifier
==
RZ
N
CI1
lOOk
CO
....
r-
R4
lOOk
==
CI1
Co)
CO
....
r-
.....
==
CI1
>"-0 Va
+V,Q-----t
!i:
....
r-
+V2o----------------------------------------------~
~ _ ~ (CMRR depends on this
For R2 - R3 rasislor rallo match)
Vo
~ 1+~
R3
As Shown: Va
TLIH17787 -29
CO
J>
....
r-
(V2 - V,)
~
==
N
CI1
2 (V2 - V,)
==
CI1
Co)
Photo Voltaic-Ceil Amplifier
Bridge Current Amplifier
!i:
....
r-
R,
1M
R,
==
N
CO
ICElL
o
~
.j:>.
>-...-0 Va
>-...-oVo
(CELL HAS OV
ACROSS IT)
For8«landR,»R
TL/H17787 -30
Va'" VREF
("28) RR,
TL/H17787 -33
High Input Z Adjustable-Gain
DC Instrumentation Amplifier
Rl
lOOk
R3
R4
lOOk
lOOk
•
+v,
>-+-OVo
R6
lOOk
R7
lOOk
+V2
TLlH17787-31
If Rl
~
R5 & R3
~
R4
Va
~
~
1
R6
+
As shown Va
~
R7 (CMRR depends on match)
2Rl (V2 - V,)
R2
~ 101 (V2 - V,)
3-471
~
ro
r---------------------------------------------------------------------------------,
Typical Single-Supply Applications (V+
:::E
= 5.0 VDC)(Continued)
Using Symmetrical Amplifiers to
Reduce Input Current (General Concept)
...I
......
~
Ln
CO)
:::E
...I
~Ln
N
:5
~
f8
.....
liN
.V,N 0--41....---1
:::E
...I
......
IX)
Ln
CO)
:::E
...I
......
IX)
Ln
N
:E
...I
;0
Ln
.....
:E
...I
R
1.5M
-
I.
TLlH17787-32
Schematic Diagram (Each Amplifier)
v·
TLlH17787 -3
3-472
~National
~ Semiconductor
LM392/LM2924
Low Power Operational Amplifier/Voltage Comparator
General Description
Features
The LM392 series consists of 2 independent building block
circuits. One is a high gain, internally frequency compensated operational amplifier, and the other is a precision voltage
comparator. Both the operational amplifier and the voltage
comparator have been specifically designed to operate from
a single power supply over a wide range of voltages. Both
circuits have input stages which will common-mode input
down to ground when operating from a single power supply.
Operation from split power supplies is also possible and the
low power supply current is independent of the magnitude
of the supply voltage.
• Wide power supply voltage range
3Vt032V
Single supply
±1.5Vto ±16V
Dual supply
• Low supply current drain-essentially independent of
600 p.A
supply voltage
• Low input biasing current
50 nA
• Low input offset voltage
2 mV
• Low input offset current
5 nA
• Input common-mode voltage range includes ground
• Differential input voltage range equal to the power supply voltage
Application areas include transducer amplifier with pulse
shaper, DC gain block with level detector, VCO, as well as
all conventional operational amplifier or voltage comparator
circuits. Both circuits can be operated directly from the standard 5 VDC power supply voltage used in digital systems,
and the output of the comparator will interface directly with
either TIL or CMOS logic. In addition, the low power drain
makes the LM392 extremely useful in the deSign of portable
equipment.
ADDITIONAL OP AMP FEATURES
Internally frequency compensated for unity gain
100 dB
• Large DC voltage gain
1 MHz
• Wide bandwidth (unity gain)
OV to V+ - 1.5V
• Large output voltage swing
II
ADDITIONAL COMPARATOR FEATURES
• Low output saturation voltage
250 mV at 4 mA
II Output voltage compatible with all types of logic systems
Advantages
• Eliminates need for dual power supplies
II An internally compensated op amp and a precision
comparator in the same package
• Allows sensing at or near ground
• Power drain suitable for battery operation
• Pin-out is the same as both the LM358 dual op amp
and the LM393 dual comparator
Connection Diagram
(Top View)
(Amplifier A = Comparator)
(Amplifier B = Operational Amplifier)
•
Dual-In-Line Package
OUTPUT A
I
'-'"
(COMPARATORi~ ~
INVERTING INPUT A.2.
NON·INVERTING
INPUT A
3
8
~ ~ y+
~L
1
/A\:!7B\
-
+
+
7
OUTPUT B
(OP AMP)
~ INVERTING INPUT B
IrIL-_
+-__.J
GND ___4
TUH/7793-1
Order Number LM2924J
See NS Package Number J08A
Order Number LM392M
See NS Package Number M08A
Order Number LM392N or LM2924N
See NS Package Number N08E
3-473
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
LM2924
LM392
26Vor ±13V
Supply Voltage, V+
32Vor ±16V
32V
26V
-0.3V to +32V
-0.3Vto +26V
820mW
530mW
820mW
530mW
Output Short-Circuit to Ground (Note 2)
Continuous
Continuous
Input Current (VIN < - 0.3 VDcl (Note 3)
Operating Temperature Range
LM392
50mA
50mA
Differential Input Voltage
Input Voltage
Power Dissipation (Note 1)
Molded DIP (LM392N, LM2924N)
Small Outline Package
Storage Temperature Range
O'Cto +70'C
-40'Cto +85'C
- 65'C to + 150'C
-65'C to + 150'C
260'C
260'C
260'C
260'C
215'C
220'C
215'C
220'C
Lead Temperature (Soldering, 10 seconds)
ESD rating to be determined.
Soldering Information
Dual-in-Line Package
Soldering (10 seconds)
Small Outline Package
Vapor Phase (60 seconds)
Infrared (15 seconds)
See AN-450 "Surface Mounting Methods and Their Effect on Product Reliability" for other methods of soldering
surface mount devices.
Electrical Characteristics (V+ =
5 VDC; specifications apply to both amplifiers unless otherwise stated)
(Note 4)
Parameter
Min
= 25'C, (Note 5)
Input Offset Voltage
TA
Input Bias Current
IN(+) or IN(-), TA = 25'C,
(Note 6), VCM = OV
Input Offset Current
= 25'C
V+ = 30VDC, TA = 25'C,
Input Common-Mode Voltage
Range
Supply Current
Supply Current
Amplifier-to-Amplifier Coupling
LM2924
LM392
Conditions
IN(+) - IN(-), TA
(Note 7) (LM2924,
V+ = 26VDcl
Typ
Max
±2
±5
= 30V,
= 26V)
RL = 00, V+ = 5V
f = 1 kHz to 20 kHz,
T A = 25'C, Input Referred,
Units
Typ
Max
±2
±7
mV
50
250
50
250
nA
±5
±50
±5
±50
nA
V+ -1.5
V
V+-1.5
0
RL = 00, V+
(LM2924, V+
Min
0
1
2
1
2
mA
0.5
1
0.5
1
mA
-100
-100
dB
(Note 8)
Input Offset Voltage
(Note 5)
±7
±7
mV
Input Bias Current
IN(+) or IN(-)
400
500
nA
Input Offset Current
IN(+) - IN(-)
150
200
nA
Input Common-Mode Voltage
Range
V+ = 30 VDC, (Note 7)
(LM2924, V+ = 26 VDcl
V+-2
V
Differential Input Voltage
Keep All VIN'S 2 0 VDC
(orV-, if Used), (Note 9)
26
V
V+-2
0
0
32
OPAMPONLY
Large Signal Voltage Gain
V+ = 15 VDC, Vo swing
1 VDCto 11 VDC,
RL = 2 kO, TA = 25'C
=
25
3-474
100
25
100
V/mV
Electrical Characteristics (V+ = 5 Voc; specifications apply to both amplifiers unless otherwise stated)
(Note 4) (Continued)
Parameter
LM2924
LM392
Conditions
Min
Typ
Max
Min
V+-1.5
0
Typ
Units
Max
OP AMP ONLY
Output Voltage Swing
RL = 2 kO. TA = 25'C.
(LM2924. RL:2! 10 kO)
0
Common-Mode Rejection
Ratio
DC. TA = 25'C. VCM =
OVoctoV+-1.5Voc
65
70
50
70
dB
65
100
50
100
dB
=
20
40
20
40
mA
=
10
20
10
20
mA
12
50
12
50
p.A
=
Power Supply Rejection Ratio
DC. TA
Output Current Source
VIN(+) = 1 VOC.
VIN(-) = OVOC.
V+ = 15Voc. Vo
2VOC. TA = 25'C
Output Current Sink
25'C
VIN(-) = 1 VOC.
VIN(+) = OVOC.
V+ = 15Voc. Vo
2VOC. TA = 25'C
VIN(-) = 1 VOC.
VIN(+) = 0 VOC.
V+ = 15Voc. Vo =
200 mY. TA = 25'C
Input Offset Voltage Drift
Rs
Input Offset Current Drift
Rs
= 00
= 00
V+-1.5
V
7
7
p.V/'C
10
10
pAOCI'C
100
V/mV
COMPARATOR ONLY
=
Voltage Gain
RL:2! 15kO.V+
TA = 25'C
Large Signal Response Time
VIN = TTL Logic Swing.
VREF = 1.4 VOC
VRL = 5VOC. RL = 5.1 kO.
TA = 25'C
300
300
ns
Response Time
VRL = 5 Voc. RL = 5.1 kO.
TA = 25'C. (Note 10)
1.3
1.5
p.s
Output Sink Current
VIN(-) = 1 VOC.
VIN(+) = OVOC.
Vo:2! 1.5Voc. TA
16
mA
= 25'C
VIN(-) :2! 1 VOC.
VIN(+) = O.
ISINK ,;;; 4 mAo TA
= 25'C
Saturation Voltage
15Voc.
50
6
200
16
250
VIN(-) :2! 1 VOc.
VIN(+) = O.
ISINK';;; 4mA
Output Leakage Current
VIN(-) = O.
VIN(+) :2! 1 VOc.
Vo = 5 VOc. TA = 25'C
25
0.1
6
400
400
mV
700
700
mV
0.1
nA
VIN(-) = O.
1.0
1.0
p.A
VIN(+) :2! 1 VOc.
Vo = 30VOC
Note 1: For operating at temperatures above 2S'C. the LM392 and the LM2924 must be derated based on a 12S'C maximum junction temperature and a thermal
resistance of 12'Z'C/W which applies for the device soldered in a printed circuit board, operating in still air ambient The dissipation is the total of both amplifiersuse external resistors. where pOSSible, to allow the amplifier to saturate or to reduce the power which is dissipated in the integrated circuit.
Note 2: Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output
current is approximately 40 mA for the op amp and 30 mA for the comparator independent of the magnitude of V+. At values of supply voltage in excess of ISV,
continuous short circuits can exceed the power disSipation ratings and cause eventual destruction.
Note 3: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP
transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasnic transistor action
on the IC chip. this transistor action can cause the output voltages of the amplifiers to go to the V+ voltage level (or to ground for a large overdrive) for the time
duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns
to a value greater than - 0.3V (at 2S·C).
3-475
Note 4: These specifications apply for V+ = 5V, unless otherwise stated. For the LM392, temperature specifications are limited to O·C ,;; TA ,;;
the LM2924 temperature specifications are limited to -40"C ,;; TA ,;; + 85·C.
Note 5: At output switch pOint, Vo .. I.4V, Rs
= Oil with V+
+ 7rJ'C and
from 5V to 30V; and over the full input common-mode range (OV to V+ - 1.5V).
Note 6: The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, Independent of the state of the output
so no loading change exists on the input lines.
Note 7: The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of the
common-mode voltage range is V+ - 1.5V, but either or both inputs can go to 32V without damage (26V for LM2924).
Note 8: Due to proximity of exiernal components, insure that coupling is not originating via the stray capacitance between these external parts. This typically
can be detected as this type of capac~ive increases at higher frequencies.
Note 9: Positive excursions of input voltage may exceed the power supply level. As long as the other input voltage remains within the common-mode range,
the comparator will provide a proper output state. The input voltage to the op amp should not exceed the power supply level. The input voltage state must not
be less than - 0.3V (or 0.3V below the magnitude of the negative power supply, if used) on either amplmer.
Note 10: The response time specified is for a 100 mV input step ~h 5 mV overdrive. For larger overdrive signals 300 ns can be obtained.
Schematic Diagram
+INPUT
Comparator A
AmplifierB
TL/H/7793-2
Application Hints
Please refer to the application hints section of the LM193 and the LM158 datasheets.
3-476
~National
~ Semiconductor
LM359 Dual, High Speed, Programmable,
Current Mode (Norton) Amplifiers
General Description
Features
The LM359 consists of two current differencing (Norton) input amplifiers. Design emphasis has been placed on obtaining high frequency performance and providing user programmable amplifier operating characteristics. Each amplifier is broadbanded to provide a high gain bandwidth product,
fast slew rate and stable operation for an inverting closed
loop gain of 10 or greater. Pins for additional external frequency compensation are provided. The amplifiers are designed to operate from a Single supply and can accommodate input common-mode voltages greater than the supply.
Applications
•
•
•
•
•
General purpose video amplifiers
High frequency, high Q active filters
Photo-diode amplifiers
Wide frequency range waveform generation circuits
All LM3900 AC applications work to much higher
frequencies
Typical Application
• User programmable gain bandwidth product, slew rate,
input bias current, output stage biasing current and total
device power dissipation
• High gain bandwidth product (lSET = 0.5 mAl
400 MHz for Av = 10 to 100
30 MHz for Av = 1
• High slew rate (ISET = 0.5 mAl
60 V/p.s for Av = 10 to 100
30 V/p.s for Av = 1
• Current differencing inputs allow high common-mode
input voltages
. • Operates from a single 5V to 22V supply
• Large inverting amplifier output swing, 2 mV to
Vee - 2V
• Low spot noise, 6 nV 1,fHz, for f > 1 kHz
Connection Diagram
0.6 pF
Dual-In-Une Package
ISET(OUT)-I--.....;.
O.OlpF
,,~~+
COMPB
VOUTA
COMPA
GND A -rz.-"""..:.r......t..z:""""--y-- GND B
NC
>~a-O·OUT
....-+-IIN(+)B
IINHA
20k
IIN(+)A-t--..
12Vo--,\M_"
...._ - 1 - ISET(lN)
20k
Tl/H/7788-2
Top View
TL/H17788-1
oAV=20dB
o -3 dB bandwidth
=
2.5 Hz to 25 MHz
o Differential phase error
o Differential gain error
< I' at 3.58 MHz
< 0.5% at 3.58 MHz
3-477
Order Number LM359J, LM359M or LM359N
See NS Package Number J14A, M14A or N14A
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
Input Currents, I,N( + ) or I,N( -)
22Voc
or ±11 Voc
Power Dissipation (Note 1)
J Package
NPackage
1W
750mW
MaximumTJ
J Package
N Package
+ 150·C
+ 125·C
Storage Temperature Range
8jA
100"C/W still air
75·C/W with 400 linear feet/min air flow
260·C
215·C
220·C
ESD rating to be determined.
Electrical Characteristics ISET(IN) =
Parameter
ISET(OUT) = 0.5 mA, Vsupply = 12V, TA = 25·C unless otherwise noted
LM359
Conditions
Open Loop Voltage
Gain
Vsupply = 12V, RL = 1k, f = 100 Hz
TA = 125·C
Bandwidth
Unity Gain
R'N = 1 kO, Ccomp = 10 pF
Gain Bandwidth Product
Gain of 10 to 100
R'N = 500 to 2000
100 Hz to 100 kHz, RL
=
Amplifier to Amplifier
Coupling
f
Mirror Gain
(Note 2)
at 2 mA I,N( +), ISET = 5 /LA, T A
at 0.2 mA I,N( +), ISET = 5 /LA
Over Temp.
at 20 p.A I,N( +), ISET = 5 /LA
Over Temp.
Typ
62
72
68
dB
dB
15
30
MHz
200
400
MHz
30
60
V//Ls
V//Ls
-80
dB
1k
AMirror Gain
(Note 2)
at 20 /LA to 0.2 mA I,N( + )
OverTemp,lsET = 5/LA
Input Bias Current
Inverting Input, T A = 25·C
Over Temp.
=
25·C
Units
Min
R'N = 1 kO, Ccomp = 10 pF
R'N < 2000
=
260"C
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
N Package
Slew Rate
Unity Gain
Gain of 10 to 100
O"Cto +70"C
-65·Cto + 150·C
Soldering Information
Dual-In-Line Package
Soldering (10 sec.)
Small Outline Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
J Package
14rC/w still air
110"C/W with 400 linear feet/min air flow
2mAoc
Lead Temperature (Soldering, 10 sec.)
Thermal Resistance
8jA
1OmAoc
Set Currents, ISET(IN) or ISET(OUT)
Operating Temperature Range
LM359
Max
0.9
1.0
1.1
/LAI/LA
0.9
1.0
1.1
p-Alp-A
0.9
1.0
1.1
p-Alp-A
3
5
%
8
15
30
p-A
p-A
Input Resistance (pre)
Inverting Input
2.5
kO
Output Resistance
lOUT = 15 mA rms, f = 1 MHz
3.5
0
Output Voltage Swing
VOUTHigh
VOUTLow
RL = 6000
I,N( -) and I,N( + ) Grounded
I'N(-) = 100 /LA,I'N(+) = 0
Output Currents
Source
Sink (Linear Region)
Sink (Overdriven)
Supply Current
I,N( -) and I,N( + ) Grounded, RL = 1000
Vcom)-0.5V = VOUT = tV,I'N(+) = 0
I'N(- = 100/LA,I,N(+) = 0,
VOUT Force = tV
Non-Inverting Input
Grounded, RL = 00
9.5
10.3
2
50
V
mV
16
40
4.7
mA
mA
1.5
3
mA
18.5
22
mA
Power Supply Rejectjon
f = 120 Hz, I,N( + ) Grounded
40
50
dB
(Note 3)
Note 1: See Maximum Power Dissipation graph.
Note 2: Mirror gain is the current gain 01 the current mirror which is used as the non.inverting input (AI ~ IIN( - ~) 6Mirror Gain is the % change in AI lor two
different mirror currents at any given temperature.
IIN( +
Note 3: See Supply Rejection graphs.
3-478
Schematic Diagram
0lIii!
;
z
j j
2;
.
i
;;;
3·479
Typical Performance Characteristics
Open Loop Gain
10
70
..
ii
s
Open Loop Gain
Open Loop Gain
80
I----:j::::;~~~f#-I-~
70
10
ii
s
60 1-+-+---1ffi~~~-!--l
ii
...
..~
C
50
50 I-+--+-~~~~I-l---l
:!;
40
40 I-+-+--ll'ffi~
S
30
30 I-+-+---t.~
co
~
TA "25~C
Rt "10k!'!
V+~ lZV
fo '" kHz
20
10
o
100
90
s
z
C
~
S
20
10
-75 -50 -25 0
1.0
D.l
25' 50
IW~I_I,I~I~
70
RL -100ll
60
1IIIIil
50
1IIIIil
40
11111111
30
TA' 2~!~11I
'SET" 0.5 mA
20
10
o ~r,~.'~Y"""
o '--'-...L-.....
0.01
111I1lJ1I1II
80
75 100 125
100
1k
10k
TEMPERATURE rCI
SET CURRENT (mAl
tOOk
1M
1DM 100M
FREQUENCV (Hoi
Note: Shaded area refers to LM359
Gain Bandwidth Product
Gain and Phase
Feedback Gain = -100
Slew Rate
1000
=
100
i
~
""
if
...'"
"i§
./
..
100
z
;;:
~
TA' 25"C
~
'o·,0MHz
R,N' 50ll
GAIN" 100
V
10
0.01
1
0.01
1.0
0.1
0.1
Inverting Input Bias Current
10
10
3
TA'25'C
0.1
1.0
10
100
Mirror Gain
1.00
.
:
iii 0.911
TA-25'C
AI" IINH
I
&
C
I----
IIN(+)
IIN(+)" Z mADe + 200jJAp-p
TA" 25'C
Y+"'2V
POSI,~!VE
I-R,-100n
INPUT AT GND
0.1
O~~--~--~~~~
-75 -50 -25 0
1.0
-10
-90
'"~
8
0.1
0.01
-30
20
18 I-+-+-t~~
12 f--'~+~~
10
1.0
~m
rl
FREQUENCV (MHoi
I : 1---+--+--1~
./
~O
"
o
1.0
Inverting Input Bias Current
C
90
&0
f:s
r-
SET CURRENT (mAl
SET CURRENT (mAl
IL
30
20
TA "25"C
GAIN --10
.IYOUT' 2V
/
120
r=
rr=
:-
GAIN
40
180
150
~
50
,/
..
.
::..
:-
-10
~
25
0.80
100
50 75 100 125
lk
10k
1M
lOOk
10M
FREQUENCV (Hzl
TEMPERATURE (OC)
SET CURRENT (mAl
j---
I----
+---
Nota: Shaded area refers to LM359
Mirror Gain
Mirror Current
Mirror Gain
10
.
'"C
co
co
co
"
2
I
C
1.00
0.98
0.8&
0.94
0.92
1.00
..
."
!
z
.~~
....
C
2
Uti
0.B8
0.1&
0.94
0.82
0.10
-75 -50 -25
0.80
TA-2S'C
"W-l
AI" ijNl+f
I
C
0.80
0
25
50 75 100 125
TEMPERATURE ('CI
2
V"'2V
'SET-5pA
0.1
1
o L.:.:"-~"","~~:J--'-.J
1.0
"N' - MIRROR CURRENT (mAl
10
-75 -50 -25
0
25
50
75 100 125
TEMPERATURE rCI
TLlH17788-4
Note: Shaded area refers to LM359
Nota: Shaded area refers to LM359
3-480
Typical Performance Characteristics
.-3:
(Continued)
~
U'I
CD
Supply Current
100
..
oS
~
aD
;
60
:J
:J
40
~
~
~
IC
1.0
F
I-0.1
~
TA' 25°C
IC
20
V+ = 12VOC + 0.11 Vrms
'0= 1kHz
POSlmE INPUT AT GNO
POSITIVE INPUT AT GNo
0.01
0.1
0.1
0.01
\
/
o
0.1
100
1.0
lk
SET CURRENT ImAI
!!l
"'"....
~
10k lOOk
1M
"-
~
-30
-40
~
.
,."'"
.
w
-50
!:;
-60
-70
III
;S
-Bo
-90
iii....
1.0
"
I!:
""
0.1
lk
40
10k
10M
lOOk
1100
;: 1000
900 1-'-1=+""-17
aDO
700
600
500
IC
400
300
200
100
0
-75 -50 -25 o 25
1M
10M
.
ISET" 0.5mA
R,=360n
35
:s
"~
i3
"
30
25
20
15
10
~
0
1M
1M
FREQUENCY IHzl
MIRROR OFF••VBE BIASING
100k
lOOk
0.01
TA" 25°C
10k
10
10M 100M
V+ = 12V
-20
1.
10k
Noise Voltage
-10
8"
..
FREQUENCV IHzl
Amplifier to Amplifier
Coupling (Input Referred)
'"..
\
\
TA = 25°C
GAIN =-10
VSUPPL V" '6V
RL" lkYO GNo
'SET" 0.5 mA
"
0.01
'"'"
:;:'"
w
u
....
0.1
lk
FREQUENCY IHzl
10
/
~
100
100
;;;
a;
10
Output Swing
i/
1.0
POSITIVE INPUT AT GNo
0
1.0
12
TA=2S0C
GAIN = 10
VOUT = VCOMP - 0.5V" IV
V"t;: tZV
....
ill
IC
TA = 25°C
SET CURRENT ImAI
10
oS
20
V+ '" 12VDC + 0.11 Vrms
o '---'-...............u..u.._"--'L...L..L.1.LL.U
1.0
Output Sink Current
..~
~
TA""ZS C
V+,-12V
SET CURRENT (mAl
..
a;
'";;
~
IC
i:l
i
1=9"=rl'Tlfltir=";:::ft+~
60
;;
10
10
100
FREQUENCY (Hz)
Ik
10k
lOOk
1M
10M
50 15 100 125
TEMPERATURE I'CI
Note: Shaded area refers 10 LM359J/LM359N
.
TUH/7788-5
FREQUENCY (Hzl
Application Hints
The LM359 consists of two wide bandwidth, decompensated current differencing (Norton) amplifiers. Although similar
in operation to the original LM3900, design emphasis for
these amplifiers has been placed on obtaining much higher
frequency performance as illustrated in Figure 1.
This significant improvement in frequency response is the
result of using a common-emitter/common-base (cascode)
gain stage which is typical in many discrete and integrated
video and RF circuit designs. Another versatile aspect of
these amplifiers is the ability to externally program many
internal amplifier parameters to suit the requirements of a
wide variety of applications in which this type of amplifier
can be used.
120
100
60
r
LFJS7
1\
'\.
I\.lM359
lM3900 '\
40
20
o
1..\
'\
\.\ " \.
'\.\
\
10 100 lk 10k lOOk 1M 10M 100M lG
FREQUENCY (Hzl
TUH/7788-6
FIGURE 1
3-481
Application Hints (Continued)
R,
DC BIASING
The LM359 is intended for single supply voltage operation
which requires DC biasing of the output. The current mirror
circuitry which provides the non-inverting input for the amplifier also facilitates DC biasing the output. The basic operation of this current mirror is that the current (both DC and
AC) flowing into the non-inverting input will force an equal ,
amount of current to flow into the inverting input. The mirror
gain (AI) specification is the measure of how closely these
two currents match. For more details see National Application Note AN-72.
>_t-ovo
DC biasing of the output is accomplished by establishing a
reference DC current into the (+) input, IIN( +), and requiring the output to provide the (-) input current. This forces
the output DC level to be whatever value necessary (within
the output voltage swing of the amplifier) to provide this DC
reference current, Figure 2.
TLlH/7788-9
-
R,
FIGURE 4. Biasing a Non-Inverting AC Amplifier
IFB
R,
>~""ovo
>_""0 Yo
vo(DC) = VeE( -) + IFe R,
IFe
=
TL/H/7788-7
AV'AC)
\'
I,N(+) AI + Ib(-)
IIN(+) = v+ - VeE(+)
Rb
'b( -) is the inverting input bias current
= -!!
Rs
VO(DC) = VeE(-)
-
(1
+
:~)
TLlH17788-10
+ Ib('-)R,
FIGURE 5. nVBE Blasing
FIGURE 2
The nVeE biasing configuration is most useful for low noise
applications where a reduced input impedance can be accommodated (see typical applications section).
The DC input voltage at each input is a transistor VeE
('" 0.6 Voc) and must be considered for DC biasing. For
most applications, the supply voltage, V+, is suitable and
convenient for establishing IIN( +). The inverting input bias
current, Ib( -), is a direct function of the program'mable input
stage current (see current programmability section) and to
obtain predictable output DC biasing set IIN(+) ~ 10Ib(-)'
OPERATING CURRENT PROGRAMMABILITY (ISET)
The input bias current, slew rate, gain bandwidth product,
output drive capability and total device power consumption
of both amplifiers can be simultaneously controlled and optimized via the two programming pins ISET(OUT) and ISET(IN)'
The following figures illustrate typical biasing schemes for
AC amplifiers using the LM359:
ISET(OUn
The output set current (\SET(OUT») is equal to the amount of
current sourced from pin 1 and establishes the class A biasing current for the Darlington emitter follower output stage.
Using a single resistor from pin 1 to ground, as shown in
Figure 6, this current is equal to:
H,
y+
>-.4....0 Yo
I
SET(Oun
TL/H/7788-8
v+ - VeE
= RSET(Oun + 5000
FIGURE 3. Blasing an Inverting AC Amplifier
TL/H/7788-11
FIGURE 6. Establishing the Output Set Current
3-482
Application Hints (Continued)
ture of 25°C is assumed (KT/q = 26 mV and fJtyp = 150).
ISET(IN) also controls the DC input bias current by the expression:
The output set current can be adjusted to optimize the
amount of current the output of the amplifier can sink to
drive load capacitance and for loads connected to V+. The
maximum output sinking CUffent is approximately 10 times
ISET(OUT}' This set current is best used to reduce the total
device supply current if the amplifiers are not required to
drive small load impedances.
Ib(-)
= 31SET "" ISET for NPN fJ = 150
fJ
50
which is important for DC biasing considerations.
The total device supply current (for both amplifiers) is also a
direct function of the set currents and can be approximated
by:
ISET(IN)
The input set current ISET(lN) is equal to the current flowing
into pin 8. A resistor from pin 8 to V+ sets this current to be:
Isupply "" 27 x ISET(OUT) + 11 X ISET(IN)
with each set current programmed by individual resistors.
v,
PROGRAMMING WITH A SINGLE RESISTOR
ISET(IN)
Operating current programming may also be accomplished
using only one resistor by letting ISET(IN) equal ISET(OUT)'
The programming current is now referred to as ISET and it is
created by connecting a resistor from pin 1 to pin 8 (Figure
8).
v+ - vee
= RSET(IN) + 5000
V+ - 2 VeE
ISET = R
where VeE'" 0.6V
SET + 1 kO
v+
TLlH/n88-12
FIGURE 7. Establishing the Input Set Current
ISET(lN) is most significant in controlling the AC characteris·
tics of the LM359 as it directly sets the total input stage
current of the amplifiers which determines the maximum
slew rate, the frequency of the open loop dominant pole, the
input resistance of the (-) input and the biasing current
Ib( -). All of these parameters are significant in wide band
amplifier design. The input stage current is approximately 3
times ISET(IN) and by using this relationship the following
first order approximations for these AC parameters are:
TL/H17788-13
ISET(IN) = ISET(OUl) = ISET
FIGURE 8. Single Resistor Programming of ISET
This configuration does not affect any of the internal set
current dependent parameters differently than previously
discussed except the total supply current which is now
equal to:
Sr(MAX) = max slew rate "" 31SEcilNl (10- 6) (V/p,s)
comp
frequency of '"
3 ISET(lN)
(Hz)
dominant pole
2'7T Ccomp AVOL (0.026V)
Isupply '" 37 X ISET
Care must be taken when using resistors to program the set
current to prevent significantly increasing the supply voltage
above the value used to determine the set current. This
would cause an increase in total supply current due to the
resulting increase in set current and the maximum device
power dissipation could be exceeded. The set resistor value(s) should be adjusted for the new supply voltage .
..
150 (0.026V)
Input resistance = fJre ""
I
(0)
,
,3 SET(IN)
where Ccomp is the total capaCitance from the compensation pin (pin 3 or pin 13) to ground, AVOL is the low frequency open loop voltage gain in VIV and an ambient tempera-
•
3-483
Application Hints (Continued)
One method to avoid this is to use an adjustable current
source which has voltage compliance to generate the set
current as shown in Figure 9.
COMPENSATION
The LM359 is internally compensated for stability with
closed loop inverting gains of 10 or more. For an inverting
gain of less than 10 and all non-inverting amplifiers (the
amplifier always has 100% negative current feedback regardless of the gain in the non-inverting configuration) some
external frequency compensation is required because the
stray capacitance to ground from the (-) input and the
feedback resistor add additional lagging phase within the
feedback loop. The value of the input capacitance will typically be in the range of 6 pF to 10 pF for a reasonably
constructed circuit board. When using a feedback resistance of 30 kn or less, the best method of compensation,
without sacrificing slew rate, is to add a lead capacitor in
parallel with the feedback resistor with a value on the order
of 1 pF to 5 pF as shown in Figure 10.
v+
RSET
ISET
= 67.7 mV @2S'C
TLfH17788-14
RSET
FIGURE 9. Current Source Programming of ISET
This circuit allows ISET to remain constant over the entire
supply voltage range of the LM359 which also improves
power supply ripple rejection as illustrated in the Typical
Performance Characteristics. It should be noted, however,
that the current through the LM334 as shown will change
linearly with temperature but this can be compensated for
(see LM334 data sheet).
c,
Pin 1 must never be shorted to ground or pin 8 never shorted to V + without limiting the current to 2 rnA or less to
prevent catastrophic device failure.
>~"""O'OUT
CONSIDERATIONS FOR HIGH FREQUENCY
OPERATION
The LM359 is intended for use in relatively high frequency
applications and many factors external to the amplifier itself
must be considered. Minimization of stray capacitances and
their effect on circuit operation are the primary requirements. The following list contains some general guidelines
to help accomplish this end:
c, =
1 pF to 5 pF for stability
TL/H/n88-15
1. Keep the leads of all external components as short as
possible.
FIGURE 10. Best Method of Compensation
Another method of compensation is to increase the effective value of the internal compensation capacitor by adding
capaCitance from the COMP pin of an amplifier to ground.
An external 20 pF capaCitor will generally compensate for
all gain settings bLit· will also reduce the gain bandwidth
product and the slew rate. These same results can also be
obtained by reducing ISET(IN) if the full capabilities of the
amplifier are not required. This method is termed over-compensation.
Another area of concern from a stability standpoint is that of
capacitive loading. The amplifier will generally drive capacitive loads up to 100 pF without oscillation problems. Any
larger C loads can be isolated from the output as shown in
Figure 11. Over-compensation of the amplifier can also be
used if the corresponding reduction of the GBW product can
be afforded.
2. Place components conducting signal current from the
output of an amplifier away from that amplifier'S non-inverting input.
3. Use reasonably low value resistances for gain setting and
biasing.
4. Use of a ground plane is helpful in providing a shielding
effect between the inputs and from input to output. Avoid
using vector boards.
5. Use a single-point ground and single-point supply distribution to minimize crosstalk. Always connect the two
grounds (one from each amplifier) together.
6. Avoid use of long wires (> 2 ") but if necessary, use
shielded wire.
7. Bypass the supply close to the device with a low inductance, low value capacitor (typically a 0.01 ",F ceramic) to
create a good high frequency ground. If long supply leads
are unavoidable, a small resistor (-10.0) in series with
the bypass capacitor may be needed and using shielded
wire for the supply leads is also recommended.
TLlHI77BB-16
FIGURE 11. Isolating Large Capacitive Loads
3-484
,---------------------------------------------------------------------------------, r-
3:
Co)
Application Hints (Continued)
In most applications using the LM359, the input signal will
be AC coupled so as not to affect the DC biasing of the
amplifier. This gives rise to another subtlety of high frequency circuits which is the effective series inductance (ESL) of
the coupling capacitor which creates an increase in the impedance of the capacitor at high frequencies and can cause
an unexpected gain reduction. Low ESL capacitors like solid
tantalum for large values of C and ceramic for smaller values are recommended. A parallel combination of the two
types is even better for gain accuracy over a wide frequency
range.
3. Determine maximum value for Rt to provide stable DC
biasing
3 ISET _ 100 J.LA minimum DC
It(MIN) ?; 10 X -fj-- feedback current
Optimum output DC level for maximum symmetrical swing
without clipping is:
VODC(opt)
Rt(MAX) can now be found:
5.W - 0.6V
=
= 45 kl1
It(MIN)
100 J.LA
This value should not be exceeded for predictable DC
biasing.
4. Select Rs to be large enough so as not to appreciably
load the input termination resistance:
Rs ?; 75011 Let Rs = 75011
Rt(MAX) =
Rt
Av = - Rs so; Rt = 10 Rs = 7.5 kl1
7.5 kl1 is less than the calculated Rt(MAX) so DC predictability is insured.
1. Basic circuit configuration:
6. Since Rt = 7.5k, for the output to be biased to 5.1 VOC,
the reference current IIN(+) must be:
5.W - VBE(-)
5.1V - 0.6V
A
IIN( +) =
=
= 600 J.L
Rt
7.5 kl1
12V
Now Rb can be found by:
V+ - VBE(+)
12 - 0.6
Rb =
= - - - = 19 kl1
IIN( +)
600 J.LA
7. Select Cj to provide the proper gain for the 8 Hz minimum
input frequency:
1
1
Cj?;
=
= 26 J.LF
27r Rs (flow)
27r (75011) (8 Hz)
A larger value of Cj will allow a flat frequency response
down to 8 Hz and a 0.01 J.LF ceramic capacitor in parallel
with Cj will maintain high frequency gain accuracy.
8. Test for peaking of the frequency response and add a
feedback "lead" capacitor to compensate if necessary.
o-r1
175
VODC(opt) - VBE(-)
5. Select Rt for appropriate gain:
AN INVERTING VIDEO AMPLIFIER
IN
Vo(MAX) - Vo(MIN)
2
+ Vo(MIN)
"" (V+ - 3 VBE) - 2 mV
2
12 - 1.8V
10.2V
VODC(opt) '"
2
= - 2 - = 5.1 VOC
AMPLIFIER DESIGN EXAMPLES
The ability of the LM359 to provide gain at frequencies higher than most monolithic amplifiers can provide makes it
most useful as a basic broadband amplification stage. The
design of standard inverting and non-inverting amplifiers,
though different than standard op amp design due to the
current differencing inputs, also entail subtle design differences between the two types of amplifiers. These differences will be best illustrated by design examples. For these
examples a practical video amplifier with a passband of 8
Hz to 10 MHz and a gain of 20 dB will be used. It will be
assumed that the input will come from a 7511 source and
proper signal termination will be considered. The supply
voltage is 12 VDC and single resistor programming of the
operating current, ISET' will be used for simplicity.
'
=
>-~""""O'OUT
TLIH/778B-17
2. Determine the required ISET from the characteristic
curves for gain bandwidth product.
GBWMIN = 10 X 10 MHz = 100 MHz
For a flat response to 10 MHz a closed loop response to
two octaves above 10 MHz (40 MHz) will be sufficient.
Actual GBW = 10 X 40 MHz = 400 MHz
ISET required = 0.5 mA
V+ - 2 VBE
10.8V
RSET
- 1 kl1 = - - - - 1 kl1 = 20.6kl1
ISET
0.5 mA
3-485
UI
CD
en
II)
C')
:::is
r---------------------------------------------------------------------------------,
Application Hints (Continued)
..J
• The amplifier always has 100% current feedback so external compensation is required. Add a small (1 pF-5 pF)
feedback capacitance to leave the amplifier's open loop
response and slew rate unaffected.
Final Circuit Using Standard 5%
Tolerance Resistor Values:
0.5pF
• To prevent saturating the mirror stage the total AC and
DC current flowing into the amplifier's (+) input should
be less than 2 mAo
• The output's maximum negative swing is one diode
above ground due to the VBE diode clamp at the (-)
input.
0.01 pF
DESIGN EXAMPLE:
elN = 50 mV (MAX), fiN = 10 MHz (MAX), desired circuit
BW = 20 MHz, Av = 20 dB, driving source impedance =
750., V+ = 12V.
'IN
>-"'-0 'OUT
1. Basic circuit configuration:
C,
20k
TL/HI77BB-1B
12V
Circuit Performance:
30
IIIIIII
25
~
2
WITH CF =
20
15
~
10
..
Q
CF
WITH~~
;;:
co
w
co
JIT~W
i'LJ:-< 1\
>;""""-0 'OUT
Cj
CF = 1 pF
elN~
\
1
>
15
1M
10M
TLlH/77BB-20
FREQUENCY (Hz)
2. Select ISET to provide adequate amplifier bandwidth so
that the closed loop bandwidth will be determined by R,
and C,. To do this, the set current should program an
amplifier open loop gain of at least 20 dB at the desired
closed loop bandwidth of the circuit. For this example, an
ISET of 0.5 mA will provide 26 dB of open loop gain at
20 MHz which will be sufficient. Using single resistor programming for ISET:
V+ - 2VBE
RSET =
I
- 1 ko. = 20.6ko.
SET
3. Since the closed loop bandwidth will be determined by
TLlH/77BB-19
VO(DC) ~ 5.1V
Differential phase error
<
1° for 3.58 MHz fIN
Differential gain error < 0.5% for 3.58 MHz fiN
'-3 dB low
~
12V
100M
2.5 Hz
A NON-INVERTING VIDEO AMPLIFIER
For this case several deSign considerations must be dealt
with.
• The output voltage (AC and DC) is strictly a function of
the size of the feedback resistor and the sum of AC and
DC "mirror current" flowing into the (+) input.
R, and C, (L3dB =
3-486
27T~' Ct)
Application Hints (Continued)
For gain accuracy the total AC and DC mirror current
should be less than 2 mA. For this example the maximum
AC mirror current will be;
to obtain a 20 MHz bandwidth, both Rf and Cf should be
kept small. It can be assumed that Cf can be in the range
of 1 pF to 5 pF for carefully constructed circuit boards to
insure stability and allow a flat frequency response. This
will limit the value of Rf to be within the range of:
1
1
- - - - - - , ; ; Rf';; - - - - 27T 5 pF 20 MHz
27T 1 pF 20 MHz
or 1.6 kn ,;; Rf';; 7.96 kn
±ejn peak
±50 mV
A
= - - - = ±66",
Rs + re
7500.
therefore the total mirror current range will be 574 ",A to
706 ",A which will insure gain accuracy.
8. Rb can now be found:
V+ - VSE(+)
12 - 0.6
Rb =
= - - - = 17.8 kn
IIN(+)
640 ",A
9. Since Rs + re will be 7500. and re is fixed by the DC
mirror current to be:
KT
26mV
re = - - - = - - - '" 400. at 25"C
q IIN(+)
640 ",A
Rs must be 7500.-400. or 7100. which can be a 6800.
resistor in series with a 300. resistor which are standard
5% tolerance resistor values.
10. As a final design step, Cj must be selected to pass the
lower passband frequency corner of 8 Hz for this example.
Also, for a closed loop gain of + 10, Rf must be 10 times
Rs + re where re is the mirror diode resistance.
4. So as not to appreciably load the 750. input termination
resistance the value of (Rs + re) is set to 7500..
5. For Av = 10; Rf is set to 7.5 kn.
6. The optimum output DC level for symmetrical AC swing
is:
_ Vo(MAX) - Vo(MIN)
VODC(opt) 2
+ Vo(MIN)
=
(12 - 1.8)V - 0.6V
2
+ 0.6V
= 5.4 VDC
7. The DC feedback current must be:
I _ VoDC(opt) - VSE(-) _ 5.4V - 0.6V
FS Rf
7.5k
Cj
=
1
27T (Rs + re) flow
=
1
27T (7500.) (8 Hz)
DC biasing predictability will be insured because 640 ",A
is greater than the minimum of ISET/5 or 100 ",A.
Final Circuit Using Standard 5% Tolerance Resistor Values
1 pF
12V
100jJF
>-+-0 'OUT
680
=
26.5 ",F
A larger value may be used and a 0.01 ",F ceramic capacitor in parallel with Cj will maintain high frequency
gain accuracy.
= 640 ",A = IIN(+)
30
"IN
12V
TLlH/7788-21
3-487
~
It)
C')
::::ii
r---------------------------------------------------------------------------------,
Application Hints (Continued)
..J
GENERAL PRECAUTIONS
The LM359 is designed primarily for single supply operation
but split supplies may be used if the negative supply voltage
is well regulated as the amplifiers have no negative supply
rejection.
The total device power dissipation must always be kept in
mind when selecting an operating supply voltage, the programming current, ISET' and the load resistance, particularly
when DC coupling the output to a succeeding stage. To
prevent damaging the current mirror input diode, the mirror
current should always be limited to 10 rnA, or less, which is
important if the input is susceptible to high voltage transients. The voltage at any of the inputs must not be forced
more negative than -0.7V without limiting the current to 10
rnA.
The supply voltage must never be reversed to the device;
however, plugging the device into a socket backwards
would then connect the positive supply voltage to the pin
that has no internal connection (pin 5) which may prevent
inadvertent device failure
Circuit Performance
30
25
co
:s
..
z
20
......
to
w
to
15
!:;
>
10
1\
~"""DVoUT
v+ o--'lJV\I--+i
TLlH/7788-23
TL/H/7788-24
V
V ( ) + (VIN(DC) - VBE(+» Rt
o(DC) ~ BE Rs
VINIDC)- VBEI -)] Rt + VBEI-)
Rs
A
_
+ __R_t__
V(AC) -
Rs+ re (+)
• Eliminates the need for an input coupling capacitor
• Input DC level must be stable and can exceed the supply voltage of the LM359 provided that maximum input
currents are not exceeded.
3-488
Application Hints (Continued)
Noise Reduction using nVBE Biasing
nVBE Biasing with a Negative Supply
10k
7.Sk
r - - -....- - - ; -....-o12V
C
T_
RSETUNI
"N~ ""YIo,.".+-::.t
D.Dl~F
27k
Cl
----J
>~-""o()VO
lk
"N . . . . . .YIoI\r-+-.....;~
RSET(OUTI
>~HDvoUT
27k
TLlH/77BB-25
-15V
TLlH/77BB-26
• Rl and C2 provide addiUonal filtering of the negative biasing supply
Typical Input Referred Noise Performance
Adding a JFET Input Stage
y+
32
nVBE BIASING-
28
24
~
20 \: ISET{iNI • 2 mA
!
16
Ii=
12
'SET{iNI =0.5 mA-
\
'SET{iNI =0.05 mA
~
~
(-I
(-10----11----+-......
o
10
100
lk
10k
lOOk
1M
VOUT
FREnUENCY (HzI
TLlH/77BB-27
TLlH/778B-28
• FET input voltage mode op amp
• For Av ~ +1; BW ~ 40 MHz. S, ~ 60 VII's; Cc ~ 51 pF
• For Av ~ +11; BW ~ 24 MHz. S, ~ 130 VII's; Cc ~ 5 pF
• For Av ~ +100; BW ~ 4.5 MHz. S, ~ 150 Vlp.s; Cc ~ 2 pF
• Ves is typically <25 mV;
of:::: ±200 mV
loon potentiometer allows a Ves adjust range
• Inputs must be DC biased for single supply operation
3-489
Typical Applications (Continued)
Photo Diode Amplifier
9V'o-~---------------------------1~-t--~--~
2pF
1~(lN)~
10k
11k
Uk
01
10
Uk
GNDo-----~~------~----------------------------~------~
TLlH1778B-29
01 - RCA N-Type Silicon P-I-N Photodiode
o Frequency response of greater than 10 MHz
o If slow rise and fall times can be tolerated the gate on the output can be removed. In
this case the rise and the fall time of the LM359 Is 40 ns.
o T POL = 45 ns. T PDH =' 50 ns -
T2L output
Balanced Line Driver
v·
Vo
v·
R5
At
600
R4
Cl
A2
~
AI
. I N , I - . y . t I Y...- - - - - -.....
14
VOl
TL/H/77BB-30
v+
R3
V+ - 2<1>
~ = V+ - 2<1> where'" :::: 06V
ForVol=V02=2"'Fi2=2(V+_
'1'.
Av=~(~+
1)
Rl R4
o 1 MHz--3 dB bandwidth with gain of 10 and 0 dbm Into soon
00.3% distortion at full bandwidth; reduced to 0.05% wilh bandwidth of 10 kHz
o Will drive CL = 1500 pF with no addHlonal compensation, ±0.Q1 "F wilh Ccomp = 180 pF
o 70 dB signal to noise ratio at 0 dbm into 600n, 10kHz bandwidth
3-490
Typical Applications
(Continued)
Difference Amplifier
Voltage Controlled Oscillator
e
86*
20pF
v·O-....- ...........--.
81
Vo
10
8'
VO(DC) ~
R4 +
R3
(V
-
4»
where
4>
~ 0.6V
TLIHI7788-3l
R4
AV ~ Ri"forRl ~ R2
f _ VIN -4>
0 - 4 CaV Rl
·CMRR is adjusted for max at expected eM input signal
R6 '"
R5
5' forR5
where: R2
~ 100kn
4>
aV
• Wide bandwidth
~
~
2Rl
amplifier input voltage
~
~
0.6V
DM7414 hysteresis, typ 1V
• 70 dB CMRR typ
• 5 MHz operation
• Wide eM input voltage range
• T2L output
Phase Locked Loop
5Vo-------t--------------,
....--oIOV
rl~-----P_--
Vee
1/2DM1474
elK
• up to 5 MHz operation
• T2L compatible input
ps
eLR
PS
eLR
112DM7474
elK
All diodes
~
100pF
20pf
IOV
1N9l4
fk
I;
ADJUST
IOV
lOOk
GAIN
ADJUST
•
25ktb:
LOW PASS
FILTER
lOOk
h'
TlIHI7788-33
3~491
Typical Applications
(Continued)
Squarewave Generator
Rl
2k
140k
120k
5Vo-JVVY-4--JVVY--~
TL/H/7788-34
f
=I
MHz
Output is TTL compatible
Frequency is adjusted by Rl & C (Rl
«
R2)
Pulse Generator
Rl
220
Output is TTL compatible
5V
Duly cycle is adjusted by RI
Frequency is adjusted by C
10k
>~HOVo3.
2V
JLJl
OV
f
11k
=
1 MHz
Duty cycle
=
20%
TUH/7788-36
Crystal Controlled Sinewave Oscillator
5 pF
11k
12V
i.
F-'\N_.....
27k
12Vo--,\N_"~
Vo
= 500 mVp-p
f = 9.1 MHz
THO
< 2.5%
'----1DI--.....I
9.1 MHz
(FUNDAMENTAL)
TUH17788-37
3-492
r-----------------------------------------------------------------------------. r
:s:::
CI.)
Typical Applications (Continued)
~
High Performance 2 Amplifier Blquad Filter(s)
ICI
~--fl 11----,
Rn
sr:;J
20k
( 1:'~\
1/2 lM359
....B~2~~,..R,."..+_...;I~O,_ 12
.J
•
?...frf,3
4
-
-
T
-
T
~+
C,
11
I 11-4~---I
~~
Ri2
(+
V
:
Rb
-o VOl
...
9
5SPF. V02
-
I
~ ~fl.ll2lM35193>1~4
Ri'.,.
'.
...
O.I"F~
11 T'OPF
":'
":'
R
TUH/77BB-35
• The high speed of the LM359 allows the center frequency 0 0 product 01 the filter to be:
fo x 0 0 ,;; 5 MHz
• The above filter(s) maintains performance over wide temperature range
• One half of LM359 acts as a true non·inverting integrator so only 2 amplifiers (instead
of 3 or 4) are needed for the biquad filter structure
DC Biasing Equations for VOI(DC) "" V02(DC) "" V+ 12
Type I
Type II
Type III
Analysis and Design Equations
Type
RI2
Rll
fo
Qo
fz(notch)
Ho(LP)
Ho(BP)
0
Ri2
00
%7TRC
Ro/R
-
R/Ri2
Ro/Ri2
-
BP
Ci
00
00
%7TRC
Ro/R
-
-
RoCi/RC
Ci/C
-
Ci
00
Ril
%7TRC
Ro/R
-
-
-
VOl
V02
Ci
I
BP
LP
II
HP
III
Notchl
BR
%7T4RRjCCi
3-493
Ho(HP)
HO(BR)
Hoi
= C;lC
f_oo
Hoi
= C/Ri
1-0
•
Typical Applications (Continued)
Triangle Waveform Generator
e
250 pF
Uk
Rl
Uk
5V C>--'lNIr-.....
>+------0 VI ~
vee· 5V
>';.:4....-oV23.2V-r-1 r
OV..J L...J
V2 output is TIL compatible
R3
Uk
R2 adjusts for symmetry of the triangle waveform
5Vo-~~~,-----~~----"
Frequency is adjusted with RS and C
TL/H/nB8-38
3-494
,-------------------------------------------------------------------------, r
i:
en
Q
~National
~
~ Semiconductor
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LM604A/LM604 4 Channel Mux-Amp
General Description
Features
The LM604 Mux-Amp is an op-amp with four selectable differential inputs, combining the functions of a multiplexer
with an op-amp. The LM604 can select, buffer, and amplify
one of four different input signals, providing a complete system for multiplexing analog signals. It also has the unique
Bi-State output which allows two or more Mux-Amps to be
connected together at their outputs to increase the number
of multiplexed channels. Channel selection and the Bi-State
output are controlled by internal logic that interfaces directly
to a microprocessor. Besides these unique features, the
LM604 has excellent AC and DC op-amp specifications and
is internally compensated.
• Multiplexes four differential input channels to a single
op-amp
• Easy to interface to microprocessor, or operates "stand
alone"
• Bi-State output: Operates in two states, Active and Disabled. When disabled, it becomes a high impedance.
• Wide operating voltage range
single supply
4V to 32V
split supply
±2V to ±16V
V- to V+ - 1V
• Wide input common mode range
5,",s
• Fast channel to channel switching time
• Output will drive a 600n load
Applications include signal multiplexing and linear circuits
that are controlled by digital signals (i.e., programmable gain
blocks, filters, and other op-amp circuits).
Block Diagram
Channel Selection
A
B
DIGITAL GROUND
CHANNEL SELECTION
AND BI-STATE
OUTPUT CONTROL
EN
Wil
cs
A
B
WR
CS
0
0
1
0
1
0
1
0
0
0
0
X
X
X
X
X
0
0
0
0
1
X
Channel
2
3
4
Unchanged
Unchanged
Bi-State Output Control
FOUR
SEPARATE
DIFFERENTIAL
INPUT
CHANNELS
VOUT
SECOND STAGE AND
BI-STATE OUTPUT
EN
WR
CS
Output State
0
0
0
X
X
X
0
0
1
Enabled
Disabled, High Z
Unchanged
Unchanged
X
TL/H/9131-10
Order Number LM604AMJ, LM6041J, LM6041N, LM604ACN, LM604CN, LM604ACM, or LM604CM
See NS Package Number J18A, N18A or M20B
3-495
•
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
36Vor ±18V
Differential Input Voltage
Input Voltage Range
Operating Ambient
Temperature Range
LM604AM
LM6041
LM604AC, LM604C
± Supply Voltage
± Supply Voltage
Output Short Circuit to Gnd
JPkg.
MPkg.
NPkg.
Power Dissipation (Note 2) 1,600 mW 1,500 mW 1,900 mW
150·C
150·C
1500C
TJMAX
Continuous (Note 1)
ESD Tolerance (CZAP = 120 pF,
RZAP = 15000)
Lead Temperature (Soldering, 5 sec.)
DC Electrical Characteristics VSUPPLY =
Input Offset Voltage
(Vos)
Conditions
Rs = 10 kO
LM604
LM604A
Typical
1.0
0.5
83·C/W
65·C/W
± 15V (Note 3)
LM604AM
Parameter
75·C/W
8JA (Typical,
Board Mounted)
2,000V
300·C
- 65·C to 150·C
Storage Temperature Range
-55·C"; TA"; 125·C
-4OOC"; TA :;;; 85·C
O·C ,,; TA :;;; 70·C
LM604AC
LM604C
LM6041
Units
Tested Design Tested Design Tested Design
(Limit)
Limit
Limit
Limit
Limit
Limit
Limit
(Note 4) (Note 5) (Note 4) (Note 5) (Note 4) (Note 5)
3.0
5.0
1.0
3.0
1.0
5.0
3.0
mV
(Max)
3.0
Vos Temperature
Drift
5.5
Input Offset Current
(los)
2
los Temperature
Drift
10
p'vrc
10
10
12
10
12
12
Input Bias Current
(Is)
LM604
LM604A
50
30
nA
(Max)
pA/·C
80
100
50
80
50
100
60
nA
(Max)
60
Is Temperature
Drift
pArC
55
Input Common
Mode Voltage
Range
Upper Limit
14.0
13.5
13.5
13.0
13.5
13.0
-15.0
-15.0
-15.0
-15.0
13.0
12.5
13.0
12.5
-13.8
-13.3
-13.8
-13.3
12.3
10.0
12.3
10.0
-12.2
-11.7
-12.2
-11.7
50
25
50
25
50
25
50
25
80
70
80
70
13.0
Lower Limit
-15.0
-15.0
-15.0
Input Resistance
Output Voltage
Swing
Meg 0
1.0
RL = 10 kO
Upper Limit
13.4
13.0
12.5
Lower Limit
-14.2
-13.8
-13.3
RL = 6000
Upper Limit
12.7
12.3
10.0
Lower Limit
-12.6
-12.2
-11.7
Large Signal
Voltage Gain
VOUT = ±10V RL = 2 kO
200
50
25
RL = 6000
200
V
(Min)
V
(Max)
50
V
(Min)
V
(Max)
V
(Min)
V
(Max)
V/mV
(Min)
25
Common Mode
Rejection Ratio
VCM = -15.0Vto 13.5V
100
80
70
3·496
dB
(Min)
DC Electrical Characteristics VSUPPLY =
± 15V (Note 3)
LM6041
LM604AM
Parameter
Power Supply
Rejection Ratio
Units
Typical Tested Design Tested Design Tested Design
(Limit)
Limit
Limit
Limit
Limit
Limit
Limit
(Note 4) (Note 5) (Note 4) (Note 5) (Note 4) (Note 5)
Conditions
VSUPPLY = ±5.0Vto ±16.0V
100
80
70
80
70
dB
(Min)
±50
±60
±50
±60
±50
±60
rnA
(Max)
10.0
10.0
20.0
10.0
20.0
,..A
(Max)
80
70
Output Short Circuit
Current
Output Leakage
Current
LM604AC
LM604C
±35
VOUT = -13.5Vt013.0V
Bi-State Output Disabled
4.0
20.0
Output Capacitance Bi-State Output Disabled
See Figure 1
10
Supply Current
7.0
pF
9.0
9.0
10.0
9.0
10.0
10.0
AC Electrical Characteristics VSUPPLY =
± 15V (Note 3)
LM604AM
Parameter
Slew Rate
LM6041
LM604AC
LM604C
Units
Typical Tested Design Tested Design Tested Design (Umit)
Limit
Limit
Limit
Limit
Limit
Limit
(Note 4) (Note 5) (Note 4) (Note 5) (Note 4) (Note 5)
Conditions
3.0
Av = 1, RL = 2 ko.
2.0
2.0
1.5
2.0
1.5
f = 100kHz
7.0
Phase Margin
6.0
6.0
3.0
6.0
3.0
MHz
(Min)
2.5
MHz
(Min)
3.0
3.0
Unity Gain
Frequency
V/,..s
(Min)
1.5
Gain Bandwidth
Product
rnA
(Max)
2.5
2.5
50
Degrees
Settling Time to
Av = -1, VOUT = -5.0Vt05.0V
0.1% of Final Value RL=2ko.
4.0
,..s
Channel Switching See Figure 2
Time
4.0
RL = 2ko.,CL = 200pF
tsWt
5.5
5.5
6.5
5.5
6.5
6.5
tSW2
5.0
6.5
6.5
,..s
(Max)
6.5
Channel to Channel Rs = 10ko.,f = 10kHz
Isolation
VIN = 10.0Vp.p
100
Input Noise Voltage Rs = 1000., f = 1 kHz
20
nV/,JFfi
0.3
pAl,JFfi
Input Noise Current f=lkHz
Mux-Amp Enable
Time
See Figure 3
tENt
4.0
4.0
5.0
4.0
5.0
5.0
tEN2
Mux-Amp Disable
Time (tDlS)
3.0
dB
See Figure 3
4.0
1.0
5.5
2.0
3.0
3-497
5.5
2.0
3.0
,..s
(Max)
5.5
2.0
3.0
,..s
(Max)
•
DC Electrical Characteristics VSUPPLY =
5V (Note 3)
LM604AM
Parameter
Units
Typical Tested Design Tested Design Tested Design (Umit)
Limit
Umit
Umit
Limit
Umit
Limit
(Note 4) (Note 5) (Note 4) (Note 5) (Note 4) (NoteS)
Conditions
input Offset Voltage Rs = 10kO
VOUT = 2.0V
LM604AC
LM604C
LM6041
LM604
LM604A
1.0
0.5
3.0
5.0
3.0
1.0
5.0
3.0
mV
(Max)
10
18
10
18
nA
(Max)
130
150
130
SO
150
110
nA
(Max)
3.5
3.0
3.5
3.0
V
(Min)
0
0
0
0
3.2
3.0
3.2
3.0
0.7
0.8
0.7
0.8
3.0
2.8
3.0
2.8
0.6
0.7
0.6
0.7
1.0
3.0
Input Offset Current VOUT = 2.0V
3.0
10
18
Input Bias Current
VOUT = 2.0V
LM604
LM604A
70
50
Upper Limit
4.0
SO
110
Input Common
Mode
Voltage Range
VOUT = 2.0V
3.5
3.0
Lower Limit
0
0
0
Output Voltage
Swing
RL = 10kO
Upper Limit
3.5
3.2
3.0
Lower Limit
0.5
0.7
0.8
RL = 6000
Upper Limit
3.3
3.0
2.8
Lower Limit
0.4
0.6
0.7
Large Signal
Voltage
Gain
RL=2kO
VOUT = O.SV
to2.BV
200
200
RL 6000
Common Mode
Rejection Ratio
VCM = OVto3.5V
VOUT = 2.0V
100
Power Supply
Rejection Ratio
V+ = 4.0V to 5.0V
VOUT'= 2.0V
100
50
50
25
25
50
50
50
25
25
25
SO
~B~
V,
SO
70
SO
70
dB
(Min)
SO
70
SO
70
dB
(Min)
70
~~
'
~
VlmV
(Min)
SO
70
OUTPUT
Lt.l604
50
25
V
(Min)
V
(Max)
V
(Min)
V
(Max)
5Y
Vour
-5V
Vour
;-"':6t
'nsr±100pA
TLlH/9131-3
TLlH/9131-2
Covr = ~ x l00,.A
10V
FIGURE 1. Output Capacitance Test
3-49S
r-
Digital I nput Electrical Characteristics VSUPPlY =
LM604AM
Parameter
Conditions
Typical
i!!:
0)
± 15V (Note 6)
0
~
»
......
LM604AC
LM604C
LM6041
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
1.8
2.0
1.8
2.0
1.8
2.0
1.0
0.8
1.0
5.0
10.0
5.0
5.0
10.0
5.0
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
Units
(Limit)
0
~
V
(Min)
0.8
V
0.8
1.0
(Max)
5.0
10.0
10.0
J.'A
(Max)
10.0
5.0
10.0
J.'A
(Max)
Minimum Pulse
Width for WR & CS
100
100
100
ns
(Min)
Minimum Set-Up
Time (ts)
See Figures 3 and 5
100
100
100
ns
(Min)
Minimum Hold
Time (tH)
See Figures 3 and 5
50
50
50
ns
(Min)
Input Capacitance
r-
i!!:
0)
pF
5
Note 1: Applies to both single and split supply operation. Continuous short circuit operation can result in exceeding the maximum allowed junction temperature.
Note 2: When operating at TA
>
25 C, the maximum power dissipation must be derated based on 8JA.
G
Note 3: Unless specified otherwise. all limits are guaranteed for TA ~ TJ ~ 25°C, VCM ~ OV, VOUT ~ OV, and RL > 1 Megll. Boldface limits apply at
O°C ,;: TJ ,;: 70°C for LM604AC and LM604C, -40°C,;: TJ ,;: B5°C for LM6041, and -55°C';: TJ 125°C for LM604AM.
Note 4: Guaranteed and 100% production tested.
Note 5: Guaranteed but not 100% production tested. These numbers are not used to calculate outgoing quality levels.
Note 6: Unless specified otherwise, all units are guaranteed at TA = TJ = 25°C. Boldface limits apply at the junction temperature extremes specified in note 3.
Input voltage levels are with respect to digital ground (pin 4) which must be at least 4.0V below V+.
p-
Switching from Channel 1
to 2 with Channel Select
presettoABbeforeWR ~
4K.!l1
O. This test applies to all -5V C>-'W....--1
channels.
• •m
I :'
1
10V
""'.,
ANY
INPUT
CHANNEL
I
'\7
~
r-
'U,t604
2KIl
>-OVOUT
TLlH/9131-6
4K.!l
TLlH/9131-4
EN\'-__...JI
WR~2_
5.0V-------,.
V
Your
(lOV)
DIS VOUT
tENI \
-1.0V
-s.ov
\
" ..,moo
--------'r'-./-......,p..."""'----
VEN (OV)
'\",/
±O.l% OF lOV
TL/H/9131-9
TL/H/9131-5
FIGURE 3. Bi-State Output Enable
and Disable Time Test
FIGURE 2. Channel Switching Time Test
3-499
•
~ .-----------------------------------------------------~--------------------------,
o
CD
:il
Typical Performance Characteristics (Note 7)
...I
:;:
Input Bias Current vs
Input Common-Mode Voltage
~
~
60
...I
50
:il
Supply Current
vs Supply Voltage
Input Bias Current
vs Temperature
100
90
'" -r..........
30
20
.........
-15 -10
80
I
70
~
""-
~
0
o
'~
9
60
50 r- Vs=5V
.co
30
20
10
..,.
..... 1-'"
vs= :t15V
'"......
,
o
-5
10
-75-50-25 0 25 50 75 100 125 150
15
COMMON-MODE VOLTAGE(V)
o
10
l[IjPERAlURE("C)
Output Voltage Swing
vs Supply Voltage
15
20
25
SUPPLY VOLTAGE (:tV)
Upper Common-Mode Voltage
Limit vs Positive Supply Voltage
Output Voltage Swing
vs Output Load Resistance
50,..-,--,....,.-,----.-.--.-,--,-,
r-!l,L = 10",K'l--t-HH--+-+--l
L.o-
..,.
r-
30
25r------------------.--.-,..-,
-~~TA:;:"'c.:l251'_"C-=t---+-+-H
25
20
3OHH--+-+-+-b4-+-+-l
15 HHH--+-+-b4--I--I-l
5
2OHH--+---hA--+++-+-l
0/
10H--J.A-++-I-+-H-l
10
15
20
25
O~~--L.~~~~--L.~
0.1
SUPPLY VOLTAGE (:tV)
l.cor--r---~-'----~-'---'
~
!<>
II
l.co
100
~~
1M
+SUPPLY
10
FREQUENCY(Hz)
100
lK
10K lOOK
1M
10M
FREQUENCY (Hz)
Equivalent Input Noise
Voltage vs Frequency
Distortion vs Frequency
30
60
0.225
"'it
i
50
D.2IIO
g
20
%
~
~
§!
0.1L...U.J.UIW.....LJ.
100
lK
10K
FREQUENCY (Hz)
Undistorted Output Voltage
Swing vs Frequency
~
1M
~
~
o
10M
lOOK
10
20
10K lOOK
Output Impedance
vs Frequency
~ ~SUPPLY
60
lK
25
100
.co
8
20
15
120
80
~
10
SUPPLY VOLTAGE (V)
Power Supply Rejection
Ratio vs Frequency
~
100
o
10
RL - OUTPUT LOAD (kll)
Common-Mode Rejection
Ratio vs Frequency
~
10I-HH-I:A--+-+-I--I-l
o
O~~~~L--L--L.~~
o
V
10
5
r-
S
~
~
RL =2K
1
Ay=l
DISTORTION <1"
lK
FREQUENCY (Hz)
30
0.100
0.D75
lOOK
1\
I-
20
Ay;ol00
0
~
0JI25
1111111
10K
0.150
0.125
o.oso
0
o
0.175
10
100
lK
10K
FREQUENCY(Hz)
0
lOOK
10
100
lK
10K
lOOK
FREQUENCY (Hz)
TUH/9131-6
3-500
Typical Performance Characteristics (Note 7)
Equivalent Input Noise
Current vs Frequency
~
~
III
~
0
>
I
I
25'C
8 r-
0
J--
V ",/
,.
.;"
~
-
3D
2D
0
"-
i\
-3D
75
5 10 15 20 25 3D 35 40
150
i
4.0
t;
3.5
i!-
3.0
3
2.5
::>
2Jl
50
>
0
50
e:
10 -~=2K
::IE
0
~ ~
Ig
-50
./
Y
10mV./ V"
. / .........lmV
", ",
..... .......
III
~
.......
-5
!i!
5
10mV
0
-15
'00
,mV
I'... -,.....
~
-10
5
1. . . . . . .
o
........ ........
"
SETTLING TIME U.s)
Open Loop Voltage Gain
1M
~LK -
:::!lL =2
~
~
~
I'
I'
.j5
15
~
100
FREQUENCY (MHz)
4.5
25'C
OUWUT SINK CURRENT (mA)
-150
Unity Gain Frequency
vs Temperature
?:
z
o
50
-100
I.
~1
100 125
TEMPERATURE(OC)
ill
s
e:
o
.j5
~
.....
-20
50
-8
-6
Inverter Settling Time
vs Output Voltage Swing
-1 0
25
""" -55'C125'C
Bode Plot
0
0
r-_
-2
GAl.
1
-50 -25
-10
OUTPUT SOURCE CURRENT (mA)
Slew Rate vs Temperature
fALU,",
t$
-14
-4
5 10 15 20 25 3D 35 40
FREQUENCY(Hz)
Av=1
RL =2K
-12
I
I
2
o
o
III
~
-'25'C
5
~
-20
-18
-16
~
-55'C
5
4
Negative Current Limit
Positive Current Limit
20
18
16
14
12
10
~
!i!
r-.. .....
T.=-55'C
~~;;""'f-"
-
.=~-
T.=125'C=
lOOK
:!;
9
~
0
10K
1.5
-75 -50 -25 0 25 50 75 100 125 150
TEMPERATURE(OC)
o
10
15
SUPPLY VOLTAGE(±V)
TUH19131-7
Note 7: Unless specified olherwise. TA
= TJ = 2S'C. Vs =
±ISV. VCM
= av. VOUT = av. and RL >
3-501
1 Meg.
•
~
I
..J
....
.............OVOUT
(Aii)
V2
CHANNEL 3 (AB)
cs,
\.
AND
CS2
ViR
EN,
EN2
A
~~21
Vour
tEN2i
tDIS1V·
----,.\ I
V2-,--
Vl~-------'
TL/H/9131-15
FIGURE 8. Timing Diagram for Switching BI-State Outputs
25
~
5
~
......-
V= OINJ
GN
w:
+ ......
SELECTED
CHANNEL
°INJ
°INJ
~~V
~N~V
-
DIGITAL FEEDTHROUGH
When interfacing the Mux-Amp to a microprocessor, pins A,
B, EN, and WR are connected to an address bus where high
frequency digital Signals are present. The fast edges of
these Signals can propagate into the Mux-Amp's analog signal path, causing fast transients to appear at the output. To
avoid this problem, the following precautions should be taken.
........
~N~V ~N~V -
The Mux-Amp is unconditionally stable with as much as
500 pF connected from the output to ground. If the output is
required to drive a larger capacitive load, the Mux-Amp may
need to operate with at least a gain of 10. Otherwise, it may
become unstable when sinking current.
1) Analog and digital ground must be kept separate. They
can only be connected together back at the power supply or
supply bus.
-
I
I
2) Bypass capaCitors should have low inductance to prevent
noise spikes on the voltage supply pins. A ceramic disc capacitor of 0.1 ,..F is usually sufficient.
I
3) All lead lengths should be kept short to prevent them
from picking up digital signals .
••
+
By using these rules, digital Signals can be attenuated at the
input channels by typically 100 dB.
PREVIOUS
OINJ
Lab measurements have shown a minimum digital feedthrough signal of 2 mV occurs at the output even when the
best layout precautions are taken. This is fine for many applications, but to completely eliminate digital feedthrough,
any signals coming directly from the bus must be sent to the
Mux-Amp via a Tri-State buffer, see Figure 14. This isolates
the Mux-Amp's digital pins from the address bus to prevent
pin to pin feedthrough. CS can be used to enable the TriState buffers when signals are sent to" the Mux-Amp from
the address bus.
CHANNEL
~
.........
OINJ
TLlH/9131-20
FIGURE 12. Error Voltage From Input Charge Inlection
\
\
ADDRESS 8US
8
A
EN
ADDRESS 81TS NOT
USED BY A, 8. EN
2
6 10
I
14
Dt.474LS367
.~
TR!-STATE 8UFFER 19
3
7
9
13
II
JI
ADDRESS DEC.Q!lE
LOGIC FOR CS
1
18EN 17WR 16CS •• -
Lt.4604
TLlH/9131-21
FIGURE 13. QINJ vs VCM - V-
A
8
MAXIMUM OUTPUT LOAD CONDITIONS
The Mux-Amp is guaranteed to drive a 600n load as specified over its entire operating range. Reducing the load resistance below this value may cause the output to current
TUH/9131-22
FIGURE 14. Isolating Mux-Amp from Address
Bus by Using a Trl-State Buffer
3-506
r-
s:
Typical Applications
Q)
Q
,j:Io
VI
EN
A
V2
V3
V4
V5
Mux-Amp
1
B
EN
A
Mux-Amp
2
A
B
EN
0
0
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
0
0
0
1
0
0
0
0
):0
......
r-
Input
s:
Q)
VI
V2
V3
V4
V5
V6
V7
Q
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A
V6
B
Vour
V7
V8
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TL/H/9131-23
Eight Channel Multiplexer and Amplifier with a Gain of 10
54.9 KD.17.
54.9 KD. 17.
V1N o--+-II/V\t-.....- -....- - I I - -.....
+--I
LM604
54.9 KD. 17.
.>-......-oVour
IAUX-AMP
Channel
2
TLlH/9131-24
3
4
Center Frequency
5kHz
10khz
15kHz
20kHz
Programmable Bandpass Filter: Each channel has a 2 kHz bandwidth and a gain of 1 at the center frequency
3-507
•
m ,------------------------------------------------------------------.
s
CD
::::iii
~National
..... ~ Semiconductor
...I
~
o
LM607/LM607A/LM607B
;::: Precision Operational Amplifier
o
CD
::::iii
...I
CD
:5
General Description
Features
The LM607 series of precision operational amplifiers are
trimmed at wafer sort to extremely low values of offset voltage. Advanced circuit design and testing techniques allow
guaranteed drift specifications as low as 0.3 ",V
with offsets as low as 25 ",V.
Other input parameters are equally impressive. The typical
open loop voltage gain of 5 Million yields extremely low error in high-gain applications. CMRR and PSRR are typically
140 dB.
Using Super-Beta transistors in the front end enables the
LM607 to operate at high input stage current while maintaining low values of input bias current (1 nA typ.) This gives the
LM607A:
25 ",V max
LowVos
LM607A:
0.3 ",vrc max
Low drift
Drift 100% tested· A and B grades
5 million min
High gain
LM607A:
124 dB min
Ii High CMRR
LM607A:
120 dB min
• High PSRR
LM607A:
6.5 nV/.JHZ@ 1 kHz
• Low noise
7.2 nV/.JHZ @ 10 Hz
1.B MHz gain-bandwidth
• High speed
0.7V/",s slew rate
1 mA
• Low supply current
±13.5V
• Wide input common mode range
±3V to ±18V
• Wide supply range
Allows driving high Cl
• Overcompensation
rc
part its low input voltage noise: 6.5 nVl.JHZ.
High operating currents also help give the LM607 its high
gain-bandwidth product of 1.B MHz and slew rate of '
O.7V/",s. Despite its higher speed, the LM607 draws less
supply current than OP-07 and OP-77 types: only 1 mA at
± 15V supplies.
•
•
•
•
Connection Diagrams
Cerdip and Molded DIP
TO-99 Metal Package
8
7
6
5
TLlH/B7B7 -10
Top View
vTLJH/B7B7 -11
Top View
Ordering Information
Package
TO-99
8-Pin
Cerdip
B-Pin
Molded
DIP
Temperature Range
NSC
Drawing
Military
Commercial
LM607AMH
LM607BMH
LM607ACH
LM607BCH
LM607CH
H08C
LM607AMJ
LM607BMJ
LM607ACJ
LM607BCJ
LM607CJ
JOBA
LM607ACN
LM607BCN
LM607CN
N08E
3-50B
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Differential Input Overdrive Current (Note 7)
±25mA
Supply Voltage
Input Voltage
Output Short Circuit to Gnd
44V
Supply Voltage
Maximum Junction Temperture
Storage Temperature Range
260·C
2000V
Operating Rating
Temperature Range (Note 9)
LM607AM/LM607BM
LM607C/LM607AC/LM607BC
Continuous
500mW
150·C
Power Dissipation (Note 9)
Lead Temperature (Soldering, 10 sec.)
ESD Tolerance
CZAP = 100pF
RZAP = 1.5 kO
- 65·C to 150·C
Electrical Characteristics All limits guaranteed for TJ = 25·C, VCM = 0, Vo
otherwise specified. Boldface limits apply at operating temperature extremes.
= 0, and ±15V supplies unless
LM607BM
LM607AM
Parameter
-55·C ,;;: TJ ,;;: + 125·C
O·C,;;: TJ ,;;: +70·C
Conditions
Typ
Tested
Limit
(Note 5)
Design
Limit
(Note 6)
Tested
Limit
(Note 5)
Design
Limit
(Note 6)
Units
Input Offset Voltage
(Note 2)
15
25
80
60
120
",V
Max
Input Offset
Voltage Drift
(Note 3)
0.2
0.3
0.6
",vrc
Input Offset Voltage
Long Term Stability
(Note 4)
0.2
Max
",V/mo
Max
Input Bias Current
1
2
4
Input Offset Current
0.5
2
4
3
6
nA
Max
2.8
5.6
nA
Max
Input Noise Voltage
0.110 10Hz
0.2
Input Noise
Voltage Density
f
f
f
= 10 Hz
= 100Hz
= 1 kHz
7.2
6.6
6.5
Input Noise Current
0.1 to 10 Hz
14
Input Noise
Current Density
f
f
f
= 10 Hz
= 100Hz
= 1 kHz
0.32
0.14
0.12
pAl,fFiZ
Max
Input Resistance
Differential Mode
Common Mode
2
100
MO
GO
Input Voltage Range
0.5
18
0.5
18
10
8
10
8
",Vp-p
Max
nV/,fFiZ
Max
pAp-p
Max
±13.5
±13
±12.5
±13
±12.5
V
Min
Common-Mode
Rejection Ratio
VCM = ±13V
VCM = ± 12.5V
140
124
120
116
112
dB
Min
Power Supply
Rejection Ratio
Vs = ±3Vto ±18V
(Note 8)
140
120
117
114
112
dB
Min
Large-Signal
Voltage Gain
Vo = ±10V
RL:?: 2kO
10000
5000
2000
1500
1000
V/mV
Min
RL:?: 1 kO
5000
2000
1500
3-509
Electrical Characteristics (Continued)
LM607AM
Parameter
Output Voltage
Swing
Conditions
RL~2kn
RL
~
Tested
Limit
(Note 5)
Typ
±13.8
Tested
Limit
(Note 5)
±13
±12.5
±12.5
1 kn
Slew Rate
LM607BM
Design
Limit
(Note 6)
Design
Limit
(Note 6)
±13
±12.5
±12.5
Units
V
Min
0.7
0.4
0.4
VlILS
1.8
1.0
1.0
MHz
Min
Min
Gain-Bandwidth
Product
f = 100 kHz
Open-Loop
Output Resistance
50
Supply Current
1
Offset Adjust Range
0,
1.5
2.0
1.5
2.0
rnA
Max
1.5
mV
Electrical Characteristics
All limits guaranteed forTJ = 25'C, VCM = 0, Vo = 0, and ±15V supplies unless
otherwise specified. Boldface limits apply at operating temperature extremes.
LM607AC
Parameter
Conditions
Typ
Tested
Limit
(Note 5)
Design
Limit
(Note 6)
LM607BC
Tested
Limit
(Note 5)
Input Offset Voltage
(Note 2)
15
25
40
60
90
Input Offset
Voltage Drift
(Note 3)
0.2
0.3
0.6
Input Offset Voltage
Long Term Stability
(Note 4)
0.2
Input Bias Current
Input Offset Current
Design
Limit
(Note 6)
LM607C
Tested
Limit
(Note 5)
Design
.Limlt
(Note 6)
150
250
/LV
Max
2.5
/LvrC
Max
Units
/LV/mo
Max
1
2
4
3
6
10
14
nA
Max
0.5
2
4
2.8
5.6
6
10
nA
Max
0.5
/LV pop
Max
Input Noise Voltage
0.1 to 10 Hz
0.2
Input Voltage
Noise Density
f = 10 Hz
f = 100 Hz
f = 1 kHz
7.2
6.6
6.5
Input Noise Current
0.1 to 10 Hz
14
Input Noise.
Current Density
f = 10 Hz
f = 100Hz
f = 1 kHz
0.32
0.14
0.12
pAl,JHz
Max
Input Resistance
Differential Mode
Common Mode
2
100
Mn
Go,
Input Voltage
Range
0.5
0.5
18
18
8
20
13.5
10
10
8
11.5
nV/,JHz
Max
pAp-p
Max
±13.5
±13
±12.5
±13
±12.5
±13
±12.5
V
Min
Common-Mode
Rejection Ratio
VCM = ±13V
VCM = ±12.5V
140
124
120
116
112
110
108
dB
Min
Power Supply
Rejection Ratio
Vs = ±3Vto ±18V
(Note 8)
140
120
117
114
112
110
108
dB
Min
3-510
r-
Electrical Characteristics (Continued)
en
==
Q
LM607AC
Parameter
Conditions
Typ
.....
.....
r-
LM607C
Tested
Design
Tested
Design
Tested
Design
Limit
Limit
Limit
Limit
Limit
Limit
(Note 5)
(Note 6)
(Note 5)
(Note 6)
(Note 5)
(Note 6)
2000
2000
1500
1500
1000
Large-Signal
Va = ±10V
Voltage Gain
RL;;' 2 kO
10000
5000
RL;;' 1 kO
5000
1500
Output Voltage
RL;;' 2kO
±13.8
±13
Swing
RL;;' 1 kO
Slew Rate
LM607BC
1000
±12.5
±12.5
±13
1000
±12.5
±12.5
±12.5
Units
~
.....
rV/mV
Min
±12
V
±12
en
==
Q
en
==
.....
Q
to
Min
0.7
0.4
0.4
0.4
V/p.s
1.8
1.0
1.0
1.0
MHz
Min
Gain-Bandwidth
f = 100kHz
Product
Min
Open-Loop
0
50
Output Resistance
Supply Current
1
1.5
2.0
1.5
2.0
1.8
2.2
mA
Max
Offset Adjust
Range
1.5
mV
Note I: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions. see the Electrical Characteristics.
The guaranteed specifications apply only for the test conditions listed.
Note 2: Input offset voltage for A and B grades is tested and guaranteed with the device fully warmed up. See Figure 1 in the Application Hints for test circuit.
Warmup drift is typically 3 ".V settling out in 5 minutes. The LM607C offset voltage is measured by automated test equipment within 200 ms of applying power.
Note 3: Input offset voltage drift is defined as (Vos(70"C) - Vos( - 5'C))175'C for the commercial temperature range. For the military temperature range, the input
offset voltage drift is measured from room temperature to both extremes: both [Vos(25'C) - Vas( - 55'C)I/BO"C and (Vos(125'C) - Vos(25'C))/IOO·C.
Note 4: Input offset voltage long term stability refers to the average trend line of Vas vs. time over extended periods of time after the first 30 days of operation.
Excluding the initial hour of operation, changes in Vas during the first 30 days are typically 2 ".V.
Note 5: Guaranteed and 100% production tested.
Note 6: Limits at temperature extremes are guaranteed via correlation using Standard Statistical Quality Control (SQC) Methods. All limits are to be used to
calculate Average Outgoing Quality Level (AOQL).
Note 7: Inputs are protected by beck-ta-back diodes to prevent zener breakdown of the input transistors. Series limiting resistors have not been included since they
degrade noise performance. Excessive current may flow if a differential voltage in excess of 0.7V is applied.
Note 8: Power Supply Rejection Ratio is tested by moving both power supplies together from their minimum to maximum values.
Note 9: Typical thermal resistance of the molded package is 95"C/W junction-te-ambient. Typical thermal resistance of the metal can package is 150"C/W
junction-to-ambient and 17"C/W junction-to-case.
Note 10: These units selected to illustrate the type of variations that may be encountered. (This note refers to particular curves within the Typical Performance
Characteristics.)
•
3-511
Typical Performance Characteristics Vs =
Input Offset Voltage of
5 Representative Units
vs Temperature (Note 10)
± 15V, TA = 25°C, RL = 2k unless otherwise indicated
Input Bias Current of
4 Representative Units
vs Temperature (Note 10)
---
r-...
i"""
.'
1
\
--
~
/~
1
,
o.a
4
80
Input Offset Current of
4 Representative Units
vs Temperature (Note 10)
-2
"
:--... r-..
-80
-75-50 -25 0
25 50 75 100 125
-4
-75 -50 -25 0
TIIIPERAlURE ('1:)
.....
.,/
/
-
/ '/
Open-Loop Gain
vs Supply Voltage
Input Voltage vs
Output Voltage
40
3
30
1
L.---
1
1/
lit. =10k
.--
-3
-15
Open-Loop Gain
20 vs Temperature
i---'
-
.....
o
-5
-10
10
o
15
oirrPUT VOLTAGE (V)
W
12
25 50 75 100 125
Supply Current vs
Supply Voltage
lk
"
60
50
40
30
~
~~
10
o
'\.
'\
-10
246 B 10121416162022
SUPPLY VOLTAGE (tV)
100
lk
3J)
PHAS
I'o.-GAIN"'-
"
IIlk
lOOk
FREQUENCY (Hz)
~
POSITIVE
LIMIT
.....
-r25 50 75 100 125
TEMPERAlURE ('1:)
~
~
2.5
9O§f ~
2.0
60
20
D.7
IIlk
Open Loop Gain and
Phase vs Frequency
70
40
,Fft'uWE
'"'"
y..
-75 -50 -25 0
LOAD RESISTANCE (A)
80
1
~
r- t-~
o
90
25 30
Input Common-Mode
.... Limits vs Temperature
10
100
20
~
....
14
TIIIPERAlURE ('1:)
1.2
,
TOTAL SUPPLY VOLTAGt (V)
Output Voltage Swing
vs Load Resistance
16
5
I-75 -50 -25 0
i\.
II
10
liME AmR POWER APPUED (MIn)
o
~
I
-2
IJ;'
12
25 50 75 100 125
TIIIPERAlURE ('1:)
CAN
~ . / ~LD£l)DIP
i---'
r- r0- t-
-75 -50 -25 0
METAL
-
/
16
-il.2
25 50 75 100 125
TIIIPERAlURE ('1:)
Warmup Drift
r-.;; r-
\
-3
\
I!i
1208
I"..
1M
180
10M
---
~
§
1.5
i!l
1.0 f - f -
5O~ !
1
Gain-Bandwidth Product,
Phase Margin vs Temper~ture
~
-~
GL
I"'r-... f~
-
Pht;;: r-... .....
.....
Mrl n
0.5
o
-75 -50 -25 0
60
25 50 75 100 125
TIllPERATURE ('1:)
TLlH18787-12
3-512
r-----------------------------------------------------------------------------, r
Typical Performance Characteristics
Slew Rate vs Temperature
Noise Voltage vs Frequency
1.0
...
OB
~
0.7
~
~
Fan
V /
R...
V
-
....... f-
~
500
10
~
'\
!
""~
~
13
Il:
~
0
>
~
z
-
..
0.5
-75
-so -25
0
25
so
75 100 125
~
I
i{\
'l"
g
't!"
~
f-
10
~
,
§
iil
lOOk
so
10
100
120
1M
~
l.w
~
120
0:::::::: ~
~
100
~
'I\: ~NJ=~M
~~~I~t'f~~
60
'"8
.w
10k
Power Supply Rejection
Ratio vs Frequency
60
100
60
Ik
FREQUENCY (Hz)
uo
l!l
0
!'"
0
-
10k
aJ
o
.......
tD
100
Ik
~
:::
o
Ie
100
0
:\
10
ISO
Common-Mode Rejection
Ratio vs Frequency
li>
r-
15
r
3:
FREQUENCY (Hz)
30 r-
20
.
200
'I\::~
'I\:
.w
60
20
o
100
Ik
FREQUENCY (Hz)
10k
lOOk
1M
FREQUENCY (Hz)
0.1
10
100
Ik
10k lOOk
FREQUENCY (Hz)
TL/H/8787 -13
large-Signal Pulse
Response, Av = + 1
Small-Signal Pulse
Response, Av = + 1
+50mV
+lOV
o
o
-lOY
-50mV
TIME (500 ns/DlV)
TIME (10 /-Ls/DIV)
TL/H/8787 -15
TL/H/8787-14
3·513
r
3:
~
,
.....
300
250
.......
......
aJ
.wo f=
r-
~
Maximum Output Swing
vs Frequency
~
§!
0
TEMPERAlURE (OC)
25
!i!
~
0.6
E
Noise Current vs Frequency
12
Q.9
~
Z:.
3:
aJ
o
(Continued)
,...o
CO
Application Hints
:::!!i
....I
OFFSET VOLTAGE
g
Offset voltage of the LM607 is internally trimmed to a very
low value. The data sheet Vos specification applies at TJ =
25'C, VCM = 0 and ±15V supplies. For other conditions,
temperature drift, common-mode rejection and power-supply rejection errors must be taken into account.
m~--------------------------------------------------~
~
:l.......,...
o
CO
:::!!i
....I
y+
~
PIN1~PIN8
10Kn
TL/H/87B7-5
Because adjusting the offset voltage of an LM607 will alter
its offset voltage temperature drift, caution is advised. Every
100 /LV of offset will produce a 0.33 /LVrc drift component.
For this reason the offset adjust potentiometer should not
be used to null out a sensor offset if system temperature
drift is important; rather a stable voltage reference must be
added to the sensor voltage. Offset voltage drift is guaranteed by design for the LM607C either with or without external nUlling. The higher precision A and B grades are 100%
drift tested and guaranteed without nulling only.
To measure Vos with high accuracy, gain must be taken
right at the device as shown, otherwise the offset voltage
would get swamped out by noise and thermoelectric voltages. Thermocouples occur in the devices, the IC socket
and the resistor across the device inputs (R2), all of which
must be held isothermal. Usually best results are obtained
by placing the circuit in a box or chamber to minimized airflow and employing a long thermal soak time. R2 should be
mounted symmetrically with respect to potential thermal
gradients: e.g. not perpendicular to the board but instead
parallel to the board and the device socket. In addition, R2
should have low thermal EMF. Cermet or nichrome metal
film types are acceptable; avoid tin-oxide resistors.
OVERCOMPENSATION
Without any external compensation, the LM607 is stable at
unity gain and up to 750 pF load capacitance. It has a slew
rate of 0.7V//Ls and a gain-bandwidth product of 1.8 MHz. If
desired, the amplifier may be overcompensated by adding
external components as shown in Figure 4. This increases
maximum capacitive loading to 0.01 /LF while decreasing slew
rate to 0.13VI /Ls and bandwidth to 200 kHz. If overcompensation is not desired, pin 5 should be left open.
Rl 50kn
R2~Lt.l607
+
10m
FIGURE 3. Improved Sensitivity Offset Adjust
Although the LM607C is specified as TJ = 25'C, the 3 /LV
typical warmup drift is a small fraction of its 100 /LV max
offset. For the 25 /LV LM607A and 50 /LV LM607B grades,
the offset voltage is measured fully warmed up with the circuit of Figure 1 approximately 5 minutes after applying power.
loon
10m
Vosx
1000
R3 50kn _
TL/H/8787-6
TL/H/B7B7 -3
FIGURE 4. Overcompensation
FIGURE 1. Offset Voltage Test Circuit
NOISE
OFFSET NULLING
The LM607 achieves lower voltage noise than the OP-07
primarily by operating at higher input stage current. Its superbeta input transistors and trimmed bias-current compensation prevent the bias current from increaSing. When measuring spot noise, a circuit as shown in Figure 5 is recommended. The DUT runs at a gain of 100 will not roll off until
approximately 15 ,kHz. Another gain of 100 amplifier following brings total DUT-input-referred gain up to 10,000 to minimize sensitivity to EMI in the environment. When measuring
spot noise at 100 Hz, it is recommended that the bandwidth
be 20 Hz or less to minimize pickup of 120 Hz, the second
harmonic of line frequency.
This is usually not required on the LM607 family since its
offset voltage is internally trimmed. An offset adjust range of
approximately ± 1.5 mV is available using a single 10 or 20
kO potentiometer as shown in Figure 2. With these values,
the adjustment is relatively linear over the entire range. If a
100 kO potentiometer is used, the adjustment becomes
very coarse at the extremes (above 700 /LV) but fine in the
center, which makes it easier to precisely null the offset. For
even more sensitivity, employ a pot in conjunction with two
fixed resistors. For example the circuit of Figure 3 has an
adjustment range of ± 150 /LV.
y+
loon
TO
SPECTRUM
ANALYZER
TL/H/B7B7-4
TL/H/8787 -7
FIGURE 2. Offset Adjust Circuit
FIGURE 5. Spot Noise Test Circuit
3-514
Application Hints (Continued)
The circuit used to measure peak-to-peak noise in the 0.1 to
10Hz range is shown in Figure 6. The device should be
warmed up for about 2 minutes and shielded from air currents to minimize warmup drift and thermoelectric voltages.
The test time should be limited to only 10 seconds, as this
limits noise contributions below 0.1 Hz, in addition to the
single zero rolloff. The measuring equipment must be flat
beyond this bandwidth. DC coupling must be employed to
ensure this. Certain types of X-Y plotters may not be usable
because of severe roll off above a few Hz.
1011
All capacitors
non·polar
Input Overdrive
The LM60Ts input-protection diodes prevent zener breakdown of the input transistors and the ensuing degradation of
input DC parameters. Current limiting resistors have not
been included as they would degrade input noise voltage.
Input current should be limited to ± 25 rnA to avoid potential
damage to the IC metallization.
In voltage follower applications, large input voltage steps
may be coupled directly to the op amp's output via the protection diodes. If the input and feedback resistances are low
in value, the output stage may be driven temporarily into
current limit. The resulting output waveform exhibits an initial fast step when the diodes are conducting followed by a
slight glitch as the amplifier comes out of current limit before
true slewing is observed. For best results, use input and
feedback resistors of 2 kO each in parallel with 30 pF capacitors. The capacitors eliminate input and feedback poles
which respectively cause signal rolloff and instabilities.
TL/H/8787-8
Gain
~
50,000
FIGURE 6. 0_ 1 to 10 Hz Noise Test Circuit
3-515
~ r-----------------------------------------------------------------------------~----_,
~
~ ~ National.
..
~ ~ Semiconductor
~
~
CD
:i LM611A/LM611
Operational Amplifier and Adjustable Reference
General Description
Features (Guaranteed over temperature and supply)
The operational amplifier is a versatile common-mode-tothe-negative-supply ("single-supply") type similar to the
LM124 series, but with improved slew rate, improved power
bandwidth, reduced cross-over distortion, and low supply
current even while driven beyond swing limits. Lateral PNP
input transistors enable low input currents for large differential input voltages and swings above V+.
OPAMP
• Low operating current
The voltage reference is a three-terminal shunt-type bandgap similar to the adjustable LM185 series, but with improved voltage accuracy to ±0.4% accuracy by wafer trim.
Two resistors program the reference from 1.24V to 6.3V.
The reference features operation over a current range of
16 p.A to 20 mA, low dynamic impedance, broad capacitive
load range, and cathode terminal voltage ranging from a
diode-drop below V- to above V+.
As a member of National's new Super-BlockTM family, the
LM611 is a space-saving monolithic alternative to a multichip solution, offering a high level of integration without sacrificing performance.
Connection Diagrams
Applications
• Power supplies
• Signal conditioning
Order Number
Prime Military
(-55·C s: TA s: +125·C)
tested at -55·C, + 25·C, +125·C
ANODE _1+--_--.
FEEDBACK 2
Prime Industrial
(-40·C s: TA s: +85·C)
tested at + 25·C
SUBSTRATE
TLlH/9221-1
Industrial
(-40·C s: TA s: +85·C)
tested at + 25·C
See NS Package Number J08A or N08E
N/c I -
14v+
N/c 2
13 N/C
ANODE 3
12 N/c
II OUT
CATHODE 5
1°_IN
y-7
LM611CN
LM611CM
tested at + 25·C
Packages
N
M
9 +IN
SUBSTRATE
LM6111N
LM6111M
Commercial
(0 s: TA s: +70·C)
J
FEEDBACK 4
LM611AIN
drift tested at -40·C, +25·C, +85·C
Top View
N/c 6
LM611MJ
drift tested at - 55·C, + 25·C, + 125·C
CAlliODE...;;3+-----'
y-4
300 p.A (op amp)
16 p.A (ref)
• Large supply voltage range
4V to 36V
• Large output swing (10k load) (V- + 1V) to (V+ -1.8V)
• Input common-mode range includes V- to (V+ -1.4V)
• Wide input differential lIoltage
± 36V
REFERENCE
1.2V to 6.3V
• Adjustable output voltage
±0.4%
• Tight initial tolerance available
o to 00
• Tolerant of load capacitance
8 N/c
TLlH/9221-2
Top View
See NS Package Number M14A
M Narrow (0.15")
3-516
Hermetic Dual-In-Line
Plastic Dual-In-Line
Plastic Surface Mount Narrow (0.15")
r
3:
Q)
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications_
Soldering Information
Dual-In-Line Package
Soldering (10 seconds)
260'C
Small Outline Package
Vapor Phase (60 seconds)
215'C
Infrared (15 seconds)
220'C
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
Voltage on any Pin Except Cathode Pin (referred to V- pin)
-0.3V(Min)
(Note 1)
36V
Military and Industrial
Commercial
32V
Current through any Input Pin & Cathode Pin
±20mA
Differential Input Voltage
Military and Industrial
Commercial
Package Thermal Resistance (Note 3)
Hermetic DIP JOB
Molded DIP N08
Molded SO M14 Narrow
±36V
±32V
Short Circuit Duration, Op Amp (Note 2)
Storage Temperature Range
Continuous
-65'C to + 150'C
Maximum Junction Temperature
105'C/W
100'C/W
150'C/W
ESD Tolerance (Note 4)
120pF,1.5kO
200pF, < 10
150'C
Operating Junction Temperature Range T MIN to T MAX
LM611M
-55'C to + 125'C
LM6111
-40'Cto +85'C
LM611C
O'Cto +70'C
±1 kV
±250V
Abso/ute maximum ratings indicate limits beyond which
damage to the component may occur. Electrical specifications do not apply when operating the device beyond its
rated operating conditions.
Electrical Characteristics
These specifications apply for V- = GND = OV, V+ = 5V, VCM = V+ /2, VOUT = V+ 12, IR = 100 p.A, FEEDBACK pin
shorted to GND, any package, unless otherwise specified. Limits in standard typeface are for TJ = 25'C; limits in boldface type
apply for TMIN to TMAX.
Parameter
Conditions
Typical
(Note 5)
LM611M
LM611AI, LM6111
LM611C
Tested Design Tested Design Tested Design
Limit
Limit
Limit
Limit
Limit
Limit
(Note 6) (Note 7) (Note 6) (Note 7) (Note 6) (Note 7)
Total
Supply
Current
V+ Current, RLOAD = 00,
4V s; V+ s; 36VOverTJ Range
(Commercial 32V)
210
221
300
320
300
Supply
Voltage
Range
Meets Total Supply Current, and
See VR Change with V+ Change Test
2.2
2.9
2.B
3
2.B
46
43
37
36
36
±1.5
±2.0
±3.5
±5.0
±3.5
±1.0
±1.5
±3.5
±5.0
±3.5
±15
±25
±30
-10
-11
±20
±25
±25
±0.2
±0.3
±4
±4
±4
350
320
370
p.A max
p.A max
3
Vmin
Vmin
32
V max
V max
±7.0
mVmax
mVmax
±7.0
mVmax
mVmax
2.B
3
32
36
Units
OPERATIONAL AMPLIFIERS
Vos
Over
Supply
4V s; V+ s; 36V
(4V s; V+ s; 32V Commercial)
Vas
Over
VCM
VCM
=
OV through VCM
(V+ - 1.4V), V+
=
Average (Note B)
Vas
Drift
Input
Bias
Current
IS+IN and IS_IN
Input
Offset
Current
los
=
IS+IN - IS_IN
Average
los
Drift
Input
Resistance
Differential:
Common-Mode:
=
30V
±5.0
±6.0
±5.0
±6.0
max
p.VI'C
±35
±30
±40
nAmax
nAmax
±5
nAmax
nAmax
±4
±5
±4
pAI'C
1800
3800
MO
MO
3-517
......
....
»
.......
r
3:
Q)
......
.....
Electrical Characteristics
These specifications apply for TJ = 25°C, V- = GND = OV, V+ = 5V, VCM = V+/2, VOUT = V+I2, IR = 100 p.A,
FEEDBACK pin shorted to GND, any package, unless otherwise specified. Limits in standard typeface are for TJ = 25°C; limits
in boldface type apply for TMIN to TMAX. (Continued)
Parameter
Typical
(Note 5)
Conditions
Input
Cap.
C-to-GND, Non-Inverting Input
of Follower
Voltage
Noise
100 Hz, Input Referred
Current
Noise
100 Hz Bias Current Noise
Common V+ = 30V,
-Mode
OV:;:; VCM:;:; (V+ - 1.4V),
Reject CMRR = 20 log (IlVCMILWOS}
Ratio
Power
Supply
Reject
Ratio
4V:;:; V+ :;:; 30V, VCM = V+ 12,
PSRR = 20 log (IlV+/IlVos}
Voltage RL = 10 kfi to GND, V+ = 30V,
Gain,
5V :;:; VOUT :;:; 25V, Open-Loop
Open
Av = IIlVOUT/IlVINDIFFI
Loop
=
Slew
Rate
V+
30V, (Note 9)
GainBandwidth
Closed Loop Gain = -1000,
-3 dB Frequency x Gain,
CL = 50pF
LM611M
58
fAl-/Hz
95
90
85
80
80
110
100
85
80
80
500
50
100
40
100
±0.70
±0.65
±0.55
±0.45
±0.55
VOUT = 1.6V, V+IN
V-IN = 0.3V
ShortCircuit
Current
VOUT = OV, V+IN = 3V,
V -IN = 2V, Source:
VOUT
V -IN
= 5V, V+IN =
= 3V, Sink:
=
OV,
2V,
75
70
dB min
dB min
70
dB min
dB min
40
V/mV
min
±0.4S
V/p.s
min
75
75
75
94
40
±0.50
±0.45
0.79
0.52
OV,
Units
nV/-/Hz
MHz
VY-
lOUT
Sink
Design
Limit
(Note 7)
74
Output RL = 10kfitoV+
Voltage V+ = 36V (32V Commercial)
Swing
Low
=
LM611C
Tested
Limit
(Note 6)
pF
V+ - 1.4 V+ - 1.6
y+ - 1.6 y- - 1.8
VOUT = V+ -2.5V, V+IN
V-IN = -0.3V
Design
Limit
(Note 7)
5.7
Output RL = 10 kfi to GND
Voltage V+ = 36V (32V Commercial)
Swing
High
lOUT
Source
LM611AI, LM6111
Tested Design Tested
Limit
Limit
Limit
(Note 6) (Note 7) (Note 6)
+ 0.8 V- + 0.90
+ 0.9 Y- + 1.0
V+ - 1.7
V+ - 1.8
Y+ - 1.9
V-
+ 0.90
VY-
-25
-15
-20
-13
-20
17
15
8
14
9
-30
-40
-37
-48
-40
30
32
40
60
60
+
+ 0.95
1.0
Y-
+
V max
1.0 V max
-16
-13
-13
mAmax
mAmax
11
mAmin
mAmin
-50
mAmin
mAmin
90
mAmax
mAmax
13
11
-43
-48
70
80
3-518
Vmin
Y+ - 1.9 Vmin
r-
s:
Electrical Characteristics
These specifications apply for TJ = 25"C, V- = GND = OV, V+ = 5V, VCM = V+ /2, VOUT = V+ /2, IR = 100 /-,A,
FEEDBACK pin shorted to GND, any package, unless otherwise specified. Limits in standard typeface are for TJ = 25"C; limits
in boldface type apply for TMIN to TMAX. (Continued)
Parameter
Typical
(Note 5)
Conditions
LM611M
Tested
Limit
(Note 6)
Design
Limit
(Note 7)
LM611AI, LM6111
Tested
Limit
(Note 6)
Design
Limit
(Note 7)
Tested
Limit
(Note 6)
1.244
1.2390
1.2490
(±0.4%)
10
20
Average
Temp.
Drift
(Note 11)
Average
Time
Drift
TJ = 40"C
400
TJ = 150"C
1000
Hysteresis
Hyst = (Vro' - Vro)/II. TJ
(Note 12)
±3.2
VR
Change
with
Current
VR[100 ,..AI - VR[16 ,..AI
Resistance
VR
Change
with
High
1.2365
1.2515
(±O.S%)
Design
Limit
(Note 7)
Units
150
PPMrC
max
PPM/
kHr
PPM/
kHr
/-,vrc
±1
±1
±1
VR[10 mAl - VR[100 ,..AI
(Note 13)
1.5
2.0
5
5
5
II.VR[10 ~ 0.1 mAI/9.9 mA:
A]/84/-,A:
0.2
O.S
VR[Vro ~ Vrl - VR[Vro ~ 6.3VI
[5.0SV between Anode and
FEEDBACK)
2.5
2.8
II.VR[100~16
Vmin
V max
20
0.05
0.1
±1
± 1.1
mVmax
mVmax
5.5
5.5
mVmax
mVmax
0.56
13
0.56
13
flmax
flmax
10
mVmax
mVmax
± 1.3
mVmax
±1.5
mVmax
mVmax
3.0
mVmax
mVmax
-55
nAmin
nAmin
± 1.1
0.51
12
5
8
7
±1.2
5
7
10
VRO
VR
Change
with
V+
Change
VR[V+ ~ 5V] - VR[V+ ~ 36V]
(V+ = 32V Commercial)
VR
Change
with
-0.1
±1.2
-0.1
±1.2
0.01
0.01
±1
±1
±1
V+ = V+MAX
II.VR = VR (@ VANODE =
V- = GND) - VR
(@VANODE = V+ - 1.0V)
0.7
3.3
1.5
5.0
1.5
FEEDBACK
Bias
Current
IFB; VANODE';; VFB ,;; 5.0SV
-22
-29
-35
-40
-35
VR
Noise
10 Hz to 10,000 Hz, VRO = VR
VANODE
Change
VR[V+ ~ 5vI - VR[V+ ~ 3vI
±1.2
±1.3
1.S
4.0
30
mVmax
±1
±1.5
-50
-40
/-,VRMS
3-519
s:
0)
1.2191
1.2689
(:lc2%)
80
LMS11AI:
:r>
.......
r-
........
LM611C
VOLTAGE REFERENCE (Note 10)
Reference
Voltage
........
0)
........
CD
Electrical Characteristics Notes
....I
Note 1: More accurately, it is excessive current flow, with resulting excess heating, that limits the voltage on all pins. When any pin is pulled a diode drop belowV-,
a parasitic NPN transistor turns ON. No latch·up will occur as long as the current through that pin remains below the Maximum Rating. Operation is undefined and
:E
.....
........
Typical Performance Characteristics (Reference)
TJ = 25'C, FEEDBACK pin shorted to V- = av, unless otherwise noted
Reference Voltage vs Temp
on 5 Representative Units
Reference Voltage Drift
1.26
ll!
0.10
;"~
S
o:i
r--,...,.---r-,-,-,---"
D.D6
....
;"
g
0.Q4
f-+-+-+-+-'t---jl-t-I
f-+-+-+-+--+--jl-t-I
~ :~!!il~E8
~-D.02
S 1.2'
~
r-~ r--~ ..........
..........
1.23
-SO-40-2O 0 20 40
1.224
wm~+-4-~-+~T~J=-4~D'C~+-4
i-r-f-'"
1.25
§!
Accelerated Reference
Voltage Drift vs Time
so so 100120140
~ -o.D4
-oJl6
f-+-+-+-+-+--jf-t-I
-oJl6r-~~~~~~~
-0.10 L..L..l--'-...L...L--L......L....l
1=
S
~
!:; 1.220
§!
I
1.218
1.216
1.214
D 250 500 750 1000 1250 1500 1750 2DDD
JUNCIlON TEMPERAtuRE (cl
nUE
Reference Voltage vs
Current and Temperature
6 REPRESENTATIVE UNITSI" POINT AFFECTED BY HYSTERESIS HISTORY
r-
o
(hrs)
100
nME
Reference Voltage vs
Current and Temperature
200
300
~
-
400
500
BIASED AT 15D'C (hrs)
Reference Voltage vs
Reference Current
10r--~--r--r---'
0-IDOV
I
I
Vro=Vr
l~ocj
_-55OC
250C
1250C
~
V =6.3V
I
~~~'C
_
-55'C
1
2.1D'"" 2.10-< 2.10-' 2.11)",2
REFERENCE CURRENT (Al
-10'"2 -10'"' *10-' 10-<
REFERENCE CURRENT (A)
f
1(j2
REFERENCE CURRENT (A)
TL/H/9221-5
Reference Voltage vs
Reference Current
Reference AC
Stability Range
10-<
I I I
I I I
O.....10OV
-55OC
I
250C
7
12foc
K-IM
~·3
4.88M
_11)"'2 -10'" tl0-. 10'"
i<3
-10
~
-20
S
~
1!~
-30
-40
1~
250C
-f5~
I
~0123456
I
r-~
I
I~
~
3-36V
mMD.
1
~
§
<3
ii:!
I'
-10
-20
-30
-40
1 50C
1 100V 1 I
lZ;;
250C
b
-j5i
I
W 20 30 40
ANODE - TO - FEEDBACK VOLTAGE (V)
Reference Noise Voltage
vs Frequency
Reference Small-Signal
Resistance vs Frequency
10000
s:
it
~i:!
I
h
1000
100
10
10'
W 20 30 40
ANODE - TO - FEEDBACK VOLTAGE (vl
-55OC
250C
I
10
~0123'56
-55OC
'10DY'
20
REFERENCE SHUNT CURRENT (Al
Feedback Current vs
Feedback-to-Anode Voltage
~
r-Ik
I- 55 ~T :s d50C
t.2:SV'ro :S S.3V
10-2
REFERENCE CURRENT (Al
10
lD'""
~
-1
20
Feedback Current vs
Feedback-ta-Anode Voltage
FREQUENCY (Hz)
10'
105
FREQUENCY (Hz)
TL/H/9221-6
3-521
»
.......
rs::
a>
....
....
.....
.....
(j)
:!
....I
.......
10
10
I
00 4 812162024283236404448
l~
o
081624324048566472808896
VOLTAGE NOISE (nVR~sf>liZl
VOLTI.GE NOISE (PVRMSl
CURRENT NOISE (fAoMSf>liZl
TLIH/9221-13
Application Information
ence voltage. Varying that voltage, and so varying I" has
small effect with the equivalent series resistance of less
than an ohm at the higher currents. Alternatively, an active
current source, such as the LM134 series, may generate I,.
VOLTAGE REFERENCE
Reference Biasing
The voltage reference is of a shunt regulator topology that
models as a simple zener diode. With current I, flowing in
the 'forward' direction there is the familiar diode transfer
function. I, flowing in the reverse direction forces the reference voltage to be developed from cathode to anode. The
applied voltage to the cathode may range from a diode drop
below V- to the reference voltage or to the avalanche voltage of the parallel protection diode, nominally 7V. A 6.3V
reference with V+ = 3V is allowed.
Cathode
Anode
TL/H/9221-15
FIGURE 2. Reference Equivalent Circuit
TLlH/9221-14
FIGURE 1. Voltages Associated with Reference
(Current Source I, is External)
The reference equivalent circuit reveals how V, is held at
the constant 1.2V by feedback, and how the FEEDBACK pin
passes little current.
TL/H/9221-16
To generate the required reverse current, typically a resistor
is connected from a supply voltage higher than the refer-
FIGURE 3. 1.2V Reference
3-525
»
.......
rs::
en
......
......
TT-
U)
==
....I
.......
.....
ris:
....
....
0)
.------------------------------------------------------------------------------------.
~National
~ ~ Semiconductor
~
--~
--co
~
LM613A/LM613
Dual Operational Amplifiers, Dual Comparators, and
Adjustable Reference
General Description
Features (Guaranteed over temperature & supply)
The operational amplifiers are a versatile common-mode-tothe-negative-supply ("single supply") type similar to the
LM124 series, but with improved slew rate, improved power
bandwidth, reduced cross-over distortion, and low supply
current even when driven beyond output swing limits. The
comparators are also a common-mode-to-the-negative-supply type, similar to the LM139 series. The op amps and comparators have lateral PNP input transistors which enable low
input currents for large differential input voltages and swings
above V+.
OP AMPS AND COMPARATORS
1000 ILA
• Low operating current
(op amps & comparators)
16 /LA (reference)
4V to 36V
• Large supply voltage range
• Large output swing
(V- + 1V) to (V+ - 1.8V)
(10 kO load)
V- to (V+ - 1.4V)
• Input common-mode range
±36V
• Wide differential input voltage
The voltage reference is a three-terminal shunt-type bandgap similar to the adjustable LM185 series, but with anode
committed to the V- terminal and improved voltage accuracy to ±0.4%. Two resistors program the reference from
1.24V to 6.3V. The reference features operation· over a
shunt current range of 16 ILA to 20 mA, low dynamic impedance, broad capacitive load range, and cathode terminal
voltage ranging from a diode-drop below V- to above V+ .
REFERENCE
• Adjustable output voltage
• Tight initial tolerance available
• Tolerant of load capacitance
As a member of National's new Super-Block™ family, the
LM613 is a space-saving monolithic alternative to a multichip solution, offering a high level of integration without sacrificing performance.
Connection Diagram
1.2V to 6.3V
±0.4%
Applications
• Power supplies
• Signal conditioning
Order Number
Prime Military
Tested at -55·C, + 25·C, +125·C
Drift tested at - 55·C, + 25·C, + 125·C
LM613MJ
Prime Industrial
Tested at 25·C
Drift tested at -40·C, + 25·C, +85·C
LM613AIN
Industrial
Tested at + 25·C
LM6131N
LM6131J
LM6131WM
Commercial
Tested at +25·C
LM613CN
LM613CWM
L--r CATHODE
TL/H/922S-1
Top View
Order Number LM6131J, LM613MJ, LM613CWM,
LM613IWM, LM613AIN, LM613CN or LM6131N
See NS Package Number J16A, M16B or N16A
Packages
J
N
WM
3-528
Hermetic Dual-In-Line
Plastic Dual-In-Line
Plastic Surface Mount Wide (0.3")
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
Soldering Information
J, N Packages
Soldering (10 seconds)
260'C
WM Package
215'C
Vapor Phase (60 seconds)
. Infrared (15 seconds)
220'C
See AN·450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage on Any Pin Except Cathode Pin (referred to V - pin)
(Note 2)
-0.3V(Min)
(Note 3)
LM613M, LM613AI, LM6131
36V
32V
LM613C
±20mA
Current through Any Input Pin & Cathode Pin
Differential Input Voltage
LM613M, LM613AI, LM6131
LM613C
Short Circuit Duration, Op Amp (Note 4)
Storage Temperature Range
Maximum Junction Temperature
Thermal Resistance, Junction-to·Ambient (Note 5)
LM613MJ, LM6131J
100'C/W
LM613AIN, LM6131N, LM613CN
95'C/W
LM6131WM, LM613CWM
144'C/W
ESD Tolerance (Note 6)
±1 kV
±36V
±32V
Continuous
-65'C to + 150'C
Operating Junction Temperature Range TMIN to TMAX
LM613M
- 55'C to + 125'C
- 40'C to + 85'C
LM6131
O'Cto +70'C
LM613C
150'C
Electrical Characteristics These specifications apply for V-
= GND = OV, V+ = 5V, VCM = VOUT = V+ /2,
IR = 100 p.A, FEEDBACK pin shorted to GND, unless otherwise specified. Limits in standard typeface are for TJ = 25'C; limits
in boldface type apply for TMIN to TMAX.
LM613M
Parameter
Typ
(Note 7)
Conditions
=
Total Supply
Current
V+ Current, RLOAD
4V ~ V+ ~ 36V
(32V for LM613C)
Supply Voltage
Range
Total Supply Current
Specification is Met
00,
LM613AI,
LM6131
LM613C
Tested Design Tested Design Tested Design
Limit
Limit
Limit
Limit
Limit
Limit
(Note 8) (Note 9) (Note 8) (Note 9) (Note 8) (Note 9)
450
550
900
1000
940
2.2
2.9
2.8
3
2.8
46
43
36
38
36
4V ~ V+ ~ 36V
(32V for LM613C)
±1.5
±2.0
±3.5
±5.0
±3.5
Offset Voltage
overVCM
OV ~ VCM ~ (V+ - 1.4V),
V+ = 30V
±1.0
±1.5
±3.5
±5.0
±3.5
Average Offset
Voltage Drift
LM613M and LM613AI
Op Amp 3 Only, (Note 10)
15
25
30
1000
1000
1070
p.A(Max)
p.A(Max)
3
V (Min)
V (Min)
32
V (Max)
V (Max)
±7.0
mV(Max)
mV(Max)
±7.0
mV(Max)
mV(Max)
2.8
3
32
38
Units
OPERATIONAL AMPLIFIERS
Offset Voltage
±20
±25
±25
Input Offset
Current
±0.2
±0.3
±4
±4
±4
Input
Capacitance
Differential
Non·lnv. Input to GND
p'vrc
(Max)
-10
-11
Input Resistance
±5.0
±8.0
Input Bias
Current
Average Offset
Current Drift
±5.0
±6.0
±35
±30
±40
nA(Max)
nA(Max)
±5
nA(Max)
nA(Max)
±4
±5
±4
pAl'C
>1000
Mfl
0.6
6
pF
pF
3·529
•
Electrical Characteristics These specifications apply for V-
= GND =OV.:V+ = 5V. VCM = VOUT;" V+ 12.
IR = 100 ,.A. FEEDBACK pin shorted to GND. unless otherwise specified. Limits in standard typeface are for TJ = 25D C; limits
;::,
in boldface type apply for TMIN to TMAX. (Continued)
LM613M
Parameter
Typ
(Note 7)
Conditions
LM613AI,
LM6131
Tested Design Tested
Umlt
Limit
Limit
(Note 8) (Note 9) (Note 8)
Design
Umlt
(Note 9)
LM613C
Tested
Urnlt
(Note 8)
Design
Urnlt
(Note 9)
Units
OPERATIONAL AMPUFIERS (Continued)
Voltage Noise
f = 100 Hz
74
Current Noise
f = 100 Hz
58
Common-Mode OV S; VCM S; (V+ - 1.4V).
Rejection Ratio V+ = 30V
95
90
85
80
80
Power Supply 4V S; V+ S; 30V.
Rejection Ratio VCM = V+/2
100
90
85
80
80
500
50
100
40
100
±0.70
±0.65
±0.55
±0.45
±0.55
Voltage Gain.
Open Loop
RL = 10 kG to GND.
V+ = 30V
5V S; VOUT S; 25V
Slew Rate
V+ = 30V(Notell)
Gain-Bandwidth CL=50pF
Product
Output Voltage RL = 10 kG to GND.
V+ = 36V
Swing
(32V for LM613C)
RL = 10kGtoV+.
V+ = 36V
(32V for LM613C)
Output Current VOUT = V+ - 2.5V.
(Sourcing)
V+IN = OV
V-IN = -0.3V
nVlv'Hz
fAlv'Hz
75
V/,.s
±0.45
(Min)
MHz
MHz
V+ - 1.4 V+ -1.6
y+ - i.e y+ - 1.8
V+ - 1.7
V- +0.8 V- + 0.90
'Y- + 0.9 Y- + 1.0
V- + 0.90
V+ - 1.8
y+ - 1.9
V~
+ ,0.95
Y- + 1.0
15
8
14
-30
-40
-37
-46
-40
30
32
40
60
60
Offset Voltage 4V S; V+ S; 36V
(32V for LM613C).
RL=15kG
±1.0
±2.0
±2.5
±4.0
±3.0
Offset Voltage OV S; VCM (V+ - l.4V).
V+ = 30V. RL = 15 kG
overVCM
±1.0
±1.5
±2.5
±4.0
±3.0
VOUT = 5V.
V+IN = 2V
V-IN = 3V
V/mV
(Min)
0.8
0.5
17
9
(Sinking)
40
±0.50
±0.45
-20
Output Short- VOUT = OV.
Circuit Current V+IN = 3V
(Sourcing)
V-IN = 2V
dB (Min)
dB (Min)
94
40
-20
-13
VOUT = 1.6V.
V+IN = OV
V-IN = -0.3V
70
75
75
-25
-15
(Sinking)
70
dB (Min)
dB (Min)
75
V (Min)
y+ - 1.9 V (Min)
V (Max)
Y- + 1.0 V (Max)
-16
-13
-13
mA(Max)
mA(Max)
11
mA(Min)
mA(Min)
-50
mA(Min)
mA(Min)
90
mA(Max)
mA(Max)
±7.0
mV(Max)
mV(Max)
±7.0
mV(Max)
mV(Max)
13
11
-43
-48
70
80
COMPARATORS
Average Offset
Voltage Drift
15
Input Bias
Current
-5
-8
±5.0
±6.0
±5.0
±6.0
,.vrc
(Max)
±20
±25
3-530
±25
±35
±30
±40
nA(Max)
nA(Max)
Electrical Characteristics These specifications apply for V-
= GND = OV, V+ = 5V, VCM = VOUT = V+ /2,
IR = 100 ".A, FEEDBACK pin shorted to GND, unless otherwise specified. Limits in standard typeface are for TJ = 25·C; limits
in boldface type apply for TMIN to TMAX. (Continued)
LM613M
Parameter
Conditions
Typ
(Note 7)
LM613AI,
LM6131
LM613C
Tested Design Tested Design Tested Design
Limit
Limit
Limit
Limit
Limit
Limit
(Note 8) (Note 9) (Note 8) (Note 9) (Note 8) (Note 9)
Units
COMPARATORS (Continued)
Input Offset
Current
±0.2
±0.3
±4
±4
±4
±4
±5
±5
nA(Max)
nA(Max)
Voltage Gain
RL = 10 kO t036V
(32V for LM613C),
2V ,,; VOUT ,,; 27V
500
100
V/mV
V/mV
Large Signal
Response Time
V+IN = 1.4V,
V -IN = TTL Swing,
RL = 5.1 kO
1.5
2.0
".S
".S
Output Sink
Current
V+IN = OV,
V-IN = 1V,
VOUT = 1.5V
20
13
12
8
10
2.8
2.4
1.0
0.8
1.0
0.1
0.2
10
10
10
10
".A(Max)
".A(Max)
1.244
1.2390
1.2490
(±0.40/0)
1.2365
1.2515
(±0.60/0)
1.2191
1.2689
(±20/0)
V (Min)
V (Max)
10
20
VOUT
Output Leakage
Current
=
O.4V
V+IN = 1V,
V-IN = OV,
VOUT = 36V
(32V for LM613C)
10
8
8
mA(Min)
mA(Min)
0.5
mA(Min)
mA(Min)
0.8
0.5
VOLTAGE REFERENCE (Note 12)
Reference
Voltage
Average Temp.
Drift
(Note 13)
Average Time
Drift
TJ = 40·C
TJ = 150·C
400
1000
Hysteresis
(Note 14)
±3.2
VR Change with
Current
VR[100 "A] -VR[16 "A]
0.05
0.1
±1
±1
±1
VR[10 rnA] -VR[100 "A]
(Note 15)
1.5
2.0
5
5
5
Resistance
AVR[10 --. 0.1 mA]/9.9 mA
AVR[100 --.16 "A]/84".A
0.2
0.6
VR Change with
HighVRO
VR[Vro-Vr] - VR[Vro-6.3V]
(5.06V between Anode and
FEEDBACK)
2.5
2.8
5
8
7
VR Change with
V+ Change
VR[V+=5V]- VR[V+=36V]
(V+ = 32V for LM613C)
0.1
0.1
±1.2
±1.2
±1.2
0.Q1
0.01
±1
±1
±1
-22
-29
-35
-40
-35
VR[V+ -5V]-VR[V+ =3V]
FEEDBACK Bias VANODE ,,; VFB ,,; 5.06V
Current
Voltage Noise
80
LM613AI
BW= 10 Hz to 10kHz,
VRO = VR
150
20
ppml"C
(Max)
ppm/kH
ppm/kH
".VI"C
± 1.1
mV(Max)
mV(Max)
5.5
5.5
mV(Max)
mV(Max)
0.56
13
0.56
13
o (Max)
o (Max)
10
mV(Max)
mV(Max)
±1.3
mV(Max)
mV(Max)
±1.5
mV(Max)
mV(Max)
-55
nA(Min)
nA(Min)
±1.1
0.51
12
30
±1
5
7
10
±1.2
±1.3
±1
±1.5
-50
-40
",VRMS
3-531
•
Electrical Characteristics (Continued)
Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specHications do not apply when operating the
device beyond its rated operating conditions.
Note 2: Input voltage above V+ Is allowed. As long as one Input pin voltage remains inside the common-mode range, the comparator will deliver the correct output
Note 3: More accurately, it is excessive current flow, with resulting excess heating, thai limits the voltages on all pins. When any pin is pulled a diode drop below
V-, a parasitic NPN transistor tums ON. No latch-up will occur as long as the current through that pin remalns below the Maximum Rating. Operation Is undefined
and unpredictable when any parasitic diode or transistor is conducting.
Note 4: Simultaneous short-circuit of multiple op amps or comparators while using high supply voltages may force junction temperature above maximum, and thus
should not be continuous.
Note 5: Junction temperature may be calculated. using TJ = TA + Po 8JA. The given thermal resistances are worst-case for packages in sockets in still alr.
Nominal8JA are 8S'C/W for LM613 in J package, 8fJ'C/W for the N package, and 135'C/W for the WM package, for packages soldered to copper-<:Iad board with
dissipation from one op amp. comparator, or reference output transistor.
Note 6: Human body model, 100 pF discharged through a I.S kO resistor.
Note 7: Typical values in standard Iypeface are for TJ = 2S'C; values in boldface type apply to the military temperature range. These values represent the most
likely parametric norm.
Note 8: Testad IimHs are guaranteed and 100% tested.
Note 9: Design limits are guaranteed via correllation, but are not 100% tested.
Note 10: Offset voltage drift is calculated from the measurement of the offset voltage at 2S'C and at the temperature extremes. The drift is /;, Vos/ /;, T, where /;, Vos
is the lowest value subtracted from the highest and /;, T is the temparature range.
Note 11: Slew rate is measured with the op amp in a voltage follower configuration. For rising slew rate, the input voltage is driven from SV to 2SV, and the outpul
voliage transition is sampled at 10V and 20V. For falling slew rale, the input voltage is driven from 2SV to SV, and the oulput voltage transistion is sampled at 20V
and 10V.
Note 12: VRO Is the Cathode-t<>-Anode voltage (i.e. the reference output voltage, 1.2V to 6.3V). VR is the Cathode-t<>-FEEDBACK voltage (nominally 1.2V).
Note 13: Average reference drift is calculated from the measurement of Ihe reference voltage at 2S'C and at Ihe temperature extremes. The drift, in ppm/'C, is
tOe./;,VRIVR[25'C]o/;,TJ, where /;,VR is the lowest value subtracted from the highest, VR[2S'C] is the value at 2S'C, and /;,TJ is the temperature range.
·Note 14: Hysteresis is /;,VRO//;,TJ, where /;,VRO is the change In VRO caused by a change In TJ, after the reference has been "dehysterized". To dehysterize the
reference, ils junction lemperature should be cycled in the following pattern, spiraling in loward 2S'C: 2S'C, 125'C, - SS'C, 85'C, - 4O'C, 7fJ'C, fJ'C, 25'C.
Note 15: Low contact resistance is required for accurate measurement
3-532
r-----------------------------------------------------------------------------,
r
3:
en
w
...
Simplified Schematic Diagrams
»
.....
r
OpAmp
...3:enw
TL/H/9226-2
Comparator
v+
OUT
vTLlH/9226-3
Reference
Bias
•
TLlH/9226-4
3-533
,...
CO)
!i
....
~
Typical Performance Characteristics (Reference)
= 25'C, FEEDBACK pin shorted to V- = OV, unless otherwise noted
TJ
Reference Voltage vs Temp.
-
1.26
E
l!i
!:l
1.25
1-" ......
......
I-"
~
I
-I- ~.r
0.10
g
1.22.
I
o.oa
o.oa
TJ = 4O"C
E
0.04
-.., t---r-.. ............
......,
:;:::-
1.222
t!l
!:l
f:
1.220
~
Ij
'::,..()J)2
1.2.
Accelerated Reference
Voltage Drift vs Time
Reference Voltage Drift
~ -o.D4
is 1.218
e;
-0.0&
1.216
!l1
r--.
-
-o.oa
1.23
-60-40-20 0 20 40 60 80 100120140
-0.10
<
o
1.214
o
250 500 750 1000 1250 1500 1750 7IXXl
100
nWE (Hours)
JUNCTION TEMPERATURE (C)
Reference Voltage vs
Current and Temperature
Reference Voltage vs
Current and Temperature
10~
200
300
400
500
TIME BlASm AT 15O"C (hrs)
Reference Voltage vs
Reference Current
__~--,----.---,
5
Vro=Vr
I
4
I
125"C
2
-r--~::;
125"C
om
0.2
om
20
REFERENCE CURRENT (rnA)
100
t:"
10
.3
ON100V
~KN1M
1'·9
f - - -, 25"C
r--
~ 12f"C
A
4.88M
!i!
t!!
~
0.01
1
REFERENCE CURRENT (rnA)
Reference AC
Stability Range
7
I
-10
0.2
REFERENCE CURRENT (rnA)
Reference Voltage vs
Reference Current
r-r- - -550(
=--
1
,
[:ffiI
g
1000
~
~
100
!i!
I
l!i
~
10
~
I
0.1
10
100
1000
FREQUENCY (Hz)
10000
0.1
10
100
1000
FREQUENCY (kHz)
TUH/9226-5
3-534
,-----------------------------------------------------------------------------, I
3:
Typical Performance Characteristics (Reference) (Continued)
TJ = 25'C, FEEDBACK pin shorted to V- =
Q)
-.
Co)
av, unless otherwise noted
Reference Voltage with
FEEDBACK Voltage Step
Reference Power-Up Time
Reference Voltage with
100 - 12 p.A Current Step
2n-'-'-~'-OT-.-n
F£EDBCK-TO-ANODE VOLTAGE
5.06V
J>
.....
I
3:
Q)
-.
Co)
ov
1~1'-- ~I\
6
f'o=
5
4
3
2
I
0
100
200
300
.jQO
\ V",
-I~~~~~~--~~
o
100 200 300
TIME (}Is)
8
I
~
~
,-
2.0
>e.
-3
-4
-5
1.0
0.5
R,=lIV",llll,=0.23.1l0 125"1:
~
I,STEPIIII ,OOpA lI'OmA
m -0.5
100 200 300 400 500 600 700
TIME (}Is)
Reference Change vs
Common-Mode Voltage
(v+-2) (v+-I)
v+
10
..2~
-1.0
100 200 300 400 500 600 700
-5~"I:
!
~
~
"
~
'-....
/-.,15"1: I-- I-25"1:
-;5"1:
-i~:g~
o
I
+
-10
-15
TIME (ms)
TIME (}Is)
-~OpA
-5
§!
7
250(:1
v+=32V
!:i
125
II
1111
o
~
§!
!:i
3~
~
1.5
!
b =
-2
o
60D 700
Reference Voltage Change
with Supply Voltage Step
l
!
sao
TIME (}Is)
Reference Step Response
for 100 p.A - 10 mA
Current Step
1 1\6
.jQO
125"1:
I
~ v.node
I
V"=GND
o
5 101520 2530.030.531.031.532.0
REFERENCE ANODE -TO- V" VOLTAGE (V)
TLlH/9226-6
Typical Performance Characteristics (Op Amps)
v+ =
5V,
v- =
v+
GND =
av, VCM = v+ /2, VOUT = v+ /2, TJ =
Input Common-Mode
Voltage Range vs
Temperature
25'C, unless otherwise noted
Input Bias Current vs
Common-Mode Voltage
Vas vs Junction
Temperature
20
4
OUWUT GOES LOW
~v+-0.5
~
~
v+- I
§!
gV+-1.5
"
I
I
••.J......
!
~
1-1- 1-1-"
!:i
§!
t;
NORMAL OPERATING RANGE
V"
V"-0.5
-r-
1'--1'--
I--.
~
0
J-l-I......
10
:!
--:::t'j
"-55"1:
~
a
I-r- ~~ ~ .......
:::::F
i--"
-2
-1
-3
OUWUT GOES LOW
V"- I
-60-40-20 0 20 40 60 80 100120140
-
1
I
125';5'1
15
Ii
-5
~
i..-'V
:ua
-10
,"-~5"1:
6
I
L
V+=5V
I
-20
-I 0 I 2 3 4 5 10 20 40 60 80
JUNCTION TEMPERATURE (e)
Large-Signal
Step Response
25"1:
III I
-15
-4
-60-40-20 0 20 40 60 80 100120140
JUNCTION TEMPERATURE (e)
I
25"1:
125"1:
INPUT VOLTAGE (V)
Output Voltage Swing
or vs Temp. and Current
v+=15V
I--!r-f--ft---I\-+ fo':;'ii~
I
1-1-
,....
ro';' LOAD
~I-
__
\
I
5Yi LOt
LOAD
11-1-
I
-4/Y-+--+-+
__~~
01020304050
_6L-~
4=- ~~ 1-1sl ~
L-~
V"
-60-40-20 D 20 40 60 80 100120140
TIME (}Is)
JUNCTION TEMPERATURE (e)
TLlH/9226-7
3-535
•
~
..-
r-------------------------------------------------------------------------------------~
CD
Typical Performance Characteristics (Op Amps)
....I
V+ = 5V, V- = GND = OV, VCM = V+ 12, VOUT = V+ 12, TJ = 25'C, unless otherwise noted
:i!i
~..-
Output Source Current vs
Output Voltage and Temp.
CD
~
~'
20
V+ 1N =V""+IV
!
;
-10
I
-30
-20
~
B
5
5
I
2S"C
-55"C
-
""u
....
:::>
D-
~
0.1
1250C
20
f
10
O
-10
0.01
V
3D
250C
&'
on
on
I
-
L/
~
--'
-20
0.0
0.5
1.0
1.5
2.0
2.5
3.0
V- 10 20 30 40 50 60
70
INPUT VOLTAGE REFERRED TO V-- (V)
OUTPUT VOLTAGE (V)
TLlH/9226-11
TLlH/9226-10
3-537
•
~
.....
CD
:i
~
.....
CD
:i
,---------------------------------------------------------------------------------,
Typical Performance Characteristics (Comparators) (Continued)
Comparator
Response Time_Inverting
Input, Positive Transition
5
II
"
Comparator
Response Time_Inverting
Input, Negative Transition
5
(fT~v-4-
"
.J
I I, ¥I~K
~.r ~Vo
II
~
+125OC f-
3
1
-:?
1
/ +25OC
F
o o.s
+r
.......
..,4
:
+5mV
~ 0
-5mV
IN
+125OC
2
0
I
V~K~VO
+~5OCI
3
-55OC
2
-550C 5V I
'11
+5mV
~ 0
-5mV
o
1 1.5 2 2.5 3 3.5 "
*
0.5 1 1.5 2 2.5 3 3.5 "
nme (1'.)
nme (1'0)
TL/H/9226-12
TLlH/9226-13
Comparator
Response Tlme_Non-lnverting
Input, Positive Transition
5
/ "I 1/
"
I
3
I
2
II
-
I
I
\ V~K~Vo
IN
3
+r
-
+25OC
2
-55OC
~
-:?
~~
o o.s
5V
l\
"
~Vo
+25OC
+125OC
0
+5mV
~ 0
-5mV
5
I
.r
¥1iP-f
5V
-55ocj III
1
-:?
I
I
I
Comparator
Response Tlme_Non-lnvertlng
Input, Negative Transition
+125OC
"'"
0
~~
+5mV
~ 0
-5mV
o o.s
1 1.5 2 2.5 3 3.5 "
Time
nme tJ's)
*
1 1.5 2 2.5 3 3.5 "
tJ'0)
TL/H/9226-15
TLlH/9226-14
Comparator
Response Time_Inverting
Input, Positive Transition
~
15
'""";:!:
10
§!
5
....
....=>
I!:
0
0
0
-5
> -10
-15V
5V
~ 0
-5V
lL
'J VI~K
r7r'15V
+25OC
=>
Comparator
Response Time_Inverting
Input, Negative Transition
J
,
IN.r
-15V
') +125OC
II I
fA
I
15
'"...."";:!:
10
§!
Vo
....
=>
~_
I!:
~
0
+25OC
> -10
-15V
SV
~ 0
-5V
1.0 1.2 104 1.6 1.8
~
Yo
-SSOC
h\-+12SOC
ll\
o
0.20040.6OB1DUlo4UI.8
nme
TLlH/9226-16
• .I':
-S
0
nme (1'.)
IN
-15V
0
I I
vfriK
\
15V
1\
5
=>
-55OC
o 0.2 0.4 0.6 OB
~
tJ'.)
TLlH/9226-17
3-538
Typical Performance Characteristics (Comparators) (Continued)
Comparator
Response Times-Non-Inverting
Input, Positive Transition
~
15
'"....;:!:
10
...
...g
:::>
1=
:::>
0
5
~
_
15V
-
Vo
1/ ~ V
I. I
rt /
+125~!J
it t
15
'"....;:!:
10
0
5
0-
::::>
0
0
j
+25"C
-
I I
ifriK15V
VIN
-5
0
~MMMln121A~lB
,
_.1".
-15V
> -10
-15V
5V
z
:> 0
-5V
VJ
o
...
:::>
+25"C
0
~
...>
...
-55 "C
-5
> -10
-15V
5V
~ 0
-5V
I
VM~f~
-15V
0
I
Comparator
Response Tlmes-Non-Invertlng
Input, Negative Transition
~
Vo
+125"C
-55"C
J
o 02 OA M OB In 12 lA 1.6 lB
TIme ()£s)
TIme (}Js)
TL/H/9226-19
TUH/9226-18
Typical Performance Distributions
Average Vos Drift
Military Temperature Range
Average Vos Drift
Industrial Temperature Range
40,------------------,
30
~
:::>
20
Vos DRIFT ()£VIC)
TL/H/9226-20
TUH/9226-21
Average Vos Drift
Commercial Temperature Range
Average los Drift
Military Temperature Range
30.------------------,
20~------------------~
o
Ves DRIFT ()£V/C)
6
12
18
24
30 36 42
los DRIFT (pA/C)
TL/H/9226-23
TL/H/9226-22
3-539
r---------------------------------------------------------------------------------,
....
CD
~
:!!
Typical Performance Distributions (Continued)
...I
Op Amp Voltage
NOise Distribution
Average los Drift
Industrial Temperature Range
~
....
CD
30 100 Hz
:5
Amps 1, 2, 3, 4
15~------------------~
20+-----------~~----~
~ 10~------------------~
:::>
10+-----------~~----~
5~~r-------------~
o
VOLTAGE NOISE (nVRMS /1ilZ)
los DRIFT (pA/C)
TL/H/9226-24
TLlH/9226-27
Op Amp Current
Noise Distribution
Average los Drift
Commercial Temperature Range
Amps 1, 2, 3, 4
CURRENT NOISE (fARMS 11HZ)
los DRIFT (pAle)
TL/H/9226-25
TL/H/9226-28
Voltage Reference Broad-Band
Noise Distribution
Application Information
30.-----------------~
VOLTAGE REFERENCE
10:5 f:51 0,000 Hz
Reference Biasing
The voltage reference is of a shunt regulator topology that
models as a simple zener diode. With current Ir flowing in
the "forward" direction there is the familiar diode transfer
function. Ir flowing in the reverse direction forces the reference voltage to be developed from cathode to anode. The
cathode may swing from a diode drop below V- to the reference voltage or to the avalanche voltage of the parallel
protection diode, nominally 7V. A 6.3V reference with V+ =
3V is allowed.
20+-----------~------~
10+---------~~------~
o+.-...,......,..,...,..~T"T"T"
o 4 812162024283236404448
VOLTAGE NOISE (PVRMS)
TLlH/9226-26
Anode committed to VTL/H/9226-29
FIGURE 1. Voltage Associated with Reference
(current source Ir Is external)
3·540
.-----------------------------------------------------------------------------'r
3:
c:n
Application Information (Continued)
....
The reference equivalent circuit reveals how V, is held at
Co)
15V
the constant 1.2V by feedback, and how the FEEDBACK pin
passes little current.
~
r
lOOk
3:
c:n
....
To generate the required reverse current, typically a resistor
is connected from a supply voltage higher than the reference voltage. Varying that voltage, and so varying I" has
small effect with the equivalent series resistance of less
than an ohm at the higher currents. Alternatively, an active
current source, such as the LM134 series, may generate I,.
Co)
TL/H/9226-32
Cathode
FIGURE 4. Thevenin Equivalent of Reference
with SV Output
Rl
39k
M--",!1=32J.&A
Anode=V-
3.76V
TUH/9226-30
R2
......- - - - ' 118k
FIGURE 2. Reference Equivalent Circuit
TUH/9226-33
R1
R2
= V,/I = 1.24/32,.. = 39k
= R1 ((V,olV,) - 1\ = 39k ((5/1.24)
- 1)} = 118k
FIGURE S. Resistors R1 and R2 Program Reference
Output Voltage to be SV
Understanding that V, is fixed and that voltage sources, resistors, and capaCitors may be tied to the FEEDBACK pin, a
range of V, temperature coefficients may be synthesized.
TUH/9226-31
FIGURE 3. 1.2V Reference
CapaCitors in parallel with the reference are allowed. See
the Reference AC Stability Range typical curve for capacitance values-from 20 /LA to 3 mA any capacitor value is
stable. With the reference's wide stability range with resistive and capacitive loads, a wide range of RC filter values
will perform noise filtering.
Adjustable Reference
The FEEDBACK pin allows the reference output voltage,
V,o, to vary from 1.24V to 6.3V. The reference attempts to
hold V, at 1.24V. If V, is above 1.24V, the reference will
conduct current from Cathode to Anode; FEEDBACK current always remains low. If FEEDBACK is connected to Anode, then V,o = V, = 1.24V. For higher voltages FEEDBACK is held at a constant voltage above Anode-say
3.76V for Vro = 5V. Connecting a resistor across the constaint V, generates a current I = R1IV, flowing from Cathode
into FEEDBACK node. A Thevenin equivalent 3.76V is generated from FEEDBACK to Ancde with R2=3.76/1. Keep I
greater than one thousand times larger than FEEDBACK
bias current for <0.1 % error-I;;:' 32 /LA for the military
grade over the military temperature range (I;;:, 5.5 /LA for a
1% untrimmed error for a commercial part).
TUH/9226-34
FIGURE 6. Output Voltage has Negative Temperature
Coefficient (TCl if R2 has Negative TC
3-541
.,... r-----------------------------------------------------------------------------------------,
~
CD
::::IE
Application Information (Continued)
....I
v
15V
~.,...
CD
::::IE
....I
TLlH/9226-35
TLlH/9226-38
FIGURE 7. Output Voltage has Positive TC
If R1 has Negative TC
FIGURE 10. Proportional-to-Absolute-Temperature
Current Source
15V
v
10k
TLlH/9226-39
FIGURE 11. Negative-TC Current Source
TLlH/9226-36
FIGURE 8. Diode in Series with R1 Causes Voltage
Across R1 and R2 to be Proportional to Absolute
Temperature (PTAT)
Connecting a resistor across Cathode-to-FEEDBACK creates a 0 TC current source, but a range of TCs may be
synthesized.
Reference Hysteresis
The reference voltage depends, slightly, on the thermal history of the die. Competitive micro-power products varyalways check the data sheet for any given device. Do not
assume that no specification means no hysteresis.
OPERATIONAL AMPLIFIERS AND COMPARATORS
v
~16J1A~
Any amp; comparator, or the reference may be biased in
any way with no effect on the other sections of the LM613,
except when a substrate diode conducts (see Electrical
Characteristics Note 1). For example, one amp input may be
outside the common-mode range, another amp may be operating as a comparator, and all other sections may have all
terminals floating with no effect on the others. Tying inverting input to output and non-inverting input to V- on unused
amps is preferred. Unused comparators should have non-inverting input and output tied to V+, and inverting input tied
to V-. Choosing operating point that cause OSCillation, such
as driving too large a capacitive loael, is best avoided.
·.r--+
TL/H/9226-37
I = Vr/RI = 1.24/R1
FIGURE 9. Current Source is Programmed by R1
Op Amp Output Stage
These op amps, like the LM124 series, have flexible and
relatively wide-swing output stages. There are simple rules
to optimize output swing, reduce cross-over distortion, and
optimize capacitive drive capability:
1) Output Swing: Unloaded, the 42 p.A pull-down will bring
the output within 300 mV of V- over the military temperature range. If more than 42 p.A is required, a resistor
from output to V- will help. Swing across any load may
be improved slighlly if the load can be tied to V+, at the
cost of poorer sinking open-loop voltage gain.
3-542
r------------------------------------------------------------------------.r
s::
Application Information
(Continued)
2) Cross-Over Distortion: The LM613 has lower cross-over
distortion (a 1 VBE deadband versus 3 VBE for the
LM124), and increased slew rate as shown in the characteristic curves. A resistor pull-up or pull-down will force
class-A operation with only the PNP or NPN output transistor conducting, eliminating cross-over distortion.
3) Capacitive Drive: Limited by the output pole caused by
the output resistance driving capacitive loads, a pulldown resistor conducting 1 mA or more reduces the output stage NPN re until the output resistance is that of the
current limit 250. 200 pF may then be driven without
oscillation.
Comparator Output Stage
The comparators, like the LM139 series, have open-collector output stages. A pull-up resistor must be added from
each output pin to a positive voltage for the output transistor
to switch properly. When the output transistor is OFF, the
output voltage will be this external positive voltage.
....
0)
For the output voltage to be under the TTL-low voltage
threshold when the output transistor is ON, the output current must be less than 8 mA (over temperature). This impacts the minimum value of pull-up resistor.
~
......
The offset voltage may increase when the output voltage is
low and the output current is less than 30 ,...A. Thus, for best
accuracy, the pull-up resistor value should be low enough to
allow the output transistor to sink more than 30 ,...A.
Co)
r
s::
....
0)
Op Amp and Comparator Input Stage
The lateral PNP input transistors, unlike those of most op
amps, have BVEBO equal to the absolute maximum supply
voltage. Also, they have no diode clamps to the positive
supply nor across the inputs. These features make the inputs look like high impedances to input sources producing
large differential and common-mode voltages.
Typical Applications
For typical applications, refer to the LM124 Op Amp, LM139
Comparator, and LM185 Adjustable Reference datasheets.
•
3-543
....
~ ~National
~ ~ Semiconductor
....
CD
~ r---------------------------------------------------------------------------~
:5
LM614A/LM614 Quad Operational Amplifiers
and Adjustable Reference
General Description
Features (Guaranteed over temperature & supply)
The quad operational amplifiers are a versatile commonmode-to-the-negative-supply ("single supply") type similar
to the LM124 series, but with improved slew rate, improved
power bandwidth, reduced cross-over distortion, and low
supply current even while driven beyond swing limits. Lateral PNP input transistors enable low input currents for large
differential input voltages and swings above V+.
OpAmps
• Low operating current
The voltage reference is a three-terminal shunt-type bandgap similar to the adjustable LM185 series, but with anode
committed to the V- terminal and improved voltage accuracy to ±0.4%. Two resistors program the reference from
1.24V to 6.3V. The reference features operation over a
shunt current range of 16 ,.A to 20 mA, low dynamic impedance, broad capacitive load range, and cathode terminal
voltage ranging from a diode-drop below V- to above V+ .
As a member of National's new Super-Block™ family, the
LM614 is a space-saving monolithic alternative to a multichip solution, offering a high level of integration without sacrificing performance.
Connection Diagram
250 ,.A (per op amp)
16 ,.A (reference)
4V to 36V
• Large supply voltage range
• Large output swing
(10k load)
(V- + 1V) to (V+ - 1.8V)
• Input common-mode includes
V- to (V+ - 1.4V)
• Wide input differential voltage
± 36V
• Standard quad op amp pin-out
Reference
1.2V to 6.3V
• Adjustable output voltage
±0.4%
• Tight initial tolerance available
o to 00
• Tolerant of load capaCitance
Applications
• Power supplies
• Signal conditioning
Order Number
TUH/9326-1
Prime Military
Tested at -55'C, + 25'C, +125'C
Drift tested at - 55'C, + 25'C, + 125'C
LM614MJ
Prime Industrial
Tested at + 25'C
Drift tested at -40'C, +25'C, +85'C
LM614AIN
Industrial
Tested at + 25'C
LM6141N
LM6141J
LM6141WM
Commerlcal
Tested at + 25'C
LM614CN
LM614CWM
Top View
Order Number LM6141J, LM614MJ, LM614CWM,
LM614IWM, LM614AIN, LM614CN or LM6141N
See NS Package Number J16A, M16B or N16A
Packages
J
N
WM
3-544
Hermetic Dual-In-Line
Plastic Dual-In-Line
Plastic Surface Mount Wide (0.3")
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage on Any Pin except Cathode Pin
(referred to V- pin)
(Note 1)
-0.3V(Min)
Military and Industrial
36V
Commercial
32V
Current through Any Input Pin
and Cathode Pin
±20mA
Differential Input Voltage
Military and Industrial
±36V
Commercial
±32V
Short Circuit Duration, Op Amp (Note 2)
Continuous
-65·Cto + 150·C
Storage Temperature Range
Maximum Junction Temperature
Soldering Information
Dual-In-Line Package
260·C
(Soldering, 10 seconds)
Small Outline Package
215·C
Vapor Phase (60 seconds)
220·C
Infrared (15 seconds)
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
Package Thermal Resistance (Note 3)
100·C/W
Hermetic DIPJ16
95·C/W
Molded DIP N16
140·C/W
Molded SO M16 Wide
ESD Tolerance (Note 4)
±1 kV
120 pF, 1.5 kO
±250V
200pF, < 10
Absolute maximum ratings indicate limits beyond which
damage to the component may occur. Electrical specifications do not apply when operating the device beyond its
rated operating conditions.
150·C
Operating Junction Temperature Range
TMinto TMax
- 55·C to + 125·C
LM614M
-40·Cto +85·C
LM6141
O·Cto +70·C
LM614C
Electrical Characteristics
These specifications apply for V- = GND = OV, V+ = 5V, VCM = V+ /2, VOUT = v+ 12, IR = 100 ",A, FEEDBACK pin
shorted to GND, any package, unless otherwise specified. Limits in standard typeface are for TJ = 25·C; limits in boldface type
apply for TMin to T Max-
Parameter
Conditions
Typical
(Note 5)
LM614M
LM614AI, LM6141
LM614C
Tested Design Tested Design Tested Design
Limit
Limit
Limit
Limit
Limit
Limit
(Note 6) (Note 7) (Note 6) (Note 7) (Note 6) (Note 7)
Total
Supply
Current
V+ Current, RLOAD = 00,
4V s: V+ s: 36V OverTJ Range
(Commercial 32V)
450
550
900
1000
940
Supply
Voltage
Range
Meets Total Supply Current, and
See VR Change with V+ Change Test
2.2
2.9
2.B
3
2.B
46
43
36
36
36
±1.5
±2.0
±3.5
±5.0
±3.5
±1.0
±1.5
±3.5
±5.0
±3.5
15
25
30
-10
-11
±20
±25
±25
±0.2
±0.3
±4
±4
±4
1000
1000
1070
",A max
",A max
3
V min
V min
32
V max
V max
±7.0
mVmax
mVmax
±7.0
mVmax
mVmax
2.B
3
32
36
Units
OPERATIONAL AMPLIFIERS
Vas
Over
Suppiy
Vas
Over
VCM
4V s: v+ s: 36V
(4V s: V+ s: 32VCommercial)
VCM = OV through VCM =
0/+ - 1.4V), V+ = 30V
Average LM614M & AI, Op Amp 3 Only
(Note B)
Vas
Drift
Input
Bias
Current
IS+IN and IS_IN
Input
Offset
Current
lOS = IS+IN - IS_IN
Average
los
Drift
±5.0
±6.0
±5.0
±6.0
",vrc
max
±35
±30
±40
nAmax
nAmax
±5
nAmax
nAmax
±4
±5
pA/·C
±4
3-545
Electrical Characteristics (Continued~
.
These specifications apply for V- = GND = OV, V = 5V, VCM = V+ 12, VOUT = V+ 12, IR = 100 /lA, FEEDBACK pin
shorted to GND, any package, unless otherwise specified. Limits in standard typeface are for TJ = 25°C; limits in boldface type
apply for TMin to T Max.
Parameter
Conditions
Input
Resistance
Differential:
Common-Mode:
Input
Cap.
C-to-GND, Non-Inverting Input
of Follower
Typleal
(Note 5)
LM614M
LM614C
LM614AI, LM6141
Tested Design Tested
Limit
Limit
Limit
(Note 6) (Note 7) (Note 6)
Design
Limit
(Note 7)
Tested
Limit
(Note 6)
Design
Limit
(Note 7)
Units
1800
3800
Mil
Mil
5.7
pF
Voltage 100 Hz, Input Referred
Noise
74
nV/.JHz
Current
Noise
58
fAl.JHz
100 Hz Bias Current Noise
Common V+ = 30V,
-Mode OV s: VCM s: (V+ - 1.4V),
Reject CMRR = 20 log (AVCM/AVos}
Ratio
Power
Supply
Reject
Ratio
4V s: V+ s: 30V, VCM = V+ 12,
PSRR = 20 log (AV+ IAVoS}
Voltage RL = 10 kll to GND, V+ = 30V,
Gain,
5V s: VOUT s: 25V, Open-Loop
Open
AV = IAVoUT/AYINDIFFI
Loop
Slew
Rate
V+ = 30V (Note 9)
GainBandwidth
Closed Loop Gain = -1000,
-3 dB Frequency x Gain,
CL=50pF
95
90
85
80
80
110
100
85
80
80
500
50
100
40
100
±0.70
±0.65
±0.55
±0.45
±0.55
dB min
dB min
70
dB min
dB min
40
V/mV
min
±0.45
V//ls
min
75
94
40
±0.50
±0.45
0.79
0.52
MHz
V+ -1.4 V+ -1.6
y+ - 1.6 y- - 1.8
Output RL = 10klltoV+
Voltage V+ = 36V (32V Commercial)
Swing
Low
VY-
VOUT = V+ -2.5V, V+IN = OV,
V-IN = -0.3V
70
75
Output RL = 10 kllto GND
Voltage V+ = 36V (32V Commercial)
Swing
High
lOUT
Source
75
75
+ 0.8 V- + 0.90
+ 0.9 Y- + 1.0
-25
-15
-20
-13
3-546
y+ - 1.7
V+ - 1.8
y+ - 1.9
V-
+ 0.90
VY-
+
+ 0.95
1.0
-20
V min
y+ - 1.9 V min
Y-
+
V max
1.0 V max
-16
-13
-13
mAmax
mAmax
Electrical Characteristics (Continued~
These specifications apply for V- = GND = OV, V = 5V, VCM = V+ !2, VOUT = V+ !2, IR = 100 ".A, FEEDBACK pin
shorted to GND, any package, unless otherwise specified. Limits in standard typeface are for TJ = 25·C; limits in boldface type
apply for T Min to T Max.
Parameter
Typical
(Note 6)
Conditions
17
LM614M
Tested
Limit
(Note 7)
Design
Limit
(Note 8)
LM614AI, LM6141
Tested
Limit
(Note 7)
15
8
14
9
VOUT = OV, V+IN = 3V,
V -IN = 2V, Source:
-30
-40
-37
-46
-40
VOUT = 5V, V+IN = 2V,
V -IN = 3V, Sink:
30
32
40
60
60
1.244
1.2390
1.2490
(±0.4%)
1.2365
1.2515
(±0.6%)
10
20
lOUT
Sink
VOUT = 1.6V, V+IN = OV,
V-IN = 0.3V
ShortCircuit
Current
Design
Limit
(Note 8)
LM614C
Tested
Limit
(Note 7)
Design
Limit
(Note 8)
13
11
11
mAmin
mAmin
-50
mAmin
mAmin
90
mAmax
mAmax
-43
-48
70
80
Units
VOLTAGE REFERENCE (Note 10)
Reference
Voltage
Average
Temp.
Drift
(Note 11)
Average
Time
Drift
TJ = 40·C
400
TJ = 150·C
1000
Hysteresis
Hyst = (Vro' - Vro)! ,nJ
(Note 12)
±3.2
VR
Change
with
Current
VR[100,.,.Al - VR[16 ,.,.A]
20
".VlC
±1
±1
±1
VR[10 mAl - VR[100 ,.,.A]
(Note 13)
1.5
3.0
5
5
5
Resistance
AVR[10 ...... 0.1 mA]/9.9 mA:
AVR[100 ...... 16 Jl.A]!84 ".A:
0.2
0.6
VR
Change
with
High
VRO
VR[Vro = Vr] - VR[Vro = 6.3V]
(5.06V between Anode and
FEEDBACK)
2.5
2.8
5
8
7
VR
Change
with
V+
VR[v+ = 5V] - VR[V+ = 36V]
(V+ = 32V Commercial)
0.1
0.1
±1.2
±1.2
±1.2
0.01
0.01
±1
±1
±1
-22
-29
-35
-40
-35
5V] - VR[V+
=
3V]
Change
FEEDBACK
Bias
Current
IFB; VANODE
VR
Noise
10 Hz to 10,000 Hz, VRO = VR
S;
VFB
S;
5.06V
PPM!C
max
PPM!
kHr
PPM!
kHr
0.05
0_1
=
Vmin
V max
150
80
LM614AI
VR[V+
1.2191
1.2689
(±2%)
±1
±1.1
mVmax
mVmax
5.5
5.5
mVmax
mVmax
0.56
13
0.56
13
fimax
fimax
10
mVmax
mVmax
±1.1
0.51
12
5
7
10
±1.2
±1.3
mVmax
±1.5
mVmax
mVmax
-55
nAmin
nAmin
±1
±1.5
30
mVmax
±1.3
-50
-40
",VRMS
3-547
Electrical Characteristics Notes
Note 1: More accurately, it is excessive current flow, with resulting excess heating, that limits the voltage on all pins. When any pin is pulled a diode drop below V-,
a parasitic NPN transistor tums ON. No latch-up will occur as long as the current through that pin remains below the Maximum Rating. Operation is undefined and
unpredictable when any parasitic diode or transistor is conducting.
Note 2: Simultaneous short..,ircuit of multiple op amps and reference while using high supply voltages may force junction temperature above maximum, and thus
should not be continuous.
Note 3: Junction temperature may be calculated using TJ = TA + P08JA. The given thermal resistances are worst-case for peckages In socketa In still air. Nominal
8jA are 8S'C/W for LM614 in J package, 80'C/W for the N package, and I100CIW for the WM package, for packages solderad to copper-clad board with
dissipation from one op amp or reference output transistor.
Note 4: Human body model, 100 pF discharged through a I.S kn resistor.
Note 5: Typical values in standard typeface are for TJ
likely parametric norm.
=
25'C; values in boldface tlrpe apply to the military temperature range. These values represent the most
Note 6: Tested limits are guaranteed and 100% tested.
Note 7: Design limits are guaranteed via correlation, but are not 100% tested.
Note 8: Offset voltage drift is calculated from the measurement of the offset voltage at 25'C and at the temperawre extremes. The drift is /lVoslIH, where /l Vos
is the lowest value subtracted from the highest, and /lT is the temperature range.
Note 9: Slew rate is measured with the op amp in a voltage follower configuration. For rising slew rate, the input voltage is driven from SV to 2SV, and the output
voltage transition is sampled at 10V and 20V. For falling slew rate, the input voltage is driven from 2SV to SV, and the output voltage transition is sampled at20V
and 10V.
Note 10: Vro is the Cathode-to-Anode voltage (i.e. the reference output voltage, 1.2V to a.3V). Vr is the Cathode-to-FEEDBACK voltage (nominally 1.2V).
Note 11: Average reference drift is calculated from the meesurement of the reference voltage at2S'C and at the temperature extremes. The drift, in ppmrC, Is
106• .6.VR/VR[25~Cl·b.TJ. where AVA is the lowest value subtracted from the highest, VR[2~C] is the value at 25°C, and .6.TJ is the temperature range.
Note 12: Hysteresis is /lVRo//lTJ, where /lVRO is the change in VRO caused by a change in TJ, after the reference has been "dehysterized". To dehysterize the
reference, its junction temperature should be cycled in the following pattern, spiraling in toward 2S'C: 2S'C, 125'C, - S5'C, 8S'C, - 40'C, 70'C, O'C, 2S'C.
Note 13: Low contact resistance is required for accurate measurement.
Simplified Schematic Diagrams
OpAmp
TL/H/9326-2
Bias
Reference
TL/H/9326-3
3-548
,-----------------------------------------------------------------------------, r
3:
en
.....
Typical Performance Characteristics (Reference)
TJ = 25°C, FEEDBACK pin shorted to
1.26
v-
av, unless otherwise noted
=
r
Reference Voltage
vs Temperature
on 5 Representative Units
/"
I-r-'"
0.10
D.08
D.08
g
"'r--,
:;:::1- t-I"-- -i+1.23
~-~-wo
Reference Voltage Drift
I"'-
.;'
~
~
::.
:i
TJ
= 40"1:
E
IID4
D.02
0.00
1:l
g
lj
is
,:' -IID4
i
-D.08
-D.08
-0.10
W~~ ~IOOlWI~
I POIHT AFFECTED BY
HYSIERESIS HISTORV
1.218
1.216
1.214
o
250 500 750 1000 1250 1500 1750 200l
o
1IIjE (Hou..)
JUNCTION TEIIPERATUR! (c)
Reference Voltage vs
Current and Temperature
-
.......
1m
~
~
I- 6 WRESENTAnVE UNITS
1m
III
~-D.02
1"--;::' ..... 1'..... 1'-
1=
I
3:
en
.....
Accelerated Reference
Voltage Drift vs Time
100
200
300
~
500
nME BIASEQ AT 150"1: (h ..)
Reference Voltage vs
Current and Temperature
Reference Voltage vs
Reference Current
10
10
Vro=Vr
125~
1-1- _-55"1:
25"1:
-55"1:
25"1:
125"1:
~~~~~~~~~
I
2xlO"' 2xl0-5 2.,0"" 2xl0-3 2xll)""2
2xl0-3 2.,1)""2
REFERENCE CURRENT (A)
REFERENCE CURRENT (A)
Reference Voltage vs
Reference Current
10""
I I I
S
I I I
--
-55"1:
1
25"1:
-1
',"1:
I
ONIOOV
KNIU
10"'
~
11)""7
r--'~
r-~
iil
~
11)""2
-i5~
II
11)""5
10""
10-3
II)""I
8
-10
I
-20
~
-30
-~
10000
I I
30
~
~-;:.
~
!
~
fll
1000
g
100
~
ANODE - TO - FEED6ACK VOLTAGE (V)
I
11)""2
-55"1:
25"1:
I lOOV I I
125"1:
25"1:
-i5~
II
b
10 20 30
~
ANODE-TO- FEEDBACK VOLTAGE (V)
Reference Smail-Signal
Resistance vs Frequency
10000
~v,
in
I~
.=
~
z
rf
I 5"1:
-I 0 I 2 3 • 5 6
Reference Noise Voltage
vs Frequency
b
1
-~
-10123.561020
I'
11)""2
1
§
I
10
REFERENCE SHUNT CURRENT (A)
m
lOOV
m~
CS 11)""11
-55"1:
25"1:
'~
25"1:
I.~
,1)""'0
11)""12
10"'
20
!
I
3-36V
FEEDBACK Current vs
FEEDBACK-to-Anode
Voltage
,)5
I
z
REFERENCE CURRENT (A)
20
1.2:>: .. :>: 6.3V
::>
10"'
-11)""2 -II)"". tl1)""6 10""
FEEDBACK Current vs
FEEDBACK-to-Anode
Voltage
1-55,.J~:>: d5"1: _
:!I 10-9
1'*3
_11)""2 -II)"". t 11)""6 10""
lj
§
U8N
I
10-5
-55"1:
REFERENCE CURRENT (A)
Reference AC
Stability Range
JJ I
~~-
125"1:
~
Yro=6.3V
I IIIIII
10
I
100
1000
FREQUENCV (Hz)
3-549
10000
FREQUENCV (Hz)
TUH/9326-4
.,... r---------------------------------------------------------------------------------,
~
CD
:E
....I
.....
Typical Performance Characteristics (Reference) (Continued)
= 25'C, FEEDBACK pin shorted to V- = av, unless otherwise noted
TJ
'
,§.
~
§
~
-2
}.
-3
2.0
1--
-
I,
o
~
STEPIII 11OO l'A 11' 0 rnA
1111
II
r-- r -55OC
25oC-,?
125'1/
-0.5
-1.0
100 200 300 .00 500 600 700
r-10!....
3~
I
0.5
~
~=6V.:t.61,=0.23.QO 125"C
V+~TEP
1.0
;:j
g
==
I
1.5
!
~
~
-.
-5
Reference Voltage Change
with Supply Voltage Step
1\
1
__~~
100 200 300 400 500 600 700
~J5OC
250C
-55OC
I
I
-
r-- - -
'-
o
TlYE (ms)
TIME (PO)
TL/H/932B-B
Typical Performance Characteristics (Op Amps)
v+
= 5V, v- = GND = OV, VCM = V+ /2, VOUT = V+ 12, TJ = 25'C, unless otherwise noted
Input Common-Mode
Voltage Range vs
Temperature
Vos vs Junction
Temperature on 9
Representative Units
Input Bias Current vs
Common-Mode Voltage
20
4
OUTPUT GOES LOW
SV+-O.5
~
~ vt'- 1
~~
g
gv+-1.5
",:,
~
8'/"-0.5 1--
l-I--t---
~
~
0
-1
-2
'/"- 1
~
0.5
H-I-+-+-+-+-*",\-fI-j
5
v+
0.2 .J"L
I
I
til
-60-40-20 0 20 .0 60 80 100120140
JUNCTION TEMPERATURE (c)
S
1\
II
i---55OC
0
-1
-2
-3
I fl)
-5
-6
r'-125OC
!"-25OC-55OC
f--
o
20 .0 60 80
~\
i-LOAD
5
""
VI~~ -
I
f-I-
1-1- ~f-f-
I-
~
r-1ri 110
f-\\
IV,
II
II
Output Voltage Swing
vs Temp. and Current
v+- 1
;5
-4
o~~-L~~~~-L~
.y"=15V
'/"=-15V
fOLLOWER
I
S
~
0.3
-15
INPUT VOLTAGE (V)
6
~~~~No-l--l--W
0.6 H-I-+-+--+---l".~+--H
~
-10
250C
250C
-20
-I 0 1 2 3 4 5 10
Large-Signal
Step Response
0.8
~
'"
~
1250C
-5
JUNCTON TEMPERATURE (e)
Slew Rate vs Temperature
and Output Sink Current
~
~
j...-'V
JUNCTON TEMPERATURE (c)
0.7
a
-4
-60 -.0-20 0 20 .0 60 80 100 120 1.0
-60-40-20 0 20 .0 60 80 100 120 1.0
V-55OC
~
,......
F:=F
125V
10
g;
Lo--t- I-"~ ~;:::;;/
-3
OUTPUT GOES LOW
]:
'j
-"'"
;5
NORMAL OPERATING RANGE
'/"
!
til
f-t-
J
15
1.
"'"- i"'-_
\
Il'l LOAD
LOt
'/"
10
20
30
TIME (p.)
40
50
-60-40-20 0 20 .0 60 801001201.0
JUNCTON TEMPERATURE (C)
TL/H/932B-5
3-550
Typical Performance Characteristics (Op Amps)
(Continued)
= 5V, V- = GND = OV, VCM = V+ 12, VOUT = V+ 12, TJ = 25°C, unless otherwise noted
V+
Output Sink Current vs
Output Voltage and Temp.
20
2.B :5 'I' :5 36V
10 NEGATIVE INPUT = v-
1:
-10 -
!3
-30
r-,15"C 1
-20
1:
§
13
5"C
5
fII
0
-40
-5 "CI
-I
0
S
u
~
-3
-2
-I
/'
Av=~
10-1
10-2
10 '
V
102
-I 0
v-
/
60
rr
I
2 3
10
I
'n\
v- = 15V
V'N
!
-155~
0
40
Small-Signal Voltage
Gain vs Frequency
and Temperature
~
~
0
>
w
::::E
-20
102
Ill'
10'
~
!i1
::E
20
0
-20
-40
-60
-80
I-r~
"""
V+=15V
V-=-15V
50pF
,,'00pF,2kD. to v80
r-,.IOOpF,2kD. wyo I
;:s:,
I'..
r-,.
"'
9o
~V~vo
102
~
FREQUENCY (Hz)
106
-IBO
Follower Small-Signal
Frequency Response
W
-90
W
~
~
Cload = 10 pF
V+=15V
V-=15V
follower
~
-6
-8
20
50
--45
-90
~
!;;
ill
W
-135
11.\'
FREQUENCY (kHz)
1'\
100
\
500
V- =-15V
120
125C.-' .>.;
25C/X
-55C
100 200
-180
V+=15V
"..,
Phase~ ~'
-4
106
10'
~
Common-Mode Input
Rejection Ratio
0;;-
-2
t:
140 Voltage
~
is
~
iii
vo
102
100
90
~
I't.:
FREQUENCY (Hz)
i 55 c,-,t: 'X
f--~agnltude ~
0;;-
90 ~
10'
200.0. :
"
125C
iii
-
~
v~
10'2
~J.25C
t:
r-,.
100
4
I 80
I'..
1'.."'-
FREQUENCY (Hz)
Small-Signal Voltage Gain
vs Frequency and Load
10-2
"
0
102
V+= 15V
V-=-15V
125C
-40
-60
-BO
FREQUENCY (Hz)
W
=::::; r--55C
~5C- -
40
20
~
! :40
140
120
100
BO
60
~
!i1
g
10 '
10
TIME v.s)
60
100
v-
o
10
is
100
[Q.
100pF, 2kD. TOV+-60 100 pF, 2 kll TO
50pF.=D.
-BO
Ii
1\
120
100
I
-40
0
80
;:j
= 15V
FOLLOWER
-20
5
!3
100
140
I
Op Amp Current Noise
vs Frequency
~
)Jsv
v-
l
\:::I
V'N-
>
I
v::-
V
20
~
II, 25"C
Ll r:r5~
l'(j I I
II
o
!.
50pF,=D. ~
?=[;Jl0PF, 2kll TO
00pF.2kllTOv+
60 t-
I I
LOAO
.
Small-Signal Pulse
Response vs Load
BO
1
FOLLOWER
C
= 10pF
1["'"'
105
FREQUENCY (Hz)
TIME v.s)
1000
10
104
'I'
-60
-BO
~
v+=30V
Ill'
OUTPUT VOLTAGE (V)
AV= I
106
Av= 100
0
>
28 29 30 31 32
/
105
5
"C
~
15
Small-Signal Pulse
Response vs Temp.
'I' = 15V
J~i~( 125"C
40
l\r
0
20
j
104
Ill'
BO
Op Amp Voltage Noise
vs Frequency
hi
20
125"C
~ 25"C
!3
FREQUENCY (Hz)
I
'"z
o
0
/
,..-
==
5
J
'I'
102
100
;'!!
25
-10
v+=15V
V-=-15V
10'
~
;:j
I-
10
Output Impedance vs
Frequency and Gain
Ill'
Output Swing,
Large Signal
~
hi
,1"-:+V
!.!.~r-I-'
20
SUPPLY REFERENCED VOUT (V)
uri
I
-55"C
30
0
I
"Iv-
-50
~
30
J.
v+=30V
+25 0 C
40
(I
~
i
50
}J
V+IN=V"+lV
Slew Rate vs. Temp with
Common-Mode
Voltage below V-
-180
I 000 2000
~
~
BO
,.'"'"<..>
60
f\
40
lP
•
\.
\
vo
vi
20
o
10'2
100
102
104
\
106
FREQUENCY (Hz)
TL/H/9326-6
3-551
,---------------------------------------------------------------------------------,
....
CD
~
==
...J
~
....CD
Typical Performance Characteristics (Op Amps)
av, VCM
V+ = 5V, V- = GND =
(Continued)
= V+ /2, VOUT = V+ /2, TJ = 25'C, unless otherwise noted
Power Supply Current vs
Power Supply Voltage
:i
1000
900
800
700
125 OC
~
I"'"
600
OC if'" -55 OC
500
1
1
400
300 I-rr+ 100J'A
r200 I-r100
,- r- r0
-100
-1 0 1 2 3 4 5 10 20 30 40 50 60
""" ....
~
...z
r::2
I-
""""0
:~
"-
":-
en
~~
~
-
TOTAL SUPPLY VOLTAGE (V)
TL/H/9326-7
Positive Power Supply
Voltage Rejection Ratio
Negative Power Supply
Voltage Rejection Ratio
140
140
120
100
80
'""""-en
60
100
~
@'
~
- ,
I~
120
+
vi
40
;
20
@'
~
""""
en
"-
r\
YO
I
\
10-2
10°
102
"-
60
40 I20 I0
I-
-20 I-
-15V
o
~
80
-40
104
51~ ~
I~
10-2
FREQUENCY (Hz)
vi
"-
,
vo
\
-15V
100
102
104
FREQUENCY (Hz)
TUH/9326-21
TUH/9326-22
Input Offset Current vs
Junction Temperature
1000
I.... .....
0
~
I~
11
,;
-1000
/
-....
I-
i")j~
..".
....
~
Input Bias Current vs
Junction Temperature
".
<'
..s.
--
I-
is
'"""0
:en
co
;!!;
/
8
6
4
2
0
-2
II
-6
-8
-10
6 Representative Unit.
-2000
-60-40-200 2040 60 80100120140
II
-4
J
./
-12
-60 -40-20 0 20 40 60 80 100120140
JUNCTION TEMPERATURE (OC)
JUNCTION TEMPERATURE (OC)
TUH/9326-24
TUH/9326-36
3-552
r-
s::
en
...
Typical Performance Distributions
~rAverage Vos Drift
Military Temperature Range
s::
en
...
Average Vos Drift
Industrial Temperature Range
""
Vos DRIFT (",V/C)
Vos DRIFT ("IV/C)
TLlH/9326-30
TL/H/9326-29
Average Vos Drift
Commercial Temperature Range
Average los Drift
Military Temperature Range
6
Vos DRIFT (PV/C)
12
18
24
30
36
42
los DRIFT (pA/C)
TLlH/9326-32
TL/H/9326-31
Average los Drift
Industrial Temperature Range
Average los Drift
Commercial Temperature Range
20~-----------------,
15~------------------~
~ 10~------------------~
=>
5~~~--------------~
o
los DRIFT (pA/C)
los DRIFT (pA/C)
TL/H/9326-34
TL/H/9326-33
3·553
....
CD
~ r---------------------------------------------------------------------------~
:E
Typical Performance Distributions (Continued)
....I
.....
....
==
CD
:E
Voltage Reference Broad-Band
Noise Distribution
30
....I
Op Amp Voltage
Noise Distribution
30
10:S l:Sl0,OOO Hz
20
20
10
10
o
o
I
4 812162024283236404448
VOLTAGE NOISE (pVRMS)
Op Amp Current
Noise Distribution
100Hz
Amps I, 2, 3, 4
2,3,4
l~
o
081624324048566472808896
CURRENT NOISE (IARMS /'1Hz)
VOLTAGE NOISE (nVRMS/"iHz)
TUH/9326-35
TUH/9326-36
TUH/9326-37
Application Information
VOLTAGE REFERENCE
Cathode
Reference Biasing
The voltage reference is of a shunt regulator topology that
models as a simple zener diode. With current Ir flowing in
the 'forward' direction there is the familiar diode transfer
function. Ir flowing in the reverse direction forces the reference voltage to be developed from cathode to anode. The
cathode may swing from a diode drop below V- to the reference voltage or to the avalanche voltage of the parallel
protection diode, nominally 7V. A 6.3V reference with V+ =
3V is allowed.
Anode =V-
TL/H/9326-10
FIGURE 2, Reference Equivalent Circuit
Anode commltled 10 V-
TUH/9326-11
TL/H/9326-9
FIGURE 3. 1.2V Reference
FIGURE 1. Voltages Associated with Reference
(Current Source Ir is External)
The reference equivalent circuit reveals how Vr is held at
the constant 1.2V by feedback, and how the FEEDBACK pin
passes little current.
Adjustable Reference
The FEEDBACK pin allows the reference output voltage,
Vro, to vary from 1.24V to 6.3V. The reference attempts to
hold Vr at 1.24V. If Vr is above 1.24V, the reference will
conduct current from Cathode to Anode; FEEDBACK current always remains low. If FEEDBACK is connected to Anode, then Vro = Vr = 1.24V. For higher voltages FEEDBACK is held at a constant voltage above Anode-say
3.76V for Vro = 5V. Connecting a resistor across the constaint Vr generates a current 1= R1IVr flowing from Cathode
into FEEDBACK node. A Thevenin equivalent 3.76V is generated from FEEDBACK to Anode with R2=3.76/1. Keep I
To generate the required reverse current, typically a resistor
is connected from a supply voltage higher than the reference voltage. Varying that voltage, and so varying Ir' has
small effect with the equivalent series resistance of less
than an ohm at the higher currents. Alternatively, an active
current source, such as the LM134 series, may generate Ir.
CapaCitors in parallel with the reference are allowed. See
the Reference AC Stability Range typical curve for capacitance values-from 20 /LA to 3 mA any capaCitor value is
stable. With the reference's wide stability range with resistive and capacitive loads, a wide range of RC filter values
will perform noise filtering.
3-554
Application Information (Continued)
greater than one thousand times larger than FEEDBACK
bias current for <0.1% error-I~32 I-'A for the military
grade over the military temperature range (I ~ 5.5 I-'A for a
1% untrimmed error for a commercial part.)
TL/H/9326-15
FIGURE 7. Output Voltage has Positive TC
if R1 has Negative TC
TL/H/9326-12
15V
FIGURE 4. Thevenin Equivalent
of Reference with 5V Output
10k
15V
Rl
39k
·.4---4!1=32J/A
t:-_ _...1
R2
"8k
TL/H/9326-16
FIGURE 8. Diode in Series with R1 Causes Voltage
across R1 and R2 to be Proportional to Absolute
Temperature (PTAn
Connecting a resistor across Cathode-to-FEEDBACK creates a 0 TC current source, but a range of TCs may be
synthesized.
TL/H/9326-13
R1 = Vrll = 1.24/321-' = 39k
R2 = R1 {(VrolVr) - 11 = 39k {(5/1.24) - 1)1 = 118k
FIGURE 5. Resistors R1 and R2 Program
Reference Output Voltage to be 5V
Understanding that Vr is fixed and that voltage sources, resistors, and capacitors may be tied to the FEEDBACK pin, a
range of V, temperature coefficients may be synthesized.
15V
10k
TUH/9326-17
1= Vr/R1 = 1.24/R1
TL/H/9326-14
FIGURE 9. Current Source is Programmed by R1
FIGURE 6. Output Voltage has Negative Temperature
Coefficient (TC) if R2 has Negative TC
3-555
•
,..
~
CD
:i....
.-------------------------------------------------------------------1
Application Information
(Continued)
mon-mode range, another amp may be operated as a comparator, another with all terminals floating with no effect on
the others (tying inverting input to output and non-inverting
input to V- on unused amps is preferred). Choosing operating pOints that cause oscillation, such as driving too large a
capacitive load, is best avoided.
_v
~
,..
R
CD
:i
..J
OP Amp Output Stage
These op amps, like their LM124 series, have flexible and
relatively wide-swing output stages. There are simple rules
to optimize output swing, reduce cross-over distortion, and
optimize capacitive drive capability:
1) Output Swing: Unloaded, the 42 p.A pull-down will bring
the output within 300 mV of V- over the military temperature range. If more than 42 p.A is required, a resistor from
output to V- will help. Swing across any load may be
improved slightly if the load can be tied to V+, at the cost
of poorer sinking open-loop voltage gain
I lO-5V
VTUH/9326-18
FIGURE 10. Proportlonal-to-Absolute-Temperature
Current Source
2) Cross-over Distortion: The LM614 has lower cross-over
distortion (a 1 VBE deadband versus 3 VBE for the
LM124), and increased slew rate as shown in the characteristic curves. A resistor pull-up or pull-down will force
class-A operation with only the PNP or NPN output transistor conducting, eliminating cross-over distortion
THERMISTOR
NTC
Rl
I lO-5V
V-
3) Capacitive Drive: Limited by the output pole caused by
the output resistance driving capacitive loads, a pulldown resistor conducting 1 rnA or more reduces the output stage NPN re until the output resistance is that of the
current limit 25fi. 200 pF may then be driven without oscillation.
TL/H/9328-19
FIGURE 11. Negative-TC Current Source
Hysteresis
The reference voltage depends, slightly, on the thermal history of the die. Competitive micro-power products vary-always check the data sheet for any given device. Do not
assume that no specification means no hysteresis.
OP Amp Input Stage
The lateral PNP input transistors, unlike most op amps,
have BVEBO equal to the absolute maximum supply voltage.
Also, they have no diode clamps to the positive supply nor
across the inputs. These features make the inputs look like
high impedances to input sources producing large differential and common-mode voltages.
OPERATIONAL AMPLIFIERS
Any amp or the reference may be biased in any way with no
effect on the other amps or reference, except when a substrate diode conducts (see Guaranteed Electrical Characteristics Note 1). One amp input may be outside the com-
Typical Applications
For typical applications, refer to the LM124 Op Amp and
LM185 Adjustable Reference datasheets.
3-556
r------------------------------------------------------------------------, r
3:
0)
~National
N
......
......
~ Semiconductor
r
3:
0)
Co)
LM627/LM637
Precision Operational Amplifiers
General Description
Features
The LM627/LM637 series feature extremely low noise and
excellent precision along with high speed. Voltage noise is a
low 3 nV l./Hz in the flat band and rises to only 3.5 nVl./Hz at
10Hz. The A grades offer guaranteed specifications of
25 p. V offset voltage and 0.3 p.VI'C drift, and their guaranteed 126 dB CMRR, 120 dB PSRR and voltage gain of 5
Million ensure an ultra-low Vos under all conditions.
The unity-gain stable LM627 is nearly twice as fast as the
OP-27 with a slew rate of 4.5 Vlp.s and a 14 MHz gainbandwidth product. Stable at gains of 5 or more, the decompensated LM637 is considerably faster.
• Low Noise
Other enhancements of the LM627/LM637 include a guaranteed 600n load drive capability over temperature: ± 10V
output swing at voltage gains over one million. Bias current
has been reduced to 10 nA for the A and B grades and
25 nA for the C grade. Furthermore the LM627 may be overcompensated to allow it to drive capacitive loads up to
2000 pF while maintaining its superb de specs.
•
•
•
•
•
•
•
•
......
3 nV/./Hz@1 kHz
3.5 nV/./Hz@ 10 Hz
Low Vos
25 p.V Max
Low Drift
0.3 p.VI'C Max
Offset Drift 100% Tested (A and B grades)
Noise Voltage 100% Tested (A and B grades)
High Gain
5 Million Min
High CMRR
126 dB Min
High PSRR
120 dB Min
High Speed
14 MHz Gain-Bandwidth
LM627:
4.5 VI P.s Slew Rate
65 MHz Gain-Bandwidth
14 V/p.s Slew Rate
• Guaranteed 600n drive over temperature
• Wide Power Supply Range
±3.5V to ±18V
• Overcompensation Pin
Allows driving high CL
LM637:
Connection Diagrams
DIP Packages
Metal Can Package
\.J
8
1
1 vos Ad)
7
3
vos Ad)
:J 8
CI--,"-V+P7
3 CI--VLpS
v+
r:
C vos Ad)
2
6
4C
v-
Comp
Ps
Comp
TL/H/9212-2
5
v4
TUH/9212-1
Top View
Ordering Information
LM627
Package
TO-99
8-Pin
Cerdip
8-Pin
Molded
DIP
Temperature Range
LM637
NSC
Drawing
Military
CommerCial
LM627AMH
LM627BMH
LM627ACH
LM627BCH
LM627CH
H08C
LM627AMJ
LM627BMJ
LM627ACJ
LM627BCJ
LM627CJ
J08A
LM627ACN
LM627BCN
LM627CN
N08E
Package
TO-99
8-Pin
Cerdip
8-Pin
Molded
DIP
3-557
Temperature Range
NSC
Drawing
Military
Commercial
LM637AMH
LM637BMH
LM637ACH
LM637BCH
LM637CH
H08C
LM637AMJ
LM637BMJ
LM637ACJ
LM637BCJ
LM637CJ
J08A
LM637ACN
LM637BCN
LM637CN
N08E
Absolute Maximum Ratings (Note t)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Differential Input Overdrive Current (Note 7)
±25mA
Supply Voltage
Input Voltage
3kV
Operating Ratings
Continuous
Power Dissipation (Note 8)
Molded DIP
Ceramic DIP
Metal Can
150·C
Maximum Junction Temperature
ESDRating
CZAP = 100 pF, RZAP = 1.5 kO
44V
Supply Voltage
Output Short Circuit to Gnd
-65·Cto + 150·C
260·C
Storage Temperature Range
Lead Temperature (Soldering, 5 sec.)
Temperature Range (Note 8)
AM and BM grades
AC, BC, and C grades
1300 mW
1190mW
830mW
-55·C s: TJ s: +125·C
-25·C s: TJ s: +85·C
Electrical Characteristics All limits guaranteed for TJ = 25·C, VCM = 0, Va = 0 and ± 15V supplies unless
otherwise specified. Boldface limits apply at operating temperature extremes.
LM627AM
LM637AM
Parameter
Conditions
Typ
Tested
Limit
(Note 5)
Design
Limit
(Note 6)
LM627BM
LM637BM
Tested
Limit
(Note 5)
Design
Limit
(Note 6)
Units
Input Offset Voltage
(Note 2)
15
25
55
50
110
",V
Max
Input Offset
Voltage Drift
(Note 3)
0.2
0.3
0.6
",V,·C
Max
(Note 4)
0.2
Input Offset Voltage
Long Term Stability
",V/mo
Max
Input Bias Current
3
10
20
10
20
nA
Max
Input Offset Current
2
10
20
10
20
nA
Max
Input Noise Voltage
0.1 to 10Hz
0.08
Input Noise
Voltage Density
f = 10Hz
f = 30Hz
f = 1kHz
3.5
3.1
3.0
Input Noise
Current Density
f = 10Hz
f = 30Hz
f = 1kHz
1.7
1.0
0.4
pAl../HZ
Max
Input Resistance
Common-Mode
20
GO
Input Voltage Range
0.18
5.5
4.5
3.8
0.18
5.5
4.5
3.8
",Vp-p
Max
nV/../HZ
Max
±12
±11.5
±10.5
±11.5
10.5
V
Min
Common-Mode
Rejection Ratio
VCM = ±11.5V
VCM = ±10.5V
140
126
120
126
120
dB
Min
Power Supply
Rejection Ratio
Vs = ±3.5Vto ±18V
140
120
117
120
117
dB
Min
Large-Signal
Voltage Gain
Va =
RL:?!
Va =
RL:?!
RL:?!
10000
5000
3000
4000
2000
3000
1500
5000
2000
3500
1500
2000
1000
V/mV
Min
±12V
2 kO
±10V
1 kO
6000
7000
6000
3-558
Electrical Characteristics (Continued)
LM627BM
LM637BM
LM627AM
LM637AM
Parameter
Output Voltage
Swing
Conditions
Typ
Tested
Limit
(Note 5)
Rl"' 2 kn
±13.8
Rl",600n
±12.5
±13
±12.5
±11
±10.5
Design
Limit
(Note 6)
Tested
Limit
(Note 5)
Design
Limit
(Note 6)
±13
±12.5
±11
±10.5
Units
V
Min
Slew Rate
LM627
LM637 Rl = 2k
4.5
14
3
10
3
10
V/p.s
Min
Gain-Bandwidth
Product
LM627
LM637 f = 10 kHz
14
65
10
45
10
45
MHz
Min
Output Resistance
Open Loop
50
Supply Current
Offset Adjust Range
0.
3
Rp",10kn
mA
Max
4.5
5.5
4.5
5.5
±2
mV
Electrical Characteristics All limits guaranteed for TJ = 25'C, VCM = 0, Vo = 0 and ± 15V supplies unless
otherwise specified. Boldface limits apply at operating temperature extremes.
LM627AC
LM637AC
Parameter
Conditions
Typ
Tested
Limit
(Note 5)
Design
Limit
(Note 6)
LM627BC
LM637BC
Tested
Limit
(Note 5)
Input Offset Voltage
{Note 2)
15
25
50
50
110
Input Offset
Voltage Drift
{Note 3)
0.2
0.6
1.0
Input Offset Voltage
Long Term Stability
{Note 4)
0.2
Design
Limit
(Note 6)
LM627C
LM637C
Tested
Limit
(Note 5)
Design
Limit
(Note 6)
Units
100
210
p.V
Max
1.8
p.VI'C
Max
p.V/mo
Max
Input Bias Current
3
10
20
10
20
25
50
nA
Max
Input Offset Current
2
10
20
10
20
25
50
nA
Max
0.25
p.V pop
Max
Input Noise Voltage
0.1 to 10 Hz
0.08
Input Voltage
Noise Density
f = 10 Hz
f = 30 Hz
f = 1 kHz
3.5
3.1
3.0
Input Noise
Current Density
f = 10 Hz
f = 30 Hz
f = 1 kHz
1.7
1.0
0.4
Input Resistance
Common Mode
Input Voltage
Range
0.18
5.5
4.5
3.8
0.18
8.0
5.6
4.5
5.5
4.5
3.8
nV//Hz
Max
pAl/Hz
Max
20
Go.
±12
±11.5
±11
±11.5
±11
±11.5
± 11
V
Min
Common-Mode
Rejection Ratio
VCM = ±11.5V
VCM = ±11V
140
126
120
126
120
120
116
dB
Min
Power Supply
Rejection Ratio
Vs = ±3.5Vto ±18V
140
120
117
120
117
110
108
dB
Min
3-559
Electrical Characteristics (Continued)
Parameter
Conditions
Large-Signal
Vo = ± 12V
Voltage Gain
RL:<: 2kO
Typ
LM627AC
LM627BC
LM637AC
LM637BC
LM627C
LM637C
Tested
Design
Tested
Design
Tested
Design
Limit
Limit
Limit
Limit
limit
Limit
(Note 5)
(Note 6)
(Note 5)
(Note 6)
(Note 5)
(Note 6)
10000
5000
3000
5000
3000
4000
2500
7000
4000
2500
3500
2000
2500
1500
V/mV
Vo = ± 10V
RL:<: 1 kO
Units
Min
RL:<: 6000
6000
3000
2000
2000
1500
1500
1000
Output Voltage
RL:<: 2kO
±13.B
±13
±12.5
±13
±12.5
±13
±12.5
V
Swing
RL:<: 6000
±12.5
±11
±10.5
±11
±10.5
±10.5
±10
Min
Slew Rate
LM627
LM637 RL = 2k
4.5
3
3
3
V/p.s
14
10
10
10
Min
14
10
10
10
MHz
Product
LM627
LM637 f = 10 kHz
65
45
45
45
Min
Output Resistance
Open Loop
50
5.2
mA
Gain-Bandwidth
Supply Current
3
0
4.5
5
4.5
5
4.8
Max
Offset Adjust Range
Rp:<:10kO
±2
mV
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guamntee specific performance limits. For guaranteed speCifications and test conditions, see the Electrical Chamcteristics.
The guaranteed specifications apply only for the test conditions listed.
Note 2: Input offset voltage for A and B grades Is tested and guaranteed with the device fully warmed up. See Figure 1 In the Application Hints for test circuH.
Warmup drift Is typically 5 p.v setHing out in 5 minutes. The LM627C/LM637C offset voltage is measured by automated test equipment within 200 ms of applying
power.
Note 3: Input offset voltage drift is defined as (Vos(8S'C) - Vos( - 2S'C))/ll O'C for the industrial temperature range. For the military temperature range, the input
offset voltage drift is measured from room temperature to both extremes: both (Vos(2S'C)-Vos(-SSOC))l80'C and (Vos(12S'C) - Vos(2SOC))/l00'C.
Note 4: Input offset voltage long term stability refers to the average trend line of Vos VB. time over extended periods of time after the first 30 days of operation.
Excluding the initial hour of operation, changes in Vos during the first 30 days are typically 2 ,.V.
Note 5: Guaranteed and 100% production tested. These limits are used to calculate outgoing quality levels.
Note 6: Guaranteed but not 100% production tested. These limits are not used to calculate outgoing quality levels.
Note 7: Inputs are protected by back-to-back diodes to prevent zener breakdown of the input transistors. Series limHing resistors have not been included since they
degrade noise performance. Excessive current may flow if a differential voltage in excess of 0.7V is applied.
Note 8: For operation above 2S'C, the maximum power dissipation specification must be derated. Typical junction·to-ambient thermal resistance of the molded DIP
and the ceramic DIP are 9SOC/W and 10SOC/W respectively. The metal can package has a typical junction-to·ambientthermal resistance of ISO'C/W and a typical
junction-l
~
9I
~
0
1110
160
1<40
120
100
80
60
<40
Gain-Bandwidth Product,
Phase Margin vs Temperature
100
~
"\.
~
~
~i
~
........ ~H
r-...
"
:w
0
""'11 80
100
lk
10k
lOOk 1M
90
t;
go! §~
HASE
~
""'1 35 ~
;\
\
-20
10
s:
en
~
-"
80
-
100
",,-GIrN
r--.
70
110
I""'-
....
rMargin
Ph.;;:""
60
50
-75 -50 -25 0
10M
90
70
i"
60
18
....t:l
I
!
~
....
~ f0- r-
17
/
~
~
~
~
50
25 50 75 100 125
I
16
"
~
I
15
1/
14
-75 -50 -25 0
25 50 75 100 125
TEMPERAlIJRE (OC)
TEMPERAlIJRE (OC)
FREQUENCY (Hz)
TL/H/9212-14
Maximum Output Swing
vs Frequency
30
E
~
z
l!l
~
...'"
~
I
2
20
0
§
15
iii
g
10
::I
,!,
~
o
10k
lOOk
"
1M
0
8'"
::I
10M
Power Supply Rejection
Ratio vs Frequency
Common-Mode Rejection
Ratio vs Frequency
;;;::!!.
25
160
1<40
;;;::!!.
I-
Q
i;i
120
z
100
~
80
<40
20
0
lk
10k
FREQUENCY (Hz)
lOOk
1M
10M
FREQUENCY (Hz)
1<40
~
120
100
~~
~ ~HEGAllVE
SU PLY
80
iii
60
!l:
iii
<40
i
20
~
60
~~~~~
~
o
1
10
100
Ik
~
~
10k lOOk
1M
FREQUENCY (Hz)
TLlH/9212-15
Large-Signal Pulse
Response, Av = + 5
Small-Signal Pulse
Response, Av = + 5
+50mV
+ 10V
o
o
-lOV
-50mV
TIME (200 ns/DlV)
TIME (1 /-Ls/DlV)
TL/H/9212-17
TLlH/9212-16
3-563
....
Co)
Slew Rate vs Temperature
~
C")
CD
:::::E
.....
r::
('II
CD
:::::E
.....
,---------------------------------------------------------------------------------,
Application Hints
OFFSET VOLTAGE
Offset voltage of the LM627/637 is internally trimmed to a
very low value. The data sheet Vas specification applies at
TJ = 25"C, VCM = 0 and ±15V supplies. For other temperatures, common-mode voltages, and supply voltages, temperature drift, common-mode rejection and power-supply rejection errors must be taken into account.
v+
~
Plnl~Pln8
10kD. 10kD. 10kD.
TL/H/9212-5
FIGURE 3. Improved Sensitivity Offset Adjust
Every 100",V of offset will produce a 0.33 ",VfOC drift component. For this reason the offset adjust potentiometer
should not be used to null out a sensor offset if system
temperature drift is important; rather a stable voltage reference must be added to the sensor voltage. Offset voltage
drift is guaranteed by deSign for the LM627C either with or
without external nulling. The higher precision A and B
grades are 100% drift tested and guaranteed without nulling
only.
Since the LM627/LM637C offset voltage is measured within
200 ms of applying power, the 5 p.V typical warmup drift is
not accounted for in the measurement. Fortunately, the
warmup drift is a small fraction of its 100 p.V max offset. For
the 25 p.V A and 50p.V B grades, the offset voltage is measured with the circuit of Figure 1 approximately 5 minutes
after applying power.
To measure Vas with high accuracy, Vas must be amplified
right at the device as shown; otherwise the offset voltage
can be obscured by noise and thermoelectric voltages.
Thermocouples occur in the devices, the IC socket and the
resistor across the device inputs (R2), all of which must be
held isothermal. Usually best results are obtained by placing
the circuit in a box or chamber to minimize airflow and employing a long thermal soak time. R2 should be mounted
symmetrically with respect to potential thermal gradients:
e.g. not perpendicular to the board but instead parallel to
the board and the device socket. In addition, R2 should
have low thermal EMF. Cermet or nichrome metal film types
are acceptable; avoid tin-oxide resistors.
OVERCOMPENSATION
Without any external compensation, the LM627 is stable at
unity gain and up to 500 pF load capacitance. It has a slew
rate of 4.5 VI "'S and a gain-bandwidth product of 14 MHz. If
desired, the amplifier may be overcompensated by adding
external components as shown in Figure 4. This increases
maximum capacitive loading to 2000 pF while decreasing
slew rate to 1.5 V/",s and bandwidth to 1.5 MHz. If overcompensation of the LM627 (or the LM637) is not desired,
pin 5 should be left open.
Rl
R2
100D.
TL1H/9212-6
FIGURE 4. Overcompensation
NOISE
When measuring spot noise voltage, a circuit as shown in
Figure 5 is recommended. The OUT running at a gain of
100 will not roll off until approximately 140 kHz. Adding the
second gain of 100 amplifier brings total OUT-input-referred
gain up to 10,000, which minimizes to minimize sensitivity to
EMI in the environment. When measuring spot noise at 30
Hz, it is recommended that the spectrum analyzer bandwidth be 20 Hz or less to minimize pickup at line frequency.
TUH/9212-3
FIGURE 1. Offset Voltage Test Circuit
OFFSET NULLING
This is usually not required on the LM627/637 family since
its offset voltage is internally trimmed. An offset adjust
range of approximately ± 2 mV is available using a single 10
or 20 kO potentiometer as shown in Rgure 2. With these
values, the adjustment is relatively linear over the entire
range. If a 100 kO potentiomer is used, the adjustment becomes very coarse at the extremes (above 700 p.V) but fine
in the center, which makes it easier to precisely null the
offset. For even more sensitivity, employ a pot in conjunction with two fixed resistors. The circuit of Figure 3, which
uses this technique, has an adjustment range of ± 200 ",V.
Because adjusting the offset voltage of an LM627/637 will
alter its offset voltage temperature drift, caution is advised.
100D.
10kD.
v+
TL/H19212-7
FIGURE 5. Spot Noise Test Circuit
TUH/9212-4
FIGURE 2. Offset Adjust Circuit
3-564
Application Hints (Continued)
The circuit used to measure peak-to-peak noise voltage in
the 0.1 to 10 Hz range is shown in Rgure 6. The device
should be warmed up for about 2 minutes and shielded from
air currents to minimize warmup drift and thermoelectric
voltages. The test time should be limited to only 10 seconds, as this limits noise contributions below 0.1 Hz, as
does the single zero rolloff. The measuring equipment must
be flat down to 0.1 Hz. DC coupling must be employed to
ensure this. Certain types of X-Y plotters may not be usable
because of severe rolloff above a few Hz.
lOll.
'Output to 1 WIl.
scopo Input
Gain =50,000
TL/H/9212-B
FIGURE 6. 0.1 Hz to 10 Hz Noise Test Circuit
•
3-565
Ln r-----------------------------------------------------~--------------------_,
.....
CD
:i
~National
~ Semiconductor
LM675 Power Operational Amplifier
General Description
The LM675 is a monolithic power operational amplifier featuring wide bandwidth and low input offset voltage, making it
equally suitable for AC and DC applications.
The LM675 is capable of delivering output' currents in excess of 3 amps, operating at supply voltages of up to 60V.
The device overload protection consists of both internal current limiting and thermal shutdown. The amplifier is also internally compensated for gains of 10 or greater.
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
Applications
•
•
•
•
•
3A current capability
Avo typicaly 90 dB
5.5 MHz gain bandwidth product
8 V / p's slew rate
Wide power bandwidth 70 kHz
Connection Diagram
1 mV typical offset voltage
Short circuit protection
Thermal protection with parole circuit (100% tested)
16V-60V supply range
Wide common mode range
Internal output protection diodes
90 dB ripple rejection
Plastic power package TO-220
High performance power op amp
Bridge amplifiers
Motor speed controls
Servo amplifiers
Instrument systems
Typical Applications
Non-Inverting Amplifier
TO-220 Power Package (T)
+Vcc
..L
O.'~FT
1~5
VIN
TlIH/6739-1
Front View
Order Number LM675T
See NS Package T05B
4
LM675
22k
~
~V3
_....
-VEE-<
O.'~FT
I
--
1rl,
RL
4!!-S!l
-
TO.22~F
20k
Ik
TlIH/6739-2
3-566
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
Operating Temperature
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature
-65·C to + 150·C
Junction Temperature
150·C
±30V
Supply Voltage
Input Voltage
O·Cto +70·C
Power Dissipation (Note 1)
-VEE to VCC
30W
Lead Temperature (Soldering, 10 seconds)
260·C
ESD rating to be determined.
Electrical Characteristics Vs = ± 25V, T A = 25·C unless otherwise specified.
Typical
Tested Limit
Units
Supply Current
Parameter
POUT
16
50 (max)
mA
Input Offset Voltage
VCM
= OW
= OV
1
10 (max)
mV
p.A
Conditions
Input Bias Current
VCM
=
OV
0.2
2 (max)
Input Offset Current
VCM
=
OV
50
500 (max)
nA
Open Loop Gain
RL
000
90
70 (min)
dB
PSRR
IlVs
±5V
90
70 (min)
dB
±20V
90
70 (min)
dB
±21
±16(min)
=
=
CMRR
VIN
=
Output Voltage Swing
RL
Offset Voltage Drift Versus Temperature
Rs
= 60
< 100kn
Offset Voltage Drift Versus Output Power
25
Output Power
THD
Gain Bandwidth Product
fa
=
= 1 %, fa =
1 kHz, RL
20 kHz, AVCL
=
=
6n
1000
Max Slew Rate
p.V/W
25
20
W
5.5
MHz
6
V/p.s
±22
Input Common Mode Range
V
p'vrc
25
±20(min)
V
Note 1: Assumes TA equal to 70'C. For operation at higher tab temperatures, the LM675 must be derated based on a maximum iunction temperature of 150·C.
Typical Applications (Continued)
Generating a Split Supply From a Single Supply
+16V -+ +60V
v+
Vs
22k
= ±8V
-+ ±30V
~
lk
22k
"
~
15k
•
GND
1
r'3·567
TL/H/6739-3
Typical Performance Characteristics
~
i
!o!
Input Common Mode
Range va Supply Voltage
THO va Power Out ~ut
1.0
Supply Current va
Supply Voltage
35
1=
f-
i
25
II:
20
8lE
15
C>
10
~
illl
z
lE
IE
~Iiiii
If
~ 0.01
CD
...
~
b
0.1
30
:!:!
I-
i
S
10
POWER OUTPUT (W)
100
POsmve SUPPly.;
!
45
40
1"0..
~
35
5!
z
30
Ii:iiO
25
20
!;
INPUT REfERR~D
00
Rl = 40
IVnn. 1 I
2'C/W
I<.HEATSINK
-.i N<. f'
I~ ...... "'"
IW HEAT SINK ...... ,...
o
r
o ,10
I"""
20 3D 40 50 6D 70
!
I
250
150
~
100
~
50
~
30
5
4
V
l\
1\
1
1
\
a
051015202530
OUTPUT VOLIMIE (t V)
'Vs = t25V
35
30
CD
25
:!:!
.... ~ l"- tTA=OOC-
S
I
r--
20
~
15
!Ii!
10
!;
o
o
i
5
10 15 20 25
SUPPLY VOLTAGE (tV)
Output Voltage
Swing va Supply Voltage
TA=25OC.... ~OOC
200
"
80
o
Current Limit va
Output Voltage"
TA-AMBIENT TEMPERATURE I'C)
t81NTERFACE = I' CIW.
See Application Hints.
IB va Supply Voltage
~
I!!i
11 l:'" ~
5 10'j'w!"i Si
20 50 100 200 5DD lk 2k 5k 10k 2Dk
FREQUENCY (Hz)
I
l'C/W HEAT SINK .....
5'
10
o
I
INRNlTE HEAT SIN~
10
-'
~
15
E5
liN
rl 15
1:
C>
lis =
20
iil
Device Dissipation va'
Ambient Temperaturet
N+veSUPPI.~""
o
~
L
051015202530
SUPPLY VOIJAGE (t V)
1 1 1 f"""
.
15
o
1.0
100
80
70
;;- &D
:!i!50
I! 40
30
20
10
!
L
8
PSRR va Frequency
90
/
./
111111
0.1
25
i
5
RL=80
/.. ~ '"
,...
~
~
i--""
-
I""'"Rl=41l
o
10
15
20
25
30
051915202530
SUPPLY VOLTAGE (tv)
SUPPLY VOIJAGE ltV)
TLlH/6739-4
3-568
en
n
~
CD
3
HI
1112
~:
H8
lk7
R23
20K
H21
30
013
01....
. . 02
~D
R18
2k7
r-t:
012
014
R19
lk
023~
VEE
H2O
370
,.A
-INPUT
H3
3k3
04
r~Il
+IHPUT
Cl
Rll
~--W~
07~
'-; 010
Q9~
..... 08
'-;
......
R6
'-;
50k
R4
Sk8
R5
6112
~-L~
C4
R9
4k9
..... 011
R7
50k
ni ~
RID
3k6
R14
395
'-; 03
"lI 025
R37
6k5
~
"lI
r~--+-.,
1M
~ 0.22pF M
10k
Vee
20k
1M
TL/H/6739-B
High Current Source/Sink
10k
1%
100
Vee
lk
1%
V,N o---"'VI/v--....---1
lOUT ~ V,N X 2.5 amps/volt
i.e. lOUT
~
1 A when V,N
Trim pot for max ROUT
-VEE
O.22pF
V
10k
11t/o
lk
1%
41l110W
j lOUT
200 II
10lurn
LOAO
TL/H/6739-9
3-572
~
400 mV
r------------------------------------------------------------------------,
~National
~
3:
.....
~
UI
......
~ Semiconductor
~
3:
.....
~
LM725/LM725A/LM725C
~
Operational Amplifier
~
3:
.....
~
General Description
Features
The LM725/LM725A1LM725C are operational amplifiers
featuring superior performance in applications where low
noise, low drift, and accurate closed-loop gain are required.
With high common mode rejection and offset null capability,
it is especially suited for low level instrumentation applications over a wide supply voltage range.
•
•
•
•
•
•
•
•
•
The LM725A has tightened electrical performance with
higher input accuracy and like the LM725, is guaranteed
over a - 55·C to + 125·C temperature range. The LM725C
has slightly relaxed specifications and has its performance
guaranteed over a O·C to 70·C temperature range.
UI
o
3,000,000
0.6 poVI"C
120 dB
0.15 pAl.JHz
2 nA
±14V
±3V to ±22V
High open loop gain
Low input voltage drift
High common mode rejection
Low input noise current
Low input offset current
High input voltage range
Wide power supply range
Offset null capability
Output short circuit protection
Connection Diagrams and Ordering Information
Dual-In-Llne Package
OFFSET NULL
OFFSET NULL
INVERTING INPUT
2
7
y-
NON-INVERTING INPUT
3
6
OUTPUT
y+
4
5
COMP
INVERTING
INPUT
TL/H/10474-2
Order Number LM725CN
See NS Package Number NOSE
yTOP VIEW
TLlH/10474-1
Order Number LM725H,
LM725AH or LM725CH
See NS Package Number HOSC
3-573
o
."
~
:E
...I
~
....
:E
N
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
±22V
.....
."
N
Internal Power Dissipation (Note 1)
Differential Input Voltage
Inpu1 Voltage (Note 2)
:E
Electrical Characteristics (Note 3)
...I
....
...I
Parameter
Storage Temperature Range
Operating Temperature Range TA(MIN)
-55·C
LM725
-55·C
LM725A
O·C
LM725C
500mW
±5V
±22V
LM725A
Conditions
Min
Typ
-65·Cto + 150·C
260·C
150·C
Lead Temperature (Soldering, 10 Sec.)
Maximum Junction Temperature
LM725
Max
Min
to
to
to
TA(MAX)
+ 125·C
+ 125·C
+700C
LM725C
Typ
Max
0.5
0.5
Min
Units
Typ
Max
1.0
0.5
2.5
Input Offset Voltage
(Without External Trim)
TA = 25·C,
Rs';;; 10kO
Input Offset Current
TA
2.0
5.0
2.0
20
2.0
35
nA
Input Bias Current
TA
42
80
42
100
42
125
nA
Input Noise Voltage
Input Noise Current
Input Resistance
Input Voltage Range
Large Signal Voltage Gain
= 25·C
= 25·C
TA = 25·C
to = 10 Hz
to = 100Hz
to = 1 kHz
TA = 25·C
to = 10Hz
to = 100 Hz
to = 1 kHz
TA = 25·C
TA = 25·C
TA = 25·C,
RL:2: 2kO,
VOUT = ±10V
Common-Mode
Rejection Ratio
TA = 25·C,
Rs';;; 10kO
Power Supply
Rejection Ratio
TA = 25·C,
Rs';;; 10kO
Output Voltage Swing
TA = 25·C,
RL:2: 10kO
RL:2: 2kO
=
Power Consumption
TA
Input Offset Voltage
(Without External Trim)
Rs';;; 10kO
Average Input Offset
Voltage Drift
(Without External Trim)
Rs
Average Input Offset
Voltage Drift
(With External Trim)
Rs
Input Offset Current
TA
TA
=
=
=
=
25·C
TA
TA
=
=
15
9.0
8.0
15
9.0
8.0
15
9.0
8.0
nV/.JHz
nV/.JHz
nV/.JHz
1.0
0.3
0.15
1.0
0.3
0.15
1.0
0.3
0.15
pAl.JHz
pAl.JHz
pAl.JHz
1.5
MO
±13.5
±14
1.5
±13.5
·±14
1.5
±13.5
±14
V
1000
3000
1000
3000
250
3000
V/mV
110
120
94
120
dB
120
2.0
±12.5
±12.0
5.0
±13.5
±13.5
80
2.0
±12
±10
105
10
±13.5
±13.5
80
0.7
2.0
±12
±10
105
35
±13.5
±13.5
80
1.5
",VIV
V
V
150
mW
3.5
mV
500
2.0
2.0
5.0
2.0
",VI"C
0.6
1.0
0.6
0.6
",VI"C
1.2
7.5
4.0
18.0
1.2
7.5
20
40
1.2
4.0
35
90
35
150
10
20
80
70
180
20
80
100
200
500
TMAX
TMIN
Average Input Offset
Current Drift
Input Bias Current
mV
TMAX
TMIN
3-574
35
50
nA
nA
pAI"C
125
250
nA
nA
r......
5:
Electrical Characteristics (Note 3) (Continued)
Parameter
LM725A
Conditions
Min
Large Signal Voltage Gain
Typ
LM725
Min
Max
Typ
N
U1
LM725C
Max
Min
Typ
Units
Max
1,000,000
1,000,000
125,000
VIV
~
.......
500,000
250,000
125,000
VIV
5:
110
100
115
dB
o
20
,..VIV
RL:2! 2kO
TA = TMIN
r5:
......
N
RL:2! 2kO
TA = TMAX
.......
r-
......
N
Common-Mode
Rejection Ratio
Rs';;; 10 kO
Power Supply
Rejection Ratio
Rs';;; 10kO
Output Voltage Swing
RL:2! 2kO
U1
8.0
±12
20
±10
±10
V
Note 1: Derate at 15rJ'C/W for operation at ambient temperatures above 7S·C.
Note 2: For supply voltages less than ±22V, the absolute maximum Input voltage is equal
Nate 3: These specifications apply for Vs
~
to the supply voltage.
± 15V unless otherwise specified.
Schematic Diagram
~__~--1-----'----1__--~------~------~---1__----1-----~------.-~7 ~
R2A
10k
Rt6
25
L-________~--~--__~--+_----~--_+----------+_--~--~--_4--~~
TL/H/l0474-5
3-575
or---------------------------------------------------------------------~
~
...
Typical Performance Characteristics
:!!
~
,...
:J
~
,...
('II
...
:!!
....
Voltage Gain vs Temperature
for Su !)ply Voltages
1~
..
vcc=*~
I"'~~
I
I
~
vcc·:t5Y I-
~ 120 1-
100
~
~ UIO
§!
~
Rt.~2kA
.... f-"
-60
-20
20
80
100
1~
1-
-60
-20
TEMPERATURE - "C
7
I
iii
,
5
4
3
100
o
1~
-60
100
Vee = t15V
\
'\
I~
~~ vee = nov
1":~_Vee=tlSV
[\
~
vee = tlOV1 ~!!!iI1!!o.
vee = uv
~
....
-20
20
60
TEMPERATURE - "C
100
1~
o
-60
~
1-1- 30 1-1- -
~
20
5
10
20
60
TEMPERATURE - "C
60
100
1«1
iii
100
1~
I
0
vee=tlsvttt
TA= 25"C
PREVIOUS VIO :S lpV
1'\
~
1 I
-20
20
Stabilization Time of
Input Offset Voltage
from Power Turn-on
~
~
1,1t\,
~
-2Il
TEMPERATURE - "C
Input Bias Current
va Temperature
1
-60
60
I
2
o
20
TEMPERATURE - "C
Input Offset Current
8 vs Temperature
~
i
...
,
100
60
IB
.....
i-'"
iii
~
1
Vc:c=tI5V
, iL
0
i-so
80
Untrimmed Input Offset
Voltage vs Temperature
1
1.0
Vee = tlSV I. _L
Vas :S 5pV 01 2S"C 1-7~
50
t;
III
§
Change In Trimmed Input
Offset Voltage vs Temperature
1
1 1
'\
IoN
r--.
1
lIIE FROM POWER APPUCA110N - IIIN
TUH/lD474-6
3-576
I"'"
Typical Performance Characteristics
3:
.....
N
(Continued)
.....
I"'"
g
.....
N
U'I
Change in Input
Offset Voltage Due to
Thermal Shock vs Time
~ 3D
I
~
§,!
~
20
~
1I
;:Ii
1
10
~
a;
I
B1(r
t6
!ii
~ 10""17
~
'i"t"
-20
20
0
ii3
~
Vee = t15V
PREVIOUS QUIESCENT
VIO:S lpV
60
40
80
100
nWE FROM HEAT APPUCAnON -
U)'"IB
10
160
I"'-r-.
r:
i
I-I-
RL-~
s
-60
-20
20
~
80
I
a
~
§,!
I';
60
= tl0V
9
Vee
t5V
100
40
20
9
a
~
= 474 Cl = 0.01 pF
:n-o. .......
RI = lOA CI = 0.05pF::;t
R2 = 394 C2 = O,o2pF
~
~-
.......
-20
10324104241052
FREQUENCY - Hz
100
1.Dk
10k
lOOk
FREQUENCY - Hz
Values for Suggested Compensation Networks vs Various
Close Loop Voltage Gains
lOOk
lOOk
Cl
10k
§,!
I';
~
1.Ok
10
25
'"
20
5
15
!5
z
10
5
o
";;
f~
Vee = :tl~
T=25'<:
10
\i
z
102
~
10
10
102
103
104
1
CLosm LOOP VOLTAGE GAIN
Transient Response
1200
l'l~l~
0
~e
~
100
I
tj
ill
Output Voltage Swing
vs Frequency (Note 1)
~
Rl
R2
100
III
1
1
>
'a
l,ok
tj
3D
10k
C2
~
I
FREQUENCY - Hz
= 0-001 pF'
~ : ~~~\:~ ~O~:O15~
U'I
10
140
~.=25'<:
Rl
10-27
'"
~
Frequency Response for
Various Close Loop
Gain (Note 1)
Rl ~ 10kA CI = 50pF Vee =tl5Y
CI
lOOk
3:
.....
N
o
Z
Vee
= 4704
10k
a
_~v
RI
1.Dk
= 250C
"'0
TEMPERATURE - 'C
z
10-2B
~
'"I
III
~
60
~
150.-.--,--.--.--r-,
J.
40
o
10-25
Open Loop Frequency
Response for Values
of Compensation (Note 1)
111
20
~z
FREQUENCY - Hz
... ~t2IOV
-
100
T"
lcJ2-4
Ii!
Power Consumption
vs Temperature
~ 140
I
120
vee - t15V
-: ur2l
11)'"14
~
.....
I"'"
11)'"22
N
!-
!!l
~ IAP~LY
-10
Input NOise
Current vs Frequency
~
~'C 6Jc~
:;;
!!l
~
Input Noise
Voltage vs Frequency
~8OD
I
90X
~
g
i
I
r
I
400
l°iL
RISE nME
Vee = t15V
T. = 25'C
At = 2k4
Ct= 150pF
.\veL = 100
I
103
104
105
106
FREQUENCY - Hz
nME - PI
TL/H/l0474-7
Note 1: Performance is shown using recommended compensation networks.
Transient Response Test Circuit
50k4
>~-
__ Vo
150pF
.I.
0.1 pF
TLlH/l0474-8
3-577
Auxiliary Circuits
Voltage Offset
Null Circuit
v+
~
TL/H/l0474-3
Frequency Compensation
Circuit
Compensation Component Values
R1
(0)
C1
R2
C2
(J£F)
(0)
(J£F)
10,000
10k
50pF
1,000
470
0.001
100
47
0.Q1
10
27
0.05
270
0.0015
1
10
0.05
39
0.02
AV
R3
R2
l
eI
Rl
TL/H/l0474-4
3-578
r-
:s:::
.....
Typical Applications
N
U1
.....
r:s:::
.....
N
Photodiode Amplifier
R4
100!l. (NOTE 1)
...--'\fIIY-l0.000
R5
Cl
+----"""'.,.,..-.. . . . . .--.....- ........
GAIN
"VII""'""-1.000
1 k!l.
(NOTE 1)
+15V
R3
100 k!l.
R7
RANGE
~ELECT
100
R6
10k!l.
~
......
r:s:::
.....
N
-=
U1
o
10
(NOTE 1)
(NOTE 1) CALIBRATE
200!l.
OUT TO
RB
9.1 k!l.
C2
220pF
4.7}JF
35V
@
.I.
I
C4
-15V
R15
2k!l.
(NOTE 1) (NOTE 1)
RECORDER
R14
100!l.
(NOTE 1)
C3
100 PF
RIO
510!l.
TLlH/l0474-9
DC Gains
~
10.000; 1.000; 100; and 10
Bandwidth ~ Determined by value of Cl
± 100V Common Mode Range Differential Amplifier
Thermocouple AmplifIer
Cl
500pF
Rl
R3
5k!l.
50k!l.
R2
511 k!l.
(NOTE 1)
5k!l.
R3
>~"",-'lJy.,."'- OUT
200!l.
5k!l.
C2
REFERENCE
THERMOCOUPLE
R3
511 k!l.
(NOTE 1)
R4
IN
100pF
I
~OPF
R7
50k!l.
R6
510!l.
+ ..........JVIIv-......--1
TL/H/l0474-10
>-.........--OUT
39!l.
~ ~ ~forbestCMR
R5
R6
50k!l.
5k!l.
R7
Rl
~
R4
R2
~
R5
Gain
~~+
R2
(2Rl)
R3
DC Gain ~ 1000
Bandwidth ~ DC to 540 Hz
Equivalent Input Noise ~ 0.24
TLlH/l0474-11
"Vrm.
Note 1: Indicates ± 1% metal film resistors recommended for temperature
stability.
3-579
•
Typical Applications (Continued)
Instrumentation Amplifier with High
Common Mode Rejection
R2
10k4
3
6
2
394
R6
100k4
Rl
47k4
>-~H~OUT
IN
2704
R3
10k4
6
R4
47k4
R5
10k4
+
R7
l00k4
394
TLlHI10474-12
R1
R3
Re = R4 for best CMRR
R3
=
R1
= R6 = 10 R3
Gain
R4
=~
R7
Precision Amplifier AVCL
=
50 ..4
1000
10k4
OFFSET
V+ ~ NULL
90k4
500k4
G
6
500k4
3
50 ..4
Eo
lOOO'~
4704
TLlH/10474-13
3·580
~-------------------------------------------------------------------------------,
.....
II?'A National
~ Semiconductor
....
~
......
~
.....
LM741/LM741A/LM741C/LM741 E Operational Amplifier
The LM741 series are general purpose operational amplifiers which feature improved performance over industry standards like the LM709. They are direct, plug-in replacements
for the 709C, LM201, MC1439 and 748 in most applications.
The amplifiers offer many features which make their application nearly foolproof: overload protection on the input and
output, no latch-up when the common mode range is exceeded, as well as freedom from oscillations.
The LM741C/LM741E are identical to the LM741 ILM741 A
except that the LM741C/LM741E have their performance
guaranteed over a O'C to + 70'C temperature range, instead of - 55'C to + 125'C.
Schematic and Connection Diagrams (Top Views)
r-~__________~~____~____________-1~________~7 ~
NON-INVERTING 3
INPUT
R9
25
6 OUTPUT
RIO
50
5 OFFSET
NUU
R2
IK
__-+__-4__________4-__________
RI
IK
~
....l:~
......
r3:
General Description
OFfSET NUU
r3:
~~
__4-__-+__________
~4~
TL/H/9341-1
Metal Can Package
Dual-In-Llne or S.O. Package
Ne
Ne
OFFSET NULL
INVERTING INPUT
INVERTING INPUT 2
NON-INVERTING
INPUT
TUH/9341-2
Order Number LM741H, LM741AH,
LM741CH or LM741EH
See NS Package Number HOSC
6
OUTPUT
5
OFFSET NULL
TUH/9341-3
Order Number LM741J, LM741AJ, LM741CJ,
LM741CM, LM741CN or LM741EN
See NS Package Number JOSA, MOSA or NOSE
3-581
.....
~
....
Q
r3:
.....
....m
~
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
(Note 5)
LM741A
LM741E
LM741
LM741C
Supply Voltage
±22V
±18V
±22V
±22V
Power Dissipation (Note 1)
SOOmW
SOOmW
SOOmW
SOOmW
Differential Input Voltage
±30V
±30V
±30V
±30V
Input Voltage (Note 2)
±1SV
±1SV
±1SV
±1SV
Output Short Circuit Duration
Continuous
Continuous
Continuous
Continuous
- SS'C to + 12S'C
O'Cto +70'C
Operating Temperature Range
O'Cto +70'C
- SS'C to + 12S'C
Storage Temperature Range
- 6S'C to + 1S0'C
-6S'C to + 1SO'C
- 6S'C to + 1SO'C
-6S'Cto +1SO'C
Junction Temperature
1S0'C
100'C
1SO'C
100'C
Soldering Information
N·Package (10 seconds)
J- or H·Package (10 seconds)
M·Package
Vapor Phase (60 seconds)
Infrared (1S seconds)
260'C
300'C
260'C
300'C
26O'C
300'C
260'C
300'C
215"C
21S'C
21S'C
21S'C
21S'C
21S'C
21S'C
21S'C
See AN·4S0 "Surface Mounting Methods and Their Effect on Product Reliability" for other methods of soldering
surface mount devices.
ESD Tolerance (Note 6)
400V
400V
400V
400V
Electrical Characteristics (Note 3)
Parameter
Conditions
LM741A/LM741E
Min
Input Offset Voltage
TA = 2S'C
Rs';;: 10kO
Rs';;: SOO
Typ
Max
0.8
3.0
TAMIN';;: TA';;: TAMAX
Rs';;: SOO
Rs';;: 10kO
Input Offset Current
TA = 2S'C, Vs = ±20V
Max
2.0
6.0
7.S
TA = 2S'C
±1S
3.0
±1S
30
TA = 2S'C
30
20
200
70
8S
SOO
1.0
TAMIN';;: TA';;: TAMAX,
Vs = ±20V
O.S
6.0
80
80
20
SOO
80
1.S
0.3
2.0
200
nA
300
nA
0.8
0.3
±12
SO
TAMIN';;: TA';;: TAMAX,
RL ~ 2kO,
Vs = ±20V, VO= ±1SV
Vs= ±1SV,Vo= ±10V
Vs = ±SV, Vo = ±2V
32
SOO
2.0
nA
/LA
MO
MO
TA = 2S'C
TA = 2S'C, RL ~ 2 kO
Vs = ±20V, Vo = ±1SV
Vs = ±1SV, Vo = ±10V
mV
mV
nAI'C
0.210
TA = 2S'C, Vs = ±20V
mV
mV
mV
O.S
TAMIN ,;;: TA';;: TAMAl<
Large Signal Voltage Gain
S.O
Units
Typ
/LV/'C
±10
TAMIN';;: TA';;: TAMAl<
Input Voltage Range
1.0
Min
1S
Average Input Offset
Current Drift
Input Resistance
Max
6.0
TAMIN ,;;: TA';;: TAMAX
Input Bias Current
LM741C
Typ
4.0
Average Input Offset
Voltage Drift
Input Offset Voltage
Adjustment Range
LM741
Min
±12
±13
SO
200
2S
10
3-S82
±13
V
V
20
1S
200
V/mV
V/mV
V/mV
V/mV
V/mV
Electrical Characteristics (Note 3) (Continued)
Parameter
Conditions
Min
Output Voltage Swing
Vs = ±20V
RL;;'10kO
RL;;' 2 kO
Typ
Max
±12
±10
TA = 25'C
TAMIN:S; TA:S; TAMAX
10
10
25
Common·Mode
Rejection Ratio
TAMIN:S; TA :s; TAMAX
Rs:S; 10kO, VCM = ±12V
Rs:S; 500, VCM = ±12V
80
95
86
96
TAMIN:S; TA:S; TAMAX,
Vs = ±20Vto Vs = ±5V
Rs:S; 500
Rs:S; 10kO
TA
=
0.25
6.0
Bandwidth (Note 4)
TA
=
=
25'C
TA
Supply Current
TA
=
25'C
Power Consumption
TA
Vs
Vs
=
=
=
25'C
±20V
±15V
=
=
=
Vs =
TA =
TA =
Vs =
TA =
TA =
LM741E
LM741
Max
Min
Typ
Units
Max
±14
±13
±12
±10
25
35
40
±14
±13
V
V
25
mA
mA
dB
dB
70
90
70
90
77
96
77
96
dB
dB
25'C, Unity Gain
Slew Rate
LM741 A
Typ
V
V
Output Short Circuit
Current
Transient Response
Rise Time
Overshoot
Min
LM741C
±16
±15
Vs = ±15V
RL;;'10kO
RL;;' 2kO
Supply Voltage Rejection
Ratio
LM741
LM741A1LM741E
25'C, Unity Gain
0.437
1.5
0.3
0.7
80
0.8
20
0.3
5
0.3
5
,..S
0.5
0.5
VI,..s
%
MHz
1.7
2.8
1.7
2.8
mA
50
85
50
85
mW
mW
150
Vs
±20V
TA
TA
TAMIN
TAMAX
165
135
mW
mW
±20V
TAMIN
TAMAX
150
150
mW
mW
±15V
TAMIN
TAMAX
60
45
100
75
mW
mW
Note 1: For operation at elevated temperatures, these devices must be derated based on thermal resistance, and Tj max. (listed under "Absolute Maximum
Ratings"). Tl
~
TA + (OIA PD)'
Thermal Resistance
OjA (Junction to Ambient)
0IC (Junction to case)
Cerdlp(J)
DIP(N)
H08(H)
SO·8(M)
100'C/W
100'C/W
170'C/W
19S'C/W
N/A
N/A
2S'C/W
N/A
Note 2: For supply voltages less than ± ISV. the absolute maximum input voltage is equal to the supply voltage.
Note 3: Unless otherwise specified, these specifications apply for Vs ~ ±ISV, -SS'C :;; TA:;; + 12S'C (LM741/LM741A). For the LM741C/LM741E, these
specifications are limited to O'C :;; TA :;; + 70'C.
Note 4: Calculated value from: BW (MHz) ~ 0.3S/Rise Time("s).
Note 5: For military specifications see RETS741X for LM741 and RETS741AX for LM741A.
Note 6: Human body model, I.S kO in series with 100 pF.
3·583
C) , - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ,
C)
C)
"""" '?JI National
...... ~ Semiconductor
:E
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CD
It')
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:E
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LM759/LM77000
Power Operational Amplifiers
General Description
Features
The LM759 and LM77000 are high performance operational
amplifiers that feature high output current capability. The
LM759 is capable of providing 325 mA and the LM77000
providing 250 mAo Both amplifiers feature small signal characteristics that are better than the LM741. The amplifiers
are designed to operate from a single or dual power supply
with an input common mode range that includes the negative supply. The high gain and high output power provide
superior performance. Internal current limiting, thermal shutdown, and safe area compensation are employed making
the LM759 and LM77000 essentially indestructible.
• Output current
LM759-325 mA minimum
LM77000-250 mA minimum
• Internal short circuit current limiting
• Internal thermal overload protection
• Internal output transistors safe-area protection
• Input common mode voltage range includes ground or
negative supply
Applications
•
•
•
•
Voltage regulators
Audio amplifiers
Servo amplifiers
Power drivers
Connection Diagrams and Ordering Information
NC
TL/H/1007S-2
Top View
Order Number LM759CP or LM77000CP
See NS Package Number P04A
vTL/H/1007S-1
Lead 4 connected to case.
Top View
Order Number LM759MH or LM759CH
See NS Package Number HOSC
3-584
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature Range
Metal Can
-65'Cto
Plastic Package
- 65'C to
Operating Junction Temperature Range
Military (LM759M)
-55'Cto
Commercial (LM759C, LM77000C)
O'Cto
Lead Temperature
Metal Can (soldering, 60 sec)
Plastic Package (soldering, 10 sec)
LM759
Electrical Characteristics TJ =
Symbol
Internal Power Dissipation (Note 1)
Internally Limited
±18V
Supply Voltage
SOV
±15V
Differential Input Voltage
Input Voltage (note 2)
+ 175'C
+ 150'C
+ 150'C
+ 125'C
SOO'C
265'C
25'C, Vee = ± 15V, unless otherwise specified
Parameter
Conditions
Min
Typ
Max
Units
Via
Input Offset Voltage
1.0
s.o
mV
110
Input Offset Current
5.0
SO
nA
liB
Input Bias Current
50
150
ZI
Input Impedance
lee
Supply Current
Rs,;;;10kn
0.25
1.5
12
V+ -2VtoV-
VIR
Input Voltage Range
los
Output Short Circuit Current
IVee-vol = SOV
10 PEAK
Peak Output Current
S.OV';;; IVee-vol ,;;; 10V
Avs
Large Signal Voltage Gain
RL
TR
Transient Response
I Rise Time
I Overshoot
~
500, Va = ±10V
nA
MO
18
mA
V+ - 2VtoV-
V
±200
mA
±S25
±500
mA
50
200
V/mV
SOO
ns
RL = 500, Av = 1.0
5.0
0/0
SR
Slew Rate
RL = 500,Av = 1.0
0.6
V/p.s
BW
Bandwidth
Av = 1.0
1.0
MHz
The following specifications apply for - 55'C ,;;; TJ ,;;;
Via
Input Offset Voltage
110
Input Offset Current
+ 150'C
Rs';;;10kn
4.5
mV
60
nA
liB
Input Bias Current
CMRR
Common Mode Rejection Ratio
Rs';;; 10kn
80
PSRR
Power Supply Rejection Ratio
Rs';;; 10 kn
80
100
dB
Avs
Large Signal Voltage Gain
RL
25
200
V/mV
VOP
Output Voltage Swing
RL = 500
±10
±12.5
V
SOO
~
50n, Va = ±10V
S-585
100
nA
dB
«:)
«:)
«:)
.....
.....
:E
.....
......
CD
Ln
.....
:E
.....
LM759C
Electrical Characteristics TJ = 25'C, Vee =
Symbol
Parameter
± 15V, unless otherwise specified
Conditions
Min
Rs';: 10ko.
Typ
Max
Units
VIO
Input Offset Voltage
1.0
6.0
mV
110
Input Offset Current
5.0
50
nA
liB
Input Bias Current
50
250
ZI
Input Impedance
lee
Supply Current
0.25
12
V+ -2VtoV-
VIR
Input Voltage Range
los
Output Short Circuit Current
IVee-vol
10 PEAK
Peak Output Current
3.0V,;: IVee-vol ,;: 10V
Avs
Large Signal Voltage Gain
RL;" 500., Vo
TR
Transient Response
SR
Slew Rate
BW
Bandwidth
I Rise Time
I Overshoot
The following specifications apply for 0' ,;: TJ ,;:
VIO
Input Offset Voltage
110
Input Offset Current
1.5
=
30V
=
RL = 500., Av =
=
Av =
RL
500., Av
=
±10V
nA
Mo.
18
mA
V+ - 2VtoV-
V
±200
mA
±325
±500
mA
25
200
V/mV
300
ns
1.0
1.0
1.0
10
%
0.5
V/IJ-s
1.0
MHz
+ 125'C
Rs,;: 10ko.
liB
Input Bias Current
CMRR
Common Mode Rejection Ratio
PSRR
Power Supply Rejection Ratio
Rs';: 10ko.
Avs
Large Signal Voltage Gain
RL;" 500., Vo
VOP
Output Voltage Swing
RL
7.5
mV
100
nA
400
Rs';: 10ko.
=
70
=
±10V
500.
3-586
100
nA
dB
80
100
dB
25
200
V/mV
±10
±12.5
V
r-
LM77000
Electrical Characteristics TJ =
Symbol
:s:
.......
UI
Parameter
Via
Input Offset Voltage
110
Input Offset Current
liB
Input Bias Current
ZI
Input Impedance
CD
......
25'C, Vee = ± 15V, unless otherwise specified
Conditions
Min
Rs';:10kn
r-
Typ
Max
Units
1.0
8.0
mV
5.0
50
nA
50
250
:s:
.......
.......
Q
Q
Icc
Supply Current
VIR
Input Voltage Range
los
Output Short Circuit Current
IVee-vol = 30V
10 PEAK
Peak Output Current
3.0V';: IVee-vol ,;: 10V
Avs
Large Signal Voltage Gain
TR
Transient Response
I Rise Time
I Overshoot
RL;;;' 500., Va = ±10V
nA
0.25
1.5
+13toV-
+13toV-
V
±200
mA
12
Mn
18
mA
±250
±400
mA
25
200
V/mV
300
ns
RL = 50n,Av = 1.0
Q
10
%
SR
Slew Rate
RL = 50n,Av = 1.0
0.5
V/I'-s
BW
Bandwidth
Av = 1.0
1.0
MHz
The following specifications apply for 0' ,;: TJ ,;: + 125'C
10
mV
Input Offset Current
100
nA
Input Bias Current
400
Via
Input Offset Voltage
Rs';: 10kO
110
liB
CMR
Common Mode Rejection
Rs';:10kO
70
PSRR
Power Supply Rejection Ratio
Rs,;:10kO
80
100
dB
Avs
Large Signal Voltage Gain
RL;;;' 500., Va = ±10V
25
200
V/mV
100
nA
dB
±10
±12.5
Output Voltage Swing
V
RL = 500
VOP
Nate 1: Although the internal power dissipation is limited, the iunction temperature must be kept below the maximum specified temperature in order to meet data
sheet specifications. To calculate the maximum junction temperature or heat sink required, use the thermal resistance values which follow the Equivalent Circuit
Schematic.
Note 2: For a supply voltage less than 30V between V+ and V-. the absolute maximum input voltage is equal to the supply voltage.
•
3-587
LM759/LM77000
rn
.Q
C
.
~
H1
. - - - -.....Wt
•
" "
Y+
020
CD
::::s
n
~.
c::;:
OUT
-IH
+IH
I
Co>
iR
(I)
06
Z1
I'
"I"
-OFFSET
HUll
+OfFSET
"
,
y-
NUll
TUH/l0075-3
Note: All resistor values in ohms.
Max
Mounting Hints
IIJC
·C/W
Max
IIJC
·C/W
Typ
Package
IIJA
·C/W
IIJA
Metal Can Package (LM759CH/LM759MH)
·C/W
Plastic Package (P)
8.0
12
75
80
Metal Gan (H)
30
40
120
150
Typ
The LM759 in the 8-Lead TO-99 metal can package must
be used with a heat sink. With ± 15V power supplies, the
LM759 can dissipate up to 540 mW in its quiescent (no
load) state. This would result in a 100·G rise in chip temperature to 125·C (assuming a 25·G ambient temperature). In
order to avoid this problem, it is advisable to use either a slip
on or stud mount heat sink with this package. If a stud
mount heat sink is used, it may be necessary to use insulating washers between the stud and the chassis because the
case of the LM759 is internally connected to the negative
power supply terminal.
PlastiC Package (LM759CP/LM77000CP)
P
_ TJMax - TAor
o Max - IIJC + IICA
= TJ Max - TA (without a heat sink)
IICA = IIcs
+
IIJA
liSA
Solving TJ:
TJ = TA + Po (IIJC + IICA) or
= TA + POIIJA (without a heat sink)
Where:
TJ
= Junction Temperature
TA = Ambient Temperature
Po = Power Dissipation
IIJA = Junction to ambient thermal resistance
IIJC = Junction to case thermal resistance
IICA = Case to ambient thermal resistance
IIcs = Case to heat sink thermal resistance
liSA = Heat sink to ambient thermal resistance
The LM759CP and LM77000CP are designed to be attached by the tab to a heat sink. This heat sink can be either
one of the many heat sinks which are commercially available, a piece of metal such as the equipment chassis, or a
suitable amount of copper foil as on a double sided PC
board. The important thing to remember is that the negative
power supply connection to the op amp must be made
through the tab. Furthermore, adequate heat sinking must
be provided to keep the chip temperature below 125·C under worst case load and ambient temperature conditions.
3-589
Typical Performance Characteristics
....,
Frequency Response for
Various Closed Loop Gains
-"
100
90
80
.~ 70
~
..
!'!
0
9
fil
l!l
d
~
~
60
~ so
"
40
30
20
10
0
-10
....,
.....
100
90
GAIN
80 I~
70
~
60
III so
~ 40
!'! 30
20
9 10
0
0-10
0
it!
Output Voltage vs
Load Resistance
J.,
25
1111
III
20
~
15
~
I
I'
/,
J
100
I
~
-2 e-
r--
-6
10
Vee = t15V
RL = 504
20Vp..p
1
ji!
20
!'!
5
t=
15
~
1\
10
5
·5
~
102
103
o
6Or-~~~~~~~
'E,
1\
I
-\
I--
40 1-,9_01:-11+-+--+--1_+---1
I : 1-+++
'+Rt-ISE_llt-M_E-I-0_,22--,I"e-y
Vee = t15V
10 I---t+-++-+--f- RL = 504 t;o~
c,. = 100pF
I
TA = 25'1:
,
_
- --
o
10 20 30 40 SO 60
D.2 D.4 0.6 D.8 1.0 1.2 1.4
l1ME -I's
Input Noise Voltage
vs Frequency
Total Harmonic Distortion
vs Power Output
10
103
=t18V (324)
=t12V ('64.84)
=,
kHz
Ay =,
Vee
Vee
Vee = t15V
TA = 25'1:
=
f
l-
Ay = 20dB
Ilt
,
,84
Ay = OdB
1
105
601--+--+--+--t---t-J-t--i
,~
liME -I"
.
104
Voltage Follower
Transient Response
I
1000
Total Harmonie Distortion
vs Frequency
1
~
25
~
FREQUENCY - Hz
Vee = t15V--i1lt=500 I I
TA = 25'1:
I
LOAD RESISTANCE - 4
..
OUTPUT
INPUT
-4
1// T = l5O'C
V Il L
I
II-
,
>
~O
10
",
J.,
I
II
"J
10
~
Voltage Follower Large
Signal Pulse Response
Vee = t15V
TJ = 25'1:
(;!
Vee = t15V
RL = 504 TA = 25'1:
FREQUENCY - Hz
FREQUENCY - Hz
IIII
35
30
100 10' 102 103 104 105 10' 107
100 10' 102 103 104 105 106 107
30
180
160
140
PHASE I-- 120
100
80
60
40
20
0
-20
-40
... "
.
"
Output Voltage
vs Frequency
Open Loopvs
Frequency Response
324
0.001
0.01 0.02 D.DS 0.1 0.2 0.5 1.0 2
FREQUENCY - Hz
10'
Noise Current
vs Frequency
FREQUENCY - Hz
Short Circuit Current
vs Junction Temperature
800
Vee = t15V
TA - 25'1:
1
1
700
'600 ~
~500
......
,
5 10
POWER OUTPUT - W
8400
r-..
.......
I
r-....
!z 400 H++-bl9-+H-t-H
8!
........ ......
.............
t:
~300
G 300 H~q..H-++-+-l-+-H
.......
1;;200
~
~ 2OO~~+-H-++H-t-H
o
~ lOOH~H++4-+~~~
100
-SO
FREQUENCY - Hz
Peak Output Current
vs Output Voltage
600 r:POWER=:-:SU"'P::::PL"'Y_-=S1NGLE=:-:3::C'v"'-'---r-1
500 TEMPERATURE T, = 25'C
SO
100
JUNCTION TEMPERATURE - 'I:
ISO
6
12
18
24
30
36
OUTPUT VOLTAGE - V
Tl/H/l0075-4
3-590
r5:
......
Applications
U1
CD
.....
r-
Paralleling LM759 Power Op Amps
Offset Null Circuit
5:
......
......
«:)
«:)
«:)
0.5.0.
t
v-
TLlH/l007S-S
0.5.0.
Audio Applications
TLlH/l007S-6
Low Cost Phono Amplifier
C2
10pF
R3
25k
I
Cl
Rl
PI
47k
CRYSTAL~
CARTRIDGE
.I.
-
0.05 J.lF
25k
VOL
CONT
P2
10k
TONE
CONTROL
TL/H/l007S-7
3-591
Speaker
Impedance
(Ohms)
Output
Power
(Watts)
Min
Supply
(Volts)
VOp_p
(Volts)
4
8
16
32
0.18
0.36
0.72
1.44
9
12
15
25
2.4
4.8
9.6
19.2
C)
C)
r-------------------------------------------------------------------------------------,
~
:::E
Applications (Continued)
..J
BI-Directlonallntercom System Using the LM759 Power Op Amp
m
....
+12V
:::E
..J
+12V
164
XTAL
MIKE
-12V
TONE
CONTROL
(OPTIONAL)
+12V
164
XTAL
MIKE
-12V
TONE
CONTROL
(OPTIONAL)
TllH/.l0075-9
Features:
Circuit Simplicity
1 Watt of Audio Output
Duplex operation with only one two-wire cable as interconnect.
Note 1: All resistor values in ohms.
3-592
Applications (Continued)
r
i:
.......
en
Servo Applications
High Slew Rate Power Op Ampl Audio Amp
r-------1--.....-
AG Servo Amplifier-Bridge Type
c
50k
5k
V, -;-I E--'V'Irv-..---ItM,.......,
-IBV
304
.......
IOpF
10k
+28V -...J.M....-....._-I
t-----Vo
5k
PO(MAX) (84) ... IBW
\,,)..J..J.J
o
5.1 k
2 PHASE
SERVOMOTOR
304
L.._ _ _ _~......-
.....-
.I
-13V
O.47pF
10k
TLlH/l0075-10
Features:
TLlH/l0075-11
High Slew Rate 9 V / /JoS
High 3 dB Power Bandwidth 85 kHz
18 Watts Output Power into an 80 load.
Low Distortion--o.2%, 10 Vrms, 1 kHz into 80
Features:
Gain of 10
Design Consideration
Av;" 10
325 mA Max Output Current
Use of LM759 Means Simple Inexpensive Circuit
Design Considerations:
DC Servo Amplifier
5k
50k
+15V
V,
1
Features:
Circuit Simplicity
One Chip Means Excellent Reliability
Design Considerations
10 s: 325 mA
Note 1: All resistor values in ohms.
3-593
r
i:
~
o
o
+28 V
5.1 k
CD
......
SERVOMOTOR
TL/H/l0075-12
o
o
o
.....
.....
Regulator Applications
:E
Adjustable Dual Tracking Regulator
...J
.......
en
II)
+VI - - - - - - - . ,
+7V TO +35V
.....
:E
...J
~-------~~--~--+Vo
GND -
5.6 k
1%
-4_+-----'
.....
5.6k
1%
-VI - ....- - - !
-7V TO -35 V
TL/H/10075-13
Features:
Wide Output Voltage Range (±2.2V to ±30V)
Excellent Load Regulation 11Va < ± 5 mV for 1110 = ± 0.2 A
Excellent Line Regulation I1Vo < ±2 mV for I1VI = 10V
Note 1: All resistor values in ohms.
10 Amp -
12 Volt Regulator
VI
15-25V - -......- -.......- - - - - - - - - ,
01
2N2907
04
2N2612
+
I.
Vo
15 JLF
=12V
@25V
R5
9.1 k
R6
3k
Features:
Excellent Load and Line Regulation
Excellent Temperature Coefficient-Depends
Largely on Tempco of the Reference Zener
TLlH/10075-14
Note 1: All resistor values in ohms.
3-594
,------------------------------------------------------------------------, r
5:
......
~
~National
~ Semiconductor
LM776
Multi-Purpose Programmable Operational Amplifier
General Description
Features
The LM776 Programmable Operational Amplifier is constructed using the Planar Epitaxial process. High input impedance. low supply currents. and low input noise over a
wide range of operating supply voltages coupled with programmable electrical characteristics result in an extremely
versatile amplifier for use in high accuracy, low power consumption analog applications. Input noise voltage and current, power consumption, and input current can be optimized by a single resistor or current source that sets the
chip quiescent current for nano watt power consumption or
for characteristics similar to the LM741. Internal frequency
compensation, absence of latch up, high slew rate and short
circuit current protection assure ease of use in long time
integrators, active filters, and sample and hold circuits.
• Micropower consumption
II ± 1.2V to ± 18V operation
• No frequency compensation required
• Low input bias currents
• Wide programming range
•
•
•
•
High slew rate
Low noise
Short circuit protection
Offset null capability
II No latch up
Applications
II Battery-powered instrumentation
III High-gain amp
• Filters
• Sample-and-Hold
Connection Diagrams
Ordering Information
B-Lead Metal Package
ISET
OUT
v-
TLIHll0073-1
Top View
Lead 4 connected to case.
8-LeadDIP
8
-OFFSET 1
NULL 2
v-
ISET
7 v+
-IN
+IN 3
6 OUT
5 +OFFSET
NULL
4
TLIHll0073-2
Top View
3-595
Device
Code
Package
Code
Package
Description
LM776H
LM776CH
LM776CN
H08A
H08A
N08E
Metal
Metal
Molded DIP
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature Range
Metal Can
-65"Cto + 175"C
Molded DIP
-65"Cto + 150"C
Operating Temperature Range
Extended (LM776M)
- 55"C to + 125"C
Commercial (LM776C)
O"Cto +70"C
Lead Temperature
Metal Can (Soldering, 60 sec.)
300"C
Molded DIP (Soldering, 10 sec.)
265"C
Internal Power Dissipation (Notes 1, 2)
8L-Metal Can
1.00W
8L-Molded DIP
0.93W
LM776
Electrical Characteristics TA =
Symbol
Supply Voltage
±18V
±30V
±15V
Differential Input Voltage
Input Voltage (Note 3)
Voltage Between Offset Null and V-
±0.5V
Output Short Circuit Duration (Note 4)
Indefinite
500 p.A
ISET (Maximum Current at ISET)
VSET (Maximum Voltage to
(V+ - 2.0V) :s: VSET :s: V+
Ground atiSET)
(to be determined)
ESD Tolerance
25"C, Vcc = ± 15V, unless otherwise specified
Parameter
Conditions
ISET = 1.5 p.A
Min
Typ
Max
2.0
5.0
ISET = 15 p.A
Min
Typ
Max
2.0
5.0
VIO
Input Offset Voltage
VIOadi
Input Offset Voltage Adjustment Range
9.0
110
Input Offset Current
0.7
3.0
2.0
15
118
Input Bias Current
2.0
7.5
15
50
ZI
Input Impedance
50
20
Rs:S: 10kO
Icc
Supply Current
Pc
Power Consumption
los
Output Short Circuit Current
Avs
Large Signal Voltage Gain
18
25
3.0
Vo = ±10V, RL" 75 kO
200
Output Voltage Swing
RL = 75kO
±12
SR
Transient Response
I Rise Time
I Overshoot
Slew Rate
The following specifications apply - 55"C
:s: T A :s:
p.A
5.4
mW
rnA
V/mV
100
400
±10
±13
±14
V
VI = 20 mV, RL = 5.0 kO,
CL = 100pF,Av = 1.0
1.6
0.35
0
10
0/0
RL = 5.0kO,Av = 1.0
0.1
0.8
V/p.s
p.s
+ 125"C
VIO
Input Offset Voltage
Rs:S: 10kO
6.0
6.0
110
Input Offset Current
TA = +125"C
5.0
15
TA = -55"C
10
40
TA = +125°C
7.5
50
TA = -55°C
20
120
118
Input Bias Current
nA
180
12
RL = 5.0kO
TR
nA
MO
400
Vo = ± 10V, RL" 5.0 kO
VoP
160
mV
mV
5.0
0.75
Units
mV
nA
nA
Icc
Supply Current
30
200
p.A
Pc
Power Consumption
0.9
6.0
mW
CMR
Common Mode Rejection
VIR
Input Voltage Range
PSRR
Power Supply Rejection Ratio
Rs:S: 10kO
Avs
Large Signal Voltage Gain
Vo= +10V,RL.,75kO
100
75
V/mV
VOP
Output Voltage Swing
RL = 75kO
±10
±10
V
Rs:S: 10kO
70
70
90
3-596
90
dB
±10
±10
25
150
V
25
150
p.VIV
LM776
Electrical Characteristics TA =
Symbol
25'C, vcc = ± 3.0V, unless otherwise specified
Parameter
ISET = 1.5/LA
Conditions
Min
Typ
Max
2.0
5.0
VIO
Input Offset Voltage
VIOadj
Input Offset Voltage Adjustment
Range
9.0
110
Input Offset Current
0.7
3.0
7.5
Rs';; 10kO
liB
Input Bias Current
2.0
ZI
Input Impedance
50
ISET = 15/LA
Min
Typ
Max
2.0
5.0
1B
Units
mV
mV
2.0
15
15
50
5.0
nA
nA
MO
Icc
Supply Current
13
20
130
160
/LA
Pc
Power Consumption
7B
120
780
960
/LW
los
Output Short Circuit Current
3.0
Avs
Large Signal Voltage Gain
TR
SR
Transient Response
I Rise Time
I Overshoot
Slew Rate
Vo = ±1.0V, RL
~
75 kO
Vo = ±1.0V, RL
~
5.0 kO
50
5.0
mA
200
V/mV
50
200
VI = 20 mY, RL = 5.0 kO,
CL = 100pF,Av = 1.0
3.0
0.6
/Ls
0
5
%
RL = 5.0 kO, Av = 1.0
0.03
0.35
V//Ls
The following specifications apply - 55'C ,;; TA ,;; + 125'C
VIO
110
liB
Input Offset Voltage
Input Offset Current
Input Bias Current
Rs';; 10kO
6.0
6.0
TA = +125'C
5.0
15
TA = -55'C
10
40
TA = +125'C
7.5
50
TA = -55'C
20
120
mV
nA
nA
Icc
Supply Current
25
1BO
/LA
Pc
Power Consumption
150
10BO
/LW
CMR
Common Mode Rejection
VIR
Input Voltage Range
Rs';;10kO
PSRR
Power Supply Rejection Ratio
Rs';; 10kO
Avs
Large Signal Voltage Gain
Vo=
70
70
±1.0V,RL~75kO
~
5.0 kO
86
dB
±1.0
25
Vo = ± 1.0V, RL
V
25
150
25
150
/LVN
V/mV
25
±2.0 ±2.4
V
±1.9 ±2.1
RL = 5.0kO
Note I: TJ Max = 150'C for the Molded OIP, and 175'C for the Metal Can.
Note 2: Ratings apply to ambient temperature at 25'C. Above this temperature, derate the BL·Metal Can at 6.7 mWI'C, and the BL·Molded DIP at 7.5 mW/'C.
Note 3: For supply voltages less than ± 15V, the absolute maximum input voltage is equal to the supply voltage.
Note 4: Short Circuit may be to ground or either supply. Rating applies to 125'C case temperature or 75'C ambient temperature for ISET ,; 301'.A.
VOP
Output Voltage Swing
86
±1.0
RL = 75kO
3-597
•
LM776C
Electrical Characteristics TA =
SymboL
25·C, Vcc = ± 15V, unless otherwise specified
Parameter
Conditions
ISET = 1.5 p.A
Min
RsS:10kO
Typ
Max
2.0
6.0
VIO
Input Offset Voltage
VIOadj.
Input Offset Voltage Adjustment
Range
9.0
Input Offset Current
ISET = 15 p.A
Min
Typ
Max
2.0
6.0
18
0.7
6.0
2.0
25
·lnpu1 Bias Current
2.0
10
15
50
ZI
Inpu1lmpedance
50
Icc
Supply Current
20
Pc
Power Consumption
los
Output Short Circuit Current
AyS
Large Signal Voltage Gain
5.0
30
0.9
3.0
Vo = ±10V, RL:2: 75 kO
50
Output Voltage Swing
±12
RL = 75kO
Transient Response
I RiseTime
I Overshoot
SR
Slew Rale
The following specifications apply COC
VIO
Input Offset Voltage
110
Input Offset Current
liB
Icc
Supply Current
p.A
5.7
mW
rnA
V/mV
50
400
±10
±13
±14
V
VI = 20 mY, RL :2: 5.0 kO,
CL= 100pF,Ay= 1.0
1.6
0.35
0
10
%
RL = 5.0 kO, Ay = 1.0
0.1
0.8
V/p.s
s: TA s: +7COC
Rs s: 10kO
Input Bias Current
nA
190
400
RL = 5.0 kO
TR
nA
MO
12
Vo = ± 10V, RL :2: 5.0 kO
VOP
160
mV
mV
liB
110
Units
p.s
7.5
7.5
TA = 70·C
6.0
25
TA = O·C
10
40
mV
nA
TA = 70·C
10
50
TA = O·C
20
100
35
200
p.A
1.05
6.0
mW
Pc
Power Consumption
CMR
Common Mode Rejection
VIR
Input Voltage Range
PSRR
Power Supply Rejection Ratio
Rs
AyS
Large Signal Voltage Gain
Vo = ± 10V, RL :2: 75 kO
VOP
Output Voltage Swing
RL = 75kO
Rs
s:
10 kO
70
90
70
±10
s: 10kO
dB
±10
25
3-598
90
200
nA
V
25
200
p.VIV
50
50
V/mV
±10
±10
V
r
LM776C
Electrical Characteristics TA = 25·C, Vee =
Symbol
Parameter
......
==
......
en
±3.0V, unless otherwise specified
ISET
Conditions
Min
=
1.5/LA
Typ
Max
2.0
6.0
ISET
Min
=
15/LA
Typ
Max
2.0
6.0
Units
VIO
Input Offset Voltage
VIOadj
Input Offset Voltage Adjustment
Range
9.0
110
Input Offset Current
0.7
6.0
2.0
25
liB
Input Bias Current
2.0
10
15
50
ZI
Input Impedance
50
Icc
Supply Current
13
20
130
170
/LA
Pc
Power Consumption
78
120
780
1020
/LW
los
Output Short Circuit Current
Avs
Large Signal Voltage Gain
TR
SR
Transient Response
Rs s; 10kn
Slew Rate
RL
S;
TA
S;
=
5.0 kn, Av
=
25
5.0
V/mV
200
3.0
0.6
0
5
%
0.03
0.35
V//Ls
/Ls
+ 70"C
Input Offset Voltage
Rs
S;
10kn
7.5
7.5
110
Input Offset Current
TA
=
=
=
=
70·C
6.0
25
O·C
10
40
70·C
10
50
O·C
20
100
TA
Input Bias Current
nA
mA
VIO
liB
nA
Mn
200
25
1.0
mV
5.0
3.0
= ± 1.0V, RL ~ 75 kn
Vo = ±1.0V, RL ~ 5.0kn
VI = 20 mY, RL ~ 5.0 kn,
CL = 100 pF, Av = 1.0
Vo
I Rise Time
I Overshoot
The following specifications apply O"C
18
mV
TA
TA
mV
nA
nA
Icc
Supply Current
25
180
/LA
Pc
Power Consumption
150
1080
/LW
CMR
Common Mode Rejection
Rs
S;
10kn
S;
10kn
70
Input Voltage Range
PSRR
Power Supply Rejection Ratio
Rs
Avs
Large Signal Voltage Gain
Vo
75 kn
Vo
5.0 kn
Output Voltage Swing
70
±1.0
VIR
VOP
86
3-599
dB
±1.0
25
= ±1.0V, RL ~
= ±1.0V, RL ~
RL = 75kn
RL = 5.0kn
86
200
V
25
25
200
/LVN
V/mV
25
±2.0
±2.4
V
±2.0
±2.1
•
Equivalent Circuit
r-------------~----_.--~~--_.----_1----~~------------_.------~
R3
-IN
2kll
R4
SOil
R5
IOOIl
R6
OUT
lOOIl
R7
IOOIl
-OFFSET
NULL
R8
SOil
~----~------~----~----~--~~------
3-600
__
~------------~-----vTL/H110073-3
r-----------------------------------------------------------------------------,
Typical Performance Characteristics for LM776 and LM776C
Input Bias Current vs
Set Current
100
Input Bias Current vs
Temperature
30
,L1}l ,l..l.
!
~
10
......~
z
"-
18
I\,
I'"
ISET= ISjIoA
12
l'..isET-ISjIoA
-
N
:>
'J....
Is~-1.5j1oA - -
I'"
1-
ISET=1.S~
--
o
O. I
0.01
0.1
10
I
o
-60
100
-20
60
20
SET CURRENT (PA)
~
i3.0V :SVcc:St 18Y
\
'-'
V
Input Offset Current vs
Temperature
5
24
:>
I
100
-60
140
TEMPERATURE (OC)
Change in Input Offset
sao Voltage vs Set Current
,I III I TA-25OC
~
t3.0V:SVcc :Si 18V
Vcc-i ISV
ISET= 15j1oA
300
V
200
~
60
100
140
Input Noise Voltage vs
Set Current
1()'"12
!-.:=.
III
~
",.
100
20
-20
TEMPERATURE (OC)
Change In Input Offset Voltage
vs Temperature (Unnulled)
SOD
400
I'
.....
.....
aI
i3.0V:SVCC :Si 18V
TA = 25°C
i3.0V:SVce :SiI8V
r
i!:
TA = 25°C
t3.0V:SVcc :St 18Y
I-I kHz
AI=I Hz
1()'"13
1()'"14
0
>
",.
~a
L/
'"z
'L
10-15
10-16
~
::E
10-17
0.01
-300
10
-60
100
-20
SET CURRENT (jIoA)
Input Noise Voltage and
-
g
w
~
~
::E
I'\.
10- 16
i"'-
30
I!:
:>
100
~
~
:>
i
~
0.1
10
24
-
32
.-1-1"
I-11l IYCC- iI5V
' - III
I'SET=15p.1
VCC=iISV
ISET = I.SjIoA
18
r-
I
g
1.5 jIoA :S 'SET:S 15 jIoA
1.0k
lOOk
LOAD RESISTANCE (II)
16
12
~
!5
4
o/
1111 I 1111
10k
20
1M
o
i6
0.1
10
100
Gain Bandwidth Product vs
Set Current
TA=25OC
t;
I.OM
:>
c
I
I
iU
i~
SUPPLY YOLTAGE (V)
0.01
Co
RL =5k.o._
~
0.1
'N'
~ ,/
~ K 'SET= 15j1oA
"
i3
Ii:
0
10M
1.5j1oA:SIS~:Slf~ '/L~
RL =75k.o.
24
!5
0
o
I
28
w
~
III I I
Vcc= i3.0V I
12
.~
.
8
::E
SET CURRENT (jIoA)
ISET= ISjIoA
RL =5kll
TA=25OC
'"
::E
:>
100
Output Voltage Swing vs
Supply Voltage
~
10
0
TA-2SOC
i3.0V :SVcc:S i 18V
AI=I Hz
I-I kHz
Output Voltage Swing vs
Load Resistance
12
~
~
8 10"27
SET CURRENT (PA)
TA=25OC
100
lOOrT~.-rn,,-rmr~~"
FREQUENCY (Hz)
0
...~
I 0-27
lOOk
10k
10
Optimum Source Resistor for
Minimum Noise vs Set Current
Input Noise Current vs
Set Current
....... 10-25
0.1
SET CURRENT (PA)
~
I
-
i~2(1s~=I~jIoA)1.0k
140
~
In2(ISET = 1.5 jIoA)t=
8
~
'"
!5
15~)
100
'2
-
1()'"17
10
.
f-i3.0V:SVcc:SiI8iTA=25OC
l.n2(1SET -'
~
z
'N"
~nz(ISET =' 1.5].A) -
~ 10-15
60
TEMPERATURE (OC)
~ 10-14 Current vs Frequency
~III
20
~
S
lOOk
;ll
10k
~
Vce=il 5V./
VCC =i3.0Y'-
/
illz
~
i~
1.0k
0.1
10
100
'SET - SET CURRENT (jIoA)
TL/H110073-4
3-601
•
U) r-----------------------------------------------------------------------------------------~
~
:2
Typical Performance Characteristics for LM776 and LM776C
(Continued)
...I
Voltage Gain vs
Temperature
~
~
~
;!i
Vee- U •OV
600
~
~
500
z
1sn=15pA
<400
r-rRL=:~""
:500
~ zoo
:s9
Voltage Gain vs
Temperature
ii
.....
~
~
§!
I-
'str=I.5pA
100
§
~
1=7ii+-
~
-20
-60
20
100
60
I I Vee=i15V
I I
1000 c--r- ~~=\5~ !"-irlZOO
600
24
zoo
1000
-20
100
~
!i!
1
a;
a;
~
0
~
a;
-30
-.w
1/
~
25l.cJ~
600
....
1/
zoo
II
Vee=i15V
Inftlal 0IIs0I ryollage< 1.0JolV
~
0.1
10
~
100
20
SU CURRENT (pA)
60
1/
10
Vee=i18V
TA=I25OC
I
I
I
60
60
Slew Rate vs Set Current
I
Vee -i15V
TREND LINE
60
<10
llME FROM HEAT APPUCAllON (s)
Input Offset Voltage Drift
vsTlme
.rI LV
1..1'[
1/
_L Vee=i15V
-
800
to
O. 1
0.01
fo'"
-20
~
§!
~
z
,/
V
~
1£0
1<10
100
Thermal Response of Input
Offset Voltage to Step Change
of Case Temperature
10
Stabilization Time of Input Offset
Voltage from Power On
-10
10
SU CURRENT (pA)
!:i
TEIIPERAlIJRE (OC)
III
0.1
El
Vee = U.OV
60
-
o
1<10
100
~
Im =I.5pA Vee=t15V 1=
~
100
60
....
!
Vee=t3.OV
20
20
TA=25OC III
U.OV:S Vee:S i 18V
];
Vee=i15V
-20
10
Standby Supply Current vs
Set Current
12
-60
~Io-
I I
o
... -
20
TEIIPERAlIJRE (OC)
18
o
1sn=1.5pA
RL1=Ti-
-60
.l.J-.t.
-
~~
I'~fo'"
<400
1<10
30
,=5k.IL
800
Supply Current vs
Temperature
'sO=15pA
,J. J.L
TA =25OC
u.ov:svee:S 18V
1600
TEIIPERAlIJRE (OC)
30
Power Supply Rejection
Ratio vs Set Current
I
20
TA=25OC
Inftlal 0IIs0I Voltage < 1.0 JoIV
If
o
o
-10123456789
Vee=t3.0V
zoo
<400
liME FROM POWER APPUCAlION (IotIn)
600
<10
100M
32
16
!
I
I
I
II
Vee=i15V
ISET= 15pA
RL =5kA
CL=looPF
-B
-os
0
Q5
lD
1.5
2D
Iii
10
100
Set Current vs Set Resistor
...
glOM
J
III
0.1
SET CURRENT (pA)
,......
48
24
0.00 1
0.01
1000
lIME (Hn)
Voltage Follower Transient
Response (Unity Gain)
56
800
Vee=i15V
1.0M Vee=UV
...
lOOk
-Rm toV--j Rso lo ~~
10k
0.1
2.5
llME CJoIs)
10
100
SET CURRENT (pA)
TLIH110073-5
3-602
Applications Information
Quiescent Current Setting Resistor
(ISETto V-)
ISET Equations
ISET ~
ISET
Vs
(V+) - 0.7 - (V-)
RSET
where:
1.S",A
15 ",A
±1.5V
107M!l
170k!l
ISET ~ (V+) - 0.7
RSET
±3.0V
3.6M!l
360k!l
where:
±6.0V
7.5M!l
750k!l
±15V
20M!l
2.0M!l
RSET is connected to V-
RSET is connected to ground.
Note: The LM776 may be operated with RSET connected to ground or V.
Biasing Circuits
Voltage Offset Null Circuit
Resistor Biasing
v+
2
3
2
3
vRSET Connected
TL/H/l0073-9
TL/H/l0073-6
to Ground
FET Current Source Biasing
v+
2
3
2
3
v-
TUH/l0073-7
RSET Connected to V-
v-
'Recommended for supply voltages less than ± 6V.
TL/H/l0073-10
Transient Response Test Circuit
Transistor Current Biasing
2
3
TLlH/l0073-11
v-
TL/H/l0073-8
3-603
~
~
co
:E
....I
,----------------------------------------------------------------------------,
~National
~ Semiconductor
LM833 Dual Audio Operational Amplifier
General Description
Features
The LM833 is a dual general purpose operational amplifier
designed with particular emphasis on performance in audio
systems.
• Wide dynamic range
• Low input noise voltage
This dual amplifier IC utilizes new circuit and processing
techniques to deliver low noise, high speed and wide bandwidth without increasing external components or decreasing
stability. The LM833 is internally compensated for all closed
loop gains and is therefore optimized for all preamp and
high level stages in PCM and HiFi systems.
The LM833 is pin-for-pin compatible with industry standard
dual operational amplifiers.
• High slew rate
• High gain bandwidth product
•
•
•
•
Wide power bandwidth
Low distortion
Low offset voltage
Large phase margin
Schematic Diagram (1/2 LM833)
8 _____. . ._ _ _ _...._ _...._
+vcc.:..
>140 dB
4.5 nV/,fHz
7 V/p.s (typ)
5 V/p.s (min)
15 MHz (typ)
10 MHz (min)
120 kHz
0.002%
0.3 mV
60·
Connection Diagram
...._ _-.._ _-..---.
DUTA
+ Vee
-INA
OUT B
+INA4-.....J
-INB
360
-Vu
+IN8
TLIH/5218-2
Order Number LM833M or LM833N
See NS Package Number
M08Aor N08E
TUH/5218-1
Typical Application RIM Preamp
33~F
PHDND
~rr---~I
I
CAR11IIDGE:
I
I
I
I '='
I
470
~lDDPF
L ___ .J
TUH/5218-3
Av
~
En
~
SIN
35dB
f
0.33/LV
A Weighted
~
90 dB
~
1 kHz
A Weighted, VIN
@f~lkHz
3-604
~
10 mV
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
36V
Vee-VEE
Differential Input Voltage (Note 1) VID
Input Voltage Range (Note 1)
VIC
Power Dissipation (Note 2)
PD
Operating Temperature Range
TOPR
Storage Temperature Range
TSTG
±30V
±15V
500mW
-40 - 85'C
-60 - 150'C
DC Electrical Characteristics (TA =
Symbol
-
Soldering Information
Dual-In-Line Package
Soldering (10 seconds)
260'C
Small Outline Package
Vapor Phase (60 seconds)
215'C
Infrared (15 seconds)
220'C
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
Parameter
ESD tolerance (Note 3)
1600V
25'C, Vs = ±15V)
Conditions
Typ
Min
Max
Units
Vos
Input Offset Voltage
0.3
5
mV
los
Input Offset Current
10
200
nA
Is
Input Bias Current
500
1000
Av
Voltage Gain
RL=2kO,Vo= ±10V
VOM
Output Voltage Swing
RL = 10 kO
RL = 2 kO
VCM
Input Common-Mode Range
CMRR
Common-Mode Rejection Ratio
Rs = 100
dB
±12
±10
±13.5
±13.4
V
V
±12
±14.0
V
80
100
dB
80
100
PSRR
Power Supply Rejection Ratio
Vs = 15-5V, -15- -5V
Supply Current
Vo = OV, Both Amps
AC Electrical Characteristics (TA =
Parameter
110
VIN = ±12V
10
Symbol
nA
90
dB
5
8
rnA
25'C, Vs = ±15V, RL = 2 kO)
Min
Typ
SR
Slew Rate
RL = 2 kO
Conditions
5
7
Max
Units
V/p.s
GBW
Gain Bandwidth Product
f = 100kHz
10
15
MHz
Design Electrical Characteristics (TA = 25'C, Vs = ±15V)
The following parameters are not tested or guaranteed.
Symbol
Parameter
Conditions
l:,vos/aT
Average Temperature Coefficient
of Input Offset Voltage
THD
Distortion
en
Input Referred Noise Voltage
Rs = 1oon, f = 1 kHz
4.5
nV/-/Hz
in
Input Referred Noise Current
f = 1 kHz
0.7
pAl-/Hz
PBW
Power Bandwidth
Vo = 27 Vpp, RL = 2 kn, THD ,,; 1 %
120
kHz
fu
Unity Gain Frequency
Open Loop
9
MHz
M
Phase Margin
Open Loop
60
deg
-120
dB
RL = 2 kO, f = 20-20 kHz
VOUT = 3 Vrms, Av = 1
Input Referred Cross Talk
f=20-20kHz
Note 1: If supply voltage is less than ± ISV, it is equal to supply voltage.
Note 2: This is the permissible value at TA <: 8S'C.
...
Note 3: Human body model. t.S kO in series with tOO pF.
3-605
Typ
Units
2
p.VI'C
0.002
%
~
~
co
:E
r--------------------------------------------------------------------------------,
Typical Performance Characteristics
....I
Maximum Power
Dissipation
vs Ambient Temperature
_1000
!
~
~ 600
i
~ 600
co
~
:IE
~
.... 300
Z~_
"
:IE
i
-
500
::!
400
::0
400
200
,
~
0
o
-50
50
100
TEMPERATURE (OCI
150
,,-
IB1~;::: b;"~.
-
,,.
!
600
Ie
500
400
i
....
ioo-.
~ 300
;!;
200
100
100
o
o
-50 -25 0 25 50 75 100 125
TEMPERATURE (OCI
10
15
SUPPLY VOLTAGE I ± VI
5
TLlH/521B-5
Supply Current vs
Supply Voltage
TA=25°C
RL=OO --
-
TA=25°C
700
::0
200
TUH/521B-4
10
BOO
Vs=±15V
700
BOD
if
i
Input Bias Current VB
Supply Voltage
Input Bias Current vs
BOD Ambient Temperature
TUH/521B-6
DC Voltage Gain
Supply Voltage
DC Voltage Gain
vs Ambient Temperature
120
~
i[
~
~
......
110
-
VB
120
TA=25°C
RL=2 kO
Vs= ±15V
RL=2 kO
- -1--
100
iii" 110
:s
..
.....
...,.....
z
:;;:
-
...-
w 100
~
~
co
~
~
20
90
co
90
1
o
o
10
15
SUPPlY VOLTAGE ( ± VI
80
-50 -25 0 25 50 75 100 125
TEMPERATURE (OCI
20
....
100
iii"
:s
.
~
80
~
60
~
40
~
Rt=21°
I~ GAIN
·~HAS~-
I'
I'
'
"
20
o
1
30
Vs= ±15V
. I""'.
'N
-3~
-60
:i!
Iii
-;;
-90 co
21
-'20~
.!!
~
"
-150
-uo
10 100 lk 10k lOOk 1M 10M
FREQUENCY (Hzl
:z:
~
t;
::0
co
co
20
IE
...:z:
~
z
...c
~
10
Vs= ±15V
1=100 kHz
...... r-....
-- ....
1--
o
-50 -25, 0 25 50 75 100 125
TEMPERATURE (OCI
TL/H/521B-l0
TLlH/521B-ll
3-606
10
15
'SUPPLY VOLTAGE (±VI
20
TLlH/521B-9
Ga'in Bandwidth Product
vs Ambient Temperature
Voltage Gain & Phase
vs Frequency
-
5
TUH/521B-B
TUH/521B-7
120
BO
Gain Bandwidth
vs Supply Voltage
~
30 ~~~~.-~~--,
TA=25°C
1=100 kHz,_-+-_t--+--f
~ 20 1---+--+--+--!--I----1
:;
iii
:
z
10
t--t--+--t-+-t--l
~
0'---'----'-__.1.--<-.--1----'
5
10
15
20
SUPPLY VOLTAGE ( ± VI
TLlH/521B-12
Typical Performance Characteristics (Continued)
Slew Ratevs
Ambient Temperature
10
9
...~
~
'"
.~
VS= ±15V
RL=2 kllAv=l
Slew Ratevs
Supply Voltage
10
9
I I
.l,
,,~
~
8
FALLING-=:
7
6
5
4
~
+
v,
3
2k
2
1
0
-50 -25 0 25 50 75 100 125
TEMPERATURE I'C)
~.~.~
J"l..
~
...~
~
'"
~
I
8
7
6
5
4
3
2
1
0
.". ~
J"l.. ~..
5
15
20
TA-25'C
15 RL=10 kll
~
...~
~
S
10
~
....13
...
.::
"""""
~
5
0
'">
-5
::::I
I'--
-10
-15
10
15
SUPPLY VOIJAGE (±V)
14
13
10
15
SUPPLY VOLTAGE (± V)
20
'"
....'"
~
60
_
20
2.
2
---.
-
0
100
.".
lk
'",lk
-
2
VI=lVrms
'"
+VOM
-
YOM
§:
-- -
+PSRR
100
80
'"
'"
'"
..
60
"
40
20
,-". f1
+
0.1
"-
.....
15
':'
1111
Vo=3 Vrm.
-
~
Vo-l Vrm.
0.001
10M
v,
2.
~
c; 0.01
10
100
lk
10k
FREQUENCY (Hz)
TL/H/5218-19
lOOk
TL/H/5218-20
3·607
1M
10M
PSRR vs Frequency
~
":'
10k lOOk 1M
FREQUENCY (Hz)
lOOk
120
Vs= ±15V
RL=10 kll
RL=2 kll -
Yo-
10k
TLlH/5218-15
Maximum
Output Voltage vs
Ambient Temperature
Distortion vs Frequency
1
~,-
-
40 -
5
FREQUENCY (Hz)
TLlH/5218-17
I I I
80 ':E
\
\
10
0
100
20
11
CMR vs Frequency
100
~
15
::::I
12
TLlH/5218-16
VS=f15V
>
10
-50 -25 0 25 50 75 100 125
TEMPERATURE ('C)
-20
120
....
.
Yo
20
::::I
r"'5
~
13
Vs=±15V
RL =2 kll
THOsl%
25
TL/H/5218-14
Maximum
Output Voltage vs
Supply Voltage
~
~
2k
TLlH/5218-13
~
Power Bandwidth
30
I
.!.
TA=25'C
RL=2kll+ 1
Av -1
FALLING
0
100
lk
Vs=±15V
--
,-PSRR
""
10k lOOk 1M
FREQUENCY (Hz)
10M
TL/H/5218-18
~
~
co
:E
r---------------------------------------------------------------------------------,
Typical Performance Characteristics (Continued)
....I
Spot Noise Voltage
VB Frequency
10
.....
Spot Noise Current
10
LM833.T
"IA=25'C
Vs=±15V
"IA-25'C
Vs ±15V
0.2
1
10
100
lk
10k
FREQUENCY (Hz)
lOOk
:=8~:equency
H-++-t-++H-++-H
0.1 '-'--'-.1-1-1..-1-1-1-'---'--........
lk
10
100
10k
lOOk
FREQUENCY (Hz)
~""FT-I~+f-'ILM833
I-+-++-l-H-t-"IA =25'C
0.1 L..L.........J.....!-J...J--'-_~.:.s=
........
±_15.....
V
100
lk
10k
lOOk
1M
SOURCE RESISTANCE (11)
TLlH/521B-22
TLlH/521 B-21
Noninverting Amp
TL/H/521 B-23
Nonlnverting Amp
TIME (0.2 ,.s/OIV)
TIME (2 ,.s/DIV)
TLlH/521 B-24
TLlH/521B-25
Inverting Amp
TIME (2 ,.s/DIV)
TLlH/521B-26
Application Hints
The LMB33 is a high speed op amp with excellent phase
margin and stability. Capacitive loads up to 50 pF will cause
little change in the phase characteristics of the amplifiers
and are therefore allowable.
Capacitive loads greater than 50 pF must be isolated from
the output. The most straightforward way to do this is to put
a resistor in series with the output. This resistor will also
prevent excess power dissipation if the output is accidental·
Iy shorted.
3·60B
Noise Measurement Circuit
Complete shielding is required to prevent induced pick up from external
sources. Always check with oscilloscope for power line noise.
+Vcc -VEE
AVERAGE RESPONDING
AC VOLT METER
RIAA PREAMP
35 dB, 1= 1 kHz
FLAT AMP. 40 dB +40 dB
TL/H/5218-27
Total Gain: 115 dB @f = 1 kHz
Input Referred Noise Voltage: en = VO/5S0,000 (V)
RIAA Preamp Voltage Gain, RIAA
Deviation vs Frequency
50
VIN
Flat Amp Voltage Gain vs
Frequency
~ 4°!!lII~~~1315~'0~dB~'~f=lllk~H~Z
~
30
'"
20
w
~
BO
r-
~
'"w
'"
""co
>
50
40
30
20
1
100
lk
FREOUENCY (Hz)
70
60
!:l
.j >: ffillIIIIIIICIIIIIIIt:
20
~
;;:
:z
~
10
Vo o dB.
BO.O dB, f 1 kHz
90
10 mV
10
10k 20
lk
10k
100
FREQUENCY (Hz)
lOOk
TLlH/5218-29
TLlH/5218-28
3-609
Typical Applications
NAB Preamp Voltage Gain
NAB Preamp
70 vs
60
.,
...
...~
40
>
20
w
.
15
Av = 34.5
VIN =10 mV
34.5 dB. 1=1 kHz
30
10
F = 1 kHz
En = 0.38,.V
0
20
A Weighted
200k
rr-
50
:z
Vo
Fre....:qu"Te"Tn"c~y_~:!"",.......,
100
lk
FREQUENCY (Hz)
10k 20k
TL/H/5218-31
200
+
47 "F
TLlH/5218-30
Balanced to Single Ended
Converter
Adder/Subtracter
Sine Wave OSCillator
Vl-JV'!t/'vo--.
V2-JV'!t/'vo~
V2
Vo
-,.,..1\0-+-4
Vo
Vo
V3-JV'!t/'vo--.
Vl-.IV'VV.....H
V4-JV'!t/'vo~
Vo = Vl
TL/H/5218-33
+ V2 - V3 - V4
TLlH/5218-32
1
fo = 2".RC
Second Order High Pass Filter
(Butterworth)
Second Order Low Pass Filter
(Butterworth)
Cl
0.022 p.F
Hl
11k
Vo
Vo
TLlH/5218-36
TL/H/5218-35
ifRl = R2 = R
OC1=C2=C
Cl = ,f2
"oR
C2
R2 = 20Rl
Illustration is fo
= 1 kHz
= 2!.
2
Illustration Is fo
3-610
= 1 kHz
r------------------------------------------------------------------------.~
3:
Typical Applications (Continued)
C»
Co)
Co)
State Variable Filter
HZ
10k
HZ
HI
10k
16k
Cl
0.01 pF
VHP
HZ
Cl
0.01 pF
HI
16k
VSP
"::'
10k
Tl/H/5218-37
1
2".C1Rl'
1 (
R2
R2)
R2
1+-+ABP=OALP=OALH=2
RD RG'
RG
10=----0=-
Illustration is 10 = 1 kHz, 0 = 1D, ABP = 1
AC/DC Converter
Cl
10 pF
H5
ZOk
H3
10k
H2
ZOk
H4
20k
01
181588
VO=IVINI
02
181588
H7
6.Zk
"::'
TUH/5218-38
2 Channel Panning Circuit (Pan Pot)
Line Driver
R2
3.41Rl
51k
, . . . . . . - - -..... VCC
Rl
15k
HI
15k
HI
~"""'w_t-t
H7
33
VI
D.7D~:~ )o600n
4.5 nV/.JHz
0.0015%
0.3 mV
Schematic and Connection Diagrams
1/4 Quad
~-----------.----------------.--oV~
Dual-In-Line Package
OUT1~I-....,
1-""'---+--0 OUT
-IN1
+IN 1 --:-If-==...I
v~
+IN2 --:-I!---'-'~
-IN2
OUT2
TL/H/9047 -2
Top View
~--~I---------~----------~I---~--oVEE
TL/H/9047 -1
3-613
Order Number LM837M or LM837N
See NS Package Number M14A or
N14A
Absolute Maximum Ratings
If Military/Aerospace specified devices ,are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
VcclVEE
±lSV
Differential Input Voltage (Note 1)
VIO
±30V
Common Mode Input Voltage
(Note 1)
VIC
±15V
Power Dissipation (Note 2)
Po
,1.2W(N)
S30mW(M)
Soldering Information
Dual-In-Line Package
Soldering (10 seconds)
Small Outline Package
Vapor Phase (60 seconds)
Infrared (15 seconds)
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
TOPR
-40'Cto +S5'C
Storage Temperature Range
TSTG
- 60'C to + 150'C
Symbol
25'C, Vs = ±15V
Parameter
Vos
Input Offset Voltage
los
In'put Offset Current
215'C
2200C
ESD rating is to be determined.
Operating Temperature Range
DC Electrical Characteristics TA =
260'C
Condition
Min
Typ
Max
Units
0.3
5
mV
10
200
nA
500
1000
Rs = 500
Ie
Input Bias Current
Av
Large Signal Voltage Gain
RL = 2 kO, VOUT = ±10V
YOM
Output Voltage Swing
RL = 2kO
RL = 600n
±12
±14.0
V
SO
100
dB
SO
100
VCM
Common Mode Input Voltage
CMRR
Common Mode Rejection Ratio
VIN = ±12V
PSRR
Power Supply Rejection Ratio
Vs = 15 - 5, -15 -
Is
Power Supply Current
RL =
AC Electrical Characteristics TA =
Symbol
Parameter
00,
nA
110
dB
±12
±13.5
V
±10
±12.5
V
90
-5
Four Amps
dB
10
15
rnA
25'C, Vs = ±15V
Min
Typ
SR
Slew Rate
RL = 6000
S
10
V/p.s
GBW
Gain Bandwidth Product
f = 100 kHz, RL = 600n
15
25
MHz
Condition
Design Electrical Characteristics TA =
Symbol
Units
Max
25'C, vs= ± 15V (Note 3)
Parameter
Condition
Min
< 1%
Typ
Max
Units
PBW
Power Bandwidth
Vo = 25 Vp_p, RL = 6000, THD
en1
Equivalent Input Noise Voltage
JISA,Rs = 1000
0.5
p.V
en2
Equivalent Input Noise Voltage
f = 1 kHz
4.5
nVl./Hz
in
Equivalent Input Noise Current
f = 1 kHz
0.7
pAl./Hz
THD
Total Harmonic Distortion
Av = 1, VOUT = 3Vrms,
f = 20 - 20 kHz, RL = 600n
0.0015
%
fu
Zero Cross Frequency
Open Loop
12
MHz
m
Phase Margin
Open Loop
45
deg
Input-Referred Crosstalk
f=20-20kHz
-120
dB
200
kHz
Average TC of Input Offset Voltage
2
p'vrc
AVos/boT
Note 1: Unless otherwise specified the absolute maximum input voltage is equal to the power supply voltage.
Note 2: For operation at ambient temperatures above 25"C, the device must be derated based on a 150"C maximum junclion temperature and a thermal
resistance, Junction to ambient, as follows: LM837N, 9r1'C/W; LM837M, 15r1'C/W.
Note 3: The following parameters are not tested or guaranteed.
3-614
Detailed Schematic
1/4 QUAD
Vee
OUT
ANOTHER
CH.
,.--.....,
TLlH/9047 -3
3-615
Typical Performance Characteristics
Maximum Power Dissipation vs
Ambient Temperature
2.0
g
z
~
•i
::E
::>
;!!
~
Normalized Input Bias Current
vs Supply Voltage
1.5
1.8
1.8
1.4
1.2
1.0
~
1.4
1.3
~
1.2
1.1
1.0
tl
NPkg
0.8
0.8
G.4
.....
Mpkg
J
~
"
~
~
D.2
z
-so -2S
0
25 50 7S 100125150
.
I
~
~
~
~
z
0
5
!
-
11
,.
9
B
7
6
1
I
I
0
£
5
10
i
.......
<.>
~
~
15
13
!II
g
~
-10
>
20
20
..........
~-r
-5
~
10
III
5
!:!g
~
0
z
25"1:
~
>
11
£
!:l
0
~
0
~
::II
5
!:!g
~
...........
0
.....
!:!g
5
10
15
-13
-14
-15
-SO -25 0
-VOIW(
-
11
-11
-12
-13
---
25 SO 75 100 125 150
AMBIENT TEMPERATURE ("1:)
~
-~
",
/
...........
-10
........ ......
5
10
-14
-15
-50 -25 0
20
Power Bandwidth
Vs=t 15V.RL= 600.0.
TA =25"1:. THD< Ill:
30
-
1
III
20
!:!g
-VONAX
15
SUPPLY VOLTAGE (tV)
+Voiwc
13
12
:iii
0
0
15 Vs=tI5V. RL=600.0.
14
5
0
::E
-12
.,...
.
.
5
20
5
-11
RL=600.0.
10
-15
Maximum Output Voltage
vs Ambient Temperature
III
TA=25"1:
-20
0
£
SO 60 70 SO 90 100
Maximum Output Voltage
Voltage
~
III
./
...........
~
20 vs Supply
15
Maximum Output Voltage
vs Ambient Temperature
--
I
0 10 20 30
...
./
SUPPLY VOLTAGE (tV)
+VOMAX
-Joe
j
asl"l:
OUTPUT SOURCE CURRENT (mA)
...
-5
i51
0
RL=2kll
.
",v-
5
25 SO 75 100 125 ISO
OUTPUT SINK CURRENT (mA)
VS=tI5V.I\=2kll
Vs~tl'5~
... r-.~~
0
I
TA=25"1:
-10
SO 60 70 SO 90 100
5
5
'"::>
10
!:!g
-20
0 10 20 30
14
13
12
5
- -.-
-15
lJ5"1:
0
15
15
Maximum Output Voltage
vs Supply Voltage
0
25 50 7S 100125150
Positive Current Limit
20
III
9
B
7
0
AMBIENT TEMPERATURE ("1:)
£
10~
15
0
i-"'"
o.s
-so -25
RL-~
11
---
.,.
1.0
119
0.8
D.7
D.6
AMBIENT TEMPERATURE ("1:)
Negative Current Limit
I'--r-..
1.2
1.1
Four Amps
6
5
-50 -25 o
vsltlsv
-15
20
12
SUPPLY VOLTAGE (V)
-20
15
10
15 V -t15V
14 s
Four Amps
10
Ie
Supply Current vs
Ambient Temperature
RL=~
5
i
I
1.4 V =t15V
1.3 s
SUPPLY VOLTAGE (tV)
T =25"1:
A
12
- -
~
r-.
D.6
Supply Current vs
Supply Voltage
13
~
0.7
TEMPERATURE ("1:)
15
14
is
TA=25"1:
119
0.8
o.s
0
!
Normalized Input Bias Current
vs Ambient Temperature
1.5
- - roo-
5
5
10
0
0
25 SO 7S 100 125 ISO
AMBIENT TEMPERATURE ("1:)
lli1
104
105
I
106
107
FREQUENCY (Hz)
TLlH/B047-4
3-616
Typical Performance Characteristics
S
~
ill
Normalized Slew Rate &
Gain Bandwidth vs
Supply Voltage (f = 100 kHz)
1.5 TA=25CC
1.4 R 60110.
1.3 L
z
z
~~ 1.2
"d~ 1.1
~~
~
I
Normalized Slew Rate &
Gain Bandwidth (f = 100 kHz)
vs Ambient Temperature
1.5
1.4
1.3
iil
D.8
0.6
~
0.7
o.s
0
'"~
0.0
-
GBW
1.0
~~ 0.9
0.8
0.7
5.0
10.0
15.0
z
2D.O
~
Elg
z
120 Av= 1
60
100
I
20
iil
25 50 75 100 125 150
10
~
0
~N
!
~
100
21dl
: 'PqP
Idl kll kll
103
104
105
106
102
-100
-120
g
!
g
TA=25CC
Vs=t15V
RL=600.o.
Ay=1
0
-160
-20
-180
10M 20M
l~'
Ht!:Vo = 3Vrms
102
103
104
10"
FREQUENCY (Hz)
100 TA=25CC
50 Vs= t15V
-
20
,-
~
10
~
5
~
§
2
2!!
"S
1
20
50100 200 500 IK 2K
5K
lOOK
10K
FREQUENCY (Hz)
Equivalent Input Noise
Current vs Frequency
10 TA=25CC
5 Vs= t15V
2
!il
1
~
0.5
~
106
Equivalent Input Noise
Voltage vs Frequency
z
FREQUENCY (Hz)
8
105
~
10"2
10'
:5.
~
104
~
10"3
~
t:5.
Elg
z
Ii
103
FREQUENCY (Hz)
Total Harmonie Distortion
vs Frequency
10"1
-
80
FREQUENCY (Hz)
-10
1M
TA=25CC
Vs=tl5
0
iii Iii<5
-140 ~
2011(
20
20
102
TA=25CC -60
RL= 60110.
Vs=t15V -90
PH~~
15
120
S
40
Open Loop Gain &
Phase vs Frequency
20
10
140
0
30_
5
CMRR vs Frequency
-
TEMPERATURE (CC)
~
0
160
~
:l:
40
--
100
SUPPLY VOLTAGE (tV)
80'"
'"
105
-50-25 0
9
'"
25 50 75 100 125 150
100 ~
90
~
110
~g
90
-50 -25 0
140 Vs=t15V
0
115
'-
~
o.s
'·~-1
II
120
I-
.
"
0.6
;;;~
95
!
-
Power Supply Rejection
130 Vs=t15V
125 RL=6010
110
120
AMBIENT TEMPERATURE (CC)
Voltage Gain vs
Ambient Temperature
~
;;;-
~
p~L£WRATE""'"
SUPPLY VOLTAGE (tV)
!
TA=25CC
I
1.2
~~
---"~SR
Voltage Gain vs
Supply Voltage
130
TA=25CC
RL=6010
"
:¥1.1
_G~W
1.0
§~0.9
'"
S
~
ill
(Continued)
§
0.2
2!!
"S
0.1
20
50100 200 500 lK 2K 5K IOKIOOK
FREQUENCY (Hz)
TL/H/9047-5
3-617
~
C")
CX)
:::!E
.---------------------------------------------------------------------------------,
Typical Performance Characteristics
(Continued)
....I
Small Signal, Non-Inverting
Current Limit
± 15V, RL = 100n, Ay = 1
TA = 25'C, Ay = 1, RL = 600n, Vs = ± 15V
TA = 25'C, Vs =
~
IN
~
I
t-
0
en
1\
~
'"
E
...>
~
~
lL
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TIME (0.1 rns / DIV)
TL/H/9047-6
TL/H/9047-7
Large Signal Non-Inverting
TA = 25'C, RL = 600n, Vs =
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TA = 25'C, RL = 600n, Vs = ± 15V
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TL/H/9047-8
TUH/9047-9
3-618
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.....
~National
U1
U1
~ Semiconductor
CD
.......
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lM 1558/lM 1458 Dual Operational Amplifier
01:00
U1
CD
General Description
Features
The LM1SS8 and the LM14S8 are general purpose dual operational amplifiers. The two amplifiers share a common
bias network and power supply leads. Otherwise, their operation is completely independent.
Il No frequency compensation required
Short-circuit protection
Wide common-mode and differential voltage ranges
iii Low-power consumption
III 8-lead can and 8-lead mini DIP
\I No latch up when input common mode range is
exceeded
II
1701
The LM14S8 is identical to the LM1SS8 except that the
LM14S8 has its specifications guaranteed over the temperature range from O·C to +70·C instead of -SS·C to
+ 12S·C.
Schematic and Connection Diagrams
R7
'5'
..
25
RI
1.5K
R58
19.5K
1(7)
OUTPUT
Q7
RID
50
OZ.
RI
R3
I.
5.'
,.
RZ
R'
5K
RIl
Rl1
50K
50
y-
TUHI7BB6-1
Note: Numbers in parentheses are pin numbers for amplifier B.
Metal Can Package
Dual-In-Line Package
y.
v·
OUTPUT A
Jc--+-- OUTPUT 8
INVERTING INPUT A
L....--+--INVERTING INPUT 8
y-
TL/H/7BB6-2
Top View
V - -.......- _.....
Order Number LM1558H
orLM1458H
See NS Package Number H08C
TL/H/7BB6-3
Top View
Order Number LM15S8J, LM1458J, LM1458M or LM1458N
See NS Package Number J08A, M08A or N08E
3-619
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 4)
Supply Voltage
±22V
LM155B
LM145B
±1BV
Power Dissipation (Note 1)
LM155BH/LM145BH
500mW
LM145BN
400mW
±30V
Differential Input Voltage
±15V
Input Voltage (Note 2)
Output Short-Circuit Duration
Continuous
Operating Temperature Range
LM155B
LM145B
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
Soldering Information
Dual-In-Line Package
Soldering (10 seconds)
Small Outline Package
Vapor Phase (60 seconds)
Infrared (15 seconds)
See AN-450 "Surface Mounting Methods
on Product Reliability" for other methods
face mount devices.
ESD tolerance (Note 5)
55'C to + 125'C
Q'Cto +70'C
65'C to + 150'C
260'C
260'C
215'C
220'C
and Their Effect
of soldering sur300V
Electrical Characteristics (Note 3)
Parameter
LM1558
Conditions
Min
LM1458
Typ
Max
1.0
5.0
Min
Units
Typ
Max
1.0
6.0
mV
nA
Input Offset Voltage
TA = 25'C, Rs:S; 10 ko'
Input Offset Current
TA = 25'C
BO
200
BO
200
Input Bias Current
TA = 25'C
200
500
200
500
Input Resistance
TA = 25'C
Supply Current Both
Amplifiers
TA = 25'C, Vs = ±15V
Large Signal Voltage Gain
TA = 25'C, Vs = ±15V
VOUT = ± 10V, RL :?: 2 ko'
Input Offset Voltage
Rs:S; 10kO,
0.3
1.0
3.0
50
0.3
5.0
3.0
20
160
nA
MO,
1.0
5.6
160
mA
V/mV
6.0
7.5
Input Offset Current
500
300
nA
Input Bias Current
1.5
0.8
/LA
mV
Large Signal Voltage Gain
Vs= ±15V,VOUT= ±10V
RL:?: ko'
Output Voltage Swing
Vs = ±15V,RL = 10kO,
RL = 2kO,
±12
±14
±12
±14
V
±10
±13
±10
±13
V
Input Voltage Range
Vs = ±15V
±12
Common Mode
Rejection Ratio
Rs:S; 10kO,
25
70
15
V/mV
±12
90
70
V
90
dB
Rs:S; 10kO,
Supply Voltage
96
77
77
96
dB
Rejection Ratio
Note 1: The maximum junction temperature of the LM1558 is 150'C. while that of the LM1458 is 100'C. For operating at elevated temperatures, devices in the HOB
package must be derated based on a thermal resistance of 150'C/W, junction to ambient or 20'C/W, junction to case. For the DIP the device must be derated
based on a thermal resistance of 187'C/W, junction to ambient.
2: For supply voltages less than ± 15V, the absolute maximum input voltage is equal to the supply voltage.
- 55'C ,;; TA ,;; 125'C, unless otherwise specified. With the LMI458, however, all specifications are limited
to O'C ,;; TA';; 70'C and Vs = ±15V.
Note 4: Refer to RETS 1558V for LM1558J and LM1558H military specHications.
Note 5: Human body model, 1.5 kO in series with 100 pF.
Note
Note 3: These specifications apply for Vs = ± 15V and
3-620
.------------------------------------------------------------------------, r
i:
~National
N
co
C
~ Semiconductor
C
......
LM2900/LM3900/LM3301/LM3401 Quad Amplifiers
co
c
c
......
r
i:
(0)
r
i:
(0)
General Description
Features
The LM2900 series consists of four independent, dual input,
internally compensated amplifiers which were designed
specifically to operate off of a single power supply voltage
and to provide a large output voltage swing. These amplifiers make use of a current mirror to achieve the non-inverting input function. Application areas include: ac amplifiers,
RC active filters, low frequency triangle, squarewave and
pulse waveform generation circuits, tachometers and low
speed, high voltage digital logic gates.
• Wide single supply voltage
4 Voc to 32 Voc
Range or dual supplies
±2 Voc to ± 16 Voc
• Supply current drain independent of supply voltage
• Low input biasing current
30 nA
• High open-loop gain
70 dB
• Wide bandwidth
2.5 MHz (unity gain)
• Large output voltage swing
(V+ - 1) Vp-p
• Internally frequency compensated for unity gain
• Output short-circuit protection
Schematic and Connection Diagrams
Dual-In-Llne and Flat Package
. .--41.....-0 OUTPUT
-INPUT
+INPUT
"N
"N
-
+
1.3 rnA
TUH/7936-2
Top View
Order Number LM2900N, LM3900N, LM3301N or LM3401N
See NS Package Number N14A
CURRENT
MIRROR
TL/H/7936-1
Order Number LM3900M
See NS Package Number M14A
3-621
(0)
....
......
C
r
i:
(0)
.j:o,
....C
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
LM2900/LM3900
LM3301
LM3401
Supply Voltage
32Voc
28Voc
18Voc
± 14Voc
± 16Voc
±9Voc
Power Dissipation (TA = 25·C) (Note 1)
Molded DIP
1080mW
1080mW
1080mW
S.O. Package
765mW
Input Currents, liN + or liN 2OmAoc
2OmAoc
2OmAoc
Output Short-Circuit Duration-One Amplifier
Continuous
Continuous
Continuous
TA = 25·C (See Application Hints)
-40"Cto +85·C
O"Cto +75·C
Operating Temperature Range
LM2900
-40"Cto +85·C
LM3900
O·Cto +70·C
Storage Temperature Range
-65·Cto + 150"C
Lead Temperature (Soldering, 10 sec.)
Soldering Information
Dual-In-Line Package
Soldering (10 sec.)
Small Outline Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
260"C
-65·Cto + 150"C
260·C
-65·C to + 150·C
260·C
260"C
260·C
260·C
215·C
215·C
215·C
220·C
220"C
220"C
See AN-450 "Surface Mounting Methods and Their Effect on Product Reliability" for other methods of soldering surface mount
devices.
ESD tolerance (Note 7)
2000V
2000V
2000V
Electrical Characteristics TA =
25·C, V+ = 15 Voc, unless otherwise stated
LM2900
Parameter
LM3900
LM3301
LM3401
Conditions
Units
Min Typ Max Min Typ Max Min Typ Max Min Typ Max
Open
Loop
Voltage Gain
Voltage Gain
Over Temp.
I::..vo = 10Voc
Inverting Input
0.8
V/mV
1.2 2.8
1.2 2.8
Input Resistance
1
Output Resistance
1.2 2.8
1.2 2.8
1
1
0.1
MO
1
8
8
9
8
kO
Unity Gain Bandwidth
Inverting Input
2.5
2.5
2.5
2.5
MHz
Input Bias Current
Inverting Input, V+ = 5 Voc
Inverting Input
30 200
30 200
30 300
30 300
500
Slew Rate
Positive Output Swing
Negative Output Swing
0.5
20
0.5
20
0.5
20
0.5
20
V/p.s
Supply Current
RL =
6.2
6.2
10 mAoc
Output
Voltage
Swing
VOUTHigh
00
On All Amplifiers
RL = 2k,
V+ = 15.0Voc
liN = 0,
13.5
IIN+ = 0
liN = 10 p.A,
VOUT Low
Output
Source
Current Sink
Capability
ISINK
V+ = Absolute
liN = 0,
Maximum Ratings IIN+ = 0
RL = 00,
VOL = W,IIN
18
= 5
p.A
5
';1
3-622
6.2
0.09 0.2
6
10
13.5
29.5
0.5 1.3
-
10
13.5
29.5
6
(Note 2)
6.2
0.09 0.2
IIN+ = 0
VOUTHigh
10
13.5
0.09 0.2
26.0
10
0.5 1.3
5
5
nA
0.09 0.2
Voc
16.0
18
0.5 1.3
5
5
10
0.5 1.3
5
mAoc
Electrical Characteristics (Note 6), V +
LM2900
LM3301
LM3900
Conditions
Parameter
ris:
I\)
= 15 Voc, unless otherwise stated (Continued)
U)
o
LM3401
r-
dB
U)
Min Typ Max Min Typ Max Min Typ Max Min Typ Max
Power Supply Rejection TA = 25'C, f = 100 Hz
70
70
70
70
@
20 )LA (Note 3)
200 )LA (Note 3)
AMirror Gain
@
20 )LA to 200 )LA (Note 3)
2
5
2
5
2
5
2
5
%
Mirror Current
(Note 4)
10
500
10
500
10
500
10
500
)LAOC
Negative Input Current
TA = 25'C (Note 5)
1.0
1.0
Input Bias Current
Inverting Input
300
300
Mirror Gain
@
0.90 1.0
0.90 1.0
1.1
1.1
0.90 1.0
0.90 1.0
1.1
1.1
0.90
0.90
1
1
1.0
1.10 0.90
1.10 0.90
1
1
1.0
1.10
)LAI)LA
1.10
mADC
nA
Note 1: For operating at high temperatures, the device must be derated based on a 125°C maximum junction temperature and a thermal resistance of 92°C/W
which applies for the device soldered in a printed circuit board, operating in a still air ambient. Thermal resistance for the S.D. package is 131 c C/W.
Note 2: The output current sink capability can be increased for large signal conditions by overdriving the inverting input. This is shown in the section on Typical
Characteristics.
Note 3: This spec indicates the current gain of the current mirror which is used as the non-inverting input.
Note 4: Input VSE match between the non·inverting and the inverting inputs occurs for a mirror current (non-inverting input current) of approximately 10 p.A. This is
therefore a typical deSign center for many of the application circuits.
Note 5: Clamp transistors are included on the IC to prevent the input voltages from swinging below ground more than approximately -0.3 VDC. The negative input
currents which may result from large signal overdrive with capacitance input coupling need to be externally limited to values of approximately 1 rnA. Negative input
currents in excess of 4 rnA will cause the output voltage to drop to a low voltage. This maximum current applies to anyone of the input terminals. If more than one
of the input terminals are simultaneously driven negative smaller maximum currents are allowed. Common·mode current biasing can be used to prevent negative
input voltages; see for example, the "Differentiator Circuit" in the applications section.
Note 6: These specs apply for -40°C
~
TA ::s;: +85°C, unless otherwise stated.
Note 7: Human body model, 1.5 kn in series with 100 pF.
Application Hints
When driving either input from a low-impedance source, a
limiting resistor should be placed in series with the input
lead to limit the peak input current. Currents as large as
20 mA will not damage the device, but the current mirror on
the non-inverting input will saturate and cause a loss of mirror gain at mA current levels-especially at high operating
temperatures.
Unintentional signal coupling from the output to the non-inverting input can cause oscillations. This is likely only in
breadboard hook-ups with long component leads and can
be prevented by a more careful lead dress or by locating the
non-inverting input biasing resistor close to the IC. A quick
check of this condition is to bypass the non-inverting input
to ground with a capacitor. High impedance biasing resistors used in the non-inverting input circuit make this input
lead highly susceptible to unintentional AC Signal pickup.
Operation of this amplifier can be best understood by noticing that input currents are differenced at the inverting-input
terminal and this difference current then flows through the
external feedback resistor to produce the output voltage.
Common-mode current biasing is generally useful to allow
operating with signal levels near ground or even negative as
this maintains the inputs biased at + VBE. Internal clamp
transistors (see note 5) catCh-negative input voltages at approximately -0.3 VOC but the magnitude of current flow has
to be limited by the external input network. For operation at
high temperature, this limit should be approximately 100 )LA.
Precautions should be taken to insure that the power supply
for the integrated circuit never becomes reversed in polarity
or that the unit is not inadvertently installed backwards in a
test socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the
internal conductors and result in a destroyed unit.
Output short circuits either to ground or to the positive power supply should be of short time duration. Units can be
destroyed, not as a result of the short circuit current causing
metal fusing, but rather due to the large increase in IC chip
dissipation which will cause eventual failure due to excessive junction temperatures. For example, when operating
from a well-regulated + 5 VOC power supply at TA = 25'C
with a 100 ko' shunt-feedback resistor (from the output to
the inverting input) a short directly to the power supply will
not cause catastrophic failure but the current magnitude will
be approximately 50 mA and the junction temperature will
be above TJ max. Larger feedback resistors will reduce the
current, 11 MO, provides approximately 30 mA, an open circuit provides 1.3 mA, and a direct connection from the output to the non-inverting input will result in catastrophic failure when the output is shorted to V+ as this then places the
base-emitter junction of the input transistor directly across
the power supply. Short-circuits to ground will have magnitudes of approximately 30 mA and will not cause catastrophic failure at TA = 25'C.
This new "Norton" current-differencing amplifier can be
used in most of the applications of a standard IC op amp.
Performance as a DC amplifier using only a single supply is
not as precise as a standard IC op amp operating with split
supplies but is adequate in many less critical applications.
New functions are made possible with this amplifier which
are useful in single power supply systems. For example,
biasing can be designed separately from the AC gain as was
shown in the "inverting amplifier," the "difference integrator" allows controlling the charging and the discharging of
the integrating capaCitor with positive voltages, and the "frequency doubling tachometer" provides a simple circuit
which reduces the ripple voltage on a tachometer output DC
voltage.
3-623
o
......
Units
s::
c.:I
o
o
......
r3:
c.:I
c.:I
....o
......
r-
3:
c.:I
...."'o"
Typical Performance Characteristics
Open Loop Gain
Voltage Gain
1110
...c
=
.~
i
>
10
B1J
40
NiOLOAJ
.
....
..
m
~"'&'1.
~~
20
111'
10'
BO
~
60
!:i
40
>
-
10'
J
"
10'
....
i!>
il
5
~
10
e
..
.5
.}
20
"
I
I'-a.
I-
0
-55 -25
5
6
~
~
4
65
35
95
I
~
125
i!>
....~
~
"
I
i....
4
~
3
.
I::
IIN-" 1D,..A
E
I
11N-"1~
11
I.
20
25
30
.
5
~.
~
ill
4D
20
0
TA
1
III'
10'
Ii
20
~
1\
z
~
~
ili
'.
It
'0'
10k
•
-55"C
fA
.~
...
15
rI
~
!
~
T. ·2.'C
TA • 'SoC
~'25'C
1
10
I
•
~
5
TA -125'C
I.
10
lUM
TA-~
TA -O'C
20
U
"25~C
T1'~5,J
1M
Ink
Output Source Current
20
25
3D
0
10
5
15
2.
2D
3D
v+ -SUPPLY VOLTAGE (V",,)
Maximum Mirror Current
1.16
20
AI'"
!!!C
e
liN"
.5
16
a:
12 "-
;
1.01
.....
il
!;
1.04
iii I.DO
I
10'
~
100
1- FREOUENCY (Hz)
......;., l -
lIN
=l1b1A
D.9G
-55
-2'
5
35
55
~
8
~
4
~
r--
~0.90
I
C
III"
4
3D
25
~
I - FREQUENCY (Hz)
t
1 ,0t $R L $-
0
10
r
ill
,0'
a
I
r
::l 1.12
c
tl
.is
Mirror Gain
10
B1J
12
v+ -SUPPLY VOLTAGE (Voe)
Supply Rejection
::---...
iii
e
0
iii
!
14
!;
.5
....
v+ -SUPPLY VOLTAGE (VDeI
100
!...
25
2
5
..Iaoc
,:
0
0
TA
r
5
125
95
16
IT•• 5S'c
r TA = f.m'cT'l" C TA' BS'C
--I
2
65
35
Large Signal Frequency
Response
z
20
,
5
TA - TEMPERATURE ('C)
Output Class-A Bias Current
I
~
0
-55 -25
311
5
4D
10
2.
f
0
50
30
20
v+ -SUPPLY VOLTAGE (Voel
. IV lJ::!: ~
...
20
2
==-
II
2
Output Sink Current
.5
15
Jf
T. - TEMPERATURE ('C)
e
10
•
C
~
....
. . . 1"'---
4D
>
Supply Current
RL
40
!:i
V+ - SUPPLY VOLTAGE (Voe)
BO
60
B1J
..
..
J
0
100
.
.....
~
z
~
20
Input Current
e
BD
0
111'
=-
RL
m
:!!
I
I - FREOUENCY (Hz)
.5
-
~ r--
I
0
la'
:!!
~
"-
I
J
Voltage Gain
100
100
95
TA - TEMPERATURE ('CI
125
0
-55
........
-25
5
15
65
i'-
95
125
T. - TEMPERATURE eCI
TLlH17936-9
3-624
,-----------------------------------------------------------------------------, r
Typical Applications w+
s:::
~
= 15VDcl
CD
Inverting Amplifier
-
o
~
r
Triangle/Square Generator
I
s:::
(0)
y·o-......1M
M _ _-t
CD
o
~
r
s:::
(0)
(0)
....
.....
r
o
s:::
V+
(0)
voce-""2
o
""
....
Av" -~
y'
R1
TLlH/7938-3
TLlH17938-4
Frequency-Doubling Tachometer
Low VIN - VOUT Voltage Regulator
+V'No-~"",-"",-
_ - - - - - -..- -..-oVO =Vz + VB.
+
39k
>-",-oVODC
TLlH17936-5
TL/HI7936-8
Non-Inverting Amplifier
Negative Supply Biasing
-
Rl
R2
> ...........oV o
V+
voce-""2
y+
Av"'~
R1
V-
Voce - ~V
R3
Av"'~
Rl
TL/HI7936-7
3-625
TLlH17936-8
•
~
~
:::E
CO)
..........
r------------------------------------------------------------------------------------------,
Typical Applications (V+
= 15 VDcl (Con1inued)
Low-Drift Ramp and Hold Circuit
~
RAMP DOWN
n
C)
CO)
CO)
::i
~
lOOk
RAMP UP
JL
....C;
:::E
lOOk
C)
G)
2M
ZERO
DRIFT
C"I
::i
10M
ADJ
TUH/7936-10
Bi-Quad Active Filter
(2nd Degree State-Variable Network)
lOOk
lOOk
Y,N
o---+-W'v-..-.t
470k
(-7 Voc )
470k
V'
1M
Q
= 50
fo=lkHz
V'
TL/H17936-11
3-626
r-
Typical Applications (v+
s::
N
CD
= 15 Vocl (Continued)
o
o
.....
rs::
Voltage-Controlled Current Source
(Transconductance Amplifier)
V'
Co)
CD
o
o
.....
r-
s::
lk
Co)
Co)
o
.....
.....
rs::
Co)
0l:Io
o.....
91Uk
4.7k
T
10PF
01 & 02 absorb Hi VIN
3.6V
TL/H/7936-13
Ground-Referencing a Differential Input Signal
10M
•
lUM
R
RL
t
vR
I
10M
TLlH17936-14
3-627
Typical Applications (V+
= 15 Voe) (Continued)
Voltage Regulator
Fixed Current Sources
Vz
+V B •
•
---t
910
IV
510
. .-t~o+Vooc
(Vo
~
Vz
+ VaEl
TLlH17936-15
1M
13k
lmA
TUH17936-16
Voltage-Controlled Current Sink
(Transconductance Amplifier)
Buffer Amplifier
V·
1M
>-4......o+Vo
Va = Y'N
TL/H/7936-18
TLlH17936-17
Tachometer
V·
180k
IINrLf"L
>-I~r-.""""I:> +VoDe
200k
TLlH17936-19
3-628
'Allows Vo to go
to zero.
~------------------------------------------------------------------------------------,
Typical Applications
(v+
= 15 Vod (Continued)
ri:
I\)
CD
Low-Voltage Comparator
C)
C)
Power Comparator
r'"
i:
v·
No negative voltage limit if
Co)
properly biased.
CD
C)
C)
LAMP
1M
lOOk
r'"
i:
Co)
Co)
C)
.....
r'"i:
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Va
1M
lOOk
+VREF
o--.....IVI.,--~~~
Co)
C)
'0.2 Voc
TLlH17936-21
TLlH/7936-20
Schmitt-Trigger
Comparator
1M
...-o
>~
Va
. 2M
TLlH17936-22
TLlH/7936-23
Pulse Generator
Square-Wave Oscillator
30k
V· 0--"1/\;"'""---"1/\;","---'
f = 1 kHz
TLlH17936-24
TLlH/7936-25
Frequency DifferencIng Tachometer
39k
>---"-0 VaDe
20k
TL/H/7936-26
3-629
Typical Applications (V+
= 15VDc)(Continued)
Frequency Averaging Tachometer
J9k
1,..f"LJL
,2
r1 n
I""
.J W
W
20k
Voce = A(1, + 12l
20k
D--V\on,o'"
V'N2
TL/H/7936-27
Squaring Amplifier (W/Hysteresls)
Bi-Stable Multlvibrator
v+
V'
RESET
'\f'
I1..
200k
750k
200k
750k
SET
VARIABLE
RelUCTANCE
TRANSDUCER
I1..
5M
TL/H17936-29
TLlH17936-28
Dlfferentlator (Common-Mode
Biasing Keeps Input at + VaE)
"OR"Gate
1S0k
V·
75k
A
0--"""'.....
75k
JOk
75k
15k
TLlHI7936-31
JOk
>~""OVo
V+
o
2.
Av =
2
TL/HI7936-30
Jl.JI
"AND" Gate
V'
A
8
Difference Integrator
75k
1M
24k
24k
47k
1M
24k
C
+V2
TLlH/7936-32
3-630
0---'\1"".,-"
r-----------------------------------------------------------------------------, r
Typical Applications (v+
iii:
I\)
= 15 Vocl (Continued)
CD
Q
Q
Low Pass Active Filter
"riii:
1M
Co)
CD
Q
Q
1M
210k
"iii:r
300 pF
Q
.....
Co)
Co)
T
1v
fo=lkHz
"r
iii:
Co)
o
Q
""
.....
1.5M
OUTPUT
BIAS
ADJUST
v·
TUH17936-34
Staircase Generator
VBEBlasing
-
RESET
I1..
Rl
Jk
f·
>-"'-0 Va
• ..ILS1..
V1N
'2 Stepl cycle
TUH17936-35
VB.
VaDe
=VB.
(1.
> ...~o
R3
Vo
!I
-
=0.5 Voe
R2
-
Av" -~
Rl
~)
TUH17936-36
Bandpass Active Filter
O.lpF
J9k
Y,N
C)-..JIN\I-"-.--I ..-
......
> ...~OVo
fo=lkHz
Q = 25
TLlH17936-37
3-631
~ r-------------------------------------------------------~----------------------------,
Q
~
:!l
Typical Applications (v+
= 15 VDcl (Continued)
~
Low-Frequency Mixer
~
Q
CW)
CW)
:!l
--I
.....
1M
g
CW)
:!l
--I
(:)
Q
en
N
:!l
v,
--I
v,
~OP..F..J\N~.--1~
+
vo
I
~o ...PF.JV''\j00'''k......
v,>v,
TL/H17936-38
Free-Running Staircase Generator/Pulse Counter
JOk
lSDk
10
PULSE GENERATOR
1M
RESET '
PULSE
ONE·SHOTWI
INPUT COMPARATOR
1.2M
TL/H/7936-39
3-632
r-----------------------------------------------------------~~
Typical Applications (v+
3:':
= 15 VDC) (Continued)
N
CD
o
Supplying liN with Aux. Amp
(to Allow Hi-Z Feedback Networks)
o
......
~
3:':
Co)
CD
o
o
......
~
3:':
Co)
Co)
o
.....
......
~
10M
3:':
Co)
10M
~
.....
TUHI7936-40
One-Shot Multivibrator
2M
1M
r------.--~~~-.~----------~------JV~------~~
lOOk
30k
n
>_t--ovo,
PW '" 2 X 106C
1.2M
"'Speeds recovery.
TRIGGER IN
TLIH17936-41
•
Non-Inverting DC Gain to (0,0)
OFFSET AOJ
250k
1.5M
TLIH17936-42
3-633
I
,.. r-------------------------------------------------------------------------------------,
!:E
Typical Applications (V+
= 15 Vocl (Continued)
Channel Selection by DC Control (or Audio Mixer)
...I
......
,..
~
('I)
:E
...I
i
lOOk
:E
...I
C)
o
0)
C'II
:E
...I
lOOk
10M
v'
Vo
1
V"2
lOOk
v'
TLlHI7936-43
3-634
r---------------------------------------------------------------~r
Typical Applications (V+
3:
N
= 15 Vocl (Continued)
CD
o
Power Amplifier
o
......
r
3:
Co)
CD
o
o
......
10M
r
3:
Co)
10M
Co)
....
......
o
r
3:
Co)
....~
1M
,V ,N
o-..J\M.,_+-----t-t
TLlH17936-44
One-Shot with DC Input Comparator
v+
+ t,
t2
~L..r
OUTPUT 1 0-...-<
1M
V,N
1.2M
Trips at V,N .. 0.8 V+
VIN must fall 0.8 V+ prior to t2
TLlH/7936-45
High Pass Active Filter
410 pF
410 pF
VIN~
fo
V+12
3-635
=1 kHz
TLlH17936-46
Typical Applications (V+
= 15 VDc) (Continued)
Sample-Hold and Compare with New
+ VIN
39.
51.
CONTROL
INPUT
:SL...
HOLD
SAMPLE
10M
ZERO
DRIFT
AoJ
1M
_---oV·
-----------40 FOR I, ::: I :::12
V02 = AOL IV'Nh' - V'NIHOLDII
1M
TL/H17936-47
Sawtooth Generator
..fl..RESET
3k
TL/HI7936-48
3-636
Typical Applications (V+
= 15 VDcl (Continued)
Phase-Locked Loop
.lOk
O.,,,FT
VoY\N
fo
vo,o--....<
lOk
lOk
TLlH17936-49
Boosting to 300 mA Loads
v+ (15Voc!
ON
:SL
OFF
fiN
Rl
420
OFF
,6:': 10
;::0.1 mA
~ lOO mA
R
LAMP
TL/H17936-50
3-637
•
Split-Supply Applications (V+ = +15Voc&V- = -15Voc)
Non-Inverting DC Gain
+15.00 Voc'
1M
2M
200k
r--'VVII-............
1M
>-",-o±Vo
Av
=10
-15.00 Voc*
*Complementary
tr••king
-
TUH/7936-51
AC Amplifier
+15 Voc
1M
!:~"'
1M
-15 Voc
f'' "'
RL
Vo
TUH17936-52
3-638
,------------------------------------------------------------------------, r
3:
w
oQC)
~National
o
~ Semiconductor
.......
r
3:
w
oQC)
o
LM3080/LM3080A
Operational Transconductance Amplifier
General Description
Features
The LM3080 is a programmable transconductance block intended to fulfill a wide variety of variable gain applications.
The LM3080 has differential inputs and high impedance
push-pull outputs. The device has high input impedance and
its transconductance (gm) is directly proportional to the amplifier bias current (lASel.
•
•
•
•
•
l>
Slew rate (unity gain compensated): 50 V / 1'.5
Fully adjustable gain: 0 to gm • RL limit
Extended gm linearity: 3 decades
Flexible supply voltage range: ± 2V to ± 18V
Adjustable power consumption
High slew rate together with programmable gain make the
LM3080 an ideal choice for variable gain applications such
as sample and hold, multiplexing, filtering, and multiplying.
The LM3080N and LM3080AN are guaranteed from OOG to
+70'G.
Schematic and Connection Diagrams
r---~'---~~------------~~+v
(+1 INPUT ()O----------1I----------'
3
AMPLI FIE R ()o--"""'4.....-{,
BIAS INPUT 5
L---~.....----------~~--e-90-v
4
Dual-In-Line Package
NC
NC
H INPUT
V+
(+1 INPUT
OUTPUT
5
v-
AMPLIFIER
BIAS INPUT
TLlHI714B-2
Top View
Order Number LM30S0AN or LM30S0N
See NS Package Number NOSE
3-639
TLlHI714B-l
~
co
Absolute Maximum Ratings
==
......
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
o('I)
...I
o
CO
o('I)
==
...I
Supply Voltage (Note 2)
LM3080
LM3080A
DC Input Voltage
Indefinite
Operating Temperature Range
LM3080N or LM3080AN
O'Cto +70'C
Storage Temperature Range
250mW
Differential Input Voltage
+Vsto-Vs
Output Short Circuit Duration
±18V
±22V
Power Dissipation
2mA
Amplifier Bias Current (lABel
-65'Cto +150'C
Lead Temperature (Soldering, 10 sec.)
±5V
260'C
Electrical Characteristics (Note 1)
Parameter
LM3080
Conditions
Min
Input Offset Voltage
Max
0.4
5
6
Over Specified Temperature Range
Input Offset Voltage Change
LM3080A
Typ
IABC = 5 ",A
0.3
5 ",A ,,; IABC ,,; 500 ",A
0.1
Min
Units
Typ
Max
0.4
2
5
2
mV
mV
mV
0.3
0.1
3
mV
Input Offset Current
0.1
0.6
0.1
0.6
",A
Input Bias Current
0.4
1
5
7
0.4
1
5
8
",A
",A
9600
13000
7700
4000
9600
12000
",mho
",mho
5
500
650
3
350
5
500
7
650
",A
",A
Over Specified Temperature Range
Forward Transconductance (gm)
Over Specified Temperature Range
Peak Output Current
Peak Output Voltage
Positive
Negative
RL = 0, IABC = 5 ",A
RL = 0
RL = 0
Over Specified Temperature Range
RL= 00,5",A";IABC";500",A
RL = 00,5 ",A,,; IABC ,,; 500 ",A
6700
5400
350
300
300
+12
-12
+14.2
-14.4
Amplifier Supply Current
Input Offset Voltage Sensitivity
Positive
Negative
+12
-12
1.1
20
20
.:l. VOFFSET/.:l.V +
AVOFFSET/ AV-
Common Mode Rejection Ratio
Common Mode Range
Input Resistance
150
150
",A
+14.2
-14.4
V
V
1.1
mA
20
20
150
150
80
110
80
110
dB
±12
±14
±12
±14
V
26
10
10
kfl
26
Magnitude of Leakage Current
IABC = 0
0.2
100
0.2
5
Differential Input Current
IABC = 0, Input = ±4V
0.02
100
0.02
5
Open Loop Bandwidth
Slew Rate
Note 1: These specifications apply for Vs
Unity Gain Compensated
~
± 15V and TA
~
25'C, amplifier bias current (lABel
Note 2: Selection to supply voltage above ±22V, contact the factory.
3-640
",V/v
",V/v
~
nA
nA
2
2
MHz
50
50
V/",s
500 /LA, unless otherwise specified.
r-
s::
Typical Performance Characteristics
Input Offset Voltage
;;-
oS
c
~
0
>-
:0
!!
Input Bias Current
s::
104~~~
Co)
o
co
~
-SS·C
~
>
o
.....
r-
+125':';'
:;
0
o
co
Input Offset Current
I03~~~~
~
VS~I!~; v
Co)
~~
-1
-2
-3
-4
-5
11111
..m~;F
Willi
-&
1111111
-1
-8
1111111
a.l
1.0
10
100
1000
1.0
IABC-AMPLIFIER BIAS CURRENT !pAl .
10
100
1.0
1000
Peak Output Voltage and
Common Mode Range
Peak Output Current
IODa
100
Amplifier Supply Current
15
104
10
IABC-AMPLIFIER BIAS CURRENT !pAl
IABC-AMPLIFIER BIAS CURRENT IIlAI
104
VoUT
j
o
:I~
....
~ 103
...
~
.
i3
c'" 13
>-
102
o
c
10
~
VCMR
14
~~
~~
VS":t:15V
RLOAO-TA =+25"C
>~ 0
>-0
~:E -13
>-2
:00
"lE
....
VCMR
~B -14
VOUT
I-
1lliliL
1.0
10
100
loaD
0.1
'ABC-AMPLIFIER BIAS CURRENT !pAl
1.0
10
1
100
1000
Total Power Dissipation
/
104
1>i5
+12S·C
/
103
~
~
r-V2= VB - V3" 36Y
~
/
...
.!!~
i3
~
c
...
oY= f=
~
1::0
/
10
1.0
10
100
1000
'ABC-AMPLlFIER BIAS CURRENT !pAl
>-
102
-
+25"C
10
/.
10
0.1
-50
-25
0
+25
+50
+15 +100 +125
DIFFERENTIAL INPUT VOLTAGE (VI
TA ..AMB1ENT TEMPERATURE ('CI
Amplifier Bias Voltage vs
Amplifier Bias Current
Transconductance
las~_
I F+mI
;;-
1000
gOO
oS BOO
104
~
..
1
~
g
~
103
100
600
-
Z
_
i
11.2
I!:
1.0
10
100
po.
po
200
100
0.1
'ABC-AMPLIFIER BIAS CURRENT (1lA1
.l~
300
o
1000
'ABC-AMPLlF1ER BIAS CURRENT !pAl
I~~!.\C
mm
.~i~
~ 400
o
111111
111111
SOD
ii
:0
;
laoo
100
Input Leakage
~
~
10
104
105
VS'·,BV
I
1.0
'ABC-AMPLlFIER BIAS CURRENT !pAl
Leakage Current
IOS~m.!!!~
~
0.1
'ABC-AMPLlFIER BIAS CURRENT !pAl
1.0
10
100
laaD
IABC-AMPLIFIER BIAS CURRENT !pAl
TL/H17148-3
3-641
Typical Performance Characteristics
(Continued)
Input and Output Capacitance
Output Resistance
104
11111
,,-
1m!
F
w
!iii
..
COUT
102
0-
.~
Vs= .,5 v
o
0.1
inliti
1.0
10
C
10
100
IL..J...u.u.w......u.1.WIJ..........
1.0
0.1
10
IODO
100
1000
IABC-AMPLIFIER BIAS CURRENT (pAl
'ABC-AMPLIFIER BIAS CURRENT (pAl
TUHI7148-4
TUHI714B-5
Leakage Current Test Circuit
Unity Gain Follower
+15
62kn
10k
INPUT
o--4....~M_. .- .....
51 n
TUH/714B-6
Differential Input Current Test Circuit
-15
10k
0.001
~F
TUH/7148-B
-15V
TL/HI714B-7
3·642
r------------------------------------------------------------------------,
~National
r
3:
Co)
Co)
oCo)
~ Semiconductor
.....
r
3:
Co)
LM3303/LM3403/LM3503
Quad Operational Amplifiers
0l:Io
oCo)
.....
r
3:
Co)
c.n
oCo)
General Description
The LM3303, LM3403, and LM3503 are monolithic quad operational amplifiers consisting of four independent high gain,
internally frequency compensated, operational amplifiers
designed to operate from a single power supply or dual
power supplies over a wide range of voltages. The common
mode input range includes the negative supply, thereby
eliminating the necessity for external biasing components in
many applications.
Features
• Four internally compensated operational amplifiers in a
single package
• Wide power supply range single supply of 3.0V to 36V
dual supply of ± 1.5V to ± 18V
• Class AS output stage for minimal crossover distortion
• Short circuit protected outputs
• High open loop gain 200k
• LM741 operational amplifier type perlormance
Applications
• Input common mode voltage range includes ground or
negative supply
• Output voltage can swing to ground or negative supply
• Filters
• Voltage controlled oscillators
Connection Diagram
Order Information·
14-Lead DIP and 50-14 Package
Device
Code
Package
Code
Package
Description
LM3303J
LM3303N
J14A
N14A
Ceramic DIP
Molded DIP
LM3403J
LM3403N
LM3403M
J14A
N14A
M14A
Ceramic DIP
Molded DIP
Molded Surlace Mount
LM3503J
J14A
Ceramic DIP
TL/H/10064-1
Top View
Equivalent Circuit (%ofCircuit)
OUT
r-----------~--------~~----~-4~----~--_t._----._--~
+IN-4--------++----...,
-IN
L-_4~----~_4--~--~_4--~~--~~~----_4--~----~--~~--~
TL/H/10064-2
3-643
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature Range
Ceramic DIP
-65·Cto + 175·C
-65·Cto +150·C
Molded DIP and SO-14
Internal Power Dissipation (Notes 1, 2)
14L-Ceramic DIP
14L-Molded DIP
SO-14
Supply Voltage between V + and VDifferential Input Voltage (Note 3)
Operating Temperature Range
Military (LM3503)
Industrial (LM3303)
Commercial (LM3403)
Input Voltage
1.36W
1.04W
0.93W
36V
±30V
(V-) - 0.3VtoV+
ESD Tolerance
(To Be Determined)
- 55·C to + 125·C
- 40·C to + 85·C
O·Cto +700C
Lead Temperature
Ceramic DIP (Soldering, 60 sec.)
Molded DIP and SO-14
(Soldering, 10 sec.)
3000C
265·C
LM3303 and LM3403
Electrical Characteristics TA =
Symbol
25·C, Vee = ± 15V, unless otherwise specified
Parameter
LM3303
Conditions
Min
LM3403
Typ
Max
Min
Units
Typ
Max
VIO
Input Offset Voltage
2.0
8.0
2.0
8.0
mV
110
Input Offset Current
30
75
30
50
nA
liB
Input Bias Current
200
500
ZI
Input Impedance
200
0.3
Icc
Supply Current
Vo = OV, RL =
CMR
Common Mode Rejection
Rs
VIR
Input Voltage Range
PSRR
Power Supply,
Rejection Ratio
los
Output Short Circuit Current
(Per Amplifier) (Note 4)
Avs
Large Signal Voltage Gain
VOP
Output Voltage Swing
TR
Transient
Response
~
2.8
00
10kfl
500
1.0
0.3
7.0
1.0
2.8
nA
Mfl
7.0
mA
70
90
70
90
dB
+12V
toV-
+ 12.5V
toV-
+13V
toV-
+13.5V
toV-
V
30
150
p.VN
±10
±30
±45
mA
200
20
200
±12
12.5
±12
+13.5
±10
12
±10
±13
30
150
±10
±30
±45
Vo = ±10V,
RL ~ 2.0kfl
20
RL = 10kfl
RL = 2.0kfl
V/mV
V
Rise Timel
Fall Time
Vo = 50mV,
Av = 1.0, RL = 10 kfl
0.3
0.3
p.s
Overshoot
Vo = 5QmV,
Av = 1.0, RL;= 10 kfl
5.0
5.0
%
BW
Bandwidth
Vo = 50mV,
Av= 1.0,RL= 10kfl
1.0
1.0
MHz
SR
Slew Rate
VI = -10Vto +10V,
Av = 1.0
0.6
0.6
V/p.s
3-644
LM3303 and LM3403
r
3:
Co)
(Continued)
Co)
oCo)
Electrical Characteristics T A = 25'C, Vee = ± 15V, unless otherwise specified
The following specifications apply for - 40'C ,;; T A ,;; + B5'C for the LM3303, and O'C ,;; TA ,;; + 70'C for the LM3403
Symbol
Parameter
LM3303
Conditions
Min
VIO
Input Offset Voltage
t:,ylo/IH
Input Offset Voltage
Temperature Sensitivity
110
Input Offset Current
.
IDfPERATURE ("1:)
~
E
.s
20
010203040506070
III
~
15
80
o
!
Common Mode Range
vs Supply Voltage
Input Offset Current
vs Temperature
25
0
Vcc=i15V
T. =25"1:
RL =2k.Q
Ay=60dB
0.25 D.5O 0.75
nME (ps)
1.0
1.25
5
0
•
I
·
•
-2
-4
-6 H
-8
-10
n
··· - -
•I
U
~
I
I
10
20
30
-l-
40
TIME (ps)
TLlH/l0065-3
3·653
U)
CW)
;:
:s
r---------------------------------------------------------------------------------,
Typical Performance Characteristics
Input Noise Voltage
vs Frequency
Input Noise Current
vs Frequency
1.11k rTTTT'"T"TTTrrmrTTTTrrTTTn
~
~
oS
(Continued)
Channel Separation
1<40
100 rnTT'"T"TTTrrmrTTTTrrTTTn
..,.
~
z
100 1-\H-tt++HI-H-ttl-H+tt++HI-I
120
....
100
0
~.
cI
z
z
i!l
110
60
<40
20 Vcc=t15V
TA=25tC
o
10
FREQUENCY (Hz)
100
FREQUENCY (Hz)
Distortion vs Output
Voltage (I = 1 kHz)
10k
lOOk
Distortion VB
Frequency(VO = 1 Vrms)
0.7
D.7
Vcc=t15V
RL =21<4
Ay= <40 dB
D.5 !=lkHz
Rs=lk4
g
~lir~:EN~~~N
0.6
D.5
D.4
D.4
G.3
G.3
02
02
J
0.1
o
o
1.11k
FREQUENCY (Hz)
1.0 2.D 3D
4J)
0.1
r\
o
liD 6.D 71) 6.D 9.D 10
10
OUTPUT VOLTAGE (V)
100
1.11k
10k
lOOk
FREQUENCY (Hz)
TLlH/l0085-4
3-654
.-----------------------------------------------------------------------------, r
is:
.....a:o.
Typical Applications
Co)
en
400 Hz Lowpass Butterworth Active Filter
10k.o.
20k.!l.
620.0.
IN
1 k.o.
._----------- ------------ ------------ -----------Lt.44136
1 k.o.
lk.o.
-
13.2k.o.
TL/H/l0065-5
•
3-655
I
co
CO)
::;
Typical Applications
(Continued)
:!5
..J
Differential Input Instrumentation Amplifier with High Common Mode Rejection
R6
100 k.n
0.1%
OUT
IN
R3
10 k.n
1%
Av ~
R6 (
R2
1
2 Rl) Matching determines CMRR:
Rl ~ R4
+ R3
R2
~
R5
R6
~
R7
R4
45 k./Ir--'WIr-t-- OUT
CAL
2~~ll.
10kll.
TUH/10065-9
3-657
~
:;
::::!i
Typical Applications
...I
(Continued)
Notch Filter Using the
LM4136 as a Gyrator
Multiple Aperture Window Discriminator
R2
30k.ll.
OUT
IN
R4
v2 - t - - - I
TUH/l0065-10
Trim R. Such That
Rt
R2
Q3
R3
2R4
Notch Frequency vs Capacitor
v,----1
10k
TL/H/l0065-11
'N'
C
...t
lk
z:
=>
......
'"
'"
...I!:!uz:
0
100
10
0.0001
r-.
0.001
0.01
0.1
1.0
CAPACITOR (I'F)
TUH/t0065-12
3·658
.------------------------------------------------------------------------, r
3:
~National
oIlo.
~
en
o
......
~ Semiconductor
r
3:
LM4250/LM4250C Programmable Operational Amplifier
oIlo.
~
en
o
(")
General Description
Features
The LM4250 and LM4250C are extremely versatile programmable monolithic operational amplifiers. A single external master bias current setting resistor programs the input
bias current, input offset current, quiescent power consumption, slew rate, input noise, and the gain-bandwidth product.
The device is a truly general purpose operational amplifier.
The LM4250C is identical to the LM4250 except that the
LM4250C has its performance guaranteed over a O'C to
+ 70'C temperature range instead of the - 55'C to + 125'C
temperature range of the LM4250.
• ± 1V to ± 18V power supply operation
•
•
•
•
•
•
•
3 nA input offset current
Standby power consumption as low as 500 nW
No frequency compensation required
Programmable electrical characteristics
Offset voltage nulling capability
Can be powered by two flashlight batteries
Short circuit protection
Typical Applications
X5 Difference Amplifier
500 Nano-Watt X10 Amplifier
R2
3.31.1
Rl
330K
Rl
VIN lo-.JI3110"K,..-4...:t
R3
VINo-J\I\I'v-"""
VIN 2o-1\J30VKH~
R3
300K
-15V
Quiescent Po
~
0.6 mW
TUH/9300-4
TUH/9300-3
Quiescent Pp
~
500 mW
Connection Diagrams
Metal Can Package
Dual-In-Line Package
QUIESCENT
CURRENT SET
B QUIESCENT
CURRENT SET
OFFSET 1
NULL
INVERTING 2
INPUT
7 V·
NON-INVERTING 3
INPUT
INVERTING
INPUT
6 OUTPUT
5 OFFSET
NULL
TL/H/9300-5
Top View
TLlH/9300-2
Top View
Order Number LM4250H or LM4250CH
See NS Package Number H08C
3-659
Order Number LM4250J, LM4250CJ,
LM4250CN or LM4250M
See NS Package Number J08A, M08A or N08E
•
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the Nationai Semiconductor Sales Office/
Distributors for availability and specifications.
(Note 2)
LM4250
±1SV
-55'C";: TA";: +125'C
±30V
±15V
150nA
Continuous
Supply Voltage
Operating Temp. Range
Differential Input Voltage
Input Voltage (Note 1)
ISET Current
Output Short Circuit Duration
TJMAX
H-Package
N-Package
J-Package
M-Package
150'C
100'C ..
100'C
100'C
1()O'C
150'C
Power Dissipation at TA = 25'C
H-Package (Still Air)
(400 LF/Min Air Flow)
N-Package
J-Package
M-Package
500mW
1200mW
165'C/W
65'C/W
165'C/W
65'C/W
130'C/W
10S'C/W
190'C/W
10S'C/W
(Typical) (JJC
H-Package
Storage Temperature Range
Soldering Information
Dual-In-Line Package
Soldering (10 seconds)
Small Outline Package
Vapor Phase (60 seconds)
Infrared (15 seconds)
300mW
1200mW
500mW
600mW
350mW
1000mW
Thermal.Resistance (Typical) (JJA
H-Package (Still Air)
(400 LFIMin Air Flow)
N-Package
'
·J-Package
M-Package
LM4250C
±1SV
O'C,,;: TA";: +70'C
±30V
±15V
150nA
Continuous
21'C/W
21'C/W
- 65'C to + 150'C
-65'Cto + 150'C
260'C
215'C
220'C
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
ESD tolerance (Note 3)
SOOV
Note 1: For supply voltages less than ±15V. the absolute maximum input voltage is equal to the supply voltage.
Note 2: Refer to RETS4250X for military specijications.
Note 3: Human body model. 1.5 kG In series with 100 pF.
Resistor Biasing
Set Current SeHlng Resistor to VISET
Vs
0.1 p.A
0.5p.A
1.0p.A
5p.A
10p.A
±1.5V
25.6MO
5.04MO
2.5MO
492kO
244kO
±3.0V
55.6MO
11.0 MO
5.5MO
1.09MO
544kO
±6.0V
116MO
23.0MO
11.5 MO
2.29MO
1.14MO
±9.0V
176MO
35.0MO
17.5 MO
3.49MO
1.74 MO
±12.0V
236MO
47.0MO
23.5MO
4.69MO
2.34MO
±15.0V
296MO
59.0MO
29.5MO
5.S9MO
2.94MO
3-660
r
Electrical Characteristics LM4250 (O'C ~ TA ~
==
-'="
+70'C unless otherwise specified.)TA = TJ
N
(J1
Ys = ±1.5Y
Parameter
Conditions
Min
Rs
Yos
~
100 kO. TA = 25'C
Q
ISET = 10/LA
ISET = 1/LA
Max
Min
Max
5mV
3mV
3nA
10nA
7.5nA
50nA
los
TA = 25'C
Ibias
TA = 25'C
Large Signal Voltage
Gain
RL = 100 kO. TA = 25'C
Vo = ±0.6V. RL = 10 kO
Supply Current
TA = 25'C
7.5/LA
80/LA
Power Consumption
TA = 25'C
23/LW
240/LW
~
Vos
Rs
los
TA = +125'C
TA = -55'C
4mV
6mV
5nA
3nA
10 nA
10nA
Output Voltage Swing
RL = 100 kO
RL=10kO
Common Mode Rejection Ratio
Rs
~
Supply Voltage Rejection Ratio
Rs
~
Q
50nA
7.5nA
Vo = ±0.5V. RL = 100 kO
RL = 10kO
(J1
(")
50k
±0.6V
Large Signal Voltage
Gain
==
-'="
N
40k
100kO
Ibias
Input Voltage Range
.......
r
±0.6V
30k
30k
±0.6V
±0.6V
10kO
70dB
70dB
10kO
76dB
76dB
Supply Current
Power Consumption
8/LA
90/LA
24/LW
270/LW
Vs = ±15Y
Parameter
Conditions
ISET = 1/LA
Min
Vos
Rs ~ 100 kO. TA = 25'C
Max
ISET = 10/LA
Min
3mV
Max
5mV
los
TA = 25'C
3nA
10nA
Ibias
TA = 25'C
7.5nA
50nA
Large Signal Voltage
Gain
RL = 100 kO. TA = 25'C
Vo = ±10V. RL = 10 kO
Supply Current
TA = 25'C
10/LA
90/LA
Power Consumption
TA = 25'C
300/LW
2.7mW
100k
100k
Vos
Rs~100kO
4mV
6mV
los
TA = +125'C
TA = -55'C
25nA
3nA
25nA
10nA
7.5nA
Ibias
Input Voltage Range
Large Signal Voltage
Gain
Vo = ±10V. RL = 100 kO
RL=10kO
Output Voltage Swing
RL = 100kO
RL=10kO
Common Mode Rejection Ratio
Rs
~
10kO
70dB
Supply Voltage Rejection Ratio
Rs
~
10kO
76 dB
50nA
±13.5V
±13.5V
50k
50k
±12V
±12V
Supply Current
Power Consumption
3-661
70 dB
76 dB
11/LA
100/LA
330/LW
3mW
•
Electrical Characteristics LM4250C(-55°C:;; TA:;; + 125°C unless otherwise specified.)TA = TJ
Vs
Parameter
Conditions
ISET
Min
Vas
Rs:;; 100 kO, TA = 25°C
los
TA = 25°C
Ibias
TA
Large Signal Voltage
Gain
RL = 100 kO, TA = 25°C
Va = ±0.6V, RL = 10 kO
Supply Current
TA
= 25°C
= ±1.5V
= 1 p.A
ISET = 10/LA
Max
Min
Max
5mV
6mV
6nA
20nA
10nA
75nA
25k
25k
8/LA
90/LA
Power Consumption
= 25°C
TA = 25°C
24p.W
270p.W
Vas
Rs:;; 10kO
6.5mV
7.5mV
los
8nA
25 nA
Ibias
10nA
80nA
Input Voltage Range
±0.6V
±0.6V
Large Signal Voltage
Gain
Va = ±0.5V, RL = 100 kO
RL = 10kO
Output Voltage Swing
RL
RL
Common Mode Rejection Ratio
Rs:;; 10kO
70dS
Supply Voltage Rejection Ratio
Rs:;; 10kO
74dS
= 100kO
= 10kO
25k
25k
±0.6V
±0.6V
Supply Current
Power Consumption
70dS
74dS
8/LA
90/LA
24p.W
270p.W
Vs
Parameter
Conditions
'SET = 1/LA
Min
Max
= ±15V
ISET = 10/LA
Min
Max
Vas
Rs :;; 100 kO. T A = 25°C
5mV
6mV
los
TA
= 25°C
= 25°C
RL = 100kO, TA = 25°C
6nA
20nA
Ibias
TA
10nA
75nA
Large Signal Voltage
Gain
Va = ± 10V, RL = 10 kO
Supply Current
TA
60k
60k
Power Consumption
= 25°C
TA = 25°C
330p.W
3mW
Vas
Rs:;;100kO
6.5mV
7.5mV
los
8nA
25nA
Ibias
10 nA
11 p.A
Input Voltage Range
±13.5V
= 100 kO
Large Signal Voltage
Gain
Va = ±10V, RL
RL = 10kO
Output Voltage Swing
RL = 100kO
RL=10kO
±12V
Common Mode Rejection Ratio
Rs:;; 10kO
70dS
Supply Voltage Rejection Ratio
Rs:;; 10kO
74dS
.-
Supply Current
100/LA
80nA
±13.5V
50k
SOk
±12V
--
Power Consumption
3-662
70dS
74dS
11 /LA
100/LA
330/LW
3mW
-------- ------------------------------- ----------_._-------------
Typical Performance Characierisiics
.-is:
01:00
N
U1
input Bias Current vs
Temperature
input Bias Current vs iSET
-40
1000 TA=2S"!;
100
1-tt+f-+"I+H+++IIH--J.'1'1H
10 l-tt1i;-vs-!:=::;:±yl.-MSV;-b~V;t-s:!=±:LII.S\lVH
10 I pHISET~10}lA
I
Isrr= 10 ~A
-30 ..;
---_.
i
-~
VS= 15VI
0.1
L...l..Lll.....l-L.llJ--L....L..LLJ....J--L.L..U....J
0.1
10
I
60
10
-60
100
-20
20
TE~PERATURE
Uriiiuiied input Oifset VOitage
Change .5 iSET
12 TA=25OC
~
Ii
~
1) 1.5V~Vs~15V
1000
I
I
tlSV
VS=
I
-15 L-L-J--1--'--.1.--L.-' I
20
so 100
-60 -20
400
'l00
32
24
... 1-'
~ -.coc
-16
~ ~aoo II
vs=t1.SV
I::?
±
Vs=:llSV
28 ISET= 1o!'A
VsLt\b,-
~
Peak to Peak Out put Voltage
Swing vs Load Re sistance
I
I
~L-I"""
-2OC
140
TEMPERATURE (OC)
(OC)
SOO
!;;
~
1,\
-5
-10
"'l-
I I
100
140
ISET= 101'1<
800
>'6
e:
-8
.?
-0
Unnulled input Offset Voltage
Change vs Temperature
~
-4
!
I l'
VS= l.SV
SET = 11'1<
01:00
N
U1
C
(')
Vs!'tl.5V
vsF;tv
....,..,1
-10
.-is:
I
I
vsltll.,v
-20
C
......
Inpui Offset Curfe nt vs
Temperature
Sb::
20
,?
12
!sET = 1 1'1<
ISET= I pA
16 Vs=:ti,5V
2.0
1.6
ISET= I OpA
<
1.2.;'
-600 IIJ
-2C
GJ
1.0
10
100
~ -1~60
0.8
3
Q..!
-20
20
100
60
140
o
0
lK
10K
1M
lOOK
TEMPERATURE (OC)
Peak to Peak Output Voltage
Swing vs Supply VOitage
;;0
ao
TA: 2SOC
RL = 1GkA
11'1< ~1sET~IO;u\
E
Quiescent Current (Iq) vs
Temperature
I-
70
isET=10}lA
Vs~:l15V
_
60
20
Vs=±1.5V
L.
10
-~
iU
10mmM
Vs=:llSV
Vs= t1.SV
1srr=11'1< - - Vs =±15V
10
:i:L :i: ..
vs~
o
is is il0:i;12.i1':.i:16
-60
5urPL'( '¥QLTAuE (v)
20
-20
60
100
140
~
~
0.1
10
TEMPERATURE (OC)
-;;0
t;
1M vs ISET
TA =25OC
RL=100kll
I
..
~
Open Loop Voitag eGain
?v5ISET
10
TA=25OC
RL=100kll
Vs =±15V
6 iOOK
~
100
'SET (pAl
Gain Bandwidth Product
t=
H+tt-+HtH-+t1t
J(I
20
~
2:-
100
50
,?
-~
Quiescent Current (Iq) VS iSET
1000 TA =25
~
;-
10V
Vs=±1 .5V~
1Qi\.~
vo l=:t0.6V
.....
r-
3:
G)
....
co
N
~
.....
C"I
CD
:iii
....I
.......
.-----------------------------------------------------------~-------------------.
Typical Performance Characteristics
Step Response, Av =
(Continued)
+ 1, Vs = ± 15V
Step Response, Av = -1, Vs = ± 15V
N-t-.....-U-+---,
R1
21;
To drive larger capacitive loads at low closed-loop gains.
isolate the amplifier output from the capacitive load with
500. Connect a small capaCitor directly from the amplifier
output to the inverting input. The feedback loop is closed
from the isolated output with a series resistor to the inverting input.
Cl
R2
~"""I!\5°1l.....t--VO!JT
ICt.:S!OOO~F
TLlH/l0254-12
3-670
Application Information
(Continued)
and will track with temperature. With both op amp inputs at
the same potential. a second op amp can be used to convert bias current to voltage, and then back to current feeding the first op amp using large value resistors to reduce the
bias current to the level of the offset current.
Examples of unity gair. connections for a voltage follower,
Inverter, and integrator driving capacitive loads up to
1000 pF are sho'Nn here. Different R1-C1 time constants
and capacitive loads will have an effect on settling times.
Input Bias Current Compensation
Examples are shown here for an inverting application, (a)
where the inputs are at ground potential, and a second circuit (b) for compensating bias currents for both inputs.
Input bias current of the first op amp can be reduced or
balanced out by the second op amp. 80th amplifiers are laid
out in mirror image fashion and in close proximity to each
other, thus both input bias currents will be nearly identical
Bias Current Compensation
INPUTS
Your
+---.-----------r~
r
r-
--------
R2
1M
Your
,
Rl
2M
- - - - - - - - - - ..
R2
5M
R3
SM
C2
Cl
TLlH/l0254-14
*mount resistor close to input pin to minimize stray capacitance
. _----_-.=----*adjust for zerc integrator drift
(b) Compensation to Both Inputs
TLlH/l0254-13
(a) Inverting Input Bias Compensation
for Integrator Application
Amplifier/Parallel Buffer
~~~--~vv~--~----~------~--~--------~------~----e--VOUT
TLIH/10254--15
Av
~
+5, lOUT:;; 8e rnA
vs ~ ±15V, CL " 0.01 ,uF
Large and small signal B.W.
~
1.3
MHz
(THD
~
3%)
3-671
....m
C'oI
CD
r-------------------------------------------------------------------------------~
Application Information (Continued)
::::i
...I
Constant-Voltage Crossover Network With 12 dB/Octave Slope
....~
R
R
241<
24k
.....
C'oI
CD
R
24k
::::i
...I
.....
m
....
....
CD
::::i
...I
R/4
6.2k
vlN-+......"""",..,...........- - I
R
24k
Crossover Frequency =2~C
Refer 10 AN 346 for dotalls
TL/H/l0254-16
Bilateral Current Source
Instrumentation Amplifier
Rl
10k
R2
R3
R4
lk
lk
10k
Vour
R6
500
1:11:
L--W\r--.... IOUT
0.1:11:
--INPUT-+
TL/H/l0254-17
Vs
=
lOUT
TUH/l0254-18
±15V, -10 ,,; VIN ,,; 10V
v,; =
R4
R2R6
Ay = 10, Vs = ±15V. All resistors 0.01%
Small signal and large signal (20 Vp.p) B.W. '" 800 kHz
1 rnA
= 1V
Output dynamic range
= 10V -
R6 IloUTI
150 MHz Gain-Bandwidth Amplifier
RL = 500n, small signal BW = 6 MHz
Large signal response = 800 kHz
R3
2k
.
R2 + R4
Coul eqUIV. = 2'11' fo R2 R6 = 32 pF (fo = 15 MHz)
R5
2k
Coaxial Cable Driver
TL/H/l0254-20
Ay
= 100, Vs =
±15V,
Small signal BW '" 1.5 MHz
Large Signal BW (20 Vp.pl '" 800 kHz
TUH/l0254-19
Small signal (200 mVp.pl BW '" 5 MHz
3-672
,
,
, ,
,
, ,
,
,
en
n
y+
::r
CD
3
S»
I II "'U
BIAS(A)
II
I U::;" ,
BIAS
"'u
I
..'u II I
I ?'u:::5"~ I ,""dJ I
5'
I I
c
iii'
co
II
Dl
3
SHUTDOWN(A)
R7
10
INPUi(-)
"
,
••
,
R9
~
10
...co~
i»0
• "M- OUlPUT
R8
12
~
c.>
~
3
'1:1
~
INPUT(+)
,.
,
,
''I/II'v+-'W\ ,
,
yTUH/10254-21
8 ~~911111/V8~~911111/8 ~ ~ 9l1li1
co
.....
N
CD
::i
Schematic Diagram (Continued)
Bias Circuit
...I
"~
y+
co
.....
N
Rill
20k
CD
::i
R112
20k
...I
"co
0114
.....
.....
CD
0113
::i
...I
Rl09
Uk
BIAS(A)
Rll0
2.4k
BIAS(B)
Rl0S
220
y+
Rl04
Uk
BIAS
Dl
Rl0S
700
R113
2.4k
SHUTDOWN(A)
D2
Rl0S
3.8k
SHUTDOWN(B)
R114
Uk
yTL/H/10254-22
3-674
r
:s:
en
....en
....
......
~National
~ Semiconductor
r
:s:
en
LM6161/LM6261/LM6361
High Speed Operational Amplifier
....
......
General Description
en
....
N
en
r
:s:
en
Co)
Features
The LM6161 family of high-speed amplifiers exhibits an exand
cellent speed-power product in delivering 300 VI
50 MHz unity gain stability with only 5 mA of supply current.
Further power savings and application convenience are
possible by taking advantage of the wide dynamic range in
operating supply voltage which extends all the way down to
+5V.
"'S
These amplifiers are built with National's VIPTM (Vertically
Integrated PNP) process which provides fast PNP transistors that are true complements to the already fast NPN devices. This advanced junction-isolated process delivers high
speed performance without the need for complex and expensive dielectric isolation.
•
•
•
•
•
•
•
•
•
High slew rate
High unity gain freq
Low supply current
Fast settling
Low differential gain
Low differential phase
Wide supply range
Stable with unlimited capacitive load
Well behaved; easy to apply
300 V/",s
50 MHz
5 mA
120 ns to 0.1%
<0.1%
0.10
4.75V to 32V
Applications
• Video amplifier
• High-frequency filter
• Wide-bandwidth signal conditioning
Simplified Schematic
Connection Diagram
V+
VOUT
input
input
Vos
Adjust
N/C
VTL/H/9057 -5
Order Number LM6161J or LM6261J
See NS Package Number J08A
Order Number LM6261N or
LM6361N
See NS Package Number N08E
TL/H/9057 -3
Order Number LM6361 M
See NS Package Number M08A
3-675
•
.,...
CD
C')
CD
==
.......
.,...
...J
CD
C'I
CD
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V+ - V-)
36V
...J
==
.......
.,...
Differential Input Voltage (Note 8)
±8V
Common-Mode Voltage Range
(Note 12)
(V+ - 0.7V) to (V- - 7V)
CD
Output Short Circuit to GND (Note 1)
Soldering Information
Dual-In-Line Package (N, J)
Soldering (10 sec.)
Small Outline Package (M)
Vapor Phase (60 sec.)
Infrared (15 sec.)
CD
.,...
==
...J
-65·C to + 150·C
Storage Temp Range
150·C
Max Junction Temperature
ESD Tolerance (Notes 8 and 9)
±700V
Operating Ratings
Temperature Range (Note 2)
LM6161
LM6261
LM6361
Supply Voltage Range
Continuous
-55·C ,,; TJ ,,; + 125·C
-25·C"; TJ ,,;: +85·C
O·C,,; TJ"; +70·C
4.75Vt032V
260·C
215·C
220·C
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
DC Electrical Characteristics (Note 3)
LM6161
Parameter
Conditions
Input Offset Voltage
Typ
5
Input Offset Voltage
Average Drift
LM6261
LM6361
Tested Design Tested Design Tested Design
Limit
Limit
Limit
Limit
Limit
Limit
(Note 4) (Note 5) (Note 4) (Note 5) (Note 4) (Note 5)
7
10
7
9
20
22
10
Input Bias Current
2
Input Offset Current
150
Input Offset Current
Average Drift
325
1.5
Large Signal
Voltage Gain
VOUT = ±10V, RL = 2 k!!
(Note 11)
750
RL = 10k!!
2900
Power Supply
Rejection Ratio
±10V,,; V± ,,; ±16V
350
800
3
5
5
6
".A
max
350
600
1500
1900
nA
max
pF
550
300
550
400
400
350
VIV
min
VIV
+14.0
+13.9
+13.8
+13.9
+ 13.8
+13.8
+13.7
Volts
min
-13.2
-12.9
-12.7
-12.9
-12.7
-12.8
-12.7
Volts
min
3.9
3.8
3.8
3.7
Volts
min
2.0
2.2
2.1
2.2
Volts
max
80
76
72
70
dB
min
80
76
72
70
dB
min
4.0
1.8
-10V"; VCM ,,; + 10V
3
6
k!!
Differential
Av = + 1 @ 10 MHz
Common-Mode
Rejection Ratio
".vrc
nArC
Input Capacitance
Supply = +5V
(Note 6)
mV
max
0.4
Input Resistance
Input Common-Mode Supply = ± 15V
Voltage Range
Units
94
90
3.9
3.8
2.0
2.2
80
74
80
74
3-676
r-
s:
....
....
.....
DC Electrical Characteristics (Note 3) (Continued)
0)
LM6161
Parameter
Output Voltage
Swing
Conditions
Supply = ± 15V
and RL = 2kO
Supply = +5V
and RL = 2 kO (Note 6)
Output Short
Circuit Current
Souce
Sink
Supply Current
Typ
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
0)
LM6361
LM6261
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
+13.5
+13.3
+13.4
+13.3
Volts
min
Units
0)
-13.4
-13.0
-12.7
-13.0
-12.8
-12.9
-12.8
Volts
min
4.2
3.5
3.3
3.5
3.3
3.4
3.3
Volts
min
1.3
1.7
2.0
1.7
1.9
1.8
1.9
Volts
max
65
30
20
30
25
30
25
mA
min
65
30
20
30
25
30
25
mA
min
5.0
6.5
6.8
6.5
6.7
6.8
6.9
mA
max
AC Electrical Characteristics (Notes 3 & 7)
Parameter
Conditions
Typ
Design
Limit
(Note 5)
LM6361
LM6261
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
40
35
35
32
MHz
min
180
V/p.s
min
Units
Gain-Bandwidth
Product
@F
Slew Rate
Av = + 1 (Note 10)
Supply = ±5V
200
V/p.s
Power Bandwidth
VOUT = 20Vpp
4.5
MHz
Settling Time
10V Step to 0.1%
Av = -1, RL = 2 kO
120
ns
45
Deg
Differential Gain
NTSC,Av = +4
<0.1
%
Differential Phase
NTSC,Av = +4
0.1
Deg
Input Noise Voltage
f=10kHz
15
nV/,JHz
Input Noise Current
f=10kHz
1.5
pAl,JHz
= 20 MHz
Supply = ±5V
Phase Margin
50
40
30
MHz
35
300
200
180
200
180
200
Note 1: Continuous short-circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 1500C.
Note 2: The typical junction-ta-ambient thermal resistance of the molded plastic DIP (N) is 10S'C/W, the molded plastic SO (M) package is ISS'C/W, and the
cerdip (J) package is I 25"C/W. All numbers apply for packages soldered directly into a printed circuit board.
Note 3: Unless otherwise specified, all limils guaranteed for TA = T) = 2S'C with supply voltage = ±ISV, VCM = OV, and RL ~ 100 kil. Boldface limits apply
over the range listed under "Operating Temperature Range" with TA = T, in the "Absolute Maximum Ratings" section.
Note 4: All limils guaranteed at room temperature (standard type face) and at temperature extremes (bold type face). All limits are 100% production
tested.
Note 5: All limils guaranteed at temperature extremes (bold type face) via correlation using standard Statistical Quality Control (SOC) methods.
Note 6: For single supply operation, the following conditions apply: V+ = SV, V- = OV, VCM = 2.SV, VauT = 2.SV. Pin I & Pin 8 (Vas Adjust) are each
connected to Pin 4 (V-) to realize maximum output swing. This connection will degrade Vas, Vas Drift, and Input Voltage Noise.
Note 7: CL ,; 5 pF.
Note 8: In order to achieve optimum AC performance, the input stage was designed without protective clamps. Exceeding the maximum differential input voltage
results in reverse breakdown of the base-emitter junction of one of the input transistors and probable degradation of the input parameters (especially Vas, los, and
Noise).
Note 9: The average voltage that the weakest pin combinations (those involving Pin 2 or Pin 3) can withstand and still conform to the datasheet limits. The test
circuit used consists of the human body model of 100 pF in series with ISOOil.
Note 10: VIN = 8V step. For supply = ± SV, VIN = SV step.
Note 11: Voltage Gain is the total output swing (20V) divided by the input signal required to produce that swing.
Note 12: The voltage between V+ and either input pin must not exceed 36V.
3-677
....
.....
0)
+13.5
+13.3
LM6161
s:
N
+14.2
Tested
Limit
(Note 4)
r-
r-
s:
0)
(0)
0)
....
~ .-----------------------------------------------------------------------------------------~
CD
C")
CD
:E
Typical Performance Characteristics (RL =
..J
......
Supply Current vs
Supply Voltage
~
~
CD
:E
......
i
...l
+125OC
/-55OC
~
CD
CD
:E
246
ro n
8
+/-
~
~
\
60
10
t;
is 40
'"....
~
i§
I
I
is
I~
30
'/V
~
..
100
lk
101e lOOk
1M
70
o
1
~
I:::-
4(10
-55OC
I'
§
I
~200
I
I
o
Vs = t 15V
1
10
LOAD RESISTANCE (kII)
~OC
I
!:i
o
r-
20
"
i"""
I I
-I-r'
~800
25"C~ 125~
-55"C
~
40
r;--
Gain VB Supply Voltage
1000
111111
~
~
o
l00nF
+/-
Voltage Gain
vs Load Resistance
9I
I /
'I
CAPAaTIVE LOAD
80
III
~
li!
b:;:: .....
~ 1/
r\ .\
LOAO CAPACITANCE
ii
-55"C
Rrj2k4
l\cr=OlpF
1 nF
"
100r l00.F 1jIf'
4(10
YSt~
~=+1
er=11 pF
l00pF
lor
LOAD CAPACITANCE
Vl.I 1\
o
10.F l00nF 1jIf'
:!!.
z
10pF l00pF
Overshoot vs
Capacitive Load
30
Nogal1vt~
o
""-r-...
1
lElIPERATURE (OC)
Slew Ratevs
Load CapaCitance
1M
-.... ~
t; 100
.~
-55 -35-15 5 25 45 65 85 105125
Vs =t15V
Ay = +1
10k lOOk
Vs =t 15V
10
o
m
lk
1000
!
Ys=t15Y
Vo = tlOY
SUPPLY VOLTAGE (V)
,",P_
100
Gain-Bandwidth Product
vs Load CapaCitance
It!
50
~ ~"C
10
8
10
FREQUENCY (Hz)
~ ~ F===
Ir
60
~
~
10M
~
246
40
Propagation Delay
Rise and Fall Times
10
o
~
N.gaIIY'"
FREQUENCY (Hz)
J...I-
1.--" ........
\
~
SUPPLY VOLTAGE (V)
-- 1-~55~
'N"
60
15
Gain-Bandwidth
Product
'" 50
i!!-
I
~
40
o
m
r-- -
:!!. 80
'\
,
PosfI1vt
lii'
100
~
..J
o
Power Supply
Rejection Ratio
100
!:
i~
~
= 25'C unless otherwise ~pecified)
Common-Mode
Rejection Ratio
!120
+Joc
..J
10 kO, T A
o
2
100
4
RL
= 2k11
6
8 10 12 14 16 18
+/~ SUPPLY VOLTAGE (V)
TLlH/9057-6
3·678
Typical Performance Characteristics
(RL = 10 k!l, TA = 25'C unless otherwise specified) (Continued)
Differential Gain (Note)
Differential Phase (Note)
TL/H/9057-8
Note: Differential gain and differential phase measured for four series
LM6361 op amps configured as unity-gain followers, in series with an
LM6321 buffer. Error added by LM6321 is negligible. Test performed using
Teklronix Type 520 NTSC lesl syslem.
TLlH/9057-7
Step Response; Av
=
+1
TL/H/9057 -1
(50 ns/div)
Input Noise Current
Input Noise Voltage
~
E"
F'.:...
f-.-
~
0
>.
~
~
~
1000
.e,
c ..
r---
III
.<
100
'z"
~=
0
10
28
100
I"
"'
a
r-Ik
FREQUENCY (Hz)
10k
lOOk
1.
24
~
20
~
!5
10
!
isg§
10
I
Power Bandwidth
32
1000
10,000 E '
I
10
100
Ik
FREQUENCY (Hz)
-
10k
lOOk
16
12
~
:>
"
0
o
0.1
10
FREQUENCY
100
(~Hz)
TL/H/9057-9
3-679
~
CD
C")
CD
::::i
..J
r-----------------------------------------------------------------------------------------,
Typical Performance Characteristics
(RL
=
=
10 kn. T A
'"CD
25'C unless otherwise specified) (Continued)
~
Open-Loop
Frequency Response
N
CD
::::i
..J
'"
CD
~
~
CD
:::E
..J
80
~
~
~
!:O
!'!
...
Open-Loop
Frequency Response
1
"-
60
GAIN
40
"
20
0
9
~
'\.1
.'!I..
I'\.
PHASE
1
1
1
-20
lk
10k lOOk
1M
Output Impedence
(Open-Loop)
lOOk
60
180
270
~
'\:
~on
~
1\
~
~
!'!
1 :s
i! 9
360 ~
10M 100M
~
~
~
50
40
180
~
30
20
r-
10
,
l-10 I-
-20 ' -
lG
1M
1011
FREQUENCY (Hz)
100M
270 on
:j
'"
'2
360 .3
1
450
lG
1
f---+-+-+-+--+--+-+-l
-2
2
4
6
+/-
8
10 12 14 16 18
SUPPLY VOLTAGE (V)
:"",,....,
100
0
o
lk
10k
lOOk
1M
1011
100M
FllEQUENCY (Hz)
Bias Current vs
Common-Mode Voltage
5
11--""I-IH-I-+-+-+-I
~L-L-L-~~~~~~
5
5
lk
Output Saturation Voltage
V+
1~+-+-+-+-~1-1-~
I
......
10k
FREQUENCY (Hz)
Common-Mode Input
Saturation Voltage
-2
e~1:1
-55~
-
1
1
lit. = 2kll
~
2
4
6
+/-
8
10 12 14 16 18
SUPPLY VOLTAGE (V)
o
-15 -10
r-
+~OC
--
-
+125OC
-S
I-
-
10
15
COMMON-MODE VOLTAGE (V)
TL/H/9057-12
3-680
Applications Tips
The LM6361 has been compensated for unity-gain operation. Since this compensation involved adding emitter-degeneration resistors to the op amp's input stage, the openloop gain was reduced as the stability increased. Gain error
due to reduced AVOL is most apparent at high gains; thus,
for gains between 5 and 25, the less-compensated LM6364
should be used, and the uncompensated LM6365 is appropriate for gains of 25 or more. The LM6361, LM6364, and
LM6365 have the same high slew rate, regardless of their
compensation.
however, improve the stability and transient response and is
recommended for every design. 0.01 fLF to 0.1 fLF ceramic
capacitors should be used (from each supply "rail" to
ground); if the device is far away from its power supply
source, an additional 2.2 fLF to 10 fLF of tantalum may provide extra noise reduction.
Keep all leads short to reduce stray capacitance and lead
inductance, and make sure ground paths are low-impedance, especially where heavier currents will be flowing.
Stray capacitance in the circuit layout can cause signal coupling across adjacent nodes and can cause gain to unintentionally vary with frequency.
Breadboarded circuits will work best if they are built using
generic PC boards with a good ground plane. If the op amps
are used with sockets, as opposed to being soldered into
the circuit, the additional input capacitance may degrade
circuit performance.
The LM6361 is unusually tolerant of capacitive loads. Most
op amps tend to oscillate when their load capacitance is
greater than about 200 pF (especially in low-gain circuits).
The LM6361 's compensation is effectively increased with
load capacitance, reducing its bandwidth and increasing its
stability.
Power supply bypassing is not as critical for the LM6361 as
it is for other op amps in its speed class. Bypassing will,
Typical Applications
Offset Voltage Adjustment
1 MHz Low-Pass Filter
V+
~~
150pr' ....- - - - 1
Cl
>-t--VOUT
VIN -.JVVV....-'I>N\,--....-1
1.0k.Qt
Rl
10 k.Q
lOOK
TLIH/9057-4
TL/H/9057-10
tl % tolerance
·Matching determines filter precision
Ie = 2" J(RI R2 CI C2) 1
Modulator with Differential-to-Single-Ended Converter
+12V
UODULATION
BALANCE
10k
lk
+12V
3.9k
51
3.9k
7
CARRIER - - -...-11-.....- - -.....- - - - 1 8
LU1496
UODULATION --......;;.;';"'O:...........- - -......- - - i
INPUT
OUTPUT
9
4
10k
3.9k
6
10
... 12
5
9.1k
"'12V
TLIH/9057 -11
3-6~1
~
CD
~
:i
r----------------------------------------------------------------------------,
~National
~
~ Semiconductor
'"
LM6164/LM6264/LM6364
-I
CD
CD
:i
-I
.....
High Speed Operational Amplifier
CD
~
op-
CD
:i
-I
General Description
Features
The LM6164 family of high-speed amplifiers exhibits an excellent speed-power product in delivering 300V per ,..s and
175 MHz GBW (stable down to gains as low as + 5) with
only 5 mA of supply current. Further power savings and application convenience are possible by taking advantage of
the wide dynamic range in operating supply voltage which
extends all the way down to +5V.
•
•
•
•
•
•
•
•
•
These amplifiers are built with National's VIPTM (Vertically
Integrated PNP) process which produces fast PNP transistors that are true complements to the already fast NPN devices. This advanced junction-isolated process delivers high
speed performance withou1 the need for complex and expensive dielectric isolation.
Simplified Schematic
300 Vlp.s
175 MHz
5 rnA
100 ns to 0.1 %
<0.1%
<0.1·
4.75V to 32V
High slew rate
High GBW product
Low supply current
Fast settling
Low differential gain
Low differential phase
Wide supply range
Stable with unlimited capacitive load
Well behaved; easy to apply
Applications
• Video amplifier
• Wide-bandwidth signal conditioning
Connection Diagram
Vos
Adjust
Nle
V+
8
Vos
Adjust
INV
input
NI
input
VTUH/9153-8
Order Number LM6164J or LM6264J
See NS Package Number J08A
TL/H/9153-3
Order Number LM6364M
See NS Package Number M08A
Order Number LM6264N or LM6364N
See NS Package Number N08E
3-682
Absolute Maximum Ratings
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
- 65·C to + 150·C
Storage Temperature Range
150·C
Max Junction Temperature (Note 2)
±700V
ESD Tolerance (Notes 6 & 9)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V+ - V-I
36V
Differential Input Voltage (Note 6)
±6V
Common-Mode Input Voltage
(V+ - 0.7V) to (V- - 7V)
(Note 12)
Output Short Circuit to Gnd (Note 1)
Soldering Information
Dual-In-Line Package (N, J)
Soldering (10 sec.)
Small Outline Package (M)
Vapor Phase (60 sec.)
Infrared (15 sec.)
Operating Ratings
Continuous
Temperature Range (Note 2)
LM6161
LM6261
LM6361
Supply Voltage Range
260·C
215·C
220·C
-55·C ,,; TJ ,,; + 125·C
-25·C ,,; TJ ,,; +85·C
O·C,,; TJ ,,; +70·C
4.75Vto 32V
DC Electrical Characteristics (Note 3)
LM6164
Parameter
Conditions
Typ
Input Offset Voltage
2
Input Offset Voltage
Average Drift
6
LM6364
LM6264
Tested Design Tested Design Tested Design
Limit
Limit
Limit
Limit
Limit
Limit
(Note 4) (Note 5) (Note 4) (Note 5) (Note 4) (Note 5)
4
6
4
6
9
11
Units
mV
max
/Lvrc
Input Bias Current
2.5
3
6
3
5
5
6
/LA
max
Input Offset Current
150
350
800
350
600
1500
1900
nA
max
Input Offset Current
Average Drift
0.3
nArC
100
kO
3.0
pF
Input Resistance
Differential
Input Capacitance
Large Signal
Voltage Gain
VOUT = ±10V,RL = 2kO
(Note 11)
RL = 10 kO
Input Common-Mode Supply = ± 15V
Voltage Range
Supply = +5V
(Note 6)
2.5
1.8
0.9
1.8
1.2
1.3
1.1
+14.0
+13.9
+13.8
+13.9
+13.8
+13.8
+13.7
V
min
-13.5
-13.3
-13.1
-13.3
-13.1
-13.2
-13.1
V
min
4.0
3.9
3.8
3.9
3.8
3.6
3.7
V
min
1.5
1.7
1.9
1.7
1.9
1.8
1.9
V
max
V/mV
min
9
Common-Mode
Rejection Ratio
-10V"; VCM ,,; +10V
105
86
80
66
82
80
78
dB
min
Power Supply
Rejection Ratio
±10V,,; V± ,,; ±16V
96
86
80
66
82
80
78
dB
min
Output Voltage
Swing
Supply = ± 15V
and RL = 2kO
+14.2
+13.5
+13.3
+13.5
+13.3
+13.4
+13.3
V
min
-13.4
-13.0
-12.7
-13.0
-12.8
-12.9
-12.8
V
min
3-663
•
DC Electrical Characteristics (Note 3) (Continued)
LM6164
Parameter
Conditions
Output Voltage
Supply = + 5V and
Swing
RL = 2 kO (Note 6)
LM6264
LM6364
,Tested
Design
Tested
Design
Tested
Design
Limit
Umit
Limit
Limit
Limit
Limit
(NotI[l4)
(Note 5)
(Note 4)
(Note 5)
(Note 4)
(Note 5)
3.5
3.3
3.4
3.3
Typ
4.2
3.5
Units
V
3.3
1.3
min
1.7
1.9
1.7
1.9
1.8
V
2.0
Output Short
Source
65
max
30
25
30
25
30
mA
20
Circuit Current
Sink
65
min
30
25
30
25
30
mA
20
Supply Current
5.0
min
6.5
6.7
6.5
6.9
6.8
mA
6.8
max
AC Electrical Characteristics (Notes 3 & 7)
LM6164
Parameter
Gain-Bandwid1h
Conditions
Typ
@F= 20 MHz
175
LM6264
LM6364
Tested
Design
Tested
Design
Tested
Design
Limit
Limit
Limit
Limit
Limit
Limit
(Note 4)
(Note 5)
(Note 4)
(Note 5)
(Note 4)
(Note 5)
140
120
120
100
140
Units
MHz
100
Product
Slew Rate
Supply = ±5V
120
Av = +20 (Note 10)
300
min
200
180
200
200
180
V/p,s
180
Power Bandwidth
200
VOUT = 20Vpp
4.5
MHz
100
ns
10V Step to 0.1 %
Setting'Time
min
Supply = ±5V
Av = -4, RL = 2 kO
Phase Margin
Av= +5
45
Deg
Differential Gain
NTSC,Av = +10
<0.1
%
Differential Phase
NTSC,Av = +10
<0.1
Deg
Input Noise Voltage
F = 10kHz
8
nV/.JFiZ
Input Noise Current
F = 10kHz
1.5
pAl.JFiZ
Note 1: Continuous short-cIrcuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of ISO'C.
Note 2: The typlcaljunction-to-ambient thermal resistance of the molded plastic DIP (N) is 10S-C/Watl, the molded plastic SO (M) package is ISS-C/Wall, and the
cerdlp (J) peckage is 12S'C/Watl. All numbers apply for packages soldered directly into a printed circuit board.
Note 3: Unless othsrwise specified, all limits guaranteed forTA
the range listed under "Operating Temperature Range".
= TJ = 2S'Cwith supply.voltage =
±ISV, VCM
= OV, and rl ;;, 100 KIl Boldface limits apply over
Note 4: All limits guaranteed at roem temperature (standard type face) and at temperature e ..treme.. All limits are 100% production tested.
Note 5: All limits guaranteed at room temperature (standard type face) and at temperature extreme•• All limits are guarenteed via correlation using standard
Statistical Quality Control (SOC) methods.
Note 6: For single supply operation, the following conditions apply: V + = SV. V - = OV. VCM
connected to Pin 4 (V-) to realize maximum output swing. This connection will·degrade VOS.
= 2.SV. Vour = 2.SV. Pin I
& Pin 8 (Vos Adjust) are each
Note 7: CL ,; S pF.
Note 8: In order to achieve optimum AC performance, the input stage was designed without protective clamps. Exceeding the maximum differential input voltage
results in reverse breakdown of the base·emmer Junction of one of the Input transistors and probable degradation of the Input parameters (especially VOS. los, and
Noise).
Note 9: The average voltage that the weakest pin combinations (those involving Pin 2 or Pin 3) can withstand and still conform to the datashset limits. The test
circuit used consists of the human body model of 100 pF in series with IS001l.
Note 10: VIN
= 4V step. For supply =
±SV, VIN
=
tV step.
,Note 11: Voltage Gain is the total output SWing (20V) divided by the input signal required to produce that swing.
Note 12: The voltage between V+ and either Input pin must not exceed 36V.
3-684
Typical Performance Characteristics
Supply Current vs
Supply Voltage
(RL = 10 kn, TA = 25'C unless otherwise specified)
Power Supply
Rejection Ratio
Common-Mode
Rejection Ratio
120
!
+2~OC
+125OC -
80
2
4
6
W
8
~
u
~
o
~
o
10
100
lk
160
ii!j5
120
10k lOOk
IN
-55;"
I:
~/ ".
V
o
2
".
--
".
60
~5- " .
50
+125;£'
8 W
6
+f-
~
-
]:
il!
u
~
~
\po
30
SUPPLY VOLTAGE (V)
100
i5
10
~
I"
~
0.1
lOp!" lOOp!"
TENPERATURE (OC)
,,(
g
20
g
\\
NEI1A~'
\
~ 0
/
W1
'\
i'..
o
10nF l00nF 1j6
10pF
~55ci:
,
~ .....
~ 1/
~
10
\
Slew Rate
Vs = t15V
I-- .Iv = +5
Rr = 2k4
Cr=lpF
1 nF
10nF
o
l00nr
2
4
Voltage Gain vs
Load Resistance
~
III
!:l§!
§
I
~
+25OC
60
~
~ 3.0
~
-55OC
/
;:! 2.0
0.1
i
Vs = t15V
10
8
10 12 14 16 18
SUPPLY VOLTAGE (V)
+25OC
~
IV
~
20
o
i"'" +125OC
-55OC
-f
v.~
-
L
1.0
I
o
246
100
~ I-
1/ ....
III
fP
~
~ F1'+25"C
I
~
LJUIIIIIIR
11111111 II
I I +125OC
80
_
Gain vs Supply Voltage
4.0
100
~
6
+f-
LOAD CAPACITANCE
7D"
,..
~
IV
'I
1\
l00pF
1j6
10nF l00nF
~
t
I
1nF
LOAD CAPACITANCE
Overshoot vs
Load Capacitance
30
ION
~
~
5 25 45 65 85 105125
Cr=OW
1nF
13
ii
-ss -35 -15
'\.POSI11VE
lOp!" lOOp!"
~
Vs = t15V
Vo = tl0V
o
Vs = t15V
1M
Vs - t15V
f = 20NHz
1
20
~
10k lOOk
1000
~
--
~
~
Slew Rate vs
Load Capacitance
o
lk
Gain-Bandwidth Product
vs Load Capacitance
I.!:: ~
Ir
10
4
100
FREQUENCY (Hz)
70
l/. ,..
10
ION
FREOUENCY (Hz)
2~
!200
"\
Propagation Delay
Rise and Fall Time
"N'
~
20
Gain-Bandwidth
Product
iil
60
\
+f- SUPPLY VOLTAGE
13
NEGATIVE'
20
o
~SI11VE
80
\.
60
1
100
i
\
f-55"C
120
!o
8
W
~
~
u
~
+f- SUPPLY VOLTAGE (V)
LOAD RESISTANCE (kill
TL/H/9153-5
3-685
Typical Performance Characteristics
tRL = 10 kfi, T A = 25'C unless otherwise specified) (Continued)
Differential Gain (Note)
Differential Phase (Note)
TLlH/9153-7
Note: Differential gain and differential phase
measured for four series LM6364 op amps oon-
figured as unity-gain followers, in series with an
LM6321 buffer. Error added by LM6321 is negligible. Test performed using Tektronix Type 520
NTSC test system.
TLlH/9153-6
Step Response; Av =
+5
TL/H/9153-1
TIME (50 ns/diy)
Input Noise Voltage
Power Bandwidth
Input Noise Current
lllOD
32
lllOD
~
"
~
I
"'"
~z
I
1
10
100
lk
FREQUENCY (Hz)
I
10k
lOOk
rr-
2B
100
24
"-
-
~
I~s lW~
THO
< 1%
20
16
12
10
II
10
100
Ik
FREQUENCY (Hz)
10k
-
lOOk
~
o
0.1
10
100
FREQUENCY (MHz)
TL/HI.153-9
3-686
r-
s:::
....
Typical Performance Characteristics
en
en
(RL = 10 k!l., TA = 25'C unless otherwise specified) (Continued)
Open-Loop
Frequency Response
60
;!!.
80
"
60
z
~
~
!:l
0
«l
~
20
~
GAIN
"
>
"'
PHfE
10k lOOk
IN
~
'"~ !:l~
~
-20
lk
!z
90
~
10M 100M
180
270
lG
i
~
§
......
«l
g
;g
:50
1'0.. GAIN
r--~
20
10
90
-20
1M
10M
180
~
II
II
-10
~
~
:!i
PHASE
FREQUENCY (Hz)
270
lG
lOON
i
.....
10k
c.:I
i
lk
[;
1110
0
.....
10
lk
10k
lOOk
RL
V"
6
8
W
~
~
+/- SUPPLY VOLTAGE (V)
~
~
2
•
6
8
W
~
10M
100M
Bias Current vs
Common-Mode Voltage
1
1
•
1M
5
~
yo
""
5
1
1
en
\.
FREQUENCY (Hz)
V' Output Saturation Voltage
:~
2
s:::
en
tJ
Common-Mode Input
1
en
""r-
......
FREQUENCY (Hz)
V' Saturation Voltage
I\)
lOOk
50
I
~
0
s:::
en
Output Resistance
Open-Loop
Open-Loop
Frequency Response
1110
...
:t
r-
= 2kll
~
+/- SUPPLY VOLTAGE (Y)
~
~
o
-15 -10
-
-5~CC
-- -
25CC
l
125CC
-5
0
--
10
15
COMNON-MODE VOLTAGE (V)
TL/H/9153-13
3-687
Applications Tips
The LM6364 has been compensated for gains of 5 or greater (over specified ranges of temperature, power supply voltage, and load). Since this compensation involved adding
emitter-degeneration resistors in the op amp's input stage,
the open-loop gain was reduced as the stability increased.
Gain error due to reduced AVOL is most apparent at high
gains; thus, the uncompensated LM6365 is appropriate for
gains of 25 or more. If unity-gain operation is desired, the
LM6361 should be used. The LM6361, LM6364, and
LM6365 have the same high slew rate (typically 300 V I p.s),
regardless of their compensation.
series resistor-capacitor network should be added between
the input pins (as shown in the Typical Applications, Noise
Gain Compensation) so that the high-frequency noise gain
rises to at least 5.
Power supply bypaSSing will improve the stability and transient response of the LM6364, and is recommended for every design. 0.01 ,.F to 0.1 ,.F ceramic capacitors should be
'used (from each supply "rail" to ground); if the device is far
away from its power supply source, an additional 2.2 p.F to
10 p.F (tantalum) may be required for extra noise reduction.
Keep all leads short to reduce stray capacitance and lead
inductance, and make sure ground paths are low-impedance, especially where heavier currents will be flowing.
Stray capacitance in the circuit layout can cause signal coupling between adjacent nodes, so that circuit gain unintentionally varies with frequency.
Breadboarded circuits will work best if they are built using
generic PC boards with a good ground plane. If the op amps
are used with sockets, as opposed to being soldered into
the circuit, the additional input capacitance may degrade
circuit performance.
The LM6364 is unusually tolerant of capacitive loads. Most
op amps tend to oscillate when their load capacitance is
greater than abou1 200 pF (in low-gain circuits). However,
load capacitance on the LM6364 effectively increases its
compensation capacitance, thus slowing the op amp's response and reducing its bandwidth. The compensation is
not ideal, though, and ringing or oscillation may occur in
low-gain circuits with large capacitive loads. To overcompensate the LM6364 for operation at gains less than 5, a
Typical Applications
Noise-Gain Compensation for Gains';: 5
Offset Voltage Adjustment
y+
RF
_76
~
3+
y+
'I 8
1
V>-+--YOUT
lOOk
TL/H/9153-10
Video-Bandwidth Amplifier
Y·
1 pF
TUH/9153-11
RXCX ;;, (2"..25 MHz)-1
5 Rx ~ R1
YOUT
TL/H/9153-12
3-688
+
RF(1
+
R1/R21
.------------------------------------------------------------------------.r
...s::
J?!A National
a>
a>
~ Semiconductor
UI
......
r
s::
a>
I\)
LM6165/LM6265/LM6365
High Speed Operational Amplifier
General Description
Features
The LM6165 family of high-speed amplifiers exhibits an excellent speed-power product in delivering 300 V I IJ-s and
725 MHz GBW (stable for gains as low as +25) with only
5 mA of supply current. Further power savings and application convenience are possible by taking advantage of the
wide dynamic range in operating supply voltage which extends all the way down to +5V.
These amplifiers are built with National's VIPTM (Vertically
Integrated PNP) process which produces fast PNP transistors that are true complements to the already fast NPN devices. This advanced junction-isolated process delivers high
speed performance without the need for complex and expensive dielectric isolation.
•
•
•
•
•
•
•
•
•
a>
UI
......
r
s::
a>
Co:!
a>
High slew rate
High GBW product
Low supply current
Fast settling
Low differential gain
Low differential phase
Wide supply range
Stable with unlimited capacitive load
Well behaved; easy to apply
300 V/IJ-s
725 MHz
5mA
80 ns to 0.1%
<0.1%
<0.1"
4.75V to 32V
UI
Applications
• Video amplifier
• Wide-bandwidth signal conditioning
Connection Diagram
Simplified Schematic
Vos
N/C
Adjust
B
Vos
INY
Adjust
Input
VTL/H/9152-8
Order Number LM6165J or LM6265J
See NS Package Number J08A
TUH/9152-3
Order Number LM6365M
See NS Package Number M08A
Order Number LM6265N or
LM6365N
See NS Package Number NOSE
3-689
•
Absolute Maximum Ratings
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
Storage Temp Range
-65·Gto + 150"C
150·C
Max Junction Temperature (Note 2)
ESD Tolerance (Notes 8 and 9)
±700V
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and speclfications_
Supply Voltage (V+ - V-I
36V
Differential Input Voltage (Note 8)
±8V
Common-Mode Voltage Range
(V+ - 0.7V) to (V- - 7V)
(Note 12)
Output Short Circuit to GND (Note 1)
Soldering Information
Dual-In-Line Package (N, J)
Soldering (10 sec.)
Smail Outline Package (M)
Vapor Phase (60 sec.)
Infrared (15 sec.)
Operating Ratings
Continuous
Temperature Range (Note 2)
LM6165
LM6265
LM6365
Supply Voltage Range
260·C
215·C
220·C
-55·C,;;TJ';; +125·C
-25·C ,;; TJ ,;; +85·C
O·C,;; TJ ,;; +70·C
4.75Vt032V
DC Electrical Characteristics (Note 3)
LM6165
Parameter
Conditions
Typ
Input Offset Voltage
1
Input Offset Voltage
Average Drift
3
LM6265
LM6365
Tested
Limit
Design
Limit
Tested
Limit
Design
Limit
Tested
Limit
Design
Limit
(Note 4)
(Note 5)
(Note 4)
(Note 5)
(Note 4)
(Note 5)
3
4
6
7
3
4
Units
mV
max
Jl-V/·C
Input Bias Current
2.5
3
6
3
5
5
6
Jl-A
max
Input Offset Current
150
350
800
350
600
1500
1900
na
max
Input Offset Current
Average Drift
0.3
nArC
20
kO
Input Resistance
Differential
Input CapaCitance
6.0
Large Signal
Voltage Gain
VOUT = ±10V,
RL = 2 kO (Note 11)
Input Common-Mode
Voltage Range
Supply = ± 15V
RL = 10kO
Supply = +5V
(Note 6)
pF
7.5
5.0
7.5
6.0
5.5
5.0
+14.0
+13.9
+13.8
+13.9
+13.8
+13.8
+13.7
V
min
-13.6
-13.4
-13.2
-13.4
-13.2
-13.3
-13.2
V
min
4.0
3.9
3.8
3.9
3.8
3.8
3.7
V
min
1.4
1.6
1.8
1.6
1.8
1.7
1.8
V
max
10.5
V/mV
min
38
Common-Mode
Rejection Ratio
-10V';; VCM ,;; +10V
102
88
82
88
84
80
78
dB
min
Power Supply
Rejection Ratio
±10V,;; V± ,;; ±16V
104
88
82
88
84
80
78
dB
min
Output Voltage
Swing
Supply = ± 15V
and RL = 2.kO
+14.2
+13.5
+13.3
+13.5
+13.3
+13.4
+13.3
V
min
-13.4
-13.0
-12.7
-13.0
-12.8
-12.9
-12.8
V
min
3-690
r-
s::
en
DC Electrical Characteristics (Note 3) (Continued)
LM6165
Parameter
Conditions
LM6265
....en
U1
......
LM6365
Tested
Design
Tested
Design
Tested
Design
Limit
Limit
Limit
Limit
Limit
Limit
(Note 4)
(Note 5)
(Note 4)
(Note 5)
(Note 4)
(Note 5)
3.5
3.3
3.4
3.3
Typ
r-
Units
s::
en
I\)
Output Voltage
Supply = + 5V and
Swing
RL = 2 kfi (Note 6)
4.2
3.5
en
U1
V
3.3
1.3
min
1.7
1.9
1.7
1.9
1.8
V
2.0
Output Short
Source
65
max
30
25
30
25
30
Sink
65
30
5.0
U1
min
25
30
25
30
mA
20
Supply Current
s::
en
(0)
en
mA
20
Circuit Current
......
r-
min
6.5
6.7
6.5
6.9
6.8
mA
6.8
max
AC Electrical Characteristics (Notes 3 & 7)
LM6165
Parameter
Gain-Bandwidth
Conditions
@F =
20 MHz
Typ
725
LM6365
Design
Tested
Design
Tested
Design
Limit
Limit
Limit
Limit
Limit
Limit
(Note 4)
(Note 5)
(Note 4)
(Note 5)
(Note 4)
(Note 5)
575
425
500
400
575
Units
MHz
350
Product
Slew Rate
LM6265
Tested
Supply = ±5V
500
Av = +25 (Note 10)
300
min
200
200
180
200
180
V/)J-s
180
Power Bandwidth
Setting Time
min
Supply = ±5V
200
VOUT = 20Vpp
4.5
MHz
80
ns
45
Deg
10V Step to 0.1
%
Av = - 25, RL = 2 kfi
Phase Margin
Av = +25
Differential Gain
NTSC, Av = + 25
<0.1
%
Differential Phase
NTSC, Av = +25
<0.1
Deg
Input Noise Voltage
F=
10kHz
5
nV/y'Hz
input Noise Current
F=
10kHz
1.5
pAly'Hz
Note 1: Continuous short-circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 1500C.
Note 2: The typical junction-to-ambient thermal resistance of the molded plastic DIP (N) is 105°C/Watt, and the molded plastic SO (M) package is I 55°C/Watt, and
the cerdip (J) package is 125°C/Watt. All numbers apply for packages soldered directly into a printed circuit board.
Note 3: Unless otherwise specified, all limits guaranteed for Ta = Ti = 25°C with supply voltage = ± 15V, VCM = OV, and RL ;" 100 kil. Boldface lim"s apply
over the range listed under "Operating Temperature Range".
Note 4: All limits guaranteed at room temperature (standard type face) and at temperature extremes (bold type face). All limits are 100% production
tested.
Note 5: All limits guaranteed at room temperature (standard type face) and at temperature extremes (bold type face). All limits are guaranteed via
correlation using standard Statistical Ouality Control (SOC) methods.
Note 6: For single supply operation, the following conditions apply: V + = 5V, V - = OV, VCM = 2.5C, Your = 2.5V. Pin I & Pin 8 (Vas Adjust) are each
connected to Pin 4 (V-) to realize maximum output swing. This co~neclion will degrade Vas.
Note 7: CL ,;: 5 pF.
Note 8: In order to achieve optimum AC performance, the input stage was designed without protective clamps. Exeeding the maximum differential input voltage
results in reverse breakdown of the base-emitter junction of one of the input transistors and probable degradation of the input parameters (especially Vas. los, and
Noise).
Note 9: The average voltage that the weakest pin combinations (those involving Pin 2 or Pin 3) can withstand and still conform to the datasheet limits. The test
circuit used consists of the human body model of 100 pF in series with 1500il.
Note 10: VIN = 0.7V step. For supply = ±5V, VIN = 0.2V step.
Note 11: Voltage Gain is the total output swing (20V) divided by the input signal required to produce that swing.
Nole 12: The voltage between V+ and either input pin must not exceed 36V.
3-691
•
Typical Performance Characteristics RL =
Supply Current vs
Supply Voltage
10 kO, TA = 25°C unless otherwise specified
Common-Mode
Rejection Ratio
120
lD'
'2~CC
~
-
f-55CC
o
100
~
'125CC f--
Power Supply
Rejection RatiO
140
120
B
100
~
1\
80
!o
\
~
POSITIVE
NEGATIVE
80
~
40
1
20
40
o
o
20
2
(
6
8
W
~
~
~
~
10
100
lk
t SUPPLY VOLTAGE
i'
Gain-Bandwidth
Product
1100
1000
1
t;
5
IE
800
I
600
SOD
400
~
300
200
~
VI
'25CC
I/' -I
-
i-""T"
/
100
2
(
6
IF
!
...i!!
1
1
....
8
10 12 14 16 18
ipD
"
30
25
I
"'
10
1
10pF lOOp!"
~.
g
\\
I:
NE~nok\
\
r--...
IV
o
10nf lOOnF 1}'1"
lOp!"
I
I
~-
"",
Ij~F = 1 pF
/1
~ p-j+25CC
6:::: ...... i,..-- io""".125CC
~
~ 1/
I /
\.
lOOp!"
1 nF
'I
10nF
o
loonF
2
4
Output Impedance
(Open-Loop)
I
10k
t
~
.......
~
~
;!
lk
~
5
5
8
10 12 14 16 18
Gain vs Supply Voltage
16
lOOk
&
6
t SUPPLY VOLTAGE (V)
LOAD CAPAClTAHCE
~
x
10nF loonF 1}'1"
Slew Rate
400
Vs = t15V
Av =.25
RF = 2kD.
1
10
1nf
LOAD CAPACITANCE
Overshoot vs
Capacitive Load
cF = oPy/
1M
.....
100
~
TEIIPERATURE (CC)
"'\. POSITIVE
10pF loopF 1 nF
t;
-55-55-155 25 45 65 85105125
Vs = t15V
o
-
Vs = t15V
VD = tiDY
o
10k lOOk
Vs = t15V
30
10
lk
Gain-Bandwidth Product vs
Load CapaCitance
1000
20
1
1
1
Slew Ratevs
Load CapaCitance
\
100
.::;~
~
40
t SUPPLY VOLTAGE (V)
400
10
10M
FREQUENCY (Hz)
IR
50
....
~
'I25CC
1M
Propagation Delay,
Rise and Fall Times
60
I,.;'
-55CC
700
70
1
J
t Saturation Voltage
~
......
9
0
lD'
'" GAIN
30
20
100
I
I
40
!:lg
Voltage Gain vs
Load Resistance
360
450
IG
100M
~
~
III
~
>
~
en
I
!:l
0
9
~
0
70
60
50
"CJlII,:::t:::ttt111
1J.IlJU.f:sit~'
+25
+125
90
80
r;;....
,.
40
30
rr-
20
ID
D
D.I
10
100
FREQUENCY (H.)
LOAO RESISTANCE (kll)
>t Output Saturation Voltage
Bias Current vs
Common-Mode Voltage
5
E
III -I~~~~~~~~~
I
;:!
2
4
6
8
10
12 14
:I SUPPLY VOLTAGE (V)
16
18
RL = 2kll
V"
2
4
6
8
10
12 14
:I SUPPLY VOLTAGE
16
18
o
-15 -10
10-
-
250C
-
I
1
V"L......L-.J.....-'--'-....L..--'---'--'
-5~OC
-
~ ~r-+-+-~~-+~--r-1
I
1250C
-s
0
5
10
15
COMMON-MODE VOLTAGE (V)
TL/H/9152-10
3-694
,-----------------------------------------------------------------------------, r
s:
en
Applications Tips
......
The LM6365 has no frequency compensation, but is stable
for gains of 25 or greater (over the specified ranges of temperature, power supply voltage, and load). The LM6365 and
LM6364, specified in separate datasheets, are compensated versions of the LM6365. The LM6361 is unity·gain stable, while the LM6364 is stable for gains as low as 5. The
LM6361, and LM6364 have the same high slew rate as the
LM6365, typically 300 V/ p.s.
design. 0.01 p.F to 0.1 p.F ceramic capacitors should be
used (from each supply "rail" to ground); an additional
2.2 p.F to 10 p.F (tantalum) may be required for extra noise
reduction.
Keep all leads short to reduce stray capacitance and lead
inductance, and make sure ground paths are low-impedance, especially where heavier currents will be flowing.
Stray capacitance in the circuit layout can cause signal coupling between adjacent nodes, and can cause circuit gain to
unintentionally vary with frequency.
Breadboarded circuits will work best if they are built using
generic PC boards with a good ground plane. If the op amps
are used with sockets, as opposed to being soldered into
the circuit, the additional input capacitance may degrade
circuit performance.
To use the LM6365 for gains less than 25, a series resistorcapacitor network should be added between the input pins
(as shown in the Typical Applications, Noise Gain Compensation) so that the high·frequency noise gain rises to at least
25.
Power supply bypassing will improve stability and transient
response of the LM6365, and is recommended for every
Typical Applications
Offset Voltage Adjustment
Noise-Gain Compensation
v+
RF
~~
lOOk
v+
>---VOUT
TUH/9152-11
Tl/H/9152-12
Y.'lT • 25 MHz
+ RF (1 + R1/R2)l = 25 Rx
RxCX :;"
IR1
1 MHz Voltage-to-Frequency Converter
(fOUT = 1 MHzforVIN = 10V)
lOOp'
O-lOV INPUT ~M"""'VIIIt-""'-""-I
>"'~Mr-"'-*-- Output
f/--lI4--~ It,1385-2.5
2.2J.1'
Offset
Adjust
Tl/H/9152-13
3-695
en
c.n
.......
r
s:
en
N
en
c.n
.......
r
s:
en
Co)
en
c.n
~
,....
~
CD
:::!!!
....I
r------------------------------------------------------------------------------------,
~National
~ Semiconductor
LM6313 High Speed,
High Power Operational Amplifier
General Description
Features
The LM6313 is a high-speed, high-power operational amplifier. This operational amplifier features a 35 MHz small signal bandwidth, and 250 V/,...s slew rate. A compensation pin
is included for adjusting the open loop bandwidth. The input
stage (A 1) and output stage (A2) are pinned out separately,
and can be used independently. The operational amplifier is
designed for low impedance loads and will deliver
± 300 mA. The LM6313 has both overcurrent and thermal
shutdown protection with an error flag to Signal both these
fault conditions.
•
•
•
•
•
•
•
•
These amplifiers are built with National's VlpTM (Vertically
Integrated PNP) process which provides fast PNP transistors that are true complements to the already fast NPN devices. This advanced junction-isolated process delivers high
speed performance without the need for complex and expensive dielectric isolation.
Connection Diagram
Applications
•
•
•
•
•
•
1.lk
16
A2 INPUT
15 COMPo
+Vs
A2 OUTPUT
14 AI OUTPUT
13
'-Vs
12 '-V
11
s
-INPUT
10
+INPUT
-Vs
'-Vs
'-Vs
GND
High speed ATE pin driver
Data acquisition
Driving capacitive loads
Flash A-D input driver
Precision 500-750 video line driver
Laser diode driver
Typical Application
Dual-In-Line Package
N/C
FLAG
250. V/,...s
High slew rate
35 MHz
Wide bandwidth
Peak output current
± 300 mA
Input and output stages pinned out separately
Single or dual supply operation
Thermal protection
Error flag warns of faults
Wide supply voltage range
± 5V to ± 15V
8
-
N/C"
TLlH/l0S21-2
TL/H/l0S21-1
Top View
Order Number LM6313N
See NS Package Number N16A
-Heat sink pins
See Nole 5 and Applications.
"'00 not ground or otherwise connect to this pin.
3-696
Absolute Maximum Ratings (Note 1)
Total Supply Voltage ( + Vs to - Vs)
36V(±18)
Al Differential Input Voltage (Note 2)
±7V
(V+ -0.7) to (V- -7V)
A1 Input Voltage
A2 Input to Output Voltage
±7V
A2 Input Voltage
Flag Output Voltage
Short-Circuit to Ground
Storage Temperature Range
Lead Temperature (Soldering, S seconds)
ESD Tolerance (Note 4)
Pins 10 and 11
All Other Pins
Operating Temperature Range
LM6313N
Thermal Derating Information (Note S)
IJJA
TJ (Max)
±Vs
GNDto +Vs
(Note 3)
-6S'C,;; T,;; +lS0'C
260'C
±600V
±lS00V
O'Cto 70'C
40'C/W
12S'C
Operational Amplifier DC Electrical Characteristics
Unless otherwise specified, all limits
guaranteed for TA = 2S'C, and Supply Voltage Vs = ±lSV. Boldface limits apply at temperature extremes. VCM = OV,
Rs = son, the circuit configured as in Figure 1.
Symbol
Parameter
Conditions
Typical
2S'C
Limit
O'Cto70'C
Limit
Units
20
22
mV(Max)
Vas
Input Offset Voltage
S
I;.VoslIH
Average Input Offset
Voltage Drift
10
Ib
Input Bias Current
2
S
7
/LA (Max)
los
Input Offset Current
O.lS
1.S
1.9
/LA (Max)
I;.los/I;.T
Average Input Offset
Current Drift
0.4
nAl'C
RIN
Input Resistance
Differential
32S
kn
CIN
Input Capacitance
Av = +l,f = 10MHz
2.2
pF
VCM
Common-Mode
Voltage Range
AVl
AV2
Voltage Gain 1
Voltage Gain 2
RL=lkn,Vo= ±10V
RL = son, Va = ±8V
CMRR
Common-Mode
Rejection Ratio
-10V';; VCM ,;; +10V
PSRR
Power Supply
Rejection Ratio
±SV,;; Vs';; ±16V
Val
V02
V03
Output Voltage Swing 1
Output Voltage Swing 2
Output Voltage Swing 3
Is
Supply Current
Isc
Peak Short-Circuit Output
/Lvrc
+14.2
-13.2
+13.8
-12.8
+13.7
-12.7
V (Min)
6000
SOOO
2S00
2000
2000
1500
VIV(Min)
90
72
70
dB (Min)
90
72
70
dB (Min)
RL = 1 kn
RL = lOOn
RL = son
13.1
12.0
11.0
11.8
10.S
9.0
11.2
10.0
±V(Min)
TJ = O'C
TJ = 2S'C
TJ = 12S'C
18
23
(See Figure:1)
300
24
"8-
10
mA(Max)
21
--
8.5
Al
+
A2
2
16
14
FIGURE 1
3-697
TL/H/10521-3
mA
&I
Electrical Characteristics (Continued)
Operational Amplifier AC Electrical Characteristics
Unless otherwise specified, all limits
guaranteed for TA = 25·C, and Supply Voltage Vs = ±15V. Boldface limits apply at temperature extremes. VCM = OV,
Rs = 500, the circuit configured as in Figure 1.
Symbol
GBW
Parameter
Conditions
Gain-Bandwidth Product
Typical
Units
@f= 30 MHz
35
MHz
V/p.s
MHz
SR
Slew Rate
Av = -1, RL = 500 (Note 6)
250
PBW
Power Bandwidth
VOUT = 20Vpp
3.0
Is
Settling Time
1OV Step to 0.1 % (See Figure 2)
200
ns'
Phase Margin
Av = -1, RL = 1 kO, CL = 50 pF
53
Deg
0.1
%
Differential Gain
0.1
Deg
en
Input Noise Voltage
f=10kHz
14
nVlv'Hz
in
Input Noise Current
f=10kHz
1.8
pAlv'Hz
Differential Phase
A1 DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TA = 25·C, and
Supply Voltage Vs = ± 15V. Boldface limits apply at temperature extremes. VCM = OV, Rs = 500.
Parameter
Conditions
Typical
2S·C
Limit
O·Cto 70"C
Limit
Units
AVOL
Large Signal Voltage Gain
VOUT = ±10V, RL = 2 kO
VOUT = ± 10V, RL = 00
650
6000
300
2500
250
2000
V/v(Min)
CMRR
Common-Mode
Rejection Ratio
-10V
90
72
70
dB (Min)
PSRR
Power Supply
Rejection Ratio
±5V
90
72
70
dB (Min)
Isc
Output Short
Circuit Current
±60
±30
±25
mA(Min)
Symbol
~
~
VCM
±Vs
~
~
+10V
+16V
A 1 AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TA = 25·C, and
Supply Voltage Vs = ± 15V. Boldface limits apply at temperature extremes. RS = 500.
Symbol
Parameter
Conditions
Typical
2S·C
Limit
Units
GBW
Gain-Bandwidth
f = 30 MHz
37
25
MHz (Min)
SR
Slew Rate
Av = +1, RL = 100 kO, ±4 VIN,
± 2VOUT
250
150
V/p.s (Min)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. For guaranteed specifications and test conditions. see the
Electrical Characteristics. The guaranteed specifications apply only for the test condition listed. Some performance characteristics may degrade when the device is
not operated under the listed test conditions.
Note 2: In onder to achieve optimum AC performance. the input stage was designed without protective clamps. Exceeding the maximum differential input voltage
results in reverse breakdown of the base-emitter junction of one of the input transistors. Degradation of the input parameters (especially Vos, los, and Noise) is
proportional to the level of the externally limited breakdown current and the accumulated duration of the breakdown condition.
Note 3: Continuous short-circuit operation of AI at elevated temperature can result in exceeding the maximum allowed junction temperature of 125"C. A2 contains
current limit and thermal shutdown to protect against fault conditions. The device may be damaged by shorts to the supplies.
Note 4: Human body model, C = 100 pF, Rs = 1500n.
3-698
Electrical Characteristics (Continued)
A2 DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T A
± 15V. Boldface limits apply at temperature extremes. Rs = 500.
Supply Voltage Vs
=
Symbol
Parameter
Voltage Gain 1
RL
AV2
Voltage Gain 2
RL
VOS
Offset Voltage
RL
Ib
Input Bias Current
=
=
1 kO
RL
=
=
RL
=
500
RIN
input Resistance
CIN
Input Capacitance
Ro
Output Resistance
lOUT
Vo
Voltage Output Swing
RL
RL
RL
25'C
Limit
O'Cto 70'C
Limit
Units
1 kO, RS
=
=
±10V
0.99
0.97
0.95
V/mV(Min)
±10V
0.9
0.85
0.82
VIV(Min)
15
70
100
=
mV(Max)
1
6
8
I-'A(Max)
10 kO
MO
5
pF
3.5
Power Supply
Rejection Ratio
PsRR
1 kO, VIN
500, VIN
Vs
=
=
=
=
=
±10 mA
1 kO
1000
500
±5Vto ±16V
3.5
5.0
8.0
o (Min)
13.7
12.5
11.0
13.0
10.5
9.0
12.7
10.0
8.5
V (Min)
70
60
50
dB (Min)
A2 AC Electrical Characteristics
Supply Voltage Vs
Symbol
=
Unless otherwise specified, all limits guaranteed for T A
± 15V. Boldface limits apply at temperature extremes. Rs = 500.
Parameter
Typical
Conditions
=
=
25'C, and
Typical
Conditions
AV1
=
=
=
sR1
SR2
Slew Rate 1
Slew Rate 2
VIN
VIN
BW
-3 dB Bandwidth
VIN = ± 100 mVpp
RL = 500, CL :s; 10 pF
tr ,
tf
Rise Time
Fall Time
RL
Vo
=
=
Po
Propagation Delay
RL
Vo
= 500, CL :s;
= 100mVpp
Overshoot
RL
RL
=
=
±11V, RL
± 11V, RL
1 kO
500 (Note 7)
1 kO, CL :s; 10 pF
100 mVpp
10 pF
1 kO, CL = 100 pF
500, CL = 1000 pF
25'C
Limit
1200
750
550
65
30
=
25'C, and
Units
V/I-'s (Min)
MHz (Min)
8
ns
4
ns
13
21
%
Additional (A2) Electrical Characteristics
TA
=
25'C, and Supply Voltage Vs
Symbol
Parameter
=
Unless otherwise specified, all limits guaranteed for
± 15V. Boldface limits apply at temperature extremes.
Conditions
VOL
Flag Pin Output
Low Voltage
ISINK Flag Pin
IOH
Flag Pin Output
High Current
VOH Flag Pin
=
=
500 I-'A
15V (Note 8)
Typical
25'C
Limit
O'C to 70'C
Limit
Units
220
340
400
mV(Max)
0.01
10
20
I-'A(Max)
Note 5: For operation at elevated temperature, these devices must be derated to insure TJ ,;; 12S"C. TJ ~
to the PCB, is 40"C/W when pins 4, S, 12 and 13 are soldered to a total of 2 in2 of copper trace.
TA + (Po x 9JAJ. 9JA for the N package mounted flush
Note 6: Measured between ± SV.
Note 7: VIN ~ ± 9V step input, measured between ± SV out.
Note 8: The error flag is set during current limit or thermal shut-down. The flag Is an opan collector, Iowan fault.
3-699
•
.... ,---------------------------------------------------------------------------------,
~
~
CD
::e
....I
Simplified Schematic
v+
L------------Al----------~
TLlH/10521-4
Settling Time Test Circuit
2k
MAXIMUM CURRENT
.s JUNCTION TEMPERATURE
550
1....
..,z
'"'"::J
i
Ii;
ili
"
So
~
ill
II
10
1
1
10
100
100
1000
lk
10k lOOk
CuwJ (pF)
18
16
I
-
-55'1:
--
1
o
-15 -10
25'1:
---
!
!
-
0
lD
5
10
....
"..
14
-
Power Supply Rejection
90
!z
~
12
iil
10
?:i
~
~
i
'"
o
o
15
110
-
70
~
Input Noise Voltage
40
lk
¥
"-
100
.,--
10
1
10
100
lk
10k
lL
1011(
lk
10k
-
0
1011(
1
100
60
100
90
1
110
70
60
50
8D
r.e,a-l
1ii'
i=Cc = 20pF
~
~
~
1\
20
10
I IIIII
1
100
'1. (PF) lit. = lDIIII
1000
ill
,
30
~
~
~
o
lDk
lOOK
1M
10M
FREQUENCY (Hz)
1M
lOOK
"
10
100
GBW and Phase Margin
vs Comp Cap
¥
40
111111
COMPENSATION CAPAaTANCE (pF)
CMR vs Frequency
Cc=5pF
GI1W i\I
lD
100
FREQUENCY (Hz)
Gain-Bandwidth, Phase
Margin vs Comp Cap
and Load Cap
1
~
10
FREQUENCY (Hz)
.
10k
",
"-
§!
NEGAIt
Slew Ratevs
Compensation
200
'>
~ 1000
'"
FREQUENCY (Hz)
Input Noise Current
.5-
pL~
I
30
1000
III
~
-
r-
50
TOTAL SUPPLY VOLTAGE (V)
lD.ooo
II
....
60
4 8 12 16 20 24 28 32 36 40
COMMON-MODE VOLTAGE (V)
100
FREQUENCY (MHz)
?:i
125'1:
-5
10M
Supply Current vs
Supply Voltage
5
~
1M
FREQUENCY (Hz)
Bias Current vs
Common-Mode Voltage
III
10
~
100M
90
70
50
40
30
20
40
30
20
~
lD
7
5
4
3
1
1
g
~
~
~
2345710
20 30405070100
COMPENSAl1ON CAPACITOR (pF)
TLIHll0521-8
3-701
•
.... r-------------------------------------------------------------------------------------,
~
:5~
Typical Performance Characteristics A 1 Only
=
(Unless otherwise specified, TA
25°C, Vs
=
Gain vs Supply Voltage
-
1000
~
800
~
~
~
~
180
70
,-
so
I
~
40
-55"1:
9
20
~
10
0
4
6
8
225
270
30
"0
I
J
I
200
2
60
lD"
S
25"C
"...
<100
§
~
".
600
Gain-Bandwidth and
Phase Margin vs
Load
10 kO.)
Bode Plot
-
I
=
±15V, and RL
315
360
10 12 14 16 18
100
lk
10k lOOk
SUPPLY VOLTAGE (tV)
1M
...,. i'
~ ~
~
~ ~
i
i
~
i~
z
15
~
f
10
10M 100M
V+
Output Resistance
(Open Loop)
V+
lM~~
RL = 2k4
1
1
lillOk~~
tl
~
I- I1
1
Yo
Yo
6 8 W ~ U
SUPPLY VOLTAGE (tV)
~
~
~
S
:
4
10,000
1000
'1.0A0 (pr)
Common-Mode Input
Saturation Voltage
Output Saturation Voltage
2
100
fREQUENCY (Hz)
246
W
8
~
~
U
~
i looE
lk~'~\~I!
lk
10k
lOOk
SUPPLY VOLTAGE (tV)
1M
111M
100M
fREQUENCY (Hz)
TL/H/l0521-9
Typical Performance Characteristics A2 Only
=
(Unless otherwise specified, TA
25°C and Vs
=
Slew Rate vs
Supply Voltage
.Yf -
1<100
~ 1000
I
z:.800
i
1\ = lk4
1<100
200
11
11
9
o
6 8 W ~ U
Supply Voltage (tV)
024
o
~
Bandwidth vs
Supply Voltage
90
i'
I
60
30
RL
~
RL = 504
2
V
4
6
8
W
~
U
Supply Voitago (tV)
r
~
~
10
1000
900
RL = 504
800
.....
700
ti-
~
-so -25
25 50 75 100 125 ISO
Junction Temperature ("1:)
12
0
Gain and Phase
Shift (RL = 50n)
o
1
\
\
/
'iii'
S
\
~
\
-10
11111"Galn
-2
J
I'
o
= 1M
/
II
/
7 so
a
1 1
1 1
6
10
Input Amplitude (tV)
.....t:
V
J'"
2
RL =lk4:::
J...oo'
70
o
.s
:
V"RL = 504
",.
r-.. .......
RL=lk4
z:.
J/'I
./
~
-I-
,.....,
~
~ 1100 /
Overshoot vs
Capacitive Load
I
80
1/
/
I-.L
1200
V1\=lk4
200
~
1300
YI
1000
i 800
& .tOO
V 1\ = 504
.tOO
g:
Slew Rate vs
Temperature
l..k
1200
~800
Y
600
~
Slew Rate vs
Input Amplitude
II
1200
±15V.)
'Ph~ ~
-3
-4
1000
Load Capacftance (pr)
10000
e
-40 '"
-S
-50
-6
-60
-7
-70
-II
100
-20 :-30 ~
1M
111M
~
f.
-80
100M
frequency (Hz)
TL/H/l0521-10
3-702
Application Hints
The LM6313 is a high-speed, high power operational amplifier that is designed for driving low-impedance loads such
as 50n and 75n cables. Available in the standard, low cost,
16-pin DIP, this amplifier will drive back terminated video
cables with up to 10 Vp-p. The ability to add additional compensation allows the LM6313 to drive capacitive loads of
any size at bandwidths previously possible only with very
expensive hybrid devices.
The LM6313 is excellent for driving high-speed flash A-to-D
converters that require low-impedance drive at high frequencies. At 1 MHz, when used as a buffer, the LM6313
output impedance is below 0.1 n. This very low output impedance also means that cables can be accurately backterminated by just placing the characteristic impedance in
series with the LM6313 output.
OVER-VOLTAGE PROTECTION
If the LM6313 is being operated on supply voltages of greater than ±5V, the possibility of damaging the output stage
transistors exists. At higher supply voltages, if the output is
shorted or excessive power dissipation causes the output
stage to shut down, the maximum A2 input-to-output voltage, can be exceeded. This occurs when the input stage
tries to drive the output while the output is at ground. To
prevent this from happening, an easy solution is to place
diodes around the output stage (See Figure 4). This will
limit the maximum differential voltage to about 1.3V. Any
signal diode, such as the 1N914 or the 1N4148 will work
fine.
TL/H/10521-11
FIGURE 4
SUPPLY BYPASSING
Because of the large currents required to drive low-impedance loads, supply bypassing as close as possible to the
I.C. is important. At 50 MHz, a few inches of wire or circuit
trace can have 20n or 30n of inductive reactance. This
inductance in series with a 0.1 ,...F bypass capacitor can
resonate at 1 MHz to 2 MHz and just appear as an inductor
at higher frequencies. A 0.1 ,...F and a 1O,...F to 15 ,...F capacitor connected in parallel and as close as possible to the
LM6313 supply pins, from each supply to ground, will give
best performance.
SELECTION OF COMPENSATION CAPACITOR
The compensation pin, pin 15, makes it possible to drive
any load at any closed loop gain without stability problems.
In most cases, where the gain is -1 or greater and the load
is resistive, no compensation capacitor is required. When
used at unity gain or when driving reactive loads, a small
capacitor of 5 pF to 20 pF will insure optimum performance.
The easiest way to determine the best value of compensation capacitor is to temporarily connect a trimmer capacitor
(typical range of 2 pF to 15 pF) between pin 15, and ground,
and adjust it for little or no overshoot at the output while
driving the input with a square wave.
If the actual load capaCitance is known, the typical graphs
"Gain-Bandwidth and Phase Margin vs. Load Capacitance"
can be used to select a value.
VIDEO CABLE DRIVER
The LM6313 is ideally suited for driving 50n or 75n cables.
Unlike a buffer that requires a separate gain stage to make
up for the losses involved in termination, the LM6313 gain
can be set to 1 plus the line losses when the transmission
line is end-terminated. If back-termination is needed, adding
the line impedance in series with the output and raising the
gain to 2 plus the expected line losses will provide a 0 dB
loss system. Figure 5 illustrates the back and end terminated video system including compensation for line losses. The
excellent stability of the LM6313 with changes in supply
voltages allow running the amplifier on unregulated supplies. The typical change in phase shift when the supplies
are changed from ± 5V to ± 15V is less than 3' at 10 MHz.
HEAT SINKING
1.1k
When driving a low impedance load such as 50n, and operating from ± 15V supplies, the internal power dissipation of
the LM6313 can rise above 3W. To prevent overheating of
the chip, which would cause the thermal protection circuitry
to shut the system down, the following guidelines should be
followed:
1. Reduce the supply voltage. The LM6313 will operate
with little change in performance, except output voltage
swing, on ± 5V supplies. This will reduce the dissipation
to the level where no precautions against overheating
are necessary for loads of 1on or more.
2. Solder pins 4, 5, 12 and 13 to copper traces which are at
least 0.100 inch wide and have a total area of at least 2
square inches, to obtain a ()JA of 40'C/W. These four
pins are connected to the back of the chip and will be at
V -. They should not be used as a V - connection unless pin 3 is also connected to this same point.
3-703
TL/H/10521-12
FIGURE 5
.... r----------------------------------------------------------------------------,
~ Application Hints (Continued)
:i LASER DIODE MODULATOR
CAPACITIVE LOAD DRIVING
~
Figure 6 is a minimum component count example of a video
modulator for a CW laser diode. This example biases the
diode at 200 mA and modulates the current at ± 200 mA per
volt of signal. If it is desired to reduce power consumption
and ± 5V supplies are available, all that is necessary is to
change R2 to 5 kfl and R4 to 15fl.
Figure 7 is the circuit used to demonstrate the ability of the
LM6313 to drive capacitive loads at speeds not previously
possible with monolithic op amps.
+15V
10k
R4
lk
6Sn. 5W
TUH/10521-14
FIGURE 7
-15V
TUH/10521-13
FIGURE 6
In photo 1, CL is 1000 pF. The LM6313 is slewing at
250 V/p.s, from -5V to +5V. The slew rate is 450 V/p.s
from
5V to -5V. This requires 'the op amp to deliver
450 mA into the load and remain stable.
-+
In photo 2, CL is changed to 1 p.F. Under these conditions,
the op amp is forced into current limiting. Here the current is
internally limited to about ± 400 mA. Note the rapid and
complete recovery to normal operation at the end of slewing.
+10V
+10V
-10V
-10V
TL/H/l0521-16
Photo 1
TL/H/l0521-15
Photo 2
3-704
r------------------------------------------------------------------------,
~National
r
3:
-"
Co)
o
CD
o
~ Semiconductor
LM13080
Programmable Power Operational Amplifier
General Description
The LM130BO is an internally compensated medium power
operational amplifier designed for use in those applications
requiring load currents of several hundred milliamperes.
This amplifier has the added advantage of having an input
stage programmed with an external resistor. The user is
able to optimize the amplifier performance for each individual application with this feature. Applications include servo
amplifiers and drivers, high input impedance audio amplifiers, DC-to-DC converters, precision power comparators
which can either sink or source current and motor speed
controls.
By selecting the proper input stage bias resistor it is possible to tailor the performance of the input stage to meet the
needs of any particular system. Trade-ofts between input
offset voltage, input bias current and gain bandwidth are
easily made.
An unusual feature of the LM130BO is an electronic shutdown capability.
Features
•
•
•
•
•
•
The LM130BO may be powered from either single or dual
power supplies, and will operate from as little as 3V.
As a power operational amplifier, the LM130BO is capable of
delivering 0.25A to a load. This feature allows the system
designer to fulfill his medium power circuit requirements
without having to add external current boost transistors to
the output of a standard operational amplifier.
High output current-250 mA
Externally programmable input stage
Low power supply operation-3V
Electronic shut-down capability
Internally compensated for unity gain
Low input bias current
Schematic Diagram
y+
0.2.11
6
INPUT BIAS 0 7
:....._ _+4....-1
(RS£I)
,.,.--Y-'U OUTPUT
TLlHI797B-2
Connection Diagram
Dual-In-Line Package
Ne
-INPUT
Order Number LM 13080N
See NS Package Number N08E
INPUT BIAS
IRSET}
OUTPUT BIAS
+INPUT
GNO
4
OUTPUT
TOPYIEW
3-705
Tl/HI797B-l
•
Absolute Maximum Ratings
Input Voltage Range (Note 3)
Input Current (VIN :s; -0.3V) (Note 4)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage Operation Range
3Vto 15V
±1.5Vto ±7.5V
Power Dissipation (Note 1)
1250mW
Differential Input Voltage (Note 2)
Parameter
12V, RSET
20mA
O·Cto +70·C
- 65·C to + 150·C
300·C
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
ESD rating to be determined.
15V
Electrical Characteristics Vs =
-0.3Vto +15V
=
6aOk,O·C :s; TA :s; 70·C, unless otherwise specified
Conditions
Min
Typ
Max
Units
Input Offset Voltage
TA = 25·C (Note 5)
±3
±7
mV
Input Bias Current
= 25·C
IIN(+1 - IIN(-), TA = 25·C
RL = 00, TA = 25·C (Note 6)
Vs = ±6V, TA = 25·C (Note 1)
RL = 50n
RL = an
RL = 50n
RL = an
Vs = ±6V, RL = 50n,
f = 100 Hz, TA = 25·C
Vs:S; 15V, TA = 25·C
100
400
nA
±30
±75
nA
3
6
mA
-4.5
-2
V
V
V
V
Input Offset Current
Supply Current
Output Voltage Swing
VOH
VOL
Large Signal Voltage Gain
Input Common-Mode
Voltage Range
Input Offset Voltage
IIN(+)or IIN(-), TA
(Note 3)
4.5
2
5
-5
3
1
(Note 5)
Input Offset Voltage Drift
V/mV
10
Vs-1.5
V
±10
mV
5
p'vrc
Input Bias Current
IIN(+)oriIN(-)
600
Input Offset Current
IIN(+) - IIN(-)
±150
Input Offset Current Drift
50
=
=
Supply Current
RL
Output Voltage Swing
Vs
±6V (Note 1)
RL = 50n
RL = an
RL = 50n
RL = an
VOH
VOL
00
(Note 6)
-4
-1.6
3-706
nA
nA
pArc
a
mA
4
1.6
V
V
V
V
r-
Electrical Characteristics Vs =
12V, RSEl = 6BOk, o·c s; TA s; 70·C, unless otherwise specified (Continued)
s::
.....
Co)
Q
Conditions
Min
Large Signal Voltage Gain
Vs = ±6V, RL = 50n, f = 100 Hz
1
Input Common-Mode
Voltage Range
Vs
Common-Mode Rejection Ratio
TA = 25·C
Total Harmonic Distortion
RL = an, Vo = 2 Vrms,
f = 1 kHz, TA = 25·C
Parameter
S;
15V (Note 3)
Typ
Max
Units
CO
Q
V/mV
1.25
Vs - 1.75
V
a5
63
dB
0.5
5
%
Note 1: For operation at high temperatures, the lM130BO must be derated based upon a maximum junction temperature of 150"C and a thermal resistance of
10rrC/W. The thermal resistance values given are for a still air ambient with the package soldered into a printed circuit board.
Note 2: Differential input voltages up to the magnitude Of the power supply voltage will not damage the input circuitry. However, input voltages outside the input
common-mode voltage range will not be able to properly control the output of the amplifier.
Note 3: The input voltage applied to either input should not be allowed to go more than O.3V below the potential applied to pin 4; however. either input can be taken
as high as 15V without causing damage to the circuillnput voltages below the minimum common-mode voltage range may cause a phase reversal in the outpul
Note 4: This input current will exist only when the voltage at either input lead is driven negative. It is due to the base-isolation junction of the PNP transistor tub
becoming forward biased and thereby acting as an input diode clamp. In addition to this diode action, there is also lateral NPN parasitic action on the Ie chip. This
transistor action can cause the output to take an undefined state for the time duration that an input is driven negative.
Note 5: Vo
=
=
6V, Rs
on, and over the full input common-mode voltage range.
Note 6: Supply current is measured with the amplifier connected in a unity gain follower configuration and the positive input set
to one-half of the supply voltage.
Typical Performance Characteristics
Slew Rate as Function
ofRSET
Z.4
AL" 50
2.0
~
1.6
w
,
...s...
~
C-
~
~
~
1.2
I
0.8
~
0.4
!!'
~
C-
.:::
.A-
I
U
lUk
'"
6
5
,.w
>~
_
:;
Z.O
1.5
1.0
0.5
0
-0.5
-1.0
-= -I.S
~ -2.0
I,~
IV
HSIT·'At.
~
.>Po (mWI SINKING
0
400
BOO
3
1
!!'
I
":':(:1
0.6
oA
0.2
0
St;
:gg;
S
..s
,.
, , , , ,SiNK.
6fD (SOURCING) " _6_V_
ISOURCE
400
>
"w
600
0
>,.
...,w
..-F"T
~08~N"
800
!
4
i
I--
;-
RSET = 6Bok
Rl = .....
5
~
2
%i
>.,
LM13080N
~:6Po (SINKING) '" -,6V-
1200
..
.§
2
1
U
25
50
15
2
IUD
~
><1
1200
.lPD (mW) SOURCING
10
~
B
;;
I
~
6
Q
w
u
,.
11:
5
TIME (m.1
12
14
LNtlNITEIHEATllNK
15 CfWILMl3Cl8DNTI
LMll~I~:~IN~
1.4~~l::~:;:~:\
.......
~:~::~~~: ~~~I.
.......
_\'1\\
l\'t"--
J
2
0
10 20 30 40 50 fiO 10 BD gO 100
lU
B
I. ALUMLNUMTHICKMESS-I/1&INCH
4
1
o
6
Device Dissipation vs
Ambient Temperature
9
0
-0.2
-0.4
-O.B
-0.11
4
Vs - POWER SUPPLY VOLTAGE (VI
Thermal Feedback Time
Constant
.Jd1r
I
~."
..
6
TA - AMBIENTTEMPERATURE I"CI
5~"'::
.
...'"
..
.!
lk
12
~
>
t;
~
I
I
I
:!l
>
a
lak
lib
lDDk
II1't1
1M
RSET - SET RESISTANCE (!I)
_
Voltage Gain as a Function
of RSET
rrr-~
111
3
z
..
~
.."
~
~
r--.
~
l-
to t-
t-
K
lOG
c·
.= DC
~
~
:i
1l1li
7a
co ZDD
~
&0
~
1M
10U
10
i
il'\.
20
I'\.
I
~
i
~
.
i.
I'\.
40
IUD
1k
12
~
BUD
-25
~
....c
iii
~
\
lao
la
11
I"
I
10k
1
lDBto
1M
Voltage Follower Pulse
Response (Large Signal)
~f.
>
Ii!
5E
.. >
...i'!
VS'"§!
75
Minimum Stable Closed
Loop Gain
1- FREQUENCY (Hz)
h
....
.. .
sa
I
111111 II
a
lk
....
-
g;
!::
SET,laOk
~~~r'IM
I
Voltage Follower Pulse
Response (Small Signal)
4D
-4
III
'-TIMEIotI
co
-
TA - AMBIENT TEMPERATURE rc)
r-
RSET"~llDk
5
10k lDDk 1M 10M
E~ -25
-50
7111
lao
~
• - FREQUENCY (Hz)
Ie
7&
r-
..~
1"-
~! : I-l-t'+-+-+-+-I-~;~ak
sa
VS=
~
la
25
la
.~
-20
1
t-
I'.....
I
D
Large Signal Frequency
Response
RSET ......
6D
lUG
TA - AMBIENT TEMPERATURE rc)
VS- <6V
RL =511!1
r- ~
!
~ 501
Small Signal Open Loop
Frequency Response
iii 1211
3
MAINTAIN
TJ,,;I&a"C
11100
;--
laa
-2&
11.
1M
Output Current Sinking
11.
~
RsET - SET RESISTANCE (llI
~
-
I
laak
!..
!!
390
I
~
MAINTAIN
TJ,,;lsa"C
-
6DO
;:
~
10k
1I0I0
RSET - SET RESISTANCE (II)
Output Current Sourcing
.!
!:: sa
:;
g;
..
11M
1M
RSET - SET RESISTANCE (n)
4a
6a
'-TIME"'~
III L.LJc.;.........:....._ ........::...........1111
lk
lak
IUD
lDBk
1M
,- FREQUENCY (Hz)
TLlH17978-3
3·708
r-----------------------------------------------------------------------------, r
s:
....
Application Hints
The LM13080 is a power op amp capable of sourcing or
sinking more than 250 mA and does not include internal
current limit or thermal shut-down. Therefore, the user must
make sure that his application will not cause the power dissipation rating of the package to be exceeded. The
LM13080 is rated at a maximum dissipation of 1250 mW at
25'C. For operation at temperatures above 25'C, the maximum dissipation must be derated using the equation:
TJ - TA
PD=--0JA
To employ electronic shut-down the output bias pin, pin 2,
and the negative end of the input bias resistor, RSEl, are
connected to the negative power supply (or ground in a single power system) through a saturated NPN transistor (or
other electronic switch). When the transistor is turned OFF,
all of the bias currents inside the op amp are turned OFF
and all input and output terminals will float. When first
turned ON, the output will take about 5 ,.,.S to reach the
correct level. To insure that the LM13080 is OFF, leakage in
the control device must be below the level that will allow
pins 2 and 7 to fall to O.4V below V+ .
where PD is the maximum allowable power dissipation, TJ is
the maximum junction temperature (150'C), TA is the ambient temperature and 0JA is the thermal resistance of the
package operated in a still air environment. 0JA for the
LM13080N is 100'C/W. For example, if the LM13080N is
used in free air in a 70'C ambient, the maximum power that
can be dissipated is:
Power supply rejection is a function of the change in voltage
across the input bias resistor, RSEl. To improve the PSRR
of the LM13080, the user must be careful to bypass pin 7 to
pin 6 or to establish a floating voltage referenced to the
positive power supply to serve as a connection point for
RSEl. In applications where PSRR is important, it is imperative that a supply bypass capacitor(s) be used.
Typical Applications
150'C - 70'C
PD =
100'C/W
= 800 mW
LINE DRIVER
The line driver circuit in Figure 1 is able to accept an unbalanced, high impedance input and convert it to a balanced
output suitable for driving a low impedance line. This is particularly useful in an environment where magnetically induced hum or noise pickup is a problem.
The LM13080 derives its ability to sink current through the
use of a composite NPN/PNP output configuration. This 10cal loop must be compensated by the series connection of a
0.05 ,.,.F capacitor and a 10.11 resistor between the output of
the op amp (pin 5) and the negative power supply (pin 4).
The RC does not just filter out the oscillation from the output
waveform but actually stabilizes the loop.
The outputs of the 2 LM 13080s are of oppOSite polarity;
therefore, terminating the line with a balanced load (i.e., a
differential amplifier or a transformer) will cause commonmode interference pickup to be cancelled.
This circuit will drive a 20 Vp-p signal into a 50.11 load for
frequencies up to 10kHz. Above 10kHz the output signal is
slew rate limited, but the line driver will still supply a 13 Vp-p
signal at 20 kHz. The voltage gain of the network is 2, and
the low frequency roll-off is determined by:
If the inputs of the LM13080 are driven below the input common-mode voltage range, it is possible that the output will
experience a phase reversal. This is particularly true for the
non-inverting input (VIN( + )). If either input is driven to a voltage level 0.3V below the substrate (pin 4) a paraSitic NPN
transistor will be turned ON. The emitter of this parasitic
transistor is the normal input transistor epi (N-type, base)
region, the base is the substrate (P-type) and the collector is
every other epi region on the die. Circuit operation in this
mode is unpredictable. If an input is forced below the substrate, the current flowing out of that input should be limited
to 20 mA to insure that the amplifier will not be destroyed.
Programming the LM13080 is accomplished by selecting
the value of RSEl, the input stage bias resistor, to optimize
the amplifier for each particular application. An example
would be an application with low source resistance which
requires a low offset voltage to make a precise DC measurement. By selecting an RSEl of 100 k.l1, the normal offset voltage would be reduced to approximately one-fourth
the value it would be if a 680k resistor was used. By studying the curves, it can be seen that the bias current will increase but an increase here has very little effect due to the
small source impedance. It should also be noted that with a
100k input set resistor the gain bandwidth product will also
increase, and in fact, the amplifier must be operated with a
closed loop voltage gain of 6 to assure stability.
It can be seen that if the load is connected directly between
the outputs of the amplifiers, the line driver becomes a simple bridge amplifier capable of delivering 2W into a 16.11
load.
PIEZOELECTRIC ALARM
The piezoelectric alarm shown in Figure 2 uses a 3-terminal
transducer (Gulton 101 FB or equivalent) to produce an
80 dB SPL alarm.
The transducer has a feedback terminal which is connected
to the non-inverting input of the LM 13080, causing oscillation at the resonant frequency of the piezoelectric crystal.
The alarm can be controlled through the use of the electronic shut-down feature of the amplifier. The 100k resistor and
0.1 ,.,.F capacitor are used to provide a reference voltage at
the inverting input and to keep the duty cycle of the crystal
oscillation close to 50%. The RC time constant of this feedback network should be much greater than the time constant of the transducer.
The effect of RSEl on the total quiescent supply current will
be very small (als < 5% Is) as long as RSEl is 100k or
greater.
3-709
w
o
CO
o
o
CO
....~
Typical Applications
:E
(Continued)
9V
6V
lOOk
....I
9V
-6V
-6V
-6V
lOOk
OUTPUT (TO
lOOk
TWISTED PAIR)
6V
TLlH17978-6
FIGURE 2. Piezoelectric Alarm
1
lo.OS0F
6Bok
O.oS
of T-6V
. -6V
SIRENS
Two separate circuits for sirens are shown. The first, Figure
3, is a 2-state or ON-OFF type siren where the LM130aO
oscillates at an audio frequency and drives an an speaker
and the LM339 acts as a switch which controls the audio
burst rate. The second siren, Figure 4, provides a constant
audio output but alternates between 2 separate tones. The
LM 130aO is set to oscillate at one basic frequency and this
frequency is changed by adding a 200 kn charging resistor
in parallel with the feedback resistor, R2.
10
-6V
LAMP FLASHER-RELAY DRIVER
TLlH17978-5
FIGURE 1. Line Driver-Unbalanced
Input to Balanced Output
IOV
The LM130aO is easily adaptable to such applications as
low frequency warning devices. The output of the oscillator
is a squarewave that is used to drive lamps or small relays.
As shown in Figure 5, the circuit alternately flashes 2 incandescent lamps.
RI
7Sk
R2
10V
7Sk
10k
1
'AUDIO ~ 1.4 R1Cl
~
IOV
'SWITCH
190 Hz
1
~ 1.4 R2C2
~
1.9 Hz
10k
ISk
ISk
TLlH17978-7
FIGURE 3. 2-State Siren
3-710
ri:
....
Typical Applications (Continued)
(0)
c
00
c
RI
75k
R2
75k
IOV
15k
Basic tone = 190 Hz
I
fSWITCH
= 1.4 RICI
Switched tone
15k
= 260 Hz
= 1.9 Hz
TUHI797B-B
FIGURE 4. 2·Tone Siren
R
IOV
R
5V
75k
75k
10k
-5V I
-5V
lOOk
10k
1=_1_
15k
f=-O.36RC
I.4RC
TLlHI797B-IO
TL/HI797B-9
a) Split Supplies
b) Single Supply
FIGURE 5. Low Frequency Lamp Flasher/Relay Driver
MOTOR SPEED CONTROL
voltage, VIN, to the system. Diode D1 is actually a level shift
diode to bring VIN into the common·mode range of the am·
plifier. A reference voltage is established by the combined
voltage drop through the 100. potentiometer, R3 and the
reference diode, D2 and is applied to the non-inverting input
of the LM13080. Resistor R4 is a bias resistor used to keep
D2 active. The 10k speed adjust potentiometer is 2 resistors
in 1, where section R1 is the input resistance and section
R2 is the negative feedback resistance. It can be seen that
the voltage impressed across the motor is equal to:
The LM13080 can be used to construct a very simple speed
control for small motors requiring less than O.SA start current. This circuit operates by impressing the multiple of a
reference voltage across the motor, and then varying the
reference by means of a quasi·positive feedback to change
the voltage across the motor any time the load on the motor
changes.
To understand the circuit operation, it is easiest to let the
voltage at the cathode of diode D1, Figure 6, be the input
V
3-711
(VBE2
MOTOR =
+ laR3) R2
R1
+ VBE
0
CIO
0
....
:::!
CO)
,
....I
Typical Applications (Continued)
The positive feedback is developed as a change in the voltage across R3 due to the change in the motor current
caused by a variation in the motor's load. Resistor R3 is
shown as a potentiometer so that the amount of positive
feedback can be adjusted for smooth operation of the motor. Capacitor Cl and resistor R5 serve as a filter for the
reference voltage at the non-inverting input of the amplifier.
01
vlN
Rl
R2
BV
10k
BV
Cl
1 pF
02 R5
10k
VOLTAGE REGULATORS
In normal, positive or negative regulator application such as
those shown in Figure 7 and Figure 8, the LM13080 has 2
major advantages over standard operational amplifiers. The
LM13080 has its own on-chip pass device and in addition
can either sink or source 250 mA of load current.
-
-
MOTOR
TUH17978-11
FIGURE 6. Motor Speed Control
10k
4.1k
>~~DVOUT
TLIH17978-12
2V ,;: Your ,;: (VIN - 2V)
FIGURE 7. Positive Variable Voltage Regulator
Note: Pin numbers apply to miniDIP.
10k
10k
> ....~DVOUT
0.05 pF
TLIH17978-13
-15V;' Vour;' -(VIN - 2V)
FIGURE 8. Negative Variable Voltage Regulator
3-712
,-------------------------------------------------------------------------, r
3:
....
~National
Co)
en
o
o
......
~ Semiconductor
r
3:
....
LM 13600/LM 13600A
Dual Operational Transconductance Amplifiers
with linearizing Diodes anell Buffers
III
General Description
The LM13600 series consists of two current controlled
transconductance amplifiers each with differential inputs
and a push-pull output. The two amplifiers share common
supplies but otherwise operate independently. Linearizing
diodes are provided at the inputs to reduce distortion and
allow higher input levels. The result is a 10 dB signal-tonoise improvement referenced to 0.5 percent THD. Controlled impedance buffers which are especially designed to
complement the dynamic range of the amplifiers are provided.
I.!I
Excellent matching between amplifiers
III Controlled impedance buffers
III Wide supply range
± 2V to ± 22V
Applications
III Current-controlled amplifiers
c Current-controlled impedances
c
Current-controlled filters
C Current-controlled oscillators
III
Excellent gm linearity
:J>
II High output signal-to-noise ratio
[J
III gm adjustable over 6 decades
o
III Linearizing diodes
c
Features
Co)
g
Multiplexers
Timers
Sample and hold circuits
Connection Diagram
Dual-In-Line and Small Outline Packages
AMP
BIAS
INPUT
DIODE
BIAS
16
15
AMP
BIAS
INPUT
DIODE
BIAS
INPUT
INPUT
(+)
H
OUTPUT
12
INPUT
(+)
INPUT
H
OUTPUT
BUFFER
OUTPUT
v+
11
v-
9
BUFFER
INPUT
BUFFER
OUTPUT
TUH/79BO-2
Top View
Order Number LM13600M, LM13600N or LM13600AN
See NS Package Number M16A or N16A
3-713
~
o
CD
M
.,...
::::!E
....I
.....
o
o
CD
M
.,...
::::!E
....I
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (Note 1)
LM13600
36 VOC or ± 18V
LM13600A
44 VOC or ±22V
Power Dissipation (Note 2) TA = 25'C
570mW
Differential Input Voltage
±5V
Diode Bias Current (10)
Operating Temperature Range
2mA
Output Short Circuit Duration
Continuous
Buffer Output Current (Note 3)
+Vsto -Vs
Storage Temperature Range
- 65'C to + 150'C
Soldering Information
Dual·ln·Line Package
Soldering (10 seconds)
Small Outline Package
Vapor Phase (60 seconds)
Infrared (15 seconds)
2mA
Amplifier Bias Current (lABel
O'Cto +70'C
DC Input Voltage
260'C
215'C
220'C
See AN·450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering sur·
face mount devices.
20mA
Electrical Characteristics (Note 4)
Parameter
LM13600
Conditions
Min
Input Offset Voltage (Vas)
LM13600A
Typ
Max
0.4
Max
4
0.4
0.3
4
0.3
1
2
1
mV
mV
mV
0.5
5
0.5
2
mV
Over Specified Temperature Range
IABC
= 5/-LA
Vas Including Diodes
Diode Bias Current (10)
Input Offset Change
5 /-LA :;; IABC :;; 500 /-LA
= 500/-LA
Units
Typ
Min
0.1
3
0.1
1
mV
Input Offset Current
0.1
0.6
0.1
0.6
/-LA
Input Bias Current
0.4
1
5
8
0.4
1
5
7
/-LA
/-LA
9600
13000
9600
12000
/-Lmho
/-Lmho
7
650
/-LA
/-LA
/-LA
Over Specified Temperature Range
Forward
Transconductance (gm)
Over Specified Temperature Range
6700
5400
gm Tracking
0.3
RL
RL
RL
= 0, IABC = 5 /-LA
= 0, IABC = 500 /-LA
= 0, Over Specified Temp Range
350
300
Peak Output Voltage
Positive
Negative
RL
RL
= 00, 5 /-LA :;; IABC :;; 500 /-LA
= 00,5/-LA:;; IABC:;; 500/-LA
+12
-12
Supply Current
IABC
Vas Sensitivity
Positive
Negative
l!.. VOS/l!..V+
l!.. Vos/l!..V-
Peak Output Current
7700
4000
= 500 /-LA, Both Channels
5
500
0.3
650
+14.2
-14.4
5
500
+12
-12
+14.2
-14.4
V
V
2.6
mA
2.6
20
20
CMRR
Common Mode Range
dB
3
350
300
20
20
150
150
150
150
/-LVIV
/-LVIV
80
110
80
110
dB
±12
±13.5
±12
±13.5
V
100
dB
Crosstalk
Referred to Input (Note 5)
20Hz0= ~
>0=
C
IlIA
IDIIA
IDDpA
100011A
AMPLIfiER BIAS CURRENT (lABC)
!Z 10 3
~IO
I
~
Z
III
'">0= 10,
C
/
....
:5
....
10
10pA
1001lA 10001lA
/.
-51"C -25"C o"c 25"C 6O"C1Ii"C1DD"C 125"C
AMBIENT TEMPERATURE ITA)
Input Resistance
10'
10'
10'
10J
z
!!:10
..
~
::0
i!!! I
lLI
e5
110'
r - r-~ s·C
c
V
II:
j
,
'"
~
§ 10J
AMPLIfiER BIAS CURRENT (lABC)
I
+121 "C
IU
II:
II:
::0
/
Transconductance
1D. Input Leakage
=
104
...
III
.lpA lpA
fl + 'VIN·I-,vIN·VOUT~ ~
!Z
III
,""
I
.IIIA
I-
VOUT
~ "'-14.5
yO
"<
~
I-
III
-14
ceo
V
100pA lOOOpA
, Leakage Current
10
vOUTID
-.!.CMRIII
Vs ='±~iI
RLOAO= ..
T = "C
13
eo ...
=
u 10'
10pA
AMPLIFIER BIAS CURRENT (lABC)
o
23456 7
INPUT DIFFERENTIAL VOLTAGE
J:: 10 I tj±~!~~±tt~~j±tt
.IIlA
lilA
lOll A
IDollA 1000"A
AMPLIfiER BIAS CURRENT (lABC)
Amplifier Bias Voltage vs
Input and Output Capacitance
2000 Amplifier Bias Current
111111 II
~1100
;;;1600
~1400
~1200
;: 1000
~ 100
ffi
600
~ 400
~
c
200
0
..
I
6
i--'::
.IIlA I"A
":-5
~
CI
~4
C
z
I-"
T
~3
u
I~I ~J.
,
Output Resistance
=±I -i;:'T A=+25~-C
c
~2
u
I
I
10ilA
100"A 10001lA
AMPLIfiER BIAS CURRENT (lABC)
o
.I"A IlIA
10"A
IOOpA
100DIIA
AMPLIfiER BIAS CURRENT (lABC)
TUH17980-3
3-716
,-----------------------------------------------------------------------------.r
Typical Performance Characteristics
Distortion vs Differential
Input Voltage
~
VIN .... kl
Co)
~
Itl
Vs = ± 15
R =10K
0
Ie en
~
~~ -40
Ir-
:;....
C:C -60 HffiHlll---+!+Hllll-+H t;;
...
~o.IM~.ml
»
en
-400
~
-80
... JOO
~'fA
H-ttHHI!-+HtttIIf~-"... ,~'I'iiIItI~L---b.H'HHtI
-100.I/lA I/lA
DIFFERENTIAL INPUT VOLTAGE (rnVpp)
10/lA
~ 200
100/lA lDOO/lA
I:!mC = lmA
z
~ 100
c
.J..IHj
~
Co)
o
i!§
'J."
~-
0.01 L......Ju..LJ.U.U!......Iu..LJ.U.U!......I~J.WI.I
1
10
100
1000
~500
-a.
v."w· ,H-ttHlttI---ttrt'llll!\I",\\
r-
~!:i
Ci
I:::0
3:
.....
i"
iol1!
'Ii ~
.fi-_m
. . . . ... -20 H+l+HllI---+!+Hl!!l-I"~~\: ~ ~
z¥ .. :::: :::~
r
600
20rTnrr~~~~~~~mm
~
en
o
o
......
Output Noise vs Frequency
Voltage vs Amplifier Bias Current
100 VS= ±15
§:
RL = 10 Kn
z 10 IABC = 1 rnA
Ie
3:
.....
(Continued)
111111
11111111
IA~,~= 10~~
o
10
IABC AMPLIFIER BIAS CURRENT lilA)
100
lK
10K
FREQUENCY (Hz)
lOOK
TlIH17960-4
Unity Gain Follower
+15V
O.OljtF
...--.....--+-I~
-----(l........
INPUTo-....-'\N\r.....
5tn
B,9
"",,--...JIoOUTPUT
5K
10K
-15V
O.OOljtF
TlIH17960-5
Leakage Current Test Circuit
Differential Input Current Test Circuit
+36 V
+l5V
-15V
TlIH17960-7
TL/H/7960-6
3-717
Circuit Description
The differential transistor pair 04 and Os form a transconductance stage in that the ratio of their collector currents Is
defined by the differential input voltage according to the
transfer function:
other. The remaining transistors and diodes form three current mirrors that produce an output current equal to Is minus
14 thus:
(5)
(1)
The term in brackets is then the transconductance of the
amplifier and is proportional to IABC.
where VIN is the differential input voltage, kT /q is approximately 26 mV at 25°C and Is and 14 are the collector currents of transistors Os and 04 respectively. With the exception of 03 and 013, all transistors and diodes are identical in
size. Transistors 01 and 02 with Diode D1 form a current
mirror which forces the sum of currents 14 and Is to equal
IABC;
Linearizing Diodes
For differential voltages greater than a few millivolts, Equation 3 becomes less valid and the transconductance becomes increasingly nonlinear. Figure 1 demonstrates how
the internal diodes can linearize the transfer function of the
amplifier. For convenience assume the diodes are biased
with current sources and the input signal is in the form of
current Is. Since the sum of 14 and Is is IABC and the difference is lour, currents 14 and Is can be written as follows:
(2)
where IABC is the amplifier bias current applied to the gain
pin.
For small differential input voltages the ratio of 14 and Is
approaches unity and the Taylor series of the In function
can be approximated as:
kT In ~ ::::: kT Is - 14
q
14
q
14
Since the diodes and the input transistors have identical
geometries and are subject to similar voltages and temperatures, the following is true:
(3)
!Q + Is
IABC + lout
kT In_2_ _ = kT In 2
2
q
!Q _ Is q IABC _ lout
2
2
2
(5)
. lout=ls (21ABC)
..
~
Collector currents 14 and Is are not very useful by themselves and it is necessary to subtract one current from the
(6)
10
+
-
10-IS
lour = 15-14
10+IS
Z
Z
02
10
"2
-Vs
-Vs
TL/HI7980-8
FIGURE 1_ Linearizing Diodes
3-718
r-
Linearizing Diodes (Continued)
Notice that in deriving Equation 6 no approximations have
been made and there are no temperature-dependent terms.
The limitations are that the signal current not exceed ID/2
and that the diodes be biased with currents. In practice,
replacing the current sources with resistors will generate
insignificant errors.
Applications-Voltage Controlled
Amplifiers
Figure 2 shows how the linearizing diodes can be used in a
voltage-controlled amplifier. To understand the input biasing, it is best to consider the 13 kO resistor as a curre~t
source and use a Thevenin equivalent circuit as shown In
Figure 3. This circuit is similar to Figure 1 and operates the
same. The potentiometer in Figure 2 is adjusted to minimize
the effects of the control signal at the output.
Controlled Impedance Buffers
The upper limit of transconductance is defined by the maximum value of IABC (2 mAl. The lowest value of IABC for
which the amplifier will function therefore determines the
overall dynamic range. At very low values of IABC, a buffer
which has very low input bias current is desirable. An FET
follower satisfies the low input current requirement, but is
somewhat non-linear for large voltage swing. The controlled
impedance buffer is a Darlington which modifies its input
bias current to suit the need. For low values of IABC, the
buffer's input current is minimal. At higher levels of IABC,
transistor 03 biases up 012 with a current proportional to
IABC for fast slew rate. When IABC is changed, the DC level
of the Darlington output buffer will shift. In audio applications where IABC is changed suddenly, this shift may produce an audible "pop". For these applications the LM13700
may produce superior results.
For optimum signal-to-noise performance, IABC should be
as large as possible as shown by the Output Voltage vS.
Amplifier Bias Current graph. Larger amplitudes of input signal also improve the SIN ratio. The linearizing diodes help
here by allowing larger input signals for the same output
distortion as shown by the Distortion vs. Differential Input
Voltage graph. SIN may be optimized by adjusting the magnitude of the input signal via RIN (Figure 2) until the output
distortion is below some desired level. The output voltage
swing can then be set at any level by selecting RL.
Although the noise contribution of the linearizing diodes is
negligible relative to the contribution of the amplifier's internal transistors, ID should be as large as possible. This minimizes the dynamic junction resistance of the diodes (ra) and
maximizes their linearizing action when balanced against
RIN. A value of 1 mA is recommended for ID unless the
specific application demands otherwise.
30 K
+Vs
GAIN
.---....,,'v''v---.g CONTROL
JIABC
+Vs
. ,......'--.. OUTPUT
-vs
FIGURE 2. Voltage Controlled Amplifier
TLlH17980-9
FIGURE 3. Equivalent VCA Input Circuit
TLlH17980-10
3-719
....3:
Co)
en
o
o
........
r-
....
3:
Co)
en
o
o
:J>
Stereo Volume Control
The circuit of Figure 4 uses the excellent matching of the
two LM13600 amplifiers to provide a Stereo Volume Control
with a typical channel-to-channel gain tracking of 0.3 dB. Rp
is provided to minimize the output offset voltage and may be
replaced with two 51 on resistors in AC-coupled applications. For the component values given, amplifier gain is derived for Figure 2 as being:
If Vc is derived from a second signal source then the circuit
becomes an amplitude modulator or two-quadrant multiplier
as shown in Figure 5, where:
10
= - 21 5 (lABel = - 21 5
ID
ID
VIN2 _ 21 5 (V- + 1.4VJ
Rc
ID
Rc
Vo
-V = 940 X IABC
IN
+15V
10 K
VINI
RIN
r-=Vc
IK
Rp
30K
RC
10 K
V'N2
RIN
r-=-
lK
Rp
TLlH17980-11
FIGURE 4. Stereo Volume Control
....
IABC
30-K
VIN2
MODULATION O-------'\IV'I.,....----'--------o
RC
r---------o+15 V
VI NI
CARRIER
5.1 K
-15 V
TL/H/7980-12
FIGURE 5. Amplitude Modulator
3-720
~----------------------------------------------------------~r
in Figure 8. A signal voltage applied at Rx generates a VIN
to the LM13600 which is then multiplied by the gm of the
amplifier to produce an output current, thus:
Stereo Volume Control
(Continued)
The constant term in the above equation may be cancelled
by feeding Is x 10RC12 (V- + 1.4V) into 10. The circuit of
Figure 6 adds RM to provide this current, resulting in a fourquadrant multiplier where RC is trimmed such that Va = OV
for VIN2 = OV. RM also serves as the load resistor for 10.
Noting that the gain of the LM13600 amplifier of Figure 3
may be controlled by varying the linearizing diode current 10
as well as by varying IASC, Figure 7 shows as AGC Amplifier
using this approach. As Va reaches a high enough amplitude (3 VSE) to turn on the Darlington transistors and the
linearizing diodes, the increase in 10 reduces the amplifier
gain so as to hold Va at that level.
...
is:
Co)
c»
o
~
r
R + RA
Rx=--gmRA
...is:
Co)
where gm ::::: 19.2 IABC at 25"C. Note that the attenuation of
Va by Rand RA is necessary to maintain VIN within the
linear range of the LM13600 input.
Figure 9 shows a similar VCR where the linearizing diodes
are added, essentially improving the noise performance of
the resistor. A floating VCR is shown in Figure to, where
each "end" of the "resistor" may be at any voltage within
the output voltage range of the LM13600.
Voltage Controlled Resistors
c»
o
:;
An Operational Transconductance Amplifier (OTA) may be
used to implement a Voltage Controlled Resistor as shown
50 K
10 K
TUHI79BO-13
FIGURE 6. Four-Quadrant Multiplier
30 K
OUTPUT
AMPLITUDE
TL/HI79BO-14
FIGURE 7. AGC Amplifier
30 K
g--v,"'v--", Vc
+15 V
200n
10 K
........_ _....'V'V'v-o-15 v
tiD
.1
TL/HI79BO-15
FIGURE 8. Voltage Controlled Resistor, Single-Ended
3-721
•
~
g
Voltage Controlled Filters
C')
OTA's are extremely useful for implementing voltage controlled filters, with the LM13600 having the advantage that
the required buffers are included on the I.C. The VC La-Pass
Filter of Figure 11 performs as a unity-gain buffer amplifier
at frequencies below cut-off, with the cut-off frequency being the paint at which Xc/gm equals the closed-loop gain of
(R/RA). At frequencies above cut-off the circuit provides a
single RC roll-off (6 dB per octave) of the input signal amplitude with a - 3 dB point defined by the given equation,
....
::E
....I
......
o
o
CD
....
::E
C')
....I
where gm is again 19.2 x IABC at room temperature. Figure
12 shows a VC High-Pass Filter which operates in much the
same manner, providing a single RC roll-off below the defined cut-off frequency.
Additional amplifiers may be used to implement higher order
filters as demonstrated by the two-pole Butterworth La-Pass
Filter of Figure 13 and the state variable filter of Figure 14.
Due to the excellent gm tracking of the two amplifiers and
the varied bias of the buffer Darlingtons, these filters perform well over several decades of frequency.
3D K
15 K
+15V
Vos
1K
Rp
lBK
......-_I--'V'oI\r-o-1S v
TL/H17980-16
FIGURE 9. Voltage Controlled Resistor with Linearizing Diodes
lBO K
lOB K
2R
Rx--
g.n.
TL/HI7980-17
FIGURE 10. Floating Voltage Controlled Resistor
3D K
t>----'\.AJ'v-----" Vc
100 K
200n
.......--.1'.'---'" Vo
fo=RABm
IR+RA)2.c
10 K
-15 V
TL/H/7980-18
FIGURE 11. Voltage Controlled Low-Pass Filter
3-722
r-
...3:
w
en
Voltage Controlled Filters (Continued)
30 K
o
o
......
220 K
10 K
r-
...3:enw
>..o-Jv\/v--i..---c>-l
{vos)
1K
\NULL
o
~
.......-o-ovo
1K
10 K
-15 V
TL/HI798D-19
FIGURE 12. Voltage Controlled Hi-Pass Filter
15 K
vco----------AV~
10
~
(R + RAl2".C
Vo
100 K
R
100 pI
10 K
-15 V
TUHI798D-2D
FIGURE 13. Voltage Controlled 2-Pole Butterworth Lo-Pass Filter
15 K
o-------~--------------------~~--AV~r_--ovc
;r
1K
r
BOOpl
lO-PASS
OUT
20 K
20 K
BANDPASS OUT
TUH/798D-21
FIGURE 14. Voltage Controlled State Variable Filter
3-723
•
4 ,--------------------------------------------------------------------,
g
151
....
:i
::::!
CI
CI
CD
....
:i
C")
..J
Voltage Controlled Oscillators
The classic Triangular/Square Wave veo of Rgure 15 is
one of a variety of Voltage Controlled Oscillators which may
be built utilizing the LM13600. With the component values
shown, this oscillator provides signals from 200 kHz to below 2 Hz as Ic is varied from 1 mA to 10 nA. The output
amplitudes are set by IA X RA. Note that the peak differential input voltage must be less than 5V to prevent zenering
the inputs.
increase amplifier A 1's bias current and thus to increase the
charging rate of capacitor
When V02 is low, IF goes to
zero and the capacitor discharge current is set by Ie.
The ve Lo-Pass Filter of Figure 11 may be used to produce
a high-quality sinusoidal veo. The circuit of Rgure 16 employs two LM13600 packages, with three of the amplifiers
configured as lo-pass filters and the fourth as a limiter/inverter. The circuit oscillates at the frequency at which the
loop phase-shift is 360" or 180" for the inverter and 60" per
filter stage. This veo operates from 5 Hz to 50 kHz with
less than 1 % THD.
e.
A few modifications to this circuit produce the ramp/pulse
of Figure 16. When V02 is high, IF is added to Ic to
veo
Vc
10 K
Ie
lose
~ 4CIARA
Tl/H/7980-22
FIGURE 15. Triangular/Square-Wave veo
vco-~~~-e~~~--------------------------------~
51DK
30 K
51 K
~t-tH
JLJl
9--o------o~ IL t-
voz
VPK
100 K
HI
FIGURE 16. Ramp/Pulse veo
3-724
~
(V+ - O.8V)R2
R1 + R2
IH::::: 2Vp~
IF
tL ~ 2VPKC
Ic
Ie
10::::: 2Vp~ lor Ie
TUH/7980-23
< IF
r-
:s::
.....
Voltage Controlled Oscillators (Continued)
Co)
en
o
o
.....
30 K
r-
:s::
.....
Co)
en
o
~
VCo----t~~~--~--------------------------__9
voO---~--
-15 V
-15 V
100 K
100 K
TL/H/798D-24
FIGURE 17. Sinusoidal veo
The operation of the multiplexer of Figure 20 is very straightforward. When A 1 is turned on it holds Vo equal to VIN1 and
when A2 is supplied with bias current then it controls YO. Cc
and Rc serve to stabilize the unity-gain configuration of amplifiers AI. and A2. The maximum clock rate is limited to
about 200 kHz by the LM13600 slew rate into 150 pF when
the (VIN1-VIN2) differential is at its maximum allowable value
of 5V.
10 K
Rt
30 K
Q----'V\;"Ir--t--ovc
The Phase-Locked Loop of Figure 21 uses the four-quadrant multiplier of Figure 6 and the VCO of Figure 18 to produce a PLL with a ± 5% hold-in range and an input sensitivity of about 300 mY.
vo
S
TL/HI798D-25
FIGURE 18. Single Amplifier veo
r+---1~------""2~0~Kr-------..-I~TRIGGER
Figure 18 shows how to build a VCO using one amplifier
when the other amplifier is needed for another function.
1,1.1 F
Ie
RS
O.01j.1F 1 K
1l
Additional Applications
.......---ovo
Figure 19 presents an interesting one-shot which draws no
power supply current until it is triggered. A positive-going
trigger pulse of at least 2V amplitude turns on the amplifier
through RB and pulls the non-inverting input high. The amplifier regenerates and latches its output high until capacitor
C charges to the voltage level on the non-inverting input.
The output then switches low, turning off the amplifier and
discharging the capacitor. The capacitor discharge rate is
increased by shorting the diode bias pin to the inverting input so than an additional discharge current flows through DI
when the amplifier output switches low. A special feature of
this timer is that the other amplifier, when biased from Yo,
can perform another function and draw zero stand-by power
as well.
-=
10 K
TUH1798D-26
FIGURE 19. Zero Stand-By Power Timer
3-725
•
c(
g
....
Additional Applications (Continued)
C")
::i
..J
.....
o
o
CD
....
::i
C")
..J
12 K
CC1150Pf
RC1300n
10 K
-12V
TLlH17980-27
FIGURE 20. Multiplexer
30 K
10 K
30 K
Vo
fc~lkHz
±5%
HOLD
IN
RANGE
VINo---"'VV"It------'
TL/H17980-28
FIGURE 21. Phase Lock Loop
The Schmitt Trigger of Figure 22 uses the amplifier output
current into R to set the hysteresis of the comparator; thus
VH = 2 X R X lB. Varying IB will produce a Schmitt Trigger
with variable hysteresis.
mum high output voltage swing of the LM13600. D1 is added to provide a discharge path for C, when A 1 switches low.
The Peak Detector of Figure 24 uses A2 to turn on A 1
whenever VIN becomes more positive than Vo. A1 then
charges storage capacitor C to hold Vo equal to VINPK.
One precaution to observe when using this circuit: the Dar1ington transistor used must be on the same side of the
package as A2 since the A 1 Darlington will be turned on and
off with A 1. Pulling the output of A2 low through D1 serves
to turn off A1 so that Vo remains constant.
Figure 23 shows a Tachometer or Frequency-to-Voltage
converter. Whenever A 1 is toggled by a positive-going input,
an amount of charge equal to (VH-VLl Ct is sourced into C,
and Rt. This once-per-cycle charge is then balanced by the
current of Vo/R t. The maximum fiN is limited by the amount
of time required to charge C, from VL to VH with a current of
IB' where VL and VH represent the maximum low and maxi-
3-726
.-----------------------------------------------------------------------------.r
Additional Applications
.....
==
(Continued)
Co)
0)
o
~
82 K
r
.....
==
Co)
0)
o
~
Vo
10 K
-5 V
R
10 K
TL/H/79BO-29
FIGURE 22. Schmitt Trigger
33 K
18
IN914
-15 V
1-'--0----0 Vo'" IOmVX.!!r!..
Hz
Rt
36 K
TUH/79BO-30
FIGURE 23. Tachometer
+ 15 V r I PEAK DETECT
-15V
~
~
01
HOLD
IN914
30 K
+15V
•
.......-(~---oVo
10 K -15 V
~--------~-----+------------------~~
TL/HI79BO-31
FIGURE 24. Peak Detector and Hold Circuit
3-727
Additional Applications (Continued)
The Sample-Hold circuit of Figure 25 also requires that the
Darlington buffer used be from the other (A2) half of the
package and that the corresponding amplifier be biased on
continuously. The Ramp-and-Hold of Figure 26 sources Ie
into capacitor C whenever the input to A1 is brought high,
giving a ramp-rate of about 1 VIms for the component values shown.
The true-RMS converter of Figure 27 is essentially an automatic gain control amplifier which adjusts its gain such that
the AC power at the output of amplifier A1 is constant. The
output power of amplifier A1 is monitored by squaring amplifier A2 and the average compared to a reference voltage
with amplifier A3. The output of A3 provides bias current to
the diodes of A1 to attenuate the input signal. Because the
output power of A1 is held constant, the RMS value is constant and the attentuation is directly proportional to the
RMS value of the input voltage. The attenuation is also proportional to the diode bias current. Amplifier A4 adjusts the
ratio of currents through the diodes to be equal and therefore the voltage at the output of A4 is proportional to the
RMS value of the input voltage. The calibration potentiometer is set such that Vo reads directly in RMS volts.
:JL
10 K
O-'V\f'r-"U_1
SAMPLE
HOLD
YIN
Va
CCI,IDDOPf
RClDOn
IK
-I Y
TLlHI7980-32
FIGURE 25. Sample-Hold Circuit
HAMP
UP
JL'V-5V
HAMP
ENABLE
-5V
TLlHI7980-33
FIGURE 26. Ramp and Hold
5K
'2 K
O.'"F
VINO-! I+'W........+-o-l
YOo-----t-<>-cc
~,
"ACCURATE
r-"1V\'--_"'V\f'rO+'5 V
TLlH17980-34
FIGURE 27. True RMS Converter
3-728
Additional Applications (Continued)
The circuit of Figure 28 is a voltage reference of variable
temperature coefficient. The 100 kn potentiometer adjusts
the output voltage which has a positive TC above 1.2V, zero
TC at about 1.2V and negative TC below 1.2V. This is accomplished by balancing the TC of the A2 transfer function
against the complementary TC of D1.
operating within its linear range. From equation (5), the input
voltage to A 1 is:
The log amplifier of Figure 29 responds to the ratio of currents through buffer transistors Q3 and Q4. Zero temperature dependence for Your is ensured because the TC of the
A2 transfer function is equal and opposite to the TC of the
logging transistors Q3 and Q4.
The voltage on the base of 01 is then
The wide dynamic range of the LM13600 allows easy control of the output pulse width in the Pulse Width Modulator
of Figure 30.
The ratio of the Q1 and 02 collector currents is defined by:
-".(R.:..!.1_+-,::R~2)_V-",IN,-,-1
VB1 =R1
kT IABC
kT IC2
VB1 = -In-:::: - I n - q
IC1
q
11
For generating IABC over a range of 4 to 6 decades of current, the system of Figure 31 provides a logarithmic current
out for a linear voltage in.
Combining and solving for IABC yields:
Since the closed-loop configuration ensures that the input
to A2 is held equal to OV, the output current of A 1 is equal to
13 = -VC/Rc·
The differential voltage between Q1 and Q2 is attenuated
by the R1, R2 network so that A1 may be assumed to be
This logarithmic current can be used to bias the circuit of
Figure 4 provide a temperature independent stereo attenuation characteristic.
30 K
IBOK
360 K
1K
VOUT
"1.2
100 K
100 K
-15 V
TLlHI7980-35
FIGURE 28. Delta VBE Reference
120 K
-VIN -VREF
FIGURE 29. Log Amplifier
3-729
R&
VOUT = (2 Vs - 1.2V) (A.,) (Ae) In VIN A2
(As + A.,) (As)
VREF A1
TL/HI7980-S6
•
Additional Applications
CLOCK IN
(Continued)
o-j
500pF
100 K
TLlHI7980-37
FIGURE 30. Pulse Width Modulator
+15 V
-Vc
150 K
IABC
-15 V
- CI3j
= 11 exp [-12TLlH/7980-38
FIGURE 31. Logarithmic Current Source
3-730
~National
~ Semiconductor
LM 13700/LM 13700A
Dual Operational Transconductance Amplifiers
with Linearizing Diodes and Buffers
General Description
Features
The LM13700 series consists of two current controlled
transconductance amplifiers, each with differential inputs
and a push-pull output. The two amplifiers share common
supplies but otherwise operate independently. Linearizing
diodes are provided at the inputs to reduce distortion and
allow higher input levels. The result is a 10 dB signal-tonoise improvement referenced to 0.5 percent THD. High impedance buffers are provided which are especially designed
to complement the dynamic range of the amplifiers. The
output buffers of the LM13700 differ from those of the
LM13600 in that their input bias currents (and hence their
output DC levels) are independent of IABC. This may result
in performance superior to that of the LM13600 in audio
applications.
•
•
•
•
•
•
•
gm adjustable over 6 decades
Excellent gm linearity
Excellent matching between amplifiers
Linearizing diodes
High impedance buffers
High output signal-to-noise ratio
Wide supply range ± 2V to ± 22V
Applications
•
•
•
•
•
•
•
Current-controlled amplifiers
Current-controlled impedances
Current-controlled filters
Current-controlled oscillators
Multiplexers
Timers
Sample-and-hold circuits
Connection Diagram
Dual In-Line and Sma" Outline Packages
AMP
BIAS
INPUT
DIODE
BIAS
INPUT
(+)
16
15
14
AMP
BIAS
INPUT
DIODE
BIAS
INPUT
(+)
INPUT
H
OUTPUT
y+
INPUT
OUTPUT
v-
H
BUFFER
INPUT
BUFFER
OUTPUT
BUFFER
INPUT
BUFFER
DUTPUT
TLlH17981-2
Top View
Order Number LM13700M, LM13700N or LM13700AN
See NS Package Number M16A or N16A
3-731
~
~
Absolute Maximum Ratings
:::&
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating Temperature Range
LM13700N, LM13700AN
Supply Voltage (Note 1)
LM13700
LM13700A
Storage Temperature Range
....
""
....I
.....
o
o
.....
....
""
:::&
....I
36 VOC or ± 18V
44 VOC or ±22V
Power Dissipation (Note 2) T A
LM13700N, LM13700AN
=
570mW
±5V
Diode Bias Current (10)
2mA
Amplifier Bias Current (lABel
2mA
Output Short Circuit Duration
Continuous
Buffer Output Current (Note 3)
+Vsto -Vs
-65·Cto + 150"C
Soldering Information
Dual·ln·Line Package
Soldering (10 sec.)
Small Outline Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
25·C
Differential Input Voltage
O"Cto +70"C
DC Input Voltage
260·C
215·C
220·C
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
20mA
Electrical Characteristics (Note 4)
Parameter
LM13700
Conditions
Min
Input Offset Voltage (Vas)
LM13700A
Typ
Max
0.4
Max
4
0.4
mV
4
0.3
1
2
1
0.3
Over Specified Temperature Range
IABC
=
5poA
Vas Including Diodes
Diode Bias Current (10)
Input Offset Change
5 poA ,;;; IABC ,;;; 500 poA
=
500 poA
Input Offset Current
Input Bias Current
Over Specified Temperature Range
Units
Typ
Min
0.5
5
0.5
2
mV
0.1
3
0.1
1
mV
0.1
0.6
0.1
0.6
poA
0.4
5
0.4
5
1
8
1
7
9600
13000
9600
12000
poA
Forward
Transconductance (gm)
6700
5400
gm Tracking
Peak Output Current
7700
pomho
Over Specified Temperature Range
4000
0.3
=
=
RL =
RL
0, IABC
RL
0, IABC
5
5 poA
350
500 poA
0, Over Specified Temp Range
300
00,5 poA ,;;; IABC ,;;; 500 poA
00,5 poA,;;; IABC ,;;; 500 poA
+12
-12
Peak Output Voltage
Positive
Negative
RL
RL
Supply Current
IABC
Vas Sensitivity
Positive
Negative
tJ.Vos/tJ.V+
tJ.VOs/tJ.V-
=
=
=
=
=
500 poA, Both Channels
Common Mode Range
Referred to Input (Note 5)
20Hz -2
;
sv
~
...a:
102
a:
!!i
'"u 10
u
ti
C
-3
i
Ii
...a:
1
5°
...
...5
!!
fl!
::: -4
~ -S
CI
~
-6
!! -1
-8
'o.lllA
IOOIlA
AMPLIFIER BIAS CURRENT (lABCI
.I"A lIlA 10"A
1001lA 1000"A
AMPLIFIER BIAS CURRENT (lABCI
Peak Output Voltage and
Common Mode Range
IS
il- 14.5
c~
......
14
13.5
!:;~ 13
~: -13
vl1,1
.. ::E -14
v~W
CCI
~ .0-14.5
lIlA lIlA
101lA 1001lA IOOOIlA
AMPLIFIER BIAS CURRENT (lABCI
...a:
.g;
i-
'"~'02
"....w
IIII
/
/,
10
OVf---
-=
'-
-50·C -25°C O"c 2S·C 50°C 15·Cl00·CI2S·C
AMBIENT TEMPERATURE ITAI
.11lA lILA IDIlA
1001lA 100DIlA
AMPLIFIER BIAS CURRENT (lABCI
Input Leakage
104
/
103
w
'-"~
=> CI-13.5
..
::e
/
Z
RLDAD = ..
TA= ·c
0
[I + JVIN·I-JYIN·VOUT~.ID! ~
...i'04
vs~'±'I'!;1i
:il ~
.....
;:g
Leakage Current
105
vDurlll1 I
VCMIIIII I
1021npUi Resistance,
===t=+12S·C
~
!i;,03
w
a:
a:
,
:;:,02
...'"
."
I--- r-+ 5"C
c
~IO
...!!...=> I
o
2 3 4 5 6 7
INPUT DIFFERENTIAL VOLTAGE
Amplifier Bias Voltage V8
Input and Output Capacitance
2000 Amplifier Bias Current
_1800
~
:0-
.a1600
!i 1400
!i12DO
;1000
iii 800
7
i
,
~5°C
-
t""r
. I- , .
-;I;j
-!
Ii! 600 r--4~
I
ii! 400 ::!f----'L
I,'
I"
~ 200
ii' ---Jtt ,J
CI~i
o .1pA
v-
15 V.TA=+25"'C
.0
~ 2
.0
~
CI
:::4
z
C UT
.e
...
II:
I
I
~ 102
w
"
"
~'03
w
Z
,
~3
1pA 10pA
100pA 10001lA
AMPLIFIER BIAS CURRENT (lABCI
a
.
.."
V
ii:5
101
'"
CI
o.lpA
I
IpA 10pA
IDDIlA 100DpA
AMPLIFIER BIAS CURRENT (lABCI
0.11lA I"A 10pA 100pA 1000pA
AMPLIFIER BIAS CURRENT (lABCI
TL/HI79B1-3
3-734
r-
Typical Performance Characteristics
is:
--o......
(Continued)
(0)
Voltage vs Amplifier
Bias Current
...w
CI
20
R
>
a: en
~~ -40
< ...
!:; ...
=10K~
\~
,,'fl
~~ -60
5- -80
~,~~
;::
J.HI
::0
CI
ii
-100.IIlA lilA
is:
......
o
:;
40D
......§ 300
~ 200
z
!
MC= ~,-,
1111111
100
I
o
10
'ABCAMPLlFIER BIAS CURRENT II.A)
1111
'AB'C =10~~
10K
100
lK
FREUUENCY IHzl
lOOK
TL/H17981-4
Unity Gain Follower
+15V
INPUTo--,..J\"'rv4~----o--t
51n
B,9
.....-"1.......0
OUTPUT
5K
10K
-15V
O.OOIIlF
TLlH17981-5
Differential Input Current Test Circuit
Leakage Current Test Circuit
+15V
+3& V
-15V
TL/H17981-6
TLlH17981-7
3-735
r-
(0)
'> 500
~"'~
%",
o
......
--
~600
Vs = ±15 villlllIlL
fi~;. -20
0.01 1
10
100
1000
DIFFERENTIAL INPUT VOLTAGE (mVpp)
Output Noise vs Frequency
Circuit Description
Linearizing Diodes
The differential transistor pair 04 and Os form a transconductance stage in that the ratio of their collector currents is
defined by the differential input voltage according to the
transfer function:
For differential voltages greater than a few millivolts, Equation 3 becomes less valid and the transconductance becomes increasingly nonlinear. Figure 1 demonstrates how
the internal diodes can linearize the transfer function of the
amplifier. For convenience assume the diodes are biased
with current sources and the input signal is in the form of
current Is. Since the sum of 14 and Is is IABC and the difference is lOUT, currents 14 and Is can be written as follows:
(1)
where VIN is the differential input voltage, kT/q is approximately 26 mV at 25'C and Is and 14 are the collector currents of transistors Os and 04 respectively. With the exception of Oa and 01a, all transistors and diodes are identical in
size. Transistors 01 and 02 with Diode Dl form a current
mirror which forces the sum of currents 14 and Is to equal
IABC;
14
For small differential input voltages the ratio of 14 and Is
approaches unity and the Taylor series of the In function
can be approximated as:
Is - 14
q
14
IABC + lOUT
2
2
:. lOUT = Is ( 2IABC) for IIs I < 10
""ID
(3)
'2
(6)
Notice that in deriving Equation 6 no approximations have
been made and there are no temperature-dependent terms.
The limitations are that the signal current not exceed 10/2
and that the diodes be biased with currents. In practice,
replacing the current sources with resistors will generate
insignificant errors.
I - I - IABC
4-
=
!Q +Is
IABC + lOUT
kT In_2_ _ = kT In 2
2
q
!Q _ Is q IABC _ lOUT
2
2
2
(2)
!2::::: kT
IABC _ lOUT Is
2
2 '
Since the diodes and the input transistors have identical
geometries and are subject to similar voltages and temperatures, the following is true:
where IABC is the amplifier bias current applied to the gain
pin.
kT In
q
14
=
s-"'2
(4)
IABCQ]
VIN [ 2kT = Is - 14
Collector currents 14 and Is are not very useful by themselves and it is necessary to subtract one current from the
other. The remaining transistors and diodes form three current mirrors that produce an output current equal to Is minus
14 thus:
Applications:
Voltage Controlled Amplifiers
Figure 2 shows how the linearizing diodes can be used in a
voltage-controlled amplifier. To understand the input biasing, it is best to consider the 13 kO resistor as a current
source and use a Thevenin equivalent circuit as shown in
Figure 3. This circuit is similar to Figure 1 and operates the
same. The potentiometer in Figure 2 is adjusted to minimize
the effects of the control signal at the output.
(5)
The term in brackets is then the transconductance of the
amplifier and is proportional to IABC.
-
lOUT = 15-14
1 0-15
"2
10
2
-vs
-vs
TUH17981-8
FIGURE 1. Linearizing Diodes
3-736
Applications:
Voltage Controlled Amplifiers
(Continued)
For optimum signal-to-noise performance, IABC should be
as large as possible as shown by the Output Voltage vs.
Amplifier Bias Current graph. Larger amplitudes of input signal also improve the SIN ratio. The linearizing diodes help
here by allowing larger input signals for the same output
distortion as shown by the Distortion vs. Differential Input
Voltage graph. SIN may be optimized by adjusting the magnitude of the input signal via RIN (Figure 2) until the output
distortion is below some desired level. The output voltage
swing can then be set at any level by selecting RL.
Although the noise contribution of the linearizing diodes is
negligible relative to the contribution of the amplifier's internal transistors, ID should be as large as possible. This minimizes the dynamic junction resistance of the diodes (re) and
maximizes their linearizing action when balanced against
RIN. A value of 1 mA is recommended for ID unless the
specific application demands otherwise.
30 K
+Vs
GAIN
...---"'v\r"---Q CONTROL
. _.............,.. OUTPUT
5K
-vs
TL/H/7981-9
FIGURE 2. Voltage Controlled Amplifier
-
10-IS
Z
..
lOUT
= 15-14
lOUT = IS ell:BC)
10+ls
Z
TLlH17981-10
FIGURE 3. Equivalent VCA Input Circuit
3-737
Stereo Volume Control
The circuit of Figure 4 uses the excellent matching of the
two LM13700 amplifiers to provide a Stereo Volume Control
with a typical channel-to-channel gain tracking of 0.3 dB. Rp
is provided to minimize the output offset voltage and may be
replaced with two 5100 resistors in AC-coupled applications; For thecomponent"values given, amplifier gain is derived for Figure 2 as being:
Vo
-=940
VIN
If VC is derived from a second signal source then the circuit
becomes an amplitude modulator or two-quadrant multiplier
as shown in Figure 5, where:
10 = -2Is (IASC) = -; 21 s VIN2 _ 21s (V- + 1.4V)
10
10
Rc·
10
Rc
The constant term in the above equation may be cancelled
by feeding Is x loRc/2(V- + 1.4V) into 10. The circuit of
Figure 6 adds RM to provide this current, resulting in a fourquadrant multiplier where Rc is trimmed such that Vo = OV
for VIN2 = OV. RM also serves as the load resistor for 10.
x IASC
+15V
10 K
VINI
RIN
r
15K
1K
Ro
-::-.Rp
30K
Vc
-15V·
RC
10K
VINZ
RIN
..L
-::- Rp
1K
" -......-oVoz
5.1 K
-15V
TUH179B1-11
FIGURE 4. Stereo Volume Control
VINZ
MODULATION
IABC
...
30·K
ao'-------VV\;,......------RC
VINI o--'.IV\l-. .-----C~
CARRIER
10 K
5.1 K
-15 V
TUH179B1-12
FIGURE 5. Amplitude Modulator
3-738
r-
Stereo Volume Control
3:
.....
(Continued)
W
""'-I
50 K
10 K
o
o
.....
r-
VINZ
3:
.....
W
""'-I
o
o
»
Vo
VINI u--~'''I'\"",''''---O--l
10 K
-15 V
TLlH17981-13
FIGURE 6. Four-Quadrant Multiplier
Noting that the gain of the LM13700 amplifier of Figure 3
may be controlled by varying the linearizing diode current ID
as well as by varying IASC, Figure 7 shows an AGC Amplifier
using this approach. As Vo reaches a high enough ampli·
tude (3VSE) to turn on the Darlington transistors and the
linearizing diodes, the increase in ID reduces the amplifier
gain so as to hold Vo at that level.
to the LM13700 which is then multiplied by the gm of the
amplifier to produce an output current, thus:
R + RA
Rx=--gmRA
where gm '" 19.21ASC at 25°C. Note that the attenuation of
Vo by Rand RA is necessary to maintain VIN within the
linear range of the LM13700 input.
Figure 9 shows a similar VCR where the linearizing diodes
are added, essentially improving the noise performance of
the resistor. A floating VCR is shown in Figure 10, where
each "end" of the "resistor" may be at any voltage within
the output voltage range of the LM13700.
Voltage Controlled Resistors
An Operational Transconductance Amplifier (OTA) may be
used to implement a Voltage Controlled Resistor as shown
in Figure 8. A signal voltage applied at Rx generates a VIN
30 K
VIN
TL/H17981-14
FIGURE 7. AGe Amplifier
3·739
•
Voltage Controlled Resistors (Continued)
30 K
+15V
10 K
no...._-....-I/\f\r-O-15 v
Vo
~~
R+II.\
L--......
Rx = .. RA
1
Tl/HI7981-15
FIGURE 8. Voltage Controlled Resistor, Single-Ended
30 K
15 K
·,5V
no...._-...-"II\,""-o-15 V
-15 V
R.
lOOK
TLlH17981-16
FIGURE 9. Voltage Controlled Resistor with Unearlzlng Diodes
3·740
r-
.....
Voltage Controlled Filters
12 shows a VC High-Pass Filter which operates in much the
same manner, providing a single RC roll-off below the defined cut-off frequency.
OTA's are extremely useful for implementing voltage controlled filters, with the LM13700 having the advantage that
the required buffers are included on the I.C. The VC La-Pass
Filter of Figure 11 performs as a unity-gain buffer amplifier
at frequencies below cut-off, with the cut-off frequency being the point at which Xci gm equals the closed-loop gain of
(R/RA). At frequencies above cut-off the circuit provides a
single RC roll-off (6 dB per octave) of the input signal amplitude with a - 3 dB point defined by the given equation,
where gm is again 19.2 x IABC at room temperature. Figure
AdJitional amplifiers may be used to implement higher order
filters as demonstrated by the two-pole Butterworth La-Pass
Filter of Figure 13 and the state variable filter of Figure 14.
Due to the excellent gm tracking of the two amplifiers, these
filters perform well over several decades of frequency.
100 K
100 K
-15 V
TLlH17981-17
FIGURE 10. Floating Voltage Controlled Resistor
30 K
o-----~V\r-----oVc
"'---4;)--0 Vo
fo=RA9m
(R+RA)2rrC
10 K
-15 V
TL/H17981-18
FIGURE 11. Voltage Controlled Low-Pass Filter
3-741
==
w
......
o
o
.......
r-
.....
==
w
......
o
o
»
Voltage Controlled Filters (Continued)
10 K
30 K
>...,...JV'lJ'Iv...-4t--cH
(VOS)
\NULL
......-o-OVO
10 K
RA9m
10
= (R + RAl21TG
-15 V
TUH17981-19
FIGURE 12. Voltage Controlled Hi-Pass Filter
15 K
vCo----------~V'I~
Vo
100 pi
10
10 K
RA9m
= (R + RAl21TG
-1& V
FIGURE 13. Voltage Controlled 2-Pole Butterworth Lo-Pass Filter
TL/H17981-20
15 K
VIN
o----~-----------------_4>_--~V\r_--OVC
10 K
1K
.r
800pl
1 K
LO-PASS
OUT
20 K
20 K
BANDPASS OUT
FIGURE 14. Voltage Controlled State Variable Filter
3-742
TL/H17981-21
r-----------------------------------------------------------------------------,~
....
i:
Voltage Controlled Oscillators
Co)
The classic Triangular/Square Wave VCO of Figure 15 is
one of a variety of Voltage Controlled Oscillators which may
be built utilizing the LM13700. With the component values
shown, this oscillator provides signals from 200 kHz to below 2 Hz as Ie is varied from 1 rnA to 10 nA. The output
amplitudes are set by IA X RA. Note that the peak differential input voltage must be less than 5V to prevent zenering
the inputs.
A few modifications to this circuit produce the ramp/pulse
VCO of Figure 16. When V02 ill high, IF is added to Ie to
o
o
.....
The VC Lo-Pass Filter of Figure 11 may be used to produce
a high-quality sinusoidal VCO. The circuit of Figure 16 employs two LM13700 packages, with three of the amplifiers
configured as lo-pass filters and the fourth as a limiter/inverter. The circuit oscillates at the frequency at which the
loop phase-shift is 360· or 180· for the inverter and 60· per
filter stage. This VCO operates from 5 Hz to 50 kHz with
less than 1 % THO.
i:
ve
V02
10 K
Ie
lose
= 4CIARA
FIGURE 15. Triangular/Square-Wave veo
TL1H17981-22
-Ie
IF
(V + ± O.By) R2
veo-~~~~~~V\~--------------------------------~
510 K
30 K
VpK
R,
+ R2
IH::: 2VPKC
51 K
IF
IL= 2Vp~
Ie
Ie
10 ::: 2VPKC lor Ic
< < IF
-It-'H
U
0--0------0:--1 IL ...
V02
100 K
Rl
TLlH17981-23
FIGURE 16. Ramp/Pulse veo
3-743
......
increase amplifier AI's bias current and thus to increase the
charging rate of capacitor C. When V02 is low, IF goes to
zero and the capacitor discharge current is set by Ie.
~
....
Co)
~
~
Voltage Controlled Oscillators (Continued)
30K
62an
10 K
-15 V
laG K
veo---~~~v-~~-------------------------q
voo---o---
-15 Y
-IS V
lOG K
lao K
TUHI7981-24
FIGURE 17. Sinusoidal yeO
Additional Applications
11 K
Figure 19 presents an interesting one-shot which draws no
power supply current until it is triggered. A positive.going
trigger pulse of at least 2V amplitude turns on the amplifier
through Ra and pulls the non·inverting input high. The am·
plifier regenerates and latches its output high until capacitor
e charges to the voltage level on the non·inverting input
The output then switches low. turning off the amplifier and
discharging the capacitor. The capacitor discharge rate is
speeded up by shorting the diode bias pin to the inverting
input so that an additional diSCharge current flows through
DI when the amplifier output switches low. A special feature
of this timer is that the other amplifier. when biased from Vo.
can perform another function and draw zero stand·by power
, as well.
Vo
-II V
TLIHI7981-25
FIGURE 18. Single Amplifier yeO
Figure 18 shows how to build a veo using one amplifier
when the other amplifier is needed for another function.
i
s
.---e------'''''f\r----_-I~TRIGGER
lPF
e
20 K
R8
O.OllfF 1 K
....----Yo
":'
10 K
TUHI7981-28
FIGURE 19. Zero Stand-By Power Timer
3·744
r-----------------------------------------------------------------------------,
Additional Applications
(Continued)
The operation of the multiplexer of Figure 20 is very straightforward. When A 1 is turned on it holds Vo equal to VINl and
when A2 is supplied with bias current then it controls Vo. Cc
and Rc serve to stabilize the unity-gain configuration of amplifiers A 1 and A2. The maximum clock rate is limited to
about 200 kHz by the LM13700 slew rate into 150 pF when
the (VIN1-VIN2) differential is at its maximum allowable value of 5V.
The Phase-Locked Loop of Figure 21 uses the four-quadrant multiplier of Figure 6 and the VCO of Figure 18 to produce a PLL with a ± 5% hold-in range and an input sensitivity of about 300 mV.
r
...s::
~
~
...~....
Co)
C)
~
CC1150Pf
RCl30m
10 K
-12 V
TLlH/7981-27
FIGURE 20. Multiplexer
30 K
10 K
30 K
•
Vo
fC=1 KHz
±5%
HOlDIN
RANGE
TLlH17981-28
FIGURE 21. Phase Lock Loop
3-745
Additional Applications (Continued)
Figure 23 shows a Tachometer or Frequency-to-Voltage
converter. Whenever A 1 is toggled by a positive-going input.
an amount of charge equal to (VH-VLl Ct is sourced into Cj
and Rt. This once per cycle charge is then balanced by the
current of VO/Rt. The maximum FIN is limited by the amount
of time required to charge Ct from VL to VH with a current of
Ie. where VL and VH represent the maximum low and maximum high output voltage swing of the LM13700. D1 is added to provide a discharge path for Ct when A 1 switches low.
The Schmitt Trigger of Figure 22 uses the amplifier output
current into R to set the hysteresis of the comparator; thus
VH = 2 x R X Ie. Varying Ie will produce a Schmitt TriggElr
with variable hysteresis.
82 K
The Peak Detector of Figure 24 uses A2 to turn on A 1
whenever VIN becomes more positive than VO. A1 then
charges storage capacitor C to hold Vo equal to VIN PK.
Pulling the output of A2 low through D1 serves to turn off A 1
so that Vo remains constant.
Va
10 K
-& V
R
10 K
TL/H17981-29
FIGURE 22_ Schmitt Trigger
33 K
+15 V O-~V"'J'"
!
IN914
......n
-15 V
1-'-00----0 Va" 10 mV x.!!rL
Hz
Rt
36 K
TLlHI7981-30
FIGURE 23. Tachometer
+15V r I PEAK DETECT
-15V --J
L-A-_ _~~_ _
HOLD
IN914
30 K
+15V
·'----()..---o Va
10 K -15 V
TL/H/7981-31
FIGURE 24. Peak Detector and Hold Circuit
3-746
.-----------------------------------------------------------------------------, r
Additional Applications (Continued)
The Ramp-and-Hold of Figure 26 sources 18 into capacitor
C whenever the input to A 1 is brought high, giving a ramprate of about 1V/ms for the component values shown.
10"'K,v-_-o
......._v
-5
:JL
s:::
.....
Co)
SAMPLE
HOLD
~
~
r
s:::
.....
Co)
The true-RMS converter of Figure 21 is essentially an automatic gain control amplifier which adjusts its gain such that
the AC power at the output of amplifier A 1 is constant. The
output power of amplifier A 1 is monitored by squaring amplifier A2 and the average compared to a reference voltage
with amplifier A3. The output of A3 provides bias current to
the diodes of A 1 to attenuate the input signal. Because the
output power of A1 is held constant, the RMS value is constant and the attenuation is directly proportional to the RMS
value of the input voltage. The attenuation is also proportional to the diode bias current. Amplifier A4 adjusts the ratio
of currents through the diodes to be equal and therefore the
voltage at the output of A4 is proportional to the RMS value
of the input voltage. The calibration potentiometer is set
such that Vo reads directly in RMS volts.
......
CI
~
vo
CCl1000Pf
RCI1Don
1K
-5 V
TL/H17981-32
FIGURE 25. Sample-Hold Circuit
RAMP
UP
+5VO
-5VO
RAMP
n
.J
+5V
L_5V
DOWN
43 K
IB
+15V
RAMP
ENABLE
Vo
TL/HI7981-33
FIGURE 26. Ramp and Hold
3-747
•
-l r-'V'I/\r-....------------~~_,
500pF
100 K
-jTPt-
SLSl.VOUT
\..-T-I
TL/H/7981-36
FIGURE 29. Pulse Width Modulator
3·749
I....
Additional Applications (Continued)
:::E
+15 V
....I
-Vc
......
150 K
o--'\N\r----,
:e....
Cf)
:::Ii
....I
-15 V
TL/HI79Bl-37
FIGURE 30. Logarithmic Current Source
3·750
,------------------------------------------------------------------------, r
~National
PRELIMINARY
aI
~ Semiconductor
i:
:s::
.......
r
LMC660AM ILMC660AI/LMC660C
CMOS Quad Operational Amplifier
•
•
•
•
•
•
•
•
•
General Description
The LMC660 CMOS Quad operational amplifier is ideal for
operation from a single supply. It is fully specified for operation from + 5V to + 15V and features rail-to-rail output
swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued
CMOS amplifiers in the past are not a problem with this
design. Input Vas, drift, and broadband noise as well as
voltage gain into realistic loads (2 kn and 600n) are all
equal to or better than widely accepted bipolar equivalents.
This chip is built with National's advanced Double-Poly Silicon-Gate CMOS process.
Features
Rail-to-rail output swing
Specified for 2 kn and 600n loads
High voltage gain
Low input offset voltage
:s::
o
aI
aI
1.3 p'vrc
Low offset voltage drift
40 fA
Ultra low input bias current
Input common-mode includes GND
Operation guaranteed from + 5V to + 15V
Iss = 375 p.Alamplifier; independent of V+
Low distortion
0.01 % at 10kHz
Slew rate
1.1 V/p.s
Insensitive to latch-up
Symmetrical gain when sourcing and sinking current
Applications
•
•
•
•
•
•
•
See the LMC662 datasheet for a dual CMOS operational
amplifier with these same features.
•
•
•
•
126 dB
3 mV max
High-impedance buffer
Precision current-to-voltage converter
Long-term integrator
High-impedance preamplifier
Active filter
Sampl.e-and-Hold circuit
Peak detector
Connection Diagram
14
13
12
11
10
9
8
TUH/B767-1
Ordering Information
Package
Temperature Range
Military
14-Pin
Cavity DIP
:s::
oaI
Industrial
Commercial
NSC
Drawing
D14E
LMC660AMD
14-Pin
Small Outline
LMC660AIM
LMC660CM
M14A
14-Pin
Molded DIP
LMC660AIN
LMC660CN
N14A
3-751
~
:s::
o
.......
r
aI
aI
o
o
oo
CD
Absolute Maximum Ratings
......
(Note 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications •
~
CD
Differential Input Voltage
Either Input beyond V+ or V-
~
:E
....I
CD
o
Supply Voltage
....I
Output Short Circuitto GND (Note 1)
Lead Temperature (Soldering, 10 sec.)
:E
......
:E
~
Storage Temp. Range
Junction Temperature (Note 2)
ESD tolerance (Note 10)
1SO"C
SOOV
Operating Conditions
± Supply Voltage
0.7V
16V
Temperature Range·
LMC660AM
LMC660AI
LMC660C
Supply Voltage Range
Continuous
260'C
- 6S'C to + 1S0'C
-SS'C,,;;: TJ";;: +12S'C
-40'C ,,;;: TJ ,,;;: +8S'C
O'C";;: TJ";;: +70'C
4.7SV to 1S.SV
CD
CD
o
:E
....I
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TA = TJ = 2S'C. Boldface limits apply at the temperature extremes.
V+ = SV, V- = OV, VCM = 1.SV, Va = V+ 12 and RL > 1M unless otherwise specified.
LMC660AM
Parameter
Conditions
Input Offset Voltage
Typ
Tested
Limit
(Note 4)
1
3
LMC660AI
Design Tested
Limit
Limit
{Note 5) (Note 4)
3
LMC660C
Design
Limit
{Note 5)
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
Units
3.3
6
6.3
mV
max
3.5
Input Offset Voltage
Average Drift
Input Bias Current
.1.3
(Note 9)
0.04
",VI'C
20
20
4
2
pA
max
20
2
1
pA
max
100
Input Offset Current
(Note 9)
0.Q1
20
100
Input Resistance
Common Mode
Rejection Ratio
OV,,;;: VCM ,,;;: 12.0V
V+ = 1SV
83
83
Negative Power Supply OV";;: V- ,,;;: -10V
Rejection Ratio
94
V+ = SV& 1SV
For CMRR :;, SO dB
70
70
68
63
62
dB
min
70
68
63
62
dB
min
84
83
74
73
dB
min
-0.1
0
-0.1
0
V
max
68
Positive Power Supply SV,,;;: V+ ,,;;: 1SV
Rejection RatiO
Va = 2.SV
Input Common-Mode
Voltage Range
TerraO
>1
70
68
84
82
-0.4
-0.1
0
V+ -1.9 V+ - 2.3
V+ -2.3 y+ - 2.5 V+ - 2.3 y+ - 2.4
y+ - 2.6
Large Signal
Voltage Gain
RL
= 2 kO (Note 6)
Sourcing
2000
400
400
440
200
300
V/mV
min
180
120
90
80
V/mV
min
200
220
100
150
V/mV
min
100
60
SO
40
V/mV
min
300
Sinking
SOO
180
70
RL
V
min
= 6000 (Note 6)
Sourcing
1000
200
150
Sinking
2S0
100
35
3-7S2
r-
DC Electrical Characteristics
(Continued)
Unless otherwise specified, all limits guaranteed for TA = TJ = 25'C. Boldface limits apply at the temperature extremes.
V+ = 5V, V- = OV, VCM = 1.5V, Vo = V+ /2 and RL > 1M unless otherwise specified.
LMC660AM
Parameter
Output Swing
Conditions
V+ = 5V
RL = 2kntoV+/2
Typ
4.87
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
4.82
LMC660AI
LMC660C
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
Units
4.82
4.79
4.78
4.76
V
min
4.77
0.10
0.15
0.15
0.17
0.19
0.21
0.19
V+ = 5V
RL = 600n to V+ /2
4.61
4.41
0.50
V+ = 15V
RL = 2kntoV+/2
14.63
14.50
4.27
4.21
V
min
0.50
0.56
0.63
0.69
V
max
14.50
14.44
14.37
14.32
V
min
0.35
0.40
0.44
0.48
V
max
13.35
13.15
12.92
12.76
V
min
1.16
1.32
1.45
1.58
V
max
16
14
13
11
mA
min
16
14
13
11
mA
min
28
25
23
21
mA
min
28
24
23
20
mA
min
2.2
2.6
2.7
2.9
mA
min
14.40
0.26
0.35
0.43
V+ = 15V
RL = 600n to V+ /2
13.90
13.35
13.02
0.79
1.16
1.42
Output Current
V+ = 5V
Sourcing, Vo
= OV
22
16
12
Sinking, Vo
= 5V
21
16
12
Output Current
V+ = 15V
Sourcing, Vo
= OV
40
19
19
Sinking, Vo
= 13V
39
19
19
Supply Current
All Four Amplifiers
Vo = 1.5V
1.5
2.2
2.9
3-753
V
max
4.31
0.63
o
0)
0)
o
>
3:
......
r3:
o
0)
0)
4.41
4.24
0.30
3:
o
~
......
r-
3:
o
0)
0)
o
o
•
o
C)
CD
AC Electrical Characteristics
:e
...I
V+ = 5V, V- = OV,
~
......
~
CD
CD
Unless otherwise specified, all limits guaranteed for T A
VCM = 1.5V, Vo = V+ /2 and RL
=
>
LMC660AM
Parameter
Conditions
Typ
o
:e
...I
......
:e
~
CD
CD
o
:e
...I
TJ = 25'C. Boldface limits apply at the temperature extremes.
1 M unless otherwise specified •
LMC660AI
LMC660C
Tested
Design
Tested
Design
Tested
Design
Limit
Limit
Limit
Limit
Limit
Limit
Units
(Note 4) (Note 5) (Note 4) (Note 5) (Note 4) (Note 5)
Slew Rate
(Note 7)
1.1
O.S
O.S
0.6
0.7
0.5
V/p.s
min
Gain-Bandwidth Product
1.4
MHz min
Phase Margin
50
Deg
Gain Margin
17
dB
Amp-to-Amp Isolation
(NoteS)
130
dB
Input Referred Voltage Noise
F= 1 kHz
F = 1 kHz
F = 10kHz,Av = -10
RL = 2 kn, Vo = S Vpp
22
nV/./Hz
0.0002
pAl./Hz
0,01
%
Input Referred Current Noise
Total Harmonic Distortion
Note 1: Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature and/or multiple Op Amp shorts
can result in exceeding the maximum allowed junction temperature of 1500C.
Note 2: The junction.ta-ambient thermal resistance of the molded plastiC DIP (N) is 75"C/W.• the molded plastic SO (M) package is 10S'C/W.• and the cavity DIP
(D) package Is 92'C/W. All numbers apply for packages soldered directly into a PC board.
Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings Indicate cond~ions for which the device Is
intended to be functional. but do not guarantee specific performance limits. For guaranteed specifications and test condHions. see the Electrical Characteristics.
The guaranteed speCifications apply only for the test conditions listed.
Note 4: These limits are guaranteed and are used in calculating outgoing AOL
!lote 5: These limits are guaranteed. but are not used In calculating outgoing AOL
Note 6: V+ ~ ISV. VCM ~ 7.SVand RL connected to 7.SV. For Sourcing tests. 7.SV ,;; Vo ,;; 11.5V. For Sinking tests. 2.SV ,;; Vo ,;; 7.SV.
Note 7: V + ~ ISV. Connected as Voltage Follower with 10V step input. Number specified is the slower of the pOSitive and negative slew rates.
Note 8: Input referred. V+ ~ ISVand RL ~ 10 kG connected to V+ /2. Each amp excited in turn with I kHz to produce Vo ~ 13 Vpp.
Note 9: The specHications in the Design LimH column reflect the true performance of the part. while those in the Tested Limit column are degraded to allow for the
unavoidable inaccuracies involved in cost-effective high-speed automatic tes1ing.
Note 10: Human body model. 1.5 kG in series with 100 pF.
3-754
r-
Typical Performance Characteristics Vs =
Supply Current
vs Supply Voltage
3D
~a
2.0
E
iii
150
10
100
]:
,
..... ~
I'...
TJ =25OC
Y
12
16
20
100
o
150
Output Characteristics
Current Sourcing
I
1
I
1
~
;;:.
200
oS
150
~
100
\l~
I
I
10
---+-"'" I
0.01
0.001
100
OUTPUT SINK CURRENT (mA)
0.01
140
120
80
"in'
70
8Ort~~KBoor+H~~~
50
~
~
~
40
~rt~~KBoor+H~-H~
2Ort~~KBoor+H~-H~
!:l
!i!
10
lOOk
10k
......
100
80
I'.
80
i"...
20
1
1M
10
lk
100
2f-
=1=
V
II. ..... VT,=15D"C f-fFTA=,25;:= r-rT, =-55OC
-I I I ~f-
~~
12
nWE (PO)
:-11.-o.-liM$l:Slrnl
16
20
~
~
1,000
100
10
1
10~
J
10,000
~
J,~
OVERSHOOT
L~
I
1o
5M
1M
I
11
1Ay = +10ar-l0
11
'.
:,~
1000
100
10
UNSTABLE
trl
I
•
1O~ OVERSHOOT
2~ OVERSHOOT
I
1
-IO-I-o.I~.oI-o.oo100.0010.01o.11
SINKING
:N ..::~
Stabilityvs
Capacitive Load
~
"I.
'~
... \
It.' .'
.-r,,-ll11pF,OUII'UfSlDCll;tmo\
100,000
UNSTABLE
~
70
\
FREQUEHCY (Hz)
1I
~
.'- : i
,. :
._.C\."IDOpf',CJU1I'UI'SlXllClGIIM
lOOk
Ay = +1
10,000
0
4f-
o
-3
Stabilityvs
Capacitive Load
5
6
,-
90
BO
.\
12
10k lOOk 1M 10M
100,000
B
-~ J,~
15
1"'-I,
10k
Frequency Response
vs Capacitive Load
FREQUENCY (Hz)
Non-Inverting Large Signal
Pulse Response
lk
100
FREQUENCY (Hz)
lB
40
FREQUENCY (Hz)
of
10
,
-20
lk
100
27
24 ~~.
1
10rt~W-+H~-H~~+H~
100
en
o
o
o
0.1
Open-Loop Frequency
Response
CMMR vs Frequency
90
oen
150
~
OUTPUT SOURCE CURRENT (mA)
100
125
1\
50
!i!
0.1
100
Input Voltage Noise
vs Frequency
w
T
75
250
1
0.01
50
TEMPERATURE (oc)
10
0.01
0.001
25
TEWPERATURE (oc)
Output Characteristics
Current Sinking
~
......
r3:
0.0 1
50
TOTAL SUPPLY VOLTAGE (VDC)
10
en
,/.V
"
-150
-50
oen
/. V
o.1
~
-100
o
o
lef7: V
~ lL:e-
1
~
TJ =-55OC
3:
......
r3:
~
:;
~
a
V
TJ =125OC
t
1.0
~
Input Bias Current
Offset Voltage
4.0
3:
oen
en
±7.5V, TA = 25°C unless olherwise specified
SOURCING
LOAD CURRENT (mA)
10
-10-l-o.1-o.o1-o.oo10D.OD1Q.D10.1110
SINKING
SOURCING
LOAD CURRENT (mA)
TLfH/8767-S'
Note: Avoid resistive loads of less than 500n, as they may cause instability.
3-755
o
~
CD
o
:E
..J
......
~
CD
CD
o
:E
..J
......
:E
~
CD
CD
o
:E
..J
Applications Hint
is generally less than 10 pF. If the frequency of the feedback pole is much higher than the "ideal" closed-loop bandwidth (the nominal closed-loop bandwidth in the absence of
CS), the pole will have a negligible effect on stability, as it
will add only a small amount of phase shift.
Amplifier Topolgy
The topology chosen for the LMC660 is unconventional
(compared to general-purpose op amps) in that the traditional unity-gain buffer output stage is not used; instead, the
output is taken directly from the output of the integrator, to
allow rail-to-rail output swing. Since the buffer traditionally
delivers the power to the load, while maintaining high op
amp gain and stability, and must withstand shorts to either
rail, these tasks now fall to the integrator.
However, if the feedback pole is less than approximately 6
to 10 times the "ideal" -3 dB frequency, a feedback capaCitor, CF, should be connected between the output and
the inverting input of the op amp. This condition can also be
stated in terms of the amplifier's low-frequency noise gain:
To maintain stability a feedback capacitor will probably be
needed if
As a result of these demands, the integrator is a compound
affair with an embedded gain stage that is doubly fed forward (via Cj and Cft) by a dedicated unity-gain compensation driver. In addition, the output portion of the integrator is
a push-pull configuration for delivering heavy loads. While
sinking current the whole amplifier path consists of three
gain stages with one stage fed forward, whereas while
sourcing the path contains four gain stages with two fed
forward.
(RF
RIN
+ 1) s:; 46 x
21T x 6BW X RF x Cs
where (RF + 1) is the amplifier's low-frequency noise
RIN
gain and GBW is the amplifier's gain bandwidth product. An
amplifier's low-frequency noise gain is represented by the
LMC660 Circuit Topology (Each Amplifier)
formula
(:I~ + 1)
regardless of whether the amplifier is
being used in inverting or non-inverting mode. Note that a
feedback capacitor is more likely to be needed when the
noise gain is low and/or the feedback resistor is large.
If the above condition is met (indicating a feedback capacitor will probably be needed), and the noise gain is large
enough that:
(~~ + 1) ;;, 24GBW X RF x Cs,
the following value of feedback capacitor is recommended:
TlIHIB767 -4
CF=
The large signal voltage gain while sourcing is comparable
to traditional bipolar op amps, even with a 600n load. The
gain while sinking is higher than most CMOS op amps, due
to the additional gain stage; however, under heavy load
(6000) the gain will be reduced as indicated in the Electrical
Characteristics.
Compensating Input Capacitance
The high input resistance of the LMC660 op amps allows
the use of large feedback and source resistor values without
losing gain accuracy due to loading. However, the circuit will
be especially sensitive to its layout when these large-value
resistors are used.
Cs
2(:1~ + 1)
if
(:I~ +1) < 24GBW XRF x Cs
the feedback capacitor should be:
CF=~GB:~ RF
Note that these capacitor values are usually significant
smaller than those given by the older, more conservative
formula:
Every amplifier has some capacitance between each input
and AC ground, and also some differential capacitance between the inputs. When the feedback network around an
amplifier is resistive, this input capacitance (along with any
additional capacitance due to circuit board traces, the socket, etc.) and the feedback resistors create a pole in the
feedback path. In the following General Operational Amplifier circuit, the frequency of this pole is
1
fp=--21TCs Rp
where Cs is the total capacitance at the inverting input, including amplifier input capcitance and any stray capacitance
from the IC socket (if one is used), circuit board traces, etc.,
and Rp is the parallel combination of RF and RIN. This formula, as well as all formulae derived below, apply to inverting and non-inverting op-amp configurations.
When the feedback resistors are smaller than a few kn, the
frequency of the feedback pole will be quite high, since Cs
CF = CsRIN
RF
General Operational Amplifier Circuit
----,
~---
cr
TUHIB767-6
Cs consists of the amplifier's input capaCitance plus any stray capaCitance
from the circuit board and socket. CF compensates for the pole caused by
Cs and the feedback resistors.
3-756
Applications Hint (Continued)
Typical Single-Supply
Applications (V+ = 5.0 VDC)
Using the smaller capacitors will give much higher bandwidth with little degradation of transient response. It may be
necessary in any of the above cases to use a somewhat
larger feedback capacitor to allow for unexpected stray capacitance, or to tolerate additional phase shifts in the loop,
or excessive capacitive load, or to decrease the noise or
bandwidth, or simply because the particular circuit implementation needs more feedback capacitance to be sufficiently stable. For example, a printed circuit board's stray
capacitance may be larger or smaller than the breadboard's, so the actual optimum value for CF may be different
from the one estimated using the breadboard. In most cases, the values of CF should be checked on the actual circuit,
starting with the computed value.
Additional single-supply applications ideas can be found in
the LM324 datasheet. The LMC660 is pin-for-pin compatible
with the LM324 and offers greater bandwidth and input resistance over the LM324. These features will improve the
performance of many existing single-supply applications.
Note, however, that the supply voltage range of the
LMC660 is smaller than that of the LM324.
Low-Leakage Sample-and-Hold
Output
Input Overdrive
Input overdrive protection has been built into the LMC660,
so that no latching, "output phase changes", or activation
of parasitic junctions occurs when the inputs are taken outside the power supply rails. In addition, this protection inhibits ESD damage whether or not the device is powered up,
and even if the power supply pins are floating. The protection consists of 200n series input resistors and diodes connected from each input to each power supply rail.
If the input to the LMC660 is set above the LMC660's input
common-mode range, the LMC660's output will go to the
positive supply rail. This output will stay at the positive supply rail until the input voltage is dropped back into the input
common-mode range.
Capacitive Load Tolerance
Input
S/H
~ CD4066
TL/H/8767 -7
Instrumentation Amplifier
(
Like many other op amps, the LMC660 may oscillate when
its applied load appears capacitive. The threshold of oscillation varies both with load and circuit gain. The configuration
most sensitive to oscillation is a unity-gain follower. See
Typical Performance Characteristics.
r~
The load capacitance interacts with the op amp's output
resistance to create an additional pole. If this pole frequency is sufficiently low, it will degrade the op amp's phase
margin so that the amplifier is no longer stable at low gains.
The addition of a small resistor (50n to 100n) in series with
the op amp's output, and a capacitor (5.pF to 10 pF) from
inverting input to output pins, returns the phase margin to a
safe value without interfering with lower-frequency circuit
operation. Thus larger vaJues of capacitance can be tolerated without oscillation. Note that in all cases, the output will
ring heavily when the load capacitance is near the threshold
for oscillation.
R3
R4
10k
lOOk
VOUT
R6
10k
R7
91k
20 pot
TL/H/8767 -8
VOUT __ R2
+ 2R1
R4
R2
R3
--::--- x -
VIN
if R1 = R5
R3 = R6
and R4 = R7.
= 100 for circuit as shown.
All resistors should be at least 1 % tolerance. Matching of
R1 to R5, R3 to R6, and R4 to R7 affect CMRR. Gain may
be adjusted through R2. CMRR may be adjusted through
R7.
Rx, Cx Improve Capacitive Load Tolerance
Rx(100.o.)
TLlH/8767 -5
3-757
•
Typical Single-Supply Applications (V+
= 5.0 VDC)
Sine-Wave Oscillator
10 Hz Bandpass Filter
Your
+5V
J>-+-"VOUT
R2
10M
20k
to
~
e~
10 Hz
2.1
TUH/B767-12
Gain = -8.B
20k
10 Hz High-Pass Filter (2 dB Dip)
TL/H/B767 -9
Oscillator frequency is determined by Rl, R2, Cl, and C2:
fosc = 1/2wRC, where R = Rl = R2 and
C = Cl = C2.
-=
This circuit, as shown, oscillates at 2.0 kHz with a peak-topeak output swing of 4.5V.
1 Hz Square-Wave Oscillator
to
= 10 Hz
d
~
Gain
R4
R3
390k
TL/H/B767 -13
0.895
=1
1 Hz Low-Pass Filter
(Maximally Flat, Dual Supply Only)
VOUT .
RI
RI
R4
R2
+5V"-WIr---4>---"M...---'
470k
R3
470k
470k
Your
TL/H/8767-IO
Power Amplifier
fo
d
R4
= 1 Hz
= 1.414
TUH/B767-14
Gain = 1.57
High Gain Amplifier with Offset
Voltage Reduction
+5V . .-
.......""".....--1
R3
..--~.VOUT
VIN -
......."""-4-4
TLiH/B767 -II
Gain
~
-46.8
Output offset
voltage reduced
to the level 01
the input offset
voltage 01 the
bottom amplifier
(typically 1 mV).
TL/H/B767-15
3-758
~National
~ Semiconductor
LMC662AM/LMC662AI/LMC662C
CMOS Dual Operational Amplifier
General Description
The LMC662 CMOS Dual operational amplifier is ideal for
operation from a single supply. It is fully specified for operation from + 5V to + 15V and features rail-to-rail output
swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued
CMOS amplifiers in the past are not a problem with this
design. Input Vas, drift, and broadband noise as well as
voltage gain into realistic loads (2 kn and 6000.) are all
equal to or better than widely accepted bipolar equivalents.
This chip is built with National's advanced Double-Poly Silicon-Gate CMOS process.
See the LMC660 datasheet for a Quad CMOS operational
amplifier with these same features.
Features
•
•
•
•
Rail-to-rail output swing
Specified for 2 kn and 6000. loads
High voltage gain
Low input offset voltage
126 dB
3 mV max
•
•
•
•
•
•
•
•
•
1.3 p'vrc
Low offset voltage drift
40 fA
Ultra low input bias current
Input common-mode includes GND
Operation guaranteed from + 5V to + 15V
Iss = 400 p.Alamplifier; independent of V+
Low distortion
0.01% at 10 kHz
Slew rate
1.1 V/p.s
Insensitive to latch-up
Symmetrical gain when sourcing and sinking current
Applications
•
•
•
•
•
•
•
High-impedance buffer
Precision current-to-voltage converter
Long-term integrator
High-impedance preamplifier
Active filter
Sample-and-hold circuit
Peak detector
Connection Diagram
OUTPUTA....!~U ~V+
2
INVERTING INPUT A .....;.
NON·INVERTING
INPUT A
~
3
4
-
+
V--1----'
7
'~
+iL
L-
OUTPUT B
L
,----
_ - t5_
INVERTING INPUT B
NON·INVERTING
INPUT B
TL/H/9763-1
Ordering Information
,----------r-------------------------------r------,
Temperature Range
NSC
Package
8-Pin
Cavity DIP
Military
Industrial
LMC662AMD
LMC662AID
Commercial
Drawing
D08C
8-Pin
Small Outline
LMC662AIM
LMC662CM
M08A
8-Pin
Molded DIP
LMC662AIN
LMC662CN
N08E
3-759
Absolute Maximum Ratings
(Note 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Differential Input Voltage
± Supply Voltage
Either Input beyond V+ or V0.7V
Supply Voltage (v+ - V-)
16V
Output Short Circuit to GND (Note 1)
Lead Temperature (Soldering, 10 sec.)
Storage Temp. Range
Junction Temperature (Note 2)
-65·CtC? + 150"C
150"C
ESD Tolerance (Note 10)
500V
Operating Conditions
Temperature Range
LMC662AM
LMC662AI
LMC662C
Supply Voltage Range
Continuous
260·C
-55·C ~ TJ ~ +125·C
-40·C ~ TJ ~ +85·C
O·C ~ TJ ~ +70·C
4.75V to 15.5V
DC Electrical Characteristics
unless otherwise specified, all limits guaranteed for TA = TJ = 25·C. Boldface limits apply at the temperature extremes.
V+ = 5V, V- = OV, VCM = 1.5V, Va = v+ 12 and RL > 1M unless otherwise specified.
LMC662AM
Parameter
Conditions
Input Offset Voltage
Typ
1
Tested
Limit
(Note 4)
3
LMC662AI
Design Tested
Limit
Limit
(Note 5) (Note 4)
3
LMC662C
Design
Limit
(Note 5)
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
Units
3.3
6
6.3
mV
max
3.5
Input Offset Voltage
Average Drift
Input Bias Current
1.3
(Note 9)
0.04
",VI·C
20
20
4
2
pA
max
20
2
1
pA
max
70
68
63
62
dB
min
70
68
63
62
dB
min
84
83
74
73
dB
min
-0.1
0
-0.1
0
V
max
100
Input Offset Current
(Note 9)
0.01
20
100
Input Resistance
>1
Common Mode
Rejection Ratio
OV ~ VCM ~ 12.0V
V+ = 15V
83
Positive Power Supply
Rejection Ratio
5V ~ V+ ~ 15V
Va = 2.5V
83
Negative Power Supply OV
Rejection Ratio
Input Common-Mode
Voltage Range
~
V-
~
-10V
V+=5V&15V
For CMRR :;;, 50 dB
Teran
70
68
70
68
94
84
82
-0.4
-0.1
0
V+ - 1.9 V+ - 2.3
V+ - 2.3 y+ - 2.5 V+ - 2.3 y+ - 2.4
y+ - 2.6
Large Signal
Voltage Gain
V
min
RL = 2 kn (Note 6)
Sourcing
2000
400
400
440
200
300
V/mV
min
180
120
90
80
V/mV
min
200
220
100
150
V/mV
min
100
60
50
40
V/mV
min
300
Sinking
500
180
70
RL = 6000. (Note 6)
Sourcing
1000
200
150
Sinking
250
100
35
3-760
DC Electrical Characteristics (Continued)
unless otherwise specified, all limits guaranteed for TA = TJ = 25'C. Boldface limits apply at the temperature extremes.
V+ = 5V, V- = OV, VCM = 1.5V, Vo = V+ /2 and Rl > 1M unless otherwise specified.
LMC662AM
Parameter
Output Swing
Conditions
Typ
V+ = 5V
Rl=2kOtoV+/2
4.87
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
4.82
LMC662AI
LMC662C
Tested
Limit
(Note 4)
Design
Limit
(NoteS)
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
Units
4.82
4.79
4.78
4.76
V
min
0.15
0.17
0.19
0.21
V
max
4.41
4.31
4.27
4.21
V
min
0.50
0.56
0.63
0.69
V
max
14.50
14.44
14.37
14.32
V
min
0.35
0.40
0.44
0.48
V
max
13.35
13.15
12.92
12.76
V
min
1.16
1.32
1.45
1.58
V
max
16
14
13
11
rnA
min
16
14
13
11
rnA
min
28
25
23
21
rnA
min
28
24
23
20
rnA
min
1.3
1.5
1.6
1.8
rnA
max
4.77
0.10
0.15
0.19
V+ = 5V
Rl = 6000 to V+ /2
4.61
4.41
4.24
0.30
0.50
0.63
V+ = 15V
Rl = 2kOtoV+/2
14.63
14.50
14.40
0.26
0.35
0.43
V+ = 15V
Rl = 6000 to V+ /2
13.90
13.35
13.02
0.79
1.16
1.42
Output Current
V+ = 5V
Sourcing, Vo = OV
22
16
12
Sinking, Vo = 5V
21
16
12
Output Current
V+ = 15V
Sourcing, Vo = OV
40
19
19
Sinking, Vo = 13V
39
19
19
Supply Current
Both Amplifiers
Vo = 1.5V
0.75
1.3
1.8
3·761
o
C'I
CD
CD
AC Electrical Characteristics
:E
unless otherwise specified, all limits guaranteed for TA = TJ = 2SoC. Boldface limits apply at the temperature extremes.
V+ = SV,V- = OV, VCM = 1.SV, Va = v+ 12 and RL > 1M unless otherwise specified.
o
...I
.....
~
CD
CD
o
:E
...I
.....
:E
~
CD
CD
o
:E
LMC662AM
Parameter
Conditions
Typ
LMC662AI
LMC662C
Tested
Design
Tested
Design
Tested
Design
Limit
Limit
Limit
Limit
Limit
Limit
(Note 4) (Note 5) (Note 4) (Note 5) (Note 4) (Note
Slew Rate
(Note 7)
1.1
0.8
0.8
0.6
0.8
0.7
Units
5)
V/p.s
min
0.5
Gain-Bandwidth Product
1.4
MHz
Phase Margin
SO
Deg
Gain Margin
17
dB
...I
Amp-to-Amp Isolation
130
dB
Input Referred Voltage Noise F=1kHz
22
nV/,fHz
Input Referred Current Noise F = 1 kHz
0.0002
pAl,fHz
0.Q1
%
(Note 8)
Total Harmonic Distortion
F = 10kHz,Av = -10
RL = 2 kO, Va = 8 Vpp
Note 1: Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature andlor multiple Op Amp shorts
can result in exceeding the maximum allowed junction temperature of 150a C.
Note 2: The iunction-to·ambient thennal resistance of the molded plastic DIP (N) is I 01'C/W, the molded plastiC SO (M) package is 152'C/W, and Ihe cavity DIP
(D) package is 124·C/W. All numbers apply for packages soldered directly into a PC board.
Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Conditions indicate conditions for which the device is
intended to be functional, but do not guarantee specifiC performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
The guaranteed specmcations apply only for the test conditions listed.
Note 4: These
lim~s
are guaranteed and are used in calculating outgOing AOL.
Note 5: These limits are guaranteed, but are not used in calculating outgoing AOL.
Note 6: V+
= 15V, VCM = 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V
,;; Vo ,;; 11.5V. For Sinking tests, 2.5V ,;; Vo ,;; 7.5V.
Note 7: V+ = 15V. C~nnected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
Note 8: Input referred. V+
= 15V and RL = 10 kO connected to V+ 12. Each amp excited in turn w~h 1 kHz to produce Vo = 13 Vpp.
Note 9:The specifications in the Design Limit column reflect the true performance of the part, while those in the Tested Umit column are degraded to allow for the
unavoidable inaccuracies involved In cost-effective high-speed automatic testing.
Note 10: Human body model, 1.5 kO in series with 100 pF.
3-762
r-
Typical Performance Characteristics Vs ~
± 7.5V, TA ~ 25°C unless otherwise specified
150
~ 1200
,-
~
TJ = -55"C
8
50
i'l
~
i
o
/.
1
1
-100
1
1
-ISO
~
~
50
ISO
100
TOTAL SUPPLY VOLTAGE (V ~C)
TEMPERATURE ("C)
Output Characteristics
Current Sinking
Output Characteristics
Current Sourcing
/. V
0.1
0.0 I
a
-50
/.
~
~
~
u
r-
~V
I,.
~
-50
1
16
!
..... , /
r-.....
1
12
. . .v
100
TJ = 25"C
.,o
10
1
1 1 1
TJ = 125"C
I'll
»
s:
......
Input Bias Current
Offset Voltage
1600
1
o0)
0)
Supply Current vs
Supply Voltage
1
!!5:
!!5:
o
r- 1,-
0)
0)
I'll
»
::::::
r-
/. ~
!!5:
o
o
25
50
75
100
125
150
Input Voltage Noise
vs Frequency
250
10
10_!!]
~
~
200
\
150
~
~
V
O. I
O.I~~
--.1-'
0.01
0.0 I
0.001 0.01
0.1
10
100
140
90
120
80
~
~
.........
100
70
i3
0.1
10
~
z
80
50
~
60
40
~
40
60
30
~
20
""
I"
20
"-
-20
Ik
lOOk
IDk
I
1M
10
FREQUENCY (Hz)
100
Ik
6
41-2r-
=F
/,
V
r T... =150OC
= TA=,25;: =
~~ YTI
8
12
TIME U.s)
Frequency Response vs
Capacitive Load
FREQUENCY (Hz)
Stability vs
Capacitive Load
Stability vs
Capacitive Load
100,000
AV
10,000
'J
~
c
g
r--+t--r-
~r-
1.000
100
10
= +1
20
I I
I Av I I
10.000
:!:'.!
'~
~
10% OVERSHOOT
I
-10 -1 -0.1-0.01-0.00100.0010.010.1 1 10
SINKING
SOURCING
LOAD CURRENT (rnA)
.10 or-IO
UNSTABLE
~
UNSTABLE
I
16
10k
-
100,000
0
Ik
IDk lOOk 1M 10M
5
8
100
FREQUENCY (Hz)
FREQUENCY (Hz)
Non-Inverting Large Signal
Pulse Response
of
10
r-....
10
100
100
Open-Loop Frequency
Response
CMRR vs Frequency
~
I'-.
50
OUTPUT SOURCE CURRENT (rnA)
OUTPUT SINK CURRENT (rnA)
a;"
100
o
0.001 0.01
100
~g
I I
I 10% OVERSHOOT
2% OVERSHOOT I
I I
I
I
-10 -t -0.1-0.01 -0.001 0 0.001 0.01 0.1 1 10
SINKING
SOURCING
LOAD CURRENT (rnA)
TL/H/9763-3
Note: Avoid resistive loads of less than 500n, as
they may cause instability.
3-763
0)
0)
I'll
o
TEMPERATURE ('C)
Note: Avoid resistive loads of less than 500n, as
they may cause instability.
oN
<0
<0
o
::::!5
...J
.......
C(
N
<0
<0
o
::::!5
.......
::::!5
...J
~
<0
<0
o
::::!5
...J
Application Hints
tance from the IC socket (if one is used), circuit board
traces, etc., and Rp is the parallel combination of RF and
RIN. This formula, as well as all formulae derived below,
apply to inverting and non-inverting op-amp configurations.
AMPLIFIER TOPOLOGY
The topology chosen for the LMC662 is unconventional
(compared to general-purpose op amps) in that the traditional unity-gain buffer output stage is not used; instead, the
output is taken directly from the output of the integrator, to
allow rail-to-rail output swing. Since the buffer traditionally
delivers the power to the load, while maintaining high op
amp gain and stability, and must withstand shorts to either
rail, these tasks now fall to the integrator.
When the feedback resistors are smaller than a few kn, the
frequency of the feedback pole will be quite high, since Cs
is generally less than 10 pF. If the frequency of the feedback pole is much higher than the "ideal" closed-loop bandwidth (the nominal closed-loop bandwidth in the absence of
Cs), the pole will have a negligible effect on stability, as it
will add only a small amount of phase shift.
As a result of these demands, the integrator is a compound
affair with an embedded gain stage that is doubly fed forward (via Cj and CIf) by a dedicated unity-gain compensation driver. In addition, the output portion of the integrator is
a push-pull configuration for delivering heavy loads. While
sinking current the whole amplifier path consists of three
gain stages with one stage fed forward, whereas while
sourcing the path contains four gain stages with two fed
forward.
However, if the feedback pole is less than approximately 6
to 10 times the "ideal" -3 dB frequency, a feedback capacitor, CF, should be connected between the output and
the inverting input of the op amp. This condition can also be
stated in terms of the amplifier's low-frequency noise gain:
To maintain stability, a feedback capacitor will probably be
needed if
LMC662 Circuit Topology (Each Amplifier)
( RF
RIN
+
1)
:s: ~6 x
27T X GBW X RF X Cs
where
1)
( RF +
RIN
is the amplifier's low-frequency noise gain and GBW is the
amplifier's gain bandwidth product. An amplifier's lOW-frequency noise gain is represented by the formula
1)
( RF +
RIN
regardless of whether the amplifier is being used in an inverting or non-inverting mode. Note that a feedback capacitor is more likely to be needed when the noise gain is low
and/ or the feedback resistor is large.
TLlH/9763-4
The large Signal voltage gain while sourcing is comparable
to traditional bipolar op amps, even with a 600n load. The
gain while sinking is higher than most CMOS op amps, due
to the additional gain stage; however, under heavy load
(600n) the gain will be reduced as indicated in the Electrical
Characteristics.
If the above condition is met (indicating a feedback capacitor will probably be needed), and the noise gain is large
enough that:
2~GBW
X RF X Cs '
( RF + 1) 2
RIN
the following value of feedback capacitor is recommended:
COMPENSATING INPUT CAPACITANCE
The high input resistance of the LMC662 op amps allows
the use of large feedback and source resistor values without
lOSing gain accuracy due to loading. However, the circuit will
be especially sensitive to its layout when these large-value
resistors are used.
CF =
If
2~GBW
Every amplifier has some capacitance between each input
and AC ground, and also some differential capacitance between the inputs. When the feedback network around an
amplifier is resistive, this input capacitance (along with any
additional capacitance due to circuit board traces, the socket, etc.) and the feedback resistors create a pole in the
feedback path. In the following General Operational Amplifier Circuit, the frequency of this pole is
f
X RF X Cs ,
( RF + 1) <
RIN
the feedback capacitor should be:
I
Cs
C _
F - "VGBW X RF
Note that these capacitor values are usually significantly
smaller than those given by the older, more conservative
formula:
= __
1_
p
Cs
2(~+
1)
RIN
27TCsRp
where Cs is the total capacitance at the inverting input, including amplifier input capacitance and any stray capaci-
3-764
r-----------------------------------------------------------------------------,
Application Hints (Continued)
.
General Operational Amplifier Circuit
The load capacitance interacts with the op amp's output
resistance to create an additional pole. If this pole frequency is sufficiently low, it will degrade the op amp's phase
margin so that the amplifier is no longer stable at low gains.
The addition of a small resistor (50n to 100n) in series with
the op amp's output, and a capacitor (5 pF to 10 pF) from
inverting input to output pins, returns the phase margin to a
safe value without interfering with lower-frequency circuit
operation. Thus, larger values of capacitance can be tolerated without oscillation. Note that in all cases, the output will
ring heavily when the load capacitance is near the threshold
for oscillation.
VOUT
---u--RIN
Cr
Cs consists of the amplifier's input capacitance plus any stray capacitance
from the circu~ board and socket. CF compensates for the pole caused by
Cs and the feedback resistor.
Rx{tOO.n)
TLlH/9763-5
Typical Single-Supply Applications
(v+ = 5.0 VDC)
Additional single-supply applications ideas can be found in
the LM35B datasheet. The LMC662 is pin-for-pin compatible
with the LM35B and offers greater bandwidth and input resistance over the LM35B. These features will improve the
performance of many existing single-supply applications.
Note, however, that the supply voltage range of the LM662
is smaller than that of the LM35B.
INPUT OVERDRIVE
Input overdrive protection has been built into the LMC662,
so that no latching, "output phase changes", or activation
of parasitic junctions occurs when the inputs are taken outside the power supply rails. In addition, this protection inhibits ESD damage whether or not the device is powered up,
and even if the power supply pins are floating. The protection consists of 200n series input resistors and diodes connected from each input to each power supply rail.
Low-Leakage Sample-and-Hold
OUTPUT
If the input to the LMC662 is set above the LMC662's input
common-mode range, the LMC662's output will go to the
positive supply rail. This output will stay at the positive supply rail until the input voltage is dropped back into the input
common-mode range.
INPUT
S/H
~CD4066
CAPACITIVE LOAD TOLERANCE
Like many other op amps, the LMC662 may oscillate when
its applied load appears capacitive. The threshold of oscillation varies both with load and circuit gain. The configuration
most sensitive to oscillation is a unity-gain follower. See the
Typical Performance Characteristics.
TL/H/9763-15
3-765
~
s::
.....
r
s::
o
0)
0)
~
:::::
r
s::
o
0)
0)
~
Cx{tOpF)
Using the smaller capacitors will give much higher bandwidth with little degradation of transient response. It may be
necessary in any of the above cases to use a somewhat
larger feedback capacitor to allow for unexpected stray capaCitance, or to tolerate additional phase shifts in the loop,
or excessive capacitive load, or to decrease the noise or
bandwidth, or simply because the particular circuit implementation needs more feedback capacitance to be sufficiently stable. For example, a printed circuit board's stray
capacitance may be larger or smaller than the breadboard's, so the actual optimum value for CF may be different
from the one estimated using the breadboard. In most cases, the value of CF should be checked on the actual circuit,
starting with the computed value.
0)
0)
o
Rx, Cx Improve Capacitive Load Tolerance
TL/H/9763-6
r
s::
o
o
N
CD
CD
o
Typical Single-Supply Applications
(v+ = 5.0 Vocl (Continued)
Instrumentation Amplifier
:E
....I
......
r
:cc
N
CD
CD
o
:E
....I
......
:E
VIN
~
CD
~
CD
o
:E
....I
R3
R4
10k
lOOk
R2
10k pot
VOUT
R6
R7
10k
.----...j
91k
TL/H/9763- 7
VOUT
VIN
=
R2
+ 2R1
R2
ifR1 = R5;
R3 = R6,
andR4 = R7.
X R4
R3
1 Hz Square-Wave Oscillator
R4
= 100 for circuit shown.
10M
All resistors should be at least 1% tolerance. Matching of
R1 to R5, R3 to R6, and R4 to R7 affects CMRR. Gain may
be adjusted through R2. CMRR may be adjusted through
R7.
Cl'
O,068},F
Sine-Wave Oscillator
Cl
200pF
Rl
C2
200pF
R2
392k
VOUT
I
R2
+5V
470k
R3
470k
470k
TL/H/9763-9
+5V
Power Amplifier
R4
20k
01
2N3904
9,lk
+5V
+..JVvv-....-1
VOUT
R2
220k
R3
150k
TL/H/9763-B
TLlH/9763-10
Osciliator frequency is determined by Rl, R2, Cl, and C2:
fose
where R
~
Rl
~
R2 and C
~
Cl
~
1/21TRC
~
C2.
This circuit, as shown, oscillates at 2.0 kHz with a peak-topeak output swing of 4.5V
3-766
r---------------------------------------------------------------------------~
Typical Single-Supply Applications (v+
= 5.0 VDcl (Continued)
10 Hz Bandpass Filter
N
l>
s:::
......
+5V
r
R4
VOUT
V
Cl
0.015s-'
+5V ...-IIIvv-...........
0.015 s-'
~
:::::
r
s:::
oen
R2
2.71.1
R3
fe
d
fO = 10Hz
= 10 Hz
= 0.895
Gain
Q = 2.1
= -8.8
=
en
N
o
390k
I
TUH/9763-12
TL/H/9763-11
1 Hz Low-Pass Filter (Maximally Flat, Dual Supply Only)
High Gain Amplifier with Offset Voltage Reduction
R3
Rl
R4
470k
270k
VOUT
VOUT
R4
0.02
S-.
=
Ie 1 Hz
d = 1.414
Gal" = 1.57
0.1
10M
S-.
TL/H/9763-13
S-.
R5
0.1
R6
+5V +~W_"""""I/v--t
22k
15k
TL/H/9763-14
Gain = -46.8
Ou1put offset voltage reduced to the
level of the input offset voltage of
the bottom amplifier (typically I mV).
3-767
s:::
oen
en
:..,~,...........t-"""--I
VOUT
560k
Gain
s:::
oen
en
10 Hz High-Pass Filter (2 dB Dip)
C2
0.0068}o1'
r
~
co
,---------------------------------------------------------------------,
B ~National
:i ~ Semiconductor
LMC669 Auto-Zero
General Description
The LMC669 uses sampled-data techniques to reduce the
input offset voltage (Vas) of an amplifier or system to approximately 5 )LV. A four-stage comparator samples the
summing node of an inverting-amplifier and generates a correction voltage that is applied to the amplifier's non-inverting input. The offset correction is independent of time, temperature, and supply voltage, and requires no initial or periodic user offset adjustments.
The user may also adjust clock frequency, sample rate, and
the correction voltage's step size and magnitude.
The Auto-Zero operates on supply voltages of ± BV to
± 20V with a quiescent current of 3 mA.
The use of the LMC669 does not limit the performance of
the amplifier it is used with. Full use of the gain-bandwidth
product, slew rate, and DC gain is retained.
The LMC669 can be used as a precision comparator with a
latched, open drain output, or as a low-offset inverting operational amplifier for low-speed applications.
Features
•
•
•
•
•
5 microvolts typical offset voltage
Temperature independent offset correction
Internal or external clocking
Automatic and continuous offset voltage correction
High voltage CMOS-up to ± 20V supplies
Typical Application
1(1)
7(6)
IN 1
CAP
II
8(7)
20(16)
IN 2
LMC669
OUTPUT
2(2)
-b
}I
6(5)
IN REF
OUT REF
-b
TL/H/8561-1
Numbers in () are for 16-pin packages
3-768
.-is:
Absolute Maximum Ratings (Notes 1 & 2)
Power Dissipation (Note 4)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Positive Supply Voltage (V+)
Lead Temp. (soldering, 10 seconds)
+22V
-22V
Negative Supply Voltage (V-)
Voltage of Logic Pins
T1, T2, RESET, CLK
-0.2Vto(V+ + 0.2V)
Voltage at Inputs
-0.2Vto(V+ + 0.2V)
Input Current (Note 3)
INREF, IN1 and IN2
500mW
- 65°C to + 150°C
Storage Temperature
300°C
Operating Ranges (Notes 1 & 2)
Temperature Range
LMC669D
TMINOO:: TA 00:: TMAX
-40°C 00:: TA 00:: +B5°C
Positive Supply Voltage
+BVto +20V
-BVto -20V
Negative Supply Voltage
20mA
INREF, IN1 and IN2 Voltage (Note 5)
-200mVto +2V
600V
ESD Susceptability (Note 10)
Electrical Characteristics The following specifications apply for V+ = +15V, and V- = otherwise specified. Boldface limits apply for TMIN to TMAX; all other limits T A = TJ = 25°C.
Symbol
Vas
Parameter
Maximum Input
Offset Voltage
(Note 9)
Conditions
LMC669BIN, BIM
LMC669BCN, BCM
LMC669CIN, CIM
LMC669CCN, CCM
Signal applied to both
IN1 & IN2, TClK =
50 ,.,.S, VINREF =
OV,0.5V
LMC669CD
Vas
Maximum Input
Offset Voltage
(Note 9)
LMC669BIN, BIM
LMC669BCN, BCM
LMC669CIN, CIM
LMC669CCN, CCM
Signal applied only to
IN1 or IN2, TClK =
50 ,.,.s, VINREF = OV
LMC669CD
Ib
Maximum Input
Bias Current
IN2
Clock Off
Typical
(Note 6)
Tested
Limit
(Note 7)
±5
±25
±25
±10
±50
±50
±5
±25
±10
±50
±50
±20
±100
±100
±10
±50
1
100
15V unless
Design
Limit
(NoteS)
,.,.V
,.,.V
pA
pA
400
IN1 or IN1 & IN2
5
Units
100
pA
75
40
nA
I;. Vas
I;.T
Average Input Offset Drift
VIN1, VIN2
IN1 & IN21nputVoitage
Range (Note 5)
min
-200
0
max
+2.0
+0.5
V
VIN REF
IN REF Input Voltage
Range (Note 5)
min
-200
0
mV
max
+2.0
+0.5
VaUTREF
OUT REF Input Voltage
Range
min
-100
mV
max
+100
mV
PSRR
Power Supply Rejection Ratio
120
VaUT
Integrator Output Voltage Range
±14
±12
Vca
Comparator Open-Drain
Output Voltage Range
0.25
0.4
25
20
Is+
Maximum Positive Supply Current
,.,.vrc
0.1
Low (max)
Sink Current = 1.0 mA
High (min)
RESET Low,
TClK = 50,.,.s
3-769
3.2
mV
V
dB
6.0
10.0
± 11
V
V
19
mA
oen
en
co
m
CD
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Electrical Characteristics
The following specifications apply for V+ = +1SV, and V- = otherwise specified. Boldface limits apply for TMIN to TMAX; all other limits T A = T J = 2SD C. (Continued)
1SV unless
...I
Symbol
Is-
Parameter
Maximum Negative
RESET low,
Supply Current
'TCLK
fs
Maximum Sample Rate
fCLK
Clock Frequency Range
TR
VTH
Typical
Conditions
=
(Note
2.0
SO,..s
T1, T2,
RESET
(Note
7)
Design
Limit
Units
(Note 8)
S.O
mA
100
66.6
56
kHz
min
100
100
Hz
max
100
100
kHz
175
ns
Minimum RESET Pulse Width
Digital Input
Limit
7.0
RESET low, Internal Clock
Threshold
6)
Tested
80
1S0
High (min)
2.9
3.S
V
low (max)
2.9
1.S
V
High (min)
3.S
4.0
V
low (max)
1.S
1.0
V
High
1.0
1.0
,..A
1.0
,..A
Voltage
ClK
IDIN
T1, T2, RESET,
& ClK
Maximum Digital
pA
Input Current
low
1.0
pA
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.
Note 2: All voltages are with respect to AGND.
Note 3: This input current will exist only when an input is driven to a voltage greater than (V+ + 0.2V) or less than -0.2V.lt is due to intemal diode clamps at the
inputs turning on. 11 the current is limited to 20 mA, the overdrive will not be harmful to the LMC669.
Note 4: The typical junction-to-ambient thermal resistance (8JAl of the 16 pin J package is 80'C/W.
Note 5: If input currents are limited, input voltages may be driven beyond these limits and the device will still be functional. The comparator output will be correct as
long as the voltage on either the IN REF pin or the two input INl & IN2 pins is between - 200 mV and
+ 2V.
Note 6: Typicals are at 25°C and represent most likely parametric norm.
Note 7: Guaranteed and 100% tested.
Note 8: Guaranteed, but not 100% production tested. These limits are not used to calculate outgoing quality levels.
Note 9: The LMC669CD exhibits a warm-up drift of approximately 3 ,.V to 5 ,.V in the negative direction. There are two factors that work together to cause this.
Firstly, as the die becomes warm, a temperature gradient forms between pin 2 and pins 1 and 16. Secondly, a thermocouple is created between the metal of the
leadframe and the metal of the wire (usually copper) used to connect the IC to a circuit It takes about 6 minutes for the drift to stabilize. The Nand M packages do
not exhibit this drift because their leadframes are 90% copper.
Note 10: Human body model, 100 pF discharged through 1.5 kn.
3-770
r-
:s::
o
Typical Performance Characteristics
Positive Supply Current
vs Temperature
5.0
'<'
E
Ia
4.0
-
3.0
V)t20VVS=tI5V
I I
'i
§
g;
a
-2.0
.,..
~
-3.0
-4.0
25 45 65
as
§!
Q.2
0
>
2.0
--
~
~
mA
-f.=
...,~
.!\mA
OD
as
25 45 65
'N'
g
oW
r
Vs =tl0VVs=:t 15V
I I
10
25 45 65 85
-35 -15 5
TEMPERATURE (OC)
1.5
~
1.0
~
.5
Ia
~
./
100
e:
...,~
,
.1
-35 -15 5
25 45 65 85
15
10
V!-:tlOV-
VS~:t15VS I I
g
200
~
150
~
~
5
25
45
65
-35 -15 5
85
TEMPERATURE(OC)
50
Ia
5
5
0
10
SINKING{UR~
/
........ t-...
OURCINd CURRENT
5
-15
r\
r\
'l
-10
-5
0
5
10
15
OUTPUT VOLTAGE (V)
TL/H/6561-3
3-771
65 85
TLlH/6561-2
15
V
25 45
TEMPERATURE(OC)
v SUPPLY= :t 15V
TA=25OC
.5.
I I
-35 -15 5
25 45 65 85
Output Current Limit
vs Output Voltage
20
1 1
VS=tl0VVS=:t15V
VS=:t20V
TEMPERATURE (OC)
'<'
Cy=.II'F
FlG.3C
100
VS=:t20V
-35 -15
25 45 65 85
Clock Freque~cy vs
Temperature
Cy=100pF
FIG.3C
20
5
J I
TEMPERATURE (OC)
Clock Frequency vs
Temperature
I13
1(11)
~
I
V):tl0VVS=:t15V
Vs=:t20V
TEMPERATURE (OC)
Integrator Summing Node
Leakage Current
65 85
Cy=1000pF
FlG.3C
2.0
13
~
30
25 45
Clock Frequency vs
Temperature
Vs=:t20V
-35 -15 5
I I
TEMPERATURE(OC)
Cy=10pF
FlG.3C
50
20
VS=tIOVVS=:t15V
-35 -15 5
Clock Frequency vs
Temperature
~
i-"'"
--
r
I
1.0
TEMPERATURE (OC)
'N'
"1"1"
Vs=t20V
-35 -15 5
o.a
Q.4
~
4.0
3.0
VS=:t20V
VCOMP OUT vs Temperature
l'l
~
--
I I
-5.0
TEMPERATURE(OC)
o.s
I
E
VS=tl0V·VS=tI5V
VS=:tl0V
-35 -15 5
CD
s.o
-1.0
1.0
E
T1, T2 & RESET thresholds vs
Temperature
Negative Supply Current
vs Temperature
l- I--
2.0
en
en
•
en
CD
CD
o
Connection Diagram
:!5
16-Pin Dual-In-Line Package
....I
IN1
20-Pin Dual-In-Line (N) Package
20-Pin Small-Outline (M) Package
IN2
IN REF
AGNO
AGNO
IN2
DGND
AGNO
COMPOUT
y+
OGNO
OUTREF
T1
v+
CAP
T2
T1
RESET
T2
elK
AGNO'
OUTPUT
v-
RESET
TL/H/8561-4
ClK
TIE TOGETHER'
Top View
Order Number LMC669D
See NS Package Number D16C
vTLlH/8561-17
Top View
"These pins must be connected as shown to
ensure compatibility with future parts.
Pin Description LMC669 Numbers in () are for 16-pin package
Pin
IN1,IN2
1,20
(1,16)
Description
These are the inputs to the Auto Zero's
comparator. They should be tied together
and connected to the summing node of the
host operational amplifier (op amp). One set
of inputs, either IN1 and IN2 or INREF, must
be between + 2 volts and ground while the
other can go to V + (also refer to notes 3
and 5).
Pin
INREF
2
(2)
3-772
Description
This is the input for the comparator's
reference voltage. Correction of Vos is
accomplished by connecting this pin to a
good clean system ground of its own. One
set of inputs, either IN1 and IN2 or INREF,
must be between + 2 volts and ground while
the other can go to V + (also refer to notes 3
and 5).
Pin Description
Pin
AGND
3,19
(3,15)
DGND
18
(14)
COM POUT
5
(4)
OUTREF
6
(5)
OUTPUT
8
(7)
CAP
7
(6)
ClK
12
(9)
RESET
13
(10)
4
9,10
14
16-pin lMC669 (Continued)
Pin
T1, T2
16,15
(12,11)
Description
These act to shield the IN1, IN2, and
INREF connections from stray
capacitance and leakage which could
degrade the part's performance. They
should be connected to a high quality
ground.
Provides a separate ground for the
internal digital circuitry to prevent noise
from corrupting the comparator inputs.
It should have its own ground
connection.
This is the latched output from the
internal comparator. It is an open drain
which can be left unconnected if not
needed. Its response time is equal to
the sample rate's period. The rise time,
from 10% to 90%, is nominally 500 ns
with a 10 kO pull-up resistor. The output
is typically capable of swinging from
+ 0.25 (at 1 mAl to + 25 volts.
Output reference; for proper integrator
operation this input should be
connected to a good system ground,
such as the ground to which INREF is
connected.
This is the lMC669's integrator output.
It can swing from -12 to + 12 volts in
0.2 volt steps with a ;;, 10 KO load and
no external integrating capacitor.
When a capacitor is used to decrease
the correction voltage's step size, it is
connected between CAP and OUTPUT.
It parallels an internal 10 pF capacitor.
External clock input/internal adjust.
The frequency of the internal clock
(nominally 100 kHz) may be reduced
with an external capacitor or an
external clock connected to the ClK
input. The logic thresholds for this input
are 4 volts for a logic high and 1 volt for
logic low. The internal clock can be
stopped by applying a logic high,
through a diode, to the ClK input.
When a logic low is applied to the
diode, the internal clock runs freely.
(See Figure 3)
Comparator reset. At power-up, or
when RESET is pulled low during
normal operation, the Auto Zero will run
at its fastest sample rate. This allows
for the quickest Vos nUlling.
leave this pin unconnected.
Connect these pins together.
Connect to analog ground.
Description
These pins select one of five clock
divider ratios. The ratio, hence the
sample rate can be changed by
applying V+ or ground to T1 and T2.
The ratio chosen by these inputs is
valid after the comparator's output
changes state; i.e., a zero-crossing
between the offset and correction
voltage has taken place. These inputs
can also be changed at any time to
modify the lMC669's sample rate. Use
the table below to determine the
reduction in the clock's frequency for
each combination of T1 and T2.
T1
T2
RESET
X
o
1
X
1
1
o
16
1
128
o
o
V+,V-
17,11
(13,8)
o
1
1
4
1024
Positive and negative power supply
inputs. Typical supply voltages are ± 15
volts, but operation will take place from
± 8 to ± 20 volts. Power supply current
is typically 3 mA. Bypass capacitors
(0.01 - 0.1 ItF) should be connected
to the power supply pins.
Application Hints
1.0 INTRODUCTION
In its standard application shown in Figure 1, the lMC669
continuously samples the summing node of an inverting amplifier and generates a correction voltage for the amplifier's
non-inverting input, nulling the amplifier's input offset voltage (Vos) to 5 ltV. The offset correction is independent of
time, temperature, and supply voltage. The lMC669 eliminates the need for initial or periodic offset adjustments,
compensates for Vos drift due to temperature changes, allows the use of greater DC gain, and increases immunity to
changes in power supply voltages.
At the input of the lMC669 is a sampled-data differential
comparator with very low offset voltage. When the comparator samples the summing node voltage and determines
that it is not at ground, the lMC669's output generates a
small voltage step in the opposite direction of the error. The
size of the step and the sample rate are user-selectable.
The correction voltage continues to step up or down until
the summing node is within the Vas of the lMC669-typically 5 ltV. At this point the Auto Zero continues to monitor
the summing node and perform any needed corrections. An
internal divider generates five different sampling rates for
any given clock frequency.
The only external parts needed for Vos correction of most
amplifiers are two resistors and one capacitor. Since the
capacitor is in the feedback loop of an integrator, it should
be a low leakage type (polycarbonate, polypropylene, polystyrene, mylar, etc.). The tolerance of the resistors and capacitor is not critical (10% components are satisfactory).
3-773
~r-------------------------------------------------------------~
CD
CD
(.)
Application Hints (Continued)
:i
-15VDC
....I
+15VDC
1(1)
20 (16)
2(2)
TUH/B561-5
FIGURE 1. Typical Application
1.1 CIRCUIT OPERATION
At the heart of the LMC669 is a four-stage precision sampled-data comparator, shown in Figure 2. The circuit operates by successively zeroing the offset of each stage, resulting in a very high gain amplifier with extremely low input
offset voltage.
After a comparator decision is made, the latch is enabled
and holds the comparator's output state. At the same time
this state appears at COMPOUT. The latch also generates a
± 1V signal that charges capacitor Cl to ± 1V. C1 's charge
is then transferred to the integrator's feedback capacitor C2.
Since C2 is five times larger than Cl, a 200 mV step will
appear at the integrator's output. Further reduction of the
step size is possible with an external capacitor connected in
parallel with C2 (between OUTPUT and CAP). The integrator output is then attenuated by a resistive divider network
before being applied to the external op amp's non-inverting
input, completing the offset correction loop.
The clock Signal drives the input of the divider (See Figure
2). Depending on the logic levels at inputs Tl, T2, and
RESET, the clock can be divided by five different ratios (1,
4, 16, 128, and 1024). The output of the divider triggers the
sequencer which controls the auto-zero function.
1.2 CLOCKS
In order to control the events that take place in the LMC669,
an internal Schmitt trigger oscillator generates a 100 kHz
clock. This oscillator's frequency can be lowered by connecting a capacitor between the ClK input and ground as in
Figure 3c. It can also be overridden by applying an external
clock source (S: 100 kHz) to the CLK input (Figure 3a). Further, the clock can be halted with a diode connected as
shown in Figure 3(b).
1.3 INPUT RANGE
The IN1, IN2, and INREF inputs can accept signal levels
between 0 and + 2 V. However, as long as both IN1 and
IN2, or IN REF, is kept between 0 and 2V the other input (or
inputs) can be taken to V+ and, if input current limiting
(S:20 mAl is provided, to V-. In most auto-zero applications
INI and IN2 will be able to go to these extended limits since
INREF will normally be grounded.
When the LMC669 is powered-up or reset the internal divider automaticaliy divides by one. This allows the Auto-Zero to
operate at maximum sampling rate so that large initial offsets can be rapidly corrected. When the comparator toggles
for the first time, this indicates that input null has been
achieved and that maximum sample rate is no longer required. The latch then switches the divider from + 1 to the
ratio programmed via Tl and T2. By employing this "two
speed" approach the device. can move quickly to handle
turn-on transients and then shift to the optimum "gear" for
long term offset correction. It is also possible to return to the
maximum sample rate via the RESET input so that nonpower-up transients can be dealt with as well.
3-774
r-------------------------------------------------------------------------------------,
Application Hints (Continued)
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en
CD
TL/H/8561-6
FIGURE 2. Block Diagram
CLOCK
CLOCK
CLOCK
TT
J1..fLJ
100 Hz TO 100 KHz
(a)
'
ON
SOFF
(b)
.
~
ICr
Cr(pF)=CLOCK PERIOD{j.S)
I.e., 100 pF ---lOOpS
(e)
TL/H/8561-B.
.
FIGURE 3. Clock Input. External clock (a), controlling internal clock (b), reducing internal clock frequency (c).
3-775
Application Hints (Continued)
Now choose C, the integrator's external feedback capacitor,
to set the final step size to 1 ,..V. Using equation (2a):
2.0 APPLICATION CIRCUITS
The most general application of the Auto-Zero is offset correction of an inverting op amp as shown in Figure 1. The
example below shows how the integration capacitor and the
resistor divider are chosen.
CI R2
- C2
dv(RI + R2)
with RI = 10 kO, R2 = 130, CI = 2 pF,
and C2 = 10 pF, yields
C=
Determine the maximum expected offset voltage from the
op amp characteristics and the requirements of the overall
system. The correction voltage swing capability should be
greater than or equal to this value. Also select the minimum
system resolution and the time that can be allowed to null
the initial offset. These will determine the correction voltage
step size. The magnitude of the correction voltage (Vcarr)
and the step size (dv) are defined according to equations 1
and 2:
Correction voltage = Veorr = Voul R R2R
1+ 2
C "" 2500pF
The null time for this example, with an amplifier offset of 15
mV, step size of 1 ,..V, and initial sample rate of 100 kHz, is
Null time =
Vas
(dv)(sample rate)
= 150 msec
If this is too slow, the step size can be increased.
(1)
OP AMP INPUT BIAS CURRENT
Input bias current should be considered when selecting an
op amp that is nulled by the LMC669. If this current is too
high, the result is a significant voltage drop across the feedback components and consequent output offset. The Auto
Zero will not correct this error since it does not appear as a
voltage at the summing node. Therefore, use low resistance
feedback networks, or op amps with low input bias current
such as the LF156, LF400, and LF411.
Vo is typically ± 12V for ± 15V supplies.
R2 -_
RI Veorr
(VA - Veorr)
(1a)
10KVeorr
(12 - Veorr)
for RI = 10 kO (For proper operation RI
be greater than 10 kO.)
step size
C=
= dv = 1.0V
(c
+ R2 should
NOISE
C
2 : C) (RI :2 RJ
CI R2
- C
dv(RI + R21
2
Through careful selection of the sample rate and step size a
compromise can be made between noise and null time. Low
sample rates achieve low noise but take a long time to null
an offset or correct it when a sudden change occurs. High
sample rates can quickly null or correct changes in Vas but
do so with an increase in noise. Step size directly affects the
null time and the amount of noise introduced: small step
sizes « 100 nV) contribute almost no noise, but result in
long null times.
(2)
(2a)
with CI = 2 pF, C2 = 10 pF, RI and R2 from Eq. 1a.
CI and C2 are internal.
A further consideration regarding the selection of step size
is resolution: the magnitude of the smallest significant signal. In the case of nulling the Vas of an op amp used with a
digital-to-analog converter (DAC) the smallest signal is the
voltage produced by the least-significant bit (LSB). Therefore, the correction voltage's step size 'would need to be
much smaller than the magnitude of the DAC's LSB in order
to retain the DAC's desired resolution.
Low noise LMC669 applications are beneficial to instrumentation and audio electronics. An LM833 low noise operational amplifier (4.5 nV IYHz) with the LMC669 is shown in
Figure 4. In this circuit the Auto Zero adds only 1 nV I YHz
referred to the amplifier's input. To achieve this the step
size is set to 100 nV. The sample rate, with the internal
clock free-running, is set to 98 Hz (clock frequency +
1024), and input and output filters are added to the
LMC669. The input filter prevents switching transients from
reaching the amplifier input and the output filter attenuates
AC components of the steps at the Auto Zero's output. The
filter at the op amp's input also introduces a pole at
1
Finally, for proper operation, the sampling period should be
longer than the amplifier's settling time. 10
or more
should be adequate for most contemporary amplifiers.
,..S
DESIGN EXAMPLE
As an example, assume that the offset of the op amp in
Figure 1 is expected to be no more than 15 mV and the
system can tolerate a 1 ,..V square wave at a rate equal to
the internal clock. Begin by using RI and R2 to set the maximum correction voltage to 15 mY. The LMC669's output
can swing to ±12 volts with a 10 KO load and a ±15 volt
power supply. RI and R2 should be chosen to reduce this to
15 mY:
R2 =
(3)
and a zero at
1
Fz
= 21TRtCt
The maximum Vas that can be corrected by the circuit in
Figure 4 is 12 mY. More offset correction can be obtained
while retaining good noise performance by increasing the
size of R2 and C the same percentage. Increasing C compensates for the reduced attenuation caused by increasing
R2. This allows the step size to remain the same but increases the amount of correction voltage applied to the op
amp.
RI Veorr
Va - Veo"
(10K) (0.015)
(12 - 0.015)
= 12.50 :::;: 130
for ±15V supplies and RI = 10K.
3-776
Application Hints
(Continued)
-15VDC
v-
1 (1) IN 1
+15VDC
RESET
V+
20 (16) IN 2
COM POUT
CAP
2(2) INREF
OUTPUT 1-:":"'--"
LMC669
3(3) AGND
OUTREF
19(15) AGND
DGND
5.1 kll.
Rf
10kll.
~
V1nD-'W_-.I\II,fIr-.....,
.IJlF
TL/H/8561-9
FIGURE 4. Low Noise Application
-15VDC
1(1)
20(16)
2(2)
3(3)
19 (15)
IN 1
+15VDC
V-
RESET
IN 2
V+
COM POUT
CAP
IN REF
LMC669
OUTPUT
AGND
OUTREF
AGND
DGND
R,
10kll.
Ill.
.22JlF
~
TL/H/8561-10
FIGURE 5. Zeroing LM1875 Power Op-Amp
3·777
Application Hints (Continued)
« 0.6 Hz) are sampled. In this application the output of the
op amp is sampled and compared with a reference ground.
The correction output from the Auto Zero now replaces the
ground reference for the feedback resistor connected to the
inverting input.
POWER AMPLIFIERS
For applications such as motor control, automated servo
systems, and power amplification the LMC669 can also be
used with amplifiers other than standard small signal op
amps. Figure 5 shows how the Auto Zero can allow an
LM1875 audio power amplifier to operate with very low offset. While the sample rate for this configuration is not critical, the LMC669's output step size should be set for less
than 1 p.V to ensure low system noise.
Systems can also benefit from the Auto Zero. Figure 7
shows how the Vos of an MF6 Butterworth low-pass
switched capacitor filter is nulled by the LMC669. The Auto
Zero's INl and IN2 inputs are connected to the MF6's out·put while INREF is connected to its input. The correction
signal is applied to the MF6's Vos ADJ input. RC low-pass
filters (Rf1, '11 and Rf2, '121 are used to reduce AC signals
at the LMC669's inputs and provide current limiting. It is
important to set each passive RC filter's cutoff as low as
possible, at most 0.1 of the MF6's fa.
NON-INVERTING AMPLIFIERS AND SYSTEMS
A variation of the above circuit appears in Figure 6 with the
LMC669 operating as a DC-servo integrating feedback loop.
This configuration is applicable when the Auto Zero is used
with non-inverting op amps amplifying AC-only signals. The
output error of the amplifier is reduced to the Vos of the Auto
Zero, typically 5 p.V. A filter at the input of the LMC669 limits
current and ensures that only DC and very low frequencies
This correction makes the MF6 useful in applications calling
for good DC accuracy.· The MF6's typical 250 mV offset is
decreased to 5 p.V with a step size of 1 p.V.
-15VDC
1(1)
IN 1
20(16)
+15VDC
V-
COMPOUT
IN 2
2(2)
CAP
INREF
3(3)
19(15)
LMC669
OUTPUT
AGND
OUTREF
AGND
DGND
9
100k.ll
10k.ll
1/,F
~
vin
Vout
100.ll
R
TUH/8561-11
FIGURE 6. DC Servo Loop
3-778
.-3:
Application Hints (Continued)
oQ)
Q)
<0
-15VDC
1(1)
20(16)
2(2)
3(3)
19(15)
Cf1 1 JlF
~
IN 1
V-
RESET
COM POUT
lMC669
OUTPUT
IN 2
IN REF
CAP
AGND
OUTREF
AGND
DGND
Rf1
10 kD.
-5VDC
~
10
8
Vin
N.C.
IN
ClK IN
OUT
MF-6
360-'1
3
12
7
TLlH/8561-12
FIGURE 7. Auto zeroing a system. In this case the 250 mV offset
of a switched-capacitor low-pass filter is corrected by the LMC669.
MAINTAINING DAC LINEARITY
amplifier can generate an output voltage from 0 to 25 volts
and a maximum current of 3 amperes. The actual output is
determined by
The LMC669 is particularly useful for zeroing the offset of
an op amp used with a CMOS digital·to-analog converter
(DAC). For good linearity the DAC's two outputs (ioul and
lout> must be connected to identical ground potentials. The
presence of op amp Vas (and its drift due to temperature)
will degrade the DAC's linearity. Even though the effects of
Vas can be corrected by trimming, a static trim will not be
very helpful if the Vos changes with respect to temperature.
V
- -VredD)
OUI-~
("D" is the value of the digital code, base 10). The magnitude of each step is
1 LSB
Figure 8 shows the DAC1208 with a 10V reference driving
an LF357. The linearity of this DAC will degrade by 0.01 %
for each millivolt of op amp Vas. Therefore, the LF357's
typical offset of 5 mV will turn the 12-bit DAC1208's 0.012%
linearity error into 0.062%. What was a 12 bit linear device
now has only 9 bits linearity. The original linearity specification can be retained by connecting an LMC669 to the inputs
of the LF357, rendering the non-linearity due to Vos and
temperature drift negligible. The DAC is now able to operate
at its published linearity specifications independent of Vas
and temperature.
=
IVre11
4096
Stable operation of the LM1875 is ensured by the RC combination connected to the inverting input.
LMC669 AS A COMPARATOR
The LMC669's operation as a comparator is shown in Figure 10. Its input impedance is 5 kO with 160 pF to ground.
For proper operation as a comparator INI and IN2, or INREF, should be kept between 0 and 2V while the other input
(or inputs) can be taken to V+. If input current limiting
(:0:20 mAl is provided, the inputs can also go to V-. (In
addition, please refer to notes 3 and 5 under "Electrical
Characteristics" .)
Figure 9 shows the schematic of a unipolar power DAC.
One use of the power DAC is as a digitally controlled power
supply having the ability to sink current, in the case of inductive loads, as well as source current. The linearity of the
DAC is preserved by the nulling action of the LMC669 connected to the inputs of the LM1875 power amplifier. The
The open collector output can be pulled-up to typically 25
volts. When the sink current is 1 mA the output can pulldown to 0.25V. Outputs closer to ground are possible with a
larger pullup resistor.
3-779
en ,-------------------------------------------------------------------------------------,
CD
CD
to)
Application Hints (Continued)
:E
...J
-15YDC
1(1)
20(16)
2(2)
3(3)
19(15)
+15YDC
IN 1
CAP
IN 2
INREF
Lt.tC669
OUTPUT ~""'---.
AGND
OUTREF
AGND
DGND
~~--,
9
10k.o.
-20Y TO +20Y ~~-R~"i::_~=J.-,J::.f
10.0.
TUH/8561-13
FIGURE 8. Reducing Vos-induced linearity errors in a 12-blt DAC by 0.01% ImVoffset.
AGND
AGND
INREF
IN 1
OUTPUT
IN 2
Rl
10k.o.
RZ
10.0.
TUH/8561-14
FIGURE 9. Power DAC with ± 20Vp_p and 3A output capabilities.
3-780
r-----------------------------------------------------------------------------, r
i!:
Application Hints (Continued)
n
en
en
LOW-FREQUENCY, HIGH-GAIN AMPLIFIER
For applications that require precision high-gain DC and
low-frequency performance, the LMC669 can be connected
as an amplifier as shown in Figure ". For a closed-loop
gain of -1000 the useful frequency range is typically
F
max
CD
+ R*
Hz
mVof step size
= 20 -,--------
TLlH/6561-16
'R
= 10K. For inpuls grealerlhan 2 volls.
FIGURE 10. Low-Speed Precision Comparator
TL/H/6561-15
FIGURE 11. Low Offset, High Gain,
Low Frequency Op Amp.
Bandwidth'" 20
H Z . . sample rale
mY 01 step size
= 100 kHz.
•
3-781
~
C'I
C")
a..
....I
~
o
0)
r----------------------------------------------------------------------------,
~National
.
~ Semiconductor
C'I
a..
;;: LP124/LP2902/LP324 Micropower Quad
C'I
.Operational Amplifier
a..
....I
....I
General Description
Features
The LP124 series consists of four independent, high gain
internally compensated micropower operational amplifiers.
These amplifiers are specially suited for operation in battery
systems while maintaining good input specifications, and
extremely low supply current drain. In addition, the LP124
has an input common mode range, and output source range
which includes ground, making it ideal in single supply applications.
•
•
•
•
•
•
•
•
These amplifiers are ideal in applications which include portable instrumentation, battery backup eqUipment, and other
circuits which require good DC performance and low supply
current.
Connection Diagram
Low supply current
Low offset voltage
Low input bias current
Input common mode to GND
Interfaces to CMOS logiC
Wide supply range
Small Outline Package available
Pin-for-pin compatible with LM124
125 ",A (max)
2 mV (max)
4 nA (max)
3V
<
V+
<
32V
Simplified Schematic
Dual·in·Line (J, N) and SO (M)
OUT
TUH/6562-1
Order Number LP124J or LP324J
See NS Package Number J 14A
GND
Order Number LP324M or LP2902M
See NS Package Number M14A
TL/H/6562-2
Order Number LP324N or LP2902N
See NS Package Number N14A
3-782
rIf Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
32Vor ± 16V
26Vor ± 13V
LP2902
32V
Differential Input Voltage
LP2902
26V
-0.3Vto 32V
Input Voltage (Note 1)
-0.3Vt026V
LP2902
Power Dissipation
(Note 3)
J
500mW
Package
N
500mW
M
500mW
150'C
150'C
150'C
90'C/W
90'C/W
140'C/W
~
......
r-
""tI
N
CO
TjMax
Ilja
Operating Temp. Range
Storage Temp. Range
Soldering
Information (10 sec.)
Vapor Phase (60 sec.)
Infrared (15 sec.)
Continuous
Output Short-Circuit to GND
(One Amplifier) (Note 2)
V+ ,,;; 15V and TA = 25'C
ESD Susceptibility (Note 9)
""tI
.....
N
Operating Conditions
Absolute Maximum Ratings
(Note 4)
(Note 4)
(Note 4)
-65'C ,,;; T,,;; 150'C
300'C
o
N
......
r-
""tI
Co)
N
~
260'C
215'C
220'C
±500V
Electrical Characteristics (Note 5)
LP2902 (Note 8)
LP124
Symbol
Parameter
Conditions
Tested
Typ Limit
(Note 6)
Design
Limit
(Note 7)
Tested
Typ Limit
(Note 6)
Design
Limit
(Note 7)
LP324
Tested
Typ Limit
(Note 6)
Design
Limit
(Note 7)
Units
Limits
mV
(Max)
Vas
Input Offset
Voltage
1
2
4
7
2
4
10
2
4
9
Ib
Input Bias
Current
1
4
8
8
2
20
40
2
10
20
los
Input Offset
Current
0.1
1
2
2
0.5
4
8
0.2
2
4
nA
(Max)
Avol
Voltage
Gain
RL = 10k
toGND
V+ = 30V
100
70
60
60
70
40
30
100
50
40
V/mV
(Min)
CMRR
Common
Mode Rej.
Ratio
V+ = 30V
100
OV,,;; Vcrn
Vcrn < V+ - 1.5
85
80
75
90
80
75
90
80
75
dB
(Min)
PSRR
Power
Supply Rej.
Ratio
V+
= 5Vt030V 100
85
80
75
90
80
75
90
80
75
dB
(Min)
Is
Supply
Current
RL
85
125
150
200
85
150
250
85
150
250
/LA
(Max)
Vo
Output
Voltage
Swing
IL = 350 p.A
toGND.
Vcrn = OV
3.6
3.4
3.1
Y+-1.9Y 3.6
3.4
Y+-1.9Y 3.6
3.4
Y+-1.9Y
V
(Min)
0.7
0.8
1.0
1.0
0.7
0.8
1.0
0.7
0.8
1.0
V
(Max)
=
00
IL = 350 /LA
toV+
Vcrn = OV
nA
(Max) .
Output
lout
Source Source
Current
Va = 3V
Yin (diff) = 1V
11
9
4
4
10
7
4
10
7
4
mA
(Min)
lout
Sink
Output
Sink
Current
Vo = 1.5V
Yin (diff) = 1V
6
5
4
4
5
4
3
5
4
3
mA
(Min)
lout
Sink
Output
Sink
Current
Vo = 1.5V
Vcrn = OV
5
3
0.5
1.5
4
2
1
4
2
1
mA
(Min)
Isource
Output
Yin (diff)
ShorttoGND
20
25
35
35
20
25
35
35
20
25
35
35
mA
(Max)
= 1V
3-783
•
Electrical Characteristics (Note 5) (Continued)
LP2902 (Note 8)
LP124
Symbol
Parameter
Conditions
Isink
Output
ShorttoV+
Vin (diff) = 1V
Tested
Design
Limit
Limit
(Note 6)
(Note 7)
20
35
Typ
15
LP324
Tested
Design
Limit
Limit
(Note 6)
(Note 7)
20
35
Typ
15
Typ
Tested
Design
Units
Limit
Limit
Limits
(Note 6)
(Note 7)
20
35
15
mA
25
(Max)
Vos
Drift
7
10
10
",VIC"
los
Drift
5
10
10
pAlC"
100
100
100
KHz
50
50
50
V/mS
GBW
Gain
,
Bandwidth
Product
Slew Rate
Sr
Note 1: The input voltage is not allowed to go more than -0.3V below V- (GND) as this will tum on a parasitic transistor causing large currents to flow through the
device.
Note 2: Short circuits from the output to GND can cause excessive heating and eventual destruction. The maximum sourcing output current is approximately 30 rnA
independent of the magnitude of V+. At values of supply vottage in excess of 15 Voc. continuous short-circuit to GND can exceed the power dissipation ratings
(particularly at elevated temperatures) and cause eventual destruction. Destructive dissipation can result from simultaneous shorts on all amplifiers.
Note 3: For operation at elevated temperatures, these devices must be derated based on a thermal resistance of 8io and TI max. Ti = TA + 8jaPo.
Note 4: The LP124 may be operated from - 55°C ,;: TA ,;: + 125"C. The LP2902 may be operated from - 40"C ,;: TA ,;: + B5°C, and the LP324 may be operated
from O"C ,;: TA ,;: +70"C.
Note 5: Boldface numbers apply at temperature e"tremea. All other numbers apply only at TA = Ti = 25°C, V+ = 5V, Vern = V/2, and RL =100k
connected to GND unless otherwise specified.
Note 6: Guarenteed and 100% production tested.
Note 7: Guaranteed (but not 100% production tested) over the operating supply voltage range (3.0V to 32V for the LP124, LP324, and 3.0V to 26V for the LP2902),
and the common mode range (OV \0 V+ -1.5V), unless otherwise specified. These limits are not used to calculate outgOing quality levels.
Note 8: The LP2902 operating supply range is 3V to 26V, and is not tested above 26V.
Note 9: The test circuH used consists of the human body model of 100 pF in series with 15001}.
Typical Performance Curves
Input Voltage Range
30
J.!..
20
!i!
~
15
~
TA=l~ ~
25
~
iE
10
f
5
Input Current
TA=, 25
i~
~
5
I
2 r-- r--
V
I
15
25
20
-55
30
~
lii'
~
120
RL = lOkI! TOIGNO
~
~!i!
80
!i!
J
I
«J
J
0
0
10
20
./
90
~
il:
iii
30
0
125
25
30
v> SUPPLY VOLTAGE (Vee)
«J
8J
70
iii
0
100
IlIlIm
~'tti'
I::~
~ 1IIIIi"t~~1I\12~~1
=>0
"'0=
70
8J
I"-
8i~
30
lel!i!
2D
10
0
IlIlm
111111111
111111111
100
l~
!II
8JlI,
~~ 50
fli «J
TA= 125~-,,:
TA= -55OC
10
15
lk
10k
lOOk
f FREOUEMCY (Hz)
25
20
Power Supply
Rejection Ratio
Vee= 5 Vee, RL= 1kl!
50
«J
30
2D
10
0
-10
-2D
10
5
v> SUPPLY VOLTAGE (Vocl
1111111111111110
111111
~
~...,'.:-
~oc
,
60
Open Loop
Frequency Response
160
~
~,,~
~
120
TA lIMPERATURE (OC)
Voltage Gain
~
~
~
! ~~
'<'
.3
I
v> POWER SUPPLY VOLTAGE (=+Vocl
lii'
r-- V>=5Vee
0
10
-~
i'"""" v>= 15Vee """"'r-..
::;;;;
1
Iv>
VCM="2 -
V>=3DVee~r--
.!P
j""
0
!
~
~~
0
g
!
~'\=55OC
Supply Current
150
3
111
10
100
lk
Vs=t2·5V
TA=25OC
-E
'"
10k
lOOk
f FREQUENCY (Hz)
TL/H/B562-1 B
3·784
Typical Performance Curves (Continued)
Voltage Follower
Pulse Response
~
80
I I I
I I I ~
I I I I
60
v+=5V
RL=2kJl
I
~ ~
>= i
40
20
1\
I
2
s;-
80
!;5
60
5~
20
j:w
I
1
o
\..
~ 'r- J
~ ~ 3
o ~ 'r- J
o 100 200 300
'-~
Common Mode
Rejection Ratio
Voltage Follower Pulse
Response (Small Signal)
~
100
90
I
I
~
III
70
-
'.
~~
•
an.
%0
~~
8
: ~opi- I I-I
40
I I I
I I I
o
o
500 600 700 BOO
I
200
40
30
I
20
~
10
::;
1
00
50
OLll~~~llill~~Lll~
~
600
800
1000
10
100
t TIME (I's)
t TIME U.S)
lk
10k
lOOk
1M
f fREQUENCY (Hz)
TLlH/8562-20
Large Signal
Frequency Response
Output Characteristics
Current Sinking
Output Characteristics
Current Sourcing
5'-'--'-'"TTT11rr-rT"1"TTTTrr-rrrmm
-rr~ITmmn~~mm
10
10
".
".~
Z
,:,+-=
1°
Y+=5V oc
=}A2~55"C.=
E
T,.,=2.5"C
iI"
TA=125"C
111111
o
O~WU~~LW~L-~~
100
Ik
10k
0.1
0001
lOOk
Q01
0.1
10
100
I: OUlPUT SOURCE CURRENT (rnA DC)
f fREQUENCY
111111111
0.001
0.01
0.1
10
'.- OUlPUT SINK CURRENT (rnA DC)
Current Limiting
~
g
1
~
B
!5
§
r- rr- r30 r- 25
,,-
~~
" r-
40
35
20
15
10
I
- -
Y+",-:;,voc
-
....
i'
:'0
o
-55-35 -15 5 25
~
65
as
TA TEMPERATURE (OC)
105125
TL/H/8562-19
Application Hints
The LP124 series is a micro-power pin-for-pin equivalent to
the LM124 op amps. Power supply current, input bias current. and input offset current have all been reduced by a
factor of 10 over the LM124. Like its predecessor, the
LP124 series op amps can operate on single supply, have
true-differential inputs, and remain in the linear mode with
an input common-mode voltage of 0 VOC.
test socket as an unlimited current surge through the resulting forward diode within the IC could destroy the unit.
Large differential input voltages can be easily accommodated and, as input differential voltage protection diodes are
not needed, no large input currents result from large differential input voltages. The differential input voltage may be
larger than V+ without damaging the device. Protection
should be provided to prevent the input voltages from going
negative more than -0.3 VDC (at 25'C). An input clamp
diode with a resistor to the IC input terminal can be used.
The pinouts of the package have been designed to simplify
PC board layouts. Inverting inputs are adjacent to outputs
for all of the amplifiers and the outputs have also been
placed at the corners of the package (pins 1, 7, 8, and 14).
The amplifiers have a class B output stage which allows the
amplifiers to both source and sink output currents. In applications where crossover distortion is undesirable, a resistor
Precautions should be taken to insure that the power supply
for the integrated circuit never becomes reversed in polarity
or the unit is not inadvertently installed backwards in the
3-785
•
~
N
C')
a..
...J
.......
S
0'1
N
a..
...J
.......
~
....
N
a..
...J
,-------------------------------------------------------------------~
Application Hints (Continued)
should be used from the output of the amplifier to ground.
The resistor biases the output into class A operation.
the amplifier to the corresponding high or low state. Exceeding the negative common-mode limit on both inputs will
force the amplifier output to a high state. Exceeding the
positive common-mode limit on a single input will not
change the phase of the output. However, if both inputs
exceed the limit, the output of the amplifier will be forced to
a low state. In neither case does a latch occur since returning the input within the common mode range puts the input
stage and thus the amplifier in a normal operating mode.
The LP124 has improved stability margin for driving capacitive loads. No special precautions are needed to drive loads
in the 50 pF to 1000 pF range. It should be noted however
that since the power supply current has been reduced by a
factor of 10, so also has the slew rate and gain bandwidth
product: This reduction can cause reduced performance in
AC applications where the LM124 is being replaced by an
LP124. Such situations usually occur when the LM 124 has
been operated near its power bandwidth.
Output short circuits either to ground or to the positive power supply should be of short time duration. Units can be
destroyed, not as a result of the short circuit current causing
metal fusing, but rather due to the large increase in IC chip
dissipation which will cause eventual failure due to excessive junction temperatures. For example: If all four amplifiers were simultaneously shorted to ground on a 10V supply
the junction temperature would rise by 110'C.
Exceeding the negative common-mode limit on either input
will cause a reversal of phase to the output and force
The circuits presented in the section on typical applications
emphasize operation on only a single power supply voltage.
If complementary power supplies are available, all of the
standard op amp circuits can be used. In general, introducing a pseudo-ground (a bias voltage reference to V + 12) will
allow operation above and below this value in single power
supply systems. Many application circuits are shown which
take advantage of the wide input common-mode voltage
range which includes ground. In most cases, input biasing is
not required and input voltages which range to ground can
easily be accommodated.
Comparator with Hysteresis
Driving CMOS
,:::rb
10kll
TLlH/8562-3
10Mll
TLlH/8562-6
Non-Inverting Amplifier
AdderISubtractor
VI O-.JVVII---.
~--OVOUT
V2 O-JVl.Iv--l
V3 O-JVl.Iv--.
.....---1
">--4_0
VOUT
V4 O-..JV\A,.---I
R
TLlH/8562-4
TLlH/8562-7
Positive Integrator
Unity Gain Buffer
TL/H/8562-5
TLlH/8562-8
3-786
Application Hints (Continued)
Howland Current Pump
Differential Integrator
c
R
nRl
nR2
>--4_0 VOUT
R
c~
TLIHI8S62-9
TLIHIBS62-10
Bridge Current Amplifier
11- Power Current Source
Lt.l385 (l.2V)
10UT= 1~3V
>--4_0 VOUT
2
TUHIBS82-12
TUH18S62-11
Lowpass Filter
0.47 JIof
2.37k.D.
>4~OVOUT
15k.D.
15k.D.
fCUTOFF=100Hz
Av=2
0=0.707
TUHIBS62-13
1 kHz Bandpass Active Filter
75k.D.
75k.D.
>---1.....0
VOUT
Av=4
0=20
VOUT SWING = 2Vp-p
Vs
3-787
TLIHI8562-14
•
Application Hints (Continued)
Band-Reject Filter
16kn.
510 kn.
160 kn.
">-.....-oVOUT
1.3 kn.
fO=60Hz
Q=10
Av=10
TLlH/8562-15
Pulse Generator
Rr
30kn.
lN914
1
fo= 1/flt500HZ
R FOR REDUCING
CROSSOVER
DISTORTION
tH =2C(RIIRr) =500".s
tL = RC= 1.5 ms
TLlH/8562-16
Window Comparator
.........--oVOUT
10kn.
Your
FOR Rl =R4=20kn.
R2=R3=10kn.
bJ=L,.
lj3Vs
2/3 Vs
Vs
TL/H/8562-17
3-788
r-
"V
oen
~National
~ Semiconductor
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LPC660AM/LPC660AI/LPC6601
CMOS Quad Operational Amplifier
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General Description
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II High-impedance preamplifier
"V
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II Active filter
The LPC660 CMOS Quad operational amplifier is ideal for
operation from a single supply. It is fully specified for operation from + 5V to + 15V and features rail-to-rail output
swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued
CMOS amplifiers in the past are not a problem with this
design. Input Vas, drift, and broadband noise as well as
voltage gain (into 100 k!l and 5 kn) are all equal to or better
than widely accepted bipolar equivalents, while the power
supply requirement is less than 1 mW.
en
!2
II Sample-and-Hold circuit
II Peak detector
Features
II Rail-to-rail output swing
II Micropower operation (1 mW)
II Specified for 100 k!l and 5 k!l loads
120 dB
II High voltage gain
This chip is built with National's advanced Double-Poly Silicon-Gate CMOS process.
II Low input offset voltage
See the LPC662 datasheet for a Dual CMOS operational
amplifier with these same features.
II Ultra low input bias current
3 mV max
1.3 p'vrc
II Low offset voltage drift
40 fA
II Input common-mode includes GND
II Operation guaranteed from
Applications
II Low distortion
II High-impedance buffer
II Slew rate
II Precision current-to-voltage converter
II Insensitive to latch-up
+ 5V to + 15V
0.01 % at 1 kHz
0.11 V/p.s
II Long-term integrator
Connection Diagram
Dual-In-Line Package
OUTPUT 4 INPU{ 414
INPUT 4+
113
12
GTNO
11
12
OUTPUT 1 INPUT 1-
INPUT3+
10
5
INPUT 1+
INPUT 2+
INPU,T3-
OUTPUT 3
19
B
J.&
INPUT 2-
1
OUTPUT 2
TL/H/l0S47-1
Top View
Ordering Information
Temperature Range
Package
Military
14-Pin
Cavity DIP
Industrial
LPC660AMD
NSC
Drawing
D14E
14-Pin
Small Outline
LPC660AIM or LPC660lM
M14A
14-Pin
Molded DIP
LPC660AIN or LPC660lN
N14A
3-789
oCD
CD
Absolute Maximum Ratings
Il.
....I
......
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
()
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Either Input beyond V+ or V-
Il.
....I
Supply Voltage (V+ - V-)
()
~
CD
Junction Temperature (Note 2)
Operating Ratings
0.7V
16V
Output Short Circuit to GND (Note 1)
~
CD
Storage Temp. Range
Temperature Range
LPC660AM
LPC660AI
LPC6601
Continuous
Lead Temperature (Soldering, 10 sec.)
150'C
ESD rating is to be determined .
± Supply Voltage
Differential Input Voltage
......
:iE
(Note 3)
260'C
- 55'C :S TJ :S + 125'C
-40'C:s TJ :S +85'C
-40'C:s TJ :S +85'C
Supply Range
- 65'C to + 150'C
4.75V to 15.5V
CD
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....I
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TA = TJ = 25'C. Boldface limits apply at the temperature extremes.
V+ = 5V, V- = OV, VCM = 1.5V, Vo = V+ 12, and RL > 1M unless otherwise specified.
Parameter
Conditions
LPC660AM
LPC660AI
LPC6601
Typ
Limit
(Note 4)
Limit
(Note 4)
Limit
(Note 4)
Units
1
3
3
6
3.5
3.3
6.3
mV
max
Input Offset Voltage
Input Offset Voltage
Average Drift
Input Bias Current
Input Offset Current
1.3
(Note 8)
(Note 8)
0.04
0.01
Input Resistance
20
20
20
100
4
4
20
20
20
100
2
2
>1
Common Mode
Rejection Ratio
OV :S VCM :S 12.0V
V+ = 15V
83
Positive Power Supply
Rejection Ratio
5V :S V+ :S 15V
Vo = 2.5V
83
Negative Power Supply
Rejection Ratio
OV :S V- :S -10V
94
Input Common Mode
Voltage Range
V+ = 5V & 15V
For CMRR > 50 dB
pA
max
pA
max
Teran
-0.4
V+
Large Signal
Voltage Gain
/Lvrc
1.9
RL = 100 kn (Note 5)
Sourcing
1000
Sinking
500
RL = 5 kn (Note 5)
Sourcing
1000
Sinking
250
3-790
70
70
63
68
68
61
70
70
63
68
68
61
84
84
74
82
83
73
-0.1
-0.1
-0.1
0
0
0
V+ - 2.3
V+ - 2.3
V+ - 2.3
Y+ - 2.6
Y+ - 2.5
Y+ - 2.5
400
400
300
250
300
200
180
180
90
70
120
70
200
200
100
150
160
80
100
100
50
35
60
40
dB
min
dB
min
dB
min
V
max
V
min
V/mV
min
V/mV
min
V/mV
min
V/mV
min
r-
."
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TA = TJ = 25°C. Boldface limits apply at the temperature extremes.
V+ = 5V, V- = OV, VCM = 1.5V, Vo = V+ /2, and RL > 1M unless otherwise specified. (Continued)
Parameter
Output Swing
Limit
(Note 4)
Limit
(Note 4)
Units
V+ = 5V
RL = 100kOtoV+/2
4.987
4.970
4.970
4.940
4.950
4.950
4.910
V
min
0.030
0.030
0.060
0.050
0.050
0.090
4.850
4.850
4.750
4.750
4.750
4.650
0.150
0.150
0.250
0.250
0.250
0.350
14.920
14.920
14.880
14.880
14.880
14.820
4.940
V+ = 15V
RL = 100kOtoV+12
14.970
0.007
V+ = 15V
RL = 5kOtoV+12
14.840
0.110
Sourcing, Vo = OV
Sinking, Vo = 5V
Sourcing, Vo = OV
Sinking, Vo = 13V
All Four Amplifiers
Vo = 1.5V
22
21
40
39
160
0.030
0.030
0.060
0.050
0.050
0.090
14.680
14.680
14.580
14.600
14.600
14.480
0.220
0.220
0.320
0.300
0.300
0.400
16
16
13
12
14
11
16
16
13
12
14
11
19
28
23
19
25
20
19
28
23
19
24
19
200
200
240
250
230
270
~
:s::
......
r-
Limit
(Note 4)
0.040
Supply Current
LPC6601
Typ
V+ = 5V
RL = 5kOtoV+12
Output Current
V+ = 15V
LPC660AI
Conditions
0.004
Output Current
V+ = 5V
LPC660AM
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V
min
V
max
V
min
V
max
V
min
V
max
rnA
min
rnA
min
mA
min
rnA
min
JJ-A
max
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3-791
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CO
(.)
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......
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T A = T J = 25°C. Boldface limits apply ·at the temperature extremes.
V+ = 5V, V- = OV, VCM = 1.5V, Vo = V+ 12, and RL > 1 M unless otherwise specified .
~
CO
CO
(.)
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......
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CO
CO
(.)
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Parameter
Slew Rate
Conditions
Typ
0.11
(Note 6)
Gain-Bandwidth Product
Phase Margin
Gain Margin
LPC660AM
LPC660AI
Limit
Limit
Limit
(Note 4)
(Note 4)
(Note 4)
LPC6601
Units
0.07
0.07
0.05
V//J-s
0.04
0.05
0.03
min
0.35
MHz
50
Deg
17
dB
Amp-to-Amp Isolation
(Note 7)
130
dB
Input Referred Voltage Noise
F = 1 kHz
42
nV/./Hz
Input Referred Current Noise
F=1kHz
0.0002
pAl./Hz
Total Harmonic Distortion
F = 10 kHz, Av = -10
0,01
%
RL = 100kO, Vo = 8Vpp
Note 1: Applies to both single supply and splH supply operation. Continuous short circuit operation at elevated ambient temperature andlor multiple Op Amp shorts
can result In exceeding the maximum allowed junction temperature of 15O"C.
Note 2: The junction-to-ambient thermal resistance of the molded plastic DIP (N) is 101"C/W. the molded plastic SO (M) package is 15'ZC/W. and the cavity DIP
(D) package. is 124"C/W. All numbers apply for packages soldered directly into a PC board.
Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
Intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
The guaranteed specHications apply only for the test conditions listed.
Note 4: These limits are guaranteed and are used in calculating outgoing AQL
Note 5: V+ = 15V. VCM = 7.5Vand RL connected to 7.5V. For Sourcing tests. 7.5V ,; Vo ,; 11.5V. For Sinking tests, 2.5V ,; Vo ,; 7.5V.
Note 6: V+ = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
Note 7: Input referred. V+ = 15Vand RL = 100 kll connected to V+ 12. Each amp excHed in tum wnh 1 kHz to produce Vo = 13 Vpp.
Note 8: The LPC660AI and the LPC6601 input bias current and input offset current specifications over the temperature range are guaranteed through correlation
techniques; these numbers reflect the true performance of the part. All other input bias and offset current specifications (other than the typical) are measured;
these numbers are degraded in order to reduce the test time (and the cost of the part) taken in measuring these parameters.
3-792
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Typical Performance Characteristics Vs =
'V
oaI
± 7.5V, TA = 25'C unless otherwise specified
aI
Supply Current
vs Supply Voltage
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CMRR vs Frequency
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100
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10k
FREQUENCY (Hz)
lOOk
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100
80
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100
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100
lk
10k
RL =lj&rRL = lOOk
120
lOOk
10
100
lk
10k
lOOk
FREQUENCY (Hz)
FREQUENCY (Hz)
CMRR vs Temperature
Power Supply Rejection
Ratio vs Frequency
140
140
130
120
120
100
110
!
100
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90
BO
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60
40
80
20
70
0
V"
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SUPPLY
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SUPPLY
r--;:
-20
60
10
10
140
10
100
1
is
1\
80
40
0.1
Crosstalk Rejection
vs Frequency
~
60
0.01
....
OUTPUT SOURCE CURRENT (mA)
'"'"
ODOOl
1/
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OUTPUT SINK CURRENT (mA)
100
tli
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1
1
60
20
1
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ODDl
ODDl
120
o:l
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PLASllC
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TEMPERATURE (oe)
140
V
0.1
CDl
125
75
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Input Voltage Noise
vs Frequency
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60
-25
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Vs +5V....
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Output Characteristics
Current Sourcing
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INPUT COMMON-MODE VOLTAGE (V)
10
-
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Output Characteristics
Current Sinking
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TEMPERATURE (oe)
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-75 -50-25 0 25 50 75 100 125150
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Common-Mode Voltage Range
vs Temperature
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TEMPERATURE (oe)
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16
Input Bias Current vs
Input Common-Mode Voltage
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8
6
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SUPPLY VOLTAGE (V)
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Input Bias Current
vs Temperature
2.5
500
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Offset Voltage
vs Temperature of
Five Representative Units
-75
-25
25
75
TEMPERATURE (oe)
125
10
100
Ik
10k
lOOk
1M
FREQUENCY (Hz)
TLlH/l0547-2
3-793
•
Typical Performance Characteristics Vs =
Open-Loop Voltage Gain
vs Temperature
1040
~
III
~
0
---....
120
RL = 5k
110
100
>
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90
t
70
160
120
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~
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140
9 80
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25
75
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Gain Error
15
90
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10
19
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1
1
1
-15
-20
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-7!io -5 -2!io 0
10M
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RF =IIJN=20k
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Inverting Small"Signal
Pulse Response
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Inverting Large-8ignal
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Large-8ignal Pulse
Non-Inverting Response
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TEMPERATURE (OC)
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COMMON MODE VOLTAGE (V)
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-75
125
Non-Inverting Small
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Inverting Slew Rate
vs Temperature
DAD
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VOUT (VOLT5)
DAD
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200
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Non-Inverting Slew Rate
vs Temperature
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FREQUENCY (Hz)
OJO
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1M
Common-Mode Error of
3 Representative Units
1 1
1 1
1 1
20
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FREQUENCY (Hz)
(Vas vs VaUT)
2S
lOOk
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lk
10k
lOOk
IN
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1 10 100 lk 10k lOOk 1M 10M
FREQUENCY (Hz)
Gain and Phase Responses
vs Temperature
10k
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TEMPERATURE (OC)
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Gain and Phase Responses
vs Load Capacitance
Open-Loop
Frequency Response
RL = lOOk
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± 7.5V, TA = 25'C unless otherwise specified (Continued)
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nME (I's)
TL/H/l0547-3
3-794
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Typical Performance Characteristics Vs =
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± 7.5V, T A = 25°C (Continued)
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100,000
100,000
10,000
10,000
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Stability vs Capacitive Load
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SINKING
SOURCING
LOAD CURRENT (rnA)
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10
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0.001
0.1
-0.01
0
0.01
SINKING
SOURCING
LOAD CURRENT (rnA)
10
TLlH/l0547-5
TL/H/l0547-4
Note: Avoid resislive loads of less than
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CD
CD
oa. ~National
.....
.....
~ Semiconductor
CD
LPC662AM/LPC662AI/LPC6621
~
CD
~ CMOS Dual Operational Amplifier
.....
.....
:E
General Description
~
CD
CD
oa.
.....
The LPC662 CMOS Dual operational amplifier is ideal for
operation from a single supply. It is fully specified for operation from + 5V to + 15V and features rail-to-rail output
swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued
CMOS amplifiers in the past are not a problem with this
design. Input Vos, drift, and broadband noise as well as
voltage gain (into 100 kO and 5 kO) are all equal to or better
than widely accepted bipolar equivalents, while the power
supply requirement is less than 0.5 mW.
This chip is built with National's advanced Double-Poly Silicon-Gate CMOS process.
See the LPC660 datasheet for a Quad CMOS operational
amplifier with these same features.
Applications
• High-impedance buffer
• Precision current-to-voltage converter
• Long-term integrator
•
•
•
•
High-impedance preamplifier
Active filter
Sample-and-Hold circuit
Peak detector
Features
•
•
•
•
•
•
•
•
•
•
•
•
Rail-to-rail output swing
Micropower operation «0.5 mW)
Specified for 100 kO and 5 kO loads
120 dB
High voltage gain
3 mV max
Low input offset voltage
1.3 p,VI'C
Low offset voltage drift
40 fA
Ultra low input bias current
Input common-mode includes GND
Operation guaranteed from + 5V to + 15V
Low distortion
0.01 % at 1 kHz
Slew rate
0.11 VI p,s
Insensitive to latch-up
Connection Diagram
""";'h1?
8-Pln DIP
V
1
OUTPUT A
2
INVERTING INPUT A -
NON~NVERTING
INPUT A
~
3
-
•
v-_4+-__..J
'a\
8
t-- v·
7
.rII L-,L
OUTPUT a
INVERTING INPUT a
, - - _...5_ NON.INVERTING
INPUT a
TUH/1054B-1
Ordering Information
Temperature Range
Package
Military
8-Pin
Cavity DIP
Industrial
NSC
Drawing
D08C
LPC662AMD
8-Pin
Small Outline
LPC662AIM or LPC6621M
MOBA
8-Pin
Molded DIP
LPC662AIN or LPC662IN
N08E
3-796
r
"oenen
Absolute Maximum Ratings (Note 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Differential Input Voltage
Either Input beyond V+ or VSupply Voltage (V+ - V-)
Operating Ratings
Temperature Range
LPC662AM
LPC662AI
LPC6621
Supply Range
±Supply Voltage
0.7V
16V
Continuous
Output Short Circuit to GND (Note 1)
Lead Temperature (Soldering, 10 sec.)
Storage Temp. Range
Junction Temperature (Note 2)
ESD rating is to be determined.
N
:J>
-55'C,,; TJ"; +125'C
-40'C"; TJ ,,; +85'C
-40'C ,,; TJ ,,; +85'C
4.75Vto 15.5V
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en
~
Conditions
Input Offset Voltage
Typ
1
Input Offset Voltage
Average Drift
Input Offset Current
LPC662AM
Limit
(Note 4)
LPC662AI
Limit
(Note 4)
LPC6621
Limit
(Note 4)
3
3
6
3.5
3.3
6.3
1.3
(Note 8)
(Note 8)
Input Resistance
0.04
0.01
OV,,; VCM ,,; 12.0V
V+ = 15V
83
Positive Power Supply
Rejection Ratio
5V,,; V+ ,,; 15V
Vo = 2.5V
83
Negative Power Supply
Rejection Ratio
OV,,; V-,,; -10V
94
Input Common-Mode
Voltage Range
V+ = 5Vand 15V
For CMRR ;:;: 50 dB
-0.4
V+ - 1.9
RL = 100 kn (Note 5)
Sourcing
1000
Sinking
500
RL = 5 kn (Note 5)
Sourcing
1000
Sinking
250
3-797
Units
mV
max
/LvrC
20
20
20
100
4
4
20
20
20
100
2
2
70
70
63
68
68
61
pA
max
pA
max
Teran
>1
Common Mode
Rejection Ratio
Large Signal
Voltage Gain
en
N
::::
r
260'C
-65'C to + 150'C
150'C
DC Electrical Characteristics
Input Bias Current
o"
en
:J>
Unless otherwise specified, all limits guaranteed for TA = TJ = 25'C. Boldface limits apply at the temperature extremes.
V+ = 5V, V- = OV, VCM = 1.5V, Vo = V+ 12, and RL > 1M unless otherwise specified.
Parameter
3:
.....
r
70
70
63
68
68
61
84
84
74
82
83
73
-0.1
-0.1
-0.1
0
0
0
V+ - 2.3
V+ - 2.3
V+ - 2.3
Y+ - 2.6
Y+ - 2.5
Y+ - 2.5
400
400
300
250
300
200
180
180
90
70
120
70
200
200
100
150
160
80
100
100
50
35
60
40
dB
min
dB
min
dB
min
V
max
V
min
V/mV
min
V/mV
min
V/mV
min
V/mV
min
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TA = TJ = 25°C. Boldface limits apply at the temperature extremes.
V+ = 5V, V- = OV, VCM = 1.5V, Vo = V+ /2, and RL > 1M unless otherwise specified. (Continued)
Parameter
Output Swing
Conditions
Typ
V+ = 5V
RL= 100kOtoV+/2
4.987
LPC662AM
Limit
(Note 4)
4.970
0.004
V+ = 5V
RL = 5 kO to V+ /2
4.940
0.040
V+ = 15V
RL = 100kOtoV+/2
14.970
0.007
V+ = 15V
RL= 5kOtoV+/2
14.840
0.110
Output Current
V+ = 5V
Sourcing, Vo = OV
Sinking, Vo = 5V
Output Current.
V+ = 15V
Sourcing, Vo = OV
Sinking, Vo = 13V
Supply Current
Both Amplifiers
Vo = 1.5V
22
21
40
39
86
3·798
LPC662AI
Limit
(Note 4)
4.970
LPC6621
Limit
(Note 4)
4.940
4.950
4.950.
4.910
0.030
0.030
0.060
0.050
0.050
0.090
4.850
4.850
4.750
4.750
4.750
·4.650
0.150
0.150
0.250
0.250
0.250
0.350
14.920
14.920
14.880
14.880
14.880
14.820
0.030
0.030
0.060
0.050
0.050
0.090
14.680
14.680
14.580
14.600
14.600.
14.480
0.220
0.220
0.320
0.300
0.300
0.400
16
16
13
12
14
11·
16
16
13
12
14
11
19
28
23
19
25
20
19
28
23
19
24
19
120
120
140
145
140
160
Units
V
min
V
max
V
min
V
max
V
min
V
max
V
min
V
max
mA
min
mA
min
mA
min
mA
min
/LA
max
r-
"U
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TA = TJ = 25'C. Boldface limits apply at the temperature extremes.
V+ = 5V, V- = OV, VCM = 1.5V, Va = V+ 12, and RL > 1 M unless otherwise specified.
Parameter
Slew Rate
Conditions
(Note 6)
Gain-Bandwidth Product
oen
en
I\)
»
:s:::
......
Typ
LPC662AM
Limit
(Note 4)
LPC662AI
Limit
(Note 4)
LPC6621
Limit
(Note 4)
Units
0.11
0.07
0.07
0.05
V/p.s
0.04
0.05
0.03
min
r-
"U
o
en
en
I\)
»
:::::
r-
"U
0.35
MHz
Phase Margin
50
Deg
oen
Gain Margin
17
dB
~
Amp-to-Amp Isolation
(Note 7)
130
dB
Input Referred Voltage Noise
F = 1 kHz
42
nV/~
Input Referred Current Noise
F = 1 kHz
0.0002
pAl~
Total Harmonic Distortion
F = 10kHz,Av = -10
RL = 100 kO, Va = 8 Vpp
0.01
%
Nole 1: Applies 10 both single supply and split supply operation. Continuous short circuit operation at elevated ambienttemperature andlor multiple Op Amp shorts
can result in exceeding the maximum allowed junction temperature of 150°C.
Note 2: The junction·to·ambient thermal resistance of the molded plastiC DIP (N) is 101'C/W, the molded plastiC SO (M) package is lS2'C/W, and the cavity DIP
(D) package is 124'C/W. All numbers apply for packages soldered directly into a PC board.
Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
The guaranteed specifications apply only for the test conditions listed.
Note 4: These limits are guaranteed and are used in calculating outgoing ACL.
Nole 5: V+ ~ 15V, VCM ~ 7.5V and RL connected to 7.5V. For Sourcing tests, 7.SV ,: Va ,: II.SV. For Sinking tests, 2.SV ,: Va ,: 7.SV.
Note 6: V+ = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
Note 7: Inpul referred. V+ ~ 15V and RL ~ 100 kO connected to V+ 12. Each amp excited in turn with 1 kHz to produce Va ~ 13 Vpp.
Note 8: The LPC662A1 and the LPC6621 input bias current and input offset current specifications over the temperature range are guaranteed through correlation
techniques; these numbers reflect the true performance of the part. All other input bias and offset current specHications (other than the typical) are measured;
these numbers are degraded in order to reduce the test time (and the cost of the part) taken in measuring these parameters.
3-799
en
Typical Performance Characteristics Vs =
Offset Voltage vs
Temperature of Five
Representative Units
Supply Current vs
Supply Voltage
2OO.-~r,,,~-,-,-,
~200H-+-+-+--t-+-H
I
150 I-+-+-+--+--t--t-t--i
100 ttt;;-~55~'+j25~'~+~'25~OC!ii/ij
6
1
I!l
~
10
1.5
1.0
IS
~
0.0
t;
~
~
0.01 I-H~/4---bA-++-1
1-r.,..;.:;'-'l-f.I9-:lt:cfi: ~ 0.001 1-1-1-b'1-t-t-t-+-l
I;
0
-1.5
-2.0
O.ooolL-L'-L-L-L-L-L_~L~
-75
ffi
~
I
~
~
25
-25
TEMPERAlIJRE
Input Bias Current
vs Input Common-Mode
Voltage
"-,,-,-ro-r,-,,
75
(OC)
TEMPERAlIJRE
I!l ~
Input Common-Mode
Voltage Range vs
Temperature
0 .--,..,-.,.--r-r--r-;---'
~>
-u.s I-+-+-+--+--t--t-t--i
GUARAN 1-1~S
~l~~TYP;·i~"·'·~~S
g~
,,
,
g iii -1.5
-2.0
,"
,,
0.01
~...I -3.0 I:-+-++-+--+--t-I--l
PACKAGE
PLASl1C
D.m1
PAacAGE ... -
lIEU
-2.5
HERMEIIC
§l~
8\. +0.5 I-+--+-+--+--+--t-t--i
.u. -
~:;!
-7.5-&-4.5-3-1.5 0 1.5 3 4.5 6 7.5
i!O
tj:±;;EGU;E1lA9~Nim>B:iEO
0
Ill-u.s
~
-75
-25
25
75
TEMPERATURE
Output Characteristics
Current Sourcing
Input Voltage Noise
vs Frequency
-l1
Vs=I+5V
II--r--+-~~~--j
/vs'=I+I5V
rul---t--t-~-+--1
~
120 1-+-t--lI-f--j--l-+-l
100 \
10
100
O~~~~~~~~
10k
lOOk
100
Ik
10k
lOOk
I"V~=+5V
1M
~I
0.00010.001 0.G1
I
10
100
~.-r-r-"1""-'-'--'
801-1-f-HHH-l--j
I~
L-.l--'-....L.......L.....J......Jc....J......J
10
100
Ik
10k
lOOk
FREQUENCY (Hz)
I~
Power Supply Rejection
Ratio vs Frequency
I~ ,.....-,--r-r-.-r-r.,.-..,.-,-..,
130 1-+-+-+--+--+--tI-t-1
120 H-t-+-t-+--+--+-++--l
1201-+-+-+--+--+--tI-t-1
': s~~a;t!!t!j
CMRR vs Temperature
2OH-r+-t-IH+--I-'H
/
~
0.001:
I;
~
I~
FREQUENCY (Hz)
,
Ik
~
0.01
201-+-+--t--t--t-I-+-1
~
FREQUENCY (Hz)
i~
1..... -
CMRR vs Frequency
100
1/
80 I-'~,--t-I-+-++-+-I
~
~
OUTPUT SOURCE CURRENT (mA)
10
~ ~I
I~I-+-+-+--t-+--tI-t-1
o~~~~~~~~
10
Vs +I5V,
Vs +5V'"
Crosstalk Rejection
vs Frequency
!.
~I ~--+---ll--+---l
I
10
I
~
OUTPUT SINK CURRENT (mA)
I~.--r-r-~'-'-~~,
~
0.G1 ls=+15:":'V
125
Ii!
(OC)
Output Characteristics
Current Sinking
~
(OC)
IIPUT COWMON-MODE VOLTAGE (V)
lO.---'--r-~~rr-'
-75 -50-25 0 25 50 75 100 125 150
125
I!l:;! -1.0 1-+--+-+--t-,+-+-+---1
~I '
0.1 I-t-t-t-+/-A-'-t/~'-t-l
~
It -u.s
-1.0
-2.5
8 W
II
V
_I- HERWEIIC-hf-V+"*""-1
PACKAGE,/
1/
I
0.5
g
1
2.0
SUPPLY VOLTAGE (V)
I
Input Bias Current
vs Temperature
2.5
~
024
± 7.5V, T A = 25'C unless otherwise specified
110
100 1-+-+-+-+-+-+-+--1
'"
y+ SUPPLY
~ f-t-l-+-+~~-P.t-+-+-l
:t=~~~:t:1::t:~
y- SUPPLY
20 H-++--t--''F-'-H''''f,+:::-1
~I-~-+-+-+~~~+--l
rol-++-t--t--t-I-+-1
0~-+-r~+-r1-+-r,
~L-~~~~~~~~
-2O~~~~~~~~~
-75
-25
25
TEMPERAlIJRE
75
(OC)
125
10
100
Ik
10k
lOOk
1M
FREQUENCY (Hz)
TL/H/I0548-2
3-800
r-----------------------------------------------------------------------------, r"U
Typical Performance Characteristics Vs =
± 7.SV, TA = 2S'C unless otherwise specified (Continued)
oen
en
Open-Loop Voltage
Gain vs Temperature
Open-Loop
Frequency Response
1-10
160
~130
1-10
~
120
I!l
~
110
:s
90
~
80
la
9
0
120
-;;;-
I!l
-
~~!
~
60
~fif
20
~
70
-75
-25
25
75
125
Gain and Phase
Responses vs Temperature
80
~
90
I!l
~
015
la
:s
I
i
Jii
9I
-20
1
1
1
10
lii
-5
-10
1M
-75 -5 -25 0 25
10M
OAO
OAO
0.35
-a~
rAllING f -
r-
0.05
OJIO
25
,.~ -100
8 -150
-200
I ....
-250
5 75 10
~
75
125
~.
./
V
~
-2S
25
125
75
246
8
;~
1/
i\
f--
D 20-10 60 801001201-10160180
TIME (j.s)
Inverting Large-Slgnal
Pulse Response
I!l
~
~
0
.
Non-Inverting
Large-Signal Pulse
Response (Av = + 1)
ID1PERAlURE (oe)
la
~
.
COMMON MODE VOLTAGE (V)
r-75
E
I- fo'"
RISING
ID1PERAlURE (oe)
Non-Inverting
Smail-Signal Pulse
Response (Av = + 1)
/
.....
f .......
~
0.10
OJIO
-2S
/
1- ....
~
~ 0.15
0.05
-75
50
rALLING
~Q.20
RISING
0.10
150
100
Rr =R,N =5k
~
~G.2S
2:-
~G.2S
1M
250
200
i!l
~ -50 I -
Inverting Slew Rate
vs Temperature
0.35
lOOk
10k
VOUT (VaLlS)
Non-Inverting Slew
Rate vs Temperature
0.15
~
1
1
1
-15
F1IEQUENCY (Hz)
~Q.20
~
RL = 5k
-20
lOOk
~
1
:g
-25
10k
!:2
Common-Mode Error vs
Common-Mode Voltage of
3 Representative Units
1
1
1
Inverting Small-Signal
Pulse Response
1
I
0
1
§
1
Rr =RIN =20k
R,N =Rr -5k
E
II
o
nME (j..)
la
5
~ ~ ~
~
~
/
I!l 4V
~
1\
2 4 6 8 W
fN
....,
ov
2V
o
\
I
I20 -10 60 80 1001201-10
nME (j.s)
D 2 4
6
8
W
~ ~ ~ ~
TIME (j..)
TUHI1 0548-3
3-801
en
N
en
015
rREQUENCY (Hz)
RL = lOOk
~
-015
lk
90
lk
25
20
15
~
"U
l>
-015
Gain Error
(VOS vs VOUT)
-;;;-
~
iE!
,
r
o
en
:::::
r
"U
oen
rREQUENCY (Hz)
ID1PERAlURE (oe)
~
!:!~
-20
0.01 0.1 1 10 100 lk 10k lOOk 1M 10M
60
HI-tt1tll1t-~IoI;IttIt-t+ttttttI
20
o
-10
la
-IOr"'1momrrr-rnrmTIT"'"T"T"TTTTm
~~
i'..
80
I!l
~
.......
0%
.:2.100
100
~
s:::
Gain and Phase
Responses vs Load
Capacitance
N
CD
B
a.
Typical Performance Characteristics Vs =
...I
......
Stabllltyvs
Capacitive Load
~
B
a.
......
...I
:::i
~
CD
CD
o
a.
...I
± 7.5V, TA = 25°C (Continued)
100,000
100,000
10,000
10,000
t;:'
.e-
..
o
g
1,000
~
!:::
<.J
t;:'
~
...
.
Stabilityvs
Capacitive Load
100
.e-
Av=+l
~ ~I
~~
0..
I!.uJNST~BLE
r--
o
~
....
,~
IL
~
E
~V
~
!
~
~
I
I
~"I" U~~~j~~I~' """
-1 d% OVERSMoT
100
I~
~ IW.U
,
2% OVERSHOOT
~
5% OVERSHOOT
10
10
1
-10
1,000
I I I
r-- Av=+10 or -10
1
-0.1
-0.001
0.001
0.1
-1
-0.01
0
0.01
SINKING
SOURCING
LOAD CURRENT (rnA)
10
-10
-0.1
-1
-0.001
0.001
0.1
-0.01
0
0.01
1
SINKING
SOURCING
LOAD CURRENT (rnA) .
10
TLlH/l0S4B-S
TLlH/l054B-4
Note: Avoid resistive loads 01 less than 500n. as they may cause instability.
3-802
.------------------------------------------------------------------..0
;g
~National
......
~ Semiconductor
OP-07 Low Offset, Low Drift Operational Amplifier
General Description
Features
The OP-07 has very low input offset voltage (25 /LV max. for
OP-07A) which is obtained by trimming at the wafer stage.
These low offset voltages generally eliminate any need for
external nUlling. The OP-07 also features low input bias current (±2 nA for OP-07A)· and high open-loop gain
(300 V ImV for OP-07A). The low offsets and high open-loop
gain make the OP-07 particularly useful for high-gain applications.
The wide input voltage range of ± 13V minimum combined
with high CMRR of 110 dB and high input impedance provide high accuracy in the non-inverting circuit configuration.
Excellent linearity and gain accuracy can be maintained
even at high closed-loop gains.
iii
Stability of offsets and gain with time or variation in temperature is excellent.
&I
II
&I
&I
&I
&I
&I
Low Vas
25 /LV Max
Low Vas Drift
0.6 /LVrC Max
Ultra-Stable vs Time
1.0 ,...V/Month Max
Low Noise
0.6 /LVp-p Max
Wide Input Voltage Range
±14V
Wide Supply Voltage Range
± 3V to ± 18V
Fits 725/108A1308A, 741, AD510 Sockets
Replaces the /LA714
Applications
III Strain Gauge Amplifiers
III
Thermocouple Amplifiers
III Precision Reference Buffer
111 Analog Computing Functions
The OP-07 is available in TO-99 metal can, ceramic or
molded DIP.
For improved specifications, see the LM607.
Connection Diagrams
Metal Can Package
Dual-In-Line Package
8
Vos TRIM
Vos TRIM
Vos TRIM
-IN
V+
+IN
OUT
V-
N.C.
TLlH/l0550-1
See NS Package Number JOBA or NOBE
"
V- (CASE)
TLlH/l0550-2
See NS Package Number HOBC
Ordering Information
TA = 25°C
VosMax
(/LV)
HOBC
TO-99
Package
JOBA
CERDIP
25
OP-07AJ'
OP-07AZ'
75
OP-07EJ
OP-07EZ
75
OP-07J'
OP-07Z'
150
OP-07CJ
OP-07CZ
150
OP-07DJ
NOBE
Plastic
Operating
Temperature
Range
OP-07EP
COM
OP-07CP
COM
OP-07DP
COM
MIL
MIL
'For devices processed in total compliance to military specifications refer to RETSOP07X for OP-07.
3-803
.....
Ii.
o
Absolute Maximum Ratings
o
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
±22V
Internal Power Dissipation (Note 5)
Differential Input Voltage
Input Voltage (Note 6)
500mW
±30V
±22V
Output Short-Circuit Duration
Storage Temperature Range
J and Z Packages
PPackage
- 65'C to + 150'C
- 65'C to + 125'C
Lead Temperature (Soldering, 60 sec.)
Junction Temperature
260'C
- 65'C to + 150'C
Operating Temperature Range
OP·07A,OP·07,
OP·07E, OP-07C, OP·07D
Continuous
- 55'C to + 125'C
O'Cto +70'C
Electrical Characteristics
Unless otherwise specified, Vs
Symbol
=
± 15V, TA
Parameter
=
25'C. Boldface type refers to limits over - 55'C
S;
OP-07A
Conditions
Min
TA
S;
+ 125'C
OP·07
Typ
Max
10
25
Min
Units
Typ
Max
25
60
30
60
75
200
/J-V
0.2
1.0
0.2
1.0
/J-V/Mo
Vas
Input Offset Voltage
(Note 1)
(Note 1)
aVos/I
Long·Term Input Offset
Voltage Stability
(Note 2)
los
Input Offset Current
0.3
0.8
2.0
4
0.4
1.2
2.8
5.6
nA
18
Input Bias Current
±0.7
±1
±2.0
±4
±1.0
±2
±3.0
±6
nA
enp-p
Input Noise Voltage
0.1 Hz to 10 Hz (Note 3)
0.35
0.6
0.35
0.6
/J-Vp.p
en
Input Noise Voltage
Density
fa
fa
fa
10.3
10.0
9.6
18.0
13.0
11.0
10.3
10.0
9.6
18.0
13.0
11.0
nV/,fHZ
inp•p
Input Noise Current
0.1 Hz to 10 Hz (Note 3)
in
Input Noise Current
Density
fa
fa
fa
RIN
Input Resistance
Differential·Mode
(Note 4)
RINCM
Input Resistance
Common·Mode
IVR
Input Voltage Range
CMRR
Common·Mode
Rejection Ratio
VCM
PSRR
Power Supply
Rejection Ratio
Vs
Large·Signal
Voltage Gain
RL:?! 2 kO, Va = ±10V
RL:?! 2kO, Va = ±10V
RL:?! 5000, Va = ±0.5V,
Vs = ±3V(Note4)
Ava
Va
Output Voltage Swing
=
=
=
=
=
=
10 Hz (Note 3)
100 Hz (Note 3)
1000 Hz (Note 3)
10 Hz (Note 3)
100 Hz (Note 3)
1000 Hz (Note 3)
30
14
30
14
30
pAp•p
0.32
0.14
0.12
0.80
0.23
0.17
0.32
0.14
0.12
0.80
0.23
0.17
pAl,fHZ
80
20
200
=
=
±13V
MO
200
GO
±13.0
±13.0
±14.0
±13.5
±13.0
±13.0
±14.0
±13.5
V
110
106
126
123
110
106
126
123
dB
±3Vto ±18V
RL:?! 10 kO
RL:?!2kO
RL:?!2kO
RL:?! 1 kO
60
4
5
10
20
4
5
300
200
500
400
200
150
500
400
150
400
150
400
±12.5
±12.0
±12.0
±10.5
±13.0
±12.8
±12.6
±12.0
±12.5
±12.0
±12.0
±10.5
±13.0
±12.8
±12.6
±12.0
3-804
10
20
/J-VIV
V/mV
V
0
"'tI
Electrical Characteristics (Continued)
Unless otherwise specified, Vs = ± 15V, TA = 25"C. Boldface type refers to limits over -55"C
Symbol
Parameter
OP-07A
Conditions
OP-07
0.1
0.3
0.1
0.3
V//Ls
0.6
0.4
0.6
MHz
60
!1
RL 2 2 k!1 (Note 3)
AVCL
Ro
Open-Loop Output
Resistance
Vo = 0,10 = 0
Pd
Power Consumption
Vs = ±15V, No Load
Vs = ±3V, No Load
Offset Adj. Range
Rp = 20 k!1
±4
Average Input Offset
Voltage Drift Without
External Trim
With External Trim
(Note 3)
Rp = 20 k!1 (Note 4)
Max
Min
Units
0.4
Slew Rate
Closed-Loop Bandwidth
TCVosn
+125"C
:0;
Typ
SR
TCVos
TA
Min
BW
= + 1 (Note 3)
:0;
6......
60
Typ
Max
120
6
75
4
0.2
0.6
0.3
1.3
0.2
0.6
0.3
1_3
5
25
8
50
pArc
8
25
13
50
pArC
75
4
120
6
mW
±4
mV
/Lvrc
TClos
Average Input Offset
Current Drift
(Note 3)
TCla
Average Input Bias Drift
(Note 3)
"-
Note 1: OP-07A grade Vas is measured approximately one minute after application of power. For all other grades Vas is measured approximately 0.5 second after
application of power.
Note 2: Long-Term Offset Voltage Stability refers to the averaged trend line of Vas vs time over extended periods after the first 30 days of operation. Excluding the
initial hour of operation, changes in Vas during the first 30 operating days are typically 2.5 J,tV. Parameter is sample tested.
Note 3: Sample tested.
Note 4: Guaranteed by design.
Note 5: The typical OJA of the HOB (TO-99) package is 155'C/W. the JOB (CERDIP) package is 92' C/W and the NOB (Molded DIP) is 100' C/W. The typical 0JC of
the HOB package is 17.5 C/W. All numbers apply for packages soldered directly into an etched circuit board.
0
Note 6: For supply voltages of less than ±22V, the maximum input voltage is O.SY beyond either supply.
Simplified Schematic
•.
r-~-,-------T-ti--------'-----r---'r-----~-'-----r------~---r-~r---r----T---~~~
V
018.......
('
~
029
'"J
'~~\J
LR1
"
'm)-
I ~"
'"
'''~
"
~
~
'-R5
R17
,m
'"
j-----t-r-r-+-fI'" '20
t-+--......+----r--{V,,,
'"
'"
+--------[::
'"
~t~'"::"'"'
QIS
I
.....
Q~~Q1B
....
,,:;t-J '" '"
'"
Q41"-lJ---------------~l-r-<~r+
......:':::"+----++-=-----{v,,,,
..... Q31
~"." ".
I '"
'"
'" ".)."
---+---+---:."T1VE
~---+--------+-----+-...............
SUPPlY
TL/H/t0550-3
"'A2A and R2B are electronically trimmed on chip at the factory for minimum offset voltage.
3-805
Electrical Characteristics
Unless otherwise specified, Vs = ± 15V, TA = 25'C. Boldface type refers to limits over O'C ,;; TA ,;; 70'C
Symbol
Parameter
OP·07E
Conditions
Min
OP·07C
Units
Typ
Max
75
130
60
85
150
250
",V
0.3
1.5
0.4
2.0
",V/Mo
0.5
0.9
3.8
5.3
0.8
1.6
6.0
8.0
nA
±1.2
±1.5
±4.0
±5.5
±1.8
±2.2
±7.0
±9.0
nA
Typ
Max
30
45
Min
Vos
Input Offset Voltage
(Note 1)
VOSII
Long-Term Vos
Stability
(Note 2)
los
Input Offset Current
IB
Input Bias Current
enp_p
Input Noise Voltage
0.1 Hzto 10 Hz (Note 3)
0.35
0.6
0.38
0.65
",Vp_p
en
Input Noise Voltage
Density
fo=10Hz
fa = 100 Hz (Note 3)
fa = 1000 Hz
10.3
10.0
9.6
18.0
13.0
11.0
10.5
10.2
9.8
20.0
,13.5
11.5
nV/./Hz
14
30
15
35
pAp_p
0.32
0.14
0.12
0.80
0.23
0.17
0.35
0.15
0.13
0.90
0.27
0.18
pAl./Hz
inp.p
Input Noise Current
0.1 Hz to 10Hz (Note 3)
in
Input Noise Currert
Density
fo=10Hz
fa = 100 Hz (Note 3)
fa = 1000 Hz
RIN
Input Resistance
Differential-Mode
(Note 4)
RINCM
Input Resistance
Common-Mode
IVR
Input Voltage Range
CMRR
Common-Mode
Rejection Ratio
VCM = ±13V
PSRR
Power Supply
Rejection Ratio
Vs= ±3Vto±18V
Vs = ±3Vto ±18V
AyO
Large Signal
Voltage Gain
RL;;'
RL;;'
RL;;'
Vs =
2 kO, Va = ±10V
2 kO
5000, 'va = ±0.5V,
±3V(Note4)
' 200
180
500
450
120
100
400
400
150
400
100
400
RL;;'
RL;;'
RL;;'
RL;;'
10 kO
2 kO
2 kO
1 kO
±12.5
±12.0
±12.0
±10.5
±13.0
±12.8
±12.6
±12.0
±12.0
±11.5
±11.0
±13.0
±12.8
±12.6
±12.0
V
0.1
0.3
0.1
0.3
V/",s
0.4
0.6
0.4
0.6
MHz
Vo
Output Voltage Swing
15
50
160
MO
120
GO
±14.0
±13
±14
V
106
103
123
123
100
97
120
' 120
dB
5
7
Slew Rate
RL ;;, 2 kO (Note 3)
BW
Closed-Loop Bandwidth
AYCL=
Ro
Output Resistance
Va = 0,10 = 0
60
Pd
Power Consumption
Vs = ±15V,NoLoad
Vs = ±3V, No Load
75
4
Offset Adj. Range
Rp = 20 kO
±4
TCVos
Average Input Offset
Voltage Drift Without
External Trim
With External Trim
(Note 4)
Rp = 20 kO (Note 4)
TClos
Average Input Offset
Current Drift
(Note 3)
TCIB
Average Input Bias
Current Drift
(Note 3)
+ 1 (Note 3)
33
±13.0
SR
TCVosn
8
7
10
20
32
32
51
",VIV
VlmV
60
0
150
8
120
6
80
4
0.3
1.3
0.5
1.8
0.3
1.3
0.4
1.6
,8
35
12
50
pAI'C
35
18
50
pAI'C
±4
mW
mV
",VI'C
13
3-806
o
'P
Electrical Characteristics
Unless otherwise specified, Vs = ± 15V, T A = 25·C. Boldface type refers to limits over O"C :;:; T A :;:;
Symbol
Parameter
+
OP-07D
Conditions
Min
o
.......
70·C
Units
Typ
Max
Input Offset Voltage
(Note 1)
60
85
150
250
/LV
VOS/t
Long-Term Vas Stability
(Note 2)
0.5
3.0
/LV/Mo
los
Input Offset Current
0.8
1.6
6.0
8.0
nA
Is
Input Bias Current
±2.0
±3.0
±12.0
±14.0
nA
Vas
enp_p
Input Noise Voltage
0.1 Hz to 10 Hz (Note 3)
0.38
0.65
/LVp-p
en
Input Noise Voltage Density
fa = 10Hz
fa = 100 Hz (Note 3)
fa = 1000 Hz
10.5
10.3
9.8
20.0
13.5
11.5
nVl,JHz
inp_p
Input Noise Current
0.1 Hz to 10 Hz (Note 3)
in
Input Noise Current Density
fa = 10 Hz
fa = 100 Hz (Note 3)
fa = 1000 Hz
RIN
Input Resistance Differential-Mode
(Note 4)
RINCM
Input Resistance Common-Mode
IVR
Input Voltage Range
Common-Mode
Rejection Ratio
VCM = ±13V
PSRR
Power Supply
Rejection Ratio
Vs = ±3Vto ±18V
Ava
Large Signal
Voltage Gain
RL:;:;2ko.,Vo= ±10V
RL=2ko.,Vo= ±10V
RL;" 5000., Va = ±0.5V,
Vs ±3V (Note 4)
Va
Output Voltage Swing
RL;"10ko.
RL;" 2ko.
RL;" 2ko.
RL;" 1 ko.
35
pAp-p
0.90
0.27
0.18
pAl,JHz
31
Mo.
120
Go.
±13
±14
V
94
94
110
106
dB
7
CMRR
15
0.35
0.15
0.13
7
10
120
100
400
400
V/mV
±12.0
±11.5
±11.0
±13.0
±12.8
±12.6
±12.0
V
0.1
0.3
V//LS
0.4
0.6
MHz
Slew Rate
RL ;" 2 ko. (Note 3)
BW
Closed-Loop Bandwidth
AVCL =
RO
Output Resistance
Va = 0, 10 = 0
60
Pd
Power Consumption
Vs = ±15V, No Load
Vs = ±3V, No Load
80
4
Offset Adj. Range
Rp = 20ko.
±4
TCVos
Average Input Offset
Voltage Drift Without
External Trim
With External Trim
(Note 4)
TCVosn
/LVIV
400
SR
+ 1 (Note 3)
32
51
0.
150
8
mW
0.7
2.5
/LvrC
Rp = 20 ko. (Note 4)
0.7
2.5
/Lvrc
50
pArc
50
pArC
TClos
Average Input Offset Current Drift
(Note 3)
12
TCls
Average Input Bias Current Drift
(Note 3)
18
mV
Note 1: OP-07A grade Vas is measured approximately one minute after application of power. For all other grades Ves is measured approximately 0.5 second after
application of power.
Note 2: Long-Term Offset Voltage Stability refers to the averaged trend line of Vos vs Time over extended periods after the first 30 days of operation. Excluding
the initial hour of operation, changes in Ves during the first 30 operating days are typically 2.5 ",V. Parameter is sample tested.
Note 3: Sample Tested.
Note 4: Guaranteed by design.
3-807
~
o
D.
o
r--------------------------------------------------------------------------------,
Test Circuits
Offset Voltage Test Circuit
Low Frequency Noise Test Circuit
200 kn
loon
son
2
3
loon
2.5 un
TUHll0550-4
TLIHll0550-5
Optional Offset Nulling Circuit
Rp
20 kn
......-v+
s~
v-
3-808
TLIHll0550~6
-I
roQC)
~National
....
o"a
~ Semiconductor
BI.FET "TM Technology
TL081 CP Wide Bandwidth J FET
Input Operational Amplifier
General Description
The TL081 is a low cost high speed JFET input operational
amplifier with an internally trimmed input offset voltage
(BI-FET IITM technology). The device requires a low supply
current and yet maintains a large gain bandwidth product
and a fast slew rate. In addition, well matched high voltage
JFET input devices provide very low input bias and offset
currents. The TL081 is pin compatible with the standard
LM741 and uses the same offset voltage adjustment circuitry. This feature allows designers to immediately upgrade the
overall performance of existing LM741 designs.
The TL081 may be used in applications such as high speed
integrators, fast DI A converters, sample-and-hold circuits
and many other circuits requiring low input offset voltage,
low input bias current, high input impedance, high slew rate
and wide bandwidth. The devices has low noise and offset
voltage drift, but for applications where these requirements
are critical, the LF356 is recommended. If maximum supply
current is important, however, the TL081 C is the better
choice.
Features
•
•
•
•
•
1/11
II
II
III
III
..
Typical Connection
Internally trimmed offset voltage
Low input bias current
Low input noise voltage
Low input noise current
Wide gain bandwidth
High slew rate
Low supply current
High input impedance
Low total harmonic distortion Av = 10,
RL = 10k, Vo = 20 Vp-p,
BW = 20 Hz-20 kHz
Low 111 noise corner
Fast settling time to 0.01 %
15 mV
50 pA
25 nV/,JRZ
0.01 pAl,JRZ
4 MHz
13 V/pos
1.8 mA
1012n
<0.02%
50 Hz
2 pos
Simplified Schematic
vcco--------.-------------.------~
VCC
R,
TL1H/8358-1
INTERNALL V
TRIMMED
Connection Diagram
-VEE
INTERNALL V
TRIMMED
0----4.....----....--------.....- - - - -...
TUH/8358-2
Dual·ln·Line Package
BALANCE
NC
INPUT
INPUT
OUTPUT
BALANCE
TL/H/8358-4
Order Number TLOS1CP
See NS Package Number NOSE
3-809
•
a.
o.....
CX)
o
....I
~
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
±18V
Power Dissipation (Notes 1 and 6)
Operating Temperature Range
Tj(MAX)
Differential Input Voltage
Input Voltage Range (Note 2)
±15V
Output Short Circuit Duration
Storage Temperature Range
Continuous
- 65'C to + 150'C
Lead Temp. (Soldering, 10 seconds)
6jA
ESD rating to be determined.
670mW
O'Cto +70'C
115'C
±30V
260'C
120'C/W
DC Electrical Characteristics (Note 3)
Symbol
Parameter
TL081C
Conditions
Min
Units
Typ
Max
5
15
20
Vos
Input Offset Voltage
Rs = 10 kn, TA = 25°C
Over Temperature
I::t.VoS/l::t.T
Average TC of Input Offset
Voltage
Rs = 10kn
los
Input Offset Current
Tj = 25°C, (Notes 3, 4)
Tj';; 70'C
25
100
4
pA
nA
Is
Input Bias Current
Tj = 25°C, (Notes 3, 4)
Tj';; 70'C
50
200
8
pA
nA
10
mV
mV
p.VI'C
RIN
Input Resistance
Tj = 25°C
AVOL
Large Signal Voltage Gain
Vs = ±15V, TA = 25°C
Vo= ±10V,RL=2kn
Over Temperature
25
Vo
Output Voltage Swing
Vs = ±15V, RL = 10 kn
±12
±13.5
V
VCM
Input Common·Mode Voltage
Range
Vs = ±15V
±11
+15
-12
V
V
CMRR
Common-Mode Rejection Ratio
Rs,;;10kn
70
100
dB
PSRR
Supply Voltage Rejection Ratio
(Note 5)
70
100
Is
Supply Current
AC Electrical Characteristics
Symbol
10 12
n
100
V/mV
15
V/mV
1.8
dB
2.8
mA
(Note 3)
Parameter
TL081C
Conditions
Min
Typ
Units
Max
Vs = ±15V, TA = 25'C
13
V/p.s
Gain Bandwidth Product
VS= ±15V,TA=25'C
4
MHz
Equivalent Input Noise Voltage
TA = 25°C, Rs = 100n,
f= 1000Hz
25
nV1,]Hz
Equivalent Input Noise Current
Tj = 25'C, f = 1000 Hz
0.01
pA/,]Hz
SR
Slew Rate
GBW
en
in
Note 1: For operating at elevated temperature, the device must be derated based on a thermal resistance of 120°C/W junction to ambient for N package.
Note 2: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
Note 3: These specifications apply for Vs ~ ± 15V and O°C ,;TA ,;
+ 70°C. Vos,
16 and los are measured at VCM ~ O.
Note 4: The input bias currents are junction leakage currents which approximately double for every 10°C increase in the junction temperature, Tj_ Due to the limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, Po. Tj = T A + 9jA Po where 9jA is the thermal resistance from junction to ambient. Use of a heat sink is
recommended if input bias current is to be kept to a minimum.
Note 5: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from
Vs ~ ±5Vto ±15V.
Note 6: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate
outside guaranteed limits.
3-810
-t
I;
Typical Performance Characteristics
Input Bias Current
co
.....
Ii
C
.!l
~
a:
i:l
110 r-VS- .15V
TA =2S"C
~
40
!!!
ZO
~
~
,.;'
t-"
.!
100
~
ii
I.Z
..!Ii:l:
.
erc,; TA'; +7D"C
.. a!
~
~~
V
~
"'~
V
.. c
u!:i
~>
o
/
o
,
-15
~
10
15
..
-D
I..
i..
""
40
30
ZO
10
...
V;-'I~V
_
RL oZ.
CL -laD pF-
i
~
~
4.5
.. "'" r-.....
..c
i
!
::I
z
.
10
15
F
r;;;;
RL=2k 100
CL = I,Or, r,~
:l!
,..
:!~
0
5
50
rGAIN
~
~
PHASE
III
:a
-50.§
H
-100
3
'-
-150
3D
40
50
TEMPERATURE ("CI
10
I
10
Slew Rate
15
150
-20
20
10
RL - OUTPUT LOAD (onl
-30
10
70
0.1
",..
0.1
3.5
o
4D
15
Bode Plot
~ -10
r--.
30
20
ZD
Vs- ±15
20
ZD
o
o
10
......
Vs- .15V
TA-2S"C
Z&
SUPPLY VOLTAGE (.V)
30
D"C'
10
~co
OUTPUT SINK CURRENT (mAl
Gain Bandwidth
r'i is"C
7D"e
~
c
!:i
co
>
10
o
a
"
Output Voltage Swing
3D
D"C
~
30
~
!II
a
Voltage Swing
RL oZ.
r- TA 'Z5"C
70'C
25
OUTPUT SOURCE CURRENT (mAl
Z5"C
~
o
20
40
ZO
>
10
NEGATIVE SUPPLY VOLTAGE (VI
Negative Current Limit
~
20
~
;:
o
POSITIVE SUPPLY VOLTAGE (VI
""'"
>
/
ZO
15
10
..
.....~
..~
/
...
o
~
/
:!~
.~
a:
fj\
/
10
~~
I-
~
u
15
Si!
V
~
~
~
15
Positive Current Limit
.
0"C';TA';+70"C
!!!
V
10
10
SUPPLY VOLTAGE (.VI
Negative Common-Mode Input
Voltage Limit
.
!i
..
"' ..
V
.~
o
TEMPERATURE rCI
ZO
15
lA
01020304050&070
10
Positive Common-Mode Input
Voltage Limit
20
V"'"
1.•
it
10
-5
,/
1.•
~
u
,..
COIIMON·MOOE VOLTAGE (VI
~~
5a:
/"r
...
-10
!!!
c
:2
a;
o
...ii!
D" ';TA,;+7D"C
is
a:
&0
"
Z.Z
VCl'- 0
VS=±lSV
~
...
IG
o
Supply Current
Input Bias Current
1
10
FREQUENCY (MHz)
100
.
!
;;C
14
13
VS-·15V
RL '21
Av-l
fALLING
I
.....
-
RiSiNG
12
11
01020314150&070
TEMPERATURE rCI
TL/H/8358-5
3-811
•
Q.
o
....
co
Typical Performance Characteristics
9~
Undistorted Output Voltage
Swing
u Distortion vs Frequency
'" til'
1.171
...
1.15
..
~V"ZI'"
ir
.1.121
;: '.1
I.
--
i
=
~..
'1
~
_
~1.171
30
AV'III
..
..~
>
AV'"~7
UZ5
II
..
..~
=:
.,c
co
i"
.
IZI
III
II
FtVj
II
-
41
I
ZI
•
II
VS·,15V
RL •••
TA·we
II
9
"
Va
III
I.
I.
I
I.
IDD.
,.,
co
.
co
;:
c
z
IDD
.,..~
.it
80
Ii:
~
I
~I5V
III
.......
"
40
-SUPPLY""
ZD
0
lao
I' 1l1li IDel 1M 11M
FREaUEICY 1Hz)
w
~
!!
>
S
I!:
.
..
co
9
co
~
10
I
~AV'lal
I
I
1M
",'"'
51
40
38
20
10
0
10
11M
r
100
lk
10k
FllEClUENCY (Hz)
10
II
il:
I
10lIl
Inverter Settling Time
~
:II
,
.
i.
..
.
..
co
II:
L ~~"~
~
co
AV' IO
.-If
0.1
D.OI
za
10
10,.V
S
~
VS·"SY
TA' ZS'C
ImV
z
co
lilt
l1li
n
""i'
IK 10. I'"
FREaUEICY 1Hz)
TA' ZS"C
z
15
III
70
.....
ii
E~S"ISV
c
co
L
10
10
Equivalent Input Noise
Voltage
Output Impedance
.
TA' 70'C
SUPPLY VOLTAGE I,V)
1
i~
['...
+SUPPLY
10
.,
..,.......-r
Vs'
TA' ZS'C
'" I"
""
&0
IDD
5
•
1M
;; 140
:a
" i\.
ZD
Power Supply Rejection
Ratio
1M 10M
TA·O'nO-IS'C
~
r\.
41
~
I=RL·n
~ ;..--
i\.
&D
co
Open Loop Voltage Gain (V/V)
.
t\.
II
z
Ift
1M
w
..~
Ri .Z.I
Vs= ,ISVTA' ZS'C
>
co
i'
=20 LOG VeM + OPEN lOOP
VOLTABE IWII I
f- '\..
FREaUENCY 1Hz)
),
J
CIIRR
c
w
L
FREaUEICY 1Hz)
..
..
z
ii
IDD
1
l_
I'
I"
FREQUEICY 1Hz!
-I-J
,_ I~
III
~
!
:a
"
ZI
Common-Mode Rejection
Ratio
:!!
co
;:
IZD
;;
RL·n
TA' ZS'C
AV'I
,,
,.
a
I.V
-5
~
IDDl
FREaUENCY 1Hz)
1M
10M
IImV
I
I
-ID
1.1
l\
1\\
I
10
SEnUNGnMEJ.s)
TL/H/8358-6
3-812
-I
r-
Pulse Response
0
.....
QC)
Small Signal Inverting
Small Signal Non-Inverting
~E
:>
Ci
">E
e'"
'"z
'"~z
:>
e
~
"U
en
w
w
...'"'"
'">
...'"
'"'"
'"'"...
l-
I-
'">
...'"
'"'"
0
l-
I-
l-
I-
TIME (0.2 ~s/DIV)
TIME (0.2 j.
...'"
'"'"
I-
C>
>
I-
I-
I-
I-
...'"
'"'"
TIME (2 j.
Ci
">
'"z
~
w
'"'"
...
I-
C>
>
...'"
I-
I-
'"C>
TIME (5 j. Vo
Paresitic inpul capacilance CI '" (3 pF for Tl081 plus any additional
layout capacitance) interacts with feedback elements and creates undesirable high frequency pole. To compensale, add C2 such Ihat:
R2C2 '" RICI.
Ultra-Low (or High) Duty Cycle Pulse
Generator
IN914
RI
IN914
Long Time Integrator
RESET
-1
RZ
"'-4"'--..JI,M~....-oOUTPUT
---I
INTEGRATE
Y-
Y·
c*
c*
Y·
"*
1M
1M
YOUT·
~
'2
J
YIN OIT
'I
1M
YTUH/8358-11
Y-
4.8 - 2Vs
• IoUTPUTHIGH ;:: RIC
In 4.8 _ Vs
TL/H/8358-12
• Low leakage capacitor
• 5Dk pot used for less sensitive Vas adjust
• IoUTPUT LOW;:: R2C ! n 2Vs - 7.8
Vs - 7.8
where Vs
= V+ + lv-I
*Iow leakage capacitor
3-815
•
a..
o
~ ~National
~ Semiconductor
...
BI.FET II ™ Technology
TL082CP Wide Bandwidth Dual
JFET Input Operational Amplifier
General Description
Features
These devices are low cost, high speed, dual JFET input
operational amplifiers with an internally trimmed input offset
voltage (BI-FET IITM technology). They require low supply
current yet maintain a large gain bandwidth product and fast
slew rate. In addition, well matched high voltage JFET input
devices provide very low input bias and offset currents. The
TL082 is pin compatible with the standard LM 1558 allowing
designers to immediately upgrade the overall performance
of existing LM1558 and most LM358 deSigns.
•
•
•
•
•
•
•
•
•
These amplifiers may be used in applications such as high
speed integrators, fast DI A converters, sample and hold
circuits and many other circuits requiring low input offset
voltage, low input bias current, high input impedance, high
slew rate and wide bandwidth. The devices also exhibit low
noise and offset voltage drift.
Typical Connection
Internally trimmed offset voltage
Low input bias current
Low input noise voltage
Low input noise current
Wide gain bandwidth
High slew rate
Low supply current
High input impedance
Low total harmonic distortion Av = 10,
RL = 10k, Vo = 20 Vp - p,
BW = 20 Hz-20 kHz
15 mV
50 pA
16nV/YHz
0.01 pAlYHz
4 MHz
13 V/I1-s
3.6 rnA
10120
<0.02%
50 Hz
• Low lIt noise corner
• Fast settling time to 0.01 %
211-s
Connection Diagram
RI
Dual·ln·Llne Package (Top View)
v'
OUTPUT A
R,
,-_or--r-
INVERTING INPUT A
NON-INVERTING
INPUT A
3
INVERTING INPUT B
v--i---'
TL/H/8357 -1
5
TUH/8357-3
vcco----....- - - - -..._ _..,
TRIMMED
-VEE
INTERNALLY
TRIMMED
0 - -.....- -.....- - - -....-_....1
3-816
NON.INVERTING
INPUT B
Order Number TL082CP
See NS Package Number N08E
Simplified Schematic
INT£RNAllY
OUTPUT 8
TL/H/8357-2
-I
b
CO
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
Differential Input Voltage
±18V
Power Dissipation
(Note 1)
Operating Temperature Range
±30V
Input Voltage Range (Note 2)
±15V
Output Short Circuit Duration
Continuous
Storage Temperature Range
-65'Cto +150'C
260'C
Lead Temp. (Soldering, 10 seconds)
O'Cto +70'C
ESD rating to be determined.
150'C
Tj(MAX)
DC Electrical Characteristics (Note 4)
Symbol
Parameter
TL082C
Conditions
Min
Units
Typ
Max
15
20
Vos
Input Offset Voltage
Rs = 10 kfl, TA = 25'C
Over Temperature
5
mV
mV
f:..vos/l!.T
Average TC of Input Offset
Voltage
Rs = 10kfl
10
los
Input Offset Current
Tj = 25'C, (Notes 4, 5)
Tj s;; 70'C
25
200
4
pA
nA
18
Input Bias Current
Tj = 25'C, (Notes 4, 5)
Tj s;; 70'C
50
400
8
pA
nA
RIN
Input Resistance
T· = 25'C
AVOL
Large Signal Voltage Gain
Vs = ±15V, TA = 25'C
Vo= ±10V,RL=2kfl
Over Temperature
25
Vo
Output Voltage Swing
Vs= ±15V,RL=10kfl
±12
±13.5
V
VCM
Input Common-Mode Voltage
Range
Vs = ±15V
±11
+15
-12
V
V
/J-V/'C
1012
fl
100
V/mV
15
V/mV
CMRR
Common-Mode Rejection Ratio
Rs s;; 10 kfl
70
100
dB
PSRR
Supply Voltage Rejection Ratio
(Note 6)
70
100
dB
Is
Supply Current
3.6
5.6
mA
AC Electrical Characteristics (Note 4)
Symbol
Parameter
TL082C
Conditions
Min
Amplifier to Amplifier Coupling
TA = 25'C, f = 1Hz20 kHz (Input Referred)
SR
Slew Rate
Vs = ±15V, TA = 25'C
GBW
Gain Bandwidth Product
Vs = ±15V, TA = 25'C
en
Equivalent Input Noise Voltage
in
Equivalent Input Noise Current
8
Typ
Units
Max
-120
dB
13
V//J-s
4
MHz
TA = 25'C, Rs = 100fl,
f = 1000 Hz
25
nV/yHz
Tj = 25'C, f = 1000 Hz
0.01
pAlyHz
Note 1: For operating at elevated temperature, the device must be derated based on a thermal resistance of IIS'C/W iunction to ambient for the N package.
Note 2: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
Note 3: The power dissipation IimH, however, cannot be exceeded.
Note 4: These spacHications apply for Vs = ± ISV and O"C "TA " + 70"C. Vos. 18 and los are measured at VCM = O.
Note 5: The input bias currents are junction leakage currents which approximately double for every 1O"C increase in the junction temperature, Tj. Due to the limited
production testtima, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power diSSipation, Po. TJ = TA + 8JA Po where 8JA is the thermal resistance from junction to ambienl Use of a heat sink is
recommended if input bias current is to be kept to a minimum.
Note 6: Supply voltage rejection ratio is measured for both supply magnHudes increasing or decreasing simultaneously in accordance with common practice.
Vs = ±6Vto ±ISV.
3-817
I\)
o
"'D
Q.
o
:
Typical Performance Characteristics
9
IInput Bias Current
II
~
a:
a:
&8
;;
40
I-
il
:.!
.- -
VS' '15V- I--I-TA - 25 C
100
i
Input Bias Current
Supply Current
v~~;f1k~lm
-
4A
D"';TA';+lD'C
Vs' '15V
i
I--
ia:
~
il
~
i
20
o
10
-11
-5
L--'---L_L-..J....--!.._'"--~
~~
!i
.
~
1::1
.=
"' .
15
"'~
"'w
o
20
o
,
.
w
~ -10
..
~
..~
...
.
25"C
-5
10'C
I-
o·c
3D
iO
~
RL =2k
-TA" 25"C
..
i..
..
3D
20
40
3D
Output Voltage Swing
VS= ±15V
TA=25'C
25
~
20
w
28
c
15
>
10
~.
!;
10
/
"co==
==
-0
o
10
20
30
40
i"o...
z
::I
z
3,5
r"""-
....
;;;
Slew Rate
151
20
~
lD
f-
~
GAIN
-10
l\
TEMPERATURE ('CI
50
:l!
-50
~
i:I
fa
.
-150
-3D
111213040518010
VS=±IIV
RL -20
AV'1
III
]
14
FALUNG
~
~
c
13
~
12
a:
-
I--
RiSING
-100
-20
3
15
100
JmE
c
.......
10
RL - DUTPUT LOAD ('Ill
I'vs= ·15V
RL·2.
CL -1DOpF
~
r-....
0,1
20 .
Bode Plot
RL -Zk
CL '100,F
u
15
3D
V~ - ±1~V
i
10
5
SUPPLY VOLTAGE (±VI
Gain Bandwidth
..
....c
;..
O'C
DUTPUT SDURCE CURRENT (mAl
Voltage Swing
OUTPUT SINK CURRENT (mAl
I-
10
20
>
~
a
'"
"i
15
w
w
::l
z
40
-:
.
i.
~
!;
~
10
NEGATIVE SUPPLY VDLTAGE (VI
Negative Current Limit
=
i
i\ Y'c
lD"C
/
POSITIVE SUPPLY VOLTAGE (VI
~ -15
\~
/
>'"
;::>
15
25
20
15
I!!oo..
/
w~
10
-r-o-
/
10
Bt!
c
o
"
51
/
zli
:::z
o
·15
a:
~~
V
i!:>
10
Positive Current Limit
~
w
u
O"C 'S TA $. +10' C
~
/
/
B~
w ..
i
V
/
10
Negative Common-Mode Input
Voltage Limit
I-
15
o
SUPPLY VOLTAGE (±VI
20
o C~TA:s:;+10~C
5
ZA
TEMPERATURE rCI
Positive Common-Mode Input
Voltage Limit
20
2.8
01020304050&010
10
COMMON·MODE VOLTAGE (VI
!l
.-/
3.2
",
II:
I-
~
,/
3.6
a:
10
0.1
FREOUENCY (MHz)
110
11
o
10
ZII
30'40
&0
II
10
TEMPERATURE ('CI
TL/H/8357-4
3·818
-t
b
CD
Typical Performance Characteristics (Continued)
N
o
Distortion vs Frequency
0.2
3D
VS"'SV
D.ns
..i
0.125
Ii:
0.1
I I
~
~VOL20~'"
i.
20
">
10
T~=2S,C
0.15
,
";st; 0.015
.
..
':'
Av=1,D~7
100
10
10k
lk
!20
"~
z
"'"
40
;:: 100
-j...J
§2?JkV[
60
~
w
'"
il
RL '2k
I~ TA=25C
I,
20
~
I
f'
I.
I
" '
CMRR = 20 LOG
..!!!. + OPEN LOOP
VOLJAGE ~AIN
I
VCM
10k
lOOk
100
lk
1
!IJJI
lOOk
1M
.
..i;i.
§"
.
.~
;;;
:!!
OJ
100
........
80
~
'"
60
>
2
10M
40
I"",-::SUPPLY
0
100
lK
10k
lOOk
~
1M
w
:;.-~
20
°
I
10
100
-
....
~
10
u
~
">
"~
!
..~
ill
l!;
10K
10M
>
:::";s
40
:;J
50
30
20
IIIUI 111111111
IlIlIi
1111111
10
°
10
111111
100
~
20
100
lk
~
~
"
10k
.."'"
i..
..
..."
...
fl:
~V"" ~
AV' 10
0.1
>
If!
10mV
5
FREQUENCY IHrI
lOOk
1M
10M
"
"
•
VS' ,15V
TA - Z5"C
lmV
°
lmV
10mV
-5
I
(!:
lOOk
10k
Inverter Settling Time
"
y
1111111
lk
10
i1>
1
10M
10
60
..
~
" '"
10k lOOk 1M
FREQUENCY (Hz)
0.01
SUPPLY VOLTAGE (·V)
..~
~
w
a
§AV"oo
I
...
~
15
<
~
VS='!5V
TA= 25 C
TA=10"C
lk
Equivalent Input Noise
Voltage
Output Impedance
....-
10
r\.
40
FREQUENCY (Hz)
TA' 0"C.!!!,.+25"C
5
@
...z
...~
100
RL -2.
lOOK
'"" "
~
10
1M
t:;
VS· '· '5V
TA' 2S'C
-SUPPLY " \
20
Open Loop Voltage
Gain (V/V)
~z
" r\.
FREQUENCY 1Hz)
140
120
FREQUENCY (Hz)
.<
...
1M
Power Supply Rejection
Ratio
~
1
0
10
60
R~
=2k'
VS' '1SVTA'25C
r\.
FREQUENCY (Hz)
Vs= '15Y
10
~
~
Common-Mode Rejection
Ratio
.
.:l!
~
.;;:
80
"
FREOUENCY (Hz)
!
w
~
°
lOOk
...<
..
z
"
~
-
:!! 100
~
5
0
120
;;;
">
~
';"
0.025
VS" 1SV
RL = 2k
TA= 25'C
Av- I
\<111 OIST
w
AV= 100
0.050
"
"a
Open Loop Frequency
Response
Undistorted Output
Voltage Swing
,\
I
-10
0.1
\\
I
10
SETTLING TIME (,..)
TL/H/B357 -5
3-819
a.
0
N
CD
0
Pulse Response
..J
I-
Small Signal Non-Inverting
Small Signal Inverting
>
C
:>e
..
e
z
.
3:
en
..,w
w
;:....
C[
....
I-
Q
Q
:>
:>
...
l-
l-
...
=>
=>
l-
l-
=>
=>
Q
Q
TIME (O.2Ils/DIV)
TIME (0.2 Ils/DIV)
TL/H/8357-7
TL/H/8357 -6
Large Signal Non-Inverting
Large Signal Inverting
>
C
>
c
:>
e..,
.
.
:>
e
z
z
.~
3:
en
....
..,w
C[
C[
~
I-
....
Q
Q
:>
:>
l-
...
l-
=>
=>
...=>
=>
l-
l-
Q
Q
TIME (2IlslDIV)
TIME (2 IlslDIV)
TLlH/8357 -8
TLlH/8357-9
Current Limit (RL = 1000)
.
z
.
~
w
C[
~
:>
Q
l-
...=>
l-
=>
Q
TLlH/8357-10
Application Hints
These devices are op amps with an internally trimmed input
offset voltage and JFET input devices (BI-FET II). These
JFETs have large reverse breakdown voltages from gate to
source and drain eliminating the need for clamps across the
inputs. Therefore, large differential input voltages can easily
be accommodated without a large increase in input current.
The maximum differential input voltage is independent of
the supply voltages. However, neither of the input voltages
should be allowed to exceed the negative supply as this will
cause large currents to flow which can result in a destroyed
unit.
Exceeding the negative common-mode limit on either input
will cause a reversal of the phase to the output and force
the amplifier output to the corresponding high or low state.
Exceeding the negative common-mode limit on both inputs
will force the amplifier output to a high state. In neither case
3-820
-I
b
CD
Application Hints (Continued)
does a latch occur since raising the input back within the
common-mode range again puts the input stage and thus
the amplifier in a normal operating mode.
in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the
internal conductors and result in a destroyed unit.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
Because these amplifiers are JFET rather than MOSFET
input op amps they do not require special handling.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the
input to minimize "pick-up" and maximize the frequency of
the feedback pole by minimizing the capacitance from the
input to ground.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many
instances the frequency of this pole is much greater than
the expected 3 dB frequency of the closed loop gain and
consequently there is negligible effect on stability margin.
However, if the feedback pole is less than approximately 6
times the expected 3 dB frequency a lead capacitor should
be placed from the output to the input of the op amp. The
value of the added capacitor should be such that the RC
time constant of this capacitor and the resistance it parallels
is greater than or equal to the original feedback pole time
constant.
The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
Each amplifier is individually biased by a zener reference
which allows normal circuit operation on ± 6V power supplies. Supply voltages less than these may result in lower
gain bandwidth and slew rate.
The amplifiers will drive a 2 k.o. load resistance to ± 1OV
over the full temperature range of O·C to + 70·C. If the amplifier is forced to drive heavier load curr~nts, however, an
increase in input offset voltage may occur on the negative
voltage swing and finally reach an active current limit on
both positive and negative swings.
Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards
N
o"U
Detailed Schematic
VCCO-----------~t-------------_1~--~------t_------------------_,
Vo
II
D3
..--~~--..--------..____~
-VEEo---~----~--~~------~t---~--~~--
TUH/8357 -11
3-821
a.
oC'\I
CD
::;
Typical Applications
I-
Three-Band Active Tone Control
BASS
11k
3.6k
Uk
>~"""'OoUT
TUH/B357-12
11111111
I' (NOTE 2)
+20
+15
NOTE 4)
111111
1\
I
+10
~
z
~
+5
-
~5
H-ffi.-N1rtt111r-+1/N;IffiI-++t
-10
-15 1-bI-rtIHIl-+tMlI-/.,jtt-/-Iti!II:.~1
-20
1 IlTIl
(NI'W 5
10
100
lk
10k
lOOk
FREQUENCY (Hz)
Note 1: All Controls flat.
Note 2: Bass and treble boost, mid flat.
Note 3: Bass and treble cut, mid flat.
Note
4: Mid boost, bass and treble flat.
Note 5: Mid cut, bass and treble flat.
• All potentiometers are linear taper
• Use the LF347 Quad for stereo applications
3-822
TL/H/B357 -13
-t
Typical Applications
b
CD
(Continued)
~
o'V
Improved CMRR Instrumentation Amplifier
Vs
(+Iot+-~f+=-!
H4
"S
Vo
Hot-t--+lH
-Vs
Vs
Vs'
1.
1.
-
-
h
h
-!
!
-Vs'
-'s
SEPARATE
Av
2R2
= ( "R1+
1
TLlH/8357-14
) R5
ii4
m and .. are separate isolate,d grounds
Matching of R2's, R4's and R5's control CMRR
With AVT =, 1400, resistor matching = 0,01%: CMRR = 136 dB
• Very high input impedance
• Super high CMRR
Fourth Order Low Pass Butterworth Filter
HI
SIk
V,No--'lN.........-'lN.........-..:.j
R3
-15V
11k
R4
1DDk
"3'
'"
-15V
"4'
100k
TLlH/8357-15
• Comer frequency (fel
=~
• Passband galn (Ho)
= (I + R4/R3) (1 + R4'/R3')
1
• .2...
RI R2CCI 27T
=~
1
• .2...
RI'R2'CCI 27T
• First stage Q = 1,31
• Second stage
a = 0,541
• Circuit shown uses nearest 5% tolerance resistor values for a filter with a comer frequency of 100 Hz and a passband gain of 100
• Offset nulling necessary for accurate DC performance
3·823
Typical Applications (Continued)
Fourth Order High Pass Butterworth Filter
Rl
20a.
~":"+--<)VOUT
R3'
20a.
~
1
TUH/8357-16
r--r-
1
= v~02;
° Comer frequency (fc) = VFi1'ii2C2°2;
° Passband gain (HO) = (1 + R4/R3) (1 + R4'/R3')
° First stage Q = 1,31
° Second stage Q = 0,541
° Gircu" shown uses closest 5% tolerance resistor values for a fiher wHh a comer frequency of 1 kHz and a passband gain of 10
Ohms to Volts Converter
10M
'---+-015V
vo = __IV__ x RX
RLADOEA
Where RLADDEA is the resistance from switch SI pole to pin 7 '" the TLOB2CP,
3-824
TL/H/8357 -17
Section 4
Buffers
III
Section 4 Contents
Buffers Definition of Terms ..........................................................
Buffers Selection Guide .... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH0002/LH0002C Current Amplifier ....... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH0033/LH0033A1LH0033C/LH0033AC, LH0063/LH0063C Fast Buffer Amplifiers ........
LH2110/LH2210/LH2310 Dual Voltage Followers. ..... .......... ... . .. .... ... .........
LH4001 Wideband Current Buffer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH4002 Wideband Video Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . . . .
LH4003/LH4003C Precision RF Closed Loop Buffer . . . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH4004/LH4004C Wideband FET Input Bufferl Amplifier ...... . . . . . . . . . . . . . . . . . . . . . . . . . .
LH4006 Precision RF Closed Loop Buffer. . . . . . . . . . . . . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH4008/LH4008C Fast Buffer............... .... . .............. . ... .. ... .... ........
LH4009/LH4009C Fast Buffer .......................................................
LH401 0/LH401 OC Fast FET Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH4011/LH4011 C Fast Open Loop Buffer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH4012/LH4012C Wideband Buffer..... ........... ..... ....... . .. ........ ...........
LH4033C/LH4063C Fast and Ultra Fast Buffer Amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM102/LM302 Voltage Followers. .. .... ..... .... ........ ... . .... ..... ... ............
LM 11 0/LM21 0/LM31 0 Voltage Followers .......... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM6121/LM6221/LM6321 High Speed Buffers ........................................
LM6125/LM6225/LM6325 High Speed Buffers...... ......... .. ......... ........ ......
4-2
4-3
4-4
4-5
4-8
4-19
4-21
4-25
4-30
4-36
4-42
4-48
4-55
4-62
4-70
4-78
4-86
4-97
4-103
4-116
4-121
m
c
:::
C1I
~National
~ Semiconductor
T
c
C1I
Buffers
Definition of Terms
:;:;:i'
O·
:::s
o
-i
C1I
Large-Signal Voltage Gain: The ratio of the output voltage
swing to the change in input voltage required to drive the
output from zero to this voltage.
Output Impedance: The ratio of output voltage to output
current under the stated conditions for source resistance
(Rs) and load resistance (RLl·
Output Resistance: The small signal resistance seen at the
output with the output voltage near zero.
Output Voltage Swing: The peak output voltage swing, referred to zero, that can be obtained without clipping.
Bandwidth: That frequency at which the voltage gain is reduced to 1/,f2 times the low frequency value.
Common-Mode Rejection Ratio: The ratio of the input
common-mode voltage range to the peak-to-peak change in
input offset voltage over this range.
Harmonic Distortion: That percentage of harmonic distortion being defined as one-hundred times the ratio of the
root-mean-square (rms) sum of the harmonics to the fundamental.
% harmonic
(V2 2 + V3 2 + V42 + ... )1/2 (100%)
distortion =
V1
Offset Voltage Temperature Drift: The average drift rate
of offset voltage for a thermal variation from room temperature to the indicated temperature extreme.
Power Supply Rejection: The ratio of the change in input
offset voltage to the change in power supply voltages pro.
ducing it.
where V1 is the rms amplitude of the fundamental and V2,
V3, V4, ... are the rms amplitudes of the individual harmonics.
Input Bias Current: The average of the two input currents.
Input Common-Mode Voltage Range: The range of voltages on the input terminals for which the amplifier is operational. Note that the specifications are not guaranteed over
the full common-mode voltage range unless specifically
stated.
Settling Time: The time between the initiation of the input
step function and the time when the output voltage has settled to within a specified error band of the final output voltage.
Slew Rate: The internally-limited rate of change in output
voltage with a large-amplitude step function applied to the
input.
Supply Current: The current required from the power supply to operate the amplifier with no load and the output midway between the supplies.
Transient Response: The closed-loop step-function response of the amplifier under small-signal conditions.
Input Impedance: The ratio of input voltage to input current
under the stated conditions for source resistance (Rs) and
load resistance (RLl.
Input Offset Current: The difference in the currents into
the two input terminals when the output is at zero.
Input Offset Voltage: That voltage which must be applied
between the input terminals through two equal resistances
to obtain zero output voltage.
Input Resistance: The ratio of the change in input voltage
to the change in input current on either input with the other
grounded.
Unity Gain Bandwidth: The frequency range from dc to the
frequency where the amplifier open loop gain rolls off to
one.
Voltage Gain: The ratio of output voltage to input voltage
under the stated conditions for source resistance (Rs) and
load resistance (RLl.
Input Voltage Range: The range of voltages on the input
terminals for which the amplifier operates within specifications.
4-3
3!II
~NatiOnal
Semiconductor
Buffers Selection Guide (Notes 1 and 2)
Device
Type
Key FeatlJres
Slew Rate Bandwidth Gain
(V/!-,s) -3dB (MHz) (Av)
Output
(V,mA)
Full PowerBW
(MHz @ Vpp, Rd
Test
Conditions
LH4012
Super Fast, High Current
11,500
460
0.93
±11.4, ±230
180 @ 20, 50
RL=50,Vs= ±15V
LH4009
LH4008 Type with Short
Circuit Protection
8000
190
0.87
±11, ±220
130 @ 20, 50
RL = 50, Vs = ±15V
LH4008
FET Input, High Current,
Ultra Fast
7000
180
0.94
±12, ±240
110@20,50
RL = 50, Vs = ±15V
LH4011
Very Fast, High Current
5000
160
0.94
± 11.4, ±230
80@20,50
RL = 50, Vs = ±15V
LH4010
FET Input, High Speed
2500
200
0.97
±9, ±90
80 @ 10, 1k
RL = 1k, Vs = ±15V
LH0063
FET Input, Very Fast
2400
200
0.93
± 13, ±260
40@20,50
RL = 50, Vs = ±15V
LH4063
Low Cost LH0063
2400
200
0.93
±13, ±260
40 @20, 50
RL = 50, Vs = ±15V
LH0033
FET Input, High Speed
1500
100
0.98
±9, ±90
24@ 20, 1k
RL=1k,Vs= ±15V
LH4033
Low Cost LH0033
1400
100
0.98
±9, ±90
20@ 20, 1k
RL=1k,Vs= ±15V
LH4002
Wide band Video Buffer
1250
200
0.97
±2.2, ±44
100 @ 4, 50
RL = 50, Vs = ±5V
LH4003
Precision Buffer
1000
250
0.98
±3, ±60
80 @4, 50
RL = 50, Vs = ±6V
LH4006
Precision Buffer
1000
350
0.98
±3, ±60
80 @ 4, 50
RL = 50, Vs = ±6V
LM6121/6125
High Speed VIPTM Buffer
800
50
0.90
± 12, ±240
10.6@ 12,50
RL = 50, Vs = ±15V
LH4004
Current Feedback Buffer
600
125
0.98
±4.5, ±90
40 @ 5, 50
RL = 50, Vs = ±12V
LHOO02
Medium Speed
200
30
0.97
± 10, ±100
3 @ 20, 1k
RL= 1k,Vs= ±12V
LH4001
Low Cost LHOO02
125
25
0.97
±10, ±100
4 @ 10,100
RL = 100, Vs = ±12V
LH2110
Dual Voltage Follower
30
20
0.999
±10, ±10
0.5@20, 10k
RL = 10k, Vs = ±15V
30
20
0.9999
±10, ±10
0.5 @ 20, 10k
RL = 10k, Vs = ±15V
LM110,210,310 Voltage Follower
Note 1: Datasheet should be referred to for test conditions and more detailed information.
Note 2: 20QoC Temp Range Parts are available. Consult local sales office for information.
4-4
~-----------------------------------------------------------------------.
r
::I:
~National
Q
Q
Q
~ Semiconductor
N
........
r
::I:
Q
Q
Q
LH0002/LH0002C Current Amplifier
N
(")
General Description
The LH0002fLH0002C is a general purpose current amplifier.
cuit also provides a low output impedance for both the positive and negative slopes of output pulses.
The LH0002 is available in an 8-lead low-profile TO-S header and a 20-pin leadless chip carrier; the LH0002C is also
available in an 8-lead TO-S, and a 10-pin molded dual-in-line
package.
Features
400 kn
• High input impedance
6n
• Low output impedance
• High power efficiency
• Low harmonic distortion
• DC to 30 MHz bandwidth
• Output voltage swing that approaches supply voltage
• 400 mA pulsed output current
• Slew rate is typically 200 Vf
• Operation from ± SV to ± 20V
These features make it ideal to integrate with an operational
amplifier inside a closed loop configuration to increase current output. The symmetrical output portion of the cir-
The LH0002 is specified for operation over the -SS'C to
+ 12S'C military temperature range. The LH0002C is specified for operation over the O'C to + 8S'C temperature range.
Applications
"'S
•
•
•
•
•
Line driver
30 M Hz buffer
High speed Df A conversion
Instrumentation buffer
Precision current source
Schematic and Connection Diagrams
Dual-In-Line Package
V2+
V1+
EI (IO)--+--H
INPUT
V1-
3(9)E3
R3
V2-
2
INPUT 8(3)
10
2
9
3
8
P-r
I-0UTPUT
r-2
R111R2
~
SELECT CAPACITOR TO ADJUST
Vs· !SVTOt15V
RL
~
TLlH/5560-4
'Previously called NHOOO2/NHOOO2C
4-6
r.!~ME RESPONSE OF PULSE.
31
~
T
5DnLOAO
~
TLlH/5560-5
r
:::r:
o
o
o
Typical Performance Characteristics
Maximum Power Dissipation
1.2
.
CASE 'JC • 75'CIW
1.0
w
'JA' I25'CIW
0.4
I I
I I
'0.2
2&
~ 0.4
r'\. \
"-
.,. ..,
D.l
1.0
50 75 100 125 150 175
5.0
chi.., ft ...
ID.G L_lhan ~D%
I
-55'1:10125'1:
'.G
./
./
./
'"
~
~ 5.0
"~ 4.0.
~
0.1
lao
~
c
f
0.2
0.5
I
10
o
V, '±!2V
RL -As·SIIl
lA'" zs-c
-1.0
OUTPUT \
I
1.0
......
l.I
Negative Pulse
T.. ;;2~C
r-
2.0
~
FREnUENCY IMHd
If
3.0
-2.D
\
J
!! 0
6.0
0
1/
o
Vs "±1ZV
RL " As" SCMl
r- 'i~T
CI
2.0
o
50..
f
Positive Pulse
T"25'1:'1
,
-I
PHASi -
2G.D
As·'Okn
10
FREQUENCY IMHd
Supply Current
6.0
IG.D
~.IT"25'1:./
10o
-,..;.
~
I
2.1
TEMPERATURE lOCI
12.'
~
-1 ....
,/1
V
0.1
Z... ·,.0kn.'DMHz. ; '
-24}
Ii
- ~ h~UTJUTI'
-\ INPUT
-3.0
\
I
1._ r-
-4.0
-5.0
'.G
12.1
o
15.0
2D 4D
60
o
10 IDD
TIMElml
SUPPLY VOLTAGE (±VI
•
20
40 60 .0
TIME Ind
lao
120
Input Offset Current
T.-25·C~ ~
T. - -SS·c.l
~
.......
~I/'
~ ~ ........ ~T.-1Z5·C
,. V~ /'
o
"
6
I
10
12
14
1&
tI
20
SUPPLY VOLTAGE ttVI
TL/H/5560-7
4-7
o
o
N
(')
o RL• Ion., Vs " :!:IZ.DV
IDD
-32
I~
VIN · , V,"''' RL • 5on. Vs· :!:tZ.OV _
T.-25'1:
I
co
-IGD
VIN ·0.3 Vr ....
Q.I
l:!
A".,ENT
0.6
~Ayl-
~ 0.&
I I r\.
D.'
Input Impedance
(Magnitude & Phase)
Frequency Response
1.0
I I
I I
U
N
......
r
:::r:
o
~National
~ Semiconductor
LH0033/LH0033A/LH0033C/LH0033AC/LH00631
LH0063C Fast and Ultra Fast Buffer Amplifiers
General Description
The LH0033/LH0033A and LH0063 are high speed, FET
input, voltage follower/buffers designed to provide high cur- '
rent drive at frequencies from DC to over 100 MHz. The
LH0033/LH0033A will provide±10 rnA into 1 kn loads
(±100 rnA peak) at slew rates of 1500V/p.s. The LH0063
will provide ± 250 rnA into 50n loads (± 500 rnA peak) at
slew rates up to 6000V/p.s. In addition, both exhibit excellent phase linearity up to 20 MHz.
Both are intended to fulfill a wide range of buffer applications such as high speed line, drivers, video impedance
transformation, nuclear instrumentation amplifiers, op amp
isolation buffers for driving 'reactive loads and high impedance input buffers for high speed A to Ds and comparators.
In addition, the LH0063 can continuously drive 50n coaxial
cables or be used 'as a yoke driver for high resolution CRT
displays. For additional applications information, see AN-48.
These devices are constructed using specially selected
junction FETs and active laser trimming to achieve guaranteed performance speCifications. The LH0033/LH0033A
and LH0063 are specified for operation from - 55"C to
+ 125"C; whereas, the LH0033C/LH0033AC and LH0063C
are specified from :c.25"C to + 85"C. The LH0033/
LH0033A is available in either a 1,5W metal TO-8 package
or an 8-pin ceramic dual-in-line package. The LH0063 is
available in a 5W 8-pin TO-3 package.
Features
•
•
•
•
•
•
•
•
Ultra fast (LH0063): 6000 VI P.s
Wide range single or dual supply operation
Wide power bandwidth: DC to 100 MHz
High output drive: ± 10V with 50n load
Low phase non-linearity: 2 degrees
Fast rise times: 2 ns
High current gain: 120 dB
High input resistance: 101on '
Advantages
•
•
•
•
•
Only 10V supply needed for 5 Vp-p video out
Speed does not degrade system performance
Wide data rate range for phase encoded systems
Output drive adequate for most loads
Single pre-calibrated package
Connection Diagrams
LH0033G
Metal Can Package
LH0033J
Dual·ln·Line Package
Nt
INPUT
OFFSET
PRESET
OFFSET
ADJUST
LH0063K
Metal Can Package
y+
··M'y+~~.'
8:
"
J\
y-
OUTPUT
4
5
TOP VIEW
INPIll
:FFS£T
ADJUST
OFFSET
OUTPUT
0
PRES£!
TLlK/5507-2
TLlK/5507-S
Nt
Top View
TOP VIEW
Case is electrically isolated
TL/K/5507-1
Case is electrically isolated
Leadless Chip Carrier
Order Number LH0033G, LH0033AG, LH0033CG,
LH0033ACG, LH0063K, LH0063CK,
LH0033J or LH0033CJ
See NS Package Number G12B, HY08A or K08A
""
"
""
"
.
12
v,
v,'
TLlK/5507-27
Order Number LH0033E
See NS Package Number E48B
4-8
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Notes 5 & 7)
Supply Voltage (v+ -V-)
40V
Maximum Power Dissipation (See Curves)
LH0063/LH0063C
LH0033A/LH0033AC/LH0033/LH0033C
Peak Output Current
LH0063/LH0063C
LH0033A/LH0033ACI
LH0033/LH0033C
Input Voltage
- 55'C to + 125'C
- 25'C to + 85'C
-65' to
Storage Temperature Range
+ 150'C
Lead Temp. (Soldering, 10 seconds)
175'C
300'C
ESD rating to be determined.
±VS
Continuous Output Current
LH0063/LH0063C
LH0033A/LH0033AC/LH0033/LH0033C
±250 mA
Operating Temperature Range
LH0033A1LH0033 and LH0063
LH0033AC/LH0033C and LH0063C
5W
1.5W
Maximum Junction Temperature
±500 mA
±250 mA
±100 mA
DC Electrical Characteristics Vs= ± 15V, TMIN-O:TA-O:TMAX, unless otherwise specified, (Note 1)
Parameter
Conditions
LHOO33AC
LHOO33A
Typ
Max
Rs= 100n,TJ=25'C,
VIN = OV (Note 2)
Rs= 100n
Min
1
5
Average
Temperature
Coefficient of
Offset Voltage
Rs= 100n, VIN=OV
(Note 3)
50
Input Bias
Current
VIN=OV
TJ = 25'C (Note 2)
T A = 25'C (Note 4)
TJ=TA=TMAX
Vo= ±10V,
Rs=100n,
RL =1.0kn
Output Offset
Voltage
Voltage Gain
Input
Impedance
RL =1 kn
Output
Impedance
VIN= ±1.0V,
RL =1.0k
Output
Voltage Swing
VI= ±14V, RL =1.0k
VI= ±10.5V,
RL = 100n, TA = 25'C
Supply Current
VIN = OV (Note 5)
Min
Typ
Max
6
15
Min
Typ
Max
5.0
10
Min
:::I:
o
o
w
w
o.......
r:::I:
o
o
w
w
»
LHOO33C
LHOO33
r:::I:
o
o
w
w
.......
r:::I:
o
o
w
w
»
.......
r-
Units
Typ
Max
12
20
mV
25
mV
o.......
r:::I:
o
o
w
.......
r:::I:
o
o
0)
w
0)
10
20
100
50
15
100
50
100
100 ",VI'C
50
o
100
1.5
7.5
250
2.5
10
0.97
0.98 1.00
0.96
0.98
10 10
1011
10 10
10 11
6.0
10
±12
6.0
0.97
0.98
1010
10 11
10
±12
±9.0
Power Consumption VIN=OV
1.00
250
2.5
10
6.0
1.00
0.96
pA
nA
nA
0.98 1.00
VIV
1010 10 11
10
n
6.0
±12
±9.0
500
5.0
20
10
±12
±9.0
n
V
±9.0
V
20
22
21
24
20
22
21
24
mA
600
660
630
720
600
660
630
720
mW
AC Electrical Characteristics TJ=25'C, Vs= ±15V, Rs=50n, RL =1.0 Kn (Note 6)
Parameter
Conditions
LHOO33A
Min
Slew Rate
VIN=±10V
Bandwidth
VIN = 1.0 Vrms
Typ
Max
LHOO33AC
Min
Typ
Max
LHOO33
Min
Typ
LHOO33C
Max
Min
Typ
Units
Max
1000 1500
1000 1400
1000 1500
1000 1400
100
100
100
100
MHz
Phase Non-Linearity BW = 1.0Hz to 20 MHz
2.0
2.0
2.0
2.0
degrees
Rise Time
Ll.VIN=0.5V
2.9
3.2
2.9
3.2
ns
Propagation Delay
Ll.VIN=0.5V
1.2
1.5
1.2
1.5
ns
<0.1
<0.1
<0.1
<0.1
%
Harmonic Distortion f>1 kHz
V/",s
Note 1: LH0033 and LH0033A are 100% production tested as specified at 25° C, 125°C, and-55°C. LH0033AC/C are 100% production tested at 25°C only.
Specifications at temperature extremes are verified by sample testing, but these limited are not used to calculate outgoing quality level.
Note 2: Specification is at 25°C junction temperature due to requirements of high speed automatic testing. Actual values at operating temperature will exceed the
value at TJ = 25°C. When supply voltages are ± 15V, no-load operating junction temperature may rise 40-60"C above ambient, and more under load conditions.
Accordingly, Vas may change one to several mV, and 18 will change significantly during warm-up. Refer to 18 vs temperature graph for expected values.
Note 3: LH0033 and LH0033A are 100% production tested for this parameter. LH0033AC/C are sample tested only. Limits are not used to calculate outgoing
quality levels. I!:Nas/I:1T is the average value calculated from measurements at 25"C and TMAX.
Note 4: Measured in still air 7 minutes after application of power. Guaranteed through correlated automatic pulse testing.
Note 5: Guaranteed through correlated automatic pulse testing at T J = 25°C.
Note 6: Not 100% production tested; verified by sample testing only. Limits are not used to calculate outgoing quality level.
Note 7: Refer to RETS0033AG for the LH0033AG and RETS0033G for the LH0033G military specifications.
4-9
•
o
C")
CD
o
o
::I:
...I
......
C")
DC Electrical Characteristics Vs= ± 15V, T MIN,;;TA,;;TMAX unless otherwise specified.(Note 1)
Parameter
LH0063
Conditions
Min
Typ
LH0063C
. Max
Min
Units
Typ
Max
CD
o
o
Output Offset Voltage
RS';;1 OOko., TJ=25°C, RL = 1000. (Note 2)
10
::I:
...I
......
o
~
C")
Average Temperature
Coefficient of Output
Offset Voltage
Rs,;;100ko.
::I:
Input Bias Current
TJ=25°C (Note 2)
o
o
25
10
100
300
10
50
mV
..100
mV
p'vrc
300
30
10
30
nA
...I
......
100
o
C")
C")
o
o
::I:
nA
Voltage Gain
V'N= ±10V, Rs,;;100ko., RL=1 ko.
0.94
0.96
1.0
0.94
0.96
1.0
VIV
Voltage Gain
V'N= ±10V, Rs,;;100 ko., RL =500.
TJ = 25°C
0.92
0.93
0.98
0.91
0.93
0.98
VIV
...I
~
C")
100
Input Capacitance
Case Shorted to Output
8.0
Output Impedance
VOUT= ± 10V, Rs';; 100 ko., RL = 500.
1.0
::I:
Output Current Swing
V'N= ±10V, Rs';;100 ko.
0.2
0.25
0.2
0.25
A
......
C")
Output Voltage Swing
RL =500.
±10
±13
±10
±13
V
o
o
Output Voltage Swing
Vs= ±5.0V, RL =500., TJ=25°C
5.0
7.0
5.09
7.0
...I
Supply Current
TJ = 25°C, RL =
(Note 3)
C")
o
o
...I
8.0
pF
1.0
4.0
4.0
0.
C")
::I:
00,
Supply Current
Vs= ±5.0V (Note 3)
Power Consumption
TJ = 25°C, RL =
Power Consumption
Vs= ±5.0V
00,
35
Vs= ± 15V
65
35
1.95
1.05
50
Vs= ±15V
1.05
Vp-p
65
50
500
mA
mA
1.95
500
W
mW
AC Electrical Characteristics TJ=25°C, Vs= ±15V, Rs=500., RL =500. (Note 4)
Parameter
LH0063C
LH0063
Conditions
Min
Typ
Max
Min
Typ
Units
Max
Slew Rate
RL = 1.0 ko., V'N= ± 10V
Slew Rate
RL =500., V'N= ±10V, TJ = 25°C
Bandwidth
Y,N = 1.0 Vrms
200
200
MHz
Phase Non-Linearity
BW=I.0 Hz to 20 MHz
2.0
2.0
degrees
Rise Time
b.V'N=0.5V
1.6
1.9
Propagation Delay
b.V'N=0.5V
1.9
2.1
ns
<0.1
<0.1
%
6000
2000
Harmonic Distortion
2400
2000
6000
V/p.s
2400
V/p.s
"
'.
ns
Note 1: LH0063 is 100% production tested as specified ilt 25·C, 125·C, and -55·C. LH0063C is 100% production tested at 25·C only. Specifications at
temperature extremes are verified by sample testing. but these limits are not used to calculate outgoing quality level.
Note 2: Specificati'on is at 25°C junction temperature due to requirements of high speed automatic testing. Actual values at 'operating temperature will exceed the
value at TJ = 25°C. When supply voltages are ± 15V, no-load operating junction temperature may rise 40-6CY'C above ambient, and more under load conditions.
Accordingly. Vas may change one to several mV, and 18 ans los wil! change significantly during warm-up. Refer to Is and los vs temperature graph for expected
values.
Note 3: Guaranteed through correlated automatic pulse testing at TJ~25·C.
Note 4: Not 100% production tested; verified by sample testing only. Limits are not used to calculate outgoing quality level.
Note 5: Refer to RETS0063K for the LH0063K military specifications.
4-10
Typical Performance Characteristics
2.0
ii"
LH0033 Power Dissipation
LH0063 Power Dissipation
t---l~-"\rl--+I_+1+--1
CAS~ (OJe ;15'CI/W)
CASE
I_
"OJe =60'C/W
1.5 1-~1c-1I--'''II~r--r---t-l
~
;;c-
AMBIENT (8JA=40'C/W) ,
~
""
.........
~
iii
"
.......
1.0 f----'--=~-='I.".-1''I,...... +-_l
AMBIENT; "" _"
OJA I=100;C/W
.........
~ 0.5
15
ffi
300
25
50 75 100 125
TEMPERATURE I'C)
150
25
~
.....
r
::J:
...
~-100
co -200
./
o
oCo)
""
Co)
-300
-15 -10 -5
10
OUTPUT VOLTAGE (V)
50 75 100 125 150
TEMPERATURE ('C)
Co)
o
oCo)
r-
i:l
0'----'---'---'---'-......- '
o
Vs=±15V
Te=25'C
V
e
i'.
.....
r
::J:
./
200
;:- 100
~
I--l--f--l--t-:--I--f
LH0063 DC Safe Operating
Area
r
::J:
o
oCo)
15
o
.....
r
::J:
o
oCo)
Co)
LH0033 Supply Current vs
LH0063 Supply Current vs
Supply Voltage
21 Supply Voltage
~
+1
I
~
.
g;
20
19
65
f---+-+-~~~~-,
;;c-
Te-12~
oS 60
...
~
r-"~~~~~~~'
i:l
~
!l:
lB bII'~-j--+--+--t--l
55
~
.....
i,....o'" ~
l..--" ~
/' . / ..... Te =25'C
18
~
16 -Rl=1kh
Rs =100 kO
14 -Te=+25'C
12
!:l
10
;;
:!:!.
....""
co
V/
LH0033 Output Voltage vs
Supply Voltage
:::I
II
o
.....
r
~
::J:
o
o
en
~
/
50
10
15
SUPPLY VOLTAGE (±V)
lB
;;
-H
16
14
w
:.l! 12
....
!:l
co
LH0063 Output Voltage vs
Supply Voltage
RL-500
Rs=lk
±VIN=±VS
Te=25'C
I
;; -2
:::I
e:
./
:::I
co
"'"
V
..""
0.4
Rs=50D
I-RL=lkO
VIN=1.0 VIm.
40
35
30
Av - - j
r
If
0.2
~
1.0
/j-
2.0 5.0 10.0 20.0 50
FREQUENCY (MHz)
25
20
B.O
3!
!
j:
~ :e
!j;
co ~
6.0
4.0
15
Ci
co
10
~
~ 2.0
10
~
1
~
;::
INPUTI'
:::I
1
"OUTPUT
~
1
20
30 40
TIME (ns)
50
10
60
LH0033 Rise and Fall Time
vs Temperature
Vs= ±15V
Rs=500
RL=l k
I--"
-
;;
io--' I--"
+1
II
....
!:l
co
~ :i
~
I,
-50
6
o
50
100
TEMPERATURE ('C)
12
10
B
6
20
30 40
TIME (.s)
150
2
0
-2
-4
-6
-B
-10
-12
50
60
LH0063 Large Signal Pulse
Response
VS-±15V
Te =25'C
w
:.l!
~
i!!
o
100
Te= +25'C
co
10
-
r - IlL =1 kO, Rs =500
~
r--OUTPUT
20
......J
co 0.6
!:l
co
....
12
600
1
Vs
.,
r- Vs +15V
~TA-25'C
i3~
!'"
.I/' ;r./
125
=<
i~
",,,
V~
...<
±15V
.......
100
w
±10V~
z
~ 100
LH0033 Normalized Input
Bias Current During
Warm-Up
..J
......
c(
-Vs
Vs
10
o
:::E:
C')
f---
lk
~
C')
C')
..J
.
0.001
......
(.)
o
o
+5V
....
220
200
1.0
i+1
~
'"
=
LJ/
Vs
.,
t~ ~
m
LH0063 Frequency
Response
i....
if'
1.0
'I
0.1
.,
~
-ISV
I I I I I
o
012345678
TIME (ns)
10 8 6 4 2 0 -2 -6 -10
INPUT VOLTAGE (V)
TLlK/5507-5
r - -....- - +15V
INPUT
Application Hints
OFFSET
PRESET
(OPEN)
OFFSET
ADJUST
RECOMMENDED LAYOUT PRECAUTIONS
RF !video printed circuit board layout rules should be followed when using the LH0033 and LH0063 since they will
provide power gain to frequencies over 100 MHz. Ground.
planes are recommended and power supplies should be decoupled at each device with low inductance capacitorS. In
addition, ground plane shielding may be extended to the
metal case of the device since it is electrically isolated from
internal Circuitry. Alternatively the case should be connected
to the output to minimize input capacitance.
OUTPUT .
200n
L -........_ _...._
-15V
TLlK/5507-6
FIGURE 1. Offset Zero Adjust for LH0033
(Pin numbers shown for TO-S)
OFFSET VOLTAGE ADJUSTMENT
Both the LH0033's and LH0063's offset voltages have been
actively trimmed by laser to meet guaranteed specifications
when the offset preset pin is shorted to the offset adjust pin.
This pre-calibration allows the devices to be used in most
DC or AC applications without individually offset nulling
each device. If offset null is desirable, it is simply obtained
by leaving the offset preset pin open and connecting a trim
pot of 100n for the LH0033 or 1 kn for the LH0063 between the offset adjust pin and V-, as illustrated in Figures
1 and 2.
r - -....--+ 15V
INPUT
OFFSET
PRESET
(OPEN)
OFFSET
ADJUST
'lk
' -......- -...- - -15V
TL/K/5507-7
FIGURE 2. Offset Zero Adjust for LH0063
4·12
r---------------------------------------------------------------------------------, r:::I:
o
Application Hints (Continued)
OPERATION FROM SINGLE OR ASYMMETRICAL
POWER SUPPLIES
SHORT CIRCUIT PROTECTION
In order to optimize transient response and output swing,
output current limit has been omitted from the LH0033 and
Li-10063. Short circuit protection may be added by inserting
appropriate value resistors between Y+ and Vc+ pins and
Y- and Yc- pins as illustrated in Figures 3 and 4. Resistor
values may be predicted by:
Both device types may be readily used in applications where
symmetrical supplies are unavailable or not desirable. A typical application might be an interface to a MOS shift register
where Y+ = +5Y and Y- = -12Y.ln this case, an apparent output offset occurs due to the device's voltage gain of
less than unity. This additional output offset error may be
predicted by:
(Y+ -Y-)
AYo""(1-Av)
2
0.005(Y+ -Y-)
oCo)
Co)
.......
r-
:::I:
o
oCo)
Co)
J>
.......
r-
:::I:
o
oCo)
Y+ YRUM""-=Isc Isc
Co)
o
.......
r-
:::I:
where:
where:
Av = No load voltage gain, typically 0.99
o
oCo)
Co)
ISC,,;100 rnA for LH0033
J>
o
.......
Y+ = Positive supply voltage
ISC";250 rnA for LH0063
Y- = Negative supply voltage
r-
:::I:
For the above example, AYo would be -35mY. This may
be adjusted to zero as described in Figure 2. For AC coupled applications, no additional offset occurs if the DC input
is properly biased as illustrated in the Typical Applications
section.
o
o0)
Co)
.......
r-
:::I:
o
o
0)
Co)
o
v+
V'"
RUM
60
5W
INPUT
INPUT
v-
v-
TL/K/5507-9
TL/K/5507-B
FIGURE 3. LH0033 Using Resistor Current Limiting
FIGURE 4. LH0063 Using Resistor Current Limiting
4-13
o
C')
CD
o
o
::I:
....I
......
C')
CD
o
o
::I:
....I
......
~
C')
o
o
::I:
....I
......
o
C')
Application Hints (Continued)
The inclusion of limiting resistors in the collectors of the
output tra,nsistors reduces output voltage swing. Decoupling
VC+' an.~ Vc- pins with capacitors to ground will retain full
output 'swing for transient pulses. Alternate active current
limit techniques that retain full DC output swing are shown, in
Figures 5 and 6. In Figures 5 and 6, the current sources 'are
saturated during normal operation, thus apply full, supply
voltage to the Vc pins. Under fault conditions, the voltage
decreases as required by the overload.
CAPACITIVE LOADING
Both the LH0033 and LHOOS3 are designed to drive capacitive loads such as coaxial cables in excess of several thousand picofarads without susceptibility to oscillation. However, peak current resulting from (CXdv/dt),should be limited
below absolute maximum peak current ratings for the devices.
Thus for the LH0033:
For Figure 5:
(1l~!N) XYLoS:l OUT oS: ±250 mA
VSE O.SV
RUM=-=--=10.o
Isc SOmA
and for the LHOOS3:
(1l~!N) XCLoS:l OUT oS: ±500 mA
C')
o
o
::I:
In Figure 6, quad transistor arrays are used to minimize ,can
count and:
In addition, power dissipation resulting from driving capacitive loads plus standby power should ,be kept below total
package power rating:
....I
......
~
C')
o
o
VSE
1/3(lsc)
R
UM
O.SV
1/3(200 mAl
8.2.0
PDpkg,~PDC+PAC
::I:
PDpkg.~(V+ -V-)XIS+PAC
....I
......
C')
PAC"'(Vp_p)2XfXCL
where:
Vp-p= Peak-to-peak output voltage swing
f
= Frequency
C')
o
o
::I:
....I
CL
INPUT
~---tr--- OUTPUT
= Load Capacitance
OPERATION WITHIN AN OP AMP LOOP
Both devices may be used as a current booster or isolation
buffer within a closed loop with op amps such as LH0032,
LHOOS2, or LM118. An isolation resistor of 47.0 should be
used between the op amp output and the input of LH0033.
The wide bandwidths and high slew rates of the LH0033
and LHOOS3 assure that the loop has the characteristics of
the op amp and that additional rolloff is not required.
0.01,.F
HARDWARE
In order to utilize the full drive capabilities of both devices,
each should be mounted with a heat sink particularly for
extended temperature operation. The cases of both are isolated from the circuit and may be connected to the system
chassis.
.........._-41-__ -15V
TL/K/5507-10
FIGURE 5. LH0033 Current Limiting
Using Current Sources
DESIGN PRECAUTION
Power supply bypassing is necessary to prevent oscillation
with both the LH0033 and LHOOS3 in all circuits. Low inductance ceramic disc capaCitors with the shortest practical
lead lengths must be connected from each supply lead
(within <% to %" of the device package) to a ground
plane. CapaCitors should be one or two 0.1 ,..F in parallel for
the LH0033; adding a 4.7 ,..F solid tantalum capaCitor will
help in troublesome instances. For the LH0063, two 0.1 ,..F
ceramic and one 4.7 ,..F solid tantalum capaCitors in parallel
will be necessary on each supply lead. , '
INPUT
TL/K/5507-11
FIGURE 6. LHOOS3 Current Limiting
Using Current Sources
4-14
r-
::I:
Schematic Diagrams
LH0033/LH0033A
12
«::)
«::)
Co)
Co)
LH0063
.......
r-__________t-__-t________~2~V:
V'"
....
) NORMALLY
I SHORTEO
INPUT
r-
,I
::I:
NORMALLY
I SHORTED
'"
'"
Vc'"
«::)
«::)
Co)
Co)
l>
.......
r-
::I:
«::)
«::)
Co)
Co)
o
H6
.......
r-
OUTPUT
R8
::I:
«::)
«::)
Co)
Co)
~r9
Vc-
"I
«::)
«::)
\ NORMALLY
I SHORTEO
" NORMALLY
SHORTEO
7
10 '"
7
::I:
....
v-
OFFSET
\
'"
V-
r-
«::)
«::)
........ I
en
w
o
TLlK/5507-13
Pin numbers shown for TO-8 ("G") package.
Typical Applications
High Speed Automatic Test Equipment
Forcing Function Generator
VREf1o--_-,:;;
v+o---~~-~----------~
VREF2o--....-~
lk
lk
V... o---~~~~--------~
.,
TL/K/5507-14
4·15
.......
::I:
NORMALLY
SHORTED
TL/K/5507-12
en
Co)
o
C")
CD
C)
C)
Typical Applications
(Continued)
:z:
....I
Gamma Ray Pulse Integrator
.......
C")
+15V
CD
C)
C)
:z:
....I
......
~
C")
C")
C)
C)
:z:
....I
......
oC")
C")
C)
C)
:z:
....I
~
C")
C")
C)
C)
:z:
....I
......
C")
C")
C)
C)
:z:
....I
TL/K/5507-15
High Input Impedance AC Coupled Amplifier
Nuclear Particle Detector
H.3'
V+
15DV
PARTICLE"l....
.
LARGE AREA
SILICON DIODE
.'~
r - -....- - + 15V
SHIELD ...~*:.t
OUTPUT
0.1 ~F
a.......---15V
'H:<:100MHz
TL/K/5507-16
TL/K/5507-17
4-16
,-----------------------------------------------------------------------------,
Typical Applications (Continued)
r
::t:
o
oCo)
Co)
.......
r
::t:
Coaxial Cable Driver
Isolation Buffer
OYERALL FEEOBACK
o
oCo)
+15Y
Co)
51
INPUT -""",."......
>'"tf--tt-.
OUTPUT
500
Co)
o
.......
REACTIYE
C LOAD
r
o
oCo)
::t:
-15V
TL/K/5507-19
-15Y
l>
.......
r
::t:
o
oCo)
Co)
l>
":'
o
.......
TL/K/5507-18
r
::t:
o
o0)
Co)
.......
r
Coaxial Cable Driver
::t:
o
o0)
y+
Co)
o
INPUT-"""rv-....
YTL/K/5507-20
*Select C1 for optimum pulse response
High Input Impedance Comparator
with Offset Adjust
VU,l
Instrumentation Shield/Line Driver
Y+
51
INPUT -
No
go~logic
"1"
Go ~ logiC "0"
OFFSET
ADJUST
YLL.
YTL/K/5507-21
4-17
--'Io""'--..;:.a
....
VTL/K/5507-22
o
CO)
CD
o
o
Typical Applications
(Continued)
1W CW Final Amplifier
::J:
,....---1- +30Y
...J
......
CO)
CD
o
2M
o
::J:
...J
......
o
~
CO)
o
o
::J:
...J
......
o
TLlK/5507-23
CO)
CO)
o
o
::J:
...J
......
c:(
CO)
CO)
Single Supply AC Amplifier
4.5 MHz Notch Filter
Vcc=12.0V
o
o
::J:
Y+
...J
......
CO)
CO)
o
o
OUTPUT
::J:
V,.
...J
Rl
22011
TL/K/5507-24
Rl
V-
2200
C1=~
2
TL/K/5507-25
High Speed Sample and Hold
ANALOG
INPUT
OUTPUT
V-
5.0V
r
LOGIC
INPUT
--,
..l!2
I
I
~""'--r"""""
"":;"r--L../
L1"
*Polycarbonate or TefionTM
1/20H0034
14
--1
V-
TL/K/5507-26
4·18
r-
::I:
~National
N
......
......
~ Semiconductor
I:)
........
r-
::I:
N
N
LH2110/LH2210/LH2310
......
I:)
........
Dual Voltage Followers
r-
::I:
N
Co)
General Description
Features
The LH211 0 series of dual voltage followers are two LMll 0
type followers in a single hermetic package. Featuring all
the same performance characteristics of the single, these
duals offer in addition closer thermal tracking, lower weight,
reduced insertion cost and smaller size than two singles.
For additional information, see the LMll0 data sheet and
National's Linear Applications Handbook.
•
•
•
•
•
•
......
I:)
1 nA
10 10n
30V/p.s
20 MHz
±5V to ±18V
Low input current
High input resistance
High slew rate
Wide bandwidth
Wide operating supply range
Output short circuit proof
The LH2110 is specified for operation over the - 55·C to
+ 125·C military temperature range. The LH2210 is specified for operation over the - 25·C to + 85°C temperature
range. The LH2310 is specified for operation over the DoC to
+ 70·C temperature range.
Connection Diagram
Auxiliary Circuits
Increasing Negative Swing Under Load
y+
.---..::...o}
INPUT
4
BALANCE
OUTPUT
OUTPUT
R2*
5.1k
INPUT
BOOSTER
v·May be added to reduce
} BALANCE
2 --1
INPUT 0.:.1:-.-
internal dissipation.
TLlK/l0119-2
OUTPUT
BOOSTER
Offset Balancing Circuit
y+
Rl
lk
TL/K/l0119-1
Order Number LH2110D, LH2210D or LH2310D
See NS Package Number D16C
INPUT
>~"""-OUTPUT
TL/K/l0119-3
4-19
o
,...
C')
C\I
::t:
....I
.......
o
.,...
C\I
C\I
::t:
....I
.......
o.,...
.,...
C\I
::t:
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
±18V
Supply Voltage
Output Short Circuit, Duration (Note 3)
Operating Temperature Range LH211 0
LH2210
LH2310
Power Dissipation (Note 1)
Input Voltage (Note 2)
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
500mW
±15V
Continuous
- 55'C to + 125'C
- 25'C to + 85'C
O'Cto +70'C
- 65'C to + 150'C
300'C
Electrical Characteristics Each Side (Note 4)
....I
Parameter
Limits
Conditions
Units
LH2110
LH2210
LH2310
Input Offset Voltage
TA = 25'C
4.0
4.0
7.5
mVMax
Input Bias Current
Input Resistance
TA = 25'C
TA = 25'C
3.0
10 10
3.0
1010
7.0
1010
nAMax
n Min
1.5
1.5
1.5
pFTyp
0.999
0.999
0.999
VIVMin
Input Capacitance
Large Signal Voltage Gain
TA = 25'C, Vs = ±15V
VOUT = ± 10V, RL = 8 kn
Output Resistance
TA = 25'C
2.5
2.5
2.5
n Max
Supply Current (Each Amplifier)
TA = 25'C
5.5
5.5
5.5
mAMax
6.0
6.0
10
mVMax
6
12
6
12
10
10
10
10
nAMax
0.999
0.999
0.999
!-'VIV Min
±10
Input Offset Voltage
Offset Voltage
Temperature, Drift
-55'C S TA S 85'C
TA = 125'C
Input Bias Current
Large Signal Voltage Gain
Vs = ±15V, VOUT = ±10V
RL=10kn
Output Voltage Swing (Note 5)
Vs = ±15V, RL = 10 kn
±10
±10
Supply Current (Each Amplifier)
TA = 125'C
4.0
4.0
Supply Voltage Rejection Ratio
±5V s Vs S ±18V
70
70
!-'V/'CTyp
VMin
mAMax
70
dB Min
Note 1: The maximum junction temperature of the LH2110 is 150'C, while that olthe LH2210 is 100'C and that olthe LH2310 is 85'C. For operating devices in the
flat package at elevated temperatures, the derating is based on a thermal resistance of 185°C/W when mounted on ~ 1f1s-inch-thick epoxy glass board with
O.03-inch-wide, 2-ounce copper conductors. The thermal resistance of the dual-in-line package is 100 e/W, junction to ambient.
G
Note 2: For supply voltages less than ± 15V, the absolute maximum input voltage is equal to the supply voltage.
Note 3: Continuous short circuit is allowed for case temperatures to 125c C and ambient temperatures to 70"C . It is necessary to insert a resistor greater than 2 kn
in series with the input when the amplifier is driven from low impedance sources to prevent damage when the output is shorted.
Note 4: These specifications apply for ±5V :'S': Vs :'S': ±18Vand -55°C :'S': TA ::;;: 125c C, unless otherwise specified. With the LM210, however, all temperature
specifications are limited to -25c C :'S': TA :'S': 85°C, and for the LH2310, all temperature specifications are limited to OOG ::;;: TA :'S': 70c G.
Note 5: Increased output swing under load can be obtained by connecting an external resistor between the booster and V- terminals.
4-20
,------------------------------------------------------------------------, r
::I:
~National
"'o"
o
....
~ Semiconductor
LH4001 Wideband Current Buffer
General Description
Features
The LH4001 is a high speed unity gain buffer designed to
provide high current drive capability at frequencies from DC
to over 25 MHz. It is capable of providing a continuous output current of ±100 mA and a peak of ±200 mA.
The LH4001 is designed to fulfill a wide range of applications such as impedance transformation, high impedance
input buffers for AID converters and comparators, as well
as high speed line drivers. It is also suitable for use in current booster applications within an op amp loop. This allows
the output current capability of existing op amps to be increased to ± 100 mA.
• DC to 25 MHz bandwidth
• 125 V/!'-s slew rate
• Drives ± 10V into 50n
• Operates from ± 5 to ± 20V supplies
• Output swing approaches supply voltage
Applications
•
•
•
•
Boost op amp output
Buffer amplifiers
Isolate capacitive loads
Drive long cables
Typical Applications and Connection Diagram
1>............-oVOUT
TUK/8628-1
Dual·ln·Line Package
10(NOTE)
9 (NOTE)
8 VOUT
7 (NOTE)
6 (NOTE)
TL/K/8628-2
Top View
'Note: Electrically connected intemally. No connection should be made to these pins.
Order Number LH4001CN
See NS Package Number N10A
4-21
III
o
~
:J:
....I
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage, Vs
Continuous Output Current, 10
± 22V
±100mA
Peak Output Current, 10(peak)
(SO ms On/1 Sec Off)
±200 mA
Input Voltage Range, VIN
Power Dissipation Ambient
±Vs
SOOmW
- 6S·C to + 1S0·C
Storage Temperature Range, TSTG
O·Cto +70·C
1S0·C
260·C
Operating Temperature Range, TA
Maximum Junction Temperature, TJ
Lead Temp. (Soldering, < 10 seconds)
ESD rating is to be determined.
Electrical Characteristics (Note 1)
Symbol
Parameter
Conditions
Av
Voltage Gain
Rs = 10k.o, RL
VIN = ±10V
RIN
Input Impedance
Rs = 200 k.o, RL
VIN = ±1.0V
ROUT
Output Impedance
Rs = 10 k.o, RL
VIN = ±1.0V
Vo
Output Swing
Vs
RL
18
Input Bias Current
1,-
Rise Time
SR
Slew Rate
Is
Supply Current
Vas
DC Output Offset Voltage
Note 1: SpecHication applies for TA
~
=
1 k.o
=
=
1 k.o .
Min
Typ
0.9S
0:97
VIV
180
400
k.o
SO.O
Max
6
= ± 1SV, Rs = SO.O
= 1 k.o, VIN = ±12V
Rs = 10 k.o, RL = 1 k.o
RL = 100.0, AVIN = 100 mV
VIN = ±SV, RL = 100.0
Rs = 10k.o
Rs = 300.0, RL = 1 k.o
Units
10
.0
±SO
p.A
V
± 11
±10
±10
7
ns
12S
V/p.s
±6
±10
mA
±10
±SO
mV
2S"C with +12V on Pins 1 & 2; -12V on Pins 4 & S unless otherwise specified.
Typical Performance Characteristics
Input Offset Current
Supply Current
Frequency Response
1.0
i
...
ill
~
1
I
TA'ZI"C_~
5
TA = O"C-......!
1':
...
..E
~
~ p:; ~
3
~
2
D.I
'"
z
~ 8.6
..
w
1
sm Vs" :!:12.0V _
1
11
,/1
VIN " 1 V,ml. RL =
T.· Z5i:
,.~
D.•
-3Z
-Z4
•
10
12
14
1&
11
1.0
20
I
./
Z.O
5.0
10.0
ZO.O
1
~
1.0
./
~
'"
L
",
~
Z.O
o
0
1.0
il1.0 100
FREaUENCY IMH.)
SUPPLY VOLTAGE I.V)
./
./
-1& ...
.;'
f-----
O-Cto 70-C
•. 0
:!!
", PHASi- -I
O.Z
0.1
I
1'\1
C
.... TA = 70"C
" V'
•
T.-Z5'C·1
10.0 L.. then tlD% ch. . trom
-,.....AV'-
~
~ :,...-
!!
o
~ /'
IZ.O
9.0
IU
Pulse Response
TOP TRACE
~
INPUT
BOTTOM TRACE
~
OUTPUT
TUK/8628-10
VIN
~
±2.SV. RS
~
RL
~
son
4-22
11.0
SUPPLY VOLTAGE I'V) TUK/8828-3
Applications Information
Figure 1 shows a simple implementation of a non-inverting
buffer amplifier of unity gain. Popular industry standard operational amplifiers such as LF156, LF351, LF411, LF441 ,
LM11, LM741, etc. can be used in this configuration. Due to
the high bandwidth of the LH4001, it is suitable for use with
most monolithic op amps.
Figure 3 shows a co-axial cable drive circuit. The 43n resistor matches the driving source to the cable, however, its
inclusion rarely will result in substantial improvement in
pulse response into a terminated cable. If the 43n resistor
is included, the output voltage to the load is about half what
it would be without the near end termination.
Figure 2 shows an implementation of an inverting amplifier
with output current capability in excess of ± 100 mA. The
gain of this amplifier is determined by the values of RF and
RIN. The resistor between the non-inverting input and
ground is used to minimize the output offset voltage resulting from the input bias current.
Figure 4 shows a non-inverting amplifier with gain and output current capability in excess of ± 100 mAo It is capable of
providing ± 10 mA into a 1 kn load or ± 100 mA into a
1DOn load (± 1OV swing). Figures 5 and 6 show two different methods of providing current limit or short circuit protection for the LH4001. In Figure 6, the 10n resistor limits the
output current to approximately 70 mA. This circuit is highly
recommended if there is a potential for a short circuit to
occur.
Because of its high current drive capability, the LH4001
buffer amplifier is suitable for driving terminated or unterminated co-axial cables, and high current or reactive loads.
+15V
+15V
O.II'F
~
>8'""---4,.......-ov our
TL/K/8628-4
FIGURE 1. Non-Inverting Buffer Amplifier
+15V
+15V
RSC
>,8_JVl/Ir-+-o Your
-15V
-15V
TLIK/8628-6
FIGURE 2. Inverting Buffer Amplifier with Current Limit
4-23
~
..,.o
C)
:x::
...I
r------------------------------------------------------------------------------------,
Applications Information
(Continued)
v·
RUM = lOOn, lW
v-
TL/K/8628-7
FIGURE 3. Coaxial Cable Drive Circuit
.15V
.15V
0.1 }'F
~
R2
TL/K/8628-S
VOUT ~ VIN
R2)
( +. R1
1
FIGURE 4. Non-Inverting Buffer Amplifier with Gain
v·
0.01 }'F
TLlK/8628-8
FIGURE 5. LH4001 Using Resistor Current Limiting
01. 02
03. 04
~ 2N2905
~
2N2219
TL/K/8628-9
FIGURE 6. Current Limit Using Current Sources
4·24
,-------------------------------------------------------------------------, r
::I:
~National
~
«:)
«:)
I\)
~ Semiconductor
LH4002 Wideband Video Buffer
General Description
Features
The LH4002 is a high speed voltage follower designed to
drive video signals from DC up to 200 MHz. At voltage supplies of ± 5V, the LH4002 will provide up to 40 mA into 500
at slew rates in excess of 1000 V / !,-s.
The device is intended to fulfill a wide range of high speed
applications including video distribution, impedance transformation, and load isolation. It is also suitable for use in
current booster applications within an op amp loop. This
allows the output current capability of existing op amps to
be increased.
• DC to 200 MHz Bandwidth with Vs = ± 5V
• 1250 V /!,-s Slew Rate into 500
• 150 MHz Bandwidth with Vs = ± 5V, RL = 500 and
Voltage Swing = 2 Vp_p
Applications
• Wideband Buffer Amplifiers
• Wideband Line Driver
Schematic and Connection Diagrams
+Vcct
+VCC2
INPUT
OUTPUT
TUK/B6B6-15
Metal Can Package
INPUT
Dual-In-Line Package
10 NC
+VCC2
+VCC1
NC
INPUT
OUTPUT
-VCC1
NC
-VCC2
NC
III
TUK/B6B6-2
Top View
Order Number LH4002CN
See NS Package Number N10A
OUTPUT
TLlK/B6B6-3
Top View
Order Number LH4002CH or LH4002H
See NS Package Number HOBO
4-25
N
o
o
'
>
iii
.VCC .J.
NC..1
Nc2
INPUT..l
J
-
,!!.... OUTPUT
rZ- NC
,LNC
~-VCC
OUTPUT -
TLlK/8686-16
3
/
2
II
1 20 19
5
17
6
16
7
15
B
14
f-INPUT
ff- -VCCI
ff- -VCC2
9 10 11 12 13
Top View
I
Order Number LH4002CN-S
See NS Package Number NOSE
I
I
I
I
Top View
Order Number LH4002E
See NS Package Number E20A
Note: +VCC1 and +VCC2 pins and -VCC1 and -VCC2 pins are internally
connected.
4-26
TL/K/B686-17
Typical Performance Characteristics
Maximum Power Dissipation
Metal Can Package
~
!
40,.--..-----,-----,----,
II
1.4
cUN
: :~I::::I::::\.~:::::~~:::::~
AW~EH~JA
r
=1
D.2
o
o
0.8
~
r::1:UWfz1:++lI: ~s=5011
I-
]:
R =500
30
I !
...
~
Vi'
0
0.4
\""t'1'ttf~d--tttt1-H145 H'-HtttttH-ttttttlHN+Htttl90 ~
D.2
H'-HtttttH-!+ttttlH+t-HtttI135
1
g~
{W-t-~"o-'I---t--t---l
Vcc=:t5V
0.6H,-tftttttt-
~
"" \
D.4
I,D
>"
~
1.2 CASE8JC=75OC/W
D.6
Supply Current
Frequency Response
I I I
1.6
~~·\=2SOC
/
20
RL = lkll
VIN=OV-
10
iil
I I
OL--~-~-~-~
25 50 75 100 125 150 175 200
:t4
:t3
TtWPERATURE (OC)
FREQUENCY. (WHz)
TLlK/8686-4
tS
t6
t7
SUPPLY VOLTAGE (V)
TL/K/8886-5
TL/K/8686-6
Maximum Power Dissipation
Dual-In-Line Package
:~
I
Maximum Power Dissipation
E20A Package
I
JBIE~9J~=1io"CJw -t--t--t--1
0.9
i
0.8~~~f-+-~+-+-~
~7~+--t-~~-+--1~~+--1
0.8
z
1.6
,'e
0
HH--+-+-+-t---+'''-!::--I
M~+--t--t--+--1r-r-t--+1-1
£
in
1.2
c
0.8
!!!
1J.4t--r-r-t-t-+-+-+-~
M~+--t--t--+--1r-r-t--+1-1
...~
~t--r-r-t-t-+-+-+-~
0.1
M
20
~+--t-~~-+--1-~+t-!
60 0
/W
I'..
IA 80 :/W
I"
IJ.4
L-.L...J--L--1.--L--l..-L...L.JW
a
a
10 20 30 40 50 60 70 80 90
25
50
75
"
"
100 125 150
TEMPERATURE (OC)
TEMPERATURE (OC)
TLlK/8686-18
TL/K/8686-12
Maximum Power Dissipation
For N08E Package
0.9
0.8
~
:z
~
~
...
0.7
0.6
0.5
0.4
Q:
~
0
I>-
0.3
0.2
III
0.1
0
o
10
20
30
40
50
60
70
80
TEMPERATURE (OC)
4-27
90 100 110 120 130
TLlK/8686-19
~
o
o
~
r------------------------------------------------------------------------------------------,
Pulse Response
::I:
....I
TOP TRACE
~
INPUT
BonOMTRACE
~
OUTPUT
Vs
~
±5V
RL
~
50n
TL/K/8686-7
TLlK/8686-8
Typical Applications·
VOUT
son
-5V
TL/K/8686-11
FIGURE 1. Wideband Unity Gain Amplifier Using LH4002CN
son
TL/K/8686-9
TLlK/8686-10
FIGURE 2. Compensation for Capacitive Loads
FIGURE 3. Compensation for Capacitive Loads
Applications Information
Short Circuit Protection
The high speed performance of the LH4002 can only be
realized by taking certain precautions in circuit layout and
power supply decoupling. Low inductance ceramic chip· or
disc power supply decoupling capacitors of 0.D1 p.F in parallel with 0.1 p.F should be connected with the shortest practical lead length between device supply leads and a ground
plane. Failure to follow these rules can result in oscillations.
When driving a capacitive load such as inputs to flash converters, the circuits in Figure 2 and 3 can be used to minimize the amount of overshoot and ringing at the outputs.
Figure 2 indicates that a 500. should be placed in parallel
with the load and Figure 3 recommends that a 1000. resistor
be placed in series with the input to the LH4002.
In order to optimize transient response and output swing,
output current limits have been omitted from the LH4002.
Short circuit protection may be added by inserting appropriate value resistors between +VCC1 and +VCC2 pins and
between -VCC1 and -VCC2 pins as illustrated in Figure 4.
Resistor values may be predicted by:
+VCC1
-VCC1
RUM = - - - - - = - - - - Isc
Isc
where Isc ,,; 100 mA. The inclusion of 500. limiting resistors
in the collectors of the output transistors limits the short
circuit current to approximately 100 mA without reducing the
output voltage swing.
4-28
.-----------------------------------------------------------------------------. I
Short Circuit Protection
:I:
"'oo"
(Continued)
N
+5V
+VCC!
RUM
I'"
..
"
+VCC2
LH4002 >~--
INPUT _
/
OUTPUT
-VCC2
"'"
-Vec !
RUM
-5V
TL/K/8686-20
FIGURE 4. LH4002 Using Resistor Current Limiting
4·29
o
C')
o
~
:::E:
...J
......
C')
o
o
"'=I'
:::E:
~National
PRELIMINARY
~ Semiconductor
LH4003/LH4003C Precision RF Closed Loop Buffer
...J
General Description
Features
The LH4003 is a precision RF buffer optimized for unity gain
applications. The LH4003 features a small signal bandwidth
of 250 MHz. The buffer is internally compensated to be unity
gain stable and has internal short circuit protection. The
LH4003 is useful in applications such as video buffering,
cable driving, and flash converter input conditioning.
•
•
•
•
•
•
Operation from ± 6V supplies
Drive 500. directly
Internal power supply bypassing
Short circuit protection
1000 VI ,,"S slew rate
0.97 gain accuracy into 500.
Applications
• Line drivers
• Video buffers
Block and Connection Diagram
Ne
1
24 NC
NC
2
23 NC
+INPUT
3
22 NC
NC
4
21 NC
NC
5
20 NC
-vs
7
18 +vs
NC
8
17 GND
GND
9
16 -INPUT
NC
Note 1: NC
19 NC
NC 10
15 NC
NC 11
14 FEEDBACK
NC 12
13 OUTPUT
= No Connection
Note 2: Pins 9 & 17 Internally Connected
TL/K/9243-1
Top View
Order Number LH40030, LH4003CO
See NS Package Number 0240
4-30
~~bsolute
Maximum Ratings
If Military/Aerospace specified devices are required,
pMease contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage, Vs
Output Short Circuit Duration
±8V
P()wer Dissipation, Po
TA = 25'C, derate linearly at 62.5'C/W
TC = 25'C, derate linearly at 33.3'C/W
2W
3.75W
Input Common Mode Voltage Range, VCM
Continuous
Operating Temperature Range, T A
LH4003CD
LH4003D
- 25'C to + 85'C
-55'Cto +125'C
Storage Temperature Range, TSTG
- 65'C to + 150'C
Maximum Junction Temperature, TJ
150'C
Lead Temperature (Soldering, 10 sec.)
300'C
±Vs
Output Current, 10
±100mA
DC Electrical Characteristics Vs =
± 6V, Rs
=
RL
=
50n, TA
=
25'C unless otherwise noted. (Notes 1, 6)
LH4003C
Symbol
Parameter
Conditions
TA = TJ
(Note 4)
=
Vos
Output Offset Voltage
VOS/aT
Offset Voltage Drift
18
Input Bias Current
Rs = 300n, TA
(Note 4)
Av
Voltage Gain
VIN = 2Vpp
f = 1 kHz
25'C
Typ
Tested Limit
(Note 2)
5
15
Design Limit
(Note 3)
mV
/LV/,C
100
=
TJ
=
25'C
100
200
1 RL
=
50n
0.98
0.95
1 RL
=
1 kn
0.98
0.95
Vo
Output Voltage Swing
PSRR
Power Supply
Rejection Ratio
Vs
=
±4Vto ±8V
Is
Supply Current
RL
=
1 kn (Note 7)
Po
Power Dissipation
/LA
VIV(Min)
±3
V(Min)
55
45
dB(Min)
55
65
rnA
780
AC Electrical Characteristics Vs =
± 6V, Rs
=
RL
=
50n, TA
=
Parameter
Conditions
Typ
tr
Small Signal Rise Time
,WIN
ts
Settling Time to 0.1 %
VIN
SR
Slew Rate
f-Sd8
=
0.5V
Tested Limit
(Note 2)
Design Limit
(Note 3)
2
VIN
-3Vto +3V 110%-90%
1000
800
VIN
=
+3Vto -3V 110%-90%
1200
1000
=
VOUT
VIN
Harmonic Distortion
Second Order, VOUT
fiN = 10 MHz
=
80
±3V
Full Power Bandwidth
Units
(Max Unless
Otherwise
Stated)
ns
=
=
Small Signal Bandwidth
mW
25'C unless otherwise noted. (Note 1)
LH4003C
Symbol
Units
(Max Unless
Otherwise
Stated)
MHz (Min)
100 mVp-p
250
± 2V, (Note 5)
65
MHz
-60
dB
=
4V p-p,
4-31
200
V//Ls
(Min)
DC Electrical Characteristics Vs =
± 6V, Rs
=
RL
=
500, TA
=
25'C unless otherwise
n~ted. (Notes 1, 6)
Units
(Max Unless
Tested Limit Design Limit Otherwise
Stated}
(Note 2)
(Note 3)
LH4003
Symbol
Parameter
Conditions
Typ
Vos
Output Offset Voltage TA = TJ
(Note4)
VOSIl>T
Offset Voltage Drift
18
Input Bias Current
=
2
25'C
15
mV
20
p.V/'C
100
Rs
=
3000
TA
=
TJ
=
25'C, (Note 4)
100
200
p.A
200
Ay
Voltage Gain
VIN = 2Vpp
f = 1 kHz
RL
RL
=
=
500
0.98
1 kO
0.98
0.95
0.93
0.95
VIV(Min)
0.93
Vo
PSRR
Output Voltage Swing
Ay
=
+1
Power Supply
Vs
=
±4Vto ±8V
±3
55
Rejection Ratio
IS
Supply Current
Po
Power Dissipation
RL
=
1 kO (Note 7)
AC Electrical Characteristics Vs =
55
±6V, Rs
=
RL
=
500, TA
45
dB
(Min)
80
mA
780
mW
25'C unless otherwise noted. (Note 1)
LH4003
Symbol
Parameter
Conditions
Typ
tr
Small Signal Rise Time
b,VIN
ts
Settling Time to 0.1 %
VIN
SR
Slew Rate
VIN
VIN
f-ad8
=
=
=
Small Signal Bandwidth
VOUT
Full Power Bandwidth
VIN
=
=
0.5V
±3V
Tested Limit
(Note 2)
Design Limit
(Note3)
Units
(Max Unless
Otherwise
Stated}
2
ns
80
ns
-3Vto +3V 110%-90%
1000
800
+3Vto -3V 110%-90%
1200
1000
=
V
(Min)
40
65
=
±3
100 mVp-p
250
±2V, (Note 5)
65
200
VP.s
(Min)
MHz (Min)
MHz
Second Order, VOUT = 4V pop,
-60
dB
fiN = 10 MHz
Note 1: These measurements are taken with the LH4003 strapped for a gain of + 1.
Note 2: Tested limits are guaranteed and 100% tested in production.
Note 3: Design limits are guaranteed (but not 100% production tested) over indicated temperature and supply voltege ranges. These limits are not used to
calculate outgoing quality levels.
Note 4: Specification is at 2S·C junction temperature due to requirements of high speed automatic testing. Actual values at operating temperature will exceed value
at TJ ~ 25'C. See Typical Performance Characteristics for more information.
Note 5: Full power bandwidth is calculated based on slew rate measurement using FPBW ~ slew rate I (2 frY peak).
Note 6: Boldface limits are guaranteed over full temperature. Operating ambient temperature range of LH4003C is - 2S·C to + 8S·C. and LH4003 is - SS·C to
+ 125'C.
Note 7: When the LH4003 is operated at elevated temperature (such as 12S·C). some form of heat sinking or forced air cooling is required. The quiescent power
with Ys of ±6V is 780 mW, whereas the package is rated to 7S0 mW without a heatsink at 125'C.
Harmonic Distortion
4-32
r-
::I:
Typical Performance Characteristics
Maximum Power
Dissipation
110
4.5
§:
:z
0
:
in
~
'"~
~
4.0
3.5
Offset Voltage (Typical)
vsTillle
Input Bias Current
vsTime
5.0
5
.3
" "-
3D
2.5
2D
............
1.5
1.0 AMBIENT
CASE
8JC-33.3 'C/W
.........
8JA=62.5"C!W
0.5
o
o
"-
§
=>
u
en
1l'i
~
"-
2;
.......
I
90
I
I
80
70
~
~
100
r
30
I~
+J25"C
I
20
I~
I
I
+125OC
40
I
10
~
I
+25OC
I
50
-I
TEMPERATURE (OC)
I
-5
10
-I
10
TIME (MIN)
TIME (MIN)
TL/K/9243-IO
TL/K/9243-2
r-
-55"C
+25OC
60
......
::I:
I
I
-55"C
100
<-
-
.j:o"
I:)
I:)
Co)
TUK/9243-ll
Application Information
The unity gain follower configuration shown in A"gure 1, offers a 250 MHz small Signal bandwidth to the -3dB pOint
and the minimum slew rate of BOO V I,...s insures a full power
bandwidth of 65 MHz for a 4V peak-to-peak Signal, according to the formula:
Although the LH4003 contains internal decoupling, it still
requires some external bypassing capacitors, which have to
be located as close to the supply pins as possible. A 4.7 ,...F
in parallel with a 100 nF low inductance capacitor will insure
good filtering. In some cases of noisy environment, or when
the power supply is located far from the circuit, it may be
necessary to use a dual stage decoupling as shown in Figure5.
Ground can also become a considerable problem. It is assumed to be uniformly zero volts and considered as a reference. In practice, if the ground is poorly laid out, every single point may be at a different potential and at a different
phase, which is a source of instability or Signal distortion.
The most reliable solution to this problem is to have a
ground plane that will minimize the parasitic inductance and
therefore, potential and phase differences.
B = SR/2'1TVp
Where SR is the slew rate in ,...S, B is the bandwidth of the
device in MHz for a peak sine wave voltage Vp.
The unity gain followerIbuffer is therefore an excellent
choice for wideband sinewave buffering or pulse amplification. Figure 2 shows the typical pulse response for such a
configuration.
DRIVING CAPACITIVE LOADS
Flash AID, unterminated cables, etc, can exhibit up to
300 pF of capacitance, thus creating stability or settling
problems. Figure :3 shows the compensation scheme for
driving such capacitive loads while still insuring optimum
settling. The output current limit of the LH4003 is a considerable help for driving capacitive loads, the charging current
is kept in control and the damping resistor can be small
without overloading the output stage. A 200. resistor in series with the capacitance is required for insuring an optimum
settling time of 0.5% in less than 20 ns which is suitable for
driving a 7 bit flash A to D converter in video applications at
a sampling rate of 20 MSPS (see Figure 4).
INPUT CAPACITANCE
The input capacitance of the LH4003 is typically 8 pF and
will slightly increase with frequency. A large source resistance value in front of this will form a pole, which may substantially reduce the bandwidth of the circuit and affect stability.
This is the reason why resistor values higher than 500 ohms
should not be utilized in the feedback network and high
source impedance should be avoided.
LAYOUT CONSIDERATIONS
The layout of a RFlVideo PC board where the signal frequency is beyond 100 MHz required special attention. All
the traces or connections must be as short and as wide as
possible in order to keep their parasitic inductance to a minimum. This is especially critical for the supply lines where the
current can reach over 100 mA in a few nanoseconds.
BIAS CURRENT
The input bias current is typically 100 ,...A and may create an
undesirable output offset voltage when the source impedance is high. An internal 500. resistor is provided for matching with a 500. source impedance in order to minimize the
output offset voltage. Figure 6 shows a circuit that uses a
FET transistor pair for the input stage in order to reduce the
input bias current to the sUb-nanoampere region.
4-33
.j:o"
I:)
I:)
Co)
o
(J
CO)
o
o
-=r
Typical Applications
::J:
..J
......
CO)
o
o
-=r
::J:
..J
13
>-+--0 OUTPUT
INPUT
-Vs
TLlK/9243-3
FIGURE 1. Unity Gain Follow,
Typical BW 3dB = 250 MHz
TL/K/9243-4
± 6V, Rs
FIGURE 2. Pulse Response of Follower
Nole: Top trace is input and bottom trace is output. Vee
~
~
RL
~
50n.
+V
":1
16 _
LH4003
-=
13 20ll.
OUTPUT
C <360 F
9.17
INPUT
-~ ~' "
-Vs
4.7p.F
-=
FIGURE 3. Driving Capacitance
4·34
TL/K/9243-6
....
:::J:
Typical Applications (Continued)
"'oo"
Co)
......
....
:::J:
"'oo"
Co)
o
TL/K/9243-7
Note: Top trace is input and bottom trace is output. Vee = ±6V, RS = 500, RISO = 200 and CL = 300 pF.
FIGURE 4. Pulse Response when Driving Capacitance.
TL/K/9243-8
FIGURE 5. Dual Stage Decoupling
loon
INPUT
>-~-o
OUTPUT
TL/K/9243-9
FIGURE 6. FET Buffer Reduces Bias Current
4-35
~National
PRELIMINARY
~ Semiconductor
LH4004!LH4004C Wideband FET-Input Buffer! Amplifier
General Description
Features
The LH4004 is an FET input, high speed differential amplifier optimized for unity gain applications. It eliminates most of
the drawbacks of conventional open loop buffers and does
not require compensation for unity and other low gain operations. It is an ideal choice for video distribution, driving
flash converters, and summing amplifiers. Furthermore, the
bandwidth does not decrease with increasing gain. At a
closed loop gain of 4, the LH4004 still offers a 75 MHz
bandwidth.
• ± 0.5 dB gain flatness
"'S
slew rate
500 VI
Drives 50n directly
140 MHz bandwidth
No external components required for unity gain
operation
• Internal power supply bypassing
•
•
•
•
Applications
• Unity gain buffer
• Low gain op amp
Simplified Schematic and Connection Diagram
COMP
+VSI
(24)
(3)
+VS2
(23)
NC I
24 +VSI
NC
23 +VS2
22
NC
NC 4
21
NC
NC 5
20
NC
+INPUT 6
19
OUTPUT
-INPUT 7
18 fEEDBACK
COMP
NC
OfF/ ADJ 8
-INPUT 0-......----11---.....
t---OOUTPUT (19)
(7)
Off / ADJ
(8)
NC
NC
NC
NC
NC
-VS2
GROUND
-VSI
TL/K/BB31-2
o-H--+
FEEDBACK (18)
TOp View
Order Number
LH4004CO or LH40040
See NS Package Number 0240
GND
(12)
RA=240.o.
-VSI
-VS2
(13)
(14)
TLIK/BB31-1
4-36
r-
:::t
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Power Dissipation, PD
TA = 25·C, derate linearly at BO·C/W
T c = 25·C, derate linearly at 40·C/W
-25·C to +85·C
-55·C to + 125·C
-65·C to + 150·C
Storage Temperature Range, TSTG
150·C
Maximum Junction Temperature, TJ
300·C
Lead Temperature (Soldering, < 10 sec)
ESD rating is to be determined.
±15V
Supply Voltage, Vs
"'oo"
Operating Temperature Range, TA
LH4004CD
LH4004D
1.BW
3.75W
Input Voltage Range, VIN
±Vs
DC Electrical Characteristics Vs =
± 12V, Rs = RL = 50n, TA = 25·C unless otherwise noted (Note 1)
"'......r-"
:::t
"'"
o
o
o"'"
LH4004C
Symbol
Vos
Parameter
Input Offset Voltage
VOS/ilT Offset Voltage Drift
Is
Conditions
Typ
VIN = OV, TA = TJ = 25·C
(Note 4)
Units
(Max Unless
Tested Limit Design Limit Otherwise
(Note 3)
(Note 2)
Stated)
8
mV
15
300
J.tV/·C
Input Bias Current
TJ = 25·C, Pin 6 (Note 4)
Gain Accuracy
VIN = ± 1V
Av= +1
RL = 500n
0.98
0.96
0.93
RL = 50n
0.98
0.96
0.93
VIN = ±10V
RL = 500n
9.6
9.2
9.2
±4.5
±4
35
40
mA
40
dB (Min)
Vo
Output Voltage Swing
Vo
Output Voltage Current Swing VIN = ±5V, RL = 50n
IS
Supply Current
PSRR
Power Supply Rejection Ratio
± Vs = ±11Vto ±15V
AC Electrical Characteristics Vs =
pA
400
Parameter
V (Min)
V (Min)
± 12V, Rs = RL = 50n, TA = 25·C (unless otherwise noted)
LH4004C
Symbol
VIV
(Min)
Conditions
Typ
= 0.5V
= - 2.5V to + 2.5V
Tested Limit
(Note 2)
Design Limit
(Note 3)
Units
(Max Unless
Otherwise
Stated)
tr
Small Signal Rise Time
ilVIN
3
ns
ts
Settling Time to 0.5%
VIN
30
ns
I-3dS
Small Signal Bandwidth
VIN = -10dBm
Large Signal Bandwidth
VOUT = ±2.5V
Gain Flatness
VIN = -10dBm
Av = +1
1= 0-50 MHz
Harmonic Distortion
SR
Slew Rate
Second Order
VIN = 4Vp·P.!IN
VIN
VIN
Av = +1
140
125
Av= +4
85
75
Av = +1
=
MHz
(Min)
70
MHz
±0.5
dB
dB
10 MHz
= - 2.5V to + 2.5V
= +2.5Vto -2.5V
4·37
1500
1200
600
500
V/J.ts
(Min)
•
DC Electrical Characteristics
Vs
= ±12V, Rs = RL = 50n, TA = 25°C unless otherwise noted (Notes 1 & 5)
LH4004
Symbol
Vos
Parameter
Input Offset Voltage
Conditions
TA
Typ
= TJ = 25°C (Note 4)
8
Vos/b.T Offset Voltage Drift
Input Bias Current
Is
Gain Accuracy
Units
(Max Unless
Tested Limit Design Limit Otherwise
(Note 2)
(Note 3)
Stated)
15
mV
".vrc
300
TA
= TJ = 25°C, Pin 6 (Note 4)
VIN = ±1V
Av = +1
RL
= 500n
RL
= 50n
RL
= 500n
400
pA
400
nA
0.96
0.98
0.93
VIV
(Min)
0.96
0.98
0.93
Vo
= ±10V
Output Voltage Swing VIN = ±5V, RL = 50n
Is
Supply Current
PSRR
Power Supply
Rejection Ratio
Vo
Output Voltage Swing VIN
9.6
9.2
V (Min)
±4.5
±4
V (Min)
35
40
!
dB (Min)
40
AC Electrical Characteristics Vs =
± 12V, Rs
= RL = 50n, TA = 25°C unless otherwise noted
LH4004
Symbol
Parameter
tr
Small Signal Rise Time
ts
Settling Time to 0.5%
I-3dS
Small Signal Bandwidth
Large Signal Bandwidth
Gain Flatness
Harmonic Distortion
Conditions
Typ
= O.5V
= -2.5Vto+2.5V
VIN = -10 dBm
Av = +1
Av = +4
VOUT = ±2.5V
Av = +1
VIN = 100 mV p-p
Av = +1
1= 0-50 MHz
Tested Limit
(Note 2)
Design Limit
(Note 3)
Units
(Max Unless
Otherwise
Stated)
b.VIN
3
ns
VIN
30
ns
Second Order
VIN = 4V P-P.JIN
= 10 MHz
125
75
MHz
(Min)
70
MHz
±0.5
dB
dB
1500
1200
= - 2.5V to + 2.5V
VI".s
(Min)
600
500
VIN = +2.5Vto -2.5V .
Note 1: Boldface limits are guaranteed over full temperature range. Operating ambient temperature range of LH4004C is -2S'C to +SS'C, and LH4004 is
-S5"C to + 12S'C.
Note 2: Tested limits are guaranteed and 100% production tested.
Note 3: Design limits are guaranteed (but not 100% production tested) over the indicated temperature range. These limits are not used to calculate outgoing quality
levels.
SR
Slew Rate
VIN
Note 4: Specification is at 25°C junction temperature due to requirements of high speed automatic testing. Actual values at operating temperature will exceed value
atTJ ~ 2S'C.
Note 5: When the LH4004 is operated at elevated temperature (such as 12S'C), some form of heat sinking or forced air cooling is required. The quiescent power
with Vs of ± 12V is 960 mW, whereas the package is only rated to SOO mW without a heatsink at 125'C.
4-38
r----------------------------------------------------------------------,r
in parallel with this capacitance and so a frequency domain
pole results. With a small Rs, this pole is at a high frequency
and it affects the closed loop gain of the LH4004 only slightly. At lower values of gain, this pole becomes significant. For
example, at a gain of + 2, the gain may peak as much as
1.5 dB to 2 dB at 100 MHz.
Application Hints
The front page figure shows the simplified schematic which
includes the feedback resistor and the decoupling capacitors.
The essential difference from other op amps is that both
inputs are radically different, the non-inverting input goes to
a FET buffer follower and the inverting input is connected to
the second stage emitter node. This topology is responsible
for the unique bandwidth characteristic and transfer function
of the amplifier.
lK
2!
Let's consider the connection diagram of Figure 1. The typical transfer function in the case of a classical op amp would
be:
:;!
750
~
:z
;;:
620
Lo.J
f\.
470
u
:z
;:!:
'"in
""...--'
360
""x~
120
I'..
r"-...
Lo.J
K(s)
VOUT =
Y,N
1
240
Lo.J
o
o
+ Rs and K(s) is the open loop gain of the
Rs
amplifier and is frequency dependent. By rearranging the
formula, we find;
where B = RA
(1)
VOUT
K(s)
20
40
60
+B
12
1\
\
:;!
'"
:z
;;:
~
L0-
Y,N
K(s)
120
TLlK/8831-10
a.
K(s)
VOUT = B'
~
100
FIGURE 2. Bandwidth vs Rexi
For the LH4004, a small signal analysis shows that the difference between the two inputs turns the previous typical
equation into:
(2)
80
BANDWIDTH IN MHz FOR UNITY GAIN CONFIGURATION
=B'~
Y,N
"
:z
+ K(s)/B
6
~
+ B + m RA
\
Lo.J
U
:z
;:!:
where m is an internal parameter to the device and K(s) is
approximately 70 dB at DC with a 50n load.
...U"-
~
\
3
6
In both equations, the second term is negligible when the
open loop gain of the amplifier, K(s), approaches infinity, but
in equation (1), when the signal frequency reaches a point
where K(s) is small, say K(s) = 10 or less, then the term will
be very sensitive to the value of the closed loop gain Band
VOUTIV,N will fall earlier as B increases.
o
o
1"-.
20
40
60
80
100
120
BANDWIDTH IN t.lHz FOR UNITY GAIN CONFIGURATION
TLlK/8831-11
FIGURE 3_ Bandwidth vs Cexl
In equation (2), m is approximately 0.19 and RA is provided
inside the package, with a value which has been chosen to
be 240n. The term mRA is therefore equal to 46 and will
dominate the term B as long as it is kept below 5. The result
is that VOUTIV,N will not be as dependent on B as with
traditional topologies. The gain will still fall with the open
loop gain K(s) as the frequency increases, but the roll off will
be virtually independent of the closed loop gain B.
12
'"
:z
'"
;;:
I~
\'
old
9
'J\
\.
1\
15
,
\ I\,
~
Resistor Rs sets the overall closed loop gain, but has very
little effect on stability and bandwidth. Another peculiarity of
the LH4004 is that the loop compensation can be accomplished by changing the value of resistor RA (Figure 2).
Even though this such as settling time, overshoot and phase
margin, it will not affect the slew rate. Although this resistive
compensation scheme is adequate in most cases, an alternate method is to place a capacitor between pins 3 and 19
(Figure 3). This method of compensation also reduces the
'
device slew rate (Figure 4).
---+.-...........-oVOUT
-IN
o-.JV'I/I,.........
+IN
o-.JV'I/I,.........
OUTPUT
51
RL
LH4004
TL/K/8831-4
FIGURE 5. Unity Gain Buffer
Note: Adjust pot for best CMRR.
TL/K/8831-12
FIGURE 6. Differential Amplifier
+_-I
VIN o-6
>-....-+-JV...,..,.-+""""I~OVOUT
100pF
+_-I
VIN o-6
>---+,-,,-,--o~m
TL/K/8831-5
FIGURE 7. Driving Capacitive Loads
TLlK/8831-6
FIGURE 8. Offset Adjust
+_-I
VIN o-6
>---+.:..:............-oVOUT
RL
.
VOUT
Ga'"~-~
VIN
(
RA)
1+-
Rs
TLiK/BB31-7
RA ~ 240n
FIGURE 9. LH4004 Used in Amplifier Applications
Typical Performance Characteristics
Closed Loop Response
Maximum Power Dissipation
5.0
~
:z:
0
~iii
~
'"'"
~
"-
4.5
4.0
3.5
3.0
20
~
CASE
I
I
" ' 9Jc=40oC/W
2.0
1.5
~
:z:
~
50
10
AV=2
0
AMBIENT"
1.0 f- 9 =80o C/W
JA
0.5
25
AV=4
"-
I-- I'....
o
o
r
"iii'
-
I........
2.5
AV=10
75
9
8Vl
9<.>
"- ........
......... ....
100
TEMPERATURE (OC)
I
0
AV =\
-10
"
I"j'
10
150
l\
~~
~
125
~
100
FREQUENCY (MHz)
TL/K/BB31-B
4·40
1000
TL/K/B831-9
r-
Typical Performance Characteristics
::I:
(Continued)
Input Offset Voltage
vsTime
70
60
50
I
40
!
30
20
10
0
-10
-20
-30
>-
.5-en
.;'
34
<'
-5.
.....
i
+
I
:z
LoJ
'-'
>-
25°
/
31
V1
100
1000
+25 OC
-55°C
30
/
+125 OC
10
1/'
:::>
11111
o
32
0..
11111
11111
I
L250 C
33
'"
'"
:::>
--'
0..
-40 I-50
Supply Current vs
Supply Voltage
-~HY~
(
29
10,000
4
TIME (SEC)
6
8
10
12
TLlK/8831-15
TLlK/8B31-14
Small Signal Pulse Response
TL/K/8831-17
TLlK/8831-16
Top Trace
~
14
SUPPLY VOLTAGE (V)
Large Signal Pulse Response
Top Trace ~ Input
Bottom Trace ~ Output
Input
Bottom Trace = Output
4-41
"'"
"'"
r::I:
"'oo"
"'o"
o
o
......
o
CD
o
o
~
::J:
....I
"CD
o
o
~
::J:
~National
PRELIMINARY
~ Semiconductor
LH4006/LH4006C Precision RF Closed Loop Buffer
....I
General Description
The LH4006 is a precision RF buffer optimized for unity gain
applications. It features a small signal bandwidth of 350
MHz. The buffer is internally compensated to be unity gain
stable and has internal short circuit protection. The LH4006
is useful in applications such as video buffering, cable driving, and flash converter input conditioning. The high bandwidth also allows the LH4006 to be used in RFIIF signal
conditioning such as amplification or down conversion.
Features
•
•
•
•
Internal power supply bypassing
Short circuit protection
1000 V I /Ls slew rate
0.95 gain accuracy into 500
Applications
• Line drivers
• Video buffers
• Pulse amplifiers
• Operation from ± 6V supplies
• Drives 500 directly
Connection Diagram
NC
24 NC
NC
2
23 NC
+IHPUT
3
22 NC
NC
4
21 NC
'NC
5
20 NC
NC
19 NC
-Vs
7
18 +Vs
NC
8
17 GND
GND
9
16 -INPUT
NC 10
15 NC
NC 11
14 FEEDBACK
NC 12
13 OUTPUT
TL/K/9255-1
Top View
Note 1: NC
~
not connected.
Note 2: Pins 9 & 17 are internally connected.
Order Number LH40060 & LH4006CO
See NS Package Number 0240
4-42
,....
:I:
Absolute Maximum Ratings
.1:0.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating Temperature Range, TA
LH4006CD
LH4006D
±8V
Supply Voltage, Vs
Power Dissipation, PD
TC = 25'C, Derate Linearly at 33.3'C/W
TA = 25'C, Derate Linearly at 62.5'C/W
- 65'C to + 150'C
Storage Temperature Range, TSTG
150'C
Maximum Junction Temperature, TJ
300'C
Lead Temperature (Soldering < 10 sec.)
ESD Rating to be determined.
3.75W
2W
Input Common Mode Voltage Range, VCM
Output Current, 10
- 25'C to + 85'C
- 55'C to + 125'C
±Vs
±100 mA
Output Short Circuit Duration
Continuous
DC Electrical Characteristics (Notes 1 & 6)
Vs = ± 6V, Rs = RL = 50n, TA = 25'C unless otherwise noted.
LH4006C
Symbol
Parameter
Conditions
Typ
Tested Limit
(Note 2)
5
15
TA = TJ = 25'C, Note 4
Vos
Output Offset Voltage
VOS/6.T
Offset Voltage Drift
Is
Input Bias Current
Rs = 300n, Note 4
Av
Voltage Gain
VIN = 2Vp-p,
f = 1 kHz
Vo
Output Voltage Swing
Av= +1
PSRR
Power Supply
Rejection Ratio
Vs = ±4Vto ±8V
RL = 1 kn
Is
Supply Current
PD
Power Dissipation
VIN = OV, RL = 1 kn
Note 7
Units
(Max unless
Design Limit
otherwise stated)
(Note 3)
mV
100
I RL =
I RL =
!,-VI'C
100
300
!,-A
50n
0.98
0.95
1 kn
0.98
0.95
VIV
(min)
±3
V
(min)
55
45
dB
(min)
55
65
mA
780
mW
Design Limit
(Note 3)
Units
(Max unless
otherwise stated)
AC Electrical Characteristics (Note 1)
Vs = ±6V, Rs = RL = 50n, TA = 25'C unless otherwise noted.
LH4006C
Symbol
Parameter
Conditions
Typ
tr
Small Signal Rise Time
LlVIN = 0.5V
2
ts
Settling Time to 0.1 %
VIN = ±3V
80
SR
Slew Rate
VIN = -3Vto +3V
10%-90%
1000
VIN = +3Vto -3V
10%-90%
1200
Small Signal
Bandwidth
VOUT = 100 mVp-p
Av = +1
350
Full Power Bandwidth
VIN = ±2V, Note 5
Second Order
Harmonic Distortion
VOUT = 4 Vp-p,
fiN = 10 MHz
f -3dS
80
-60
4-43
Tested Limit
(Note 2)
ns
V/!'-s
(min)
300
MHz
(min)
dB
o
o
C»
.......
,....
:I:
.1:0.
o
o
C»
o
oCD
o
DC Electrical Characteristics
(Notes 1 & 6)
Vs = ±6V, RS = RL = 50n, TA = 25'C unless otherwise noted.
o
"0:1'
::z::
......
..J
CD
o
o
LH4006
Symbol
Parameter
Conditions
Typ
"0:1'
::z::
..J
Vos
Output Offset Voltage
TA = TJ = 25'C
2
Tested Limit
(Note 2)
Design Limit
(Note 3)
15
Units
(Max unless
otherwise stated)
mV
25
VOSIIH
Offset Voltage Drift
VIN = OV
100
Is
Input Bias Current
Rs = 300n
TA = TJ = 25'C, Note 4
100
Av
Voltage Gain
/LVrC
300
/LA
400
VIN = 2Vp-p,
f = 1 kHz
RL = 50n
RL = 1 kn
0.98
0.98
0.95
0.93
VIV
(min)
0.95
0.93
±3
Vo
Output Voltage
Swing
Av = +1
PSRR
Power Supply
Rejection Ratio
Vs = ±4Vto +8V
Is
Supply Current
Po
Power Dissipation
VIN = OV, RL = 1 kn
(Note 7)
55
±3
45
dB
(min)
40
55
V
(min)
65
80
mA
780
mW
Design Limit
(Note 3)
Units
(Max unless
otherwise stated)
AC Electrical Characteristics
(Note 1)
Vs = ±6V, Rs = RL = 50n, TA = 25'C unless otherwise noted.
LH4006
Symbol
Parameter
Conditions
Typ
tr
Small Signal Rise Time
AVIN = 0.5V
2
ts
Settling Time to 0.1 %
VIN = ±3V
80
SR
Slew Rate
VIN = -3Vto +3V
10%-90%
1000
VIN = +3Vto -3V
10%-90%
1200
Small Signal
Bandwidth
VOUT = 100 mVp-p
Av= +1
350
Full Power Bandwidth
VIN = ±2V, Note 5
f-3dS
Tested Limit
(Note 2)
ns
V/JL.s
(min)
300
MHz
(min)
80
Second Order
Harmonic Distortion
VOUT = 4 Vp-p,
fiN = 10 MHz
Note 1: These measurements are taken with the LH4006 strapped for a gain of + t.
-60
dB
Note 2: Tested limits are guaranteed and 100% tested in production.
Note 3: Design limits are guaranteed (but not 100% production tested) over indicated temperature and supply voltage ranges. These limits are not used to
calculate outgoing quality levels.
Note 4: Specification is at 25°C junction temperature due to requirements of high speed automatic testing. Actual value may be higher at operating junction
temperature.
Note 5: Full power bandwidth is calculated based on slew rate measurement using FPBW ~ slew rate/(2 "V peak).
Note 6: Boldface limits are guaranteed over full temperature. Operating ambient temperature range of LH4006C is -
25°C to
+ 85°C. and LH4006 is -
55°C to
+ 125°C.
Note 7: When the LH4006 is operated at elevated temperature (such as 125"C), some form of heat sinking or forced air cooling is required. The quiescent power
with Vs of ± 6V is 780 mW, whereas the package is rated to 750 mW without a heatsink at 125°C.
4-44
r-----------------------------------------------------------------------------,
Typical Performance Characteristics
Maximum Power
Dissipation
z
0
~
0
0-
2.5
2.0
1.5
1.0
150
§
125
:::>
100
iii
75
~
50
u
en
0-
;;;
0
0
25
50
75
100
125
150
I
.1>0
o
oQ)
-55OC
+25OC
.........
I
+25OC
+ 1250C
I
-1
+125 OC
-2
I
-3
0
0.1
TEMPERATURE (OC)
I
:I:
I
-55OC
25
0.5
......
3
175
-3
o
oQ)
Offset Voltage (Typical)
vsTime
200
"<
~
~
Eii5
.1>0
Input Bias Current
vsTime
Mr-~--'--'r--r--~-'
0.1
10
TIME (MIN)
TUK/9255-2
10
TIME (MIN)
TL/K/9255-10
TL/K/9255-11
Application Information
The unity gain follower configuration shown in Figure I, offers a 350 MHz small signal bandwidth to the -3 dB point
and the minimum slew rate of 1000 V/ /-'S insures a full power bandwidth of 80 MHz for a 4V peak to peak signal, according to the formula:
Where SR is the slew rate in V/ /-'S, B is the bandwidth of the
device in MHz for a peak sine wave voltage Vp.
The unity gain follower/buffer is therefore an excellent
choice for wideband sinewave buffering or pulse amplification. Figure 2 shows the typical pulse response for such a
configuration.
SR
B=-27TVp
lOon
I
:I:
22pF
+Ys
11j)o.:.::..-............-o YOUT
TOP
=
Input
BOTTOM = Output
-Ys
TL/K/9255-3
TL/K/9255-5
FIGURE 1. Unity Gain Follower
Vee
~
±6V, Rs
~
RL
~
son.
FIGURE 2. Follower/Buffer Pulse Response
4-45
o
oCD
o
Driving Capacitive Loads
"0:1'
Flash AID, unterminated cables, etc, can exhibit up to 300
pF of capacitance, thus creating stability or settling problems. Figure 3 shows the compensation scheme for driving
such capacitive loads while still insuring optimum settling.
The output current limit of the LH4006 is a considerable
help for driving capacitive loads, the charging current is kept
o
:J:
....I
......
CD
o
o
"0:1'
:J:
....I
in control and the damping resistor can be small without
overloading the output stage. A 200 resistor in series with
the capacitance is required for insuring an optimum settling
time to 0.5% in less than 20 ns which is suitable for driving a
7 bit flash A to D converter in video applications at a sampling rate of 20 MSPS (see Figure 4 ) .
100n
22 pF
+Vs
INPUT
-Vs
Tl/K/9255-6
FIGURE 3. Driving Capacitance
TOP = Input
BonOM = Output
Tl/K/9255-7
vee
el
~
~
± 6 Volts
360 pF
FIGURE 4. Pulse Response When Driving Capacitance
4-46
,---------------------------------------------------------------------------------, r::J:
Layout Considerations
Input Capacitance
The layout of a RFlVideo PC board where the signal frequency is beyond 100 MHz requires special attention. All
the traces or connections must be as short and as wide as
possible in order to keep their parasitic inductance to a minimum. This is especially critical for the supply lines where the
current can reach over 100 mA in a few nanoseconds.
Although the LH4006 contains internal decoupling, it still
requires some external bypassing capacitors, which' have to
be located as close to the supply pins as possible. A 4.7 ftF
in parallel with a 100 nF low inductance capacitor will insure
good filtering. In some cases of noisy environment, or when
the power supply is located far from the circuit, it may be
necessary to use a dual stage decoupling as shown in Figure 5.
The input capacitance of the LH4006 is typically 8 pF and
will slightly increase with frequency. A large source resistance value in front of this will form a pole, which may substantially reduce the bandwidth of the circuit and affect stability.
This is the reason why resistor values higher than 500.0.
should not be used in the feedback network and high
source impedance should be avoided.
Bias Current
The input bias current is typically 100 ftA and may create an
undesirable output offset voltage when the source impedance is high. An internal 50.0. resistor is provided for matching with a 50.0. source impedance in order to minimize the
output offset voltage. Figure 6 shows a circuit that uses a
FET transistor pair for the input stage in order to reduce the
input bias current to the sUb-nanoampere region.
100.0.
22pF
OUTPUT
4]7P-F
0.1
TLlK/9255-8
FIGURE 5. Dual Stage Decoupling
Ground can also become a considerable problem. It is assumed to be uniformly zero volts and considered as a reference. In practice, if the ground is poorly laid out, every single point may be at a different potential and at a different
phase, which is a source of instability or signal distortion.
-Vs
TL/K/9255-9
FIGURE 6. FET Input Follower Buffer
The most reliable solution to this problem is to have a
ground plane that will minimize the parasitic inductance and
therefore, potential and phase differences.
4-47
"'oeno"
.......
r::J:
"'enoo"
o
'
~ Semiconductor
~National
LH4008/LH4008C Fast Buffer
General Description
Features
The LH4008 is a very high speed, FET input, voltage followerIbuffer designed to provide high current drive at frequencies from DC to over 180 MHz. The LH4008/LH4008C will
provide ± 200 mA into 50n loads (± 500 mA peak) at slew
rates of 10,000 VI ,...s. In addition, it exhibits excellent phase
linearity.
• Fast
• Wide range single or dual
supply operation
• Wide power bandwidth
• High output drive
• Low phase non-linearity
• Fast rise times
• High input resistance
• Pin compatible with LH0063
The LH40q8 is intended to fulfill a wide range of buffer applications. Due to its high speed it does not degrade the system performance. Its high O\ltput current makes it adequate
for most loads. Only a single + 10V supply is needed for a 5
Vpp video signal. In addition, the LH4008 can continuously
drive 50n coaxial cables.
These devices are constructed using specially selected
junction FET's and active laser trimming to achieve guaranteed performance specifications. The LH4008K is specified
for operation from - 55'C to + 125'C; whereas, the
LH4008CK and LH4008CT are specified from - 25'C to
+ 85'C. LH4008K and LH4008CK are available in an 8-pin
TO-3 package. The LH4008CT is available in an 11-pin TO220 package.
.
10,000 V/",s
DC to 130 MHz
± 1OV with 50n load
< 2 degrees
<
1.6 ns
> 1010n
Applications
•
•
•
•
•
High speed line drivers
Video impedance transformation
Op amp isolation buffers
Yoke driver for high resolution CRT
High impedance input buffer
Connection Diagram
Metal Can Package (T0-3), 8 Pin
Plastic Package (TO-220), 11 Leads.
11
10
9
o
v+
8
7
6
5
Offset
Adjust
V+
Vc+
N/C
N/C
OUTPUT
N/C
4
3
VcV-
2
OFFSET ADJUST
OFFSET PRESET
1
Output
INPUT
TL/K/9666-18
Note: Metal tab is electrically isolated.
Top View
Order Number LH4008CT
See NS Package Number TA 11 B
Offset
Preset
TL/K/9666-1
Note: Case is electrically isolated.
TOp View
Order Number LH4008K or LH4008CK
See NS Package Number K08A
4-48
r-
::I:
Absolute Maltimum Ratings
o
"""
o
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V+ - V-)
40V
Operating Temperature Range
LH400B
LH400BC
- 55°C to + 125°C
-25°Cto +B5°C
Storage Temperature Range
- 65°C to + 150°C
Maximum Power Dissipation (See Curves)
Lead Temperature
(Soldering, 10 seconds)
o
"""
o
300°C
n
3.2W
175°C
Maximum Junction Temperature
Input Voltage
±200 mA
Peak Output Current
±500 mA
r-
::I:
CD
TBD
ESD
Equal to Supplies
Continuous Output Current
CD
.......
DC Electrical Characteristics
Vs = ± 15V, Rs = RL = 5012, T A = 25°C unless otherwise specified (Note 1)
LH4008
Symbol
Parameter
Output Offset
Vos
Conditions
(Note 4)
Typical
10
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
25
Units
(Max Unless
Otherwise
Noted)
mV
100
< 100 k12
t. VOS/ t. T
Average Temperature Coefficient
of Output Offset Voltage
Rs
16
Input Bias Current
TMIN < TA
(Note 4)
< TMAX
Av
Voltage Gain
VIN= ±10V,
Av
Voltage Gain
VIN = ±10V
JLvrc
200
10
30
0.95
RL = 1 k12
0.94
0.92
0.94
0.90
0.88
CIN
Input Capacitance
Case Shorted
to Output
ROUT
Output Impedance
VOUT = ±10V
Vo
Output Current Swing
VIN = ± 10V,
Rs < 100 k12
Vo
Output Voltage Swing
nA
100
B
1.B
VIV
(Min)
VIV
(Min)
pF
4
12
0.25
0.2
Amps
(Min)
11.9
±10.5
11.1
10.0
V
(Min)
±3.2
±2.5
V
(Min)
LSVo
Low Supply Output
Voltage Swing
Vs = ± 5.0V
Is
Supply Current
RL =
Vs = ±15V
60
70
mA
Is
Supply Current
RL = 00, Vs = ±15V
TA = +125°C
52
70
rnA
Is
Supply Current
RL= oo,Vs= ±15V
TA = -55°C
8B
135
mA
Is
Supply Current
Vs = ±5.0V
45
Po
Power Consumption
RL=oo,VS= ±15V
1.B
Po
Power Consumption
Vs = ±5.0V
450
00,
mA
2.1
Note 1: Boldface limits are guaranteed over full temperature range. Operating ambient temperature range of LH400BC is - 25°C to
W
mW
+ 85°C, and LH4QOB is
- 55°C
to + 12S'C.
Note 2: Tested limits are guaranteed and 100% production tested.
Note 3: Design limits are guaranteed (but not production tested) over the indicated temperature range. These limits are not used to calculate outgoing quality level.
Note 4: Specification is at 25°C junction temperature due to requirements of high speed automatic testing. Actual values at operating temperature will exceed value
at TJ
~
2S'C.
4-49
DI
oco
o
DC Electrical Characteristics
~
Vs = ± 15V, Rs = RL = 500, T A = 25"C unless otherwise specified (Note 1) (Continued)
o
::I:
...I
.......
LH4008C
CO
o
o
~
Symbol
Parameter
Conditions
::I:
Typical
Tested
Limit
(Note 2)
10
50
...I
Vos
Output Offset
(Note 4)
!J,Vos/!J,T
Avererage Temperature Coefficient
of Output Offset Voltage
Rs
IB
Input Bias Current
TMIN < TA
(Note 4)
Ay
Voltage Gain
< 100 kO
Design
Limit
(Note 3)
mV
",vrc
200
< TMAX
10
30
nA
VIN = ±10V,
RL = 1 kO
0.95
0.92
VIV
0.9
VIV
Ay
Voltage Gain
VIN = ±10V
0.94
CIN
Input Capacitance
Case Shorted
to Output
8
ROUT
Output Impedance
VOUT = ±10V
Vo
Output Current Swing
VIN = ±10V,
Rs < 100 kO
Vo
Output Voltage Swing
LSVo
Low Supply Output
Voltage Swing
Vs = ± 5.0V
Is
Supply Current
RL =
Is
Supply Current
Vs = ±5.0V
45
Po
Power Consumption
RL =
1.8
Po
Power Consumption
Vs = ±5.0V
00,
00,
AC Electrical Characteristics LH4008 (TJ
Vs = ±15V
Vs = ±15V
pF
1.8
4
0
0.25
0.2
Amps
11.9
±10.5
V
±3.2
±2.5
V
(Min)
60
70
mA
mA
2.1
W
450
mW
= 25"C, Vs = ± 15V, Rs = 500, RL = 500)
LH4008C/LH4008
Symbol
Parameter
Units
(Max Unless
Otherwise
Noted)
Conditions
Typical
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
(Max Unless
Otherwise
Noted)
SR
Slew Rate Rising Edge
VIN = 20Vp.p
20%-80%
10000
V/",s
SR
Slew Rate Falling Edge
VIN = 20Vp.p
20%-80%
7000
V/",s
BW
Bandwidth
VIN = 1.0 Vrms
180
160
PBW
Power Bandwidth
VIN = 20Vp.p
130
110
Phase Non-Linearity
BW = 1.0 to 50 MHz
2
degrees
Rise Time
!J, VIN
= 20 Vp_p
1.6
ns
Propagation Delay
!J,VIN
= 20 Vp.p
1.2
ns
< 0.1
%
t,
tp
Harmonic Distortion
MHz
MHz
Note 1: Boldface limits are guaranteed over fun temperature range. Operating ambient temperature range of LH400BC is -25°C to +85°C, and LH4008 is -55°C
to +125'C.
Note 2: Tested limits are guaranteed and 100% production tested.
Note 3: Design limits are guaranteed (but not production tested) over the indicated temperature range. These limits are not used to calculate outgoing quality level.
Note 4: Specification is at 25°C junction temperature due to requirements of high speed automatic testing. Actual values at operating temperature will exceed value
at TJ ~ 2S'C.
4-50
r-
::I:
Typical Performance Characteristics
Maximum Power Dissipation
vs Temperature
""oo
Operating Area
300
6
100
CASE (8JC = 15OC/W)
~
:z
0
~
i
5
1\
4
3
~
1
ia
~-100
0
-200
./
0
25
50
75
100
125
150
-15 -10
TENPERATURE (OC)
15
I
~
~
-66
h
~
5~
10
5
10
~
20
10
~
a
"[
.E
15
15
Gain Phase
vs Frequency
/
20
°v
_lOt----50
20
Supply Voltage
'iii'
3
~
J
10
0
I
V
50
20
SUPPLY VOLTAGE (:tV)
3D
!
co
o
4D
0
5
15
""
o
o
+~5
~5
60
4D
~+26
0
10
0
80
Input Bias Current
vs Temperature
~
5
-5
::I:
J..n
- 55OC I
OUTPUT VOLTAGE (V)
Output Swing vs
Supply Voltage
m
i
/'
-300
0
.
1
Tc=25OC
0
a
" "- "'-
2
/'
ig; 'OO
\
AW61ENT (8JA = 4DOC/W)
Vs=:t 15V
200
co
.......
r-
Supply Current vs
Supply Voltage
DC Safe
-
0
Rs=RL =50Jl
Vs=t15V VIN =1 Yrms
G
........
-5
+180
-10
+90
-15
<"
-20
0
-90
...,
!
~
-180
100
10
100
Temperalure (OC)
1000
fREQUENCY (MHz)
TLlK/9666-5
Small Signal Rise Time
Small Signal Fall Time
l00mV/dlY,
7
~
'E
!
:;
I
RL =50Jl
~E
-,...-
V
Vc=t15V
I
RL =50Jl
Vc=t15V
!:l
\
0
>
5
.....
~
/
0
!5
I
0
0
V
~
!:l
>
f-f-I-'"
r--
!5
S
0
I
100mV/dly,
0
1 nS/div.
500ps/dlY,
TIME (SOD ps/dly,)
TIME (1 "s/dly,)
TLlK/9666-12
TL/K/9666-13
Large Signal Rise Time
...,
~
~
5V/dlY,
Large Signal Fall Time
I
I
I
I I
5V/dly,
1
-;;:.
RL =50Jl
e
Vs=t15V
~
>
~~
!5
!5
!:l
0
j!,
RL =50Jl
"'"
§
::>
0
500p./diY,
vc=t 15V
"
500ps/dly,
TIME (500 p./dly,)
TINE (500 ps/dIY,)
TL/K/9666-15
TL/K/9666-14
4-51
o
IX)
o
o
Bandwidth Test Circuit
'01'
Power Bandwidth Test Circuit
Network Analyzer
HP8753A
::I:
...J
......
IX)
Network Analyzer
HP8753A
o
o
RF
'01'
RF
::I:
...J
1 GHz Power
TLlK/9666-3
Amplifier
Mlnlclrcults
No. ZHl-2-8
TL/K/9666-4
Application Hints
Recommended Layout Precautions: RF/video printed circuit board layout rules should be followed when using the
LH400B since it will provide power gain to frequencies over
180 MHz. Ground planes are recommended and power supplies should be decoupled at each device with low inductance capacitors. In addition, ground plane shielding may be
extended to the metal case of the device since it is electrically isolated from internal circuitry. Alternatively, the case
should be connected to the output to minimize input capacitance.
Capacitive Loading: The LH400B is designed to drive capacitive loads such as coaxial cables in excess of several
thousand picofarads without susceptibility to oscillation.
However, peak current resulting from (C x dV/dt), should
be limited below absolute maximum peak current ratings for
the devices.
( a~:N) x CL :s;
In addition, power dissipation resulting from driving capacitive loads plus standby power should be kept below package power rating:
. -.....--o+15V
INPUT
Pdiss;e, PDC
OFFSET
PRESET
(OPEN)
lOUT :s; ± 500 rnA
pkg.
OUTPUT
+ PAC
Pdiss;e, (V+ - V-) x Is
+ PAC
pkg.
OFFSET
ADJUST
PAC = (V p_p)2 X f X CL
100
...........-+---o-15V
where
TL/K/9666-6
Vp_p = Peak-to-peak output voltage swing
FIGURE 2. Offset Zero Adjust
f = frequency
Short Circuit Protection: Short circuit protection may be
added by inserting appropriate value reSistors between V+
and Vc+ pins and V- and VC- pins as illustrated in Figures
2 and 3. Resistor values may be predicted by:
V+
VRUM = - = Isc
Isc
The inclusion of limiting resistors in the collectors of the
output transistors reduces output voltage swing. Decoupling
Vc+ and VC- pins with capacitors to ground will retain full
output swing for transient pulses.
CL = Load Capacitance
Operation within an Op Amp Loop: The device may be
used as a current booster or isolation buffer within a closed
loop with op amps such as LH0032, LM6161, or LM118. An
isolation resistor of 470 should be used between the op
amp output and the input of LH4008. The wide bandwidth
and high slew rate of the LH400B assures that the loop has
the characteristics of the op amp and that additional rolloff
is not required.
Hardware: In order to utilize the full drive capabilities of
both devices, each should be mounted with a heat sink particularly for extended temperature operation. The cases of
both are isolated from the circuit and may be connected to
system chassis.
y+
R....
6011 5W
ATTENTION!
Power supply bypassing is necessary to prevent oscillation
in all circuits. Low inductance ceramic disc capacitance with
the shortest practical lead lengths must be connected from
each supply lead (within < % to %" of the device package)
to a ground plane. Capacitors should be two 0.1 ",F ceramic
and one 4.7 ",F solid tantalum capacitors in parallel on each
supply lead.
IC""=O.l!'F
> : : ' - - - 0 OUTPUT
INPUT
v-
TLlK/9666-7
FIGURE 3. Using Resistor Current Limiting
4-52
~------------------------------------------------------------~r
::J:
Schematic Diagram
"..
o
o
CD
......
LH4008/LH4008C
r
2
::J:
V+
"..
o
o
) NORMALLY
SHORTED
/
Ql
4
INPUT 0 - - - -...
.....---=-o OUTPUT
4-53
CD
o
0,----------------------------------------------------------------------.
i
Typical Applications (Continued)
~
..J
~
o
~
1W CW Final Amplifier
.....----~o()+30V
~
..J
0.1
4.7
·I I
I'r
".~''''''
..00.
1
TLlK/9666-9
Isolation Buffer
+15V
INPUT
.REACTIVE
lOAD
4
51
c
-15V
Guard Driver
Laser Diode Transmitter
+15V
TL/K/9666-11
+15V
>-.....--t---QOUTPUT
INPUT
0-11---+--1
3
TLlK/9666-16
TL/K/9666-17
4-54
r::J:
.ro.
o
~National
o
~ Semiconductor
co
......
lH4009/lH4009C Fast Buffer
o
o
co
r::J:
.ro.
o
General Description
Features
The LH4009 is a very high speed, FET input, voltage followerIbuffer designed to provide high current drive at frequencies from DC to over 190 MHz. The LH4009/LH4009C will
provide ±200 rnA into 500 loads (±250 rnA peak) at slew
rates of 1OOOOV I ,..s. In addition, it exhibits excellent phase
linearity.
The LH4009 is intended to fulfill a wide range of buffer applications. Due to its high speed it does not degrade the system performance. Its high output current makes it adequate
for most loads. Only a single + 10V supply is needed for a
5 Vpp video signal. In addition, the LH4009 can continuously
drive 500 coaxial cables.
III Fast
These devices are constructed using specially selected
junction FETs and active laser trimming to achieve guaranteed performance specifications. The LH4009K is specified
for operation from - 55'C to + 125'C; whereas, the
LH4009CK is specified from -25'C to + 85'C. LH4009K
and LH4009CK are available in an 8-pin TO-3 package.
LH4009CT is available in an 11-pin TO-220 package and is
specified from -25'C to +85'C.
10000V/,..s
III Wide range single or
dual supply operation
DC to 150 MHz
III Wide power bandwidth
± 1OV with 500 load
III High output drive
III Low phase non-linearity
2 degrees
2 ns
10100
III Fast rise times
III High input resistance
• Pin compatible with LH0063
III Built in short circuit protection
Applications
III High speed line drivers
III Video impedance transformation
III Op amp isolation buffers
III Yoke driver for high resolution CRT
III High impedance input buffer
Connection Diagrams
Metal Can Package (TO-3), 8-Pin
Plastic Package (TO-220), 11 Pin
It
to
9
B
o
7
INPUT
v+
Ve+
Nle
Nle
6
OUTPUT
5
4
3
Nle
2
t
OFFSET ADJUST
OFFSET PRESET
Ve·
v-
TLlK/9405-18
Top View
Metal Tab is Electrically Isolated
Offset
Adjust
Order Number LH4009CT
See NS Package NumberTA11B
Case Is not
connected
TL/K/940S-2
Top View
Order Number LH4009K or LH4009CK
See NS Package Number K08A
4-55
•
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (v+ - V-)
40V
Maximum Power Dissipation (see Curves)
Input Voltage
Duration of Short Circuit Protection
3W
175'C
Maximum Junction Temperature
30 sec
Operating Temperature Range
LH4009
LH4009C
-55'Cto + 125'C
-25'Cto +85'C
Storage Temperature Range
- 65'C to + 150'C
Equal to Supplies
Continuous Output Current
±250 mA
Peak Output Current
Lead Temperature
(Soldering, 10 sec.)
±200 mA
300'C
ESD
DC Electrical Characteristics Vs =
TBD
± 15V, Rs = RL = 500., TA = 25'C unless otherwise specified
LH4009
Symbol
Parameter
Conditions
Typical
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
{Max unless
otherwise
noted)
Vas
Output Offset
(Note 4)
10
25
150
mV
18
Input Bias Current
(Note 4)
5
30
100
nA
Av
Voltage Gain
VIN = ±10V, RL = 1 ko.
0.92
0.9
0.85
VIV(Min)
Av
Voltage Gain
VIN = ±10V
0.87
0.85
0.8
VIV(Min)
CIN
Input Capacitance
ROUT
Output Impedance
Va
Output Voltage Swing
LSVo
Low Supply Output
Voltage Swing
Vs = ±5.0V
Is
Supply Current
Vs = ±15V, RL =
LVls
Low Voltage Supply Current
Vs = ±5.0V
Po
Power Consumption
Vs = ±15V, RL =
Po
Power Consumption
Vs = ±5.0V, RL =
pF
·10
VOUT = ±10V
5
0.
±10
±8
V (Min)
±2.5
V (Min)
47
60
75
mA
45
60
mA
1.26
1.8
W
600
mW
±11
DC Electrical Characteristics Vs =
00,
00
00
± 15V, Rs = RL = 500., T A = 25'C unless otherwise specified
LH4009C
Symbol
Parameter
Conditions
Typical
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
(Max unless
otherwise
noted)
Vas
Output Offset
(Note 4)
10
50
18
Input Bias Current
(Note 4)
5
30
nA
Av
Voltage Gain
VIN = ±10V, RL = 1 ko.
0.92
0.9
VIV(Min)
VIN = ±10V
0.87
0.85
VIV(Min)
Av
Voltage Gain
CIN
Input Capacitance
ROUT
Output Impedance
Va
Output Voltage Swing
mV
pF
VOUT = ±10V
±11
Va
Output Voltage Swing
Vs = ±5.0V
Is
Supply Current
Vs = ±15V, RL =
LVls
Low Voltage Supply Current
Vs = ±5.0V
Po
Power Consumption
Vs = ±15V, RL =
PD
Power Consumption
Vs = ±5.0V, RL =
00
00
00
4-56
5
0.
±10
V (Min)
±2.5
V (Min)
42
60
mA
45
60
mA
1.26
1.8
W
600
mW
r-
AC Electrical Characteristics TJ = 25'C, Vs =
:::t:
01:00
± 15V, Rs = 50n, RL = 50n
o
LH4009
Symbol
Parameter
Tested
Limit
(Note 2)
Conditions
Typical
Units
(Max unless
otherwise
noted)
Design
Limit
(Note 3)
VIN = 20Vpp
20%-80%
11,000
V/p.s (Min)
SR
Slew Rate
Falling Edge
VIN = 20Vpp
20%-80%
8000
V/p.s (Min)
BW
Bandwidth
VIN
=
1.0 Vrms
190
160
MHz (Min)
=
20Vpp
150
130
MHz (Min)
Power Bandwidth
VIN
Il VIN = 20 Vpp
1.2
Propagation Delay
Il VIN = 20 Vpp
1.3
r-
:::t:
01:00
o
o
<0
Slew Rate
Rising Edge
Rise Time
<0
......
o
SR
PBW
o
ns
ns
Note I: Boldface limits are guaranteed over full temperature range. Operating ambient temperature range of
to +12S'C.
LH4009C is
-
2S'C to + 85'C, and LH4009 is
-
SS'C
Note 2: Tested limits are guaranteed and 100% production testad.
Note 3: Design limits afe guaranteed (but not production tested) over the indicated temperature or temperature range. These limits
outgoing quality level.
afB
not used to calculate
Note 4: Specifications are at 2S"C junction temperature due to requirements of high speed automatic testing. Actual values at operating temperature will exceed
value at TJ ~
2S'C.
Typical Performance Characteristics
Maximum Power Dissipation
vs Temperature
~
z
7
70
6
60
5
~
3
~
2
~
I"
50
i".-
§
40
r-.... ........... "-
B
30
~
20
-
~c=25OCjW
4
AMBIDIT
'JA = 500cjW
.........
~
iil
.........
I
0
0
25
50
75
100
125
Output Voltage Swing
vs Supply Voltage
t6
1
1
"CASE
0
~
Supply Current
vs Temperature
...
">
~
C>
~
1'-- ...
r--. ..
~
~
Vc=t15V
V'N=OV
150
6
i
....
100n
r--....
0
Offset Voltage
vs Supply Voltage
VS=tI5V
"'\
(,,) 10n
~
~
!
\
~
~
0
I\.
'\
In
:i!: lOOp
"\
60
40
~
i'...
0
j'-...
c;;;-
r'\.
.:!l.
~
""-
>
20
0
-20
10
12
SUPPLY VOLTAG!:
4
6
(tv)
0
-2
-4
-6
r-
Vs=t15V _
80
2
8
14
16
Gain and Phase
vs Frequency
V'H=OV
RL =50Jl -
\
100
L
2
TEMPERATURE (OC)
Input Bias Current
vs Input Bias Voltage
t}'
,V
pos.
0
10},
3:
~
8
4
0
NELk-
RL =50Jl
to
g
0
-60 -40-200 20 40 60 80100120140
TEMPERATURE (OC)
t2
5
5
10
t4
'"
G
-8
-10
-12
-14
-16
-18
-20
•
RS=RL =50Jl
VIN = 1V rms
0
-90
~...
~
-IBO
VS=tI5V,I
lOp
-IS -10
-5
0
5
10
INPUT BIAS VOLTAG!: (V)
IS
0
2
4
6
10
12
SUPPLY VOLTAGE
8
(tv)
14
16
10
100
1000
fREQUENCY (MHz)
TLlK/9405-9
4-57
•
Typical Performance Characteristics
(Continued)
Large Signal Rise Time
Large Signal Fall Time
5V/diY,
5V/diY,
IN
I
I
\
OUT
I'\.
I'\. OUT
IN
i'+-
RL = 50.n
RL - SO.n
Vs=:tlSV
500ps/div,
-
Vs=:t15V
500ps/d1Y,
TUK/9405-11
TL/K/9405-10
Small Signal Rise Time
Small Signal Fall Time
200mV/div,
200mV/div,
I-~
IN
I
OUT
I
-
\
\
/
/
II
:"\
I'\.
IN
./
RL =50.n
OUT
~
RL =SO.n
Vs=:tlSV
500 ps/div,
~
Vc=:tlSV
500ps/div,
TL/K/940S-13
TL/K/9405-12
Bandwidth Test Circuit
Power Bandwidth Test Circuit
Network Analyzer
HP8753A
Network Analyzer
HP8753A
ATTENUATOR
RF
B
R
Power SpRUer
HP11667A
B
RF
~
R
~>
Power Splitter
HP11667A
TL/K/940S-14
B
20dB
r-
[>-7
1 GHz Power
Amplifier
Minicircults
No, ZHL-2-8
TL/K/9405-1S
4-58
r-
::I:
Application Hints
RECOMMENDED LAYOUT PRECAUTIONS: RF/video
printed circuit board layout rules should be followed when
using the LH4009 since it will provide power gain to frequencies over 200 MHz. Ground planes are recommended and
power supplies should be decoupled at each device with
low inductance capacitors. In addition, ground plane shielding may be extended to the metal case of the device since it
is electrically isolated from internal circuitry. Alternatively,
the case should be connected to the output to minimize
input capacitance.
be limited below absolute maximum peak current ratings for
the devices.
(Ll~;N)
Pdiss;:' PDC
OFFSET
51
PRES~OO~V
OFFSET
ADJUST
6
~
IOUT:O: ±250 mA
+ PAC
pkg.
Pdiss;:' (V+ - V-) x Is
+ PAC
pkg.
J
o-___4-1
:0:
In addition, power dissipation resulting from driving capactive loads plus standby power should be kept below package power rating:
+15V
INPUT
XCL
PAC = (Vp_p)2 X f X CL
2
where
1 3
LH40/,.......~a~----O
OUTPUT
Vp-p = Peak-to-peak output voltage swing
f = frequency
CL = Load Capacitance
OPERATION WITHIN AN OP AMP LOOP: The device may
be used as a current booster or isolation buffer within a
closed loop with op amps such as LH0032, LM6161, or
LM118. An isolation resistor of 470. should be used between the op amp output and the input of LH4009. The wide
bandwidth and high slew rate of the LH4009 assures that
the loop has the characteristics of the op amp and that
additional rolloff is not required.
HARDWARE: In order to utilize the full drive capabilities of
both devices, each should be mounted with a heat sink particularly for extended temperature operation. The cases of
both are isolated from the circuit and may be connected to
system chassis.
,/"
I,; 7
12k
-15V
TL/K/9405-3
FIGURE 1. Offset Zero Adjust
SHORT CIRCUIT PROTECTION: The LH4009 features
built-in short circuit protection. It will protect the device
against output shorts to ground for up to 30 seconds. Beyond that the device may get degraded.
ATTENTION!
POWER SUPPLY BYPASSING is necessary to prevent oscillation in all circuits. Low inductance ceramic disc capacitance with the shortest practical lead lengths must be connected from each supply lead (within < % to '12' of the
device package) to a ground plane. Capacitors should be
two 0.1 fLF ceramic and one 4.7 fLF solid tantalum capacitors in parallel on each supply lead.
CAPACITIVE LOADING: The LH4009 is designed to drive
capacitive loads such as coaxial cables in excess of several
thousand picofarads without susceptibility to oscillation.
However, peak current resulting from (C x dV/dt), should
4-59
"'"
o
o
<0
.......
r-
::I:
"'"
o
o
<0
o
Schematic Diagram
LH4009
2
y+
"
) NORMALLY
SHORTED
INPUT
4
7
I
NORMALLY
' SHORTED
5
' .. ,,' OFFSET ADJUST
NORMALLY SHORTED
TL/K/9405-1
Typical Applications
Laser Diode Transmitter
+15V
Isolation Buffer
+15V
+15V
INPUT
o--II--~
INPUT
51
68
TlIK/9405-16
-15V
TlIK/9405-6
4-60
.-------------------------------------------------------------------------------------, r::I:
~
Typical Applications (Continued)
o
o
CD
......
r-
Coaxial Cable Driver
::I:
~
o
o
+15V
4.7 p.F
CD
o
~
2
0.1 p.F
51
INPUT
0-""""'""-1
50.0.
-15V
TL/K/9405-7
1W CW Final Amplifier
. . . - - - - -.....-0 +30V
lOOK
I
4.7 p.F
1--+--;--0 1W@50.o.
TLiK/9405-8
4-61
o
o
§ ~National
~ ~ Semiconductor
~
~ LH4010/LH4010C Fast FET Buffer
.;;.J
General Description
Features
The LH4010/LH4010C is a high speed, FET input, voltage
follower/buffer designed to provide high current drive at frequencies from DC to over 100 MHz. LH4010 will provide
± 100 rnA into 500. loads (± 250 rnA peak) at slew rates of
2500 V / ,...S. In addition, both exhibit excellent phase linearity
up to 20 MHz.
•
•
•
•
•
•
•
•
•
The LH401 0 is intended to fulfill a wide range of buffer applications such as high speed line drivers, video impedance
transformation, nuclear instrumentation amplifiers, op amp
isolation buffer for driving reactive loads and high impedance input buffers for high speed ADCs and comparators.
These devices are constructed using specially selected
junction FETs and active laser trimming to achieve guaranteed performance specifications. The LH4010 is specified
for operation from - 55'C to + 125'C; whereas, the
LH4010C is specified from -25'C to + 85'C. The LH4010/
LH4010C is available in a 1.5W metal TO-8 package or a 16
lead dual-in-line package, N16A.
2500 V/,...s
Slew rate
Wide range single or dual supply operation
Power bandwidth
DC to 20 MHz
High output drive ± 10V with 1000. load
2'
Low phase non-linearity
2 ns
Fast rise times
120 dB
High current gain
1010n
High input resistance
Pin compatible with LH0033
Applications
•
•
•
•
High speed cable driver
Isolation buffer
ADC input buffer
Op amp current booster
Schematic and Connection Diagram
LH4010/LH4010C
12
Top View
y+
Ne
y+ 2
) NORMALLY
SHORTED
16 Ne
•
15 Ne
14 Ne
Ne
INPUT
/
OFFSET ADJUST
OFFSET PRESET
VYe-
4
13 Ye+
5
12 OUTPUT
11 Ne
6
7
10 Ne
9
Ne
s
TUK19349-24
Order Number LH4010CN
See NS Package Number N16A
Metal Can Package (TO-S)
Ne
R2
50 10
6
7
OFFSET
OFFSET
PRESET
ADJUST
NORMALLY
SHORTED
I NORMAllY
SHORTED
INPUT
OUTPUT
I
vNe
TL/K/9349-16
Pin numbers shown lor TO-B ("G") package.
TL/K/9349-1
Top View
Case is Electrically Isolated.
Order Number LH4010G or LH4010CG
See NS Package Number H12B
4-62
r
::t:
o
.....
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V+ - V-)
40V
Maximim Power Dissipation
(See Curves)
Output Current, Continuous
Pulsed
1.5W
Maximum Junction Temperature
175°C
Input Voltage
........
Operating Temperature Range
LH4010C
LH4010
-25°C to +85°C
-55°C to + 125°C
r
::t:
o
.....
"""
Storage Temperature Range
-65°C to +150°C
o
o
o
i
Lead Temperature
(Soldering, 10 seconds)
Equal to Supplies
"""
±100mA
±250 mA
300°C
DC Electrical Characteristics
Vs
=
± 15V, VIN
=
OV, RL
=
1k, T A
=
25°C unless otherwise noted (Note 1)
LH4010C
Symbol
Parameter
Conditions
Vas
Output Offset
Voltage
VIN = OV, TA
(Note 4)
Is
Input Bias Current
TJ
Vo
Output Voltage Swing
VIN'" ±14V(Note1)
=
VIN
RIN
Input Impedance
Is
Supply Current
ROUT
Output Impedance
Av
Voltage Gain
TJ
=
TJ
25°C
25°C (Note 1)
=
=
=
± 10.5, RL
25°C, VIN
=
=
Typical
Design
Limit
(Note 3)
5
10
20
mV
0.5
1
50
nA
±12
±12
V (Min)
1010
22
VIN = ±VDC,
.6.RL = 1000. to
VIN
VIN
=
=
V (Min)
±9
1000.
±1V
Units
(Max Unless
Otherwise Noted)
Tested
Limit
(Note 2)
0.
26
mA
10
0.
00
±10V
±10V, RL
=
1000.
0.96
0.96
V/v(Min)
0.90
0.90
V/v(Min)
:
II
4-63
o
o
....
~
DC Electrical Characteristics Vs =
=
±15V, VIN
OV, RL
=
1k, TA
::J:
....I
......
o·
....
Symbol
Parameter
Conditions
Tested
Limit
(Note 2)
Typical
o
..:r
::J:
....I
= 25°C otherwise noted (Note 1)
LH4010
Vas
18
Va
Input Offset
Input Bias Current
Output Voltage Swing
VIN = OV, TA = TJ
(Notes 1, 4)
=
5
25°C
=
10
±14V
=
1000,
TJ = 25°,C,
VIN = ±W
RIN
Input Impedance
Is
Supply Current
ROUT
Output Impedance
VIN = ±Voc(Note4)
b.RL = 1000 to 00
Av
Voltage Gain
VIN
=
±10V
VIN
=
±10V, RL
pA
10
nA
±12
V (Min)
±9
V (Min)
1010
0
22
AC Electrical Characteristics Vs =
mV
500
200
VIN = ±10.5, RL
TA = 25°C
= 1000
± 15V, RL
=
1 kO, RS
=
26
mA
8
0
0.97
, V/v(Min)
0.92
V/v(Min)
500, TA
=
25°C unless otherwise noted
LH4010/LH4010C
Symbol
Parameter
Conditions
Typical
tr
Small Signal Rise
Time (Note 5)
Ip
Propagation Delay
(Note 5)
BW
Small Signal Bandwidth
(Note 7)
=
500, VIN
Tested
Limit
(Note 2)
. Design
Limit
(Note 3)
1.5
b.VIN = 0.5V
RL
Units
(Max Unless
Otherwise Noted)
25
TJ = 25°C
(Notes 1, 4)
VIN
Design
Limit
(Note 3),
= 0.5V
ns
2.5
ns
2.0
b.VIN = 0.5V
Units
(Max Unless
Otherwise Noted)
200
MHz (Min)
140
RL = 500
Slew Rate (Note 6)
2500
2000
V/p.s(Min)
VIN = ±5V
Nole I: Boldface limits are guarantesd over full temperature range. Operating ambient temperature range of LH401 DC is - 25"C to + a5"C, and LH401 0 is - 55"C
to + 125"C.
Note 2: Tested limits are guaranteed and 100% production tested.
Note 3: Design limits are guaranteed (but not production tested) over the indicated temperature or temperature range. These limits are not used to calculate
outgoing quality level.
Nole 4: Specifications are at 25"C Junction temperature due to requirements of high spesd automatic testing. Actual values at operating temperature will exceed
value at TJ = 25"C.
Note 5: See AC Test Circu~.
Note 6: Slew rate Is measured between +2.5V and -2.5V. See AC Test Circuit.
Nole 7: Bandwidth is calculated from rise time with f = 1,11,..
SR
4-64
r-
::I:
Typical Characteristics
Maximum Power
Dissipation for TO-S
("G") Package
2.5
g
I'..
2.0
1.5
CASE ....,8 JC =70o C/W
"-
="'-
1.0 -
ffi
'~"
-
AMBIENT ...........
8JAi'000rW
o
25
50
'"~
1.5
"
1.0
ill
"""'"'" ""'"'"
75
100
-
z
~
125
...... I"{JA= 80o C/W
"'"
0.5
o
o
o
150
25
100
'"
125
-15
150
~
OUT
1::1:::011-"
,
IN
I
!5
'"'"
-2
~
-6
"
Vc=t15V
RL =50n
Rs = son
'"
I
-4
l!J
~
OUT
1::1:::0 V
~
'"
2
V
4
/
6
-8
-10
/
r--..
1
100
o
.,-
I -
!
i
I-"
-80
-160
1000
,,>"'-
~: ~,()~
'1~
100
~:
80
l!J
~
g
t;;
~
-20
40
250C
"",I-"""'
80
100
120
Supply Current vs
Supply Voltage
'-"
T
1
-55OC "",f-""
.....
II
60
TEMPERATURE (OC)
30
1250C
.....
.....
I
-10
20
160
Offset Voltage vs
Supply Voltage
!
10
OUTPUT CURRENT (mA)
10
1000
Input Bias vs Temperature
~
10 12 14 16 18 20
9
-12
'0
SUPPLY VOLTAGE (tV)
0
I'
10K
RLI=10~n
/
I\,
FREQUENCY (NHz)
L
8
+-
-6
10
I
I
/
1/
I
-4
Output Resistance vs
Output Current
/
10
.
Vc=t15V
RL = son
RS = son
10
RL =1 KJl
16 T=+25OC
12
'">
~
TIME (ns)
18
l!J
~
g
~Av
-2
10
Output Voltage vs
Supply Voltage
15
11111
11111
~
V
-8
10
Frequency Response
IV
TIME (ns)
14
-5
INPUT VOLTAGE (V)
10
S'
.!!
-10
z
5
-200
H-+++-H-+++-H-l
~
;;
I I
II
-100
0.5
O~~~~~~~~~-"
100
~
I
o
o
f-RL = loon
.....
~
IN
Ii::l:$~~;:;$:l~
Large Signal Pulse
~
"~
o......
"""
1.0
TEMPERATURE (OC)
Small Signal Pulse
~
;;
!5
'"'"
75
50
TEMPERATURE (OC)
200
::I:
R = 1 KJl
2.0
g
-
1"-
0.5
!
r-
Gain vs Input Voltage
2.5
z
~
!fl
o
"""
......
o
......
Maximum Power
Dissipation for
N16A Package
~
..
20
......... f-""
0
i
/
=1-5~oc..L.
'" Vr~
•
---
T=' ,25OC
.. I--' I--'f-""
10
-30
o
10
o
20
SUPPLY VOLTAGE (:IV)
10
20
SUPPLY VOLTAGE (:IV)
TL/K/9349-3
4-65
or-------------------------------------------------------~
«:)
..«:)
o:r
AC Test Circuit
:s
y+
4.7 ).IF
~
« :)
..«:)
O.o1).1F
o:r
-=
~
::J:
...J
1>"----""'''''
lOX rET PROBE
SUI.
TL/K/9349-2
Application Hints
Recommended Layout Preca~tions: RF/video printed circuit board layout rules should be followed when using the
LH4010 and LH4010C since they will provide power gain to
frequencies over 100 MHz. Ground planes are recommended and power supplies should be decoupled at each device
with low inductance capacitors. In addition, ground plane
shielding may be extended to the metal case of the device
since it is electrically isolated from internal circuitry. Alternatively the case should be connected to the output to minimize input capacitance.
where:
Offset Voltage Adjustment: Both the LH4010 and
LH4010C offset voltages have been actively trimmed by laser to meet guaranteed specifications when the offset preset pin is shorted to the offset adjust pin. This pre-calibration allows the devices to be used in most DC or AC applications without individually offset nulling each device. If offset
null is desirable, it is simply obtained by leaving the offset
preset pin open and connecting a trim pot of 100n
between the offset adjust pin and V- as illustrated in Figure 1.
Short Circuit Protection: In order to optimize transient response and output swing, output current limit has been
omitted from the LH4010 and LH4010C. Short circuit protection may be added by inserting appropriate value resistors between V+ and Vc+ pins and V- and Vc- pins as
illustrated in Figure 2. Resistor values may be predicted by:
V+
-VRUM""-=-Isc
Isc
where:
ISC';; 100 mA
AV = No load voltage gain, typically 0.99
v+ = Positive supply voltage
V - = Negative supply voltage
For the above example, aVo would be -35 mY. This may
be adjusted to zero as discussed above. For AC coupled
applications, no additional offset occurs if the DC input is
properly biased as illustrated in the "typical applications"
section.
r-""""4I~-() + lSV
The inclusion of limiting resistors in the collectors of the
output transitors reduces output voltage swing. Decoupling
Vc + and Vc - pins with capaCitors to ground will retain full
output swing for transient pulses. An alternate active current
limit technique that retains full DC output swing is shown in
Figure 3.
INPUT
OFFSET
PRESET
(OPEN)
OUTPUT
OFFSET
ADJUST
y+
100.11.
L-t-4_......--o-1SV
TL/K/9349-13
FIGURE 1. Offset Zero Adjust for LH4010
Operation from Single or Asymmetrical Power Supplies:
Both device types may be readily used in application where
symmetrical supplies are unavailable or not desirable. A typical application might be an interface to a MOS shift register
whereV+ = +5VandV- = -12V.lnthiscase,anapparent output offset occurs due to the device's voltage gain of
less than unity. This additional output offset error may be
predicted by:
(V+
V-)
aVo"" (1 - Av)
;
= 0.005 (V+ - V-)
TL/K/9349-14
FIGURE 2
4-66
r-
....::z::
Applications Hints (Continued)
In addition, power dissipation resulting from driving capcitative loads plus standby power should be kept below total
package power rating:
r - - -...- - - _ -O +15V
RUU
10
Pdiss
;;'
PDC
+ PAC
;;'
(V+ - V-) x Is
+ PAC
PAC'" (Vpp)2 X f X CL
Vpp = Peak-to-peak output voltage swing
f = frequency
CL = Load Capacitance
Operation Within an Op Amp Loop: Both devices may be
used as a current booster or isolation buffer within a closed
loop with op amps such as LH0032, LM6361, or LM118. An
isolation resistor of 47,{l should be used between the op
amp output and the input of LH4010. The wide bandwidths
and high slew rates of the LH4010 assure that loop has the
characteristics of the op amp and that additional roll off is
not required.
Hardware: In order to utilize the full drive capabilities of the
device, it should be mounted with a heat sink particularly for
extended temperature operation. The case is isolated from
the circuit and may be connected to system chassis.
where:
~":"'--+----c OUTPUT
RUU
10
TL/K/9349-15
FIGURE 3. LH4010 Current Limiting
Using Current Sources
ATTENTION!
Power supply bypassing is necessary to prevent oscillation
in all circuits. Low inductance ceramic disc capacitors with
the shortest practical lead lengths must be connected from
each supply lead (within < %" to %" of the device package) to a ground plane. Capacitors should be one or two
0.1 !£F in parallel; adding a 4.7 !£F solid tantalum capacitor
will help in troublesome instances.
Capacitive Loading: The LH4010 is designed to drive capacitive loads such as coaxial cables in excess of several
thousand picofarads without being susceptible to oscillation.
However, peak current resulting from (C x dVIdt) should
be limited below absolute maximum peak current ratings for
the devices.
Thus:
{ aVIN} X CL:S; IOUT:S; ±250mA
Tt
Typical Applications
Nuclear Particle Detector
High Input Impedance AC Coupled Amplifier
v+
r--__1_---o+15V
SHIELD It-:=:&-=-I
>1",1_ _-0 OUTPUT
0.1 J.LF
L.......---o-15V
TL/K/9349-17
IU
TLlK/9349-18
4-67
....::z::o
o
pkg
INPUT
r-
......
o
pkg
Pdiss
o......
o
........
(,)
o
..-
~
Typical Applications
(Continued)
::I:
Coaxial Cable Driver
...I
.....
o
.,..
o
"0:1'
::I:
...I
INPUT
51
0-"",,.,,..."""
50
TLlKf9349-19
·Select C1 for optimum pulse response.
Instrumentation Shield/Line Driver
Single Supply AC Amplifier
y+ = 12V
~.:.........OOUTPUT
51
INPUTo--4I......JVI/Ir--''''I
TLlKf9349-21
TLlKf9349-20
4-68
r-
Typical Applications
:::J:
....
o
(Continued)
.....
o
4.5 MHz Notch Filter
.......
r:::J:
....
o
.....
o
o
».:.1.:,.1....-0
Your
1
C2
fo = 2".R1Cl
300pF
Rl
Rl
220
220
Rl
= 2 R2
Cl
=~
2
TL/K/9349-22
High Speed Sample and Hold
v·
ANALOG
».:.':""'-0 OUTPUT
INPUT
'V
3.0V
]0___ ,
"Polycarbonate or TeflonTM
1/2DH0034
1.1.- - ;p
_
.J
'V
TL/K/9349-23
'Pin numbers shown for TO-8 (""G") package.
4-69
o.....
ij ~ National
~ ~ Semiconductor
.....
.....
~ LH4011/LH4011C Fast Open Loop Buffer
..J
General Description
Features
The LH4011 is a very high speed, FET input, voltage follower/buffer designed to provide high current drive ai frequencies from DC to over 150 MHz. The LH4011/LH4011C will
provide ±200 mA into 500. loads (±500 mA peak) at slew
rates of 5000 V/p.s. In addition,it exhibits excellent phase
linearity.
The LH4011 is intended to fulfill a wide range of buffer applications. Due to its high speed it does not degrade the system perlormance. Its high output current makes it adequate
for most loads. Only a single + 10V supply is needed for a
5 Vpp video signal. In addition, the LH4011 can continuously
drive 500. coaxial cables.
•
•
•
•
•
•
•
•
5000V/p.s
Fast
Wide range single or dual supply operation
Wide bandwidth
DC to 160 MHz
± 1OV with 500. load
High output drive
<2'
Low phase non-linearity
<2 ns
Fast rise times
>10 100.
High input resistance
Pin compatible with LH0063
.. Applications
These devices are constructed using specially selected
junction FET's and active laser trimming to ac~ieve guaranteed perlormance specifications. The LH4011 K is specified
for operation from - 55'C to + 125'C; whereas, the
LH4011 CK is specified from - 25'C to + 85'C. LH4011 K .
and LH4011 CK are available in a 5W 8-pin TO-3 package.
The LH4011 CT is specified for operation from .- 25'C to
+85'C and is available in an II-pin TO-220package.
•
•
•
•
•
High speed line drivers
Video impedance transformation
Op amp isolation buffers
Yoke driver for high resolution CRT
High impedance input buffer
Connection Diagrams
Metal Can Package (TO-3), a-Pin
Plastic Package (TO-220), II-Pin
11
10
9
o
IHPUT
V+
Ve+
Hie
Hie
OUTPUT
Hie
Ve·
VOFFSET ADJUST
OFFSET PRESET
TL/K/9423-19
Top View
Note: Metal Tab is Electrically Isolated
Order Number LH4011CT
See NS Package NumberTA11B
TL/K/9423-1
Top View
Note: Case is Electrically Isolated
Order Number LH4011K or LH4011CK
See NS Package Number KOaA
4-70
r-
::I:
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V + - V -)
40V
Peak Output Current
Operating Temperature Range
LH4011
LH4011C
Storage Temperature Range
Lead Temperature
(Soldering, 10 seconds)
Maximum Power Dissipation (See Curves)
3.2W
Maximum Junction Temperature
175"C
Input Voltage
Equal to Supplies
±200mA
Continuous Output Current
±500 mA
-55"C to + 125"C
- 25"C to + 85"C
-65"C to
+ 150"C
300"C
TBD
ESD
DC Electrical Characteristics
Vs ± 15V, RS = RL = 50!l, TA = 25"C unless otherwise specified (Note 1)
LH4011
Symbol
Vas
Conditions
Parameter
Output Offset
Typical
RL = 50!l
Rs < 100 k!l (Note 4)
b.Vosl b.T
Aver. Temp. Coeffic.
of Output Offset Voltage
Rs<100K!l
TMIN < TA < TMAX
18
Input Bias Current
(Note 4)
10
Tested
Limit
(Note 2)
25
Design
Limit
(Note 3)
Units (Max
Unless Otherwise
Noted)
mV
100
/Lvrc
300
10
30
nA
100
Av
Av
Voltage Gain
Voltage Gain
VIN ±10V, RL = 1 k!l
Rs < 100 k!l
0.95
VIN = ±10V, RL = 50!l
Rs < 100k!l
0.94
8
CIN
Input Capacitance
Case Shorted to Output
ROUT
Output Impedance
VOUT = ±10V
0.94
V/v(Min)
0.92
0.92
V/V (Min)
pF
4
!l
0.25
0.2
Amps (Min)
Va
Output Current Swing
Va
Output Voltage Swing
RL = 50!l
11.4
±10
V (Min)
Va
Output Voltage Swing
Vs = ±5.0V, RL = 50!l
±2.7
±2.5
V (Min)
Is
Supply Current
RL =
60
68
mA
Is
Supply Current
Vs = ±5.0V
PD
Power Consumption
RL =
PD
Power Consumption
Vs = ±5.0V
VIN = ±10V, Rs < 100 k!l
00,
00,
Vs = ±15V
Vs = ±15V
4-71
50
mA
1.8
W
0.5
W
""o.....
.....
.......
r-
::I:
""..........o
o
o
.,....
.,....
o
~
::c
..J
DC Electrical Characteristics
Vs ± 15V, RS
= RL = 500., TA = 25'C unless otherwise specified (Note 1)
.....
.,....
.,....
~
LH4011C
Symbol
Conditions
Parameter
::c
..J
Vas
Output Offset
TJ = 25'C, RL = 500.
RS < 100 kn (Note 4)
t:..vos/AT
Aver. Temp. Coeffic.
of Output Offset Voltage
Rs < 100kn
TMIN< TA < TMAX
10
IB
Input Bias Current
(Note 4)
Voltage Gain
VIN = ± 10V, RL
Rs < 100kn
= 1 kn
Av
Voltage Gain
VIN = ±10V, RL
Rs < 100kn
= 500., TJ = 25'C
CIN
Input Capacitance
Case Shorted to Output
Output Impedance
VOUT
30
nA
0.95
0.92
VIV(Min)
0.94
0.9
V/v(Min)
pF
8
4
0.
0.25
0.2
Amps (Min)
11.4
±10
V (Min)
±2.7
±2.5
V (Min)
±15V
60
68
mA
= ±15V
1.8
W
0.5
W
= ±10V, RS < 100 kn
Vo
Output Current Swing
VIN
Vo
Output Voltage Swing
Va
Output Voltage Swing
= 500.
Vs = ± 5.0V, RL = 500.
Is
Supply Current
RL
=
Is
Supply Current
Vs
= ±5.0V
PD
Power Consumption
RL
=
PD
Power Consumption
Vs
= ±5.0V
RL
00,
Vs
Vs
AC Electrical Characteristics
/LVI'C
10
= ±10V
00,
=
mA
50
TJ
= 25'C, Vs = ± 15V, Rs = 500., RL = 500.
LH4011C/LH4011
Symbol
Parameter
Conditions
Typical
SR
Slew Rate
RL
= 500., VIN = 20 Vpp, 20% to 80%
BW
Bandwidth
VIN
= 1.0 Vrms
PBW
Power Bandwidth
= 20Vpp
BW = 1.0 MHz to 50 MHz
Phase Non·Linearity
AVIN
Rise Time
A VIN
Propagation Delay
AVIN
Units (Max
Unless Otherwise
Noted
mV
50
300
Av
ROUT
Typical
Tested
Design
Limit
Limit
(Note 2) . (Note 3)
Tested
Limit
(Note 2)
5000
Design
Limit
(Note 3)
Units (Max
Unless Otherwise
Noted)
V//Ls
160
140
MHz
80
60
MHz (Min)
2
deg.
= 1 Vpp
1.6
ns
= 1 Vpp
1.9
ns
%
Harmonic Distortion
<0.1
Note 1: Boldface limits are guaranteed over full temperature range. Operating ambient temperature range of LH4011 C is - 2S·C to + 8S·C, and LH4011 is - SS·C
to 125·C.
Note 2: Tested limits are guaranteed and 100% production tested.
Note 3: Design limits are guaranteed (but not production tested) over the indicated temperature range. These limtis are not used to calculate outgoing quality level.
Note 4: Specification is at 25°C junction temperature due to requirements of high speed automatic testing. Actual values at operating temperature will exceed value
at TJ = 2S·C.
4·72
r-
::J:
Typical Performance Characteristics
Power Dissipation
~
~
5
1\
4
~
3
Ili
2
'~"
........
~
~
B
...
;-.....
50
V-
0
0
25
50
75
100
125
60
i
,,/
..,-
-200
-5
0
5
10
~
,.
5~
+125
~
30
~
20
~
~
5
10
10
~
0
~
;!;
15
10
20
;;;-
-
SUPPLY VOLTAGE (tV)
~
~
~
,/
'"
I---'"
-20
-75 -so -25 0
20
Frequency
Response
V
-10
15
SUPPLY VOLTAGE (tV)
Vs=tl0V
<.>
0
5
20
15
40
>'
+125OC
40
Input Bias Current
?:25
4
2
0
-2
-4
-6
-8
-10
-12
180
G
90
f\
•
~
0
"
100
25 50 75 100 125
-90
103
TLlK/9423-6
TL/K/9423-3
~
~
E
0
0
...
II
c.:>
~
g
...
5
~
- .......
0
RL = son.
C
...
Vs-tlSV
c.:>
~
,
1\
g
-
7
~
?;-
e
RL = son.
~
!:i
g
Vs=:l:1SV
\
5
t=
::>
5
t=
~
0
f\- ......
0
0
Large Signal Fall Time
Small Signal Fall Time
'?
TIME (1 ns/dIY.)
TIME (1 ns/dIY.)
TL/K/9423-15
TL/K/9423-4
Large Signal Rise Time
:?
~...
/
c.:>
/
~
0
...
>
::>
t=
i-
l
-180
102
10'
3
Frequency (MHz)
TEMPERATURE (OC)
Small Signal Rise Time
.....
o
~OC
OUTPUT VOLTAGE (V)
15
:!!. 10
'1.us:
0
-15 -10
Output Swing vs
Supply Voltage
~
15:l§
o.....
OC
~
TEMPERATURE (OC)
5
]:
<.>
150
::J:
~
80
-300
0
'"
~
Vs=:!: 15V ITc=25OC
~-100
i'-
1
/'
200
';:'100
\
AMBIENT (8JA =40OC/W)
r-
100
300
CASE (8JC = 15OC/W)
§:
Supply Current vs
Supply Voltage
DC Safe Operating
6
o
.....
.....
.......
V
rr
RL = Son.
Vs -:l:1SV
1..1
::>
0
TIME (1 ns/dly.)
TL/K/9423-5
4-73
\
RL = son.
,
1\
Vs=:l:1SV
"....
TIME (2 ns/div.)
TLlK/9423-16
•
o ,----------------------------------------------------------------------.
....-
o
'0:1'
:::t:
Schematic Diagram
...J
......
....-
LH4011/LH4011C
2
o
V+
'0:1'
"
:5
} NORMALLY
SHORTED
/
01
INPUT 0""4_ _ _..
. . . . - -....'-0 OUTPUT
R8
\ NORMALLY
SHORTED
R1
I
7
5
6
NORMALLY
SHORTED
Bandwidth Test Circuit
TLlKI9423-2
,Power Bandwidth Test Circuit
Network Analyzer
HPB753A
Network Analyzer
HP8753A
ATTENUATOR
RF
B
RF
R
B
20dB
TLIKI9423-13
1 GHz Power
Amplifier
Minicircuits
No. ZHL-2-B
FIGURE 1. Bandwidth Test Circuit
TLlKI9423-14
FIGURE 2. Power Bandwidth Test Circuit
4-74
r
::J:
Application Hints
"..
0
....
+ t5V
Recommended Layout Precautions: RF/video printed circuit
board layout rules should be followed when using the
LH4011 since it will provide gain to frequencies over
160 MHz. Ground planes are recommended and power supplies should be decoupled at each device with low inductance capacitors. In addition. ground plane shielding may be
extended to the metal case of the device since it is electrically isolated from internal circuitry. Alternatively. the case
should be connected to the output to minimize input capacitance.
Short Circuit Protection: Short circuit protection may be added by inserting appropriate value resistors between V + and
Vc+ pins and V- and Vc- pins as illustrated in Figure 4.
Resistor values may be predicted by:
V+
VRUM "'-=Isc
ISC
The inclusion of limiting resistors in the collectors of the
output transistors reduces output voltage swing. Decoupling
Vc+ and Vc - pins with capacitors to ground will retain full
output swing for transient pulses.
....
......
INPUT
OFFSET
PRESET
(OPEN)
r
::J:
"..
0
OUTPUT
........
0
OFFSET
ADJUST
lK
L-~~-4--0-15V
TL/K/9423-7
FIGURE 3. Offset Zero Adjust
INPUT 0---,",
TLlK/9423-8
FIGURE 4. Using Resistor Current Limiting
4-75
o
.,...
.,...
o
..r
:::I:
....I
......
.,...
.,...
o
..r
:::I:
....I
Application Hints (Continued)
Capacitive Loading: The LH4011 is designed to drive capacitive loads such as coaxial cables in excess of several thousand picofarads without susceptibility to oscillation. However, peak current resulting from (C x dV Idt), should be limited below absolute maximum peak current ratings for the
devices.
(a~:N)
Operation Within an Op Amp Loop: The device may be used
as a current booster or isolation buffer within a closed loop
with op amps such as LH0032, LM6161, or LM118. An isolation resistor of 470. should be used between the op amp
output and the input of LH4011. The wide bandwidth and
high slew rate of the LH4011 assures that the loop has the
characteristics of the op amp and that additional compensation is not required.
x CL:S; IOUT:S; ±500 rnA
Hardware: In order to utilize the full drive capabilities of both
devices, each should be mounted with a heat sink particularly for extended temperature operation. The cases of both
are isolated from the circuit and may be connected to system chassis.
In addition, power dissipation resulting from driving capacitive loads plus standby power should be kept below the
package power rating.
P diss ;;, PDC
+ PAC
pkg.
P diss ;;' (V+ - V-) x Is
ATTENTIONI
+ PAC
Power supply bypassing is necessary to prevent oscillation
in all circuits. Low inductance ceramic disc capacitance with
the shortest practical lead lengths must be connected from
each supply lead (within % to %" of the device package) to
a ground plane. Capacitors should be two 0.1 J-LF ceramic
and one 4.7 J-LF solid tantalum capacitors in parallel on each
supply lead.
pkg.
PAC = {Vp_p)2 X f X
where
CL
Vp.p = Peak-to-peak output voltage swing
f = frequency
CL = Load Capacitance
Typical Applications
Coaxial Cable Driver
+15Y
2
51
"b-1
0.1 I'F
)t;;----1!-1--~......
INPUT o-"""'I'y-~
OUTPUT
50n.
TL/K/9423-9
1W CW Final Amplifier
...------+-o+30Y
lOOK
I
4.7 I'F
1--+":;'--olW@50n.
TL/K/9423-10
4-76
r:::r::
.,..o
........
.......
r.,..:::r::o
........
o
Typical Applications (Continued)
Isolation Buffer
OVERALL FEEDBACK
+15V
REACTIVE
LOAD
C
R
-15V
TL/K/9423-12
Laser Diode Transmitter
+15V
+15V
INPUT
~I---+--I
TL/K/9423-17
Guard Driver
_______ 6
IN
~_""'
__""'_-Q
OUT
•
3
TL/K/9423-18
4-77
u
C'I
~ ~National
:s......
~ Semiconductor
C'I
.....
~ LH4012/LH4012C Wideband Buffer
..J
General Description
Features
The LH4012 is a very high speed buffer designed to provide
high current drive at frequencies from DC to over 400 MHz.
The LH4012/LH4012C will provide ±200 mA into 500.
loads at slew rates of 11500 V / p.s. In addition, it exhibits
excellent phase linearity.
•
•
•
•
•
•
•
The LH4012 is intended to fulfill a wide range of buffer applications. Due to its high speed it does not degrade 'the sys-,
tem performance. Its high outp,ut current makes it adequate'
for most loads. Only a single + 10V supply is needed for a
5 Vpp video signal.
These devices are constructed using specially selected bipolar transistors to achieve guaranteed performance specifications. The LH4012K is specified for operation from
- 55'C to + 125'C; the LH4012CK is specified from - 25'C
to + 85'C. Both devices are available in an 8-pin TO-3 package.
Internal supply bypass capacitors
Ultra fast slewing
11500 V / p.s
Wide range single or dual supply operation
Wide bandwidth
DC to 490 MHz
± 10V with 500. load
High output drive
1 deg.
Low phase non-linearity
1.2 ns
Fast rise times
Applications
•
•
•
•
High speed line drivers
Video impedance transformation
Op amp isolation buffers
Yoke driver for high resolution CRT
Schematic Diagram
LH4012
Metal Can Package (TO-3)
CASE IS GROUNDED
IN
v+
N/C
Input
Rl
v-
TLiK/9720-2
TLiK/9720-t
Top View
Case is Electrically Tied to Pins 4 and 6 (Ground)
Order Number LH4012K or LH4012CK
See NS Package Number K08A
4-78
r-
::I:
Absolute Maximum Ratings
Maximum Power Dissipation (See Curves)
Maximum Junction Temperature
Input Voltage
±200mA
±400 mA
Output Current, Continuous
Peak
Operating Temperature Range
LH4012
LH4012C
Storage Temperature Range
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V +, - V-)
40V
3W
175'C
300'C
TBD
ESD
DC Electrical Characteristics
Vs
=
± 15V, Rs
=
RL
=
500, TA
= + 25'C,
unless otherwise specified (Note 1)
LH4012
Symbol
Vos
Parameter
Conditions
Typical
Output Offset
±20
Tested
Limit
(Note 2)
±50
Design
Limit
(Note 3)
Units (Max
unless
Otherwise
Noted)
mV
±55
!:.Vos/AT
Aver. Temp. Coeffic.
of Output Offset Voltage
18
Input Bias Current
(Note 4)
Av
Voltage Gain
Av
Voltage Gain
TMIN < TA < TMAX
VIN
VIN
=
=
±10V, RL
=
",VI'C
30
1 kO
±10V
0.2
0.7
mA
0.98
0.95
V/v(Min)
0.93
0.9
V/v(Min)
0.9
CIN
Input Capacitance
ROUT
Output Impedance
Vo
Output Voltage Swing
pF
7
VOUT
=
2.3
±10V
11.4
4.5
10
0
V (Min)
9
PSRR
Power Supply
, Rejection Ratio
LSAv
Low Supply
Voltage Gain
Vs = ±5V,
VIN = ±2.5V
LSVo
Low Supply Output
Voltage Swing
Vs
=
±5V
Is
Supply Current
RL
=
00,
dB
70
Vs
0.92
V/v(Min)
0.85
3.4
=
0.85
±15V
65
2.5
75
V (Min)
mA
80
LVls
Low Voltage
Supply Current
Vs
=
PD
Power Consumption
RL
PD
Power Consumption
RL
=
=
±5V
00,
Vs
00,
Vs
=
=
N
r-
::I:
- 55'C to + 125'C
- 25'C to + 85'C
-65'C to + 150'C
Lead Temperature (Soldering, 10 sec.)
IVOUT ±VINI<3V
""o......
21
30
mA
±15V
1.95
2.25
W
±5.0V
'0.21
0.3
W
""......o
N
o
oN
.,...
o
..,.
:J:
....I
........
DC Electrical Characteristics
Vs
=
± 15V, Rs
=
RL
=
50n, TA
= + 25'C,
unless otherwise specified (Note 1)
LH4012C
N
.,...
..,.
o
Symbol
Parameter
Conditions
:J:
Typical
Tested
Limit
(Note 2)
±20
±50
....I
Vas
Output Offset
AVas/!;.T
Aver. Temp. Coeffic.
of Output Offset Voltage
TMIN
< TA:< TMAX
Is
Input Bias Current (Note 4)
Av
Voltage Gain
VIN
Av
Voltage Gain
VIN
CIN
Input Capacitance
ROUT
Output Impedance
Vo
Output Voltage Swing
PSRR
Power Supply
Rejection Ratio
LSAv
Low Supply
Voltage Gain
Vs = ±5V,
VIN = ±2.5V
LSVo
Low Supply Output
Voltage Swing
Vs
=
Is
Supply Current
RL
LVls
Low Voltage
Supply Current
Vs
=
=
PD
Power Consumption
RL
PD
Power Consumption
Vs
=
=
± 10V, RL
=
Design
Limit
(Note 3)
mV
30
1 kn
±10V
",VI'C
0.2
0.7
mA
0.98
0.95
V/v(Min)
0.93
0.9
V/v(Min)
pF
7
VOUT
=
2.3
4.5
n
11.4
10
V (Min)
±10V
db (Min)
70
AC Electrical Characteristics
0.92
0.85
V/v(Min)
3.4
2.5
V (Min)
65
75
mA
21
30
mA
1.95
2.25
W
0.~1
0.3
W
±5V
00,
Vs
=
±15V
±5V
=
=
oo,Vs
=
TJ
= + 25'C, Vs =
±15V
±5.0V
± 15V, Rs
=
50n, RL
=
50n (Note 5)
LH4012/LH4012C
Symbol
Parameter
Conditions
SR
Slew Rate
VIN
=
20Vp_p
SSBW
Small Signal
Bandwidth
VIN
=
0.223 Vrms
PBW
Power Bandwidth
RL
Typical
Tested
Limit
(Note 2)
11500
Phase Non-Linearity
= 50n, VIN = 10 Vp_p
BW = 1.0 MHzto 100 MHz
Rise Time
VIN
=
20 Vp_p, t f
Propagation Delay
VIN
=
20Vp_p
Harmonic Distortion
VIN = 10 Vp_p
f = 100MHz
=
500 ps
Units (Max
unless
Otherwise
. Noted)
Design
Limit
(Note 3)
Units (Max
unless
Otherwise
Noted)
V/",s
460
400
MHz (Min)
230
200
MHz
1
Degrees
1.2
ns
1
ns
0.5
%
Note 1: Boldface limits are guaranteed over full temperature range. Operating ambient temperature range of LH4012C is - 25°C to + 85°C, and LH4012 is -55"C
to + 125°C.
Note 2: Tested limits are guaranteed and 100% production tested.
Note 3: Design limits are guaranteed (but not production tested) over the indicated temperature or temperature range. These limits are not used to calculate
outgoing quality level.
Note 4: Specifications is at 25"C junction temperature due to requirements of high speed automatic testing. Actual values at operating temperature will exceed
value atTJ ~ 25"C.
Note 5: For test circuits see Figures 1, 2.
I
I
4-80
r
::J:
Typical Performance Characteristics
"'"
c
......
N
Power Dissipation
vs Temperature
1
..........
...........
'JA =50· c/W
..........
1
o
o
-r-
r--....
75
100
125
150
r-- r--
"-
Output Offset Voltage
vs Temperature
V.NfG.
,/
100
t--
I
~
Vs=t5V
RL =5011
1
2
so
so
-50
150
N
(')
1
r-- t -
r--
1
100
150
Temperatura (Oe)
Temperature (OC)
1 dB Compression
vs Frequency
Input Bias Current
vs Temperature
-20
"'"
c
......
i-":
!A"/
f' . /
1
1
N1EG.
-50
Temperature (OC)
-200
1
-180
RL =5011
!
~=::
Vs=t15V
m
-
-10
~
.....
~
,/
c3
~
I--"'"
"!>
~
0
"[
.5
'\.
Vc=t15V
-120
50
~
I
I'-..
-50
100
50
Temperature (OC)
20
30
I"'-..
20
-
o
+-G
-2
-4 r-Rs=RL =500
-6
f-Vs =tI5V
01-+
0
10
100
1000
Rise Time
Rs=RL =5011
- -i--ol-
Vs=t15V
""
-10
"!>
Frequency (MHz)
Phase vs Frequency
I'
~
"[
III
III
10
100
6.3
-RL =5011
:-Vs=tI5V
Temperature (OC)
Gain and Phase
vs Frequency
~
m
"I, "-
-100
-80
-60
-40
o
-so
o
1
3
V1N=OV
-20
o
~ -~
~
1
'_1-"'"
1
1
r- I- phs.
p6s.
10
so
25
RL =5011
"" "'-~
1
I
_~s=tI5V
'JC = 25· c/W
A~BIENT
r
::J:
4
12
CASE
j
Output Voltage Swing
vs Temperature
Output Voltage Swing
vs Temperature
6
/
r....
RS=RL =5011
VS=tI5V
"
-30
10
100
1000
40
20
Frequency (~Hz)
60
80
Frequency (MHz)
I-~
-
-~--
100
n~E
(500 p./dlv.)
•
Fall Time
-
1'-<;;-
-
1\
-~--~Rs=RL =5011
\
,
Vs=t15V
TIME (500 ps/div.)
TLlK/9720-3
4-81
Typical S Parameters Vs =
f
±15V, RL = Rs = 50n·
S11
S21
S12
S22
MHz
Mag
Ang
dB
Ang
dB
Ang
Mag
Ang
10
100
250
500
0.99
0.99
1.0
0.80
-3
-26
-82
-170
5.27
5.20
5.15
1.20
-3.7
-33
-94
-182
-60
-32
-14
-10
54
129
69
-22
0.87
0.92
0.94
0.60
176
167
138
96
Small Signal Bandwidth Test Circuit
Network Analyzer
HP8753A
R
RF
B
TLiK/9720-4
FIGURE 1. Sma" Signal Bandwidth Test Circuit
Power Bandwidth Test Circuit
Network Analyzer
HP8753A
AnENUATOR
RF
R
B
20dB
1 GHz Power
Amplifier
Mlnlclrcult.
No. ZHL-2-8
FIGURE 2. Power Bandwidth Test Circuit
4-82
TL/K/9720-5
r-
:::E:
Application Information
""......
CI
LAYOUT: Breadboards should have a solid ground plane
and short point-to-point wiring. Do not use wire wrap boards
or techniques. PC boards should have short connections
and as much ground plane as possible.
OPERATION WITHIN AN OP AMP LOOP: The device may
be used as a current booster or isolation buffer within a
closed loop with op amps such as LH0032, LM6161, or
LM118. An isolation resistor of 470 should be used between the op amp output and the input of the LH4012. The
wide bandwidth and high slew rate of the LH4012 assures
that the loop has the characteristics of the op amp and that
additional frequency compensation is not required.
It is best to have a layout without sockets, but sockets with
shortpins and receptacles do not significantly degrade the
performance.
The LH4012 has built-in 0.01 /LF power supply bypass capacitors, but additional 4.7 /LF tantalum capacitors are
needed a maximum of 1" distant from the pins.
Input and output signals should be fed by coax or microstrip
if the distances are more than a few inches to avoid impedance mismatches and resulting reflections. However, inside
a feedback loop all connections should be short to avoid
time delays and the associated phase shifts.
.....
rN
:::E:
""......
CI
N
o
HEATSINK: In order to utilize the full drive capabilities of
both the LH4012K or the LH4012CK, the device should be
mounted with a heatsink, particularly for extended temperature operation.
VOLTAGE SWING: Input voltage is allowed to swing between positive and negative supply voltage levels, but it
must be within ± 3V of the output voltage. If the voltage
differential from input to output is greater than ± 3V the
base-to-emitter diode of one of the input transistors will be
broken down in reverse and the transistor will be degraded
and could be destroyed.
SOURCE RESISTANCE: The LH4012 is designed to work
from a 500 or higher source impedance. If driven from a low
source impedance, especially if it is inductive, a series input
resistor is recommended that brings the source impedance
to 500, or instabilities could result.
SHORT CIRCUIT PROTECTION: In the interest of high performance the LH4012 has been deSigned without built-in
protection. The simplest protection is a series resistor in the
output. This approach has the advantage that input and output voltage of the buffer stay close together even during a
shorted load. The main disadvantage is that the output voltage swing is reduced. Accuracy is normally not a problem,
since the voltage drop across the protection resistor can be
compensated for by more gain somewhere else in the circuit. This is especially true if the buffer is used within the
feedback loop of an opamp.
CAPACITIVE LOADING: As with all buffers, capacitive
loading can lead to instabilities. This can be minimized by
redUCing the phase angle of the load with a resistor either in
series or in parallel with the capaCitor or with a combination
of both.
The charge current of the load capacitor,
dV
C Load x dT
should be considered when the load current is checked
against its absolute maximum limit.
In addition, power dissipation resulting from driving capacitive loads plus standby power should be kept below the
package power rating.
.
PAC + POC < PPkg.Oiss.
PAC = (Vpp)2 X f x Cload
POC = (V+ - V-I x Is
where VPP = output voltage swing
f = Frequency
•
4-83
~
§
Application Information
::r::
...J
......
N
(Continued)
Output Short Circuit Protection
Using a Series Resistor
,..
o
..r
Offset Adjust
.---t--+~ :::V
+15V
::r::
...J
I
o. l !'
_
-15V
10k
RP
INPUT
OUTPUT
51
RL
-15V
TLlK/9720-7
Rf
RG
TL/K/9720-6
Isolation Buffer
Coaxial Cable Driver
+15V
+15V
r
INPUT
4.7 !'
7
51
RG58
INPUTo----.!..j
'>5::----.,~~=:{:~OUTPUT
50
-15V
TL/K/9720-B
TLlK/9720-9
4-84
Application Information
.-:::J:
....o
.:::J:A
-
(Continued)
I\)
Laser Diode Transmitter
+15V
+15V
A
....o
I\)
n
TLiK/9720-12
VHF Power Oscillator 100 MHz 1W
+15V
01
>5_....---o0UTPUT
n
'""')!
RL
50.(1
PF
,~
02
0I,02 ... IN914
-15V
15pF
I
6PF
TLiK/9720-11
4-85
o ,------------------------------------------------------------------,
~ J?A National
~ ~ Semiconductor
o
CO)
§ LH4033C/LH4063C Fast and
:s
Ultra Fast Buffer Amplifiers
General Description
Features
The LH4033C and LH4063C are high speed, FET input,
voltage follower/buffers designed to provide high current
drive at frequencies from DC to over 100 MHz. The
LH4033C will provide ± 10 rnA into 1 kn loads (± 100 rnA
peak) at slew rates of 1500 VI ",s. The LH4063C will provide
±250 rnA into 50n loads (±500 rnA peak) at slew rates of
up to 6000 V/",s. In addition, both exhibit excellent phase
linearity up to 20 MHz.
Both are intended to fulfill a wide range of buffer applications such as high speed line drivers, video impedance
transformation, nuclear instrumentation amplifiers, op amp
isolation buffer for driving reactive loads and high impedance input buffers for high speed ADCs and comparators. In
addition, the LH4063C can continuously drive 50n coaxial
cables or be used as a diddle yoke driver for high resolution
CRT displays. For additional applications information, see
AN-48.
These devices are constructed using specially selected
junction FETs and active laser trimming to achieve guaranteed performance specifications. The LH4033C and
LH4063C are specified from -25·C to + 85·C. The
LH4033C is available in a 16-pin plastic DIP. The LH4063C
is available in an 11-lead TO-220 package.
•
•
•
•
•
•
•
•
6000 V/",s
Fast (LH4063)
Wide range single or dual supply operation
Wide power bandwidth
DC to 100 MHz
High output drive
± 1OV with 50n load
Low phase non-linearity
2·
Fast rise times
2 ns
High current gain
120 dB
High input resistance
1010n
Applications
•
•
•
•
•
•
High speed ATE
Coaxial cable driver
Isolation buffer
-High speed 8/H amplifier
High frequency filter
Flash AID buffer
Connection Diagrams
r-----t:=::::::Jll INPUT
o
NC
10V+
V+
9 Vc+
NC
1
•
16
2
15
3
14
NC
NC
NC
e NC
INPUT
7 NC
OFFSET ADJUST
Vc+
OUTPUT
OFFSET PRESET
NC
>;:==:J6
OUTPUT
5 NC
V-
4 Vc-
Ve-
e
NC
9
NC
3 VTL/K/10008-2
2 OFFSET ADJUST
16-Lead Molded Dual-In-Line Package
Order Number LH4033CN
See NS Package Number N16A
OFFSET PRESET
TL/K/10008-1
11-Lead TO-220
Order Number LH4063CT
See NS Package Number TA11A
4-86
r-
::I:
Absolute Maximum Ratings
~
oCo)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Peak Output Current
LH4063C
LH4033C
Supply Voltage (V + - V -)
Operating Temperature Range
LH4033C and LH4063C
40V
Maximum Power Dissipation (See Curves)
LH4063C
LH4033C
5W
1.5W
Maximum Junction Temperature
Co)
±500 rnA
±250 rnA
o
.......
r-
::I:
+ 85"C
+ 150"C
- 25"C to
Storage Temperature Range
-65"C to
Lead Temperature (Soldering, 10 sec.)
300"C
~
o
en
Co)
o
175"C
Input Voltage
±Vs
Continuous Output Current
LH4063C
LH4033C
±250mA
±100 rnA
DC Electrical Characteristics Vs
=
± 15V, T MIN ,,; TA ,,; TMAX unless otherwise specified (Note 1)
Limits
Parameter
Conditions
LH4033C
IIIUn
=
=
=
1000, TJ = 25"C, VIN
1000 (Note 2)
=
OV
Output Offset Voltage
Rs
Rs
Average Temperature Coefficient
of Offset Voltage
Rs
1000, VIN
(Note 3)
Input Bias Current
VIN
Voltage Gain
Vo
RL
=
=
OV
OV
Input Impedance
Output Impedance
Output Voltage Swing
Supply Current
Power Consumption
Max
12
20
25
mV
mV
50
100
/LVrC
500
5.0
20
pA
nA
nA
1.00
VIV
10
0
TJ = 25"C (Note 2)
T A = 25"C (Note 4)
TJ = TA = TMAX
= ± 10V, Rs = 1000,
= 1.0 kO
RL = 1 kO
VIN = ±1.0V, RL = 1.0k
VI = ±14V, RL = 1.0k
VI = ±10.5V, RL = 1000, TA =
VIN = OV (Note 5), No Load
VIN = OV (No Load)
AC Electrical Characteristics TA = 25"C, Vs =
0.96
0.98
1010
1011
6.0
0
±12
±9.0
25"C
± 15V, RS
Units
Typ
=
500, RL
=
V
V
21
24
rnA
630
720
mW
1.0 kO (Note 6)
Limits
Parameter
Conditions
Propagation Delay
= ±10V
= 1.0 Vrms
BW = 1.0 to 20 MHz
aVIN = 0.5V
aVIN = 0.5V
Harmonic Distortion
f> 1 kHz
Slew Rate
VIN
Bandwidth
VIN
Phase Non-Linearity
Rise Time
Units
LH4033C
Min
Typ
1000
1400
Max
V//Ls
100
MHz
2.0
Degrees
3.2
ns
1.5
ns
<0.1
%
Note 1: LH4033C is 100% .production tested at 25°C only. Specifications at temperature extremes are verified by sample testing. but these limits are not used to
calculate outgoing quality level.
Note 2: Specification is at 25°C junction temperature due to requirements of high speed automatic testing. Actual values at operating temperature will exceed the
value at T J = 25°C. When supply voltages are ± 15V no-load operating junction temperature may rise 40-60"C above ambient, and more under load conditions.
Accordingly, Vos may change one to several mV, and 18 will change significantly during warm-up. Refer to 18 vs. temperature graph for expected values.
I
Note 3: LH4033C is sample tested only_ Limits are not used to calculate outgoing quality levels. AVasl A T is the average value calculated from measurements at
25'C and T max.
Note 4: Measured in still air 7 minutes after. application of Power. Guaranteed through correlated automatic pulse testing.
Note 5: Guaranteed through automatic pulse testing at T J ~ 25'C.
Note 6: Not
100% production tested; verified
by sample testing only. Limits are not used to calculate outgoing quality level.
4-87
•
DC Electrical Characteristics Vs
= ± 15V, TMIN
~
TA
~
TMAX unless otherwise specified (Note 1)
Limits
Parameter
Conditions
LH4063C
Min
Output Offset Voltage
Rs
RL
~ 100 kO, TJ = 25°C
= 1000 (Note 2)
Average Temperature Coefficient
of Output Offset Voltage
Rs
~
Input Bias Current
TJ
Voltage Gain
VIN = ±10V, Rs
RL = 1.0 kO
100 kO
= 25°C (Note 2)
= 100 kO,
Input Capacitance
Case Shorted to Output
Output Impedance
Your = ± 10V, Rs ~ 100 kO
RL = 500
VIN = ±10V, Rs ~'100 kO
Vs
",vrc
30
100
nA
'nA
0.94
0.96
1.0
VIV
0.91
0.93
0.98
VIV
pF
4.0
0.2
0.25
Amps
±13
V
5.09
7.0
Vp.p
35
= ± 5.0V (Note 3)
= 00,
65
50
1.95
W
mW
500
± 15V, RL
mA
mA
1.05
= ±5.0V
AC Electrical Characteristics TJ = 25°C, Vs =
0
±10
TJ = 25°C, RL
Vs = ±15V
Vs
mV
mV
10
(Note 3)
Power Consumption
50
100
1.0
RL
Supply CUrrent
10
8.0
= 500
Vs = ±5.0V, RL = 500,
TJ = 25°C
TJ = 25°C, RL = 00, Vs = ±15V
Output Voltage Swing
Max
300
VIN = ± 10V, Rs = 100 kO,
RL = 500, TJ = 25°C
Output Current Swing
Units
Typ
= 500 (Note 4), Rs = 500
Limits
Parameter
LH4063C
Conditions
Min
Bandwidth
= 1.0kO, VIN = ±10V
VIN = ± 10V, TJ = 25°C
VIN = 1.0 Vrms
Phase Non·Linearity
BW:: 1.0 to 20 MHz
Rise Time
~VIN
Propagation Delay
~VIN
Slew Rate
RL
2000
= 0.5V
= 0.5V
Typ
Units
Max
6000
V/",s
2400
V/",s
200
MHz
2.0
Degrees
1.9
ns
2.1
ns
Harmonic Distortion
%
<0.1
Note 1: LH4063C is 100% production tested at 2S·C only. Specifications at temperature extremes are verified by sample testing, but these IimHs are not used to
calculate outgoing quality level.
Note 2: Specification is at 25°C junction temperature due to requirements of high speed automatic testing. Actual values at operating temperature will exceed the
value at TJ = 2S·C. When supply voltages are ± ISV, no·load operating iunction temperature may rise 40-60"C above ambient, and more under load conditions.
Accordingly, Vos may change one to several mV, and Ie and loS will change significantly during warm·up. Refer to Ie and los vs. temperature graph for expected
values.
Note 3: Guaranteed through correlated automatic pulse testing at TJ = 2S·C.
Note 4: Not 100% production tested; verified by sample testing only. Limits are not used to calculate outgoing quality level.
4·88
,-------------------------------------------------------------------------------------, r:::I:
.co.
Typical Performance Characteristics
o
(0)
(0)
z.s
, LH4033C Power Dissipation
LH4063C DC Safe
Operating Area
LH4063C Power Dissipation
300
CASE (BJC = 15OC/W)
~
2.0
~
1.5
~
1.0
I
0.5
"
"
o
o
25
50
75
......
......
1
o
100
125
ISO
o
25
TEMPERATURE (OC)
LH4033C Supply Current vs
Supply Voltage
]:
20
is
is
!l1
~
~
100
125
/"
./
-300
-15 -10
150
-5
0
5
10
15
LH4063C Supply Current
vs Supply Voltage
LH4033C Output Voltage
vs Supply Voltage
V
:;.:!!
~
0
>
/
I
I
16 -RL =lkll
!- Rs=100kll
14
Tc=+2SoC
12
10
/
/
/
5
/
S
L
'"'"
18
~
,/' ........TC= +25OC
VV
55
(0)
o
OUTPUT VOLTAGE (V)
60
'"u
~
75
"
V I---""
Tc=+85OC / ' . /
. /V
!l1
u
'"
50
oQ)
l-
Vs=t15V
Tc=25OC
/"
TEMPERATURE (OC)
65
21.--r--~-'--.-~r-~
]:
i'-..
.co.
\
AMBIENT (BJA = 40oC/W)
-...!.;.A= 80oC/W
r-
:::I:
L 1
L
200
f\
-
z
0
o
......
0
/
50
10
15
5
20
10
SUPPLY VOLTAGE (tV)
LH4063C Output Voltage vs
Supply Voltage
18
§
~
12
~
10
g
E
/
~ ~~~!~~
14
/
/
5
S
o
/
IL
20
10
VS=tI5V
.- RS = 5011
I RL = 1 kll
I Tc=+25OC
I
I I
V
~
-2
~
g
-4
~
-6
~
-.
Ii
,
LH4033C Positive Pulse
Response
E
~
I
I
I
""
-12
5
rb:
JF
~
I
10
15
20
10
20
SUPPLY VOLTAGE (tV)
\\
,
~
VS=!15V
Rs =5011
RL =1 kll
VIN = 1.0Vrm.
- "',
A,I--
0.8
0.6
-f
I
OA
Q.2
V
1.0
2.D
s.o
10.0
50
40
IA
\\
fREQUENCY (MHz)
10
20
VS=:l:15V
RS = 5011
RL = lk
30
25
20
1o
~
!...
,.F
:5
::l
~
~
...
!
~
~
6.0
L--
I-
4.G
50
100
Vsl=~'5~
I
:;-
t:
:!!.
...
~
TC=25OC
•
,
~
g
0
-2
-4
-6
-8
I
RL =lkll
50
100
TEMPERATURE (OC)
150
RLI=~o~-
,
-I 1 1
-10
-12
o
60
LH4063C Large Signal
Pulse Response
Ip
-50
50
40
12
10
-
2.0
30
TIME (ns)
o
20.0
0
60
LH4033C Rise and Fall
Time vs Temperature
35
1.0
30
8.0
40
~
>
••
!=0/TPUT
TIME (ns)
LH4033C Frequency
Response
0
•
-2
5
~
- --
' INPUT ~\
,
.
2
~
,..
VS=tI5V
RL=lkll RS=5011 I--Tc=+25OC
-
Ii
S
,
-- --
!
10
>
,
...--OUTPUT
-
12
~
0
~ INPUT-:
S -8
~ -10
20
15
SUPPLY VOLTAGE (tV)
LH4033C Negative Pulse
Response
/
I
I
RL =5011
16 -
15
SUPPLY VOLTAGE (tV)
~
o 1 2 3 4 5 6 7 8 9 10 1112
TIME (ns)
TLlK/l0006-3
4-89
o
C")
CD
C)
Typical Performance Characteristics
(Continued)
'Of'
::r::
.....
....I
LH4033C Input Bias Current
vs Temperature
o
C")
10
C")
C)
'Of'
::r::
....I
LH4063C Input Current
vs Temperature
~
Vs=±10Vy
1
is.
~
VS=±15~
.100
~
i
r'7
./
~
lk
~
100
__~__~~__~
25
50
75
100
125
TENPERATlJRE (OC)
~
.6
~
!::;
.4
Vs=±5V
o
0
25
75
50
100
!~
~
LH4063C Small Signal
Rise Time
1/
o
:!
~
4
6
8
W
TIME FROM POWER TlJRN-ON (MINUlIS)
10~~m
1.0
Vs=!15V.
PUSLE lISTID (TJ =25OC)II
0.1
I I I I IA I I
~
'"
__- L__L - - J__~
2
100
~
LH4033C Input Bias Current
vs Input Voltage
10'111
E1
lL-~
10
:!
FREQUENCY (MHz)
!<
is
1
125
Vs =:1:1 SV
TA=15OC
~
60
40
20
0
1000
,....
.2
10 / '
I
80
~
8OOr-r-r-,-,-,-.--.,
100
~
.8
TENPERTlJRE (OC)
LH4033C Normalized Input Bias
Current During Warm-Up
o
'~~V~SI=~±I~OV!~/~V!~
Fvs=+15V
- /'
L
220
200
180
160
140
120
100
1.0
~z
5
!l;
~1L-~
o
10k_~
~
B
. / Vs =±5V- I---
.010
~
LH4063C Frequency Response
3
4
5
6
7
\I \I \I \I
\I
108 6 4 2 0 -2-4-6-8-10
8
TIME (n.)
INPUT VOLTAGE (V)
TL/K/l0008-4
Application Hints
Recommended Layout Precautions: RF/video printed circuit board layout rules should be followed when using the
LH4033C and LH4063C since they will provide power gain
to frequencies over 100 MHz. Ground planes are recommended .and power supplies should be decoupled at each
device with low inductance capacitors.
Offset Voltage Adjustment: Both the LH4033C's and
LH4063C's offset voltages have been actively trimmed. by
laser to meet guaranteed specifications when the offset preset pin is shorted to the offset adjust pin. This pre-calibration allows the devices to be used in most DC or AC applications without individually offset nulling each device. If offset
null is desirable, it is simply obtained by leaving the offset
preset pin open and connecting a trim pot of 2000 for the
LH4033C or 1 kO for the LH4063C between the offset adjust pin and V- as illustrated in Figures 1 and 2.
INPUT
OFFSET
PRESET
(OPEN)
OFfSET
ADJUST
200.n
2
+ 15V
LH4033C 12
./ 8
OUTPUT
o--!~3
..•
0-2
~~1'
h
............-
......--o-15V
TL/K/l0008-5
FIGURE 1. Offset Zero Adjust for LH4033C
+ 15V
10
INPUTol!~,
OFFSET
PRESET
(OPEN)
OFFSET
ADJUST
o-l
LH4063C
6
OUTPUT
/4
r1". -r
-15V
TL/K/l0008-6
FIGURE 2. Offset Zero Adjust for LH4063C
4-90
,-----------------------------------------------------------------------------, r
:::t:
Application Hints (Continued)
limit techniques that retain full DC output swing are shown in
Figures 5, 6 and 7. In Figures 5 and 6, the current sources
are saturated during normal operation thus apply full supply
voltage to the VC pins. Under fault conditions, the voltage
decreases as required by the overload. For Figure 5:
Operation from Single or Asymmetrical Power Supplies:
Both device types may be readily used in applications where
symmetrical supplies are unavailable or not desirable. A typical application might be an interface to a MOS shift register
where V+ = + 5V and V- = -12V. In this case, an apparent output offset occurs due to the device's voltage gain of
less than unity. This additional output offset error may be
predicted by:
AVo'" (1 - Av)
VSE
0.6V
RUM = = - - - = 100
Isc
60 rnA
In Figure 6, quad transistor arrays are used to minimize part
count and:
(V+ - V-I
2
= 0.005 (V+ - V-I
where:
Av = No load voltage gain, typically 0.99
V+ = Positive supply voltage
V- = Negative suply voltage
RUM
=
VSE
1/3 (Iscl
=
0.6V
1/3 (200 rnA)
=
""o
Co)
Co)
o
......
r
:::t:
""oen
Co)
o
8.20
V+= +15V
For the above example, AVo would be -35 mY. This may
be adjusted to zero by offset voltage adjustment described
earlier. For AC coupled applications, no additional offset occurs if the DC input is properly biased as illustrated in the
"typical applications" section.
Short Circuit Protection: In order to optimize transient response and output swing, output current limit has been
omitted from the LH4033 and LH4063. Short circuit protection may be added by inserting appropriate value resistors
between V+ and Vc+ pins and V- and Vc- pins as illustrated in Figures 3 and 4. Resistor values may be predicted
by:
V+
VRLIM '" - - = - Isc
Isc
Isc ,;; 100 rnA for LH4033C
where:
Isc ,;; 250 rnA for LH4063C
INPUT
v- = -15V
TL/K/10008-8
FIGURE 4. LH4063C Using Resistor Current Limiting
y+
INPUT
>---+----0 OUTPUT
0.01 ).If
Ql = Q2 = 2N2905
Q3 =Q4 = 2N2219
TLlK/10008-7
FIGURE 3. LH4033C Using Resistor Current Limiting
The inclusion of limiting resistors in the collectors of the
output transistors reduces output voltage swing. Decoupling
Vc+ and Vc- pins with capacitors to ground will retain full
output swing for transient pulses. Alternate active current
.....-o-15V
L....,~---
TLlK/10008-9
FIGURE 5. LH4033C Current Limiting
Using Current Sources
4-91
•
o ,----------------------------------------------------------------------,
CO)
CD
C
Application Hints (Continued)
'o:t
Operation Within an Op Amp Loop: Both devices may be
used as a current booster or isolation buffer within a closed
loop with op amps such as LH0032, LH0062, or LM118. An
isolation resistor of 47.n should be used between the op
amp output and the input of LH4033C. The wide bandwidths
and high slew rates of the LH4033C and LH4063C assure
that the loop has the characteristics of the op amp and that
additional rolloff is not required.
::J:
..J
o
CO)
CO)
C
'o:t
::J:
..J
> : . - - - - - - - I f - - - ( ) OUTPUT
INPUT
Hardware: In order to utilize the full drive capabilities of
both devices, each should be mounted with a heat sink particularly for extended temperature operation.
DESIGN PRECAUTION
Power supply bypassing is necessary to prevent oscillation
with both the LH4033C and LH4063C in all circuits. Low
inductance ceramic disc capacitors with the shortest practical lead lengths must be connected from each supply lead
(within < %" to '12" of the device package) to a ground
plane. Capacitors should be one or two 0.1 /LF in parallel for
the LH4033C; adding a 4.7 /LF solid tantalum capacitor will
help in troublesome instances. For the LH4063C, two
0.1 /LF ceramic and one 4.7 /LF solid tantalum capacitors in
parallel will be necessary on each supply lead.
TLlK/10008-10
FIGURE 6. LH4063C Current Limiting
Using Current Sources
Capacitance Loading: Both the LH4033C and LH4063C
are designed to drive capacitive loads such as coaxial cables in excess of several thousand picofarads without susceptibility to oscillation. However, peak current resulting
from (CdV/dt) should be limited below absolute maximum
peak current ratings for the devices.
Schematic Diagrams
LH4033C
2 yt
Thus for the LH4033C:
(A~!N)
"
X
CL ,;; lOUT';; ±250 mA
and for the LH4063C:
(A~!N)
) NORMALLY
SHORTED
/
X
CL ,;; lOUT';; ±500 mA
In addition, power dissipation resulting from driving capacitive loads plus standby power should be kept below total
package power rating:
Pdiss:<: PDC
pkg
+ PAC
:<: (V+ - V-) X IS
OUTPUT
+ PAC
PAC'" (Vp_p)2 X f X CL
where
Vp_p = Peak-to-peak output voltage swing
f = Frequency
CL = Load Capacitance
R2
50 7
5
OFFSET
ADJUST
6
I NORMALLY
SHORTED
I
v-
OFFSET
PRESET
NORMALLY
SHORTED
TL/K/10008-11
4·92
Schematic Diagrams
(Continued)
LH4063C
"
) NORI.IALLY
SHORTED
/
R9
INPur C)!'11!...vvv---+
+----<~_o OUTPur
RB
NORMALLY
SHORTED
TUK/1000B-12
Typical Applications
High Speed Automatic Test Equipment
Forcing Function Generator
r------------"1
~-~'-_,
I
I
I
LOGIC "1"
THRESHOLD
:,....1+---+....,
I
I
I
I
I10
V~Ef2
Al.ll000
_ _ _ _ _ _ _ _ _ _ _ _ 01I
.------------.
~-~'-t1~~~,
~
I
LOGIC "2"
THRESHOLD
1K
I
I
I
DH0034
·l--~---!10·
25V
+5V
TLlK/1000B-13
4-93
•
o
CO)
:g
Typical Applications (Continued)
"'=I'
:5
Gamma Ray Pulse Integrator
.....
o
CO)
CO)
o
"'=I'
:::E:
...I
-'5V
'M
'M
,.
.......
AH50U
-----------.
:
I+-t-o ~ET
----!
RAY
I
I -_ _..L.-o
_, KV
TL/K/l000B-14
Nuclear Particle Detector
High Input Impedance AC Coupled Amplifier
Hal
V'
PAR1ItlI:
,",SOY
LARGE AREA
SIUCON DIODrE- - . - - - - o.• '5V
SHIELD
.00'
,.r
INPUTo-j
It::io:f:l-..,
~:....:'~2p-O'OUTPUT
1M
,.
......~---<)-15V
TUK/l000B-15
fH > 100 MHz
Isolation Buffer
TLlK11000B-16
Coaxial Cable Driver
OVERALL FrEDBACK
+t5V
4'7~
+15V
REACTIVE
C LOAD
-15V
TL/KI1 000B-17
TUKI1000B-1B
4-94
.-----------------------------------------------------------------------------or
Typical Applications
....
::I:
(Continued)
CI
W
W
Coaxial Cable Driver
....or
v+
....
::I:
CI
Q)
W
o
51
INPUT C>-'W""';::..j
'Select Cl For Optimum Pulse Response.
TL/K/l0008-19
1W CW Final Amplifier
. - - - -.....-0 +30V
I
2W
9 6
4•7 1'F
~IW1l501l
,-- 1
TL/K/l0008-20
High Input Impedance Comparator
With Offset Adjust
Instrumentation Shield/Line Driver
,,
VU•L•
100
-W_'
51
12
INPUTo-......
INPUT
100
OFFSET
ADJ.
NO GO
y-
= LOGIC "I"
TUK/l0008-22
TL/K/l0008-21
Single Supply AC Amplifier
4.5 MHz Notch Filter
Vee = 12.0V
y+
1M
12
O.OOII'F
INPUTo--!t-t--"I
1
OUTPUT
10
Rl
1M
TUK/l0008-23
4·95
Rl
Rl
22011
22011
y-
= 2"R1Cl
= 2 R2
Cl=~
2
TL/K/l0008-24
~
..,.~
:s
Typical Applications
(Continued)
High Speed Sample & Hold
o
~
~
C')
C')
C)
..,.
:z:
.....
ANALOG
INPUT
>,---0 OUTPUT
yS.OV
r .~O
l'---,
LOGIC 1
INPUT 2
1/2DH0034
L
.1- - ;p
-
*Polycarbonate or Teflon
.J
yTL/K/l0008-25
4-96
ris:
....o
~National
N
~ Semiconductor
........
lM102/lM302 Voltage Followers
N
ris:
eN
o
General Description
The LM102 series are high-gain operational amplifiers designed specifically for unity-gain voltage follower applications. Built on a single silicon chip, the devices incorporate
advanced processing techniques to obtain very low input
current and high input impedance. Further, the input transistors are operated at zero collector-base voltage to virtually
eliminate high temperature leakage currents. It can therefore be operated in a temperature stabilized component
oven to get extremely low input currents and low offset voltage drift.
The LM102, which is designed to operate with supply voltages between ± 12V and ± 15V, also features low input
capacitance as well as excellent small signal and large signal frequency response-all of which minimize high fre-
quency gain error. Because of the low wiring capacitances
inherent in monolithic construction, this fast operation can
be realized without increasing power consumption.
Features
II Fast slewing - 10V/).Ls
.. Low input current - 10 nA (max)
II High input resistance 10,000 MU
II No external frequency compensation required
II Simple offset balancing with optional 1K potentiometer
III Plug-in replacement for both the LM101 and LM709 in
voltage follower applications
Schematic Diagram
(II
('1
BALANCE
....v. (71
r---+-~R-'-41P--R-.-+----------~~~
SOD
SOD
H.-"",..,......- ..
--OUTPUT (61
. .----BOOSTER (61
L...--4I.....----.-----4I.----------4I.-----v.
4-97
(41
TL/H/7753-1
Absolute Maximum Ratings
Operating Free Air Temperature Range
-55·C to + 125·C
LM102
O·Cto +70·C
LM302
-65·Cto + 150·C
Storage Temperature Range
300·C
Lead Temperature (Soldering, 10 sec.)
ESD rating to be determined.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 6)
±18V
Supply Voltage
Power Dissipation (Note 1)
500mW
Input Voltage (Note 2)
±15V
Output Short Circuit Duration (Note 3)
Indefinite
Electrical Characteristics (Note 4)
Parameter
Min
= 25·C
= 25·C
TA = 25·C
LM302
LM102
Conditions
Typ
Max
Min
Type
Units
Max
Input Offset Voltage
TA
2
5
5
15
mV
Input Bias Current
TA
3
10
10
30
nA
Input Resistance
1010
1012
Input Capacitance
3.0
Large Signal Voltage
Gain
TA = 25·C, Vs ±15V,
VOUT = ± 10V, RL = 8 kG
Output Resistance
TA
Supply Current
TA
0.999
= 25·C
= 25·C
0.9996
Large Signal Voltage
Gain
Output Voltage
Swing
Supply Current
0.9985
1012
G
3.0
pF
0.9995
2.5
0.8
2.5
G
5.5
3.5
5.5
mA
20
mV
20
6
= TAMAX
= TAMIN
Vs = ±15V, Your = ±10V,
RL = 10 kG
Vs = ± 15V, RL = 10 kG
(Note 5)
TA
VIV
3.5
7.5
3
30
TA
TA
1.0
0.8
Input Offset Voltage
Offset Voltage
Temperature Drift
Input Bias Current
109
3.0
20
10
100
p.V/·C
15
50
nA
nA
0.999
±10
= 125·C
±10
2.6
4.0
V
mA
Supply Voltage
±12V,;; Vs';; ±15V
60
dB
60
Rejection Ratio
Note 1: The maximum junction temperature of the LM102 is IS0'C. while that of the LM302 is BS'C. For operating at elevated temperatures. devices in the HOB
package must be derated based on a thermal resistance of ISfY'C/W, junction to ambient, or 2fY'C/W, junction to case.
Note 2: For supply voltages less than ± ISV, the absolute maximum input voltage is equal to the supply voltage.
Note 3: It is necessary to insert a resistor (at least 5k and preferably 10k) in series with the input pin when the amplifier is driven from low impedance sources to
prevent damage when the output is shorted and to ensure stability.
Note 4: These spec~ications apply for ±12V ,;; Vs ,;; ±ISVand -SS'C ,;; TA ,;; 12S'C for the LM102 and O'C ,;;TA ,;; 7fY'C for the LM302 unless otherwise
specified.
Note 5: Increased output swing under load can be obtained by connecting an external resistor between the booster and V- terminals. See curve.
Note 6: Refer to RETS102X for the LM102H military specifications.
APPLICATION HINT
The input must be driven from a source impedance of typically 10 kG (5 kG Min) to maintain stability. The total source
impedance will be reduced at high frequencies if there is stray capaCitance at the input pin. In these cases, a 10 kG resistor
should be inserted in series with the input, physically close to the input pin to minimize the stray capacitance and prevent
oscillation.
4-98
Guaranteed Performance Characteristics LM102
Input Current
Output Swing
100
Supply Current
8
5
Vs " !15V
VOUTs !IOV
'"
"
0
=>
z
,
MAXIMUM
10
-&3 -35 -15
,.~~~
5
rj ..
,
TYPICAL
-~
-"- .. -- .......
~
~
T~P1C~l
" ."
0 ..
'-~'fP\Cp,.\.
~
rr
1
0
-55-35-15 -5
5 25 45 65 85 105 125
TEMPERATURE I CI
MlxIM~M
"""i--J.
~
0
-55 -35 -15
25456585105125
TEMPERATURE I C)
5
25 45
65
85 105125
TEMPERATURE '·CI
TLlH/77S3-7
Typical Performance Characteristics
Voltage Gain and Phase Lag
o.gggg
Voltage Gain and Phase Lag
0.01
~
~
~
I:;
.,
'"~
!!!
=
'"z~
w
'"
~
II·
-5
-10
-=
10
lOOk
1M
-15
-20
> -25
f-
-30
T.:25"&..II
-40
lOOk
o
3D
~
~
1.0
1.
~
-.
-- -
~
100M
;X':_- '--
;'_~ ;,L
~,-l~'~- c-
5
4D
~
~
10K
1M
lOOK
FREauENCY IHzl
Large Signal Frequency Response
12
lD
~
~
~20~~~=1--r-+-~
TEMPERATURE ( CI
Maximum Power Dissipation
I II
"
FD6666
·5
-lD
I-'
~,.'.,L
III
WITH CLAMP
_DIODE
~D~Kc-~~~~l~OD~KC-~~~~'M
i50P.~~~~r-+-1-~~~
In
Large Signal Pulse Response
15
DISTORTION· .5'
'-
~
LOAD CURRENT ImAI
" F;f;;j~ilTflr-:-DITlTm
Vs= !15V
I---+-++-Hf-I++ Til = 25 C
Output Swing
,\
o
o
LOAD CURRENT ImAI
FREQUENCY IHtJ
In
T" = 125e e_
T."25"C ....
TA :-5SoC
Vs= -15V
As ~ 10K
:.
n
2D
i
~
1
10M
-lD
>
- ::: -- -- ~= :lO n
- .nlD
45
-
:!l 10 r-
111111111
1M
...
Vs; °1!iV
0
o
I:;
~
Negative Output Swing
-15
B!-
135
Vs: ,\;U'II IRs: 30 kn
Positive Output Swing
---
~
90
J! IWIIl
PHASE
~1,:,~ kil·.t>It!11I
:::
180
f:: ~~! "~V I
FREQUENCY IHzl
5
.
225
nil
Rs: 10 knJ,
FREQUENCY 1Hz)
~
210
Rs '"
-35
O.g " - " _......
1k
10k
Output Resistance
100
,
10
:c
0.1
LM102
T",=25C
~
I~
300
"
\
200
-~
10
TlMEt,..s)
I"'-
.,
>
r-
-25
-30
Vs'
T.·
-35
10
0.9
lk
10k
lOOk
-40
'OOk
1M
21.
=3kU
PHASE -' :
190
'"
~
135
l;
225
Rs·'0kn.J,
-20
Output Resistance
100
90
1111111
45
Rs'3kn-~
~
i
".
1111
VI
I.
~
'15V
TA ·25 C
~
0
0
",;;'11
IRs' 3D kn
25"C,,1I
1M
I 11111111
'OM
100M
O. 1
FREQUENCY 1Hz)
Positive Output Swing
FREQUENCY IHzI
Negative Output Swing
lOr-,r-r-r.,...,.....;'-r-1r-r-r"'T""'1
-lO
,,-r-..-..-r-r-r-r-rr-.
Output Swing
10
VOUT • t1DV
Vs -±15V
VI'" t15V
HH-F~r-l-H-T" =25°C
i~ID~Em~§3§
t:::t:
:;
i
Or-- R,,--
I
R54 -.n
5H-+~~+-~~~~~
o -
0~.~~~1~.~,~.~~1.~~2~5~3.
O~.~~~~2~~J~~4~~
LOAD CURRENT ImAI
Large Signal
Frequency Response
15
Vs = dSV
1.
TA = 25~ooooo4t- OUTPUT
RI
24K
·Values are for 10kHz cutoff. Use silvered mica capacitors for good temperature stability.
TUH/7753-3
Sample and Hold with Offset Adjustment
>.:......,j~OUTPUT
INPUT
t
*Polycarbonate-dielectric capacitor.
TL/H/7753-4
High Pass Active Filter
>~""""4I1- OUTPUT
R2
"OK
·Values arB for 100 Hz cutoff. Use
metalized polycarbonate capacitors
for good temparature stability.
TUH17753-5
High Input Impedance AC Amplifier
•
>;;.....~..-OUTPUT
TLlH/7753-6
4·101
~
Q
C")
::::!i
r----------------------------------------------------------------------------,
Connection Diagram
...I
Metal Can Package
Top View
~
Q
..-
::::!i
...I
NO CONNECTION
TLlH/7753-2
Order Number LM102H or LM302H
. See NS Package Number HOSC
4-102
r--------------------------------------------------------------------------------,
~National
~ Semiconductor
r-
...s::...
~
r-
s::
...
N
o
LM110/LM210/LM310 Voltage Follower
"-
r-
s::
...o
Cot)
General Description
The LM110 series are monolithic operational amplifiers internally connected as unity-gain non-inverting amplifiers.
They use super-gain transistors in the input stage to get low
bias current without sacrificing speed. Directly interchangeable with 101, 741 and 709 in voltage follower applications,
these devices have internal frequency compensation and
provision for offset balancing.
ing lower offset voltage, drift, bias current and noise in addition to higher speed and wider operating voltage range ..
The LM110 is specified over a temperature range -55'C :5:
TA:5: + 125'C, the LM210 from -25'C:5: TA :5: + 85'C and
the LM310 from O'C :5: TA :5: + 70'C.
The LM110 series are useful in fast sample and hold circuits, active filters, or as general-purpose buffers. Further,
the frequency response is sufficiently better than standard
IC amplifiers that the followers can be included in the feedback loop without introducing instability. They are plug-in
replacements for the LM102 series voltage followers, offer-
•
•
•
•
Features
10 nA max over temperature
20 MHz
30 V/p.s
±5Vto ±18V
Input current
Small signal bandwidth
Slew rate
Supply voltage range
Schematic Diagram
BALANCE
(1)
(8)
'---+--=R-=-1~~R'-+----------------------<-"""
500
v,
(7)
500
R2
1K
R3
1K
1-.....""""---4---
INPUT (3) -+---I---+~
OUTPUT (6)
Q14
BOOSTER (5)
R13
R12
R11
3K
1.5K
200
' - - - < - - - - -.....- - - - - - - - - -.....- - - - - - - - - - - - - -.....- - - - -
4-103
v- (4)
TUH/7761-1
....
C)
CO)
:i
....I
.....
....
C)
N
:i
....I
.....
....
....
C)
:!!
....I
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 6)
Lead Temperature (Soldering, 10 sec.)
Power Dissipation (Note 1)
500mW
Input Voltage (Note 2)
±15V
Output Short Circuit Duration (Note 3)
Operating Temperature Range
LMll0
LM210
LM310
260'C
Soldering Information
Dual-In-Line Package
Soldering (10 sec.)
Small Outline Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
±18V
Supply Voltage
-65'Cto + 150'C
Storage Temperature Range
Indefinite
260'C
215'C
220'C
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
-55'Cto +125'C
- 25'C to + 85'C
O'Cto +70'C
ESD rating to be determined.
Electrical Characteristics (Note 4)
Parameter
LM210
LMll0
Conditions
Min
Typ
Max
Min
Typ
LM310
Max
Min
Typ
Units
Max
Input Offset Voltage
TA = 25'C
1.5
4.0
1.5
4.0
2.5
7.5
mV
Input Bias Current
TA = 25'C
1.0
3.0
1.0
3.0
2.0
7.0
nA
Input Resistance
TA = 25'C
1010
Input Capacitance
TA = 25'C, Vs = ±15V
VOUT= ±10V,RL=8ko'
Output Resistance
TA = 25'C
0.999
TA = 25'C
3.9
-55'C:5: TA:5: +85'C
+85:5: TA:5: 125'C
O'C:5: TA :5: +70'C
6
12
Input Offset Voltage
Offset Voltage
Temperature Drift
0.999
0.9999
0.75
1012
0.9999
Vs = ±15V, RL = 10kO,
Supply Current
TA = 125'C
Supply Voltage
Rejection Ratio
±5V:5: Vs:5: ±18V
pF
0.9999
VIV
0.75
2.5
0.75
2.5
0,
5.5
3.9
5.5
3.9
5.5
mA
6.0
10
10
mV
p.VI'C
p.VI'C
p.VI'C
6
10
Output Voltage
Swing (Note 5)
0,
1.5
10
Input Bias Current
Vs = ±15V, VOUT = ±10V
RL = 10kO,
0.999
1012
2.5
6.0
Large Signal Voltage
Gain
1010
1.5
1.5
Large Signal Voltage
Gain
Supply Current
1010
1012
10
nA
0.999
0.999
0.999
VIV
±10
±10
±10
V
2.0
70
80
4.0
2.0
70
80
mA
4.0
70
80
dB
Note 1: The maximum junction temperature of the LMll0 is ISO"C. of the LM210 is 100"C, and of the LM310 is 8S'C. For operating at elevated temperatures,
devices in the H08 package must be derated based on a thermal resistance of 16S'C/W, junction to ambient, or 2Z'C/W, junction to case. The thermal resisiance
of the dual·in-line package is 100'C/W, junction to ambient.
Note 2: For supply voltages less than ±ISV, the absolute maximum input voltage is equal to the supply voltage.
Note 3: Continuous short circuit for the LMll 0 and LM210 is allowed for case temperatures to 12S'C and ambient temperatures to 70"C, and for the LM31 0, 70"C
case temperature or 55"C ambient temperature. It is necessary to insert a resistor greater than 2 kO in series with the input when the amplifier is driven from low
impedance sources to prevent damage when the output is shorted. RS = 5k min, 10k typical is recommended for dynamic stability in all applications.
Note 4: These specifications apply for ±SV ,;; Vs ,;; ±18Vand -SS'C ,;; TA 12S'Cforthe LMll0, -2S'C';; TA ,;; 8S'Cforthe LM210, and O'C ,;; TA ,;; 70"Cfor
the LM310 unless otherwise specified.
Note 5: Increased output swing under load can be obtained by connecting an extemal resistor between the booster and V- terminals. See curve.
Note 6: Refer to RETSll0X for LMll0H, LMll0J military specifications.
Application Hint
The input must be driven from a source impedance of typically 10 ko' (5 ko' min.) to maintain stability. The total source
impedance will be reduced at high frequencies if there is stray capacitance at the input pin. In these cases, a 10 ko' resistor
should be inserted in series with the input, physically close to the input pin to minimize the stray capacitance and prevent
oscillation.
4-104
.-s::
.....
.....
Typical Performance Characteristics (LM11 0/LM21 0)
Input Current
Output Noise Voltage
I.
_ 'DOO
100
~
Vo' ±15~=!
~
I
10
VS=±15~=
'"
z
..'"~
=>
..
=>
==
~
I I
0.1
-55 -35 -15
~
!E
5 25 45 15 IS 105 125
As -10K
.0
.00
1k
Voltage Gain and
Phase Lag
~
0.1
~D.999
z
~
loa.
1M
1\
.aM
>
Voltage Gain
0.99999
210
22_
-5
-'0
-15
160
135
~
-20
90
-2.
45
'"
i:l
;; ">
0.99
TIME b.lsl
~
..~ ..'"'"
~
'"
'"
~
:!!
C
-15
10'
Voltage Gain and
Phase Lag
10
0.9999 r-rTTTTmr'TTTmnr-rTTT11nT1 0.01
~
-5
FREQUENCY IH,I
TEMPERATURE (DC)
Co)
.....
Vs'" t15V
fA" 25"&
-'0
1
ID
1\
..~
:::s.: ~R"'00K
~
......
~
~~
~
~ 100
1.0
10
T.=25"C_
~
C
.....
.s::
N
.....
C
.-.....s::
Large Signal Pulse
Response
-3~
~.,,10'
':zZOOH, -
"~ ~z
~
> Cco 0,9999
'"
I
..
~
-
Vs" ±15V
~
r-.
vJ -,Jv
>
-35
D."
1.
10
100.
10'
0.999
-55 -35 -'5
-40
1M
1M
100'
FREQUENCY IH.I
lDOM
10M
Output Resistance
Positive Output Swing
Symmetrical Output Swing
100
15
'0
~
VOUT - :tIDY
.c:
10
..
l.,.,oo ~
r-
III1t
-.5 -35
1M
100.
-1'\
i.
:>
:;
Vs"±15V
TA = zsoc
TA
o
'05125
I-- I--
55°e
....
.0
o
20
40
30
CURRENT (iliA)
Supply Current
~
10
10
&D
.!
~
50
ill
40
It:
20
.'"
iii
.
C
......
'"
.
t
'"
i'l
3D
10
~~
Vs" ±5V
~~
Vs ·:t:15V
~ ::::::~
iii
T. -25"C
Vs = ±15V
I'
FREQUENCY IH"
~
;
'"~
'"
.M
I.
T.· .25"C
10
s
"'(-'DOll
2. 45 6.
?'
go
Vs . ±15;J±ill
T. =25"C
DISTORTION < 5%
'"
10..
~
i.'"
Power Supply Rejection
.0
o
",
,/
-
TEMPERATURE (DC)
Large Signal
Frequency Response
12
•
-I'
FREQUENCY (Hd
.4
~
~
~"13D!,..
0.1
1k
,/
....... y
'"
f-~"""/ ., ~1
"c
3
~
~
r- I-~)~
~
I.Q
-
Vs = ±15V
::l
z
5 25 45 65 IS 105125
TEMPERATURE rCI
FREQUENCY IH.I
·.0
10M
100
lk
.Ok
o
'OOk
FREQUENCY (H"
1M
10M
-55 -35 -15 5 25 45 65 65 10. 12.
TEMPERATURE ("CI
TUH/7761-28
4-105
o
.,...
C")
:E
....I
......
o
.,...
Typical Performance Characteristics (LM310)
Input Current
1111
N
_1000
....I
o
.,...
.,...
:E
....I
..
.
I
i
T.-25"C_
w
~
--
1.0
V.·*'5~=
~
I V.' +15V-
10
Ie
i
15
~
:E
......
g
..
~
20304050
l1li70
!Ii
10
10
100
1k
10k
-15
lOOk
1M
10M
TIME"',)
0.1
~
~
~
i.,
w
0.99
>
Voltage Gain
0.99GG9
10
5
:l1
~a.ggg
z
~
;;;
:!!
-5
~
-10
-15
z
..
w
-
!!-
-
c
!:; -20
co
> -25
-30
Rs'
r--
~
ZZ5
3k~
180
135
90
.111111111
PHASE
Rs, :,~ kn·.l)I+If1[
v.=±15v'lI
45
'"~
~
.
" .
~
,.
~
I
~
ii
~ D.9919
/ ' I--
co
>
IRs =30k!l
I 11111111
T. = 25·c..\1
-40
1M
lOOk
Rs '" 10K
'''ZDDHz
TA - 25"C
270
R, "0knJ
-35
lDOk
a.9gg
10
Positive Output Swing
V. =±15V
"""lI
E ,.
I..
--
TA =25"C
-T.=II"C
T.=7n
o
la
..~
1.0
a.l
10k
1k
ala
III
1aak
za
3a 4a
&o&a
7a
o
aa
TEMPERATURE rCI
FREtlUENCY (HI!
12
,
~,
la
T. -25"c
DISTORTION < 5%
30
10
..
~
...it
m
:!!
;:
.
ii:
'to-1M
FREQUENCY (Hd
zo
Supply Current
5
~
lOOk
1-;
&
Vs.±15~d-@
~
a
"'i'~ I-- -
CURRENT (mA)
Large Signal
Frequency Response
14
20
15
VOUT "'±1DV
V. =±15V
I.. "
..
15
SUPPLY VOLTAGE ('VI
Symmetrical Output Swing
s
~
10
5
lDOM
10M
FREQUENCY (Hd
FREQUENCY (Hz)
Output Resistance
=zrc
~
Voltage Gain and
Phase Lag
~
\
=±1SV
-10
FREQUENCY (Hd
0.9999 '-"""'"TTTnn--rTTmnr-r-rTTl1rm 0.01
5
~
co
TA
-5
I
10
Voltage Gain and
Phase Lag
101
Vs
Rs -10K
TEMPERATURE ('C)
10k
~
w
0.1
11a
~
~ ~Rs"00K
co
10
..
.~
tor1'-;'"
lao
~
5l
..~
Large Signal Pulse
Response
Output Noise Voltage
10M
70
1
.
&0
ill
..
50
..ite
..
40
30
20
10
T. =25"&
a
·10
Vs =i:15V
'3
::::::,
V.=~ F::: F::: ~=:t15V
-
;;;;:
iii
o
100
1k
10k
lOOk
FREQUENCY (Hd
1M
10M
a
10
30 40 50 "
TEMPERATURE rC)
ZO
70
10
TUHln61-29
4-106
r
is:
.....
.....
Auxiliary Circuits
Q
Increasing Negative Swing Under Load
Offset Balancing Circuit
r
is:
Rl
lK
N
.....
Q
.-+---v·
>04.....10k
INPUT--""""_
INPUT-~""-""I
OUTPUT
Co)
.....
RZ'
5.1k
>~It--OUTPUT
E
Q
Rl > 100
vTLlH/7761-3
'" May be added to reduce internal dissipation
TLlH/7761-2
Typical Applications
Differential Input Instrumentation Amplifier
A2
IK
0.1%
R4
lOOK
0.1%
....-4--v·
INPUTS
>-oO---OUTPUT
o-"V'.,.,,~
BALANCE
~=~
Al
R2
lK
R3
R5
IK
0.1%
lOOK
0.1%
R3
Av=~
R2
TL/H/7761-4
Fast Integrator with Low Input Current
C,
Cl
RI
10 pF
5K
>-4I....-~",,-..- - - - f
III
1----4t--OUTPUT
C2
150 pF
TLlH/7761-5
4-107
C)
r---------------------------------------------------------------------------------,
CO)
:E
...I
.....
C)
Typical Applications
(Continued)
Fast Inverting Amplifier with High Input Impedance'
Cl
5 pF
N
:E
...I
.....
-C)
R2
10k
1%
:E
...I
I NPUT-"VV\,-t
>.::.tl--OUTPUT
C2
150 pF
TL/H/7761-6
Comparator for Signals of Opposite Polarity
TL/H/7761-7
Zero Crossing Detector
VOUT
TLlH/7761-9
4-108
r-
Typical Applications
s:::
.....
.....
(Continued)
o
......
Driver for AID Ladder Network
r-
s:::
+lSV
.....
I\)
o
......
rs:::
w
.....
R1
3.6K
o
R2
I.SK
1%
R3
3K
01
IN4611
6.6V
R4
2IK
1%
SV REFERENCE TD
REMAINING SWITCHES
TD LADDER
NETWORK
RB
SK
DIGITAL
SWITCH -'"\1'\11........
DRIVE
DIGITAL
SWITCH
DRIVE
TO LADDER
NETWORK
Al
SK
-~IV\I-'"
TLlH17761-8
Buffer for Analog Switch *
V'
ANALDGINPUTS
01
MM4S1
R1
4IK
ANALOG
OUTPUT
DIGITAL DRIVE
TL/H/7761-10
*Switch substrates are boot·strapped to reduce output capacitance of switch.
4-109
Q
.....
C')
:E
Typical Applications
(Continued)
...I
......
Q
Comparator for AC Coupled Signals
.....
N
:E
...I
......
Q
.....
.....
:E
...I
CI
~
10K
V ,N - - - . ....-..-."..,..,~
VOUT
RI
lOOK
TLlH/7761-11
High Input Impedance AC Amplifier
INPUT
>--4.-- OUTPUT
----i
TLlH17761-12
Comparator for AID Converter Using a Binary-Weighted Network
ANALOG
INPUT
Rl
10K
R4
aOK
R3
40K
RZ
01
IN914
ZOK
FROM SWITCHES
TO
LOGIC
TL/H17761-13
4-110
Typical Applications
(Continued)
Bilateral Current Source
I
RZ
lOOK
_ RaVIN
OUT - R1 RS
0.1%
R3=R4+R5
R1 = R2
Tl/H/7761-14
Comparator for AID Converter Using a Ladder Network
V'
R6
5K
R4
RZ
5K
5K
10K
R7
10K
FROM SWITCHES
TO
LOGIC
AI
10K
OZ
INI14
ANALOG
INPUT
TlIH/7761 -15
Sine Wave Oscillator
cz
ZODpF
1%
C3
1GOpF
I"
SINE OUTPUT
R3
lOOK
I"
RO
5.
I--",_COSINE OUTPUT
Rl
ZZOK
1%
•
C5
1S0pF
R5
RI
mK
I"
Dl
UV
02
i.3V
ZK
'0 = 10 kHz
TlIH17761-16
4-111
o.,...
CO)
:e
....I
Typical Applications (Continued)
Low Pass Active Filter
C)
.,...
Cl'
940pF
C'I
:e
....I
.....
o
.,...
.,...
:i
>--4t--DUTPUT
Rl
24k
TL/H/7761-18
·Values are for 10kHz cutoff. Use silvered mica capacitors for good temperature stability.
High Pass Active Filter
Rl
110K
Cl*
O.Of"F
INPUT
>--4t--DUTPUT
-1 ....
-t......................V\"-~
TUH/7761-19
·Values are for 100 Hz cutoff. Use metalized polycarbonate capacitors for good temperature stability.
Simulated Inductor
R2
lk
R2
L=Rl
,,~ ~,
TLlH17761-21
4-112
r-
Typical Applications
s:
......
(Continued)
......
0
.......
Adjustable Q Notch Filter
r-
s:
I\)
......
0
.......
r-
s:
Co)
......
VOUT
0
1
10 ~ 27TR1Cl
Rl
~
R2
~
2R3
Cl
~
C2
~
C3/2
Cl
270 pF
R4
~---IK50K
TL/H17761-22
Bandpass Filter
R2
lK
>:.......-OUTPUT
INPUT
TL/H17761-23
Sample and Hold
SAMPLE-----.---,
> ....
Rl
~OUTPUT
150K
INPUT-4-----'
TLlH/7761-24
fUse capacitor with polycarbonate teflon or polythylene dietetric
4-113
Typical Applications (Continued)
Buffered Reference Source
r------.-- V' =15V
RI
3.6K
RZ
7.5K
1%
01
1N4ln
>""1'-- OUTPUT
R3 :>41-.....;~
3K
TL/H/7761-25
Low Drift Sample and Hold'
INPUT
OUTPUT
tTeflon polyethylene or polycarbonate dielectric capacHor
'Worst case drift less than 3 mY/sec
TL/H17761-26
Variable Capacitance Multiplier
Rl
R2
lK
10K
R3
2K
10k
Cl
--
0.1 jtF
TL/H17761-27
4-114
,-----------------------------------------------------------------------------, r
i:
........
Connection Diagrams
Q
......
Metal Can Package
r
i:
BALANCE
N
....
Q
......
r
i:
....
Co)
Q
vTL/H/7761-30
Package is connected to Pin 4 (V-)
Top View
Order Number LM110H, LM210H or LM310H
See NS Package Number HOSC
I"~
Dual-In-Llne Package
Dual-In-Line Package
BALANCE I
BALANCE 3
12
BALANCE
NO CONNECTION 4
11
v·
10
OUTPUT
INPUT
v-
8 BALANCE
7
NC 2
INPUT 3
6 OUTPUT
V- 4
BOOSTER
v+
5 BOOSTER
TUH17761-32
Top View
TUH17761-31
Order Number LM310M or LM310N
See NS Package Number MOSA or NOSE
Top View
Order Number LM110J, LM210J or LM310J
See NS Package Number J14A
III
4-115
....
N
i
~National
~
~ Semiconductor
N
N
~ LM6121/LM6221/LM6321 High Speed Buffer
.....
....
N
....
CD
:i
...I
General Description
Features
These high speed unity gain buffers slew at 800 VI JLs and
have a small signal bandwidth of 50 MHz while driving a
500. load. They can drive ±300 mA peak and do not oscillate while driving large capacitive loads. The LM6121 family
are monolithic ICs which offer performance similar to the
LH0002 with the additional features of current limit and thermal shutdown.
•
•
•
•
•
•
•
•
•
•
These buffers are built with National's VIPTM (Vertically Integrated PNP) process which provides fast PNP transistors
that are true complements to the already fast NPN devices.
This advanced junction-isolated process delivers high
speed performance without the rieed for complex and expensive dielectric isolation.
Simplified Schematic
800 V/JLs
50 MHz
High slew rate
Wide bandwidth
Slew rate and bandwidth 100% tested
Peak output current
High input impedance
LH0002H pin compatible
No oscillations with capacitive loads
5V to ± 15V operation guaranteed
Current and thermal limiting
Fully specified to drive 500. lines
±300 mA
5 MO
Pin Configurations
8 V-'
7 VOUT
6 V+
5 V-'
TL/H/9223-2
"'Heat-sinking pins.
Order Number LM6221N or LM6321N
See NS Package Number NOSE
4 VOUT
(7)
VOUT
TLlH/9223-3
Top View
Note: Pin 6 connected to case.
Order Number LM6121H or LM6221H
See NS Package Number HOSC
TL/H/9223-1
Numbers in ( ) are for a·pin N DIP.
4-116
Absolute Maximum Ratings
r
s:
en
......
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
8JA (Note 4)
36V(±18)
Input to Output Voltage (Note 2)
Maximum Junction Temp. (Tj)
Operating Temperature Range
LM6121
LM6221
LM6321
Operating Supply Range
±7V
Input Voltage
±Vsupply
Output Short-Circuit to GND
(Note 3)
Continuous
Storage Temperature Range
- 6S·C to + 1S0·C
Lead Temperature
(Soldering, 10 seconds)
AV2
AV3
Vos
Is
Parameter
Voltage Gain 2
Conditions
RL = 1k, VIN = ±10V
RL = SOO, VIN = ± 10V
RL = 1 kO
RL = 1 kO, Rs = 10 kO
Input Resistance
Input Capacitance
Ro
Output Resistance lOUT = ±10mA
VOl
V02
Supply Current 1
Supply Current 2
Output Swing 1
Output Swing 2
RL = SOO
RL =
RL =
00
1S
1
150·C
I\)
......
Tested Design Tested Design Tested Design
Units
Limit
limit
Limit
Limit
Limit
Limit
(Note 6) (Note 7) (Note 6) (Note 7) (Note 6) (Note 7)
0.980
0.970
0.860
0.800
0.780
0.750
30
50
4
7
0.980
0.950
0.970
0.950
0.860
0.820
0.8S0
0.820
0.780
0.700
0.7S0
0.700
30
60
SO
100
mV
Max
4
7
5
7
p.A
Max
00,
3
V+ = SV
RL = 1k
RL = 1000
RL = 500
V04
Output Swing 4
RL = 500
V+ = SV (Note 8)
V± = ±SVto ±1SV
14
13.S
12.7
12
1.8
70
VIV
Min
MO
pF
5
10
18
20
16
18
13.3
13
11.S
10
11
9
1.6
1.3
60
55
4-117
I\)
I\)
r
s:
en
(,)
LM6321
LM6221
r
s:
en
......
......
-5S·C to + 125·C
-40·Cto +8S·C
O·Cto +70·C
4.75 to ±16V
S
15
Output Swing 3
Power Supply
Rejection Ratio
150·C
3.S
V03
PSSR
0.900
Ofts'"'t Voltage
RIN
IS2
0.990
RL = SOO VIN= 2Vpp
0.840
V+ = 5V (1.5 Vpp)
CIN
ISl
Typ
Voltage Gain 3
(Note 8)
Input Bias Current
4rC/W
(NoteS)
LM6121
Voltage Gain 1
H
150·C/W
±2000V
DC Electrical Characteristics
AVl
......
......
N
260·C
ESD Tolerance (Note 10)
Symbol
I\)
Package
0
Max
S
10
5
6
18
20
20
22
16
18
18
20
13.3
13
13.2
13
11.S
10
11
10
11
9
10
9
1.6
1.4
1.6
1.5
Vpp
Min
60
50
60
50
dB
Min
mA
Max
±V
Min
~
~
~
.....
r----------------------------------------------------------------------------------------------------,
AC Electrical Characteristics
(Note 5)
LM6121
LM6221
LM6321
~
N
N
Symbol
~
.....
SRl
Slew Rate 1
SR2
Slew Rate 2
Parameter
Conditions
Typ
CD
~
N
~
Design
Tested
Design
Tested
Design
Limit
Limit
Limit
Limit
Limit
Limit
(Note 6)
(Note 7)
(Note 6)
(Note 7)
(Note 6) (Note 7)
CD
~
Tested
=
VIN =
VIN
= 1 kn
±11V. RL = 50n
±11V. RL
(Note 9)
SR3
Slew Rate 3
BW
-3 dB Bandwidth
t r • t,
Rise Time
Fall Time
tpd
Propagation
Delay Time
Overshoot
= 2 V pp• RL = 50n
V+ = 5V (Note 8)
VIN = ±100mVpp
RL = 50n
CL s: 10pF
RL = 50n. CL s: 10 pF
Vo = 100mVpp
RL = 50n. CL s: 10 pF
Vo = 100mVpp
RL = 50n. CL s: 10 pF
Vo = 100mVpp
VIN
Units
1200
800
550
550
550
30
30
30
Vlp-s
Min
50
50
MHz
Min
7.0
ns
4.0
ns
10
%
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its rated operating condHions.
Note 2: During current IimH or thermaillmH. the Input current wlllincreaoe H the Input to output diHerentiai voltage exceeds 8V. For Input to output differential
voltages in excess 01 8V the Input current should be limited to ± 20 mAo
Note 3: The LM6121 series buffers contain current limit and thermal shutdown to protect against lau~ conditions.
Note 4: For.operation at elevated temperatures. these devices must be derated based on a thermal resistance 018JA and TJ max. with TJ = TA + 8JAPD. 8JC lor
the LM6121 H and LM6221 H is 17"C/W. The thermal impedance 9JA 01 the device in the N package is 47"C/W when soldered directly to a printed clrcuH board, and
the heat-sinking pins (pins 1,4,5 and 8) are connected to 2 square inches 012 oz. copper. When installed In a socket, the thermal impedance 9JA 01 the N package
is 64'C/W.
Note 5: Rs = 50n, Vs = ± 15V, unless otherwise specified. Boldface numbers apply over the operating temperature range. Numbers in standard typeface apply
at TA = 25'C. Electrical tests are performed with high-speed automated test eqUipment, so that T J = TA, unless otherwise noted.
Note 6: Guaranteed and 100% production tested.
Note 7: Guaranteed over the operating temperature range (but not 100% testad).
Note 8: The input is biased to 2.5V and VIN swings Vpp about this value. The input swing is 2 Vpp at all temperatures except lor the Av3 test at -55'C where It Is
reduced to 1.5 Vpp.
Note 9: Slew rate Is measured wHh a ± 11V input pulse and 50n source impedance at 25'C. Since voltage gain is typically 0.9 driving a 50n load, the output swing
will be approximately ± 10V. Slew rata is calculated lor transitions between ± 5V levels on both rising and falling edges. A high speed measurement is done to
minimize device heating. For slew rate versus iunction temperature see typical performance curves. The input pulse amplHude should be reduced to ± 10V lor
measurements at temperature extremes. For accurate measurements, the input slew rate should be at least 1700 VI !,S.
Note 10: The test circuit consists 01 the human body model 01 120 pF in series with 1500n.
4-118
Typical Performance Characteristics
....
3:
-........
.en
TJ = 25°C, unless otherwise specified
N
Frequency Response
Frequency Response
""
'iii'
::!!.
~
Slew Rate vs Temperature
80
RL _1
-2
'I" 64-gr
.j8
1\
I \
I
-4
52
/
-6
16
10
20
~
!z
e
~
50
100
~
1/
10
1
FREQUENCY (MHz)
Overshoot vs Capacitive Load
20
50
Co)
N
o
~
RL ==co
50
25
2D
/
../
15
10
~
/
/,\
\
-50
100
150
Large Signal Response
RL = son
15
.....
10
10
E
!!l
!:i
~
\
100
Large Signal Response
RL = 1 kn
!!l
5
-5
0
-10
S
50
JUNC110N TEMPERATURE (OC)
!:i
\
.....
Rq'SOf
FREQUENCY (MHz)
15
E
r-
700
40
55
N
900
BOD
J
-I
.....
1000
~
\
\
_i""':"'7'
-8
~
......
-;;~
II
-6
3:
.,....
RL =IK
~ 1100
L
~
~
1200
I
-4
......
1500
Y
RL =504
-2
,l o
-8
1
80
I
I
\
\
~
5
-5
0
-10
S
!'-
-15
1\
T
IJ
\
-15
o
10
100
1000
10,000
nUE (20 n./dlY)
LOAD CAPACITANCE (pF)
Supply Current
-3 dB Bandwidth
2D
]:
16
I
12
nNE (20 n./dlY)
Slew Rate
70
r-"
1400
... --
i
60
§
50
O!
40
•
2...._
TLlH/5703-15
*Increases typical common
mode slew from 7.0V I p.s to
18V1p.s
TLlH/5703-13
~
TLlH/5703-14
Note: Do Not Ground Strobe Pin.
5·7
V'
??-
C")
u..
r----------------------------------------------------------------------------------------------,
Typical Performance Characteristics
...I
Input Bias Current
vs Common Mode
......
??-
N
10.000
~T. -+25'C
u..
...I
......
???-
"ffi
...I
~
u..
Input Bias Current
vs Temperature
Vs;.t'5V
~ 1,000
a:
f-- I-100
~
1/
~
w
!:;
100
...
V
10
~
1.0
/
10
!!
f--f-v-
4.0
8.0
12
16
20
24
28
!:;
>
"...
~
ZDmV
J.O
2.0
S.OmV
"
1.0
.~
100
...">
rrr
I
4.0
V'\i a±15V
"...
~
I I
IJ '/
1 1
";;
-
"V
10
!:;
>
-
TA -25'C
l.OmV '(J
;;
.5
w
...
~~ -
V IN
50
-
..~
0.2
-
0.5
P4
1
~
20~V
J.O
I
2.0
5.0mV
l.OmV
1.0
0.8
...
!:;
>
"
5
!i
"
15 20mV
10 5.0m
5.0
I v,l
/
,A
-5.0
l.OmV
-10
...
w
!:;
0
I
~
1.0
!!
..
~
4
~ -100
jA"(j- t-
RL
0.2
!!
0.4
1601
.
w
VOUl
v'
J.O
2.0
I
Til. = _5Sc C,
0.5
0.4
"'"fi
0.3
g;
~
TA-125'C~~
t-t-~ •
0.2
~~T~'25'C
0.1
0.8
0.6
o
n
~
!ia
2°i~
-5.0
--r--
i
-15
w
~
:'\
--1--
5.0mV
-10 ~Om~
100
~
~
r-
it-
---
~
Supply Current
10
'W
C
You,
LFI11 y'
Vs= +-'5V
I I
8.0
.5
...
i5
8.0
.....
a:
a:
"
tl
i;!
v,l. 'I~V
L-
Ty25 C
50
1.0
J.O
2.0
t-....
I
I I
r--
POSITIVE AND ~
-NEGATIVE SUPPLVI2.0 -,UTT , IG
I
"r
4.0
I
POSITIVE SU",!:!.-_
...... .......OUTPUT LOW
...... ....J .,.......
4.0
I
o
~
!!
50
40
JO
OUTPUT CURRENT ImA)
§:
4.0
20
10
y'
15
10
5.0
1.0
0.6
>
Response Time for Various
Input Overdrives
~
0.5
-0.5
0.7
o
~
">
vS'''5~F
TA
-25'C
~ -100
:fl1l
Vs '"±15Y- t -
lK
lFtn
-50
10
Output Saturation Voltage
w
-50
S
'ttf:
...
;;
.5 -15
EMITTER
FOLLOWER
OUTPUT
TlME"..1
Response Time for Various
Input Overdrives
w
20
-1.0
~
VOUT
~
TIME "..)
~
JO
0.8
."
v,,,,, ~oo
w
0
~
noe
OIFFERENTlAL INPUT VOLTAGE 'mV)
.5
V OUT -
lF11I
5.0
4.0
Vs· lOY
Til.·
40
Response Time for Various
Input Overdrives
~
w
5.0
RL"'·OII
y++. 50V
TEMPERATURE I'CI
Response Time for Various
Input Overdrives
~
NORMAL OUTPUT
50
o
1.0 .....'--.1-.1-.1--'--'---'---'--'
-55 -J5 -15 5.0 25 45 65 85 105 125
INPUT COMMON MOOE VOLTAGE IVI
...
"...>
~
"
~
;;;
;;;
!!
...
~
i5
a:
.-
~
Va. "'0
~'.000
...
/
Transfer Function
60
10.000
I I I
-55 -35 -15 5.0 25 45 85 85 105 125
TEMPERATURE rC)
~
~\,~~
TA-2~':'
1 120
Iii: 'DO
IiB
80
I-~~
t::
80
A
..
4D
IIe
ill
f- tz-.r,,~
,
.
20
o
o
o
5.0
10
OUTPUT VOLTAGE IV)
15
",y,"15Y
5.0
C
.5
...
4.8
a:
i5
J.O
i;!
2.0
~
?RCUIr-CURRENT
10-7
6.0
0.6
~~
Leakage Currents
Supply Current
Output Limiting Characterj~tics
140
./
. / OUTPUT VOUT - 50Y-
1.0
10-'1
0
0
5.0
10
15
2D
SUPPLY VOLTAGE IV)
25
3D
25
41
65
85
105
125
TEMPERATURE I'C)
TL/H/5703-4
5-8
r
"T1
-
Typical Applications
-...0.
-...0.
-...0.
r
RI
20k
V· "5.0V
"T1
-
Crystal Oscillator
100 kHz Free Running Multivibrator
R5
I.Ok
v'" 5.0V
RI
lOOk
N
.....
.....
R4
2.0k
r
"T1
Co)
.....
.....
RJ
10k
~.......,......,...
SQUARE
WAVE
OUTPUT'
>.:....-.-
R2
lOOk
OUTPUT
R2
20k
RJ
50k
TL/H/S703-7
-TIL or DTL fanout of two.
TLlH/S703-3
10 Hz to 10 kHz Voltage Controlled Oscillator
Cl
1000 pFt
C2
150pF
RI
10k
5.0mV_S.OV
TRIANGULAR
>"--1.....- - - WAVE
R2
22k
OUTPUT
5.0,nV I~N:.~~ - -........----if----~M~--_C
........::.t
03
IN151
R3
330k
04
IN151
R8
20k'
-15V
SQUARE
WAVE
OUTPUT
"5V
R9
10k
III
*Adjust for symmetrical squarewave time when VIN = 5.0 mV.
RIO
"tMinimum capacitance 20 pF. Maximum frequency 50 kHz.
I Ok
RII
10k
-15V
TL/H/S703-S
5-9
.,...
.,...
~
.....
.....
.,...
.,...
Typical Applications (Continued)
Frequency Doubler
N
y'. S.Oy
RI
10k
u..
.....
.....
.,...
.,...
.,...
u..
.....
R3
INPUT---+--""':"I
S.lk R4
R6
S.lk
lOOk
r
C2
O.OI.F
1/40M7486
o
OUTPUI
RS
lOOk
Frequency range:
Inpul-5.0 kHz 10 50 kHz
Outpul-l0 kHz to 100 kHz
TLlH/5703-8
Zero Crossing Detector Driving MOS Switch
Zero Crossing Detector Driving MOS Logie
r----4~------~--v'
INPUT
TLlH/5703-9
v-· olav
Driving Ground-Referred Load
TLlH/5703-IO
Comparator and Solenoid Driver
,....----.-v'
01
IN40DI
v'_4t_tlt-~__4t___ ~~TPUT
TLlH/5703-11
-Input polarity is reversed when using pin 1 as
output
TLlH/5703-12
5-10
.-
.....
.....
.....
......
."
Typical Applications (Continued)
.."
Switching Power Amplifier
v·
N
.....
.....
......
RI
121
.-
."
.....
.....
Co)
RT
300
RZ
lOOk
v-
~----------------------------~~OU~UT
R3
lOOk
RI
11k
IN'UT~W""'.------+--""';"1
CI
G.1J.1F
02
ZN3T3S
R.
RS
U
300
RI
lZO
L.._--+---........._ ...vTLlH/5703-16
Switching Power Amplifier
v'
lOOk
•
RU
R4
RS
SID
R6
39k
R9
39k
RI
lOOt.
RI.
SID
RI
m
15k
INPUT
REFERENCE
TLlH/5703-17
5-11
~
~
r-----------------------------------------------------------------------------------------,
t:! Typical Applications (Continued)
.....
....I
~
Relay Driver with Strobe
~
~
....I
.....
~
~
~
II.
....I
INPUTS
• Absorbs inductive kickback of relay
and protects Ie from severe voltage
transients on V+ + line.
TL/H/5703-1B
Note: Do Not Ground Strobe Pin.
Positive Peak Detector
'ISV
INPUT -.-u",,_
> ........ OUTPUT
-15V
RZ
I.OM
'Solid tantalum
TUH/5703-19
Negative Peak Detector
'I~V
RZ
I.OM
........-=----DUTPUT
Rl
l.Ok
INPUT-"""N'Ir--4
'Solid tantalum
-15V
TL/H/5703-20
5-12
Typical Applications
r-n
......
......
......
""'r-n
N
......
......
""'r-n
CN
......
......
(Continued)
TTL Interface with High Level Logic
RJ
RI
82k
240k
INPUT'...A,N.......---4I~-H
TO TTL
LOGIC
R2
47k
R4
82k
TL/H/5703-21
·Values shown are for a 0 to 30V logic swing and a 15V threshold.
tMay be added to control speed and reduce susceptibility to noise spikes
Using Clamp Diodes to Improve Response
fROM
LADDER
NETWORK
-.--.--""-1
TTL
OUTPUT
01
02
RI
L-_~._"_
5-13
ANALOG INPUT
TL/H/5703-6
,.. r--------------------------------------------------------------------------------,
,..
N
::E: ~National
....I
......
,..
,.. ~ Semiconductor
C")
N
N
::E:
....I
......
,..
LH2111/LH2211/LH2311
,..
,.. Dual Voltage Comparators
N
::E:
....I
General Description
Features
The LH2111 series of dual voltage comparators are two
LM111 type comparators in a single hermetic package. Featuring all the same performance characteristics of the single, these duals offer in addition closer thermal tracking,
lower weight, reduced insertion cost and smaller size than
two singles. For additional information see the LM111 data
sheet and National's Linear Application Handbook.
The LH2111 is specified for operation over the -55'C to
+ 125'C military temperature range. The LH2211 is specified for operation over the -25'C to + 85'C temperature
range. The LH2311 is specified for operation over the O'C to
70'C temperature range.
• Wide operating supply range
•
•
•
•
±15Vtoa
single +5V
6 nA
Low input currents
High sensitivity
Wide differential input range
High output drive
10 /LV
±30V
50 mA, 50V
Connection Diagram
INY INPUT
OUTPUT
NON-INV INPUT
GND (EMITTER)
SAL/STROBE 0------'
BALANCE
~~---'
v-o----...
INY INPUT
OUTPUT
NON-INY INPUT
10 GND (EMITTER)
SAL/STROBE
BALANCE 0---.......1
TL/K/10116-1
Order Number LH2111D, LH2211D or LH2311D
See NS Package Number D16C
Order Number LH2111J, LH2211J or LH2311J
See NS Package Number J16A
5-14
r-
:r:
Absolute Maximum Ratings
N
.....
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Total Supply Voltage (V+ - V-I
36V
Output to Negative Supply Voltage (Vour - V-I
Ground to Negative Supply Voltage (GND - V-I
Differential Input Voltage
±15V
Input Voltage (Note 1)
500mW
Power Dissipation (Note 2)
Output Short Circuit Duration
Operating Temperature Range LH2111
LH2211
LH2311
50V
30V
±30V
Storage Temperature Range
10 sec
-55'C to + 125'C
- 25'C to + 85'C
O'Cto +70'C
-65'C to + 150'C
Lead Temperature (Soldering, 10 sec)
300'C
Electrical Characteristics Each Side (Note 3)
Parameter
Input Offset Voltage (Note 4)
Limits
Conditions
TA = 25'C, Rs ,,; 50k
Input Offset Current (Note 4)
TA = 25'C
Units
LH2111
LH2211
LH2311
3.0
3.0
7.5
mVMax
10
50
nAMax
10
Input Bias Current
TA = 25'C
100
100
250
nAMax
Voltage Gain
TA = 25'C
200
200
200
V/mVTyp
Response Time (Note 5)
TA = 25'C
200
200
200
nsTyp
Saturation Voltage
VIN"; -5 mY, lour = 50 mA
TA = 25'C
1.5
1.5
1.5
V Max
3.0
3.0
3.0
mATyp
10
10
50
nAMax
=
Strobe On Current
TA
Output Leakage Current
VIN 2 5 mY, Your
TA = 25'C
Input Offset Voltage (Note 4)
Rs"; 50k
25'C
=
35V
4.0
4.0
10
mVMax
Input Offset Current (Note 4)
20
20
70
nAMax
Input Bias Current
150
150
300
nAMax
Input Voltage Range
±14
±14
±14
VTyp
0.4
0.4
0.4
V Max
6.0
6.0
7.5
mAMax
5.0
5.0
mAMax
Saturation Voltage
V+ 2 4.5V, V- = 0
VIN"; -5 mY, ISINK"; 8 mA
Positive Supply Current
TA
Negative Supply Current
TA
=
=
25'C
5.0
25'C
Note 1: This rating applies for ± lSV supplies. The positive input voltage limit is 30V above the negative supply. The negative input voltage limit is equal to the
negative supply voltage or 30V below the positive supply, whichever is less.
Note 2: The maximum junction temperature is 150"C. For operating at elevated temperatures, devices in the flat package, the derating is based on a thermal
resistance of 185"C/W when mounted on a V.winch-thick epoxy glass board with O.03-inch-wide, 2 ounce copper conductor. The thermal resistance of the dual-in-
line package is 1OOOC/W, junction to ambient.
Note 3: These specifications applyforVs ~ ±lSVand -SS'C ,;: TA ,;: 12S'Cforthe LH2111, -2S'C ,;: TA ,;: 8S'C for the LH2211, and O'C';: TA ,;: 70'C for the
LH2311, unless otherwise stated. The offset voltage, offset current and bias current specifications apply for any supply voltage from a single 5V supply up to ± lSV
supplies. For the LH2311. VIN ~ ±10 mY.
Note 4: The offset voltages and offset currents given are the maximum values required to drive the output within a volt of either supply with a 1 rnA load. Thus,
these parameters define an error band and take into account the worst case effects of voltage gain and input impedance.
Nole 5: The response time specified is for a 100 mV input step with 5 mV overdrive.
5-15
.....
.....
.......
r-
:r:
N
N
.....
.....
.......
r-
:r:
N
.........W
......
C')
C'II
:::E:
......
.........
Auxiliary Circuits
..J
.......
Offset Balancing
C'II
C'II
Strobing
Increasing Input Stage Current·
Rl
lk
·'ncreases typical common mode slew from
7.0 V/".s 10 18 V/".s
R2
3k
:::E:
..J
.......
C'II
:5
TL/K/10116-4
TL/K/10116-2
TL/K/10116-3
Driving Ground·Referred Load
Using Clamp Diodes to Improve Responses
FROM
LADDER NETWORK
.....- -.....-V+
....--t--"'--t
m
INPUTS
OUTPUT
01
02
Rl
_+_ ANALOG INPUT
L...._....
TL/K/10116-6
TL/K/10116-5
Comparator and Solenoid Driver
Strobing off Both Input' and Output Stages
FROM O/A NETWORK
01
lN4001
~~~_...._ ...._OUTPUT
lA
ANALOG
INPUT
01
2N3740
m
STROBE
TUK/10116-7
TL/K/10116-8
'Typical input current is 50 pA with inputs strobed off
TTL Interface with High Level Logic
r - - -.....- - - . - - v+=5V
Rl
R5
lk
240k
INPUT'
-¥.fv-...---.--'--';"'-I
>_15..;,_8....._
TO
m
LOGIC
·Values shown are for a ov to
30V logic swing and a 15V
threshold.
Cit
tMay be added to central
speed and reduce susceptibility to noise spikes.
TL/K/10116-9
5·16
r-
s:
....
o
~National
CJ)
~ Semiconductor
.......
r-
s:
I\)
oCJ)
.......
LM106/LM20S/lM306 Voltage Comparator
r-
s:
(,)
General Description
oCJ)
The LM106 series are high-speed voltage comparators designed to accurately detect low-level analog signals and
drive a digital load. They are equivalent to an LM710, combined with a two input NAND gate and an output buffer. The
circuits can drive RTL, DTL or TTL integrated circuits directly. Furthermore, their outputs can switch voltages up to 24V
at currents as high as 10 mA.
The LM106 is specified for operation over the -55'C to
+ 125'C military temperature range. The LM206 is specified
for operation over the - 25'C to + 85'C temperature range.
The LM306 is specified for operation over O'C to + 70'C
temperature range.
The devices have short-circuit protection which limits the
inrush current when it is used to drive incandescent lamps,
in addition to preventing damage from accidental shorts to
the positive supply. The speed is equivalent to that of an
LM710. However, they are even faster where buffers and
additional logic circuitry can be eliminated by the increased
flexibility of the LM106 series. They can also be operated
from any negative supply voltage between - 3V and -12V
with little effect on performance.
II
Features
Improved accuracy
Fan-out of 10 with DTL or TTL
II Added logic or strobe capability
III Useful as a relay or lamp driver
III Plug-in replacement for the LM710
II! 40 ns maximum response time
II
Schematic and Connection Diagrams**
STROBE*
5
Metal Can
,
r----1~--------~-----_.----t-----r_--~~--~BV,
v'
RJ
5.0K
vTLlH17756-2
Top View
Note: Pin 4 connected to case.
OJ
6.3V
$-____t-__...;.1 OUTPUT
INPUT
]----e~JV~----O---------~----~----~--~GROUNO
v-.;:.'____...____.J
TL/H/7756-1
*Grounding either strobe forces the output to -O.5V (typ.). To disable strobe function, connect strobes
to V + or leave open .
... *Pin connections shown are for TO-5 package.
5-17
Order Number LM106H,
LM206H or LM306H
See NS Package Number HOBA
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 6)
Positive Supply Voltage
Power Dissipation (Note 1)
15V
-15V
Negative Supply Voltage
600mW
10 seconds
Output Short Circuit Duration
Operating Temperature Range
LM106
LM206
LM306
TMIN
TMAX
- 55'C to + 125'C
-25'Cto +85'C
O'Cto +70'C
- 65'C to + 150'C
Output Voltage
24V
Storage Temperature Range
Output to Negative Supply Voltage
30V
Lead Temperature (Soldering, 10 sec.)
Differential Input Voltage
±5V
ESD rating to be determined.
Input Voltage
±7V
300'C
Electrical Characteristics (Note 2)
Parameter
LM106/LM206
Conditions
Min
Typ
Max
LM306
Min
Units
Typ
Max
Input Offset Voltage
(Note 3)
0.5
2.0
1.6
5.0
mV
Input Offset Current
(Note 3)
0.7
3.0
1.8
5.0
).LA
10
20
16
25
).LA
28
40
28
40
ns
= 100 mA
= 100 mA
1.0
1.5
0.8
2.0
V
V
VIN :e: 5 mY, 8V :;;: VOUT :;;: 24V
VIN :e: 7 mY, 8V :;;: VOUT :;;: 24V
0.02
0.02
2.0
).LA
).LA
6.5
mV
Input Bias Current
= 39011 to 5V
= 15 pF, (Note 4)
Response Time
RL
CL
Saturation Voltage
VIN:;;: -5 mY, lOUT
VIN:;;: -7 mY, lOUT
Output Leakage Current
1.0
THE FOLLOWING SPECIFICATIONS APPLY FOR TMIN :;;: TA:;;: TMAX (Note 5)
Input Offset Voltage
(Note 3)
3.0
Average Temperature Coefficient of
Input Offset Voltage
3.0
10
5
20
).LVI'C
Input Offset Current
h :;;: TA :;;: 25'C, (Note 3)
25'C:;;: TA:;;: TH
1.8
0.25
7.0
3.0
2.4
7.5
5.0
).LA
).LA
Average Temperature Coefficient of
Input Offset Current
25°C:;;: TA:;;: TH
h:;;: TA:;;: 25'C
5.0
15
25
75
15
24
50
100
nAI'C
nAI'C
Input Bias Current
TL:;;: TA:;;: 25'C
25'C:;;: TA:;;: TH
45
20
25
40
25
).LA
).LA
Input Voltage Range
-7V:e: V- :e: -12V
Differential Input Voltage Range
±5.0
±5.0
V
±5.0
±5.0
V
Saturation Voltage
VIN:;;: -5 mY, lOUT = 50 mA
VIN :;;: -8 mV For LM306
1.0
1.0
V
Saturation Voltage
VIN:;;: -5 mY, lOUT = 16 mA
VIN :;;: -8 mV For LM306
0.4
0.4
V
Positive Output Level
VIN :e: 5 mY, lOUT = -400).LA
VIN :e: 8 mV For LM306
5.5
V
Output Leakage Current
VIN :e: 5 mY, 8V :;;: VOUT :;;: 24V
VIN :e: 8 mV For LM306
TL:;;: TA:;;: 25'C
25'C < TA:;;: TH
2.0
).LA
Strobe Current
VSTROBE
2.5
5.5
1.0
100
-1.7
= O.4V
5-18
2.5
-3.2
-1.7
100
).LA
-3.2
mA
r
...s::
Electrical Characteristics (Note 2) (Continued)
<:)
LM10S/LM20S
Parameter
Conditions
Strobe "ON" Voltage
Strobe "OFF" Voltage
ISINK';: 1SmA
Positive Supply Current
VIN
VIN
Min
Typ
0.9
1.4
Max
1.4
= -5mV
= -8 mV for LM306
Negative Supply Current
en
......
LM30S
Min
Typ
0.9
1.4
1.4
2.2
Units
Max
V
2.2
V
5.5
10
5.5
10
mA
-1.5
-3.6
-1.5
-3.6
rnA
Note 1: The maximum junction temperature of LM106 is 150°C, LM206 is 110°C, LM306 is 85°C. For operating at elevated temperatures, devices in the HOS
package must be derated based on a thermal resistance of 170°C/W, junction to ambient, or 23°C/W. junction to case.
Note 2: These specifications apply for - 3V ~ V - ~ -12V I V + = 12V and TA = 25°C unless otherwise specified. All currents into device pins are considered
positive.
Note 3: The offset voltages and offset Cl:rrents given are the maximum values required to drive the output down to O.SV or up to 4.4V (O.SV or up to 4.BV for the
LM306). Thus, these parameters actually define an error band and take into account the worst-case effects of voltage gain, specified supply voltage variations, and
common mode voltage variations..
Note 4: The response time specified (see definitions) is for a 100 mV input step with 5 mV overdrive.
Note 5: All currents into device pins are considered positive.
Note 6: Refer to RETS106X for LM106 military specifications.
Typical Applications* *
Fast Response Peak Detector
Level Detector and Lamp Driver
v+
v+ = 12V
V++::;24V
RI
RI
01
F06666
LI
OUTPUT -
INPUT--1I---t
R2
2K
.....1--.---1110----..
OVERRIDE
TLlH/7756-4
TL/H/7756-5
Relay Driver
Adjustable Threshold Line Receiver
OUTPUT
F.O.~
RIO
10
INPUT-"YIAr....1--I
el'
INPUTS
TLlH17756-6
"'Pin connections shown are for metal can package.
5-19
I
STROBE
INPUTS
·Optional for response
time control.
TL/H/7756-7
r
s::
I\)
<:)
en
......
r
s::
(0)
<:)
en
CD
oC')
::i
Typical Performance Characteristics
...I
......
CD
.,
Transfer Function
o
C'i
Transconductance
::i
.' v;- ....V-
...I
......
CD
o,...
::i
-
T.
~-5'!.
T.'Z"~=
.~.tr'
D
,-
"
:/ '~! .•i... ,
...I
Z
0
..u .....l
-Ql
0 +G.1 +0.2 +U +D.4
'0-
10-
a:
10-.. T. "125°C
B
10-•
+D.fj
'.0
~
-
I-
I- -
H-+
I- -
r-.;
r-'~'DmA
·
.0-'~T'"-5S'.
·
-75 -50 -25
10-"'3
3D
V+"+12Y~~
.....
"I'mA
-C
t;
......
~ 2D
"r-.. "
I' I"
r-..,
""""
o
-5
-15 -58 -25
0 1'15 .. 50 1'75 +1110 1.'21
TEMPERATURE ("el
Short Circuit Output Current
•
o.
v+·+1tV
~
~
"-
3
l-
~
2
Y+·+12V
v-·-avVIN --5mV
"
~
1
VIN "'+5mV
0 +25 +58 +75 .,00 +125
TEMPERATURE 1°C)
-75 -50 -25
-15
0 +25 +50 "'75 .100 .'25
TEMPERATURE (OC)
II
II
v· .. +12V
V-· -6V
-
LL
I~J
II
MI
T... -.Z5"C
.. .
H-+-IH-+-t-l • •~-+-II-++t
I
~
!;
~ 2
~ 2mV
'DillY
-15 0 i15 +50 i15 +100+125+150
Response Time for
Various Input Overdrives
~
~
~.I.!.L
Y-·-Sv
II
-so
JUNCTION TEMPERATURE reI
Response Time for
Various Input Overdrives
1-t'T''rii;?jH-H
so
.s
~100~~~~I-t~-++
i
OFFSET
o
20
40
60
H-+H--I-IH--H++
50
i
80 100 120
It
Positive Supply Current
Negative Supply Current
..•
TA --55"C
.'
'\'\
,.
z
.
....
.... 1"'
.. . -..
,!;
,.
• 10-
POSITIVE SUPPLY VOLTAGE (VI
-3
-- -
TA _+I25°e
-.2
-a
80
118 120
-I
NEGATIVE SUPPlV VOL fAGE tvl
I
"0
VIN"·S ..V
;5mV
7D
i
v-·-&V
aD
5G
411
'"
-15
V+·+12V
... Ti""- .....
!
--r-..,
.. I
i" I-v: ••
!. . -"
z
TA • +25"C
z
o
&0
Power Consumption
-
+••
40
TlM'(MI
120
+12
2t
TlME(")
••
+11
......
-r;;'Y-;'-12V
-1S -50 -25 0 25 50 15 100 125
TEMPERATURE I'CI
2
-3
-
-
o
;
-2
-
lL -w40DIlA.....
I-
iii 4
-1
~ I'""'"
-3V~V";;::-12V
VIN "'·SmV
....... ~ls
I
a
...1
7
40
Ii
.2
;;,v~>-i2v
-
r- V+=I~V
r-..,
~
Positive Output Level
Input Current
.! I
-3V
T", _25°C
7
......,."
40
w
-3V ~v- c::-15V
r----: ).u!~ i'\~"~V- -
D
D
..
~
-4--t"'"
... • .. mA
I- -
~.,
"I'-J
aD
INPUTVOLTAGE(mV)
,..,
-.~ •• ~mA
ID
y+"'.tZV
Saturation Voltage
I.Z
t-
i .0-,
~ '.0-0-
I.PUT VOLTAGE rlllV)
,;
,
S
Voltage Gain
-
"
y. z+12Y
-7& -50 -25
r-..,
- -
0 +25 +50 +75 +100 +125
TEMPERATURE I"c)
TL/H/7756-8
5-20
r-
:s::
.....
~National
.....
.....
~ Semiconductor
LM111/LM211/LM311 Voltage Comparator
........
General Description
........
r-
:s::
N
.....
.....
r-
The LM111, LM211 and LM311 are voltage comparators
that have input currents nearly a thousand times lower than
devices like the LM106 or LM710. They are also designed
to operate over a wider range of supply voltages: from standard ± 15V op amp supplies down to the single 5V supply
used for IC logic. Their output is compatible with RTL, DTL
and TTL as well as MOS circuits. Further, they can drive
lamps or relays, switching voltages up to 50V at currents as
high as 50 mAo
Both the inputs and the outputs of the LM111, LM211 or the
LM311 can be isolated from system ground, and the output
can drive loads referred to ground, the positive supply or the
negative supply. Offset balancing and strobe capability are
provided and outputs can be wire OR'ed. Although slower
than the LM106 and LM710 (200 ns response time vs
Typical Applications **
40 ns) the devices are also much less prone to spurious
oscillations. The LM111 has the same pin configuration as
the LM106 and LM710.
The LM211 is identical to the LM111, except that its performance is specified over a -25'C to +85'C temperature
range instead of -55'C to + 125'C. The LM311 has a temperature range of O'C to + 70'C.
Features
•
III
•
III
III
Operates from single 5V supply
Input current: 150 nA max. over temperature
Offset current: 20 nA max. over temperature
Differential input voltage range: ± 30V
Power consumption: 135 mW at ± 15V
Strobing
**Note: Pin connections shown on schematic
diagram and typical applications are for
HOS metal can package.
Offset Balanf,ing
,,,
..
Increasing Input Stage Current"
v'
TTL
STROBE
Note: Do Not
Ground
Strobe
Pin. Output is
turned off when
current is pulled
from Strobe Pin.
Detector for Magnetic Transducer
r----4P"---4P"-v+=5.DV
*'ncreases typical common
mode slew from 7.0V/p,s
to lSVII's.
Digital Transmission Isolator
V+=5.DV
~=~!!.-+::----11---...,.--rvt"5.DV
R1
Uk
TTL
OUTPUT
AI
1.0•
TTL
100
OUTPUT
.3
fROM
TTL
GATE
1.0.
.,
••
u,
.,
RJ
2.0.
l.Ok
HZ
SDk
C1
O.D1.uF
MAGNETIC
PICKUP
":'"
Strobing off Both Input" and Output Stages
Relay Driver with Strobe
v"
e
FROM D/A NETWORK
ANALOG
INPUT
INPUTS
TTl
STROBE
*Absorbs inductive
kickback of relay and
TTL
STROBE
protects Ie from
severe voltage
transients on
V+ + line.
*Typical input current is
50 pA with inputs strobed off.
Note: Do Not Ground Strobe Pin.
Note: Do Not Ground Strobe Pin.
5-21
TL/H/5704-1
:s::
.....
.....
Co)
....CO)
:i
...I
......
....C\I
:i
...I
Absolute Maximum Ratings fortheLMlll/LM211
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 7)
......
..-
Total Supply Voltage (VS4)
Output to Negative Supply Voltage (V74)
:i
Ground to Negative Supply Voltage (VI4)
Differential Input Voltage
....
....
...I
36V
50V
±15V
500mW
10 sec
Output Short Circuit Duration
Electrical Characteristics
Parameter
-55·Cto 125·C
- 25·C to 85·C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec)
-65·C to 150·C
260·C
V+-5V
Voltage at Strobe Pin
. Soldering Information
Dual·ln·Line Package
Soldering (10 seconds) ....................... 260·C
Small Outline Package
Vapor Phase (60 seconds) .................... 215·C
Infrared (15 seconds) ........................ 220·C
See AN·450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering sur·
face mount devices.
ESD Rating (Note 8)
300V
30V
±30V
Input Voltage (Note 1)
Power Dissipation (Note 2)
Operating Temperature Range LMlll
LM211
for the LMlll and LM211 (Note 3)
Typ
Max
Units
Input Offset Voltage (Note 4)
TA=25·C, Rs:5:50k
Conditions
Min
0.7
3.0
mV
Input Offset Current (Note 4)
TA=25·C
4.0
10
nA
60
100
nA
Input Bias Current
TA=25·C
Voltage Gain
TA=25·C
200
V/mV
Response Time (Note 5)
TA=25·C
200
ns
Saturation Voltage
VIN:5: -5 mV, IOUT=50 mA
TA=25·C
0.75
1.5
V
3.0
5.0
mA
0.2
10
nA
40
Strobe ON Current (Note 6)
TA=25·C
Output Leakage Current
VIN25 mV, VOUT=35V
TA=25·C, ISTROBE=3 mA
Input Offset Voltage (Note 4)
RS:5:50k
2.0
4.0
mV
Input Offset Current (Note 4)
20
nA
Input Bias Current
150
nA
13,8,·14.7
13.0
V
V
Input Voltage Range
V+ =15V, V- = -15V, Pin 7
Pull·Up May Go To 5V
Saturation Voltage
V+24.5V, V-=O
VIN:5: -6 mV, IOUT:5:8 mA
0.23
0.4
Output Leakage Current
VIN25 mV, VOUT=35V
0.1
0.5
I'-A
Positive Supply Current
TA=25·C
5.1
6.0
mA
-14.5
TA=25·C
4.1
5.0
mA
Negative Supply Current
Note 1: This rating applies for ± 15 supplies. The positive input voltage limit is 30V above the negative supply. The negative input voltage limit is equal to the
negative supply voltage or 30V below the positive supply, whichever is less.
Note 2: The maximum junction temperature of the LMlll is 150"C, while that of the LM211 is 110"C..For operating at elevated temperatures. devices in the HOS
package must be derated based on a thermal resistance of 165°C/W, junction to ambient, or 20aC/W, junction to case. The thermal resistance of the dual-in-line
package is 110"C/W, junction to ambient.
Note 3: These specifications apply for Vs= ±15V and Ground pin at ground. and -55'C,;;TA<: + 125'C, unless otherwise stated. W~h the LM211, however. all
temperature specifications are limited to - 25°C S; TA:S;; + 85°C. The offset voltage, offset current and bias current specifications apply for any supply voltage from a
single SV supply up to ± lSV supplies.
Note 4: The offset voltages and offset currents given are the maximum values required to drive the output within a volt of either supply w~h almA load. Thus,
these parameters define an error band and take into account the worst-case effects of voltage gain and input impedance.
Note 5: The response time specified (see definitions) is for a 100 mV input step with 5 mVoverdrive.
Note 6: This specification gives the range of current which must be drawn from the strobe pin to ensure the output is properly disabled. Do not short the strobe pin
to ground; ~ should be current driven at 3 to SmA.
Note 7: Refer to RETSlllX for the LMlllH, LMlllJ and LMlllJ·8 military specifications.
Note 8: Human body model, 1.S kll in series with 100 pF.
5·22
r
s:
....
....
Absolute Maximum Ratings for the LM311
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Total Supply Voltage (VS4)
36V
Output to Negative Supply Voltage V74)
40V
Ground to Negative Supply Voltage V14)
30V
Differential Input Voltage
±30V
Input Voltage (Note 1)
±15V
Power Dissipation (Note 2)
Output Short Circuit Duration
s:
N
........
.....
- 65"C to 150"C
Lead Temperature (soldering. 10 sec)
260"C
V+-5V
Voltage at Strobe Pin
r
s:
........
Soldering Information
Dual-ln·Line Package
Soldering (10 seconds) ....................... 260"C
Small Outline Package
Vapor Phase (60 seconds) .................... 215"C
Infrared (15 seconds) ........................ 220"C
500mW
ESD Rating (Note 7)
0" to 70"C
Operating Temperature Range
Storage Temperature Range
....
.....
r
10 sec
300V
CA)
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
Electrical Characteristics for the LM311 (Note 3)
Typ
Max
Units
Input Offset Voltage (Note 4)
Parameter
TA=25"C, Rs,,;50k
Conditions
2.0
7.5
mV
Input Offset Current (Note 4)
TA=25"C
6.0
50
nA
100
250
Input Bias Current
TA=25"C
Voltage Gain
TA=25"C
Min
40
V/mV
ns
Response Time (Note 5)
TA=25"C
200
Saturation Voltage
VIN"; -10 mV.IOUT=50 mA
TA=25"C
0.75
Strobe ON Current
TA=25"C
Output Leakage Current
VIN:2:10mV. VOUT=35V
TA=25"C.ISTROBE=3 mA
V- = VGRND = -5V
Input Offset Voltage (Note 4)
1.5
nA
200
1.5
3.0
0.2
Rs,,;50K
V
mA
50
nA
10
mV
Input Offset Current (Note 4)
70
nA
Input Bias Current
300
nA
13.B.-14.7
13.0
V
Saturation Voltage
Input Voltage Range
V+ :2:4.5V. V- =0
VIN';; -10 mV, IOUT,;;B mA
-14.5
0.23
0.4
V
Positive Supply Current
TA=25"C
5.1
7.5
mA
Negative Supply Current
TA=25"C
4.1
5.0
mA
Note 1: This rating applies for ± 15V supplies. The positive input voltage limit is 30V above the negative supply. The negative input voltage limit is equal to the
negative supply voltage or 30V below the positive supply. whichever is less.
Note 2: The maximum junction temperature of the LM311 is 11 COC. For operating at elevated temperature. devices in the HOe package must be derated based on a
thermal resistance of 165'"C/W, junction to ambient, or 200C/W, junction to case. The thermal resistance of the dual-in-line package is 1000C/W, junction to
ambient.
Note 3: These specifications apply for Vs ~ ± 15V and the Ground pin at ground, and O"C < TA < + 70"C, unless otherwise specified. The offset voltage, offset
current and bias current specifications apply for any supply voltage from a single 5V supply up to ± 15V supplies.
Note 4: The offset voltages and offset currents given are the maximum values required to drive the output within a volt of either supply with 1 rnA load. Thus, these
parameters define an error band and take into account the worst~case effects of voltage gain and input impedance.
Note 5: The response time specified (see definitions) is for a 100 rnV input step with 5 mV overdrive.
Note 6: This specification gives the range of current which must be drawn from the strobe pin to ensure the output is properly disabled. Do not short the strobe pin
to ground; it should be current driven at 3 to 5 rnA.
\
Nole 7: Human body model, 1.5 kll. in series with 100 pF.
5-23
.....
.....
CW)
:::Ii
LM111/LM211 Typical Performance Characteristics
...I
.....
.....
.....
N
==
...I
.....
.....
.....
.....
==
...I
Input Bias Current
..
8
Vs .. :t15V-
Va = t15V
RAISED
(SHORT PINS". .
~. 6. AND 81
C
'"...i!::
3DO
1
.
l-
i!::
zo
il
20G
...
m
"...
::I
lD
i!!
100
NO M
a
-55 -35 -15 5
l-I- f-
10
.....
~
Z5 45 65 IS 105 125
RAISED
(SHORT PIN!
~5.AN?81
-NORMAL
~
-55 -35 -15 5 25 <5 55 IS 105 125
Input Characteristics
110
160
140
.
il
::I
;;;
120
Common Mode Limits
1+t+1++++++J,! '\5~
1++-I+rI-++-If-+ TA = zsoe
~
;...
I-++-t+t-I-++-I-++-t-++-IH
g
t++++t-+-HH-+-i+H-H
6a t++++t-+-t-ir-+oolod+H-H
10
-0.5
z
II"
8
a •
8
12
w
~
co
>
...
"
~
"co
4
-
0.4
o.l
3
',"
Z..
I
.!
...co
"~
">
i!!
I-
V,~
D.'
lOrY.;
5mV';
Z":V
0.•
~
~
"...>
e"
lOmV
10
5
5mV
-5
-10
:> -15
.!
0
co
-50
S -100
"
lmV
II
/
...
~
v'
.~
VO\l1
2K
LMl1l
v'
...
"...
...>
~
II
V'."5~t-
TA' l5·C
~>
z
">...
~
:>
.!
~
co
...>
~
:i
v, -.15"- -
0.2
Response Time for Various
Input Overdrives
~
15
co
";::
I
I
-
.,.~
0.5
a.
a3
02
01
T... "-55°C,
-r-r--';o.; 'IL
.
~E 12T
o
A '
10
(~sJ
2S'C
20
40
]0
.0
OUTPUT CURRENT (mAl
Output Limiting Characteristics
r
ru
I
-v,. -
2°i~.\ \.
0
5 .. V
-5
-10 -!..!!!.VF\
-15
100
50
o-~~
06
Response Time for Various
Input Overdrives
15
10
TA :: 1ZSoC
0.1
o
o.
0.6
0.<
TIME
w
co
va'"~
TA",l5o~_
TIME ha)
~
>
LM1I1
L
.5
Output Saturation Voltage
r-I
...co
:! -50
i -100
ro..
-5
0.8
I.J
~~M'
~~
Vs" 30Y
TA :25"C-
OIFfERENTJALINPUT VOLTAGE (mY)
v,,. •
r'l
-I-
L
-1
.!
I
0.6
"...
>
""
_
1'·'1" I
OZ
I
~
:>
I/our
50
c
10
I
yH=50V
EMITTER
FOllOWER
OUTPUT
RL ::IDOU
20
Response Time for Various
Input Overdrives
~
,J
~~n
lao
......
TEMPERATURE (IICI
I
I
:> . a
~
5 l5 45 65 IS las 125
-55 -35 -15
co
v, '" t15Y
T... =2Soe
]0
...=>
...=>
16
I I
'r
II
ZD.mV
~>
-1.5
Response Time for Various
Input Overdrives
co
40
co
RL" 1K
I-
w
-1.0
DIFFERENTIAL INPUT VO'TAGE (VI
~
sa I-
~
v...
I- NORMA' OUTPUT
R~FEdREO TO SUPPLY VOLTAGES
:0;
t++++t-++H-+-if+-H-H
-16 -12 -6
Transfer Function
60
v'
100 I++-I+~-++-I-++-I-++-IH
20
INPUT RESISTANCE IIlI
TEMPERATURE ("CI
TEMPERATURE ('CI
1
5
..
Offset Error
Input Offset Current
3D
-1.5
'"eo
'"=
0.4
a
50
60
-1.0
~
=
=
,.
z
=
100
Transfer Function
Common Mode Limits
0.2
40
rr-
-
,
--
IlO
EMITTER
FOLLOWER
OUTPUT
Rl :s GOOH
20
10
lit
~
--j
. . .,
-
~ -Vs=30V
T 25"C
A "
V-
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-4
4
0
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o ro w m
1&
IZ
DIffERENTIAL INPUT VOLTAGE IVI
CD
50
50
ro
60
,5
-1
.5
DiffERENTIAL INPUT VOLTAGE {mVI
TEMPERATURE I'CI
TLlH/5704-9
Response Time for Various
Input Overdrives
~
.
~
w
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,.
=
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Z.,mV
5mV
ZmV
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=
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100
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50
1
...
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Vs :±15V
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I I
C
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Response Time for Various
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D.'
0.2
TIME
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0.6
~.
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Output Saturation Voltage
I
0.4
0.6
r-
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O.l
0.2
OJ
0.1
o
0.8
o
10
zo
3D
40
50
OUTPUT CURRENT (mAl
TL/H/5704-10
5-25
........
('I)
:!l
LM311 Typical Performance Characteristics (Continued)
..J
......
....
....
N
:!l
..J
......
....
........
:!l
..J
Response Time for Various
Input Overdrives
~
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15
10
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50
0
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2mV
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Output Limiting Characteristics
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10
5
;
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-5
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.5
0
w
;! -50
Response Time for Various
Input Overdrives
lI-
0
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1
2
3
~
0
5
15
10
TIME ""I
OUTPUT VOL TAGE IVI
Supply Current
Leakage Currents
TIME ""I
::!
li:
0.1
0
4
0lI
.,ili
~j':
:-~_t"~UIT. CURRENT 0.2
0
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0.4
0.3
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TL/H/5704-11
6
Supply Current
"...i5
.5
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It:
iii
10
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TA = 25°C
5
POSITIVESU~
OUTPUTlOW
4
3
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2
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V
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10
6
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NEGATIVESUPPlY-
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8
15
~
SUPPLY VOLTAGE IV'
25
30
I
J-
4
10
20
30
40
5
5 to'"
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TEMPERATURE
INPUT V,. -IIV
~
'0-11
50
OUTPUT VOUT '40~i"""
0:
'"
I
0
Vs· +t5V
:;10- 10
POSITIVE AND
NEGATIVE sum YOUTPUT HIGH
0
20
J
POSITIVE sJPPL
OUTPUTlOW
2
10-1
Vs " !15V
60
rc,
10 80
J..o-21
31
J
45
Ii
65
75
TEMPERATURE ,'C)
TL/H/5704-12
5-26
.-s:
.....
.....
.....
......
Application Hints
CIRCUIT TECHNIQUES FOR AVOIDING
OSCILLATIONS IN COMPARATOR APPLICATIONS
When a high-speed comparator such as the LMlll is used
with fast input signals and low source impedances, the output response will normally be fast and stable, assuming that
the power supplies have been bypassed (with 0.1 /LF disc
capacitors), and that the output signal is routed well away
from the inputs (pins 2 and 3) and also away from pins 5 and
4. When comparator circuits use input resistors (eg. summing resistors), their value and placement are particularly
important. In all cases the body of the resistor should be
close to the device or socket. In other words there should
be very little lead length or printed-circuit foil run between
comparator and resistor to radiate or pick up signals. The
same applies to capacitors, pots, etc. For example, if
Rs=10 kfl, as little as 5 inches of lead between the resistors and the input pins can result in oscillations that are
very hard to damp. Twisting these input leads tightly is
the only (second best) alternative to placing resistors
close to the comparator.
6.
However, when the input signal is a voltage ramp or a slow
sine wave, or if the signal source impedance is high (1 kfl to
100 kfl), the comparator may burst into oscillation near the
crossing-point. This is due to the high gain and wide bandwidth of comparators like the LMlll. To avoid oscillation or
instability in such a usage, several precautions are recommended, as shown in Figure 1 below.
1. The trim pins (pins 5 and 6) act as unwanted auxiliary
inputs. If these pins are not connected to a trim-pot, they
should be shorted together. If they are connected to a
trim-pot, a 0.01 /LA capacitor Cl between pins 5 and 6
will minimize the susceptibility to AC coupling. A smaller
capacitor is used if pin 5 is used for positive feedback as
in Figure 1.
.-s:
N
.....
.....
......
.-s:
Co)
.....
.....
5. Since feedback to almost any pin of a comparator can
result in oscillation, the printed-circuit layout should be
engineered thoughtfully. Preferably there should be a
groundplane under the LMlll Circuitry, for example, one
side of a double-layer circuit card. Ground foil (or, positive
supply or negative supply foil) should extend between the
output and the inputs, to act as a guard. The foil connections for the inputs should be as small and compact as
possible, and should be essentially surrounded by ground
foil on all sides, to guard against capacitive coupling from
any high-level signals (such as the output). If pins 5 and 6
are not used, they should be shorted together. If they are
connected to a trim-pot, the trim-pot should be located, at
most, a few inches away from the LMll1, and the 0.01
/LF capacitor should be installed. If this capacitor cannot
be used, a shielding printed-circuit foil may be advisable
between pins 6 and 7. The power supply bypass capacitors should be located within a couple inches of the
LMlll. (Some other comparators require the power-supply bypass to be located immediately adjacent to the
comparator.)
2. Certain sources will produce a cleaner comparator output
waveform if a 100 pF to 1000 pF capacitor C2 is connected directly across the input pins.
3. When the signal source is applied through a resistive network, Rs, it is usually advantageous to choose an Rs' of
substantially the same value, both for DC and for dynamic
(AC) considerations. Carbon, tin-oxide, and metal-film resistors have all been used successfully in comparator input circuitry. Inductive wirewound resistors are not suitable.
....- .....-----4....015V
~ Jk
82
~~ r5~kvcv,~.....J~vJ~Jk~-e
INPUTo-.iVR\I''\r-1._....;2=-f:
C2~
~,
4.1k
>:l~--"-O
LMII.
OUTPUT
1
.... 4
-
~'~
-15V
TLlH/5704-29
Pin connections shown are for LM111 H in the HOB hermetic package
FIGURE 1. Improved Positive Feedback
5-27
•
.,...
.,...
C')
:E
...J
.......
.,...
.,...
C\I
:E
...J
.......
.,...
.,...
.,...
:E
...J
Application Hints (Continued)
6. It is a standard procedure to use hysteresis (positive
feedback) around a comparator, to prevent oscillation,
and to avoid excessive noise on the output because the
comparator is a good amplifier for its own noise. In the
circuit of· Figure 2, the feedback from the output to the
positive input will cause about 3 mV of hysteresis. However, if Rs is larger than 100n, such as 50 kn, it would
not be reasonable to simply increase the value of the
positive feedback resistor above 510 kn. the circuit of
Figure 3 could be used, but it is rather awkward. See the
notes in paragraph 7 below.
feedback is to pin 5 (one of the offset adjustment pins). It
is sufficient to cause 1 to 2 mV hysteresis and sharp
transitions with input triangle waves from a few Hz to
hundreds of kHz. The positive-feedback signal across
the 82n resistor swings 240 mV below the positive supply. This signal is centered around the nominal voltage at
pin 5, so this feedback does not add to the Vos of the
comparator. As much as 8 mV of Vos can be trimmed
out, using the 5 kn pot and 3 kn resistor as shown.
8. These application notes apply specifically to the LM111,
LM211, LM311, and LF111 families of comparators, and
are applicable to all high-speed comparators in general,
(with the exception that not all comparators have trim
pins).
7. When both inputs of the LM111 are connected to active
signals, or if a high-impedance signal is driving the positive input of the LM 111 so that positive feedback would
be disruptive, the circuit of Figure 1 is ideal. The positive
.--1_----.-o15V
Jk
4.7k
INPUT o-"VIIIr.....-"t
>.---+-0 OUTPUT
510k
TLIH15704-30
Pin connections shown are for LM 111 H in the H08 hermetic package
FIGURE 2. Conventional Positive Feedback
r--1-----.-O 15V
Jk
4.1k
INPUT o-"VIIIr....--'-I
>'---+-0 OUTPUT
10
lOOk
TLIH15704-31
FIGURE 3. Positive Feedback with High Source Resistance
5-28
ri:
......
Typical Applications (Continued) (Pin numbers refer to HOB package)
......
......
.....
r-
Zero Crossing Detector Driving MOS Switch
i:
I\,)
......
100 kHz Free Running Multivibrator
r - -....- -..... V+
......
.....
r-
V+=5V
INPUT
R5
lK
Rl
20K
i:
Co)
......
......
R3
10K
Cl
1~
TLlH/5704-13
7
SQUARE
1.>'-4...... WAVE
OUTPuT'
R4
R2
10K
39K
'TTL or OTl fanout of two
TLlH/5704-14
10 Hz to 10 kHz Voltage Controlled Oscillator
Rl
10K
5mV-5V
TRIANGULAR
~~~----- WAVE
INPUT
5mVT05V---'--~-i--~~~~~~·
OUTPUT
R3
330K
SQUARE
L.-':':';;;~_-----""'--+---"""'"",""WAVE
OUTPUT
• Adjust for symmetrical square
wave time when VIN ~ 5 mV
tMinimum capacitance 20 pF
Maximum frequency 50 kHz
RIO
lK
lK
-15V
Driving Ground·Referred Load
TL/H/5704-15
Using Clamp Diodes to Improve Response
r---+-v+
rROM
LADDER-.-.....-=-I
NETWORK
TTL
OUTPUT
+
. 'Input polaMty is reversed
when using pin 1 as output
TL/H/5704-17
TL/H/5704-16
5·29
........
C')
:E
Typical Applications (Continued) (Pin numbers refer to HOB package)
....I
......
....
TTL Interface with High Level Logic
....
N
1"""""....--9--v+
:E
....I
......
........
....
:i
5V
R5
Rl
INPUT' ~MI.....- . - t 9
lK
TO
m
·Values shown are for
a 0 to 30V logic swing
and a 15V threshold.
LOGIC
tMay be added to control
speed and reduce
susceptibility to noise spikes.
Tl/H/5704-18
Crystal Oscillator
Comparator and Solenoid Driver
01
lN4001
v+=5V
Rl
R4
lOOK
2K
_+-I~...._ _...._OUTPUT
lA
R2
lOOK
OUTPUT
R3
50K
TUH/5704-20
TUH/5704-19
Precision Squarer
Low Voltage Adjustable Reference Supply
v+· S.OV
RI
3.9k
RJt
Rl
J.9k
R4
500
RJ
10k
R4
\.Ok
ZOk
v+ • s.ov
R5
\.Ok
>';"'-.-V
OUT
>~'--~~~
__----+----OUffUT
TTL
INPUT
·Solid tantalum
'Solid lantalum
t Adjust to set clamp level
TUH/5704-21
5-30
Tl/H/5704-22
r-
Typical Applications
s:
.....
(Continued) (Pin numbers refer to HOe package)
.....
.....
.......
Positive Peak Detector
Zero Crossing Detector Driving MOS Logic
;.15V
r-
s:
N
.....
.....
.......
r-
s:
I NPU T-"Vv..-"t
Co)
.....
.....
OUTPUT
-ISV
R2
1.0M
V- = -IOV
TL/H/5704-24
·Solid tantalum
TL/H/5704-23
Negative Peak Detector
Precision Photodiode Comparator
'5V
RJ
I.Ok
OUTPUT
TTl
OUTPUT
-15V
·Solid tantalum
TL/H/5704-25
TL/H/5704-26
*R2 sets the comparison level.
At comparison, the photodiode
has less than 5 mV across it,
decreasing leakages by an order
of magnitude.
5-31
.,...
.,...
~
Typical Applications (Continued) (Pin numb&rs refer to HOS package)
..J
....
::
Switching Power Amplifier
N
:E
......J
.,...
.,...
.,...
R8
~
:E
..J
Rl
300
R2
lOOk
.----------------.-OUTPUT
Rl
lOOk
Rl
10k
INPUT ~N\r-.---_+--....,
CI
R4
O.1IJF
47
......---+--~....- ...-vTLlH/5704-27
Switching Power Amplifier
v'
R4
R&
&10
300k
R6
19k
R9
39k
R1J
lUDIc
RI4
&10
CI
0.22
pF
R8
15k
Rl
m
REFERENCE
INPUT
5-32
TL/H/5704-28
r-
:s::
....
Schematic Diagram*
BALANCE/STROBE
6
........
BALANCE
5
......
r-
:s::
N
R3
300
....
....
......
r-
R4
300
8
:s::
C.:I
v'
........
RID
4k
OUTPUT
..._ + _ , . 1
R16
400
RU
130
R15
450
011
R19
250
R18
200
R12
600
R14
2k
R13
4
1
4
V-
GNO
TL/H/5704-5
Connection Diagrams*
Metal Can Package
Dual-In-Line Package
Dual-In-Line Package
v'
6
BALANCEI
STROBE
INPU12
INPUT3
V-
V-.
TOP VIEW
NOTE: Pin 4 connect.d to CISI.
Ne
1
14 NC
GND
2
13 NC
7 OUTPUT
INPUT
3
12 NC
6BALANCEJ
STROBE
INPUT
BV'
GROUND 1
•
11
Ne
5
lD NC
V-
6
•
5BAlANCE
v'
OUTPUT
BALANCE/
STROBE
BALANCE 1
TOP VIEW
TOP VIEW
TL/H/5704-6
Order Number LM111 H,
LM211HorLM311H
See NS Package Number HOSC
Order Number LM111J-S, LM211J-S,
LM311J-S, LM311M or LM311N
See NS Package Number JOSA,
MOSAorNOSE
*Pin connections shown on schematic diagram are for HOB package.
5-33
Order Number LM111J, LM211J,
LM311J or LM311N-14
See NS Number Package
J14Aor N14A
CD
.,...
C')
:E
....I
......
~
.,...
r---------------------------------------------------------------------------~
~National
~ Semiconductor
C')
:E
....I
......
CD
.,...
N
lM119A/lM119/lM219/lM319A/lM319
High Speed Dual Comparator
:E
• Typically 80 ns response time at ± 15V
• Minimum fan-out of 2 each side
• Maximum input current of 1 ".A over temperature
• Inputs and outputs can be isolated from system ground
• High common mode slew rate
Although designed primarily for applications requiring operation from digital logic supplies, the LM119 series are fully
specified for power supplies up to ± 15V. It features faster
response than the LM 111 at the expense of higher power
dissipation. However, the high speed, wide operating voltage range and low package count make the LM119 much
more versatile than older devices like the LM711.
....I
......
General Description
CD
.,...
.,...
:E
....I
......
c(
CD
.,...
.,...
:iE
....I
The LM119 series are precision high speed dual comparators fabricated on a single monolithic chip. They are designed to operate over a wide range of supply voltages
down to a single 5V logic supply and ground. Further, they
have higher gain and lower input currents than devices like
the LM710. The uncommitted collector of the output stage
makes the LM119 compatible with RTL, DTL and TIL as
well as capable of driving lamps and relays at currents up to
25 mA.
The LM119A and LM319A offer improved precision over the
standard LM119 and LM319, with tighter tolerances on offset voltage, offset current, and voltage gain.
The LM119A and LM119 are specified from -55'C to
+ 125'C, the LM219 is specified from - 25'C to + 85·C,
and the LM319A and LM319 are specified from O'C to
+70'C.
Features
• Two independent comparators
• Operates from a single 5V supply
Connection Diagrams
Typical Applications*
Dual-In-Line-Package
Relay Driver
21V
GND I
J
+INPUT 1 4
INPUTS
11 V·
ID -INPUT 2
-INPUT I 5
v- 6
I~""L....L-
9 +INPUT 2
'----t-B
DUTPUTZ 7
GND2
TLlH/5705-5
TLlH/5705-4
Top View
Order Number LM119AJ, LM119J, LM219J,
LM319AJ, LM319J, LM319AM, LM319M, LM319AN or
LM319N
See NS Package Number J14A, M14A or N14A
Window Detector
r---+--5V
500
>'"'"4....-TTl
OUTPUT
Metal Can Package
VON
V·
VOUT
VUT
VOUT
TL/H/5705-7
Case is connected to pin 5 (V-)
~
5V for
VLT ,;; V,N ,;; VUT
~
0 for
V,N ,;; VLT or V,N ;, VUT
Top View
Order Number LM119AH, LM119H,
LM319AH or LM319H
See NS Package Number HIDC
TL/H/5705-6
*Pin numbers are for metal can package.
5-34
r-
:s:::
.....
.....
Absolute Maximum Ratings LM119A1119/219
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 7)
Total Supply Voltage
Output to Negative Supply Voltage
Ground to Negative Supply Voltage
Operating Temperature Range
LMI19A,LMI19
LM219
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
Soldering Information
Dual·ln·Line Package
Soldering (10 seconds)
Small Outline Package
Vapor Phase (60 seconds)
Infrared (15 seconds)
36V
36V
25V
lBV
±5V
Ground to Positive Supply Voltage
Differential Input Voltage
Input Voltage (Note 1)
ESD rating (1.5 kO in series with 100 pF)
Power Dissipation (Note 2)
±15V
BOOV
500mW
Output Short Circuit Duration
- 55"C to 125"C
- 25"C to 85"C
-65"Cto 150"C
.....
CD
260"C
:s:::
I\)
.....
215"C
220"C
Min
Typ
Max
Min
Units
Typ
Max
Input Offset Voltage (Note 4)
TA
25"C, Rs s; 5k
0.5
1.0
0.7
4.0
mV
Input Offset Current (Note 4)
TA
25"C
20
40
30
75
nA
25"C
150
500
150
500
Input Bias Current
Voltage Gain
Response Time (Note 5)
25"C (Note 6)
25"C, Vs
20
= ±15V
= 25 mA
Saturation Voltage
VIN s; -5 mY, lOUT
TA = 25"C
Output Leakage Current
VIN ;;?: 5 mY, VOUT
TA = 25"C
Input Offset Voltage (Note 4)
RS
S;
BO
0.75
5k
Vs = ±15V
V+ = 5V,V-
-12
1
=0
V+ ;;?: 4.5V, V- = 0
VIN s; -6 mY, ISINK s; 3.2 mA
TA;;?: O"C
TA s; O"C
Output Leakage Current
Positive Supply Current
V/mV
80
ns
1.5
0.75
0.2
2
0.2
1.2
2.0
1.5
V
VIN ;;?: 5 mY, VOUT = 35V,
V- = VGND = OV
2
IJ-A
7
mV
75
100
nA
1000
1000
nA
±13
+12
3
V
V
-12
1
±13
+12
3
0.23
0.4
0.6
0.23
0.4
0.6
V
V
1
10
1
10
IJ-A
±5
Differential Input Voltage
Positive Supply Current
nA
40
= 35V
Input Bias Current
Saturation Voltage
10
40
Input Offset Current (Note 4)
Input Voltage Range
= 25"C, V+ = 5V, V- = 0
TA = 25"C, Vs = ±15V
TA = 25"C, Vs = ±15V
TA
4.3
8
±5
4.3
11.5
B
V
mA
11.5
mA
Negative Supply Current
3
4.5
4.5
3
mA
Note 1: For supply voltages less than ± 15V the absolute maximum input voltage is equal to the supply voltage.
Note 2: The maximum junction temperature of the LMl19A and LM119 is 150"C, while that of the LM219 is 110·C. For operating at elevated temperatures, devices
in the H10 package must be derated based on a thermal resistance of 160"C/W. junction to ambient, or 19°C/W, junction to case. The thermal resistance of the
J14 package is 100·C/W, junction to ambient
Note 3: These specifications apply for Vs ~ ±15V, and the Ground pin at ground, and -55·C ,;; TA ,;; +125·C, unless otherwise stated. With the LM219,
however, all temperature specifications are limited to - 25°C
~
CD
.......
r-
:s:::
Co)
.....
~
.......
r-
:s:::
Co)
.....
CD
LM119/LM219
LM119A
Conditions
=
=
TA =
TA =
TA =
.......
r-
Electrical Characteristics (Note 3)
Parameter
r-
:s:::
.....
260"C
See AN·450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
10 sec
~
.......
TA ::;;;
+ 8SoC. The offset voltage, offset current and bias current specifications apply for any supply
voltage from a single 5V supply up to ± 15V supplies. Do not operate the device with more than l6V from ground to Vs.
Note 4: The offset voltages and offset currents given are the maximum values required to drive the output within a volt of either supply with a 1 rnA load. Thus,
these parameters define an error band and take into account the worst case effects of voltage gain and input impedance.
Note 5: The response time specified (see definitions) is for a 100 mV input step with 5 mV overdrive.
Note 6: Output is pulled up to 15V through a 1.4 k!l resistor.
Note 7: Refer to RETS119X for LM119H/883 and LM119J/883 specifications, RETS119AX for LM119AH/883 and LM119AJ/883 specifications.
5-35
....
Q)
('I)
Absolute Maximum Ratings LM319A1319
.....
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications•
Total Supply Voltage
36V
:e
-I
....~
('I)
:e
-I
.....
Output to Negative Supply Voltage
Ground to Negative Supply Voltage
36V
25V
N
Ground to Positive Supply Voltage
Differential Input Voltage
18V
±5V
....
....
Input Voltage (Note 1)
Power Dissipation (Note 2)
-I
Output Short Circuit Duration
ESD rating (1.5 kn in series with 100 pF)
....
Q)
:e
-I
.....
Q)
:E
~
........
:E
-I
Operating Temperature Range LM319A, LM319 O'C to 70'C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
Soldering Information
Dual-In-Line Package
Soldering (10 sec.)
Small Outline Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
±15V
500mW
10 sec
800V
-65'Cto 150'C
260'C
260'C
215'C
220'C
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
Electrical Characteristics (Note 3)
Parameter
LM319
LM319A
Conditions
Min
Typ
Max
Min
Typ
Units
Max
Input Offset Voltage (Note 4)
TA = 25'C, Rs s; 5k
0.5
1.0
2.0
8.0
mV
Input Offset Current (Note 4)
TA = 25'C
20
40
80
200
nA
Input Bias Current
TA = 25'C
150
500
250
1000
Voltage Gain
TA = 25'C (Note 6)
Response Time (Note 5)
TA = 25'C, Vs = ±15V
Saturation Voltage
VIN s; -10 mV,loUT = 25 mA
TA = 25'C
0.75
1.5
0.75
1.5
Output Leakage Current
VIN :2: 10 mV, VOUT = 35V,
V- = VGND = OV, TA = 25'C
0.2
10
0.2
Input Offset Voltage (Note 4)
Rs s; 5k
20
40
80
Input Offset Current (Note 4)
Input Bias Current
Input Voltage Range
V/mV
80
ns
p.A
10
mV
300
300
nA
1200
nA
3
V
V
0.4
V
±13
3
0.3
Positive Supply Current
TA = 25'C, V+ = 5V, V- = 0
4.3
Positive Supply Current
TA = 25'C, Vs = ±15V
Differential Input Voltage
1
0.4
0.3
±5
8
V
10
1000
1
nA
40
10
±13
Vs = ±15V
V+ = 5V, V- = 0
V+ :2: 4.5V, V- = 0
VIN s; -10 mV,IslNK ,;; 3.2 mA
Saturation Voltage
8
±5
4.3
12.5
8
V
mA
12.5
mA
Negative Supply Current
5
3
mA
TA = 25'C, Vs = ±15V
3
5
Note 1: For supply voltages less than ± 15 the absolute maximum input voltage is equal to the supply voltage.
Note 2: The maximum junction temperature of the LM319A and LM319 is BS'C. For operating at elevated temperatures, devices in the Hl0 package must be
derated based on a thermal resistance of 160°C/W, junction to ambient, or 19oC/W, junction to case. The thermal resistance of the N14 and J14 package Is
100'C/W, iunction to ambient. The thermal resistance of the M14 package is 115'C/W, junction to ambient.
Note 3: These specHications apply for Vs = ± 15V, and O'C ,;; TA ,;; 70'C, unless otherwise stated. The offset voltage, offset current and bias current
specifications apply for any supply voltage from a single 5V supply up to ± 15V supplies. Do not operate the device wHh more than 16V from ground to Vs.
Note 4: The offset voltages and offset currents given are the maximum values required to drive the output wHhin a volt of eHher supply with almA load. Thus,
these parameters define an error band and take into account the worst case effects of voltage gain and input impedance.
Note 5: The response time specified is for a 100 mV input step with 5 mV overdrive.
Note 6: Output is pulled up to 15V through a 1.4 kn resistor.
5-36
r-
is:
.....
.....
Typical Performance Characteristics LM119A1LM119/LM219
CQ
I nput Currents
Common Mode Limits
y'
250
VS· +'5V
!
~
~
~
200
i' ......
alsI-
ISO
100
50
~
... -0.8 i-t-+--P~:+-1""_1.::::I
i -1.2 I-t-T'--t--r-+""'I'..,.j-t---l
--
--rFt-
~
o
40
-D.4
::;
g-1.6
~
I-f-'+--t---t---t--t---i--'F--I
~ 1.2
~
>
I
'\' '2.0mv
4.0
2QmV
",'"
3.0
t -'t~Oa.V
\
2.0
1.0
Vs=:!:15V
RL ·50Dn
v++= 5.0V
TA "ZsOC
2...
~
~
/.
1.0
-50
......
~~
50
>
~~
3.0
2. 0 -
ZO~V'
I. 0
:>
... 5
",,,,
a..U
!!~
,
\ 1\
Vs· "5V
RL '" SOOn
y++" S.GV
I~A·2~·C
S.OmY
...
'"~
'">
l.OmY
.slOG
-50
~i
50
6
0
!! ...
>
50 100 1511 200 250 300 350
~
5.0
I
4.D
5.DmV
Vs =5.0V
RL -500n
y++ = 5.0V
TA " Z5 C
5
G
10
15
20
S 15
~~ 10
I--~-!---l+--+---i
Ii'"
5.0
I--I--~'i-+--+---i
I--I-><+!:,--+--+---I
0.2
0.4
0.5
0.8
1.0
OUTPUT VOLTAGECV!
Output Limiting
Characteristics
1.2
120
1
...
100
1.0
;!J
z
!
!i
Il!
8D
0.8
~
8.0
S
&0
o.d!'"
5
5.0
10
r--i--t--if,f--+---i
50 100 150 200 250 300 350
~
i1:
:;!
~ 4.0
SUPPLY VOLTAGE C,VI
B.O
8.0
~
Z.D
2.0
I
Supply Current
10
!i
-
If]"-
Supply Current
12
-2.0
20
,g
I
TIMECns)
10
-&.0
Output Saturation Voltage
¢
2.0mV
~
0
C
I
I
DIFFERENTIAL INPUT VOLTAGE (V)
II
TIME (nsl
C
~
0
12
•.0
Il
1.0
;;
I.
20m¥
2.0
0
0
>
5.0
4.0
0
>
CQ
25
",'"
~
3.0
...
c: -100
5
-10
Response Time for Various
Input Overdrives
...
"'
1
1
U 4D
OA
Ii:
'"
ili
2.0
D.Z
20
:!
i
J
0
-55 -35 -15 5.0 25 45 55 85 105 125
TEMPERATURE C·CI
5.D
10
OUTPUT VOLTAGE CVI
TL/H/S70S-2
5-37
.....
CQ
.......
ris:
Co)
.....
I-r-jM.U::~TD~:~~:~~'IMt- 1-150 100 150 200 250 300 350
TIME los}
... ;;-
I
I
r-
is:
N
CQ
--t'"
I
CQ
.......
l>
.......
ris:
Co)
I
1
is:
.....
.....
.....
1.0
Input Characteristics
6.0
1\
G.6
-100
o
Response Time for Various
Input Overdrives
4.0
D.2
fA = ZS"C
50 100 ISO ZOO 250 300 350
Vs -S.GV
RL'"SDOn
V++= 5.DV
-0.2
2.0mV
l./I
TlMElnsl
5.0
5.0
-0.&
3
1.0
DIFFERENTIAL INPUT VOLTAGE (mY)
1'/
2.0
- ~ -'00
~
S
!;:i'
~c
"'Q~...
-1.0
2.0
~j.i
r-~:: ~~~~
~100
5
--
o
ZOmV 11-1 _5.0mV
3.0
0
o
I
10
~r
4.0
o
:>
~i
15
400
5.0
5.0
o
;;
...>
'"~
i
4.0 ~
~
3.0 ~
20
Response Time for Various
Input Overdrives
5.0
5.0
I.'
TEMPERATURE I·CI
Response Time for Various
Input Overdrives
&.0
y++. S.W
25
y-55 -35 -15 5.0 25 45 65 85 105 125
TEMPERATURE C·CI
... ;;I!:~
"' ...
'"6
.~
...
1.0
I
TA ·25°&
~ 5.0
0.8
-55-35-155.025456585105125
5.0
~
r-
y++-36V
RL"'Ukn
3D
'";:
'"
0.4
1-1--
:E
.......
8.0
Vs '":!:'5V
35
~
: -2.0
l>
Transfer Function
Typical Performance Characteristics LM319A. LM319
Input Currents
Supply Currents
300
12
Transfer Function
'0 r-~~~r-r-r-T"""T""""""" 8.0
r--r-'~-r-,---r-'--'
t- r2SO
1
....
-
BIAS
200
~
il
....
~
1
OFFSET
t-010
2D
I--I--I-+--il-+--i-"
-
4.0
3.0
20mV
304050
60
10
20
2.0
">
I
\'" i'\5.0mV
~4.0
V++: S.oV
TA·25°C
~ l.O
2.0
c:>
_
>
;;
~~
~!!! ....~
-so
- ~ -100
S
~
>
o
II"
~v rr
I-i f-
1.0
'UI
0
50mV
. - f--
:~
~ ....
"S>
2.0
S.DmV
1.0
;;
'"
....
"'W
IL c::t
:!~
,"
1.0
-50
o
50 100 150 200 2S0 300 350
v'
~-O.8
~-I.Z
8.0
6.01-+-+--h;f'--+--t-+-l
~ '.0 I-+~"-I-
~
""t=--+-+-+-I-;
-
IS
SUPPLY VDL TAGE I,VI
20
I
i
I
I
1_·l\:::,O~~~~:~i'"All f - -
-6.0
-2.0
2.0
6.0
'...."
~ 15
Vs
~
S.Oy
RL
"
soon
~~
~
TA
" .0
= 2S"C
I
I
10
3D
'0
/
VV
02
04
06
O.B
1.0
Output Limiting
Characteristics
120
1100
I I
50
TEMPERATURE I'CI
&0
r--y---r--.,--,....,.~-"
1.2
f--ff'r-+--+--t-~---I
1.0
tii
O.8~
i&O
0.6!
O.4~
~
t:
~ 20
10
i
~ao
ti40
I I I I
20
r--
-
/
OUTPUT VOL TAGE (V)
0.8 ~Vs=.!15V;Vs+ ;;5.0V.Vs- =0
o
~25·C
TA
li .+15V
INPUT OVERDRIVE - SOmV
I I I I
0.'
!
10
V"+" S.Oy
I-- _v~l
'I
10
Output Saturation Voltage
/
REFERRED TO SUPPl Y VOLTAGES
~-2.0
V-
S.O
10
-
~-1.6
~
I
Oi 20
I V.!.5.0~.V)'0
~ 1.2
2.01--b......
I
DIFFERENTIAL INPUT VOLTAGE IVI
Common Mode Limits
-0.'
H-
-10
TIME Ins)
Supply Current
~
Vs ~ :15V
Rl = soon
SO 100 ISO 200 250 300 350
TIME Insl
1
~
r
c--
-100
g-100
o
1.0
,
_rl'"
I,I
II
I
4
SO 100 150 200 250 300 35D
I II' '/1
20mV I
2.DmV
1111 I
JJT S.OmV
.J.J.
4.0
"'
>
0.6
25
== ~ 3.0
o ....
C; 2.0
2.0 mY
0.2
Vs -::!;ISV
TA '" 25"C
Response Time for Various
Input Overdrives
~O
,"\. •• 25;C
\
-0.2
Input Characteristics
0
o
~~
-0.6
:s
DIFFERENTIAL INPUT VOL lAGE (mY)
6.0
RL = SOon
V++ ... S.GY
20mV \
-1.0
TlME(nsl
1\
I-
1.0
TA = 25'C
50 100 ISO 200 250 300 3SO
Vs :5.BV
'.0
3.0
70
V", 50V
50
Response Time for Various
Input Overdrives
;;
60
I
I II
II, Z.OmV
TlME(nsi
6.0
5.0
50
'00
..s 100
E
.... ;;;
40
Response Time for Various
Input Overdrives
6.0
5.0
\
1.0
3D
TEMPERATURE ( C)
Vs=±15V
RL =500n
:-\.2.0mV
1\
2.0 :E
a =~_~l'CLJL.L..I-L--l
10
6.0
,,~
. ~
3.0 ~
5.0
0
:i
40""
~ 10
2.0
Response Time for Various
Input Overdrives
[\
II
II.
~ 15
4.D
TEMPERATURE (Oe)
5.0
5.0
:,,~zo
-
I
50
...."'~
~"
"'.... "....
% 25
B6.0 I-+--I-+--if-+--i--.,
~
~~:!;~U++-h""''''''=!==11.0 g
I--'f--t=-'i-j-h~+V+-'+'-5.-fOV--i 6.0 ~
35
G 3D
~
>-
100
;;
~
10 f--r--f--r~---r~--,
PDSITIVE SUPPLY, Vs -±15V
.... 80
ISO
v++= laV
Vs= !15V
Vs =±15V
0.2
5.0
10
DUTPUT VDLTAGE IVI
TLIHIS7DS-3
5-38
en
n
::r
CD
Rl
3.5k
.----.,,,,,,w.,
'"
'"
3
,
...
I»
y+
(;"
C
D)"
co
""l
I»
3
.PUTS{ -
R12
13k
R8
2k
TO OTHER
U1
HALF
<'"
R9
18k
'"
II
Q2
R25
600
,OUTPUT
R24
250
R21
900
R17
3
•
v'Do not operate the LM119 with more than 16Y between GND and Y+
GND
TLlH/5705-1
6~EW1/"6~EWl/6~Z;Wl/6~ ~W1/"6~ ~Wl
~ r---------------------------------------------------------------------------~
C)
~ ~National
~ .~ Semiconductor
.....
C)
~
~
:::a:
....I
......
~
C')
C')
:::a:
LM 139/LM239/LM339/LM 139A/LM239A/LM339AI
LM2901/LM3302 Low Power Low Offset Voltage
Quad Comparators
....I
...... General Description
The LM 139 series consists of four
~
C')
~
:::a:
....I
......
~
C')
.....
:::a:
....I
......
~
C')
C')
:::a:
....I
......
~
C')
~
:::a:
....I
G;
C')
.....
:::a:
....I
•
•
•
•
independent precision
voltage comparators with an offset voltage specification as
low as 2 mV max for all four comparators. These were designed specifically to operate from a single power supply
over a wide range of voltages. Operation from split power
supplies is also possible and the low power supply current
drain is independent of the magnitude of the power supply
voltage. These comparators also have a unique characteristic in that the input common-mode voltage range includes
ground, even though operated from a single power supply
voltage.
Eliminates need for dual supplies
Allows sensing near GND
Compatible with all forms of logic
Power drain suitable for battery operation
Features
• Wide single supply voltage range of dual supplies
LM139 series,
2 Voc to 36 Voc or
±1 Voc to ±lB Voc
LM139A series, LM2901
LM3302
2 Voc to 2B Voc
or ±1 Voc to ±14 Voc
• Very low supply current drain (O.B mAl - independent
of supply voltage
• Low input biasing current
25 nA
• Low input offset current
± 5 nA
and offset voltage
±3 mV
• Input common-mode voltage range includes GND
• Differential input voltage range equal to the power
supply voltage
250 mV at 4 mA
• Low output saturation voltage
• Output voltage compatible with TTL, DTL, ECL, MOS
and CMOS logic systems
Application areas include limit comparators, simple analog
to digital converters; pulse, squarewave and time delay generators; wide range VCO; MOS clock timers; multivibrators
and high voltage digital logic gates. The LM139 series was
designed to directly interface with TTL and CMOS. When
operated from both plus and minus power supplies, they will
directly interface with MOS logic- where the low power
drain of the LM339 is a distinct advantage over standard
comparators.
Advantages
• High precision comparators
• Reduced Vas drift over temperature
Schematic and Connection Diagrams
Dual-In-Line Package
v'
OUTPUT J OUTPUT 4
GNO
OUTPUT'Z OUTPUT I
v'
INPUT..
INPUT 4-
INPUT J.
INPUT J-
OUTPUT
INPUT 1-
TOP VIEW
INPUT ,.
INPUT Z-
.NPUT Zt
TL/H/5706-2
Order Number LM139J, LM139AJ, LM239J, LM239AJ,
LM339J, LM339AJ, LM2901J or LM3302J
See NS Package Number J14A
Order Number LM339AM, LM339M or LM2901M
See NS Package Number M14A
Order Number LM339N, LM339AN,
LM2901N or LM3302N
See NS Package Number N14A
TLlH/5706-1
5-40
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. (Note 10)
LM 139/LM239/LM339
LM139/LM239/LM339
LM139A1LM239A1LM339A
LM3302
LM139A1LM239A1LM339A
LM3302
LM2901
LM2901
Supply Voltage, V+
36 VOC or ± 1B VOC
2B VOC or ± 14 Voc
Operating Temperature Range
-40'Cto +B5'C
LM339/LM339A
O'Cto +70'C
Differential Input Voltage (Note B)
36VoC
2BVoc
LM239/LM239A
- 25'C to + B5'C
Input Voltage
-0.3 Vocto +36 VOC
-0.3 VOC to + 2B VOC
- 40'C to + B5'C
LM2901
Input Current (VIN< -0.3 VOc),
LM139/LM139A
- 55'C to + 125'C
(Note 3)
50mA
50mA
Soldering Information
Power Dissipation (Note 1)
Dual-ln·Line Package
Molded DIP
1050mW
1050mW
Soldering (10 seconds)
.Q60'C
260'C
Cavity DIP
1190mW
Small Outline Package
Small Outline Package
760mW
Vapor Phase (60 seconds)
215'C
215'C
Output Short-Circuit to GND,
Infrared (15 seconds)
220'C
220'C
(Note 2)
Continuous
Continuous
See AN·450 "Surface Mounting Methods and Their Effect on Product Reliability" for
Storage Temperature Range
- 65'C to + 150'C
- 65'C to + 150'C
other methods of soldering surface mount devices.
Lead Temperature
ESD rating (1.5 kfl in series with 100 pF)
600V
600V
(Soldering, 10 seconds)
260'C
260'C
Electrical Characteristics (V+ = 5 VOC, TA =
<11
~
Parameter
25'C, unless otherwise stated)
LM139A
Conditions
Min Typ
Input Offset Voltage (Note 9)
Input Bias Current
IIN( +) or IIN( -) with Output in
Linear Range, (Note 5), VCM=OV
Supply Current
RL =
RL =
00
00,
Voltage Gain
RL:215 kfl, V+ = 15 Voc
Vo= 1 Voct011 VOC
Large Signal
Response Time
VIN = TTL Logic Swing, VREF=
1.4 Voc, VRL = 5 VOC, RL = 5.1 kfl,
Response Time
VRL = 5 Voc, RL =,5.1 kfl,
(Note 7)
Output Sink Current VIN(-)= 1 Voc, VIN(+)=O,
-
----
-
Vo";1.5\/.~_
Max
LM139
Min Typ
Max
LM239, LM339
Min Typ
Max
LM2901
Min Typ
Units
MinTyp
Max
±2.0
±1.0
±2.0
±2.0
±5.0
±2.0
±5.0
±2.0
±7.0
±3
±20
mVoc
100
25
250
25
100
25
250
25
250
25
500
nAoc
±25
±5.0
±50
±3.0
±25
±5.0
±50
±5
±50
±3
±100
nAoc
V+-1.5 0
O.B
V+ -1.5 0
2.0
O.B
1.0
V+ -1.5 0
O.B
1.0
2.0
2.5
2.0
2.5
V+-1.5 0
O.B
1.0
2.0
2.5
V+ -1.5 0
O.B
1.0
50 200
50 200
50 200
50 200
25 100
300
300
300
300
1.3
1.3
1.3
1.3
6.0
LM3302
Max
25
0
on all Comparators,
V+ =36V, (LM3302, V+ =2B Vocl
LM239A, LM339A
Min Typ
±1.0
±3.0
Input Offset Current IIN(+)-IIN(-), VCM=OV
Input Common· Mode V+ =30 Voc (LM3302, V+ =2B Vocl
Voltage Range
(Note 6)
Max
16
6.0
16
6.0
,---
--
16
6.0
---
16
6.0
2.0
2.5
V+-1.5 Voc
O.B
1.0
2
2.0
2.5
mAoc
mAoc
30
V/mV
300
300
ns
1.3
1.3
,",S
16
6.0 16
mAoc
-
~OEE/III1/~06~lI\Il/"6EEll\ll/"6E~lI\Il/"6E~lI\Il/6EEll\ll/6E~lI\Il/6E~lI\Il
II
LM 139/LM239/LM339/LM 139A1LM239A1LM339A/LM2901/LM3302
Electrical Characteristics (Y+ = 5 YOC, TA =
Parameter
Conditions
Max
400
YIN(-)=l YOC, YIN(+)""O,
ISINK:>:4 mA
250
Output Leakage
Current
VIN(+)=l YOC,YIN(-)=O,
Yo= 5YOC
'
0.1
Electrical Characteristics (Y+
LM239A, LM339A
Min 'Typ
Saturation \/,oltage
Parameter
25°C, unless otherwise stated) (Continued)
LM139A
LM139
Typ
Max
250
400
Min
0.1
LM239, LM339
Typ
Max
250
400
Min
0.1
LM2901
Typ
Max
250
400
Min
0.1
LM3302
Typ
Max
250
400
Min
0.1
Units
Typ
Max
250
500
0.1
mYOC
nAOC
=,5,0 YOC, Note 4)
LM139A
Conditions
Min Typ
Max
LM239A, LM339A
Min Typ
Max
LM139
Min Typ
Max
LM239, LM339
Min Typ
Max
LM2901
Min Typ
Max
LM3302
Min Typ
Units
Max
Input Offset Yoltage
(Note 9)
±4,0
±4,0
±9,0
±9,0
±9
±15
±40
mYOC
Input Offset Current-
IIN(+)-IIN(-), YCM=OY
±100
±150
±100
±150
±50
±200
±300
nAOC
Input Bias Current
IIN(+) or IIN(-) with Output in
Linear Range, YCM = OY (Note 5)
300
400
300
400
200
500
1000
nAOC
-
U1
Min
Input Common-Mode
Yoltage Range
Y+ = 30 YOC (LM3302, Y+ = 28 Yocl
(NoteS)
Saturation Yoltage
YIN(-)=l YOC, YIN(+)=O,
ISINK:>:4mA
0
Y+ -2,0
0
Y+ -2,0 0
Y+ -2,0
Y+ -2,0 0
Y+ -2,0 0
Y+ -2.0 YOC
J,..
I\)
700
700
700
700
Output Leakage Current YIN(+)= 1 YOC, YIN(-)=O,
Yo=30 YOC, (LM3302, Yo=28 Yocl
1,0
1.0
1.0
Differential Input Yoltage Keep all YIN'S~O YOC (or Y-,
if used), (Note 8)
36
36
36
400
700
700
mYOC
1.0
1.0
1,0
!LAOC
36
36
28
YOC
Note 1: For operating at high temperatures, the LM339/LM339A, LM2901, LM3302 must be derated based on a 125°C maximum junction temperature and a thermal resistance of 95°C/W which applies for the device soldered in a
printed circuit board, operating in a still air ambient. The LM239 and LM139 must be derated based on a 150°C maximum junction temperature. The low bias dissipation and the "ON-OFF" characteristic of the outputs keeps the chip
dissipation very small (PDS:100 mW), provided the output transistors are allowed to saturate.
Note 2: Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output current is approximately 20 rnA lndependentof the magnitude of V+.
Note 3: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode
clamps. In addition to this diode action, there is also lateral NPN parasitiC transistor action on the Ie Chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large
overdrive) for the time dlfation that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a valve greater than -0.3 Voc (at 25°)C.
Note 4: These speCifications are limited to - 55°C::S;;TA::S;; + 125°C, for the LM139/LM139A. With the LM239/LM239A, all temperature specifications are limited to - 25°C ~TA::S;;
are limited to O°C,;;TA';; +70"C, and the LM2901, LM3302 temperature range is -40"C';;TA';; + 85"C.
Note 5: The direction of the input current is out of the
+ 85°C, the LM339/LM339A temperature specifications
Ie due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the reference or input lines.
Note 6: The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of the common-mode voltage range is V+ -1.5V at 25"C, but either or both inputs can go
to +30 Vac without damage (25V for LM3302), independent of the magnitude of V+.
Note 7: The response time specified is a 100 mV input step with 5 mV overdrive. For larger overdrive signals 300 ns can be obtained, see typical performance characteristics section.
Note 8: Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the comparator will provide a proper output state. The low input voltage state
must not be less than -0.3 Vac (or 0.3 Vac below the magnitude of the negative power supply, if used) (at 25°C).
Note 9: At output switch point, VO~1.4 Voc, RS=On with V+ from 5 Voc to 30 Voc; and over the full input common-mode range (0 Voc to V+ -1.5 Vod, at 25°C. For LM3302, V+ from 5 VOC to 28 Voc.
Note 10: Refer to RETS139AX for LM139AJ military specifications and to RETS139X for LM139J military specifications.
----_ ... -
---
- -
--
Typical Performance Characteristics
Supply Current
1.0
;(
.s....
ffi
OA
~
0.2
::;
I--T~
"]
-::7 ~ -t::~5"C
0.6
~
1l
Input Current
80
TA ' -55"C....j.- I -
0.8 ~
,
1/
TA
.,.
::
o
o
!....
60
. ....~
.
10
I
I RL"
20
~
w
;!
'"
~>
1.0
40
T7:-1c
~
0.1
20
T -+125"~
~
t
I I
40
30
10'n
R1NICMI
T~ = -~5"C
.3
--
V 1N ICM) '" 0 VDC
"]
10
SUPPLY VOLTAGE IVDcI
\.
S 0.01
TA ," +2~oC
,·=tcl-
20
30
I
o
>
0.001 1£.<
~
,,-
100
~.§
> z
50
I
~
I
.."
40
0.'
~
w
'""~
~
20
..
Q
o
40
o
i=
.J.-T. -+8S"C- -
-
TA _+25°C_
"g;....
oj
I
10
20
0.001
40
3D
~
"
Q
2.0
1.0
6.0
100mV
~
~~I?'=
....
"
~Q>
"".....
,,>
'.'-
:
-
I
I
I
I
I
I
1.0
1.5
5.0
4.0
"
INPUTOVERORIVE =.100 mV
r
~
2.0
Q
1.0
~
0
C:.§
>
~J
~
rl
I
20 mV
Ji.! ,~.=
.
'...
I
I
I
_
I
1.0
TIME ("secl
TIME ",...1
5·43
r
I
II
50 -l-jA =12S"~-
0.5
2.0
I I
15 mV
ft
3.0
~S 100
~)25"~
'j
0.5
100
10 , OUTPUT SINK CURRENT ImAI
Response Time for Various
Input Overdrives-Positive
Transition
5.0 mV -INPUT OVERDRIVE
20~
10
0.1
0.01
Response Time for Various
Input Overdrives-Negative
Transition
~>
>.... D 3.0
,,>
0.01
:;
I
V'. SUPPLY VOLTAGE IVDcl
V'. SUPPLY VOLTAGE IVDcl
,I.
8.1
Q
j
D.'
1
r-
f-TA-i C -
>
~
ii:
TL/H/S706-6
Output Saturation Voltage
TA! DoC
a;
6.0
5.0
4.0
2.0
LM2901
60
~
~
1.0
~
or
....
I
1.5
10 r--.,.....---r--~r-...,
-
!....
3D
I
1.0
Input Current
20
'ft.
_
TIME "'...1
80
10
.
I
0.5
Supply Current
.it
"J?:=
Ji.!
r- rjA =125"~-
~>
Typical Performance Characteristics
.~
r
II I I
20 mV II
TlME",socl
"ffi
I I
ISmV
ft
>- 3.0
~~
2.0
~
Q
1.0
'-'-
I
"
5.0
"Q>
~ ~25"~-
.s....
I--t--t--t-+-+-'-f'lf-t---l
g;
~I
TA .. +125°C"- I-
Output Saturation Voltage
10
I I
I I
ffi
+70°C
I
LM139/LM239/LM339, LM139A1LM239A1LM339A, LM3302
I
1.5
I
2.0
TLlH/S706-7
~
C
(f)
(f)
:E
....I
..........c
Q)
~
:E
....I
......
~
(f)
(f)
:E
....I
~
(f)
~
:E
....I
......
~
(f)
....
:E
....I
......
Q)
(f)
(f)
:E
....I
......
Q)
r---------------------------------------------------------------------------------,
Application Hints
The differential input voltage may be larger than V + without
damaging the device. Protection should be provided to prevent the input voltages from going negative more than -0.3
Voc (at 25'C). An input ·clamp diode can be used as shown
in the applications section.
The LM139 series are high gain, wide bandwidth devices
which, like most comparators, can easily oscillate if the output lead is inadvertently allowed to capacitively couple to
the inputs via stray capacitance. This shows up only during
the output voltage transition intervals as the comparator
changes states. Power supply bypassing is not required to
solve this problem. Standard PC board layout is helpful as it
reduces stray input-output coupling. Reducing this input resistors to < 10 kO reduces the feedback signal levels and
finally, adding even a small amount (1 to 10 mV) of positive
feedback (hystereSiS) causes such a rapid transition that
oscillations due to stray feedback are not possible. Simply
socketing the IC and attaching resistors to the pins will
cause input-output oscillations during the small transition intervals unless hysteresis is used. If the input signal is a
pulse waveform, with relatively fast rise and fall times, hysteresis is not required.
The output of the LM139 series is the uncommitted collector
of a grounded-emitter NPN output transistor. Many collectors can be tied together to provide an output OR'ing function. An output pull-up resistor can be connected to any
available power supply voltage within the permitted supply
voltage range and there is no restriction on this voltage due
to the magnitude of the )loltage which is applied to the V +
terminal of the LM139A package. The output can also be
used as a simple SPST switch to ground (when a pull-up
resistor is not used). The amount of current which the output
device can sink is limited by the drive available (which is
independent of V +) and the f3 of this device. When the
maximum· current limit is reached (approximately 16 mA),
the output transistor will come out of saturation and the output voltage will rise very rapidly. The output saturation voltage is limited by the approximately 600 RSAT of the output
transistor. The low offset voltage of the output transistor (1
mV) allows the output to clamp essentially to ground level
for small load currents.
All pins of any unused comparators should be grounded.
The bias network of the LM139 series establishes a drain
current which is independent of the magnitude of the power
supply voltage over the range of from 2 Voc to 30 Voc.
It is usually unnecessary to use a bypass capacitor across
the power supply line.
(f)
~
:E
....I
......
Q)
Typical Applications (V+
....
Basic Compa.rator
....I
v'
= 5.0 Voe>
(f)
:E
Driving CMOS
Driving TTL
+5.6 VDC
+5Vpe
Vo
TLlH15706-3
TLlH15706-5
TLIHI5706-4
AND Gate
OR Gate
V·
V·
39k
200k
3k
+O.075V
+0.375
lOOk
lOOk
A
A
lOOk
lOOk
lOOk
:':r
'·0" '., ••
3k
Ik
C
lOOk
I·A· 8· C
v::r
-=
··0" "I"
TLlHI5706-8
Ik
C
I ' A+8+C
-=
TLIH15706-9
5-44
.----------------------------------------------------------------------.r
3:
.....
Typical Applications (V+ = 15 Vocl (Continued)
Co)
CD
.....
r
One-Shot Multivibrator
3:
V'
I\)
Co)
CD
.....
r
3:
Co)
Co)
10k
ml.:::fPYilf""
1
>-4.....0
VO
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CD
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3:
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r3:
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1M
Co)
TUH/5706-10
;.....
r
3:
I\)
BI-5table Multivibrator
CD
o
.....
.....
r
V'
3:
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o
15k
I\)
51k
lOOk
5
.rc:
15V
V~
n.
>-4.....0vo R
lOOk
R o--'I/I,..,.....---t
TL/H/5706-11
One-Shot Multivibrator with Input Lock Out
y'
15k
lOOk
+y ..
--fE
o-~N""".---+--t
+4V
40
1",
.--'"=""- V·
.'.:=1 t=:: 0
10
D
>-4.....0
12k
1.
Vo
':'
TUH/5706-12
5-45
•
Typical Applications (V+ = 15 VOC) (Continued)
ORing the Outputs
V'
Large Fan-In AND Gate
v·
~""""'OVour
V' - - - , A
O
n-..........
-----t
---1
"0"
Your =A . 8· C . D
''1''
80-.........
co..........
04
On--w_..
I
ALL DIODES
IN9l4
TL/H/5706-13
Pulse Generator
TLlH/5706-15
15k
DI
RI
1M
INI14
R2
lOOk
IN914
*
D2
1M
* FDR LARGE RATIDSOF RIIR2.
01 CAN IE OMITTED.
TLlH/5706-17
5-46
r
Typical Applications
s:
....
(V+ = 15 Vocl (Continued)
Co)
CQ
.......
r
Time Delay Generator
s:
N
V'
Co)
CQ
.......
r
10k
15k
s:
3.0k
200k
Co)
~
r
10M
.......
s:
....
10k
Co)
r
~.
V3
t,
to
r
s:
N
Co)
~
.......
3.0k
51k
~
.......
~
10M
Co)
Co)
CQ
»
r
s:
N
10k
Ve ,
.......
CQ
v,
INPUT GATING SIGNAL
....
o
.......
r
V'
s:
Co)
Co)
o
l.Ok
V'
....
- ---------- -
51k
... --
N
10M
10k
v,
-1--
51k
TL/H/5706-14
Non-Inverting Comparator with Hysteresis
Inverting Comparator with Hysteresis
V'
-V RE •
(>------1
V'
+V'N o-----~
3k
3k
>-4I~-OVo
10k
V'
1M
o--"N
___-t
1M
TUH/5706-18
1M
TL/H/5706-19
5-47
~
CI
C")
C")
::::i!
,---------------------------------------------------------------------------------,
Typical Applications (V+ = 15 VDcl (Continued)
...J
......
....CI
Comparing Input Voltages
of Opposite Polarity
Squarewave Oscillator
en
~
::::i!
v'
V'
...J
~
lOOk
Uk
lOOk
C")
::::i!
...J
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v'
~PF
> .........OVO
on..f
I> 100kHz
C")
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> .....~OVo
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~
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S.lk
TL/H/5706-20
C")
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lOOk
tOOk
...J
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en
C")
lOOk
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;;;
TLlH/5706-16
C")
~
::::i!
Basic Comparator
...J
......
Output Strobing
v'
V'
en
C")
....
::::i!
...J
+VIN
3k
>-4~-Ovo
STROBE
+VREF
INPUT
TLiH/5706-21
TLlH/S706-22
'Or open-collector logic gate without pull-up resistor
Limit Comparator
Crystal Controlled Oscillator
V' lIZ Vocl
V'
ZOOk
Z.Ok
lOOk
V~.n..n
>-t....Ovo
TL/H/5706-24
TLlH/5706-2S
5-48
~
"n"e!.
l>
""2-n"
..
II)
Two-Decade High-Frequency veo
v'
0"
en
::J
v'
<:
+
lOOk
lOOk
II
~
500 pF
U1
a-
l.Ok
S.lk
+Vc
JU
FREOUENCV
CONTROL.
VOLTAGE
INPUT
O.O'PF
O.lpF
't.
T
~
•• 0
Q.
'§
3-
~.
OUTPUT I
g
v+JZ
CD
20k
OUTPUT 2
IVY
50k
V +/2
V+~+30VOC
+250 mVoc<:Ve<: +50 Voe
700 Hz<:fo <:100 kHz
TUH/5706-23
~OCCII\I'I ~06~W'/V6CCW'/V6C~W'/V6C ~ W'/6CCW'/6C~W'/6C ~W'
II
Typical Applications (V+ =5 VDC) (Continued)
Low Frequency Op Amp
(Vo = OV for VIN = OV)
Low Frequency Op Amp
V'
V'
15k
t
Vo
I
lOOk
1
1.0k
oM
.
Ay '100
lk
Ay'100
TLlH/5706-26
TL/H/5706-27
Zero Crossing Detector (Single Power Supply)
Transducer Amplifier
V'
V'
10k
MAGNETIC
PICKUP
lOOk
Uk
II
lOOk
i.lk
>"-OVo
ZOM
211M
10k
1111
TLlH/5706-30
TLIH15706-28
Low Frequency Op Amp with Offset Adjust
V'
OFFSET
AOJ.
V·
lOOk
RZ
v"
TLlH/5706-29
5-50
Split-Supply Applications
(V+ =
+ 15 Voc and V- =
-15 VOC)
MOS Clock Driver
y'
Uk
51k
B.2k
~1:;-.---o08
5.1k
5IIpF
Uk
yTL/H/5706-31
Comparator With a Negative
Reference
Zero Crossing Detector
y'
y'
5.IK
UK
>-411""'0 Yo
>-411.....0
Y'N
y-
Yo
yTLlH/5706-32
TLlH/5706-33
•
5-51
o ,------------------------------------------------------------------------.
~
:::i
...I
.....
o
~National
~ Semiconductor
LM 160/LM260/LM360 High Speed Differential
...I
.....
~ Comparator
CD
C'I
:::i
..... General Description
:5
Features
The LM160/LM260/LM360 is a very high speed differential
input, complementary TTL output voltage comparator with
improved characteristics over the ",A7601 ",A760C, for
which it is a pin-for-pin replacement. The device has been
optimized for greater speed, input impedance and fan-out,
and lower input offset voltage. Typically delay varies only
3 ns for overdrive variations of 5 mV to 400 mV.
Complementary outputs having minimum skew are provided. Applications involve high speed analog to digital convertors and zero-crossing detectors in disk file systems.
•
•
•
•
•
20 ns max
Guaranteed high speed
Tight delay matching on both outputs
Complementary TTL outputs
High input impedance
Low speed variation with overdrive variation
• Fan-out of 4
• Low input offset voltage
• Series 74 TTL compatible
Connection Diagrams
Dual-In-Line Package
Metal Can Package
V·
v'
OUTI
Nt
IN!
Dun
GNO
INI
V-
V-
TOP VIEW
TL/H/5707-4
TOP VIEW
Order Number LM160H, LM260H or LM360H
See NS Package Number HOSC
TL/H/5707-5
Order Number LM360M or LM360N
See NS Package Number MOSA or NOSE
Dual-In-Package
Nt
Nt
v'
12
NC
NC
NC
OUTPUT I
11
INPUT 2
OUTPUT!
GNO
Ne
v-
NC
10
IN'UT 1
TO' VIEW
Order Number LM160J-14, LM360J-14 or LM360N-14
See NS Package Number J14A or N14A
5-52
TL/H/5707-6
r-
Absolute Maximum Ratings (Note 5)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 7)
Positive Supply Voltage
+8V
-8V
Negative Supply Voltage
Peak Output Current
Differential Input Voltage
Input Voltage
ESD rating is to be determined.
Operating Temperature Range
LM160
-55'C to + 125'C
LM260
-25'Cto +85'C
O'Cto +70'C
LM360
Storage Temperature Range
- 65'C to + 150'C
Lead Temperature (Soldering, 10 sec.)
260'C
Soldering Information
Dual-In-Line Package
Soldering (10 seconds)
260'C
Small Outline Package
Vapor Phase (60 seconds)
215'C
infrared (15 seconds)
220'C
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
20mA
±5V
V+ ;:;, VIN;:;' V-
15:
.....
en
C)
......
r-
15:
I\)
en
C)
......
r-
15:
Co)
en
C)
Electrical Characteristics (TMIN"; TA"; TMAX)
Parameter
Conditions
Operating Conditions
Supply Voltage Vcc +
Supply Voltage Vcc
Input Offset Voltage
Min
Typ
Max
Units
4.5
-4.5
5
-5
6.5
-6.5
V
V
2
5
mV
0.5
3
/LA
5
20
/LA
25
20
ns
ns
ns
Rs"; 2000.
Input Offset Current
Input Bias Current
Output Resistance (Either Output)
VOUT = VOH
100
Response Time
TA = 25'C, Vs = ±5V (Notes 1, 6)
TA = 25'C, Vs = ± 5V (Notes 2, 6)
TA = 25'C, Vs = ± 5V (Notes 3, 6)
13
12
14
Response Time Difference between Outputs
(tpd of + VIN1) - (tpd of - VIN2)
(tpd of + VIN2) - (tpd of - VIN 1)
(tpd of + VIN1) - (tpd of + VIN2)
(tpd of -VIN1) - (tpd of -VIN2)
TA =
TA =
TA =
TA =
2
2
2
2
ns
ns
ns
ns
Input Resistance
f = 1 MHz
17
ko.
Input Capacitance
f = 1 MHz
3
pF
Average Temperature Coefficient of
Input Offset Voltage
Rs = 500.
8
",V/'C
7
nArC
±4.5
V
25'C (Notes 1, 6)
25'C (Notes 1, 6)
25'C (Notes 1, 6)
25'C (Notes 1, 6)
Average Temperature Coefficient of
Input Offset Current
Common Mode Input Voltage Range
±4
Vs = ±6.5V
Differential Input Voltage Range
0.
±5
Output High Voltage (Either Output)
lOUT = -320 ",A, Vs = ±4.5V
Output Low Voltage (Either Output)
ISINK = 6.4 mA
Positive Supply Current
Vs = ±6.5V
V
2.4
3
V
0.25
0.4
V
18
32
mA
-16
mA
-9
Negative Supply Current
Vs = ±6.5V
Note 1: Aesponse time measured from the SO% poinl of a 30 mVp·p 10 MHz sinusoidal inpullo Ihe SO% poinl of Ihe oulput.
Note 2: Aesponse time measured from Ihe SO% point of a 2 Vp.p 10 MHz sinusoidal input 10 the SO% point of Ihe, output.
Note 3: Response time measured from the start of a 100 mV input step with 5 mV overdrive to the time when the output crosses the logic threshold.
Note 4: Typical thermal impedances are as follows:
Cavity DIP (J):
Molded DIP (N):
OjA
OjA
Header (H)
13S'C/W
°iA
16S'C/W
67'C/W
°IC
2S'C/W
130'C/W
Note 5: The device may be damaged if used beyond the maximum ratings,
Note 6: Measurements are made in AC Test Circuit, Fanout = 1
Note 7: Aefer 10 AETS 160X for LMI60H. LM160J·14 and LM160J military specifications.
5-53
(SliIIAir)
(400 LF/min Air Flow)
•
Typical Performance Characteristics
Input Currents vs Ambient
Temperature
Offset Voltage
4
Y+"'+5V
;;
..~
3.6
J
V-·-SV
oS 3.2
c
>
~
....
~
~
7
6
"....
V
2.8
2.4
2
V-
1.6
./
1.2
.3
4
~
a:
1:
....
3
~
~
V
"oS....
IB
~
~
10
.~
.
]
e>
y+"" +5V
!;i
~
e>
--
If
25 45 65 85 105 125
60.
SJE
.."'
co
=
e>
>
2
I
s-
o
"'
co
150
oS
~
>
5
'"
2
--
I
-5 -4 -3 -2 -I
50
.
3D l - I -
*
10
]
tpoill
30 I -
I-FANI~
20
iY
./
V
tpOIOI
I
FANOUT -I
10
2
'IfI
-
I-
"""'~
"~..
f-0UTlUfZ
15V
iTT
~FArOUIT'l
-10
-55 -35 -IS 5 25 45 65 85 IDS 125
Y,N
OV ~UT2
l¥l
,,_I
OUTPUT I
._ ' -
I
C
I I
0
40
....
LMI6
INPUT I
80
120
160
TlME(..)
TL/H/5707-2
V'N~
±50 mV
FANOUT~
V+~+5V
R~2.4k
V-~-5V
C~15
5-54
pF
1 FANOUT~4
R~630n
C~30
pF
TO
v+
R
1~~
OUTPUTZ
":'
130
V
AMBIENT TEMPERATURE I'C)
'OUT
.AI
lI-
AC Test Circuit
~'
140
J
I-
~AN!UT~4.w
0
AMBIENT TEMPERATURE ('CI
50"
3 4 5
I
SEE AC TEST CIRCUITBOTH OUTPUTS LOADED /
20
-55-35-15 5 25 45 65 85 105 125
rei
I
Delay of Output 1 With
Respect to Output 2 vs
Ambient Temperature
40 l - I -
50
40
0
DIFFERENTIAL INPUT VOLTAGE (VI
OUTPUT
~
e>
3
~
3
~
....
~
A~ TElT C,IRCJ,T- f - l - I -
Common-Mode
Pulse Response
~
4
25 45 65 85 IDS 125
0
7
AM81ENT TEMPERATURE
S
iii
I
e>
11
-55-35-15 5
6
....
r- ~
v-· -5V
10
+-- l -
8
....
~
I-
2
V-'-SV
7
.3
r-
Propagation Delay vs
Ambient Temperature
v-· -5V
11
9
"iii
f-
~
1.5
-55 -35 -15 5
y+=-+sv
16
~
r-
AMBIENT TEMPERATURE ('CI
r- r-
iii
2.25
Supply Current vs Ambient
Temperature
,.
-
Y+·+sv
B
BIIAS
i'
rei
AMBIENT TEMPERATURE
19
2.S
1.75
O.B
-55-35 -15 5 25 45 65 85 IDS 125
20
t-
s
Input Characteristics
9
":'
~,. INII'
F-
~ ~ IN91'
~ ..
_F- 'ND' •
':::-
TL/H/5707-3
Schematic Diagram
R7
lk
010
L..--4.....- - - < l
GNO
Rl
1450
+INPUTl
-INPUT20---I--.1
08
TL/H/5707-1
5·55
~ r-----------------------------------------------------------------------------------~
CD
C')
:!i
....I
"~
CD
C'II
:!i
....I
.....
~
CD
:s
~
~National
~ Semiconductor
LM 161/LM261/LM361
High Speed Differential Comparators
General Description
Features
The LM161/LM261/LM361 is a very high speed differential
input, complementary TTL output voltage comparator with
improved characteristics over the SE529/NE529 for which it
is a pin-for-pin replacement. The device has been optimized
for greater speed performance and lower input offset voltage. Typically delay varies only 3 ns for over-drive variations
of 5 mV to 500 mY. It may be operated from op amp supplies (± 15V).
•
•
•
•
•
•
•
•
Complementary outputs having maximum skew are provided. Applications involve high speed analog to digital converters and zero-crossing detectors in disk file systems.
Independent strobes
20 ns max
Guaranteed high speed
Tight delay matching on both outputs
Complementary TTL outputs
±15V
Operates from op amp supplies
Low speed variation with overdrive variation
Low input offset voltage
Versatile supply voltage range
Connection Diagrams
Dual-In-Line Package
Vee
STROBE I
13
114
Ne
12
OUTPUT I
"
GIO
Metal Can Package
v+
OUTPUT Z STROlE Z
•
10
•
~
r-
OUTPUT Z
TLlH/5708-3
I
Z
Nt
3
INPUT I
4
INPUT!
5
V-
Nt
Order Number LM161H, LM261H or LM361H
See NS Package H10C
17
&
Nt
TL/H/5708-2
Top View
Order Number LM161J, LM261J, LM361J,
LM361M or LM361N
See NS Package Number J14A, M14A or N14A
Logic Diagram
STROBE I
* Yee
OUTPUT 1
·Output is
low when
current is
drawn from
OUTPUT 2
strobe pin.
YTL/H/5708-4
5-56
r-
Absolute Maximum Ratings
Operating Conditions
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 4)
Positive Supply Voltage, V +
Negative Supply Voltage, V-
Min
Gate Supply Voltage, Vee
+7V
+7V
±5V
±6V
Output Voltage
Differential Input Voltage
Input Common Mode Voltage
Power Dissipation
Storage Temperature Range
-65'Cto + 150'C
Operating Temperature Range
LM161
LM261
LM361
Lead Temp. (Soldering, 10 seconds)
For Any Device Lead Below V-
TMIN
TMAX
- 55'C to + 125'C
-25'Cto +85'C
O'Cto +70'C
260'C
0.3V
Max
5V
5V
15V
15V
-6V
-6V
-15V
-15V
Supply Voltage Vee
LM161/LM261
4.5V
5V
5.5V
4.75V
5V
5.25V
LM361
ESD rating to be determined.
Soldering Information
Dual-In-line Package
Soldering (10 seconds)
260'C
Small Outline Package
Vapor Phase (60 seconds)
215'C
Infrared (15 seconds)
220'C
See AN-450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering surface mount devices.
600mW
Electrical Characteristics (V+
0)
Typ
r-
Supply Voltage V+
LM161/LM261
LM361
Supply Voltage VLM161/LM261
LM361
+16V
-16V
= + 10V, Vee = +5V, v- = -10V, TMIN ,;: TA';: TMAX, unless noted)
Limits
Parameter
Conditions
LM361
LM161/LM261
Min
Input Offset Voltage
Typ
Max
1
3
Min
5
Units
Typ
Max
1
5
mV
30
",A
",A
5
",A
",A
10
Input Bias Current
TA=25'C
Input Offset Current
TA=25'C
Voltage Gain
TA=25'C
3
3
V/mV
Input Resistance
TA=25'C,f=1 kHz
20
20
kO
Logical "1" Output Voltage
Vee = 4.75V,
ISOUReE= -0.5 mA
3.3
V
Logical "0" Output Voltage
Vee=4.75V,
ISINK=6.4 mA
0.4
0.4
V
Strobe Input "1" Current
(Output Enabled)
Vee=5.25V,
VSTROBE=2.4V
200
200
",A
Strobe Input "0" Current
(Output Disabled)
Vee=5.25V,
VSTROBE=0.4V
-1.6
-1.6
mA
Strobe Input "0" Voltage
Vee=4.75V
Strobe Input "1" Voltage
Vee=4.75V
Output Short Circuit Current
Vee=5.25V, VOUT=OV
20
2
2
3
2.4
2.4
3.3
0.8
2
-18
5-57
0.8
2
-55
....is:
....
.......
-18
V
V
-55
mA
is:
N
....
0)
.......
ris:
w
0)
....
...
CD
C')
::e:
-J
.........
Electrical Characteristics (Continued)
(V+ = +10V, Vee = +5V, V- = -10V, TMIN ,:; TA':; TMAX, unless noted)
CD
N
:E
......
-J
......
Limits
Parameter
Conditions
Min
CD
:E
-J
Typ
V+=10V, V-= -10V,
Vcc=5.25V,
-55"C,:;TA,:;125"C
Supply Current 1+
LM361
LM1611LM261
Max
Min
Typ
Units
Max
4.5
mA
V+=10V, V-= -10V,
Supply Current 1+
5
Vee=5.25V,
0"C,:;TA,:;70"C
mA
V+ =10V, V- = -10V,
Supply Current 1-
10
Vee=5.25V,
-55"C,:;TA,:;125"C
mA
V+ =10V, V-= -10V,
Vee=5.25V,
0"CS::TA':;70"C
Supply Current 1-
10
mA
V+=10V,V-=-10V,
Supply Current ICC
Transient Response
Propagation Delay Time (tpd(O»
Propagation Delay Time (tpd(1»
Delay Between Output A and B
Strobe Delay Time (tpd(o)l
Strobe Delay Time (tpd(1»
by USB
V,N = 50 mVoverdrive
(Note 3)
TA=25"C
TA=25"C
TA=25"C
TA=25"C
TA=25"C
14
14
2
8
8
beyond the maximum ratings.
Note 2: Typical thermal impedances are as follows:
HPackage
JPackage
165'C/W (Still Air)
112'C/W
BjA
67'C/W (400 LF/Min
AirFlow)
BjG
mA
V+ =10V, V- = -10V,
Vee=5.25V,
0"CS::TAS::70"C
Supply Current Icc
Note 1: The device may be damaged
18
Vee=5.25V,
-55"C,:;TA':; 125"C
NPackage
105'C/W
25"C/W
Note 3: Measurements using AC Test circuit, Fanout = 1. The devices are faster at low supply voltages.
Nole 4: Refer to RETS161X for LM161H and LM161J military specnications.
5-58
20
20
5
14
14
2
8
8
20
mA
20
20
5
ns
ns
ns
ns
ns
r-
:s:
....en
....
.....
r:s:
N
....en
.....
r:s:
w
Typical Performance Characteristics
Input Currents vs Ambient
Temperature
Offset Voltage
3.Z
Y"IOY _
r'
y-. -lOY
YCC'U5Y- 1----
:; Z.'
§.
::;
Z.'
.,~
f-
0-
1.6 f-
>
w
-
.,!£
1.2
..
0-
D.•
./
~
~
P
0.4
-~5
--I-----
/
1.1
If-
7-
f-
l!!
B
2.5
1------
1.15
Ie
..
~
Y~'IIOY
I
y-. -lOY
Ycc ·5.25Y
12
§.
11
0-
ill
y+ '10:;-'
Y-'-IOY
Vce - i.Z5V
-- I
I
I
>-
!
I- ~
I
I
- 1----."..:::;
Supply Current vs
Supply Voltage
16
14
e
.!
!
90
TA o 25°C
Vcc' 5.Z5V
ICC
L
-t"'"
io-~ 1-1--
~
10
g
80
z
..
l,+
~
.,:!
I
I
IE
I
50
1p01'J
r-r
4a
3D
20
10
o
I
Nr,Uf04
IIi~
./
"
~ I---1p0(0)
i-I FANOUTol
I
AM81ENT TEMPERATURE rc)
SUPPLY VOLTAGE IY+, V-I IV)
AMBIENT TEMPERATURE rCI
Delay of Output 1 With
Respect to Output 2 vs
Ambient Temperature
Strobe Delay vs Ambient
Temperature
50
70
45
40
t-::~":..-:I:-::!c:::-:!::-+---tH~
!
c>~
Q
30
H r-~+-+-4-~Ah~-r-1
Q
5
-55 -35-15 & 25 4& B& 1& 105 IZ5
1Dr-.--,,....,r--o--.~--:!:,,.........,
40
3 •
:1:5 t& t.7 tl il il0 i11 ±12 ±13 :1.14 +15
25 45 65 IS IDS 125
ID
!
2
S~E Ak TEk C:RCJIT
ID
!
>-
I
1-
1D
i
I
Propagation Delay vs
Ambient Temperature
tz
l!!
8
a
DIFFERENTIAL INPUT VOLTASE (V)
I
-55 -35-15 5
50
-5-4 -3 -2 -I
25 45 85 IS lOS 125
AM81ENT TEMPERATURE rc)
I
'ec-
a'"'"
f-
r-....
AMBIENT TEMPERATURE rc)
Supply Current vs
Ambient Temperature
,..
y+ollV
Y-o_IDV
YCC-UIY
....en
1.5
-55 -35 -IS 5
-35 -IS 5 Z5 45 65 85 las 125
Il
liAS
""'"
4
3
~ 2.25
!!
"
I
....
l
8
Input Characteristics
10
-I: r;l!!~:Er!IIlj
1:1
Q
~
31
TE~ cl~eulT
SEIE AJ
-
1/
1-f- -
/
30
't'
2&
20
F~4
,
I
11
J
I
.
.u.,,~ ... --
>
i
.! 1&0
~D~~ 'POIO)
10
-5& -31-15 & 25 45 85 IS 105 125
i..-i-o'1" J.- ~ FANOUT =I
&
-11-35 -IS 5 25 45 B5 85 lOS 125
AMBIENTTEMPERATURE 1°C)
AMBIENT TEMPERATURE re)
Propagation Delay vs
Supply Voltage
..lE
~
:;
I
/
Common-Mode
Pulse Response
...~
- '. ~~
~I'W
140
A",.
y
~ 1311
to
.
~
40
10
120
110
TII.!E 1101/
TL/H/570B-5
AC Test Circuit
10
OUTPUT
10
!
80
~
50
>-
~UT2
Q
.,
Z
40
5
30
.,:!
IE
VIN
ov-u-
'POII) ;;;;;
ZO
10
lN914
INPUT 1
IP,IO)
t6
~
:1:7 ±I :!:I ::1:10 :1:11 ttZ.tl3 :t14 115
Y+, V- - SUPI'L YVOLTAGE IY)
TLlH/570B-7
lN914
VIN
=
±50 mV
V+ = +10V
V- = -10V
Vee
= 5.25V
5-59
FANOUT
R
= 2.4k
C=15pF
=1
FANOUT = 4
R = 680n
C = 30pF
lN914
-
TL/H/570B-6
~ r-------------------------------------------------------------------~
('I)
,:=l
Schematic Diagram
LM161
....
r ____......___~;:==:;=;:=~~~STROBEl
Vee
~
:=l
,
....
....
R7
lk
CD
::E
..J
012
....--1--0 NON-INVERTING
OUTPUTI
01
02
'--.....----4~-oGNO
03
r----------4~-o STROBE2
+INPUTI
-INPUT2 o---I~-.J
DB
V-~~----~~~----~----------------~~
Ala, A16: 85
A11, A17: 205
5-60
TLlH/5708-1
~National
~ Semiconductor
LM 193/LM293/LM393, LM 193A/LM293A/LM393A,
LM2903 Low Power Low Offset Voltage Dual
Comparators
General Description
..
..
..
..
The LM193 series consists of two independent precision
voltage comparators with an offset voltage specification as
low as 2.0 mV max for two comparators which were designed specifically to operate from a single power supply
over a wide range of voltages. Operation from split power
supplies is also possible and the low power supply current
drain is independent of the magnitude of the power supply
voltage. These comparators also have a unique characteristic in that the input common-mode voltage range includes
ground, even though operated from a single power supply
voltage.
Application areas include limit comparators, simple analog
to digital converters; pulse, squarewave and time delay generators; wide range VCO; MOS clock timers; multivibrators
and high voltage digital logic gates. The LM193 series was
designed to directly interface with TTL and CMOS. When
operated from both plus and minus power supplies, the
LM193 series will directly interface with MOS logic where
their low power drain is a distinct advantage over standard
comparators.
Eliminates need for dual supplies
Allows sensing near ground
Compatible with all forms of logic
Power drain suitable for battery operation
Features
.. Wide single supply
2.0 Voc to 36 Voc
Voltage range
or dual supplies
±1.0 Voc to ±18 Voc
.. Very low supply current drain (0.4 mAl - independent
of supply voltage
.. Low input biasing current
25 nA
.. Low input offset current
± 5 nA
and maximum offset voltage
± 3 mV
.. Input common-mode voltage range includes ground
.. Differential input voltage range equal to the power supply voltage
.. Low output saturation voltage,
250 mV at 4 mA
.. Output voltage compatible with TTL, DTL, ECL,
MOS and CMOS logic systems
Advantages
.. High precision comparators
.. Reduced Vas drift over temperature
Schematic and Connection Diagrams
..
Dual-In-Line Package
Metal Can Package
.'
OUTPUT A
'NVERTING INPUT A
NON.IIIVEATING
INPUT A
A....JL.J<----,- QU"UT I
3
.NVERTING I.'UT I
S
OND
NON-INVERnNG
'N'UT.
OND
TOP VIEW
TOP VIEW
TL/H/S709-1
Order Number LM193H, LM193AH, Order Number LM393J, LM393AJ,
LM393M, LM2903M, LM393N,
LM293H,LM293AH,LM393H
LM393AN or LM2903N
orLM393AH
See NS Package Number J08A,
See NS Package Number H08C
Typical Applications
Basic Comparator
Driving CMOS
. .:&>1=. .
LMlllA
.VIIEf
M08Aor N08E
(V+ = 5.0 Vocl
+5 DV ac
Driving TTL
+iVac
Vo
-
5-61
LM193/LM293/LM393, LM193A/LM293A1LM393A, LM2903
Absolute Maximum Ratings
Operating Temperature Range
LM393/LM393A
LM293/LM293A
LM193/LM193A
LM2903
Storage Temperature Range
Lead Temperature (Soldering, 10 seconds)
If Military/Aerospace specified devices are required, please
contact the National Semiconductor Sales Office/Distributors for
availability and specifications.
(Note 10)
Supply Voltage, V+
36 VOC or ± 18 Voc
Differential Input Voltage (Note 8)
36Voc
Input Voltage
Electrical Characteristics
Parameter
780mW
660mW
510mW
Continuous
(V+ = 5 Voc, TA = 25·C, unless otherwise stated)
0,
LM193A
Conditions
U1
'"
Input Offset Voltage
(Note 9)
Input Bias Current
IIN( +) or IIN( -) with Output In Linear
Range, VCM = OV (Note 5)
Input Offset Current
IIN(+)-IIN(-)VCM =
Input Common Mode
Voltage Range
V+ = 30Voc(Note6)
Supply Current
RL =
RL =
00
00
+260·C
Soldering Information
Dual-In-Line Package
Soldering (10 seconds)
260·C
Small Outline Package
Vapor Phase (60 seconds)
215·C
Infrared (15 seconds)
220·C
See AN-450 "Surface Mounting Methods and Their Effect on Product
Reliability" for other methods of soldering surface mount devices.
ESD rating (1.5 kn in series with 100 pF)
1300V
-0.3 Voc to +36Voc
50mA
InputCurrenl (VIN< -0.3 Vocl (Note 3)
Power Dissipation (Note 1)
Molded DIP
Metal Can
Small Outline Package
Output Short-Circuit to Ground (Note 2)
O·Cto +70·C
- 25·C to + 85·C
-55·Cto + 125·C
-40·Cto + 85·C
-65·C to + 150·C
LM293A, LM393A
LM193
LM293, LM393
LM2903
Units
Min Typ
Max
Min Typ
Max
Min Typ
Max
Min Typ
Max
Min Typ
Max
±1.0
±2.0
±1.0
±2.0
±1.0
±5.0
±1.0
±5.0
±2.0
±7.0
mVoc
25
100
25
250
25
100
25
250
25
250
nAoc
ov
±3.0
on All Comparators,
on All Amps, V+ =36 Voc
0.4
1
50
±25
V+ -1.5
0
1
2.5
200
Voltage Gain
RL;o,15kn,V+= 15Voc
Vo = 1 Voc to 11 Voc
Large Signal Response
Time
VIN=TTL LogiC Swing, VREF= 1.4 Voc
VRL=5Voc,RL=5.1 kn
300
Response Time
VRL =5 Voc, RL =5.1 kn (Note 7)
1.3
Output Sink Current
VIN(-)=1 Voc, VIN(+)=O, VO";1.5 VOC 6.0
16
Saturation Voltage
VIN(-)=1 Voc, VIN(+)=O, ISINK,,;4 mA
250
±5.0
0.4
1
50
±50
V+ -1.5
0
±3.0
1
2.5
200
0.4
1
50
300
400
1
2.5
200
50
6.0
400
±5.0
0
1
2.5
200
0.4
1
25
300
1.3
16
250
±50
V+ -1.5
0.4
1
1.3
16
250
±5.0
0
300
1.3
6.0
±25
V+-1.5
0
6.0
400
16
250
6.0
400
±50
nAoc
V+ -1.5
Voc
1.0
2.5
mAoc
mAoc
100
V/mV
300
ns
1.5
,...s
16
mAoc
250
400
mVoc
I
Output Leakage Current VIN(-)=O, VIN(+)=1 Voc, VO=5 Voc
0.1
0.1
0.1
0.1
0.1
nAoc
i
Electrical Characteristics (V+
= 5 VOC) (Note 4)
Parameter
LM193A
Conditions
Min Typ
Max
LM293A, LM393A
Min Typ
Max
LM193
Min Typ
LM293, LM393
Max
Min Typ
LM2903
Max
Min Typ
Max
Units
Input Offset Voltage
(Note 9)
±4.0
±4.0
±9
±9
±9
±15
mVOC
Input Offset Current
IIN(+)-IIN(-), VCM=OV
±100
±150
±100
±150
±50
±200
nAOC
Input Bias Current
IIN( +) or IIN( -) with Output in Linear Range,
300
400
300
400
200
500
nAOC
VCM=OV (Note 5)
Input Common Mode Voltage Range V+ =30Voc (Note 6)
0
V+-2.0
0
Y+-2.0
0
Y+-2.0
Y+-2.0
0
Y+-2.0 YOC
0
Saturation Voltage
YIN(-)=1 VOC, VIN(+)=O,ISINK';;4 rnA,
700
700
700
700
700
mVOC
Output Leakage Current
VIN(-)=O, VIN(+)=1 YOC, Vo=30Voc
1.0
1.0
1.0
1.0
1.0
/LAOC
Differential Input Yoltage
Keep All YIN'S;;;' 0 VOC (or V-, if Used),
36
36
36
36
36
VOC
(Note 8)
Note 1: For operating at high temperatures, the LM393/LM393A and LM2903 must be derated based on a 125°C maximum junction temperature and a thermal resistance of
170a C/W
400
which applies for the device soldered in a printed
circuH board, operating in a still air ambient. The LM193/LM193A1LM293/LM293A must be derated based on a 150"C maximum junction temperature. The low bias dissipation and the "ON·OFF" characteristic of the outputs keeps the
chip dissipation very small (Po';; 100 mW), provided the output transistors are allowed to saturate.
Note 2: Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output current is approximately 20 rnA independent of the magnitude of V+ .
Note 3: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acllng as input diode
'!'
en
c.>
clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large
overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re·establish when the input voltage, which was negative, again returns to a value greater than -0.3 Voe.
Note 4: These specifications are limited to - 55·C,;; TA';; + 125·C, for the LM193/LM193A, With the LM293/LM293A all temperature specifications are limited to - 25·C,;;TA';; + 85·C and the LM393/LM393A temperature specifications are limited to O"C,;;TA';; +70·C. The LM2903 is limited to -40"C,;;TA';; + 85·C.
Note 5: The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the reference or input lines.
Note 6: The input common~mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of the common-mode voltage range is V+ -1.5V at 25°C, but either or both inputs can go
to 36 Voc wHhout damage, independent of the magnitude of V+.
Note 7: The response time specified is for a 100 mV input step with 5 mV overdrive. For larger overdrive signals 300 ns can be obtained, see typical performance characteristics section.
Note 8: Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range. the comparator will provide a proper output state. The low input voltage state must
not be less than -0.3 VOC (or 0.3 VOC below the magnitude of the negative power supply, if used).
Note 9: At oulput switch point, VO'" 1.4 VOC,
Rs~OIl
with V+ from 5 Voc to 30 Voc; and over the full input common-mode range (0 Voc to V+ -1.5 Voc), at 25·C.
Note 10: Refer to RETS193AX for LM193AH/military specifications and to RETS193X for LM193H/military specifications.
------
-----
C06~W' 'VC6CW'/VC6~W'/VC6~W' 'C6CW'/C6~W'/C6~W'
~
o
CD
c:...
,---------------------------------------------------------------------------------,
Typical Performance Characteristics LM193/LM293/LM393. LM193A1LM293A1LM393A
:::E
...I
~
CD
~
:::E
Supply Current
1.0
C
~ _I J.
f-T.~I"'"'
.! 0.8
..
..
I-
g;
0.6
~
c:...
S
0.4
,
...I
"t..
0.2
...I
~
CD
:::E
:;c
....CD
Input Current
80
T.=-55"~ to-
ffi
I
~
!l
"
oS
~ ~Z5°C
~
TA
,.
I
TA "'+125°C--
-
!!
1
20
3D
...I
~
CD
~
:::E
......
~
8.0
s,o
CD
C:S
>-
4.0
...I
~
~
c:...
:::E
...I
......
~s»
3.0
~
2.0
1.0
~
100m
20
Tr'lZ5'~
~
10
ttc,-
20
3D
y' -SUPPLY VOLTAGE (Veel
....
~.
"
I-
~2
~:::
'"'-
!;
."
~
I I I
I I I
...I
::>
c:!.
t~zsOf
o.s
1.0
1.5
r--h......91<.---'1-+--I--+-l
I
.:
40
0.001 "-"
~
g;
Response Time for Various
Input Overdrives-Negative
Transition
etf
r-+-+-t---,I-+--'JMH-l
..
.~
TA '" OuC
40
y+ -SUPPLY VOLTAGE IVeel
:::E
HPn
~
I R. =_
I '1
10
~
V1NICMI '" 0 Vee
R'NICMJ:!!!
T.I =-~-C
l-
+70°C
IE
I I
I I
60
Output Saturation Voltage
10
> z
6.0
5.0
4.0
-" INPUT OVERDRIVE = 100 mV
2.0
I
~
5mV
II
11
20mV
":
1.0
100
so r--T.=Z6°~-
5>
II
.~=
. _
••••
I I I
!!
2.0
I
'"
3.0
0.5
TIME(,.se,1
1.0
1.5
2.0
TIME (P.ool
TUH/5709-3
Typical Performance Characteristics LM2903
Supply Current
Output Saturation Voltage
Input Current
80
I.Z
!
C
I-
.!
.~
I-
iii
..
I
i1:l
1.0
~
a;
D.'
~
"!:i
g
..
..
..."
TA D-4O"C
~
8D
TA " DOC
z
lID
!!
I-
20
:Ii
.j
j
40
3D
20
0
V+, SUPPLY VOLTAGE (Vael
10
20
3D
40
.1ZOlm-Y,
Z.O
1.0
lDOmV
6.0
~
~~"J?
. .....-=
"
I-
~~
~:::
~
-
o
~
I I I
I I I
~)25'~
0.5
1.0
1.5
10
0.1
100
10. OUTPUT SINK CURRENT (mAl
Response Time for Various
Input Overdrives-Positive
Transition
5.0 mV -INPUT OVERDRIVE
&.0
0.01
V'. SUPPLY VOLTAGE (Voel
Response Time for Various
Input Overdrives-Negative
Transition
6.0
0.01
o.aOl
0
10
0.1
;:
!;
0.1
10 r-~'--~--nr--'
~i
> z
5.0
4.0
"
INPUT OVERDRIVE = 100 mV
3.0
2.0
1.0
0
100
50
0
~>
~
5mV
II
I
II
": -t?20mV
r--I-~. '125°~-
'_
. _
' ••
!!
2.0
0.5
TIME(,oocl
1.0
1.5
2.0
TIME (P."I
TL/H/5709-4
5-64
Application Hints
The LM193 series are high gain, wide bandwidth devices
which, like most comparators, can easily oscillate if the output lead is inadvertently allowed to capacitively couple to
the inputs via stray capacitance. This shows up only during
the output voltage transition intervals as the comparator
change states. Power supply bypassing is not required to
solve this problem. Standard PC board layout is helpful as it
reduces stray input-output coupling. Reducing the input resistors to < 10 kn reduces the feedback signal levels and
finally, adding even a small amount (1.0 to 10 mY) of positive feedback (hysteresis) causes such a rapid transition
that oscillations due to stray feedback are not possible. Simply socketing the IC and attaching resistors to the pins will
cause input-output oscillations during the small transition intervals unless hysteresis is used. If the input signal is a
pulse waveform, with relatively fast rise and fall times, hysteresis is not required.
The differential input voltage may be larger than V+ without
damaging the device (see Note 8). Protection should be
provided to prevent the input voltages from going negative
more than -0.3 VDC (at 25·C). An input clamp diode can be
used as shown in the applications section.
The output of the LM193 series is the uncommitted collector
of a grounded-emitter NPN output transistor. Many collectors can be tied together to provide an output OR'ing function. An output pull-up resistor can be connected to any
available power supply voltage within the permitted supply
voltage range and there is no restriction on this voltage due
to the magnitude of the voltage which is applied to the V+
terminal of the LM193 package. The output can also be
used as a simple SPST switch to ground (when a pull-up
resistor is not used). The amount of current which the output
device can sink is limited by the drive available (which is
independent of V+) and the fJ of this device. When the
maximum current limit is reached (approximately 16 mAl,
the output transistor will come out of saturation and the output voltage will rise very rapidly. The output saturation voltage is limited by the approximately 60n rSAT of the output
transistor. The low offset voltage of the output transistor
(1.0 mY) allows the output to clamp essentially to ground
level for small load currents.
All pins of any unused comparators should be grounded.
The bias network of the LM193 series establishes a drain
current which is independent of the magnitude of the power
supply voltage over the range of from 2.0 VDC to 30 VDC.
It is usually unnecessary to use a bypass capacitor across
the power supply line.
Typical Applications (Continued) (V+ = 15 VDC)
Squarewave Oscillator
Pulse Generator
..
v'
v;ns
~.'
l'IHklll
AI
1M
DI
1111114*
RZ
loa.
D2
INIl.
....
"..
v;IlJl.
IhF
P
v.
v·
Crystal Controlled Oscillator
v.
o-'W'H-.....y.,.-....
..
''''
.,..
,.
"For large ratios of R1/R2,
01 can be omitted.
Two-Decade High-Frequency VCO
v·
.'"
50lpF
,...
!.1Il
I.n
,v,
,...
fREQUEIICY
>"""+-0
CONTRO~
VOlUGE
INPUT
OUTPUT I
v',
...
II
1-----------~f_oDU".,M
v',
V"=+30Vec
+250 mVees:veS: +50 vee
TLlH/5709-5
700 HzS:foS:100 kHz
5-65
Typical Applications (Continued) (V+ = 15 Voe)
Basic Comparator
Output Strobing
V'
V'
Uk
3.0k
>~~-OVo
>-4~OVo
STROlE
INPUT
TL/H/5709-6
* WITHOUT
OR LOGIC GATE
PULL·UP RESISTOR
TLlH/5709-11
Non-Inverting Comparator with Hysteresis
AND Gate
V'
V'
3k
lOOk
A O-JI,IY\I.....
lOOk
TLlH/5709-9
I
V;=r
o-""""t/Ir+-.---t
lOOk
C o-JI,IY\I.......
"0" "I"
TL/H/5709-12
Inverting Comparator with Hysteresis
OR Gate
V'
'V ,N
0------4
V'
3k
200k
3k
>~"'_OVo
+O.07SV
1M
lOOk
A
1M
100.
lOOk
1M
1.
C
v~=r
"0" "I"
TLlH/5709-10
':::'
TL/H/5709-13
5-66
Typical Applications (Continued) (V+ =Vocl
Large Fan-In AND Gate
ORlng the Outputs
v+
Y'
R4
311
IINIl
:'=r
"0"
>-4-0 Yo
>-4I~OVDUT
A o-....HI-----I
"I"
TUH/5709-17
00-...1-1
I
ALL DIDOES
IN914
TL/H/5709-14
Limit Comparator
Improved Op Amp
Y'
y'II2 vael
'Y'No--..--t
2Rs
10k
Rs
Ik
TL/H/5709-18
2Rs
-Y••• LOW
o--oIVV\I---t
TUH/5709-15
Comparing Input Voltages
of Opposite Polarity
Low Frequency Op Amp
Y'
15k
S.lk
Yo
I
1"_ O.S.. F
TL/H/5709-16
TL/H/5709-19
5·67
~
o
G)
C'\I
::::iii
...I
,---------------------------------------------------------------------------------,
Typical Applications
~
Zero Crossing Detector (Single Power Supply)
V'
V'
OFFSET
~
AOJ.
::::iii
V'
...I
i
(Continued) (V+ =Voc)
Low Frequency Op Amp with Offset Adjust
lOOk
Rl
1M
10010
1M
5.1k
5.U
5.1k
C'\I
::::iii
lN9U
...I
.....
V•
~
G)
.....
lOM
::::i
...I
(f)
~
Rl
lOOk
Rl
lk
::::iii
Yo+
10k
I
...I
.....
TLlH/57D9-21
~
G)
TLlH/5709-20
C'\I
::::i
...I
.....
One-Shot Multlvibrator
~
G)
.....
:i
Bi·Stable Multivlbrator
V'
y'
:+ o-t.PF~~+I_M_-t
1010
10010
15k
Slk
10010
::FE
lms-pw-
10 "
Y'
fl
By'
D
lOOk
TL/H/5709-24
TL/H/5709-22
One·Shot Multivibrator with Input Lock Out
V'
10M
lOOk
'YIN
-fE
5601c
15k
....--+---t
o-~M~
40.,.=f""E v'0
+4V
1 ...
10 I,
o
>-t~oYo
62k
':'
TLlH/5709-23
5·68
Typical Applications (Continued) (V+ =Voc)
Time Delay Generator
or
ZOOk
1511
'Ok
'Ok
v,
3.Dk
m
'OM
10k
v,
INPUT GATING SIGNAL
3.Dk
m
,
V'
'OM
----------,;;iI~
10k
t
Ve.
I
VOl
v.
- t--.
51k
':'
TL/H/5709-7
Split-Supply Applications (V+ = + 15 Voc and V- = -15 Vocl
Zero Crossing Detector
MOS Clock Driver
V'
V'
In
".
1.
"
,...
2....
V.
2M:
> .......-t-r
~....,.--o
~--u
..
..
Comparator With a
Negative Reference
v'
...
TL/H/5709-8
5-69
g
r:
~ National
g.... ~ Semiconductor
:5" LM710/LM710C
Voltage_ Comparator
General Description
stray and wiring capacitances that can be realized with
monolithic construction make the device difficult to duplicate with discrete components operating at equivalent power levels.
The LM710 series are high-speed voltage comparators intended for use as an accurate, low-level digital level sensor
or as a replacement for operational amplifiers in comparator
applications where speed is of prime importance. The circuit
has a differential input and a single-ended output, with saturated output levels compatible with practically all types of
integrated logic.
The LM710 series are useful as pulse height discriminators,
voltage comparators in high-speed AID converters or go,
no-go detectors in automatic test equipment. They also
have applications in digital systems as an adjustable-threshold line receiver or an interface between logiC types. In addition, the low cost of the units suggests them for applications
replacing relatively simple discrete component circuitry.
The device is built on a single silicon chip which insures low
offset and thermal drift. The use of a minimum number of
stages along with minority-carrier lifetime control (gold doping) makes the circuit much faster than operational amplifiers in saturating comparator applications. In fact, the low
Schematic and Connection Diagrams
~------~----~--~--~
R4
2.8k
Metal Can Package
R5
3.9k
Tl/H/10410-2
D2
INPUTS
Top View
6.2V
+---t-----------;
OUTPUT
Note: Pin 4 is connected
to case.
Order Number LM710H or LM710CH
See NS Package Number H08C
GROUND
-----------------!i----....--1
Dual-In-Llne Package
Ne
GIlD
+IH
-IN
. . .---_-v-
He
v-
TUH/10410-1
He
TUH/10410-3
Top View
Order Number LM710CN
See NS Package Number N14A
5-70
r-
s:
.......
Absolute Maximum Ratings
......
c
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Power Dissipation
TO-99 (Note 1)
Plastic Dual-In-Line Package (Note 2)
Positive Supply Voltage
Operating Temperature Range
LM710
LM710C
-55'C to + 125'C
O'Cto +70'C
Storage Temperature Range
- 65'C to + 150'C
+14V
-7V
Negative Supply Voltage
Peak Output Current
10mA
Output Short Circuit Duration
10 seconds
Differential Input Voltage
±5V
Input Voltage
±7V
700mW
950mW
Lead Temperature (Soldering, 10 sec.)
260'C
Min
Input Offset Voltage
Rs ,;;; 200.0, VCM
Input Offset Current
VOUT
=
=
=
=
1.4V, TA
=
OV, T A
=
25'C
Input Bias Current
TA
Voltage Gain
TA
Output Resistance
TA
Output Sink Current
VOUT = 0, TA = 25'C
Il.VIN:?: 5mV
Il.VIN:?: 10 mV
Response Time
TA
=
LM710C
LM710
Conditions
=
25'C
25'C
1250
25'C
Typ
Max
Min
2.0
2.0
1.6
5.0
mV
3.0
1.8
5.0
13
20
16
25
)LA
)LA
1000
=
Rs';;; 200.0, VCM
Average Temperature Coefficient
of Input Offset Voltage
TMIN ,;;; TA';;; TMAX
Rs';;; 50n
Input Offset Current
TA
TA
1500
200
.0
2.5
rnA
rnA
2.5
1.6
25'C (Note 4)
Input Offset Voltage
Units
Max
0.6
200
25'C
Typ
0.75
1700
40
ns
40
3.0
OV
5.0
6.5
mV
20
)Lvrc
7.5
7.5
)LA
)LA
3.0
10
TAMAX
TAMIN
0.25
1.8
3.0
7.0
Average Temperature Coefficient
of Input Offset Current
25'C,;;; TA';;; TMAX
TMIN ,;;; TA';;; 25'C
5.0
15
25
75
15
24
50
100
nArC
nAl'C
Input Bias Current
TA
27
45
25
40
)LA
Input Voltage Range
= TMIN
V- = -7V
±5.0
Common-Mode Rejection Ratio
Rs';;; 200n
80
=
=
±5.0
70
100
V
dB
98
Differential Input Voltage Range
±5.0
±5.0
V
Voltage Gain
1000
800
VIV
Positive Output Level
Negative Output Level
Output Sink Current
-5mA,;;; lOUT';;; 0
VIN:?: 5mV
VIN:?: 10mV
2.5
-1.0
VIN:?: 5mV
VIN:<: 10mV
VIN :<: 5 mV, VOUT
TA = 125'C
TA = -55'C
=
VIN:<: 10 mV, VOUT
O'C,;;; TA';;; +70'C
3.2
-0.5
4.0
2.5
3.2
4.0
V
V
-1.0
-0.5
0
V
V
0
0
0.5
1.0
=
0
rnA
rnA
1.7
2.3
0.5
5-71
r-
s:
.......
......
Electrical Characteristics (Note 3)
Parameter
........
rnA
c
o
0
.,...
.....
0
:::IE
....I
.......
0
.,...
.....
:::IE
Electrical Characteristics (Note 3) (Continued)
Parameter
Typ
Max
V,N:<: 5mV
V,N:<: 10mV
5.2
9.0
V,N:<: 5mV
V,N:<: 10 mV
4.6
Min
Positive Supply Current
....I
Negative Supply Current
Power Consumption
LM710C
LM710
Conditions
lOUT = 0
V,N:<: 5mV
V,N:<: 10mV
90
Min
Units
Typ
Max
5.2
9.0
mA
mA
4.6
7.0
mA
mA
150
mW
mW
7.0
150
Note 1: Rating applies for ambient temperatures of 25'C; derate linearly at 5.S mWI'C for ambient temperatures above 2S'C.
Note 2: Derate linearly at 9.5 mW I'C for ambient temperatures above 25'C.
Note 3: These specifications appy for V+ ~ 12V, V- ~ -SV, -SS'C ,;; TA ,;; + 12S'C for LM710 and O'C ,;; TA ,;; +70'C for LM710C unless otherwise
specified: The input offset voltage and input offset current (see definitions) are specnled for a logic threshold voltage of I.BV al -SS'C, I.4V al2S'C, and IVaI
12S'C for LM710 and I.SV alO'C, I.4V al2S'C, and 1.2V al70'C for LM710C.
Note 4: The response lime specified (see definilions) is for a 100 mV inpul slep wilh S mV overdrive (LM710) or a 10 mV overdrive (LM710C).
Typical Applications
Schmitt Trigger
Line Receive with Increased
Output Sink Current
INPUT-~
+12V
~i>-l'--OUTPUT
_
OUTPUT
Rl
10k
INPUT--I---ILM710
Rl
Ql
2N2906
~+
R2
TL/H110410-4
--
~ 2k
=
Pulse Width Modulator
TL/H/l0410-5
Level Detector with Lamp Driver
MI\-~
+12V
~JUUl
DCI~+
L1
Rl
--~
TL/HI10410-6
~
INPUT
R2
-==
-
5-72
R3
Ql
t-..;N2222
R4
-==
-
TLIH110410-7
r
Typical Performance Characteristics
Transfer Function
.c.o
E
III
~
1800
I
V>=I2V
V"=-6.OV I
3D
lrY ~:llk
I I
TA=-55'C
2.0
ill.
fl!
0
TA=25"C
S
1.0
111
5
r-r-roo _0 __ 0'
-s.o
S!
"-
0
-ID
......
ID
~
~\
-so -25
Input Bias Current
I
~
V":=-6.0V
"
20
.......
~
10
.......
r""'-
,
o
-so -25
-75
0
25
so
~
!.1
S
5
.c.o
-
~
I
t;
t-
II
2.0mV
J L
V>=12V
V" =-6.0V
TA =250(;
0
1
~
S!
Ii!
lE
100
25 50 75 100 125
,
0
o
20
40
60
BO
\...
-75 -50 -25 0
~
!.1
I
25
f;;;;;;;;...PGSfIlVE
~Ull'LT
3.0
1.0
-1.0
-75
I I I
JvnlV7=-6.0V
r"'"" THRESHoLD /.£Val-fI~
I I I I
I I J. ,l
H£GATI'IE OUTPUT LEVELI I I I I
-so -25
0
Y+=12V
V":=-6.0V
lour = 0
TA =25"1;
so
75 100 125
-0.4
0.2
II
I I
20
40
60
BO
0.2
Common Mode Pulse
Response
8
~
S!
~
Y+=12V
3D
V":=-6.0V
2D
T,=25o(;
1.0
I
V,N
8
100 120
~
!.1
S
5
~oVOUT -- [[ --
2.0
...J,...l
1.0
SOil
I I I
I
0
25 50 75 100 125
TEMPERATURE (0(;)
:1
§
,.0
ill
I
I
I
3D
.......
=>
0
V":=-6.0V
-~
2.D
r-...(,~,j.~o
K
1.5
ID
-75 -so -25 0
160
Maximum Power Dissipation
-- ,,
1000
S
I!:
120
BO
Y+=12V
VOUr "O.2V_
2.5
I
I
nME (ns)
Output Sink Current
3.5
0.4
INPUT VOLTAGE (V)
TIME (no)
v>= 12V
2.0 I-L~
-
.......
20mV
o
14
~EG1nvl:r-...
V>=12V
V" =-6.0V
TA =250(;
Output Voltage Level
h
I
~~osbJ
Response Time for
100 120
13
Supply Current
.c.o Various Input Overdrives
l
I I
M.
I I
2.0 I
2.0mV
1\
ID I
5.0mV
10mV f-1:"1I'
-ID
12
\.
o
nME (ns)
4D
II
posmvE SUPPLY VOLTAGE (V)
I\"
I I II
I I II
J til
50
10
V":=-6.0V
ID
~
500
0
~
1
"
-
;("
>10'
TEMPERATURE (0(;)
j,oo! 5.0mV
~II'
0
1000
.....
;(".~1I~~ po.
~
.!llI,!.-
7
10
~
s
75 100 125
Response Time for
Various Input Overdrives
3D 20rrN
10rrN
2.0
ID
./
L
./
V>=12V
TEMPERATURE (0(;)
1III
1500
Input Offset Current
2.0
V>=12V
,
S!
.1!>~
- -
2!100
TEMPERATURE (0(;)
40
30
III
~
\.
INPUT VOLTAGE (mV)
~
2500
"\.
1500
I I
I I
T,=25o(;
V":=-6.0V
1600
1300
-75
5D
3D
Voltage Gain
300l
v>= 12V
1400
-ID
-3.0
~
III
Ej
>
~
Voltage Gain
1700
s::
.....
o
.....
r
s::
25 so 75 100 125
TEMPERATURE (0(;)
!
BOO
0
1=
600
~
400
f
200
z
f--
~
~
o
5
"-
,,
,
'"
~,
~,
--METAL CAN PACKAGE
----- PLASnC DIP
T
25
45
65
65
105
,,
125
AMBIENT TEMPERATURE (0(;)
TUH/l0410-B
5-73
~
.....
o
o
0:1'
.,..
0:1'
.,..
~National
:::e
....I
.....
~ Semiconductor
0:1'
.,..
Ln
~ LM1514/LM1414
Dual Differential Voltage Comparator
General Description
The LM1514 is specified for operation over the -55'C to
+ 125'C military temperature range. The LM1414 is specified for operation over the O'C to + 70'C temperature range.
The LM1514/LM1414 is a dual differential voltage comparator intended for applications requiring high accuracy and
fast response times. The device is constructed on a single
monolithic silicon chip.
Features
The LM1514/LM1414 is useful as a variable threshold
Schmitt trigger, a pulse height discriminator, a voltage comparator in high-speed AID converters, a memory sense amplifier or a high noise immunity line receiver. The output of
the comparator is compatible with all integrated logic forms.
The LM1514/LM 1414 meet or exceed the specifications for
the MC1514/MC1414 and are pin-for-pin replacements.
The LM1514 is available in the ceramic dual-in-line package. The LM1414 is available in either the ceramic or molded dual-in-line package.
•
•
•
•
•
•
•
Two totally separate comparators per package
Independent strobe capability
High speed 30 ns typ
Low input offset voltage and current
High output sink current over temperature
Output compatible with TTL/DTL logic
Molded or ceramic dual-in-line package
Schematic and Connection Diagrams
Dual-In-Line Package
V'
-INPUT +INPUT
B
B
OUTPUT STROB£
B
B
v' A
NO
CONN
STROBE amPUl
A
A
8
+INPUT -INPUT
A.
A
V'"
TLlH110411-2
Order Number LM1414J or LM1514J
See NS Package Number J14A
Order Number LM1414N
See NS Package Number N14A
TLIHI10411-1
5-74
r-
Absolute Maximum Ratings
(Note I)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Positive Supply Voltage
+14.0V
-7.0V
Negative Supply Voltage
Peak Output Current
Differential Input Voltage
U1
Electrical CharacteristicsforTA =
Parameter
25·C. v+
Operating Temperature Range
LMI514
LMI414
-55·C to + I 25·C
O·Cto +70·C
Storage Temperature Range
Lead Temperature (Soldering. 10 sec.)
- 65·C to + 150·C
300·C
= + 12V. v- = -6V. unless otherwise specified
Min
Rs:;; 2000. VCM
Input Offset Current
VCM
= OV, VOUT = I.4V
= OV, VOUT = I.4V
Max
2.0
1.0
5.0
mV
3.0
1.2
5.0
/LA
25
/LA
Max
0.6
0.8
Min
20
Voltage Gain
1000
1250
Output Resistance
200
Differential Input Voltage Range
V-
= -7.0V
= -7.0V
Common Mode Rejection Ratio
Rs:;; 2000, V-
Positive Output Voltage
VIN ::? 7.0 mV, a :;; lOUT:;; -5.0 mA
Negative Output Voltage
Units
Typ
Typ
Input Bias Current
Input Voltage Range
LMI414
LMI514
Conditions
Input Offset Voltage
1000 mW
Power Dissipation (Note 2)
lamA
±5.0V
±7.0V
Input Voltage
200
0
±5.0
±5.0
V
±5.0
±5.0
V
80
100
70
lOa
2.5
3.2
4.0
2.5
3.2
4.0
V
VIN:;; -7.0mV
-1.0
-0.5
a
-1.0
-0.5
a
V
Strobed Output Voltage
VSTROBE :;; 0.3V
-1.0
-0.5
a
-1.0
-0.5
a
V
Strobe "a.. Current
VSTROBE
-1.2
-2.5
-1.2
-2.5
mA
Positive Supply Current
VIN:;; -7mV
18
18
mA
Negative Supply Current
VIN:;; -7mV
-14
-14
mA
300
mW
= 100 mV
180
Power Consumption
Response Time
(Note 3)
LMI514/LMI414: The following apply for TL :;; TA
Input Offset Voltage
180
Rs:;; 2000. VOUT = 1.8V for TA = TL
VCM = OV, VOUT = 1.0V for TA = TH
ns
30
3.0
3.0
6.5
6.5
mV
mV
45
40
/LA
3.0
VCM
VCM
dB
< TH (Note 4) unless otherwise specified
Input Bias Current
= OV, VOUT = 1.8V. TA = h
= OV, VOUT = I.OV. TA = TH
Voltage Gain
Output Sink Current
300
30
Temperature Coefficient of
Input Offset Voltage
Input Offset Current
....3:
....
7.0
3.0
2.8
/LV/·C
7.5
7.5
/LA
/LA
800
1000
VIN:;; -9.0 mV. VOUT::? OV
5.0
4.0
1.6
2.5
mA
Note 1: Voltage values are with respect to network ground terminal. Positive current is defined as current into the referenced pin.
Note 2: LM1514 ceramic package: The maximum junction temperature is + 150"C, for operating at elevated temperatures, devices must be derated linearly at 12.5
mWrC. LM1414 ceramic package: The maximum junction temperature is + 125·C for operating at elevated temperatures, devices must be derated linearly at 12.5
mW rc. LM1414 molded package: The maximum junction temperature is + 125·C, for operating at elevated temperatures, devices must be derated linearly at 10
mWrC.
Note 3: The response time specified (see definitions) for a 100 mV input step with 5 mV overdrive.
Note 4: For LM1514, TL = -55·C, TH = +125·C. For LM1414, TL = O·C, TH = +70·C.
5-75
0l:Io
......
r-
3:
....
0l:Io
....
0l:Io
~National
~ Semiconductor
LP265/LP365 Micropower Programmable
Quad Comparator
General Description
Features
The LP365 consists of four independent voltage comparators. The comparators can be programmed, four at the
same time, for various supply currents, input currents, response times and output current drives. This is accomplished by connecting a single resistor between the Vee
and ISET pins.
These comparators can be operated from split power supplies or from a single power supply over a wide range of
voltages. The input can sense signals at ground level even
with single supply operation. The unique output NPN transistor stages are uncommitted to either power supply. They
can be connected directly to various logic system supplies
so that they are highly flexible to interface with various logic
families.
• Single programming resistor to tailor power consumption, input current, speed and output current drive
capability
• Wide single supply voltage range or dual supplies (4
Voe to 36 Voe or ± 2.0 Voe to ± 18 Vocl
• Low supply current drain (10 ,..A) and low power
consumption (1 0 ,..W/comparator)@ISET = 0.5,..A
Vee = 5voe
• Uncommitted output stage-selectable output levels
• Output directly compatible with DTL, TTL, CMOS, MaS
or other special logic families
• Input common-mode range includes ground
• Differential input voltage equal to the power supply
voltage
Application areas include battery power circuits, threshold
detectors, zero crossing detectors, simple serial AID converters, VCO, multivibrators, voltage converters, power sequencers, and high performance V IF converters, and RTD
linearization.
Typical Connection
Connection Diagram
Dual-In-Line Package
V+
OUT3
OUT4
V-
+IN4
-IN4
OUT2
OUT1
V+
-IN1
+IN1
+IN3
-IN3
Rl
~(
TL/H/S023-1
Programming Equation
1m
+IN2
TOP VIEW
TL/H/S023-2
ISET
Order Number LP365M, LP265N, LP365AN or LP365N
See NS Package Numbers M16A or N16A
(V+)-(V-)-1.3V
R
SET
I
SUPPLY:::; 22 X ISET
5-76
r-
Absolute Maximum Ratings
Power Dissipation (Note 3)
TjMax
6jA
Lead Temp.
(Soldering-10 sec.)
(Vapor Phase-60 sec.)
(lnfrared-15 sec.)
Operating Temp. Range LP365:
LP265:
Storage Temp. Range
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
36 Vac or ± 18 Vac
Differential Input Voltage
± 36Vac
Input Voltage (Note 1)
- 0.3V to + 36 Vac
Output Short Circuit to VE (Note 2)
Continuous
VOUT with Respect to VE
VE-7V,,;VOUT,,;VE+ 36V
ESD Tolerance (Note 10)
2000V
M Package
500mW
115'C
115'C/W
N Package
500mW
115'C
90'C/W
"U
N
0)
.....
rU1
"U
Co)
0)
U1
260'C
215'C
220'C
O'C ,,; TA ,,; +70'C
-40'C"; TA"; +85'C
-40'C"; TA"; + 150'C
Electrical Characteristics (Note 4) Low power Vs = 5V, ISET= 10 ,...A
LP365A
Symbol'
Parameter
Conditions
Typ
Design
Limit
(Note 6)
Typ
Tested
Limit
(Note 5)
Design
Limit
(Note 6)
1
3
6
3
6
9
20
50
4
25
75
4
25
150
15
75
200
15
75
300
300
25
25
V/mV
(Min)
VOS
Input Offset
Voltage
VCM= OV,
Rs=100
lOS
Input Offset
Current
VCM=OV
LP265
2
Input Bias
Current
VCM=OV
LP265
10
AVOL
Large Signal
Voltage Gain
RL =100k
VCM
Input CommonMode Voltage
Range
18
LP265/LP365
Tested
Limit
(Note 5)
50
125
Units
(Limit)
mV
(Max)
nA
(Max)
nA
(Max)
50
50
0
0
0
0
V
(Max)
3
3
3
3
V
(Min)
85
75
70
80
75
70
dB
(Min)
500
CMRR
Common-Mode
Rejection Ratio
0,,;VCM,,;3V
PSRR
Supply Voltage
Rejection Ratio
±2.5V";Vs
,,;±3.5V
75
65
65
70
65
Is
Supply Current
Alllnputs=OV,
RL =00
215
250
300
225
275
300
,...A
(Max)
VOH
Output Voltage
High
Vc=5V,
VE=OV,
RL =100k
4.9
4.5
4.9
4.5
V
(Min)
VOL
Output Voltage
Low
VE=OV
0.4
0.4
V
(Max)
ISINK
Output Sink
Current
VE=OV,
VO=O.4V
ILEAK
Output Leakage
Current
tR
Response Time
0.4
0.4
65
dB
(Min)
2.4
1.2
0.6
2.0
0.8
0_4
rnA
(Min)
Vc=5V,
VE=OV
2
50
5000
2
100
5000
nA
(Max)
Vcc=5V,
VE=OV,
RL =5k,
CL =10pF
(Note 7)
4
4
5-77
,...S
•
II)
CD
CO)
Ill.
...J
Electrical Characteristics (Continued) (Note 8) High power Vs= ± 15V, ISET= 100 /J-A
......
II)
LP365A
LP265/LP365
CD
N
Ill.
...J
Symbol
Parameter
los
18
AVOL
VCM
(Note 5)
(Note 6)
6
9
(Note 5)
(Note 6)
1
3
6
3
50
100
10
90
200
nA
10
90
500
(Max)
80
300
500
nA
80
300
800
(Max)
500
100
100
VCM=OV,
Rs=100
I nput Offset
VCM=OV
LP265
5
VCM=OV
LP265
60
Current
Large Signal
RL =15k
200
500
Typ
100
100
-15
-15
-15
-15
13
13
13
13
85
75
70
80
75
70
70
500
Voltage Gain
(Limit)
Limit
Input Offset
Input Bias
Units
Limit·
Limit
Voltage
Current
Design
Limit
Design
Typ
Vas
Tested
Tested
Conditions
Input CommonMode Voltage
Range
CMRR
PSRR
Is
tR
V
(Min)
-~5VS;VCM
Supply Voltage
Rejection Ratio
±10VS;Vs
S; ±15V
80
70
70
75
70
Supply Current
All Inputs = OV,
2.6
3
3.3
2.8
3.5
3.7
rnA
2.8
3.5
4.3
(Max)
V
(Min)
Output Voltage
00,
LP265
Vc=5V,
VE=OV,
4.9
4.5
4.9
4.5
Output Voltage
0.4
0.4
0.4
0.4
10
8
5.5
7.5
6
4
5
50
5000
5
50
5000
VE=OV
Low
ILEAK
V
(Max)
S;13V
RL =100k
ISINK
(Min)
Rejection Ratio
High
VOL
V/mV
Common-Mode
RL =
VOH
mV
(Max)
Output Sink
VE=OV,
Current
Vo=0.4V
Output Leakage
Vc=15V,
Current
VE=-15V
Response Time
Vcc=5V,
dB
(Min)
dB
(Min)
V
(Max)
rnA
(Min)
nA
(Max)
VE=OV,
RL =5k,
1.0
1.0
fl,s
CL =10pF
(Note 7)
Note I: The input voltage is not allowed to go 0.3V above V+ or -0.3V below V- as this will tum on a parasitic transistor causing large currents to flow through
the device.
Note 2: Short circuits from the output to V+ may cause excessive heating and eventual destruction. The current in the output leads and the VE lead should not be
allowed to exceed 30 mAo The output should not be shorted to V- if VE<;(V-) + 7V.
Note 3; For operating at elevated temperatures, these devices must be derated based on a thermal resistance of 9JA and TJ max. Tj =TA + 8jAPOo
Note 4: Boldface number. apply at temperature extreme.. All other numbers apply at TA~TI~25"C. V+ ~5V. V-~OV.ISET~IO"A. RL ~IOOk. and
Vc~5V as shown in the Typical Connection diagram.
Note 5: Guaranteed and 100% production tested.
Note 6: Guaranteed (but not 100% production tested) over the operating temperature and supply voltage ranges. These limits are not used to calculate out-going
quality levels.
Note 7: The response time specified is for a 100 mV input step with 5 mV overdrive.
Note 8: Boldface numbers apply attemperature extremes. All other numbers apply at TA ~TI~ 25'C. V+ ~ + 15V. V- ~ -15V. ISET~ 100 "A. AL ~ lOOk, and
Vc~5V as shown in the Typical Connection diagram.
Note 9: See AN-450 "Surface Mounting Methods and Their Effect on Product Reliability" for other methods of soldering surface mount devices.
Note 10: Human body model. 1.5 kO In series with 100 pF.
5-78
r-
"tJ
Typical Performance Characteristics
N
CD
CJ1
Supply Current vs Supply
......
Supply Current vs
r-
"tJ
c.:>
10 Temperature
10 Voltage
CD
2
2
...15
§. 1.0
ffi
a:
a:
~
...'"'"
:::0
~
8::
1.0
~
D.)
1m 10 pA
8::
IIIIJ
0.1
100
10
1m (pA)
1000
D.l
-55 -25
0 4 8 12 16 20 24 28 32
TOTAL SUPPLY VOLTAGE (V)
lOUD
1m 10pA
0 25 50 75 100 125
TEMPERATURE (OC)
1000
10
~
:[
100
...
!ll
~
0
lIDO
ija:
llj
:z:
>
:z:
:::0
...Ie~
f- -
iil
iil
~a:
;--;-r-f-- f--- Im=100 pA i-= '=
r-
Im-l00 pA
§.
10
~
is!
0.1
10
1m (pA)
100
1000
0.1
1
10
100
OUTPUT SINK CURRENT (rnA)
Response Time
€
!ll
~
5 mV OVERDRIVE
I
Is~=100 pAl-
...
2
l!5
l!5
4
TIME(pS)
4
TIME (p.)
Response Time
Negative Transition
Response Time
Positive Transition
4.5 r--r-'T""I'TTmr--r-M"T"TTm
4.5
4.0
4.0 \
3.5 I-',H\-Hl++1ftl1--+-+-H+1+H
3.5
3.0
~ 3.0 ~
~
I
ISET=100 pA 1-1-1-
100
~ 50
~
0
it -50
~ -50
l=
I
t~
!!ll
!ll
-100
...Ie~ -150
100
(lm~l~ p~- r-I-
Im=10 pA
o
10
Im(pA)
I
I I
,\
~
!
1
Response Time
Positive Transition
6 Negative Transition
5 mV OVERDRIVE
~
10
~
:::0
11
l!5
~
w
2.5 ~M\~.t+tttttt--+-1H-tttttl
2.0
'I\:
1.5 f-.p~~It-++t+ttttl
:E
l=
1.0 l--t-IH'IOllII.::.5::.:mV~OVERDR~IV~E
I II
F=l=!10mV
10
100
~
10mV
0.5
o
1000
10
Im(pA)
mV OVERDRIVE
........ [11'
I.D
--H 50inV
D.:
2.5
2.0
1.5
50mV
100
1m (pA)
1000
TL/H/S023-3
5-79
CJ1
~
CD
C')
~
r--------------------------------------------------------------------------,
Typical Applications
....I
.......
~
Gated 4·Phase Oscillator
CD
"Voting" Comparator
N
~
5V
....I
47Dk
5V
"X"-J\IIoI\r-~-----I
22k
2k
5V
5V
lDDk
22k
lDDk
4.7k
DUTPUTS
lDDk
2k
~Ct
'::" 27D pF
5V
5V
4.7k
2k
15
5V
5V
4.7k
5V
D.l,F
r
2Dk
v,
:",_ _~1:.:4""_VDUT
5V
2D
TL/H/5023·4
1~20
TL/H/5023-5
kHz
1
I~---
1.6eRteCt
All four phases run when X is low. When X is high, oscillation stops and
power drain is zero.
II VE ~ O.25V, then VOUT will be low il 1 01 the 3 other outputs are low.
Choice of VE = O.50V causes VOUT to be low if 2 of the 3 other outputs are
low; VE = Q.75V will cause VOUT to be low if all 3 other outputs are low.
5·80
Typical Applications
(Continued)
Hysteresis from Emitter
Ordinary Hysteresis
V+
V+
4.7k
vIN----I
./--~~I--VOUT
'lk
V1M
TLlH/5023-6
TL/H/5023-7
It is a good practice to add a few millivolts of positive feedback to prevent
oscillation when the input voltage is near the threshold.
Positive feedback from the emitter can also prevent oscillations when VIN is
near the threshold.
Bar-Graph Display
Level-Sensitive Strobe
5V
5V
5V
5V
150k
46.4k
331
18k
VIN--I-.....-~
III
47k
0.4Vt--I-~
470k
VREF
YiN
330
lk
VREFft
III
STROBE
5V
"::'
LED
0.3Vt--I-~
2k
5V
330
lk
5V
III
2k
0.2V t---t""";=-I
15
lk
5V
III
2k
0.1Vt--.....;.~
14
lk
TL/H/5023-B
TLlH/5023-9
Comparators S, C, and 0 do not respond until activated by the signal applied
to comparator A.
The positive feedback from pin 16 provides hysteresis.
5-81
II)
~
Q.
Typical Applications
....I
.....
(Continued)
Slow Op Amp (Inverter)
II)
CD
Slow Op Amp (Unity-Gain Follower)
Y+
('II
V+
Q.
....I
v+
20k
RI
lOOk
...----+-"""iY-+-YOUT
20k
Y+
RI
lOOk
lOOk
YIN--'\MII""'"...---+-....JW'lr-~....-VOUT
R,.
47k
Y+-~~-t---~
10
10
+
+
T
J
1PF
TLiH/S023-10
IPF
TL/H/S023-11
RS = V+/20 pA
Rs = V+/20 pA
Unlike most comparators, the LP365 can be used as an op amp, if suitable
R-C damping networks are used.
The LP36S can also be used as a high-input-impedance follower-amplifier
with the damping components shown.
Chopping Outputs
Low Battery Detector
YBAT
5Y
470k
4.7k
5Y
Uk
4.7k
10M
5Y
Uk
1M
10M
15
LOW
BATTERY
o/'-~~" ALARM
5V
1.5M
4.7k
TLiH/S023-13
14
'S@6V= 45pA
Is@3.8V=II'A
TLiH/S023-12
f
=
3 kHz
Comparator A detects when the supply voltage drops to 4V and enables
comparator B to drive a piezoelectric alarm.
Chopping the outputs by modulating the ISET current allows data to be transmitted via apta-couplers, transformers, etc.
5-82
.-
."
Simplified Schematic
N
CI)
U1
.....
.-
."
Co)
CI)
U1
(+)
CURRENT
SOURCE
CONTROL
TL/H/5023-14
Current sources are programmed by ISET
VE is common to all 4 comparators
5-83
~
~
CO)
~
r------------------------------------------------------------------------------------,
~National
~ Semiconductor
LP311 Voltage Comparator
General Description
Features
The LP311 is a low power version of the industry-standard
LM311. It takes advantage of stable high-value ion-implanted resistors to perform the same function as an LM311, with
a 30:1 reduction in power drain, but only a 6:1 slowdown of
response time. Thus the LP311 is well suited for batterypowered applications, and all other applications where fast
response is not needed. It operates over a wide range of
supply voltages from 36V down to a single 3V supply, with
less than 200 p.A drain, but it is still capable of driving a 25
mA load. The LP311 is quite easy to apply without any oscillation, if ordinary precautions are taken to minimize stray
coupling from the output to either input or to the trim pins.
(See the LM311 section of the Linear Databook.)
•
•
•
•
•
•
•
•
Low power drain, 900 ",Won 5V supply
Operates from ± 15V or a single supply as low as 3V
Output can drive 25 mA
Emitter output can swing below negative supply
Response time: 1.2
Same pin-out as LM311
Low input currents: 2 nA of offset, 15 nA of bias
Large common-mode input range: -14.6V to 13.6V
with ± 15V supply
"'S
Schematic Diagram
.
BALANCE
~
UK
BALANCE!
STROBE
~.~----------------------~
"
5.2K
1 COllECTOR
OUTPUT
,OJ
'----'III2K_-~; ~~}~~
'G
UK
"UK
L-~-----+--~~~~~--~~---t----------~~
TL/H/5711-7
Connection Diagrams
Metal Can Package
Dual-In-Line Package
EMITTER
OUTPUT
Y+
1
Y+
7 COLLECTOR
OUTPUT
INPUT
6
INPUT
v-
BALANCEI
STROBE
YTOPYIEW
BALANCE
TUH/5711-4
Top View
Note: Pin 4 connected to case.
Order Number LP311 N
See NS Package Number N08E
Order Number LP311H
See NS Package Number H08C
5-84
TL/H/5711-3
rw
.....
."
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
36V
Total Supply Voltage (VS-4)
Collector Output to Negative Supply Voltage (V7 -4)
Collector Output to Emitter Output
Emitter Output to Negative Supply Voltage (V 1-4)
40V
40V
±30V
Differential Input Voltage
Input Voltage (Note 1)
±30V
±15V
500mW
Power Dissipation (Note 2)
Output Short Circuit Duration
10sec
Operating Temperature Range
O'Cto 70'C
Storage Temperature Range
-65'Cto 150'C
Lead Temperature (Soldering, 10 seconds)
2600C
Electrical Characteristics (Note 3)
Typ
Max
Units
Input Offset Voltage (Note 4)
TA=25'C, Rs,;;100k
2.0
7.5
mV
Input Offset Current (Note 4)
TA=25'C
2.0
25
nA
Input Bias Current
TA=25'C
15
100
nA
Parameter
Conditions
Min
TA = 25'C, RL =5k
Response Time (Note 5)
TA=25'C
1.2
Saturation Voltage (Note 6)
VIN';; -10 mY, IOUT=25 mA
TA=2S'C
0.4
1.5
V
200
300
".A
0.2
100
nA
10
mV
Strobe Current (Note 7)
TA=25'C
Output Leakage Current
VIN:
30
I!:
20
C>
10
60 70
EMITTER
FOLLOWER
OUTPUT
RL -lK
-1.0
TEMPERATURE ('C)
...13
~
C>
Response Time for Various
Input Overdrives
N~RM~L
OUTPUT
RL=5K
V++=50V
~
20,~~
-5\"'i ,,-2mV
DDMIW
'.~'
r
.,
1
YOuT
!
~
.....
C>
~
2~~r1
"'
i!l
0.2
1--+-2!!....!::.....L.--,;cf---j
1.0
0.5
10
15
1 IF..
TA=2S'C
TA=25'C
1
25
Output Saturation Voltage
(Emitter Output)
-..#,
.
,
20
OUTPUT CURRENT (mA)
V~= ±\5V
I
60 70
0.4
1
20ntl
1£
5"';' .....
50
~
.!ii
1
40
COLLECTOR
OUTPUT
g
Ii
II:
"-
0
30
Output Saturation Voltage
, Response Time for Various
Input Overdrives
VS= ±lSV
TA=25'C
-
-0.5
20
TEMPERATURE ('C)
DIFFERENTIAL INPUT VOLTAGE (ntI)
w
~
....
10
60 70
0.6
I
40
o
10
50
,
VS=30V
TA=25'C
REFERRED TO SUPPLY VOLTAGES
I--+-+-+-f-+-i--j
40
Transfer Function
60
.. -0.5
30
TEMPERATURE ('C)
Common Mode Limits
g
~
....
~
!:
100..
10
co
~
g
-
(SHORT PINS 5, 6, AND 8)
15
II:
U
Input Offset Current
0.6
VS= ±15V
@
r-so.. :-.
I-
YlIUI
7
.....-
.15"-
100 ;L
50
0
o
~
0510152025
OUTPUT CURRENT (mA)
TIME",.)
TlME(~.)
Respon~e Time for,Varlous
Input Overdrives
Response Time for VariOUS
Input Overdrives
g
i~ 15~j==t~~~~~~
I10
~
O~2=0=ntI~~~r.~-1-~-;
!
-5 t-=5"',ntI:;'--H7c-t
-10 i-='2ntI"f-H:M-t
w
-15~-+-1jL+-t
C>
~
0
TA~25'~
II:
II:
u
.
Ie
C>
0:
10 12
TIME (~.)
f150
u
~
TlME(~.)
.
~
F-i-+-+--+
10 12
200
.s<
iii
!: 100
~ -50 1--1--+-+-1
~ -100 ........-+-+-1
4 '
Output Limiting
, Characteristics
I
50 I
II
o
o
10
15
OUTPUT VOLTAGE (V)
TLlH/5711-5
5-86
r-
Typical Performance Characteristics
Supply Current
350
300
<"
.;; 250
....
I
200
=>
'" 150
~~
100
50
,.,.
~UPPL~
V
'"
/"
-
Leakage Currents
Supply Current
400
TA=25"C
POSIITIVE
OUTPUT LOW
"tJ
.....
.....
(,)
(Continued)
1... 300
~=>
200
'"
~
=>
POSITIVE AND
NEGATIVE SUPPLY
OUTPUT HIGH
10
15
20
25
SUPPLY VOLTAGE IV)
3D
'"
-
PllSITIVE SUPPLY _
;;;;; r-.J.U TPUT LOF
r- 100
10-7
I I VS=30V
I
r-,.;;;:: ~
POSITIVE AND
NEGATIVE SUPPLY I-OUTPUT HIGH
...~ 10-8 I-t-t-H-t-+-+-+--l
~ 10-9
a
~ 10-10
..J
I I I
0102030 40 50
TEMPERATURE I"C)
6070
r-r-r-,-,--,--,--,---,--,
10-11
10-12 =L-L......J--I---l.-L-L-l..-I
25 3D 35 40 45 50 55 60 65 70
TEMPERATURE I"C)
TL/H/5711-6
Applications Information
For applications information and typical applications, refer to the LM311 datasheet.
Auxiliary Circuits
Strobing
Offset Balancing
R2
15k
y+
R1
15k
'::'
TL/H/5711-2
TL/H/5711-1
Nole: Do nol ground strobe pin.
5-87
~National
~ Semiconductor
LP339 Ultra-Low Power Quad Comparator
General Description
The LP339 consists of four independent voltage comparators designed specifically to operate from a single power
supply and draw typically 60 /LA of power supply drain current over a Y,'ide range of power supply voltages. Operation
from split supplies is also possible and the ultra-low power
supply drain current is independent of the power supply voltage. These comparators also feature a common-mode
range which includes ground, even when operated from a
single supply.
•
•
•
•
Single supply operation
Sensing at ground
Compatible with CMOS logic family
Pin-out identical to LM339
Features
• Ultra-low power supply current drain (60 p.A)-independent of the supply voltage (75 /LW/comparator at
+5 VDC)
3 nA
• Low input biaSing current
±O.5 nA
• Low input offset current
±2mV
• Low input offset voltage
• Input common-mode voltage includes ground
• Output voltage compatible with MOS and CMOS logic
• High output sink current capability (30 rnA at
Vo=2 VDC)
• Supply Input protected against reverse voltages
Applications include limit comparators, simple analog-to-digital converters, pulse, square and time delay generators;
VCO's; multivibrators; high voltage logic gates. The LP339
was specifically designed to interface with the CMOS logic
family. The ultra-low supply current makes the LP339 valuable in battery powered applications.
Advantages
• Ultra-low power supply drain suitable for battery applications
Schematic and Connection Diagrams
V·
OUTPUT 3 OUTPUT 4
14
GNO
OUTPUT 2 OUTPUT 1
Y+
INPUT4+ INPUT4- INPUT 3+ INPUT310
9
8
r-t-=.....-OUTPUT
+INPUT
-INPUT
----"'-+----11-"'---'
INPUT 1- INPUT 1 + INPUT 2 - INPUT2 +
TOPYIEW
TL/H/5226-2
TL/H/5226-1
Order Number LP339M for S.O. Package
See NS Package Number M14A
Order Number LP339N for Dual-In-Line Package
See NS Package Number N14A
Typical Applications (V+ =
5.0 VDcl
Driving CMOS
Basic Comparator
Y+
Y+
30k
TUH/5226-3
TL1H/5226-4
5-88
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
36 Voc or ±18 Voc
Differential Input Voltage
± 36Voc
Input Voltage
-0.3 Voc to 36 Voc
Power Dissipation (Note 1) Molded DIP
570mW
Output Short Circuit to GND (Note 2)
Continuous
Input Current VIN< -0.3 Voc (Note 3)
Operating Temperature Range
Storage Temperature Range
Soldering Information:
Dual·ln·Line Package (10 sec.)
S.O. Package:
Vapor Phase (60 sec.)
Infrared (15 sec.)
50 rnA
O°Cto +70°C
-65° to + 150°C
+ 260°C
+215°C
+ 220°C
See AN·450 "Surface Mounting Methods and Their Effect
on Product Reliability" for other methods of soldering sur·
face mount devices.
Electrical Characteristics (V + = 5 Voc, Note 4)
Typ
Max
Units
Input Offset Voltage
Parameter
TA = 25°C (Note 9)
Conditions
±2
±5
mVoc
Input Bias Current
IIN( +) or IIN( -) with the
Output in the Linear Range, TA = 25°C (Note 5)
2.5
25
nAoc
Input Offset Current
IIN(+)-IIN(-), TA = 25°C
±0.5
±5
nAoc
Input Common
Mode Voltage Range
TA = 25°C (Note 6)
V+-1.5
Voc
100
]LAOC
Min
0
Supply Current
RL = Infinite on all Comparators, TA = 25°C
60
Voltage Gain
Vo = 1 Vocto 11 Voc,
RL = 15 k!l, V+ = 15 Voc, TA=25°C
500
V/mV
Large Signal
Response Time
VIN=TTL Logic Swing, VREF= 1.4 VOC,
VRL =5 Voc, RL =5.1 k!l, TA=25°C
1.3
]LSec
Response Time
VRL = 5 Voc, RL = 5.1 k!l, TA = 25°C (Note 7)
8
]LSec
Output Sink Current
VIN(-)=1 VDC, VIN(+)=O, Vo=2VDC,
TA=25°C (Note 11)
15
30
mAoc
0.20
0.70
mAoc
Vo=O.4 Voc
Output Leakage Current
VIN(+)=1 Voc, VIN(-)=O, Vo=5Voc, TA=25°C
Input Offset Voltage
(Note 9)
Input Offset Current
IIN(+)-IIN(-)
Input Bias Current
IIN( +) or IIN( -) with Output in Linear Range
Input Common
Mode Voltage Range
Single Supply
0.1
0
Output Sink Current
VIN(-)=1 Voc, VIN(+)=O, Vo=2Voc
Output Leakage Current
VIN(+)=1 Voc, VIN(-)=O, Vo=30Voc
nAoc
±9
mVoc
±1
±15
nAoc
4
40
nAoc
V+ -2.0
Voc
10
mAoc
1.0
]LAOC
Differential Input Voltage
36
All VIN'52 0 Voc (or V - on split supplies) (Note 8)
VOC
Note 1: For elevated temperature operation, Tj max is t2S'C for the LP339. 6ja ijunction to ambient) is 17S'C/W for the LP339N and 120'C/W for the LP339M
when either device is soldered in a printed circuit board in a still air environment. The low bias dissipation and the "ON~OFF" characteristic of the outputs keeps the
chip dissipation very small (Po <: 100 mW), provided the output transistors are allowed to saturate.
Note 2: Short circuits from the output to V + can cause excessive heating and eventual destruction. The maximum output current is approximately 50 rnA.
Note 3: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP
transistors becoming forward biased and thereby acting as input clamp diodes. In addition to this diode action, there is also lateral NPN parasitic transistor action
on the IC chip. This transistor action can cause the output voltage of the comparators to go to the V+ voltage level (or to ground for a large input overdrive) for the
time dUration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which is negative, again
returns to a value greater than -0.3 VOC (TA=2S·C).
Note 4: These specifications apply for V+ =SVoc and 0'C<:TA<:70' C, unless otherwise stated. The temperature extremes are guaranteed but not 100%
production tested. These parameters are not used to calculate outgoing AQL.
Note 5: The direction of the input current is out of the Ie due to the PNP input stage. This current is essentially constant, independent of the state of the output, so
no loading change exists on the reference or the input lines as long as the common-mode range is not exceeded.
Note 6: The input common·mode voltage or either input voltage should not be allowed to go negative by more than 0.3V. The upper end of the cammon·mode
voltage range is V+ -1.5V (TA = 2S'C), but either or both inputs can go to 30 Voc without damage.
Note 7: The response time specified is for a 100 mV input step with 5 mV overdrive. For larger overdrive signals 1.3 pos can be obtained. See Typical Performance
Characteristics section.
5·89
Electrical Characteristics (V + = 5 Voc. Note 4) (Continued)
Note 8: Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common·mode rangB, the
comparator will provide a proper output state. The low input voltage state must not be less than -0.3 Voc (or 0.3 VDC below the magnitude of the negative power
supply. if used) at TA = 25°C.
Note 9: At output switch pOint. VO= 1.4V. RS=On with V+ from 5 Voc; and over the full input common-mode range (0 Voc to V+ -1.5 VDcl.
Note 10: For input signals that exceed V +. only the overdriven comparator is affected. With a 5V supply, VIN should be limited to 25V maximum, and a limiting
resistor should be used on all inputs that might exceed the positive supply.
Note 11: The output sink current is a function of the output voltage. The LP339 has a bi-modal output section which allows it to sink large currents via a Darlington
connection at output voltages greater than approximately 1.5 Voc and sink lower currents below this point. (See typical characteristics section and applications
section).
Typical Performance Characteristics
100
1.0
RL=OO
:!
I
=
~
~
80
60
40
TA~O"C
~
TA=70"C
o
10
20
3D
SUPPLY VOLTAGE (Voc)
o
40
I I
I I
;;
oS 80
I
60
'"z
40
~
20
o
I I
I
~I
T~ -J"C
;;;::
-~
TA-25'C
~I.ooo
B
=
r: =
1~~a5"C
....-
~
I~
~
~;~"crI I
I I
~
o
OUTPUT VOLTAGE (VOC)
o
0.6
'"inz
0.4
J
~
0.2
L
=
=
10
20
30
V+ - SUPPLY VOLTAGE (Voc)
5.0
4.0
~>
0.-
I I'
3.0
l00mV
2.0
I
>1> 1.0
20mV
0
~>
§~
121
liS.
-
~
-50
~ ~-lo0
TA-70"C
M
0.2
0.4
0.6 0.8
OUTPUT VOLTAGE (VOC)
1.0
Response Times for
Various Input
Overdrives Positive Transition
VD
SVDc
~>
0.-
~~
l!:l
::~
I II I
~V~~~:I~~t-
-
I I I I
I I I I
~>
~~
I~
TA-25"C
10
15
TIME (.')
~·ITA-25"C
0.0 ~
0.0
40
,.~
»
~
~
~
B
I
I I
--~A=O"C
0.8
Response Times for
Various Input
Overdrives Negative Transition
Output Sink Current
...
TAI=o'C
...§.
TA 7o"C
100
in
r- -
20
o
«
I
TA-25"C
I",
~
VINICM) =0 VOC
RINICM)=lo1DO
I I
,
Output Sink Current
Input Current
Supply Current
20
z!:l
,..=
>
5.0
4.0
3.0
2.0
1.0
0
100
50
0
I
-l
-i
5m~1J-2o~V r- OVERDRIVE
I I I
1.1...1.
,.~.•.
TA=25"C
10
15
TIME(,..)
20
TLlH/5226-10
5-90
Application Hints
All pins of any unused comparators should be grounded.
Notice that the output section is configured in a Darlington
connection (ignoring 03). Therefore, if the output voltage is
held high enough (Vo~ 1 Vocl, 01 is not saturated and the
output current is limited only by the product of the betas of
01, 02 and 11 (and the 60n RSAT of 02). The LP339 is thus
capable of driving LED's, relays, etc. in this mode while
maintaining an ultra-low power supply current of typically
60 ",A.
If transistor 03 were omitted, and the output voltage allowed to drop below about 0.8 VOC, transistor 01 would
saturate and the output current would drop to zero. The
circuit would, therefore, be unable to 'pull' low current loads
down to ground (or the negative supply, if used). Transistor
03 has been included to bypass transistor 01 under these
conditions and apply the current 11 directly to the base of
02. The output sink current is now approximately 11 times
the beta of 02 (700 ",A at Vo=O.4 Vocl. The output of the
LP339 exhibits a bi-modal characteristic with a smooth transition between modes. (See Output Sink Current graphs in
Typical Performance Characteristics section.)
The bias network of the LP339 establishes a drain current
which is independent of the magnitude of the power supply
voltage over the range of from 2 Voc to 30 Voc.
It is usually unnecessary to use a bypass capacitor across
the power supply line.
The differential input voltage may be larger than V + without
damaging the device. Protection should be provided to prevent the input voltages from going negative more than -0.3
Voc (at 25"C). An input clamp diode can be used as shown
in the application section.
The output section of the LP339 has two distinct modes of
operation-a Darlington mode and a grounded emitter mode.
This unique drive circuit permits the LP339 to sink 30 mA at
Vo=2 Voc (Darlington mode) and 700 ",A at Vo=O.4 VOC
(grounded emitter mode). Figure 1 is a simplified schematic
diagram of the LP339 output section.
.....------VCC
It is also important to note that in both cases the output is
an uncommitted collector. Therefore, many collectors can
be tied together to provide an output OR'ing function. An
output pull-up resistor can be connected to any available
power supply voltage within the permitted power supply
voltage range and there is no restriction on this voltage due
to the magnitude of the voltage which is applied to the V +
terminal of the LP339 package.
r:o:---.-VOUT
-=-
TL/H/5226-11
FIGURE 1
Typical Applications
(V+ = 15 Vocl
One-Shot Multivibrator
V+
100 pF
V;~
to
+VIN
tM
10k
-11-....--....---1
o.oot ~F
TL/H/5226-13
5-91
CD
CO)
~
Typical Applications (V+
= 15 Voc)
...I
Time Delay Generator
V'
10k
30k
200k
15k
10M
10k
v"
V3
v;::::r
1
1
.3
HI
30k
51k
10M
10k
VC1
V;:r-l.. +VIN
••
INPUT GATING SIGNAL
v"
V2
to
v;::r
1 1
ID '2
3Dk
V+
...
-
V3
ft
10M
51k
10k
V2
V"
VI
V+:r01
1
to t1
VI
51 •
t1
12
•3
••
':'
TLlH15226-15
ORing the Outputs
v+
Vo
TLIH15226-16
5-92
Typical Applications (Continued) (V+ = 15 Voe)
Pulse Generator
Squarewave Oscillator
Y+
Y+
R1
10k
750 pF
1M
01
1N914
15k
100k
P
Y+-n
Yo
r-
...I L-I
r
10 t1
1=10 kHz
--+1
60 ,..
Y+-,..,
,..,
...I L..---I ~
Yo
1-s00_1
12
100k
TLlH/5226-17
1M
TL/H/5226-18
Three Level Audio Peak Indicator
- , - - - - - - -....- -........ +5V
Bi-Stable Multivlbrator
HOC
5V
15k
lOOk
51.
lOOk
lOOk
TL/H/5226-21
56k
.,..
TL/H/5226-19
Relay Driver
LED Driver
•
1ZY (10 mAl
RELAY
COIL
+YIN
+VIN
-YIN
':'
-YIN
':'
TLlH/5226-22
5-93
TL/H/5226-23
G)
C")
~
Typical Applications (Continued) (Single Supply)
...I
Comparator With 60 mA Sink Capability
Buzzer Driver
1 2 V " " 1 - - - - -....-
....--t---1P-
12V
BUZZER
-20mA
Tl/H/5226-24
1-60
mA
1M
1M
Tl/H/5226-25
Non-Inverting Comparator with Hysteresis
Inverting Comparator with Hysteresis
Y·
V·
+VREF-----t
30k
+V'N-----I
Vo
10k
Vo
1M
V·-,.,..,..,.....-I
+V'N-M""""'''
1M
TlIH/5226-26
1M
TlIH/5226-27
Basic Comparator
Output Strobing
Comparing Input Voltages
of Opposite Polarity
Y·
> ....--Vo
lOOk
+Y'Nl-""'''''''''
STROBE
INPUT
lOOk
-Y'N,-'W\t-"
Y·
Vo
Tl/H/5226-29
Tl/H/5226-30
TlIH/5226-28
5-94
r-
Typical Applications
"'tI
(0)
(0)
(Continued) (Single Supply)
co
Transducer Amplifier
Zero Crossing Detector (Single Power Supply)
V+
V+
10k
lOOk
30k
lOOk
51k
5.1k
V,N
MAGNETIC
PICKUP
II
Vo
Vo
20M
20M
10k
10k
':"
TUH/5226-32
TL/H/5226-31
Split-Supply Applications
Zero Crossing Detector
Comparator With a Negative Reference
V+
V+
51k
51k
Vo
Vo
TL/H/5226-33
5-95
TLlH/5226-34
Section 6
Instrumentation Amplifiers
Section 6 Contents
Instrumentation Amplifiers Definition ofTerms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Instrumentation Amplifiers Selection Guide ............................................
LH0036/LH0036C Instrumentation Amplifier.... ..... ......... . ..... ...... ... ..........
LH0038/LH0038C True Instrumentation Amplifier... ........... ..... .. .. ..... ..........
LH0084/LH0084C Digitally-Programmable-Gain Instrumentation Amplifier. . . . . . . . . . . . . . . . .
LM221/LM321/LM321A Precision Preamplifiers.......................................
LM363 Precision Instrumentation Amplifier. . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6·2
6-3
6-4
6-5
6-14
6-25
6-37
6-46
5'
.c..
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CD
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Instrumentation Amplifiers
Definition of Terms
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Bandwidth: That frequency at which the voltage gain is reduced to 1/,f2 times the low frequency value.
Large-Signal Voltage Gain: The ratio of the output voltage
swing to the change in input voltage required to drive the
output from zero to this voltage.
Common-Mode Rejection Ratio: The ratio of the input
common-mode voltage range to the peak-to-peak change in
input offset voltage over this range.
Output Impedance: The ratio of output voltage to output
current under the stated conditions for source resistance
(Rs) and load resistance (Rd.
Harmonic Distortion: That percentage of harmonic distortion being defined as one-hundred times the ratio of the
root-mean-square (rms) sum of the harmonics to the fundamental. % harmonic distortion =
(V22
Output Resistance: The small signal resistance seen at the
output with the output voltage near zero.
Output Voltage Swing: The peak output voltage swing, referred to zero, that can be obtained without clipping.
+ V3 2 + V42 + .. .)1/2 (100%)
Offset Voltage Temperature Drift: The average drift rate
of offset voltage for a thermal variation from room temperature to the indicated temperature extreme.
V1
where V1 is the rms amplitude of the fundamental and V2,
V3, V4, ... are the rms amplitudes of the individual harmonics.
Power Supply Rejection: The ratio of the change in input
offset voltage to the change in power supply voltages producing it.
Input Bias Current: The average of the two input currents.
Settling Time: The time between the initiation of the input
step function and the time when the output voltage has settled to within a specified error band of the final output voltage.
Input Common-Mode Voltage Range: The range of voltages on the input terminals for which the amplifier is operational. Note that the specifications are not guaranteed over
the full common-mode voltage range unless specifically
stated.
Slew Rate: The internally-limited rate of change in output
voltage with a large-amplitude step function applied to the
input.
Input Impedance: The ratio of input voltage to input current
under the stated conditions for source resistance (Rs) and
load resistance (R[).
Supply Current: The current required from the power supply to operate the amplifier with no load and the output midway between the supplies.
Input Offset Current: The difference in the currents into
the two input terminals when the output is at zero.
Transient Response: The closed-loop step-function response of the amplifier under small-signal conditions.
Input Offset Voltage: That voltage which must be applied
between the input terminals through two equal resistances
to obtain zero output voltage.
Unity Gain Bandwidth: The frequency range from dc to the
frequency where the amplifier open loop gain rolls off to
one.
Input Resistance: The ratio of the change in input voltage
to the change in input current on either input with the other
grounded.
Voltage Gain: The ratio of output voltage to input voltage
under the stated conditions for source resistance (Rs) and
load resistance (R[).
Input Voltage Range: The range of voltages on the input
terminals for which the amplifier operates within specifications.
6-3
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~National
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Instrumentation Amplifiers
Selection Guide
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20
V
10
I'"
10
25
-55 -25
50
75
100
--I-
30
!:;
100
i
.1 ,L
PIN I' 3&19 GR~UND~D
fA" 25"C
PIN I, 3 &9 GROUNDED
40
~
1
...
290
20
Rl"'Ok
PINS ",3, & 9 GROUNDED ~
V,i",JV
C 300
.
I
50
= I=:::: :::::
~?
TAz25°C
- -
310
Output Voltage Swing vs
Supply Voltage
Supply Current vs
Supply Voltage
2.0 4.0 &.0 8.0 10 12 14 1&
125
18
+2.0
SUPPLY VOLTAGE ('V)
TEMPERATURE (OC)
Peak to Peak Output
Voltage Swing vs RL
±6.0
flO
±14
!11
SUPPLY VOLTAGE (V)
Closed Loop Voltage
Gain vs Frequency
Total Input Noise Voltage'
vs Frequency
3&
11111111
34
".
~
28
'"
24
~
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IIJ~~I!'5J
32
11111111
C>
C
2.4
C>
>
1111111
1111111
I!:
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C>
10k
PINS I & 3 GROUNDED
30
~
20
1.2
D••
T. -25°C
PINS I, 3, & 9 GROUNDED
I.Ok
50
!:i
<
2.0 :;!
....
1.&
5
Vs =!lSV
I-~mt~RL"'0k
T. - 25'C
:;j
I
~~'~I:'.5V
20
60
,.
~
10
!..
0.4
0
1.OM
lOOk
10
100
100
10k
I.Ok
10k
I.Ok
FREQUENCY (Hz)
LOAD RESISTANCE (Il)
lOOk
1,OM
FREQUENCY (Hz)
-Noise voltage includes contribution from source resistance
Closed Loop Voltage Gain
Common Mode Voltage vs
Supply Voltage
CMRR vs Frequency
RL ::lOk
f'" 14Hz
TA " 25"C
PINS I, 3, & 9 GROUNDED
:>
~
z
~
100
~
~
C>
/
~
ffi
~
10
/
10
110 -
~
t;;
::l
~
:1
...
ii
~
22
20
I
I
Vs = :!:15V
I--
30
~
l-
l
~
'"~
...>
'"~
C>
20
10
o
-55 -25
C>
Vs= tl.5V
25
50
TEMPERATURE
75
rc)
100 125
1111
18
1&
I~
1111
14 l 12
I ~~L
tIS
±IO
SUPPLY VOLTAGE ('V)
I
1111
:tID
±5.0
lOOk
Output Voltage Swing vs
Frequency
PINS I, 3, & 9 GROUNDED
40
10k
I.Ok
FREQUENCY (Hz)
GAIN SET RESISTOR (n)
Input Bias Current
50
100
V
/
Large Signal Pulse Response
III
"0
AYCL '" 1.0
~
..'"
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~
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>
...
10
8.0
~
Vs ":t'5V
RLIEIO.
&.0
4.0
2.0
o
~i'N; ~5~Ca 9 GROUNDED ~
100
1.0k
10k
FREQUENCY (Hz)
Vs ·'15V
1\
Rt " 10k
AyCl " 1.0
-10
PINS 1,3, & 9 GROUNDED
lOOk
40
80
120 160 200 240 280
TIME,".)
TL/H/5545-2
6-8
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Typical Applications
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......
Pre MUX Signal Conditioning
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Instrumentation Amplifier with
Logic Controlled Shut-Down
!UIIY
IIII.ur
o
r-----.....
----
40
Vs= ±15V
TA" Z5~C
20
~S=lk
Ave L = lk, VIN= ±IDV
1k
100
80
60
~
40
~
20
'"
lOOk
10k
----\.......
10
...
-c-- ~~,
n
~
~
o
Supply Current
18
Vs= '15V
"'::::
..
WOk
10k
FREQUENCY (Hzl
~I\t--
--
-
1k
100
Output Swing
....~
,....
,
::;
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II
II
1.75
;(
.§
1.50
....z
1.25
'"'"
1.0
w
~
~
>- 0.75
~
0.50
0.Z5
o
o
OUTPUT CURRENT ('rnA)
fREQUENCY 1Hz)
o
fL
SUPPLY VOLTAGE I!Vocl
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15
~
T\12:"e
10
FREOUENCY (Hz)
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15
100
10
r-r
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o
10
120
1M
lOOk
',','sv
.....
40
~
a; 140
Input Noise Voltage
(Includes Source Impedance)
I~
~
....
-
TA'-5~
60
140
FREQUENCY (Hzl
14
80
~
a;
0
0
0
0
""
Common-Mode Rejection
-
60
50
-5
100
co
.......
r-
Input Bias Current
VCM :ov
COMMON MODe INPUT VOLTAGE (V)
10rTrrm~nTmr"nmrTTmm
z
-10
I-
;(
i
-1--
TA = 25"C
~
-......::
100
1
~~c-
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TEMPERATURE eel
~
120
Vs= !15V
100
1 1
1 1
I.........
nput B"las Current
110
J J
~
20
~ 1.15
«:)
«:)
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TA!*
l-
1
TA! 125 e
k::::=P::~_5~e
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~
-
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I
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10
15
20
SUPPL't VOLT AGE t'V)
TLlH/5543-3
Wide Band Noise
Pulse Response
Rise Time
~
±15V, Rs
~
1 kfl, Ay
Vertical sensitivity: 0.1 !£VlCM
Horizontal sensitivity: 5 steM
~
10k, DUT
~
lk
TLlH/5543-6
TLlH/5543-5
TUH/5543-4
Vs
Vs
~
±15V
Vs~
±15V
RL:>10kfl
RL;" 10kfl
AVCL ~ lk
AYCL ~ lk
Bandwidth: 0.1 Hz to 10Hz
6-17
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CI
Noise Test Circuit
:x:
....I
X lk
co
15V
-
......
X 10
-
TEKTRONIX 1623
Cf)
CI
CI
:x:
....I
D
RS
1A22
COAX
RS
(t1
0.1 TO 10 Hz
III
LLL,""~ B~E3E31
nUAN·TECH
MOOEl2181
TL/H/5543-7
FIGURE 1
Typical Application
lHDD1D
lD.DDV REFERENCE
2
>.:........00 'OUT
-15V
-
TLlH/5543-8
FIGURE 2. X1000 Bridge Amplifier
Applications Information
THEORY OF OPERATION
be 20 p.A per side. The action of A2 and A3 is such that
20 p.A is maintained constant despite the presence of common-mode signals. The differential outputs of A2 and A3 are
applied to differential amplifier, A4, which converts the sig·
nal to a single-ended output and provides gain of 5. The
total gain of the amplifier is, therefore, the fixed gain of 5
multiplied by the gain of the composite input stage.
The LH0038 is a 3-stage, true instrumentation amplifier
composed of a well matched transistor differential pair, 01
and 02, a common-mode loop amplifier, A2 and A3, and a
differential to single ended amplifier, A4. A simplified schematic is shown in Figure 3.
Current source, lA, establishes a voltage across R14 of approximately 2V, which results in a 2V drop across R8 and
R12. This constant voltage forces the first stage current to
6-18
Applications Information
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(Continued)
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......
RS
R12
lOOk
lOOk
r::z:
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Ct.)
co
o
R20
lOOk
Vl
RS
20k
11 = IARRS14
12 = IA R14
R12
·OUT
V2
R19
20k
R21
lOOk
R17
lOOk
TLlH/5543-9
FIGURE 3. LH0038 Simplified Schematic
The closed loop gain of the composite amplifier may be
better understood by referring to Figure 3. The Q1-A2 loop
may be viewed as differential amplifier with the inverting
input at the base and non-inverting input at the emitter.
Combining small signal AC and large signal DC analysis =
v1 = e1 (R17 + RE) _ e2 (R17)
RE
RE
+ ECM - VSEl - 11R17
By similar analysis:
2R16
)
AYCL= 5 ( ~+ 1
As an example, with all gain pins open, RE = 10.525 kn,
and;
2) (100k)
AYCL = 5 ( ~
(1)
A
YCL
(~1E6)
(3)
R20
As =
= 100.0
(7)
= 5 00 [
(2) (100k)
.
(10.526) II (10.000k)
+ 1]
(8)
Table 1 summarizes the primary gain configurations available with the LH0038. Obviously, other gains are possible.
Using the internally supplied resistors has the advantage
that R16, R17, and RE all track thermally, minimizing the
device's gain error as a function of temperature.
Gain adjustment by paralleling or series padding internally
supplied resistors is generally discouraged since external
resistors will generally not thermally track. It is recommended that the gain adjustment be done in a subsequent stage
as shown in Figure 4.
(5)
where:
AYCL4 =
)
CLOSED LOOP GAIN CONSIDERATIONS
USING INTERNAL RESISTORS
v2-v1
2R16
---=--+1
(4)
e2 - e1
RE
The differential input voltage (v2 - v1) is amplified by the
closed loop gain of A4:
eOUT = (AYCL4) (e2 - e1)
1
= (5.00) (40) = 200
R16 + RE)
RE
v2 - vt = (e2 - e1) (
- e1)
+
All other closed loop gain configurations place a precision
resistor in parallel with RE(R9 + R10). For example, for a
gain of 200, pin 6 is connected to pin 10 and the gain is
predicted by:
v2 = e2 ( R16 + RE) -e1 (R16)
RE
RE
(2)
+ ECM - VSE2 - 12R16
For 11 == 12, R17 == R16, VSE1 == VSE2, subtracting equation (1) from (2) results in:
+ (e2
(6)
5.00
6-19
•
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Applications Information (Continued)
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x 1000
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>=--. .-oVOUT
TLlH/5543-10
FIGURE 4. Recommended Gain Adjust Circuit
TABLE I. LH0038 Internal Gain Configurations
First
Overall
Stage
Gain
Gain
100
200
400
500
1000
2000
20
40
80
100
200
400
Pin
Configuration
drive amplifier is short-circuit proof and is capable of driving
several thousand pF without danger of latch-up or oscillation.
Effective
The guard drive tied to a shielded input cable will greatly
reduce noise pick-up, and also improve AC CMRR by maintaining the shield at the common-mode voltage. Figure 5
illustrates the proper use of the guard drive. The guard drive
output is also connected to the case to provide electrostatic
shielding to the system.
RE
All Gain Pins Open
10.5260 kfl
Pin 6 to Pin 10
5.1281 kfl
Pin 6 to Pin 9, Pin 10 to Pin 5 2.5316 kfl
Pin 6 to Pin 10, Pin 9 to Pin 5 2.0202kfl
Pin 7 to Pin 10
1.0050kfl
Pin 8 to Pin 10
0.5013 kfl
REMOTE OUTPUT SENSE
The feedback network of the LH0038 may be closed directly
at the load in order to eliminate errors due to lead resistance. Also, a unity gain buffer; e.g. LH0002, may be included within the feedback loop to increase output current capability as shown in Figure 7.
GUARD DRIVE
The LH0038 is provided with a guard drive output, which will
always be at the input common-mode voltage. The guard
SIGNAL
SOURCE
>~"'OVOUT
-15V
TL/H/5543-11
FIGURE 5. Guard Drive Application
6-20
r-
Applications Information
::I:
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(Continued)
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15V
(IC)
......
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(IC)
1
o
VOUT
TL/H/5543-12
FIGURE 6. Remote Sense Connection
15V
I
VOUT
IOUT?100mA
TL/H/5543-13
FIGURE 7. Output Buffer Connection
OFFSET NULL
15V
Offset of the LH003B is trimmed by the factory to a very low
value. The offset may be further trimmed using a 10 kn, 10
turn, 100 ppmrC potentiometer as shown in Figure 8. However, a drift increase of 0.3 p. V
will be caused for each
100 P.V of offset adjusted. The recommended offset null is
shown in Figure 4 and is accomplished in the following
stage.
rc
>~""'OVOUT
BIAS CURRENT CONSIDERATIONS
The LH003B exhibits bias current of approximately 50 nA
per side, and requires a path to ground or supply. The practical limitation to the maximum resistance between the inputs and ground is dictated by negative common-mode
range as shown in Figure 9. For example, for VCM = -10V,
RCM ,;; 20 Mn.
The LH003B input stage bias was optimized for minimum
voltage noise so the input bias currents are higher than
might otherwise be expected. Note, however, that the input
currents are very well matched, resulting in an offset current
value much lower than one might infer from the bias current.
In order to take advantage of this low offset current, the
source impedances at both inputs should be matched to
minimize DC drift. Further, bias current is relatively constant
with temperature (as opposed to an FET stage), so one can
consider bias current compensation schemes such as
shown in Figure 10. The danger with such techniques is that
the offset current and noise contributed by the bias current
compensator will dominate the system noise.
-15V
TL/H/5543-14
FIGURE 8. Offset Adjust Circuit
(See also Figure 4 )
15V
>--,,-oVOUT
-
RCM ,; IVcMRI - VCM
lSI + IS2
182
ReM
where:
-15V
VCMR ~ Common-Mode Range ~ ±12V
VCM ~ Common·Mode Inpu1 Voltage
lSI
+
IS2
~
Bias Current
~
100 nA
FIGURE 9. Bias Current Return
TL/H/5543-15
6-21
•
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Applications Information
(Continued)
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......
15V
CO
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LM1J4
CURRENT
SOURCE
:::J:
....
Uk
-200~A
lOS
-tiOnA
>~t-o VOUT
-15V
TL/H/5543-16
FIGURE 10. Bias Current Compensation
put stage. In most discrete instrumentation amplifier realizations, the stray capacitance mismatch dominates simply because the stray capacitances are relatively large (this can
be trimmed out in a discrete amplifier). In a hybrid circuit
such as the LH0038, stray capacitance is minimized, so the
effects of mismatch are also minimized.
SETTLING TIME
The LH0038 has been purposely over-compensated, and is
therefore remarkably free from any undesirable transient response. Small signal settling time is governed by gain-bandwidth product; large signal settling time is dominated by
slew rate.
Figure 11 shows an input voltage. step of +10V to -10V
applied, through a 1000 to 1 voltage divider, to the device
configured for an inverting gain of 1000. The output of the
device will therefore be equal to the negative of the input
after the device is completely settled. By resistively subtracting the input before the divider from the device output,
a pseudo summing node is generated. The voltage at this
pseudo summing junction goes "off screen" on the photos,
since in the first small time increment the input goes instantaneously to -10 mV and the output is still at + 10V. About
130 I-'s after the input has gone negative, the output slews
back in range and begins an exponential approach to the
final value. Figure 12 is the same set-up for a -10V to
+ 1OV input pulse. Note that there is no overshoot in either
case. The test circuit is shown in Figure 13.
The response to a pulse or noise spike applied as a common-mode signal may be dominated by the slew characteristics of the input stage. Whenever the common-mode input
slew rate exceeds 0.2 V/ I-'s, the 2 input amplifiers will apply
identical ramp signals to the final stage and cause its output
to go to near OV. Note that the amplifier is not really active
under these conditions as normal mode Signal variations will
not be coupled to the output. Some time may,be required for
the amplifier to settle after a transient of this kind before the
output can be considered representative of the input. Slew
rate limiting will not normally be the limiting factor for sine
wave common-mode signals as 0.2 V/ I-'s corresponds to
about 2 kHz (20 Vp-p).
POWER SUPPLY DECOUPLING
Although the LH0038 exhibits in excess of 120 dB PSRR at
DC, the figure degrades to 100 dB at 120 Hz. It is recommended that both V+ and V- leads be by-passed with 11-'F
electrolytic ,in shunt with 0.Q1 I-'F ceramic disc no, further
than 1 inch from the device.
HIGH FREQUENCY CMRR
The LH0038 resistor ratios are carefully trimmed for optimum CMRR at DC through 60 Hz. Inevitably, this rejection
will degrade at higher frequencies due to 2 separate effects:
stray capaCitance mismatch and slew rate limiting in the in-
6-22
Applications Information
r:I:
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(Continued)
ot.)
(XI
.......
r:I:
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t.)
PSEUDO
UMMING
JUNCTION
(XI
(')
TLIH/5543-17
Is,Av
~
100, V,N
~
-20V
FIGURE 11. Settling Time
PSEUDO
SUMMING
JUNCTION
TLlH/5543-18
Is, Av
~
100, V,N
~
-20V
FIGURE 12. Settling Time
10k
0.1%
1k
10T
10
10k
0.1%
L------+-to
15V
PSEUDO
SUMMING JUNCTION
OUTPUT
vlo··:ov
VD·O
=TD IOV
TO IOV
VO" IOV
TO .. 10V
C-VD·O
0.1 I==TD IOV
INPUT
20Vp-p
VS" t15V
100
10
..
.
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100
1k
10k
-
;;:
!
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GUARANTEED
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10
TA"-'5"C
14
I--- TA -Z5 C
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I-- r- TA=ZO'~\
±BV';;VS';; ±llV
VCM=O
RS'5on
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10
.
-. -
TA = 5"C
5
10
I'
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~
10
GUARANTEED
-1%
I
I
ZO
30
OUTPUT CURRENT (tmA)
Broadband Output
Noise Voltage
i
~ 160
~
140
~
120
~
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60
I-
40
~
40
!!!
ZO
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20
~
=
BW 10 Hz-l0 kHz
BO
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I-V~=~15VIIIII
I- RS='OI1
TA-Z'oC
60
FREQUENCY (HzI
:--..tJ.·c, 1\
10
~
100
Vs- .15V
TA-\2.'C
ZO
80
~
lOOk
TA = ZO'C
~
100
!ij
I
f-lJ
!;
IsH
180 r-TTmmr-TTlTT1II-'-TTTI1..-"""''''''
Ys= t15V
160
A" = 100
TA-Z5°C
140
120
10k
Output Swing
SUPPLY VOLTAGE (tV)
1-++-Ift1tttt-+~~: ~O~
lk
100
8
ZO
f--t-+lftttttt-+:~~ :'~~V
10
ZO
~
.....
Ff-TA=125'C
SeHlIngTime
GAIN (VIVI
11111
z
Equivalent Input
Noise Voltage (Includes
Source-Resistance Noise)
III
40
I.
--<-- -- -
lB
SUPPLY VOLTAGE (±VI
III
12&
FREQUENCY (HzI
Supply Current
I-T!PICAL /
1/
iYIII
FREQUENCY (Hzl
/
j
BD
60
lOOk
18
I
100
TA=2SoC
10
16
I.
15
A,,-10
o
0
10M
Input Common-Mode
Range
~
w
5D
~
iii
60
FREQUENCY (Hzl
RS= 50n
RL = lOkn
TA' ZO'C
25
Power Supply Rejection
lZ0
40
10k
0
AMBIENT TEMPERATURE eCI
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1k
-55 -25
A,,-':O
iii
A,= 1
I-'"
10
Common-Mode Rejection
A,,-Z
-10
~
GAIN (VN!
RS-Son
RL -10kn
TA'"ZSoC
A,- 50
/
100
I-
VS· :15V
':'IJ\IC:
40
~
~
;;
100
10
/
lk
1111
150
§ys= .15V
r=VCM-O
...;;:
RL'10kn
~
f--+-+----1--t---"'oI----i
o I-....I....---l._-'---I----'I---'
Small Signal
Frequency Response
~
HS= son
LHO~JJI
TEMPERATURE ('CI
i5
b,
Va· tl0V
0.5
o
"
e-
GUARUJJJ
z
~
Input Bias Current
10k
vs- !15V
/
0
1
10.
100
A" (VNI
TUH/5651-2
6-28
r-
:::I:
AC Test Circuits
o
o
CO
~
......
r:::I:
o
o
CO
~
(")
FIGURE 1. Frequency Response Measurement Circuit
Settling Time
TEK 7904
DR EOUIV
2k
450
FIGURE 2. Settling Time Measurement Circuit
AV = 10 Input Stage
OUT
TLlH/5651-4
QUAN·TECH
2181
FIGURE 3. Noise Measurement Circuit
TL/H/5651-3
Wideband Noise
•
AS =500 Bandwidth 0.1 Hz to 10 Hz
1p.V/Oivision Vertical
5 Seconds/Division Horizontal
6·29
TLlH/5651-5
~
CIO
Applications Information
:r:
THEORY OF OPERATION
The LH0084 is a digitally-programmable-gain true-instrumentation amplifier composed of a variable-gain voltage-follower input stage (A1 and A2), followed by a differential output stage (A3). The schematic is shown in Figure 4.
The input stage contains matched high-speed FET-input op
amps (A 1 and A2). A high-stability temperature-compensated resistor network (R1 through R7) controls feedback ratios at the inverting inputs of op amps A 1 and A2 via FET
switches S1A-S4A and 518-548. Since the FET switches
are in series with the op amp input impedance their resistance match and temperature drift do not degrade the gain
accuracy of the instrumentation amplifier. The FET switches
are controlled through a 1-of-4 decoder and switch driver,
by the logic levels applied at the digital input terminals 01
g
...I
~
CIO
o
o
:r:
...I
and DO and set the gain of the input stage as shown in
Table I.
If, for example, 01 is High (;;'2.0V) and DO is Low (';;0.7V),
FET switch pair S3A and S3B will be closed (and all remaining switches open). The input stage gain, AY(1), can then be
shown to be:
V2-V1
VIN(+)-VIN(-)
AY(1)
=1 + R4+R5+R6+R7
R1+R2+R3
= 1 + 6k+6k+ 10k+ 10k
4k+2k+2k
=5
Schematic Diagram
VI
A4
r
----
I
I
I
I
I
I
I
DIGITAL
INPUT
r
l
OD
RI
10k
Ra
10k
a
7
R4
ak
RID
10k
X4
VOUT
(SENSE)
RIZ
3D.
XI
RZ
Zk
IOF4
DECODER
AND
SWITCH
DRIVER
XID
RI4
aOk
HI
4.
VOUT
(FORCE)
R3
Zk
I
I
I
I
I
I
I
L ____
HII
IDk
RS
8k
13
GI
RI3
3Dk
R7
10k
12
RI
IUk
G4
SIGNAL
GNO
RIS
aOk
11
Gil
vz
~8.f v- ~81
TL/H/5651-6
FIGURE 4
6-30
r-
:J:
Applications Information
0
0
ClO
(Continued)
TABLE I. Gain Truth Table and Connection Table
1st Stage
Gain
Digital Inputs
01
DO
AV(1)
0
0
1
1
0
1
0
1
1
2
5
10
0
0
1
1
0
1
0
1
1
2
5
10
0
0
1
1
0
1
0
1
1
2
5
10
6-10, 13-GND
1
2
5
10
7-10, 12-GND
4
4
8
20
40
10
10
20
50
100
8-10,11-GND
:J:
0
0
ClO
"'0"
The two ground pins, analog and digital grounds, should be
connected together as close to the device as possible, preferably with a ground plane underneath the device. If this is
not pOSSible, the grounds should be connected together locally with back-to-back diodes and hard-wired together offboard. If a ground reference offset is used, it must be low
impedance compared to the ground sense resistance to
avoid CMRR degradation.
Care must be taken in the supply power-on sequence. The
LH0084 may suffer irreversible damage if the V+ supply is
applied prior to the powering on the V- supply. In most
applications using dual tracking supplies and with the device
supply pins adequately bypassed, this will not present a
problem. If this cannot be guaranteed, a germanium or
Schottky protection diode should be connected between
the digital ground pin and the V- pin as shown in Figure 5.
Your
(2)
10K+30K
10k
To preserve the high common-mode rejection ratio of the
output stage, the ground sense resistor, R11, R11 +R13 or
R11 +R13+R15, must match the feedback resistor used.
The overall gain of the LH0084 is therefore:
rrE-
15V
Your
"Hl-
Av = ~~~""'"':"';-:--:
VIN(+)-VIN(-)
=
"'"
.......
r-
POWER SUPPLY CONNECTIONS
Proper power supply connections are shown in Figure 5.
The power supplies should be bypassed to ground as close
as possible to device supply pins. For optimum high speed
performance V+ and V- should be decoupled with a 0.01
ILF ceramic disc in parallel with a 1 ILF electrolytic capacitor.
AV(2) = V2-V1
V2-V1
Your
VIN(+)-VIN(-) ·V2-V1
Overall
Gain
Av
AV(2)
The output stage, consisting of op amp A3 and resistors R8
through R15, converts the voltage difference at the output
of the input stage, V2 minus V1, to a single·ended output.
For increased flexibility of the LH0084, the output stage gain
is pin-strappable by selecting R10, R10+R12, or
Rl0+R12+R14 as feedback resistor for A3. The ratios of
these resistors to the differential stage input resistor R3 are
kept very accurate to maintain the excellent overall gain
accuracy of the device. The output stage gain, AV(2), is
equal to the feedback resistance divided by the input resistance. Thus with, for example, Pin 7 wired to Pin 10, that gain
would be:
R10+R12
R8
2nd Stage
Gain
Pin Connections
(3)
AV(1) • AV(2)
The different gains available are in the range of 1 through
100 and are summarized in Table I.
2
?""
.
"
l
q . .)-----'
.
l"l-
~~
~
-15V
*
"'See text
TL/H/5651-7
FIGURE 5. Power Supply Connections
6-31
•
o
"'co
="
o
o
Applications Information
(Continued)
::I:
SIGNAL CONNECTIONS
.......
The input signals should be connected as shown in Figure
6. To minimize errors, Rs(+), Rs(-) and ReM should be
kept as small as possible.
Recommended offset adjust procedure is as follows: Initially
set both pots to center positions and short both inputs of
the LH0084 to ground.
The output connections are also shown in Figure 6. The
feedback leads should be kept short as should the ground
sense in order to minimize lead resistance and parasitic capacitance.
a) Set the input stage gain to 1 (pull 01 and 00 low). Measure the output voltage, VOUT1.
b) Set the input stage gain to 10 (pull 01 and 00 high).
Measure the new output voltage, VOUT2.
c) Calculate the portion of VOUT2 contributed by the output
stage offset per the equation:
...I
"'="
CO
o
o
::I:
...I
OFFSET AND GAIN ADJUSTMENTS
Special care must be taken when using external offset adjustment. Since the LH0084 is a 2-stage amplifier with each
stage contributing offset errors, and the amplifier presumably is used at several different gains, it is important to realize that the offsets of both the 1st and the 2nd stages must
be nulled to maintain zero offset referred to output (RTD) at
all gain settings.
In general, it is recommended that the input stage offset
(VIOS) be adjusted with a potentiometer as shown in Figure
7. The output stage offset (Voos) is ideally adjusted at a
subsequent gain stage (i.e. sample-and-hold or A-to-O converter), but if this is impractical, it may also be done as
shown in Figure 7.
.
1
.
Voos=g(10. Voun-VOUT2)
d) While maintaining an input stage gain of 10, adjust the
input offset voltage (VIOS) potentiometer until the output
voltage is equal to the voltage calculated in Equation (4).
e) Change the input back to a gain of 1 and adjust the output offset voltage (Voos) potentiometer until the output
voltage is zero.
VOUT
+
VCM;':"
VREF
-=-
~
FIGURE 6. Signal Connections
01
00
(4)
15V
OUTFUT
15V
OFFSET
AOJUST
Zk
-15V
INPUT
OFFSET
AOJUST
-15V
TL/H/5651-B
FIGURE 7. Offset Adjust Circuit
6-32
.-----------------------------------------------------------------------------.,
::J:
Applications Information
o
(Continued)
o
CO
ground. The device interfaces directly to TIL and, with pulldown resistors, to CMOS.
An alternate offset adjust scheme is shown in Figure 8. The
offset should be rezeroed after each time the gain is
changed or when the op amp integrator drift warrants a new
zero pulse. An additional advantage of this adjustment technique is that it can also be used to cancel out offset voltage
drift and common-mode voltage error contributions.
Interfacing with microprocessors will usually require a latch.
A circuit using full 6-bit wide address decode and write
strobe is shown in Figure 9.
REMOTE OUTPUT SENSE
External gain adjustment is generally discouraged since
gain accuracy can be optimized for one gain setting only. If
gain adjustment is required, however, it should be done at a
subsequent gain stage.
The feedback resistors of the LH0084 can be connected
directly at the load in order to eliminate errors due to lead
resistance (Figure 10).
LOGIC CONNECTIONS
The digital inputs D1 and DO are referenced to the digital
112 LF11333
r-fjc-'
N-L..o
. .---9--"'--9"'"'<11
VCM~
L._,
r~.1
I
7
_ _ .1I
VDUT
R
10k
C·
.l
6
D.l~F
I~~~_'rt I
Lt±.i::fJ
""Polystyrene, Teflon or
Polypropylene Dielectric
L3DO~.MIN
I
(DEPENDS ON VALUES OF RAND CI
5V-r-.
DV---l
LZERO PULSE
---.J
I·
FIGURE 8. Auto Zero Circuit
VDUT
~DUT
!IDUT
L--_""':;';;=;';"""_-j'J
GND FORCE
IIOUTIs:s rnA
ADDRESS SELECT
TLlH/5651-9
FIGURE 9. Typical Microprocessor Interface
FIGURE 10. Remote Sense Connection
6-33
,::J:
,j::o,
.......
o
o
CO
,j::o,
o
Applications Information
(Continued)
Also, a unity gain buffer, such as the LH0033, may be included in the feedback loop for increased current drive capability as shown in Figure ".
The output sense feature can also be used in other ways
such as output offset, Figure 12, or current source output,
Figure 13.
.
VCM":"
-~
VOUTAV·VIN+VAEF
IIOUTI,;90 rnA
IVouTI,;10v
FIGURE 11. Buffered Output Connection
FIGURE 12. Output Offset Connection
AV·VIN
IOUT=-ASET
IIOUTI';;5 rnA
IlounRL + RSET) I ,; 1OV
TLIH15651-10
FIGURE 13. Output Current Source Connection
Applications
The LH0084 is ideal for application in increased dynamic
range A-to-D converters, test systems, process control, and
multi-channel data acquisition system. Figure 14 shows the
device used in a typical data acquisition system.
nected to analog ground, and then selecting a channel connected to a reference of known value, the overall system
gain and offset errors can be calculated. For all subsequent
readings, offset and gain corrections can be made mathematically by solving a simple first-order equation in software.
A software offset and gain error correction scheme is shown
in Figure 15. By first selecting a multiplexer input conPREAMP
PROG. GAIN
INST.AMP
MUX
HIGH AND {
MEDIUM
LEVEL
ANALOG
INPUT
SlH
AID
ADC1210
LOW LEVEL {
ANALOG
INPUT
ADDRESS BUS
MICROPROCESSOR
TLIH15651-11
FIGURE 14. Typical Data Acquisition System
6-34
,-----------------------------------------------------------------------------, r
Applications
::I:
o
o
(Continued)
CO
.....
r
~
::I:
o
o
AID
MUX
CO
MICRO·
PRDCESSDR
~
n
y'
TL/H/5651-12
FIGURE 15. Software System Offset and Gain Calibration Circuit
Definition of Terms
Input Offset Voltage, VIOS: The voltage which must be
applied to the inputs to force the output of the input stage to
OV. VIOS can be calculated by measuring Vos (RTO) at input stage gains of 1 and 10 and using the following equation:
Gain Non-Linearity: The deviation of the gain from a
straight line drawn through the end-points expressed as a
percent of full-scale (10V for operation with ± 15V supply).
For testing purposes it is the difference between positive
swing gain (OV to 10V) and average gain (-10V to 10V) or
between negative swing gain (OV to -10V) and average
gain.
VIOS=~( VOSIAV= 10-vosIAV= 1)
Output Stage Offset Voltage, Voos: The voltage which
must be applied to the input of the output stage for the
output to be forced to OV. Voos can be calculated by measuring Vos (RTO) at input stage gains of 1 and 10 and applying the following equation:
where:
VOSIAv=10=Overall offset (RTO) for Av= 10
VOSIAV=1 = Overall offset (RTO) for Av= 1
Voos=~( 10 -VOSIAV=1-VosIAV=10)
Input Offset Current, lOS: The difference in the currents
into the 2 analog input terminals at OV.
Input Bias Current, Is: The average of the currents into the
2 analog input terminals at OV.
where:
VOSIAv=1 = Overall offset (RTO) for Av= 1
Input Resistance, RIN: Common-mode input resistance is
the change in input voltage range divided by the change in
input bias current with both analog inputs at the same voltage. Differential input resistance is the change in input voltage at one input terminal divided by the change in input
current at the other input terminal which is kept still at OV.
Input Voltage Range, VIN: The voltage range for which the
device is operational.
VOSIAv=10=Overall offset (RTO) for Av= 10
Offset Voltage (Referred to Output), VOS(RTO): The output voltage when both inputs are connected to OV. Vos is
composed of input offset voltage. VIOS. and output offset
voltage. Voos. and is a function of amplifier gain. The overall offset voltage is given by:
VOS(RTO)=AV(2)(AV(1) VIOS+Voos)
Common-Mode Rejection Ratio, CMRR: The ratio of the
input common-mode voltage range to the change in input
offset voltage over this range.
Power Supply Rejection Ratio, PSRR: The ratio of the
specified change in supply voltage to the change in input
offset voltage over this range.
Voltage Gain, Av: The ratio of output voltage change to the
input voltage change producing it.
where:
VIOS = Input offset voltage
VOOS = Output stage offset voltage
AV(1) = Input state gain
AV(2) = Output stage gain
Gain Error: The deviation in percent between the ideal voltage gain and the value obtained when the device is configured for that gain.
6-35
u
8"'="
Definition of Terms
(Continued)
C)
:i
~
Output Voltage Swing, Vo: The peak output voltage swing
referenced to ground into specified load.
C)
Output Short-CIrcuit Current, 10: The current supplied by
the device with the output connected directly to ground.
8
:i
Output Resistance, ro: The ratio of change in output voltage to change in output current around zero output.
Supply Voltage Range, Vs: The supply voltage range for
which the device is operational.
Supply Current, Is: The current required from the supply to
operate the device with zero load and with the analog as
well as the digital inputs at OV.
Power Dissipation, Po: The power dissipated in the device
with zero load and with the analog as well as the digital
inputs at OV.
Digital "1" Input Voltage, VIH: Minimum voltage required
at the digital input to guarantee a high logic state.
Digital "0" Input Voltage, VIL: Maximum voltage required
at the digital input to guarantee a low logic state.
Digital "1" Input Current, IIH: The current into a digital
input at specified logic level.
Average Gain Temperature Coefficient, AAvl AT: The ratio of change in gain from 25°C to either temperature extreme divided by the temperature range.
Small Signal Bandwidth, BW: The frequency at which the
device gain changes from the low frequency gain by a specified amount.
Power Bandwidth, PBW: Maximum frequency for which
the output swing is a large signal sinewave without noticeable distortion.
Slew Rate, SR: The internally limited rate of change in output voltage with a large amplitude step function applied at
the input.
Settling Time, ts: The time between the initiation of an input
step function and the time when the output voltage has settled to within a specified error band of the final output voltage.
Gain Switching Time: The time between the initiation of a
gain logic change and the time when the final gain switches
are closed. It includes overdrive recovery time, but not settling to final value.
Digital "0" Input Current, IlL: The current into a digital input at specified logic level.
Equivalent Input Noise Voltage, EN: The rms of peak
noise voltage referred to the input (RTI) over a specified
frequency band.
Average Input Offset Voltage Drift, AVlos/AT: The ratio
of input offset voltage change from 25°C to either temperature extreme divided by the temperature range.
Equivalent Input Noise Current, IN: The rms of peak noise
current referred to the input (RTI) over a specified frequency
band.
Average Output Offset Voltage Drift, AVoosl AT: The ratio of output offset voltage change from 25°C to either temperature extreme divided by the temperature range.
6-36
r-
g
-
~National
N
N
....
~ Semiconductor
r-
g
(0)
....
N
LM221/LM321/LM321A Precision Preamplifiers
r-
g
(0)
General Description
....
N
The LM121 series are precision preamplifiers designed to
operate with general purpose operational amplifiers to drastically decrease dc errors. Drift, bias current, common mode
and supply rejection are more than a factor of 50 better than
standard op amps alone. Further, the added dc gain of the
LM121 decreases the closed loop gain error.
The LM121 series operates with supply voltages from ±3V
to ± 20V and has sufficient supply rejection to operate from
unregulated supplies. The operating current is programmable from 5 /LA to 200 /LA so bias current, offset current, gain
and noise can be optimized for the particular application
while still realizing very low drift. Super-gain transistors are
used for the input stage so input error currents are lower
than conventional amplifiers at the same operating current.
Further, the initial offset voltage is easily nulled to zero.
The extremely low drift of the LM121 will improve accuracy
on almost any precision dc circuit. For example, instrumentation amplifier, strain gauge amplifiers and thermocouple
amplifiers now using chopper amplifiers can be made with
the LM121. The full differential input and high commonmode rejection are another advantage over choppers. For
applications where low bias current is more important than
drift, the operating current can be reduced to low values.
High operating currents can be used for low voltage noise
with low source resistance. The programmable operating
current of the LM121 allows tailoring the input characteristics to match those of specialized op amps.
»
The LM221 is specified over a - 25'C to + 85'C range and
the LM321 over a O'C to + 70'C temperature range.
Features
II
II
II
II
II
II
II
Guaranteed drift of LM321A-0.2 /LVI'C
Guaranteed drift of LM221 series-1 /LVI'C
Offset voltage less than 0.4 mV
Bias current less than 10 nA at 10 /LA operating current
CMRR 126 dB minimum
120 dB supply rejection
Easily nulled offset voltage
Typical Applications
Thermocouple Amplifier with Cold Junction Compensation
+15V
RS
R5
365k
996k
~:>·'-~~~~------------------JV~~----5-D-P-F--------~
LMI13
RIO
4.99k
1%
+15V
7
OUTPUT
>;..e....I--(IDmVt'C)
LM321A
CHROMEL·
ALUMEL
RI
5Dk
R3*
10k
L..--_.....
-15V
'Set for 2.98V at output with LMl13
shorted. Output should equal ambient temperature at 10 mVI'K.
tAdjust for output reading in ·C.
6-37
TL/H/7769-1
•
Absolute Maximum Ratings
±20V
Supply Voltage
Power Dissipation (Note 1)
Differential Input Voltage (Notes 2 and 3)
Operating Temperature Range
LM321A
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
500mW
±15V
±15V
Input Voltage (Note 3)
O'Cto +70'C
-65'C to + 150'C
300'C
ESD rating to be determined.
Electrical Characteristics (Note 4) LM321A
LM321A
Conditions
Parameter
Min
Units
Typ
Max
Input Offset Voltage
TA = 25'C, 6.4k ,,; RSET ,,; 70k
0.2
0.4
mV
Input Offset Current
TA = 25'C,
RSET = 70k
RSET = 6.4k
0.3
0.5
5
nA
nA
5
50
15
150
nA
nA
Input Bias Current
Input Resistance
TA = 25'C,
RSET = 70k
RSET = 6.4k
TA = 25'C,
RSET = 70k
RSET = 6.4k
=
2
0.2
=
2.2
mA
0.5
0.65
mV
70k
6.4k
15
150
25
250
nA
nA
70k
6.4k
0.5
5
1
10
nA
nA
70k
3
TA
Input Offset Voltage
6.4k ,,; RSET ,,; 70k
RSET
RSET
Input Offset Current
RSET
RSET
25'C, RSET
=
=
=
=
=
70k
Input Offset Current Drift
RSET
Average Temperature
Rs ,,; 2000, 6.4k ,,; RSET ,,; 70k
Coefficient of Input Offset
Voltage
Offset Voltage Nulled
0.07
Long Term Stability
3
Supply Current
1
Input Voltage Range
Vs = ±15V,(Note5)
RSET = 70k
RSET = 6.4k
=
=
=
=
MO
MO
0.8
Supply Current
Input Bias Current
8
±13
+7, -13
pAI'C
0.2
p..VI'C
p..V/yr
3.5
mA
V
V
70k
6.4k
126
120
140
130
dB
dB
70k
6.4k
118
114
126
120
dB
dB
12
20
VIV
Common-Mode Rejection
Ratio
RSET
RSET
Supply Voltage Rejection
Ratio
RSET
RSET
Voltage Gain
TA = 25'C, RSET
RL> 3MO
=
70k,
Noise
8
nV/Fz
RSET = 70k, RSOURCE = 0
Note I: The maximum junction temperaltJre of the LM321 A is B5'C. For operating at elevated temperature. devices in the HOB package must be deraled based on
a thermal resistance of 1500C/W, junction to ambient, or 18°C/W, junction to case.
Note 2: The inputs are shunted with back·to-back diodes in series with a
soon resistor for overvoltage protection. Therefore, excessive current will flow if a
differential input voltage in excess of 1V is applied between the inputs.
Note 3: For supply voltages less than ± 15V, the absolute maximum input voltage is equal to the supply voltage.
Note 4: These specifications apply for ±5 ,;; Vs ,;; ±20Vand -55'C ,;; TA ,;; + 125'C. unless otherwise specified. With the LM221A, however all temperature
specifications are limited to - 25'C ,;; TA ,;; + B5'C, and for the LM321 A the specifications apply over a O'C to + 70'C temperaltJre range.
Note 5: External precision resistor -0.1 %- can be placed from pins 1 and 8 to 7 increase positive common-mode range.
6-38
r-
s::
Absolute Maximum Ratings
I\)
I\)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating Temperature Range
LM221
LM321 , LM321 A
Supply Voltage
Power Dissipation (Note 1)
Differential Input Voltage (Notes 2 and 3)
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
ESD rating to be determined.
±20V
500mW
±15V
Input Voltage (Note 3)
- 25'C to + 85'C
O'Cto +70'C
-65'C to + 150'C
260'C
LM321
LM221
Conditions
Typ
Max
Min
Typ
TA = 25'C, 6.4k ,;; RSET ,;; 70k
0.7
1.5
mV
TA = 25'C,
RSET = 70k
RSET = 6.4k
1
10
2
20
nA
nA
TA = 25'C,
RSET = 70k
RSET = 6.4k
10
100
18
180
nA
nA
TA = 25'C,
RSET = 70k
RSET = 6.4k
TA = 25'C, RSET
1.5
2.2
mA
6.4k ,;; RSET ,;; 70k
2.5
mV
=
=
RSET =
RSET =
RSET =
70k
6.4k
30
300
28
280
nA
nA
70k
6.4k
3
30
4
40
nA
nA
RSET
RSET
Input Offset Current Drift
Average Temperature
Coefficient of Input
Offset Voltage
70k
1
Long Term Stability
Common-Mode Rejection
Ratio
Supply Voltage Rejection
Ratio
Voltage Gain
3
3
70k
Rs ,;; 200n, 6.4k ,;; RSET ,;; 70k
Offset Voltage Nulled
= 70k
= 6.4k
RSET = 70k
RSET = 6.4k
TA = 25'C, RSET =
/LvrC
!,-V/yr
5
3.5
2.5
Vs = ± 15V, (Note 5)
RSET = 70k
RSET = 6.4k
pAl'C
1
5
Supply Current
Input Voltage Range
Mn
Mn
2
0.2
1.0
Input Bias Current
Input Offset Current
4
0.4
=
s::
Units
Input Offset Current
Input Offset Voltage
r-
Max
Input Offset Voltage
Supply Current
.....
......
»
Min
Input Resistance
s::
Co)
I\)
.....
Electrical Characteristics (Note 4) LM221 , LM321
Input Bias Current
r-
Co)
I\)
±15V
Parameter
.....
......
mA
±13
+7, -13
±13
+7, -13
V
V
120
114
114
114
dB
dB
120
114
114
114
dB
dB
16
12
V/V
RSET
RSET
70k,
RL> 3Mn
nV/v'Hz
8
8
RSET = 70k, RSOURCE = 0
Note 1: The maximum junction temperature of the LM221 is 100'C. The maximum junction temperature of the LM321 is B5°C. For operating at elevated
temperature, devices in the HOB package must be derated based on a thermal resistance of 150°C/W,lunction to ambient, or lBoC/W, junction to case.
Noise
Note 2: The inputs are shunted with back-ta-back diodes in series with a 500n resistor for Qvervoltage protection. Therefore, excessive current will flow If a
differential input voltage in excess of 1V is applied between the inputs.
For supply voltages less than ±15V, the absolute maximum input voltage is equal to the supply voltage.
These specifications apply for ±5 ,;; Vs ,;; ±20Vand -55°C,;; TA ,;; + 125°C, unless otherwise specified. With the LM221, however all temperature
specifications are limited to - 25°C';; TA ,;; + B5°C, and for the LM321 the specifications apply over a O'C to + 70'C temperature range.
Note 3:
Note 4:
Note 5: External precision resistor -0.1 %- can be placed from pins 1 and 8 to 7 increase positive common-mode range.
6-39
•
...
>
~
;::
80 ~-1----1c--1-""'---j
i
~
~
-0.1
.40
.10
.00
~ "i
~ ~SET=641cn
ASET =70kO
80
.00k
Input Noise Voltage
~.<:
3D
.....
.0 t-...
~
co
>
~.......
I
"sET" 70 to
RSET :6.4110'=
1
100
Ik
I
.0
lOOk
.Ok
..
.00
lOOk
10k
FREQUENCY 1Hz)
FREQUENCY 1Hz)
Input Noise Current
=
ill
I
10
0.1
IDO
:s
f"': ~
60
0
VOLTAGE DRIFT ,"vrcl
40
IDk
Differential Voltage Gain
Voltage Drift
ID
·5
~
"-
~
./
--
Rs£T=S.4~~
i"-..
'.1
=RsET ;70110
15
-0.2
Vs =t15V
TA "ZS-C
FREQUENCY IHfI
i
0.4
~
.
.0.
0.2
Negative Power Supply
Rejection
Positive Power Supply
Rejection
i
-0.2
VOLTAGE DRIFT l/.IvrCI
TEMPERATURE (°&1
"
.
• .111
ID
IDO
IDk
Vs =:t15V
./
V
lOOk
01
FREQUENCY 1Hz)
.
~
0.8
.0
1.0
1.0
0.8
-I
I..
.
0.&
....
....
........
~
~
~
co
co
;.
i-""
..8
0.4
0.1
-55
-4
-6
--
",,,-ID"".1 1
"sET" 6.4lQ
-8
1
-.0
.IREFk~Rlo T~SUPPLVVDlTAGES
r-- t-....
r-.
-.1
ASET·7DkO
RsET" 6.4 110
v-
-"TEMPERATURE (OCI
15
50.00 10D
Common-Mode Limits
v'
1.6
&:I
10
SET CURRENTISIDE (,..AI
Set Current
;:
N
SET CURRENTIS.DE ,"AI
0.6
1.8
I :~
100
D.4
OFFSET VOLTAGE (mY I
Set Resistor and Set Current
10
/'
/'
65
105
-55
-15
25
65
10.
TEMPERATURE I CI
TL/H/7769-9
6-40
r-
Typical Performance Characteristics
s:
...
I\)
I\)
(Continued)
.......
Differential Voltage Gain
v' Output Common-Mode Voltage
-1
lUll!
r".
-2
-J
-,
-,
-10
-9
10
20
50
SET CURRENTISIDE
1.'
oS
i
Vs"±,!)V
Rsu '" SAkn
1.0
,.
I:
0.'
ii!
0.4
~
......
-
02
-55
J.Z
,..
5
10
Z5
1--1--
~
50
100
.......
r-
1.2
ZOO
0.4
/
./
1.0
V .....
0.9
L
V
1.4
1.6
160
'"
140
o
~
i
g
RZ
V-
1.2
105
rc)
iii
~ 120
AI
I.B
_15
25
65
105
Common-Mode Rejection
Ratio
~
/
...»
c,.)
I\)
TEMPERATURE ( &1
v'
/
s:
/
1.1
D••
-55
V
1.2
D••
65
"
V
Z.O
I
TEMPERATURE
~
Offset Voltage Adjustment
TA"zrc
1~
j""Okn
20
Z.4
..... .....
I
-15
,
I III
REfERREii~o I I I I
POSITIVE SUPPLY
I II
c,.)
I\)
'''300Hl
I.J
SET CURRENT/SIDE I.uAI
I
I
1.2
0.'
200
1i
TA =+125·C
(~A)
Supply Current
1.4
'"
100
I"
Il
III
-I
-.
~
c
in"'i
III
-4
~
-55·C
"
2.0
Vs "":1:15V
TA "25"C
~ :::,....
"
100
60
B
40
~ET=6.4kn
RSET=10kn~
80
~iii
~
~
10
RSET RATIO R2/Rl
100
1k
10k
lOOk
FREOUENCY 1Hz)
TL/H/7769-10
Connection Diagram
Metal Can Package
OUTPUT 1
vTL/H/7769-7
Top View
Note: Pin 4 connected to case.
Order Number LM221H, LM321H or LM321AH
See NS Package Number HOSC
Noto: outputs are inverting from the input of the same number.
6-41
r-
s:
...
Vs "s15V
111111
TA
1.'
LM221/LM321/LM321A
•
•
v+-~===r~===:==
R4
50k
R3
50k
OUTPUT 1
en
n
:::r
(II
3
R5
50k
I»
( i'
•
c
OUTPUT
iii'
•
CC
iil
3
R16
lk
0>1
INPUT
2
Rl
500
J,..
I\)
R2
500
INPUT
.!.ivv
t
~
J
R13
150k
013
RseT
6
~11
"I
RR
01
6.2V
RSET
R14
400
v-
4
TLlH/7769-8
ri:
Frequency Compensation
N
N
UNIVERSAL COMPENSATION
The additional gain of the LM321 preamplifier when used
with an operational amplifier usually necessitates additional
frequency compensation. When the closed loop gain of the
op amp with the LM321 is less than the gain of the LM321
alone, more compensation is needed. The worst case situation is when there is 100% feedback-such as a voltage
follower or integrator-and the Qain of the LM321 is high.
When high closed loop gains are used-for example Ay =
1000-and only an addition gain of 200 is inserted by the
LM321 , the frequency compensation of the op amp will usually suffice.
The frequency compensation shown here is designed to operate with any unity-gain stable op amp. Figure 1 shows the
basic configuration of frequency stabilizing network. In operation the output of the LM321 is rendered single ended by a
0.01 IJoF bypass capacitor to ground. Overall frequency compensation then is achieved by an integrating capacitor
around the op amp.
......
.....
r-
TABLE I
w
PI)
Closed
Loop
Gain
Ay= 1
Ay = 5
Ay = 10
Ay = 50
Ay = 100
Ay = 500
Ay = 1000
120k!}
60k!}
30k!}
12k!}
6k!}
68
15
10
1
-
130
27
15
3
1
-
-
270
56
27
5
3
1
680
130
68
15
5
1
1300
270
130
27
10
3
-
-
-
DESIGN EQUATIONS FOR THE LM321 SERIES
GainAy::::: 1.2RX 106
SEl
Null Pot Value should be 10% of RSET
2 X 0.65V
Operating Current:::::
R
for 0.5 MHz bandwidth C = -s-4_10 RSEl
For use with higher frequency op amps such as the LMl18
the bandwidth may be increased to about 2 MHz.
If the closed loop gain is greater than unity, "c" may be
decreased to:
SET
.
[0.65V X 50k]
Positive Common-Mode Limit::::: V+ - 0.6 RSEl
4
10SACLRSEl
ALTERNATE COMPENSATION
The two compensation capacitors can be made equal for
improved power supply rejection. In this case the formula for
the compensation capscitor is:
C=
8
10S ACLRSET
Typical Applications
Rs
INPUT--~~~~-2~----~~----l!---'--~
..r-----..~OUTPUT
1%
Cl
30 pF
'Offset adjust.
tSee table for frequency compensation.
~----~--------~--y-
FIGURE 1. Low Drift Op Amp Using the LM321A as a Preamp
6-43
i:
......
.....
r-
Current Set Resistor
This table applies for the LM108, LM101A, LM741, LMl18.
Capacitance is in pF.
12
C
Bandwidth at unity-gain'" - R
21T SET
C=
Table I shows typical values for the two compensating capacitors for various gains and operating currents.
TL/H/7769-2
i:
w
PI)
......
»
....or:(
('II
C')
Typical Applications (Continued)
:i
Gain of 1000 Instrumentation Amplifier:!:
...I
.....
....
R6
('II
C')
3M
0.1%
:i
...I
.....
....
('II
('II
:i
...I
INPUT
OUTPUT
LM321A
Rl
SDk
1%
R2
SDk
1%
R3
10k
Cl
'::"
*Beller than 1 % linearity for input sIgnals up to ± 10 mV gain stability typical +2% from -55 to + 125·C.
30 pF
Match of R5 and RS effect power
supply rejection
vTL/H/7769-3
High Speed' Inverting Amplifier with Low Drift
LM103-1.B
r--------I~------_t~--y+
250pF
2.2k
3pF
INPUT ---4........,
>"'"----4_ OUTPUT
LM321A
4
5
12k
12k
lk
'Bandwidth
~
10 MHz
Slew Rate
~
40 VI p.s
TUH17769-4
Medium Speed' General Purpose Amplifier
y'
y'
'-'=----~- OUTPUT
'Bandwidth
~
3.5 MHz
Slew Rate
~
1.1 VII'S
TUH/7769-5
6-44
r-
s::
Typical Applications (Continued)
N
N
....
.......
r-
Increased Common-Mode Range at High Operating Currents
v+
v+
s::
(0)
....
.......
N
r-
s::
25k*
25k'
(0)
....)0
N
L~
7
INPUTS
r~
1
LM321A
J
8
+6
:
~
5
6k
4
T
lk
1
'~
+
-'-C t
6k
~cct
7
6
T
OUTPUT
4
v-
C
"'Match to 0.1%
tDapends on close loop gain
V-
TLlH17769-6
6-45
~National
~ Semiconductor
LM363 Precision Instrumentation Amplifier
General Description
The LM363 is a monolithic true instrumentation amplifier. It
requires no external parts for fixed gains of 10, 100 and
1000. High precision is attained by on-chip trimming of offset voltage and gain. A super-beta bipolar input stage gives
very low input bias current and voltage noise, extremely low
offset voltage drift, and high common-mode rejection ratio.
A new two-stage amplifier design yields an open loop gain
of 10,000,000 and a gain bandwidth product of 30 MHz, yet
remains stable for all closed loop gains. The LM363 operates with supply voltages from ± 5V to ± laV with only 1.5
mA current drain.
The LM363's low voltage noise, low offset voltage and offset voltage drift make it ideal for amplifying low-level, lowimpedance transducers. At the same time, its low bias current and high input impedance (both common-mode and
differential) provide excellent performance at high impedance levels. These features, along with its ultra-high common-mode rejection, allow the LM363 to be used in the
most demanding instrumentation amplifier applications, replacing expensive hybrid, module or multi-chip designs. Because the LM363 is internally trimmed, precision external
resistors and their associated errors are eliminated.
eliminate bandwidth loss due to cable capacitance. Compensation pins allow overcompensation to reduce bandwidth and output noise, or to provide greater stability with
capacitive loads. Separate output force, sense and reference pins permit gains between 10 and 10,000 to be programmed using external resistors.
On the a-pin HOa package, gain is internally set at 10, 100
or 500 but may be increased with external resistors. The
shield driver and offset adjust pins are omitted on the a-pin
versions.
The LM363 is rated for O'C to 70'C.
Features
•
•
•
•
•
•
•
•
Offset and gain pretrimmed
12 nVI,JHz input noise (G=500/1000)
130 dB CMRR typical (G=500/1000)
2 nA bias current typical
No external parts required
Dual shield drivers
Can be used as a high performance op amp
Low supply current (1.5 mA typ)
The 16-pin dual-in-line package provides pin-strappable
gains of 10, 100 or 1000. Its twin differential shield drivers
Typical Connections
l6-Pln Package
S-Pin Package
G=10 2,3,4,open
G = 100 3-4 shorted
G -1 000 2-4 shorted
v.
VOUl
OUTPUT
TlfH/5609-33
TlfH/5609-1
Connection Diagrams
Metal Can Package
COMP
l6-Pin Dual-In-Line Package
COMP I
COMP 2
SENSE OUTPUT
REF
V-
+ INPUT +SHIELD
V..
Go. 1000
G-'00
Vos
Vos
-INPUT
vTOP VIEW
Order Number LM363H-l0,
LM363H-l00 or LM363H-500
See NS Package Number HOSC
OR
TOPVlfW
Order Number 3630
See NS Package Number D16C
6-46
-SHiElD
TlfH/5609-2
Absolute Maximum Ratings (Note 5)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
±18V
Differential Input Voltage
±10V
Input Current
±20mA
Input Voltage
Reference and Sense Voltage
Lead Temp. (Soldering, 10 sec.)
ESD rating to be determined.
Equal to Supply Voltage
±25V
300'C
LM363 Electrical Characteristics (Notes 1 and 2)
LM363
Parameter
Conditions
Typ
Tested
Limit
(Note 3)
Design
Limit
(Note 4)
100
200
2.0
300
600
5
/LV
/LV
mV
4
8
75
/Lvrc
/LVrC
/LVrC
Units
FIXED GAIN (S-PIN)
input Offset Voltage
G=500
G=100
G=10
30
50
0.5
Input Offset Voltage Drift
G=500
G=100
G=10
1
2
20
Gain Error
(± 10V Swing, 2 k!1 Load)
G=500
G=100
G=10
0.1
0.05
0.05
0.5
0.5
0.5
0.8
0.7
0.6
%
%
%
Input Offset Voltage
G=1000
G=100
G=10
50
100
1
200
400
3
400
800
7
/LV
/LV
mV
Input Offset Voltage Drift
G=1000
G=100
G=10
1
2
10
5
10
100
/Lvrc
/LVI'C
/LVrC
Gain Error
(± 10V Swing, 2 k!1 Load)
G=1000
G=100
G=10
2.0
0.1
0.6
3.0
0.7
1.7
%
%
%
Gain Temperature Coefficient
G=1000
G=500
G= 100,10
40
20
10
Gain Non-Linearity
(± 10V Swing, 2 k!1 Load)
G= 10,100
G=500, 1000
PROGRAMMABLE GAIN (16-PIN)
2.5
0.5
1.5
FIXED GAIN AND PROGRAMMABLE
0.01
0.Q1
ppmrC
ppml"C
ppmrC
0.03
0.05
0.04
0.06
%
%
•
6-47
LM363 Electrical Characteristics (Continued) (Notes 1 and 2)
LM363
Parameter
Conditions
Typ
Tested
Limit
(Note 3)
Design
Limit
(Note 4)
Units
Common-Mode Rejection
Ratio (-11V,;;VCM';;13V)
G=1000, 500
G=100
G=10
130
120
105
114
94
90
104
84
80
dB
dB
dB
Positive Supply Rejection
Ratio (5V to 15V)
G=1000,500
G=100
G=10
130
120
100
110
100
85
100
95
78
dB
dB
dB
Negative Supply Rejection
Ratio (-5V to -15V)
G=1000,500
G=100
G=10
120
106
86
100
85
70
90
75
60
dB
dB
dB
Input Bias Current
2
10
20
nA
Input Offset Current
1
3
5
100
8
Common-Mode Input
Resistance
Differential Mode Input
Resistance
G=1000,500
G=100
G=10
Input Offset Current Change
-11V,;;VCM,;;13V
Reference and Sense
Resistance
0.2
2
20
20
GO
GO
GO
100
300
paiV
30
80
27
83
kO
kO
kO
50
Min
Max
Open Loop Gain
GCl = 1000, 500
10
1
Supply Current
Positive
1.2
2.4
V/p.V
3.0
2.8
Negative
v+ =V- = 15V.
Note 1: These conditions apply unless otherwise noted;
Ti=25'C.
1.6
nA
GO
2.8
3.4
mA
mA
mA
VCM=OV, RL =2 kn, reference pin grounded, sense pin connected to oulput and
Note 2: Boldface limits are guaranteed over full temperature range. Operating ambient temperalure range is O'C to 70'C for the LM363.
Note 3: Guaranteed and 100% production lesled.
Note 4: Guaranteed but not 100% tested. These limits are not used in determining outgoing quality levels.
Note 5: Maximum raled junction temperature is 100'C for the LM363. Thermal resistance, junction 10 ambient, is 150'C/W for the TO-99(H) package and 100'C/W
for the ceramic DIP (D).
6-48
Typical Performance Characteristics TA =
25'C
Fixed Gain and Programmable
Parameter
1000/500
Units
100
10
Input Voltage Noise, rms, 1 kHz
12
18
90
Input Voltage Noise (Note 6)
0.4
1.5
10
nV/YHz
/LVp-p
Input Current Noise, rms, 1 kHz
0.2
0.2
0.2
pA/yHz
Input Current Noise (Note 6)
40
40
40
pAp-p
Bandwidth
30
100
200
kHz
Slew Rate
1
0.36
0.24
V//LS
Settling Time, 0.1 % of 10V
70
25
20
/LS
Offset Voltage Warm-Up Drift (Note 7)
5
15
50
/LV
Offset Voltage Stability (Note 8)
5
10
100
/LV
0.Q1
0.005
0.05
%
Gain Stability (Note 8)
Nole 6: Measured for 100 seconds in a 0.01 Hz 10 10Hz bandwidth.
Nole 7: Measured for 5 minutes in still air, V+ = V- = -t5V. Warm·up drift is proportionally reduced allower supply voltages.
Common-Mode Input
Voltage Limit
~-O.B
a! -1.0
!:l
~
....
.!!!.~I::= ~5J TO 1±I~V - ~
-
1-1-- I-
-1.2
~
:!;
g
'Z"
co
'"
8'"
~ Vs= ±15V -- r-
3.0
2.5
2.0
Vs
1.5
Supply Current vs Supply
.
I I
1A=25'C
1.700
...E1.400
:::0
1.30D
1.200
\·±15V
1.100
-~-~-~5
~
~
~
~W51~
Output Swing Referred to
Supplies
+
>
..
IL=O
~-1.0
§.
~
6-1.5
>
....
~ 1.5
0.5
I
>
-
IL;-5 !"A 1IL=1 rnA
--
r-r-
IL~5~A
I- - , 1=
IL-l rnA
IL-O
0
-55-35-155 25 45 65 85105125
TEMPERATURE ('C)
4
0
~
-4
.
...i
POSITIVE SUPPLY
:!;
r-r
10
15
SUPPLY VOLJAGE (± V)
.
I!::
:::0
- r-
1.6
1.2
....
-6
-8
-55-35-15 5 25 45 65 85 105125
TEMPERATURE ('C)
20
Input Offset Current vs
Temperature
3
NE~AT!VE !upJLYc;. P'~
....
/'r'
:::0
~
.....
~ -2
Vs= ±15V
2.0
r--.
2
...
:::0
2.4
Vs=±5VIo ±15V
1.0
v:
....
~
0:
..... V
Supply Current vs
Temperature
0
-0.5
g
;'
5
TEMPERATURE ('C)
~
NEGATIVE SUP~
;'1.600
z
~ 1.500
~
+10V
Input Bias Current vs
8 Temperature
Vs= ±15V
6
1.800 Voltage
/
;;;; ~
.,"
~
'SITI~E ~UP~LY
J..o'"
--
0.8
-55-35-155 25456585105125
TEMPERATURE ('C)
....~
I...
Vs= ±15V
2
1
:::0
to;
~....
~
:!;
0
r-
-
-1
--
-2
-3
-55-35-155 2545 65
TEMPERATURE ('C)
851051~
TUH/5609-3
6-49
~
CD
:i
....
r-----------------------------------------------------------------------------,
Typical Performance Characteristics
Output Current Umit
50
1
iii
'"'"
=
u
....
20
'"
10
!;=
Input Noise Voltage
Input Current Noise
0.35
Js=~,JV
1000."
~
40
3D
(Continued)
!
~ ~ r0-
iii 0.25
.....
-
~100.111
~
[:E
;: 0.20
!:j
u
....
~
E
i!5
i!5
100
Input Current vs Voltage
Overdrive
I
~
i!5
J)
-1
-2
'il
G=10
G=1 JQ...oo'
V
-3
I
:::l
~
Gt'--
:--
Z
-4
-15 -10 -5
10
INPUT VOLTAGE (V)
/
!i
o ./
~
Ii!
G=I000/
~
~ 100
z
/G=10
;
BO
'"
60
!:;
0.1
II: 40
iil
20
0.01
100
/
10k
lk
o
lOOk
10
Negative Power Supply
Rejection
140
B-PlN PACKAGE
130 Rs BALANCED
1=1
kHz, Va= ±15V
120
=25'C
z 110
'" 100
6=500
~
6=100
ill 90
'"
E BO
so
50
1
1111
100
10
lk
SOURCE RESISTANCE (II)
i"-
BD
1=*:j:I:jj::j:::t:l1~~~b-I-jfjj
iil
50
rt~H-r+~~~~~ti
~,
..
lOOk
B·PlN PACKAGE
40 Rs BALANCED H+--H-+H-+-HfI
Rs=lk
20 Vs= ±15V
o T.=25'C
10
100
lk
10k
lOOk
FREQUENCY (Hz)
~;;'0
80
~120
z 110
~
!;l 100
iil 90
!:; BO
II:
70
60
50
....
60
..=
Iii-PIN PACKAGE
Rs BALANCED
Rs=lk
20 Vs= ±15V
T.=25'C
o
10
100
lk
10k
FREQUENCY (Hz)
Negative Power Supply
Rejection
140
130
E
~ 40
10k
~
!:;
100
lk
10k
FREDUENCY (Hz)
G-l00
i!5
§
iil
?iI'~
III I
iil 70
z
G~\OOO
IIJN,..
120
iii
~ 100
...
120 I+~I+...!~:
a 100 1=t:~~~~~WI-++I~
Negative Power Supply
Rejection
140
!
140 """T'TTr-r-rnrr-r"TTTT"1r-T'1m
~
B-PlN'ANO
Iii-PIN PACKAGES
liz BALANCED
Rs=O 10 10k
Vs=±15V
T.=25'C
lOOk
Negative Power Supply
Rejection
III
G-l0~
lk
10k
FREQUENCY (Hz)
*Trimmed 10 zero at 100 Hz
~=1~00/1000
iii
'j
.i'
1111
UG-l0
111/0
111/01
0.01
100
Positive Power Supply
Rejection
120
;§'
ffi
0,1
co
u
/IJI
/1/ I
I"G=I00.!,(
G-500
'"
au
'"
z
OUTPUT VOLTAGE SWING (± V)
/
I
1A=2rf"
'"
'"
/
140
B·PlN PACKAGE
Vs +15V
T.=25'C
ill I
C
10k
Gain Error vs Frequency'
~
o
15
Gain Error vs Frequency'
Iii-PIN PACKAGE
Vs- +15V
/
/
0.002
~
/G=500J
10
10
~ 0.004
100
lk
FREQUENCY (Hz)
10
lOOk
T.=25'C
Vs=±15V
!Jl...
G=I00/
G=10
0.006
~
I
lk
10k
FREQUENCY (Hz)
Gain Non-Linearity
~
/G=500
II
G=1000
c
....
0.10
0.05
-55-35-155 25 45 65 B5105125
TEMPERATURE ('C)
'"'"
=
u
I'...
§ 0.15
o
S....
iii
\
6
;:!;
NEGATIVE
~
'li
:II
E
F ~ r-
1A=25'C
~ 0.30
lOOk
1111 I
~1I\oJo
16·PIN PACKAGE
Rs BALANCED
1=1 kHz
Vs= ±15V
G':.,0 O~~
T.-2~:,C
I "II
1
1,"'0
10
100
lk
SOURCE RESISTANCE (II)
10k
TLlH/5609-4
6-50
Typical Performance Characteristics
(Continued)
CMRR with Balanced
CMRR with Balanced
Source Resistance
Source Resistance
CMRR with Balanced
1IIJ"T"Tnr-T--rn1
~ 160 1"T"'1-m-T-r'TTr
0;
;; 140 H--t+tt-H-tlt--t--tttH-+l+t
;; 140
~
~:;::t1I"<1~R<:S~-::;.0-l-l-H--+-l-+H
120
r-.
~
~ 100 N;:+tlN~~I1s,:,,,,""1.t"N;Itt+-t+tl
z
~
g
..
iii
I
100
lk
10k
FREQUENCY 1Hz)
~~
80
60
40
~~l~~C
10
:s
Fr:rrinr;::;:n:::.;::;;.:,:;;;:....,.,......,
160
H-++IHr+H+-
., 140
~
z
100
i:l
80
~~~~W~oH""~,,*-hf+H
g
60 rr~~rP~ ~~~dH
..
40
~
20 H-++IHr+H+--h~~~
iii
8
0;
CMRR with Balanced
160 Source Resistance
:s
.,
140
~
:z
120
w
co
co
q=,l
....
~
40
~I~~
20
11111 I
co
co
100
120
~
100
irlUl
80
60
~
40
..
20
8
0
co
..
ir°b
.....
100
.....
.,~
.,~
60 8-PIN PACKAGE ~
40 Rs UN8ALANCED
Ys= ±15Y
20 TA=25'C
0 G=loo
~
~
11s~
~
..... ~~
~
•
~..
RTtiil-~
10
100
lk
10k
FREQUENCY 1Hz)
~ 160
8
Source Resistance
:c
0:
is
W
60
II r-.
-'!.::"Iii~ liOk, 1'- ...
40
20
10
100
lk
10k
FREQUENCY 1Hz)
16-PIN PACKAGE
Rs UNBALANCED
Ys=±15Y
TA=25'C
G=10
..... 0,;As,;10k
NJ!N...I
UIIJ:o:I,:
Nrrl~Okl
III II
10
0:
120
iisrl
100
:c
n-"-"-I""Tm-===="
f+-+tlhl-+HI-
r-. r-. ~
r-. Lr~
100
BO
8-PIN PACKAJ/
Rs UNBALANCED
Ys= ±15Y
TA=25'C
G=5oo
60
40
20
0
60 f+-+tH-lf-1'~ ft-J;&'~~
~
20 f+-+tH-lI-+Hl-1-H+I-+~H
H-++IHf-
lOOk
11111
lOOk
120
L
i"- 0~1~:'8_",
.1
+
~((r
'" 4
v-lOOk
I"
49.90
+-OUTPUT
10k
9.09k
2000
ISENSE
REF
>Ot-"VI~ 1
-::
49.90 -
...
15k,l%
v+
_ _,
OPTIONAL
vos AOJ
0:-
TUHf5609-13
FIGURE 5_ Adjusting Gain (S-Pin Package)
6-56
Application Hints (Continued)
Heavy Miller overcompensation on the 16-pin package can
degrade AC PSRR. A large capacitor between pins 15 and
16 couples transients on the positive supply to the output
buffer. Since the amplifier bandwidth is severely rolled off it
cannot keep the output at the correct state at moderate
frequencies. Hence, for good PSRR, either keep the Miller
capacitance under 1000 pF or use the pin 15-to-ground
compensation.
COMPENSATION AND OUTPUT CLAMPING
The LM363 is internally compensated for unity feedback
from output to sense. Increasing gain with external dividers
will decrease the bandwidth and increase stability margin.
Without external compensation, the amplifier can stably
drive capacitive loads up to 400 pF. When used as an op
amp (sense and reference pins grounded, feedback to inverting input), the LM363 is stable for gains of 100 or more.
For greater stability, the device may be over-compensated
as in Figure 6. Tables I and II depict suggested compensation components along with the resulting changes in large
and small signal bandwidth for the B-pin and 16-pin packages, respectively.
Note that the RC network from pin B of the B-pin device to
ground has a large effect on power bandwidth, especially at
low gains. The Miller capacitance utilized for the 16-pin device permits higher slew rate and larger load capacitance
for the same bandwidth, and is preferred when bandwidth
must be greatly reduced (e.g., to reduce output noise).
a_ 8-Pin Package
b. 16-Pin Package
TLIH/5609-14
FIGURE 6. Overcompensation
TABLE 1_ Overcompensation on 8-Pin Package
Compensation Network
(Pin 8 to Ground)t
Gain
Small Signal
3dB
Bandwidth
(kHz)
Power
Bandwidth
(± 10V Swing)
(Hz)
Maximum
Capacitive
Load
(pF)
125
95
45
10
1
240
170
BO
20
2
100k
15k
1.Bk
200
20
400
600
BOO
1000'
1000'
100k
15k
1.Bk
200
20
400
900
1200
1600'
2000'
240
170
90
20
2
100k
15k
1.Bk
200
20
400
900
1200
1600'
2000'
100pF,15k
1000 pF, 5k
0.01 ".F,5000.
0.1 uF
500
-
100 pF, 15k
1000 pF, 5k
0.01 ".F,5000.
0.1 uF
100
100 pF, 15k
1000 pF, 5k
0.01 ".F,5000.
0.1 uF
10
'Also stable for CL :> O.051'F tPin 15 to ground on 16-pin package
TABLE 11_ Overcompensation on 16-Pin Package
Gain
1000
100
10
Compensation
Capacitor
(Pin 15 to 16)
0
10 pF
100 pF
1000 pF
0.01 /LF
0
10pF
100 pF
1000 pF
0.01 /LF
0
10 pF
100 pF
1000 pF
0.01 /LF
Small Signal
3dB
Bandwidth
(Hz)
Power
Bandwidth
(± 10V Swing)
(Hz)
Maximum
Capacitive
Load
(pF)
45k
16k
2.5k
250
25
45k
16k
2.5k
250
25
140k
50k
7.5k
750
75
1BOk
60k
9k
900
90
100k
50k
7.5k
750
75
90k
50k
9k
900
90
1000'
2000'
2500'
3000'
3000'
900
1600
2000'
2000'
2000'
600
1100
1600
2000'
2000'
'Also stable for CL :> 0.051'F
6-57
•
~
CD
~
:E
...I
r-----------------------------------------------------------------------------,
Application Hints (Continued)
. Because the LM363's output voltage is approximately one
diode drop below the voltage at pin 15 (pin 8 for the 8-pin
device), this point may be used to limit output swing as seen
in Figure 7a. Current available from this pin is only 50 JJ-A, so
that zeners must have a sharp breakdown to clamp accurately. Alternatively, a diode tied to a voltage source could
be used as in Figure 7b.
6.2V
50 pF to ground at both shield driver outputs. Do not use
only one shield driver for a single-ended signal as oscillations can result; shield driver to input capacitance must be
roughly balanced (±30%). To further reduce noise pickup,
the shielded signal lines may be enclosed together in a
grounded shield. If a large amount of RF noise is the problem, the only sure cure is a filter capacitor at both inputs;
otherwise the RFI may be internally rectified, producing an
offset.
DC loading on the shield drivers should be minimized. The
drivers can only source approximately 40 JJ-A; above this
value the input stage bias voltages change, degrading Vos
and CMRR. While the shield drivers can sink several mA,
Vos may degrade severely at loads above 100 JJ-A (see
Shield Driver Loading Error curve in Typical Performance
Characteristics). Because the shield drivers are one diode
drop above the input levels, unbalanced leakage paths from
shield to input can produce an input offset at high source
impedances. Buffering with emitter-followers (Figure 8b) reduces this leakage current by reducing the voltage differential and eliminates any loading on the amplifier.
6.2V
>-....--7.5V s
YoUT " 6.5V
a
15V
12k
lN914
lN914
LM336-2.5
>-....--IV s
YoUT " 2.5V
a. Standard Configuration
r15V
TlIH/5609-15
FIGURE 7. Output Clamp
20k _ _r
-15v_"""""",
SHIELD DRIVERS
When differential signals are sent through long cables, three
problems occur. First, nOise, both common-mode and differential, is picked up. Second, signal bandwidth is reduced by
the RC low-pass filter formed by the source impedance and
the cable capacitance. Finally, when these RC time constants are not identical (unbalanced source impedance
and/or unbalanced capacitance), AC common-mode rejection is degraded, amplifying both induced noise and
"ground" noise. Either filtering at the amplifier inputs or
slowing down the amplifier by overcompensating will indeed
reduce the noise, but the price is slower response. The
LM363's dual shield drivers can actually increase bandwidth
while reducing noise.
20k
-15V-"'\IVY_.....
+15V
b. NPN Followers to Reduce Offsets
TlIH/5609-16
The way this is done is by bootstrapping out shield capacitance. The shield drivers follow the input signal. Since both
sides of the shield capacitance swing the same amount, it is
effectively out of the circuit at frequencies of interest.
Hence, the input signal is not rolled off and AC CMRR is not
degraded (Figure 8). The LM363's shield drivers can handle
capacitances (shield to center conductor) as high as 1000
pF with source resistances up to 100 kfi.
FIGURE 8. Driving Shielded Cables
MISCELLANEOUS TRIMMING
The Vos adjust and shield driver pins available on the 16pin package may be used to trim the other parameters besides offset voltage, as illustrated in Figure 10. The bias-current trim relies on the fact that the voltage on the shield
driver and gain setting pins is one diode drop respectively
above and below the input voltage. Input bias current can
be held to within 100 pA over the entire common-mode
range, and input offset current always stays under 30 pA.
The CMRR trims use the shield driver pins to drive the Vos
adjust pins, thus maintaining the LM363's ultra-high input
impedance.
For best results, identical shielded cables should be used
for both signal inputs, although small mismatches in shield
driver to ground capacitance (:5:500 pF) do not cause problems. At certain low values of cable capacitance (50 pF200 pF), high frequency oscillations can occur at high
source resistance (;:'; 10 kfi). This is alleviated by adding
6-58
Application Hints (Continued)
Vas. Both the gain and DC CMRR trims can degrade positive PSRR; the positive PSRR can then be nulled out if desired. The correct order of trimming from first to last is bias
current, gain, CMRR, negative PSRR, positive PSRR and
Vas·
If power supply rejection is critical, frequently only the negative PSRR need be adjusted, since the positive PSRR is
more tightly specified. Any or all of the trim schemes of
Figure 10 can be combined as desired. As long as the center tap of the 100k trimpot is returned to a voltage 200 mV
below V+, the trim schemes shown will not greatly affect
Top Trace: Cable Shield Grounded
Bottom Trace: Cable Shield Bootstrapped
LM363 OUTPUT IV IDiV
100 ,../OIY
TL/H/5609-17
TL/H/5609-1B
FIGURE 9. Improved Response using Shield Drivers
15V
15V
60k
50k
10M
3.9M
10M
1M
a. Bias Current
b. Gain
c. DCCMRR
15V
15V
lOOk
1.2k
8.25M
-15V
d. ACCMRR
e. Negative PSRR
I. Positive PSRR
TUH/5609-19
FIGURE 10. Other Trims for 16-Pin Package
6-59
Typical Applications
4 mA-20 mA Two Wire Current Transmitter
r--------------t R L~~Y+
RIO
35.7
R9
357
HIGH IMPEDANCE
BRIDGE TRANSDUCER
+
lN457
..-------------------t
~~~u~~~~r-------------
r----
I
I
I
R6
4O.2k
R8
lOOk
OFFSET
R7
lOOk
R4
R3
5000
GAIN
1.7k
III
LM329B
B.9Y
lN914
Rll
2l1li0
Rl
10011
III
R2
Uk
III
TUH/5609-20
The LM329 reference provides excellent line regulation and gain stability. When bridge Is balanced
(IOUT=4 rnA), there's no drop across R3 and R4, so that gain and offset adjustments are non-Interactive. The LM334 configured as a zero-Te current source supplies quiescent current to circuit.
Rll provides current limiting.
Design Equations
(1+~) =4mA
los=(IR6+IR7)
Gain=alOUT "~XR2+R3+R4~ lOrnA
aVIN Rl
R3+R4
mV
when Av = LM363 voltage gain
O.68V 66mV
.
Pick 1334 = 'Fi9+ RIO '" 3.8 rnA
IMAX = 1334 + Vz-2.4V = 26 rnA
Rll
IBRIDGE(MAX) '" 1334-1363-IZ '" 1.5mA
Precision Current Source
(Low Output Current)
Precision Op Amp
HI
c.~
Cl
100 pF
0.01
">--------...
COMP
":'
-VOUT
Select for optimum square wave response. Omit for closed loop
gains above 100. Not required for instrumentation amplHier configuration.
TL/H/5609-21
PreCision Voltage to Current Converter
(Low Input Voltage)
Rl
1.02k
Rl=R2
>----....-"Mr-...... IOUT
Req=Rliiso kn
lOUT = G VIN= G VIN
Req
1 kn
TUH/5609-22
6-60
Rl=R2
IOUT=~
GRI
Typical Applications
(Continued)
Curvature Corrected Platinum RTD Thermometer
ISV
100mVf'C
lktt
1%
R4
10k'
R2
10k
8k11
1%
1%
1%
88k
1%
35Dk
SkI
2001
2ERO
u tt
1%
Rl
10k
1%
r---I
I
R3
Uk
1%
':'
I.SM
1%
--,
10Sk
I
I
1%
I
I
I
I
~--------~--~----~I~~-+
I
RS
1%
IL.~N!R!..
DoC
tless than 100 ppm/oe drift
ttThese resistors should track to 20 ppmre
I
:t:Equivalent circuit, showing lead resistance
I
I
PLATINUM
_
I
oJ
'70k and 2k should Irack to 5 ppmre
"less than 5 ppmre drift
~~Ul
1.1Sk
1%
':'
2k
"'
ZOk
NON·
lINEARITV
1k
1%
Tl/H/5609-23
This thermometer is cabable of O.OI°e accuracy over -500 e to
+ 150"C. A unique trim arrangement eliminates cumbersome trim interactions so that zero, gain, and nonlinearity correction can be trimmed in
one oven trip. Extra op amps provide full Kelvin sensing on the sensor
without adding drift and offset terms found in other designs. A2 is configured as a Howland current pump, biasing the sensor with a fixed
current.
Resistors R2, R3, R4 and R5 from a bridge driven into balance by A 1. In
balance, both inputs of AI are at the same voltage. Since R6~ R7, AI
draws equal currents from both legs of the bridge. Any loading of the
R4/R5 leg by the sensor would unbalance the bridge; therefore, both
bridge taps are given to the sensor open circuit voltage and no current
is drawn.
Precision Temperature Controller
ISV
lSV
SERVO RESPONSE
TEST POINT
10k*
,
I
I
10k*
~
10k*
I
I
LM3951
'- _ _ _ _ .... _ _ _ _
TL/H/5609-24
·Ultronix 105A wirewound
Therrnistor~ Yellow
Setpoint
!!!!.R~F!!!B~
I
I
15k
I
I
I
_ _ _ _ _ _ _ _ _ ..J
Springs #44032
slability~2.5Xl0-4°elHr
6-61
•
Typical Applications (Continued)
Low Frequency Rolloff (AC Coupling)
Cl
3.3,..,
111Hz
21TC1(50kll)
BOd~k"'l~_
20dB~
12= 100 11 = 100Hz
Reduced DC voltage gain
attenuates offset error and
111 noise by a lactor of 100.
\
t-\
1 100
Hz Hz
11 12
~I
30
kHz
1M
TLlH/5609-25
Precision Comparator with Balanced Inputs and Variable Offset
Boosted Current Source with Limiting
15V
V+
15k
LM336
Rl
4.7M
lN457
3Vn
lN457
-o.BV
lN457
10
R2
lo=GVIN
R2
100
IMAX= VBE
R2
Ipd'" 15 ,,8 at 1 mV overdrive
"'60mA
~VOUT=V2+0.6V.
Hysteresls=
-15V --'lNlr-15V
10k
OFFSET ADJ
G(~~~U~2) =2 mV
OIIset= VSENSE /G .
±1.3V range
TLlH/5609-26
Thermocouple Amplifier with Cold Junction Compensation
OUTPUT
=10 mV/"C
R8
10k
Rl
2k
I'll
R2
2.16k
I'll
R3
500
DAlN
TRIM
R9
10k
ZERO -15Y
ADJUST
R5
2.o5k
I'll
R7
R6
49.9
49.9
I'll
1%
Input protection circuitry allows
thermocouple to short to 120 VAC without
R4
2k
I'll
COLD JUNCnON
LOCATE NEAR LM334
":'
damaging amplifier.
Calibration:
1) Apply 50 mV Signal in place of thermocouple.
Trim R3 for VouT=12.25V.
2) Reconnect thermocouple. Trim R9 for correct
output
TL/H/5609-27
6-62
Typical Applications (Continued)
Synchronous Demodulator
SQUARE WAVE CLOCK
"-
"-
lOOk
TYPICAL " INPUT SIGNAL
t---III\I\r-...,.. SOURCES
OPTICAL
CHOPPER"
>
INPUT---+
/
2k
DC
BALANCE
lOOk
/
~
>-......+-OUTPUT
/
-71-
SQUARE
WAVE
CLOCK
Y
TliH/5609-2B
"'Use square wave drive produced by optical chopper to run LF13333 switch inputs.
Pulsed Bridge Driver/Amplifier
15V
STAN COR
"FILAMENT" TYPE
TRANSFORMER
P8394 t
10k"
SECONDARY
lk
'::"
12k
CLOCK
5 VOLTS
lOOpS WIOE
5 Hz
15V
39k
*TRW MAR-6 precision resistor
+I-=lN4148
tprovides '" SOV pulses for bridge
excitation for greater resolution
without overdlssipation
TLIH/5609-29
6·63
Typical Applications (Continued)
Precision Barometer
8.D6k
.-JWo-. ~
4.7k
15V
1"""1
I
I
"Parallel trim lor 28.00" Hg ~ ov
tParaliel trim lor 32.00"
Hg~4V
out
1IB.L.H. Electronics
OUTPUT
#DHF-444114
Pressure Transducer
350n input impedance
Output~ 1
mV/volt excitation/psi
TLIH/5609-30
Removing Large DC Offsets
r- - - -
Cl
-,0.15,F
I ~ t--..---'-----'1
I -=-I
I
R3
15M
I
I
L ____ .J
TRANSDUCER
WITH
DC OFFSET
·Optional bandlimiting to reduce noise.
Pick R1Cl
C4
0.01
~R2C2~R3C3/10
21TII
TLIHl!i609-31
11=0.1 Hz for values shown. Integrator nulls out offset error to
LM363 bias currents flowing into Rl and R2.
Removing Small DC Offsets
*Optional bandlimiting to reduce noise.
Low frequency break
C3
0.01
1
Irequencyll~ 21TR1Cl ~0.01 Hz
Accommodates out referred offset of several volts. Umit is set by max
TLIH15609-32
differential between reference and sense terminals.
6·64
Section 7
Surface Mount
fII
Section 7 Contents
Surface Mount . . . . . . . • . . . . . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AN-450 Small Outline (SO) Package Surface Mounting Methods-Parameters and Their Effect
on Product Reliability ............................................•................
7-2
7-3
7-13
en
c
~
~NatiOnal
n
Semiconductor
CD
3:
o
C
::J
Surface Mount
Cost pressures today are forcing many electronics manufacturers to automate their production lines. Surface mount
technology plays a key role in this cost-savings trend because:
SURFACE MOUNT PACKAGING AT NATIONAL
To help our customers take advantage of this new tech nology, National has developed a line of surface mount packages. Ranging in lead counts from 3 to 360, the package
offerings are summarized in Table I.
1. The mounting of devices on the PC board surface eliminates the expense of drilling holes;
Lead center spacing keeps shrinking with each new generation of surface mount package. Traditional packages (e.g.,
OIPs) have a 100 mil lead center spacing. Surface mount
packages currently in production (e.g., SOT, SOIC, PCC,
LCC, LOCC) have a 50 mil lead center spacing. Surface
mount packages in production release (e.g., PQFP) have a
25 mil lead center spacing. Surface mount packages in development (e.g., TAPEPAK®) will have a lead center spacing of only 12-20 mils.
2. The use of pick-and-place machines to assemble the PC
boards greatly reduces labor costs;
3. The lighter and more compact assembled products resuiting from the smaller dimensions of surface mount
packages mean lower material costs.
Production processes now permit both surface mount and
insertion mount components to be assembled on the same
PC board.
TABLE 1_ Surface Mount Packages from National
Package
Type
Small Outline
Transistor
(SOn
Small Outline
IC(SOIC)
Plastic Chip
Carrier (PCG)
Plastic Quad
Flat Pack
(PQFP)
e
mcr:: ~ 0
~
Package
Material
Lead Bend
~
TAPEPAK®
(TP)
Leadless Chip Leaded Chip
Carrier (LCC) Carrier
(LOCG)
[g] 0
~
I
, !!i!!lnll!!II!1!!111 !lMMMMHMH! I
Plastic
Plastic
Plastic
Plastic
Plastic
Ceramic
-
~/l//4]
Ceramic
Gull Wing
Gull Wing
J-Bend
Gull Wing
Gull Wing
Lead Center
Spacing
50 Mils
50 Mils
50 Mils
25 Mils
20,15,12 Mils
50 Mils
50 Mils
Tape & Reel
Option
Yes
Yes
Yes
tbd
tbd
No
No
Lead Counts SOT-23
High Profile
SOT-23
Low Profile
SO-8(0)
SO-14(0)
PCC-20(*)
PCC-28(*)
SO-14 Wide(')
SO-16(*)
SO-16Wide(')
SO-20<*)
SO-24(0)
PCC-44(*)
PCC-68
PCC-84
PCC-124
PQFP-84
PQFP-100
PQFP-132
PQFP-196(*)
PQFP-244
'In production (or planned) for linear products.
7-3
TP-40 (*)
TP-68
TP-84
TP-132
TP-172
TP-220
TP-284
TP-360
Gull Wing
LCC-18
LCC-20(*)
LOCC-44
LCC-28
LOCC-68
LCC-32
LCC-44(')
LCC-48
LCC-52
LCC-68
LCC-84
LCC-124
LOCC-84
LOCC-124
•
cr-----------------------------~--------------~
:::::I
o
LINEAR PRODUCTS IN SURFACE MOUNT
Linear functions available in surface mount include:
~
•
•
•
•
:E
:::::I
(I)
TABLE II: Surface Mount Package
Thermal Resistance Range'
Op amps
Comparators
Regulators
References
Package
• Data conversion
• Industrial
• Consumer
• Automotive
A complete .list of linear part numbers in surface mount is
presented in Table III. Refer to the datasheet in the appropriate chapter of this databook for a complete description of
the device. In addition, National is continually expanding the
list of devices offered in surface mount. If the functions you
need do not appear in Table III, contact the sales office or
distributor branch nearest you for additional information.
Thermal Resistance"
(lIjA,·C/W)
SO-8
SO-14
SO-14 Wide
SO-16
SO-16 Wide
SO-20
SO-24
120-175
100-140
70-110
90-130
70-100
60-90
55-85
PCC-20
PCC-28
PCC-44
70-100
60-90
40-60
• Actual thermal resistance for a particular device depends on die SiZB.
Refer to the datasheet for the actual 8jA value.
"Test conditions: PCB mount (FR4 material). still air (room temperature),
copper traces (150 x 20 x 10 mils).
Automated manufacturers can improve their cost savings by
using Tape-and-Reel for surface mount devices. Simplified
handling results because hundreds-to-thousands of semiconductors are carried on a single Tape-and-Reel pack (see
ordering and shipping information-printed later in this section-for a comparison of devices/reel vs. devices/rail for
those surface mount package types being used for linear
products). With this higher device count per reel (when compared with less than a 100 devices per rail), pick-and-place
machines have to be re-Ioaded less frequently and lower
labor costs result.
With Tape-and-Reel, manufacturers save twice-once from
using surface mount technology for automated PC board
assembly and again from less device handling during shipment and machine set-up.
Given a max junction temperature of 150·C and a maximum
allowed ambient temperature, the surface mount device will
be able to dissipate less power than the DIP device. This
factor must be taken into account for new designs.
For board conversion, the DIP and surface mount devices
would have to dissipate the same power. This means the
surface mount circuit would have a lower maximum allowable ambient temperature than the DIP circuit. For DIP circuits where the maximum ambient temperature required is
substantially lower than the maximum ambient temperature
allowed, there may be enough margin for safe operation of
the surface mount circuit with its lower maximum allowable
ambient temperature. But where the maximum ambient temperature required of the DIP current is close to the maximum allowable ambient temperature, the lower maximum
ambient temperature allowed for the surface mount circuit
may fall below the maximum ambient temperature required.
The circuit designer must be aware of this potential pitfall so
that an appropriate work-around can be found to keep the
surface mount package from being thermally overstressed
in the application.
BOARD CONVERSION
Besides new designs, many manufacturers are converting
existing printed circuit board designs to surface mount. The
resulting PCB will be smaller, lighter and less expensive to
manufacture; but there is one caveat-be careful about the
thermal dissipation capability of the surface mount package.
Because the surface mount package is smaller than the traditional dual-in-line package, the surface mount package is
not capable of conducting as much heat away as the DIP
(i.e., the surface mount package has a higher thermal resistance-see Table II).
SURFACE MOUNT LITERATURE
National has published extensive literature on the subject of
surface mount packaging. Engineers from packaging, quality, reliability, and surface mount applications have pooled
their experience to provide you with practical hands-on
knowledge about the construction and use of surface mount
packages.
The applications note AN-450 "Surface Mounting Methods
and their Effect on Product Reliability" is referenced on
each SMD datasheet. In addition, "Wave Soldering of Surface Mount Components" is reprinted in this section for your
information.
The silicon for most National devices can operate up to a
150·C junction temperature (check the datasheet for the
rare exception). Like the DIP, the surface mount package
can actually withstand an ambient temperature of up to
125·C (although a commercial temperature range device
will only be specified for a max ambient temperature of 70·C
and an industrial temperature range device will only be
specified for a max ambient temperature of 85·C). See
AN-336, "Understanding Integrated Circuit Package Power
Capabilities", (reprinted in the appendix of each linear databook volume) for more information.
7-4
,--------------------------------------------------------------------------, 0
c
TABLE III. Linear Surface Mount Current Device Listing
Amplifiers and Comparators
Part Number
LF347WM
LF351M
LF451CM
LF353M
LF355M
LF356M
LF357M
LF444CWM
LM10CWM
LM10CLWM
LM308M
LM308AM
LM310M
LM311M
LM318M
LM319M
LM324M
LM339M
LM346M
LM348M
LM358M
LM359M
Data Acquisition Circuits
Part Number
Part Number
LM392M
LM393M
LM741CM
LM1458M
LM2901M
ADC0802LCV
ADC0802LCWM
ADC0804LCV
ADC0804LCWM
ADC0808CCV
ADC0809CCV
LM2902M
LM2903M
LM2904M
LM2924M
LM3403M
ADC0811BCV
ADC0811CCV
ADC0819BCV
ADC0819CCV
ADC0820BCV
ADC0820CCV
LM4250M
LM324M
LM339M
LM365WM
LM607CM
LMC669BCWM
LMC669CCWM
LF441CM
CD
3l:
o
C
::I
DAC0808LCM
DAC0830LCWM
DAC0830LCV
DAC0832LCWM
DAC0832LCV
Industrial functions
Part Number
Part Number
LM317LM
LF3334M
LM2931 M·5.0
LM3524M
LM78L05ACM
LM78L12ACM
LM78L15ACM
LM385M
LM385M·1.2
Part Number
ADC1025BCV
ADC1025CCV
DAC0800LCM
DAC0801LCM
DAC0802LCM
DAC0806LCM
DAC0807LCM
C')
ADC0838BCV
ADC0838CCV
ADC0841BCV
ADC0841CCV
ADC0848BCV
ADC0848CCV
ADC1005BCV
ADC1005CCV
Regulators and References
LM336M·2.5
LF336BM·2.5
LM336M·5.0
LM336BM·5.0
LM337LM
:::::.
Q)
LM79L05ACM
LM79L12ACM
LM79L15ACM
LP2951ACM
LP2951CM
Part Number
Part Number
AH5012CM
LF13331M
LF13509M
LF13333M
LM555CM
LM13600M
LM13700M
LMC555CM
LM567CM
MF4CWM·50
LM556CM
LM567CM
LM1496M
LM2917M
MF4CWM·100
MF6CWM·50
MF10CCWM
MF6CWM-100
MF5CWM
LM3046M
LM3086M
LM3146M
LM385BM·1.2
LM385M·2.5
LM385BM·2.5
LM723CM
LM2931CM
Commercial and Automotive
7-5
Part Number
Part Number
LM386M-1
LM592M
LM831M
LM832M
LM833M
LM1837M
LM1851M
LM1863M
LM1865M
LM1870M
LM837M
LM838M
LM1131CM
LM1894M
LM1964V
LM2893M
LM3361AM
LM1881M
•
..C
5
r-----------------------------------------------------------------------------------------~
:E
CP
~
=
en
Hybrids
Part Number
Part Number
LHOO02E
LH4002E
LH0032E
LH0033E
A FINAL WORD
National is a world leader in the design and manufacture of
surface mount components.
Because of design innovations such as perforated copper
leadframes, our small outline package is as reliable as our
DIP-the laws of physics would have meant that a straight
"junior copy" of the DIP would have resulted in an "5.0."
package of lower reliability. You benefit from this equivalence of reliability. In addition, our ongoing vigilance at each
step of the production process assures that the reliability we
designed in stays in so that only devices of the highest quality and reliability are shipped to your factory.
Package
Package
Designator
Max/Rail
Per Reel·
50-8
50-14
50-14 Wide
50-16
50-16 Wide
50-20
50-24
M
M
WM
M
WM
M
M
100
50
50
50
50
40
30
2500
2500
1000
2500
1000
1000
1000
V
V
V
50
40
25
1000
1000
500
PQfP-196
VF
TBD
-
TP-40
TP
100
TBD
E
E
50
25
-
PCL-20
PCL-28
PCL-44
LCC-20
LCC-44
Our surface mount applications lab at our headquarters site
in Santa Clara, California continues to research (and publish) methods to make it even easier for you to use surface
mount technology. Your problems are our problems.
When you think "Surface Mount"-think "National"!
·Incremental ordering quantities. (National Semiconductor reserves the right
to provide a smaller quantity of devices per Tape-and-Reel pack to preserve
lot or date code integrity. See example below.)
Example: You order 5,000 LM324M ICs shipped in Tapeand-Reel.
• Case 1: All 5,000 devices have the same date code
Ordering and Shipping Information
• You receive 2 50-14 (Narrow) Tape-and-Reel
packs, each having 2500 LM324M ICs
When you order a surface mount semiconductor, it will be in
one of the several available surface mount package types.
Specifying the Tape-and-Reel method of shipment means
that you will receive your devices in the following quantities
per Tape-and-Reel pack: SMD devices can also be supplied
in conventional conductive rails.
• Case 2: 3,000 devices have date code A and 2,000 devices have date code B
• You receive 3 50-14 (Narrow) Tape-and-Reel
packs as follows:
Pack # 1 has 2,500 LM324M ICs with date code A
Pack #2 has 500 LM324M ICs with date code A
Pack #3 has 2,000 LM324M ICs with date code B
Short-Form Procurement Specification
TAPE FORMAT
Trailer (Hub End)·
Carrier·
Leader (Start End)·
Empty Cavities,
min (Unsealed
Cover Tape)
Empty Cavities,
min (Sealed
Cover Tape)
Filled Cavities
(Sealed
Cover Tape)
Empty Cavities,
min (Sealed
Cover Tape)
Empty Cavities,
min (Unsealed
Cover Tape)
50-8 (Narrow)
2
2
2500
5
5
50-14 (Narrow)
2
2
2500
5
5
50-14 (Wide)
2
2
1000
5
5
50-16 (Narrow)
2
2
2500
5
5
50-16 (Wide)
2
2
1000
5
5
50-20 (Wide)
2
2
1000
5
5
50-24 (Wide)
2
2
1000
5
5
PCC-20
2
2
1000
5
5
PCC-28
2
2
750
5
5
PCC-44
2
2
500
5
5
Small Outline IC
Plastic Chip Carrier IC
'lbe following diagram Identifies these sections of the tape and Pin 11 1 device orientaUon.
7-6
r-------------------------------------------------------------------------, cm
Short-Form Procurement Specification (Continued)
iiin
DEVICE ORIENTATION
CD
DIRECTION
OF FEED
3:
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t. _______. . -
~
TRAILER - - - - i.....I"".I---------CARRIERSECTION--------.....
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:I
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END
I
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''----'-1---,' '-----.----• EMPTY
• EMPTY
CAVITIES
• UNSEALED
COVER TAPE
CAVITIES
• SEALED
COVER TAPE
• FILLED CAVITIEi
• SEALED COVER TAPE
r:--------:;,
I~ 0
0
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CAVITIES
::-u-
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PIN 1
ORIENTATION
I
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0
0
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SD-IC
DEVICES
0
nnn....
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• EMPTY
CAVITIES
• UNSEALED
CDVER TAPE
1.-
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• EMPTY
I
~
PCC-IC
DEVICES
TL/XX/OO26-8
MATERIALS
• Reel:
• Cavity Tape: Conductive PVC (less than 105 Ohms/Sq)
(1) Solid 80 pt fibreboard (standard)
• Cover Tape: Polyester
(2) Conductive fibreboard available
(3) Conductive plastic (PVC) available
(1) Conductive cover available
TAPE DIMENSIONS (24 MIllimeter Tape or Less)
Po 10 PITCH CUMULATIVE
TAPE TOLERANCE ±O.2mm
DEVICE ORIENTATION
PIN
1
SO-IC
Pec-Ie
TL/XX/0026-9
7-7
::s
Short-Form Procurement Specification (Continued)
I
W
I
P
I
I
F
E
I
P2
I
I
Po
I
0
T
I
AO
I
80
I
KO
I
01
IR
Small Outline IC
SO-8
12±.30 B.0±.10
(Narrow)
5.5±.05 1.75±.10 2.0±.05 4.0·±.10 1.55±.05 .30±.10 6.4±.10
5.2±.10
2.1 ±.10 1.55±.05 30
SO-14
16±.30 B.0±.10
(Narrow)
7.5±.10 1.75±.10 2.0±.05 4.0±.10 ·1.55±.05 .30±.10 6.5±.10
9.0±.10
2.1 ±.10 1.55±.05 40
16±.30 12.0±.10 7.5±.10 1.75±.10 2.0±.05 4.0±.10 1.55±.05 .30±.10 10.9±.10
9.5±.10
3.0±.10 1.55±.05 40
SO-14
(Wide)
SO-16
16±.30 B.0±.10
(Narrow)
10.3±.10 2.1±.10 1.55±.05 40
7.5±.10 1.75±.10 2.0±.05 4.0±.10 1.55±.05 .30±.10 6.5±.10
SO-16
(Wide)
16±.30 12.0±.10 7.5±.10 1.75±.10 2.0±.05 4.0±.10 1.55±.05 .30±.10 10.9±.10 10.76±.10 3.0±.10 1.55±.05 40
SO-20
(Wide)
24±.30 12.0±.10 11.5±.10 1.75±.10 2.0±.05 4.0±.10 1.55±.05 .30±.10 10.9±.10 13.3±.10 3.0±.10 2.05±.05 50
SO-24
(Wide)
24±.30 12.0±.10 11.5±.10 1.75±.10 2.0±.05 4.0±.10 1.55±.05 .30±.10 10.9±.10 15.B5±.10 3.0±.10 2.05±.05 50
Plastic Chip Carrier IC
PCC-20
16±.30 12.0±.10 7.5±.10 1.75±.10 2.0±.05 4.0±.10 1.55±.05 .30±.10 9.3±.10
PCC-2B
24±.30 16.0±.10 11.5±.10 1.75±.10 2.0±.05 4.0±.10 1.55±.05 .30±.10 13.0±.10 13.0±.10 4.9±.10 2.05±.05 50
9.3±.10
4.9±.10 1.55±.05 40
Note 1: Ao. Bo and Ko dimensions are measured 0.3 mm above the inside wall of the cavity bottom.
Note 2: Tape with components shall pass around a mandril radius R without damage.
Note 3: Cavity tape material shall be PVC conductive (less than 105 Ohms/Sq).
Note 4: Cover tape m~terial shall be polyester (30-65 grams peel·back force).
Note 5: D1 Dimension is centered within cavity.
Note 6: All dimensions are in millimeters.
REEL DIMENSIONS
TMAX
-
-8
LABELID
~
,
DI~'i
((0) )
A
"- -_/'-
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M
STARTM* Surface Mount Tape and Reel
7-8
TLlXX/OO26-10
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Short-Form Procurement Specifications (Continued)
n
(I)
12mmTape
SO-8 (Narrow)
A (Max)
B(Min)
C
D(Min)
N(Min)
G
(13.00)
.059
-1.5
.512±.002
--
.795
--
1.969
0.488~:g6g
50
12.4 ~~
.059
.512±.002
.795
1.5
13±0.05
1.969
50
.059
.512±.002
1.5
13±0.05
(330)
16 mm Tape
24mmTape
32mmTape
SO-14 (Narrow)
SO-14 (Wide)
SO-16 (Narrow)
SO-16 (Wide)
PCC-20
(13.00)
--
(330)
SO-20 (Wide)
SO-24 (Wide)
PCC-28
(13.00)
-
(330)
(13.00)
PCC-44
.059
.512±.002
1.5
13±0.05
-
(330)
13±0.05
20.2
-
20.2
.795
-
20.2
.795
-
20.2
0.646~:g6g
16.4 ~~
1.969
0.960~:g6g
50
2
244+
. -0
-1.969
1.276~:g6g
50
2
324+
. -0
--
T(Max)
.724
--
18.4
.882
-22.4
1.197
-30.4
1.512
-38.4
Units: _I_n_c_he_s_
Millimeters
Material: Paperboard (Non-Flaking)
LABEL
Wave Soldering of Surface
Mount Components
Human and Machine Readable Label is provided on reel. A
variable (C.P.I) density code 39 is available. NSC STD label
(7.6 C.P.I.)
ABSTRACT
In facing the upcoming surge of "surface mount technology", many manufacturers of printed circuit boards have taken steps to convert some portions of their boards to this
new process. However, as the availability of surface mount
components is still limited, may have taken to mixing the
lead-inserted standard dual-in-line packages (DIPs) with the
surface mounted devices (SMDs). Furthermore, to take advantage of using both sides of the board, surface-mounted
components are generally adhered to the bottom side of the
board while the top side is reserved for the conventional
lead-inserted packages. If processed through a wave solder
machine, the semiconductor components are now subjected to extra thermal stresses (now that the components are
totally immersed into the molten solder).
FIELD
Lot Number
Date Code
Revision Level
National Part No. 1.0.
aty.
EXAMPLE
LOT
(NUMBER
DATE
(CODE
LOT: EPb393b3K027
D/C:
/REVISION
\, NUMBER
M8b~~
R:
Ilmlllllmllllll~III~III~llllllmllll~III~llnll~ IIMllilll~illl~I~II~~1
Ib3
QTY: 2500
A discussion of the effect of wave soldering on the reliability
of plastic semiconductor packages follows. This is intended
to highlight the limitations which should be understood in
the use of wave soldering of surface mounted components.
NATIONAL SEMICONDUCTOR PART NUMBER
TLlXX/0026-11
Fields are separated by at least one blank space.
ROLE OF WAVE-SOLDERING IN
APPLICATION OF SMDs
Future Tape-and-Reel packs will also include a smaller-size
bar code label (high-density code 39) at the beginning of the
tape. (This tape label is not available on current production.)
The generally acceptable methods of soldering SMDs are
vapor phase reflow soldering and IR reflow soldering, both
requiring application of solder paste on PW boards prior to
placement of the components. However, sentiment still exists for retaining the use of the old wave-soldering machine.
National Semiconductor will also offer additional labels containing information per your specific specification.
7-9
oC==
::I
c
::s
o
:i
~::s
(J)
Wave Soldering of Surface Mount Components (Continued)
C) VaporliR rellow only.
The reasons being:
1) Most PC Board Assembly houses already possess wave
soldering equipment. Switching to another technology
such as vapor phase soldering requires substantial investment in equipment and people.
2) Due to the limited number of devices that are surface
mount components, it is necessary to mix both lead inserted components and surface mount components on
the same board.
1. Components on the same side of PW Board.
Trim and form standard DIPs in "gull wing" configuration
Solder paste screened on PW Board
Pick and place SMDs and DIPs
Bake
VaporII R reflow
Clean
3) Some components such as relays and switches are
made of materials which would not be able to survive the
temperature exposure in a vapor phase or IR furnace.
2. Components on opposite sides of PW Board.
Solder paste screened on SMD-side of Printed
Wire Board
PW BOARD ASSEMBLY PROCEDURES
There are two considerations in which through-hole ICs may
be combined with surface mount components on the PW
Board:
a) Whether to mount ICs on one or both sides of the board.
b) The sequence of soldering using Vapor Phase, IR or
Wave Soldering singly or combination of two or more
methods.
The various processes that may be employed are:
A) Wave Solder before VaporliR reflow solder.
1. Components on the same side of PW Board.
Lead insert standard DIPS onto PW Board Wave
solder (conventional)
Wash and lead trim
Dispense solder paste on SMD pads
Pick and place SMDs onto PW Board
Bake
Vapor phaseliR reflow
Clean
2. Components on opposite side of PW Board.
Lead insert standard DIPs onto PW Board
Wave Solder (conventional)
Clean and lead trim
Invert PW Board
Dispense solder paste on SMD pads
Dispense drop of adhesive on SMD sites (optional
for smaller components)
Pick and place SMDs onto board
Bake/Cure
Invert board to rest on raised fixture
VaporliR rellow soldering
Clean
B) VaporliR rellow solder then Wave Solder.
1. Components on the same side of PW Board.
Solder paste screened on SMD side of Printed
Wire Board
Pick and place SMDs
Bake
VaporliR rellow
Lead insert on same side as SMDs
Wave solder
Clean and trim underside of PCB
Adhesive dispensed at central location of each
component
Pick and place SMDs
Bake
Solder paste screened on all pads on DIP-side or
alternatively apply solder rings (performs) on
leads
Lead insert DIPs
VaporII R rellow
Clean and lead trim
D) Wave Soldering Only
1. Components on opposite sides of PW Board.
Adhesive dispense on SMD side of PW Board
Pick and place SMDs
Cure adhesive
Lead insert top side with DIPs
Wave solder with SMDs down and into solder bath
Clean and lead trim
All of the above assembly procedures can be divided into
three categories for I.C. Reliability considerations:
1) Components are subjected to both a vapor phaseliR
heat cycle then followed by a wave-solder heat cycle or
vice versa.
2) Components are subjected to only a vapor phaseliR
heat cycle.
3) Components are subjected to wave-soldering only and
SMDs are subjected to heat by immersion into a solder
pot.
Of these three categories, the last is the most severe regarding heat treatment to a semiconductor device. However, note that semiconductor molded packages generally
possess a coating of solder on their leads as a final finish
for solderability and protection of base leadframe material.
Most semiconductor manufacturers solder-plate the component leads, while others perform hot solder dip. In the latter
case the packages may be subjected to total immersion into
a hot solder bath under controlled conditions (manual operation) or be partially immersed while in a 'pallet' where automatic wave or DIP soldering processes are used. It is, therefore, possible to subject SMDs to solder heat under certain
conditions and not cause catastrophic failures.
7-10
en
c
Wave Soldering of Surface Mount Components (Continued)
THERMAL CHARACTERISTICS OF
MOLDED INTEGRATED CIRCUITS
Since Plastic DIPs and SMDs are encapsulated with a thermoset epoxy, the thermal characteristics of the material
generally correspond to a TMA(Thermo-Mechanical Analysis) graph. The critical parameters are (a) its Linear thermal
expansion characteristics and (b) its glass transition temperature after the epoxy has been fully cured. A typical TMA
graph is illustrated in Figure 1. Note that the epoxy changes
to a higher thermal expansion once it is subjected to temperatures exceeding its glass transition temperature. Metals
(as used on lead frames, for example) do not have this characteristic and generally will have a consistent Linear thermal
expansion over the same temperature range.
In any good reliable plastic package, the choice of lead
frame material should be such to match its thermal expansion properties to that of the encapsulating epoxy. In the
event that there is a mismatch between the two, stresses
can build up at the interface of the epoxy and metal. There
now exists a tendency for the epoxy to separate from the
metal lead frame in a manner similar to that observed on bimetallic thermal range.
EFFECT ON PACKAGE PERFORMANCE BY
EPOXY-METAL SEPARATION
In wave soldering, it is necessary to use fluxes to assist the
solderability of the components and PW boards. Some facilities may even process the boards and components through
some form of acid cleaning prior to the soldering temperature. If separation occurs, the flux residues and acid residues (which may be present owing to inadequate cleaning)
will be forced into the package mainly by capillary action as
the residues move away from the solder heat source. Once
the package is cooled, these contaminants are now trapped
within the package and are available to diffuse with moisture
from the epoxy over time. It should be noted that electrical
tests performed immediately after soldering generally will
give no indication of this potential problem. In any case, the
end result will be corrosion of the chip metallization over
time and premature failure of the device in the field.
VAPOR PHASE/IR REFLOW SOLDERING
In both vapor phase and IR reflow soldering, the risk of
separation between epoxy/metal can also be high. Operating temperatures are 215'C (vapor phase) or 240'C (IR) and
duration may also be longer (30 sec-SO sec). On the same
theoretical basis, there should also be separation. However,
in both these methods, solder paste is applied to the pads
of the boards; no fluxes are used. Also, the devices are not
immersed into the hot solder. This reduces the possibility of
solder forCing itself into the epoxy-lead frame interface. Furthermore, in the vapor phase system, the soldering environment is "oxygen-free" and considered "contaminant free".
Being so, it could be visualized that as far as reliability with
respect to corrosion, both of these methods are advantageous over wave soldering.
In most cases when the packages are kept at temperatures
below their glass transition, there is a small possibility of
separation at the expoxy-metal interface. Howerver, if the
package is subjected to temprature above its glass-transition temperature, the epoxy will begin to expand much
faster than the metal and the probability of separation is
greatly increased.
CONVENTIONAL WAVE-SOLDERING
Most wave-soldering operations occur at temperatures between 240-2S0'C. Conventional epoxies for encapsulation
have glass-transition temperature between 140-170'C. An
I.C. directly exposed to these temperatures risks its long
term functionality due to' epoxy/metal separation.
BIAS MOISTURE TEST
A bias moisture test was designed to determine the effect
on package performance. In this test, the packages are
pressured in a stream chamber to accelerate penetration of
moisture into the package. An electrical bias is applied on
the device. Should there be any contaminants trapped within the package, the moisture will quickly form an electrolyte
and cause the electrodes (which are the lead fingers), the
gold wire and the aluminum bond-pads of the silicon device
to corrode. The aluminum bond-pads, being the weakest
link of the system, will generally be the first to fail.
This proprietary accelerated bias/moisture pressure-test is
significant in relation to the life test condition at 85'C and
Fortunately, there are factors that can reduce that element
of risk:
1) The PW board has a certain amount of heat-sink effect
and tends to shield the components from the temperature of the solder (if they were placed on the top side of
the board). In actual measurements, DIPs achieve a temperature between 120 -150'C in a 5-second pass over
the solder. This accounts for the fact that DIPs mounted
in the conventional manner are reliable.
2) In conventional soldering, only the tip of each lead in a
DIP would experience the solder temperature because
the epoxy and die are standing above the PW board and
out of the solder bath.
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Solder Joints on a SO-14 Package on PCB
Solder Joints on a SO-14 Package on PCB
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TLlF/8766-12
TLlF/8766-13
The SO package is molded out of clean, thermoset plastic
compound and has no particular compatibility problems with
most printed circuit board substrates.
The typical lithographic "footprints" for SO packages are
illustrated below. Note that the 0.050" lead center-center
spacing is not easily managed by commercially-available air
pressure, hand-held dispensers.
PRINTED CIRCUIT BOARD
Using a stainless-steel, wire-mesh screen stencilled with an
emulsion image of the substrate pads is by far the most
common and well-tried method. The paste is forced through
the screen by a V-shaped plastic squeegee in a sweeping
manner onto the board placed beneath the screen.
The package can be reliably mounted onto substrates such
as:
o G10 or FR4 glass/resin
o FR5 glass/resin systems for high-temperature
applications
The setup for SO packages has no special requirement
from that required by other surface-mounted, passive components. Recommended working specifications are:
o Polymide boards, also high-temperature
applications
o Ceramic substrates
o Use stainless-steel, wire-mesh screens, #80 or #120,
General requirements for printed circuit boards are:
wire diameter 2.6 mils. Rule of thumb: mesh opening
should be approximately 2.5-5 times larger than the average particle size of paste material.
o Mounting pads should be solder-plated whenever
applicable.
• Use squeegee of Durometer 70.
o Experimentation with squeegee travel speed is recommended, if available on machine used.
o Solder masks are commonly used to prevent solder bridg-
ing of fine lines during soldering.
The mask also protects circuits from processing chemical
contamination and corrosion.
• Use solder paste of mesh 200-325.
If coated over pre-tinned traces, residues may accumulate
at the mask/trace interface during subsequent reflow,
leading to possible reliability failures.
o Emulsion thickness of 0.005" usually used to achieve a
Recommended application of solder resist on bare, clean
traces prior to coating exposed areas with solder.
• Snap-off height of screen should not exceed
damage to screens and minimize distortion.
solder paste thickness (wet) of about 0.008" typical.
o Mesh pattern should be 90 degrees, square grid.
General requirements for solder mask:
- Good pattern resolution.
SOLDER PASTE
Selection of solder pastE;j tends to be confusing, due to numerous formulations available from various manufacturers.
In general, the following guidelines are sufficient to qualify a
particular paste for production:
- Complete coverage of circuit lines and resistance to
flaking during soldering.
- Adhesion should be excellent on substrate material to
keep off moisture and chemicals.
-
Yo" , to avoid
o Particle sizes (see photographs below). Mesh 325 (ap-
Compatible with soldering and cleaning requirements.
proximately 45 microns) should be used for general purposes, while larger (solder globules) particles are preferred for lead less components (LCC). The larger particles
can easily be used for SO packages..
SOLDER PASTE SCREEN PRINTING
With the initial choice of printed circuit lithographic design
and substrate material, the first step in surface mounting is
the application of solder paste.
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200 X Fry Metal (63/37)
Solder Paste Screen on Pads
TLlF/6766-20
TLlF/6766-19
200 ESL (63/37)
TLlF/8766-21
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CLEANING
The most critical process in surface mounting SO packages
is in the cleaning cycle. The package is mounted very close
to the surface of the substrate and has a tendency to collect
residue left behind after reflow soldering.
Important considerations in cleaning are:
Hot·Air Rework Machine
• Time between soldering and cleaning to be as short as
possible. Residue should not be allowed to solidify on the
substrate for long periods of time, making it difficult to
dislodge.
• A low surface tension solvent (high penetration) should be
employed. Solvents commercially available are:
Freon TMS (general purpose)
Freon TE35/TP35 (cold·dip cleaning)
Freon TES (general purpose)
TLlF/8766-23
lead tips or, if necessary, solder paste can be dispensed
onto the pads using a varimeter. After being placed into
position, the solder is reflowed by a hot·air jet or even a
standard soldering iron.
It should also be noted that these solvents generally will
leave the substrate surface hydrophobic (moisture repel·
lent), which is desirable.
WAVE SOLDERING
Prelete or 1,1,1·Trichloroethane
Kester 5120/5121
In a case where lead insertions are made on the same
board as surface·mounted components, there is a need to
include a wave·soldering operation in the process flow:
• A defluxer system which allows the workpiece to be sub·
jected to a solvent vapor, followed by a rinse in pure sol·
vent and a high·pressure spray lance are the basic requir·
ments for low·volume production.
Two options are used:
• Surface mounted components are placed and vapor
phase reflowed before auto·insertion of remaining compo·
nents. The board is carried over a standard wave·solder
system and the underside of the board (only lead·inserted
leads) soldered.
• For volume production, a conveyorized, multiple hot sol·
vent spray/jet system is recommended.
• Rosin, being a natural occurring material, is not readify
soluble in solvents, and has long been a stumbling block
to the cleaning process. In recent developments, synthet·
ic flux (SA flux), which is readify soluble in Freon TMS
solvent, has been developed. This should be explored
where permissible.
The dangers of an inadequate cleaning cycle are:
• Surface·mounted components are placed in position, but
no solder paste is used. Instead, a drop of adhesive about
5 mils maximum in height with diameter not exceeding
25% width of the package is used to hold down the pack·
age. The adhesive is cured and then proceeded to auto·
insertion on the reverse side of the board (surface·mount·
ed side facing down). The assembly is then passed over a
"dual wave" soldering system. Note that the surface·
mounted components are immersed into the molten sol·
der.
Lead trimming will pose a problem after soldering in the
latter case, unless the leads of the insertion components
are pre·trimmed or the board specially designed to localize
certain areas for easy access to the trim blade.
• Ion contamination, where ionic residue left on boards
would cause corrosion to metallic components, affecting
the performance of the board.
• Electro·migration, where ionic residue and moisture pres·
ent on electrically·biased boards would cause dentritic
grow1h between close spacing traces on the substrate,
resulting in faifures (shorts).
REWORK
The controls required for wave soldering are:
Should there be a need to replace a component or re·align
a previously disturbed component, a hot air system with ap·
propriate orifice masking to protect surrounding compo·
nents may be used.
• Solder temperature to be 240-260·C. The dwell time of
components under molten solder to be short (preferably
kept under 2 seconds), to prevent damage to most com·
ponents and semiconductor devices.
When rework is necessary in the field, specially·designed
tweezers that thermally heat the component may be used to
remove it from its site. The replacement can be fluxed at the
• RMA (Rosin Mildly Activated) flux or more aggressive OA
(Organic Acid) flux are applied by either dipping or foam
fluxing on boards prior to preheat and soldering. Cleaning
procedures are also more difficult (aqueous, when OA flux
is used), as the entire board has been treated by flux (un·
like solder paste, which is more or less localized). Non·
halide OA fluxes are highly recommended.
Hot·Alr Solder Rework Station
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RETRACT POSITION
• Preheating of boards is essential to reduce thermal shock
on components. Board should reach a temperature of
about 100·C just before entering the solder wave.
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• Due to the closer lead spacings (0.050' vs 0.100' for
dual·in·line packages), bridging of traces by solder could
occur. The reduced clearance between packages also
causes "shadowing" of some areas, resulting in poor sol·
der coverage. This is minimized by dual·wave solder sys·
tems.
HEAT SHIELD
BOARD ON
x·y TABLE
HOTAIR--TLlF/B766-22
7·20
Mixed Surface Mount and Lead Insertion
ADHESIVE
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(b) Opposite Sides
(a) Same Side
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PREHEAT
SOLDER FLOW
TL/F/8766-24
A typical dual-wave system is illustrated below, showing the
various stages employed. The first wave typically is in turbulence and given a transverse motion (across the motion of
the board). This covers areas where "shadowing" occurs. A
second wave (usually a broad wave) then proceeds to perform the standard soldering. The departing edge from the
solder is such to reduce "icicles," and is still further reduced
by an air knife placed close to the final soldering step. This
air knife will blow off exo::ess solder (still in the fluid stage)
which would otherwisE cause shorts (bridging) and solder
bumps.
Dual Wave
AQUEOUS CLEANING
• For volume production, a conveyorized system is often
used with a heated recirculating spray wash (water temperature 130'C), a final spray rinse (water temperature
45-55'C), and a hot (120'C) air/air-knife drying section.
• For low-volume production, the above cleaning can be
done manually, using several water rinses/tanks. Fastdrying solvents, like alcohols that are miscible with water,
are sometimes used to help the drying process.
• Neutralizing agents which will react with the corrosive materials in the flux and produce material readily soluble in
water may be used; the choice depends on the type of flux
used.
TLIF 18766-25
CONFORMAL COATING
Conformal coating is recommended for high-reliability PCBs
to provide insulation resistance, as well as protection
against contamination and degradation by moisture.
Requirements:
• Final rinse water should be free from chemicals which are
introduced to maintain the biological purity of the water.
These materials, mostly chlorides, are detrimental to the
assemblies cleaned because they introduce a fresh
amount of ionizable material.
• Complete coating over components and solder jOints.
• Thixotropic material which will not flow under the packages or fill voids, otherwise will introduce stress on solder
joints on expansion.
• Compatibility and possess excellent adhesion with PCB
material/ components.
• Silicones are recommended where permissible in
application.
7-21
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~ Semiconductor Appendix B
APPLICATION NOTE REFERENCED BY PART NUMBER
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APPLICATION NOTE
8-6
DEVICE NUMBER
APPLICATION NOTE
LM 150 ................................................................................. LB-46
LM 158 ................................................................................ AN-116
LM160 ................................................................................. AN-87
LM161 .........................................................................AN-87,AN-266
LM163 ................................................................................ AN-295
LM194 .........................................................................AN-222, LB-21
LM195 ................................................................................ AN-110
LM199 ................................................................ AN-161, AN-260, AN-360
LM199A .............................................................................. AN-161
LM211 ................................................................................. LB-39
LM216A ................................................................................ LB-37
LM231 ................................................................................AN-210
LM231A ..............................................................................AN-225
LM235 ................................................................................AN-225
LM239 ................................................................................. AN-74
LM258 ................................................................................AN-116
LM260 ................................................................................. AN-87
LM261 .................................................................................AN-87
LM301 A ............................................................... AN-178, AN-181, AN-222
LM304 ................................................................................. LB-40
LM308 ......................................... AN-88, AN-184, AN-272, LB-22, LB-28, Appendix D
LM308A ........................................................................AN-225, LB-24
LM309 ........................................................................AN-178, AN-182
LM311 ......................................... AN-41 , AN-1 03, AN-260, AN-263, AN-288, AN-294,
AN-295, AN-307, LB-12, LB-16, LB-18, LB-39
LM313 ................................................................................ AN-263
LM316 ................................................................................ AN-258
LM317 ................................................................... AN-178, LB-35, LB-46
LM317H ................................................................................ LB-47
LM318 .................................................................. AN-115, AN-299, LB-21
LM319 ................................................................ AN-115, AN-271, AN-293
LM320 ................................................................................ AN-288
LM321 ................................................................................. LB-24
LM324 ......................... AN-88, AN-258, AN-274, AN-284, AN-301, LB-44, AB-25, Appendix C
LM329 ................................................ AN-256, AN-263, AN-284, AN-295, AN-301
LM329B .............................................................................. AN-225
LM330 ................................................................................AN-301
LM331 ............ AN-21 0, AN-240, AN-265, AN-278, AN-285, AN-311, LB-45, Appendix, C Appendix D
LM331A ............................................................•...... AN-210, Appendix C
LM334 ......................................... , ...................... AN-242, AN-256, AN-284
LM335 ................................................................ AN-225, AN-263, AN-295
LM336 ................................................................ AN-202, AN-247, AN-258
LM337 ................................................................................. LB-46
LM338 ........................................................................... LB-49, LB-51
LM339 ................................................................. AN-74, AN-245, AN-274
LM340 ........................................................................ AN-1 03, AN-182
LM340L ............................................................................... AN-256
LM342 ................................................................................ AN-288
LM346 ......................................................................... AN-202, LB-54
LM347 ................................................................................. LB-44
LM348 ......................................................................... AN-202, LB-42
LM349 ................................................................................. LB-42
LM358 ............................. AN-116, AN-247, AN-271, AN-274, AN-284, AN-298, Appendix C
LM358A ........................................................................... Appendix D
8-7
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Appendix C
Summary of Commercial Reliability Programs
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Typical A + Flow is:
o SEM
General
National Semiconductor Commercial Reliability Programs
provide a broad range of off-the-shelf enhanced semiconductor products that supply an extra measure of quality and
reliability needed in high-stress or difficult to service applications.
o Assembly and Seal
• Four Hour 150°C Bake
o Five Temperature Cycles (O°C to + 100°C)
o High Temperature Electrical Test
National's A + and B + programs allow each individual customerto:
• Minimize the need for incoming electrical inspection
• Electrical Test
o Burn-In (160 hours at a minimum junction temperature of
125°C)
• Eliminate the need and associated costs of using independent testing laboratories
• DC Parametric and Function Tests
• Tightened Quality Control Inspection Plans
• Reduction in infant mortality rate
• Reduction in reworked board costs
• Reduction in warranty and service costs
Note: Certain products may follow slightly different process flows dictated
by specific capabilities and device characteristics, consult NSC.
P + Product Enhancement
A + Product Enhancement
The P+ product enhancement program applies to regulator
devices and offers an added advantage. P + involves a dynamic self-heating burn-in that tests the thermal shutdown
of the regulator. P + is proven more effective than the standard 125°C burn-in as an early screen for infant mortality
defects. It sharply reduces the cost of testing incoming components. Reliability Report L-140 further explains the P+
process. The following chart lists regulators which receive
P + prior to shipment and at no additional cost.
The A+ Product Enhancement incorporates the benefits of
the Multiple-Pass and Elevated Temperature along with
"BURN-lN."
The A + Program provides:
• 100% Temperature Cycling
• 100% Electrical Testing at Room and High Temperature
• 100% Burn-In Testing Combining Increased Temperature with Applied Voltage
• Acceptable Quality Levels Greater than Industry Norm
Package Types
Device
TO-3
TO-39H TO-220T TO-202 P TO-92Z
KSTEEL
LM109/309
X
X
LM117/317
X
X
LM117HV/317HV
X
X
X
X
X
X
X
X
X
X
X
LM120/320
X
LM123/323
X
LM137/337
X
X
LM137HV1337HV
X
X
LM138/338
X
LM140/340
X
LM145/345
X
LM150/250/350
X
LM196/396
X
X
LM2930/2935/2940/2984
X
LM2931
X
LM78XX
X
8-10
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Appelndix D
Mmtary Aerospace iPrograms
from Natiomal Semocol1lductor
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This appendix is intended to provide a brief overview of mili·
tary products available from National Semiconductor. For
further information, refer to our 1987 Reliability Handbook.
MIL-STD-883
Although originally intended to establish uniform test methods and procedures, Mll-STD-883 has also become the
general specification for non-JAN military product. Revision
C of this document defines the minimum requirements for a
device to be marked and advertised as 883-compliant. Included are design and construction criteria, documentation
controls, electrical and mechanical screening requirements,
and quality control procedures. Details can be found in paragraph 1.2.1 of Mll-STD-883.
National offers both 883 Class Band 883 Class S product.
The screening requirements for both classes of product are
outlined in Table III.
MIL-M-38510
The Mll-M-385tO Program, which is sometimes called the
JAN IC Program, is administered by the Defense Electronics
Supply Center (DESC). The purpose of this program is to
provide the military community with standardized products
that have been manufactured and screened to government-.
controlled specifications in government-certified facilities.
All 38510 manufacturers must be formally qualified and their
products listed on DESC's Qualified Products List (QPl) before devices can be marked and shipped as JAN product.
As with DESC specifications, a manufacturer is allowed to
use his standard electrical tests provided that all critical parameters are tested. Also, the electrical test parameters,
test conditions, test limits, and test temperatures must be
clearly documented. At National Semiconductor, this information is available via our RETS (Reliability Electrical Test
Specification Program). The RETS document is a complete
description of the electrical tests performed and is controlled by our QA department. Individual copies are available
upon request.
Some of National's older products are not completely compliant with MIL-STD-883 but are still required for use in military systems. These devices are screened to the same
stringent requirements as 883 product but are marked
"-Mil".
There are two processing levels specified within Mll-M38510: Classes Sand B. Class S is typically specified for
space flight applications, while Class B is used for aircraft
and ground systems. National is a major supplier of both
classes of devices. Screening requirements are outlined in
Table III.
Tables I and II explain the JAN device marking system.
Copies of Mll-M-38510, the QPl, and other related documents may be obtained from:
Naval Publications and Forms Center
5801 Tabor Avenue
Philadelphia, PA 19120
(212) 697-2179
DESC Specifications
Military Screening Program (iVlSP)
DESC specifications are issued to provide standardized.versions of devices which are not yet available as JAN product.
Mll-STD-883 Class B screening is coupled with tightly controlled electrical specifications which have been written to
allow a manufacturer to use his standard electrical tests. A
current listing of National's DESC specification offerings can
be obtained from our franchised distributors, sales offices,
or DESC. DESC is located in Dayton, Ohio.
National's Military Screening Program was developed to
make screened versions of advanced products such as gate
arrays and microprocessors available more quickly than is
possible for JAN and 883 devices. Through this program,
screened product is made available for prototypes and
breadboards prior to or during the JAN or 883 qualification
activities. MSP products receive the 100% screening of Table III but are not subjected to Group C and D quality conformance testing. Other criteria such as electrical testing
and temperature range will vary depending upon individual
device status and capability.
8-11
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TABLE I. The MIL-M-38510 Part Marking
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Lead Finish
A= Solder Dipped
[ B=Tln Plate
C= Gold Plate
X= Any lead finish above
Is acceptable
Device Package
(see Table II)
Screening Level
S. B. or C
Device Number on
Slash Sheet
' - - Slash Sheet Number
'-----For radiation hard devices
this slash is replaced by the
Radiation Hardness Assurance
Designator (M. D. R. or H per
paragraph 3.4.1.3 of MIL-M38510)
' - - - - - - MIL-M-38510
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(which may be applied only to
a fully conformant device per
paragraphs 3.6.2.1 and 3.6.7 of
MIL-M-38510)
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TABLE II. JAN Package Codes
38510
Package
Designation
A
B
C
D
E
F
G
H
I
J
K
L
M
N
P
Q
R
S
T
U
V
W
X
Y
Z
2
3
Microcircuit Industry
Description
14-Pin 1/4" X 1/4" (metal) flat pack
14-Pin 3/16" X 1/4" flat pack
14-Pin 114" X 3/4" dual-in-line
14-Pin 1/4" X 3/S" (ceramic) flat pack
16-Pin 1/4" X 3/S" dual-in-line
16-Pin 1/4" X3/S" (metal or ceramic)
flat pack
S-pin TO-99 can or header
10-pin 114" x 1/4" (metal) flat pack
10-pin TO-l00 can or header
24-pin 1/2" x 1-114" dual-in-line
24-pin 3/S" x 5/S" flat pack
24-pin 1/4" x 1-1/4" dual-in-line
12-pin TO-l 01 can or header
(Note 1)
S-pin 1/4" x 3/S" dual-in-line
40-pin 3/16" x 2-1/16" dual-in-line
20-pin 1/4" x 1-1/16" dual-in-line
20-pin 1/4" x 1/2" flat pack
(Note 1)
(Note 1)
lS-pin 3/S" x 15/16" dual-in-line
22-pin 3/S" x 1-1/S" dual-in-line
(Note 1)
(Note 1)
(Note 1)
20-terminal 0.350" x 0.350" chip carrier
2S-terminal 0.450" x 0.450" chip carrier
Note 1: These letters are assigned to packages by individual detail specifications and may be assigned to different packages in different specifications.
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TABLE 111.100% Screening Requirements
ClassS
Q.
ClassB
Screen
Method
Reqmt
Method
Reqmt
-
1.
Wafer Lot Acceptance
5007
All Lots
2.
Nondestructive Bond Pull
2023
100%
3.
Internal Visual (Note 1)
2010, Condition A
100%
2010, Condition B
100%
4.
Stabilization Bake
1008, Condition C,
24hrs. Min.
100%
1008, Condition C,
24 hrs. Min.
100%
5.
Temp. Cycling (Note 2)
1010, Condition C
100%
1010, Condition C
100%
6.
Constant Acceleration
2001, Condition E (Min.)
y 1 Orientation Only
100%
2001, Condition E, (Min.),
Y 1 Orientation Only
100%
7.
Visual Inspection (Note 3)
8.
Particle Impact Noise Detection (PIND)
2020, Condition A (Note 4)
100%
9.
Serialization
(Note 5)
100%
10.
Interim (Pre-Burn-In) Electrical
Parameters
Per Applicable Device
Specification (Note 13)
100%
Per Applicable Device
Specification (Note 6)
11.
Burn-In Test
1015
240 Hrs. @ 125°C Min.
(Cond. F Not Allowed)
100%
1015
160 Hrs.
Interim (Post-Burn-In) Electrical
Parameters
Per Applicable Device
Specification (Note 13)
100%
Reverse Bias Burn-In (Note 7)
1015; Test Condition A, C,
72 Hrs. @ 150°C Min.
(Cond. F Not Allowed)
100%
All Lots
12.
13.
100%
15.
PDA Calculation
5% Parametric (Note 14),
3% Functional -25°C
16.
Final Electrical Test
a) Static Tests
1) 25°C (Subgroup 1, Table I, 5005)
2) Max & Min Rated Operating Temp.
(Subgroups 2, 3, Table I, 5005)
b) Dynamic Tests & Switching Tests, 25°C
(Subgroups 4, 9, Table I, 5005)
c) Functional Test, 25°C
(Subgroup 7, Table I, 5005)
Per Applicable Device
Specification
8-13
~
s:
-
CD
g
-g
o
CD
"U
100%
100%
@
x·
125°C Min.
o
CC
D;
3
o-·
Ul
o
3
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CD
-
3
n·
o::J
Q.
5% Parametric (Note 14)
All Lots
c:
o
o
~
Per Applicable Device
Specification
100%
100%
100%
100%
100%
100%
100%
100%
TABLE 111.100% Screening Requirements (Continued)
Method
17.
ClassB
ClassS
Screen
Reqmt
100%, (Note 8)
Seal Fine, Gross
1014
18.
Radiographic (Note 10)
2012 Two Views
100%
19.
Qualification or Quality Conformance
Inspection Test Sample Selection
(Note 11)
Samp.
20.
External Visual (Note 12)
2009
100%
Method
1014
Reqmt
100%, (Note 9)
(Note 11)
Samp.
100%
Note 1: Unless otherwise specified, at the manufacturer's option, test samples for Group B, bond strength (Method 5005) may be randomly selected prior to or
following internal visual (Method 5004), prior to sealing provided all other specification requirements are satisfied (e.g. bond strength requirements shall apply to
each inspection lot, bond failures shall be counted even if the bond would have failed internal visual).
Note 2: For Class B devices, this test may be replaced with thermal shock method 1011, test condition A, minimum.
Note 3: At the manufacturer's option, visual inspection for catastrophic failures may be conducted after each of the thermal/mechanical screens, after the
sequence or after seal test. Catastrophic failures are defined as missing leads, broken packages, or lids off.
Note 4: The PIND test may be performed in any sequence after step 6 and prior to step 16. See MIL-M-38510, paragraph 4.6.3.
Note 5: Class S devices shall be serialized prior
to interim electrical parameter measurements.
Note 6: When specified, all devices shall be tested for those parameters requiring delta calculations.
Note 7: Reverse bias bum·in is a requirement only when specified in the applicable device specification. The order of performing bum·in and reverse bias bum-in
may be inverted.
Note 8: For Class S devices, Ihe seal lest may be performed in any sequence between step 16 and step 19, but il shall be performed after all shearing and forming
operations on the terminals.
Note 9: For Class B devices, Ihe fine and gross seal tests shall be performed separate or together in any sequence and order between step 6 and step 20 except
that they shall be performed after all shearing and forming operations on the terminals. When 100% seal screen cannot be performed after shearing and forming
(e.g. flatpacks and chip carriers) the seal screen shall be done 100% prior to these operations and a sample test (LTPD ~ 5) shall be performed on each
inspection lot following these operations. If the sample fails, 100% rescreening shall be required.
Note 10: The radiographic screen may be performed in any sequence after step 19.
Note 11: Samples shall be selected for testing in accordance with the specific device class and lot requirements of Method 5005
Note 12: External Visual shall be performed on the lot any time after step 19 and prior to shipment.
Note 13: Read and Record when past burn-in delta measurements are specified.
Note 14: PDA shall apply to all static, dynamic, functional, and switching measurements at either 25"C or maximum rated operating temperature.
8-14
J>
~
Military Analog Products Available From National Semiconductor
~
CD
Listed below are the military class B Analog devices available from National Semiconductor. Many of these are also available as
Class S product. Additional information including new product plans can be obtained from our sales offices.
Device Type
AHOO14D
AHOO15D
AHOO19D
LF111H
Mil'
ClassB
LF11331D
LF11332D
LF11333D
LF155AH
LF155H
LHOOO4H
LHOO20G
LHOO21K
LHOO22D
LHOO22H
LHOO23G
LHOO24H
LHOO62H
x
x
x
LHOO70-0H
LHOO70-1H
LHOO70-2H
x
x
x
LHOO75G
LHOO76G
LHOO82D
LHOO84D
x
x
x
LHOOO2H
LHOOO3H
LHOO62D
x
LF444MD
x
x
x
x
x
x
x
x
x
x
LHOO61K
LHOO63K
x
LF442MH
LHOO71-2H
LHOO53G
LF411W
LF412MH
x
LHOO52H
x
x
x
x
LF411MH
LHOO71-1H
LHOO44H
LF156W
LF198H
LHOO71-0H
LHOO42D
LF156J-8
LF157H
x
x
x
x
x
x
x
x
x
x
x
x
LHOO41G
x
x
LF157AH
LHOO44AH
LHOO38D
LF155W
LF156H
x
LHOO36G
LF155J-8
LF156AH
LHOO43G
LHOO33G
x
x
x
LHOO86D
LHOO91D
x
LHOO94D
x
x
x
x
x
x
x
x
ClassB
LHOO42H
LHOO33AG
x
x
x
Mil'
x
x
x
x
x
x
x
x
LHOO32G
x
x
LF147D
LF441MH
Device Type
JAN
x
x
x
x
x
LF11202D
LF11509D
Desc
x
x
x
x
LF11201D
LF11508D
883
ClassB
LHOO101AK
LH0101K
883
ClassB
x
8-15
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x
x
LH210BD
x
LH2110D
x
x
x
"
·Some older products are not completely compliant With MIL-STO-6S3 but are still required for use In military
systems. These devices are screened to the same
stringent requirements as BB3 product but are marked "-MIL",
Co
~
D)
LH2108AD
LH2111F
JAN
x
LH2101AD
LH2111D
Desc
::s
•
~
~
~
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's
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r-------------------------------------------------------------------------------------,
Military Analog Products Available From National Semiconductor
Listed below are the military class B Analog devices available from National Semiconductor. Many of these are also available as
Class S product. Additional information including new product plans can be obtained from our sales offices.
DevleeType
Mil'
883
ClassB
ClassB
'ii
c
LH24250F
o
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LM10H
X
z
LM101AH
X
E
LM101AJ-14
X
LM101AJ
X
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JAN
DevieeType
883
ClassB
Dese
x
x
LM117HVKSTL
x
x
X
LM117KSTEEL
x
x
X
LM118H
x
x
LM118J-8
x
x
x
LM118J
X
X
LM103H-3.0
X
X
LM118W
LM119H
LM103H-3.3
X
X
LM119J
LM103H-3.6
X
X
LM120H-12
LM103H-3.9
X
X
LM120H-15
LM104H
X
LM120H-5.0
LM105H
X
LM120K-12
LM106H
X
LM120K-15
LM107H
X
LM120K-5.0
LM107J-14
X
LM121AH
LM107J
X
LM121H
LM10BAH
X
X
LM122H
LM10BAJ-B
X
X
LM123KSTEEL
LM10BAJ
X
LM10BH
X
LM125H
LM10BJ-B
X
LM126H
LM10BJ
X
LM129AH
LM109H
X
LM129BH
LM109KSTEEL
X
LM131AH
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
LM11H
X
LM131H
x
LM110H
X
LM135H
LM110J-B
X
LM136AH-2.5
LM110J
X
LM136H-2.5
LM111H
X
LM111J
X
x
x
x
x
x
x
x
x
x
x
x
LM124AJ
LM124J
X
LM111W
X
LM136H-5.0
X
LM137H
X
LM137HVH
LM112H
X
LM113-1H
X
X
LM137HVKSTEEL
LM137KSTEEL
LM113-2H
X
X
LM13BKSTEEL
LM113H
X
X
LM117H
X
X
LM139AJ
LM139J
X
x
x
LM102H
LM10BAW
JAN
LM117HVH
X
LM101AW
Mil"
ClassB
..
x
x
x
x
x
x
x
x
x
'Some older products are not completely compliant with MIL·STD-BB3 but are still requIred for use In military systems. These deVices are screened to the same
stringent requirements as BB3 product but are marked "·MIL".
B-16
»
'0
'0
CD
Military Analog Products Available From National Semiconductor
Listed below are the military class B Analog devices available from National Semiconductor. Many of these are also available as
Class S product. Additional information including new product plans can be obtained from our sales offices.
DevleeType
Mil'
883
ClassB
ClassB
Dese
Mil'
883
ClassB
ClassB
JAN
DevieeType
x
LM185H-1.2
x
Dese
JAN
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Co
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~
LM140AK-12
x
LM193AH
x
LM140AK-15
x
LM193H
x
x
s=
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LM140AK-5.0
x
LM193J-8
x
til
LM140K-12
x
LM193W
x
LM140K-15
x
LM194H
x
LM140K-5.0
x
LM195H
x
LM140LAH-12
x
LM195K
x
LM140LAH-15
x
LM199AH-20
x
til
LM140LAH-5.0
x
LM199AH
x
(;
LM143H
x
x
LM199H
x
LM144H
x
x
LM4250H
x
LM145K-5.0
x
LM4250J
x
LM145K-5.2
x
LM555H
x
LM146J
x
LM555J
x
LM148J
x
LM149J
x
LM139W
LM150KSTEEL
x
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LM567H
x
LM709AH
x
LM709H
x
LM1558H
x
LM710H
x
LM1558J
x
LM723H
x
LM158AH
x
LM723J
LM158AJ
x
LM725H
LM158H
x
LM733H
LM158J
x
LM741AJ-14
x
LM741AJ
x
x
o:l
Co
C
..
g,
o
x
x
x
LM160H
x
LM741H
x
LM160J-14
x
LM7415-14
x
LM160J
x
LM741J
x
x
x
LM161F
x
x
x
LM741W
LM161H
x
LM747H
x
LM161J
x
LM747J
x
LM185BXH-1.2
x
LM748H
x
LM185BYH-1.2
x
LM748J
..
x
'Some older products are not completely compliant with MIL-STD-883 but are still required for use In mllijary systems. These deVices are screened to the same
stringent requirements as 883 product but are marked"-Mil".
8-17
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LM1596H
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LM1536H
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LM556J
x
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~National
~ Semiconductor
CI)
~
Appendix E
Understanding Integrated Circuit
Package Power Capabilities
Il.
CI)
iu
~
·s
~
(3
"C
CI)
li!c:n
CI)
c
c:n
c
:g
c
C'CI
~
CI)
"C
c:
=»
~
><
:g
cCI)
c..
c..
1000k
:il
l:! 100k I--+--t--II--+--.IF--I
co
~
~
~
10k I--+--t--Ic---L:J!;-';-h.....-t
1k I--+-+--.A--:J.o!!"-I--l
~
ti
a:
::l
:3
Where: TJ
TA
100
10 1--:if.,..-t--II:b...tolF+--I
PD
0JA
if
60
90
120 150 1BO 210
~
~
~
~
TJ ~ TA + PD(OJA)
Die junction temperature
Ambient temperature in the vicinity device
Total power dissipation (in watts)
Thermal resistance junction-to-ambient
OJA, the thermal resistance from device junction-to-ambient
temperature, is measured and specified by the manufacturers of integrated circuits. National Semiconductor utilizes
special vehicles and methods to measure and monitor this
parameter. All circuit data sheets specify the thermal characteristics and capabilities of the packages available for a
given device under specific conditions-these package
power ratings directly relate to thermal resistance junctionto-ambient or 0JA'
Although National provides these thermal ratings, it is critical that the end user understand how to use these numbers
to improve thermal characteristics in the development of his
system using IC components.
JUNCTION TEMPERATURE (·C)
TLlH/9312-2
FIGURE 2. Failure Rate as a Function
of Junction Temperature
DEVICE THERMAL CAPABILITIES
There are many factors which affect the thermal capability
of an integrated circuit. To understand these we need to
understand the predominant paths for heat to transfer out of
the integrated circuit package. This is illustrated by Figures
3 and 4.
Figure 3 shows a cross-sectional view of an assembled integrated circuit mounted into a printed circuit board.
»
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S'
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CD
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Figure 4 is a flow chart showing how the heat generated at
the power source, the junctions of the integrated circuit
;::;:
(ii'
III
DEVICE LEAD
TL/H/9312-3
FIGURE 3. Integrated Circuit Soldered into a Printed Circuit Board (Cross-Sectional View)
DIE
JUNCTION
(ENERGY
SOURCE)
--to
DIE
~
DIE
ATIACH
PAD
r--+
PACKAGE
MATERIAL
--to
LEAD
FRAME
.........
PRINTED
CIRCUIT
BOARD
AIRALM
AROUND
PACKAGE
-+
AMBIENT
r--+
AMBIENT
TL/H/9312-4
FIGURE 4. Thermal Flow (Predominant Paths)
8-19
o
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to
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a..
CI)
en
to
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-...
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r---------------------------------------------------------------------------------,
DETERMINING DEVICE OPERATING
JUNCTION TEMPERATURE
The slope of the straight line between these two points is
minus the inversion of the thermal resistance. This is referred to as the derating factor.
From the above equation the method of determining actual
worst·case device operating junction temperature becomes
straightforward. Given a package thermal characteristic,
iJJA, worst-case ambient operating temperature, TA(max),
the only unknown parameter is device power dissipation,
PD. In calculating this parameter, the dissipation of the integrated circuit due to its own supply has to be considered,
the dissipation within the package due to the external load
must also be added. The power associated with the load in
a dynamic (switching) situation must also be considered.
For example, the power associated with an inductor or a
capacitor in a static versus dynamic (say, 1 MHz) condition
is significantly different.
Derating Factor
As mentioned, Figure 5 is a plot of the safe thermal operating area for a device in a 16-pin molded DIP. As long as the
intersection of a vertical line defining the maximum ambient
temperature (70°C in our previous example) and maximum
device package power (600 mW) remains below the maximum package thermal capability line the junction temperature will remain below 150°C-the limit for a molded package. If the intersection of ambient temperature and package
power fails on this line, the maximum junction temperature
will be 150°C. Any intersection that occurs above this line
will result in a junction temperature in excess of 150°C and
is not an appropriate operating condition.
The junction temperature of a device with a total package
power of 600 mW at 70°C in a package with a thermal resistance of 63°C/W is 108°C.
TJ = 70°C + (63°C/W) x (0.6W) = 108°C
1--+-+--1-
2.4
!.
MAXIMUM ALLOWABLE JUNCTION TEMPERATURES
~
~ 1.6
~ ,_
I
OPERATING"
~.
AR~
~ 0.8
~~
Po-600mW
25
r---r---r----
SlOPE=-iA, ......
~
~
POINT TA=700C'_-jI--3ll'ri_--j
I
I
~
OPERATING l
0.4
o
National Semiconductor has adopted these industry-wide
standards. For devices fabricated in a molded package, the
maximum allowable junction temperature is 150°C. For
these devices assembled in ceramic or cavity DIP packages, the maximum allowable junction temperature is
175°C. The numbers are different because of the differences in package types. The thermal strain associated with the
die package interface in a cavity package is much less than
that exhibited in a molded package where the integrated
circuit chip is in direct contact with the package material.
Let us use this new information and our thermal equation to
construct a graph which displays the safe thermal (power)
operating area for a given package type. Figure 5 is an example of such a graph. The end points of this graph are
easily determined. For a 16-pin molded package, the maximum allowable temperature is 150°C; at this point no power
dissipation is allowable. The power capability at 25°C is
1.98W as given by the following calculation:
MAXIMUM PAckAGE
THERMAL CAPABILITY
~ LINE
if
~ 12
~
16-PIN
PACKAGE
2.0 ~-+-+--t--+-+---j
z
What is an acceptable maximum operating junction temperature is in itself somewhat of a difficult question to answer.
Many companies have established their own standards
based on corporate policy. However, the semiconductor industry has developed some defacto standards based on the
device package type. These have been well accepted as
numbers that relate to reasonable (acceptable) device lifetimes, thus failure rates.
I
1---11---1~--t-MO~OEO
_
The next obvious question is, "how safe is 108°C?"
PD@ 25°C =
=
50
75 100 125 150
TEMPERATURE (OC)
175
TL/H/9312-5
FIGURE 5. Package Power Capability
vs Temperature
The thermal capabilities of all integrated circuits are expressed as a power capability at 25°C still air environment
with a given derating factor. This simply states, for every
degree of ambient temperature rise above 25°C, reduce the
package power capability stated by the derating factor
which is expressed in mWrC. For our example-a iJJA of
63°C/W relates to a derating factor of 15.9 mWrC.
FACTORS INFLUENCING PACKAGE
THERMAL RESISTANCE
As discussed earlier, improving any portion of the two primary thermal flow paths will result in an improvement in
overall thermal resistance junction-to-ambient. This section
discusses those components of thermal resistance that can
be influenced by the manufacturer of the integrated circuit. It
also discusses those factors in the overall thermal resistance that can be impacted by the end user of the integrated
circuit. Understanding these issues will go a long way in
understanding chip power capabilities and what can be
done to insure the best possible operating conditions and,
thus, best overall reliability.
TJ(max) - TA 150°C - 25°C
=
= 1.98W
(JJA
63°C/W
8-20
Die Size
110
Figure 6 shows a graph of our 16-pin DIP thermal resistance
as a function of integrated circuit die size. Clearly, as the
chip size increases the thermal resistance decreases-this
relates directly to having a larger area with which to dissipate a given power.
~-
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~iii
~~~
~ifi
..,~:!.
90
80
~~o
70
;i~C)
7§
..,~:2
"
AirFlow
When a high power situation exists and the ambient temperature cannot be reduced, the next best thing is to provide air
flow in the vicinity of the package. The graph of Figure 9
illustrates the impact this has on thermal resistance. This
graph plots the relative reduction in thermal resistance normalized to the still air condition for our 16-pin molded DIP.
The thermal ratings on National Semiconductor's interface
circuits data sheets relate to the still air environment.
2
3 4 5 6 78910
DIE SIZE IkMIL2)
Lead Frame Material
170
130
ls-PIN MOLDED DIP
-
~~o
90
..,~::!.
70
i~
A~
;
1.0
:a!
0.9
i!:
0.8
~
0.7
!.
~
'-KpVAR
•
I'
"'"
0.6
0.5
I I I
11LpiN
MOLDED ~Ci1E
DIE
fill'
lk MIL2
~J.J2
.,-;-t.
III
o
500
1000
AIR FLOW (LINEAR FEET/MINUTE)
TL/H/9312-9
FIGURE 9. Thermal Resistance vs Air Flow
c~
Other Factors
A number of other factors influence thermal resistance. The
most important of these is using thermal epoxy in mounting
ICs to the PC board and heat sinks. Generally these techniques are required only in the very highest of power applications.
Some confusion exists between the difference in thermal
resistance junction-to-ambient (llJAl and thermal resistance
junction-to-case (/lJcl. The best measure of actual junction
temperature is the junction-to·ambient number since nearly
all systems operate in an open air environment. The only
situation where thermal resistance junction-to-case is important is when the entire system is immersed in a thermal bath
and the environmental temperature is indeed the case temperature. This is only used in extreme cases and is the exception to the rule and, for this reason, is not addressed in
this application note.
50
1
1.1
:s:Ez
"-
-
:i~C)
~
i!5
~
~BOARD MOUNT-STILL AIR
"':IE
~cr:5
... 0;; 110
,,~
TL1H/9312-B
Figure 7 shows the influence of lead frame material (both
die attach and device pins) on thermal resistance. This
graph compares our same 16-pin DIP with a copper lead
frame, a Kovar lead frame, and finally an Alloy 42 type lead
frame-these are lead frame materials commonly used in
the industry. Obviously the thermal conductivity of the lead
frame material has a Significant impact in package power
capability. Molded interface circuits from National Semiconductor use the copper lead frame exclusively.
!2iiii
~OCKET
FIGURE 8. Thermal Resistance vs
Board or Socket Mount
TL/H/9312-6
:=ffi
'"
70
"'" .............
FIGURE 6. Thermal Resistance vs Ole Size
150
~ t:--... .....
3 4 5 6 7 8910
DIE SIZE (kMIL2)
50
1
~
60
60
.......z -....
80
I~
~iii
"':IE
~Cf5
... 0;;
90
Ci!~:c
::szC:;;
~!O
100
.......z -....
100
2
3 4 5 6 78910
DIE SIZE (kMIL2)
TL/H/9312-7
FIGURE 7. Thermal Resistance vs
Lead Frame Material
Board vs Socket Mount
One of the major paths of dissipating energy generated by
the integrated circuit is through the device leads. As a result
of this, the graph of Figure 8 comes as no surprise. This
compares the thermal resistance of our 16-pin package soldered into a printed circuit board (board mount) compared
to the same package placed in a socket (socket mount).
Adding a socket in the path between the PC board and the
device adds another stage in the thermal flow path, thus
increasing the overall thermal resistance. The thermal capabilities of National Semiconductor's interface circuits are
specified assuming board mount conditions. If the devices
are placed in a socket the thermal capabilities should be
reduced by approximately 5% to 10%.
8-21
•
NATIONAL SEMICONDUCTOR
PACKAGE CAPABILITIES
Figures 10 and 11 show composite plots of the thermal
characteristics of the most common package types in the
National Semiconductor Linear Circuits product family. Figure 10 is a composite of the copper lead frame molded
package. Figure 11 is a composite of the ceramic (cavity)
DIP using poly die attach. These graphs represent board
mount still air thermal capabilities. Another, and final, thermal resistance trend will be noticed in these graphs. As the
number of device pins increase in a DIP the thermal resistance decreases. Referring back to the thermal flow chart,
this trend should, by now, be obvious.
sheets reflect a 15% safety margin from the average numbers found in this application note. Insuring that total package power remains under a specified level will guarantee
that the maximum junction temperature will not exceed the
package maximum.
The package power ratings are specified as a maximum
power at 25'C ambient with an associated derating factor
for ambient temperatures above 25'C. It is easy to determine the power capability at an elevated temperature. The
power specified at 25'C should be reduced by the derating
factor for every degree of ambient temperature above 25'C.
For example, in a given product data sheet the following will
be found:
Maximum Power Dissipation' at 25'C
Cavity Package
1509 mW
Molded Package 1476 mW
RATINGS ON INTERFACE CIRCUITS DATA SHEETS
In conclusion, all National Semiconductor Linear Products
define power dissipation (thermal) capability. This information can be found in the Absolute Maximum Ratings section
of the data sheet. The thermal information shown in this
application note represents average data for characterization of the indicated package. Actual thermal resistance can
vary from ± 10% to ± 15% due to fluctuations in assembly
quality, die shape, die thickness, distribution of heat sources
on the die, etc. The numbers quoted in the linear data
• Derate cavity package at 10 mWI'C above 2S'C; derate molded package
at 11.8 mWI'C above 25'C.
If the molded package is used at a maximum ambient temperature of 70'C, the package power capability is 945 mW.
Po@70'C=1476mW-(11.8mWI'C)X(70'C-25'C)
= 945mW
Molded (N Package) DIP'
Copper Leadframe-HTP
Die Attach Board MountStili Air
130
Cavity (J Package) DIP'
Poly Die Attach Board
Mount-Stlll Air
r---.---,r-r-r-'-TT1n
2
2
3 4 5 6 7 8910
DIE SIZE (kMIL2)
'Packages from 8- to 20-pin 0.3 mil width
3
4 5 6 78910
DIE SIZE (kMIL')
'Packages from 8- to 20·pin 0.3 mil width
TL/H/9312-10
22-pin 0.4 mil width
TUH/9312-11
22-pin 0.4 mil width
24· to 40-pin 0.6 mil width
24- to 48-pin 0.6 mil width
FIGURE 10. Thermal Resistance vs Ole Size
vs Package Type (Molded Package)
FIGURE 11. Thermal Resistance vs Die Size
vs Package Type (Cavity Package)
DIE-SIZE (MIL2)
180
160
~
140
~
120
~...
.......
JUNE 1985
~1~~
.........
l'I..
,.......
....
SO- 8-N
~g:1:::
(WIOE
~
So-l4-N
So-l6-N
r....
--
80
60
lK
(NARROW
BODY)
So-20-W BODY)
:""'" ~
"'~ 100
5O-16-N
10K
~
SO-I4-W
SO-I6-W
SO-20-W
lOOK
8)A- THERMAL RESISTANCE FOR "SO" PACKAGES
(BOARD MOUNT)
TL/H/9312-12
FIGURE 12
8-22
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APPENDIX IF
How to Get the Right Information from a Data Sheet
Not All Data Sheets Are Created Alike, and False Assumptions Could Cost an Engineer Time and Money
By Robert A. Pease
When a new product arrives in the marketplace, it hopefully
will have a good, clear data sheet with it.
Every year, for the last 20 years, manufacturers have been
trying to explain, with varying success, why they do not mea·
sure the lin per se, even though they do guarantee it.
The data sheet can show the prospective user how to apply
the device, what performance specifications are guaranteed
and various typical applications and characteristics. If the
data·sheet writer has done a good job, the user can decide
if the product will be valuable to him, exactly how well it will
be of use to him and what precautions to take to avoid
problems.
In other cases, the manufacturer may specify a test that can
be made only on the die as it is probed on the wafer, but
cannot be tested after the die is packaged because that
signal is not accessible any longer. To avoid frustrating and
confusing the customer, some manufacturers are establish·
ing two classes of guaranteed specifications:
o The tested limit represents a test that cannot be doubt·
SPECIFICATIONS
ed, one that is actually performed directly on 100 percent
of the devices, 100 percent of the time.
o The design limit covers other tests that may be indirect,
implicit or simply guaranteed by the inherent design of
the device, and is unlikely to cause a failure rate (on that
test), even as high as one part per thousand.
The most important area of a data sheet specifies the char·
acteristics that are guaranteed-and the test conditions that
apply when the tests are done. Ideally, all specifications that
the users will need will be spelled out clearly. If the product
is similar to existing products, one can expect the data
sheet to have a format similar to other devices.
Why was this distinction made? Not just because customers
wanted to know which specifications were guaranteed by
testing, but because the quality·assurance group insisted
that it was essential to separate the tested guarantees from
the design limits so that the AQL (assurance·quality level)
could be improved from 0.1 percent to down below
100 ppm.
But, if there are significant changes and improvements that
nobody has seen before, then the writer must clarify what is
meant by each specification. Definitions of new phrases or
characteristics may even have to be added as an appendix.
For example, when fast·settling operational amplifiers were
first introduced, some manufacturers defined settling time
as the time after slewing before the output finally enters and
stays within the error·band; but other manufacturers includ·
ed the slewing time in their definition. Because both groups
made their definitions clear, the user was unlikely to be con·
fused or misled.
Some data sheets guarantee characteristics that are quite
expensive and difficult to test (even harder than noise) such
as long·term drift (20 ppm or 50 ppm over 1,000 hours).
The data sheet may not tell the reader if it is measured,
tested or estimated. One manufacturer may perform a 100·
percent test, while another states, "Guaranteed by sample
testing." This is not a very comforting assurance that a part
is good, especially in a critical case where only a long·term
test can prove if the device did meet the manufacturer's
specification. If in doubt, question the manufacturer.
However, the reader ought to be on the alert. In a few cas·
es, the data·sheet writer is playing a specsmanship game,
and is trying to show an inferior (to some users) aspect of a
product in a light that makes it look superior (which it may
be, to a couple of users).
GUARANTEES
TYPICALS
When a data sheet specifies a guaranteed minimum value,
what does it mean? An assumption might be made that the
manufacturer has actually tested that specification and has
great confidence that no part could fail that test and still be
shipped. Yet that is not always the case.
Next to a guaranteed specification, there is likely to be an·
other in a column labeled "typical".
It might mean that the manufacturer once actually saw one
part as good as that. It could indicate that half the parts are
better than that specification, and half will be worse. But it is
equally likely to mean that, five years ago, half the parts
were better and half worse. It could easily signify that a few
parts might be slightly better, and a few parts a lot worse;
after all, if the noise of an amplifier is extremely close to the
theoretical limit, one cannot expect to find anything much
better than that, but there will always be a few noisy ones.
For instance, in the early days of op amps (20 years ago),
the differential·input impedance might have been guaranteed at 1 MO.-but the manufacturer obviously did not mea·
sure the impedance. When a customer insisted, "I have to
know how you measure this impedance," it had to be ex·
plained that the impedance was not measured, but that the
base current was. The correlation between Ib and lin per·
mitted the substitution of this simple dc test for a rather
messy, noisy, hard·to·interpret test.
If the specification of interest happens to be the bias current
(Ib) of an op amp, a user can expect broad variations. For
example, if the specification is 200 nA maximum, there
might be many parts where Ib is 40 nA on one batch (where
the beta is high), and a month later, many parts where the Ib
is 140 nA when the beta is low.
Reprinted by permission from Electronic Engineering Times.
8·23
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Absolute Maximum Ratings (Note 11)
Lead Temp. (Soldering, 4 seconds)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
+35Vto -0.2V
Output Voltage
+6Vto -1.0V
Output Current
10mA
- 76'F to + 356'F
TO-92 Package
- 76'F to + 300'F
+300'C
TO-92 Package
+ 260'C
Specified Operating Temp. Range (Note 2)
TMINto TMAX
-50'Fto +300'F
LM34, LM34A
Storage Temperature,
TO-46 Package
*
TO-46 Package
LM34C, LM34CA
-40'Fto +230'F
LM34D
+ 32'Fto +212'F
DC Electrical Characteristics (Note 1, Note 6)
LM34CA
LM34A
Parameter
Conditions
Typical
Tested
Limit
(Note 4)
+77'F
O'F
TMAX
TMIN
±0.4
±0.6
±0.8
±0.8
Nonlinearity (Note 8)
TMIN ,;; TA';; TMAX
±0.35
Sensor Gain
(Average Slope)
TMIN ,;; TA';; TMAX
+10.0
+9.9,
+10.1
Load Regulation
(Note 3)
TA = +77'F
TMIN';; TA ,;; TMAX
0,;; IL';; 1 rnA
±0.4
±0.5
±1.0
Line Regulation (Note 3)
TA = +77'F
5V,;; Vs';; 30V
±0.01
±0.02
±0.05
75
131
76
132
90
Accuracy (Note 7)
Quiescent Current
(Note 9)
Change of Quiescent
Current (Note 3)
TA
TA
TA
TA
Vs
Vs
Vs
Vs
=
=
=
=
=
=
=
=
+5V, +77'F
+5V
+30V, +77'F
+30V
4V ,;; Vs ,;; 30V, + 77'F
5V,;; Vs';; 30V
Temperature Coefficient
of Quiescent Current
Design
Limit
(Note 5)
±1.0
Typical
±0.4
±0.6
±0.8
±0.8
±2.0
±2.0
±0.7
Tested
Limit
(Note 4)
±1.0
±2.0
±2.0
±3.0
'F
+10.0
+9.9,
+10.1
mVI'F,min
mV/'F, max
±3.0
mV/mA
mVimA
±0.1
mVIV
mVIV
±1.0
±0.Q1
±0.02
±0.05
±0.1
90
163
75
116
76
117
3.0
0.5
1.0
+0.30
+0.5
+5.0
+0.5
+1.0
Minimum Temperature
for Rated Accuracy
In circuit of Figure 1,
IL = 0
+3.0
Long-Term Stability
Tj = T MAX for 1000 hours
±0.16
2.0
'F
'F
'F
'F
±0.6
±0.4
±0.5
92
Units
(Max)
±0.30
±3.0
160
Design
Limit
(Note 5)
142
/LA
/LA
/LA
/LA
3.0
/LA
/LA
+0.30
+0.5
/LAI'F
+3.0
+5.0
'F
±0.16
139
92
2.0
'F
Note 1: Unless otherwise noted, these specifications apply: -50"F ,; Tj ,; + 300"F for the LM34 and LM34A; -40"F ,; TJ ,; + 230"F for the LM34C and
LM34CA; and +32'F ,; Tj ,; + 212'Fforthe LM34D. Vs = +5 Vdc and JLOAD = 50".A in the circuit of Figure2; +6 Vdcfor LM34 and LM34A for 230'F'; Tj';
300"F. These specifications also apply from + 5'F to TMAX in the circuH of Figure 1.
Note 2: Thermal resistance of the T0-46 package is 292'F/W junction to ambient and 43'F/W junction to case. Thermal resistance of the TO·92 package is
324'F/W junction to ambient.
Note 3: Regulation is measured at constant junction temperature using pulse testing with a low duty cycle. Changes in output due to heating effects can be
computed by multiplying the internal dissipation by the thermal resistance.
Note 4: Tested limits are guaranteed and 100% tested in production.
Note 5: Design limits are guaranteed (but not 100% production tested) over the indicated temperature and supply voltage ranges. These IimH. are not used to
calculate outgoing qualHy levels.
Note 6: Specification in BOLDFACE TYPE apply over the full rated temparature range.
Note 7: Accuracy is defined as the error between the output voltage and 10 mVl'F times the device's case temperature at specified conditions of voltage, currant,
and temperature (expressed in OF).
Note 8: Nonlinearity is defined as the deviation of the output-voltage-versus·temperature curve from the best-fH straight line over the device's rated temperature
range.
Note 9: Quiescent current is defined in the circuit of Figure 1.
Note 10: Contact factory for availability of LM34CAZ.
**
Note 11: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical spacifications do not apply when
operating the device beyond its rated operating condHions (see Note 1).
8-24
r--------------------------------------------------------------------,~
Another example is the application hint for the LF156 family:
A Point-Sy-Point Look
"Exceeding the negative common-mode limit on either input
will cause a reversal of the phase to output and force the
amplifier output to the corresponding high or low state. Exceeding the negative common-mode limit on both inputs will
force the amplifier output to a high state. In neither case
does a latch occur, since raising the input back within the
common-mode range again puts the input stage and, thus
the amplifier, in a normal operating mode."
Let's look a little more closely at the data sheet of the National Semiconductor LM34, which happens to be a temperature sensor.
Note 1 lists the nominal test conditions and test circuits in
which all the characteristics are defined. Some additional
test conditions are listed in the column "Conditions", but
Note 1 helps minimize the clutter.
Note 2 gives the thermal impedance, (which may also be
shown in a chart or table).
That's the kind of information a manufacturer should really
give to a data-sheet reader because no one could ever
guess it.
Sometimes, a writer slips a quirk into a characteristic curve,
but it's wiser to draw attention to it with a line of text. This is
because it's better to make the user sad before one gets
started, rather than when one goes into production. Conversely, if a user is going to spend more than 10 minutes
using a new product, one ought to spend a full five minutes
reading the entire data sheet.
Note 3 warns that an output impedance test, if done with a
long pulse, could cause significant self-heating and thus,
error.
Note 6 is intended to show which specs apply at all rated
temperatures.
Note 7 is the definition of the "Accuracy" spec, and Note 8
the definition for non-linearity. Note 9 states in what test
circuit the quiescent current is defined. Note 10 indicates
that one model of the family may not be available at the time
of printing (but happens to be available now), and Note 11 is
the definition of Absolute Max Ratings.
• Note-the "4 seconds" soldering time is a new standard
for plastic packages.
•• Note-the wording of Note 11 has been revised-this is
the best wording we can devise, and we will use it on all
future datasheets.
FINE PRINT
What other fine print can be found on a data sheet? Sometimes the front page may be marked "advance" or "preliminary." Then on the back page, the fine print may say something such as:
"This data sheet contains preliminary limits and design
specifications. Supplemental information will be published
at a later date. The manufacturer reserves the right to make
changes in the products contained in this document in order
to improve design or performance and to supply the best
possible products. We also assume no responsibility for the
use of any circuits described herein, convey no license under any patent or other right and make no representation
that the circuits are free from patent infringement."
APPLICATIONS
Another important part of the data sheet is the applications
section. It indicates the novel and conventional ways to use
a device. Sometimes these applications are just little ideas
to tweak a reader's mind. After looking at a couple of applications, one can invent other ideas that are useful. Some
applications may be of no real interest or use.
In other cases, an application circuit may be the complete
definition of the system's performance; it can be the test
circuit in which the specification limits are defined, tested
and guaranteed. But, in all other instances, the performance
of a typical application circuit is not guaranteed, it is only
typical. In many circumstances, the performance may depend on external components and their precision and
matching. Some manufacturers have added a phrase to
their data sheets:
"Applications for any circuits contained in this document are
for illustration purposes only and the manufacturer makes
no representation or warranty that such applications will be
suitable for the use indicated without further testing or modification."
In the future, manufacturers may find it necessary to add
disclaimers of this kind to avoid disappointing users with
circuits that work well, much of the time, but cannot be easily guaranteed.
The applications section is also a good place to look for
advice on quirks-potential drawbacks or little details that
may not be so little when a user wants to know if a device
will actually deliver the expected performance.
For example, if a buffer can drive heavy loads and can handle fast Signals cleanly (at no load), the maker isn't dOing
anybody any favors if there is no mention that the distortion
goes sky-high if the rated load is applied.
In fact, after a device is released to the marketplace in a
preliminary status, the engineers love to make small improvements and upgrades in specifications and characteristics, and hate to degrade a specification from its first published value-but occasionally that is necessary.
Another item in the fine print is the manufacturer's telephone number. Usually it is best to refer questions to the
local sales representative or field-applications engineer, because they may know the answer or they may be best able
to put a questioner in touch with the right person at the
factory.
Occasionally, the factory's applications engineers have all
the information. Other times, they have to bring in product
engineers, test engineers or marketing people. And sometimes the answer can't be generated quickly-data have to
be gathered, opinions solidified or policies formulated before the manufacturer can answer the question. Still, the
telephone number is the key to getting the factory to help.
ORIGINS OF DATA SHEETS
Of course, historically, most data sheets for a class of products have been closely modeled on the data sheet of the
forerunner of that class. The first data sheet was copied to
make new versions.
That's the way it happened with the UA709 (the first monolithic op amp) and all its copies, as well as many other similar families of circuits.
8-25
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Even today, an attempt is made to build on the good things
learned from the past and add a few improvements when
necessary. But, it's important to have real improvements,
not just change for the sake of change.
WHEN TO WRITE DATA SHEETS
A new product becomes available. The applications engi·
neers start evaluating their application circuits and the test
engineers examine their production test equipment.
So, while it's not easy to get the format and everything in it
exactly right to please everybody, new data sheets are con·
tinually surfacing with new features, applications ideas,
specifications and aids for the user. And, if the users com·
plain loudly enough about misleading or inadequate data
sheets, they can help lead the way to change data sheets.
That's how many of today's improvements came aboutthrough customer demand.
But how can the users evaluate the new device? They have
to have a data sheet-which is still in the process of being
written. Every week, as the data sheet writer tries to polish
and refine the incipient data sheet, other engineers are re·
porting, "These spec limits and conditions have to be re·
vised," and, "Those application circuits don't work like we
thought they would; we'll have one running in a couple of
days." The marketing people insist that the data sheet must
be finalized and frozen right away so that they can start
printing copies to go out with evaluation samples.
These trying conditions may explain why data sheets always
seem to have been thrown together under panic conditions
and why they have so many rough spots. Users should be
aware of the conflicting requirements: Getting a data sheet
"as completely as possible" and "as accurately as possi·
ble" is compromised if one wants to get the data sheet "as
quickly as possible."
The reader should always question the manufacturer. What
are the alternatives? By not asking the right question, a mis·
understanding could arise; getting angry with the manufac·
turer is not to anyone's advantage.
Who writes data sheets? In some cases, a marketing per·
son does the actual writing and engineers do the checking.
In other companies, the engineer writes, while marketing
people and other engineers check. Sometimes, a commit·
tee seems to be doing the writing. None of these ways is
necessarily wrong.
For example, one approach might be: The original designer
of the product writes the data sheet (inside his head) at the
same time the product is designed. The concept here is, if
one can't find the proper ingredients for a data sheet-good
applications, convenient features for the user and nicely
tested specifications as the part is being designed-then
maybe it's not a very good product until all those ingredients
are completed. Thus, the collection of raw materials for a
good data sheet is an integral part of the design of a prod·
uct. The actual assembly of these materials is an art which
can take place later.
Robert Pease has been staff scientist at National Semicon·
ductor Corp., Santa Clara, Calif., for eleven years. He has
designed numerous op amps, data converters, voltage reg·
ulators and analog·circuit functions.
8·26
»
-0
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~National
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Appendix G
Obsolete Product Replacement Guide
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Some device types, individual temperature grades and package options have been discontinued. This guide is provided to help
design engineers select and specify an appropriate alternative.
Co
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NSC Part Number
ADB1200
DAC1200/1201
LF352
LF13300
LHOOO1
LHOOO5/LHOOO5A
LHOO37
LH0132
LH2011
LH2201A
LH2208
LH2208A
LH24250
LM170/270/370
LM171 /271 /371
LM172/272/372
LM173/273/373
LM174/274/374
LM175/275/375
LM216/316
LM388N-2/N-3
LM377N
LM378N
LM379
LM1014
LM1017
LM1019
LM1821S
Replacement
ADC3711
DAC1265
LM3631
ADC3711
LM4250
LHOOO3
LHOO36
LHOO32
LM11
LM201A
LM208
LM208A
LM11
LM13600N
no replacement
no replacement
no replacement
no replacement
no replacement
LM11
LM388N-1
LM2877P
LM2878P
LM2879T
no replacement
no replacement
no replacement
LM1823
Note
NSC Part Number
2
2
2
2
2
2
3
2
2
2
2
2
2
2
LM1822
LM1828
LM1848
LM1877N-1/N-2/N-3
LM2003
LM2808
LM2831
LM3011
LM3064
LM3075
TBA120V
TBA440C
TBA51 0
TBA530
TBA540
TBA560C
TBA920
TBA950-2
TBA970
TBA990
TDA440
TDA2522/23
TDA2530
TDA2530/31
TDA2540/41
TDA2560
TDA2590
TDA3500
2
2
3
3
3
2
Replacement
LM1823
no replacement
no replacement
LM1877N-9
no replacement
no replacement
LM1851
no replacement
no replacement
no replacement
no replacement
LM1823
no replacement
no replacement
no replacement
no replacement
no replacement
no replacement
no replacement
no replacement
no replacement
no replacement
no replacement
no replacement
no replacement
no replacement
no replacement
no replacement
Note 1: IMPROVED REPLACEMENT: Pin for Pin replacement with superior electrical specifications.
Note 2: FUNCTIONAL REPLACEMENT: Consult datasheet to determine suitability of the replacement for specific application.
Note 3: SIMILAR DEVICE with superior performance: Consult datasheet to determine suitability 01 the replacement for specific application.
8-27
Note
3
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r-----------------------------------------------------------------------------,
~National
~ Semiconductor
All dimensions are in inches (millimeters)
8 Lead Hermetic Dual-In-Line Package (D)
NS Package Number D08e
~
B
0.540
(13.716)~
MAX
1
B
5
1
0.298
(7.569)
MAX
1-11!!~=--=""""'=--=,.....q.a~
I .,.
PIN NO.
IDENT
2
3
•
I--- 0.485,_
(1~!~9)
0.054
(1.372)
.....-_______-1-1--. TVP
II
0.020-0.060
(0.508-1.524)
j
0.008-0.015
(0.203-0.381 )
I
I
0.300
1-(7.620)REF
0.100.0.010 ~
(2.540 ,0.254)
0.125
(3.175)
MIN
D08CiREVC)
14 Lead Hermetic Dual-In-Line Package (D)
NS Package Number D14E
PIN NO.1
IDENT
~
~
T
0.008-0.015
(0.203-0.381)
I 0.300 I
I-- (7.820)---1
REF
D14E(REVE)
8·28
.-----------------------------------------------------------------------------.~
::J'
14 Lead Hybrid Metal Can Dual-In-Line Package (D)
NS Package Number D14F
~
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14
13
12
11
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0.500±0.010
L -_ __ _2___
__
~ 0.080
(2.032)
RAD
TVP
I•
I
0.800±0.010
(20.32±0.254) -
1-
~ ~ ~ ~ ~ ~ ~ I (~i:) II
--ibO.020~ ~o T~50 J
M:X
(0.381-0.508)
TVP
(2.540)
t
~~J::;;:===:::::::;:r=!=~!~
1
f
0.420±0.010
(10.67±0.254)
(3.810)
~ 1
(:::~!~~::::)
0.300±0.0;;-11=
(7.62±0.254)
D14F(REVA)
16 Lead Hermetic Dual-In-Line Package (D)
NS Package Number D16C
C!iii(20~~:7~)-=-:l
Ii2l
t
>
MAX
16
15
14
11
10
9
0.270-0.305
(6.858-7.747)
PIN NO.1
IDENT----;'"
rr-
~
Wl!l1.Il.!Jl!.IL!.J2.Jl!J
0.005
(0.127)
~
MIN~
0.485
(12.319)
MAX
1
0.050 ±0.005
0180
(1.270 ±0.127) TVP -'-(4.572)
MAX
11-I
R::~:)~~
1....1
JL
0.290-0.320
(7.366-8.128)
0.080:J
(2.032)
MAX TVP
0.020-0.060
\
(0.508~ 1.524)
-11---------+----+
0.015-0.023
(0.381-0.584)
0.100 to.Ol0
(2.540 ±0.254)
(0.100/(2.540) BSC
TVP REL TO LEADS
1 AND 16)
8-29
0.125-0.200
(3.175-5.080)
0.150
(3.810)
MIN
016C(REVH)
o
C
o
'iii
c
CP
E
C
"iii
u
'~
.c
Q.
r---------------------------------------------------------------------------------,
16 Lead Hybrid Metal Can Dual-In-Line Package (D)
NS Package Number 0160
If
0.500±0.010 ~
(12.70 ±0.2541
OA20±0.010
\"(10.668 ±0.254r
0.200
(5.0801 MAX
I
l
0.015-0.020
(0.381-0.5081 TVP
0.300±0.010
(7.620 ±02541
L
~
MIN
(4.8261
h --j
~h
~
0.015-0.020
0.100
(2.5401 TVP
(0.381-0.5081 DIA
0.150
(3.8101
--MAX
-~~-!
1
r
I
0.420
(10
"
0.500 '0.010
l
(12.70 r.2541
t
2 L___
' - - 0.080
(2.0321 R TVP
D16D(REVB)
24 Lead Hybrid Sidebrazed Dual-In-Line Package (D)
NS Package Number 0240
24
./
(1.524)
0.060
23
22
21
20
1295
(32.891
MAX
1.263
(32.08)
MAX
19 18
~
17
16
15
14
13
~I
.l
P'!
---71
(15.36
,1
MAX
RAO
OPTIONAL
9
10
11
12
~
0.005
(0.127)
MIN
0.010~~·:
H
J:
l
---'-~0600+0.015~
I (0.254
~~:~:)..:..--=.!!:!!!
(1524 +0.381)
. -0.254
SEATING--=~
PLANE
....... .r""'\"I""'I......,.r... .r""'\"I""'I......,........ I""'\,,1""'\,
I
0.100±0.010 . .
(2.540 ±0.254)
PIN NO.1
TYP
~
IDENTlACATION
ON BRAZE PAD
(OPTIONAl)
D24D(REVF)
8-30
24 Lead (Hybrid Bottom Brazed) Hermetic Dual-In-Line Package (D)
NS Package Number D24J
1 ··-----------(~~~~~~7)----------~~
n
m w w n
"
MAX
r
M
H
~
:I
4
~
U
~
11
12
O.BOO
ii03ii
I
PJN 11
0.035
PIN "
IDENT
I~r)
1
2
Ii
15
7
8
•
10
10ENT
F
I
1r;=~===========l7.BD
,..,
r
~
I--~:::::
MAX
_
TVP
~u~;:
I
~D~H::::
~---------~I~~~:~)·--------~
NOM
20 Leadless Chip Carrier, Type C (E)
NS Package Number E20A
0.200±0.005
o ,I
t
0.350±0.DOS
I
(i:i9iiToTo3j-
-I
I-~
,u-,.
MINTYP
+""""
~., UJ.I U U~
----L..J--?W
~J
L
11.959-2.362)
0.045-0.055
11.143-1.397)
TYP
LOETAILA
TopVlaw
(:.: :) J"< T~ --I //~-0.219)
~::':1:::~::::~~)
iITaffii27i
CJ
Cl
L
plN #1
~
INDEX
C __
J- ~ 0 0 0 0
0.067-0.083
1
11.702-2.10B)TVP
Sid_View
450)(
v:
R P
0022_0 O::
~LrO.559-0.711)
TVP
~ t ~
I
~
t
0.045-0.055
11.143-1.397)
TVP
O.040±O.010
11.016 ±0.254)
3PLCS
Bottom View
.!!!!!.
0.003
10076)
r-10.3B1)
MINTY~ MAXTYP
0.022"
"T
"T'"
MAX TYP
10.152)
MIN TYP
Detail A
I:.20AIR£V01
8·31
o ,---------------------------------------------------------------------------------,
C
o
'iii
c
CP
48 Pin Chip Carrier, Type C (E)
NS Package Number E48A
E
is
0.003
(0,0161
MIN TYP
fti
u
0.015
(i:3i1j
MAX TVP
t-W!i--{
~
a.
j':::J
SEE DETAIL "A"
_/
I::~:) RTYP
3 PlACES
BonUM VI£W
TQPVIEW
12 Lead (0.400" Square Pattern) Metal Can Package (G)
NS Package Number G 128
0.148-0.181
-4.597)
~
0545 0555
-(13:843=14.o!li~
0.030
01A
(iTs2j
1
- -
-
-1-+
-
0.030
(0.762)
MAlI
o.500
(
12.70)
MIN
L
UNCONTROLlfD
LEAD 01A
I-
0.016-0.019
i+- ~
orA TYP
a128(AEVCj
8-32
-.JI
DETAIL "A"
MINTYP
~MAXTYP
1.....1
"'D
3 Lead (0.200" Diameter P.C.) Metal Can Package (H)
NS Package Number H03A
1
~
(4.191-4.699)
I
0.350-0.370
-(8.8-90--9-.3-98) DlA
1~ I
I
I
IIf!11,pn=i~
(8.001-11.509)
DIAiI
0.500
(12.70)
~
Mt
I
~
c
3'
CD
::::I
m,
0.050
(1.270)
o::::I
!
MAX
MAX
[~
UNCDNTRDLLED
(0.635) LEAD
DIA
~
...--+__ _
SEATING PLANEl
:::r
';i
0.016-0.019
'-~)
en
DIATVP
H03A{REV8)
3 Lead (0.200" Diameter P.C.) TO-39 Metal Can Package (H).
NS Package Number H03B
~II-
(:::==:::~)
0.240 - 0.260
(6.096 - 6.604)
OIA
0.315 -0.335
(8.00101:.509)
1
(~:~:)Q
MLAX
T
0.500
~
-
~
-
~
I r SEATING
.lL. PLANE
l
0.025 MAX UNCONTROLLED
(0.635) LEAP PIA
--11-- (0.406-0.483)
0.016-0.019 PIA TVP
8-33
•
o ,---------------------------------------------------------------------------------,
C
o
'US
cCI)
E
is
1j
'~
.c
a.
8 Lead (0.230" Diameter P.C.) M.etalCan Package (H)
NS Package Number H08A
(::::D~A:::::)
0.165-0.185
F1
0.315-0.335
(8.001 8.509)
l~
(4.191-4.699)
~
REFERENCE PLANE - - 0.040
O.~O
-tT
iL
t
(l~P) (~~) nn n nn
,
D~~015_0.040
l..- (0.381-1.016)
SEATING PLANE
~~~~;~CONTROLLED
L
UU U U~
0.225 -0.235 --j-oI!-----I~
(5.715-5.969)
DIAPC
0.016-0.019
(D.406 - 0.483)
DIA TYP
LEAD DIA
0.115-0.145
(2.921-3.683)
DIA
45°TYP
HOBA(REVCl
8 Lead (0.230" Diameter P.C.) Metal Can Package (H)
NS Package Number H08B
.
0.350 - 0.370
(8.890 - 9.398)
DIA
0.180-0.210
(4.572-5.334)
L
0.500
~
0.305-0.335
(7.747-8.509)
DIA
~
roo (~~~) ~~ ~. ~~
.
--11-- 0.015 - 0.019 DIA TVP
0.225 _ 0.235
(0.381 - 0.483)
HOBB(REVA)
8-34
r-----------------------------------------------------------------------------,
8 Lead (0.200" Diameter P.C.) TO-99 Metal Can Package (H)
NS Package Number H08C
~
::r
'<
til
0"
!!!.
c
3"
(II
0.315-0.335 OIA
(8.001-B.509)
::I
!!!"
o
::I
til
0.165-0.185
(4.191-4.699)
REFERENCE PLANE -+-.,--
0.100
(2.540) TYP
0.195-0.205 OIA
1----* (4.953-5.207)
P.C.
H08C(REV E)
8 Lead (0.230" Diameter P.C.) Metal Can Package (H)
NS Package Number H08D
0.350-0.370
(8.B9-9.40)-r--------~
OIA
0.165-0.185
(4.191-4.699)
1------1+-t----t
0.315 - 0.335
(8.001-8.509)
OIA
REFERENCE PLANE
0.025
- - - - - - - - - (0.635)
MAX UNCONTROUEO
LEAO OIA
0.225-0.235
(5.715-5.969)
OIA PC
HOBD(AEVA)
8-35
o .---------------------------------------------------------------------------------,
c
.2
10 Lead (0.230" Diameter P.C.) TO-100 Metal Can Package (H)
o
c
NS
Package Number H 1OC
CP
E
is
B
.~
.c
a..
0.350 -0.370
(8.890 - 9.398)
DIA
0.165-0.185
(4.191-4.699)
~____~
r
0.315-0.335
(8.001-8.509)1
DIA
r
MU
~
ill rn
.025 UNCONTROLLED
(0.635) LEAD DIA
-t-__L
-,--_
0.500
0.035
,
(12.70) (0.889)
MIN
MU
-
-
-
---'-REFERENCE PLANE
-SEATING PLANE
~ ~
0.015-0.040
(0.381-1.016)
I.-
0.016-0.019 DIA TVP.J
(0.406 - 0.483)
~
~
0.028-0.034
(0.711-0.864)
36·
TVP
0.D29-0.045
(0.737-1.143)
H1OC{REVEl
10 Lead (0.230" Diameter P.C.) Metal Can Package (H)
NS Package Number H 1OF
0.155-0.185
(3.937-4.699)
~t (::!::=::~~:)~
1
0.315-0.335
(8.001-8.509)
(0.889)
0.035Q
MAX
~
SEATING
1PLANE
0.500
(1~f
m~ ~m
0.015-0.019 DIA TVP--1l-(0.381-0.483)
$./
~ 0.026-0.034
36·
TVP
(0.661-0.864)
0.029-0.045
(0.737-1.143)
P.C.
H10FcREVAj
8-36
10 Lead (0.230" Diameter P.C.) Metal Can Package (H)
NS Package Number H 1OG
H100!REV B\
8 Lead Dual-In-Line Hybrid Package (J)
NS Package Number HY08A
1r
0.B90±0.009
122.61±0.229)1l
0.470 +0.005
rll1.94±D.I27)1
LID
0.100
121~0)
t
t
0.490±0.OO5
(12.45±0.127)
2
EPOXY SEALANT
0.130±0.OD5
ALL AROUND
::;;~'3=02=i=0='I27=)=~~=~===::;:===~~(~:::~!~:~~:)
f
0.030±0.OO4
~~±~~
BERG LEADS
/
I......1 - - - - D.900±0.010
I~
- - - - - - l...1
(22.B6±0.254)
T
0.125
(3.175)
~~
-l I..-
0.IDO±D.Ol0
12.540±0.254)
TYP
MIN
HY08A (REV BI
8-37
o
C
o
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c
GI
E
is
r---------------------------------------------------------------------------------,
8 Lead Ceramic Dual-In-Line Package (J)
NS Package Number J08A
t
"ii
u
"~
.c
8
0.025
(0.635) RAO
D.
(100~0:0)j
MAX
7
6
5
Ii
0.310 MAX GLASS
(7.874)
0.220 -0.291
(5.558-7.391)
'r:-rT::'T""'1r.r-r:'T'C~
4 ' \ 0.010
(0.254)
RAO TYP
__I
0.290-0.320
1'-
I::~~t.iT~\
0.ODB-0.012+
(0.203-0.305) . .
TYP
.....\
~ MIN
(0.381)
--1'-
0.200
(5.080)
MAX
4~~~~;:~-~------tl
0.150
(3.810)
MIN
GLASS ..
SEALANT
...
90'±4'
95'±5'
\1\1
I] 1\
TYPj"
0.310-0.410
(7.874-10.41)
I
I-'
0.055
(1.~9I~
0.018±0.Ooa 0.125-0.200
~ ... (0.457±0.076) (3.175-5.080)
0.10~!PO.Ol0
BOTH ENDS
... (2.540±0.254) TYP
J08ACREVJl
14 Lead Ceramic Dual-In-Line Package (J)
NS Package Number J 14A
0.785
t------(19.939)----.·~1
MAX
0.025
(0.635)
f0.220-0.310
RAD
(5.588-7.874)
'-r:-r"'T"::"T"T~"'T":'TT:"'I'""1";'1'''''''~
0.060 ±0.005
L
0.018 ±0.003
(0.457 ±0.076)
0.100 ±0.010
(2.540 ±0.254)
8-38
-11-
0.125-0.200
(3.175-5.080)
0.150
(3.81)
MIN
J14A (REV G)
16 Lead Ceramic Dual-In-Line Package (J)
NS Package Number J 16A
0.785
---j
~(19.939\ 1m IiiI mI
15
0.025
(0.635)
14
MAX
13 12
11
10
9
-r
0.220-0.310
(5.588-7.874)
HAO
'"r.rT"::"T""T"::'T""T":T"T~""I":T'T::T"'..~
0.005-0.020
(0.127-0.508)
RAOTYP
....::::l.
I
~~J(7.366_8.128)
0.290-0.320
0.180
(~~)
I
-l
95'±5'
I
0.310-0.410
(7.874 -10.41)
0.005
0.200
--l r--
(5M~~)
~ ~~~~~~~~~~~.:=~t--+---L
0.008-0.012
(0.203-o.~~~
I--
J
(2.:~
80TH
ENDS
JI6A(REV K)
18 Lead Ceramic Dual-In-Line Package (J)
NS Package Number J18A
(~::) HAD MAX
0.200 MAX
(5.080)
0.020-0.060
(0.508-1.524)
0.125-0.200
(3.175-5.080)
- I 0.290-0.320 I-I (7.366-8.128) I
r:~GLASSSEALANT
..!!J!!!..tll
(45n
MAX)
j
95' ± 5'
0.310 - 0.410
(7.174 -10.41)
L
0.008-0.012
(0.203 - 0.305)
88'94'
TYP
L
o.I00±o.Olo
(2.540 ± 0.254)
0.011±0.003 TYP
(0.457 ± 0.076)
JP
LJ
0.091
(2.489)
MAX
80TH ENDS
J1BA(REVl)
8-39
o
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2 Lead TO-3 Aluminum Metal Can Package (K or KC)
NS Package Number KC02A
£
.940_0.980
(23.11- 24.89)
1j
0.800-0.115
(20.32 - 20. 70
l
DIA
0.107-0.123
DIA
(2'7'1-3"24J)~
(:::::)
UNCONTROLLED LEAD DIA
0.250-0.350
(6.350 8.890)
H-----''-
t f
.
0.135
(3.429)
SEATING PLANE t
t
(~1~=~3~:)
t
MAX
0.420 -0.440
(10.87 -11.11)
0.151-0.181
(3.835-4.089)
DlATYP
0.165-0.179
(4.191 -4.547)
RTYP
0.210-0.220
(5.334-5.581)
1.177-1.187
(29.90-30.40)
KC02A(REVC)
2 Lead TO-3 Metal Can Package (K)
NS Package Number K02A
0.980-0.915
(22.35 - 23.241
OIA
rr-
0.780-0.775 DlA
(19.304 -19.815)
0.080-0.070
(1.524-1.778)
0.325-8.352
(8.255-8.941)
8.420-0.4811
(10.181-12.192)
L1.
I
l--,jdg=:;;::::::=:ELL:I:i:~f
--1
II
U
,
..:...--------11_
0.485-0.510
0.11.
i2.i4ii
0.038-0.043 .
DlAO~0_0.22O
(5.334-5.588)
0~
~
o -0.'5'-0.'.'
(3.835-4.089)
OIATYP
MAX
(0.965-1.092)
(12.5~2.954)
0.1&1-0.178
(4.2&7 -4.521)
RAOTYP
CEATINGPWE
0.425-8.435
(10.795-11.049)
0.&&0 -0.&70
(18.784-17.018)
IC02A lIllY FI
8-40
.-------------------------------------------------------------------------,~
::J'
2 Lead TO-3 Metal Can Package (K)
NS Package Number K02B
il
I
I
I
.J
~
c
0.810-0.915
(22.35-23.241
0025
(0.6351
MAXUNCONT ROLLED
LEAD DIA
0.325 - 0.350
(8.255 - 8.8901
0.420 - 0.480
(10.668 -12.1921
';j
II
I
I_____ U
...
-11_
0.490 _ 0.510
3'
0.760 - 0.775
(19 .304 - 19.&851
DIA
0.D60-0.070
~ (1.524-1.7781
~---1.
I
'TL..!:!!!.
0.058-e.083
(1.413-1.6001
(2.9461
MAX
(12.446 -12.9541
0.168 - 0.118
(4.261 - 4.5211
RAD
0.151 - 0.161
(3.835 - 4.0191
DIA
0.660 - 0.&10
(16.164 -11.0181
1.111-1.191
(29.895 - 30.4041
DIA
K02B{AEVG)
4 Lead TO-3 Metal Can Package (K)
NS Package Number K04A
0.325-0.350
iB.25s=i.i9i
t
~
0.168-0.178
(4.267 -4.5211 RAD
0.460 - 0.480
(11.68-12.191
. PIN
CIRCLE
0.151-0.161 DIA
(3.835 -4.0891
K04A(REVEI
8·41
CD
:::I
(II
0'
:::I
(II
o
C
o
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c
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r-----------------------------------------------------------------------------------~
8 Lead TO-3 Metal Can Package (K)
NS Package Number K08A
E
is
0.88D-O.9Z5 ~
(2Z.35-23.50)
B
l
0.760-0.775
(19.3114'-19.685) ~'-+l------I
0.OZ5 ~
(0.635)
0.345-0.395
. MAX
f
0.220-0l80
0.085-0.100
i5.5iB-1.i1ii
(2.11:
SEATING PLANE ,
.'
UNCONTROLLED (8.763-110.033)
11-_____L-jEA_D______-LI
1::
f
t
§7«-
I
--ll-~~
, O.!ZZ
ii.Ouii
(0.914-1.118)
TYP
,
MAX
OA90-o.S10
UZA46-12.954) ~
LEAD CIRCLE
0.166-0.178
~~===~~~~~-err_~==r_-~.ZI6~~1l
R
(Zx)
(Z9.896-30AD4)
K08AIRI!VC)
8 Lead (0.150" Wide) Small Outline Molded Package (M)
NS Package Number M08A
0.lB9-0.197
(4.800-5.004)
0.010-0.DZD X45
(0.254-0.506)
~
=
0.006-0.010
(0.Z03-0.254)
TYP AU LEADS
0Jl (r::~~~=::~!)
.~I
(0.102)
ALLlEAO TIPS
_
r.
80 MAX TYP
I. ~r
0.053-0.069
(1.346-1.753)
,
0.004-0.010
(0.10Z -O.Z54)
-*----~d~
L~I~TYP
t
f iIT56i
o.t
0.016-0.050
~~~L~gJ
0.050
(\r.,0)
J
SEATING
PlANE
~TYP
(0.203)
8-42
_
(0.355-0.508)
MOUA [REV H)
14 Lead (0.150" Wide) Small Outline Molded Package (M)
NS Package Number M14A
0.3J5-0.344
'-lo.509-0.73BI-1
- 11'4
13
12
11
10
9
B
0.22B -0.244
(5.791-6.19B)
JO"
(0
!~'
J
~Y:\
!;:;:=;:;::;n=:;:;::::r;r::::i:r=nl
LEAD NO.1
IDENT""'-_+_
1
--t
2
..!!!!!MAX
(0.254)
0.150-0.157
(3.Bl0-3.9BB) -
=1 r
~45"
10.254-0.50B) x
r~--Il
~aH
o.ooaC
(0.203-0.254)
TYP ALL LEADS
0.053 -0.069
(1.346-1.753)
B" MAX TYP
ALL LEADS
+
----rlJ
I -..I l!
Hl,
SEATING
PLANE
~
0.004
10.102)
ALL LEAD TIPS
0.004-0.010
•t
t f
0.014
(0.356)
(0.406 -1.270)
TYPALL LEADS
~
~J
(1.270)
TYP
- - 1
-
JL
-
(0.1020.254)
+
_ 1 1 : J - 0 . 0 2 0 TYP
(0.356 0.50B)
~TYP
(0.203)
Ml4A,REVI1I
14 Lead (0.300" Wide) Small Outline Molded Package (WM)
NS Package Number M 148
0.009-0.013
r (~:!::=~:~::)}
1
(0.229-0.330)
J!!!!...
x45°
t
(0.432)
B" MAX TYP
~~
t
t e??'??? ~
iiWUUJj[] tJli t
1]
t
(0.102-0.305)
t
(~::=~:~~)
~J JI_~
(0.102)
ALL LEAD
TIPS
0.093-0.104
(2.362 2.642)
0.050
(1.270)
TYP
(0.762 -1.270)
TYP ALL LEADS
L JL
SEATING
PLANE
~TYP
(0.356-0.4B3)
M1'B (REV 01
8-43
II
1/1
.a
C
;
E
16 Lead (0.150" Wide) Small Outline Molded Package (M)
NS Package Number M16A
C
~
.~
.c
a.
LEAD NO.1
IDENT
~ 45~ (r~:::~=~::)
(0.254-0.508)
x
L .J r
DJ:~ I
(0.203 -0.254)
TYP ALL lfADS
1)~
0.1153-0.069
(1.346-1.753)
8 0 MAX TYP
ALLlfADS
0.004 -0.010
~
+
+
r-J- L2D.050
J
(0.406-1.270)
TYP ALL lfADS
0.004
(0.102)
ALL LEAD TIPS
~t
L
J
LO.050J
(1.270)
SEATING
PLANE
~TYP
(0.356-0.508)
TYP
(~~~:) TYP
M16ArAEVH}
16 Lead (0.300" Wide) Small Outline Molded Package (WM)
NS Package Number M16B
~-------.
I
r.:-:(10.11-10. 50I
tI~
A~
13
12
11
10
9
)
0.394-0.419
(10.01-10.54)
nn
LEAD NO. 1
IDENT--.v~~;;:9fF:ff~~Fi~ft~
3
4
5
6
8---,
~MAX
(D.254)
(::~::=:::)-~
1
0.009-0.013
~
\---",=",..-......
~45'
(0.254-0.737) x
0.004
t
8' MAX TYP
TYPAL_tUM_S=~=;==""":F=o!.f"'9-=+S
(0.102)
ALL lfAOTIPS
0.093 -0.104
(IT62=mii
I~~
TYP
SEATING
PLANE
0.004-0.012
~~
t (:t::)
(0.406-1.270)
ALL LEADS
~(O.'02-0.305)
-
II~
~ (1.270)
TYP
8-44
JLJ
[J-O.020TYP
.!!!!l!TYP
(0.203)
(0.355-0.508)
Ml~B(REVEJ
"'D
::r
20 Lead (0.300" Wide) Small Outline Molded Package (M)
NS Package Number M20B
~
~
(;'
!2.
c
0.496-0.512 ~
(12.59B-13.005)
m a a u a
~
u
~
3'
CD
:::JI
n "
(II
0'
:::JI
(II
)
0.394-0.419
(10.001 -10.6(3)
tmrT~~~~~~~~~~~
LEAD NO.1
IDENT
2345678
I
10----r
.!!!!!!.MAX
(0.254)
0.010-0.029
(0.254-0.737) ••5
le
.r~:~~:~::)J
[
L.JH
O.ODlC
(0.229-0.330)
TVP ALL LEADS
---
~/
ALL LEAD TIPS
,
0.093 -0.104
(2.362-2.&.42)
1
IiL,
B'MAXTYP
ALL LEADS
I
0.0!.050
..... (0.406 -1.270)
TVP ALL LEADS
.
Jirn1rnii1iilrut:r:~NO
i (~·b -' L~
J 1_ O.M:-O.::YP
L
.
(1.270)
TYP
JL
(0.351-0.101)
..!!Ji!!!.TVP
(0.2031
M20BIREVf)
8 Lead Molded Dual-In-Line Package (N)
NS Package Number N08E
0.032±0.005~7
0.092
(2.337) DIA
(0.813±0.127)
RAD
PIN ND.lIDEIIT
PIN NO. llDENT
1
0.045±0.015
(i:i4iilliii
N08E(AEVFI
8-45
EI
o
C
o
.~
Q)
.-------------------------------------------------------------------------------~
10 Lead Molded Dual-In-Line Package (N)
NS Package Number N10A
E
1~3~~::~4~!:)
is
B
0.075
(1.905)
Ia.
I~::)
0.250±0.005
16.350±0.127)
J
NOM
I
10 9
8
7
6
.L!----j=!b¥=.bd..b,b!,,,b!~
NOM
PIN NO.1 IDENT
t
JL -t
t
r-------.. ~
~
t
0.130±0.005
0.030
10.762)
MAX
..!!l!!.j
0.009-0.015
10.229-0.381)
. I~::~!~::~~)
-1-/
.~
0.100±0.010
(7.112)
TVP
MIN
0.325~~:~:
94°'86 0
TYP
I t'I~::::)
0.01B±0.003
-J'-L~
TYP
0.040
11.016)
TYP
1 .016)
'8255+
~.
-0.381
N1CIAIREVA)
14 Lead Molded Dual-In-Line Package (N)
NS Package Number N 14A
0.092 OIA ~ MAX
(2.337)
(0.762) DEPTH
OPTION 1
0P110N 02
0.136±0.OO5
(3.429±0.127)
0.3GII-0.320
4°TVP
~
'r)
0065
11
OPTIONAl:
~~',
+
0.020
(0~~9) 0.125~0.150
13.175-3.810)
-II
0.014-0.023 TYP- _
10.356-0.584)
Jr
L
1~.O.008-0.016 TYP
asolso
P
10.203-0.406)
O.280
-
17.112)-+
_~TYP
0.100±0.010 TVP
12.540±0.254)
11.270-0.254)
MIN
..
.
0.325~~:~
(8.~6~::~~
8-46
NI ..... \AEVFI
r-----------------------------------------------, ::r
~
16 Lead Molded Dual-In-Line Package (N)
NS Package Number N16A
~
~
c
3'
0.092
(23l7)
CD
:s
en
0'
:s
en
DlANOM
(2X)
0.280
(7.112)
~
O.OlO
MIN
---
0.lOO-0.l20
l
(~~6:)
(7.620-8.128)
•.".PJ[:::}r!
........
~(0.229-0.381)
I.
0.325
(
:::~~
·1
'J
0.075 ±0.015
11.905 ±0.381)
+1016)
8.255 -0:381
0.145-0.200
I--
0.100 ±0.010
(2.540 ±0.254)
J
Jid
1__ "
~
0.018.0.003 0.125-0.140
~- (OA57±0.076) (l.175-l.556)
~
0.f20
(D:'~)
Nt6A(AEVE)
18 Lead Molded Dual-In-Line Package (N)
NS Package Number N18A
0.092
(2.336)
X 0.030
NOM
MAX
0.843-0.870
(21.41-22.10)
-::j
(0.762)
f3~~===135==14~SI3~1~2~1~I~O
DEEP (2 PLCS)
PIN NO. llDENT
t0.250 to.005
(6.350 ±0.127)
~
¥.i=;::;:=;:;;r=;:::;=:r.;:;=;:~r=;:::;=r.rI-.i
0'280~
(7.112)
MIN
0.300-0.320
Ir:
0 l
-: :
21
~
I·
·1
0.325 +0.D40
-0.015
(8.255 +1,016)
~
-0.381
1I-- J
0.025 ±0.015
(0.635 ±0.3811
90°
±4°t
TYP
0.020
(0.508)
0.125-0.140 I MIN
(3.175-3.556)
0.100 ±DAll0
(2.540 ±0.254)
TYP
N18A(REVE)
8-47
o
C
o
"0
cCI)
E
r-----------------------------------------------------------------------------------------~
20 Lead Molded Dual-In-Line Package (N)
NS Package Number N20A
is
i
1.013-1.040
(Z5.73-Z6AZ)
0.092 X0.830
(2.337 x0.76Z)
MAXDP
a.
=:1
0.03Z±0'005~0
l'
~~==~==~1~'~18~~15~:~1~.~13~~12~~1I~___r
(0.813±0.1Z7)
RAD
0.Z60 ±0.005
(6.604 ±0.IZ7)
PIN NO. I IOENT
PIN NO.'IDENT~
~~mm~~~~~~
OPTIONZ
0.065
(1.651)
~hlTTrn",,+h~TTrrl'
:IJ
OlZ5~:~
0.009-0.015
(0.2Z9-O.381)
TVP
0.060
Source Exif Data:
File Type : PDF
File Type Extension : pdf
MIME Type : application/pdf
PDF Version : 1.3
Linearized : No
XMP Toolkit : Adobe XMP Core 4.2.1-c041 52.342996, 2008/05/07-21:37:19
Create Date : 2017:07:04 17:53:24-08:00
Modify Date : 2017:07:04 18:55:38-07:00
Metadata Date : 2017:07:04 18:55:38-07:00
Producer : Adobe Acrobat 9.0 Paper Capture Plug-in
Format : application/pdf
Document ID : uuid:4145b4bb-84f0-434d-90f6-f41b06a8d11f
Instance ID : uuid:fb84c343-3ea6-d042-9c2a-e83d67795ed8
Page Layout : SinglePage
Page Mode : UseNone
Page Count : 1682
EXIF Metadata provided by EXIF.tools