1989_Samsung_Linear_IC_Vol_2_Telecom_Industrial 1989 Samsung Linear IC Vol 2 Telecom Industrial

User Manual: 1989_Samsung_Linear_IC_Vol_2_Telecom_Industrial

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Data Book

I
II I
IIII 1. . __
Lin_e_ar_IC
-------1
I I II
VOL 2, 1989
I ,
I, ,
-Telecom
-Industrial

Copyright 1989 by Samsung
All rights reserved. No part of this publication may be reproduced, stored in a retrieval
system, or transmitted in any form or by any means, electronic, mechanical, photo copying,
recording, or otherwise, without the prior written permission of Samsung.
The information contained herein is subject to change without notice. Samsung
assumes no responsibility for the use of any circuitry other than circuitry embodied in
a Samsung product.
No other circuit patent licenses are implied.

SAMSUNG
DATA BOOK LIST
I. Semiconductor Product Guide
II. Transistor Data Book
Vol. 1: Small Signal TR
Vol. 2: Bipolar Power TR
Vol. 3: TR Pellet

III. Linear IC Data Book
Vol. 1: AudioNideo
Vol. 2: Telecom/lndustrial
Vol. 3: Data Converter IC

IV. CMOS Consumer IC Data Book
V. High Speed CMOS Logic Data Book·
VI. MaS Memory Data Book
VII. SFET Data Book
VIII. MPR Data Book
IX. CPL Data Book
X. Dot Matrix Data Book

LINEAR Ie DATA BOOK
VOLUME 1.
AUDIO les
VIDEO ICs
TOY RADIO CONTROL ACTUATOR

VOLUME 2.
TELECOM ICs
VOLTAGE REGULATORs
VOLTAGE REFERENCEs
OPERATIONAL AMPLIFIERs
COMPARATORs
TIMERs

VOLUME 3.
DATA CONVERTER ICs

TABLE OF CONTENTS
(VOLUME 2)
I.

QUALITY and RELIABILITY .........................................................'"

II.

PRODUCT GUIDE

21

1. Function Guide ........................................................................................... 61
2. Cross Reference Guide .............................................................................. 72
3. Ordering Information .................................................................................. 78

III.
IV.

TELECOMMUNICATION ICs .........................................................

79

INDUSTRIAL ICs
1.
2.
3.
4.
5.

Voltage Regulators .................................................................................... 313
Voltage References .................................................................................. 458
Operational Amplifiers ............................................................................. 472
Comparators .............................................................................................. 545
Timers ........................................................................................................ 577

V.

MISCELLANEOUS ICs ..................................................................... 601

VI.

PACKAGE DIMENSIONS ............................................................... 639

VII.

SALES OFFICES and MANUFACTURER'S
REPRESENTATIVES .......................................................................... 647

ALPHANUMERIC INDEX
Device
KA33V
KA201A
KA219
KA301A
KA319
KA331
KA336-5.012.5
KA337
KA340
KA350
KA431
KA710CII
KA711CII
KA733C
KA1222
KA2101
KA2102A
KA2103L
KA2104
KA2105
KA2106
KA2107
KA2130A
KA2131
KA2133
KA2134
KA2135
KA2136
KA2137
KA2153
KA2154
KA2181
KA2182
KA2183
KA2201B
KA2201/N
KA2206
KA22062
KA2209
KA2210
KA2211
KA2212
KA2213
KA22131
KA22135
KA2214
KA2220
KA2221

Function
Silicon Monolithic Bipolar Integrated Circuit Voltage
Stabilizer for Electronic Tuner
Single Operational Amplifier
Dual High Speed Voltage Comparator
Single Operational Amplifier
Dual High Speed Voltage Comparator
Voltage to Frequency Converter
Voltage Reference Diode
lA Negative Adjustable Voltage Regulator
1A Positive Voltage Regulator
3 AMP Adjustable Positive Voltage Regulator
Programmable Precision Reference
High Speed Voltage Comparator
Dual High-Speed Differential Comparator
Differential Video Amplifier
Dual Low Noise Equalizer AMP
TV Sound IF AMP
TV Sound System
Sound Mute System for TV
Auto Power off and Sound Mute System for TV
Limiter AMP and Detector for a TV SIF
Dual Sound Multiplex for a TV SIF
DC Volume, Tone Control Circuit
TV Vertical Deflection System
TV Vertical Output Circuit
1 Chip Deflection System
Color TV Deflection Signal Processing IC
Horizontal Signal Processing IC
Low Noise TV Vertical Deflection System
TV Horizontal Processor
Video-Chroma Deflection System for a Color TV
Video-Chroma Deflection System for a Color TV
Remote Control Pre-AM P
Remote Control Pre-AMP
Remote Control Pre-~MP
0.5W Audio Power AMP
1.2W Audio Power AM P
2.3W Dual Audio Power' AMP
4.3W Dual Power AMP
Dual Low Voltage Power AMP
5.5W Dual Power AMP
5.8W Dual Power AMP
O.5W Audio Power AMP
One Chip Tape Recorder System
Dual Pre-Power AMP for Auto Reverse
Dual Pre-Power AMP and DC Motor Speed Controller
lW Dual Power AMP
Equalizer AMP with ALC
Dual Low Noise Equalizer AMP

Package
TO-92
8 DIP/3 SOP
14 DIP/14 SOP
8 DIP/8 SOP
14 "DIP/14 SOP
8 DIP/8 SOP
TO-92
TO-220
TO-220
TO-3P
TO-92/8 DIP/8 SOP
14 DIP/14 SOP
14 DIP/14 SOP
14 DIP/14 SOP
8 SIP
14 DIP
14 DIP HIS
8 SIP
9 SIP
9 SIP
16 DIP
12 SIP
10 SIP HIS
10 SIP HIS
16 DIP HIS
18 DIP
12 SIP
12 ZDIP/F
16 DIP
42 DIP
42 DIP
8 SIP
8 SIP
8 SIP
8 DIP
8 DIP
12DIP/F
12DIP/F
8 DIP
12 SIP HIS
12 SIP HIS
9 SIP
14 DIP HIS
24 SOP
22 SDIP
14 DIP HIS
9 SIP
8 SIP

Page
603
472
545
472
545
607
458
313
317
329
466
550
554
477
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1

ALPHANUMERIC INDEX
Device
KA22211
KA2223
KA22233
KA22235
KA2224
KA22241
KA2225/D
KA22261
KA2230
KA22421/D
KA22424
KA2243
KA2244
KA22441
KA2245
KA22461
KA2247
KA22471
KA2248A/D
KA2249/D
KA2261
KA2262
KA2263
KA2264/D
KA2265
KA22682
KA2268N
KA2281
KA2283
KA2284
KA2285
KA2286
KA2287
KA2288
KA2303
KA2304
KA2401
KA2402
KA2404
KA2407
KA2410
KA2411
KA2412A
KA2413
KA2418
KA2425A/B
KA2580A
KA2588A
KA2605
KA2606

(Continued)

Function
Dual Low Noise Equalizer AMP
5 Band Graphic Equalizer AMP
3 Band Dual Graphic Equalizer AMP
5 Band Graphic Equalizer AMP
Dual Equalizer AMP with ALC
Dual Equalizer AMP with ALC
Dual Pre-AMP for 3V Using
Dual Equalizer AMP with REC AMP
9-Program Music Selector
AM 1 Chip Radio
AM/FM 1 Chip Radio
AM/FM IF System
FM IF System for Car Radio
FM IF System for Car Stereo
FM IF System for Car Radio
Electronic Tuning AM Radio Receiver for Car Stereo
FM IF/AM Tuner System
FM IF/AM Tuner System
3V FM IF/AM Tuner System
FM Front End for Portable Radio
FM Stereo Multiplex Decoder
FM Stereo Multiplex Decoder
FM Stereo Multiplex Decoder
FM Stereo Multiplex Decoder
VCO Non-Adjusting FM Stereo Multiplex Decoder
1 Chip TV MPX Demodulator
1 Chip TV Sound MPX
5 DOT Dual LED Level' Meter Driver
5 DOT Dual LED Level Meter Driver
5 DOT LED Level Meter Driver
5 DOT LED Level Meter Driver
5 DOT LED Linear Level Meter Driver
5 DOT LED Linear Level Meter Driver
7 DOT LED Level Meter Driver
Toy Radio Control Actuator
Toy Radio Control Actuator
DC Motor Speed Controller
Low Voltage DC Motor Speed Controller
DC Motor Speed Controller
DC Motor Speed Controller
Tone Ringer
Tone Ringer
Telephone Speech Circuits
Dual Tone Multi Frequency Generator
Tone Ringer with Bridge Diode
Telephone Speech Network with Dialer Interface
8-Channel Source Drivers
8-Channel Source Drivers
SYNC Separator
SYNC Separator

Package
8 SIP
16 DIP
22 DIP
18 ZIP
14 DIP
9 SIP
16 DIP/16 SOP
16 DIP
22 DIP
16 DIP/16 SOP
16 DIP
16 DIP
9 SIP
16 ZIP
7 SIP
19 ZIP
16 DIP
16 DIP
16 DIP/16 SOP
7 SIP/8 SOP
16 DIP
16 ZIP
9 SIP
9 SIP/16 SOP
16 DIP
28 DIP
28 DIP
16 DIP
16 DIP
9 SIP
9 SIP
9 SIP
9 SIP
16 DIP
9 SIP
9 SIP
8 DIP
8 DIP
TO-92L
TO-126
8 DIP
8 DIP
14 DIP
16 DIP
8 DIP
18 DIP
18 DIP
20 DIP
9 SIP
9 SIP

Page
Vol. 1
Vol. 1
Vol. 1
Vol. 1
. Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
81
81
87
95
101
104
611
611
Vol. 1
Vol. 1

ALPHANUMERIC INDEX
Device
KA2615
KA2616
KA2617
KA2618
KA2651
KA2654
KA2655/6/7/8/9
KA2803
KA2804
KA2807
KA2911
KA2912
KA2913A
KA2914A
.KA2915
KA2916
KA2917
KA2918
KA2919
KA2944
KA2945
KA2983
KA2988
KA3524
KA6101
KA6102
KA7500
KA78S40
KA78TXX
KA8301
KA8302
KA8401
KA9256
KAD0808
KAD0809
KAD0820A/B
KDA0800
KDA0801
KDA0802
KF347
KF351

(Continued)

Function
LED and Lamp Driver
LED and Lamp Driver
LED and lamp Driver
LED and Lamp Driver
Fluorescent Display Drivers
Line Transceiver
High Voltage, High Current Darlingt9n Arrays
Low Power Consumption Earth Leakage Detector
Zero Voltage Switch
Earth Leakage Detector
Video IF System for Color TV
Video IF Processor for BIW TV
Video and Sound IF AMP for Monochrome TV Receivers
Video IF + SIF System
TV VIF & SIF & Deflection System
Video IF System for Color TV
Video and Sound IF AMP for Monochrome TV Receivers
Video IF + SIF System
VIF + SIF System for Color TV
Write & Read AMP
Video AMP
Switchless Recording/Play Back AMP
Chroma Signal Processor
Regulator Pulse Width Modulator
Analog Interface Circuit for Teletex System
Analog Interface Circuit for Teletex System
Switchmode PWM Control Circuits
Switching Regulator
3A Positive Voltage Regulator
Driver for VTR '"')
Servo Control AMP
VTR Audio Switch less Recording/Play Back AMP
Dual Power Operational Amplifier
8 Bit /-tp-Compatible AID Converter with 8-Channel
Multiplexer
8 Bit /-tp-Compatible A/D Converter with 8-Channel
Multiplexer
8 Bit High Speed /-tP Compatible AID Converter with
Track/Hold Function
8 Bit D/A Converter
8 Bit D/A Converter
8 Bit D/A Converter
Quad Operational Amplifier
Single Operational Amplifier

Package

Page

9 SIP
9 SIP
9 SIP
9 SIP
18 DIP
8 DIP
16 DIP/16 SOP
8 DIP
8 DIP
8 DIP
16 DIP
14 DIP H/S
16 DIP
24 DIP
28 DIP
16 DIP
16 DIP
24 DIP
30 SSD
28 DIP
28 DIP
18 DIP
28 DIP
16 DIP
18 DIP
18 DIP
16 DIP
16 DIP
TO-220
10 SIP H/S
12- SIP
24 ZIP
10 SIP

Vol. 1
Vol. 1
Vol. 1
Vol. 1
616
111
619
624
627
630
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
337
Vol. 1
Vol. 1
345
349
355
Vol. 1
Vol. 1
Vol. 1
484

28 DIP

Vol. 3

28 DIP

Vol. 3

20 DIP

Vol. 3

16 DIP
16 DIP
16 DIP
14 DIP/14 SOP
8 DIP/8 SOP

Vol. 3
Vol. 3
Vol. 3
486
488

ALPHANUMERIC INDEX
Device
KF442
KS272
KS274
KS555
KS555H
KS556
KS5706
KS5788
KS5789A
KS5803A/B
KS5805A/B
KS58C/D05
KS58E05
KS5808
KS5809
KS581 0
KS5811
KS5812
KS58A/B/C/D19
KS58A/B/CID20
KS5822
KS58A/B/CID23
KS5824
KS7126
KS25C02
KS25C03
KS25C04
KSV3100A
KSV3110
KSV3208
KT3040/A
KT3170
KT5116
KT8520
KT8521
KT8554
KT8555
KT8557
KT8564
KT8567
LM224/A
LM239/A
LM248
LM258/A

(Continued)

Function
Dual Operational Amplifier
Dual Operational Amplifier
Quad Operational Amplifier
CMOS Timer
CMOS Timer
CMOS Timer
3 Line Drivers and 3 Line Receivers
Quad CMOS Line Driver
Quad CMOS Line Receiver
Remote Control Transmitter
Telephone Pulse Dialer with Redial
Telephone Pulse Dialer with Redial
Telephone Pulse Dialer with Redial
Dual Tone Multi Frequency Dialer
DTMF Dialer
DTMF Dialer with Redial
DTMF Dialer with Redial
Quad Universial Asychronous Receiver and Transmitter
Tone/Pulse Dialer with Redial
Tone/Pulse Dialer with Redial
10 Memory Tone/Pulse Repertory Dialer
10 Memory Tone/Pulse Repertory Dialer
Universial Asychronous Receiver and Transmitter
3 1/2 Digit AID Converter
8 Bit CMOS Successive Approximation Register
8 Bit CMOS Successive Approximation Register
12 Bit CMOS Successive Approximation Register
High-Speed A/D-DA Converter
High-Speed A/D-DA Converter
High-Speed AID Converter
PCM Monolithic Filter
DTM F Receiver
wLaw Companding CODEC
wLaw Companding CODEC
A-Law Companding CODEC
wLaw COMBO CODEC
Time Slot Assignment Circuit
A-Law COMBO CODEC
wLaw COMBO CODEC
A-Law COMBO CODEC
Quad Operational Amplifier
Quad Differential Compa~ator
Quad Operational Amplifier
Dual Operational Amplifier

Package

Page

8 DIP/8 SOP
8 DIP/9 SIP
14 DIP
8 DIP/8 SOP
8 DIP/8 SOP
14 DIP/14 SOP
16 DIP/16 SOP
14 DIP/14 SOP
14 DIP/14 SOP
16 DIP/20 SOP
18 DIP
18 DIP
16 DIP
16 DIP
16 DIP
16 DIP
16 DIP
40 DIP
22DIP/SDIP
18 DIP
22 DIP
18 DIP
24 DIP
40 DIP
16 DIP/24 SDIP
16 DIP/24SDIP
24 DIP/24SDIP
40 DIP
40 DIP
28 DIP
16 CERDIP
18 DIP
16 CERDIP
24 CERDIP
22 CERDIP
16 CERDIP
20 CERDIP
16 CERDIP
20 CERDIP
20 CERDIP
14 DIP/14 SOP
14 DIP/14 SOP
14 DIP/14 SOP
8 DIP/8 SOP/9 SIP

490
492
496
577
582
586
115
119
122
Vol. 1
125
131
136
140
146
146
146
150
160
170
178
186
194
Vol. 3
Vol. 3
Vol. 3
Vol. 3
Vol. 3
Vol. 3
Vol. 3
205
217
227
240
240
249
260
249
268
268
500
557
509
515

ALPHANUMERIC INDEX
Device
LM293/A
LM311
LM317
LM323
LM324/A
LM339/A
LM348
LM358!A
LM386/S!D
LM393/A
LM567C
LM567L
LM723
LM741C!EII
LM2901
LM2902
LM2903
LM2904
LM3302
MC1458/C/I
MC1488
MC1489/A
MC3303
MC3361
MC3403
MC4558/C!AII
MC78XX
MC78LXX
MC78MXX
MC79XX
MC79LXX
MC79MXX
NE555
NE556
NE558

(Continued)
Function

Dual Differential Comparator
Voltage Comparator
3-Terminal Positive Adjustable Regulator
3-Terminal Positive Adjustable Regulator
Quad Operational Amplifier
Quad Differential Comparator
Quad Operational Amplifier
Quad Operational Amplifier
Low Voltage Audio Power AMP
Dual Differential Comparator
Tone Decoder
Micropower Tone Decoder
Precision Voltage Regulator
Single Operational Amplifier
Quad Differential Comparator
Quad Operational Amplifier
Dual Differential Comparator
Dual Operational Amplifier
Quad Differential Comparator
Dual Operational Amplifier
Quad Line Driver
Quad Line Receiver
Quad Operational Amplifier
Low Power Narrow Band FM IF
Quad Operational Amplifier
Dual Operational Amplifier
3-Terminal 1A Positive Voltage Regulator
3-Terminal 0.1A Positive Voltage Regulator
3-Terminal 0.5A Positive Voltage Regulator
3-Terminal 1A Negative Voltage Regulator
3-Terminal 0.1A Neagtive Voltage Regulator
3-Terminal O.5A Negative Voltage Regulator
Single Timer
Dual Timer
Quad Timer

Package
8 DIP/8 SOP
8 DIP/8 SOP
TO-220
TO-3P
14 DIP!14 SOP
14 DIP!14 SOP
14 DIP!14 SOP
8 DIP!8 SOP!9 SIP
9 SIP!8 DIP!8 SOP
8 DIP!8 SOP
8 DIP!8 SOP
8 DIP!8 SOP
14 DIPI14 SOP
8 DIP!8 SOP
14 DIP!14 SOP
14 DIP!14 SOP
8 DIP!8 SOP
8 DIP!8 SOP!9 SIP
14 DIP!14 SOP
8 DIP!8 SOP/9 SIP
14 DIP!14 SOP
14 DIP!14 SOP
14 DIP!14 SOP
16 DIP/16 SOP
14 DIP/14 SOP
8 DIP!8 SOP/9 SIP
TO-220
TO-92
TO-220
TO-220
TO-92
TO-220
8 DIP/8 SOP
14 DIP/14 SOP
16 DIP/16 SOP

Page
565
572
366
371
500
557
509
515
634
565
278
286
376
523
557

500
565
515
557
529
296
301
533
305
533
540
382
413
424
437
447
452
590
594
597

PRODUCT INDEX
1. Audio Application
Device
KA1222
KA2201B
KA2201/N
KA2206
KA22062
KA2209
KA221 0
KA2211
KA2212
KA2213
KA22131
KA22135
KA2214
KA2220
KA2221
KA22211
KA2223
KA22233
KA22235
KA2224
KA22241
KA2225/D
KA22261
KA2230
KA22421/D
KA22424
KA2243
KA2244
KA22441
KA2245
KA22461
KA2247
KA22471
KA224BAID
KA22491D
KA2261
KA2262
KA2263
KA2264/D
KA2265
KA2281
KA2283
KA2284
KA2285
KA2286
KA2287
KA2288
LM386/S/D
KA2303
KA2304
KA2401

Function

I

Dual Low Noise Equalizer AMP
O.5W Audio Power AMP
1.2W Audio Power AMP
2.3W Dual Audio Power AMP
4.5W Dual Power AMP
Dual Low Voltage Power AMP
5.5W Dual Power AMP
5.BW Dual Power AMP
O.5W Audio Power AMP
One Chip Tape Recorder System
Dual Pre·Power AMP for Auto Reverse
Dual Pre·Power AMP and DC Motor Speed Controller
1W Dual Power AMP
Equalizer AMP with ALC
Dual Low Noise Equalizer AMP
Dual Low Noise Equalizer AMP
5 Band Graphic Equalizer AMP
3 Band Dual Graphic Equalizer AMP
5 Band Graphic Equalizer AMP
Dual Equalizer AMP with ALC
Dual Equalizer AMP with ALC
Dual Pre·AMP for 3V Using
Dual Equalizer AMP with REC AMP
9·Program Music\$elector
AM 1 Chip Radio
AM/FM 1 Chip Radio
AM/FM IF System
FM IF System for Car Radio
FM IF System for Car Stereo
FM IF System for Car Radio
Electronic Tuning AM Radio Receiver for Car Stereo
FM IF/AM Tuner System
FM IF/AM Tuner System
3V FM IF/AM Tuner System
FM Front End for Portable Radio
FM Stereo Multiplex Decoder
FM Stereo Multiplex Decoder for Car Stereo
FM Stereo Multiplex Decoder
FM Stereo Multiplex Decoder
VCO Non·Adjusting FM Stereo Multiplex Decoder
5 DOT Dual LED Level Meter Driver
5 DOT Dual LED Level Meter Driver
5 DOT LED Level Meter Driver
5 DOT LED Level Meter Driver
5 DOT LED Linear Level Meter Driver
5 DOT LED Linear Level Meter Driver
7 DOT LED Level Meter Driver
Low Voltage Audio Power AMP
Toy Radio Control Actuator
Toy Radio Control Actuator
DC Motor Speed Controller

Package

Page

B SIP
8 DIP
B DIP
12 DIP/F
12 SIP HIS
B DIP
12 SIP HIS
12 SIP HIS
9 SIP
14 DIP HIS
24 SOP
22 SDIP
14 DIP HIS
9 SIP
B SIP
8 SIP
16 DIP
22 DIP
1B ZIP
14 DIP
9 SIP
16 DIP/16 SOP
16 DIP
22 DIP
16 DIP/16 SOP
16 DIP
16 DIP
9 SIP
16 ZIP
7 SIP
19 ZIP
16 DIP
--,
16 DIP
16 DIP/16 SOP
7 SIP/B SOP
16 DIP
16 ZIP
9 SIP
9 SIP/16 SOP
16 DIP
16 DIP
16 DIP
9 SIP
9 SIP
9 SIP
9 SIP
16 DIP
9 SIP/B DIP/B SOP
9 SIP
9 SIP
8 DIP

Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
386
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
Vol. 1
634
Vol. 1
VoL 1
Vol. 1

PRODUCT IN DEX

(Continued)

1. Audio Application (Continued)

Device
KA2402
KA2404
KA2407

Function
Low Voltage DC Motor Speed Controller
DC Motor Speed Controller
DC Motor Speed Controller

Package
8 DIP
TO-92L
TO-126

Page
Vol. 1
Vol. 1
Vol. 1

2. Video Application

Device
KA2101
KA2102A
KA2103L
KA2104
KA21 05
KA21 06
KA2107
KA2130A
KA2131
KA2133
KA2134
KA2135
KA2136
KA2137
KA2153
KA2154
KA2181
KA2182
KA2183
KA22682
KA2268N
KA2605
KA2606
KA2615
KA2616
KA2617
KA2618
KA2911
KA2912
KA2913A
KA2914A
KA2915
KA2916
KA2917
KA2918
KA2919
KA2944
KA2945
KA2983
KA2988
KA6101
KA6102
KA8301
KA8302
KA8401
KS5803A1B

Function
TV Sound IF AMP
TV Sound System
Sound Mute System for TV
Auto Power off and Sound Mute System for TV
Limiter AMP and Detector for a TV SIF
Dual Sound Multiplex for a TV SIF
DC Volume Tone Control Circuit
TV Vertical Deflection System
TV Vertical Output Circuit
1 Chip Deflection System
Color TV Deflection Signal Processing IC
Horizontal Siganl Processing IC
Low Noise TV Vertical Deflection System
TV Horizontal Processor
Video-Chroma Deflection System for a Color TV
Video-Chroma-Deflection System for a Color TV
Remote Control Pre-AMP
Remote Control Pre-AMP
Remote Control Pre-AMP
1 Chip TV MPX Demodulater
1 Chip TV Sound MPX
SYNC Separator
SYNC Separator
LED and Lamp Driver
LED and Lamp Driver
LED and Lamp Driver
LED and Lamp Driver
Video IF System for Color TV
Video IF Processor for BIW TV
Video and Sound IF AMP for Monochrome TV Receivers
Video IF + SIF System
TV VIF & SIF & Deflection System
Video IF System for Color TV
Video and Sound IF AMP for Monochrome TV Receivers
Video IF + SIF System
VIF + SIF System for Color TV
Write & Read AMP
Video AMP
Switch less Recording/Play Back AMP
Chroma Signal Processor
Analog Interface Circuit for Teletex System
Analog Interface Circuit for Teletex System
Driver for VTR
Servo Control AMP
VTR Audio Switchless Recording/Play Back AMP
Remote Control Transmitter

Package
14 DIP
14 DIP H/S
8 SIP
9 SIP
9 SIP
16 DIP
12 SIP
10 SIP HIS
10 SIP H/S
16 DIP H?S
18 DIP
12 SIP
12 ZDIP/F
16 DIP
42 DIP
42 DIP
8 SIP
8 SIP
8 SIP
28 DIP
28 DIP
9 SIP
9 SIP
9 SIP
9 SIP
9 SIP
9 SIP
16 DIP
14 DIP H/S
16 DIP
24 DIP
28 DIP
16 DIP
16 DIP
24 DIP
30 SSD
28 DIP
28 DIP
18 DIP
28 DIP
18 DIP
18 DIP
10 SIP H/S
12 SIP
24 ZIP
16 DIP/20 SOP

Page
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
! Vol.

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

PRODUCT INDEX

(Continued)

3. Telecommunication Application
Device
KA241 0
KA2411
KA2412A
KA2413
KA2418
KA2425A/B
KA2654
KS5706
KS5788
KS5789A
KS5805A/B
KS58C/D05
KS58E05
KS5808
KS5809
KS581 0
KS5811
KS5812
KS58A/B/C/D19
KS58A/B/C/D20
KS5822
KS58A/B/C/D23
.• KS5824
KT3040/A
KT3170
KT5116
KT8520
KT8521
KT8554
KT8555
KT8557
KT8564
KT8567
LM567C
LM567L
MC1488
MC1489/A
MC3361
KA2580A
KA2588A
KA2651
KA2655/6/7/8/9

Function
Tone Ringer
Tone Ringer
Telephone Speech Circuits
Dual Tone Multi Frequency Generator
Tone Ringer with Bridge Diode
Telephone Speech Network with Dialer Interface
Line Transceiver
3 Line Drivers and 3 Line Receivers
Quad CMOS Line Driver
Quad CMOS Line Receiver
Telephone Pulse Dialer with Redial
Telephone Pulse Dialer with Redial
Telephone Pulse Dialer with Redial
Dual Tone Multi Frequency Dialer
DTMF Dialer
DTMF Dialer with Redial
DTMF Dialer with Redial
Quad Universial Asychronos Receiver and Transmitter
Tone/Pulse Dialer with Redial
Tone/Pulse Dialer with Redial
10 Memory Tone/Pulse Repertory Dialer
10 Memory Tone/Pulse Repertory Dialer
Universial Asychronous Receiver and Transmitter
PCM Monolithic Filter
DTM F Receiver
wLaw Companding CODEC
wLaw Companding CODEC
A-Law Companding CODEC
wLaw COMBO CODEC
Time Slot Assignment Circuit
A-Law COMBO CODEC
wLaw COMBO CODEC
A-Law COMBO CODEC
Tone Decoder
Micropower Tone Decoder
Quad Line Driver
Quad Line Receiver
Low Power Narrow Band FM IF
8-Channel Source Drivers
8-Channel Source Drivers
Fluorescent Display Drivers
High Voltage, High Current Darlingtor Arrays

Package
8 DIP
8 DIP
14 DIP
16 DIP
8 DIP
18 DIP
8 DIP
16 DIP/SOP
14 DIP/SOP
14 DIP/SOP
18 DIP
18 DIP
16 DIP
16 DIP
16 DIP
16 DIP
16 DIP
40 DIP
22 DIP
18 DIP
22 DIP
18 DIP
24 DIP
16 CERDIP
18 DIP
16 CERDIP
24 CERDIP
22 CERDIP
16 CERDIP
20 CERDIP
16 CERDIP
20 CERDIP
20 CERDIP
8 DIP/SOP
8 DIP/SOP
14 DIP/SOP
14 DIP/SOP
16 DIP/SOP
18 DIP
20 DIP
18 DIP
16 DIP/SOP

Page
81
81
87
95
101
104
111
115
119
122
125
131
136
140
146
146
146
150
160
170
178
186
194
205
217
227
240
240
249
260
249
268
268
278
286
296
301
305
611
611
616
619

PRODUCT INDEX

(Continued)

4. Industrial Application

l.

Device

KA33V
KA201A
KA219
KA301A
KA319
KA331
KA336-5.0/2.5
KA337
KA340
KA350
KA431
KA710CII
KA711CII
KA733C
KA2807
KA3524
KA7500
KA78S40
KA78TXX
KA9256
KF351
KF347
KF442
KS272
KS274
KS555
KS555H
KS556
LM224/A
LM239/A
LM248
LM258/A
LM293/A
LM311
LM317
LM323
LM324/A
LM339/A
LM348
LM358/A
LM393/A
LM723
LM741C/EII
LM2901

Function

Silicon Monolithic Bipolar Integrated Circuit Voltage
Stabilizer for Electronic Tuner
Single Operational Amplifier
Dual High Speed Voltage Comparator
Single Operational Amplifier
Dual High Speed Voltage Comparator
Voltage to Frequency Converter
Voltage Reference Diode
1A Negative Adjustable-Voltage Regulator
1A Positive Voltage Regulator
3A Adjustable Positive Voltage Regulator
Programmable Precision Reference
High Speed Voltage Comparator
Dual High-Speed Differential Comparator
Differential Video Amplifier
Earth Leakage Detector
PWM Control Circuits
Switchmode PWM Control Circuits
Switching Regulator
3A Positive Voltage Regulator
Dual Power Operationai Amplifier
Single Operating Amplifier
Quad Operational Amplifier
Dual Operational Amplifier
Dual Operational Amplifier
Quad Operational Amplifier
CMOS Timer
CMOS Timer
CMOS Timer
Quad Operational Amplifier
Qual Differential Comparator
Quad Operational Amplifier
Quad Operational Amplifier
Dual Differential Comparator
Voltage Comparator
3-Terminal Positive Voltage Regulator
3-Terminal Positive Voltage Regulator
Quad Operational Amplifier
Quad Differential Comparator
Qual Operational Amplifier
Quad Operational Amplifier
Dual Differential Comparator
Precision Voltage Regulator
Single Operational Amplifier
Qual Differential Comparator

Package

Page

TO-92

603

8 DIP/8 SOP
14 DlP/14 SOP
8 DIP/8 SOP
14 DIP/14 SOP
8 DIP/8 SOP
TO-92
TO-220
TO-220
TO-3PITO-220
TO-92/8 DIP/8 SOP
14 DIP/14 SOP
14 DIP/14 SOP
14 DIP/14 SOP
8 DIP
16 DIP
16 DIP
16 DIP
TO-220
10 SIP
8 DIP/8 SOP
14 DIP/14 SOP
8 DIP/8 SOP
8 DIP
14 DIP/9 SIP
8 DIP/8 SOP
8 DIP/8 SOP
14 DlP/14 SOP
14 DIP/14 SOP
14 DIP/14 SOP
14 DIP/14 SOP
8 DIP/8 SOP/9 SIP
8 DIP/8 SOP
8 DIP/8 SOP
TO-220
TO-3P
14 DIP/14 SOP
14 DIP/14 SOP
14 DIP/14 SOP
B DIP/B SOP/9 SIP
8 DIP/8 SOP
14 DIP/14 SOP
B DIP/8 SOP
14 DIP/14 SOP

472
545
472
545
607
458
313
317
329
466
550
554
477
630
337
345
349
355
484
488
486
490
492
496
577
582
586
500
557
500
515
565
572
366
371
500
557
509
515
565
376
523
557

PRODUCT INDEX (Continued)
4. Industrial Application

(Continued)

Device
LM2902
LM2903
LM2904
LM3302
MC1458/C/I
MC3303
MC3403
MC45581CIAll
MC78XX
MC78LXX
MC78MXX
MC79XX
MC79LXX
MC79MXX
NE555
NE556
NE558

Function
Quad Operational Amplifier
Dual Differential Comparator
Quad Operational Amplifier
Quad Differential Comparator
Dual Operational Amplifier
Quad Operational Amplifier
Quad Operational Amplifier
Dual Operational Amplifier
3-Terminal 1A Positive Voltage Regulator
3-Terminal Positive Voltage Regulator
3-Terminal 0.5A Positive Voltage Regulator
3-Terminal Negative Voltage Regulator
0.1A Negative Voltage Regulator
3-Terminal 0.5A Negative Voltage Regulator
Timer
Dual Timer
Quad Timer

Package
14 DIP/14 SOP
8 DIPI8 SOP
"8 DIP/8 SOP/8 SIP
14 DIP/14 SOP
8 DIP/8 SOP/9 SIP
14 DIPI14 SOP
14 DIP/14 SOP
8 DIP/8 SOP/9 SIP
TO-220
TO-92
TO-220
TO-220
TO-92
TO-220
8 DIP/8 SOP
14 DIPI14 SOP
16 DIP/16 SOP

Page
500
565
515
557
529
533
533
540
382
413
424
437
447
452
590
594
597

5. Data Converter Application
Device
KSV3100A
*KSV3110
* KSV3208
**KAD0206
KAD0808/09
*KAD0817
KAD0820
KS7126
**KDA0406
*KDA3310
KDA0800/08
KS25C02
KS25C03
KS25C04
-: New Product
**: Under Development

Function
8 Bit AID Converter + 10 Bit DIA Converter
8 Bit AID Converter + 10 Bit D/A Converter
8 Bit AID Converter
6 Bit AID Converter (20 MSPS)
8 Bit up-Compatible AID Converter (8 CH)
8 Bit up-Compatible AID Converter (16 CH)
8 Bit up-Compatible AID Converter
3 1/2 D.igit AID Converter
Tripple 6 Bit D/A Converter (20 MSPS)
10 Bit D/A Converter
8 Bit D/A Converter
8 Bit CMOS Successive Approximation Register
8 Bit CMOS Successive Approximation Register
12 Bit CMOS Successive Approximation Register

Package
40 DIP
40 DIP
28 DIP
32S0lCI30 SDIP
28 DIP
40 DIP
20 DIP
40 DIP
28S0lCI28 SDIP
28 CERDIP
16 DIP
16 DIP
16 DIP
16 DIP

Page
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.
Vol.

3
3
3
3
3
3
3
3
3
3
3
3
3
3
3

QUALITY and RELIABILITY
INTRODUCTION
Samsung's linear Ie products are among the most reliable in the industry. Samsung has always made a commitment to achieve the highest possible quality, reliability, and customer satisfaction with its products.
Extensive qualification, monitor and outgoing programs are used to scrutinize product quality and reliability.
Stringent controls are applied to every wafer fabrication and assembly lot to achieve reproducibility, and therefore
maintain product reliability.
In this chapter, the quality and reliability programs established at Samsung will be discussed. In addition, a description
of reliability theory, reliability tests and various support efforts provides a broad framework from which to comprehend Samsung quality and reliability.
To better understand the Quality Department's role in product develoment and manufacturing, a detailed diagram
is listed below. As can be noted, Quality Engineering is involved in all phases, save that of initial product planning.

STEP

SALES

~

PROCESS ENG'S

MARKET SURVEY

Z

I

~

SPEC. REVIEW

Q.

I

I

==

I~

-'

a:<

DESIGN

____

.....
Z

iii
w
c

z
o

t

J

I
--,I

r -___
D_ES_IG
__
N_R_E_VI_EW
__________

jl-------iL..____

Q_U_A_L1_F_IC_A_TI_O_N_F_O_R_R_A_W__
M_AT_E_R_1A_L__---'

011

o

I

I

TRIAL MFG

I
I

I

EVALUATION & QUALIFICATION
STANDARDIZATION

::l

C

oII:

PRODUCTION
CONTROL

PRODUCTION

I
I

COUNCIL FOR DEVELOPMENT

oIi.

OC/OA

I

APPROVAL

I

P.P

Q.

I

W
II:
Q.

I

I

z
o

PROCESS CONTROL

t

::l
Q

Q.

III
III

<

==

I
I

11------·-----11

MASS PRODUCTION

1

L------r---

oII:

I

QUALIFICATION
INCOMING INSP.

I

PROCESS MONITOR

I
I

RELIABILITY TEST

I
I

I

I

I

l

J

LOT ACCEPTANCE TEST

~

L . . - - - - . , . . - - - j_ _------'J

I
I'-------_.....11----------11

FAILURE ANALYSIS

CLAIM

I

INITIATE CORRECTIVE ACTION

I

SHIPPING
J

CUSTOMER

I
I

Quality Assurance During Development

c8SAMSUNG
Electronics

23

I

QUALITY and RELIABILITY

QUALIFICATION
Procedures to qualify devices are listed below. There are both general and product-specific requirements. Procedures
are detailed for new products, die-only qualifications, and package-only qualifications. The latter two are for products
andlor packages already qualified, but where there is room for further product optimization.

I
I
New Product
•
•
•
•
•
•
•
•
•
•
•

HOPL 1000HR
HTRB 1000HR
1000HR
IOPL
1000HR
HTS
168HR
PCT
WHOPL 1000HR
WHTRB 1000HR
TIC, TIS 200CYC.
20000CYC.
PIC
Solderability
Other as
applicable

Qualification Program

I

I

I
Package
Sub-assembly

New Process
Wafer-fabrication
•
•
•
•
•
•
•

HOPL
HTRB
HTS
PCT
WHOPL
WHTRB
TIC, TIS

1000HR
1000HR
1000HR
168HR
1000HR
1000HR
200CYC.

I

•
•
•
•
•
•

HOPL 500HR
HTRB 500HR
200CYC.
TIC
200CYC.
TIS
168HR
PCT
Other as
applicable

1
*Other
• Same as
New product
Qual.

* Design, Equipment,
Material(s), etc ....
Qualification Programs.

c8SAMSUNG
Electronics

24

QUALITY and RELIABILITY

A) New Product Qualification Test Items
Test Item

No.

Part

Test Condition

High Temperature Ta=Tj(max)
1 Reverse Bias
VCB = 0.8 X VCBO
(HTRB)
1000HRS
High Temperature Ta = Top~max)
2 Operating Life
Vcc = Vcc (max)
(HOPL)
Static, Dynamic
1000HRS
3 ,High Temperature Ta=Tj(max)
Storage (HTS)
1000HRS
Operati ng Life
(OPL)

4

Intermittent
5 OPL (IOPL)

Ta= 25°C
Pc= Pc(max)
1000HRS
Ta= 25°C
Pc= Pc(max)

Reference
Method

Sample
ACC.
LTPD
Size
No

L·IC Discrete

10

1

48HR
for PRT

45

10

1

MIL-STD-883 48HR
for PRT
1005

45

10

1

YES

45

10

1

-

YES

45

10

1

YES

YES

45

10

1

YES

YES

45

10

1

45

10

1

45

10

1

-

YES

45

YES

-

YES

YES

-

I

•

Note

I

II

MIL-STD-750 for Small1026.3
Signal Device

IMIL-STD·750
1036.3

2min/2min OnlOff

1000HRS
Power Cycle
6 (PIC)

6 Tj = 125°C
45Sec/90Sec OnlOff

For
PWR TR,
PWR IC

20000CYC.
Pressure Cooker
7 Test (PCT)

Ta=121°C±2°C
RH = 100% 15PSIG
168HRS

Wet High
8 Temperature
Reverse Bias
(WHTRB)

Ta= 85°C, RH = 85%
VCB = 0.8 X VCBO

Wet High
Temperature
Operating Life
j
(WHOPL)

Ta= 85°C, RH = 85%
Vcc = Vcc(opr), Pdmin

91

- - f---Thermal Shock
10
(TIS)

11

48HR
for PRT

I
-

YES

1000HRS

I

iyES

i

-

I
I

I

1000HRS

-

- 65°.C-+150°C
(Liquid) YESI YES
5min< 10Sec, 5min
200 Cycles
I

Temperature Cycle - 65°C-+25°C-+150°C
10min, 5min, 10min
YES
(TIC)
200 Cycles

c8SAMSUNG
Electronics

YES

I

45

10

1

I

45

I

10

1

MIL-STD-883
1011
M I L-STD-883
1011

25

QUALITY and RELIABILITY

A) New Products Qualification Test Item (Continued)
No.

Test Item

Part

Test Condition

L·IC Discrete

Solder Heat
12 Resistance
(StH)
13 Solderability
14 Salt Atmosphere

15

Mechanical
Shock

16 Vibration

17

Constant
Acceleration

ESD
18 (Human Body
(Model)

Fine Leak
Gross Leak

Reference
Method

Note

Ta=260°C±5°C
t = 10 ± 0.5sec

YES

YES

10

N/A

0

MIL-STD-750
2031

Ta= 245°C ± 5°C
t = 10 ± 1SEc

YES

YES

10

NtA

0

MIL-STD-883
2003

YES

YES

10

N/A

0

1500G,0.5ms
3 Times each direction YES
of X, Y and Z Axis

YES

10

NtA

0

MIL-STD-750 For
2016
Hermetic

20G,3Axis
f = 20 to 2000 cps
for 4min, 4 cycles

YES

YES

10

NtA

0

MIL-STD-883 For
Hermetic
2007

2000G
X, Y, Z Axis
1min for each Axis

YES

YES

10

N/A

0

MIL-STD-883 For
2001
Hermetic

R= 1.SKQ
C= 100pF
5 Discharge
V~ ±1000V

YES

YES

5

NtA

0

YES

-

5

N/A

0

YES

YES

45

10

1

Ta=35°C, 5% NaCI
24HRS

19 Latch-up Test
20

Sample
ACC.
LTPD
Size
No

Helium
Fluoro carbon

MIL-STD-883
1009A

MIL-STD-883
3015

-

. For
CMOS

MIL-STD-883 For
1014
Hermetic

Note) • N/A: Not available
• SOT-23, TO-92S PKG: PCT 48HR
• PRT: Process Reliability Test (all outgoing Lots)

=8SAMSUNG
Electronics

26

QUALITY and RELIABILITY

B) New Process, Wafer Fabrication Qualification
No

Test Item

Package
Discrete

Sample
Size

LTPD

L·IC

ACC
No

Ta = Top~max)
Vcc = Vcdmax)
STATIC, DYNAMIC
1000HRS

YES

-

45

10

1

Ta=Tj(max)
VCB = 0.8 X VCBO
1000HRS

-

YES

45

10

1

Ta=Tj(max)
1000HRS

YES

YES

45

10

1

Ta=121°C±2°C
RH = 100% 15 PSIG
168HRS

YES

YES

45

10

1

Test Condition

1

High Temperature
Operating Life (HOPL)

2

High Temperature
Reverse Bias (HTRB)

3

High Temperature
Storage (HTS)

4

Pressure Cooker
Test (PCn

5

Wet High Temperature
Operating Life (WHOPL)

Ta=85°C, RH =85%
Vcc = VCC(oPr)
1000HRS

YES

-

45

10

1

6

Wet High Temperature
Reverse Bias (WHTRB)

Ta=85°C, RH =85%
VCB = 0.8 X VCBO
1000HRS

-

YES

45

10

1

7

Thermal Shock (TIS)

- 65°C-+150° C(Uquid)
5min<10sec,5min
200 Cycles

YES

YES

45

10

1

8

Temperature Cycle (TIC)

- 65°C-+25°C-+150°C
10min, 5min, 10min
200 Cycles

YES

YES

45

10

1

qsSAMSUNG
Electronics

27

I

QUALITY and RELIABILITY

C) Package Sub·Assembly Qualification
Test Item

No

Test Condition

High Temperature
1 Reverse Bias
(HTRB)

2

3

4

High Temperature
Operating Life (HOPL)
Temperature Cycle

YES

45

10

1

For
Discrete

Ta = Topr(max)
Vcc = Vcdmax)
Static, Dynamic 500H RS

YES

YES

45

10

1

For L-IC

YES

YES

45

10

1

YES

-

45

10

1

- 65°C ..... 150°C (Liquid)
5min< 10sec, 5min
200 Cycles

YES

YES

45

10

1

260°C ±5°C
10± 1 sec

YES

YES

10

N/A

0

100 - 200 - 100Hz
20G, 5min, 5Times, X, Y, Z

-

YES

10

N/A

0

For Discrete,
others as
applicable

1500G,0.5ms
3 Times, X, Y, Z

-

YES

10

NiA

0

same as above

20000G
X, Y, Z Axis
1 min for each Axis

-

YES

10

NtA

0

same as above

-

65°C~25°C""'150°C

Pressure Cooker Test
(PCT)

RH = 100%, 15PSIG

Solder Heat Resistance
(StH)

7

Vibration (VariableFrequency)

8 Mechanical Shock (MIS)

9 Constant Acceleration

Note) •

Notes

YES

10min, 5min, 10min
200 Cycles

6

Sample
ACC
LTPD
Size
No

Ta=Tj(max)
Vce = Vceo x 0.8
500HRS

(TIC)

5 Thermal Shock (TIS)

Package
Plastic Hermetic

Ta=121°C±2°C
168HRS

N/A: not available

c8SAMSUNG
Electronics

28

QUALITY and RELIABILITY

Product Reliability (Quality Conformance) Monitors
Samsung implements periodic testing to monitor the ongoing reliability of its products. A subset of stresses used
for qualification are run; they are seen as most critical for basic device reliability. Formally this is known as the
Device Reliability Test System, or simply as DRT.
Lot-by-Iot infant mortality reliability testing is also accomplished at Samsung. The purpose of this is to verify process
integrity in a full QA step. Formally this is known as Process Reliability Testing, or more simply as PRT. Normally
a short term accelerated lifetest and package reliability test are done, although exceptions are made in the case
of special devices.
Although Sam sung scrupulously utilizes statistical controls throughout it's production process, DRT and PRT serve
as confirmation that indeed the customer does receive only high-grade units. The tables on the following give details
of DRT and PRT processing.

I

Quality Conformance Program

I

I
I

PRT
(Process Reliability Test)

ILT
(Infant Life Test)

I
I
DRT
(Device Reliability Test)

• Every Fab Lot

• 1 Processlmonth

• Once/6 mo. per device

• HOPL 5 168HR
• HTRB 5 "168HR
• PCT 48HR

• HOPL 168HR
• HTRS 168HR
(24hr read outs)

•
•
•
•
•
•
•

HOPL
HTRS
PCT
WHOPL
WHTRS
TIC
TIS

1000HR
1000HR
168HR
1000HR
1000HR
200CYC
200CYC

Note: Test descriptions given on following pages.
Quality Conformance Program

c8SAMSUNG
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29

I

QUALITY and RELIABILITY
DESCRIPTION
Samsung has established a comprehensive reliability program to monitor and ensure the ongoing reliability of the
linear IC family. This program involves not only reliability data collection and analysis on existing parts, but also
rigorous in-line quality controls for a" products.
Listed below are details of tests performed to ensure that manufactured product continues to meet Samsung's
stringent quality standards. In line quality controls are reviewed extensively in later sections.
The tests run by the quality department are accelerated tests, serving to model "real world" applications through
boosted temperature, voltage, and/or humidities. Accelerated conditions are used to derive device knowledge through
means quicker than that of typical application situtations. These accelerated conditions are then used to assess
differing failure rate mechanisms that correlate directly with ambient conditions. Fo"owing are summaries of various
stresses (and their conditions) run by Samsung on linear IC products.

HIGH TEMPERATURE OPERATING LIFE TEST (HOPL)
(T1=125°C, Vee = Vee max, statiC)
High temperature operating life test is performed to measure actual field reliability. Life tests of 1000HR to 2000HR
durations are used to accelerate failure mechanisms by operating the device at an elevated ambient temperature
(125°C). Data obtained from this test are used to predict product infant mortality, early life, and random failure
rates. Data are translated to standard operating temperatures via failure analysis to determine the activation
energy of each of the observed failures, using the Arrhenius relationship as previously discussed.

WET HIGH TEMPERATURE OPERATING LIFE TEST (WHOPL)
(Ta=85°C, R.H.=81%, Vee = Vee opt, static)
Wet high temperature operating life test is performed to evaluate the moisture resistanr.e characteristics of plastic
encapsulated components. Long time testing is performed under static bias conditions at 85°C/81 percent relative
humidity with nominalvoltages. To maximize metal corrosion, the biasing configuration utilizes low power levels.

INTERMITTENT OPERATING LIFE (IOPL)
(Pmax, 25°C, 2min on/2 min off)
This test is normally applied to scrutinize die bond thermal fatigue. A stressed device undergoes an "ON" cycle,
where there is thermal heating due to power dissipation, and an "OFF" cycle, where there is thermal cooling due
to lack of inputted power. Die attach (between die and package) and bond attach (between wire and die) are the
critical areas of concern.

HIGH TEMPERATURE STORAGE TEST (HTS)
(Ta= 125°C, UNBIASED)
High temperature storage is a test in which devices are subjected to elevated temperatures with no applied bias.
The test is used to detect mechanical instabilities such as bond integrity, and process wearout mechanisms.

PRESSURE COOKER TEST

(pen

(121°C, 15PSIG, 100% R.H., UNBIASED)
The pressure cooker test checks for resistance to moisture penetration. A highly pressurized vessel is used to
force water (thereby promoting corrosion) into packaged devices located within the vessel.

TEMPERATURE CYCLING (TIC)
(- 65°C to + 150°C, AIR, UNBIASED)
This stess uses a chamber with alternating temperatures of - 65°C and + 150°C (air ambient) to thermally cycle
devices within it. No bias is applied. The cycling checks for mechanical integrity of the packaged device, in
particular bond wires and die attach, along with metallpolysilicon microcracks.

THERMAL SHOCK (TIS)
(- 65°C to + 150°C, LIQUID, UNBIASED)
This stress uses a chamber with alternting temperatures of - 65°C to + 150°C (liquid ambient) to thermally cycle
devices within it. No bias is applied. The cycling is very rapid, and primarily checks for die/package compatibility.

c8SAMSUNG
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30

QUALITY and RELIABILITY
RESISTANCE TO SOLDER HEAT
(Unbiased, 260°C, 10 sec)
Solder Heat Resistance is performed to establish that devices can withstand the thermal effects of solder dip,
soldering iron, or solder wave operations.

MECHANICAL SHOCK
(Unbiased, 1500g, Pulse = 0.5msec)
This test determines the suitability of a device to be used in equipment where mechanical "shocks" may occur.
Such shocks result from sudden or abrupt changes produced by rough (non-standard) handling, transportation,
or field operations.

VARIABLE FREQUENCY VIBRATION
(Unbiased, Range = 100 to 2000Hz)
Variable Frequency Vibration is done to model the effects of differential vibration in the specified range. Die attach
and bonding integrity are particularly stressed, testing the mechanical soundness of device packaging.

CONSTANT ACCELERATION
(Unbiased, 10kg to 20kg)
This is an accelerated test designed to indicate types or modes of structural and mechanical weaknesses not
necessarily detectable in Mechanical Shock and Variable Frequency Vibration stressing.

RELATIVE STRESS COMPARISONS
Many stresses are run at Sam sung on many different devices. Through both theoretical and actual results, it was
clearly determined which stresses were most effective. Also established were the stresses which weren't fully
effective.
Comparisons have been made on the basis of defects able to be determined, efficiency in detection, and cost.
For the reader's benefit, Samsung provides the results of its conclusions on the following pages.

qsSAMSUNG
Electronics

31

•

QUALITY and RELIABILITY

COMPARISON OF RELIABILITY TEST METHODS·
Test
Method

Internal
Visual
Inspection

Defect

Lead Structure
Metalization
Oxide Film
Foreign Particles
Die Bond
Wire Bond
Contamination
Corroded Substrate

Effectiveness

Cost

Good

Slightly
Inexpensive
to Moderate

Remarks

This method of screening must be
performed for high reliability
devices. Cost is affected by the
degree of visual inspection

Very Good

Expensive

For use in design evaluation only

Extremely Good
Good
Good
Good
Good
Good
Good
Good

Moderate

Advantage to using this
screening method lies in the
ability t test die framel
header bonding, and to be able to
perform inspection after sealing.
However, some materials being
transparent to X-rays (for example,
AI and Si) are not able to be
analyzed. The use of the complex
test system results in cost six times
that of visual inspection.

Good

Very
Inexpensive

This is a highly desirable screening
method

Package
Seal
Die Bond
Wire Bond
Cracked Substrate
Thermal Mismatching

Good

Very
Inexpensive

This screening method is one of
the most effective for use

Thermal
Shock

Package
Seal
Die Bond
Wire Bond
Cracked Substrate
Thermal Mismatching

Good

Inexpensive

While this screening method is
similar to temperature cycling,
it enables high stress levels as
well. It is probably equal to the
temperature cycling method.

Constant
Acceleration

Lead Structure
Die Bond
Wire Bond
Cracked Substrate

Good

Moderate

Doubt exists as to the effectiveness
of screening aluminum wires
with stress levels in the range of
0-20,000 G

Infrared ray

Design (thermal)

Radiography

Die Bond
Lead Structure (Gold)
Foreign Particles
Manufacturing
(Gross Error)
Seal
Package
Contamination

High
Temperature
Storage

Electrical stability
Metal izat ion
Bulk Silicon
Corrosion

Temperature
Cycling

c8SAMSUNG
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32

QUALITY and RELIABILITY

COMPARISON OF RELIABILITY TEST METHODS
Test
Method

Defect

Effectiveness

(Continued)

Cost

Shock
(Without
Monitoring)

Lead Structure

Fairly Poor

Moderate

Drop shock testing is thought to
be inferior to constant acceleration
methods. However, the pneupactor
shock test is more effective. Shock
test is a destructive test method.

Shock
(With
Monitoring)

Particles
Intermittent Short
Intermittent Open

Fairly Poor
Fairly Good
Fairly Good

Expensive

Visual inspection or radiography
is more desirable for detection of
particles

Vibration
Fatigue

Lead Structure
Package
Die Bond

Fairly Poor

I

Package
Die Bond

Expensive

t
I

Wire Bond
Cracked
Substrage
Variable
Frequency

1

I

Fairly Poor

•

Remarks

This test is destructive
without merit.

I and

~1---

Expen. sive

,

v.~
Vibration
Wire Bond
(Without
Substrate
I
Monitoring)
i-V-ar-ia-b-'-e--+-F-o-re-i-g-n-p-a-rt'-ic-'-es---+---F-a-ir-,y-G-o-od--+I Very
The effectiveness of the method for
Frequency
Vibration
(Without
Monitoring)

Lead Structure
Intermittent Open

Good
Good

Random
Vibration
(Without
Monitoring)

Package
Die Bond
Wire Bond
Substrate

Good

Random
Vibration
(Without
Monitoring)

Forei gn Particle
Lead Structure
Intermittent Open

Fairly Good
Good
Good

Vibrational
Noise

Foreign Particles

Good

Radioisotope
Leak Test

I Package
I Seal

c8SAMSUNG
Electronics

Good

I Expensive

. detecting particles depends on the
type of particle

I

Expensive

This screening method is more
effective than variable frequency
vibration (without monitoring), when
used with equipment intended for
space vehicle operation, although it
is more expensive

Very

This is one of the most expensive
screening methods

I Expensive
I
I Expensive

).11MOderat;IThiS screening method is effe~tl;';--l
I

for detecting leakage in the range
atm. mllsec

I 10E6 -10E12

33

QUALITY and RELIABILITY

COMPARISON OF RELIABILITY TEST METHODS
Test
Method

Defect

Effectiveness

Cost

(Continued)

Remarks

Helium
Leak Test

Package
Seal

Good

Moderate

This screening method is effective
for detecting leak in the range
10E6 -10E12 atm. mllsec

Gross
Leak Test

Package
Seal

Good

Inexpensive

Effectiveness is dependent upon
volume. Testing is possible for
detecting leaks above 10E-3 atm.
mllsec.

High Voltage
Test

Oxide Film

Good

Inexpensive

Effectiveness Depends on Structure

Insulation
Resistance

Lead Structure
Metallization
Contamination

Fairly Good

Inexpensive

Intermittent
Operation

Metallization
Bulk Silicon
Oxide Film
Inversion/Channeling
Design Parmeter
Drift Contamination

Good

Expensive

AC
Operation

Metallization
Bulk Silicon
Oxide Film
Inversion/Channeli ng
Design Parmeter
Drift Contamination

Very Good

Expensive

DC
Operation

Basically the Same
as Intermittent
Operation

Good

Expensive

The AC operation life method is
more effective for any failure
mechanism

High
Temperature
AC
Operation

Same as AC
Operation Life
Test

Extremely Good

Very
Expensive

Failures are accelerated by
temperature. This is probably
the most expensive and one of the
most effective screening methods.

High
Temperature
Reverse
Bias

Inversion
/Channeling

Fairly Poor

Expensive

=8SAMSUNG
Electronics

Probably about the same as AC
operating life

34

QUALITY and RELIABILITY

RELIABILITY TEST RESULTS
This section is divided into two parts-actual and predicted test results. Actual test results are those derived via
accelerated stressing done by the QA department. Predicted results are calculated by taking actual test results
and derating them using statistical and mathematical models to determine device performance in "real-time"user
conditions.

ACTUAL TEST RESU LTS

Stress

Conditions

HOPL

Tj = 125°C
Vee = Vee max

WHOPL

85°C/81 % R.H.

Vee = Vee opt

Number of
Devices

Number of
Hours/Cycles

Number of Device
Hours/Cycles

Number of
Failures

% Failures per
1OOOH RS (Cycles)
(60% UCL)

180

1,000

180,000

0

0.51%/1K HR

180

1,000

180,000

0

0.51%/1K HR

IOPL

Ta= 25°C
Vee = Vee max

180

1,000

180,000

0

0.51%/1K HR

HTS

Ta= 125°C
Unbiased

135

1,000

135,000

0

0.67%/1K HR

PCT

121°C
15 PSIG

225

168

37,800

1

0.89%/168 HR

TIC

-65°C to 150°C
Air to Air

180

200

36,000

0

0.51 %/200 CL

TIS

- 65°C to 150°C
Liquid to Liquid

135

200

27,000

0

0.67%/200 CL

PREDICTED TEST RESULTS
The Arrhenius equation, which is reviewed in another section of this chapter, can be applied to derive typical "usercondition" device failure rates.
STESS: HOPL
180,000 Device Hours at 125°C
Average Activation Energy: 1.0 eV.
De-Rating to User Conditions Yields:
70°C Operation
Equivalent
Device Hours
1.93x107

55°C Operation
% Failures Per
1000 Hours
*FITs
(60% UCL)
0.0047

47

**MTTF
(years)

Equivalent
Device Hours

% Failures Per
1000 Hours
(60% UCL)

* FITs

**MTTF
(years)

2435

9.07 x 107

0.0010

10

11447

* FIT

: Failure in time or failure unit. Represents the
number of failures expected for 1.09 (one billion)
device hours.
** MTTF: Mean time to failures.

c8SAMSUNG
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35

•

QUALITY and RELIABILITY
PROCESS CONTROL
GENERAL PROCESS CONTROL
The general process flow in Samsung is shown in Figure 8. This illustration contains the standard process flow
from incoming parts and materials to customer shipment.

Acceptance inspection (according to acceptance inspection plan)
Process quality control
• Check of each condition by process quality control procedures
• Process inspection
• Lot control
• Equipment calibration and maintenance
100% Electrical Die Sorting
Process Quality Control and screening of infant mortality defects
• Mechanical screen
• Thermal shock
• Burn-in
Test

100% package sorting of electrical characteristics and marking

Reliability monitoring
1. PRT (Process Reliability Testing)
2. DRT (Device Reliability Testing)
• High Temperature Operating Life Test
• Environmental test
• Life Test
Finished Goods
Incoming
Inspection

Sampling Inspection
• Dimensions
• Visual
• Electrical characteristics
• Periodic calibration of measuring equipment
Stock control
• Age control
Sampling Inspection (when applicable)

Shipment
. General Process Flow Chart

c8SAMSUNG
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36

QUALITY and RELIABILITY
WAFER FABRICATION
Process Controls
The Quality Control program utilizes the following methods of control to achieve its previously stated objectives:
process audits, environmental monitors, process monitors, lot acceptance inspections, and process integrity audits.
Definitions
The essential method of the Quality Control Program is defined as follows:
1. Process Audit-Performed on all operations critical to product quality and reliability.
2. Environmental Monitor-Monitors concerning the process environment, i.e., water purity, temperature, humidity,
particle counts.
3. Process Monitor-Periodic inspection at designated process steps for verification of manufacturing inspection
and maintenance of process average. These inspections provide both attribute and variable data.
4. Lot Acceptance-Lot-by-Iot sampling. This sampling method is reserved for those operations deemed as critical,
and require special attention.
Environmental Monitor
Control Item

Process
Clean Room

•
•
•
•

0.1. Water

• Particle
• Bacteria
• Resistivity

Temperature
Humidity
Particle
Air Velocity

Insp. Frequency

Spec. Limit
•
•
•
•

Individual
Individual
Individual
Individual

24
24
24
24

Spec.
Spec.
Spec.
Spec.

• 5 ea/50ml (0.81L)
• 50 colonies/100ml (0.451L)
• Main (Line): More than
16 Mohm-cm
• Using point: More than
14 Mohm-cm

Hrs.
Hrs.
Hrs.
Hrs.

24 Hrs.
Weekly
24 Hrs.
24 Hrs.

* Instruments

•
•
•
•
•
•

FMS (Facility Monitoring System) HIAC/ROYCO
CPM (Central Particle Monitoring System-Dan Scientific)
Liquid Dust Counter Etch Rate
Filtration System for Bacterial check
Air Particle counter
Air Velocity meter

Process Monitor
Process

Control Item

Photo

•
•
•
•
•
•

Etch

• Etchant Temp.
• Etch Rate
• Spin Dryer N2 Flow
RPM
• Hard Bake Temp.
N2 Flow

Aligner N2 Flow Rate
Aligner Vacuum
Aligner Air
Aligner Pressure
Aligner Intensity
Coater Soft Bake
Temperature
Vacuum

c8 !e!"SUNG

Spec. Limit

Insp_ Frequency

•
•
•
•
•
•
•
•

Individual
Individual
Individual
Individual
Individual
Individual
1ndividual
Individual

Spec.
Spec.
Spec.
Spec.
Spec.
Spec.
Spec.
Spec.

Once/Shift
Once/Shift
Once/Shift
Once/Shift
Once/Shift
Once/Shift
Once/Shift
Once/Shift

•
•
•
•
•
•

Individual
Individual
Individual
Individual
Individual
Individual

Spec.
Spec.
Spec.
Spec.
Spec.
Spec.

Once/Shift
Once/Shift
Once/Shift
Once/Shift
Once/Shift
Once/Shift

37

•

QUALITY and RELIABILITY
Process Monitor (Continued)
Control Item

Spec. Limit

Insp. Frequency

Thin Film

• Cooling Water Temp.
• Thickness

·26±3°C
• Individual Spec.

Once/Shift
Once/Shift

CVD

• Pin Hole
• Thickness

• Individual Spec.
• Individual Spec.

Once/Shift
Once/Shift

Diffusion

• Tube Temp.
• C-V Plot Run
Tube
• Sheet Resistance
• Thickness

•
•
•
•
•

Once/Shift
Once/Shift
Once/10days
Once/Shift
Once/Shift

Process

Individual
Individual
Individual
Individual
Individual

Spec.
Spec.
Spec.
Spec.
Spec.

Raw Material Incoming Inspection
1. Mask Inspection
Defect Detection

• Pinhole & Clear-extension
• Opaque Projections &
Spots
• Scratch/Particle/Stain
• Substrate Crack/Glass-chip
• Others

Registration

• Run-out
(X-Y Coordinate)
• Orthogonality
• Drop-in Accuracy
• Die Fit/Rotation

Critical
Dimension
•

• Critical Dimension

All Masks

• Defect Size S 1.5/Lm
• Defect Density
sO.124EA/cm2

±0.75/Lm
20%
• All New Masks

±0.75/Lm
±0.50/Lm
±0.50/Lm

All Masks

Purchasing Spec.

• Instrument
• Auto mask inspection system for defect-detection (NJS 5MD-44)
• Comparator for registration (MVG 7X7)
• Automatic linewidth measuring system for CD (MPV-CD)
2. Wafer Inspection
Purpose

Insp. Items

Sample

Remarks

Structural

• Crystallographic Defect

All Lots

• Sirtl Etch

Electrical

• Resistivity
• Conductivity

All Lots

• Monitor Water

Dimensional

•
•
•
•

All Lots

TTV, NTV, Epi-thickness

Visual

Thickness
Diameter
Orientation
Flatness

• Surface Quality
• Cleanliness

TIR (FPD)
Local Slope
All Lots

Purchasing Spec.

• Instrument
• 4 point probe for resistivity (Kokusai VR-40A, Tencor sonogage, ASM AFPP)
• Flatness measuring system (Siltec)
• Epi. layer thickness gauge (Digilab FTG-12, Qualimatic S-100)
• Automatic Surface Insp. System (Aeronca Wis-150)
• Non-contact thickness gauge (ADE6034)

c8SAMSUNG
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38

QUALITY and RELIABILITY
In· Process Quality Inspection (FAB)
1. Manufacturing Section
Process Step

•

Frequency

Process Control Insp.

Oxidation

Oxide Thickness

All Lots

Diffusion

Oxide Thickness
Sheet Resistance
Visual

All Lots
All Lots
All Lots

Photo

Critical Dimension
Visual
Mask Clean Inspection

All Lots (MOS)
All Lots
All Masks with Spot Light (MOS)
or Microscope (BIP)

Etch

Critical Dimension
Visual

All Lots
All Wafers

Thin Film

Metal Thickness
Visual

All Lots
All Lots

Ion Implant

Sheet Resistance

All Lots (Test Wafer)

Low Temp.
Oxide

Thickness

All Lots

Visual

All Lots

E-Test

Electrical Characteristics

All Lots

Fab. Out

Visual

All Wafers

2. FAB, QC Monitor/Gate
Process Step

FAB, QC Insp.

Frequency

Oxidation

Oxide Thickness
C-V Test on Tubes
Visual

Once/Shift
Once/10 Days and After CLN
Once/Shift

Diffusion

Oxide Thickness
C-V Test on Tubes
Visual

Once/Shift
Once/10 Days and After CLN
Once/Shift

Photo

Critical Dimension
Visual
Mask CLN Inspection

All Lots (MOS)
Once/Shift
All Masks After 10 Times Use

Etch

Critical Dimension
Visual

All lots (MOS)
All Lots

Thin Film

C-V Test on Tubes
on Lots
Reflectivity

Once/10 Days and After ClN
Once/Shift
Once/Shift

Low Temp.
Oxide

Refractive Index,
Wt% of Phosphorus
Visual

1 Test Wafer/Lot
1 Test Wafer/Lot
1 Test Wafer/lot

E-Test

Measuring Data

All lots

Calibration

Instrument for Thickness
and C.D. Measuring

Once/week

c8SAMSUNG
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39

QUALITY and RELIABILITY
3. Photo/Etch process quality control
Process Flow

Process Step

MFG. Control Item

QC Monitor/Gate

Prebake

Oven PM, Temperature
Time

Photo Resist (PR)
-spin

Thickness Machine PM

Soft Bake

Oven PM, Temperature
Time

Temp. N2 Flow Rate

Align/Expose

Light Uniformity
Alignment, Focus Test
Mask Clean Inspection
Mask Clean Exposure
Light Intensity

Light Intensity
Mask Clean Insp.

Develop

Equipment PM
Solution Control

Vacuum

Develop
Check

PR/C.D.'S Alignment
Particles
Mask and Resist Defects

QC Inspection

Oven Particle Temp.
N2 Flow Rate

Critical Dimension (CD)

Hard Bake

Oven PM, Temperature
Time

Temp.
N2 Flow Rate

Etch

Etch rate, Equipment
PM & Settings, Etch
Time to Clear

Etchant Temp.
Etch Rate

Inspection

Over/Under

PR Strip

Machine-PM

Final Check

C.D.'S Over and under
Etch, Particles,
PR Residue, Defects,
Scratches

QC Inspection

Same as Final Check,
However, More Intense
on limited Sample
Basis. (AQL 6.5%)

Note: PM represents Preventive Maintenance
4. Reliability-related Interlayer Dielectric, Metallization, and Passivation Process Quality Control Monitor
Item

Frequency

Wt% Phosphorus Content of the Dielectric Glass

1/Shift

Metallization Interconnect

1/Month

AI Step Coverage

1/Month

Metallization Reflectivity

1/Shift

Passivation Thickness and Composition

1/Shift

Thin Film Defect Density

1/Shift

c8SAMSUNG
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40

QUALITY and RELIABILITY
Figure 9. General Wafer Fabrication Flow
Process Flow

Process Step

Major Control Item

I

Wafer and Mask
Input

Starting Material
Incoming Inspection

Mask: (See mask Inspection)
Wafer: (See wafer Inspection)

Wafer Sorting and
Labelling

Resistivity

Initial Oxidation

Oxide Thickness

Photo

• (See manufacturing section)
• (See FAB, QC Monitor/gate)

Inspection

• Critical Dimension
• Visual/Mech - Major: AQL 1.0%
- Minor: AQL 6.5%

QC Gate

• Critical Dimension

¢

Etch

• (See manufacturing section)
• (See FAB, QC Monitor/gate)

0

Inspection

• Critical Dimension
• Visual/Mech - Major: AQL 1.0%
- Minor: AQL 6.5%

QC Gate

• Critical Dimension
• Visual/Mech

Diffusion
Metalization

• (See in-process Quality Inspection)

E-test

• Electrical Characteristics

I
I

Diff'n
Metal

I

9

c8SAMSUNG
Electronics

41

QUALITY and RELIABILITY
Figure 9. General Wafer Fabrication Flow (Continued)
Process Flow

<>

Process Step

Major Control Item

QC Gate

• Electrical Characteristics

Back-Lap

• Thickness

Back Side Evaporation

• Thickness, Time
Evaporation Rate

Final Inspection

• All Wafers Screened
(Visual/Mech)

QC Fab. Final Gate

• Visual/Mech.
- Major: AQL 1.0%
- Minor: AQL 6.5%

EDS
(Electrical Die Sorting)

QC Gate

• Function Monitor

Sawing

Inspection

• Chip Screen

QC Final Inspection

•
•
•
•

AQL 1.0%
Fab. Defect
Test Defect
Sawing Defect

Die Attach

c8~SUNG

42

QUALITY and RELIABILITY
ASSEMBLY
The process control and inspection points of the assembly operation are explained and listed below:
1. Die Inspection:
Following 100% inspection by manufacturing, in-process Quality Control samples each lot according to internal
or customer specifications and standards.
2. Die Attach Inspection:
Visual inspection of samples is done periodically on a machine/operator basis. Die Attach techniques are monitored
and temperatures are verified.
3. Die Shear Strength:
Following Die Attach, Die Shear Strength testing is performed periodically on a machine/operator basis. Either
manual or automatic die attach is used.

DIE ADHESIVE THICKNESS MONITOR RESULTS. (JEOL SEM, JSM IC845)
4. Wire Bond Inspection:
Visual inspection of samples is complemented by a wire pull test done periodically during each shift. These
checks are also done on a machine/operator basis and XR data is maintained.
5. Pre-Seal/Pre-Encapsulation Inspection:
Following 100% inspection of each lot, samples are taken on a lot acceptance basis and are inspected
according to internal or customer criteria.

WIRE LOOP MONITOR RESULTS.

c8SAMSUNG
Electronics

CROSS SECTION INSPECTION FOR BALL BOND.

43

I

QUALITY and RELIABILITY
6. Seal Inspection:
Periodic monitoring of the sealing operation checks the critical temperature profile of the sealing oven for both
glass and metal seals.
7. Post-Seal Inspection:
Subsequent to a 100% visual inspection, In-Process Quality Control samples each for conformance to visual
criteria.

X-RAY MONITOR RESULT.'(PHILIPS MG161)
8. General Assembly Flow is shown in Figure 11.
Sampling Plans
1. Sampling plans are based on an AQL (Acceptable Quality Level) concept and are determined by internal or by

customer specifications.
2. Raw Material Incoming Inspection. (confinued)
Material

Inspection Item

Lead Frame

1)
2)
3)
4)

Wafer

1) Visual Inspection

AQL 0.65%

1) Visual Inspection
2) Bond Pull Strength Test
3) Bondability Test

n:5, C=O
n: 13, C=O
Critical Defect: 0.65%
Major Defect: 1.0%
Minor Defect: 1.5%
n: 5, C=O

AuiAI
Wire

Visual Inspection
Dimension Inspection
Function Test
Work Test

Acceptable Quality Level

4) Chemical Composition Analysis
1) Visual Inspection
2) Moldability Test
Molding

Compo~nd

3) Chemical Composition Analysis

c8SAMSUNG
Electronics

LTPD
LTPD
LTPD
LTPD

10%,
20%,
20%,
20%,

C=2
C=O
C=O
C=O

n: 5, C=O
Critical Defect: 0.15%
Major Defect: 1.0%
Minor Defect: 1.5%
n: 5, C=O

44

QUALITY and RELIABILITY

•
MOLDING COMPOUND INCOMING INSPECTION
(THERMAL ANALYSER, DUPONT 9900)
(Continued)
Material

Inspection Item

Visual Inspection
Dimension Inspection
Electro-Static Inspection
Hardness Test

Acceptable Quality Level

Packing Tube
& Pin

1)
2)
3)
4)

Solder

1) Visual Inspection
2) Weight Inspection
3) Chemical Composition Analysis

LTPD 20% C=O
LTPD 20% C=O
LTPD 20% C=O

Flux

1) Acidity Test
2) Specific Gravity Test
3) Chemical Composition Analysis

LTPD 20% C=O
LTPD 20% C=O
LTPD 20% C=O

Solder Preform

1) Visual Inspection
2) Work Test
3) Chemical Composition Analysis

AQL 1.0%
AQL 1.0%
AQL 1.0%

Coating Resin

1) Visual Inspection
2) Work Test
3) Chemical Composition Analysis

AQL 1.0%
AQL 1.0%
AQL 1.0%

1) Work Test

2) Mark Permanency Test

Critical Defect: 0.15%
Major Defect: 1.0%
Minor Defect: 1.5%
n: 5, C=O

Chip Carrier

1)
2)
3)
4)

Visual Inspection
Dimension Inspection
Electro-Static Inspection
Hardness Test

LTPD 15% C=2
LTPD 15% C=O
n: 5, C=O
n: 5, C=O

Vinyl Pack

1) Visual Inspection
2) Work Test
3) Electro-Static Inspection

LTPD 20% C=O
LTPD 20% C=O
LTPD 15% C=O

Ag Epoxy

1) Work Test
2) Chemical Composition Analysis

n:8, C=O
n:8, C=O

Letter Marking

1) Visual Inspection
2) Work Test

Spare Parts
& Others

1) Dimension Inspection
2) Visual Inspection

Marking Ink

qsSAMSUNG
Electronics

LTPD 15%, C=2
LTPD 15% C=2
n: 5, C=O
n: 5, C=O

n:5, C=O
n:5, C=O

45

QUALITY and RELIABILITY
3. In-Process Quality Inspection

A. Assembly Lot Acceptance Inspection
(1) Acceptance quality level for wire bond gate inspection
Defect Class

Critical Defect

Major Defect

Minor Defect

Inspection Level

AQL 0.65%

AQL 1.0%

AQL 1.5%

Type of Defect

-

Missing Metal
Chip Crack
No Probe
Epoxy on Die
Mixed Device
Wrong Bond
Missing Bond

-

Diffusion Defect
Ink Die
Exposed Contact
Bond Short
Die Lift
Broken Wire

-

Metal Missing
Metal Adhesion
Pad Metal Discolored
Tilted Die
Die Orientation
Partial Bond

-

Oxide Defect
Probe Damage
Metal Corrosion
Incomplete Wetting
Weakened Wire

Adjacent Die
Passivation Glass
Die Attach Defect
Wire Loop Height
Extra Wire

-

Contamination
Ball Size
Wire Clearance
Bond Deformation

.-

(2) Acceptance quality level for MoldlTrim gate inspection
Defect Class

Inspection Level

Kind of Defect

Critical Defect

AQL 0.15%

-

Incomplete Mold
Void, Broken Package
Misalignment

-

Deformation
No Plating
Broken Lead

Major Defect

AQL 0.4%

-

Ejector Pin Defect
Package Burr
Flash on Lead

-

Crack, Lead Burr
Rough Surface
Squashed Lead

Lead Contamination
Poor Plating
Package Contamination

Bent Lead

AQL 0.65%

-

-

Minor Defect

B. In-process monitor inspection
Inspection Item

Frequency

Reference

Die Shear Test
Bond Strength Test
Solderability Test
Mark Permanency Test
Lead Integrity Test
In-Process Monitor
Inspection for Product
• X-Ray Monitor
Inspection for Molding
• Monitor Inspection
for Production Equipment

Each Lot
Each Lot
Weekly
Weekly
Weekly
4 Times/Shift/Each Process

MIL-STD-883C,2019-2
MIL-STD-883C,2011-4
MIL-STD-883C,2003-3
MIL-STD-883C, 2015-4
MIL-STD-883C, 2004-4
Identify for Each ~ontrol Limit

2 Times/Shift/Mold Press

Identify for Each Control Limit

2 Times/Shift/Each Unit of
Equipment

Identify for Each Control Limit

•
•
•
•
•
•

c8SAMSUNG
Electronics

46

QUALITY and RELIABILITY
4. Outgoing quality inspection plan (LTPD)
Defect Class

Critical Defect
electrical
visual
Major

Minor

Discrete

LSI

Kind of Defect

1%

2%

Open, short
Wrong configuration, no marking

Defect
electrical
visual

1.5%

3%

Items which affect reliability most strongly

Defect
electrical
visual

2%

5%

Items which minimally or do
not affect reliability at all
(cosmetic, appearance, etc.)

·c8SAMSUNG
Electronics

I

47

QUALITY and RELIABILITY
Figure 10. General Assembly Flow
Process Flow

Major Control Item

Process Step

y

9

Wafer
Wafer Incoming
Inspection
Tape Mount
Sawing Q.C. Monitor

¢

Q.C. Wafer Incoming Inspection AQL 4.0%

Q.C. Monitoring:
- Chip-out
- Crack
- Sawing-speed
- D.1. Purity

-

Visual Inspection

100% Screen:
- FAB Defect
- EDS Test Defect
- Sawing & Scratch Defect

Q.C. Gate

1st AQL 1.0%
Reinspection AQL: 0.65%

Scratch
Sawing Discoloration
Cut Count
CO 2 Bubble Purity

--

I

Lead Frame (LlF)
Lead Frame Incoming

~~

*Q.C.LlF Incoming Inspection
1. Acceptance Quality Level
- Dimension LTPD 20%, C=O
- Visual & Mechanical: LTPD 10%, C=2
- Functional Work Test: LTPD 10%, C = 2

Die Attach (D/A)
Q.C. Monitor

I
I

*Q.C.D/A Monitor Inspection
1. Bond force
2. Frequency: 4 Times/Station/Shift
3. Sample: 24 ea Time
4. Acceptance Criteria

I

II
I

~l

Detect

Acceptance

Critical

a

Major

1

I

R~~I
2

I

Cure

c8SAMSUNG
Electronics

48

QUALITY and RELIABILITY
Figure 10. General Assembly Flow (Continued)
Process Flow

Process Step

Q.C. Monitor

<>

Major Control Item

•

*Q.C. Cure Monitor Inspection
1. Control Item
- Temperature
- In/out Time
2. Frequency
- 1 Time/Shift

Au Wire
Bonding Wire
Incoming Inspection

I

*Q.C Au Wire Incoming Inspection
1. Visual Inspection: N 5, C 0
2. Bond Pull Test Strength Test: N
3. Bondability Test
....:... Critical Defect: AQL 0.65%
- Major Defect: AQL 1.0%
- Minor Defect: AQL 1.5%

=

=

=13, C =0

Wire Bonding (W/B)

100% Visual
Inspection

Q.C. Monitor

*Q.C. W/B Monitor Inspection
1. Frequency: 6 Times/Mach/Shift

c---

Q.C. Gate

1. Q.C. Acceptance Quality Level
- Critical Defect: AQL 0.65%
- Major Defect: AQL 1.0%
- Minor Defect: AQL 1.5%

Mold Compound
Incoming Inspection
Mold

*Moldability Test
- Critical Defect: AQL 0.15%
- Major Defect: AQL 1.0%
- Minor Defect: AQL 1.5%

Mold
Q.C. Monitor

c8SAMSUNG
Electronics

*Q.C. Mold Monitor Inspection
1. In-Process Monitor Inspection
- Frequncy: 4 Times/Station/Shift
- Sample: 200 UnitslTime
2. Acceptance Quality Level
- Critical Defect: AQL 0.25%
- Major Defect: AQL 0.4 %

49

QUALITY and RELIABILITY
Figure 10. General Assembly Flow (Continued)
Process Flow

n
16

Process Step

Major Control Item

Cure
Q.C. Monitor

*Q.C. Cure Monitor Inspection
1. Control Item
- Temperature
- In/out Time
2. Frequency
- 1 Time/shift

Deflash
Q.C. Monitor

I

*Q.C. peflash Monitor Inspection
1. Control Item
- Pressure
- Belt Speed
- Visual/Mechanical Inspection
2. Frequency: 4 Times/Mach/Shift
3. Identify each Defect Control Limit

TRIM/BEND

)-

I

YI

Q.C. Monitor

*Q.C. Trim/Bend Monitor Inspection
1. Visual Inspection
2. Frequency: 4 Times/Station/Shift

Solder

100% Visual Inspection

Q.C. Monitor

*Q.C. Solder Monitor Inspection
1. Frequency: 4 Times/Mach/Shift
2. Criteria
- Critical Defect: AQL 0.65%
- Major Defect: AQL 1.0%

Q.C. Gate

*Q.C. Mold Gate
- Acceptance Criteria
Critical Defect: AQL 0.15%
Major Defect: AQL 0.4%
Minor Defect: AQL 0.65%

Test

100% Electrical Test

Q.C. Monitor

Correlation Sample Reading for Initial
Device Test

Mark

100% Visual Inspection

c8SAMSUNG
Electronics

50

QUALITY and RELIABILITY

Figure 10. General Assembly Flow (Continued)
Process Flow

o

Process Step

Major Control Item

PRT Monitoring
(Process Reliability
Testing)

1. PRT
- HOPL (168 HRS), PCT (48 HRS)
- Other (when applicable)
2. Acceptance Criteria: LTPD 10%

Q.C. Monitor

*Q.C. Marking Monitor Inspection
- Frequency: 4 Times/Station/Shift
- Sample: 24 UnitslTime
- Identify for Each C.L.
- Acceptance Criteria
Defect

Acceptance

Critical

o

Major

I

I

<>

I

Reject

2

Q.C. Gate

*Q.C. Final Acceptance Level
- Critical Defect: AQL 0.15%
- Major Defect: AQL 0.4%
- Minor Defect: AQL 0.65%

Q.A. Gate

*Q.C. Incoming Inspection
1. Critical Defect:
- Electrical Test: LTPD
- Visual Test:
LTPD
2. Major Defect:
- Electrical Test: LTPD
- Visual Test:
LTPD
3. Minor Defect:
- Electrical Test: LTPD
- Visual Test:
LTPD

2% (N = 116, C = 0)
2% (N =116, C=O)
3% (N = 116, C = 1)
3% (N = 116, C = 1)
5% (N = 116, C = 2)
5% (N = 116, C = 2)

Stock

* Age Control

Q.A. Gate

*Q.A. OutgOing Inspection
1. Quantity
2. Customer
3. Packing
4. Sampling Inspection (when applicable)
- Sampling plan is same as incoming
Inspection

Shipment

c8SAMSUNG
Electronics

51

QUALITY and RELIABILITY
SAMSUNG's BEST PROGRAM
The SAMSUNG Best Program has been designed to offer the customer an alternative to standard off-the-shelf plastic
encapsulated LI!(JEAR circuits. The Best Program will significantly reduce incoming inspection requirements as
well as early device failures (infant mortalify). These results are achieved by a tightened AQL inspection plan and
a burn-in of each unit for 160 + 8, - 0 hours at 125°C or equivalent conditions established from a time/temperature
regression curve.
The AQL Plan. Acceptable Quality Levels (AQL) are a measure of the quality of outgoing LINEAR circuits. These
levels are established by the manufacturer to show the process percent defective being produced and to ensure
that the customer is receiving material that meets his requirements. The SST Best Program has tightened these
AQL levels to a point at which incoming inspection by the customer is no longer a necessity. Best product quality
is monitored significantly more closely than standard product; those lots which fall the AQL level are 100% reworked
before resubmission to the AQL gate.
The Reliability Plan. Reliability is the statistical probabi~ity that a product will give satisfactory performance for
a specified period of time when used under specified conditions. A typical rate curve is shown below:

INFANT
MORTALITY
I

W
I-

«

a:
w
a:

:::J

....J

«
u..
o

RANDOM FAILURES AT A
LOW CONSTANT FAILURE RATE

~

____ _____________________________
~

BURN INI
PERIOD 1

OPERATING LlFE--

~-~-

eliability theory assumes that devices fail according to the above curve. When a group of devices is manufactured a small portion of the units will be inherently weaker than the average. These weak units will probably fail
during the first few hours of operation-hence the term "infant mortaH!y." If the units are burned-in however, thereby
allowing the weak units to fail, there is a much lower probability that those finally put into system use will fail.

The SAMSUNG Best Flow. In order to achieve an extremely high quality unit and reduce infant mortality failures
the following flow has been established:

c8SAMSUNG
Electronics

52

QUALITY and RELIABILITY

Process Flow

FLOW CHART

DESCRIPTION

I

I

I

ENCAPSULA TION
MOLDING COMPOUND ULTRA PURE FOR LINEAR
APPLICA nONS

I

I

POST MOLD BAKE
6 HOURS AT 175 DEG. C.
CURES PLASTIC
STRESSES ALL WIRE BONDS AND DIE

I

I

I
I

OIS FUNCTIONAL ELECTRICAL

100% TESTING
OPENS/SHORTS AND INTERMITTENTS REMOVE

I

HIGH TEMPERATURE BURN-IN
160 HOURS AT 125 DEG. C. OR EQUIVALENT
CONDITIONS ESTABLISHED FROM A TIME/
TEMPERATURE REGRESSION CURVE. 0.96 eV

I

FULL FUNCTIONAL AND PARAMETRIC
ELECTRICAL TESTING
100% ELECTRICAL TESTING AC, DC
88 DEG. C.

§

c8SAMSUNG
Electronics

I

WAFER FABRICATION
LINEAR PROCESS
CV PLOTS
OXIDE THICKNESS MEASUREMENTS
OPTICAL INSPECTIONS
SEM ANALYSIS

I

TIGHT AQL SAMPLING PLAN
ELECTRICAL-0.05% AQL AT 88 DEG. C.
MECHANICAL-O.o1% AQL CRITICAL & MAJOR
SHIP UNITS

53

QUALITY and RELIABILITY

RELIABILITY AND PREDICTION THEORY
RELIABILITY
Reliability can be loosely characterized as long term product quality.
There are two types of reliability tests: those performed during design and development, and those carried out
in production. The first type is usually performed on a limited sample, but for long periods or under very accelerated
conditions to investigate wearout mechanisms and determine tolerances and limits in the design process. The
second type of tests is performed periodically during production to check, maintain, and improve the assured quality
and reliability levels. All reliability tests performed by Samsung are under conditions more severe than those
encountered in the field, and although accelerated, are chosen to simulate stresses that devices will be subjected
to in actual operation. Care is taken to ensure that the failure modes and mechanisms are unchanged.

FUNDAMENTALS
A semiconductor device is very dependent on its conditions of use (e.g., junction temperature, ambient temperature, voltage, current, etc.). Therefore, to predict failure rates, accelerated reliability testing is generally used. In
accelerated testing, special stress conditions are considered as parametrically related to actual failure modes.
Actual operating life time is predicted using this method. Through accelerated stresses, component failure rates
are ascertained in terms of how many devices (in percent) are expected to fail for every 1000 hours of operation.
A typical failure rate versus time of activity graph is shown below (the so-called "bath tub curve")
>-(1)

Reduction due to
Failure t-----l.....---~-~-----7II:...-..;....r_- preventive maintenance
• m=1
• m: SHAPING PARAMETER
rate
s ern/CondUct
:----.., - - - __
Specified
Failure Rate
(rn ::: 0 5 oor Devices
. - .95)
TIME

Initial
Random Failure period
Failure period

Wear-Out Failure period

Figure 3_ Failure Rate Curve ("Bath Tub Curve")
During their initial time period, products are affected by "infant mortality," intrinsic to all semiconductor technologies.
End users are very sensitive to this parameter, which causes early assembly/operation failures in their own
system. Periodically, Samsung reviews and publishes life time results. The goal is a steady shift of the limits as
shown below.
>-(1)

Failure
Rate

\jl--+---'--------'-:
£',>-(1)

I

I

I

I

~

6(1) IREDUCED

--TIME

Figure 4. Failure Rate

=8SAMSUNG
Electronics

54

QUALITY and RELIABILITY

ACCELERATED HUMIDITY TESTS
To evaluate the reliability of products assembled in plastic packages, Samsung performs accelerated humidity
stressing, such as the Pressure Cooker Test (PCT) and Wet High Temperature Operating Life Test (WHOPL).
Figure 5 shows some results obtained with these tests, which illustrate the improvements in recent years. These
improvements result mainly from the introQuction of purer molding resins, new process methods, and improved
cleanliness.
1980

99.9
99

I

I

90
w

a:

3
~
I-

ifi
()

I
I

70
50

1982

30
20

II

...w
>

/~

1/

a: 10
w

./

5

5

J

/

/h

If

~

:=;;
~

/'"

If'
1985

1986

'"

,;'

()

0.5
..

~

_-

--

V'~

0.1
10

HOURS

1(J2

Figure 5. Improvement in Humidity Reliability

ACCELERATED TEMPERATURE TESTS
Accelerated temperature tests are carried out at temperatures ranging from 75°C to 200°C for up to 2000 hours.
These tests allow Samsung to evaluate reliability rapidly and economically, as failure rates are strongly dependent
on temperature.
The validity of these tests is demonstrated by the good correlation between data collected in the field and laboratory
results obtained using the Arrhenius model. Figure 6shows the relationship between failure rates and temperatures
obtained with this model.

25

40

60

80

100

125

150

180 200 T (0G)

Figure 6. Failure Rate Versus Temperature

=8SAMSUNG
Electronics

55

I

QUALITY and RELIABILITY
FUNDAMENTAL THEORY FOR ACCELERATED TESTING
Accelerated life testing is powerful because of its strong relation to failure physics. The Arrhenius model, which
is generally used for failure modelling, is explained below.
1. Arrhenius model
This model can· be applied to accelerated Operating Life Tests and uses absolute (Kelvin) temperatures.
L = A + EalK·Tj
L : Lifetime
A : Constant
Ea : Activation Energy
K : Boltzman's constant
Tj : Absolute Junction temperature
If Lifetimes L1 and L2 correspond to Temperatures T1 and T2:
L1 = L2 exp

Ea

K

1
1
(T1 - T2 )
/

/

Lifetime(L)

Temperature 11T (OK-1)
Actual junction temperature should always be used, and can be computed using the following relationship.
Tj =Ta+(P x

0ja)

Where Tj = Junction temperature
Ta = Ambient temperature
P = Actual power consumption
ja = Junction to Ambient thermal resistance (typically 100 degrees celsius/watt for a 16-Pin PDIP).

o

2. Activation Energy Estimate
Clearly the choice of an appropriate activation energy, Ea, is of paramount importance. The different mechanisms
which could lead to circuit failure are characterized by specific activation energies whose values are published
in the literature. The Arrhenius equation describes the rate of many processes responsible for the degradation
and failure of electronic components. It follows that the transition of an item from an initially stable condition to
a defined degraded state occurs by a thermally activated mechanism. The time for this transition is given by an
equation of the form:
MTBF = B EXP (EalKT)
MTBF = Mean time between failures
B
= Temperature-independent constant
MTBF can be defined as the time to suffer a device degradation. The dramatic effect of the choice of the Ea value
can be seen by plotting the MTBF equation. The acceleration effect for a 125°C device junction stress with respect
to lO°C actual device junction operation is equal to 1000 for Ea 1eV and 1 for Ea 0.3eV.

=

c8SAMSUNG
Electronics

=

56

QUALITY and RELIABILITY

Some words of caution are needed about published values of Ea:
A. They are often related to high-temp tests where a single Ea (with high value) mechanism has become dominant.
B. They are specifically related to the devices produced by that supplier (and to its technology) for a given period
of time
C. They could be modified by the mutual action of other stresses (voltage, mechanical, etc.)
D. Field device-application condition(s} should be considered.

(Activation energy for each failure mode)
Failure Mechanism

Ea

Contamination
Polarization
Aluminum Migration
·Trapping
Oxide Breakdown
Silicon Defects

1-1.4 eV
1 eV
0.5 -1 eV
1 eV
0.3 eV
0.3 -0.5 eV

THE CORRECT PROCEDURE

ACCELERATED TEST

t

CALCULATED AT TEST CONDITIONS
AND WITH A CERtAIN CONFIDENCE
LEVEL
FAILURE ANALYSIS

I

CHOICE OF Ea---CALCULATED AT OTHER
TEMPERATURES

Time
1.4 ey- f---1 eV

106

,
0

&i
u.

/

,

0

j

1()3

0.8e~

,

II

J

1()4

c:

~CD

/

/

105

,

/
.0.5~

/

O.4e~

CD

0
0
<{

// /

102

/)' '/

10'

10B

,

"

~

./

-

-0.3e~

~

. / . / ~-- ~

~-I

250

200 175 150 125

100

75

50

T(°C)

Junction Temperature

Figure 7. Acceleration Factor Vesus Temperature

c8SAMSUNG
Electronics

57

•

QUALITY and RELIABILITY

Failure Rate Prediction
Accelerated testing defines the failure rate of products. By derating the data at different conditions, the life
expectancy at actual operating conditions can be predicted. In its simplest form the failure rate (at a given temperature)
is:
N
FR=[5H
Where FR =
N =
D =
H =

Failure Rate
Number of failures
Number of components
Number of testing hours

If we intend to determine the FR at different temperatures, an acceleration factor must be considered. Some failure
modes are accelerated via temperature stressing based upon the accelerations of the Arrhenius Law.
For two different temperatures:
FR (T1)= FR (T2) exp

Ea
K

1
(T2 -

1
T1)

FR (T1) is a point estimate, but to evaluate this data for an interval estimate, we generally use a X2 (chi square)
distribution. An example follows:
Failure Rate Elaluation
Unit: %/1000HR
Dev. x Hours
at 125°C

Fail

1.7 x 106

2

Failure Rate at 60% Confidence Level
Point Estimate
0.18

I
I

85°C
0.0068

I
I

70°C
0.0018

I
I

55°C
0.00036

The activation energy, from analysis, was chosen as 1.0 eV based upon test results. The failure rate at the lower
operating temperature can be extrapolated by an Arrhenius p19t.

c8SAMSUNG
Electronics

58

IIIII
I

LINEAR ICs

FUNCTION GUIDE

1. TELECOMMUNICATION APPLICATION FUNCTION
Application

Type

Circuit Function

Package

'Tone Ringer

KA2410
KA2411

8 DIP

Adjustable warbling and 2 frequency tone
External triggering or ringer disable (KA2410)
Adjustable supply initiating current (KA2411)
Built-in hysteresis

Tone Ringer with
Bridge Rectifier

KA2418

8 DIP

Protect against over voltage
Low current consumption
Allow the parallel operation of 4 devices
Built-in hysteresis
External component's are minimized
High output voltage

DTMF Dialer

KS5808

16 DIP

Direct telephone line operation
Standard 2 of 8 key board use
Tone output: Bipolar output
Mute output: N-CH open drain

ttKS5809

16 DIP

Low power dfssipation
Single contact key board use
Tone output: Bipolar output
Mute output: N-CH open drain

ttKS5810

16 DIP

Low power dissipation
Single contact key board use
31 digit redial (Column 4 keys)
Tone output: Bipolar output
Mute output: N-CH open drain

ttKS5811

16 DIP

Low power dissipation
Standard 2 of 8 key board use
31 digit redial (# key)
Tone outp'u-t: Bipolar output
Mute output: N-CH open drain

KA2413

16 DIP

Wide operating line voltage and current range
Short start up time
External components are minimized
Internal protection of all inputs

KS5805A/B

18 DIP

KS5805A: Pi n 2; Vref
KS5805B: Pin 2; Tone output
RC oscillator used as frequency reference
DP out, 17 digit redial'

tKS58C/D05

18 DIP

KS58C05: Pin 2; Vref
KS58D05: Pin 2; Tone output
RC oscillator used as frequency reference
DP output, 32 digit redial

tKS58E05

16 DIP

DP output

Pulse Dialer with
Redial

•

RC oscillator used as frequency reference
32 digit redial

qsSAMSUNG
Electronics

61

LINEAR ICs

FUNCTION GUIDE

TELECOMMUNICATION APPLICATION
Application

DTMF/Pulse
Switchable Dialer
DTMF/Pulse
Switchable with
10 No Memory

(Continued)

Package

Circuit Function

22 DIP
18 DIP

Tone/pulse switchable dialing, touch key or slide switch
32 digit redialing & PABX auto-pause time
Make/break ratio pin selectable

tKS5822

22 DIP

10 No x 16 digit memory including a redial memory
Including PABX auto pause time
10 pps/20 pps pin selectable
Make/Break pin selectable
On/Off hook memory

tKS58A/B/CID23

18 DIP

10 No x 16 digit memory including a redial memory
Including PABX auto pause time
Make/Break pin selectable

Type

KS58A/B/CID19
KS58A/B/CID20

Speech Network

KA2412A

14 DIP

Transmit/Receiver amplifier
Side tone control
On Chip regulator

Low Voltage
Speech Network
with Dialer Interface

KA2425A/B

18 DIP

Low Voltage Operation (1.5V)
Tx, Rx & side tone gain set by external resistor
Loop length equalization for Tx, Rx & sidetone
Provides regulated voltage for CMOS dialer
DTMF level adjustable with a single resistor
A: Mute active low B: Mute active high

18 DIP

Full DTMF Receiver
Provides DTMF high and low group filtering
Dial tone suppression
Adjustabe acquisition and release times
Integrated bandsplit filter and digital decoder functions
High quality and performance
Single + 5 Volt power supply

DTMF Receiver

tKT3170

Tone Decoder

LM567C/L

8 DIP
t8 SOP

Touch tone decoding
Sequential tone decoding
Communication paging
High stable center frequency
LM567L: Micropower (4mW at 5V) dissipation

FM IF Amplifier

MC3361

16 DIP
t16 SOP

Small current dissipation (Typ. 3.5mA: Vee 4.0V)
Excellent input sensitivity
Communication paging
Used to cordless telephone parts required
Work from 1.8V to 7.0V

Codec

KT5116
tKT8520

ttKT8521

c8SAMSUNG
Electronics

16 CERDIP /A--Law: KT5116
24 CERDIP wLaw: KT8520
A-Law: KT8521
± 5V operation
22 CERDIP Low power consumption
Synchronous or asynchronous operation

62

LINEAR ICs

FUNCTION GUIDE

TELECOMMUNICATION APPLICATION
Application

Codec Filter

Combo Codec

Type

KT3040/A

tKT8554
tKT8557
tKT8564
ttKT8567

TSAC

tKT8555

Package

16 CERDIP

(Continued)
Circuit Function

Exceeds all D3/04 and CCITI spec.
± 5V operation
Low power consumption
20dB gain adjust range
Sin XIX correction in receive filter
TIL and CMOS compatible logic

I

16 CERDIP Exceeds all D3/D4 and CCITI spec.
16 CERDIP Complete CODEC and filtering system including
± 5V operation
20 CERDIP Low power consumption
20 CERDIP TIL and CMOS compatible logic
Receive push-pull power amp (KT8564/7)
20 CERDIP Controls up to 8 COMBO CODEC/Filters
Low power consumption
Single 5V operation
Up to 32 time slots per frame

Line Driver

MC1488
ttKS5788

14 DIP
t14 SOP

Conformance EIA standard No. RS-232C & V28 (CCITT)
Quad line driver
Interface between data terminal equipment (DTE)
and data communication equipment (DC E)
Current limited output: ± 10mA typo
Power-off source impedance 300 ohms min.
Compatible with DTL and TIL, HCTLS families
Flexible operating supply range
KS5788: Low power CMOS version

Line Receiver

MC1489/A
ttKS5789A

14 DIP
t14 SOP

Conformance EIA standard No. RS-232C & V28 (CCITT)
Quad line receiver
Interface between data terminal equipment (DTE)
and data communication equipment (DCE)
Input signal range ± 30 volts
Input threshold hysteresis built in
Response control
a) Logic threshold shifting
b) Input noise filtering
KS5789A: Low Power CMOS version

Line Transceiver

ttKA2654

8 DIP

Conformance EIA Standard No RS-232C & V28 (CCITT)
One Driver & One Receiver on chip
Wide supply voltage (±4.5V-±15V)
Including reference regulator
Response control provides
TIL compatible

ttKS5706

16 DIP
16 SOP

Conformance EIA Standard No RS-232 & V28 (CCITI)
Low power consumption (CMOS)
3 Drivers & 3 Receivers one chip

,c8SAMSUNG
Electronics

63

LINEAR ICs

FUNCTION GUIDE

TELECOMMUNICATION APPLICATION
Application

Peripheral
Driver Array

(Continued)

Type

Package

tKA2655/6/7/8/9

16 DIP
16 SOP

Including 7 NPN darlington-connected transistors
These arrays are well suited for driving lamps,
relays, or printer hammers in a variety of industrial
and consumer applications.
High breakdown voltage and internal suppression
diodes insure freedom from problems associated
with inductive loads

Circuit Function

Fluorescent
Display Driver

KA2651

18 DIP

Consisting of 8 NPN darlington output stages and
associated common-emitter input stages
Digit or segment drivers
Low input current, internal output pull-down resistor
High output breakdown voltage
Single or split supply operation

8·Channel
Source Driver

KA2580A

18 DIP

TIL, CMOS, PMOS, NMOS compatible
High output current ratings
Internal transient suppression
Efficient input/output pin structure
Drive telephone relays, incandescent lamps, and LEOS

KA2588A

20 DIP

KA2588A: Separated logic and driver supply line

24 DIP
40 DIP

The data formatting and control to interface serial
asynchronous data communications between main
system and subsystems.
Low power, high speed CMOS process
Serial/parallel conversion of data 8 and 9 bit
transmission
Programmable control register
Optional ..;- 1, ..;- 16, and ..;- 64 clock modes
Peripheral/modem control functions
Double buffered
Included 4 UART in one chip (KS5812)

Universal
Asynchronous
Receiver and
Transmitter (UART)

ttKS5824
KS5812

t New Product
tt Under Development

c8SAMSUNG
Electronics

64

FUNCTION GUIDE

LINEAR ICs

2. VOLTAGE REGULATOR
A. 3·Terminal Fixed Positive Voltage Regulator
Function

Type

Package

Features

Application

5V, 6V, 8V, 12V, 15V, 18V and
Output current in excess of 3A
Internal thermal overload protection 24V fixed output voltage
Internal short circuit current limiting 5V output voltage

Very High
Output
Current (3A)

KA78T05
ttKA78TXX

TO·220
TO·3P

LM323

TO·3P

High Output
Current
(l o =1A)

MC78XX
series

TO·220

5V, 5.2V, 6V, 8V, 8.5V, 9V, 10V,
Maximum output current 1A
External components are minimized 11V, 12V, 15V, 18V and
24V fixed output voltage
Internal protection circuit for
output short
Positive voltage regulator
Variable application control

tKA340XX
series

TO·220

Output current in excess of 1A
Very low line regulation: 0.01 %
Very low load regulation: 0.3%

TO·220

Maximum output current 500mA
5V, 6V, 8V, 10V, 12V, 15V, 18V,
External components are minimized 20V and 24V fixed output
Internal protection circuit for
voltage
output short
Positive fixed output voltage
regulator
Variable application circuit

Medium
Output
Current
(10 = 500mA)

MC78MXX
series

Low Output
Current
(l o =100mA)

MC78LXXAC TO·92
series

5V,6V, 8V, 9V, 10V, 11V, 12V,
15V, 18V and 24V fixed output
voltage

Output current in excess of 100mA 2.6V, 5V, 6.2V, 8V, 8.2V, 9V, 12V
External components minimized
15V, 18V and 24V fixed output
voltage
Internal protection circuit for
output short
Positive voltage regulator
Variable application circuit

B. 3·Terminal Fixed Negative Voltage Regulator
Function

Type

Package

Features

Application

High Output
Current
(l o =1A)

MC79XX
series

TO·220

Output current in excess of 1A
-2V, -5V, -6V, -8V, -12V,
Internal thermal overload protection -15V, -18V and - 24V fixed
Internal short circuit current limiting 'output

Medium
Output Current
(l o =500mA)

MC79MXX
series

TO·220

Output .current in excess of 500mA -5V, -6V, -8V, -12V, -15V,
Internal thermal over load protection - 18V and - 24V fixed output
Internal short circuit current limiting voltage

Low Output
Current
(10= 100mA)

MC79L05AC TO·92
ttMC79LXXAC
series

Output current in excess of 100mA - 5V, -12V, -15V, -18V and
Internal short circuit current limiting - 24V fixed output voltage
External components minimized

t New Product
tt Under Development

c8SAMSUNG
Electronics

65

•

LINEAR ICs

c.

FUNCTION GUIDE

Precision Voltage Regulator
Function

Type

Package

Features

Application

Adjustable
Regulator

LM723

14 DIP Positive or negative supply operation Output voltage adjustable from
14 SOP Series, shunt, switching or floating 2 to 37V
operation
0.01 % line and load regulation
Output current up to 150mA without
external pass transistor

Adjustable
Regulator

LM317

TO·220

Output current in excess of 1.5A
Positive output adjustable from
1.2V to 37V
Internal short circuit current limiting

Floating operation for high
voltage operation
Eliminates stocking many
fixed voltages

KA337

TO·220

Output current in excess of 1.5A
Negative output adjustable from
-1.2V to -37V
Internal short circuit current limiting

Floating operation for high
voltage operation
Eliminates stocking many
fixed voltages

tKA350

TO·3P

Output current in excess of 3A
Positive output adjustable from 1.2V
to 33V
Internal short circuit current limiting

Floating operation for high
voltage operation
Eliminates stocking many
fixed voltages

ttKA7501

TO·92

Output current in excess of 100mA
Positive output adjustable from 1.2V
to 37V
Internal short circuit current rimiting

Floating operation for high
voltage operation
Eliminates stocking many
fixed voltages

ttKA7502

TO·220

Output current in excess of 500mA
Positive output adjustable from 1.2V
to 37V
Internal short circuit current limiting

Floating operation for high
voltage operation
Eliminates stocking many
fixed voltages

ttKA7503

TO·92

Output current in excess of 100mA
Negative output adjustable from
-1.2V to - 37V
Internal short circuit current limiting

Floating operation for high
voltage operation
Eliminates stocking many
fixed voltages

ttKA7504

TO·220

Output current in excess of 500mA
Negative output adjustable from
-1.2V to 37V
Internal short circuit current limiting

Floating operation for high
voltage operation
Eliminates stocking many
fixed voltages

t New Product
tt Under Development

c8SAMSUNG
Electronics

66

LINEAR ICs

FUNCTION GUIDE

D. Switching Voltage Regulator
Function

Type

Package

Application

Features

Adjustable
1.25V to 40V

KA7aS40

16 DIP
16 SOP

Peak output current of 1.5A without
external transistor.
aOdB line and load regulation
Operation from 25V to 40V

Step-down converter
Step-up converter
Inverter

Voltage Mode
PWM Control
Ie

KA3524

16 DIP

Complete PWM power control circuitry
Internal short circuit current limiting
Complementary output
Output current up to 100mA

Flyback
Voltage
Voltage
Voltage

KA7500

16 DIP

Complete PWM power control circuitry
Dead-time control
Complementary output
Output current up to 200mA

Voltage inverter
Voltage step-down
Voltage step·up

KA7506

16 DIP

Adjustable dead-time control
Internal soft-start
Separate oscillator sync terminal
Pulse-by-pulse shutdown
Input undervoltage lockout with
hysteresis

Flyback
Voltage
Voltage
Voltage

coverter
inverter
step·down
step-up

Current Mode
PWM Control
IC

KA7505

a DIP

Automatic feed forward compensation
Pulse-by-pulse current limiting
Undervoltage lockout with hysteresis
Double pulse suppression
High current totem pole output

Flyback
Voltage
Voltage
Voltage

converter
inverter
step·down
step-up

DC to DC
Converter

KA7507

a DIP

Low standby current
Current Limiting
Output switch current of 1.5A
Output voltage adjustable from 1.25 to
40V

Voltage inverter
Voltage step·down
Voltage step-up

I

converter
inverter
step-down
step-up

3. VOLTAGE REFERENCE
Function

Type

Package

Features

Application

Adjustable
Reference

KA431

TO-92
a DIP
a SOP

Program,mable output voltage from Vref
to 36V
Voltage reference tolerance: ±1.0%
Low output noise voltage

Switching regulator
Constant current source
Constant current sink

Reference

KA336

TO-92

Adjustable 4V to 6V
Low temperature coefficient
O.6n dynamic impedance
Fast turn-on

Adjustable shunt regulator
Precision power regulator

TO-92

Low temperature coefficient
Low dynamic resistance

Electronic tuning system

33V Reference

KA33V

c8SAMSUNG
Electronics

67

LINEAR ICs

FUNCTION GUIDE

, 4. OPERATIONAL AMPLIFIER
Function

Type

OPAMP

Dual
OPAMP

Package

Features

Application

LM741

8 DIP
8 SOP

Internal frequency compensation
Short circuit protection

Comparator, DC amp,
Multivibrator, Summing amp,
Integrator or differentiator,
Narrow band or BPF

LM301A

8 DIP
8 SOP

Short circuit protection
External frequency compensation

Variable capacitance
Multiplier
Sine wave oscillator

KF351

8 DIP
8 SOP

Internally trimmed offset
Voltage: 10mV
Low input bias current
High input impedance: 10120
High slew rate: 13V/1Ls
Wide gain bandwidth: 4MHz

Hi-Zin inverting amp
Ultra low duty cycle
pulse generator
sample and Hold

MC4558

8 DIP
8 SOP
9 SIP

Internal frequency compensation
Low noise operation

Phone pre-amplifier
Tape playback amplifier

MC1458

8 DIP
8 SOP
9 SIP

Internal frequency compensation
Short circuit protection

Filter
Schmitt trigger
Comparator Multivibrator

LM358/A
LM258/A
LM2904

8 DIP
8 SOP
9 SIP

Internal frequency compensation
for unit gain
Large DC voltage gain
Wide power supply range

DC summing amplifier
Power amplification
RC active bandpass filter
Compatible with all forms
of logic.

8 DIP
8 SOP
9 SIP

Low input noise voltage
High gain bandwidth: 10MHz
High slew rate: 10V/1Ls
Large supply voltage range:
± 3 to ± 20V

DC Amp
Telephone channel amplifiers
Audio equipment

10 SIP HIS

Internal current limiting: Isc = 350m A
Internal frequency compensation
Minimal cross over distortion

High power amplifier
CD motor driver

8 DIP
8 SOP
9 SIP

Low supply current: 5001LA (max)
Low input bias current
High input impedance
High gain bandwidth: 1MHz
High slew rate: 1V/1Ls

Active filter
DC summing amplifier
Oscillator

8 DIP

Wide range of supply voltage
: 3V - 16V
Common mode input voltage
including the negative rail

Battery-powered application
Active filter
Signal buffer

ttKA3000

KA9256

tKF442

KS272

tt Under Development
t New Product

~

c8SAMSUNG·
Electronics

68

FUNCTION GUIDE

LINEAR ICs

OPERATIONAL AMPLIFIER
Function
Quad
OPAMP

Type

Package

(Continued)

Features

Application

LM324/A
LM224/A
LM2902

14 DIP
14 SOP

Internal frequency compensation
Wide supply voltage range
Single supply: DC 3V- 32V
Dual supply: DC ± 1.5V - ± 16V

Audio power booster
DC amp, Multivibrator
Switch, Comparator
Schmitt trigger

LM348
LM248

14 DIP
14 SOP

Each amplifier is functionally
equivalent to the LM741C
Pin compatible with LM324
Short circuit protection

Comparator with hysteresis
Voltage reference

MC3403
MC3303

14 DIP
14 SOP

Class AB output stage for minimal
crossover distortion
Single or split supply operation
Internal frequency compensation

Comparator with hysteresis
BI-Quad filter

tKF347

14 DIP
14 SOP

Low bias current
Wide gain bandwidth: 4MHz
High slew rate: 13V/!-'s
High input impedance

D/A converter
Sample and hold
Integrator

KS274

14 DIP

Wide range of supply voltage
: 3V - 16V
Single supply operation
Very low input bias current, Typ 1p'A

Battery-powered application
Energy-conserving
application

14 DIP
14 SOP

Low supply current: 200!-,A
Single supply operation: 5V to 30V
Low input offset voltage

Remote line filters
DC Amps
Battery powered application

ttKA3001

tNew Product
tt Under Development

c8SAMSUNG
Electronics

69

I

LINEAR ICs

FUNCTION GUIDE

5. VOLTAGE COMPARATOR
Function

Type

Package

Features

Application

8 DIP
8 SOP

Operates from Single 5V supply
Maximum input current: 250nA
Maximum offset current: 50nA
Differential input voltage range: ±30V

Multivibrator output is
compatible with DTL and
as well as MOS circuits
voltage controlled oscillator

14 DIP

low offset and thermal drift
Compatible with practically
all types of integrated logic

Line receiver
AID converter
Memory sense amplifier

8 DIP
8 SOP
9 SIP

High precision comparators
Reduced Vas drift over temperature
Eliminates need for dual supply
Allows sensing near ground
Compatible with all form of logic
Power drain suitable for battery
operation
Low input biasing current: 25nA
low output saturation voltage 250mA
at 4mA

Output voltage compatible
with TTL, DTL, ECl and
CMOS logic system
Basic comparator
Pulse generator
MOS clock driver

lM319
LM219

14 DIP

Two independent comparators
Operates from a single 5V
High common mode slew rate

Relay driver
Window detector

KA711C

14 DIP
14 SOP

Separate differential input and single
output
Strobing each side

Sense amplifier for core memory
Dual comparator with ORed output
Double-ended limit detector

14 DIP
14 SOP

Wide single supply voltage
range or dual supplies
Very low supply current drain
(O.8mA)-independent of supply
voltage (2mW/Comparator at + 5V DC)
low input biasing current: 25nA
Input common-mode voltage range
included GND
low output saturation voltage 250mV
at 4mA

Compatible with all forms of logic
Bi-stable multivibrator
One-shot multivibrator
Time delay generator
Square wave oscillator
Pulse generator
Limit comparator
Crystal controlled oscillator

Single
LM311
Comparator

KA710C

Dual
lM393/A
Comparator LM2903
LM293/A

Quad
LM339/A
Comparator LM2901
LM239/A
lM3302

tt Under Development

c8SAMSUNG
Electronics

70

LINEAR ICs

FUNCTION GUIDE

6. TIMER
Function
Single
Timer

Dual
Timer

Quad
Timer

Type

Package

Features

Application

NE555

8 DIP
8 SOP

Maximum operating frequency: 500KHz Precision timing
Pulse generator
Adjustable duty cycle

KS555
KS555H

8 DIP
8 SOP

Low power consumption by using
CMOS process
High speed operation
Wide operation supply voltage:
2 to 18 volts
Pin compatible with NE555

Precision timing
Pulse generator

NE556

14 DIP
14 SOP

TTL Compatible
Dual NE555

Time delay generation

KS556

14 DIP
14 SOP

Low power consumption
by using CMOS process
Pin compatible with NE556

Time delay generation

NE558

16 DIP

Wide supply voltage range: 4.5 to 16V Quad monostable
Sequential timing
100mA output current per section
Time period equal RC
Precision timing

I

7. MISCELLANEOUS ICs
Function

Type

Voltage to
Frequency
Converter

ttKA331

Package
8 DIP

Features

Application

V-F Conversion
F-V Conversion
Wide range of full scale
frequency: 1Hz to 100KHz

Li ght intensity to
frequency converter
Temperature to frequency
converter

Earth
Leakage
Detector

KA2803 8 DIP

Low power consumption
Built-in voltage regulator
1mA output current pulse to
trigger SCR's

Earth leakage detector

Zero
Voltage
Switch

KA2804 8 DIP

Very few external compontents
Reference voltage output
Supply voltage control

On-Off temperature control
Time proportional temperature
control

Earth
Leakage

KA2807 8 DIP

Full advantage of the UL943
Direct interface to SCR
Trim time in normal

Earth leakage detector

Video
Amplifier

KA733C 14 DIP

120MHz bandwidth
Selectable gains of 10000 and 400
No frequency compansation required

Video recorder systems
Video amplifier
Pulse amplifier in communications
Magnetic memories

c8SAMSUNG
Electronics

71

LINEAR ICs

CROSS REFERENCE GUIDE

1. TELECOMMUNICATION ICs
A. Dialer
Application
Pulse Dialer

DTMF Dialer

SAMSUNG

MOSTEK

KS5805A
KS5805B
tKS58C05
tKS58D05
tKS58E05

*MK50992
*MK50993
MK50981
MK50982
MK50991 12

AMI
S2560A/B

SHARP

UMC
*T40992
"T40993
UM9151

Others

"LR40992
"LR40993

UM9151-3

"MK5089
MK5087
MK5380

DTMF/Pulse
Switchable with
Redial

KS5819
KS5820

MK5370

*UM91230
*UM91210

LR48081
LR48082

*S7230A/B
S7235
* LC7360

DTMF/Pulse
Switchable with
10 No. Memory

tKS5822
tKS5823

MK5375/6

*UM91261
*UM91260

LR4803

PCD3315

SAMSUNG

MOTOROLA

*S25089

*UM95089
UM95087
UM9559

*SBA5089
SBA5091
SBA5099

KS5808
ttKS5809
ttKS5810
ttKS5811
KA2413

*LR4089
LR4087

*PBD3535

B. Tone Ringer
Application
Tone Ringer

KA2410
KA2411

1 Chip Tone
Ringer

KA2418

MC34012
MC34017

SGS

MITEL

CHERRY

Others

*ML8204
*ML8205

*CS8204
*CS8205

*TA31 001
*TA31002
Included
Bridge Diode

*LS1240
LS3240

C. Speech Network
SGS

RIFA

ITT

ERSO

Subset Amplifier

KA2412A

* LS285/A

PBL3726

TEA1045

*CIC9185

Speech Network
with Dialer
Interlace

KA2425A
KA2425B

LS356

PBL3781

Application

SAMSUNG

Others

U4053/7
U4055/6
TP5700

D. Tone Decoder
Application
Tone Decoder

SAMSUNG
LM567C

NATIONAL

SHARP

SIGNETICS

*LM567

*IR3N05

"NE567

LM567L

Others
"XR567 (EXAR)
*XRL567 (EXAR)

E. FM IF Amplifier
Application

SAMSUNG

MOTOROLA

SPRAGUE

Others

FM IF Amplifier

MC3361

* MC3361

ULN3859

"LM3361

F. DTMF Receiver
Application
DTMF Receiver

SAMSUNG
tKT3170

MITEL
*MT8870

GTE

Others

*G8870

t New Product tt Under Development * Direct Replacement

c8SAMSUNG
Electronics

72

LINEAR ICs

CROSS REFERENCE GUIDE

G. CODEC, CODEC FILTER, COMBO CODEC
SAMSUNG

N.S

SGS

INTEL

wLaw CODEC

KT5116

*TP5116

* ILA5116

*M5116

2910

CODEC FILTER

KT3040

*TP3040

* ILA5912

*M5912

*2912

Application

wLaw COM BO CODEC

tKT8564

*TP3064

wLaw COM BO CODEC

tKT8554

*TP3054

A-Law COM BO CODEC ttKT8567

*TP3067

A-Law COM BO CODEC

tKT8557

wLaw DODEC
A-Law CODEC
TSAC

FAIRCHIJ-D

2913

MOTOROLA

THOMSON

*ETC5040
MC14400-5

*ETC5064

* ILA3054

*2916

*ETC5054

*TP3057

* ILA3057

*2917

*ETC5057

tKT8520

* TP3020

ILA5151

ttKT8521

*TP3021

tKT8555

*TP3155

•

*ETC5067

*2910
*2911

H. INTERFACES
Application
Line Driver

RS-232C

Line Receiver

SAMSUNG

MOTOROLA

TI

ttKS5788

FAIRCHILD

SIGNETICS

*DS14C88

MC1488

*MC1488

*SN75188

*OS1488

*ILA1488

*MC1488

MC1489

*MC1489

*SN75189

*OS1489

*ILA1489

*MC1489

MC1489A

*MC1489A

*SN75189A

*OS1489A

*ILA1489A

*MC1489A

*DS14C89A

ttKS5789A
Transceiver

N/S

ttKA2654
ttKS5706

*SN751701
*MC145406

I. Driver
Application
8ch Source Driver
Flouscent Display Driver

Peripheral Driver Array

SAMSUNG

SPRAGUE

KA2580A

*UDN2580A

EXAR

MOTOROLA

TI

KA2588A

*UDN2588A

KA2651

*UDN6118

tKA2655

*ULN2001

*MC1411

SN75476

. tKA2656

*ULN2002

*MC1412

SN75477

tKA2657

*ULN2003

*MC1413

SN75478

tKA2658

*ULN2004

*MC1416

tKA2659

*ULN2005

Others

*XR6118

J. UART
Application

SAMSUNG

HITACHI

MOTOROLA

Single UART

ttKS5824

*HD6350

* MC6850

Quad UART

Others

KS5812

·t New Product tt Under Develo·pment * Oirect Replacement

c8~SUNG

73

LINEAR ICs

CROSS REFERENCE GUIDE

2. VOLTAGE REGULATOR
A. 3·Terminal Fixed Positive Voltage Regulator
Description
KA78TXX
Series
(10 = 3A)

SAMSUNG
KA78T05
ttKA78T06
ttKA78T08
ttKA78T12
ttKA78T15
ttKA78T18
ttKA78T24

MOTOROLA

FAIRCHILD

NEC

MATSUSHITA

LM323 (10 = 3A)

LM323

LM323

MC78XXAC/C
Series
(10= 1A)

MC7805AC/C
MC7852C
MC7806AC/C
MC7808AC/C
MC7885AC/C
MC7809AC/C
MC7810AC/C
MC7811AC/C
MC7812AC/C
MC7815AC/C
MC7818AC/C
MC7824AC/C

MC7805AC/C

J.tA7805

J.tPC7805

AN7805

MC7806AC/C
MC7808AC/C

J.tA7806
J.tA7808
J.tA7885

J.tPC7808

AN 7806
AN7808

MC7812AC/C
MC7815AC/C
MC7818AC/C
MC7824AC/C

J.tA7812
J.tA7815
J.tA7818
J.tA7824

J.tPC7812
J.tPC7815
J.tPC7818
J.tPC7824

AN7812
AN7815
AN7818
AN7824

KA340XX
Series
(10= 1A)

tKA340T05
tKA340T06
tKA340T08
tKA340T09
tKA340T10
tKA340T11
tKA340T12
tKA340T15
tKA340T18
TK.A340T24

MC78MXXC
Series
(lo=0.5A)

MC78LXXAC
(l o =0.1A)

MC78M05C
MC78M06C
MC78M08C
MC78M10C
MC78M12C
MC78M15C
MC78M18C
MC78M20C
MC78M24C
MC78L26AC
MC78L05AC
MC78L62AC
MC78L08AC
MC78L82AC
MC78L09AC
MC78L12AC
MC78L15AC
MC78L18AC
MC78L24AC

Package
TO-220
TO-3P

MC78T05
MC78T06
MC78T08
MC78T12
MC78T15
MC78T18
MC78T24

TO-3P

LM340-5.0
LM340-6.0
LM340-8.0

TO-220

TO-220

LM340-12
LM340-15
LM340-18
LM340-24
MC78M05C
MC78M06C
MC78M08C

J.tA78M05C
J.tA78M06C
J.tA78M08C

MC78M12C
MC78M15C
MC78M18C
MC78M20C
MC78M24C

J.tA78M12C
J.tA78M15C

MC78L05AC

J.tA78L05AC
J.tA78L62AC

J.tA78M20C
J.tA78M24C

J.tPC78M05
J.tPC78M08
J.tPC78M10
J.tPC78M12
J.tPC78M15
J.tPC78M18
J.tPC78M20
J.tPC78M24

AN78M05
AN78M06
AN78M08
AN78M10
AN78M12
AN78M15
AN78M18
AN78M20
AN78M24

TO-220

TO-92

MC78L08AC

MC78L12AC
MC78L15AC
MC78L18AC
MC78L24AC

J.tA78L82AC
J.tA78 L09AC
J.tA78L 12AC
J.tA78L15AC

t New Product
tt Under Development

c8SAMSUNG
Electronics

74

CROSS REFERENCE GUIDE

LINEAR ICs

B. 3·Terminal Fixed Negative Voltage Regulator
Description

MC79XXC
Series
(10= 1A)

MC79MXXC
(l o =0.5A)

MC79LXXAC
(l o =0.1A)

c.

SAMSUNG

MOTOROLA

FAIRCHILD

MC7902C
MC7905C
MC7906C
MC7908C
MC7912C
MC7915C
MC7918C
MC7924C

MC7905C
MC7906C
MC7908C
MC7912C
MC7915C
MC7918C
MC7924C

~A7905

~PC7905

~A7908

~PC7908

MC79M05C
MC79M06C
MC79M08C
MC79M12C
MC79M15C
MC79M18C
MC79M24C
MC79L05AC
ttMC79L 12AC
ttMC79L 15AC
ttMC79L 18AC
ttMC79L24AC

NEC

~A7912

~PC7912

~A7915

~PC7915

~PC7918
~PC7924

MC79M05C

~A79M05

MC79M12
MC79M15

~A79M12

MATSUSHITA

Package

AN7905
AN7906
AN7908
AN7912
AN7915
AN7918
AN7924

I
TO-220

~A79M08

~A79M15

MC79L05AC
MC79L12AC
MC79L15AC
MC79L18AC
MC79L24AC

TO-92

I

Precision Voltage Regulator
Description

Adjustable
Voltage

33V Regulator
Adjustable
Voltage

I

MOTOROLA

FAIRCHILD

LM723

MC1723

~A723

LM317

lM317

~A317

KA337

LM337

SAM SUNG

NEC

LM317

TO-220

LM337

TO-220
~PC574

LM350
LM317L
LM317M
LM337L
LM337M

~A350

Package

14 DIP/14 SOP

KA33V
tKA350
ttLM317L
ttLM317M
ttKA337L
ttKA337M

MATSUSHITA

LM723

TO-92

LM350
LM317M
LM337M

D. Switching Voltage Reg'ulator
Description

Adjustable
1.25V to 40V
(to = 100KHz)
PWM
Controller IC

SAMSUNG

KA78S40

KA3524
**KA7500

qsSAMSUNG
ElectronICs

MOTOROLA

FAIRCHILD

~A78S40

~A78S40

SG3524
TL494

NEC

MATSUSHITA

Package

16 DIP

LM3524

SG3524

16 DIP

TL494

16 DIP

75

CROSS REFERENCE GUIDE

LINEAR ICs

3. PRECISION VOLTAGE REFERENCE
Description

Adjustable
Reference
(2.5V - 36V)
Reference

I 5V
!2.5V

SAMSUNG

MOTOROLA

FAIRCHILD

KA431

TL431

",A431

N/S

TI

Package

TL431

TO-92
8 DIP
8 SOP

LM336
LM336

KA336
KA336

TO-92
TO-92

4. OPERATIONAL AMPLIFIER
Description

Single OP Amp

Dual OP Amp

Quad OP Amp

MOTOROLA

NATIONAL

FAIRCHILD

LM741
KA301
KF351

MC1741
LM301
LF351

LM741
LM301
LF351

",A741
",A301

LM358/A
LM258/A
LM2904
MC1458
MC4558
KA9256
tKF442
ttKA3000

LM358/A
LM258
LM2904
MC1458
MC4558

LM358/A
LM258/A
LM2904
LM1458

LM324/A
LM224/A
LM2902
LM348
LM248
MC3403
MC3303
tKF347
KS274
ttKA3001

LM324/A
LM224
LM2902
LM348
LM248
LM3403
MC3303
LF347

SAMSUNG

JRC

NJM741

Others

",PC301A
TL081

NJM358

",A1458
",A4558

NJM2904
NJM458
NJM4558

TA75358

BA4558
TA7256

LF442
LM324/A
LM224/A
LM2902
LM348
LM248

",A324
",A224
",A2902
",A348
",A248
",A3403
",A3303

NJM4558

TLC272, ICL7621

NJM324

TA75324
CA224
",PC451

NJM2902

NJM340J

LF347

",PC3403
",PC452
TLC274, ICL7641
OP-420

5. VOLTAGE COMPARATOR
Description

MOTOROLA

NATIONAL

FAIRCHILD

Single Comparator

LM311
KA710C

LM311
MC710C

LM311
LM710

LM311
",A710

Dual Comparator

LM393/A
LM2903
LM293
KA319
KA219
KA711C

LM393/A
LM2903
LM293

LM393/A
LM2903
LM293
LM319
LM219
LM711

",A393

",A711C

LM339/A
LM2901
LM239
LM3302

LM339/A
LM2901
LM239

LM339/A
LM2901
LM239
LM3302

",A339
IlA2901
IlA239
",A3302

Quad Comparator

SAMSUNG

,c8SAMSUNG
Electronics

JRC

NJM311

NJM2903

Others

",PC311
MB4001
TA75393
",PC277

NJM2903
NJM319

NJM2901

TA75339
",PC177
CA239
CA3302

76

CROSS REFERENCE GUIDE

LINEAR ICs

6. TIMER
Function

SAMSUNG

MOTOROLA

NATIONAL

SIGNETICS

Single Timer

NE555
KS555
KS5357

MC1455

LM555

NE555

Dual Timer

NE556
KS556

Quad Timer

NE558

TI

Others

TA75555
TLC555
ICM7555

LM556

NE556

NE555
TLC556

•

ICM7556

NE558

7. MISCELLANEOUS ICs
Function
Toy Radio
Control Actuator

DC Motor Speed
Controller

SAMSUNG

TOSHIBA

NATIONAL

MATSUSHITA

NEC

Others
3 Function

KA2303

2 Function

KA2304
tKA2309

TA7657D

Turbo +

7 Function (RX)

tKA2310

TA7330

Turbo +

7 Function (TX)

j!PC1470H

KA2401
KA2402

AN6612

*LA5521D

KA2404

AN6610

j!PC1470H

*AN6651

tKA2407
Earth Leakage
Detector

KA2803

LM1851

Earth Leakage
Detector

KA2807

LM1851

*M54123

Zero Voltage SW

KA2804

FDD Read AMP

KA6201

*HA16631P

Smoke Detector

KS3502

S566

j!PC1701C

Conventional Timer

KS8701

TD6347S

Flasher Controller

KA8702

TA8027P

V/F Converter

KA331

c8SAMSUNG
Electronics

UAA1041
LM331

77

LINEAR IC's

3100A

KSV

ORDERING INFORMATION

N

C

A+

L=

BURN·IN (OPTIONAL)
(SEE BURN·IN PROGRAM)
PACKAGE TYPE

~----------------TEMPERATURERANGE

~-------------------

DEVICE NUMBER AND SUFFIX (OPTIONAL)
A: IMPROVED VERSION

' - - - - - - - - - - - - - - - - - - - - - - - - - DEVICE FAMILY

TEMPERATURE RANGE
BLANK

SEE INDIVIDUAL SPEC

+ 70°C

PACKAGE TYPE
CODE
D

C

COMMERCIAL 0 -

I

INDUSTRIAL - 25 - + 85°C
-40-+85°C

N

M

MILITARY -55 -+ 125°C

S
Q

J

E
B
P

INTEGRATED CIRCUIT
KA

LINEAR IC

KS

CMOS IC

KT

TELECOM IC

LM

NATIONAL

W

U
L
PL
M
H
Z
V
A

MC

MOTOROLA

NE

S!GNETICS

KSV

A/D·D/A CONVERTER

KAD

AID CONVERTER

T
X

KDA

D/fl. CONVERTER

G

c8SAMSUNG
Electronics

PKG.TYPE
SOIC
CERAMIC DIP
PLASTIC DIP (300/600 mil)
SIP
FQP
SD (400 mil)
SSD (Skinny Shrink DIP)
(400 mil. Small Pitch)
SHD (Shrink DIP)
(300 mil. Small Pitch)
ZIP
PGA
LCC
PLCC
TO·3
TO·3P
TO·92
TO·92L
TO·126
TO·220
TO·247
BARE CHIP

78

Telecommunication Application
Device
KA2410
KA2411
KA2412A
KA2413
KA2418
KA2425A/B
KA2654
KS5706
KS5788
KS5789A
KS5805A/B
KS58C/D05
KS58E05
KS5808
KS5809
KS581 0
KS5811
KS5812
KS58A/B/CID19
KS58A/B/C/D20
KS5822
KS58A/B/C/D23
KS5824
KT3040/A
KT3170
KT5116
KT8520
KT8521
KT8554
KT8555
KT8557
KT8564
KT8567
LM567C
LM567L
MC1488
MC1489/A
MC3361
KA2580A
KA2588A
KA2651
KA2655/6/7/8/9

Function
Tone Ringer
Tone Ringer
Telephone Speech Circuits
Dual Tone Multi Frequency Generator
Tone Ringer with Bridge Diode
Telephone Speech Network with Dialer Interface
line Transceiver
3 line Drivers and 3 line Receivers
Quad CMOS Line Driver
Quad CMOS Line Receiver
Telephone Pulse Dialer with Redial
Telephone Pulse Dialer with Redial
Telephone Pulse Dialer with Redial
Dual Tone Multi Frequency Dialer
DTMF Dialer
DTMF Dialer with Redial
DTMF Dialer with Redial
Quad Universial Asychronos Receiver and Transmitter
Tone/Pulse Dialer with Redial
Tone/Pulse Dialer with Redial
10 Memory Tone/Pulse Repertory Dialer
10 Memory Tone/Pulse Repertory Dialer
Universial Asychronous Receiver and Transmitter
PCM Monolithic Filter
DTM F Receiver
wLaw Companding CODEC
wLaw Companding CODEC
A-Law Companding CODEC
wLaw COMBO CODEC
Time Slot Assignment Circuit
A-Law COMBO CODEC
wLaw COMBO CODEC
A-Law COMBO CODEC
Tone Decoder
Micropower Tone Decoder
Quad Line Driver
Quad Line Receiver
Low Power Narrow Band FM IF
8-Channel Source Drivers
8-Channel Source Drivers
Fluorescent Display Drivers
High Voltage, High Current Darlingtor Arrays

Package
8 DIP
8 DIP
14 DIP
16 DIP
8 DIP
18 DIP
8 DIP
16 DIP/SOP
14 DIP/SOP
14 DIP/SOP
18 DIP
18 DIP
16 DIP
16 DIP
16 DIP
16 DIP
16 DIP
40 DIP
22 DIP
18 DIP
22 DIP
18 DIP
24 DIP
16 CERDIP
18 DIP
16 CERDIP
24 CERDIP
22 CERDIP
16 CERDIP
20 CERDIP
16 CERDIP
20 CERDIP
20 CERDIP
8 DIP/SOP
8 DIP/SOP
14 DIP/SOP
14 DIP/SOP
16 DIP/SOP
18 DIP
20 DIP
18 DIP
16 DIP/SOP

Page
81
81
87
95
101
104
111
115
119
122
125
131
136
140
146
146
146
150
160
170
178
186
194
205
217
227
240
240
249
260
249
268
268
278
286
296
301
305
611
611
616
619

I

ill
1111

i

LINEAR INTEGRATED CIRCUIT

KA2410/KA2411

8 DIP

TONE RINGER
The KA2410/KA2411 is a bipolar integrated circuit designed for telephone
bell replacement.

FUNCTIONS
• Two oscillators
• Output amplifier
• Power supply control circuit

•

FEATURES
•
•
•
•
•
•
•
•
•
•

Designed for telephone bell replacement
Low current drain.
Small size 'MINIDIP' package.
Adjustable 2-frequency tone.
Adjustable warbling rate.
Built-in hysteresis prevents false triggering and rotary dial
'CHIRPS'
Extension tone ringer modules
Alarms or other alerting devices.
External triggering or ringer disable (KA2410).
Adjustable for reduced supply initiation current (KA2411)

ORDERING INFORMATION
Device

Operating Temperature

KA2410N
KA2411 N

-45- +65°C

APPLICATION CIRCUIT 1 (KA2410)

100K-200K ohm

R2
165K±1%

Note: 1. Output amplifier
2. High frequency oscillator
3. Low frequency oscillator
4. Hysteresis regulator
Fig. 1

c8SAMSUNG
Electronics

81

LINEAR INTEGRATED CIRCUIT

KA2410/KA2411
ABSOLUTE MAXIMUM RATINGS (Ta
Characteristic
Supply Voltage
Power Dissipation
Operating Temperature
Storage Temperature

=25°C)

Symbol
Vee
Po
Topr
T slg

value

Unit

30
400
-45to 65
-65to 150

V
mW
°C
°C

ELECTRICAL CHARACTERISTICS (Ta = 25°C)
(All voltage referenced to GND unless otherwise specified)
Characteristic

Symbol

Test Condition

Min

Typ

Max

Unit

29.0

V

Operating Supply Voltage

Vee

Initiation Supply Voltage l
Initiation Supply Current l

VSI

See Fig. 2

17

19

21

V

lSI

KA2411-6.8K-Pin 2 to GND

1.4

2.5

4.2

rnA

Sustaining Voltage2

Vsus

See Fig. 2

9.7

11.0

12.0

V

Sustaining Current 2

Isus

No Load Vee=Vsus, See Fig. 2

0.7

1.4

2.5

rnA

Trigger Voltage 3

VTR

KA2410 Only Vee =15V

9.0

Trigger Current3

IrR

KA241 0 Only

Disable Voltage4

V OIS

KA241 0 Only

lOIs

KA241 0 Only

-40

-50

Output Voltage High

VOH

Vcc=21V,le=-15mA
Pin 6=6V, Pin 7=GND

17.0

19.0

Output Voltage Low

VOl

Vcc=21V,le=15mA
Pin 6=GND, Pin 7=6V

Disable Current

4

liN (Pin 3)
hN (Pin 7)
High Frequency 1
High Frequency 2
Low Frequency

Pin 3=6V, Pin 4=GND
Pin 7=6V, Pin 6=GND
fHl
fH2
fL

R3=191K, C3=6800pF
R3=191K,C3=6800pF
R2=165K, C2=0.47I'F

10.5

12.0

V

20.0

10005

pA

0.5

461
576
9.0

V

pA
21.0

V

/1.6

V

-

-

500
500

nA
nA

512
640
10

563
704
11.0

Hz
Hz
Hz

• NOTE (see electrical characteristics sheet)
1. Initiation su pply voltage (V SI) is the supply voltage required to start the tone ringer oscillating.
2. Sustaining voltage (Vsus) is the supply voltage required to maintain oscillation.
3. VTR and IrR are the conditidfls applied to trigger in to start oscillation for Vsus~VCC~VSI
4. VOIS and lOIs are the conditions applied to trigger in to inhibit oscillation for VSI ~ Vee
5. Trigger current must be limited to this value externally.

c8SAMSUNG
Electronics

82

LINEAR INTEGRATED CIRCUIT

KA2410/KA2411

CIRCUIT CURRENT-SUPPLY VOLTAGE (No Load)
I

4.0
3.5

i
I
I

-H
",

V
~

A'

~I-""'

./

1.0

,

05

--

1

~~ ---ff·-- ._-

I

f--+- - -

;

~
~

L

/
10

14

Vee;

18

22

26

30

34

M, Supply voltage

Fig. 2

APPLICATION NOTE
The application circuit illustrates the use of the KA2410/KA2411 devices in typical telephone or extension tone ringer
application.
The AC ringer signal voltage appears across the TIP and RING inputs of the circuit and is attenuated by capacitor Cl and
resistor Rl.
Cl also provides isolation from DC voltages (48V) on the exchange line.
After full wave rectification by the bridge diode, the waveform is filtered by capacitor C4 to provide a DC supply for the tone
ringer chip.
As this voltage exceeds the initiation voltage (Vsl),osciliation starts.
With the components shown, the output frequency chops between 512 (fh1 ) and 640Hz (fh2) at a 10Hz (fd rate.
The loudspeaker load is coupled through a 13000 to 80 transformer.
The output coupling capacitor C s is required with transformer coupled loads.
When driving a piezo-ceramic transducer type load, the coupling C s and transformer (13000: 80) are not required.
However, a current limiting resistor is required.
The low frequency oscillator oscillates at a rate (fd controlled by an external resistor (R 2) and capacitor (C 2).
The frequency can be determined using the telation fl =111.289 R2. C2 • The high frequency oscillates at a fH1' fH2 controlled
by an external resistor (R3) and capacitor (C 3). The frequency can be determined using the relation fHI=1/1.504 R3. C 3.
fH2 =111.203 R3 , C3 •
Pin 2 of the KA2411 allows connection of an external resistor RSL , which is used to program the slope of the supply current vs supply voltage characteristics (see Fig 4), and hence the supply current up to the initiation voltage (Vsi). This initiation voltage remains constant independent of RSL '
The supply current drawn prior to triggering varies inversely with RSL .· decreasing for increasing value of resistance. Thus,
increasing the value of RSL , will decrease the amount of AC ringing current required to trigger the device. As such, longer
sucribser loopS are possible since less voltage is dropped per unit length of loop wire due to the lower current level. RSL
can also be used to compensated for smaller AC coupling capacitors (Cs on Fig 3) (higher impedance) to the line which can
be used to alter the ringer equivalence number of a tone ringer circuit.
The graph in Fig. 4 illustrates the variation of supply current with supply voltage of the KA2411. Three curves are drawn to
show the variation of initiation current with RSL . Curve B (RSL =r6.8K) shows the I-V characteristic for the KA2411 tone ringer.
Curve A is a plot with RSl <6.8KO and shows an increase in the current drawn up to the initiation voltage Vsi. The I-V charac'l
teristic after initiation remains unchanged. Curve C ill u rates the effect of increasing RSL above 6.8K Initiation current decreases
but again current after triggering is unchanged.

c8SAMSUNG
Electronics

83

LINEAR INTEGRATED CIRCUIT

· KA2410/KA2411
APPLICATION CIRCUIT 2 (KA2411)

10K!}
VOL
KA2411

RING

~--+----'

RSL

C4

Fig. 3

LINEAR INTEGRATED CIRCUIT
KA2411 Supply Current (No Load) Vs. Supply Voltage

8.5

1 -

---

.-~

j--+1--

-+- -

i-

7.5

+-+-

6.5 I--- ---

i
i
c3

-+----1- -

-~--- +-f--c._

4.S

t

13.S
2.5

lII'{
A) RsL-SKO
B) RSL=6.8KC
C)RS\.=13KO

t----.V

..+

~

,

rv') f,1.J1'i

,

~'~ ~'fI

v

1.5
0.5

f-+-- t---V' :
v' 1'1;

~V

i.IIII
10

14

:
I

'----

18

22

26

!

;+-

30

34

Supply Voltage (V)

c8SAMSUNG
Electronics

84

LINEAR INTEGRATED CIRCUIT

KA2410/KA2411
EQUIVALENT CIRCUIT

INHIBITING OSCILLATION

(Pin 2 Input)
+Vcc

KA241 0

r- -,

I

I

IRl
I
I

,,I
I
I

L....------_-.t :
I
I

O >ZL); the main part is sent to the line Via R6.
The impedance AM is defined as,fu
14-3

To reduce the receiving input signal,

also, In order to reduce power loss in RS & ZB and to transfer the maximum power to the line via R6.
RS+ZB> > R6+ZL
R6+ZM =ZL

c8~SUNG

93

KA2412A

LINEAR INTEGRATED CIRCUIT

Then the line impedance ZL grows from 600 ohm up to 900 ohm when the line length increases.
The voltage driven to the line is

In order to maximize sending Gain
ZL> >R6
Therefore, in the case of the KA2412 test circuit:
R6=75, ZM=6.8KI11, ZL=600

'VL =

ZL
xZMh =286.82h
ZM+R6+ZL

* In receiving mode:

The AC signal coming from the line is sensed across the second diagonal of the wheastone bridge (pin 11 and pin 13).
After amplification it is applied to the receiver.

VR =

VI
(Rs+R5+ Ze)/IZM(1-~))
ZL +Rs +(R5 +Ze)IIZM
Ze +R5
VI
(R6+ ZM R5 )
ZL+Rs+(R5+Ze)/IZM
ZM+R5+ RS

To avoid the reflection
ZL =Rs +ZM' 10 ZM =R5 +Zs
Therefore

VR =

VI
(Rs+ZS)
2 Rs+1.91 ZM
11

In the case of the KA2412A test circuit
ZL=600n, Rs =75n, ZM=6.8Kn/11=6.8n
Rs =536n, Ze=6.076Kn (fREF=1KHz)

3. Automatic Gain Control.
The KA2412A automatically adjusts the gain of the sending and receiving amplifiers to compensate for line attenuation
Maximum gain is reached for a line current of range 10 - 20mA and minimum gain can also be reached for a line current
of range 60 -100mA.

c8SAMSUNG
Electronics

94

KA2413

LINEAR INTEGRATED CIRCUIT

DUAL TONE MULTI FREQUENCY GENERATOR
16 DIP

The KA2413 is a monolithic integrated DTMF generator designed for use
in a telephone set in parallel with an electronic speech circuit. The DC
characteristic to the line is set by the speech circuit.

FEATURES
•
•
•
•
•
•
•
•
•
•
•

Wide operating line voltage and current range
Operates with a standard crystal at 3.58MHz
Operates with a single contact or matrix key-board
Levels from the high and low frequency group can be adjusted
separately.
No individual level adjustment is necessary for every circuit
The signal levels are stabilized against variations in temperature and line voltage.
Short start-up time
All tones can be generated separately for testing.
Easy PCB layout; all keyboard connections on one side of the
chip
Internal protection of all inputs
Minimum number of external parts required.
ORDERING
Device

•
INFORMATION
Operating Temperature

KA2413N

BLOCK DIAGRAM

Mute

Rl

330

RL
47KQ

C24.7nF

Line

L---------~~------~----~----~__oA

Fig. 1

=8SAMSUNG
Electronics

95

KA2413

LINEAR INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS (Ta=25°C)
Characteristic

Value

Symbol

t p =2 sec
tp=20m sec
Line Voltage (Conditions)
Power Dissipation
Operating Temperature
Storage Temperature
Line Voltage (Peak)

Unit

20
22
15
400
-20-+70
-55- + 150

VL (peak)
VL (cont)
Po
Topr
Tstg

V
V
V
mW
°C
°C

ELECfRICAL CHARACfERISTICS (Ta =25°C)
(VL =4.3-9V, unless otherwise specified)
Characteristic

Symbol

Test Conditions

Min

Typ

Max

Unit

Operating Line Voltage

VL (opr)

Tone Generation
1.3 Vp Signal

4.3

9.0

V

Stand-By Line Voltage

VL (std)

Stand-By
2.0 Vp Signal

4.3

9.0

V

Operating Line Current

k(opr)

VL=4.3V

10.0

rnA

Stand-By Line Current

k (std)

No Key Pressed
VL=4.3V

250

JA

Mute Current

1M

One or More Keys Pressed

Key Resistance

RK

Key Circuit Closed

--

p.A

125.0
1.0

kO

Tone Output Frequency

Low
(Row)

fl =697 Hz

-1.0

-0.32

+1.0

%

f2 =770 Hz

-1.0

+0.02

+1.0

%

h=852 Hz

-1.0

+0.03

+1.0

%

-1.0

-0.11

+ 1.0

%

-1.0

-0.03

+1.0

%

f4 =941 Hz
f5 =1209 Hz

High
(Column)

fosc =3.5795 MHz

f6=1336 Hz

-1.0

-0.03

+1.0

%

f7=1477 Hz

-1.0

-0.68

+1.0

%

f8=1633 Hz

-1.0

-0.36

+1.0

%

c8SAMSUNG
Electronics

~f

--

96

KA2413

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS (Continued)
Characteristic

High
Low
Signal
level

High
Low
High
Low

Ratio Signal Level
Impedance to Line

Symbol

VH
VL
VH
VL
VH
VL
VHNL
ZL

-9.0

RH=33.0KO
RL =47.0KO

dBm

-S.O

-6.0

-4.0

-10.0

-8.0

-6.0

-4.0

RH =26.1KO
RL =39.2KO

dBm

--

--

dBm

-6.0
2.0

1.0
Tone Generation
Stand-By

THO

Tone Generation

VNO

Stand-By

I

KO
-31.0

dBm

-80.0

dBm

300-3400Hz

-33.0

dBm

3.4-50KHz

-33.0

dBm

-80.0

dBm

I

I

II

Output level within
11dB from final level

3

I

I

I

dB

3.0

~

6.0
50.0

~50KHz

ts

Unit

Max

-11.0

Output Noise

Start-up Time

Typ

RH=46.4KO
RL =69.SKU

Total Harmonic Distortion

Harmonics

Min

Test Conditions

5
i

I

--

mS
t

I
I

R1

TEST CIRCUIT

330

RLOAD

300n

Vl
1M

C2
4.7nF

MUTE

+

Rl
47KO

RH
33K!1

Fig. 2

ciS !ec.MSUNG

97

LINEAR INTEGRATED CIRCUIT

KA2413

• KA2413 can also be controlled by a microprocessor (see Fig 5). The negative branch of the microprocessor- voltage
supply is connected to pin 7 of KA2413 and the inputs (8) are connected with resistors.
For tone-generating one input of the low group (pin 13 - 16) is connected to the positive voltage and one input of
the high group (pin 9 - 12) is connected to the negative voltage, then KA2413 is activated and the mute output is put
in High state.

Microcomputer interface
~

R9

liD

+

I
9
10

'l!1

microprocessor

11

J11l

12

!lI 3

13

KA2413

R1,.4
R15

14
15

R1~

16

l

1
Fig. 5

1) R9, R10, R11, R12 (60K - 80K)
The resistors have two functions are:
- To raise the OFF/ON voltage
- To limit the current when the input levels are high. Too high current will interfere with the functions of the other
three inputs (the resistors can be exchanged with diodes directly away from KA2413)
High-frequency group resistors to microcomputer

To other
Inputs (3)

one of
R9-R12

I

121

microprocessor

---+:J------.

KA2413

L __________________________________ _

Fig. 6

c8SAMSUNG
Electronics

98

LIENAR INTEGRATED CIRCUIT

KA2413
2) R13, R14, R15, R16 (20K - 30K)
The two functions of the resistors are:
- To raise the OFF/ON voltage
- To limit the current when the input levels are high.

Low-frequency group resistors for microcomputer

I

I
I

I

I

I
13 I

KA2413

I

MICROPROCESSOR

141
one of
R13-R16

I

15 I

16 I

I
I
I

I

-------

J

L _______________________________ _

-m----~

Fig. 7

c8SAMSUNG
Electronics

99

LINEAR INTEGRATED CIRCUIT

KA2418

8 DIP

TELEPHONE TONE RINGER WITH
BRIDGE DIODE
The KA2418 is monolithic integrated circuit telephone
tone ringer with bridge diode, when coupled with an appropriate transducer, replace the electromechanical bell.
This device is designed for use with either a piezo transducer or an inexpensive transformer coupled speaker
to produce a-pleasing tone composed of a high frequency (fH ) alternating with a low frequency (fL) resulting in
a warble frequency. The supply voltage is obtained from
the AC ring signal and the circuit is designed so that
noise on the line or variations of the ringing signal cannot affect correct operation of the device.

FEATURES
• On chip high voltage full wave diode bridge rectifier
• Low current consumption, in order to allow the
parallel operation of the 4 devices
• Low external component count
• Tone and switching frequencies adjustable by
external components
• High noise (mmunity due to built-in voltage·
current hysteresis
• Activation voltage adjustable
• Internal zener diodes to protect against over
voltages
• Ringer impedance adjustable with external
components.

ORDERING INFORMATION
Device

Operating Temperature

KA2418N

APPLICATIONS
• Electronic telephone ringers
• Extension ringers

BLOCK DIAGRAM

ACTIVATION
VOLTAGE ADJUSTABLE

RECTIFIER
CAPACITOR

POWER
SUPPLY
CONTROL
CIRCUIT

GND

SWEEP RATE
CONTROL CAPACITOR

OUTPUT FREQUENCY
CONTROL RESISTOR

Fig. 1

c8SAMSUNG
Electronics

100

LINEAR INTEGRATED CIRCUIT

KA2418

ABSOLUTE MAXIMUM RATINGS (Ta=2S0C)
Characteristic
Calling Voltage (f=50Hz) Continuous
Calling Voltage (f=50Hz)
5 Sec ON/10 Sec OFF
Supply Current
Operating Temperature
Storage and Junction Temperature

Value

Unit

VAS

120

Vrms

VAS

200

Vrms

lee
Top
Tstg

22
-20- +70
-65- + 150

mA
°C
°C

Symbol

I

Absolute maximum ratings are those values beyond which peramanent damage to the device may occur. These
are stress ratings only and functional operation of the device at or beyond them is not implied. Long exposure
to these conditions may affect device reliability.

ELECTRICAL CHARACTERISTICS
(Ta = 25°C unless otherwise specified)

Characteristic

Symbol

Supply Voltage

Vee

Current Consumption without Load

Icc

Activiation Voltage

VON

Activiation Voltage Range

VONR

Sustaining Voltage

Vsus

Differential Resistance in
Off Condition

RD

Output Voltage Swing

VOUT

Short Circuit Current

lOUT

Test Condition

Min

I

Vs =8.8 to 26V

Max

Typ

!

Unit

~---L--1.8
mA
---~'.5
-1-3-r
V
12.2
26

-+:----

V

--

1-----

RA=1kO

6.8

V
V

--

j
--~J
mA

6.4

kU

Vce-3
35

Vs =26V

--

10

I

AC OPERATION
Characteristic
Output Frequencies
fH1
fH2

Symbol

fH1
fH2

fH1 Range
Sweep Frequency

c8SAMSUNG
Electronics

Test Condition
Vee = 26V, R1 =14kO
Vcc=OV
Vee=6V
R1 =27kO to 1.7kO

fL

Min

R,=14kO,C 1=100nF

Typ

Max

1,900
1,300
0.1

I
15

10

Unit

Hz
Hz
KHz
Hz

101

LINEAR INTEGRATED CIRCUIT

KA2418
TEST AND APPLICATION CIRCUIT

r------------------~""'"---,

I

Ra

I

1~,

250VAC!

O.221'F

2.2KO

, - - - - - - - -----U------l
I
I

I

10K~

10K

I

I

I
I
I

I
I
I

KA2418

VAS TEL LINE

VOUT

4

I

~i[fu
I

C,

RING

100nF

I

R,

I
I

12KO

I
I

I
I

I

-+_ _ _........._ _ __+_------+-------------....l

L -_ _ _ _ _ _ _ _

2.67-104

f1 == R, (KO)

f2==

1000

~ f1

fsweep=--

C,(nF)

7

Fig. 2

DESCRIPTION
The KA2418 tone ringer derive its powen supply by rectifying the AC ringing signal. It uses this power to activate two tone
generators. The two tone frequencies generated are switched by an internal oscillator in a fast sequence and made audible
across an output amplifier in the loudspeaker; both tone frequencies and the switching frequency can be externally adjusted.
The device can drive either directly a piezo ceramic converter (buzzer) or small loudspeaker. In case of using a loudspeaker,
a transformer is needed.
An internal shunt voltage Regulator provides DC voltage to output stage, low frequency oscillator, an High frequency oscillator. To protect the IC from telephone line transients, a zener Diode is included.

cU2!'ISUNG

102

KA2425A1B

LINEAR INTEGRATED CIRCUIT

18 DIP

SPEECH NETWORK WITH DIALER
INTERFACE
The KA2425A/B is a telephone speech network integrated circuit which includes transmit amp, receive amp,
sidetone amp, DC loop interface function, DTMF input,
voltage regulator for speech, a regulated output voltage
for a dialer, and equalization circuit.

FEATURES
• Low voltage operation (1_5V: speech)
• Transmit, receive, side tone and DTMF level are
controled by external resistors
• Regulated voltage for dialer
• Loop length equalization
• MUTE: KA2425A MUTE: KA24258
• Linear interface for DTMF

I
ORDERING INFORMATION
Device

BLOCK DIAGRAM

Package

Function

KA2425AN

18 DIP

MUTE

KA2425BN

18 DIP

MUTE

Operating Temperature
- 20-+60°C

TIP~

.......-.J"'~-'----()RECEIVER

>-~-""'------IY~-----------

DC LOOP
INTERFACE

DTMF INPUT O--~~--+--I

MUTE/MUTE
INPUT

DTMF DRIVER

MICROPHONE
INPUT

c8SAMSUNG
Electronics

103

LINEAR INTEGRATED CIRCUIT

KA2425A1B

(Ta = 25 DC)

ABSOLUTE MAXIMUM RATINGS
Characteristic
V + Voltage
Voo (V + =0)
MT, MT, MS Inputs
VLR
Storage Temperature

Value

Unit

-1.0 -+18
-1.0 - +6
-1.0 -V oo + 1
- 1.0 - V + - 3.0
-65-+150

V
V
V
V
°C

RECOMMENDED OPERATING CONDITIONS
Characteristic
hxo (Instantaneous)
V + Voltage: Speech Mode
Tone Dialing Mode
Operating Temperature

Value

Unit

0-10

mA
V
V
DC

+ 1.5 - + 15
+3.3 - + 15
-20 - +60

ELECTRICAL CHARACTERISTICS

(Ta= 25°C, Refer to Fig. 1)
Test Conditions

Characteristic
SYSTEM SPECIFICATIONS (Refer to Fig. 1
Tip-Ring Voltage (including polarity guard
bridge drop of 1.4V) (Speech Mode)

Transmit
Gain from Vs to V +
Gain Change
Distortion
Output Noise

Max

Unit

k=5.0mA
k=10mA
IL=20mA
IL=40mA
IL=60mA

-

2.4
3.9
4.6
5.6
6.6

-

VdC

29.5
-4.5
2.0
11

31
-3.6

-15
-3.0
2.0

-13
-2.0

-

-

28
-S.O

-

f = 1.0KHz, IL = 20mA
(See Figure 4) IL = 60mA

Sidetone Level
VRxolV + (Figure 3)

-16
-5.0

-

-

-

-

dB
dB
%
dBme
dB
dB
%
dB

IL=20mA
IL=SOmA

Sidetone Cancellation
4)ldB -

Typ

Fig. 4)

Figure 3 (IL = 20mA)
!t=60mA

Receive
VRxoNs
Receive Gain Change
Distortion

!~R:O (Figure

Min

!~R:O (Figure

3)ldB

DTMF Driver
V + VIN (Figure 2)
AC Impedance
Speech mode (incl. Cs , See Figure 4)
Zac = (600)V + l(Vs - V +)
Tone Mode (including Cs)

-

-36
-21

-

20

26

-

dB

3.2

4.8

6.2

dB

-

750
300
1650

-

IL=20mA

IL=20mA

n
IL=20mA
IL=60mA
20mA 100Kn.

8

RXO

Receive amplifier output.

9

RMT

Receiver mute.

10

V-

Negative supp.ly.

11

VR

Regulated voltage output. The VR Yoltage is regulated at 1.2V.

12

LC

AC load capacitor.

13

LR

DC load resistor. This resistor determines the DC resistance of the
telephone, and removes power dissipation from the chip.

--

----

14

V+

Positive supply.

15

Voo

Voo regulator. Voo is the output of a shunt type regulator with a nomina
voltage of 3.3V.

---

16

TI

DTMF input. Increasing R7 will reduce the DTMF output levels.

17

MS

Mode select. A logic "I" (>2.0V) _selects the pulse dialing mode. A logic
"0" « 1.0V) selects the tone dialing mode.

18

MT

Mute input for KA2425A. MT is connected through an internal 100KO
resistor to the base of an NPN transistor, with the emitter at Voo. A logic
"0" «1.0V) will mute the network for dialing. A logic "I" (>Voo-O.3V) puts
the KA2425A into the speech mode.

MT

Mute input for KA2425B. MT is connected through an internal 50Kn to the
base of a NPN transistor, with the collector to the base of a PNP transistor.
A logic "I" (> Voo - 0.3V) will mute the network for dialing. A logic "0"
« 1.0V) puts the KA2425B into the speech mode.

c8SAMSUNG
Electronics

108

KA2425A/B

LINEAR INTEGRATED CIRCUIT

Fig. 2 DTMF Driver Test
v+

TI

JO.02
400mVrms
1.0KHz

KA2425A1B

Iloop
LR

MT
='1.0V
MS

1

LC

v-

•

Fig. 3 Transmit and Sidetone Level Test
VR
150
TXO
v+
CD

:::t
Lt)

N

LR

o::r

N

ct
~

LC

Voo

Mf
v-

MS

Fig. 4 AC Impedance, Receive and Sidetone Cancellation Test
150K
v+
8.2K
STA

V+

0.05
RXI
33K
RXO
10

:::t
it)

l~f'05l

C\I

LR
LC

o::r

IIOOp

~ I"F
47

600n

0.2

C\I

ct

250mVrms(Vs)
1.0KHz

~

MS
V-

c8SAMSUNG
Electronics

CD

MT
Voo

109

KA2654

LINEAR INTEGRATED CIRCUIT

8 DIP

LINE DRIVER AND RECEIVER
The KA2654 is a monolithic one line driver and one line
receiver designed to interface DTE (Data Terminal Equipment) with DCE (Data Communication Equipment) in
conformance with the specifications of EIA standard
No.RS-232C.
The driver is similar to the MC1488. The receiver is similar to the MC1489 and that a separate response control
terminal is provided for.
A resistor or a resistor and bias voltage can be connected between this terminal and ground to shift the input
threshold voltage level. An external capacitor can be
connected from terminal to ground to provide input
noise filtering.

8 soP

FEATURES
•
•
•
•
•
•
•

ORDERING INFORMATION

Meet specifications of EIA RS·232C
Current limited output: 12mA (Typ)
Wide supply voltage: ± 4.5 - ± 15V
Low power consumption: 117mW
Power off source impedance: 300 ohms
Response Control Provides
Receiver output compatible with TIL

Device

Package

KA2654N

8 DIP

Operating Temperature
-20 - +85°C

KA2654D

8 SOP

-20 - + 70°C

,

BLOCK DIAGRAM

PIN CONFIGURATION

Vee

VEE

VEE

1

•

8

Vee
DRIVER
INPUT

;>0-----+---------4 7

DRIVER
OUTPUT

REFERENCE
REGURATOR

•

RECEIVER
INPUT

RESPONSE
CONTROL

c8SAMSUNG
Electronics

110

LINEAR INTEGRATED CIRCUIT

KA2654

ABSOLUTE MAXIMUM RATINGS

(Ta=25°C, unless otherwise noted)

Characteristic
Positive Supply Voltage
Negative Supply Voltage
Input Voltage Range of Driver
Input Voltage Range of Receiver
Output Voltage Range of Driver
Output Voltage Range of Receiver
Output Current of Driver
Response Control Current
Power Dissipation

Operating Temperature Range

Symbol

Value

Unit

Vee
VEE
Vird
Virr
Vord
Vorr
ICd
Ires

-0.4 - + 18
0.4 --18
-5 -18
-30 - 30
-25 - 25
-0.4 - 7
50
-10 - 10

V
V
V
V
V
V
mA
mA

DIP

Pd

762

mW

SOP

Pd

543

mW

DIP

Ta

-20 - 85

°C

SOP

Ta

-20 - 70

°C

T sig

-65 -150

°C

Symbol

Value

Unit

Vee
VEE
IRES
V ID
VIR
lOR

4.5 -15
-4.5 - -15
-5.5 - 5.5
15
-25 - 25
24

V
V
mA
V
V
mA

Storage Temperature Range

•

RECOMMENDED OPERATING CONDITIONS
Characteristic
Positive Supply Voltage
Negative Supply Voltage
Response Control Current
Input Voltage of Driver
Input Voltage of Receiver
Output Current of Receiver

ELECTRICAL CHARACTERISTICS
(Vee = 12V, VEE = -12V, Ta = - 20°C - 85°C, unless otherwise noted)
Characteristic

Positive Supply Current

Positive Supply Current

Test Condition

Min

Typ

Max

Vee=5V
Vee=9V
Vee = 12V

leel

VID = 2.0V
V 1R = 2.3V
No Load

6.3
9.1
10.4

8.1
11.9
14.0

Vee = 5V
Vee = 9V
Vee = 12V

lee2

V1D =O.8V
V 1R =0.6V
No Load

2.5
3.7
4.1

3.4
5.1
5.6

VEE =
VEE =
VEE =
NegatilSe Supply Current V =
EE
VEE =
VEE =
I

Symbol

- 5V
-9V
-12V
-5V
- 9V
-12V

Vee =5V
Vee = 12V

c8SAMSUNG
Electronics

IEEl

IEE2

lee3

VID = 2.0V
VIR=2.3V
No Load
V'D=O.8V
V'R=0.6V
No Load
VID = OV, VIR = 2.3V
VEE = OV, No Load

-3.1
-4.9
-4.8 -6.1
-0.20 -0.35
-0.25 -0.40
-0.27 -0.45
- 2.4

Unit

mA

-3.9

4.8
6.7

6.4
9.1

111

KA2654

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS
Characteristic

(Continued)

Symbol

Test Condition

Min

Typ

Max

Unit

DRIVER
Input Voltage High

V,H

Input Voltage Low

V,L

2.0

Vee =5V, VEE = -5V
Output Voltage High

Vee = 9V, VEE = - 9V

VOH

V\D = 0.8V, RL = 3KO

Vee = 12V, VEE = -12V

3.2

3.7

6.5

7.1

8.9

9.8

Vee =5V, VEE = -SV
Output Voltage Low

Vee = 9V, VEE = - 9V

VOL

VID = 2.0V, RL = 3KO

Voc= 12V, VEE= -12V
Input Current High
Input Current Low

hH

VID = 7.0V

I'L

V'O=O.OV

10SH

V,o =0.8V, Vo=O.OV

-7.0

Output Short Circuit Current (Negative)

10SL

VID = 2.0V, Vo=O.OV

6.5

Output Impedance

Ro

Vee = VEE = OV, Vo = ± 2V

300

Output Short Circuit Current (Positive)

V
0.8

V

-3.6

-3.2

-7.1

-6.4

-9.7

-8.8
5

JLA

-0.73

-1.2

rnA

V

-12.0 -14.5 rnA
11.5

14.0

rnA
0

RECEIVER
Input Threshold Voltage (Positive)

VT +

1.2

1.9

2.3

Input Threshold Voltage (Negative)

VT -

0.6

0.95

1.2

Input Hysteresis

VHYS

0.6
4.1

4.5

Vee =5V, VEE = -5V
Output Voltage High

VOH

V'R = 0.6V, 10H= -10JLA

3.7

V

Vee = 12V, VEE = -12V

4.4

4.7

5.2

Vec ';'5V, VEE = -5V

3.1

3.4

3.8

VOH

V,R = 0.6V, 10H = 0.4mA

VOL

V'R = 2.3V, 10L = 24mA

3.6

Vec = 12V, VEE = - 12V
Output Voltage Low
Input Current High

Input Current Low
Output Short Circuit Current

c8SAMSUNG
Electronics.

I'H

I'L
los

V

4.0

4.S

0.2

0.3

V,R = 25V

3.6

6.7

8.3

V,R =3V

0.43

0.67

1.0

V,R = -25V

-3.6

-6.7

-8.3

V,R = -3V

-0.43 -0.74

-1.0

V,R =0.6V

-2.8

-3.7

V

V
rnA

rnA
rnA

112

LINEAR INTEGRATED CIRCUIT

KA2654
SWITCHING CHARACTERISTICS

(Vee = 12V, VEE = -12V, Ta = - 25°C, unless otherwise noted)
Characteristic

Symbol

Test Condition

Min

Typ

Max

340

480

ns

100

150

ns

120

180

ns

105

160

ns

2.1

3.0

P.s

2.1

3.0

p's

150

240

ns

50

100

ns

250

360

ns

18

35

ns

Unit

DRIVER
Propagation Delay Time Low to High

tPLH

Propagation Delay Time High to Low

t pHL

Transition Time Low to High

tTLH

Transition Time High to Low

trHL

Transition Time Low to High.

trLH

TranSition Time High to Low

trHL

RL =3KO
C L 50pF

=

RL =3KO - 7KO
CL =2500pF

RECEIVER
Propagation Delay Time Low to High

tpLH

Propagation Delay time High to Low

t PHL

Transition Time Low to High

trLH

Transition Time High to Low

trHL

Note: Measu red between

+ 3V

RL=4000
C L =50pF

and - 3V points on the output waveform.

TEST CIRCUIT
3V
INPUTo------i

1

OUTPUT

C,"50pF

INPUT

ov
tpLH

OUTPUT

90%

VOH

VOL

(TEST CIRCUIT)

tTLH
Fig. 1 Driver
(WAVE FORM)

+5V

,---------~--------4V

INPUT

0------1

INPUT

---~

----oV

OUTPUT --------'"\.

I ' - - - -...............Lf---+---- VOL

(TEST CIRCUIT)

(WAVEFORM)
Fig. 2 Receiver

c8SAMSUNG
Electronics

113

I

NOTES

CMOS INTEGRATED CIRCUIT

KS5706

16 DIP

3 LINE DRIVERS AND
3 LINE RECEIVERS
The KS5706 is a CMOS 3 line drivers and 3 line receivers
in a single chip designed to interface data terminal
equipment with data communications equipment in conformance with the electrical specifications of EIA standard RS-232-C and CCITT V.28.

16 SOP

FEATURES
•
•
•
•
•
•
•
•

Current limited output
Power·off sourcljI impedance: 300 Ohms
Compatible with TTL
Flexible operating supply range (± 5 to ± 12V)
Output voltage swing selectable
Input resistance (3 to 7 KQ)
Input voltage range: ± 25V
Input threshold hysteresis built in

1

•

16

Device

Package

KS5706N

16 DIP

KS5706D

16 SOP

Operating Temperature
-40 - +85°C

SCHEMATIC DIAGRAM

PIN CONFIGURATION

Voo

•

ORDERING INFORMATION

(1/3 OF CIRCUIT SHOWN)

Vee

Vee

Tx

300n

LEVEL
SHIFT

c8SAMSUNG
Electronics

.

115

CMOS INTEGRATED CIRCUIT

KS5706

ABSOLUTE MAXIMUM RATINGS
Characteristic

Power Supply Voltage

(Ta=25°C, unless otherwise noted)
Symbol

Value

Unit

Voo
Vss
Vee

- 0.5 -13.5
+0.5 - -13.5
-0.5 -6.0

Vdc

(Voo~ Vee)

Input Voltage Range
Receiver Input (Rx1-3)
Oriver Input (011-3)

VIR

Maximum Current Per Pin
Power Oissipation
Operating Temperature
Storage Temperature

--

-25 - 25
-0.5 -Voo+0.5

Vdc

Imax

±60

rnA

Po

1.0

W

Ta

-40 -85

°C

T 5tg

-85-150

°C

--

ELECTRICAL CHARACTERISTICS
(Voo = + 5 to + 12V, Vss = - 5 to -12V, VOO~ Vee, Ta = - 40° to 85°C, unless otherwise noted)
Symbol

Characteristic

Test Condition

Min

Typ

Max

Unit

4.5
-4.5
4.5

5 to 12
-510 -12
5.0

13.2
-13.2
5.5

Vdc

140
340
300

400
600
450

p.A

0.8

Vdc

RECOMMENDED OPERATING CONDITIONS

Power Supply Voltage

Voo
Vss
Vee

Quiescent Current (Inputs tied to GNO,
outputs unloaded)
DRIVER (Vee

Voo
Vss
Vee

VDo~Vee

100
Iss
-lee

Voo = + 12.0V
Vss= -12.0V
Vee= +5.0V

VIL
VIH

Low
High

= +5V±5%)

Input Voltage (011-3)

2.0

Input Leakage Current (011-3)

liN

011-3=Vce

Output Voltage High (011-3 = 0.8V,
RL = 3.0Kn), Tx1·3

VOH

Voo=5.0V, Vss = -5.0V
Voo=6.0V, Vss = -6.0V
VOD = 12.0V, Vss = -12.0V

3.5
4.3
9.2

3.9
4.7
9.5

Vdc

Output Voltage Low (011-3 = 2.0V,
RL=3.0Kn), Tx1-3

VOL

Voo = 5.0V, Vss = - 5.0V
Voo=6.0V, Vss= -6.0V
Voo= 12.0V, Vss= -12.0V

-4.0
-4.5
-10.0

-4.3
-5.2
-10.3

Vdc

Output Short Circuit Current

Ise

(Voo = 12.0V, Vss = - 12.0V)
Tx1·3 shorted to Gnd
Tx1·3 shorted to ± 15.0V

Power Off Source Resistance (Tx1-3)

c8SAMSUNG
Electronics

Rn

Voo = Vss = Gnd = OV,
Tx1-3 = ± 2.0V

± 1.0

± 10
±40
300

±20
±60

p.A

rnA

n

116

CMOS INTEGRATED CIRCUIT

KS5706
ELECTRICAL CHARACTERISTICS
Characteristic

Symbol

(Continued)
Test Condition

Min

Typ

, Max

Unit

RECEIVER
Input Turn-On Threshold Voltage,
Rx1-3

V 1H

001-3 = VOL,
Vee = 5.0 -6.0V

1.35

1.80

2.35

Vdc

Input Turn-Off Threshold Voltage,
Rx1-3·

V 1L

001-3::: VOH,
Vee::: 5.0 -6.0V

0.75

1.00

1.25

V dc

Input Threshold Hysteresis, Rx1-3

V HY

V 1H - V 1L

0.6

0.8

Input Resistance, Rx1-3

RIN

Rx1-3= ±3 -±25V

3.0

5.4

Output Voltage High, 001-3
(Rx1-3::: - 3 - - 25V)

VOH

lOUT::: - 20J-tA, Vee = 5.0V
louT= -1mA, Vee=5.0V

4.9
3.8

4.3

Output Voltage Low, 001-3
(Rx1-3 = 3 - 25V)

VOL

louT = 20J-tA, Vee = 5.0V
lOUT = 2mA, Vee = 5.0V
lOUT = 4mA, Vee = 5.0V

Vdc
7.0

KO
Vdc

0.Q1
0.2
0.5

0.1
0.5
0.7

VdC

200
200

325
325

nS

SWITCHING CHARACTERISTICS (Vcc=5V±5%, V DD =6V-12V, Vss= -6V --12V. Fig 2)
Drivers Propagation Delay Time, Tx1-3

t pLH
t pHL

RL =3Kn, CL=50pF, Low to High
RL=3Kn, CL=50pF, High to Low

Drivers Output Slew Rate, Tx1-3

SR

RL = 3KO, C L ::: 50pF

±6

±30

V/p,s

Receivers Propagation Delay Time,
001·3

tpLH
t PHL

C L = 50pF, Low to High
C L = 50pF, High to Low

150
150

300
300

nS

Receivers Output Rise Time, 001-3

t,

C L =50pF

250

400

nS

Receivers Output Fall Time 001·3

tf

C L =50pF

40

80

nS

--+3V
011
012

Tx1

14

RX1·3

'------oV

Tx2

12

VIN= ±2V
DI3

Tx3

10

'Voo

8

RO=VIN/I

Vss

001·3

ir---- VOH
--VOL
t,

9

GND

OV

VOH

Fig. 1 Power Off Source Resistance

SLEW RATE (SR) = (0.8) (VOH - Vall or (0.8) (VOL -'VOH}
t,
tf
Fig. 2 SWitching Characteristics

c8SAMSUNG
Electronics

117

•

CMOS INTEGRATED CIRCUIT

KS5706

PIN DESCRIPTION
Pin

Name

Functions

1

Voo

8

Vss

Negative power supply. Typically - 5 to -12V

Vee

Digital power supply. This pin is connected to the logic
power supply (Max. 5.5V). Vee must be less than
or equal to Voo

16

Positive power supply. Typically 5 to 12V

9

GNO

10, 12, 14

011, 012, 013

3, 5, 7

Tx 1, Tx2, Tx3

Transmit data output. These are the RS-232-C transmit
signal output pins. A logic "0" causes the output to swing
to Voo and a logic "1" causes the output to swing to Vss

2, 4, 6

Rx1, Rx2, Rx3

Receive qata input. These are the RS-232-C receive signal
input pins which swing from + 25 to - 25V. A voltage
between + 3 and + 25V causes the correspanding DO pin to
swing to GNO and a voltage between - 3 and - 25V causes
the DO pin to swing to Vee

11, 13, 15

DO 1, 002, 003

Ground. All voltage levels are referenced to this pin
Driver data input. These are the high impedance digital
input pins. These input levels are compatible with TTL
--1--

qsSAMSUNG
Electronics

Receive data output. Swing from Vee to GNO. Each output
pin is capable of driving TTL input load

118

KS5788

CMOS INTEGRATED CIRCUIT

QUAD CMOS LINE DRIVER
The KS5788 is designed to interface data terminal equipment (OTE) with data communications equipment (OCE)
in conformance with the specifications of EIA RS-232-C,
CCITI V.24 standards. The KS5788 is direct replacement
for the bipolar device (MC1488).

14 SOP

FEATURES
•
•
•
•
•

I

Low power consumption & low delay slew
Pin for pin equivalent to MC1488
Power-off source impedance: 300n (min)
Compatible with TTL and HCTLS families
Flexible operating supply range: 4.S-12.6V

ORDERING INFORMATION
PIN CONFIGURATION

•

Device

14 Vee

Package

KS5788N

14 DIP

KS57880

14 SOP

Operating Temperature

-40 - +85°C

BLOCK DIAGRAM
(1/4 OF CIRCUIT SHOWN)

INPUT 1

LEVEL SHIFT

TTL LEVEL

INPUT 2

OUTPUT V - - - . . - - - - - - - C K

SLEW RATE
CONTROL

c8SAMSUNG
Electronics

119

KS5788

CMOS INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristic

(Ta = 25°C, unless otherwise noted)
Symbol

Value

Unit

Vee
VEE

-0.5 -13.5
0.5 - -13.5

VdC

VIN

-0.3 -Vee+0.3

V dC

VOUT

-25- 25

VdC

Power Supply Voltage
Input Voltage (Any Input Pin)
Output Voltage (Any Output Pin)
Power Dissipation

Po

1.0

W

Operating Temperature

Ta

-40 -85

°C

Storage Temperature

Tstg

-65 -150

°C

ELECTRICAL CHARACTERISTICS
(Vee = 4.5 to 12V, V Ee = - 4.5 to -12V, GND = OV, Ta
Characteristic

= - 40°

Symbol

to 85°C, unless otherwise noted)

Test Condition

Min

Typ

Max

Unit

4.5
-4.5

12.6
-12.6

V dc

RECOMMENDED OPERATING CONDITIONS
Power Supply Voltage

Vee
VEE

Vee
Vee

DC ELECTRICAL CHARACTERISTICS
Input Current 1

III

VIN=GND

-10

10

J1.A

Input Current 2

ItH

VIN =V ee

-10

10

J1.A

lee1

Vee=4.5V, V ee = -4.5V
Vee = 9.0V; Vee = - 9.0V
Vee = 12.0V, V ee -12.0V

10
30
60

J1.A
J1.A
J1.A

lee2

Vee=4.5V, Vee= -4.5V
Vee=9.0V, V eE = -9.0V
Vee 12.0V, Vee = -12.0V

30
190
425

J1.A
J1.A
J1.A

Negative Supply Current 1
(VIN = Vll , RL =00 , per package)

IEE1

Vee = 4.5V, Vee = - 4.5V
Vee=9.0V, VEE= -9.0V
Vee = 12.0V, VEE = -12.0V

-10
-10
-10

J1.A
J1.A
J1.A

Negative Supply Current 2
(VIN = VIH , Rl = 00, per package)

lee2

Vcc=4.5V, VEE = -4.5V
Vee = 9.0V, Vee = - 9.0V
Vee = 12.0V, Vee = -12.0V

-30
-30
-60

J1.A
J1.A
J1.A

InRut Voltage High

VIH

2.0

Voo

Vdc

GND
GND

0.8
0.6

Vdc

Positive Supply Current 1
. (VIN = Vll, Rl = 00, per package)
Positive Supply Current 2
(VIN = V IH , RL = 00, per package)

Input Voltage Low

c8~SUNG

V IL

=

=

Vee~ 7V, VEE~ - 7V
Vcc~7V, VEE~ -7V

120

CMOS. INTEGRATED CIRCUIT

KS5788

ELECTRICAL CHARACTERISTICS
Characteristic

(Continued)

Symbol

Test Condition

Min

Output Voltage High
(VIN = V IL , RL = 3KO - 7KO)

VOH

Vee = 4.5V, VEE = - 4.5V
Vee = 9.0V, VEE = - 9.0V
Vee = 12V, VEE = -12V

Output Voltage Low
(V IN = V IH , RL = 3KO - 7KO)

VOL

Vee = 4.5V, VEE = - 4.5V
Vee = 9.0V, VEE = - 9.0V
Vee = 12V, VEE = -12V

Output Short Circuit current

IVIN =VIL

l

VIN =V IH

Power Off Output Resistance

los
Ro

Typ

Max

3.0
6.5
9.0

Unit
V dC

-3.0
-6.5
-9.0

V dC

45

Vo=GND

rnA
-45

Vee = 12V, VEE = - 12V
Vee = VEE == OV, VOUT = ± 2V

0

300

SWITCHING CHARACTERISTICS (Vcc=4.5V to 12V, V EE = -4.5V to -12V, Ta= -40°C - 85°C, Fig. 1)
Propagation Delay

tpd

6.0
5.0
4.0

Vee = 4.5V, VEE = - 4.5V
Vee = 9.0V, VEE = - 9.0V
Vee = 12V, VEE= -12V

itS

Output Rise Time

t,

VOUT == from - 3V to 3V

0.2

itS

Output Fall Time

tl

VOUT = from 3V to - 3V

0.2

itS

Output Slew Rate

SR

RL = 3KO to 7KO
15pF>CL>2.5nF

Typical Propagation Delay Skew

tSK

Vee = 12V, VEE = - 12V

30
400

V/p.S
nS

--'-.5V-----~\-11-,'5_V~~~·~~_-:~:

u--__..-------1'~---O VOUT
VIN

_~

tpo

~tpo

VOUT--- .......
%" I
90

!

10%

'CL includes probe and jig capacitance

10%

tl

Fig. 1 AC Test Circuit

c8SAMSUNG
Electronics

Fig. 2 Switching Waveforms

121

•

CMOS INTEGRATED CIRCUIT

KS5789A

14 DIP

QUAD CMOS LINE RECEIVER
The KS5789A is designed to interface data terminal
equipment (DTE) with data communications equipment
(DCE) in conformance with the specifications of EIA
RS-232-C, CCITT V.24 standards. The KS5789A is direct
replacement for the bipolar device (MC1489/A).

14 SOP

FEATURES
•
•
•
•
•
•

Low power consumption & low delay slew
Pin for pin equivalent to MC1489/A
Inputs withstand ± 30V
Fail-safe operating mode
Internal noise filter
Internal input threshold with hysteresis

ORDERING INFORMATION
Package

Device

PIN CONFIGURATION

KS5789AN

14 DIP

KS5789AD

14 SOP

Operating Temperature
-40 _ +85°C

BLOCK DIAGRAM
(1/4 OF CIRCUIT SHOWN)
COMPARATOR

14

Vee
INPUT

c8SAMSUNG
Electronics

NOISE
FILTER

122

KS5789A

CMOS INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristic

(Ta=25°C, unless otherwise noted)
Symbol

Value

Unit

Vee
Y'N
VOUT
Po
Ta
T5tg

-0.5 -7.0
-30-30
- 0.3 - Vee + 0.3
500
-40 -85
-65 -150

Vdc
Vdc
Vdc
mW
°C
°C

Power Supply Voltage
Input Voltage
Output Voltage
Power Dissipation (85°C)
Operating Temperature
Storage Temperature

I

ELECTRICAL CHARACTERISTICS
(Vee=5V±0.5V, Ta:::: -40° to 85°C, unless otherwise noted)
Characteristic

Symbol

Test Condition

Min

Typ

Max

Unit

DC ELECTRICAL CHARACTERISTICS
Input Voltage High

V,H

1.3

2.5

Vdc

Input Voltage Low

V,L

0.5

1.7

V dc

Input Hysteresis Voltage

VH

V,H - V,L

liN

V,N =3V
Y,N = -3V
Y,N =25V
Y'N = - 25V

1.0
-1.0
8.3
-8.3

mA

Input Current

1.0
0.43
-0.43
3.6
-3.6

V dc

Output Voltage High

VOH

Y,N = V'L(min), lOUT = - 3.2mA

Output Voltage Low

VOL

Y'N = V'H(max)o lOUT = 3.2mA

0.4

Vdc

Supply Current

Icc

RL =00, Y'N = VIl.(min) to V'H(max)

600

,.,.A

6.5
300
300
1.0

,.,.S
nS
nS
,.,.S
nS

2.8

Vdc

SWITCHING CHARACTERISTICS (Vee = 4.5V to 5.5V, Ta::;: -40°-85°C, C L=50pF, Note 1)
Propagation Delay
Output Rise Time
Output Fall Time
Pulse Width Assumed to be Noise
Propagration Delay Skew
Note 1: Test waveform tr

=tl =200ns, V,H =

c8SAMSUNG
Electronics

tp
tr
tl

Input pulse width ~ 10,.,.S

tnw
t5k

+ 3V,

400
V,L = - 3V, f = 20KHz

123

CMOS INTEGRATED CIRCUIT

KS5789A

Vee

INPUT

>o~-e~-o

OUTPUT

Vour

90%

Fig. 1 AC Test Circuit

Fig. 2 Switching Waveforms

TYPICAL APPLICATION

TIL

INTER
CONNECTING
CABLE

KS5788

TIL

LINE RECEIVER

LINE DRIVER

LINE RECEIVER

KS5789A

LINE DRIVER

KS5789A

TTL

KS5788

SIGNAL GROUND
(DTE)

(DCE)

RS-232-C Data Transmission

c8SAMSUNG
Electronics

124

CMOS INTEGRATED CIRCUIT

KS5805A1KS5805B

TELEPHONE PULSE DIALER WITH REDIAL
The KS5805A1B is a monolithic CMOS integrated circuit and provides
all the features required for implementing a pulse dialer with redial.

18 DIP

FUNCTIONS
•
•
•
•
•
•
•
•

Mute output logic "0"
Pulse output logic "0"
RC oscillation for reference frequency
Designed to operate directly from the telephone line
Used CMOS technology for low voltage, low power operation
Power up clear circuitry
KS5805A pin 2: V REF
KS5805B pin 2: Tone out

•

FEATURES
• Uses either a standard 2 of 7 matrix keyboard with negative true
common or the inexpensive form A-type keyboard
• Make/Break ratio can be selected
ORDERING INFORMATION
• Redial with * or #
• Continuous MUTE
Device
Pack~ge Function
Operating Temperature
• Tone signal output or on-chip reference Voltage by
Pin 2=
bonding option on chip
KS5805AN 18 DIP
Vref
• 10 pps/20 pps can be selected
-30 - +60°C
Pin 2 =
KS5805BN 18 DIP
Tone Out

TEST CIRCUIT
GND

voo

Voo ~----------------------------~--------~~------~

1MO

KS5805 AlB

60% Break
20pps

Fig. 1

c8SAMSUNG
Electronics

10pps

125

CMOS INTEGRATED CIRCUIT

KS5805A1KS5805B

ABSOLUTE MAXIMUM RATINGS (Ta =25°C)
Characteristic

Symbol

DC Supply Voltage
Voltage on Any Pin
Power Dissipation
Operating Temperature
Storage Temperature

Voo
V1N
Po
Topr
Tstg

Value

VDO

Unit

6.2
+0.3, Gnd-0.3
500.0
-30-+60
-65- +150

V
V
mW
°C
°C

DC ELECTRICAL CHARACTERISTICS
(Ta =25°C unless otherwise specified)
Max

Supply Voltage

Voo

6.0

V

Key Contract Resistance

RKI

1

KG

Keyboard Capacitance

C K1

30

pF

KIH
KIL

Typ

Unit

Symbol

Key Input Voltage

Test Conditions

Min

Characteristic

2.5

2 of 7 input
mode

O.8Voo

Voo

Gnd

O.2Voo

V

Notes

1

1

Key Pull-Up Resistance

K 1Ru

Voo =6.0V

100

KG

Key Pull-Down Resistance

K 1Ro

VIN=4.8V

4.0

KG

Mute Sink Current

1M

Voo=2.5V
Vo=0.5V

500

/LA

2

Pulse Output Sink Current

Ip

Voo=2.5V
Vo=0.5V

1.0

rnA

3

Tone Output Sink Current

hL

Voo = 2.5V
Vo=0.5V

250

/LA

4

Tone Output SourcE;! Current

hH

Voo=2.5V
Vo=0.5V

250

/LA

4

Memory Retention Current

IMR

All outputs under
no load

0.7

/LA

6

Operating Current

lop

All outputs under
no load

100

150

/LA

Mute or Pulse Off Leakage

kKG

Voo=6.0V
Vo =6.0V

0.001

1.0

/LA

2.3

VREF Output Source Current

IREF

Voo - VREF = 6.0V

rnA

5

1.0

7.0

Note 1) Applies to key input pin. (R1-R4' C1-C 3)
2) Applies to MUTE output in.
3) Applies to PULSE output pin.
4) Applies to TONE pin (KS5805B)
5) Applies to V REF pin (KS5805A)
6) Current necessary for memory to be maintained. All outputs unloaded.
* Typical values are to be used as a design aid are not subject to production testing.

c8SAMSUNG
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126

KS5805A1KS5805B

CMOS INTEGRATED CIRCUIT

AC ELECTRICAL CHARACTERISTICS (Ta =2S0C)
Charactistic

Symbol

Min

Typ

Max

Unit

Notes

Oscilator Frequency

Fose

4

KHz

1

Key Input Debounce Time

TOB

10

ms

3,4

Key Down Time for Valid Entry

TKO

40

ms

4,5

Key Down Time During
Two-Key Roll Over

tKR

5

ms

4

=2.5V)

tos

1

Mute Valid After Last Outpulse

tMO

5

ms

3,4

Pulse Output Pulse Rate

PR

10

PPS

2

On-Hook Time Required to
Clear Memory

tOH

ms

4

Pre-Digital Pause

Tpop

800

ms

3,4

Inter-Digital Pause

TIDP

800

ms

3,4

Frequency Stability
Voo 2.5 - 3~5V

.if

±4

%

.if

±4

%

1

KHz

Oscillator Stat-Up Time (Voo

=

Frequency Stability Voo

=3.5- 6.0V

Tone Output Frequency
Note: 1)
2)
3)
4)
5)
6)

ms

300

FTONE

•

4,6

Rs=2MO, R=220KO, C=390pF.
If pin 10 is tied to Vee, the output pulse rate will be 20pps.
If the 20pps option is selected, the time will be 1/2 these shown.
These times are directly proportional to the oscillator frequency.
Debounce plus oscillator start-up time ::5 40ms.
If the 20pps option is selected, the tone output frequency will be 2KHz. (KS5805B ONLY)

PIN CONNECTIONS
Pin 1:
Pin 2:
Pin 3:
Pin 4:
Pin 5:
Pin 6:
Pin 7:
Pin 8:
Pin 9:

Voo
V rel (KS5805A)/Pacifier tone (KS5805B)
Column 1
Column 2
Column 3
GND
RC Oscillator
RC Oscillator
RC Oscillator

c8SAMSUNG
Electronics

Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin

10:
11:
12:
13:
14:
15:
16:
17:
18:

10/20pps Select
Make/Break Select
Mute Output
ROW 4
ROW 3
ROW 2
ROW 1
On-HooklTest
Pulse Output

127

CMOS INTEGRATED CIRCUIT

KS5805A1KS5805B
TIMING CHARACTERISTICS
Digit

Key input

Digit

Redial

------~L2-Jr------'~r----------------,~r---------------------

Column scan

RIJI1
nnnn
nnnn
(only KS58058)
----ullUUUl-- "H;-----1l.I1Jl1lf ___________~

Row scan

~-----------1llf"LJ1Jl.-----------~

On-Hook input

Ii,

Tone output

soo

I

,

!

MUTE output

:
I

PULSE output

I~

1

I
I

, I

:7

,

,:

I

I I

I

I

I

II .(~~
~!
/,
H
'~

I

r

f' n

I!H!
I

"
I ,It; I

r

'~n
4KHz 11
: I: n.~nn
I
UUL--------,-}---------t-++-JUU Os~ o~ UUI;-----n--------------~.nr
I
::
:I
TS! : :
: ~
: I
I
I
i
I
___ t--TOB
"
TIDP
::::1
H- i i™O1: :
: :
110ms.1
II
II~r' I
I
I

osc output

!

:

(pin 8)

! !Ii!PDP BOOms

!

i :

On hook

800ms

1/PR

Normal dialing

I

I

Off hook mode

I

I'

I~

i i i

I

Redial mode
Off hook mode

-

Test mode

Fig. 2

PIN DESCRIPTIONS
1. Voo (Pin 1)
This is positive supply pin. The voltage on this pin is measured relative to Pin 6 and is supplied from a 150llA
current source. This voltage should be regulated to less than 6.0 volts using on external form or regulation.

2. Tone signal outputN REF (Pin 2)
Tone signal out pin is CMOS comperementaly output and drives external bipolar transistor. This pin generates
a tone signal when a key is depressed. Tone signal frequency is 1KHz when 10pps pulse rate is selected. (the
frequency is 2KHz when 20pps pulse rate is selected). Only the pin 2 of KS5805A is VREF (on-chip reference voltage).

TYPICAL I-V CHARACTERISTICS
The VREF output provides a reference voltage that tracks internal
parameters of the KS5805A. VREF provides a negative voltage reference
to the Voo supply. Its magnitude will be approximately 0.6 volt higher
than the minimum operating voltage of each particular KS5805A.

7.0
6.0

The typical application would be to connect the VREF pin to the GND
pin (Pin 6). The supply to the Voo pin (Pin 1) should then be regulated
to 150IlA (lop max). With this amount of supply current, operation of the
KS5805A is guaranteed.

5.0
IREF
MA

4.0
3.0

The internal circuit of the VREF function is shown in Figure 3 with its
associated I-V characteristic.

2.0
VREF
1.0

voo

1.0
-VREF

2.0

3.0

4.0
5.0
VOLTS

c8SAMSUNG
Electronics

Fig. 3

128

CMOS INTEGRATED CIRCUIT

KS5805A1KS58058
3. Keyboard inputs (Pin 3, 4, 5, 13, 14, 15, 16,)

The KS5805A1B incorporates an innovative keyboard scheme that allows either the standard 2-of-7 keyboard with negative common or the inexpensive single contact (form A) keyboard to be used.
A valied key entry is defined by either a single row being connected to a single column or GND being simultaneously
presented to both a single row and column. When in the on-hook mode, the row and column inputs are held high and no
keyboard inputs are accepted.
When off-hook, the keyboard is completely static until the initial valid key input is sensed. The oscillator is then enabled
and the rows and columns are scanned alternately (pulled high, then low) to verify the varied input. The input must
remain valid for 10msec of debounce time to be accepted .
• Form A type keyboard

____________~

• 2 of 7 keyboard (negative common)

.4L-___________

COL

ROW

ROW

• 2 of 7 keyboard
• Electron ic input

H
~~~-----_________ U
?_~
U
VOD

COL

ROW

COL

_V_DD_ _ _ _ _ _-,

______

ROW

n _ n __

KEY BOARD CONFIGURATIONS

4. GND (Pin 6)

This is the negative supply pin and is connected to the common part in the general applications.

5.

O~,CILLATOR

(Pins 7, 8, 9)

The KS5805A1B contains on-chip inverters to provide oscillator which will operate with a minimum external components.
Following figure shows the on-chip configuration with the necessary external components. Optimum stability occurs with
the ratio K=Rs/R equal to 10.
The oscillator period is given by:
T=RC (1.386+(3.5KC s)/C-(±K/(K+1)) In (K/(1.5K+O.5))
Where Cs is the stray capacitance on Pin 7.
Accuracy and stability will be enhanced with this capacitance minimized.

Rs

r--<>----

c

8
L----

KS5805 AlB

9
R

c8SAMSUNG
Electronics

129

•

CMOS INTEGRATED CIRCUIT

KS5805A1KS5805B

6. 20110 pps (Pin 10)
Connecting this pin to GND (pin 6) will select an output pulse rate of 10pps.
Connecting the pin V DD (pin 1) will select an output pulse rate of 20pps.

7. MAKE/BREAK (Pin 11)
The MAKE/BREAK pin controls the MAKE/BREAK ratio of the pulse output. The MAKE/BREAK ratio is controlled
by connection V DD or GND to this pin as shown in the following table.
Input

V DD (Pin 1)

Make

Break

34%

66%

.~

GND (Pin 6)

'--_._-_.-

40%

60%

8. MUTE OUTPUT (Pin 12)
The mute output is an open-drain N-channel transistor designed to drive external bipolar transistor.
This circuitry is usually used to mute the receiver during outpulsing. As shown in Fig. 2 the KS5805 mute output
turns on (pulls to the VGND-supply) at the beginning of the predigital pause and turns off (goes to an open circuit)
fol:owing the last break.
The delay from the end of the last break until the mute output turns off is mute overlap and is specified as tMO.

9. ON·HOOKITEST (Pin 17)
The "ON-HOOK" or "Test" input of the KS5805A/B has a 100KQ pull-up to the positive supply. A Vee input or
allowing the pin to float sets the circuit in its on-hook or test mode while a VGND input sets it in the off-hook or
normal mode. When off-hook the KS5805A/B will accept key inputs and outputs the digits in normal fashion. Upon
completion of the last digit, the oscillator is disabled and the circuit stands by for additional inputs.
Switching the KS5805A/B to on-hook while it is outpulsing causes the remaining digits to be outpulsed at 100x
the normal rate (M/B ratio is then 50/50).
This feature provides a means of rapidly testing the device and is also on efficient method by which the circuitry
is reset. When the outpulsing in this mode, which can be up to 300msec, is completed, the circuit is deactivated
and will require current only necessary to sustain the memory and power-up-clear detect circuity (refer to the electrical specifications).
Upon retuning off-hook, a negative transistion on the mute output will insure the speech network is connected
to the line. If the first key entry is eithr a * or #, the number sequence stored on-chip will be outpulsed. Any other
valid key entries will clear the memory and outpulse the new number sequence.

10. PULSE OUTPUT (Pin 18)
The pulse output is an open drain N-channei transistor designed to drive external bipolar transistor. These transistor would normally be used to pulse the telephone line by disconnecting and connecting the network. The
KS58A/B05 pulse output is an open circuit during make and pulls to the GND supply during break.

c8SAMSUNG
Electronics

130

KS58C05/KS58 005

CMOS INTEGRATED CIRCUIT

PULSE DIALER WITH REDIAL
The KS58C/D05 is a monolithic CMOS integrated circuit
which uses an inexpensive RC oscillator for its frequency reference and provides all the features required for
implementing a pulse dialer with 32 digit redial.

FUNCTIONS
•
•
•
•

Mute output logic "0"
Pulse output logic "0"
RC oscillation for reference frequency
Designed to operate directly from the telephone
line
• Used CMOS technology for low voltage,
low power operation

I

FEATURES
• Wide operating voltage range (2.0 - 6.0V)
• Low power dissipation
• Use either a standard 2 of 7 matrix keyboard with
negative true common or the inexpensive form
A-type keyboard
• Make/Break ratio can be selected
• Redial with * or #
• Continuous MUTE
• Power up clear circuitry on chip
• KS58C05 pin 2: Vref, KS58D05 pin 2: Tone output
• 10 pps/20 pps can be selected

ORDERING INFORMATION
Device
KS58C05N

18 DIP

KS58D05N

18 DIP

Pin 2=
Tone Out

I

--+----11

..----1

I

~

------~-+----+--,
~---------<6
HOOK

i FROM c~--

1~~;D~-

FROM
KEYBOARD

'----("'J

Fig. 1

c8SAMSUNG
Electronics

Operating Temperature

-20 -

+ 70°C

PIN CONNECTIONS

QVDD

I

Function
Pin 2=
Vref

TEST CIRCUIT
QGND

Package

Pin
Pin
Pi n
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Piri
Pin
Pin

1: VDD
2: Vref (KS58C05)/Pacifier tone (KS58D05)
3: COfUrTil11
4: Column 2
5: Column 3
6: GND
7: RC Oscillator
8: RC Oscillator
9: RC Oscillator
10: 10/20pps Select
11: Make/Break Select
12: Mute Output
13: ROW 4
14: ROW 3
15: ROW 2
16: ROW 1
17: On-HooklTest
18: Pulse Output

20pps

~
131

CMOS INTEGRATED CIRCUIT

KS58C05/KS58 005

ABSOLUTE MAXIMUM RATINGS (Ta=25°C)
Characteristic

Symbol

Supply Voltage
Input Voltage
Output Voltage
Power Dissipation
Operating Temperature
Storage Temperature

Voo
V1N
VOUT
Po
Ta
Tstg

Unit

Value

V
V
V
mW
°C
°C

6.2
Gnd-0.3, Voo+0.3
Gnd - 0.3, Voo + 0.3
500
-20 - + 70
-40 - + 125

ELECTRICAL CHARACTERISTICS
(V DO

=3.5V, fosc =2.4KHz. Ta =25°C, unless otherwise specified)

Characteristic

Test Conditions

Symbol

Min

Supply Voltage

Voo

2.0

Memory Retention Voltage

VOR

1.0

Typ

Max

Unit

6.0

V

f - - - - - - - - - - - - - - - i - - - - - - - 1----------------------+--------+-----+------------

f---,n_p_u_t_H_ig_h_V_o_'_ta_g'-e_ _-----,-___-+___V
___
IH - - ~ _
Input Low Voltage
VIL

-R;, C~ _ ~, H$, DRS,

----------

---MIS
--

Output Current (MUTE, PULSE)

101

V
V

------~--__t------1---

Operating Current
100
All output under no load
1-------------------1-------Output Leakage Current
10L
Vcc=6.0V, MOTE, PULSE=6.0V
-------1------1------

V

----~------+----~--~

1----0_.B_V_oo---+_____+_ Voo
Gnd
0.2V OD
100

150

0.001

1

p.A
p.A

--------~----+_-------l----+_--~

VO =O.4V, Voo=2.5V

0.5

1.5

mA

Vo =0.4V, Voo =3.5V

1.7

5.0

mA

2.4

KHz

--------+---------------------------~-----~--_4------~--4

102

f---------------_4-----l-------------------------I-----------+------t------1

Oscillator Frequency

fosc

f-------------_4----

---------------------\-----

-l----------l---- - -

Valid Key Entry Time
TKo
14
20
mS
f----------.:...----------t-------f-------------------i-------J----- - - - - t - - - On Hook Time Required to
300
mS
Clear Memory
f------------------------ e-----f---------------------i-------t-----l--- -+------1
Inter Digital Pause
Tlop
BOO
mS
-----------+-----+-------------------

Frequency Stability

.6 f

Voo = 2.0~ 6.0V

---- t - - - ----%

± 10

I - - - - - - - - - - - - - - - - - - - - - - - - - l - - - - I - - - - - - - - - - - - - - - - - - - - - - - 1 - - - - - - I-------r----- t - -

Tone Output Frequency

hONE

1.2

KHz

FUNCTION DESCRIPTION
1. "ON·HOOK" MODE
When "ON-HOOK," key inputs will not be recognized because the oscillator is disabled which prevents the
circuit from drawing excessive current.

2. "DIAL" MODE
When "OFF-HOOK," the device senses key down condition by detecting one key input and enters the key's
code into an on-chip memory.
The memory can be store up to 32 digits, and it allows key strobes to be entered at rates comparable to tone
dialing telephone. Output pulsing will continue until all entered digits have been dialed. To implement the pulse
dialer function, two outputs, one to pulse the telephone line and one to mute the receiver, are provided.

3. "REDIAL" MODE
The first 32 digits entered will be stored in the on-Chip redial memory and can be redialed by pressing either

* or H, provided that the receiver is "ON-HOOK" for minimum TOH (on hook time required to clear memory).
4. POWER UP CLEAR
The on-chip "POWER UP CLEAR" circuit reliable operation of the device. If the supply to the circuit is not
sufficient to retain data in the memory, a "POWER UP CLEAR" will help regaining a proper supply level.
This function will prevent the "Redial" or spontaneous outputing of incorrect data.

c8SAMSUNG
Electronics

132

KS58C05/KS58 005

CMOS INTEGRATED CIRCUIT

TIMING CHARACTERISTICS
Digit

Key input

Digit

Redial

------~L2-Jp----~~r--------------~~r---------------------

Tone output

___rum____

Column scan

~ --SOOH;-----J1Jl-JlIlf ___________~'

---Innnn~

_______. .RRM'__________

(only KS58D05)

LJuuutnr------------u-u---tJUl------------uu--

Row scan

I

On-Hook input - - ,

!

MUTE output

I
I

PULSE output

1

OSC output

i

r

n
I

i, :
! i:

:

11

I I . (f--,r---f

I
I

I

,

I

I

.

I

!i

'nn--------~+--------l_H-JUU Os~ o.ff UUl:"--------------------~.ru_
~~t
:!
TB I ::
::
:! ' i i
I

110;;-1

':

/,

1

4KHz

Tpop800ms

I

I

"

,

I

,

1 I:

I

II

:-TOS

:, I

H

SOOms
Normal dialing

I

n.~nn

=1 ~

TIDP

ITMO!:

~'

Off hook mode

I

r

! -

I

:

1

I

"

{f--!!

!

(pin 8)

On hook

I

I!
Ij

I'

I

l

I.

:I

I ~'
i

Redial mode
Off hook mode

=

Test mode

Fig. 2

PIN DESCRIPTIONS
1. Voo (Pin 1)
This is positive supply pin. The voltage on this pin is measured relative to Pin 6 and is supplied from a 150l-tA
current source. This voltage should be regulated to less than 6.0 volts using on external form or regulation.

2. Tone signal output/V REF (Pin 2)
Tone signal out pin is CMOScomplementally output and drives external bipolar transistor. This pin generates
a tone Signal when a key is depressed. Tone Signal frequency is 1.2KHz when 10pps pulse rate is selected.

TYPICAL I-V CHARACTERISTICS
The VREF output provides a reference voltage that tracks internal
parameters of the KS58C05. VREF provides a negative voltage
reference to the Voo supply. Its magnitude will be approximately 0.6
volt higher than the minimum operating voltage of each particular
KS58C05.

7.0
6.0

5.0

,The typical application would be to connect the VREF pin to the GND
'pin (Pin 6). The supply to the Voo pin (Pin 1) should then be regulated
to 150l-tA (lop max). With this amount of supply current, operation of
jthe KS58C05 is guaranteed.

IREF

MA

4.0
3.0

The internal circuit of the V REF function is shown in Figure 3 with its
associated I-V characteristic.

2.0
VREF

1.0

1.0
Voo -

VREF

2.0

3.0

4.0
5.0
VOLTS

c8SAMSUNG
Electronics

Fig. 3

133

CMOS INTEGRATED CIRCUIT

KS58C05/KS58D05
3. Keyboard inputs (Pin 3, 4, 5, 13,. 14, 15, 16)

The KS58CIDOS incorporates an innovative keyboard scheme that allows either the standard 2-of-7 keyboard with
negative commOn or the inexpensive single contact (form A) keyboard to be used.
A valied key entry is defined by either a single row being connected to a single column or GND being simultaneously
presented to both a single row and column. When in the on-hook mode, the row and column inputs are held high
are no keyboard inputs are accepted.
When off-hook, the keyboard is completely static until the initial valid key input is sensed. The oscillator is then
enabled and the rows and columns are scanned alternately (pulled high, then low) to verify the varied input. The
input must remain valid for 14-20 msec of debounce time to be accepted.
• Form A type keyboard

• 2 of 7 keyboard (negative common)

-----------~

COL

• 2 of 7 keyboard

-.~----------

ROW

±----

r--------------..
~-----~

COL

..

~-----------

ROW

G~L---_~
~ ~

COL

-------------

ROW

• Electronic input

Vcc

H

~~~--------------~
_vc_c__________- ,

~--""___ n____ mU

KEY BOARD CONFIGURATIONS

4. GND (Pin 6)
This is the negative supply pin and is connected to the common part in the general applications.

5. OSCILLATOR (Pin 7,8,9)
The KS58C/D05 contains on-chip inverters to provide oscillator which will operate with a minimum external
components.
Following figure shows the on-chip configuration with the necessary external components. Optimum stability
occurs with the ratio K = Rs/R equal to 6.67.
The oscillator period is given by:
T= RC [1.386 + (3.5Kcs}/C-(2K1CK+ 1) In CKI(1.5K+ O.5)l
Where Cs is the stray capacitance on Pin 7.
Accuracy and stability will be enhanced with this capacitance mini'!!}zed.

KS58C/D05

R

=8SAMSUNG
Electronics

134

KS58C05/KS58 DOS

CMOS INTEGRATED CIRCUIT

6. 20/10 pps (Pin 10)
Connecting this pin to GND (pin 6) will select an output pulse rate of 10pps.
Connecting the pin Voo (pin 1) will select an output pulse rate of 20pps.

7. MAKE/BREAK (Pin 11)
The MAKE/BREAK pin controls the MAKE/BREAK ratio of the pulse output. The MAKE/BREAK ratio is controlled
by connection Voo or GND to this pin as shown in the following table.
Input

Voo (Pin 1)
GNO (Pin 6)

Make

Break

I

33.4%

66.6%

40%

60%

8. MUTE OUTPUT (Pin 12)
The mute output is an open-drain N-channel transistor designed to drive external bipolar transis~.
This circuitry is usually used to mute the receiver during outpulsing. As shown in Fig. 2 the KS58C/005 mute
output turns on (pulls to the VGNo-supply) at the beginning of the predigital pause and turns off (goes to an open
circuit) following the last break.
The delay from the end of the last break until the mute output turns off is mute overlap and is specified as tMO'

9. ON·HOOKITEST (Pin 17)
This pin detects the state of the hook switch contact "OFF HOOK" corresponds to Vss condition. "ON HOOK"
corresponds to Voo condition. When outpulsing in this mode, which can be up to 300msec, is completed, the circuit
is deactivated and will require current only necessary to sustain the memory and power-up-clear detect circuitry
(refer to the electrical specifications).
Upon retuning off-hook, a negative transistion on the mute output will insure the speech network is connected
to the line. If the first key entry is either a * or #, the number sequence stored on-chip will be outpulsed. Any other
valid key entries will clear the memory and outpulse the new number sequence.

10. PULSE OUTPUT (Pin 18)
The pulse output is an open drain N-channel transistor designed to drive external bipolar transistor. These transistor
would normaliy be used to pulse the telephone line by disconnecting and connecting the network. The KS58C/005
pulse output is an open circuit during make and pulls to the GNO supply during break.

c8SAMSUNG
Electronics

135

•

KS58E05
PULSE

CMOS INTEGRATED CIRCUIT

DIALER

WITH

1'·D~

REDIAL

The KS58E05 is a monolithic CMOS integrated circuit
which uses an inexpensive RC oscillator for its
frequency reference and provides all the features
required for implementing a pulse dialer with 32 digit
redial.

FUNCTIONS
•
•
•
•

Mute output logic "0"
Pulse output logic "0"
RC oscillation for reference frequency
Designed to operate directly from the telephone
line
• Used CMOS technology for low voltage,
low power operation

FEATURES
• Wide operating voltage range (2.0 6.0V)
• Low power dissipation
• Use either a standard 2 of 7 matrix keyboard with
negative true common or the inexpensive form
A·type keyboard
• Make/Break ratio can be selected
• Redial with * or #
• Continuous MUTE
• Power up clear circuitry on chip
• 10 pps only.

ORDERING INFORMATION
Operating Temperature
-20 - + 70·C

TEST CIRCUIT
GND

PIN CONNECTIONS

voo

1MO

Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin

1: Voo
2:C
::-~ol'--u-m-n--'1
3: Column 2
4: Column 3
5: GND

6: RC Oscillator
7: RC Oscillator
8: RC Oscillator
9: Make/Break Select
10: Mute Output
11: ROW 4
12: ROW 3
13: ROW 2
14: ROW 1
15: On·HooklTest
16: Pulse Output

060% BREAK

Fig. 1

c8SAMSUNG
Electronics

136

CMOS INTEGRATED CIRCUIT

KS58E05
ABSOLUTE MAXIMUM RATINGS (Ta

=25°C)

Characteristic

Symbol

Value

Unit

Supply Voltage
Input Voltage
Output Voltage
Power Dissipation
Operating Temperature
Storage Temperature

Voo
V,N
VOUT
Po
' Ta
T51g

6.2
GND-0.3, Voo +0.3
GND-0.3, Voo +0.3
500
-20 -+ 70
-40 -+ 125

V
V
V
mW
·C·
·C

ELECTRICAL CHARACTERISTICS
(Voo = 3.5V, fose = 2.4KHz, Ta = 25°C, unless otherwise specified)
Characteris tic

Symbol

Test Conditions

Min

Typ

Max

Unit

~SUPPIY Voltage

Voo
2.0
6.0
V
~MemOry Re-te--n-t-io-n-V-o-,-ta--g-e----;f---- - - f - - - - - - - - - - - - + - --.--+---+----+-----i
voR
10
V
Input High Voltage

V,H

f---------------l-----

Input Low Voltage

V'l

_

_

_

-

R1 - R4 , C1 - C4 , HS, MIS

O.SVoo

Voo

V

GND

O.2Voo

V

---------+---+-------------4----+--4----+-~

~a-t-in-g-C--ur-ffi-n-t-------~-'-o-o-~A-"-0-u-t-pu-t-u-n__d_e_r_n_o_'_oa_d_ _ _+ ___~-1-0-0-+-1-5-0-~~-A~
Output Leakage Current

10l

Vee = 6.0V, MUTE, PULSE = 6.0V

101

Vo =O.4V, Voo·=2.5V

0.5

1.5

mA

102

Vo=0.4V, Voo =3.5V

1.7

5.0

mA

0.001

1

p,A

O~p~CuITe~(MUT~PULS~ f----~------------+_--~--~---~~

Oscillator Frequency

fose

Valid Key Entry Time

TKO

14

On Hook Time Required to
Clear Memory

TOH

300

2.4

Inter Digital Pause
Frequency Stability
Tone Output Frequency

.6f

fTONE

Voo = 2.0 - 6.0V

KHz
20

mS
mS

sao

mS

±10

%

1.2

KHz

FUNCTION DESCRIPTION
1. "ON·HOOK" MODE
When "ON-HOOK," key inputs will not be recognized because the oscillator is disabled which prevents the
circuit from drawing excessive current.

2. "DIAL" MODE
When "OFF-HOOK," the device senses key down condition by detecting one key input and enters the key's
code into at on-chip memory.
The memory can be store up to 32 digits, and it allows key strobes to be entered at rates comparable to tone
dialing telephone. Output pulsing will continue until all entered digits have been dialed. To implement the pulse
dialer function, two outputs, one to pulse the telephone line and one to mute the receiver, are provided.

3. "REDIAL" MODE
The first 32 digits entered will be stored in the on-chip redial memory and can be redialed by pressing either

* or #, provided that the receiver is "ON-HOOK" for minimum ton (on hook time required to clear memory).

4. POWER UP CLEAR
The on-chip "POWER UP CLEAR" circuit reliable operation of the device. If the supply to the circuit is not
sufficient to retain data in the memory, a "POWER UP CLEAR" will help regaining a proper supply level.
This function will prevent the "Redial" or sportaneous outputing of incorrect data.

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KS58E05

CMOS INTEGRATED CIRCUIT

TIMING CHARACTERISTICS
Digit

Key input

Digit

------~~

Redial

~

~.----------------------

Column scan

. ----utnruUl- -3OciH~-----.I1JLILIlf ------------",u-L-11nruulr-----------lIlrLJ1IL-----------~
i'
'/ n
I

Row scan

I

On-Hook input - ,

MUTE output

,
I,

r
I

PULSE output

I!
I•

fH!
I

ff---1.----f

H

,~

.

I

,

I

!

:I

;

UUL---------rr--------t-t+-JUU OS~ o!f UUt"--------------------lm--

'

~~n
4KHz: :
I
;:
:I
110~ r- TDB

OSCoutput
(pin 7)

1r

, \:
'::

I I

Ii!

I

' I

I,

I

iI
i ',

!

II'

TPDP BOOms

TIDP
BOOms

I

I

:

!!

,

TB!

:!

:

I I

nll~nn

r:

::

:

I

=1 ~ I™OI

I

:

i

:

:

:

1/PR

I:

~

Normal dialing

i
;

Redial mode

On hook ~.......- - - - - - - - - - - - - - - - _ _ I
Off hook mode

•

:

~

__

Off hook mode

Test mode

FiQ.2

1. Voo (Pin 1)

This is positive supply pin. The voltage on this pin is measured relative to Pin 6 and is supplied from a 150ILA
current source. This voltage should be regulated to less than 6.0 volts using on external form or regulation.

2. Keyboard inputs (Pin 2, 3, 4, 11, 12, 13, 14)
The KS58E05 incorporates an innovative keyboard scheme that allows either the standard 2-of-7 keyboard with
negative common or the inexpensive single contact (form A) keyboard to be used.
A valied key entry is defined by either a single row being connected to a single column or GND being simultaneously
presented to both a single row and column. When in the on-hook mode, the row and column inputs are held high and no
keyboard inputs are ac"V ss ")
OPERATION MODE INITIAL SWITCHING
SELECT
SELECT MODE ENTRY MODE

I

Voo
Voo

I

Vss

Vss

I

I

-J

Voo
Vss

I

Pulse

IT] Key-In

Tone

N/A

Pulse
Tone

NOTES

MODE SELECT
defines only initial mode
after going Off Hook and is
latched at first key entry.

I

MODE SELECT IT] key is disabled under
this condition.
input Vss

=

N/A

If choice of switching method is desired (either [f] key or MODE SELECT).
Operation select should be connected to MODE SELECT in order to avoid false
operation.

9

OSCIN

10

OSC OUT

11

Voo

12

Vss

Oscillator Input/Output
These pins are provided to connect an external 3.58MHz crystal. Oscillator starts
(at Off Hook) and is sustained until pulse or DTMF signal are finished.

--

Power
These are the power supply inputs. The device is designed to be operated on 2,QV
to 5.5V.

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•

'KS5819

CMOS INTEGRATED CIRCUIT

PIN DESCRIPTION

(Continued)

Pin

Name

Description

13

KEY IN TONE

Key In Tone Output
•
Key in tone signal is provided only in pulse mode for all Key-ins except [IJ
key-in. No KEY IN TONE is generated in DTMF mode. Fkt: 1.75KHz, Tkt: 23mS.
(N channel open drain)

14

OPERATION
SELECT

Operation Select Input
Mode switching (from Pulse to DTMF) entry is selectable with this input, i.e.
key entry or MODE SELECT input entry is selectable.
whether

15

TONE OUT

DTMF Signal Output
When a valid keypress is detected in DTMF mode appropriate low and high
group frequencies are generated which hybrided the Dual Tone Output.
Tone out is Off State in pulse mode.

16

X'MIT MUTE

III

X'mit Mute Output
HS

X'mit Mute Output

Voo

"ON"

Vss

Normally "OFF"
"ON" during pulse and DTMF dialing

(N channel open drain)

17

MUTE

Mute Output
HS

MUTE OUTPUT

Voo

"ON"

Vss

Normally "OFF" in DTMF mode.
"ON" during pulse dialing

(N channel open drain)
18

DP,DP

Dial Pulse Out. DP: CID, DP: AlB
DP: The normal output will be "OFF" during break and "ON" during make at
"OFF HOOK."
The output will be "ON" at "ON HOOK,"
DP: The normal output will be "ON" during break and "OFF" during make at
"OFF HOOK."
The output will be "OFF" at "ON HOOK."

c8SAMSUNG
Electronics

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KS5819

CMOS INTEGRATED CIRCUIT

KEYBOARD OPERATION
1. SINGLE MODE OPERATION
• Pulse Mode Operation

Off Hook

I G···B

Pulse mode is defined by the initial mode after going Off Hook and latched at
under Mode Select = Voo.

ru

key entry. This is the condition

• Tone Mode Operation

Off Hook

I B .. ·B

Tone mode is defined by the initial mode after going Off Hook and latched at [Q] key entry. This condition is under
Mode Select:: Vss.

Off Hook

IGB···8

If initial mode is at pulse mode after going Off Hook and Mode Select - Voo , Operation Select = VOD. Switching
mode from pulse to tone can be done by ITl key entry and latched at [Q] key entry.

• Manual Dialing with Automatic Access Pause

BG8B···B

Multiple Pause key entries can be accepted and stored in the redial memory, each as a digit. Each IE! key provides
3.5 seconds pause time, but [pJ key entry as first digit after going Off Hook is ignored. 0 key can also be used
as pause key in pulse mode. Pause (s) can be cancelled with [EJ, ITJ or !BQ] key during pause time in redialing.
[Q] = Any numeric key.
• Redialing

I

Off Hook

I EJ

Up to 32 digits can be dialed with M key. lBQl key is disabled while pulse or DTMF signals are transmitted.
When more then 32 digits are stored, redial is also inhibited.
00 key can be used as [fiQ] key in pulse mode.
• Inhibiting Redial

Off Hook

I El .. 8 8 EJ

Redial can be inhibited by depressing IBQ] IB.QI keys after DTMF or pulse signals are transmitted.

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I

CMOS INTEGRATED CIRCUIT

KS5819
2. PULSEITONE SWITCHABLE OPERATION

• Mode Switching by MODE SELECT Input (OPERATION SELECT = Vss)

Off Hook

18··· EJ c:::J
f---

Switching MODE SELECT to V,.

Pulse M o d e - - - - - - - - - - - - !

B· ··1
~ OTMF

Dn+m

1

MOde--i

Pulse mode is initially defined MODE SELECT = Voo , mode switching to OTM F can be accepted by MODE
SELECT = Vss , OTMF mode will be set up after pulse mode is finished. In this mode, digits IOn + II ... IOn + ml are
transmitted from Tone Out as OTMF signals by depressing corresponded keys.
If no lEI key is contained serially before or after mode switching, following condition is obtained.

L--0_ff_H_O_O_k----l1

G···G

Switching MODE SELECT to V"

EJ··

·1 Dn+m 1

~OTMF MOde--i

f-I------pulse Mode
(On, On + I =1= Pause)

If digit IOn + 11 is depressed after pulse mode is finished, OTMF mode will be set up after last pulse signal ([QDl)
is generated. In this mode, digits IOn + 11 ... IOn + m\ are transmitted from Tone Out as DTMF signals by depressing
corresponded keys. If digit IOn + 11 is depressed during dialing pulse signals, OTMF mode but in Hold State will
be set up after last pulse signal \QnJ is finished. MODE OUT will flash to indicate this Hold State IDn + 11 ... IOn + ml
are stored in redial memory as OTMF data and not transmitted from Tone Out. When it is ready to transmit OTMF
data in redial memory, [TI, [BQ] or IE] keys is depressed to reset this Hold State and IOn + 11 ... IOn + ml data are
serially transmitted.

• Mode Switching by

Of/Hook

ill key (OPERATION

SELECT = V oo)

1[~J··B [j 8
I

Pulse Mode

E~J··B
I ~ Tone MOde----l

Pulse mode is initially defined with MODE SELECT = Voo. Mode switching to DTMF can be accepted by IT] key.
In DTMF mode, digits IOn + 11 ... IOn + ml are transmitted from Tone Out as DTMF signals by depressing corresponding
key. If no (PJ key is contained serially before or after IT! key.

Off Hook

18· .. 8 GJ
r---Pulse Mode---j

B···lon+ml

(Dn'Dn+l{~}

f---Tone MOde---i

It results the next condition:
If digit IDn + 1] is depressed after pulse mode is finished DTMF mode will be set up after last pulse signal [Q6} is out.
In this mode, digits IOn + 11 ... IOn + ml are transmitted from TONE OUT as DTMF signals by depreSSing corresponded.
key

c8SAMSUNG
Electronics

166

CMOS INTEGRATED CIRCUIT

KS5819

If digit IOn + 11 is depressed during dialing pulse signal, the Hold State will be set up after last pulse Signal [QDl
is finished. When DTMF MOOE is set up. MODE OUT will flash to indicate this Hold State.
Digits IDn + 11 ... IDn + ml are stored in redial memory as DTMF data and not transmitted from Tone Out.
When it is ready to transmit DTMF data in redial memory, CD, IffQ] or [EJ keys is depressed to reset this Hold State
and IDn + 11 ... IDn + ml data are serially transmitted .

• Redial with Hold State Cancell

I

I 8 GJ G, G

Off Hook

(or

key)

Pause can be cancelled with !el, ITl or IB.QI keys in redialing. Any pause in series corresponding with pause is
also cancelled. When no pause is stored before or after mode switching, chip will go into the Hold State when
DTMF mode is set up. MODE OUT will flash to indicate this Hold State. OTMF data are stored in redial memory
and not transmitted from tone out.
[I], [EQI or [E] keys is depressed to reset this Hold State and OTMF data are serially transmitted.

Single Tone Operation in DTMF Mode (Test mode)
1. The MIS pin is used to trig the chip into test made by applying a positive or negative pulse after "Off Hook."
Test mode is sustained until On Hook. The single tone is shown in the following table which contrast with normal
mode.

Normal mode

Single tone mode

R1

1

2

3

R1

R1

C2

C3

R2

4

5

6

R2

C1

C2

R2

R3

7

8

9

R3

R3

C2

C3

R4

*

0

#

R4

C1

R4

C3

C1

C2

C3

C1

C2

C3

2. Single tone can be generated by simultaneously depressing two digit keys in the appropriate Rowand Column.
If two digit keys, not in the same Row or Column, the dual tone disabled and no output is provided.

c8SAMSUNG
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I

KS5819

CMOS INTEGRATED CIRCUIT

TONE MODE TIMING
AS

(MODE SELECT = Vss)

_ __

I'---:--:---_ _-----'r~
--iD~

~r-----mmlllill

KEY INPUT

3

I

~~

n

KEY TONE

t""\
~
"""
-.::;j TITP b -i~~utTONE OUT _ _ _ _ _ J
L____ J
L____ J L_-1\-__ J "L _JL_JL ______ _
V

X'MITMUTE~~rfI------

OSC -------II------a-----._------11111111111111111111111111111IIIIIIIIIIIIIIIIII~------MUTE~

U

MODEOUT~

r1~

110mS

___________________

110mS

D: Debouncing time: 25mS

TITP:

Tout:

PULSE MODE TIMING

(MODE SELECT = V oo)

~~-------------------------------------------------KEY INPUT ---rrrmm

~

--1iJ=

,-----------------------------------

3

KEYTONE----~~---___~---------------------------------=ll=TKT

1m

UUUUi-----TIOp~1
DP

X'MITMUTE

flJlJ--ulf----TloP-----t!

----i--l B~ -i Mf-~"------

UUU

nnn"------

_ _ _ _ _ _ _ _ _ _ _..J

~~~-----------------------~
OSC------~IIIIIIIIII""t------Fosc=3.579545MHZ------ilijll"III"11~--------

879mS 1.75KHz

D (Debouncing Time): 25mS TKT: 23mS
TIDP:
fKT:

c8SAMSUNG
Electronics

168

KS5819

CMOS INTEGRATED CIRCUIT

TIMING DIAGRAM
(for Switching Mode Operation by IT] key) (OPERATION SELECT, MODE SELECT

KEY INPUT

= =voo)

----1m!

MODEOUT--------------------------------------~

BP---LfLJ

Uf----TAP-----"I

TOUT

1'"LJ~LJ~

L--

--!-II

TONE OUT - - - - - - - -_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

:H

___

X'MIT MUTE

MUTE

OSC

TIDP

I-

r"l'---_ _ _ _ _ _ _ _ _ _ _ _...JFTMOP=i
--.J L
-

~L.....-

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _----I

-------1""""111111111------

FOSC 3.579545MHz

------IlIllllllllwlllllllllt----

TIMING DIAGRAM
(for Switching Mode Operation by MODE SELECT Input) (OPERATION SELECT = Vss)

KEYINPUT--------~

Switching MS = Vss
MODEOUT-----------------------------------~

I

5P---UU

UUU=TAP~

I
1

i"L.r'LrI

TONE OUT ------------------------------------:.1i

i . . . -_ _

I

X'MIT MUTE . - n 1 - -_ _ _ _ _ _ _ _ _ _ _----J"--T-MO-Pi.._ _ _ _...1

MUTE.-n~--------------...J
MODE SELECT - - - - - - - - - - - - - - - - - - - - - - ,

. OSC

------illlllllllllllll.--1----FOSC=3.579MHZ---~lllIlIIIlllIlllr----TAP: 3.5sec

c8SAMSUNG
Electronics

169

•

KS5820

CMOS INTEGRATED CIRCUIT

TONE/PULSE DIALER WITH REDIAL
16 DIP

The KS5820 is a DTMF/PULSE switchable dialer with a 32-digit redial
memory. Through pin selection, switching from pulse to DTMF mode
can be done using slide switch. All necessary dual-tone frequencies are
derived from a 3.579545MHz TV crystal, providing very high accuracy
and stability. The required sinusoidal wave form for each individual tone
is digitally synthesized on the chip. The wave form so generated has
very low total harmonic distortion (7% Max). A voltage reference is
generated on the chip which is stable over the operating voltage and
temperature range and regulates the single levels of the dual tone to
meet telephone industry specifications. CMOS technology is applied
to this device, for very low power requirements high noise immunity,
and easy interface to a variety of telephones requiring external
components.

._--------

ORDERING INFORMATION

FEATURES
• Tone/Pulse switchable (slide switch).
• 32 digit capacity for redial
• Automatic mix redialing (last number dial) of
PULSE-+DTMF with multiple auto access pause
• PABX auto.pause for 3.5 sec.
• 4 x 4 or (2 of 8) keyboard available
• Low power CMOS process (2.0 to 5.5V)
• Numbers dialed manually after redial are cascadable
and stored as additional numbers for next redialing
• Uses inexpensive TV crystal (3.579545MHz)
• Make/Break ratio (33 1/3 -66213 or 40/60) pin selectable
• Touch key hooking (604ms)
• Low standby current

PIN CONFIGURATION

Device

Dial
Pulse

PPS

KS58A20N

DP

10

DP

20

V00: 33.3/66.6
Vss: 40/60

1--_.-

KS58B20N

-

KS58C20N
KS58D20N

DP

10

DP

20

Voo: 33.3/66.6
Vss: 40/60
,--

Voo: 33.3/16.6
Vss: 40/60
Voo: 33.3166.6
Vss: 40/60

ARRANGEMENT OF KEYBOARD

CiJ00

o

KS5820

Make/Break Ratio

W

t-R1

[~JEJ

~000
~00~
I

C1

I

C2

I

C3

-R2
-R3
-R4

I

C4

[BEl : HOOKING (604ms)
[EJ : PAUSE (3.5
(@] : REDIAL

c8SAMSUNG
Electronics

second)

170

KS5820

CMOS INTEGRATED CIRCUIT

BLOCK DIAGRAM
HS

MIS

MODE SEL

R1
R2

X'MIT MUTE

R3
R4

KEYBOARD J - - - - - - 4
LOGIC

C1

OUTPUT
LOGIC

REDIAL
MEMORY
32 DIGIT

i5P

C2

I

(DP)

C3
C4

Voo
DTMF
GENERATOR

OSC

I 1

OSC IN

TONE OUT

OSC OUT

TONE DURATION & PAUSE IN
REDIAL

TONE FREQUENCIES
Input

Specified

Actual

% Error

Symbol

Typ

Unit

R1

697

699.1

+0.31

Tone Duration

To

110

mS

R2

770

766.2

-0.49

Minimum Pause

ITP

110

mS

R3

852

847.4

-0.54

Cycle Time

Tc

220

mS

Characteristic

c8SAMSUNG
Electronics

R4

941

948.0

+0.74

C1

1209

1215.7

+0.57

C2

1336

1331.7

-0.32

C3

1477

1471.9

-0.35

171

KS5820

CMOS INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristics

(Ta=25°C)

Symbol

Value

Unit

V

Supply Voltage

Voo

6.0

Input Voltage

VIN

Vss-0.3, Voo +0.3

Output Voltage

VOUT

Vss - 0.3, Voo+0.3

Output Voltage

VOUT

Tone Output Current

V

~ Voo,(DP, X'MITMUTE)

hONE

V

50

mA
mW

Power Dissipation

Po

500

Operating Temperature

Topr

-20 -+ 70

Storage Temperature

TSl9

-40 -+125

°C

ELECTRICAL CHARACTERISTICS
(Vss = OV, Voo = 3.5V, tx'tal = 3.579545MHz, Ta = 25°C, unless otherwise noted)
Characteristic

Symbol

Test Conditions

Min

Typ

Max

Operating Voltage
Range

VooP

Pulse Mode

All inputs connected

2.0

5.5

VooT

Tone Mode

to Voo or Vss

2.0

5.5

Memory Retention Voltage

VOR
looP

MODE = Voo

looT

MODE = Vss

One key selected
HS = Vss. All outputs
unloaded

Iso 1

HS = Voo = 1.5V

Is02

-HS=Vss

Operating Supply Current

Standby Current

Output Current

IOl1
IOl2

Input Voltage

Input Current

No key selected.
All outputs
unloaded

DP.I VOl=0.4V I V,,=3.5V

I Voo=2.5V

X'MIT MUTE

0.05
p,A
50
1.7

5.0

0.5

1.5

mA
Voo

Vss

0.2Voo

hN1

Voo = 3.5V VIN = OV

hN2

Voo:::: 2.5V VIN = OV

Tap

Tone Output Delay Time

mA

O.BVoo

Auto Access Pause Time

Distortion

1.0

MODE SELECT

Fer

Ratio of Column to Row Tone

0.5

0.5

R1-R4. C1-C3. HS. MIB

Tkd

Tone Output

0.3

Vil

Valid Key Entry Time

Vo•

I
I

25.3

ONLY

I
I

-16.0

-12.0

Voo=3.5V Rl =5K

-14.0

-11.0

Voo = 3.5V

1.0

2.0

1.5

mS

sec

Voo = 2.5V Rl :::: 5K

%DIS

p,A

Hz

3.5
ROW TONE

V

50

437

Voo =3.5V

c8SAMSUNG
Electronics

116

R1-R4
23

dBer

T psd

V

1.0

VIH

Column and Row
Scanning Frequency

Unit

dBV

3.0

dB

7

%
mS

172

KS5820

CMOS INTEGRATED CIRCUIT

PIN DESCRIPTION
Pin

~Name

Description

1-4
15-18

R1-R4
C1-C4

Keyboard (R1, R2, R3, R4, C1, C2, C3, C4)
These inputs can be interfaced to an XY matrix keyboard.
C1·C4 & R1-R4 are set to low at On Hook (HS high). C1-C4 key inputs are set
to low and R1-R4 are set to high at OFF HOOK (HS low) which enables the keyinput operation. Oscillator starts running when a keypress is detected. Scanning
signals are presented at both column and row inputs (TYP: 437Hz) until the
input key is released. Key inputs are compatible with standard 2-of-8 form or
single-contact keyboard. Debouncing is provided to avoid false entry (TYP: 25mS) .

=

=

5

HS

Hook Switch
This input detects the state of the hook switch contact. "Off Hook"
corresponds to Vss condition. "On Hook" corresponds to Voo condition.

6

M/B

Make/Break Ratio
This input provides the selection of the Make/Break ratio (33.3: 66.6/40:60)
when M/B is connected to VoolV ss .

7

MODE SELECT

Mode Select Input
Pulse/DTMF mode is selected as shown in the following table.
Initial Mode means the state after going Off Hook (HS->"Vss ")
MODE
SELECT

INITIAL
MODE

SWITCHING
ENTRY MODE

Voo

Pulse

MODE SELECT
Input Vss

Vss

Tone

N/A

=

8-9

OSCIN
OSC OUT

Oscillator Input/Output
These pins are provided to connect an external 3.58MHz crystal. Oscillator
starts (at Off Hook) and is sustained until pulse or DTMF signals are finished.

10-11

Voo , Vss

Power
These are 'the power supply inputs. The device is designed to be operated on
2.0V to 5.5V.

12

TONE OUT

DTM F Signal Output
When a valid keypress is detected in DTMF mode appropriate low and high
group frequencies are gen~ra:ted which hybrided the Dual Tone Output.
Tone out is Off State in pulse mode.

13

X'MIT MUTE

X'mit Mute Output
X'mit Mute Output

, HS

"ON"

Voo
Vss

Normally "OF.F"
. "ON" during pulse and DTMF dialing

(N channel open drain)
14

DP, DP

Dial Pulse Out
DP: The normal output
"OFF HOOK." The
DP: The normal output
"OFF HOOK." The

c8SAMSUNG
Electronics

will be
output
will be
output

"OFF" during break and "ON" during make at
will be "ON" at "ON HOOK,"
"ON" during break and "OFF" during make at
will be "OFF" at "ON HOOK."

173

•

KS5820

CMOS INTEGRATED CIRCUIT

KEYBOARD OPERATION
1. SINGLE MODE OPERATION
• PUlse Mode Operation

I

OffH09k

i 8···8

Pulse mode is defined by the initial mode after going Off Hook and latched at [Q1] key entry. This is the condition
under Mode Select = Voo.
• Tone Mode Operation

I

Off Hook

I

B···8

Tone mode is defined by the initial mode after going Off Hook and latched at
Mode Select V55.

=

IQI) key entry. This condition is under

• Manual Dialing with Automatic Access Pause

i

Off Hook

i G G B···8

Multiple Pause key entries can be accepted and stored in the redial memory, each as a digit. Each [E1 key provides
3.5 seconds pause time, but lEl key entry as first digit after going Off Hook is ignored. El key can also be used
as pause key in pulse mode. Pause (s) can be cancelled with I.E], or IBQ] key during pause time in redialing.
[QJ = Any numeric key.
• Redialing

I

Off Hook

iB

Up to 32 digits can be dialed with IBQl key. IBQ] key is disabled while pulse or DTMF signals are transmitted.
When more then 32 digits are stored, redial is also inhibited.
[£] key can be used as [BQ] key in pulse mode.
• Inhibiting Redial

I

Off Hook

i B···B B B

Redial can be inhibited by depressing IBQ] [BQl keys after DTMF or pulse signals are transmitted.

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Electronics

174

CMOS INTEGRATED CIRCUIT

KS5820
2. PULSE/TONE SWITCHABLE OPERATION
• Mode Switching by MODE SELECT Input

L--_O_ff_H_O_O_k--l1

B··· BG

Switching MODE SELECT to V,.

r l- - - - - -

EJ··· EJ
r---

Pulse Mode

OTMF MOde----!

Pulse mode is initially defined MOOE SELECT = Voo , mode switching to OTMF can be accepted by ~
SELECT = Vss , OTMF mode will be set up after pulse mode is finished. In this mode, digits IOn + 11 ... lQrLt!!!J are
transmitted from Tone Out as OTMF Signals by depressing corresponded keys.
If no [EJ key is contained serially before or after mode switching, following condition is obtained.

Off Hook

lB··· B

Switching MODE SELECT to V,.

~-----Pulse

B··· B
~OTMF

Mode

Mode----i

(On + 1 :;:. Pause)
If digit IOn + 11 is depressed after pulse mode is finished, OTMF mode will be set up after last pulse signal ([Q!])
is generated. In this m~de, digits [Qfril ... IOn + ml are transmitted from Tone Out as OTMF signals by depressing
corresponded keys. If digit IOn + 11 is depressed during dialing pulse signals. When OTMF mode is set up Hold
State will be set up after last pulse signal [Qill is finished. MOOE OUT will flash to indicate this Hold State
IOn + 11 '" IOn + ml are stored in redial memory as OTMF OATA and not transmitted from Tone Out. When it is
ready to transmit OTMF data in redial memory, [BQ] or [E] keys is depressed to reset this Hold Stale and
IOn + 11 '" IOn + ml data are serially transmitted.

Single Tone Operation in DTMF Mode (Test mode)
1. The MIS pin is used to trig the chip into test made by applying a positive or negative pulse after "Off Hook."
Test mode is sustained until On Hook. The single tone is shown in the following table which contrast with normal
mode.
Normal mode

Single tone mode

R1

1

2

3

R1

R1

C2

C3

R2

4

5

6

R2

C1

C2

R2

R3

7

8

9

R3

R3

C2

C3

*

0

#

R4

C1

R4

C3

C1

C2

C3

C1

C2

C3

R4

2. Single tone can be generated by simultaneously depressing two digit keys in the appropriate Rowand Column.
If two digit keys, not in the same Row or Column, the dual tone disabled and no output is provided.

c8SAMSUNG
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175

•

CMOS INTEGRATED· CIRCUIT

KS5820
TONE MODE TIMING

(MODE SELECT=V ss)

~l~________~r~

_______

r Iml lil
__ M
~
TONEOUT----1L---n-----rt--.l\.---"---rL--n--r'L.

KEY INPUT

=Ji71

mll!I"

I

3

11111 •

l

Rolr---

- -

~

X'MITaUT

ase - - - - _ - - - - _ _ _

1TP:

D: Debouncing Time: 25mS
T
110mS

PULSE MODE TIMING

-----_--------~IIIIIIIIIIII!I

r-

IIIlllllllllllr--

Tout: 110mS

(MODE SELECT=V oo)

~~~--------------------------------------------------------l Dr--

KEY INPUT----,U'm!'lTl!l
4

~~---------------------------------------

T'''~: LJUlJ
i"-utFm::=====_TID_P__..I.-nJlJl'"---__

DP-HLfl-IlJ
DP _ _

X'MlTMUTE~~------------------------------------------~

asc -----11111111111111---1- - - Fase=3.579545MHZ-----lIIIIIIIII~------D: Debouncing Time: 25mS
T1op: Inter Digit Pause: 879mS

c8SAMSUNG
Electronics

176

CMOS INTEGRATED CIRCUIT

KS5820
TIMING DIAGRAM

(for Switching Mode Operation by MODE SELECT Input)

KEY INPUT --.........,.,;
P

5P--LfU

Switching

MS =Vss

LJlJ1J==TAP~

l1f1f1==r,,=

D P _ I U l_ _ _ _ _

~~I..-.----

TONE OUT

11, - - - - - - - - - - . . . . . . .f"=TMOP=i......- - _.......

X'MIT MUTE----.J
MODE SELECT

oSC------11111111111IE--FOSC=3.579545MHZ-----iIlIIIIII~------TAP: Auto Pause Time 3.5sec

c8~SUNG

177

•

CMOS INTEGRATED CIRCUIT

KS5822

10 MEMORY TONE!
PULSE REPERTORY DIALER
The KS5822, a CMOS digital LSI, is a 10 number by 16
digit tone/pulse switchable dialer, with 32 digit redial
memory. Through pin selection, switching from pulse
to tone mode, 10 or 20pps and make/break ratio can be
done.

1

22 DIP: 400 mil width

FEATURES
• 32 digit redial memory with buffer
• 10 No x 16 digit repertory memory
• Tone/Pulse switch able via slide switch with
multiple auto access pause (3.5 sec)
• Uses inexpensive TV crystal (3.579545MHz)
• Make/Break ratio pin selectalJle (1/2, 2/3)
• Dialing pulse rate pin selectable 10pps/20pps
• Two key single tone operation
• Redial memory cascadable with normal dialing
• Fully debounced 4 x 4 keyboard
• low voltage operating: 2.0 - S.SV
• low standby current
• Includes power on reset function
• Minimum tone duration: 110mS
• Minimum interdigit tone pause time: 110mS

PIN CONFIGURATION

•

ORDERING INFORMATION
Device

Package

Operating Temperature

KS5822N

300 mil Width

KS5822E

400 mil Width

-20 -

+ 70°C

ARRANGEMENT OF KEYBOARD

1

2

3

ST

4

5

6

R/L

7

8

9

P

...

0

#

RD

ST : Store
R/L: Recall/Location
P

: Pause

RD: Redial

KS5822

c8SAMSUNG
Electronics

178

CMOS INTEGRATED CIRCUIT

KS5822

PIN DESCRIPTION
Description

Pin

Name

1-4
19-22

R1-R4
C1-C4

S

HS

Hook Switch Input.
Voo = On Hook, Vss = Off Hook

6

M/B

Make/Break Ratio Select.
V00 = 1:2 (M/B), Vss = 2:3 (M/B)

7

DRS

Dial Pulse Ratio Select
Voo = 20pps, Vss = 10pps

8

MDS

Mode Select.
Voo = Pulse mode, Vss = Tone mode

9

OSC IN

10

OSC OUT

11

Voo

12

Vss

13

KT

14

OHI

15

TONE

16

XMUTE

17

MUTE

18

DP

c8SAMSUNG
Electronics

Keyboard Input
These inputs can be interfaced to an XV matrix keyboard.

I

Oscillator InputlOutput
Power.
This device is designed to operate on 2.0V to 5.5V
Key In Tone Output.(ln Pulse & Tone Mode)
fKT = 1. 785KHz, tKT = 36.6mS
On Hook Store Inhibitive Input.
Voo = Store available, Vss = Inhibitive store function
DTMF Signal Output
XMUTE Output.
This is a N-channel open drain output.
Operating pulse and tone mode.
MUTE Output.
Operating only pulse mode.
Dial Pulse Output.
(N-chnanel open drain)

179

CMOS INTEGRATED CIRCUIT

KS5822

BLOCK DIAGRAM

OSCI
PULSE
COUNTER

OSCO
M/S

1----_----+------1

DRS~----1_--------~--------~

MDS

WRITE/READ
ADDRESS
COUNTER

TONE

Voo

TONE FREQUENCIES

TONE DURATION & PAUSE
Characteristic

Symbol

Typ

Unit

Input

Specified

Actual

% Error

Tone Duration

To

110

mS

R1

697

699.1

Minimum Pause

hp

110

mS

R2

770

766.2

-0.49

R3

852

847.4

-0.54

R4

941

948.0

+0.74

C1

1,209

1,215.9

+0.57

C2

1,336

1,331.7

+0.32

C3

1,477

1,471.8

-0.35

c8 !!e!'ISUNG

+0.31

180

CMOS INTEGRATED CIRCUIT

KS5822

ABSOLUTE MAXIMUM RATINGS

(Ta=2S°C)

Characteristics

Symbol

Value

Unit

Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Storage Temperature
Power Dissipation

Voo
VIN
VOUT
Ta
Tstg
Po

-0.3-6.0
-0.3 -Voo + 0.3
-0.3 -V oo + 0.3
-20 - + 70
-SS-+150
SOO

V
V
V
°C
°C
mW

I

ELECTRICAL CHARACTERISTICS
(Voo= 3.SV, Vss=OV, fosc =3.S79S4SMHz, Ta=2SoC, unless otherwise noted)

Characteristic
Operating Voltage
Memory Retention Voltage
Operating Supply Current

Standby Current
Output Sink Current
(DP, XMUTE, MUTE)
Key In Tone Current
- - _.Input Voltage (R1-R4, C1-C4,
HS, MOS, M/B, DRS)

Input Current
(R1-R4, C1-C4)
Row Tone Level

Symbol

Test Conditions

Min

Voo

2.0

Vr

1.0

loop

Typ

Tone Mode, all outputs unloaded

ID01

Hs = Voo = 1.0V, all outputs unloaded

ID02

Hs = V ss , all outputs unloaded

lou

VOL = O.4V

1.7

Unit

S.S

V

O.S

mA

V

Pulse Mode, all outputs unloaded

lOOT

Max

1.0

mA

0.03

O.OS

p.A

30

SO

p.A

5.0

mA
mA

IOL2

VoL =0.4V, Voo=2.SV

O.S

1.S

IOHK

VOH = 0.4V

1.7

5.0

mA

IOHL

VoL =3.0V

1.8

S.2

mA

VIH

0.8Voo

Voo

V

VIL

Vss

0.2Voo

V

ItH

VIN =Vss

116

p.A

IlL

VIN = Vss , Voo = 2.SV

SO

p.A

VTH

Voo = 3.SV, RL = SKn

-14

-11

VTL

Voo = 2.SV, RL = SKn

-16

-12

Ratio of Column to Row Tone

dBcr

Distortion

THO

1

2

Valid Key Entry Time

TKO

9.1

Pause Time

tpa

3.51

3

dBV
dB

7

%

19.1

mS
sec

I

c8SAMSUNG
Electronics

181

KS5822

CMOS INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS
Characteristic
Pulse Interdigit Pause Time

Symbol

(Continued)
Test Conditions

tIDP1

DRS

t lDP2

DRS

Min

=Vss , 10pps
=VDD , 20pps

Typ
805.6
402.8

Max

Unit
mS

Tone Interdigit Pause Time

tlDT

109.8

Minimum Tone Duration

trD

109.8

mS

Minimum Key In Tone Duration

tKT

36.6

mS

Key In Tone Frequency

fKT

Make/Break Time

Make/Break Time

mS

1.785

KHz
mS

DRS

=Vss, M/B =VDD , 10pps

34.33
68.66

DRS

=Vss , M/B =Vss, 10pps

41.19
61.79

mS

DRS

=VDD , M/B =VDD , 20pps

17.17
34.33

mS

DRS

=VDD , M/B =Vss , 20pps

20.60
30.90

mS

t M/S

t M/S

KEY DESCRIPTION
• 1, 2, 3, 4, 5, 6, 7, 8, 9, 0 KEYS
These are Tone/Pulse dialing signal keys in normal state but their entry right after store mode or recall mode
provides store memory location.

• *, # KEYS
These are served as dialing signal at tone mode. But during pulse mode

* key modulates pause and # key redials.

• PAUSE KEY
Pause key is stored in RAM as a digit and while"this digit is processed no dialing can be operated. During the
pause time (3.51 sec) no output is generated.

• REDIAL KEY
The redial key is valid only when it is pressed as the 1st key after OFF·HOOK operation.

• RECALL/LOCATION KEY
Location or recall number selection is enabled by detecting R/L key input.

• STORE KEY
If the ST key is allowed when the dialer is set to the corresponding condition, pressing the ST key will change
the dialer into the ST mode.
The ST mode is released after the memory transfer operation is executed. This pin is a master control key. The
dialing sequence will be interrupted when the key is activated.

c8~SUNG

182

KS5822

CMOS INTEGRATED CIRCUIT

OPERATION OF TONE/PULSE
• SYMBOL DEFINITION
TIp
= Tone Mode tIP = Pulse
Op
Ot
Om
RII

Mode

= Pulse Data: 1, 2, 3, 4, 5, 6, 7, 8, 9, 0 Keys

= Tone Data: 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, *, #

= Memory Location
= RIL Key for Recalling
= RIL Key for Location

rlL
RD
= Redial Key
= Pause Key
P
ST
= Store Key
Cony = Conversation Mode

I

• NORMAL DIALING IN PULSE MODE
Oft Hook, tIP; Dp1, Op2, ...... Dpn; Cony; On Hook

• NORMAL DIALING IN TONE MODE
Off Hook, TIp; Dt 1, Oh, ...... Dtn; Cony; On Hook

• NORMAL DIALING IN PULSE TO TONE MODE
Off Hook, tIP; Op1, Op2, ...... Dpn; TIp; Dt" Dt 2, ...... Dtn; Cony; On Hook

• REDIALING
Off Hook; RO; Cony; On Hook
Note: More than 33 digit in redial memory inhibits redial function and RD input after Off Hook is ignored.

• STORING A NUMBER FOR PULSE MODE
1) OH'= Low
Off Hook, tIP; ST; Dp1, Dp2, ...... Dpn; r/L; Dm; On Hook
(Return to Normal Mode)
2) OHI= High

On Hook, tIP; ST; Dp" Dp2, ...... Dpn; r/L; Dm;
(Return to Normal Mode)

• STORING A NUMBER FOR PULSE·TO·TONE MIXED DIALING
On (Off) Hook (By Condition), tiP; ST; Dp1, Dp2, ...... Dpn; TIp; Dt" Dt 2 ,
(Return to Normal Mode)

••••••

Dtn; r/L; Om; On Hook

• STORING A NUMBER FOR TONE MODE
On (Off) Hook (By Condition), TIp; ST; Dt 1, Dt2, ...... Dtn; r/L; Om; On Hook (Return to Normal Mode)
Note: The tone data is a one digit in tone mode and the device provides 31 digit redial memory and 15 digit
storing memory in tone mode.

• A NUMBER REPERTORY DIALING
Off Hook; RII; Om; Cony; On Hook

• REPERTORY DIALING FOR CASCADED MEMORIES
Oft Hook; RIl; Dm; ...... ; RIl, Om; Cony; On Hook
Note: If cascade number exceeds 32 digits, the next digit is ignored. The number cannot be redialed by being
truncated.

c8SAMSUNG
Electronics

183

KS5822

CMOS INTEGRATED CIRCUIT

TONE GENERATOR
Single tone generated consists of 14 level and 28 segments. It's column tone output is 2dB pre-emphasized than
row tone output.

TIMING DIAGRAM
PULSE MODE

HS

1~

________________~rl~__________~1

KEY INPUT

OSC

COL SCAN

--(------------------~----~------~>-~

__

.-f1JL. ___ jlJ1JL.------

ROWSCAN-ulrLIU"U--LJ1J----uuu- - - - - - -

MUTE

XMUTE

~

_________

I

~

~

------~

I 'Mw-1"
U

~~

y'----,-.

_____

~r

______________r_

LJLJU

n1..---------

ri rI
tplOP
KEY IN TONE -----1
L-J 1_ _ _ _ _ _ _ _ _ _ _---'

c8SAMSUNG
Electronics

184

KS5822

CMOS INTEGRATED CIRCUIT

TONE MODE
HS

~---------

__________~rl________________

KEYINPUT~
Ot
Dt

OSC

COL SCAN
ROW SCAN

~-----------~>~------~<~----------~>--

-IUL____
lJU----

_ ___ ~

------uu-

XMUTE

--___~I

PULSE TO TONE DIALING
HS

1--------------------------------------MOS

KEY INPUT

1__. . .

COL SCAN

-<~-------------------------------->--JUL________________ JlJUL-__

ROWSCAN

I

MUTE

~---;"I

OSC

n

I'----------------~---

RtDB

rf
!--tPAUSE

XMUTE

I

---j

DP

T O N E O U T P U T - - - - - - - - - - - - - - - - - - - I r L f I.....- - -

c8SAMSUNG
Electronics

185

I

CMOS INTEGRATED CIRCUIT

KS5823

10 MEMORY TONE!
PULSE REPERTORY DIALER

18 DIP

The KS5823 series, a CMOS digital LSI, is a 10 number
by 16 digit tone/pulse switchable dialer, with 32 digit
redial memory. Through pin selection, switching from
pulse to tone mode and make/break ratio can be done.

FEATURES
• 32 digit redial memory with buffer
• 10 No x 16 digit repertory memory
• Tone/Pulse switchable via slide switch with
multiple auto access pause (3.5 sec)
• Uses inexpensive TV crystal (3.579545MHz)
• Make/Break ratio pin selectable (1/2, 213)
• Two key single tone operation
• Redial memory cascadable with normal dialing
• Fully debounced 4 x 4 keyboard
• Low voltage operating: 2.0- 5.5V
• Low standby current
• Includes power on reset function
• Minimum tone duration: 110mS
• Minimum interdigit tone pause time: 110mS

ORDERING INFORMATION
Device

PPS

Storage Mode Operating Temperature

KS58A23N 10pps Off Hook Only
KS58B23N 20pps On/Off Hook

-20 _

KS58C23N 10pps On/Off Hook

+ 70°C

KS58D23N 20pps Off Hook Only

PIN CONFIGURATION

•
KS58A1B/C/D 23

c8SAMSUNG
Electronics

ARRANGEMENT OF KEYBOARD
1

2

3

ST

4

5

6

R/L

7

8

9

P

".

a

#

RD

ST :
R/L:
P :
RD:

Store
Recall/Location
Pause
Redial

186

KS5823

CMOS INTEGRATED CIRCUIT

PIN DESCRIPTION
Pin

Name

1-4
15-18

R1-R4
C1-C4

5

HS

Hook Switch Input.
Voo On Hook, Vss Off Hook

6

M/B

Make/Break Ratio Select.
VDO 1:2 (MIS), Vss 2:3 (M/B)

7

MDS

Mode Select.
Voo Pulse mode, Vss

8

OSCIN

9

OSC OUT

10

Voo

11

Vss

Description

Keyboard Input
These inputs can be interfaced to an XY matrix keyboard.

=

=

12

TONE

13

XMUTE

14

DP

c8SAMSUNG
Electronics

=

•

=

=

=Tone mode

Oscillator InputlOutput
Power.
This device is designed to operate on 2.0V to 5.5V
DTMF Signal Output.
XMUTE Output.
This is a N-channel open drain output.
Dial Pulse Output.
(N-chnanel open drain)

187

KS5823

CMOS INTEGRATED CIRCUIT

BLOCK DIAGRAM

OSCI
OSCO

MDS

Voo

Note: KS58A/C23
KS58B/D23
KS58A/D23
KS58B/C23

Vss

TONE DURATION & PAUSE
Characteristic

Symbol

Typ

DRS = Vss
DRS = Voo
OHI Vss
OHI = Voo

=

TONE FREQUENCIES
Unit

Input

Specified

Actual

% Error

Tone Duration

To

110

mS

R1

697

699.1

+0.31

Minimum Pause

hp

110

mS

R2

770

766.2

-0.49

R3

852

847.4

-0.54

c8~SUNG

R4

941

948.0

+0.74

C1

1,209

1,215.9

+0.57

C2

1,336

1,331.7

+0.32

C3

1,477

1,471.8

-0.35

188

KS5823

CMOS INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS

(Ta=25°C)

Characteristics

Symbol

Value

Unit

Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Storage Temperature
Power Dissipation

Voo
V IN
VOUT
Ta
Tstg
Po

-0.3-6.0
- 0.3 - Voo + 0.3
-0.3 - Voo + 0.3
-20 - + 70
-55 -+150
500

V
V
V
°C
°C
mW

ELECTRICAL CHARACTERISTICS
(Voo = 3.5V, Vss = OV, fosc = 3.579545MHz, Ta = 25°C, unless otherwise noted)
Characteristic
Operating Voltage

Symbol

Standby Current

Min

Voo

2.0

Vr

1.0

Memory Retention Voltage
Operating Supply Current

Test Conditions

loop

Typ

Tone Mode, all outputs unloaded

1001

HS=V oo = 1.0V, all outputs unloaded

Unit

5.5

V

0.5

mA

V

Pulse Mode, all outputs unloaded

lOOT

Max

1.0

mA

0.03

0.05

p.A

30

50

p.A

1002

HS = Vss , all outputs unloaded

Output Sink Current
(DP, XMUTE)

lOll

VOL=0.4V

1.7

5.0

mA

IOL2

VOL =O.4V, Voo=2.5V

0.5

1.5

~mA

Input Voltage (R1-R4, C1-C4,
HS, MDS, M/B)

VIH

0. 8V oo

Voo

V

VIL

Vss

0.2Voo

V

Input Current
(R1-R4, C1-C4)

IIH

VIN =vss

116

p.A

IlL

V IN = Vss , Voo = 2.5V

50

p.A

VTH

Voo = 3.5V, RL = 5KO

-14

-11

VTL

Voo=2.5V, Rl =5KO

-16

-12

Row Tone Level
Ratio of Column to Row Tone

dBcr

Distortion

THO

1

2

Valid Key Entry Time

TKo

9.1

Pause Time

tpa

3.51

c8~SUNG

3

dBV
dB

7

%

19.1

mS
sec

189

•

KS5823

CMOS INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS
Characteristic

Pulse Interdigit Pause Time

(Continued)

Symbol

Min

Test Conditions

Typ

tIDP1

(KS58A/C23)

805.6

tIDP2

(KS58BID23)

402.8

Max

Unit

mS

Tone Interdigit Pause Time

t lOT

109.8

mS

Minimum Tone Duration

ho

109.8

mS
mS

Make/Break Time

Make/Break Time

M/B

=V

KS58A/C23

34.33
68.66

M/B

=Vss, KS58A/C23

41.19
61.79

mS

MIS

=Voo , KS58B/D23

17.17
34.33

mS

M/B

=Vss, KS58BID23

20.60
30.90

mS

DO,

t M/S

t M/S

KEY DESCRIPTION
• 1, 2, 3, 4, 5, 6, 7, 8, 9,0 KEYS
These are Tone/Pulse dialing signal keys in normal state but their entry right after store mode or recall mode
provides store memory location.

• *, # KEYS
These are served as dialing signal at tone mode. But during pulse mode

* key modulates pause and # key redials.

• PAUSE KEY
Pause key is stored in RAM as a digit and while this digit is processed no dialing can be operated. During the
pause time (3.51 sec) no output is generated.

• REDIAL KEY
The redial key is valid only when it is pressed as the 1st key after OFF-HOOK operation.

• RECALL/LOCATION KEY
Location or recall number selection is enabled by detecting R/L key input.

• STORE KEY
If the ST key is allowed when the dialer is set to the corresponding condition, pressing the ST key will change
the dialer into the ST mode.
The ST mode is released after the memory transfer operation is executed. This pin is a master control key. The
dialing sequence will be interrupted when the key is activated.

OPERATION OF TONE/PULSE
• SYMBOL DEFINITION
TIp

Dp
Dt
Dm
RII

= Tone Mode tIP = Pulse Mode
= Pulse Data: 1, 2, 3, 4, 5, 6, 7, 8, 9, 0 Keys
= Tone Data: 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, *, #

= Memory Location
= R/L Key for Recalling

r/L

R/L Key for Location
RD
= Redial Key
P
= Pause Key
ST
= Store Key
Conv
Conversation Mode

=

qsSAMSUNG
Electronics

190

KS5823

CMOS INTEGRATED CIRCUIT

• NORMAL DIALING IN PULSE MODE
Off Hook, tIP; Op1, OP2, ...... Opn; Conv; On Hook

• NORMAL DIALING IN TONE MODE
Off Hook, TIp; Ot1, Ot2, ...... Otn; Conv; On Hook

• NORMAL DIALING IN PULSE TO TONE MODE
Off Hook, tIP; Op1, OP2, ...... Opn; TIp; Ot 1, Ot2, ...... Otn; Conv; On Hook

• REDIALING
Off Hook; RO; Conv; On Hook
Note: More than 33 digit in redial memory inhibits redial function and RO input after Off Hook is ignored.

• STORING A NUMBER FOR PULSE MODE
1) OHI = Low (KS58A1D23)

Off Hook, tIP; ST; Op1, Op2, ...... Opn; r/L; Om; On Hook
(Return to Normal Mode)
2) OHI

= High (KS58B/C23)

On Hook, tiP; ST; Op1, Op2, ...... Opn; r/L; Om;
(Return to Normal Mode)

• STORING A NUMBER FOR PULSE·TO·TONE MIXED DIALING
On (Off) Hook (By Condition), tiP; ST; Op1, Op2, ...... Opn; TIp; Ot 1, Oh, ...... Otn; r/L; Om; On Hook
(Return to. Normal Mode)

• STORING A NUMBER FOR TONE MODE
On (Off) Hook (By Condition), TIp; ST; Ot 1, Ot2, ...... Otn; r/L; Om; On Hook (Return to Normal Mode)
Note: The tone data is a one digit in tone mode and the device provides 31 digit redial memory and 15 digit
storing memory in tone mode.

• A NUMBER REPERTORY DIALING
Off Hook; RIl; Om; Conv; On Hook

• REPERTORY DIALING FOR CASCADED MEMORIES
Off Hook; RIl; Om; ...... ; RIl, Om; Conv; On Hook
Note: If cascade number exceeds 32 digits, the next digit is ignored. The number cannot be redialed by being
truncated.

TONE GENERATOR
Single tone generated consists of 14 level and 28 segments. It's column tone output is 2dB pre-emphasized than
row tone output.

c8SAMSUNG
Electronics

191

I

CMOS INTEGRATED CIRCUIT

KS5823

TIMING DIAGRAM
PULSE MODE

I~

________________~rl~__________~r-

KEYINPUT~
2
1

asc

COLSCAN
ROW SCAN

--<.'-_____________>-<. . ______--"'>-

mL ___ ~ ____ ~
Lfl11JUlJ--UlJ---LflJ1J1j----~__

--'I

L - -_ _ _ _

TONE MODE

I~~~~~~~~

__~rl~______________

KEYINPUT~

Dt

asc

COL SCAN
ROW SCAN

Dt

~-----------~>~------~<-------------"'>--

--_._JUL

Jl.JL____
1Jlr----

----~

----------',

XMUTE

TONEOUTPUT~~'
~~~~~
~~
I

c8~SUNG

192

KS5823

CMOS INTEGRATED CIRCUIT

PULSE TO TONE DIALING
HS

~~------------------------------------

MDS

KEY INPUT - - ,

•

osc
COL SCAN

2

I

-<--------------------------->--

~________________

J1JUL __

ROWSCA~'LnJ----------------~--

DP

IVI_____

TONE ouTPUT _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

c8SAMSUNG
Electronics

193

I

KS5824

CMOS INTERGRATED CIRCUIT
24 DIP

UNIVERSAL ASYNCHRONOUS RECEIVER
AND TRANSMITTER
The KS5824 UART, is a Si-gate CMOS IC which provides the data
formatting and control to interface serial asynchronous data communications between main system and subsystems.
The bus interface of the KS5824 includes select, enable, read/write,
interrupt and bus interface logic to allow data transfer over an 8-bit bidirectional data bus. The parallel data of the bus system is serially,
transmitted and received by the asynchronous data interface, with proper
formatting and error checking. The functional configuration of the UART
is programmed via the data bus during system initialization. A programmable control register provides variable word lengths, clock division
ratios, transmit control, receive control, and interrupt control. For
peripheral or modem operation, three control lines are provided.
Exceeding Low Power dissipation is realized due to adopting CMOS
process.

ORDERING INFORMATION

FEATURES
•
•
•
•
•
•
•
•
•
•

Operating Temperature

Low-power, high-speed, CMOS process
Serial/parallel conversion of data
8-and 9-bit transmission
Optional even and odd parity
Parity, overrun and framing error checking
Programmable control register
Optional + 1, + 16, and + 64 clock modes
Peripheral/modem control functions
Double buffered
One-or two-stop bit operation

BLOCK DIAGRAM

PIN CONFIGURATION
CTS
DCD

DATA BUS

DATA
BUS
BUFFERS

DO

TRANSMIT
DATA

01

RECEIVE
DATA

ADDRESS
CONTROL
AND
INTERRUPT

SELECTION
AND
CONTROL

c8SAMSUNG
Electronics

vee

194

KS5824

CMOS INTERGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

Supply Voltage
Input Voltage
Maximum Output Current
Operating Temperature
Storage Temperature

Value

Vee *
VIN*
10 * *
Topr
T5tg

Unit

V
V
rnA
°C
°C

-0.3 to + 7.0
-0.3 to + 7.0
10
-20 to + 75
-55 to + 150

* With respect to Vss (SYSTEM GND)
* * Maximum output current is the maximum current which can flow out from one output terminal or I/O common
terminal (00 - 0 7 , RTS, Tx Data, IRQ).
Note: Permanent IC damage may occur if maximum ratings are exceeded. Normal operation should be under
recommended operating conditions are exceeded, it could affect reliability of IC.

I

RECOMMENDED OPERATING CONDITIONS
Characteristic

Supply Voltage
Input "low" Voltage
Input "High"
Voltage

I
I

Symbol

Min

Typ

Max

Unit

Vee*

4.5

5.0

5.5

V

0

V

2.2

-

0.8

Vee

-20

25

75

VIL*

0 0 - 0 7, RS, Tx ClK, DCD, CTS, Rx Data
CSo, CS2 , CS 1 , R/W, E, Rx ClK

Operating Temperature

2.0

VIH*
Topr

Vee

V
°C

* With respect to Vss (SYSTEM GND)

ELECTRICAL CHARACTERISTICS
DC CHARACTERISTICS (Vee=5V±5%, Vss=OV, Ta= -20 - +75°C, unless otherwise noted.)
Characteristic

Input "High" Voltage

Do - 0 7 , RS, Tx ClK,
DCD, CTS, Rx Data
CSo, CS 2 , CS 1 , RIW, E,
Rx ClK

Symbol

Test Conditions

Min

Typ

Max

Unit

2.0

Vee

2.2

Vee

-0.3

0.8

V

V

VIH

I

Input "low" Voltage

All inputs

VIL

Input leakage Current

RIW, CSo, CS 1, CS 2 , E

hN

VIN =0 - Vee

-2.5

2.5

p.A

Three-State (Off State)
Input Current

Do - 0 7

hSI

VIN = 0.4 - Vee

-10

10

p.A

10H= -205p.A

2.4

10H = -100p.A

2.4

Output "High" Voltage
Output "Low" Voltage

Do - 0 7
Tx data, RTS
All outputs

c8SAMSUNG
Electronics

VOH
VOL

10H = 1.6mA

V
0.4

V

195

KS5824

CMOS INTERGRATED CIRCUIT

DC CHARACTERISTICS (Continued)
Symbol

Characteristic
Output leakage Current
IRQ
(Off State)

Test Conditions

Output Capacitance

E, Tx ClK, Rx ClK,
R/W, RS, Rx Data, CSo,
CS 1, CS2, CTS, DCD

-

10

-

-

12.5

-

-

7.5

VIN=OV, Ta=25°C
f=1.0MHz

-

-

10

-

5.0

E=1.0MHz

-

-

3

E= 1.5MHz

-

-

4

E=2.0MHz

-

-

5

E = 1.0MHz

-

-

200

E=1.5MHz

-

-

250

E=2.0MHz

-

-

300

VOH = Vee

CIN

VIN=OV, Ta=25°C,
f=1.0MHz

COUT

RTS, Tx Data
IRQ
• Under transmitting and
receiving operation
• 500 kbps
• Data bus in Rm operation

Supply Current

• Chip is not selected
• 500 kbps
• Under non transmitting
and receiving operation
• Input level (Except E)
VIH min = Vee - O.SV
VIL max = O.SV

lee

Typ Max Unit

-

kOH

Do-D 7
Input Capacitance

Min

p.A

pF

pF

rnA

p.A

AC CHARACTERISTICS (Vcc=5.0V±5%, VSS=OV, Ta= -20-+75°C, unless otherwise noted.)
1. TIMING OF DATA TRANSMISSION
Characteristic

Symbol

Test Conditions

PWCL

Fig. 1

-+ 1 Mode

Minimum Clock Pulse Width

-+ 16, -+ 64 Modes
-+ 1 Mode
-+ 16, -+ 64 Modes

Clock Frequency

PWCH

. Fig. 2

Max

Unit

900

-

ns

600
900

-

ns

600

-+ 1 Mode
-+ 16, -+ 64 Modes

Min

fc

-

ns

ns

-

500

KHz

SOO

KHz

Clock-to-Data Delay for Transmitter

trOD

Fig. 3

-

600

ns

Receive Data Setup Time

-+ 1 Mode

t ROSU

Fig. 4

250

-

ns

Receive Data Hold Time

-+ 1 Mode

t ROH

Fig. 5

250

-

ns

tlR

Fig. 6

-

1200

ns

tRTS

Fig. 6

-

560

ns

-

1000'

ns

IRQ Release Time
RTS Delay Time
Rise Time and Fall Time

Except E

t r, tf

• 1.0p.s or 10% of the pulse width, whichever is smaller.

·c8SAMSUNG
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Electronics

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KS5824

CMOS INTERGRATED CIRCUIT

2. BUS TIMING CHARACTERISTICS
1) READ
Max

Unit

1000

-

ns

450
430

-

ns

Fig. 7

80

-

ns

tooR

Fig. 7

-

290

ns

Data Hold Time

tH

Fig. 7

20

100

ns

Address Hold Time

tAH

Fig. 7

10

-

ns

tEr, tEt

Fig. 7

-

25

ns

Symbol

Test Conditions

Min

Max

Unit

·Enable Cycle Time

tcycE

Fig. 8

1000

-

ns

Enable "High" Pulse Width

PW EH

Fig. 8

450

-

ns

Enable "Low" Pulse Width

PW EL

Fig. 8

430

-

ns

tAs

Fig. 8

80

-

ns

Characteristic

Symbol

Test Conditions

Min

Enable Cycle Time

tCYC E

Fig. 7

Enable ,~'High" Pulse Width

PW EH

Fig. 7

Enable "Low" Pulse Width

PW EL

Fig. 7

Setup Time, Address and R/IN Valid
to Enable Positive Transition

tAs

Data Delay Time

Rise and Fall Time for Enable Input

ns

I

2) WRITE

Characteristic

Setup Time, Address and R/W
Valid to Enable Positive Transition
Data Setup Time

tosw

Fig. 8

165

-

ns

Data Hold Time

tH

Fig. 8

10

-

ns

Address Hold Time

tAH

Fig. 8

10

-

ns

t Er, tEt

Fig. 8

-

25

ns

Rise and Fall Time for Enable Input

PWCL

TX ClK
OR
Rx elK

TX elK
OR
Rx elK

2.2V

O.BV
PWCH

• Tx elK is VIH=2.0V

Fig. 1 Clock Pulse Width, "Low" State

Fig. 2 Clock Pulse .Width, "High" State

Tx elK

Ri< DATA

VCC-2.0V

O.4V

Fig. 3 Transmit Data Output Delay

c8SAMSUNG
Electronics

RX elK

Fig. 4 Receive Data Setup Time (+ 1 Mode)

197

KS5824

CMOS INTERGRATED CIRCUIT

ENABLE

Rx ClK

tRTS
VcC-2.0V
O.4V

~
--J/'-2.0V

IRQ _ _ _ _ _ _ _ _ _ _ _ _ _

Fig. 5 Receive Data Hold Time ( + 1 Mode)

* (1) IRQ Release Time applied to Rx Data Register
read operation.
(2) IRQ Release Time applied to Tx Data Register
write operation
(3) IRQ Release Time applied to control Register
write TI E 0, RI E 0 operation.
** IRQ Release Time applied to Rx Data Register
read operation right after read status register,
when IRQ is asserted by DCD rising edge.

f-----tCyC E - - - - - - j

=

ENABLE

RS, CS, R/IN

=

Note: Note that following take place when IRQ is
asserted by the detection of transmit data register
empty status. IRQ is released to "High"
asynchronously with E signal when CTS goes
"High". (Refer to Figure 14)

DATA BUS

Fig. 6

Fig. 7 Bus Read Timing Characteristics
(Read information from UART)

R'fS Delay and IRQ Release Time

LOAD B

lOAD A
(Do-D7. RTS, Tx DATA)
1------tcycE - - - - - - i

PWEH

(TFfO

0=JlY)S.OV

RL = 2.4K!l

3K!l

TEST POINT
TEST POINT

lOOPF
c=

130pF for Do-D7
30pF for FITS and Tx Data
R = 10K!l for Do-D7. Fi'ffi and Tx Data
All diodes are 1S2074@or Equivalent.

=

Fig. 8 Bus Write Timing Characteristics
(Write information into UART)

c8SAMSUNG
Electronics

Fig. 9 Bus Timing Test Loads

198

KS5824

CMOS INTERGRATED CIRCUIT

I

Fig. 10 110 Baud Serial ASCII Data Timing

TRANSMIT
CLOCK 4
ENABLE 14

READ/WRITE
CHIP SELECT 0
CHIP SELECT 1
CHIP SELECT 2

13
8
10
9

REGISTER SELECT 11-

CHIP
SELECT
AND
READ/
WRITE
CONTROL

TRANSMIT
DATA
REGISTER

6 TRANSMIT
DATA

24 CLEAR
TO SEND

DO

22

01

21

02

20

03

19

D4

18

05

17

D6

16

07

15

STATUS
REGISTER
7 INTERRUPT
REQUEST

DATA BUS
BUFFERS

23 DATA
CARRIER
DETECT
5 REQUEST
TO SEND
CONTROL
REGISTER

Vee = Pin 12
Vss= Pin 1

RECEIVE
DATA
REGISTER

RECEIVE
SHIFT
REGISTER

~~g~~~----------------------------------~~----~
Fig. 11 Expanded Block Diagram

c8SAMSUNG
Electronics

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KS5824

CMOS INTERGRATED CIRCUIT

DEVICE OPERATION

transmitted (because of double buffering). The second
character will be automatically transferred into the Shift
Register when ·the first character transmission is
completed. This sequence continues until all the
characters have been transmitted.

At the bus interface, the UART appears as two
addressable memory locations. Internally, there are four
registers: two read-only and two write-only registers. The
read-only registers are Status and Receive Data; the
write-only registers are Control and Transmit Data. The
serial interface consists of serial input and output lines
with independent clocks, and three peripheral/modem
control lines.

POWER ON/MASTER RESET
The master reset (CRO, CR1) should be set during
system initialization to insure the reset condition and
prepare for programming the UART functional configuration when the communications channel is required.
During the first master reset, the IRQ and RTS outputs
are held at level 1. On all other master resets, the RTS
output can be programmed high or low with the IRQ
J)utput held high. Control bits CR5 and CR6 should also
be programmed to define the state of RTS whenever
master reset is utilized. The UART also contains internal
power-on reset logic to detect the power line turn-on
transition and hold the chip in a reset state to prevent
erroneous output transitions prior to initialization. This
circuitry depends on clean power turn-on transitions.
The power-on reset is released by means of the busprogrammed master reset which must be applied prior
to operating the UART. After master resetting the UART,
the programmable Control Register can be set for a
number of options such as variable clock divider ratios,
variable word length, one or two stop bits, parity (even,
odd, or none), etc.

TRANSMIT
A typical transmitting sequence consists of reading
the UART. Status Register either as a result of an
interrupt or in the UART's turn in a polling sequence.
A character may be written into the Transmit Data
Register if the status read operation has indicated that
the Transmit Data Register is empty. This character is
transferred to a Shift Register where it is serialized and
transmitted from the Transmit Data output preceded by
a start bit and followed by one or two stop bits. Internal
parity (odd or even) can be optionally added to the
character and will occur between the last data bit and
the first stop bit. After the first character is written in
the Data Register, the Status Register can be read again
to check for a Transmit Data Register Empty condition
and current peripheral status. If the register is empty,
another character can be loaded for transmission even
though the first character is in the process of being

RECEIVE
Data is received from a peripheral by means of the
Receive Data input. A divide-by-one clock ratio is
provided for an externally synchronized clock (to its data)
while the divide-by-16 and 64 ratios are provided for
internal synchronization. Bit synchronization in the
divide-by-16 and 64 modes is initiated by the detection
of 8 or 32 low samples on the receive line in the divideby-16 and 64 modes respectively. False start bit deletion
capability insures that a full half bit of a start bit has
been received before the internal clock is synchronized
to the bit time. As a character is being received, parity
(odd or even) will be checked and the error indication
will be available in the Status Register along with
framing error, overrun error, and Receive Data Register
full. In a typical receiving sequence, the Status Register
is read to determine if a character has been received
from a peripheral. If the Receiver Data Register is full,
the character is placed on the 8-bit UART bus when a
Read Data command is received from the MPU. When
parity has been selected for a 7-bit word (7 bits plus
parity), the receiver strips the parity bit (D7 = 0) so that
data alone is transferred to the MPU. This feature
reduces MPU programming. The Status Register can
continue to be read to determine when another
character is available in the Receive Data Register. The
receiver is also double buffered so that a character can
be read from the data register as another character is
being received in the shift register. The above sequence
continues until all characters have been received.

INPUT/OUTPUT FUNCTIONS
UART INTERFACE SIGNALS FOR MPU
The KS5824 interfaces to the MPU with an 8-bit
bidirectional data bus, three chip select lines, a register
select line, an interrupt request line, read/write line, and
enable line. These signals permit the MPU to have
complete control over the KS5824.
UART Bidirectional Data (00·07) - The bidirectional
data lines (DO-07) allow for data transfer between the
KS5824 and the MPU. The data bus output drivers are
three-state devices that remain in the high-impedance
(off) state except when the MPU performs an UART read
operation.

200

KS5824
UART Enable (E) - The Enable signal, E, is a highimpedance TTL-compatible input that enables the bus
input/output data buffers and clocks data to and from
the KS5824.
Read/Write (R/W) - The ReadlWrite line is a highimpedance input that is TTL compatible and is used to
control the direction of data flow through the UART's
input/output data bus interface. When ReadIWrite is high
(MPU Read cycle), KS5824 output drivers are turned on
and a selected register is read. When it is low, the
KS5824 output drivers are turned off and the MPU writes
into a selected register. Therefore, the ReadlWrite signal
is used to select read-only or write-only registers within
the KS5824.
Chip Select (CSO, CS1, CS2) - These three highimpedance TTL-compatible input lines are used to
address the KS5824. The KS5824 is selected when CSO
and CS1 are high and CS2 is low. Transfers of data to
and from the KS5824, are then performed under the
control of the Enable Signal, ReadIWrite, and Register
Select.
Register Select (RS) - The Register Select line is a
high-impedance input that is TTL compatible. A high
level is used to select the Transmit/Receive Data
Registers and a low level the Control/Status Registers.
The Read/Write signal line is used in conjunction with
Register Select to select the read-only or write-only
register in each register pair.
Interrupt Request (IRQ) - Interrupt Request is a TTLcompatible, open-drain (no internal pullup), active low
output that is used to interrupt the MPU. The IRQ output
remains low as long as the cause of the interrupt is
present and the appropriate interrupt enable within the
UART is set. The IRQ status bit, when high, indicates
the IRQ output is in the active state.
Interrupts result from conditions in both the
transmitter and receiver sections of the UART. The
transmitter section causes an interrupt when the
Transmitter Interrupt Enabled condition is selected
(CR5-CR6), and the Transmit Data Register ,Empty
(TORE) status bit is high. The TDRE status bit indicates
the current status of the Transmitter Data Register
except when inhibited by Clear-to-Send (CTS) being high
or the UART being maintained in the Reset condition.
The interrupt is cleared by writing data into the Transmit
Data Register. The interrupt is masked by disabling the
Transmitter Interrupt via CR5 or CR6 or by the loss of
CTS which inhibits the TORE status bit. The Receiver
section causes an interrupt when the Receiver Interrupt
Enable is set and the Receive Data Register Full (RDRF)
status bit is high, an Overrun has occurred, or Data
Carrier Detect (DCD) has gone high. An interrupt
resulting from the RDRF status bit can be cleared by

=8SAMSUNG
Electronics

CMOS INTERGRATED CIRCUIT
reading data or resetting the UART. Interrupts caused
by Overrun or loss of DCD are cleared by reading the
status register after the error condition has occurred and
then reading the Receive Data Registeror resetting the
UART. The receiver interrupt is masked by resetting the
Receiver Interrupt Enable.

CLOCK INPUTS
Separate high-impedance TTL-compatible inputs are
provided for clocking of transmitted and received data.
Clock frequencies of 1, 16, or 64 times the data rate may
be selected.
Transmit Clock (Tx ClK) - The Transmit Clock input
is used for the clocking of transmitted data. The
transmitter initiates data on the negative transition of
the clock.
Receive Clock (Rx ClK) - The Receive Clock input
is used for synchronization of received data. (In the .;- 1
mode, the clock and data must be synchronized
externally.) The receiver samples the data on the positive
transition of the clock.

SERIAL INPUT/OUTPUT LINES
Receive Data (Rx Data) - The Receive Data line is
a high-impedance TTL-compatible input through which
data is received in a serial format. Synchronization with
a clock for detection of data is accomplished internally
when clock rates of 16 or 64 times the bit rate are used.
Transmit Data (Tx Data) - The Transmit Data output
line transfers serial data to a modem or other peripheral.

PERIPHERAL/MODEM CONTROL
The UART includes several functions that permit
limited control of a peripheral or modem. The functions
included are Clear-to-Send, Request-to-Send and Data
Carrier Detect.
Clear·to·Send (CTS) - This high-impedance TTL·
compatible input provides automatic control of the
transmitting end of a communications link via the
modem Clear·to-Send active low output by inhibiting the
Transmit Data Register Empty (TORE) status bit.
Request·to·Send (RTS) - The Request·to-Send output
enables the MPU to control a peripheral or modem via
the data bus. The RTS; output corresponds to the state
of the Control Register bits CR5 and CR6. When CR6 = 0
or both CR5 and CR6 = 1, the RTS output is low (the
active state). This output can also be used for Data
Terminal Ready (DTR).

201

•

KS5824

CMOS INTERGRATED CIRCUIT

Data Carrier Detect (DCD) - This high-impedance
TIL-compatible input provides automatic control, such
as in the receiving end of a communications link by
means of a modem Data Carrier Detect output. The DCD
input inhibits and initializes the receiver section of the
UART when high. A low-to-high transition of the Data
Carrier Detect initiates an interrupt to the MPU to
indicate the occurrence of a loss of carrier when the
Receive Interrupt Enable bit is set. The Rx ClK must
be running for proper DCD operation.

character is being transmitted, then the transfer will take
place within 1-bit time of the training edge of the Write
command. If a character is being transmitted, the new
data character will commence as soon as the previous
character is complete. The transfer of data causes the
Transmit Data Register Empty (TORE) bit to indicate
empty.

RECEIVE DATA REGISTER (RDR)
Data is automatically transferred to the empty Receive
Data Register (RDR) from the receiver deserializer (a
shift register) upon receiving a complete character. This
event causes the Receive Data Register Full bit (RDRF)
in the status buffer to go high (full). Data may then be
read through the bus by addressing the UART and
selecting the Receive Data Register with RS and RIW
high when the UART is enabled. The non-destructive
read cycle causes the RDRF bit to be cleared to empty
although the data is retained in the RDA. The status is
maintained by RDRF as to whether or not the data is
current. When the Receive Data Register is full, the
automatic transfer of data from the Receiver Shift
Register to the Data Register is inhibited and the RDR
contents remain valid with its current status stored in
the Status Register.

UART REGISTERS
The expanded block diagram for the UART indicates
the internal registers on the chip that are used for the
status, control, receiving, and transmitting of data. The
content of each of the registers is summarized in Table

1.

TRANSMIT DATA REGISTER (TOR)
Data is written in the Transmit Data Register during
the negative transition of the enable (E) when the UART
has been addressed with RS high and Rm low. Writing
data into the register causes the Transmit Data Register
Empty bit in the Status Register to go low. Data can then
be transmitted. If the transmitter is idling and no

DEFINITION OF UART REGISTER CONTENTS
Buffer Address
RS • RIW
Transmit
Data
Register

RS • RIW
Receive
Data
Register

RS • RIW

RS· RIW

Control
Register

Status
Register

(Write Only)

(Read Only)

(Write Only)

(Read Only)

0

Data Bit 0*

Data Bit 0

Counter Divide
Select 1 (CRO)

Receive Data Register
Full (RDRF)

1

Data Bit 1

Data Bit 1

Counter Divide
Select 2 (CR1)

Transmit Data Register
Empty (TORE)

2

Data Bit 2

Data Bit 2

Word Select 1
(CR2)

Data Carrier Detect
(DCD)

3

Data Bit 3

Data Bit 3

Word Select 2
(CR3)

Clear-to-Send
(CTS)

4

Data Bit 4

Data Bit 4

Word Select 3
(CR4)

Framing Error
(FE)

5

Data Bit 5

Data Bit 5

Transmit Control 1
(CR5)

Receiver Overrun
(OVRN)

6

Data Bit 6

Data Bit 6

Transmit Control 2
(CR6)

Parity Error (PE)

7

Data Bit 7* * *

Data Bit 7**

Receive Interrupt
Enable (CR7)

Interrupt Request
(IRQ)

Data
Bus
Line
Number

=

=

* Leading bit LSB Bit 0
* * Data bit will be zero in 7 bit plus parity modes
*** Data bit is "don't care" in 7 bit plus parity modes.

c8SAMSUNG
Electronics

202

KS5824

CMOS INTERGRATED CIRCUIT

CONTROL REGISTER
The UART Control Register consists of eight bits of
write-only buffer that are selected when RS and RiW are
low. This register controls the function of the receiver,
transmitter, interrupt enables, and the Request-to-Send
peripheral/modem control output.
Counter Divide Select Bits (CRO and CR1) - The
Counter Divide Select Bits (CRa and CR1) determine the
divide ratios utilized in both the transmitter and receiver
sections of the UART. Additionally, these bits are used
to provide a master reset for the UART which clears the
Status Register (except for external conditions on CTS
and DCD) and initializes both the receiver and
transmitter. Master reset does not affect other Control
Register bits. Note that after power-on or a power
fail/restart, these bits must be set high to reset the
UART. After resetting, the clock divide ratio may be
selected. These counter select bits provide for the
following clock divide ratios:
CR1

CRO

Function

a
a
1
1

a
1
a
1

+1
+16
+64
Master Reset

Word Select Bits (CR2, CR3, and CR4) - The Word
Select bits are used to select word length, parity, and
the number of stop bits. The encoding format is as
follows;
CR4
a
a
a

0
1
1
1
1

CR3 CR2
a
a
1
1
a
a
1

1

a
1
a
1

0
1
a
1

Function
7
7
7
7
8
8
8
8

Bits + Even Parity + 2 Stop Bits
Bits + Odd Parity + 2 Stop Bits
Bits + Even Parity + 1 Stop Bit
Bits + Odd Parity + 1 Stop Bit
Bits + 2 Stop Bits
Bits + 1 Stop Bit
Bits + Even Parity + 1 Stop Bit
Bits + Odd Parity + 1 Stop Bit

Word length, Parity Select, and Stop Bit changes are
not buffered' and therefore become effective
immediate!y.
Transmitter Control Bits (CRS and CR6) - Two
Transmitter Control bits provide for the control of the
interrupt from the Transmit Data Register Empty
condition, the Request-to-Send (RTS) output, and the
transmission of a Break level (space). The following
encoding format is used:

c8SAMSUNG
Electronics

CR6

CR5

a

a

a

1

1

a

1

1

Function

=
=
=

RTS low, Transmitting Interrupt
Disabled.
RTS low, Transmitting Interrupt
Enabled.
RTS high, Transmitting Interrupt
Disabled.
RTSi: low. Transmits a Break level
on the Transmit Data Output.
Transmitting Interrupt Disabled.

Receive Interrupt Enable Bit (CRn - The following
interrupts will be enabled by a high level in bit position
7 of the Control Register (CR7): Receive Data Register
Full Overrun or a low-to-high transition on the Data
Carrier Detect (DCD) signal line.

STATUS REGISTER
Information on the status of the UART is available to
the MPU by reading the UART Status Register. This readonly register is selected when RS is low and Rm
is high. Information stored in this register indicates the
status of the Transmit Data Register, the Receive Data
Register and error logic, and the peripheral/modem
status inputs of the UART.
Receive Data Register Full (RDRF), Bit 0 - Receive
Data Register Full indicates that received data has been
transferred to the Receive Data Register. RDRF is
cleared after an MPU read of the Receive Data Register
or by a master reset. The cleared or empty state
indicates that the contents of the Receive Data Register
are not current. Data Carrier Detect being high also
causes RDRF to indicate empty.
Transmit Data Register Empty (TDRE), Bit 1 - The
Transmit Data Register Empty bit being set high
indicates that the Transmit Data Register contents have
been transferred and that new data may be entered. The
low state indicates that the register is full and that
transmission of a new character has not begun since
the last write data command.
Data Carrier Detect (DC D), Bit 2 - The Data Carrier
Detect bit will be high when the DeD input from a
modem has gone high to indicate that a carrier is not
present. This bit going high causes and Interrupt
Request to be generated when the Reoeive Interrupt
Enable is set. It remains high after the DCD input is
returned low until cleared by first reading the Status
Register and then the Data Register or until a master
reset occurs. If the DCD input remains high after read

203

•

KS5824

CMOS INTERGRATED CIRCUIT

status and read data or master reset has occurred, the
interrupt is cleared, the DCD status bit remains high and
will follow the DCD input.

in succession without a read of the RDR having
occurred. The Overrun does not occur in the Status
Register until the valid character prior to Overrun has
been read. The RDRF bit remains set until the Overrun
is reset. Character synchronization is maintained during
the Overrun condition. The Overrun indication is reset
after the reading of data from the Receive Data Register
or by a Master Reset.

Clear·to·Send (CTS), Bit 3 - The Clear-to-Send bit
indicates the state of the Clear-to-Send input from a
modem. A low CTS indicates that there is a Clear-toSend from the modem. In the high state, the Transmit
Data Register Empty bit is inhibited and the Clear-toSend status bit will be high. Master reset does'not affect
the Clear-to-Send status bit.
Framing Error (FE), Bit 4 - Framing error indicates
that the received character is improperly framed by a
start and a stop bit and is detected by the absence of
the first stop bit. This error indicates a synchronization
error, faulty transmission, or a break condition. The
framing error flag is set or reset during the receive data
transfer time. Therefore, this error indicator is present
throughout the time that the associated character is
available.
Receiver Overrun (OVRN), Bit 5 - Overrun is an error
flag the indicates that one or more characters in the data
stream were lost. That is, a character or a number of
characters were received but not read from the Receive
Data Register (RDR) prior to subsequent characters
being received. The overrun condition begins at the
midpoint of the last bit of the second character received

c8SAMSUNG
Electronics

Parity Error (PE), Bit 6 - The parity error flag indicates
that the number of highs (ones) in the character does
not agree with the preselected odd or even parity. Odd
parity is defined to be when the total number of ones
is odd. The parity error indication will be present as long
as the data character is in the RDR.lf no parity is
selected, then both the transmitter parity generator
output and the receiver parity check results are
inhibited.
Interrupt Request (IRQ), Bit 7 - The IRQ bit indicates
the state of the IRQ output. Any interrupt condition with
its applicable enable will be indicated in this status bit.
Anytime the IRQ output is low the IRQ bit will be high
to indicate the interrupt or service request status. IRQ
is cleared by a read operation to the Receive Data
Register or a write operation to the Transmit Data
Register.

204

KT3040/A

CMOS INTEGRATED CIRCUIT

16 CERDIP

PCM TRANSMIT/RECEIVE FILTER
The KT3040 PCM CODEC Filter is a monolithic circuit
that provides the transmit and receive filtering necessary to interface a voice telephone circuit to a time division multiplexed application in 8KHz sampling system.
The device consists of two switched capacitor filters,
transmit and receive, and power amplifiers which may
be used to drive a transformer hybrid (2 to 4 wire converter) or an electronic hybrid (SLlC). If an electronic
hybrid is used, the power amplifiers are not needed and
may be deactivated to minimize power dissipation. The
transmit filter is a fifth order low pass filter in series
with a fourth order high pass filter. It provides a flat band
pass filter which will pass frequencies between 200Hz
and 3400Hz and provides rejection of the 50/60Hz power line frequency as well as the anti aliasing needed in
an 8KHz sampling system. The receive filter is a low
pass filter which smooths the voltage steps present in
the CODEC output waveform and provides the sin x/x
correction necessary to give unity gain in the passband
for the CODEC-decoder-and-receive-filter pair.

•
ORDERING INFORMATION
Device
KT3040N

FEATURES

KT3040AN
KT3040J

• Exceeds all 03/04 and CCITT specifications
KT3040AJ
• Low power consumption: 45 mW (0 dBmO into 600n)
30 mW (power amps disabled)
• Power down mode: 0.5 mW
• External gain adjustment, both transmit and receive filters.
• Transmit filter includes SO/60Hz rejection
• Receive filter includes sin xix compensation
• Direct interface with transformer or electronic telephone
hybrids
• TTL and CMOS compatible logic
• Power supplies: + 5V, - 5V
• All inputs protected against static discharge due to
handling
• 300 mil ceramic package available

c8SAMSUNG
Electronics

Package

Operating Temperature

Plastic
Plastic
Ceramic

-25 -

+ 125°C

Ceramic

205

CMOS INTEGRATED CIRCUIT

KT3040/A
BLOCK DIAGRAM
PDN

GNDA

GNDD

Vee

VBB

7

PWIRO-

ClK
ClKO

\

VFxO

I

L.. ___________~A..!:!..S~T..£I£.E~ _ _ _ _ _ _ _ _ _
GSx

Fig. 1

PIN CONFIGURATION
1~

VFxO

1~J GNDA

KT3040/A

ABSOLUTE MAXIMUM RATINGS
Characteristics
Supply Voltages
Power Dissipation
Input Voltage

Symbol

Value

Unit

Vee, VBB

±7

V

Po

1

W/PKG

VIN

±7

V

Output Short-Circuit Duration

Ts.e OUT

Continuous

sec

Operating Temperature Range

Ta

-25 to + 125

°C

Storage Temperature

T51g

-65 to + 150

Lead Temperature (Soldering 10 seconds)

c8SAMSUNG
Electronics

TL

300

°C
°C

206

KT3040/A

CMOS INTEGRATED CIRCUIT

DC ELECTRICAL CHARACTERISTICS

(Ta=ooe to 70 oe, Vcc= +5V±5%, VBB = -5V±5%, fc=2.048MHz, GNDA=OV, GNDD=OV;
unless otherwise specified)

Characteristic

Symbol

Test Conditions

KT3040
Min

Typ

KT3040A
Max

Min

Typ

Max

Unit

POWER CONSUM PTION
lee

PDN = High

50

400

50

100

IlA

IBB

PDN = High

50

400

50

100

IlA

Vee Operating Current

1CC1

PWRI = VBB ,
Power amp inactive

3

4

3

4

mA

VBB Operating Current

IBB1

PWRI = VBB ,
Power amp inactive

3

4

3

4

mA

Vee Operating Current

Jee2

RL = 600n connected between
PWRO + and PWRO -, Input
Level =0 dBmO (Note 1)

4.6

6.4

4.6

6.4

mA

VBS Operating Current

ISB2

(Note 1)

4.6

6.4

4.6

6.4

mA

liNe

VBB5,VIN5,Vee

-10

10

IlA

Vee Standby Current
VBB Standby Current

DIGITAL INTERFACE
CLK Input Current

10

-10
-100

PDN Input Current

hNP

VBB5,VIN5,Vee

-100

CLKO Input Current

hNO

VBB5,VIN5,Vee - 0.5

-10

0.1

-10

0.1

High Level Input Voltage

VIH

Except CLKO

2.2

Vee

2.2

Vee

V

Low Level Input Voltage

VIL

Except CLKO

0

0.8

0

0.8

V

High Level Input Voltage

VIHO

CLKO Pin

Vee - 0.5

Vee

Vee -0.5

Vee

V

Low Level Input Voltage

VILO

CLKO Pin

VBB

VBB + 0.5

VBB

Vss+0.5

V

Input Intermediate Voltage

VIIO

CLKO Pin

-0.8

0.8

-0.8

0.8

V

c8SAMSUNG
Electronics

IlA
IlA

207

•

CMOS INTEGRATED CIRCUIT

KT3040/A

DC ELECTRICAL CHARACTERISTICS
Characteristic

Symbol

Test Conditions

(Continued)

KT3040
Min

Typ

KT3040A
Max

Min

100

-100

Typ

Max

Unit

TRANSMIT FILTER GAIN SETTING AMPLIFIER
VFXI Input Leakage Current
VFXI Input Resistance
VFXI Input Offset Voltage
VFXI Common Mode Range

IBxl

-100

VBB5.VFxl5.Vee

10

100

nA
~-r--

Rixi
VOSxl

- 2.5V 5. VIN 5.

+2.5V

VeM

Common Mode Rejection Ratio CMRR
Power Supply Rejection
Ratio of Vee or VBB

VBB 5. VFXI5. Vee

- 2.5V 5. VIN 5. 2.5V

PSRR

10

Mf!

-20

20

-20

20

-2.5

2.5

-2.5

2.5

mV
V

60

60

dB

60

60

dB

Open Loop Output Resistance
of GS x

ROL

Minimum Load Resistance
of GS x

RLxl

Maximum Load Capacitance
of GS x

COL

Output Voltage Swing of GS x

VOXI

RL~10Kf!

±2.5

±2.5

V

Open Loop Voltage Gain
of GS x

AVOL

RL~10Kf!

5,000

5,000

VIV

Open Loop Unity Gain
Bandwidth of GS x

fe

c8SAMSUNG
Electronics

1

1

10

Kf!

10

Kf!

100

2

100

2

pF

MHz

208

KT3040/A

CMOS INTEGRATED CIRCUIT

AC ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, Ta = 25°C. All parameters are specifi(d for a signal level of OdBmO at 1KHz.
The OdBmO level is assumed to be 1.54Vrms measured at the output of the transmit or receive filter)

Characteristic

Symbol

Test Conditions

KT3040A

KT3040
Min

Typ

Max

Min

Typ

Max

Unit

TRANSMIT FILTER (Transmit filter input OP amp set to the non·inverting unity gain mode, with VFX1 = 1.09Vrms unless otherwise noted)
Minimum Load Resistance
of VFXO

RLx

Load Capacitance VFXO

CLx

Power Supply Rejection
Ratio, VFXO
Power Supply Rejection
Ratio, VFXO
Absolute Gain

Gain Relative to GAX

-2.5V-~~---+-P-W-R-O-+---------t--~~--~

I

Rs

"-

-- -- -

PWROI
-- -

-

-

-

-

-

-

-

-

-

-

_ _ -I

KT3040/A

Typical Connection of Output Driver Amp
The power amps can be deactivated, when not required, by connecting the power amplifier input (pin 5) to the
negative power supply Vss. This reduces the total filter power consumption by approximately 10mW-20mW
depending on output signal amplitude.

Power Down Mode
Pin 13 (PDN) provides the power down control. When the level on this pin is high, the KT3040/A goes into standby,
power down mode. The total filter power consumption will reduce to less than 1mW. This feature allows multiple
KT3040/A to drive the same analog bus on a time shared basis. Connect PDN to GNDD for normal operation.

c8SAMSUNG
Electronics

214

KT3040/A

CMOS INTEGRATED CIRCUIT

APPLICATION INFORMATION
R1
INTERFACE

R2

CIRCUIT

1--- --------l
I
TRANSFORMERS
I

I

I

600

I

16 >0.1I'F
VFXI

VFXO

VFXI+

Irv

DIGITAL
OUTPUT

50K

I

I

KT5116

KT3040
GNDA

PWRO-

V FR1
6000

10

13

I

12
VFRO

0.11'F

I
I
L _________ ~

50K

DIGITAL
INPUT

Fig. 2
Note 1: Transmit voltage gain = R1;2 R2 x.J2 (The filter itself introduces a 3dB gain), (R1

+ R2~ 10K)

Note 2: Receive Gain = R R4R (R3 + R4~ 10K)
3+

4

Note 3: In the configuration shown, the receive filter amplifiers will drive a 6000 T to R termination to a maximum
signal level of B.SdBm. An alternative arrangement, using a transformer winding ratio equivalent to 1.414:1
and 3000 lesistor, Rs , will provide a maximum signal level of 10.1dBm across a 6000 termination
impedance.

Gain Adjust
Fig. 2 shows the signal path interconnections between the KT3040 and KT5116 single-channel CODEC. The transmi-t
RC coupling components have been chosen both for minimum passband droop and to present the correct impedance
to the CODEC during sampling.
Optimum noise and distortion performance will be obtained from the KT3040 filter when operated with system
peak overload voltages of ± 2.S to ± 3.2V at VFXO and VFRO . When interfacing to a PCM CODEC with a peak
overload voltage outside this range, further gain or attenuation may be required.
For example, the KT3040 filter can be used with the KT3000 series CODEC which has a 5.5V peak overload voltage.
A gain stage following the transmit filter output and an attenuation stage following the CODEC output are required ..

Decoupling Recommendations
PC board decoupling should be sufficient to prevent power supply transients from exceeding the absolute
maximum rating of the device. A minimum of 1/lF is recommended for each power supply.
A O.OS/lF bypassing capacitor should also be connected from each power supply to GNDA. However, this
decoupling may be reduced depending on board design and performance. Ground loops should be avoided.

c8SAMSUNG
Electronics

215

I

KT3040/A

CMOS INTEGRATED CIRCUIT

TYPICAL PERFORMANCE CURVE

RECEIVE FILTER STAGE

TRANSMIT FILTER STAGE
10

-10

-20

10

,- ~ iJEl

,

~

/
V

-10

------

~

r-~

-

r---..
FILTER + SIN XIX "'" ~

SI~X~

-20

~~

-30

-30

"""

-40

-50

-50

-60

-60

-70
0.1

10
FREQUENCY (KHz)

c8SAMSUNG
Electronics

I~
I ,

-40

~

t--X=~

-70
0.1

I

I
10
FREQUENCY (KHzl

216

KT3170

CMOS INTEGRATED CIRCUIT

LOW POWER DTMF RECEIVER
18 DIP

The KT3170 is a complete Dual Tone Multiple Frequency
(DTMF) receiver which is fabricated by the low power
CMOS and the Switched-Capacitor Filter technology.
This LSI consists of band split filters, which separates
the high and low group tones, followed by a digital
counting section which verifies the frequency and
duration of the received tones before passing the corresponding code to the output bus. It decodes all 16
DTMF tone pairs into a 4bits digital code.
The externally required components are minimized by
on chip provision of a differential input AMP, clock
oscillator and latched three state interface. The on chip
clock generator requires only a low cost TV crystal as
an external component.

•

FEATURES
•
•
•
•
•
•

Detects all 16 standard tones.
Low power consumption: 15mW (Typ)
Single power supply: 5V
Uses inexpensive 3.58MHz crystal
Three state outputs for microprocessor interface
Good quality and performance for using in
exchange system
• Package options include standard plastic and
ceramic 300 mil DIPs
• Power down mode/input inhibit

APPLICATIONS
·PABX
• Central Office
• Paging Systems
• Remote Control
• Credit Card Systems
• Key Phone System
• Answering Phone
• Home Automation System
• Mobile Radio
• Remote Data Entry

c8SAMSUNG
Electronics

ORDERING INFORMATION
Device

Package

KT3170N

Plastic

KT3170J

Ceramic

Operating Temperature
-40 - +85°C

PIN CONFIGURATION

•
KT3170

217

KT3170

CMOS INTEGRATED CIRCUIT

BLOCK DIAGRAM
OSC1

OSC2

TO ALL
CHIP CLOCK

DIGITAL SECTION
ANALOG SECTION

HIGH
GROUP
FILTER
ANTI
ALIASING
FILTER

DIAL
TONE
NOTCH
FILTER

DETECTORS

DIGITAL
DETECTION
ALGORITHM

OUTPUT
DECODER
AND LATCH

LOW
GROUP
FILTER

CHIP POWER CHIP BIAS
STEERING
LOGIC

Voo

GND

ABSOLUTE MAXIMUM RATINGS
Characteristics

Symbol

Value

Unit

Power Supply Voltage
Analog Input Voltage Range
Digital Input Voltage Range
Output Voltage Range
Current On Any Pin
Operating Temperature
Storage Temperature

Voo
VINA
VINO
Vo
liN
Ta
T stg

6
- 0.3 - Voo + 0.3
- 0.3 - Voo + 0.3
- 0.3 -Voo + 0.3
10
-40 - +85
-60 -+150

V
V
V
V
rnA
°C
°C

* Absolute Maximum Ratings are these value beyond which permanent damage to the device may occur. These are
stress rating only and functional operation of the device at or beyond them is not implied. Long exposure to these
condition may affect device reliability.

c8SAMSUNG
Electronics

218

KT3170

CMOS INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS
Characteristics

Symbol

(V oo =5V, Ta=25°C, unless otherwise noted)

Test Condition

Min

Typ

Operating Supply Voltage

Voo

Operating Supply Current

100

3.0
15

Power Dissipation

Po

. Input Voltage Low

VIL

Input Voltage High

VIH

4.75

0.1

Ipu

OE=GND

7.5

Analog Input Impedance

RIN

fiN = 1KHz

Steering Input Threshold Voltage

VTS

Output Voltage Low

VOL

Output Voltage High

8

No Load

VOH

No Load

4.97

sink

VOL=0.4V

1

2.5

Output Current

Isource

VOH=4.6V

0.4

0.8

'

mA

45

mW

1.5

V

Vref

p.A
15

10

2.2

Output Current

Vref Output Voltage

V

9.0

V

VIN=GND or Voo

Pull Up Current On OE Pin

Unit

5.25

3.5

IIHIIIL

Input Leakage Current

Max

p.A
MO

2.5

V

0.03

V
V
mA
mA

2.8

2.4

V

Vref Output Resistance

Rref

10

KO

Analog Input Offset Voltage

Vos

25

mW

Power Supply Rejection Ratio

PSRR

Gain Setting Amp
at 1KHz

60

dB

Common Mode Rejection Ratio

CMRR

- 3.0V < VIN < 3.0V

60

dB

Av

Gain Setting Amp at 1KHz

65

dB

Open Loop Voltage Gain
Open Loop Unit Gain Bandwidth

BW

1.5

MHz

Analog Output Voltage Swing

VAO

RL= 100K

4.5

Vp- p

Acceptable Capacitive Load

CL

GS

100

pF

Acceptable Resistive Load

RL

GS

50

KO

3.0

Vp- p

Analog Input Common Mode
Voltage Range

c8SAMSUNG
Electronics

VCM

No Load

219

•

CMOS INTEGRATED CIRCUIT

KT3170

AC ELECTRICAL CHARACTERISTICS
Characteristics

Symbol

Valid Input Signal Range
(each tone of composite signal)

V1NA

Dual Tone Twist Accept

TW

Acceptable Frequency Deviation

FDA

Frequency Deviation Reject

(V DD =5V, Ta=25°C, f c =3.579545MHz)

Test Condition

Min

Typ

-29

Unit

1.0

dBm

±10

dB

±1.5%
±2Hz

FDR

±3.5%

Third Tone Tolerance

T3

-25

Noise Tolerance

NT

Dial Tone Tolerance

DT

18

22

fc

3.5759

3.5795

Crystal Clock Frequency

Max

-16

dB

-12

dB
dB
3.5831

MHz

Maximum Clock Input Rise Time

t,

External Clock

110

nS

Maximum Clock Input Fall Time

tf

External Clock

110

nS

Acceptable Clock Input Duty Cycle

DC

External Clock

CLO

OSC2 PIN

Acceptable Capacitive Load

40

50

60

%

30

pF
mS

Tone Present Detect Time

TDP

5

11

14

Tone Absent Detect Time

TDA

0.5

4

8.5

mS

Minimum Tone Duration Accept

TUA

User Adjustable

40

mS

Maximum Tone Duration Reject

TUR

User Adjustable

Acceptable Interdigit Pause

TAID

User Adjustable

Rejectable Interdigit Pause

TRID

User Adjustable

Propagation Delay Time SI to a

TPsa

OE=High

8

Propagation Delay Time SI to DSO

Tpsds

OE=High

12

p,S

Output Data Setup a to DSO

TSU

OE=High

3.4

p,S

20

mS
40

20

mS

Propagation Delay Time OE to a
(Enable)

TPEa

RL

=10K, CL=50pF

50

Propagation Delay Time OE to a
(Disable)

TPDa

RL= 10K, CL= 50pF

300

Notes:

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.

mS

11

60

p,S

nS
nS

Digit sequenc€ consists of all 16 DTMF tones.
Tone duration = 40mS, Tone pause = 40mS.
Nominal DTMF frequencies are used.
Both tones in the composite signal have an equal amplitude.
Tone pair is deviated by ± 1.5% ± 2Hz.
Bandwidth limited (3KHz) Gaussian Noise.
The precise dial tone frequencies are (350Hz and 440Hz) ± 2%.
For an error rate of better than 1 in 10000.
Referenced to lowest level frequency component in DTMF signal.
Minimum signal acceptance level is measured with specified maximum frequency deviation.
This item also applies to a third tone injected onto the power supply.
Referenced to Fig. 1 Input DTMF .tone level at - 28dBm.

c8SAMSUNG
'::Iectronics

220

CMOS INTEGRATED CIRCUIT

KT3170

PIN DESCRIPTION
Pin

Name

Description

1

IN+

Non inverting Input of the op amp.

2

IN-

Inverting Input of the op amp.

3

GS

Gain Select. The output used for gain adjustment of analog input
signal with a feedback resistor.

4

Vret

Reference Voltage output (VoD/2, Typ) can be used to bias the op amp
input of Voo/2.

5

hN

6

PON

Control input for the stand-by power down mode. Power down occurs
when the signal on this input is high states. This pin is pulled down
internally.

7, 8

OSC1
OSC2

Clock input/output. A inexpensive 3.579545MHz crystal connected
between these pins completes internal oscillator. Also, external clock
can be used.
Ground pin.

•

Input inhibit. High input states inhibits the detection of tones. This
pin is pulled down internally.

9

GND

10

OE

11-14

01-04

Three state data output. When enabled by OE, these digital outputs
provide the hexadecimal code corresponding to the last valid tone
pair received.

15

DSO

Delayed Steering Output. Indicates that valid frequencies have been
present for the required guard time, thus constituting a valid signal.
Presents a logic high when a received tone pair has been registered
and the output latch is updated. Returns to logic low when the
voltage on SIIGTO falls below Vrs .

16

ESO

Early Steering Outputs. Indicates detection of valid tone outputs a
logic high immediately when the digital algorithm detects a
recognizable tone pair. Any momentary loss of signal condition will
cause ESO to return to low.

17

SIIGTO

18

Voo

Output Enable input. Outputs 01-04 are CMOS push pull when OE is
High and open circuited (High impedence) when disabled by pulling
OE low. Internal pull up resistor built in.

Steering Input/Guard Time Output. A voltage greater than Vrs
detected at SI causes the device to register the detected tone pair
and update the output latch. A voltage less than Vrs frees the device
to accept a new tone pair. The GTO output acts to reset the external
steering time constant, and its state is a function of ESO and the
voltage on SI.
Power Supply ( + 5V, Typ)

c8SAMSUNG
Electronics

221

CMOS INTEGRATED CIRCUIT

KT3170

APPLICATION INFORMATION
The KT3170 is complete Touch-Tone detection system. It combines high precision active filter with analog circuits
and digital control logic on a monolithic CMOS chip. This application information describes device operation of
each block, performance and typically application circuit.

ANALOG INPUT CONFIGURATION
The KT3170 is designed to accept sinusoidal input waveforms but will operate satisfactorily with any input that
has the correct fundamental frequency. The input arrangement provides a differential input op amp, bias source
(reference voltage VREF) which is used to bias the inputs at mid-rail. Connection of a feedback resistor to the op
amp output (GS) makes gain of op amp adjust. The signal level at the input must be operated in power supply
range on the data sheet. In a single ended configuration, the input pins are connected as shown in application
circuit with unity gain and VREF biasing. In a differential ended configuration the input pins are connected as shown
in Fig. 2 with voltage gain (R5/R1).

IN+

Voo

IN-

SIfGTO

10nF
IN+

01

C1

INGS

GS

ESO

VREF

DSO

10nF

o-l

C2

IC

04

IC

03

OSC1

02

OSC2

01

GND

OE

A5

100K
R2

A3
37.5K

R2
60K

100K

VREF

R3= R2R5/(R2+ A5), VOLTAGE GAIN = R5/R1
INPUT IMPEDANCE: 2.JR1 2 + (1/WC)2

All resistors are 1% tolerance
All capacitors are 5% tolerance

Fig. 1 Single Ended Input Configuration

c8 SAIUISUNG
Electronics

All resistors are 1% tolerance
All capacitors are 5% tolerance

Fig. 2 Differential Ended Input Configuration

222

KT3170

CMOS INTEGRATED CIRCUIT

FILTER SECTION
After analog signal is passed op amp, separation of the low group and high group tones is achieved by applying
the DTMF signal to the inputs of two 9th-order switched capacitor band pass filter, the bandwidths of which
correspond to the low and high group frequencies. The band split filters are actually rejecting all frequencies except
the 16 DTMF tone pairs. The filter section also incorporates notches at 350 and 440Hz for exceptional dial tone
rejection as shown below. Each filter output is followed by a single order switched capacitor section which smoothes
the signals prior to limiting. Limiting is performed by high-gain comparator which are provided with hysteresis to
prevent detection of unwanted low level signals. The outputs of teh comparators provide full-rail logics swing at
the frequencies of the incoming DTMF signals.

•

10~-----------------~------------~------------------------~

m
~

20~--------------~------------~~~----------------------~

z
o

i=

«

:J

z

w
~

30~-------------.------------~~---+------------------------;

«

40r-------------.-------~~~-.------+_--~. .~------------__;

!x !
Y

I I ! It

A

B C

0

, ! !
E

F

G

,

2K

I

H

FREQUENCY (Hz)

PRECISE DIAL TONES
X==350Hz
Y==440Hz

DTMF TONES
A=697Hz
B=770Hz
C=852Hz
D==941Hz

E= 1209Hz
F== 1336Hz
G == 1477Hz
H == 1633Hz

Fig. 3 Typical Filter Characteristics

c8~SUNG

223

KT3170

CMOS INTEGRATED CIRCUIT

DECODER SECTION
Following the filter section is a decoder employing digital counting techniques to determine the frequencies
of the incoming tones and to verify that they correspond to standard DTMF frequencies. A complex averaging
algorithm protects against tone simulation by extraneous signals such as voice while providing tolerance to small
frequency deviations and variations.
The averaging algorithm has been developed to ensure an optimum combination of immunity to "talk-off" and
tolerance to the presence of interfering signals (third tones) and noise. When the detector recognizes the
simultaneous presence of two valid tones (known as "signal condition"), it raises the "Early Steering" flag (ESO).
Any loss of signal condition will cause ESO to fall.

OSCILLATOR SECTION
The KT3170 contains an on chip inverter with sufficient gain a feedback resistor Rf to provide oscillation when
connected to a low cost television "color-burst" crystal. The oscillator circuit is connected as shown in application
circuit. It is possible to operate several KT3170 devices employing only a Single crystal oscillator. The oscillator
output of the first devices in the chain is coupled through a 30pF capacitor to the oscillator input (OSC1) of the
next device, subsequent devices are connected in a simuliar fashion as shown Fig. 4. The problems for unbalanced
loading are not a concern with the arrangement shown, i.e., balancing capacitors are not required.

KT3170

KT3170

OSC1 1 - - - - + - - - - 1 1------fOSC1

CJ 3.579545MHz
OSC2

11:------~I

TO OSC1 of next KT3170

Fig. 4 Oscillator Connection

c8SAMSUNG
Electronics

224

KT3170

CMOS INTEGRATED CIRCUIT

STEERING CIRCUIT
Before registration of a decoded tone pair, the receiver checks for a valid signal duration. This check is performed by an external RC time constant driven by ESO. A logic high on ESO causes Vc (see Fig. 5) to rise as the
capacitor discharges. Providing signal condition is maintained (ESO remains high) for the validation period (tGTP),
VC reaches the threshold (VTST) of the steering logic to register the tone pair, thus latching its corresponding 4bits
code (see Table 1) into the output latch. At this point, the GTO output is activated and drives Vc to Voo. GTO continues to drive high as long as ESO remains high, finally after a short delay to allow the output latch to settle,
the "delayed steering" output flag (STO) goes high, signalling that a received tone pair has been registered. The
contents of the output latch are made available on the 4-bit output bus by raising the three-state control input
(OE) to a logic high. The steering circuit works in reverse to validate the interdigit pause between signals. Thus
as well as rejecting signals too short to be considered valid, the receiver will tolerate signal interruption (drop outs)
too short to be considered a valid pause. This capability, together with the capability of selecting the steering time
cOnstants externally, allows the designer to tailor performance to meet a wide variety of system requirements.
-----1~---VOD

C
tGTA

=RC IN (VVDD
)
TST

tGTP=(RC) IN (v

VOVD
)
DD - TST

Fig. 5 Basic Steering Circuit

DIGITAL OUTPUT
Outputs Q1-Q4 are CMOS push pull when enabled (EO = High) and open circuited (high impedance) when disabled
by pulling EO = Low. These digital outputs provide the hexadecimal code corresponding to the DTMF signals. The
table below describes the hexadecimal.

HIGH

NO

LOW
FREQUENCY

FREQUENCY

1

697

1209

OE

Q4

Q3

Q2

Q1

H

0

0

0

1
0

2

697

1336

H

0

0

1

3

697

1477

H

0

0

1

1

4

770

1209

H

0

1

0

0

5

770

1336

H

0

1

0

1

6

770

1477

H

0

1

1

0

7

852

1209

H

0

1

1

1

8

852

1336

H

1

0

0

0

9

852

1477

H

1

0

0

1

0

941

1336

H

1

0

1

0

*

941

1209

H

1

0

1

1

#

941

1477

H

1

1

0

0

A

697

1633

H

1

1

0

1

B

770

1633

H

1

1

1

0

C

852

1633

H

1

1

1

1

D

941

1633

H

0

0

0

0

ANY

-

-

L

Z

Z

Z

Z

Z: High Impedance
H: High Logic Level
L: Low Logic Level

c8SAMSUNG
Electronics

225

I

KT3170

CMOS INTEGRATED CIRCUIT

GUARD TIME ADJUSTMENT
In a situations which do not require independent selection of receive and pause, the simple steering of Fig. 5
is applicable. Component values are chosen according to the following formula:
tREe = top + tGTP, tGTP = 0.63RC
The value of top is a parameter of the device and tREe is the minimum signal duration to be recognized by thf::!
receiver. A value for C of 0.1J.'F is recommended for most application, leaving R to be selected by the designer.
For example, a suitable value of R for a tREe of 40 miliseconds would be 300K. A typical circuit using this steering
configuration is shown in Figure 1. The timing requirements for most telecommunication application are satisfied
with this circuits. Different steering arrangements may be used to select independently the guard times for tonepresent (tGTP) and tone-absent (tGTA). This may be necessary to meet system specifications which place both tone
duration and interdigit pause. Guard time adjustment also allows the designer to tailor system parameter such
as talk-off and noise immunity. Increasing tREe improves talk-off performance since it reduces the probability that
tones simulated by speech will maintain signal condition for long enough to be registered. On the other hand,
a relatively short tREe with a long too would be appropriate for extremely noisy environments where fast acquisition
time and immunity to drop-outs would be requirements. DeSign information for guard time adjustments is shown
in Figure 6.

0....-------,1

vooO>--------l' c

SI/GTO

0-----_---.

SIiGTOn-------~

R1~

R1
R2
ESO

0---------'

tGTP =(R1C)ln(VooiVoo - VTST)
tGTA = (RpC)ln(VooiVTST)
Rp = R1 R2/(R1 + R2)
(a) Decreasing tGTA(tGTP>tGTA)

ESO

cr------1-

R2

tGTP =(RpC)ln(VoolVoo - VTST)
tGTA =(R1 C)I n(VooiVTST)
Rp = R1R2/(R1 + R2)
(a) Decreasing tGTP(tGTP

a.

1001 0000

~

1OO00000}
0
-...J

~

0000 0000

ao

0001 0000
00100000
00110000
0100 0000

j

,.,.'

0101 0000
01100000

-

01110000

~

01111111

. /~

~

o

-VREF

-2-

+VREF

-2-

+VREF

ANALOG INPUT (VOLTS)

Fig. 8

D/A CONVERTER ~·Law Decoder) TRANSFER CHARACTERISTIC

-.... r-......

0111 1111
0111 0000

""""'" ~

01100000

~

01010000
01000000

,

\..

0011 0000
00100000
00010000
0000 0000\

10000000f
10010000
10100000
1011 0000

,

1100 0000

\.

1101 0000
11100000

"' -r--..
........

11110000
1111 1111
- VREF

-VREF

t--- 0.-

+ VREF

2

2
ANALOG OUTPUT (VOLTS)

Fig. 9

c8~SUNG

236

KT5116

CMOS INTEGRATED CIRCUIT

64KHz OPERATION, TRANSMITTER SECTION TIMING
t---------------125I'sec

--------------1

XMIT SYNC
1 MASTER
CLOCK
PERIOD
(MIN)

•

PCM DATA PRESENT

Fig. 10
Note: All rise and fail times are measured from O.4V and 2.4V. All delay times are measured from 1.4V.

64KHz OPERATION, RECEIVER SECTION TIMING
125I'sec------------~--;

JRCVSYNC

17 MASTER

-i

CLOCK
PERIODS
(MIN)

tRDS

~

tRDH

•

~O'V'Jit.Q'V\fi},QI\f\l0QfiflY'.{;Jtl'N0.QWI\Qw:A{;;;~lWv.Q1
11iit::J~tfi1:jEJVi:ti ~{iiJ ~ViJj ~~ ~'i:iiiEJ~ ~v:tli EJ \
Fig. 11
Note: All rise and fail times are measured from O.4V and 2.4V. All delay times are measured from 1.4V.

PCM SYSTEM BLOCK DIAGRAM
r-----------

KT5116

I
I

I
I

GAIN ADJUST

I

~'II

8

BAND
PASS
FILTER

TRANSMITTER

DIGITAL
MUX

(AID)

!

13
LOW
PASS
FILTER

RECEIVER

(D/A)

12
DIGITAL
DEMUX
TO
{
OTHER
CHANNELS

c8SAMSUNG
Electronics

DIGITAL
TRUNK

FROM
{
OTHER
CHANNELS

DIGITAL
TRUNK

237

KT5116

CMOS INTEGRATED CIRCUIT

SYSTEM CHARACTERISTICS TEST CONFIGURATION

r------------,
I
I
1.004KHz
SIGNAL
SOURCE

I
I

I

I

SYSTEM

I

I

IL _ _ _ _ _ _ _ _ _ _ _ . ,

NOUT

HP3551A

I
I
. I

1.004KHz
NOTCH
FILTER

I

FILTER

I

L _________________ ____ I
~

~

SOUT+NoUT

Fig. 12
Note: The ideal decoder consists of a digital decomponder and a 13-bit precision DAC.

PERFORMANCE EVALUATION
The equipment connections shown in Figure 12 can be used to evaluate the performance of the KT5116.
An analog signal provided by the HP3551 a transmission test set is connected to the Analog Input (Pin 1) of the
KT5116. The Digital Output of the CODEC is tied back to the Digital Input and the Analog Output is fed through
a low-pass filter to the HP3551A.
Remaining pins of the KT5116 are connected as follows:
1. RCV SYNC is tied to XMIT SYNC.
2. XMIT CLOCK is tied to Master CLOCK. The signal is inverted and tied to RCV clock.
The following timing signals are required:
1. Master CLOCK=2.048MHz
2. XMIT SYNC repetition rate=8KHz
3. XMIT SYNC width=8 XMIT CLOCK periods.
when all the above requirements are met, the set-up of Figure 12 permits the measurement of synchronous system
performance over a wide range of Analog Inputs.
The data register and' ideal decoder provide a means of checking the encoder portion of the KT5116 independently
of the decoder section. To test the system in the asynchronous mode, Master CLOCK should be separated from
RCV CLOCK. XM IT CLOCK and RCV CLOCK are separated also.
.

c8SAMSUNG
Electronics

238

CMOS INTEGRATED CIRCUIT

KT5116,

ANALOG INPUT

DEMO SET CIRCUIT'DIAGRAM

ANALOG OUTPUT

2.048MHz

,-----ID~-~
R6

11

•
5V

2K!l±1%

• Power Supply Ripple Rejection
C7

C6

C5

C4

+ 5V o"---1Ir--I~-I~-I~o-.o-5j.1-F-x-4----'1.o5j.1F
C3
GNDDo---~~~~~~~

GNDAQ-----------------+---------+-----.
-5VQ-----------------+-------~

NOTE: All unused input connected to GNDD or Vee, only in HCT series.

c8SAMSUNG
Electronics

239

KT8520/KT8521

CMOS INTEGRATED CIRCUIT

MONOLITHIC CODECS
The devices are monolithic PCM COOECs implemented
with high reliability CMOS technology. The KT8520 is
intended for wlaw applications and the KT8521 is
intended for A-law applications.
Integrated into the COOECs are circuits for signaling
interface, PCM time-slot control logic, analog-to-digital
(AID) conversion, and digital-to-analog (O/A) conversion.
The devices are intended to be used with. the KT3040
monolithic PCM filter which provides the input antialiasing function for the encoder and smoothes the
output of the decoder and corrects for the sinx/x
distortion introduced by the decoder sample and hold
output.

FEATURES
• Low power consumption: 45 mW (operation)
1 mW (standby)
• ± 5V power supplies.
• TTL compatible digital inputs and outputs
• Optional programmable time slot selection
• Internal sample and hold capacitors, auto zero
circuit
• KT8520: wlaw, 24 DIP
• KT8521: A·law, 22 DIP
• Synchronous or asynchronous operation

ORDERING INFORMATION
Device
KT8520N

Package

Operating Temperature

Plastic

KT8521N

Plastic

KT8520J

Ceramic

KT8521J

Ceramic

- 25 - + 125°C

BLOCK DIAGRAM
VFX---J~~~~----------I
SC2 t - - - - - - '

SAMPLE & HOLD

SUCCESSIVE
APPROXIMATION
REGISTER

DX
SC1

CLKx
CLKR
FSx
- FSR
- SIGx (KT8520 ONLY)
t-----t-_ghGR (KT8520 ONLY)
CLKc
PDN

c8SAMSUNG
Electronics

240

KT8520/KT8521

CMOS INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

Value

Unit

Vee
V BB
Any Analog Input or Output
Any Digital Input or Output
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 secs)

Vee
V BB
Analog 1/0
Digital flO
Ta
Tstg
TL

7
-7
VBB - 0.3 to Vee + 0.3
GND - 0.3 to Vee + 0.3
-25 -+125
-65 - + 150
300

V
V
V
V
°C
°C
°C

DC ELECTRICAL CHARACTERISTICS
(Unless otherwise noted, Vee = 5.0V ± 5%, VBB = - 5.0V ± 5%, Ta = O°C to 70°C, typical characteristics specified
at Vee=5.0V, V BB = -5.0V, Ta=25°C. All signals referenced to GND.)
Characteristic

Symbol

Test Condition

Min

Typ

Max

Unit

POWER DISSIPATION

Operating Current, Vee

lee1

4.5

8.0

mA

Operating Current, Vss

Iss1

4.5

8.0

mA

Standby Current, Vee

Iceo

0.1

0.4

mA

Standby Current, VSB

ISBo

0.03

0.1

mA

10

p.A

0.6

V

DIGITAL INTERFACE

Input Current

h

O

-5V

III
III

>

«
z

o

(!l

Fig. 1

ABSOLUTE MAXIMUM RATINGS
Characteristic.

Symbol

Value

Unit

Vee to GNDA
VBB to GNDA
Voltage at Any Analog Input or Output
Voltage at Any Digital Input or Output
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 secs)

Vee

7
-7
V ee +0.3 to GNDA-0.3

V
V
V
V

-25 to + 125
-65 to + 150
300

°C
°C
°C

c8SAMSUNG
Electronics

VBB
A I/O
0110
Ta
Tstg
TL

Vee + 0.3 to VBB - 0.3

250

KT8554/KT8557

CMOS INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS
(Unless otherwise noted, Vee=5.0V±5%, VBB= -5.0V±5%, GNDA=OV, Ta=O°C to 70°C; typical characteristics
specified at Vee=5.0V, VBB = -5.0V, Ta=25°C; all signals referenced to GNDA.)
Characteristic

Symbol

Test Condition

Min

Typ

Max

Unit

Power Dissipation

Power-Down Current

leeO

No Load

0.5

1.5

mA

Power-Down Current

IBBO

No Load

0.05

0.3

mA

Active Current

lee1

No Load

6.0

9.0

mA

IBB1

No Load

6.0

9.0

mA

0.6

V

10

p.A

10

p.A

0.4
0.4
0.4

V
V
V

Active Current
Digital Interface

Input Low Voltage

VIL

Input High Voltage

VIH

Input Low Current

IlL

GNDA~VIN~VIL' all digital inputs

-10

Input High Current

IIH

VIH~VIN~Vee

-10

2.2

Output Low Voltage

VOL

Ox, k=3.2mA
SIG R, IL= 1.0mA
TS x, IL = 3.2mA, open drain

Output High Voltage

V OH

Dx, IH = - 3.2mA
SIG R, IH = - 1.0mA

2.4
2.4

Ox, GNDA~Vo~Vee

-10

Output Current in High Impedance
State (TRI-STATE)

loz

V

V
V
10

p.A

Analog Interface with Receive Filter

Output Resistance

RoRF

Pin VFRO

Load Resistance

RLRF

VFRO= ±2.5V

Load Capacitance
Output DC Offset Voltage

1

0
0

500

pF

-200

200

mV

200

CLRF
VOSRO

3

600

Analog Interface with Transmit Input Amplifier

Input Leakage Current

"XA

- 2.5V ~V ~ + 2.5V, VFxl + or VFxl-

-200

Input Resistance

RIXA

- 2.5V ~V ~ + 2.5V, VFxl + or VFxl-

10

Output Resistance

RoXA

Closed loop, unity gain

Load Resistance

RLXA

GSx

Load Capac itance

CLXA

GSx

VoXA

GSx,

Voltage Gain

AvXA

VFxl +to GSx

Unity Gain Bandwidth

FuXA

Offset Voltage

VosXA

Common-Mode Voltage

VeMXA

1

3

10

Output Dynamic Range

±2.8

CMRRXA>60dB

pF
V

VIV

5,000
1

0
KO

50
RL~ 10KO

nA
MO

2

MHz

-20

20

-2.5

2.5

mV

V

Common-Mode Rejection Ratio

CMRRXA

DC Test

60

dB

Power Supply Rejection Ratio

PSRRXA

DC Test

60

dB

c8SAMSUNG
Electronics

251

•

CMOS INTEGRATED CIRCUIT

KT8554/KT8557

TIMING CHARACTERISTICS
(Unless otherwise noted, Vee=5.0V±5%, VBB = -5.0V±5%, GNDA=OV, Ta=O°C to 70°C; typical characteristics
specified at Vee = 5.0V, VBB= -5.0V, Ta=25°C; all signals referenced to GNDA.)

Characteristic
Frequency of Master Clocks

Symbol

Test Condition

1/tPM

Depends on the device used and the
BClKR/ClKSEl Pin.
MClKx and MClKR

Min

Typ

Max

1.536
1.544
2.048

Unit
MHz
MHz
MHz

Rise Time of Bit Clock

tRB

tpB = 488ns

50

ns

Fall Time of Bit Clock

tFB

tpB =488ns

50

ns

Holding Time from Bit Clock
low to Frame Sync

tHBFL

long frame only

0

ns

Holding Time from Bit Clock
High to Frame Sync

tHOLO

Short frame only

0

ns

Set-Up Time from Frame Sync
to Bit Clock low

tSFB

long frame only

80

ns

Delay Time from BClKx High
to Data Valid

tOBo

load = 150pF plus 2 lSTTl loads

Delay Time to TSx low

hop

load = 150pF plus 2 lSTIl loads

Delay Time from BClKx low to
Data Output Disabled

toze

Delay Time to Valid Data from
FS x or BClKx, Whichever
Comes later

tOZF

Set-Up Time from DR Valid to
BClKR/x low

tSDB

50

ns

Hold Time from BClKR/x low to
DR Invalid

tHBo

50

ns

Delay Time from BClKR/x low
to SIG R Valid

tOFSSG

Set-Up Time from FSXlR to
BClKXlR low

tSF

CL=OpF to 150pF

180

ns

140

ns

50

165

ns

20

165

ns

0

load = 50pF plus 2 lSTIl loads

300

ns

Short frame sync pulse (1 or 2 bit
clock periods long) (Note 1)

50

ns
ns

Width of Master Clock High

tWMH

MClK x and MClKR

160

Width of Master Clock low

tWML

MClKx and MClKR

160

Rise Time of Master'Clock

tRM

MClKx and MClKR

50

ns

Fall Time of Master Clock

tFM

MClKx and MClKR

50

ns

Set-Up Time from BClKx High
(and FSx In long Frame Sync
Mode) to MClKx Falling Edge

tSBFM

Period of Bit Clock

ns

First bit clock after the leading
edge of FS x

tpB

485

488

15,725

ns

Width of Bit Clock High

tWBH

VIH=2.2V

160

ns

Width of Bit Clock low

tWBL

V1L =0.6V

160

ns

=82!'1SUNG

252

CMOS INTEGRATED CIRCUIT

KT8554/KT8557
TIMING CHARACTERISTICS
Characteristic

(Continued)

Symbol

Test Condition

Min

Typ

Max

Unit

Hold Tir:ne from BCLKXlR Low
to FS XlR Low

tHF

Short frame sync pulse (1 or 2 bit
clock periods long) (Note 1)

100

ns

Hold Time from 3rd Period of
Bit Clock Low to Frame Sync
(FS x or FS R)

tHBFI

Long frame sync pulse (from 3 to
8 bit clock periods long)

100

ns

Minimum Width of the Frame
Sync Pulse (Low Level)

tWFL

64K bitls operating mode

160

ns

•

Note 1: For short frame sync timing, FS x and FS R must go high while their respective bit clocks are high.

TIMING DIAGRAM
TSx - - - - - - - - h

MCLKR
MCLKx

BCLKX

FSX _ _ _ _-...,;T

DX-----------~

FSR _ _ _ _ _ _-"

Fig. 2. Short Frame Sync Timing

qsSAMSUNG
Electronics

253

CMOS INTEGRATED CIRCUIT

KT8554/KT8557
TIMING DIAGRAM

FSx

SIGx

(Continued)

------'\/\I\/\/'\I\,I\/\I\I\I\/\I\/\)

Dx-----------N

Fig. 3 Long Frame Sync Timing

c8SAMSUNG
Electronics

254

KT8554/KT8557

CMOS INTEGRATED CIRCUIT

TRANSMISSION CHARACTERISTICS
(Unless otherwise specified: Ta = O°C to 70°C, Vee = 5V ± 5%, Vee = - 5V ± 5%, GNDA = OV, f = 1.02KHz,
V1N = OdBmO, transmit input amplifier connected for unity-gain non-inverting.)
Characteristic

Symbol

Test Condition

Max

Unit

-0.15

0.15

dB

-0.15
-0.35
-0.7

0.15
0.05
0
-14

dB
dB
dB
dB

Min

Typ

Amplitude Response

Receive Gain, Absolute

GRA

Receive Gain, Relative to GRA

GRR

Absolute Receive Gain Variation
with Temperature
Absolute Receive Gain Variation
with Supply Voltage

Ta=25°C, Vcc =5V, Vss = -5V
Input = Digital code sequence for
OdBmO signal at 1020Hz
f = OHz to 3000Hz
f=3300Hz
f=3400Hz
f=4000Hz

GRAT

Ta= O°C to 70°C

±0.1

dB

GRAV

Vcc =5V±5%, Ves= -5V±5%

±0.05

dB

Receive Gain Variations with
Level

GRRL

Sinusoidal test method; reference
input PCM code corresponds to an
Ideally encoded - 10dBmO signal
PCM level = - 40dBmO to + 3dBmO
PCM level = - 50dBmO to - 40dBmO
PCM level = - 55dBmO to - 50dBmO

Receive Output Drive Level

VRO

0.2
0.4
1.2
2.5

dB
dB
dB
V

Absolute Levels

AL

Max Overload Level
Transmit Gain, Absolute

Transmit Gain, Relative to GXA

Absolute Transmit Gain Variation
with Temperature
Absolute Transmit Gain Variation
with Supply Voltage
Transmit Gain Variations with
Level

tMAX
GXA

GXR

RL=6000
Nominal OdBmO level is 4dBm (6000)
OdBmO
Max overload level (3.17dBmO): KT8554
Max overload level (3.14dBmO): KT8557
Ta=25°C, Vcc =5V, Ves = -5V
Input at GSx = OdBmO at 1020Hz
f=16Hz
f=50Hz
f=60Hz
f=200Hz
f = 300Hz - 3000Hz
f=3300Hz
f=3400Hz
f=4000Hz
f = 4600Hz and up, measure
response from OHz to 4000Hz

-0.2
-0.4
-1.2
-2.5

-0.15

-1.8
-0.15
-0.35
-0.7

1.2276

Vrms

2.501

VPK
0.15

dB

-40
-30
-26
-0.1
0.15
0.05
0
-14
-32

dB
dB
dB
dB
dB
dB
dB
dB
dB

GXAT

Ta=O°C to 70°C

±0.1

dB

GXAV

Vcc =5V±5%, Ves= -5V±5%

±0.05

dB

GXRL

Sinusoidal
Reference
VFxl + = VFxl + = VFxl + = -

0.2
0.4
1.2

dB
dB
dB

c8SAMSUNG
Electronics

test method
level = -10dBmO
40dBmO to + 3dBmO
50dBmO to - 40dBmO
55dBmO to - 50dBmO

-0.2
-0.4
-1.2

255

•

CMOS INTEGRATED CIRCUIT

KT8554/KT8557

TRANSMISSION CHARACTERISTICS
Characteristic

(Continued)

Symbol

Test Condition

Min

Typ

Max

Unit

180

200

p's

-40
-30

-25
-20
70
100
145

90
125
175

p's
p's
p's
p's
p's

290

315

p's

195
. 120
50
20
55
80
130

220
145
75
40
75
105
155

p's
p's
p's
p's
p's
p's
p's

8

11

dBrncO

-82

-79

dBmOp

Envelope Delay Distortion with Frequency

Receive Delay, Absolute

DRA

f= 1600Hz

Receive Delay, Relative to DRA

DRR

f=500Hz-1000Hz
f = 1000Hz -1600Hz
f = 1600Hz - 2600Hz
f = 2600Hz - 2800Hz
f = 2800Hz - 3000Hz

Transmit Delay, Absolute

DXA

f = 1600Hz

DXR

f = 500H z - 600Hz
f = 600Hz - 800Hz
f = 800Hz - 1000Hz
f= 1000Hz-1600Hz
f = 1600Hz - 2600Hz
f = 2600Hz -:.2800Hz
f = 2800Hz - 3000Hz

NRC

PCM code equals alternating
positive and negative zero, KT8554

Receive Noise, P Message
Weighted

Npp

PCM code equals, positive zero,
KT8557

Transmit Noise, C Message
Weighted

Nxc

KT8554

12

15

dBrncO

Transmit Noise, P Message
Weighted

Nxp

KT8557

-74

-67

dBmOp

Noise, Single Frequency

N Rs

f = OKHz to 100KHz, loop around
measurement, VFxl + = OV rms

-53

dBmO

Transmit Delay, Relative to DXA

Noise

Receive Noise, C Message
Weighted

Positive Power Supply Rejection,
Transmit

VFxl + =OV rms ,
PPSR x Vcc = 5.0V oc + 100mV rms
f = OKHz- 50KHz

40

dBC

Negative Power Supply Rejection,
Transmit

VFxl + = OV rms ,
NPSRx V BB = - 5.0V oc + 100mV rms
f = OKHz - 50KHz

40

dBC

Positive Power Supply Rejection,
Receive

PCM code equals positive zero
Vcc = 5.0Voc + 100mV rms
PPSR R f = OHz - 4000Hz
f = 4KHz - 25KHz
f = 25KHz - 50KHz

40
40
36

dBC
dB
dB

Negative Power Supply Rejection,
Receive

PCM code equals positive zero
VBB = - 5.0V oc + 100mVrms
NPSRR f = OHz - 4000Hz
f = 4KHz - 25KHz
f = 25KHz - 50KHz

40
40
36

dBC
dB
dB

c8~SUNG

256

CMOS INTEGRATED CIRCUIT

KT8554/KT8557

TRANSMISSION CHARACTERISTICS
Characteristic

(Continued)

Symbol

Test Condition

SOS

Loop around measurement, OdBmO,
300Hz - 3400Hz input applied to
VFxl +, Measure individual image
signals at VFRO
4600Hz - 7600Hz
7600Hz - 8400Hz
8400Hz - 100,OOOHz

Spurious Out-ot-Band Signals
at the Channel Output

Min

Typ

Max

-32
, -40
-32

I

Unit

dB
dB
dB

Distortion
Signal to Total Distortion

STD x

Sinusoidal test method

Transmit or Receive
Half-Channel

STD R

Level = 3.0dBmO
= OdBmO to 30dBmO
= - 40dBmO XMT
RCV
= - 55dBmO XMT
RCV

Single Frequency Distortion,
Transmit

SFDx

-46

dB

Single Frequency Distortion,
Receive

SFD R

-46

dB

Intermodulation Distortion

IMD

Loop around measurement,
VF x + = -4dBmO to -21dBmO, two
frequencies in the range
300Hz - 3400Hz

-41

dB

Transmit to Receive Crosstalk,
OdBmO Transmit Level

CTX.R

f = 300Hz - 3400Hz
DR = Steady PCM code

-90

-75

dB

Receive to Transmit Crosstalk,
OdBmO Receive Level

CT R.x

f = 300Hz - 3400Hz, VFxl = OV

-90

-70
(Note 1)

dB

33
36
29
30
14
15

dBC
dBC
dBC
dBC
dBC
dBC

Crosstalk

Note 1. CT R.X is measured with a - 40dBmO activating signal applied at VFxl

+

ENCODING FORMAT AT Dx OUTPUT
wLaw KT8554

A·Law KT8557

10000000

10101010

VIN (at GSx)=OV

11111111
01111111

11010101
01010101

VIN (at GSx) = - Full - Scale

00000000

00101010

VIN (at GSx) =

+ Full - Scale

c8SAMSUNG
Electronics

257

I

KT8554/KT8557

CMOS INTEGRATED CIRCUIT

PIN DESCRIPTION
Pin No.

Symbol

Description
Negative power supply. Vss

= - 5V ± 5%.

1

Vss

2

GNDA

Analog ground. All signals are referenced to this pin.

3

VFAO

Analog output of the receive filter.

4

Vee

Positive power supply. Vee = + 5V ± 5%.

5

FS A

Receive frame sync pulse which enables BClK A to shift PCM data
into OA. FS A is an BKHz pulse train.

6

OA

Receive data input. PCM data is shifted into OA following the FS A
leading edge.

?

BClKAI
ClKSEl

The bit clock which shifts data into OA after the FSR leading edge.
Many vary from 64KHz to 2.04BMHz. Alternatively, may be a logic
input which selects either 1.536MHzl1.544MHz or 2.04BMHz for
master clock in synchronous mode and BClKx is used for both
transmit and receive directions.

B

MClKAI
PDN

Receive master clock. Must be 1.536MHz, 1.544MHz or 2.04BMHz.
May be asynchronous with MClKx, but should be synchronous with
MClKx for best performance. When MClKA is connected continously
low, MClK A is selected for all internal timing. When MClKA is
connected continuously high the device is powered down.

9

MCLKx

Transmit master clock. Must be 1.536MHz, 1.544MHz or 2.04BMHz.
May be asynchronous with MClK A.

10

BClKx

The bit clock which shifts out the PCM data on Ox. May vary from
64KHz to 2.04BMHz, but must be synchronous with MClKx.

11

Ox

The TRI·STATE PCM data output which is enabled by FS x.

12

FS x

Transmit frame sync pulse input which enables BClKx to shift
out the PCM data on Ox. FS x is an BKHz pulse train.

13

TS x

Open drain ouptut which pulses low during the encoder time slot.

GSx

Analog output of the transmit input amplifier.
Used to externally set again.

14
15

VFXI -

Inverting input of the transmit input amplifier.

16

VFXI +

Non·inverting input of the transmit input amplifier.

PIN CONNECTION
VBS

VFx l +

1

VFxlGSx

KT85541
KT855?
DA

6

BelKAI
ClKSEl
MClKAI

7

TSx

FSx

BClKx

PDN

c8SAMSUNG
Electronics

258

KT8554/KT8557

CMOS INTEGRATED CIRCUIT

APPLICATION CIRCUITS

Vee

VFxl+

GNDA

VFx l -

Vaa

-5V

KT85541

FROM SliC

GSx

ANALOG
PART

TO SliC

-FROM TSAC·

KT8557

VFRO

-

---

---------FSx

FSR

______ 1
FROM TSAC

DR

Dx

•

I
DIGITAL
PART

5V OR GNDA
PDN

BCLKR/CLKSEL

BCLKx

MCLKR/PDN

MCLKx

Note: XMIT

.

R1 + R2

galn=20xlog(~),

BCLKx (2.048MHzl1.544MHz)

(R1 +R2»10KO.

Fig. 4

c8SAMSUNG
Electronics

259

KT8555

CMOS INTEGRATED CIRCUIT

20 CERDIP

TIME SLOT ASSIGNMENT CIRCUIT
(TSAC)
The KT8555 is a per channel Time Slot Assignment Circuit (TSAC) that produces a-bit receive and transmit time
slots for 4 COMBO CODEC/Filters.
Each frame synchronization pulse may be independently
assigned to a time slot in a frame of up to 64 time slots.

FEATURES
•
•
•
•
•
•
•
•

Single, 5V operation
Low power consumption: 5mW
Controls 4 COMBO CODEC/Filters
Independent transmit and receive frame syncs and
enables
8 channel unidirectional mode
Up to 64 time slots per frame
Compatible with KT855417, KT856417, KT8520/1
CODECs
TTL and CMOS compatible

ORDERING INFORMATION
Device

Package

KT8555N

20 Plastic DIP

KT8555J

20 Ceramic DIP

Operating Temperature

-20 - +125°C

PIN CONFIGURATION

KT8555

c8SAMSUNG
Electronics

260

CMOS INTEGRATED CIRCUIT

KT8555

PIN DESCRIPTION
Pin

Name

Function

3
1
18
16

FSxO
FS x1
FS x2
FS x3

A frame sync output which is normally low, and goes active-high for 8 cycles of
BClK when a valid transmit time slot assignment is made.

4

2
19
17

FSRO
FS R1
FSR2
FS R3

A frame sync output which is normally low, and goes active-high for 8 cycles of
BClK when a valid receive time slot assignment is made.

5

TS x

This pin pulls low during any active transmit time slot. (N-channel open drain)

6

De

The input for an 8 bit serial control word. X is the first bit clocked in.

7

ClKe

8

CS

9

MODE

•

The clock input for the control interface.
The active-low chip select for the control interface.
Mode 1 = Open or Vee
Mode 2=Gnd

10

GND

Ground

11

BClK

The bit clock input
The transmit TSO sync pulse input. Must be synchronous with BClK.

12

XSYC

13

RSYdCH2

14

CH1

The input for the NSB (next significant bit) of the channel select word.

15

CHO

The input for the lSB (last significant bit) of the channel select word,
which defines the frame sync output affected by the following control word.

20

Vee

Power supply pin. 5V ± 5%

This input function is determined by the MODE input (Pin 9).
In mode 1 this input is the receive TSO sync pulse, RSYe, which must be
synchronous with BClK. In mode 2 this is the CH2 input for the MSB of the
channel select word.

c8SAMSUNG
Electronics

261

CMOS INTEGRATED CIRCUIT

KT8555

BLOCK DIAGRAM
Vee

p-----------------------------------~20~------------------------------~

6--------------------~~--------~

Receive
Assignment
Registers (4)

Time
Slot
Comparators

Receive
Output
Drivers

CHO
&

CH1

Control

RSYe/CH2

Control
Register

FSXO

Transmit
Assignment
6 , - - - - - - 1 Registers (4)

FSX2
FSx3

~------------------------------~10~--------------------------~
GND

ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

Value

Unit

Vee to GND
Any Input Voltage
Any Output Voltage
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 secs)

Vee
VI
Vo
Ta
Tstg
TL

7.0
Vee + 0.3 - - 0.3
Vee +0.3 --0.3
-25-125
-65-150
300

V
V
V
°C
°C
°C

c8SAMSUNG
Electronics

262

CMOS INTEGRATED CIRCUIT

KT8555
ELECTRICAL CHARACTERISTICS
Characteristic

(Unless otherwise noted; Vcc=5.0V±5%, Ta=0°C-70°C)

Symbol

Test Condition

Operating Current

Icc

BCLK = 4.096MHz, All outputs open

Input Voltage High

VIH

Input Voltage Low

VIL

Min

1

111

All Inputs Except Mode, V IL 

o
a:
o

-5V
0.1
OV

-

I);

co
....

CLKSEL ::.::

DR

~

TSx r - -

-

FSx r - - -

-

Ox

-

MCLKx~

BCLKx
PDN

O~

~

Vee

VFxl+

GNDA
Vee

!i
.."
.."

VFRO

rr-

FSx f - - Ox

FSR

r-- DR

I);

~x
TSx

co

t-

CLKSEL ::.:::
~

r--

VFx l - I - -

MCLKx

~
~
-

r---

r-

BCLKx H
PDN

VFxl+ I---

Vee

VFx l -

GNDA
Vee

VFRO

!i
.."
.."

t-

r--

r----

FSx

r--- r---

Ox

FSR

MCLKx

r--

DR

~

PON

K>

RCV
DATA

o

K;J 1-

XMT
DATA

~
~

GSx

co

CLKSEL ::.:::

-

f--

TSx

r-

BCLKx I-<~

Vee
GNDA
Vee

VFxl+

r--

VFxl-

I--

GSx

r--

!i

.."
.."

-

FSx ! - - Ox

FSR

II

<0
C\I

TSx f - -

co
VFRO
ICLKSEL ~
,--- DR

,...

MCLKx

r---

I

r-

BCLKx H
PDN

1

K>

CLK

-

:E

.."
.."

FSR
r--

Z

o

VFRO

~

r--

GSx ' - -

!i

-

i

en

Vee

+5V

w

VFxl+ I--VFx l -

GNDA

0.1*

c

C!J
W
t-

Vee

=i=

L-

r-

0
CD

OTHER

L- COMBOs

20K

"' ...

'Eca

TO

CD
C

:::;

5V

(I)

~

r--

..

e

L

2K

........
,

0

c

.c
u
c
en>-

5V
r--

~

FSx1

Vee

FSR1

FSR2

FSxO

il
FROM OTHER TSACs

FROM§

CONTROLLER

~

.."
.."
.."

TSx
DC

t::.:::

CLKe
CS
MODE

it)
it)
it)

~

XMT
SYN
RCV
SYN
CH1
SEL
CHO
SELE

---

K>
K>

~ GND

'ii
.~

Q.

~
ca

c
0

FSx2

FSRO

-

;t01

5V

co

(I)

FSR3

I

U
CD

FSx3

C
C

CHO

CH1 r - - RSYC/CH2 >--XSYC
BCLK

c
.2

n

I

0

~

CD

~

S

·61

C
C")

dl

~

"
en
11
2

::)

cn~

qp

KT8564/KT8567

CMOS INTEGRATED CIRCUIT

COMBO CODECS
The KT8564 and KT8567 are single-chip PCM encoders
and decoders (PCM COOECs), PCM line filter and
receive power amp.
These devices provide all the functions required to interface a full-duplex voice telephone circuit with a timedivision-multiplexed (TOM) system.
These devices are designed to perform the transmit enI coding and decoding as well as the transmit and receive
filtering functions in PCM system.
They are intended to be used at the analog termination
of a PCM line or trunk.
These devices provide the bandpass filtering of the analog signals prior to encoding and after decoding. These
combination devices perform the encoding and decoding of voice and call progress tones as well as the signalling and supervision information.

20 CERDIP

FEATURES
• Complete CODEC and filtering system
• Meets or exceeds 03/04 and CCITT specifications.
,....Law: KT8564 A·Law: KT8567
• On·chip auto zero, sample and hold and precision
voltage references.
• Receive push· pull power amplifiers
• Low power dissipation: 70mW (operating)
3mW (standby)
• ± 5V operation
• TTL or CMOS compatible
• Automatic power down

ORDERING INFORMATION
Device
KT8564N

Package

Operating Temperature

Plastic

KT8567N

Plastic

KT8564J

Ceramic

KT8567J

Ceramic

-25 -

+ 125°C

TYPICAL I-V CHARACTERISTICS

c8SAMSUNG
Electronics

268

CMOS INTEGRATED CIRCUIT

KT8564/KT8567
ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

Value

Unit

V

Vee to GNDA

Vee

7

Vee to GNDA

Vee

-7

V

Voltage at Any Analog Input or Output

110

Vee + 0.3 to Vee - 0.3

V

Voltage at Any Digital Input or Output

I/O

Vee +0.3 to GNDA-0.3

V

Operating Temperature Range

Ta

-25-+ 125

°C

Storage Temperature Range

Ts1g

-65-+150

°C

Lead Temperature (Soldering 10 secs)

Tl

300

°C

I

ELECTRICAL CHARACTERISTICS

=

(Unless otherwise noted: Vee 5.0V ± 5%, Vee = - 5V ± 5%, GNDA = OV, Ta = O°C to 70°C; typical characteristics
specified at Vee 5.0V, Ta 25°C; all signals are referenced to GNDA)

=

=

Characteristic

Symbol

Test Condition

Min

Typ

Max

Unit

Power Dissipation

Active Current

led1

Power amplifiers active, VPI = OV

7.0

10.0

mA

Active Current

lee 1

Power amplifiers active, VPI = OV

7.0

10.0

mA

Power-Down Current

leeo

0.5

1.5

mA

Power-Down Current

leeo

0.05

0.3

mA

Digital Interface

Itl

GNDA~V'N~V'l'

-10

10

p.A

Input High Current

I'H

V'H~V'N~Vee

-10

10

p.A

Output Current in High
Impedance State (TRI-STATE)

loz

Dx, GNDAsVoSVcc

-10

10

p.A

0.6

V

Input Low Current

Input Low Voltage

V'l

Input High Voltage

V'H

All digital inputs

2.2

Output Low Voltage

VOL

Dx, Il = 3.2mA
SIG R, k= 1.0mA
TS x, k = 3.2mA, Open Drain

Output High Voltage

VOH

Dx, IH = - 3.2mA
SIG R, IH = - 1.0mA

V
0.4
0.4
0.4

2.4
2.4

V

V

Analog Interface with Transmit Input Amplifier

I,XA

- 2.SV ~V ~ + 2.SV, VFxl + or VFxl -

-200

Input Resistance

R,XA

- 2.SV ~V ~ + 2.SV, VFxl + or VFxl-

10

Output Resistance

Input Leakage Current
1--

RoXA

Closed loop, unity gain

Load Resistance

RLXA

GSx

Load CapaCitance

CLXA

GSx

Output Dynamic Range

VoXA

GSx,

c82!'1SUNG

200

1

3

0

50

pF

10
RL~ 10KO

±2.8

nA
MO

KO

V

269

CMOS INTEGRATED CIRCUIT

KT8564/KT8567
ELECTRICAL CHARACTERISTICS
Characteristic

(Continued)
Test Conditions

Symbol

Voltage Gain

AvXA

Unity-Gain Bandwidth

FuXA

Offset Voltage

VosXA

Common-Mode Voltage

VeMXA

VFxl + to GSx

Min

Max

5000
1

CMRRXA>60dB

Typ

Unit
VIV

2

MHz

-20

20

mV

-2.5

2.5

V

Common-Mode Rejection Ratio CMRRXA DC Test

60

dB

PSRRXA DC Test

60

dB

Power Supply Rejection Ratio

Analog Interface with Receive Filter

Output Resistance
Output DC Offset Voltage
Load Resistance
Load Capacitance

1---

RoRF
VOSRO

1

Pin VFRO
Measure from VFRO to GND A

RLRF

VFRO= ±2.5V

CLRF

Connect from VFRO to GND A

-200

3

0

200

mV

10

KO
25

pF

Analog Interface with Power Amplifiers

IPI

Input Leakage Current
Input Resistance

RIPI

Input Offset Voltage

Vlos

Output Resistance

ROP

Unity-Gain Bandwidth

Fe

---

-1.0V ~VPI~1.0V ~VPI~1.0V
-1.0V~VPI~1.0V

Gain from VPO - to VPO +
Power Supply Rejection of
Vee or VBB

CLP
GA p+

100

10

RL = 6000
RL = 3000

25
1

Open loop (VPO - )

KHz
100
500
1000

GNDA

mV

0

400

VPO+ or
VPO- to

RL=3000 VPO+ to GNDAlevel at
VPO- = -1.77Vrms (+3dBmo)

nA
MO

-25
Inverting unity gain at
VPO+ or VPORL~15000

Load Capacitance

-100

-1

pF
pF
pF
VIV

VPO - connected to VPI

PSRR p

OKHz-4KHz
OKHz-50KHz

60
36

dB
dB

Frequency of Master Clock

I/tpM

Depends on the device used and
the BCLKR/CLKSEL Pin
MCLKx and MCLKR

Width of Master Clock High

tWMH

MClKx and MClKR

160

ns

Width of Master Clock Low

tWML

MClKx and MClKR

160

ns

Rise Time of Master Clock

tRM

MCLKx and MCLKR

50

ns

Fall Time of Master Clock

tFM

MCLKx and MClKR

50

ns

Set-Up Time from BClKx High
(and FS x in Long Frame Sync
Mode) to MCLKx Falling Edge

tSBFM

Period of Bit Clock

First bit clock after the leading
edge of FS x

tpB

1.536
1.544
2.048

MHz
MHz
MHz

100
485

ns
488

15,725

ns

Width of Bit Clock High

tWBH

VIH=2.2V

160

Width of Bit Clock Low

tWBL

V 1L =0.6V

160

Rise Time of Bit Clock

tRB

tpB=480ns

50

ns

Fall Time of Bit Clock

tFB

tpB = 488ns

50

ns

c8SAMSUNG
Electronics

ns
ns

270

KT8564/KT8567

CMOS INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS
Characteristic

(Continued)
Test Conditions

Symbol

Min

Typ

Max

Unit

Holding Time from Bit Clock
Low to Frame Sync

tHBF

Long frame only

0

ns

Holding Time from Bit Clock
High to Frame Sync

tHOLO

Short frame only

0

ns

Set-Up Time for Frame Sync
to Bit Clock Low

tSFB

Long Frame Only

80

ns

Delay Time from BCLK x High
to Data Valid

tOBO

Load

=150pF plus 2 LSTTL loads
Load =150pF plus 2 LSTTL loads

0

Delay Time to TS x Low

txop

Delay Time from BCLKx Low
to Data Output Disabled

tOEc

Delay Time to Valid Data from
FS x or BCLK x,
whichever Comes Later

tOZF

Set-Up Time from
BCLK Rlx Low

DR

Valid to

=

CL OpF to 150pF

180

ns

140

ns

50

165

ns

20

165

ns

tSDB

50

ns

Hold Time from BCLK Rlx Low
to DR Invalid

IHBD

50

ns

Delay Time from BCLKRlx Low
to SIG R Valid

tDFSSF

Load

=50pF pius 2 LSTTL loads

300

ns

-- r----

Set-Up Time from FS XlR to
BCLK XlR Low

tSF

Short frame sync pulse
(1 or 2 bit clock periods 10ng)(Note 1)

50

ns

Hold Time from BCLKx1R Low
to FS X1R Low

tHF

Short frame sync pulse
(1 or 2 bit clock periods 10ng)(Note 1)

100

ns

Hold Time from 3rd Period of
Bit Clock Low to Frame Sync
(FS x of FS R)

tHBFI

Long frame sync pulse
(from 3 to 8 bit clock periods long)

100

ns

Minimum Width of the Frame
Sync Pulse (Low Level)

tWFL

64K bit/s operating mode

160

ns

Note 1: For short frame sync timing, FS x and FS R must go high while their respective bit clocks are high.

PIN CONFIGURATION

x

I

x

CD
CD

+

0

Cl.

>

c8SAMSUNG
Electronics

x

lL

>

(/)

>

~

I

0
Z

0

0

>

Cl.

lL

0::

>

0

a:

lL

>

<..)

0

>

a:

(/)

lL

x

o

a:

Cl

:s
l)

co

a:

~

..J
l)

co

Z
Cl

~

~

..J
l)
~

271

•

CMOS INTEGRATED CIRCUIT

KT8564/KT8567

MCLKx
MCLKR

BLCKX

FSx

Ox

BCLKR

Fig. 2. Short Frame Sync Timing

MCLKX
MCLKR

BCLKx

FSx

Ox

Fig. 3 Long Frame Sync Timing

c8SAMSUNG
Electronics

272

CMOS INTEGRATED CIRCUIT

KT8564/KT8567
PIN DESCRIPTION
Pin

Function

Name

1

VPO+

2

GNOA

Analog ground. All signals are referenced to this pin.

3

VPO-

The inverted output of the receive power amplifier.

4

VPI

5

VFRO

6

Vee

Positive power supply pin Vee = +5V±5%.

FS R

Receive frame sync pulse which enables BClKR to shift PCM data into
DR, FS R is an 8KHz pulse train. (refer to Fig 2 and 3 for timing details)

8

DR

Receive data input. PCM data is shifted into DR following the FS R
leading edge.

9

BClK R!
ClKSEl

The bit clo,ck which shifts data into DR after the FS R leading edge.
May vary from 64KHz to 2.048MHz. Alternatively, may be a logic input
which selects either 1.536MHzl1.544MHz or 2.048MHz for master clock
in synchronous mode and BClKx is used for both transmit and receive
directions. (see Table 1)

10

MClKR!
PON

Receive master clock. Must be 1.536MHz or 2.048MHz. May be
asynchronous with MClKx, but should be synchronous with MClKx
for best performance. When MClKR is connected continuously low,
MClKx is selected for all internal timing. When MClKR is connected
continuously high, the device is powered down.

11

MClKx

Transmit master clock. Must be 1.536MHz, 1.544MHz or 2.048MHz.
May be async~ronous with MClKR.

12

BClKx

The bit clock which shifts out the PCM data on Ox. May vary from
64KHz to 2.048MHz, but must be synchronous with MClKx.

13

Ox

The TRI·STATE PCM data output which is enabled by FS x.

14

FS x

Transmit frame sync pulse input which enables BClKx to shift out.the
PCM data a on Ox, FS x is an 8KHz pulse train. (refer to Fig 2, 3)

15

TSx

7

The non·inverted output of the receive power amplifier.

Inverting input to the receive power amplifier.
Also powers down both amplifiers when connected to VBS •
Analog output of the receive filter.

Open drain output which pulses low during the encoder time slot.
Analog loopback control input. Must be set to logic '0' for normal
operation. When pulled to logic '1', the transmit filter input is dis
connected from the output of the preamplifier and connected to the
VPO+ output of the receive power, amplifier.

16

ANlB

17

GSx

Analog output of the transmit input amplifier.
Used to externally set again.

18

VFxl-

Inverting input of the transmit input amplifier.

19

VFxl +

Non·inverting input of the transmit input amplifier.

20

VBB

Negative power supply pin VBB = :....5V±5%.

c8SAMSUNG .
E~ctromcs

I

273

CMOS INTEGRATED CIRCUIT

KT8564/KT8567

TRANSMISSION CHARACTERISTICS
(Unless otherwise specified: Ta=O°C to 70°C, Vcc=5V±5%, VBB = -5V±5%, GNDA=OV, f=1.02KHz,
VIN = OdBmO, transmit input amplifier connected for unity-gain non-inverting.)
Characteristic

Symbol

Test Condition

Max

Unit

-0.15

0.15

dB

-0.15
-0.35
-0.7

0.15
0.05
0
-14

dB
dB
dB
dB

±0.1

dB

±O.05

dB

0.2
0.4
1.2
2.5

dB
dB
dB
V

Min

Typ

AMPLITUDE RESPONSE

Receive Gain, Absolute

G RA

Receive Gain, Relative to GRA

GRR

Absolute Receive Gain Variation
with Temperature
Absolute Receive Gain Variation
with Supply Voltage

Ta=25°C,'Vcc =5V, VBB = -5V
Input = Digital code sequence for
OdBmO signal at 1020Hz
f = OHz to 3000Hz
f=3300Hz
f = 3400Hz
f = 4000Hz

GRAT

Ta=O°C to 70°C

GRAV

Vcc =5V±5%, VBB = -5V±5%

Receive Gain Variations with
Level

GRRL

Sinusoidal test method; reference
input PCM code corresponds to an
Ideally encoded -10dBmO signal
PCM level = - 40dBmO to + 3dBmO
PCM level = - 50dBmO to - 40dBmO
PCM level = - 55dBmO to - 50dBmO

Receive Filter Output at VFRO

VRO

Absolute Levels

AL

Max Transmit Overload Level

tMAX

Transmit Gain, Absolute

GXA

RL= 100
Nominal OdBmO level is 4dBm (6000)
OdBmO
Max transmit overload level
KT8564(3. 17d BmO), KT8567(3.14dBmO)
Ta=25°C, Vcc =5V, VBB = -5V
Input at GSx = OdBmO at 1020Hz
f=16Hz
f = 50Hz
f=60Hz
f = 200Hz
f = 300Hz - 3000Hz
f = 3300Hz
f=3400Hz
f=4000Hz
f = 4600Hz and up, measure
Response from OHz to 4000Hz

-0.2
-0.4
-1.2
-2.5

-0.15

-1.8
-0.15
-0.35
-0.7

1.2276

Vrms

2.501
2.492

VPK
0.15

dB

-40
-30
-26
-0.1
0.15
0.05
0
-14
-32

dB
dB
dB
dB
dB
dB
dB
dB
dB

Transmit Gain, Relative to G XA

GXR

Absolute Transmit Gain Variation
with Temperature

GXAT

Ta = O°C to 70°C

± 0.1

dB

Absolute Transmit Gain Variation
with Supply Voltage

GXAV

Vcc =5V±5%, VBB= -5V±5%

±0.05

dB

GXRL

Sinusoidal test method
Reference level = - 10dBmO
VFxl + = - 40dBmO to + 3dBmO
VFxl + =- 50dBmO to - 40dBmO
VFxl + = - 55dBmO to - 50dBmO

0.2
0.4
1.2

dB
dB
dB

Transmit Gain Variations with
Level

c8SAMSUNG
Electronics

-0.2
-0.4
-1.2

274

CMOS INTEGRATED CIRCUIT

KT8564/KT8567

TRANSM ISSION CHARACTERISTICS
Characteristic

(Continued)

Symbol

Test Condition

Min

Typ

Max

Unit

ENVELOPE DELAY DISTORTION WITH FREQUENCY
Transmit Delay, Absolute

DXA

f = 1600Hz

290

315

itS

Transmit Delay, Relative to DXA

DXR

f = 500Hz - 600Hz
f = 600Hz - 800Hz
f = 800Hz -1000Hz
f = 1000Hz -1600Hz
f = 1600Hz - 2600Hz
f = 2600Hz - 2800Hz
f = 2800Hz - 3000Hz

195
120
50
20
55
80
130

220
145
75
40
75
105
155

its
its
itS
itS
itS
itS
its

Receive Delay, Absolute

DRA

f = 1600Hz

180

DRR

f = 500Hz -1000Hz
f = 1000Hz-1600Hz
f = 1600Hz- 2600Hz
f = 2600Hz - 2800Hz
f = 2800Hz - 3000Hz

Transmit Noise, C Message
Weighted

N xc

Transmit Noise, P Message
Weighted

200

itS

-25
-20
70
100
145

90
125
175

itS
its
its
its
itS

VFxl + = OV, KT8564

12

15

dBrncO

Nxp

VFxl + = OV, KT8567

-74

-67

dBmOp

Receive Noise, C Message
Weighted

NRC

PCM code equals alternating
positive and negative zero, KT8564

8

11

dBrncO

Receive Noise, P Message
Weighted

N RP

PCM code equals positive zero,
K"T8567

-82

-79

dBmOp

Noise, Single Frequency

N Rs

f = OKHz to 100KHz, loop around
measuremenr, VFxl += OV rms

-53

dBmO

Receive Delay, Relative to DRA

-40
-30

NOISE

Positive Power Supply Rejection,
Transmit

VFxl + = OV rms,
PPSR x Vcc = 5.0V oc + 100mV rms
f = OKHz - 50KHz

40

dBC

Negative Power Supply Rejection,
Transmit

VFxl + =OV rms ,
NPSRx VBB = - 5.0V oc + 100mV rms
f = OKHz - 50KHz

40

dBC

Positive Power Supply Rejection,
Receive

PCM code equals positive zero
Vcc = 5.0V oc + 100mV rms
PPSR R f = OHz - 4000Hz
f = 4KHz - 25KHz
f = 25KHz - 50KHz

40
40
36

dBC
dB
dB

Negative Power Supply Rejection,
Receive

PCM code equals positive zero
V BB = - 5.0V oc + 100mV rms
NPSR R f = OHz - 4000Hz
f = 4KHz - 25KHz
f = 25KHz - 50KHz

40
40
36

dBC
dB
dB

c8SAMSUNG
Electronics

275

•

KT8564/KT8567

CMOS INTEGRATED CIRCUIT

TRANSMISSION CHARACTERISTICS
Characteristic

(Continued)

Symbol

Test Condition

SOS

Loop around measurement, OdBmO,
300Hz - 3400Hz input applied to
VFxl + , measure individual image
signals at VFRO
4600Hz - 7600Hz
7600Hz - 8400Hz
8400Hz - 100,OOOHz

Spurious Out-of-Band Signals
at the~hannel Output

Min

Typ

Max

Unit

-32
-40
-32

dB
dB
dB

Distortion

Signal to Total Distortion

STDx

Sinusoidal test method

Transmit or Receive
Half-Channel

STD R

Level = 3.OdBmO
= OdBmO to 3OdBmO
= -40dBmO XMT
RCV
= - 55dBmO XMT
RCV

Single Frequency Distortion,
Transmit

SFDx

-46

dB

Single Frequency Distortion,
Receive

SFD R

-46

dB

-41

dB

-90

-75

dB

-90

-70
(Note 1')

dB

33
36
29
30
14
15

dBC
dBC
dBC
dBC
dBC
dBC

IMD

Loop around measurement,
VFx + :::: - 4dBmO to - 21dBmO, two
frequencies in the range
300Hz - 3400Hz

Transmit to Receive Crosstalk

CTX.R

f = 300Hz - 3400Hz
DR = Steady PCM code

Receive to Transmit Crosstalk

CTR.X

f = 300Hz - 3000Hz, VFxl = OV

VOL

Balanced load, RL connected
between VPO + and VPORL=600n
RL= 1200n
RL=30Kn

3.3
3.5
4.0

Vrms
Vrms
Vrms

RL = 6oon, OdBmO

50

dB

Intermodulation Distortion

Crosstalk

Power Amplifiers

Maximum OdBmO Level for
Better than ± 0.1dB Linearity
Over the Range -10dBmO to
+3dBmO
Signal/Distortion

SlOp

Note 1. CTR.X is measured with a -50dBmO activating signal applied at VFxl +.

c8SAMSUNG
Electronics

276

CMOS INTEGRATED CIRCUIT

KT8564/KT8567

SELECTION OF MASTER CLOCK FREQUENCIES
MASTER CLOCK FREQUENCY SELECTED

BCLKRlCLKSEL

KT8564

KT8567

Clocked

1.536MHz or 1.544MHz

2.048MHz

0

2.048MHz

1.536MHz or 1.544MHz

1 (or open circuit)

1.544MHz

2.048MHz

•

ENCODING FORMAT AT Ox OUTPUT
KT8564 {J,t-Law)

KT8567 (A-Law, Includes Even Bit Inversion)

VIN = + Full Scale

10000000

1 01 0 1 0 1 0

VIN=OV

11111111
01111111

11010101
01010101

VIN = - Full Scale

00000000

00101010

APPLICATION CIRCUIT
R1

R2
300

Vss

0.1
600

GNDA

KT85641KT8567

0.1
+5V

Vee

300

Note 1: Transmit gain = 20 x

R3

R4

IOg(R1R~ R2),(R1 + R2)~ 10Kn

Note 2: Receive gain = 20 x log(2 ~:\R4~ 10KO

c8SAMSUNG
Electronics

277

LM567C

LINEAR INTEGRATED CIRCUIT

TONE DECODER
8 DIP

The LM567C is a monolithic phase locked loop system designed to provide a saturated transistor switch to GND, when an input signal is present
within the passband. External components are used to independently
set center frequency bandwidth and output delay.

FEATURES
•
•
•
•
•
•

Wide frequency range (O.01Hz - 500kHz).
Bandwidth adjustable from 0 to 14%
logic compatible output with 100mA current sinking capability.
Inherent Immunity to false signals.
High rejection of out-of-band Signals and noise.
Frequency range adjustable over 20:1 range by an external
resistor.

8 SOP

APPLICATIONS
•
•
•
•
•
•
•

Touch Tone Decoder
Wireless Intercom .
Communications paging decoders
Frequency monitoring and control.
Ultrasonic controls (remote TV etc.)
Carrier current remote controls.
Precision oscillator.

ORDERING INFORMATION
Device

Package

LM567CN

8 DIP

LM567CD

8 SOP

Operating Temperature
0- + 70°C

SCHEMATIC DIAGRAM

c8SAMSUNG
Electronics

278

LINEAR INTEGRATED CIRCUIT

LM567C

ABSOLUTE MAXIMUM RATINGS (Ta=25°C)
Characteristic
Operating Voltage
Input Voltage
Output Voltage
IPower Dissipation
Operating Temperature
Storage Temperature

Symbol
Vee
VIN
Vo
Pd
Topr
Tstg

-10

Value

Unit

10

V
V

~Vee+0.5

V

15
300

mW
°C
°C

O~+70

-65-+150

I

ELECTRICAL CHARACTERISTICS
(Vec=5.0V, Ta=25°C unless otherwise specified)

Characteristic
Operating Voltage Range
Supply Current Quiescent
Supply Current Activated
Quiescent Power Dissipation

Symbol
Vee
lee-1
lee-2
PaD

Test Conditions

Min

Typ

4.75

5.0
7
12
35
c-----500
±60
0.7

RL =20K
--~--

Highest Center Frequency
Center Frequency Stability
Center Frequency Shift
With Supply Voltage

H Fo
FSE

R L =20K
OOC to 70°C

100

Fcs
-~

Largest Detection Bandwidth
Largest Detection B.w Skew
Largest Detection Bandwidth
Variation With Supply Voltage
Largest Detection Bandwidth
Variation With Temperature

I

RIN
VIN-1

I

V
rnA
rnA
mW

-~

KHz
ppm/oC
2

%/V

18
3
±5

% otto
% of 10
%/V

%/OC

±0.1
20
IL =100mA, fi=fo

20

V IN -2

Greatest Simultaneous
Outband Signal To Inband
Signal Ratio
Minimum Input Signal to
Wideband Noise Ratio

S1/Sd

Fastest On-Off Cycling Rate
Output Leakage Current

Four

c8SAMSUNG
Electronics

9.0
10
15

Unit

I

--

Input Resistance

Output Fall Time
Output Rise Time

14
2
±2

B.wt

Smallest Detectable
Input Voltage
Largest No Output
Input Voltage

Output Saturaton Voltage

Max

---t--~

10

B.w
B.ws
B.wv

I

S2/Sd

leo
VSAr-1
Vsw 2

TF
TR

10
R L =20k
VIN = 300mVRMS
fi=fo=100KHz
fi1 =140KHz
fi 2 =60KHz
R L =20K
VIN = 25mVRMS

k =30mA, VIN = 25mVrms
IL =100mA,

R L =50
RL =50

VIN = 25mVrms

1--I

Kohm
25

mVrms

15

mVrms

+6

dB

-6

dB

--c------10/20
0.01
25

0.2
0.6
30
150

0.4
1.0

pA
V
V
nS
nS

279

LM567C

LINEAR INTEGRATED CIRCUIT

CIRCUIT DESCRIPTION

BLOCK DIAGRAM

The LM567C monolithic tone decoder consists of a phase detector, low
pass filter, and current controlled oscillator which comprise the basiC
Output 1
Filter
phase-locked loop, plus an additional low pass filter and quadrature
detector enabling detection on in-band signals. The device has a
Low Pass
normally high open collector output capable of sinking 100 mAo
Loop Filter 2
The input signal is applied to Pin 3 (20 kO nominal input resistance). Free
running frequency is controlled by an RC network at Pins 5 and 6 and
can typically reach 500 kHz. A capacitor on Pin 1 serves as the output
filter and eliminates out-of-band triggering. PLL filtering is accomplished
with a capacitor on Pin 2; bandwidth and skew are also dependant upon
the circuitry here. Bandwidth is adjustable from 0% to 14% of the center
frequency. Pin 4 is +Vcc (4.75 to 9V nominal, 10V maximum); Pin 7 is
ground; and Pin 8 is open collector output, pulling low when an in-band
signal triggers the device.

Fig. 1

DEFINITION OF LM567C PARAMETERS
CENTER FREQUENCY fo
fa is the free-running frequency of the CL controlled oscillator with no input Signal. It is determined by resistor R1 between
pins 5 and 6, and capacitor C l from pin 6 to ground fa can be approximated by
fo:::::_1-

R 1C l

where R1 is in ohms and C 1 is in farads.

LARGEST DETECTION BANDWIDTH
The largest detection bandwidth is the largest frequency range within which an input signal above the threshold voltage will cause a logical zero state at the output. The maximum detection bandwidth corresponds to the lock range of the PLL.

DETECTION BANDWIDTH (BW)
The detection bandwidth is the frequency range centered about to. within which an input signal larger than the threshold
voltage (typically 20mVrms) will cause a logic zero state at the output. The detection bandwidth corresponds to the capture
range of the PLL and is determined by the low-pass bandwidth filter. The bandwidth of the filter, as a percent of fa, can
be determined by the approximation

BW=1070

j

Vi
f OC2

where Vi is the input signal in volts, rms, and C2 is the capacitance at pin 2 in p,F.

DETECTION BAND SKEW
The detection band skew is a measure of how accurately the largest detection band is centered about the center frequency,
It is defined as (fmax +fmin -2fo)/fo, where fmax and f min are the frequencies corresponding to the edges of the detection
band. If necessary, the detection band skew can be reduced to zero by an optional centering adjustment.

fa.

c8SAMSUNG
Electronics

280

LINEAR INTEGRATED CIRCUIT

LM567C

PIN DESCRIPTION
OUTPUT FILTER -

C3 (Pin 1)

Capacitor C3 connected from pin 1 to ground forms a simple low-pass post detection filter to eliminate spurious outputs
due to out-of-band signals. The time constant of the filter can be expressed as T3 =R 3C3, where R3 (4.7kO) is the internal
impedance at pin 1.
The precise value of C3 is not entical for most applications. To eliminate the possibility of false triggering by spurious
signals, it is recommended that C3 be ~ 2 C 2, where C2 is the loop filter capacitance at pin 2.
If the value of C 3 becomes too large, the turn-on 200mV rms. Then, as noted on the graph, bandwidth will be controlled
solely by the foC 2 product.
3. Capacitor C3 sets the band edge of the low-pass filter which attenuates frequencies outside of the detection band and
thereby eliminales spurious outputs. If C3 is too small, frequencies adjacent to the detection band may switch the output
stage off and on at the beat frequency, or the output may pulse off and on during the turn-on transient. a typical
minimum value of C 3 is 2 C2 .
Conversely, if C 3 is too large, turn-on and turn-off of the output stage will be delayed until the voltage across C3 passes
the threshold value.

PRINCIPLE OF OPERATION
The LM567C is a frequency selective tone decoder system based on the phase-locked loop (PLL) principle. the system
is comprised of a phase-locked loop, a quadrature AM detector, a voltage comparator, and an output logic driver. The four
sections are internally interconnected as shown in Figure 1.
When an input tone is present within the pass-band of the circuit, the PLL synchronizes or "locks" on the input signal.
The quadrature detector serves as a lock indicator: when the PLL is locked on an input signal, the dc voltage at the output of
the detector is shifted. This dc level shift is then converted to an output logic pulse by the amplifier and logic driver. The
logic driver is a "bare collector" transistor stage capable of switching 100 mA loads.
The logic output at pin 8 is normally in a "high" state, until a tone that is within the capture range of the decoder is present
at the input. When the decoder is locked on an input signal, the logic output at pin 8 goes to a "low" state.
The center frequency of the detector is set by the free-running frequency of the current-controlled oscillator in the PLL.
This free-running frequency, fa. is determined by the selection of R1 and C 1 connected to pins 5 and 6, as shown in
Figure 3. The detection bandwidth is determined by the size of the PLL filter capacitor, C2 ; and the output response speed
is controlled by the output filter capacitor, C3

c8SAMSUNG
Electronics

282

LINEAR INTEGRATED CIRCUIT

LM567C
TYPICAL CHARACTERISTICS
CENTER FREQ. VS TEMPERATURE

TYP. BW VS TEMPERATURE

15
+2

lz

14
12

Vee.

+1

4.7SV

2

!c
iE
!II

Iii

10

............

i
Vee ..

0

5.75V

f

II:

0

8

I

6_

t.

!Z - 1

4_~

~

-2

2-

VCC=7.0V

- 25

75

50

25

-25

BW VS CENTER FREQUENCY

15

300

Ii:'

_200

100

75

25
TEMPERATURE rCI

BW VS INPUT VOLTAGE.

i

I

- ......... -r---r---

............

r---

100

TEMPERATURE rC)

-..

--

r---

W

~

~

~

~

::!

~
;

~

""
~

~

~

.:1

~

""'"

~

::!

10

~

'15

t.

i

I

!;

'"

"

i'

Go

i!E 100

0

10

12

14

100

16

lK

10K

1001(

1M

CENTER FIEQUENCY. ~

_(.,..orfo)

CURRENT DRAIN va vee

BW (C2, C3 atARCI'.)
25

20

.~~

15

1'\t':

ij
10

1\ ~

C2~ f'.. i'-....

'"

r-- r--......
r---

10

c8SAMSUNG
Electronics

12

14

16
Vcc(V)

283

LM567C

LINEAR INTEGRATED CIRCUIT
OUTPUT SATURATION VOLTAGE
VS AMBIENT TEMPERATURE

OPERATING CYCLE VS BANDWIDTH
1000

500

1.0

'\.

"\A
1,\

200

V~.5V. t.25.6 I 1 __ r----.A: Bandwidth limited by CI -

8: Bandwidth Hmlted by

E

!l

~ "r\.
g
~~ ~

external resistor

0.6

~

{Minimum CII

w 100
50

0.8

r-----

~

t

--

" "~

I~ i'--

0.4

_Vv
r'jl';'iOOmA

~

~

"

20

0.2

I"

10

10

50

20

/

---. -25

100

BANDWIDTH (~ or 101

~

t--

~

Il-30mA

25

50

75

100

BANDWIDTH (OC)

AC TEST CIRCUIT
+5V

LM567C

Vin

+5V

fi=100KHz
Note: Adjust for fo=100KHz

Fig. 2

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284

LM567C

LINEAR INTEGRATED CIRCUIT

APPLICATION CIRCUIT
(b) 2·Phase Oscillator

(8) Touch Tone Decoder
LM567C
Digit

RL
2

LM567C

3
6

5

3

Rl

RL>lK

I

4

::+; Cl
6

(c) variable Oscillator

7

RL

8

LM567C
6

5

0.51'F

·200mVrms

o--f

10

Rl

(d) Frequency Doubler

RL

LIlJU2to

LM567C

2

6

LrL
RL

C2~

c8~SUNG

to

;:hC1

285

LM567L

LINEAR INTEGRATED CIRCUIT

MICROPOWER TONE DECODER

a DIP

The LM567L is a micropower phase-locked loop (PLL) circuit designed
for general purpose tone and frequency decoding. In applications requiring very low power dissipation, the LM567L can replace the popular 567 type decoder with only minor component valu~ changes. The
LM567L offers approximately 1/10th the power dissipation of the conventional567 type tone decoder, without sacrificing its key features such as
the oscillator stability, frequency selectivity, and detection threshold.
Typical quiescent power dissipation is less than 4mW at 5 volts.

a SOP

FEATURES
•
•
•
•
•
•
•
•

Very low power dissipation (4mW at 5V)
Bandwidth adjustable from 0 to 14% of fo
Logic compatible output with 10mA current sinking capability.
Highly stable center frequency.
Center frequency adjustable from O.01Hz to 60KHz.
Inherent immunity to false signals.
High rejection of out-of-band signals and noise.
Frequency range adjustable over 20:1 range by external resistor.

APPLICATIONS
• Battery-operated tone detection • Touch-tone decoding
• Sequential tone decoding
• Communications paging
• Ultrasonic remote-control
• Telemetric decoding

ORDERING INFORMATION
Device

Package

LM567LN

8 DIP

LM567LD

8 SOP

Operating Temperature

0-+ 70°C

SCHEMATIC DIAGRAM

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286

LINEAR INTEGRATED CIRCUIT

LM567L

ABSOLUTE MAXIMUM RATINGS (Ta=25°C)
Characteristic
Power Supply
Power Dissipation
Plastic Package
Derate Above +25°C
Operating Temperature
Storage Temperature

Symbol

Value

Uni\

Vee

10

V'

Pd

300
2.5
0- +70
-65 - +150

mW
mW/oC
°C
°C

Topr
Tstg

ELECTRICAL CHARACTERISTICS
(Vee = +5V, Ta.=25°C, unless otherwise specified)
Characteristic

Symbol

Test Conditions

Vee

Supply Current/Quiescent
Supply Current/Activated

lee-2

RL= 20KO,
RL = 20KO, V1N = 300mV rms, f; = to

Highest Center Frequency

H,o

R1 =3KO-5KO

Center Frequency Drift
Temperature
0 200mV rms . Then, as noted on the graph, bandwidth will be
controlled solely by the fo C2 product.
3. Capacitor C3 sets the band edge of the low-pass filter which attenuates frequencies outside of the detection band
and thereby eliminates spurious outputs. If C3 is too small, frequencies adjacent to the detection band may switch
the output stage off and on at the beat frequency, or the output may pulse off and on during the turn-on transient.
A typical minimum value for C3 is 2 C2.
Conversely, if C3 is too large, turn-on and turn-off of the output stage will be delayed until the voltage across C3
passes the threshold value.

PRECAUTIONS
1. The LM567L will lock on signals near (2n+1) fo and produce an output for signals near (4n+1) fa, for n=O, 1,2 etc.
Signals at 5 fo and 9 fo can cause an unwanted output and should, therefore, be attenuated before reaching the input
of the circuit.
2. Operating the LM567L in a reduced bandwidth mode of operation at input levels less than 200mVrms results in
maximum immunity to noise and out-band signals. Decreased loop damping, however, causes the worst-case lock-up
time to increase, as shown by the graph of Fig 13.

c8SAMSUNG
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291

I

LM567L

LINEAR INTEGRATED CIRCUIT

3.

Bandwidth variations due to changes in the in-band signal amplitude can be eliminated by operating the LM567L
in the high input level mode, above 200mV nns• The input stage is then limiting, however, so that out-band signals
.or high noise levels can cause an apparent bandwidth reduction as the in-band signal is suppressed. In addition,
the limited input stage will create in-band components from subharmonic signals so that the circuit becomes sensitive to signals at fot3, fot5 etc.
4. Care should be exercised in lead routing and lead lengths should be kept as short as possible. Power supply leads
should be properly bypassed close to the integrated circuit and grounding paths should be carefully determined to
avoid ground loops and undesirable voltage variations. In addition, circuits requiring heavy load currents should be
provided by a separate power supply, or filter capacitors increased to minimize supply voltage variations.

OPTIONAL CONTROLS
PROGRAMMING
Varying the value of resistor R1 and/or capacitor C1 will change the center frequency. The value of R1 can be changed
either mechanically or by solid state switches. Additional C1 capacitors can be added by grounding them through saturated
npn transistors.

SPEED OF RESPONSE
The minimum lock-up time is inversely related to the loop frequency. As the natural loop frequency is lowered, the turn-on
transients becomes greater. Thus maximum operating speed is obtained when the value of capacitor C2 is minimum. At
the instant an input signal is applied, its phase may drive the oscillator away from the incoming frequency rather than toward
it. Under this condition, the lock-up transient is in a worst case situation, and the minimum theoretical lock-up time will not
be achievable.
The following expressions yield the values of C2 and C3, in microfarads, which allow the maximum operating speeds
for various center frequencies where fo is Hz.
13
C2= - ,
fo

26
C3=

fo

IlF

The minimum rate that digital information may be detected without losing information due to turn-on transient or output
chatter is about 10 cycles/bit, which corresponds to an information transfer rate of fol10 baud. In situations where minimum
turn-off is of less importance than fast turn-on, the optional sensitivity adjustment circuit of Fig 5 can be used to bring
the quiescent C3 voltage closer to the threshold voltage. Sensitivity to beat frequencies, noise, and extraneous signals,
however, will be increased.

+v

~, ~A

l:::Jt,
1
DECREASE
SENSITIVITY

,

+V
DECREASE
SNESITIVITY

LM567L

LM567L

INCREASE
SENSITIVITY

1'C3

INCREASE
SENSITIVITY

R

SILICON
DIODES FOR
TEMPERATURE
COMPENSATION
(OPTIONAL)

Fig. 5. Adjustable Sensitivity Connections

c8~SUNG

292

LM567L

LINEAR INTEGRATED CIRCUIT

CHATTER
When the value of C3 is small, the lock transient and ac components at the lock detector output may cause the output
stage to move through its threshold more than once, resulting in output chatter.
Although some loads, such as lamps and relays will not respond to chatter, logic may interpret chatter as a series of output
signals. Chatter can be eliminated by feeding a portion of the output back to the input (Pin 1) or, by increasing the size of
capacitor C3. Generally, the feedback method is preferred since keeping C3 small will enable faster operation. Three
alternate schemes for chatter prevention are shown in Fig 6. Generally, it is only necessary to assure that the feedback time
constant does not get so large that it prevents operation at the highest anticipated speed.
+v
+v
+v
+V
RL.

LM567L

t2K~"K_

RL

LM567L
CI

Rf
lOOK

l:C3
I

~

I~~K~

I

RL

LM567L J."8~_-,
C3

*~A

l

tK'laIOK

;,1

Fig. 6. Methods of Reducing Chatter

SKEW ADJUSTMENT
The circuits shown in Fig 7 can be used to change the position of the detection band (capture range) within the largest
detection band (lock range). By moving the detection band to either edge of the lock range, input signal variations will expand
the detection band in one direction only, since R3 also has a slight effect on the duty cycle, this approach may be useful to
obtain a precise duty cycle when the circuit is used as an oscillator.
+V

+v

B-t1
L~RSm

LOWERS fa
R2
5K

RI

LM567L

LM567L

r' <
50K

RAISES fa

83

t.OK

RAISES fa

RAISESf o

SILICON
DIODES FOR
TEMPERATURE
COMPENSATION
(OPTIONAL)

Fig. 7. Detection Band Skew Adjustment

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293

LM567L

LINEAR INTEGRATED CIRCUIT

TYPICAL PERFORMANCE CHARACTERISTICS
FIG 8. SUPPLY CURRENT
Vo SUPPLY VOLTAGE

FIG 9. LARGEST DETECTION BANDWIDTH
Vo OPERATING FREQUENCY

3.0

15

I\.

2.5

'\

NO LOAD "ON" CURREN:/

00(

E 2.0

I

ffi

a::
a::

;:)

1.5

V

0

~

IL
IL

;:)

III

1.0

"'

/

./
./
~
~SCENT CURRENT

0.5

o

V

~

---

v---

4

10

10Hz

100Hz

SUPPLY VOLTAGE - VOLTS

FIG 10. DETECTION BANDWIDTH
Vs A FUNCTION OF C2 AND C3

1KHz
10KHz
CENTER FREQUENCY

1:OOKHz

FIG 11. BANDWIDTH Vs INPUT SIGNAL
AMPLITUDE (C2 IN I'F)

10' r--,..--,..--,..--,..--,..--,..--,..-----,

250
III

~

~ 200~-~~~~~r_~~~~_1~_1~~

E

I

w
~ 150 I--ft--~t­
~

g

I~ 100

f----H-I----"I-

~

C3

Adjustment
Required

C2
16

10

BANDWIDTH - % OF fo

FIG 12. BANDWIDTH VARIATION
WITH TEMPERATURE

0,\

15.0

14

400

12

l!i 10.0
!

300
200

10

%
I-

-

8

~ 7.5

z

-r--

6
5.0

2.5

.....
100

fo-.

16

FIG 13. GREATEST NUMBER OF
CYCLES BEFORE OUTPUT

2

r-- r--

0

BrNDWlrH AT(5 C

~

o

"

[
-

50

r--.

-r---r--

4

-75

14

50

12.5

~

12

BANDWIDTH - % of fo

"'

~~

I

BANDWIDTH LIMITED BY C2

~

~
\

40

-25

25

50

TEMPERATURE, °C

c8SAMSUNG
Electronics

75

100

125

20

1

I

'\!1TERNAL RESljR
(MINIMUM C2)

10
-50

~

BANDWIDTH LIMITED BY

"'

30

3 45

~
10

I
20

I--------

30 40 50

100

BANDWIDTH (% of fo)

294

LM567L

LINEAR INTEGRATED CIRCUIT
FIG 15. TYPICAL CENTER FREQUENCY DRIFT
WITH TEMPERATURE(V cc = SV, R1 80kO,fo = 1KHz)

FIG 14. POWER SUPPLY DEPENDENCE
OF CENTER FREQUENCY

=

1.2

100

1.1
1.0
0.9

....i=" O.B

~

~

~

f----

~-

f--

0.5

.-/

0.4

I

I

-"""1'..

o

V
V --

0.7

I 0.6 f----------

.]

I

- - - I---

~--~

I

17

-100

\

"'r\

~

a:

0-200

\

g
If

~ -30()

«

I

II:

w

0.3

ii!

0.2

-400

I

0.1

0.1

0.2

3

0.3 0.4 0.5

45

10

-500
-25

25

50

75

TEMPERATURE, DC

CENTER FREQUENCY - KHz

FIG 16. TYPICAL FREQUENCY DRIFT
AS A FUNCTION OF TEMPERATURE

~
~
~

II:

~o -1
~

~--+---+---~---r---+--~~~--~

w

CI

~
~

-2~--+---+---~---r---+---+--~--~

'if.

-4

~--~--~--~--~--~--~--~--~

-25

25

50

75

TEMPERATURE, DC;

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295

MC1488

LINEAR INTEGRATED CIRCUIT

QUAD LINE DRIVER

14 DIP

The MC1488 is a monolithic quad line driver designed to interface data
terminal equipment with data communications equipment in conformance with the specifications of EIA Standard No. RS-232C.

FEATURES
•
•
•
•
•

Current Limited Output: ± 10mA typ
Power-Off Source Impedance: 300 Ohms (min)
Simple Slew Rate Control with External Capacitor
Flexible Operating Supply Range
Compatible with DTL and TTL, HCTLS Families

SCHEMATIC DIAGRAM

14 sOP

(1/4 of Circuit Shown)

Vee 14

ORDERING INFORMATION
Device

Package

MC1488N

14 DIP

MC1488D

14 SOP

INPUT
300

OUTPUT
PIN 6, 8, 11 or 3

Operating Temperature
0- + 70°C

TYPICAL APPLICATION
LINE DRIVER
MC1488

INTERCONNECTING
CABLE

LINE RECEIVER
MC1489

.s--'~...r--'\0- TTUOTL

TTUOTL o-j

""L _ .... 1

' - __ .I

70
VEE 1

I

I

I

I

I-

--l

I

I

I

I

INTERCONNECTING
CABLE

ABSOLUTE MAXIMUM RATINGS

(Ta = 25°C unless otherwise noted)
Symbol

Value

Unit

Power Supply Voltage

Vee
VEE

+15
-15

Voe

Characteristic

Input Voltage Range

V'R

-15:s V,R:s 7.0

Voc

Output Signal Voltage

Vo

±15

Voe

Power Dissipation

Po

1000

mW

1/ROJA

6.7

mW/oC

Ta

0:"'+70

°C

T5tg

-65- +150

°C

Derate Above Ta = + 25°C
Operating Temperature Range
Storage Temperature Range

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LINEAR INTEGRATED CIRCUIT

MC1488
ELECTRICAL CHARACTERISTICS

(Vee =9.0±1%V, VEE =-9.0 ± 1%V, Ta =0-70°C unless otherwise noted)

Characteristic
1--

Symbol

Input Current 1

IlL

--~----~~---~~--~

Low Logic State (VIL =0)

t

1.0

1.6

mA

Fig

~A

10

-~----~~-----~----

- - - - ----------t~~__j

-~--

V IL =0.8V, RL=3.0KO
Vee = 9.0V, VEE = - 9.0V

6

VIL =0.8V. RL =3.0KO
Vee = 13.2V, VEE=-13.2V

9

10.5

-6

-7

-9

-10.5

VIH=1.9V, RL=3.0KO
Vee=9.0V, VEE=-9.0V
V = 1.9V, RL = 3.0KO
IH
Vee=13.2V, VEE=-13.2V

VOL

10_s_+~~r---PO_s_it_iv_e_______~_

=

----------~---~

Output Resistance

Unit

7

---4--~~-~~--1

Output Voltage-High Logic State

Output Short Circuit Current

Max

~:~~~g~) State

Input Current 2

Output Sh_ ort Circuit Current _

Typ

---~-4------~-t--~--+-----+~~-+-~--j--~-1

---------------------------~~~+----~----

Output Voltage-Low Logic State

Min

Test Conditions

los-

_+_-

-6
6

Negative
Vee =V EE =0, Vo = ± 2.0V

2

V

2

-10

-12

mA

3

10

12

mA

3

I

-~-~~~4----~

--~-+--~-~--~~--~---

Ro

V

o

300

~-+--

VIH=1.9V, Vee=+9.0V
V IL =O.8V, Vee = +9.0V

VIH=1.9V, Vee=+12V

Positive Supply Current (RL=oo)

lee

--~~~~-~--

~-----t-----t---

VIL =0.8V, Vee = +12V

~-----r---~~-~+---~

VIH =1.9V, Vee = + 15V
mA
-~

~A

mA
~A

5

mA

-----

mA
mW

* Maximum package power dissipation may be exceeded if all outputs are shorted simultaneously.

SWITCHING CHARACTERISTICS
(Vee = 9.0± 1%V, VEE= -9.0 ± 1 %V, Ta= 0

Characteristic
Propagation Delay Time

Symbol

25°C)
Test Conditions

tpLH

ZL =3.0K and 15pF

Min

Typ

Max

Unit

Fig

275

350

nS

6

Fall Time

tTHL

ZL =3.0K and 15pF

45

75

nS

6

Rise Time

hLH

ZL =3.0K and 15pF

55

100

nS

6

Propagation Delay Time

tpHL

ZL =3.0K and 15pF

110

175

-, nS

6

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297

I

LINEAR INTEGRATED CIRCUIT

MC1488
DC TEST CIRCUIT
FIGURE 1 INPUT CURRENT
+9V

FIGURE 2 OUTPUT VOLTAGE
+9V

-9V

-9V

+1.9V

J
3K
VIL

1
FIGURE 3 OUTPUT SHORT CIRCUIT CURRENT
Vee

FIGURE 4 OUTPUT RESISTANCE (POWER OFF)

VEE

+1.9V

L

Vo
±2Vdc
±6mA Max

c8SAMSUNG
Electronics

298

LINEAR INTEGRATED CIRCUIT

MC1488

FIGURE 5 POWER SUPPLY CURRENTS

+1.9V

J

•

MC1488

VIL

+0.8V

VEE

FIGURE 6 SWITCHING RESPONSE

D

VIN 0

l~

i'~F

RL

+1E:X'
VIN

Va

-11

50%

ITHL

~ '"Of

OVa

CL

ov

ITLH

tTHL and tTLH Measured 10% to 90%

c8SAMSUNG
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299

LINEAR INTEGRATED CIRCUIT

MC1488
TYPICAL PERFORMANCE CHARACTERISTICS

FIGURE 8 - SHORT CIRCUIT OUTPUT CURRENT
Vs TEMPERATURE

FIGURE 7 - TRANSFER CHARACTERISTICS
Vs POWER-SUPPLY VOLTAGE
+12

+12
+9.0 t------- Vccr2V, ViE=-r

<+9.0

r-- t--- r--

!--.

.§.
1---

ifi+6.0

,

II:
II:

-C'-

::I

Vcc =6V, VEE =-6V

~+3.0

-r;;:-+--

I-

Vcc =9V, VEE =-9V

+6.0

~+3.0

::I

CI

~

l!:

I-

5
~-3.0

is

~

I

I
0

1'~

I-

::I

l!: -3.0

V,

(3

::I

o
3K
~ -6.0 t------- f- VI~VO

- - +------ j - -

O.BV

Ii:0-6.0

VEE=-9V

I-

:z:

Ul

-9.0
-12

o

0.2

0.4

0.6

c5'
!!!-9.0

T
O.B

-12

1.0

1.2

Vln, INPUT VOLTAGE

1.4

1.6

~
~ J---55

1.B 2.0

~

j..----

~t:=1I

+25

+125

+75

T, TEMPERATURE eCI

M

FIGURE 9 - OUTPUT SLEW RATE Vs LOAD
CAPACITANCE

FIGURE 10 - OUTPUT VOLTAGE
AND CURRENT LIMITING CHARACTERISTICS
+20

1000

+16
+12
f+B.O

100

;:

--

ifi+4.0

t

i3

w

!(

==
~

0

!:i

II:

Ul

f----+-~Ir-+_-+---+

~

~

l!:-4.0

I
10

::I

r= ~
==
meL

~
1---

1.0

o

.i-B.O 1---+_-+_-*--+_-+__-4_-+-\----I

1---1\

f-

11111111

11111

11111111

11111

10

1.0

-121--1~~~~+_-+_-+_-+---+__-4_-~~H

VI~
-16
O.BV ~cc-::;:~~
~vo
_20L-__~V~EE_=_-9~V__~__~__~__~____L_~
1,000

100

10,000

-16 -12

-B.O

-4.0

+4.0

+B.O

+ 12

+16

Vo, OUTPUT VOLTAGE 'M

CL, CAPACITANCE (pF)

FIGURE 11 - MAXIMUM OPEATING TEMPERATURE
Vs POWER SUPPLY VOLTAGE

PIN CONNECTIONS

6

""" I"~

14

~1 2
w

~

~

~
IL

10

Vee'

8.0 l -

•

~

~

I-

InputD2

Output B

InputC2

I~

6.0 I-

~ 4.0

Output A

li>-it

Ul

>

'"

I

3K

::I

ffi

Input A

"1'...

CI

InputCl

I~

t

1

rn

OutputC

I VEE I

2.0

i

!

-55

+25

+75

+125

T, TEMPERATURE (OC)

c8SAMSUNG
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300

MC1489/MC1489A

LINEAR INTEGRATED CIRCUIT

QUAD LINE RECEIVER
14 DIP

The MC1489 monolithic quad line receivers are designed to interface
data terminal equipment with data communications equipment in conformance with the specifications of EIA Standard No. RS-232C.

FEATURES
• Input Resistance: 3.0KO to 7.0KO
• Input Signal Range: ;t 30 Volts
• Response Control
a) Logic Threshold Shifting
b) Input Noise Filtering
• Input Threshold Hysteresis Built in

14 SOP

I

SCHEMATIC DIAGRAM
(114 OF CIRCUIT SHOWN)

r - - -___--------- nUOTL

'

~-~

~_/
I

Vee

OutputA 3

InputD
12 Response
Control D

I

I

I

r--

InputA 1
Response
ControlA 2

I

I

--I

!

:

INTERCONNECTING
CABLE

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Response
Control B
Output B 6
Ground 7

InputC
9

Response
Control C

8 OutputC

302

MC1489/MC1489A

LINEAR INTEGRATED CIRCUIT

TEST CIRCUIT
Fig 1 -

SWITCHING RESPONSE

Fig 2 -

RESPONSE CONTROL NODE
VA

+5Vdc

R
orequiv

~----~h--------l'-----'·VO

Vin

_ _ _"'" +3V
50%

~

RESPONSE NODE
Vin ------1-'4--1

Vin

tTHL

- - - - - - - - - -.... Va

MC1489A
C, capacitor is for noise filtering
R, reistor is for threshold shifting

tTLH and tTHL
measured
10%-90%

Va

•

C;;;

CL

1.5V

CL =15pF=total parasitic capacitance, which includes
probe and wiring capacitances

TYPICAL PERFORMANCE CHARACTERISTICS
(vee =5.0 Vdc T a = +25°C unless otherwise noted)

Fig. 3 - TYPICAL TURN-oN THRESHOLD Vs
CAPACITANCE FROM RESPONSE CONTROL PIN TO
GND

IL-________L -________L -______

10

100

1000

pw, INPUT PUlSE WIDTH (ns)

c8SAMSUNG
Electronics

Fig. 4 - TYPICAL TURN-ON THRESHOLD Vs
CAPACITANCE FROM RESPONSE CONTROL PIN TO
GND

~

10,000

10

PW, INPUT PULSE WIDTH (ns)

303

LINEAR INTEGRATED CIRCUIT

MC1489/MC1489A

MC1489 INPUT THRESHOLD
VOLTAGE ADJUSTMENT

Fig. 6 Fig. 5 -

INPUT CURRENT

+10

6.0

+8.0

.,

+6.0

1/

:(+4.0

.s.

!2,+2.0

I/

II!

~

5.0

V

0

U

!:i-2.0
D.

I/

!:
,::!-4.0

v

v

'i

4.0

~

w

~

3.0

~

. . .V

I-

\--

it

RT

RT

RT

RT

5K

13K

00

11K

V..

V'h

V'h

+5V

+5V

-5V

"E'
AT

2.0

if, Vth

~

~ 1.0

.,V

-6.0

--

.,V

y

V

-8.0

L-

'--

'--

r-

VIlH V'HL

~

-10
-25-20

-15

-10

-5.0

0

+5.0 +10 +15

+20 +25

-3.0 -2.0 -1.0

VIN, INPUT VOLTAGE M
Fig. 7 - MC1489A INPUT THRESHOLD
VOLTAGE ADJUSTMENT

+3.0 +2.0 +1.0

Fig. 8 - INPUT THRESHOLD VOLTAGE
Vs. TEMPERATURE

6.0

24

5.0

'i

0

VI, INPUT VOLTAGE'M

lw

4.0

~

RT

CI

5K

11K

g

V'h

V'h

I-

+5V

w

~ 3.0

~ 2.0

Al

22

e-.-

20

~---

--r-:--

18

MC1J9AV,,~

CI

RT

V~O

-5V

AT

j, V'h

~

g

12

II:

10

II-

0.8

:I:

o

~

~ 1.0

14

Q

81

~

16

5:I:

D.

-

h-

I--- I---

-j---.::

k--~-

~H

t--=: ~ t - - ~l:rV"H
1--MC1489AVIlH

!: 0.6 f-.
I--

V1LH I--- V1HL

i-'-

r--I-

t

r---f-

F
0

+10

+20

+30

.--

--=

i

-60

+40

----

0.4
0.2

-30 -20 -10

.-~

r-::::: r-- ,........,
t---

+60

+120

T, TEMPERATURE (OC)

VI, INPUT VOLTAGE M
Fig. 9 - INPUT THRESHOLD Vs.
POWER SUPPLY VOLTAGE
2.0
V'HL MCl489A

V'HLMC1489
V'LHMCl489
V"HMC1489A

f---

a

o

4.0

8.0

12

Vee POWER SUPPLY VOLTAGE M

c8SAMSUNG
Electronics

304

LINEAR INTEGRATED CIRCUIT

MC3361

16 DIP

LOW VOLTAGE/POWER NARROW
BAND FM IF
The MC3361 is designed for use in FM dual conversion
communication. It contains a complete narrow band FM
demodulation system operable to less than 2.SV supply
voltage. This low-power narrow-band FM IF system
provides the second converter, second IF, demodulator.
Filter Amp and squelch circuitry for communications
and scanning receivers.

16 soP

I

FEATURES
• Stable operation with wide supply voltage
(2.5V to 7.0V)
• Low power consumption (4.0mA typo at Vee =4.0V)
• Excellent input sensitivity
(- 3dB limiting. 2.0/LVnns typ)
.' Minimum number of external components required.

~---~---------------

ORDERING INFORMATION
APPLICATION

Device

• Cordless phone (for home use)
• FM dual conversion communications equipment

Package Operating Temperature

MC3361N

16DIP

MC3361D

·16 SOP

-20 -

+ 70°C

BLOCK DIAGRAM
MUTE
SCAN
OUTPUT CONTROL

SQUELCH
INPUT

FILTER
OUTPUT

FILTER
INPUT

AUDIO
OUTPUT

~~---L-...,
SQUELCH TRIGGER CONTROL
CIRCUIT WITH HYSTERESIS

RF
INPUT
(10.7MHz)

osc

OSC

c8SAMSUNG
Electronics

MIXER
OUTPUT

vee

LIMITER
INPUT

DECOUPLING

DECOUPLING

QUADRATURE
INPUT

305

MC3361

LINEAR INTEGRATED CIRCUIT

PIN CONFIGURATION

osc

1

OSC

2

•

MIXER
OUTPUT

Vee

16

RF INPUT

15

GND

14

MUTE

SCAN
13 CONTROL

4

MC3361
LIMITER
INPUT
DECOUPLING 6

DECOUPLING

7

QUADR~~~n~

8

ABSOLUTE MAXIMUM RATINGS

12

SQUELCH
INPUT

11

FILTER
OUTPUT

FILTER
10 INPUT
AUDIO
OUTPUT

(Ta = 25°C)

Characteristic

Symbol

Value

Unit

Supply Voltage
Operating Voltage Range
Detector Input Voltage
RF Input Voltage (Vee~4.0V)
Mute Function
Operating Temperature
Storage Temperature

Vee (max)
Vee
Va
V'6
V'4
Topr
Tstg

10
2.5 to 7.0
1.0
1.0
-0.5 - +5.0
-20 -+70
-65 -+150

V
V
Vp-p
Vrms
Vpeak

°C
°C

Absolute maximum ratings are those values beyond which permanent damage to the device may occur. These
are stress ratings only and functional operation of the device at or beyond them is not implied. Long exposure
to these conditions may affect device reliability.

c8SAMSUNG
Electronics

306

LINEAR INTEGRATED CIRCUIT

MC3361

ELECTRICAL CHARACTERISTICS
(Vcc=4.0V, fo=10.7MHz, 6f= ±3KHz, f Moo =1KHz, Ta=25°C, unless otherwise specified)
Characteristic

Symbol

Test Conditions

Icc

Squelch off (V12 = 2V)
Squelch on (V12 = GND)

4.0
6.0

Input Limiting Voltage

VINL

- 3.0dB limiting

2.0

,N

Detector Output Voltage
Detector Output Impedance

Vg
Zoo

2.0
400

Vrlr.

100

160

mVrms

40

48

dB

Supply Current

Min

Typ

Max

Unit

mA
mA

(}

Audio Output Voltage

Vo

Filter Gain

AVF

Filter Output DC Voltage

VOF

1.5

V dc

Trigger Hysteresis of Filter

VTH

50

mV

Yin

= 10mV

f = 10KHz,

Yin

= 5mV

Mute Switch-on Resistance

RON

Mute "Low"

10

(}

Mute Switch-off Resistance

ROFF

Mute "High"

10

M(}

Scan Control "Low" Output

V13L

Scan Control "High" Output

V13H

Mixer Conversion Gain

AVM

24

dB

Mixer Input Resistance

RIM

3.3

K(}

Mixer Input Capacitance

CIM

2.2

pF

c8 !!e!'ISUNG

M ute off (V 12

=2V)

Mute on (V12=GND)

0.5

Vdc
Vdc

3.0

307

•

MC3361

LINEAR INTEGRATED CIRCUIT

PIN DESCRIPTION,
Pin No.

Name

1,2

OSC

Function

The crystal oscillator terminals for mixer conversion.
The colpitts oscillator is internally biased with a regulated current
source which assures proper operation over a wide supply range. The
collector, base and emitter terminals are at pins 4, 1, and 2
respectively. The crystal which is used in the parallel resonant mode,
may be replaced with an appropriate inductor if the application does
not require the stability of a crystal oscillator.
Vee
PIN 4

3, 16

Mixer Input,
(RF Input)
Mixer Output

The mixer input/output terminals. The mixer converts the input
frequency (10.7MHz) down to 455KHz. The mixer is double balanced
to reduce spurious response. The mixer output impedance will
properly match the input impedance of a ceramic filter which is used
as a bandpass filter coupling the mixer output to the IF limiting
amplifier. Following the mixer, a ceramic bandpass filter is
recommended. The 455KHz types come in bandwidth from ± 2KHz to
± 15KHz.
Power supply pin.

4

Vee

5, 6, 7

Limiter
Amp Input,
Decoupling

Limiter Amp inputs and decoupling terminals.
The IF limiter amplifier consists of five differential gain stag_es,
with the input, impedance set by 1.8KO resistor to properly terminate
the ceramic filter driving the IF. The IF output is connected to the
external quad coil at pin 8 via an internal 10pF capacitor. The
frequency limitation is due to the high resistance values in the IF,
which were necessary to meet the low power requirement. The output
of· the limiter is internally connected to the quadrature detector.

8, 9

Quadrature
Input, Audio
Output

Quadrature detector input and output terminals.
A conventional quadrature detector is used to demodulate the FM signal.
The Q of the quad coil, which is determined by the external resistor
placed across it, has multiple affects on the audio output. (QC:<:R)
Increasing the Q increases audio output level but because of nonlinearities in the tank phase characteristic, also increases distortion.
For proper operation, the voltage swing on pin 9 should be adequate
to prevent distortion (160mV rms typ). The detector output is amplified
and buffer~d to the audio output pin 9, which has an output
impedance-of approximately 4000.

c8SAMSUNG
Electronics

308

MC3361

LINEAR INTEGRATED CIRCUIT

PIN DESCRIPTION

(Continued)

Pin No.

Name

Function

10, 11

Filter Input!
Output

Filter Amp input/output terminals.
The inverting OP Amp is provided with an output at pin 11 providing
dc bias (externally) to the input at pin 10 which is referred internally to
0.7V. The OP Amp is normally utilized as either a bandpass filter to
extract a specific frequency from the audio output, such as a ring or
dial tone, or as a high pass filter to detect noise due to no input at
the mixer.

12, 13,
14

Squelch In,
Scan Control,
Mute Output

Squelch control input, scan control output, mute output terminals.
A low bias to pin 12 sets up the squelch trigger circuit such that pin 13
is high, and the audio mute (pin 14) is internally short circuited to
ground (typically 100 to GND). If pin 12 is raised above mute threshold
(0.7V) by the noise or tone detector, pin 13 (scan control output) will
become low level output and the audio mute will be an open circuit.
There is 50mV of hysteresis at pin 12 which effectively prevents jitter.

15

GND

GND pin.

TYPICAL APPLICATION CIRCUIT
vee

MURATA
CFU
4550

MC3361

0.11'J
TOKO TYPE
RMC·2A6597HM

In the above typical application, the audio signal is recovered using a conventional quadrature FM detector. The
absence of an input signal is indicated by the presence of noise above the desired audio frequencies. This "noise
band" is monitered by an active filter and a detector. A squelch trigger circuit indicates the presence of noise
(or a tone) by an output which can be used to control scanning. At the same time, an internal switch is operated
which can be used to mute the audio.

c8SAMSUNG
Electronics

309

•

NOTES

Voltage Regulator
Device

KA337
KA340
KA350.
KA3524
KA7500
KA78S40
KA78TXX
LM317
LM323
LM723
MC78XX
MC78LXX
MC78MXX
MC79XX
MC79LXX
MC79MXX

Package

Function

Page

3-Terminal Negative Adjustable Regulator
3-Terminal Positive Voltage Regulator
3 AMP Adjustable Positive Voltage Regulator
Regulator Pulse Width Modulator
Regulator Pulse Width Modulator
Switching Regulator
3A Positive Voltage Regulator
3-Terminal Positive Adjustable Regulator
3-Terminal Positive Voltage Regulator
Precision Voltage Regulator
3-Terminal 1A Positive Voltage Regulator
3-Terminal 0.1A Positive Voltage Regulator
3-Terminal 0.5A Positive Voltage Regulator
3-Terminal 1A Negative Voltage Regulator
3-Terminal 0.1A Negative Voltage Regulator
3-Terminal 0.5A Negative Voltage Regulator

TO-220
TO-220
TO-3PITO-220
16 DIP
16 DIP
16 DIP
TO-220
TO-220
14 DIP/14 SOP
14 DIP/14 SOP
TO-220
TO-92
TO-220
TO-220
TO-92
TO-220

Voltage Reference Diode
Voltage Reference Diode
Programmable Precision Reference

TO-92
TO-92
TO-92/8 DIP/8 SOP

458
462
466

8 DIP/8 SOP
8 DIP/8 SOP
14 DIP/14 SOP
10 SIP
14 DIP
8 DIP/8 SOP
8 DIP
8 DIP
14 DIP
14 DIP/14 SOP
14 DIP/14 SOP
8 DIP/8 SOP/9 SIP
14 DIP/14 SOP
14 DIPf14 SOP
8 DIP/8 SOP/9 SIP
8 DIP/8 SOP
14 DIP/14 SOP
8 DIP/8 SOP/9 SIP
8 DIP/8 SOP/9 SIP
14 DIP/14 SOP
14 DIP/14 SOP
8 DIP/8 SOP/9 SIP

472
472
477
484
486
488
490
492
496
500
509
515
500
509
515
523
500
515
529
533
533
540

j

j

313
317
329
337
345
349
355
366
371
376
382
413
424
437
447
452

Voltage Reference
1

KA336-2.5
KA336-5.0
KA431

I

I

Operational Amplifier

I

KA201A
KA301A
KA733C
KA9256
KF347
KF351
KF442
KS272
KS274
LM224/A
LM248
LM258/A
LM324/A
M348

r

M;$Ots/A

LM741C/EII
LM2902
LM2904
MC1458AC/C/SII
MC3303
MC3403
MC4558C/ACII

Single Operational Amplifier
Single Operational Amplifier
Differential Video Amplifier
Dual Power Operational Amplifier
Quad Operational Amplifier
Single Operational Amplifier
Dual Operational Amplifier
Dual Operational Amplifier
Quad Operational Amplifier
Quad Operational Amplifier
Quad Operational Amplifier
Quad Operational Amplifier
Quad Operational Amplifier
Quad Operational Amplifier
Quad Uperatlonal ArtlpliHor
Single Operational Amplifier
Quad Operational Amplifier
Dual Operational Amplifier
Dual Operational Amplifier
Quad Operational Amplifier
Quad Operational Amplifier
Dual Operational Amplifier

I
I

Voltage Comparator
KA219
KA319
KA710CII
KA711CII
LM239/A
LM293/A
LM311
LM339/A
LM393/A
LM2901
LM2903
LM3302

Dual High Speed Voltage Comparator
Dual High Speed Voltage Comparator
High Speed Voltage Comparator
Dual High Speed Differential Comparator
Quad Differential Comparator
Dual Differential Comparator
Voltage Comparator
Quad Differential Comparator
Dual Differential Comparator
Quad Differential Comparator
Dual Differential Comparator
Quad Differential Comparator

14 DIP/14 SOP
14 DIP/14 SOP
14 DIPI14 SOP
14 DIP/14 SOP
14 DIP/14 SOP
8 DIP/8 SOP/9 SIP
8 DIP/8 SOP
14 DIP/14 SOP
8 DIP/8 SOP/9 SIP
14 DIPI14 SOP
8 DIP/8 SOP
14 DIP/14 SOP

545
545
550
554
557
565
572
557
565
557
565
557

CMOS Timer
CMOS Timer
CMOS Dual Timer
Timer
Dual Timer
Quad Timer

8 DIP/8 SOP
8 DIP/8 SOP
14. DIPI14 SOP
8 DIP/8 SOP
14 DIP/14 SOP
16 DIPI16 SOP

577
582
586
590
594
597

Timer
KS555
KS555H
KS556
NE555
NE556
NE558

I"

I,illl

LINEAR INTEGRATED CIRCUIT

KA337

3·TERMINAL NEGATIVE
ADJUSTABLE REGULATOR

TO·220

The KA337 is a 3-terminal negative adjustable regulator.
It suppty in excess of -1.5A over an output voltage
range of -1.2V to - 37V.
This regulator requires only two external resistor to set
a output voltage and 1 capacitor to compensate
frequency.

FEATURES
Output current in excess of - 1.SA
Output voltage adjustable between - 0.2V & - 37V
Internal thermal·overload protection
Internal short·circuit current-limiting
constant with temperature
• Output transistor safe· area compensation
• Floating operation for high,voltage applications
• Standard 3'pin, TO·220 package
•
•
•
•

1: Adj 2: Input 3: Output

ORDERING INFORMATION
Device

TO-220

**KA237T

TO-220

Operation Temperature
0- + 125°C
-25 - + 150°C

** Under development

APPLICATION CIRCUIT

KA337

L,

Package

KA337T

I-----------~------O

- VOUT

ADJ

C2

* - VOUT = -1.25V (1 + R2/1200) + (-ladj*R2)
* Output current depends on maximum power dissipation

c8SAMSUNG
Electronics

313

•

KA337

LINEAR INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

VaJue

Unit

Input-Output Voltage Differential
Power Dissipation
Operating Temperature Range
Storage Temperature Range

V1wVbuT
Po
Topr
Tstg

40
Internally limited
0- + 125
-65 - + 150

V
°C
°C

ELECTRICAL CHARACTERISTICS
(Vin-Vout=5V, lout = -0.5A, 0°C::s;Tj::s;125°C, Pmax =20W, unless otherwise specified)

Characteristic

Line Regulation

Load Regulation
Adjustable Pin Current

Symbol

Vo

Vo

Vref

Temperature Stability

Ts

h (min)

,

en

Ripple Rejection

RR

Max

Ta=25°C
- 40V ::s;VOUT - V1N::s; - 3V

0.01

0.04

-40VVoor =100mV

2.5

55

I

'"

i'.....

S
15II:

I

"'1\

I-

II:

::>
0

1.5

,

~

I-

::>

IL
I-

::>
0

l"- I-.5

35

30
-50

o
-25

25

50

75

100

125

150

o

10

15

20

25

30

35

INPUT·OUTPUT DIFFERENTIAL (V)
TEMPERATURE (OC)

Fig. 6 LOAD TRANSIENT RESPONSE

Fig. 5 LOAD REGULATION
0.2"""-.,....----.---r-----,.--,---r--r--I""""I

1f::;::::::j:::;::::t:::::4==:t= i'l = O.SA
l

W

t----

::::--t--+---+~-_+r--.....---=""_I

i _'O.4I----+--+-+----+-~-_+r--.....~....t__"=-1-.5_+A-~
-0.21-----t---+--......

~ -0.61----+--+-+--t--+--+~-~"'--I

,

~

g -0.8l----+--+--+--+---+--+--+--.lI

~

o

0.6

~~

00

;:~

O. 4

o.2

v

-1.21-----+--+--+--+---+-c7=5-+--+-----j

-1.4_1.:50:::--....1._2=5-J..----:l:""5-50J..----I--1~OO--:-:!12:""5----1
150
2

~)

TEMPERATURE (OC)

c8SAMSUNG
Electronics

O

-

.\~ I--.

1... -C J=1OI'F
A

-0.2

-0.4

1'1\

IV

/

S -0.6

ffi

-1.0J----+--+--+--+---+--+--+------.j
VIN= -15V
oor = -10V

II

,CAeT

J.. ...

~~

!;c
o

I

/"I

II:
II:

::>

0-0.5

cc(

g -1.0
-1.5

~

,

\

V'N= -15V
Voor = -10V
INl=50mA
T1=25°C
Cl
I =1r

10

20

)

I

V

I
30

40

TIMElI's)

316

KA340XX

LINEAR INTEGRATED CIRCUIT
I.::--~-~

3-TERMINAL POSITIVE VOLTAGE
REGULATORS

I

I

TC>220

The KA340XX series of three-terminal positive voltage
regulators are available in TO-220 package and with
several fixed output voltages, providing better performance than 78XX series regulators. These are designed
to have outstanding ripple rejection, superior line and
load regulation in high power applications (over 15W).
Each type employs internal current limiting, thermal
shutdown and safe area protection.
Although designed primarily as fixed voltage regulators,
these devices can be used with external components
to obtain adjustable voltage and currents.

FEATURES
•
•
•
•
•
•
•

Maximum output current: 1.5A
Output voltage of 5, 6, 8, 9, 10, 11, 12, 15, 18, 24V
Superior line and load regulation than 78XX series
Output transistor SOA protection
Internal short·circuit current limit
Thermal overload protection
Output voltage tolerances of :!: 4% at 25°C and
:!: 5% over the temperature ,range

I

1: Input 2: GND 3: Output

ORDERING INFORMATION
Operating Temperature

BLOCK DIAGRAM

SERIES
PASS
ELEMENT

OUTPUT

~--~------------------------------+---------------------------~~O

GND

=8SAMSUNG
Electronics

317

LINEAR INTEGRATED CIRCUIT

KA340XX

SCHEMATIC DIAGRAM
r----,-------~---------~~-___r--....__---...___{) VIN

Q11

R16

L----+---+------4------ili..---oVOUT
R20

01

R21

~~--~----~-~--~--*--~~-~--~---~-oGNO

ABSOLUTE MAXIMUM RATINGS
Characteristic

Input Voltage (for Vo = 5V)
Thermal Resistance Junction-Cases
Thermal Resistance Junction-Air
Junction Operating Temperature
Storage Temperature

c8 !e!'lSUNG

Symbol

Value

Vi

35
5
65
0-+150
-65 - +150

e jc

e ja
ToP!
Tstg

Unit

V
°CIW
°CIW

°C
°C

318

LINEAR INTEGRATED CIRCUIT

KA340XX

ELECTRICAL CHARACTERISTICS KA340TOS
(Refer to test circuit, O°C ~Tj~ 125°C, Vi = 10V, 10 = 0.5A, unless otherwise specified)

Characteristic

Symbol

Test Conditions
Tj =25°C,

Output Voltage

Vo

5mA~lo~1.0A

5mA~lo~1.0A, PD~15W

Vi = 7.5V to 20V

Line Regulation

Id

Output Noise Voltage

Ripple Rejection

5.25

3

50
50

Vi =8V to 12V

-

-

25

Vi = 7.5V to 20V
Tj = 25°C

-

-

50

5mA~lo~1.5A

-

10

50

0.25A~lo~0.75A

-

-

25

-

-

50

Tj = 25°C

-

-

8

0°C~Tj~125°C

-

-

8.5
0.5

-

-

1.0

Tj = 25°C

10= 1A

V

mV

mV

mA

Vi = 7V to 25V

-

-

1.0

Vn

Ta=25°C, f=10Hz to 100KHz

-

40

-

80

-

62

-

-

10 = 1A, Tj = 25°C

-

2.0

-

V

Tj = 25°C

-

2.2

Vi = 35V, Tj = 25°C

250

-

A

-0.6
17

RR

Vd

Ipeak
Ise

Output Resistance

-

61d

Short-Circuit Current
YOU!

4.75

Unit

Tj = 25°C
lo~ 1A, Vi = 7.5V to 20V

Peak Output Current

Average TC of

5.20

-

f = 120Hz, Vi = 8V to 18V
Tj = 25°C
f = 120Hz, Vi =8V to 18V
0°C~Tj~125°C

.Dropout Voltage

5.00

-

5mA~lo~1A

Quiescent Current
Change

4.80

-

5mA~lo~1A

Quiescent Cu rrent

Max

Vi =8V to 20V
6V o

6Vo

Typ

Tj =25°C, Vi =7V to 25V

10~1A

Load Regulation

Min

62

..

mA

/LV

dB

6V o/6T

10=5mA

-

Ro

f=1KHz

-

-

mA
mV/OC

t mO.,

* Load and line regulation are specified at a constant junction temperature. Changes in Vo due to heating effects

must be taken into account separately. Pulse testing with low duty cycle is used.

c8SAMSUNG
Electronics

319

•

KA340XX

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS KA340T06
(Refer to test circuit, O°C;s;Tj;S; 12SoC, Vi = 11V, 10 = O.SA, unless otherwise specified)

Characteristic

Output Voltage

Vo

Line Regulation

Test Conditions

Min

Typ

Max

Tj =2SoC, SmA;s;lo;s;1.0A

S.7S

6.00

6.26

SmA;s;lo;s;1.0A, PD;S;1SW
Vi = 8.SV to 21V

S.70

-

6.30

Symbol

Tj = 2Soc, Vi = 8V to 2SV

-

3

60

Vi =9V to 21V

-

-

60

Vi =9V to 13V

-

-

30

Vi = 8.SV to 21V
Tj = 2SoC

-

-

60

SmA;s;lo;s;1.SA

-

10

60

0.2SA;S;lo;S;0.7SA

-

-

30

-

-

60

Tj =2SOC

-

-

8

0°C;S;Tj;S;125°C

-

-

8.5

-

-

0.5

-

-

1.0

6V o
10;s;1A

Load Regulation

6V o

T j = 2SoC

SmA;s;l o ;s;1A
Quiescent Current

Id

10= 1A

5mA;s;lo;s;1A
Quiescent Current
Change

61d

Output Noise Voltage

Vn

Ripple Rejection

RR

. Tj =25°C
10;s;1A, Vi =8.5V to 22V
Vi =8V to 2SV

-

-

1.0

Ta = 2SoC, f = 10Hz to 100KHz

-

45

-

f = 120Hz, Vi = 9V to 19V
Tj = 25°C

59

75

-

59

-

-

-

2.0

-

f = 120Hz, Vi = 9V to 19V
0~C;S;Tj~125°C

Dropout Voltage

Vd

Peak Output Current

Ipeak

Short-Circuit Current

Ise

Average TC of

YOU!

Output Resistance

10 = 1A, Tj = 2SoC

Unit

V

mV

mV

rnA

rnA

p.V

dB

V

Tj = 2SoC

-

2.2

-

A

Vi = 35V, Tj = 25°C

-

250

-

rnA

6V o /6T

10=5mA

-

-0.7

-

mV/oC

Ro

f=1KHz

-

18

-

rna

* Load and line regulation are specified at a constant junction temperature. Changes in Vo due to heating effects

must be taken into account" separately. Pulse testing with low duty cycle is used.

c8~UNG

320

KA340XX

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS KA340T08
(Refer to test circuit, 0°C::;;Tj::;;125°C, Vi =14V, 10 = 0.5A, unless otherwise specified)

Characteristic

Output Voltage

Line Regulation

Min

Typ

Max

Tj =25°C,5mA::;;l o ::;;1.0A

7.70

8.00

8.30

5mA::;;lo::;; 1.0A, PD::;;15W
Vi = 10.5V to 23V

7.60

-

8.40
80

Symbol

Vo

Test Conditions

Tj = 25°C, Vi = 10.5V to 25V

-

3

Vi = 11V to 23V

-

-

80

Vi = 11.5V to 17V

-

-

40

Vi = 10.5V to 23V
Tj = 25°C

-

-

80

DVo
10::;;1A

Load Regulation

Tj = 25°C

5mA::;; '0::;; 1.5A

-

10

80

0.25A::;;I0::;;0.75A

-

40

Quiescent Current
Change

0.5

Output Noise Voltage

Ripple Rejection

mV

5mA::;;lo::;;1A

-

Did

Tj = 25°C
'0::;; 1A, Vi = 10.5V to 23V

-

-

1.0

Vi = 10.5V to 25V

-

-

1.0

Vn

Ta=25°C, f=10Hz to 100KHz

-

52

-

f = 120Hz, Vi = 11.5V to 21.5V
Tj = 25°C

56

72

-

f = 120Hz, Vi = 11.5V to 21.5V
0°C::;;Tj::;;125°C

56

-

-

--

2.0

mV/oC
mn

..

-

Id

RR

10= 1A

Tj = 25°C

-

0°C~Tj::;;125°C

-

Dropout Voltage

Vd

10 = 1A, Tj =25°C

Peak Output Current

Ipeak

Tj =25°C

8
8.5

-

250

DVo/DT

10=5mA

-

-0.9

Output Resistance

Ro

f=1KHz

-

20

-

Vi =35V, Tj

=25°C

mA

mA

p.V

dB

Average TC of VOU!

Ise

mV

80

-

Short-Circuit Current

V

-

Ii Vo

5mA::;; '0::;; 1A
Quiescent Current

Unit

2.2

V
A
mA

* Load and line regulation are specified at a constant junction temperature. Changes in Vo due to heating effects

must be taken into account separately. Pulse testing with low duty cycle is used.

c8SAMSUNG
Electronics

321

I

KA340XX

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS KA340T09
(Refer to test circuit, QOC5Ti5125°C, Vi =15V, 10=0.5A, unless otherwise specified)

Characteristic

Output Voltage

Min

Typ

Max

Tj = 25°C, 5mA51051.0A

8.65

9.00

9.35

5mA51051.0A, PD515W
Vi = 11.5V to 24V

8.60

-

9.40

-

3

90

-

90

Vi = 12V to 19V

-

-

45

Vi = 11.5V to 24V
Tj = 25°C

-

-

90

5mA5 1051.5A

-

10

90

0.25A 510 5 O. 75A

-

-

45

-

-

90

Test Conditions

Symbol

Vo

Tj = 25°C, Vi = 11.5V to 25V
Vi = 12V to 24V
Line Regulation

6V o
1051A

Load Regulation

6Vo

Tj =25°C

5mA5 1051A
Quiescent Current

Quiescent Current
Change

Output Noise Voltage

Ripple Rejection

Dropout Voltage

Id

61d

Vn

RR

Vd

Peak Output Current

Ipeak

Short-Circuit Current

Isc

10= 1A

Tj =25°C

-

-

8

0°C5 Tj5125°C

-

8.5
0.5

Unit

V

mV

mV

mA

5mA5 1051A

-

-

Tj = 25°C
1051A, Vi = 11.5V to 24V

-

-

1.0

Vi= 11.5V to 25V

-

-

1.0

Ta =25°C, f=10Hz to 100KHz

-

58

-

f = 120Hz, Vi = 12.5V to 22.5V
Tj =25°C

56

72

-

f = 120Hz, Vi = 12.5V to 22.5V
0°C5 Tj5125°C

56

-

-

10=1A, Tj =25°C

-

2.0

-

Tj = 25°C

-

2.2

-

A

250

mA

-1.0

-

mV/oC

22

-

mO

Vi = 35V, Tj = 25°C

Average TC of Vout

6V o/6T

10=5mA

Output Resistance

Ro

f=1KHz

mA

p.V

dB

V

* Load and line regulation are specified at a constant junction temperature. Changes in Vo due to heating effects

must be taken into account separately. Pulse testing with low duty cycle is used .

.c8SAMSUNG
Electronics

322

KA340XX

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS KA340T10
(Refer to test circuit, 0°C::s;Tj::s;125°C, Vi = 16V, 10 = 0.5A, unless otherwise specified)

Characteristic

Output Voltage

Line Regulation

Symbol

Vo

Test Conditions

Min

Typ

Max

Tj =25°C,5mA::s;l o ::s;1.0A

9.60

10.00

10.40

5mA::s;lo::s;1.0A, PD::s;15W
Vi = 12.5V to 25V

9.50

Load Regulation

-

3

100

-

-

100

Vi = 12.5V to 25V
Tj =25°C

-

-

100

SmA::s;lo::s;1.SA

-

10

100

-

100

-

8

-

O.S

Vi = 13V to 20V

Tj =25°C
0.25A::s;lo::s;0.75A
SmA::s;lo::s;1A

Quiescent Current

Tj =25°C
Id

10.50

Vi = 13V to 25V

10::s;1A

!:,.Vo

V

-

Tj =25°C, Vi=12.5V to 25V
!:,.V o

10= 1A

0°C::s;Tj::s;125°C

5mA::s;lo::s;1A

50

50

!:"Id

Tj = 25°C
10::S; 1A, Vi = 12.6V to 25V

-

-

1.0

Vi = 12.6V to 25V

1.0

Vn

Ta = 2SoC, f = 10Hz to 100KHz

-

-

Output Noise Voltage

S8

-

f = 120Hz, Vi = 13V to 23V
Tj = 25°C

56

72

-

f = 120Hz, Vi = 13V to 23V
0°C::s;Tj::s;125°C

56

-

-

RR

mV

mV

rnA

8.S

Quiescent Current
Change

Ripple Rejection

Unit

rnA

IN

dB

Dropout Voltage

Vd

10 = 1A, Tj = 25°C

-

2.0

-

V

Peak Output Current

I peak

Tj =25°C

-

2.2

A

Vi = 3SV, Tj = 2SoC

-

-1.1

-

Short·Circuit Current

Isc

Average TC of V aut

!:"Vo/6T

10=5mA

Output Resistance

Ro

f=1KHz

2S0

24

rnA

mV/oC
mO

* Load and line regulation are specified at a constant junction temperature. Changes in Vo due to heating effects
must be taken into account separately. Pulse testing with low duty cycle is used.

c8SAMSUNG
Electronics

323

•

KA340XX

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS KA340T11
(Refer to test circuit, O°C;:s;Tj;:S; 125°C, Vi = 18V, 10 = 0.5A, unless otherwise specified)

Characteristic

Output Voltage

Min

Typ

Max

Tj =25°C,5mA;:s;l o ;:s;1.0A

11.60

11.00

11.40

5mA;:s;lo;:s;1.0A, PD;:s;15W
Vi = 13.5V to 26V

10.50

-

-

3

110

-

110

Vi = 14V to 21V

-

-

55

Vi = 13.5V to 26V
Tj = 25°C

-

-

110

5mA;:s;lo;:s;1.5A

-

10

110

0.25A;:s;lo;:s;0.75A

-

-

55

-

-

110

Test Conditions

Symbol

Vo

Tj = 25°C, Vi = 13.5V to 25V
Vi = 14V to 26V
Line Regulation

f-,V o
10;:s;1A

Load Regulation

f-,V o

Tj =25°C

5mA;:s;lo;:s;1A
Quiescent Current

Tj =25°C
Id

10= 1A

O°C;:s;Tj;:S; 125°C

5mA;:s;lo;:s;1A

11.50

-

8

-

8.5

-

0.5

-

1.0

Quiescent Current
Change

f-,I d

Tj = 25°C
10;:S; 1A, Vi = 13.7V to 26V

-

Vi = 13.5V to 25V

-

-

1.0

Output Noise Voltage

Vn

Ta = 25°C, f = 10Hz to 100KHz

-

70

-

f = 120Hz, Vi = 14V to 24V
Tj =25°C

55

72

-

f=120Hz, Vi =14V to 24V
o°C;:s; Tj;:s; 125°C

55

-

-

Ripple Rejection

RR

Average TC of Vout

f-,Vo/f-,T

10=5mA

Output Resistance

Ro

f=1KHz

-

Vd

10 = 1A, Tj = 25°C

Peak Output Current

Ipeak

Tj =25°C

Short-Circuit Current

Isc

Vi = 35V, Tj = 25°C

V

mV

mV

mA

mA

p.V

dB

-

Dropout Voltage

Unit

2.0

-

V

2.2

-

A

250

-

mV/oC

-1.3
26

mA

mO

• Load and line regulation are specified at a constant junction temperature. Changes in Vo due to heating effects
must be taken into account separately. Pulse testing with low duty cycle is used.

c8SAMSUNG
Electronics

324

KA340XX

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS KA340T12
(Refer to test circuit,

O°C~Tj~ 125°C,

Characteristic

VI = 19V, 10 = 0.5A, unless otherwise specified)

Symbol

Test Conditions

Tj = 25°C,
Output Voltage

Vo

5mA~lo~1.0A

5mA~lo~1.0A, PD~15W

Vi = 14.5V to 27V
Tj = 25°C, Vi = 14.5V to 30V
Vi = 15V to 27V
Line Regulation

l:,.Vo

Vi = 16V to 22V
10~1A

Load Regulation

f'::"V o

Tj = 25°C

Vj = 14.6V to 27V
Tj = 25°C
5mA~lo~1.5A

0.25A ~ '0 ~ O. 75A

5mA~lo~1A

Quiescent Current

Id

10= 1A

Tj =25°C
0° C ~ Tj ~ 125 ° C

5mA~lo~1A

Quiescent Current
Change

Output Noise Voltage

Ripple Rejection

f'::" Id

Vn

RR

Min

Typ

Max

11.50

12.00

12.50

11.40

-

12.60

-

4

120

-

120

-

-

120

-

60

12

120

-

120

-

8

-

8.5
0.5

60

Tj = 25°C
lo~ 1A, Vi = 14.BV to 27V

-

-

1.0

Vi = 14.5V to 30V

-

-

1.0

75

-

55

72

-

55

-

-

Ta = 25°C, f = 10Hz to 100KHz
f = 120Hz, Vi = 15V to 25V
Tj =25°C

"

f = 120Hz, Vi = 15V to 25V
0°C~Tj~125°C

Unit

V

mV

mV

mA

mA

p.V

dB

Dropout Voltage

Vd

10 = 1A, Tj = 25°C

-

2.0

-

V

Peak Output Current

Ipeak

Tj =25°C

-

2.2

-

A

-

mV/oC

Vi = 35V, Tj = 25°C

-

250

Average TC of Vout

f'::"Vo/f'::"T

10=5mA

-

-1.5

Output Resistance

Ro

f= 1KHz

-

28

Short-Circu it Current

Isc

mA

mO

* Load and line regulation are specified at a const~nt junction temperature. Changes in Vo due to heating effects

must be taken into account separately. Pulse testing with low duty cycle is used.

c8SAMSUNG
Electronics

325

•

LINEAR INTEGRATED CIRCUIT

KA340XX

ELECTRICAL CHARACTERISTICS KA340T15
(Refer to test circuit, O°C:sTj:s 125°C, Vi = 23V, 10 = 0.5A, unless otherwise specified)

Characteristic

Output Voltage

Line Regulation

Min

Typ

Max

Tj = 25°C, 5mA:slo:s1.0A

14.40

15.00

15.60

5mA:slo:s1.0A, PD:s;15W
Vi = 17.5V to 30V

14.25

-

15.75

Test Conditions

Symbol

Vo

Tj =25°C, Vi = 17.5V to 30V

-

4

150

Vi = 18.5V to 30V

-

150

Vi = 20V to 26V

-

-

Vi = 17.7V to 30V
Tj =25°C

-

-

120

5mA:slo:s;1.5A

-

12

150

-

75

-

-

150

-

-

8.5
0.5

-

-

1.0

Vi = 17.5V to 30V

-

-

1.0

90

-

f = 120Hz, Vi = 18.5V to 28.5V
Tj =25°C

54

70

-

f = 120Hz, Vi = 15V to 25V
O°C:sTj:S; 125°C

54

-

-

10 = 1A, Tj = 25°C

-

2.0

Tj =25°C

-

2.2

-

6Vo
10:s;1A

Load Regulation

6Vo

Tj =25°C

O.25A:slo:s0.75A

5mA:slo:s1A
Quiescent Current

Id

10= 1A

Tj =25°C
0°C:s;Tj:s;125°C

5mA:s;lo:s1A
Quiescent Current
Change

6 1d

Tj =25°C
10:S 1A, Vi = 17.9V to 30V

Output Noise Voltage

Vn

Ta = 25°C, f = 10Hz to 100KHz

Ripple Rejection

RR

Dropout Voltage
Peak Output Current
Short-Circuit Current

Vd
Ipeak
Isc

Vi = 35V, Tj = 25°C

Average TC of Vout

6V o/6T

10=5mA

Output Resistance

Ro

f=1KHz

60

8

Unit

V

mV

mV

mA

mA

p.V

dB

250
-1.8
29

V
A
mA
mV/oC

mO

* Load and line regulation are specified at a constant junction temperature. Changes in Vo due to heating effects
must be taken into account separately. Pulse testing with low duty cycle is used.

c8SAMSUNG
Electronics

326

KA340XX

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS KA340T18
(Refer to test circuit, 0°C::s;Tj::s;125°C, Vi =27V, 10=0.5A, unless otherwise specified)

Characteristic

Output Voltage

Min

Typ

Max

Tj = 25°C, 5mA::s;lo::s;1.0A

17.30

18.00

18.70

5mA::s;lo::s;1.0A, PD::s;15W
Vi = 21V to 33V

17.10

Symbol

Vo

Test Conditions

5

180

-

180

-

90

Vi = 21V to 33V
Tj = 25°C

-

-

180

5mA::s;lo::s;1.5A

-

12

180

-

-

-

1.0

Vi = 22V to 33V
f::.Vo

Vi = 24V to 30V
10::s;1A

Load Regulation

f::.Vo

Tj =25°C

0.25A::s; 10::S; O. 75A

5mA::s;l o ::s;1A
Quiescent Current

Id

10= 1A

18.90

-

Tj = 25°C, Vi = 21V to 33V
Line Regulation

-

Tj =25°C
0°C::s;Tj::s;125°C

5mA::s;lo::s;1A

90

8

Vi = 21V to 33V

-

-

1.0

Output Noise Voltage

Vn

Ta=25°C, f=10Hz to 100KHz

-

110

53

69

Ripple Rejection

RR

f = 120Hz, Vi = 22V to 32V
Tj =25°C

-

f = 120Hz, Vi = 22V to 32V
O°C::s;Tj::s;125°C

53

-

-

-

2.0

Tj =25°C

-

Ipeak

10 = 1A, Tj = 25°C

2.2

Vi = 35V, Tj = 25°C

-

250

f::.Volf::.T

10=5mA

-

-2.2

Output Resistance

Ro

f=1KHz

-

32

Isc

mA

mA

p.V

dB

Average TC of Vout

Short-Circuit Current

I

mV

0.5

L':dd

Vd

mV

8.5

Tj = 25°C
10::S; 1A, Vi = 21.5V to 33V

Peak Output C!Jrrent

V

180

Quiescent Current
Change

Dropout Voltage

Unit

V
A
mA
mV/oC
mO

* Load and line regulation are specified at a constant junction temperature. Changes in Vo due to heating effects

must be taken into account separately. Pulse testing with low duty cycle is used.

c8SAMSUNG
Electronics

327

KA340XX

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS KA340T24
(Refer to test circuit, 0°C::;Tj::;125°C, Vi = 33V, 10 = 0.5A, unless otherwise specified)

Characteristic

Output Voltage

Min

Typ

Max

Tj =25°C,5mA::;l o ::;1.0A

23.00

24.00

25.00

5mA ::;lo::;1.0A, PD ::;15W
Vi = 27V to 38V

22.80

-

25.20

-

5

240

-

240

-

120

Vi = 27V to 38V
Tj = 25°C

-

-

240

5mA ::;10 ::;1.5A

12

240

-

240

Tj =25°C

-

0°C::;Tj::;125°C

-

-

8.5

Test Conditions

Symbol

Vo

Tj =25°C, Vi =27V to 38V
Vi = 28V to 38V
Line Regulation

6Vo

Vi = 30V to 36V
10::;1A

Load Regulation

6V o

Tj =25°C

0.25A ::;10::; 0.75A

5mA::; 10 ::; 1A
Quiescent Current

Id

10= 1A

120

8

5mA::;lo::;1A

-

-

0.5

61d

Tj =25°C
10::;1A, Vi = 28V to 38V

-

-

1.0

Vi = 27V to 38V

-

-

1.0

Output Noise Voltage

Vn

Ta = 25°C, f

-

170

-

50

66

-

Ripple Rejection

RR

50

-

-

-

2.0

-

Quiescent Current
Change

=10Hz to 100KHz

=
=28V to 38V
=
f =120Hz, Vi =28V to 38V

f 120Hz, Vi
Tj 25°C

0°C::;Tj::;125°C
Dropout Voltage

Vd

Peak Output Current

Ipeak

Short-Circu it Current

Ise

Average TC of Vout

6V o/6T

Output Resistance

Ro

=1A, Tj =25°C
Tj =25°C
10

Vi

=35V, Tj =25°C

10=5mA
f

=1KHz

Unit

V

mV

mV

mA

mA

p.V

dB

V

-

2.2

-

A

-

250

-

mA

-2.8
37

mV/oC
mn

* Load and line regulation are specified at a constant junction temperature. Changes in Vo due to heating effects

must be taken into account separately. Pulse testing with low duty cycle is used.

c8SAMSUNG
Electronics
.

328

LINEAR INTEGRATED CIRCUIT

KA350

T0-3P

3A ADJUSTABLE POSITIVE VOLTAGE
REGULATOR
The KA350 is adjustable 3·terminal positive voltage regulator capable
of supplying in excess of 3.0A over an output voltage range of 1.2V to 33V.
This voltage regulator is exceptionally easy to use and require only two
external resistors to set the output voltage. Further, they employ internal
current limiting, thermal shutdown and safe area compensation, making
them essentially blow-out proof. All overload protection circuitry remains
fully functional even if the adjustment terminal is accidentally
disconnected.

FEATURES
•
•
•
•
•
•
•
•
•
•

Output adjustable between 1.2V and 33V
Guaranteed 3A output current
Internal thermal overload protection
Load regulation typically 0.1 %
Line regulation typically 0.005%N
Internal short·circuit current limiting constant
with temperature.
Output transistor safe·area compensation
Floating operation for high voltage application
Standard 3·lead transistor package
Eliminates stocking many fixed voltages

1: Ad! 2: Output 3: Input

Device

Package

KA350H

TO·3P

KA350T

TO·220

Operating Temperature

o -125°C

BLOCK DIAGRAM

VOLTAGE
REFERENCE
PROTECTION
CIRCUITRY
RSC

ADJUSTABLE

c8SAMSUNG
Electronics

OUTPUT

329

•

KA350

LINEAR INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristic
Input-Output Voltage Differential
Lead Temperature
(Soldering, 10 sec)

Symbol

Value

Unit

YIN - VOUT

35

Voc

T'ead

300

°C

Po

Internally limited

Power Dissipation
Operating Junction Temperature Range

Topr

o-

+ 125

°C

Storage Temperature Range

T stg

-65 -

4-150

°C

ELECTRICAL CHARACTERISTICS
(V'N-VOUT =5V, IOUT=1.5A, Tj=O°C to 125°C; Pmax , unless otherwise specified)
Characteristic

Symbol

Test Conditions

Line Regulation

6Vo

Ta=25°C,3VsV,-Vos35V
(Note 1)

Load Regulation

6Vo

Ta= 25°C, 10mAslos3A
Vos5V (Note 1)
Vo~5V (Note 1)

Adjustment Pin Current

Min

ladj

Adjustment Pin Current Change

61 adj

3VSV,-Vos35V,
10mAs1 L s3A, POSPMAX

Thermal Regulation

REG therm

Reference Voltage

VREF

3V 5,V,- Vo5,35V, 10mA5,lo5,3A, P5,30W

Line Regulation

6V o

3.0VSV,- VoS35V

Load Regulation

6Vo

10mAslos3.0A
Vos5.0V

Ts

1.2

0.03

%N

5
0.1

25
0.5

mV

50

100

/LA

0.2

5.0

/LA

%

%fW

1.25

1.30

V

0.02

0.07

%N

20
0.3

70
1.5

mV
%

%

3.0

4.5

A

V,-V o=30V, POSPMAX, Ta=25°C

0.25

1.0

A

Minimum Load Current

IM'N

RMS Noise, % of VOUT

VN

10HzSfS10KHz, Ta=25°C

RR

Vo=10V, f=120Hz,
Cadj =0
Cadj = 10/LF

S

0.005

V,- VoS10V, POSPMAX

IMAX

Long-Term Stability

Unit

1.0

Tj =O°C to 125°C

Maximum Output Current

Ripple Rejection

Max

0.002

Pulse = 20mS, Ta= 25°C

Vo~5.0V

Temperature Stability

Typ

V,-V o=35V

Tj = 125°C

3.5

66

10

mA

0.003

%

65
80

dB
dB

0.3

1

%

Note 1: Regulation is measured at constant junction temperature. Changes in output voltage due to heating effects
must be taken into account separately. Pulse testing with low duty cycle is used.

c8SAMSUNG
Electronics

330

KA3S0

LINEAR INTEGRATED CIRCUIT

TYPICAL PERFORMANCE CHARACTERISTIC
Fig. 2 WRREN UMIT

Fig. 1 LOAD REGULATION

T,=25"C
LWQUT=l00mV

0.4

~
ILl

CI

0.2

"\.

z

c

-

:z::
()
ILl

c:J

~-0.2

~

-

k=500mA-

~- ~

\,

~~

5-0.4
I!:

'\ '-

--+

~

~-0.6

>



I-

~

~

0

I

I-

it

1.5

iii!:
40

oj
I

->

35

o

25

50

75

100

25

125

Fig. 5 TEMPERATURE STABILITY

T,=25"C

--......r--..-

ILl

~
~

1

--.......

z
ILl
rr:
~
()

I-

~

1/1
ILl

ffi

lI!

S

0

.J 1,230

,

2.5

V

1.5

.l

.5
1,220

50

75

100

TJ, JUNCTION TEMPERATURE (OC)

c8SAMSUNG
Electronics

125

i
,

3.5

125

o

/

/V

ffi
()

25

I

I-

~1,240

o

100

Fig. 6 MINIMUM LOAD CURRENT
4.5

1,260

~1,250

75

50

TJ, JUNCTION TEMPERATURE (OC)

TJ, JUNCTION TEMPERATURE (OC)

I~

C---/~I

I
I
o

i

10
15
20
25
30
35
V,-v", INPUT-OUTPUT VOLTAGE DIFFERENTIAL (V..)

331

KA350

LINEAR INTEGRATED CIRCUIT

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 8 RIPPLE REJECTION vs loUT

Fig. 7 RIPPLE REJECTION vs Vour
140

100

I

...

80
~

~

120

'~........

iii'

z
2

CA"j=10I'F

60

r-----

iii' 100
~

.1

z

'"'"- Codl=O

~
~

Ul

a:
w

..J

""-

...-

0

w
""-

..J

40

80

-

V

60

iii:

a:
a:

N

C""I=O
40
V,=15V

20 f-V,-Vo=5V
1,=500mA
f-f=120Hz
TJ=r5 'C

r- Vo=10V

20

--

f= 120Hz
TJ=25'C

'J III

o
10

15

20

25

30

35

0.1

0.Q1

Yo. OUTPUT VOLTAGE (V)

Fig. 9 RIPPLE REJECTION vs FREQUENCY

....

/
1"---.
V/ ~ ~
V
~ \
f\ 1\
\, \

iii'

~

z

60

&l

~V,_15V

V,=15V Vo= 10V
TJ=25'C _

t- Vo 10V
t-1c=500mA
TJ=25'C

40

iii:

a:

a:

20

,
C""I=O
1

10

\

"~

1.5

~~

1.0

1K

10K
100K
f. FREQUENCY (Hz)

1M

10

10M

o!;( 0.5

~i1i
<]C

rr-

~. \

C,=1I'F: CADJ=1OI'F

.

1.0

~'=O:C"'I=O

~~

=>z

~~

c'=11I'F:

0_

c5Gj

$
~

-1

ffi

-3

C

«

0.5

~«

9

<]u

:J

>x:

20

f. TIMEII'S)

c8~SUNG

30

40

I

.

0.5

f

J'"

ADJ = 10I'F

,
'
,Ic,=o! Codl!O

V

1.5

a:
a:
:::> 1.0
u

V,

10

1M

n

~

0

-2

0

~~
=>w
~~

100K

12 LOAD TRANSIENT RESPONSE

Fig.

I

-1.0

10K

w

:/

-1.5

1K

CI

<]C

-0.5

!:;

J

Vo =10V _
1,=50mA
2

11\

100

f. FREQUENCY (Hz)

.I.

;2

w

I

10- 3
100

Fig. 11 LINE TRANSIENT RESPONSE

«CI

/

V

Ij:Codl = 1Ol'F

V- i'- ~

w

~z

./

'-

°

0

V

C""I=O

w

..J

Fig. 10 OUTPUT IMPEDANCE

C.c1J=lO"F

Ul
a:
""-

.............

10

10

1'~500mA

80

'1

10 • OUTPUT CURRENT (A)

100

i=

~

iii:

a:
a:

0

CADJ=10I'F

f-""""

L

J~'=15V

~Ic

Vo =10V -

\ I\~:r'-

1\

II
~

10

20

30

40

f. TIMEII's)

332

KA350

LINEAR INTEGRATED CIRCUIT

APPLICATION INFORMATION
STANDARD APPLICATION

VIN

0

IN

KA350

111

ADJ

Ig'~'F

I.~

-0 VOUT

OUT

R1
. ~ 120

I

). VR2

1~:F

I

Ii
Fig. 13
ein: e in is required if regulatpr is located an appreciable distance from power supply filter.

eo: Output capacitors in the range of 1,uF to 100,uF of aluminum or tantalum electrontic are commonly used to
provide improved output impedance and rejection of transients.
In operation, KA350 develops a nominal 1.25V reference voltage, Vret, between the output and adjustment
terminal. The r~ference voltage is impressed across program resistor R1 and, since the voltage is constant, a
constant current 11 then flows through the output set resistor R2, giving an output voltage of
R2
Vout = 1.25V (1 +~) + IADJ R2
Since IADJ current (less than 100,uA) from the adjustment terminal represents an error term, the KA350 was
designed to minimize IADJ and make it very constant with line and load changes. To do this, all quiescent operating
current is returned to the output establishing a minimum load current requirement. If there is insufficient load on
the output, the output voltage will rise.
Since the KA350 is a floating regulator, it is only the voltage differential across the circuit which is important
to performance, and operation at high voltage with respect to ground is possible.

c8SAMSUNG
Electronics

333

KA350

LINEAR INTEG·RATED CIRCUIT

TYPICAL APPLICATIONS
Fig. 14 LIGHT CONTROLLER

VIN

KA350

IN

Ffg. 15 PRECISION POWER REGULATOR WITH
LOW TEMPERATURE COEFFICIENT

OUT t---~~-----1>-O Your

ADJ

VIN

KA350

IN

OUT 1--..__----_._-0 Voun~4V

IN457

R1
375

A---<10K
IN457

R2

* Adjust for 3.7SV across R1 L-_~--~2~K~
OUTPUT
ADJUST

Fig. 17 SLOW TURN·ON 15V REGULATOR

Fig. 16 ADJUSTABLE REGULATOR WITH
IMPROVED RIPPLE REJECTION

VIN
VIN 0----.----11 N

C2

KA350

OUTIt--------~r-O Your

ADJ
'----..,......--... R1

1·1!'F

C1 +
10!,F

240

01"
1M4802

IN
C2

KA350

OUT

ADJ

1·1!'F
1N4002

+

C3
1!,Ft

R2
5K

+

C1
100!,F

t Solid tantalum
.. Discharges C1 if output is shorted to ground
Fig. 18 0 TO 30V REGULATOR

KA350

Fig. 19 5V LOGIC REGULATOR WITH
ELECTRONIC SHUTDOWN*

OUTt---~.....--o VOUT
VIN Q - -_ _---IIN

7V-36V

KA350

OUTt--_.__-__-Q ~~ur

ADJ
R1
240

LM113
1.2V

I--+--'VY'I~O

TIL

1K

R3
680

-10V

c8SAMSUNG
Electronics
.

.. Min output = 1.2V

334

KA350

LINEAR INTERGRATED CIRCUIT

TYPICAL APPLICATIONS

(Continued)

Fig. 20 PRECISION CURRENT LIMITER

Fig. 21 1.2V - 20V REGULATOR WITH MINIMUM
PROGRAM CURRENT

IN

R1*

KA350

OUTJ------QVOUT

ADJ

*

O.4~R1 ~120n

* Minimum load current = 4mA

Fig. 22 5A CONSTANT VOLTAGE/CONSTANT CURRENT REGULATOR

35V D--..----4\NV+---1IN

KA350

OUT I-.-_____---.;:==========~~~-~~

__

ADJ
C3

>--

1.2V- 30

+

+

t Solid tantalum
" Lights in constant current mode

•

OUTPUT

C6
lO",F

-6V TO -15V

Fig. 23 12V BATTERY CHARGER
500
R6
0.2
OUT~--__-_------_--~rvY-----.----uVOUT

+
ADJ

LED

TO 12V
BATTERY
R1
3K

c8SAMSUNG
Electronics

335

KA350

LINEAR INTEGRATED CIRCUIT

R2
720

Fig. 24 TRACKING PREREGULATOR

Fig. 25 3A CURRENT ·REGULATOR

R1
240

VIN

KA350

IN

OUT

ADJ
VIN

KA350

IN

KA350

IN

OUT

OUT

C1

VOUT

0.1"FJ;

ADJ

R3
120

+ C2

C1
0.1"F

1"F

R4
1K

OUTPUT
ADJUST

Fig. 26 ADJUSTING MULTIPLE ON·CARD REGULATORS WITH SINGLE CONTROL *

VIN

IN

VOUT

KA350

OUTI--1..........-o

IN

KA350

-+-_ _ _ _ _ _ _--' ________ -

Fig. 28 SIMPLE 12V BATTERY CHARGER
Rs*
0.2

-

OUT

~

IN

VIN

KA350

OUT

ADJ

:

1\

---+--------'

* All outputs within ± 100mV

ADJ

12 V p. p

- - -

t Minimum load -10mA

Fig. 27 AC VOLTAGE REGULATOR

KA350

120
6 Vp.Q
3A

,

1000"F**

1
\
I
LJ

R2
2.4K

I

480

R1
120

+

I

\J

VOUTt

1N4002

L..-_ _ _ _

R2
1K

OUT

ADJ
1N4002 .

1N4002

0 - - IN

KA350

IN

OUT

ADJ

ADJ

1

:~ 480

I

120

~~

0--- IN

KA350

OUT

c8SAMSUNG
Electronics

ZoUT = Rs (1
Use of Rs allows low charging rates with fully
charged battery.
** 1000j.!F is recommended to filter
out any input transients.

* Rs - sets output impedance of charger

ADJ

-

.~

+~)
1

336

KA3524

LINEAR INTEGRATED CIRCUIT

REGULATOR PULSE WIDTH MODULATOR

16 DIP

The KA3524 regulating pulse width modulator contains all of the
control circuitry necessary to implement switching regulators of either
polarity, transformer coupled DC to DC converters, transformerless
polarity converters and voltage doublers, as well as other power control
applications. This device includes a 5V voltage regulator capable of
supplying up to 50mA to external circuitry, a control amplifier, an
oscillator, a pulse width modulator, a phase splitting flip-flop, dual
alternating output switch transistors, and current limiting and shut-down
circuitry. Both the regulator output transistor and each output switch
are internally current limiting and, to limit junction temperature, an
internal thermal shutdown circuit is employed.

FEATURES
•
•
•
•
•
•
•

I

Complete PWM power control circuitry
Operation beyond 100KHz
2% frequency stability with temperature
Total quiescent current less than 10mA
Single ended or push-pull outputs
Current limit amplifier provides external component protection
On-Chip protection against excessive junction temperature and

ORDERING INFORMATION

output current

• 5V, 50mA linear regulator output available to user

Device

BLOCK DIAGRAM

Package

Operation Temperature

KA3524N

16 DIP

o-70°C

**KA2524N

16 DIP

-25 -85°C

* * Under development

OSCILLATOR
OUTPUT

CIII

81

EA

CBI

82

Es

CURRENT
LIMIT

GROUND
(SUBSTRATE)

Fig. 1

c8SAMSUNG
Electronics

337

LINEAR INTEGRATED CIRCUIT

KA3524

ABSOLUTE MAXIMUM RATINGS
Symbol

Characteristic

Value

Unit

Power Supply Voltage

Vee

40

V

Reference Output Current

IREF

50

mA

Output Current (Each Output)

10

100

mA

Oscillator Changing Current (pin 6 or 7)

Icharge

5

mA

Lead Temperature (Soldering, 10 sec)

Tlead

300

°C
mW

Power Dissipation

Po

1000

Operating Temperature

Topr

0-+70

°C

Storage Temperature

T519

-65 -+ 150

°C

ELECTRICAL CHARACTERISTICS
(VIN

= 20V, f = 20KHz, Ta = 0 to 70°C. unless otherwise specified)
Characteristic

Symbol

Test Conditions

Min

Typ

Max

Unit

4.6

5.0

5.4

V

REFERENCE SECTION

Output Voltage

Vo

Line Regulation

6V o

VIN =8-40V

10

30

mV

Load Regulation

L.Vo

IL =0-20mA

20

50

mV

Ripple Rejection

RR

f = 120Hz, Ta= 25°C

66

dB

Short~Circuit

Ise

Vref=O, Ta=25°C

100

mA

Output Current

Temperature Stability

Ts

Long Term Stability

S

0.3
• Ta= 25°C

1

%

20

mV/Khr

CT = 0.001JLF, RT = 2Kn

350

KHz

RT and CT constant

5

OSCILLATOR SECTION

Maximum Frequency

f MAX

Initial Accuracy
Frequency Change with Voltage
Frequency Change with Temperature

6f

VIN =8-40V, Ta=25°C

%
1

%

2

%

6f

Over operating temperature range

VA3

Ta= 25°C

3.5

V

V3PW

CT=0.01JLF, Ta=25°C

0.5

JLS

Input Offset Voltage

VIO

VCM=2.5V

2

10

mV

Input Bias Current

118

VCM=2.5V

2

10

. JLA

Output Amplitude (Pin 3)
Output Pulse Width (Pin 3)
ERROR AMPLIFIER SECTION

Open Loop Voltage Gain

Avo

Common-Mode Input Voltage Range

VeR

Ta= 25°C

CMRR

Ta=25°C

BW

Av == OdB, Ta == 25°C

Vosw

Ta=25°C

Common-Mode Rejection Ratio
Small Signal Bandwidth
Output Voltage Swing

c8SAMSUNG
Electronics

60

80

1.8

dB
3.4

70
3
0.5

V
dB
MHz

3.8

V

338

KA3524

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS (Continued)
(V 1N =20V, f=20KHz, Ta=0-70°C unless otherwise specified)
Characteristic

Symbol

Test Conditions

Min Typ

Max

Unit

COMPARATOR SECTION
Maximum Duty Cycle

DC max

% Each output on

Input Threshold (Pin 9)

VTH1

Zero duty cycle

1

V

Input Threshold (Pin 9)

VTH2

Maximum duty cycle

3.5

V

1

p,A

Input Bias Current

45

Ie

%

CURRENT LIMITING SECTION
Sense Voltage

V(Pin 2) - V(Pin 1)~50mV
Pin 9=2V, Ta=25°C

Vsanse

180

Sense Voltage T.C.

200

220

mV/oC

0.2

•Common-Mode Voltage

0.7

mV

1

V

0.1

50

p,A

1

2

OUTPUT SECTION (EACH OUTPUn
Collector-Emitter Voltage
Collector Leakage Current

40

VCEO

V

kKg

VcE =40V

V SAT

IC=50mA

Emitter Output Voltage

VE

V1N =20V,

Rise Time (10% to 90%)

tr

Fall Time (90% to 10%)

tl

ISTD

V1N =40V, PINS 1,4,7,8,11
and 14 are grounded, Pin 2 = 2V
All other inputs and
outputs open

5

Saturation Voltage

Total Standby Current

17

V

18

V

RC=2KO, Ta=25°C

0.2

p,s

RC=2KO, Ta=25°C

0.1

p,s

10

rnA

APPLICATION INFORMATION
Voltage Reference
An internal series regulator provides a nominal 5 volt output which is used both to generate a reference voltage
and is the regulated source for aI/ the internal timing and controlling circuitry. This regulator may be bypassed
for operation from a fixed 5 volt supply by connecting pins 15 and 16 together to the input voltage. In this configuration,
the maximum input voltage is 6.0 volts.
This reference regulator may be used as a 5 volt source for other circuitry. It will provide up to 50mA of current
itself and can easily be expanded to higher current with an external PNP as shown in Figure 2.
EXPANDED REFERENCE CURRENT CAPABILITY

1000

VREF

+

",l
J ~E~~~~~G

ON

CHOICE FOR 01

GNDo---------------~--------~u

Fig. 2

c8SAMSUNG
Electronics

339

I

LINEAR INTEGRATED CIRCUIT

KA3524
Oscillator

The oscillator in the KA3524 uses an external resistor (R T) to establish a constant charging current into an external
capacitor (CT). While this uses more current than a series connected RC, it provides a linear ramp voltage on the
capacitor which is also used as a reference for the comparator. The charging current is equal to 3.6V + RT and
should be kept within the range of approximately 30JtA to 2mA, i.e., 1.8K

-

-r--.,

~

"-

I

~1,210

>

1,208
1,206
1,204

V

1,202

0.47
1

\

1,218

1000

100

10

1,200

-50

25

-25

50

75

100

12E

TJ-oC

Fig. 8. Vsense Vs Y,N
250

400

J

Tl=25°'c

I
TA=25ob

/V
/V

350

V

-- ----_ _ r""

I--

//

V
250

150

o

200

10

30

20

40

50

o

10

20

30

40

50

V'N-V

c8SAMSUNG
Electronics

354

KA78TXXC/KA78TXXAC SERIES

LINEAR INTEGRATED CIRCUIT
TO·22O

3A POSITIVE VOLTAGE REGULATOR
This family of fixed voltage regulators are monolithic integrated
circuits capable of driving loads in excess of 3.0 amperes. These three:
terminal regulators employ internal current limiting, thermal shutdown,
and safe-area compensation. Devices are available with improved
specifications, including a 2% output voltage tolerance on AC - suffix 5,
12 and 15 volts device types.
Although designed primarily as fixed voltage regulators, these devices
can be used with external components to obtain adjustable voltages
and currents.

FEATURES
•
•
•
•
•
•

Output current in excess of 3.0 ampere
Output transistor safe·area compensation
Power dissipation: 25W (To·220)
Internal short·circuit current limiting
Internal thermal overload protection
Output voltage offered in 2% and 4% tolerance
(2% regulators are available in 5, 12 and 15 volt devices)
• No external components required
• Thermal regulation is specified "
. • Output voltage of 5; 6; 8; 12; 15; 18; 24V
• Mass production: KA78T05

'"""

1: Input 2: GND 3: Output

ORDERING INFORMATION
Device
KA78TXXCT
KA78TXXACT
KA78TXXCH

..

,

KA78TXXACH

BLOCK" DIAGRAM
IN PUT

,....
~

I

I

1

I
f---

REFERENCE
VOLTAGE

TO-220

o-125°C
TO-3P

SERIES
PASS
ELEMENT

SOA
PROTECTOR

CURRENT
GENERATOR

STARTING
CIRCUIT

Package Operating Temperature

1-.-

ERROR
AMPLIFIER

OUTPUT

r--r--
I-

...
:::>

~

lS
1.00

o

~
<

V'N=7.5V
- I QUT =1.0A
Co=O
I-- TJ = 25"C .

....

'"

~
o
z

0.98
-10

30

L

10- 2

70

t'-....

)

10- 3

110

150

10

100

lK

TJ, JUNCTION TEMPERATURE (OC)

Fig. 3 RIPPLE REJECTION Vs FREQUENCY

80

!

r--~

='"

loUT = 3.0A

0

""~\

~

60

......
a:
...J

~

40

I
m-

;!.

10

lK

10K

I
80

r-I-

0

~
UJ

......
a:
...J

\

60
Vo c:5.0V
V,N=10V
t--Coc:O
f= 120Hz

~

~

100

TJI=~5"IC,
40

lOOK

B

30
1M

10M

0.Q1

100M

Fig. 5 QUIESCENT CURRENT Vs INPUT VOLTAGE

-~

f------

~

ffi
u
13:;
0

~

1.0

10

1.0

Fig. 6 QUIESCENT CURRENT Vs OUTPUT CURRENT
5.0

I-

2.0

0.1

lOUT, OUTPUT CURRENT (A)

4.0

u

II

II

I

f, FREQUENCY (Hz)

I-

•

100M

i=

\

1.0

~

10M

l;l

20

3.0

1M

I

z

I

<-§.

lOOK

Fig. 4 RIPPLE REJECTION Vs OUTPUT CURRENT

Vo=5.0V
V,N=10V
··-t-Co=O
TJ=25"C

.J

10UT=50mA

"

z

Ul

10K

100

;!.

II:
UJ

J

f, FREQUENCY (Hz)

100

m-

--

t

TJ

~----

--

-----

f----- 1---'- ----

---

25"C

--

-

I
I
I

4.0

I

t:-

I

<-

§.

~

TJ-25"C

I

I-

3.0

~

I

U

I-

ffi
u
13

2.0

:;
0

lOUT

V

'10

20
V'N, INPUT VOLTAGE (V..)

c8SAMSUNG
Electronics

30

V'N~Vr5

~

I

1.0

Vo=5.01t

40

'OYl.

I II

2.0A -

0.01

0.1

1.0

1 11

10

lOUT' OUTPUT CURRENT tA)

363

KA78TXXC/KA78TXXAC SERIES

LINEAR INTEGRATED CIRCUIT

Fig. 7 DROPOUT VOLTAGE

Fig. 8 PEAK OUTPUT CURRENT
8.0

~ 2.5

....
~

---~

I~UT=3.dA

to--.

15
~

T,looc

...5z

2.0

is

...:...-

6.0

~TIL5OC~

4.0

t- T,=125 OC ' ,

w

a:
a:

w

r--. r-..
g 1.5 """- --.... t-- to--..
r-.. r-..
~

~

:::)

o

e
!;

...

~r--.

:::)

I--

I~T=~

~

...

~l

:::)

U

0

'"~

r-..

j

1.0

2.0

CL

~~
~~~
f" ~
..........

~

-:!I
oJ

0

0.5
10

30

10

0

150

110

70

TJ• JUNCTION TEMPERATURE (OC)

0.8

~
g
!; ~

I I

0.4

8~

0.2

>
!;~

CLZ

!;2



!;~
~CI

J-------tl\----J--+---

-0.2

-0.2

-·0.4

-0.3 i----t-----

-0.6
1.0

'I'---+-+~

:1:

I

0.2 -VO=5'OV"--~
V,N=10V
0.1
Co=0t--~ __ I---_--' ----- . - - -TJ=25°C

J> -O.~ ~L

CI

~
0

0.3

0:;:

It

-:!~

w

~

o

~

CLZ

--t-+--

20

---+-

I---+-r-+--+--+-+-i~'­
--1-\---1----+---.....--

1\

0.5


(.)

D

~ -0.4

~

I-

ffi

V

45

Iii

-0.6

I--

~

V

:2

~

-

l

~ 40

§

D

C

V,. = 15V
Voor=10V

-0.8

35

-1.0

o

25

so

75

100

30

125

-SO

TEMPERATURE (OC)

-25

25

75

50

100

125

150

TEMPERATURE (OC)

Fig. 3 DROPOUT VOLTAGE
3.0

Fig. 4 TEMPERATURE STABILITY

.-----r----r---~---r------.

1,260

6Voor=10QmV

~

2.51---t----t----+---+----I

I

--- I'-.......

I"'""

~

IL=1.5A

Il:

is 2.0 L==-riiiiO;;;;;;;~::::::::~IL~=.!;lA~~=~

~
~~

1,2SO

~

w

~ 1,240

~ I'-....

"

()

Z

~w

a:

1.5 I---T""'.....=-+--==-.~~

1.0

1,230

L---_ _.L..-_ _.L..-_ _..L....._ _- ' - - _ - - - '

o

25

so

100

75

125

1,220

o

25

SO

75

100

125

TEMPERATURE (OC)

TEMPERATURE (OC)

Fig. 5 RIPPLE REJECTION

Fig. 6 RIPPLE REJECTION
l00.-----r---~--,_--,---,

100

-

80

-

IL=500mA
I - - - - t - - - t - - - t - - - V , . = 15V
Voor=10V
T,=25"C

I
CAOJ =10"F

I

'-,
'

I

~O

I

I
!

f-- V.. -Vwr=5V

20

~I---t----+---+---~-~

IL=5OOmA
1=1:!OHz
T,=25"C

o

o

I

I

10

15

20

OUTPUT VOLTAGE (V)

qsSAMSUNG
Electronics

25

30

35

°l~O---l~OO---l~K---l~OK---l~OO~K--~lM
FREQUENCY (Hz)

368

LM317

LINEAR INTEGRATED CIRCUIT

Fig. 8 OUTPUT IMPEDANCE

Fig. 7 RIPPLE REJECTION
10 '

100

80

./

--

-V,N=15V
= VOUT 10V
_ I L=500mA
T,=25'C

.1"\
,.

/~

sw

~

f---------

o

z

'CADJ= 1OI'F

!~ 10-

I II
'CADJ=O

~

I
V'N=15V
VOUT=10V
f= 120Hz

20 -

r~51CII

o

--

o

10- 2

I

I

I

,

10

./

f"""oo.,..,

J

w

I

w

CI

=>w

A-

-

0

00

t\

-1.0

-1

I

-2
-3

0.5

II:

1.0

0(

0.5

g
40

30

20
TIME fils)

1.5

=>

0
0

10

1\

I

~.,

'

CL= 11'F; CAOJ = lOI'F
I
V,N=15V

J

~:'::~~~

V

-

T,=25'C

~
I-

ffiII:

!; ~

I

~_.l

!;~

I

1.0

~~

~~

00

-1.5

~S~

>w

~Q

f(

VoUT =10V
I L=50mA
T,=25'C

-

dL=O; d.OJ=OI / \

Oz
CL- 11'F; CADJ - 10l'F
CL=O; CAOJ=O

I

-0.5

w

~~

1.0
0.5

... :!
1->

I

1M

lOOK

Fig. 10 LOAD TRANSIENT RESPONSE

CI

g~
!; i=

/
/cAOJ= lOI'F

lK
10K
FREQUENCY (Hz)

100

10

Fig. 9 LINE TRANSIENT RESPONSE

/

.... -

1.5

~~

/

10- 3

0.1
1
OUTPUT CURRENT (A)

0.Q1

r

~
CAOJ=O /

1

I-

I

r

/

100

I

I

~

\

i

V

I

10

20
TIMElI's)

I
I

\
30

40

Fig. 11 MAXIMUM OUTPUT CURRENT
T,=25'C
6VoUT=loomV

--

r

I

r\.

\

\.

.-+---J
!

~

"

"""

~'I---

5

10

15

20

25

30

35

V,-Vo, INPUT-OUTPUT VOLTAGE DIFFERENTIAL (V..)

c8 SAMSUNG
Electronics

369

LM317

LINEAR INTEGRATED CIRCUIT

TYPICAL APPLICATIONS
Fig. 13 Current Limited 6V Charger

Fig. 12 AC Voltage Regulator

VIN

9V TO 60V
120

* Sets peak current (0.6A for 10)

* * The 1000p.F is recommended to filter out

input transients

Fig. 14 12V Battery Charger

• Rs-sets output impedance of charger
_ R 1 + R2 Use of Rs allows low
ZOUT S (
R1) charging rates with
fully charged battery.

=8SAMSUNG
Electronics

Fig. 15 Programmable Regulator

R2
VOUT = 1.25V (1 +"R,) + ladj R2
is required when regulator is located an
appreciable'distance from power supply filter.
COUT is not need for stability, however it does
improve transient response
Since ladj is controlled to less than 100p.A, the
errorlassociated with this term is negligible in
most applications.
CIN

370

LINEAR INTEGRATED CIRCUIT

LM323

3-TERMINAL POSITIVE VOLTAGE REGULATOR
TO·3P

The LM323 is a three-terminal positive regulator with a preset 5V output
and a load driving capability of 3 Amps.
New circuit design and processing techniques are used to provide the
high output current without sacrificing the regulation characteristics of
lower current devices.
The LM323 can be used with a external transistorto supply up to 15A
at 5 Volts.

FEATURES
• 3 Amp output current
• Internal current and thermal limiting
• 0.010 typical output impedance
• 7.SV minimum input voltage
• Output transistor safe area compensation

I _ _~
L.
"'op", 2, OND3, o",p",

ORDERING INFORMATION
SCHEMATIC DIAGRAM

Device

Package

Operation Temperature

LM323H

TO-3P

LM323T

TO-220

o -125°C
o -125°C

SERIES
PASS
ELEMENT

INPUT
~

1

SOA
PROTECTOR

CURRENT
GENERATOR

I
-

REFERENCE
VOLTAGE

3

[

[

STARTING
CIRCUIT

OUTPUT

t--r--O

j---,..-

ERROR
AMPLIFIER

~

OUT

R6
R20

I

D1

R7

R19

Fig. 2

ABSOLUTE MAXIMUM RATINGS
Characteristic

Input Voltage (for Vo
(for Vo

=5V to 18V)
=24V)

Thermal Resistance Junction-Cases

Symbol

Value

Unit

VIN
VIN

35
40

V
V

9JC

5

°C/W

Thermal Resistance Junction-Air

9JA

65

°C/W

Operating Temperature Range

Topr

-40-+125
0- + 125

°C
°C

Tstg

-65-+150

°C

Storage Temperature Range

c8SAMSUNG
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MC78XXI
MC78XXC/AC

383

LINEAR INTEGRATED CIRCUIT

MC78XX1MC78XXA

ELECTRICAL CHARACTERISTICS MC7805
(Refer to test circuit, Tmin 2.0

~

~

1---

-

MC78LOSAC
I
I

~-i"
"""""-

I

'ouT-40mA

_'our"".OmA

_t-""

-I"--

c

f--

~

-

o

~

-VouT-5.W
IL-4OmA
T,-25OC -. - -

I I

0.5

DROPOUT CONDITIONS
AVOUT -5% OF VOUT

I

I

10

51)

~

ill

--

--~-

20

15

30

25

50

25

8.0

MJLOl

F::: ~

VouT-5V
T,-25OC

..........

~ .....
lour-1.0mA~

r".....

"""'-

~

VIN-1W

r-- r-VOUT_5V

10UT ..4OmA

2.8

o

~~

\

I~

J

I I
50

25

75

100

2.0

125

4.0

111111/

I

1m

VIN -fN to lfN
VOUT=5V
louT=4OmA
Tj-25·C

i

10

8.0

Fig. 6 LINE TRANSIENT RESPONSE
20

400

11

IllC78LOSAb '

~

; INP~T vclLT~E

300

15

MC78LOSAC

I
~200

III

!

6.0

INPUT WI:TAGE, V

Fig. 5 RIPPLE REJECTION vs A
FUNCTION OF FREQUENCY
100

~,oUT-1LmA

'r

2.0

AMBIENT TEMPERATURE, ·C

-

M~LOJ

6.0

""j'...

0

125

100

Fig. 4 DROPOUT CHARACTERISTICS

4.2

"

75

JUNCTION TEMPERATURE, ·C

Fig. 3 QUIESCENT CURRENT vs A
FUNCTION OF TEMPERATURE

I
z

-

r-- ....

1.0

INPUT VOLTAGE, V

80

-

~

1.0

41)

r--

10

!i

60

~

w 100

I

:!l

-r-.

!:l

40

...~

OUTPUT VOLTAGE
DEVIATION

f-

--

r

::;)

~

I

o

20

o -

"

J ~D)
'

I
-100 ' - lOUT =l00mA (RESISTIVE
VOUT-5V

I

-200
10

100

lK
FREQUENCY, Hz

c8SAMSUNG
Electronics

10K

lOOK

o

6

10

12

TIME,ItS

420

LINEAR INTEGRATED CIRCUIT

MC78LXXAC SERIES
Fig. 7

LOAD TRANSIENT RESPONSE
200
5.0
100

>

I
z
o

is

9

~

>
i=

0

w

~
~
Q

!5.

iiii

c

is

VI

iii
w

I

VI

1.0

~.~~~ ~~A~6-:~~H=
,......

0.5

WITH 72"CIW HEAT
+-..~

Z

~

W

Go

w

!iII:

0.1

(,)

...
Q

9

II:

w

siNK

~

II:
II:
::I

I

I

2.0

r------, 0.125" LEAD LENGT;""'
0.2 I----l FROM PC BOARD,
FREEAIR

E

-1 -VII'; =10V ---t----t--t--+--+---t-+--+---+------l
VOUT=5V

I

z

r--.

0.4"JADL~~

~0.05

0.02

0.01
10

20

30

40

50

60

TIME-"s

25

50

==

~

FROM PC BOARD,
FREE AIR

w

=

75
100
125
AMBIENT TEMPERATURE - ·C

~
"11\

,

,

I

150

APPLICATION INFORMATION
The MC78LXXAC series regulators have thermal overload protection from excessIve power, internal short-circuit
protection which limits each circuit's maximum current, and output transistor safe-area protection for reducing
the output current as the voltage across each pass transistor is increased.
Although the internal power dissipation is limited, the junction temperature must be kept below the maximum specified
temperature (125°C) in order to meet data sheet specifications. To calculate the maximum junction temperature or heat
sink required, the following thermal resistance values should be used:

Thermal Considerations
The TO-92 molded package manufactured by SST is capable of unusually high power dissipation due to the lead frame
design. However, its thermal capabilities are generally overlooked because of a lack of understanding of the thermal paths
from the semiconductor·junction to ambient temperature. While thermal resistance is normally specified for the device
mounted 1cm above an infinite heat sink, very little has been mentioned of the options available to improve on the conservatively rated thermal capability.
An explanation of the thermal paths of the TO-92 will allow the designer to determine the thermal stress he is applying
in any given application.

The TO-92 Package
The TO-92 package thermal paths are complex. In addition to the path through the molding compound to ambient
temperature, there is another path through the pins, in parallel with the case path, to ambient temperature, as shown in
Figure 9.
The total thermal resistance in this model is then:
8JA

=

(8JC
8 JC

Where:

8JC

8CA
8JL
8LA
8JA

+ 8 CA) (8JL + 8 LA)
+ 8 CA + 8 JL + 8 LA

= thermal resistance of the case between the regulator die and a point on the case directly above the die
location.
= thermal resistance between the case and air at ambient temperature.
= thermal resistance from transistor die through the collector lead to a point 1/16 inch below the regulator case.
= total thermal resistance of the collector-base-emitter pins to ambient temperature.
= junction to ambient thermal resistance.

c8SAMSUNG
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421

LINEAR INTEGRATED CIRCUIT

MC78LXXAC SERIES

TO-92 Thermal Equivalent Circuit
(PIN at Other Than Ambient Temperature)

TO-92 Thermal Equivalent Circuit

I

P(WATTS)

P (WATTS)

()CA

Ta

'-------+------iIIJ-------'

Fig. 10

Fig. 9

Methods of Heat Sinking
With two external thermal resistances in each leg of a parallel network available to the circuit designer as variables, he
can choose the method of heat sinking most applicable to his particular situation. To demonstrate, consider the effect of
placing a small 72."CIW flag type heat sink, such as the Staver F1-70-2, on the 78LXX molded case. The heat sink effectively
replaces the ()CA (Figure 10) and the new thermal resistance, ()JA = 145°C/W (assuming, 0.125 inch led length).
The net change of 15°CIW increases the allowable power dissipation to O.S6W with an inserted cost of 1-2 cents. A still
further decrease in ()JA could be achieved by using a heat sink rated at 46°CIW, such as the Staver FS-7A. Also, if the case
sinking does not provide an adequate reduction in total ()JA, the other external thermal resistance, ()LA, may be reduced by
shortening the lead length from package base to mounting medium. However, one point must be kept in mind. The lead
thermal path includes a thermal resistance, ()SA, from the pins at the mounting points to ambient, that is, the mounting
medium, ()LA is then equal to ()LS + ()SA. The new model is shown in Figure 10.
In the case of a socket, ()SA could be as high as 270°CIW, thus causing a net increase in ()JA and a consequent decrease
in the maximum dissipation capability. Shortening the lead length may return the net ()JA to the original value, but pin
sinking would not be accomplished.
In those cases where the regulator is inserted into a copper clad printed circuit board, it is advantageous to have a maximum area of copper at the entry points of the pins. While it would be desirable to rigorously define the effect of PC board
copper, the real world variables are too great to allow anything more than a few general observations.
The best analogy for PC board copper is to compare it with parallel resistors. Beyond some point, additional resistors
are not Significantly effective; beyond some point, additional copper area .is not effective.

High Dissipation Applications
VOUT

VIN O--""""",.,....---1'>---~

Rl

C2

IL
RL

Rl
240{l
V1N~-----I

VOUT

-'L10-30mA

c8SAMSUNG
Electronics

RL

422

MC78LXXAC SERIES

LINEAR INTEGRATED CIRCUIT

When it is necessary to operate a MC78LXXAC regulator with a large input-output differential voltage, the addition of
series resistor R1 will extend the output current range of the device by sharing the total power dissipation between R1 and
the regulator.
R1= V'N(M'N) - VOUT - 2.0V
k(MAX) + 10
Where 10 is the regulator quiescent current.
R,egulator power dissipation at maximum input voltage and maximum load current is now.
Po (MAX) = (V3 - Vour) IL(MAX) + V310
where V3= V'N(MAX) - (lc(MAx) + 10) Rl
The presence of R1 will affect load regulation according to the equation:
load regulation (at constant V ,N )
=Ioad regulation (at constant V3)
+(Iine regulation, mV per V)
x(R1)x{dIL).
As an example, consider a 15V regulator with a supply voltage of 30±5V, required to supply a maximum load current
of 30mA. 10 is 4.3mA, and minimum load current is to be 10mA.
Rl = 25-15-2
30+4.3

34.3 = 240fl
8

V3 = 35 - (30 + 4.3) x 0.24 = 35.82 = 26.8V
PD(MAX) = (26.8 -15) 30 + 26.8 (4.3)
=354+115
=470mW, which permit operation up to 70°C
in most applications.
Line regulation of this circuit is typically 110mV for an input range of 25 - 35V at a constant load current; i.e. 11mVN
Load regulation=constant V1 load regulation (typically 10mV, 10 - 30mA IL)
+(11mVNxO.24x20mA (typically 53mV)
=63mV for a load current change of 20mA at a constant V ,N of 30V.

Typical Application

INPUT

o-------..----~

J - - - - - -.......- - - - - o OUTPUT

Cl
O.331'F

I\IOTE2

Notes
1. To specify an output voltage, substitute voltage value for "xx".
2. Bypass Capacitors are recommended for optimum stability and transient response and should be locate as close as
possible to the regulator.

c8SAMSUNG
Electronics

423

I

MC18MXXC SERIES

LINEAR INTEGRATED CIRCUIT

3-TERMINAL O.SA POSITIVE
VOLTAGE REGULATOR

TO·220

TheMC78MXXC'seriesofthree-terminalpositiveregulatorsareavailable
10-220 package with several fixed output voltages, making it useful in
a wide range of applications. These reglators can provide local on-card
regulation, eliminating the distribution problems associated with single
point regulation. Each type employs internal current limiting, thermal
shut-down and safe area protection, making it essentially indestructible.
If adequate heat sinking is provided. they can deliver over O.SA output
current. Although designed primarily as fixed voltage regulators, these
devices can be used with external components to obtain adjustable
voltages and currents.
MC78MXXC is characterized for operation from O°C to 125°C, and
MC78MXXI from - 40°C to 125°C.

FEATURES
•
•
•
•
•

1: Input 2: GND 3: Output

Output Current up to O.SA
Output Voltages of 5; 6; 8; 10; 12; 15; 18; 20; 24V
Thermal Overload Protection
Short Circuit Protection
Output Translator SOA Protection

ORDERING INFORMATION
Package Operating Temperature

Device
* * MC78MXXIT

• Industrial and commercial temperature range

MC78MXXCT

TO-220

-40 -

TO-220

o-

* * Under Development

BLOCK DIAGRAM

-

IN PUT

I

1

I
CURRENT
GENERAlOR

r--

REFERENCE
VOLTAGE

SERIES
PASS
ELEMENT

-~

ERROR
AMPLIFIER

3

~
~

I
THERMAL
PROTECTION

1

-

OUTPUT

f---.r--O

..:~R20

SOA
PROTECTION

J
STARTING
CIRCUIT

+125°C
+ 125°G

r---

..:~

R19

...

GN D

2

Fig. 1

c8SAMSUNG
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424

MC78MXXC SERIES

LINEAR INTEGRATED CIRCUIT

SCHEMATIC DIAGRAM
~~--------~--------~--~--~-----.---oIN

R11

>-__---+~~----+-----+_--_oOUT

R20

I

R19

Fig. 2

ABSOLUTE MAXIMUM RATINGS
Characteristic
Input Voltage (for Vo = 5V to 18V)
(for Vo = 24V)

Symbol

Value

Unit

Vi
Vi

35
40

V
V

Thermal Resistance Junction-Cases

OJC

5

°CIW

Thermal Resistance Junction-Air

OJA

65

°CIW

Topr

-40 -+125
0- + 125

°C
°C

T51g

-65-+150

°C

Operating Temperature Range
Storage Temperature Range

qsSAMSUNG
Electronics

MC78XXI
MC78XXC/AC

425

MC78MXXC SERIES

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS MC78M05C
(Refer to the test circuits, Tmin~Tj~ 125°C, 10 = 350mA, VI = 10V, unless otherwise specifie~, CI = 0.33!LF, Co = 0.1!LF)
. Symbol

Characteristic

Output Voltage

Vo

Test Conditions

Min

Typ

Max

Tj =25°C

4.8

5

5.2

10 = 5 to 350mA
Vi =7to 20V

4.75

5

5.25

Unit

V

-~

Line Regulation

Vi =7to
25V

100

Vi =8to
25V

50

10=5mA to O.5A, TJ=25°C

100

6Vo

10=200mA
TJ=25°C

Load Regulation

mV

6Vo

--

mV

50

10=5mA to 200mA, TJ=25°C

--~

4.0

TJ=25°C

6

Quiescent Current

Id

10=5mA to 350mA

0.5

Quiescent Current Change

61d

lo=200mA
Vi =8to 25V

0.8

Output Voltage Drift

6Vo
6T

10=5mA
Tj =0 to 125°C

I

----

mA

mA

--

-0.5

mV/oC

40

!LV

--t---

Output Noise Voltage
Ripple Rejection
Dropout Voltage
-Short Circuit Current

--

Peak Current

VN

f = 10Hz to 100KHz

RR

f= 120Hz 10=300mA
Vi =8to 18V

Vo

Tj = 25°C, 10 = 500mA

1---.

---~---

Isc

Tj = 25°C, Vi = 35V

IpeaK

Tj =25°C

62

I
._.. __.._----

dB

2

V

300

mA

700

mA

• Tmin
MC78MXXI: T min = - 40°C
MC78MXXC: Tmin = O°C

c8SAMSUNG
Electronics

426

LINEAR INTEGRATED CIRCUIT

MC78MXXC SERIES

ELECTRICAL CHARACTERISTICS MC78M06C
(Refer to the test circuits, Tmln5Tj5125°C, 10 = 350mA, Vi = 11V, unless otherwise specified, C1 = O.33ItF, Co = 0.11tF)
Characteristic

Symbol

Output Voltage

Vo

Test Conditions

Min

Typ

Max

Tj =25°C

5.75

6

6.25

10 = 5 to 350mA

5.7

6

6.3

Unit

V

Vi=8 to 21V
f-----

Vi =8to
25V
/:,Vo

Line Regulation

100
I

11>=200mA

mV

Vi =9to
25V

50

10=5mA to O.5A, Tj =25°C

120

Tj =25°C
f--

/:,Vo

Load Regulation

--

10 = 5mA to 2OOmA, Tj = 25°C

mV

I

60

f------

Quiescent Current

Id

Tj =25°C

4.0

6

mA

--

10 =5mA to 350mA
Quiescent Current Change

/:'Id

Output Voltage Drift
Output Noise Voltage

VN

f = 10Hz to 100KHz

RR

f= 120Hz 10=300mA
Vi =9 to 19V

Ripple Rejection
Dropout Voltage

0.8

10=200mA
Vi =9 to 25V

/:,V o
/:,T

--

0.5

I

10=5mA
Tj =0 to 125°C

mA

--

-0.5

mVloC

45

ltV

59

dB

VD

Tj = 25°C, 10 = 500mA

2

V

I_e

Tj = 25°C, Vi = 35V

300

mA

Ipeak

Tj =25"C

700

mA

--

Short Circuit Current
f---------------

Peak Cu rrent
* T min

MC78MXXI: T min = - 40°C
MC78MXXC: Tmin=O°C

c8SAMSUNG
Electronics

427

LINEAR INTEGRATED CIRCUIT

MC78MXXC SERIES

ELECTRICAL CHARACTERISTICS MC78M08C
(Refer to the test circuits, TmlnSTjS 125°C, 10 = 350mA, Vi = 14V, unless otherwise specified, C i = 0.33",F, Co = 0.1",F)

Characteristic

Output Voltage

Symbol

Yo

Test Conditions

Min

Typ

Unit

Max

Tj =25°C

7.7

8

8.3

10 = 5 to 350mA

7.6

8

8.4

V

Vi = 10.5 to 23V

Line Regulation

=mX::~JW

f:"Vo

10=200mA

T j =25°C

Load Regulation

~

--

IVi=l1to
25V

-lo=5mA to O.5A, Tj =25°C
-10=5mA to 200mA, Tj =25°C

f:"Vo

100
mV

50
---

-~~

160
--

mY'

80
~----

Quiescent Current

T j =25°C

Id

4.0

6
--~----

10=5mA to 350mA
f------~

Quiescent Current Change

f:" Id

1 - - - - - - - - - --------------

lo=200mA

0.8

Vi = 10.5 to 25V
-----

1------

Output Voltage Drift

f:"V o
f:"T

lo=5mA
Tj =0 to 125°C

c---~--

--

-------

VN

52

f = 10Hz to 100KHz

rnA
-----

mVloC

-0.5

------ -------

Output Noise Voltage

rnA
------

Q.5

c--~

--

",V
- - - r----~---

Ripple Rejection

f=120Hz lo=300mA
Vi =11.5 to 21.5V

RR

56

dB

f

--------- --------f - - - - -

Dropout Voltage

Tj = 25°C, 10 = 500mA

VD

2

Short Circuit Current
Peak Current

T j = 25°C, Vi = 35V

Ise
--

1------

Ipeak

--~------

T j =25°C

V

f-------f------

c--------

300
- - c - - - - - -f--------700

f--------~

-~

rnA
rnA

• T min
MC78MXXI: Tmin = - 40°C
MC78MXXC: Tmin = O°C

c8SAMSUNG
Electronics

428

LINEAR INTEGRATED CIRCUIT

MC78MXXC SERIES

ELECTRICAL CHARACTERISTICS MC78M10C
(Refer to the test circuits, Tmin,:::;;Tj ,:::;; 125°C, 10 = 350mA, Vi = 17V, unless otherwise specified, Ci = O.33/L F , Co = 0.1/L F)
Characteristic

Output Voltage

Line Regulation

Load Regulation
Quiescent Current

Min

Typ

Max

Tj = 25°C

9.6

10

10.4

10 = 5 to 350mA
Vi = 12.5 to 25V

9.5

10

10.5

Test Condition

Symbol

Vo

6V o

6Vo
Id

10=200mA
Tj =25°C

Vi = 12.5 to
25V

100

Vi = 13 to
25V

50
200

10 =5mA to 200mA, Tj =25 °C

100
4.1

Tj = 25°C

10 = 200mA
Vi = 12.5 to 25V

Output Voltage Drift

6V o
6T

10=5mA
Tj = 0 to 125°C

6

mV

I

mA

0.5

10 = SmA to 350mA
6 1d

V

mV

10 =5mA to O.5A, Tj =25°C

Quiescent Current Change

Unit

0.8

mA
-~

Output Noise Voltage

VN

. f = 10Hz to 100KHz
f = 120Hz, 10 = 300mA
Vi = 13 to 23V

Ripple Rejection

RR

Dropout Voltage

VD

Tj = 25°C, 10

Short Circuit Current

Ise

Tj = 25°C, Vi

Peak Current

Ipeak

Tj

=25°C

=500mA
=35V

-0.5

mV:oC

65

/LV

55

dB
2

V

300

mA

700

mA

* T min

MC78MXXI: T min = - 40°C
MC78MXXC: Tmin = O°C

c8SAMSUNG
Electronics

429

LINEAR INTEGRATED CIRCUIT

MC78MXXC SERIES

ELECTRICAL CHARACTERISTICS MC78M12C

(Refer to the test circuits, T min~Tj~ 125°C, 10 = 350mA, Vi = 19V, unless otherwisd specified, Ci = O.33j.tF, Co = 0.1j.tF)
Characteristic

Output Voltage

Line Regulation

Load Regulation
Quiescent Current

Quiescent Current Change

Output Voltage Drift
Output Noise Voltage

Symbol

Vo

6Vo

6Vo
Id

Min

Typ

Max

Tj = 25°C

11.5

12

12.5

10 = 5 to 350mA
Vi = 14.5 to 27V

11.4

12

12.6

Test Condition

10=200mA
Tj =25°C

Vi = 14.5 to
30V

100

Vi =16to
30V

50

Unit

V

mV

10=5mA to O.5A, Tj =25°C

240

10 = 5mA to 200mA, Tj=25°~

120
4.1

Tj = 25°C

6

10 = 5mA to 350mA

0.5

61d

10 = 200mA
Vi = 14.5 to 30V

0.8

6Vo
6T

10=5mA
Tj = 0 to 125°C

mV
rnA

rnA

-0.5

mV/oC

75

j.tV

VN

f = 10Hz to 100KHz

Ripple Rejection

RR

f = 120Hz, 10 = 300mA
Vi= 15 to 25V

Dropout Voltage

VD

Tj =25°C,l o =500mA

2

V

Short Circuit Current

Isc

Tj = 25°C, Vi = 35V

300

rnA

Tj =25°C

700

rnA

Peak Current

Ipeak

55

dB

• Tmin
MC78MXXI: T min = - 40°C
MC78MXXC: Tmin = O°C

c8~SUNG

430

LINEAR INTEGRATED CIRCUIT

MC78MXXC SERIES

ELECfRICAL CHARACfERISTICS MC78M15C
(Refer to the test circuits, T min !!>Tj !!> 125°C, 10 = 350mA, Vi = 23V, unless otherwise specified, C1 = O.33~F, C~ = O.1~F)

Characteristic

Output Voltage

Symbol

Vo

Test Conditions

Min

Typ

T j =25°C

14.4

15

10 = 5 to 350mA
'Vi = 17.5 to 30V

14.25

15

Load Regulation

f:,.Vo

6Vo

15.6
-15.75

V

mV

10=200mA
Tj =25°C V j =20 to
30V

50
--

=

1o 5mA to O.5A, Tj =25°C

300

1o= 5mA to 2OOmA, Tj =25°C

150
4.1

Quiescent Current

Id

Tj =25°C
10=5mA to 350mA

0.5

Quiescent Current Change

61d

10=200mA
Vi = 17.5 to 30V

0.8

f:,.Vo

10=5mA
Tj =0 to 125°C

6

mV

•

mA

mA

- - I-------

Output Voltage Drift

6T

Output Noise Voltage

VN

f = 10Hz to 100KHz

Ripple Rejection

RR

f = 120Hz 10 =300mA
Vi =18.5 to 28.5V

Dropout Voltage

VD

Tj = 25°C, 10 = 500mA

Isc

Tj =25°C, Vi =35V

Short Circuit Current

Unit

100

Vi= 17.5 to
30V
Line Regulation

Max

-1

mV/oC

90

~V

54

dB
2

V

300

mA

700

mA

--

Peak Current

Ipeak

T j =25°C

* T min

MC78MXXI: T min = - 40°C
MC78MXXC: T min = O°C

c8SAMSUNG
Electronics

431

LINEAR INTEGRATED CIRCUIT

MC78MXXC SERIES

ELECTRICAL CHARACTERISTICS MC78M18C
(Refer to the test circuits, T min~Tj~ 125°C, 10 = 350mA, Vi = 26V, unless otherwise specified, C, = 0.33",F, Co = 0.1",F)
Characteristic

Output Voltage

Symbol

Min

Test Conditions

Vo

Typ

Max

Tj =25°C

17.3

18

18.7

10 = 5 to 350mA
Vi = 20.5 to 33V

17.1

18

18.9

Unit

V

I

Vi =21 to

100

33V
Line Regulation

Load Regulation

L.Vo

L.Vo

50

10=5mA to O.5A, Tj =25°C

360

10 = 5mA
Quiescent Current

to 200mA, Tj =25°C
4.2

Output Voltage Drift

L.Vo
L.T .

- - - - - - r-------------

0.8

10=5rnA

Tj =0 to 125°C
--

rnA

rnA

-1.1

rnV/oC

100

",V

c-----

f = 10Hz to 100KHz

VN

6
0.5

10=5rnA to 350rnA
-10=200rnA
Vi =21 t033V

L.ld

rnV

180

Tj =25°C

Id

Quiescent Current Change

Output Noise Voltage

rnV

10 = 200rnA
T j =25°C Vi =24to
33V

--

Ripple Rejection

RR

f= 120Hz 10=300rnA
Vi =22 to 32V

53

dB

--c---

*

-2

V

Ise

=500mA
T = 25°C, Vi =35V

300

rnA

Ipeak

Tj =25°C

700

rnA

Dropout Voltage

Vo

Short Circuit Current
Peak Current

T j = 25°C, 10
j

Tmin
MC78MXXI: Tmin = - 40°C
MC78MXXC: Tmin = O°C

c8~SUNG

432

LINEAR INTEGRATED CIRCUIT

MC78MXXC SERIES

ELECTRICAL CHARACTERISTICS MC78M20C
(Refer to the test circuits, Tmin~Tj~125°C, 10 = 350rilA, Vi = 29V, unless otherwise specified, C i :: O,33J,tF, Co = O,1iJ,F)

Characteristic

Output Voltage

Symbol

Vo

Test Conditions

Min

Typ

Tj =25°C

19,2

20

Max
20,8

10 = 5 to 350rnA

19

20

21

I Vi =23 to
i

L.Vo

100

35V

rnV

'o=200mA
T j =25°C
Vi =24to
35V
r

50

=
=
10 =5mA to 200mA, Tj =25 °C
10 5mA to O,5A, Tj 25°C

Load Regulation
Quiescent Current
r-------

L.Vo

Id

400
rnV
4,2

6

10=5rnA to 350rnA

D,S
0,8

L. Id

10=200rnA
Vi =23to 35V

Output Voltage Drift

L.Vo
L.T

10=5rnA
Tj =0 to 125°C

Output Noise Voltage

VN

f = 10Hz to 100KHz

Ripple Rejection

RR

f = 120Hz 10 =300rnA
Vi =24t034V

Dropout Voltage

VD

T j =25°C,l o =500mA

Short Circuit Current

Ise

Ipeak

I

200

Tj =25°C

Quiescent Current Change

Peak Current

V

V i =23t035V

--

Line Regulation

Unit

rnA

rnA

-1.1

rnVloC

110

J,tV

53

I

dB

2

V

Tj = 25°C, Vi = 35V

300

rnA

Tj =25°C

700

rnA

* T min
MC78MXXI: T min = - 40°C
MC78MXXC: Tmin = O°C

c8SAMSUNG
Electronics

433

LINEAR INTEGRATED CIRCUIT

MC78MXXC SERIES

ELECTRICAL CHARACTERISTICS MC78M24C
(Refer to the test circuits, Tmln~TI~125°C, 10= 350mA, V j = 33V, unless otherwise specified, Cj = O.33",F, Co = 0.1",F)
Characteristic

Output Voltage

Line Regulation

Load Regulation
Quiescent Current

Symbol

Vo

~Vo

~Vo

Test Conditions

Min

T j =25°C

23

24

25

10 = 5 to 350mA
V j =27to 38V

22.8

24

25.2

=

Vj =27to
38V

lYP

10 200mA
Tj =25°C Vj =28to
38V

mV
50

I

10 = 5mA to O.5A, Tj =25°C

480

10=5mA to 2OOmA, Tj =25°C

240
4.2

Output Voltage Drift
Output Noise Voltage

~Id

'6 Vo
~T

Ripple Rejection

RR

f= 120Hz 10=300mA
Vj =28 to 38V

Dropout Voltage

Vo

Tj =25°C, 10 = 500mA

Isc

Peak Current

Ipeak

mA

mA

I

10=5mA
T j =0 to 125°C
f = 10Hz to 100KHz

Short Circuit Current

0.8

10=200mA
Vj =27to 38V

VN

6

mV

0.5

10 =5mA to 350mA
Quiescent Curlent Change

V

100

I

Tj =25°C

Id

Max

-1.2

mVfOC

170

p.V

50

dB

I
2

V

Vj =35V

300

mA

Tj =25°C

700

mA

• Tm1n
MC78MXXI: Tmin = - 40°C
MC78MXXC: Tmin = O°C

c8SAMSUNG
Electronics

434

MC78MXXC SERIES

LINEAR INTEGRATED CIRCUIT

APPLICATION CIRCUIT
Fig. 2 Constant current regulator

Fig. 1 Fixed output regulator

VIN

~_--oVOUT

o---.......---f
VXX

Notes:
(1) To specify an output voltage. substitute voltage value for "XX".
(2) Although no output capacitor is needed for stability. it does
improve transient response.
(3) Required if regulator is located an appreciable distance from
power supply filter.

I

Fig. 4 Adjustable output regulator (7 to 30V)

Fig. 3 Circuit for Increasing output voltage
VOUT
VOUT

R1

IR1~51d

R2

Vo=Vxx (1+R2/Rl)+ld R2
Fig. 5 0.5 to 10V Regulator

t---,.-.----r---------_--ovouT
C1

1

C2
0.1"F

.7V<-VIN<·1T

10kO

Fig. 6 High current voltage regulator
01 SGS536

VING--_._--' __

r-------.....,
R

_

VBEQ1

1-1---~

~-+--oVOUT

IREO _.!9!.
601

10 =IREG +601

(I REG -

VRBEOl )
Rl

c8~SUNG

435

MC78MXXC SERIES

LINEAR INTEGRATED CIRCUIT

APPLICATION CIRCUIT (continued)
Fig. 8 Tracking voltage regulator

Fig. 7 High output current with short circuit protection

VIN.o-~~_ _ _~R~SCIr-_""" _0_1 r - - - - - - - - ,

VOUT

02
4.7kO

R1

30

Rsc

COMMON

COMMON

VOUT

~

~

4.7kO

VBEDQ2

=~

-Vi
VOUT

Fig. 9 High input voltage circuit

Fig. 10 Reducing power dissipation
with dropping resistor

-

1--_.__---<\. VOUT

10

R

Fig. 11

RL

Vi (min) - Vxx - VOROP (max)
10 (max)+ld (max)

Fig. 12 Adjustable output voltage with
temperature compensation

(unity voltage gain, lo:s;O.5)
Vo

=--___--1"'1 VOUT

1-3

1----0
~ Modulation

Signal

Note: The circuit performs well up to 100 KHz.
Note: 02 is connected as a diode in order to compensate the
variation of the 01 VBE with the temperature. C allows a
slow rise-time of the Vo
Vo=Vxx (1+~)+VBE
R1

c8 SAMSUNG
Electronics

436

MC79XXC SERIES

LINEAR INTEGRATED CIRCUIT

3-TERMINAL NEGATIVE
VOLTAGE REGULATOR

TO·2.."O

The MC79XXC series of three-terminal negative regulators are
available in TO-220 p8:ckage and with several output voltages. They
canprovides local on-card regulation, eliminating the distribution
problems associated with single point regulation; furthermore,
having the same voltage options as the MC78XXC positive standard
series, they are particularly suited for split power supplies.
If adequate heat sinking is provided, the MC79XXC series can deliver an
Olltput current in excess of 1.5A. Although designed primarily as fixed
v' ,Itage regulators, these devices can be used with external components
t , obtain adjustable voltages and currents.

FEATURES
• Output current in excess of 1A
• Output voltages of - 2V, - 5V, - 6V, - 8V, -12V, -15V,
-18V, -24V
• Internal thermal overload protection
• Short circuit protection
• Output transistor safe-area compensation

ORDERING INFORMATION
Device
MC79XXCT

SCHEMATIC DIAGRAM

I

1: GND 2: Input 3: Output

* * MC79XXIT

Package Operation Temperature
TO·220

o -125°C

TO·220

-40 -125°C

* * Under development

R15

R16

,----'-1f------+---OOUT

R23
~-~-~-~~--~-------------~~~--------------~~--------------+-OIN

c8SAMSUNG
Electronics

437

LI.NEAR INTEGRATED CIRCUIT

MC79XXC SERIES
ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

Value

Unit

Input Voltage (for Vo = - 2 to -18V)
(for Vo = - 24V)

VIN

-35
-40

V
V

Thermal Resistance Junction-Case
Junction-Ai r

OJC
OJA

5
65

°CIW
°CIW

Operating Temperature Range

Topr

0-+ 125

°C

Storage Temperature Range

Tstg

-65 - + 150

°C

ELECTRICAL CHARACTERISTICS MC7902C
(Ci =2.2"F, Co =1"F, Tj=O to 125°C, 10=500mA, Vi =10V, unless otherwise specified)
Characteristic

Output Voltage

. Line Regulation

Symbol

Vo

!:::J.Vo

Test Conditions

Min

lYP

Max

Tj =25°C

-1.92

-2

-2.08

-1.9

-2

10=5mA to 1A Po~15W
Vi= -7 to -20V

I
10

40

Vi= -8to
'-12V

5

20

10

120

Tj =25°C
10=250 to 750mA

3

60

Tj =25°C

3

6

Tj =25°C

6Vo

Quiescent Current

Id

Quiescent Current Change

!:::J.ld

mV

mV

1.3

Vi = - 7 to - 25V
Output Voltage Drift

6Vo
!:::J.T

.lo=5rnA

Output Noise Voltage

VN

. f = 10Hz to 100KHz
Tj ';'25°C

Ripple Rejection

RR

f=120Hz
6.Vi =10V

Dropout Voltage

Vo

Tj =25°C
10=1A

Short Circuit Current

Isc

Peak Current

Ipeak

TJ = 25°C, Vi = - 35V
Tj =25°C

rnA

0.5

10=5mA to 1A

c8~SUNG

V

I

Vi= -7to
-25V

Tj =25°C
10 =5mA to 1.5A
Load Regulation

-2.1

Unit

rnA

l

54

-0.4

rnVfOC

40

"V

60

dB

3.5

V

300

rnA

2.2

A

438

LINEAR INTEGRATED CIRCUIT

MC79XXC SERIES

ELECTRICAL CHARACTERISTICS MC7905C
Characteristic

Output Voltage

Line Regulation

Symbol

Vo

f:::,Vo

Min

Typ

T j =25°C

-4.B

-5

-5.2

-4.75

-5

-5.25

10=5mA to 1A, Po ~ 15W
Vi = - B to - 20V

Quiescent Current

10

Vi= -Bto
-12V

5

50

10

100

T j =25°C
10 =250 to .750rnA

3

50

Tj =25°C

3

6

V

100

I

T j =25°C

rnV

I
rnV

rnA

0.5

lo=5rnA to 1A
Quiescent Current Change

I

f:::,Vo

Id

Unit

I

Vi= -7to
-25V

Tj =25°C
lo=5rnA to 1.5A
Load Regulation

Max.

Test Conditions

f:::,l d

1.3

Vi = - B to - 25V

rnA

j

Output Voltage Drift

f:::,Vo
f:::,T

lo=5rnA

-0.4

rnVloC

Output Noise Voltage

VN

f = 10Hz to 100KHz
Tj =25°C

100

p.V

Ripple Rejection

RR

f=120Hz
f:::,Vi =10V

60

dB

Dropout Voltage

Vo

T j =25°C
10=1A

2

V

Short Circuit Current

Isc

Tj =25°C, Vi= -35V

300

rnA

Ipeak

T j =25°C

2.2

A

Peak Current

c8~SUNG

54

439

•

MC79XXC SERIES

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS MC7906C
(Ci

=2.2J.!F, Co =1J.!F, T =0 to 125°C, 10 =500mA, Vi =11V, unless otherwise specified)
j

Characteristic

Output Voltage

Symbol

Vo

Test Conditions

Min

Typ

Max

Tj =25°C

-5.75

-6

-6.25

-6

-6.3

10

120

5

60

10

120

Tj =25°C
10 =250 to 750mA

3

60

Tj =25°C

3

10=5mAto 1A, Po.s15W
Vi= -9to -21V

-5.7

Line Regulation

I

Tj =25°C
Vi= -9to
-13V
Tj =25°C
10=5mA to 1.5A

Load·Regulation

Quiescent Current

mV

/':,.Vo

Id

V

I

Vi= -8 to
-25V
/':,.Vo

Unit

mV

6

10=5rnA to 1A

0.5

Vi= -9to -25V

1.3

rnA

Quiescent Current Change

/':,.Id

Output Voltage Drift

/':,.Vo
/':,.T

10=5mA

-0.5

mVloC

Output Noise Voltage

VN

f = 10Hz to 100KHz
Tj =25°C

130

J.!V

Ripple Rejection

RR

f=120Hz
/':,.Vi =10V

60

dB

Dropout Voltage

Vo

Tj =25°C
lo=1A

2

V

Short Circuit Current

Isc

Tj =25°C, Vi= -35V

300

rnA

Peak Current

Ipeak

Tj =25°C

2.2

A

rnA

I

c8SAMSUNG
Electronics

54

440

LINEAR INTEGRATED CIRCUIT

MC79XXC SERIES

ELECTRICAL CHARACT~RISTICS MC7908C
(Ci = 2.2j.tF, Co = 1/LF, Tj = 0 to 125°C, 10 = 500mA, Vi = 14V, unless otherwise specified)
Characteristic

Output Voltage

Symbol

Vo

Test Conditions

Min

Typ

Tj =25°C

-7.7

-8

-8.3

-7.6

-8

-8.4

10=5rnA to 1A, Po~15W
Vi = - 11 .5 to - 23V

6Vo

160

5

80

12

160

Tj =25°C
10 =250 to 750mA

4

80

Tj =25°C

3

6

Vi= -11 to
-17V

6Vo

Quiescent Current

Id

Quiescent Current Change

61d

6T

1

rnA

I

10=5mA

-0.6

rnV/oC

175

/LV

60

dB

Output Noise Voltage

VN

f = 10Hz to 100KHz
Tj =25°C

Ripple Rejection

RR

f=120Hz
6Vi =10V

Dropout Voltage

VD

Tj =25°C
10=1A

Short Circuit Current

Ise

Peak Current

Ipeak

c8SAMSUNG
Electronics

rnA

0.5·

Vi= -11.5to -25V
Output Voltage Drift

I

mV

10=5mA to 1A

6Vo

V

mV

Tj =25°C

Tj =25°C
10=5mA to 1.5A
Load Regulation

Unit

I
10

Vi= -10.5 to
-25V
Line Regulation

Max

54

2

V

Tj =25°C, Vi = - 35V

300

rnA

Tj =25°C

2.2

A

441

LINEAR INTEGRATED CIRCUIT

MC79XXC SERIES

ELECTRICAL CHARACTERISTICS MC7912C
(Ci ::: 2.2~F, Co = l~F, Tj = 0 to 125°C, 10 = 500mA, Vi = 18V, unless otherwise specified)

Characteristic

Output Voltage

Line Regulation

Symbol

Vo

f::::.Vo

Test Conditions

Min

lYP

Tj =25°C

-11.5

-12

-12.5

-11.4

-12

-12.6

10=5mAto lA, PoS15W
Vi= -15.5 to -27V
Vi= -14.5to
-30V

12

Vi= -16to
-22V

6

120

12

240

Tj =25°C
10 =250 to 750mA

4

120

Id

Tj =25°C

3

6

Quiescent Current Change

f::::.ld

V

240
mV

Tj =25°C

mV

f::::.Vo

Quiescent Current

Unit

j

Tj =25°C
10 =5mA to 1.5A
Load Regulation

Max

mA

0.5

10=5mA to 1A

1

Vi = - 15 to - 30V

mA

Output Voltage Drift

f::::.Vo
f::::.T

10=5mA

-0.8

mV/oC

Output Noise Voltage

VN

f = 10Hz to 100KHz
Tj =25°C

200

~V

Ripple Rejection

RR

f=120Hz
6Vi =10V

60

dB

Dropout Voltage

Vo

Tj =25°C
10=lA

2

V

Short Circuit Current

Isc

Tj =25°C, Vi= -35V

300

rnA

Ipeak

Tj =25°C

2.2

A

Peak Currenr

c82!"SUNG

54

442

LINEAR INTEGRATED CIRCUIT

MC79XXC SERIES

ELECTRICAL CHARACTERISTICS MC7915C
(CI

=2.2p.F, Co =1p.F, TJ =0 to 125°C, 10 =5OOmA, Vi =23V, unless otherwise specified)
Characteristic

Output Voltage

Symbol

Vo

Test Conditions

Min

lYP

Max

Tj =25°C

-14.4

-15

-15.6

-14.25

-15

-15.75

12

300

6

150

12

300

TJ =25°C
10 =250 to 750rnA

4

150

Tj =25°C

3

10=5mA to 1A, PoS15W
Vi = - 18 to - 30V
Vi= -17.5 to
-30V

Line Regulation

b.Vo

Tj =25°C
Vi= -20 to
-26V
TJ =25°C
10 =5rnA to 1.5A

Load Regulation

Quiescent Current

•

rnV

6

rnA

0.5

10=5rnA to 1A
Quiescent Current Change

V

rnV

b. Vo

Id

Unit

b.1d

1

Vi= -18.5to -30V

rnA

Output Voltage Drift

b. Vo
b.T

10=5rnA

-0.9

rnVfOC

Output Noise Voltage

VN

f = 10Hz to 100KHz
Tj =25°C

250

",V

Ripple Rejection

RR

f=120Hz
b.Vi =10V

60

dB

Dropout Voltage

Vo

Tj =25°C
10=1A

Short Circuit Current

Isc

Peak Current

Ipeak

c8·~SUNG

54

2

V

Tj = 25°C, Vi = - 35V

300

rnA

Tj =25°C

2.2

A

443

LINEAR INTEGRATED CIRCUIT

MC79XXC SERIES

ELECTRICAL CHARACTERISTICS MC7918C
Characteristic

Output Voltage

Symbol

Vo

Test Conditions

Min

Typ

Max

Tj =25°C

-17.3

-18

-18.7

-17.1

-18

lo=5mA to 1A, Po~15W
Vi= -22.5to -33V

I Vi=
Line Regulation

f':"Vo

1

V

-21 to
-33V

Tj=25°C~"
Vi= -24to
-30V

Tj =25°C
10 =5mA to 1.5A

Quiescent Current

I
!

15

1

8

-18.9
360
mV
180

15

360

Tj =25°C
10 = 250 to 750mA

5

180

Tj =25°C

3

f':"Vo

Id

mV

6

mA

f':"ld
Vi = - 22 to - 33V

Output Voltage Drift

f':"Vo
~

Output Noise Voltage

mA

0.5

10=5mA to 1A
Quiescent Current Change

I

j

--

Load Regulation

Unit

1

10=5mA

-1

mV/oC

VN

f = 10Hz to 100KHz
Tj =25°C

300

/LV

Ripple Rejection

RR

f=120Hz
f':"V i =10V

60

dB

Dropout Voltage

Vo

Tj =25°C
10=1A

Short Circuit Current

Ise

Tj 25°C, Vi

Peak Current

Ipeak

Tj =25°C

c8SAMSUNG
Electronics

=

54

2

=- 35V

V

300

rnA

2.2

A

444

LINEAR INTEGRATED CIRCUIT

MC79XXC SERIES

ELECTRICAL CHARACTERISTICS MC7924C
(Ci

=2.2p.F, Co =1p.F, T =0 to 125°C, 10 =500mA, Vi =33V, unless otherwise specified)
j

Characteristic

Output Voltage

Symbol

Vo

Test Conditions

Min

Typ

T j =25°C

-23

-24

-25

-22.8

-24

-25.2

15

480

10= 5mA to 1A,Po ;:5;15W
Vi= -27to -38V

L,Vo

I

~~~

T j =25°C
Vi= -30to
-36V

Quiescent Current

15

480

Tj =25°C
10 =250 to 750rnA

5

240

T j =25°C

3

L,Vo

Id

V

mV

I

T j =25°C
10=5rnA to 1.5A
Load Regulation

Unit

!

Vi= -27to
-38V
Line Regulation

Max

rnV

6

rnA

---

0.5

10=5rnA to 1A
Quiescent Current Change

L,l d

I
I

Vi = - 27 to - 38V
Output Voltage Drift

L,V o
~

1

rnA

10=5rnA

-1

rnV/oC

400

/-tV

60

dB

2

V

Output Noise Voltage

VN

f = 10Hz to 100KHz
Tj =25°C

Ripple Rejection

RR

f==120Hz
L,Vi =10V

Dropout Voltage

VD

Tj ==25°C
10 ==1A

Short Circuit Current

Ise

Tj = 25°C, Vi = - 35V

300

rnA

Peak Current

Ipeak

Tj =25°C

2.2

A

c8SAMSUNG
Electronics

54

445

•

LINEAR INTEGRATED CIRCUIT

MC79XX SERIES
APPLICATION INFORMATION
Fig. 1 - Fixed output regulator

Notes:
(1) To specify an output voltage, substitute voltage value for

"XXC".

-Vlo-~~~

~":"":"-O-Vo

(2) Required for stability. For value given, capacitor must be solid
tantalum. If aluminium electrolitics are used, at least ten times
value shown should be selected. CI is required if regulator is
located an appreciable distance from power supply filter.
(3) To improve transient response. If large capaCitors are used, a
high current diode from input to output (1N4001 or similar)
should be introduced to protect the device from momentary input short circuit.

Fig. 3 - Circuit for increasing output voltage

Fig. 2 - Split power supply (±15VI1A)

+2fN D - - t - - - t

t-.....-__- o

+15V

+ C2

1-"-------0 -15V

-Yo

R1+R2

vo-vxx.~

* Against potential latch-up problems.

VXXIR2 > 31d

* C3 optional for improved transient response and
ripple rejection.

Fig. 4 - High current negative regulator (~5V/4A with
SA current limiting)

Fig. 5 - Typical ECl system power supply (-5.2V/4A)

0.20
-1OV

-12'1
4.70

* Optional dropping resistorto reduce the power
dissipated in the boost transistor.

c8~SUNG

,446

MC79LXXAC SERIES

LINEAR INTEGRATED CIRCUIT

3-TERMINAL NEGATIVE VOLTAGE
REGULATOR

T()'92

These regulators employ internal current limiting and
thermal-shutdown, making them essentially
indestructible. The are intended as fixed voltage
regulators in a wide range of application including local
regulator for eliminatation of noise and distribution
problems associated with single-point regulation.

FEATURES
•
•
•
•
•
•
•

Output current up to 100mA
No external components
Internal thermal over load protection
Internal short circuit current limiting
Available in JEDEC TO·92
Mass production: MC79L05
Under development: -12; -15; -18; - 24V

I

1: GND 2: Input 3: Output

ORDERING INFORMATION
Device
S79LXXACZ.·
* * S 79LXXAIZ

SCHEMATIC DIAGRAM

Package Operation Temperature
TO·92

o -125°C

TO·92

- 40 -125°C

** Under development·

Fig. 1

c8SAMSUNG
.
E~s

~

447

LINEAR INTEGRATED CIRCUIT

MC79LXXAC SERIES

ABSOLUTE MAXIMUM RATINGS (Ta=25°C)
Characteristic

Symbol

Value

Unit

Input Voltage (- 5V)
( - 12V to - 18V)
(-24V)

VI

-30
-35
-40

VDC

Operating Temperature Range

Topr

0-+ 125

°C

Storage Temperature Range

T5t9

-65 - + 150

°C

MC79L05AC ELECTRICAL CHARACTERISTICS
(Vi = -10V, 10 = 40mA, Ci = 0.33J-1F, Co = 0.1J-1F, 0°C5Tj5 + 125°C, unless otherwise specified)
Characteristic

Symbol

Output Voltage

Vo

Test Conditions

Tj = 25°C

Line Regulation

6Vo

Tj = 25°C

Load Regulation

6Vo

Tj = 25°C

Output Voltage

Vo

Quiescent Current

Id

Quiescent
Current Change

I With
I With

Output Noise Voltage

Line
Load

Id

Typ

Max

Unit

-4.8

-5.0

-5.2

V

-7.0V~Vi~

-20V

150

8.0V~Vi~

- 20V

100

-

1.OmA5 105100mA

60

1.OmA 5105 40mA

30

-7.0V>Vi> -20V, 1.OmA510540mA

-4.75

-5.25

Vi= -1.OV, 1.OmA510570mA

-4.75

-5.25

Tj = +25°C

6.0

Tj = + 125°C

5.5

- 8V~ Vi~ - 20V

1.5

1.OmA 510 5 40mA

0.1

VN

Ta=25°C,10Hz5f5100KHz

Ripple Rejection

RR

f=120Hz,
Tj = 25°C

Dropout Voltage

VD

Tj = 25°C

c8~SUNG

Min

-8.0~Vi~-18V

41

mV

mV

V

mA

mA

40

J-IV

49

dB

1.7

V

448

MC79LXXAC SERIES

LINEAR INTEGRATED CIRCUIT

MC79L12AC ELECTRICAL CHARACTERISTICS·
(".i= -19V, 10 = 40mA, Ci =0.33/-tF, Co = 0.1/-tF, 0°C::5:Ti::5:+125°C, unless otherwise specified)
Symbol

Characteristic
Output Voltage

Test Conditions

Vo

Ti =25°C
-14.5V~Vi~

Line Regulation

6Vo

Ti =25°C

Load Regulation

6Vo

Ti = 25°C

Output Voltage

Vo

--

Quiescent Current

Id

I

Quiescent
Current Change

I

With Line

rWith Load

Id

-16V~Vi~

Min

Typ

Max

Unit

-11.5

-12.0

-12.5

V

250

-27V

1.0mA::5:lo::5: 100mA

100

1.0mA ::5: 10::5: 40mA

50

-14.5V > Vi> - 27V, 1.0mA::5: 10::5:40mA

-11.4

-12.6

Vi= -19V, 1.0mA::5:lo::5:70mA

-11.4

-12.6

Ti = + 25°C

6.5

Ti = + 125°C

6.0

- 16V ~ Vi ~ - 27V

1.5

1.0mA::5: 10::5: 40mA

0.1

Output Noise Voltage

VN

Ta=25°C, 1OHz::5: f::5: 100KHz

Ripple Rejection

RR

f = 120Hz, -15V~ Vi~ - 25V
Ti=25°C

l Dropout Voltage

VD

Ti = 25°C

mV

200

- 27V

37

mV

V

mA

mA

80

/-tV

42

dB

1.7

V

MC79L15AC ELECTRICAL CHARACTERISTICS
(Vi = -23V, lo=40mA, Ci =0.33/-tF, Co =0.1/-tF, O°C::5:Ti ::5: +125°C, unless otherwise specified)

I Symbol

Characteristic

Test Conditions

I

Output Voltage

Ti = 25°C

Vo

, Line Regulation

t

Load Regulation

6V o

Tj = 25°C

6Vo

Tj = 25°C

-17.5V~Vi~

I

Vo

1---

Quiescent Cu rrent

Id
I

Quiescent
Current Change

I With
I With

Output Noise Voltage

Line
Load

-14.4

-15.0

-15.6
300

-30V

-27V2Vi 2 -30V

250

1.0mA::5:lo::5:100mA

150
--

-14.25

-15.75

-14.25

-15.75

Tj = +25°C

6.5

Tj = + 125°C

6.0
-30V

1.5

1.0mA::5: 10::5: 40mA

0.1

Ta=25°C,10Hz::5:f::5:100KHz

Ripple Rejection

RR

f=120Hz,
Tj =25°C

Dropout Voltage

VD

Tj :.:: 25°C

-18.5V~Vi2

-28.5V

34

Unit
V
I

mV

mV

75
~--.-

-17.5.v>Vi> -30V, 1.0mA::5:lo::5:40mA

VN

c8SAMSUNG
Electronics

Max

Vi = - 23V, 1.0mA::5:lo::5:70mA

-20V~Vi~

Id

Typ

1.0mA::5: lo::5: 40mA

Output Voltage

Min

f---

V

mA

mA

90

/-tV

39

dB

1.7

V

449

•

MC79LXXAC SERIES

LINEAR INTEGRATED CIRCUIT

MC79L18AC ELECTRICAL CHARACTERISTICS
(Vi = -27V, 10 = 40mA, Ci =0.33/LF, Co=0.1/LF, 0°C~Tj~+125°C, unless otherwise specified)
Characteristic

Test Conditions

Symbol

Output Voltage

Vo

Tj = 25°C

Line Regulation

6Vo

Tj = 25°C

. Load Regulation

6Vo

Tj = 25°C

Output ,Voltage

Vo

Quiescent Current

Id

Quiescent
Current Change
Output

Nois~

-20.7V~Vi~

-

21V~ Vi~

I With

Line

IWith Load

Voltage

Id

Typ

Max

Unit

-17.3

-18.0

::"'18.7

V

325

-33V

275

- 33V

1.0mA ~ 10 ~ 100mA

170

1.0mA ~ 10 ~ 40mA

85

-20.7V>Vi> -33V,

1.0mA~lo~40mA

1.0mA~lo~70mA

Vi = - 27V,

Min

-17.1

-18.9

-17.1

-18.9

Tj = + 25°C

6.5

Tj = + 125°C

6.0

-21V~Vi~

-33V

1.5

1.0mA ~ 10 ~ 40mA

0.1

10Hz~f~

VN

Ta= 25°C,

Ripple Rejection

RR

f = 120Hz, - 23V ~ Vi ~ - 33V
Tj = 25°C

100KHz

Dropout Voltage

VD

Tj = 25°C

33

mV

mV

V

mA

mA

150

/LV

48

dB

1.7

V

MC79L24AC ELECTRICAL CHARACTERISTICS
(Vi = - 33\1, 10 = 40mA, Ci = 0.33/LF, Co = 0.1/LF, O°C~Tj~ + 125°C, unless otherwise specified)
Characteristic

Symbol

Output Voltage

Vo

Test Conditions

Tj = 25°C

Line Regulation

6V o

Tj = 25°C

Load Regulation

6V o

Tj =25°C

Output Voltage

Vo

Quiescent Current

Id

Quiescent
Current Change

I With
I With

Output Noise Voltage

Line
Load

Id

Max

Unit

-23

-24

-25

V

-38V

350

-28V~Vi~

- 38V

300

1.0mA~ lo~

100mA

200

-27V>Vi> -38V,

1.0mA~lo~40mA

1.0mA~lo~70mA

I
I

100
-22.8

-25.2

-22.8

-25.2

Tj = +25°C

6.5

Tj = + 125°C

6.0

-28V~Vi~

1.5

-38V

1.0mA~lo~40mA

0.1

10Hz~f~100KHz

VN

Ta=25°C,

Ripple Rejection

RR

f = 120Hz, Tj = 25°C

Dropout Voltage

VD

Tj = 25°C

c8SAMSUNG
Electronics

Typ

-27V~Vi~

1.0mA~lo~40mA

Vi = - 33V,

Min

29V~ Vi~

- 35V

31

mV ,

mV

V

mA

mA

200

/LV

47

dB

1.7

V

450

LINEAR INTEGRATED CIRCUIT

MC79LXXAC SERIES

TYPICAL APPLICATION
Design Considerations

The MC79LOOAC Series of fixed voltage regulators
are designed with Thermal Overload Protection that
shuts down the circuit when subjected to an excessive
power overload condition. Internal Short-Circuit
Protection that limits the maximum current the circuit
will pass.
In many low current applications, compensation
capacitors are not required. However, it is
recommended that the regulator input be bypassed
with a capacitor if the regulator is connected to the
power supply filter with long wire lengths, or if the
output load capacitance is large. An input bypass

capacitor should be selected to provide good highfrequency characteristics to insure stable operation
under all load conditions. A O.33~F or larger tantalum,
mylar, or other capacitor having low' internal
impedance at high frequencies should be chosen. The
bypass capacitor should be mounted with the shortest
possible leads directly across the regulator's input
terminals. Normally good construction techniques
should be used to minimize ground loops and lead
resistance drops since the regulator has no external
sense lead. Bypassing the output is also
recommended,

Fig. 1 POSITIVE AND NEGATIVE

Fig. 2 TYPICAL APPLICATION

REGULATOR FIG.
+ VI{ } - - - _ . _ - - - - 1

t-----.----u+ Vo

I

INPUT()----.---o--l

~----ti
O.1/LF
- VI ( ) - - - - + _ - - I

....-----*-----0- Vo

A common ground is required between the input
and the output voltages. The input voltage must
remain typically 2.0V above the output voltage even
during the low point on the input ripple voltage.

,. = C

IN is required if regulator is located an
appreciable distance from power supply filter.
= Co improves stability and transient response.

c8SAMSUNG
Electronics

451

MC79MXXC SERIES

LINEAR INTEGRATED CIRCUIT

3-TERMINAL O.SA NEGATIVE
VOLTAGE REGULATOR

TO·22O

The MC79MXX series of 3-Terminal medium current negative voltage
regulators are monolithic integrated circuits designed as fixed voltage
regulators. These regulators employ intern.al current limiting, thermal
shutdown and safe-area compensation making them essentially indestructible. If adequate heat sinking is provided, they can deliver up to
SOOmA output current. They are intended as fixed voltage regulators in
a wide range of applications including local (on-card) regulation for elimination of noise and distribution problems associated with Single point
regulation. In addition to use as fixed voltage regulators, these devices
can be used with external components to obtain adjustable output
voltages and currents.

FEATURES
•
•
•
•
•
•
•

No external components required
Output current in excess of O.5A
Internal thermal-overload protection
Internal short circuit current limiting
Output transistor safe-area compensation
Available in JEDEC TO·220
Output voltages of -5V, -6V, -8V, -12V,

-15V, -18V, -24V

SCHEMATHIC DIAGRAM

1: Input 2: GNp 3: Output

ORDERING INFORMATION
Device
MC79MXXCT
* *MC79MXXIT

Package

Operation Temperature

TO·220

o-125°C

TO·220

-40 -125°C

* * Under development

R16
r---+-------·~~OUT

Q1

R23

L-__~--~----~------~____________~~~~--~~--------~_+--------------~_oIN

c8SAMSUNG
Electronics

452

MC79MXXC SERIES

LINEAR INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

Value

Unit

Input Voltage (for Vo = - 5 to -1.8V)
(for Vo = 24V)

VIN

-35
-40

V
V

Thermal Resistance Junction-Case
Junction-Air

OJC
OJA

5
65

°CfW

Operating Temperature Range

Topr

Storage Temperature Range

Ts1g

0-

ociw

+ 125

°C

-65 - + 150

°C

ELECTRICAL CHARACTERISTICS MC79M05C
(Refer to test circuit, O°C
0

10- 3

W

K!w

r---

TI =85"C

~

10- 4

/ L

10- 5
10

6

/

/

~.
1.4

I
F=

"TI = -25"C

1

1.8

2.2

2.6

REVERSE VOLTAGE (VI

Fig. 3 TEMPERATURE DRIFT

2.515

. / ~/

T;=25 C"",

REVERSE CURRENT (rnA)

2.52

" V-

II:

Fig. 4 FORWARD CHARACTERISTICS

IR=1~A
c----

----

2.51

a
w

"~

2.505

>

2.5

0

V~

----

~

w

U)

II:

~
II:

""

~~

2.495
2.49
~.485

i

2.48

-so

-25

25

·so

75

TEMPERATURE (OC)

c8SAMSUNG
Electronics
.

100

125

10- 6

i

10- 5
FORWARD CURRENT (rnA)

460

KA236/KA336·2.5

LINEAR INTEGRATED CIRCUIT

TYPICAL APPLICATIONS
Fig. S 2.SV REFERENCE

Fig. 6 2.SV Reference with minimum
temperature coefficient

5V

2.5V

lN457'

KA336·2.S
lN457'

I

t Adjust to 2.490V
* Any silicon signal diode

Fig. 7 Trimmed 4V to 6V reference with temperature
coefficient of breakdown voltage independent
Fig. 8 Precision power regulator with low
temperature coefficient

~ -,N,TVO",

KA336·2.S

* Does not affect temperature coefficient
..a---.z10K*

~ ~;5

1N457 I

Fig. 9 SV Crowbar

I

R'

-----l-·~I
OUTPUT
ADJUST

KA336·2.S x 2

100

m

SENSITIVE
GATE SCR

c8SAMSUNG
Electronics

461

LINEAR INTEGRATED CIRCUIT

KA236/KA336·5.0
VOLTAGE REFERENCE DIODE

TO·92

The KA236/KA336-5.0 integrated circuit is precision 5.0V shunt regulator.
The monolith.ic IC voltage references operate as a low temperature
coefficient 5.0V zener with 0.6 ohm dynamic impedance. A third terminal
on the KA236/KA336-5.0 allows the reference voltage and temperature
coefficient to be trimmed easily.
KA236/KA336-5.0 is useful as a precision 5.0V low voltage references
for digital voltmeters, power supplies or op amp circuitry. The 5.0V make
it convenient to obtain a stable reference from low voltage supplies.
Further, since the KA236/KA336-5.0 operates as a shunt regulators, it
can be used as either a positive or negative voltage reference.
KA236 is characterized for operation from - 25°C to 85°C, and KA336
from O°C to 70°C.

FEATURES
•
•
•
•
•

•
•
•
•

Low temperature coefficient
Adjustable 4V to 6V
Wide operating range current of 400p.A to 10mA
Three lead transistor package (To·92)
0.6 ohm dynamic impedance
± 1.0% initial tolerance available
Guaranteed temperature stabiUty
Easily trimmed for minimum temperature drift
Fast turn on

1: AOJ,2: +,3:-

ORDERING INFORMATION
Device

Package

S336Z-5.0
S236Z-5.0

Operation Temperature

o -70°C

TO-92

-25 -85°C

SCHEMATIC DIAGRAM

0+
R7

Rxl

Rl
017
09
R5

R6

R9

016
R10

R8
Rx2

Rll

L-~~----4-----------~----4-------+-------~----~----+-13

-

Rx1, Rx2: External
Resistors

c8SAMSUNG
Electronics

462

LINEAR INTEG·RATED CIRCUIT

KA236/KA336·5.0
ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

Value

Unit

Cu rrent
Cu rrent
Operating Temperature Range
KA236·5.0
KA336·5.0
Storage Temperature Range

IA
IF

15
10

mA
mA

Topr

-25 - +85
0-+70
- 60 - + 150

°C

~erse

~ryvard

T8tg

°C

ELECTRICAL CHARACTERISTICS
(Tmin~Ta.!S.T max, unless otherwise specified)
Characteristic

Symbol

Reverse Breakdown Voltage

KA336/236

Test Conditions

VA

KA336B/236B

Typ

Max

Min

Typ

Max

Ta=25°C, IA= 1mA

4.8

5.0

5.2

4.9

5.0

5.1

V

Ta=25°C

-

6

20

-

6

20

mV

0.6

2

n

12
1-------

mV
--

Reverse Breakdown
Change with Current

l:,vA

Reverse Dynamic Impedance

lD

Ta=25°C, IA= 1mA

-

0.6

2

-

l:iV AT 1

IA=1mA
T min~Ta~Tmax

-

4

12

-

Temperature Stability
Reverse Breakdown
Change with Current

600Jl.A~IA~10mA

600Jl.A~IA~10mA

l:iV AT2

Reverse Dynamic
Impedance

T min~Ta~T max
IA=1mA

lDT

Long Term Stability

Tmin~Ta~Tmax

IA=1mA
Tmin ~Ta~T max

S

Unit

Min

f - - - ------

4

-

6

24

-

6

24

mV

-

0.8

2.5

-

0.8

2.5

Q

-

20

-

-

20

-

ppm

• T min~Ta~T max
KA236: Tmin = - 25°C, Tmax = 85°C
KA336: Tmin = O°C, Tmax = 70°C

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 1 REVERSE VOLTAGE CHANGE

Fig. 2 ZENER NOISE VOLTAGE
400

T,=25"C

350

J

o

/

V

V

V

/

V

~

--

1\

\

300

~

III

(5 250
%

200

iR=1mA
T,=25"C

\

~

150

o

10

REVERSE CURRENT (rnA)

c8SAMSUNG
Electronics

10

100

1K

10K

lOOK

FREQUENCY (Hz)

463

I

KA236/KA336·5.0

LINEAR INTEGRATED CIRCUIT

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 4 RESPONSE TIME

Fig. 3 DYNAMIC IMPEDANCE.
1001---f------- ___ ~:-

_

:-=-~_

OUT~UT

f--IR=lmA + - - - - - 1 - - - - - - l - - - - - - - - I

"

r-----+---+---~--__4

~

10g_~----~t--~-g~~/

I!'"
-1'

TJ=25°C

--

INPUT

r----- I----

------- -----t-----/"*------i

,

rIPUT

I

---

10

---------+----j-----j

INPUT
I

------ -------j-----+---------j

0.1

L -_ _- L_ _ _-'---_ _---'-_ _-----'

100

10

lK

10K

4

lOOK

TIME(,.s)

FREQUENCY (Hz)

Fig. 6 TEMPERATURE DRIFT

Fig. 5 REVERSE CHARACTERISTICS
5.12

IR=lmA

5.08

~ 5.04

V

w

CJ

~

5

g
w

~ 4.96 1------

--

~

-

ex: 4.92

-=
--f--

r-.=_
10- 5

--~

Ti

_

4.88

r250C-

,

5

1.5

2.5

3.5

4.5

REVERSE VOLTAGE (V)

5.5

4.84
-50

- --

;--

-25

25

50

-........ ~
75

100

125

TEMPERATURE (OC)

Fig. 7 FORWARD CHARACTERISTICS

0.2

-

FORWARD CURRENT (rnA)

c8SAMSUNG
Electronics

464

KA236/KA336·5.0

LINEAR INTEGRATED CIRCUIT

TYPICAL APPLICATIONS
Fig. 9 S.OV REFERENCE WITH MINIMUM
TEMPERATURE COEFFICIENT

Fig. 8 S.OV REFERENCE
10V

K

~

5.0V
1N457*

KA336·S.0

KA336·S.0 ~--~

rh

1N457*

I

t Adjust to 5V
* Any silicon signal diode

Fig. 10 TRIMMED 4V TO 6V REFERENCE WITH TEMPERATURE
COEFFICIENT INDEPENDENT OF BREAKDOWN VOLTAGE
10V

Fig. 11 PRECISION POWER REGULATOR WITH
LOW TEMPERATURE COEFFICIENT

I----.------~-VOUT

KA336·5.0 '~--<~~~~BRATE

1N457

R1

* Does not affect temperature coefficient

625

FIGURE 10
1N457

Fig. 12 SV CROWBAR
V+---~---~-

KA336-5.0

100

SENSITIVE
GATE seR

c8SAMSUNG
Electronics

465

KA431

LINEAR INTEGRATED CIRCUIT

1:9-2--

PROGRAMMABLE PRECISION REFERENCES
The KA431 is a three-terminal adjustable regulator series with
guaranteed thermal stability over applicable temperature ranges. The
output voltage may be set to any value between V,ef (approximately 2.5
volts) and 36 volts with two external resistors. These devices have a
typical dynamic output impedance of 0.20. Active output circuitry
provid~ a very sharp turn-on characteristic, making these devices
excellent replancement for zener diodes in many applications.
KA431 I is characterized for operation from - 40°C to + 85°C, and
KA431C from O°C to 70°C.

1: Ref. 2: Anode 3: Cathode
8 DIP

FEATURES
•
•
•
•
•

Programmable output voltage to 36 volts
Low dynamic output impedance 0.20 typical
Sink current capability of 1.0 to 100mA
Equivalent full-range temperature coefficient of 50ppm/oC typical
Temperature compensated for operation over full rated operating
temperature range
• Low output noise voltage
• Fast turn on response

BLOCK DIAGRAM
i --- - - - - - - - 1
REFERENCE

REFERENCE (R) 0 .

Device

CATHODE (K)

~ANODE

2,3,4,7: N.C.

1

1: Cathode 2, 3, 6, 7: Anode 8: Ref.

4,5: N.C.

ORDERING INFORMATION
CATHODE

j

1: Cathode 6: Anode 8: Ref.
8 SOP

Operating Temperature Package

S431CZ

0-+ 70°C

KA431CN

0- + 70°C

8 DIP

KA431CD

0-+70°C

8 SOP

54311Z

-40-+85°C

TO-92

KA4311N

-40 -+85°C

8 DIP

TO-92

(A)

SCHEMATIC DIAGRAM
CATHODE

02

ANODE

c8SAMSUNG
Electronics

466

LINEAR INTEGRATED CIRCUIT

KA431
ABSOLUTE MAXIMUM RATINGS

(Operating temperature range applies unless otherwise specified.)
Characteristic

Unit

Value

Symbol
V KA

37

V

IK

-100 - + 150

rnA

Reference Input Current Range

IREF

0.05 -+ 10

rnA

Power Dissipation
0, Z Suffix Package
N Suffix Package

Po
770
1000

mW
mW

Operating Temperature Range
KA431CZ, KA431CN, KA431CD
KA4311Z, KA4311N

Topr
0-+70
,-40 -+85

°C
°C

Storage Temperature Range

T819

-65 -+150

°C

Cathode Voltage
Cathode Current Range (Continuous)

•

RECOMMENDED OPERATING CONDITIONS
Characteristic

Min

Cathode Voltage

VKA

VREF

36

V

Cathode Cu rrent

IK

1.0

100

rnA

ELECTRICAL CHARACTERISTICS
Characteristic

Reference Input Voltage

Symbol

VREF

Typ

Unit

Symbol

Max

(Ta=25°C, unless otherwise specified)
Min

Typ

Max

Ta=25°C

2.440

2.495

2.550

Ta=O°C
to 70°C

2.423

Test Conditions
V KA = VREF
IK=10mA

2.567

Unit

*T/C

V

1

mV

1

mVIV

2

p.A

2

Deviation of Reference Input
Voltage Over Temperature 1

VREF(dev)

Ratio of Change in Reference
Input Voltage to the Change
in Cathode Voltage

VREF
VKA

IK= 10mA

Reference Input Current

IREF

IK= 10mA
R1=10KO
R2=oo

Reference Input Current
Deviation Over Temperature
Range

IREF

IK= 10mA, R1 = 10KO
R2=oo
Ta=ooe to 70°C

0.4

1.2

p.A

2

Minimum Cathode Current
for Regulation

IKmin

VKA = VREF

0.5

1.0

rnA

1

Off-State Cathode Current

IKoff

VKA = 36V, VREF = OV

2.6

1000

nA

3

ZKA

VKA = VREF
IK= 1.0 to 100mA
f;:s;1.0KHz

0.22

0.5

0

1

Dynamic Impedance 2

VKA = VREF , IK = 10mA
Ta = O°C to 70°C

8

17

V KA = VREF
to 10V

-1.4

-2.7

VKA = 10V
to 36V

-1.0

-2.0

Ta=25°e

2.0

4.0

Ta=O°C
to 70 0 e

5.2

• Test Circuit

c8SAMSUNG
Electronics

467

LINEAR INTEGRATED CIRCUIT

KA431

Note: 1. The deviation parameters VREF(dev) and IREF(dev) are defined as the differences between the maximum and
minimum values obtained over the rated temperature range. The equivalent full-range temperature coefficient
of the reference input voltage, aV REF is defined as:
MAX VREF f-~VREF (DEV)
I

MIN V,,,

~_1

~6TA~
where L, TA is the rated operating free-air temperature range of the device.
aV REF can be positive or negative depending on whether minimum VREF or maximum VREF respectively,
occurs at the lower temperature
Example: Max VREF =2500mV@30°C, Min VREF =2492mV@O°C, VREF =2495mV@25°C, L,TA=70°C for;
KA431C

Because minimum VREF occurs at the lower temperature, the coefficient is positive.
2. The dynamic impedance is defined as:

When the device is operated with two external resistors (see Figure 2), the total dynamic impedance of
the circuit is given by:

I z' I = ~~

=

I I (1 + =~)
ZKA

TEST CIRCUIT
Fig. 1 Test Circuit for VKA

=VREF

IN PUT o---JlM---.----Q

Fig. 2 Test Circuit for VKA~ V REF
INPUT o--liMl------..----Q

R1

KA431
R2

VKA = VREF (1

Fig. 3 Test Circuit for

+ RlIR2) + IREF R1

loff

c8SAMSUNG
Electronics

468

KA431

LINEAR INTEGRATED CIRCUIT

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 5 CATHODE CURRENT VS CATHODE VOLTAGE

Fig. 4 CATHODE CURRENT VS CATHODE VOLTAGE

800
VKA=V ref
TA=25"C

125

VKA=V rel
TA=25'C

800

100

C

S.

I

u

I
U

75

~4oo

SO

Imin

I

25

)

u

I

V

-25

-SO

/

-75

-2

/

U

/

I

-100

200

OJ

[

-200

-1

-1

Cathode Voltage (V) •

Fig. 6 CHANGE IN REFERENCE INPUT
VOLTAGE VS CATHODE VOLTAGE

S

S.

i~

-10

l

-15

I!!

J!!

-25

"

~

~

~

.5

f

-30

CD

~

-35

o

-

10

15

20

25

Cathode Voltage (V)

30

20

'0

z

"

30

35

10

0

40

40

10

70

100

400

1K

4K

10K

40K 100K

Frequency (Hz)

Fig. 9 SMALL SIGNAL VOLTAGE
AMPLIFICATION VS FREQUENCY

Fig. 8 DYNAMIC IMPEDANCE VS FREQUENCY

100
40

....

~

~

U

-40

VKA=Vref
IK =10mA
TA=25"C

........
40

~

g -20

&!

IK =10mA
TA=25"C

I'"

.5

Fig. 7 NOISE VOLTAGE VS FREQUENCY
50

\

-5

I

1

Cathode Voltage (V)

~~~~E~ml~MII§11

70

TA 25"C
IK -1mA to 100mA

T~=r2bjc
IK =10mA

60

-

50

I

~

"

iii
:g,

10

§

c
,9

40

~
c

30

~

20

~

I
.5

1 f-0.7

K\

~

\

10

0.4
0.2
0.1

I
1K

10K

-10
100K

Frequency (Hz)

c8SAMSUNG
Electronics

1M

10M

1K

10K

100K
Frequency (Hz)

"

1M

10M

469

LINEAR INTEGRATED CIRCUIT

KA431

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 10

(Continued)

PULSE RESPONSE

TA=12S0C
1PUT

OUTPUT

i

2

1/

1

Tlme(,.s)

TYPICAL APPLICATIONS
FIGURE 11-SHUNT REGULATOR

v+

FIGURE 12-SINGLE·SUPPLY COMPARATOR WITH
TEMPERATURE·COMPENSATED THRESHOLD

O--""""~-----,----'-----OVOUT

___- - <

J

OUTPUT

INPUTo-~,.--..t-:A

V(th)= 2.5V

Q-------+--UGND

FIGURE 13-SERIES REGULATOR
V+o-__-------~

FIGURE 14-0UTPUT CONTROL
OF A THREE·TERMINAL
FIXED REGULATOR

FIGURE 15-HIGHER·CURRENT
SHUNT REGULATOR
V +O--AM..--...---.__-p-{)VOUT

V+G------,
t--......---UVOUT

KA431

R1

Vout = (1 + R2)V ref

c8SAMSUNG
Electronics

470

KA431

LINEAR INTEGRATED CIRCUIT

TYPICAL APPLICATIONS

(Continued)

FIGURE 16-CROWBAR

FIGURE 17-0VER·VOLTAGEJUNDER·VOLTAGE
PROTECTION CIRCUIT

\ D - _ - - - - . - - r { ) VOUT

KA431

V+o-~--~-t-----,

R2A

Low limit = VREF (1 + ~;:) + VSE

I

High limit = VREF (1 + ~;~)

FIGURE 18-VOLTAGE MONITOR

FIGURE 19-0ELAY TIMER

v +1 O--.-----t---M~-?-___,

Low limit

=VREF (1 + ~;:)

.
..
High limit

R1A
=VREF (1 + R2A)

Delay = R-C-In _ _
v _+_
(V +)- VREF

FIGURE 20-CURRENT LIMITER OR
CURRENT SOURCE

FIGURE 21-CONSTANT·CURRENT SINK
V+

RCL

lout

V+

KA431
VREF
lout=RcL

qsSAMSUNG
Electronics

VREF
lout=R$

471

KA201 AI KA301A

" LINEAR INTEGRATED CIRCUIT
8 DIP

SINGLE OPERATIONAL AMPLIFIER
The KA201A and KA301A are general-purpose operational amplifiers
which are externally phase compensated, permit a choice of operation
for optimum high-frequency performance at a selected gain: unity-gain
compensation can be obtained with a single capacitor.

FEATURES
8 SOP

•
•
•
•

Short-circuit protection and latch-free operation
Slew rate of 10V//Ls as a summing amplifier
Class AB output provides excellent linearity
Low bias current

BLOCK DIAGRAM
NULUCOMPENSATION

1

•

8 COMPENSATION

ORDERING INFORMATION
Device
KA201AN

VEE

5

4

OFFSET NULL

KA301AN
KA201AD
KA301AD

Package

Operating Temperature

8 DIP

8 SOP

-25 -

+85°C

o -

+ 70 0 e

-25 -

+85°e

o -

+ 70 0 e

SCHEMATIC DIAGRAM
r---~--~~-------+--~~------------~-oVcc

R11
'---.----~

c8SAMSUNG
Electronics

_

_o OUTPUT

472

KA201 AlKA301 A

LINEAR INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

KA201A

KA301A

Unit

Supply Voltage
Differential Input Voltage
Input Voltage
Output Short Circuit Duration
Power Dissipation
Operating Temperature Range
Storage Temperature Range

Vs
VIO
VI

±22
±30
±15
Continuous

±18
±30
±15
Continuous
500
0-+70
-65 - +150

V
V
V

Po
Topr
Tstg

500
-25- +85
-65 - +150

mW
°C
°C

ELECTRICAL CHARACTERISTICS
(Ta= +25°C, Vee = +15V, VEE= -15V, unless otherwise specified)

Characteristic

Input Offset Voltage

Input Offset Current

Input Bias Current

Symbol

VIO

Test Conditions

KA201A
Min

Rs:::s;50KO

Av

Average Temperature
Coefficient of Input
Offset Voltage

6V l0/6T

Average Temperature
Coefficient of Input
Offset Current

61d6T

Input Voltage Range

VieR

10

NOTE 1

75

7.5

mV

10

mV

4.5

50

nA

70

nA

60

250

nA

100
2.0

3.0

1.7

2.5

300

2.0

Vee = ±15V, RL~2KO, Vo= ±10V
NOTE 1

160

V/mV

15
30

p.VloC

0.01

0.3

nA/oC

0.02

0.6

nA/oC

3.0

15

6.0

25° C:::s;Ta:::S; Tamax

0.01

0.1

T amin:::s;Ta:::s;25°C

0.02

0.2

NOTE 1

Vs= ± 15V

NOTE 1

rnA

V/mV

160

NOTE 1

Vs= ±20V

3.0

rnA
25

25

nA
rnA

Vs = ± 15V

50

Unit

2.0

I

20
40

Vs= ±20V, Ta=Tamax
Large Signal Voltage Gain

1.5
NOTE 1

hB

Is

2.0
3

Vs= ±20V
Supply Current

0.5
NOTE 1

ho

KA301A

Typ Max Min Typ Max

V

±15
±12

V

Common-Mode Rejection
Ratio

CMRR

Rs :::s;50KO

NOTE 1

80

100

70

95

dB

Power Supply Rejection
Ratio

PSRR

Rs:::s;50KO

NOTE 1

80

100

70

100

dB

VOUT

Vs= ± 15V

Output Voltage Swing
Input Resistance

Ri

RL =10KO

±12 ±14

±12 ± 14

V

RL=2.0KO

±10 ±13

± 10 ± 13

V

1.5

0.5

4.0

2.0

MO

NOTE 1 KA201A: - 25:::s;Ta:::S; + 85°C
KA301A: O~Ta:::S; + 70°C

c8SAMSUNG
Electronics

473

I

KA201 AlKA301 A

LINEAR INTEGRATED CIRCUIT

TYPICAL PERFORMANCE CHARACTERISTICS
Ag. 2 VOLTAGE GAIN

Fig. 1 SUPPLY CURRENT

2.5
110

1
....

2

iii
:!:!.

z

15
a:

100

;(
I:'

a: 1.5
::>

UJ

i

>

CI
cC

U

~

90

---

0

::>

0

80

M\N\~

I-----

I----O

- 25;CSTaS 70 C

70
7.5

10

15

12.5

17.5

5

20

10

7.5

12.5

Fig. 4 INPUT CURRENT

Fig. 3 CURRENT LIMITING
80

15
Vs= ±15V

iii

12.5

10

60

0

80

i=
u

CI

z

...

!:ia:

z

!!.

~

70

:!:!.

0

>-

15

SUPPLY VOLTAGE (±V) MINIMUM

SUPPLY VOLTAGE (±V)

'-

I

Vs = ±15V

~
"" ~BIAS

"",,-

UJ

Ul

7.5

a:

40

UJ

::>

Q

~
0

0

::E

30

z

0

::E
::E

20

0
0

----- -_.-

2.5

10
OFFSET

I
15

10

25

30

-40

-20

0

OUTPUT CURRENT (± mAl

"'-"\

~

"""

80

i...

60

::>

40

~

z
UJ
a:
a:
U

...

20

120
..

Taf25°C_

.~~(;,.0- t---\.~J-

\

~

?J-

o t---- -

100

~

z

0

t

80

-

1

~

~

-~~-

I\..

UJ
Q

0

::E

z

0

::E
::E
0

100

1K

10K

100K

TEMPERATURE (OC)

40

'~«T >-.

0

j"...",

c8SAMSUNG
Electronics

1M

10M

'" "'"
VCMS±10V

~

60

20
10

80

Rs =1KIl
Ta=25°C

a:

"f\."-

r-----

iii
:!:!.
Q

~\l}~k

~~~

~

;!!;

~--C1=30pF

~G'~

80

40

Fig. 6 COMMON MODE REJECTION

Fig. 5 POWER SUPPLY REJECTION

100

20

TEMPERATURE (OC)

1K

10K

100K

FREQUENCY (Hz)

474

KA201A1KA301A

LINEAR INTEGRATED CIRCUIT
Fig. 8.0PEN LOOP FREQUENCY RESPONSE

Fig. 7 SINGLE POLE COMPENSATION

1~r---'----r---'----.---'----.---'

~~~--~--~----+----r-

100

225

R,
INPUT

R,

180

60

1351

I

:!!

z

4i

c:I

CI

~

w

CI

~0

C'~R~~~2

>

Cs~3OpF

...

80

ii

40

90

~

45

III

~

:r:
IlL

10K

lK

100

10

lOOK

1M

I

10M

FREQUENCY (Hz!

Fig. 10 VOLTAGE FOLLOWER PULSE RESPONSE

Ag. 9 LARGE SIGNAL FREQUENCY RESPONSE
16

10

T~=kJ"8

Vs

12

Vs =:t:15V-

-

I

C1=3pF

~a=25lc

+15V

~
CI

z

1\

\

i

I

\

r·~--J

til

~

1\

1\
i\

,

~"'-

o
lK

10K

-2

0

>

SINGLE POLE

I

". . . . I

lOOK

1M

VOUTPUT

I

J

-6 f - - SINGLE POLE

I

i

i

--

V

--- ---,-

-4

IL

I

1\
\

W

CI

Cl =3OPF'

INPUT

-8

I

I

10

~

-10
10M

30

40

50

60

80

70

TIME(,.S)

FREQUENCY (Hz!

Fig. 11 TWO POLE COMPENSATIO~

Fig. 12 OPEN LOOP FREQUENCY RESPONSE'
120

R,

I

"'"'\

100

">----+--o Vo.rr
80

225

\

(\,~SE J

ii
:!!

z
4i

lWO POLE

60

CI

i\
GA~

w

CI
c(

~

C'~R~~~2

40

0

>
20

Cs=3OpF
C,=1OC,

Ta=2S"C
Vs= ±1SV
f-C1 =3OpF
C2=iPF
-~

1

10

100

1K

10K

FREQUENCY (Hz!

c8SAMSUNG
Electronics

i'o-'

180

I
135 1
CI

~

90

w

til

c(

f
45

'""

100K

1M

10M

475

KA201AJKA301A

LINEAR INTEGRATED CIRCUIT

Fig. 13 LARGE SIGNAL FREQUENCY RESPONSE

Fig. 14 VOLTAGE FOLLOWER PULSE RESPONSE

16

10
Js=' ±'lJJ
Ta=25°C
Cl =3OpF
C2=300pF

\

12

\
\

JOJLE- f - -

J I

-

I

CI
Z

\

j

1/1

CI

~

-2

0

> -4

~\.

~-- V

-6

Ta=25°C
Vs= ±15V
Cl=3OpF
C2=300pF

-8

r-lK

,

\

III

\

OUTPUT

\

~

TWol,,6L~

~.,-~.

INPUT

I I

-10
10

1M

lOOK

20

30

FREQUENCY (Hz)

40

50

60

70

80

TIME(,&s1

Fig. 15 FEEDFORWARD COMPENSATION

I

Fig. 16 OPEN LOOP FREQUENCY RESPONSE
120

C,

100

--

I

Vs= ±15V
Ta=25°C -

r-.....

'\

80

~

'\

iii

R,

:!!.

z

INPUT

C

60

180

~

"\

CI

III

CI

~

40

PHASE,/-

~

'\

0

>
20

C,

rv

135
90

~

~IN

~EEDFORWARD

C,= 2.-f:R,
fo =3MHz

225

45

"
-20
10

100

lK

10K

lOOK

1M

10M

100M

FREQUENCY (Hz)

Fig. 18\ INVERTER PULSE RESPOSE

Fig. 17 LARGE SIGNAL FREQUENCY RESPONSE
16

12

>-

!!.
CI

z

10

~a~~Jcl

\

,

rlin

~

FEEDFORWARD

~
z

,
r\

!

III

CI

~

\

-2

,.. OU~PUT -

-- -- I
I
I
II
INPUT

~

~ -4

--6

"o

lOOK

------ 1---

CI

\.

!...
~
o

-

1M

" r-......

FREQUENCY (Hz)

c8SAMSUNG
Electronics

FEE~FORiARDI

-8

--- --- --I

~--

Ta=25°C
S = ±,15V-

-10
10M

10

20

30

40

50

60

70

80

TIME(,&s1

476

KA733C

LINEAR INTEGRATED CIRCUIT

DIFFERENTIAL VIDEO AMPLIFIER

14 DIP

The KA733C is a monolithic differential input, differential output,
'
wideband video amplifier.
The use of internal series-shunt feedback gives wide bandwidth with
low phase distortion and high gain stability. The KA733C offers fixed
gains 10,100,400 without external components, and adjustable gains from
10 to 400 by use of an external resistor.
The KA733C is intended for use as a high performance video and pluse
amplifier in communications, magnetic memories, displays and video
recorder systems.

14 SOP

FEATURES
•
•
•
•

120MHz bandwidth
250Kll input resistance
Selectable gains of 10,100,400
No frequency compensation required

BLOCK DIAGRAM

•

INPUT1
NC

G~BE~:6~
G1~~t~~i

OUTPUT2

G2A GAIN
SELECT

3

4

11 G1A GAIN
SELECT

ORDERING INFORMATION
Device

Package

KA733CN

14 DIP

KA733CD

14 SOP

Operating Temperature

0- + 70°C

7

SCHEMATIC DIAGRAM
vcco-----~--~~--~----~--~------~--~

INPUT~
GAIN SELECT 1

f

'------+---~I\r_---t---......._(J}

OUTPUT

........

~o----+--

GAIN SELECT 2

~)-____+-__---.

R14
VEEo-------~------.......------.......--------~--~

qsSAMSUNG
Electronics

477

I

LINEAR INTEGRATED CIRCUIT

KA733C
ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

Value

Unit

Differential Input Voltage
Common mode input Voltage
Power Supply Voltage
Output Current
Power Dissipation
Operating Temperature Range
Storage Temperature Range

VIO
VI
Vs
10
Po
Topr
Tstg

±S
±6
±8
10
SOO
0-+70
-6S- + 1S0

V
V
V
mA
mW
°C
°C

ELECTRICAL CHARACTERISTICS
(VCC= +6V, Vee= -6V, Ta=2S0C, unless otherwise specified)
Test
Figure

Symbol

1

Av

RL = 2KO, Vout = 3Vp-p

2

BW

Rs=SOO

"

1)
2)
3)

40
90
120

"
"
"

1)
2)
3)

2

tr

Rs=SOO
VOUT= 1Vp_p

10.5
4.S
2.S

12

ns

2

tpd

Rs = 500
VOUT= 1Vp_p

7.5
6.0
3.6

10

ns

3

RI

Voo::s1V

Characteristic
Differential Voltage Gain
Gain 1 (Note 1)
Gain 2 ( " 2)
Gain 3 ( " 3)
Bandwidth
Gain 1 (
Gain 2 Ta!:>70°C Vcc= +6V, VEE: -6V

Characteristic
Differential Voltage Gain
Gain 1 (Note 1)
Gain 2 (Note 2)
Gai n 3 (Note 3)

Test
Symbol
Figure

1

Av

Test Conditions

RL=2KO
:3V p. p

YOU!

Min

250
80
80

Typ

Max

Unit

600
120
12

VIV

Input Bias Current

liB

40

Input Offset Current

110

6.0

Jl-A
Jl-A

Input Voltage Range

1

VICR

± 1.0

V

Input Impedance (Gain 2)

3

Ri

8.0

KO

Common Mode Rejection Ratio
Gain 2 (Note 2)

4

CMRR

VCM = ± 1V, f!:>100KHz

50

dB

Power Supply Rejection Ratio
Gain 2 (Note 2)

1

PSRR

l;,.Vcc= ±0.5V
l;,. VEE = ±0.5V

50

dB

1

Voo

1

VOP

2.8

V

sink

2.5

rnA
rnA

Output Offset Voltage
Gain 1 (Note 1)
Gain 2 and Gain 3 (Note 2, 3)
Output Voltage Swing
Output Sink Current
Power Supply Current

'

Is

1.5
1.5

27

V

Notes 1. Gain select pins G1A and G1B connected together.
2. Gain select pins G2A and G2B connected together.
3. All gain select pins open.

c8SAMSUNG
Electronics

479

•

KA733C

LINEAR INTEGRATED CIRCUIT

PARAMETER MEASUREMENT INFORMATION
TEST CIRCUITS

Voo

2KO

1KO

Voo

2KO

VOLTAGE AMPLIFICATION ADJUSMENT

Fig. 5

c8SAMSUNG
Electronics

Fig. 6

480

KA733C

LINEAR INTEGRATED CIRCUIT

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 8 PHASE SHIFT vs FREQUENCY

Fig. 7 PHASE SHIFT vs FREQUENCY

r"
-5

IIB

e.

" '",....

~

-10

~

IL

iw

-15

i

........ ~ ~~

-50

-20

GAIN 2
Vs= ±6V_
Ta=25"C

~~

ta'-loo
CI

~ -150

""'"

'",-

~11

-250

Do

'Gj'ii

......
-300

-25

I'+~~

S

6

7

I

GAIN 1

-350

o

Vs= ±6V_
Ta=2S"C

I\\~

t:

%

111-200

~:c

~

'" ~\

IA!

10

FREQUENCY (MHz)

Fig. 9 VOLTAGE GAIN vs FREQUENCY

1000

50
100
FREQUENCY (MHz)

10

Fig. 10 PULSE RESPONSE
1.6

60

1.4

50

GAIN 1

-,... I'o,",~

m

:!!.

z

C

40

w

CI

-"

GAIN 2

CI

~

30

Q

20

I

~

CI

~

Vs= ±6V
Ta=25"C

w

CI

~
0

~
~
~~
~

~
~
z
w

1.2

GAIN 3
10

z

in

...>

1.0

GAIN2
0.6

500

0.2

-0.4
-15 -10

1000

Fig. 11 PULSE RESPONSE vs SUPPLY VOLTAGE

0

10

15

20

1.2

I

1.4

T

1.2

Vs= ±8V

~ 1.0

V

0.8

ys= ±1

Ill'"

~ 0.6

0.4

IV

~

0.2

~

6V

w

I

I

10

15

TIME (n.)

c8SAMSUNG
Electronics

20

25

0.6

...
...

~

35

0.4

~

0

I I
I~

GAIN 2 Vs= ±6V
R
25
-1 "C f-- t=lT -

I

0.2

"~

~Ta=70"~Ta=85"CTa=25"C

,
J

-0.2

1
-10 -5

0

Do

I

-0.2

0.8

>

GAIN 2
Ta=25"CRL =lKO

f)

30

1.0 I--I-- I- Ta=O"C

CI

~

Vs= ±3V

1/

!;

25

Fig. 12 PULSE RESPONSE vs TEMPERATURE
1.6

1.4

-0.4
-15

-5

TIME (ns)

1.6

o

Rl =lKO

-0.2

50
100
FREQUENCY (MHz)
fig. 9

I!:

~~~:5~~-

1J

10

~

I 7"
II V

II

!;
0

II'"

/GAINl

~ 0.4

~

III

GjlN3

0.8

-0.4

30

35

-15 -10 -5

10

15

25

30

35

TIME (ns)

481

KA733C

LINEAR INTEGRATED CIRCUIT
Fig. 13 COMMON MODE REJECTION RATIO
vs FREQUENCY

100

II

90

iii'

!lQ

II

.........

80

I"'"

2u
1&1

40

i~~:5~6 -

1'"

80

50

Q

i'..

70

z
iii
ex:
::;)

6.0

GAIN 2

Q

~
z

Fig. 14 OUTPUT VOLTAGE SWING vs FREQUENCY
7.0

z

30

:E
:E

20

4.0

~i'

1&1

Cl

I"'"

~

~

0

3.0

...>

1\
\

::;)

...
Do.

0
0

Vs= ±6V
Ta=25"CRl =lKO

5.0

Cl
Z

~

r"--,

0

:E

1
~

::;)

2.0

0

u

1.0
10

o

o

10K

1M

lOOK

10M

50

10

1

100M

FREQUENCY (Hz)

500

100

Fig. 15 DIFFERENTIAL OVERDRIVE RECOVERY TIME

Fig. 16 VOLTAGE GAIN vs SUPPLY VOLTAGE
1.4

70

TL25

1.3
60

!

1&1

:E
j:::

>
ex:

1&1

>

/v

50
Vs= ±6V
Ta=25"C
40 I--GAIN 2

V

0

fil

ex:

30

1&1

~

ex:

Q

iii>

/

20

I/

V

z

C(

10

... V

1.1

/!.

Cl
1&1

Cl

~

~
1&1

V

~

~

ex:

1.0
0.9
0,8

~

y

G

I---"" ~ V

-

~~

./V
/"

0.7
GAIlY
0.6

./

1c
./

1.2

V

0

1000

FREQUENCY (MHz)

0.5

V

0.4
20

40

60

80

100

120

140

160

180

200
SUPPLY VOLTAGE (:i:Y)

DIFFERENTIAL INPUT VOLTAGE (mY)

Fig. 17 OUTPUT VOLTAGE SWING
vs LOAD RESISTANCE

Fig. 18 GAIN vs FREQUENCY vs SUPPLY VOLTAGE

7.0

60

II

6.0

5
~

50

I II

iii'

i~~:5~6~

5.0

!l-

z

C(

Cl

Cl

I

1&1

Cl

4.0

~V

1&1

Cl

~

~

3.0

'~

2.0

fil

20

"il

~

~

"1\\\

ffi
Cl

10

z

iii

)
.",.,.,.

30

Q

/

1.0

~

~

I

...::>

0

GAIN 2 Ta=25"C

40

V
-10

.10

50

100

200

500

lK

LOAD RESISTANCE (0)

c8SAMSUNG
Electronics

5K

10K

10

100

VS,=,±,8VVs= ±6V

III

vr,Yv
500 1000

FREQUENCY (MHz)

482

KA733C

LINEAR INTEGRATED CIRCUIT
Fig. 19 SUPPLY CURRENT vs TEMPERATURE

Fig. 20 SUPPLY CURRENT vs SUPPLY VOLTAGE
28

21

1 1

Ta=25"C-

20

24
19

C

...z

_10-

18

III
IIC
IIC

=
>-

U

-r---.. ~ r-......

17

~

Go

=

III

/v

l

g

ffi

/'17
20

/

IIC

..:

Vs= ±6V

=
o

~

~

16

:::I

III

16

V

12

/

l/

//

15

/v

14

•

8

-60

-20

60

20

100

140

TEMPERATURE (OC)

3
SUPPLY VOLTAGE (:!:V)

Fig. 21 VOLTAGE GAIN vs RADJ

Fig. 22 VOLTAGE GAIN ADJUST CIRCUIT

1000

'"'-

~

<:I
III

<:I

~

g

...

~~~:5~~I

~1'

1\.

100

~

'",

Z

III

..:

......

"

III

is

l"

f"...
I

10
10

100

I'.~

111.

~
10K

RadJ (D)

c!iSAMSUNG
Electronics

483

KA9256

LINEAR INTERGRATED CIRCUI.T

DUAL POWER OPERATIONAL AMPLIFIER
. The KA9256 is a dual power operational amplifier and it is output
maximum current is 1.0A (Vs = ± 15V). It can be used in arm driver for
player, driver for brush motors forward and reverse rotation control and CD
output driver for hole motor.

10 SIP

FEATURES
•
•
•
•

=

Interal current limiting: Isc 350mA (Rsc
High output current: 10 500mA max
10 SIP HIS package
Internal phase compensated

=

=2.20)

lJ_~___~_

BLOCK DIAGRAM

ORDERING INFORMATION
Operating Temperature
w

rn

aJ
rn

>

t:

:::>
0

I

+

+

~

~

N

~

I
N

N

~

:::>

~

0

\lJ

aJrn

>

I

+

~

~

SCHEMATIC DIAGRAM
SENSE
~----~-~~-~---~-----~---~~Vcc

IN(-)

IN( +) O--+----+-_~
_ _.J____I__f
l---~-----<~-oOUTPUT

TO OTHER HALF

c8SAMSUNG
Electronics

484

LINEAR INTERGRATED CIRCUIT

KA9256
ABSOLUTE MAXIMUM RATINGS
Characteristics

Symbol

Value

Unit

Supply Voltage
Output Current
Power Dissipation
Operating Temperature Range
Storage Temperature Range

Vs

±18
1.0
12.5
-20- + 70
-65-+150

V
A
W
°C
°C

10
Po
Topr
Ts1g

ELECTRICAL CHARACTERISTICS
(Vcc= + 15V, VEE= -15V, Ta=25°C, unless otherwise specified)

Characteristic

Symbol

Test Conditions

Min

Typ

Max

Unit

VIO

2

6

mV

Input Offset Current

ho

10

200

nA

Input Bias Current

liB

100

700

nA

10

20

mA

Input Offset Voltage

Supply Current

Is

Output Voltage Swing

VOUT

Large Signal Voltage Gain

RL = 330

±12

Av

Input Voltage Range

± 13

V

100

dB

VICR

±12

± 14

V

Common Mode Rejection Ratio

CMRR

70

90

dB

Power Supply Rejection Ratio

PSRR

Bandwidth

BW

Slew Rate

SR

50

150

p.VN

1.0

MHz

Av = 1, RL = 330, R = 100, C;: 0.1 p.F

0.15

V/p.s

Limiting Current

los

Rsc = 2.20

0.35

A

Cross Talk

CT

RL=330, Vo= 1Vp-p

60

dB

c8SAMSUNG
Electronics

485

I

KF347C/AC, KF3471/AI

LINEAR INTEGRATED CIRCUIT

QUAD JFET INPUT OPERATIONAL
AMPLIFIERS

14 DIP

The KF347 is a high speed quad JFET input operational amplifiers. This feature high impedance, wide bandwidth, high slew rate, and low input offset and bias
currents. The KF347 may be used in circuits requiring
high input impedance, high slew rate and wide bandwidth, low input bias current.

FEATURES
•
•
•
•

Low input bias
High input impedance
Wide bandwidth: 4 MHz (Typ)
High slew rate: 13 V/p,s (Typ)

BLOCK DIAGRAM
ORDERING INFORMATION
Device
KF347CN
KF347ACN
KF3471N
KF347AIN

SCHEMATIC DIAGRAM

Package

Operating Temperature
0- + 70°C

14 DIP
-25 - +85°C

(One Section Only)
--0 Vee

' - - - - + - - - 0 OUTPUT

c8SAMSUNG
Electronics

486

LINEAR INTEGRATED CIRCUIT

KF347C/AC, KF3471/AI

ABSOLUTE MAXIMUM RATINGS
Characteris tics

Symbol

Value

Unit

Power Supply Voltage
Differential Input Voltage
Input Voltage Range
Output Short Circuit Duration
Power Dissipation
Operating Temperature Range KF347C/AC
KF34711AI
Storage Temperature Range

Vs
VIO
VI

±18
±30
±15
Continuous
570
0-+70
-25 - +85
-65 -+150

V
V
V

Po
Topr
Tstg

mV
°C
°C

ELECTRICAL CHARACTERISTICS
(Vee= ±15V, V EE = ±15V, Ta=25°C, unless otherwise specified)

Characteristic

Input Offset Voltage
Input Offset Voltage Drift

Symbol

Via

Min

Typ
3

I NOTE1

Input Bias Current

hs

Large Signal Voltage Gain

Av
VOUT

5

Typ

Max

5

10
13

I NOTE1
RL =2KO
Va = ± 10V I NOTE1

10
100

25

200

50

100

25

100

±12 ± 13.5
+15
-12

Unit

mV
pV/oC
pA

pA

V/mV

15

15

± 11

200
8

8
50

100
4

4

50

VieR

Max Min

10

I NOTE1

Rs = 10KO

KF347C/I

7

25
110

Input Voltage Range

Rs = 10KO

KF347AC/AI

L::,.VlolL::,.T Rs =10KO

Input Offset Current

Output Voltage Swing

Test Conditions

±12 ± 13.5

V

± 11

+15
-12

V

Common-Mode Rejection Ratio

CMRR

Rs:::;10KO

80

100

80

100

dB

Power Supply Rejection Ratio

PSRR

Rs:::;10KO

80

100

80

100

dB

1012

Input Resistance

RI

1012

Supply Current

Is

7.2

SR

13

13

V/p,s

GBW

4

4

MHz

Slew Rate
Gain Bandwidth Product

11

0

7.2

11

mA

NOTE 1. KF347C/AC: O:::;Ta:::; + 70°C
2. KF34711AI: - 25:::;Ta:::; + 85°C

c8SAMSUNG
Electronics

487

I

KF351

LINEAR INTERGRATED CIRCUIT

8 DIP

SINGLE OPERATIONAL AMPLIFIER
The KF351 is JFET input operational amplifier ~ith an internally
compensated input offset voltage. The JFET input device provides wide
bandwidth, low input bias currents and offset currents.

FEATURES
•
•
•
•
•
•

Internally trimmed offset voltage: 10mV
Low Input bias current: 50pA
Wide gain bandwidth: 4MHz
High slew rate: 13V1J.1.s
Low supply current: 1.8mA
High input Impedance: 10120

BLOCK DIAGRAM

8 soP

ORDERING INFORMATION

OFFSET

NULL

Device

Package

KF351N

8 DIP

KF351D

8 SOP

Operating Temperature

0-+ 70

0

e

5 OFFSET

NULL

SCHEMATIC DIAGRAM
,---~~~~----~-----------------------+----QVcc

IN (+ ) , 0 - - - - + - - - - - - ,
R5

INI(-)

'------------..-----<) OUTPUT
RS

OFFSET

NULL

o---~-+--+----.

L-+-~----~--~--~--+-----~~------~~----~----oVEE

c8SAMSUNG
Electronics

488

KF351

LINEAR INTERGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristics

Symbol

Value

Unit

Vs

±18
±30
±15
Continuous
500
0-+70
-65-+150

V
V
V

Power Supply Voltage
Differential Input Voltage
Input Voltage Range
Output Short Circuit Duration
Power Dissipation
Operating Temperature Range
Storage Temperature Range

vlO
VI
Po
Top,
T stg

mV
°C
°C

ELECTRICAL CHARACTERISTICS
(Vee = +15V, V EE = -15V, Ta=25°C, unless otherwise specified)

Characteristic

Symbol

Test Conditions

Min

Typ
5.0

Input Offset Voltage
Input Offset Voltage Drift

VIO

Rs= 10K

1O°C:s;Ta:s; + 70°C

f:::.Vlolf:::.T

Rs= 10K

I O°C:s;Ta:s; + 70°C

Input Offset Current

110

Input Bias Current

liB

I O°C:s;Ta:s; + 70°C

Av

Vo= ± 10V
RL =2KO

VOUT

RL =10KO

Input Voltage Range

VieR

25

pA

4

nA

200

pA

8

nA

I O:s;Ta:s; + 70°C

V/mV

15
±12

±13.5

V

± 11

±15

V
dB

CMRR

Rs :s;10KO

70

100

Power Supply Rejection Ratio

PSRR

Rs:s;10KO

70

100
2.3

Is

0

100

Common Mode Rejection Ratio

Power Supply Current

100

1012

Rj

Large Signal Voltage Gain
Output Voltage Swing

I O°C:s;Ta:s; + 70°C

mV

p.V/oC

10
25

Unit

10
13

50

Input Resistance

Max

dB
3.4

rnA

-----.~

Slew Rate
Gain-Bandwidth Product

SR
GBW

c8 SAIUISUNG
Electronics

Av=1

13

V/p.s

4

MHz

489

•

KF442C/AC, KF4421/AI

LINEAR INTEGRATED CIRCUIT
8 DIP

DUAL JFET INPUT OPERATIONAL
AMPLIFIERS
The LF442 is dual low power operational amplifiers. The
key feature of this op amp are low power, low input off·
set voltage, high slew rate, high gain bandwidth.

FEATURES
•
•
•
•
•

9 SIP

Low supply current: 400/LA MAX
Low input bias current: 50pA MAX
Low input offset voltage: 1mV MAX
High slew rate: 1VI/Ls
High gain bandwidth: 1MHz

BLOCK DIAGRAM
ORDERING INFORMATION

SCH EMATIC DIAG RAM

(One Section Only)

Device

Package

KF442CN
KF442ACN

8 DIP

KF442CS
KF442ACS

9 SIP

KF4421N
KF442AIN

8 DIP

KF442CS
KF442ACS

9 SIP

Operating Temperature

0- + 70°C

-25 - +85°C

vcco-------~--~~------------_+----------~

IN( +) 0-----+----+---+--------+-----,

.-----+-----{)

OUTPUT

R6

IN(-)Q---+---+

c8SAMSUNG
Electronics

490

KF442C/AC, KF4421/AI

LINEAR INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristics

Symbol

Value

Unit

Power Supply Voltage
Differential Input Voltage
Input Voltage Range
Output Short Circuit Duration
Power Dissipation
Operating Temperature Range KF442C/AC
KF44211AI
Storage Temperature Range

Vs
VIO
VI

±18
±30
±15
Continuous

V
V
V
mV

Po
0- +70
-25 - +85
-65 - + 150

Topr
Tstg

°C
°C

ELECTRICAL CHARACTERISTICS
(Vce= ±15V, V EE = ±15V, Ta=25°C, unless otherwise specified)

Characteristic

Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current

KF442AC/AI
Symbol

VIO

Output Voltage Swing
Input Voltage Range

Rs =10KU

I

Min

110

Max

0.5

1.0

VOUT

RL =10KQ
Vo:::: ± 10V I NOTE1

VICR

Max

1.0

5.0

Unit

mV
p.V/oC

10

7

5

25

5

50
10

nA

10

100

pA

20

nA

10

INOTEl
Rs:::: 10KQ

Typ

7

10

Av

Min

7.5

INOTEl

liB

KF442CII

Typ

NOTEl

f:oVlolf:oT Rs=10KQ

Input Bias Current

Large Signal Voltage Gain

Test Conditions

50
20

pA

50

200

25

200

25

200

15

200

±12

±13

±12

±13

V

±16

+18
-17

± 11

+14
-12

V

V/mV

Common-Mode Rejection Ratio

CMRR

Rs S;10KQ

80

100

70

95

dB

Power Supply Rejection Ratio

PSRR

RsS;10KQ

80

100

70

90

dB

1012

1012

Input Resistance

RI

Supply Current
Slew Rate
Gain Bandwidth Product

300

Is

400

400

500

p.A

SR

0.8

1

0.6

1

V/p.s

GBW

0.8

1

0.6

1

MHz

NOTE 1. KF442C/AC: Os;Tas; + 70°C
2. KF44211AI: -25s;Tas; +85°C

c8SAMSUNG
Electronics

491

I

KS272C/AC, KS2721/AI

CMOS INTEGRATED CIRCUIT

DUAL CMOS OPERATIONAL
AMPLIFIER

8 DIP

KS272 is CMOS operational amplifier designed to
operate with single or dual supplies.
This device has extremely high input impedance, low
input bias and offset current.
9 SIP

Application areas include transducer amplifier, amplifier blocks, active filters, signal buffers, and all the conventional OP Amp circuits which can be easily
implemented in single power supply systems.

FEATURES
• Wide operating voltage range; 3V to 18V or
or ::!: 1.SV to ::!: 8V
• High Input Impedance: 10120
• Very low Input bias current
• Common-mode Input voltage range Includes the
negative rail
• Single-supply voltage operation_

Device

Package

KS272CN

8 DIP

KS272ACN

o~

KS272CS

BLOCK DIAGRAM

KS2721N

8 DIP

KS272AIN

-25 - +85°C

KS2721S

9 SIP

KS272AIS

c
c

>

(one section only)

I' +
i=
:::l
0

o

~

(!)

~

+

I

lbN
~ Z >cn~

N

Z

~

~

:::l

0

$70°C

9 SIP

KS272ACS

SCHEMATIC DIAGRAM

Operating Temperature

0

c

>

VDDU-~~------~----------------~------------------__------

M9

IN(-)

0--1

',~IN(+)
OUTPUT

M10
M15

M7

02

VsslGNO

Rz

c8SAMSUNG
Electronics

Cc

492

KS272C/AC, KS2721/AI

CMOS INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS

(Ta=25°C)

Characteristic

Symbol

Value

Unit

Supply Voltage
Differential Input Voltage
Input Voltage
Duration of Short Circuit (Note 1)
Power Dissipation
Operating Temperature Range KS272C/AC
KS272I/AI
Storage Temperature

Voo
VIO
VI

18
18
-0.3~+18

V
V
V

Po

unlimited
500

mW

o ~+70

Topr

°C

-25 ~ +85
-65-+150

TSl9

(Note 1) The output may be shorted to ground or either supply, for
that the dissipation rating is not exceeded.

Voo~ 14V.

°C

Care must be taken to Insure

ELECTRICAL CHARACTERISTICS
(Voo = 10V, Ta = 25°C, unless otherwise specified)
KS272C/KS2721
Characteristic

Symbol

Test Conditions
Min

Typ

Vo=l.4V

Input Offset Voltage

VIO

Input Offset Current

ho

Input Bias Current

liB

I NOTE2

Rs= 500

Common-Mode
Input Voltage Range

VICR

Output Voltage Swing

VOUT

Large Signal Voltage Gain

Av

I NOTE2

Vo =5V

Vo =5V

Min

12

12
1
100
1

1
150

8

JNOTE2
Vo =l t06V

150
-0.2
to 9

8.6

8

92

8.6

80

mV

pA

pA

V

92

dB

77.5

77.5

Unit

V

7.8

7.8
80

I NOTE2

Max

5

100

JNOTE2

VIO= 100mV

Typ

10

-0.2
to 9

Rs = 500

KS272AC/KS272AI

1

Vlc =5V

Vlc =5V

Max

Common-Mode
Rejection Ratio

CMRR

Vo.= l.4V
VIC = VICR min

70

88

70

88

dB

Power Supply Rejection
Ratio

PSRR

Voo =5tol0V
Vo=l.4V

65

82

65

82

dB

Isource

Vo=OV
VIO= 100mV

sink

Output Current
'
Supply Current
(each amplifier)

100

Unity Gain Bandwidth

BW

Slew Rate

SR

Channel Seperation

CS

-55

-55

Vo = Voo
VIO = -100mV

15

15

No load, VIC = 5V

1

Vo=5V

mA

I NOTE2

Av = 40dB, CL= 10pF

2

1

2.2

2
2.2

rnA

4.5

4.5

MHz

Unity Gain
RL~2KO, CL= 100pF

2.3

2.3

V/p-s

Av = 100

120

120

dB

Rs =500

NOTE 1. KS272C/At:: O~Ta~ + 70°C
2. KS27211AI: - 25~Ta~ + 85°C

c8SAMSUNG
EleCtronics

493

I

KS272C/AC, KS2721/AI

CMOS INTEGRATED CIRCUIT

TYPICAL APPLICATION INFORMATION
Latch Up Avoidance
Junction-isolated CMOS circuits employ configurations which produce a parasitic 4-layer (p-Il-p-n) structure that
can function as an SCR, and under certain conditions may be triggered into a low impedance state, resulting in
excessive supply current. To avoid such conditions, no voltage greater than O.3V beyond the supply rails may be
applied any pin. In general, the OP amp supplies should be established simultaneously with, or before any input
signals are applied.

Output Stage Considerations
The amplifier's output stage consists of a source-follower connected pull up transistor and an open-drain pulldown transistor. The high-level output voltage (VOH) is virtually independent of the 100 selection, and increases with
higher values of Voo and reduced output loading. The low-level output voltage (VOL) decreases with reduced output current and higher input common-mode voltage. With no load, VOL is essentially equal to the GND pin potential.

Circuit Layout Precaustions
The user is caustioned that, due to extremely high input impedance, care must be exercised in layout, construction board cleanliness, and supply filtering to avoid hum and noise pick up.

TYPICAL APPLICATIONS
+5

VIN

+5

O---+----f
VOUT
~-~---TOCMOSOR

LPTTL LOGIC

1M

Fig_ 1

Fig. 2
Pulse Generator

AC Coupled Non-Inverting Amplifier

R1

R1

R2

~-+--oVOUT

f\f\
R2

Av=1 +R1

V

2 vpo p

Av=11

Fig_ 3

c8SAMSUNG
Electronics

Fig. 4

494

CMOS INTEGRATED CIRCUIT

KS272C/AC, KS2721/AI
TYPICAL APPLICATION

Bi-Quad Filter
R

C

100KO

Q=:~
. where
AVCF = Center frequency gai n
AVBN = Bandpass notch gain
1
fO=2 .. RC
R1 =QR

R1
R2=TBP
R3:::TNR2
C1=10C
Example: fo = 1000Hz
BW=100Hz
AVCF= 1
AVBN:::1
R=160KO
R1 = 1.6MO
R2=1.6MO
R3=1.6MO
C=O.01/LF

R2

Fig. 5

c8SAMSUNG
Electronics

495

•

CMOS INTEGRATED CIRCUIT

KS274C/AC, KS2741/AI
QUAD CMOS OPERATIONAL
AMPLIFIER

14 DIP

KS274 is CMOS operational amplifier designed to
operate with single or dual supplies.
This device has extremely high input impedance, low
input bias and offset current.
Application areas include translucer amplifier, ampli·
fier blocks, active filters, signal buffers, and all the con·
ventional OP Amp circuits which can be easily
implemented in single power supply systems.

FEATURES
• Wide operating voltage range; 3V to 16V or
or :!: 1.SV to :!: 8V
• High Input Impedance: 10120
• Very low Input bias current
• Common·mode Input voltage range Includes the
negative rail
• Single·supply voltage operation.

BLOCK DIAGRAM

ORDERING INFORMATION
Device

Package

KS274CN
KS274ACN
KS2741N
KS274AIN

Operating Temperature

14 DIP

0- + 70°C

14 DIP

-25 - +85°C

SCHEMATIC DIAGRAM (One Section Only)
R3

M13

M9

IN(-to-i
M1
"----_-...__-0 Vour

vour

">-----<1.--- TO CMOS OR
LPTIL LOGIC

Fig. 1

Fig. 2
Pulse Generator

AC Coupled Non-Inverting Amplifier
R1

R2

R1

1MO
Co
vour

Q
AV=1+~

0

V

2Vp-p

R1

Av=11

Fig. 3

c8SAMSUNG
Electronics

Fig. 4

498

KS274C/AC, KS2741/AI

CMOS INTEGRATED CIRCUIT

TYPICAL APPLICATION INFORMATION
Bi-Quad Filter

R

a=~
where
AVCF::: Center frequency gain
AV8N::: Bandpass notch gain
1
fO=21'RC
R1 =QR

R1
R2=TBP
R3=TNR2
C1=10C
Example: fo 1000Hz
BW=1ooHz
AVCF=1
AVBN=1
R=160KO
R1 =1.6MO
R2= 1.6MO
R3=1.6MO
C=O.01I'F

=

VREF

Fig. 5

c8SAMSUNG
Electronics

499

I

LM2241A, LM3241A, LM2902

LINEAR INTEGRATED CIRCUIT

QUAD OPERATIONAL AMPLIFIERS
The LM224 series consists of four independent, high gain, internally
frequency compensated operational amplifiers which were designed
specifically to operate from a single power supply over a wide range
of voltage.
Operation from split power supplies is also possible so long as the
difference between the two supplies is 3 volts to 32 volts.
voltage.
Application areas include transducer amplifier, DC gain block~ and all
the conventional OP amp circuits which now can be easily implemented
in single power supply systems.

14 DIP

14 soP

FEATURES
• Internally frequency compensated for unity gain
• Large DC voltage gain: 100dB
• Wide power supply range: LM224/A, LM324/A: 3V - 32V (or ~ 1.SV - 16V)
LM2902: 3V - 26V (or ~ 1.SV - 13V)
• Input common·mode voltage range includes ground
• Large output voltage swing: OV DC to Vcc·1.SV DC
• Power drain suitable for battery operation.

ORDERING INFORMATION

BLOCK DIAGRAM
OUT1

Device

Package

LM324N
LM324AN

14 DIP

LM324D
LM324AD

14 SOP

LM224N
LM224AN

14 DIP

LM224D
LM224AD

14 SOP

Operating Temperature

OUT4

IN4 (-)
IN4 (+)

IN3 (+)

SCHEMATIC DIAGRAM (One Section Only)

O-+70°C

-25 - +85°C

LM2902

14 DIP

LM2902D

14 SOP

-40- +85°C

vcco-----~~--~--------------------------_.------~--~~

R2

~--~---o

OUTPUT

GNDo---~------~~~~----~----------~--~----~~~~~

'c8~SUNG

500

LM2241A, LM324/A, LM2902

LINEAR INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

LM224/LM224A

LM324/LM324A

LM2902

Unit

Power Supply Voltage
Differential Input Voltage
Input Voltage
Output Short Circuit to GND
Vee :s15V Ta=25°C (One Amp)
Power Dissipation
Operating Temperature Range
Storage Temperature Range

Vs
VID
VI

± 18 or 32

± 18 or 32

± 13 or 26

32
-0.3 to + 32

32
-0.3 to +32

26

-0.3 to +26

V
V
V

Continuous

Continuous

Continuous

Po
Topr
T stg

570
-25- +85
-65-=-+150

570
0-+70
-65=+150

mW
°C
°C

570
-40- +85
-65:-+ 150

ELECTRICAL CHARACTERISTICS
(Vee = 5.0V, VEE = GND, Ta = 25°C, unless otherwise specified)
LM224
Characteristic

Symbol

Test Conditions

Input Offset Voltage

Via

VeM=OV to Vee-1.5V
Vo = 1.4V, Rs = 00

Input Offset Current

110

Input Bias Current

liB

Input Common-Mode
Voltage Range

VieR

Supply Current

lee

Large Signal
Voltage Gain

Output Voltage Swing

1.5 7.0

1.5 7.0

mV

2.0

3.0

3.0

50

nA

40 250

nA

0

0

0

Vee
-1.5

V

1.0

3

mA

RL=oo, Vee=5V (all Amps)

0.7

1.2

0.7

1.2

0.7

1.2

mA

Vee = 15V, RL~2KO
Vo= 1V to 11V

50 100

IR L=2KQ 26
Vee = 30V
Vee = 26V for 2902 RL = 10KO 27

28

Vee = 5V, RL> 10KO

5

1

65 100
120

f = 1KHz to 20KHz

25 100

100

27
20

85

40

28
5

65

V/mV

22

26

PSRR

23
20

75

V
24
5

mV

75

dB

65 100

50 100

dB

120

120

dB

40

60

50

V
100

60

40

60

mA

V in + = 1V, Vin - = OV
Vee = 15V, Vo=2V

20

40

20

40

20

40

mA

Vin + =OV, Vin - = 1V
Vee = 15V, Vo = 2V

10

13

10

13

10

13

mA

V in + =OV, Vin - = 1V
Vee = 15V, Va = 200mV

12

45

12

45

Isource
Output Current
ISink

Differential Input
VoltaQe

40 250
Vee
-1.5
3

Power Supply
Rejection Ratio

los

150
Vee
-1.5

1.0

70

Short Circuit to GND

50

3

CMRR

CS

30

1.0

Common-Mode
Rejection Ratio

Channel Separation

Unit

RL=oo, Vee=30V (all Amps)
(Vee = 26V for LM2902)

Av

VOH
VOL

LM2902

1.5 5.0

40
Vee = 30V
(Vee = 26V for LM2902)

LM324

Min Typ Max Min Typ Max Min Typ Max

V ID

c8SAMSUNG
Electronics

Vee

/LA
Vee

Vee

V

501

I

LM224/A, LM324/A, LM2902

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS
(Vee = 5.0V, VEE = GND, unless otherwise specified)
The following specification apply over the range of - 25°CsTas
for the LM324; and the - 40°CsTas + 85°C for the LM2902

Characteristic

Symbol

Input Offset Voltage

Vlo

+ 85°C for the

LM224
Test Conditions

110

Input Offset Current
Drift

/:::,.llol/:::,.T

Input Bias Current

"s

Input Common-Mode
Voltage Range

VieR

Large Signal Voltage
Gain

Output Voltage Swing

LM2902

VeM = OV to Vee-1.5V
Vo= 1.4V, Rs= 00

7.0

9.0

7.0

10.0

7.0
100

10

200

10

Unit

mV

,NloC

7.0
150

+ 70°C

nA
pA/oC

10

300

500

500

nA

Vee
-2.0

Vee
-2.0

Vee
-2.0

V

Vee=30V
(Vee = 26V for LM2902)

0

Av

Vee = 15V, RL~2.0KO
Vo = 1V to 11V

25

VOH

26
RL= 2KO
Vee = 30V
Vee = 26V for 2902 1 RL = 10KO 27

28

VOL

Vee =5V, RL~10KO

5

Isource

V;n+ = 1V, V in - =OV
Vee = 15V, Vo = 2V

10

20

10

20

10

20

rnA

Isink

Vin + = OV, Vin _ = 1V
Vee = 15V, Vo=2V

10

13

5

8

5

8

rnA

Output Current

Differential Input
Voltage

LM324

Min Typ Max Min Typ Max Min Typ Max

Input Offset Voltage
/:::,.Vlol/:::,.T
Drift
Input Offset Current

LM224; and the O°CsTas

15

I

V IO

c8SAMSUNG
Electronics

0

20

Vee

V/mV

15

V

22

26
27

O·

28
5

23
20

Vee

24
5

V
100

Vee

mV

V

502

LM224/A, LM324/A, LM2902

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS
(Vee = 5.0V, VEE = GND, Ta = 25°C, unless otherwise specified)
LM224A
Characteristic

Symbol

LM324A

Test Conditions

Unit
Min Typ Max Min Typ Max

Input Offset Voltage

V IO

Input Offset Current

"0

Input Bias Current
Input Common-Mode
Voltage Range
Supply Current (All Amps)
Large Signal Voltage Gain

Output Voltage Swing

V eM = OV to Vec-1.5V
Vo=1.4V, Rs=O

1.0

"s

VICR
lee
Av

3.0

1.5

2

15

40

80
Vcc
-1.5

0

Vee=30V

3.0

mV

3.0

30

nA

40

100

nA

Vee
-1.5

V

0

RL =

, V ee =30V

1.5

3

1.5

3

mA

RL =

, V ec =5V

0.7

1.2

0.7

1.2

rnA

Vcc = 15V, RL~2Kn
Vo =1Vt011V

VOH

Vce= 30V
Vee = 26V for 2902

VOL

Vcc =5V, RL~10Kn

50

I RL=2Kn
I RL = 10Kn

100

25

26
27

100

VlmV

26
28
5

27
20

V
28
5

V
20

mV

Common-Mode Rejection Ratio

CMRR

70

85

65

85

Power Supply Rejection Ratio

PSRR

65

100

65

100

dB

120

dB

Channel Separation

CS

Short Circuit to GND

los
Isource

Output Current
ISink

Differential Input Voltage

V ID

c8SAMSUNG
Electronics

120

f = 1KHz to 20KHz

40

40

60

dB

60

mA

V in + = 1V, Vin - = OV
Vce= 15V

20

40

20

40

mA

Vin + = OV, Vin - = 1V
Vee = 15V, Vo = 2V

10

20

10

20

mA

V in + =OV, Vin - = 1V
Vee = 15V, Vo = 200mV

12

50

12

50

p.A

Vee

Vee

V

503

I

LINEAR INTEGRATED CIRCUIT

LM224/A, LM324/A, LM2902
ELECTRICAL CHARACTERISTICS

=

=

(Vee 5.0V, VEE GND, unless otherwise specified)
The following specification apply over the range of - 25°C~Ta~
for the LM324A

+ 85°C for the LM224A; and the O°C~Ta~ + 70°C

LM224A
Characteristic

Symbol

Test Conditions

VIO

VeM = OV to Vee-1.5V
Vo=1.4V Rs=On

Input Offset Voltage
Input Offset Voltage Drift

Typ

LM324A

Max

Min

Typ

4.0
7.0

bVlolbT

Input Offset Current
Input Offset Current Drift

Min

ho

7.0

20
30

bldbT

Unit

Max

5.0

mV

30

j.l.V/oC

75

nA

10

200

10

300

pA/oC

40

100

40

200

nA

Vee
-2.0

V

-~---

Input Bias Current
Input Common-Mode
Voltage Range

hs

Vee
-2.0

VieR

Vee = 30V

0

Av

Vee=15V RL~2.OKn

25

15

VOH
VOL

Vee = 30VrR L - 2Kn
IRL= 10Kn
Vee = 5V RL~ 10Kn

26
27

26
27

Large Signal Voltage Gain
Output Voltage Swing

28
5

0

20

V/mV
28
5

V
20

mV

I source

Vin + = 1V Vin - = OV
Vee=1?V

10

20

10

20

mA

Isink

Vin + = OV Vin - = 1V
Vee = 15V

5

8

5

8

mA

Output Current

Differential Input Voltage

c8SAMSUNG
Electronics

V ID

Vee

Vee

V

504

LM224/A, LM324/A, LM2902

LINEAR INTEGRATED CIRCUIT

APPLICATION NOTE
The LM224 series are op amps which operate with only a single power supply voltage, have true-differential inputs, and
remain in the linear mode with an input common-mode voltage of 0 Vrx;. These amplifiers operate over a wide range of power
supply voltage with little change in performance characteristics. At 2SoC amplifier operation is possible down to a minimum
supply voltage of 2.3 Vrx;.
The pinouts of the package have been designed to simplify PC board layouts. Inverting inputs are adjacent to outputs for
all of the amplifiers and the outputs have also been placed at the corners of the package (pins 1, 7, 8, and 14).
Precautions should be taken to insure that the power supply for the integrated circuit never becomes reversed in polarity
or that the unit is not inadvertently installed backwards in a test socket as an unlimited current surge through the resulting
forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit.
Large differential input voltages can be easily accommodated and, as input differential voltage protection diodes are not
needed, no large input currents result from large differential input voltages. The differential input voltage may be larger the
Vee without damaging the device. Protection should be provided to prevent the input voltages from going negative more than
-0.3Vrx; (at 2S0C). An input clamp diode with a resistor to the IC input terminal can be used.
To reduce the power supply current drain, the amplifiers have a class A output stage for small signal levels which converts
to class B in a large signal mode. This allows the amplifiers to both source and sink large output currents. Therefore both
NPN and PNP external current boost transistors can be used to extend the power capability of the basic amplifiers. The output
voltage needs to raise approximately 1 diode drop above ground to bias the on-chip vertical PNP transistor for output current sinking applications.
For ac applications, where the load is capacitively coupled to the output of the amplifier, a resistor should be used, from
the output of the amplifier to ground to increase the class A bias current and prevent crossover distortion. Where the load
is directly coupled, as in dc applications, there is no crossover distortion.
Capacitive loads which are applied directly to the output otthe amplifier reduce the loop stability margin. Values of SO pF
can be accommodated using the worst-case noninverting unity gain connection. Large closed loop gains or resi~ive isolation should be used if larger load capacitance must be driven by the amplifier.
The bias network of the LM224 establishes a drain current which is independent of the magnitude of the power supply
voltage over the range of from 3 Vrx; to 30 Voc.
Output short circuits either to ground or to the positive power supply should be of short time duration. Units can be destroyed,
not as a result of the short circuit current causing metal fusing, but rather due-to the large increase in IC chip dissipation
which will cause eventual failure due to excessive junction temperatures. Putting direct short-circuits on more than one amplifier
at a time will increase the totallC power dissipation to destructive levels, if not properly protected with external dissipation
limiting resistors in series with the output source current which is available at 2SoC provides a larger output current capabilityat elevated temperatures (see typical performance characteristics) than a standard IC op amp.
The circuits presented in the section on typical applications emphasize operation on only a single power supply voltage.
If complementary power supplies are available, all of the standard op amp circuits can be used. in' general, introducing a
pseudo-ground (a bias voltage reference of VccI2) will allow operation above and below this value in single power supply systems. Many application circuits are shown which take advantage of the wide input common-mode voltage range which includes
ground. In most cases, input biasing is not required and input voltages which range to ground can easily be accommodated.

c8SAMSUNG
Electronics

505

I

LINEAR INTEGRATED CIRCUIT

LM224/A, LM324/A, LM2902

Fig. 2 INPUT CURRENT

Fig. 1 INPUT VOLTAGE RANGE
90

15·~--------~--------~--------~

I
VCM=OV

80
70

i...
ffi

.........

60

-- ----

::)

...

40

::)

Go

~

'IN': +30'1

- .. -

~I"-

--- --~~~

50

II:
II:

u

r---.. ... _

30

--

----.l. _
V"e~+5V

"-

~--

-

20
10

o
15

10
POWER SUPPLY VOLTAGE

25

-25

-50

50

75

100

TEMPERATURE (OC)

(~Voc)

Fig. 4 VOLTAGE GAIN

Fig. 3 SUPPLY CURRENT
160

RL =20KO

a-

...s.

~

.,V

120

/'

iii

l!!.

z

zw

C

II:

CI

~

w

u

CI

I

~

~

~

80

g

Go
Go

:>

UI

40

o

o

7.5

120

120

iii
z

,

~0

~

~
0

80

~

60

i-'"

I

IVcc= + 7.5V
VEE':' -7.5V

w

t':.cc=30V

w

Q

60

0

VCC=15~

>

:I

Z

0

~

0

u

20

10'

10"

1()'l

10'

FREQUENCY (tlz)

c8SANlSUNG
Electronics

40

:I
:I

40

10"

I--~

l!!.

"-

80

CI
w

CI

100

iii

"-

l!!.

C

30

22.5

Fig. 6 COMMON·MODE REJECTION RATIO

Fig. 5 OPEN LOOP FREQUENCY RESPONSE
140

100

15

SUPPLY VOLTAGE (VI

SUPPLY VOLTAGE (VI

"

10'

20

II

o
10"

10'

10"

10"

10'

10"

FREQUENCY (Hz)

506

LM224/A, LM324/A, LM2902

LINEAR INTEGRATED CIRCUIT
Fig. 8 VOLTAGE FOLLOWER PULSE
RESPONSE (SMALL SIGNAL)

.

500

Rl=2.0K
Vcc=15V

Ta=25"C
Vee= +3OV

450

:;So

w

~~

~

400
INPUT

~

I'-'

OUTPUT

~

~350

\,

/
/

;:)

o

~

- ~I
10

V
275

so

40

30

20

lr\.

300

\. -

I

o

/I

15

.

~

Z

...

~
tl

Fig. 10 OUTPUT CHARACTERISTICS
CURRENT SOURCING

T~~ ~I~~l~ ....

I
€

~

()

!

10

\

~

;:)

o

6

J

I

I

Cl

~

•

TIMEI/Ls)

TIMEI/Ls)

Fig. 9 LARGE SIGNAL FREQUENCY RESPONSE

I--

t--

I--

t--

f-

,I--

t--

t--

a:

I-

...

;:)

il

~

~~{ I
I
I

I;:)

o
i

I

~ l

10'

10'

10'

10- 3

~
10"

10-'

10'

10'

OUTPUT SOURCE CURRENT (rnA)

FREQUENCY (Hz)

Fig. 12 CURRENT LIMITING

Fig. 11 OUTPUT CHARACTERISTICS
CURRENT SINKING

,

10

80
Ta= +25"C

70
I

C

€

w

So

10"

'!Z

Cl

~

~

§

llL

!;

()

Vee = + 15V

I-

~~~I~~v

I-

c-

10- 3

-

;:)

30

~

-- ---r--

I

r--

r--

-

20

-

"

10-'

40

~

010-'

I-

50

~

c--Vcc- +5V\=

o

>

60

10

o
10'

10'

OUTPUT SINK CURRENT (mA)

c8SAMSUNG
Electronics

10'

-SO

-25

25

50

75

100

TEMPERATURE (OC)

507

LINEAR INTEGRATED CIRCUIT

LM224/A, LM3241A, LM2902
TYPICAL APPLICATIONS

(V ee=5.0V)

Fig. 13 Voltage Reference

Fig. 14 Non.lnvertlng DC Gain

Vee
+5V

-_ -

__ _

+Vo
Vo

VOUT

GAIN=1

R1 1.0MIl
10K

Fig. 16 Pulse Generator

Fig. 15 AC Coupled Non.lnvertlng Amplifier

R1

R2

R1

~2

> - + - 0 VOUT

0

100KIl
R2

Av= 1 +Fi1

0

V

Av=11

Fig. 17 Bi·Quad Filter

R

C

100KIl

100KIl

_BW
- fo
where
Tsp = Center frequency gain
TN = Bandpass notch gain
Q

1

R1
R2 = Tsp
R1 =QR
R3=TNR2
C1=10C
Example: fo = 1000Hz
BW=100Hz
Tsp=1
TN =1
R = 160KIl
R1 = 1.6MIl
R2= 1.6MIl
R3= 1.6MIl
C;:::O.01I'-F

fa = 211'RC

R2

c8SAMSUNG
Electronics

508

LM248/LM348

LINEAR INTEGRATED CIRCUIT

QUAD OPERATIONAL AMPLIFIERS
The LM248/LM348 is a true quad LM741. It consists· of four
independent, high-gain, internally compensated, low-power operational
amplifiers which have been designed to provide functional
characteristics identical to those of the familiar LM741 operational
amplifier. In addition the total supply current for all four amplifiers is
comparable to the supply current of a single LM741 type OP Amp.
Other features include input offset currents and input bias current which
are much less than those of a standard LM741. Also, excellent isolation
between amplifiers has been achieved by independently biasing each
amplifier and using layout techniques which minimize thermal coupling.

14 DIP

14 soP

FEATURES
•
•
•
•
•
•
•
•
•
•

LM741 OP Amp operating characteristics
Low supply current drain
Class AB output stage·no crossover distortion
Pin compatible with the LM324 & MC3403
Low input offset voltage·1mV Typ.
Low input offset current·4nA Typ.
Low input bias current·30nA Typ.
Gain bandwidth product for LM348 (unity gain)-1.0MHz Typ.
High degree of isolation between amplifiers·120dB
Overload protection for inputs and outputs

BLOCK DIAGRAM

I
ORDERING INFORMATION
Device

SCHEMATIC DIAGRAM

Package

LM348N

14 DIP

LM348D

14 SOP

LM248N

14 DIP

LM248D

14 SOP

Operating Temperature
0- + 70 0 e
-25-+85°e

(One Section Only)

.-------------~------~--------------------~--~vcc

IN (- ) 0-------+-----,
R7
IN (+)

~-----<..---~

OUTPUT

RS

c8SAMSUNG
Electronics

509

LINEAR INTEGRATED CIRCUIT

LM248/LM348

ABSOLUTE MAXIMUM RATINGS (Ta=25°C)
Characteristic

Symbol

Value

Unit

Supply Voltage
Differential Input Voltage
Input Voltage
Output Short Circuit Duration
Operating Temperature LM248
LM348
Storage Temperature

Vs
VIO
VI

±18
±36
±18
Continuous
-25-+85
0-+70
-65-+150

V
V
V

Topr
T5tg

°C
°C
°C

ELECTRICAL CHARACTERISTICS
(Vee = 15V, VEE = -15V, Ta::= 25°e, unless otherwise specified)

Symbol

Characteristic

Input Offset Voltage

Vlo

Input Offset Current

c..

Test Conditions

Rs~10KO

he

LM348

Typ Max Min Typ Max
1

NOTE 1

1

6.0
7.5

4

110

Input Bias Current

LM248
Min

NOTE 1

7.5
4

50

30

30

200
0.8

2.5

mV

nA

nA
MO

Input Resistance

Ri

Supply Current (all Amplifiers)

Is

Large Signal Voltage Gain

Av

RL~2KO

Channe-i Separation

CS

f

Common Mode Input
Voltage Range

VieR

Small Signal Bandwidth

BW

Av

=1

1.0

1.0

MHz

Phase Margin

¢>m

Av= 1

60

60

Degrees

Slew Rate

SR

Av = 1

0.5

0.5

V/p.s

Output Short Circuit Current

los

25

rnA

Output Voltage Swing

Your

2.5

200
400

500
0.8

50
100

125

NOTE 1

6.0

Unit

2.4
25
NOTE 1

=1KHz to 20KHz
NOTE 1

160

15

2.4

4.5
25

120
±12

120
±12

25
RL~10KO
RL~2KO

NOTE 1

160

15

4.5

mA
V/mV
dB
V

±12 ±13

±12 ±13

±10 ±12

±10 ±12

V

Common Mode Rejection Ratio CMRR

Rs~10K

NOTE 1

70

90

70

90

dB

Supply Voltage Rejection Ratio

Rs~10K

NOTE 1

77

96

77

96

dB

PSRR

* NOTE 1

LM348: O~Ta~ + 70 e
LM248: - 25~Ta~ + 85°C
0

c8SAMSUNG
Electronics

510

LM248/LM348

LINEAR INTEGRATED CIRCUIT

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 2 VOLTAGE SWING

Fig. 1 SUPPLY CURRENT
50

~

40

"iz

C

§.
~
z
LU
a:
a:

V

til
~

:::I

30

II.
~

:::I

:::I

0

:!:i
II.

II.

(,,)

V

~

c(

LU

II.

20

~

:::I

til

~

c(

LU

II.

10

15

/

o

o~--~----~----~--~~--~--~

o

10

20

/

o

10

Fig. 3 SOURCE CURRENT LIMIT
15

'\\

LU

Vs= t15V
T.=25°C

...........

~

-10

I'......

1\

"~
~
~

~

:::I

II.
~

:::I

o

\
\

~

-5

fi

:ilz
o
25

30

o

10

OUTPUT SOURCE CURRENT (mA)

15

20

120

I

=Vs-t15V
=T. 25°C

Vs= t15V
T.=25°C
100

80

iii
:!:!.

a:
a:

:&

60

(,,)

/

/

40
Av -l

20

100

lk

10k
FREQUENCY (Hz)

c8SAMSUNG
Electronics

lOOk

30

Fig. 6 COMMON·MODE REJECTION RATIO

lk~~~11

V

25

OUTPUT SINK CURRENT (mA)

Fig. 5 OUTPUT IMPEDANCE

/

I

25

I
~

~

"z~

I

20

20

-15

I

15

15

Fig. 4 SINK CURRENT LIMIT

Vs= t15
T,-25°C

10

!

--

SUPPLY VOLTAGE ( t V)

SUPPLY VOLTAGE (t V)

o
o

V

/

1M

""
"'"
100

lk

10k

'"

lOOk

FREQUENcy (Hz)

511

LM248/LM348

LINEAR INTEGRATED CIRCUIT

Fig. 7 OPEN LOOP FREQUENCY RESPONSE
20

110

~

90

vsJ ±15lT.=25°C

r'\

70

,

15

Fig. 8 BODE PLOT

~

iD

JH18l

~

~

70

"-

CJ

"-~

-15
-20

r'\.

-25

~

10k

100k

=m
1k

1\

I

V,.

\

v,

100

-100

160

120

80

200
·TIME(~)

32

Fig. 12 INVERTING LARGE SIGNAL
PULSE RESPONSE

I III
Vs= ± 15V

Rl=1~

/

r-o.

20

g

...

~

!;
o
Q

€

16

\

12

~

~

~

~

-10

I

Jo

10V

T.=25°C
Av=1
<1%DI8T

....... ~

w

~

\

I

Fig. 11 UNDISTORTED OUTPUT VOLTAGE SWING

!j

-10
10

1\
I

TIME(~s)

24

"

10

T.=25°C

I

\
\V

40

~
~

20

i\ ,

A~=1
.t
Vs= ±15V-

J

/'f'

\~

-10

28

\

o

100

V

~

\

Fig. 10 SMALL SIGNAL PULSE RESPONSE

I

10

,

'GAIN

FREQUENCY (MHz)

Vo

/

\

-35
0.1

1M

Fig. 9 LARGE SIGNAL PULSE RESPONSE

Av=1
Vs= ±15V
Rl ",2k
T.=25°C

\'

2k

FREQUENCY (Hz)

/

""

-30 r--

-10
1k

~

-5

z
C -10

10

/

80

~

30

10

90

T.=25°C

"-

. . r':~

10

CJ

100

100

V~= L~)

I

"-

:!!.
z 50
C

10

,

/

/

I

1

Vs= ±15V-

Rl=2k

\

~:=2~!C-

\

I

i\

\

g

~
10

8

Q

z

:::I

v,J

-10

o

100

1k

10k
FREQUENCY (Hz)

c8SAMSUNG
Electronics

100k

20

40

60

80

100

120 140

160

180

200

TIME~)

512

LM248/LM348

LINEAR INTEGRATED CIRCUIT

Fig. 13 INPUT NOISE VOLTAGE AND
NOISE CURRENT
160

V~= U5~

140

If

120

~ loo

w

~
g

T.=25°C

80

\

o
z

60

1.0

i
...,.
~

lZ
W

Ix:

0.8 Ix:
~
(J

M~A~ NOISE VOLTAGE

w

0.6

z

~

i

::::;
1.2

'~~

MEAN NOISE CURRENT
40

0.4

20

0.2

I/)

i5
z
z
cw
~

w

CI

~
~

15

I~

II.

3:
w
Q

0

~

Z

0

~
~

10

0

(J

w
>
~

iii
0

II.

10

o

100

I
I
J
- 25°C:s;Ta:s; + 85°C

€

l-

1.4

I

,

w

!!!

Fig. 14 POSITIVE COMMON·MODE INPUT
VOLTAGE LIMIT
20

1.6

lk

10k

FREQUENCY (Hz)

5

/

5

L
1/
10

L

/

15

/

I

20

POSITIVE SUPPLY VOLTAGE (V)

Fig. 15 NEGATIVE COMMON·MODE INPUT
VOLTAGE LIMIT
-~r----.-----.-----r----'-----T---~

-5~~~

-5

____

~

____

-10

~

____

~

____

~

__

~

-15

NEGATIVE SUPPLY VOLTS (V)

c8SAMSUNG
Electronics

513

LINEAR INTEGRATED CIRCUIT

LM248/LM348
TYPICAL APPLICATIONS
Function Generator

Fig. 16

TRIANGLE WAVE
OUTPUT

R2

VREF
~--+--O

SQUARE WAVE OUTPUT
R1 +R3
f= 4CRfR1

L---+---n

·f R3= R2R1
I
R2+R1
VREF

Fig. 16

Fig. 17

Bi·Quad Filter
R
R

C

C1
VIN

100KO

R2

o---U-+--J~~>--I

100KO

VREF

R3

R2
C1

~-+---l

1---0 NOTCH OUTPUT

Q=BW
fo
where
TBP = Center frequency gain
TN = Bandpass notch gain
1 .
fo= 2".RC
R1 =QR

R1
R2 TBP
R3=TNR2
C1 =10C

=

Example: fo = 1000Hz
BW=100Hz
TBP=1
TN=1
R = 160KO
R1=1.6MO
R2= 1.6MO
R3= ·i.SMO
C=O.01/LF

Fig. 17

c8SAMSUNG
Electronics

514

LM258JA, LM358/A, LM2004

LINEAR INTEGRATED CIRCUIT

DUAL OPERATIONAL AMPLIFIERS

8 DIP

The LM258 series consists of four independent, high gain, internally
frequency compensated operational amplifiers which were designed
specifically to operate from a single power supply over a wide range
of voltage.
Operation from split power supplies is also possible and the low power
supply current drain is independent of the magnitude of the power supply
voltage.
Application areas include transducer amplifier, DC gain blocks and all
the conventional OP amp circuits which now can be easily implemented
in single power supply systems.

8 SOP

FEATURES
• Internally frequency compensated for unity gain
• Large DC voltage gain: 109dB
• Wide power supply range: LM258/A, LM358/A: 3V - 32V
(or ± 1.5V - ± 16V)
LM2904: 3V - 26V (or ± 1.5V - ± 13V)
• Input common·mode voltage range includes ground
• Large output voltage swing: OV DC to Vee -1.5V DC
• Power drain suitable for battery operation.

9 SIP

I

BLOCK DIAGRAM

•

ORDERING INFORMATION
Device

SCHEMATIC DIAGRAM

(One section only)

. Package

LM358N
LM358AN

8 DIP

LM358S
LM358AS

9 SIP

LM358D
LM358AD

8 SOP

LM258N
LM258AN

8 DIP

LM258S
LM258AS

9 SIP

LM258D
LM258AD

8 SOP

LM2904N

8 DIP

LM2904S

9 SIP

LM2904D

8 DIP

Operation Temperature

0- + 70°C

-25 - +85°e

-40 -+85°e

I

* * Under development

c8SAMSUNG
Electronics

515

LM2581A, LM358IA, LM2904

LINEAR INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

LM258/LM258A

LM358/LM358A

LM2904

Unit

Power Supply Voltage
Differential Input Voltage
Input Voltage
Output Short Circuit to GND
VceS15V Ta=25°C (One Amp)
Operating Temperature Range
Storage Temperature Range

Vs
,VID
VI

± 16 or 32
±32
-0.3 to +32

± 16 or 32
±32
-0.3 to +32

± 13 or 26
±26
-0.3 to + 26

V
V
V

Continuous

Continuous

Continuou.s

0-+70
-65 - +150

-40-+85
-65-+150

Topr
Tstg

-25-+85
-65-+150

°C
°C

ELECTRICAL CHARACTERISTICS
(Vee = 5.0V, VEE = GND, Ta= 25°C, unless otherwise specified)

LM258
Characteristic

Symbol

Test Conditions

LM2904

LM358

Unit

Min Typ Max Min Typ M,!x Min Typ Max

VeM = OV to Vee -1.5V
Vo = 1.4V, Rs=OO

2.9 7.0

VIO

Input Offset Current

Ito

3

50

nA

Input Bias Current

liB

45 150

45 250

45 250

nA

Vee
-1.5

Vee
-1.5

Vee
-1.5

Input Common-Mode
Voltage Range

VieR

Supply Current

lee

Vee = 30V
(LM2904, Vee = 26V)

2.9 5.0

0

RL =00, Vee = 30V
(LM2902, Vee = 26V)
RL = 00 ,Jver full temperature range

Large Signal
Voltage Gain

Output Voltage Swing

Av

VOH
VOL

Vee = 15V, RL~2KO
Vo= 1V to 11V

0.5

0.5 1.2

rnA

IRL=2KO 26
Vee =30V
Vee=26V for 2904IRL=10KO 27

28

Vee=5V RL~10KO

5

PSRR

65 100

Isource
Output Current
ISink

Differential Input
Voltage

V

0.5

1.2

50 100

f = 1KHz to 20KHz

0

rnA

Power Supply
Rejection Ratio

los

5

0.8 2.0

70

CS

0

50

0.8 2.0

CMRR

Short Circuit to GND

5

0.8 2.0

Common-Mode
Rejection Ratio

Channel Separation

30

2.9 7.0

mV

Input Offset Voltage

25 100

25 100

26

22

27
20

85

28
5

65

23
20

80

40

24

V
100

dB
dB

120
60

40

mV
dB

80

50 100

120
60

V/mV
V

5
50

65 100

120
40

1.2

60

rnA

V in + = 1V, Vin - = OV
Vee = 15V, Vo = 2V

10

30

10

30

10

30

rnA

V in + =OV, Vin - = 1V
Vee = 15V, Vo = 2V

10

15

10

15

10

15

rnA

V in + = OV, Vin - = 1V
Vee = 15V, Vo=200mV

12 100

V ID

c8SAN1SUNG
Electronics

12 100
Vee

/LA
Vee

Vee

V

516

LM2~A, LM3~A, LM~

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS
(Vee = 5.0V, VEE=GND, unless otherwise specified)
The following specification apply over the range of - 25°C~Ta~ + 85°C for the LM258; and the O°C~Ta~ + 70°C
for the LM358; and the -40°C~Ta~ +85°C for the LM2904

Characteristic

Symbol

Input Offset Voltage

Via

Test Conditions

LM258

VeM = OV to Vee-1.5V
Vo= 1.4V, Rs=On

7.0

Input Offset Voltage
6VlQi6T Rs=On
Drift
Input Offset Current
Input Offset Current
Drift
Input Bias Current
Input Common-Mode
Voltage Range
Large Signal Voltage
Gain

Output Voltage Swing

VieR

Vee=30V
(LM2904, Vee = 26V)

0

Av

Vee = 15V, RL~2.0Kn
Vo= 1V to 11V

25

VOH

26
IRL=2Kn
Vee=30V
Vee = 26V for 2904 1 RL = 10Kn 27
RL~10Kn

300
Vee
-2.0

10

40 500

40 500

Vee
-2.0

0

5

20

26
27

28
5

20

nA
V
V/mV

15

26
27

Vee
-2.0

0

nA
pA/oC

10

15

28

45 200

V
V

28
5

100

mV

Isource

V in + = 1V, Vin - = OV
Vee = 15V, Vo= 2V

10

30

10

30

10

30

rnA

ISink

Vin + =OV, Vin - = 1V
Vee = 15V, Vo=2V

5

8

5

9

5

9

rnA

Output Current

Differential Input
Voltage

40

"B

mV

INloC

7.0
150

I

10

61d6T

10.0

7.0
100

Vee =5V,

Unit

9.0

7.0

"0

. VOL

LM2904

LM358

Min Typ Max Min Typ Max Min Typ Max

VIO

c8SAMSUNG
Electronics

Vee

Vee

Vee

V

517

I

LINEAR INTEGRATED CIRCUIT

LM2581A, LM358/A, LM2904
ELECTRICAL CHARACTERISTICS

(Vee =5.0V, VEE=GND, Ta=25°C, unless otherwise specified)

Characteristic

LM258A
Symbol

Test Conditions

LM358A

Min Typ Max Min Typ Max

VeM = OV to Vee-1.5V
Vo= 1.4V, Rs=O

3.0

Input Offset Voltage

Via

Input Offset Current

Ito

2

15

liB

40

80

Input Bias Current
I nput Common-Mode
Voltage Range

VieR

Supply Current

Ice

Large Signal Voltage Gain

Av

Output Voltage Swing

Vee =30V

1.0

Vee
-1.5

0

Unit

3.0

mV

5

30

nA

45

100

nA

2.0

Vee

0

~1.5

V

RL=oo, .Vee = 30V

0.8

2.0

0.8

2.0

rnA

RL=oo,over full temperature range

0.5

1.2

0.5

1.2

rnA

Vee = 15V, RL~2KO
Vo= 1V to 11V

VOH

! RL=2KO
Vee = 30V
Vcc =26V for2904!R L =10KO

VOL

Vee =5V, RL~10KO

50

100

25

26
27

VIm V

100

26
27

28
5

20

V

28
5

V
20

mV

Common-Mode Rejection Ratio

CMRR

70

85

65

85

dB

Power Supply Rejection Ratio

PSRR

65

100

65

100

dB

120

dB

Channel Separation

CS

Short Circuit to GND

los
Isource

Output Current
Isink

Differential Input Voltage

V iD

c8SAMSUNG
Electronics

120

f = 1KHz to 20KHz

40

60

40

60

rnA

Vin + = 1V, Vin - = OV
Vee = 15V, Vo=2V

20

30

20

30

rnA

Vin + = OV, Vin - = 1V
Vee = 15V, Vo=2V

10

15

10

15

rnA

Vin + = OV, Vin _ = 1V
Va = 200mV

12

100

12

100

p,A

Vee

Vee

V

518

LM2581A, LM358IA, LM2904

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS (Vee = 5.0V, VEE = GND, unless otherwise specified)
The following specification apply over the range of - 25°C~Ta~ 85°C for the LM258A; and the O°C~Ta~
for the LM358A

+

Characteristic

Symbol

LM258A

Test Conditions

+ 70°C

LM358A
Unit

Min Typ Max Min Typ Max

Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Offset Current Drift
Input Bias Current
Input Common-Mode
Voltage Range

Output Voltage Swing

Large Signal Voltage Gain

V,o

4.0

5.0

mV

7.0

20

p.V/oC

7.0

15

75

nA

61,0/6T

10

200

10

300

pA/oC

hB

40

100

40

200

nA

Vee
-2.0

V

6V,0/6T

30

1'0

Vee
-2.0

0

0

VIeR

Vee = 30V

VOH

Vee = 30V
Vee =30V

VOL

Vee =5V,

Av

Vee = 15V, RL~2.0KO
Vo= 1V to 11V

25

Isource

V in + = 1V, Vin - = OV
Vee = 15V, Vo = 2V

10

30

10

30

rnA

Isink

V'n+ = OV, Vin - = 1V
Vee = 15V, Vo=2V

5

9

5

9

rnA

Output Current

Differential Input Voltage

VeM =OV to Vee-1.5V
Vo= 1.4V, Rs=OO

V'D

c8SAMSUNG
Electronics

IRL=2KO
IRL= 10KO

26
27

RL~10KO

26
28
5

27
20

V
28
5

V
20

15

Vee

mV
V/mV

Vee

V

519

I

LINEAR INTEGRATED CIRCUIT

LM258/A, LM358/A, LM2904

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 1 SUPPLY CURRENT

Fig. 2 VOLTAGE GAIN
160

RL=20KIl
120

~

~

,

......

RL=2KIl""
80

1 -- ----

Ta=O'C to +S5'C_

~

0

Ta= -40'C

o

I
10

o

0
30

20

40

30

20

10

40

SUPPLY VOLTAGE (V)

SUPPLY VOLTAGE (V)

Fig. 3 OPEN LOOP FREQUENCY RESPONSE

Fig. 4 LARGE SIGNAL FREQUENCY
20

140

Ve<;= +'15\1
I

120

f-

!

I

15

II,

100

1\

f

SO

1\

Ve<;=3OV $.
-25' ST.S

60

i - - I-f.,
10

S 'C

:1

:

\,

~I\,....

2OHH+ltHtttHlHttttllH-++HtlH-+NJlN-tttHlH+++H!I

10'

1()2

10'

10'

10'

10"

10'

+-

o
10'

10'

FREQUENCY (Hz)

FREQUENCY (Hz)

Fig. 6 OUTPUT CHARACTERISTICS
CURRENT SINKING

Fig. 5 OUTPUT CHARACTERISTICS
CURRENT SOURCING
,..-

+al~ IllJ~,c

I

10'

10
Ta

+25'C
i-

i-

l-

f-

i-

'I

i-

l-

t-

f-

t;~

t=

1=
1=

l-

i-

l-

Ve<;= + 15V::

tc~~ 1~1~v
1=

l-

f-f--

V

l=

f=-

I-

I--

f---

'I-I--

I--

1-1-

1

10- 2

10-'

I-

10"

V
10'

10- 3

~

2U

OUTPUT SOURCE CURRENT (mA)

c8SAMSUNG
Electronics

1=

lI-I--

j,J
2

10- 2

10-'

10"

10'

OUTPUT SINK CURRENT (mA)

520

LM258/A, .LM358/A, LM2904

LINEAR INTEGRATED CIRCUIT

Fig. 7 INPUT VOLTAGE RANGE

Fig. 8 COMMON·MODE REJECTION RATIO
120

Vs~ :N.dJ

II

iii 100
E-

1--1-

1--1-

O

!

~
ao
II:

S

~

~

W

C!I

~

Ul

II:

w

60

0

0
::I!

~

::.
IL

Z

~

0
::I!
::I!
0

40

-I-

f--~I-

C)

20

I
10"

10'

10

I

10'

10'
FREQUENCY (Hz)

POWER SUPPLY VOLTAGE (±V)

Fig. 9 CURRENT LIMITING

Fig. 10 INPUT CURRENT

sci

OOr----.----~----r_--_,----~--_,

aor----+----+---~----_r----r_--_;

ill

0&

70 ...... ~,

60

_~



~

r--~

r--- ----

~

r...--'

1

10

t\
\

ki
20

30

TlME!i-........~ J---o NOTCH

OUTPUT

c8SAMSUNG
Electronics

R1
R2 = Tep
R3=TNR2
C1=10C
Example: fa = 1000Hz
BW=100Hz
Tep=1
TN=1
R=160KIl
R1 =1.6MIl
R2=1.6MIl
R3=1.6MIl
C=O.01"F

522

LM741C/LM741E1LM741I

LINEAR INTEGRATED CIRCUIT
8 DIP

SINGLE OPERATIONAL AMPLIFIERS
The LM741 series are general purpose operational amplifiers which
feature improved performance over industry standards like the LM709.
It is intended for a wide range of analog applications.
The high gain and wide range of operating voltage provide superior
performance in intergrator, summing amplifier, and general feedback
appl ications.

8 SOP

FEATURES
•
•
•
•
•

Short circuit protection
Excellent temperature stability
Internal frequency compensation
High input voltage range
Null of offset

BLOCK DIAGRAM

ORDERING INFORMATION

OFFSET

NULL

OFFSET

NULL

SCHEMATIC DIAGRAM

Device

Package

LM741ECN
LM741CN

8 DIP

LM741ECD
LM741CD

8 SOP

LM7411N
LM741EIN

8 DIP

LM7411D
LM741EID

8 SOP

Operation Temperature

0-+ 70°C

-25 - + 85°C

.-~------~--~~--~~--~--------------+---OVcc

R6

IN (-) 0---+---+--+--1

____- - - - < . - - - 0

OUT~UT

R7

OFFSET o-----+-_+_~

NULL 0---'------.

qsSAMSUNG
Electronics

523

I

LINEAR INTEGRATED CIRCUIT

LM741 C/LM741 ElLM7411

ABSOLUTE MAXIMUM RATINGS (Ta = 25°C)
Characteristic

Symbol

LM741C

LM741E

LM741 I

Unit

Power Supply Voltage
Differential Input Voltage
Input Voltage
Output Short Circuit Duration
Power Dissipation
Operating Temperature Range
Storage Temperature Range

Vs
VIO
VI

±1S
±30
±15
Indefinite
500
0-+ 70\
-65 -+ 150

±22
±30
±15
Indefinite
500
0-+ 701
-65-+150

±1S
±30
±15
Indefinite
500
-25- +S5
-65-+150

V
V
V

Po
Topr
TSl9

mW
°C
°C

ELECTRICAL CHARACTERISTICS
(Vcc =15V, Vee= -15V, Ta=25°C, unless otherwise specified)
LM741 C/LM741 I

LM741E
Characteristic

Symbol

Test Conditions

Min

Typ

Max Min

O.S

3.0

Rs::s;10KO

Typ

Max

2.0

6.0

Input Offset Voltage

VIO

Input Offset Voltage
Adjustment Range

VIOR

Input Offset Current

110

3.0

30

20

200

"8

30

SO

SO

500

Input Bias Current
Input Resistance
Input Voltage Range

Large Signal Voltage Gain

Output Short Circuit Current

Ri

Rs::s;500

Av

RL~2KO

Vs=±20V,
Vo= ± 15V

c8SAMSUNG
Electronics
.

0.3

2.0

±12 ±13

50

RL~10KO

±16

RL~2KO

±15

mV
nA
nA
MO
V

25

200
25

35

RL~10KO

±12 ±'14

RL~2KO

±10 ±13

Rs ::s;10KO, VCM = ±12V
Rs ::s;50KO, VCM = ± 12V

SO

95

Vs= ±20V to Vs= ±5V
Rs::s;500

86

96

Vs= ± 15V to Vs= ±5V
Rs::s;10KO

mV

V/mV
20

10

VOUT

PSRR

6.0

Vs =±15V,
Vo=±10V

los

Common Mode Rejection Ratio CMRR

±15

±12 ±13

VICR

Vs= ± 15V

Power Supply Rejection Ratio

1.0

Vs= ±20V

Vs= ±20V
Output Voltage Swing

±10

Vs= ±20V

Unit

70

90

77

96

mA

V

dB

~

dB

524

LM741C/LM741E1LM741 I

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS
Characteristic

Transient
Response

I
I

Symbol

Rise Time

tr

Overshoot

OS

Bandwidth

BW

Slew Rate

SR

Supply Current
Power Consumption

(Continued)

Test Conditions

LM741E

LM741 C/LM7411

Typ

Max Min

Typ

0.25

0.8

0.3

6.0

20

10

Min

Unity Gain

Unity Gain

0.43

1.5

0.3

0.7

80

Vs= ±20V

Pc

Unit

its

%
MHz

0.5

RL=ooO

Is

Max

2.8

mA

50

85

mW

150

Vs= ± 15V

Vllts

1.5

ELECTRICAL CHARACTERISTICS
(- 25°Cs;Tas;85°C for the LM7411, 0°Cs;Tas;70°C for the LM741C and LM741E, Vcc = ± 15V, unless otherwise
specified)

Characteristic

Symbol

LM741E

Test Conditions
Min

Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Offset Current Drift

70

VOUT
Vs= ± 15V

RL~10KO

±16

RL~2KO

±15

PSRR

Large Signal Voltage Gain

Av

c8SAMSUNG
Electronics

V

±10 ±13'
40

RsS;10KO, VCM = ± 12V
RsS;50KO, VCM = ± 12V

80

95

Vs= ±20V RsS;500
to±5V Rss;10KO

86

96

10

40

70

90

77

96

mA
dB

dB

32

Vs= ± 15V,
Vo= ± 10V
Vs=±15,
Vo=2V

itA

V

±12 ±14

10

RL~2KO

0.8

±12 ±13

RL~2KO

Vs= ±20V,
Vo= ± 15V

nA

MO

RL~ 10KO

los

mV

nA/oC

0.5
±12 ±13

VICR
Vs= ±20V

Power Supply Rejection Ratio

300

0.21
Vs= ±20V

Unit

ItV/oC

15

0.5

Common Mode Rejection Ratio CMRR

Max

7.5

110

Ri

Typ

4.0

t::,holt::, T

ItB

Output Short Circuit Current

LM741C/LM741 J
Max Min

RsS;10KO

t::,Vloff::, T

Input Bias Current

Output Voltage Swing

Typ

Rss;500

VIO

Input Resistance
Input Voltage Range

I

15

V/mV

10

525

•

LM741 C/LM741 ElLM741I

LINEAR INTEGRATED CIRCUIT

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 7 OUTPUT RESISTANCE vs FREQUENCY

Fig. 8 INPUT RESISTANCE AND INPUT
CAPACITANCE YS FREQUENCY
10M

600

100

R'N

~

500

."\...

§

i:~:5!~V-

w 400

U

z

~

J

~

200

~C

ffl

U

~

0,1

10K

1
10K

1K

100

100

1M

100K

10K

1K

100
90
80
70

ffi

60

B

50

~
a:a

40

II:
II:

~

1!!:

V.= ±20V

- - r--. -

-----

120

'-.....

S" 100
!,

........
r--.......

1'-... ~

1M

Fig. 10 POWER CONSUMPTION vs AMBIENT
TEMPERATURE

V.~ ±15V

r--r--

100K

FREQUENCY (Hz)

FREQUENCY (Hz)

Fig. 9 INPUT BIAS CURRENT vs AMBIENT
TEMPERATURE

1

~
1!!:

C'N

~1ooK

10'"

.....

100

w

Z

~

II:

!:i

II

IZ"
oS
U

~

Z

~300
o

10

w

U

~

!:i

~

§ 1M

INPUT BlAS- e--CURRENT

--

...

30

w

U

Z

c

Iii

illa:

1'"---.

80

---

r--- r--

~

~
1!!:

----r--

60

0
, INPUT OFFSET

10

40

~RRE~T

o
-40

-20

20

40

-20

80

60

~5V

Vs= ±115V
50

I

C

::;)

f

100

:E

u

::;)

~

Iii

10,0

8

~
0
~

~
1!!:

30

z

~

II:

100

100

150

.s
ffi
tr

60

Fig. 12 INPUT RESISTANCE va AMBIENT
TEMPERATURE

Fig. 11 INPUT OFFSET CURRENT vs AMBiENT
TEMPERATURE
V.= ±

20
TEMPERATURE (OC)

TEMPERATURE (OC)

50

~

15

-..............

r--

~

I

-20

20
TEMPERATURE (OC)

c8~SUNG

60

100

5.0
3.0

-

~

~

~i"""

1,0

-20

20

100

TEMPERATURE (OC)

526

LM741 C/LM741 ElLM741I

LINEAR INTEGRATED CIRCUIT
Fig. 14 FREQUENCY CHARACTERISTICS
vs AMBIENT TEMPERATURE

Fig. 13 NORMALIZED DC PARAMETERS
VB AMBIENT TEMPERATURE

1.75.....--..,......---,---r---..,......---,---r----.
V,; ±15V

Vs= ±15V
1.8
1.6

1.51---+----+--1---+---/---1-----1
INPUT RESISTANCE~
f=1KHz
./

1.4
III

:3
~
III
2:

5
III

a::

.... 1-..
-I--

1.2

.........

S;;'~ 1oo...L"
.,. ..-;;;:

. -POW.ER
CURRENT
.8

~,/

1.251---+----+--1---_t_

V

f::::: t-t...........

OUTPUT
SHORJ CIRCUIT
CURRENT- t---

.... 10---....

.6
.4

.75

.2

o

-40

-20

•

80

60

40

20

AMBIENT TEMPERATURE (OC)

TEMPERATURE (OC)

Fig. 16 OUTPUT SHORT CIRCUIT CURRENT
VB AMBIENT TEMPERATURE

FIg. 15 FREQUENCY CHARACTERISTICS
'VB SUPPLY VOLTAGE
1.75r----,----,--r------,---,---,

30

Ta; +25°C

28



o

-~

'"

~

u
a::

.200

.400

.600
TIME{jts)

c8SAMSUNG
Electronics

.800

1.0

10"

10'

10'

10'

10'

10'

107

FREQUENCY (H2)

527

LM741C/LM741 ElLM741I

LINEAR INTEGRATED CIRCUIT

Fig. 19 OUTPUT SWING AND INPUT RANGE
YS SUPPLY VOLTAGE

Fig. 18 VOLTAGE FOLLOWER LARGE
SIGNAL PULSE RESPONSE

20

40

Vs=±15V
a=25"C

RL=2K!l

/.
&-_,1
,,"

35

~

I

1

-3

l,

JOUTPUT

I

I

0.0

---

20

~

15

~

"~

10

60

40

TIME{j.s)

c8~SUNG

80

/.

'l~N~UT VOLTAGE

--1

RANGE (±V)

- , 7.5

~/
;/
....

---- f - - - -

~"

2_5

0
20

12.5

OUTPUT VOLT~'"
SWING (vo.)
"

~

7.5

15

~"

/.

25

!;
o
Q.

1\
\

-5
-7

~
~

1\

/

30

z

i

\

-INPUT r----, 1---

/. /.

100

7.5

10

12.5

I

15

o
17.5

20

SUPPLY VOLTAGE (±V)

528

MC1458AC/MC1458C/MC14581

LINEAR INTERGRATED CIRCUIT

DUAL OPERATIONAL AMPLIFIERS

a DIP

The MC1458 series is a dual general purpose operational amplifier.
The MC1458 'series is a short circuit protected and require no external
components for frequency compensation.
High common mode voltage range and absence of "latch up" make the
MC1458 ideal for use as voltage followers.
The high gain and wide range of operating voltage provides superior
performance in intergrator, summing amplifier and general feedback
applications.

a SOP

FEATURES
•
•
•
•
•

Interal frequency compensation
Short circuit protection
Large common mode and differential voltage range
No latch up
Low power consumption

9 SIP

•

BLOCK DIAGRAM

•
I

+

~ ~

w
w

>

+
N

~

I
N

~

ORDERING INFORMATION
Device

Package Operation Temperature

MC1458CN
MC1458ACN

8 DIP

MC1458CS
MC1458ACS

9 SIP

MC1458CD
MC1458ACD

8 SOP

MC14581N
MC1458AIN

8 DIP

MC14581S
MC1458AIS

9 SIP

MC14581D
MC1458AID

8 SOP

0-+ 70°C

-25 - +85°C

c8~SUNG

529

MC1458ACIMC1458CIMC14581

LINEAR INTERGRATED CIRCUIT

SCHEMATIC DIAGRAM
r-~---~--~---~-~--------~-oVcc

As
INPUT( -)

O----+--~-_+_-....J

OUTPUT
A7

ABSOLUTE MAXIMUM RATINGS
Characteristic
Power Supply Voltage
Input Differential Voltage
Input Voltage
Operating Temperature Range MC14581
MC1458AC/C
Storage Temperature Range

c8SAMSUNG
.
Electronics

Symbol
Vs
VIO
VI
Topr
T stg

Value
±18
±30
±15
-25- +85
0-+70
-65 -+.150

Unit
V
V
V
°C
°C
°C

530

MC1458AC/:MC1458C/MC14581

LINEAR INTERGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS
(Vcc= +15V, VEE= -15V, Ta=25°C, unless otherwise specified)

Characteristic

Symbol

Test Conditions
Rs510KO

MC1458C

MC1458IMC14581

Min Typ Max Min Typ Max

Unit

Input Offset Voltage

VIO

2.0

6.0

2.0

10

mV

Input Offset Current

110

20

200

20

300

nA

Input Bias Current

liB

SO

500

SO

700

Large Signal Voltage Gain

Av

Input Voltage Range

VieR

Input Resistance

Vo = ± 10V,

Power Supply Rejection Ratio

Output Voltage Swing

20

200

·20

±12 ±13

RI

Common Mode Rejection Ratio CMRR

Supply Current (Both Amplifier)

RL~2.0KO

Rs 510KO

PSRR

Rs510KO

1.0

70

90

60

90

77

77

2.3

Your

5.6

nA
V/mV

± 11 ±13

0.3

Is

200

V

1.0

MO

90

dB
dB

90

2.3

S.O

RL=10KO

±12 ±14

±11 ±14

RL=2KO

±10 ±13

±9 ±13

Output Short Circuit Current

los

Power Consumption

Pc

Vo=OV

20
70

Transient Response (Unity Gain)
Rise Time
Overshoot
Slew Rate

tr
OS
SR

Vi = 20mV, RL~2Kn, CL5100pF
Vi = 20mV, RL~2Kn, CL5100pF
Vi = 10V, RL~2Kn, CL5100pF

0.3
15
0.5

0.3
15
0.5

MC1458/MC14581

MC1458C

V

20
170

mA

mA

70

240

mA
p'S

%
. Vlp.s

ELECTRICAL CHARACTERISTICS
(Vcc = + 15V, VEE = -15V, NOTE 1, unless otherwise specified)

Characteristic

Symbol

Test Conditions

Input Offset Voltage

VIO

Rs510Kn

7.5

12

Input Offset Current

110

300

400

nA

Input Bias Current

liB

800

1000

nA

Large Signal Voltage Gain

Av

Vo = ± 10V,

RL~2.0K

Min

Typ

15

Max

Min

Typ

15

Max

Unit
mV

V/mV

Common Mode Rejection Ratio

CMRR

Rs510K

70

90

70

90

dB

Power Supply Rejection Ratio

PSRR

Rs510K

77

90

77

90

dB

Output Voltage Swing
Input Voltage Range

Vour
VICR

RL= 1.0K

±12

±14

± 11

±14

RL=2K

±10

±13

±9

± 13

±12

±12

V
V

NOTE 1
MC145SAC/C: 05Ta570°C
MC145SI: - 255Ta5 + S5°C

c8SAMSUNG
Electronics

531

•

MC1458AC/MC1458C/MC14581

LINEAR INTEGRATED CIRCUIT

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 1 OPEN·LOOP VOLTAGE GAIN
VB POWER SUPPLY VOLTAGES
120

Fig. 2 OPEN·LOOP FREQUENCY RESPONSE
120

'--

115

i

100

--- -

110

z

~

105

I&J

~

!:j 100

§!

~

95

z
~

90

o

./"'"

V

."...--

"

80

'"

20

1"\
1"\
1"\

85

1\

-20

80

30

6.0

9.0

12

15

18

21

10

100

POWER SUPPLY VOLTAGE (V)

'1

32

28

28

i'..

~

!:i
§!

16

...

~

o

12
8.0

4.0

o

~
10

i1j

1K

FREQUENCY (Hz)

c8SAMSUNG
Electronics

10K

100K

/

10K

(rr
I

1 I
100

200

Vs = ±12V

/~ ~

THO =5.0'10

o
100

I i I
j I II

"
V

......

ITLI SUTilii TT<5i

10M

Vs = ±15V

/

.\

RL=2K
VOLTAGE FOLLOWER

1M

III

24

\
\\

20

I&J

100K

Fig. 4 OUTPUT VOLTAGE SWING
vs LOAD RESISTANCE

32

CI

c

10K

FREQUENCY (Hz)

Fig. 3 POWER BANDWIDTH
(LARGE SIGNAL SWING vs FREQUENCy)

24

'K

500

Vo

+

RL

9.1K

IIIJ

lK

I III

2K

5K

10K

LOAD RESISTANCE (0)

532

MC3303/MC3403

LINEAR INTEGRATED CIRCUIT

QUAD OPERATIONAL AMPLIFIER

14 DIP

The MC3303 series is a monolithic Quad operational amplifier
consisting of four independent amplifiers. The device has high
gain, internally frequency, compensated operational amplifiers
designed to operate from a single power supply or dual power
supplies over a wide range of voltages. The common made input
range includes the negative supply, thereby eliminating the
necessity for external biasing components in many applications.
14

FEATURES

soP

• Output voltage can swing to GND or negative supply
• Wide power supply range;
Single supply of 3.0V to 36V
Dual supply of ± 1.SV to ± 18V
• Electrical characteristics similar to the popular LM741
• CLASS AB output stage for minimal crossover distortion
• Short circuit protected output.

"BLOCK DIAGRAM

ORDERING INFORMATION
Device

Package

MC3303N

14DIP

MC3303D

14 SOP

MC3403N

14 DIP

MC3403D

14 SOP

Operation Temperature
-40 -

+ 85°C

0-

+ 70°C

SCHEMATHIC DIAGRAM
~--.---------~----------~----~~~--~---~~------uVcc

~~~~-<>

c8SAMSUNG
Electronics

OUTPUT

533

•

MC3303/MC3403

LINEAR INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

Value

Unit

Supply Voltage
Differential Input Voltage
Input Voltage
Output Short Circuit Duration
Power Dissipation
Operating Temperature MC3303
MC3403
Storage Tem~erature

Vs
VIO
VI

±18 or 36
±36
±18
Continuous
670
-40-+85
0-+70
-65 -+ 150

V
V
V

Po
Topr
Tstg

mW
°C
°C
°C

ELECTRICAL CHARACTERISTICS
(Vee = + 15V, VEE = -15V for MC3403, Vee = + 14V, VEE = GND for MC3303, Ta = 25°C, unless otherwise specified)

Characteristic

Input Offset Voltage

Input Offset Current

Symbol

MC3303

Test Conditions

Min

1.5

VIO

5

110

Large Signal Voltage
Gain

Av

Input Impedance

Ri

Output Voltage Swing

Your

±12 ± 13.5

RL=2KO

10

12

±10 ±13

NOTE 1

0.3

10

Output Short Circuit
Curreot

los

Each amplifier

70

mV

nA

nA
V/mV

1.0

MO

V

10

12V- 12.5VVEE VEE

Vo=O, RL=OO

6hJ6T

200

15
1

Is

Average Temperature
Coefficient of Input
Offset Current

20

12.5

Power Supply Current

PSRR-

200

200
400

12

Rs~10KO

Negative Supply
Rejection Ratio

30

Unit

50
100

0.3

Common Mode Rejection
CMRR
Ratio

PSRR+

5

200

15

VieR

Positive Supply
Rejection Ratio

75

RL=10KO
RL=2Ko
Input Common Mode
Voltage Range

20
iNOTE 1

10
12

500

iNOTE 1
Vo= ± 10V
RL=2KO

1.5

150
30

liB

8.0
10

\ NOTE 1

\NOTE 1
Input Bias Current

MC3403

Typ Max Min 'Typ Max

13V- 13.5VVEE VEE

90
2.8

70
7.0

V
dB

90
2.3

7.0

mA

±10 ±30 ±45 ±10 ±20 ±45 mA
30

50

150

30

150 p,VIV

30

150 p,VIV

50

pAloC

----

c8~SUNGi

534

LINEAR

MC3303IMC3403

INTEG~TED

CIRCUIT

ELECTRICAL CHARACTERISTICS (Continued)
lYee=

+ 15V,

Vee = -1SV for MC3403, Vee = + 14V, Vee=GND for MC3303, unless otherwise specified)

Characteristic

Symbol

MC3303

Test Conditions

Min

Max Min

Typ

Max

Unit
~VI"C

10

10

GBW Av =1, RL=2KO, Vo=20Vpop, THD=5%

9.0

9.0

KHz

Av =1, RL=10KO, Vo=50mV

1.0

MHz

p.4 .

V/p.s

Input Offset Voltage Drift !::.V..J!::.T
Power Bandwidth

Typ

MC3403

Small Stgnal Bandwidth

BW

Slew Rate

SR

Av =1,VIN =-10Vto +10V

1.0
\0.4 1

Rise Time

tr

Av=1, RL=10KO, Vo =50mV

0.35

0.35

P.s

Fall Time

t,

Av=1, RL=10KO, Vo =50mV

0.35

0.35

p'S

Over Shoot

OS

Av =1, RL=10KO, Vo=50mV

20

20

%

Phase Margin

f/Jm

A v = 1, RL=2KO, CL=200pF

60

60

Degrees

Crossover Distortion

CD

VIN = 30mVpop, Vo = 2.0Vpop, f = 10KHz

1.0

1.0

%

NOTE 1
:MC3403: O~Ta~ + 70°C
MC3303: - 2S---,-oVour

>-----'>--0 Your

+VCM~--~~4---~~-~

R1

10kll

R3
1 Mil

I
I

I

Rl

v+·

Your = Rl + R2 (= 2

r

as shown)

VOUT=1-VCC

Fig. 15. Pulse generator

Fig. 14. ACCoupled non·lnvertlng amplifier

1N914

1MO

100kO

R2
Your
R2
150kO

C o r : . Your
RL

R5
100kO

f\ f\

o

R3
100kO

~

\ T 21p-

p

T

Av-1+~
R1

·Wide control voltage range:
OVoc:sVc:s2 ~V + -1.5Voc)

AV = 11 (as shown)

Fig. 16. BI·Quad filter

R

R
C

100kO

C
C1

Y,N

R2

o--tJ--~~"""-4---f

100kO
100kll
BANDPASS

OUTPUT

VREF

R3

VREF

•

R2
C1

>-----11---0 NOTCH OUTPUT

VREF

where
TBP=Center frequency galn
TN Bandpass notch gain

=

1
fo= 2...RC
R1=QR

c82!'1SUNG

R2=~

. TBP
R3=TNR2
C1=1OC

Example:fo=1000 Hz
BW=100 Hz
TBP=1
TN=1
R=160 kO
R1 =1.6 MO
R2=1.6 Mil
R3=1.6 Mil
C= O.OO1I'F

538

MC3303IMC3403

LINEAR INTEGRATED CIRCUIT

Fig. 17. Voltage controlled oscillator
O.05I'F

OUTPUT 1

/'A

OUTPUT 2

•

Fig. 18. Function generator
TRIANGLE WAVE
OUTPUT
SQUARE WAVE
r---'VY"r---....._-O OUTPUT

RI
f - R1 + R2 ·f R3 _
- 4CR,R1 I

c8SAMSUNG;
Electronics

-

R2R1
R2+R1

539

MC4558C/AC/I

LINEAR INTEGRATED CIRCUIT
a DIP

DUAL OPERATIONAL AMPLIFIER
The MC4558 series is a monolithic integrated circuit designed
for dual operational amplifier.

FEATURES
•
•
•
•
•
•
•

a sop

No frequency compensation required.
No latch-up•
Large common mode and differential voltage range.
Parameter tracking over temperature range.
Gain and phase match between amplifiers.
Internally frequency compensated.
Low noise input transistors.

BLOCK DIAGRAM

9 SIP

.o
o
>

;:

:;:l

0

I

~

+

~

w
w

>

+
N

~

I
N

~

N

I-

:;:l

0

o
o
>

ORDERING INFORMATION
Device

Package Operation Temperature

MC4558CN
MC4558ACN

8 DIP

MC4558CS
MC4558ACS

9 SIP

MC4558CD
MC4558ACD

8 SOP

MC45581N
MC4558AIN

8 DIP

MC45581S
MC4558AIS

9 SIP

MC45581D
MC4558AID

8 SOP

0- +70°C

-25-+85°C

c8~SUNG

540

LINEAR INTEGRATED CIRCUIT

MC4558C/AC/I

SCHEMATIC DIAGRAM (One Section Only)
vcco-----~--------~----~~~----~__.

IN (-)

IN (+)

•

0----+---+---"
C2

'---+--+---t---o OUTPUT

ABSOLUTE MAXIMUM RATINGS
Characteristic
Power Supply Voltage MC4558AC
MC4558CII
Differential Input Voltage
Input Voltage
Power Dissipation
Operating Temperature Range MC45581
MC4558AC/MC4558C
Storage Temperature Range

=8SAMSUNG .
E~ctromcs

Symbol
Vs
V10
Vi
Po
Topr
Tstg

Value

Unit

±22
±18
±30
±15
400
-40 - +85
0-70
-65 - +150

V
V
V
V·
mW
°C
°C
°C

541

LINEAR INTEGRATED CIRCUIT

MC4558C/AC/I
.ELECTRICAL CHARACTERISTICS
(Vcc= 15V,

vee =

-15V, Ta= 25°C, unless otherwise specified)

Characteristic

Symbol

Input Offset Voltage

VIO

Input Offset Current

110

MC4558I/MC4558AC

Test Conditions

Rss10KO

Min

Large Signal
Voltage Gain
Common Mode Input
Voltage Range

liB

Av

6

5

200

Ta=T max

3

200

300
300

Supply Voltage
Rejection Ratio

PSRR Rss10KO

·Output Voltage Swing

RL~10KO

Vour

RL~2KO

Is

500

Ta=T max

20

500

800

Ta=T min

100

1500

800

50

NOTE 1

NOTE 1
NOTE 1

200

Pc
Vi = 10V, RL~2KO
CLs100pF

30

20

25
± 13

±12

±13

70

90

70

90

200

90

76

90

76

90

76

90

76

90

±12

±14

±12 ±14

±10

±13

±10 ±13
5.0

3.5

dB

dB

V
5.6

4.5

5.0

Ta=T min

6.0

6.7
70

135

150

Ta=T min

180

200
1.0

mA

170

Ta=T max

1.0

nA

V

Ta=T max

150

nA

V/mV

±12 ±13

70

mV

500

15

±12

Unit

200

500

70
Power Consumption
(Both Amplifiers)

5

20

3.5
Supply Current
(Both Amplifiers)

7.5

30

NOTE 1

CMRR Rs s10KO

6

5

1

NOTE 1

Common Mode
Rejection Ratio

2

1

Vo = ± 10V RL~2.0KO

VICR

MC4558C

Max Min Typ Max

NOTE 1

Ta=T min
Input Bias Current

Typ

mV

V/p.s

Slew Rate

SR

Rise Time

tr

Vi = 20mV, RL~2KO,
CLS100pF

0.3

0.3

p.S

Overshoot

OS

VI = 20mV, RL~2KO,
CLS100pF

15

15

%

NOTE 1
MC4558AC/C: TminSTaSTmax = OsTas + 70 c C
MC45581: TminSTaSTmax= -25sTas +85°C

c8 SAIIISUNG
Electronics

.:

542

LINEAR INTEGRATED CIRCUIT

MC4558C/AC/I

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 2 RMS NOISE vs SOURCE RESISTANCE

Fig. 1 BURST NOISE vs SOURCE RESISTANCE
1000

100

1
1= = .

1=
t-

f-

l-

I-

~

~
~

1

1=
l-

-

I.A

= =
=

1=
!::::

~

i

,

f-

F

10

;;;

~

f':-

-

=
=

1.0

==
-

-

I

-

10

100

1DK

10K

lOOK

III

SOURCE RESISTANCE (0)

100

10

Fig. 3 OUTPUT NOISE vs SOURCE RESISTANCE

01=

1K

lOOK

1M

Fig. 4 SPECTRAL NOISE DENSITY

:: ~ "Wlilt

r=

t=

I-I--

10K,

SOURCE RESISTANCE (0)

~

11111HIt--t'-+++Htff--t-+-+++HlI

Rs =l00KIl

0~1O~~~m~~~1~DK~~WQ~~~1OOK~
FREGUI!IIC'I (Hz)

Fig. 6 PHASE MARGIN vs FREQUENCY

Fig. 5 OPEN LOOP FREQUENCY RESPONSE

1

I

I

180

+140

\

,
I

........

r\.
'-"

1.0 10

100

1DK

,

\

~

i
-20

-

~

r\.
'r\..
+20

..

~

180

-

I

\ UNIlY GAIN

i

"I\.i'\

10K 1001( 100M 10M
FREGUaCY (Hz)

·c8~SUNG

-o

1.0

10

I

i

i

I

I

\
i \

100 1DK 10K 1001( 100M 10M
FREGUI!IIC'I (Hz)

543

LINEAR INTEGRATED CIRCUIT

MC4558C/AC/I
Fig. 7 POSITIVE OUTPUT VOLTAGE SWING
vs LOAD RESISTANCE
15

:l:15V SUPPLIES

/~

Fig. 8 NEGATIVE OUTPUT VOLTAGE SWING
vs LOAD RESISTANCE

I

15

111/

13

13
:l:12V

;"

N

V

t

~

..

9.0

~I-

7.0

i

:l:W

"..,.,..

Go

0

~

5.0

I

3.0

:I::fI

:,.......-

100

1.0

500 l.oK 2.oK

10K 20K

SOKlooK

_10-

:I:'iN

:l:fN

ioo"

¢i

100

LOAD RESISTANCE (ll)

:l:12V

~

::;)

!;

:l:fN

~ ~~

"

w

..... 10-

/'

~

~~If

1.0

11

:t 15V SUPPLIES

':t3V

II
500

loOK 2.0K

10K 20K

LOAD RESISTANCE

SOKlooK

(ll)

Fig. 9 POWER BANDWIDTH
(LARGE SIGNAL SWING VERSUS FREQUENCy)
28

-

24

-

Fig. 10 TRANSIENT RESPONSE TEST CIRCUIT

-

f-

-

-

>-0--+--_-_ To Scope
(Output)

RL

-

4.0

-.l

-

-

~

-

-

r-

-

10

CL

100

l.oK

-

10K

TVI

\
-

lQOK

1.0...

FREQUENCY (Hz)

c8 !e!'lSUNG

544

KA219/KA319

LINEAR INTEGRATED CIRCUIT
14 DIP

DUAL HIGH SPEED VOLTAGE COMPARATOR
The KA219 is a dual high speed voltage comparator designed to oper:
ate from a single + 5V supply up to ± 15V dual supplies.
Open collector of the output stage makes the KA219 compatible with
RTL, DTL and TIL as well as capable of driving lamps and relays at
currents up to 25mA. Typical response time of BOns with ± 15V power
supplies makes the KA219 ideal for application in fast AID converts, level
shifters, oscillaters, and multivibrators.

14 SOP

FEATURES
•
•
•
•
•
•
•

Operates form a single SV supply
Typically 80ns response time at ± 1SV
Open collector outputs: up to + 3SV
High output drive current: 2SmA
Inputs and outputs can be isolated from system ground
Minimum fan-out of 2 (each side)
Two independent compators

BLOCK DIAGRAM

ORDERING INFORMATION
NC

Device

Package

KA319N

14 DIP

KA319D

14 SOP

Operating Temperature

NC
OUTPUT1

IN2 (-)

KA219N

14 DIP

KA219D

14 SOP

0- + 70 0 e

-25 - +85°e

SCHEMATIC DIAGRAM

IN ( - ) o----t-{

IN (+)

~~--+---+----o

OUTPUT

R17
'-----_+___~

GN D

'-----------<:l VEE

c8SAMSUNG
Electronics

545

•

· KA219/KA319

LINEAR INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

Value

Unit

Supply Voltage
Output to Negative Supply Voltage
Ground to Negative Supply Voltage
Ground to Positive Supply Voltage
Differential Input Voltage
Input Voltage
Output Short Circuit Duration
Power Dissipation
Operating Temperature Range 219
319
Storage Temperature Range

Vs
Vo- VEE
GND-VE,E
GND-Vee
VIO
VI

36
36
25
18
±5
±15
10
500
-25 - +85
0-+70
-65 - +150

V
V
V
V
V
V
sec
mW

Po
Topr
Tstg

°C
°C

ELECTRICAL CHARACTERISTICS
(Vee = + 15V, VEE = -15V, Ta = 25°C, unless otherwise specified)

Characteristic

Symbol

Input Offset Voltage
(Note 1)

VIO

Input Offset Current
(Note 1)

110

I Note 3

Input Bias Current

liB

I Note 3

Voltage Gain

Av

Response Time
(Note 2)

tr

KA219

Test Conditions

Min

Rs:s5KO

KA319

Typ

Max

0.7

4.0

I Note 3

Min

10

10

10

80

Vin:S - 5mV, 10 = 25mA

0.6

250

0.23

8

VieR

Note 3

c8~SUNG

j

VEE=OV

2

1

10

"0.4

10

±13
3'

V

V
JJ.A

±13
1

1.5

V

0.2

I Vs= ± 15V

, IVec =5V

ns
V

Vin~ 10mV, Vo ~ 35V

Input Voltage Range

80

0.4

0.2

nA
V/mV

0.3

I Note 3

nA

40

1.5

Vee~4.5V, VEE=OV
Vin:S -10mV, Isink:s3.2mA
Vin~5mV, Vo = 35V

1000
1200

0.6

Vee~4.5V, VEE=OV

200
300

500

Unit

mV

10

75

40

Vs = ± 15V

10L

8.0

1000

Vin:S -6mV, ISink:s3.2mA

Output Leakage
Current

2.0

100
150

VOL

Max

7.0

Vin:S - 10mV, '0 = 25mA
Saturation Voltage

Typ

1

3

JJ.A

--I---

V

546

KA219/KA319

LI.NEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS
vEe = -15V, Ta=25°C, unless otherwise specified)

(Vcc= + 15V,

Characteristic

I Symbol I

KA219

Test Conditions

I

Min

Typ

KA319
Max

Min

Typ

Max

Unit

Differential Input
Voltage

V ID

Positive Supply
Current

Iccl

Vee = 5V, Vee = OV

3.6

Positive Supply
Current

lec2

Vs=±15V

7.5

11.5

7.5

12.5

rnA

Negative Supply
Current

fee

Vs= ± 15V

3

4.5

3

5

rnA

±5

V

±5

rnA

3.6

Note: 1. The offset voltage and offset currents given are the maximum values required to drive the output within
a volt of either supply with a 1rnA load. Thus, these parameters define an error band and take into account
the worst case effects of voltage gain and input impeance.
2. The response time specified is for a 100mV input step with 5mV overdrive.
Note 3. KA319: O~Ta~ + 70°C
KA219: -25~Ta~ +85°C

qsSAMSUNG
Electronics

547

•

KA219/KA319

LINEAR INTEGRATED CIRCUIT

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 1 INPUT CURRENT

Fig. 2 OUTPUT SATURATION VOLTAGE

500

I.

Vs= ±15V
400

--.;;;;

r--- ~

-

1 300

1
ffi
II:

ffi

II:
II:

go

:)

0
I-

...iE

:)

2O~-~--+--+--+-~w--+---+-~

I-

I-

15~-~-~-+--~~+--+--+-~

l-

200

i

§

10~-~-+--+-~~-+--+--+-~

100

-"---

o

-40

-

OF.~_

-20

20

40

0~0--~--~~-.3~--.~4--~.5--~--~.7--~.8·

so

60

TEMPERATURE (OC)

OUTPUT VOLTAGE (V)

Fig. 4 RESPONSE TIME FOR VARIOUS
:INPUT OVER DRIVER

Fig. 3 TRANSFER FUNCTION
40

.--""1'1-..---'-..--,--,---,.---,-----,-,--,

35

~~~:~:~~ ~-~-t_-+~~~=*~

Vs= ±15V

>

.sw

~s= ~5.0V

~
g....

~ 25~-+-+-~-~--~~~~~--~~
w

l-

i

I-- I--

20

-120
6. 0

15

~
w 4. 0

g
~

-60

iE

CI

~

§ 10~-+--+-~-~-4~_+--+-~--~--

RL =5OQ{l
5 0V
IV+ =1 .

-40

~

g

"

1\ 1\ i\

2.0 ~. .

__
--.,.--~--~J)

__
"t---....

O~

-1.0

~~

mv

-0.6

-0.2

0

I-

:)

~~~~

__

~-L

0.2

__

I

o
L-~

1.0

0.6

40

DIFFERENTIAL INPUT VOLTAGE (mV)

.sw

700
I

60

~

40

0

Ta=125oc

Vs=5.0V
RL =5OQ{l
V+ =5.0V

CI

600

l-

iE

,

I

I

I

~

400

:
T

0
1/1

300

I-

200

I-

i

,
!

500

<
S.

>

1

I

-T

1

I

1

T

~

~

w

~

g
I-

~

4.0

~~
'7 rz;r"
20mV-

2.0
5.0m

~

...iE

:)

2.0mt

I

I

0

40

60

120

-100
160

I

I
100

I(

I

J

:)

6.0

CI

160

Fig. 6 INPUT CHARACTERISTICS

120

I-- I--

120

80
TIME (nS)

Fig. 5 RESPONSE TIME FOR VARIOUS
INPUT OVERDRIVER

:;-

om

1·
i W l'....' l'....''"

I-

...

:)

5.0 1-+-+-_+--+-1+--+--+-+--+--1

~

I

!
I

r-JAxiMUM
DIFFERfNTIA1L
i INPUT VOLTAGE

-10 -8 -6 -4 -2

8

10

TIME (nS)

c8SAMSUNG
Electronics

548

LINEAR INTEGRATED CIRCUIT

KA219/KA319
Fig. 7 RESPONSE TIME FOR VARIOUS
INPUT OVER DRIVER
0
~

-

Fig. 8 RESPONSE TIME FOR VARIOUS
INPUT OVERDRIVER

IVs=~15V

>
§.

RL =5OOIl
V+ =5.0V

0

III

g~ -40

0

VS= l15V
RL =5OOIl
v+ 15.0V

I-

~-80

0

~

~
~

~

g

f-- f--120
6. 0

6. 0

4.0

2OmV-

I

2.0

2.0my~

~

~
o

~

rzV

~
~ 4.0

!:i

V)omv

g

26mv-

r\ I~

I-

...:::>

1---

I-

:::>

1

'--5 0mv

1\

'\ Ic

2.0

t-2.oi V

o
80

40

180

120

80

40

120

I

160

TIME (nS)

TIME (nS)

Fig. 10 SUPPLY CURRENT

Fig. 9 SUPPLY CURRENT
10

10

Ta=2~~
~

V

/



~--

2.5

~

/

----- -

1---

lil

--

13
~

0

NEGA IVE

7.5

10

12.5

ill

15

17.5

20

TEMPERATURE (OC)

SUPPLY VOLTAGE (:!:V)

Fig. 12 OUTPUT LIMITING CHARACTERISTICS

Fig. 11 COMMON MODE LIMITS

120 r - - - - , - - - - - , - - - , - - - - , - - - - - . - - - - - , 1.2

-0.4
-0.8

~

I

....

~

VSI

:!:15~

~ -1. 2

...........

~

Si
:::;
III -1.6
Q

o

~
o

:::E
:::E

oo

J I

Vs· =5.0V, Vs - =0-

r--.:::: ~ r- --t-..

100

1.0

80

0.8

C

§.
I-

-.....

ffi

~

REFER~ED TOI SUPPLY VOLTAGES

i

0

!::

60

0.6 iii
U)
Q

40

~

:::>

-2.0

lil

a:

~

13
~

1.2

0

0.8
Vs=

r 't =5t,
5V

,

~

z

0

:J:
U)

Vi =0

0.2

20

0.4
V-55 -35

-15

5.0

25

45

65

TEMPERATURE (OC)

c8SAMSUNG
Bectronics

85

105

125

5.0

10

OUTPUT VOLTAGE (V)

549

KA710C/I

LINEAR INTERGRATED CIRCUIT

HIGH SPEED VOLTAGE COMPARATOR

14 DIP

The KA710C/I is a high speed voltage comparator intended for u~e as
an accurate, low-level digital level sensor or as a replacement for
operational amplifiers in comparator applications where speed is of
prime importance.
The output of the comparator is compatible with all intergrated logic
forms.
The KA710C/I is useful as pulse height disciminators, a variable threshold
schmitt trigger, voltage comparators in high-speed AID converters, a
memory sense amplifier or a high noise immunity line receiver.

14 SOP

FEATURES
• Low offset voltage: 5mV
• High gain: 1000 VN
• High speed: 40ns Typ

BLOCK DIAGRAM
ORDERING INFORMATION
Device

Package

KA710CN

14 DIP

KA710CD

14 SOP

KA710lN

14 DIP

KA710lD

14 SOP

Operation Temperature
0-+ 70°C
-25 -+85°C

SCHEMATIC DIAGRAM
Vcc~-·~~-------------------------*---~---------

R4
R3

OUTPUT

.IN (+)

GNDrr-----r----------~----------------------_4--~

c8 SAlliSUNG
Electronics

550

LINEAR INTERGRATED CIRCUIT

KA710C/I
ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

Positive Supply Voltage
Negative Supply Voltage
Peak Output Current
Output Short Circuit Duration
Differential Input Voltage
Input Voltage
Power Dissipation
Operating Temperature Range KA710C
KA7iOl
Storage Temperature Range

Vcc
VEE
Ipeak

Symbol

Topr
Tstg

Input Offset Voltage

VIO

Input Offset Current
(Note 1)

110

Input Bias Current

118

large Signal Voltage Gain

Av

Input Voltage Range

Test Conditions
Rs~200n,

Unit
V
V
rnA
Sec
V
V
mW

+14
-7
10
10
±5
±7
300
0- +70
-25 - +85
-65 -+150

VIO
VI
Po

ELECTRICAL CHARACTERISTICS \Vee = + 12V, VEE =
Characteristic

Value

°C
°C

-6V, Ta=25°C, unless otherwise specified)

KA7101
Min

NOTE 1

KA710C

Typ

Max

0.6

2.0

INote 2

Min

Typ

Max

1.6

5.0
6.5

3.0

NOTE 1

1Note 2
l Note 2
1250

0.75

3.0

1.8

7.0

5.0

20

7.0

25

27

45

25

40

1800

1.8

1000 1700

±5.0

Vcc= -7V
Rs~200n,

Differential Input Voltage Range

VIDA

Positive Output level

VOH

0~10<5mA, Vin~5mV

Negative Output level

VOL

Vin~5mV

Output Sink Current

sink

Vo.= OV

Pdsitive Supply Current

'Icc

Vo~OV

4.7

NOTE 2

80

95

70

±5.0

Vin~SmV

2.5

-1.0 -0.5
2.0

4.0
0

2.2

dB

lEE

Vo=oy, Vin= +SmV

4.0

7.0

Po

Vo=OV, Vin= 10mV

80

150

Response Time

t,

(Note 3)

4.0
0

2.2
4.7

9.0

Negative Supply Current

V
2.9

-1.0 -0.5
1.6

Power Consumption

.40

2.5

/LA

V
94

±5.0
2.9

/LA

VN

±5.0

VICR
CMRR

mV

5.0
7.5

INote 2

Common Mode Rejection Ratio

Unit

4.0
;.

40

V
V
rnA

9.0

rnA

7.(~

rnA

1S0

mV
nS

Note 1: The input offset voltage and input offset current are specified for a logic threshold voltage as follows:
For 7101, 1.6SV at -2SoC, 1.4V at +2SoC, 1.15V at +85°C. For 710C, 1.SV at DoC, 1.4V at + 25°C, 1.2V
at + 70°C.
Note 2: KA710C: O~Ta~ + 70°C
KA7101: -2S~Ta~ + 8SoC
Note 3: The response time specified is a 100mV input step with SmV overdrive (KA7101) or a 10mVoverdrive (KA710C)

c8~SUNG

551

•

KA710C/I

LINEAR INTEGRATED CIRCUIT

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 2 VOLTAGE GAIN

Fig. 1 SUPPLY CURRENT
10

2000

Vc~= 12~

"

1800

PO ITIVE,

Vcc=12V,_
VEE= -6V

~
I\.

1600

\

f---

I.

-r---..,

VEE = -6V - Ta=2S"C
10=0

_._- ;:;:::

NEGATIVE_
to-

"
\

1400

\

\

1200

f--

1\

1000

-.4

-.2

.2

80

40

-40

.4,

TEMPERATURE (OC)

INPUT VOLTAGE (V)

Fig. 3 INPUT OFFSET CURRENT

Fig. 4 INPUT BIAS CURRENT

1.5

J

vcc=Lv
V.,=-6V-

Vcc=12V
VEE = - 6 V -

~

I

'.5

~

~~
............

a

------

r--r--

o

80

40

-40

'-....

-40

--80

40
TEMPERATURE (OC)

TEMPERATURE (OC)

Fig. 6 OUTPUT SINK CURRENT

Fig. 5 OUTPUT VOLTAGE LEVEL

l

~
~

Vcc =12V
VEE = -6V-

~~~TLEJEl

Vccl 12v
VEE= -6V

-roo-

....w

...~
~

~

o

NEGATI,VE OUTPUT LEVEL

-1

-40

I
40
TEMPERATURE (OC)

c8SAMSUNG
Electronics

1~

80

-40

__

~

__-L__

~

____

~

__

40

~

__

~~--J

80

TEMPERATURE (OC)

552

LINEAR INTEGRATED CIRCUIT

KA710C/I

Fig. 8 RESPONSE TIME

Fig. 7 RESPONSE TIME
120

Vcc=+12V
VEE = -6V
Ta=25'C

I-- I--0

80

-40

0
Vee= + 12V __
VEE = -6V
Ta =25'f
l

-80

I--I--,120

4. 0

2.0
0,0

4.0

.--. ~jv
~

10mV
I
20mV

~~

5mV

)I~5mV

20JV-

2,0

L,....-- ....

10+1.~ ~

0.0

I

-2,0

-2,0
0.0

40

80

TIME (nS)

c8SAMSUNG
Electronics

120

160

0,0

40

80

120

160

TIME (nS)

553

LINEAR INTEGRATED CIRCUIT

KA711C/I
DUAL HIGH-SPEED DIFFERENTIAL
COMPARATOR

14 DIP

The KA711C/I contain two voltage comparators th
With separate differential inputs, a common output and
provlsipn for strobing each side independently. The device features high accuracy, fast response, low offset
vol tage, a large input voltage range, low power Gonsumption and compatibility with practically all integrated logic forms.
The KA711CII can be used as a sense amplifier fore
corel memories, and a dual comparator with OR'ed outpu-ts :is required, such as a double-ended limit detector.

14 SOP

4

FEATURES
•
•
•
•

Fast response time: 40ns (Typ)
Output compatible with most TTL circuits
Independent strobing of each comparator
Low offset voltage

1

ORDERING INFORMATION

BLOCK DIAGRAM

Device

Package

KA711CN

14 DIP

KA711CD

14 SOP

KA7111N

14 DIP

KA7111D

14 SOP

Operating Temperature
0-+ 70°C
-25 -+85°C

SCHEMATIC DIAGRAM
vcco---~~~---------+-~~~~----------~-,

INPUT (-) B

INPUT(-) A

-.----+---{) INPUT (+)

INPUT( +) B ( ) - - - - + - - - - I

B

VEEo---~---~---~----~----------~

GND

c8~SUNG

554

LINEAR INTEGRATED CIRCUIT

KA711C/I
ABSOLUTE MAXIMUM RATINGS

(Ta=25°C)

Characteristic

Symbol

Value

Unit

Positive Supply Voltage
Negative Supply Voltage
Differential Input Voltage
Input Voltage
Strobe Voltage
Peak Output Current
Continuous Total Power Dissipation
Operating Temperature Range KA711C
KA7111
Storage Temperature Range

Vcc
VEE
VIO
VI
Vst
Ipeak
Po

+14
-7
±5

V
V
V
V
V
rnA
mW

\O±..~

50
500
0-+70

Topr

ELECTRICAL CHARACTERISTICS
(Vcc= +12V, VEE= -6V, Ta=25°C, unless otherwise specified)
/

Characteristic

Input Offset Voltage

Symbol

VIO

Input Offset Current

110

Input Bias Current

liB

Large Signal Voltage Gain

Av

Min

Max

1.0

3.5

I NOTE 2
0.5

I NOTE 2

ITa=O°C

Differential Input Voltage Range

VIOR

V EE = -7.0V

Ro

Output Voltage (High)

VOH

VIN~10mV

. 1.0

0.5

75

25

700

500

500

±5.0

±5.0

VOL

VIN !:010mV

V LOM

VIN~10mV,

Strobed Output Level

Vso

Vstrobe!:O 0.3V

-1.0
10= SmA

2.5

1500

0
3.5
0

-1.0

/LA
VIV
V
V

200

n

4.5

S.O

-1.0

-0.5

0

2.5

3.5

5.0

/LA

100

±5.0

4.5

mV

15

150

200

Loaded Output High Level

5.0

25

1S0
1500

Unit
Max

6.0

10.0

±5.0

Output Resistance

Typ

20

750

VICR

Min

4.5

VOUT= 1.4V

2

KA711C

Typ

25

Input Voltage Range

Output Voltage (Low)

J

Rs!:0200n, VCM =OV

I NOTE

°C

KA71 01

Test Conditions

VOUT= 1.4V

°C

- 5 - + 150
-25- +85

Tstg

-1.0

V
V
V

0

V

Sink

VIN~10mV, Vo~OV

Icc

Vo=OV, VIN =10mV

8.6

8.6

Negative Supply Current

lEE

Vo=OV, VIN =10mV

3.9

3.9

Strobe Current

1st

Vstrobe = 100m V

1.2

2.5

1.2

2.5

rnA

Power Consum ption

Po

Vo=OV, VIN~10mV

130

200

130

230

mW

Response Time

tr

(NOTE 1)

40

40

ns

12

12

ns

Output Sink Current
Positive Supply Current

'

Strobe Release Time

trs

0.5

0.8

O.S

0.8

rnA
rnA
rnA

Note: 1. The response time specified is for a 100mV input step with 10mV overdrive (LM710) or 0.1mV overdriver
(KA710C).
2. KA711C: O!:OTa!:O + 70°C
KA7111: -25!:OTa!:O +85°C
3. The input offset voltage and input offset current are specified for a logic threshold voltage of 7111, 1.6SV
at -25°C, 1.4V at +25°C, 1.15V at + 85°C, for 711C, 1.5V at O°C, 1.4V at + 25°C, 1.2V at + 70°C.

c8~SUNG

555

•

LINEAR INTEGRATED CIRCUIT

KA711C/I
TYPICAL APPLICATIONS
• Fig. 1 Sense Amplifier With Supply Strobing
for Reduced Power Consumption*

Fig. 2 Double·Ended Limit Detactor
With lamp Driver

UPPER
LIMIT
VOLTAGE

L1
INPUT

LOWER
LIMIT
0
VOLTAGE

R

,,_

FROM
SENSE ( } - - - + - - - I LINE

* Stan by dissipation is about 40mW

c8SAMSUNG
Electronics

556

LM239/A, LM339/A, LM2901, LM3302 LINEAR INTEGRATED CIRCUIT
QUAD DIFFERENTIAL COMPARATOR

14 DIP

The LM239 series consists of four independent voltage comparators
that one designed to operate from single power supply over a wide range
of voltage.

FEATURES
• Single or dual supply operation
• Wide range of supply voltages LM239/A, LM339/A: 2 - 36V
LM2901 ,(or::!: 1 - ::!: 18V)
LM3302: 2 - 28V
(or ::!: 1 - ::!: 14V)
• Low supply current drain SOOpA Typ.
• Open collector outputs for wired and connectors
• Low input bias current 2SnA Typ.
• Low input offset current ::!: 2.3nA Typ.
• Low input offset voltage ::!: 1.4mV Typ.
• Common mode input voltage range includes ground.
• Low output saturation voltage
• Output compatible with TIL, DTL and MOS logic
system

BLOCK DIAGRAM

•

OUT2 1 l - - - - - - - - - ,

14 SOP

I
ORDERING INFORMATION

, - - - - - - - 1 14 OUT3

c8SAMSUNG
Electronics

Device

Package

LM239N
LM239AN

14 DIP

LM239D
LM239AD

14 SOP

LM339N
LM339AN

14 DIP

LM339D
LM339AD

14 SOP

LM2901N
LM2901D
LM3302N

14 DIP
14 SOP
14 DIP

Operating Temperature

- 25 - +85°e

0-70 o e

-45 - +85°e

557

LM239/A, LM339/A, LM2901, LM3302 LINEAR INTEGRATED CIRCUIT
SCHEMATIC DIAGRAM
VccO~-----------+-------------------~--

IN (+ ) o---*"----[

IN (-) 0------+---+-----+--+-----1

~+--+-~I---n

OUTPUT

05

06

GNOo-----~--~----+-~----~--~~----~

ABSOLUTE MAXIMUM RATINGS
Characteristic

Symbol

Value

Unit

Power Supply Voltage
Power Supply Voltage Only LM3302
Differential Input Voltage
Differential Input Voltage Only LM3302
Input Voltage
Input Voltage Only LM3302
Output Short Circuit to GND
Power Dissipation
Operating Temperature LM239/LM239A
LM339/LM339A
LM2901/LM3302
Storage Temperature

Vs
Vs
VIO
V\D
VI
VI

±18or36
±14or28
36
28
-0.3 to +36
-0.3 to +28
Continuous
570
-25- +85
0-+70
-40- +85
-65 -+ 150

V
V
V
V
V
V

c8SAMSUNG
Electronics .

Po
Topr

Tstg

mW
°C
°C
°C
°C

558

LM239/A, LM339/A, LM2901, LM3302 LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS
(V cc =5V, Ta=25°C, unless otherwise specified)

Characteristic

Symbol

Input Offset Voltage

VIO

Input Offset Current

ho

Input Bias Current
Input Common Mode
Voltage Range
Supply Current

Test Conditions

Vo = 1.4V, Rs=O

NOTE 1

Large Signal
Response Time

tRES

VIN = TTL Logic Swing
Vref=1.4V, V RL =5V, RL=5.1KO

Response Time

tRES

VRL =5V, RL=5.1KO

Output Leakage
Current

Ileak

Differential Voltage

V ID

(for large swing)

VIN-~1V,

VIN + =OV, Vo ;:5;1.5V

VIN-~1V,

VIN + =OV

±5
±9.0

±50

±2.3 .±50

250

57

500
400

0

Vcc·1.5

0

Vcc·1.5

0

Vcc·2

0

Vcc·2

1.1
50

6

Unit

mV

nA

± 15lJ

400

RL=OO
RL~15KO

Max

±4.0

± 150
57

Vcc = 15V,

Vsat

±1.4

NOTE 1

Icc

Sink

±2

±2.3

AVOL

'

±1

NOTE 1

Voltage Gain

Output Sink Current

Min Typ

NOTE 1

VICR

LM239/LM339

Max

VCM=OV to Vcc-1.5V

Is

Output. Saturation
Voltage

LM239A1LM339A
Min Typ

2.0

1.1

2.0

nA

V
mA

200

V/mV

350

350

ns

1.4

1.4

p.s

200

50

18
140

6
400

mA

18
140

700

400

=4mA
VIN - =0

NOTE 1

Vo =5V

VIN + = 1V

Vo=30V

1.0

1.0

p.A

NOTE 1

36

36

V

0.1

700

mV

' sink

0.1

nA

* NOTE 1

LM339/A: O;:5;Ta:s + 70°C
LM239/A: - 25:sTa:s + 85°C
LM2901 13302: - 40:sTa< + 85°C

=8~SUNG

559

I

LINEAR INTEGRATED CIRCUIT

LM239/A, LM339/A, LM2901, LM3302

ELECTRICAL CHARACTERISTICS
(VCC = 5V, Ta = 25°C, unless otherwise specified)
',-

Characteristic

--..........,
VIO

Input Offset Current

ho

Input Common Mode
Voltage Range
Supply Current
Voltage Gain

Test Conditions

Min Typ

VCM=OV to Vcc=1.5V

Input Offset Voltage

Input Bias Current

LM2901

Symbol

Vo=1.4V, Rs=O

16

VICR

NOTE 1

9

50

50

200

57

250

NOTE 1

200

500

Response Time

t RES2

VRL =5V, RL=5.1KO

Output Sink Current

ISink

VIN_~1V, VIN+ =OV, Vo~1.5V

Output Saturation
Voltage

V sat

Output Leakage
Current

Ileak

Vcc·2

Differential Voltage

V ID

25

6

Vo =5V
Vo=30V
NOTE 1

1.1

nA

nA

V

2.0
mA
V/mV

350

350

ns

1.4

1.4

/-I-s

18

mA

2

18
140

6
400

140

0.1

400

mV

700

700

0

mV

30

100

NOTE 1

VIN+ = 1V

500
1000
Vcc·1.5

VIN + =OV

VIN + =0

57

Unit

100
300

0

2.5

t REST

3

0

2.0

(for large swing)

40

Vcc·2

1.6

RL~15KO

20

Vcc·1.5

1.1

VIN = TTL Logic Swi ng
Vref=1.4V, RRL=5V, RL=5.1KO

2

Max

0

RL=oo ,

Vcc =15V,

Min Typ

0

RL= 00, Vcc = 30V

AVOL

VIN_~1V,

7
15

2.3

Large Signal
Response Time

ISink=4mA

2

NOTE 1

NOTE 1

Icc

LM3302

Max

0.1

nA

1.0

1.0

/-I- A

36

28

V

NOTE 1 LM339/A: O~Ta~ + 70°C
LM239/A: - 25~Ta~ + 85°C
LM2901/3302: - 40~Ta< + 85°C

c8SAMSUNG
Electronics

560

LM239/A, LM339A, LM2901, LM3302 LINEAR INTEGRATED CIRCUIT
TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 1 SUPPLY CURRENT
2.2

b__ ,

Ta~ -40 0

1.8

C

1.6

I-

1.4

,~

S
Z
11.1.

a:
a:

:)

1.2

:)

tJl

""'" ...-::
,.-

-'"

./"

0

~

Fig. 2 INPUT CURRENT
120

.8

/'

.6

-- ..-d-----

-'---

90

~
I15a:

Tar250C

Ta=85°C
-.~

..

;,...--

a:
:)
0

I-

~
i!!:

.4

Rli"'-

o

10

15

20

25

30

35

..-

70

8=

400.s..

--

t-'"

~a_ +2 °C

60

--

50

I---

a= -~5°C

~

.-.

~ ~::~oc

20

I

10

:

40

Fig. 4 RESPONSE TIME FOR VARIOUS INPUT
OVERDRIVE·NEGATIVE TRANSITION

Fig. 3 OUTPUT SATURATION VOLTAGE

Ta'=25O~

_.

--=r:-

•

40
SUPPLY VOLTAGE IV)

SUPPLY VOLTAGE IV)

10'

- ----

40

30

.2

o

80

I

V'N(cm)= OVoc R'N(cm) = 1GIl

100

Taj -25°C

",.",-"'"'

I

110

.....- --:t=+--..

i-

~~iu~~N)~
t---

10"

€
11.1

CI

I--

l.I

~

-

--

0

> 10-'

z

0

-- -

-Ta=85°C
Ta- -40°C

!;i

~ 1a~12~!lb

!;(
tJl

6.0

_..... ~o-rJlllI

§

10-'

i
4.0

--

f----

tz''-

2.0

10- 3
• 10- 2

---1---

I \

r

mv
'

10-'

10·

10'

10'

OUTPUT SINK CURRENT (mAl

,
I_+\1mv vl ,

, ,\
0.4

I

\

1NPr OVfRDRI,VE

-

5.01

0.8

1.4

TIME (usee)

Fig. 5 RESPONSE TIME FOR VARIOUS INPUT
OVERDRIVE·POSITIVE TRANSITION

cg
III

CI

~'

0

100

I

>

I

I-

...~

:)

I

I
i
I

I
~
CI
1...
'"

g

6.0

I---+--...JI---t---I--t---I:--t--t--t---t
/'"

V

V.

.--

4.0 1---+=i-c=-c±=-=-:l~-+,I~-+--c7f'---t-~"'1----j
T
'/:.
!
°lVERDI'VE 'I'

1NPr

I 2.0 ,---"--I,---"-,,v_mv_[7~2Ol.-.-V7,--5.01,---,V01

0.4/

0.81

TIME (usee)

c8SAMSUNG
Electronics

561

LM239/A, LM339/A, LM2901, LM3302

LINEAR INTEGRATED CIRCUIT

APPLICATION INFORMATION
The LM239 series includes four high gain, wide bandwidth devices which, like most comparators, can easily oscillate
if the output lead is inadvertently allowed to capacitively couple to the inputs via stray capacitance. That occurs
during the output voltage transitions, when the comparator changes state.
To minimize this problem, PC board layout should be designed to reduce stray input output coupling; reducing the input resistors to less than 10KO reduces the feedback signal levels and finally, adding even a small amount (1 to 10mV) of positive feedback (hysteresis) causes such a rapid transition that oscillations due to stray feedback are not possible.
It is good design practice to ground all unused pins.
The differential input voltage may be larger than positive supply without damaging the device. Note that voltages more negative
than -O.3V should not be used: an input clamping diode can be used as protection.
The outputLM339 is the uncommitted collector of a NPN transistor with grounded emitter. This allows the device to be used
like any open-collector gate providing the OR-wide facility.
The output sink current capability is approximately 16 rnA; if this limit is exceeded, the output transistor will come out of
saturation and the output voltage will rise very rapidly.
Under this limit, the output saturation voltage is limited by the approximatively GOO rsat of the output transistor.

TYPICAL APPLICATIONS

(Vee

= + 15V)

Fig. 6 Basic comparator

Fig. 7 Non·inverting comparator with Hysteresis
5V

5V

3K{l

+VREFo-----I

>--+--OVo

Vo
+VIN

o-~~

__-t

10K{l

Fig. 8 Inverting comparator with Hysteresis

3K{l

+VINo-----t~

>---+---0 Vo
1M{l

c8SAMSUNG
Electronics

562

LM239/A, LM339/A, LM2901, LM3302

LINEAR INTEGRATED CIRCUIT

Fig. 10 Driving TTL

Fig. 9 Driving C/MOS

5V

5V

I

Fig. 12 OR gate

Fig. 11 AND gate
15V

15V

3KU

3KU

3x100KU -=:#INV-"...................
Ao----4\I~:..:.....;

Ao--~~--,

BD-~~~~~~~,

A·B·C

C
+1:r

o

Bo--~~-+~~.~

A+B+C

+~C
o "0" "1"

"0" "1"

Fig. 13 Large fan·in AND gate

Fig. 14 Squarewave oscillator

15V
15V

4.3KU

3KU

Vo

>--+--0

c8SAMSUNG
Electronics

~

±vcc

f=100KHz

563

LINEAR INTEGRATED CIRCUIT

LM239/A,lM339/A, LM2901,LM3302

Fig. 15 ORing the outputs

Fig. 16 Peak audio level display

15V

3Kfi

>---+--OVo

Fig. 17 Zero crossing detector (single supply)

Fig. 18 Zero crossing detector (split supplies)
VINmin '" O.4V peak for 1% phase distortion (d 0)

15V

•
S.2KO

6.SKO

01

01 prevents input from going negatIve by more than O.6V:
R1+R2=R3
R3 ~ R5/10 for smaller error in zero crossing

c8SAMSUNG
Electronics

564

LM293/A, LM393/A, LM2903

LINEAR INTEGRATED CIRCUIT

DUAL DIFFERENTIAL COMPARATOR

8 DIP

The LM293 series consists of two independent voltage comparators
that one designed to operate from a single power supply over a wide
range of voltage.

FEATURES
•
•
•
•
•
•
•
•

8

Single Supply Operation: 2V to 36V
Dual Supply Operation: ::!: 1V to ::!: 18V
Allow Comparison of Voltages Near Ground P()tential
Low Current Drain 800",A Typ
Compatible with all Forms of Logic
Low Input Bias Current 2SnA Typ
Low Input Offset Current ± SnA Typ
Low Offset Voltage::!: 1mV Typ

soP

9 SIP

I

BLOCK DIAGRAM
OUTPUT 1

•

IN1(-)

IN1(+)

IN2(-)

GND

IN2(+)

a
a
>

f:

I

+

0

~

~

:::>

0

z

C!l

+

I

'" '"~

~

'"

I-

:::l

0

aa
>

ORDERING INFORMATION
Device

Package

LM293N
LM293AN

8 DIP

LM293S
LM293AS

9 SIP

LM293D
LM293AD

8 SOP

LM393N
LM393AN

8 DIP

LM393S
M393AS

9 SIP

LM393D
LM393AD

8 SOP

LM2903N

8 DIP

LM2903D

8 SOP

LM2903S

9 SIP

Operation Temperature

-25- +85°C

0-+ 75°C

-40 -+85°C

c8SAMSUNG
Electronics

565

LM293/A, LM393/A, LM2903

LINEAR INTEGRATED CIRCUIT

SCHEMATIC DIAGRAM
VccO~--------~r---------~~----~~

IN (+)0----+----1

IN (-) O-------+---+-------l--+--------<

..,--+---+------l--O OUTPUT

GNDU------~--+_--~~-~----~--~~--~

ABSOLUTE MAXIMUM RATINGS
Symbol

Value

Unit

Power Supply Voltage

Vs

± 18 or 36

V

Differential Input Voltage

VID

36

V

Input Voltage

VI

-0.3 to +36

V

Characteristic

Output Short Circuit to GND
. Power Dissipation

Continuous
Po

570

mW

Operating Temperature
LM293/LM293A
LM393/LM393A
LM2903

Topr

-25- +85
0-+70
-40- +85

°C
°C
°C

Storage Temperature

Tstg

-65- +150

°C

c8~SUNG

566

LINEAR INTEGRATED CIRCUIT

LM293/A, LM393/A, LM2903
ELECTRICAL CHARACTERISTICS
Characteristic

Test Conditions

Symbol

Input Offset Voltage

VIO

Input Offset Current

ho

Input Bias Current

(Vee = 5V, Ta = 25°C,. unless otherwise specified)
LM293A/LM393A LM293/LM393'
Min Typ
±1

V eM = OV to Vee - 1.5V
Vo=1.4V, Rs=O
NOTE 1

65

Supply Current

Icc

Voltage Gain

Av

±5
±9.0

±5

±50

±50
± 150

250

65

250
400

0

Vee-1.5

0

Vee-1.5

0

Vee- 2

0

Vee-2

RL=oo

0.6

1

0.6

1

0.8

2.5

0.8

2.5

Vee = 15V,

RL~15KO(for

large Va swing) 50 200

tAES1

VIN = TIL Logic Swing
Vre!= 1.4V, V AL = 5V, RL= 5.1KO

Response Time

tAES2

V AL =5V, RL=5.1KO

Output Sink Current

ISink

V IN -

Output Saturation Voltage

V sat

heak

Max

RL =00 Vee = 30V

Large Signal Response
Time

Output Leakage Current

±1.

400

NOTE 1

NOTE 1

±2

± 150

NOTE 1

18

VieR

Min Typ

±4.0
±5

Input Common Mode
Voltage Range

Max

~1V,

VIN-~1V,

Isink =4mA
V IN - =0,
Vin + ::; 1V

Vo~1.5V

6

160

V IN + =OV

Vo =30V

400

0.1

V

mA

J.tS

18

mA

160

400
700

0.1
1.0

nA

1.4

700

NOTE 1
Vo=5V

6

18

nA

nS

350

1.4

V IN + =OV,

mV

V/mV

50 200

350

Unit

mV
nA

1.0

J.tA

NOTE 1
LM293/A: - 25~Ta~ + 85°C
LM393/A: O~Ta~ + 70°C
LM2903: - 40~Ta~ + 85°C

c8SAMSUNG
Electronics

567

I

LINEAR INTEGRATED CIRCUIT

LM293/A, LM393/A, LM2903
ELECTRICAL CHARACTERISTICS
Characteristic

Input Offset Voltage

Input Offset Current

Input Bias Current

Symbol

VIO

Test Conditions
VCM =OV to Vcc-1.5V
Vo= 1.4V, Rs=O

LM2903

MinJ Typ
±1

±7

±9

±15

±5

±50

NOTE 1

±50

±200

65

Ie

VICR

Supply Current

Icc

NOTE 1

Av

a

Vcc-1.5

0

Vcc-2

tRES1

RL=OO Vcc =30V
Vee = 15V, RL~15KO (for large Vo swing)

Response Time

tRES2

VRL=5V, RL=5.1KO

ISink

VIN-~1V,

V1N + =OV, Vo~1.5V

Output Saturation Voltage

Vsal

VIN-~1V,

VIN + =OV

Output Leakage Current

Ileak

qsSAMSUNG
Electronics

25

VIN = TIL Logic Swing
Vref =1.4V, VRL =5V, RL=5.1KO

Output Sink Current

6

0.6

1

1

2.5

NOTE 1 .

VIN - =0,
V in + = 1V

Vo=5V
Vo=30V

mV
nA

nA

V

mA

100

V/mV

350

nS

1.5

p.S

16

mA

160

I slnk =4mA

250

Unit

500

NOTE 1

RL=OO

Large Signal Response
Time

Max

NOTE 1

110

Input Common Mode
Voltage Range

Voltage Gain

(Vcc =5V, Ta=25°C, unless otherwise specified)

400
700

0.1

mV
nA

1.0

p.A

568

LINEAR INTEGRATED CIRCUIT

lM293/A, LM393/A, LM2903

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 2 INPUT CURRENT

Fig. 1 SUPPLY CURRENT
120

1.2

t;::: --~
-~--+--

110

I--

c

S

...

--f.- .-

""'"1 ~~ -2~'C

iii

II:
II:
:=)

0

~

:=)

UI

r-

~

.8

100

I--

.6 ~ a=25'C

foo·-

-.-

f-o'-

Ta=

90

I~

80

!zIII

70

:=)

60

II:
II:

-

...0

K
iii:

.4 ........,......t:85·C

-.,.,

."..

1----

::.-

r--

...... -.-~.Ta=25,'\;

",..-

I -i-

50

~ ~Ta=85'C

40
30

.2

-.----- --

!25,~a= -~~

.... ...-:::: e>'

I-

~~

20

o

o

10

15

20

25

30

V",c",=OVoc
R1N(CM)jlGO

10

~l='"
35

o

40

o

10

15

SUPPLY VOLTAGE (VI

20

25

30

10
OUT OF
MTURA I

S

f
~~

Ta= Bl'C
I--

~
10-

K

100

~
w

6.0

~
0

4.0

~...

2.0 - f - .

Ta_ 2 'C

c:I

>

L

:=)

0

1010 '

10"

10

I----- -

iii:

V

~

I

a= -4O'C

t.I"

Ul

-- -

I

~0

...>

10-

z

Ta =25'

w

w

Q

l

i

c:I

c:I

>

I
I

>-

~

~
0

•

40

Fig. 4 RESPONSE TIME FOR VARIOUS INPUT
OVERDRIVE·NEGATIVE TRANSITION

Fig. 3 OUTPUT SATURATION VOLTAGE

10"

35

SUPPLY VOLTAGE (VI

10

10

OUTPUT SINK CURRENT (mA)

," ,

OVE DRIV

\ NPU

50m

v\

1

~m"
0.4

5.om~

0.8

1.4

TIME (usec)

Fig. 5 RESPONSE TIME FOR VARIOUS INPUT
OVERDRIVE·POSITIVE TRANSITION
TJ=25·b

>-

S
III

c:I

~

100

0

...>

:=)

0.

iii:

E

6.0

III

c:I

~

4.0

>

...

:=)

...
0.

:=)

0

2.0

..... io""'"

/

~

h J v,v-

IjPUTrVER DRIVE

0

i[ (

. 20m 11-

0.4

0.8
TIME (usec)

c8SAMSUNG
Electronics

-

1.4

569

LM293/A, LM393/A, LM2903

LINEAR INTEGRATED CIRCUIT

APPLICATION INFORMATION
The LM293 series are high gain, wide bandwidth devices which, like most comparators, can easily oscillate if the
output is inadvertently allowed to capacitively couple to the inputs via stray capacitance. That occurs during the
output voltage transitions, when the comparator changes state.
To minimize this problem, PC board layout should be designed to reduce stray input-output coupling, reducing the input resistors to less than 10KO reduces the feedback signal levels and finally, adding even a small amount (1 to 10mV) of positive feedback (hysteresis) causes such a rapid transition that oscillations due to stray feedback are not possible.
If is good design practice to ground all unused pins.
The differential input voltage may be larger than positive supply without damaging the device. Note that voltages more negative
than -0.3V should not used: an input clamping diode can be used as protection.
The output of the LM239 series is the uncommitted collector of a NPN transistor with grounded emitter. The allows
the device to be used like any open-collector gate providing the OR-wide facility.
The output sink current capability is approximately 16mA; if this limit is exceeded, the output transistor will come out of saturation and the output voltate will rise very rapidly.
Under this limit, the output saturation voltage is limited by the approximatively 600 rsat of the output transistor.

TYPICAL APPLICATIONS

(Vee

= +15V)

Fig. 7 Non·inverting comparator
with Hysteresis

Fig. 6 Basic comparator

Fig. 8 Inverting comparaton
with Hysteresis

+Vee

+Vcc

3KIl

+VREF
+VIN

3KIl

10KO

+Vee

+VIN

+V

3KO

1MO
1MO
1Mn

Fig. 9 Driving C·MOS
+5V

c8SAMSUNG
Electronics

Fig. 10 Driving TTL
+5V

570

LM293/A, LM393/A, LM2903

LINEAR INTEGRATED CIRCUIT

APPLICATION INFORMATION (continued)
Fig. 11 AND gate

Fig. 12 OR gate
+Vcc

+Vcc

3K!l
3xl00K!l

3x 100k!l

Ao--~,.......,

>-~---.o A'B'C

Bo-_~~---~-t

+Vcc C o-_~,........

A

o-~~r---1

B

O-~~~~--~-f'~

C

:V.:J

O~

"0" "1"

"0" "1"

•

Fig. 14 Squarewave oscillator
Fig. 13 Large fan·in AND gate

+Vcc
+Vcc

+V:TLf
Vo
+Vcc - - - .
o ....J A'O--III'-::-+---f;:;..o
"0" "1'" B o--MI---+

+Vcc

f=l00KHz

O--~""""-~'¥\o----'

Co--IoI'-::-~

00-......---'

Fig. 15 Pulse generator

Fig. 16 One·shot multivibrator

+Vcc

+Vcc
15K{}

Rl

01

lMf!

1N914

A2

02

ol
6pS~V+
OOpS

10 11
...Vcc

to

10K!l

lms

~-=: V+
--:J C

>--+--0 Vo

10

11

12

Vo

c8~SUNG

571

LINEAR INTEGRATED CIRCUIT

LM311

8 DIP

VOLTAGE COMPARATOR
The LM311 series is a monolithic, low input current
voltage comparator.
The device is also designed to operate from dual or
single supplies voltage.

FEATURE
•
•
•
•
•
•

Low input bias current: 2S0nA (Max)
Low input offset current: SOnA (Max)
Differential Input Voltage: ± 30V•
Power supply voltage: single S.OV supply to ± 1SV.
Offset voltage null capability.
Strobe capability.

8 sOP

BLOCK DIAGRAM
GND

1

ORDERING INFORMATION
7 OUTPUT
6 BALANCE/STROBE

Device

Package

LM311N

8 DIP

LM311D

8 SOP

Operation Temperature

0-+ 70

0

e

5 BALANCE

SCHEMATIC DIAGRAM
·~~------~~~--~--------~----~vcc

r-+----+----<~_o

OUTPUT

. IN (+)

IN (-)
R4
L--------4II.--OGND

~~--4II~-------~~~--~-----<~~------~------------OVEE

c8SAMSUNG
Electronics
.

572

LINEAR INTEGRATED CIRCUIT

LM311

ABSOLUTE MAXIMUM RATINGS
Characteristic

Total Supply Voltage
Output to Negative Supply Voltage LM311
Ground to Negative Supply Voltage
Differential Input Voltage
Input Voltage
Output Short Circuit Duration
Power Dissipation
Operating Temperature Range
Storage Temperature Range

Value

Unit

Vs
Vo - VEE
VEE
VID
VIN

36
40
30
±30
±15
10
500
0-+70
-65 -+150

V
V
V
V
V
sec
mW
°C
°C

Po
' Topr
T5tg

ELECTRICAL CHARACTERISTICS
Characteristic

Symbol

(Vcc = 15V, VEE = -15V, Ta= 25°C, unless otherwise specified)

Test Conditions

Symbol
Rs~50Kn

Input Offset Voltage

Via

Input Offset Current

110

I NOTE 1

Input Bias Current

Its

I NOTE 1

Voltage Gain

Av

Strove "ON" Current

Max

1.0

7.5
10

6

Vsat

I NOTE 2
= SOmA,

VIN~

250
300

40

tr

50
70

100

10

Saturation Voltage

Typ

I NOTE 1

\

Response Time

Min

-10mV

mV

nA

nA

200

V/mV

200

nS

0.75

1.5

0.23

0.4

Vcc~4.5V,

VEE = OV
ISink~8mA, VIN~ -10mV , NOTE 1

rnA

3

Is

Output Leakage Current

Ileak

Istrobe = 3m A, VIN ~ 10mV
Va = 35V, VEE = VGNO = - 5V

Input Voltage Range

VICR

NOTE 1

Positive Supply Current

Icc

3.0

7.5

Negative Supply Current

lEE

-2.2

-5.0

Istrobe

3

Strobe Current

Unit

0.2
-14.5
to 13.0

50

- 1'4.7
to 13.8

nA
V
rnA
rnA
rnA

NOTE 1: O~TA~ + 70°C
NOTE 2: The response time specified is for a 100mV input step with 5mV over drive

c8SAMSUNG
Electronics

573

•

LINEAR INTEGRATED CIRCUIT

LM311

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 2 INPUT OFFSET CURRENT

Fig. 1 INPUT BIAS CURRENT

-

600

----

500

~
Iffi

50

vsl

r-RAISED

r--. ~

400

±15V

) = ±15V

C

.s.

.............

I-

Z

::!
(.)

300

Iii

c

~

~

200

l-

(.)

30

§

~

:>

'"

40

II)

iii

20

0

!
100
NORMAL

-

-

~--

10

r--~~

o
-50

-25

25

50

o

100

75

-50

-25

+1

II

>-

:+

.5.
11.1

CJ

~

g

.~.

10

-

I

~

/-_.

-

I·-.~~.:- --

II.

!

_ ..

IZ

--

:!5

v

5

CI

~

/

225

-

175 f-- f-- - -

--~

I

'--

""""

7'-

-

mBf-- -

- -

~

50

liiliiii 1_
I

I""'

s

i

25

100

lOOK

1M

-16 -12

10M

12

16

VsmJ..
50 I - - - Ta=25OC

---

-1.0

:I;
11.1

-1.5

NORJAL OU,lPUT
RL-1Kll
V++=4fN

a

~-

-

0.2

I

~ 30

I-

0.4

(

.~

0

(.)

40

'11.1

:I;
Z

0

4

Fig. 6 OUTPUT VOLTAGE Vs DIFFERENTIAL
INPUT VOLTAGE

-~~~~~~~~~AdES

:l

:I;
:I;

-4

60

~

Q

-8

DIFFERENTIAL INPUT VOLTAGE IV)

Fig. 5 COMMON MODE LIMITS Vs TEMPERATURE

0

--.-

I

V+

~

Ta-25OC

"

.

~=:::--r=--::
--

_...

1,1!--

200 c-- f-- f-- -

INPUT RESISTANCE 1(11)

-0.5

100

75

-~ itTYPICAL

IIII
10K

r-__ Io".

50

Fig. 4 INPUT ·BIAS CURRENT Vs DIFFERENTIAL
INPUT VOLTAGE

----

_._-

~

"Mkl~UM-

V

~

0

-JL~.lf
j:~~a"~5oc

--

1

if

Iii

r

~-...

""-

TEMPERATURE (OC)

Fig. 3 OFFSET VOLTAGE Vs INPUT RESISTANCE
100

.............

25

TEMPERATURE (OC)

:>

"

i

!

I-

",AISED

~.

-----

5

f-EMITTER
FOLLOWER
f-0UTPUT
20
RL-6OOIl

-35

-15

25

45

TEMPERATURE (OC)

c8SAMSUNG
Electronics

85

105

125

'\

-1.0

--

I \..

I - - - 1--55

" r\. IIII

Jr\.

10

J

V-55

I

-0.5

"

0.5

1.0

DIFFERENTIAL INPUT VOLTAGE (mY).

574

LM311

LINEAR INTEGRATED CIRCUIT

Fig. 7 SATURATION VOLTAGE Vs CURRENT

Fig. 8 SUPPLY CURRENT Vs TEMPERATURE

0.8

~

0.6

~

0.5

J=
s

r--

0.7

TaJ50C

w

~
Z
2

0.4

i::.
Ii
UI

V

V
./

0.3

./

./

V
./

-

---

I""

,

0.2

/

0.1

o

POSITIVE SUPPLY·

~LOW

--..

i---

r-- r---~

/

~5~~Jnl~~IPLY-

10

20

30

40

-25

50

25

OUTPUT CURRENT (rnA)

50

Fig. 10 SUPPLY CURRENT Vs
SUPPLY VOLTAGE
6

~VS=±15V
./~

..,",

-

10-11

V

---

TaL
,/ -

3

..,-

-----

45

---

-

2

----- --- --- .~

~OSITIVE AND

NEGATIVE SUPPLY
(OUTPUT LOW)

1

0
55

25·C

./

POSITIVE SUPPLY
(OUTPUT HIGH)

4

iNPUTVIN-1.5V

-------

25

-

I

100

75

TEMPERATURE (OC)

Fig. 9 LEAKAGE CURRENTS Vs TEMPERATURE

OUTPUT VOuT=~

-

'--

POSITIVE AND ~-

1

o

±15V

V

65

10

75

Fig. 11 OUTPUT SATURATION VOLTAGE

15

20

25

30

SUPPLY VOLTAGE (V)

TEMPERATURE (OC)

Fig. 12 OUTPUT LIMITING CHARACTERISTICS

·8 r - - - - - ; - - - - , - - - - - r - - - - , r - - - - : : I

1201---+--+--+---+--+----11.2

'f\

OUTPUT CURRENT (mA)

c8SAMSUNG
Electronics

575

LINEAR INTEGRATED CIRCUIT

LM311
TYPICAL APPLICATIONS
Fig. 1 [Switching

Power Amplifier

r-----------~--------------~~----------~--------------~vee

02
2N6125

620

620

OUTPUT--~

620

300K

r

300K
39K

39K

510
15K

~------------·--------~~--~--~------------------------~~~~'NPUT

REFERENCE

~----------.----------------~~----------------------------~--~~
15K

Fig.

21Relay Driver with Strobe

Fig. 3 Digital

Transmission Isolator

r--------------~-o61~PUT

qsSAMSUNG
Electronics

576

KS555

CMOS INTEGRATED CIRCUIT
a DIP

CMOS TIMER
The KS555 is CMOS timer with improved performance
over the standard bipolar one. Due to its high-impedance
inputs, it is capable of. producing accurate time delays
and oscillations with less expensive (smaller) timing
capacitors than the standard bipolar timer.
Its dramatic advantages over bipolar ones are very low
power consumption and wide operating voltage range
especially stable low voltage operations.

a sop

FEATURES
• Low power consumption
• Pin to pin operation with bipolar
timer in most cases
• Extremely low trigger, threshold,
and reset pin current
• High speed operation (500KHz)
• Stable low voltage operation
(possible 1.5V operation with most samples)
• Wide operating voltage range: 2 to 18V
• High output source/sink driver meet nL/CMOS
• Immunized to static charge with inner protection
devices

•

APPLICATIONS
•
•
•
•
•
•
•

Precision Timing
Pulse Generation
Sequential Timing
Time Delay Generation
Pulse Width Modulation
Pulse Position Modulation
Missing Pulse Detector

ORDERING INFORMATION
Device

SCHEMATIC DIAGRAM

CONTROL (5)

8 DIP

KS555D

8 SOP
vee

Vee(8)~---

THRESHOLD

Package

KS555N

Operating Temperature

-20 _+85°C

(8)

O------1~-~

(6)O-----1I---~

TRIGGER (2)0-----1'---------1

GND

c8SAMSUNG
Electronics

577

CMOS INTEGRATED CIRCUIT

KS555

BLOCK DIAGRAM

R
THREsHoLr
lO--~~----i ~-~---1

:>0---0 CUTPUT
3

CONTROL
VOLTAGE

JDISCHARGE

p

GNJ,
TRIGGEFl

COMPARATOR

R

B

GND 1

This block diagram reduces the circuitry down to its simplest equivalent components. Tie down unused inputs.
R = 1OOKfl ± 20% Typ.

TRUTH TABLE
Threshold
Voltage

Trigger
Voltage

Don't Care

Don't Care

r------------

Reset

Low

Output

Discharge
Switch

Low

On

------------------- - - - - - - - -

>2/3 (Vee)

> 113 (Vee)

High

Low

Don't Care

< 1/3 (Vee)

High

High

____

On

8~~~_e31;2~ ;113(V~cl=2I3(-V~~) -------Hi9~=-~_~ -_--==_~~~~=-- -~=-St~bk;-~~=~~__
I

Off

Note: RESET will dominate all other inputTRIGGER will dominate over THRESHOLD.

ABSOLUTE MAXIMUM RATINGS

(Note 1)

Symbol

Value

Unit

Supply Voltage

Vee

18

V

Input Volage
(Trigger, Control Voltage,
Threshold and Reset)

V1N

Vee +0.3

V

Characteristic

Power

Dissip~tion

Operating Temperature Range
Storage Temperature Range

-0.3

Po

200

mW

Topr

-20- +85

°C

T5t9

-65-+150

°C

Note 1: Stresses above those listed uf,lder absolute maximum rating may cause permanent damage to the device.

c8SAMSUNG
Electronics

578

KS555

CMOS INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS
(Ta=25°C, V ee =2 to 15 Volts unless otherwise specified)

Characteristic
Supply Voltage Range

Symbol
Vee

Supply Current

Icc

Timing Error

MT

Initial Accuracy

Drift With Temperature

Drift With Supply Voltage

Test Conditions
-20°C

O'"'J

J

~

(8)

~

\1K

voo

CaNT

RESET

(7)

DISCH

KS555H
Rs

(6)
~

r--

OUT

THREE

(3)

icc

..... OUTPUT

(2) TRIG
GND

CT

1

c8SAMSUNG
Electronics

~1)
Fig. 2

584

KS555H

CMOS INTEGRATED CIRCUIT

2) MONOSTABLE
In this mode of operation, the timer functions as one shot. Initially, the external capacitor C is held discharged
by a transistor inside timer. Upon application of negative trigger pulse to pin 2, the flip flop is set which releases
the short circuit across the external capacitor and drives the output high.
The voltage across the external capacitor now increases exponentially with a time constant T = RA *C. When the
voltage across the external capacitor equals 213*Vee, the comparator resets the flip flop, which in turn discharges
the capacitor repidly and also drives the output to its state.
vee
(

:r

~

01'Fi
.~1K

~

I

(8)

voo

CONT

RESET

(7)

DISCH

KS555H

~~

~

INPUT

,..
~

OUT

THRES

(3)

') OUTPUT

I

rCLI1OO'F)
(2) TRIG
GND

J;1)
Fig. 3

c8SAMSUNG
Electronics

585

KS556

CMOS INTEGRATED CIRCUIT

14 DIP

CMOS TIMER
The KS556 is monolithic integrated circuit fabricated using C-MOS
process. Due to high impedance inputs (Trigger, Threshold, Reset), it
is capable of producing accurate time delay using less expensive,
smaller timing capacitor than NE556.
Another features are one very low power consumption and high speed
astable operation and very low voltage operation.

14 soP

FEATURES
•
•
•
•
•

Very low power consumption: 2.4mW
Very high speed operation: 2MHz
Output fully CMOS, TTL, and MOS compatible
Timing from microseconds through hours
Adjustable duty cycle

ORDERING INFORMATION

APPLICATIONS
•
•
•
•
•

Precision Timing
Pulse Generation
Sequential Timing
Time Delay Generation
Pulse Width Modulation

Device

Package

KS556N

14 DIP

KS556D

14 SOP

* * KS5561N

8 DIP

**KS5561D

8 SOP

Operation Temperature
0- + 70°C

-25 - +85°C

* * Under development

BLOCK DIAGRAM

vee

(14)

CONTROL (3.11) 0----+----------1
THRESHOLD (2.12) 0----+---------1

OUTPUT (5, 9)

GND

c8SAMSUNG
Electronics

586

KS556

CMOS INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS (Ta =25°C)
Symbol

Value

Unit

Supply Voltage

Vee

18

V

Input Voltage
(Trigger, Reset, Threshold)

VIN

-0.3- Vee

V

Lead Temperature
(Soldering 10 sec)

T lead

300

°C

Characteristic

Power Dissipation

Po

SOO

mW

Operating Temperature Range

Topr

0-+70

°C

Storage Temperature Range

T stg

-S5 - + 150

°C

ELECTRICAL CHARACTERISTICS
(Ta = 25°C, Vee = 5V, refer to application circuit unless otherwise specified)
Characteristic

Supply Voltage
Supply Current

Control Voltage

Threshold Voltage
Threshold Current
Trigger Voltage

Symbol

Test Conditions

Min

Typ

3

Vee
Icc

Vee = 15V

Vee = 15V

p,A

V

10
3.33

VTH

Vee = 15V

V

10
50

hH

pA

1.S7
VTR

Vee = 15V

VRE

Reset Current

IRE

VOL

50
IOL=5mA

0.1

IOL=8mA

0.15

Vee= 15V

IOL= 10mA

0.1

=15V

IOL=50mA

0.5

Vee

Vee = 15V

IOL= 100mA

IOH= -1mA
IOH= -2mA
VOH

Vee = 15V

IOH= -1mA
IOH= -SmA
IOH= -10mA

V

5
50

c8SAMSUNG
Electronics

V

3.33
Ve

0.7

High Level Output Voltage

18

480

hR

Low Level Output Voltage

Unit

240

Reset Voltage

Trigger Current

Max

pA
1

V
pA

V

1
4.5
4
14.8
14
12.7

V

587

•

CMOS INTEGRATED CIRCUIT

KS556

ELECTRICAL CHARACTERISTICS

(Continued)
Test Condition

Characteristic

Symbol

Initial Error of Timing Interval

TEl

Supply Voltage Sensitivity of
Timing Interval

TES

Vee =5t015V
RA= Rs= 1 to 100K
Cr =0.1J'F

Rise Time

T,

Fall Time

Tf
Fmax

Maximum Astable Oscillation

Min

Typ

Max

Unit

1

%

0.1

%N

RL= 10MO, CL= 10pF

20

nS

RL=10MO, CL=10pF

20

nS

RA = 4700, Rs = 2000
Cr=200pF

2

MHz

APPLICATION CIRCUIT
1) Astable
The circuit can be connected to trigger itself and free runs as multivibrator. The external capacitor chrages through
RA and Rs and discharges through Rs only. Thus the duty cycle may be precisely set by the ratio of these two
resistors. In this mode of operation, the capacitor charges and discharges between 1/3 Vee and 213 Vee.
As in the trigger mode, the charging and discharging times, and therefore the frequency, are essentially independently
of the supply voltage. These frequency of oscillation is given by

-\ F 11T = 1.44{(R:~2:R~{Cr-

=

Voo

o.l,.F
OPEN

T
m
(14)

CONT
(4.10)

(1.13)

Voo
RL (lK)

RESET

DISCH

KS556
(2.12)

(5.9)
OUT J...!.:-..:.!....---4-__---00UTPUT

THRES

(6.8)

TRIG
GND

{71

c8SAMSUNG
Electronics

588

KS556

CMOS INTEGRATED CIRCUIT

2) Monostable
In this mode of operation, the timer functions as one shot. Initially, the external capacitor (C) is held discharged
by a transistor inside timer. Upon application of negative trigger pulse to trigger pin the flip flop is set which releases
the short circuit across the external capacitor and drives the output high.
The voltage across the external capacitor nQw increases exponentially with time constant T RA X C. When the
voltage across the external capacitor equals 213 x Vee, the comparator resets the flip flop, which in turn discharges
the capacitor/rapidly and also drives the output to its state.
'

=

voo
(

o
OPEN

.~

13•11

"F±

J

•

(14)

voo

CONT

.~ RL (1K)

(4.10)

L-c

RESET

(1.13)
DISCH

KS556

c

1

OUT

(2.12)
'---

THRES

(5.9)

lC

-'" OUTPLUT

C'1OOpF)

(6.8)

INP UTv

TRIG
GND

~7)

qsSAMSUNG
Electronics

589

LINEAR INTEGRATED CIRCUIT

NE555C/I
TIMER

8 DIP

The NE555 series are a monolithic integrated circuit and high
stable device fongenerating'accurate time d&layor oscillation.
NE5551 is characterized for operation from - 40°C to + 85°C,
and,NE555C from O°C to 70°C.

FEATURES
•
•
•
•
•
•
•

Turn off time less than 2/-,s
Maximum operating frequency greater than 500KHz
Timing from microseconds to hours
Operates in both astable and monostable modes
High output current
Adjustable duty cycle
Temperature stability of 0.005% per °C

8 soP

APPLICATIONS
•
•
•
•
•
•

Precision timing
Time delay generation
Pulse generation
Pulse position modulation
Sequential timing
MisSing pulse detector

ORDERING INFORMATION

BLOCK DIAGRAM

Vee

Device

Package

NE5551N

8 DIP

NE5551D

8 SOP

NE555CN

8 DIP

NE555CD

8 SOP

Operating Temperature
-40- +85°C

0-+70°C

Control Voltage

R2

c8SAMSUNG
Electronics

590

LINEAR INTEGRATED CIRCUIT

NE555C/I

ABSOLUTE MAXIMUM RATINGS (Ta = 25°C)
Characteristic

Symbol

Value

Unit

Vee
T1ead
PD
Topr

16
300
600
-40- +85
0- +70
-65- + 150

V
°C
mW
°C
°C
°C

Supply Voltage
Lead Temperature (soldering 10 sec)
Power Dissipation
Operating Temperature Range NE5551
NE555C
Storage Temperature Range

T stg

ELECTRICAL CHARACTERISTICS
(Ta=25OC, Vcc=5-15V, unless otherwise specified)
Characteristic
Supply Voltage
Supply Current
"1(low stable)

Symbol

Icc

MT1

"Timing Error
(astable)
21nitial Accurary
Drift with Temperature
Drift with Supply Voltage

MT2

~ Threshold Voltage

Ve

VTH

Min

Typ

4.5

Max
16

V

3

6

mA

Vee = 15V, RL=oo

10

15

mA

RA= 1KO to
100KO
C =0.1ItF

1.0
50
0.1

3.0

%
ppm/oC
%IV

RA = 1K to
100KO
C=0.1It F

2.~5

0.5

%
ppm/oC
%IV

150
0.3

Vee = 15V

9.0

10.0

11.0

V

Vee= 5V

2.6

3.33

4.0

V

Vee=15V

10.0

V

Vee = 5V

3.33

V

"3Threshold Current

IrH

0.1

0.25

itA

Trigger Voltage

VTR

Vee = 5

1.1

1.67

2.2

V

Trigger Voltage

VTR

Vee=15V

4;5

5

5.6

V

Trigger Current

ITA

VT=OV

0.5

2.0

itA

Reset Voltage

V RE

0.7

1.0

V

Reset Current

IRE

0.1

0.4

mA

c8SAMSUNG
Electronics

I

Unit

Vee = 5V, RL =00

Vee

"Timing Error
(Monsotable)
21nitial Accurary
Drift with Temperature
Drift with Supply Voltage

Control Voltage

Test Conditions

0.4

591

LINEAR INTEGRATED CIRCUIT

NE555C/I
ELECTRICAL CHARACTERISTICS
(fa=25OC, Vcc=5-15V, unless otherwise specified)

Symbol

Characteristic

Output Voltage (low)

VOL

Test
Conditions

Typ

Max

Unit

Vee=15V
Isink =10mA
Isink = 50mA

0.1
0.4

0.25
0.75

V
V

Vee= 5V
Isink =5mA

0.25

0.35

Min

V
"

Output Voltage (high)

V OH

Vee = 15V
lsource = 200mA
lsource = 100mA

12.75

Vee=5V
lsource = 100mA

2.75

12.5
13.3

V
V

3.3

V

Rise Time of Output

Tr

100

nsec

Fall Time of Output

T,

100

nsec

Discharge Leakage Current

10

20

100

nA

Notes:
1. Supply current when output is high is typically 1mA less at Vee =5V.
2. Tested at Vee =5.0V and Vee =15V
3. This will determine the maximum value of RA +RB for 15V operation, the max total R=20MO, and for 5V operation the
max total R=6.7MO.

APPLICATION CIRCUIT
Cl

RB

RA

R3

Vee

Flip-Flop

~------------------------~3~--------------~
Output

c8SAMSUNG
Electronics

592

NE555C/I

LINEAR INTEGRATED CIRCUIT

APPLICATION NOTE
The application circuit shows astable mode.
The pin 6 (threshold) tied to the pin 2 (trigger) and pin 4 (reset) tied to Vee (pin 8).
The external capacitor C1 of pin 6 and pin 2 charges through RA, Rs and discharges through Rs only.
In the internal circuit of the :NE555 1 one input of upper comparator is the 213 Vcc (*R1 =R2=R3), another input of it connected pin 6.
As soon as charging C1 is higher than 213 Vcc, discharge transistor 0; turn on and C1discharges to collector of transistor 01.
Therefore flip-flop circuit is reset and output is low.
One input of. lower comparator is the 1/3 Vee, discharge transistor 0 1 turn off and C 1 j::harges through RA and Rs.
Therefore flip-flop circuit is set and output is high.
So to say, when C 1 charges through RA and Rs output is high and when C1 discharges through Rb output is low
The charge time (output is high) T1 is 0.693 (RA +Rs) C 1 and the discharge time (output is low) T2 is 0.693 (Rs C1).
(In Vcc-1/3Vee 0.693)
V ec-2/3Vcc

I

Thus the total period time T is given by
T=T1+T2=0.693 (R A+2Rs).C 1.
Then the frequency of astable mode is given by

f=~=

1.44

T

(RA + 2Rs) C 1

The duty cycle is given by
D.C=

T2=~
T

RA+2Rs

If you make use of the NE556 you can make two astable mode.
If you want another application note, request information on our timer IC application circuit designer.

c8SAMSUNG
Electronics

593

LINEAR INTEGRATED CIRCUIT

NE556C/I
DUAL TIMER

The NE556 series dual monolithic timing circuits are a highly stable
controller capable of producing accurate time delays or oscillation.

14 DIP

The NE556 is a dual NE555. Timing is provided an external resistor
and capacitor for each timing function.
The two timers operate independently of each other, sharing only Vee
and ground.
The circuits may be triggered and reset on falling waveforms. The output
structures may sink or source 200mA.
NE5561 is characterized for operation from - 40°C to + 85°C, and
NE556C from O°C to 70°C.

14 soP

FEATURES
•
•
•
•
•
•
•
•

Direct replacement for NE556
Replaces two NE555 timers
Operates in both astable and monostable modes
High output current
TTL compatible
Timing from microsecond to hours
Adjustable duty cycle
Temperature stability of 0.005% per °C

ORDERING INFORMATION

APPLICATIONS
•
•
•
•
•

Precision timing
Pulse shaping
Pulse width modulation
Frequency division
Traffic light control

•
•
•
•
•

Sequential timing
Pulse generator
Time delay generatbr
Touch tone encoder
Tone burst generator

BLOCK DIAGRAM

c8SAMSUNG
Electronics

Device

Package

NE5561N

14 DIP

NE5561D

14 SOP

NE556CN

14 DIP

NE556CD

14 SOP

Operating Temperature
-40- +85°C

0-+ 70°C

594

LINEAR INTEGRATED CIRCUIT

NE556C/I

ABSOLUTE MAXIMUM RATINGS (Ta=25°C)
Characteristic

Symbol

Value

Unit

Vee
T1ead
PD
Topr

16
300
600
-40 - +85
0-+70
-65 -+150

V
°C
mW
°C
°C
°C

Supply VoltaQe
Lead Temperature (soldering 10 sec)
Power Dissipation
Operating Temperature Range NE5561
NE556C
Storage Temperature Range

Ts1g

ELECTRICAL CHARACTERISTICS
(Vee = +5V to + 15V, unless otherwise specified)
Characteristic

Supply Voltage
*1 Supply Current (Two timers)
(low state)
*2 Timing Error (monostable)
Initial Accuracy
Drift with Temperature
Drift with Supply Voltage
Control Voltage

Threshold Voltage

Symbol

Icc
MTt;

Ve

VTH

VTR

Trigger Current

ITR

*5 Reset Voltage

VRE

Electronics

Max

Unit

16

V

5
16

12
30

mA
mA

0.75
50
0.1

.%
ppm/oC

%N

Vec=15V

9.0

10.0

11.0

V

Vee=5V

2.6

3.33

4.0

V

Vec=15V

10.0

Vcc=5V

3.33

V
V

30

250

nA
V

Vcc=15V

4.5

5.0

5.6

Vcc=5V

1.1

1.67

2.2

V

0.5

2.0

p.A

0.7

1.0

V

0.1

0.6

mA

0.1
0.4
2.0
2.5

0.25
0.75
3.2

V
V
V
V

( .3

V
V

VT=OV
0.4

IRE

VOL

Typ

RA =2KO to 100KO
T= 1.1Re

Trigger Voltage

c8SAMSUNG

Vee =5V, RL = 00
Vee =15V, RL=oo

C=0.1tF

hH

Output Voltage Low

Min

4.5

Vee

*3 Threshold Current

Reset Current

Test Conditions

Vec=15V
Isink =10mA
Isink =50mA
Isink =100mA
ISink =200mA
Vcc=5V
Isink =8mA
Isink =5mA

0.25
0.15

0.25

595

I

NE556C/I

LINEAR INTEGRATED CIRCUIT

ELECTRICAL CHARACTERISTICS
(Vec=+5V to +15V, unless otherwise specified)

Characteristic

Output Voltage (high)

Rise Time of Output

Symbol

VOH

Min

Typ

Vee=15V
lsource =200mA
lsource =100mA

12.75

12.5
13.3

Vee=5V
l source = 100mA

2.75

Test Conditions

nsec

100

300

nsec

20

100

nA

1.0
10
0.2

2.0

%
ppm/oC

0.5

%N'

Fall Time of Output

Tf

Discharge Leakage Current

10
MeH

MT2

RA, Rs =1kO to 100kO
C=0.1,.F
Vee=15V

V
300

100

*2 Timing Error (astable)
Initial Accuracy
Drift with Temperature
Drift with Supply Voltage

Unit

V
V

3.3

Tr

*4 Matching Characteristics
Initial Accuracy
Drift with Temperature
Drift with Supply Voltage

Max

2.25
150
0.3

%
ppm/oC

%N

Notes:
* 1. Supply current when output is high is typically 1.0mA less at Vee =5V.

*2. Tested at Vee =5V and Vee =15V
*3. This will determine the maximum value of RA +Rs for 15V operation.
The maximum total R=20MO, and for 5Voperation the maximum total R=6.6MO.
* 4. Matching characteristic refer to the difference between performance characteristics of each timer section in the monostable
mode.
*5. As reset voltage lowers, timing is inhibited and then the output goes low.

c8SAMSUNG
Electronics

596

LINEAR INTEGRATED CIRCUIT

NE558C/I
QUAD TIMER

16 DIP

The NE558 series are a monolithic Quad Timers which
can be used to produce four entirely independent timing
functions. These highly stable, general purpose
controllers can be used in a monostable mode to
produce accurate time delays, from microseconds to
hours. The time is precisely controlled by one external
resistor and one capacitor in the time delay mode. A
stable mode can be operated by using two of four timer
sections.
NE55al is characterized for operation from - 4a o C
to+85°C, and NE558C from O°C to 70°C.

16 SOP

FEATURES
•
•
•
•
•

Wide supply voltage range: 4.SV to 16V
100mA output current per section
Edge triggered without coupling capacitor
Time period equals RC
Output independent of trigger conditions.

ORDERING INFORMATION

APPLICATIONS
•
•
•
•

I

Quad one·shot
Sequential timing
Precision timing
Time delay generation

Device

Package

NE5581N

14 DIP

NE558CN

14 DIP

NE558CD

14 SOP

Operating Temperature

-40 - +85°C
a -+ 7a o c

BLOCK DIAGRAM

OUTPUT D

TIMING D

TRIGGER D

RESET

GROUND

OUTPUT A

TIMING A

TRIGGER A

CONTROL
VOLTAGE

Vee

c8SAMSUNG
Electronics

TRIGGER C

TRIGGER B

TIMING C

OUTPUT C

TIMING B

OUTPUT B

597

NE558C/I

LINEAR INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS (Ta = 25°C)
Characteristic
Supply Voltage
Lead Temperature (soldering 10 sec)
Power Dissipation
Operating Temperature Range NE5561
NE556C
Storage Temperature Range

Symbol

Value

Unit

Vee
T1ead
Po
Topr

: 1{)
300
600
-40-+85
0 -70
-65-+150

V
°C
mW
°C
°C
°C

Ts\g

ELECTRICAL CHARACTERISTICS
(Vee = 5V -15V, Ta= 25°C unless otherwise specified)

Characteristic

Test Conditions

Symbol

Supply Voltage

Vee

Supply Current

lee

Vee = 15V, reset voltage = 15V

Mr

R = 2KO to 100KO, C = 110tF

Min

Max
16

V

16

36

mA

±2

5

%

30

150

PPM/oC

0.1

0.9

%IV

4.5

Timing Error (T = RC)·
Initial Accuracy
Drift with Temperature

Typ

Orift with Supply Voltage

Unit

1.5

2.4

V

5.0

100

iotA

1

Trigger Voltage

VrR

Vee = 15V

1

Trigger Current

IrR

Trigger voltage = OV

2Reset Voltage

VRE

Reset

2Reset Current

IRE

Reset

Threshold Voltage

VrH

0.63 x Vee

V

Threshold Current

ITL

15

nA

30utput Voltage

Your

0.8

0.8

1.5

2.4

V

50

500

iotA

IL= 10mA

0.1

0.4

IL= 100mA

1.0

2.0
500

Output Leakage Current

IOL

10

Propagation Delay Time

Tp

1.0

V
nA
lotS

Rise Time

Tr

IL= 100mA

100

nS

Fall Time

Tf

k= 100mA

100

nS

NOTES: 1. The trigger functions only on the falling edge of the trigger pulse only after previously being high. After
reset the trigger must be brought high and then low to implement triggering.
2. For reset below 0.8V, outputs set low and trigger inhibited.
3. Output structure is open collector which requires a pull up resistor to Vee to sink current.
The output is nom ally low sinking current.

c8SAMSUNG
Electronics

598

NE558C/I

LINEAR INTEGRATED CIRCUIT

APPLICATIONS
Fig. 1 Long.Time Delay

Fig. 2 Timing Chart
TRIGGER"lJ
OUTPUT

~~L-_ _ _ _ _ __

:~::~:;J--r'l-~
~--1""'TO-U-TP-UT""FOUTPUT~
TOElAY: 3(R1C)
TOUT: R2 C 2

I

Fig. 3 Ring Counter

START
RESET~--~~------~~----~~--~=

10K

Fig. 4 Timing Chart

START

RESET

c8SAMSUNG
Electronics

L

599

NOTES

Device
KA33V
KA331
KA2580A
KA2588A
KA2651
KA2655/6/7/8/9
KA2803
KA2804
KA2807
LH386/SID

Function
Silicon Monolithic Bipolar Integrated Circuit
Voltage Stabilizer for Electronic Tuner
Precision Voltage-to-Frequency Converter
8-Channel Source Drives
8-Channel Source Drives
Fluorescent Display Drivers
High Voltage High Current Darlington Arrays
Low Power Consumption Earth Leakage Detector
Zero Voltage Switch
Earth Leakage Detector
Low Voltage Audio Power Amplifier

Package

Page

TO-92

603

8 DIP/8 SOP
18 DIP
20 DIP
18 DIP
16 DIP/16 SOP
8 DIP
8 DIP
8 DIP/8 SOP
8 DIP/8 SOP/9 SIP

607
611
611
616
619
624
627
630
634

I

LINEAR INTEGRATED CIRCUIT

KA33V

SILICON MONOLITHIC BIPOLAR INTEGRATED
CIRCUIT VOLTAGE STABILIZAER FOR
ELECTRONIC TUNER

10·92

The KA33V is a monolithic integrated voltage stabilizer especially
designed as voltage supplier for electronic tuners.

FEATURES
• Low Temperature Coefficient
• Low Dynamic Resistance
• Typical Reference Voltage of 33V

ABSOLUTE MAXIMUM RATINGS (Ta =25°C)
Characteristic

Symbol

Value

Unit

10
200

mA
mW

Topr

-20-75

°C

Tstg

-40-125.

°C

1: Anode 2: Cathode

Zener Current
Power Dissipation (Ta = 75°C)
Operating Ambient TemperatureRange
Storage Temperature Range

Iz
Po

•

ELECTRICAL CHARACTERISTICS (Ta =25°C)
Characteristic

Symbol

Stabilized Voltage
Stabilized Voltage·iemperature Drift

Vz
6Vz/6T

Dynamic Resistance

rz

Test Conditions

Iz=5mA
Iz=5mA
Ta = -20 to 75°C
Iz =5mA, f=1KHz

Min

Typ

Max

Unit

31
-1

0

35
1

V
mV/oC

10

25

SCHEMATIC DIAGRAM

, - - - -___----___._-------_----0. 2

Cathode

L - - - - - - - - - ' - - - - - . l - - - - - - - O 1 Anode

qsSAMSUNG
Electronics

603

KA33V

LINEAR INTEGRATED CIRCUIT

MEASURING CIRCUITS
Fig. 1 Measuring-Circuit for Stabilized Voltage Vz
---IZ=SmA

A

V

KA33V

VoltMeter

Fig. 2 Measuring Circuit for Dynamic Resistance
lz
_--IAC=10

IZ--

SOI'F

100

Fig. 3

c
0.1~

Iz
VV,

'""'-'

f=1KHz

EB
Vz

O.SmA

VV,
rz= O.5mA

1 - - - 1 - - 4 - - - - 4 SmA

Iz

VV1

c8SAMSUNG
Electronics

604

KA33V

LINEAR INTEGRATED CIRCUIT

TYPICAL APPLICATION
Ach

Ych

Bch

Zch

Ri

C
Channel
setting
variable
resistor

Vi

• to tuning diodes (varactor) in case of Ych on

(1) UHF TUNER

•

TR1

-(
Antenna

TR1: RF AMP: KSC1393
KSC1070 (Under development)
TR2: OSC: KSC1730
01-04: 1S220 05: MIXER: lSS16

~AFC
terminal

(2) VHF TUNER

-<
TR3

TR2

TR1: RM AMP: KSC1393
TR2: MIXER : KSC1394
TR3: OSC
: KSCl730
01, 04: lS2209
02, 03: 1S2207

c8SAMSUNG
Electronics

~

0

AFC terminal
Low/High Channel
Switching terminal.

605

KA33V

LINEAR INTEGRATED CIRCUIT

POWER-TEMPERATURE DERATING CURVE

TYPICAL CHARACTERISTIC CURVES (Ta=2S0C)
Fig. 8 DYNAMIC RESISTANCE vs.
ZENER CURRENT

Fig. 7 ALLOWABLE DISSIPATION vs.
AMBIENT TEMPERATURE
80

I

60

~

1

FR1AIR

I

I~

I

z

0

iiii

300

III

Q

w

iii

~c

200

I

~
I!

~

T.-+25OC

1",,-40--

\

c

'"

~

9

10

I

6

~
t!

~ 100

4

-20

75

25
50
AMBIENT TEMPERATURE (OCI

+4

I

+3

~

-

r---

4
6
ZENER CURRENT (mAl

10

Fig. 10 STABILIZED VOLTAGE VARIATION
vs. TIME

Fig. 9 STABILIZED VOLTAGE TEMPERATURE
DRIFT vs. ZENER CURRENT
o
~

-

I-1KHz

~

20

!!l

I

€c

\

40

400

FREE AlA
Iz-5mA
_
Vz-33.11V

I! +2

~
!

E
{!

j
...

+1
0

'-.... t-I

~

-1

:s!

-2

i1l

-3

i

~

-4

!

I

 VOUT

Fig. 3 Light Intesity to Frequency Converter

+5V TO 15V

LIGHT
INPUT

\~

c8~SUNG

3.3K
t---f---"'~- FOUT

100KHz FULL SCALE

610

KA2580AlKA2588A

LINEAR INTEGRATED CIRCUIT

18 DIP

8-CHANNEL SOURCE DRIVERS
These integrated circuits, rated for operation with output voltages of up
to 50V and designed to link NMOS logic with high-current inductive loads,
will work with many combinations of logic-and load-voltage levels, meeting interfac~ requirements beyond the capabilities of standard logic
buffers.
KA2580A is a high current source driver used to switch the ground ends
of loads that are directly connected to a negative supply. Typical loads
are telephone relays, PIN diodes, and LEOs.
KA2588A is a high-current source driver similar to KA2580A, has separated logic and driver supply lines. Its eight drivers can serve as an interface between positive logic (TTL, CMOS, MOS) or negative logic
(NMOS) and either negative or split-load supplies.

20 DIP

KA2580A is furnished in 18-pin dual in-line plastic package; KA2588A
is supplied in a 20-pin dual in-line plastic package. All input connections
are on one side of the packages, output pins on the other, to simplify
printed wiring board layout.

ORDERING INFORMATION

FEATURES
•
•
•
•

TTL, CMOS, PMOS, NMOS Compatible
High Output Current Ratings
Internal Transient Suppression
Efficient Input/Output Pin Structure

Device

Package

KA2580AN

18 DIP

KA2588AN

20 DIP

Operating Temperature
-20 -

+85°C

SCHEMATIC DIAGRAM

KA2580A

'=8SAMSUNG
Electronics

KA2588A

611

I

LINEAR INTEGRATED CIRCUIT

KA2580AlKA2588A
ABSOLUTE MAXIMUM RATINGS
(Ta =25DC, for Any One Driver unless otherwise noted)
Characteristic
Output Voltage
Supply Voltage (ref, sub)
Supply Voltage (ref, sub, KA2588A)
Input Voltage (ref, Vs)
Total Current
Substrate Current
Power Dissipation (single output)
(total Package)*
Operating Temperature
Storage Temperature

Symbol

value

Unit

Vee
Vs
Vee
VIN
lee+ls
ISUB
Pd

50
50
50
-30
-500
3.0
1.0
2.2
-20-+85
-65- +150

V
V
V
V
mA
A
W
W
DC
DC

Ta
Tstg

* Derate at the rate of 18mWfOC above 25DC

TYPICAL OPERATING VOLTAGE
Vs

V IN (on)

Vee

Vee(max)

OV

NA

-50V

VIN (off)

DVCType

OV

-15V- -3.6V

+5V

OV- +1.4V

+4.5V- +5V

NA
S5V

-45V
-45V

KA2580A
-KA2580A
KA2588A

+12V

OV- +8.4V

+ 11.5V - + 12V

NA
s12V

-38V
-38V

KA2580A
KA2588A

+15V

OV- + 11.4V

+14.5V- +15V

NA
s15V

-35V
-35V

KA2580A
KA2588A

-0.5V-

Notes
1) For simplication, these devices are characterized to the above with specific voltages for inputs, logic supply (Vs), load
supply (Vee), and collector supply (Vee).
2) Typical use of the KA2580A is with negative referenced logic. The more common application of the KA2588A is with positive
referenced logic supplies.
3) In application, the devices are capable of operation over a wide range of logic and supply voltage levels.
4) The substrate must be tied to the most negative point in the external circuit to maintain isolation drivers and to provide
for normal circuit operation.

c8SAMSUNG
Electronics

,

612

KA2580AlKA2588A

LINEAR INTEGRATED CIRCUIT

PARTIAL SCHEMATIC (KA2580A)

10K

L---~>---o

OUT

SUBNEE

+Vs

SUB

ELECTRICAL CHARACTERISTICS (KA2580A)
(Ta=25°C, Vs=ov, V EE =-45V unless otherwise noted)

Characteristic

Output Leakage Current

Symbol

,
cEx

Output Sustaining Voltage
(Note 1, 2)

VCE (sus)

Output Saturation Voltage

VCE (sat)

Input Current

liN (on)

liN (off)

Input Voltage
(Note 4)

VIN(an)

VIN (off)

Max

Unit

V ln =-0.5V,
VOUT=VEE=-50V

50

,.,.A

V IN = -O.4V,
V OUT = VEE = -50V
Ta= 70°C

100

p.A

Test Conditions

V IN =-0.4v, IOUT=-25mA

Min

V

35

VIN =-2.4V, IOUT=-100mA

1.8

VIN=-3.0V,loUT=-225mA

1.9

V

VIN=-3.6V,loUT=-350mA

2.0

V

VIN=-3.6V,loUT=-350mA

-SOO

p.A

VIN = -1SV, lOUT = -350mA

-2.1

rnA

louT == - SOo,.,.A, Ta= 70°C
(Note 3)

V

p.A

-SO

louT = -100mA, VCE S 1.8V

-2.4

V

'ouT=-22SmA, VcE s1.9V

-3.0

V

louT=-350mA, VCEs2.0V

-3.6

V

'ouT==-'-SOOp.A, T a=70°C

•

-0.2

V

p.A

Clamp Diode Leakage Current

JR

VR =50V, Ta=70DC

SO

Clamp Diode Forward Voltage

Vf

If=350mA

2.0

V

Input Capacitance

C IN

25

pF

Turn-On Delay

t PHL

O.S VIN to O.S V OUT

S.O

,.,.S

Turn-Off Delay

tpLH

0.5 VIN to 0.5 V OUT

5.0

,.,.S

Notes
1)
2)
3)
4)
5)

Pulsed test, tp S 300uS, duty cycle S 2%.
Negative current is defined as coming out of specified device pin.
The lin (off) current limit guarantees against partial turn-on of the output.
The Yin (on) voltage limit guarantees a minimum output source per the specified conditions.
The substrate must always be tied to the most negative point and must be at least 4.0V below Vs.

c8SAMSUNG
Electronics

613

KA2580AlKA2588A

LINEAR INTEGRATED CIRCUIT

PARTIAL SCHEMATIC (KA2588A)
+vs

Vee

7.2K
10K

-+--4

L..-_ _

OUT

SUB

ELECTRICAL CHARACTERISTICS (KA2588A)
(Ta = 25°C, Vs =Vcc =5.0V, VEE = -40V unless otherwise noted)
Characteristic

Symbol

Test Conditions

Min

VIN~4.5V, VOUT=VEE=-45V

Output Leakage Current

IcEx

VIN~4.6V, VOUT=VEE=-45V

T a =70oC
Output Sustaining Voltage
(Note 1, 2)

Output Saturation Voltage

Input Current

VCE (sus)

VCE (sat)

liN (on)

liN (off)

Input Voltage (Note 4)

VIN (on)

VIN~4.6V,

louT=-25mA

Unit

50

pA

100

pA

35

V

VIN =2.6V, louT=-100mA
Ref. Vcc

1.8

V

VIN = 2.0V, louT = - 225mA
Ref. Vce

1.9

V

VIN =1.4V, louT = -350mA
Ref. Vee

2.0

V

VIN=1.4V,loUT=-350mA

-500

pA

V s =15V, VEE =-30V,
VIN =OV, louT=-350mA

-2.1

mA

louT=-500pA, Ta=70oC
(Note 3)

pA

-50

louT= -100mA, VeE~ 1.8V

2.6

louT=-225mA, VeE~1.9V

2.0

V

VeE~2.0V

1.4

V

pA

IOUT=-350mA,
VIN (off)

Max

louT=-500pA, TA =70°C

4.8

V

V

IR

VR=50V, Ta=700C

50

Clamp Diode Forward Voltage

Vf

If=350mA

2.0

V

Input capaCitance

CIN

25

pF

Clamp Diode Leakage Current

Turn-On Delay

tpHL

0.5 VIN to 0.5 Vout

5.0

p.S

Turn-Off Delay

tpLH

0.5 VIN to 0.5 Vout

5.0

p.S

Notes
1)
2)
3)
4)
5)
6)

Pulsed test, tp~300uS, duty cycle~2%.
Negative current is defined as coming out of specified device pin.
The lin (off) current limit guarantees against partial turn-on of the output.
The Yin (on) yoltage limit guarantees a minimum output source per the specified conditions.
The substrate must always be tied to the most negative point and must be at least 4.0V below Vs.
Vec must never be more positive than Vs.

c8SAMSUNG
Electronics

614

KA2580Al2588A

LINEAR INTEGRATED CIRCUIT
/

TYPICAL APPLICATIONS
+12V

KA2588A

KA2588A

111

Vacuum Fluorescent Display Driver (Split Supply)

Telecommunicaiton Relay Driver (Positive Logic)

KA2580A

Telecommunication Relay Driver (Negative Logic)

c8SAMSUNG
Electronics

615

I

KA2651

LINEAR INTEGRATED CIRCUIT

FLUORESCENT DISPLAY DRIVERS
Consisting of eight NPN Darlington output stages and the associated common-emitter input stages, these drivers are designed to interface between low-level digital logic and vacuum fluorescent displays.
KA2651 is capable of driving the digits and/or segments of these displays and is designed to permit all outputs to be activated simultaneously. Pull-down resistors are incorporated into each output and no external components are required for most fluorescent display applications.

18 DIP

FEATURES
•
•
•
•
•

Digit or Segment Drivers
low Input Current
Internal Output Pull-Down Resistors
High Output Breakdown Voltage
Single or Split Supply Operation

ORDERING INFORMATION
Operating Temperature

BLOCK DIAGRAM

c8SAMSUNG
ElectroniCs
...

616

KA2651

LINEAR INTEGRATED CIRCUIT

ABSOLUTE MAXIMUM RATINGS
(Ta::: 25°C, Voltages are with reference to ground unless otherwise noted)
Characteristic

Symbol

Value

Unit

Supply Voltage
Input Voltage
Output Current
Operating Temperature
Storage Temperature

Vee
VIN
lout
Ta
T stg

65
20
-40
-20 . +85
-55 + 150

V
V
rnA
°C
°C

RECOMMENDED OPERATING CONDITIONS
Characteristic

Symbol

Value

Unit

Supply Voltage

Vee

5.0-50

V

Input ON Voltage

VIN

2.4-15

Output ON Current*

loutON

V

-25

I

rnA

* Positive (negative) current is defined as going into (coming out of) the specified device pin.

ELECTRICAL CHARACTERISTICS
(Ta::: 25°C, Vee::: 60V, unless otherwise noted.)

Characteristic
. Output Leakage Current

Symbol

Test Conditions

Min

Typ

Max

Unit

louTLK

VIN=0.4V

15

/LA

VOUTOFF

VIN =O.4V

1.0

V

Output Pull-Down Current

IOUTPD

Input Open, VOUT ::: Vee

350

550

775

/LA

Output ON Voltage

VOUTON

VIN ::: 2.4V louT= - 25m A

57

58

/LA

Output OFF Voltage

Input ON Current

Supply Current

liN

Icc

c8SAMSUNG
Electronics

V

VIN=2.4V

120

225

VIN :::5.0V

450

650

/LA

All Inputs Open

10

100

/LA

All Inputs::: 2.4V

5.5

8.0

rnA

617

LINEAR INTEGRATED CIRCUIT

KA2651
PARTIAL SCHEMATIC

r------.-----r---Q Vee
30K

10K

IN PUT O------J.w.t-----,--r---i

L---+--o OUTPUT

125K

GND~--~~~~-------~

(One Driver)

TYPICAL MULTIPLEXED FLUORESCENT DISPLAY
Vee
SEGMENT SELECT

-------IP~ 10l
DIGIT SELECT
KA2651

'- - - -t- - - ~ : ~: :=:=: cJj

J

rTJ

---- ---------------10l-----------r1--+-+--0Vo
RL

1

>-----~~~,-H--~~vo

I
I

..L 0.051<

RL

I

10

1K
f=1KHz

Fig. 7

Fig. 6
AM Radio Power Amplifier

811
SPEAKER

Fig. 8

c8SAMSUNG
Electronics

636

LINEAR INTEGRATED CIRCUIT

LM386/S/D
TOTAL HARMONIC DISTORTION-OUTPUT POWER
10

TOTAL HARMONIC DISTORTION-FREQUENCY
2b

III

1.8

Vcc=fN

I

Vee-fN
RL-8Il

RL=81l
I - - f=lKHz

~ 1.6 I--- Po-12SIllW

I

~

Av -26dB

(e,. -0)

1.4

/

is

U 1.2

7

i

~

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~

II

~

... 0.8

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...:: 0.8

1

!
Q
i!:

-

0.001

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0.1

0.01

i"--.

0.2

)

)

I

20

-r--

SO

100

[7

V

"""'-

200

500

lK

2K

SK

10K 20K

Po (W). OUTPUT POWER

f (Hz). FREQUENCY

VOLTAGE GAIN-FREQUENCY

QUIESCENT CIRCUIT CURRENT-8UPPLY VOLTAGE

60

. i rm

111.IJI~l

so

, li ll

I

I

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I
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e .. =o

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I

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I

10

I

o
100

lK

i

I

I

10K

I

1

4

1M

lOOK

10

11

12

Vee (V). SUPPLY VOLTAGE

f (Hz). FREQUENCY

OUTPUT VOLTAGE SWING-SUPPLY VOLTAGE

FREQUENCY RESPONSE WITH BASS BOOST

261------i-----+.

r

.

251---~
~

24 f---F----t

I

w 23

~ ~

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--f--

--

---+--

I

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I

i

~--~-~--~--~--+---~~--~

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~ =-+L__ i--i-t- r"~
o

20

10

11

12

19

!

i

I

181--

il

I

I

17L-~__~__-L__~__L-~1

20

50

100

200

SOO

1K

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2K

5K

10K 20K

Vee (V). SUPPLY VOLTAGE
f (Hzl. FREQUENCY

c8SAMSUNG
Electronics

637

NOTES

.1

I

PACKAGE DIMENSIONS

Unit: mm

TO·92
~

~

458

(KA33V Only)

4.33
4.83
/

Unit: mm

TO·92

,

I

,,

~

\

I

I

I

4.33
4.83

-----

J

14.58

--------

I

1

2

ill

6.98[ --~
7.49

13.97
14.97

2.16

14.5

II

0. 36----J 1

Ji

0.56
I,
1.27 TYP--!I---+--_ _=2.5-=-4
I
TYP
1.02

3.46~1i.02 TYP
3.96
1

3.56

I

1.80
TYP

3.35
3.85

1. Anode

TO·220

Unit: mm

I

2. Cathode

Unit: mm

TO·3P

(/)3.61

TYP~~

II

6.12
6.62
8.94
9.44

-

1.40

-~

15.55

4.55
1.95
2.20

(/)3.20
TYP

3.12

o

20.25

113.97
~4.23

2.08
2.33

r
I

12.72

3.27
3.53

13.48

0.45
0.55

c8SAMSUNG
Electronics

37.66
38.68

o

0.55
0.71

641

PACKAGE DIMENSIONS

9 SIP

Unit: mm

10 SIP HIS

Unit: mm

21.59
22.10

rm~·58
S 09

lI
2.54
TYP

I l-- ~I 0.45
0.71

--J/

.

0.20
0.30

tr======~)12.75

25.15
25.65

.~3.25

8 DIP

Unit: mm

8 SOP

Unit: mm

0-10°

I

9.45
895

I

~].09
~6.60
~/

1.02
1.52

9

0.41
0.79

~37
7.87

0.20
0.30

G!;b
II

1.27

TYP

c8SAMSUNG
Electronics

,

,

i

i

0.36
051

-lLM
/I

0.20

1.47
1.73

642

PACKAGE DIMENSIONS

14 DIP

Unit: mm

14 SOP

Unit: mm

~~.

0.20

CJt

4.37
l1.62

o

~I

~1!:~~
2.54
TYP

II ~

-1~
0.36

Unit: mm

0-10

1[::::]]:: lDl
I

19.15
19.65

0.79 6.10
6.60

QW

1.27
TYP

0.51
1.02

16 DIP

I

m

~
I

~'.47
"
1.73

2.92
3.43

0.56

0.36
0.51

I I
~

I
Unit: mm

16 SOP

0

~

7.37
7.87
~

-

~f-1.52

~
0.30

3.81

~r4.31
2.54
TYP

I Ir--

I
---j

0.36
0.56

=t

2.92
"3.43
0.51
1.02

c8SAMSUNG
Electronics

~I-i
10)1

1.47
: :- 1.73

1.27
TYP

I

643

PACKAGE DIMENSIONS

Unit: mm

18 DIP

22.73
23.24

0-10

22 DIP (300)

Unit: mm

22 DIP (Shrink)

Unit: mm

0

It:::::: :~IIJ:~WF,
I

102
1:52

IIf---

0.20
0.30

W\f\Fffffl1

-----L

.

.-L

I

t

~
~ --H--~
TYP
0.56

¥

3.81
4.31

~·92

3.43

22 DIP (400)

0.51
1.02

Unit: mm

27.23
·27.14

8'89~O_10·9.90
9.40'

10.41
0.20
0.30

D
~~:~~

o

2.54

1.40

1.65

JI

0.33

2.90

0.58

3.91

c8SAMSUNG
Electronics

6.15
7.37
6.65 _ 7 . 8 7
0.20

T

~
3.51
4.27

4.57
5.33

TYP

ti°-100

~ f--0.76
TYP

1.02

2.82
3.84

644

PACKAGE DIMENSIONS

20 DIP

Unit: mm

I

0

I

26.36
26.87

Unit: mm

24 DIP

0 -10

J

Ib :0: ::::: ~ JI]:~ O[ID~
II

------l

1.02
1.52

~2.92
-

2.54 ~
TYP

~

1

~I 0.36

0.56

3.81
4.31

3.43
0.51
1.02

I

Unit: mm

40 DIP

I'

r .

0.2Q
0.30

I'

52.19
52.70

[~::::::::::~] ]~:~~
II ,1.02

111:52

52.19

0

0-10

1-

rll!t
~~~~

~
0.30

Unit: mm

42 DIP

~~52.70~1
o

0

0 -10

0

ffi]~
h3.61 -.

~4.12
lI.m:n:rnt:i'i:rErEfEfEi'i
0.20
1.0Ei"E
2 fEi'fi'EjIIFrrEfEi~
1.52
0.30

14.99
15.49

kf

2.92
3.43 0.51
1.02

qsSAMSUNG
Electronics

645

PACKAGE DIMENSIONS

Unit: mm

16 CERDIP

~n~:;O.38

mMfW-llt~x
·

t

_

2.54~ L~~

TYP

0.58

I

18
4.19

~

-j

1.02

24 CERDIP

Unit: mm

20 CERDIP

TYP ----j

0.58

0.89

Unit mm

I_~~~~

~5'

C::::::)Jm ~U!Y
~~
1.52

0.20
0.38

7

~~
TYP

0.58

c8.SAMSUNG
Electronics

646

SAMSUNG SEMICONDUCTOR SALES OFFICES - U.S.A.
ILLINOIS

CALIFORNIA
22837 Ventura Blvd.
Suite 305
Woodland Hills, CA
91367
(818) 346-6416
FAX: (818) 346-6621

2700 Augustine Drive
Suite 198
Santa Clara, CA 95054
(408) 727-7433
FAX: (408) 727-5071

901 Warrenville Road
Suite 120
Lisle, IL 60532-1359
(312) 852-2011
FAX:(312) 852-3096

TEXAS

MASSACHUSETTS
20 Burlington Mall Road
Suite 205
Burlington, MA 01803
(617) 273-4888
FAX:(617)273-9363

15851 Dallas Parkway
Suite 745
Dallas, TX 75248-3307
(214) 239-0754
FAX:(214) 392-4624

SAMSUNG SEMICONDUCTOR REPRESENTATIVES
U.S.A. and CANADA
ARIZONA
HAAS & ASSOC. INC.
77441 East Butherus Drive
Suite 300
Scottsdale,AZ 85260

COLORADO
TEL: (602) 998-7195
FAX: (602) 998-7869

CANDAlINC.
7500 West Mississippi Ave.
Suite A-2
Lakewood, CO 80226

TEL: (303) 935-7128
FAX: (303) 935-7310

CONNECTICUT
CALIFORNIA
QUEST REP INC.
9444 Farnham St.
Suite 107
San Diego,CA 92123

TEL: (619) 565-8797
FAX: (619) 565-8990

SYNPAC
3945 Freedom Cirde
Suite 650
Santa Clara,CA 95054

TEL: (408) 988-6988
FAX: (408) 988-5041

WESTAR REP COMPANY
2472 Chambers Road
Suite 100
Tustin, CA 92680

TEL:(714) 832-3325
FAX: (714) 832-7894

WESTAR REP COMPANY
25202 Crenshaw Blvd.
Suite 217
Torrance, CA 90505

TEL: (213) 539-2156
FAX: (213) 539-2564

PHOENIX SALES
257 Main Street
Torrington,CT 06790

TEL: (203) 496-7709
FAX: (203) 496-0912

FLORIDA
MEC
700 W. Hillsboro Blvd.
Bldg. 4, Suite 204
Deerfield Beach, FL 33441

TEL: (305) 426-8944
FAX: (305) 426-8799

MEC
511 Carriage Road
Indian Harbour Beach, FL 32937

TEL: (407) 332-7158
(407) 773-1100
FAX: (407) 830-5436

MEC
830 North Atlantic Blvd.
Suite 9401
Cocoa Beach, FL 32931

TEL: (407) 799-0820
FAX: (407) 799-0923

MEC
1001 45th, N.E.
St. Petersburg, FL 33703

TEL: (813) 522-3433
FAX: (813) 522-3993

CANADA
TERRIER ElEC.
145 The West Mall
Etobicoke, Ontario, Canada
M9C lC2

TEL: (416) 622-7558
FAX: (416) 626-1035

TERRIER ElEC.
~700 Gilmore Way, 106A
Burnaby, B.C., Canada
V5G 4Ml

TEL: (604) 433-0159
FAX: (604) 430-0144

TERRIER ElEC.
6600 Transcanadienne
Suite 750-17
Pointe Claire, Quebec, Canada
H9R 452

ILLINOIS
IRI
8430 Gross Point Road
Sj(okie,IL 60076

TEL: (312) 967-8430
FAX: (312) 967-5903

INDIANA
STB & ASSOC. INC.
3003 E. 96th st.
Suite102
Indianapolis,lN 46240

TEL: (317) 844-9227
FAX: (317) 844-1904

MARYLAND
TEL: (514) 695-4421
FAX: (514) 695-3295

c8SAMSUNG
Electronics

ADVANCED TECH SALES
809 Hammonds Ferry Rd.
Suite D
Linthicum,MD 21090

TEL: (301) 789-9360
FAX: (301) 789-9364

649

I

MASSACHUSETTS
NEW TECH SOLUTIONS, INC.
111 South Bedford Street
Suite 102
Burlington, MA 01803

OREGON
TEL: (617) 229-8888
FAX: (617) 229-1614

MICHIGAN
JENSEN C.B.
2145 Crooks Rd.
TroY,MI 48084

6443 Ridings Road
Syracuse, NY 13206

T-SQUARE
7353 Victor-Pittsford Road
Victor, NY 14564

DIGIT-TECH
P.O. Boz 1945
Calle Cruz #2
Bajos, San German 00753

TEL: (809) 892-4260
FAX: (809) 892-3366

TEXAS

TEL: (505) 899-9005

NEW YORK
T-SQUARE

TEL: (215) 631-1414
FAX: (215) 631-1640

TEL: (201) 461-2789
FAX: (201) 461-3857

NEW MEXICO
S.W. SALES, INC.
7137 Settlement Way, NW.
Albuquerque, ~M 87120

RIVCO JANUARY INC.
RJI Building
78 South Trooper Road
Norristown,PA 19403

PUERTO RICO
TEL: (612) 854-1120
(612) 854-8312

NEW JERSEY
NEeCO
2460 Lemoine Avenue
Ft. Lee,NJ 07024

TEL: (503) 643-5500
FAX: (503) 644-92.30

PENNSYL VANIA
TEL: (313) 643-0506
FAX: (313) 643-4735

MINNESOTA
IRI
1120 East 80th Street
Bloomington, MN 55420 FAX:

EARL & BROWN CO.
9735 SW. Sunshine Ct.
Suite500
Beaverton,OR 97005

TEL: (315) 463-8592
FAX: (315) 463-0355

TEL: (716) 924-9101
FAX: (716) 924-4946

NORTH CAROLINA
GODWIN & ASSOC.
1100 Logger CI.
Suite B 102
Raleigh, NC 27609

TEL: (919) 878-8000
FAX: (919) 878-3923

GODWIN & ASSOCIATES
2812 Oak Leigh IJIIIve
Charlotte, NC 28213

TEL: (704)549-8500
FAX: (704) 549-9792

S.W. SALES INC.
2267 Trawood, Bldg. E3
EI Paso, TX 79935

TEL: (915) 594-8259
FAX: (915) 592-0288

VIELOCK ASSOC.
720 E. Park Blvd.
Suite102
Plano,TX 75074

TEL: (214) 881-1940
FAX: (214) 423-8556

VIELOCK ASSOC.
9600 Great Hills Trail
Suite15O-W
Austin,TX 78759

TEL (512) 345-8498
FAX: (512) 346-4037

UtAH
ANDERSON & ASSOC.
270 South Main, #108
Bountiful, UT 84010

TEL: (801) 292-8991
FAX (801) 298-1.503

VIRGINIA
ADVANCED TECHNOLOGY SALES, INC.
TEL: (804) 320-8756
406 Grinell Drive
Richmond, VA 23236
FAX: (804) 320-8761

OHIO

WASHINGTON

BAILEY, J.N. & ASSOC.
129 W. Main Street
New Lebanon,OH 45345

TEL: (513) 687-1325
FAX: (513) 687-2930

BAILEY, J.N. & ASSOC.
2679 Indianola Avenue
Columbus,OH 43202

TEL: (614) 262-7274
FAX: (614) 262-0384

BAILEY, J.N. & ASSOC.

TEL:·(216) 273-3798

1667 Devonshire Drive
Brunswick,OH 44212

FAX: (216) 225-1461

TEL: (206) 885-5064
FAX (20{i) 885-2262

WISCONSIN

qsSAMSUNG
Electronics

EARL & BROWN CO.
2447-A 152nd Ave. N.E.
Redmond,WA 98052

IRI
631 Mayfair
Milwaukee, WI 53226

TE L: (414) 259-0965
FAX: (414) 259·0326

650

SAMSUNG SEMICONDUCTOR SALES OFFICES-EUROPE

SAMSUNG
SEMICONDUCTOR
EUROPE GmbH

PARIS

MILANO

MONCHEN

Centre d'Affaires La

Viale G. Matteotti, 26

Carl-Zeiss-Ring 4,

Boursidiere RN 186, Bat.

1-20095 Cusano Milanino

0-8045 Ismaning

Mergenthaler Allee 38-40

Bourgogne, BP 202

(Italy)

(West Germany)

Tel: 2/61 32 888
Fax: 2/61 92 279

Tel: 089/96 48 30

06236 Eschborn

F-92357 Le Plessis-Robinson

(West Ger.many)

(France)

Tel: 06196/9009-0

Tel: 1/40 94 07 00

Fax: 019619009-89

Fax: 1/409402 16

+ 089/96

48 38

Fax:

SAMSUNG SEMICONDUCTOR REPRESENTATIVES
EUROPE
AUSTRIA

SONEL-ROHE (SCAIB)
6, Rue Le Corbusier
Silic 424
F-94583 Rungis Cedex

SATRON HANDELSGES.
MBH
Hoffmeistergasse 8-1 0; 1/5
A-1120 Wi en

TEL 0043-222-87 30 20
FAX 0043-222-83 35 83
TLX: 047-753 11 85 1

GERMANY (WEST)
SILCOM ELECTRONICS
VERTRIEBS GmbH

BELGIUM

Neusser Str. 336-338
0-4050 Monchengladbach

C & S ELECTRONICS NV
Heembeekstraot 111
01100

TEL: 0033-1-468681 70
FAX 0033-1-45 60 55 49
TLX 042-206952

TEL 0032-2-7 250900
FAX: 0032-2-7 2508 13
TLX: 046-25820

TEL (49)-0-2161-60752
FAX: (49)-0-2161-651638
TLX 8521 89

TERMOTROL GmbH
Pilotystr 4
0-8000 Munchen 22

DENMARK
MER-EL
Ved Klaedebo 18
OK-2907 Horshiom

TEL 0046-157 100
FAX 045-2572299
TLX: 37360 MEDEL OK

INSTRUMENTARIUM
ELEKTRONIIKKA
PO. Box 64. Vitikka 1
SF-02631-ESPOO
Helsinki

ING. THEO HENSKES
GmbH
Laatzener Str. 19
Postfach 72 12 26
o 3000 Hannover 72

FINLAND

TEL (49)-0-89-23 0 52 52
FAX (49)-0-89-23 0352 98
TLX: 17898453

TEL (49)-0-511-865075
FAX (49)-0-511-876004
TLX: 923509

ASTRONIC GmbH
TEL: 00358-0-5 28 43 20
FAX 00308-0-502 10 73
TLX: 057-124426

Grunwalder Weg 30
0-8024 Oeisenhofen

TEL' (49)-0-89-61 30303
FAX: (49)-0-89-61 31 668
TLX 521 61 87

FRANCE
MSC-MICROCOMPUTERS
SYSTEMS COMPONENTS
VERTRIEBS Gmbh

ASIA MOS (OMNITECH
ELCCTRONIQUE)
Ratiment Evolic 1 165,
Boulevard De Vaimy
F-92705 Colombes

TEL 0033: 1-47 60 1 2 47
FAX: 0033-1-47 60 1 5 82
TLX: 042-61 3890

c8SAMSUNG
Electronics

Industriestrabe 1 6
Postfach 1380
0- 7 51 3 Stutense€ 3

TEL (49)-0-7249-70 75
FAX: (49)-0-7249 79 93
TLX: 17 72 49 11

651

I

c8SAMSUNG
Electronics

652

SAMSUNG SEMICONDUCTOR REPRESENTATIVES
ASIA

TOMEN ELECTRONICS
COPR.

HONG KONG

1-1 , Uschisaiwai-cho 2
Chome Chiyoda-ku, Tokyo,
100

AV. CONCEPT LTD.
Rm. 802-804, Tower A,
Hunghom Comm, Centre,
37-39 Ma Tau Wai Road
Hunghom, Kin, H.K.

TEL: 3-629325
FAX: 3-7643108
TLX: 52362 ADVCC HX

Flat 3, 10/F., Wing Shing Ind.
Bldg., 26Ng Fong Street, San
Po Kong, Kowloon, Hong
Kong

TEL: 3-3522181
FAX: 3-3523759
TLX: 38396 PTLD HX

Min-Sheng Commercial Bldg.,
1 OF No. 481 Min-Sheng East
Rd., Taipei, Taiwan, R.O.C.

TEL: 011-886-2-5010770"-'9
FAX: 001-886-2-503-1278
TLX: 26777 YOSUNINO

KENTOP ELECTRONCIS
CO., LTD.
31F, Nbr 22., Sec-2, Chung
Cheng Rd., Shin-Lin, Taipei,
Taiwan, R.O.C

TEL: 001-886-2-8325800/5802
FAX: 001-886-2-832-5521

KINREX CORP
2nd. FL, 514-3
Tun Hwa S.Rd.,
Taipei, Taiwan. R.O.C

TEL: 001-886-2-700-4686
"-'9
FAX: 001-886-2-704-2482
TLX 20402 KINREX

RIKEI CORP.
Nichimen Bldg., 2-2-2,
Nakanoshima, Kita-ku, Osaka
530 Japan

TEL: 06-201-2081
FAX: 06-222-1185

GEMINI ELECTRONICS
PTE LTD.
100, Upper Cross Street
#09-08 OG Bldg Singapore
0105

TEL: 65-5351777
FAX: 65-5350348
TLX: RS 42819

I

INDIA
COMPONENTS AND
SYSTEMS MARKETING
ASSOCIATES (INDIA)
PVT. LTD_
100, Dadasaheb Phalke
Road, Dadar, Bombay 400
014

TEL: 4114585
FAX: 4112546
TLX: 001-4605 PDT IN

TURKEY

JAPAN

ELEKTRO SAN. VE TIC_
KOLL. STI.

ADO ELECTRONIC
INDUSTRIAL CO., LTD.
7th FL. Sasage Bldg., 4-6
Sotokanda 2-Chome Chiyodaku, Tokyo 101, Japan

TEL 03-487-0386
FAX: 03-487-8088

SINGAPORE

TAIWAN
YOSUN INDUSTRIAL
COPR.

DIA SEMICON SYSTEMS
INC.
Wacore 64 1-37-8,
Sangenjaya, Setagaya-ku,
Tokyo 154 Japan

PROTECH COMPONENTS
LTD.

TEL: 03-506-3473
FAX: 03-506-3497

TEL: 03-257-1618
FAX: 03-257-1579

Hasanpasa, Ahmet Rasim Sok
No. 16 Kadikoy istanbulTurkey

TEL: 337-2245
FAX: 336-8814
TLX: 29569 elts tr

INTERCOM PO INC.
Ihi Bldg. 1-6-7, Shibuya,
Shibuya-ku. Tokyo 150 Japan

TEL: 03-406-5612
FAX: 04-409-4834

VUTIPONG TRADING
LTD., PART.

CHEMI-CON
INTERNATIONAL COPR.
Mitauya Toranomon Bldg.,
22-14, Toranomon 1 Chome
Minato-ku, Tokyo 105, Japan

THAILAND

TEL: 03-508-2841
FAX 03-504-0566

c8SAMSUNG
Electronics

51-53 Pahurat Rd. (Banmoh)
Bangkok 10200 THAILAND

TEL: 221-9699 3641
223-4608
FAX: 224-0861
TLX: 87470 Vutipong TH

653

SAMSUNG SEMICONDUCTOR REPRESENTATIVES
NEW CASTLE
SEMICONDUTOR CO.,
LTD.

KOREA

NAEWAE ELECTRIC CO.,
LTD.
#751-33, Daelim-dong
Youngdeungpo-ku,
Seoul, Korea
Cable: "ELECONAEWAE"
Seoul

TEL: 646-9101-9
FAX: 844-3001
c.P.O. Box 1409
Sewoon Store: 277-0767
Pusan Branch:
(051) 808-7425
Youngsan: 701-7341-5

4th FI. Room 10·11, Electronics Main Bldg., #16-9,
Hankangro-3ka, Yongsan-ku,
Seoul, Korea

HANKOOK SEMICONDUCTOR
#1054-9, Namhyung-dong,
Kwanak-ku, Seoul, Korea

SAMSUNG
LIGHT-ELECTRONICS
CO., LTD.
4th FI. Room 2-3. Electroncis
Main Bldg .. # 16-9,
Hankangro-3ka, Yongsan-ku,
Seoul. Korea

TEL: 718-0045,
718-9531-5
FAX: 718-9536

c8SAMSUNG
Electronics

TEL: 718-8531-4
FAX: 718-8535

TEL: 588-2981-4
FAX: 588-2980

SEG YUNG INTERISE
CORP.
#21-301, Suninbldg, 16-1,
Hankangro-2ka, Yongsan. ku,
Seoul, Korea

TEL: 701-6811-6,
701-6781-4
FAX: 701-6785

654

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=8SAMSUNG
Electronics
Semiconductor BlJsiness
HEAD OFFICE:
TELEX: KORSST K27970
TEL: (SEOUL) 751-2114
FAX: 753-0967

8/10FL. SAMSUNG MAIN BLDG.
250, 2-KA, T AEPYUNG-RO,
CHUNG-KU, SEOUL, KOREA
C.P.O. BOX 8233

BUCHEON PLANT:
82-3, DODANG-DONG,
BUCHEON, KYUNGKI-DO, KOREA
C.P.O. BOX 5779 SEOUL 100

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TELEX: KORSEM K28390
TEL: (SEOUL) 741-0066, 662-0066
FAX: 741-4273

KIHEUNG PLANT:
TELEX: KORSST K23813
TEL: (SEOUL) 741-0620/7
FAX: 741-0628

SAN #24 NONGSUH-RI, KIHEUNG-MYUN
YONGIN-GUN, KYUNGKI-DO, KOREA
C.P.O. BOX 37 SUWON

GUMI BRANCH:
TELEX: SSTGUMI K54371
TEL: (GUMI) 2-2570
FAX: (GUMI) 52-7942

259, GONDAN-DONG, GUMI,
KYUNGSANGBUK-DO, KOREA

SAMSUNG SEMICONDUCTOR INC.:
TEL: (408) 434-5400
TELEX: 339544
FAX: (408) 434-5650

3725 NORTH FIRST STREET
SANJOSE, CA 95134-1708, USA

HONG KONG BRANCH:
24FL. TOWER 1 ADMIRA LTY CENTER
18 HARCOURT ROAD HONG KONG

'

TEL: 5-8626900
TELEX: 80303 SSTC HX
FAX 5-8661343

TAIWAN OFFICE:
RM B. 4FL, NO 581
TUN-HWA S, RD, TAPIEI, TAIWAN

TEL: (2) 706-6025/7
FAX: (2) 706-6028

SAMSUNG ELECTRONICS JAPAN CO:, LTD.
6F. SUDAMACHI BERDE BLDG.
TELEX: 2225206 SECJPN J
2-3, KANDA-SUDAMACHI
TEL: (03) 258-9506
CHIYODA-KU, TOKYO 101, JAPAN
FAX: (03) 258-9695
SAMSUNG SEMICONDUCTOR EUROPE GMBH:
MERGENTHALER ALLEE 3B-40
D-6236 ESCHBORN, WIG

TEL: 0-6196-90090
FAX: 0-6·196-900989
TELEX: 4072678 SSE£Y

SAMSUNG (U.K.) LTD.:
SAMSUNG HOUSE 3 RIVERBANK WAY
GREAT WEST ROAD BRENTFORD
MIDDLESEX TW8 9RE

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TEL: 862-9312 (EXT)304
862-9323 (EXT)292
FAX: 862-0096, 862-0097
TELEX: 25823

PRINTED IN KOREA
:NOVEMBER 1989



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