1990_Fujitsu_Linear_Products_Data_Book 1990 Fujitsu Linear Products Data Book

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Linear Products
1990 Data Book

1990
FUJITSU

Operational Amplifiers
Comparators
Automotive Audio
Power Supply Controls
Motor Drivers
Disk Drivers
Data Conversion
Other Linear Products
Quality and Reliability
Ordering Information
Sales Information
Appendices-Design Information
Linear Cross Reference Guide

..

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cP

FUJITSU

Linear Products
1990
Data
Book

Fujitsu Limited
Tokyo. Japan
Fujitsu Microelectronics. Inc.
San Jose. California. U.S.A.
Fujitsu Mikroelectronik GmbH
Frankfurt. F.R. Germany
Fujitsu Microelectronics Asia PTE Limited
Singapore

Copyrighl© 1990 Fujitsu Microelectronics, Inc., San Jose, California
All Rights Reserved.
Circuit diagrams using Fujitsu products are included to illustrate typical semiconductor applications. Information sufficient for
construction purposes may not be shown.

The information contained in this document has been carefully checked and is believed to be reliable. However, Fujitsu
Microelectronics, Inc. assumes no responsibility for inaccuracies.
The information conveyed in this document does not convey any license under the copyrights, patent rights or trademarks
claimed and owned by Fujitsu Umited, its subsidiaries, or Fujitsu Microelectronics, Inc.
Fujitsu Microelectronics, Inc. reserves the right to change products or specifications without notice.
No pari of this publication may be copied or reproduced in any form or by any means, or transferred to any third party without prior
written consent of Fujitsu Microelectronics, Inc.
This document is published by the Publications Department, Fujitsu Microelectronics, Inc.,
3545 North First Street, San Jose, California, U.S.A. 95134-1804; U.S.A.
Printed in the U.S.A.
Ed~ion

1.0

Contents and Alphanumeric Product List
LINEAR PRODUCTS

Introduction - Linear Products ..........................................
Section 1 - Operational Amplifiers - At a Glance .........................
MB3603
3609
MB3604
MB3607
MB3614
MB3615
MB47082
MB47358
MB47833

1-1

Operational Amplifier ............................ 1-3
High Frequency Operational Amplifier .............
Dual Operational Amplifier ......................
Quad Operational Amplifier ......................
Quad Operational Amplifier ......................
J-FET Input Operational Amplifier .................
Dual Operational Amplifier ......................
Low Noise Dual Operational Amplifier ..............

1-11
1-19
1-27
1-33
1-39
1-47
1-55

Section 2 - Comparators - At a Glance . .................................
MB4001
MB4002
MB4204
MB4205
MB47393

2-1

High Speed Comparator ......................... 2-3
High Speed Comparator ......................... 2-7
Quad Comparator ............................. 2-15
High Power Comparator ........................ 2-21
Dual Comparator .............................. 2-29

Section 3 - Automotive Audio - At a Glance . ...................................
MB3106
MB3110A
MB3111
MB3714A
3715A
MB3120
MB3722
MB3730A
MB3731
MB3732
3734
MB3733
MB3735
MB3736
MB3737A
MB3742
MB3764
MB41 04
4105
MB87032

vii

3-1

Dual Low Noise Pre-amplifier ..................... 3-3
Dual Control Amplifier .......................... 3-11
Distortion Limiting IC ........................... 3-17
6-Watt Audio Amplifier .......................... 3-25
Compander IC ................................
5.8 W Dual Audio Power Amplifier ................
14 W BTL Audio Power Amplifier .................
18 W BTL Audio Power Amplifier .................
14 W BTL Audio Power Amplifier .................

3-31
3-43
3-49
3-55
3-61

20 W BTL Audio Power Amplifier .................. 3-69
20 W BTL Audio Power Amplifier ................. 3-75
15 W BTL Audio Power Amplifier ................. 3-61
23 W BTL Audio Power Amplifier ................. 3-69
15 W BTL Audio Power Amplifier ................. 3-97
9-Level Detector and Driver for Level Meter ........ 3-105
FM Stereo Multiplex Demodulator ................ 3-115
2-Channel Electric Volume Controller ............. 3-125

11/

Contents and Alphanumeric Product List (Continued)
LINEAR PRODUCTS
Section 4 - Power Supply Controls - At a Glance .........................
MB3752
MB3756
MB3759
MB3761
MB3769A
MB3771
MB3773
MB3774
MB37S0A

Section 5 - Motor Drivers - At a Glance ........................................
MB3763
MB3763H
MB3S54

Iv

6-1

Floppy Disk VFO ............................... 6-3
Floppy Disk VFO .............................. 6-19
Magnetic Disk Head Amplifier .................... 6-T31
Magnetic Disk Head Amplifier .................... 6-'-41
S-Channel Magnetic Disk ReadlWrite
Amplifier for Hard Disk Driver (HOD) ............. 6-57
Magnetic Disk Head Amplifier .................... 6-73
ReadIWrite Bus Driver/Receiver .................. 6-85
Driver/Receiver for Disk Head Amplifier ............ 6-91
Peakhold IC .................................. 6-99

Section 7 - Data Conversion - At a Glance ..............................
AID Converters
MB4051
MB4052
MB4053
4063
MB4056
MB4066

5--1

Bidirectional Motor Driver ........................ 5--3
Bidirectional Motor Driver ....................... 5--13
Bidirectional Motor Driver ....................... 5--21

Section 6 - Disk Drivers - At a Glance ..................................
MB4107A
MB410SA
MB4111
4113
MB4114A
MB4115
4116
4125
4126
MB4117-4-£
411S-4-£
MB4313
MB4316
MB4319

4-1

Voltage Regulator .............................. 4-3
Voltage Regulator ............................. 4-17
Pulse Width Modulation Control Circuit ............ 4-25
Voltage Detector .............................. 4-37
Pulse Width Modulation Control Circuit ............. 4-49
Power Supply Monitor .......................... 4-67
Power Supply Monitor with Watch Dog TImer ........ 4-67
Car Audio System Power Supply ................. 4-99
Battery Backup IC ............. . . . . . . . . . . . . . . . 4-111

7-1

Data Acquisition Systems
8-ChanneI10-Bit AID Converter ................... 7-3
4-ChanneIS-Bit AID Converter ................... 7-27
6-ChanneIS-Bit AID Converter ................... 7-39
S-ChanneIS-Bit AID Converter ................... 7-51
S-ChanneIS-Bit AID Converter ................... 7-£1

Contents and Alphanumeric Product List

(Continued)

LINEAR PRODUCTS
Section 7 - Data Conversion (Continued)
AID Conveners
MB40547-7
40547-8
MB40576
MB40578-7
01 A Conveners
MB4072
MB88301A
MB88341
88342

D/A Conveners
MB40748-8/-9/-10
MB40776
MB40776H
MB40778
MB40788
MB40874
MB40968N
MB40978

Video
8-Bit Ultra High-speed Video AID Converter ......... 7-69
6-Bit Ultra High-speed Video AID Converter ......... 7-77
8-Bit Ultra High-speed Video AID Converter ....... : . 7-89
Multi-purpose
8-Bit Multiplying D/A Converter ................... 7--'37
NMOS 13-Bit x 1 Channel, 6-Bit x 3 Channel
D/A Converter ............................. 7-105
12- and 8-ChanneI8-Bit D/A Converters ........... 7-117
Video
10-Channel High-Speed D/A Converter ...........
6-Bit High-Speed D/A Converter .................
6-Bit High-Speed D/A Converter .................
8-Bit High-Speed D/A Converter .................
10-Bit Ultra High-Speed D/A Converter ............
4-Bit D/A Converter with Lookup Table ............
2-ChanneI8-Bit D/A Converter ..................
3-Channel8-Bit60 RGB D/A Converter ...........

7-137
7-145
7-157
7-167
7-179
7-187
7-199
7-209

AID and D/A Conveners
MB40176
MB87020
FN Conveners
MB4206
MB4207

6-Bit AID and D/A Converter with Clamp Circuit ..... 7-219
16-Bit AID and D/A Converter ................... 7-229
Frequency-to Voltage Converter ................. 7-261
Single Power Supply Frequency-to Voltage
Converter with Comparator .................... 7-267

Section 8 - Other Linear Products - At a Glance .............................
MB3501
MB421 0
MB4214
MB47201

8-1

Wide Band Video Amplifier ....................... 8-3
Lamp-Open Detector for Automobiles . . . . . . . . . . . . . . 8-11
Timer ....................................... 8-15
Quad SPST BiFET Analog Switch ................ 8-27

Section 9 - Quality and Reliability - At a Glance ..........................

9-1

Quality Control at Fujitsu
............................................ 9--3
Quality Control Procesess at Fujitsu .......................................... 9--4

Section 10 - Ordering Information - At a Glance . ........................

10-1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3
IC Product Marking
IC Ordering Code (Part Number) ........................................... 10-3
IC Package Codes
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3

v

Contents and Alphanumeric Product List (Continued)
LINEAR PRODUCTS
Section 11 - Sales Information -

At a Glance . ...........................

11-1

Introduction to Fujitsu .................................................... 11-3
Integrated Circuits Corporate Headquarters-Worldwide ......................... 11-7
FMI Sales Offices for North and South America ................................ 11-8
FMI Representatives - USA .............................................. 11-9
FMI Representatives-Canada .......................................... 11-11
FMI Representatives-Mexico ........................................... 11-11
FMI Representatives - Puerto Rico ........................................ 11-11
FMIDistributors-USA ................................................. 11-12
FMI Distributors-Canada ............................................... 11-16
FMG Sales Offices for Europe ............................................ 11-17
FMG Distributors - Europe .............................................. 11-18
FMA Sales Offices for Asia and Australia .................................... 11-20
FMA Representatives-Asia ............................................. 11-21
FMA Distributors - Asia and Australia . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-22

Section 12 - Design Information Index Index 1.
Index 2.

vi

At a Glance .....................

12-1

Linear Products Cross Reference Guide ............................. 12-3
Application Note: Video Timing Calculations for Fijitsu's
MB40978 DIA Converter . ......................... 12-13

Contents and Alphanumeric Product List

(Continued)

Linear PRODUCTS
Alphanumeric List of Fujitsu Part Numbers
Part No.

Page No.

MB3106
MB3110A
MB3111
MB3120

3-13
3-11
3-17
3-31

MB3501

8-3

MB3603
MB3604
MB3607
MB3609
MB3614
MB3615

Part No.

Page No.

MB3854

5-21

MB4001
MB4002

2-3
2-7

1-3
1-11
1-19
1-3
1-27
1-33

MB4051
MB4052
MB4053
MB4056
MB4063
MB4066

7-3
7-27
7-41
7-51
7-39
7-61

MB3714A
MB3715A
MB3722

3-25
3-25
3-43

MB4072

7-97

MB3730A
MB3731
MB3732
MB3733
MB3734
MB3735
MB3736
MB3737A

3-49
3-55
3-61
3-69
3-61
3-75
3--81
3--89

MB4104
MB4105
MB4107A
MB4108A

3-115
3-115
6-3
6--19

MB3742

3-97

MB4111
MB4113
MB4114A
MB4115
MB4116
MB4117-4/-6
MB4118-4/-6

6--31
6--31
6-41
6--57
6--57
6--73
6--73

MB3752
MB3756
MB3759

4-3
4-17
4-25

MB4125
MB4126

6--57
6--57

MB3761
MB3763
MB3763H
MB3764
MB3769A

4-37
5--13
3-105
4-49

MB4204
MB4205
MB4206
MB4207

2-15
2-21
7-261
7-267

MB4210
MB4214

8-11
8-15

MB3771
MB3773
MB3774
MB3780A

4-67
4--87
4-99
4-111

MB4313
MB4316
MB4319

6--85
6--91
6--99

5-3

vii

Contents and Alphanumeric Product List

(Continued)

Linear PRODUCTS
Alphanumeric List of Fujitsu Part Numbers
Part No.

Page No.

MB4547-7/-8

7-69

MB40176

7-219

MB40576
MB40578/-7

7-77
7-89

MB40748-S/-9/-10
MB40776
MB40776H
MB40778
MB40788

7-137
7-145
7-157
7-167
7-179

MB40874

7-187

MB409681V
MB40978

7-199
7-209

viII

Part No.

Page No.

MB47082

1-39

MB47201

8-27

MB47358
MB47393

1-47
2-29

MB47833

1-55

MB87020
MB87032

7-229
3-125

MB88301A
MB88341
MB88342

7-105
7-117
7-117

Introduction

Page
Fujitsu's Unear Products

Ix

Introduction

x

Linear Data Book

Fujitsu's Linear Products

Introduction
Fujitsu manufactures a wide range of integrated circuits that
include: memories, microprocessors, telecommunication
circuits, ASIC, high-speed ECl logic, power components
(consisting of both discrete transistors and transistor arrays),
and linear products.
The linear product line offers devices for use in a wide range
of applications. These linear products are manufactured to
meet the high standard of quality and reliability that is found
in all Fujitsu products.
Operational Amplifiers
General purpose single, dual and quad configurations of
industry standard op amps are available in standard DIP and
surface mount (SOJ) flatpack packages. Designed for
instrumentation and general purpose applications, these
devices offer Fujitsu's superior performance, quality and
reliability.
Comparators
Fujitsu's comparators include industry standard and
proprietary functions and are available in both standard and
surface mount packaging.
Automotive Audio
The audio products represent Fujitsu's considerable
capability in automotive audio. The audio product line-up
includes a comprehensive range of single-ended and
balanced transformertess power amplifiers, associated
pre-amplifiers, and control circuits.
Power Supply Controls
Fujitsu offers a complete line of Pulse Width Modulation
(PWM) controllers for switching supplies, voltage detectors
and series reQulators. These power supply control devices
are available In DIP, surface mount (flatpack) and, for some
of the devices, a SIP package. A number of the devices have
industry standard pinouts and all power controllCs provide
superior performance, quality and reliability.

111

Fujitsu's Linear Products (Continued)

Motor Drivers
Motor drive products are useful for low power applications
such as camera film transports, and door and access panel
operation found in such products as VCRs and audio tape
drives.

Disk Drivers
Disk drive eroducts include a range of magnetic recording
head amplifiers, head signal drivers, amplifiers, and variable
frequency oscillators (VFOs).

Data Conversion
Video NO and D/A converters, audio and Qeneral purpose
D/A converters, multi-channel Data Acquisition systems and
V/F converters are included in this section. Fujitsu offers the
user superior performance and a wide array of packaging for
video, graphic, multi-purpose instrumentation and process
control applications.

Other Linear Products
Several Linear I.C.s, including an industry standard Video
Amplifier, industry standard Quad Analog Switch, Lamp
Open Detector and Timer, are included in this section.

xii

Section 1
Operational Amplifiers -

Ata Glance
Power
Supply (V)

Package
Options

Page

DeVI08

Description

Featurea

1-3

MB3603

Single

Low Offset
Wide Common
Mode liP

+1510-15

14-pin Plastic DIP
14-pin Ceramic DIP

1-11

MB3604

Single

GBW = 300MHz,
wilh Buffer Tr
(50mA)

+1210-6

16-pin Plastic DIP
16-pin Ceramic DIP

1-19

MB3607

Dual

On-chip
Frequency
Compensation

+1510-15

B-pin Plastic DIP, FPT
B-pin Ceramic DIP

1-27

MB3614

Quad

Wide Common
Mode liP

+310 +30
±1.51o±15

14-pin Plastic DIP, FPT
14-pin Ceramic 01 P

1-33

MB3615

Quad

Low Crossover
Distortion

+310 +36
±1.51o±lB

14-pin Plastic
B-pin Plastic

DIP, FPT
FPT

1-39

MB47082

Dual

JFET Input
Ii =30 pA

±51o±15

B-pin Plastic
9-pin Plastic

DIP, FPT
SIP

1-47

MB47358

Dual

Low Crossover
Distortion

+310 +30
±1.51o±15

B-pin Plastic
9-pin Plastic

DIP, FPT
SIP

1-65

MB47833

Dual

Low Noise
Low Dislortion

±1.5to±15

B-pin Plastic
9-pin Plastic

DIP, FPT
SIP

SR = 2 V4J.S

1-1

..

..

Operational Amplifiers

1-2

Linear Data Book

MB3603
MB3609
May 1988

Edition 1.0

OPERATIONAL AMPLIFIER
The Fujitsu MB3603/3609 are high gain monolithic operational amplifiers.
The MB3603/3609 are suitable for industrial measurement instrument or
controller because of low offset voltage, high input impedance, wide commonmode input voltage range and wide output voltage range.

~
~I
....

PLASTIC PACKAGE
DIP-14P-M02

CERAMIC PACKAGE
DIP-14C·COl

MB3603

•

Not required frequency compensation

•

On-chip protection circuitry

•

Adjustable offset voltage

•

Wide common-mode input voltage range and wide output voltage range

•

Low power dissipation

•

No latch up

•

Pin assignment: MB3609 same as p.A741

PLASTIC PACKAGE
DIP-OEP-MOl

CERAMIC PACKAGE
DIP-OEC-COl

MB3609

PIN ASSIGNMENT

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Rating

Symbol

Value

Unit
V

Power Supply Voltage

Vcc

+18

Power Supply Voltage

VEE

-18

V

Differential Input Voltage

V IO

±3Q

V

Common-mode Input Voltage

VI

±15

V

Power Dissipation

Po

500

mW

NC

NC

NC
OFFSET
NULLl
-IN

NC

NC

Vcc
OUT
OFFSET
NULL2
NC

+IN
VEE
NC
MB3609

Storage
Temperature

Plastic

-55 to 125

·C

-65 to 150

·C

TSTG
Ceramic

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

OFFSET
NULLl
-IN
+IN

NC
Vcc
OUT
OFFSET
NULL2

This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any .voltage higher than maximum, rated voltages to this high impedance
circuit.

1-3

..

..

1111111111111111111111111111111111111111111111111111

FUJITSU

MB3603

IIIIIIIIIIIIIIIIIIIIIII~IIIIIIIIIIIIII~IIIIIIIII MB3609

Fig. 1 - MB3603/3609 EaUIVALENT CIRCUITS

.---_-~-~-...._--.--------

28

w
to

24

~

/,/
0

to

~
o
>
0..
o

i--'

~~

~

:;
u

>
w

to

~..J

o

>

...

0

4

6

8

u

Fig. 4 - COMMON·MODE INPUT VOLTAGE
vs. POWER SUPPLY VOLTAGE

Fig. 5 - INPUT BIAS CURRENT
vs. TEMPERATURE

'6
TA

=

'4
'2
'0

200

.,-

Oto 70"C

Vs"" ±15V

1

./

'60

...2

/

w

'20

a:
a:

/

:::>

u

./

/

......

'"iii0:

80

~

40

...

/

~

r--.... .....
I--.

~

'0

00

20

'5

POWER SUPPLY VOLTAGE Vee. VEE (V)

Fig. 6 - INPUT OFFSET CURRENT
vs. TEMPERATURE

1
Q

...2

50

a:
a:

Vs = ±15V

40

ill

30

r\.

,

:::>

u

...w

20

" t-...

'"u.u.
o

...:::>

'0

~

o

-

1"-... ....

0..

o

'0

20

30

40

50

TEMPERATURE T A

1-6

20

POWER SUPPLY VOLTAGE Vee. Vee (v)

:;;

o

'5

'0

10 12 14 16 18 20

POWER SUPPLY VOLTAGE Vee, VEE (V)

o

:;;

~

4

0

2

./
./

V

:::>

70 0

V
/

'2

~

~

Z
o

'6

7
./

..J

5

w

o

0

...:::>

~

:;;

20

>

2

~

...0:

T A = 0 to 70°C
RL = 2k!'l

60

rei

70

'0

20

30

40

50

60

70

1111111111111111111111111111111111111111111111111111

MB3603
MB3609

Fig.7 - OUTPUT VOLTAGE
LOAD RESISTANCE
8

Vs

=

4

~

'w"
'"

8

~

f-

16
4

~

2

o

10

;

8

.
. ",
1'-.

10

10

>
0.

IJ

o

0.1

10

10
10

~

0.5

1.0

2.0

5.0

10

a

,

r"\.

,

0

Vs

iii
:E

±15V

TA '" 25°C

~

2:
o

'"

R L ::: lQka

2

10-

1

10

~

100

90

o

80

>=
~

70

Z

60

>=

50

8

w

4

o

~

o

>
~

1\

"w~

6

0:

2

w

~

8

1\

:::>

o

10k

lOOk

lk

I'

10k lOOk 1M 10M

1M

"\

"\

0

20
10

o

0

~
o

Vs = ±15V

TA= 2SoC

1'.

40

~

Z

1k

100

Fig. 10 - COMMON·MODE REJECTION
RATIO y •. FREQUENCY

i'i

>

0

1"-

FREQUENCY f (Hz)

Fig. 9 - OUTPUT VOLTAGE
y •• FREQUENCY
36

25°C-

,

LOAD RESISTANCE RL (kn)

-:0.

=

~

1

z

0.2

TA

10

g

)

Vs = ±15V

,I-.

o

:::>
:::>

o
<{

0

'~"

~
>

V
V

2
w

Fig. 8 - OPEN LOOP VOLTAGE GAIN
y •• FREQUENCY

y ••

!--

±15V

6 TA=2 SoC

FUJITSU
1111111111111111111111111111111111111111111111111111

'\
,

10

100

lk

10k lOOk 1M 10M

u

FREQUENCY f (Hz)

FREQUENCY f 1Hz)

1-7

..

..

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImlili

FUJITSU

MB3603

IIIIIIII~IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~ MB3609

PACKAGE DIMENSIONS

(MB3603)

14·LEAD PLASTIC DUAL·IN·LlNE PACKAGE
(CASE No.: DIP·14P·M02)

I

.244±.010

--1~=:;:::;;:::::;:::;::::::;=:;=::;=:;:::::;:::;:::=;:::;::=;::!!

.30Q±.010

17.62'0.251
16.20r251

I

(0.25±0.05)

.172(4.36)MAX

.11813.00iMIN

.,0012.5411.

.018±.OOJ

TYP

1O.46±0.08)

Dimensions in
inches (millimeters)

©FUJITSU LIMITED 1987 D14010S-3C

14·LEAD CERAMIC CERDIP DUAL IN·LINE PACKAGE
(CASE NO.: DIP·14C·C01)

.248~:gb~
(6.30~g:~g)

~r-.-r-.-r-T.7-6ro-~:Tg~-~r-.-r-.-r-~I~
.060~:gg~ (19.30:g:~~1
(l.52:g:~gl

I

.094(2.391
MAX

I

.200(5.OS)MAX

.134:!:.,014

(3.40±0.36)

J

.018::885

.100±.010

(o.46:g:b~1

(2.54±0.25)

.600115.241
REF
© FUJITSU LIMITED 1987 D14005S-2C

1-8

Dimensions in
inches (millimeters)

1111111111111111111111111111111111111111111111111111

MB3603
MB3609

PACKAGE DIMENSIONS

FUJITSU
1111111111111111111111111111111111111111111111111111

(MB3609)

8-LEAD PLASTIC DUAL-IN-LiNE PACKAGE
(CASE No_: DIP-08P-M01)

IImEX

\

.30017.62)TVP

.01O±.002
(0.25±0.05)

.172(4.36)MAX

.060~~12 (1.52~g·3)

Dimensions in
inches (millimeters)

©FUJITSU LlMITE01987 D08006S-2C

1-9

..

..

11~~~~m~lllmllllllllllm~~I~m~lil~
FUJITSU

MB3603

~~~~~lIlIlIlIlIlIlIlImlllllllllllllllllllllll MB3609

PACKAGE DIMENSIONS

(MB3609)

B-LEAD CERAMIC (CERDIP) DUAL IN-LINE PACKAGE
(CASE No_ : DIP-OBC-C01)

IR

.311~:g~:

(7.90tg:~~)

Is:::.__--+--L

.050(1.27)
MAX

.2OO15.0S)
MAX

.0IS~:gg~

.134±.014
13.40±0.36)

I0.46~g)~)
.03210.81 )
TYP

.100'.010
12.54'0.25)
.30017.62)REF
© FUJITSU LIMITED 1987 008004S·2C

1-10

Dimensions in
inches (millimeters)

MB3604
December 1987
Edition 1.0

HIGH FREQUENCY OPERATIONAL AMPLIFIER
The Fujitsu MB3604 is a monolithic high frequency operational amplifier
fabricated by Fujitsu Bipolar Technology.
The M B3604 has differential inputs, single·end output, and an on·chip buffer
transistor for video band use.

PLASTIC PACKAGE
DIP-16P-M04

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Rating

Symbol

Value

Unit

Power Supply Voltage

Vee

+14

V

Power Supply Voltage

VEE

-7

V

Differential Input Voltage

V IO

±5

V

Common Mode Input Voltage

VI

-7 to+1.4

V

Output Current

10

10

mA

Collector-Emitter Voltage
for Buffer Transistor

V eEo

21

V

Collector Current for Buffer
Transistor

Ie

CERAMIC PACKAGE
DIP-16C-C01

PIN ASSIGNMENT

Power Dissipation

Po
Ceramic

50

500

Plastic

-IN
+IN

C1

FC2

VEE

FC3

FC1

FC5

OUT

Vee

mA

mW

-65 to +150

DC

-55 to +125

DC

T STG

Storage Temperature

E1
E2

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

B-B

FC4

B-E

BoC

This device contains circuitry to protect the

inputs against damage due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-

mum rated voltages to this high impedance
circuit.

1-11

..

..

1~1111111111111111111111111111~~li~III~~111
FUJITSU

I I I I I I I I I I I I I I I ~I I I I I I I I I I MB3604

Fig. 1 - MB3604 EQUIVALENT CIRCUIT

r-----.---.__-.__-------{11

vee

+ - - t - - - - - - - { 1 0 FC4

. - t - - - - - t - - - - - - { 1 2 FC5

-IN

._-----{6

OUT

El

~

+IN

B.c

8

B·E

7

B·B

'----+---+-------{4 vee

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Value

Unit

+12±5%

V

Power Supply Voltage

Vee

Power Supply Voltage

Vee

-6±5%

V

TA

-20 to +75

·c

Operating Temperature

1-12

1IIIIIIIIIIIImlllllllll~IIIII~111111111111111111
FUJITSU

MB 3604 1111111~1111111111111~llllllmllllllllm~~1111

ELECTRICAL CHARACTERISTICS- I

(Vee = +12V, VEE = -6V, TA = 0 to 70°C)
Value

Parameter

Symbol

Condition

Unit
Min

I nput Offset Voltage

V IO

I nput Offset Current

Max

= son

6.0

mV

110

5.0

p.A

Input Bias Current

II

20

p.A

Voltage Gain

Av

RL 25kn

Common Mode Rejection Ratio

CMRR

Rs

Maximum Positive Output Voltage

VOM(+)

Maximum Negative Output Voltage

Rs

60

dB

70

dB

VIN=O.IV

4.0

V

YOM (-)

VIN = O.IV

5.5

V

OdB Frequency

fo

Rs

90

MHz

Input Resistance

RIN

f

3.0

kn

Power Supply Current

Isup(+)

9.0

mA

Power Supply Current

I sup (-)

6.7

mA

Collector Cutoff Current for Buffer
Transistor

ICBO

VCB = laV, Ie

2.0

p.A

DC Current Gain for Buffer Transistcr

h Fe

V CB

= 50n

= 50n, RL = 50n

= 1kHz

= 6V,

Ic

=0

= 20mA

40

200

ELECTRICAL CHARACTERISTICS - II
Value
Parameter

Unit

Condition

Symbol

Min

= 1kHz

Max
200

Output Resistance

Ro

f

3dB Frequency

fc

Rs = 50n, RL

Slew Rate

SR

Av ,;, I, RI

Current Gain·Bandwidth Product
for Buffer Transistor

fT

VCE = 6V, Ic = 20mA

Collector Capacitance for Buffer
Transistor

COb

Vce = 6V, Ie = OA,
f = IMHz

= 50n

= 50n

n

1

MHz

10

V/p.s

300

MHz

5

pF

1-13

..

..

IIIIIIIIIIIIIIIIIIIIIII~IIIIIIIII~~IIIIIIIIIIIIII
FUJITSU

1IIIIIIIIIIIIIIIIIImlll!mmlllllllllll~illll MB3604

MEASUREMENT CIRCUT DIAGRAM
Fig. 2 - OdB FEEDBACK AMPLIFIER

Fig. 3 - 20dB FEEDBACK AMPLIFIER

30n
30n

OUT

OUT
son

50n

50n

Fig. 4 - LOW FREQUENCY
FEEDBACK AMPLIFIER

PIN CONNECTION FOR Fig. 2 to Fig. 5

~

®---0

30n
>-""I'>f>,---_+__-oOUT

@----@

~
600n

OUTPUT

Fig. 5 - FREQUENCY CHARACTERISTICS
MEASUREMENT CIRCUIT

Fig. 6 - POWER SUPPLY VOLTAGE VI. VOLTAGE
GAIN MEASUREMENT CIRCUIT

OUT

TOUT
son
son

Pin connection

1-14

son

~

Ion

10Kn

Pin connection

~

1111111111111111111111111111111111111111~lml~111
FUJITSU

MB3604

1111111111111111111111111111111111111111111111111111

ELECTRICAL CHARACTERISTICS CURVES
Fig. 8 - 20dB FEEDBACK AMPLIFIER

Fig. 7 - OdB FEEDBACK AMPLIFIER

~

+10

~

0

111 ......
b ~
F:: ~
j

I
I
I - - K _ K _ Cf
1 ISpF 720.11 lpF
w -20 i-2-20pF-1S0.l1 lpF

Z

~ -10

~ -30 i-3_30pF _100Q. lpF
62.11

4 SlpF

2

~

~\

"'~"- 4

l!)

..J

"

1

2

3

30

z
«

20

I"t--. ...........2 ~

w

10

l!)

«

OpF

S 7 10

40

l!)

0-40

>

iIi
:E
~

2030 SO 70100 200

3"

~

0

~

-10

1

2

3

S 7 10

FREQUENCY f (MHz)

1

CK
2pF

2

SpF

3 10pF

~'"

,"\.

2030 S070100

200

FREQUENCY f (MHz)

Fig. 9 - LOW FREQUENCY FEEDBACK AMPLIFIER

iIi

:E

30

«>
z

20

l!)

10

«

I-..

r-- ....
~

w

l!)

.... -..:

0

«

==-1'00.

6 -10
>

-

r---I-...

I-

Sk

10k

SOOk

lOOk

1M

SM

FREQUENCY f (Hz)

Fig. 11 - POWER SUPPLY VOLTAGE
GAIN

60

a;:E

50

«>

40

«

30

w

20

z

-,-..t-

a;-

i'r-......

«
I..J

0
0.20.30.S0.71

2

3

5 7 10

'"

2030 SO 70100 200

FREQUENCY f (MHz)

0

>

V

VVee=12V

I..J

68

J

w

«

t\..

10

V

68

l!)

~

0

>

«

l!)

69

I

z

l!)

l!)

/

69

:E

l'

67

VOLTAGE

70

70

Fig. 10 - FREQUENCY CHARACTERISTICS

YS.

.-l -I-Vee =-6V

67

II

66
-S

V

......

66
-6
Vee (V)

-7

11

12

13

Vee (V)
POWER SUPPLY VOLTAGE

1-15

..

..

~.~I~~~I~il~
PWITSU
m~ii~~III.~OOI~ MB3604

PACKAGE DIMENSIONS
16-LEAD PLASTIC DUAL IN-LINE PACKAGE
(CASE No_ : DIP-16P-M04)

INDEX-I

INDEX-2
.010±.002
(0.25±0.05)

.039~O«>I2
(0.99~g·3)

Dimensions in

inches

© FUJITSU LIMITED 1986 D16033S·2C

1-16

(millimeter!l.~

1111111111111111111111111111111111111111111111111111

FUJITSU

MB3604

1111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
16-LEAD CERAMIC (CERDIP) DUAL IN-LINE PACKAGE
(CASE No_: DIP-16C-C01)

R.02510.64)

REF

.20015.08)MAX

.134±.014
13.40±0.36)
.1OO±.010
12.54±0.25)

1----+--...,..,.,:--=-=-==-+1---1

.032±.012
10.81 ±0.30)
Dimensions in
inches (millimeters)

©FUJITSU LIMITED 1987 D16011S-2C

1-17

..

Operational Amplifiers

1-18

Unear Data Book

MB3607
May 1988

Edition 1.0

DUAL OPERATIONAL AMPLIFIER
The Fujitsu MB3607 is a dual silicon monolithic operational amplifier with
on-chip internal frequency compensation circuitry, high input resistance and
high gain.
It enables higher integration of function without increasing of mounting den·
sity because it integrates two circuitry on chip in one package.
PLASTIC PACKAGE
DIP-QSP-MOl

The MB3607 is compatible with MC1458.

•

No frequency compensation required.

• On-chip over load protection circuitry.
• Not required external component for frequency compensation due to
adoption of internal frequency compensation circuitry.
•

High input resistance, large common·mode input voltage and large differential input voltage.

CERAMIC PACKAGE
DIP-08C-COl

• High common-mode ripple rejection ratio.
• Owing to adoption of active load, low power consumption, high gain are
achieved.
PLASTIC PACKAGE
FPT-oaP-MOl

• No latch-up
ABSOLUTE MAXIMUM RATINGS (See NOTEI
Symbol

Rating

Value

Unit

PIN ASSIGNMENT
(TOP VIEW)

Power Supply Voltage

Vee

+lB

V

Power Supply Voltage

VEE

-18

V

Differential Input Voltage

VIO

±30*

V

Common-mode Input Voltage

VI

±15*

V

Power Dissipation

Po

500

mW

-55 to 125

·C

-65 to 150

·C

Storage
Temperature

Plastic
TSTG
Ceramic

* When power supply voltage Vce is less than ±15V, VIO = ±( Vee + IVEE II,
VI is equal to the Vee.
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

This device contains ci,cuitry to protect the
inputs against damage due to high static volt·
ages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi·
mum rated voltages to this high impedance
circuit.

1-19

..

1~~M~~iil.n~11
FWITSV
1!!~m~~~~~~~lmIH~I~1 MB3607

Fig. 1 - MB3607 EQUIVALENT CIRCUIT

r-----~------~----------------~--nvcc

-IN ( ) - - - - + - - j - - - ,

+IN
~~-(')OUT

1-20

MB3607

1~~~I~~~~~~I~~~~I~~~~M~11m
FUJITSU
1~~~OO~i~• •

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Value

Unit

Power Supply Voltage

Vcc

6 to 15

V

Power Supply Voltage

VEE

-6 to -15

V

Operating Temperature

TA

-20 to +75

°c

DC CHARACTERISTICS

(Vee

=+15V, VEE =-15V, TA =25"C)
Value

Parameter

Symbol

Condition

Unit
Min

Rs = 10kn, Va = OV
Input Offset Voltage

Typ

Max

1.0

6.0

mV

Via
Rs = 10kn, Va = OV,
TA =Oto 70°C

7.5

Va =OV
Input Offset Current

' 10

20

300

Va =OV
Input 8ias Current

'I
Av

RL = 2kn, Va = ±10V

CMRR

VI = ±7.5V

Power Supply Rejection Ratio

SVRR

Rs = 10kn

Maximum Output Voltage

V OM

RL = 2kn

Common·mode Input Voltage

V CM

Power Supply Current

Isup

500
nA

Voltage Gain

RIN

80

Va = OV, T A = 0 to 70° C

Common·mode Rejection Ratio

Input Resistance

200
nA

Va = OV, TA = 0 to 70°C

800
15000
70

dB
150

V

±10
±12

V

300

Va =OV

IlVN

kn
3.4

5.6
rnA

V O =OV,T A =Ot070°C

AC CHARACTERISTICS

6.2

(Vee

=+15V, VEE =-15V, TA =2SoC)
Value

Parameter

Symbol

Condition

Unit
Min

Typ

Max

Frequency Bandwidth

BW

RL = 2kn, Od8

0.1

1.0

MHz

Slew Rate

SR

RL = 2kn, Av = 1

0.25

0.6

V//lS

Channel Separation

CS

RL = 2kn, f = 1kHz

55

d8

1-21

illlli~!!llllmll~!~IIIHil~~
FUJITSU

oo!iMMI"UMi~OO MB3607

TYPICAL CHARACTERISTICS CURVES
.s. POWER

Fig. 3 - OUTPUT VOLTAGE
SUPPL Y VOLTAGE

Fig. 2 - OPEN LOOP VOLTAGE GAIN
vs. POWER SUPPLY VOLTAGE

iii

40

11 0

TA "" 25°C

:>!

o
;>

«
z


0

/

80

U)

«

r---.....

iii

...

/

40

~

...... r-

~

10

20

15

10

Fig. 6 - INPUT OFFSET CURRENT
vs. TEMPERATURE

1
J.

50

...z

40

It
It

30

VS=!:15V

'"

w

::>

o

...
W

"-

20

.....

III
U.
U.

o

...

10

~

o

-

f"..

~

o

20

30

40

50

60

TEMPERATURE TA (OCI

POWER SUPPLY VOLTAGE Vee. VEE (VI

1-22

15

10

2c1

/

w
C

o

V"

200

T A :: 0 to 70G e

14

~

::;
::;

/'

20

Fig. 5 - INPUT BIAS CURRENT
vs. TEMPERATURE

~

o

/
/

Fig. 4 - COMMON·MODE INPUT VOLTAGE
vs. POWER SUPPLY VOLTAGE

...

z

RL"" 2kn

POWER SUPPLY VOLTAGE Vee. Vee (V)

...J

o
=!i

10 12 14 16 18

T A " Ota 70G e

POWER SUPPLY VOLTAGE Vee. VEE (V)

u

>

24

::>
0

z

o

w

...::>

80

o

~

>

28

.
....

o

w

0

~

>

::;

32

>

.

;>

~

0

o

9

36

"«

V

90

,"":0.
0.

10

20

30

40

50

60

70

70

m~I~~~~~~iiUU~
FUJITSU

MB3607 m~II!.Hln.

Fig. 7 - OUTPUT VOLTAGE vs.
LOAD RESISTANCE
8

"

"

<:

Vs '" j:15V
6 TA=2SoC

o

4
2

w

20

>

"j!...

g

16

14

I!:'"

'o"

10

o
>

10

z

10

w

10

~

"j!
...o

..g
>

I

2
10
8

"

,

0.2

0.5

1.0

2.0

5.0

10

~

~

40
36

Vs'" ±15V
TA - 25"C

<:

32

RL

>

0

28

w

"...

24



16

I-

12

'"

= 10ka

,t

10

90
80

;::
~

70

15

60
50

;::

w

10k

"

lOOk

FREQUENCY f (Hz)

lk

10k lOOk 1M 10M

1M

Fig. 10 - COMMON·MODE REJECTION
RATIO VI. FREQUENCY

o

~
w

lk

100

~ 100

a:

100

",

1
10- 1

1'i

u

4
0

~

FREOUENCY f (Hz)

-"

0

~

,
10

W

Fig. 9 - OUTPUT VOLTAGE
vs. FREQUENCY

'"I!:

~

,
10

LOAD RESISTANCE RL (kn)

"

VS'" ±15V

T A =2So C

Z

I
0.1

.
,,. I\..

~


1.0

a.
a.

-I--+-

Ta =

+

>-

::>
VJ

Icc (mAl -I--+-

_

1.5

E
()

100 r-.......-.--..,-..-...........,..-..,--,

~
I

7[;.

-

;.
0
a..

a

10

50

~
iii

;;
a.

I 1
J I



150

r-,---,r-,......,..--r-,....,

120 t--t----Ij-

=

..:>

100

Fig, 5 - Voltage Gain vs,
Frequency

140

R~I I10k~

120

50

Temperature TA (0G)

80
60

to

"">o

40

40
20

a

a

10

30

20

40

1

10

100 1 k 10k 100k 1 M 10M

Power Supply Voltage Vee (V)

Frequency f (Hz)

Fig, 6 - Output Voltage vs,
Frequency

20

III

II
I
"~

15

0

>


;;

F=

100ka

2ka

DC

Fig, 7 - Maximum Output Voltage vs,
Temperature

f

I

E

e

60

's
()

a.

40

+

r- t- t-.

;;

:-

o

I'

E
E
~
::>

l\.

I'
11 k 2 35 10k 23 5ioOk 2351 M
Frequency f (Hz)

::;!

20

o

I

I

I

~+-

.Q

::>

\

80

-30

-

a

lo-

-

-

r- ~I -

r- r-

Io-

I
I
30

60

:90

Temperature TA (OC)

1-29

..

IIIIIIIIIIIIIIIII~IIIIIIIIIIIIIIIIIIIIIIIIIIII
FUJITSU

..

11111111111111111111111111111111111111111111111

MB3614

14-LEAD PLASTIC DUAL-IN-LINE PACKAGE
(CASE No.: DIP-14P-M02)

I

INDEX -1

......-!2::::r=;r=;==r=;=::;:=;r=;:::::;==r=;=::;=;r=;:=!.!
.770

~:~

(19.55

~ g:~

)

.244 ± .010

-=r

0.25)

J

.085 .010
(2.15 ± 0.25)

• 172(4.36)MAX

. 118(3.00)MIN

.018 ± .003
-+I'I • (0.46
± 0.08)

Dimensions In
Inches (millimeters)

1-30

0140108-30

1IIIIIIIIIImllllllllillmillmlillmilim
FUJITSU

MB3614

1IIIIIIIIIIIIIIIIImlllllllllllllllllllillmi

14-LEAD CERAMIC (CERDIP) DUAL-IN-LINE PACKAGE
(CASE NO.: DIP-14C-C04)

~==~-'OOto 15 0

:gla

.268

~

(6.81

~ g:~)

.300(7.62)TYP

~~~~~~~~~,~
.760
(19.30
.060

~ :g~~
~

g: ~~)

.I

~ :g~

(1.52~ g:~)

.010

~ :~

(0.25

~ g)~)

.134 ± .014
(3.40 ± 0.36)

-II ..

018

~ :~

.100 ± .010
(2.54 ± 0.25)

(0.46~ g:~~)
.600(15.24)

Dimensions In
Inches (millimeters)

0140068-20

1-31

1IIIIIIIIIIIIIIIIIIIIIIIIImlllllllllllllllili

FUJITSU
11111111111111111111111111111111111111111111111

MB3614

14-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT-14P-M01)
.400~ :~

(10.15 ~ g:~ )
.004

~:~

(0.10~g:~)
(STAND OFF)

6nnnnnnnH~085(2'15)MAX
.031 ± .008

(0.80 ± 0.20)

.007 (0.18)
MAX

.027 0.68
MAX

Dimensions In
Inches (millimeters)

1-32

F16005S-3C

MB3615
November 1987
Edition 1.0

QUAD OPERATIONAL AMPLIFIER
The Fujitsu MB3615 Is a Quad operational amplifier having a phase compensatory circuit
and operates from a single power supply or dual power supplies.
The device has equivalent electrical characteristics of current Industrial standard
operational amplifier and requires low power supply current.
MB3615 can be mounted In high density because It Integrates 4 circuits on a chip In
14-pin package. It is taking the countermeasure for cross-over distortion. so can be
used for amplifying AC.
PLASTIC PACKAGE
DIP-14P-M02

The MB3615 is pin compatible with Motorola MC3303.
• No phase compensation required
• Wide power supply voltage
- Single power supply: +3 to +36 V
- Dual power supplies:

±1.5 to ±18 V

• Wide Input common mode range: VEE to (Vee -1.5) V
• Low power supply current: 2 mA typ.
PLASTIC PACKAGE
FPT-14P-MOl

• Low Cross-over distortion

PIN ASSIGNMENT
(TOP VIEW)

ABSOLUTE MAXIMUM RATINGS (see NOTE)
Rating

Symbol

Value

Power Supply Voltage'

Vee

36

V

Differential Input Voltage'

VIO

36

V

Input Common Mode Voltage'

VI

-0.3 to +36

V

Power Dissipation

Po

570

mW

Operating Temperature

TA

-20 to +75

°C

Storage Temperature

TSTG

-55 to +125

°C

NOTE:

Unit

• Single Power Supply.
Permanent device damage may occur If the above Absolute Maximum
Ratings are exceeded. Functional operation should be restricted to the
conditions as detailed In the operational sections of this data sheet. Exposure
to absolute maximum rating conditions for extended periods may affect
device reliability.
This device contains circuitry to protect the

~~r~~esag~~n~~ec~~~a~:'d~~ ~~~.: s~at~
I

advised that normal precautions be taken to
avoid application of any voltage higher than
maximum rated voltages to this high Impedance
circuit.

Copyright ©1987 FUJITSU LIMITED and Fujitsu Microelectronics, Inc.

1-33

~~~~IIIIIMIIII~III~~III~~~~IIII~I~
FUJITSU

l~ml~~~I~OOI~~IIII~~I~IIIIII~I~~1

M83615

Fig. 1 - MB3615 EQUIVALENT CIRCUIT

Vee

-IN

'---..---+---0
+IN

1-34

o---+----+---.J

OUT

111111111111111111111111111111111111111111111111111111

MB3615

ELECTRICAL CHARACTERISTICS

(VCC

=+15V,

VEE

FUJITSU
11111111mllllllllllllllllllllllllllllllllllll~11111

=-15V, TA = 25°C)
Value

Parameter

Symbol

Condition

Min

Typ

Max

Unit

Input Offset Voltage

VIO

2

7

mV

Input Offset Current

110

5

50

nA

Input Bias Current

II •

45

250

nA

Power Supply Current

Icc

2.0

4.0

mA

Input Common Mode Voltage

VCM

Voltage Gain

Av

RL ~ 2kfl

20

100

VOH

RL = 2kfl

± 10

12

V

VOL

RL = 10kfl

± 12

13

V

ISOURCE

10

40

mA

ISINK

10

20

mA

Common Mode Rejection Ratio

CMRR

70

85

dB

Power Supply Voltage
Rejection Ratio

SVRR

65

100

dB

Channel Separation

CS

120

dB

Output Voltage

RL = ex:>

VCC -1.5

VEE

V
V/mV

Output Current

NOTE:
A direction of the Input bias current flows from IC because first input transistor consists of PNP.

1-35

..

IIIIIIIIIIIIII~IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
FUJITSU

..

1IIIIIIIIIllillllllllllllllllllllllllllllllllllllllili

MB3615

TYPICAL CHARACTERISTICS CURVES
:;c

.s

Fig. 2 - Power Supply Current
Power Supply Voltage

is

4.0

I

o

9

I-

Z

a:
a:

()

0..

--~
---

I-

Z

a:
a:

::>
~

......

()

~-I

«
iii

I I
I I

w

a

o

10

20

50

(I)

TA =-20'C

1.0

75

W

TA = 0 to,&'C

+

I-

I-+-+-

25

;:::

30

I I

J

~

RL=

80

2~n I~

w

100

Fig. 5 - Voltage Gain
Frequency

150

VS.

140
120

~

~

"'N

".-

50

Temperature TA ('C)

m

R~ = 110kn

o

-50

40

Fig. 4 - Voltage Gain VS.
Power Supply Voltage
160

~
z

Vee = 5Voe

ir

Power Supply Voltage Vee (V)

120

VS.

100

I

Icc (mAl

a:

~

I

2.0

:J0..
::>
(I)

I

I

3.0

W

::>

I

Fig. 3 - Input Bias Current
Temperature

VS.

100

80

-

60

C)

«
~
o

40

40

20

>

a

o

10

20

30

1

40

Power Supply Voltage Vee (V)
Fig. 6 - Output Voltage VB.
Frequency

0:-

40

III

d.
0

30

w

C)

«

I-

\.

0

>

I-

::>

~IN ~

20

..J

10

n

'7?t'

~

>

100k

:

,

::>
0

o

Fig. 7 - Maximum Output Current vs.
Temperature
80

"

1k 2 35 10k 23 5 100k 235 1M

I

52
Z

W

~

60

::>

()
I-

::>

40

20

::!!
::>
::!!

~

::!!

0

I

I

I

~+-

I-

o

Frequency f (Hz)

1-36

l

::>

I-

100 1k 10k 100k 1M 10M
Frequency f (Hz)

0..
I-

0..

10

- - - +

r-

~

I-- r-

-

-

Io- _

~

-

10-

I
I

-30

60
o
30
Temperature TA ('C)

90

111111111111111111111111111111111111111111111111111111

FUJITSU

MB3615

111111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
14-LEAD PLASTIC DUAL-IN-LINE PACKAGE
(CASE No.: DIP-14P-M02)

I

INDEX - 1

.244

± .010

~~=;==;=:;=;r==r=;==;=::;=;:==;==;==r==:;=!.! -=:r

0.25)

J
.085 ± .010
(2.15 ± 0.25)

. 172(4.36)MAX

.118(3.00)MIN

II

~

Dimensions In
Inches (millimeters)

.018±.003
.. (0.46 ±0.08)

D14010S-30

1-37

111111111111111111111111111111111111111111111111111111

..

FUJITSU
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~~IIII

MB3615

PACKAGE DIMENSIONS (Continued)
14-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT-14P-M01)

(10.15

~ g:~~

)

.050 (1.27)

TYP

,031 ± .008

(0.80

Dimensions In
inches (millimeters)

1.-38

j:

0.20)

F14003S-2C

111111111111111111111111111111111111111111111111111111111111111

FUJITSU

MB47082

111111111111111111111111111111111111111111111111111111111111111

Apr. 1989
Edition 1.0

J-FET INPUT OPERATIONAL AMPLIFIER
The Fujitsu MB47082 Is designed for a dual operational amplifier with P
channel-typed J-FET used at the Input stage. Its slew rate Is faster (more
than one figure) comparing with the standard operational amplifier and also Its
band width Is wide because of Its high Input Impedance characteristics and
well-built transmission conductance at the Input stage comparing with the
bipolar transistor.

PLASTIC PACKAGE
SIP-09P-M01

The MB47082 Is suitable for a 01 A converter and a Sample & Hold circuit that
need to cover from a small signal amplification to a fast and large signal
change.
•

Compatible with TL082

•

Wide operating power supply voltage: i 5V to i 15V

•

Fast slew rate: 13V/j.ls typo

•

Low Input bias current : 30pA typ.

•

Wide frequency bandwidth: 3M Hz typ.

•

On-chip Internal frequency compensation

•

Low noise

PLASTIC PACKAGE
DIP-OSP-M01

PLASTIC PACKAGE
FPT-OSP-M01
PIN ASSIGNMENT
ABSOLUTE MAXIMUM RATINGS (see NOTE)
• Rating
Power Supply Voltage

Differential Input Voltage
Common-mode Input Voltage

Symbol

Value
+18

V

VEE

-18

V

VIO

i 30

V

VI

i15

V

350 (TA:s; 55·C)

mW

TA

-20 to 75

·C

TSTG

-55 to 125

·C

Po

Operating Temperature
Storage Temperature

Permanent device damage may occur If the above Absolute
Maximum Ratings are exceeded. Functional operation should be
restricted to the conditions as detailed In the operational sections of
this data sheet. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.

Copyright ., 1989 by

(FRONT VIEW)

Unit

Vcc

Power Dissipation

NOTE:

(TA=25·C)

SIP:

D:::T~:
1
(TOP VIEW) 8 Vce
-IN-A

2

7

+ IN-A

3

6 -IN-B

4

5

VEE

OUT-B

+IN-B

This device contains circuitry to protect the inputs
against damage due to high static voltages or electric
fields. However, It Is advised that normal precautions
be taken to avoid application of any voltage higher
than maximum rated voltages to this high impedance
circuit.

FUJITSU LIMITED

1-39

..

1111111111111111111111111111~llmllmlllllll
FUJITSU
11111111111111111111111111111111111111111111111

MB47082

Fig. 1 - MB47082 EQUIVALENT CIRCUIT

Vee

+IN

0 - - - - _ - -__- - -__-

.........--..------,

0------1t----,

-IN 0 - - - - , ( - '

NY----+--/---o OUT

L....-..........

VEE~-_--

1-40

_ _-

_ _- _ - _ -_ _- - _ -_ _----"

111111111111111111111111111111111111111111111111111111

FUJITSU

MB47082

1I1111111111111111111111111111111111111111111111111111

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Value

Unit

Power Supply Voltage

VCC,VEE

±5 to ±15

Operating Temperature

TA

-20 to +75

V
·C

(TA
Parameter

Symbol

Condition

Value
Min

Input Offset Voltage

VIO

Input Offset Current

110

RS;5500

Input Bias Current

II

Common-mode Input Voltage

VCM

Common-mode Rejection Ratio

CMRR

RS;510kO

70

Power Supply Voltage
Rejection Ratio

SVRR

RS;510kO

Voltage Gain

Av

RL=2kO

Power Supply Current

Icc

Maximum Output Voltage

Output Current

=25°C, Vcc=15V, VEE =-15V)

Typ

Unit
Max

5.0

15.0

mA

5

200

pA

30

400

pA
V

±10
86

dB

70

86

dB

25

200
3.5

RQ18kO

±12

±13.5

RQ2kO

±10

±12

V/mV
5.6

mA
V

VOM
ISOURCE

VO=VEE

-25
25

V
-10

mA

ISINK

Vo=Vcc

40

mA

Frequency Bandwidth

BW

RL=2kO

3.0

MHz

Slew Rate

SR

RL=2kO,C=100pF,AV=1

13

V/)J.s

Channel Separation

CS

f=lkHz

120

dB

Equivalent Input Noise Voltage

VNI

f=l kHz, Rs=l 000

25

nv-fHZ

1-41

..

la~~~~~~I~illll~lll~
FUJITSU

. . .~~ MB47082

ELECTRICAL CHARACTERISTICS CURVES
Fig. 2 - Voltage Gain vs. Frequency
150
Vee = 15V
VEE = -15V
125
RL = 2k!l
iD
TA = 25°C
"0
-~
;- 100

"

-<
~ 75

'"

50
25

10

0

20

"

15

CI

1

1

I

III

0

10

a

5

;;
a.
;;

r"\

"'

\..

100 1k 10k 100k 1M
Frequency f (Hz)

100

~
:J

U

E

60

-

,,/

I-

20

.-"

TA

CI

III

>

;;

RL

20

= 10k!l.l

V'l

15
10

//

//

RL - 2k!l

-jV

5

o
o

±3
±S
±8 ±12 ±15 ±18
Power Supply Voltage Vee, VEE (V)

1-42

1k

,

;;

~V

a.

;;

a

,
/

a.
.5

~I-

= 25°C

a.

"

= 15V
VEE = 15V
VleM = OV

iii 100

10
-50

Fig. 6 - Output Voltage vs.
Power Supply Voltage

25

10M

III

-5
o
5
10
Common-Mode Input Voltage VleM (V)

.g

"

..

o-10

30

,

10k
100k
1M
Frequency f (Hz)

u

;;

C
0
>

= -5V \

"~

iii , 40

I

L

F Vee

:(

80

III

c:

1k

,

\

.!:!:

fI)

a.
.5

J5V,

1\

I

Fig. 5 - Input Bias Current vs.
Temperature
10k

.!:!:
'i:

Vee

o

10M

Vee = 15V
VEE = -15V
TA = 25°C

:( 100

Vee 10V.
VEE = -10V

±:

>

Fig. 4 - Input Bias Current VS,
Common-Mode Input
Voltage
120

~

a.

C
>

CJ

o

c:

Fig. 3 - Output Voltage vs. Frequency
30
Vee = 15V, VEE = -15V
I
I
1\ RL = 10k!l
TA
=
25°C
25

c:
I

-

--

-25
0
25
50
75
Temperature TAl ° C)

100

Fig, 7 - Output Voltage vs, Load
Resistance
30
Vee = 15V
VEE = -15V
25 TA = 25°C

V

a.

C
0
>

/

20

r-

Q)

CI

III

15

±:

/V

0

>
;;

10

a.

;;

a

5

a

V

0.1

0.2
0.5 1.0
2
5
Load Resistance RL (k!l)

10

111111111111111111111111111111111111111111111111111111

FUJITSU

MB47082

ELECTRICAL CHARACTERISTICS CURVES
Fig. 8 - Input Noise Voltage vs.
Frequency

100

Z

80

Vee = 15V
VEE = -15V
Rs = 100D
TA = 25°C

E-

>

~
0

>

'"


-5

-15
0
±3
±6
±9 ±12 ±15 ±18
Power Supply Voltage Vee, VEE (VI

-----

\

--\ l-

2.5

3

3,5

J

I

sou!ce

I

Q)



:;
a.
:; -10

2

a;
a.

10

0

4
3

0
0

Fig. 11 - Output Voltage vs.
Output Current

TA = 25°C

0

0

0

0

Time t (lJ.sl

5

~

,I

Input_

20

::!:

:J

!

l

o

Fig. 10 - Power Supply Current vs.
Power Supply Voltage

.S!
E

/

-2

0

6

.s

Vee" 15V
VEE=-15V
RL
= 2kD
0
0
CL
= 100pF
IJ-loutJut
o
Av = 1
: -YA = 25°C

I 1

2

>

>
Q)

'--

4

Q)

Q)

!!'"

(Continued)

Fig. 9 - Pulse Response
6

120

~>

111111111111111111111111111111111111111111111111111111

-20
0

Sink

............

,,-

I

~ ...J

Vee = 15V
VEE = -15V
TA=25°C

10
20
30
40
50
Output Current 10 (mAl

60

1-43

..

Ilm~mlllllllllllmllll~IM~llllllllmllml
FUJITSU

llllllllllllllllllillmillmlillmlllllllll~lll~l

MB47082

9-LEAD PLASTIC SINGLE-IN-LINE PACKAGE
(CASE No.: SIP-09P-M01)

I

(22.25~g:~g)

l

//:J==========?I--.----a

JEX

.112±.010
(2.85'0.251

D
.010+.002
(0.25.0.051

©1988 FUJITSU LIMITED S09002S-3C

1-44

Dimensions in
inches (millimeters)

111111111111111111111111111111111111I11111111111111111

FUJITSU
MB47082 111111~1~lllllllllllllllllllllllllllllllllmlllllll

8-LEAD PLASTIC DUAL-IN-LINE PACKAGE
(CASE No.: DIP-08P-M01)

370~gl~

INDEX
.244±.010
16.20±0.25)

~:::r=r==r=r=?I~
039~g12 I

I

10.99~g30)

1060~g12
1152~g·30)

035~gl~
. 17214.36) MAX

.11813.00) MIN

10012.54)

TYP

© 1988 FUJITSU LIMITED DD8D06S-2C

.01S±.003
10.46 ± O.OS)
Dimensions in
inches (millimeters)

1-45

..

1111111111111111111111111111111111111111111111111111

FUJITSU
1111111111111111111111111111111111111111111111111111

M847082

8-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT-08P-M01)

.08912.25) MAX
ISEATED HEIGHT)

1

·307±.016

INDEX

cf

17.8~±0.40)

.209±.012
15.30±0.30)

1.!:::::;!;:::~::::;j;:::!J __ J

I

_t

Jil~O~::~O~~ ¢.00510.13)~

.05011.27)

$

TYP

150(3~1)J
REF

r--------------,

,I

Details of "A" part

,I

:

.00810.20):

I

.02010.50):
.00710.18) :
MAX
'
.02710.68) :

,

MAX

I _______________ JI
L

©1988 FUJITSU LIMITED F08002S-3C

1-46

Dimensions in

inches (millimeters)

MB47358
July 1988
Edition 2.0

DUAL OPERATIONAL AMPLIFIER
The Fujitsu MB47358 is designed for a general purpose dual operational
amplifier with internal frequency compensation and to operate from a single
power supply or dual power supplies. The MB47358 is suitable for audio
with the fast slew rate and with the reduction of cross·over distortion. The
MB47358 fits an application of microcomputer because of its wide output
voltage range. The MB47358 is compatible with LM358.

PLASTIC PACKAGE
SIP-09P-MOl

• Not required frequency compensation
• Wide power supply voltage range
Single power supply: 3V to 30V
Dual power supplies: ±1.5V to ±15V

PLASTIC PACKAGE
DIP-OSP-MOl

• Wide output voltage range

FLAT PLASTIC PACKAGE See Page 7

• No cross·over distortion
•

PIN ASSIGNMENT

Fast slew rate - 2V /p.s typo

(FRONT VIEW: SIP)

Vee
OUT-B
-IN·B

ABSOLUTE MAXIMUM RATINGS (see NOTE)

+IN·B

Rating
Power Supply Voltage

Symbol
Vee

Differential Input Voltage

VIC

Common·mode Input Voltage

VleM

Power Dissi pation
Operating Temperature

Value
36

Unit

GND

..-----1.11 +IN-A

V

36

V

-0.3 to +36

V

Po

350 (TA :::;: 55·C)

mW

TA

-20 to +75

°c

-IN-A
OUT-A

Vee
(TOP VIEW: DIP, FPT)

Storage Temperature

TSTG

-55 to +125

OUT·A
-IN·A

Vee
OUT-B
-IN-B

°c

+IN-B

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

This device contains circuitry to protect the

inputs against damage due to high static volt·
ages or electric fields. H«;MIever. it is advised
that normal precautions· be taken to avoid
application of any voltage higher than maxi·
mum rated voltages to this high imp8dance
circuit.

1-47

..

1IIIIIIIIIImlllmll~~llllllllllllllllllllmlll
FUJITSU
1IIIIIIIIIIIIIIIIIIIIIIIIIIImlillmlllllillmili

MB47358

Fig. 1 - MB47358 EQUIVALENT CIRCUIT

Vee

L - -_ _

-IN

+IN

1-48

(r-----+----+----'

+---O OUT

1111111111111111111111111111111111111111111111111111

FUJITSU

MB47358

1111111111111111111111111111111111111111111111111111

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Unit

Value
3 to 30

Power Supply Voltage

V

Vcc
±1.5 to ±15

Operating Temperature

°c

-20 to +75

TA

RECOMMENDED OPERATING CONDITIONS

ITA

=2SoC, Vee =SV)

Value
Parameter

Symbol

Condition

Unit
Min

Typ

Max

Input Offset Voltage

V IO

-

2

7

mV

Input Offset Current

110

-

5

50

nA

Input Bias Current

II

-

45

2S0

nA

-

2.0

3.0

mA

-

Vcc-1.5

V

25

100

-

V/mV

.
RL =00, Vec =5V

Power Supply Current

Icc

Common-mode Input Voltage

V ICM

Voltage Gain

Av

Common·mode Rejection Ratio

CMRR

65

85

-

dB

Power Supply Voltage Rejection
Ratio

SVRR

65

100

-

dB

RL = 2kQ

3.5

4.1

-

V

RL = 10kQ

4.0

4.2

-

V

ISINK ~601lA

-

0.2

0.4

V

ISINK ~2mA

-

0.8

1.5

V

0
RL~K2kQ

V OH
Output Voltage
VOL

Maximum Output Voltage

RL~ 10kQ, Vcc =±1SV

±12

±14

-

V

V OM

ISOURCE

Output Current

RL = 2kQ, Vcc = ±15V

±10

-

-

V

V IN + = 1V, V IN _ =OV,
Vcc = 15V

20

40

-

rnA

V IN + = OV, V IN _ = 1V,
Vcc = 15V

10

20

-

rnA

V IN + = OV, V IN _ = 1V,
Vo=O.4V

60

150

-

Il A

ISINK

Channel Separation

CS

f = 1kHz

-

120

-

dB

Slew Rate

SR

RL = 2kQ

-

2

-

V/Ils

NOTE: A direction of the input bias current flows from IC because first input transistor consists of PNP.

1-49

..

..

1111111111111111111111111111111111111111111111111111

FUJITSU

IIIIIIIIIIIIIIIIIIIIIIIIIIIII~~IIIIIIIIIIIIIIIIIII MB47358

ELECTRICAL CHARACTERISTICS CURVES
;(

.s

Fig. 2 - POWER SUPPLY VOLTAGE
VS. POWER SUPPLY CURRENT
6

4

u

TA

.2

rz

a:
a:
u

~

= -30'C

3 I---+----:,p..""""'=t--=Js'c

~

7S'C

w

w

:J

Q.

SOURCE

4

~
...J
o
>
r-

,

r\.

3

2

1=

CIl

o

w

o

10

30

20

o

40

Fig.4 - TEMPERATURE

~

rzw

30

:J

20

a:
a:

::::--

~e=30V

r-

r-

10

-30

50

100

8

Vee

= SV, RL = 2krl

,..

0
6

/

w

(!)

«
4

r0

\

\....

V

>
2

=~

0

o

2

3

RESPONSE TIME I (I's)

1-50

o

10

100

lk

10k

FREQUENCY f (Hz)

Fig.6 - PULSE RESPONSE

r-

\

10

:J

o

TEMPERATURE TA ('C)

:J

L = 2kd

Q.

o

:J

b

20

:J

0

Q.

Vee! ±15V,

I

~

>

r-

0

I

0

:J

r...J

I

(!)

Z

>

30

...J

Q.

~

so

10

S

Fig. 5 - FREQUENCY
OUTPUT VOLTAGE

0

>

w

~

iii

1

VS.

~

~ F::::::

O.S

OUTPUT CURRENT 10 (rnA)

....

40

£

u

......

0.1

POWER SUPPLY VOLTAGE Vee (V)

vs. INPUT BIAS CURRENT

~

SINK

:J

a:

;(

= 2S'C, Vee = SV

:J

:J

~

TA

S

(!)

2~~r--r--+--+-~

~
Q.

Q.

Fig. 3 - OUTPUT CURRENT
vs. OUTPUT VOLTAGE

4

\

lOOk

1M

1111111111111111111111111111111111111111111111111111

FUJITSU

MB47358

1111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
9-LEAD PLASTIC SINGLE IN-LINE PACKAGE
(CASE No.: Slp·09p·M01)

1=~=(22='25~g:~g)=====li'l--.--------T
JDEX

.112±.010
(2.85±0.25)

o

.010+.002
(0.25±0.05)

©1988 FUJITSU LIMITED S09002S·3C

Dimensions in
inches (millimeters)

1-51

..

..

1IIIIIIIIIIIIIIIIIIIImllllllllillmilimmllili

FUJITSU
1111111111111111111111111111111111111111111111111111

MB47358

PACKAGE DIMENSIONS (continued)
8-LEAD PLASTIC DUAL-IN-LiNE PACKAGE
(CASE No.: DIP-08P-M01)

I

.244±.010

!.!;::::;:::;:==;=;::=;:::;:::;?!~0.25)

~ .370~:g~~ ~
(9.40~:~g)

1----+---- .100(2.54)TVP
.172(4.36)MAX

.039~~12
(o.99~g·3)

.01 ±.003
(0.46±0.08)

.060~~12 (1.52~g·3)
© 1987 FUJITSU LIMITED D08006S-2C

1-52

Dimensions in
inches (millimeters)

MB47358

1lllllllllllllmllllmllllllllllllmlllll~mlll
FUJITSU
1~llllllllllllllllllllllmlllllll~~lllllmlml

FPT-08P-M01

8-LEAD PLASTIC FLAT PACKAGE
(CASE No_ : FPT-08P-M01)

r;::~'~
INDEX

,../

U

1

·307t.016
(7.8t0.4)
.209>.012
15.30±0.25)

1.!::;:;=:::r::;::::;::;:::::;::::::!11~

.00210.05)
MIN
(STAND OFF)
View "Au

J

.007(0.18)
MAX
.027(0.68)
MAX

.018±.004
10.45±0.10)

.05011.27)

TYP

6lio.

o p = r 0851;.15)MAX

--"\.'\ A

.0315±.008
10.8<0.2)
Dimensions in

1!i)1987FUJITSU LIMITED F08002S-2C

inches (millimeters)

1-53

..

..

Operational Amplifiers

1-54

Linear Data Book

MB47833
May 1988
Edition 1.0

LOW NOISE DUAL OPERATIONAL AMPLIFIER
The Fujitsu MB47833 Is a dual operational amplifier with a high slew rate, broad
bandwidth and low noise characteristics.

PLASTIC PACKAGE
DIP-08P-MOl

The MB47833 Is an excellent preamplifier for PCM and high-fidelity audio
systems. The device Is functionally compatible with the LM833.

•

Wide Power Supply Range:

±1.5V to ±15V

•

High Slew Rate:

7 V//l-s

•

Low Input Noise Voltage:

4.5 nV/..IHi

•

Wide Gain Bandwidth:

15 MHz

•

Internal Phase Compensation

PLASTIC PACKAGE
FPT-08P-MOl

PLASTIC PACKAGE
SIP-09P-MOl

PIN ASSIGNMENTS
(Top View)
Vee

-IN A

OUT

+IN A

-IN B

OIP-08P-MOl
FPT-aSP-MOl

Symbol

Value

Unit

Vee
VEE

+18

V

-18

V

Differential Input Voltage

v,o

.t.30

V

Common Mode Input Voltage

V,

.t.15

V

Power Dissipation

Po

350 (TA~55·C)

mW

VEE

Operating Temperature

TA

-30 to +85

·C

+IN A

Storage Temperature

TSTG

-55 to +125

·C

Power Supply Voltage

Note:

Permanent device damage may occur If ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed In the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

Ei

+IN B

VEE

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Rating

OUTA

Front View)
9

Vee
OUT B
-IN B
+IN B

-IN A
OUTA
Vee
SIP-Q9P-MOl
This device contains circuitry to protect the
Inputs against damage due to high static
voltages or electric fields. However. It Is
advised that normal precautions be taken to
avoid application of any voltage higher than
maximum rated voltages to this high Impedance circuit.

~rlght. 11188 by FWITSU UMITEO and Fujitsu Microelectronics, Inc.

1-55

..

..

~~~II~~~~~~I_i
FUJITSU

~~IOOI~~~~OO~I~~~I~~~~

MB47833

Fig. 1 - EQUIVALENT CIRCUIT

~CO-------~------~~--~----~----~-4r---~--~

+IN

0-------;--------,

-IN

~E~~~----~~----~--~----~----~_+----~--~---J
OUTo-----------------------------------~

1-56

111111111111111111111111111111111111111111111111111111

FUJITSU

MB47833

111111111111111111111111111111111111111111111I11111111

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Value

Vcc

Power Supply Voltage

Unit

±1.5 to±15

V

-30 to +85

DC

VEE
Ambient Operating Temperature

TA

ELECTRICAL CHARACTERISTICS
(VCC = +15V. VEE = -15V. T A = 25·C. unless otherwise noted.)
Value
Parameter

Maximum

Unit

Input Offset Voltage

VIO

0.3

5.0

mV

Input Offset Current

110

10

200

nA

500

1000

nA

Common Mode Input Voltage

liN
VCM

+12

±14

V

Common Mode Rejection
Ratio

CMR

80

100

dB

Supply Voltage Rejection
Ratio

SVR

80

100

dB

Voltage Gain

Av

90

110

Input Bias Current

Power Supply Current

Symbol

Conditions

RL= 2k!l

V OM

RL? 10k!l
RL?2k!l

Gain Bandwidth Product

GBW

R = 2k!l, f = 100kHz

Slew Rate

SR

Channel Separation

CS

RL = 2k!l, C = 100pF
Av= 1

V NI

Typical

5.0

Icc

Maximum Output Voltage

Input Noise Voltage

Minimum

f = 1kHz
NAB. JISA
RS = SOOn. f = 1kHz

dB

B.O

mA

±12

±13.5

±10

±13.4

V

15

MHz

7

VI¢>

120

dB

0.4

IlV

V

1-57

..

1~llllmlllllllll~I~II~II~~I~I~~~I~IIII~
FUJITSU

111111~1111111111111~11~11111111111111~1~1~~1 MB47833

TYPICAL PERFORMANCE CHARACTERISTICS

Supply Current

VB

Output Voltage

Supply Voltage

---

8.0

15

§.

e ~----

6.0

0
~

.

t:

4.0

~

75·C

>

5

i

0

:;

-5

.

r

to

::J

0

tource

>

U

~
0.

~

2.0

0

::J
CIl

±5

±10

±15

120
100

-

~

iii
~

~
c:

'iii

...

Cl

to

"">

80

~

40
20

~

Voltage Gain
--Phase

I J

'>
1

1-58

TA=25·C
~c=15V
EE=-15V RL =2kfi

." "-

10

100

1

I

-, .....

,

lk 10k lOOk 1M
Frequency f(Hz)

20

10

30

Output Current

Input Noise Voltage

Frequency

\.

60

0

VB

-------

0

±20

Supply Voltage Vee. VEE (V)

Voltage Gain

~

Sin\.

-10
-15

0

TA =25·C·
~e=15V
EE=-15

10

20·C

0

Output Current

fo-

TA =-30·C

<"

VB

0

~:>

-30
-60

(5'

-90

e.

UJ

120
-150

.
:;

0

.c:
n.

20

c:

10

%'..

5

..
""
>
.."'
0

40

b (mA)

VB

Frequency
TA=25·C
~e=15V
E=-15V

~

0

15

z
:;

2

'0.

-180

10M 100M

.5

1
10

100

10k
lk
Frequency f (Hz)

lOOk

Imll~III~I~I~IIIIIIIIIIIIIIII~I~~IIII~~I~1
FUJITSU
MB47833 1IIIIIIIIIIIIIIImlllllllll~~~I~III~I~III~111

TYPICAL PERFORMANCE CHARACTERISTICS continued
Pulse Response vs Measurement Circuit

Pulse Response Characteristics
15

~
0
>

..
'6

10
5

R

II
CI

0

>

!ic.
!i

0

-5
TA=25°C
Vcc=15V

-10

2

4
Time t(/LS)

6

Vcc=-15V
R=2kO
C=100pF

8

1-59

..

~~IOOI~~II.~~~I~I~~II~
FUJITSU
1~~IIIII~III~OOI~~~OO MB47833

PACKAGE DIMENSIONS
8-LEAD PLASTIC DUAL-IN-LINE PACKAGE
(CASE No.: DIP-08P-M01)

I

INDEX

.244 ± .010

(6.20 ± 0.25)

!C;=;==r==;=;=:r==r==?!~
.1
~ 8:;8)
(9.40

.035~ :81~
(0.89 ~ 8:~)

14-.......-.100

(0.25

± 0.05)

(2.54) TYP

.172 (4.36) MAX

.118 (3.0) MIN
.018 ± .003
(0.46 ± 0.08)

"''1--- .060 ~ 0012
Dimensions In
Inches (millimeters)

1-60

(1.52

~

8. 30 )
oo8006S-2C

111111~1~11111~111~11111111~llllllllmll~III~1
FUJITSU

MB47833

111111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS (continued)
8-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT-08P-M01)
.002 (0.05) (MIN)
(STAND OFF)

.268:

.209
(5.30

:g~g

~g~,

± ,012

± 0.25)

t

.020 + .OOB
(0.50 ± 0.20)

of
tl tl )1..
-Ct.-----L-

(2.15) MAX

.0315
(O.BO

Dimensions In
Inches (millimeters)

± .008

± 0.20)

FOB002S-2C

1-61

..

~111111111~11111111111111~111~1~111~11~llml
FUJITSU

~1~1~~I~llm~mll!mllmlllllll!~I~I~11 MB47833

PACKAGE DIMENSIONS continued
9-LEAO PLASTIC SINGLE-IN-LINE PACKAGE
(CASE No.: SIP-09P-M01)

122(3.10)MAX

D

L

.236±.01O

(6.00

INDEX
/

Lb-0-.::::::r-=-.::::r-=--.::::r--.:::::lr--.:=--=T"'I:

.010 ± .002
(0.25 ± 0.05)

LDimensions In
Inches (millimeters)

1-62

.100(2.54)TYP

809OO28-2C

Section 2

Comparators -

D

At a Glance
Power
Supply (V)

Package
Options

High Speed
(IPO = SOns)
VRO= 2 mV

+1210-6

8-pin

Plastic DIP, FPT

Single

High Speed
(IPO= 25n5)
VRO= 1mV

+1210-6

8-pin

Plastic DIP, FPT

MB4204

Quad

Low Power
(Icc = O.8mA)

+210 +36

14-pin Plastic DIP, FPT

2--21

MB4205

Single

High Power
IOl = O.5mA wI
Over Current Umil

+6.510+18

8-pin Plastic SIP

2-29

MB47393

Dual

Wide PIS
Voltage Range

+210 +36
±11o±18

8-pin
9-pin

Page

Device

Description

2-.'3

MB4001

Single

2-7

MB4002

2-15

F..tu....

Plastic FPT
Plastic SIP

2-1

Comparators

2-2

Linear Dara Book.

MB4001
April 1989
Edition 1.0

HIGH SPEED COMPARATOR
The Fujitsu MB4001 is a Monolithic High Speed Comparator. Its single'end
output circuit is low impedance and input offset voltage is small, besides
the device operation is stable against temperature variation. MB4001 is com·
patible with !lA710.

•

High Speed - 50 ns typo

•

Small Input offset voltage

•

Low output impedance

•

PLASTIC PACKAGE
DIP·08P·M01

Package
Plastic a·pin Dual·ln·Line (Suffix: ·P)
Plastic a·pin FLAT Package (Suffix: ·PF)

PLASTIC PACKAGE
FPT·08p·M01

ITA = 25°C)

ABSOLUTE MAXIMUM RATINGS (See NOTE)

PIN ASSIGNMENT
Rating

Symbol

Value

Unit

Power Supply Voltage

Vee

+14

V

Power Supply Voltage

VEE

-7

V

Input Voltage

VI

±7

V

Storage Temperature

T STG

-55 to +125

°c

Operating Temperature

TA

-20 to +75

°c

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

(TOP

VIEW)

This device contains circuitry to protect the
inputs against damage due to high static volt-

ages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi·
mum rated voltages to this high impedance
circuit.

2-3

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImii

FUJITSU
IImllllllllmllllllllllllllmllllllllllmllllll

MB4001

Fig. 1 - MB4001 EQUIVALENT CIRCUIT

,-----....---T"---.-----{

8

+---.---{

7

OUT

J---r"V\/V-.4---+-'----{ 1

GND

'-----'-----+------{ 4

Vee

VEE

RECOMMENDED OPERATING CONDITIONS
Parameter

2-4

Symbol

Value

Unit

Power Supply Voltage

Vee

+12±5%

V

Power Supply Voltage

VEE

-6±5%

V

Operating Temperature

TA

-20 to +75

°c

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4001

ELECTRICAL CHARACTERISTICS

1111111111111111111111111111111111111111111111111111

(T A = 25°C)
Value

Symbol

Parameter

Condition

Unit
Min

Typ

Max

2

5

Input Offset Voltage

VIO

Rs :0;: 200n, Vo = l.4V

Input Offset Current

110

Vo=l.4V

1

IJ.A

Input Bias Current

II

Vo=l.4V

10

IJ.A

f = 1kHz, output pin is open

mV

Voltage Gain

Av

Propagation Delay Time

tpd

VI = 5mV, over drive

High-level Output Voltage

V OH

(WI ~ 10mV, 1 18 = 4OIJ.A

Low-level Output Voltage

VOL

(WI ~ 10mV, 10L = 1.61J.A

-0.5

Power Supply Current

Icc

Vo = l.4V

6

mA

Power Supply Current

lee

Vo = 1.4V

5

mA

600

1500

2_5

3.2

ns

50

V
0.37

V

TYPICAL CHARACTERISTICS CURVES
Fig. 3 - PULSE RESPONSE

Fig_ 2 - OUTPUT VOLTAGE
vs_ INPUT VOLTAGE

s
~

4

0

3

>
w
(!)

~
..J
0
>
f::J

13.2~nt-

:\

:\
\

2

Vcc=
Vee = -S.SV

I

I

Vcc= 12.0V'/V eE =-6.0V
~Vcc= 10.8V

-1

0

-2

«

f-

B>
>5~

3.0

5

1.0

o

~ Vee = -S.4V~

«

-1.0

f-..J>
o E
> -::.

-

f->

-3.

-8 -6

-4

-2

0

2

4

S

8

12

z

100 ~
50

0
-5 0

INPUT VOLTAGE VI (mV)

;;
E

{

2.0

"-

o

0

"-

f::J

w

(!)

o

50 100 150 200 250
TIME t (ns)

Fig_ 4 - INPUT OFFSET VOLTAGE
vs. TEMPERATURE

o

->

w

(!)

~
..J
o
>
~

IJl

"-

~

O~~-+--~+--+~~+-~
-11--+--+---1---+--+---I~+---I

5 -21--+--+---1---+--+---1--+---1
"-

z

-:!"SO","_-f.40~_2t:0:---C0!'--";;20:;--:4t;0--;;6';;'O---
w
C!l

V~e = 12v
100JI-V EE - 6V kd-.~a~
25°C
70°CW

f-

:>

w
C!l



-6

-4

-2

I
0

2

4

6

INPUT VOLTAGE VI (mVi

2-10

ve~ ~~ -6V
12l
1700 I--VEE

z 1600

C!l

f-

:>

>


0-

1800

Fig. 9 - VOLTAGE GAIN
vs. TEMPERATURE

1500
1400
1300
1200
-20

............

I'-..

-.........

-

0 20 40 60 80 100
TEMPERATURE TA (OCi

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4002

1111111111111111111111111111111111111111111111111111

TYPICAL CHARACTERISTICS CURVES (continued)
Fig. 10 - INPUT BIAS CURRENT
'5. TEMPERATURE
12

I'--..
t-

z

8

c:
c:

:J

6

'"~

4

~

r-.. r--...

w

J =-6~1
ee = 12V
VEE

a

t-

a

0.8
0.6

tw
~

~

2

~

o
0
40
60
80
20
TEMPERATURE T A ("CI

2.8

V~e=l~V

;

2. 7

t~

VEE =-6V V OL =0.2V

2.6

c:
c:

100

0.4
O. 2

0

2. 5
2. 4

--...

20
40
60
80
TEMPER.ATURE TA lOCI

100

Fig. 13 - OUTPUT VOLTAGE
'5. TEMPERATURE

,I

V OH

~

3

w

'"

o

-20

4

Vee = 12V

Cl

~
o

~

>

1'-

r- VEE =-6V
2

V TH

-

t-

~

t-

t-

:J

:J

1=

..........

Co

E

'enz"

~ ..........

o

Fig. 12 - OUTPUT SINK CURRENT
'5. TEMPERATURE

a

--

LL

-20

-;(

112~_

)ee =
VEE = -6V

1.0

c:
c:

'"t-

a.
~

~ 1.2

iji

1"

U

:J

Fig. 11 - INPUT OFFSET CURRENT
'5 TEMPERATURE

o

2. 3

1
VOL

:J

o

2. 2
-20

0
20
40
60
80
0
TEMPERATURE TA lOCI

100

o

20
60
40
TEMPERATURE T A lOCI

2-11

m~llllllllllllllmllllllllllllllllllllllllllllll
FUJITSU
Ilmlllllllllllllllllllll~111111111111111111111111

MB4002

TYPICAL CHARACTERISTICS CURVES (continued)

IfJI

Fig. 14 - OUTPUT VOLTAGE

vs. POWER SUPPLY VOLTAGE
w

4.0

C)

«
~

3.S

o

I

3.0

~>

1--

:r 2.S

00

-,>
~

w

2.0

/

V

-

VJE

(V OH ) . " .

>
I:::l

TA-2S0C
VI = 10mV

:I:

I.S

VEE

i

-7V

0.3 1-:::l>

.1

~>

o

E 100

>-

~>

T I
I I

a

0..

~

0....J

1':"6V

i I
-7V

-'

0.1

~
w
-'

a ~

-'

~.1

8
9
10
11
12
13
14
POWER SUPPLY VOLTAGE Vee (V)

TIME (ns)

Fig. 17 - COMMON MODE INPUT
PULSE CHARACTERISTICS

Fig. 16 - SWITCHING RESPONSE (2)
TA = 2SoC

t IIII ~ II

III11111

~

3~~~~--}-~~~~

6>

2t--t--t-----r"",f-=-=+"--'+'~~

~

>a
::»

I-

5
o

2-12

!

vee = 12V
VEE =-6V

0.2 6~

I~

(VOL)

VEE

~

o

>

VEE=-SV

1~

«

TA = 2SoC

C)

«

I-

VEE

po-

C)

~.- 0.4

\1

-'

:i:

S!

=-L

Fig. 15 - SWITCHING RESPONSE (1)

w

o.S w

11--+--+---+-wlb-

OL-~-o~~~~~~~~
TIME (ns)

w

C)

i~ ~tflill
o

a

20

m

40 60 80 100 120 140
TIME (ns)

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4002

1111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
a-LEAD PLASTIC DUAL IN-LINE PACKAGE
(Case No. : DIP-8P-MOI)

INDEX
.244± .01 0
16.20±0.25)

~:::;::::;::=;=r=?'~
039~J>12

I[

(099~g30)

[060~J>12
(1.52~g30)

035~gl~
--

~-

(089~g~5)
.172(4.36) MAX

.118(3.00) MIN

.100(2.54)

.018±.003

TYP

(0.46 ± 0.08)

© 1988 FUJITSU LIMITED DD8006S-2C

Dimensions in
inches (millimeters)

2-13

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImllllllllllllllili

FUJITSU
1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImil

MB4002

PACKAGE DIMENSIONS (continued)
8-LEAD PLASTIC FLAT PACKAGE
(Case No.: FPT-8P-MOI)

.250~~g

08912 25) MAX
ISEATED HEIGHT)
.00210.05) MIN

_1J"r
INDEX

om

.268 ~g6~1680 ~ g~g)

cf
.050(1.27)

TYP

."A••

.02010 .50):
.00710.18) :
MAX
'
.02710.68) :
MAX
______________
.J'

©1988 FUJITSU LIMITED F08002S-3C

2-14

Dimensions in

inches (millimeters)

MB4204

May 1988
Edition 1.0

QUAD COMPARATOR
The Fujitsu MB4204 Is a Quad Comparator which consists of four Independent channels.
The MB4204 Is designed to operate form either a single power or dual power supplies
over a wide range of voltages. The Input characteristics Is equivalent of current Industry
standard comparator. Even though operated from a single power supply, the MB4204 Is
suitably designed to compare multiple signals In parallel and to be operated with battery
because Its Input common mode voltage range Includes ground potential and It requires
low power supply current.
The MB4204 can be high density mounted because It Integrates 4 circuits on a chip In
DIP/FPT - 14-pln package.

PLASTIC PACKAGE
DIP-14P-M02

The MB4204 Is pin compatible with National Semiconductor LM339.
• Wide power supply voltage range: +2 to +36V
• Wide Input common mode range: 0 to (Vee-l.5) V
• Low power supply current: 0.8 mA typ.
• Low Input offset voltage: 2mV typo
• Low Input bias current: 25nA typo
PLASTIC PACKAGE
FPT-14P-M01

• Open Collectors Output allow to wired-OR Connection
• Package
- 14-pln Plastic DIP Package (Suffix: -PI
-

PIN ASSIGNMENT

14-pln Plastic FPT Package (Suffix: -PF)

ABSOLUTE MAXIMUM RATINGS (see NOTE)
Rating

Symbol

Value

Unit

Power Supply Voltage

Vee

36

V

Power Dissipation

Po

500

mW

Differential Input Voltage

VID

36

V

+IN-D
-IN-D
+IN-C

Common Mode Input Voltage

VI

-0.3 to +36

V

-IN-C

Output Short Circuit Duration

OUT-C
OUT-D
GND

Infinite

Operating Temperature

TA

-20 to +75

·C

Storage Temperature

TSTG

-55 to +125

·C

NOTE: Permanent device damage may occur If the above Absolute Maximum
Ratings are exceeded. Functional operation should be restricted to the
conditions as detailed In the operational sections of this data sheet. Exposure
to absolute maximum rating conditions for extended periods may affect
device reliability.

(TOP VIEW)

This device contains circuitry to protect the
Inputs against damage due to high static
voltages or electric fields.
However. It Is
advised that normal precautions be taken to
avoid application 01 any voltage higher than
maximum rated voltages to this high impedance
circuit.

Copyright ©1988 FUJITSU LIMITED and Fulltsu Microelectronics, Inc.

2-15

i~il~lllil~ililimlli~i~li~1
FWITSV

11~~~liilili~I~II~i~~~ill

MB4204

Fig. 2 - EQUIVALENT CIRCUIT

Vee

GNO

2-16

-IN-A

+IN-A -IN-B

+IN-B -IN-C

OUT-A

OUT-B

-IN-C -IN-O

OUT-C

+IN-O

OUT-O

111111111111111111111111111111111111111111111111111111

FUJITSU

MB4204

ELECTRICAL CHARACTERISTICS

111111111111111111111111111111111111111111111111111111

(VCC=+5V, TA=25°C)
Value

Parameter

Symbol

Condition

Min

Unit

Typ

Max

2

5

mV

Input Offset Voltage

Via

Input Offset Current

110

5

50

nA

Input Bias Current

II ·1

25

250

nA

Input Common Mode Voltage

VOM

Vee -1.5

V

Voltage Gain

Av

Va = VREF = 1.4V

0
RL=15kO

Transconductance

200

V/mV

13

mhos

Large Signal Response Time

·2

RL=5.1kO. VRL=5V

300

ns

Response Time

·3

RL=5.1kO. VRL=5V

1.3

Ils

Output Saturation Voltage

VOL

VIN-=lV. VIN+= OV. ISINK=3 mA

250

Output Sink Current

ISINK

VIN- =lV. VIN+=OV.

Output Leakage Current

ILEAK

VIN+=lV. VIN-=OV. Vo=5V

Output Leakage Current

ILEAK

VIN+=lV. VIN-=OV. Vo=30V

Power Supply Current

lee

RL=OO

V~1.5V

6

400

mV

16

mA

0.1

nA

0.8

1

Il A

2

mA

Notes:
·1 The direction of the Input bias current flows from IC.
·2 VIN = TTL Logic Swing. VREF = 1.4 V
·3 VIN = 100 mY. Overdrive = 5 mV

2-17

~IIII~MI~.
FUJITSU

Ilillil!~llllnllll~~!~III~

MB4204

Fig. 3 - TEST CIRCUIT
Vee

VRL
Vee
SV
RL=S.lkO

VIN(+)

>-......-0 Vo

Vo
VIN(-)

TYPICAL CHARACTERISTICS CURVES

~
~

IZ

Fig. 5 - Output Saturation Voltage
Output Sink Current

Fig. 4 - Power Supply Current VB.
Power Supply Voltage
1.6 r--""---r----rr----,

VB.

1.2 I---+--I=_""I"!==:~

~

a:

::>

o

~fl.

::>

II)

0.4

1---+--11---+--1

a:

~

OL..._"'-_-'-_....L._.......
o

10

20

30

0.001 L...L......L.--'_..L.-...L.--'_..L.-.....
0.01 0.03 0.1 0.3 1
3 10 30 100

40

Power Supply Voltage Vee (V)

w
Cl

~

0
>

I-

Fig. S - Input/Output Voltage
Time

6
InpLt

,,'1

"" ---1

4

w
Cl

«

2

0
0

\~".tJ

,

100mV

4

o

t

1'1
sJ

100r

1.0
I.S
Time (Ils)

Input Over Drive

2

~

1

I
O.S

vs.

20mV

20m

1

0
>- -100

2-18

J

TA =2SoC

...J

~>

6

ove~ Drlv~

1

~

I-

~~
fl.-

Fig. 7 - Input/Output Voltage
Time

VB.

_,-smv

::>-

fl.>
1-::>0
0>

Output Sink Current ISINK (mA)

2.0

w
Cl

«

~
0
>1->
::>E
fl.~>

0

- -

~
~

~

100
TA =2SoC

I

0

o

o.s

1.0
I.S
Time (Ils)

I
2.0

~~IIIIIIIIIIIIII~I~III~IIIIIIIIIIIII~I~I~I~I
FUJITSU

MB4204

11111111111~11111111!llllllllllllllllllllllllmllll

PACKAGE DIMENSIONS
14-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT-14P-M01)

(10.15

)

~ g:~~

AAAA A
.209 ± .012
(5.30 ± 0.30)

I

,307 ± .016

'=:::""""'~;::;::n=n=n=n=n=iT~

II

I I
1---1 ~ •

TYP

&n..

0.40)

.018 ± .004
(0.45 ± o. 10)

n=nJ1~~~(2'15)

n __n J J__

.031 ± .OOS
(0.80 ± 0.20)

Dimensions In
Inches (millimeters)

F14003S-2C

2-19

1!~I~~I~III~il~1l
FUdITSU

~I~~~I~I~~~I~~.I

MB4204

PACKAGE DIMENSIONS Continued
14-LEAD PLASTIC DUAL-IN-LINE PACKAGE
(CASE No.: DIP-14P-M02)

I

INOEX-l

~~;==;r=rr=r=;==;=;=r=;===j=;==;==r==r=~

:rO.~)
.244 ± .010

.I
.085
(2.15

.010

± 0.25)

• 172 (4. 36) MAX

.118(3.00)MIN

.018 ± .003
---I114 (0.48
± 0.08)
0140108-3C

2-20

MB4205

March 1988
Edition 1.0

HIGH POWER COMPARATOR
The Fujitsu MB4205 Is a comparator which Is designed to operate from a single
power supply voltage. It Is capable of driving a load up to 0.5 A and have the
current limiting circuitry, It enables a direct drive warning lamps.
As It Is packaged In 8-pln plastic SIP package with heat sink, It enables easy
mounting.
It Is equipped with the function which turns the output "ON" by force, when the
surge Is Inflicted In the application of automobile, and so on.
•

PNP transistor Input enables Input control voltage from 0 V and a single
power supply voltage operation

•

High output drive capability : 0.5 A

•

Resistance comparlon Is achieved due to on-chip swltchable
constant-current supply souce
(Several hundred 0 to several kilo 01

•

Hysteresis Is set easily because VOH level and VR level Is almost same

•
•

On-chip current limiting circuitry
Common pin for Input control voltage pin Vcs and reference voltage
output pin VR

PLASTIC PACKAGE
SIP-08P-M01

PIN ASSIGNMENT
ABSOLUTE MAXIMUM RATINGS (see NOTE)
Rating

Symbol

Power Supply Voltage

Vcc

Power Supply Current (Surge)

Iccs

Load Current

Condition

Value

Unit

18

V

ts50ms

100

mA

IOL

500

mA

Output Voltage

VOH

40

V

Power Dissipation

Po

TA$85·C

1

W

TC$85·C

4

W

Operating Temperature

TA

-30 to +85

·C

Storage Temperature

TSTG

-55 to +125

·C

NOTE:

Permanent device damage may occur If the above Absolute
Maximum Ratings are exceeded. Functional operation should be
restricted to the conditions as detailed In the operational sections of
this data sheet. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
This device contains circuitry to protect the Inputs
against damage due to high static voltages or electric
fields, However, It Is advised that normal precautions
be taken to avoid application of any voltage higher
than maximum rated voltages to this high impedance

circuit.

Copyrlght tl 1988 by FUJITSU UMITEO and Fujitsu Microelectronics, Inc.

2-21

111111111111~111~llllllmll~IIIIIII~I~lllil~11
FUJITSU

Imllllllllllllmmlllllllllll~~III~mlllllml MB4205

Fig. 1 - MB4205 EQUIVALENT CIRCUIT

Vee

OUTC VRlVes

-INC

2-22

+INC

-INP

OUTP

GND

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~IIIIII
FUJITSU
MB4205

111111111111111111111111111111111111111111111111111111

ELECTRICAL CHARACTERISTICS (TA=25·C, Vcc=13.2V, Rs=22on, RL=54fi)

Note: Input bias current flows from the IC.

2-23

~i~~llli~~~i~~~I!.~~1
FWITSl1
111!llllli!l~ill~~IIIIII~IIIII~i~I~~1

MB4205

ELECTRICAL CHARACTERISTICS CURVES
FIG. 2 - POWER SUPPLY CURRENT VS.
POWER SUPPLY VOLTAGE

FIG. 3 - INPUT BIAS CURRENT VS.
POWER SUPPLY VOLTAGE

:(

1

.§.
~

10

1----:=;001-""""''--

Vess 0.8V

III

I-

zw

I- 1.1
zw

~

a:

:>

°~

1 .2

a:
:> 1.0

5

°

1-----+------1

Ul

~

0..

:>

ttl

Ul

0.9

I-

a:

:>

~

0..

1!:

a

10

o

20

POWER SUPPLY VOLTAGE Vee (V)

FIG. 4 -

10

20

POWER SUPPLY VOLTAGE Vee (V)

REFERENCE VOLTAGE/OUTPUT
VOLTAGE VS. TEMPERATURE

FIG. 5 -

REFERENCE VOLTAGE VS. LOAD CURRENT
INPUT CONTROL VOLTAGE VS.
INPUT CONTROL CURRENT

5.6

>->
",>" 5.5
wO
CJ>
«w
I-CJ
....1«
0:; 5.4
>0
w>

Vee=10V
RL=100kO

./

01-

ffi~
a: I~:>
wO
a:

./'

veJ=10V

./

/

""'1 1
85°C

5.3

'-~

5.2
-50

a

50

TEMPERATURE TA (OC)

2-24

25°C

100

a

0.5

1\=30°1

1.0

1.5

LOAD CURRENT IR (mA)
INPUT CONTROL CURRENT les (mA)

111111111111111111111111111111111111111111111111111111

FUJITSU

MB4205

ELECTRICAL CHARACTERISTICS CURVES
FIG. 6 -OUTPUT VOLTAGE VS.
INPUT VOLTAGE

~

~ 1.1

15

Q.

-'

o

>

~ o. 9 I--t:;;..~+::::;;;........,=t-----="""""==-----I

w

Cl

I::J

(Continued)

FIG. 7 -OUTPUT VOLTAGE VS.
INPUT CURRENT

0

CJ

0

2.0

00-

-

~ ----2S o C

~
~~

..,.... - 7 S

oC

...... .- ~ i"""'"

::>

II)

cr

~

~
z
o

~
::>

0.1

II)

0.01

~

1.0

UJ

I-

~

::>

0I-

0

0-

w

o
10

20

30

40

POWER SUPPLY VOLT AGE Vee (V)

5

0.001
0.01

0.1

10

100

OUTPUT SINK CURRENT ISINK (mA)

2-31

~lmml~IIIIIIIIIIIIII~~~II~~~lllmmm~
FWITSU

11~11111~1~1~1~llm~llml~lll~m~I~111111 MB47393

TYPICAL CHARACTERISTIC CURVES

Fig. 4 - INPUT CURRENT

Fig. 5 - INPUT VOLTAGE/OUTPUT
VOLTAGE VI RESPONSE TIME

VI INPUT VOLTAGE

,...~

(mA)
100

zw

w

~

~
,...

50

,...

~

~ 0

(j!.A)

-100

0

V

-100

I

-150
-1.0

,
{

/

20mV

-0.5

,...-

2

w

0

c(

~

0

..

J

20

6

Cl

Input Over

-'

i---

,...c(
4

30

O.S

2

W

0

0

Cl

~

0

D~lve

5mV

....

i-'--

.

~>
,... E
~ ;- 100
~5

0.5

1
TIME t (j!.s)

2-32

0.5

2

Vcc=Sv

I

100mV _

0

0.5

Fig. 7 - TEST CIRCUIT

0>

c(

1
TIME t (j!.s)

I

,...::J

~

~5

20mv'

::J-

11.>

.

~ ;- -100

10

0

Fig. 6 - INPUT VOLTAGEIOUTPUT
VOLTAGE vs RESPONSE TIME

0

~ Input Over Drive

IJ

~>E
,...

0

,...>

SmV

",

INPUT VOLTAGE VIN- (V)

w

(

1tmv

11.>
5~
Cl

(

(

4

::J-

-50

-300

6

Cl

Vcc=5v

c:
c:

::J
U

(Continued)

2

",

±~~~
71"

~=

RL=S.1kO
Vo

Over drive value Is fixed by VREF.

1111111111111111111111111111111111111111111111111111

FUJITSU

MB47393

1111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
a-LEAD PLASTIC DUAL-IN-LINE PACKAGE
(CASE No.: DIP-OSP-M01)

I

INDEX

.244:t. .010

~:;::::;::::::;::;=:;::::;:=?! ~:t. 0.25)

I.

.370

•

~ :g1~

(9.40

.1

~ g:;g )

035 + ,014

- .012

(0.89 ~ g:~

)

...-*--.100 (2.54) TYP

.172 (4.36) MAX

.118 (3.0) MIN

----""""--+-.1.
.01S:t. .003
(0.46:t. 0.08)

~,--_ .080 ~

0° 12

(1.52 ~ g.30)

Dimensions In
Inches (millimeters)

oo8006S-20

2-33

IlImll~llmmiIOOIII!
FUJITSU

1llllmm~mlmillOO MB47393

PACKAGE DIMENSIONS

(Continued)

a-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT-08P-M01)

r; '250::86g~
+ 0.25)
(835
.
- 0.20

1

INDEX

.307:1:..018
(7.80:1:. 0.40)

G
I.t::;::;::::;::;::::::;:;:~ --.l
_/

.050 (1.27) TYP

I. _I -II

.209:1:..012
(5.30:1:. 0.25)

.018:1:. .004
II (0.45:1:. 0.10)

«([j'} 0 0 0
'. . . . .'
tA

Dimensions In
Inches (millimeters)

2-34

.020 + .008
(O.SO:l:. 0.20)

)....,1...--_·tL..(2.15) MAX

f
.0315:1:..008
(0.80:1:. 0.20)

F08002S-2C

1111111111111111111111111111111111111111111111111111

FUJITSU

MB47393

PACKAGE DIMENSIONS

1111111111111111111111111111111111111111111111111111

(Continued)

9-LEAD PLASTIC SINGLE-IN-LiNE PACKAGE
(CASE No.: SIP-09P-M01)

C.039(1 ,00)

I_

,122(3.10)MAX
(22,25

~ g~~)

~~~==I=ND=EX======================~

DOL 0

,236± ,010

(6

D

/

1b--=::r-1=--':=::r-1=-,:::::r--=.--.:=--=:rt:
.010 ± ,002
(0.25 ± 0,05)

I.Dimensions In
inches (millimeters)

,100(2,54)TYP

S09002S-2C

2-35

Comparators

2-36

Linear Data Book

--------------~--- Section 3
Automotive Audio - At a Glance
Page

3-3

Device
MB3106

Description
Dual Pre-amplifier

Featur..

Low Distortion
(0.05%).

Power
Supply (V)

Package
Options

+6 to +16

S-pin Plastic SIP

Dual Con1r01 Amplifier Volume and Balance
con1rol,
20cIB Voltage Gain

+6 to +16

S-pin Plastic SIP

+810 +16

17-pin Plastic ZIP

VND=120~V

3-11

MB3110A

3-17

MB3111

3-25

MB3714A

Distortion

.01% THO

UmitinglC

Low Noise 5 ~V

6 W Power Amplifier

PO=6W/40,

+8 to +16

10 W120 Audio Mute
Full Protection Circuits
3-31

MB3120

Compandor IC

3-43

MB3722

Dual Power Amplifier Audio Mute Full
Protection

Compression!
Expansion
Mute, Low THO

S-pin Plastic SIP
(with Heatsink)

+3.2 to +10

16-pin Plastic FPT
17-pin Plastic ZIP

+8 to +16

12-pin Plastic SIP
(with Heatsink)

+8to+16

7-pin Plastic SIP
(with Heatsink)

+810+16

12-pin Plastic SIP
(with Heatsink)

+810+16

7-pin Plastic SIP
9-pin Plastic SIP

+810 +16

12-pin Plastic SIP

PO=14W/40

3-49

3-55

3-61

3-89

MB3730A

MB3731

MB37321
MB3734

MB3733

Balanced
Transfoonerless

Audio Mute Full
Protection

(BTL) AmpUfier

PO=18W/40

Balanced
Transfoonerless

Audio Mute Full
Protection

(BTL) Amplifier

PO=14W/40

Balanced
Transfoonerless

Audio Mute Full
Protection

(BTL) Amplifier

PO=20W/40

Balanced
Transfoonerless
(BTL) Amplifier

Audio Mute Full
Protection

3-1

------------------Section 3
Automotive Audio - At a Glance (Continued)
Page

Device

3-75

MB3735

3-81

3-89

MB3736

MB3737A

Description

Features

Balanced
Transforme~ess

DC Mute Full
Protection

(BTL) Amplifoer

PO=15W/40.

Balanced
Transform~ess

DC Mute Full
Protection

(BTL) Amplfier

PO= 15W/40.

Balanced
Transforme~ess

DC Mute Full
Protection

(BTL) Amplifier

PO=23W/40.

Power
Supply (V)

Package
Options

+8to+16

9-pin Plastic SIP
(with heatSink)

+8 to +16

9-pin Plastic SIP
(with heatsink)

+8 to +16

12-pin Plastic SIP, ZIP
(with heatsink)

+910+16

17-pin Plastic ZIP

with Vcc Standby
3-97

MB3742

Dual BTL Amplifier

Standby Mode
Protection
PO=15Wx2l0

3-2

3-105

MB3764

9-Lewl Detector and Internal Reference
Driwr for Level Meter 10 = 20 mA maximum

+3.210 +16

16-pin Plastic DIP

3-115

MB4104/
MB4105

FM Stereo
Multiplex

Low Distortion
.06% @ 300 mil

+8to+16

16-pin Plastic DIP

3-125

MBB7032

2-channel Elec.
Volume Controller

For Stereo, TV, Video
1 dB Steps

+6 to +10

16-pin Plastic DIP

MB3106
October 1987
Edition 1.0

DUAL lOW NOISE PRE-AMPLIFIER
The Fujitsu MB3106 Is a dual low noise pre-amplifier housed In a single In-line
package for high density mounting on printed circuit boards for automotive
audio stereo systems.

IDI

The MB3l06 has a power supply stabilization circuit for low power supply
voltage. and Is designed to Improve power efficiency at the output stage.
Therefore. the MB3l06 provides a wide output range. and can stably operate
In a wide power supply voltage range and In a wide temperature range.
The MB3l06 provides high gain In a low frequency range. because the
feedback resistor operates In a wide tolerance condition.
•

High open loop gain : 90 dB typical

•

Input noise voltage : 1 /LV typical

•

Protection circuit against over voltage at Input stage

•

On-chip power supply stabilizer

•

Wide power supply range and high ripple rejection

•

Package : 8-pln plastic SIP package

•

Minimized number of external parts. due to on-chip bias circuit.

PLASTIC PACKAGE
SIP-OSP-M03

PIN ASSIGNMENT

(Front View)

ABSOLUTE MAXIMUM RATINGS (see NOTE)
Rating

Symbol

Value

Unit
+IN-B

Power Supply Voltage

Vee

Power Dissipation

Po

Operating Temperature

TA

Storage Temperature

TSTG

NOTE:

18

V

-IN-B

mW

OUT-B

-20 to +75

·c

GND

-55 to +125

·c

200 (TA~ 75 "C)

Permanent device damage may occur If the above Absolute
Maximum Ratings are exceeded. Functional operation should be
restrfcted to the conditions as detailed In the operational sections of
this data sheet. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.

Vee
OUT-A
-IN-A
+IN-A

This device contains circuitry to protect the Inputs
agaln8t damage due to high static voltages or electric
fields. However. It Is advised that normal precautions
be taken to avoid application of any voltage higher
than maximum rated yoltage. to this high impedance
circuit.

Copyright- 1987 by FUJITSU UMITEO and Fujitsu Microelectronics, Inc.

3-3

~1~~I~~~~~i~I~I~lm~lmmll
FUJITSU

~~~III~I~~I~m~m~~m~I~~IIII~~~1

M831 06

Fig. 1 -

EQUIVALENT CIRCUIT (ONE CHANNEL)

+IN

-IN

OUT

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Value

Unit

Power Supply Voltage

Vcc

6 to 16

V

Temperature

TA

-20 to +75

·C

ELECTRICAL CHARACTERISTICS

(TA= 25°C, VCC= 6V, f = 1kHz, RL = 10kn)
Values

Parameter

Symbol

Conditions

Unit
Min

Max

Icc

-

-

3

4

mA

Open Loop Voltage Gain

Avo

Vo = 0.8 V

75

90

-

dB

Closed Loop Voltage Gain

Av

Vo = 0.8 V, NAB

-

42

-

dB

Maximum Output Voltage

YOM

Power Supply Current

3-4

Typ

THO = 1%. NAB

1.0

1.6

-

V

THO

Vo = 0.8 V. NAB

-

0.05

0.3

%

Ouput Noise Voltage

V NO

Rg = 2.2K n , NAB

-

120

200

ILV

Input Resistance

RIN

NAB

50

150

-

kn

Channel Separation

-

Vo= 0.8 V. f = 10 KHz. NAB

-

65

-

dB

Ripple Rejection Ratio

-

f = 100 Hz, Rg = 2.2 Kn. NAB

-

45

-

dB

Total Harmonic Distortion

III~~IIIII~~~III~~I~I~~III~I~~I~I~I~
FUJITSU

~1~11111~11111111~~I~I~~I~~m~llllmm

MB31 06

Fig. 2 - MEASUREMENT CIRCUITS
(Only one channel is Illustrated)

2. Av • YOM. THO. VNo. RIN

1. lee. Avo

,...----.----<>
+

,-----.----<>

Vee

+

100 /! F

Vee

100 /! F

100 KO
470

47/L F

Note: V NO Is measured with the Bandpass
filter of 30Hz to 30KHz.

TYPICAL PERFORMANCE CHARACTERISTICS
TOTAL HARMONIC DISTORTION va
OUTPUT VOLTAGE
2

!
0

:I:

l-

0.5

I

e

.!!

t:

i0

~0
~
II
:I:

iI

~

VOLTAGE GAIN vs FREQUENCY

Vee = BV
r---RL =10KO

100

(Ap II atli'" I'ar PI~

r--

NAB
0.3

0.1

iii

J

" "~

0.2

~

VJ
10KH~
~

0.05

~

iCl

~H

~ t-'V
~

80

"

~'"
>

f1'" KHz

60

~

"

40

0.03
0.02
0.1

0.2

0.3

0.5 0.7 1

Output Voltage V 0 (V)

2

3

II V- A' -'r-... AvoI r - r ~
l...- V- Vee = 6V
RL =10KO
...
"

10

20

NAB

'"

50 100200 500

Av

'"'"

lk 2k

"

Sk 10k 20k SOk lOOk

Frequency f (Hz)

3-5

1~1~~~III~I~~III~rtllllllmml~11
FWITSU

~llmlll~ml~m~lm~m~I~1

M831 06

TYPICAL PERFORMANCE CHARACTERISTICS

(Continued)

POWER SUPPLY CURRENT, MAXIMUM OUTPUT VOLTAGE,
VOLTAGE GAIN vs POWER SUPPLY VOLTAGE

~

.s<
°

_0

10

1:

"l::

CI

2

5

"

0

~

«
eI

E

'5
>

.."

..

70

Application Example Fig. 5

YOM

II

CI

0

::;:

YOM

80

~

~

.~"

~

J -'
I
I

iii
>

~

U)

~

"
~
>

"

a.

~
0

()

:a

AvO
90

::>

'-

"' ,I

I

0

o

2

I cc

-,

4

6

8

10

12

14

16

Power Supply Voltage Vee (V)
POWER SUPPLY CURRENT, MAXIMUM OUTPUT VOLTAGE,
VOLTAGE GAIN vs TEMPERATURE

~

<
.s

90

::>
0

°

.2 10

>

"

CI

2

i>

1:

"l::
"

a.

"...

~

0

1

E

U)

"3:
0

o

-

YOM
~

l"- t"-

CI

70

I c

>

~

::;:

I

0

"

Il.

"
"
~

0
-40

-20

0

20

40

60

Temperature T A
MAXIMUM OUTPUT VOLTAGE vs
LOAD RESISTANCE

~

J
"

iii

1.5

I
::;:

0.5

VCC=6V

10--

I- THO = 1%

•

VV

~

II:

"
0

60

/

"
"

"i'

II:

V

40

is.
a.

1-

a:

0

20

100 200 500 lK 2K

5K 10K 20K SDK lOOK

Load Resistance (n)

3-6

J

.2
~.

80 100

CI

With RI Plel Flltt

0

f = 1 KHz

0

80

~

1
>
11.0

(

RIPPLE REJECTION RATIO vs FREQUENCY

2.5
2.0

-"""

Avo

"iii
eI

a.

5

~

~ 80

~

()

:a

iii

~

-

10

V

lkp·1 00

VlJ

J::-

~th~ut Ripple Filter

F

)"00,.

I"

Vee = 6V
RL = 10kn

N1B J

~

I
20 50 100 200500 lk 2k 5k 10k 20k SDk lOOk
Frequency f (Hz)

111111111111111111111111111111111111111111111111111111

FUJITSU

MB3106

Illmllllllllllllllllllllllllllllllllllllllllllllllll

Fig. 3 - TYPICAL APPLICATION CIRCUIT
(Only one channal is Illustrated)
1 K.n
r---~~--'JYr---o

Vee

(10V-laV)

100 J.I.

Nole:
'1. S 1 Is a mute switch for the output.

Fig. 4 -

HIGH GAIN CIRCUIT
(Only one channel is illustrated)

,---------0

vee

(BV-16V)

'2
470.n

...----+-----wr-----o
100 J.I. F

47 J.I. F

+

Vee

(10V-17V)

Notes:
'I. Av

=

=

42 dB (f 1 KHz)
Higher gain In low band Is obtained
by larger NFB constant.

'2. To Improve ripple rejection ratio.
(Improved as much as 20 dB at 100 Hz.

3-7

m~~~ill1l~II~~I~~I~1
FUJITSU

. . . MB3106

Fig. 5 -

FOR LOW VOLTAGE POWER SUPPLY
(Only one channel is illustrated)
r-----~-----------o

100/11"

+

vee

(3.5-16V)

">---_._---+1-_._---0

(VOM;; 0.3V)

Fig. 6 - FLAT AMPLIFIER CIRCUIT
(Only one channel is illustrated)

r------1-----------o vee
100/1 F

(6V-16V)

Av'~40dB

Note:

The DC Output Voltage Voo Is
obtained roughly from the following
equation.

RF

Voo "'" 0.75 (1 + Re )

3-8

II1111111111111111111111111111111111111111111111111111

FUJITSU

MB31 06

Immllml~I~~llmmllllllllllllmmllllllll

PACKAGE DIMENSIONS
8-LEAD PLASTIC SINGLE IN-LINE PACKAGE
(CASE No.: SIP-08P-M03)

.128 ± .010
(3.25 ± 0.25)

r--.774 ~ :g~~ (19.65~g:~)---,

I

INDEX-l

L

.244 ± .010
(6.20 ± 0.25)

I
.323±.012

~.~'
.157 ± .012
(4.00 ± 0.30)

~
.061

~

0012

...

.010 ± .002
(0.25 ± 0.05)

.100 (2.54) TYP

.020 ± .003
(0.50 ± 0.08)

(1.52 ~ g.30)

Dimensions In
inches (millimeters)

8080108-20

3-9

Automotill9 Audio

3-10

Linear Data Book

MB3110A
October 19B7
Edition 1.0

DUAL CONTROL AMPLIFIER
The FUJitsu MB3110A Is a dual-channel amplifier with separate volume-andbalance controls for both A-and-B channels. Each channel consists of a 20
dB amplifier with symmetrical balance attenuation over a wide range and low
distortion of audio frequencies. Thus, the MB3110A Is an excellent choice for
general-purpose audio work and media reproduction that requires high-fidelity
processing.
The amplifier circuits are designed to provide optimum
performance with a bare minimum of external parts.
The MB3110A is housed In an B-pin Single In-Line Package (SIP) that Is
especially useful where mounting space Is limited or In applications where
high-density populations are required.
•

Voltage gain: 20 dB (typical)

•

Input control voltage: OV to Vee

•

Maximum volume attenuation: BO dB (typical)

•

Maximum balance attenuation: BO dB (typical)

•

Low noise: 80 ILV rms (typical)

•

Maximum output voltage: 1. 7V rms (typical)

•

SIP package

PLASTIC PACKAGE
SIP-OSP-M03

PIN ASSIGNMENT

ABSOLUTE MAXIMUM RATINGS - T A= 25 ·C (see NOTE)
Rating

Symbol

Value

Unit

Power Supply Voltage

Vee

Input Control Voltage

Ve

Power Dissipation

Po

530 (T A':: 65 .C)

mW

Operating Temperature

TA

-20 to +75

·C

Storage Temperature

TSTG

-55 to +125

·C

16
o to Vee

V

B

IN-B

7

VOLUME

6

OUT-B

5

Vee

4

GND

3

OUT-A

V
(Front View)

BALANCE
IN-A

NOTE:

Permanent device damage may occur If the above Absolute
Maximum Ratings are exceeded. Functional operation should be
restricted to the conditions as detailed In the operational sections of
this data sheet. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
This device contains circuitry to protect the inputs
against damage due to high static voltages or electric
fields. However, it is advised that normal precautions
be taken to avoid application of any voltage higher
than maximum rated voltages to this high Impedance
circuit.

Copyright- 1987 by FUJITSU LIMITED and Fujitsu Microelectronics, Inc,

3-11

Fig. 1 -

MB3110A BLOCK DIAGRAM

~

Chan-A
Input

Vee 0 - - .

r'

Chan-A
Output

I
I

GNDo--.

Volume
Control

Balance
Control

I

o Volume

I

Balance

I

....
Chan-B
Input

yA~""

Chan-B
Output

ELECTRICAL CHARACTERISTICS
RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Value

Unit

Power Supply Voltage

Vee

6 to 12

V

Load Resistance

RL

Operating Temperature

TA

3-12

~

32

-20 to +75

n
·C

111111111111111111111111111111111111111111111111111111

FUJITSU

MB311 OA I I I I I I I I I I I I I I I~I I I I I I I I I I I I

ELECTRICAL CHARACTERISTICS
AC CHARACTERISTICS (V cc ; 9V, RL ; 100n, f; 1kHz, V IN ; 50 mV rms, and T A ; 25°C unless otherwise specified)
Values
Parameter

Symbol

Conditions (Note)

Unit
VVOL (V)

Min

Typ

Max

8

14'

mA

9.0

-

-

9.0

18

20

22

dB

AVMC

-

4.0

8.5

10

11.5

dB

AVMM

-

0

70

80

-

dB

VSAL ; 4.SV

9.0

0.5

2.5

4.0

dB

ASLM

VSAL; OV/9V

9.0

70

80

-

dB

Channel Balance

CB

-

9.0

-1

0

+1

dB

Channel Separation

CS

-

9.0

-

60

-

dB

Power Supply Current

I cc

Voltage Gain

Avo

Volume Attenuation
Maximum Volume
Attenuation
Balance Attenuation at
Center Position

ASLC

Maximum Balance
Attenuation

VIN; OV

Total Harmonic Distortion

THO

-

9.0

-

0.1

0.5

%

Maximum Output Voltage

V OM

THD;1%

9.0

1.2

1.7

-

Vrms

Output Noise Voltage

V NO

0

-

80

200

Il.Vrms

BW

;R~o;t::"20kHz

Input Resistance

RIN

-

9.0

15

20

-

kn

Volume Control Input Current

17H

-

9.0

90

150

250

Il.A

High-level Balance Control
Current

12H

V SAL ; 9.0V

9.0

36

60

100

Il.A

Low-level Balance Control
Current

12L

V SAL ; OV

9.0

-100

-60

-36

Il.A

NOTe:

Balance control pin Is open unless otherwise specified.

3-13

_ _I
FWITSU

"111~i

MB3110A

Fig. 2 - TEST CIRCUIT

,----------.--------0 Vee
100 II. F

3,311. F

5

+

3

10011. F

+

+

6
I

I

l.
0,1 II. if

3.311. F

l.

10011. F

;0.1

II. F

~10n~10n
I

RL

RL

I

I

I

~

"$

Notes:
1.

When measuring THO and VNO • a bandpass filter with a bandwidth of 20Hz-to-20kHz Is required; when
measuring CS. a bandpass filter with a center frequency (fc) of 1 kHz Is required.

2.

Dotted-line components are used to Inhibit parasitic oscillations.

TYPICAL PERFORMANCE CHARACTERISTICS
VOLUME RESPONSE

0

iii
E.
::;

J

L

20

til::s

40

~

Vee= 9V
RL =100n
Y'N - 50mVrms
f
= 1kHz

I

c

~"
~

I
~I

/

c

.2

60

BALANCE RESPONSE

ol--+-"';:::"~

-

\

:r---+--I

-20

Vee = 9V
Y'N = 50mV \

-40

VVOL = MAX

-

~

I I --\+----1
,

-60
80

..
o

2

4

6

8

Volume Control Voltage V VOL (V)

3-14

<;;j

10

-100

L-_"'--_..._...I.._..I...._...

o

10
4
6
8
2
Balance Control Voltage V BAL (V)

111111111111111111111111111111111111111111111111111111

FUJITSU

MB311 OA

TYPICAL PERFORMANCE CHARACTERISTICS

1I1111111111111111111111111111111111111111111111111111

(Continued)

OUTPUT VOLTAGE vs INPUT VOLTAGE

-

~

1000

o

>

TOTAL HARMONIC DISTORTION vs FREQUENCY

Vee = 9V
VVOL = 9V
RL

= 100.n

f

= 1kHz

a
:r:

v cc I = 9V
-r--V VOL = 9V
v IN = SOmV
= 100 n_ r--RL
BW
= 20 - 20kHz

....

a

0.3

t

CD

g'

~

0.4

100

1----7"-----+--1

B

B

0.2

o

'oE"

"5
Co
"5

o

0.1

III

:r:
10~

____~______~~

'jij

(j

10

100

....

Input Voltage VIN (mV)

10

100

1k

10k

Frequency f (Hz)

TOTAL HARMONIC DISTORTION vs INPUT VOLTAGE

10.0

?f-

a
:r:

....

I:

1.0

0

t

0
0

~

:r:
'jij

(j

....

~:-_J
====,

----

B
'"
C

'"

~Vcc = 9V
=R
_
L = 100.n
- VVOL = MAX

0.1

f
f
f

Ir--

= 100Hz
= 1 kHz
= 10 kHz

~!

" " ......
.~

~{
10
100
Input Voltage VIN (mV)

3-15

~~~I~~~~~I~~~I~~~i~~IIIMI~1
FUJITSU

~1~~~~~~I1II1I1II~~~IIIII~II~~I~

MB3110A

PACKAGE DIMENSIONS
8-LEAD PLASTIC SINGLE IN-LINE PACKAGE
(CASE No.: SIP-08P-M03)

r-

.128 ± .010
13.25 ± 0.25)

H

.774 ~ :~~ (1965~g:~~)---,

I

I

.244 + .010
18.20 iO.25)

L

.323±.012

~.~'
.157 ± .012
14.00 ± 0.30)

I.. .

..

.010 ± .002
10.25 ± 0.05)

100 12.54) TYP

.061 ~

0°12

(1.52 ~ g.30)

Dimensions in
Inches (millimeters)

3-16

.020 ±.003

(O.SO ± 0.08)

8080108-20

MB3111
April 1989

Edition 1.0

DISTORTION LIMITING Ie
The Fujitsu MB3111 is a distortion limiting Ie housed in a zig zag in-line
package for high density mounting on print circuit boards for audio stereo
systems.
The MB3111 is designed to avoid the clipping noise without poor dynamic
response.
The MB3111 reads the output voltage of the power amplifier and automatiC'
Iy lowers the gain when the output voltage exceeds about 95% of th~V
level.

wave.C~iPp,

~l.rY

The MB3111. detects the possibility of
;o'tr.
ampl!fier
gain. The gain control works when large slg
co IFs~an IS determm.i\. <
by an external time constant.
~
~~

~o; rt;oou~~

~~"

·~e'""v
cl.
~~ I":\~
2..~'N'"V.''' ~ .o.~rv•

••

•

:<

• Stand-by Mode

•

....

TOP VIEW

"\.V

M;.~m -"".::1 ~\. ,.

• Small Package

PIN ASSIGNMENT

.

~~~

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Rating

Symbol

Value

Unit

VCC1

-0.3 to 18

V

Po

560

mW

TSTG

-55 to 125

°c

V CC2

Supply Voltage
Power Dissipation
Storage Temp.

NOTE: Permanent device damage may occur if" ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

VCO UT

This device contains circuitry to protect the
inputs against damage due to high static volt·

ages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-

mum rated voltages to this high impedance
circuit.

3-17

~~I~~llllllllllmllllmmlm~II~I~
FUJITSU
~~I~~lmlllll~~I~~IIIIIIIIIIIIIII~IIII~ml M B3111

Fig. 1 - BLOCK DIAGRAM

Rl

Cl

C2
Vcc,

GND VCC2

Lch OUT

L IN

FROM
PREAMPLIFIER

STBY

TO POWER
AMPLIFIER
Vc

COMPo

/1----1 PEAK

L DET IN
HOLD hr-~~_I:t_--- -20 _VC

«

J

1.6V - - - -

~

Vc ='2.0V-------30
VC: CONTROL VOLTfGE
-40

100

10

lk

10k

lOOk

f (Hz)

Fig. 4 - GAIN vs. CONTROL VOLTAGE

VCC 1 = 13.2V
VCC2 = 8.5V

o

iii
"0

-......:

-; -10

«

-20

f = 10kHz

~

f =llkHZ
f =ll00HZ

-30

o

0.5

1.0

2.0

1.5

Vc (V)

Fig. 5 - ATTACK TIME vs. EXTERNAL RESISTANCE (R2)

VCC1 = 13.2V
VCC2 =8.5V

/

100

1

/

10

o

-------

100

V'~'
10k

3-21

Ilmllllllm~~llllllllllllmlmlm~111111111
FUJITSU
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~IIIIIIIIIIIIIII~II

MB3111

TYPICAL CHARACTERISTICS CURVES (continued)
Fig.6 - RELEASE TIME vs. EXTERNAL RESISTANCE IR3)

Vee,
VCC2

_

=
=

13.2V
B.5V

Vo=

1.0

~

IOl'F

/

E
If0.1

10k

1M

Fig. 7 - OUTPUT POWER/TOTAL HARMONIC DISTORTION
VS. INPUT VOLTAGE

10~---1-S+----J~f-----+-----l

- - - without OL-IC
-withOL-IC
Vee1 = 13.2V
Vee = B.5V

§
c

:r:
t-

0.1\-------1-------+----1

1000

100
V 1N (mVrms)

3-22

1111111111111111111111111111111111111111111111111111

FUJITSU

MB3111

1111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
J7-LEAD PLASTIC ZIG-ZAG IN-LINE PACKAGE
(Case No. : ZIP- I 7P-MO I )

112± 010
12.B5±0.25)

I

I

INDEX

.23 6±.010
16.00 ±0.25)

if
I

!

.010±.002
10.25±0.05)

I~~

LEAD

~

.05011.27)
1----TYP

II

NO.~

~

.020±.003
10.50±0.OB)

r

.I

.310±.013
17.B7±0.33)

-~
I~ ~
.09412.40) MIN

----1
.10012.54) TYP
IROW SPACE)

0 0 0 0 0 0 0~
0 0 0 0 0 0
IBOTTOM VIEW)

Dimensions in

©1988 FUJITSU LIMITED Z11001S-3C

inches (millimeters)

3-23

Automotive Audio

3-24

Linear Data Book

MB 3714A
MB 3715A
June 1986
Edition 1.0

MB 3714A/MB 3715A
6 Watt Audio Amplifier
The Fujitsu MB 3714A and MB 3715A are monolithic integrated circuits of
6 Watt audio power amplifiers packaged in plastic single in-line package (SIP)
with heat radiation fin.

l1li

The MB 3714A/MB 3715A are designed to reduce output distortion and
power·on pop noise, working at high gain and high output power.
The MB 3714A and MB 3715A can drive even 2 ohm load and are designed
against breakdown by load short and supply voltage surge. The packages are
protected to mis-mounting with biased hole on the fin.

•

High Power: 6.0 W typ/4n, 10.0 W typ/2n

•

High Gain: 52.5 dB typ,

•

Low Distortion

•

Small Plastic 8-pin Single In-Line Package with Easily Heat Radiation and
Mis-Mounting-Proof Form

•

Minimum External Components

•

Low Power-on Pop Noise

•

Low Impedance Load: 2n Load

•

Audio Mute Circuit

•

Various Protection Circuits

•

Power Supply Surge Protection

•

Thermal Protection

•

Load Short Protection

MB3714A
PLASTIC PACKAGE
SIP-08P-M01

MB 3715A
PLASTIC PACKAGE
SIP-08P-M04

PIN ASSIGNMENT
MB 3714A

o

-IN
.oN
AUDIO NUTE

GNO

Rating

Vee

o

ABSOLUTE MAXIMUM RATINGS

, -__~~()~==~r-_aUT
MB3715A

Symbol

Value

Unit

Vee

18

V

Supply Voltage (Surge)
(t. ~ 0.2 ms, t, ~ 1 ms)

Vees

40

V

GNO

Output Current (Peak)

lop

4.5

A

.,N

Power Dissipation (T e ~ 75°C)

Po

7.5

W

T STG

-55 to +150

°c

Supply Voltage

Storage Temperature

()

OUT
Vee
BS

AUDIO MUTE

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

o

NFB

' -__----'-'--i!====dJ-~_-IN

This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields. However. it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedance
circuit.

3-25

11111111111111111111~llllmmlllllllll~111111
FWlTSU MB 3714A
1IIIillmimilimilimmmimmmilili

MB 3715A

RECOMMENDED OPERATING CONDITIONS
Value
Parameter

Unit

Symbol
Min

Supply Voltage

8.0

Vee

Operating Ambient Temperature

TA

Typ

-20

Max

16.0

V

+75

°c

BLOCK DIAGRAM

r-----QBS

>---r---

10Hz to 30kHz

-60~

-60

-80~

-so ~

-100

-100

a

Fig. 3 - INPUT REFERENCE LEVEL
VI. VOLTAGE SUPPLY

Fig. 4 - MAX. OUTPUT LEVEL VI.
SUPPLY VOLTAGE (COMPANDOR)

f - 1kHz

LPF: 100kHz

Mute OFF
INH OFF

~

5

I-

3.5V·===~-::: }~~~~~o ~~~~;

~

~

Vee"" 3.SV Q,=C=O=M=P=AN:;D;:O::R""'"(COMPRESSOR

----- RL - 600n

THO'l%

INH OFF

Mute OFF

AS'"

RS • GOOn - - R L • 10kn

soon

-7,.--------------,-12

]

-14]

-8

OJ

-9

-16 ~

Gj -10

-18~

0

.....

...

...

~ -11

..

,
,,

I::l

i!t

-12

,
,,

VOE1
EXPANDOR OUTPUT LEVEL

.:

-20~

NIN - -l9dBm)

I
I

w

>
w

.
oJ

.:
-2 a:

I-

!:

-3 i!t

.. 5
E

i

o 4

...>

~
~

3

5

2

~

::l

o

~

SUPPLY VOLTAGE Vee IV)

-13'::2,H,~4,.---~--j8;----,1-:;,0,.--~12:;-' -24

,,

oJ

-1

l-

~

-22

0

>

...

.:

.
0

0

>
w

E
III
:!!

:!!

0

>"

1

III

:!!

-4

SUPPLY VOLTAGE Vee IVI

I

3-37

..·...I.
PUJITSU

MI!3120

TYPICAL CHARACTERISTICS CURVES (continued)
Fig. 5 - FREQUENCY VI. VOLTAGE GAIN
(COMPANDOR)
Vcc- av
MUTE OFF
INH OFF
RO-6000
RL - tOkO
TYP. CONNECTION

0.5
0
-0.&

ii

0.5
0
./ -0.&

:s
z

:

Va i. OdB when'· 1kHz.

--

V1N-OdBm

-2OdBm

-

-4OdBm

------------~~-----------~-50dBm

....-

-2.0

50

600

tOO

lk

50k

10k

5k

FREQUENCY , IHzl

Fig. 6 - INPUT REFERENCE LEVEL
VI. TEMPERATURE

Fig.7 - OUTPUT LEVEL VI. TOTAL HARMONIC
DISTORTION (COMPRESSOR)

-7,------------------------,
j-8

em

:s

g
>
-'
w
~

w

20
10

o

-9

------------_____
COMPRESSOR:

a:

... -11
::>
0..

~

-12
-40

o

20

~

5

~

u:w

Vcc- av
Mute OFF
INH OFF
Rg -600n
RL -10kn
TYP. CONNECTION

-20

0

V CC -3.5V

-1 ~

IVIN--6dBml

-'_10

u:w

Voc~

'-1kHz
LPF: 100kHz
Rg-6000
MUTE OFF
INH OFF

• a:

-2 ...
::>

...

0.5

!:
40

TEMP. T. (DCI

60

80

0.1
0.05

0.05 0.1

0.5

OUTPUT LEVEL Va (Vrmsl

3-38

5

m~m~~Mm~IOO~IDMrumlmlll
FWITSU

MB3120 1~lllmlllllllmllm~~lmllllll~ml~~~11

TYPICAL CHARACTERISTICS CURVES (continued)
Fig. 9 - OUTPUT LEVEL vs. TOTAL HARMONIC
DISTORTION (COMPANDOR'

Fig. 8 - OUTPUT LEVEL vs. TOTAL HARMONIC
DISTORTION (EXPANDOR)
20
10

5

I = 1kHz
LPF: 100kHz
Rg ~ 60011
MUTE OFF
INH OFF

Vee

c

3.5V Vee

=av

RL ~
10kll
RL =
60011

RL 10kll

20
10

5

I-1kHz
LPF: 100kHz
Rg-6001l
MUTE OFF
INH OFF

Vee- 3.5V Vee=8V

RL~

60011

~

~
C
:I:

I-

C

1

:I:

I-

0.5

0.5

0.1

0.1

0.05

0.05

0.05 0.1

0.5

5

1

0.05

OUTPUT LEVEL Va (Vrms)

Fig. 10 - OUTPUT LEVEL VS. TOTAL HARMONIC
DISTORTION (EXPANDOR INHIBIT COND.)
20
10

5

I = 1kHz
LPF: 100kHz
Rg = 60011
MUTE OFF
INH ON

i:

0.5

1.0

5.0

Fig. 11 - OUTPUT LEVEL ¥s. TOTAL HARMONIC
DISTORTION (COMPRESSOR INHIBIT COND.)

Vee=3.5V Vec·av

20

I-1kHz
LPF: 100kHz

10

RS - 60011

5

MUTE OFF
INH ON

R L -6001l

~

~
C

0.1

OUTPUT LEVEL Vo (Vrms)

C
:I:

1

I-

0.5

0.5

0.1

0.1

0.05

0.05

0.05

0.1

0.5

OUTPUT LEVEL Va (Vrmsl

5

0.05 0.1

0.5 1

5

OUTPUT LEVEL Vo (Vrmsl

3-39

~mlllllmllllllllm~mllllmIIW
FUJITSU
11~~~llllllmllllllmlllllmlllllllllllm~11 MB3120

TYPICAL CHARACTERISTICS CURVES (continued)

Fig. 12 - FREQUENCY VI. TOTAL HARMONIC
DISTORTION (COMPANDOR)

Fig. 13 - EXAPNDOR MUTE ATTENUATION
20

VCC=8V
Vo·OdBm
MUTE OFF
INH OFF
LPF: 100kHz
RS-600n

o

e -20
II>

;g
w-40

o
>

VIN = -29dBm

-60

0.1
-100 0

0.05
100

500

lk

5k

10k

20

e -20

VIN = -6dBm
VIN --46dBm

II>

;g
0-40

o
>

Vce=8V
INH OFF
Rg = soon
RL = 10kn
TYP.
CONNECTION
VIN =-6dBm

-60
-60

-1000

VIN = -46dBm
1

= -9dBm

VIN

= -29dBm
2

Fig. 14 - COMPRESSOR MUTE ATTENUATION

o

VIN

MUTE CONTROL VOLTAGE VIN (V)

50k

FREQUENCY f (Hz)

2

MUTE CONTROL VOLTAGE VIN (V)

3-40

Vee = 8V
INH OFF
Rg=600n
RL -10kn
TYP.
CONNECTION

V 1N = -9dBm

3

3

IIIIIIIIIIIIII~IIIIIIII~IIIIIIII~~III~I~~I~I
FUJITSU

MB3120 Illmlllllllllll~IIIIII~IIIIIIIIIIIIIIIIIIIIIIIII~

PACKAGE DIMENSIONS
16·LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT·16P·M04)

o MIN
IStand off)
.21J::g~:
15.40:g:~g)

I

-¥=:o:..!---..1. .020±.008

---r 10•SO±0.201
I

..,;.:=.;:03-'..1±..c:;.00""8:.,..;......

(0.80±0.2O)
.07912.00)
MAX

View·'A"

.027(O.68)MAX
@

1988 FUJITSU LIMITED F16012S·2C

Dimensions in
inches (millimeters)

3-41

111111111111111~lllllllllllllmlllllllllllllllllll
FUJITSU

MB3120

1111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS (continued)
(TOP VIEW)

Inv fn..c

]1

Out-C

]3

AGln-C

=]5

Muteln-C

]7

GND

]9

2[

NFB-C

4[

Reet In-C

6[

Reet Cap-c

a[

Mute-In

10[=

BvPass

'1-LEAD PLASTIC ZIGZAG-IN·LINE PACKAGE
(CASE NO.: ZIP·I1P-MOll
.112:1:.010
(2.85:1:0.251

,327IS.3JMAX

INH ]11

-i

12[ Muteln-E
Out-E ]13
14t= Reel Cap-E

"G In-E ]15

.o9412.4)MIN

---1

16[ Rect In-E
VCC

:}17

.020:1.003
ID.SO±O.OSI

[ .100t2.&4ITYP

(ZIP-17P-M01)

.:e 1988 FUJITSU

3-42

LIMITED Z11001S·2C

Oimensions in
inch" (millime1ers)

111111111111111111111111111111111111111111111111111111111111111

FUJITSU

MB3722

111111111111111111111111111111111111111111111111111111111111111

February 1989
Edition 1.0

5.BW DUAL AUDIO POWER AMPLIFIER
The Fujitsu MB3722 Is designed for a dual low-frequency high-power amplifier which Is
packed In 12 pin single In line plastic package. The MB3722 requires a few external
components. this enables high density mounting. Design for heat radiation Is easy
because thermal resistance Is low.
The MB3722 contains Internal power-on pop noise protection circuitry and various
protection circuitry. The device Is suitable best for car-stereo.
•

High power output: 5.8 W typ.

•

Low Noise Output Voltage: 0.8 mV typo

•

Low Total Harmonic Distortion: 0.2 % typ.

• Minimum external components
PLASTIC PACKAGE
SIP-12P-MOI

• On chip power on pop noise protection circuit
• Audio mute function Is provided
• Separated GND pins for Input/Output circuit

PIN ASSIGNMENT

• Various protection circuits
-

Over voltage protection

- Thermal protection
OUT-A

- Load short protection

BS-A

- Output pln-to-DC short protection

Vee

ABSOLUTE MAXIMUM RATINGS (see NOTE)
Rating
Power Supply Voltage (No signal)

Symbol
VccDe

BS-B

(Tc = 25·C)
Value
24

OUT-B

Unit
FRONT
VIEW

V

GND-OUT
GND-IN
IN-B

Power Supply Voltage (Operation)

Vee

18

V

Power Supply Voltage (Surge)

Vees

40 •

V

NFB-B
BYPASS
NFB-A

Output Current (Peak)

IOPEAK

4.5

Power Dissipation

Po

18

W

A

Operating Temperature(Case)

Tc

-20 to +75

·C

Storage Temperature

TSTG

-55 to +150

·C

NOTE:

•

ts~0.2

sec. tr2: 1 msec

Permanent device damage may occur If the above Absolute Maximum
Ratings are exceeded. Functional operation should be restricted to the
conditions as detailed in the operational sections of this data sheet. Exposure
to absolute maximum rating conditions for extended periods may affect
device reliability.

IN-A

This device contains circuitry to proteot the

~citr~~esa~jn~~9C~~~afi:'d:~e ~~:r. s{tat\~
advised that normal precautions be taken to
avoid application of any voltage higher than
maximum rated voltages to this high impedance

circuit.

Copyright 0 1989 FUJITSU LIMITED

3-43

"'~I
FUJITSU
IN~I~!III!II MB3722

Fig. 1 - MB3722 BLOCK DIAGRAM

BS-A
NFB-A

2 1--'V\I\r-~--I

IN-A

1 } - - - -......P---i

~----+--.r---l---...f 10

BYPASS

3

GND-IN

6 r-----~-L---j---1 7

Vee

GND-OUT

BS-B
IN-B

-------1

5 .....

OUT-B
NFB-B

4 }--'V\f\r-......~--I

RECOMMENDED OPERATING CONDITIONS
Parameter

Value

Unit

8 to 16

V

Power Supply Voltage

Vee

Operating Temperature

Tc

-20 to +75

·c

Output Load

RL

2 to 8 •

n

Note:
• Dual operation.

3-44

Symbol

Im~~I~III~mllmllml~I~~I~mmlm~11
PUJITSU

M83722 ~~I~I~~lmll~~I~m~mlll~III~~OO~~

ELECTRICAL CHARACTERISTICS
(Vcc

= 13.2 V. f =1 kHz.

RL

= 40.

Tc

= 2SoC.

One channel operation)
Value

Parameter

Symbol

Condition

Min

Unit

Typ

Max

80

160

rnA

50.5

52.5

dB

0

1.5

dB

Quiescent Power Supply Current

10

VIN=OV

Voltage Gain

Av

Po=IW

Difference Voltage Gain

flAv

Po=IW

Output Power

Po

THD=10%

Total Harmonic Distortion

THO

Po=IW

0.2

1.0

%

Output Noise Voltage

VNO

Rg=10kO. BW = 20 Hz t020 kHz

0.8

1.6

mV

Input Resistance

RIN

48.5

Cross Talk

Rg=6000

Audio Mute Attenuation

Rg=6000

5.0

W

5.8

20

30

kO

40

50

dB

40

dB

Fig. 2 - TYPICAL APPLICATION EXAMPLE

.------------------------r----.--o Vee
100 jJ. F

+

+
10

2

11

IN-A

12
RL

INPUT

OUTPUT

6
RL

IN-B

5

4

3

7

8

9

+

+

'-

~.~~

I~Vee

SW *2
Notes:
'I Use Mylar condenser.
'2 When Vee Is apply to the pin 3. Audio mute (40dB) Is available.
'3 The TAB should be connected with the GND.

3-45

I~~.~_nl
FWITSV

.~M~~I~~II~I~I

MB3722

Fig. 3 - TYPICAL APPLICATION CIRCUIT PATTERN (BOTTOM VIEW)

TYPICAL CHARACTERISTICS CURVES
Fig. 4 - TOTAL HARMONIC DISTORTION
va. OUTPUT POWER
20
Vee = 13.2 V
RL = 4 n
1 channel oper~lonl

2

0.5
0.2

C
J:

"

10

5

Fig. 5 - TOTAL HARMONIC DISTORTION
va. FREQUENCY

o
~
o

Iii

II

..... ....

-..
""" .... .......

i5

I

10 Hz

./

0.05
0.5

1

2

0.1
0.05

o

1--

z«

~f

1=a:c

i

OJ:

~ ~ ffi~ :::~
:J

I- :::

::t
a:

g
3-46

50 100200

5001k

2k

".

5k 10k 20k

FREQUENCY f (Hz)

0.2

0

-

IZ

W

Fig. 6 - OUTPUT POWER/TOTAL HARMONIC
DISTORTION/QUIESCENT POWER
SUPPLY CURRENT vS.POWER SUPPLY
VOLTAGE
12
f=lkHz
I
f-~ 10 THO = 10%
I
Po= 1 W
~ 8 1 channel
I
a:
operation
W
I
6
~
0
...... .;;IQ
n. 4

PO~

+-

§g
o

zO~

I-

.,

I-

OUTPUT POWER Po (W)

~

20

-:J.

5 10

~

Po = 1W
1 channel operation

0.2

o

I-

0.02 0.050.1 0.2

~-

0.5

«
J:

I

100 Hz

Vee = 13.2 V

t-- --RL=4n

o

Z
::t
a:

If
1k Hz

0.1

2

IZ

50

V

I'

I-

:J

n.

I-

~

2

0

0

THO

I
I

:J

0

W

12 14
13.2

o

POWER SUPPLY VOLTAGE Vee (V)

1;l
5

6

8

10

16

18

20

1111111111111111111111111111111111111111111111111111

FUJITSU

MB3722

1111111111111111111111111111111111111111111111111111

12-LEAD PLASTIC SINGLE IN-LINE PACKAGE
(Case No. : SIP-12P-MO I)

Ii·.--

r-=

55~~i<00)

-

1.240(31.50) M A X - - = 1 l
.1 65(4.20) MAX

- .945(24.00)· ...._--

",,,:--1

" '~.60- -<)~f--1

.472(1200)

1"'\"· , r " i ' ' ' ' j
.287(7.30)

.047(1.20) .094(2.40)

j
.100(2.54)

TYP

.020(0.50)

~.012(0.31)

Dimensions in

©1988 FUJITSU LIMITED S12001S-3C

inches (millimeters)

3-47

Automotive Audio

3-48

Linear Data Book

MB3730A

September 1988
Edition 1.0

14 W BTL AUDIO POWER AMPLIFIER
The Fuptsu MB3730A Is designed for a low-frequency high-power amplifier
with Internal BTL (Balanced Transformer Less) circuitry. The MB3730A Is
packed In 7 pin single In line plastic package and requires a few external
components, this enables high density mounting. Design for heat radiation Is
easy because thermal resistance Is low 3°C/W.

IDII

The MB3730A contains Internal power-on pop noise protection circuit and
various protection circuits. The device Is suitable best for car-stereo.
: 14W typo

•

High power output

•
•

Minimum external components
Various protection circuits
Over voltage protection
Load short protection
Thermal protection
Output pln-to-DC short protection

•

No break-down: between pins Is shorted or Inverted Insertion

•
•

Low thermal resistance
: 3°C/W
On-Chip power-on pop noise protection circuit

•

7-pln Plastic Single In Line package (Suffix: -PSI

PLASTIC PACKAGE
SIP-07P-M01

PIN ASSIGNMENT
ABSOLUTE MAXIMUM RATINGS (see NOTE)
Rating

Symbol

(Te=25°C)
Value

Unit

(FRONT VIEW)

Power Supply Voltage

Vee

18

V

Power Supply Voltage (Surge)

Vees

50 •

V

Output Current (Peak)

IOPEAK

4.5

A

Power Dissipation

Po

18

W

GND

Operating Temperature (Case)

Te

-20 to +75

°C

BYPASS

Storage Temperature

TSTG

-55 to +150

°C

Note:

• ts S 0.2 sec, tr

~

Vee
OUT-M
OUT-I

FB

1 msec

IN

Permanent device damage may occur If the above Absolute
Maximum Ratings are exceeded. Functional operation should be
restricted to the conditions as detailed In the operational sections of
this data sheet. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
This device contains circuitry to protect the Inputs
against damage due to high static voltages or electric
fields. However:, It Is advised that normal precautions
be taken to avoid application of any voltage higher
than maximum rated voltages to this high Impedance

circuit.

Copyright. 1 _ by FUJITSU LIMITED and Fujitsu Microelectronics, Inc.

3-49

11111111111111111111111111111111111111111111111

FUJITSU
1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImii

MB3730A

Fig. 1 - MB3730A BLOCK DIAGRAM

!-----~--A~:': -;1 ----l
BYPASS

Vee

I

I
I

IN

1r--------i

FB

2r-----~--~----~~----i

I
I
I
I
I
I
I
I
I
I
I
1- - - - - - -

~--......- _ _ { 9

OUT (M)

INV. AMP

I

-0- - - - - - - 0- - - - - - - I
GND

TAB

RECOMMENDED OPERATING CONDITIONS
Parameter
Power Supply Voltage
Operating Temperature (Case)

3-50

Symbol
Vee
Tc

Value

Unit

8 to 16

V

-20 to +75

·C

ImIIOOIII~IWmllllmllilllmiOO
FUJITSU

MB3730A ~1II00"~I~""MI~IOO""

ELECTRICAL CHARACTERISTICS

(TC

= 25°C, VCC = 13.2V, RL

= 40,

f = 1kHz»

Value.
Parameter

Symbol

Condition
Min

Max

80

200

mA

57.5

dB

quiescent Power Supply Current

10

Vln=OV, RL = co

Voltage Gain

Av

Po = lW

52.5

55

Output Power

Po

THD=10%

10

14

Total Harmonic Distortion

THO

Po=lW

Output Noise Voltage

VNO

Input Resistance

RIN

Output Offset Voltage

Voo

Rg=101d}, BW=20 Hz to 20kHZ

W

0.2

1.0

'II.

1.0

2.0

mV
Id}

70

40
VIN

Unit

Typ

= OV

0.2

0.4

V

Fig. 2 - TYPICAL CONNECTION EXAMPLE

r-----------------~~--._----()Vcc

0.1 j1F

4.7 j1F/l0V

IN

1-

2200 j1F

r-----'----...,

o----:-t.:---

1

7

6

1---------_---1'-----{)
OUt

.-----12
+
22 j1F/8.3V

Notes:

1

*3

220 j1F
16.3V

0.' j1F

10

'1 Effective to prevent from oscillation depending on printing pattern.
'2 When power supply line Is stable, please connect with Vee side,
It restrains the oecloatlon.
'3 Use Mylar Capacitor.
'4 The TAB should be connected with GND.

3-51

11111111111111!!111!!!!~!!mll~llmllll
FUJITSU

MB3730A

IIIIIII!!II!!IIIIIII!!!!!!IIIIIIIIIIIII!!

Fig. 3 - RECOMMENDED CONNECTION PATTERN (BOTTOM VIEW)

VIN

Vee

TYPICAL CHARACTERISTICS CURVES
Fig. 4 - TOTAL HARMONIC DISTORTION
VB. OUTPUT POWER

~
a

J:

I-

Z

0

~

0

Iii

Z

a:

-«J:

-

=
=

I

0.5

~
o
~
o
I-

lKfz

1

0.1

..,.-

~ 0.05
~
0.2 O.S

1

2

0.6
0.4

~

~

0.2

~

5

25

Lz I :

f=
THO = 10%
Po= lW

~

10

20

50

;t
b
I-

0

SO

0

~

~

::J

IJ

0

I
I
Ip
I

20

~

S

Z

J:

Output Power Po (W)

3-52

30

o
~

1 0HZ

oJ

~ ~

~ tt::~::

10KHZ

0.2 1 -

35

a:

~ D.
::J!5
0 D.
~ ID.::J

Z

-

~

!l

I-Vee 13.2V
RL 4.0

2

0

~

.1

5

c
0

E.

20
10

Fig. 5 - OUTPUT POWER/TOTAL HARMONIC
;;;- DISTORTION/QUIESCENT POWER SUPPLY
:;( ~ CURRENT va. POWER SUPPLY VOLTAGE

c..

~

L

/
/
~

V

IQ

r--r~r---

-

THO
I

0

5

8

10 12 13.214 16

18

Power Supply Voltage Vee (V)

20

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIm

FUJITSU

MB3730A

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIImlllllillmili

TYPICAL CHARACTERISTICS CURVES (Continued)
Fig. 8 - VOLTAGE GAIN va. FREQUENCY

!

70

m

80

~

50

Q

1:
l-

:!!.
Z

:(

40

"w

30

"
0(

~

a
>

Z

.....

~

0
i=
a:
0

IIIJ

Fig. 7 - TOTAL HARMONIC DISTORTION
vs. FREQUENCY

.l

J.

10
S _I-~CC = 13.2V
RL=40
Po= lW
2
1

i5
r--:VCC = 13.2V
20 f-RL=40
Po= lW
10

0

1020

0

z

0.5

::!!

a

0.2

«

0.1

I-

0.05

1:
-'
0(

50100200500 lk 2k 5k 10k 20k SDk lOOk
Frequency f (Hz)

a

I-

,/'

.....

a:

20

50 100 200

500 lk 2k

,,-

..........

IIDI

~

5k 10k 20k

50k

Frequency f (Hz)

Fig. 8 - POWER DISSIPATION
va. TEMPERATURE

25

~

1.
2.
3.
4.
5.

20

infinite ~at radiation board
900 cm 2 x 2 mm AI board
400 cm 2 x 2 mm ,AI board
200 cm 2 x 2 mm AI board
10 em x 2 mm AI board

a

Do.

z

0

15

~

I--

Do.

iii
IIJ

10

~
0

5

i5
a:
w
Do.

....,

,,
,
~ ~ 1',\ ,
,

I~ ~~

(1)

1\

~~

~

,

' ..... ~\. 1',
... ~

0
0

25

50

75

100

I~

125

150

Temperature TA (oC)

3-53

~OOIm!mIIOO~IIIIIIIIIIWlIOOII
FUJITSU

IllIIOOIIOOllill~IOOlllllllllllmll MB3730A

PACKAGE DIMENSION
7-LEAD PLASTIC SINGLE IN-LINE PACKAGE
(CASE No.: SIP-07P-M01)

.807 (20. 5O)MAX

I"

.591(15.00)

• 157(4.oo)MAX

c:J

IlL'

.142(3.80)

1-1

.loo(2.54)TYP

Ol"..,slons In
Inches (millimeters)

3-54

8070028-10

MB3731
September 1988
Edition 1.0

18 W BTL AUDIO POWER AMPLIFIER
The Fujitsu MB3731 Is designed for a low-frequency high-power amplifier with
Internal BTL (Balanced Transformer Lass) circuitry. The MB3731 Is packed In
12 pin Single In line plastic package and requires a few extemal components,
this enables high density mounting. Design for heat radiation Is easy because
thermal resistance Is low.
The MB3731 contains Intemal power-on pop nol8e protection circuit and
various protection circuitry. The device Is suitable best for car-stereo.
: 18Wtyp.
• High po_r output
• Minimum extemal components
• On-chip power on pop noise protection circuit
• Audio mute function Is provided
• Separated GND pins for Input/Output circuit
• Various protection circuits
Over voltage protection
Load short protection
Thermal protection
Output pln-to-DC short protection
• 12-lead Plastic single In-Une Package (Suffix: -PSI

PLASTIC PACKAGE
SIP-12P-M01

PIN ASSIGNMENT

ABSOLUTE MAXIMUM RATINGS (s•• NOTE)
Rating

Symbol

(Te=25·C)
Value

(FRONT VIEW)
BS-M

Unit

Power Supply Voltage

Vee

18

V

Power Supply Voltage (Surge)

Vecs

40 *

V

Output Current (Peak)

IOPEAK

4.5

A

Power DISSipation

Po

18

W

Operating Temperature (Case)

Tc

-20 to +75

·C

Storage Temperature

TSTG

-55 to +150

·C

Vee
OUT-M
BS-I
OUT-I
GND-OUT
AM

Note:

* ts:::;;;0.2 sec, tr~l meec
Permanent device damage may occur If the above Absolute
Maximum Ratings are exceeded. Functional operation should be
restricted to the conditions as detaHed In the operational sections of
this data sheet. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.

BYPASS
FB
GND-IN
NC
IN

This device contains circuitry to protect the Input.

==~t=,dl~~~?~t:~~:I=~~

be taken to aYOld application 01 any voIt_ hlghoi'
than maximum rated voltages to this high Impedance
circuit.

e_rlght • 1888 by FUJITSU UMITEO _

FuJlt.u MicroelectroniCS, Inc.

3-55

IIIIIIIIIIIIIIIIIIIIII~IIIIIIIIIIIIIIIIIIIIIII
FUJITSU
11111111111111111111111111111111111111111111111

MB3731

Fig. 1 - MB3731

BLOCK DIAGRAM

Vee

1- - - - - - - - - -

-0- - - - - - - - - - -I
. - - - - - - - - - ( 1 2 ) BS-M

OUT 1M)

4}--f-----"Wv--......

FEEDBACK

I
I
I
GND-IN

®

BYPASS

5}-.......- - - - I
FILTER

AUDIO
MUTE

6}-------I
' - -_ _......
I
1__ - - - - - - - - -

I
I
I
I
I

0-- __ - - - - - __ I

GND-OUT

RECOMMENDED OPERATING CONDITIONS
Parameter

3-56

Symbol

Power Supply Voltage

Vee

Operating Temperature (Case)

Te

Value

Unit

8 to 16

V

-20 to +75

·C

1IIIIImllllmllll~III~IIm!lIImlll
FUJITSU

MB3731

ELECTRICAL CHARACTERISTICS

1II11111111111111111111111illlllllllllllllllll

(TA = 25°C, VCC= 13.2V, RL=4fi, f=lkHz)
Values

Parameter

Symbol

Unit

Condition
Min

Typ

Max

80

200

mA

44.5

47

49.5

dB

15

18

Quiescent Power Supply Current

IQ

VIN=OV, RL= 00

Voltage Gain

Av

Po=lW

Output Power

Po

THD=10%

Total Harmonic Distortion

THO

Po=lW

0.1

0.5

%

Output Noise Voltage

VNO

Rg=10kfi.BW=20HZ to 20kHZ

0.5

1.0

mV

Input Resistance

RIN

Output Offset Voltage

VOO

VIN=OV

0.2

Audio Mute Attenuation

-

Po=lW

43

40

W

kfi

70
0.4

V
dB

Fig. 2 - TYPICAL CONNECTION EXAMPLE

r---------------------.---~----{)Vcc

2200l1F

10 IJ.F

11

12
10~~~----.---~----~

Input

8

~~r_----r_--~--_{)

100J.LF +

*2
Audio Mute

Notes:

*1
*2

Effective to prevent from the osclRatlon depending on printing pattern.
The output can be cut off (Audio Mute) when pin 6 Is connected with the GND.

3-57

Imllllllllllllllillmlllllilimllmlmill

FUJITSU

MB3731

1IIIIIIIIIIIIIIIIIIIIIIIIIImlllllllllilimii

Fig. 3 - RECOMMENDED CONNECTION PATTERN (BOTTOM VIEW)
Example 1)

Input Ground

Vee

Supply Ground and TAB

TYPICAL CHARACTERISTICS CURVES
Fig. 4 - TOTAL HARMONIC DISTORTION
va. OUTPUT POWER

~

20

i!:

10

o
Z

o
~

~
c

o
Z

o
~

<
J:

g

-

I-

I

=

i!=

~
~
10K,!..J

0.05
0.2

0.6

a:

2

5

g...
..J

10

25

I

f=Lz
THO = 10%
Po= lW

20

50

0

... 5 0 5

Z

[fi

5

CJ

0

v'

-

. .V

0

~

:
I
I

V

:P/
20

11.

J:'

100Hz
1

11.

~
~ 5

<02

0.5

30

0

~ 0.4

1KHz

1-

35

w

~ ~ i:: t:

0.5

0.1 1 -

~

a:

~ ~

g;

~

2

Output Power Po (W)

3-58

~

C

I

RL =

..J

...

<"

g

v!e 4.013.2V

5

0.2

Fig. 5 - OUTPUT POWER/TOTAL HARMONIC
;> DISTORTION/QUIESCENT POWER SUPPLY
.§. ::::. CURRENT VS. POWER SUPPLY VOLTAGE

0
6

8

/.
I

f-" ~
I

10

~

-

i-oo

THO

10 12 13.214 16

18

Power Supply Voltage Vee (V)

20

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII!IIIIIII

FUJITSU

MB3731

11111111111111111111111111111111111111111111111

TYPICAL CHARACTERISTICS CURVES (Continued)
FIg. 6 - VOLTAGE GAIN vs. FREQUENCY

70

Fig. 7 - TOTAL HARMONIC DISTORTION
VB. FREQUENCY

~

10

...J:

5

o

iD

60

~

50

Z

40

~

w 30

o

0.5

~

0.2

~

<

"
"~«

20

o
~

I"

~

VC~
= J3.2V
RL=40
Po= lW

2

i5

t--

/~

Z

13.2V
RL=40

_~CC=

0

>

r---

Z

Po= lW

"

It:

«

10

J:

0.1

I-- ~

~

~

...J

o

1020

501002005001k2k 5kl0k20k50kl00k

~ 0.05

I:!

20

Frequency f (Hz)

2. 900 cm 2 x 2 mm AI board
3. 400 cm 2 )( 2 mm AI board

20

::

iD

~

~oo ~2: ~ ~~ ~: ::~

Z

f
~

~
~

i5
It:
W

~

15~--+_~~~~--~~--r-~

o
~
:J

10~--+_--~~~~~--~r---i
5~--+_--~--~--~~~~~

Do

o

25

__

~

50

__

~

__

75

~

50k

30

~

20

i5

10

o

____

100

~~

125

150

)13.L _

CC
RL=40

p!= 5W

50

S
w

5

J

60

40

t - - t- Po

lW

"""II

f'..

I"

:J

«
~

70

Z

W

OL-__

5k 10k 20k

Fig. 9 - AUDIO METU ATTENUATION vs.
FREQUENCY

25r---------------~----~~
1. Infinite ~eat radiation board
_

500 lk 2k

Frequency f (Hz)

FIg. 8 - POWER DISSIPATION
va. TEMPERATURE

~

50 100 200

o

20

50 100 200

500 lk 2k

5k 10k 20k 50k

Frequency f (Hz)

Temperature TA (oC)

3-59

1IIIIIIIIIIIIIIImlmlllllllllllllllllllllili
FUJITSU
1IIIIIImlillmllillmlllllllllllllllllllili

MB3731

PACKAGE DIMENSION
12-LEAD PLASTIC SINGLE IN-LINE PACKAGE
(CASE NO.: SIP-12P-M01)

-

1.240(31.50)MAX
.945(24.00)

I-

II

1/

'-V \V

.JJ'-V

.063(1.60)MAX
•020(0.50)

cl

J

(

-I

NDEX

(

()

) ()

)

~

.... ...

"I

~ rr "W,!!~,

~/I'\

)11

.1

) (

() (

• 185 (4. 2O)MAX

r::J
1

.142(3.60)
.472(12 . 00)

IlIt1

.287(7. 30)

u u u

U

.100(2.54)TYP

.047(1.20)

.094(2.40)

~~

.012(0.31)

Dimensions In
Inches (millimeters)

3-60

S12OO18-30

MB3732
MB3734
July 1988
Edition 2.0

14W BTL AUDIO POWER AMPLIFIER
The Fujitsu MB3732 and MB3734 are low-frequency high-power amplifiers
with internal BTL (Bridged Output Trans Former-less) circuitry. Suitable for
car stereos, the MB3732 and the MB3734 are packed in small plastic packages
which have low thermal resistance. DeSigning for heat radiation can be executed at a low cost. The devices require few external components, so high
density mounting is optimized.
The MB3732 and MB3734 comprise various protection functions, including an
internal power-on pop noise reduction circuit.
•

High power output

14W typical

•

Small plastic package

7-pin SIP for the MB3732
9-pin SIP for the MB3734

•

Minimum external components

•

Low thermal resistance

•

On-chip power-on pop noise reduction circuit

•

No breakdown

between pins is shorted or insertion is inverted

•

Low distortion

THO = 0.07% typical

•

Various protection circuits:
Power supply surge protection, Thermal protection
Load short protection, Over voltage protection
Output pin-to-DC short protection

PLASTIC PACKAGE
SIP-07P-MO1

PLASTIC PACKAGE
SIP-09P-M02

3°CIW in the MB3732
4°C/W in the MB3734

PIN ASSIGNMENT

Vee
OUT(M)
OUT 0)
Front

View

GND
BP

FB

Rating

Symbol

IN

(Tc = 25°C)

ABSOLUTE MAXIMUM RATINGS (see NOTE)
Value

Unit

Supply Voltage

Vce

18

V

Supply Voltage (Surge)

Vees

50*

V

Output Current (Peak)

IOPEAK

4.5

A

MB3732
Vee
OUT(M)
OUT 0)

Power Dissi pation

Po

18

W

Operating Temperature (Case)

Te

-20 to +75

°c

Storage Temperature

TSTG

-55 to +150

°c

Front
View

GND (OUT)
GNDON)

AM
BP

F.B

Note: t.:<::;: 0.2 sec, t,

~

IN

MB3734

1 msec

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATI NGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

This device contains circuitry to protect the
inputs against damage due to high static volt-

ages or electric fields. However, it is advised
that normal precautions be taken to avoid

application of any voltage higher than maximum rated voltages to this high impedance
circuit.

3-61

Il ml l l ml l l l l ml l lml l l l l lrnll

~11~lml.II~1 =:g~g~

Fig. 1 - MB3732 BLOCK DIAGRAM
Vee

,- - - - - - - - - - {!} - - - - - - - - -

,
IN

,;-_-----f

FB

2}-+-~Nr---1H

-I

~--_-_{6

OUT(M)

I
I

I

1- - - - - - -

-<9 - - - - - - 0- - - - - - - I
GND

TAB

Fig. 2 - MB3734 BLOCK DIAGRAM
Vee

1- - - - - - - - - -

-®- - - - - - - - - -

-I

I
~

_ _ _ _--{IB OUT (M)

MAIN AMP

,

,

'- - - - - - - -@ - - - GND (IN)

3-62

-®- - - - - 0- - - ,
GND (OUT)

TAB

1IIIIIIIIIIIIIIIIIIIIIIIIImlllllllllllllllllilim

83 32

:83~34

FUJITSU
1111111111111111111111111111111111111111111111111111

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Max

Unit

Power Supply Voltage

Vcc

8 to 16

V

Operating Temperature (Case)

Tc

-20 to +75

°c

ELECTRICAL CHARACTERISTICS

(Te = 25°C, Vee = 13.2V, RL = 4n, f = 1KHz)
Values

Parameter

Symbol

Condition

Unit
Min

Quiescent Power Supply
Current

IQ

Voltage Gain

Av

Output Power

Po

Total Harmonic Distortion

Output Noise Voltage

THD

Typ

Max

-

80

160

mA

45

47

49

dB

THD = 10%

10

14

-

THD = 1%

-

10

-

Po= lW

-

0.07

0.5

Rg =on
BW = 20Hz to 20KHz

-

0.3

-

V ,N = OV
RL = 00

-

W

V NO

%

mV
Rg = 10Kn
BW = 20Hz to 20KHz

-

0.5

1.0

Input Resistance

R'N

-

20

30

-

kn

Output Offset Voltage

V OFF

-

-

±0.1

±0.3

V

DC Mute Supply Current

ICCQ

V 3pin = OV

-

15

-

mA

Audio Mute Attenuation

-

MB3734 Only

-

60

-

dB

3-63

1IIIIIIIIImilmil ml l l l l l il mlil mili

FUJITSU M83732
Ilmlllllllllllllllllll~I~~mlllllllllllllllm M83734

Fig. 3 - MB3732 TEST CIRCUIT

,,100011F

TAB should be connected with the GND.

Fig. 4 - MB3734 TEST CIRCUIT

Vee

+ +
Input

220
I1F

Output

AM
TAB should be connected with the GND.
If the 3 pin Is connected to GND. DC Mute Is enabled.

NOTE: 'When operation is unstable due to board design, insert 0.1 F condenser between Vee and GND
and between both outputs respectively, so that the unstable operation will be restrained.

3-64

1IIIIIIIIIIIIIIIIIIIIIIImllllllllllllllllllllllili

MB3732
MB3734

FUJITSU
1111111111111111111111111111111111111111111111111111

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 5 - TOTAL HARMONIC DISTORTION
VS. OUTPUT POWER
20

~

5

IZ
0

i=

2

II:

ZO
O:I:
:;;1-

z
~Q

-II-

1-0
01I-!!!

'"

a

0.5

...........

Z
0

:;;
a:


THO = 10%



VS.

8

~

./

V

3 30 50 100

"
500 lK

5K 10K

SOK lOOK

FREQUENCY f (Hz)

6
3050100

500 lK

5K 10K

30K

FREQUENCY f (Hz)

3-65

~mllllllllllllmlwlllllll~~lmllllmllml
FUJITSU MB3732
1IIIIIIIIIIIIIIIIIIIImllllllmlllll~~1111111111 MB3734

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

Fig. 9 - POWER DERATING CURVE
(MB3732)

Fig. 10 - POWER DERATING CURVE
(MB3734)

25....-------,-----,-----,
1. Infinite Head Radiation Board
2. 900 cm 2 x 2 mm AI board
3. 400 cm 2 x 2 mm AI board

!

~

0..

0..

o

o

20

~: ~~~ ~~~ : ~ ~~ ~: :::;~ I----+--+----j

Z

o

~

0..

iii
en

o
a::

~
0..

25

50

AMBIENT TEMPERATURE TA (oC)

3-66

25
AMBIENT TEMPERATURE TA (OC)

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImmlllili

MB3732
MB3734

FUJITSU
IIIIIIII11111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
7·LEAD PLASTIC SINGLE·IN·L1NE PACKAGE
(CASE No.: SIP·07P·MOl)
.807120.5IMAX
.15714.OIMAX

c=J
.14213.61

.05911.51

.07912.01

.06311.6IMAX
.020(0.51

U

L010(O.261

.10012.54ITYP
(c)

1987 FUJITSU LIMITED S07002S-2C

Dimensions in
inches (millimeters)

3-67

111~~mlm~lmmmllrn~~~~~mmmll
FUJITSU MB3732
1111~lllmIIIIIOO~~~~II~~I~~~I~mll MB 3734

PACKAGE DIMENSIONS (continued)
9·LEAD PLASTIC SINGLE·IN·LlNE PACKAGE
(CASE No.: SIP·09p·M02)
929(23

6J1\II~-,,-X'---_ _ _ _-1

.921(23.4)M'-'AX"---_ _~_I1
.315(8.0)

.154(3.'9)-1--+--1

\

.100(2.54)TVP!

.1

© 1987 FUJITSU LlMITEO S09003S·2C

3-68

.130(3.3)MAX

.315(8.01

1

J

1

.024±.004
(0.6±0.1)

.024±.004
(o.6±0.1I

Dimensions in
inches (millimeters)

MB3733
April 1988
Edition 2.0

20 WATT BTL AUDIO POWER AMPLIFIER
The Fujitsu MB3733 is designed for a low·frequency high power amplifier
with internal BTL (Balanced Transformer less) circuitry. Suitable for care
stereos, the MB3733 is packed in a small plastic 12·pin Single In· Line Package
(SIP) which has low thermal resistance. Designing for heat radiation can be
executed easily.
The device requires few external components, so high density mounting is
optimized.
The MB3733 contains a filtering circuitry for power·on pop noise and various
protection circuits.
• High Power Output: 20W with RL = 40
• Minimum External Components
• Samll Plastic 12·pin Single In·Line Package
•

Low Thermal Resistance

• Various Protection Circuitries:
Power Supply Surge Protection
Excess Voltage Protection
Load Short Protection
DC Short Protection for Outputs, Power Supply pin, and Ground pin
•

PLASTIC PACKAGE
SIP·12p·MOl

Low Power·on Pop Noise

PIN ASSIGNMENT

• Separated Ground pins for Input/Output
12

• Audio Mute Function
•

11

Low Total Harmonic Distortion: 0.07% typo

10

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Symbol

Value

Unit

Power Supply Voltage

Vee

18

V

Power Supply Voltage
(Surge Voltage)

Vo::.s

50'

V

Rating

10 (Peak)

4.5

A

Power Dissipation

Peak Output Current

Po

18

W

Operating Temperature (Case)

Te

-20 to +75

TSTG

-55 to +150

°c
°c

Storage Temperature
NOTE: • 10

FRONT
VIEW

7

s: 0.2 (s), tr ~ 1 (ms)

Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

This device contains circuitry to protect the
inputs against damage due to high static volt·
ages or electric fields. However, it is advised
that normal precautions be taken to avoid

application of any voltage higher than maximum rated voltages to this high impedance

circuit.

3-69

m~~lllllil~II~lm~mll~m~~mlml
FUJITSU
~1111111~~I~~IIIIIII~llllllmlll~IIIII~~11 MB 3733

Fig. 1 - MB3733 BLOCK DIAGRAM

, - - - - - - - 0 BS·MAIN
IN

o---.-------j
~-_-_o

NFB

GND·IN

OUT·MAIN

o--+-AI'Nv------.>---I
0--~~-;:;;:;.=~~:j
~---+-_o

OUT·INV

.----_--=~----o BS·INV
BP

0-------;
FILTER

AUDIO MUTE

o - - - - - L_ _--1
GND·OUT

Vee

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Value

Unit

Power Supply Voltage

Vee

8 to 16

V

Operating Temperature (Case)

Te

-20 to +75

°c

3-70

1111111111111111111111111111111111111111111111111111

FUJITSU

MB37 33

1111111111111111111111111111111111111111111111111111

ELECTRICAL CHARACTERISTICS
(Te = 25°C, Vee = 13.2V, RL = 4n, f = 1kHz)
Value
Parameter

Condition

Symbol

Unit
Min

Quiescent Power Supply Current

V 1N =OV,

RL

=00

10

Typ

Max

80

160

rnA

49

dB

Av

45

47

THD = 10%

P 01

16

20

W

THD = 1%

P 02

14

W

Po = 1W

THD

0.07

Rg = on,
BW = 20 to 20kHz

V N01

0.3

Rg = 10kn,
BW = 20 to 20kH z

V N02

0.5

Voltage Gain

Output Power

Total Harmonic Distortion

0.5

%
mV

Output Noise Voltage

Input Resistance

RIN

Output Offset Voltage
Supply Current in DC
MUTE mode

BP = OV

AUDIO MUTE Attenuation

AM =OV

20

1.0

mV
kn

30

VOFFSET

±0.1

±0.3

Icco

15

rnA

50

dB

V

Fig. 2 - MEASUREMENT CIRCUIT

Input

Note: When BP is grounded, DC Muting can be used. When AM is grounded, AUDIO Muting can be used.

3-71

I~OO~M~m~l~ilmllmm~l~
FWITSU
~llmlllmlllllmlllmlmllOOII MB 3733

TYPICAL CHARACTERISTICS CURVES
Fig. 3 - TOTAL HARMONIC DISTORTION
VS. OUTPUT POWER

Fig. 4 - TOTAL HARMONIC DISTORTION
VI. FREQUENCY

20

~
C

10

....
z

0
~

a:

5

....

II)

C
u

Z

0.2

2

0

0.5

- r-

~

f

~

j

10kHz

a:

«
r

0.1

~

0.05

~

r

0.2

..J

0

0.05

-....;:

~
P

~

f

~

V
V

/.VPo~5W

'"~

~

~

P ~ lW
oI
I

0.02

0.01 20

~ ~W

P

I".·~.< 0 ~ ~W

.A

f = 1kHz

Po

Vee ~ 13.2V
RL ~4n

..J

0.1

~

u

:;

I

0

:;

I

0.5

Vee -13.2V
RL ~4n

r

50

I

100 200

500 1 K

2K

5K 10K 20K

FREQUENCY f (Hz)

100Hz

I-

0.03 0.05 0.1 0.2

0.5

1

2

5

10

2030

OUTPUT POWER Po (W)

Fig. 5 - VOLTAGE GAIN

iD
:!!

>
«
z

~

w

0

44.0

(

/

FREQUENCY

22.5

~

Po~SW

46.0

VI.

25.0

Vee 13!2V
RL ~4n
Te ~ 2SoC

48.0

;(

"
"«~

Fig. 6 - OUTPUT POWER

FREQUENCY

VS.

50.0

THO~

10%

Q.

a:

THOl5%1

w

~

17.5

Q.

....

~
::l
o

42.0

>

THOI~ 1%1

15.0

SO 100 200 500

1K 2K

5K 10K 20K

FREQUENCY f (Hz)
10.0 20

50 100 200

500 lK 2K

FREQUENCY f (Hz)

3-72

--...........

12.5
40.0 20

-

-;, 20.0

I'Po~IW

-

'"

5K 10K 20K

1IIIIIIIIIIIIIIIIIIIIIIIIImllllllllllllllllllllili

FUJITSU

MB 37 33 IIIIIIIIIIIIIIIIIIIIIIIIIIII~IIIIIIIIIIIIIIIIIIIIII

Fig. 7 - POWER DISSIPATION/POWER SUPPLY
CURRENT vs. OUTPUT POWER
3

30 MB 3733

~

25

u

f-

w

2

"

"-

.t' 20

Z

o
«

Z

0

i=

i=

;t

en

>oJ
1

W

:;:

~

II: 10

:;:

0

~

10

-,

11)
~2)

,
~~
~
," '

\
\

.....,.,

\
\

",
........ "
........ " ,
'\ ~,

'\

5

o

0
0

10
15
20
OUTPUT POWER Po IW)

25

\

''::,'
....

"-

0

~ ~\

'\

W

W

(1) Infinite heat radiation board
12) 900cm' x 2mm A2 board
13) 400cm' x 2mm A2 board
14) 200cm' x 2mm A2 board
(5) l00cm' x 2mm A2 board -

(3)'

II:

"-

0

I--

en

:;:

II:

15

"-

15

'"0

""-

'"

Vee = 13.2V

~ 20

~

II:
II:
::J
U

::J

25

Air Flow to Heat
Radiation Board

110cmx10cmxO.2cm)

.!?

z

Fig. 8 - POWER DERATING CURVES

\

\

'...; ,,-' \
~~

....

100
125
50
75
25
AMBIENT TEMPERATURE TA (OC)

150

3-73

1lllllmllllllllllllllOOIIIII~lmllllllllmlll
FUJITSU
1IIIIIIIIIIIIIIIIIImlllillmillmllllllllllllili

MB 37 33

PACKAGE DIMENSIONS
12-LEAD PLASTIC SINGLE IN-LINE PACKAGE
(CASE NO.: SIP-12P-M01)

~

1.240131.5)MAX
________

~.~94~5(~24~'O~)

.~

__________

.•

R'071(1~

+-t-+-ll\---;>I"--~ I
:;:::r::;:::;:::;:::;:::::;:::;:=;:::r=;=;:::;::;=;::;:::;;::::;::=T=ir=;::::;:::r=?I

~'

.142(3.6)

~r:'''l''"'
.287(,3)

.02010.5)

U

.100i2.54)TYP
©1986 FUJITSU LIMITED S12001S·3C

3-74

Dimensions in
inches (millimeters)

MB 3735
April 1987
Edition 2.0

20 WATT BTL AUDIO POWER AMPLIFIER
The Fujitsu MB 3735 is designed for a low-frequency high-power amplifier
with internal BTL (Balanced Transformer less) circuitry_ The MB 3735 is
packed in a small plastic 9-pin Single In-Line Package (SIP) which has low
thermal resistance, so that a deseign for heat radiation can be performed with
low cost_
Also, the MB 3735 requires such a few external components, so that it can be
mounted on printed circuit board WIth high density_
The MB 3735 contains a filtering circuitry for power-on pop noise and various
protection circuits.

4Q

•

High Power Output: 20W with RL

•

Minimum External Components

•

Small Plastic 9-pin Single In-Line Package

=

•

Low Thermal Resistance

•

Various Protection Circuitries:
Power Supply Surge Protection
Excess Voltage Protection
Load Short Protection
DC Short Protection for Outputs, Power Supply pin, and Ground pin

•

Low Power·on Pop Noise

PLASTIC PACKAGE
SIP-09P-M02

PIN ASSIGNMENT

9

BS-MAIN

8

OUT-MAIN
Vee

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Rating

Symbol

Value

6

Unit
FRONT

Power Supply Voltage

Vee

18

V

Power Supply Voltage
(Surge Voltage)

Vees

50'

V

Peak Output Current

lo(p..k)

4.5

A

Power Dissipation

Po

18

W

Operation Temperature

Te

-20 to +75

°c

TSTG

-55 to +150

°c

Storage Temperature

8S-INV
OUT-INV

VIEW
4

GND

3

BP

2

NFB
IN

NOTE: • ts:::;: 0.2 (sl. tr::::: 1 (ms)
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedance
circuit.

3-75

M~~~m~~~OO~~li~~~~~~
FUJITSU
OO~~I~~~~m~~oomml~~I~~~m~1 MB 3735

Fig. 1 - BLOCK DIAGRAM of MB 3735

,----------0

BS·MAIN

IN~~-----l

> - - - _ - 0 OUT·MAIN
NFBo--4~~-_~·

,>---oO---OOUT·INV

BP

O

_l___r----..:=,-----o

BS·INV

FILTER

GND

Vee

RECOMMENDED OPERATING CONDITIONS
Symbol

Value

Unit

Power Supply Voltage

Vee

8 to 16

V

Case Temperature

Te

-20 to +75

°c

Parameter

3-76

1IIIIImlm~mllllll~mm~llmm~~~~
FUJITSU

MB 3735 1~~~~IIIII~~~llmlm~~~m~ruM~~1

ELECTRICAL CHARACTERISTICS
(Te

z

25·C, Vee

= 13.2V, RL =4n, f =1kHz)

Value
Parameter

Condition

Unit

Symbol
Min

Quescent Power Supply
Current

V IN = OV, RL =

10

00

Typ

Max

BO

160

mA

49

dB

Av

45

47

THO = 10%

POt

16

20

W

THD= 1%

P02

14

W

Po = lW

THO

0.07

Rg = on,
BW = 20 Hz to 20 kHz

V NOt

0.3

Rg = 10kn
BW = 20 Hz to 20 kHz

V N02

0.5

Voltage Gain

III

Output Power
Total Harmonic Distortion

0.5

%
mV

Output Noise Voltage

Input Resistance

RIN

Output Offset Voltage
Supply Current in DC
MUTE mode

VOFFSET
BP=OV

leeo

20

1.0

kn

30
±0.1

mV

±0.3

15

V
mA

Fig. 2 - MEASUREMENT CIRCUIT

MB 3735

Vee
Input

t---+-----+------+---o

Output

Note: When BP is grounded, DC Muting can be used.

3-77

TYPICAL CHARACTERISTICS CURVES
Fig. 3 - TOTAL HARMONIC DISTORTION

VI.

OUTPUT POWER

100
MB3735
Vee = 13.2V

J

10

/

V

f - 10kHz

~

~ I!.....

0.1

~

f -1kHz
~

./

~

f = 100Hz

0.01

0.01

0.1

1
Output Power Po (WI

10

100

Fig. 4 - TOTAL HARMONIC DISTORTION vs. FREQUENCY
10r--------------,-------------,--------------.--------------,
MB 3735
Vee· 13.2V

0.1r----3~~'"--~------------~--~~~------4_------------~

0.01

L -____________--'--____________---l______________-L.____________-.-I

10

3-78

100

lK
Frequencv (Hz)

10K

lOOK

mlllllllllllllmlllllllmlmml~~IIIII~~~
FUJITSU

MB 3735 1~1111111~~llllmlmlllll~IIIIIII~lml~ml

Fig. 5 - GAIN vs. FREOUENCY
50.0

MB 3735 Vee

= 13.2V

48.0

., -

46.0

44.0

I

III
"C

~ 42.0

·m

/'

(!)

40.0

38.0

36.0
10

100

lK

lOOK

10K

Frequency (Hz)

Fig.6 - POWER BAND WIDTH
MB 3735 Vee = 13.2V
20.0

L

17.5

~

1/

15.0

THO

V

0

D-

12.5

-

THO= 10%

-

5%

THO= 1%

~

~

10.0

7.5

5.0

10

100

lK

10K

lOOK

Frequency (Hz)

3-79

~mllllllllmmlllmlllmllllllllm~~~~11
FUJITSU

IIIIIIIIIIIIIIII~~III~OO~~~~~~IIIIIIIIIII MB 3735

PACKAGE DIMENSIONS
9-LEAD PLASTIC SINGLE-IN-LINE PACKAGE
(CASE No.: SIP-09P-M02)
929(236)MAX
.921(23.4)MAX
.134(3.4~DIA

.315(8.0)

.130(3.3)MAX

.315(8.0)

\

r~}--I---+---(

lJ~

I

-

~6.4)

=,~ ~
(0.7±0.1I

© FUJITSU LIMITED 1987 S09003S-2C

3-80

.024±.004
(0.6±0.1)

II V"'f-,,-+-''II-'1-34'\('3.4)

-,-----lI-_f_

.100(2.54)TVP

1

.154(3.9)-1---+--1

\

M"-,,"=Y'""
(1.2:g.3)

JI

.024 •. 004
(0.6<0.1)

Dimensions in
inches (millimeters)

00

October 1989
Edition 1.0

FUJITSU

DATA SHEET

MB3736
15W BTL AUDIO AMPLIFIER
15W BTL AUDIO AMPLIFIER WITH INTERNAL
STAND BY FUNCTION
The Fujitsu MB3736 is designed for a Iow-frequency high-power amplffier with internal
BTL (Balanced Transformer Less) circuitry.
Suitable lor car steraos, the MB3736 is packed in 12 pin plastic Single in line small
packaage or 12 pin plastic Zigzag in line small package which has low thermal resistance
(SIP: 3"C/W, ZIP: 4OC/w). Design for heat radiation can be executed easily.
The MB3736 requires few external components, so high density mounting is optimized.
The MB3736 contains a power-on pop noise protection circuitry and various protection
circuitry.
•

PLASTIC PACKAGE
SIP-12P-M01

High Output Power: 15W typ at 4n

•

Minimum External Components (OCL, 5 capacitors, 2 resistors)

•

Stand-by Function (TTL Drive)

•

Various Protection Circuitry
Power Supply Surge Protection
Output pin-to DC Short Protection
Over Voltage Protection
Load Short Protection
Thermal Protection

PLASTIC PACKAGE
ZIP-12P-M01

•

Low Power-on Pop Noise

•

Package
12 pin Plastic SI P package (Suffix: -PSI
12 pin Plastic SIP package (Suffix: -PSZ)

PIN ASSIGNMENT
(Front View)
N.C

( TC = 25°C)

ABSOLUTE MAXIMUM RATINGS (see NOTE)
Rating
Power Supply Voltage
Power Supply Voltage (Surge)
Output Current (Peak)

Symbol

N.C

Unit

Vee

18

V

GND-OUT
GND-lN

Vccs

50'

V
A

BIAS
STAND-BY
NFB-lI
NFB-A
INPUT

I OPEAK

4.5

PD

30

W

Operating Temperature (Case)

Tc

-20 to + 75

°C

TSTG

-55 to + 150

°C

'T s S 0.2 sec,T ,S 1 msec
NOTE:

Vee

Value

Power Dissipation

Storage Temperature

OUTPUT-A

OUTPUT-ll

(SIP-12P-M01)
ZIP pin assignment:
Please see a e 7

Permanent device damage may occur ff the above Abaolute Maximum Rating.
are exceeded. Functionill operation should be restricted to the conditions as
detailed in the operational sections of this data sheet Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

3-81

MB3736

Fig. 1 - MB3736 BLOCK DIAGRAM
STAND-BY

V cc

NFB-A

8760
40KO

BIAS

0---01

INPUT
GND-IN

Q,-----1

>--.....- - - 0

OUTPUT-A
GND-OUT

0----1

>--......--~
Protection Circuit

OUTPUT-B

40KO

8760

NFB-B

Fig. 2 - MB3736 CONNECTION EXAMPLE

INPUT
NFB-A

NFB-B
STAND-BY

.1~t

"

.1~t

"
lOfLF

BIAS

.ti I'll

GND-IN
GND-OUT

1

10
1fLF

TO.

OUTPUT-B
Vee
OUTPUT-A

3-82

~

~m

TO. 1fLF

:z II:

J,.
2200fLF

-t

0

MB3736

RECOMMENDED OPERATION CONDITIONS
Symbol

Parameter

Value

Unit

Power Supply Voltage

Vee

9 10 16

Operating Temperature (Case)

Tc

-2010 + 75

V

.

C

ERECTRICAL CHARACTERISTICS
( Tc
Value
Parameter

Symbol

Condition

Unit
Min

Quiescent Power Supply Current

I ceo

Voltage Gain

Av

Output Power

Po

Total Hannonic Distortion

THO

Output Noise Voltage

VNO

VIN = OV ,RL =

Typ

Max

100

200

mA

43

45

47

dB

00

RL

=40

12

15

RL

=20

12

23

THO = 10%

W

Po =5W
Rg =10 kO,

0.04

0.4

%

0.4

1.0

mV

BW = 20Hz 10 20kHz
20

30

Input Resistance

RIN

Output Offset Voltage

V OFF

±0.1

± 0.3

V

Power Supply Current at Stand by mode

Ices

1

50

f1A
V

KO

VSBH

Operating mode

2.4

V

VSBL

Stand-by mode

0

0.4

RR

(1 flF is connected between

CC

Input Voltage, Stand-by Pin
V

Vrip = lVnns,1 = 1kHz
Ripple Rejection Retio

40

50

dB

Vee andGND)

3-83

MB3736

TYPICAL CHARCTERISTICS CURVES
Fig. 3 - TOTAL HARMONIC DISTORTION vs.
OUTPUT POWER

J

t:2O

c

i!:

S
~
en
o

C

-

0.2
0.1

~

0.05

f2

0.02

..........r

o

0.5

~

0.2

~

0.1

..c

,.

020.51251020

f

l

I-

a

~

0.5

~
en

0.2

~

C
~

~

~
a:
~
~

\po

0.05

I-

020.51251020

~

~

~45

co

~

>

<
z

~

.A ~

~

0.1

\.:....,..

VCC'l~

;!:

Rg.eooO
RL"
Po .1W

-'

a

§2

".

35

0.02

20
10

20

\

40

W

Pn .5W

~

v'"

Cl

~ I'

.1W

100Hz

Fig. 6 - VOLTAGE GAIN vs. FREQUENCY

2
V CC.l3.2V
Rg.eooO_
RL.4
T •• 25'C _

i

OUTPUT POWER Po (W)

Fig. 5 - TOTAL HARMONIC DISTORTION vs.
FREQUENCY
C

'.lkHz

.."II)
JI

0.02

OUTPUT POWER Po (W)

::t:

r-

.....

~ 0.05

f2

l-

'.lOk'"

II:

'.lkHz

rr- 7
J

en

'.10kHz

'-l00Hz

10

T ._ 25"C

C

J

VCC.l~
R g.eooo
RL.2 a

~~

I

-

Z

II:
~

I

I

0.5

~

i!:

T ._ 25'-C

2

•

20

C

a

RL"

5

II:

~

J

VCC • l 3.2V
Rg._O

10

Fig. 4 - TOTAL HARMONIC DISTORTION vs.
OUTPUT POWER

50 100200 500 lK 2K

50

50 100 200 500 lK 2K

5K lOK2OK 50K

5K 10K 20K 50K

FREQUENCY! (Hz)

FREQUENCY I(Hz)

Fig. 7 - OUTPUT POWER vs. FREQUENCY
20

-

--I'--

~D.)O'IC

-

I

I
~D.0.8

_.....

T . ' 25'C

20

50 100200 500 lK 2K

5K 10K 20K 50K 50K

FREQUENCY !(Hz)

3-84

I

0.1

~i!:
~

-'-1 _I
10

o ~

zc

-",

V CC.l3.2V
,--R g.8000
RL" a

o

Fig. 8 - TOTAL HARMONIC DISTORTION vs.
SIGNAL SOURCE IMPEDANCE

is 0.05

3~
;!:o
o Ii;
I-

c 0.02

VCC.13.2V
RL-40
'.lkHz
-T.;25'C.
50

100

200

...
...

Po

1.

Po

1-5W

-

~

1W

I
500

lK

2K

5K

10K

SIGNAL SOURCE IMPEDANCE Rg (0)

20K

MB3736
FIG.9 - OUTPUT NOISE VOLTAGE vs.
SIGNAL SOURCE IMPEDANCE

Fig. 10 - RIPPLE REJECTION vs.
FREQUENCY
80

V CC _13.2V

RL -40

----

nlo1~i

..

-------

'2OkH' LPF

;:
J~-A

.
500

'K

2K

51(

10K 201(

".

:,.....

~55

a:
a:
z

~,..

0

~

~r-- .......

50

~

~

~

UJ

~ 45

a:

f- vcc -

Q.
Q.

a:

40

Vrip_ tVnns
T a- 25'"C

f

35 20

\

Vcc-GND: 1 fi'

f-

co

SIGNAL SOURCE IMPEDANCE Rg (0)

13.2V

Rg-SOOO
RL _4 0

~

..

SOK tOOK

10- .....

I

fil

T a- 25'"C

I

~

I I

50 100200 5001K 2K

5K 10K20K 50K

FREQUENCY f (Hz)

FIG.11- POWER SUPPLY CURRENTI
POWER DISSIPATION vs.
OUTPUT POWER

Fig. 12 - OUTPUT POWER vs.
LOAD RESISTANCE

40

IZ

30

~

3

o

UJ

a:
a:

Q.

:::l

o

UJ

~

2

~

Q.

Q.
Q.

~

a:

20 r-~~~~;---t--t--;---t--;

a:

I-

~ 10 r-+-II--+~"Io:~h:~"'!I!a:,.--t--;

I:::l

1

o

UJ

~

10

8

30

Fig. 13 - OUTPUT POWER vs.
FREQUENCY
25

I I I

' .......

THO:1"':'

~

20

I II

0

THD_O.8%

Q.

a:

15

I

UJ

~

Q.

10

~

Rg_soon

Q.

I:::l

f-

0

o

T ._ 25"C

I III

10 20

50 100200 500 1K 2K

I I I

o

t

2

Z

o
~

1

0.5

(/)

C
o

0.2

~

01

a:
~

RL -2 0

12

14

16

Fig. 14 - TOTAL HARMONIC DISTORTION
FREQUENCY

g

VCC - 13.2V

I:::l

10

LOAD RESISTANCE(O)

OUTPUT POWER Po

rr-

vee"

~

13.2V

I(

Rg-soon
RL -20

~

T a- 25"C

,

P O-1W

l

~~

~~
P O-5W

0.05

-J

~

5K10K 2OK50K100K

FREQUENCY f (Hz)

g

10 20

50 100200 500 1K 2K

5K 1OK2OK 50K

FREQUENCY f (Hz)

3-85

MB3736

PACKAGE DIMENSIONS
12-LEAD PLASTIC SINGLE IN-LINE PACKAGE
(Case No.: SIP-12P-M01)

t-------1.240(31.50) MAX-----11

n
142(3~.6-0)--""
16

:l

07_1
H--+R
_ ._

.472(12.00)

!;=;:=r=y:::;::::;=;::;:::;=;=r::;=;=r=:;=r=r=;::::;::::;=r;==r=?I

.100(2.54)

TYP

"1988 FUJITSU LIMITED

3-86

Sl2001~

UU!
MAX

AX

I~

t-----.945(24.00)-----1

"j' >mI
.28717.30)

I
.02010.50)

Dimensions In
inches (mHlmaters)

MB3736

PACKAGE DIMENSIONS (Continued)
PIN ASSIGNMENT
(TOP VIEW)
N.C
OUTPUT-A

Vee
N.C
OUTPUT-B
GNO-OUT
GN~N

BIAS
STANO-BY
NFB-B

NFB-A
INPUT

(ZIP-12P-M01)

12-LEAD PLASTIC ZIG-ZAG IN-LINE PACKAGE
(Case No.: ZIP-12P-M01)
.929(23.60) MAX

.130~3..~EL~~X_

.024±.004
(0.60±0.10)

".134(3.40)

1·

5 94 ±.012
(15.10±0.30)

.484±.012!.752±.028

.024±.004
(0.60±0.10)
O~0I177E!L
TYP

JL02~~~04

__
(0.70±O.10)

I

t'2~. _.~.'.:.:~(~~J±070)

.138± .008
(3.50±0.20)

O±

(4.00±~

,

.157±.008
- .

(4

()OiO.20)

'~O'•. (i~
(BOTTOM VIEW)
.. 1988 FUJITSU LIMITED Z120028-1C

Dimensions in

Inches (m1Hmeters)

3-87

AutomoOve Audio

3-88

Linear Data Book

October 1989
Edition 1.0
DATA SHEET

MB3737A
23 W BTL AUDIO POWER AMPLIFIER
23 W BTL AUDIO POWER AMPLIFIER
The Fujitsu MB3737A is designed tor a low-Irequency high-power amplifl8l" with inlllmal
BTL (Bridged Output Translormer-less) circuitry.
Suitable lor car stereos, the MB3737A is packed in 12 pin plastic Single in Une package or
12 pin plastic Zigzag in line package which has low thermal resistance (SIP: 3"CIW, ZIP:
4 "CIW). Design tor heat radiation can be executed easily.
The MB3737A requires lew external components, so high densily mounting is optimized.
The MB3737A contains a power-on pop noise prolllction circuitry and various prolllction
circuitry.

PLASTIC PACKAGE
SIP-12P-M01

• High Output Power: 15W Iyp at 4n
•

Minimum External Components

• Stand-by Function
• Various Protection Circuitry
Power Supply Surge Prolllction
Output pin-to DC Short Protection
Over Voltage Protection
Load Short Protection
Thermal Protection
•

PLASTIC PACKAGE
ZIP-12P-M01

Low Power-on Pop Noise

PIN ASSIGNMENT
(Front View)

• Package
12 pin Plastic SIP package (Suffix: -PSI
12 pin Plastic ZIP package (Suffix: -PSZ)

( TC

ABSOLUTE MAXIMUM RATINGS (see NOTE)
Rating

= 25°C)

Symbol

Value

Unit

Voo

18

V

Power Supply Voltage (Surge)

Voos

SO'

V

Output Current (Peak)

I OPEAK

4.5

A

Power Dissipation

Po

30

W

Operating Temperature (Case)

Tc

-40 to + 75

°C

-55 to + ISO

°C

Power Supply Voltage

Storage Temperature

• t.

~O.2sec,

NOTE:

Tsro

12
11
10

Bs.A

OUTPUT-A

Voo

ss.a

ClUTPLIT-8
IlND-OLIT
ClND-IN
BIAS
STANI).B'(
NFB-8
NFB-A

INPLIT

{SIP-12P-M01 )
ZIP pin assignment:
Please see page 7

t r ~ 1 msec

Permanent device damage may occur iI the above AbaoluteMaxlmum Ratlnga
are exceeded. Functionill operation should be restricted to the conditions as
detailed in the operational sections 01 this data sheet Exposure to absolUIII
maximum rating conditions lor exlllnded periods may affect device reliabUiIy.

Quick p",TM Is.

_ o f FUJITSU LIMITED

CopyrlglOiCl987 bf FUJITSU LNITED and Fujlou M _ Inc.

3-89

MB3737A
Fig. 1 - MB3737A BLOCK DIAGRAM

NFB-A

--------------,

STAND-BY

8760
40KO

I
I
I
I
I
I
---6

......___________~ . . .?--......
INPUTO---!
GND-IN 0----1

I
I
I
I

OUTPUT-A
BS-A
GND-OUT
BS-S
OUTPUT-B

I
I
40KQ
I
8760
I
_ _ _ _ _ _ _ _ _ _ _ _ _ _ .JI

PROTECTION
CIRCUITRY

I
IL _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

NFS-B

Fig. 2 - MB3737A TYPICAL CONNECTION EXAMPLE

0

INPUT

_l~I'F
NFB--A

NFB--B

H

_l~I'F
H

STAND-BY
BIAS

_1~
H

GND-lN
GND-OUT

i
~~I'F
H

Vee
OUTPUT-A
BS-A

3-90

-::Ii It 2200I'F

+

TO. 1I'F

OUTPUT-B
BS-B

-J,.
m

.

~~I'F

;

10

=*O.lI'F

0

MB3737A

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Value

Unit

Power Supply Voltage

Vee

9 to 16

V

Operating Temperature (Case)

Te

-20 to + 75

DC

ERECTRICAL CHARACTERISTICS
Value
Parameter

Symbol

Condition

UnIt
Typ

Max

100

200

mA

43

45

47

dB

Min
Quiescent Power Supply Current

I ceo

Voltage Gain

Av

Output Power

Po

VIN =OV,RL=oo

THO = 10%, RL

= 40

18

23

W

THO = 10%, RL

= 20

18

26

W

Total Harmonic Distortion

THO

Po =5W

0.04

0.4

%

Output Noise Voltage

VNO

Rg =10kO,
BW = 20Hz to 20kHz

0.4

1.0

mV

20

30

Input Resistance

RIN

Output Offset Voltage

VOFF

±0.1

± 0.3

V

Power Supply Current at Stand-by mode

lees

1

50

""

Ripple Rejection Ratio

KO

RR

Vrip = lVrms, f = 1kHz
Capacitor 1flF is connected
between Vee and GND

40

V SBH

Operation mode

2.4

Vee

V

V SBL

Stand-by mode

0

0.4

V

50

dB

Input Voltage, Stand-by Pin

3-91

MB3737A

TYPICAL CHARACTERISTICS CURVES
Fig. 3 - TOTAL HARMONIC DISTORTION vs.
OUTPUT POWER

~

o

20

~

10

Z

o

tt-

~

~is

0.5

~

02

~

a:

:!

Z

o

I

I_10kHz

O.

~

I-

1

o

~2O

II

vee - 13.2V
Rg_ 600Q
RL-4!l
TA- 25"<:

~

I
I

'f"""11111::: "'-

0.5

1

o

1

is

0.5

~

0.2

Vee -l3.2V
Rg-600Q
RL-2Q
TA- 25"<:

r~

5

10

'T

00.02

1-0.20.51251020

20

OUTPUT POWER Po (W)

Fig. 5 - TOTAL HARMONIC DISTORTION vs.
FREQUENCY

-

z

o

~

~

is

0.5

0.2

J

Rg_ 600Q
RL-4!l

~

~

0.05

~

V

1,'
'I

,

VCC ·13.2V
Rg_6OOQ
RL-4Q

Po-,W

T~_ ~5"<:1
35'0 20 50 100200 500 lK 2K 5K l0K20K50Kl00k

0.02
10

"'""-I

/

Po·sw

-'

~

~

P o ·1W

I

~

,

/,

0.1

5

TA- 25"C

~

~

Fig. 6 - VOLTAGE GAIN vs. FREQUENCY

,

V~_1'3.lv

o

II

.J

1-1°OHZ

OUTPUT POWER Po (W)

i=

' .. 1kHz

~ 0.05

2

I

f.10kHz

:!

I_100Hz

02

Iii

0: 0.1

1-1kHz...-!l , .

-'
« 0.05

10 _
5

2

o

J

b
I- 0.02

Fig. 4 - TOTAL HARMONIC DISTORTION vs.
OUTPUT POWER

FREQUENCY f (Hz)

20

50 100200

500 1K 2K

5K 10K 20K SOK

FREQUENCY f (Hz)

Fig. 7 - OUTPUT POWER vs. FREQUENCY
I'f

~

20

~ ~ir

a:
w

~

10

I::;)

I

~
o

THD_10%

71/1 I

0..0

~
0..

II

THD_O.8%

II I

Cas- l001'f (typ.)

I

.In

1'-

ZO

Jee-l3.~

o. 1 t--

OI

~ ~_4OdB

r"

VCC ·13.2V
Rg-6OOQ
RL-4Q

I I I

10 20 50 100 200 500 lK 2K 5K lOK2OK 5OK100k

FREQUENCY f (Hz)

3-92

'ij

~ -

TA- 25'"C

o

Fig. 8 - TOTAL HARMONIC DISTORTION vs.
SIGNAL SOURCE IMPEDANCE

~~-,~

TA- 25"<:

::;:1-

Po ·1W

a:z

<0

:r: i=

-'a:

-~

0.05

~O
01-

Po·sw

I

I-!!l
0 0.0 2

100

200

500

lK

2K

5K

10K

20K

SIGNAL SOURCE IMPEDANCE Rg (Q)

MB3737A

TYPICAL CHARACTERISTICS CURVES (Continued)
:>
.§.

VCC -13.2V

!;l
>

RL-40

Cl

i5
>

.,r

2DkH~

lJj

5

0.5

Z
I::::l
0.

!:i
o

~ foil-

nO~1ter
1

..
"

-- -

~

LPF

J't"

02

ia: eo

-

TA- 25"0

W

cl

Fig. 10 - RIPPLE REJECTION vs.
FREQUENCY

Fig. 9 - OUTPUT NOISE VOLTAGE
SIGNAL SOURCE IMPEDANCE

5

~ ~t

~

a:

Z50

1'K

2K

51(

10K

20K

ti

,

\.

i\

VCC ·13.2V

"'l40

Rg_6000

w

a:

RL-40

w
~3D

andGND: 11'1'
~

C[

-Wrmo

Tri'C l

00

20

50 100200 SOD1K 2K

SIGNAL SOURCE IMPEDANCE Rg (0)

"

1\

-nllce

0.

50K lOOK

~i'o

o

II
500

fI"

5K lDK20K 50K

FREQUENCY f (Hz)

Fig. 12 - OUTPUT POWER vs.
LOAD RESISTANCE

Fig. 11 - POWER SUPPLY CURRENT/POWER
DISSIPATION vs. OUTPUT POWER
40

Rg_ eooO

g

I_1kHz

TA- 25'C

Jl
IZ

3

W

~
o
>...J

::::l

2

0.
0.
::::l

en

ffi

~

1

O~

____- L_ _ _ _

o

~·~~~~10~----~2O~----~3D

--'~

5

____

10

~~

15

LOAD RESISTANCE RL (0)

OUTPUT POWER Po (W)

Fig. 14 - TOTAL HARMONIC DISTORTION
FREQUENCY

V!:-~J

o

i!:

2

Ag_6000

Z

o
~

RL-20

1

TA- 25'C

I I I

~ 0.5

is
o
Z

!i1

0.2
0.1

~

\1

Po ·1W

C~S-~~
~

J

I

I
Po·sw

a:
~0.06
..J

i5

FREQUENCY f (Hz)

12

10 20

50 100200 SOD lK 2K

5K 10K2DK SDK

FREQUENCY f (Hz)

3-93

MB3737A

PACKAGE DIMENSIONS
12-LEAD PLASTIC SINGLE IN-LINE PACKAGE
(Case No.: SIP-12P-M01)

r

-----1.240(31.501 MAX-------11
165(4.201 MAX
>------.945(24.001-----;

I:

.142(3~.6-01~.a--1

-Hf-*_R.0_7_1:l
.472(12.001

.551(14.001

~

MAX
50
l·323rOI ,;:0'=.I=N;::DE:;:X:::;=;:::;::::;=r:r=r:;::::;::::;=r:r=r;:::;::::;=:;::;:=;::#.256(6. I

.100(2.541

TYP

.. 19118 FUJITSU LIMITED S121001S-3C

3-94

UU!

.063(1.601
MAX

.287(7.301

I
.020(0.501

.047(1.201 .094(2.401

-lL. 012(0.311

Dimensions In
Inches (milimeters)

MB3737A

PACKAGE DIMENSIONS (Continued)
PIN ASSIGNMENT
(FRONT VIEW)
BS-A

OUTl'UT-A

Vee
BS-8
OUTl'UT-8
GND-OUT
GND-IN
BIAS
STAN~Y

NFS-8
NFB-A
INPUT

(ZIP-12P-M01)

12-LEAD PLASTIC ZIG-ZAG IN-LINE PACKAGE
(Case No.: ZIP-12P-M01)
.929(23.60) MAX -

"'.134(3.40)

.

II
Q70(1.71.!l1

TYP

.024±.004

!

(0.60±0.10)

JL

.028±.004
(0.70±0.10)

.138±.008
(3.50±0c-.2c-::0-)

-1·594±.012
(15.10±0.30)

""'" l·""~"

·f]':.'~~;J"·

+--..-+

.157±.008
(4.00±020)

(BOTTOM VIEW)

e

1988 FUJITSU UMITEDZ12002S-1C

Dimensions ijn
inches (rrilinie1ers)

3-95

Automotive Audio

3-96

Unear Data Book

MB3742
March 1989

Edition 1.0

15W DUAL BTL AUDIO POWER AMPLIFIER
The Fujitsu MB3742 is designed for a low-frequency high-power amplifier with
internal BTL (Balanced Transformer Less) circuitry. The MB3742 is packed in
17 pin zig zag in line plastic package and requires a few external components,
this enables high density mounting.

IDI

The MB3742 is internal power·on pop noise protection circuit and various
.llfotection circuits. The device is suitable best for car-stereo.

•
•
•
•
•

High Output Power ... 15W (typ.)
x2 (R L =40)
Small Plastic 17·pin ZIP ~kage
Minimum External Components
(OCL, C=9, R=4)
Power Supply Stand-by Mode
(1pAtyp.)
Various Protection Circuits
Power Supply Surge Voltage
Protection

Excess Power Supply Voltage
Protection
DC Short Protection Between
Output Terminals
Short Protection Between Load
And Power Supply/Ground
Thermal Shutdown
• Minimum Pop
Noise from Power Supply Switch·
ing

PLASTIC PACKAGE
ZIP-17P-M02

PIN ASSIGNMENT
ABSOLUTE MAXIMUM RATINGS (See Note)
Item

Symbol

Typical Value

Unit
OUTPUT·B(I)

Power Supply Voltage

Vee

Vee

18
V

50-

Surge Voltage

VeelS )

Output Current

IOIPEAK)

Power Dissipation

Po

30

Operating Temperature

Top

-20 to +75

Storage Temperature

TSTG

-55 to +150

4.5

A
W

°c

OUTPUT·BIMI
GND'()UT
INPUT·B
NFB·BIMI
NFB-BII)
BIAS
GND·IN
STAND·BY
NFB·AII)
NFB·AIM)
INPUT·A
GND'()UT
OUTPUT·AIM)

Vee.

OUTPUT·AUI

•. t, ~ 0.25, t. ~ 1ms

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields. However. it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-

mum rated voltages to this high impedance
circuit.

3-97

11~~lllllllmllllllllmllmmlml~lm~~1
FUJITSU

1~lllllllmlll~IIIIIIIIIIII~~mlm~lllllml

MB3742

CIRCUIT BLOCK

STANDBY

Vee Vee

20kn

>---+.-----( 3

PROTECTION CIRCUIT

3-98

OUTPUT-AIM)

1IIIIIIIIIIIIIIImmlillmlllllillmllillmlili

FUJITSU

MB3742 1111111111111~ml~mllllllllllmlllllllllll~11

RECOMMENDED OPERATING CONDITIONS
Symbol

Typical Values

Unit

Power Supply Voltage

Vee

9 to 16

V

Operating Temperature

Top

-20 to +75

°c

Item

ELECTRICAL CHARACTERISTICS
Item

Symbol

(Te; 25°C, Vee; 13.2V, f; 1kHz, RL ; 40)

Conditions
V in ;OV, R L ;

Min

Typ

Max

Unit

Quiescent Power Supply Current

leeQ

Voltage Gain

Av

Output Power

Po

THD; 10%

15

W

Total Harmonic Distortion

THD

Po ;5W

0.07

%

Output Noise Voltage

V NO

Rg; 10kO,
BW ; 20Hz to 20kHz

1.0

mV

Input Resistance

Rin

30

kO

Output Offset Voltage

VOFF

Power Supply Current at Stand-by
Mode

Is

Ripple Rejection Ratio

PSRR

Input Voltage to Stand-by
Terminal

Channel Separation

mA

180

00

51

20

53

±0.1

8-Pin Open

55

±D.3

dB

V

1

Il A

50

dB

V SBH

at normal operation

2.4

Vee

V SBL

at standby mode

0

0.4

CS

Po'; 1W

V

60

dB

3-99

~lmllm~I~~~~~iiil~m
FWITSU
1~~M~M. .m MB3742

APPLICATION

3-100

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImllili

FUJITSU

MB3742

ttttttttttttttttttttttttttttttttttttttttlttttmtttt

TYPICAL CHARACTERISTICS CURVES
Fig. 2 - TOTAL HARMONIC DISTORTION
vs FREQUENCY

Fig. 1 - TOTAL HARMONIC DISTORTION
VS. OUTPUT POWER

~

~
o

~

°ie
uZ~

=113.2~

20 t-1vee
10 Rg = 600n
rRl = I 4n

1

«
:t:
O. 1

~

Vee 13.2V
Rg = 600n
4n
RL=
One channel Input

2

~
0_ 0 .5

I

zo

~kHZ

O:t:
::;;f~
:t:

I--- ~~V

..J

«
t-

~ 0.05 t - - - f = 1IOOH;-=o

r

f- 0.02

0.2

>

«
Z

;;(
C1

45

w

./

0.05

Po = 5W

t- 0.02

0.5
1
5
10 20
OUTPUT POWER Po (W)

100
lk
10k
FREQUENCY f (Hz)

20

~
o
>

,/

40
35

lOOk

Fig. 4 - OUTPUT POWER
VS. FREQUENCY

~
To

...........

20
THDI= 10%

"-

a:
w
;:

I

I

15

":;)

[vee = 13.2V
Rg = 600n
R L =4n
-P;;= lW
One channel Input

"-

t-.

:)

0

--..... '--"""

THO = 0.8%

0

t-

C1

1/

O

55
50

~

Po= lW

o. 1

Fig. 3 - VOLTAGE GAIN
VS. FREQUENCY

~

7-

u~

~f-O. 5 ~ f =
..J

I

,

One Channell Input

a:

~
i=
a:
o

10
Vee = 13.2V
Rg = 600n
5 f-RL = 4n

One ,hannel '"fut

lK
10K
100
FREQUENCY f (Hz)

o

lOOK

20

100
lk
10k
FREQUENCY f (Hz)

lOOk

Fig. 5 - TOTAL HARMONIC DISTORTION
VS INPUT IMPEDANCE

13.~vl

Z

vee =
It-RL=4n
f= 1kHz

o
i=
a:

~

oie

52;;
Z:t:
Of-

~

«
:t:
..J

g
f-

.l..l

,TiTI'·

o.

o. 11-- I---PO = lW

0.05

I II

r

V~

./
~

V

P-=5W
0.02

I I

10 3006201k
3k 10k 30k lOOk
INPUT IMPEDANCE Rg (n)

3-101

~1~il~III~IIIIIIIIIIIIIIIII~IIII~~111111111
FUJITSU

!l1~~II~~~mmIM~m~mml MB3742

TYPICAL CHARACTERISTICS CURVES (continued)
Fig. 6 - OUTPUT NOISE VOLTAGE
VS. INPUT IMPEDANCE
~

10

~

~~

w>
en E
>

Bw = 20Hz to

10

0..

a:
;:

w

20kH~""'-::::::::::::
:"-i""'"

1

0

0..

JIS·A

f:::J
0..
f:::J

0..

~

Rg = 600n
30 I-f = 1kHz
One channel InPlut
25
VVce = 14.4V, THO = 10%
~
Vee = 13.2V, THO = 10%
20
VVec = 14.4V, THO = 1%
Ve=13.2V,THO=1 %
15

~

No'filter

___V

5

~g

f:::J

Jccl= 13.2V
R L =4n

Fig. 7 - OUTPUT POWER
VS. LOAD IMPEDANCE

0.5

o

~
Ij'
I R~ r-...

""

10

0

5

J

o

2

[""'-.:

~ I:;;;;;;; ~

0.2

o

6201 k
10k
lOOk
300 INPUT IMPEDANCE Rg (n)

Fig.8 - RIPPLE REJECTION
vs. FREQUENCY

-

4
6
8 10 12 14 16
LOAD IMPEDANCE RL (n)

Fig. 9 - POWER DISSIPATION
VS. OUTPUT POWER

~
iii

:;:!

~

z

40

!!l

30

~

w

a:

w

r--.

0..
0..

20
0
0

Ch.

"'-

-

.9

"C

0..

Ch.l-

r-~---i~~~~~~~2

Z

~

o

iii

o

MI-~~=i=::::t-d:---+---11

a:

'L-~~-f~~~~__~~O

lOOk

Fig. 10 - POWER DISSIPATION
vs AMBIENT TEMPERATURE
25

o

z

o

~

15

~ '(~~

f----

0..

iii

o

10

--"'\

~ I'...~ ,' ,,
',(2)

........

a:

~

(1)
(2)
(3)
(4)
(5)

20

0..

5

\(1)

o

\
\

....':'
....', ,',
...
""

\

\

".

.... ~~\

0..

o

25

50

75

100

125

150

AMBIENT TEMPERATURE T A (oC)

3-102

~

a:
w

~

0..

~

~
en

w

100
lk
10k
FREOUENCY f (Hz)

~

:::J
<.J

I
20

fZ

a:

~
0..

"-

Vee = 13.2V
Rg = 600n
R L =4n
CVa = I"F
Vrip= 1Vrms

..J

a:

-

50

o

u

~

60

Infinite Heat Sink
900cm' x 2mmA2
40Ocm' x 2mmA2
200cm' x 2mmA2
l00cm' x 2mmA2

~
0..

1111111111111111111111111111111111111111111111111111

FUJITSU

MB3742

1111111111111111111111111I11111111111111111111111111

PACKAGE DIMENSIONS
17-LEAD PLASTIC ZIG-ZAG IN-LINE PACKAGE
(Case No.: ZIP·I7P·M02)

~-1.240(3150)

I 1---

MAX -.

-.945(24.00)--

---~

1

'- i -2

I

65 (4.20) MAX

'I~·

I

555 •. 012
(14.10'0.30)

142!
(360) -

r

I

339+01~11

.713'.028
(1810' 070)

(8.60+0~
- (0.30' 0.05)

L~~()(~~
TYP

.

.138 + .008

I

(3.50 + 0.20)"1

l.ni7 +016
_~4~00+040)

.177 L008
(4.50

+0.20)

"""('~~
(BOTTOM VIEW)

© 1988

FUJITSU LIMITED Z11D03S-1 C

Dimensions in inches
(millimeters)

3-103

Automotive Audio

3-104

Linear Data Book

MB3764

September 1987
Edition 1.0

NINE-LEVEL DETECTOR AND DRIVER FOR
LEVEL METER
The Fujitsu MB3764 Is a nine-level detector and driver for level meters. The
MB3764 contains an Internal reference voltage generator and an operational
amplifier with offset. so It recognizes the extended analog voltage level range.
Including negative voltage.
• Nine output levels
• Wide range of preset reference voltages:

1.25 V to 13 V

• Reverse phase Input operational amplifier with an offset of half a reference
voltage.
• High output current:

20 mA max.

• Output enabling. (Output enable time TON = 120 ns max)

PLASTIC PACKAGE
DIP-16P-M04
PIN ASSIGNMENT
ABSOLUTE MAXIMUM RATINGS (TA = 25·C)
Rating

Symbol

Condition

Power Supply Voltage

Vee

-

Output Voltage

VOH

-

Amp Input Voltage

"'N

Control Input Voltage

Voe

Power Dissipation

Po

Storage Temperature

TSTG

NOTE:

TA ~ 7S·C

-

Value

Unit

18

V

18

V

-0.3 to Vee

V

-0.3 to 7.0

V

710

mW

-55 to 125

·C

Permanent device damage may occur If Absolute Maximum
Ratings are exceeded. Functional operation should be restricted to
the conditions as detailed In the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

Small geometry bipolar integrated cIrcuits are occasionally susceptible to damage from static voltages or
electric fields. ft Is therefore advised that normal
precautions be taken to avoid application of any voltage
higher than maximum rated voltages to this device.

Copyright CI 1987 by FUJITSU LIMITED and Fujitsu Microelectronics, Inc.

3-105

mlm~m~I~~~I~~m~mlllool~~
FUJITSU

11~~I~m~m~~I~~III~~I~~m~mlll~ MB3764

Figure 1. MB3764 Block Diagram
Vcc

¥REF

OUT 1

ADJ
OUT 2

OUT 3

OUT 4
FEED
BACK
OUT 5

OUT 6

OUT 7

OUT 8

OUT 9

OUTPUT
CONTROL

GND

RECOMMENDED OPERATING CONDITIONS
Parameter

Value

Designator
Min

Typ

Unit
Max

Vcc

3.2

-

16

V

Output Current

lOUT

20

mA

Feed Back Sink Current

I SINK

-

10

-

0.5

mA

2

mA

-

13

V

5

mA

Power Supply Voltage

Feed Back Source Current
Feed Back Voltage

ISOURCE
VFB

Reference Voltage
Output Current

IREF

0

-

Reference Voltage

VREF

1.2

-

13

V

Operating Ambient
Temperature

TA

-20

25

75

·C

3-106

1~1~~I~III~I~lllllllllllllmllll~I~llilll~11
FUJITSU

MB3764 1IIIIIIIIIIIIIIIIIIIIIIImllllmllll~I~llllllmll

ELECTRICAL CHARACTERISTICS

(Vcc= 5V,TA= 25°C,VREF = 2.5V)
Values

Designator

Parameter

Conditions

Unit
Min

Power Supply Current
Output Voltage

Reference
Voltage
Generator
Section

Comparator
Section

9

14

mA

1.25

1.30

V

2

30

mV

C.VRLD

O~

-

2

30

mV

Temperature
Stability

C.VR

-20°C

-

6

40

mV

Short-circuit
Current

Isc

-

-

15

-

mA

Quantumlzatlon
Distortion

E

-

-

±0.5

±2

%

Center Voltage
Deviation

VM

3 and 4 Pins are
connected.

1.20

1.25

1.30

V

Input Bias
Current

liB

V3 = 0

-250

-30

-

nA

Av

0.5 V 

,,)~)

VOL

25

..

"is
>

WcJ I
o

>
CI

0.1

o

-25

3.5

~ ~VOH

0.2

o

20

0

~

0.3

~
I

~OC

10

o

(Continued)

5

1.0

1.5

10

15

OP-AMP Output Current I oHI OL (mA)
Ambient Temperature TA (OC)

Fig. 7 - Output Saturation Voltage
vs Output Current
Output 0.8
Saturation
Voltage 07
VSATlV)
.

Vee=5V

Available 800
Power
Dissipation 700
Po(mW)

25°C
i

0.6

I

II

11/
,I/J
/,

..----r----,r---.,.-----.
I===t==:::::j;===i----t

600

1---1---11---1----1

500

1---1---11---1----1

75°C

0.5
0.4

'(j-20°C

0.3
~

0.2
0.1

Fig. 8 - Available Power Dissipation
vs Ambient Temperature

~

~

~

/'

o
o

10

400

1---1---11---1----1

300

1---I---1r--I----I

200

1---+---1---1-----1

100

1---+---1---1-----1

oL-_.....L._ _...L.._ _- ' - _ - - '
20

30

40

Output Current lOUT (mA)

50

o

25

50

75

100

Ambient Temperature TA ( ° C)

3-109

~II!II~!~~!~~II~~
FUJITSU

1~~IM~II~I!IIII~~!~I~~~ MB3764

APPLICATION EXAMPLES
Figure 9. Voltage Recognition: VREF 12

Comparator

L-----~~------{4

t

Va

&

3-110

V 1N

= (1 +~)
R4

VREF

V 1N

= (1 _~)
R4

VREF

2
2

111111111111111111111111111111111111111111111111111111

FUJITSU

MB3764

111111111111111111111111111111111111111111111111111111

APPLICATION EXAMPLES (Continued)
Figure 1D.

Voltage Recognition: Above VREF 12

Comparator

(1 +

~) V REF
R5

2

t

Vo

J

R3

VIN = (1 +

R:;"(

VIN = (1 -

~
R4

1+

R4
V REF
As
))-2-

( 1 _ ~)) V REF
R5
2

3-111

1IIIi~~I~illlllllllllllllll~ll~illll
FUJITSU

~1~1~~~lil~111 MB3764

APPLICATION EXAMPLES (Continued)
Figure 11. Voltage Recognition: Below VREF 12

Comparator

( 1 _

....&. )V REF
Rs

~----~~----~4

t

Vo

Jr

3-112

2

111111111111111111111111111111111111111111111111111111

FUJITSU

MB3764

111111111111111111111111111111111111111111111111111111

APPLICATION EXAMPLES (Continued)
Figure 12. Connection with Microprocessor Bus

+5V

MB 3764

10 Kn

DO

~--~--------~----4-~~-10UT9

01
~--~--------~----~-----10UT8
Microprocessor
Bus
Line

I
I

I

I

~--D~7----------~----------'OUT2
0 - - - ; gg~~~bL
....-----1----'

CS

Ao

Ao

cs: Chip Select (MB3764 Chip Select Pin. Selected at CS= 0)

3-113

11111111111111111111111111111111111I11111111111111111

FUJITSU
1IIIIilililllillillmlillmllllllllllllillilii

MB3764

PACKAGE DIMENSIONS
16-LEAD PLASTIC DUAL-IN-LINE PACKAGE
(CASE No.: DIP-16P-M04)

INDEX - 1
INDEX - 2

.039 ~ 0°12
(0.99 ~ g.30)

Dimensions In
Inches (millimeters)

3-114

D16033S-2C

IIIII1111111111111111111111111111111111111111111111111111111111

MB4104
MB4105

FUJITSU
111111111111111111111111111111111111111111111111111111111111111

February 1989
Edition 2.0

FM STEREO MULTIPLEX DEMODULATOR
The Fujitsu MB41 04/41 05 Is a monolithic FM stereo multiplex demodulator
fabricated using Fujitsu's advanced bipolar technology. Using PLL circuitry,
this device achieves stable performance against the variance condition of
external elements.
•

Separation control circuit reduces noise, In a weak electrical field.

•

PLL circuitry means less external elements.

•

Reduced FM noise In weak electrical fields, with high cut control
circuit.

•

Low Distortion: 0.06% typical at 300 mV Input.

•

On-chip forced monaural, forced VCO stop, lamp driver, and audio
muting circuits.

•

Separate pilot signal and composite signal Inputs MB 4105.

•

16-pln plastic DIP package (Suffix: -p)

PLASTIC PACKAGE
DIP-16P-M04
PIN ASSIGNMENT
TOP VIEW

(Te = 25·C)

ABSOLUTE MAXIMUM RATINGS (see NOTE)
Rating
Power Supply Voltage

Symbol

Value

Unit

Vee

16

V

Vee

V.C.O

IN

L.P.F

S·ADJ

L.P.F.

Lamp Drive Current

I L

75

mA

Power Dissipation

Po

520

mW

Operating Temperature

TA

-20 to +75

·C

R.OUT

L.P.F

·C

HCC

Vec(SL)

SC

GND

Storage Temperature
NOTE:

TSTG

-55 to +125

Permanent device damage may occur If the above Absolute
Maximum Ratings are exceeded. Functional operation should be
restricted to the conditions as detailed in the operational sections of
this data sheet. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.

HCC

MonilA. Mute

L.OUT

L.P.F

Vee

P·IN

C·IN

V.C.O

S·ADJ

L.P.F.

HCC

L.P.F

L.OUT

L.P.F

R.OUT

L.P.F

HCC

Vee(SL)

SC

GND

This device contains circuitry to protect the Inputs
against damage due to high static voltages or electric
fields. However, it Is advised that normal precautions
be taken to avoid application of any voltage higher
than maximum rated voltages to this high Impedance
circuit.

Copyright

1989 by FUJITSU LIMITED

3-115

mll~illm~~m~llmll~llllm~~~I~
FUJITSU MB4104
1~~~~mm~llllllml~~llllmmMI MB4105

Fig. 1 - MB410414105 BLOCK DIAGRAM

Sub. Carrier Input

1- - - - - - - - - --I MB 4105
I

Pilot Signal

I

1
1

1
1

1

1

1_________ J

HCCI
FQ(ced

Mono

HC
Filter

1---

-,

1
1
1
1
1
10

LOut

R.Out

S.AD.l

se

L.P.F.

LP.F.

GND

V=ISL)

1

1
1
1
1
1
13

1

1

1

1 19 KHz MoIlI/ 1

I Audio Mute I

'- ____ J
MB4104

3-116

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII

FUJITSU

MB4104
MB4105

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII

RECOMMENDED OPERATING CONDITIONS
Parameter

Power Supply Voltage
Operating Temperature

Symbol

Value

Unit

Vee

8 to 14

V

TA

-20 to +75

°C

ELECTRICAL CHARACTERISTICS

(VCC = 10 V, V IN = 300 mVrms, f = 1 KHz,

L + R = 90%, Pilot = 10%, TA = 25°C)
Values

Parameter

Symbol

Conditions

Unit
Min

Quiescent Power Supply Current

10

Channel Separation

CS

Total Harmonic Distortion

V IN

= OV
40

Max

16

25

55

mA
dB

Stereo

0.06

0.3

%

Mono

0.06

0.3

%

300

420

mVrms

0

1.5

dB

8

12

mV

4.5

7

dB

THD

Output Voltage

Vo

Channel Balance

CB

210

Lamp Level

Pilot Signal

Lamp Hysteresis

Pilot Signal

5

SCA Rejection Ratio
SIN Ratio

Typ

80

dB

SIN

70

78

dB

Input Impedance

R'N

20

30

kD

Capture Range

CR

:t4

%

600

1000

mVrms

-12

-6

Maximum Input Voltage

Pilot

= 30

THD

V,NIMAXI

= 0.6

~

mV
%

SC Output Attenuation

VB

SC Output Voltage

V B= 0.1 V, Sub

V, Sub

-1

dB

5

mV

HCC Output Attenuation 1

V7=1.2V

-3

-1

0

dB

HCC Output Attenuation 2

V7=0.6V

-18

-10

-2

dB

Power Supply Ripple
Rejection Ration
Audio Mute Attenuation

R.R.

-

V13=0.2V

35

dB

55

dB

3-117

MmMmllllllmlmm~lmmm~llm~~
FUJITSU MB41 04
1~I~m~~~~ml~~~~I~~II~mm MB4105

Fig. 2 - MB4104 TEST CIRCUIT

Vee

*4
MonilAM
1 /J. F

470 pF

+

16

15

14

13

12

11

10

9

2

3

4

5

6

7

8

Veeo - - - - - - - '

R.OUT

L.OUT
0.015 fJ. F;J;

Notes:
*1.

veo

Free Running Frequency should be adjusted In order to output 19.000

se

KHz

tl0

The value Is 100 /J.F when

*3.

When over 7.0 V Is applied to pin 7, the device Is In forced monaural mode and
voltage higher than Vee Is applied to pin 7, about 10 Kil should be Inserted.

*4.

When pin 13 = GND, or Is lower than 0.4 V, the device Is In audio mute mode.

3-118

and

Hee

*2.

Hz,

at pin 13.

are measured.

veo

stops.

If a

111111111111111111111111111111111111111111111111111111

MB4104
MB41 05

FUJITSU
111111111111111111111111111111111111111111111111111111

Fig. 3 - MB4105 TEST CIRCUIT

Vee
470pF
1
K

S. e .In
'1

0------1

OKO

0.022 /! F

16

15

+

14

13

12

11

10

9

3

4

5

6

7

8

R.OUT

L.OUT

Notes:
'1 .

The pilot signal can be Input to pin 16. Therefore Input signal. without the pilot signal Input to pin 2.
makes the LPF design easier.

'2.

veo

'3.

When over 7.0 V Is applied to pin 7. the device Is In forced monaural mode and
voltage higher than Vee Is applied to pin 7. about 10 KO should be Inserted.

(76 KHz) signal should be adjusted.

veo

stops. If the

3-119

111111111111111111111I11111111111111111111111111111111

MB4104
MB4105

FUJITSU
1001100111111111111111111111111111111110011111

TYPICAL PERFORMANCE CHARACTERISTICS

Fig. 4
TOTAL HARMONIC DISTORTION (MAIN, MONO),
C.B vs INPUT VOLTAGE

Fig. 5
TOTAL HARMONIC DISTORTION (MAIN, MONO),
C.B va POWER SUPPLY VOLTAGE
0.5

0.5

'iI
0
:I:

I<:
0

1::
.2

.

"i

.1
I
I
0.4 r - f- Vee= 10 V
rlS = 1 KHz

-

M OD = 100%

0.3

+1 ~

<:

::!.

CB (L-R

a

l<:

III
()

.

.2

/.. .

0.1

-

iii

15 0.05

I-

a

Ma~ V"

~.H.

Mono

M OD = 100%

a;

s;:
()

:I:

0.1

iii

~

7

8

(mVrms)

UJ

60

~

50

~

..

40

Jl

30

..

20

0.

a;

<:
<:

s;:

()

~

......... ......

r:::::J!..-+IL

60

<:

50

.2

....

~ 40

I~ ~

L -+R

UJ

a;

..

s;:
()

10

I

-'

(

12 13 14 15 16

V- I'-..

?

....... '-

....... .........

............

L -+R

30
20
10
a
6

a 100 200 300 400 500 600 700 800 900 1000
(mVrms)

10 11

()

0.

r"'.

<:
<:

Input Voltage V IN

9

R:!,.L

UJ

()

a

3-120

~ Mono

70

III

I I

0

7

iii

s;:

Fig. 7
CHANNEL SEPARATION
VB POWER SUPPLY VOLTAGE
_

..
.
<:
<:

~

Power Supply Voltage Vee (V)

Fig. 8
CHANNEL SEPARATION
va INPUT VOLTAGE

()

Main

a

~

.

()

a;

- -

i~

15 0.05

iii' 70

III

III

\.

~

<:
<:

::!.

<:

11

0.2

I-

Input Voltage V IN

'0

I

~
0

..

~
I

CB (L-R)

0

.!I!
-1 ~

a 100 200 300 400 500 600 700 800 900 1000

~

I "i
-

+,1

ti
i5

<:

0.2

I

I
I
I
0.4 I-V, = 300 m
f- Is = 1 KHz

0.3

t:

0

0

~
:I:

0
:I:

I

i5
0

'iI

8

9

10

11

12

13

14

Power Supply Voltage Vee (V)

15

16

1111~llllllllllllllllllllllllllllllllllllllllmlllll
MB4104 FUJITSU
MB41 05 I I I I I I I I I I I I I I I I I I I I I I I~I I I I

TYPICAL PERFORMANCE CHARACTERISTICS

(Continued)

Fig. 8
VOLTAGE GAIN, TOTAL HARMONIC
DISTORTION vs FREQUENCY

2.4
0

--....

Av

'#.
;; 2.0
I-

~

>
«
c:

'iii
Cl

c: 1.6
.2

..

B

is 1.2
-30

a
>

-40

co

t:

-20

G>

..

"

I

iii' -10

.2
c:
0

~

0.8
Main

I

'iii 0.4

'0

-50

o
50

100

200

500

J

/

THO

I-

lK

2K

Mono

5K

10K

20K

Frequency fs (Hz)

Fig. 9

Fig. 10

CHANNEL SEPARATION
vs FREQUENCY

CHANNEL SEPARATION
vs INPUT VOLTAGE AT PIN 8

70

iii'

I

~

60

~

50

~

40

i

t-- t-R-+L

_ 70

...........

~ ~ L-+R

......

(I)

U

~

U 50

V

~
10 40

30

L

t;;

20

.<:

t- Vcc =10V

~ 60

~

(l)

a;
~

t--

III

It

(I)

10

30

L

~ 20

0
50

100

200

500

lK

2K

Frequency fs (Hz)

5K

10K

20K

B

V

10

o
o

0.2 0.4

0.60.8 1.0 1.2 1.4 1.6

Input Voltage at Pin 8, V 8 (V)

3-121

1111111111111111111111111111111111111111111111111111

II;I~~I~I;~II ~::~~:
TYPICAL PERFORMANCE CHARACTERISTICS

Fig. 11
ATTENUATION va INPUT
VOLTAGE AT PIN 7

(Continued)

Fig. 12
INPUT VOLTAGE va OSCILLATOR
FREE RUNNING FREQUENCY
60

fs=lKHz

a

iD

fs l=5kHz l

:!!.
c
.2 -10
1;1
:l
c
-20

.,

~

.§.

40

~

fs 110 lH)"

CD

~

........ ~

T I

/

..'"
15

30

'5
a.

20

I>

a

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

-:.

Capture
range

-

>

-30

":....

~

)

i"--.

,

\

.£

Input Voltage at Pin 7. V7 (V)

1'"
\..

10

15

18

17

19

20

21

22

23

Fig. 14
TOTAL HARMONIC DISTORTION. CHANNEL
SEPARATION vs OSCILLATOR FREE
RUNNING FREQUENCY

Ilo
Lamp-ON Level

8

'i

-

>

0
:I:
I-

I>

6

>

0.2

4

amp-OFF Level- f--

'C

;;; 60 r--

'E

~ 50
.2
1;1 40

.

.s

i5

0.1

0

0
&:

c0

~

2

0.05

:I:

ii

a

0

7

8

9

10 11

12 13 14 15 16

I-

--

iii' 70

c 1.15
0

ii

~
CI)

16

Oscillator Free Running Frequency VCO (KHz)

12

~'"

)'

~ ./

Fig. 13
PILOT SIGNAL VOLTAGE va
POWER SUPPLY VOLTAGE

n.

/

I

'1'0...

.§.

r-

:....

/

Z

I

Vee =
10 V

Lock
range

:>

V

l-

I

I
50

I

I

Vee= 10 V. C = 0.011.\ F

a

~

I>
CI)

...........

L -+R

30

a; 20
c

~ 10
.<:

0

CS

R-+L
~

a

18.5

THO

Main

THO

Mono

19.0

-

19.5

Oscillator Free Running Frequency VCO (KHz)
Power Supply Voltage Vec (V)

3-122

1111111111111111111111111111111111111111111111111111

MB4104
MB4105

TYPICAL PERFORMANCE CHARACTERISTICS

Rg.15
PILOT SIGNAL VOLTAGE
vs TEMPERATURE

iii

~

.s

10

I
Lam -ON Level _ _ i"""

8

>
Q)

6

>

4

..
a'"
iii
I:
SP

'"()

~

...--

Q.

--

+2

"'-

.!;; #.
1:1:-

+1

~o u

Lamp-OFF Level

FUJITSU
1IIIIIIIIIIIIIImilimmlllllllllllllllllilimii

5

6

7

8

9 10 11 12 13 14 15 16

;

Vee

./

q~" i'~

20

10

1.

0

0..

Power Supply Voltage Vee (V)

-

V

0
50

100

200

500

1K

.J;.

2K

T.7".
5K

10K 20K

Frequency f s (Hz)

3-123

11111~~llllmllillllllllllllilillllll!illllll

FUJITSU

iliilillmlimlmliIOOliliiliili~~

MB4104
MB4105

PACKAGE DIMENSIONS
16-LEAD PLASTIC DUAL-IN-LINE PACKAGE
(CASE No.: DIP-16P-M04)

t· 1S·· MAX
I

INDEX·'

.300(7.62)

TYP
INDEX·2

!
\1.1 72(4.36) MAX

I

;
.050('.27)
MAX

TYP

(c) 1988 FUJITSU lIMIT£D D16D33S-2C

3-124

(0.46 t 0.08)

1. 118(3.00)MIN

,

.020(0.51) MIN

Dimensions in
inches (millimeters)

.mmlIIMmi~m~I~~I~

TS584-A87Z
Oecember 1987

MB87032

FUJITSU

Wmmlll~lIIlIIlII~mlllllllllllllllll

TWO-CHANNEL VOLUME CONTROLLER

v?o€.\...\\\I'I\~t>.tt'I

The Fujitsu MB87032 is a high efficiency 2-channel electric
volume fabricated using a CMOS silicon gate process.
The MB87032 has the selection of either volume, balance,
loudness mode or volume, balance, tone control mode.
This device enables the feather touch control of TV,
Video recoder and Car Stereo.
• TTL interface enables micro-computer control

l1li

• Volume gain control range
o dB to -78 dB every 1 dB step
-80 dB (Mute mode)
PLASTIC PACKAGE
OIP-16P-M03

• To control on-chip 2-channel volume (L-channel and
R-channel), this enables balance control mode
• 13 kinds of tone control is selectable depending on
exteranal condenser and resistor

PIN ASSIGNMENT

• Loudness operation is possible from 0 dB
• Single supply voltage : +8 V
• 16-pin

Oual-In~Line

.

Package (Suffix: -P)

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Rating

Symbol Pin Name

Supply Voltage

Vao

Input Voltage

VI

Output Voltage

Va

Unit

Value
Min

VOO

Ty~

Max

L-IN3

L-ClUT

10

V

VOO+0.3

V

VOO+0.3

V

125

DC

R-1M3

L-l/2·You

R-l/2'YDD

,

DATA

Storage Temperature TSTG

An input GNO-O.3
pins
An output GNO-O.3
pins
-50

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATI NGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of .this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

This device contains circuitry to protect the
inputs against damage due to high static volt·
ages or electric fields. However. it is advised
that normal precautions be taken to avoid

application of any voltage higher than maxi.
mum rated voltages to this high impedance
circuit.

3-125

MB87032 BLOCK DIAGRAM

AG
VDn
...---------4 \---j ) - - - - - - - - 1

~------+-------~
.-------1 L Channel

L-----+------4

R-OUT

RChanne1 +---------,

r.r

77T

}..-------71' 28-BIT SHIFT REGISTER
I

~----~ DATA

I

3-126

PIN DESCRIPTIONS
Pin No. Pin Name Descriptions
1

AG

2
15

L-IN1
R-IN 1

3
14

L-IN2
R-IN2

4
13

L-IN3
R-IN3

Ground for analog circuit
Analog input pins
These pins should be driven by a low impedance (100 Q
or less.)

·
r
-

~~
~
I-wv----r:--y
L/R-INI
cz
Rz

C1

_

tU
rl
=tU

L/R-IN2
L/R-IN3

R33

L/R-Yz·VDD
'---

Input pins connection example
Volume, loudness, tone mode is selected depending_
on the value of R1,R2,R3,C1,CZ and C3.
(including open and short)
Please see the application example circuit.
5
12

L-1/2·VDD A half level of supply voltage is output.
R-1/2·VDD
L-OUT
R-OUT

Electrical volume output pins
If the following stage is low impedance, step
error will occur because these output are high impedance.
The following stage must be high impedance.
(1 MQ or greater.)

7

DG

Ground for digital circuit

8

CK

Clock signal input
Data is input from DATA pin every falling edge of CK
signal.

9

DATA

Data input
Data consists of Z8-bit data which is serially
input every falling edge of CK signal.

10

CS

Strobe signal input
Control data is latched every falling edge of
CS signal. Unless strobe signal is input,
control data keeps former condition.
Please see the timing diagram.

16

VDD

Supply voltage, +8 V

6

11

3-127

FUNCTIONAL DESCRIPTIONS
Input 28-bit data consists of channel ,selection data, volume/tone.mode selection data,
loudness mode selection data, volume step data or tone step data and address data.
Input data format is shown below.
MSB

LSB

~~

CH

______________________ __
~

V/T LOUD

Parameter Bit

-=~

______________

I

~A

VOL/TONE STEP

ADR.

Description

CH

1,2

Input data determines which channel is activated. 1st bit selects
L-channel and 2nd bit selects R-channel. As the results,
both channels operate separatelY. When this bit is high level,
data is written. When this bit is low leyel, former data is
latched. This data is used as right and left valance because
R-channel and L-channel can operate respectively.

V/T

3

This data determines how 28-bit data is used, volume control
data or tone control data.
When this bit is high level, 28-bit data is used as volume
control data.
When this ,bit is low level, 28-bit data ;s used as tone
control data.

LOUD

4

VOL/TONE
STEP

5 to Accorping to V/T bit, this data specify volume step data or
25
tone ,step data.
When volume mode, 5 to 20 bit data specify MAIN switch data,
and 21 to '25 bit data speCify FINE switch data.
When tone mode, 5 to 17 bit specify tone step data. (18 to 25 bit
is ignored, please set high or low.)
Volume step is prepared by the combination of MAIN switch and
FINE switch. Only one arbitrary bit of MAIN switch (5 to 20 b'it)
is allowed to set high level. Only one arbitrary bit of FINE switch
(21 to 25 bit) is allowed to set high level. The others combination
is not a 11 owed.
When tone mode, only one arbitrary bit of 13 bit (5 to 17 bit) is
allowed to set high or all bit are set low level. The others combinatic
is not a 11 owed.

3-128

Loudness mode selection input
When this bit is high level, loudness mode is selected.
When this bit is low level, loudness mode is not selected.

Parameter

Bit

Description
Serial data (5 to 25 bit)

VOL/TONE
STEP

5 to
25

5

6 7

8

9

10

11

12 13 14

15

16

17

18 19

20

0 1-51-101-151-201-251-301-351-401-451-501-551-601-651-701-75 1

I

Attenuation (dB)
MAIN SWITCH
21

22

23 24

I 0 1-11

25

Serial data (21 to 25 bit)
Attenuation (dB)

-21 -31 -41
FINE SWITCH

5
11

I

6 7

8

9

10

21 3

4

5

6

24

25

11

12 13 14

I I I
7

8

15

16 17

9 110 1111 121131

18 19

20

--I --I --I

Tone step
21

22

23

1--1--1-- 1-- 1-ADR

26 to
28

I

26 27 28
These data specify address bit. FJ specifies the address 0 0 1
as MB87032 address. If the address is set as 0 0 1, 28-bit data
are acceptable. If the others address is set, data is not
acceptable.

The data format of volume mode is shown below.
1

2

CH
21

3

4

5

6 7

8

9

V/T LOUO
(Fix)
22

23

24

27

28

1 0 1-11-21-3 1-41 01

25

01

11

A

FINE SECTION

11

12 13 14 15 16

17 18 19 20

MAIN SECTION
26

\

10

I

ADR (Fix)

3-129

The data format of tone mode is shown below.
7

8

L

ROO 111112 113 114

CH
21

4

6

2

\

3

S

1

9

I

10 11 12 13 14

1~

16 17 18 19 20

lsi 16 117 1 18 1 19 1 20 121 122 123 1-- 1--

I--I

~~-----------------------------------------------VIT LOUD
TONE STEP
22 23

24 2S 26 27 28

1---1-- 1-- 1-- 1--[ 0
______________

I

0

I

1

1

I

~A

ADR (Fix)

VOLUME SECTION SPECIFICATION
Parameter Description
Step
value

Attenuatjon range of 0 to -78 dB every -1 dB step is selected by the
combination of MAIN section and FINE section. MAIN section variables
every -SdB steps and FINE section variables every -1 dB step.

- .. (Mute)

When volume is set as -79 dB, - .. (Mute) mode is selected.

Volume
structure
L/R-INI

~

U_
Q)

+

9kn

~20dB

!.~ f 10~

MAIN

10 kit

~L/R-OUT

jO T;;NE

L/R-IN3
L/R- Yz. Vpp 0--------+------------------'

Attenuation range of 0 to -20 dB every -1 dB stpe is selected by (1)
Attenuation range of -20 to -78 dB every -1 dB step is selected by the
the comb i nat i on of MAIN and F.INE.

3-130

TONE SECTION / LOUDNESS SECTION SPECIFICATION
Parameter

Description

Step

13 steps

Volune tap

-20 dB

STEP
structure

L/R- IN1
L/R- IN2
300n
iOOn
9kn

1200n
2100n

n

2100n
1200n
800n
500n

lID

-20 dB TAP

10kll

400n
1111.n

300n

S2;-;;

200n

S22

200n

S23

L/R-IN3

~

L/R- Yz. Von

LOUDNESS
structure

LlR-IN1°----------,
9kn

L/R- IN2 O - - t - - - - ,
S2
ON

-20 dB TAP

400n
10kn

FINE
10kn

MAIN
~

lOkn
L/R- IN3 0 - - 0 - - - - '
L/R-Yz ·V•• 0 - - - - - - - - - 0 - - - - - - - - - . . .

When S2 ;s on, loudness mode is selected. In this case, tap point
is -20 dB.
3-131

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Pin No.

Min

Supply Voltage

VDD

16

6

Digital Input Voltage

VOl

8,9,10

0

Analog Input Voltage

VAl

2,15

Operating Temperature

TA

Max

8

10

V

VDO

V

f2

Vrms

70

DC

1
0

DC CHARACTERISTICS
Parameter

Value
Typ

(VOD=8V±10%, TA=O to 70 DC unless otherwise noted.)
Symbol

Pin No.
Min

Reference Voltage

VREF

5,12

Supply Current

IOD

16

Digital Input High Voltage VIH
~igital

Input Low Voltage

VIL

AC CHARACTERISTICS
Parameter

Unit

Value
Typ

Unit

Max

1/2·VOO-10% 1/2,VOD l/2·VOO+10%

V

7

mA

8,9,10

2.4

VOO

V

8,9,10

0

0.4

V

(VDO=8V±10%, TA=O to 70 DC unless otherwise noted.)
Symbol Pin
No.

Condition
Min

Value
Typ

Max

Unit

Analog Input Voltage

VAl

2,15

Analog Input Frequency

Af

2,15

40

20000

Hz

Attenuation

6,11 Referenced to
1/2,VDO pin

0

-78

dB

Attenuation at Mute mode

6,11 OdBV=lVrms

-80

dB

Attenuation Differential * dLR
Error

6,11

Referenced to
1/2,VOD pin

-0.3

0.3

dB

L-R Attenuation
Differential Error

MTT

6,11

Referenced to
1/2,VOD pin

-0.5

0.5

dB

Total Harmonic Distortion

THO

6,11 Output=100mVrms
Attenuation=OdB

0.01

0.05

%

10

14

kn

Tone Total Resistance

RTONE

Vrms

1

3,14

6

Volume Switch
ON Resistance

TA=25 DC

300

500

n

Tone Switch ON
Resistance

TA=25 DC

200

300

n

Note: Attenuation differential error between two steps at volume mode.

3-132

AC CHARACTERISTICS

(Continued)
(VDD=8V±10%, TA=O to 70°C unless otherwise noted.)

Parameter

Symbol
Min

Value
Typ

Unit
Max

Input Clock/Strobe Signal Pulse Width

tcw

300

ns

Input Clock Signal Period

tCK

500

ns

Input Strobe Signal Period

tcs

14500

ns

Time Between CK(28) and CS

tSWl

500

ns

Time Between CS and CK(I)

tSW2

500

ns

Data Set-up Time

tSD

150

ns

Data Hold Time

tHO

200

ns

Rise Time

tr

50

ns

Fall Time

tf

50

ns

IDI

Notes:
Serial 28-bit data is input every falling edge of CK signal.
Serial 28-bit data is latched in internal latch every falling edge of CS signal.
It is prohibited to apply the clock and data while CS signal is rising.
TIMING DIAGRAM
DATA

CK

1
tcx

CS

z.• v O.u-

tr

CK,CS

O.4V-

z.

DATA

.----_ .. _---------._------- ..

%.4V-

I.:

:;r

~------



o
c

0

\

A

-

MB3752M

_

MB3752PF

_

o lc

,"'" -;I-

25 ·C

IJ

~,
~,

10

...

!J
~

...

~

~-

20

-

30

~a= =0 VR _
I

o
40

50

o

10

Fig. 5 - LOAD CURRENT VS.
LOAD REGULATION
0.1

"

0

z

0

-0.1

r-

i=

«
...J
:::>
CJ
w

TA

,

~

50

0.8

~

TA

= 75

·C

25·C

I- 0.6

~

-0.2

I-

5 0.4

o ·C -

w

-0.3

~

...J

I-

w

o

a::
20

40

60

80

LOAD CURRENT It. (mA)

100

o

o ·C

Va = 5 V
RIN = 12 V

~ 0.2

-0.4

40

w

«

=75 ·C i\ 1'\1\
25·C'

c
0

30

I

~ 1.0
CJ

a::

«

20

I

Fig. 6 - CURRENT LIMIT

vb =! V I
VIN = 12 V Rsc =10.0 -

~~

...J

a::

lEI

-

INPUT VOLTAGE VIN (V)

INPUT-TO-OUTPUT VOLTAGE
DIFFERENTIAL VIN - Va (V)

lfi

25 ·C
75 ·C

I- ,-

~rJ

TA = 75 ·C"""I:

o

MB3752C

I

',- ~, ~

:;:

~

'h
~\

l'"

g

:;:

--- --

T1

z

~

- -

160

I-

a::

vs.

200

§.

j

Fig. 4 - INPUT VOLTAGE
BIAS CURRENT

RfC

o

'1 10 In
20

40

60

80

100

OUTPUT CURRENT IL (mA)

4-7

MiliJln~l_
FWITStJ
1~~lmMI~~~I~MOOM~~I~MI

MB3752

TYPICAL CHARACTERISTICS CURVES

Rg. 8 - JUNCTION TEMPERATURE VB.
CURRENT LIMIT SENSE VOLTAGE

FIg. 7 - LOAD CURRENT VB.
LOAD REGULATION

~

.,

TA (·C)

t
0

I
~-~

a:

-- -- ...... ::r-

z

0

lEI

i=

~

:::>
Cl
w

>

25 . C ; +
0 ·C _

oJ

0.9

0

1

0

75 · C -

-0.1

w

Cl

«
I-

""

0.8

.....

..J

0

>

w

0.7

rn

z

w

rn

a:

I-

«
0

::;

0.6

r-

:!i

a

..J

-0.2

r~~:~iv

I-

rlserol

w
a:
a:

o

20

0.5

I~e

Z

40

60

80

100

:::>
0

t

Rse = 0
TA = 25 ·C
IL= 1 mA
aVIN=3V

0.2

~

z

o

~

:::>
Cl

w
a:

rt-

t

-

II:

z

0

~

Rfe =110

0.4

o

40

'" .....
In I

-"

~

80

120

160

Vo = 5 V
Rse = 0
TA=25·C
IL=lmAto50mA-

-

0.1

a:

z

-

0

~

~

:::>

Cl
w

~

I""'-- .......

-0.1

II:

......

a

w

::;

f".~

Rg. 10 -INPUT-TO-OUTPUT VOLTAGE
DIFFERENTIALvs. LOAD REGULATION

0

o

...........

I'

0.2

0.1

"-

-

n r-

JUNCTION TEMPERATURE TI (·C)

FIg. 9 - INPUT-TO-OUTPUT VOLTAGE
DIFFERENTIAL va. LINE REGULATION

V~ =15 vi

Ise Rse = 5

r-...

Ves

LOAD CURRENT IL (mA)

0.3

(Continued)

«0

-0.1

-0.2

..J

-0.2

o

-0.3

5

15

25

35

INPUT-TO-OUTPUT VOLTAGE
DIFFERENTIAL VIN - Vo (V)

4-8

45

o

5

15

25

35

INPUT-TO-OUTPUT VOLTAGE
DIFFERENTIAL VIN - Vo (V)

45

11111111111111111111111111~111~111111111~1~lm~
MB3752

FUJITSU
Imm~~m~~m~IIIIMmm~ml~~~i

APPLICATION EXAMPLES
Fig. 11 - BASIC HIGH VOLTAGE REGULATOR

Fig. 12 - BASIC LOW VOLTAGE REGULATOR

VAS VoS 37 V

2 VS VoS VA

VIN
12

10

11

2

Rse

3 1 - - - -..
R1

R2

C;);

1000 pF

~
R1 + R2

Vo = VA' R1 + R2
R2

VO=VA'

R3 = R1 • R2
R1 + R2

R3 = R1' R2
R1 + R2

for minimum temperature drift

J

for minimum temperature drift

Fig. 13 - FOLDBACK CURRENT LIMITING REGULATOR
Vo

V~IN~~~~----------~il~~Rs~e~~r-o
o
12
10

1------......,.

Vo

11
IK

Ise

IL

RB
Vo = RB • Rse • IL _ Vse (1 + ~)
RA
RA

iJi

R2

IL S IK

VO=VA'

1000 pF

~
R1 + R2

Ise = Vse •
Rse

(1 +

0.7

V

IK=lse+..::t2.....~
Rse

R3 = R1 • R2
R1 + R2

RAR ) . Vse\
B

As

for minimum temperature drift

4-9

i~I~IIIIIIII~IIIIII~II~IIII~I!~~II!1
FUJITSU

1~~lllmllllllllllllllllllllllllll~I~IIIIII~1

MB3752

APPLICATION EXAMPLES

(Continued)

Fig. 14 - POSITIVE VOLTAGE REGULATOR NPN
TRANSISTOR

FIg. 15 - POSITIVE VOLTAGE REGULATOR PNP
TRANSISTOR
VIN

Rse

Rse

Vo

r--------------.~~~--OV

VIN

10

100

10

n

2

2
3

t-------+
R1

100 pF

J

R2

R3

1000pF

Vo = VR. R1 + R2
R2

VO=VR.~

R3 = ~ for minimum temperature drift
R1 + R2

R3 = ~ for minimum temperature drift
R1 + R2

Fig. 16 - NEGATIVE VOLTAGE REGULATOR

FIg. 17 - NEGATIVE VOLTAGE REGULATOR

Ivol

R1 + R2

os Ivol

---0 -V

Vo=

R3 = R1· R2
R1 + R2

4-10

for minimum temperature drift

(1

VR

+ R2/R1)

R3 = R1 • R2
R1 + R2

.VIN2+Vo~9.5V

for minimum temperature drift

I!I~IIIIII~IIIII~IIII~~!IIII~I!~IIIIII
FUJITSU

MB3752

APPLICATION EXAMPLES

I~IIIIIIIIIIIIIIIIIIIIIIII~IIIIIIII~III~III~II

(Continued)

FIg. 18 - NEGATIVE VOLTAGE REGULATOR
(CURRENT LIMITING)

FIg. 19 - SWITCHING REGULATOR

Ivol ~ VR
VIN2 o----1>---J1';12;------;;sl
O~

11

4

r-........- - - i 9

VIN
Rl

1M

..

n

-Vo

IL =
IL =

~~~

lk

n

(ves'" 0.7 V. Vo = 0)

(1 +:/R1) , VIN2 + Vo

~ 9.5V

0.1 J.lF

5.1k

n

GNDo-~-4----~~----4---4-0GND

A3 = Rl" R2
Rl + R2

for minimum temperatura drift

Flg.20

Val
V02 = R4 Val
A3

~

VINl

VR

Val + V02

~

Example for
±15V, ±IA

IL2MAX"=~

Rl = B.2k
R2 = 7.5k
R3 = 15k
R4 = 15k
As = FIe = 0.39
R7=2kn

" Rs

Val
ILl

40 V

Rl

3

R2

n
n

n
n

As

o---..---,+-",

S

IL1MAX"=~
"As

DUAL TRACKING REGULATOR
(CURRENT LIMITING)

GNDo----...-~~-4-----~-_+-r_.

12
5

n

R3

4
R4
1000pF
-VIN2

-V
-1L2

4-11

11~1~llilllllllll~IIIIIII~IIIIIIIII~111111
FUJITSU

111111111111111111111111111111~~mlllilllllml~

MB3752

APPLICATION EXAMPLES

(Continued)

Fig. 21 - POSITIVE FLOATING VOLTAGE REGULATOR

Fig. 22 - NEGATIVE FLOATING VOLTAGE REGULATOR

-VIN
Rsc
VIN

Vo

12

Rz
12

11

11

7
Rz

36 V

6
R1

9

5

6

4
R2

R4

R1

12 V

R4

-Yo
R3

= R4 = 3.3k n

R3

=R4 =3.3k n

Vo = VR. R1 + R2
2R1

Vo = VR. R2 - R1
2R1

Fig. 23 - 5 V HIGH CURRENT VOLTAGE REGULATOR

VIN2

0 - - - - - - - - - - - - -......'"

Qn

VIN1 > 12V

VIN1

RB-n

Rsc

RS-1

0------+-_------...
12

11

6
R1 = 1.5k

n

10 I---'VVI.-'

21---------'
31-----------.
R3 = 1.Sk

VR = lk

n
RD

n >-4----.

CF = 100 - 1000 pF
R2 = 4.3k

n

R4 = 100 n to lk n
Rs=10ntol00n
Vcs ( Vcs", 0.7 V at 25·C )
ILMAX = Rsc
t:..vcslfj"TI = -2 mVI ·C
VIN2 > VOMAX + VCESATOUT + Rsc • ILMAX + -;, - RB • IWAX + VI,":P
VCESATOUT : Maximum value between Q1 to On
Rs : RS-1 = RS-2 ...... = RS-n = Rs
VIN2P : Maximum ripple amplitude of VIN2

4-12

Co

~

10 p,F

I I I I I I I I I I I I I I I I I I I I I I I I I I~I
FUJITSU

MB3752

I I I I I I I I I I I I I I I ~I I I I I I I I I I I

PACKAGE DIMENSIONS
14-LEAD PLASTIC DUAL-IN-LINE PACKAGE
(CASE No.: DIP-14P-M02)

I

INDEX- 1

.244

± .010

-=rO.~)

..

~2::;::::;:::::;=:::;::::::;::::;:::::;=:::;=;;=;:::::;=::;=;===;:::::!,!
J
•085

.010

. 172(4.36)MAX

.118(3.00)MIN

Dimensions In
Inches (mllllmet.... )

0140105-30

4-13

gllg~1111111lI11
FUJITSU

_.wi

MB3752

PACKAGE DIMENSIONS (Continued)
14-LEAD CERAMIC (CERDIP) DUAL-IN-LINE PACKAGE
(CASE NO.: DIP-14C-C01)

L
.248
(6.30

~ :g~

.311~:~

~ g:~)

(7.90~g:~)

~~~

;--,...-..,-,..~~,.....,--.--,-~.J

.I

I
•

.010

._(2.39)

MAX

~r----------+~

.3OO(7.62)TYP

~:~

f
.134 ± .014
(3.40 ±0.36)

.100 ± .010
(2.54 ± 0.25)

Dimensions In
Inches (millimeters)

4-14

0140058-20

111111111~1111~llllmllllml~I~lllmlllll~~~
FUJITSU

MB3752

111111~11111111111~11111~111~1~111~11111111~~1

PACKAGE DIMENSIONS (Continued)
14-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT-14P-M01)

AAAA A
(5~gg ~ O~~~)

INDEX

_./

I

(307 ± .016

~(J::;:::;~~:;=;::;:::;:;:::;:;:~0'40)
.050(1.27)
TYP

10

II. .

I I
'" ~ --+I

018±.004
(0.45 ± 0.10)

6nnnnnn
H~'085(2'15)
- -~~-~

MAX

-

.031 ± .008
(0.80 ± 0.20)

.027 0.68
MAX

Dimensions In
Inches (millimeters)

F14003S-2C

4-15

Power Supply Controls

lEI

4-16

Unear Data Book

MB3756

May 1988
Edition 2.0

VOLTAGE REGULATOR
The Fujitsu MB3756 monolithic voltage regulator with three outputs Is
fabricated with a bipolar linear IC technology. Two alternately exchangeable
outputs are provided for two stabilized output levels and controlled by an
external control signal. Switching noise Is prevented by Internal circuitry that
Is suitable for switching between modes such as transmitting and receiving or
AM and FM. The MB3756 Is packaged In as 8-pln singie-in-line package with a
heat radiation fin to allow large power consumption.
•

No need for external components

•

Good balance between three outputs

•

On-chip noise protection circuitry

•

On-chip overload current protection and thermal protection circuitry

•
•

Good mount ability
High output current

200 mA typical for V02 output
100 mA typical for VOO, Val outputs

ABSOLUTE MAXIMUM RATINGS (see NOTE)
Rating

PLASTIC PACKAGE
SIP-08P-M01
PIN ASSIGNMENT

TA

=25°C

(FRONT VIEW)

Symbol

Value

Unit

Input Voltage

VIN

18

V

Po

1 *1

W

Power Dissipation

4 *2

W

CONTROL

Operating Temperature

Tc

-20 to +75

·C

GND

TSTG

-55 to +125

·C

r-------l-=------,

VOUT~
NC

Storage Temperature

Notes: *1 No Heat Sink (TAS 70·C)
*2 Infinite Heat Sink (TA:; 70·C)
Permanent device damage may occur If the above
Absolute Maximum Ratings are exceeded. Functional
operation should be restricted to the conditions as detailed
In the operational sections of this data sheet. Exposure to
absolute maximum rating conditions for extended periods
may affect device reliability.

L..::...r----- VOUT-l

This device contains circuitry to protect the Inputs
against damage due to high static voltages or electric
fields. However I It is advised that normal precautions
be taken to avoid application of any voltage higher
than maximum rated voltages to this high Impedance
circuit.

Copyright- 1988 by FUJITSU LIMITED and Fujitsu Microelectronics. Inc.

4-17

1IIIIIIIIIIIIIIIIIIIImlllllllllllll~~1111111111111
FUJITSU

I I I I I I I I I I I I I I I I~I I I ~I I I I I I I

MB3756

Fig. 1 VREF

MB3756 EQUIVALENT CIRCUIT
VOO

V02

VOl

5)--lot-HH"

CONTROL

RECOMMENDED OPERATING CONDITIONS
Value
Parameter
Input Voltage

Symbol

Max

11

-

16

V

lu '1

0

-

100

mA

112 '2

0

-

200

mA

-20

-

+75

·C

Load Current

Operating Temperature
Note: '1 VOO, VOl
'2 V02

4-18

Unit

Typ

VIN

Min

To

111111111111111111111111111111111111111111111111111111

FUJITSU

MB3756

111111111111111111111111111111111111111111111111111111

ELECTRICAL CHARACTERISTICS
(TC

= 25°C.

VIN

= 14 V.

RLO

= RLI

=200

n.

RL2

= 100

n)
Values

Parameter

Symbol

Condition
Min

Typ

Unit
Max

Input Voltage

VIN

-

10.6

-

18

V

Output Voltage

Vo

-

7.8

8.2

8.6

V

Input Regulation

-

11 V ~ VIN ~ 18 V

-

20

100

mV

-

(Voo, Vol) 1 mA ~ Il ~ 100 mA

-

15

80

mV

-

(V02 )

1 mA ~ Il ~ 200 mA

-

20

100

mV

-

(Voo, Vol) 1 mA ~ Il ~ 100 mA
VIN = 11.5 V

-

20

100

mV

-

(V02)

-

30

150

mV

10

mA

Load Regulation

1 mA ~ Il ~ 200 mA
VIN=11.5V

Bias Current

Ie

VIN = 18 V

-

6

Ripple Rejection Ratio

-

f=100Hz

-

60

-

dB

Output Noise Voltage

-

10 Hz ~ f ~ 100kHz, CR = 10 J.l.F

-

40

-

\-,V

VIN-VO

-

-

1.7

-

V

Temperature Coefficient of
Output Voltage

TCVo

-

-

-0.4

-

mY/Co

Output Voltage Deviation

dVo

-

-

10

50

mV

(VOO,V01)

-

200

-

mA

(V02)

-

350

-

mA

-

0.2

V
V

Input to Output Voltage
Differential

Short Circuit Output
Current

Output Voltage

Control Input Current

Isc

Vall

VIC = 0.8 V

0

V02l

VIC = 0.8 V

7.8

8.2

8.6

V01H

VIC = 2.0 V

7.8

8.2

8.6

V

0

V02H

VIC = 2.0 V

III

VICl=OV

-

IIH

VICH = 18V, VIN = 18V

-

-0.2

-

0.2

V

-1.0

mA

10

J.l.A

4-19

111111111111111111111111111111111111111111111111111111

Fl1JlTSl1

~I I I I I I I I I I I I I I I~I I I I I I I I I I I

MB3756

TYPICAL PERFORMANCE CHARACTERISTICS
Flg.3 - INPUT TO OUTPUT
VOLTAGE DIFFERENTIAL vs
JUNCTION TEMPERATURE

Fig. 2 - BIAS CURRENT
vs INPUT VOLTAGE

10

.s<"

6

1:
~
::I

4

.'"

iii

,,CI>

.. -

8

.!1l

0

2.5

2
0

="",
00

2.0

»

~I

I

e$

6~

i/

/

"

1.5

e. VO;

-

-- -

o "

~

'[~

4

8

12

16

-40

20

Input Voltage V IN (V)

0

z

>
CI
"
2!
CD

'"
z

80

"-

14 V
I L ; 40 mA

"iN

.....

0

;

"-I"-

60
40

'0

S
a.
S

20

~

rr
0

0.01

0.1

1

4

"
"
0

~
a.
(;;

"
'\

0

10

-

80

0
120

POWER DISSIPATION
CURVES

100

'"
is
to
;:

1 :
2:
3:
4:

1

a.

External Capacitance C R(J.l.F)

4-20

40

5

1'".

(5

>

0

Fig. 5 -

100

2;

100

Junction Temperature T J (OC)

Fig. 4 - OUTPUT NOISE VOLTAGE
vs EXTERNAL CAPACITANCE

:;-

250
200

r--

1.0

EO
0.5

0

5%

IL(mA)

2
3
3

2

6

4

1

0

a.
0
0

40

\

Infinite Heat Sink
100 cm 2 AI
25 cm 2AL
Free Air

\.

'- ,,\

~

-..........: ~

80

120

160

Ambient Temperature TA (OC)

111111111111111111111111111111111111111111111111111111

FUJITSU

~1111111111111111111~~llm~IIIIII~III~111111111

MB3756

TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
Flg.7 - OUTPUT VOLTAGE
DEVIATION vs INPUT
VOLTAGE

Flg.S -OUTPUT VOLTAGE
vs INPUT VOLTAGE

~
~

>.
~
0
0

10

40

:;8

I

6

/

>

"

!!'"

4

0

>
'5

B:J

0

.§.

j

2

oil
0

~

20

c

I LO = III = 40 ;;;;;112 =80mA

.2

0

"
..,'""

-20

>
'5
a.

-40

liS
">

V

r--

0

0

8

12

16

20

~

lEI

ILO=IL1 =40mA
1l2 =80mA

\II

4

-

.
0
0

Fig. 9 - OUTPUT VOLTAGE
DEVIATION va LOAD CURRENT

OUTPUT VOLTAGE vs
LOAD CURRENT

8.4

20

!

"iN -14V

c~

.2>
liS E
':;: '-"

8.2

""

8.0

>

"

1l.<1

>
'5
a.

7.6

a.>
6<1

0

7.4

i g

0

'5

Voo
0

100

200

V 01

V 02
300

Load Current I L (mA)

-........

0

o~

..,"'"
\II

0
-20

,

-40

~

~

\

-60
Voo V 01

-80
400

"iN = 14V

0

100

200

,\

V 02
300

400

Load Current I L (mA)

4-21

1~11111111~~IIIII~II~lnl~IIIIIIIII~IIIIII~
FUJITSU
~lllil~~I~IIIIIIIIII~III!~II~~111111111111

MB3756

TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
Fig. 11 - CONTROL INPUT
CURRENT vs CONTROL INPUT
VOLTAGE

Flg.10 - OUTPUT
VOLTAGE va CONTROL
INPUT VOLTAGE
10

6

I

I

~

IL1 =40mA
1L,2 =80mA

g
to
~

t

"

1+

0
-100

0

50.

-200

2

eto

-300

o

0

4

lID

<-~

V 01

V02
8

./

,/"

./

V

£;

0

1.0

1.2

1.4

1.6

1.8

o

2.0

2

Control Input Voltage Vic (V)

Control Input Voltage VIC (V)

Fig. 12 - APPLICATION CIRCUIT

1

2

=;:CIN=;:CR

~

3

MB3756

6

5

4

8

~

==!

='=Coo

TT. 7T

Note: CIN Is required If the regulator Is located at a distance from the power supply filter.
CL Improves output noise and ripple relectlon.
Coo, Co1, CO2 Improve transient response.

4-22

C01

CO2

111111111~11111111111~llllllllllllllllllllllllmlll
FUJITSU

MB3756

~~I~~I~mlll~~III~~lllllllllmlmlmmll

PACKAGE DIMENSIONS
8-LEAD PLASTIC SINGLE-IN-LiNE PACKAGE
(CASE No.: SIP-08P-M01)
.798 (20.28) MAX
.748 (19.00) MAX
.039
(1.00)

.283
(7.20)

2- C .039 (1.00)
MAX"

1 . 0 7 5 (1.90)

~

[.E~
INDEX /
.063 (1.60)
DIA

~

I- _

)'\
~
.031 (0.80~
,:E8 £5':LDIA
- --- -- -- -

-$.039

~

(1.00 ~

.100 (2.54)

tTypHL!J

Dimensions In
inches (millimeters)

.063 (1.60)

1

I IT

V

.236 (6.00)

j
~ ~

~

10

.630 (16.00) MAX

.472 (12.00)

8. 30 )

020 + 004
(.50 ± O. 10)

I-

l.

~

(

f

t- -

0012

.236
(6.00)

!14l

11 J.M'
.315 (8.00)

) MIN

V

V
.047

V
~ 0012

V

V

~

.017 ± .002
(0.43 ± 0.04)

(1.20 ~ 0.30)

S08004S-6C

4-23

Power Supply Controls

lID

4-24

Unear Data Book·

MB 3759
May 1987
Edition 1.0

PULSE-WIDTH-MODULATION CONTROL CIRCUIT
The Fujitsu MB 3759 is complete pulse-width modulation control system on
a single monolithic chip. The MB 3759 consists of an internal 5.00V reference.
two or-connected amplifiers. externally timed (or synchronized) oscillator and
control ramp generator. The MB 3759 provides for either push-pull or singleended mode of operation with external control of dead-band.
The two NPN output transistors have uncommitted emitters and collectors
that can be used to either sink or source up to 200 rnA each.

•

Complete pulse-width-modulation system with power control circuit

•

Either push-pull or single-ended mode of operation

•

Internal circuitry prohibits double pulse at either output

•

On-chip voltage reference

•

Uncommitted output drivers

•

Master or slave oscillator control

•

Dual error amplifiers

PLASTIC PACKAGE
DIP-16P-M04

CERAMIC PACKAGE
DIP-16C-COl

•

Under voltage lockout function

•

Package: 16-pin Plastic DIP Package
16-pin Ceramic DIP Package

PLASTIC PACKAGE
FPT-16P-M02

16-pin Plastic FPT Package

PIN ASSIGNMENT

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Rating

Symbol

Value

Unit
V

Power Supply Voltage

Vcc

41

Collector Output Voltage

VCE

41

V

Collector Output Current

ICE

250

rnA

Amplifier Input Voltage

V 1N

Vcc + 0.3

V

1000 IT A :0;: 25°C)

Plastic DIP
Power
Dissipation

Ceramic DIP

Po

Storage Temperature

mW

-20 to 85

DIP
FPT

800 IT A :0;: 60°C)
620 IT A ~ 25°C)'

Plastic FPT
Operating
Temperature

TOP VIEW

TA
T STG

°c
-20 to 75
-55 to 125

°c

• PFT package is mounted on the epoxy board. (4 cm x 4 cm x 0.15 cm)
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATI NGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

This device contains circuitry to protect the

inputs against damage due to high static voltages or electric fields. However. it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-

mum rated voltages to this high impedance
circuit.

4-25

~~I~~illl~nll!llilll
FUJITSU

_ _III

MB3759

Fig. 1 - MB 3759 BLOCK DIAGRAM

OUTPUT CONTROL

, - - - - - \ 12 Vee

+IN
-IN
FEED BACK

4-26

ERROR AMP2
3 }---------'

MB 3759

111111111~lmlllllllllllllllllllllllllllllllllllll
FUJITSU
1IIIIImlllllll~IIIII~lllllilllll~~lilmllll

RECOMMENDED OPERATING CONDITIONS
DIP·package
Parameter

FPT·package

Symbol

Power Supply Voltage

Vcc

Collector Output Voltage

VCE

Unit
Min

Typ

7

15

Max

Min

Typ

Max

32

7

15

24

V

40

V

40

Collector Output Current

ICE

5

100

200

5

Amplifier Input Voltage

V IN

-0.3

o to V REF

Vcc-2

-0.3

F B Sink Current
F B Source Current
Reference Section Output Current

Timing Resistor

0.3

ISINK

2

ISOURCE
IREF
RT

50

o to V REF

1.8

5

10

30

500

1.8

100

mA

Vcc-2

V

0.3

mA

2

mA

3

10

mA

30

500

k.n
pF

Timing Capacitor

CT

470

1000

106

470

1000

106

Oscillator Frequency

fosc

1

40

300

1

40

300

kHz

Operating Temperature

TA

-20

25

85

-20

25

75

°c

Note: These recommended operating conditions are based on the standard condition.
When used at higher supply voltage, careful consideration for the ambient temperature, power consumption and so on
is necessary.

ELECTRICAL CHARACTERISTICS ITA =25°C, Vee = 15V)
Parameter

Condition

Reference Section
5.25

2

25

lmA ~Io ~ 10mA, TA = 25°C

-1

-15

mV

-20°C ~ T A ~ 85°C

±200

±750

/Jvfc

V REF

10 = lmA

I nput Regulation

LW RIN

7V~Vcc~40V, TA = 25°C

Load Regulation

LW RLD

Temperature Stability

tN R /6.T

Short Circuit Output
Current

Isc

4.75

V

5.0

Output Voltage

mV

40

mA

Reference Lockout Voltage

4.3

V

Reference Hysteresis
Voltage

0.3

V

15

4-27

!~~I~~~II~mllll~ll~ml~i~111111
FUJITSU
Ili!II~~~lmlliillllllllll~IIII!~111

MB 3759

ELECTRICAL CHARACTERISTICS (continued)
Condition

Parameter

Oscillator Section
Oscillator Frequency

lEI

fosc

RT = 30kn, CT = 1000pF

36

40

44

kHz

Standard Deviation of
Frequency

RT = 30kn, CT = 1000pF

±3

%

Frequency Change with
Voltage

7V~Vcc ~40V, TA = 25°C

±0.1

%

"'fosc/"'T

-20°C ~ T A ~ 85°C

±0.01

±0.03

10

O~VI ~5.25V

-2

-10

Frequency Change with
Temperature

%tc

Dead· Time Control Section
Input 8ias Current
Maximum Duty Cycle
(Each Output)
Input
Threshold
Voltage

40

VI =0

0% Duty
Cycle

Voo

Max. Duty
Cycle

V OM

45
3.0

JJ.A
%

3.3

0

V
V

Effor Amplifier Section
Input Offset Voltage

VIO

V 0(pln3) = 2.5V

±2

±10

mV

Input Offset Cu rrent

1 10

V

0(pln3)

= 2.5V

±25

±250

nA

0(pln3)

= 2.5V

-0.2

-1.0

JJ.A

Input Bias Current

II

V

Common-Mode Input
Voltage

V CM

7V~Vcc ~40V

-0.3

Open· Loop Voltage
Amplification

Av

0.5~Vo ~3.5V

70

Unity·Gain Bandwidth

BW

Av = 1

Common·Mode Rejection
Ratio

CMR

Vcc =40V

Output Sink CUrrent
(3 pin)

ISINK

Vo = 0.7V

Output Source Current
(3 pin)

ISOURCE

15mV ~ VIO ~ 5V,
Vo =3.5V

4-28

-5V~Vlo ~-15mV,

Vcc-2

V

95

dB

800

kHz

65

80

dB

0.3

0.7

mA

-10

mA

-2

1111111111111111111111111111111111111111111111111111

FUJITSU

MB 3759

1111111111111111111111111111111111111111111111111111

ELECTRICAL CHARACTERISTICS (continued)
Condition

Parameter

Output Section
ColleCtor Leakage Current

Ico

VCE

= 40V,

Emitter Leakage Current

I EO

Vcc

= Vc = 40V,

Emitter
Grounded

VSATC

V E = 0, Ic

Emitter
Follower

V SATE

Vc

= 15V,

lopc

VI

= V REF

Input Threshold Voltage

V TH

0% Duty

Input Sink Current (3 pin)

ISINK

Va (pin 3)

Power Supply Current

Icc

Stand-by Cu rrent

Collector
Emitter
Saturation
Voltage

Output Control Input
Current

Vcc

= 40V

/lA

-100

/lA

1.1

1.3

V

1.5

2.5

V

1.3

3.5

mA

4

4.5

V

V E = OV

= 200mA
IE

100

= -200mA

lEI

PWM Comparator Section

= 0.7V

0.3

0.7

mA

V4 = 2V, See Fig-2

8

mA

ICCQ

V(pin6) = V REF , I/O open

7

12

mA

Emitter
Grounded

tR

RL

= 68n

100

200

ns

tF

RL

= 68n

25

100

ns

Emitter
Follower

tR

RL

= 68n

100

200

ns

tF

RL

= 68n

40

100

ns

Total Device

Switching Characteristics
Rise Time
Fall Time
Rise Time
Fall Time

4-29

lil~III!!~M~III~llmlil!1
FUJITSU
WI~_1i1

MB 3759

Fig. 2 - TEST CIRCUIT
vee= 15V

150rl/2W
Vo
TEST {
INPUT

OUTPUTI

Ve

COMP
OUTPUT2

RT
CT

~}A
~}A

E2

REF

50krl

Fig. 3 - OPERATING TIMING

Voltage at CT

OUTPUT1

OUTPUT2
ON

ON

OSCILLATION FREQUENCY
fose ~ 1.2/(RT • CT )

RT

: kn

CT
: j.lF
fose: kHz

FUNCTION TABLE

4-30

Input (Output Control)

Output State

GND

Single-ended or parallel output

V REF

Push-pull

ON

1~~llllm~I~lllmlmllll~~lllllllmmlm
FUJITSU

Ilmlllllll~~lllmllllmml~~~lllmllllm

MB 375 9

TYPICAL ELECTRICAL CURVES
Fig. 4 - REFERENCE VOLTAGE
vs. POWER SUPPLY VOLTAGE
6

~

w

5

u.

w

>

I
I

4

W

Cl

~
o

>

I:lYREF

o
10= lmA

z

w

W

~_

I-E

..:>
~E

c5
>

>

U

0

tt -10 -

1M

J

u 500k
C/l

.f?
>U

50k

:J

0
w

i

20k

a:

10k

u.

0

I-

5k

...J
...J
U

2k

0

lk

..:

en

"I...

"

ee l=15L

CT = 470pF

"I"

<"O. 01 IL F...........

a:

~

-20

a:

III

w

u.
-30
-25

w

a:

0
25
75
50
TEMPERATURE T A (OC)

100

Fig. 7 - DUTY RATIO vs. DEAD
TIME CONTROL VOLTAGE

O.l11F

0
1-.

Vl000pF

0

""

"

~

Fig. 8 - OPEN LOOP VOLTAGE
AMPLIFICATION os. FREQUENCY
100

i=
..:

90

"

"-

80

u.
:J

Q.

~ iii
w::!<

>

20

>-

30

I-.. J": ..:

30

z

10

Q.

o

Vee = 15V
l:lYo=3V -

:J

0

40
50

I~

V

V
o

1

2

3

DEAD TIME CONTROL VOLTAGE VD (V)

~

Fig. 9 - OUTPUT VOLTAGE
os. OUTPUT CURRENT
(FEED BACK TERMINAL)
~-----r------r-----'5

w

Cl

>

~

W

Cl

o

>

~~

>

~

:J

o

...J

I\.

100
lk
10k lOOk 1M
FREQUENCY f (Hz)

...J

1---~'7f'"c...---+-----( 2

W

Cl

...J

9

w

a;

...J

±

>
W

;:

5

o >

1=
:J

I\.
10

25O~~ ~C

I-

I\.
I\.

20

/

= looc

~
o

'\.

40

>
Q.
o

'\.
I\.

50

I

/

I-

t

o

'\

60

10

i=

..J

"\.

70

v'ee =1,5)
0 f-CT = 1000pF
RT = 30kn

..:
II:

'\

'\

~
t::
z

2k 5k 10k 20k
100k200k500k
TIMING RESISTANCE RT (n)

z
o

o

"

" "-"
"-

lOOk

w

W

'\

200k

z

9

10=lmA

II:

10
20
30
40
POWER SUPPLY VOLTAGE Vee (V)

N
~

o

..........

w>

Fig. 6 - OSCILLATOR FREQUENCY
os. RT. CT

Cl

........

"...

/' _Vee=15V

a:

o
o

a:

I
U

u.

~

w
u.
w

I
U

z
..:

5~:;;
w
a:
w

I

U

II:

5

I(

2

w

V REF

10

..:

Cl

II:

Fig. 5 - REFERENCE VOLTAGE
os. TEMPERATURE

w

1

~----0~.~5-----71.~0----~1~.510L

o

5

10

i

15 10H

OUTPUT CURRENT 10L. IOH (rnA)

4-31

~~III~i~mlllllllllllllllllllllll~llllmllll
FUJITSU

~~llm~ml~~IIIIIOOIII~~II~~~lm MB 3759

TYPICAL ELECTRICAL CURVES (continued)
Fig. 10 - COLLECTOR SATURATION VOLTAGE
VS. COLLECTOR OUTPUT CURRENT
1.2

Fig. 11 - EMITTER SATURATION VOLTAGE
vs. EMITTER OUTPUT CURRENT
w 1.8

Cl

;
1.o1---+---±--::--I----1

~

1.61---+----l:::;;;o;o-"I""==---1

z_

0>
~~
~ I- 1.4 h " " - - + - - +
::l 

5

w

Cl

<{

':i
0

>

3

SV

r-y~o t t

r2

8

VOU~

::l

-

I>.

I-

::l

o

7.5

~~

u.s
~

8

1il

8

I>. U
1>.-

oc-

I-

0

-ICC

~

Z

~

4

r, -

I-

w

~

5

o

o

I

2.5

Q.

2
3
4
5
6
REFERENCE VOLTAGE VREF (V)

leeQ

V
o

20

10

30

40

POWER SUPPLU VOLTAGE Vee (V)

Fig. 15 - AVAILABLE POWER
DISSIPATION vs. TEMPERATURE
1000

1000

i"

i"

.s
0

.s

800

0

Z
0

i=
<{

Z
0

600

i=
<(

Q.

iii

iii
en

C

OC

OC

w

w

200

~

0

600

PF"

400

K

K

~~

..........

200

0

Q.

Q.

0~0-~1~0:--~20~~3~0--4~0:--~
POWER SUPPLY VOLTAGE Vee (V)
Nota: 10 is collector output current at emitter grounded mode

4-32

'-.....

Q.

400

C

~

800

Q.

I>.

o

o

20

40

60

80

100

TEMPERATURE TA (OC)
Not.: C ICeramic DIP) P (Plastic DIP) PF (Plastic FPT)

MB 3759

Illmlllllllllllllllm~~III~~~III~~llllml
FUJITSU
1~111111111~~I~IIII~IIIIIII~IIIII~lllmlllll

TYPICAL APPLICATION
Fig. 16 - Chopper
VO UT ADJUST
r-r./YV'~-~ VOUT: 5V TO 6V
lOUT: 1A

15011

0.111

Fig. 17 - Operating from AC line

A

r

7. 5Kl1

33KI1

VOUT ADJUST

~--:':---=-"I
COMP Vee E,
100RI1
_}
A

10KI1

0.22j---

i

RL

!

8

1

VILA

Rs
VHB

VHB

.r.

7

2

HYS-B

R3

6

3

"

~

VOB

!

OUT-B

i
...

VOS
I

I

S-

V OA

"

OUT-A

"

GND

~

R,

"R;

R,

11

VIN

R,

V ILB =11+

VILA =ll+ R211 Rs )VR-""R; Vee

V IHB

V ILB

R4
VIHS =11+ Rs II Rs )VR

)VR

VIN

II

14

VIHA =ll+

VIN

V IHA

VR'"VTHI'" 1.20V)

R211 R3= ~
R
R

R4
As
)VR

2+

s

R IIR =~
s
s Rs+ R s

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 4 - Hysteresis (A) Current
vs Power Supply Voltage

Fig. 3 - Power Supply Current
vs Power Supply Voltage
Power
Supply
Current
lecl ~A)

Hysteresis lS0
IA)Current
IHHAI ~A)

SOO
~

70°C
2SoC

400

~

120

-20°C

V IH =l.SV

70°C

300

..... ~ L..---

90

~ ~IH=l.SV

25°C
-20°C

200

60

V IL =1.0V

100

a

30

II
0

0
10

20

30

Power Supply Voltage Vee IV)

4-40

2~
!'-'-20°C

40

0

10

20

30

Power Supply Voltage Vee IV)

4

111111111111111111111111111111111111111111111111111111

FUJITSU

MB3761

TYPICAL PERFORMANCE CHARACTERISTICS

1.0

/11

/,

Vee =5V
V'H =1.5V
0.6

0.2

l/

a

"""",

Vee =5V
V'H =1.5V
0.6
0.4

~ '"

10

5

15

'I

I-20 oC '25°C i~oc

'17QOC

Vf

0.4

a

Output 1.0
(S)
Voltage
VOlB (V) O.B

-20°C 250~'

0.8

0.2

20

a

25

./
a

r

1.19

---

10

15

10
20

25

Output {SI Current IOlB {mAl

Fig. 8 - Threshold Voltage
VS. Temperature

Fig. 7 - Threshold Voltage
VS. Power Supply Voltage

1.20

J D

/ If
W
,./"

5

Output (A) Current lOLA {mAl

Threshold 1.22
Voltage
V TH (V)
1.21

(Continued)

Fig. 6 - Output (B) Voltage
VS. Output (8) Current

Fig. 5 - Output (A) Voltage
VS. Output (A) Current
output
(A)
Voltage
VOLA {VI

IIIIIIIIIIIIIIIIIII!IIIII!IIIIIIIIIIIIIIIIIIIIIIIIIIII

Threshold
Voltage
VTH (V)

-----

1.22
1.21
1.20

TA=25°C

-

...--

1.19
Veel =5V

1.18
1.17

1.18

0

10

20

30

Power Supply Voltage Vee (V)

40

1.17

-20

0

20

40

60

80

Temperature TA lOCI

4-41

111111111111111111111111111111111111111111111111111111

FUJITSU

MB3761

111111111111111111111111111111111111111111111111111111

APPLICATION EXAMPLES
Figure 9. Addition of Hysteresis

J

r---------1>--+---O~

R,

Vee (V IN )

R2r-t--r-:------:'

0--

3

6

1L-4______

lID

+---oVOA

' - - - - ' - - - ' - - - -.... VIH (Vee)
VILA V IHA

5...1-

~-------~----o~GND

"iN

q
R,

>-

1

8

R2

2

7

--<

3

6

R3

4

J

51}

Vee
RL

V",

-u
-u

*

VHS
VOS

c,
-V

t II
I
I

Vos

GND

11

11
I
I
I

II

' - - - - ' - - - ' - - - -.... VIH
V IHB
VILS
Note:

4-42

All calculations occur with the output voltage
at O. The hysteresis values are adjusted for
load condition and saturation voltage.

111111111111111111111111111111111111111111111111111111

FUJITSU

I I I I I~I I I I I I I I I I~I I I I I I I I I I I

MB3761

APPLICATION EXAMPLES

(ContInued)

Figure 10. Voltage Detection for Alarm

aJ

R3
>----

R,

1

7

2

3

RL

..

-v

6

14

R4

VCC

5 t--

,... GND

V CCH : (1+

R,
R2
jVR

V CCL : (1+

R3
R.
jVR

~

V CCL ;'; 2.5V

For hysteresis, a positive feedback from pin 2 or 7 is required.

Figure 11. Voltage Detection for Alarm

VCC

Vo

R3
R,

R2

a
R4

7
3

6

4

5

Vo

t

GND
VCCH: (1 +

..-.. ----I

VCCH

VCCL
R3
R.
jVR

VCCL: (1 +

~ VCC
R,

R2 jVR

V CCL ;'; 2.5V

4-43

111111111111111111111111111111111111111111111111111111

FUJITSU

I I I I I I I I I I I I I I I~I I I I I I I I I I I I MB3761

APPLICATION EXAMPLES

(Continued)

Figur,e 12. Programmable Zener

Vz

1

R2

2

+ R3

'-- 4

~

aJ
5l

Rl

Vee

~ <

7

R2+R3

6

3

-

f'.
~

GND

Channel B can be used Independently.

Figure 13. Recovery Reset Circuit

)

15 KO

~

Vee = 5 V

r-,.

330 KO
R4

r

0.1fJ.F

C1

4-44

P

I
IL

1

a l"- t-

2

7 I"-

3

6

4

5 l"-

~

r---,

______

I
I
I
I

R5

-...L.-0
OUT

OUT

6.a KO

"

GND

=

Vee-Vz

Rl

:S SmA
-

111111111111111111111111111111111111111111111111111111

FUJITSU

MB3761

APPLICATION EXAMPLES

111111111111111111111111111111111111111111111111111111

(Continued)

Figure 14. DC Characteristics

Figure 15. Response Characteristics

Vo(V) 6
VCC

V

4

!t

,... V CCH
RCCl

VCC (V)

/
Vo

4.4
Vo(V)

o

•

o

3
VcclV)

5

tRsT

I+--=30 ms

Voltage Threshold Levels (VCCl and \bCH) and
Hysteresis Width can be changed by the resistors
(R 1 through R4 ).
V

CCl =

R 1 + R 2 + R3
R3
V TH

VCCH =VCCl +
•

4

o

Rl (R 2 + R 3 )
R3 R4
VTH

Power-On Reset Time Is provided by the following
approximate equation:
VTH
Rl}
tRST = -C 1 R4 ·1n { 1 - Vcc (1 + R2+ R3 )

•

ir~~~:~~r~::,:~~~;~~~g6. h FE of

•

In the case of an Instant power fall,
the remaining charge In C 1 effects t RST .

•

If necessary, the reversed output Is provided
on HYS terminal

the external

4-45

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~I~IIIII
FUJITSU

I I I I I I I I I I I I I~I I I I I I I I I I I I I I MB3761

PACKAGE DIMENSIONS
8-LEAD PLASTIC SINGLE-IN-LINE PACKAGE
(CASE No.: SIP-08P-M03)

.128 ± .010
(3.25 ± 0.25)

.2C

~I

(6.20 ± 0.25)

L

.061 ~

0°'2

(1.52 ~ g.3O)

Dimensions in
inches (millimeters)

4-46

r~'

.'l!

IC;=:;=;=;=;::::=;:::::;=::;:::;;=;;::::;:::=:;::;=:;=;=::;

~J ~~~

.020 ±.003
(0.50 ± 0.08)

H

.157 ± .012
(4.00 ± 0.30)

-+1 I•.

,010 ± ,002
(0.25 ± 0.05)

'*

100 (2.54) TYP

8080105-2C

111111111111111111111111111111111111111111111111111111

FUJITSU

MB3761

111111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS (Continued)
8-LEAD PLASTiC DUAL-iN-LINE PACKAGE
(CASE No.: DiP-08P-M01)

1.

I

INDEX

.244 ± ,010

!<'r=:;==r=r::;=r=r?' ~± 0,25)

I.

,370

.035

~ :g~~

(0,89~g:~~

~ :gl~

(9,40

.1

EI

~ g:~g)

I+-~-, 100 (2,54) TYP

)

,172 (4,36) MAX

,118 (3,0) MIN
,018
(0,46

± ,003
± 0,08)

~--,060 ~OOI2 (1,52~g,30)

Dimensions In
Inches (millimeters)

D08006S-2C

4-47

111111111111111111111111111I11111111111111111111111111

FUJITSU

IIIIIIIIIIIIIIIIIIIIII~IIIIIIIIIIIIIIIIIIIIIIIIIIIIII MB3761

PACKAGE DIMENSIONS (Continued)
8-LEAD PLASTIC FLAT PACKAGE

~NO.' FPT-OBP-M01)

INDEX

0 /
"

1 .3~~JO·~16
0.40)

.209 ± .012
(5.30 ±

1C::;::;=;r;=:;:;::::::::;:;::::J ~)

6U}
0
"--'
+

A

Dimensions in
inches (millimeters)

4-48

0 0)1.
t

•t

.OB5 (2.15) MAX

± .008
(g:~gl±

.0315

FOB002S-2C

cP

April 1990
Edition 1.0

FUJITSU

PRODUCT PROFILE

MB3769A
Regulating Pulse-Width-Modulation Control Circuit
DESCRIPTION
The Fujitsu MB3769A is a pulse-width-modulation controller for fixed frequency pulse
modulation application. The MB3769A contains a wide band width operational
amplifier and a high speed comparator to construct a very high speed switching
regulator system up to 700kHz. The output is su~able for a power MOS FET drive due
to the adoption of a totem pole output.
The MB3769A provides a stand-by mode at low vottage power supply when it is used in
a primary control system.

FEATURES
•
•

•

High frequency oscillator
(f = 1 to 700kHz)

•

On-chip wide-band frequency operation amplifier (BW = 8MHz type)
•
Internal reference voltage generator
provides a stable reference supply
(5 V±2%)
•

•

•

Adjustable Dead-time
On-ch ip soft start and qu ick shut down
functions
Internal circuitry prohibits double
pulse at dynamic current limit operation
Under-vottage Iock-out function (OFF
to ON: 10 Vtyp. ON to OFF: 8 Vtyp.)

low power dissipation (1.5 rnA typo at
standby mode, 8 rnA typo at operating •
mode)

On-chip output shut-down circu~ with
latch function at over-vottage

•

Output current (± 600 rnA at peak)

On-chip Zener diode (15 V)

•

High speed sw~ching operation
(tr = 60 ns, tf = 30 ns, CL = 1000 pF
typ.)

•

Plastic Package
DIP-16P-M04

Plastic paCka~e
FPT-16P-MO

ABSOLUTE MAXIMUM RATINGS
Parameter

Ratings

Symbol

Power Supply Vottage

Vee

Output Current

20

Unit

lout

120 (660 ' )

rnA

Operation Amp. Input Vottage

Vin(op)

Vee +0.3 (S20)

V

Power Dissipation:

PD
PD

100Q2
62()3

mW
mW

DIP
FPT

Operating Temperature: DIP
FPT
Storage Temperature

Top
Too
Totg

-2010+85
-20 to +75
--3510 +125

Pin Assignment

V

°C
°C
°C

Notes:'Duty oS 5%
2"f. ~ 25°C

+IN(op)

'8

+IN(c)

-IN(op)

15

-IN(c)

Fe

14

VREF

DTC

13

OVP

C,

12

Vcc

As

11

Vz

GND

10

TOPVEW

VL

VM
OUT

3T.= 25°C, FPT package is mounted on the epoxy board. (4cmx 40m x 0.15om)
Note: Permanent device damage may occur if absolute maximum ratings are exceed
ed. Functional operation should be restricted to the conditions as detailed in the
operation sections of this data sheet. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

copywrite

©

This device contains circuitry to prolllct the
inputs against damage due to high static voltages or electric fields. However, it Is edvised tha
ncnnal precautions be taken to avoid applicatio
of any voltage higher than maximum rated
voltages to this high impedance circuit

1990 by FUJiTSU LIMiTED and Fujitsu Microoiodronic:s. Inc

4-49

MB3769A
FIGURE 1. BLOCK DIAGRAM
Over CUrrent Detection Comparator

V-

..

OUT

DTO

Fa
+IN""
-IN""

OVP

S Q
Over Vottage Detector
Power
Off

R

1.5V~.5V

RT
STS

Vz

GND

4-50

MB3769A
RECOMMENDED OPERATING CONDITIONS
DIP Package

FPTPackage

Symbol

Min.

Typ.

Max.

Min.

Typ.

Max.

Unit

Power Supply Voltage

Vcc

12

15

18

12

15

18

V

Output Current (DC)

lOUT

-100

100

-100

100

mA

600

mA

Vee -3

V

Parameter

Output Current (Peak)

IOUTPEAK

600

-

600

-600

-

Operation Amp. Input Voltage

VINOP

-0.2

010 V REF

Vee -3

-0.2

Oto V REF

FB Sink Current

ISINK

-

-

0.3

mA

ISOURCE

-

0.3

FB Source Current

2

-

-

2

mA

Comparator Input Voltage

-

VINC+

-0.3

Ot03

Vee

-0.3

Ot03

Vcc

V

VINe-

-0.3

Ot02

2.5

-0.3

0102

2.5

V

Reference Section Output Current

IREF

-

5

10

-

2

10

mA

Timing Register

RT

9

18

50

9

18

50

kO

Timing Capacitor

CT

100

680

to"'

100

680

10"'

pF

Oscillator Frequency

Fooc

1

100

700

1

100

700

kHz

-

5

mA

75

°C

Zener Current

Iz

Operating Temperature

Tor

:.a0

-

5

-

85

-30

ELECTRICAL CHARACTERISTICS
Reference Section
Value
Parameter

Symbol

Condition

Min.

"iYP·

Max.
5.1

Output Voltage

VREF

IREF -1 mA

4.9

5.0

Input Regulation

AVRIN

12VsVees 18V

2

Load Regulation

AVRLD

1 mAsiREFsl0mA

Temperature Stability

AVRTEMP

-20°C S T. S +85°C

-

Short Circuit Output Current

IIC

VREF - 0 V

15

15

Unit
V
mV

-1

-15

mV

±.200

±750

Il VI"C

.4Q

-

mA

4-51

..

MB3769A
ELECTRICAL CHARACTERISTICS (Continued)
Oclllator Section
Value
Parameter

Symbol

Oscillator Frequency

f"""

Vokage Stability

Il foSC1 V

Temperature Stability

Ilf"""IIlT

Min.

TYP.

Max.

Unit

90

100

110

kHz

12 V oSVee oS18V

-

±-0003

-

%

-20·C oS T. oS +85·C

-,

±2

-

%

Condition
R,.18kO,

Cr- 680 pF

Dead-Time Control Section
Value
Parameter

Symbol

input Bias Current

io

Maximum Duty Cycle

Dmax

Duty Cycle Set

D...

Min.

lYP.

Max.

Unit

-

2

10

Vd -l05V

75

80

75

~
%

Vd - 005 VREF

45

50

55

%
V

Condition

II
I

Voo

-

305

308

VOU

1055

1085

-

V

Discharge Vokag.

VON

-

V

0% Duty Cycle
Input
Threshold
Vokage
Maximum DUty Cycle

Vce - 7 V, lorc - -C03 mA

405

-

Error Amplifier Section
Value
Parameter

Symbol

Condition

Input Offset Vokag.

VIO(OP)

V3 -205 V

input Offset Current

1IO(OP)

V3 .205 V

Input Bias Current

l)s(Op)

V3 .205 V

Common-mode Input Vokage

Vcw(OP)

12 VoS Vee oS 18 V

VokageGain

Av (OP)

005 V s V3oS4 V

Band Width

BW

A, - 0 dB

Slew Rate

SR

Common-mode Rejection Rate
High Level Output Vokage
Low Level Output Voltage

4-52

Min.

lYP·

Max.

Unit

-

±2

:tl0

mV

-

±-30

,:t300

nA

-1

-C03

-

~

-Co2

-

Vee -3

V

70

90

-

dB

8

-

MHz

RL -lOkO, A,,- 0 dB

-

6

-

VIp-sec

CMR

VIN-O 10V

65

80

-

dB

VON

13--2mA

400

406

-

V

VOL

13--3mA

-

001

005

V

MB3769A
ELECTRICAL CHARACTERISTICS (Continued)
Current Comparator
Value
Parameter

Symbol

Condition

Min.

"iYP·

Max.

Unit

VIO(C)

V lN zl V

-

±5

±15

mV

Input Bias Voltage

V'B(C)

V IN - l V

-5

-1

-

Common-mode Input VoHage

VCM (cl

0

-

2.5

~
V

VoHageGilin

A'(c1

VIV

Input Offset VoHage

Response lime

td

50 mV over drive

-

200

-

-

120

250

ns

PWM Comparator Section
Value
Parameter
0% Duty Cycle
Maximum Duty Cycle

Symbol
Vorn

Condition
R,.ISkn, C, = 6S0 pF

Min.

"iYP·

Max.

Unit

-

3.5

3.S

V

I.S5

-

V

Max.

Unit

1.55

Vorl1

Output Section
Value
Parameter

Symbol

Condition

Min.

"iYP·

12.5

13.5

-

V

1.3

V

High Level Output VoHage

VH

IolJT=-100mA

Low Level Output Voltage

VL

louT--l00mA

Rise lime

t,

CL -1000 pF, RL _ 00

-

1.1
60

120

ns

Fall lime

tf

CL _1000 pF, RL = 00

-

30

SO

ns

Over Voltage Detector
Value
Parameter
Threshold Voltage
Input Current
Vcc Reset

Symbol

Condition

V""
Vinvp
VCCRST

V,N-OV

Min.

"iYP·

Max.

Unit

2.4

2.5

2.6

V

-1.0

-0.2

2.0

3.0

4.5

~
V

4-53

..

MB3769A
ELECTRICAL CHARACTERISTICS (Continued)
Low Voltage Stop
Valua
Min.

TYP·

Max.

Unit

OIl to No

VTNN

9.2

10.0

10.8

V

On to OIl

VTNL

7.2

8.0

8.8

V

Max.

Unit

Paramater

Symbol

Condition

Total Device
Value
Parameter

Symbol

Condition

Standby (Vee - 8 V)

IccsTN

R,. 18k il 4-pin Open

Operating

Icc

R,.18kil

Min.

TYP.

-

1.5

2.0

rnA

8.0

12.0

rnA

Value
Parameter

Symbol

Condition

Zener Vottage

Vz

Iz-1rnA

Zener Current

Iz

V11 _ T -1V

4-54

Min.

TYP-

Max.

Unit

-

15.4

-

rnA

0.03

V

MB3769A
FIGURES 2a and 2b. TEST CIRCUIT

Figure 2a

Output

OVP

Vee

OUT

Vz

-

MB3769A

V
FB
l.....
_

1000pF

VyTC
...
w___
•

Test Input

Figure 2b
(tr.tl.let)
3.5 Vtyp.
Vonage
at C,

1.5 V type.

--------~

-~
Voltage at COMP-IN
is generated within 20 ns.

1.05V-=r--- \

COMP ln

1.0V
I

0.95 V

_______

I
90%
Outpu1

100/0
tr_

/

I

1\

I

500/0

\

I
I
I

\. ~

let

•
4-55

lEI

MB3769A
FIGURE 3. OPERATING TIMING

Quick Shut Down
Operation

,,,

Soft Start Operation

.' . . ~

~" '

.-3.5 V

Triangle
Waveform
Error Amp. - '
Output

-~-----

PWM Comparator
Output
Output Waveform
-in Waveform
/ • • ~.
(IV)
+in Waveform --fl-::.~=::!-jl L-.J
U
U
U
U
LJ L.J :IL-._ _ _;..-__
Latch Output

~--------------------------------~~L-r----~---2.5V .........

VoHage at OVP

OVP Latch
Power Supply
Vokage

(15 V)

-10 V (typ.)

OV
Standby Mode

4-56

1

Over Current
Detector

8V

(typ.f

Over Voltage
Detector

L

\:~

'-

Standby Mode

MB3769A
TYPICAL CHARACTERISTICS CURVES
Figure 4. Power Supply Current vs.
Power Supply Voltage
(Low Voltage Stop of Vee)

-

OVP
operating

4.0

2:
::J

C/)

(;;

2.0

3:

-- --

2

OVP
operating
V13=5 V

Vee =8 V
4pin open
13pin=OV

r--

:Y
c

~

Figure 5. Standby Current VS.
Temperature

0

Il.

0.0
0.0

J

~

V-

t l.l,

~-

- -----

Normal
operating
V13=5V

,,

........

4.0
8.0
12.0
16.0
Power Supply Voltage Vee (v)

Figure 6. Reference Voltage VS.
Temperature

>
""::i

Vee=15V
IREF-1 mA

.fi

25
50
Temperature TA (OC)

85

3
Vee = 15 V

0

>

I

w

0

Figure 7. Low level Output Voltage VS.
Low level Output Current

5.1

LL

lEI

20.0

0
-20

~

-

CD

II

:>SJ:

2

*'
oj

~

=0

~

8c

a

"lD

~

Q)

~

>

a::

~

.9
-20

0

25
50
Temperature TA (OC)

0

0.2
0.4
0.6
L Output Current IOL (mA)

0.8

85

4-57

MB3769A
TYPICAL CHARACTERISTICS CURVES
Figure 8. High level Output Voltage vs.
High level Output Current

r--

o

---- -- r--

I

Vee- 15 V

2

4

--.

B

6

10

H Output Current IoH (rnA)

Figure 10. H, L level Output Voltage
vs. Oscillator Frequency

Figure 9. OSCillator Frequency vs. RT
700
600
500
400

" "'-

300

'N

e-

200

_!!3
()

.,c:

100

""

::>


i

I'...

"- ~

50

"-

o
~

~
~CT=220PF

~
.c

...J

~

20

7

10

"' I"-"'"- I"-

'"

i\..

~CT-22~PF
20

30

RT(kO)

40 50

Vee = 15 V

III

VH

3

f\l ~

2

VH
III

-VL

VL

1

.Ql

J:

"1"-

4

-'

CT = 1000 pF "-

U-

4-58

I

I

~ CT-l00pF

~~'

o

I

70

0

20k

50k
lOOk
Frequency fose (Hz)

500k

1M

MB3769A
TYPICAL CHARACTERISTICS CURVES
Figure 11. Duty Cycle YS. Dead Time
Control Voltage
100

I

I

Vee z15V
CL = 1000 pF

fose = 200kHz
80

"'0

>.
()
>.

5

c

4r---;-----+-----~----~

\

~
~
(I)

Figure 12. Oscillator Frequency YS.
Temperature

60

2r---;-----+-----t7~~~

fose = 500kHz \
40

\

20

o

o

Target

\

=_
100kHz
typo
O'--__....L.._ _ _fose
_
_
_ _ _ _±2%
___
----'
~

-20

2
3
4
5
Dead Time Control Vottage VDTe (V)

o

25

50

85

Temperature TA (0G)

Figure 13. Dead Time Control Voltage YS.
Current (Standby Mode)
5.0

"'

4.0

3.0

1\

\

2.0
1.0

~
c

0

o

-0.2 -0.4

-0.6

-0.8

-1.0

-1.2

Dead Time Control Current IDTe (mA)

60

-

Figure 14. Gain/Phase YS.
Frequency (Set Gy 60 dB)

=

40

-180

pLUI

.......,

-240

j

t

o

Gain

100k

-300 (Oeg)

"
~

-360

1M
Frequency

f (Hz)

4-59

MB3769A
TYPICAL CHARACTERISTICS CURVES
Figure 15. Duty cycle vs.
Temperature
SS

Figure 16. Low Level Output Voltage vs.
Low level Output Current

Vee = 15V
CL= l000pF
VoTc =2.5V

Vee =1 15 V

::6

..
Q)

1.S

g>

..

0

r-I~Z

-

45

~~
so

2S

0

1.0

!
'iii

O.S

~

o

~

losc = 500kHz

-20

~
_

~

o

- --

100

200

I--

300

---

400

:--

SOO

IoL(mA)

85

Temperature TA (OC)

14.0

..g>

~

13.S

""~
s
%
o

13.0

]

12.S

:r

0

Figure 17. High Level Output VoHage vs.
High level Output Current

o

100

VCC=15V

r--- r-- t--

200

300

400

--

SOO

Figure 18. tR/t¥td VS. Temperature
160
Vee = 15V
CL= 1000 pF

140

--

120

V-

---

600

IoL(mA)

60

40

20

o

o

2S

Temperature

4-60

so
T. (OC)

85

600

MB3769A
TYPICAL CHARACTERISTICS CURVES
Figure 19. Standby Power Supply
Current vs. Temperature
6

Vee = 8 V
4-pin opoen
13-pin = 3 V

r-- t--

t-- i""-

Ell

t-

j~
-40 -20

0

20

40

60

80

100

Temperature rC)

Figure 20. OVP Supply Voltage
Reset vs. Temperature
5

.... r-

-t-. r- r-

t-...

~~

o
-40 -20

0

20

40

60

80

100

Temperature (Oe)

4-61

MB3769A
FIGURE 21. MB3769A TYPICAL APPLICATION
DC - DC Convener
12- 18 V

-

'"

.1.-

V'

1

..

:>

.
:>
100kW

+IN(c) 16

2 -IN(op)

-IN(c)15

I

1q¥?1

1.

1 +IN(op)

'In

3 FB

~

II

4 DTC

OVP 13

50,.

Vee 12

6 RT

Rz 11

8 VL

•

V'REF 14

()

IE

OUT 9

R

~

220pF
5.1k

~

"'i

l'7

4-62

18W

10kn ..;

r--

~ 2.4

''I

VM 10

~

~~

.;.

20kn

T 330pF

r- 7 GND

..: 51W

.~ 3.6

3.3W
l-

0.1mF

~

VI

.~~ T

C

S

5V

IA

MB3769A
FIGURE 22. PRIMARY CONTROL

I? T
R

'1J'

I:

"

'1

R4A

u.

~~
4.71JF

~

~

+IN(lap)

+IN(c)

-IN(Iop)

-IN(C)

VREF I""

DTC

h
OVP I""
Vee IIZl

r--t:i

RT

Vz 1""

~~

Vl

-

-

I

p--.

~Lb>

.r"

.:1\.:
-)' I

1

:---; ~

n

.:~:
-),

l-n

h

CT

-[i GND

I-

E-,

Fa

r---~

~

• .p
I.r .

R15A

47Kn

h

VM ~

OUT~

~

f

H~

p,w.---<

221<0

~ -

I.] I.
"

,

R4B

221<0

101<0

-

680 F
p

181<0

1\
R15B
15Kn

4-63

III

MB3769A
FIGURE 23. SECONDARY CONTROL
,.....-- 15v

OIlL_

..'",
'"

ov

,

2nd Coil
431<0

.......

K>

391<0 12 v

5.1Kn

wI 0'
~ .H.
T r-: ·tT",
~.,"V

II
...,

1okr.i

+IN(op) +IN(c

161

~

-IN(op) -IN(c

151

~

FB

VRE

141

DTe

OVP

3----

Or

Vee

121
...J

RT

Rz

~

--Q

GND

VII.

~

3-

VL

OUT

L

1000 F

~I

G
•

271<0

14
L
'fWr~

J

I
I

51W

'---

II

IS
L

~

II~
;:iL

..:.J

...J

--'

~

~'

,
~

10W

4-64

.

If
680pF

~~
~

18W

~

T

MB3769A
PACKAGE DIMENSIONS
16-LEAD PLASTIC DUAL IN-LINE PACKAGE
(case No. DIP-16P-M04)

=!:::::Jt
1~.
LrJ V L 770+.008 (1956+0.2 1 V LJ I
-.012
. _0.3-----t

Dimll",ion,in
im;:tI. . tmillimeter,1

Cl FUJITSU LIMITED 1986 018033S·2C

16-LEAD PLASTIC DUAL IN-LINE PACKAGE
(Case No. FPT-16P-M02)

I
INDEX

.234(5.96)

f1F;=r=;=;==r=r=;=r=;=;=r=r=;:=;=?I.J•.••1

. ~~p (2.54)

I
Dimensions in
inche,("ullimeter.1

el986 FUJITSU LIMITiODl8022S.1C

4-65

Power Supply Controls

4-66

Unear Data Book

MB 3771
September 1986
Edition 1.0

POWER SUPPLY MONITOR
The Fujitsu MB 3771 is designed to monitor the voltage level of one or two
power supplies (+5V and an arbitrary voltage) in a microprocessor circuit,
memory board in large-size computer, for example_
If the circuit's power supply deviates more than a specified amount, then the
MB 3771 generates a reset signal te the microprocessor_ Thus, the computer
data is protected from accidental erasure.

PLASTIC PACKAGE
DIP-OBP-M01

Using the MB 3771 requires few external components. To monitor only a +5V
supply, the M B 3771 requires the connection of one external capacitor. The
level of an arbitrary dectection voltage is determined by two external resistors.

EI

The MB 3771 is available in an B-pin Dual In-Line, Signal In-Line Package
or space saving Flat Package.

PLASTIC PACKAGE
DIP-OBP-M02

•

Precision voltage detection (V SA = 4.1 t04_3 V)

•

User selectable threshold level with hysterisis (V SB ~ 1.24 V)

•

Monitors the voltage of one or two power supplies (5 V and an arbitrary
voltage, ~ 1.23 V)

•

Low voltage output for reset signal (V ce

•

Minimal number of external components (one capacitor min.)

•

Low power dissipation (Icc = 0.35 mA typ., Vee = 5 V)

•

Available in a variety of packages
B-pin Dual In-Line Package
B-pin Single In-Line Package
B-pin Flat Package

FPT .o8P-MO 1: See page 20

= O.B V

PIN ASSIGNMENT

typ.)

CT
Vse
OUTe

VSB!RESIN

GND

Vee

8

RESET

7

VSA

ABSOLUTE MAXIMUM RATINGS
Rating
Supply Voltage

Symbol
Vee

Value

Unit

-0.3 to +20

V

Input Voltage A

V SA

-0.3 to Vee+0_3
«+20)

V

Input Voltage B

V SB

-0_3 to +20

V

Input Voltage C

Vse

-0_3 to +20

V

Power Dissipation

Po

Storage Temperature

TSTG

200 (T A ~ B5°C)

mW

-55 to +125

°c

NOTE: Permanent device damage may oceur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

6

VsB!RESIN

5

Vee

4

GND

FRONT
VIEW

3

OUTe

2

Vse

01

CT

Thi$ device contains circuitry to protect the

inputs against damage due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedance

circuit.

4-67

l~m~I~~!!~lllmmlll~~llil
FUJITSU
1~11~~iil~~illiilllll~~i~llil MB 3771

BLOCK DIAGRAM OF MB 3771

Comparator C

L---------------------------------~---------4_i_i~~------~GND

OUTc

FUNCTIONAL EXPLANATIONS
Detection voltage inputs A and B are connected to the inverting input of Comparators A and B respectively. Both
comparators have built-in hysterisis. If either VSA or VSB
drops lower than about 1.23V. then RESET goes low.

logic (See Example 7). and generation of reference voltage
(See Example 10).

Comparator B is used for the arbitrary preset voltage detection (See Example 3). or as forced reset input for TTL logic
level input. (See Example 6)

The MB 3771 can detect about 2"s voltage sag/surge of the
power supply. The user can add delayed trigger capacity by
connecting a capacitor between inputs VSA and Vse. (See
Example 8)

Comparator C is designed as an open-collector output with
inverted polarity input/output characteristics. Comparator
C has no hysteresis. It can be used for over-voltage detection
(See Example 11). generation of RESET signal by positive

4-68

Note that VSB and Vsc should be connected with Vee and
GN D respectively. (See Example 1.)

Internal pull-up resistor on the RESET line provides for high
impedance loading (i.e. CMOS logic).

1111111111111111111111111111111111111111111111111111

FUJITSU

MB 3771

1111111111111111111111111111111111111111111111111111

RECOMMENDED OPERATING CONDITIONS
parameter

Symbol

Supply Voltage

Vcc

Output Current (RESET)

I RESET

Output Current (OUTcl

IOUTC

Operating Ambient Temperature

TA

Value

Unit

+3.5 to +18

V

o to 20
o to 6

rnA

-40 to +85

°c

rnA

EI

ELECTORICAL CHARACTERISTICS
DC Characteristics (Vee = 5V. TA = 25°C)
Value
Symbol

Condition

Parameter

Unit
Min

Typ

Max

V SB

= 5V. Vsc

= OV

Icc1

350

500

/lA

VSB

= OV. Vsc = OV

Icc2

400

600

/lA

4.10

4.20

4.30

V

4.05

4.20

4.35

V

4.20

4.30

4.40

V

4.15

4.30

4.45

V

50

100

150

rnV

1.212

1.230

1.248

V

1.200

1.230

1.260

V

3

10

rnV

28

42

mV

Supply Current

Sagging Detection
Voltage Falling

Vee
V SAL
Vce. TA

= -40 to +85°C

Vee
V SAH

Rising
Vee. TA =-40to+85°C

V HYSA

Hysterisis Width
V SB
Sagging Detection Voltage
V SB • TA
Deviation of Detection
Voltage

= -40 to +85°C

Vee = 3.5 to 18V

V SB

!'NSB
V HYSB

Hysterisis Width

14

V SB = 5V

I'HB

0

250

nA

= OV

I'LB

20

250

nA

Input Current
V SB
High-level Output Voltage

= -5/lA. VSB

= 5V

V OHR

IRESET = 3rnA. VSB = OV

V OLR

IRESET

4.5

V

4.9
0.28

0.4

V

0.38

0.5

V

Output Saturation Voltage
IRESET = lOrnA. VSB = OV
Output Sink Current

V OLR = 1.0V. V SB = OV

IRESET

20

40

CT Charge Current

V SB = 5V. VeT = 0.5V

leT

9

12

rnA
16

/lA

4-69

OOOO~III~lllllliYII!lnlml
FWITSU

I~UilliUl~.IIIIH~1 MB 3771

ELECTORICAL CHARACTERISTICS (Cont'd)
DC Characteristics (Vee - SV. TA = 25°C)
Value
Condition

Parameter

Symbol

Unit
Min

Typ

Max

Vsc = 5V

IIHC

0

500

nA

Vsc = OV

IILC

50

500

nA

1.225

1.245

1.265

V

1.205

1.245

1.285

V

Input Current

Vsc
Detection Voltage

Vsc
Vsc. T A = -40 to +85°C

Deviation of Detection
Voltage

Vcc = 3.5 to 18V

b.Vsc

3

10

mV

Output Leakage Current

V OHC = 18V

IOHc

0

1

/lA

Output Saturation Voltage

IOUTC = 4mA. Vsc = 5V

VOLC

0.15

0.4

Output Sink Current

VOLC = 1.0V. Vsc =5V

IOUTC

Reset Operation Minimum
Supply Voltage

VOLR=0.4V.IRESET=200/lA

V CCL

6

15
0.8

V
rnA

1.2

V

AC Characteristics (Vee = SV. TA = 2SoC. CT = O.Ol/lF)
Value
Parameter

Condition

Symbol

Unit
Min

Input Pulse Width

VSA • V SB

RESET Output Pulse Width

tpi

5.0

tpo

0.5

Typ

Max
/lS

1.0

1.5

ms

RESET Rising Time

RL = 2.2kn. CL = 100pF

tR

1.0

1.5

/lS

RESET Falling Time

RL = 2.2kn. C L = l00pF

tF

0.1

0.5

/lS

VSB

tpD

2

10

/lS

Vsc. RL = 2.2kn. CL = 100pF

tpHL

0.5

/lS

Vsc. RL = 2.2kn. CL = 100pF

tpLH

1.0

/ls

Propagation Delay Time

4-70

11~~III~mllllllllllll~~~~lmllllllllllml
FUJITSU

MB 3771 mm~~~~~llllmlllll~~~~mllllllmll~

FUNCTION EXPLANATION
Vee

CT

1

8

2

7

3
4

6

RESET

5

ID

VHYS

Vs

_-=-=J-=.:::=--=--=--=--_-_-=-- r-=--=--=--=--=--=====- -

t

I
I
I

Vee

I
I
I

I
I

I
I

I

1- _______________ _
I
I
I
I
I
I

I
I

I
I

I
I

I
I

I I

I
I

I
I

I

--------+-----------+-r----------------r-------

O.8V

i i i
I
oL-~_+---------+----------~~----------------~------_+~~­
I
I
I
I
I
I

I
I

TpO

TpO

I
I
I

I

I
I

I

oL-~~=====*~------~~~--------~====~~2

3

4 5

6

8

Point 1:

When Vee rises to about 0.8V, RESET goes low.

Point 2:

When Vee reaches Vs + V HyS , CT then begins charging. RESET remains low during this time.

Point 3:

RESET goes high when CT begins charging.

Point 4:

When Vee level drops lower then Vs , then RESET goes low and CT starts discharging.

Point 5:

When Vee level reaches Vs + V HyS , then CT starts charging.

Top::::e CT x 10' [msl

In the case of voltage sagging, if the period from the time Vee goes lower than or equal to Vs to the time
Vee reaches Vs + V HYS again, is longer than tp1 • (as speicified in the AC Characteristics), CT is discharged
and charged successively.
Point 6:

After Tpo passes, and Vee level exceeds Vs + V HYS , then RESET goes high.

Point 7:

Same as Point 4.

Point 8:

RESET remains low until Vee drops below 0.8V.

4-71

1IIImlllll~~IIIII~~IIIIIIIIIIIIIIIIIIIIII~~1
FUJITSU

11111111111111111111~llllllllllmlll~mlllllll MB 3771

EXAMPLE 1: 5V Power Supply Monitor

Vee

I

MB 3771

RESET

8

rr=~

7

logic Circuit

6~

5-

~4

I
71

NOTE: Monitored by VSA . Detection Threshold Voltage is VSAL and VSAH •
EXAMPLE 2: 5V Power Supply Monitor with external adjust
vee

I

MB 3771

RESET

8

-2
.[[1
CT
3
-4

7rr
6
-- 1 l
5r<

Logic Circuit

>R2

<

I

n
NOTE: Detection voltages can be adjusted as shown below.
Detection Voltage

Rl [kn]

R2 [kn]

10

3.9

4.4

4.5

3.9

4.1

4.2

VSAL [V]

9.1

VSAH [V]

EXAMPLE 3: Arbitrary Voltage Supply Monitor
Example 3a: Case: Vee < 18V
veeo---------~-.

MB3771

ri---+----o RESET
1
2

8

3

6
5

4

4-72

7

1IIIIIIIIIIIIIIIIIIIIImllllllllllllllllllllllllili

FUJITSU

MB 3771 11111111111111111111111111111111111111111111~lmll

EXAMPLE 3: Arbitrary Voltage Supply Monitor
Example 3b: Case: Vcc ~ 18V
vcc

R3 .;
Stablized 5V

lOOk

~ R4

'--- 1

CT

8

.

7f---

2

I

:-

33k

<>

f---3
R5 0.47"

6

r-- ~

5r-

-4

RESET
R,

R2

mIT

m-

RESET output levels range from OV to 1V approximately. Device damage may occur if
• exceeds
its high level (1V).
• Output voltage and maximum RESET voltage levels are determined by resistor R, and R2 .
• In this case, the 5V stabilized output can be used to power TTL circuitry.
• Using the chart below, the value of R3 can. be determined with respect to the output current.

RESET

Vcc
[V]

Detection
Voltage
[V]

Min. Vcc
for adequat
RESET [V]

R,

R2

R3

[Mr2]

[kr2]

[kn]

Output
Current
[mAl

140

100

6.7

1.6

20

110

<0.2

100

81

3.8

1.3

20

56

<0.5

40

33

1.4

0.51

20

11

NOTE: Resistor values are determined when louTc

= 100I.lA, VOLC = O.4V. All resistor are

EXAMPLE 4: 5V and 12V Power Supply Monitor (V cc'

<1.6
1/4W.

= 5V, VCC2 = 12V)

VCC2
vc c ,
MB 3771

CT

8
7

rr=~
3

-

~

RESET
<

>R,

:~~

4

Logic Circuit

).

:>R2
n
NOTE: 5V is monitored by VSA • Detection voltage is about 4.2V.
12V is monitored by VSB • When R, = 390kr2 and R2 = 62kr2, Detection voltage is about
9.0V. Generally the detection voltage is determined by the following equation.
Detection Voltage

= (R,

+ R2 ) VsB /R 2
0

4-73

Immlmimmmlm~~~immlilimilm
FUJITSU

~~I~~lllm~~~~lllllllmllmOO~~m~1 MB 3771

EXAMPLE 5: 5Vand 12V Power Supply Monitor
(R ESET signal is generated by 5V, Vee, = 5V, Vee2 = 12V)
vee20----,
Vee,o-----+-------------------~------------~------------_.

RL
R5

1

R2

3

CT

RESET

B
7

2

IRQor Port

6
5

4

Logic Circuit

R3

MB 3771

R4

Where R, = 390kQ, R2 = 33kQ, R3 = 30kQ, R4 = lOOkQ. RL = lOkQ

NOTE: 5V is monitored by VSA, and generates RESET signal when VSA detects voltage sagging. 12V
is monitored by Vse , and generates its detection signal at OUTe .
The detection voltage of 12V monitoring and its hysterisis is determined by the following
equations.
R, + R2 + R3
Detection voltage = --'-=---=-:::---'- Vse (8.95 volts in the circuit above)
R2 + R3
R, (R3 - R3 11R 4 )
Hysterisis width = (
Vse (200mA in the circuit above)
R2 + R3 ) (R 2 + R3 II)
R4

EXAMPLE 6: 5V Power Supply Monitor with forced RESET input

Vee

I

MB 3771

rr=~

-4

B

RESET

7

6
5-

Logic Circuit

I
r,'i

4-74

NOTE: RESIN is an TTL T com patible input.

1IIIIIIIIIIIIIIIIIIIIIIIIIIIImlllll~~III~~~11
FUJITSU

MB 3771 111111111111111111111~mllllllllllllllllmllll~

EXAMPLE 7: 5V Power Supply Monitor with Non-inverted RESET
Vee
MB 3771

10k!l

RL

1
2
3
4

CT
RESET

8

7
6
5

NOTE: In this case, Comparator C is used to invert RESET signal. OUTe is an open-collector output.
R L is used as a pull·up resistor.

l'p r-

EXAMPLE 8: 5V Power Supply Monitor with delayed trigger

Vee 5 V L F
Vee

4V

MB 3771
8

CT

2

7

3
4

6
5

RESET

tp min.

= 40,,5
when Cl = 100ClpF.

EXAMPLE 9: 5V and arbitrary negative voltage Monitor
Vee

RS ~ 5.1K!l
MB 3771
,.---!-_--~

1

8r-~--~r_-_oRESET

•

20k!l

Rl:> 20k!l

2

t-_ _

-+_~__!-R_3~~-;3

61--+---";

-::'r- SBO JL4_ _ _ _5-Jf-n7
NOTE: +5V and negative voltage are monitored at Vee and VEE respectively. R" R2 , and R3 should
be the same value. The negative detection voltage is determined by as the following equation.
Detection voltage Vs = VSB

-

VSB ' R4/R3

Example: When VEE = -5V and R4 = 91kn, Vs = -4.37V.

4-75

1111111111111111111mllllllllllllllllllllllllll~11
FUJITSU

111~~~~lmllllllllllllllllmlllm~llllm~1 MB 3771

EXAMPLE 10: Reference Voltage Generation and Voltage Sagging Detection
Example lOa: 9V Reference Voltage Generation and 5V/9V Monitoring

15vo-----------------------------~--~

" 3k!l
Vee: 5V 0----------------------------,R5 :.(:

MB 3771

'
8~--+---~---------------ORESET

,..--1-.-+---13
0.47/lF

1

~------~------_o9V

6

4

5

Ra c 7.5k!l RT

1.2k!l

~

300k!l

(upto 50mA)

RC>
2

~ 62k!l

n
NOTE: Detection Voltage: Vs = 7.2V
Example lOb: 5V Reference Voltage Generation and 5V Monitoring
15Vo-----------------------------~--~

MB 3771
81--1~-I----------------_<>

65J~~~-----------------o5V
R
(upto 50mA)
3 ;3.6k!l

,..--t~t-+--I3

0.47/lF

~

RESET

<"

4

n
NOTE: Detection Voltage: Vs = 4.2V
NOTE: In the above examples, the output voltage and the detection voltage are determined by the
following equations:
Output Voltage:

Vo = (Ra + R4)o Vse /R4

Detection Voltage: Vs = (R T + R2 ) VSS /R2
0

4-76

m~~~~~II~m~~OO.1
FUJITSU

MB 3771 1~~I~!~~!~lml~~I~I~~i~m!!

Example lOc: 5V Reference Voltage Generation and 5V Monitoring
Vee

> R,
MB 3771

>-

CT

8
7

3

61--

r- 4

1>R2

~

1
2

RESET

EI

5V

5

'--

~Ra
TC'

Using the reference table below. the value of R, can be
determined. Where R2 is 100kO. Ra is 33kO. C, is 0.47j.tF.
Reference Table of R,. Vee. and the output current
R, [kO]

Vee [V]
40

Output Current [mAl

11

<1.6

24

6.2

<1.4

15

4.7

<0.6

Example 10d: 1.245V Reference Voltage Generation and 5V Monitoring
vee
(5V)
10k

> R,
1

t-- 2

CT

GND

1~~:

8

RESET

7

6 '-5 t--

5V

0.4 ItF

TT

Reference Voltage
1.245V typo

NOTE: Resistor R, determines Reference current. Using 1.2kO as R, • reference current is about 2mA.

4-77

mmmlll~lmlll~~m~lml~~~IIIII~~1
FWITSU

1~~lllm~m~~~lml~llmllm~I~~~~ MB 3771

EXAMPLE 11: Low Voltage and Over Voltage Detection
Veeo-~--------------------~--,

MB 3771
81-+-+----jr---D RESET

+----+--+-12

EI

6~+--+

3

Vee
4
5 f-'-------I

r.'T
NOTE: VSH has no hysteresis. When over voltage is detected, RESET is held in the constant time as
well as when low voltage is detected.
VSL

=

(R, + R21" Vse/R2

V SH = (R 3 + R4 1" V se /R4

EXAMPLE 12: Detection of Abnormal State of Power Supply System
This example circuit detects abnormallow/over voltage of power supply voltage and is indicated by LED
indicator. LED is reset by the CLEAR key.
Veeo-~--------------------~--~-------------,

"t LED
:>

~R3

MB 3771

8

R2

<-

1

CLEAR

>

+--------12

7

,.- 3

6

~. i+-L.4_ _ _ _

<

R4

---I
5 r---

~'--__________,--------'

Where R3

=620n, R4 = lkn to l00kn

NOTE: The detection levels of low/over voltages are determined by VSA , and R, and R2 respectively.

4-78

1111111111111111111111111111111111111111111111111111

FUJITSU

MB 3771

1111111111111111111111111111111111111111111111111111

EXAMPLE 13: Back-up power supply system (Vee = 5vI
Veeo---------------~__r----------.

R4> lk.!"!
.AA

l30k.!"!

Y

I

RS
-AAA

100k~

MB 3771
1

2
-3

4

EI

Rs
8~---t--r-+-~~-+----------------~----~veeo
7'-

lOOk.!"!

6--

[~P------t""--ocs

Sr-

56k.!"!

NOTE: Use CMOS Logic and connect Voo of CMOS logic
with Veeo.
The back-up battery works after CS goes high as
V2

t.>

300

>
Q.
Co
:>

en

200

100

20
Supply Voltage V cc [V]

700
Supply Current ICC2 vs. Supply Voltage

600

500

";(

.3

'"

0
.E 400
E

f

!;

t.>

~
Co
Co

300

.i!

200

100

Supply Voltage VCC [V]

4-80

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~IIIIIIIIII
FUJITSU

MB 3771

4.5

~..J
«

4.4

«

4.3

~
:i:
en

>

"

'"
l!!

'0

>

1111111111111111111111111111111111111111111111111111

Detecti~n Voltage JSA vs. Am~ient Tempe!ature
VS AH

-

VSAL

4.2

c

.g
~

~

4.1

4.0
-50

o

-25

25

50

75

100

Ambient Temperature TA rOC]

1.30
Detectidn Voltage

~

V~B vs. Ambiint Temperalure

..J

m
en

>
:i:

m

en

>

8, 1.25

l!!

'0

>
c

o

"E

t

Cl

-

VS BH

-

VSBL

1.20
-50

-25

o

25

50

75

100

75

100

Ambient Temperature TA rOC]

1.30

Detectio~ Voltage v~c Ambie~t Temperatlre
VS.

~
U

en

>

"'"

~ 1.25

o

>
c

.g

j
1.20
-50

-25

o

25

50

Ambient Temperature TA rOC]

4-81

1~~IIIIiI~.MI
FUJITSU

~~~~IM~~~ml_~ MB 3771

1.27

1.26

VSBH

1.~5

Vse

?:
J:

III
(/)

>

.
>

1.24

j

lEI

UI

VS BL

<>

".

(/)

1.23

>
l!!

"0

>c:

1.22

.g

Detection Voltage VSB. Vse

~
C

YS.

Supply Voltage

1.21

1.20

o

10

5

20

15

Supply Voltage Vee [VI

5
RESE+ Output Voltage

?:

/

ys.1 Supply Voltage

4

II:
oJ

0

>
8,

l!!
"0

3

>
'5
S
~

2

0

Ii

~~OC
0

85°C
2

3

Supply Voltage Vee [vI

4-82

4

5

l~i~IIIII~~~~~lllmlmllll~II!lI~!1
FUJITSU

MB 3771 ~~lm~I~!~lm~!~~~I~!~~~~~!~

5.0

'~IT"'~_' '_"."mo"'~'I~

~

a:

I

0

>

i!l,

f!
0

>

1

4.5

~

-4O·C

:f

25·C

Ii

85·C

I
-5

-10

-15

RESET Output Current IOH [IIA]
2.0,-----,-------r-------,-----,-----,---,
RESET Low-level Voltage vs. RESET Output Current

~

a:

..J

0

>

"

'"
f!
0

>

1

1.0

10
...I

Ii
20

10

40

30

50

RESET Output Current IRESET [rnA]
1.0

">
U

..J

0

.

>

f!
'"
0

0.5

>
;
9-

"

0

U

I-

::l

0

5

10

15

20

OUTC Output Current IOUTC [rnA]

4-83

111111111111111111~IIIIIOO~IIIII~IIIIIII~~1
FUJITSU
1111111111111111111111111~~IIIII~~lllml~i~1 MB 3771

10
CT

caJacitance~. Reset HJld Time

100m

!

10m

"

lEI

V

E

i=

25°C

"C

"0

'\

1m

J:

_40°C

m

II:

100"

--

10"

I"

lp

lOp

V

V

V

/

~
~oC

~

lOOp

1000p

0.01"

0.1"

10"

I"

100,.

CT Capacitance [F]

1.5
Reset Hold Time VS. Supply Voltage JCT = O.OI"F)

-

i

-4Q°C

-

1.0

.

25°C
85°C

0

~

"

E

i=

"C

"0
J:

!

II:

0.5

o

5

·10
Supply Volt;lge Vee [V]

4-84

15

20

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~IIIII
FUJITSU

MB 3771

1111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
8-LEAD PLASTIC DUAL-IN-LINE PACKAGE
(CASE No.: DIP-08P-M01)

!J;::::;r=;==;=r=;=;==?!1
.354(9.0)
.38619.8)

.234L95)

.29017.371
31017.87)

.254(45)

I

..

.

.17214.36)MAX

.11813.0)MIN

.03910.99)
.05111.29)

.01510.38)
.02110.54)
Dimensions in
inches (millimeters)

.06011.52)
.07211.82)
© 1985 FUJITSU LIMITED DOBOD6S·1C

8-LEAD PLASTIC DUAL-IN-LiNE PACKAGE
(CASE No.: DIP·08P-M02)
INDEX

.234L95)

f!i=;=;:==j=;==;:=r=?!1~6.45)
.35419.01
.38619.81

.29017.371
.31017.871

.

.02310.591
.04911.241
.17214.36IMAX

.11813.0IMIN
.03910.991
.0511'.291

.0'510.381
.02"0.541
.060(1.521
.07211.821

© 1986 FUJITSU LIMITED D08005S·1C

Dimensions in
inches (millimeters)

4-85

mllllll!~I~II~IIUIIIW
FUJITSU
OO~M~~I.~II~~ MB 3771

PACKAGE DIMENSIONS

8-LEAD PLASTIC FLAT PACKAGE

(CASE No. : FPT-08P-M011

.(102(0.051

Detellsof "A"part

J .~;~O.1BJ
.027(0.681
MAX

Cl19116 FUJITSU LIMITED FOB002S·IC

4-86

DlmenslonilninehQ
(millimeters)

cO

September 1989
Edition2.1

FUJITSU

DATA SHEET

MB3773
POWER SUPPL Y MONITOR WITH WA TCH-DOG TIMER
POWER SUPPLY MONITOR WITH WATCH-DOG TIMER
The Fujitsu MB3773 is designed to monitor the voltage level of a power
supply (+5 V or an arbitrary voltage) in a microprocessor circuit, memory
board in a large·size computer, for example. The MB3773 also contains a
watch-dog timer function to detect uncontrol. Table status of processor and
reset system/processor.

..

PLASTIC PACKAGE
DIP-OSP·MOl

If the circuit's power supply deviates more than a specified amount, then the
MB3773 generates a reset signal to the microprocessor. Thus, the computer
data is protected from accidental erasure.
When the MB3773 does not receive the clock pulse from the processor in the
specified period, the MB3773 generates a reset signal to the mciroprocessor.

PLASTIC PACKAGE
FPT-OSP-MOl

Using the MB3773 requires few external components. To monitor only a
+5 volt supply, the MB3773 requires the connection of one external capacitor_
The MB3773 is available in an 8-pin Dual In-Line package space saving Flat
Package, or a Single In-Line Package.
• Precision voltage detection (V s

=

PLASTIC PACKAGE
SIP·08P·M03

4.2 V ±2.5%)

• Threshold level with hysterisis
•

Low voltage output for reset signal ( Vee

•

Precision reference voltage output (V REF = 1.245 V ±1.5%)

•

External clock monitor and reset signal generator

=

0.8 V typ.)

•

Negative-edge input watch-dog timer

•

Minimal number of external components (one capacitor min.)

•

Available in a variety of packages
8-pin Dual In-Line Package
• 8-pin Flat Package
• 8-pin Single In-Line Package

PIN ASSIGNMENT

ABSOLUTE MAXIMUM RATINGS
Rating
Supply Voltage

Symbol

Value

Unit

Vee

-0.3 to +18

V

Vs

-0.3 to Vee +0.3 (~+18)

V

VeK

-0.3 to +18

V

VOH

-0.3 to Vee +0.3 (~18)

V

Po

200

mW

TSTG

-55 to +125

°c

Input Voltage
RESET, RESET Supply Voltage
Power Dissipation (TA
Storage Temperature

::;;

85°C)

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

This device contains circuitry to protect the

inputs against damage due to high static voltages or electric fields. However. it is advised
that normal precautions be

taken to avoid

application of any voltage higher than maxi·
mum rated voltages to this high impedance

circuit.

4-87

MB3773

Fig. 1 - MB3773 BLOCK DIAGRAM

@
VCC

(j) Vs o-~---l
~40

kSl

......1_.,

Inhirbi~t

@ CKQ--t---;

Watch

Dog
P.G

Timer

~-------------------------+-r----------~4-----+-~-----------()GND

RESET

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Value

Unit

Supply Voltage

Vcc

+3.5 to +16

V

Reset, Reset Sink Current

IOL

Oto 20

rnA

VREF Output Current

lOUT

-200 to +5

rnA

Watch Clock Setting Time

two

0.1 to 1000

ms

Rising/Falling Time

tFC, t RC

<100

p.s

Terminal Capacitance

CT

0.001 to 10

p.F

TA

-40 to +85

°c

Operating Ambient Temperature

4-88

@)

MB3773

ELECTORICAL CHARACTERISTICS
(1) DC CHARACTERISTICS
Value
Parameter

Condition

Symbol

Supply Current

Watch dog timer operating

~

Vcc

Max

600

900

4.10

4.20

4.30

4.05

4.20

4.35

4.20

4.30

4.40

4.15

4.30

4.45

50

100

150

1.227

1.245

1.263

1.215

1.245

1.275

3

10

mV

+5

mV

2.0

V

VSH

---.I~

Vcc

Reference Voltage

Reference Voltage Change Rate

VHYS

= _40°C to+85°C
= 3.5V to16V

Vcc

Reference Voltage Output
Loading Change Rate

lOUT

CK Threshold Voltage

TA

~VREFI

= -200p.A to+5p.A

= -40°C to+85°C

t.V REF2

-5

VTH

0.8

VCK

= 5.0V

IIH

VCK

= O.OV

IlL

1.25
0

1.0
p.A

CK Input Current

CT Open Current

mV

V

V REF
TA

..

V

= -40°C to+85°C

TA

p.A

VSL

-"

Vcc

Hysterisis Width

Icc

= _40°C to+85°C

TA
Detection Voltage

Unit

Typ

Min

-1.0

-0.1

ICTO

7

10

= -5p.A

VOH1

4.5

4.9

4.5

4.9

Watch Dog Timer Operating
VCT = 1.0V
Vs open, IRESET

14

High Level Output Voltage

p.A

V
Vs

= OV,

IRESET

= -5p.A

VOH2

Vs

= OV,

IRESET

= 3mA

VOL1

0.2

0.4

Vs

= OV,

IRESET

= 10mA

VOL2

0.3

0.5

Vs open, IRESET

= 3mA

VOL3

0.2

0.4

Vs open, IRESET

= 10mA

VOL4

0.3

0.5

Output Saturation Voltage

V

Vs = OV, VRESE'f = 1.0V

lOLl

20

60

= 1.0V

IOL2

20

60

Output Sink Current

mA
Vs open, VRESET

4-89

MB3773

(1) DC CHARACTERISTICS (Continued)
Value
Parameter

..

Condition

Symbol

Unit
Min

Typ

Max

0.5

1.2

2.5

/lA

CT Charge Current

Power on reset operating
VCT = 1.0V

I cTu

Min. Supply Voltage for
RESET

VRESET = O.4V
IREsET = 0.2mA

VCCL1

0.8

1.2

V

Min. Supply Voltage for
RESET

VRESET = Vcc - O.lV
RL (2 pin - GND) = lMU

VecL2

0.8

1.2

V

(2) AC CHARACTERISTICS
Value
Parameter

Condition

Symbol

Unit
Min

Vce .Input Pulse Width

Vcc

CK Input Pulse Width

CK

5V-····lJ
4V ....

~orLF

CK Input Frequency

Typ

Max

Tp1

8.0

/lS

TcKw

3.0

/lS

TCK

20

/lS

Watch Dog Timer
Watching Time

CT =·O.l/lF

Two

5

10

15

ms

Watch Dog Timer
Reset Time

CT = O.l/lF

TWR

1

2

3

ms

Rising Reset Hold Time

CT = O.l/lF, Vcc

TpR

50

100

150

ms

~

RESET, RL = 2.2kU,
CL = 100pF

TpOl

2

10

RESET, RL = 2.2kn,
C L = 100pF

Tpo2

3

10

Output Rising Time'

RL = 2.2kn
C L = 100pF

tR

1.0

1.5

Output Falling Time'

RL = 2.2kn
C L = 100pF

tF

0.1

0.5

Output Propagation
Delay Time from Vce

/lS

/lS'

• Output Rising/Falling time are measured at 10% to 90% of Voltage.

4-90

I

I

MB3773

Fig. 2 - MB 3773 BASIC OPERATION

Vee 0

r

I

I

vee

Logic Circuits

CT

RESET

RESET

RESET

RESET
CK

CK

CT : O.l/-1F
TpR

l000,CT (/-IF)

(100 ms)

TWO

100,CT

(/-IF)

(10ms)

TWR

20'CT

(pF)

(2 ms)

GND

1

1

;'7

0.8 V

CK

RESET

,
,,,
,,
,.,
,,,
,,

I-

,,,
,,
,, "
,,, "
"
"
"
"

TpR
I

I

"

"
"
"

"
'I

:'

,,,
,,,
,

,

, Two
,,,'---------'
--', r-TWR

,,
,,
,,,
,
,I •

,,
,I

"

4-91

..

MB3773

TYPICAL CHARACTERISTICS CURVES
Fig. 3 - SUPPLY CURRENT
.S. SUPPLY VOLTAGE
0.75

20.55

~ 0.45

a:
a:

:J 0.35

u

i

0.25

Go

~ 0.15

o

::J

'"

" 3.0
I-

1
J

2.0

o
> 2. 0

I-

:J

~ 1.0

V

:J

o

4.0 6.0

o

8.0 10.012.014.016.0 18.020.0

/
1.0

Fig. 5 - OUTPUT VOLTAGE
¥s. SUPPLY VOLTAGE

r

6.0

/L-

w

7.0

'"

r--

/VSL

';:" 4.20

~ 3.0

..J

o
> 4.10

o

> 2.0 r-- -TA= 85'C

I-

5

4.50

> 4.44
l:
~4.30

w

:J
~ 1.0

= 5.0

..J

/

~4.0

4.0

(RESET RESET terminal)

~

..

Pull up 2.2kO

O

3.0

Fig. 6 - DETECTION VOLTAGE
(VSH. VSL) ¥s. TEMPERATURE

(RESET terminal)

6.0

2.0

V

SUPPLY VOLTAGE Vcc(VI

SUPPLY VOLTAGE Vee (VI

~

V

..J

TAI.8SJC

1

I

a:

w

P'TA --40'C
fA - 25"C

PUI: up 2· 2kO

TA = _40°C, 2SoC, 8SoC

> 4.0

CT ""O.ljJF

-

I

~5.0

T~ - -~O'C

.- ~

u

(RESET terminal)

~

TA -25'C\':

.5 0.65
I-

Y'.

_ 6.0

,~TA-8S~

I

~

Fig. 4 - OUTPUT VOL TAG
SUPPLY VOLTAGE

z

iLTA
T I -25'C
I

~

o

:/,TA -

~

u
w

-40' C

4.00

I-

w

1.0

2.0

3.0

4.0

5.0

6.0

7.0

o

40

20

0

20

40

60

80

100

SUPPLY VOLTAGE Vee (VI

TEMPERATURE TA ('CI

Fig. 7 - OUTPUT SATURATION
VOLTAGE ¥s. OUTPUT SINK CURRENT

Fig.8 - OUTPUT SATURATION
VOLTAGE ¥s. OUTPUT SINK CURRENT

(RESET terminal)
TA = -4D'C _

CT-O.l,.F

~~
~

~

II ~

\

r

T~'25'C

TA ' 85'C

(RESET terminal)

~500

o
>

"!:i
g300

>=200

:J

r--

TAl-

/~~

/. ~ ~

z
o

"a:

-1c ~ .....-:::::

CT = O.1JJF

-

~400

.,~ 100

Iff

"\

".

TA - 25'C
TA

= 85'C

I-

o u

:J

~

~

~IM1Ul~I~IM

OUTPUT SINK CURRENT IOL2 (mAl

4-92

~

o

U~

~M1M1Ul~I~IM

:J

o

OUTPUT SINK CURRENT IOL8 (mAl

MB3773

TYPICAL CHARACTERISTICS CURVES (continued)
Fig. 9 - HIGH LEVEL OUTPUT VOLTAGE
v•. HIGH LEVEL OUTPUT CURRENT
~5.0

CT

~
w

"
;!
.J

o

>

4.5 1 - - - - -

I-

:l

Fig. 10 - HIGH LEVEL OUTPUT VOLTAGE
v•• HIGH LEVEL OUTPUT CURRENT

(RESET terminal)

"

o

.J

(RESET terminal)

~5.0

CT '" O.l#J F

~

1

w

,.,.-TA = 2SoC

L

"...'"
.J

o

>

/TA=8SoC

TA = 2S"C

TA = 8SOC

TA "" -40"C/

....

... 4. S

TA "" -40 C

I!::l

O.lI.1F

:l

:l

o

.J

W

W

>

W

>
W

.J

.J

a

4.0 0

i

-5

-10

-15

HIGH LEVEL OUTPUT CURRENT IOH2 I"AI

Q4. 0 0
:r.

10

HIGH LEVEL OUTPUT CURRENT IOH8 (IlA)

Fig. 11 - REFERENCE VOLTAGE
~. SUPPLY VOLTAGE

? 1.246

TA = 25°C

~1.244

a:
> 1.24 2

I--'

T7:

i--""

w

"':i'" 1.240

.;;...

TA -

8~oC
I

4o"C

u.
w

a:

~ 1.250 t---j---t----j---t---j----j
"

T

'"

CT '" O.lpF

~ 1.23 6

I

.

.

g 1.245 f---+_.-t---+--t---+--j
w

~ 1.234

~ 1.240 t---j---t---+--t---j----j

u.

o1... 3.05.07.09.011.013.015.017.019.021.0

w

a:

o

40

SUPPL Y VOLTAGE Vee IVI

Fig. 13 - REFERENCE VOLTAGE
vs. TEMPERATURE

~ 1.24

120

160

Vee'" 5V

w 120
:;;
;:: 100

I"-..

o
o 80

o

.J

> 1.23

240

CT = O.I"F

~

..-,...

160 -200

Fig. 14 - RISING RESET HOLD TIME
vs. TEMPERATURE

-; 140

a:

>

w 1.25

80

REFERENCE CURRENT IREF I"AI

1

_1.27
~
"-1.26
w

-

:I:

w

u

:;; 60

~ 1.22
a:
w

ffl

~ 1.21

a:

= -40°C 25°C 8SoC
A

u
zw

z

w
w

-_> 1 . 2 5 5 , - - r - - , . - , . - - , - -...- - ,
CT = O.l"F

':i

g 1.238

a:

Fig. 12 - REFERENCE VOLTAGE
v•• REFERENCE CURRENT

0t....
-40 -20

0

20

40

60 80 100

TEMPERATURE TA lOCI

a:

40

"~

0

it

L

40

20 0

20

40 60 80 100

TEMPERATURE TA lOCI

4-93

MB3773

TYPICAL CHARACTERISTICS CURVES (continued)

Fig. 15 - RESET TIME vs.
TEMPERATURE

Fig. 16 - WATCH DOG TIMER WATCHING
TIME VS. TEMPERATURE

(at watch dog timed
16

Vee - 5V
CT "" O.lJ.lF

;

2

~

I'- r-

r--

~~1 2
w

10

n",
H
;::
'"

8

8;:;

I-

i=
W
U!
W

1

1-2

a:

I-

0

40

20

~

i=~
C}

w
:;;
I-

E

a:

14

0

20

40

60

80

100

u:

1~

-

10

.

S

4

01,

V

a

~

u:

-=

I-

U

w
:;;

• TA =-4Ci'CL

w

··

~ 10

i=

~ j-TA = ~f.g. r--

i;;
U!

w

a:

-.

10

-.

10-, 10

..

10

,

10 10

TERMINAL CAPACITANCE TpA Im,l

4-94

60

80

100

10'

if

·

10

II-

· V
· D'
,

10

lO-

TA '"

2S'C.
8S'C

10'

10

a:

-=

i=w

gi=
~

~:t

,

.
10 10

..

,

10

TA = -40'C

",:;; 10'r-:t

10

10'

~ ti

TA '"

,

,

Ii:

-4O'C

~~

·

10

··

10

;:: 10-

10-

,

10-

·

40

Fig. 19 - TERMINAL CAPACITANCE vs.
WATCH DOG TIMER WATCHING TIME

,

5 10,
U!

Fig. 18 - TERMINAL CAPACITANCE
vs. RESET TIME

10

:;;
i= 10,

10

20

TEMPERATURE TA (oe)

,

J:

0

-40 -20

(at watch dog timer)

w 10'

I-

-

6

TEMPERATURE TA I'CI

Fig. 17 - TERMINAL CPACITANCE
VS. RISING RESET HOLD TIME

Vee'" 5V
C T '" O.lIJF

V

V

8S'C

10- ,

,
10 10 10

TERMINAL CAPACITANCE TWA Im,l

10-, 10

~

KA=~S'C,

-.

-, 10

..,

10

10 10

TERMINAL CAPACITANCE Two Im,l

MB3773

Fig. 20 - MB3773 APPLICATION EXAMPLE

•

Sagging Monitor and Watch· Dog Timer
Vce

n

1

r MB 3773

Logic Circ uits

Vee
RESET

-RESET

CT

l

CK

CK

GND

I

I

Tif

•

Monitor for other power system

Vee2()Cr-----------------------------,
Veel()~------------~------------_+--------~----------_.------~--------~

r

15 V)

MB 3773

Vee

>

~ R2

1

~

;

R5

r-_ _L....I_L_O_9i-,CCircuit

RESET~------~~------~-------------+------~---1~iRRE8S~E~T

-CT

CK~------~~------~------------_+------_+----~CK

GND

j
77"

Comparator with hysterisis character

Compo 1. Compo 2: MB 4204
MB 47393

NOTE: When Vee2 in lower then the specified voltage. NMllow.
If over·voltage detection of Vee2 • Swap the inputs of comparator 2.

4-95

MB3773

PACKAGE DIMENSIONS
8-LEAD PLASTIC FLAT PACKAGE
(CASE No_ : FPT-08P-M01)

r;::i~lG=rl
lEI

INDEX

cf

1·

View "A"

3 07 ±.016
(7.8±0.4)
.209±.012
(5.30±0.25)

I.t:::;::;=::;:::;:::=:r;=;:~~
.050(1.27)

.002(0.05)
MIN
(STAND OFF)

.007(0.18)
MAX
.027(0.68)
MAX

.018±.004
(0.45'0.10)

TYP

l )

w=u=u=t=l'085(t'15)MAX
---," A

t

.0315±.008
(0.8±0.2)

© 1987 FUJITSU LIMITED FOB002S-2C

4-96

Dimensions in
inches (millimeters)

MB3773

PACKAGE DIMENSIONS (continued)
8-LEAD PLASTIC DUAL-IN-LiNE PACKAGE
(CASE No_: DIP-08P-M01)

1

-fF::;;;;:::::;:::::::::::=--.15° MAX
INDEX

T

\

..

.300(7.62)TYP

. 010±.002
1O.25±0.05)

.172(4.36)MAX

.039~~12

.118(3.0)MIN

(o.99~g·3)
Dimensions in
inches (millimeters)
©1987 FUJITSU LIMITED D08006S-2C

4-97

MB3773

PACKAGE DIMENSIONS
8·LEAD PLASTIC SINGLE IN·LlNE PACKAGE
(CASE No.: Slp·08p·M03)

.1?!l±.010
(3.25±0.251

o

INDEX·l

.010±.002
(0.25±0.05)

.039~OOI2
(0.99~g·30)

© 1987 FUJITSU LIMITED S0801OS·2C

4-98

.100 (2.541 TYP

Dimensions in
inches (millimeters)

MB3774
November 1988
Edition 1.0

~

CAR AUDIO SYSTEM POWER SUPPLY IC
The MB3774 Is a multi-output, multi-function power supply IC, which was developed
for car audio systems Including digital tuning system.
The IC supplies 5 V to microcomputer, 9.15 V to RF stage for tuner and 8.4 V to an
FM/AM recelver, a compact cassette tape deck and shared powers for them. It Is
easy to switch between power modes expect 5 V.
The multiplex drive method enables AM signals to be received even while the
cassette tape deck Is being used.
The MB3774 Is a complete system power supply.The IC Is mounted In aZIP-17-pln
small package to save space.

•

Multiple output ports (5.0 V, 9.15 V. and four 8.4 V)
Multiple function ports (4 control Input ports and 3 control output ports)

•

Suitable for car components for digital tuning system
Control Input for constant-voltage output onloff control (except 5Voutput)

•

TTL and CMOS-compatible control Input voltage

•

Low saturation voltage (0.3 V typ.)

•

Small backup current (350 j.iA typ.)

•

Small package (ZIP-17 with radiation fin)

•

Power supply surge voltage and overcurrent protection circuits

PLASTIC PACKAGE
ZIP-17P-M03

PIN ASSIGNMENT
(TOP VIEW)

ABSOLUTE MAXIMUM RATINGS
Rating

III

BU

Voo
CHK
RST
OUT·CS
START
OUT-COM

(see NOTE)
Symbol

Value

Input Voltage

VIN

18

Input Surge Voltage

VIN (S)

50

Power Dissipation

Po

Storage Temperature

TSTG

6.5

.

..

-55 to +150

Unit
V
V
W

°c

Ace
OUT-FM
GND
OUT·AM
IN-FM
OUT-T-B
IN-AM
STBY
IN-OS

BP

• (tr ::::lms, t.S 0.2sec )
"(TcS85°C)

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17

This device contains circuitry to protect the
inputs against damage due to high static volt·

ages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi·
mum rated voltages to this high impedance
circuit.

4-99

mllllmlmlmlllllllllll~~lmmIOO
FUJITSU
Imllllmlmlmlmlllll~lm~~~mm~ll~

MB3774

Fig. 1 - MB3774 BLOCK DIAGRAM

BU SYSTEM

CD

lEI

®

BU~-~--~

CHK

:>----¢ RST

®

@

: > - - - < > START

®

>---oSTBY

@

Ace

:>----QOUT·T·B

@

STBY

@

@

T·B

IN·FM
CON·
TROL
SECTION

IN·AM

BP

@

OUT-FM

®

OUT-AM

@

OUT-CS

®

OUT-COM

0

FM
AM
CS

@)

@

COM

IN-CS

GND

CD

4-100

to

@ :

TERMINAL NUMBER

,111111111111111111111111111111111111111111111111111

FUJITSU

MB3774

1111111111111111111111111111111111111111111111111111

FUNCTIONAL EXPLANATIONS OF PINS
Terminal
No.

Terminal

8

ACC

1

BU

Function

name

To be connected to the main battery.
To be connected to the backup battery.

12

IN-FM

14

IN-AM

16

IN-CS

3

CHK

9

OUT-FM

11

OUT-AM

Power supply for AM tuner.

5

OUT-CS

Power supply for a cassette tape deck, such as equalizer and amplifier. Select IN-CS for
this output.

7

OUT-COM

Power supply for common system functions such as tone control and volume/balance
control.
Select IN-FM, IN-AM, IN-CS for this output.

13

OUT·T-B

Power supply for the varicap for the first R F stage of tuner.
Select IN-FM or IN-AM for this output.

15

STBY

6

START

2

V DD

Powers the microprocessor and is received power from the BU.
The supply cannot be turned on or off by control input. (Sequence 2)

4

RST

If V DD goes down, this output terminal resets the microprocessor. (Sequence 5)

17

BP

10

GND

TTL or CMOS·level control can be supplied by output selection input with a microcomputer. (Function table and sequences 1 and 3)

ACC line connection check terminal. (Sequences 3 and 4)
If the level is low, all outputs are turned off.
The terminal uses hysteresis to compensate for AC line noise.
Power supply for FM tuner such as FM IF and FM OEM.

Control output pin for a circuit that has a standby function, and that works on the same
logic as OUT·COM.
Transmits system operation start information to the microprocessor according to the CHK
voltage. (Sequence 4)

Improves the ripple rejection ratio when the voltage is reduced. If no improvement,connect
the terminal to ACC.
For the usage, see the BP TERMINAL USAGE.
Ground

4-101

1IIImmlillmlllillmlilimmlllllllllllllili

FUJITSU

m~~IIIIIII~llllllllllloolllmllllllllllll~1

MB3774

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Condition

Min.

Typ.

Max.

Unit

Input Voltage

V1N(ACC)

10

13.2

16

V

Backup Input Voltage

V1N(BU)

7.5

13.2

16

V

T·B

10

mA

OUT·FM

150

mA

OUT-AM, OUT-CS

50

mA

OUT-COM

100

mA

START, STBY

5

mA

Voo

30

mA

85

°c

EI
Output Current

Operating Temperature

4-102

10

Top

-40

25

1~111111111111~111~111~1~~IIIIII~~llllmlllll
FUJITSU

MB3774 IIIIIIIIIIIIIIIIIII~IIIIII~I~III~IIIIIIIIIIIIIIIII

ELECTRICAL CHARACTERISTICS

Connect BP terminal to ACC terminal, T j = 25°C

Condition
Parameter

Standard

Symbol

VOl

Unit
I (rnA)

V (V)

10

10

50

9.5

V 02

T·B

Min.

Typ.

Max.

8.7

9.15

9.6

8.0

8.4

8.8

8.0

8.4

8.8

8.0

8.4

8.8

8.0

8.4

8.8

COM
100

9.8

100

9.5

V

FM

V03

V

V

150

9.8

V 04

50

9.5

AM

8.0

8.4

8.8

V

Vos

50

9.5

CS

8.0

8.4

8.8

V

V06

2

9.5

START

4.8

5.0

5.2

V

V 07

2

9.5

STBY

4.8

5.0

5.2

V

Vos

30

7.5

Voo

4.8

5.0

5.2

V

V OOI

10

0.2

0.4

V

0.3

0.6

0.6

0.9

0.3

0.6

0.6

0.9

Output Voltage

T·B

50
COM

V OO2
100
100
Minimum I/O Voltage
Difference

Output Offset Voltage

Input Stability

V

FM

VOO3
150

V

V OO4

50

AM

0.3

0.6

V

Voos

50

CS

0.3

0.6

V

VOO6

2

START

1.5

2.1

V

V OO7

2

STBY

1.5

2.1

V

Voos

30

Voo

1.7

2.2

V

!:No

50

10

V02-VOS

60

mV

10

10-16

VOl

20

mV

50

10-16

V02-VOS

40

mV

30

7.5-16

Vos

25

mV

Ll.VLlNE

4-103

1IIIIIIIIIIIIIIIIIIImllllllllllmlm~lmll~11
FUJITSU

Imllllllllllllllllllllll~IIIIIIIII~~~~llmll

MB3774

ELECTRICAL CHARACTERISTICS (continued)
Connect BP terminal to ACC terminal, Tj ~ 25°C
Condition
Parameter

Standard

Symbol

Unit
I (mA)

V(V)

0~10

10

~50

9.5

Min.
T·B

Typ.

Max.

10

mV

30

mV

COM
Load Stability

b.VLOAD

0~100

9.B

60

mV

0~100

9.5

30

mV

~150

9.B

60

mV

~50

9.5

AM,CS

30

mV

0~30

7.5

Vee

FM

10

mV

VIH

9.5

2.0

5.0

V IL

9.5

-0.3

O.B

CHK Terminal Input
Voltage

VIHC

9.5

VILC

9.5

Control Terminal Input
Current (FM, AM, CS)

IIH

9.5

VI

~

IlL

9.5

VI

~OV

IIHC

9.5

VI

~

IILC

9.5

VI

~OV

Control Terminal Input
Voltage (FM, AM, CS)

CHK Terminal Input
Current

V
3.0

1.34

V
-0.3
5V

1.14

50

70
jJ.A

-32

1.34V

-16
1

10

0

5

jJ.A
V HYSC

CHK

40

VHYSR

RST

160

V OHR

Vee

~4.5V

V OHR

Vee

~

Hysteresis Width

RST Terminal Output
Voltage

I ACCO

Backup Input Current

IBUO

Ripple Rejection Ratio

R.R.

4-104

4.3
V

ACCTerminallnput
Current

Output Voltage Temperature Coefficient

mV

3.5V

1.0

10V
OmA

2.5

4.0

mA

BU ~ 7.5V
IDe ~ OmA

350

500

jJ.A

ACC~

lee

13.2

VIN

~

~

lVp . p

60

10

V01

0.045

9.5

V02~V05

0.041

7.5

V06~VOB

0.025

dB

%/oC

1111111111111111111111111111111111111111111111111111

FUJITSU

MB3774

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImlili

APPLICATION

ACC' SW

r---------~--~-------cl'-o------oACCPOWERLINE

r-------..-------------14

5 1-----.----0 OUT-CS

17
1 - - - - . - - - 0 OUT-COM

STARTO----~----~

L-------~-~STBY

10",F

• Set the capacitance between the output and GND terminals from 10!lF to 470 !IF, taking into account the operating
conditions and the PC·board wiring pattern.
If the capacitance is too small, the load conditions and PC-board wiring may cause parasitic oscillation.
'Connecting a resistor between the BP and ACC terminals reduces the ripple rejection ratio. If a resistor is connected between
the BP and GND terminals, the allowance increases.
The resistor must be at least 1 kn.

4-105

1111111111111111111111111111111111111111111111111111

FUJITSU

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~IIIII~II

MB3774

BP TERMINAL USAGE
The BP terminal is usually connected to the ACC terminal. However, if the resistor (R x or Ry) shown in the figure below is
added, the ripple rejection ratio of the B.4V output system (V 02 to V 05 ) can be improved when the voltage is low (non·
stabilized ACC area).
TAe time constant (r) is determined by Cx and the impedance (about 2.Bkn if Rx = co. Ry = co) of the BP terminal (r = Cx

x

R)

lEI

Acc o

,,

Rx~,
BP

ex ~;Z

3kf!

,,

,

RY~,
~

42kf!

7

The output voltages when the Rx and Ry resistors are added can be calculated from the following expressions:
With Rx • Vo = V IN (ACC) x 42 kn -i- (3kn II Rx + 42 kn)
With Ry • Vo =V IN (ACC) x 42 kn II Ry

-i-

(42 kn II Ry + 3 kn)

Note: The standard value of minimum 1/0 voltage is based on the conditions that Rx =

on and Ry = co

The Rx value must be 20 kn or more because the output voltage is limited by the minimum 1/0 voltage difference.

4-106

MB3774

11111111111111111111111111111111111m~111111111111
FUJITSU
1~~lllllllllllllllllllllllm~~lllllmllmllll

FUNCTION TABLE
ACC
Detection
CHK

Input

Output

FM

AM

CS

L

X

X

FM

X

All outputs off

H

L

L

L

All outputs off

H

H

L

L

H

L

H

L

H

L

L

H

H

H

H

L

A

H

H

L

H

A

H

L

H

H

H

H

H

H

AM

CS

A

T-B

A

COM

A

STBY

A

A

III

AM selection
A

A

A

FM selection

CS selection
FM & AM selection

A
A

FM & CS selection

A

A

AM & CS selection

A

A

All outputs on

A: Active status
X: Don't care
Note: Double selection increases heat dissipation. So the power consumption and layout must be designed carefully.

CONTROL SEQUENCE
(1)

ACC system input
(INPUT)

FM

AM
CS

~~i----~~.~\--------~~,.~- - - - ____~~~~.~\---JP0m~:--------~~~----_
·.r.• , ---JI,••.• .• .•:•.:1,'. ..-················1
.. ·:·..,) .•:.•.••.•.
____.;....-+--+~--i--i--!-__r···:······:·'
.!----Emm,:.:.:.·
.••.•

-.J.j .•~•.:• .
...1............

CHK

tr. f.l·· ••

·:.1,

••

'
••••·.-.•·•.•·.•·..•.•·li. .•,. . . . . . .
. ......... .i .............:i: ...........J..~....... '.~..A.A.i ... ·····1
f...~n:tf.·i· .·~·l ·.·tf1~t·r·. If . •• q......~

(O~~U~!!--;.__.;-~.:'L'__~-+-____~.~:-----:____
M
ACS

--!~

_ _ _...........
:"

,

.\.~"

---1i--i-....;.--i-i---::---i---

~t:rtlflf.!.t• rL-

T-B
COM

STBY

4-107

111111111111111111111111111111111111111111~rulllll
FUJITSU
1111111111111111111111111111111111111111111111111111

MB3774

CONTROL SEQUENCE (continued)
(2)

Ell

(3)

8U system 110
(BU)
VIN

I
----!

VOD

~;-'- - - - : . ._ __

Standby output (ACC system)

FM}
AM

STBY
(OUTPUT)

CS
CHK
CHECK and (AM or FM or CS)
(INPUT)
(HYSTERESIS FOR CHK ONLY)

(4)

STBY

Start output (ACC system)

N·

1.28~

CHK

25V

START
(OUTPUT)

L-----'-_--'-_ _ _ _ CHK
1.25V

(5)

1.28V

START

(INPUT)

Reset output (8U system)

.

.

'oo~
RST

L - - - - L _ - ' -_ _ _

3.89V

4-108

4.05V

VD

D

RST

~
----.J
L..-

1~~I~~I~I~~~OOIII~I~~~~~I~~I~1
FUJITSU

M 83774 II~~~~I~I~~~I~~I~~IIII~~I~~III~IIII

POWER DERATING CHARACTERISTICS

8

~

C
0..

..

6

Z

0

~

0..

iii
~

0

4

W

..J
III

iii
~

::;

a::

w

0..

2

o

25

50

75

100

AMBIENT TEMPERATURE Ta(OCI

Conditions
1) 50 cm' x 2 mm-thick radiation board
2) 25 cm' x 2 mm-thick radiation board
3) 10 cm' x 2 mm-thlck radiation board
4) No radiation board

4-109

1111111111111111111111111111111111111111111111111111

FUJITSU
1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImii

MB3774

PACKAGE DIMENSIONS
17-LEAD PLASTIC ZIGZAG-IN-LiNE PACKAGE
(CASE No.: ZIP-17P-M03)
33 MAX

236 MAX
22.2±0.2

\-

II'

3.4±0.2

1

'-,'\...
--..;:: ~

0

lEI

P

~
~~]

l'"

±
{l\

R3.2

l

-~

11.4±0.2

INDEX

r~-

0
1.27±0.15

17.5±0.3

J I

15.0±0.3

22.1 MAX

..... ~

0.6±0.1

I~

3.5±0.2

~
4.0±0.2

Dimensions in
inches (millimeters)

© 1988 FUJITSU LIMITED Z17004S-1C

4-110

11111111111111111111111111111111111111111111111111111111111111111

MB3780A
August 1989
Edition 1.0

BATTERY BACKUP IC
The Fujitsu MB3780A monolithic battery backup IC is fabricated with a
bipolar linear IC technolo~y, and is suitable for power supply of SRAM, ROM
and Logic ICs.
The MB3780A generats a reset signal when power supply's ON/OF F or abnormal power supply. The MB3780A provides switching function for back up
between modes such as primary bateery which is non-chargeable and secondary
battery which is chargeable. All necessary functions for battery backup are
available on a chip. The MB3780A is available in 16-pin Dual In-Line, space
saving Flat package, or 20-pin shrink small outline which is suitable for
memory card.
•

Input circuit power consumption
when unloaded: 1.0 mA typical
• Output drive current: 200 mA
maximum (can be incleased with
an external transistor)
• Input/output differential voltage:
230 mV typical
• Input loss voltage detection value:
4.2V ± 2.5%

• Onchip power-on reset circuit
• Low voltage detection value by
primary battery: 2.65V, 2.37V
• Onchip secondary battery
• Output current at backup: 500
/-LA maximum
• Leak current at backup: 0.5 /-LA
or less

ABSOLUTE MAXIMUM RATINGS (See Notel
Ratings

Symbol

PLASTIC PACKAGE
DIP-16P-M04

PLASTIC PACKAGE
FPT-16P-M02

PLASTIC PACKAGE
FPT-20P-M04
PIN ASSIGNMENT

Value

Unit

I.

NC',

Input Voltage

V 1N

-0.3 to 7

V

Battery Voltage

V SAT

-0.3 to 7

V
V

VRESET

7

Output Alarm Voltage

VALARM

7

V

Output Current

lOUT

250

mA

Output Buffer Current

ISUF

55

mA

*900

mW

Power Dissipation

Po

**540

mW

***450

mW

Operating Temperature

Top

-30 to 85

·C

Storage Temperature

T STG

-55 to 125

·C

* T A ~ 25'C DIP-16P-M04
** TA ~ 25'C FPT-16P-M02
* •• T A ~ 25'C FPT-20P-M04
Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

"

NCE 3
VOUTI

Output Reset Voltage

NOTE:

VaAT1 t 2

VSAT21

ALARM1
ALARM2
GND

"

•

(TOP VIEW) 13

•

•
7

8

I.•
12

11

NC

BUFFER
NC

V,N
VSENSE

CT
NC

RESET

DIP·16P·M04
FPT·16P-M02

I.

NCE 1

20

VBATlI 2

NC
BUFFER

NCE 3

18

VOUTI 4

17

VIN

VSAT21 5

16

VSENSE

Nel 6 (TOP VIEW) 15
NC

1

NC

NC

14pNC

ALARMf.: 8

13~CT

ALARM21: 9

12PNC

GNO[ 10

11

RESET

FPT·20P·M04

This device contains circuitry to protect the
inputs against damage due to high static volt·

ages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedance
circuit.

4-111

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIWIIIIIIIIIIW

FUJITSU
WIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII

MB3780A

Fig. 1 - MB3780A EQUIVALENT CIRCUIT

BUFFER

~~----~--------------¢VOUT

lOon

"'0.22V

SBO

100kn

+--------------0 VBATl

VSENSEo--+--t

r l - - - - o ALARM2

GNo6-~--------------~+-----~t--r------------~--~

CT

4-112

RESET V BAT2

1111111111111111111111111111111111111111111111111111

FUJITSU

MB3780A 1lllllllmlllllllllllllllllmlmlll~mlllllllll

RECOMMENDED OPERATING CONDITIONS
Value

Parameter

Symbol

Unit
Min

Typ

Max

5.0

6.0

Input Voltage

V 1N

Output Reset Current

IRESET

3

mA

Output Alarm Current

IALARM

3

mA

Secondary Battery Charging Current

ICHARGE

Output Current

lOUT

200

mA

Output Buffer Current

lauF

50

mA

Backup Current

lau

500

p.A

-30

85

*OC

-30

70

**oC

Operating Temperature

-3

V

mA

Top

NOTE:· • DIP-16P-M04
•• FPT-16P-M02, FPT-20P-M04

4-113

IIIIIIIIIIIIIIIIIIIIIIWIIIIIIIIIIIIIIIIIIIIIIIIIII

FUJITSU
1111111111111111111111111111111111111111111111111111

MB3780A

ELECTRICAL CHARACTERISTICS
Value
Parameter

Symbol

Unit

Condition
Min

Typ

Max

Whole Device
IIN1

louT = OmA

1.0

1.5

mA

IIN2

louT = 200mA

225

250

mA

IIN3

V IN =4.0V

1.0

1.5

mA

DV1

louT = OmA

0.18

0.21

0.24

V

DV2

louT = 200mA

0.19

0.22

0.25

V

Output Delay Time

tro

Co = O.D1ItF, CT = 0

2.0

10

Its

Output Buffer Current

I BUF

Va =4.7V, V BUF =4.0V

Buffer Leak Current

IOHB

V IN = OV, V BUF = 4.5V

Input Current

Backup System
Input/Output
Defferential Voltage

50

mA
100

nA

Power Supply Monitoring System
V INL

V IN

V INH

V IN

Hysteresis Width of
Input Loss Voltage

DV IN

VINH-VINL

Output Reset Voltage

VRESET

Output Reset Leak Current

'-

4.10

4.20

4.30

V

4.20

4.30

4.40

V

50

100

150

mV

IRESET = 3mA

0.15

0.4

V

IOHR

V IN =4.0V, VRESET =6V

0

100

nA

Reset Pulse Width

tpo

CT = 0.011l F

1.0

1.5

ms

Input Pulse Width

t pi

CT = 0.01IlF, V IN

Reset Output Rising Time

trR

Reset Output Falling Time

tfR

Reset Output Propagation
Delay Time

tpd R

Input Loss Voltage

4-114

~

0.5

U

CT = 0.011lF
R L =5.1kn, CL = 100pF

CT = 0.011lF

5

liS

2.0

3.0

!IS

0.1

0.5

liS

2.0

10

!IS

MB3780A

1111111111111111111111~~~~IIIIIII~~~lllm~1
FUJITSU
1~~~~IIIIIII~lmlllllllll~~lllllllllllllml

ELECTRICAL CHARACTERISTICS (continued)
Value
Parameter

Symbol

Condition

Unit
Min

Typ

Max

Primary Battery Monitoring System
V BATL1

V BATl

~

2.55

2.65

2.75

V

VBATHl

V BAT1

~

2.59

2.69

2.79

V

DV sAT1

VBATH1-VBATLl

20

40

60

VBATL2

V BATl

2.27

2.37

2.47

V

VSATH2

V BAT1

2.31

2.41

2.51

V

Hysteresis Width of Low
Voltage Detection
(Secondary)

DV vAT2

VBATH2-VVATL2

20

40

60

Differential Detected Low
Voltage

DV BAT

VVATLl-VBATL2

0.26

0.28

0.30

V

IVATA

V SAT = 3V, V 1N = 5V

-100

500

nA

I VATS

V SAT = 3V, V 1N = OV

-100

500

nA

DV Sl

I BATl = 100ilA

0.30

0.35

V

VALARMl

IALARMl = 3mA

0.15

0.4

V

VALARM2

IALARM2 = 3mA

0.15

0.4

V
nA

Low Voltage Detection
(Primary)
Hysteresis Width of Low
Voltage Detection (Primary)
Low Voltage Detection
(Secondary)

~
~

mV

mV

Input Current
Output Differential Voltage
Alarm Output Voltage

Alarm Output Leak
Current

10HAl

VALARMl = 6V

0

100

IOHA2

VALARM2 = 6V

0

100

nA

Alarm Output Rising Time

trA

2.0

3.0

JlS

0.1

0.5

Ils

2.0

10

JlS

RL =5.1Hl, CL = 100pF
Alarm Output Falling Time

tfA

Alarm Output Propagation
Delay Time

tpd A

50mV over drive

Secondary Battery Monitoring System
Output Voltage

V CHG

ICHG = - 1OIlA

2.65

2.80

2.95

V

I CHGL

V CHG = 2.0V

0.6

1.6

3.0

mA

I CHGH

V CHG =3.3V

-1

0

1

IlA

DV s2

IBAT2 = 100IlA

0.30

0.35

Charging Current
Defferential Output
Voltage

V

NOTE: RL and CL are output logic of load resistance and capacitor.

4-115

Imllllmllllmllllllll~~llllmllllllllmlm
FUJITSU
1111111111111111111111111111111111111111111111111111

MB3780A

FUNCTION EXPLANATION
Fig. 2 - MB3780A INPUT ON/OFF OPERATION

..

__- - - "••••••••••••••••••• V1' 1

RESET

'l

fl------------I------------::::

1 - - - 1

'1) V 1 =VIN-DV1
'2) V 2 = VBAT1_DVB1

Fig. 3 - MB3780A ALARM OPERATION

·r" .... ": .
DV B AT2

OFF

I
ALARM1L
. ______

OFF

OFF

~==g~===___________~~~~==----__

OFF

I

: ON

~_O_N

ALARM2L__________
Condition: V IN

4-116

:

;?, V INH

~_O_N_:

___________________

OFF

________

1111111111111111111111111111111111111111111111111111

FUJITSU

MB3780A

1111111111111111111111111111111111111111111111111111

TIMMING DIAGRAM
Fig. 4 - MB3780A RISING/FALLING TIME OF RESET AND ALARM
~

_ _

" O " O O O O O O O _ _" " "

RESET

10%

Fig. 5 - MB3780A RESET PULSE WIDTH. OUTPUT RESET PROPAGATION DELAY TIME

tpo

"'"

nmmmmuuumumm
-_.
*1) V,

I

~vrN-DV,

u~::mu

I

V, "
V"

2

' - -_ _ _ _ _ _ _--'ooo.oooo.oooooo.ooVRESET

*2) V2 ~ VSAT1-DVSl

Fig. 6 - MB3780A OUTPUT ALARM PROPAGATION DELAY TIME

VSATI

1;:1

v,,,,,. Vme,

~~-tpd-A-

- -

ALARMI
ALARM2

I

'--------00000.000000000000000000

V ALARMI
VALARM2

4-117

Imlm~I~lllmmlmllllllllllmllm~m~1
FUJITSU
1111111111111111111111111111111111111111111111111111

MB3780A

TIMING DIAGRAM (continued)
Fig. 7 - MB3780A INPUT PULSE WIDTH

5V------------~U
4V

1-·' ·1·

lID

RESET

_~...
"11
*21

·ro

-I nnnv"

.................. 1,-----nnm
mmmm::::.,

V1 =VIN-DV1
V2 = V SAT1 -DVS1

Fig. 8 - MB3780A OUTPUT VOLTAGE PROPAGATION DELAY TIME

.-----------------------------5V

------Il.mnn. n.n.n..nnmn.n...... n.nmmmnmnm.
VOUT

/~
- - - - - - - - fl
II----:t-r 0--1

4-118

~

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImllllili

FUJITSU

MB3780A IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~I

APPLICATION EXAMPLE

V 1N

@,~-----------------------,

L.....

VO UT

r-------Iv BAT'
r-----t V BAT2
MB37BOA

-ALARM1
-

ALARM2
GND

LOGIC

SRAM

ROM

RESET 1-+--1--+---+--+---1

PRIMARY
BATTERY

- ..... _....
SECONDARY
BATTERl

@~----~~--~~--------~~------~~------~
GND

NOTE: The value of C, and C2 should be more than O.022I1F.

4-119

1IIIIIIIIImlllllllllllllllllllllllllllillmlllili

FUJITSU
1111111111111111~~lmlllllllllllllmllllllllllll MB3780A

PACKAGE DIMENSIONS
16-LEAD PLASTIC DUAL IN-LINE PACKAGE
(Case No.: DIP-16P-M04)

.300(7.62)

TYP

.050(1.27)

MAX

© 1988 FUJITSU LIMITED D16033S-2C

4-120

Dimensions in
inches (millimeters)

IIIIIIIIIIIIIIIIIIIIIII~IIIIIIIIIIIIIIIIIIIIIIIIIII
FUJITSU

MB3780A

1111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS (continued)
16-LEAD PLASTIC FLAT PACKAGE
(Case No. : FPT -16P-M02)
.08912.25) MAX
ISEATED HEIGHT)
[

400+ 01011015+025)h
- 008
-020

..

I
INDEX
,-//

U

307 ±016
11780±040)

lIm==iF;;r==n=n=rr=n==;;II-.050(1.27)
TYP

JLo~$1
10.45±0.10)

268 ~g6~1680 ~

.209±.012
15.30±0.30)

1_

J

¢.00510 13)

gig)

I
1.020±.008
-====t10.50±0.20)

~

eM) I

006+. 002 10 15+ 0 .05 )
.
- .001 . -0.02

r-------------I

I

Details of "A" part

:

00810.20):
I

I

.02010.50) :
,00710.18) I
-- .35018.89) REF

I
I

~

© 1988 FUJITSU LIMITED F16005HC

MAX:

.02710.68)

I

________ ~~~____ J
Dimensions in
inches (millimeters)

4-121

ttttttttttmtttttttttttmttttttttttttttmtttttttt

FUJITSU

Itltltltltlttltltltltttlt~tttlmttttmtttllttlill MB3780A

PACKAGE DIMENSIONS (continued)
20 LEAD PLASTIC FLAT PACKAGE
(Case No.: FPT·20P·M041

l

1

INDEX

.173± .004

"A":
.009~:gg~
(0.22~g:!)~1

•. 256±.004
(6.50±0.10)

4-122

.004 ±.004

:

:

(O.10±O.10):

:

(STAND OFF)
.020± .008

i

I

J

!
:

I

;~r [,""":~A-'i
I

/

(0.50±0.201

.006~:gg~

(0.15~g:g~1

.04O±.004 (SEATED HEIGHTI
(1.10±0.101

o

* This dimension does not include resin protrusion.
© 1989 FUJITSU LIMITED F2QQI4S'IC

:

.252±.008

!.!::;;=::;;:d=;;=::;;:=;r;=;;;:::::n:::=n=:n==;;?!J'"
\ •• \.0265± .0047
(0.65±0.121

·,-----_.-----_._------.-----------------,
..
··

.004(0.101

Dimensions in
inches (millimeters)

------------------Section 5
Motor Drivers - At a Glance
Power
Supply (V)

Package
Options

10 = 180 mA and
330mA

+4 to +18

8-pin Plastic DIP, SIP, FPT
(with Healsink)

Motor Driver

10 = 550mA

+4 to +28

8-pin Plastic SIP
(wilh Healsink)

Bidirectional
Motor Driver

10 = 330mA

+2.310+10

8-pin Plastic

Page

Device

Description

Feeturee

S--3

MB3763

Motor Driver

5-13

MB3763H

5-21

MB3854

DIP, FPT

5-1

Molor Drivers

5-2

Linear Data Book

MB3763

October 1987
Edition 1.0

~

BIDIRECTIONAL MOTOR DRIVER
Fujitsu's MB3763 Motor Driver with forward/reverse control capability, Is used In
applications such as the front-loading mechanism In video tape, or the
auto-reverse tape deck, driven by a TTL signal. The MB3763 has 300 mA drive
units and braking capability with TTL control.
• Motor Drive Current: 300 mA maximum In a SIP Package
: 150 mA maximum In a DIP/FPT Package

PLASTIC PACKAGE
SIP-08P-M01

• Wide Power Supply Voltage Range : 4 V to 18 V
• TTL-control capability
• Standby capability when Input Is off.

PLASTIC PACKAGE
DIP-08P-M01

• Brake capability at motor stop mode.
• Built-In diode for surge absorption
• Package : 8-pln plastic SIP package (Suffix: -PSI
8-pln plastic DIP package (Suffix: -PI
8-pln plastic FPT package (Suffix: -PF)

ABSOLUTE MAXIMUM RATINGS 1 (see NOTES)

PLASTIC PACKAGE
FPT-08P-M01

Value
Parameter

Symbol

Unit
DIP/FPT
(Plastic)

SIP
(Plastic)

20

20

V

180 (330")

330

mA

1.2

1.2

A

PIN ASSIGNMENT
(FRONT VIEW)

Power Supply Voltage

Vee

Output Current

'0

Maximum Output Current

lOMAX

Power Dissipation

Po

560'

1000

mW

Operating Temperature

Te

-20 to +75

-20 to +75

°C

Storage Temperature

TSTG

-55 to +125

-55 to +125

°C

4

NC
B-Vee
B-OUT
B-IN
GND
A-IN
A-OUT
A-Vee

NOTES:
1. Permanent device damage may occur If ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed In the operational sections of this data sheet.
Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
2. tON ~ 1 sec, Duty = 50%
3. TA '5 60°C

4. t '5 5 ms

(TOP VIEW)
A-IN

A-OUT

GND

A-Vee

GND

B-Vee

B-IN

B-OUT

This device contains cirCUitry to protect the Inputs
against damage due to high static voltages or electric
fields. However, it is advised that normal precautions
be taken to avoid application of any voltage higher
than maximum rated voltages to this high impedance
circuit.

Copyright II 1987 by FUJITSU UMITEO and Fujitsu Microelectronics, Inc.

5-3

1~~~~I~IIIII~~I~~~~1
FUJITSU
I.~I~III~~~I~~~M MB3763

Figure 1. MB3763 Block Diagram

1- - - - - - - - - - - - - - - - - - - - - - - - - - I

I

I

,--_--.--0 B-Vee

A-Veeo----~-.,

I

A-OUTo--+--.----+-~

A-IN

r--+---+--.-~~B-OUT

GND

B-IN

RECOMMENDED OPERATING CONDITIONS
Value
Parameter

Symbol

Unit
DIP/FPT (Plastic)

Power Supply Voltage

4 to 18

4 to 18

V

o to 300

mA

Output Current

10

o to 150

Input High Voltage

"iH*2

2.4 to Vee + 0.3

2.4 to Vee + 0.3

V

Input Low Voltage

"iL

o to 0.4

o to 0.4

V

NOTE: *1
*2

5-4

Vee

SIP (Plasllc)

tON S 1 sec, Duty = 50%
When VIH~ Vee, IIH S Vee x 0.2 mA

(300 *')

M83 763

1111~lml~IIIIII~lllmlllllllllllllllm~~ml
FUJITSU
IIII~~~I~IIIIII~III~IIIIIIIII~~I~IIIIIIIIIIII

ELECTRICAL CHARACTERISTICS FOR DIP AND FPT
PACKAGE (PLASTIC) (VCC= 12 V. 10= 150 mAo TA= 25°C)
Value
Parameter

Symbol

Unit

Condition
Min

Typ

Max

ICCD

Vcc = 18 V. 'viA = \Is = 0 V

-

-

0.1

mA

ICC1

10 = 0 mA

-

10

20

mA

ICC2

10=150mA

-

10

-

mA

ICC3

10 = 0 mAo \lA = V'S = 2.4 V

-

15

-

mA

VOH

-

11.2

-

V

Output Low Voltage

VOL

-

-

0.1

0.2

V

Output Saturation Voltage

VSAT

-

-

0.9

1.2

V

I'H

\IN =2.4V

-

250

400

~A

Standby Supply Current

Power Supply Curren!

Output High Voltage

Input Current
Input Switching Prohibition
Time

TOFF

11.0

-

10

-

-

~s

ELECTRICAL CHARACTERISTICS FOR SIP PACKAGE
(PLASTIC) (Vcc = 12 V. 10= 300 mAo TA = 25°C)
Value
Parameter

Symbol

Condition

Unit
Min

Typ

Max

Icco

Vcc = 18 V. \lA = V's = 0 V

-

-

0.1

mA

ICC1

10 = 0 mA

-

10

20

mA

ICC2

10 = 300 mA

-

15

-

mA

ICC3

10 = 0 mAo \lA = \Is = 2.4 V

-

15

-

mA

VOH

-

11.1

-

V

Output Low Voltage

VOL

-

-

0.2

0.5

V

Output Saturation Voltage

VSAT

-

-

1.1

1.7

V

I'H

\IN = 2.4 V

-

250

400

~A

TOFF

-

10

-

-

Standby Supply Current

Power Supply Current

Output High Voltage

Input Current
Input Switching Prohibition
Time

10.B

~s

5-5

111111111111111111111111111111111111111111111111111111

FUJITSU
1I1111111111111111111111111111111111111111111111111111

MB3763

FUNCTIONAL DESCRIPTIONS
FORWARD/REVERSE MODE (MODE B & C)
In this mode, the transistor pairs 02-03·and 01-04 work alternatively, changing the output current direction.
When the mode B Is selected, 02 and 03 are active and 01 and Q4 are Inactive. Therefore A-OUT Is at low level and B-OUT
Is at high level, with the current flowing from B-OUT to A-OUT through the motor. On the other hand, when the mode C is
selected, the current flows In the reverse direction.

BRAKE/STOP MODE (MODE A)
When the mode A is selected, 01 and 03 are Inactive and 02 and 04 are active. A-OUT and B-OUT are stuck at low-level;
terminais of motor are shorted and the motor is forced to stop.

STANDBY MODE (MODE D)
In this mode, all transistors are inactive and the current through the motor does not flow. When the power suppiy voltage is
applied to A-Vee and B-Vee' the supply current Is stili less than or equal to 0.1 mAo

CONTROL MODE
CONTROL BLOCK DIAGRAM
A-IN

B-IN

r------- - -------,

I

I

A-Vee

B-Vee

Control
Logic

A-OUT

B-OUT

GND

Input mode

Output mode

Mode

Operation
A-IN

B-IN

A-OUT

B-OUT

1

1

L

L

Short (Brake)

B

1

0

L

H

Forward

C

0

1

H

L

Reverse

0

0

-

-

Open (Standby)

A

D
NOTES: 1:
0:

5-6

;::2.4V
S 0.4 V

111111111111111111111111111111111111111111111111111111

FUJITSU

MB3763

111111111111111111111111111111111111111111111111111111

TYPICAL APPLICATION
Figure 2. Typical Application Example

Vee

1 Kil

A-Vee

B-Vee

A-OUT

CONTROLLER

B-OUT

GND

1 Kil

NOTE: In the case the control voltage Is Input when the power supply voltage Is not applied because of the time lag
between those two voltages, excess current flows Into IC from the Input terminals. In this case, please
connect a resistor (2: 1K il) serially to Input pin In order to prevent excess current flow.

TYPICAL PERFORMANCE CHARACTERISTICS
3-

Fig.

Output Current

Fig. 4 - Power Supply Voltage
vs Power Supply Current

vs Power Supply Current
60

20
Vec='12 V

50

lee3
15

Power
Supply
Current

40

",,'
30

lee (mA) 20

,,' "
./

10

a

a

lOa

200

300

'"

,,"

400

Power
Supply
Current
lec (mA)

(

VIA = VIS= 2.4 V

10"'""

VIA= 2.4 V,

'r

10

leel

I

JIS = OV

5

500

Output Current 10 (mA)

sao

a

)

a

4

8

12

1S

Power Supply Voltage Vee (V)

5-7

11111111111111111111111111111111111111111111111111111

FUJITSU

MB3763

111111111111111111111111111111111111111111111111111111

TYPICAL PERFORMANCE CHARACTERISTICS
Fig. 5 - Output Current
vs Output Voltage
2.0
V

Fig. 6 - Input Voltage
vs Input Current
4.0

~C"12 v'

Vee=18 V
3.5

1.5

3.0
Input
Current

LWOH IVee-Vo)

--

1.0

'I'"
0.5

Vee=4

2.5

:

1.5

- --f~- --

o

100

200

300

400

500

600

1.0

y
./'

0.5

o

J/

I

VOL

o

i

Ii

IllmA) 2.0

r--

i!

o

5

I

J
/'

VeC"12VI

Output
Voltage
Vo IV)

(Continued)

/

/'

10

15

20

input Voltage VI IV)

Output Current 10 ImA)

Fig. 7 - Temperature
vs Power Dissipation

. ---\ r--r

1.0

P/PF

PS

0.8
(' tONS: 1sec )
Duty = 50%
Power
Dissipation

0.6

P D IW)

P/PF

f-.--\

0.4

0.2

o
-20

0

40

80

Temperature TAl ·C)

120
PF'S value Is measured on the ceramic board
13.0 cm x 3.0 em x 0.05 cm)
Notes

P
PF
PS

: Plastic DIP
: Plastic Flat Package
: Plastic SIP

Maximum power dissipation must be kept.

5-8

IIIII~IIIIIIII~III~I~III~III~IIIIII~III~I~I~
FUJITSU

MB3763

11111111111~lllllllllmllll~I~~I~lmlllll~~11

PACKAGE DIMENSIONS
8-LEAD PLASTIC SING
(CASE No.: S~;~OIN-LINE PACKAGE
8P-M01)

.798 (20.28) MAX
.748 (19.00) MAX

.017
(0.43

Dimensions In
Inches (millimeters)

± .002
± 0.04)

S08004S-6C

5-9

11~111~~~~llmllll~mllllllmll~m~lm
FUJITSU

111111~~I~m~IIIIIIII~lllllmlmllmlllllllll M83 763

PACKAGE DIMENSIONS (Continued)
8-LEAD PLASTIC DUAL-IN-LINE PACKAGE
(CASE No.: DIP-08P-M01)

I

INDEX

.244 ± .010
(6.20 ± 0.25)

o

I.
.035 ~

:gl~

~

.

.370

(0.89 ~ g:~)

1-

~ :gl~

.1

(9.40

~

g:;g)

~""""'-.100 (2.54) TYP

.172 (4.38) MAX

.118 (3.0) MIN
.018 ± .003
(0.46 ± 0.08)

.-.tr--- .060 ~ 0012 (1.52 ~ g.30)

Dimensions In
Inches (millimeters)

5-10

oo8006S-20

111111111111111111111111111111111111111111111111111111

FUJITSU

MB3763

111111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS (Continued)
8-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT -08P-M01)

~'~:~8U~,~

o

1

INDEX

(STAND OFF)

.307±.016
(7.80 ± 0.40)

.209± .012
(5.30 ± 0.25)

/

.002 (0.05) (MIN)

.268

~ :g6~

~g,jg,

1C::;:;=:;::::r:::::;:;~~
.050 (1.27)

TYpl..

~I

«([iL,D
"'. . . . )
t

Olmanllons In
Inches (millimeters)

I
~

I

.018 ± .004
• (0.45±0.10)

0 0

t

.020 + .008
(0.50 ± 0.20)

5 (2.15) MAX
)-,,1-..--_-'.0;1.....

t
i~8~ fo.~~~

F08002S-2C

5-11

Motor Drivws

5-12

Linear Data Book

cO

November 1989
Edition 1,0

FUJITSU

DATA SHEET

MB3763H
BIDIRECTIONAL MOTOR DRIVER
BIDIRECTIONAL MOTOR DRIVER
Fujitsu's MB3763H Motor Driver with forward/reverse control capability, is used in
applications such as the front-loading mechanism in video cassene recorder or the
auto-reverse tape deck, driven by a TTL signal. The MB3763H has 300mA drive units and
braking capability with TTL control. The MB3736H has wider power supply voltage range
comparison with MB3763 . Suitable for 24V monitors for office automation equipment
•

Motor Drive Current: 300mA maximum

•

Wide Power Supply Voltage Range: 4V to 28V

•

TTL-amtrol capability

•

Standby capability when inputis off.

•

Brake capability at motor stop mode.

•

Built-in diode for surge absorption.

•

Package: B-pin plastic SIP package (Suffix: -PS)

PLASTIC PACKAGE
SIP-OSP-MOl

PIN ASSIGNMENT
ABSOLUTE MAXIMUM RATINGS (see NOTE)
Parameter

Symbol

(FRONT VIEW}

Value

Unit

Vee

28

V

10

550

NC

Power Supply Voltage

B-vee
Output Current

'I

rnA
B-OUT

Maximum Output Current

10MAX"3

Power Dissipation

Po

Operating Temperature

Te
TSTG

1.2

A
8-IN

Strage Temperature
Note:

W

GNO

-20 to +75

'C

A-IN

-55 to +125

'C

A-OUT

2 '2

"1 tON S 1 sec, Duty ~ 50%

A-VCC

"2 TAS30'C
·3 ts5 ms
Permanent device damage may occur if the above Absolute Maximum
Ratings are exceeded. Functional operation should be restricted to the
conditions as detailed in the operational sections of this data sheet. Exposure to
absolute maximum rating conditions for extended periods may affect device
reliability.

~~~~~:i~~~r~~t~ I~=: :r8 ~'::~ ,~\~:.

However, it is advised that normal precautions be taken to
avoid application of any voltage higher than maxirrum rated
voltages to this high Irrpedance drcuil.

Quick pro™ is a trademark of FUJITSU LIMITED
Copyr~hl ©1989 by FUJITSU LIMITED

5-13

MB3763H
Fig, 1 - MB3763H BLOCK DIAGRAM

r-----------------------------------,

I
I

A-Vee

A--OUT

o--......-~--.,

B-Vee

,

B-OUT

I

I
I
I
I
I
I
I
I
IL. _ _ _ _ _ _ _ _ _ _
A-IN

GND

B-IN

RECOMMENDED OPERATING CONDITIONS
Parameter

Value

Unit

4 to 28

V

10

o to 300 (500 ',)

mA

Input High Voltage

VIH'2

2.4 to Vee +0.3

V

Input Low Voltage

V,L

OtoO.4

V

Power Supply Voltage
Output Current

Note: 'I tON:> 1 sec, Duty = 50%
'2 When V,H ~ Vee, IIH:S; Vee x 0.2mA

5-14

Symbol
Vee

MB3763H

ELECTRICAL CHARACTERISTICS

(VCC = 24V,

(0

= 300m A, TA = 25°C)

Value
Parameter

Symbol

Condition

Unit
Min

Standby Supply Current

Power Supply Current

Typ

Max

lceo

Vcc = 24V, V,A = Vie = OV

-

-

0.1

rnA

ICC1

10 =OrnA

-

12

27

rnA

ICC2

10 = 300rnA

-

15

-

rnA

ICC3

10 = OrnA, VIA = V'S = 2.4V

-

18

-

rnA

Output High Voltage

VOH

-

22.8

23.1

-

V

Output Low Voltage

VOL

-

-

0.2

0.5

V

Output Saturation Voltage

VSAT

-

-

1.1

1.7

V

Input Current

IIH

-

250

400

j1A

Input Switching Prohibition TIme

TOFF

-

lIS

VIN = 2.4V

-

10

-

5-15

MB3763H

FUNCTIONAL DESCRIPTIONS
FORWARD/REVERSE MODE (MODE B & C)
In this mode, the transistor pairs 02-03 and 01-04 work alternatively, changing the output current direction.
When the mode B is selected, 02 and 03 are active and 01 and 04 are inactive. Therefore A-OUT is at low level and B-OUT is at high
level, with the current flowing from B-OUT to A-OUT through the motor. On the other hand, when the mode C is selected, the current flows
in the reverse direction.

BRAKE/STOP MODE (MODE A)
When the mode A is selected, 01 and Q3 are inactive and 02 and 04 are active. A-OUT and B-OUT are stuck atlow-level; terminal of
motor are shorted and the motor is forced to stop.

STANDBY MODE (MODE D)
In this mode, all transistors are inactive and the current through the motor does not flow. When the power supply voltage is applied to A-Vec
and B-Vee. the supply current is still less than or equal to 0.1 rnA.

CONTROL MODE
CONTROL BLOCK DIAGRAM
A-IN

B-IN

--------,

.... - - - - - - - A-Vee

B-Vee
03

01
A-OUT

B-OUT
04

02

Output mode

Input mode

Operation

Mode
A-IN

A-OUT

B-OUT

A

1

1

L

L

Short (Brake)

B

1

0

L

H

Forward

C

0

1

H

L

Reverse

D

0

0

-

-

Open (Standby)

Notes: 1:" 2.4V

0: "O.4V

5-16

B-IN

MB3763H

TYPICAL APPLICATION
Fig. 2 - TYPICAL APPLICATION EXAMPLE
~------~------------ ~

1Kn
A-IN

A-Vee

'------'\fN---I B-IN

B-Vee

GND

A-OUT

B-OUT

1Kn

Note: In the case the control voltage is inpupt when the power supply voltage is not applied because of the time lag between those
two voltages, excess current ftows into IC from the input terminals. In this case, please connect a resistor (" 1Kn) serially to
input pin in order to prevent excess current How.

TYPICAL PERFORMANCE CHARACTERISTICS

Fig. 3 - OUTPUT CURRENT
vs. POWER SUPPLY CURRENT

1

60

"

~

w

40

.!l
IZ

a:
a:

25

I
I--

11l

VCC-24V
TA_25'"C

~/

:::)

0

30

~~

~

Q.
Q.

:::)

20

w

~

Q.

o

o

100

200

I--+---+--=......~

10

I-f-+--=......c:::.r-

o

fil

a:

~

300

15

:::)

Q.

/

10

~
a:

,.----r---r-...,.---.r----r--...,

20 I--+---+---+----If---+--~

!z

~

~~

(/)

a:

Fig. 4 - POWER SUPPLY VOLTAGE
vs. POWER SUPPLY CURRENT

400

OUTPUT CURRENT 10 (mA)

500

600

5 I-~+---+---+----If---+--~

5

10

15

20

25

30

POWER SUPPLY VOLTAGE Vee (V)

5-17

MB3763H

TYPICAL PERFORMANCE CHARACTERISTICS (Cont'd)

Fig. 5 - OUTPUT CURRENT
vs.OUTPUT VOLTAGE
2.0

Fig. 6 -INPUT VOLTAGE
vs.lNPUT CURRENT

I

6

VCC_24V
TA .. 25"C

~
0
>

-

r-

f-

:::>

n.

4

a:
a:

3

:::>

o

-

--- -_
VOL

!--""

o

100

200

L~V

f-

:::>

2

n.

0.5

!

!'

0

f-

0

=

fZ
W

AVOH (VCC-VOH)

---

1.0

>

:::>

VCC .. 12V

§.

C!

~

,

5

<"

300

~

...

400

--o

SOO

,

vcc_ 24V

TA.25"C

1.5

w

0

I

600

o

/

~

./

5

V

;/

10

15

20

25

INPUT VOLTAGE V, (V)

OUTPUT CURRENT 10 (mA)

Fig. 7 - TEMPERATURE
vs. POWER DISSIPATION
6
(1)

5
o
n.

4

~
n.

3

ffi

2

t5

2io

~

....

"'\

~ ts:'

r"

~ .........

(1) Infinity Heat Board
(2) 10Ocm 2 x 2mm AI Board
(3) 5Ocm 2 x 2mm AI Board

o
-20

(4) Free Air

o

20

40

60

TEMPERATURE TA (DC)

5-18

80

100

30

MB3763H

PACKAGE DIMENSIONS
8-LEAD PLASTIC SINGLE IN-LINE PACKAGE
(CASE No.: SIP-08P-M01)

--.798(20.28) M A X _

[

. . """ 00' . , , 039(100)

INDEX~

283
(720)

236
(600)



200

w
w
Cl
~ 150

':i
o

>

~
..J0.5

~

0

o

Q
I

~

~
:::J

0

0

-

0

---

VOL

f.----

20

40

60

80

OUTPUT CURRENT 10 (rnA)

-----+-----

,,--

i>VOH (Vee - VOH)

>

50

~
:::J

Vee =3V
'JA = 2.4V, VIB = OV

100 o

~

:::J

r-

VS.

100

i>VOH (Vee - VOH)

- ---100

200

-- ----

VOL

300

400

500

OUTPUT CURRENT 10 (rnA)

5-25

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImllll~III~~111
FUJITSU
mllml~~mllllmll~III~~III~~I~~III~1 MB3854

TYPICAL CHARACTERISTICS CURVES (continued)

Fig. 8 - OUTPUT CURRENT VS.
POWER SUPPLY CURRENT

<
..ssc
u

Vee - 3V
VIA ~ 2.4V. VIS ~ OV

u

;: 40

z

~~~--.

~ 30

~

II:

..........

~

<.J20
~

8:
~

CJ)

ffi

10

0

~
0

~

Fig. 9 -INPUT VOLTAGE VI. INPUT CURRENT

~~-

3.-------r-------rT----~

I Vee ~ 10V

E
1

:

2r-------r-------~'----_4

f-

II:
II:
~

<.J

200

I

zw

~

100

I

<

300

400
OUTPUT CURRENT 10 (rnA)

Q.

500

lr-----~~~----r_----_4

f-

~

Q.

:!!:

o

5

10

INPUT VOLTAGE VIN (V)

Fig. 10 - POWER DERATING CURVE

.---,----.-----,1----,----,
~
..I.
~ 0.6 ~=:j::::=+=:ED~IP:L:/s~O~P::t~1
0.8

o

~

!!: 0.4 f----+----+----+----t--;--t
CJ)
If)

a
ffi 0.2 r---+----+---t----t----H
~

Q.

0_~2~0--~0--~2~0--~40----6LO--~80
OPERATING AMBIENT TEMPERATURE TA (OC)

Notes: FPT package is mounted on the ceramic board (3.0cm x 3.0cm x O.05cm).
Maximum power dissipation must be kept.

5-26

15

1111111111111111111111111111111111111111111111111111

FUJITSU

MB3854

1111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
8-LEAD PLASTIC DUAL-IN-LiNE PACKAGE
(CASE No_: DIP-08P-M01)

.300(7.62)TVP

.010±.002
(O.25±0.05)

.035~:g~~
(0_89~g:~5)

.172 (4.36)MAX

.039~~12
(0.99~g·3)
Dimensions in
inches (millimeters)
©FUJITSU LIMITE01987

D08006S~2C

5-27

~11111~llllllllm~III~~mll~lml~lllllm
FUJITSU
Ilmlmllllllmlllllllll~IIIIIIIIIII~IIIII~11 MB3B54

PACKAGE DIMENSIONS (continued)
8-LEAD PLASTIC FLAT PACKAGE
(CASE No. : FPT-08P-M01)

r;~7.~'ikl
INDEX
---/
U

1

·307±.016
(7.8±0.4)
.209±.012
(5.30±0.25)

1C:::j::r=r;::::::::r::r=:?~
.050(1.27)

.002(0.05)
MIN
(STAND OFF)
View "Au

.008(0.2)

J

.020(0.5)
.007(0.18)
MAX
.027(0.68)
MAX

.018±.004
(0.45±0.10)

TYP

~=1.085(t.'5)MAX
(
\
+
'---,'\ A

.0315<.008
(0.8<0.2)

@FUJITSU LIMITED 1987 F08002S·2C

5-28

Dimensions in
inches (millimeters)

------------------Section 6
Disk Drivers - At a Glance
Power
Dascrlptlon

Features

Package
Options

Page

Device

6-3

MB4107A

Floppy Disk VFO
VFO with PLL Data
Separator GAP and
Mark Detector

+4.75 to +5.25 24-pin Plastic DIP, FPT

6-19

MB4108A

Floppy Disk VFO
VFO with PLL Data
Separator GAP and
Mark Detector

+4.75 to +5.25 24-pin Plastic DIP, FPT

6-31

MB4111
MB4113

Head4-Ch
RlWAmp
Driver/Receiver

AV=35VN
Moving Head
ReadlWrite

+5.7 to 6.3

24-pin Ceramic FPT

6-41

MB4114A

Head4-Ch
Amp for HOD

AV= 190VN

Dual: +5, +12

24-pin Ceramic FPT

6-57

MB4115
4116
4125
4126

Head8-Ch
Amp for HOD

AV=120VN
Damping Resistor

Dual: +5, +12

34-pin Plastic FPT

6-73

MB4117-4
4118-4

Head4-Ch
RlWAmp

AV = 110VN
Damping Resistors

Dual +12, +5

22-pin Plastic DIP
24-pin Plastic FPT
24-pin Ceramic FPT

6-73

MB4117-6
4118-6

Head6-Ch
RlWAmp

AV=110VN
Damping Resistors

+12, +5

28-pin Plastic DIP
28-pin Ceramic FPT

6-85

MB4313

Driver/Receiver

ReadlWrite
Interface

-6.2

16-pin Ceramic DIP

6-91

MOO16

Driver/Receiver
for Disk Head
Amp

With Write
Current Source

-6.2to-12

16-pin Ceramic DIP

6-99

MB4319

Head Positions
Controller

Head Control

+15 to 15

IS-pin Ceramic DIP

Supply (V)

DI

6-1

Disk Drivers

8-2

Linear Data Book

FUJITSU

MB4107A

11111111111111111111111111111111111111111111111111111111111111111

Februarv 1989
Edition 2.0

FLOPPY DISK VFO
The Fujitsu MB4107 A is a variable-frequency oscillator (VFO) IC for use in
floppy-disk interfaces_ It provides a complete data separation function, with a
minimum of external parts and no adjustments, and can be used with a variety
of disk controllers_ It locks onto the read signal from the disk drive, which
normally has jitter due to rotation speed variations and peak shifting, and
produces a stable read signal for the controller. It also produces a window
signal, which can be used to differentiate the clock and data pulses in the read
signal.

PLASTIC PACKAGE
DIP-24P-M02

The MB41 07 A includes functions for sync field detection, automatic loop
filter gain switching, and address and index mark detection_
•

•

•

•

•

•

The analog VFO (PLL) circuitry
allows a wide read margin for the
data separator.
Can be connected to 8-inch ,5-inch
and 3_5-inch floppy disk drives
using the same external components_
Handless..,'· both double-density
(MFM)· and single-density (FM)
disks.
Can be used with various floppy
disk controllers such as the
MB8876A, MB8877 A, FD1791 ,
and IlPD 765_
The discrimination function for
gap and sync fields prevents incorrect locking on the gap field.
The quick sync function (high
gain) in the sync field is automatically switched to the stable

•

•

•

•

tracking function (low gain).
Because the sync pattern detector
(data: OOH, clock: FF H ) and the
IBM format mark detector control
PLL gain, the index, 10, and data
fields can be locked onto without
special control signals.
A master clock is generated for
the floppy disk controller, to prevent spikes when switching between each kind of floppy disks.
External circuitry requires very
few components, and no adjustments.
Internal clock: 7 resistors, 5 capacitor, 1 crystal or
ceramic resonator
External clock: 5 resistors, 3 capacitors

PLASTIC PACKAGE
FPT-24P-M02

PIN ASSIGNMENT

MIN

DVee

FM

TEST

LO

HO
AI

ABSOLUTE MAXIMUM RATINGS (TA ~ 25°C)
Item

Symbol

Condition

AO
Rating

Unit

VCO
AVee

Supply Voltage

Vee

7

V

C1

Logic Input Voltage

V IN

7

V

AGND

Power Dissipation

Po

550

mW

Storage Temperature

T STG

-55 to +125

°c

C2

T~75°C

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

RD

This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields. However. it is advised
that normal precautions be taken to avoid

application of any voltage higher than maximum rated voltages to this high impedance

circuit.

6-3

1IIIIIIIIImMlmllllllmllllmllllllllll~~r
FUJITSU
1lllllllllllllllllllllllllllllllmlmlmlml~11 MB4107A

LO

HO

A1

RD o--T""--l

AO

VCO

C1

C2

DAo--++---------~~
RGo--++---------~~

~---+------~DW

GAP, SYNC
BYTE DETECTOR

X1
8M Hz
X2O-----~------------~-------i

Vee

1111

DVee
DGND AGND
AVec

6-4

I ~~f"

FM MIN CSEL TEST

~------------~CK
I--------------~WCK

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4107A

1111111111111111111111111111111111111111111111111111

PIN DESCRIPTION
Pin No.

Descriptions

Pin Name

Selects type of floppy disk as follows: - 8-inch floppy disk (STD) Low
- 5-inch, 3.5-inch floppy disk
2D, 2DD (MIN) High
2HD, 2ED (3.5-inch 2MB) (STD) Low

1

MIN

2

FM

Selects the disk density as follows:
- Single density (FM system)
High
- Double density (MFM system) Low

3

RR

Read data signal for the FDC, including both clock and data pulses.

4

DW

Data window signal for separating the R R signal into data and clock pulses.

5

DA

Input for indicating a data field. When DA goes high, the PLL is kept as a low gain.
Either RG or DA is used, but not both, and the unused pin is kept low.

6

RG

Read Gate (MB 8877 A system) or VCO Sync (IlPD765 system) input. When a high signal
is applied to this pin, PLL is kept at a low gain.

7

WCK

The IlPD 765 system FDC write clock pulse is output from this pin as follow:
T ~ 1 IlS
- STD 8-inch/MFM
T ~ 2 Ils
- STD 8-inch/FM
T ~ 2 IlS
- MIN 5-inch/MFM
T ~ 4 Ils
- MIN 5-inch/FM

8

CK

The FDC clock pulse is output from
- MB 8877 A system/STD 8-inch
- MB8877Asystem/MIN 5-inch
- IlPD 765 system/STD 8-inch
- IlPD 765 system/MIN 5-inch

9

CSEL

Selects the FDC type shown below (an internal pull-up resistor is provided):
- MB 8877 A, FD 1791 system High
- IlPD 765 system
Low

10

X2

(1) Inverter output for the quartz oscillator
(2) This pin is open when a 8-MHz external clock is used.

11

Xl

(1) Inverter input for the quartz oscillator
(2) Input pin when an 8-MHz external clock is used.

12

DGND

Ground for digital circuits

13

RD

Input for the source read data from the FDD

14

AGND

Ground for analog circuits such as VCO and filter amplifier

15
16

Cl
C2

An external capacitor for setting VCO oscillating frequency is connected to these pins.

this pin as follows:
2 MHz
1 MHz
8 MHz
4 MHz

6-5

mllllllllllllllllllllllllllllllllllllllillmllill

FUJITSU

IIIIIIIIIIIIIIIIII~IIIIIIIIIIIIIIIIIIIIIIIIIIIII MB4107A

PIN DESCRIPTION (continued)
Pin No.

Pin Name

Descriptions

17

AVec

Power supply for analog circuits such as the veo and filter amplifier.

18

veo

VeOcontrol current input.

19

AO

Output pin for the low pass filter (LPF) amplifier in the VFO (PLL) circuit.

20

AI

Input pin for the LPF amplifier in the VFO (PLL) circuit

21

HO

Output pin to be externally connected to the LPF amplifier. This pin is selected at
frequency lock after a sync field is detected. A high signal decreases the veo frequency
and a low signal increases it. (High gain)

22

LO

Output pin to be externally connected to the LPF amplifier. This pin is selected after
frequency lock, for phase synchronization. A high signal delays the veo phase, and a
low signal advances it. (Low gain)

23

TEST

Used for the LSI function test. It is normally open or pulled up.

24

DVee

Power supply pin for digital circuits.

RECOMMENDED OPERATING CONDITIONS
Item

6-6

Symbol

Min

Typ

Max

Unit

Supply voltage

Vee

4.75

5.00

5.25

V.

Operating temperature r;nge

Top

-20

25

75

°e

111~~llllmmllmllllllllllm~III~~11111111
FUJITSU

MB4107A 11~llllllmllllllllllllllllmlmllml~~ml~

ELECTRICAL CHARACTERISTICS
1 - DC CHARACTERISTICS
Value
Item

Symbol

Unit

Applicable
pin

100

mA

Vee

-

-

V

-

-

O.B

V

-

-

20

JlA

Condition
Min

Supply current

Ice

High level input
voltage

V,H

Low level input
voltage

V,L

High level input
current

I'H

Current at maximum
input voltage
Low level input
current

2.0

70

Max

Vee = 4.75 to 5.25V

I,
I,L

Open·circuit input
voltage

V,P

Low level input
current

I'LP

High level output
voltage 1

-

Vee = 5.25 V

Typ

Vee = 5.25 V, V, = 2.7 V
Vee = 5.25 V, V, = 7.0 V
Vee = 5.25 V, V,

= 0.4 V

-

0.1

-400

-20

-

JlA

4.85

5.0

-

V

-

mA

MIN, FM
DA, RG
CS,Xl
RD

FM,DA
RG,Xl
RD

VOHI

-1.1

Vcc = 4.75 V, 10H = -1.2 mA
IOL=12mA

-0.6

-

*4
*3

*3

-

-

MIN,CS
V, =0 V

Note

-

mA

*1
*3

2.7

3.3

-

V

-

0.28

0.4

V

0.35

0.5

V

-

Low level output
voltage 1

VOLI

Short·circuit output
current 1

10S1

Vee = 5.25 V

-30

-

-160

mA

*1
*3

High level output
voltage 2

VOH2

Vec = 4.75 V, 10H = -0.4 mA

2.7

3.3

-

V

*1
*3

10L =4 mA

-

0.28

0.4

V

10L = 8 mA

-

0.35

0.5

V

Vee =4.75 V
10L = 24 mA

RR, DW

f---

f---

Low level output
voltage 2

VOL2

Short-circuit output current 2

los2

Vee = 5.25 V

-20

-

High level output
voltage 3

VOH3

Vec = 4.75 V, 10H = -0.4 mA

2.7'

3.3

Low level output
voltage 3

VOL3

Vce = 4.75 V,l oL = 1 mA

High output voltage

VHH

10H =-1 mA

Vee

= 4.75 V

WCK,CK

-110

-

*3

V
X2

-

0.28

0.4

V

3.3

3.7

-

V

Low output voltage

VLH

10L = 1 mA

High output voltage

V HL

10H = -0.2 mA

-

2.0

2.4

V

3.8

4.2

-

V

veo free run
frequency
NOTE:

10L =0.2 mA

fFR

*1 The output stage is set high.

*1
*3

~
*3
*1

r--*2
*1

LO
V LL

*2
*3

r--;-;-

mA

HO

Low output voltage

*2
*3

f---

-

1.5

1.9

V

*2

1.6

2.0

2.4

MHz

-

*2 The output stage is set low.

*4 Vee is connected with A, Vee & 0, Vee.

6-7

mm~~llmll~llml~~lllmm~~M~lm
FUJITSU
111~~III~~~mll~llllllm~~~~IIIIIII~11 MB41 07A

2 - AC CHARACTERISTICS
Item

Symbol

Rising Time

T,

Falling Time

Tf

Frequency

Duty Ratio

(Vcc = 5V. fx 1 = 8MHz)
Condition

Rising Time

T,

Falling Time

Tf

1
8

~PD765

MIN="H"

4

CSEL= "L"

TWH
MIN="H"

Rising Time

T,
Tf

Tw
MIN="H"

Rising Time

T,

Falling Time

Tf

"L" Level Width

TWL
MIN="H"

Slip Off from DW Center

6-8

3

MFM= "H"

1

MFM = "L"

2

MFM- "H"

2

MFM = "L"

4

MFM= "H"

125

MFM = "L"

125

MFM= "H"

250

MFM = "L"

250

TWH

External Clock Duty
Ratio

DexT

~s

WCK

ns

3
2

MFM = "H"

1

MFM = "L"

2

MFM = "H"

2

MFM = "L"

4

DW
~

3

ns

2

MFM = "H"

0.25

MFM = "L"

0.5

MFM= "H"

0.5

MFM = "L"

1

RR
~s

10

To

"H" Level Width

ns

2

CL = 25pF
MIN= "L"

ns

50
fXl = 8MHz/9.6MHz

CK

%

50

CL = 25pF
MIN = "L"

Window Width
("H" Level Width)

MHz

50

CL = 25pF

CL = 25pF

MIN = "L"

ApJ)licable
Pin

2

MIN = "L"

Tcy

Falling Time

MIN = "L"

Unit
ns

2

CSEL = "L"
CSEL= "H"

Max

3

MIN="H"

MIN="H"

"H" Level Width

Typ

CSEL= "H"
M88876A

MIN = "L"
Cycle Time

Min

CL = 25pF

fCK

DRcK

Value

40

50

60

%

RD

Xl

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4107A

1111111111111111111111111111111111111111111111111111

STANDARD EXTERNAL CIRCUITS (MB4107A)

MIN/STD

DVcc 24f----< +5V

FM/MFM

TEST 23

R1
8.2 K
Data Window

0.00221'F
C1

Data Area
1 K R4
Read Gate
1/0.5 MHz (I'PD 7651
0.5/0.25 MHz
2/1 MHz (MB 8877 AI

8/4 MHz (I'PD 7651
Open for MB 8877 A
GND for I'PD 765

330 pF R7

C51---i r-~---r----f

8 MHz
C4

2K
220 pF

j---------j I--+------'~_I
6.8K
RS

NOTE: 1. C3 (±5%), R5 (±1%), otherwise C (±10%), R (±5%)
2. Since the a-MHz internal and a-MHz external clocks require precision of ±1 %, a ceramic resonator can be used
when WCK and CK do not require a high precision.

6-9

mJIIiiUIIOO~!~~~OOlil
FUJITSU
11~lm~~~m~~I~in~~II~nl MB4107A

TIMING CHARTS
8 INCH, MFM, HIGH GAIN (SYNC FIELD)

c

Read Data
(INPUT)

c

c

c

JlL..--_-! ...._--'n. . ._---'n. . ._--'n. . .__

Raw Read
(OUTPUT)
Data Window

(OUTPUT)

n

8 INCH, MFM, LOW GAIN

c e o

Read Data
(INPUT)

Raw Read
(OUTPUT)

~2 /.IS~~I:.=~~3~JJ::s==~I:.=~;::::4ItS---.~1
Uc
Uc
Uo

Data Window
(OUTPUT)

ill

8 INCH, FM, LOW GAIN.

Read Data
(INPUT)

RiiWFiOiid

(OUTPUT)

Data Window
(OUTPUT)

NOTES: 1. The above times are doubled for 5·inch floppy disks.
2. C = clock pulse, 0 = data pulse

6-10

0

-DL..--_-!n. . .___~n. . .--------~n. . .---......

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImmilim

FUJITSU

MB4107A 11111111111~lllllllmllllmllllllllllllllllllll~

STANDARD CONNECTION
1. MB8876/77 A
1·1) Read Gate
MB4107A

MB8876A/77 A
ClK

CK

DDEN

FM

FDD

FD

READ DATA

MIN
CSEl
RAW READ

RR

RClK

DW

RG

RG

J;"

DA

MB8876A/77A

MB4107A

ClK

CK

DDEN

FM

FD

D

FDD

FEAD DATA

MIN
CSEl
RAW READ

RR

RClK

DW

RG

DRO

DA
lS74A

1-21 Data Request
MB8876A/77 A

MB4107A

ClK

CK

DDEN

FM

RD

FDD

READ DATA

MIN
CSEl
RAW READ
RClK

"8 inch: T C = 1001'S ± 20%
"5 inch: T C = 200ILS ± 20%

6-11

Imllllllllllllllllllllllllllllllllllllllillmlill

FUJITSU
1IIIIIIIImllllllllillmlllillmllllllllllllllili

MB4107A

STANDARD CONNECTIONS (continued)

2. J.!PD765
I'P0765

MB4107A

ClK 1 - - - - - - - - - \ CK
WCK
WCK

FOO

FOt----------lREAO DATA

MFMI-----j :>o-----IFM
CSEl
ROD 1-----0< 1---1 RR
ROW
OW
RG

8 inch/5 or 3.5 inch (2HOI : T e = 1001's ± 20%
5 or 3.5 inch (20,2001
: T e = 2001's ± 20%

Vee
I'P0765

MB4107A

ClK
WCK

CK

MFM

FM
CSEl

WCK

~

......,

.....

ROD
ROW

~

SYNC
ORO

6-12

10

or

I~KClK

U

lS74A

RR
OW
RG

OA

RO

FDO

READ DATA

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4107A

1111111111111111111111111111111111111111111111111111

CK, WCK TIMING (EXTERNAL CLOCK INPUT)
Mode

In/Output

Timing

CSEL= "H"
MBBB76A
MB8877A

CK

STD
MFM/FM

Xl

CSEL = "H"
MB8876A
MB8877A
MIN

CK

D

Xl

MFM/FM

Mode

In/Output

CSEL= "L"
(IlPD765)

WCK

Timing

Magnification

CK
STD
MFM

CSEL = "L"
(IlPD765)

Xl

WCK
CK

STD
FM

Xl

6-13

1111111111111111111111111111111111111111111111111111

FUJITSU

IIIIIIIIIIIIIIIIIIIIIII~~IIIIII~~IIIIIIIIIIIIIII

MB4107A

CK, WCK TIMING (EXTERNAL CLOCK INPUT) (continued)
Mode

In/Output

CSEL ~ "L"
(IlPD765)

WCK

Magnification

Timing

CK
MIN
MFM

Xl

CSEL~

"L"
tuPD765)

DI

WCK
CK

MIN
FM

Xl

Delay of CW, WCK against input clock
IlPD765: MFM. MIN Mode (Vee ~ 5V)

Xl

1~50ns

WCK •

~ 50ns

CK
100ns/DIV
---

I
I

Xl

j .~ 50nS

WCK
CK
1OOns/D IV

6-14

\
•

~

E:::=i-1i
__
L_~

Xl

WCK

~

SOnS

• • • • •-CK
100ns/DIV

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4107A IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~IIII~I~~~III

TYPICAL PERFORMANCE CHARACTERISTICS

Fig. 1 - fVl0

Fig.2 - FREE RUN FREQUENCY

vs. VAD

vs. C3
2.6

4
R5

2.4

N

2.3

e

:x:

3

~

II:

..'!2.2

z

:::l

....

2.1

w

w
0:

N

:x: 2.0
0

u

:I.2kU

I~:'--

II.

e

.2

=

0

1.9

50

100
150
200
C3 CAPACITOR (pFI

250

1.8
1.7
1.6
Fig.4 - FREE RUN FREOUENCY

1.5

vs. R5
0

3.0

2.5

4

3.5

>-

VAO (VI

u

~

3

:::l_

Fig. 3 - FREE RUN FREOUENCY

vs. T.
3

fi1:J:

e: e

2

C3 = 11000PF

1\

\

...........

z:::l-:::

~.2kU

....

R5 =
C3 = 100pF

w

l"-

w

a:

II.

vee =

[;

2

4.5V5.0V
5.5V

zw

o

2

4

5

R5 RESISTANCE ·(kUI

:::l

ow

a:
II.

z

:::l

a:

1

w
w

a:

II.

o

o

25

50

75

100

AMBIENT TEMPERATURE TA (OCI

6-15

1~~~~II~llllillmllllll~I~!lmll~~
FUJITSU

m~I~~~II~~~~~~I~II~~m MB4107A

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

Fig.

5 - TIME MARGIN vs. To

Fig. 6 -

TIME MARGIN

vs. FREE RUN FREQUENCY
1.2

1.2

MODE: STD, MFM
DATA: 'A2'

1.0

--

~

~ 0.9

«
:;

~

I

1. 1

1. 1

j

MODE: STD, MFM
(C3 adjustment)
DATA: 'A2'

Vee

.....

=

"""""'"

0.8

t=

1. 0

]
Z

c;
II:
«

5.5V5.0V
4.5V_

O. 9

:;
w
:;

r--

O.8

t=

i'--

"-

O. 7

O. 7

F
o

50

25

75

1.0

100

AMBIENT TEMPERATURE T A (OC)

GAIN vs. fMOD

Fig.7 -

+5

iii

:g

1

II11111

o

STD, MFM Mode
Modulation Rate 1%
DATA "F"

-5

\
1\

z

~

-10
-15

100 200

500

lk

2k

fMOD (Hz)

6-16

1.5

2.0

2.5

3.0

FREE RUN FREQUENCY fFR (MHz)

5k

10k

IIIIIIIIIIIIIIIIIIIIIIIIIIII!IIIIIIIIIIIIIIIIIIIIIII

FUJITSU

MB4107A

1111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
24·LEAD PLASTIC DUAL IN·LlNE PACKAGE
(CASE No.: DIP·24P·M02)

l
o

.533±.010
(13.55±0.25)

.600(15.24)TVP

~~~J
.1
.039~·g20

.050(1.27)

MAX

(o.98~g·50)

,11'' ' ' '"'
.118(3.00)MIN

.100(2.54)
TVP

I

~I

.018±.003
(0.45±0.08)

.020 (0.51) MIN

Dimensions in
inches (millimeters)

© 1988 FUJITSU LIMITED D24015S-2C

6-17

1IIIImllllllllllillmllllllllllllllllllillmlili

FUJITSU

1IIImlllllllllllllllllll~~1111111111111111111111 MB4107A

PACKAGE DIMENSIONS (continued)
24-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT-24P-M02)
.110(2.80) MAX
(SEATED HEIGHT)

~-'&l~",..gl'~

d

l

INDEX

402±016
(1020±040)

.299±.012
(7.60±0.30)

LIjj;::::;j;:::;;:::::;:;:::;:::;:;:::;:;:::;:;::::;:;::::~~
050(1.27)
TYP

r-- O;t~l;of 'i.:; pa;t--l
"A"

I

I

:008(020)

:

I
I

I
I

:

:
I

I
I

.007(0.18)
.550(13.97) R E F - - - - l

©1988 FUJITSU LIMITED F24008S·3C

6-18

MAX

I

:

I
.027(0.68)
I
I
MAX
I
L ______________ 1

Dimensions in
inches (millimeters)

FUJITSU
1111111111111111111111111111

MB4108A

111111111111111111111111
August 1988

Edition 1.0

FLOPPY DISK VFO
The Fujitsu MB4108A is variable frequency oscillator (VFO) IC for use in
floppy-disk interfaces_ It provides a complete data separation function, with a
minimum of external parts and no adjustments, and can be used with a variety
of disk controllers_ It locks onto the read signal from the disk drive, which
normally has jitter due to rotation speed variations and peak shifting and
produces a stable read signal for the controller. It also produce a window signal
which can be used to differentiate the clock and data pulse in the read signal.
The MB4108A includes functions for sync field detection, automatic loop
filter gain switching and address and index mark detection.
•

The analog VFO (PLL) circuitry
allows a wide read margin for the
data separator.
• Can be connected to both 8-inch
and 5-inch floppy disk drives using the same external components.
• Handles
both
double-density
(MFM) and single-density (FM)
disks_
• Can be used with various floppy
disk controllers such as the
M88876A, MB8877A, FD1791
and J.lPD765.
• The discrimination function for
gap and sync fields prevents
incorrect locking on the gap field.
• The quick sync function (high
gain) in the sync field is automatically switched to the stable
tracking function (low gain)

•

•

•

DIP-24P-M02

Because the sync pattern detector
(data: OOH, clock: FFH) and the
I BM format mark detector control
PLL gain, the index, 10 and data
fields can be locked onto without
special control signals.
A master clock is generated for
the floppy disk controller, to prevent spikes when switching between 8 and 5 inch floppy disks.
External circuitry requires very
few components and no adjustment.
Internal clock: 7 resistors, 5 capapacitors, 1 crystal or ceramic

FPT-24P-M02

PIN ASSIGNMENT

resonator
External clock: 5 resistors, 3 capacitor

DVcc
FM

RR

MF

LO
HO

ABSOLUTE MAXIMUM RATINGS (see NOTE)

AI
Rating

Symbol

Condition

Value

Unit

AO

Power Supply Voltage

Vee

7

V

VCO

Input Voltage

VIN

7

V

AVcc
CI

Power Dissipation

Po

550

mW

T A S75°C

e2
XI

Storage Temperature

TSTG

-55 to +125

°c

MF Input Voltage

V MF

Vee+0.3

V

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATI NGS are exceeded_ Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet_ Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

DGND

AGND
AD

This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-

mum rated voltages to this high impedance
circuit.

6-19

Imllmlml~mlllllllllllllllll~~II~~m
f'UJITSU
111111111~11~~IIIII~I~lllllllmlmllmm~1 MB4108A

Fig. 1 - MB4108A BLOCK DIAGRAM

AVec

DVec

LO

~

I I
RD

0-r---

r-

I

HO

AI

II

0

Up
CHARGE
PUMP

PHASE
COMPARATOR

e-.--

Down

AO

~
AMP.

,/""
LOW

z

VCO

VOLTAGE
CONTROLLED
OSCILLATOR
(VCO)

- - - 0 Cl
- - - 0 C2

HIGH

- - 0 AGND
DA

DRIVER

,....
~

GAIN
SWITCH

ORO roo.

-

LOOP
SWITCH

-0 ow

'-

C
DATA
PATTERN
CHECKER

DATA
SEPARATOR

~

roo. MF
~

Dl
TIMING
ADJUSTER

I
Xl

X2

FM

:-t>J
0

GAP, SYNC
BYTE DETECTOR

BMHz

.

-0

r--

CLOCK
DRIVER

-0 CK
roo.
~

WCK

~25k
--0DGND

MINO

~25k
CSEL

6-20

0

Illmllllllllllllllllllllllllllmlllllllllllllml

FUJITSU

MB4108A

111"""""""""""1""""111"""1"1"'"

PIN DESCRIPTION
Pin No.

Symbol

Function

1

MIN

Selects type of floppy disk
5-inch floppy disk (MIN): High
8-inch floppy disk (STD): Low

2

FM

Selects the disk density
Single density (FM system):
High
Double density (MFM system): Low

3

RR

Read data signal for FDC includes clock and data pulse.

4

DW

Data window signal for separating the RR signal into data and clock pulses.

5

DA

Input for indicating a data field when there is no DRO signal.
When DRO = H, the PLL keeps a low gain. Either RG or DA is used, but not both and the
unused in is kept low.

6

DRO

Input for Data Request. After mark is detected, PLL is kept as low gain when DRO = H
(positive edge trigger). 3 bytes data is input, PLL becomes high gain (Free run) when DRO= L.

7

WCK

The IlPD765 system
8-inch/M FM:
8-inch/MF :
5-inch/M FM :
5-inch/MF :

8

CK

The FDC clock pulse is output from this pin
MB8877 A system/8-inch : 2M Hz
MBBB77 A system/5-inch : lMHz
IlPD765 system/8-inch : 8MHz
IlPD765 system/5-inch : 4MHz

9

CSEL

Select the FDC type (On chip pull-up resistor)
MBB877A, FD1791 system: High
IlPD765 system
: Low

10

X2

Inverting output of the crystal oscillator
The pin is open when 8MHz external clock is used.

11

Xl

Inverting input of the crystal oscillator
Input pin when 8MHz external clock is used.

12

DGND

Ground of digital circuit

13

RD

Source read data input from F DD

FDC write clock pulse is output from this pin
T = 11ls
T = 21ls
T = 21ls
T = 41ls

14

AGND

Ground for analog circuit such as VCO, filter amplifier

15
16

Cl
C2

An external capacitor is connected to set VCO oscillation frequency

17

AVcc

Power supply for analog circuit such as VCO and filter amplifier.

lB

VCO

VCO control current input

19

AO

Low pass filter (LPF) output in the VFO circuit

20

AI

Low pass filter (LPF) input in the VFO circuit

21

HO

Output pin to be externally connected to the LPF amplifier. This pin is selected at frequency
lock after a sync field is detected. High signal decreases VCO frequency and Low signal increase it (high gain).

22

LO

Output pin to be externally connected to the LPF amplifier. This pin is selected after frequency lock for phase synchronization. High signal delays the VCO phase and low signal
advance it (low gain).

23

MF

When free wn mode and high gain mode, MF becomes high.
After mark is detected, it becomes low and keeps low level during low gain.

24

DVcc

Power supply for digital circuit

6-21

Ilmllm~lll~mlllllllll!mllmllmlllllll
FUJITSU
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~IIIIIIIIIIII MB4108A

RECOMMENDED OPERATING CONDITIONS
Value
Parameter

Symbol

Unit
Min

Typ

Max

Power Supply Voltage

Vee

4.75

5.00

5.25

V

Operating Temperature

TA

-20

+25

+75

°c

DC CHARACTERISTICS
Value
Parameter

Condition

Symbol

Min
Power Supply Current

lee

Input High Voltage

VIH

Input Low Voltage

VIL

Input High Current

I;H

Input Current

Typ
70

Vee = 5.25V

Vee = 4.75 to 5.25V
TA =-20t075°C

Unit

Pin name

mA

Vee

Note

Max
100

V

2.0
0.8

V

Vee = 5.25V, VI = 2.7V

20

p.A

II

Vee = 5.25V, VI = 7.0V

0.1

mA

Input Low Current

IlL

Vee = 5.25V, VI = O.4V

Open·circuit Input
Voltage

VIP

Input Low Current

IILP

VI=OV

Output High Voltage *1

V OH1

Vee =4.75V,
IOH = -1.2mA
TA = -20 to 75°C

VOL1

Vee = 4.75V
TA = -20 to
70°C

-400

-20

p.A

4.85

5.0

V

MIN,FM,
OA, ORO,
CX,Xl,
RO

*1

r-

FM,OA, f--ORO,Xl,
RO
f---

MIN,CS

f---1.1

-0.6

mA

2.7

3.3

V

*2

Output Low Voltage *1

10L = 12mA

0.28

0.4

V

10L = 24mA

0.35

0.5

V

RR,OW

*3
Co.-

Short-Circuit Output
Current*1

Note: "1

los1

Vee = 5.25V
T A = -20 to 75°C

AVee and OVee are connected together.
*2 The output stage is set high.
*3 The output stage is set low.

6-22

-30

-160

mA

*2

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4108A

DC CHARACTERISTICS

1111111111111111111111111111111111111111111111111111

(Vee; 5V, T A ; 25°C)
Value

Parameter

Output High Voltage"2

Symbol

V OH2

Condition

Unit

Vee ~4.75V,
10H ; -OAmA
TA

;

Min

Typ

2.7

3.3

Pin name

Note

Max

'2

V

-20 to 75°C

r-Output Low Voltage"2

V OL2

Vee ~ 4.75V
T A ~ -20 to
75°C

10L ~ 4mA

0.28

OA

V

10L ~ 8mA

0.35

0.5

V

WCK, CK

*3

I--Short·Circuit Output
Current*2

los2

Output High Voltage'3

V OH3

Vee; 5.25V
T A ; -20 to 75° C

-20

-110

mA

*2

V

'2

Vee; 4.75V,
10H ~ -OAmA
T A ~ -20 to 75°C

2.7

X2

Output Low Voltage'3

V OL3

Vee; 4.75V, 10L ; lmA
T A ; -20 to 75°C

Output Leakage
Current

IOH4

Vee; 5.25V, Vo

Output Low Voltage

V OL4

Vee; 5.25V, 10 = lmA
T A ; -20 to 75°C

Output High Voltage

VHH

10H ; -lmA

Output Low Voltage

V LH

10L; lmA

Output High Voltage

VHL

10H; -0.2mA

3.3

~

0.28

5.25V

0.35

3.3

3.8

OA

20

J1A

MF

*2

0.5

V

MF

*3

HO

I---

*3

V

3.7
2.0

2A

4.2

*2
*3

V

*2

V
LO

Output Low Voltage

V LL

Vee Free Running
Frequency

fFR

10L; 0.2mA

1.6

I---

V

1.5

1.9

V

2.0

2A

MHz

r--*3

Notes: *2 The output stage is set high.
*3 The output stage is set low.

6-23

1111111111111111111111111111111111111111111111111111

FUJITSU

1IIIIIIImll~IIIIIIIIIIIIIIIIIIIIIIIIIII~11111111 MB4108A

AC CHARACTERISTICS

(Vee = 5V, fX1 = 8MHz)
Value

Pin
Name

Parameter

Symbol

Unit

Condition
Min

Rising Time

Typ

3

tr
CL = 25pF

Falling Time

Frequency

ns
2

tf

CSEl = H
MB8876A
CK

MIN = l

2

MIN =H

1

MIN = l

8

MIN=H

4

MHz

fCK
CSEl= L
IlPD765

CSEl = H
Duty Ratio

50
CL =25pF

DRcK
CSEL = L

Rising Time

%
50

3

tr
CL = 25pF

Falling Time

Max

ns
2

tf
MFM = H

1

MFM = l

2

MFM = H

2

MFM = l

4

MFM = H

250

MFM = l

250

MFM = H

500

MFM = l

500

MIN = L
WCK

Cycle Time

Tcy

IlS
MIN =H

MIN = L
High level Width

ns

TWH
MIN = H

6-24

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4108A IIIIIIIIIIIIIIIIIIIIIIIIIIIII~IIIIIII~IIIIIIIIIIII

(Vee

= 5V, fXl = 8M Hz)

Value
Pin
Name

Parameter

Symbol

Unit

Condition
Min

Rising Time

2

MIN
Window Pulse Width
(High level width)

ns

= 25pF

tf

OW

Max

3

t,
CL

Falling Time

Typ

MFM

=H

1

MFM

=L

2

MFM = H

2

MFM = L

4

=L
j.ls

Tw
MIN =H

Rising Time

3

t,
CL = 25pF

Falling Time

ns
2

tf
MFM = H

0.25

MFM = L

0.5

MFM = H

0.5

MFM = L

1

MIN = L
RR

Low-level Width

j.ls

TWL
MIN = H

Time Deviation from
OW Center

To

RD

High-level Width

TWH

50

DRQ

High-level Width

TWH

50

Xl

External Clock
Duty Ratio

DXET

10

fX1

= SMHz/9.6MHz

45

ns

50

55

%

6-25

~mllllllll~mlmllmlllml~I~~~lml~11
FUJITSU

1IIIIIIIml~~~IIIIIIIII~~~~I~MI~~~m MB4108A

Fig. 2 -STANDARD EXTERNAL CIRCUITS

DI

MIN/STD

DVee

FM/MFM

MF

Raw Read

LO

Data Window

HO

Data Area

AI

Data Request

AO

I/O.5MHz (765)
O.5/0.25MHz WCK

Cl
O.OO22I'F
R4
lkn

VCO

2/IMHz (BB77A)
B/4MHz (765)

A.Vee

Cl

B877A/765
C5330pF

H

+5V

X2

C2

Xl

A.GND

C3
100pF

R7

H

C4220pF
D.GND

RD

R66.8kn

Notes:

6-26

1. C3 (±5%), R5 (±1%), otherwise C (±10%), R (±5%)
2. Since the 8MHz internal and 8MHz external clocks require precision of ±1%, a ceramic resonator can be used when
WCK and CK do not required a high precision.

1IIIIIIIIIm~mmlllllll~~~~lmlmlllllm
FUJITSU

MB410BA

1111111111111111111111111111111111111111111111111111

Fig. 3 - TIMING DIAGRAM

I 8 INCH, MFM, HIGH GAIN (SYNC FIELD)

C

Read Data
(INPUT)

~'--_ _~ ~

__~n~__~n~__~n~____
C

C

C

RawRead-~-~ ~------~ ~------~ ~------~ ~------~ r------~
(OUTPUT)
Data Window

(OUTPUT)

500nS

II

250n5

8 INCH, MFM, LOW GAIN
C

Read

C O D

oata~_ _ _ _~nL..

(INPUT)

___~nL.._____~nL..___

f---21'S--. t-1'~--31'S---.+I.----41'S---~'--l1 '--.....

U

Raw Read
(OUTPUT)

U

C

C

Data Window

(OUTPUT)

III 8 INCH, FM, LOW GAIN

C

C

--+---,

~"":"----i

o

C

o

C

C

o

C

Read Data
(INPUT)

Raw Read
(OUTPUT)

o

Data Window

(OUTPUT)

Notes:

1. The above times are doubled for 5·inch floppy disks.
2. C = clock pulse, D = data pulse.

6-27

1IIIIIm~llllllmloo~lllllmllllm~llllml
FUJITSU
1111111111111111111111111111111111111111111111111111

MB4108A

PACKAGE DIMENSIONS
24·LEAD PLASTIC DUAL IN·LlNE PACKAGE
(CASE No.: DIP·24P·M02)

IEJECTOR

~ARKI

~
U

.05011.271

MAX

.039~·g20

(o.98~g·501

I

l
.533'.010
(13.55±O.25)

.600115.24)TYP

tl " " ."
1181300lMIN

10012.541
TYP

I

© 1988 FUJITSU LIMITED D24015S·2C

6-28

.018<.003
10.45'0.081

.02010.511MIN
Dimensions in
inches (milimeters)

M 841 08A

11111111111111111111111111111111~lmlllllllllmll
FUJITSU
111~~~~lllllllllm~lllmmlmlllllllll~~1

24·LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT·24p·M02)
.OO2(O.05}MIN

INDEX

fll

. 402 •. 016
(10.2.0.41
.299'.012

!{r=n=::;;=:;;=::;;::::;:;=;;:::;:;:::;;;:::;:;::::;~ J

U'' T ""
.362'.012

J'"

o
.3}

View "A"

.OOS(0.2}

1om"'i'i"_"I"F'......................"""'........"....,I-.l.1O'6(2.7}MAX
.050(t.27}

TYP

T

.039'.008
11.0.0.21

=.--.::....-.1
.024(0.6}
.OOS(O.IS}MAX
.027(0.68}MAX
Dimensions in

@1987FUJITSU LIMITED F240oaS-2C

inches (millimeters)

6-29

Linear Data Book

6-30

11111111111111111111111111111111111111111111111111111111111111111

MB4111
MB4113

MAGNETIC DISK
HEAD AMPLIFIER

FUJITSU
11111111111111111111111111111111111111111111111111111111111111111

Oecember 1988
Edition 3.0

MAGNETIC DISK HEAD AMPLIFIER
The Fujitsu MB4111/MB4113 is a monolithic bipolar integrated circuit optimized for high performance application to disk head systems.
The MB4111/MB4113 is featured with the following four major functions to
interface with four magnetic heads.
• Write Amplifier Circuit
•

Read Amplifier Circuit

•

RAS (safety) Circuit

• Selection Decode Circuit
CERAMIC PACKAGE
FPT-24C-FOl

Also, the MB4111 /MB4113 has three modes, Read, Write and Idle.
The MB4111 /MB4113 is suitable for mounting directly on the arm of movable
disk head.
ABSOLUTE MAXIMUM RATINGS (*: Referenced to ground) (T. = 25°C)

PIN ASSIGNMENT
Rating

Symbol

Value

Unit

Supply Voltage

Vee *

7.0

V

Supply Voltage

VEE *

-5.5

V

Operating Temperature

Top

o to +70

°c

T STG

'-65 to +150

°c

Storage Temperature

Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS
are exceeded. Functional operation should be restricted to the conditions as
detailed in the operational sections of this data sheet. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

VEE

GNO

HS)

WS

Vee

H22
H2)
H02

US

WC
NC
NC
NC
OX
OY

HI2
HI)

HS2

cs

VEE

GNO

HO)
H3 2
H3)

RECOMMENDED OPERATING CONDITIONS
Value

Parameter

Symbol

Supply Voltage
(Read/Write/ldle)

Vee

5.7

6.3

V

Supply Voltage
(Read/Write/ldle)

VEE

-4.2

-3.8

V

Ambient temperature: OOC to +70°C

Min

Typ

Max

Unit

This device contains circu itry to protect the
inputs against damage due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedance
circuit.

6-31

m~I~llllllilllillll~llllllml
FUJITSU MB4111
111111111I~1~lllIllmllllll~MII MB 4113

PIN NAMES
No.

Symbol

Name

No.

Symbol

Name

No.

Symbol

1

VEE

Supply Voltage

9

DX

Data X

17

H31

2

HS 1

Head Select 1

10

DY

Data Y

18

H32

3

Vee

Supply Voltage

11

HS2

Head Select 2

19

HOl

4

US

Unsafe

12

VEE

Supply Voltage

20

H02

5

WC

Write Current

13

GND

Ground

21

H21

6

NC

Non-connection'

14

WS

Write Select

22

H22

7

NC

Non-connection *

15

Hll

8

NC

Non·connection·

16

H12

Head 1

Name
Head 3

Head 0

Head 2

23

CS

Chip Select

24

GND

Ground

Nota: NCs should be left open any tIme.

TEST CONDITIONS
Parameter

Value

Mode

Symbol

6.0 ± 1.0%

Vee
Supply Voltage

Write Select Voltage

Chip Select Voltage

Unsafe Voltage

Lh

-4.0 ± 1.0%
DC

o (short)

AC

9.0

Read/Write

j.lH

Write

3.5 ± 1.0%

Read

0.0 ± 0.Q1

Read/Write

O.O± 0.01

Idle

6.0 ± 1.0%

Read/Write/Idle

6.0 ± 1.0%

V ws

V

V

Ves

Vus
RLl

200 ± 1.0%
ReadlWrite/ldle

Termination Resistor

Ambient Temperature

6-32

Write

40.0± 1.0%

Read

0.0 ± 0.2

on

Read/Write/Idle

25.0 ± 2.0

mA

Iwe

TA

V

100± 1.0%

RL2

Write Current

V

ReadlWritelidle
VEE

Head Inductance

Unit

°c

11~~IIIII~IIIIIII~~llllllllmlmlllllllll~11

MB4111 FUJITSU
MB4113 11~1111111~1111111~~~lllmmlmlmlml~11

Fig. 1 - TEST CIRCUIT

Head 2

Head 0

Head 3

Head 1

OX

OY

HS 2

VEE

Note: NCs should be left open.

ELECTRICAL CHARACTERISTICS
Value
Parameter

Symbol

Unit

Note

20

mA

Selected

100

IJ.A

Non Selected

Min

Typ

Max

12

16

Icc
Supply Current

-70

Selected
mA

lEE

-45

Non Selected

6-33

Illmm~~lmllloo~~~~III~~IIIII~~~11
FUJITSU
11111~~~~I~~~OO~~~I~~llm~~~I~~

MB4111
MB 4113

MODE SELECT
Parameter

Sybmol

Value

Mode

Unit
Min

Typ

Max

Note

CS Input High Voltage

V IHC

Idle

5.7

6.0

6.3

V

CS Input Low Voltage

VILC

Read/Write

0.0

0.35

0.7

V

CS Input High Current

IIHc

Idle

-70

CS Input Low Current

IILc

Read/Write

-1.3

-1.0

-0.6

WS Input High Voltage

V IHW

Write/Idle

3.2

3.5

3.8

V

WS Input Low Voltage

V ILW

Read/Idle

0

0.1

0.2

V

IIHWI

Writelldle

0.7

2.8

mA

Transition
Unsafe OFF

IIHw2

Write/Idle

0.7

3.5

mA

Transition
Unsafe ON

WS Input Low Current

IILw

Read/Idle

0.1

mA

Switching Delay

tSD

All Modes

500

ns

-50j.lA<1 cs.010
(S.SSr 25 )

.900(22. 86)TYP

!

.315~:~
(S.00+2.16)

t"09
.050(1.27)
TYP

I-- --11

.017>.003
(0.43>O.OS)

.550(13.97)TYPE
.398>.008
(10.11±0.20)

.005~:~~~
(0.127

~~:~:)

-

1--.100(2.54)MAX

Dimensions in
Inches (millimeters)

©1988 FUJITSU LIMITED F24002S-2C

6-40

cO

January 1990
Edition 1.0

FUJITSU

DATA SHEET

MB4114A
MAGNETIC DISK HEAD AMPLIFIER
4-ch MAGNETIC DISK THIN-FILM HEAD AMPLIFIER
FOR HDD
The Fujitsu MB4114A is a monolithic bipolar integrated circu~ optimized for high
performance application to disk head system.
The MB4114A is 4-channel Read & Write Amplifier for thin film head of HOD.
•

Power Supply Voltage: +SV and +12V

•

Driving Four Thin-Film Disk Head

• logic Interface: TTL Compatible
•

On-chip write unsafe Detection circuitly
Abnormal Detection on the Disk Head

• low noise Read Amp.: O.55nVl.JHz typo

CERAMIC PACKAGE
FPT-24C-A01

• low Input Capacitance: 27pF typo

0

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Ratings

Symbol

Supply Voltage

Unit

Vee

~.6to+7.0

V

VEE

-10.0 to +0.6

V

Ves• Vws
VHS'. VHS2

Digital Input Voltage

Valua

~.4

to Vee +0.3

V

PIN ASSIGNMENT
(TOP VIEW)

24

GND

V...wDT. V-JNDT

VEE to +0.3

V

VHEAD

~.6to+O.4

V

H12

21

Iw

70

mA

Hl1

20

WOPK

H2'

,.

-WOT

H02

17

Head Input Voltage
Head Oulpul Voltage

H31

VWI/SV,

Detection System Output
Current

ISYL
lop!.

20

mA

Write Current

lwe

-70

mA

VWOIPK•
V,tIIF

Read Output Voltage

V.wsr.V..-

Storage Temperature

T...

Power Dissipation

Po

V'"

I.

H22

Delection System Output
Voltage

Note:

-ROT

+ROT

H32

~.4

~.S

to Vee +0.3

to Vee +0.3

-{is

to 150

160O(T. ~2S·C)

V

V

HOI

IMF

+WOT

HS2
HSI

ws

10

cs

11
12

WMSV
14

we
GND

·C
mW

Permanent device damage may occur if the above Absolute Maximum Rating. are
exceeded. Functional operation should be restricted to the conditions as detailed in
the operational sections of this data sheel. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

Quick PIOn! Is. tradet11llllt of FUJITSU LIMITED
Copyr;gh'" 1990 by FUJITSU LIMITED

6-41

MB4114A
Fig. 1 - BLOCK DIAGRAM
Vee

+RDT

IRead Buffer
Amp.
I

-RDT
+WDT

. I Write Pre-Driver I

-WDT

-

-

Transition
Amp.

f

Hll
Read Amp.

H12

...............

I..r--

Write Amp.
,.....1-..

~-+-

HSl
Head
Select
HS2

---

H02

f-+

... ......... f-

I--

Read!
Write!
Idle
Select

.......... -

Write Amp.

-

-

HOl

Read Amp.
r---

...........

~

1

Transition
Amp.

f-+
f- I-

f.o-

I--

f
H2l

Read Amp.

.............

Write Amp.

.- f--~

L-.-

-----Transition
Amp.

H22

ff--- I-

ii--

t
WMSV

WOPK

Write
Verify

Write
Operation

H3l
Read Amp.

r

'-I-

Write Amp.

.-0-

IMF

~,,~

Transition
Amp.

t
Transition
Check

---

I

Function

VEE

6-42

................

WC

GND

H32

MB4114A

PIN DESCRIPTION
GND

Ground termination.

2to9

H01to H31
H02to H32

Disk Head connect termination.
Channel 0 to 3.

10

iNS

Mode select termination (ReadlWrite)
Refer to page 4.

11

CS

Chip select termination.
Control signal input termination which selects operating condition or Idle condition.
Input logic interface is TTL compatible.
Usage of plural MB4114A is possible.

12

VEE

Power supply termination: -8V

13

GND

Ground termination.
Should be connected with Pin No.1.

14

WC

Write current termination.
Should be connected with external power supply which is capable to drive "0 to 65mA".

15

WMSV

Monitor termination of write mode.
When write mode is selected, this termination goes to low level.
Open collector output.

16

17

HS1
HS2

Head select signal input termination.
Let one of four channels to be operating mode.
Input Logic interface is TTL compatible.
Refer to page 4.

18
19

-WDT
+WDT

Write Data differential input termination.
Should be received differential signal input.

Write mode abnormal detection output termination.
Open collector output.
To prevent mis-writing on the Disk, the output goes to high level when following conditions.
20

WOPK

21

IMF

Monitor termination of operating mode.
The current flows from outside when Read or Write mode.
Usage of plural MB4114A is possible.
Refer to page 5.

22

Vee

Power supply termination: +5V

23
24

+RDT
-ROT

Output termination of Read Amp. circuit.
Load Resistance (2:1000) should be connected between this termination and Vee.

• When input frequency of write data is "0".
• When one of or both of head select termination is opened.
• When head connect termination is opened.
Refer to page 4.

6-43

MB4114A

FUNCTION
1. MODE SELECTION TABLE

Idle (I)

H

Write(W)

L

Note) H: High Level

L

L: Low Level

2. HEAD SELECTION TABLE
'?'?((";>..
H
L

L

0

H

L

1

L

H

2

H

H

3

L

Note) H: High Level

L: Low Level

3. WMSV (WRITE MODE SELECT VERIFY) OUTPUT TRUTH TABLE

Note) H: High Level

L: Low Level

4. WOPK (WRITE OPERATION OK) OUTPUT TRUTH TABLE

H

Idle Mode
H

L

L

Note) H: High Level

6-44

H

L

L: Low Level

R

W

Read Mode
Write Mode

L

Head Connect termination is opened.
Head Select termination is opened.
Input Frequency 01 write mode data is -0" Hz.

H

MB4114A

FUNCTION (Continued)
5. IMF (MULTI FUNCTION CURRENT) OUTPUT TRUTH TABLE

Idle Mode

H

L

H

R

Read Mode

L

L

W

Write Mode

L

H

R

WMSVIWOPK terminations are opened or
connected with GND.

OFF

ON

Note) H: High Level

OFF

L: Low Level

RECOMMENDED OPERATING CONDITIONS

Power Supply Voltage

Nole) • Minus means current direction from Ie to out side.

6-45

MB4114A

ELECTRICAL CHARACTERISTICS
1. DC CHARACTERISTICS

Vee

6

12

IccR

R

30

67

Iccw

W

24

50

Icc,
Power Supply Current
(Vcc)

=5V ± 5%, V.. =~V ± 5%, T. = 25"C

rnA
Power
Supply
System

IEEI
Power Supply Current
(V• .)

-10

-3

lEER

R

-78

-50

I.ow

W

-70

-46
60

180

R

650

1150

W

880

1320

Pd,
Power Dissipation

DI

PdR
Pdw

Iwe =-40mA

High Level Input Voltage

V'H

CS, WS, HS1, HS2

Low Level Input Voltage

V'L

CS,

2.0

Vcc +0.3

~.3

0.8

V.wDT
V-WDT

-1.87

0

6.V 1N

0.25

Ws. HSI, HS2

mW

V
+WDT,-WDT Input Voltage

CS Termination Input

Current
Digital
System

Ves = Vee

lesR

Ves = ~.3V, Vws = V'H

-1.6

-1.1

lcow

Ves = ~.3V, Vws = V..

-1.6

-1.1

iws,

Vws = Vcc

~.1

Nole) • I: Idle, R: Read, W: Write

6-46

0.1

Ves = V..

~.1

Iwsw

Vws = ~.3V, Ves = V L

-1.6

IHS1

VHS = 5.25V, Ves = 2V

IH...

VHS = ~_3V, Vws= V'H

0.26

0.6

IHSW

VHS = ~.3V, Vws = V'H

0.26

0.6

IWDI

V.woT = V-WDT = -1.87V

Iwow

V.WDT = V-"'DT = -1.87V

Current

+WDT,-WDT Termination
Input Current

0.1

lesl

Ws Termination Input

HS Termination Input
Current

0.9

0.1
rnA
-1.1
0.1

~.1

0.1
9

50

MB4114A

ELECTRICAL CHARACTERISTICS (Continued)
1. DC CHARACTERISTICS (Continued)

2. AC CHARACTERISTICS

Vee

Vin = 1mV...,.,
-adB point, RL = 1000

=5V ± 5%, VEE =..tN ± 5%, T. =25'C

60

dB

Power Supply Rejection Ratio

6-47

MB4114A

ELECTRICAL CHARACTERISTICS (Continued)
Vee

3. SWITCHING CHARACTERISTICS

=5V ±5%, VEE =-IV ± 5%, T. = 25"<:

L." = 350nH, RH =200, !we =-40mA

td LHW• td HLR

Idle -+ Write, Read

600

td HLW, td LHR

Write, Read -+ Idle

600

1dl>fN

Read -+ Write

600

td LHR

Read -+ Write

900

IdHLW

Write -+ Read

500

IdH",

Write -+ Read

750

Chip Select Transition Time

ReadlWrite Transition Time

Write/Read Transition Time

0

Head Select Delay Time

td HLR• tdLHR

500

Id Hl

700

IdLH

500

IdHl

650

Id LH

750

ns

IMF Delay Time

WMSV Delay Time

td.....

fin ~ OHz -+ 2MHz, Iwe ~ -15mA

td....

fin ~ 18MHz -+ OHz

1000

WOPK Delay Time

600

1600

tpd1

18

tpd2

18

Write Currenl Delay Time

AWrite Currenl Delay Time

Atpd
II'

13

If

13

Write Currenl Transition Time

6-48

3600

MB4114A

TEST CIRCUIT
1. DC CHARACTERISTICS

2. AC CHARACTERISTICS

Fig. 3

~ft~

HOl to H31

+ADT
H02 to H32

v"

':~

1000

Vo~

N

}
-RDT

MB4114A

3. SWITCHING CHARACTERISTICS

Fig. 4
Mon~or

SW1

Hal

H02
H12
H22
H32

Hll
H21
H31

MB4114A
HS2

HSl
Monitor

Monitor

Monitor

+ROT

Monitor

SW2

v"'"

-RDT

IMF

Monitor

Monitor

Monitor

1000

1000

470n

Monitor

'''''

-12V

6-49

MB4114A

APPLICATION NOTES
Fig. 5

r-------;;::1----1-----o
Vee
v••

HOl

Vee(5V)

.-..,....-+---0 v.e(--8V)

GND
H02
Hll

es
iNs

H12

HSl
HS2
+WDT
-WDT

H21

r--~--~--1---.---Vcc

1000

lkn

H22

+RDT r---------~~-4~~

H31

-ROT r--------------4~~
WOPK

lkn

4700

WMSV
IMF

H32

we ...---.....,~

lwe

-12V

Fig. 6 - IMF MONITOR

R
Vee
R

~"~.

"l' i
IMF

Comparator A

Rv.
'---+--f

• I,: 50"" < I, < 2.4mA (I",xl)
•• 12: 3.6mA < 12 < 4.8mA (I ... x2)

6-50

MB4114A

TIMING CHART
Fig. 7 - CHIP SELECT TRANSITION TIME
V,H
V'L

---Jt---- T ---"""1_------P'---------'I

tr. If::; 10ns (10%,90%)

50%

50%

Iw

T = 101'S (Duly 50%)

ViROTH

90%

±RDT

1000/.
0%

V.tROTl

-10%

r.HlJI

Fig. 8 - READIWRITE. WRITE/READ TRANSITION TIME

m

V,H

__

~I~----T------~,

______

T = 10"s (Duly 50%)

50%

tr, If!i< 10ns (10%,90%)

V'L

50%

Iw

100%

V"'OTH

±RDT

+10%

V:l RDTL

00/.
-10%

r."lJI

Fig. 9 - HEAD SELECT DELAY TIME
....- - - T
HSl
HS2

HOl H02
H31,H32

------t

V,H

T = 1aI'S (Duly 50%)
50%

V,L

tr, If,:;; 10ns (10%,90%)

""",--,-11,-,,0%~ 100%

VHH
VHL
-10%

0%

6-51

MB4114A

TIMING CHART (Continued)
Fig. 10 - WRITE CURRENT DELAYITRANSITION TIME
---_J,-----~,..--- -O.S5
_ _ _ _ 1'-_ _ _ _ _'1 ' - - - - - -1.75

±WDT

fWDT= 5MHz
IT, If;:;; 2ns (10%, 90%)

90%
50%

50%

10%

Iw
IT

Fig.11-IMF DELAY TIME
V,H

Cs

mI

T

~. 50%

T=
...,~

50%

V1MFH
IMF

Vn•tfL

~50%

I

10~

(Duty 50%)

IT, If!!; 10ns (10%,90%)

V'L

¥5O%

I '-LH

'-HL

Fig. 12 - WMSU DELAY TIME
T

V,H

Ws

"".- 50%

T = lOllS (Duty 50%)

..., f- 50%

IT, If!!; 10ns (10%,90%)

V'L

VSVH
WMSV

VSVL

jl5O%

~50%

l

"L,-",

'-HL

Fig. 13 - WOPK DELAY TIME
V

±WDT

WOPK

6-52

'WDTH

==tJlJ1J1------ JU

'; .11:

fWDT =

2.0, lSMHz(Duty 50%)

IT, If!!; 2ns (10%,90%)

.It,-:%

MB4114A

INPUT/OUTPUT EQUIVALENT CIRCUIT
Flg.15 WS TERMINATION

Flg.14 CS TERMINATION

V"'-----1>---

wso---C"

v"
Fig.16 HS1,HS2 TERMINATION

Flg.17 -WDT, +WDT TERMINATION

v"'--_---WDT
+WDT 0----;--[

Fig. 18 IMF TERMINATION

v""----+--

Fig. 19 WOPK, WMSV TERMINATION

v""-----..--

IMFo-----,

GND~~~-+--+-~

v..

-----<----

6-53

MB4114A

INPUT/OUTPUT EQUIVALENT CIRCUIT (Continued)
Flg.20 HEAD SELECT TERMINATION

Fig. 21 -ROT, +RDT TERMINATION
~DT~----------~

+RDTo---....
GND --..--+--t--t---,

HOl
Hll
H2l
H3l

o----t---C

H02o------lI----+----+
H12
H22
H32

V,,--4-_ _- - '

Fig.22 WC TERMINATION

wc~------------'

6-54

MB4114A

TYPICAL CHARACTERISTICS CURVES
Fig. 23 - WRITE CURRENT GAIN
VB. WRITE CURRENT

.s

~

1.0

Z

D.'

~

~

IZ
W

~

:>

i--""

w

II-

;;:

0.5

a:

J

1500

~

1000

a:

Vee· SV

I
10

20

30

40

50

I

I

60

70

500

:::;:

V... -SV _

/

«
0
«w

10

a:

80

WRITE CURRENT Iw (mA)

1600

ISO

:;-

(!l

.s

1400

a.

1200

Z

150

W

140

Z

~

130

;::

1000

~

120

600

..J

110

iii
en
is

~

0

0

(!l

i!

100

W

90

is

o

a:
lL
lL

«a.

VCG - 5V

ffi

20

I--

VEE .-BV
Vin.1mVp- p
fin .. 1MHz
Al _10Qn
~

-10

0

10

20

30

40

j

I

50

60

Vin(V~

25

Fig. 26 - POWER DISSIPATION
VS. TEMPERATURE

170

o

15

READ AMP. INPUT VOLTAGE Vin (mV p.,,)

Fig. 25 - DIFFERENTIAL VOLTAGE GAIN
VS. TEMPERATURE
[

~

/

0
T".2SoC

V

V

j

a.

~

0

0.6

T..... 2S-C
2000

~

0.7

W
I-

Vee - 5V
Vff --8V
2500 _ltn_1MHz
Rl .. 10CXl

0

>

a:
a:

3000

(!l

~
....I

I

D.•

Fig. 24 - READ AMP. INPUT
vs. OUTPUT VOLTAGE

"1
>

70

"
.........

AirFlow RaI.

' " 3m1.
... ~s
Orr/>

W

~a.

'"

600

a:

I-I--

r--....

400
200

80
10

TEMPERATURE T. (OC)

20

30

40

50

60

70

TEMPERATURE T. (OC)

Fig. 27 -WRITE DATA INPUT FREQUENCY
VS. WRITE CURRENT
N

J:

:-

Vex:. - 5V

b 600

~

>0

700

W

600

VEE --8VTA - 2&C

~ !b. .~ Normal Operation

Z

isW
a:

500

I-

400

lL
~

a.
i!l:
~

300

«

200

W

100

0

I-

a:

;;:

10

20

30

40

50

80

70

WRITE CURRENT Iw(mA)

6-55

MB4114A

PACKAGE DIMENSIONS

-r

24-LEAD CERAMIC (METAL SEAL) FLAT PACKAGE
(Case No.: FPT-24C-A01)

O'010.251
MIN

.2751.025

""""M"

D

-:r'~,"~,
1

.400<.007

I

MIN

.28017.111

~~~'.

TYP

~

.275'.025
16.99r 641

.05011.271
TYP

L ----! I

.017~:gg~
10.43+ 0 .08 1

1--_~.5",5;;:0+",.0",0;;;5:;--_0._05--1 ~M3A'XI0.
791
113.97<0.131
.600'.0,2 •
115.24±0.301

.. 1988 FUJITSU LIMITED F24006S·2C

6-56

-

(O.127~:g~~)
.085'.0'5
12.' 6'0.381

DirTltflslons In
inches (milimeters)

00

October 1989
Edition 1.0

FUJITSU

DATA SHEET

MB4115141161412514126
8-CH MAGNETIC DISC RIW AMP. FOR HDD
8-CHANNEL MAGNETIC DISK READIWRITE
AMPLIFIER FOR HDD
The Fujitsu MB4115/4116/412514126 are 8-<:hannel magnetic disk readlwrite amplifier
designed for hard disc drive equipments.
•

Dual Power Supplies: +5V
+12V

PLASTIC PACKAGE
FPT-34P-M01
FPT-34P-M02

•

Drive capability of 8 ferrite heads with centre tap

•

Write data input. control input level : TTL level

•

On-<:hip write current source
Current value is controlled by an external resistor

•

On-<:hip write unsafe detector in order to detect abnormal condition on head

•

On-<:hip two systems of power supply monitors with hysteresis to prohibit
mis-writing at abnormal voltage

PIN ASSIGNMENT

•

Read amplifier is low noise and differential voltage gain is 100

•

On-<:hip head damping resistor 750n: MB4116. 4126

•
•

Power Supply Voltage

(TA

= 25°C)

Value

Unit

Vcc,

-0.3 to 7.0

V

Vee.

-0.3 to 15.0

V

V RCT

-0.3 to 15.0

V

Symbol

Digital Input Voltage

VIN

-0.3 to V CC, + 0.3

V

Head InputlOutput Voltage

V HEAO

-0.3 to Vee. + 0.3

V

WUS pin. Output Voltage

Vwus

Write Current

Iw

Read Output Current

I

RDO

Centre Tap Output Current

I

veTO

WUS pin. Output Current

I wuo

Storage Temperature

T STG

Power Dissipation
NOTE:

Po

we

ROY

H2Y

Pin assignment enables easy mounting
MB4125. MB4126 pin assignment is reflected reversal image of MB4115.
MB4116. This is suitable for mounting several devices on the PCB.
Head pins are placed at the same side of centre tap voltage output pin (VCT pin)

Rating

Ci
RIW

H2X

A chip is mounted in a small 34-pin SOP package (lead pitch is 1.0mm)

ABSOLUTE MAXIMUM RATINGS (see NOTE)

GND
MAO

HOX
HOY
H'X
H'Y

-0.3 to 15.0
40
-10

-40
+12

-55 to 125
1100 (T AS 25D C)

V
mA

RDX

H3X
H3Y
H4X
H4Y

HSO
HS'
HS2

Vee'

HSl(

HeX
HeY

GNO
wo,
WUS

H7X
H7Y

GNO

H5Y

Vcc2
RCT

veT

MB4115,4116
FPT-34P-M01

HOX

GNO
MRO

HOY

Cs

H,X
H1Y

we

H2X
H2Y

Alii
RDY
ROX

H3X

HSO

HOY

HS'

H4X
H4Y

HS2

HSl(

Vee'

GND

H5Y

mA

WO,
WUS

HSX

mA

Vafl.
GND
RCT

mA
°C
mW

HSY
H7X
H7Y
veT

MB4125,4126
FPT-34P-M02

Permanent device damage may occur if the above Absofute Maximum
Rating. are exceeded. Functional operation should be restricted to the
conditIOns as detailed in the operational sections of this data sheel. Exposure to
absolute maximum rating conditions for extended periods may affect device
reliability.

6-57

MB4115
MB4116
MB4125
MB4126

Fig. 1 -

- -

V CCl

V CC2

rr~~,
I

BLOCK DIAGRAM

WUS

RCT

T

T T

,...

Wrile Unsafe
Detector

I

h I

VCT

,...

CenlerTap
Voltage
Generator

I

I

i
CS

OIl

>-I

Chip Selector

ReadlWrite
Selector

RIW

I
f----<

I
I

Write Data
1/2 Dillider

I

I
) WDI

I I
HOX
~ HOY
~

;(' H1X

H1Y

RDX

Read Buffer
Amplifier

ROY

f----<

Read Amplifierl

H2X

Wrile Amplifier

H2Y
H3X

IH:hannel
HSO
HSI
HS2

):
,.I

) H3Y
) H4X

H4Y

Head
Selector

) H5X

H5Y
H6X

) H6Y
Wrile
Current
Source

;.

....

WC

6-58

H7X

f--

) H7Y

~
GND

MB4115
MB4116
MB4125
MB4126

PIN DESCRIPTIONS
PinNa.

Pin Name

1 to 16

HOXtoH7X
HOYtoH7Y

Descrlptlona

These pins are provided to connect the head from O-<:hannel to 7--<:hannel

17

VCT

Output pin for head centre tap.
Write current flows to head centre tap.

18

RCT

Power suppry pin for centre tap.
VCT pin gets the current depending on write current.
When this pin is connected with ~ pin through a resistor 120
dissipation will be reduced.

19

GND

Sub-ilround pin
Ground pin for analog circuitry which operats at 12V. This pin is connected with mainground internally through a writing resistor about 1.5 n.
The bypass condenser is easily connected between this pin and VCC2 pin (20 pin).

20

VCC2

Power suppry voltage, 12V

n

(lf2W), power

Output pin for write abnormal detector
This pin outputs high level to prevent a disc from mis-writing for each of the following
conditions.
• Input frequency of write data is zero or very low
• VCT pin is open
21

WUS

• WC pin is open
• Head pins are open
• Each head pin is shorted
• Head pin and centre tap pin are shorted
• Device is in read mode
• Operation mode is not selected

22

WDI

Write data input pin
Input data is divided by two which drives write circuirty.

23

GND

Sub-ilround pin
Ground pin for digital circuitry which operates at 5V.
This pin is connected with main--ground internally through a writing resistor about 1.5 n.
The bypass condenser is easily connected between this pin and VCC2 pin (24 pin).

Vcc ,

Power supply voltage, 5V

24
25
26
27

HS2
HSI
HSO

Head selection signal input
Ona of 8--<:hannel becomes acbive condition by combination of these inputs.

6-59

MB4115
MB4116
MB4125
MB4126

PIN DESCRIPTIONS (Continued)
Pin No.

Descrlptlona

ROX
ROY

Differential output pin of read amplifier
Emitter Iollo_r outpuit

30

WC

Write current setlng input
Write current is controlled by an extemal resistor R we connected between this pin and
GNOpin.
Write current is formulated;
Iw (A) = KlRwc(n )

31

R!W

ReadlWrite mode select pin.
When this pin is at high level, read mode is selected.
When this pin is at low level. write mode is selected.

32

CS

Chip select input
Control signal input pin which selects operating mode or idle mode.
When this pin is at high level, device enters idle mode
When this pin is at low level. device enters operation mode
The device can be applicable for usage with severallC's lor this pin.

33

MRO

No connection
This pin should be open.

34

GNO

MaiR-ilround
This pin should be grounded as main"1lround.
Recommmded to coneet this pin with sub-i!round.

28
29

6-60

PlnName

MB4115
MB4116
MB4125
MB4126

FUNCTION
Table - 1. Mode selection

R1W pin, Voltage

<;S pin. Voltage

Mode
Idle (I)

H

-

Read(R)

L

H

Write(W)

L

L

Table - 2. Head Selection
HSO pin, Voltage

<;S pin, Voltage
H

L

HS 1 pin, Voltage

HS2 pin, Voltage

Selected Head

-

-

-

-

L

L

L

0

H

L

L

1

L

H

L

2

H

H

L

3

L

L

H

4

H

L

H

5

L

H

H

6

H

H

H

7

Table - 3. Output table of write abnonnal detector
<;S pin, Voltage

R1W pin, Vohege

Conditions

Mode

H

-

I

Idle mode

L

H

R

Read mode

L

L

W

Wri1emode

WUSpin,
Ou1pUl Voltage

H

L

Ou1put of the following conditions is oocurad

L

L

W

•
•
•
•
•
•

WDI pin, input frequency 1WOI =OMHz
VCT pin is open
WC pin is open
Head input pins are open
Both ends 01 head input pins are shor1ed
Head input pin end VCT pin are shor1ed

H

Note: H: High lewl
L : Low level

6-61

MB4115
MB4116
MB4125
MB4126

RECOMMENDED OPERATING CONDITIONS
Parameter

Valua

Symbol

Unit

VCCl

4.510 5.5

V

VCC2

10.810 13.2

V

Write Current

Iw

8to30

mA

Operating Temperature

TA

010 70

·C

Power Supply Voltage

ELECTRICAL CHARACTERISTICS
(VCC1

= 5V ± 10%, VCC2 = 12V±10%, TA = 2S·C, unless otherwise noted.)
Value

Parameter

Symbol

Condillon

I

Moo.;

Min

I

Typ

I

Unit
Max

Power Section

VCCl Power Supply Current

V CC2 Power Supply Current

Power Dissipation

Symbol

I

16

24

mA

I CC1R

R

14

23

rnA

I CC1W

W

20

30

mA

I CC21

I

12

22

mA

I CC2R

R

28

38

mA

I CC2W

W

12+ Iw

12+ Iw

mA

POI

I

220

400

mW

P OR

R

410

600

mW

W

600

830

mW

W

500

700

mW

I CCll

P owo

I w =30mA

P OWI

(1/2W) is placed between V CC2

I w = 3OmA. ResislOr 1200
pin and RCT pin

"Note

6-62

I
Idle
R Read
W Write

MB4115
MB4116
MB4125
MB4126

ELECTRICAL CHARACTERISTICS (Continued)
(V eel =5V ± 10%, V cc2 =12V± 10%, T A =25 DC , unless otherwise noted.)
Value
Parameter

Symbol

Condition

I

Mode

Min

I

Typ

I

Unit
Max

Power Supply Monitor Section

VCCI Detection Voltage

When VCCI is falling

RIW

3.45

3.90

4.30

V

When VCCI is rising

RIW

3.55

4.10

4.46

V

V THI

VCCI Detection Voltage
Hysteresis Width

l!.v

V CC2 Detection Voltage

V TH2

RIW

THI

RIW

7.50

8.80

10.10

V

When VCC2 is rising

RIW

7.90

9.30

10.50

V

RIW

/J.V TH2

0< VCC1 S 5.5V
I WOFI

V

When VCC2 is falling

V CC2 Detection Voltage
Hysteresis Width

0.2

0< VCC2 s 13.2V

V

0.5

IIR

-100

W

-100

tOO

Head Input Current
0< VCC1 < 3.45V
I WOF2

0< VCC2 < 7.5OV

100

""
""

Digital Section
High-ievellnput Voltage

2.0

VCC1

V

V IH

T A = 0 to lODC

High-level Input Current

IIH

V IH = 2.0V

low-levellnput Voltage

V IH

T A =Oto 70 DC

-0.3

low-levellnput Current

I IL

V IL = 0.8V

-400

ReadlWrite Transition TIme

tAW

Read to Write

600

Write/Read Transition TIme

tWA

Write to Read

600

ns

t IA

Idle to Read

t IW

1000

ns

Idle to Write
1000

ns

Chip Selection Transition TIme

Head Selection Delay TIme

Notes:

t dH

+0.3
100
0.8

""
V

""
ns

I
Idle
R Read
W Write

6-63

MB4115
MB4116
MB4125
MB4126

ELECTRICAL CHARACTERISTICS (Continued)
(V cc1

=SV

± 10%, V cc2

= 12V± 10%, T A =2S·C , unless otherwise noted.)
Value

Parameter

Symbol

Condition
Min

I

Typ

I

Unit
Max

Read Section
V IN = lmv i>"P
Differential Voltage Gain

Go

liN = 300kHz

80

100

30

50

120

VN

R L = lkn
~B

Frequency

Bandwidth

BW

V IN =lm V i>"P

MHz

R L = lkn

Input Equivalent Noise

V N

BW = lMHz to 10MHz

Input Capacitance

C I

R L = lkn

Dynamic Range

D

Input Bias Current

I HR

Common mode Output Voltage

V RDX
V RDY

Head input pins are shorted with VCT pin

5.0

Output Offset Voltage

VOFF

Head input pins are shorted with VCT pin

-400

Common mode Rejection Ratio

CMRR

Power Supply Rejection Ratio

PSRR

Channel Separation

CSP

Differential Input Resistance

RI

liN =5MHz

liN =5MHz
3rd Harmonic wave: - 30dB

1.4

2.0

16

23

nV

{Hz

pF

mV

6

12

45

Il A

6.0

7.0

V

400

mV

liN = 5MHz
V IN = 100m V i>"P

liN =5MHz
V IN = 100m V i>"P
liN =5MHz

Single-end Output Resistance

6-64

Ro

V IN = 100m V i>"P

50

65

dB

45

70

dB

45

55

dB

MB4115

2

kn

MB4116

0.4

kn

liN =5MHz

liN =5MHz

18

50

n

MB4115
MB4116
MB4125
MB4126

ELECTRICAL CHARACTERISTICS (Continued)
(V cc1 =5V ± 10%, V cc2 =12V± 10%, T A =25°C, unless otherwise noted.)
Valua
Parametar

Symbol

Condition
Min

I

Typ

I

Unit
Max

Read Section
Write Current Constant

Write Current Transition Time

K
t,
t t

Write Current Delay Time

tpdl
tpd2

I W = t2mA

112

120

L=OI1 H·

I W =30mA

L=OI1 H

I W =30mA

128

V

25

ns

30

ns

2

ns

L=OI1 H

I W =30mA

Write Current Differential
Delay Time

&tpd

Output Voltage Amplitude

&V H

Damping Resistance

RD

&tpd

=

I tpd1-tpd2 I
V

5.7
MB4125
525

750

975

0.1

0.5

V

0.1

100

~

11

MB4126

Write Abnormal Detector Section
I W = 10mA, R D = 75011
f WDI = 2.5MHz, L = 10 ~

WUS pin, Output Voltage

V USl

WUS pin, Output Voltage

IOH

Write Unsafe Delay Time 1

t dSF

Unsafe to Safe
L=10 ~
I W = 8mA, R D = 75011
F WDI = 0 to 2.0MHz

0.06

1.00

I1s

t dUS

Sale to Unsafe
L= 10l1H
I W =30mA, R D = 75011
I WDI =5toOMHz

5

8

I1 s

Write Unsafe Delay Time 2

L

= 10 I1H,

RD = 75011

I W = 3OmA,V DH = 5.0V

6-65

MB4115
MB4116
MB4125
MB4126

TIMING CHART
1 ReadlWrlte Transition Time ,Chip Select Transition Time (Idle to Write)

VIH~ __

CS

V L

WIR

v IL

-- ""SO%"

t}.--: --

V IH

lAW

50%

Ilw ....

2. Write/Read transition Time, Chip Select Transition Time (Idle Write)
V IH

VIL~ __
V IH

wiR

V IL

_ _ _ _-'1

50%

ROX
ROY

90"10

3. Head Select Transition Time
HSO
HSI
HS2

50%

50%

HOX,HOY
-10%

H 7X, H7Y

4. Wlte Unsafe Delay Time 1, Write Unsafe Delay Time 2

5. Write Current Transition Time, Write Current Delay Time
WOI-----,

J

50%

50%

~

90%

~

50%

Iw

10%

Ipdl ...... _~lr

6-66

90%
50%
10%

I
-po<

. . ~i4-lt

MB4115
MB4116
MB4125
MB4126

APPLICATION
(1 ) Treatment of GND pin
It's recommended to ground three ground pins with common ground.lf it is imposasible, please connect main-ilroundwith ground at least.
( 2 ) Reduse power dissipation
When an external resistor 120 Q (1/2W) is placed between RCT pin and V CC2
Reduced power P ~I w 2 x 120 (w)

pin, power dissipation is reduced shown below.

( 3 ) Setting write current
Write current I w is set by an external resistor R we . Write current is formulated;
I w ~ KI R we (A) (Ajustable current range is 8 to 3OmA)
External resistor shour1d be located near IC.
( 4 ) Damping resistor
The device is intended to be used a head which has inductance of 5 to 15 I'H.
Thus, please use the damping resistor between 500 to 2k Q .
Also, write current and impedance should be meet the following formula.
I w (mA) x L( I'H ) ~ 200

Fig. 2 - APPLICATION EXAMPLE

HOX
HOY
HIX

D

GND
MRO
CS

Chip Select
ReadlWrite

RiW
H1Y
H2X
H2Y
H3X

WC
Rwe
Read Data

ROY
O.II'F

Read Data

RDX
O.II'F

H3Y
H4X
H4Y
H5X
H5Y
H6X

HSO

Head Select

HSI

Head Select

HS2

Head Select

Vee,

+5V
2kQ

GND
WDI

H6Y
H7X

WUS
VCC2

Write Data
Write Unsafe
+12V

H7Y
GND
VCT

RCT

6-67

MB4115
MB4116
MB4125
MB4126

INPUT/OUTPUT CIRCUIT CONFIGURATION
FIG.3 - CS pin, RIW pin, HSO to HS2 pins

FIG. 4 - RCT pin, VCT pin

v CCl
ReT~
e~

veT~

RIW

HSO
HSl
HS2

FIG. 5 - WC pin

we

FIG. 6 - WUS pin

0---t---.NVv--L

FIG. 7 - WOI pin

FIG. 8 - ROX pin, ROY pin

ROX
ROY 0 - - 1 - - - - - 1 - - - 1

FIG. 9 - HOX to H7X pins, HOY to H7Y pins
HOX to H7X
HOY to H7Y 0----1---+---+----,

6-68

MB4115
MB4116
MB4125
MB4126

TYPICAL CHARACTERISTICS CURVES
Flg.10 - WRITE CURRENTE vs.
POWER SUPPLR VOLTAGE

Flg.11- WRITE CURRENTE vs.
POWER SUPPLR VOLTAGE

16
_

16

14

14

.5.

12

~ 12

!z

10

e(

~

~

.

~

i3
~

_

~

10
8

~

I~

t

6

!zw
i3

f- 4

a:

RWC- lOkn

aj 2s"C I

;: 2

-r

POWER SUPPLY VOLTAGE V CCl (V)

140

K-RWcxIW

f-

VCC1- sv
'tc:!-'2V
Ta -25"C

8

-

6.

2

1~

'\

W

~
o
~

a:
a:

10
VCC1- 5V

a:

110

~

;: 5

t-- VCC2- 12V

14

lk

~

WRITE CURRENT I w (rnA)

""

Ta-i"C

~

20

12

I'-

~

a:

Z
W

10

10

Flg.13- WRITE CURRENTE vs.
WRITE CURRENTE SETTING RESISOR

-20
fZ

f-12O

5

-,

50

~

~'~

,

Rwe- 10kn
_ r._25"C

POWER SUPPLY VOLTAGE V CC2 (V)

I

~

_ VCC2 - sv

o
o

0123456

Flg.12 - WRITE CURRENTE CONSTANT vs.
POWER SUPPLR VOLTAGE

t

6

W

vCC2- 12V

2k

10k

5k

20k

WRITE CURRENT SETTING RESISTOR R we (n)

Flg.14 - WRITE CURRENTE CONSTANT vs.
TEMPERATURE

Fig.15 -

WRITE UNSAFE DELAY TIME vs.
WRITE CURRENTE

co 6

140

~

:i.

I _lJn
we
VCC1- sv
VCC2-12V R

f-

~'30

3s

JV

~

~4
;:::

8

~

f-12O
Z
W

a:

o

:>

L1.

0110

UIi

3

I

/
1WDI- S -40MHz
VCC1- 5V
VCC2 -12V

W 2

II:

~
a:

L- 1O I1H
RD _75On

:5w '

;:

!::
o

a:

10

20

3(.

20

TEMPERATURE T A

40

50

(0 C

)

60

;:

-

-

Ta- 25'"C

0

10

20

30

40

50

WRITE CURRENT I w (rnA)

6-69

MB4115
MB4116
MB4125
MB4126

TYPICAL CHARACTERISTICS CURVES (Continued)
Flg.16 - READ OUTPUT VOLTAGE vs.
READ INPUT VOLTAGE

~ 3000 . . . - - - , - - - , . - - - - , - - - ,

Flg.17 - DIFFERENTIAL VOLTAGE GAIN vs.

ClO

VCC1· 5V

§

"cc2. ,2V

~

~ rooo ~---4-----b~--+-~

~

r---~~---r----+-~

90

~

so

~

70

!Z
W

i1i

LL
LL

..I.--_-J,..............J

0 IL-_....I._ _

Z5

0
10
20
30
READINPUTVOLTAGE V IN (mVJ>-9)

II:

~

0

\,

W

~--9

~

"cc2. ,2V

...J

W-4

~

iii
II:

W

r"r I

~

OC

lOOk 200ft

500k

30

40

50

60
(

70

~

800
800

400

""

"" '"

200

o
1M

2M

5M

10M 20M

FREQUENCY f (Hz)

5OM100M

80

DC)

1200

a.o ,_

15

VCC1· 5V

fo-

20

1400

o

CI

10

Flg.19 - POWER DERATING CURVE

FREQUENCY

~

0

TEMPERATURE T A

Flg.18 - DIFFERENTIAL VOLTAGE GAIN vs.

6-70

-

100

...J

5c

~
15

VCC1· 5V

"cc2~ 12V
"IN • ,mV J>-9

110

~
~
~

!!:

LL

120

W

~

5 ,_

I

fiN - 300kHz

Z

T a -25CC

CI

II:

I

tiN • 300kHz

E

CI
Z

TEMPERATURE

1il 130
"0

>

o

20
40
60
TEMPERATURE T

A (

so
100
DC)

MB4115
MB4116
MB4125
MB4126

PACKAGE DIMENSIONS
34-LEAD PLASTIC FLAT PACKAGE
(Case No.: FPT-34P-M01)

rn

.110(2.BO) MAX

SEATED HEIGHT)

.002(0.05) MIN
(STANO OFF)

iDe1ai'~Of"A-'-;'rti
"A"

I

.00810.201

1
1

i
.630(16.00) REF

1

I
1
.024(0.60)

:

I

.OO~!~ lS}

I

.025(0.63):
y~"- _ _.J

L:: ____

I

DI""""'1ona1n

1_ (mllI_)

.,989 FUJITSU LIMITED F34(]01S-3C

34-LEAD PLASTIC FLAT PACKAGE
(Case No.: FPT-34P-M02)
110(2.80) MAX
(SEATED HEIGHT)

f--- 699+ 008 117 75+020I_--j

I

-012

-030

I

.002 (0.05) MIN
(STAND OFF)

IR~

---1

-1

402± 016
(1020±040)

.299±.OOS
(7.60±O.20)

~

I
I

.362±.012
(9.20 ± 0.301

'"l8'~~1
.OO6±.OO2

.016±.004
(O.40±O.10)
.630(16.00) REF

(O.15±O.05)

I Detaii;" Of '~':-pa;tl
I

.02SI0.53)

1

MAX
.00710.181
MAX
.024(0.60)

I
I
j

I

I

I

1

1

I

.008(0.20)

L _________ J
.,989 FUJITSU LIMITED F34002S-1C

I

I
I
I

I

OiIT8f1Siona In
(mlll_)

1_

6-71

Disk Drivers

6-72

Linear Data Book

MB
MB
MB
MB

4117-4
4117-6
4118-4
4118-6
March 1987

Edition 2.0

MAGNETIC DISK HEAD AMPLIFIER
The Fujitsu MB 4117-4 and MB 4118-4 are magnetic disk head amplifiers
with Zener-zapped write current sourse for 4-channel head, MB 4117-6 and
M B 4118-6 for 6-channel.
Their logic interface level is TTL level and their packages are suitable for
mounting directly on the arm of movable disk head.
MB 4118 has on-chip dumping resistors for each channel.

•

Four major functions to interface with magnetic heads: Write Amplifier/
Read Amplifier/RAS (safety)/Selection Decode

•

Three modes: Read/Write/ldel

•

Power Supply Voltage: +5 V and +12 V

•

Logic interface level: TTL compatible

•

On-chip Zener-zapped write current source.
Its current can be adjustable with external resistor.

•

On-chip dumping resistors (MB 4118 only)

(MB 4117-4/MB 4118-4)
CERAMIC PACKAGE
FPT-24C-F01
DIP-22P-M03: See Page 8
FPT-24P-M02: See Page 9

(MB 4117-6/MB 4118-6)
PLASTIC PACKAGE
DIP-28P-M02
FPT-28C-A01: See Page I I
PIN ASSIGNMENT
MII4117~IM841'8",

CD
GND

"SO

"OX
V"

RCT

"OX

H"

R/W

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Rating

Symbol

Value

Unit

Supply Voltage

V 12

14.0

V

Supply Voltage

Vs

6.0

V

Operati ng Ambient Temperature

TA

o to +70

'c

T STG

-65 to +150

'c

Storage Temperature

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

DIP-22P-M03: See Page 8
FPT-24P-M02: Sao Page 9
FPT-28C-A01: See Page I I
This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedance
circuit.

6-73

111111111111111111~lllllllllllllmllm~mllllll
FUJITSU
1IIIIIIIIIIIIIIIIIIIIIIIIIIIImllllllllillmlllili

== 2n~::
== 2111::

Fig. 1 - BLOCK DIAGRAM OF MB 4117/MB 4118
RCT

VCT

WUS

CDC>----l

R/W

RDX

HOX
HOV

RDV
DIFFERENTIAL
READ
AMPLIFIERS
AND
WRITE
CURRENT
SWITCHES

WDI

HSO
HSI
HS2'

H2X
H2V
H3X
H3V

16 CHANNELS)
H4X'
H4V'

MODE SELECT
CD
RfW
H
L
H
L
L
NOTE) H: High Level
L: Low Level

HIX
HIV

Mode
Idel
Read

H5X'
H5V'

Write
0

WC

NOTE:'Only for MB 4117-6/MB 4118·6

HEAD SELECTION TABLE FOR MB 4117-4/MB 4118-4
Heed No.

HSO

HSI

0

Low

Low

1

High

Low

2

Low

High

3

High

High

HEAD SELECTION TABLE FOR MB 4117-6/MB 4118-6
Head No.

0
1
2
3
4
5

6-74

HSO

HSI

HS2

Low

Low

Low

High

Low

Low

Low

High

Low

High

High

Low

Low

Low

High

High

Low

High

MB 4117-4 11~111~111~lllmllllmmll~~~~I~III~~1111
MB 4117-6 FUJITSU

== :n:::

1l l l ml ml l ml ml l l lml~lm lml l

RECOMMENDED OPERATING CONDITIONS
Value
Parameter

Symbol

Unit
Min

Typ

Max

Power Supply Voltage (Read/Write/ldel)

V ,2

10.8

12.0

13.2

V

Supply Voltage (Read/Write/ldel)

Vs

4.75

5.0

5.25

V

High-level Input Voltage

V IH

2.0

Vs+0.3

V

Low-level Input Voltage

V IL

-0.3

0.8

V

DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted.1
Value
Parameter

Power Supply
Current

CD Input
Current

RIW Input
Current

HS Input
Current

WDllnput
Current

HEAD Input
Current

Symbol

Unit

Condition
Mode*

Min

151

I

1,21

Typ

Max

-

17

28

I

-

17

28

ISR

R

-

14

25

1'2R

R

-

34

50

Isw

W

-

20

30

1,2W

W

20+l w

-

0.1

mA

IcoH

Vco=2.0V

I

-

ICOL

Vco=0.8V

RIW

-0.4

-0.2

-

I R/WH

V RIW = 2.0 V

I/R

-

-

0.1

I R/WL

V RIW = 0.8 V

IIW

-0.4

-0.2

-

I HSH

VHSO.HSO.(HS2) = 2.0 V

I/RIW

-

-

0.1

I HSL

VHSO.HS1.(HS2) = 0.8 V

I/R/W

-0.4

-0.2

-

I WOIH

VWOI = 2.0 V

I/RIW

-

-

0.1

I WOIL

V WOI = 0.8 V

I/R/W

-0.4

-0.2

-

IHI

Vco=2.0V

I

-

-

0.1

mA

IHR

V RIW = 2.0 V

R

-

25

45

IJA

30+l w

mA

mA

mA

mA

NOTE: *1: Idle. R: Read, W: Write

6-75

~~IIIIIIIIIIIIIIIII~IIIIIIIIIIIIIIIIIIIIIIIIIIIII MB 4117-4
FUJITSU MB 4117-6
1111111111111111111111111111111111111111111111111111

== :nt:

READ MODE
(Recommended operating condition unless otherwise noted.)
Value
Parameter

Symbol

Condition

Unit
Min

Typ

Max
120

V!V

Differential Voltage
Gain

Av

V 1N = 1 mV pp , f = 300 kHz
RL = 1 kG

80

100

8and Width

Bw

V 1N = 1 mV pp , RL = 1 kG (-3 dB)

30

-

-

MHz

Input Noise Voltage

Vn

TA = 25°C,
Bw = 1 to 10 MHz

-

-

5.4

/.IV,m.

Input Capacitance

CI

f = 5 MHz

-

-

23

pF

Differential Input
Registance

MB4117

2

-

-

kG

Ro
MB4118

525

750

975

G

Single· End Output
Registance

Ro

-

-

100

G

5.0

-

7.0

V

-480

-

+480

mV

6

-

-

mV pp

50

-

-

dB

Rox,Rov
Output Voltage

f = 5 MHz

V RoX
V RoV

Output Offset
Voltage

V OFF

Dynamic Range

0

Common Mode
Rejection Ratio

CMRR

Channel Separation

CSP

f = 300 kHz, V 1N = 1 mV pp

45

-

-

d8

PSRRl

f = 5 MHz, V5 = 100 mV pp

45

-

-

dB

PSRR2

f = 5 MHz, V'2 = 100 mV pp

45

-

-

dB

Power Supply
Rejection Ratio

6-76

f = 5 MHz
f = 5 MHz, V 1N = 100 mV pp

MB
MB
MB
MB

4117-4
4117-6
4118-4
4118-6

WRITE MODE
(Recommended operating condition unless otherwise noted.)
Value
Parameter

Symbol

Condition

Unit
Min

Write Current

Plastic

8

30

Ceramic

8

50

mA

K*

Iw = 18mA, K= Iw x Rwe

Head Differential
Voltage

V 01F

l = 10 IlH, Iw

Write Unsafe
Switching Output
Voltage

V USL

L = 101lH, Iw =8 mA
fwol =2.5 MHz, Ius =8 mA

Write Current
Transition Time

t,
tf

l = OIlH, Iw

Write Unsafe
Switching Delay Time

tus

L = 10 IlH, Iw =50 mA
fwol =5.0 MHz to 0 MHz

=Iw x

Max

Iw

Write Current
Constant

NOTE: * K

Typ

=45 mA

128

140

6

8

=45 mA
1.0

152

V

V

0.5

V

20

ns

8.0

lIS

Awe (External resistor setting write current.J

6-77

Fig. 2 - MEASUREMENT CIRCUIT (MB 411741
12V

.J.

~

~

10l'H

~)~n

+.

~~

10jtH

6~~~

10l'H
..AlA.

,IV

yyy

6BOn

6aon

10l'H

H.

6~~'n

J.

-II<'

V12

RCT

VCT

HOX

HOY

H1X

H1Y

H2X

H2Y

H3X

H3Y

V5

GNO

CO

R/W

WOI

HSO

HSl

WC

WUS

ROX

ROY

lkn

Rwc

=

~
5V 77

7

t"f'
lkn

5V

F

lkn

MEASUREMENT CONDITIONS
Parameter

Symbol

Value

Condition

12 ± 0.24

V 12
ReadiWritelidle mode

Power Supply Voltage

V
5

V5

Inductance of Magnetic Head

CO Voltage

RiW Voltage

HS Voltage

LH

± 0.1

OC

0

AC

10

ReadIWrite mode

/lH

ReadiWrite mode

0.2 ± 0.2

Idle mode

3.3 to 5.0

Write/Idle mode

0.2 ± 0.2

Read/Idle mode

3.3 to 5.0

V

Vco

V RIW

V HSO

Unit

V

0.2 ± 0.2
ReadiWrite/ldle mode

V HS1
'
(HS21

V
3.3 to 5.0
0.2 ± 0.2

WOI Voltage

VW01

ReadiWritelidle mode

V
3.3 to 5.0

Ambient Temperature

6~78

TA

ReadiWritelldle mode

25 ± 2.0

·C

:=

2n~-:

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII!

:= 2111:: Ilml ml l l~l l l ml ~l l l l l ml lml m
- • Fl1JITSU

PACKAGE DIMENSIONS (MB 4117 -41MB 4118-4)
24-PAD CERAMIC (FRIT SEAL) FLAT PACKAGE
(CASE No. : FPT·24C·F01)

INDE~,,~

D

~

n

I

.270±.010
IS.8Sr251

.900122:86ITYP

.

I
I I
315+. 085 I
-.043

i

2 . ,6 1!
18. 00+-1.09

.05011.271
TYP

I

I- ---l

.017±.003
10.43±0.081
.550113.97)TYPE
.398±.008
110.11±0.201

10.127

~~:~:I

-

1--.10012.54IMAX

Dimensions in
inches (millimeters)

<01987 FUJITSU LIMITED F24002S·2C

6-79

IMllllllllllllllllllmlllllll! MB 4117-4
FUJITSU

IOOII~m~~lmllmllll~ilmlllllll

MB 4117-6

== :n:::

PACKAGE DIMENSIONS (MB 4117 -41MB 4118-4)
PIN ASSIGNMENT

DIP·22P·M03

22·LEAD PLASTIC DUAL IN·LINE PACKAGE
(CASE No.: DIP·22P·M03)

INDEX·!
INDEX·2



6-82

1987 FUJITSU LIMITEOF28011S·2C

Dimensions in

inches (millimeters)

== :n~::
== :n:::

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIilllllllillmlili

FUJITSU
111111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS (MB 4117 -61MB 4118-6)
PIN ASSIGNMENT
"SO
CD

Il===
RCT
.~V"
H"
H,X

R/W
WC

NC

RDX

FPT·28C·A01

28·LEAD CERAMIC (FRIT SEAL) FLAT PACKAGE
(CASE No.: FPT·28C·AOll

.3001.050
(7.62±1.27)

INDEX AREA

\f-

l,~"

D

TYP

.380±.008

~0.20)

-ir

.300 •. 050

I
I
.050(1.27)

I

5.60)

MI N

.500±.010
(12.70.0.25)

(7. 62

k-J

.017::~~; (O.43:~:~~)

.650 •. 005
(16.51'0.13)
.720'.010
(18.29'0.25)
© 1987 FUJITSU LIMITED F28009S-2C

II

27 )

-.j

.00810.20)
MIN

.11012.79)
MAX
Dimensions in
inches (millimeters)

6-83

Disk Drivers

6-84

Linear Data Book

cO

April 1990
Edition 1.0

FUJITSU

PRODUCT PROFILE

MB4313
Read/Write Bus Driver/Receiver
DESCRIPTION
The Fujitsu MB4313 is designed as a driver/receiver to be used as an interface
between a magnetic disk drive and a control un~. The MB4313 transfers the read-out
signalfrom the disk head to the control un~, and the write signalfrom the control un~ to
the disk head.

FEATURES
•
•
•
•

ECl compatible input signals
Propagation delay time 12 ns maximum
RiselFal! time 8 ns maximum
Single -5.2 V supply

RECOMMENDED OPERATING CONDITIONS
Value
Parameter

CondHlons

Symbol

TA=O°C
Input Volt~e
Pins 1.3,1 ,16

TA-25°C

VIN

TA=70oC
Input Current
Plns2,15

Unit

-1.87

-U6

V

-0.85

-0.81

V

-1.825

-0.7

V

13

mA

Typ.

IN

Output Current
Pins 4,5,12,13

lOUT

Supply Voltage

VEE

-5.46

Operating
Temperature

TA

0

-5.2

D

DIP-16C-C02

Max.

Min.

Pin Assignment
(Top View)

IN4

18

INS

15

IN2

IN5

14

INt

5

mA

-4.94

V

OUTS

+70

°C

OUTS

13

OUT1

12

OUT2

OUT7

11

OUT3

OUTB

lQ

OUT4

GND

Note: Permanent device damage may occur if absolute maximum ratings are
exceeded. Functional operation should be restricted to the cond~ions as
detailed in the operation sections of this data sheet. Exposure to absolute
maximum rating cond~ions for extended periods may affect device reliability.

IN3

4

VEE

This device oontains circuitry 10 pro1ect the
inputs against damage due 10 high static voltages or electric fields. However, it is advised the
normal precautions be taken 10 avoid applicatior
of any voltage higher than maximum rated
voltages to this high impedance circuit

Copywrlle © 1980 by FWITSU LIMITED and Fujitsu M _ , 1 n c

6-85

MB4313
BLOCK DIAGRAM
INI

OUTI
OUT2

IN3

....

OUT3

~

Driver
IN4

-

IN2

-

IN5 -

Receiver
OUT4

LJ

n

OUT5
OUTS
OUT7

Driver

Receiver
OUTS

INS

ELECTRICAL CHARACTERISTICS
(VEE = -5.2V±5% at TA = 0 to 70°C. unless otherwise noted.)

DC CHARACTERISTICS
(Deviation: ± 2%)
Value at TA
Parameter

Conditions

Output VoRage

VIN1=VINs=VHmln.
VIN3=VHmax.
VIn4=VHmn

Symbol

VIN1=VIN4-VLmax.
VINS=VIN3-VHmn

Max.

Value at T"
Min.
-10

V05H

-10
-o.S
-o.S

-1.0
-1.0

V02H

-10

VOSH
V04H

-10

VOSH
V01l

-o.S
-o.S
-0.51
-1.32

-1.0
-1.0
-0.7

=0 to 70°C

Typ.

Max.

Unit
mV
mV

-o.S
-0.6

V
V
mV
mV

-O.S
-o.S
-0.4
-1.0

V
V
V
V

Vra
V04l

-0.51

-1.S
-0.7

-0.4

V

-1.32

-1.S

-1.0

V

VOSl
Vrnl

-0.51
-1.32

-0.7

-0.4
-1.0

V
V

VIN1-VIN4=VHmax.

VOSl

-0.51

-1.S
-0.7

VlnS=VIN3·VLmax

Va

-1.32

-1.S

VIN1-VINO=VLmax•
VINS=VIN4- VHmIn
VIN1=VIN3-VHmln.
VINS=VIN4-Vlmax

6-86

=25±2°C

Typ.

V01H
VOOH
V07H

VIN1=VINS=VHmIn.
VIN3=VLmIn •
VIn4=VHmax

Min.

V03l

-0.4
-1.0

V
V

MB4313
DC CHARACTERISTICS (Continued)
Value at T" = 25±2°C
Parameter

CondHlons

lYP.

Value at T" = 0 to 70°C
Max.

Unit

input Current

V,N,=VHmax

lIN,

20

100

Input Current

V,NS=VHmax

IlNs

20

100

V,N3=VHmax•
VIN,=V,N4=VLmln

11N3

20

400

IlA
IlA
IlA

V,N4=VHmax
V'N,·V,N4=VLmin

11N4

20

400

IlA

1,N2.

10.1

12.1

rnA

110

rnA

R=430lli2%

Symbol

Min.

Max.

Min.

lYP·

8.5

11N6
Supply Current

VIN,-V,NS-VHmax.
VIN3-VHmax.V,N4-VLmax

72

lEE

AC CHARACTERISTICS
(Deviation: ± 2%)
Value at T"
Parameter
Propagation
Delay Time

Rise Time
Fall Time

CondHions
VIN,=V,NS=5Lmax.
V,N3-1.29V.
VIN4=V,NA.
Output Timing:
V02 .V04• V(}6.VO/J as
VOUTC•
VO"V03• Vas.Val as
VOUTC.

Symbol

=25±2°C

Value at T"

Max.

Unit

12

ns

I.t!

12

ns

t.J3

12
12

ns
ns

8

ns
ns

tt,

8
8

tf2

8

tr2

lYP·

Max.

Min.

=0 to 70°C

t.J,

I.J4
1"

Min.

lYP·

ns
ns

6-87

MB4313
Test Circuit Example

GND

GND

GND

VINI
R1

lIN!
11N2

VIN!

I

VIN4

IIN4

VIN5

11N5

3

IN1

OUT1

IN2

OUT2

IN3

OUT3

IN4

OUT4

VOl

R3

Voz
V03
Vo.
Vee

IINS

Vas
IN5

OUT5

IN6

OUT6

R2

V06
V07

OUT7

Ell

GND

R9

V06

OUTS

R10

Vee
NOTE:

R1.R2
R3thru R6
R7thru R10

Test Temperature
TA(OC)

6-88

Vee

4300±2%
510±20/0
1kO±20/0

Test Voltage

V_(V)

V_(V)

VI..mu (V)

VLnM(V)

VTH(V)

0

-Q.86

-1.155

-1.49

-1.87

-1.32

25

-Q.81

-1.105

-1.475

-1.85

-1.29

70

-Q.7

-1.035

-1.44

-1.825

-1.22

MB4313
TIMING CHART

less than 2 ns

less than 2 ns

VIN"

50%

--t-f----

20%
100 ns ±2% - - - '

80%

50%

VOU18

20%

80%
VOUTC

--+-4.-+--

50%

-w--- 20%

6-89

MB4313

PACKAGE DIMENSIONS
16-LEAD CERAMIC (CERDIP) DUAL IN-LINE PACKAGE
(DIP-16C-C02

! .268~:~~!
(6.81~~:~~)

~~~~~~~~~

1u-c:rL
l----.760+.028(1930+0.71)J
-.006

.

L.J U

I

-0.15------1

.200(S.08)MAX

.134±.014
(3.40±0.36)
.100±.010
«2.54±0.2S)

~--4-----~~~~~~~

.032±.012
(0.81 ±0.30)

.018~:gg~

(1.S2~g:Vg)
©FUJITSU LIMITED 1986 D16012S-3C

6-90

(o.46~g:~~)

Dimensions in
inches (millimeters)

MB4316
December 1987
Edition 1.0

DRIVER/RECEIVER FOR DISK HEAD AMPLIFIER
The Fujitsu MB4316 Is a driver/receiver designed for the MB4111/MB4112/MB4113 Disk
Head Amplifier.
• Data Inputs and Control Inpl.lts are CML level Inputs.
• On-chip Write Current Source Is adjustable by changing an external resistor.
• Bandwidth of Read Amplifier: 30 M Hz min.
•

16-pln Ceramic DIP Package (Suffix: -Z)

CERAMIC PACKAGE
DIP-16C-C02

PIN ASSIGNMENT

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Rating

Symbol

Value

Unit

VEE'

v

Output terminal voltage

Vce

Input voltage

VIN

Write Current

Iwe

a
-15.0 to a
a to 9.0
-5.0 to a
a to 60

Power Dissipation

Po

580

Operating Temperature

TA

o to 70

°C

TSTG

-55 to 150

°C

Supply Voltage

Storage Temperature
NOTE:

VEE2

-7.0 to

VEE2

OUT

Gl
G2

OUT
RD

V

DY

V

WT

DX

V

WC

WD

mA

Rwe

WD

mW

GND

VEE'

Permanent device damage may occur If Absolute Maximum Ratings are
exceeded. Functional operation should be restricted to the conditions as
detailed In the operational sections of this data sheet. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

This device contains circuitry to protect the
Inputs against damage due to high static voltages
or electric fields. However, it is advised that
normal precautions be taken to avoid application
of any voltage higher than maximum rated
voltages to this high Impedance circuIt.

Copyright II 1987 by FUJITSU LIMITED and Fujitsu Microelectronics, Inc.

6-91

~~~mmlll~I~OO~~~I~I~IIIIII~mlllll
FUJITSU

111111~~I~mm~OOlllml~m~mm~I~I~1

MB4316

Fig. 1 - MB4316 BLOCK DIAGRAM

~
Rwo

RIl
REXT1 (Read/write Datll)

<)

A

VVV

DX~

() DY

¢

() Gl

Vee

I
G2

IlL

(Write Data)
WD

OUT

~ RL
(Read Data)

-

Receiver

vm 0

t- -0>-----.-OUT

L -____~----~

I

1

1m

Current
Source

WT

VEE2(

() Rwe
REXT2

0

WC

o

(

VEEl

.A,/\"v

li'T
VEE2

6-92

>

J"\

0
Driver

D

>
•

GND

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~IIIIII
FUJITSU

MB4316

111111111111111111111111111111111111111111111111111111

PIN DESCRIPTIONS
Table 1. Pin Functions
Pin Number
1

Symbol

Functions

VEE2

Power Supply (-12 V)

2

G1

Gain of output Amplifier (Receiver) Is specified with an External resistor between

3

G2

Gl and G2.

4

RWD

This Input specifies Data level in write mode.

5

WT

WC switch. When It is at CML low level, WC is active.

6

WC

Write Current Source Output

7

Rwe

Diagram).

8

GND

Ground

9

VEE'

Power Supply (-5.2 V)

10

WD

11

WD

Write Current Is specified with resistor between Rwe and VEE2 (See Block
(Iwe

12

DX

13

DY

14

RD

~

5.4 V/REXT2)

Write Data, driven by complementary signal of CML level.

Data Bus
Read/Write mode Switch. When it is at CML low level, read mode Is selected, and
at high level, write mode Is selected.

15

OUT

16

OUT

Output for read data

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Value

Unit

VEE'

-5.2

+ 5%

V

VEE2

-12.0

+ 5%

V

Output Terminal Voltage

Vee

6.0

±

5%

V

External Resistance

REXT'

700

± 2%

n

Supply Voltage

6-93

111~1111111111111~lllllllllmllllllllllllll~111111
FUJITSU

IIIIIIIIIIIIIIIIIIII~IIIIIIIIIIIIIIIIIII~IIII~IIII

MB4316

ELECTRICAL CHARACTERISTICS
(VEEI

= -5.2

V. VEE2

Parameter

= -12.0 V.

TA

Symbol

= 25°C)

Conditions

Max

Unit

65

mA

15

mA

-

10

mA

-

-

0.2

mA

0.9

mA

-

0.9

mA

-

0.15

mA

Fig. 2

4.9

5.4

5.9

V

Fig. 2

-0.59

-

-0.45

V

Fig. 2

-0.75

-

-0.61

V

VDYH

Fig. 2

-0.59

-

-0.45

V

VDYL

Fig. 2

-0.75

-

-0.61

V

"Ao
IIWD
"WD

"Wi'
Output Voltage

Typ

-

IEE2R

VEE1 = -5.46 V. VeE2 = -12.6 V

IEE2W

Input Current

Min

-

Fig. 2

IEE1
Supply Current

Measurement
Diagram

Fig. 2
Fig. 2

VEE1 = VA5 = -0.81 V. VWf =
-5.46 V -1.71 VI
VWD = -0.81 V

Fig. 2

VW5 = -0.81 V
VEE2 =
-12.6 V VRD=-1.71, VWT=-0.81 V

Fia.2

I

Vwc

VA5 = -0.89 V,

VDXH

VRlS = -0.96 V

VDXL

Fig. 2

VWT = -1.75 V
VW5 = -0.96 V

VWr = -1.65 V

Fig. 2

VWD = -0.96 V
VWD = -0.96 V

OX, DY Differential
Output Voltage

IVxyl

IVDX- VDvl

Fig. 2

160

-

-

mV

Voltage Gain

Av

VI = 100mVpp, f = 5 MHz

Fig. 3

0.95

1.1

1.25

VIV

BW

Fig. 3

30

-

-

MHz

tPLH1

Fig. 4

-

-

350

ns

Fig. 4

-

-

100

ns

Fig. 5

-

-

200

ns

Fig. 5

-

-

100

ns

Band Width

Wf-+ RWC

tPHL1
Delay Time
tPLH2
tPHL2

6-94

RI:i -+

OX, DY

111111111111111111111111111111111111111111111111111111

FUJITSU

MB4316

I I I~I I I I I I I I I I I I I I I I I I I I I I I I

TEST CIRCUIT
Fig. 2

Fig. 3

Vee
+6.0 V

VEE2
-12.0 V
IEE2t

+6.0V

-12.0 V
1200

1200
16
2

15

3

14

7000

VWf

1800

2000

1800

VRD

4

13

5

12

6

11

VWo

7

10

VWD

8

9

7000

13

5

12

,oo£J
0.331lF

0.331lF

1000

-0.89 V

,,! n1" n~

6
-0.6 V

~

0,"

7
8

VEE2
-12.0 V

-1. 75 V

14
4

9

IEE1
-12.0 V

VEE1
-5.2 V

-5.2 V

DI

f = 5 MHz

V
VI = 100 mVp .p Av =--2
VI

Fig. 4
+6.0 V

WT

-12.0 V
1200
16
15 . - - - - - "

3

14

4

131--~~:=""-

5

I
tPLH1,.j 1+
I

I

-0.89 V

,.j ;.. - - - - -1.75 V
I tPHL1

12

RWC~~U70

'L-

-0.89 V

2000

6
7
8

I

~<5n.'

2

1800
7000

O%

50%
~

Input: { tP . R . R.: 1.5 MHz
r=t l =10ns

9

Oscilloscope
-12.0 V

-5.2V

6-95

I~IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~IIIIII
FUJITSU

1~111~111~I~OOI~~IIIIIIIIIIIIIIIIII~III~I~

MB4316

TEST CIRCUIT (Continued)
Fig. 5
+6.0 V
-12.0 V
120

n

16
2

15

3

14

4

13

5

12

6

11

7

10

8

9

BIAS
OUTPUT

VWD

n

200

VWf5
VWD

-12.0 V

I-----

-0.89V

I

-1.75 V

50%
50%
~

1m'

I

+t r+ tPLH2
(OY)~I

OX

tPHl2

~

r+

50%

I

6-96

-0.89 V

-1.75 V

OY

-1.75 V

-0.89 V

1 t { P.R.R.: 1.5 MHz
npu:
t,=t,=10ns

-5.2V

50%

I

VW5

OX

111111111111111111111111111111111111111111111111111111

FUJITSU

MB4316

111111111111111111111111111111111111111111111111111111

6-97

mmlll~lllllllllmll~IIIIII~IIIIIIIII~11111111
PUJITSU

111111~~lllllmllllllllllllll~IIIIII~I~111111111

MB4316

PACKAGE DIMENSIONS
16-LEAD CERAMIC (CERDIP) DUAL-IN-LINE PACKAGE
(CASE NO.: DIP-16C-C02)

.268

~ :g~

(6.81

~ g:~)

.311~:~

''--r-r-T-~'''''''-'---'--~""T''"T""''.~
(19.30

~

g: ~~ )

.I

.050(1.27)MAX

.200(S.08)MAX

.134 ± .014
(3.40 ± 0.36)

.032
(0.81

± .012
± 0.30)

.700(17.78)REF

+ ,002
Dimensions In
inches (millimeters)

6-98

.060

- .004

(1.52

~ g:~~)

D16012S-{lC

cO

March 1990
Edition 1.1

FUJITSU

PRODUCT PROFILE

MB4319
Peakhold Ie
DESCRIPTION
The MB4319 is designed to generate the head pos~ion signal for head control in a
magnetic disk unit similar to the one illustrated below. (See Figure 1.)
The MB4319 detects the peak of the servo signals that are read outfrom the servo disk
via the carrier amplHier and makes the discharge continuously proportional to the head
velocity. (See Figure 2.)

Figure 1. The MB4319 Disk Drive Application
Magnetic Head

Ceramic Package
DIP·16C-C05

D

Pin Assignment

VEE
VEE
(LSB) 0 8

Linear
Motor
Control

Clock

r

NLiNV
A. GND

07

VRB(-2V)

D.

VRM

05

VIN

04

VIN

03

VRT (OV)

O2

A.GND

(MSB)0 1

NMINV
D.GND

Control

Ae,12

VEE

Circuit

AGC Signal

rom:1 to 4

Copywr/le

D. GND

This device contains circuitry to protect the inputs against damage due to high static voltages
or electric fields. However, it is advised that normal precautions be taken to avoid application of
any voltage higher than maximum rated voltages
to this high impedance circuit

© 1990 by FUJrrsU LIMITED and Fu,itsu MlcroeIoctronlcs, Inc

6-99

MB4319

Figure 2. TIMING DIAGRAM

VCAR: CARRIER AMP

r-------------------------VH
VL
_ - - - - - VH
VL
0001
OV
EVEN2

OV

Figure 3. BLOCK DIAGRAM

~~----------------~
CARIE o--------------1P----i

1--------P----oOOOl

I - - - - + - - - P - - - - o EVEN1

1----+---.----00002

1 - - - - + - - - . - - - - 0 EVEN2
REG3 00---------------'
(For Discharge of Base Voltage)

VELOTY

S
O----------------,L::j
REGl

0-----------.. .

REG2cr------------~

6-100

MB4319

Operation Details for the MB4319
The MB4319 detects each peak olthe high frequency signal and selects the discharge constants externally. The MB4319 comprises
four peak-hold circuits in order to control each discharge constant equally.
CARIE, the sampled signal illustrated in Figure 5, has a peak-to-peak value of 9 V Max. The gate signals are negative logic and have a
270 ns window for positive peak. When the gate is closed, the falling constant a is determined by the function of VElOTY, R
R...,. and R.X12• VElOTY is negative voHagethat is proportional to the velocity olthe head. VElOTY has a range of 0 V through -6.0 V.
Example:

Charge rising constant

: 10 V/JJ.S

Discharge falling constant:
:
Condition : C." - 680 pF

~.13V/JJ.S
~.5V/JJ.S

at Vv - 0 V
at Vv - -5.5 V

As shown in Figure 1, the ODD and EVEN outputs should be buffered from the following stages by high impedance input amplifiers.

Figure 4. EQUIVALENT CIRCUIT

VG:>~rnITE
VCAR

_"!1__T

1<]1-__

CARIE

000

t----{ t-(-:r"-c- - - Voo
text

J;
Figure 5. TIMING DIAGRAM

Vee
VELOTY

T

VCAR

9Vp~

1

Vee

VG

VODD

_

- ,-

270ns

-F=====I

-----oV

6-101

MB4319

PIN ASSIGNMENT
(TOP VIEW)

r:-v-:-::- =
=
=
=

REG 1
VELOTY
~=

tDI:t'E2"
tD\T'E3

=
=

1
2
3
4
5

16
15
14
13
12

8

9

=
=
=
!~ =

:== ~
GNO

Vee
REG2
0001
EVENI
0002
EVEN2
REG3

=

VEE

Absolute Maximum Ratings (TA = 25°C, unless otherwise noted.)
Symbol

Rating

Unit

Supply Voltage

Vee

+15

V

Supply Voltage

VEE

-15

V

Power Dissipation

PD

580

mW

Operating Temparature

TDP

oIhru 70

°c

Storage Temperature

TSTG

.-Q51hru +150

°c

Input Voltage at CARIE

VCAR

.-Q.5Ihru +5.5

V

Input Voltage at GATE;;

VG

-O.5lhru +5.5

V

Input Voltage at VElOTY

Vv

VEE thru +3.0

V

Input Current at REG2

IREG2

1

mA

Input Current at REG3

IREG3

5

mA

Output load Current at 000112 & EVEN1I2

ILOAD

10

mA

Output load Current at REG 1

IREGl

1

mA

Parameter

6-102

MB4319

Operati ng Cond itions (TA = O°C thru +70°C, unless otherwise noted.)
Parameter

Symbol

Value

Min.

Typ.

Max.

Unit

Note

Supply Voltage

Vee

11.4

12.0

12.6

V

Supply Voltage

VEE

-12.6

-12.0

-11.4

V

Input Voltage at CARIE

VeAR

-4.5

-

+4.5

V

High·levellnput Voltage at GATEn

VGH

2.0

-

-

V

Low·level Input Voltage at GATEn

VGL

-

-

0.8

V

Input Voltage at VELOTY

Vv

-

+0.5

V

Input Current at REG2

IREG2

-

-

0.4

mA

Input Current at REG3

IREG3

-

-

2.5

mA

Output Current at 000112 & EVEN112

ILOAD

-

-

1

rnA

See Note

Output Current at REG1

IREG!

-

-

0.3

mA

Vv=-5.5 V,

-6.5

Rextl = 22kQ

Rext1 =22kQ
Note: ILOAD IS defined as Illustrated below.

Figure 6. ILOAD
MB4319

6-103

MB4319

Electrical Characteristics
DC CHARACTERISTICS

(Vee = +12 V, VEE = -12 V, Tolerance: ±2%, unless otherwise noted.)
(Vee

=+12 V ±5%, VEE =-12 V ±5% when TA =DOC thru 7DoC as a condition.)
Value
Parameter

Gate High Input Current

Symbol

IG1H,IG2H,
1G3H,IG4H

Gate Low Input Current

Condition

VGl =VG2 =VG3 =VG4 =2.0V,
TA =OOC 1hru 70°C, see Figure 1.

=VG2 =VG3 =VG4 =0.8 V,

Unit

Min.

Typ.

Max.

-

-

100

~

-1.8

-1.2

-0.6

mA

100

mA

IG1L,IG2L,

VGl

IG31.,IG4L

TA =25±2°C, see Figure 1.

CARl E Input Current

ICAR

VGl =VG2 =VG3 =VG4 =2.0 V,
TA =OOC thru 70°C, VCAR =+4.0 V,
see Figure 1.

-

CARl E Input Current

ICAR

=VG2 =VG3 =VG4 =2.0 V,
=-0.4 V,

-2.4

-1.5

-1.0

mA

VGl =VG2 = VG3 =VG4 =0.8 V,
TA =25 ±2°C, VCAR =+4.0 V,
see Figure 1.

-2.9

-2.0

-1.4

mA

= VG2 =VG3 =VG4 =0.8 V,

-7.1

-5.1

~.9

mA

VGl

-

TA =25 ±2"C, VCAR
see Figure 1.

CARIE Input Current

ICAR

CARIE Input Current

ICAR

VGl

TA =25 ±2°C, VCAR
see Figure 1.

=-4.0 V,

REG2 Input Voltage

AVREG2

IREG2 =45 ~, see Figure 2.

0.72

0.86

1.0

V

REG3 Input Voltage

AVREG3

IREG3 = 1.0 mA, see Figure 2.

1.0

1.5

2.1

V

VELOTY Input Current

IVEL

VVEL =-4.0 V, see Figure 1.

0.5

13

~

REG 1 Output Voltage

VREGI

VVEL =0 V, see Figure 1.

-

-

-11.4

V

REG 1 Output Voltage

VREGI

VVEL =-4.0 V, see Figure 1.

-8.8

--5.5

V

6-104

-8.0

MB4319

Electrical Characteristics (Continued)
Value
Parameter

Symbol

Condition

000112

VODOl

VGl = VG2 = VG3 = VG4 = 2.0 V,

EVEN1I2
Output Voltage

VOD02
VEVENl
VEVEN2

TA = 25 ±2°C, see Fig,,", 9.
VCAR = +4.0 V

000112

VODOl

VGl = VG2 = VG3 = VG4 = 2.0 V,

EVEN 112
Output Voltage

VOD02
VEVENl
VEVEN2

TA = 25 ±2°C, see Figure 9.
VCAR = +2.0 V

000112

VODOl

VGl = VG2 = VG3 = VG4 = 2.0 V,

EVEN 112
Output Voltage

VOD02
VEVENl
VEVEN2

TA = 25 ±2°C, see Figure 9.
VCAR = OV

000112

VODOl

VGl = VG2 = VG3 = VG4 = 2.0 V,

EVEN1/2
Output Vo~age

VOD02
VEVENl
VEVEN2

TA = 25 ±2°C, see Figure 9.
VCAR=-4.0V

000112

VODOl

VGl = VG2 = VG3 = VG4 = 0.8 V,

EVEN1I2
Output Voltage

VOD02
VEVENl
VEVEN2

TA = 25 ±2°C, see Figure 9.
VCAR = +4.0 V

000112

VODOl

VGl = VG2 = VG3 = VG4 = 0.8 V,

EVENl/2
Output Voltage

VOD02
VEVENl
VEVEN2

TA = 25 ±2°C, see Figure 9.
VCAR = +2.0 V

000112

VODDl

VGl = VG2 = VG3 = VG4 = 0.8 V,

EVENl/2
Output Voltage

VOD02
VEVENl
VEVEN2

TA = 25 ±2°C, see Figure 9.
VCAR = OV

000112

VODDl

VGl = VG2 = VG3 = VG4 = 0.8 V,

EVEN1I2
Output Vo~ge

VOOD2
VEVENl
VEVEN2

TA = 25 ±2°C, see Figure 9.
VCAR =-4.0V

000112

AVOUT

VGl = VG2 = VG3 = VG4 = 0.8 V,

EVEN1/2
Output Difference Voltage

000112
EVEN1/2

Unit

Min.

Typ.

Max.

-1.5

-1.2

-0.8

V

-1.5

-1.2

-0.8

V

-1.5

-1.2

-0.8

V

-1.5

-1.2

-0.8

V

4.0

4.3

4.6

V

2.0

2.3

2.6

V

0

0.3

0.6

V

-1.5

-1.2

-0.8

V

-

-

0.1

V

-10

-

10

rnA

VCAR = 2.0V, TA = 25 ±2°C
The max difference voltage in the
measurement of 000112 & EVENII2
Output Voltage, see Figure 9.
lOll

VGl = VG2 = VG3 = VG4 = 0.8 V,
VODOl = VOO02 = 2.0 V,
VEVENl = VEVEN2 = 2.0 V,
VCAR =OV
Rml = ROX12: Open
TA = 25 ±2°C, see Figure 10.

6-105

MB4319

Electrical Characteristics
AC CHARACTERISTICS
(Vee

=+12 V, VEE =-12 V, Tolerance: ±2%, unless othelWlse noted.)

(Vee = +12 V ±5%, VEE = -12 V ±5% when TA = O°C thru 70OC)
Parameter

Symbol

Condition

ns

-

190

300

ns

Val = VG:l. = VGtl = VG4 = 0.8 V,
see Figure. 11, VVEL = 0 V

SO

90

180

~

VGl = VG:l. = VGtl = VG4 = 0.8 V,
see Figure 11, VVEL = -4 ±0.1 V

7

12.5

25

~

Change of VEVENI when
VCAR = +4.0 V, VG:l. = 0.3 V, and
Val, Va., and VG4 are changed from
2.0 V to 0.3 V at the same time.
See Figure 11.

-

0.2

V

Rising Time of VooonJ

tarOl, tar02,
tarEl,larE2

\101, \102,

Falling Time of VODDni

\101, \102,

EVENn

bEl, bE2

Channel Separation

/:;'VOfJ

6-106

Unit

SOO

VCAR = 4 .±O.l V, VvEL = -4 .t.O.l V,
TA = 25 +2°C, see Figure 11.

bEl, bE2

Max

350

Itol, 1r02,

IrEl,lrE2

Falling Time of VODOnl
EVENn

Typ

-

Rising Time of VooonJ
EVENn when Van is ON

EVENn when step input
is input at YeAR

Value
Min

Val = VG:l. = VGtl = VG4 = 0.3V .±O.l V,
VVEL = -4 ±0.1 V, TA = 25 ±2°C
see Figure 11.

-

MB4319

Figure 7

VG1
VG2
VG3
VG4
VCAR
VTEL

IG1
IG2
IG3
1G4
ICAR
ITEL

---

--

Vee

GJcrEf

0001

~

EVENI

G)qE3

0002

Gi\TE4"

EVEN2

CARIE

REGI

Figure 8

VREG1

VELOTY
Vee

REG2
REG3

GJcrEf

0001

~

EVENI

mcrE3"

0002

"GJ\TE4

EVEN2

CARIE

REGI

D

VELOTY

IREG2=45mA

REG2
REG3

Figure 9

VEE VEE

Vee

VG1
VG2
VG3
VG4

IG1
1G2
1G3
I

VCAR

GlJ.TEr

0001

VOl101

mcrE2

EVEN 1

VEVEN1

mcrE3"

0002

VODll2

"GJ\TE4

EVEN2

VEVEN2

CARIE

REG 1

VELOTY
Rex12=2

k!l±2%

REG2
REG3

6-107

MB4319

Figure 10
Vex;

T
VGl

VG2
VG3

.....
.....

VG4
YeAR

'GlmT

0001

~

EVENI

troE3

0002

~

EVEN2

CARIE

REG 1

t 2rY
-ILEKE1 .....
-ILEKEl
-ILEKE2 .....
-ILEKE2

VELOTY
REG2
REG3

1.

,),

VEE

Figure 11
Vex;

T
VGl
VG2 _

0001
EVENI

VG3

GATET
GJ.TE2
troE3

VG4

~

EVEN2

CARIE

REGI

VCAR .....
VTEL

0002

VELOTY

Ro.12 = 250k n.±2%

.....

Re.13= 10kn;t2%

-

V0002
~VE VEN2

.....

I,680pF

REG2
JJJJCu=

REGS

,,'7

,),

1.
VEE

R..n - 25k n;t2%

6-108

V0001
..... VE VENl

±2%

MB4319

TIME CHART 1.

VG
(VGl - VG4)

____-=~~------~~::~T---1---~~----~-:~~=~~_______

2.5V±0.1 V
0.3V ±0.1 V

Ifo

Vn"
OV
-1.1V±0.lV
"n : 000112, EVENl12
Tw =500ns±10ns
Ifo = Iro ,; 10 ns

T

.,220 I!S

TIME CHART 2.

t------

T -----7~---__t
4V±0.1 V

VCAR

OV±O.l V
Ira

Ifo

3V±0.1 V
2V±0.1 V
1 V±O.l V

Vn"

OV
"n : 000112, EVENll2
Tw =500 ns± 10 ns
Ifo = Ira,; 10 ns

T

.,220 I!S

6-109

MB4319

TIME CHART 3.

V~R ~~__~
______________________~nu-

____

-"k----......;~k:::-------__1f___:~--- 2V.:t0.l V

Vn1*

Vn2"

Tln1·

6-110

nl"

= 000112 or EVENl12when VVEL = 0 V.

n2"

= 000112 or EVEN 1/2 when VVEL = --4 V ± 0.1 V

V~R

: As same as lime Chart 2.

MB4319

DIP-16C-COS
.754 (19.15)
.788 (20.02)

.305 (7.75)
.325 ( .26)

T

.264 (6.71)

,.-......,,.-..-~ I

'r-..-..--.-.....---r-.----.,.....---,........

7
.15)

.200 (5.08) MAX

t:

.120(3.05)
.150(3.81)

(0.33)
"1 '.'015
.023 (0.58)
.032(0.81)

TYP
.700 (17.78) REF
Dimensions in inches
and (millimeters)

6-111

Disk Drivers

6-112

Linear Data Book

------------------Section 7
Data Conversion - At a Glance
Page

Device

Description

Feature.

Package

Power
Supply (V)

Options

I

AID Conveners - Data Acquisition Systems
7-3

MB4051

8-channel I-bit

251J.S1Ch,SAR
VIN = 0 to +6.5 V

±5,±8

42-pin Plastic

7-27

MB4052

4-channel 8-bit

IOOIJ.SlCh, SAR
Three Analog Input
Ranges

+5, +12

16-pin Plastic DIP, FPT
16-pin Ceramic DIP

7-39

MB4053
4063

6-channeI8-bit

300 IJ.SICh, Slope
Conversion On-Chip
Reference

+5to+15

16-pin Plastic DIP, FPT
16-pin Ceramic DIP

7-51

MB4056

8-<:hanneI8-bit

100 J,1s1Ch, SAR,
to 5 V or
Oto 1.25 V

+5to+18

16-pin Plastic DIP
16-pin Ceramic DIP

100J,1S/Ch, SAR

+7.6 to +18

16-pin Plastic DIP
16-pin Ceramic DIP

l-channelS-bit

30 MSPS (typ.) ECl

-6.2

24-pin Ceramic DIP

7-77 MB40576

l-channelS-bit

30 MSPS (typ.) TIL

+5

IS-pin Plastic

DIP, FPT

7-89

l..:hannel 8-bit

30 MSPS (typ.) TIL

+5

22-pin Plastic

DIP

VIN = 0

7-61

MB4066

8-channel S-bit

DIP

III

AID Conveners - Video
7-69

MB40547-7
40547-8

MB40578
40578-7

DIA Conveners - Multi-purpose
7-97 MB4072

l-<:hannel 8-bit

M-DAC, R/ZR

±4.5to±I.8

IS-pin Plastic DIP, FPT
16-pin Ceramic DIP

7-105 MB88301A

I-channel 13-bit
and 3-channel 6-bit

PWM, V OUT

+5

IS-pin Plastic

DIP, FPT

7-117 MB88341
88342"

12- and 8-<:hannels
S-bit

RlZR, VOUT

+5

2O-pin Plastic
"IS-pin Plastic
"20-pin Plastic

DIP, FPT
DIP, FPT
FPT

7-1

------------------Section 7
Data Conversion - At a Glance (Continued)
Page

Device

Description

Features

Power
Supply (V)

Package
Options

DIA Conveners - Video
7-137 MB40748-8
40748-9
40748-10

l-channell (}-bit

3OMSPS, ECl

-0.46 10 -4.94 24-pin Ceramic DIP

7-145 MB40776

l-channel 6-bit

30 MSPS, TTL

+4.75 10 +5.25 16-pin Plastic

DIP, FPT

7-157 MB40776H

l-channel 6-bit

6OMSPS, TTL

+4.75 10 +5.25 16-pin Plastic

DIP

7-167 MB40778

l-channel 8-bit

30 MSPS, TTL

+4.75 10 +5.25 2O-pin Plastic

DIP, FPT

7-179 MB40788

l-channell (}-bit

125 MSPS, ECl

-0.4610-4.94 24-pin Ceramic DIP

7-187 MB40874

l-channel4-bit

4-bit lUT, TTL

+4.7510 +5.25 2O-pin Plastic DIP
2O-pin Ceramic DIP

7-199 MB40968
MB40968V

2-channel B-bit

30 MSPS, TTL

+4.7510+5.25 28-pin Plastic

DIP, FPT

7-209 MB40978

3-channel8-bit

60 MSPS, TTL

+4.7510+5.25 42-pin Plastic
44-pin Plastic

DIP
DIP

AID and DIA Conveners
7-219 MB40176

l-channel6-bit

20 MSPS (min.) TTL

+4.7510 +5.25 16-pin Plastic

DIP, FPT

7-229 MB87020

l-channell6-bit

5OKSPS, Audio

+4.7510 +5.25 4(}-pin Plastic

DIP

V/F Conveners

7-2

7-261 MB4206

Frequency-ta-Voltage On-chip
Comparalor

+6.510 +24

8-pin Plastic

SIP

7-267 MB4207

Frequency-ta-Voltage Built-in Reference
Voltage

+4.810 +24

8-pin Plastic

SIP

MB4051
JulV 1989
Edition 1.0

a·CHANNEL 10·BIT AID CONVERTER
The Fujitsu MB4051 is a general purpose analog-to-digital converter (ADC)
which features eight channels of analog inputs. 10-bit parallel data I/O port
and programmable control register. Analog input signal on a selected input
channel is converted to 10-bit digital data by the successive-approximation
technique which provides high-speed conversion. The MB4051 is packaged
in a standard 42-pin dual in-line packages.

• Multiplex 8-channel Analog Inputs

•

• 8uilt-in High Stabilized Reference
Voltage Source

•

Resolution: 10 bits

•

Relative Accuracy: 8 bits Min.

•

Linearity: ±112 LS8

• Directly Connectable to DMA
Controller as well as Microprocessor

• Successive-Approximation Technique: 50 /lS/ch Max. at fCLK =
250kHz
• Analog Input
OV to 6.5V

Voltage

CERAMIC PACKAGE
DIP-42C-AOl

Input Impedance: over 500kn
(for 6.5V Input)

• TTL Compatible Digital I/O Port
PLASTIC PACKAGE
DIP-42p·MOl

• Standard 42-pin DIP

Range:

• Analog Input Bias Current: lilA
Max.

•

Power Supplies: +5V and ±8V

•

Power Consumption: 400mW Typ.
PIN ASSIGNMENT

ABSOLUTE MAXIMUM RATINGS (All Voltage referenced to A.G/D.G)
Parameter

Symbol

Value

Unit

Supply Voltage 1

Vcc

+7

V

Supply Voltage 2

V+

+10

V

Supply Voltage 3

V-

-10

V

Digital Input Voltage

VIO

-0.5 to +5.5

V

cc

DE
Bo
B1
B2

START
ADC ClK

VCC (+5V)

v·

(-8V)

Operating Temperature
Storage
Temperature

VIA
TA

Ceramic

-3.0 to V+
-35 to +90

IRQ

DO (MSB)
0,
O2
04

GA

Os

03

05

SUM NODE

07
Os

AMP COMP

09 (lSB)

V+ (+8V)

GO

A7

Ao

·C

AS
As

-55 to +150

A-.

·C

TSTG
Plastic

V

EN

CS

DAC COMP
ReI OUT
Ref AOJ
DAC OUT

Analog Input Voltage

Reset
RA

Riw

A,

A2
L -_ _~ A3

-40 to +125

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are excee---4f.=3.:-7 IRQ

6

38 _
41 CS
40 R~

DE

CTl

2

39

~:

42 Reset

v
-8V

Vee v+
+5V +8V

RECOMMENDED OPERATING CONDITIONS
Value
Parameter

Symbol

Unit
Min

Typ

Max

Supply Voltage 1

Vcc

4.75

5.0

5.25

V

Supply Voltage 2

V+

7.6

B.O

B.4

V

Supply Voltage 3

V-

-B.4

-8.0

-7.6

V

Digital Output High Current

IOH

-0.4

mA

Digital Output Low Current

IOl

8

mA

Operating Temperature

Top

+85

°c

-30

NOTE: The negative value means "flow of current" from Ie to out side of IC.

7-4

1IIIImllllllmlmlml~~~lmllll~~llllm
FUJITSU

MB4051 m~~~IIIIIIIII~~~~~~~I~~IIIII~I~~1

FUNCTIONAL BLOCK DESCRIPTIONS
Symbol

Name

Function

MPX

Multiplexer

Selects one channel from 8-channel analog input signals_ Channel assignment
is done by the 2nd thru 4th bits of control register which are programmed
by the external channel select inputs Bo thru B2 or by a data from MPU.

CMP

Comparator

Compares an unknown analog input signal with an output signal of built-in
DA converter. The result of comparison is transferred to the successiveapproximation register (SAR).

DAC

DA Converter

lO-bit digital-to-analog converter. Generates analog signal corresponding
to digital signal specified by the SAR.

SAR

SuccessiveApproximation
Register

According to the result from the comparator, generates the next step digital
output to be transferred to the DAC and compared in the comparator.
Composed of lO-bit register and control logic. After completion of dataconversion, acts as the data register (DR).

SR

Status Register

lO-bit register which indicates the status of operations. Indicates the assigned channel by SR-2 to SR-4, status of the external control/MPU by
SR-5, operation of AD conversion by SR-6 and completion of AD conversion by SR-7. (See Table 1, 2 of page 14)

CR

Control Register

lO-bit register which controls the operation of ADC. Assigns a channel by
CR-2 to CR-4,switches MPU/external control each other by CR-5, initiates
AD conversion by CR-6. (See Table 1,2 of page 14)

DR

Data Register

Stores a lO-bit data at the completion of AD conversion. Outputs the data
at DE=1 during the external control mode (CR-5=5). If the DR is selected
(CS=O, RA=O, and R!W=1) during the MPU control mode (CR-5=1), the
contents can be read by MPU (EN=1).

I/O BF

Input/Output
Buffer

Connected to the data-bus of MPU for sending or receiving the lO-bit data.
The output is three-state TTL compatible.

CTL

Control Logic

Controls sending and receiving of data between blocks and used for initializing.

Ref

Reference Voltage
Regulator

Specifies the maximum analog input signal level of ADC.

III

7-5

mlllllllmlllllllmlllllllllllllllllllm~11111
FUJITSU
111111111111111111111111~11~llllllml~1111111111

MB4051

PIN DESCRIPTIONS
Name

Symbol

Ao to A7

Analog Input

Analog input terminals of 8 channels, one of which is assigned by CR-2 to
CR-4.

Do to 0 9
Do ..... MSB
0 9 ••.•• lSB

Data I/O Port

Connected to 10-bit parallel data-bus for transferring 1O-bit data between
internal registers and MPU.

CS

Chip Select

Chip-select terminal of ADC which is selected at

RA

Register
Address

Address input for the internal registers. Selects the data register (DR) at
RA~O and the control register (CR)/status register (SR) at RA~1.

R/W

Read-Write Control

Input for the read-write signal from MPU (MPU read mode at R/W~1).

EN

Enable Signal

Input for the enable signal of MPU system. EN is used as timing for data
transfer between MPU and ADC.

Reset

Reset

Initializes the ADC at

Bo to B2

External Channel
Select Input

When ADC is controlled external (CR-5~O), the inputs from Bo to B2 are
set in CR-2 to CR-4 at the falling edge of START. (See Table 3 of page 14)

START

Start

AD conversion starts at the rising edge of START when the external
control mode (CR-5~O).

CC/IRO
(Open
Collector)

Conversion Completel
Interrupt Request

DE

Data Enable

During DE~1 at the external control mode, the data in a register assigned
by RA are output on Do to D9 •

ADC ClK

AD Conversion
Clock

Clock for AD conversion which is input to the SAR and determines the
conversion speed of ADC. A data conversion is completed by 12 cycles of
clock. Not required to synchronize with the EN (Enable) signal from MPU
system. Minimum cycle time of this clock is 21JS.

Ref OUT/
Ref ADJ

Reference Output/
Reference Adjustment

Terminals for output of reference voltage which specifies the full-scale
value of analog input signal and for its adjustment.

AMP COMP/

Amplifier
Compensation/
DAC Compensation/
DAC Output/
Sum Node

Terminals for frequency adjustment of the internal operational amplifier
with connected capacitors having specified capacitances.
SUM NODE is also used for offset adjustment.

V+/Vcc/V-

Terminals for
Power Supply

To be supplied +8V, +5V and -8V, respectively. (Note 1)

GAlGD

Analog Ground/
Digital Ground

Terminals for ground.

DAC COMP/
DAC OUT/
SUM NODE

NOTE 1:

7-6

Function

MB3758 DC-DC Converter

IS

CS~O.

Reset~O.

Indicates the completion of data conversion. After completion of data
conversion, CC goes low at the external control' mode (CR-5~O) or IRO
goes low at the MPU control mode (CR-5~1). In both cases, they go high
after the content of the data register is read.

available, which generates +8V and -8V from signal +5V power supply.

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4051 1IIIIIIIIIIml~~IIIIIIIII~~~llmlllllllllllll

ELECTRICAL CHARACTERISTICS
1. ANALOG CIRCUIT CHARACTERISTICS

(Vcc

= +5V, V+ = +8V, V- = -8V, TA = -30°C to +85°C)
Value
Parameter

Unit
Min

Typ

Resolution

10
Relative Accuracy

Accuracy

Note

Max
bit
bit

8

Gain Error

±1

%of FSR

Adjustable

Offset Error

±0.03

%of FSR

Adjustable

Differential
Linearity Error

±0.5

LSB

Full Scale Voltage

40

ppmfC

Drift

Full Scale
Power Supply
Fluctuation
Suppressing
Ratio

Offset Voltage

±0.5

Positive Power
Supply

1.0

mV/V

8V±5%

Negative Power
Supply

-0.5

mV/V

-8V±5%

VIA = 0 to 6.5V

ppm of FSRfc

Input Current

1

J1A

Full Scale Voltage

6.5

V

Analog Input

Reference
Voltage

Reference Voltage

5.0

V

Drift

30

ppmfC

Positive Power
Supply

7

Negative Power
Supply

-10

12

mA

-17

mA

Supply Current

Conversion Cycle Time

50

J1S/ch

fCLK = 250Hz

7-7

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImlllllllllllili

FUJITSU
111111111111111111111111111111111111111111111111111

MB4051

2. DIGITAL CIRCUIT DC CHARACTERISTICS
(Vee = +5V ± 5%, V+ = +8V, V- = -8V, TA = -30°C to +85°C)

Value
Parameter

Symbol

Condition

Unit
Min

IfII

7-8

Typ

Max

Input High Voltage

V IH

Input Low Voltage

V IL

Input Clamp Voltage

Vie

Vee = 4.75V. lie = -18mA

Output High Voltage

V OH

Vee = 4.75V. V IH = 2V.
V IL = 0.8V. 10H = -2.6mA

0.4

VOL

Vee =4.75V.
V IH = 2V.
V IL =0.8V.

.lOL =4mA

Output Low Voltage

10L =8mA

0.5

V IH = 2V.
Vee = 5.25V
V IL =0.8V

Va = 2.7V

20

Va = O.4V

-20

Output Current
(Off State)

loz

Input High Current

IIH

2

V

0.8

V

-1.5

V

2.4

V

V

JlA

V IH = 2.7V. Vee = 5.25V

20

V IH = 7V. Vee = 5.25V

100

JlA

Input Low Current

IlL

V IL = 0.4V. Vee = 5.25V

Output Short Current

los

Va = OV. Vee = 5.25V

Supply Current

lee

Ao

to A 7 • Reset = GND.
Vee = 5.25V

-15

30

55

-400

JlA

-95

mA

92

mA

1111~111111111~lllllm~~~~~lmllllllm~11
FUJITSU

MB4051 11111111~~lllmllllllm~mm~111111111111111

3. DIGITAL CIRCUIT AC CHARACTERISTICS
(Vee = +5V±5%, V+ = +8V, V- = -aV, TA = -30°C to +85°C)
ADC ClK
Value
Parameter

Symbol

Condition

Unit
Min

Typ

Max

Cycle time

tCY

4

/.IS

H level Pulse Width

t WAC +

1

/.IS

l level Pulse Width

t wAC -

1

/.IS

Read Mode
Value
Parameter

Symbol

Condition

Unit
Min

Typ

Max

EN Pulse Width

P WEN

270

ns

CS, RiW. RA Setup Time

t As

20

ns

CS. RiW. RA Hold Time

tAH

10

ns

Enable Time from EN

tEEN

Fig. 2'

160

ns

Access Time from RA

tARA

Fig. 2'

300

ns

Disable Time from EN

tOEN

Fig. 2'

120

ns

IRQ Recovery Time from EN

tlR

Fig. 3'

240

ns

10

• : See page 11

7-9

~~~~~~~~IIII~~~~~llm~lmlm~m
FUJITSU
1~~~~~~~I~~III~~~~~mllllllml~~ MB4051

Write Mode
Value
Parameter

Symbol

Condition

Unit
Min

Typ

Max

EN Pulse Width

P WEN

270

ns

Cs. Rffl. RA Setup Time

tAS

20

ns

CS. Rffl. RA Hold TIme

tAH

10

ns

Data Setup Time

tos

10

ns

Data Hold Time

tOH

10

ns

External Control AD Conversion
Value
Parameter

Symbol

Condition

Unit
Min

Typ

Max

START Pulse Width

PWSL

270

ns

Channel Setup Time

tBS

20

ns

Channel Hold Time

tBH

270

ns

External Control Read Mode
Value
Parameter

Symbol

Condition

Unit
Min

DE Pulse Width

P WOEH

Enable TIme from DE

tEOE

Fig. 2'

Disable Time from DE

tOOE

Fig. 2'

CC Recovery Time,from DE

tccR

Fig. 3'

.: See page 11

7-10

Typ

Max

270

10

ns
160

ns

160

ns

280

ns

MB4051

IIIIIIIIIIII~IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
FUJITSU
111111111111111111111111111111111111111111111~mll

ADC elK

ADC ClK

t,

J"

tWAC+

f---:

tWAc-

tCY

READ Timing Diagram

I I 1.3V

EN

"

- - - - - - - - 3V

\,3V

OV

PWEN

I

RA

3V

)~'3V

CS,R/W

;K1.3V

~A;

OV

~

3V

\/1.3V

)K',3V

J\.

OV
tAS

~tAH_

tARA

r - \ (1.3V

DO to 0 9

-

\.

j

tEEN

---

L:,.j----

I V.1.3V

IRQ(')

r------------

_tIR_

... : IRQ is reset to "1" when DR is read or Reset goes low.

7-11

~~III~~~IIIIII~IIIII~~~~lllm~~III~11
FUJITSU
11~11111~~IIII~~III~I~lllllllm~~~1 MB4051

WRITE Timing Diagram

3V

EN

1.3V
~--------------OV

f-----1PweN-----o--i

,-~----------------~~ , - - - - - - - - - - - 3 V

CS.R/W.RA

________J

~--r_--------------~--J ~-----------OV

,-------3V
1.3V

Valid Data

~----~----------------~-----' ~-------OV

External Control AD Conversion Timing Diagram

\

3V

It

~.3V

,f"1.3V_ _ _ _ _ _
OV
3V

".

\'13V

)'1.3V

OV

tBH-

tes

PWSL

External Control Read Timing Diagram

DE

,

---------

~ 1.3V

/.1.3V

3V

OV

'/

\

Valid Data

I'

~

j'.lI.3V

-------------

--1--- 1'-------

teoe
i---tCCRPWOeH

7-12

tooe

~~I~~~~~I~~~~~~~IOO~OO~~I
FUJITSU
MB4051 ~~~~~~I~~~OO~~~~~~~I~~~~!I

4. SWITCHING CHARACTERISTICS TEST CONDITIONS
Fig.2 - 3·STATE OUTPUT LOAD CONDITION

Fig. 3 - OPEN COLLECTOR OUTPUT
LOAD CONDITION

vee

Test Pin

fRL-2kll

Test Pin

DO to 09

Vee

_i t

51

R L-2kO

IRQ~

*tZH. tZL: CL = 15pF

tHZ' tLZ: C L = 5pF
tARA:
C L = SOpF

ICL.1SPF

5. SWITCHING WAVEFORM
Enable. Disable Time (3·5toto Output!

_----3V
EN.DE

(I)

EN. DE

5, Close

(3)

S:! Open

ov

-----~I--.i--VOH

"'-4.SV
(2)

--To.5V-

(4)

"----1.5V
5 1.52 Close

51 Open
52 Close

Note 51.52: 5ee Fig. 2. above

IRQ or CC Recoverv Time (Open Collector Output!

,_----------3V
EN. DE

1.3V

----.+ - - - - - - -

-----oV
(

EN~ IRQ)
DE~CC

_------5V

-------VOL
7-13

1~~IIIIIII~~~~lllllllm~~~~llm~~~
FUJITSU

1IIIIIIIIIIIIIIIIIIoomilml l l l l l l l l ili MB4051

TYPICAL CHARACTERISTICS CURVES
Fig.4 - OUTPUT VOLTAGE
vs. INPUT VOLTAGE
4

~

Vee +5V
V+ = +8V
V- =-8V

"

C>

TAj25°C-

"0
~

e"

~

3

"'"
:l

>

Fig. 5 - OUTPUT HIGH VOLTAGE
vs. OUTPUT HIGH CURRENT

2

:l

-

"0

>
.t:

C>

:r
e"
~

J

"

0

A =850 C

0

>

o"

T A =-30°C

o
o

w:
0.5

1.0

I

i
o
>

2.0

1.5

25

V I. Input Voltage (V)

10H. Output High Current (mA)

Fig. 6 - OUTPUT LOW VOLTAGE
vs.OUTPUT LOW CURRENT

Fig. 7 - INPUT CURRENT ¥s.
INPUT VOLTAGE (So INPUT)
2

~

-2

t
"0



.E
0.1

f-----+--+---+---I

0~0--~5--1~0~-~15~~2~0

-

-14
-18

-2

101-0 Output Low Current (mA)

120

-

100

"

E

j::

.

>

c

9

60
40

tZH

~

80

-;;

-

tZL

tLZ

tZH

20

o
-40 -20
0
20 40
60 80 100
T A. Ambient Temperature (OC)

7-14

2

4

6

VI. Input Voltage (V)

Fig. 8 - DE LAY TIME vs.
AMBIENT TEMPERATURE

.E

o

8

ml~IIIIIIIIIIII~~~~lllmlll~~II~~1111111
FUJITSU

MB4051 1IIImmlmlllllll~lmllllllllmmmlllm~

TYPICAL CHARACTERISTICS CURVES (continued)
Fig. 10 - SUPPLY CURRENT vs.
POSITIVE SUPPLY VOLTAGE

Fig.9 - SUPPLY CURRENT
VS. SUPPLY VOLTAGE
12

100

All Bils Low

TA = J5°C

"<

.§

80

r-~: :~~

----

~

c:

I!

.3>

60

~ 40

"

Ul

<>

2

20

~

-

"<

10

~

8

>

6

"

4 -Vcc=+5V

I

.§

o"

Icc

ii
Q.
Ul

1+
TA = 25°C

V- =1-8V

2

o

o
4

4.5
5.5
5
Vcc, Supply Voltage (V)

8

7

6

9

10

11

12

V+, Positive Supply Voltage (V)

Fig. 12 - FULL SCALE VOLTAGE
REFERENCE VOLTAGE
SUPPLY VOLTAGE (V'. IV-II

Fig. 11 - SUPPLY CURRENT vs.
NEGATIVE SUPPLY VOLTAGE
12

10

TA

VS.

=125oC
Vfs

c:

~

o"
>

TA = 25°C

4

Vee = +5V
V- = +8V -+--+--+---1

8:

ri!

V Raf

-+--t---+---1

6

2r---r---r---~--~~

o

~~7--~-8~~-9~~1~0---~1~1---~12

8
10
11
9
V+, IV-I, Supply Voltage (V)

7

V-, Negative Supply Voltage (V)

12

Fig. 13 - OPERATION WAVEFORM

hJ Vr Ln InslVL hI Ln n n.- tu
U

.....

ADC ClK
START

L

....

\ I'~

DAC out

jJ

fCLK = 250kHz

5~

IV

5jjS

Analog Input Voltage· 2.1646V
Output Coding = 0101010101

7-15

m~IM1lmlll~~IIII~~IIII~IIII~1I
FUJITSU

Imlllllllllllllllllll~lIlllllllllllllIlIlIlIlm MB4051

Table 1. BIT CONSTRUCTION OF DR AND SIC R

DR

RA

RiW

Do

0,

O2

03

04

Os

06

07

Os

09

0

1
Read

Bit 0
(MSB)

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

Bit S

Sit 9
(LSB)

Mode
Control

Busy

IRQ

-

-

I

1
Read

SIC R

1

Input
, CH. select
,

r--

-

-

0
Write

Co

,
,I,
,

:

C,

,,
,
,,

C2

INT/EXT

Table 2. CHANNEL SELECT FOR MPU CONTROL
~

C,

Co

Selected CH.

Ao

0

0

0

0

0

1

A,

0

1

0

A2
A3

0

1

1

1

0

0

~

1

0

1

As

1

1

0

As

1

1

1

A7

Table 3. CHANNEL SELECT FOR EXTERNAL CONTROL

7-16

B2

B,

Bo

0

0

0

Ao

0

0

1

A,

0

1

0

A2

0

1

1

A3

Selected CH.

1

0

0

~

1

0

1

As

1

1

0

As

1

1

1

A7

Start

-

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4051

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImllllllllllllllili

ADC OPERATION MODES
According to the status of 5th bit (CR-5) in the built-in control register, ADC has two operation modes: external control
mode and MPU control mode_
Just after an initialization (Reset going from low to high), ADC is in the external control mode (designation of channel, start
of data conversion and data output are controlled through the external control input terminals)_ This mode is useful for
ADC applications only or for DMA operation independent of MPU_
When the MPU control mode is required, set CR-5 of the control register high through MPU_

EXTERNAL CONTROL MODE (CR-5=O):
This mode is used when ADC is controlled by the external hardware. An analog input signal channel is designated by Bo to
B2 and the AD conversion starts at the second rising edging of ADC clock after START goes low.
At the completion of lO-bit data conversion, CC (Convert Complete) goes low to notify it to external devices. The converted
data is read after the low state of CC and DE goes high.

ADC TIMING FOR EXTERNAL CONTROL MODE

ADC CLK

t

II

Boto 8,
(Internal
Operation)

Latch

Data Read

Successive

Reset

-I

Approximation

U
DE

DO to 09

__________________~n!--------~I
II

(

Valid

}--

7-17

Ilmllllllllllllllllllllllllllllmllllllllllllllll

FUJITSU
1IIIIIIIIIIIIIIIIIImlllllllllllllllllllllllllllili

MB4051

MPU CONTROL MODE (CR-S=1):
This mode is used when ADC is controlled by the MPU software. Because of CR-5=O at initialization, CR-5 should be set high
through MPU. After completion of the conversion, CR-7 (IRQ flag) is set high and IRQ output goes low to interrupt MPU
operation.

After confirming IRQ=O, MPU starts the interrupt routine to select the data register of ADC and reads it_ After MPU reads
the data register, IRQ is reset high. In this mode, all signals on START and Bo to B2 are ignored_ When the ADC is required
to return to the external control mode, CR-5 is set low through MPU or RESET is set low_

ADC TIMING FOR MPU CONTROL MODE

CR S.t

'<. . .__>C

RA

y,...C-R-S.-I.C.....
t

RfiJ

~

Do to D7--{

0 )-

DR Read

~~-------~<==>~~-a-Iid----

t

EN~

I

Correspond Internal - - - - - - ,
signal of START
&..-----1

___~I

7-18

Correspond CC

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4051

1111111111111111111111111111111111111111111111111111

TECHNICAL INFORMATION
DEFINITION OF TERMS
EXAMPLE OF RESOLUTION
(3-BIT RESOLUTION)
Resolution:
The minimum distinguishable analog deviation in AD converter. Since MB4051 is 10-bit AD converter, it is possible
to resolute an analog signal, from OV to 6.5V (FSR), into
2 10 = 1024 parts.

111

:;

;

101

a

T§
'0,

0

011
001

Analog Input

D

RELATIVE ACCURACY/GAIN
ERROR/OFFSET ERROR
Relative Accuracy:
Deviation between a straight line from the zero point of
the device (all "0") to the full-scale point (all 'L') and an
actual conversion characteristic curve.

arr -1-1----------~,----..

Gain Error:
Difference between an ideal input voltage span and an
actual input voltage span. In the MB4051, according to the
procedure described separately, it is possible to adjust the
gain error to zero.

Offset Error:
Difference between an ideal cirtieal input voltage which
makes all output bits zero and an actual critical input
voltage. In the MB4051, such offset error can be adjusted
according to the procedure described separately.

Analog Input

*: Relative Accuracy

=

L:>RA

Gain Error - IV, - Vol - (E1 - EO) x 100 (% of FSR)
FSR

Offset Error

= Va -

Eo x 100 (% of FSR)
FSR

7-19

11~~oollmmlmlllllllllmlll~llllmlllm
FUJITSU

~~~~~lm~~IIIII~IIIII~~~I~~~I~~1111 MB4051

DEFINITION OF TERMS (Continued)
DIFFERENTIAL LINEARITY ERROR (LlLSBI

Differential Linearity Error:
Input voltage deviation from an ideal input voltage which is
necessary to change the output code as large as 1 LSB.
The differential linearity error of ±1/2LSB means that,
when the input signal changes 112LSB to 3/2LSB, digital
code varies 1 LSB.

Analog Input

Example of Output Coding

Scale

Input Voltage

L
D D D D D D D D
5
5
1 2 3 4 5 6 7 8
B
B

M

FS·1LSB

6.4937

1 1 1 1 1 1 1 1 1 1

FS/2

3.2500

1 0 0 0 0 0 0 0 0 0

FS/4

1.6250

0

FS/8

0.8125

0 0

FS/16

0.4063

0 0 0

FS/32

0.2031

0 0 0 0

FS/64

0.1016

0

FS/128

0.0508

0 0 0 0 0 0

FS/256

0.0254

0 0 0 0 0 0 0

FS/512

0.0127

0 0 0 0 0 0 0 0

FS/1 024 = 1 LSB

0.0063

0 0 0 0 0 0 0 0 0

0

0.0000

0 0 0 0 0 0 0 0 0 0

7-20

1 0 0 0 0 0 0 0 0

o

1 0 0 0 0 0 0 0
1 0 0 0 0 0 0
1 0 0

0 0 0

o

0 0

1 0 0 0 0
1 0 0 0
1 0 0
1 0
1

MB4051

ml~mllllllllllllllllllll~lllmllmllmlml
FUJITSU
mlllllll~~~~~~lm~m~~~~~~mll~~

APPLICATIONS INFORMATION
ADJUSTMENT OF OFFSET AND GAIN
In the MB4051, Both gain-error and offset-error can be adjusted to zero by trimmers connected as shown below_ In this case,
potentiometers and resistors for trimmers should have temperature characteristics below 100 ppmfC to ensure long-term
stability and less temperature drift.
The following external adjustment circuits should be located as near as possible to the package.

GAIN ADJUSTMENT

11 'Ref OUT
0

80kO

12

R2

13

'.

l--

Offset Adjustment
+8V

"~"f

Ref ADJ

3.9Mn
15 SUM NODE

D

R4

-BV

Offset Adjustment
By applying the voltage of 112LSB, i.e., 3.2mV to an analog input channel, continuously execute AD conversion of the applied
input voltage. Then, adjust potentiometer R3 during the conversion so that the conversion results become "0000000000"
and "0000000001", alternatively. The range of adjustment is about ±0.2% of FSR in the circuit shown below.
The R4 resistor for offset adjustment can be replaced with smoller resistors as follows.

+8V

R3

'~f

180kO

SUM NODE

180kO
15

20T

-BV

10kO

-==-

7-21

~~llllllmmllmlllllmmllllmlllllllllllll
FUJITSU
mmllllmll~III~~III~mllllmllmllllllll MB4051

GAIN ADJUSTMENT
After offset adjustment, by applying FSR-3/2LSB (6.4905V) to an analog input, execute AD conversion of the applied input
voltage. Then, adjust potentiometer R, during the conversion so that the conversion results become "1111111111" and
"1111111110", alternatively. The range of adjustment is about -12% to +5% of FSR in the circuit shown.

PRECAUTIONS FOR CIRCUIT STABILIZATION
To stabilize the ADC operation and by-pass power supply line noise, connect the external capacitors as shown.

CAPACITORS FOR STABILIZATION AND POWER SUPPLY BYPASS

+5V 0----.,.-t--...:8"

..

vee

DAG OUT
15 SUM NODE
AMP COMP

-8V 0--.....,.-......---1 V-

GO

26

Bypass capacitor for filtering line-noise should have good high-frequency characteristics and should be connected as near as
possible to the package.
If a printed circuit board is used, the ground-line should be made as wide as possible and the pattern should be made in such
a manner that the analog input signal line does not pick up noise from the digital signal and so on. Unused digital input should
be kept in an inactive state listed below and unused analog input should be connected to analog ground (GA).

7-22

Inactive State

Terminals

ilL"

EN, RA, RiW, DE, Bo to B2

"H"

Reset, CS, START

M84051

1111~~llllmlll~~~lllmllm~lml~~~~
FUJITSU
mllllllllmll~~~~~lmllllml~~~~~II!

EXAMPLE OF INTERFACE TO 8-BIT MPU
(PROVIDE A CHANGE CIRCUIT FOR UPPER 2-BITSI

JlIl

20kHz

17
AOC CLK

42_

Reset

R.8set

IRQ

37 IRQ

R/Vii

40

EN

39

V·

R/W
SUM NODE

17

+8V
100kfl
Offset A dj.

15

EN
V- 9

An
AN-1

r-

A3--------

i>u-

r-- ~-

I-- ~I--

A2
A1

'--"

Ao

r-

es

~

0
TI

h*
'-),; *

....

07
I

O2

-- -------------

GA

Gain Adj
10kfl

13

::Vee
GO

27 0 9 (LSB)

Ao

28 0 8

A1

8

34

Do

~*

36

I

O2

A6

01

A7

+5V

26

~

25

CHo

24
I

29 0 7

35

19
18

CH 1

f
f
f

Analog input

CH6
CH 7

Do (MSB)

A1=1
Data register

12

RA

~*

7

Ref AOJ

41

01

......

...

Ref OUT
38 _
CS

8V

11

A1=0

LSB_
(020304
06---'
07)
'---_ _ _ _-'1 L..I08_
_ Os
_
MSB

0 1 O2 03 0 4 Os 0 6 0 7

NOTE: • MB74LS367 or MB487xl

7-23

_ _llil
FUJITSU

m~~~!~~i.MM. MB4051

PACKAGE DIMENSIONS
42-lEAD CERAMIC DUAL IN-LINE PACKAGE
(CASE No_: DIP-42C-AOll
o"to 9°

_,,~i

1

R.050(1.27)
REF

c=====t[

.600'.010

1

,="=(=15.,,T'

.010'.002
(0.25±0.05)

1~060(1.52)MAX

100± 010
.
+.
(2.54_0.25)

~~

.040'.004
(1.02'0.10)

---'-I

I':::::~

_+----'-_ (3.40.0.36)
II 018+. 005
---II-- . -.003

(0.46~~:~~)

.050'.010
(1.27±0.25)

2.000(50.80)REF

©1988 FUJITSU LIMITED D42005S-2C

7-24

Dimensions in
inches (mill imeters)

Ilmllllmlllmm~II~~mmm~~I~~~1
FUJITSU

MB4051 ~~~III~~~IIIIIIIII~~~llllm~IIIII~II~1

PACKAGE DIMENSIONS (continued)
40-LEAD PLASTIC DUAL IN-UNE PACKAGE
(Case No.: DIP-40P-M011

t - - - - - - - 2.063::::g~~152.40:::gjg)

------1"1
I

.543±.01O
113.BO±0.25)
.600115.24)

J
~=~~=~

TYP

d~ 19514.96) MAX
=O.IIBI3.oo) MIN
.09012.29)
MAX

@1988 FUJITSU LIMITED 040005S-3C

.10012.54)

TYP

.0IB±.OO3
10.46±0.OB)

.02010.51) MIN

Dimensions in
inches (millimeters)

7-25

Data Conversion

7-26

Linear Data Book

MB4052
July 1988
Edition 4.0

4-CHANNEL 8-BIT AID CONVERTER SUBSYSTEM
The Fujitsu MB 4052 is an analog-to-digital converter (ADC) for general
purpose which features four channels of analog inputs and B-bit data length of
digital output.
Analog input signal is converted to serial B-bit digital data by the successiwapproximation technique which provides high-speed conversion, i.e. many
analog data can be converted within a short time.
All digital I/O signals including control inputs are TTL level compatible so as to
provide wide application such as in microprocessor-controlled system and so on.

CERAMIC PACKAGE
DIP-16C-C02
•

Single Power Supply;
DIP: +3.5V to +6.0V or +8.0V to +lBV (with Internal Regulator)
FPT: +3.5V to +6.0V or +8.0V to +13.2V (with Internal Regulator)

•

Multiplex 4-Channel Analog Inputs

•

Analog
o to
o to
o to

Input Voltage Ranges:
1/2VcCl (Standard mode: RS; 1)
l/BV cCl (Contracted mode: RS; 0)
2V CCl (Expanded mode: through built-in Divider)

•

Analog Input Bias Current:

250nA Max.

•

Resolution:

B bits

•

Linearity:

0.19% Max.

•

Successive·Approximation Conversion:

•

Ratio-Metric Conversion by Reference Voltage V CCl

•

Serial Data Output (Open-Collector)

•

TTL/CMOS Compatible Digital I/O

•

Package: DIP-16C-C02
DIP-16P-M04
FPT-16P-M03

PLASTIC PACKAGE
OIP-16P-M04

IfJI

100JlS/ch Max. at fCLK ; 100 kHz
PLASTIC PACKAGE
FPT-16P-M03

PIN ASSIGNMENT
A.G

ABSOLUTE MAXIMUM RATINGS

(All Voltages referenced to A G/O G)

VCC1

Ex.2
Ex.l

RS

Symbol

Value

,Unit

V CCl

+7

V

V CC2

+20

V

ADC ClK

Digital Input Voltage

V ID

-0.5 to +20

V

cs

Digital Output Voltage (Off-State)

V aH

+20

V

VIA

V ccl +O.5

V

Rating
Power'Supply Voltage

Analog Input Voltage
Storage
T em peratu re

I
I

Ceramic
Plastic

T STG

-!i5 to +150
-40 to +125

Ao

Data Out

Co
D.G

CI

°c

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATI NGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

This device contains circuitry to protect the
inputs against damage due to high static volt-

ages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-

mum rated voltages to this high impedance
circuit.

7-27

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImll l l l l ili

FUJITSU

mlllllll~~III~~llllmllllllllllll~mlllml MB4052

Fig. 1- MB 4052 BLOCK DIAGRAM
COMPARATOR

Ao---,4_ _-I
13
, - - - - - - _ Data Out

A,-"S_-+--I
1+-_--'-1::..2 ADC ClK

L-::::~

EX.2

q
2

__-1~-~11 cs

8bit
DAC

14 RS

7.Skl1
Vee,

-2-

Ex.1 3

2.Skl1

IDII

1~ 8~
A.G

Vee,

D.G

RECOMMENDED OPERATING CONDITIONS
ITA = -30·C to +85·C)
Value
Parameter

Symbol

Unit
Min.

Max.

3.5

5.0

6.0

V

DIP

8.0

12.0

18.0

V

FPT

8.0

12.0

13.2

V

V ee1
Power Supply Voltage

Typ.

V ee2
Digital Output Low Current

IOl

-

-

8

mA

Operating Temperature

TA

-30

-

+85

·c

7-28

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4052

1IIIIIIIIIIImllllllllllllllllllllllllllillmllili

PIN DESCRIPTIONS
INPUT FOR VOLTAGE RANGE EXPANSION (EX 21,
PIN 2
This input pin is provided to expand the voltage range of
analog input signal.
This input pin is connected to the internal one·to·four volt·
age divider which reduces an analog signal level to one
fourth of input level.
OUTPUT FOR VOLTAGE RANGE EXPANSION (EX 11,
PIN 3
This output pin is provided to expand the allowable analog
input level in co-operation with the above EX 2 pin.
A reduced signal which is divided in the internal divider is
output on this pin.
This output pin can be connected to any of standard analog
inputs AD, A" A2 or A3 so that the EX 2 pin can function
as one of 4-channel inputs.

A precise cycle time is not always required for this clock
signal.
DATA OUTPUT (DATA OUn, PIN 13
This output pin is provided to output the AID conversion
results as digital signals.
The converted digital data are serially output in the order
of start·bit, MSE! (Most Significant 8itL 2SB (Second Signi·
ficant Bit I. ... , 7SB, lSB (Least Significant Bitl and
stop·bit in synchronization with the ADC ClK clock signal.
RANGE SELECT (RSL PIN 14
This control input is provided to select an analog input
voltage range as shown in Table 2.
This input must not be changed during an AID conversion.

Table 2 RANGE SELECTION
ANALOG INPUTS (Ao TO A31, PINS 4, 5, 6 AND 7
These input pins are provided to receive four channels of
analog inputs.
One of these four channels is selected by a combination of
Co and C, inputs.
CHANNEL SELECT (C, AND Col. PINS 9 AND 10
These control inputs are used to designate one of four
analog inputs as shown in Table 1.
Table 1 CHANNEL SELECTION
C,

Co

Channel

0

0

AD

0

1

A,

1

0

A2

1

1

A3

CHIP SELECT (CSt. PIN 11
This control input pin is used to start analog·to·digital
conversion.
When CS goes low, the AID conversion start and the DATA
OUT output is enabled.
When an AID conversion is completed or termination of
conversion is required, CS is made high.

RS

Voltage Range

0

o to

1

Oto 1/2V cc ,

1/8 Vcc ,

ANALOG GROUND (A.GI AND DIGITAL GROUND
(D.GI, PINS 1 AND 8
These are terminals for ground.
The analog circuitry and digital circuitry have seperate
ground terminals, respectively.
POWER SUPPLIES (VCC2 AND Vcc, I, PINS 15 AND
16
When the device operates within a voltage range of 3.5V
to 6.0V, the power source is connected to Vcc , which is
shorted to V ee2 .
When the device operates within a voltage range of 8V to
18V in case of DIP Packages and 8V to 13.2V in case of
Flat Package, the power source is connected to Vce2.
In this high voltage operation mode, the Vee, pin is used
as an output pin which supplies +5V stabilized voltage and
10mA load current and the supplied voltage is regurated in
the internal voltage regurator.
Vee! is used as the reference voltage of AID conversion
regardless any two types voltage.

AID CONVERSION CLOCK (ADC CLKI, PIN 12
This clock signal is input to the internal successive approxi·
mation register and used as timing signal for AID conver·
sion.
The conversion speed of this device is determined by this
clock rate.
Ten clock cycles are required for a complete 8·bit conver·
sian.

7-29

~lmllmlm~~~llm~~mmmmllm~~
FUJITSU

1~llmlml~~~~~m~l~mlll~~~I~111111 MB4052

ANALOG CIRCUIT CHARACTERISTICS FOR PLASTIC DIP PACKAGE
(Vee1 = 3.5V to 6.0V, TA = _30°C to +85°C)
Value
Parameter

Symbol

Condition

Unit
Min.

Typ.

-

-

8

Bit

-

-

±0.5

LSB

-

-

±0.9

LSB

-

Resolution
Linearity Error

Max.

V CC1 = 5V
Differential Linearity Error

Zero
Transition
Voltage

Contracted Range

V zc

0

6

16

mV

Standard Range

V zs

7

17

27

mV

Expanded Range

V ZE

22

62

102

mV
mV

V CC1
Full Scale
Transition
Voltage

= 5V, T A = 25°C

Contracted range

V FC

600

625

650

Standard Range

V FS

2.475

2.500

2.525

V

Expanded Range

V FE

9.600

10.000

10.400

V

-100

-250

nA

5

10

15

kn

4.5

5.0

5.5

V

-

4.0

-

mV!V

-

0.5

-

mV/mA

-

50

-

ppmtC

-

-

100

JJS/ch

Comparator I nput Current

Ilc

Divider I nput Resistance for
Expanded Range

RINE

Output Voltage

V CC1

-

= 5V

-

V OA
8V S V CC2

S

18V

Line Regulation
Regulator
Load Regulation

V CC2 = 12V,
OmA S lout S -10mA

Output Voltage
Temperature

V CC2

Conversion Cycle Time

tCYC

= 12V

fCLK = 100kHz

A minus sign (-) prefixed to a current value indicates that the current flows from the IC to the external circuit.

7-30

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4052

1111111111111111111111111111111111111111111111111111

ANALOG CIRCUIT CHARACTERISTICS FOR CERAMIC DIP PACKAGE
(VCC! = 3.5V to 6.0V, TA = _30°C to +85°C)
Value
Parameter

Symbol

Condition

Unit
Min.

Typ.

-

-

S

Bit

-

-

±O,4

LSB

-

-

±O.S

LSB

-

Resolution
Linearity Error
V cc ,

= 5V

Differential Linearity Error

Zero
Transition
Voltage

Contracted Range

V zc

0

6

16

mV

Standard Range

V zs

7

17

27

mV

Expanded Range

V ZE

22

62

102

mV
mV

V cc ,
Full Scale
Transition
Voltage

Max.

= 5V, T A = 25°C

Contracted range

V FC

610

625

640

Standard Range

V FS

2,480

2.500

2.520

V

Expanded Range

V FE

9.760

10.000

10.240

V

-100

-250

nA

5

10

15

kn

4.5

5.0

5.5

V

-

4.0

-

mV!V

-

0.5

-

mV/mA

Comparator Input Current

IIC

Divider Input Resistance for
Expanded Range

RINE

Output Voltage

V cc ,

-

= 5V

-

VOR
8V S V CC2

S

III

18V

Line Regulation
Regulator
Load Regulation

V CC2 = 12V,
OmA S lout S -10mA

Output Voltage
Temperature

V CC2

= 12V

-

50

-

ppm/oC

fCLK

= 100kHz

-

-

100

IlS/ch

Conversion Cycle Time

tCYC

A minus sign (-) prefixed to a current value indicates that the current flows from the IC to the external circuit.

7-31

mlllllllllll~mmmllllll~lllilmll~1
FUJITSU

1111111111111~lmllll~IIII~liilllmli MB40S 2

ANALOG CIRCUIT CHARACTERISTICS FOR PLASTIC FLAT PACKAGE
(VCC1 = 3.5V to 6.0V, TA =_30°C to +85°C)
Value
Parameter

Symbol

Condition

Unit
Min.

Typ.

-

-

8

Bit

-

-

±0.5

LSB

-

-

±0.9

LSB

-

Resolution
Linearity Error

Max.

V CC1 = 5V
Differential Linearity Error

Zero
Transition
Voltage

Contracted Range

V zc

0

6

16

mV

Standard Range

V zs

7

17

27

mV

Expanded Range

V ZE

22

62

102

mV
mV

V CC1 =5V, TA =.25°C

D

Full Scale
Transition
Voltage

Contracted range

V FC

600

625

650

Standard Range

V FS

2.475

2.500

2.525

V

Expanded Range

V FE

9.600

10.000

10.400

V

-100

-250

nA

5

10

15

kn

4.5

5.0

5.5

V

-

4.0

-

mV!V

Comparator Input Current

Ilc

Divider Input Resistance for
Expanded Range

RINE

Output Voltage

V CC1 = 5V

-

-

VOR
8V:5:: V CC 2 :5:: 18V

Une Regulation
RegulatOi
Load Regulation

V CC2 = 12V,
OmA:5:: 10ut:5:: -lOrnA

-

0.5

-

mV/mA

Output Voltage
Temperature

V CC2 = 12V

-

50

-

ppmfC

fCLK = 100kHz

-

-

100

JIS/ch

Conversion Cycle Time
A minus sign

7-32

tcvc

(-I prefixed to a current value indicates that the current

flows from the IC to the external circuit.

1111111111111111111111111111111111111111111111111111

FUJITSU

MB405 2

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImlmi

DIGITAL CIRCUIT DC CHARACTERISTICS (Vee1 =3.5V to 6.0V, TA =- 30°C to +85°C)
Value
Parameter
Input Clamp Voltage
High level Input Current

Symbol

Condition
Typ.

Max.
-1.6

VIC

VCCl

-

-

IOH

VCCl = 3.5V. V IH = 2.0V.
V IL = O.BV. VOH = 20V

-

-

100

jJ.A

V OL1

VCCl = 3.5V. V IH = 2.0V.
V IL = O.BV. IOL = 4mA

-

-

0.4

V

V OL2

VCCl = 3.5V, V IH = 2.0V.
V IL = O.BV. IOL = BmA

-

-

0.5

V

IIHl

VCCl = 6.0V, V IH = 2.7V

-

-

20

jJ.A

IIH2

VCCl

V IH

= 20V

-

-

100

jJ.A

IlL

VCCl = 6.QV. V IL

= O.4V

-

-50

low level Output Voltage

= 3.5V.

Unit
Min.

IlL

= -1BmA

High level Input Current
low level Input Current
Power Supply Current for VCCl

Power Supply Current for VCC2

= 6.0V.

ICCl

VCCl = 6.0V

-

15'

Icc2

VCCl = Open.
VCC2 = 20V for DIP Package
VCC2 = 13.2V for FLAT
Package

-

15

V

-150

jJ.A

30

mA

25

mA

"Note: This typical value is measured at VCCl = 5.0V and TA = 25°C.
A minus sign (-I prefixed to a current value indicates that the current flows from the IC to the external circuit.
The values are measured at VCCl = VCC2 except the Icc2 parameter of .

DIGITAL CIRCUIT AC CHARACTERISTICS

=3.5Vt06.0V. TA = -30°C to +85° C)

(Vee1
Parameter

Value

Symbol

Unit
Min.

Typ.

Max.

tCY

10

-

jJ.S

ns

tWAC+

2.5

ADC ClK l level Pusle Width

tWAC-

2.5

-

CS H level Pulse Width

twcs +

1.5

CS Set-up Time

tscs

1

CS Hold Tin.

tHcs

1

Channel Set-up Time

tSCH

0

Channel Hold Time

t HCH

1

-

-

Propagation Delay Time

tpLH
tpHL

-

BOO

2,000

ADC ClK Cycle Time
ADC ClK H level Pulse Width

jJ.S
jJ.S
jJ.S
jJ.S

jJ.s
jJ.s
jJ.s

7-33

Ilm~illl~mlllllllm~IIIIIII~IIIII~~~~1
FUJITSU
1111111~~lllmllll~~II~lllllml~~IIIII!~1 MB4052

Fig. 2 - AC CHARACTERISTICS WAVEFORM
(1) ADC ClK

(4) Channel Set·up/Hold Time

ADC ClK

"'----ov
(2)

CS

3V

OV

11"""---,',.. - - - - - - - - 3V
1.3V

------oV

(5) Propagation Delay Time

(3) CS Set·up/Hold Time
,_----3V

ADC ClK
ADC ClK
tpLH or tpHL

Data Out

---~

'~--~+-----+----OV
~--VOH

Data Out

----~---VOL

Fig. 3 - TIMING DIAGRAM

A

latch

ZlO--

RL =2Hl

Data Out

0-----+-------0

(Open Collector)

I

CL=15pF

TYPICAL WAVEFORMS OF PROPAGATION DELAY
tpLH (Data Out Transition from low-level to high-level)

tpHL (Data Out Transition from high-level to low-Ieven

IV

/

i-"'"

IDI

Data Out

ADC ClK

ADC ClK

I

II
II

TV

Data Out
IV

lOOns

lOOnS

TYPICAL CONVERSION WAVEFORM
5V

5V

1--1-- cs
..;; _.

_~

________ ADC ClK

--- - - - - - - - Condition
leLK = 100kHz
1--1--1--~oI__f_oI__~+_+-I

5V

20"S

~~~~~~~~~~

Data Out
"10101010"

Vee1 = 5V
Standard Range
V,A
1663 mV

*

7-35

Ilmlm~~mllllm~~I~llllllmml~~~111
FUJITSU
IIIIIIIIIIIIIIIIIIIIIIIIIIIII~IIIIIIIIIII~~~I~I MB4052

Fig. 5 - EXAMPLE OF EXPAND RANGE MODE CONNECTION

VA
Ex.2
Analog Input ~---<>------,

7.5k!l
EX.l

A,

V A :OtoVC C1 x2

RS

=

"1"

MB 4052

7-36

MB405 2

mm~~m~~~~~~~oom~oom~~~
FUJITSU
1IIIIIIIIIIIIml~~lmmllml~~~~m~

PACKAGE DIMENSIONS
16-LEAD CERAMIC (CERDIPI DUAL IN· LINE PACKAGE
(CASE No. : DIP·16I:-C021

.100±.010
(2.54±0.25)
r---~----~~~==~~~

.018~:gg~

Dimensions In
inches (millimeters)

(O.46~g:~~)

16·LEAD PLASTIC DUAL IN·L1NE PACKAGE
(CASE No. : DIP·16P-M041

:::::1::: :: :Jj~,
~.770+.008 (19.55+0.2)~
-.012

.100(2.54)
TVP

-0.3

I
Dimensions in

©1986 FUJITSU LIMITED D16033S·2C

inches (millimeters)

7-37

~~~~llim~~~~mm~lmm~~~~~m
FUJITSU

1IIIIIIIml~II~II~~lm~lm~I~~~~~m~ MB40S 2

PACKAGE DIMENSIONS (continued)
16·LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT·16P-M03)

lr
"'"'"'"'" d
.402±.016

r
].'"

1

INDEX

.299±.012

=-In= l=';: '0=18;: ±='0 4n=f¥l;: =t/l~.L5(0'13)®1

11n)I.=.;:;:1
TYP

(0.45±0.10)

I.

.500~:g~~(12.70~g:~~)

I'

.122(3.10)MAX
(SEATED HEIGHT)

L·002(0.05)MIN
(STAND OFF) View "A"

.362±.012
(9.20±0.30)

.007(0.18)
MAX
.027(0.68)
MAX

.

"A"

DI
©.1988 FUJITSU LIMITED F16008S·2C

7-38

Dimensions in
inches (millimeters)

MB 4053
MB 4063
May 1986
Edition 3.0

6-CHANNEL 8-BIT AID CONVERTER SUBSYSTEM
The Fujitsu MB 4053 and MB 4063 are 6-channel, 8-bit, single-slope A/D
converter subsystem designed to be used in a microprocessor based data control system. These devices provide the analog functions while the addressing,
counting and timing functions are provided by a microprocessor such as the
MB 8840/50, MBl 8048, MBl 8086, or MBl 8088.
The MB 4053 and MB 4063 are single monolithic bipolar IC providing a 1 of
8 address decoder, 8-channel analog multiplier, sample and hold, constant
current generator, ramp integrator and comparator in a 16-pin package.

CERAMIC PACKAGE
DIP-16C-C02

These A/D converter subsystems are suitable for a wide range of applications.
The resolution required by an application can be obtained by arbitrarily
selecting a suitable integration time. Also zero offset and full-scale error
corrections can be made automatically (auto-zero and auto-calibration) to

CERAMIC PACKAGE
DIP-16P-M04

minimize conversion error.

• Microprocessor/TTL compatible
• Zero offset and full-scale error correction capability
• Ratiometric conversion capability
• Available in 16-pin DIP and Flat Pack
• Compatible with MC14443 and IIAg708 (DIP package)
+4.75 V to +15 V
• Single power supply
•

Excellent linearity

HI

PLAsnc PACKAGE
FPT-16P-MOl

±0.2% max. error
3001ls/ch typo

• Fast conversion time
• Analog input volgage

o V to Vcc -

• Power Dissipation

25 mW typo at Vcc = 5 V

2 V (5.25 V max.)

PIN ASSIGNMENT

• Standard 16-pin DIP or flat package.
ABSOLUTE MAXIMUM RATINGS

A,

Symbol

Value

Unit

Supply Voltage

Vec

18

V

Digital Input Voltage

V,O

-0.5 to +30

V

Parameter

Digital Output Voltage when Off

VOH

-0.5 to +18

Analog Input Voltage

V'A

-0.5 to +30

V

10

10

mA

-55 to +150

°c

-55 to +125

°c

Output Current
Ceramic

TSTG

Storage Temperature
Plastic

V

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

A2
RAMP
START
CH

GND
RAMP
STOP
V REF

Ao

"

Vce

'2
'3
'4
'5

'6

This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid

application of any voltage higher than maximum rated voltages to this high impedance
circuit.

7-39

1111111111111111111111111111111111111111111111111

FUJITSU
1111111111111111111111111111111111111111111111111

MB 4053
MB 4063

Fig. 1a - MB 4053 BLOCK DIAGRAM

Vee

RAMP START
(FROM MPU)

~

~

,-",,"'I"~=----_1

u

0.12

-50

~

~

~

l"
100

50
Ambient Temperature, T A

[Oel

=

I----t--VREF
:;(

'R '" 12p.A
CH = 1000 pF

BV
=5V-

tR=50/J A
61----t--~--_1

r--

41----t--~--_1

21----t---+----1
O_L
50--....I...----:':50:----:-:!'OO
Ambient Temperature, T A [OCl

Input Voltage, V fA [V]

7-45

1IIIIIIIIIIIIIIIIIIIIIIIIImllllllllllllllllllllili

MB 4053

FUJITSU

I I I I I I I I I I I I I I I I~I I I I I I I I I I MB 4063

APPLICATION EXAMPLES
Examples of analog voltage (0 - 5V) AID conversion with lO-bit resolution are shown in Fig] and Fig.B.
Fig. 7 - Application Example of MB 4053

Vee=BV

.

Temperature

Sensor

------

To other
@RX Sensor

R,
3 KO

--

-----

\ 5V
20 k
vee
RAMP

I,

STAAT
RAMP

12

STOP

Control inputl

A2
MB 4053
A,
14
13

15

Ao

16

CH

output from MPU

~

VREF RREF

R2
5KO

GND

/

IIDI

RREF
120kO

t

~

Reference Voltage: V AEF = _R_2_ Vee ············7-1
R, + R2
Ramp Current: IA = __
R,_ • _1_. Vee ....•.. 7-2
R, + R2 RAEF
Input Voltage' V
•

IN

=

~
• Vee
Rx + Rs

Ramp Time: tA "" V IN

•

~;

= ~. (1 + ~I • CH
Rx + RB
R,
VAEF=

Ie =

·__ ···············7-3

•

RAEF ····················7-4

5k!1
xBV=5V
3 k!1 + 5 k!1

Vee - VAEF
8 V - 5 V _ 25 A
RAEF
= 120k!1 /1

tSL ~ CH X V AEF
IAlm;n) -IR

5000 pF x (5 V + 0.7 VI = 228/15
150/1A -25/1A
5000 pF x 5 V _ 1000 5
25/1A
/1

If the ramp time is counted with a 1 MHz clock,
the following resolution is obtained.
1000 1:'5 = 1000'= 2'0
1/15
.

7-46

As shown in this example, the voltage output of the sensor
is proportional to Vee (Eq. 7-3) and V REF is also proportional to Vee (Eq. 7-1), the sensor output conver~ion
results (Eq. 7-4) are not influenced by power supply voltage
fluctuation. Such a conversion is called ratio metric conversion and is effective for minimizing the effects of conversion
error. Supply voltage fluctuations during discharge do result
in error, however.

1111111111111111111111111111111111111111111111111

MB 4053
MB 4063

FUJITSU
1111111111111111111111111111111111111111111111111

Fig. 8 - Application Example of MB 4063

Vcc=8V
5V

20 k

vee

RAMP

I,

To other
Temperature
@RX Sensor
Sensor

-------

---

START

RAMP

12

STOP

Control input!

A2

13

output from MPU

MB 4063

A,

14
Is

AO

Is

CH

~

VREF RREF

GND

RREF
100 KO

t

IfII

"
Ramp Current: IA = V AEF
2RAEF
Input Voltage: Y'N

································8·'

= __
R_x_

Rx + Rs

, V REF .....•...... 8·2

C
Ramp Time: tR '" V,N'--i;
= __
Rx_ • CH

'

2RREF ·········............ 8.3

Rx + Rs

I

=

A
ts L ;;:;

V AEF =
5V
_
2RREF 2 x 100kfl - 251lA

1~;,~n~:EI:

5000pF x (5V+0.7V)
1501lA-251lA

2281ls

5000pF x 5V = 1000 s
251lA
Il

If the ramp time is counted with a , MHz clock,
the following resolution is obtained.
1000lls = 1000:' 2'0

IllS

.

7-47

1111111111111111111111111111111111111111111111111111

FUJITSU
mllllllmllllllllllMllllllllllllmllllllll1ll

MB 4053
MB 4063

PACKAGE DIMENSIONS
16-LEAD CERAMIC (CERDIP) DUAL IN·L1NE PACKAGE
(CASE No. : DIP·16C-C02)

I

I)

r

.264(6.71)

:--r-T"""T-.-.-....-...-.--T"""T-.-.---r-~

I

LJLJLJLJLJLJ
.754(19.15)
.788(20.02)

.281

.300(7.62)TVP

14)

•

-JH---------------~---~
.200(5.08)MAX

.120(3.05)
.150(3.81)
.090(2.29)
.110(2.79)

.020(0.51)
.050(1.27)
Dimensions in
inches (millimeters)

7-48

1111111111111111111111111111111111111111111111111

MB 4053
MB 4063

FUJITSU
1111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
16·LEAD PLASTIC DUAL IN·LlNE PACKAGE
(CASE No.: DIP·16p·M01)

I
INDEX

.24016.10)

.300 7.62) TYP .

!2r=:;=r=;==r==r=:;=;=;:=;==r=:;=;:=:=;:=r==?I~.60)
\.

.798120.28) MAX

.1

.05011.27)MAX

.19715.00) MAX

.11813.00)MIN .

. 10012.54)1.

TYP.

.02010.51 )MIN.
Dimensions in
inches (millimeters)

7-49

1111~~lllmlllllllmllllllllm~illlllillill
FUJITSU MB 4053
Imllllillmlllllillmllllllllllllllllllllllllill

MB 4063

PACKAGE DIMENSIONS
16-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT-16P-M02)

.002(0.05)
.008(0.20)

.-:!.~+(S_T_A.ND
. OFF)

Detail of "A" part

.260(6.6)
.28317.2)

~
TYP

JI .

dI4(0.351
.022(0.55)

A:-- --~'01210'3)
~
.024(0.6) .03911.0)

~

-'-------T .02810.7)
_

T

.00510.13)
.00810.20)

.020(0.5)
.007(0.18)
MAX
.02710.68)
MAX

.085(2.15)
MAX

©1986 FUJITSU LIMITED F16005S-2C

7-50

Dimensions in
inches (millimeters)

MB4056

April 1988
Edition 2.0

8-CHANNEL 8-BIT AID CONVERTER
The Fujitsu MB4056 is an analog-to-digital converter (ADC) for general purpoSe which features eight channels of analog inputs and 8-bit data length of
digital output_
Analog input signal is converted to serial 8-bit digital data by the successiveapproximation technique which provides high-speed conversion, i.e. many
analog data can be converted within a short time.
Additionally, the MB4056 has dual range conversion capability, which provides sequentially one data of both range, standard and contracted modes, to
chose better data between them and to delete the range change time.
All digital I/O signals including control inputs are TTL level compatible so as
to provide wide application such as in microprocessor-controlled system and
so on.
• Single Power Supply:
• Multiplex 8-Channel Analog Inputs:
• Resolution:
• Linearity Error:
• Analog Input Voltage Ranges:
Automatic Range Change/Dual
Range Conversion:

•

•
•
•
•
•

PLASTIC PACKAGE
DIP-20P-M01

+4.75 V to +18 V
8 bits
±O.19% Max.

Oto 5 V
Standard mode
o to 1.25 V
Contracted mode
Successive-Approximation Conversion: 100/lS/ch Max. at fCLK = 100 kHz,
SID = 1
200 /lS/ch Max. at fCLK = 100 kHz,
SID =0
Ratio-metric Conversion by Reference Voltage VREF
Analog Input Bias Current:
250 nA Max.
TTL/CMOS Compatible Digital I/O
160 mW Typ. at Vcc = 8V
Power Consumption:
Suffix: -P
Standard 20-pin Plastic Package:
Standard 20-Pin Ceramic Package:
Suffix: -z

PLASTIC PACKAGE
DIP-20C-C03

PIN ASSIGNMENT

A.GND

Rating

OUT
RS
DATA

OUT

ADCCLK

CS

Value

Unit

Power Supply Voltage

Vcc

+20

V

Digital Input Voltage

V IH

+20

V

Digital Output Voltage (Off-State)

V OH

+20

V

A7

V

D.GND

°c
°c

Analog Input Voltage
Storage
Temperature

Vee
'V REF

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Symbol

ID

VIA

+20

I

Ceramic

TSTG

-55 to +150

I

Plastic

T STG

-40 to +125

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

This device contains circuitry to protect the
inputs against damage due to high static volt~
ages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedance

circuit.

7-51

Ilmlllll~~~~~lm~IOOIII
FUJITSU
111111111111111111111111111111111111111~illll~~

MB4056

Fig. 1 - MB4056 BLOCK DIAGRAM

Comparator

~o-------1'>-__- .

A,

o----+-f,

A2o---+--f'

r----+--~-o9ATAOUT

A3O---+--f'

Successive t---~--1r--<) CS
MUltiplexer

A4o---+--f'

Approximation
Register

~--~r--<)ADCCLK

sic

A5O---+--f'
ASo---+--f'

RS

IAIA

A.GND

D.GND

VREF OUT Vee

TABLE 1: CONVERSION MODES

TABLE 2: CHANNEL SELECTIONS

SID

RS

1st Conversion

C2

C,

Co

Channel

L

L

Contracted Range

Standard Range

0

0

0

AO

L

H

Standard Range

Contracted Range

0

0

1

A,

H

L

Contraoted Range

-

1

0

A2

H

H

Standard Range

-

0
0

1

1

A3

1

0

0

A4

1

0

1

A5

1

1

0

AS

1

1

1

A7

7-52

2nd Conversion

~lml~~~~~IIIIIIIIIII~~~~~~II~~mlll
FUJITSU

MB405 6 Iml~~~~~~~~~lml~~~lm~~mll~~1

PIN DESCRIPTIONS
Pin Name

Pin No.

Descriptions

Ao to A7

2 to 9

Analog Inputs
These inputs are provided to receive eight channels of analog inputs. One of them
is selected by a combination of Co to C2 .

SID

11

Conversion Mode Select Input
This control input is provided to select a conversion sequence with RS input as
shown in Table 1. When low, analog input voltage is converted in both ranges, and
when high, in one range only. This input is latched at the falling edge of CS.

C2 to Co

12 to 14

Channel Select Inputs
These inputs are used to select one of eight analog input as shown in Table 2. This
inputs are latched at the falling edge of CS.

CS

15

Chip Select Input
This control input is used to start analog to digital conversion and to terminate it.
When CS goes low, the AID conversion starts and the DATA OUTPUT is enabled.
When the AID conversion is completed or termination of the conversion is required,
CS is made high.

ADC ClK

16

AID Conversion Clock
This clock signal is used for AID conversion. The conversion speed is determined by
this clock rate. But precise stability of the clock rate is no required.

DATA OUT

17

RS

18

Range Select Input
This control input is provided to select an analog input voltage as shown in Table 1.
This input is latched at the falling edge of CS.

V REF

19

Reference Voltage Output
This output provides the regulated 5V when Vce is between 8V and 18V.
10mA current of the output is supplyed externally.

Data Outputs
This output is provided to output the AID conversion results as digital Signals.
The converted digital data are serially output in the order of start-bit, MSB (Most
Significant Bit), 2SB (Second Significant Bit!. ... , 7SB, lSB (least Significant Bit)
and stop-bit in synchronous with the ADC ClK.

A.GND
D.GND

1
10

Analog Ground
Digital Ground

Vee

20

Power Supply Voltage, 4.75V to 18V.

About

7-53

1J~~~~~~I~~~II~I~mm
FWITSU
Hnl~illl~~~!~11 MB4056

RECOMMENDED OPERATING CONDITIONS
Value
Symbol

Parameter

Power Supply Voltage

Vcc

Digital output Low Current

IOL

Ambient Operating Temperature

TA

Unit
Min

Typ

Max

4.75

12

18

-40

ANALOG CIRCUIT CHARACTERISTICS

V

8

mA

+85

·C

(Vee = 4.75 to l8V, TA = -40 to 85·C)
Value

Parameter

Symbol

Condition

Unit
Max

Typ

Resolution

IfII

Max
8

bit

Linearity Error

±0.5

LSB

Differential Linearity Error

±0.9

LSB

Zero Transition Voltage

V zs

Full Scale Transition Voltage

V FS

Zero Transition Voltage

V zc

Full Scale Transition Voltage

V FC

Comparator Input Current

Icop

Regulator

Standard Conversion Mode
8V~Vcc ~ 18V
Contracted Conversion
Mode
4.75V~ Vcc ~ 18V

20

mV

4980

mV

5

mV

1245

mV
-250

nA

5.5

V

Output Voltage

8V~Vcc~ 18V

Line Regulation

8V~Vcc ~18V

4.0

mV/V

Load Regulation

Vcc = 12V
-10mA~ lOUT ~OmA

0.5

mV/mA

Output Voltage
Change with
Temperature

Vcc = 12V

50

PPmtC

4.5

5.0

tCVC1

fCLK = 100kHz, SID = "1"

100

j.lS/CH

tcvco

fCLK = 100kHz, S/D= "0"

200

j.lS/CH

Conversion Time

7-54

1111111111111111111111111111111111111111111111111111

FUJITSU

MB4056 1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIm~~1

DIGITAL CIRCUIT DC CHARACTERISTICS

(Vee = 4.75 to l8V, T A = -40 to 85

Q

CI

Value
Symbol

Parameter

Condition

Unit
Min

Input High Voltage

V IH

Input low Voltage

V IL

Input Clamp Voltage

VIC

IlL = -18mA

Output High Current

IOH

V IH = 2V. V IL
V OH = 20V

Output low Voltage

VOL

V IH = 2V
V IL = 0.8V

Typ

2.0

V

= 0.8V

0.8

V

-1.5

V

100

p.A

IOL =4mA

0.4

V

IOL = 8mA

0.5

V

20

p.A

V IH = 2.7V
Input High Current

Max

IIH
V IH = 20V

Input low Current
Power Supply Current

100

p.A

IlL

V IL = 0.4V

-20

-100

p.A

Icc

Vcc = 20V

20

38

mA

DIGITAL CIRCUIT AC CHARACTERISTICS

(Vee = 4.75 to l8V, TA = -40 to 85Q CI
Value

Parameter

Symbol

Unit
Min

Typ

Max

ADC ClK Cycle Time

tCY

10

p.s

ADC ClK H level Pulse Width

t WAC +

2.5

IJ.S

ADC ClK l level Pulse Width

t WAC -

2.5

IJ.S

CS

twcs+

1.5

p.s

CS Set·up Time

tscs

1

p.s

CS Hold Time

tHcs

1

/ls

Channel Set·up Time

tscH

0

IJ.S

Channel Hold Time

t HCH

1.5

IJ.S

H level Pulse Width

Propagation Delay Time

tpLH

0.8

2

p.s

tpHL

0.8

2

/ls

7-55

IWi~MOO~~I.
FWI'l'SU

li~~~~IMm~~!I. MB40S6

Fig. 2 - AC MEASUREMENT CIRCUIT

~

12V

RL

= 5kll

DATA OUT
(Open Collector Output!

rCL

= 15pF

Fig. 3 - AC TIMING DIAGRAM

ADC CLK

_---3v

ADC ClK

1.3V

_ _ _ _J _ -

~

-

-.OV

twcs+~
---------3V
1.3V

1.3V

~-----------------OV

CS Set·up/Hold Time
ADC ClK

'-_~

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ OV

---------------~
DATA OUT

"\

r------------VOH
Start Bit

/MSB

Co to~. RS. SID Set·up Time/Hold Time

Co.

C,. C:!

RS. SID

Propagation Delay Time

AOCC~

f
___________·t_...;.::~~~~1 ~ - - - - - - - - ::H

DATA OUT

7-56

W

*.3V
~----------------VOL

1IIIIIImlllllllllllllllll~llllllllllllilllllll~
FUJITSU
MB40 56 11~~III~~IIIII~~~~~~~I~mlm~~~~

Fig. 4 - TIMING DIAGRAM

1st

(SiD = "0'"

Conversion--~-t-o----2nd

l

conversion

latch

ADC ClK

DATA OUT

Fig. 5 - TIMING DIAGRAM (SID = "1'"
I-olo----conversion----o-11

--,~

______________~Ir---

latch

ADC ClK

DATAOUT----,

I I I I I I I I I
m m m m m m m m ~
:1!!l~~ffl:31!!~g.
Qi

7-57

l~oom~~~mmmm~~I~I~~
FUJITSU
1~~~lm~~~llglOOI~I~~

MB4056

TYPICAL CHARACTERISTICS CURVES
Fig. 7 - MEASUREMENT CIRCUIT

Fig. 6 - ALLOWABLE VREF OUT PIN OUTPUT
CURRENT VI. POWER SUPPLY VOLTAGE

....

~

10~-------------y--~~---,

POWER SUPPLY

:;)

o

z

0::

Vee

....

:;)-

-lOUT

0«

::;s

5

a:f-

>

::>

woP

., ....
..J

LOAD

~ffi

Oa:

j ~ 0 ~---+----+----+----+----t-----l

« (J

8

10

12

14

16

POWER SUPPLY VOLTAGE Vee IV)

..

7-58

18

20

1~~III~mllll~IIIIIIIIIII~IIII~IIIII~~il
FUJITSU
MB4056 11~~M~i~~~OO~~~~nMI

PACKAGE DIMENSIONS
2O-LEAD PLASTIC DUAL IN-LINE PACKAGE
(CASE No_: DIP-20P-M(1)

.300±.010
(7.62±0.25)

.010±.002
(0.25±0.05)

.034~t2
.050{1.27)MAX

(0.86~~·30)

.172{4.36IMAX

.11813.0)MIN

III

Dimensions In
inches (millimeters)

7-59

IMm.umu

FUJITSU
I~~~~~~I~!~~~~~IOO~MI MB4056 .

PACKAGE DIMENSIONS (continued)
2O·LEAD CERAMIC (CERDIP) DUAL IN· LINE PACKAGE
(CASE No.: DIP·20C·C03)

~~~W=LL~~CL~~~--.

R.025(O.64)

REF

1-------

.950~:~~~

-------1

(24.13~~:~~)
.050(1.27)MAX

.100f.Ol0
(2.54'0.25)

D

© FUJITSU LIMITED 1986 D20006S·4C

7-60

Dimensions in
inches (millimeters)

MB 4066
June 1987
Edition 1.0

8-CHANNEl 8-BIT AID CONVERTER
The Fujitsu MB 4066 is an analog-to-digital converter (ADC) for general purpose which features eight channels of analog inputs and 8-bit data length of
digital output.
Analog input signal is converted to serial 8-bit digital data by the successiveapproximation technique which provides high-speed conversion, i.e. many
analog data can be converted within;; short time.
Additionally, the MB 4066 has dual range conversion capability, which provides sequentially one data of both range, standard and contracted modes, to
chose better data between them and to delete the range change time.

PLASTIC PACKAGE
DIP-20P-M01

All digital I/O signals including control inputs are TTL level compatible so as
to provide wide application such as in microprocessor·controlled system and
so on.
• Single Power Supply:
• Multiplex 8-Channel Analog Inputs:
• Resolution:
• Linearity:
• Analog Input Voltage Ranges:
•
Automatic Range Change/Dual
Range Conversion:

•
•
•
•
•
•

+7.6 V to +18 V
8 bits
±0.19% Max.

o to VREF
Standard mode
o to 1/4V REF
Contracted mode
Successive-Approximation Conversion: 100 jI.S/ch Max. at fCLK = 100 kHz
Ratio-metric Conversion by Reference Voltage VREF
Serial Data Output (Open Collector)
TTL/CMOS Compatible Digital I/O
Power Consumption:
160 mW Typ. at Vcc = 8V
Standard 20-pin Dual In-line Package

CERA..C PACKAGE
DlP-2DC-C03

PIN ASSIGNMENT

A.GND
Ao

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Rating

Symbol

Vee
VREF

Al

RS

A2

DATA
OUT
ADCCLK

Value

Unit

A3

Power Supply Voltage

Vcc

+20

V

A4

CS

Digital Input Voltage

V'D
VOH

+20

V

AS

Co

+20

V

A6

C,

V'A
VREF

+20

V

A7

C2

+5.5

V

D.GND

TSTG

-55 to +150

V

TSTG

-40 to +125

V

Digital Output Voltage (Off-State)
Analog Input Voltage
Reference Voltage
Storage Temperature

I

Ceramic

J Plastic

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

siD

This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields. However. it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedance

circuit.

7-61

• •11.
FUJITSU

III. . .

MB 4066

Fig. 1 - MB 4066 BLOCK DIAGRAM

Co C,

C:!

Comparator

1.0
A,

A2

PATAOUT

A3

cs

Sucessive
Approxi-

mation
Register

A4

..

ADCCLK

A5

SID
r

li:r

As

RS
A7

[J[J

A.GND

D.GND

TABLE 1: CONVERSION MODES

TABLE 2: CHANNEL SELECTIONS

SID

RS

1st Conversion

C:!

C,

Co

Channel

L

L

Contracted Range

Standard Range

0

0

0

AO

L

H

Standard Range

Contracted Range

0

0

1

A,

H

L

Contracted Range

-

1

0

A2

H

H

Standard Range

-

0
0

1

1

A3

1

0

0

A4

1

0

1

A5

1

1

0

A6

1

1

1

A7

7-62

2nd Conversion

MB 4066

mllllml~~~~~~~mll~~~Mlmlll~~
FUJITSU
1IIIIIIIIIIIIIIIIImmllllmlm~I~~1

PIN DESCRIPTIONS
Pin Name

Pin No.

Descriptions

Ao to A7

2 to 9

Analog Inputs
These inputs are provided to receive eight channels of analog inputs. One of them
is selected by a combination of Co to C2 .

SID

11

Conversion Mode Select Input
This control input is provided to select a conversion sequence with RS input as
shown in Table 1. When low, analog input voltage is converted in both ranges, and
when high, in one range only. This input is latched at the falling edge of CS.

C2 to Co

12 to 14

Channel Select Inputs
These inputs are used to select one of eight analog input as shown in Table 2. This
inputs are latched at the falling edge of CS.

CS

15

Chip Select Input
This control input is used to start analog to digital conversion and to terminate it.
When CS goes low, the AID conversion starts and the DATA OUTPUT is enabled.
When the AID conversion is completed or termination of the conversion is required,
CS is made high.

ADC ClK

16

AID Conversion Clock
This clock signal is used for AID conversion. The conversion speed is determined by
this clock rate. But precise stability of the clock rate is no required.

DATA OUT

17

This output is provided to output the AID conversion results as digital signals.
The converted digital data are serially output in the order of start-bit, MSB (Most
Significant Bit), 2SB (Second Significant Bitl. ... , 7SB, lSB (least Significant Bit)
and stop-bit in synchronous with the ADC ClK.

RS

18

Range Select Input
This control input is provided to select an analog input voltage as shown in Table 1.
This input is latched at the falling edge of CS.

V REF

19

Reference Voltage Input
This input provides the conversion reference for the analog to digital conversion
circuit.

A. GND
D. GND

1
10

Analog Ground
Digital Ground

Vee

20

Power Supply Voltage, 7.6 V to 18 V.

7-63

III

11~~nllllllln!
FWITSU
1~~~!~!~n~!OO~~~!liI MB 4066

RECOMMENDED OPERATING CONDITIONS
Value
Parameter

Symbol

Unit
Min

Typ

Max

Power Supply Voltage

Vcc

7.6

12

18

Reference Voltage

V REF

4.75

5.00

5.25

Digital Output Low Current

IOL

Ambient Operating Temperature

TA

-40

V
V

8

mA

+85

'c

ANALOG CIRCUIT CHARACTERISTICS
(Recommended Operating Condiions unless otherwise noted.)
Value
Parameter

Symbol

Condition

Unit
Min

Typ

Resolution

Max

8

bit

Linearity Error

±0.5

LSB

Differential Linearity Error

±0.9

LSB

Zero Transition Voltage

V zs

Standard Conversion Mode
V REF = 5.000V

Full Scale Transistion Voltage

VFs

Zero Transition Voltage

V zc

Full Scale Transition Voltage

V FC

Contracted Conversion
Mode
V REF = 5.000V

V REF Input Current

IREF

V REF = 5.000V

Comparator Input Current

Icop

0.5

20

mV

4980

mV

5

mV

1245

mV

1.0

2.0

mA

-250

nA

tcvCI

fCLK = 100kHz, SID = "1"

100

!!S/CH

tcvco

fCLK = 100kHz, SID = "0"

200

IlslCH

Conversion Time

7-64

1111111111111111111111111111111111111111111111111111

FUJITSU

MB 4066

1111111111111111111111111111111111111111111111111111

DIGITAL CIRCUIT DC CHARACTERISTICS
(Recommended Operating Conditions unless otherwise noted.)

Value
Parameter

Symbol

Condition

Unit
Min

Input High Voltage

V IH

Input low Voltage

V IL

Input Clamp Voltage

VIC

IlL = -18mA

Output High Current

IOH

V IH = 2V, V IL = 0.8V
V OH = 20V

Output low Voltage

VOL

V IH = 2V
V IL = 0.8V

Input High Current

Typ

Max

2.0

V
0.8

V

-1.5

V

100

IlA

IOL =4mA

0.4

V

IOL = 8mA

0.5

V

V IH = 2.7V

20

IlA

V IH = 20V

100

IlA

-100

IlA

38

rnA

IIH

Input low Current

IlL

V IL = O.4V

-20

Power Supply Current

Icc

Vcc = 20V

20

IfJI

DIGITAL CIRCUIT AC CHARACTERISTICS
(Recommended Operating Conditions unless otherwise noted.)
Value
Parameter

Symbol

Unit
Min

Typ

Max

ADC ClK Cycle Time

tCY

10

IlS

ADC ClK H level Pulse Width

t WAC +

2.5

IlS

ADC ClK l level Pulse Width

t WAC -

2.5

J1S

CS H level Pulse Width

twcs+

1.5

IlS

CS Set·up Time

tscs

1

IlS

CS Hold Time

t HCS

1

IlS

Channel Set-up Time

tSCH

0

J1S

Channel Hold Time

t HCH

1.5

J1S

Propagation Delay Time

tpLH

0.8

2

J1S

tpHL

7-65

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~
FUJITSU

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~IIIIIIIIIIIIII~I MB 4066

Fig. 2 - AC MEASUREMENT CIRCUIT

~

,J12V

DATA OUT

RL

= 5kn

(Open Collector Output)

rCL =15pF

Fig. 3 - AC TIMING DIAGRAM
ADC ClK

~

twcs+~

1.3V

---------3v

1.3V
~---------------OV

CS Set-up/Hold Time
ADC ClK

' -__~__________________________ OV
--------------~
DATA OUT

'\

~----------VOH

Start Bit

hSB

Propagation Delay Time

AOCC~

~

w

________'t_---:.~.:.:~~~I-~ - - - - - - - - ::H
DATA OUT

~.3V
~-----------VOL

7-66

MB 4066

ml~~~~I~mllll~~~~~~~~~imm~1
FUJITSU
m~m~II~~IM~~MM~I~m~~~~~1

Fig. 4 - TIMING DIAGRAM (S/D = "0")

1st Conversion-----f_--2nd conversioni

Latch

ADC CLK

DATADUT

D

Fig. 5 - TIMING DIAGRAM (S/D = "1")

I-I-----conversion------II

--.~--------------~I~--Latch

ADC CLK

DATA OUT -------,

I I I I I I I I I

7-67

~~~~mm~~llmool~~~~~~~~I~
FUJITSU

1IIIIIImllllllllllllllllllllllllllmlll~~111111 MB 4066

PACKAGE DIMENSIONS
2G-LEAD PLASTIC DUAL IN-LINE PACKAGE

(CASE No" DIP·2OP-M011

Dimensions In

inche&!mIlHmetersl
C)FUJITSU LIMITED 1986 D20005S-2C

2O-LEAD CERAMIC (CERDIPI DUAL IN-LINE PACKAGE
(CASE No.: DIP·2OC·C031

R.02510.64) p-.l::L..o::::L..J:::l!-=WCL.£:L..£"'--"=--=,---.

REF.";)
)-_____ .950~:~~g _______
(24.13~~:~~)
~H-_~_OO_(_1._27_)M_A_X_ _ _ _ _ _ _ __

@FUJITSU LIMITED 1986 020006S-4C

7-88

Dimensions in
inches (millimeters)

MB 40547-7
MB 40547-8
May 1984 '
Edition 2.0

8-BIT ULTRA HIGH SPEED AID CONVERTER
The Fujitsu MB 40547 is an ultra-high A/D converter which is fabricated with
Fujitsu Advanced Bipolar Technology. The MB 40547 uses the full-parallel
comparisi on technique (flash method) for high speed conversion and can
convert wide-band analog signals such as video to digital signals at a sampling
rate from DC to 30 Megasamples/sec. without any sampling/holding circuit.
Because of such high-speed operation, the MB 40547 is suitable for applications such as color-TV coding, video processing with computer, or radar signal
processing.

•

Resolution:

8 bits

•

linearity:

MB 40547-7: ±1 lSB
MB 40547-8: ±1/2 lSB

•

Conversion Rate:

30 MSPS typo

•

Analog Input Voltage: 0 to -2 V

•

No need for external sampling/holding circuit

•

Digital I/O level:

10K ECl level

•

Output modes:

Binary/2's Complement

•

Single Power Supply:

-5.2 V

•

Power consumption:

900 mW typo

•

Package:

Standard 24-pin DIP

CERAMIC PACKAGE
DIP-24C-A01

PIN ASSIGNMENT

ABSOLUTE MAXIMUM RATINGS
Parameter
Power Supply Voltage

Symbol
VEE

D.GND

Ratings
+0.5 to -7.0

NLiNV

Unit

A.GND
VRB (-2 VI

V

V RM

Digital Input Voltage

V IND

+0.5 to VEE

V

Analog Input Voltage

V INA

+0.5 to VEE

V

VIN

Analog Reference Voltage

VR

+0.5 to VEE

V

A.GND

Output Current

10

-12"

mA

VIN

V RT (OV)

Storage Temperature

TSTG

NMINV
D.GND

-55 to +150

°c

VEE

• Negative value of current means that the current flows from the device.

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

This device contains circuitry to protect the

inputs against damage due to high static

yolt~

ages or electric fields. However. it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedance

circuit.

7-69

IIiOOIIiOOMIIIIII~~OOIIIOOOO
FUJITSU MB 40547-7

IIIIIIIIIIIIIIIIIIIII~IIIIIIIIIIIII MB 40547-8

BLOCK DIAGRAM

NMINV
NllNV
ClK
VIN
VRT
R,
R
R

D, (MSB)
D2

R/2
VRM

D3

256 to B
ENCODER

lATCH

R/2

D4

&

D5

BUFFER

D6
R

D7
DS (lSB)

R
R2
VRS

RECOMMENDED OPERATING CONDITIONS
Value
Parameter

Unit

Symbol
Min

Typ

Max

-5.46

-5.20

-4.94

Power Supply Voltage

VEE

Analog Input Voltage

V INA

Analog Reference Voltage (Top Side)

V RT

Analog Reference Voltage (Bottom Side)

V RS

-2.1

Clock Pulse Width at High level

tw+

25

ns

Clock Pulse Width at Low level

t w-

25

ns

Operating Temperature

TA

0

7-70

-2.0
0

V

0

V

0.1

V

-2.0

V

70

°c

11111111111111111111111111111111111111111111111

MB 40547-7
MB 40547-8

FUJITSU
111111111111111111111111111111111111111111111111111111

DC CHARACTERISTICS
(VEE

=-5.2 V, TA =0 to +70°C, Output Circuits: See TEST LOAD CIRCUIT)
Value
Parameter

Unit

Symbol
Typ

Max

Max

Resolution

8

Linearity Error

bits

±0.4

1MB 40547-7

ER

1MB 40547-8

±0.2

Equivalent Input Resistance

RINA

Input Capacitance

CINA

High·level

%

k.Q

25
250

pF

IIHA

300

p.A

Low-level Input Cu rrent

liLA

290

p.A

Reference Current

IRB

Input Current

130

-20

-36

mA

AC CHARACTERISTICS
(VEE

=-5.2 v, TA =0 to +70°C, Output Circuit: See TEST

LOAD CIRCUIT)
Value

Parameter

High-level Output Voltage

Low-level Output Voltage

High-level Input Voltage

Low-level Input Voltage

-

Symbol

V OH

VOL

V IHO

V ILD

TA
tC)

Unit
Min

Typ

Max
-0.840

0

-1.000

+25

-0.960

-0.810

+70

-0.900

-0.720

0

-1.870

-1.665

+25

-1.850

-1.650

+70

-1.830

-1.625

0

-1.145

+25

-1.105

+70

-1.045

V

V

V

0

-1.490

+25

-1.475

+70

-1.450

V

High-level Input Current

IIHD

220

p.A

Low-level Input Current

IILD

180

p.A

Power Supply Current

lEE

-280

-170

mA

7-71

1~lmllll.IIIIIII.MmIMIII
FUJITSU

MB 40547-7

M.III~llIIIml~ MB 40547-8

SWITCHING CHARACTERISTICS
(VEE = -5.2 V, TA = +2S o C)

Value
Parameter

Symbol

Maximum Conversion Rate

FS

Aperture Delay

tAD

Digital Output Delay

tpd

Unit
Min

Typ

20

30

Max
MHz
ns

15

25

ns

TIMING DIAGRAM

eLK

l1li
Data N-l

7-72

Data N

Data N+l

1111111111111111111111111111111111111111111111111111111111111111

MB 40547-7
MB 40547-8

FUJITSU
1111111111111111111111111111111111111111111111111111111111111111

ANALOG INPUT EQUIVALENT CIRCUIT
IBIAS

V,N o----,--~-~---,

VRB

A.GND

VEE
(One of 255 input circuits)

C ,N :
R ,N ;

Non-linear Emitter-follower Junction Capacitance
linear Resistance Model for Input Current Transition by Comparator Switching;

V RB;
IBIAS :
Vo;

Voltage at V RB Terminal.
Constant Input Bias Current
Diode consisting of the base-collector junction of emitter-follower transistor.

Infinite value for V ,N

< V AB

or when ClK = HIGH.

DIGITAL INPUT EQUIVALENT CIRCUIT
G.GNDo---~-~--

G.GNDo---~r------

ClK

VAEF

= -1.3

NMINV
NLiNV

V

VAEF = -1.3 V

TEST lOAD CIRCUIT

DIGITAL OUTPUT EQUIVALENT CIRCUIT
----~-----_t_--<>

D. GND

To Output P i n = j l

CL

RT

=

10 pF

~inciUding jig and probe

= 510 n

0, to 0 8

VEE

7-73

1111~I~OOOOIIIMIIIIIMIIIIIIIOOI
FUJITSU MB 40547-7
IIIIIIIIIIIIIIIIIIIIIIIIIIIIWIIIIIIIIIIII

MB 40547-8

OUTPUT CODES

(Recommended Operating Conditions unless Otherwise noted, VRT :, OV, VRD = -1,OOOV, Positive Logic)
BINARY

RANGE
-2.0000 V FS
STEP

IfII

-2.0000 V FS

TRUE

OFFSET 2'S COMPLEMENT

INVERTED

INVERTED

NMINV = 1

NMINV =0

NMINV = 0

NMINV= 1

NLiNV = 1

NLiNV = 1

NLiNV = 0

NLINV = 0

0.0000

00000000

11111111

10000000

01111111

-0.9961

-1.0160

01111111

10000000

11111111

00000000

-1.0039

-1.0240

10000000

01111111

00000000

11111111

00000001

11111110

01111111

10000000

7.8431 mV

8.000mV

Step'l

Step'l

(V)

(V)

000

0.0000

127
128
129

-1.0118

-1.0320

10000001

01111110

255

-2.0000

-2.0400

11111111

00000000

Note '1: Value of analog voltage is defined as value at the center of the step.

7-74

TRUE

mmlWIWlmlmWll lMlml l lml
MB 40547-7 FUJITSU
MB 40547-8 IMI~.~li'Inll

PACKAGE DIMENSIONS
24-LEAD CERAMIC (METAL SEAL) DUAL IN-LINE PACKAGE
(CASE No.: DIP-24C-A01)

.59Q( 14.99)
.610(15.49)

161

Dimensions in
inch .. (millimeters)

7-75

Data Conversion

D

7-76

Linear Data Book

MB40576
April 1988
Edition 3.0

6-BIT ULTRA HIGH SPEED VIDEO AID CONVERTER
The Fujitsu MB 40576 is a low power ultra-high speed video A/D converter
fabricated with Fujitsu Advanced Bipolar Technology. The MB 40576 also
adopts the fully-parallel comparison technique (flash method) for high speed
convertion and can convert wide band analog signal such as video signal to
digital signal at a sampling rate of DC through 20 Mega-samples/sec. Because of
such high-speed operation, the MB 40576 is suitable for digital video applications such as the digital TV, video processing with computer, or radar signal
processing.

•

Resolution:

6 bits

•

Linearity Error:

±0.8%

•

Maximum Conversion Rate:

20 MSPS min.

•

Analog Input Voltage:

Vee to Vee -2V

•

Analog Input Dynamic Range:

1V

•

Digital I/O level:

TTL

•

Single Power Supply:

+5V

•

Power Dissipation:

270 mWtyp.

•

Package:

Standard 16-pin DIP Package (Suffix: -PI
Standard 16-pin FLAT Package (Suffix: -PF)

PLASTIC PACKAGE
DIP-16P-M04

PLASTIC PACKAGE
FPT-16P-M03

PIN ASSIGNMENT

(lSBIOs

Rating

GNO

05

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Symbol

Value

Unit

V CCA
V CCD

-0.5 to +7.0

V

04
03

Power Supply Voltage
Digital Input Voltage
Analog Input Voltage
Analog Reference Voltage
Storage Temperature

* I V RT

-

V RB

02
(MSBI01

V'ND

-0.5 to +7.0

V

V'NA

-0.5 to V cc + 0.5

V

V RT , V RB *

-0.5 to V cc + 0.5

V

T STG

-55 to +125

°c

elK

VCCA

GNO

VCCD

I < 2V

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATI NGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

This device contains circuitry to protect the

inputs against damage due to high static voltages or electric fields. However. it is advised
that normal precautions be taken to avoid

application of any voltage higher than maximum rated voltages to this high impedance

circuit.

7-77

1IIIIIIMIlmmmlllliliWI
FUJITSU

IIIIIIIIMIIIIIIIIIIIIIIIIIWIIIIIII MB40576

Fig. 1 - MB40576 BLOCK DIAGRAM

Buffer
ClK

VINA
VRT
R1

011MSBI

02

63 to 6

LATCH

03

&

ENCODER

BUFFER

04

R

..

Os
R
061lSBI
R2

VRB

comparators

! i i

GND VCCA VCCD

7-78

1IIIIIIIOOOOIIOOIIIIIIIIIIIIII~1
FUJITSU

MB40576 IIIIIIIIIIIIIIIIIIIIIIIIIII~IIIIIIIIIII

RECOMMENDED OPERATING CONDITIONS
Min

Value
Typ

Max

VCCA
VCCD

4.75

5.00

5.25

V

Analog Input Voltage'

V1NA

4

5

V

Analog Reference Voltage (Top side)'

V RT

4

5

5.1

V

Analog Reference Voltage (Bottom side)'

V RB

3

4

4.1

V

Digital High·level Output Current

IDHD

Digital Low·level Output Current

IOLD

Clock Pulse Width at High level

tw+

25

ns

Clock Pulse Width at Low level

tw-

25

ns

Operating Temperature

TA

0

Parameter

Symbol

Power Supply Voltage

-400

Unit

I1A

4

70

rnA

°c

NOTE: 'VRB < V1NA < VRT • VRT - VRB = 1 V ±0.1 V
Please keep VCCA and VCCD at the same potential.

D

7-79

1~1~~~I~~~~lmmIIMm~~m~~~~1
FUJITSU

~~lllmllllll~IIIIIII~IIIIIIIIIIIIIIIIIIII~11 MB 405 76

ELECTRICAL CHARACTERISTICS
ANALOG DC CHARACTERISTICS

(Vee = 4.75 to 5.25 V, TA = 0 to 70·C)

Value
Parameter

Symbol

Condition

Unit
Min

Typ

-

Resolution
Linearity Error

LE

Equivalent Analog Input Resistance

RINA

Input Capacitance

C INA

High-Level Input Current

DC

Max
6

bits

±O.S

%

KU

100
65

pF

IIHA

75

IlA

Low-Level Input Current

liLA

73

IlA

Reference Current

IRB

7.2

mA

35

V RT = 5 V
V RB =4 V

4

IfJI
DIGITAL DC CHARACTERISTICS

(Vee = 4.75 to 5.25 V, TA = 0 to 70·C)

Value
Parameter

Symbol

Condition

Unit
Min

High-level Output Voltage

VOHO

IOHD = -400 /lA

Low-level Output Voltage

VOLD

IOLD = 1.6 mA

High-level Input Voltage

"'IHD

Low-level Input Voltage

V ILD

Maximum Input Current

liD

V ID = 7 V

High-level Input Current

IIHD

V IHD = 2.7 V

Low-level Input Current

IILD

V ILD =0.4 V

Power Supply Current

Icc

7-80

Typ

Max

2.7

V
0.4

2

V

0
-400

V

O.S

V

100

IlA

20

IlA

-40
54

/lA
SO

mA

1111111111111111111111111111111111111111111111111111

FUJITSU

MB40576

1111111111111111111111111111111111111111111111111111

ELECTRICAL CHARACTERISTICS (continued)
SWITCHING CHARACTERISTICS
Value
Parameter

Symbol

Condition

Unit
Min

Typ

Maximum Conversion Rate

FS

20

30

Digital Output Delay Time

tpd

5

18

Max
MSPS

40

ns

TIMING DIAGRAM

3V

eLK

OV

DATA

DATA

DATA

N-l

N

N+l

7-81

••IlII• •~
FUJITSU

WW~1lIl MB40576

Fig. 2 - ANALOG INPUT EQUIVALENT CIRCUIT

VCCA o-----"1~-+-...,...-

VINA ,,-_ _r

X63 CIRCUITS

CINA : Non·linear Emitter·follower Junction Capacitance
RINA : Linear Resistance Model for Input Current Transition by Comparator Switching:
Infinit value for VINA 

50 I-

Vee
VRT
VRB

=
=
=

-

5.25V
5.000V
4.000V

ill
..J

;;; 0.6
o
IX:

ffi

40

~

u

~ 30

Q.

~

20

'"IX:

10

~

Q.

Fig. 8 - LINEARITY ERROR
vs. TEMPERATURE
o.8,----r--T"-"---r--r---..,

a:«

Vee =1 5.00V
V RT = 5.000V
VRB = 4.000V

+---+--f--,

0.4F"""''''t--t---+==F=~

0.21----+--t---+--f---l

w

z

::;

~25

~·!'-5-~0!:---:2~5---;51::-0--==7=-5--:-:!100
TEMPERATURE TA (Oel

o

25

50

75

100

TEMPERATURE T A (Oel



u
w
u
z
w

2

--

=>
~

vee
VRT = 5.000V + - - - - 1 - - - t - - - - j
VRS = 4.000V

~-«~

21----+--f--4----If---l

J:I-

..J..J

;:: ~

IX:

IX:

4

~>

w
u.
w

=~.75V

?

~ 6 3~~:t::::t::::t:::jt:::J

-

r--

5r----r--r---~--r__-~

~

1-

Vee = 5.25V
VRT = 5.000V
VRB = 4.000V

II!

~

Fig. 10 - DIGITAL HIGH·LEVEL OUTPUT
VOLTAGE vs. TEMPERATURE

Fig. 9 - REFERENCE CURRENT
VS. TEMPERATURE

1/---+--t---t----II---.;

(;

0

-25

o

Ci
50

25

75

~~5-~0~--:2~5---;5~0-~75~~1~00

100

TEMPERATURE T A (oel

TEMPERATURE TA (oel

Fig. 11 - DIGITAL LOW·LEVEL OUTPUT
VOLTAGE vs TEMPERATURE

0.5

I-

=>

1=
=>

0>
..J-

W ..J

>
0
w>

0.4 r

I
Vee = 4.75V
VRT = 5.000V
VRS = 4.000V

0.3

..J

3:
0' ~

..J;::

0.2

..J..J

;::
(;

Ci

~

O. 1

o
-25

o

25

50

TEMPERATURE TA (Oel

7-84

75

100

1IIIIIIIIIIIIIIIIIImllllllllilimmlllllllilim

FUJITSU

MB40S 76 1111111111111111111111111!lllllllmlllmllllllll~

Fig. 12 - DELAY TIME
50
Vee

~

VS.

TEMPERATURE

I.

.E.

5.00V

V RB

~

:i:

tpLH

20

i=
~

30

~
i=

20

>-

::s

10

-'
w

o

j.

10

o

o

o

50

25

75

o

3.5

100

Fig. 14 - CLOCK PULSE WIDTH
vs. TEMPERATURE
10

~

3
)

Vee 5.00V
8 r- V RT ~ 5.000V
VRB ~ 4.000V

J:

6

b

~

w

'"::>-'
Q.

tw+

l...-;-:'"
w

4

g
}

--

~

4.0

V RT ~ 1-5.000V
V RB ~ 4.000V
TA ~ 25°C

8

6

tw+

~

-'

tw -

4

II:

u

2

o
-25

-'

o

u
25

75

50

J:

.r

--

D

~

4.0

4.5

5.0

5.5

6.0

POWER SUPPLY VOLTAGE Vee (V)

Fig. 16 - MAXIMUM CONVERSION RATE
VS. TEMPERATURE

50

w

-

f-

~ 40

z

o
en 30 ia:
w

I

Vee ~ 5.00V
V RT ~ 6.000V
VAB ~ 4.000V

>

is

6.0

0

3.5

100

TEMPERATURE T A (oC)

~

5.5.

10

12

U

u

5.0

Fig. 15 - CLOCK PULSE WIDTH vs. POWER
SUPPLY VOLTAGE

~

2

0

4.5

J:

b

~

II:

g

tpLH-

POWER SUPPLY VOLTAGE Vee (V)

TEMPERATURE T A (OC)

~

tPHL

w

-25

.E.

---

:::::::...

tPHL

~

~

~15.000V

J: 40 -VRB ~ 4.000V
~
TA ~ 25°C

..,..,

4.000V

:i: 30
..J

VRT

..J

.E. 4Or- V RT ~ 5.000V
..J
J:
~

Fig. 13 - DELAY TIME VS. POWER
SUPPLY VOLTAGE

-;;; 50

20

--

u
:;;
::> 10
:;;

X
« 0

:;;

-25

o

25

50

75

100

TEMPERATURE TA (OC)

7-85

~~~lmml~llm~llIIllllm~~11
FUJITSU

ml~IIIIIIIIIIIIIMil!11 MB40576

PACKAGE DIMENSIONS
16·LEAD PLASTIC DUAL IN·LINE PACKAGE
(CASE No. : DIP·16P·M04)

.010•. 002
(0.25.0.05)

.039~~'2
(0.99~g·3)

IfII

Dimensions in
inches (millimeters)

©FUJITSU LIMITED 1986 D16033S·2C

7-86

1111!111111111111111111~1111111~llllllllmllllll
FUJITSU

MB 40576 11~~~~~~~~i~I~~~~ill~iIOOI~

PACKAGE DIMENSIONS (continued)
16-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT-16P-M03)
1·122(3.10)MAX
(SEATED HEIGHT)

J

Ird

u:

.402±.016

".,~.~,

.050(1.27)1
TYP

I.

.---+~::::SI.n

lJ

.002(0.OS)MIN
(STAND OFF) View "A"

.362>.012
(7~~~~~j~) (9.20.0.30)

INDEX

I

.1 --II ..(0.45±0.10)
018>.004 f¥j¢.005(0.13)@1
.SOO~:~g (12. 70 :g:~~)

t-I

~t--

•

.007(0.18)
MAX
.027(0.68)
MAX

1

~~'''"",MA>
. __ _OtOO4IO.10J, __
.3S0(B.B9)REF
©FUJITSU LIMITED 1988 F16008S-2C

.0S1±.00B
(1.3> 0.2)
Dimensions in
inches (millimeters)

7-87

Data Conl/9rsion

7-88

Linear Data Book

MB40578
MB40578-7
March 1988
Edition 2.0

8-BIT ULTRA HIGH SPEED VIDEO AID CONVERTER
The Fujitsu MB 40578 is a low power ultra-high speed video A/D converter
fabricated with Fujitsu Advanced Bipolar Technology. The MB 40578 also
adopts the fully-parallel comparison technique (flash method) for high speed
conversion and can convert wide band analog signal such as video signal to
digital signal at a sampling rate of DC through 20 Mega-samples/sec. Because of
such high-speed operation. the MB 40578 is suitable for digital video applications such as the digital TV. video processing with computer. or,radar signal
processing.

Resolution:

8 bits

•

Linearity Error:

±O.2% (MB40578)
±O.4% (MB40578-7)

•

Maximum Conversion Rate:

•

• Analog Input Voltage:
•

TTL

Digital I/O level:

PLASTIC PACKAGE
DIP-22P-M04

20 MSPS min.
3.0V to 5.0V

• Single Power Supply:

+5V

• Power Dissipation:

480 mW typo

• Package:

Standard 22-pin DIP Package: Suffix: -P

D

PIN ASSIGNMENT

O.GNO

A.GNO

(LSB) 08

VCCD

07

VCCA

ABSOLUTE MAXIMUM RATINGS (See NOTE)

Os

V RB

V1NA

Symbol

Value

Unit

05
04

VINA

Power Supply Voltage

VCCA
V CCD

-0.5 to +7.0

V

03

V RM

02

VRT

Digital Input Voltage

V 1ND

-0.5 to +7.0

V

(MSB) 0,

Analog Input Voltage

V 1NA

-0.5 to Vcc+0.5

V

eLK

V RT • V RB

-0.5 to V cc +0.5

V

T STG

-55 to +125

°c

Rating

Analog Reference Voltage
Storage Temperature

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absollJ'te maximum rating conditions for extended
periods may affect device reliability.

O.GNO

VCCA
VCCD
A.GNO

This device contains circuitry to protect the
inputs against damage due to high static volt-

ages or electric fields. However. it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-

mum rated voltages to this high impedance
circuit.

7-89

Fig. 1 - MB 40578 BLOCK DIAGRAM

eLK

VINA
VRT
R,
D, (MSBI
R
D2
R
D3
LATCH

255 to 8

R/2

V RM

D4

&

ENCODER

BUFFER

R/2

D5
D6

R

D7

R

Ds (LSBI

R2

VRS

i

VCCD

7-90

i

VCCA

i

1

D.GND A.GND

Imllmllllllllllmllllllmmmm~1111111111

=::g~~1-7 1IIIIIm.I~1
RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Min

Value
Typ

Max

5.00

5.25

V

5

V

5.1

V

Unit

Power Supply Voltage"'

V CCA
V CCD

4.75

Analog Input Voltage"

V1NA

3

Analog Reference Voltage (Top side)"

V RT

Analog Reference Voltage (Bottom side)"

V RS

2.9

Digital High·level Output Current

IOHD

-400

Digital Low·level Output Current

IOLD

Clock Pulse Width at High Level

t w+

25

ns

Clock Pulse Width at Low Level

t w-

25

ns

Operating Temperature

TA

0

NOTE: "
"

5

3

V
jJA
4

70

rnA

°c

Please keep VCCA and VCCD at the same potential.
VRS < V1NA < VRT• VRT - VRS = 2V ± 0.1V.

7-91

1IIIIIIIIIImmlillmlllllllllilimmmmi

~lm~_~111 ==:8~~1-7
ELECTRICAL CHARACTERISTICS
ANALOG DC CHARACTERISTICS

(Vee

=4.75 to 5.25 V, TA =0 to 70°C)
Value

Parameter

Symbol

Condition

Unit
Min

Typ

-

Resolution

8

MB40578
Linearity Error

Max
bits

±0.2
LE

DC

%

M840578·7

±0.4

Equivalent Analog Input Resistance

RINA

Analog Input Capacitance

C INA

Analog High·Level Input Current

Kn

50
120

230

pF

IIHA

150

pA

Analog Low·Level Input Current

liLA

145

pA

Reference Current

IRB

V RT = 5 V
V RB =3 V

-15

DIGITAL DC CHARACTERISTICS

-9

mA

(Vee = 4.75 to 5.25 V, TA = 0 to 70°C)
Value

Parameter

Symbol

Condition

Unit
Min

=-400pA

High·Level Output Voltage

VOHO

IOH

Low·Level Output Voltage

V OLO

IOL = 1.6 mA

High·Level Input Voltage

V IHO

Low·Level Input Voltage

V ILO

Maximum Input Current

110

VIO

High·Level Input Current

IIHO

V IHO = 2.7 V

Low·Level Input Current

IILO

V ILO

Power Supply Current

Icc

7-92

Typ

Max

2.7

V
0.4

2

V

=7 V

=0.4 V

0
-400

V

0.8

V

100

pA

20

pA

-40
92

pA
160

mA

111~~~mlm~~llllllllllllm~mmm~~~

=lagg~:-7

1IIIIIIrnRIlm

ELECTRICAL CHARACTERISTICS (continued)
SWITCHING CHARACTERISTICS

(Vee = 5 V, TA = 25°C)

Value
Parameter

Symbol

Condition

Unit
Min

Typ

Maximum Conversion Rate

FS

20

30

Digital Output Delay Time

tpd

5

15

Max
MSPS

40

ns

TIMING DIAGRAM

3V

elK
OV

VINA

3V

DATA
N-l

0, to DB

DATA
N

1.5V

~~;rA

OV

tpd

7-93

MB40578
MB40578-7

Fig. 2 - ANALOG INPUT EQUIVALENT CIRCUIT

VCCA

0------.--+-..,--

VCCAo---------~--

Vo

A.GND

X255 CIRCUITS

CINA : Non-linear Emitter-follower Junction Capacitance
RINA : Linear Resistance Model for Input Current Transition by Comparator Switching:
Infinite value for V IN
V RB or when CLK = High
V RB : Voltage at V RB terminal
I BIAS : Constant Input Bias Current
Vo:
The base-collector junction diode of emitter-follower transistor.

<

l1li

Fig_ 3 - QIGITAL INPUT EOUIVALENT

Fig. 4 - LOAD CIRCUIT FOR OUTPUT BUFFER

Measurement

VCCAo--~--~--~-

point

Vcco

To Output pin o--~~t--t

INPUT

VREF = 1.4 V

D.GND
A.GND

7-94

Note: RL = 2kn
CL s 15pF including scope and jig capacitance
Diodes: IN3064 or equivalent

1llllllllllllllllllllllllllllllllllllm~mllllll

MB40578
FUJITSU
MB40578-7 Imlllllmlllmlm~mmlloo~lm~~~~~

OUTPUT CODE

(Vee = 5.0 V. VRT =, 5.0V. VRB ~ 3.0V)
Step

Analog Input Voltage

Digital Output Code

0

2.960 V

00000000

1

2.968 V

00000001

127

3.976 V

01111111

128

3.984 V

10000000

129

3.992 V

10000001

254

4.992 V

11111110

255

5.000 V

11111111

Note: Ajust VZT = 2.964 V and VFT = 4.996 V with VRT and VRB • The Analog Input
Voltage are the center values of each step.

CHARACTERISTICS

CHARACTERISTICS
STep OUTPUT CODE

III

Fig. 6 - PRACTICAL CONVERSION

Fig. 5 - IDEAL CONVERSION

STep OUTPUT CODe

255

11111111

255

11111111

254

11111110

254

11111110

253

11111101

253

11111101

129

10000001

129

10000001

128

1 0000000

128

10000000

127

01111111'

127

01111111

2

00000010

2

00000010

1

00000001

1

00000001

o

00000000 ....L-"--------4-.9-96~V­

o

oooooooo-L,.IL--=-'-------~-

Input Voltage VINA

Input Voltage VINA

Linearity Error

I LEn I max.
I FS I

7-95

ml~~llllllm~~IIIIMmm~1111
FUJITSU

I~Mmil~lIllllm!MI

=884 0578-7
0578

PACKAGE DIMENSIONS
22-LEADS PLASTIC DUAL IN L
(CASE No.: DIP-22~"'::) PACKAGE

.050(1.27)MAX

.100(2.54)

TYP

I
~imensions

in

Inches (millimeters)

7-96

MB 4072
April 1984
Edition 1.0

HIGH-SPEED 8-BIT MULTIPLYING D/A CONVERTER
The Fujitsu MB 4072 is a High-Speed Digital to Analog Converter IC. The
MB 4072's current outputs are high impedance open-coliector, which provide
voltage output with a load or current to voltage converter for various applications with operational amplifiers, microcomputers, etc.
Threshold level of digital inputs is variable with the level control input for
various interface level.
•

Settling Time

•

Li nearity Error

: 85 ns
: ±0.19% max.

•

Full-scale Temperature coefficient

: ±10 ppmfC

•

Output Voltage Compliance

:-10Vto+18V

•

Multiplying Operation

•

True/Complimentary Current Sink Output

•

Adjustable Threshold Level of Digital Inputs: Interface directly with TTL,

•

Wide Supply Voltage Range

: ±4.5 V to ±18 V

CERAMIC PACKAGE
DIP-16C-C02

PLASTIC PACKAGE
DIP-16P-M02

CMOS, ECL, etc.
•

Low Power Consumption

: 33 mWat ±5V

•

Operation Temperature

: -40°C to +85°C

•

Package

: Standard 16 pin DIP

•

Compatible with DAC-08

ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Parameter
Supply Voltage
Digital Input Voltage
Threshold Control Voltage
Reference Input Voltage
Differential Reference Input
Voltage
Reference Input Current
Power Consumption
Storage Temp.

II Ceramic
Plastic

PIN ASSIGNMENT

Symbol

Ratings

V+toV

V- to V-+37

V

V,

37

V

VLC

V LC

V- to V+

V

'OUT

V REF (+)

V to V+

V REF (-)

V- to V+

V

V REF (+) to V REF (-)

±18.5

V

Unit

V

VlOUT

(MSB)Bl

COMP
VREF(_)
VREFI+)
v+
B8(LSB)

B2

B7

IREF

5

mA

B3

B6

Po

500

mW

B4

B5

-55 to +150

°c

-55 to +125

°c

TSTG

ID

PLASTIC PACKAGE
FPT-16P-M02

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum fated voltages to this high impedance
circuit.

7-97

ImWII.III~lllnOOM
FUJITSU

.11.111111.

MB 4072

Fig. 1 - BLOCK DIAGRAM

LSB

v+

COMP

B3

B5

B4

B6

B7

B8

V-

RECOMMENDED OPERATING CONDITIONS
Value
Parameter

Unit

Symbol
Min

Supply Voltage

Operating Temperature

7-98

Typ

Max

V+

+4.5

+18

V

V-

-4.5

-18

V

TA

-40

+85

°c

1111111111111111111111111111110011111

FUJITSU

MB 4072

IIIIIIWWOOIIIWWIIWWWIWII

ELECTRICAL CHARACTERISTICS

(Recommended Operating Conditions unless otherwise noted. V· = +15 V, v- = -15V, IREF = 2.0 rnA, T A = _40°C to +85°C)
Value
Parameter

Symbol

Unit
Min

Typ

Max

Resolution

8

8

8

bits

Monoton icity

8

8

8

bits

Linearity Error
Settling Time (Final Value: ±112 LS8,T A =25°C,
On/Off Switching for Each bit/All bits)

LE

±O.19

%(FSR)

ts

85

150

ns

Propagation Delay Time (TA =25°C,
On/Off Switching for Each bit/All bits)

t pLH
tpHL

35

60

ns

Temperature coefficient at full-scale

TC'FS

±10

±50

ppmrC

OutpUt Voltage. Range
(bol Fs 1/2 LSB, ROUT 20 MO tyP.)

Voc

+18

V

Output Current at full-scale (V REF = 10.000 V,
R14 = 5.000 kO, R15 = 5.000 kO, TA = 25°C)

I Fs4

Symmetry at full-scale (JFss=I Fs4 -I Fs2 )

I Fss

±1.0

±8.0

IlA

Output Current at zero scale

I zs

0.2

2.0

IlA

-10

1.94

1.99

2.04

mA

Output Current Range
(R14 = 5.000 kO, R15 = 5.000 kO,
V REF = +15.0 V, V- = -10 V)

10Rl

2.1

mA

Output Current Range
(R14 = 5.000 kO, R15 = 5.000 kO,
V REF = +25.0 V, V- = -12 V)

IOR2

4.2

mA

Low·level Input Voltage (VLC = 0 V)

V'L

High·level Input Voltage (V LC = OV)

V'H

Low·level Input Current
(VLC = OV, V'N = -10 V to +0.8 V)

I'L

High·level Input Current
(V LC = 0 V, V'N = 2.0 V to 18 V)

I'H

0.8

V
V

2.0
-2.0

0.002

-10

IlA

10

IlA

7-99

11••1111111111
F'V,JITSU

. . . . MB4072

ELECTRICAL CHARACTERISTICS (Cont'd)
(Recommended Operating Conditions unless otherwise noted. v+ = +15 V. V- = -15 V. IREF = 2.0 mAo TA = _40°C to +85°CI
Value
Parameter

Symbol

Unit
Min

Logic Input Voltage Range (V- = -15 VI
L~iC Threshol~ Voltage Rnage

(

=+15V.V =-15VI

Reference Input Through Rate
(REa = 200
RL = 100
CL = 0 pFI

n.

n.

Max

VIS

-10

+18

V

V THR

-10

+13.5

V

115

Reference Bias Current

Typ

-dldt

-1.0
4.0

-3.0

8.0

IlA
mA/lls

Supply Voltage Sensitivity'
(V+ = +4.5 V to 18 V. IREF = 1 mAl

PSSI FS+

±0.0003

±0.01

%/%

Supply Voltage Sensitivity'
(V- = -4.5 V to -18 V.IREF = 1 mAl

PSSI FS -

±0.002

±0.01

%/%

1+

2.3

3.8

mA

1-

-4.3

-5.8

mA

1+

2.4

3.8

mA

1-

-6.4

-7.8

mA

(V+ = +5 V. V-= -5 V.
IREF = 1.0 mAl

(V+ = +5 V. V- = -15 V.
Supply Current

IREF = 2.0 mAl

1+

2.5

3.8

mA

IREF = 2.0mAI

1-

-6.5

-7.8

mA

(V+ = +5 V. V- = -5 V.
IREF = 1.0 mAl

Po

33

48

mW

(V+ = 5 V. V- = -15 V.
I REF =2.0mAI

Po

103

136

mW

Po

135

174

mW

(V+ = +15 V. V-= -15 V.

Power Dissipation

(V+=15V,V-=-15V.
IREF = 2.0 mAl
*Nota: PSSI FS =

7-100

(AI~S

x 100111181-54.5 x 1001

111111••I ••llllllllllllllml
FUJITSU
MB 4072 IIII.I~••II.III••III!

PACKAGE DIMENSIONS
16-LEAD CERAMIC (CERDIP) DUAL IN-LINE PACKAGE
(CASE No. : DIP-16C-C02)

I

R.025(0.64)

REF

.264(6.71)

---r-.--r,--,-~~r--T"""T.....-:.

i"-r-T"""T---,...........

I

LJLJLJLJLJLJ
.754(19.15)
.788(20.02)

.281

r

14)

•

-jH---------------,-~
.200(5.OB)MAX

.120(3.05)
.150(3.81)
.090(2.29)
.110(2.79)

.020(0.51)
.050(1.27)
.013(0.33)
.023(0.58)

Dimensions in
inches (millimeters)

7-101

-

FU.JI"I'S11

. . . . MB4072

PACKAGE DIMENSIONS
16-LEAD PLASTIC DUAL IN-LINE PACKAGE
(CASE No. : DIP-16P-M02)

.290(7.371
.310(7.87)
INDEX

.050 11.27) MAX

.172(4.36)MAX

.118 (3.00) MIN

.100 (2.54)
TYP

.020(0.51) MIN
Dimensions in
inches (millimeters)

7-102

1~~IIWIII~I~WIIWIMllli
FUJITSU

MB 4072 11111111111111111111111111000MIII~

PACKAGE DIMENSIONS
16-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT·16P·M02)

.382(9.7)

~R!: : ! : ~": : !:!: :~AI R~~.
!:!:::::!:!R

.002(0.05)
MIN

(STAND OFF)

1

l

DBtail of "A" part

·29H7.4)
.323(8.2)
.197(5.0)

.260(6.6)
.283(7.2)

56
. )

IIn==;:r=;:r:::::;:;::::::;:;=;:r=;;;=;:;y-..:1

AI" I"
.050(1.27)1
TYP

.1 JI .

014(0.35)
.022(0.55)

.024(0.6)
.039(1·0)

-1"-

~""031
::=---r.

028 (0.7)

.005(0.13)
.008(0.20)

.020(0.5)
.007(0.18)

MAX
.027(0.68)

MAX

.085(2.15)

MAX

Dimensions in
inches (millimeters)

7-103

Dars Cooll9rsion

7-104

Linear Dars Book

MB88301A
August 1987
Edition 3.2

NMOS 13-BIT x 1-CHANNEL,
6-BIT x 3-CHANNEL D/A CONVERTER
The Fujitsu MB 88301 A, a pulse width modulation (PWM) type digital-toanalog converter (DAC), is designed for interface with Fujitsu's MB 8840/
8850 series and MB 88400/88500 series 4-bit single-ship microcomputers and
also with a wide range of general 4-bit and 8-bit microprocessors.
The MB 88301A has four conversion outputs: one 13·bit resolution output
and three 6·bit resolution outputs. All outputs generate positive pulse of
varying pulse widths. The pulse widths vary in propotion to digital data pro·
grammed by the processor in the internal data register. With the connection of
external filter circuits to the outputs, the MB 88301 A provides an excellent,
easy·to-configure DAC.

PLASTIC DIP
DIP-16P-M02

FEATURES
•

Pulse width modulation D/ A converter

•

4·bit parallel address/data loading

•

Four on-chip pulse width modulators:
- 13·bit resolution x 1 channel

PLASTIC SOP
FPT-16P-M02

- 6·bit resolution x 3 channels
•

On·chip 4 MHz clock generator with external crystal or ceramic resonator

•

Clock cycle time/Clock frequency:

PIN ASSIGNMENT

0.25Ils/4MHz for 13-bit resolution
0.50Ils/2MHz for 6-bit resolution
•

Three synchronization clock outputs:

LOI

2MHz clock output (4MHz divided by 2)
15.625kHz clock output (4MHz divided by 28

Vee
OAC4

)

011

OAC3

013

OACl

488Hz clock output (4MHz divided by 213 )
OAC2

•

Single buffered conversion outputs.

•

High·voltage open·drain conversion outputs

•

Wide operating temperature range: _30°C to +70°C

•

Single +5V power supply

•

TTL compatible inputs/outputs

•

N·channel sil icon·gate E/D MaS process

•

Two Package Options:

TM03
TM02
TMOl

This device contains circuitry to protect the
inputs against damage due to high static volt-

16 pin plastic DIP (Suffix: ·P)

ages or electric fields. However, it is advised

16 pin plastic SOP (Suffix: ·PF)

that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedance

circuit.

7-105

11I1IIi._
FUJITSU

. . . . MB88301A

Fig. 1 -

LOGIC SYMBOL
+5V

vcc
EXTAL
4MHz CI

OACl

XTAL

OAC3

OAC2

}~

OUTPUTS

OAC4
MB88301A
PROCESSOR {
INTERFACE

TMOl
TM02 }

LOI

TIMING
OUTPUTS

TM03
Vss

Fig. 2 - BLOCK DIAGRAM

013-010

"--i!--------,

LOI

TIMING
CONTROL

~-4--<-"TMOl

[~~~~~~~~~~~~~~==========~~+=~TM02
TM03

EXTAL

OACl
4MHz
CLOCK
GENERATOR

INTERNAL
CLOCK

l - - - - - -....

~---_+_.. OAC2

OAC3
~---;_OAC4

. . . . _ _ _ • • • _ • • _ _ _ • • • • _ _ _ • • _ _ • • • • • • •_ _ _ _ • • _ _ _ _ _ _ _ _ _ _ _ • • • • • • • • 0 • • • • • • _ - _ . _ - . - - • • • • • - • • • • • • - • • • • • • • • • • • _ _ • • • • _ - - - • • _ _ • • • _ _ _ • • • • • • • • • • • • _ _ _ • • _ _ • • • • •

7-106

1~IIIIIMMMMllmMIIII~
FUJITSU

MBBB301A

1I11I1I1111111111111111111111111111111111

PIN DESCRIPTION
The MB 88301A has two interfaces: One is the processor interface; 03-00 and LOI, which are used for the processor to load
the MB 88301A device with address and data. Another is the OAC/TIMING interface; OAC4-0ACl and TM03-TM01, which
are used for connection with user-designed external low-pass filter.
Table 1 - PIN DESCRIPTION
Pin No.

Type

Vee

16

-

+5V power supply pin.

Vss

8

-

Ground pin.

XTAL

7

-

EXTAL

6

-

Symbol

Function

External 4MHz crystal or ceramic resonator pins for the on-chip
clock generator.

4-bit parallel address/data input: The address/data format is that
013 is the most significant bit (MS8) and that 010 is the least
significant bit (LSBI. These inputs are TTL compatible.
013-010

5 to 2

I
MSB

I
LDI

1

I

12 to 15

0

013

LSB

I

012

I

011

I

010

I

Write strobe input for a 4-bit address/data: At the leading edge of
LOI, a 4-bit address on the 103 to 100 inputs is latched into the
internal address register. At the trailing edge of LOI, a 4-bit data on
the 013 to 010 inputs are written into the internal data register
designated by the address latched at the leading edge. This input is
TTL compatible.
Pulse width modulator outputs (OAC outputs):

OAC1-0AC4

OAC1:

13·bit resolution (one channel)

OAC2·0AC4: 6-bit resolution (three channels)
All four outputs are high-voltage open drain.

TM01-TM03

9 to 1;

0

Synchronization clock outputs (Timing outputs):
TM01: 2MHz (4MHz divided by 2)
TM02: 15.625kHz (4MHz divided by 2")
TM03: 488Hz (4MHz divided by 2'3)
All three clocks have a duty ratio of approximately 50%, and are
TTL compatible.

7-107

1IIIIIIIIlInnlWIIII
FUJITSU

1IIIIIIIIIIIIWllllllllnllllili MB88301A'

FUNCTIONAL DESCRIPTION
GENERAL OPERATION
The MB 88301 A is a pulse width modulation (PWM) type
digital-to-analog converter (DAC). It converts digital data
programmed by the processor in the internal data register
(l3-bit or 6-bit write-only register) into positive pulses. The
width of these pulses is propotional to the value of the programmed data, and the cycle time of the pulses is defined by
the resolution value (6 or 13 bits). The MB 88301 A has four
conversion outputs: channel 1 is a 13-bit resolution output
DAC1, and channel 2 to 4 are 6-bit resolution outputs DAC2
to DAC4. The converted waveform appears at each DAC output. A user-designed external low-pass filter connected to the
DAC output eliminates AC components from the output
waveform and converts the waveform into a DC voltage
propotional to the pulse width.

Fig. 5 shows the internal data register address map: The
whole space size is 10 words. Addresses #0 to #3, addresses
#4 and #5, addresses #6 and #7, and addresses #8 and #9
are assigned to DAC1, DAC2, DAC3 and DAC4, respectively.
Fig.6 shows the internal data register format: To the DACl
data register, three 4-bit and one l-bit digital data must be
written. To the DAC2 to DAC4 data registers, one 4-bit and
one 2-bit digital data must be written.
Fig. 5 - INTERNAL DATA
REGISTER ADDRESS MAP

1

#0
#1

DIGITAL DATA INPUT

#2

Fig. 3 shows the input timing of digital data to be converted:
Digital data to define the width of the positive pulse is
written into the 13-bit and 6-bit internal data registers
through the 013 to 010 4-bit address/data inputs using the
write strobe input LDI. At the leading edge of LDI, a 4-bit
address on the 013 to 010 inputs is latched into the internal
address register. At the trailing edge of LDI, a 4-bit data on
the DI3 to 010 inputs is loaded into the internal data register
designated by th~ address register.

#3

,-I

#4

#5

l".;~

#6
#7

',';~L:I

#8
#9 n,':0~,S1

~'

(Channell)

OAC2 (Channel 2)

--t
-i

(Channel 3)

C3

~C4 (Channel 4)

Fig. 4 shows the address/data format: 013 is the most significant bit (MSB) and 010 is the least significant bit (LSB).

Fig. 3 - ADDRESS/DATA INPUT TIMING

Fig. 6 -

INTERNAL DATA REGISTER FORMAT

"'1.~----13-Bit Data Register'------I-I

LOI

MSB

013-010

LSB

r-6-Bit Data Register-j
MSB
LSB

Data
Latch

Address

Latch

Fig. 4 -

ADDRESS/DATA FORMAT

OAC2

I ~5 I : ~4

:

I

j-6-Bit Data Registe,"1
MSB
LSB

OAC3

I ~7 I : #:6

:

I

j-6-Bit Data Registe'--1
MSB
013

7-108

MSB

LSB
012

011

010

OAC4

I #:9 I : #:8

LSB

:

I

1IIIIIIIIIIIIIIIIIIIIIIIImllllllllllili
FUJITSU

MB88301A

1I11I11I1111111111111111111111111111111111

PULSE WIDTH MODULATION/DAC OUTPUT WAVEFORM Fig .
• 13-Bit Resolution D/A Converter: DAC1

• 6-Bit Resolution D/A Converters: DAC2 to DAC4

Fig. 7 shows the configuration of the 13-bit resolution pulse
width modulator: The on-chip clock generater provides
4MHz clock for the 13-bit free-running counter. When all bits
of the counter is zero, the all-zero detector sets the output RR-S flip-flop. The coincidence detector compares the counter
with the data -register. When they match, the coincidence
detector resets the output flip-flop. The waveform appearing
at the DACl output depends on the data register value,
shown in Fig. 8.

Fig. 9 shows the configulation of the 6-bit resolution pulse
width modulator: The 2MHz clock that is the output of
Bit 1 of the 13-bit free-running counter drives the 6-bit freerunning counter. This 6-bit counter is also part of the 13-bit
counter (Bits 2 to 7). The comparator compares the counter
with the data register every cycle. When the counter value is
equal to or less than the data register value, the comparator
outputs a high level at the DAC output. When the counter
value exceeds the date register value, the comparator outputs a low level at the DAC output. This produces the waveforms at the DAC2, DAC3, and DAC4 outputs, shown in
Fig. 10.

Fig_ 7 - 13-BIT PULSE WIDTH MODULATOR
CONFIGURATION

Output

Fig_ 9 - 6-BIT PULSE WIDTH MODULATOR
CONFIGURATION

S-R F/F

DAC2
(DAC3)
(DAC4)

Fig_ 10 - DAC2/DAC3/DAC4
OUTPUT WAVEFORM

Fig_ 8 - DAC1 OUTPUT WAVEFORM

NOTES:

REGI~ER

N:

DATA

T :

PULSE CyCLE TIME (T"

tH

tCLK :

(j),
@:

VALUE

IO~N~2'3_11

2'3.t~LK -: 2.048ms)

PULSE WIDTH (tH '" (N+1)' teL)()
COUNTER CLOCK CYCLE TIME hCLK= 1/4MHz = O.2f¥,1s)

COUNTER IS ZERO.
COUNTER MATCHES DATA REGISTER.

NOTES:

DATA REGISTER VALue (o::s:: N::S:: 26_11
PULSE CYCLE TIME (T = 26
32J,ls)
tH : PULSE WIDTH (tH = (N+l)' tCLKI
tCLK: COUNTER CLOCK CYCLE TIME (tCLK = 1/2MHz = O.5~s)
N:
T:

(j),

®,

·t";LK-:

COUNTER IS ZERO. (OVERFLOW)
COUNTER EXCEEDS DATA REGISTER.

7-109

.1111111_1
FUJITSU

1IllllnilMIMIlIIIIIII

MB88301 A

EXTERNAL FILTER CONFIGURATION
The on-chip pulse width modulator generates positive pulse
waveforms similar to the one shown in Fig. 12 at the DAC
outputs (DACl to DAC4). The pulse width (t H ) is proportional to the digital data programmed into the data register.
The cycle time (TI is determined by the resolution value
(6 or 13 bits).
User-designed low-pass filters are required at the DAC
outputs to eliminate AC components from the output
waveform and to convert the waveform to a DC voltage.
Fig. 11 shows an example of a simple output configuration in
which an RC integrator is used as the low-pass filter. With
this circuit, the DAC waveform shown in Fig. 12 is converted
to the VOUT output waveform shown in Fig. 13 Ripple and
response time (tR I depend on the time constant of the RC
filter. A longer time constant reduces ripple but increases
response time. A time constant that best meets the tradeoff
between desired accuracy and response time should be
chosen. Also, since the DAC outputs are high-voltage open
drain, they can externally be pulled up to a power supply
higher than 5V. This prevents the output voltage from
attenuating through the external low-pass filters.

1. Not use data of "1 FFF", or
2. Change the DACl data register value (i.e., "1 FFF"1 just
before the counter become full (i.e., all bits are set). Since
in this case an undesired pulse due to the data change may
appear at the DACl output, the pulse must be eliminated
with the external filter.

Fig_ 11 MB 88301 A

OUTPUT CIRCUIT CONFIGURATION
(EXAMPLE)

--r-

NOTICE

Also, note the following thing when the DACl output is
used: In the steady state where the DACl data register bits
are all set (i.e., data is "1 FFF"1 the DACl output remains
high. But, when the data is updated, there is a possibility
that the DACl output may become undefined during that
output cycle time (less than one cycle timel. To avoid this
phenomenon, the following method is utilized:

7-110

I

Vee

i
DAC1-DAC4

'

I

R

I

~---L~~-_l

I

R

'

I

~----+-~I~VVV-~--+-9VOUT

I

i

C

T

Ii

~I'
L ______ .J I

I

Note:
The low-pass filter shown in Fig. 11 is just an example. In
actual practice, depending on the user's system design,
additional amplifiers, mUlti-stage filters, and other circuits
will be needed for the external low-pass filter.

To change the DC output voltage of the external low-pass
filter, the data register value must be updated to vary the
positive pulse width (duty ratio I of the DAC output. However, all bits on the data register can not be changed at the
same time. They are updated a nibble at a time by the 4-bit
parallel data loading. In addition, the DAC output is single
buffered. Because of this nibble-by-nibble update and single
buffering, the data register value during update may become
transient. During this pulse cycle, depending on the transient
value, an undesirable duty ratio disturbance may occur at the
DAC output, affecting the filter output. It is therefore necessary to design the output filter so that such disturbances in
the DAC output waveform will not appear at the filter output. This notice applies to both the 13-bit and 6-bit resolution converters. With the 13-bit resolution converter, however, it is possible to avoid such disturbance by software.
This is done by controlling the update timing of the data
register value through monitoring of the DACl output and
the TM03 output waveforms.

External Output Circuit

I

RL

: Pull-Up resistor

LPF

: Low-pass filter

VOUT : LPF output voltage

Fig_ 12 - DAC OUTPUT WAVEFORM

t H: Pu Ise width

T : Cycle time

Fig_ 13 - VOUT OUTPUT WAVEFORM
VOUT

01

I

~tR----l
tH/T : Duty ratio

tR : Response time
t: time

IIIIIIIIIIIIIIIIIIIIIIIWIIIIIIIIIIII
FUJITSU

MB88301A

111001111111111111111111111001111111

ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Input Voltage
Output Voltage

Symbol

Rating

Unit

Vee

Vss -0.3 to Vss +8.0

V

Vee

VIN

Vss -0.3 to Vss +8.0

V

D10-D13, LDI,
EXTAL, XTAL

V OUT

Vss -0.3 to Vss +15.0

TA

-30 to +70

Storage Temperatu re

Tstg

-55 to +150

NOTE:

Vss =0 V

DACI-DAC4

V

Vss -0.3 to Vss +8.0

Operating Temperature

Pins/Conditions

TM01-TM03

°c
°c

Ambient temperature

Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation
should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol
Vee

Supply Voltage

Value
Min.

Typ.

Max.

4.5

5.0

5.5

Unit

V

0

\Iss
Input High Voltage

V IH

2.0

Vee

V

Input Low Voltage

V IL

-0.3

0.8

V

Clock Frequency

fc

0.5

4.0

MHz

TA

-30

70

°c

Operating Temperature

NOTE: * Crystal or ceramic resonator should be used. See Fig. 17.

DC CHARACTERISTICS
(Recommended operating conditions unless otherwise noted.)
Parameter

Output High Voltage

Symbol

VOH

Pins/Conditions
TM01-TM03
IOH = - 2OOIlA
DACI-DAC4

Value
Min.

Typ.

2.4

VOL

Output Leakage Current

'LOH

DACI-DAC4
V OH = 13.2V,
OFF State

Supply Current

Icc

Vee = 5.5V,
All Outputs Open

Unit

V
Open Drain

TM01-TM03
IOL = I.SmA
DACI-DAC4
IOL = 2.0mA,
5kU External
Pull Up Resistor

Output Low Voltage

Max.

15

0.4

V

0.8

V

50

IlA

25

rnA

7-111

-

F UJITSU

. . . . MB88301A

AC CHARACTERISTICS
(Recommended operating conditions unless otherwise noted.)
Parameter

Min.

Max.

Unit

Symbol

Pins/Conditions

LDI Pulse Width

PWL0 1

LDI
Fig. 14, Fig. 16

LDI Rise/Fall times

t,LOI
tfLOI

LDI
Fig. 14, Fig. 16

Address/Data Setup Time

ts

D13· DIO
Fig. 14, Fig. 16

0.5

Ils

Address/Data Hold Time

tH

D13·D10
Fig. 14, Fig. 16

2

IlS

TMO Rise/Fall times

t,TMO
tfTMO

TM01·TM03
Fig. 15, Fig. 16

5

Ils

1.5

0.2

Fig. 14 - ADDRESS/DATA INPUT TIMING
tfLOI

trLDI

-I-+O-----'WLOI-----If-+----IPWLOI---~

IfJI

LOI

~------..II

013·010

Fig. 15 -

SYNCHRONIZATION CLOCK OUTPUT TIMING

,

2.4V

2.4V
TM01-TM03
0.4V

t,TMO-

7-112

~

~

-

0.4V

i+--tfTMO

O.BV

IlS

IlS

1IIIIIIIIIIIIOOII~IIIIIIOOIIIII
FUJITSU

MB88301 A ~MMIIIIIIIIIIIMIIMIIIIIIMI

Fig. 16 -

AC TEST CONDITIONS

!INPUT CONDITIONS!

2.DV

•

D.SV

Input Levels:
2.0V for a logic "1"
O.BV for a logic "0"

! OUTPUT CONDITIONS

•
•

X

24V
2.4VX
. ) TEST POINTS(
D.4V
D.4V

':::~
!

Timing Reference Levels:
2.4V for a logic "1"
O.4V for a logic "0"
Output Load Circu it:
CL = 100pF (including scope
and jig capacitances)
RL =4kO

RL
DEVIDE
UNDER
TEST

TEST
POINT

IA

.....

I"

~

17

l1li

17
7:7r

Fig. 17 - CRYSTAL/CERAMIC OSCILLATOR CIRCUIT

Ie = 4MHz
Cl = C2 = 20pF - 6DpF

7-113

!l1.11.IIIWIII~
FUJITSU

_

MB88301A

PACKAGE DIMENSIONS
PLASTIC DIP (Suffix: -PI
16-LEAD PLASTIC DUAL IN-LINE PACKAGE
(CASE No_ : DIP-16P-M021

.300 (7.62)TVP
INOEl'

.010±.002
(0.25±0.05)

.050(1.27)MAX

.172(4.36)MAX

.118(3.0)MIN
.100(2.54)
TVP
.020(0.51 )MIN
Dimensions in
inches (millimeters)

© FUJITSU LIMITE01986 016022S-2C

7-114

I~M.I1IWIIIIll~
FUJITSU

MB88301A WII.~"

PACKAGE DIMENSIONS
PLASTIC SOP (Suffix: ·PF)
16·LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT·16p·M02)

r;-;';7.~~
a

INDEX

_ /

l

·307 •. 016
(7.8±0.4)
.209•. 012
(5.3'0.3)

~::;::;:=;::;=::;::;:=;::;==n==;;Y~

.004~:gg;
(0.1~K~5)
(STAND OFF)

View "A"

.272±.012
(6.9±0.3)

I.~.020±.008
t
(0.5±0.2)

.OO6~:g~

.050(1.27)

TYP

(0.15~g:~)

~'I.I"';f1*-h~,..n4l-..n-ll..n>--l..,l-n_lI-n.uUL)-....-!i
~A

© FUJITSU LIMITED 1987 F16005S-3C

.......1..1· 085 (2.15)MAX

.031±.008
(0.8±0.2)
Dimensions in
inches (millimeters)

7-115

Data Conversion

7-116

Linear Data Book

cP

October 1989
Edition 1.0

FUJITSU

DATA SHEET

nlB883411n1B88342
R-2R TYPE 8-BIT DIA CONVERTER
DESCRIPTION

MB88341-P

MB88342-P

PLASTIC DIP
(DIP-20P-M02)

PLASTIC DIP
(DIP-16P-M04)

MB88341-PF

MB88342-PF

The Fujitsu MB88341 and MB88342 are R-2R type B-bit resolution digital--to-analog
converters (DAC), designed for interface with a wide range of general 4-bit and B-bit
microcomputers induding Fujitsu's MB8840150 series and MB884001500 series 4-bit
single-<:hip microcomputers.
The MB88341 has an B-bit x 12-<:hannel D/A converter and the MB88342 has an B-bit
x 8--channel D/A converter. Digital data are input serially by individual channel units.
The loaded digital data are convertered into analog DC voltages by the DIA converter in
60 I!s setUing time. The MB88341 and MB88342 are suitable for electronic volumes
and replacement for potentiometers for adjustment, in addition to normal 01A converter
applications.

FEATURES
• Conversion method : R-2R resistor ladder
• MB88341 : B-bit x 12-<:hannel DIA converter

III

• MB88342 : B-bit x 8-channel DIA converter
• Serial data input
• Serial data output for cascade connection

PLASTIC SOP
(FPT-20P-M01)

PLASTIC SOP
(FPT-16P-M02)

• 60 i!S DAC output settiing time
• Two separate power supplylground lines for digital and analog blocks.

MB88341-PFVIMB88342-PFV

• Single +5V power supply
• Wide operating temperature range: ...,woC to +85"C
• Silicon-gate CMOS process
• Three package options :
-MB88341: 2O-pin plastic DIP (Suffix: -P), 2O-pin plastic SOP (Suffix: -PF),
2O-pin plastic SSOP (Suffix: -PFV)
-MB88342: IS-pin plastic DIP (Suffix: -P), l&-pin plastic SOP (Suffix: -PF),
2O-pin plastic SSOP (Suffix: -PFV)

PLASTICSSOP
(FPT-2DP-M03)
This _
contains c1fQjhry to proIec:t lhe Inputs again. damage due
to high ataIIc: """- or eloc:ttlc fields. However,. Is advlaod that
normaJ _Ions be'-' to avoid OA>IlcaIion 01 ony voltage higher
than maximJm rated vollage8 to this high Irrpedance clrc:uit.

Cq>yrlghl© 1988 FWITSU LIMITED

7-117

MB88341
MB88342

Figure 1 Pin Assignment

MB88341-PF

MB88341-P

MB88341-PFV

Vss

GNO

Vss

GNO

Vss

10

20

GNO

A03

A02

A03

A02

A04

A01

A04

A01

A03

2

19

A02

A04

3

18

A01

A05

01

A05

01

ADS

4

17

01

A06

ClK

A06

A07

lO

A07

ClK

A06

5

16

ClK

lO

A07

6

15

lO

A08

DO

A09

A012

A08

DO

A08

7

14

DO

A09

A012

A09

8

13

A012

A010

A011

A010

A011

A010

9

12

A011

Voo

Vee

Voo

Vee

Voo

10

11

Vee

(Top View)

II1II
MB88342-P

M888342-PF

M888342-PFV

Vss

GNO

Vss

10

16

GNO

Vss

A02

A01

A02

2

15

A01

14
13

A03

01

A03

3

A04

ClK

A04

4

10

20

GNO

A02

2

19

A01

01

N.C.

3

18

N.C.

ClK

A03

4

17

01

12

lO

A04

5

16

ClK

ADS

6

15

lO

(Top View)
A05

LD

ADS

A06

DO

A06

6

11

DO

A07

A08

A07

7

10

A08

A06

7

14

DO

Vee

Voo

9

Vee

N.C

8

13

N.C.

A07

9

12

A08

Voo

10

11

Vee

5

(Top View)

Voo

7-118

8

MB88341
MB88342

Figure 2 Logic Symbol

f f
Vee

Shift Clock Input

Voo

12
-'

CLK

"
Data Input

DI

..

Load Strobe Input

LD

..

A01-A012

DAC Output

DO

Data Output

MB88341
MB88342

GND

Vss

J J

• MB88342 has A01 to A08.

Figure 3 Block Diagram
Vee

GND

III

Digital Block (MCU Interface)
12-bit Shift Register

CLK-i---.....
D I + - -......

1----i+DO

D8

D9

D10

D11

14---+-LD

8
12

Analog Block (D/A Converter)
Voo

A01 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - A012 •
Vss
• MB88342 has A01 to A08.

7-119

MB88341
MB88342

PIN DESCRIPTION
Figure 1 and Table 1 show the pin assignment and pin description of the MB88341 and MB88342.

Table 1 Pin Description

ClK

16

13 (16)

Shift clock input to the intemal12-bit shift register: At the rising edge of ClK data on
the 01 pin is shifted into the lSB of the shift register and contents of the shift register
are shHted right (to the MSB).

lO

15

12 (15)

load strobe input for a 12-bn address/data : A high level on the lO pin latches a 4-bit
address (upper 4 bits: 011 to 08) of the internal 12-bn shift register into the internal
address latch/decoder, and writes 8-bit data (lower 8 bits: 07 to ~O) of the shift register
into an internal data latch selected by the latched address.

01

17

14 (17)

Serial address/data input to the internal 12-bit shift register: The address/data format is
that upper 4 bits (011 to DB) indicate an address and lower 8 bits (07 to DO) indicate data.
The 011 (MSB) is the first-in bit and DO (lSB) is the last-in bit.

DO

14

11 (14)

AOl
A02
A03
A04
AOS
A06
A07
A08
A09
A010
AOll
A012

18
19
2
3
4
5
6
7
8
9
12
13

15
2
3
4
5
6
7

0

(19)
(2)
(4)

(5)
(6)
(7)
(9)
10 (12)
(-)
(-)
(-)
(-)

Serial address/data output from the internal 12-bit shift register: This is an output pin of
the MSB bit data of the 12-bit shift register. This pin allows a cascade connection of the
device.

8-bit resolution O/A converter outputs:
MB88341: 12 channels (AOlto A012)
MB88342: 8 channels (A01toA08)

0

-

Note: Pin numbers in parentheses are applied to MB88342-PFV.

7-120

MB88341
MB88342

FUNCTIONAL DESCRIPTION
OVERVIEW
The MB88341 and 11.1888342 are R-2R resistor ladder type. B-bit resolution digital-to--analog COIlwrter (OAC) devices. The MBB8341 has 12
channels. and MB88342 has 8 channels of O/A converters. 8-bit digital data are loaded into internal data latches by individual OAC channel units.
The loaded digital data are converted into analog DC voltages through the internal O/A converter in 60 fls settling time. For cascade connection. a
serial data output is provided.

DEVICE CONFIGURATION
As illustrated in Figure 3 block diagram. the MBB8341 (MBB8342) device is composed by the digital block (MCU interface) and analog block (O/A
conwrter). The digital block consists of a 12-bit shift register. a 4-bit address latch/decoder. and 12 (8) 8-bit data latches. The analog block
includes 12 (8) 8-bit O/A converters connecting to the data latches. For eleclrically stable operation the power supply and ground lines are separate
between the digital block (for MCU interface) and analog block (for O/A COIlwrter).

DEVICE OPERATION
Figure 4 shows the inpuVoutput timing. A 12-bit address/data is serially input into the shilt register through the 01 pin synchronously with the rising
edge of ClK. The format of the shilt register is shown in Figure 5. The lower 8 bits (07 to ~O) are data bits to be converted. and the upper 4 bits are
address bits (011 to 08) to select a data latch to be written. A high level on the LD pin loads the address latchldecoderwith the 4-bit address to select
a data latch. and writes the B-bit data into a selected data latch. Figure 6 shows the data latch address map. and Table 2. address decoding. 8-bit
data written into individual data latches are converted into analog DC voltages. dividing the supply voltage IVoD-Vssl through R-2R resistor ladders
of O/A converters. Figure 7 shows the R-2R resistor ladder O/A converter configuration. and Table 3 analog DC voltages corresponding to each
digital data.

Figure 4 Input/Output Timing

III
ClK

MSB
01

LD

LSB

-----~-------------------

n

------------------------------~ ~--------p_re_v_~
__
s_o_a_ta__________________________.J)(~

AOX _________________________________

___

N_e_w_O_a_ta
_____

7-121

MB88341
MB88342

Figure 5 Shift Register Format

..

(Last-In)

(First-ln)

D--1I-:: I"I"' I"' I"I"I"I"-I-I"I"ID" I::----I~
~it Data

To Data Latch

4-bit Address

To Address LatchlDecoder

Figure 6 Data Latch Address Map

Address

1H

Data Latch #1

DIA Converter 111

A01

2H

Data Latch #2

DIA Converter 112

A02

3H

Data Latch 113

DIA Converter #3

A03

4H

Data Latch #4

DIA Converter 114

A04

5H

Data Latch #5

DIA Converter #5

AOS

6H

Data Latch #6

DIA Converter #6

A06

7H

Data Latch #7

DIA Converter #7

A07

8H

Data Latch #8

DIA Converter #8

A08

9H

Data Latch #9 •

DIA Converter #9 •

A09·

AH

Data Latch #10 •

DIA Converter #10·

A010·

BH

Data Latch #11 •

DIA Converter #11 •

A011·

CH

Data Latch #12·

DIA Converter #12 •

A012·

• : Available on MB88341 only

7-122

MB88341
MB88342

Figure 7 R-2R Resistor Ladder D/A Convener Configuration

,
,, ,

.. .-.-.., ...
.
T sw ,
"

YOO

J~,"

,,

,,

,,"

oot--;--I

01

YOO

-r-.

.... Vss

,,,'

.....

,,

t----I

02
0
a
t

a

R

D3

t

DI

R

L

a

D4

c
h

05

OS

07

AOx

7-123

MB88341
MB88342

Table 2 Address Decoding

Table 3 Data Conversion

7-124

MB88341
MB88342

Figure 8 cascade Connection Example
Voo

Voo

+5V

I
MB88341

Va;

DATA
(SO)

r--

01

DO

CLOCK 1-<>--- ClK

t---

-

Mlcrocontroller (scOO)

Voo

I

I

MB88341

MB88341

01

DO

ClK

-

01

DO

ClK

-

........
Strobe

I-<

~~

LD

r-

LO

r-

lO

GNO

)";;7-

GNO

Vss

I

I

;#

GNO

I

Vss

I

;#

GNO

J

Vss

l

D

7-125

MB88341
MB88342

APPLICATION DESCRIPTION
The MB88341 and MB88342 are suitable for electronic volumes and replacement for adjustment potentiometers, in addition 10 normal D/A converter
applications. Figure 8 illustrates an application example for TV set.

Figure 9 Application Example (for TV Set)

Veo

+5V

I

Vee

Vee
DATA

(SO)
CLOCK
Mlcrocontroller (SCiffi)

-

Tone

AD1

01

Focus

AD2

Contrast

AD3
ClK

A04
MB88342

Depth

A05
Strobe

-

A06

lD

AD7

VldeolColor Control

Briahtness

-

A08
GND

GND

1

I

$

7-126

t

~
Volume
Tone

Sound Control

MB88341
MB88342

ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS t

Supply Voltage

Input Voltage

V,N

-0.3

7.0

V

Ta = 25'C
GND =0 V

t

Output Voltage

VOUT

Power Dissipation

Po

Operating Ambient
Temperature

TA

Storage Temperature

TSTG

-0.3

7.0

V

250

mW

-20

+85

'C

-55

+150

'C

Should not exceed Vee +
0.3V

Permanent device damage may oeeur if the above ABSOLUTE MAXIMUM RATIN GS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.

RECOMMENDED OPERATING CONDITIONS

7-127

D

MB88341
MB88342
DC CHARACTERISTICS
(Recommended operating conditions unless otherwise noted.)

Actiw SUpply Current

Ice

1.0

Stancby Supply Current

Ices

to

mA

ClK= lMHz
All inputs (including CLK) fixed at Vce
orGND.
All outputs open.

Input Leakage Current

IILK

Input Low Voltage

VIL

Input High Voltage

VIH

Output low Voltage

VOL

Output High Voltage

VOH

Supply Current

100

Resolution

Variation of Unearity
among Channels

7-128

-10

10

)IA

0.2.Vce

V

VIN = 0 to Vce

V

o.a.Vce

0.4

Vcc-{).4

V

IOL=2.5mA

V

IOH = -400 )IA

1.5

3.0

mA

MB88341

1.2

2.5

mA

MB88342

bit

Monolonicity. lOUT = -0.01 )IA

LSB

Monotonicity. No load

No load

a

±3

MB88341
MB88342
AC CHARACTERISTICS
(Recommended operating conditions unless otherwise noted.)

Data Setup Time

IDCH

30

ns

Data Hold Time

tcHD

60

ns

Load Strobe High Time

b.DH

100

ns

Load Strobe Setup Time

tcHL

200

ns

Load Strobe Hold Time

b.OC

100

ns

DAC Output Settling Time

b.DD

Data Output Delay Time

too

70

60

J.ls

350

ns

No load

·CL = 20 pF (Min.), 100 pF (Max.)

III

Figure 10 AC Test Conditions

I

Device
Under
Test

I

It--~r--.g Test Point

r
-'-

7-129

MB88341
MB88342

Figure 11 Input/Output Timing

ICKH

~

O.S.Vee
elK ~ O.2.Vee
O.2.Vee

~

., O.S.Vee
I O.2.Vee

[o.2.vee

EKL

01

O.S.~~
O.2·V

14 !Lce.

r(?s.vee
O.2.Vee

~

~

ILDH

ICHl

O.S.Vee
O.2·Vee

O.S.Vee
O.2.Vee

lD

!LDD

AOx

New Data Valid

Previous Data

100

DO

7-130

Previous Data

Vcc-{).4
O.4V

New Data Vaiid

MB88341
MB88342

PACKAGE DIMENSIONS
MB88341-P
20-LEAD PLASTIC DUAL IN-LINE PACKAGE
(Case No. : DIP-20P-M02)

W.17214.36) MAX

-tJ.11813.00) MIN
.050(1.27)
MAX

.10012.54)

TYP

© 1988 FUJITSU LIMITED 020003S-3C

~8±.OO3

.02010.51) MIN

10.46 ±O.OB)

III

Dimensions in
inches (millimeters)

7-131

MB88341
MB88342

MB88341-PF
20- LEAD PLASTIC FLAT PACKAGE
(Case No.: FPT-20P-MO()

,".

500 +.010(1270+0.25)
-.008
. -0.20

.089(2.25) MAX
(SEATED HEIGHT)

n-t----~

.020±.008
(0.50±0.20)
.050(1.27)
TYP

"A"

io-;taii;of -:-i'-p~rt-l
I

I

I

.008(0.20):

:,
,

.020(0.50)
.007(0.18)
I

I

I.... _

i
I

MAX:
.027(0.68),
MAX
______________
JI
Dimensions in

© 1988 FUJITSU LIMITED F20003S-4C

7-132

inches (millimeters)

MB88341
MB88342

MB88341-PFV
20-LEAD PLASTIC FLAT PACKAGE
(Case No. : FPT-20P-M03)
049:,:gg:
t--r~~...,-;=;--

(1.25:,:g~gl

'.25S±.004
·(S.50±0.101

l~:-::--T
1

ii!=!'~~,!kf~~

I

J

.252±.008
(S.40±0.201

'.173±.004

~Rr~~nr~ (4.40r~~:

(SEATED HEIGHTI

~OINOM

"A"

I

--".025S±.0047
- (0.S5T0.121

(0.22:':8:bgl
j------D~-;i;;~f-.·A:-;-P;rt------i

I

tnnnnnOj

.004±.004 (STAND OFFI
(0.10±0.101

I
:
I
I
I

'230(5.851

I

.020±.008
(0.50±0.201

REF

I
I

I

I _____________________ I
L
~

© 1989 FUJITSU LIMITED F20012S-2C

Dimensions in

* :This dimension does not include resin

protrusion.

inches (millimeters)

7-133

MB88341
MB88342

MB88342-P
16-LEAD PLASTIC DUAL IN-LINE PACKAGE
(Case No.: DIP-16P-M04)

r~ 770+ .00811 955 + 0 . 2 0 ) 1
r . -.012 . -0.30 -'l

Ir.

r'll

1--

_==-~=.l

15" MAX

.300(7.62)
TYP

L.---,,~~
.010±.002
(0.25±0.05)

--u::::,:::
~50(1E)

MAX

-tr.~;;-;-;:c=

.O~O(O.51)

MIN

Dimensions in

© 1988 FUJITSU LIMITED D16033S-2C

7-134

inches (millimeters)

MB88341
MB88342

MB88342-PF
16-LEAD PLASTIC FLAT PACKAGE
(Case No. : FPT -16P-M02)
08912 25) MAX
ISEATEO HEIGHT)
.00210.05) MIN
_i--t'I~ST_A"TNO OFF)

UJ

.268 ~~:1680 ~g;g)

i

j .020±.008

--t====t

10.50 ±0.20)

.006 ~gg~lo 1 5 ~gg~1

TYP

··A··
I

1"'~;"·

I

C"O=-o.00=41"'0-'.

I- - .35018.89) REF_

I

~

©1988 FUJITSU LIMITED F16005HC

.020{0 50) :
.00710.18)
MAX
I
.02710.68) I

DI

____ ____ ~~~____ J
Dimensions in
inches (millimeters)

7-135

MB88341
MB88342
MB88342-PFV
20-LEAD PLASTIC FLAT PACKAGE
(Case No.: FPT-20P-M03)

.049~:gg:
I--I-------,':'O-::-=-- (SEATED
(1.25~8:~g)

' ;:~~:~~) -I
!RRRR8R8RRg'lt------r\
!

I

• 173±

INDEX

HEIGHT)

252±.DDB
(6 40 ± 0.20)

g~)

I

",cf
nr'iFii9FiT'if'iFil' ( 4 4 0 j : J
.0256±.0047
(0.65±0.12)

i------O-;t;ii;~-:·A·;-;rt------I

tonnnnnl
.230(5.B5)
REF

1
I

.DD4± .004 (STAND OFF)
(0.10±0.10)

I
I
I

I
I
I

.020±.OOB
(0.50±0.20)

IOtol0'
I _____________________
L

© 1989 FUJITSU LIMITED F2DD12S-2C

7-136

* : This dimension does not include resin protrusion.

~

Dimensions in
inches (millimeters)

1111111111111111111111111111111111111111111111111111

10-BIT HIGH SPEED

FUJITSU

MB40748-8
MB40748-9
MB40748-10

D/A CONVERTER

11111111111111111111111111111111111111111111111111111111111111111

August 1988
Edition 4.0

10·BIT HIGH SPEED D/A CONVERTER
The Fujitsu MB40748 is a 10 bit Ultra-high speed low-power Digital to Analog
Converter which is fabricated with Fujitsu Advanced Bipolar Technology.
The device can convert 10-bit digital signals into analog signals from DC to
20 Mega-samples/sec. (MSPS). Because of such high speed operation, the device
is suitable for applications such as color television decoding, digital TV system
and video processing with computer.
CERAMIC PACKAGE
DIP-24C-A06

10 bits

•

Resolution

•

Linearity

•

Conversion Rate

20 MSPSmin.

•

Analog Output Voltage

OV to -lV

•

Digital Input Voltage

10k ECl level

•

Input Code

Binary or 2's complement

•

Single Power Supply

-5.2V

•

Power Dissipation

300mWtyp.

•

Package

DIP-24C-A06
D I P-24C-A 10

MB40748-8
MB40748-9
MB40748-10:

±0.2% max. (8 bit accuracy)
±0.1% max. (9 bit accuracy)
±0.05% max. (10 bit accuracy)

CERAMIC PACKAGE
DIP-24C-A 10

PIN ASSIGNMENT

VEE

ABSOLUTE MAXIMUM RATINGS

Supply Voltage
Digital Input Voltage

Symbol
VEE
V ,ND

O.GNO
°10 ILSB)

CaMP

Parameter

IIfJI

Ratings
+0.5 to -7.0
+0.5 to VEE

Unit
V
V

Analog Reference Voltage

V REF

+0.5 to VEE

V

Storage Temperature

TSTG

-55 to +150

°c

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

09

VREF

Os

A.GNO

07

A.GNO

06

A.GNO

05

A.OUT

04

A.GNO

03

O. GNO

O2

NMINV

D1 IMSB)

VEE

CLK

This device contains circuitry to protect the

inputs against damage due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedance
circuit.

7-137

1IIIIIIIIIIIIIIIIIIImlllllllllllllili
FUJITSU
IiMIiMiII~gIMMn

MB40748-B
MB40748-9
MB4074B-l0

Fig. 1-MB40748 BLOCK DIAGRAM

CLK(}-------

01

to
010 1 -_ _-,1

NMINVD-----.....J

NL 1 N V o - - - - - - - - - '

7-138

BUFFER

A OUT

MB40748-8
MB40748-9
MB40748-10

~III~IIIIIIIIIIII~IIIIIIIIIIIIIIIIIII
FUJITSU
111111111111111111111111111111111111111111111111111111II

RECOMMENDED OPERATING CONDITIONS
Value
Parameter

Unit

Symbol
Min

Typ

Max

-5.46

-5.20

-4.94

V

V REF

-1.2

-1.0

-0.8

V

Clock Pulse Width at High·level

tw +

15

Clock Pulse Width at Low·level

tw-

15

Data Setup Time

ts

20

ns

Data Hold Time

tH

0

ns

Operating Temperature

TA

0

CCOMP

1

Supply Voltage

VEE

Analog Reference Voltage

Phase Compensation Capacitance *
Note:

ns

-

ns

·C

70

p.F

The capacitor should be connected between CaMP and VEE

ELECTRICAL CHARACTERISTICS
(Recommended Operating Conditions unless otherwise noted.) (VEE = -5.2 V, TA = 0 V to +70 V ·C)

ANALOG DC CHARACTERISTICS
Value
Parameter

Condition & Note

Symbol

Unit
Min

Typ

Resolution
MB40748·8
Linearity Error

MB40748·9

LE

MB40748-10
Full-scale Analog Output
Voltage

V REF = -1.00V,
A. OUT is open.

V OFS

-1.06

Zero-scale Analog Output
Voltage

V REF = -1.00V,
A. OUT is open.

V ozs

-15

Reference Input Current

V REF =-1.00V

IFIEF

Output Impedance

T A =25°C

ZOUT

70

-1.00

0

80

Max
10

bits

±O.2

%

±0.1

%

±O.05

%

-0.94

V

15

mV

10

p.A

90

n

7-139

I• •mllllllli
FUJITSU

1IIIIIIImOOIHIIlIIII~1

MB40748-8
MB40748-9
MB40748-10

ELECTRICAL CHARACTERISTICS (continued)
(Recommended Operating Conditions unless otherwise noted.) (VEE = -5.2 V, TA = 0 to +70° C)

DIGITAL DC CHARACTERISTICS
Value
Parameter

Conditions

Symbol

Unit
Typ

Min
TA =O°C
High-level Digital
Input Voltage

Max

-1.145

TA =+25°C

V'HD

-1.105

V

-1.045

TA = +70°C

-1.490

TA = O°C
Low-level Digital
Input Voltage

TA =+25°C

-1.475

V'LD

-1.450

TA = +70°C
High·level Digital
I nput Current

I'HD

Low·level Digital
I nput Current

I'LD

0.5

lEE

-90

Supply Current

V

V REF =-1.00V

250

p.A

200

p.A

-56

mA

SWITCHING CHARACTERISTICS
(VEE = -5.2 V. TA = 0 to +70°C)
Value
Parameter

Maximum conversion Rate

7-140

Conditions

Unit

Symbol

FS

Min

Typ

20

30

Max
MSPS

MB4074B-B
MB4074B-9
MB4074B-l0

111111111111111111111111111111111111111111111111111

FUJITSU
111I11I111111111111111111111111111111111111111111

TIMING DIAGRAM

OATAINPUT

tw----t---CLKINPUT

-rs.~~$

±%LSB

OUTPUT

DI

tpo"

Note: "These values are not specified because they depend on application circuit.

EQUIVALENT DIGITAL INPUT CIRCUIT

O. GNO

EQUIVALENT OUTPUT CIRCUIT

o---..--~-,,----

,--------<)

A. GN 0

~----<)

A. OUT

ZOUT= 800

VREF

=

-2.1 V

50 kO

VEE

Note: tV TH = -1.3 V

7-141

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIm~I~111 MB40748-8
FUJITSU

1I I I I I I I I I I I I I I I I I I I m~I~ ~1 =::g~:::rO

OUTPUT VOLTAGE
(Recommended Operating Conditions unless otherwise noted. VREF = - 1.024 V, Positive Logic)
BINARY

(1 LSB = 1

OFFSET 2'S COMPLEMENT
Ideal
Output
Voltage
(V)

Digital Input

Non·inverting
Input

Inverting
Input

Non·inverting
Input

Inverting
Input

NMINV

1

0

0

1

MLiNV

1

0

1

0

0

0000000000

1111111111

1000000000

0111111111

-0.000

1

0000000001

1111111110

1000000001

0111111110

-D.OOl

STEP

511

0111111111

1000000000

1111111111

0000000000

-D.511

512

1000000000

0111111111

0000000000

1111111111

-0.512

513

1000000001

0111111110

0000000001

1111111110

-0.513

1022

1111111110

0000000001

0111111110

1000000001

-1.022

1023

1111111111

0000000000

0111111111

1000000000

-1.023

IDEAL OUTPUT OPERATION

PRACTICAL OUTPUT OPERATION

V OUT (V)

VOUT

-1.023 ..................................................... .

VOFS·············································· ........ .

-1.022

-0.513
-0.512
-0.511

-0.002
-0.001

0
0

80

~

§

::

0

8

§

~

~

0

80
0
0

8
8

g
8

~

S!
~

0
0

...

~

~
~

0

g

§ §

::
~

0

§ §

Unearity Error ""

7-142

0

~

1 LEn) ma.

)FS)

mV)

MB40748-8
MB40748-9
MB40748-10

1111111111111111111111111111111111111111111111111111

FUJITSU
1111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
24·LEAD CERAMIC (METAL SEAL) DUAL IN·LlNE PACKAGE
(CASE No.: DIP·24C·A06)

D

~~

R.025(0.64)R

~11

INDEX AR

I.

1.200±.014
(30.48±0.36)

-1

J'' '

1

.600±.010
(15.24± 0.25)

.589±.011

.1

--

J

J

.010±.002
(0.25±0.05)

Imfflmm°
57

!1.45)MAX

~ ~ . 11::::""
(3.40±0.36)

.100±.010
(2.54±0.25)

.040±.004
(1.02±0.10)

II

.018~:gg3·
--I·(O.46~:~~)

1.IOO(27.94)REF
© 1988 FUJITSU LIMITED. D24028S·2C

.05O±.010
(1.27±0.25)

Dimensions in
inches (milimeters)

7-143

1~~IMm~~~~oo~m~~~~m~~1
FWITSU

~~~~~~I~~~OOII~I~I~~

MB4074B-B
MB4074B-9
MB4074B-l0

PACKAGE DIMENSIONS (continued)
24·LEAD CERAMIC (METAL SEAL) DUAL IN·LlNE PACKAGE
(CASE No.: Dlp·24C·A10)

~'~rJ[ ~ ~ ]5~lg,

I

1.200+.015
(30.48±0.38)

_=-:::::1

1

0°109°

~~Tf

I

.300±.010
(7.62±0.25)

j

t

J

.010±.002
(0.25'0.05)

.200(5.08)MAX

.134 •. 014
(3.40±0.36)

.100t.010
(2.54±0.25)
Dimensions in
inches (mi limetersl

© 1988 FUJITSU LIMITED D24029S·2C

7-144

MB40776
December 1987
Edition 4.0

6-BIT HIGH SPEED D/A CONVERTER
The Fujitsu MB 40776 is a 6-bit low power ultra-high speed video D/A converter fabricated with Fujitsu Advanced Bipolar Technology. The MB 40776
can convert 6-bit digital signals into analog signals at a rate of DC to 20 megasamples/sec (MSPS). Because of such high speed operation, the MB 40776 is
suitable for applications such as digital color TV, video processing with computer, radar signal processing.
PLASTIC PACKAGE
DIP-16P-M04
• Resolution

: 6 bits

• Li nearity

: ±0.8%

• Maximum Conversion Rate

: 20 MSPS min.

• Analog Output Voltage range ': Vee to Vee -1 IV]
• Digital I/O level

: TTL

• Single Power Supply

:+5[V]

• Power Dissipation

: 220 [ mW] typo

PLASTIC PACKAGE
FPT-16P-M02

PIN ASSIGNMENT

• Standard 16-pin DIP Package : (Suffix: -PI
Standard 16-pin FPT Package : (Suffix: -PF)

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Rating

Power Supply Voltage

Digital Input Voltage

Symbol

Value

VeeA
V eeD

-0.5 to +7.0

V 1ND

-0.5 to +7.0

Unit

V

V

Analog Reference Voltage

V REF

3.70 to Vee + 0.5

V

Storage Temperature

T STG

-55 to +125

°c

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

VCCD

GND

CaMP

D6(LSBI

VREF

05

VCrA

04

A.OUT

03

VceA

02

VecD

D1{MSB)

GND

CLK

This device contains circuitry to protect the

inputs against damage due to high static volt·
ages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi·
mum rated voltages to this high impedance

circuit.

7-145

IW~IIIIIIIIM~IIIIMIMllli
FUJITSU
MWIIII~W~~WIIIIIII~IIM

MB40776

Fig. 1- MB40776 BLOCK DIAGRAM

r--------------------------------.

C~

I

0,
I
06

I
I
I
I
I
I
I

I

I
I
I
I

MASTER
SLAVE
REGISTER

6

6

6

CURRENT
SWITCH

A.OUT

I

I
I
FULL
SCALE

I
I

I

l____________~-~-~-----GNO

7-146

I
RESISTOR

BUFFER

VCCD

VCCA

COMP

I
I
I

I
___ ...JI
VREF

1111111111111111111111111111111111111111111111111111

FUJITSU

MB40776

1111I11111111111111111111111111111111111111111111111

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Value
Min

Typ

Max

Unit

Power Supply Voltage

VCCA
V eeD

4.75

5.00

5.25

V

Analog Reference Voltage *1

V REF

3.70

4.00

4.30

V

Clock Pulse Width at High level

tw+

25

ns

Clock Pulse Width at Low level

t w-

25

ns

Data Setup Time

ts

12.5

ns

Data Hold Time

tH

12.5

ns

Operating Temperature

TA

0

CeoMP

1

Phase Compensation Capacitance*2

70

°c
p.F

NOTE: *1: Vee -VREF ;;:; 1.2V
*2: The capacitance should be connected between CaMP and GND.

III

7-147

m.1InI
FUJITSU

ImlmmWllmIIIIW~I~1

MB40776

ELECTRICAL CHARACTERISTICS
(Vee = 4.75 to 5.25 V, TA = 0 to 70D C)

ANALOG DC CHARACTERISTICS

Value
Parameter

Symbol

Condition

Unit
Min

Typ

Resolution
Linearity Error
Full·Scale Analog Output
Voltage
Zero·Scale Analog Output
Voltage

DC

LE

V OFS

V ozs

Vee = 5.000 V
V REF = 3.976 V
Vee = 5.000 V
V REF = 3.976 V

Reference I nput Current

IREF

V REF = 4.00 V

Output Impedance

ZOUT

TA = 25 D C

Max
6

bits

±O.B

%

V eeA -0.015

V eeA

V eeA +0.015

V

3.932

3.992

4.052

V

10

jl.A

90

.11

70

BO

(Vee = 4.75 to 5.25 V, TA = 0 to 70D C)

DIGITAL DC CHARACTERISTICS

Value
Parameter

Symbol

Condition

Unit
Min

High·level Input Voltage

V IHD

Low·level I nput Voltage

V ILD

Maximum Input Current

110

Vee = 5.25 V

Low·level Input Current

Power Supply Current

IIHD

IILD

lee

NOTE: 'Vee = 5.00 V, VREF=4.00V

7-148

Max

2.0

VI

High·level Input Current

Typ

= 7.00 V

Vee = 5.25 V
V IHD = 2.70 V
Vee = 5.25 V

-400

V
0.8

V

0

100

jl.A

0

20

jl.A

-40

jl.A

V ILD = 0.40 V
V REF = 4.05 V

43'

65

mA

IllWllMlllMlllMlllllnlOOllllll1

FUJITSU

MB40776

SWITCHING CHARACTERISTICS

IIOOWOOIIIIIIWIIWIIIIIWI

(Vee = 4.75 to 5.25 V. TA = 0 to 70·C)
Value

Parameter

Symbol

Maximum Conversion Rate

Condition

FS

Unit
Min

Typ

Max

20

30

-

MSPS

TIMING DIAGRAM

3V

DATA INPUT
OV
3V

CLKINPUT
OV

OUTPUT

Note: 'These values are not specified because they depend on application circuit.

7-149

--FWiTSU

g_

MB40776

Fig. 3 - OUTPUT EQUIVALENT CIRCUIT

Fig. 2 - DIGITAL INPUT EQUIVALENT CIRCUIT

V~Do-------~----~~~----~-------

25k

3.5 k

3.5 K

25 k

,--------oVCCA
ZOUT =80(1

P--------<> A.
INPUT 0-----001

OUT

VREF = 1.4 V

L----------o GND

GND

7-150

IIOOIIWlnllmlllllllllllml~wml
FUJITSU
MB40776 IllmlllllmIIIIIIIIIIWI.~111

OUTPUT VOLTAGE

(VCCA = 5.000 V. V REF = 3.976 V)
Input Code

OUTPUT VOLTAGE (V)

000000
000001

3.992
4.008

011111
100000
100001

4.4 8 8
4.504
4.520

1 1 11 10
111111

4.984
5.000

Note: 1 LSB = 16 mV

..

Fig. 5 - PLACTICAL OUTPUT OPERATION

Fig. 4 - IDEAL OUTPUT OPERATION

5.000 .................................................... ..
4.984 ............................................... .

4.520 .................................. .
4.504 ........................... ..
4.488 ...................... .

V ozs

3.992
LSB-§
0

MSB-8

(;

0

§

0

(;

8

(;

0
0
0
0

~

(;
0
0

~

...

0

8

-

0

8
0

;;
0
0
0
0

0

~

...

(;

0
0
0

(;

8

~

Linearity Error ""

~

- ;:-

8

I LEnl max
I FS I

7-151

IIII~~I~~~IIMIIIIIIIII~I~~II
FWITStJ
m~I~lrnrn~liiW~ili MB40776

TYPICAL CHARACTERISTICS CURVES
Fig. 6 - POWER SUPPLY CURRENT
VI. TEMPERATURE

~ 7or----r----r----r----r---~

.s_g 60 I-Vee =.k5.25V

VREF·4.05V

t-

~ 40 I-C::::t::::~::~~~;;;~~:::~

!!5

60

o

~

o
a:

30~--~----~--~----~--4

ffi

Q.
Q.

~

20~--~----~--~----~--4

a:
w

10~--~----~--~----~--4

~

Fig. 7 - LINEARITY ERROR
VS. TEMPERATURE

0.8 r---...,-----,---...,-----,----,
Vee = 5.oo0V
~
VREF = 3.976V
~ 0.61---=-_+----+---+----+----f
~

0.4 ~--_+----t_--_+----t_--_t

~

~ 0.2 ~--_+----t_--_+----t_--4

w

~

0
-2~5--~0~--~25~--~5~0--~7~5--~1~00

O=-__-::-____;=---~--__==_--:::!
-25

0

TEMPERATURE TA (GCI

100

Fig. 8 - OUTPUT IMPEDANCE
vs. TEMPERATURE

§
'; 9 0

~

---

w 0 __
~ 8

~

W

Q.

~

~

1=

70

~

~

75

100

--

~

Vee = 5.000V
VREF = 3.976V

4.040

1=

5 ~ 4.020 ~--_+----~--_+----II-----_t

r---

u>
ON

(!l

;i
~
Zw

4.000

«(!l

II---=I---r:::::+=~t=j

~ ~ 3.9801----+----+---+----f----J
«...I

00

"I>

o
a:

60

i>P

-25

3.960 ~--_+----t_---+----r---_t

w

N

o

25

50

75

3.94~2~5---...,0:':---~2~5----;5~0----=7~5---:1~0·0

100

TEMPERATURE TA (GC)

TEMPERATURE TA (GCI

Fig. 10 - FULL-SCALE ANALOG OUTPUT
VOLTAGE VI. TEMPERATURE
~

+2.0

Q.

!:is;
o E

Vee =5.000V
VREF = 3.976V

+1.0

(!l';;,

9

~ Vee

;2 >
«w
~~

«~

(Ref )

-1.0

00

~>

...I

-2.0

:;)

U.

-3.0
-25

o

25

50

TEMPERATURE TA (GCI

7-152

50

Fig. 9 - ZERO·SCALE ANALOG OUTPUT
VOLTAGE VI. TEMPERATURE

:;)

o

25

TEMPERATURE TA (GCI

75

100

11!1~11111~111!1~11111!llil
FUJITSU

MB40776 II~iml~I!Q.

Fig. 11 - DELAY TIME
20

!

VS.

Fig. 12 - DELAY TIME VI. POWER
SUPPLY VOLTAGE

TEMPERATURE

20r----r----~---,----_r--_,

Vee = 5.0V
VREF = 4.0V

w

16

S

~

:5

w
C

16r----t----1-----~--_r--__1

."

~ 12~--_r----+---~----_r--~

w 12
:;

i=
>-

VREF = 4.0V
TA = 25°C

:;

I.---

8

i=
~

8r---t-~1_---F~~.-_j

..J

w

4

o

-26

c

o

25

O~--~--~~--~--~~--~
3.5
4.0
4.5
5.0
5.5
6.0

100

75

50

4t----+---+--~--_r-~

POWER SUPPLY VOLTAGE Vee 'V)

TEMPERATURE TA ,oC)

Fig. 13 - CLOCK PULSE WIDTH
VI. TEMPERATURE

Fig. 14 - CLOCK PULSE WIDTH
VI. POWER SUPPLY VOLTAGE

,S

Vee = 5.0V
V REF = 4.0V

~

+

~
::c

I0

10

VREF = 4.0V
TA = 25°C

8
6

~
tW+

~

~

....
....

4

::>
Q.
tw-

o

25

"<)

2

<)

0

g
75

50

100

tW+

3.5

TEMPERATURE TA ,oC)

N

::c

~ 250
w

!(
a:

Vee =5.0V
VREF = 4.0V

~ 150

a:

w

~ 100

o<)

50

~

0

:;

-25

4.5

5.0

5.5

6.0

Fig. 15 - MAXIMUM CONVERSION
RATE VI. TEMPERATURE

200

~

4.0

POWER SUPPLY VOLTAGE Vee 'V)

z

:;

tw-

o

- ---r--.
25

50

75

100

TEMPERATURE TA lOCI

7-153

~lmlml~llllllllllllllllllllml~~~I~I!~
FUJITSU

~~~IIIIIII~~~mIIOO~IOOI~m~~~ MB 40776

PACKAGE DIMENSIONS
16-LEAD PLASTIC DUAL IN-LINE PACKAGE
(CASE No. : DIP·16P-M04)

-7E;;;;;:::::::=::=:::.1~15'

INDEX-l

MAX

"I

.244±.01C
(6.20±0.25)

INDEX-2

~:::;:::;::::;:::::;::=;=;::::::;::=;::=:;:::::;::::::;~.-l
Il.r-l V L
I---

L,) LJ I
~

770 +. 008 (19.55+ 0 .2 )'
-.012
-0.3

.010±.002
(0.25±0.05)

.039~~12
(0.99~g·3)

.100(2.54)

TYP
Dimensions in
inches (millimeters)

@FUJITSU LIMITED 1986 D16033S-2C

7-154

~llllllm~~I~mmllllllllllllllllml~~~11
FUJITSU
MB40776 IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~~~~

PACKAGE DIMENSIONS
16·LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT·16p·M021

~':':~1!~
INDEX
_/

o

l

·307±.016
17.8±0.4)
.209±.012
(5.3±0.3)

L!n==n==;:;==;;:::=n==;:;==rr=nlI~

.004~:gg~
(0.I~g:J5)
(STAND OFF)
View "A"

.272±.012
(6.9±0.3)

J
~.020±.008
I. t
(0.5±0.2)

.006~:gg~

.050(1.27)

TYP

.007(0.18)
MAX

.027(0.68)
MAX

( 0.15~g:g~)

~n.nnnn$"''''''M''

D

.031±.008
(0.8±0.2)

©FUJITSU LIMITED 1987 F16005S·3C

Dimensions in
inches (millimeters)

7-155

Data Conversion

7-156

Unear Data Book

MB40776H
Februarv 1988

Edition 1.0

6-BIT HIGH SPEED D/A CONVERTER
The Fujitsu MB40776H is a 6-bit low power ultra-high speed video D/A converter fabricated with Fujitsu Advanced Bipolar Technology. The MB40776H
can convert 6-bit digital signals into analog signals at a rate of DC to 60 megasamples/sec (MSPS). Because of such high speed operation, the MB40776H is
suitable for applications such as di~:tal color TV, video processing with computer, radar signal processing.

• Resolution

: 6 bits

• Linearity

: ±0.8%

• Maximum Conversion Rate

: 60 MSPS min.

PLASTIC PACKAGE
DIP-16P-M04

• Analog Output Voltage range : Vee to Vee -1 [V]
• Digital I/O level

: TTL

• Single Power Supply

:+5[V]

• Power Dissipation

: 220 [ mW ] typo

• Standard 16-pin DIP Package

: (Suffix: -PI

10

PIN ASSIGNMENT

GND

ABSOLUTE MAXIMUM RATINGS (See NOTE)

D6(lS8)

Value

Unit

Rating

Symbol

Power Supply Voltage

VeeA
V eeD

-0.5 to +7.0

Digital Input Voltage

V'ND

-0.5 to +7.0

V

Analog Reference Voltage

V REF

3.70 to Vee + 0.5

V

Storage Temperature

T STG

-55 to +125

°c

D5
D4

V

D3

D2

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

Dl(IIIIS8)

elK

This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-

mum rated voltages to this high impedance
circuit.

7-157

1111111111111111111111111111111111111111111111111111

FUJITSU

MB40776H

1111111111111111111111111111111111111111111111111111

Fig. 1 - MB40776H BLOCK DIAGRAM

r--------------------------------,
C~

I

I

I
I
I
I
I

I
I
I
D,
I
D6

I

I

6

MASTER
SLAVE
REGISTER

6

6

6

CURRENT
SWITCH

A.OUT

I

I

I
I

I
FULL
SCALE

I
I
I
I

I
I

I

l------------~-J:-J:-----GND

7-158

RESISTOR

BUFFER

V CCD

VCCA

COMP

I
I

I
I
___ ...JI
V REF

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIImllllllllllllll~!
FUJITSU
MB40776H Imm~ml~~~~lmllmlm~~~lm~1

RECOMMENDED OPERATING CONlJlTIONS
Parameter

Symbol

Min

Value
Typ

Max

Unit

Power Supply Voltage

VCCA
VeeD

4.75

5.00

5.25

V

Analog Reference Voltage .,

V REF

3.70

4.00

4.30

V

Clock Pulse Width at High level

tw+

8.3

ns

Clock Pulse Width at Low level

t w-

8.3

ns

Data Setup Time

ts

'0.0

ns

Data Hold Time

tH

4.0

ns

TA

0

I

Operating Temperature
Phase Compensation Capacitance'2

CCOMP

,

70

°c
tJ.F

NOTE: ',: Vee - V REF ~ '.2 V
'2: The capacitance should be connected between COMP and GND.

7-159

.m~l~iRI
FUJITSU

111~~IMOOMI~il~MII MB40776H

ELECTRICAL CHARACTERISTICS
'(Vee = 4.75 to 5.25 V, TA = 0 to 70°C)

ANALOG DC CHARACTERISTICS

Value
Parameter

Symbol

Condition

Unit
Min

Typ

Resolution
Linearity Error
Full·Scale Analog Output
Voltage
Zero·Scale Analog Output
Voltage

LE

VOFS

Vozs

DC
Vee = 5.000 V
V REF = 3.976 V
Vee = 5.000 V
V REF = 3.976 V

Reference Input Current

IREF

V REF = 4.00 V

Output Impedance

ZOUT

TA = 25°C

Max
6

bits

±O.B

%

VeeA -0.015

VeeA

VeeA +0.015

V

3.932

3.992

4.052

V

10

/JA

90

n

70

80

(Vee = 4.75 to 5.25 V, TA = 0 to 70°C)

DIGITAL DC CHARACTERISTICS

Value
Parameter

Symbol

Condition

Unit
Min

High·level Input Voltage

VIHO

Low·level Input Voltage

VILO

Maximum Input Current

110

IIHO

Low-level Input Current

IILO

Power Supply Current

lee

NOTE: • Vee = 5.00 V, VREF=4.00V

7-160

Max
V

2.0

Vee = 5.25 V

High·level Input Current

Typ

VI

= 7.00 V

Vee = 5.25 V
VIHO = 2.70V
Vee = 5.25 V
VILO = 0.40 V
V REF =4.05 V

-400

0.8

V

0

100

/JA

0

20

/AA

-40

43'

/JA

65

mA

~~~~~lmlll~lllmlll~mmllllmllllml
FUJITSU

MB40776H Illmlllllll~~~lmlllll~I~~~~~11111111111

(Vee = 4.75 to 5.25 V, TA = 0 to 70°C)

SWITCHING CHARACTERISTICS

Value
Parameter

Symbol

Maximum Conversion Rate

Condition

FS

Unit
Min

Typ

Max

60

-

-

MSPS

TIMING DIAGRAM

3V
DATA INPUT

OV
3V

CLKINPUT

OV

OUTPUT

Note: 'These values are not specified because they dep.end on application circuit.

7-161

~mllillmllillmllllllllllllllllllllllllllllill
FUJITSU
1111111111111111111111111111111111111111111111111111

MB40776H

Fig. 2 - DIGITAL INPUT EQUIVALENT CIRCUIT

Fig. 3 - OUTPUT EQUIVALENT CIRCUIT

V~Do-----~--~~~--~------

25 k

3.5 k

3.5 K

25 k

, - - - - - - 0 VCCA

~---<) A. OUT

IOUTI
INPUT 0----1

VREF

= 1.4 V
' - - - - - - - < ) GNO

GNO

7-162

1111111111111111111111111111111111111111111111111111

FUJITSU

MB40776H 111111111111111111111111111111111111~~IIIII~~~1

OUTPUT VOLTAGE

(VCCA

= 5.000 V, V REF = 3.976 V)

Input Code

OUTPUT VOLTAGE (V)

000000
000001

3.992
4.008

011111
100000
100001

4.4 8 8
4.504
4.520

111110
111111

4.984
5.000

Note: 1LS8 = 16 mV

Fig. 4 -

IDEAL OUTPUT OPERATION

Fig. 5 - PLACTICAL OUTPUT OPERATION

VOUT

5.000 ..................................................... .

V OFS ·····································•············ .....

4.984 .............................................. .

4.520 .................................. .
4.504 ............................ .
4.488 ...................... .

4.024···········
4.008 ....
3.992 _~-'------''---'---'--~-""'LS8-g 0
o
::

(;

MSS-§ §

0
0

......

g

0

0

0

8

...

~

0

0
0
0
0

~

Linearity Error :::

0

00
0

~
I LEn I rna.

~

IFSI

7-163

1IIIImllllllllllllllllllllllllllllllllllll~~~1
FUJITSU
11111111111111~llllm~I~~lmmmllm~llm

MB40776H

TYPICAL CHARACTERISTICS CURVES
Fig. 6 - POWER SUPPLY CURRENT
vs. TEMPERATURE

.s~_8 6070r----r--~r----r--~r---~
L
Vee 5.25V +---t----+----j

Fig. 7 - LINEARITY ERROR
VS. TEMPERATURE

=

f-VREF = 4.05V

f-

~

II:
II:

W

Z

w 50

...J

40

~

>-...J

30

II:

::J

20

~

;;: 10

w

::J
(,)

ffi 0.41-----+----+-----+----+-----1

cr:
«

II:

0

a.

0.6/-----+----t----+----t----;

o

a.
a.

'"w

0.8 ,.....----,-----r----,-----r---~
Vee = 5.000V
VREF = 3.976V

0
-25

0

25

75

50

5

100

0.2/-----+----t----+----t----;
0 ~---:---__::'=----=--__::'::---,-!
-25
0
25
50
75
100

TEMPERATURE TA 1°C)

100

Fig.8 - OUTPUT IMPEDANCE
VS. TEMPERATURE

S

-

;; 9 0
o

N

~

w

~ 8 O~

«
o

w

a.

~

TEMPERATURE TA 1°C)

70

Fig. 9 - ZERO·SCALE ANALOG OUTPUT
VOLTAGE vs. TEMPERATURE

----

~

(fF
-25

= 5.000V
=

3.976V

t---=i-.. . .r;::::=+==::t::j

4.000

~~

3.9801-----+----+-----+------11---1

I

«...J
(')0

6>

f-

o

Vee
V

;i,z w
~

«(!l

~
a. 60
::J

4.040

>-

REF
5 ~ 4.020 /-----+----t----+-----If----1
g~
r---....

II:

3.9601-----+----+-----+-----1---1

w

N

o

25

50

75

3.94~2L,-5----0!:---~2~5----:5~0----::7l:-5--~100

100

TEMPERATURE TA 1°C)

TEMPERATURE TA 1°C)

Fig. 10 - FULL·SCALE ANALOG OUTPUT
VOL TAGE VS. TEMPERATURE
~

+2.0

a.

~>

Vee = 5.000V
VREF = 3.976V

o E +1.0
(!l~

9
~

~

Vee

>

IRef )

~~
5~

-1.0

«w

~~

..J

-2.0

::J
LL

-3.0

-25

o

25

50

TEMPERATURE TA 1°C)

7-164

75

100

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII!I~~III
FUJITSU

MB40776H

Fig. 11 -

20
~ 16

1w
::;;

C

--

8

4

o
-25

20r---~--~----'----'---'
VREF = 4.0V
TA = 25°C
16~--~--~~--+----r--~

Vee = 5.0V
VREF = 4.0V

~

>-

:3
w

Fig. 12 - DELAY TIME vs. POWER
SUPPL Y VOLTAGE

DELAY TIME vs. TEMPERATURE

12

o

25

e 12
w
::;;
~

~

~--+---~----+----r--~

8~--i---~--

__*-~~~~

...J

w

c

4~--4----+----+---~--~
O~

100

75

50

1111111111111111111111111111111111111111111111111111

3.5

__~__~~~~__~__~
4.0

4.5

5.0

5.5

TEMPERATURE TA 1°C)

POWER SUPPL Y VOLTAGE Vee IV)

Fig. 13 - CLOCK PULSE WIDTH
vs. TEMPERATURE

Fig. 14 - CLOCK PULSE WIDTH
vs. POWER SUPPLY VOLTAGE

,S

Vee = 5.0V
VREF = 4.0V

~

+

10

6.0

VREF = 4.0V
TA = 25°C

8

~

~

C

-

'w+

~

25

Q.

"u

2

U

0

o...J

50

100

75

--

4

::J

'wo

6

~

3.5

TEMPERATURE TA 1°C)

250

w

~ 200

5.0

5.5

6.0

POWER SUPPLY VOLTAGE Vee IV)

Vee = 5.0V
VREF = 4.0V

II:
Z

~

4.5

'w+

Fig. 15 - MAXIMUM CONVERSION
RATE vs. TEMPERATURE

N

:I:

~

4.0

'w-

-----..

t---

150

II:

w

~
o

100

~

50

U

::;;

X
«

::;;

0
-25

o

25

50

75

100

TEMPERATURE TA 1°C)

7-165

I~UI~llil~IIIII~~IIII~I~~
FUJITSU
m~m~~~~~
UI MB40776H

••

PACKAGE DIMENSIONS
16-LEAD PLASTIC DUAL IN-LINE PACKAGE
(CASE No_ : DIP-16P-M04)

INDEX-I

I

.244±.010
(6.20±0.251

INDEX-2

!.ir=r=i=:::::;:::r:::r=r=;=;;:::::;:::::;=:;::=;:=;=;::::;'>!~

I trJ V L +. (19.55+0 .2 1 I,) LJ I
I---- 770 008
---I
-.012

IDI

-0.3

.010'.002
(0.25'0.051

Dimensions in
inches (millimeters)

© FUJITSU LIMITED 1986 D16033S·2C

7-166

MB40778
October 1988
Edition 4.0

8-BIT HIGH SPEED D/A CONVERTER
The Fujitsu MB 40778 is a 8-bit low power ultra-high speed video D/A converter fabricated with Fujitsu Advanced Bipolar Technology. The MB 40778
can convert 8-bit digital signals into analog signals at a rate of DC to 20 megasamples/sec (MSPSI. Because of such high speed operation, the MB 40778 is
suitable for appl ications such as digital color TV, video processing with computer, radar signal processing.

•
•
•
•
•
•

Resolution

8 bits

Linearity

±0.2%

Maximum Conversion Rate

20 MSPS min.

Analog Output Voltage range

Vee toVee- 1 [V]

Digital I/O level

TTL

Single Power Supply

+5 [V]

• Power Dissipation

PLASTIC PACKAGE
DIP-18P-M02

PLASTIC PACKAGE
FPT-20P-M01

PIN ASSIGNMENT
(TOP VIEW: DIP)
OSILSB)

250 [mW] typo

0,

o.

• Standard 18-pin DIP Package (Suffix: -P)

VREF

0,
D.

03
0,

ABSOLUTE MAXIMUM RATINGS (See NOTE)

C l 1MSB!

elK

Rating

Symbol

Power Supply Voltage

VeeA
VeeD

Value

Unit
(TOP VIEW: FPT)
ONO

-0.5 to +7.0

V

VCCD

N.C.

De

fLSBI

0,

Digital Input Voltage

V IND

-0.5 to +7.0

V

Analog Reference Voltage

V REF

3.70 to Vee + 0.5

V

o.
O.

Storage Temperature

TSTG

-55 to +125

·c

D.
N,e,

0,

D:!
D,IMSBI
GNO

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

elK

This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields. However. it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedanca
circuit.

7-167

11111111111111111111111111111111111111111111111

FUJITSU
11111111111111111111111111111111111111111111111

MB40778

Fig. 1- MB40778 BLOCK DIAGRAM

r--------------------------------.
I

I
I

~

08

I
I
I
I
I

MASTER
SLAVE
REGISTER

8

8

8

CURRENT

RESISTOR

A.OUT

BUFFER
SWITCH

I

I
I
I
I

I

I
I

l------------l:-~-~-----GNO

7-168

I
I
I
I

VCCD

VCCA

COMP

I
I

I
I
___ ...JI
VREF

1IIIIIIIIIIIIIIIIIIIIIIIIIIIImllllllllllllili

FUJITSU

MB40778

1IIIIImilmlllllllllilimilmllllllllllili

RECOMMENDED OPERATING CONDITIONS
Parameter

Symbol

Min

Value
Typ

Max

Unit

Power Supply Voltage

VCCA
VCCD

4.75

5.00

5.25

V

Analog Reference Voltage * 1

V REF

3.70

4.00

4.30

V

Clock Pulse Width at High level

tw+

25

ns

Clock Pulse Width at Low level

t w-

25

ns

Data Setup Time

ts

12.5

ns

Data Hold Time

tH

12.5

ns

Operating Temperature

TA

0

CCOMP

1

Phase Compensation Capacitance *2
Note:

70

°c
~F

*1: VCC-VREF ;;:;1.2V
*2: The capacitor should be connected between COMP and GND.

7-169

11111111111111111111111111111111111111111111111

FUJITSU
11111111111111111111111111111111111111111111111

MB40778

ELECTRICAL CHARACTERISTICS
(Vee = 4.75 to 5.25 V, TA = 0 to 70D C)

ANALOG DC CHARACTERISTICS

Value
Parameter

Symbol

Unit

Condition
Min

Typ

Resolution
Linearity Error
Full·Scale Analog Output
Voltage

VOFS

• Vee

= 5.000 V
= 3.976 V

V REF

Vozs

Vee = 5.000 V
V REF = 3.976 V

Reference Current

IREF

V REF

Output Impedance

ZOUT

TA

Zero· Scale Analog Output
Voltage

l1li

DC

LE

8

bits

±0.2

%

VeeA -0.015

VeeA

VeeA +0.015

V

3.919

3.980

4.042

V

10

p.A

90

n

= 4.00 V

= 25D C

Max

70

DIGITAL DC CHARACTERISTICS

80

(Vee

= 4.75 to 5.25 V, TA = 0 to 70

Value
Parameter

Symbol

Unit

Condition
Min

High·level Input Voltage

V IHD

Low·level Input Voltage

V ILD

Maximum I nput Current

110

H igh·level I nput Current

IIHD

Low·level I nput Current

IILD

Power Supply Current

lee

Note: • Vee = 5.00 V, V REF = 4.00 V

7-170

Typ

Max

2.0

Vee
VID

= 5.25 V
= 7.00 V

Vee = 5.25 V
VIHD = 2.70 V
Vee
V ILD

= 5.25 V
= 0.40 V

V REF

= 4.05 V

-400

V
0.8

V

0

100

p.A

0

20

p.A

-40

50'

p.A

75

mA

D

C)

1IIIIIIIImllllllllllllllllllllllllllllllllili

FUJITSU

MB40778 1IIIIIIIImllllllllllllllllllllllllllllllllili

SWITCHING CHARACTERISTICS

(Vee = 4.75 to 5.25 V, TA = 0 to 70·C)
Value

Parameter

Symbol

Maximum Conversion Rate

Unit

Condition

FS

Min

Typ

Max

20

30

-

MSPS

TIMING DIAGRAM

3V

DATA INPUT

OV

III

tw----t---3V

CLKINPUT

OV

-rs.....~$

±}\LSB

OUTPUT

Nota: 'These values are not specified because they depend on application circuit.

7-171

11111111111111111111111111111111111111111111111

FUJITSU
11111111111111111111111111111111111111111111111

MB40778

Fig. 2 -

DIGITAL INPUT EQUIVALENT CIRCUIT

Fig. 3 - OUTPUT EQUIVALENT CIRCUIT

VCCD ()---_-~>__-.---~---

25 k

~----{)

A. OUT

L - -_ _- - { )

GND

INPUT 0----1

GND

7-172

11111111111111111111111111111111111111111111111

FUJITSU

MB40778

11111111111111111111111111111I11111111111111111

OUTPUT VOLTAGE

(V CCA = 5 000 V V REF = 3 976 V)

Note: 1 LS8

Input Code

OUTPUT VOLTAGE (V)

00000000
00000001

3.980
3.984

01111111
10000000
10000001

4.488
4.492
4.496

11111110
11111111

4.996
5.000

= 4 mV

Fig. 4 - IDEAL OUTPUT OPERATION

Fig. 5 -

D

PRACTICAL OUTPUT OPERATION
V OUT

LSB-

0

MSB-

0
0
0
0
0

0

...

-

0

0
0
0
0
0
0

~

0
0
0
0
0

~
I LEnl max

Linearity Error;.

IFS I

7-173

11111111111111111111111111111111111111111111111

FUJITSU
1lllllllllllllmlllll!lllllllmllllmllllll

MB4077B

TYPICAL CHARACTERISTICS CURVES
<

Fig. 6 - POWER SUPPLY CURRENT
VS. TEMPERATURE
70r----r---,----,----,---,

i l
_8 60 -VREF
Vee = 5.25V +----+--+----1
= 4.05V
I-

Z

Fig. 7 - LINEARITY ERROR
VS. TEMPERATURE
~

0.8..---r-----,.----,----,--,
Vee = 5.000V
VREF = 3.976V
~ 0.6 + - - - + - - - + - - + - - - + - - - i

~~-~-_4--+_-_+-~

~ 40c::::t:::j::::±:~~~~
u
~

W

.J

o
a:

30~-4---+--+--~-~

ffi

Q.
Q.

~

>I-

20~-4---+--+--~-~

a:

a:

«

w 10+----t---+--+---r----t

~

0.4 + - - - - 1 - - - + - - + - - - + - - - i
0.2 ~--+---+--+_-_+-~

w

~

0

-2~5--~0~-2~5~~5~0-~7~5--~1~00

O~__~__-=~~~
-25

0

TEMPERATURE TA I'C)

100

Fig. 8 - OUTPUT IMPEDANCE
vs. TEMPERATURE

;; 90

.:l

w

li

«
o
w

Q.

~

0 __
8

70

I-

ir

t-

5

::J

o

75

100

Cl u>


c:

60

ot=:

-25

3.960 + - - - - 1 - - - + - - + - - - r - - - - t

w
N

o

25

50

75

3.940'--_-!-_--:O,:_ _ _..1-..__-'-__-.J
-25
0
25
50
75
100

100

TEMPERATURE TA I'C)

TEMPERATURE TA I'C)

Fig. 10 - FULL·SCALE ANALOG OUTPUT
VOLTAGE vs. TEMPERATURE
+2.0

5

Vee = 5.oo0V
VREF = 3.976V

Q.

5>
o E

+1.0

~

Vee

«w
~~

-1.0

~g

-2.0

Cl~

9

~> (Ref )

5~
.J

...

::J

-3.0
-25

o

25

50

TEMPERATURE TA I'C)

7-174

__~__~

4.040 r - - - - . - - - - , - - - - , - - - , - - - ,
Vee = 5.oo0V
VREF = 3.976V
~ 4.020 ~':'::':'--+---j---I---+--l

ON

I-

irI-

50

Fig. 9 - ZERO·SCALE ANALOG OUTPUT
VOLTAGE VS. TEMPERATURE

- -- ----

g

25

TEMPERATURE TA I'C)

75

100

11111111111111111111111111111111111111111111111

FUJITSU

MB40778

Fig. 11 20

E

Fig. 12 - DELAY TIME vs. POWER
SUPPLY VOLTAGE

DELAY TIME vs. TEMPERATURE

Vee = 5.0V
VREF = 4.0V
16r----r----r----r----r---~

16

ew

."

e

w

---

12

:;

f=
>-

:5

w

8i---r---r-"""'9-==F"---)
4r----r----r----r----r---~

o

O~--~--~~--~__~~__~
3.5
4.0
4.5
5.0
5.5
6.0

100

75

50

12r----r----r----r----r---~

:;

TEMPERATURE TA 1°C)

POWER SUPPLY VOLTAGE Vee (V)

Fig. 13 - CLOCK PULSE WIDTH
vs. TEMPERATURE

,E

~

10

8

Fig. 14 - CLOCK PULSE WIDTH
VS. POWER SUPPLY VOLTAGE

,E

Vee = 5.0V
V REF = 4.0V

~

+

+~

j:

o

3:

w
~

10

VREF = 4.0V
TA - 25°C

8

~

OJ:
f-

6

o

4

n.

'"
u

2

u

0

-25

tw+

o

25

~

75

4

tW+

:::J

n.

'"
u

2

U

0

o..J

50

6

3:

---

tw-

:::J

9

11111111111111111111111111111111111111111111111

100

tw-

3.5

TEMPERATURE TA 1°C)

250

L1.

W

!;(

4.5

5.0

5.5

6.0

Fig. 15 - MAXIMUM CONVERSION
RATE vs. TEMPERATURE

N

OJ:

~U)

4.0

POWER SUPPLY VOLTAGE Vee IV)

Vee = 5.0V
VREF = 4.0V

200

a:

z

r-

~ 150

a:
w

~
o
u
~

100

--- --......

50

:;

X



85

90(643mV)

95

IRE>

> IRE
The ratio of a reflection signal composition (VBLANK to Vw) and a syncronous signal composition (VSYNC to VBLANK) Is a
100:40 on EIA RS343A standard. 1/140 of the sum (Reflection signal composition and synchronous signal composition) Is
named liRE which Is used as unit of a reflection signal.

1IIIIIIIIIIIOOIIOOIMIII~III~~~
FUJITSU

MB40874 IIMIIIIIIIIIIIIIIIOOOOIIIIIIIOO~1

ELECTRICAL CHARACTERISTICS (Continued)
DIGITAL DC CHARACTERISTICS
(VCC = +5.0V±5%, TA-= O°C to +70°C, unless otherwise noted.)
Value
Parameter

Symbol

Condition

Inout hlah voltaae

VIH

Input low voltaae

VIL

Input cramp voltage

VIC

Vcc=4.75V.

Input high current

IIH

Vcc=5.25V

Min
2.0

V

1I=-IBmA

O.B

V

-1.5

V

I VI=7V

100

A

20

j.lA

-0.4

mA

0.4

V

I

VI=2.7V

Input low current

III

Vcc=5.25V

VI=O.4V

Output high voltage

VOH

Vcc=4.75V.

IOH=-4OOI1A

Output low voltage

VOL

Vcc=4.75V IIOl=4mA

Output leakage current

los

Vcc=5.25V

Output current

loz

Vcc=5.25V

2.7

3.4

Off condition (HI-Z)
Icc

V

0.25

0.5

0.35

Ilol=BmA

Power supply current

Unit

Max

Typ

V

-100

-20

I Vo=2.4V
I Vo=0.4V

Vcc=5.25V

mA

20

I1A

-20

I1A

120

mA

SWITCHING CHARACTERISTICS
Video Output
(VCC = +5.0V±5%, TA =

oDe

D

to +70°C, mess otherwise noted.)
Value

Parameter

Symbol
Min

Typ

Unit
Max

ClK cvcle time

tClK

20

ns

ClK hlah pulse width

twclK+

7

ns

ClK low pulse width

twclK-

7

ns

Address, elK. SYNC hlah pulse width

twv+

18

ns

Address, elK. SYNC low pulse width

twv-

lB

ns

Address. elK, SYNC setup time

tsv

6

ns

Address. elK. SYNC hold time

tHV

3

Propagation time

tpo

ns
25

ns

7-191

1111111~!IMIIIIIII~!IOO~lmMIL
FUJITSU

I~OOlllmOOIIIIIIIMIII~111111 MB40874

ELECTRICAL CHARACTERISTICS (Continued)
SWITCHING CHARACTERISTICS (Continued)
LUT Access (Read)
(Vee = +5.0V±5%, TA = o·e to +70·e, unless otherwise noted.)
Value
Parameter

Symbol

Unit
Min

Typ

Max

es Dulse width low level time

twcSA

100

ns

RfW setup time

tSAwA

10

ns

RfW hold time

tHAWA

10

ns

BLK setup time

tSBA

2xtCLK+6

ns

BLK hold time

tHBA

tCLK+3

ns

Address setup time

tSAR

2XtcLK+6

ns

Address hold time

tHAR

tCLK+3

Data setup time

tOEN

Data hold time

tOOlS

ns

15

50

ns

50

ns

LUT Access (Write)
(Vee = +5.0V±5%, TA = o·e to +70·e, unless otherwise noted.)
Value
Parameter

Symbol

Unit
Min

Typ

Max

es Dulse width low level time

twcsw

100

ns

RfW setup time

tSAWW

10

ns

RfW hold time

tHAWW

10

ns

BLK setup time

tSBW

2xtCLK+6

ns

BLK hold time

tHBW

tCLK+3

ns

Address setup time

tSAW

2xtCLK+6

ns

Address hold time

tHAW

tCLK+3

ns

Data setup time

tso

10

ns

Data hold time

tHO

10

ns

7-192

1111111111111111111111111111111111111111111111111111

FUJITSU

M840874

1111111111111111111111111111111111111111111111111111

Fig. 2 - VIDEO OUTPUT TIMING DIAGRAM

ClK

AD to A3

EiLR.

SYNC

N

OUT

Fig. 3 -

LUT ACCESS (READ) TIMING DIAGRAM
twesR

Cs
tSRWR

R/IN

10

BlK
AD to A3
tOOlS

tOEN
Output Data

DO to 03

Fig. 4 - LUT ACCESS (WRITE) TIMING DIAGRAM
twesw

CS
tSRwW

R/IN
tHBW

B'i:'K
tHAW

AD to A3
tHO

tso
DO to 03

Input Data

7-193

1IIIIIIIIIIIIIIIIIOOIIWMlmIM~III~
FUJITSU

~W~IIOOI~~~IMIWWIIMli

MB40874

Fig,S - DAC OUTPUT VOLTAGE

BLK

SYNC

LUT DATA

H

L

HHHH

(S.OOOV)

HHHL
HHLH

643mV

100lRE

LLHL
LLLH

D

L

L

LLLL

(BLACK)

* *

(BLANK)

'Ir

III

(4.3S7V)
71mV
, (4.286V)

286mV

L

Note:

7-194

H

(SYNC)

* Don't Care
Output Is pulled up to VOOA at 37.50,

-

l

40lRE

.l...

(4.000V)

~I I I I I I I I I I I I I I I I I I I I I I I I I I I 1 1 1 1
FUJITSU

MB40874 I~IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII

Fig. 6 - EXAMPLE OF MB40874 CONNECTION CIRCUIT

+5V

l0J.lH

*

3.3J1 F

Clock signal

""'~" ,,,.

{

Blank signal
Sync signal

control signal
and
Data 1/0

=

I

*

l0J.lH
IO.33J1F
_
20

14

VCCD

VCCA

3

Z
6
5
4
9
15
17
16
2
1
19
18

0.33J1F

300

ClK
A3
A2
A1
Ao

BlK
SYNC

R REF

13

r------OAC 1---------+--1
OUT
12

I
I

CS
R/W
03
02
01
Do

J-.....-

.. CRT

}&--"""':'"I-<
750

III

I
I
COMP ...,..8_ _ _-,

I
I
L_~

____ _

7-195

~11~lllllllilll~IIIIIIIIIIIIIIMlllllilllllllllll
FUJITSU
1IIIIIIIilllllllllllllllllllillillllllllllllllllllili

MB40874

Fig. 7 - APPLICATION INFORMATION

MB40874 x 3

---<~

r--'

4
4
4
Video
RAM

.01

I~

I-

...".

00"
...

~

:..::;"

...

,

Vee

~750

~r--

R
G
B

I r H-J

1_t- ~

CRT

750

~

':'

~.,
System Bus

The above application Is an example of ROB system using 3 pcs of MB40874. The system allows user to simultaneously display
whole 4096 kind of color defined by the number of bit of LUT and DJA converter and promptly change color tone.

1IIIIIIOOIlIlIIlIIIIIIIIIIlIlIIOOIIIII~11I
FUJITSU

MB40874

11111111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
20-LEAD CERAMIC DUAL IN-LINE PACKAGE
(CASE No.: DIP-20C-C01)

:fI"'1I~ : := :~ :,;;:.~:: := := := :1JJ~Y:lf
1.1--'=~~_+-_L
124.13~~:~~)

-1~________________~___~
.200IS.08)MAX

.134±.014
13.40'0.36)
.loo±.OIO

12.S4±0.2S)

f---+---.-=C90::::0=122::-:.8=6~)R-=CEF=-----+1'-----1
.018~:ggg
(0.46~g:~~)

Oimensions in
inches (mjllimeters~

©1988 FUJITSU LIMITED D20001S-3C

7-197

IOOIOOIII~IIIMIM~IIMIIIOOMIill
FUJITSU

~III~I~I_ MB40874

PACKAGE DIMENSIONS (Continued)
20-LEAD PLASTIC DUAL IN-LINE PACKAGE
(CASE No.: DIP-20P-MO~)

r--.970::~g(24.64:gjg)~
INDEX-1

~

111 r1 r1

r1 rl

o

I

~.010
~
(6.20±0.25)
I I

-=_==__:; ;_=;: := : ;, ~ 15' MAX

.300(7.62)

TYP

L:::.""=IIS:::~
.010±.002
(0.25±0.05)

ill.172(4.36) MAX

~.116(3.00) MIN
.050(1.27)
MAX

D

.100(2.54)

TYP

© 1988 FUJITSU LIMITED D20003S-3C

7-198

•

II

.01B±.003
(0.46±0.OB)

.020(0.51) MIN

Dimensions in
inches (millimeters)

00

November 1989
Edition 1.0

FUJITSU

DATA SHEET

MB40968140968V
2-CHANNEL 8-BIT DIA CONVERTER
2-CHANNEL 8-BIT D/A CONVERTER
The Fujitsu MB40968140968V is a 2-cllannel 8-bit high speed digital to analog converter for
video frequency band fabricated by Fujitsu Advanced Bipolar Technology. This is suitable for
YC signal processing of digital VCR.

PLASTIC PACKAGE
DIP-28P-M03

•

Resolution: 8-bits

•

Linearity Error: ±0.2% (Max)

•

Maximum Conversion Rate: 30MHz (Min)

•

Analog Output Voltage Range: 3 to 5V

•

Reference Voltage Output:

PLASTIC PACKAGE
FPT-28P-M01

MB40968: Resistance-type potential divider output (315 x VCCA)

PIN ASSIGNMENT

MB40968V: Band Gap Reference output (VccA-2 [V) )
•

Digital Input Voltage:

TTL level

•

Single Power Supply Voltage: +5.0 [V)

•

Power Dissipation: 270 [mW] (Typ)

ABSOLUTE MAXIMUM RATINGS (see NOTE.)
Ralings
Power Supply Voltage

Symbol
VCCA, Vcco

Digital Input Voltage

V,O

Storage Temperature

TSTG

NOTE:

Value
~.5to

~.5to

+7.0
+7.0

-55 to +125

Unit
V
V

AS

A4

AS

A3

A7

A2

AS

At

ClKA

VCCO

Bt

VCCA

B2

AOUT

B3

A.GND

B4

BOUT

B5

VCCA

B6

VRIN

B7

VROUT

B8

CDMP

ClKB

O.GNO

OC

Permanent device damage may occur if the above Absolute Maximum
Ralln\ls are exceeded. Functional operation should be restricted to the
condiDon. as detailed in the operational sections of this data sheet. Exposure to
absolute maximum rating conditions for extended periods may affect device
reliability.

~~~~08CO~lai~~~r::t~ t~ac:

:re~~ ,:~:~

However, it is advised that normal precautions be taken to
avoid application of any voltage higher than maxirTlJm rated
vohages to this high irrpedance circuit.

Quick Pro™ is a trademark of FUJITSU LIMITED
Cqlyrfghl@t98QbyFUJITSULlMITEO

7-199

MB4096B
MB4096BV

Fig. 1 -

MB40968/40968V BLOCK DIAGRAM

CLlv,

A-OUT

A, (MSB)

A2
A3

A4

Input
Buffer

Master Slave

F-F

8

Buffer

Current
Switch

(A)

(A)

A5

As
A7

As (LSB)

(A)

(A)

ClKB

IIDI

B-OUT

B, (MSB)

Master Slave

8

B5

F-F

Buffer

Current
Switch

(B)

(B)

Be
B7

Be (LSB)

(B)

(B)

Reference
Resistor

1 1

D.GND

7-200

A.GND

VROUT

VRIN

COMP

1

VCCD

VCCA

MB40968
MB40968V

PIN DESCRIPTION
Pin Number

Symbol

VO

Descriptions

25 to 28
1 t04

A. to As

I

A-channel Digital Signal Inputs: A. (MSB), As (LSB)

6 to 13

B. to Be

I

B-channel Digital Signal Inputs: B. (MSB), Be (LSB)

5

CLKA

I

A-channel Clock Input

14

ClKs

I

B-channel Clock Input

24

VeeD

-

Power Supply for Digital Circuit

19,23

Vee.

-

Power Supply for Analog Circuit, two pins (19,23) should be used

5

D-GND

-

Ground for Digital Circuit

21

A-GND

-

Ground for Analog Circuit

18

VRIN

I

Terminal for reference voltage input.
Zero scale voltage of analog output is specified applying any voltage to this terminal.
Input reference voltage should be 2.7 to 4.3V and,
Vee. - VRIN'; 2.2V.

MB40968
VROUT

0

Terminal for reference voltage output by resistance-type potential divider.
Analog output of "Vee. to 315 x Vee." is supplied connecting this terminal with
VRIN terminal.

MB40968V
VROUT

0

Terminal for reference voltage output consists of Band Gap reference.
This terminal supplies the voltage of "Vee. to Vee. -2V".
2V output is maintained connecting this terminal with VRIN, even if the power
supply fluctuates frequently.

16

COMP

-

Terminal for phase compensation capacitance;
Capacitance of II'F or more should be inserted between COMP and A-GND.

22

AOUT

0

A-channel Analog Signal Output

20

BoUT

0

B-channel Analog Signal Output

17

7-201

MB40968
MB40968V

RECOMMENDED OPERATING CONDITIONS
Value
Parameter

7-202

Unit

Symbol

Min

Typ

Max

Power Supply Voltage

VCCA, VCCD
(VCCA- VCCD)

4.75
(-0.2)

5.00

5.25
(0.2)

V

Analog Reference Voltage

VRIN

2.70

3.00

4.30

V

High Level Digital Input Voltage

V,HD

2.0

Low Level Digital Input Voltage

V,LD

0.8

V

Clock Frequency

!eLK

30

MHz

Data Set Up Time

IS

to.O

ns

Data Hold Time

III

4.0

ns

High Level Clock Pulse Width

tw+

to.O

ns

Low Level Clock Pulse Width

tw-

10.0

ns

Phase Compensation Capacitance

CCOMP

1.0

I'F

Operating Temperature

TA

0

V

70

"C

MB40968
MB40968V

ELECTRICAL CHARACTERISTICS
[VCC

=4.75 to 5.25 (V), TA =0 to 70°C]
Value

Parameter

Symbol

Condition

Unit
Min

Resolution

-

Linearity Error

LE

Reference Input Current

Typ

Max
8

Bit

DC

±C.2

%

IRIN

VRIN, VROUT

10

flA

High Level Digital Input Current

liND

V,ND = 2.7 (V)

20

flA

Low Level Digital Input Current

IILD

V,LD = 0.4 (V)

-100

2-channel's Output Voltage Ratio

FSR

Vcc = 5.00 (V)
VRIN, VROUT

0

Full-Scale Analog Output Voltage

VOFS

Vcc = 5.00 (V)
VRIN, VROUT

VccA-15

VCCA

Zero-Scale Analog Output Voltage

Vozs

Vcc = 5.00 (V)
VRIN = 3.000 (V)

2.938

3.008

3.078

V

Output Resistance

Ro

TA = 25"C

192

240

288

0

Power Supply Current

Icc

Vcc = 5.25 (V)
VRIN, VROUT

54'

80

flA
4

%

mV

mA

Note: 'Vee = 5.00 (V)

IDI

MB40968
Reference Output Voltage

Vcc = 5.00 (V)

MB40968V
Reference Output Voltage

VCCA
-1.800

VROUT

VCCA
-2.000

Reference Output Voltage
Temll"rature Constant

VCCA
-2.200

100

SWITCHING CHARACTERISTICS

V

ppml"C

[Vee = 4.75 to 5.25 (V), TA = 0 to 70°C]
Value

Parameter

Symbol

Condition

Unit

Min
Minimum Conversion Rate

Fs

Output Delay Time

Ipd

30

Max
MSPS

AOUT, BOUT 2400

10

ns

5

ns

5

ns

15

ns

Output Rise TIme

Ir

AOUT, BOUT 2400

Output Fall Time

r

AOUT, BOUT 2400

Isot

AOUT, BOUT 2400

ResetTime

Typ

I

7-203

MB40968
MB40968V
Fig. 2 - DAC OUTPUT VOLTAGE

Input

Output

AH!
Bl-8

AoUT
BoUT

5.000V
5.000V

(VCCA) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - FF

00

3.008V
3.000V

VOZS

(VRIN)

1 LSB =8mV

SWITCHING CHARACTERISTICS (Continued)
Fig. 3 - TIMING DIAGRAM

.

.'

=x

: - - - Is - -..........f- In --:

Data Input

X

r...-_-_-_-_-_-_-_-_-_-_-_""'-'X,..1.-5V----:~

.

.

.

'--- tw+ --.......- tw- --...

Clock Output

''--_..J;r---\
-

ir---,-I-.5V---

i~~L-\t.::--:-,-:-=---------

3V
OV

VOFS

±1/2LSB

..

Analog Output
--..

tp~H:-_

7-204

.

tr :......

I

tsellH

--.

tsetHL

.:-

MB40968
MB40968V
Fig. 4 - DIGITAL INPUT EQUIVALENT CIRCUIT (A1 to Aa, B1 to Ba, ClKA, ClKS)
V~D o-----~--~--~~------

Digital Input

Threshold Voltage

= 1.4V

D.GND

Fig. 5 - ANALOG OUTPUT EQUIVALENT CIRCUIT (AOUT, BOUT)
VCCAo----_-----

+------0

Analog Output

A.GND 0-----.....- - - - -

Fig. 6 - MB40968 REFERENCE OUTPUT VOLTAGE (VROUT)
VCCAo-----_-----

+------0

A.GND

VROUT

0-----.....-----

Fig. 7 - MB40968V REFERENCE OUTPUT VOLTAGE (V ROUT)
VCCA

0-----,--------------------_---

Rs·

>------''Mf----o

VROUT

Nole: °Reference for preventing over current when short circuit with GND.

7-205

MB40968
MB40968V

The relations between Digital input code and Analog output voltage of MB40968/40968V are ideally indicated as
follows.
VIN = VCCA _

256 - N .(VCCA - VAIN)
256

N: 0 to 255 Digital Input Code

VOFS= VCCA
Vozs = VCCA -

255
256 .(VCCA - VAIN)

Output Voltage Ratio between 2 channels is calculated as follows.
FSR = [

l1li

7-206

VOFS(A) - VOZS(A)
VOFS(B) - VOZS(B)

-1 ]

x 100%

MB40968
MB40968V

PACKAGE DIMENSIONS
23-LEAD PLASTIC DUAL IN-LINE PACKAGE
(Case No.: DIP-28P-M03)

.400(10.161

TYP

.07011.778IMAX

~=lny,,,,,,,,.,,
(1.778±0'18t~ J .039~c?20
il.oo~g501 --I1·(o.45:00i~1 +-

Il

.()7g,,007

=-D11813.00IM,N

.018±.004

-

I

------.910(23.114IREF--~

@

1988 FUJITSU LIMITED D2B012S-3C

.02010 511MIN

Dimensions In
inches (millirrstel'l)

7-207

MB40968
MB40968V

PACKAGE DIMENSIONS (Continued)
2HEAD PLASTIC FLAT PACKAGE
(Case No.: FPT-28P-M01)
.110(2.80IMAX
(SEATED HEIGHTI

~

-699' 008
010{1775'0251~
020

- ---1

~~~======~~~~~==~~~l

402t 016
{10 20. 0 401

INOEX

~

.362 t.012
(9.2010.30)

.299 ! .012
{7.60' 0.301

~:;:;::::;:;::::;::::;:;:::;::;::::;:;=;:;=:;:;::::;:;::::r==r;=#J~

====tI

.020± .OOB
(0.50t 020)

"
006 + .002{0 15 ' 0.05)
-1\--.
_.001· 0.02

r-------------,
Details of "Au part
I

1

I

I

I

.008{0.20) I

..1

FL1

IDI

I
I

I
I

I

I
I

I
1

I
.02410.60) I
I
.007{0.181 I
MAX
027{0681
I

L_______ ~~~ ____:
e

7-208

1988 FUJITSU LIMITED F28005S-4C

Dimensions In
Inches (milimeters)

MB40978
July 1988
Edition 2.0

8-BIT 60MSPS RGB 3-CHANNEL D/A CONVERTER
The Fujitsu MB40978 is a 8-bit ultra high speed digital to analog converter for
video frequency band fabricated by Fujitsu Advanced Bipolar Technology.
Owing to adoption of RGB 3-channel input/output. it is suitable for digital
TV. graphic display etc.

•

Resolution

8 bits

•

Linearity

±0.2%max.
PLASTIC PACKAGE
FPT-44P-MOl

• Maximum Conversion Rate

60 MSPS min.

•

VCC to Vcc-1V

Analog Output Voltage Range

PLASTIC PACKAGE
DIP·42P-M02

• Digital Input Voltage

TTL Level

• Single Power Supply Voltage

+5.0V

• Power Dissipation

350mWtyp.

• Package

Plastic DIP Package
Plastic Flat Package

PIN ASSIGNMENT
TOP VIEW: DIP

R7

RS

Rs

A5

G,

R4
R3
R2

G2
G3
G4

R,

VCCO
VCCA

G5

Gs
ABSOLUTE MAXIMUM RATINGS (see NOTE)

G7

GND

Gs

ROUT
GND

8,
82

Rating

Symbol

Value

Unit

Power Supply Voltage

VCCA • Vcco

-0.5 to +7.0

V

Digital Input Voltage

VIO

-0.5 to +7.0

Storage Temperature

TSTG

-55 to +125

III

GOUT
GND
8 0UT
GND

83
84

85
8s
87

VAIN

V

8s

°c

CLKs
CLKG
CLK A

VCCA
CaMP
VCCO

V AOUT

GND
TOP VIEW: FPT

-See Page 10

NOTE: Permanent device _damage may occur if ABSOLUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximllm rating conditions for extended
periods may affect device reliability.

This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than ma?,i-

mum rated voltages to this high impedance
circuit.

7-209

1111111111111111111111111111111111111111111111111111

FUJITSU
1111111111111111111111111111111111111111111111111111

MB4097B

Fig. 1 - MB40978 BLOCK DIAGRAM

CLKR

ROUT

Rl(MSB)

R2
R3

R4

As

(R)

R6
R7

MASTER
SLAVE
F-F
(R)

BUFFER

8

(R)

CURRENT
SWITCH
(R)

Ra(LSB)

CLKG

GOUT

Gl(MSB)

G2
G3

INPUT
BUFFER

G4

IDI

G5

(G)

G6
G7

MASTER
SLAVE
F-F
(G)

8

BUFFER

8

(G)

CURRENT
SWITCH
(G)

G8(LSB)

CLK.

BOUT

Bl(MSB)

B2

INPUT
BUFFER

B3

B4
B5

(B)

B6
B7

MASTER
SLAVE
F-F
(B)

BUFFER

(B)

8

CURRENT
SWITCH
(B)

B8(LSB)

GND

7-210

VAOUT

VRIN

COMP

VCCD

VeCA

1111111111111111111111111111111111111111111111111111

FUJITSU

MB40978

1111111111111111111111111111111111111111111111111111

PIN DESCRIPTION
Pin Number

Symbol
(DIP Pin Assignment)

Descri pti ons
V IH = 2_0V min_

R1 to Rs

1,2,37 to 42

R-channel Digital Signal Inputs

G1 to Gs

3 to 10

G-channel Digital Signal Inputs

B1 to Bs

11 to 18

B-channel Digital Signal Inputs

ROUT

33

R-channel Analog Signal Output

GOUT

31

G-channel Analog Signal Output

BOUT

29

B-channel Analog Signal Output

ClK A

21

R-channel Clock Input

ClK G

20

G-Channel Clock Input

ClKs

19

B-channel Clock Input

VAIN

27

Reference Voltage Input

V AOUT

26

Reference Voltage Output

COMP

24

V CCA

25,35

Power Supply for Analog Circuit 5V±5%

V CCD

23,36

Poer Supply for Digital Circuit

GND

22,28,30,32,34

Ground

V IL = 0_8V max.

V IH = 2.0V min.
V IL = 0_8V max.

Vcc = -1.2V min.

This pin is provided to connect a phase compensation capacitance.
1j.tF min capacitor is connected between GND.

5V±5%

7-211

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImllllllllllili

FUJITSU
1IIIIIIIIIIIIIIIIIIIIIIIImlllllllllllllllllllllili

MB40978

RECOMMENDED OPERATING CONDITIONS
Value
Symbol

Parameter

V CCA • V CCD
(VccA-VccDI

Power Supply Voltage

Unit
Min

Typ

Max

4.75
(-0.21

5.0

5.25
(0.21

V

4.00

4.30

V

Analog Reference Voltage'

V RIN

3.70

Digital High-level Input Voltage

V IHD

2.0

Digital Low-level Input Voltage

V ILD

0.8

V

Clock Frequency

fCLK

60

MHz

Set·up Time

ts

10

ns

Hold Time

tH

4.0

ns

Minimum High Pulse Width

tw+

7.5

ns

Minimum Low Pulse Width

tw_

7.5

ns

Phase Compensation Capacitance

CCOMP

1.0

JlF

Operating Temperature

TA

0

V

°c

70

Note: 'V CCA - V REF ~ 1.2V

ELECTRICAL CHARACTERISTICS

(Vee = 4.75 to 5.25V. TA =Oto70°CI
Value

Parameter

Symbol

Condition

Unit
Min

Typ

Resolution
Linearity Error

LE

Reference Input Current

IRIN

Reference Output Voltage

V ROUT

Vcc = 5.00V

Digital High·level Input Current

IIHD

V IHD = 2.7V

Digital Low·level Input Current

IILD

V ILD = O.4V

RGB Output Voltage Ratio

FSR

Full·Scale Output Voltage

V OFS

Zero-Scale Output Voltage

Output Resistance
Power Supply Current
Note: 'Vcc = 5.00V

7-212

V RIN • V ROUT Short
3.900

4.000

Max
8

Bits

±0.5

LSB

10

JlA

4.100

V

20

JlA

-100

JlA

%

0

2

Vcc = 5.00V
V RIN • V ROUT Short

V CCA
-15

V CCA

Vce = 5.00V
V RIN =4.00V

3.944

4.004

4.064

V

Vcc = 5.00V
V RIN • V ROUT Short

3.884

4.004

4.124

V

8

mV

V ozs

Ro
Icc

n

240
Vcc = 5.25V
V RIN • V RDUT Short

'70

102

mA

1111111111111111111111111111111111111111111111111111

FUJITSU

MB40978

. SWITCHING CHARACTERISTICS

(Vee

1111111111111111111111111111111111111111111111111111

=4.75 to 5.25V, TA =0 to 70°C)

Value
Parameter

Unit

Symbol
Typ

Min

Max
MSPS

60

Maximum Conversion Rate

Fs

Output Delay Time

tpd

10

ns

Output Rise Time

t,

5

ns

Output Fall Time

tf

5

ns

Fig. 2 - DAC OUTPUT VOLTAGE

Output

Input

ROUT
GOUT
BOUT

R1 to Ra
G1 to Ga
B1 to Ba

FF

I
I
I
I
I
I
I
00

-

(VccAI
VOFS -

-

-

-

Vozs- -

-

-

(VREFI

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

5.000V
5.000V

3.980V
3.976V
1LSB = 4 mV

7-213

111~llllllllmlllllimlmllllllllllllllllllllll
FUJITSU
II~mllmllmllllllmllllmlm~~IIIII~lm MB40978

SWITCHING CHARACTERISTICS (continued)
Fig. 3 - TIMING DIAGRAM

I-Data Input

ts

-+-

tH--I

I

jE
~ tw+

Clock Input

~

*

-fe-

I

I

"\

f

tw-

3V

*

--t

1.SV
OV

I

3V

f

\l.SV

I
I

ov

,..---.......:....--,:----- v OFS
Analog Output
10%
Vozs

II I

--\t,_
I

--I

7-214

tPLH

,

I--

I

I I I

I ---I
I
--I

tPHL

t:

l-

I
I-

Immlllm~~~~lllllmlllll~~~~III~~~1
FUJITSU

MB40978

1111111111111111111111111111111111111111111111111111

APPLICATION EXAMPLES
Fig. 4 - RGB SIGNAL PROCESS

VCC

VCCD
CLOCK

ClKR

VRIN

ClKG

VROUT

ClKs
01 to Os (R)

VCCA

R 1 to Rs

GND
ROUT
GND

01 to Os (G)

G1 to Cl2

GOUT
GND

01 to Os (B)

B 1 to Bs

BOUT

~1
~1
~1

ROUT

GOUT

BOUT

GND

7-215

~~~~III~~mmmli~ll~m~~~IIIMI
FUJITSU

1111111111111111111111111111111~ml~~llllllmll MB40978

•

APPLICATION EXAMPLES (continued)
Fig. 5 - COMPONENT SIGNAL PROCESSING

Vee

VeeD
CLOCK (V)

CLKR

VRIN

CLOCK (R-V)

CLKG

VROUT

CLOCK (B-V)

ClKs

D, to Ds (R)

R, to Rs

GND
ROUT

ROUT
(V)
GND

D, to Ds (G)

GI to

as

GND
D I to Ds (B)

B I to Bs

MATRIX

GOUT

BOUT

BOUT
(B-V)

7-216

GOUT

(R-V)

1111111111111111111111111111111111111111111111111111

FUJITSU

MB40978

1111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
42-LEAD PLASTIC DUAL-IN-liNE PACKAGE
(CASE No_: DIP-42P-M02)

.600±.010
(15_24±0.25)

~
II111I1 ~ ~ ~ ~
!
.070(1.778)
TYP

IL

~~
(1.00~g.50)

-JI ..

018±.004

i

w

"""."

.118(3.00)MIN

.020(0.51)MIN

(O.45±0.10)
Dimensions in

© FUJITSU LIMITED 1987 D42007S·2C

inches (millimeters)

7-217

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~III~II
FUJITSU

MB40978

1111111111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS (continued)
PIN ASSIGNMENT
Veca
NC

GND

VeCA

GND

GND

GND

ROUT GOUT BoUT

VRIN

44 43 42 41 40 39 38 37 36 35 34
Rl

1

R,

2

R,
R,

,

R,

5

R,

•

R,

33

0
1 PIN INDEX

3

VRQUT

32

VeCA

31

COMP

30

Veca

29

GND

28 ClK. R
27

7

Ra a

CLKG

2. elKs

G,

9

25

G,

10

24

B,

G3

11
12 13 14 15 16

23

86

Ba

17 18 1920 21 22

G4 G s G s G 7 G s GNDB1 8 2 B J 84 85

44·LEAD PLASTIC FLAT PACKAGE
(CASE NO.: FPT·44P·M01)

.075(1.90)
MAX

.002(0.05)
MIN
(Stand off)

View "A"
.007(0.18)MAX

~

J~53)MAX
.016(0.40)

.0315±.006.1
(0.80±0.15)

L JI

.012±.004
(0.30±0.10)

© FUJITSU LIMITED 1987 F44002S-5C

7-218

.006±.002
(O.15±0.05)

Dimensions in
inches (millimeters)

MB40176
September 1988
Edition 1.0

6-BIT AD/DA CONVERTER WITH CLAMP CIRCUIT
The Fujitsu MB40176 Is a low power 6-blt ADIDA converter which Is fabricated with
Fujitsu Advanced Bipolar Technology. Owing to adoption of clam per and reference
circuitry, It Is suitable for vfdeo signal processing.
• Resolution

: 6 bits

• Linearity Error

: to.8% max.

• Maximum Conversion Rate

: 20 MHz min.

• Analog Input Voltage Range

: 0 to 1.0 V

PLASTIC PACKAGE
FPT-28P-M01

• Analog Output Voltage Range : Vcc to Vcc - 1 V
• Digital 1/0 Level

: TTL Level

• Power Supply Voltage

: +5 V

• Power Dissipation

: 300 mWtyp.

• Package
28 pin Plastic FLAT Package
28 pin Plastic DIP Package

(Suffix: -PF)
(Suffix: -PI
PLASTIC PACKAGE
DIP-2BP-M03

Rating

Symbol

Value

Unit

Power Supply Voltage

VCCA, Vcco

-0.5 to +7.0

V

Digital Input Voltage

VINO

-0.5 to +7.0

V

Analog Input Voltage

VINA

-0.5 to Vcc +0.5

V

Storage Temperature

TSTG

-55 to +125

'C

NOTE:

D

PIN ASSIGNMENT

ABSOLUTE MAXIMUM RATINGS (see NOTE)

Permanent device damage may occur If the above Absolute Maximum
Ratings are exceeded. Functional operation should be restricted to the
conditions as detailed In the operational sections of this data sheet. Exposure
to absolute maximum rating conditions for extended periods may affect
device reliability.

DACK
(MSB)Dol
002

Do3

DD4
Dos
(LSB)DD6
(LSB)DA6
DAS

OM
DA3
DA2
(MSB)DAl
ADCK

D.GND
Vcca
A.GND
VCCA
VOUT
COMP
VREF
C2
Cl
VIN
VCCA
A.GND
VCCO
D.GND

This device contains circuitry to protect the
Inputs against damage due to high static
voltages or electric fields.
However, It Is
advised that normal precautions be taken to
avoid application of any voltage higher than
maximum rated voltages to this high Impedance
circuit.

Copyright @1988 by FUJITSU lIMrTED and Fujitsu Microelectronics, Inc.

7-219

111111111111111111111111111111111111111I1111I11

FUJITSU
1IIIIIIIIIIIItllllllltlilltllllllllllllllilltii

MB40176

Fig. 1 - MB40176 BLOCK DIAGRAM
Cl

C2

VIN

O.8VCCA

O.8VCCA

ADCK

O.8VCCA

0----+--1
VCCA

Rl

1----+-+--0

DAl (MSB)

I - - - - - t - - - t - - ( J DA2

LATCH
&
BUFFER

63 TO 6
ENCODER

1----+-+--0

DA3

I - - - - - t - - - t - - C J DM
i - - - - - t - - - t - - ( J DA5
i - - - - - t - - - t - - ( J DAS (LSB)

VREF ~~--------------------------------------~

DACK

DDl to

I--+--()

DDS

A.GND D.GND VCCD

7-220

VCCA

COMP

VOUT

11111111111111111111111111111111111111111111111

FUJITSU

MB40176

11111111111111111111111111111111111111111111111

PIN DESCRIPTIONS
Section

AID

Symbol

Pin No.

Type

VIN

19

-

Analog signal Input.

VREI'

22

-

Reference voltage output.

8 to 13

-

Digital signal outputs.

Cl

20

-

C2

21

-

ADCK

14

-

AID conversion clock Input.

VOUT

24

Analog signal output.

2 to 7

-

23

-

Phase compensation capacitor Is connected.

DAI to DM

Name & Function

Clamp capacitor Is connected between these pins.

DOl to D06

Digital signal Inputs.

D/A
COMP
DACK

I

-

DI A conversion clock Input

VCCA

18.25

-

Power supply for analog circuit.

Vcco

16.27

-

Power supply for digital circuit.

A.GND

17.26

-

Ground for analog circuit.

D.GND

15.28

-

Ground for digital circuit.

Common

FUNCTIONAL DESCRIPTIONS
CLAMPER OPERATION
On-chip clamper Is peak detection type which clamps the sink top of composite signal. Clamp voltage Is common to the reference
voltage (0.8 Vcc) of AD and DA circuits.

Input level of VIN

Input level of AD circuit

Output level of DA circuit
------------ VCCA

~~-,

7-221

Ilmmmimmlilimmmllllllillmill

FUJITSU
lllmlillmlllllllillmmmllllllillmi

MB40176

RECOMMENDED OPERATING CONDITIONS
Value
Parameter

Symbol

Min

Typ

Max

4.75

5.0

5.25

Unit

Power Supply Voltage

VCCA, VCCD

Digital High-level Input Voltage

VIHD

Digital LOW-level Input Voltage

VILD

0.8

V

Clock Frequency

fCLK

20

MHz

Clock Pulse Width at High Level

tw+

20

ns

Clock Pulse Width at Low Level

tw-

20

ns

Set-up Time

ts

12.5

ns

Hold Time

tH

7.5

ns

Phase Compensation CapaCitance

CCOMP

1.0

J.lF

Clamp Capacitance

CCLAMP

1.0

J.lF

Reference Voltage Capacitance

CVREF

1.0

J.lF

Operating Temperature

TA

7-222

V

2.0

0

V

70

·C

11111111111111111111111111111111111111111111111

FUJITSU

MB40176

11111111111111111111111111111111111111111111111

ELECTRICAL CHARACTERISTICS
ANALOG CIRCUIT DC CHARACTERISTICS (VCCA

=VCCD =5V+5%. TA =0 to 70°C)
Value

Parameter

Symbol

Condition

Min

Typ

Resolution

Max

Unit

S

Bits

to.5

LSB

Linearity Error

LE

Analog Input Current

liN

Reference Voltage

VREF·

Clamp Voltage

VCLP

VREF

V

Full-Scale Output Voltage

VOFS

VCCA

V

Zero-Scale Output Voltage

Voz

VREF

V

Output Resistance

Ro

240

n

Icc

SO·

..

Power Supply Current
Note.

DC
-400
3.9

J.LA
4.0

4.1

90

V

mA

VCCA - VCCD = 5.0V

DIGITAL CIRCUIT DC CHARACTERISTICS

(VCCA

= VCCD = 5V+5%,
-

TA = 25°C)

Parameter

Value
Symbol

Condition

Min

Typ

Max

Unit

Digital High-level Output Voltage

VOHD

Digital Low-level Output Voltage

VOLD

Digital High-level Input Voltage

VIHD

Digital Low-level Input Voltage

VILD

0.8

V

Digital High-level Input Current

IIHD

20

/LA

Digital Low-level Input Current

IILD

V

2.7
0.4

IOL = 1.SmA
2.0

V
V

-100

/LA

SWITCHING CHARACTERISTICS
Value
Parameter

Symbol

Condition

Min

Typ

Max

Unit
MSPS

20

Maximum Conversion Rate

Fs

Digital Output Delay Time

tPDD

15

Analog Output Delay Time

tPDA

13

ns

Analog Output Rise Time

tr

15

ns

Analog Output Fall Time

tf

15

ns

30

ns

7-223

11111111111111111111111111111111111111111111111

FUJITSU
1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImlllllili

MB40176

Fig. 2 - APPLICATION CIRCUIT

Vcc

,.,

I

I

VIN VCCA

Vcco

~

\

=[

C1

DA

C2

ADCK

,J
CONTROLLER

MEMORY

DACK
VOUT

~

I

f

V

COMP

Do

I

dr

D.GND

l

MB40176

7-224

1\

\

A.GND

MB87045

MB81464

Imlllllllllllllllllmllllmll~III~111
FUJITSU

MB40176

11111111111111111111111111111111111111111111111

Fig. 3 - TYPICAL CONNECTION EXAMPLE

J

+5V

f

10j.lH

o

10j.lH

3.3J.1F

Z. 7':+
f-

-

-'-

l
I-

000

o.33j.lF

>
18
VCCA

.(). 19
VIDEO SIGNAL
ADCINP UT

1j.lF

,-

~

¢

?

vcco

Vcco

,25
VCCA

O.33j.lF

()
27

116

ADCK jj, "
DA1 13 "
DA2 12 ..().

VIN
(MSB)

..(). 21

C2

Z. '7"+
f-_

DA3

11...().

OM

10

DA5
..(). 20
...(). 24

C1

MB40176

(LSB)

DAB

(LSB)

Dos

VOUT

005

VIDEO SIGNAL
DACOU TPUT
"

22

VREF

"

1j.lF

l

+

-

~l 7" 1J.1F

23

COMP

17
()

26

>

9 "
8..()
7 "
6..().

DD4

5..()
4..()
3 ;:::

001
DACK

A.GND A.GND

"

DD3
DD2
(MSB)

1

I-

2..().
1;:::

+

-

[,or.

3.3j.lF

-==
-

ADC CLOCK

l

ADC DIGITAL
OUTPUTS TO
CONTROLLER)

]:

DAC DIGITAL
NPUTS FROM
CONTROLLER)

DAC CLOCK

D.GND D.GND
15

>

28

<>

'-----<

--

- '-

7-225

1~1~lmll~I~I~mlll~~I~I~~I~mll~llm
FUJITSU

Im~~~I~m~lmlll~I~~I~~I~lllm~l~ MB40176

Fig. 4 -

CONNECTION EXAMPLE ON-CHIP INPUT PNP TRANSISTOR IS UTILIZED
+5V

+5V

VCCA

VCCD

19
VIDEO SIGNAL INPUT 0 - - - - - - - " ' 1 VIN
21

C2

20

C,

MB40176

+
l)J.F _

A.GND

Note: Input Impedance of VIN Input pin (19) Is about 20

D.GND

k!l. please pay attention to output Impedance of signal source.

Fig. 5 - CONNECTION EXAMPLE INPUT PNP TRANSISTOR OF CLAM PER CIRCUIT IS PUT EXTERNALLY
+9V

r-

+5V

+5V

VCCA

VCCD

EXTERNAL CIRCUIT
--,
I

2.2k!l

I

I
I
+-_-I-_-I::::l-+_-=-21=-! C2

I
I
I

I
I
I

VIDEO SIGNAL INPUTU----.,-:- - { 2SA933:

L _ _ -1

Note: Both VIN (19) and C, (20) are connected with VCCA.

7-226

MB40176

l)J.F

A.GND

D.GND

11111111111111111111111111111111111111111111111

FUJITSU

MB40176

11111111111111111111111111111111111111111111111

PACKAGE DIMENSIONS
28-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT-28P-M01)

.004~:~~~ (0.1~~:~51
(STAND OFFI

..Jc-+---.

I

.2991.012
(7.6±0.3)

J
~;::::n:::;:r:;;:::;:y::;:r=n=n=:n=n=;:;~1 n·r"

.362 ± .012
(9.2 ± 0.31

.402±.016

+.002
.006_.001

(0.15~~:~;1-

JL '

.020 ± .OOB
(0.5 ± 0.21

View "A"

.008(0.2)

J

.024(0.61
.008 (0.18)
MAX

.027(0.68)
MAX
Ii:> FUJITSU LIMITED 1987 F28005S.3C

Dimensions in

inches (millimeters)

7-227

Imilimmmilmlllllllllllillmllllllill

FUJITSU
1IIIIIIIImllllllllllllllillmlmllllllllili

MB40176

PACKAGE DIMENSIONS

(Continued)

28-LEAD PLASTIC DUAL IN-LINE PACKAGE
(CASE No.: DIP-28P-M03)

I

INDEX·l

.358'.010

~~::;:::;:=r=T=r=T::;:::;:~~~~~~=r=T~JO'251
f-----

.400•. 010
(10.16'0.251

1.020~:g~~ - - - - - i "I

(25.90~g:~gl

.055'.007
(1.39'0.181

Dimensions in
Inches (millimeters)

<1lFUJITSU LIMITED 1987 D28012S·2C

7-228

MB87020
September 1988

Edition 1.0

16-BIT AID AND DIA CONVERTER
The Fujitsu MB87020 is a 50kSPS (Kilo Sample Per Second) 16-bit Analogto-Digital and Digital-to-Analog converter fabricated by Fujitsu Advanced
CMOS technology _AD or DA function is selected by MODE input.
The MB87020 is synchronous/asynchronous 8/16-bit oriented data interface
in order to transfer data between any processor directly and easily. and also
serial data can be managed.

•

Conversion Mode Selectable; A to
o or 0 to A
• High Resolution; 16-bit
• High Conversion Speed; 50 kSPS
max.
• High Linearity; 12-bit
• Low Power Dissipation and Stand
by Mode Available
• Microprocessor oriented 8/16-bit
bus compatibility including interrupt request as conversion completion

•
•
•
•
•
•

Serial Data Port Available
On-chip Sample and Hold circuit
for Analog Input/Output
On-chip Reference Voltage Generator; 2.5V typo
External Reference Voltage can
be used.
Power Supply Voltage: ±5V
Packag: 40-pin Plastic Dual InLi ne Package

III

(TOPVIEWI

ABSOLUTE MAXIMUM RATINGS (See NOTE)
Rating

PLASTIC PACKAGE
DIP-40P-MOI

Symbol

Value

Unit

Voo

-0.3 to +7.0

V

Power Supply Voltage
Vss

-7.0 to +3.0

V

Analog Input/Output Voltage

V TA

Vss-0.3 to Voo +0.3

V

Digital Input/Output Voltage

VTO

-0.3 to Voo+0.3

V

Input/Output Current

IT

-10 to +10

mA

Power Dissipation

Po

500

mW

Storage Temperature

T STG

-40 to +125

DC

Ambient Operating Temperature

TA

o to +70

DC

NOTE: Permanent device damage may occur if A8S0LUTE MAXIMUM
RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data
sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

LOs

DBa
DB,
DB2
DB3
DB,
DB.
DB.
DB7
DBe
DB.

ODS
AD
N.C.
N.C.

RES
Voo
VRD
VRI
AG
AD

08 10

DB11

OB12
DB 13
08 14
08,5

Vss
A'N
PO
MODE
STRT
MClK
STB

OG
IRO
DO
01

IDIP-40P-M011

This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedance
circuit.

7-229

Illmlllllmlllllllllllwlmllllllllllllllllllll

FUJITSU
1111111111111111111111111111111111111111111111111111

MB87020

MB87020 BLOCK DIAGRAM

STB

RES

DO

CS

WR

01

INPUT
OUTPUT
CONTROL

MCLK

RD
STRT
CONVERSION CONTROL
MODE

PO

VRO

AG

REFERENCE
VOLTAGE
GENERATOR

0---

COMPARATOR
CONVERSION
CELL

CONVERSION
CELL

A

B
SAMPLE & HOLD

VRI

AIN

7-230

AO

DG
Voo
VSS

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImlllllili

FUJITSU

MBB7020

1111111111111111111111111111111111111111111111111111

PIN DESCRIPTION
Pin Name

Pin No.

Voo

32

+5V Power Supply Input for Digital/Analog Circuit

Description
-5V Power Supply Input for Digital/Analog Circuit

Vss

27

DG

17

Digital Ground

AG

29

Analog Ground

VRI

30

External Reference Voltage Input. +2.5V typo
When the internal reference voltage is used. VRI and VRO should be connected together.

VRO

31

Internal Reference Voltage Output. +2.5V typo

MODE

24

Conversion Mode Select Input: When MODE is high, A/D mode is selected. When MODE
is low, D/A mode is selected.

PO

25

Stand·by Mode Select Input for Analog Circuit: When PO is high, Stand· by mode is selected.
When PO is low, the normal operation is selected.

RES

33

Reset Input: When RES is low, all internal registers are reset and cleared. After power on,
the reset operation is needed firstly.

MCLK

22

Conversion Clock Input: Conversion operation is synchronized with this clock.

AIN

26

Analog Input for A/D Conversion: During STRT = H, this input data is sampled. During
D/A conversion, this input pin is recommended to be tied with AG.

AO

28

Analog Output for 0/ A conversion: This output is updated after conversion, and keep the
level until next completion of conversion.

DBa to
DB '5

1 to 16

Parallel Data Input/Output: Can transmit A/D conversion data output or D/A conversion
data input in 8· or 16-bit parallel. Due to three·state input, the pins are connected with
is MSB, DBa is LSB. When connected with 8·bit bus,
microprocessor's bus directly. DB
DBn and DBn +8 are connected together, where n = 0 to 7.

'5

01

20

Serial Data Input: At the rising edge of STB, the l·bit data is transferred to the LSB of the
input/output register. (See Serial Data Transfer.)

DO

19

Serial Data Output: The MSB of the input/output register is output. At the falling edge of
STB, the output is changed. (See Serial Data Transfer.)

STB

21

Strobe Signal Input for Serial Data Transfer: Using RD, CS, UDS and LOS, this input is
internally gated. The rising edge of STB signal makes the output/input register shift by 1 bit.
(See Serial Data Transfer.)

CS

36

Chip Select Input: When CS is low, RD and WR signals are effective.

WR

37

Data Write Input: When WR is low, stored data in DBa to DB '5 are shifted into the input/
output register, and the rising edge of the input makes the data latched and ready for AD or
DA conversion operation. After WR goes high, conversion starts at the riSing edge of MCLK,
or at the completion of previous conversion.

RD

38

Data Read Input: When RD is low, the stored data in output/input register are output at
DBa to DB

UDS

39

High-order byte Select: When UDS is low, upper 8-bit data is transferred.

,5.

LOS

40

Low-order byte Select: When LOS is low, the lower 8-bit data is transferred.

STRT

23

Conversion Start Output: This output indicates conversion start. During the first clock cycle
of conversion, it becomes high. When it is high for AD conversion, AIN input is sampled.

IRQ

18

Interrupt Request Output as Conversion Completion: When conversion is completed, fRO
becomes low. When data transfer is instructed, (RD or WR) and CS, it becomes high. This
output is an open'drain output.

Note: All digital input/output is TTL compatible.

7-231

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII

FUJITSU
Illmllllllllmllllll~lllmlll~1111111111111111

MB87020

OPERATIONAL DESCRIPTION
Input analog signal is converted. to 16-bit digital signal or 16-bit digital signal is converted to analog signal. Either of function
is selected by mode select pin. MB87020 can be used for either parallel I/O connection or serial I/O connection with microprocessor_
Parallel I/O:
Serial I/O:

Connected with iJ-P 80 series 8-bit, 68 series 8-bit, 8086 series 16-bit and 68000 series 16-bit.
It needs a less signal lines compared with parallel I/O.

We are going to describe how to control MB87020 through these signal lines and receiving/delivering digital data.

1) MODE CONTROL

MB87020 has three operational modes, D/A conversion mode, A/D conversion mode and analog circuit stand-by mode. These
mode is selected by MODE and PD pin as listed below_
When the mode change is indicated during converting, the actual change of operational mode is done after the completion of
conversion.

Mode

PD

Function

L

D/ A conversion mode

H

Analog circuit stand-by mode

L

A/D conversion mode

H

Analog circuit stand-by mode

L

DI

H

2) CONVERSION SEQUENCE
MB87020's conversion sequence comprises the following four process.
Conversion start request process ]
Conversion start process
Conversion process
Conversion completion process

(Instruction to start conversion)
Conversion process

The above process are synchronized with MCLK signal, but data management can be independent from MCLK signal. And
during conversion, next conversion start request can be provided.
Conversion start request process
Conversion start request is generated by the write cycle (CS=WR=L). After write cycle is completed (Rising edge of
conversion start request is generated. During D/A mode, write is possible in using write cycle.
16-bit data is written from lower 8-bit then the upper 8-bit. After that conversion start request is generated_

7-232

CS or WR),

1111111111111111111111111111111111111111111111111111

FUJITSU

MB87020

1111111111111111111111111111111111111111111111111111

LOS AND UOS IN WRITE CYCLE AND CONVERSION START REQUEST
Mode

-

LDS

l..J

Lor

UDS
LorL-r

Lor L r

H

Conversion
Start Request

Data Xmit
(Write)

Generated

DBo to DB 15

16·bit Parallel Write

Not Generated

DBo to DB7

Low·order Byte Write

Generated

DBo to DB 15

High·order Byte Write

Operation

DIA
H

AID

Lor L-..I

H

H

Generated

Serial Data Conversion

Don't Care

Don't Care

Generated

AID Conversion Start

LJ: Transmission of High to Low to High.

CONVERSION START PROCESS
When conversion is requested to start, operational conversion starts at the next rising edge of MCLK clock. When previous
conversion is not completed, following conversion is postponed until previous conversion is completed.
At this moment, START becomes High level in one clock cycle in order to indicate conversion start. During this moment, it
is prohibited that WR =
= "L".
When AID conversion, AIN input is sampled at this moment.

cs

CONVERSION PROCESS
16th MCLK clock cycles are needed for one conversion process. From second MCLK clock cycle, Write Mode is available
and Conversion Start Request can be generated for the following conversion.
Write Mode can be repeated in this period, but only the last Conversion Start Request and the last written data are effective.

CONVERSION COMPLETION PROCESS
Conversion Process is completed after 16th MCKL clock cycles are passed from conversion starts.
At the end of conversion, I RO goes low to tell the completion of the conversion outside of the chip. This output is an open·
drain output and connect to microprocessor and provides interrupt request signal to it.
When Write or Read Mode is excuted, I RO goes high,
If Conversion Start Request is generated during conversion, the next conversion will start continuously after the current
conversion is completed,
The result of O/A conversion is output at Ao at this moment and output will remain at its last level.
More than 1 MCLK cycle passed after conversion is completed, the result of AID conversion can be read out at DBo to DB 15
when RD = CS = UOS = LOS = "L",

7-233

HI

1IIIIIIIIIIImllllllllllllllllllllllllllllllllllili

FUJITSU
1111111111111111111111111111111111111111111111111111

MBB7020

3) DATA TRANSMISSION

Data transmission between MB87020 and external is made through I/O register. I/O register does not control conversion
directly, but they store A/D conversion results or D/A conversion data. Therefore, write/read are done freely except for the
time of data transmission with register which directly control at the beginning and ending of conversion.
Using this function, 8·bit parallel transmission, 8·bit serial transmission and data exchange during conversion are possible.

DO

MSB

DATA BUS

I
DBO

LSB

LDS
DI

I/O REGISTER

CONVERSION REGISTER
(SUCCESSIVE APPROXIMATION REGISTER)

16·bit

16·bit

PARALLEL TRANSMISSION
Data is transmitted through DBo to DB 15 and controlled by es, WR, RD, UDS and LOS. In the transmission mode, it requires
es ~ Low. And in the write mode to MB87020. it requires WR ~ L and read mode, RO ~ L.
Upper byte (DB8 to DB I5 ) transmission mode, it requires UDS~ L. lower byte (DB 7 to DB o ), LDS~ L. All required conditions
are satisfied, data is transmitted. If no, data transmission mode is stopped and data is latched for write mode.
During A/D mode, data is not written regardless U OS and LOS.
I/O register stores latest A/D mode result or latest written data of D/A mode. During read cycle, it is possible to read out A/D
conversion result and confirm 0/ A conversion result. Read/write of parallel data is controlled by control signal.

7-234

1111111111111111111111111111111111111111111111111111

FUJITSU

MB87020

1111111111111111111111111111111111111111111111111111

DATA CONTROL SIGNAL AND PARALLEL DATA TRANSMISSION

ResoReadl
Mode lution
Write
(Bit)

Data control signal

CS

WR

RD

L

L

X

X

Condition

LOS UDS

DBa to
DB7

DBa to
DB 15

8

L
Read
mode

HZ

HZ

Generated

Clear

AID conversion start
request

H

H

HZ

HZ

Not
generated

Clear

Serial output

L

H

Output

HZ

Not
generated

Clear

H

L

HZ

Output

Not
generated

Clear

L

L

Output

Output

Not
generated

Clear

H

H

HZ

HZ

Generated

Clear

L

H

Input

HZ

Not
generated

Clear

H

L

HZ

Input

Generated

Clear

L

L

Input

Input

Generated

Clear

H

H

HZ

HZ

Not
generated

Clear

L

H

Output

HZ

Not
generated

Clear

L

H

16

L

L

X

Write
mode

16

Operation

X

-

8

IRO=L
Clear

X

-

AID

Conversion
Start
request

Lower byte
Read out
conversion
result

Upper byte

All byte
Conversion start request
of serial input data
Lower byte
Read out
conversion
result

Upper byte

All byte

DIA
X

Serial input

r--

8

L
Read
mode

L

H

H

L

HZ

Output

Not
generated

Clear

L

L

Output

Output

Not
generated

Clear

f----

16
L

H

H

X

X

HZ

HZ

Not
generated

Not
Clear

H

X

X

X

X

HZ

HZ

Not
generated

Not
Clear

Lower byte
Confirm
conversion
result

Upper byte

All byte

X

Note: X: Don't care

7-235

IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~IIIIIIIIIIIIIII
FUJITSU
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII~IIIIIIIIIIIIIIII

MB87020

SERIAL TRANSMISION
01,

~O,

STB, RO and CS are used for serial transmission. UOS, LOS are settled as High, RO, CS indicate transmission timing.

AID MODE (DO OUTPUT)
After conversion is completed, MSB is output at the first falling edge of MCLK clock.
When STB = Hand CS = AD = L, from 2nd rising edge of MCLK clock, AID conversion result is output serially from upper
side synchronized with falling edge of STB clock.
The output after 16·bit output is not related to any of converter result.
Serial transmission is stop when STB = Land CS or RO = H.

D/A MODE (01 INPUT)
After conversion is completed, when CS = RO = L at STB = H after one clock cycle, 01 is sampled as MSB and after that 01
is sampled from the MSB every rising edge of STB clock.
Transmission is completed when 16th 01 is sampled as CS or RO = H at STB = L.

lflii

When 2 pes of MBB7020 are used AID, OIA mode separately with connecting DO of AID and 01 of O/A. STB, RO, CS direct
transmission becomes possible.
If STB clock frequency is higher than MCLK clock, other signal or other conversion data can be transmitted by time sharing
serially.
If no, STB requires H, 01 requires H or L.

7-236

1111111111111111111111111111111111111111111111111111

FUJITSU

MB87020

1111111111111111111111111111111111111111111111111111

CONVERSION RANGE AND CODE
AID MODE
Input Voltage

Output code (DB 15 to DBa)

Z +VREF

:s::

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

+VREF - 1 LSB

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

+VREF12

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

0

0

0

0

-lLSB

1

1

1

1

1

1

1

1

1

-VREF/2

1

1

0

0

0

0

0

0

0

0

0

0

-VREF + 1 LSB

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

-VREF

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

Note: V REF = VRI input voltage
1 LSB = VREF/215
Output code will not become 1000000000000000 under -VREF input voltage.

D/A MODE
Input code (OB 15 to DBa)

Output Voltage

Z

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

+VREF - 1 LSB

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

+VREF/2

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

-lLSB

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

-VREF/2

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

-VREF + 1 LSB

0

0

0

0

0

0

0

0

0

0

0

0

0

-V REF +1LSB

1

0

0

+VREF - 1 LSB

Note: V REF = VRI input voltage
1 LSB = VREF/215
Code input of 1000000000000000 will not make the output of -V REF .

7-237

~mll~llllllllllllllllllllllllllmllllllllll
FUJITSU
I111I11111111111111111111111111111111111111111111111

MBB7020

RECOMMENDED OPERATING CONDITIONS
Parmeter

Symbol

Pin Name

Min

Typ

Max

Unit

Voo

Voo

4.75

5.00

5.25

V

Vss

Vss

-5.25

-5.00

-4.75

V

VRI

VRI

Power Supply Voltage
Reference Voltage

V

H2

20

RL

Load Impedance

2.5

AO

CL
Ambient Operating Temperature

0

TA

20

pF

70

°c

DC CHARACTERISTICS
lOG = AG = OV Voo = 5V ± 5%. Vss = -5V ± 5%, fMCLK = 800 kHz, VRI = 2.5V, TA = 0 to 70°C)
Parameter

Symbol

Power Supply Current

Pin Name

100

Voo

Iss

Vss

Power Supply Current at
Power Down

IOOST

Voo

ISSST

Vss

Reference Voltage

V RO

VRI

Digital High-level Input Voltage

V IH

Digital Low·level Input Voltage

Vil

Digital High-level Output Voltage
Digital Low-level Output Voltage
Digital Input
Leak Current

I
I

III
IIH

I RQ Leakage Current at OFF

Typ

Unit

15

mA
mA

1
-0.5

mA
mA

2.5

V

2

Voo

V

0

0.8

V

IOH =0.1mA

4.0

Voo

IOH = 1mA

2.4

Voo

V

*3

IOL = 2.4mA

0

0.4

V

-10

10

p.A

-10

10

p.A

-10

10

p.A

-10

10

p.A

-10

10

p.A

*3
IRQ

IURD

Max

-15

*2

VOL

"H" Level

Min

*1

V OH

"L" Level

Condition

VOH = Voo

DB High-level Leakage Current
at OFF

I LOBH

DB Low-level Leakage Current
at OFF

I LOBl

Off -set Vol tage

VOFF

Linearity Error

LE

±0.02

%FSR

Differential Linearity Error

OLE

±0.02

%FSR

,

DBa to
DB I5

Note: *1: DBa to DB 15 , 01, STB, MCLK, UDS, LOS,
*2: DBa to DB 15 , DO
*3; DBoto DB 15 ,DO, IRQ

7-238

VOL =OV

AIN.Ao

CS,

RD, WR, PO, MODE, RES

-50

+50

mV

1111~1111111~llllllllllllllllllllmllllllllllllll
FUJITSU

MBB7020

AC CHARACTERISTICS
(OG • AG • OV, Vee

=5V ± 5%, Vss -

Symbol

Pin Name

f MCLK

MCLK

fSTB

STB

Clock Duty Ratio

DMcLK

MCLK

Sampling Rate

fSAMPLE

Parameter

1111111111111111111111111111111111111111111111111111

-5V ± 5%, fMcLK - BOO kHz, VRI • 2.5V, TA • a to ,O·C)
Condition

Min

Typ

10

Max

Unit

800

kHz

2.5

MHz

55

%

50

kSPS

Clock Frequency

Absolute Gain

Total Harmonic Distortion

1kHz,
FS -20dB
sine wave
50kSPS
Ta =25·C
BW"=20kHz

GA

1kHz,
sine wave
50kSPS
Ta = 25°C
PW=20kHz

T.H.D.

RI
AIN

Input Impedance (RI/Cll
CI

45

50

VRI' = 2.5V

-0.1

0

+0.1

Connect to
VRlandV RO

-0.5

0

+0.5

dB

:
FS-20dB

-60
dB

FS

AID mode during
STRT = H

-76

100

kn

50

100

pF

7-239

IDI

1111111111111111111111111111111111111111111111111111

FUJITSU
1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImmii

MB87020

SWITCHING CHARACTERISTICS
(DG = AG =

ov, Voo = 5V, Vss = -5V, fMCLK

Parameter

D

Fig.

Symbol

= 720kHz, VRI = 2.5V, TA = 25°C)

Min

Max

Unit

Data Write Pulse Width

1

tWT

200

ns

Data Setup Time for Data Write

1

tSBW

200

ns

Data Hold Time for Data Write

1

tHBW

50

ns

Data Write Interval

1

t,w

200

ns

Data Non·Write LDS/UDS Setup Time

1

tsow

50

ns

Data Non-Write LDS/UDS Hold Time

1

tHOW

50

ns

Write Command Pulse Width

1

tww

200

ns

Write Command Hold Time for First Conversion Cycle

2

tHWN

0

ns

Write Command Setup Time Preventing from Conversion
Start

2

tsw,

100

ns

Write Command Hold Time Not to Start Conversion

2

tHWP

100

ns

Write Command Hold Time for Conversion Start

2

tswp

100

ns

WR Setup Time for Data Read (D/A mode only)

3

tswc

50

ns

WR Hold Time for Data Read (D/A mode only)

3

tHWC

50

ns

Data Read Pulse Width

3

tWR

200

ns

Delay Time to Valid Data Output

3

tee

0

Disappearance Time for Valid Data

3

tOB

0

ns

200

ns

R D Hold Time for Last Conversion Cycle

4/5

tHRK

0

ns

R D Setup Time for Last Conversion Cycle

4/5

tSRK

0

ns

LDS/UDS Setup Time for Serial Data Transfer Start

5

tsoR

50

ns

LDS/UDS Hold Time for Serial Data Transfer Completion

5

tHoR

50

ns

STB Setup Time for Read Command

5

tSTR

100

ns

STB Hold Time for Read Command

5

tHTR

100

ns

High·Level STB Pulse Width

5

t W5H

200

ns

Low·Level STB Puise Width

5

tW5L

200

ns

7-240

mm~~~~~llm~~ml~ll~~~~~~~~i
FUJITSU

MBB70 20 1IIIIIm~~~~mlmllll~OO~~~mmmlll

(OG = AG
Parameter

=OV, Voo = 5V, Vss = -5V, fMCLK = 720kHz, VRI ~ 2.5V, TA = 25°C)
Fig.

Symbol

MSB Output Delay Time

5

Serial Output Delay Time

Min

Max

Unit

tOOK

a

500

ns

5

tooT

a

150

ns

MSB Input Setup Time

5

tSIR

50

ns

MSB Input Hold Time

5

tHIR

50

ns

Serial Input Setup TIme

5

tSIT

50

ns

Serial Input Hold Time

5

tHIT

50

ns

STRT Output Delay Time

6

tOSK

a

Analog Input Setup Time

6

tSA

1.2

fJS

Analog Input Hold Time

6

tHA

a

ns

Command Setup Time for I R0 = low

6

tSCK

200

ns

IRO Falling Delay Time

6

tOIK

a

200

ns

IRO Rising Delay Time
(Pull·up Resistance = 5kn, CL = 1OpF)

6

tOIC

a

200

ns

Analog Output Settling Time

6

tOA

a

8

fJS

Valid Output Hold Time

6

tAE

500

fJS

CS Setup Time for Reset Completion

7

tSRES

500

CS Hold Time for Reset Completion

7

t HRES

20

clock cycle

Reset Pulse Width

7

tWRES

500

ns

PO Setup Time

8

tSPK

100

ns

PO Hold Time

8

tHPK

500

ns

MODE Setup Time

8

tSMK

100

ns

MODE Hold Time

8

tHMK

500

ns

Power Down Time from Conversion Completion

9

tpoK

1

ms

Power Down Time from PO

9

tpop

1

ms

Power Up Time

9

tpup

10

ms

300

ns

III

ns

7-241

1lllllllmlllllllllllllllllllllllllllllmm~1111
FUJITSU
~~ml~~IIIIIIIIIII~~llllllllllllllmllmlll

MB 87020

TIMMING DIAGRAM
PARALLE TRANSMISSION
Fig. , - WRITE CYCLE TIMING-' (DATA TRANSMISSION)

OBO_7,OB8_15

Not.: A

+ B +c

A+B+C
A+B+C

OR output of A, Band C.

L
J

Three of them becomes L level.

One of them becomes H level.

Fig. 2 - WRITE CYCLE TlMING-2 (CONVERSION START)

CS+WR~
tHWN-~~-+--I--­

MCLK

STRT

\~-- ___--J/
1st one cycle

7-242

MB 87020

111111~~llllllllmmllmlll~mlmllll~~m
FUJITSU
Imllllll~II~II~IIIII~lllmlllll~lllllmllll

PARALLE TRANSMISSION
Fig. 3 - READ CYCLE TIMING·' (DATA TRANSMISSION)

cs + RO + LOS

\

CS + RO + UOS
tEB

I - - - tWR -

V
tOB

080_ 7 ,OB8_1 5

D
Fig. 4 - READ CYCLE TIMING-2 (CONVERSION START)

CS+RO----------------,

eLK

\'-----Conversion completed.

Conversion completed.

Note: Except for serial transmission mode. tHRK. tSRK specification is necessary to read out normally. Unless these spec are
specified, the data will not destroy.

7-243

.~IMI~lWmIWI
FUJITSU
~~!~~IIII~~lllml~~lmlll~liil MBB7020

TIMMING DIAGRAM (continued)
SERIAL TRANSMISSION
Fig. 5 -SERIAL INPUT/OUTPUT

MCLK

STRT

CS + Ril--I-----+"'Il

IfII

STB

7-244

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImili

FUJITSU

MB87020

1111111111111111111111111111111111111111111111111111

OTHER TIMING
Fig. 6 - STRT, IRQ, AIN, PO TIMING

MCLK

STRT

AIN

CS+WR ________________________- - J

III
AO

Note: tscx is necessary condition that

T'RCI becomes L. However, if this condition is not satisfy, operation has no effect.

7-245

M~~~~~I~~I~~I~~lm!m.~1
FUJITSU

m~~I~I~I~~~I~~ml~m~~mllm MB 8 70 20

TIMMING DIAGRAM (continued)
Fig. 7 - POWER ON/REST TIMING

Voo _ _ _ _ _ _ _
tWRES

ClK

CS

i------tHRES;--------i

Fig. 8 - MODE CHANGING TIMING

..

Conversion start cycle

MClK

PD

MODE

STAT

7-246

_ _ _ _ _- - J/

1111111111111111111111111111111111111111111111111111

FUJITSU

MB87020 1111111111111111111111111~lmlllllllllllll~111111

Fig. 9 - POWER DOWN TIMING

Conversion completion

MLCK
Conversion is not started

PO

Power Up
Inner condition

Power Down
tpDP

7-247

I

~

§

o"'C

(II

~

m

:::D

o

o

1'"en

o

en

~I

-i
:IJ
-i

'"

'"

~

~I

~I

Ell

~I

~I

-~

:;:
(')

r

A

I

..............-

C')
"Ii

'"
...
'"

'"
'"

c;;

~

'"
......"'-~

in

CONVERSION COMPLETION INTERRUPT .. .

'"
w

WRITE FOLLOWING CONVERSION DATA····· .... -···································

o

Z

.... - ............... .

'"

~g~~c5~~~~NC~~~~~~T6~N START ... Ti-

~

3:

CONVERSION START

WRITE FOLLOWING CONVERSION DATA ......... .

•

C')

CONVERSION START REQUEST IS NOT
GENERATED (DiAl
WRITE LOWER-BYTE··········'·-1-···········
CONVERSION START REQUEST IS GENERATED············ .......... .
WRITE UPPER-BYTE-······

...
'"

-

~.

o
I

C

J>

...DI
=l

s:

n
:D

...o
:D

oo

m



...

I

~
C

en

~

en

D7

:::::

:::j
3:

;:;

::D

C)

W

REQUEST FOR FOLLOWING CONVERSION START

:;;:
U;

n

..,

0

::D

0
en
m

en
en
0

::D

C;;

CONVERSION COMPLETION FOLLOWING
CONVERSION START ...
CONVERSION CONPLETION INTERRUPT ...

'"
READ BEFOR CONVERSION DATA

~

ViI
CO

...

~

en

o

~

E

...,
~

it

II

II

~

J

o

2

~

o
o
~

3

~I

en

-I
J]

-I

~

~I

~I

en

-I

'"

s::

0
,...

'"

~

•

OD

CONVERSION START REQUEST IS GENERATED---

~

c;;
CONVERSION COMPLETION --TRANSFER (DIA CONVERSION DATA, AID CONVERSION
RESULTS) START
CONVERSION START

W

'"
'"

...
01 IS SAMPLED AT RISING EDGE OF STB .. _.

...
tP"
...
N

I
~

jJ

'"

'":JIm

en

);

r-

o

c:

-f

'"
CD

o

."

c:

-f

o:JI
C

J>
en
m

:JI

);

r-

;;;

Z

."

.:
'"
TRANSFER STOP COMMAND IS GENERATED ...
AFTER LSB IS TRANSMITTED, CONVERSION IS COMPLETED.'"

c;;

'"

c:
-f

o

1111111111111111111111111111111111111111111111111111

FUJITSU

MB87020 IIIIIIIIIIIIIIIIIIIIII~IIIIIIIIIIIIIIIIIIIIIIIIIIII

INTERFACE CIRCUIT EXAMPLE
Fig. 13 - INTERFACE WITH 8088 MAXIMUM MODE

8088 Maximum Mode
A7

Cs

AN

Analog input

A1

UDS

AO

Analog output

AO

LOS

10WC

WA

VAl

10AC

AD

VAO

DECODE

50pF

AESET

AES

Do

DBa

I

I

07

DB7
+5V

1

STAT
MB87020

DBa

CLK

I

800kHz
CLKIN

III

DB 15
10kO
IA7

IRQ

MODE

V DD : AID
DG:

DIA

01
STB

PO

DO

Note: When LOS is low, even byte is stored in lower 1/0 register.
When UDS is low, odd byte is stored in high I/O register.
Interruption is used as the hight priority.

Conversion range is between -2.5V and +2.5V.
The data stored in AX register are D/A converted by OUT command.

7-251

lllllllllllllllllllllllllllll~llllllillmllllllill
FUJITSU
lllllllllllllllllllllllllllllllllllllllllillmllill

MB87020

INTERFACE EXAMPLE WITH VARIOUS INTERFACE
Example of main input control pin of MBB7020
Object

Control Signal
DBo to DB7 DBB to DB'5

-

-

CS

WR

RD

Address
decoder
output

WR

RD

Inverted
output
of A

AO

R/W

Inverted
output
of R/W

Inverted
output
of A

AO

UDS

LDS

ZBO
(BO series
B·bit CPU)

WR, RD,
Do toD 7 •
Ao toA,5

Do,toD 7

Do to D7

6800
(68 series
l6-bit CPU)

R/W, VMA, ¢2,
Do to D7,
Ao toA,5

Do toD7

Do to D7

BOB6
(86 series
l6-bit CPU)

MWTC, MRDC,
Doto D'5,
Acto A,9

Do toD 7

Ds to D'5

Address
decoder
output

MWTC

MRDC

BHE

AO

68000
Rm, AS, LDS,
(68000 series UDS, Ao to A23
16-bit CPU)

Do toD 7

Ds to D'5

****

R/iN

Inverted
output
ofR/W

UDS

LDS

D/A conversion only,
Do to D'5 (Parallel data),
Conversion start request signal
ST (Low active)

Do toD 7

Ds toD'5

L

ST

H

L

L

AID conversion only,
Conversion start request signal
ST (Low active)
Do to D'5 (Parallel data request)

Do to D7

D8 ~o D'5

L

ST

L

L

L

Lor H

Lor H

L

ST

BUSY

H

H

Do to D7

Ds to D'5

L

BCT

L

L

...

MP

AID or D/A serial conversion
transmission
BUSY (Low active)
Conversion start request signal
ST (Low active)
MB87064
(Fujitsu 16-bit
DSP)

BCT, ACT,
Do toD'5

••• Address decoder output after VMA, ¢2 gate
•••• Address decoder output after AS gate

7-252

-

-

-

ACT

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIm

FUJITSU

MBB7020

1111111111111111111111111111111111111111111111111111

TEST CIRCUIT
Fig. 14 - TEST CIRCUIT FOR DISTORTION RATIO (1)

16 BIT

LPF
20kHz
96 dB/OCT

INPUT

DISTORTION
LEVEL METER
ETC.

CLOCK FREQUENCY: 800kHz
SAMPLING RATE:
50kSPS

Fig. 15 - TEST CIRCUIT FOR DISTORTION RATIO (2)
16 BIT

LPF
20kHz
96 dB/OCT

INPUT

III

DISTORTION
LEVEL METER
ETC.

CLOCK FREQUENCY: 800kHz
SAMPLING RATE:
50kSPS

Fig. 16 - TEST CIRCUIT FOR DISTORTION RATIO (3)

LPF
13.8kHz
96 dB/OCT

DISTORTION
LEVEL METER
ETC.

INPUT
1kHz
FS -20dB

-L

-rrr-

7-253

1111111111111111111111111111111111111111111111111111

FUJITSU
1111111111111111111111111111111111111111111111111111

MB87020

TEST CIRCUIT (continued)
Fig. 17 - TEST CIRCUIT FOR DISTORTION RATIO (4)

LPF
13.BkHz
96dB/OCT

DISTORTION
LEVEL METER
ETC.

INPUT
1kHz
FS -20dB

Fig. 18 - TEST CIRCUIT FOR ABSOLUTE GAIN

NETWORK
ANALYZER

INPUT
1kHz

7-254

CLOCK FREOUENCY: 800kHz
SAMPLING RATE:
50kSPS

1111111111111111111111111111111111111111111111111111

FUJITSU

MB87020

1111111111111111111111111111111111111111111111111111

Fig. 19- TEST CIRCUIT FOR FREOUENCY CHARACTERISTICS (1)

SPECTRUM
ANALYZER

TRACKING
GENERATOR

CLOCK FREQUENCY: 800kHz
SAMPLING RATE:
50kSPS

Fig. 20 - TEST CIRCUIT FOR FREOUENCY CHARACTERISTICS (2)

,-----, 16 BIT

~----~

SPECTRUM
ANALYZER

TRACKING
GENERATOR

CLOCK FREQUENCY: 800kHz
SAMPLING RATE:
50kSPS

7-255

Ilmmllillmilimool~mm~~~~m~~~
FUJITSU
1111111~llllllllmmlllllllllllllllllml~111

MB87020

Fig. 21-SIGNAL LEVEL OF ADC MODE
vs. DISTORTION RATIO

Fig. 22 - SIGNAL LEVEL OF DAC MODE
vs. DISTORTION RATIO

-20

iii
E

TEST CIRCUIT FOR DISTORTION (1) Fig. 14
SIGNAL FREQUENCY:1kHz
-30
BAND WIDTH: 20kHz
SAMPLING FREQUENCY: 50kHz
-40

.I

0

i=

-50

0

-60

i=
I-

iii
E

~

-70

'"'f'.......

-60

0

I-

~

(I)

-90

o

-30

= OdB,

-20

J 1,1.1

-30

-40

iii

z
i=
a:

-50

is

I

-60

II

-70

i=
a:
o

I-

-50

I

-60

~

(I)

15

-70
-80

-80
-90

-9 0
10

20

406080100 200 4oo6008OO1k 21t

4k 6kBkl0k 20k 40k60kaOkl00k

SIGNAL FREQUENCY (Hz)

7-256

-40

E

(I)

15

.t ll.l. .1 J IJ

TEST CIRCU 1~.1
FOR DISTORTION RATIO (2) Fig.15
INPUT
F.S. -2OdB

DIA

AID

iii

0

o

-10

Fig. 24 - SIGNAL FREOUENCY vs. DISTORTION

TEST CIRCUI~.I,
FOR DISTORTION RATIO (1) Fig. 14
-30 INPUT
F.S. -2OdB

I-

-20

SIGNAL LEVEL (dB) (FULL SCALE = OdB)

Fig. 23 - SIGNAL FREOENCY
VS. DISTORTION RATIO

,I., tH ,j

~

-80

-10

SIGNAL LEVEL (dB) (FULL SCALE

-20

~

-70

15

-90
-20

I ..............

a:

-80

-30

-50

0

i=

(I)

0

-40



z

-20



III

:!

POWER SUPPLY CURRENT/REFERENCE
VOLTAGE VB POWER SUPPLY VOLTAGE

REFERENCE VOLTAGE
LOAD CURRENT

'0

>..
u

6

c

1-25 • 0

100

rr

>

-30°C, 85°C

..



IL=o

u

..f

,

-30·

'Q)

a:

II:

I

I
II

>
.s

85·0

VR

..
e!

VB

1

r-- ~

100

200

V IN = 12V

.......

'\

2

'Q)

,

a:
10

20

Power Supply Voltage V 00 (V)

30
0

o

2
Load Current I LR (mA)

7-264

25·0

.o.VR

111111111111111111111111111111111111111111111111111111

FUJITSU

MB4206

TYPICAL PERFORMANCE CHARACTERISTICS

OUTPUT CURRENT vs OPERATING
TEMPERATURE

<"
,:I;
u.

0

;:
~
:>

0

400

50.
5

--

...J

---

-

SINK

0.4

0

•

III

:l

85 ·C

0.3

0

12V

~V

0

VB

>

""';4V

....
....V

(continued)

OUTPUT LOW VOLTAGE
CURRENT

~

450

111111111111111111111111111111111111111111111111111111

>
~
.3

0.2

50.
5

0.1

0
350
-50

0

o

50
Operating Temperature T A ( • C)

100

FIV CONVERTER OUTPUT VOLTAGE vs
INPUT FREQUENCY

0

err
-.,

u.

IL

0

>

4

~

5
0.
5

J

0

2

0

0

~

/

•>e
0

(mA)

III

~
o

3

CT=O.II.l F
RT=47kfi
Co= 10 I.lF

2

5

f--

5>
0..

u.

0

~>
G
III
>
e II

•

0-

00

100

100
0

/

>

~

.. -

/

G
III

~
1:

10

8
SINK

:>.:1:
0.:>-

~

0

4
6
Sink Current I

FIV CONVERTER TRANSMISSION
CHARACTERISTICS

>-

_ u~
e N

6

:l

2

200

300

»
ii:

0

/

II
o

200

I\..
400

600

CT= O.II.l F

-

RT = 47kfi
Co= 10 I.lF

~
800

1000

Time t (ms)

Input Frequency F IN (Hz)

7-265

III~I~IIIII
FWlTSU

~illllil~U~I.

MB4206

PACKAGE DIMENSIONS
8-LEAD PLASTIC SINGLE-IN-LINE PACKAGE
(CASE No.: SIP-D8P-M03)

.128 ± .010
(3.25 ± 0.25)

I

~

I

L

.244 ± .010
(6.20 ± 0.25)

.323 ± .012
(8.20 ±0.30)

~

.157 ± .012

(4.00 ± 0.30)

I.. .

.010 ±.002
(0.25 ± 0.05)

.t

100 (2.54) TYP

..

.061

~ 0012

(1.52 ~ g.30)

Dimensions In
Inches (millimeters)

7-266

.020 ±.003
(0.50 ± 0.08)

SOBOl 08-20

cO

April 1990
Edition 1.0
PRODUCT PROFILE

FUJITSU

MB4207
Frequency-to- Voltage Converter
DESCRIPTION
The Fujitsu MB4207 is a single power supply frequency-to-voltage converter w~h a
comparator. The MB4207 can stabilize a noisy signal using the charge pump driven by
a Schmitt trigger and flip-flop circu~.
The comparator provides precise hysteresis output due to clamping at the reference
voltage with Zener diode.

FEATURES
•

An RC pair provides the coefficient of conversion:
Vo = ~ ·Vz·CT·Rr·fIN
3

•

Output is clamped at the built-in reference voltage (High-level).

•

Pos~ive-edge trigger frequency input.

ABSOLUTE MAXIMUM RATING (TA

=25°C)
DIP-8P-MOI

Rating

Symbol

Value

Unit

V

Supply Voltage

Vee

24'

Surge Voltage at Vee

Vccs

10()2

V

Zener Current

Iz

30

mA

Power Dissipation

PD

3003

mW

Operating Temperature

Top

-30 to +85

Storage Temperature

Tsro

-55 to +125

Notes:'R.- 680 n
lit < 50 msec,
'TA<85°C

Pin Assignment
(Front VIew)

.----{][;::=:::J OUT
L..:..r---+ INC

R. -

680 n

...=.r----INC

r - -...: ; . r - - VOF
a.....;..r--- GND

t..=.r--_TCF
t.=r--- INF
L...:..r--- Vz

Note: Permanent device damage may occur Habsolute maximum ratings are
exceeded. Functional operation should be restricted to the conditions as
detail8d in the operation sections of this data sheet. Exposure to absolute
maximum rating cond~ions for extended periods may affect device reliabilitY.

This device contains circuitry 10 protect the
inputs against damage due 10 high static voltages or electric fields. However, ~ is edvised that
ncrmal precautions be taken 10 avoid application
of any voltage higher than maximum rated
voltages to this high impedance circuit.

Coprwrite © ,990 by FWITSU LIMITED and FuJ1au Mlc:rooIoc:Iranlco. Inc

7-267

MB4207
BLOCK DIAGRAM
~------,---------------~--------------~~--{1

Charge
pump

Vz

5.4 V

5.4 V
5.4V

~--~------~r-~~---r-+----~----~--~-----L---{4 GND

®

3

TCF

OUT

VOF -INC +INC

ELECTRICAL CHARACTERISTICS
(TA = 25 °C. Vee =12V. Rs = 6800)
Value
Symbol

Min.

Typ.

Max.

Unit

Rs=On. Vee-4.8V

lee

-

3.0

5.0

rnA

See Figure 1

Vz

5.0

5.4

5.8

V

f't.Vz

-

0.05

0.1

V

Input High Level

VIH

2.4

-

24

V

Input Low Level

V1L

0

-

1.2

V

-

V/ms

V/ms

4

-

8
0.1

rnA
rnA

0.58

rnA

Parameter
Supply Current
Reference Vo~age
V
I
F
C

T

E
R

-

IINF

Output Cu rrent

VTCF = 2.5 V

IOF

0.26

0.4

FN Coefficient

Cr- 0.1 J.LF. RT= 47k n

Kl

0.9

1.0

Linearity Error

VT= 0.1 ~F. RT= 47k Q2

Input Current

f=100Hz

Input Offset Vo~age

0

R

0.1
VIHF =24V
VILF = 1.2 V

Input Bias Current

M
P
A
R
A

0

1

Negative-edge

C

r

Vee = 10to 16 V

Positive-edge

0
N
V
E
R

CondHlons

(See Note3)

Common Mode Input Vo~age
Vo~ageGain

Output Vo~age
Sink Current

Notes:

7-268

-

1.1

-

%

VIOC

-

2

10

rnA

IIBe

-

0.5

3

VOM

0

-

3

~
V

±0.3

RL -10kn

Av

dB

VOLe

-

-

ISINK =3mA

0.1

0.2

V

IL= 0.5 rnA

VOLe

5.0

5.4

5.8

V

VOLC<1 V

ISINK

8

20

-

rnA

lVO• (213)· K· Vz · CT· RT • fiN
2At 5011 00 Hz on the basis at 100 Hz.
3The current flows outward from the IC.

100

MB4207
APPLICATION EXAMPLE
Rs
Vee

I1

RIN

~

2

s
CIN=~

CT==

RT

~
*Co

RI

po Rl

Voc

8
71---<

-

~ R.

R2

Operating frequency of the comparator
is provided by the following equations.

Vo(,)

3

Rz

fx~ 2~RT· ~ + RI//R.

3

R2 //R.

fz~ 2~RT· RI + R2//R.

/'

/

IDI

RIN and CIN are needed when the input
has chattering noise.
fiN

VO(c)

f

l
fiN.

fz

fx

7-269

MB4207
TYPICAL CHARACTERISTIC CURVES
Figure 1. Supply Current/Reference
Vonage vs. Supply Vonage

1I

25

~

<"

~r

20

~

c;.

10

8:::>

5

CD

/

0

g>

.5?

=5
-j.

~

3

~4

.;a:

15

en

25 °C
-30.35°(

/

I

V

o /'
o

R. -680n

/'
10
20
Supply Voltage Vee (V)

30

Figure 2. Output Current vs.
Ambient Temperature

lu.

450

_0

'E
~

lflii

::>

400

0

"5

~

----

-

---

~4\i
!-.t2V

,.-

---

0

350
-50

o

~5V

50

100

Figure 3. FN Convener Output Voltage vs.
Input Frequency

~0

>

/

4

V

"5

~
;

/

0

1::

~

2

c:

I

~

V

8

0,.=0.1 ).1£
RT - 47k·(J
Co=10).1F

200
400
Input Frequency fiN (Hz)
t(msec.)

7-270

600

MB4207
TYPICAL CHARACTERISTIC CURVES (Continued)
Figure 4. zener Current vs.
Reference Voltage
30

~
~

20

E

~
:::I

U
Q;
c:

10

CD

N

5.5

5.7

Reference Voltage Vz (V)

Figure 5. Low-Level Output
Voltage vs. Sink Current

~
CD
0>

.,.

«

...
0

\:l

~

l'l
0

>
-g

40
20

"
0

r-R L = lkn

>

«

AV2

0

kJ,1

~

AV 2

0

60

"

C>

3

l'l

1

40

>

r\

]

~

20

"

N

w

"
g>

:s

= lkn

rr-lJ

Ivll ~~~

a;

T A =25°C

III

60

Fig. 8 -SINGLE ENDED VOLTAGE GAIN
vs. FREQUENCY

'""

0

0

1 2 5

10 20

50 100 200 500

1

2 5

Fig. 9 - SINGLE ENDED VOLTAGE GAIN
vs. FREQUENCY

r-l~ llllil~

a;

:s

«>

TA =

"

"0
0

AV2

40

~

20

~

0

2 5

-200

~

-300

10 20

50 100 200 500

1 2 5

E

i=

t

~

a

"

V~ =1±6~_

~S ~ ±~V II-

AV2

50

...o

1.05

~ 1.00

40

I

"- ~

./

20

0

~
~

./

30

V-

'/

0.95

E

a

2

A~3
r--.
i'.. to... .I,
i'-..

~ 0.90

V-

I
~

l'l

10

50 100 200 500

Fig. 12 - NORMALIZED VOLTAGE GAIN
VS. TEMPERATURE

u

a:

10 20

Fig. 11 - RECOVERY TIME

u

w

\ AV,"

Frequency f (MHz)

T~ =1 25hC

If

Sill
~:"'~4
AV 2

Frequency f (MHz)

vs DIFFERENTIAL INPUT VOLTAGE

.=.

)=I±W

0..

WI

0

1

~

'""

Vs =
±8V
±6V

25oJ~J

~~

g; -100
:s

60

W

'"in"

TA =

o

C>

>
-g

50 100 200 500

Fig. 10 - PHASE SHIFT
vs. FREQUENCY

25~J!:J

0

l'l

10 20

Frequency f (MHz)

Frequency f (MHz)

0

Til

0

in

(ij

~

TA = O°C
25°C

I~

0

w

0.85

"

-

Ay2

-

A~'

-

I- I-

o

40

80

120

160

200

Differential Input Voltage VIO (mV)

()

20406080
Temperature T A (OC)

8-7

~~~~~I~~~OOII~~I~~~~lml~
FUJITSU

1111111111~11~11111~11~~III~lml~lllmmll MB 3 50 1

TYPICAL CHARACTERISTICS CURVES (continued)
Fig. 13 - NORMALIZED VOLTAGE GAIN
VS. SUPPLY VOLTAGE
Fig. 14 - COMMON MODE GAIN
VS. FREQUENCY

TA~25"C

c:
~

1. 2

O. 9

~

0.8

::. -40 1-H-ttIHI-t-H'l'I'III::-+-H+IHI--t-f++I#

~

l'

c:

~

I~

0.6
0.5

Vs ~'~6V

~-601~~~~~H+~1+~
~
I'

V

~Pv!

Eo: 0.7
z

111 +t\Hf
c: -80I-H
'iij

(5

>

111111_+++II-Hlll--+H++TIII-A'_~j-2f+5o++HIC

_t--

~ 1. 1
!9 1.0 I- AV3

A

o
u

AV,

-20 1-H-ttIHI-t-H-H,IH--+-H'l'tIIt--t-f++I#

~

OI-H-ttIHI-t-H*IH--+-H+IHI--t-~

I
3

4

5

6

7

8

10k lOOk

Fig. 15 - OUTPUT VOLTAGE SWING
vs. FREQUENCY

.

TA~25°C

Ii.

11111111

~~ ll~gr

~

::;

o
>

61-RL~lkn

4

2

.....

1 2 5

10 20 50 100 200 500
Frequency f (MHz)

8-8

1M

10M

Frequency f (Hz)

Supply Voltage ±Vs (V)

100M

1IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIImi

FUJITSU

MB 3 50 1 111111111~lmlllml~~lllllllmllll~lll~mll

PACKAGE DIMENSIONS
14-LEAD PLASTIC DUAL-IN-LiNE PACKAGE
(CASE No.: DIP-14P-M02)

INDEX-1

I

.244±.010

.300±.010
(7.62±0.25)

~=r=::::;::::;==r=:;=:::;=;=::;::::y=;::::;::::::::;:=;==r::!.!:l0.25)
.1

.010±.002
(0.25±0.05)

.17214.36)MAX

.018±.003
(0.46±0.08)

Dimensions in
inches (millimeters)

©FUJITSU LIMITED 1987 D14010S·3C

8-9

mlmlmm~mlmoom~~mm~M~m
FUJITSU
~III~~~OOOO~~~~~~~II~~~ MB3501

PACKAGE DIMENSIONS (continued)
14·LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT·14P-M01)

J·T""~·:I
(STAND OFF)

l

·307±.016
(7.80±0.40)
.209±.012
(5.30±0.30)

INDEX
_ /
C5

1l::::;:;=;:::r:::;::;=::;:r::;:;:=n=;:;=Y~

View "A"

.272±.012
.' _

,
I

~(6'90±0'30)
'
'

A~
:
.020± .008
\, ___ -~~ (0.50±0.20)

~1-.006~:gg~(O.15~g:g~)

J

.020(0.50)
.007(0.18)

MAX
.027(0.68)

MAX

FfnnnnnnT1~.085(2.15)
-

-~

-~

MAX

.....

.031±.008
(O.80±0.20)

Dimensions in
© FUJITSU LIMITED 1987 F14003S·2C

8-10

inches (millimeters)

cO

April 1990
Edition 1.0

FUJITSU

PRODUCT PROFILE

MB4210
Lamp Failure Detector for Automobiles
DESCRIPTION
The Fuj~su MB421 0 is a bipolar integrated circu~ designed for lamp failure systems in
automobiles. Single lamp failure of two to four lamps can be detected because the
MB4210 has a precise comparator and voltage reference circu~s. The voltage
reference has voltage characteristics similar to those of automobile lamps.

FEATURES
•
•

Single lamp failure detection among 2 to 4 lamps
Delay and memory by extemal condenser

•
•

Fuse open detection
High drive current for warning display

•
•

Reference output
Minimum Popcorn Noise

ABSOLUTE MAXIMUM RATINGS
(T.- 25°C)

Unit

SlP·08-M03

24

V

Pin Aaslgnment
(Front "lew)

Icc(s)

200

mA

V1N(S)

55

V

101.

300

mA

Po

420

mW

Operating Temperature

Top

-30-+85

Storage Temperature

T.1g

-55-+150

Item

Symbol

"tYpical Value

Operating Power Supply Voltage

VCC(OP)

18

DC Power Supply Voltage

VCC(OC)

Power Supply Surge Current
Input Surge Voltage
Output Current
Power Dissipation

°C

Note: Permanent device damage may occur if absolute maximum ratings are
exceeded. Functional operation should be restricted to the conditions as
detailed in the operation sections of this data sheet. Exposure to absolute
maximum rating cond~ions for extended periods may affect device reliability.

FUSE IN

8

Vcc

7

OUT

8

GND

5

eM

4

IN

3

VREF

2

VCC(IN)

1

This device contains circuilry to prolBct !he
inputs against damage due to high static 11011ages or electric fields. However, it is advised that
normal precautions be taken to awid application
of any voltage higher than maximum rated
wltages to this high impedance circuit.

Copywrlte © 1990 by FUJITSU LIMrTED and Fujllsu U_Ico.11c.

8-11

MB421 0
CIRCUIT BLOCK DIAGRAM

FUSE IN

l!I)-------------1

Vee

Fuse Open Detector

OUT

GND

IN

ELECTRICAL CHARACTERISTICS
(Ta = 25°C. Vee - 13.2 V.

At. = 50 n. As -

Item

220 n)

Symbol

Conditions

Min.

Typ.

Max.

Unit

1.6
2.0

2.6
3.0

4.5
5.0

rnA

Power Supply Current

Icco
lccH

VIF-OV
Vee -24 V. VlFs 24 V

Input Supply Current

Icc(H)

Vee=24V

1.6

2.4

4.0

Input Bias Current

II

VIN - Vee (IN) - 13.2 V

-

400

1000

2

4

110

115

120

Input Offset Voltage

VIO

mV

VR(l2)

Vee

Vrw/VR12

Vee(IN)- 8 V

0.775

0.815

0.855

VR1aNR12

Vee (IN)-16 V

1.120

1.175

1.230

Reference Resistance

RR

IR-l rnA

250

400

550

n

Memory Start lime

T Ms

~-II1F

27

54

100

mS

Voltage Reference

(IN)

-12 V

nA

Memory Hold lime

TMH

Vee-7.8 V

4.6

5.0

5.4

Open Detection Voltage

V1H(F)

~=47Kn

2.6

3.8

5.0

Low Level Clamp Voltage

VIL(F)

Vee- OV

-

1.0

1.8

High Level Clamp Voltage

VIH(F)

Vee -18V

5.0

5.4

5.8

Output Saturation Voltage

VOl

Iot.- 240 rnA

0.9

1.2

Output Current (High-level)

IoH

Vee ,,!24 V

-

-

1.0

rnA

Over Voltage Protection

Vccz

Icc - 200 rnA. t

35

40

45

V

8-12

IV

IN (FJ-18 V

I R -47kn
-100 rnA,

V

MB4210
APPLICATION
lampSW

lamp Fuse

47k{l

8

PowerSW

2200
2

35mO

r--T-I

3

I

4

5

6
Indicator (3.4W)

~~
L __
I

7

eM 2211 F

.1I __

PACKAGE DIMENSIONS
8-LEAD PLASTIC SINGLE IN-LINE PACKAGE
{Case No. SIP-08-M03}
.128 ± .010
(3.25 ± 0.25)

.2r=-

(6.20 ± 0.25)

L

~I
Il;:::;:::::;::::::;:::;::::::;::::;::::;::::;:=;:::;:=;;::;:=;:::;;::;
·~rll,

~j ~-4~
.061

~ 0012

.157 ± .012
(4.00 ± 0.30)

I~

...

.010 ± .002
(0.25 ± 0.05)

.100 (2.54) TVP

.020 ±.003

(0.50

± 0.08)

(1.52 ~g.30)

Dimensions In
I~~ ("!~~I~_maters)

S08010S-2C

8-13

Oth9/' Unear Products

8-14

Unear Data Book

cP

April 1990
Edition 1.0
PRODUCT PROFILE

FUJITSU

MB4214
Long Period Timer
DESCRIPTION
The Fujitsu MB4214 is designed to be a long period timer. It contains an oscillator.
divider (13-state flip-flop). output circuit. power supply circuit. and two-channel
comparator. Arbitrary period is set by an external resistor (RT). capacitor (Or). and
input voltage (Vs).

FEATURES
•
•
•
•
•
•
•
•

lime adjustable: 500 ms to 100 hours
Oscillator period is controlled by Vs input vokage
Free running oscillation is achieved
On-chip low power ilL (Integrated Injection Logic) divider
On-chip Zener diode to maintain stability
On-chip two-channel comparator
limer output level: TTL (open collector)
Plastic 17-pin ZIP Package

Plastic Package
ZIP-17P-M01

ABSOLUTE MAXIMUM RATINGS
Parameter
Power Supply Vokage

Symbol
Vee

Ratings
18

Unit
V

Pin Assignment
(Front VIew)

V02

Zener Current

Iz

20

mA

Input Voltage

VIN

-0.3 to 18 (VINS Vcc)

V

+IN-B

Output Voltage

Vo

18

V

-IN-8

Power Dissipation

Po

360 (TAS 85°C)

mW

-IN-A

Operating Temperature

TA

--30 to +85

·C

Storage Temperature

TSTG

-55 to +125

·C

VOl

+IN-A

-OUT-8
-OUT-A
GND
osc/FR
RST

Vs

CT
VR
RT
V2
Vee

Note: Permanent device damage may occur if absolute maximum ratings are
exceeded. Functional operation should be restricted to the conditions
as detailed in the operation sections of this data sheet. Exposure to
absolute maximum rating conditions for extended periods may affect
device reliability.

CopyNrIe

©

This device contains circuitry to protect the inputs against damage dJe to high static voltages
or electric fields. However, it is advised that normal pracautions be I8ken to avoid application of
any voltage higher than maximum rated voltages
to this high impedanoe circuit.

1990 bf FUJITSU LIMITED and FujI18u M _ I c o , Inc

8-15

MB4214
FIGURE 1. MB4214 BLOCK DIAGRAM

Power
Supply
Circu~

OSCIFR

VA

PIN DESCRIPTIONS

8-16

Pin No.

Pin Name

1

Vee

Power Supply Voltage, 4.5 to 16 V

Description

2

Vz

Zener Pin
Vz pin outputs Zener current 20 mA max. Unless it is used as stability power supply
source, ~ should be connected to the vec pin through a resistor about 100 k.Q.

3

RT

RTlnput Pin
This pin is provided to connect the time constant of a resistor which controls the oscillator
period.

4

VA

Reference Voltage Output
Reference voltage of 3.5 V Is output. This pin can supply the current up to 3 mA.

5

CT

CT Input Pin
This pin is provided to connect a capacitor which controls the oscillator period.

6

Vs

Vs Input Voltage
Input Voltage to this pin controls the oscillator period.

7

RST

Reset Pin
Counter operation is interruped by the instruction of RST pininput level. The counter is
cleared when this pin is connected to GND. Power on reset is achieved by connecting an
external capacitor.
Continued on next page

MB4214

PIN DESCRIPTIONS
Pin No.

Pin Nama

8

OSCIFR

9

GND

10

OUT-A

11

OUT-B

12

-IN-A

Description
Free Running Oscillator Output
When this pin is connected to GND, the output is 4096 times longer than the normal
oscillator frequency.
Ground
Open Collector Outputs

13

-IN-B

14

+IN-A

Comparator Inputs

15

+IN-B

16

Vo,

Timer Output Pin No.1 expands the oscillator period 2048 times the fundamental oscilla·
tor period.

17

V""

Time Output Pin No.2
The 4096 times as long as fundamental oscillator period is kept. Owing to free running
oscillation, the 4096 times as long as oscillator frequency is output.

FUNCTIONAL DESCRIPTION
The MB4214 contains a reference vottage circuit, oscillator, divider and comparator. Oscillator frequency is arbitrarily controlled by
external resistor RT, capacitor Cr, and input vottage Vs.
The divider consists of a 13-stage divider circuit which is constructed with the ilL (Integrated Injection Logic) technique. It expands the
oscillator period up to 4096 times the fundamental period. This expanded period allows the capacitor to achieve a period of
approximately 100 hours.
A free running oscillation (long period, low frequency) is achieved when the OSCIFR pins connected to GND.

START RESISTORS Rs
As is a start resistor which controls the Zener diode current. The Zener current is 20 mA max and generates a stable Zener voltage of
6.2V.

RESET FUNCTION
Counter operation is interruped by means of the reset pin (pin 7). All counters are cleared when this pin is connected to GND.
Power on reset is availble by connecting an external capacitor (CRS). Power on resettime (tpOR) is calculated by the following fomula:

~R-3.5~(S)
IRS

OSCILLATOR PERIOD
Two ways of selecting the oscillator period are provided.
(1) Divide the internal reference voltage by external resistance, to change the Vs voltage. The Rr pin voltage and reference voltage
have a 2:3.5 ratio. The oscillator period is calculated using the following formula:

3.5

lose - -

2

Rr Or

Rz
-R, +Rz

(s)

8-17

MB4214
(2) Provide VS voltage to the other power supply source.

fosc = K

Rr Cr

- - Vs (s)

2

Note: Conversion value K ~ 1

FREE RUNNING OSCILLATION
Free running oscillation is achieved when the OSC/FR pin is conected to GND. The V02 pin outputs 4096 times the fundamental
oscillator frequency. After the vottage is applied or reset is released. V02 maintains a frequency 2048 times longer than the
fundamental period. When the OSC/FA pin is left open. the first divider data is output.

RECOMMENDED OPERATING CONDITIONS
Symbol

Value

Power Supply Voltage

Vcc

4.5 to 16

V

Timing Resistance

RT

10 to 220

k.{l

Timing CapacHance

~

0.001 to 100

JlF

Operating Temperature

TA

-30 to +85

°C

Parameter

Unit

ELECTRICAL CHARACTERISTICS
Comparator Section (TA = 25°C, Vee

= 12 V, Rs = 100 ka)
Value
Typ

Max

Unit

Input Offset Vottage

V'O

2.0

5.0

mV

Input Offset Current

110

5

50

nA

Input Bias Current

h

-250

Common-Mode Input Vottage

VCM

0

VottageGain

Av

Parameter

Symbol

Condition

Rl-15 k.{l

Min

25

-25

nA
Vcc-1.5

200

V
V/mV

Output Saturation Voltage

Va.

IOl-10 mA

Output Sink Current

!sINK

VOl-1.5V

Output leakage Current

IOH

VOH -18 V

Response Time

IR

Rl-5.1!

4.0

en

~
o

Q.

20°C
50°C
75°C

y

()

o

o

I

Figure 4. Zener Current vs.
Zener VoHage
:;(

.s
~

ECD

II

t:

::>

()

CD

As 5

10

c:
CD

100 k.O

15

N

o

5.0

20

7.0

Zener Vottage Vz (V)

Power Supply Vottage Vee (V)

~ 3.54

offCD

Joj
c:

l!!
II:

1.0

e

3.52

IR=O mA

~--'---~---'-'7""--'

100m

3.50
3.48

:;;-

IR - 3 inA

CD

()

Figure 6. OSCillator Period
vs. Voltage

Figure 5. Reference VoHage vs.
Ambient Temperature

----=::::

10m 1-----t-7L--+r---b_--I

3.46
3.44

"*

lOOIlI----j;.tC---b'<=----+----i
-50

o

50

100
Ambient Temperature T" (Oe)

lOIlI---+---+---t----1
10m

10m

1.0

10

100

Vs Vottage (V)

8-21

MB4214

TYPICAL CHARACTERISTICS CURVES (Continued)
Timer Section (Continued)

Figure 7. Oscillator Period va.
1(J3
R Resistor

C. •

•

Figure 8. Delay Time vs.
RTRealstor

100I1F
Day 4

e

lOS

Day 1
10 hrs

!;::
II>

SO min

E

F

i;'
10min

Gi

c

1 min
10-3 \--b-L-j---j
10-4 '--_'----'_---'
10
102
103
RT Resistor (1<.0)

I---Lt--jf----l 1 sec

10
102
RT Resistor (1<.0)

Figure 9. Output Low VoHage vs.
Output Current
10

Vcc ·12V
Rs ·l00kO

~

"

1.0

II>

1
~

~

"$

~~

75°C

25°C
100m

10m

Q.

"$

0

1m

--

~

~

-{30°C

O.lm
1011

10011

1m

10m

Output Current IOL (rnA)

8-22

100m

103

MB4214
TYPICAL CHARACTERISTICS CURVES (Continued)
Comparator Section

Figure 10. Input Voltage/Output
VoHage VS. TIme
6
CD

~

;g~
[~
5>

0

.. CD
Cl

"'>

~.s

5Q. ~
oS>

"'-

4

Figure 11. Output Low Voltage
vs.Output Current

Input Overdrive
I
5mV _

I

~

-

1--1-- ~omV

2

I

'-

0
100

\...

100mV -

100m

-

I

T~=25°C

0

o

0.5

10 r---~----~--~--~
Vcc=12V
Rs= 100ka
1.0 1---+--+---+-+-1

1.0
1.5
Time (jJ.s)

10m

~--+~~~~-+-~

1m

~--+--+---+-~

•

0.1 m L...__--L.____.l.....__--L.__---I
1011
10011
1m
10m
100m
Output Current IOL (mA)

2.0

Figure 12. Input Voltage/Output
Voltage VB. TIme
6

Input Overdrive

r

4

Ir

I-

r

2

o
100

100mV
II
20mV

..

5mv

..
TA -25°C

o
o

0.5

1.0
1.5
Time (J1S)

2.0

8-23

MB4214
APPLICATION EXAMPLES
FIGURE 13. TIMING
Vee
12V

7

~·1

Switch

16

MB4214
3

9

VR

Vs

RTlc-r

Reset_I

I
1I

I
I

I
I

II

5f-I
- I

II

I

I 2048 lose

I

I

I

I.
I 204810sc I
I"
•.

I

I

r>i

--~14--~-9-61osc--~.,1

.

I..

I

.,.

I

~i.__40_96_too_e__~.r-

Start Timing: Rising edge of reset signal
Stop Timing: Rising edge of VOt output
100mV

8-24

MB4214
APPLICATION EXAMPLES (Continued)
FIGURE 14. SUPER LOW FREQUENCY OSCILLATOR
Vee

12V

0----_---,
As
2.2k

(5.5 V)

V2
2

MB4214

7

17t-----'

V02

RT*Cr * VS [1
tosc=K*-2S

eRS

t pOR = 3.5 * -I-

[s1

RS

Vee-i

I
VeT

I
I
I
V02

I. .,"..... 1.""'..... 1-1---

8-25

MB4214
PACKAGE DIMENSIONS
7·LEAD PLASTIC ZIGZAG IN·LlNE PACKAGE
(case No. ZIP·17P·M01)

.858(21.80)
.884(22.45)

lr

INDEX

.226(5.75)
.246(6.25)

~

~
.008(0.20)
.012(0.30)

-J

I

.050(1.27)TVP

J

.016(0.42)
.023(0.58)

tn n n n n n n n
_0 0 0 U 0 U U
© 1986 FUJITSU LIMITED Z17001S·1C

8-26

Dimensions in
inches (millimeters)

MB47201
May 1988
Edition 1.0

QUAD SPSTBI-FET ANALOG SWITCH
The Fujitsu MB47201 Is a quad SPST (Single-pole Signal-Throw) BI-FET
analog switch manufactured using Fujitsu Advanced Bipolar Technology. The
MB47201 has four Independent one-Input one-output bl-dlrectlonal analog
switch which provides a constant resistance over the wide temperature and
Input voltage ranges.
The logic level of Its Input Is CMOS and TTL compatible
break-before-make switching action can be surely operated.
•
•

Low ON resistance : lIOn typ.
Small temperature coefficient of ON resistance: 0.1 %/oC

•

Small supply voltage coefficient of ON resistance: O.4%/v

•

High speed switching

•

Break-before-make action:

•

Low Leakage current: O. 1 nA

•
•

Logic Input level : CMOS/TTL
Compatible with DG201. LF11201. SW-Ol
16-pln Plastic DIP Package (Suffix: -PI
Package
16-pln Plastic FPT package (Suffix: -PF)

•

PLASTIC PACKAGE
DIP-16P-M04

tON> tOFF

ABSOLUTE MAXIMUM RATINGS
Rating

and

PLASTIC PACKAGE
FPT-16P-M02
(TA=25°Cl

Value

Unit

Power supp~ VOlta~
(Between V C and EE)

36

V

r~:\~:e~u~~~ ".a~!t~~D)

36

V

Symbol

16
2

15

V

3

14

±. 30

mA

4

mW

13
TOP VIEW

800

5

12

6

11

7

10

8

9

Analog Input Voltage

VINA

VEE-l0 to Vee+l

V

Logic Input Voltage

VINO

-4 to Vee. ;?;VEE

Analog Input Current

I INA

Power Dissipation

Po

Operating Temperature

TA

Storage Temperature

TSTG

NOTE:

PIN ASSIGNMENT

-30 to +85

°C

-55 to +125

°C

Permanent device damage may occur If the above Absolute
Maximum Ratings are exceeded. Functional operation should be
restricted to the conditions as detailed In the operational sections of
this data sheet. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.

This device contains circuitry to protect the Inputs
against damage due to high static voltages or electric
fields, However, It Is advised that normal precautions
be taken to avoid application of any voltage higher
than maximum rated voltages to this high Impedance

circuit.

Copyrlght!i 1988 by FUJITSU UMITED and Fujitsu Microelectronics, Inc.

8-27

1IIIIIImlllllllllllllllllllll~~IIIIIIIII~mlllll
FUJITSU

11~111~111~llllllllllllllllllllllllllllmll~lll~ MB4720 1

Fig. 1 - MB47201 BLOCK DIAGRAM

Fig. 2 - tON, tOFF MEASUREMENT CIRCUIT
+15V

Vee
-5V

o

0----'<:1---<>"': .....--I:>"'-----.---r-O Vo

Vee
-15V
Switch Is ON when IN Is at low level.

3.5V

vcont.
( tr<20ns

tt:::;20ns

50%
OV
OV--~

Vo
-5V (Vs)

O.lVo
0.9Vo

--+--+---+--t--tOFF

8-28

RL
Vo = Vs RL + RON

1111~111111111111111~111111111111~IIIIIIIII~mlll
FUJITSU

M84720 1 1~~~III~~I~~llllmlll~III~IIIIIIII~11111111

ELECTRICAL CHARACTERISTICS

(VCC=15V, VEE=-15V, TA=25°C)
Value

Parameter
ON Resistance

RON

ON Resistance Matching
Analog Input Voltage

Condition

Symbol

Min

VINA=OV, ID=lmA
VA=O,ID=lOOIlA

VINA

ON Resistance deviation

ID=lmA
It.RoN/R(VA=O) 1<10%

10

IVAI :S;10V,ID :S; lmA

Unit

Typ

Max

110

150

fi

4

10

%

11
-13

- 10

4

10

V
%

It.RoN/R(VA=OIl
ON Resistance Coefficient

%/OC

0.1

VA=O ,ID=l OOIlA

with Temperature

5

Analog Input Current

INA

IVAI

Production Process
Test/Inspection
Production Process
and Test/Inspection
QC Gate (Sampling)

Note:
The flow sequence may vary slightiy
with individual product type.

9-5

Quality and Reliability

9-6

Linear Data Book

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Section 10

Ordering Information - At a Glance

I

I

Page
10-3
10-3
10-3

Ie Product Marking
Ie Ordering Code (Part Number)
Ie Package Codes

10-1

Ordering Information

10-2

Linear Data Book

Linear Data Book

Ordering Information

IC Product Marking

Fujitsu Logo

xx Note:

_ k number

Marking formats may very, depending on the product. The country of origin appears on all finished parts.

IC Ordering Code (Part Number)

II..
T
1
MB

XXXXX -1

P

Package Code (See Package Codes below)

Speed Designator (When applicable)

Device Type

Manufacturer Designator
MB
MBM

Identifies an IC designed and manufactured by Fujitsu that uses a Fujitsu-designated device number.
Identifies an IC designed and manufactured by Fujitsu that uses a device number deSignated by the industry

Note:

to be the industry standard number.
Please contact your nearest Fujitsu sales office, representative, or disbibutor lor exact part number/order information.

IC Package Codes

,I ~

2

Side Brazed

~

r

CERDIP

\
10-3

Ordering Information

10-4

Linear Data Book

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Section 11

Sales Information -

I

At a Glance

Page
11~

11-7
11-a
11-S
11-11
11-11
11-11
11-12
11-16
11-17
11-18
11-20
11--21
11--22

Introduction 10 Fujitsu
In1egrated Circuits Corporate Headquarters - Worldwide
FMI Sales Offices for North and South America
FMI Representatives - USA
FMI Representatives-Canada
FMl Representatives - Mexico
FMI Representatives - Puerto Rico
FMI Distributors - USA
FMI Distribulors - Canada
FMG Sales Offices for Europe
FMG Distribulors - Europe
FMA Sales Offices for Asia and Auslralia
FMA Representatives - Asia and Australia
FMA Distributors - Asia and Australia

iii

11-1

Sales Information

ID

11-2

Linear Data. Book

linear Data Book

Sales Information

Introduction to Fujitsu

Fujitsu Limited

Fujitsu Limited, headquartered near Tokyo, Japan, is the largest
supplier of computers in Japan and is among the top ten
companies operating in Japan. Fujitsu is also one of the world's
largest suppliers of telecommunications equipment and
semiconductor devices.
Established in 1935 as the Communications Division spinoff of
Fuji Electric Company Limited, Fujitsu Limited, in 1985,
celebrated 50 years of service to the world through the development and manufacture of state-of-the-art products in data
processing, telecommunications and semiconductors.
Fujitsu has five plants in key industrial regions in Japan covering
all steps of semiconductor production. Five wholly-owned
Japanese subsidiaries provide additional capacity for production
of advanced semiconductor devices. Two additional facilities
operate in the U.S. and one in Europe to help meet the growing
worldwide demand for Fujitsu semiconductor products.

ill

11-3

Unear Data Book

Sales Information

Introduction to Fujitsu (Continued)
Fujitsu Microelectronics, Inc.

Fujitsu Microelectronics, Inc. (FMI), with headquarters in San
Jose, California, was established in 1979 as a wholly-owned
Fujitsu Limited subsidiary for the marketing, sales, and distribution of Fujitsu integrated cirruit and component products. Since
1979, FMI has grown to three marketing divisions, two manufacturing divisions and a subsidiary. FMI offers a complete array of
semiconductor products for its customers.
The Advanced Products Division (APD) is responsible for the
complete product development cycle, from design through
operatiOns support and worldwide marketing and sales. Products
are the resuH of both intemal development and external
relationships, such as joint development agreements, technology
licen,ses, and joint ventures. The SPARCTM RISC processor was
developed by both APD and Sun Microsystems, Inc.
In addition to designing and selling a full line of SPARC
processors and peripheral chips, APD also designed and is
selling the EtherStar™ LAN controller -the first VLSI device to
integrate both StarLANTM and Ethemet® protocols into one
device. The core of APD's EtherStar chip was the resuH of APD's
cooperative venture with Ungermann-Bass.
The Microwave and OptoelectroniCS Division (MOD) markets
GaAs, FETs, and FET power amplifiers, lightwave and microwave devices, optical devices, emitters, and Sltransistors.
The largest FMI marketing division is the Integrated Circuits
Division (ICD).
Memory and programmable devices marketed by ICD include the
following:
DRAMs and DRAM Modules
EPROMs
EEPROMs
NOVRAMs
CMOS masked ROMs
CMOS SRAMs and CMOS SRAM Modules
BiCMOS SRAMs
Bipolar PROMs
ECLRAMs
STRAMs (seft-timed RAM)
Hi-Rei PROMs and SRAMs
UHra High-speed ECUECL-TTL Translator Circuits
Linear ICs and Transistors

11-4

linear Data Book

Sales Information

Introduction to Fujitsu (Continued)
ASIC products offered by ICD include the following:
CMOS, ECl, and BiCMOS gate arrays
CMOS standard cells
Design Software Support
Customer support and customer training for ASIC products are
available through the following FMI design centers:
San Jose
Dallas
Atlanta

Gresham
Chicago
Boston

Microcomputer and communications products offered by ICD
include the following:
4-bit MCUs
8- and 1S-bit MPUs
SCSI and controllers
DSPs
Prescalers
Plls
Memory Cards
FMl's manufacturing divisions are in San Diego, California and
Gresham, Oregon. The San Diego Manufacturing Division
assembles and tests memory devices. In 1988, the Gresham
Manufacturing Division began manufacturing ASIC products and
DRAM memories. This facility, when completed, will have one
million square feet of manufacturing-the largest Fujitsu
manufacturing plant outside Japan.
FMl's subsidiary, Fujitsu Components of America, markets
connectors, keyboards, plasma displays, relays, and hybrid ICs.

Fujitsu Mlkroelektronlk GmbH (European Sales Operation)
Fujitsu Mikroelektronik GmbH (FMG) was established in June,
1980, in Frankfurt, West Germany, and is a wholly-owned
subsidiary of Fujitsu Limited, Tokyo. FMG is the sole representative of the Fujitsu Electronic Device Group in Europe. The wide
range of ICs, lSI memories, microprocessors, and ASIC
products are noted throughout Europe for design excellence and
unmatched reliability. Branch offices are located in Munich,
london, Paris, Stockholm, and Milan.

11-5

Sales Information

Linear Data Book

Introduction to Fujitsu

(Continued)

Fujitsu Microelectronics Ireland, Ltd. (European Production Operation)

Fujitsu Microelectronics Ireland, Ltd. (FME) was established in
1980, in the suburbs of Dublin, as Fujitsu's European Production
Center for integrated circuits. FME assembles DRAMs,
EPROMs, and other LSI memory products.
Fujitsu Microelectronics, Ltd. (European ASIC Design Operation)

Fujitsu Microelectronics, Ltd., Fujitsu's European VLSI Design
Center, opened In October of 1983 in Manchester, England. The
Design Center is equipped with highly sophisticated CAD
systems to ensure fast and reliable processing of input data. An
experienced staff of engineers is available to assist in all phases
of the design process.
Fujitsu Microelectronics Asia PTE Ltd. (Asian/Oceanian Sales Operation)

Fujitsu Microelectronics Asia PTE Ltd. (FMA) opened in August
1986 in Hong Kong as a wholly-<>wned Fujitsu subsidiary for
sales of electronic devices to Asian and Southwest Pacific
markets.

SPARC™ is a trademark of Sun MiCl'Olyate1TB,1nc.

Ethernet" is a regiltered trademark or Xerox Cotporatlon.
Etherstar™ Is a trademark of Fujitsu Mlao&Iec:bonics. Inc.

StarLANTV II a trademark of AT&T.

11-6

Linear Data Book

Sales Information

Integrated Circuits Corporate Headquarters - Worldwide
International Corporate Headquaners
FUJITSU LIMITED
Marunouchi Headquarters
6-1, Marunouchi 1-cl1ome
Chiyoda--lGll~ ~
Iw+

GNO

Iw.

MB40978
0 1 ro 0 8 (G)

01

ro 08(6)

G 1 to G2

GouT
GNO

~-~I1::"';;=--V

Sour

V

RG6 Signal Process

Figure 1. The Fujitsu MB40978 Triple 8-Blt D/A Convener

Each digital-to-analog converter of Fujitsu's MB40978 has an 8-bit resolution which means each color gun
can have 256 intensity levels. With this configuration, the color palette can have 16,777,216 colors.
Typically some of the bits would be used in a common pattern that allows all three guns to control
intensity and results in a reduction of the possible number of colors for the color palette.

Example of Video Timing Calculations for an Interlaced Monitor
To calculate the total horizontal raster time for a 1024 x 768 interlaced 60 Hz monitor, use the parameters
in the following chart.
Table 1.
Monitor Specifications
1024H x 768 V Interlacad at 60 Hz sync

Horizontal

Vertical

Blanking time before syncronization
(front porch) ~

2 horizontal lines
about 70 lIS

2 lIS

Synchronization pulse width t"

200 lIS

2.5 lIS

Blanking time before raster line
(back porch) It,p

NA

3.5 lIS

Raster time 1,

NA

To be calculated

12-16

Video Timing Calculations

FUptsu Microelectronics, Inc.

To find the pixel or Dar clock rate, divide the raster time by the number or horizontal pixels. To find the
pixel time, invert tp as shown in the following sample calculation.

., ="'p + "S + "bp + ." = 2 + 2.5
." = ., --8 I1s

The total horizontal time th is
and the horizontal raster time thr is

+ 3.5 + ."

tv = ., 768 + tvfp + tvs + tllbp

The total vertical time tv is
for 60 Hz interlaced frames

tv = 1/30 Hz = 331J.S

which allows a total horizontal time th of

., = (tv - tvfp - tvs - tvp)/768 lines
=(33,000 -70 -200 --0 )1768 lines
= 41.661J.S

The horizontal raster time left is thr

.,,=41.66-8 = 33.6611S
~

and the resulting time for each pixel is tp

= 33.66/1024 =32.87 ns

This corresponds to a D/A conversion rate
and minimum clock frequency of

30.5 MSPS

Example of Timing Calculation for a Non-Interlaced Monitor
If the monitor is non-interlaced, with an improved video response to reduce the front porch, sync and
back porch times, the writing speed can be improved to a higher sample rate. The following chart gives
the parameters for a non-interlaced monitor.
Table 2.
Monitor specifications 1024Hx768V
Non-Interlaced at 60 Hz sync
Blanking time before sync. (front porch) tip

Vertical
2 horizontal lines

Horizontal
1.0 IJ.S

about 35 us
Synchronization pulse width ts

200 us

1.51J.S

Blanking time before raster line (back porch) tbp

NA
NA

2.01J.S

Raster time t,

To be calculated

With these parameters use the following calculations.

to =1/60 Hz =16,700 IJ.S

fJ. =(16,700-35-200)/768 =21.4411s

fm. =21.44-1.0-1.5-2.0

=16.9411S

The resulting sample rate must be 59 MSPS and the pixel clock must run at 60 MHz.
The Fujitsu MB40978 is ideally suited to use for either of these video monitors. Fujitsu also has video D I A
and AID converters which can be used in a wide variation of video and high perfonnance audio display
and recording functions.

12-17

Video Timing Calculations

12-18

Fufftsu Microelectronics, Inc.

..
D

D
ID
0
0

Operational Amplifiers
Comparators
Automotive Audio
Power Supply Controls
Motor Drivers
Disk Drivers

IfII

Data Conversion

DI
HI

Other Linear Products
Quality and Reliability

I]]

Ordering Information

III
1m

Sales Information
Appendices-Design Information
Linear Cross Reference Guide

FUJITSU LIMITED
Marunouchi Headquarters
6-1 , Marunouchi 1-chome
Chiyoda-ku , Tokyo 100, Japan
Tel (03) 216-3211
Telex: 781-22833
FAX: (03) 213-7174
For further information, please contact:

Japan
FUJITSU LIMITED
Integrated Circuits and Semiconductor Marketing
Furukawa Sogo Bldg.
6-1 , Marunouchi 2-chome
Chiyoda-ku , Tokyo 100, Japan
Tel: (03) 216-3211
Telex: 781-2224361
FAX: (03) 211-3987

Europe
FUJITSU MIKROELEKTRONIK GmbH
Lyoner Strasse 44-48
Arabella Centre 9. OG
0-6000 Frankfurt 71
Federal Republic of Germany
Tel: (49) (069) 66320
Telex: 441-963
FAX: (069) 663-2122

Asia
FUJITSU MICROELECTRONICS ASIA PTE. LTO.
06-04/06-07 Plaza By the Park
No. 52 Bras Basah Road
Singapore 0718
Tel: (65) 336-1600
Telex: 55573
FAX (65) 336-1609

North and South America
FUJITSU MICROELECTRONICS, INC.
Integrated Circuits Division
3545 North First Street
San Jose , CA 95134-1804 USA
Tel : (408) 922-9000
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