1990_Linear_Databook 1990 Linear Databook
User Manual: 1990_Linear_Databook
Open the PDF directly: View PDF 
.
Page Count: 1439
| Download | |
| Open PDF In Browser | View PDF |
.
~
--:::.~
_4_ '.
1990
Linea,
Databook
~:r,:
.. ; ..
1990 Linear Databook
..
QUICK REFERENCE INDEX
LF155 ..................... 2-271
LF156 ..................... 2·271
LF198 ...................... 9·97
LF355 ..................... 2·271
LF356 ..................... 2·271
LF398 ...................... 9·97
LF412 ..................... 2-275
LH0070 .................... 3·65
LH2108 ................... 2-279
LM10 ..................... 2·281
LM101 .................... 2·297
LM 107 .................... 2·297
LM108 .................... 2·303
LM111 ..................... 6·85
LM117 .................... 4·137
LM117HV ................ 4·145
LM118 .................... 2·311
LM119 ..................... 6-93
LM123 .................... 4·149
LM129 .................... 3·83
LM134 ..................... 3·87
LM136 ................... 3·101
LM137 .................... 4·157
LM137HV ................. 4·165
LM138 .................... 4·169
LM150 .................... 4-177
LM185-1.2 ................. 3-105
LM185-2.5 ................. 3·109
LM199 ................... 3·115
LM301 .. .. .. .
.. 2·297
LM307 .. .
.. ........... 2·297
LM308 .................... 2·303
LM311 .................... 6·85
LM317.....
. ........ 4-137
LM317HV ....
.. 4·145
LM318 .. .. . ..
.. 2·311
LM319 .......
. .. 6-93
LM323 . .. . .. .
.. 4·149
LM329 ................... 3·83
LM336 .. .. .. .... .. ....... 3-101
LM337 ......... .
.4-157
LM337HV ...... .
... 4-165
LM338 ..... ..
.4·169
LM350 ......... .
.. 4·177
LM385·1.2 .... .
..3·105
LM385·2.5 .... .
.. 3·109
LM399 . . . . . . . .
. . 3-115
LT111 ..................... 6·85
LT117 .................... 4·137
LT118 ................... 2·311
LT119 .................... 6·93
LT123 ................... 4-149
LT137
...... 4-157
LT138 ................... 4·169
LT150 ........ .. ....... 4-177
LT311 .................... 6·85
LT317 ................... 4·137
LT318 .................... 2·311
LT319 ..................... 6·93
LT323 .................... 4-149
LT337 .................... 4·157
LT338 .................... 4·169
LT350 .................... 4·177
LT580 .................... 3-121
LT581 .................... 3·121
LT685 ....................... 6·5
LT1001 ..................... 2·11
LT1 002 ..................... 2·25
LT1003 ...................... 4-9
LT1004 ..................... 3-17
LT1005 ..................... 4-17
LT1006 ................... _.2-41
LT1007 ..................... 2-57
LT1008 .... _................ 2-73
LT1oo9 ..................... 3-27
LT1010 .. _.................. 2-85
LT1011.. .................... 6-9
LT1012 .................... 2-105
LT1013 .................... 2-121
LT1014 .................... 2-121
LT1015 ..................... 13-6
LT1016 ..................... 6-25
LT1017 ..................... 6-45
LT1018 ..................... 6-45
LT1019........
.. .. 3-33
LT1020 ..................... 4-29
LT1021 ..................... 3-41
LT1022 .................... 2-145
LT1024 ................... 2-153
LT1025 .................... 11·7
LT1026 ...................... 5·3
LT1027.. ................... 13-8
LT1028 .................... 2-161
LT1029 ..................... 3-61
LT1030 ..................... 10-5
LT1 031.. ................... 3-65
LT1032 ................... 10-11
LT1 033 ..................... 4-49
LT1034 ..................... 3-77
LT1035 ..................... 4-57
LT1 036 ..................... 4·69
LT1 037 ..................... 2-57
LT1038 ..................... 4-77
LT1039 .................... 10-19
LT1054 ..................... 5-23
LT1055 .................... 2-219
LT1056 .................... 2-219
LT1057 .................... 2-235
LT1058 .................... 2-235
LT1070 ..................... 5-37
LT1 071 ..................... 5-37
LT1072 ..................... 5-49
LT1074 .................... 13-21
LT1077 .................... 13-27
LT1078 .................... 2-251
LT1079 .................... 2-251
LT1080 .................... 10-43
LT1081 .................... 10-43
LT1 083 ..................... 4-89
LT1083-5 .................. 4-101
LT1083-12 ................. 4-101
LT1084 ..................... 4-89
LT1084-5 .................. 4-101
LT1084-12 ................. 4-101
LT1085 ..................... 4-89
LT1085-5 .................. 4-101
LT1085-12 ................. 4-101
LT1086 .................... 4-113
LT1086-5 .................. 4-113
LT1086-12 ................. 4·113
LT1087 .................... 13-28
LT1088 .................... 11-33
LT1089 .................... 11-45
LT1101 .................... 13-36
LT1102 .................... 13-48
LT1120 ................... 4-125
LT1130 .................... 10-55
LT1131 .................... 10-55
LT1132 .................... 10-55
LT1133 .................... 10-55
LT1134 .................... 10-55
LT1135 .................... 10-55
LT1136 .................... 10-55
LT1137 .................... 10-55
LT1138 .................... 10-55
LT1139 .................... 10-55
LT1140 .................... 10-55
LT1141 .................... 10-55
LT1170 ..................... 5-61
LT1171 ..................... 5-61
LT1172 ..................... 5-73
LT1178 .................. 2-267
LT1179 ................... 2-267
LT1180. . . . . . . . . . . . . . . .. .. 10-67
LT1181 ................... 10-67
LT1188 .................... 13-55
LT1280 .................... 10-75
LT1281 .................... 10-75
LT1431 .................... 13-72
LT1524 ..................... 5-85
LT1525 ..................... 5-97
LT1526 .................... 5-105
LT1527 ..................... 5-97
LT1846 .................... 5-113
LT1847 .................... 5-113
LT3524 ..................... 5-85
LT3525 ..................... 5-97
LT3526 .................... 5-105
LT3527 ..................... 5-97
LT3846 .................... 5-113
LT3847 .................... 5-113
LTC201. .................... 13-3
LTC1040 ................... 6-57
LTC1041 ................... 6-69
LTC1042 ................... 6-77
LTC1043 .................. 11-15
LTC1044 .................... 5-9
LTC1045 .................. 10-27
LTC1049 .................. 13-10
LTC1050 ................. 2-181
LTC1051 .................. 13-13
LTC1052 ................. 2-197
LTC1059 .................... 7-3
LTC1060 ................... 7-15
LTC1061 ................... 7-39
LTC1062 ................... 7-59
LTC1064 ................... 7-73
LTC1064-1 ................. 7-89
LTC1064-2 ................. 13-15
LTC1064-3................. 13-19
LTC1064-4................. 13-20
LTC1 090 .................... 9-5
LTC1091 ................... 9-29
LTC1092 ................... 9-29
LTC1 093 ................... 9-29
LTC1094 ................... 9-29
LTC1095 .................. 9-57
LTC1099 ................... 9-81
LTC1100 .................. 13-35
LTC1150 .................. 13-49
LTC1290 .................. 13-62
LTC1291 .................. 13-70
LTC1292 .................. 13-70
LTC1293 .................. 13-70
LTC1294 .................. 13-70
LTC7652 .................. 2-199
LTK001 .................... 11-3
LTZ1000 ..................... 3-9
OP-05 ..................... 2-321
OP-07 ..................... 2-329
OP-15 ..................... 2-341
OP-16 ..................... 2-341
OP-27 ..................... 2-345
OP-37 ..................... 2-345
OP-215 .................... 2-275
OP-227 .................... 2-357
OP-237 .................... 2-357
REF-01 .................... 3-125
REF-02 .................... 3-125
SG1524 .................... 5-85
SG1525 .................... 5-97
SG1527 .................... 5-97
SG3524 .................... 5-85
SG3525 .................... 5-97
SG3527 .................... 5-97
EXCLUSIVELY COmmlnED TO LInEAR
The founding theme of Linear Technology Corporation was to create a company capable of leading
and directing linear circuit technology and design concepts of the future, and thus become the
market's linear specialist. The company believes that the totallC business has become so diverse
and so complex that a single company will have great difficulty assembling the engineering talent
necessary to lead in all areas of device technology.
Today, the customer base benefits by accessing the best product available in each functional area
of the IC market from those vendors who are at the leading edge of performance and technology as a
result of their "focused" strategy approach. The customer now has the choice of acquiring the best
linear, the best microprocessor, the best memory products, etc., by choosing the best vendor in each
area. In order to achieve the goal of becoming the market's first choice in the linear area, LTC has
assembled the leading deSign, test, product, assembly, quality and process engineering talent in the
industry, operating in what we feel is the most modern linear integrated circuit facility in production
today.
Linear Technology possesses a wide variety of bipolar processes including Super Beta, Bifet, low
noise, high speed, thin film resistors, sinkers, sub·surface zeners, and more. The company also has
in production several very modern silicon·gate CMOS processes, LTCMOSTM, which are specifically
tailored to satisfy the speCial needs of linear IC functions.
Linear Technology is committed to servicing the demanding requirements of the Military/Aerospace
marketplace. Our 883 DESC Drawing and MIL Drawing programs are designed to consistently
provide ott·the·shelf high performance linear integrated circuits tested to the requirements of MIL·
STD.lJ83 Class B, and fully compliant to Revision C. Our documentation, designs, procedures, and
facilities have been carefully established to meet the rigid requirements of MIL-STD-38510 level
devices. The company's facility is JAN approved for both Blevel and Slevel products and numerous
JAN QPL types are currently being supplied by Linear Technology, along with a wide variety of MIL·
STD-883C and standard military drawing (SMD) products. In addition, LTC is committed to
supporting the rigorous demands of '5' level source control drawings to service hi·rel and space
applications. All military-grade products are 100% tested at temperature extremes. Both
commercial and military outgoing quality levels are sampled over temperature with full lot
traceability back to the original wafer from which the device was derived. Presently Linear
Technology can boast that its products are used by all of the top 25 largest military contractors in
the U.S.
On the commercial side of the business, the company's proprietary products are currently being
used by leading manufacturers of automobiles, computers, instruments, cameras, telecommunica·
tion systems and in many other areas. The company prides itself in doing business with the major
manufacturers and leaders in each of these market segments.
This catalog contains products that already erijoy very wide acceptance status in new and existing
end products.
In addition to the commitment to provide better technical solutions, we also commit to our
customers that we will strive to make quality and reliability areason to buy from Linear Technology.
Our products address the instrumentation, industrial, data acquisition, peripheral, interface, and
military markets with solutions to linear systems application problems.
1
Linear Technology Corporation
Linear Databook
1990
LIFE SUPPORT POLICY
LINEAR'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITIEN APPROVAL OFTHE PRESIDENT OF LINEAR TECHNOLOGY CORPORATION. As used herein:
a. Life support devices or systems are devices or systems which (1) are intended for surgical implant into the body, or (2) support or sustain life and
whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result
in a significant injury to the user.
b. Acritical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure
of the life support device or system or to affect its safety or effectiveness.
Information furnished herein by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its
use. Linear Technology Corporation makes no representation that the interconnection of its circuits, as described herein, will not infringe on existing
patent rights.
Linear Technology Corporation • 1630 McCarthy Blvd .• Milpitas, CA 95035 • (408) 432·1900
2
© Linear Technology Corporation 1989
Printed in USA
1990
Linear
Databook
GEnERAL InFORmATion
OPERATionAL AmPLIFIERS
VOLTAGE REFEREnCES
VOLTAGE REGULATORS
SWITCHinG REGULATORS/VOLTAGE conVERTERS
comPARATORS
FILTERS
InSTRumEnTATion AmPLIFIERS
DATA conVERSion
•IlII
RS232 InTERFACE
SPECIAL FunCTion
miLITARY PRODUCTS
nEW PRODUCTS
III
PACKAGE DimEnSions
IlJI
III
APPEnDICES
3
NOTES
4
TABLE OF CONTENTS
SECTION 1-GENERAL INFORMATION
INDEX .................................................................................................... .
GENERAL ORDERING INFORMATION . ............................................................................. .
ALTERNATE SOURCE CROSS REFERENCE GUIDE .................................................................... .
1-2
1-3
1-4
SECTION 2-0PERATIONAL AMPLIFIERS
INDEX .................................................................................................... .
SELECTION GUIDE ........................................................................................... .
PROPRIETARY PRODUCTS
LTl00l, Precision OpAmp ....................................................................................
LTl001CSB, Precision OpAmp .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTl002, Dual, MatchedPrecisionOpAmp ...... ..... . .......................... ..... ..... . . .... ... . .... ..... ... . . .
LTl006, Precision, Single Supply Op Amp ..... . .... .... ........ .. ........ .... . ............. ............ . ....... ...
LTl006SB, Precision, SingleSupplyOpAmp .... .... . ........ ... ..................... ........... ........ ... . . ... . . .
LTl007, Low Noise, High Speed Precision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTl007CSIL Tl037CS, Low Noise, High Speed Precision OpAmps. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTIOOB, PicoamplnputCurrent, MicrovoltOffset, LowNoiseOpAmp .....................................................
LTlOl0, Fast ± 150mA PowerBuffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTl012, PicoamplnputCurrent, MicrovoltOffset, LowNoiseOpAmp ................... ............ .... ..................
LTlOl2SB, PicoamplnputCurrent, MicrovoltOffset, LowNoiseOpAmp...................................................
LTl013, DuaIPrecisionOpAmp...... .... . .... ... .. ... .... ......... ............ . ..... .. . .... ... . ......... .... ...
LTl013DSB, DuaIPrecisionOpAmp ..............................................................................
LTl014, QuadPrecisionOpAmp ............................................................................. ...
LTI022, High Speed, Precision JFETlnput Op Amp ..................................................................
LTI024, Dual, MatchedPicoampere, Microvoltlnput, Low Noise OpAmp .. ....... ......... . ..... .. . ... ... . .... ......... ...
LTl02B, Ultra-Low Noise Precision High Speed Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTl02BCS, Ultra-Low Noise Precision High Speed Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTl037, Low Noise, High Speed Precision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1049, Low Power Chopper Stabilized Op Amp with Internal Capacitors .................................................
LTC1050, PrecIsion Chopper Stabilized Op Amp with Internal Capacitors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC I 051, Dual Precision Chopper Stabilized Op Amp with Internal Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTCI052,ChopperStabilizedOpAmp ............................................................................
LTCI052CS, ChopperStabilizedOpAmp(CSOA TI") ••••.•••.•••• .•. .•.••.•.• .•••••.......•. . . .... .•. .•.••••.•••.•• ..•
LTl055, Precision, High Speed, JFET InputOp Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTl056, Precision, High Speed, JFETlnputOpAmp.... ....... ....... ....... .......... . ...... . . .......... ........ ....
LTI055SBILTI056SB, PreCision, High Speed, JFETlnputOpAmps............ .... ......... . .. .... . ... ..................
LTI057, Dual JFET Input Precision, High Speed Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTl057SILTl0571S, DualJFETlnputPrecision, High Speed Op Amp ..... ....... ....... ..... . .. .... . .. . ..................
LTl05B, QuadJFETlnputPrecision, High Speed Op Amp .... .... . ..... . ..... . ... .... . ... . . . . . ... . .. . . . ...... . . . ... ....
LTl077, Micropower, Single Supply, PrecisionOpAmp . ............... .............. ..... . . . .... ..... ....... . . ... ....
LTl07B, Micropower, Dual, Single Supply, PrecisionOpAmp . .... . ..... . ..... . ... . .... . . .... . .. . . .. . ....... . ... .. .. .. ..
LT1079, Micropower, Quad, Single Supply, PrecisionOpAmp ..........................................................
LTCIIOO, Precision, Single Supply, Instrumentation Amplifier (Fixed Gain = 100) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTIl 01, Precision, Micropower, Single Supply Instrumentation Amplifier (Fixed Gain = 10 or 100) ...............................
LTII02, High Speed, Precision, JFETlnputlnstrumentation Amplifier (Fixed Gain = 10 or 100) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTCI150, ± 15VChopper Stabilized Op Amp with Internal Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTlI7B, 17 p.A Max, Dual Single Supply, Precision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTlI79, 17p.AMax, Quad Single Supply, PrecisionOpAmp ................. ..........................................
2-2
2-4
2-11
2-23
2-25
2-41
2-53
2-57
2-69
2-73
2-85
2-105
2-117
2-121
2-141
2-121
2-145
2-153
2-161
2-177
2-57
13-10
2-181
13-13
2-197
2-217
2-219
2-219
2-231
2-235
2-247
2-235
13-27
2-251
2-251
13-35
13-36
13-48
13-49
2-267
2-267
TABLE OF CONTENTS
ENHANCED AND SECOND SOURCE PRODUCTS
LF155/LF355, JFET InpulOpAmp, Low Supply Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LF155A/LF355A, JFET InpulOp Amp, Low Supply Currenl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LF156/LF356, JFET InpulOp Amp, High Speed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LF156A/LF356A, JFET Input Op Amp, High Speed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LF412A, Dual Precision JFET Input Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . ..
LH2108A, Dual LM1080pAmp . ... . .. ... . .. .. . . . . . . .. . . . . ... . . .. . . . .. . .. . . . . . .. . . . . . . . . .. . . ... .... . . . .. . . . .. . ..
LM10/B(L)/C(L), Low PowerOpAmpand Reference .......................................... .
LM101A1LM301A, Uncompensated GeneralPurposeOpAmp .....................................................
LM 107ILM307, Compensated General Purpose Op Amp ..............................................................
LM108/LM308, SuperGainOpAmp ...................................... ...................... ...........
LM108A/LM308A,SuperGainOpAmp ...........................................................................
LMI18/LM318,HighSlewRateOpAmp ..........................................................................
LM318S8, High Speed OpAmp .... .............................................................................
LTlI8AILT31BA,lmprovedLMl180pAmp .......................................................................
LTC7652, Chopper-StabilizedOpAmp. .. . ...... ....... ... . . .... ... . . . ... .. .. ....... .. . ....... .... ... . . ... . . ......
OP-05, OP-05A, OP-05C, OP-05E, Internally Compensated Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . ..
OP-07, OP-07A, OP-07C, OP-07E, Precision OpAmp... . . .. ..... . ..... . . .. .. . .. .. . . . ..
. ... . .. . . . . . . . .. . .. .. ....
OP-07CS8, Precision Op Amp .......................................................
. . . . . . . . . . . . . . ..
OP-15A, OP-15B, OP-15C, OP-15E, OP-15F, OP-15G, Precision, High SpeedJFET InputOpAmp . . .
. . .. . . .. . . . . . .. . . . .. . . .. ..
OP-16A, OP-16B, OP-16C, OP-16E, OP-16F, OP-16G, Precision, High SpeedJFET InputOpAmp . . .. .
. . . . . . . . . . . . . . .. . . .. . ..
OP-27A, OP-27C, OP-27E, OP-27G, Low Noise, Precision OpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . ..
OP-37A, OP-37C, OP-37E, OP-37G, Low NOise, High Speed OpAmp . . . . .
.......................
OP-215, Dual Precision JFET InpulOp Amp .................
. . . . . . .. . . . . . .. . . . . .. . . .. . . . . . . . . . .. . . .. . . .. . ...
OP-227A, OP-227C, OP-227E, OP-227G, Dual Matched, Low NoiseOpAmp ................................................
OP-237A, OP-237C, OP-237E, OP-237G, Dual High Speed, Low NOise OpAmp ..............................................
2-271
2-271
2-271
2-271
2-275
2-279
2-281
2-297
2-297
2-303
2-303
2-311
2-319
2-311
2-197
2-321
2-329
2-337
2-341
2-341
2-345
2-345
2-275
2-357
2-357
SECTION 3-VOLTAGE REFERENCES
INDEX ..................... ..
3-2
SELECTION GUIDE .......... .
3-3
PROPRIETARY PRODUCTS
LTI1000, Ultra Precision Reference.
3-9
3-9
LTIl OOOA, Ultra Precision Reference.
LTl004, Micropower Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-17
LTl004CSB-1.2ILTl004CSB-2.5, Micropower Vollage References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-25
LTl009Series, 2.5 VoIIReference ... ............... " .......................................................... 3-27
LTl009SB, 2.5 VOIIReference... ... .. .. . .......... .... . .... . . ... . . ... . . .. .... . ... ... . ... .... .. . .... . . ... . ...... 3-31
LTl019, Precision Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-33
LTl021, Precision Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-41
LTl021DCSB, Precision Reference .............................................................................. 3-57
LTl027, Precision5VReference ............. '" ..... .... ...... ... . . . ..... ....... ..... .... . .... . .. ..... ..... .... 13-8
LTl029, 5V Bandgap Reference. . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-61
LTl031, Precision 10V Fieference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-65
LTI 034-1. 21L Tl034-2.5, Micropower Dual Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-77
LTl034CSB-l.2ILTl034CSB-2.5, Micropower Dual Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-81
LT1431, Programmable Reference ... ....... ... .... . ... ...... . .... ...... ... .... . ... ... . ... ...... ...... . ..... ..... 13-72
ENHANCED AND SECOND SOURCE PRODUCTS
LH0070, Precision 10V Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-65
LM129/LM329, 6.9V Precision Voltage Reference. . . . . . . . . . . . . ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-83
6
TABLE OF CONTENTS
LM134 Series, Constant Current Source and Temperature Sensor ..
LM334S8, Constant Current Source and Temperature Sensor.
LM136-2.5/LM336-2.5, 2.5 Volt Reference.
LM185-1.2/LM385-1.2, MicropowerVoltage Reference ...
LM185-2.5/LM385-2.5, MicropowerVoltage Reference
LM385S8-1.2/LM385S8-2.5, MicropowerVoltage Reference
LM199/LM399/LM199A/LM399A, Precision Reference.
LT580, Precision Reference . ... .
LT581, Precision Reference . ...... .
REF-01 IREF-02, Precision Voltage References ...
3-87
3-99
3-101
3-105
3-109
3-113
3-115
3-121
3-121
3-125
SECTION 4-VOLTAGE REGULATORS
INDEX
SELECTION GUIOE ....
PROPRIETARY PRODUCTS
LT1003, 5 Volt, 5 Amp Voltage Regulator .
LT1005, Logic Controlled Regulator . ..
LT/ 020, Micropower Regulator and Comparator.
LTI 020CS, Micropower Regulator and Comparator .
LT1033, 3A Negative Adjustable Regulator . ...................... .
LT/ 035, Logic Controlled Regulator . .. .
LT1036, Logic Controlled Regulator . ..... .
LT/ 038, to Amp Positive Adjustable Voltage Regulator.
LT1083, 1.5A Low Dropout Positive Adjustable Regulator.
LT/ 083-5, 7.5A Low Dropout Positive Fixed 5V Regulator ..
LT/ 083-12, 7.5A Low Dropout Positive Fixed 12V Regulator . ..
LT/084, 5A Low Dropout PositiveAdjustable Regulator.
LTI084-5, 5A Low Dropout Positive Fixed 5V Regulator ..
LT/ 084-12, 5A Low Dropout Positive Fixed 12V Regulator . .. .
LT/ 085, 3A Low Dropout Positive Adjustable Regulator . . .
LT/ 085-5, 3A Low Dropout Positive Fixed 5V Regulator
LTI085-12, 3A Low Dropout Positive Fixed 12V Regulator . ..
LT/ 086, 1.5A Low Dropout Positive Adjustable Regulator.
LTI086-5, 1. 5A Low Dropout Positive Fixed 5V Regulator ..
LTI086-12, 1.5A Low Dropout Positive Fixed 12V Regulator . ..
LT/ 087 Adjustable Low Dropout Regulator with Kelvin-Sense Inputs . .. .
LT/120, Micropower Regulator with Comparator and Shutdown ......... .
ENHANCED AND SECOND SOURCE PRODUCTS
LM117/LM317, Positive Adjustable Regulator ..
LT/11A1LT317A, ImprovedLMI17 ..................... .
LM 117HVILM317HV, High Voltage Positive Adjustable Regulator .
LT/17AHVILT317AHV, ImprovedLMI17HV ...
LM123/LM323, 5 Volt, 3AmpReguiator .
LT123AILT323A, Improved LM123 . ............................. .
LM137/LM337, Negative Adjustable Regulator ..
LT137AILT331A, Improved LM131 . ........ .
LM137HV ILM337HV, High Voltage Negative Adjustable Regulator.
LTI37AHVILT331AHV, ImprovedLMI31HV ..
LM 138/LM338, 5 Amp Positive Adjustable Regulator.
4-2
4-3
4-9
4-17
4-29
4-45
4-49
4-57
4-69
4-77
4-89
4-101
4-101
4-89
4-101
4-101
4-89
4-101
4-101
4-113
4-113
4-113
13-28
4-125
.....
4-137
4-137
4-145
4-145
4-149
4-149
4-157
4-157
4-165
4-165
4-169
7
TABLE OF CONTENTS
LT138AILT338A, Improved LM138. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-169
LM150/LM350, 3Amp Positive Adjuslable Regulator ........................ " ... ... . ... ... .. . . .. . .. ..... . . . ... . .. . .. 4-177
LTl50AlLT350A, ImprovedLMI50 .............................................................................. 4-177
SECTION 5-SWITCHING REGULATORS AND VOLTAGE CONVERTERS
INDEX .................................................................................................... .
PROPRIETARY PRODUCTS
LTI026, Voltage Conver1er . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTCI04417660, Switched Capacitor Voltage Conver1er . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTCI044CS8, Switched Capacitor Voltage Converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTI054, Switched Capacitor Voltage Conver1erwith Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTl054CSIL TI 0541S, Switched Capacitor Voltage Conver1er with Regulator ...............................................
LTI070, 5A High Efficiency Switching Regulator . .. . .. . .. . . . . . .. . . . . . .. . . . .. . . . . .. .. . . .. . ... .......................
LTI 071, 2.5A High Efficiency Switching Regulator . .................... ' .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTI072, 1.25AHighEfficiencySwitchingRegulator..................................................................
LTI074, Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1170, 5A High Efficiency 100kHz Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTI171, 2.5A High Efficiency 100kHz Switching Regulator ............................................................
LT1172, 1.25A High Efficiency 100kHz Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ENHANCED AND SECOND SOURCE PRODUCTS
SG1524/SG3524, Regulating Pulse Width Modulators.. . .. . . . . . .. . . . ... . .. . . . .. . .. .. . . . . . . . .. . .. . . .. . . . . . ... . . ... . . . .
SG3524S, Regulating Pulse Width Modulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT15241LT3524, Regulating Pulse Width Modulators ................................................................
SG1525A/SG3525A, Regulating Pulse Width Modulators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTl525AILT3525A, Regulating Pulse Width Modulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTl5261LT3526, Regulating Pulse Width Modulators ................................................................
SG1527A/SG3527A, Regulating Pulse Width Modulators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTl527A1LT3527A, Regulating Pulse Width Modulators .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT18461LT1847, Current Mode PWM Controller ....................................................................
LT38461LT3847, Current Mode PWM Controller ................................................................... .
5-2
5-3
5-9
5-21
5-23
5-35
5-37
5-37
5-49
13-21
5-61
5-61
5-73
5-85
5-93
5-85
5-97
5-97
5-105
5-97
5-97
5-113
5-113
SECTION 6-COMPARATORS
INDEX ............... .
SELECTION GUIDE .............. .
PROPRIETARY PRODUCTS
LT685, High Speed Comparator.
LTIOII, Voltage Comparator . ...
LTIOI5, High Speed DualLine Receiver . .......................................................................... .
LTIOI6, Ultra Fast PreciSion Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTIOI6CS8, Ultra Fast Precision Comparator ........................................................................
LTIOI7, Micropower Dual Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTlOI8, MicropowerDuaIComparator .............................................................................
LTl017CSILTlOI8CS, MicropowerDualComparator .................................................................
LTC1040, Dual Micropower Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1041, BANG-BANG Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1042, Window Comparator ...................................... .
ENHANCED AND SECOND SOURCE PRODUCTS
LM 111 ILM311, Voltage Comparator ...... .
LTlllAILT311A, ImprovedLMlll ........ .
8
6-2
6-3
6-5
6-9
13-6
6-25
6-41
6-45
6-45
6-53
6-57
6-69
6-77
6-85
6-85
TABLE OF CONTENTS
LM119/LM319, Dual Comparator ...................................... .
LTll9AILT319A,lmproved LM119 . ....................................... .
6-93
6-93
SECTION 7-FILTERS
INDEX ................................................................. .
7-2
PROPRIETARY PRODUCTS
LTC1059, High Performance Switched Capacitor Universal Filter ....................... .
LTC1059CS, High Performance Switched Capacitor Universal Filter. .
. ......... .
LTC1060, Universal Dual Filter Building Block . ................................................... .
LTC1060CS, Universal Dual Filter Building Block ................................ .
LTC1061, High Performance Triple Universal Filter Building Block ....... .
LTC1061CS, High Performance Triple Universal Filter Building Block ...... .
LTC1062, 5th Order Low Pass Filter. . . . . . . . . . . . .. . .................. .
LTC1062CS, 5th Order Low Pass Filter . ................................ .
LTC1064, Low NOise, Fast, Quad Universal Filter Building Block . ......... .
LTC1064-1, Low Noise, 8th Order, Clock Sweepable Elliptic Lowpass Filter . ...... .
LTC1064-2, Low Noise, High Frequency 8th Order Butterworth Lowpass Filter . . .
LTC1064-3, Low Noise, High Frequency 8th Order Linear Phase Lowpass Filter . .. .
LTC1064-4, Low Noise, 8th Order, Clock Sweepable Cauer Lowpass Filter ..
7-3
7-11
7-15
7-35
7-39
7-55
7-59
7-71
7-73
7-89
13-15
13-19
13-20
SECTION 8-INSTRUMENTATION AMPLIFIERS
8-2
INDEX ................................................. .
PROPRIETARY PRODUCTS
LTC1043, Dual/nstrumentation Swilched-CapacitorBuilding Block ................. .
LTCll00, Precision, Single Supply, Instrumentation Amplifier (Fixed Gain = 100) ....
. ......... .
LTIl D1, Precision, Micropower, Single Supply Instrumentation Amplifier (Fixed Gain = 10 or 100)
LTll02, High Speed, JFET Inputlnstrumentation Amplifier (Fixed Gain = 100r 100) . ....
11-15
13-35
13-36
13-48
SECTION 9-DATA CONVERSION
INDEX ................................. .
SELECTION GUIDE ......................... .
PROPRIETARY PRODUCTS
LTC1090, Single Chip 10-Bit Data Acquisition System ....... .
LTC1091, I-Channel, 10-Bit Serial/lO Data Acquisition System ..
LTC1092, 2-Channel, 10-Bit Serial/IO Data Acquisition System . . .
LTC1093, 6-Channel, 10-Bit Serial 110 Oata Acquisition System . ... .
LTC1094,8-Channel, 10-Bit Serial 110 Data Acquisition System.
LTC1095, Complete 10-Bit Data Acquisition System with On Board Reference ....
LTC1099, High Speed 8-Bit AID Converter with Built-In Sample-and-Hold
LTC1290, Single Chip 12-BitDataAcquisition System ......... .
LTC 1291 , I-Channel, 12-Bit Serial/IO Data Acquisition System
LTC1292, 2-Channel, 12-Bit Serial/IO Data Acquisition System ................. .
LTC1293, 6-Channel, 12-Bit Serial/IO Data Acquisition System . . . .
. ......... .
LTC1294, 8-Channel, 12-Bit Serial/lO Data Acquisition System . . . .
. ........ .
SECOND SOURCE PRODUCTS
LF198A/LF398A, Precision Sample and Hold Amplifier .
LF198/LF398, Precision Sample and Hold Amplifier .... .
LF398S8, Precision Sample and Hold Amplifier ........... .
9-2
9-3
...
9-5
9-29
9-29
9-29
9-29
9-57
9-81
13-62
13-70
13-70
13-70
13-70
9-97
9-97
9-113
9
TABLE OF CONTENTS
SECTION 10-RS2321INTERFACE
INDEX .................................................................................................... .
SELECTION GUIDE ......................................................... .
10-2
10-3
PROPRIETARY PRODUCTS
LTlOI5, High Speed DualLine Receiver . ......................................................................... .
LTl030, Quad Low Power Line Driver . ........................................................................... .
LTl030CS, Quad Low Power Line Driver ......................................................................... .
LTl032, Quad Low Power Line Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTl039, RS232 DriverIReceiver with Shutdown ............................................................ .
LTC1045, Programmable Micropower Hex TranslatorlReceiverIDriver. . .
. .......................................... .
LT1080, Advanced Low Power 5V RS232 Dual DriverIReceiver . ........................................................ .
LTI 081, Advanced Low Power 5V RS232 Dual DriverIReceiver . ........................................................ .
LTI 080CSIL TI 081 CS, 5V Powered RS232 DriverIReceiver with Shutdown . ............................... .
LT/130, 5-Driver15-Receiver RS232 Transceiver . ........ .
LT1131, 5-Driver14-Receiver RS232 Transceiver with Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT/132, 5-Driver13-Receiver RS232 Transceiver . .................................................................. .
LT/133, 3-Driver15-Receiver RS232 Transceiver . .................................................................. .
LT1134, 4-Driver14-Receiver RS232 Transceiver . ........ .
LT/135, 5-Driver13-Receiver RS232 Transceiver without Charge Pump .................................................. .
LT/136, 4-Driver15-Receiver RS232 Transceiver with Shutdown ....................................................... .
LTl137, 3-DriverI5-Receiver RS232 Transceiver with Shutdown . ..... .
LTl138, 5-Driver13-Receiver RS232 Transceiver with Shutdown ... .
LTl139, 4-Driver14-Receiver RS232 Transceiver with Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTl140, 5·Driver13-Receiver RS232 Transceiver without Charge Pump .....
LT/141, 3-Driver15-Receiver RS232 Transceiver without Charge Pump .................................................. .
LTl180, Advanced Low Power 5V RS232 Dual DriverIReceiver with Small Capacitors ........................................ .
LTl181, Advanced Low Power 5V RS232 Dual DriverIReceiver with Small Capacitors ........................................ .
LT/280, Advanced Low Power 5V RS232 Dual DriverIReceiver. . . . . . . . . . . . . . . .. . ...................................... .
LT/281, Advanced Low Power 5V RS232 Dual DriverIReceiver . ........................................................ .
13-6
10-5
10-9
10-11
10-19
10-27
10-43
10-43
10-51
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-67
10-67
10-75
10-75
SECTION 11-SPECIAL FUNCTION
INDEX ..................... .
PROPRIETARY PRODUCTS
LTKOOI, Thermocouple Cold Junction Compensator and Matched Amplifier. . . . . . . . . .
.........................
LTC201, Quad CMOS SPST Low Charge Injection Analog Switch. . . . . . . . . . .
...............
LT1025, Micropower Thermocouple Cold Junction Compensator. . . . . . . . . . . . . . . . . .
..................
LTC1043, Dual Precision Instrumentation Switched-Capacitor Building Block . . . . . . . . . . . . . . .
. . . . . . . . ..
LTCI 043CS, Dual Precision Instrumentation SWitched-Capacitor Building Block. . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . ..
LTl088, Wideband RMS-DC Converter Building Block. .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTt089, High Side Switch ...............
.............................. ...........................
LT1188, 1.5A High Side Switch .
11-2
11-3
13-3
11-7
11-15
11-31
11-33
11-45
13-55
SECTION 12-MILITARY PRODUCTS
INDEX .................... .
MIl/JAN Products ...................... .
Standard Military Drawings .............. .
Hi-Rel...............
. ............. .
MIL-STO-883 Product ............... .
MIL-M-38510 Class BFlow ................ .
10
12-2
12-3
12-4
12-4
12-4
12-6
TABLE OF CONTENTS
MIL-M-38510Class S Flow ............................................ .
Military Sampling Plan ......................... .
MIL-STO-883 Test Methods ...................... .
Military Parts List ....................... ..
12-7
12-8
12-9
12-13
SECTION 13-NEW PRODUCTS
INDEX ....................... .
PROPRIETARY PRODUCTS
LTC201, Quad CMOS SPST Low Charge Injection Analog Switch.
LTl015, High Speed Dual Line Receiver . ............................. .
LTl027, Precision 5V Reference ................................. .
LTC1049, Low Power Chopper Stabilized Op Amp with Internal Capacitors .. .
LTC1051, Dual Precision Chopper Stabilized Op Amp with Internal Capacitors.
LTC1064-2, Low NOise, High Frequency Bth Order Butterworth Lowpass Filter
LTC 1064-3, Low Noise, High Frequency Bth Order Linear Phase Lowpass Filter . ..
LTC1064-4, Low Noise, Bth Order, Clock Sweepable Cauer Lowpass Filter . ..
LTl074, Switching Regulator . . .. . .. . . . . . . .. . .. . . . . . . . . .. . .. .. . .. .
. .......... .
LTl077, Micropower, Single Supply, PrecisionOpAmp ............ .
LTI OB7, Adjustable Low Dropout Regulator with Kelvin-Sense Inputs ................... .
LTCll00, Precision, SingleSupply,lnstrumentationAmplifier(FixedGain= 100) . . .
LTll0l, Precision, Micropower, Single Supply Instrumentation Amplifier (Fixed Gain = 100r 100) .
LTll02, High Speed, Precision, JFET Inputlnstrumentation Amplifier (Fixed Gain = 10 or 100) ........... .
LTC1150, ± 15V Chopper Stabilized Op Amp with Internal Capacitors . .............. .
LT11BB, 1.5A High Side Switch .................................................. .
LTC1290, Single Chip 12-8it Data Acquisition System ................................. .
LTC1291, I-Channel, 12-8it Seria/l/O Data Acquisition System .. .
LTC1292, 2-Channel, 12-8it Serial/fO Data Acquisition System .
LTCl293,6-Channel, 12-8it Serial/fO Data Acquisition System ..
LTC1294, B-Channel, 12-8it Serial/fO Data Acquisition System . ..
LTl431, Programmable Reference . ............ .
13-2
13-3
13-6
13-8
13-10
13-13
13-15
13-19
13-20
13-21
13-27
13-28
13-35
13-36
13-48
13-49
13-55
13-62
13-70
13-70
13-70
13-70
13-72
SECTION 14-PACKAGE DIMENSIONS
INDEX ......................................................... .
Package Cross Reference ................................................. .
Package Dimensions ....... .
14-2
14-3
14-5
SECTION 15-APPENDICES
INDEX ........................................ .
Introduction to Quality and Reliability Assurance Programs ....... .
Reliability Assurance Program ............................. .
Quality Assurance Program .................................................... .
~~
............................................. .
ESD Protection Program ................................ .
Surface Mount Products ................................................ .
Surface Mount Parts List .................................................. .
Dice Products .................................................................. .
Application Notes Index ........................................................... .
15-2
15-3
15-5
15-13
15-21
15-23
15-35
15-43
15-45
15-47
11
ALPHANUMERIC INDEX
Extended Temperature Range-200°C Products. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 13-74
JM38510/10104BCA, LM108AJSuperGainOpAmp ................................................. 2-303
JM38510/10104BGA, LM108AH Super Gain OpAmp. . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . .. 2-303
JM38510/10104BGC, LM108AH SuperGainOpAmp ............ '" .. . . ...... . . ........ . ... ...... . ... 2-303
JM38510/10104BPA, LM108AJ8SuperGainOpAmp ................................................ 2-303
JM38510/10106BEA, LH2108AD Super Gain OpAmp ., . . . . . ............... ..... .. .. . .... .. ........ .. 2-279
JM38510/10107BGA, LM118H High Slew Rate OpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . .. 2-311
JM38510/10107BGC, LM118H High Slew Rate OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-311
JM38510/10107BPA, LMll8J8HighSlewRateOpAmp .............................................. 2-311
JM38510/11401 BGA, LF155H High PerformanceJFET InputOpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-271
JM38510/11401BGC, LF155H High PerformanceJFET InputOpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-271
JM38510/11401BPA, LF155J8 High Performance JFETlnput Op Amp .................................... 2-271
JM38510/11402BGA, LF156H High Speed JFET InputOp Amp ......................................... 2-271
JM38510/11402BGC, LF156H High Speed JFET InputOpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-271
JM3851O/11402BPA, LF156J8 High SpeedJFET InputOpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-271
JM38510/11404BGA, LF155AH High PerformanceJFET InputOp Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-271
JM38510/11404BGC, LF155AH High PerformanceJFET InputOpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-271
JM38510/11405BGA, LF156AH High Speed JFET Input Op Amp ........................................ 2-271
JM38510/11405BGC, LF156AH High Speed JFETlnput Op Amp ........................................ 2-271
JM38510/11405BPA, LF156AJ8HighSpeedJFETInputOpAmp ........................................ 2-271
JM38510/11703BXA, LM117H Adjustable Positive Voltage Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-137
JM38510/11703BXC, LMl17H Adjustable Positive Voltage Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-137
JM38510/11704BYA, LM 117K Adjustable Positive Voltage Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-137
JM38510/11706BYA, LM138KAdjustabie Positive Voltage Regulator ..................................... 4-169
JM38510/11803BXA, LM137H Adjustable Negative Voltage Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-157
JM38510/11803BXC, LM137H Adjustable Negative Voltage Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-157
JM38510/11804BYA, LM137KAdjustabie Negative Voltage Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-157
JM38510/12501 BGA, LF198H Sample and Hold Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-97
JM38510/12501 BGC, LF198H Sample and Hold Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-97
JM38510/13501BGA,OP07AHPrecisionOpAmp ................................................... 2-329
JM38510/13501BGC,OP07AHPrecisionOpAmp ................................................... 2-329
JM38510/13501BPA, OP07AJ8 Precision OpAmp . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-329
JM3851 0/ 13502BGA, OP07H Precision Op Amp .................................................... 2-329
JM38510/13502BGC, OP07H Precision Op Amp .................................................... 2-329
JM3851 O/13502BPA, OP07J8 Precision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-329
JM38510/13503BGA, OP27AH Low NOise, Precision OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-345
JM3851 O/13503BGC, OP27AH Low NOise, PreCision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-345
JM3851 O/13503BPA, OP27AJ8 Low NOise, Precision Op Amp ...... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-345
LF155, JFET Input Op Amp, Low Supply Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . .. 2-271
LF155A, JFETlnput Op Amp, Low Supply Current ................................................... 2-271
LF156, JFET Input Op Amp, High Speed .............................................. ; . . . . .. . .. . .. 2-271
LF156A, JFET InputOp Amp, High Speed. . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . .. 2-271
LF198, PreCision Sample and Hold Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-97
12
ALPHANUMERIC INDEX
LF198A, Precision Sample and Hold Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LF355, JFETlnput Op Amp, Low Supply Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LF355A, JFET Input Op Amp, Low Supply Current ...................................................
LF356, JFET Input OpAmp, High Speed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LF356A, JFET Input Op Amp, High Speed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LF398, Precision Sample and Hold Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LF398A, Precision Sample and Hold Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LF412C, Dual Precision JFET Input Op Amp ........................................................
LF412M, Dual Precision JFET Input Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LF412AC, Dual Precision JFET Input Op Amp .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LF412AM, Dual Precision JFET Input Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LH0070-0, 10V, 3-Lead Trimmed Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH0070-1, 1OV, 3-Lead Trimmed Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH0070-2, 1OV, 3-Lead Trimmed Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LH2108, Dual Super Beta OpAmp ...............................................................
LH2108A, Dual Super Beta Op Amp ..............................................................
LM10, Low PowerOpAmpand Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM10B, Low PowerOp Amp and Reference ........................................................
LM10BL, Low PowerOp Amp and Reference .......................................................
LM 1OC, Low Power Op Amp and Reference ........................................................
LM10CL, Low PowerOpAmpand Reference .......................................................
LM101A, Uncompensated General Purpose OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM 107, Compensated General Purpose Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM 108, Super Gain Op Amp ...................................................................
LM 108A, Super Gain Op Amp ..................................................................
LM 111 , Voltage Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM 117, Positive Adjustable Regulator ...... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM 117HV, High Voltage Positive Adjustable Regulator ............ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM118, High Slew Rate OpAmp ................................................................
LM119, Dual Comparator ..... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM 123, 5 Volt, 3 Amp Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM129A, 6.9 Volt Precision Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM 129B, 6.9 Volt Precision Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM 129C, 6.9 Volt Precision Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM 134, Constant Current Source and Temperature Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM136,2.5VoltVoltageReference ..............................................................
LM136A, 2.5 Volt Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM 137, Negative Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM 137HV, High Voltage Negative Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM 138, 5 Amp Positive Adjustable Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM150, 3Amp Positive Adjustable Regulator ............-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM185, MicropowerVoltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM 199, Precision Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
..L7~
9-97
2-271
2-271
2-271
2-271
9-97
9-97
2-275
2-275
2-275
2-275
3-65
3-65
3-65
2-279
2-279
2-281
2-281
2-281
2-281
2-281
2-297
2-297
2-303
2-303
6-85
4-137
4-145
2-311
6-93
4-149
3-83
3-83
3-83
3-87
3-101
3-101
4-157
4-165
4-169
4-177
3-105
3-115
13
ALPHANUMERIC INDEX
LM 199A, Precision Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM234, Constant Current Source and Temperature Sensor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM301 A, Uncompensated General Purpose Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM307, Compensated General Purpose Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM308, Super Gain Op Amp ...................................................................
LM308A, Super Gain Op Amp ..................................................................
LM311A, Voltage Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM317, Positive Adjustable Regulator .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM317HV, High Voltage Positive Adjustable Regulator ................................................
LM318, High Slew Rate Op Amp ................................................................
LM318A, High Slew RateOpAmp ...............................................................
LM319, Dual Comparator .....................................................................
LM323, 5 Volt, 3 Amp Regulator ................................................................
LM329A, 6.9 Volt Precision Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM329B, 6.9 Volt Precision Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM329C, 6.9 Volt Precision Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM329D, 6.9 Volt Precision Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM334, Constant Current Source and Temperature Sensor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM336,2.5VoltVoltageReference ..............................................................
LM336B, 2.5 Volt Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM337, Negative Adjustable Regulator ..................................... , . . . . . . . . . . . . . . . . . . . . ..
LM337HV, High Voltage Negative Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM338, 5Amp Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM350, 3Amp Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM385, Micropower Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM385B, MicropowerVoltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM399, Precision Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM399A, Precision Reference.. . . .. . ........................... . . . . .. . .. .. .. ....... . ..... . . . ...
LT111A, High Performance Voltage Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT117A, Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT117AHV, High Voltage Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT118A, High Slew Rate Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT119A, High Speed Dual Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT123A,5Volt,3AmpRegulator ................................................................
LT137A, Negative Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT137AHV, High Voltage Negative Adjustable Regulator ...............................................
LT138A, 5Amp Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT150A, 3 Amp Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT311A, High Performance Voltage Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT317A, Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT317AHV, High Voltage Positive Adjustable Regulator .......................... , . . . . . . . . . . . . . . . . . . . ..
LT318A, High Slew RateOpAmp ................................................................
LT319A, High Speed Dual Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
3-115
3-87
2-297
2-297
2-303
2-303
6-85
4-137
4-145
2-311
2-311
6-93
4-149
3-83
3-83
3-83
3-83
3-87
3-101
3-101
4-157
4-165
4-169
4-177
3-105
3-105
3-115
3-115
6-85
4-137
4-145
2-311
6-93
4-149
4-157
4-165
4-169
4-177
6-85
4-137
4-145
2-311
6-93
ALPHANUMERIC INDEX
LT323A, 5 Volt, 3Amp Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . ..
LT337A, Negative Adjustable Regulator ...........................................................
LT337AHV, High Voltage Negative Adjustable Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT338A, 5 Amp Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT350A, 3 Amp Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . ..
LT580J, Precision 2.5V 3 Terminal Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . ..
LT580K, Precision 2.5V 3 Terminal Reference ......................................................
LT580L, Precision 2.5V 3 Terminal Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT580M, Precision 2.5V 3 Terminal Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . ..
LT580S, Precision 2.5V 3 Terminal Reference ......................................................
LT580T, Precision 2.5V 3 Terminal Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . .. . . . . . . . . ..
LT580U, Precision 2.5V 3 Terminal Reference ......................................................
LT581J, Precision 10V 3 Terminal Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT581 K, Precision 1OV 3 Terminal Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT581S,Precision10V3TerminaIReference .......................................................
LT581T,Precision10V3TerminaIReference .......................................................
LT581U, Precision 10V3Terminai Reference..... . . ................... ..... . . ..... . . ...... . . .. .....
LT685C, High Speed Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT685M, High Speed Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1001AC, Precision Op Amp . ... . .. . .. ... .. . ..................... ....... .. ........ ..... . . .... .
LT1001AM, PrecisionOpAmp..................................................................
LT1001C, PrecisionOpAmp ..... '" ......... .......... .................. .......... ... .... .....
LT1 001 M, Precision Op Amp. . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . .
LT1 002AC, Dual, Matched Precision Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 002AM, Dual, Matched Precision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . .
LT1 002C, Dual, Matched Precision Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . .
LT1002M, Dual, Matched Precision OpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . .
LT1003C, 5 Volt, 5Amp Voltage Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 003M, 5 Volt, 5Amp Voltage Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1004C, MicropowerVoltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1004M, MicropowerVoltageReference .........................................................
LT1 005C, Logic Controlled Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 005M, Logic Controlled Regulator ............................................................
LT1 006AC, Precision, Single Supply Op Amp . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1006AM, Precision, Single SupplyOpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .. . . . . .. . . . . .
LT1006C, Precision, Single Supply Op Amp .. ....... . ...................... ...... .... . ...... .. .....
LT1006M, Precision, Single SupplyOpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . .
LT1007AC, Low NOise, High Speed Precision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . .
LT1 007AM, Low NOise, High Speed Precision Op Amp ................... .. . . . . . . . . . . . . . . .. . . . . . . . . . . .
LT1007C, Low NOise, High Speed Precision OpAmp . . . . . . . . . . .. .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 007M, Low NOise, High Speed Precision Op Amp .................................................
LT1 008C, Picoamp Input Current, Microvolt Offset Low Noise Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 008M, Picoamp Input Current, Microvolt Offset Low Noise Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.L7~
4-149
4-157
4-165
4-169
4-177
3-121
3-121
3-121
3-121
3-121
3-121
3-121
3-121
3-121
3-121
3-121
3-121
6-5
6-5
2-11
2-11
2-11
2-11
2-25
2-25
2-25
2-25
4-9
4-9
3-17
3-17
4-17
4-17
2-41
2-41
2-41
2-41
2-57
2-57
2-57
2-57
2-73
2-73
15
ALPHANUMERIC INDEX
LT1009C, 2.5 Volt Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1009M,2.5VoltReference ..................................................................
LT1010C, Fast ±150mAPowerBuffer.............. . ..... .......... . .... ........... ......... .....
LT1010M, Fast ±150mAPowerBuffer ...........................................................
LT1011AC, Voltage Comparator ......... .. . ........ . . ....... .... ......... . .. . ...... .............
LT1011AM, Voltage Comparator .......... . ........ . . ....... .............. .. . . ............. .....
LT1011C, Voltage Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . .
LT1 011 M, Voltage Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1012AC, Picoamp Input Current, Microvolt Offset Low NOiseOpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1012AM, Picoamp Input Current, Microvolt Offset Low Noise OpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1012C, Picoamp Input Current, Microvolt Offset Low Noise OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1012M, Picoamp Input Current, Microvolt Offset Low Noise OpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1013AC, Dual Precision OpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 013AM, Dual Precision Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1013C, Dual PrecisionOpAmp................ . .. .... . .............. ......... .... .... .........
LT1013D, Dual Precision OpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 013M, Dual Precision Op Amp ............ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1014AC, Quad Precision OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1014AM, Quad Precision OpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1014C, Quad Precision OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1014D, Quad Precision OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 014M, Quad Precision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1015C, High Speed Dual Line Receiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 015M, High Speed Dual Line Receiver ......... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 016C, Ultra Fast Precision Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 016M, Ultra Fast Precision Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 017C, Micropower Dual Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 017M, Micropower Dual Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1018C, MicropowerDuaIComparator...........................................................
LT1018M, Micropower Dual Comparator . ......... ....... ...... ........... . .. ...... ...............
LT1019AC, Precision Reference.......... .. ....... ....................... .. ............. . ... ....
LT1 019AM, Precision Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1019C, Precision Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 019M, Precision Reference ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 020C, Micropower Regulator and Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 020M, Micropower Regulator and Comparator .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1021BC, Precision Reference................ ..... ..... . ... ....................... ............
LT1 021 BM, Precision Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1021CC, Precision Reference............. .. ..... ........................ .....................
LT1 021 CM, Precision Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT10210C, Precision Reference............. ....... ..... .................................... ....
LT1 021 OM, Precision Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1022AC, High Speed, PrecisionJFETlnputOpAmp ................................................
16
3-27
3-27
2-85
2-85
6-9
6-9
6-9
6-9
2-105
2-105
2-105
2-105
2-121
2-121
2-121
2-121
2-121
2-121
2-121
2-121
2-121
2-121
13-6
13-6
6-25
6-25
6-45
6-45
6-45
6-45
3-33
3-33
3-33
3-33
4-29
4-29
3-41
3-41
3-41
3-41
3-41
3-41
2-145
ALPHANUMERIC INDEX
LT1022AM, High Speed, PrecisionJFET InputOpAmp . . . . . . . . . . . . . . . . .. . . .. . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1022C, High Speed, Precision JFET InputOpAmp .................................................
LT1022M, High Speed, PrecisionJFETlnputOpAmp ... . ..... .... .. . . .. .. ........ .... . . . . ... .... . ....
LT1024AC, Dual, Matched Picoampere, Microvolt Input, Low NoiseOp Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1024AM, Dual, Matched Picoampere, Microvolt Input, Low Noise OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1024C, Dual, Matched Picoampere, Microvolt Input, Low Noise Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1024M, Dual, Matched Picoampere, Microvolt Input, Low Noise Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1025AC, Micropower Thermocouple Cold Junction Compensator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1025AM, Micropower Thermocouple Cold Junction Compensator ......................................
LT1 025C, Micropower Thermocouple Cold Junction Compensator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 025M, Micropower Thermocouple Cold Junction Compensator .......................................
LT1026C, Voltage Converter .... . . . .... ... ........................ .... .... . .. . ... . .... .... . .. . .
LT1 026M, Voltage Converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1027BC, Precision 5 Volt Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 027BM, Precision 5 Volt Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1027CC, Precision 5Volt Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 027CM, Precision 5 Volt Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1028AC, Ultra-Low NOise Precision High Speed OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1028AM, Ultra-Low NOise Precision High Speed OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1028C, Ultra-Low Noise Precision High Speed OpAmp ................. . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1028M, Ultra-Low Noise Precision High Speed OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 029AC, 5 Volt Bandgap Reference .......... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 029AM, 5 Volt Bandgap Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 029C, 5 Volt Bandgap Reference .............................................................
LT1 029M, 5 Volt Bandgap Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1030C, Quad Low Power Line Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 030M, Quad Low Power Line Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1031BC, Precision 10Volt Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1031BM, Precision 10VoltReference ................................. '" . ........ ... . . ... .... ..
LT1 031 CC, Precision 10 Volt Reference ........................................... '. . . . .. . . .. . . . . . .
LT1031CM, Precision 10 Volt Reference. . . . . . . . . .. .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . .
LT1031DC, Precision 10VoitReference . . ......... .. .... . . . . ............ .. . . ......... .... . ........
LT1 031 DM, Precision 10 Volt Reference. . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . .. . . . . . . . . . . .
LT1032C, Quad Low Power Line Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1032M,QuadLowPowerLineDriver ...........................................................
LT1 033C, 3 Amp Negative Adjustable Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 033M, 3 Amp Negative Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 034BC, Micropower Dual Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1034BM, Micropower Dual Reference ..........................................................
LT1034C, Micropower Dual Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . .
LT1034M, Micropower Dual Reference ...........................................................
LT1035C, Logic Controlled Regulator......... .... . . ........ .... .... ...... . ......... .... . . ....... .
LT1 035M, Logic Controlled Regulator ............................................................
.L7~
2-145
2-145
2-145
2-153
2-153
2-153
2-153
11-7
11-7
11-7
11-7
5-3
5-3
13-8
13-8
13-8
13-8
2-161
2-161
2-161
2-161
3-61
3-61
3-61
3-61
10-5
10-5
3-65
3-65
3-65
3-65
3-65
3-65
10-11
10-11
4-49
4-49
3-77
3-77
3-77
3-77
4-57
4-57
17
ALPHANUMERIC INDEX
LT1 036C, Logic Controlled Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 036M, Logic Controlled Regulator ............................................................
LT1037AC, Low Noise, High Speed Precision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1037AM, Low NOise, High Speed Precision OpAmp ................................................
LT1037C, Low NOise, High Speed Precision OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1037M, Low Noise, High Speed Precision OpAmp .................................................
LT1 038C, 10 Amp Positive Adjustable Voltage Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 038M, 10 Amp Positive Adjustable Voltage Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1039C, RS232 Driver/Receiverwith Shutdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 039M, RS232 DriverIReceiver with Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 054C, Switched Capacitor Voltage Converter with Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 054M, Switched Capacitor Voltage Converter with Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1055AC, Precision, High Speed JFET InputOpAmp ................................................
LT1055AM, Precision, High Speed JFET InputOpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1055C, Precision, High Speed JFET InputOpAmp .................................................
LT1055M, Precision, High Speed JFETlnputOp Amp .................................................
LT1056AC, Precision, High Speed JFET InputOpAmp ................................................
LT1056AM, Precision, HighSpeedJFETlnputOpAmp ................................................
LT1056C, Precision, High Speed JFET InputOpAmp .................................................
LT1056M, Precision, HighSpeedJFETlnputOpAmp .................................................
LT1057AC, Dual JFET Input Precision, High Speed OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1057AM, Dual JFET Input Precision, High Speed Op Amp ............................................
LT1 057C, Dual JFET Input Precision, High Speed Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1057M, Dual JFET Input Precision, High Speed Op Amp .............................................
LT1058AC, QuadJFET Input Precision, High Speed OpAmp ............... . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1058AM, Quad JFET Input Precision, High Speed OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1058C, QuadJFET Input Precision, High Speed OpAmp ....... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1058M, QuadJFET Input Precision, High Speed OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 070C, 5A High Efficiency Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 070HVC, 5A High Efficiency Switching Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 070HVM, 5A High Efficiency Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 070M, 5A High Efficiency Switching Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1071C, 2.5A High Efficiency Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 071 HVC, 2.5A High Efficiency Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 071 HVM, 2. 5A High Efficiency Switching Regulator .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1071 M, 2.5A High Efficiency Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1072C, 1.25A High Efficiency Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 072HVC, 1. 25A High Efficiency Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1072HVM, 1.25A High Efficiency Switching Regulator. . . . . . . . . . . . . . .. . . .. . . . . . . . . . . . . . . . . . . . . . . . .. .
LT1 072M, 1. 25A High Efficiency Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 074C, Switching Regulator .... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1074HVC, Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
LT1074HVM, Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
18
4-69
4-69
2-57
2-57
2-57
2-57
4-77
4-77
10-19
10-19
5-23
5-23
2-219
2-219
2-219
2-219
2-219
2-219
2-219
2-219
2-235
2-235
2-235
2-235
2-235
2-235
2-235
2-235
5-37
5-37
5-37
5-37
5-37
5-37
5-37
5-37
5-49
5-49
5-49
5-49
13-21
13-21
13-21
ALPHANUMERIC INDEX
LT1074M, Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1077, Micropower, Single Supply, PrecisionOpAmp ...............................................
LT1 07BAC, Micropower, Dual, Single Supply, Precision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT107BAM, Micropower, Dual, Single Supply, PrecisionOpAmp ........................................
LT1078C, Micropower, Dual, Single Supply, PrecisionOpAmp ..... .... ......... . .. . .... ... . ... . . . .... ..
LT1078M, Micropower, Dual, Single Supply, PrecisionOpAmp .........................................
LT1079AC, Micropower, Quad, Single Supply, PrecisionOpAmp ........................................
LT1079AM, Micropower, Quad, Single Supply, PrecisionOpAmp ... ........... . ......... . ..... . ... . . . ...
LT1079C, Micropower, Quad, Single Supply, Precision Op Amp .........................................
LT1079M, Micropower, Quad, Single Supply, Precision OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1080C, Advanced Low Power 5V RS232 Dual Driver/Receiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 080M, Advanced Low Power 5V RS232 Dual Driver/Receiver ........................................
LT1081C, Advanced Low Power 5V RS232 Dual Driver/Receiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1081 M, Advanced Low Power 5V RS232 Dual Driver/Receiver ........................................
LT1 083C, 7. 5A Low Dropout Positive Adjustable Regulator ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 083M, 7. 5A Low Dropout Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 083-5, 7. 5A Low Dropout Positive Fixed 5V Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1083-12, 7.5A Low Dropout Positive Fixed 12V Regulator ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 084C, 5A Low Dropout Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 084M, 5A Low Dropout Positive Adjustable Regulator ..............................................
LT1 084-5, 5A Low Dropout Positive Fixed 5V Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 084-12, 5A Low Dropout Positive Fixed 12V Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 085C, 3A Low Dropout Positive Adjustable Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 085M, 3A Low Dropout Positive Adjustable Regulator ..............................................
LT1 085-5, 3A Low Dropout Positive Fixed 5V Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . ..
LT1 085-12, 3A Low Dropout Positive Fixed 12V Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1086C, 1.5A Low Dropout Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 086M, 1.5A Low Dropout Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1086-5, 1.5A Low Dropout Positive Fixed 5V Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1086-12, 1.5A Low Dropout Positive Fixed 12V Regulator .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 OB7C, Adjustable Low Dropout Regulator with Kelvin-Sense Inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 087M, Adjustable Low Dropout Regulator with Kelvin-Sense Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 088C, Wideband RMS-DC Converter Building Block ...............................................
LT1089C, High Side Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1089M, High Side Switch ...................................................................
LT11 01 AC, Precision Micropower, Single Supply Instrumentation Amplifier (Fixed Gain = 10 or 100) . . . . . . . . . . . . . ..
LT11 01AM, Precision Micropower, Single Supply Instrumentation Amplifier (Fixed Gain = 10 or 100) ..............
LT11 01 C, Precision Micropower, Single Supply Instrumentation Amplifier (Fixed Gain = 10 or 100) . . . . . . . . . . . . . . ..
LT11 01 M, Precision Micropower, Single Supply Instrumentation Amplifier (Fixed Gain = 10 or 100) ...............
LT1102, High Speed Precision, JFET Input Instrumentation Amplifier (Fixed Gain =10or 100). . . . . . . . . . . . . . . . . . ..
LT1120C, Micropower Regulator with Comparator and Shutdown ........................................
LT1130C, 5-Driver/5-ReceiverRS232Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1130M, 5-Driver /5-Receiver RS232 Transceiver ........... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
L7~
13-21
13-27
2-251
2-251
2-251
2-251
2-251
2-251
2-251
2-251
10-43
10-43
10-43
10-43
4-89
4-89
4-101
4-101
4-89
4-89
4-101
4-101
4-89
4-89
4-101
4-101
4-113
4-113
4-113
4-113
13-28
13-28
11-33
11-45
11-45
13-36
13-36
13-36
13-36
13-48
4-125
10-55
10-55
19
ALPHANUMERIC INDEX
LT1131C, 5-Driver/4-Receiver RS232 Transceiver with Shutdown .......................................
LT1131 M, 5-DriverI 4-Receiver RS232 Transceiver with Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1132C, 5-Driver13-Receiver RS232 Transceiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1132M, 5-Driver/3-Receiver RS232 Transceiver .................... . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1133C, 3-Driver15-Receiver RS232 Transceiver . . . . . . . . . . . . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1133M, 3-Driver/5-Receiver RS232 Transceiver .......... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1134C, 4-DriverI 4-Receiver RS232 Transceiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1134M, 4-DriverI 4-Receiver RS232 Transceiver .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1135C, 5-Driver13-Receiver RS232 Transceiver without Charge Pump. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1135M, 5-Driver13-Receiver RS232 Transceiver without Charge Pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1136C, 4-Driver15-Receiver RS232 Transceiver with Shutdown ........................................
LT1136M, 4-DriverI 5-Receiver RS232 Transceiver with Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1137C, 3-Driver15-Receiver RS232 Transceiver with Shutdown .......................................
LT1137M, 3-Driver15-Receiver RS232 Transceiver with Shutdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1138C, 5-Driver13-Receiver RS232 Transceiver with Shutdown .......................................
LT1138M, 5-Driver13-Receiver RS232 Transceiver with Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1139C, 4-DriverI 4-Receiver RS232 Transceiver with Shutdown .......................................
LT1139M, 4-DriverI 4-Receiver RS232 Transceiver with Shutdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1140C, 5-Driver13-Receiver RS232 Transceiver without Charge Pump. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1140M, 5-Driver13-Receiver RS232 Transceiver without Charge Pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1141 C, 3-DriverI 5-Receiver RS232 Transceiver without Charge Pump. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1141 M, 3-Driver15-Receiver RS232 Transceiver without Charge Pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1170C, 5A High Efficiency 100kHz Switching Regulator .............................................
LT1170HVC, 5A High Efficiency 100kHz Switching Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1170HVM, 5A High Efficiency 100kHz Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1170M, 5A High Efficiency 100kHz Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1171C, 2.5A High Efficiency 100kHz Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1171HVC, 2.5A High Efficiency 100kHz Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1171HVM, 2.5A High Efficiency 100kHz Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1171M, 2.5A High Efficiency 100kHz Switching Regulator ........... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1172C, 1.25A High Efficiency 100kHz Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1172HVC, 1.25A High Efficiency 100kHz Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1172HVM, 1. 25A High Efficiency 100kHz Switching Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1172M, 1. 25A High Efficiency 100kHz Switching Regulator ..... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1178AC, 17J'AMax, Dual Single Supply, PrecisionOpAmp...........................................
LT1178AM, 17J'A Max, Dual Single Supply, Precision OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1178C, 17J'A Max, Dual Single Supply, Precision OpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1178M, 17J'A Max, Dual Single Supply, Precision Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1179AC, 17J'A Max, Quad Single Supply, Precision OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1179AM, 17J'A Max, Quad Single Supply, Precision OpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1179C, 17J'AMax, Quad Single Supply, PrecisionOpAmp ...........................................
LT1179M, 17J'A Max, Quad Single Supply, PrecisionOpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT118OC, Advanced Low Power 5V RS232 Dual DriverI Receiver with Small Capacitors. . . . . . . . . . . . . . . . . . . . . . . ..
20
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
5-61
5-61
5-61
5-61
5-61
5-61
5-61
5-61
5-73
5-73
5-73
5-73
2-267
2-267
2-267
2-267
2-267
2-267
2-267
2-267
10-67
ALPHANUMERIC INDEX
LT1180M, Advanced Low Power 5V RS232 Dual Driver/Receiver with Small Capacitors . . . . . . . . . . . . . . . . . . . . . . ..
LT1181 C, Advanced Low Power 5V RS232 Dual Driver/Receiver with Small Capacitors. . . . . . . . . . . . . . . . . . . . . . . ..
LT1181 M, Advanced Low Power 5V RS232 Dual Driver/Receiver with Small Capacitors .. . . . . . . . . . . . . . . . . . . . . ..
LT1188C, 1.5A High Side Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1188M,1.5AHighSideSwitch ...............................................................
LT1280C, Advanced Low Power 5V RS232 Dual Driver/Receiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1280M, Advanced Low Power 5V RS232 Dual Driver/Receiver ........................................
LT1281C, Advanced Low Power 5V RS232 Dual Driver/Receiver ........................................ ,
LT1281 M, Advanced Low Power 5V RS232 Dual Driver/Receiver ........................................
LT1431C, Programmable Reference ............................................................. ,
LT1431M, Programmable Reference .............................................................
LT1524, Regulating Pulse Width MOdulator ............ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1525A, Regulating Pulse Width Modulator ........... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1526, Regulating Pulse Width Modulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1527A, Regulating Pulse Width Modulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1846, Current Mode PWM Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1847, Current Mode PWM Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT3524, Regulating Pulse Width Modulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT3525A, Regulating Pulse Width Modulator .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT3526, Regulating Pulse Width Modulator ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT3527A, Regulating Pulse Width Modulator .... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT3846, Current Mode PWM Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT3847, Current Mode PWM Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC201AC, Quad CMOS SPSTLow Charge Injection Analog Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC201AM, Quad CMOS SPSTLow Charge Injection Analog Switch ......................................
LTC201 C, Quad CMOS SPSTLow Charge Injection Analog Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC201M, Quad CMOS SPSTLow Charge Injection Analog Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1040C, Dual MicropowerComparator. . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1040M, Dual MicropowerComparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1041C, BANG-BANG Controller ..............................................................
LTC1041M, BANG-BANG Controller ..............................................................
LTC1042C, Window Comparator ......................... , .... , . . . ... . . . . .. . ... . . ...... .. . . . ....
LTC1042M, Window Comparator ............. '" ......... ,. . . . . ... ... . . . . .. . .... ...... . .. . . .....
LTC1043C, Dual PreCision Instrumentation SWitched-Capacitor Building Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1043M, Dual Precision Instrumentation Switched-Capacitor Building Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC 1044C, Switched Capacitor Voltage Converter ...................................................
LTC 1044M, Switched Capacitor Voltage Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1045C, Programmable Micropower Hex Translator/Receiver/Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1 045M, Programmable Micropower Hex Translator/Receiver/Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1 049C, Low Power Chopper Stabilized Op Amp with Internal Capacitors ................................ ,
LTC1 049M, Low Power Chopper Stabilized Op Amp with Internal Capacitors ................................
LTC 1050AC, Precision Chopper Stabilized Op Amp with Internal Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1050AM, Precision Chopper Stabilized Op Amp with Internal Capacitors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
10-67
10-67
10-67
13-55
13-55
10-75
10-75
10-75
10-75
13-72
13-72
5-85
5-97
5-105
5-97
5-113
5-113
5-85
5-97
5-105
5-97
5-113
5-113
13-3
13-3
13-3
13-3
6-57
6-57
6-69
6-69
6-77
6-77
11-15
11-15
5-9
5-9
10-27
10-27
13-10
13-10
2-181
2-181
ALPHANUMERIC INDEX
LTCl 050C, Precision Chopper Stabilized Op Amp with Internal Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTCl 050M, Precision Chopper Stabilized Op Amp with Internal Capacitors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTCl 051 C, Dual Precision Chopper Stabilized Op Amp with Internal Capacitors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC 1051 M, Dual Precision Chopper Stabilized Op Amp with Internal Capacitors ............... , . . . . . . . . . . . . ..
LTC1052C,ChopperStabilizedOpAmp ...........................................................
LTC1052M, Chopper Stabilized OpAmp ............................... ; . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTCl 059AC, High Performance Switched Capacitor Universal Filter. . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . .
LTC1059AM, High Performance Switched Capacitor Universal Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1059C, High Performance Switched Capacitor Universal Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1 059M, High Performance Switched Capacitor Universal Filter .......................................
LTC1060AC, Universal Dual Filter Building Block ....................................................
LTC 1060AM , Universal Dual Filter Building Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC 1060C, Universal Dual Filter Building Block .....................................................
LTC1060M, Universal Dual Filter Building Block .....................................................
LTC1061AC, High Performance Triple Universal Filter Building Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1 061AM, High Performance Triple Universal Filter Building Block .....................................
LTC1 061C, High Performance Triple Universal Filter Building Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTCl 061 M, High Performance Triple Universal Filter Building Block ......................................
LTC 1062C, Fifth Order Low Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC 1062M, Fifth Order Low Pass Filter ...........................................................
LTC1064C, Low NOise, Fast, Quad Universal Filter Building Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1064M, Low NOise, Fast, Quad Universal Filter Building Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1064-1C, Low NOise, 8th Order, Clock Sweepable Elliptic Lowpass Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTCl 064-1 M, Low NOise 8th Order, Clock Sweepable Elliptic Lowpass Filter ................................
LTCl 064-2C, Low NOise, High Frequency 8th Order Butterworth Lowpass Filter ............................ "
LTC1 064-2M, Low Noise, High Frequency 8th Order Butterworth Lowpass Filter .............................
LTC1064-3, Low NOise, High Frequency 8th Order Linear Phase Lowpass Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1 064-4, Low Noise, 8th Order, Clock Sweepable Cauer Lowpass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC 1090AC, Single Chip 1O-Bit Data Acquisition System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1 090AM, Single Chip 1O-Bit Data Acquisition System . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . .
LTC1 090C, Single Chip 1O-Bit Data Acquisition System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1 090M, Single Chip 10-Bit Data Acquisition System .................................. .. . . . . . .. . . . .
LTC1091AC, 1-Channel, 10-BitSeriali/O Data Acquisition System .......................... .............
LTC1091AM, 1-Channel, 10-BitSeriali/ODataAcquisitionSystem.......................................
LTC1091C, 1-Channel, 10-BitSeriali/O Data Acquisition System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1091M, 1-Channel, 10-BitSeriali/ODataAcquisitionSystem ........................................
LTC1092AC, 2-Channel, 1O-Bit Seriali/O Data Acquisition System .............................. . . . . . . . . .
LTCl 092AM, 2-Channel, 1O-Bit Seriali/O Data Acquisition System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC 1092C, 2-Channel, 1O-Bit Seriall 10 Data Acquisition System ........................................
LTC1 092M, 2-Channel, 1O-Bit Seriali/O Data Acquisition System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTCl 093AC, 6-Channel, 10-Bit Seriali/O Data Acquisition System .......................... . . . . . . . . . . . . .
LTCl 093AM, 6-Channel, 1O-Bit Seriali/O Data Acquisition System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1093C, 6-Channel, 1O-Bit Seriali/O Data Acquisition System ........................................
22
2-181
2-181
13-13
13-13
2-197
2-197
7-3
7-3
7-3
7-3
7-15
7-15
7-15
7-15
7-39
7-39
7-39
7-39
7-59
7-59
7-73
7-73
7-89
7-89
13-15
13-15
13-19
13-20
9-5
9-5
9-5
9-5
9-29
9-29
9-29
9-29
9-29
9-29
9-29
9-29
9-29
9-29
9-29
ALPHANUMERIC INDEX
LTC1093M, 6-Channel, 10-BitSeriall/0 Data Acquisition System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1094AC, 8-Channel, 10-BitSeriall/0 Data Acquisition System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC 1094AM , 8-Channel, 10-BitSeriall/0 Data Acquisition System. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . .
LTC1094C,8-Channel, 10-BitSerial 1/0 Data Acquisition System ........................................
LTC 1094M, 8-Channel, 1O-Bit Serial 1/0 Data Acquisition System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1 095BC, Complete 1O-BitData Acquisition System with On Board Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC 1095BM, Complete 1O-Bit Data Acquisition System with On Board Reference .. . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1 095CC, Complete 1O-Bit Data Acquisition System with On Board Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1095CM, Complete 10-BitDataAcquisition System with On Board Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1099AC, High Speed 8-Bit AID Converter with Built-In Sample-and-Hold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1 099AM, High Speed 8-Bit AID Converter with Built-In Sample-and-Hold ...............................
LTC1099C, High Speed 8-BitAiD Converter with Built-In Sample-and-Hold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1 099M, High Speed 8-Bit AID Converter with Built-In Sample-and-Hold. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1100, Precision, Single Supply, Instrumentation Amplifier (Fixed Gain =100). . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1150C, ± 15V Chopper Stabilized Op Amp with Internal Capacitors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC 1150M, ± 15V Chopper Stabilized Op Amp with Internal Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1290BC, Single Chip 12-Bit Data Acquisition System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1290BM, Single Chip 12-BitData Acquisition System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1290CC, Single Chip 12-Bit Data Acquisition System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1290CM, Single Chip 12-Bit Data Acquisition System ........ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1291, 1-Channel, 12-Bit Serial 1/0 Data Acquisition System .........................................
LTC1292, 2-Channel, 12-Bit Serial 1/0 Data Acquisition System .........................................
LTC1293, 6-Channel, 12-BitSeriall/0 Data Acquisition System .........................................
LTC1294, 8-Channel, 12-Bit Serial 110 Data Acquisition System .........................................
LTC7652C, Chopper Stabilized OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . ..
LTKAOOC, Thermocouple Cold Junction Compensator and Matched Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTKAOOM, Thermocouple Cold Junction Compensator and Matched Amplifier ...............................
LTKA01C, Thermocouple Cold Junction Compensator and Matched Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTKA01 M, Thermocouple Cold Junction Compensator and Matched Amplifier ...............................
LTK001 AC, Thermocouple Cold Junction Compensator and Matched Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTK001 AM, Thermocouple Cold Junction Compensator and Matched Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTK001 C, Thermocouple Cold Junction Compensator and Matched Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTK001 M, Thermocouple Cold Junction Compensator and Matched Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTZ1000AC, Ultra Precision Reference.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTZ1000C, Ultra Precision Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OP05, Internally Compensated Op Amp ...........................................................
OP05A, Internally Compensated Op Amp ..........................................................
OP05C, Internally Compensated Op Amp ..........................................................
OP05E, Internally Compensated OpAmp. . . .. . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . ..
OP07, Precision Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . .. . . . . . . . . . . ..
OP07A, PrecisionOpAmp ................ .... ...... . ....... .. ..... ...... ..... . ....... . ........
OP07C, PrecisionOpAmp ................ ... ....... ........ ....... ...... .................. ....
OP07D, PrecisionOpAmp ......................... . ...... . . . ...... .. ..........................
..L7~
9-29
9-29
9-29
9-29
9-29
9-57
9-57
9-57
9-57
9-81
9-81
9-81
9-81
13-35
13-49
13-49
13-62
13-62
13-62
13-62
13-70
13-70
13-70
13-70
2-197
11-3
11-3
11-3
11-3
11-3
11-3
11-3
11-3
3-9
3-9
2-321
2-321
2-321
2-321
2-329
2-329
2-329
2-329
23
ALPHANUMERIC INDEX
OP07E, Precision Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
OP15A, Precision, High Speed JFETlnputOpAmp ...................................................
OP15B, Precision, High Speed JFETlnput Op Amp ......................................... ..........
OP15C, Precision, High SpeedJFET Input Op Amp ...................................................
OP15E, Precision, HighSpeedJFETlnputOpAmp ...................................................
OP15F, Precision, HighSpeedJFETlnputOpAmp ...................................................
OP15G, Precision, High Speed JFET InputOpAmp ........................... . . . . . . . . . . . . . . . . . . . . . . ..
OP16A, Precision, High Speed JFET InputOpAmp ........................... . . . . . . . . . . . . . . . . . . . . . . ..
OP16B,Precision, HighSpeedJFETlnputOpAmp ...................................................
OP16C, Precision, High SpeedJFET InputOpAmp .................. . .. ................. .............
OP16E, Precision, High SpeedJFET Input Op Amp ...................................................
OP16F, Precision, High Speed JFETlnputOp Amp ...................................................
OP16G, Precision, High SpeedJFET InputOpAmp ........................ ...........................
OP27A, Low NOise, Precision Op Amp ............................................................
OP27C, Low NOise, Precision Op Amp ............................................................
OP27E, Low Noise, Precision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
OP27G, Low Noise, Precision Op Amp ............................................................
OP37A, Low Noise, High Speed Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
OP37C, Low NOise, High Speed OpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
OP37E, Low NOise, High Speed OpAmp .............................................. .............
OP37G, Low NOise, High Speed OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
OP215A, Dual Precision JFET Input Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
OP215C, Dual Precision JFETlnput Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
OP215E, Dual Precision JFETInput Op Amp ........................................................
OP215G, Dual PrecisionJFET Input Op Amp ....... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
OP227A, Dual Matched, Low Noise Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
OP227C, Dual Matched, Low Noise Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
OP227E, Dual Matched, Low Noise OpAmp ........................................ . . . . . . . . . . . . . . ..
OP227G, Dual Matched, Low NOise Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
OP237A, Dual High Speed, Low NoiseOpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
OP237C, Dual High Speed, Low NOiseOpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
OP237E, Dual High Speed, Low NoiseOpAmp ......................................................
OP237G, Dual High Speed, Low Noise Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
REF01 , Precision Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
REF01 A, Precision Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
REF01 C, Precision Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
REF01E, Precision Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
REF01 H, Precision Voltage Reference ............................................................
REF02, Precision Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
REF02A, Precision Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
REF02C, Precision Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
REF02D, Precision Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
REF02E, Precision Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
24
2-329
2-341
2-341
2-341
2-341
2-341
2-341
2-341
2-341
2-341
2-341
2-341
2-341
2-345
2-345
2-345
2-345
2-345
2-345
2-345
2-345
2-275
2-275
2-275
2-275
2-357
2-357
2-357
2-357
2-357
2-357
2-357
2-357
3-125
3-125
3-125
3-125
3-125
3-125
3-125
3-125
3-125
3-125
ALPHANUMERIC INDEX
REF02H, Precision Voltage Reference ............................................................ 3-125
8G1524, Regulating Pulse Width Modulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-85
8G1525A, Regulating Pulse Width Modulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-97
8G1527A, Regulating Pulse Width Modulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-97
8G3524, Regulating Pulse Width Modulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-85
8G3525A, Regulating Pulse Width Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-97
8G3527A, Regulating Pulse Width Modulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-97
ALPHANUMERIC INDEX
SURFACE MOUNT PRODUCTS
LF398S8, Precision Sample and Hold Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM318S8, High Speed Op Amp ............................................................... "
LM334S8, Constant Current Source and Temperature Sensor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM385S8-1.2, MicropowerVoltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM385S8-2.5, MicropowerVoltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 001 CS8, Precision Op Amp .......... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1004CS8-1.2, MicropowerVoltage Reference ....................................................
LT1004CS8-2.5, MicropowerVoltage Reference ....................................................
LT1006S8, Precision Single Supply Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1007CS, Low Noise, High Speed Precision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1009S8, 2.5VoltReference.... .... ..... ..... .... . . . ... ....... ...... ... . . .. . .... ........ . ....
LT1 012S8, Picoamp Input Current, Microvolt Offset, Low NOise Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 013DS8, Dual Precision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1 016CS8, Ultra Fast Precision Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 017CS, Micropower Dual Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 018CS, Micropower Dual Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 020CS, Micropower Regulator and Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 021 DCS8, Precision Reference ..............................................................
LT1028CS, Ultra-Low Noise Precision High Speed OpAmp ...... :.... ..................................
LT1030CS, Quad Low Power Line Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 034CS8-1.2, Micropower Dual Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1034CS8-2.5, MicropowerDual Reference...... ..... . . . . . . . . . .... .. .. . . . . .. . .... ... . ... . ........
LT1 037CS, Low NOise, High Speed Precision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1 054CS, Switched Capacitor Voltage Converter with Regulator ........................................
LT1 0541S, Switched Capacitor Voltage Converter with Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1055S8, Precision, High Speed, JFET InputOpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1056S8, Precision, High Speed, JFETlnputOpAmp ................................................
LT1057S, Dual JFET Input Precision High Speed Op Amp ..............................................
LT1 0571S, Dual JFET Input Precision High Speed Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1080CS, 5V Powered RS232 Driver/Receiverwith Shutdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1081CS, 5V Powered RS232 Driver/Receiverwith Shutdown .........................................
LTC1 043CS, Dual Precision Instrumentation Switched-Capacitor Building Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1044CS8, Switched Capacitor Voltage Converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1 052CS, Chopper-Stabilized Op Amp (CSONM) ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1059CS, High Performance Switched Capacitor Universal Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1060CS, Universal Dual Filter Building Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1061CS, High Performance Triple Universal Filter Building Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1 062CS, 5th Order Low Pass Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OP-07CS8, Precision Op Amp ..................................................................
SG3524S, Regulating Pulse Width Modulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
26
9-113
2-319
3-99
3-113
3-113
2-23
3-25
3-25
2-53
2-69
3-31
2-117
2-141
6-41
6-53
6-53
4-45
3-57
2-177
10-9
3-81
3-81
2-69
5-35
5-35
2-231
2-231
2-247
2-247
10-51
10-51
11-31
5-21
2-217
7-11
7-35
7-55
7-71
2-337
5-93
SECTion l-GEnERAL
InFoRmATion
1-1
INDEX
SECTION 1-GENERAL INFORMATION
INDEX .................................................................................. , . . ... . ...... .. ... ..
GENERAL ORDERING INFORMATION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ALTERNATE SOURCE CROSS REFERENCE GUIDE ......................................................................
1-2
1-2
1-3
1-4
L7Lln
FA r\
V \K
GENERAL ORDERING
INFORMATION
TECHNOLOGY~------
I.
ORDER ENTRY
Orders for products contained herein should be directed to: LINEAR TECHNOLOGY CORPORATION,
1630 McCarthy Boulevard, Milpitas, California 95035. Phone: 408·432·1900.
II.
ORDERING INFORMATION
Minimum order value is $2000.00 per order; minimum value per line item is $500.00.
Each item must be ordered using the complete part number exactly as listed on the datasheet.
F.O.B.: Milpitas, California.
III.
RELIABILITY PROGRAMS
Linear Technology Corporation currently offers the following Reliability Programs:
A.
B.
C.
D.
IV.
JAN QPL devices.
DESC drawings.
MIL·STD-883, Level B, Revision C for all military temperature range devices.
"R·Flow" Burn·ln Program for commercial temperature range devices. Consult Factory regarding burn·in program.
PART NUMBER EXPLANATION
xxx
xxxx
x
x
I
J/883B
II
"-",,, .. "oe..,.,..." """ e, """.00 C
Package Style (see Cross Reference on Page 12·3)
Temperature Range
M for Military
C for Commercial
X for 200°C Extended Range'
L-_ _ _ _ _ _ _ _ _
L-_ _ _ _ _ _ _ _ _ _ _ _ _
Letter indicates electrical grade of part
Generic or Product Part Number
'------------------Designator
LF, LM, OP, REF, and SG are second source devices
LT are improved or proprietary devices
LTC indicates proprietary CMOS devices
V.
PACKAGE SUFFIX EXPLANATION
Letter Designator
D
D8
H
J
J8
K
N
N8
P
58
5
T
V
W
Z
Description
14,16,18 and 20 Pin Side Brazed Hermetic DIP
8 Pin Side Brazed Hermetic DIP
Multi Lead Metal Can
14,16,18 and 20 Pin Ceramic DIP
8 Pin Ceramic DIP
TO·3 Metal Can (Steel)
14,16,18 and 20 Pin Molded DIP
8 Pin Molded DIP
TO-3P Molded (3 lead)
8 Lead Small Outline (SO) package (Note 1)
16,18,20 Pin Small Outline (SO) package (Note 1, 2)
TO·220 Molded (3 lead, 5 lead)
11 Pin Molded SIP
10 Pin Flatpack (Cerpak)
TO·92 Molded (3 lead)
Note1: Pin·out and electrical specifications may differ from standard commercial grade N8 package.
See SO datasheet for specific information.
Note 2: These devices are delivered In either 150 MIL (SO) or 300 MIL (SQ-L) wide packages depending
on device die size. See specific SO datasheet for pin counts and package dimensions.
1-3
A I't
~7Lln U \K
F
ALTERNATE SOURCE
CROSS REFERENCE GUIDE
TECHNOLOGY~-----~
AMDPIN
AM685
AM686
LFi55
LFi55A
LFi56
LFi56A
LFi98
LF355A
LF356A
LF398
LMi0S
LMlOSA
LM111
LMii8
LMi19
LMi48
LM308A
LM3ii
LM3i8
LM3i9
AMD
LTC DIRECT REPL
LT685
LTi0i6
LFi55
LTi055M'
LFi55A
LTi055AM'
LFi56
LTi056M'
LFi56A
LTi056AM'
LFi9S
LF355A
Ln055AC'
LF356A
Ln056AC'
LF398
LM108
LTi008M'
LMi08A
LT1008M'
LM1i1
LT111A'
LT1011 M'
LMii8
LT1i8A'
LMii9
LTi19A'
LTi0i4'
LM308A
LnOO8C'
LM3ii
LT31iA'
LnOiiC'
LM3i8
LT3i8A'
LM3i9
LT3i9A'
ANALOG DEVICES
FSCPIN
LTC DIRECT REPL
INTERSIL PIN LTC DIRECT REPL
MOTOPIN
LTC DIRECT REPL
~Ai08
LMi0S
LnOO8M'
LMi08A
LTi00SM'
LMiii
LT1iiA'
LTi0iiM'
LMi17
LTii7A'
LTi0i4M'
Ln014M'
LM30SA
LTi008C"
LM3ii
LT3i1A'
LTi0iiC'
LM3i7
LT317A'
LM3i8
LT3i8A'
OP07
LT1001M'
OP07C
LT100iC'
OP07E
LTi00iC'
LMiii
MCi558
MC7ST05
LTi0i3M'
LM323T
LT323AT'
OP27A
LnOO7AM'
LTi007M'
OP27C
LnOO7M
OP27E
LT1007AC'
LTi007C'
OP27G
LTi007C'
OP37A
LT1037AM'
LTi037M'
OP37C
LTi037M'
OP37E
LT1037AC'
LT1037C'
OP37G
Ln037C'
SGi524
Ln524'
SGi525A
LTi525A'
SG1527A
Ln527A'
SG3524
LT3524,
SG3525A
LI3525A'
SG3527A
LT3527A'
~A108A
~Aiii
~Ai17
~Ai24
~Ai48
~A308A
~A31i
~A3i7
~A3iS
~A714
~A714C
~A7i4E
~A7i4L
~Ai558M
HA25i0
HA25i2
HA25i5
HA5i30-2
LTC DIRECT REPL
HA5i30-5
ADi0iA
AD5i0J
LMi0iA
OP07E'
LTi001C'
LnOOiAC'
LT1001AC'
OP07A'
LT100iAM'
OP07"
LTi00i"
LMii8"
LTii8A"
LT580
LT58i
LTi03i "
LTi034"
LTCi099'
OP07
LTi00iM'
OP07A
LTi00iAM'
OP07C
LTi001C'
OP07D
LT100iC'
OP07E
LT100iC'
HA5i35-2
AD517
AD5iS
AD580
AD58i
AD589
AD7820
ADOP07
ADOP07A
ADOP07C
ADOPom
ADOP07E
FAIRCHILD
FSC PIN
LTC DIRECT REPL
SH123
LM123
LT123A'
LT1003M"
LM323
LT323A'
LT1003M"
LT1003C"
LMi0iA
LM107
SH323
~A78H05C
~Ai0iA
~A107A
HA5135-5
HAOP07
HAOP07A
HAOP07C
HAOP07E
Lni8A"
LMii8"
LTii8A"
LMii8A"
LT3i8A"
LM318"
OP07A
LTi00iAM'
OP07E
LTi00iC'
OP07
LnOOiM'
OP07C
LT1001C'
OP07
LT100iM'
OP07A
LTi00iAM'
OP07C
LT100iC'
OP07E
LT100iC'
INTERSIL
INTERSIL PIN LTC DIRECT REPL
ICL232
LnOSi
ICL7650 8-Pin LTCi050'
ICL7652 8-Pin LTC7652
ICL7660
LTCi044'
ICLS069C
LM3S5-1_2
LT1004C-1.2'
LM1S5-1_2
ICLS069M
LT1004M-1.2'
LF155
LF155
LF155A
LF155A
LF156
LF156
LF156A
LF156A
LF355A
LF355A
LF356A
LF356A
LH210S
LH2108
LH210SA
LH210SA
LM10iA
LMi0iA
LMi07
LMi07
LMi08
LMi08
LTi008M'
LMi08A
LMi08A
LT100SM'
*LTC Improved Re lacement: 100% Pin-! r- in co
1-4
LTi001C'
LnOi3M'
HARRIS
HARRIS PIN LTC DIRECT REPL
AD PIN
AD5i0K
AD5i0L
AD5i0S
opom
LMi24
LMiii
LT111A'
LnOiiM'
LTi0i4M'
MAXIM
MAXIM PIN
LTC DIRECT REPL
AD7820
ICL7650
ICL7652
ICL7660
MAX232
MAX235
MAX237
MAX238
MAX239
MAX400
MAX430
MAX432
MAX680
MF10
OP07
OP27
LTCi099'
LTC1052"
LTC7652
LTCi044"
LTi081 ,
LT1130"
LTii32"
LTii34"
LTii33"
LTi00i
LTCi050
LTCi050
LTi026"
LTCi060
OP07
OP27
MOTOROLA
MOTO PIN
LFi55
LTC DIRECT REPL
LFi55
LTi055M
LF155A
LFi55A
Ln055AM
LF156
LFi56
LTi056M
LF156A
LFi56A
LTi056AM
LF355A
LF355A
LF356A
LF356A
LMi0iA
LMi0iA
LMi07
LM107
LMi08
LMi08
LnOO8M'
LMi08A
LMi0SA
LnOO8M'
LM1i1
LM11i
Ln11A'
LT10iiM'
LMii7
LMii7
LTi17A'
LMi23
LMi23
LTi23A'
LTi003M"
LTi0i4M'
LMi24
LMi37
LMi37
LTi37A'
LT1033M"
LTi0i4M'
LMi48
LMi50
LMi50
LTi50A'
LMi5S
LTi013M'
LM30SA
LM30SA
LTi00SC'
LM311
LM311
LT311A'
LT1011C'
LM317
LM317
LT317A'
LM323
LM323
LT323A'
LnOO3C"
LM337
LM337
LT337A'
LT1033C"
LM350
LM350
LT350A'
MCi400U2
LTlOi9CNS-2_5'
MCi400AU2 LTi0i9CN8-2_5"
MCi400U5
LT1019CNS-5'
MCi400AU5 LTi0i9CNS-5"
MC1400UlO LTi0i9CN8-i0'
MC1400AU10 LT1019CN8-10"
MC145406
LT1039-16'
OP27A
OP27B
OP27C
OP27E
OP27F
OP27G
OP37A
OP37B
OP37C
OP37E
OP37F
OP37G
SGi524
SGi525A
SGi527A
SG3524
SG3525A
SG3527A
NATIONAL SEMICONDUCTOR
NSC PIN
LTC DIRECT REPL
ADC032
ADC0820
LFi55
LFi55A
LF156
LFi56A
LFi98
LFi98A
LF355A
LF356A
LF398
LF39SA
LF4i2A
LHOOO2
LHOO44
LHOO70
LH2108
LH2108A
LM10
LM10B
LM10C
LM101A
LM107
LM10S
LM10SA
LMi11
LM112
LM113
LM117
LTCi09i
LTCi099'
LFi55
Ln055M'
LFi55A
LTi055AM'
LF156
LTi056M'
LTi022M'
LFi56A
LTi056AM'
LTi022AM'
LFi98
LFi98A
LF355A
LTi055AC'
LF356A
LT1056AC'
LTi022AC'
LF398
LF39SA
LF4i2A
LTi0i0M"
LT1001M'
LHOO70
Ln031M'
LH210S
LH210SA
LMi0
LM10B
LM10C
LM101A
LM107
LM10S
LT100SM'
LM108A
LTi00SM'
LMiii
Ln1iA'
LTi0iiM'
LT1012M'
LT1004M-1_2'
LM117
LT117A'
ALTERNATE SOURCE CROSS REFERENCE GUIDE
NSCP/N
LM117HV
LTC DIRECT REPL
LM117HV
LT117AHV'
LM118
LM118
LT118A'
LM119
LM119
LT119A'
LM123
LM123
LT123A'
LT1003M"
LM124
LT1014M'
LM129A
LM129A
LM129B
LM129B
LM129C
LM129C
LM133
LT1033M'
LM134
LM134
LM134·3
LM134·3
LM134·6
LM134·6
LM136A
LM136A
LT1 009M ,
LM136·2.5
LM136·2.5
LT1009M'
LM136·5
LT1029M"
LM137
LM137
LT137A
LT1033M"
LM137HV
LM137HV
LT137AHV'
LM138
LM138
LT138A'
LM148
LT1014M"
LM150
LM150
LT150A·
LM158
LT1013M'
LM168BY·5.0 LT1019M·5"
LM168BY·10.0 LT1019M·10"
LM185·1.2
LM185·1.2
LT1004M·1.2'
LM185·2.5
LM185·2.5
LT1004M·2.5'
LM185BX·1.2 LT1034BM·1.2'
LM185BY·1.2 LT1034M·1.2'
LM185BX·2.5 LT1034BM·2.5'
LM185BY·2.5 LT1034M·2.5'
LM196
LT1038M"
LM199
LM199
LM199A
LM199A
LM199A·20
LM199A·20
LM234·3
LM234·3
LM234·6
LM234·6
LM308A
LM308A
LT1008C'
LM311
LM311
LT311A'
LT1011C'
LM317
LM317
LT317A'
LM317HV
LM317HV
LT317AHV'
LM318
LM318
LT318A'
LM319
LM319
LT319A'
LM323
LM323
LT323A'
LT1003C"
LM329A
LM329A
LM329B
LM329B
LM329C
LM329C
LM329D
LM329D
LM333
LT1033C'
LM333A
LT1033C
LM334
LM334
LM336·2.5
LM336
LT1009C'
LM336B·2.5 LM336B
LT1009C'
LT1029C'
LM336·5
LM337
LM337
LT337A'
LT1033C'
LM337HV
LM337HV
LT337AHV'
NSCP/N
LTC DIRECT REPL
PMIP/N
LTC DIRECT REPL
PMIP/N
LTC DIRECT REPL
LM338
LM338
LT338A'
LM350
LT350A'
LT1 019AC·5'
LT1019AC·5'
LT1019C·10"
LT1019C·10"
LM385·1.2
LT1004C·1.2'
LM365·2.5
LT1004C·2.5'
LT1034BC·1.2'
LT1034C·1.2'
LT1034BC·2.5'
LT1034C·2.5'
LT1038C"
LM399
LM399A
LM399A·20
LM399A·50
SG1524
LT1524'
LT1005"
SG3524
LT3524'
LTC1059'
LTC1060'
OP16G
OP16G
LT1056C'
OP27A
LT1007AM'
LT1007M'
OP27C
LT1007M'
OP27E
LT1007AC'
LT1007C'
OP27G
LT1007C'
OP37A
LT1037AM'
OP37A
LT1037M'
OP37C
LT1037M'
OP37E
LT1037AC'
OP37E
LT1037C'
OP37G
LT1037C'
LT1001AM"
LT1001M"
LT1001AC"
LT1001C"
LT1001C"
LT1002M'
LT1002M'
LT1002C'
LT1002C'
OP215A
LT1057AM'
OP215A'
LT1057AM'
OP215C
LT1057M'
OP215E
LT1057C'
OP215E'
LT1057C'
OP215G
LT1057C'
LT1078'
LT1013'
OP227A
OP227A
OP227C
OP227E
OP227E
OP227G
LT1078"
LT1014AM"
LT1014AC"
LT1014AC"
LT1079'
LT1014'
LT1079"
LM108
LT1008M'
LM108A
LT1008M'
LF155
LT1 055M ,
LF155A
LT1055M'
LF156
LT1056M'
LF156A
LT1056M'
LM308A
LT1008C'
LF355A
LT1055C'
LF356A
LT1056C'
LT1008
LT1012
LT1013M'
LH2108
PM2108A
REF01
LH2108A
REF01
LT1019M·10'
LT1021·10"
REF01A
LT1021·10"
REF01C
LT1019C-10'
LT1021·10"
REF01E
LT1021·10"
REF01H
LT1019C·10'
LT1021·10"
REF02
LT1019M·5'
LT1021·5"
REF02A
LT1021·5"
REF02C
LT1019C·5'
LT1021·5"
LT1019C-5'
LT1021·5"
REF02E
LT1021·5"
REF02H
LT1019C·5'
LT1021·5"
LT1019-2.5
LM350
LM368·5.0
LM368Y·5.0
LM368·10.0
LM368Y·10.0
LM385·1.2
LM385·2.5
LM385BX·1.2
LM385BY·1.2
LM385BX·2.5
LM385BY·2.5
LM396
LM399
LM399A
LM399A·20
LM399A·50
LM1524
LM2935
LM3524
MF5
MF10
PMIP/N
CMP01
CMP02
OP04
OP05
OP05A
OP05C
OP05E
OP07
OP07A
OP07C
OP07E
OP10
OPlOA
OP10C
OP10E
OP11
OP12A
OP12B
OP12C
OP12E
OP12F
OP12G
OP15A
OP15B
OP15C
OP15E
OP15F
OP15G
OP16A
OP16B
OP16C
OP16E
OP16F
PMI
LTC DIRECT REPL
LT1011"
LT1011"
LT1013'
OP05
LT1001M'
OP05A
LT1001M'
OP05C
LT1001C'
OP05E
LT1001C'
OP07
LT1001M'
OP07A
LT1001AM'
OP07C
LT1001C'
OP07E
LT1001C'
LT1002M'
LT1002AM'
LT1002C'
LT1002C
LT1014'
LT1012M'
LT1012M'
LT1012M'
LT1012C'
LT1012C'
LT1012C'
OP15A
LT1055AM'
OP15B
LT1055M
OP15C
LT1055M'
OP15E
LT1055AC'
OP1 T1055C'
OP15G
LT1055C'
OP16A
LT1056AM'
OP16B
LT1056M'
OP16C
LT1056M'
OP16E
LT1056AC'
OP16F
LT1056C'
OP27A
OP27B
OP27C
OP27E
OP27F
OP27G
OP37A
OP37B
OP37C
OP37E
OP37F
OP37G
OP77A
OP77B
OP77E
OP77F
OP77G
OP207A
OP207B
OP207E
OP207F
OP215A
OP215B
OP215C
OP215E
OP215F
OP215G
OP220
OP221
OP227A
OP227B
OP227C
OP227E
OP227F
OP227G
OP290
OP400A
OP400E
OP400F
OP420
OP421
OP490
PM108
PM108A
PM155
PM155A
PM156
PM156A
PM308A
PM355A
PM356A
PM1008
PM1012
PM1558
PM2108
REF01A
REF01C
REF01E
REF01H
REF02
REF02A
REF02C
REF02D
REF02E
REF02H
REF03
RAYTH PIN
LM101A
LM107
LM111
LM124
LM148
LM311
OP05
OP05A
OP05C
OP05E
OP07
OP07A
OP07C
OP07E
OP27A
OP27B
OP27C
OP27E
OP27F
OP27G
OP37A
OP37B
OP37C
OP37E
OP37F
RAYTHEON
LTC DIRECT REPL
LM101A
LM107
LM111
LT111A'
LT1011M"
LT1014M'
LM1014M'
LM311
LT311A'
LT1011C'
OP05
LT1001M'
OP05A
LT1001AM'
OP05C
LT1001C'
OP05E
LT1001C·
OP07
LT1001M'
OP07A
LT1001AM'
OP07C
LT1001C'
OP07E
LT1001C'
OP27A
LT1007AM'
OP27A
LT1007M
OP27C
LT1007M'
OP27E
LT1007AC'
OP27F
LT1007C'
OP27G
LT1007C'
OP37A
LT1037AM'
OP37A
LT1037M
OP37C
LT1037M'
OP37E
LT1037AC'
OP37E
LT1037C'
1-5
ALTERNATE SOURCE CROSS REFERENCE GUIDE
RAYTH PIN
LTC DIRECT REPL
SILGENP/N
LTC DIRECT REPL
TIP/N
LTC DIRECT REPL
OP37G
OP37G
LT1037C'
OP07C
LT1001C'
OP07E
LT1001C'
OP07
LT1001M'
LT1013M'
SG1526
SG1527A
LT1526
SG1527A
LT1527A'
LT1013M'
SG3524
LT3524'
SG3525A
LT3525A'
LT3526
SG3527A'
LT3527A'
OP27B
OP27C
LT1007M'
OP27C
LT1007M
OP27E
LT1007AC'
LT1007C'
OP27G
LT1007C'
OP37A
LT1037AM'
LT1037M'
OP37C
LT1037W
OP37E
LT1037AC'
LT1037C'
OP37G
LT1037C'
SG1524
LT1524'
SG1525A
LT1525A'
SG3524
LT3524,
SG3525A
LT3525A'
RC714CH
RC714EH
RM714H
RM1558
SIGNETICS
SIGNETICS PIN LTC DIRECT REPL
LF398
LF398A
LM101A
LMlll
LMl19
LM124
LM158
LM311
MC1558
NE1037
NE5534
NE5534A
SE5534
SE5S34A
SG3S24
LF398
LF398A
LM101A
LMlll
LTlllA'
LT1011W
LMll9
LT1l9A'
LT1014W
LT1013M'
LM3ll
LT3llA'
LT10l1C'
LT1013M'
LT1037
OP3?'
LT1037'
OP37'
LT103?'
OP37'
LT1037'
OP37'
LT103?'
SG3524
LT3S24'
SILICON GENERAL
SILGENP/N LTC DIRECT REPL
SG101A
SG108
SG108A
SGlll
SGl17
SGll7A
SG123
SG123A
SG124
SG137
SG137A
SG138
SGl38A
SG150
SGl50A
SG3ll
SG3l7
SG317A
SG323
SG323A
SG337
SG337A
SG338
SG338A
SG350
SG350A
SG1524
SG1525A
1-6
LM101A
LM108
LT1008W
LM108A
LT1008M'
LMlll
LT1llA
LT10llM'
LMl17
LTl17A
LM123
LT123A
LT1003M"
LT1014M'
LM137
LT137A
LT1033M"
LM138
LT138A
LMl50
LT1S0A
LM3ll
LT3llA'
LT10llC'
LM3l7
LT3l7A
LM323
LT323A
LT1003C"
LM337
LT337A
LT1033C"
LM338
LT338A
LM350
LT350A
SG1524
LT1524'
SG1525A
LT1525A'
SG1558
SG3524
SG3525A
SG3526
SG3527A
TELEDYNE SEMICONDUCTOR
TSCP/N
LTC DIRECT REPL
TSC04
TSC05
TSC232
TSC9l1
TSC913
TSC9l4
TSC9l8
TSC7650
TSC7652
TSC7660
TSC9491
TSC9495
TSC9496
LM385-1.2
LM385-2.5
LT1080"
LT1081"
LTC1050
LT1078"
LT1079"
LTC7652"
LTC1050
LTC7652
LTC1052
LTCl 044 ,
LM385-l.2
LT1004C-l.2
REF02
LT10l9M-5
LT102l-S"
REF01E
LT102l-l0"
TEXAS INSTRUMENTS
LTC DIRECT REPL
TIP/N
LM101A
LM107
LM108A
LMlll
LM124
LMl48
LM158
LM185-2.5
LM3ll
LM317KC
LM3l8
LM323
LM350
LT1004
LT1007
LT1008
LTl009
LT10ll
LT1013
LT1016
LT1028
LT1037
LT1070
LTC1044
LTC10S2
MC1558
OP0717l4C
OP0717l4D
OP0717l4E
OP27A
LM101A
LM107
LM108A
LMlll
LTlllA'
LT10llM'
LT1014W
LT1014M'
LT10l3M'
LM185-2.S
LM3ll
LT3llA'
LT10llC'
LM3l7T
LM317AP
LM3l8
LT3l8A'
LM323
LT323A'
LM350
LT350A'
LT1004
LT1007
LT1008
LT1009
LT10ll
LT1013
LT1016
LT1028
LT1037
LT1070
LTC1044
LTC1052
LT1013M'
OP07C
LT1001C'
OP07D
LT1001C'
OP07E
LT1001C'
OP27A
LT1007AM'
OP27E
OP27F
OP27G
OP37A
OP37B
OP37C
OP37E
OP37F
OP37G
SG1524
SG1525A
SG3524
SG3525A
UNITRODE
UNITRODE PIN LTC DIRECT REPL
UCl17
UC137
UCl50
UC317
UC337
UC350
UC1S24
UC1525A
UC1527A
UCl648
UCl647
UC3S24
UC3525A
UC3527A
UC3846
UC3647
LMl17
LTl17A'
LM137
LT137A'
LT1033M"
LM150
LT150A'
LM3l7
LT3l7A'
LM337
LT337A'
LT1033C"
LM350
LT350A'
SG1524
LT1524'
SG1525A
LT1525A'
SG1527A
LT1527A'
LT1846
LT1647
SG3524
LT3524'
SG3525A
LT3525A'
SG3527A
LT3527A'
LT3648
LT3647
SECTion 2-0PERATlonAl
AmPLIFIERS
2-1
INDEX
SECTION 2-0PERATIONAL AMPLIFIERS
INDEX... ....... ...... ...... .... . ... . . .... ... ....... ... . .. ...... ..... .... . . . ........ .. ... .... .......... ....
SELECTION GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-2
2-4
PROPRIETARY PRODUCTS
LTt001, PrecisionOpAmp ....................................................................................
LTt001CS8, Precision OpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTt002, Oual, MatchedPrecisionOpAmp .........................................................................
LTt006, Precision, SingleSupplyOpAmp ...... ......................................................... ..........
LTt006S8, Precision, SingleSupplyOpAmp.... ................................. ................. .................
LTt007, Low Noise, High Speed Precision OpAmp ............................. .... ................. .................
LTt007CSIL Tt 037CS, Low Noise, High Speed Precision Op Amps. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTt008, PicoamplnputCurrent, MicrovoltOffset, Low Noise Op Amp ................... ... .............. .................
LTtOl0, Fast ± 150mA Power Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1012, PicoamplnputCurrent, Microvolt Offset, Low Noise OpAmp ............ ..... ....................................
LTtOI2S8, PicoamplnputCurrent, MicrovoltOffset, LowNoiseOpAmp...................................................
LTtOI3, OuaIPrecisionOpAmp.................................................................................
LTtOI3DS8, DuaIPrecisionOpAmp..............................................................................
LT1014, QuadPrecisionOpAmp ................................................................................
LT1022, High Speed, PrecisionJFETInputOpAmp ......................... ............................. ............
LTt024, Dual, MatchedPicoampere, Microvoltlnput, LowNoiseOpAmp ......... ........................ .................
LTt028, Ultra-Low Noise Precision High Speed Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTt028CS, Ultra-Low Noise Precision High Speed Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTl037, Low Noise, High Speed Precision OpAmp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1049, Low Power Chopper Stabilized Op Amp with Internal CapaCitors .................................................
LTC I 050, Precision Chopper Stabilized Op Amp with Internal Capacitors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTCI 051, Dual Precision Chopper Stabilized Op Amp with Internal Capacitors . . . . . . . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1052, ChopperStabilizedOpAmp ............................................................................
LTCI052CS, ChopperStabilizedOpAmp(CSOA™) . .................................................................
LTt055, Precision, High Speed, JFETlnputOpAmp..... ....... .............. ................ . ........... . ... ........
LTt056, Precision, High Speed, JFETlnputOpAmp........................... ............... . ............ ...........
LTt055S81LTI056S8, Precision, High Speed, JFETInputOpAmps.... ... ...... ......... .. ...... . ..... ...... ... .........
LTt057, Dual JFET Input Precision, HighSpeedOpAmp.... ... ...... . .. ... ... . . ... ....... . .... . ................ .. . ....
LTt057SILTI057IS, DualJFETlnputPrecision, High Speed Op Amp ................... . ....... .... . ............. ... .....
LTt 058, Quad JFETInput Precision, High Speed Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTt077, Micropower, Single Supply, PrecisionOpAmp .... ... ....... ......... ..... ....... ......... ...................
LTt078, Micropower, Dual, Single Supply, PrecisionOpAmp ..... .. .......... . . ... . ... . . . . . .. . .... . .... .. ... ... ... ... ..
LTt079, Micropower, Quad, Single Supply, PrecisionOpAmp ..........................................................
LTCIIOO, Precision, Single Supply, Instrumentation Amplifier(FixedGain: 100) .. . .... .... . .. .... ... .. ......... ............
LT11 01, Precision, Micropower, Single Supply Instrumentation Amplifier (Fixed Gain: 10 or 100) ...............................
LTtl02, High Speed, PreciSion, JFETlnputinstrumentation Amplifier (Fixed Gain: 100r 100) ...... .... ........ .............. ..
LTC 1150, ± 15V Chopper Stabilized Dp Amp with Internal Capacitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1178, 17/lA Max, Dual Single Supply, PrecisionOpAmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTt179, 17/lA Max, Quad Single Supply, Precision OpAmp ........................ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
2-2
2-11
2-23
2-25
2-41
2-53
2-57
2-69
2-73
2-85
2-105
2-117
2-121
2-141
2-121
2-145
2-153
2-161
2-177
2-57
13-10
2-181
13-13
2-197
2-217
2-219
2-219
2-231
2-235
2-247
2-235
13-27
2-251
2-251
13-35
13-36
13-48
13-49
2-267
2-267
INDEX
ENHANCED AND SECOND SOURCE PRODUCTS
LFI55/LF355.JFETlnputOpAmp. Low Supply Current. ................. , .. , ... , ... ' ' ....... , , ... , ...... .
LFI55A1LF355A. JFET InputOpAmp. Low Supply Current ......... , ............ , .............................. .
LFI56/LF356.JFETlnputOpAmp. High Speed ............................................. ', .......... .
LFI56A1LF356A. JFETlnputOpAmp. High Speed ........................ , ....................... , ..... .
LF412A. Dual PrecisionJFET InputOpAmp .......................................... , ........ , ........ , .. .
LH2108A. Dual LM1080pAmp ... . . .. . . .
. ..................... ' ........................ , ..
LM10/8(L)/C(L). LowPowerOpAmpand Reference ...................... , ........... , ... , .......... .
LM101A1LM301A. Uncompensated General Purpose Op Amp ................................ , ........................ .
LM107/LM307. Compensated General PurposeOpAmp ........ , ............................ , ... , .... .
LM108/LM308. SuperGainOpAmp ............................................................ .
LM108A/LM308A. SuperGainOpAmp ................................................. " ......... ,
LM118/LM318. High Slew RateOpAmp ................................ , ................. , .......... .
LM318S8. High Speed Op Amp .................................................. , .................... , ... .
LT118AILT318A./mprovedLMI180pAmp ...................................................................... .
LTC7652. Chopper-Stabilized Op Amp ................................. , ................................. .
OP-05. OP-05A. OP-05C. OP-05E.lnternally Compensated OpAmp ..... ' ....... , ........................... , , ... , ,
OP-07. OP-07A. OP-07C. OP-07E. Precision OpAmp ................. , ..... , . . . . . .
. ... , ..... .
OP-07CS8. Precision Op Amp ........................................ , ............. .
OP-1SA. OP-158. OP-15C. OP-15E. OP-15F. OP-15G. Precision. High Speed JFET InputOp Amp ..... ,
. , ....... .
OP-16A. OP-168. OP-16C. OP-16E. OP-16F. OP-16G. Precision. High Speed JFET InputOpAmp ...... , ............ , ' ...... ' ... .
OP-27A. OP-27C. OP-27E. OP-27G. Low Noise. Precision Op Amp .............. , ................................ , ....... .
OP-37A. OP-37C. OP-37E. OP-37G. Low Noise. High Speed OpAmp ......................................... , , .... .
OP-215. Dual PrecisionJFET InputOpAmp ............................................... " .................. ,., ..
OP-227A. OP-227C. OP-227E. OP-227G. Dual Matched. Low NoiseOpAmp ........................................... ,.
OP-237A. OP-237C. OP-237E. OP-237G. Dual High Speed. Low NOiseOpAmp ............................................. .
2-271
2-271
2-271
2-271
2-275
2-279
2-281
2-297
2-297
2-303
2-303
2-311
2-319
2-311
2-197
2-321
2-329
2-337
2-341
2-341
2-345
2-345
2-275
2-357
2-357
2-3
III
~7UD~,....-
_____O_P_A_M_P_S_EL_EC_T_IO_N_G_U_ID_E
miLITARY
PART NUMBER
SINGLE
LT1001AM
LT1001M
LT1006AM
LT1006M
LT1007AM
LT1007M
LT1008M
LT1010M
LTt012M
LTt022AM
LTt022M
LTt02aAM
LT102aM
LTt037AM
LTt037M
LTt055AM
LTt055M
LTt056AM
LTt056M
LT1077AM
LT1077M
LTC1050AM
LTC1050M
LTC1052M
LFI55A
LFI55
LFI56A
LFI56
LM10
LM101A
LM107
LM108A
LM108
LM118
LTtI8A
OP-D5A
OP-D5
OP·07A
OP·07
OP·15A
Op·15B
OP·15C
Op·16A
Op·16B
OP·16C
OP·27A
OP·27C
OP-37A
OP-37C
2-4
Vos
MAX
(,LV)
TC
Vos
(,LV/°C)
18
MAX
(nA)
15
60
50
80
25
60
120
90mV
0.6
1.0
1.3
1.8
0.6
1.0
1.5
0.6mV/·Ct
2.0
3.8
15
25
35
55
0.1
35
250
600
40
ao
25
60
150
400
180
450
40
60
5
5
5
2000
3500
2000
3500
2000
2000
2000
500
2000
4000
1000
150
500
25
75
500
1000
3000
500
1000
3000
25
100
25
100
ELECTRICAL CHARACTERISTICS
SLEW RATE
AVOL
MIN
MIN
(V/mV)
(V/~s)
NOISE
MAX 10Hz
(nVlv'ifz)
PACKAGES
AVAILABLE
150~A
400
1000
700
7000
5000
200
0.995
0.15
0.15
0.25
0.25
1.7
1.7
0.1
75
18
18
24t
24t
4.5
4.5
30
90t
H,J8
H,J8
H J8
H J8
H,J8
H,J8
H
H,K
1.5
5.0
9.0
0.1
0.05
0.05
200
150
120
0.1
23
18
30
50
60
H
H
H
o.a
1.0
0.6
1.0
4
8
4
8
0.4
0.4
0.05
0.05
0.05
5
15
5
15
2t
90
160
35
55
0.05
0.05
0.05
0.05
9
11
0.035
0.050
0.03
0.05
0.10
0.05
0.10
20
7000
5000
7000
5000
150
120
150
120
250
200
3162
1000
1000
75
50
75
50
120
11
11
11
11
10
7.5
12
9
0.12
0.12
1.7
1.9
4.5
4.5
50
60
50
60
40
29t
4t
0.6~Vp.p--
4t
3t
5
5
10
9
0.6~Vp.p- -
25t25t15t15t50t
H,J8
H,J8
H,Ja
H,J8
H
H
H
H
H,J8
H,J8
H,J8
H,J8
H,J,J8
H
H
H
H
H,J8
15
15
5
15
75
75
2
3
250
250
2
3
2
3
0.05
0.1
0.2
0.5
0.1
0.2
40
80
40
80
25
0.3
0.3
0.1
0.1
50
50
0.1
0.1
0.1
0.1
10
7.5
5
18
12
9
1.7
1.7
11
11
28t
28t
30t
30t
42t
42t
18
18
18
18
20t20t20t20t20t20t5.5
8.0
5.5
8.0
H J8
H,J8
H
H
H
H,J8
H,J8
H,J8
H J8
H J8
H
H
H
H
H
H
H,J8
H,J8
H,J8
H,J8
0.9
2.0
0.6
1.3
5
10
15
5
10
15
0.6
1.8
0.6
1.8
450
25
40
25
25
200
300
200
300
200
100
75
50
100
75
50
1000
700
1000
700
0.5~Vp.p--
IMPORTANT FEATURES
Extremely Low Offset Voltage
Low Noise, Low Drift
Single Supply Operation, Fully
Specified for +5V Supply
Extremely Low Noise, Low
Drift
Low Bias Current, Low Power
High Speed Buffer, Drives
± 10V into 751l.
Low Vos, Low Power
Very High Speed JFET Input
Op Amp with Very Good DC
Specs.
Lowest Noise, High Speed,
Low Drift
Extremely Low Noise, High
Speed
Lowest Offset, JFET Input
Op Amp Combines High
speed and Precision
Micropower, Single Supply,
Precision, Low Noise
No External Caps Required,
Chopper Stabilized
Chopper Stabilized Low Noise
JFET Inputs, Low I Bias, No
Phase Reversal, Guaranteed
TC Vos on all Grades
On·Chip Reference Operates
with +1.2V Sinale Batterv
Uncompensated Gen. Purp.
Compensated Gen. Purp.
Low Bias Current, Low
Supply Current
High Speed, 15MHz
High Speed 15MHz
Low Noise, Low Offset Drift
with Time
Low Initial Offset, Low Noise,
Low Drift
Precision JFET Input, Low I
Bias, No Phase Reversal
Precision JFET Input, High
Speed, No Phase Reversal
Very Low Noise, Unity Gain
Stable
Very Low Noise, Stable for
Gains;,5
OP AMP SELECTION GUIDE
miLITARY
ELECTRICAL CHARACTERISTICS
SLEW RATE
AYOL
MIN
MIN
(V/mV)
(V/~s)
Vos
MAX
lJ.V)
TC
Vos
lJ.V/'C)
IB
MAX
(nA)
60
100
150
300
50
100
450
800
0.9
1.3
2.0
2.5
1.5
2.0
7
12
3.0
4.5
20
30
0.12
0.20
0.05
0.075
400
350
1500
1200
250
180
150
100
LT1078AM
LT1078M
LT1178AM
LT1178M
LF412AM
70
120
70
120
1000
2.0
2.5
2.2
3.0
10
0.25
0.35
5
6
0.1
LH2108A
LH2108
Op·215A
OP·215C
OP·227A
Op·227C
Op·237A
OP·237C
QUAD
LT1014AM
LT1014M
LT1058AM
LT1058M
500
2000
1000
3000
80
180
180
5.0
15.0
10
20
1.0
1.8
1.0
1.8
2
2
0.1
0.2
40
80
40
80
180
300
800
1000
2.0
2.5
10
15
LT1079AM
LT1079M
LT1179AM
LT1179M
120
150
100
150
PART NUMBER
DUAL
LT1002AM
LT1002M
LT1013AM
LT1013M
LT1024AM
LT1024M
LT1057AM
LT1057M
NOISE
MAX 10Hz
(nV/~z)
PACKAGES
AVAILABLE
0.15
0.15
0.2
0.2
0.1
0.1
10
8
20
20
24t
24t
33
33
75
80
J
J
H,J8
H,J8
0
0
H,J8
H,J8
250
200
140
110
100
0.07t
0.07t
0.013
0.013
10
40
29t
75
50t
20t·
H,J8
H J8
H J8
JN
H,J8
40
25
150
50
30t
30t
20t·
2Ot·
6
9
6
9
0
0
2000
3000
2000
0.1
0.1
10
8
1.7
1.7
10
10
H,J8
H,J8
J
J
J
J
20
30
0.05
0.075
1500
1200
150
100
0.2
0.2
10
8
24t
24t
75
80
J
J
J
J
2.0
2.5
2.2
3.0
0.25
0.35
3
6
250
200
140
110
0.07t
0.07t
0.013
0.013
40
29t
75
50t
J
J
J
J
Vos
MAX
lJ.V)
TC
Vos
lJ.V/'C)
IB
MAX
(nA)
25
0.6
1.0
1.3
1.8
3.5
0.6
1.0
1.5
2.0
3.8
15
25
25
35
55
0.1
80
3000
IMPORTANT FEATURES
Dual, Matched LT100l High
CMRR, PSRR Matching
Precision Dual Op Amp in
8·Pin Package
LowVos, Low Power,
Matching Specs
Low Offset, JFET Input
Multiple Op Amps Combine
High Speed and Excellent DC
Specs
Micropower, Precision, Single
Supply, Low Noise Dual
17JLA Max, Single Supply,
Precision Dual
High Pertormance Dual JFET
InputOpAmp
Dual, Low Bias Current, Side
Brazed Package
High Performance Dual JFET
InputOpAmp
Dual Matched OP·27
Dual Matched OP·37
Precision Quad Op Amp
in 14·Pin Package
Low Offset JFET Input
Multiple Op Amps Combine
High Speed and Excellent DC
Specs
Micropower, Precision, Single
Supply, Low Noise Quad
17~A Max, Single Supply,
Precision Quad
t Typical Spec
• 100Hz Noise
.. DC to 1Hz Noise
commERCIAL
PART NUMBER
SINGLE
LT1oo1AC
LT1oo1C
LT1006AC
LT1006C
LT1006S8
LT1007AC
LT1007C
LT1008e
80
50
80
400
25
80
120
ELECTRICAL CHARACTERISTICS
SLEW RATE
AYOL
MIN
MIN
(VlmV)
(V/~)
450
400
1000
700
700
7000
5000
200
0.15
0.15
0.25
0.25
0.25
1.7
1.7
0.1
NOISE
MAX 10Hz
(nV/~z)
18
18
24t
24t
25
4.5
4.5
30
PACKAGES
AVAILABLE
H,J8, N8
H, J8, N8, S8
H J8
H J8 N8
IMPORTANT FEATURES
Extremely Low Offset Voltage
Low Noise, Low Drift
Single Supply Operation, Fully
Specified for +5V Supply
sa
H J8 N8
H J8 N8 S
H N8
Extremely Low Noise, Low
Drift
Low Bias Current Low Power
2-5
OP AMP SELECTION GUIDE
commERCIRl
PART NUMBER
SINGLE
LT10l0C
LTt012A
LT1012C
LT1012D
LTt012SS
LT1022AC
LT1022CH
LT1022CN8
LT1028AC
LT1028C
LTt037AC
LTt037C
LTt055AC
LT1055C
LTt055CNS
LTt05558
LT1056AC
LT1056C
LT1056CN8
LT1056S8
LT1077AC
LT1077C
LTC1050AC
LTC1050C
LTC1052C
LTC7652C
LF355A
LF356A
LM10B
LM10BL
LM10C
LM10CL
LM30SA
LT31SA
LM318
OP'()5C
OP.()5E
OP'()7C
OP·07E
OP·15E
Op·15F
OP·15G
OP·16E
Op·16F
Op·l6G
OP·27E
Op·27G
OP·37E
Op·37G
DUAL
LT1002AC
LT1002C
2-6
ELECTRICAL CHARACTERISTICS
SLEW RATE
AvoL
MAX
MIN
MIN
(nA)
(V/mV)
(VIps)
Vos
MAX
(PV)
TC
Vos
(PV/'C)
100mV
0.6mV/oCt
250pA
0.995
25
50
60
120
250
600
1000
0.6
1.5
1.7
1.8
5.0
9.0
15.0
O.S
1.0
0.6
1.0
4
S
12
15
4
S
12
15
0.4
0.4
0.05
0.05
0.05
0.05
5
5
2t
2t
5t
5t
5
100
0.15
150
0.2S
0.05
0.05
0.05
90
ISO
35
55
0.05
0.05
0.05
0.1
0.05
0.05
0.05
0.1
9
11
0.035
0.050
0.03
0.03
0.05
0.05
20
20
30
30
7
250
300
200
200
200
150
120
100
7000
5000
7000
5000
150
120
120
120
150
120
120
120
250
200
3162
1000
1000
1000
75
75
120
60
SO
40
80
200
25
120
40
80
25
60
150
400
700
1500
180
450
800
1500
40
60
5
5
5
5
2000
2000
2000
2000
4000
4000
500
1000
10000
1300
500
150
75
500
1000
3000
500
1000
3000
25
100
25
100
80
100
la
500
I
I
4.5
2.0
1.8
1.3
5
10
15
5
10
15
0.6
1.8
0.6
1.8
7
4
7
4
0.05
0.1
0.2
0.05
0.1
0.2
40
80
40
80
0.9
1.3
3.0
4.5
75
90t
H,K,T
0.1
0.1
0.1
0.1
23
IS
IS
11
11
11
11
10
7.5
7.5
7.5
12
9
9
9.0
0.12
0.12
4t
4t
3t
3t
5
10
30
30
30
30
50
60
60
0.1
50
50
0.1
0.1
0.1
0.1
10
7.5
5
18
12
9
1.7
1.7
11
11
1.9
4.5
4.5
50
80
80
70
50
60
60
70
40
29t
0.6 Vp·p··
0.6 Vp·p··
0.5 Vp·p··
0.5.Vp·p· •
25t·
15t·
50t
50t
50t
50t
30t
42t
42t
20
18
20
18
20t·
20t·
20t·
20t·
20t·
20t·
5.5
S.O
5.5
S.O
H NS
H NS
H NS
S8
H
H
NS
H,J8, NS
H,JS, NS,S
H,J8, NS
H,J8,N8 S
H
H
NS
58
H
H
NS
58
H,J8 N8 58
H JS NS,58
H,JS NS SS
H,J8NSSS
H,NS N
H N8
H NS
H NS
H,JS
H,JS
H,JS NS
H JS NS
H,NS
H,J8,NS
H JS N8,58
H,J8, NS
H J8 NS
HJ8N858
H JS N8
H N8
H NS
H NS
H N8
H N8
H N8
H J8 N8
H N8
H J8, N8
H,NS
0.15
0.15
20
20
J, N
JN
-
120
200
100
75
50
100
75
50
1000
700
1000
700
400
350
PACKAGES
AVAILABLE
-
200
I
NOISE
MAX 10Hz
(nV/v'Hz)
I
I
1.7
IMPORTANT FEATURES
High Speed Buffer, Drives
+ 10V into 750.
Low Yes, Low Power
Very High Speed JFET Input
Op Amp with Very Good DC
Specs
Lowest Noise, High Speed,
Low Drift
Extremely Low Noise, High
Speed
Lowest Offset, JFET Input
Op Amp Combines High
Speed and Precision
Micropower, Single Supply,
Precision, Low Noise
No External Caps Required,
Chopper Stabilized
Chopper Stabilized, Low Noise
JFET Inputs, Low I Bias, No
Phase Reversal
On-Ghip Reference, Operates
with +1.2V Single Battery
Low Bias Supply Current
Hiah Speed, 15MHz
High Speed, 15MHz
Low Noise, Low Offset Drift
with Time
Low Initial Offset, Low Noise,
Low Drift
Precision JFET Input, Low I
Bias, No Phase Reversal
Precision JFET Input, High
Speed, No Phase Reversal
Very Low Noise, Unity Gain
Stable
Very Low Noise, Stable for
Gains,,5
J
Dual, Matched LT1001 High
CMRR, PSRR Matching
OP AMP SELECTION GUIDE
commERCIRI.
PART NUMBER
DUAL
lT1013AC
LT1013C
LT1013D
LT1024AC
LT1024C
LT1057AC
LT1057ACN8
LT1057C
LT1057CN8
LT1057S
LT10571S
LT1078AC
lT1078C
LT1178AC
LT1178C
LF412AC
Op·215E
OP·215G
OP·227E
Op·227G
Op·237E
Op·237G
QUAD
LT1014AC
LT1014C
lT1014D
LT1058AC
LT1058ACN
LT1058C
LT1058CN
LT1079AC
LT1079C
LT1179AC
LT1179C
ELECTRICAL CHARACTERISTICS
SLEW RATE
AVOL
MIN
MIN
(V1mV)
(V/~s)
Vos
MAX
(PV)
TC
Vos
(PV/'C)
Is
MAX
(nA)
150
300
800
50
100
450
450
800
800
2000
2000
70
120
70
120
1000
1000
3000
80
180
80
180
2.0
2.5
5.0
1.5
2.0
7
10
12
16
5t
5t
2.0
2.5
2.2
3.0
10
10
20
1.0
1.8
1.0
1.8
20
30
30
0.12
0.20
0.05
0.05
0.075
0.075
0.1
0.1
8
10
5
6
0.1
0.1
0.2
40
80
40
80
1500
1200
1200
250
180
150
150
100
100
100
100
250
200
140
110
100
150
50
3000
180
300
800
600
800
1000
1000
120
150
100
150
2.0
2.5
5.0
10
15
15
22
2.0
2.5
2.2
3.0
20
30
30
1500
1200
1200
150
150
100
100
0.05
0.05
0.075
0.075
8
10
5
6
2000
3000
2000
250
200
140
110
NOISE
MAX 10Hz
(nV/-'ifz)
PACKAGES
AVAILABLE
0.2
0.2
0.2
0.1
0.1
10
10
8
8
8
8
O.ort
O.ort
0.013
0.013
10
10
8
1.7
1.7
10
10
24t
24t
24t
33
33
75
75
80
80
13
13
40
29t
75
50t
2Ot·
2Ot·
20t·
6
9
9
H,J8
H J8 N8
N8
N
N
H,J8
N8
H J8
N8
S
S
H J8 N8
H J8 N8
H J8 N8
H J8, N8
H J8, N8
H J8 N8
H,J8 N8
JN
JN
JN
JN
0.2
0.2
0.2
10
10
8
8
O.07t
O.ort
0.013
0.013
24t
24t
24t
75
75
80
80
40
29t
75
50t
J
JN
N
J
N
J
N
JN
J,N
JN
JN
6
IMPORTANT FEATURES
Precision Dual Op Amp
in B-Pin Package
sa
Low Vas, Low Power,
Matching Specs
Low Offset JFET Input
Multiple Op Amps Combine
High Speed and Excellent DC
Specs
Micropower, Precision,
Single Supply, Low Noise Dual
17~ Max, Single Supply,
Precision Dual
High Performance Dual JFET
InputOpAmp
Dual Matched OP·27
Dual Matched OP-37
Precision Quad Op Amp
in t4-Pln Package
Low Offset JFET Input
Multiple Op Amps Combine
High Speed and Excellent DC
Specs
Micropower, Precision, Single
Supply, Low Noise Quad
17~ Max, Single Supply,
Precision Quad
t Typical Spec
• 100Hz Noise
•• DC to 1Hz Noise
2-7
OP AMP SELECTION GUIDE
SELECTIOft BY DESIGft PAAAmETEA
LOW OFFSET VOLTAGE
Max Input Offset Voltage (TA= 25°C)
s15~V
s25~V
s75~V
sl50~V
LT1001AM
LTC1050A
LTC1050
LTC1052
LTC7652
LT1OO1AC
LT1007A
LT1012A
LT1037A
OP·07A
OP·27A
OP·27E
OP·37A
OP·37E
LT1OO1
LT1OO2A(D)
LT1OO6A
LT1OO7
LT1012
LT1012D
LT1012SS
LT1024A(D)
LT1037
LT1077
LT107SA(D)
LT117SA(D)
OP·07E
OP·07
LT1002
LT1006
LT1006
LT1012S8
LT1013A(D)
LT1024 (D)
LT1028
LT1055AM
LT1055AC
LT1079A(Q)
LT117S(D)
LT1179A(Q)
LTl179(Q)
OP·05A
OP·07C,D
OP·27C
OP·37C
OP·227A, E(D)
OP·237A, E(D)
s5nA
LT100l
LT1OO2(D)
LTl17SA(D)
LT1179A(Q)
OP·05E
OP·07E
s10nA
LT1077A
LT107SA(D)
LT1079A(Q)
LT107S(D)
LT1079(Q)
LTl17S(D)
LTl179(Q)
OP·05C
LM308A
LOW BIAS CURRENT
Max Input Bias Current (Tj = 25°C)
sO.2nA
LT100s
LT1012 ALL
LT1022 ALL
LT1024 ALL (D)
LT1055ALL
LT1056 ALL
LT1057 ALL (D)
LT105S ALL (Q)
LF155 ALL
LF156 ALL
LF412AALL
LTC7652
LTC1050
LTC1052
OP·15 ALL
Op·16ALL
OP·215ALL(D)
(D)-Dual Op Amp
(Q)-Quad Op Amp
2-8
s3nA
LT1001A
LT1002A(D)
LT1006ALL
LM108
LM108A
OP·05A
OP·05
OP·07A
OP-07
slmV
LT1013(D)
LT1014(Q)
LT1014A(Q)
LT1022 ALL
LT1055C
LT1055M
LT1056AM
LT1056AC
LT1058M
LT1056C
LTl 057 ALL (D)
LT1058 ALL (Q)
LT107S(D)
LT1079(Q)
LF412A
LH2108A(D)
LM108A
LM30SA
OP·05
OP-05E
OP·15A,E
OP·15B,F
OP·16A, E
OP·16B,F
OP·215A, E(D)
OP AMP SELECTION GUIDE
SELECTion BY DESIGn PAAAmETEA
LOW POWER
Maximum Supply Current (per Amplifier)
LOW NOISE
Typ Equivalent Input Noise Voltage
per$z, f=10Hz, Rs= 1000
slnV/v'Hz
LT1028 ALL
s5nVv'Hz
LT1007 ALL
LT1037 ALL
OP·27 ALL
OP·37 ALL
OP·227 ALL (01
OP·237 ALL (DI
s25nV/VHz
LTlOOl ALL
LT1002 ALL (01
LTlO06ALL
LT1008
LTlO12
LT1013ALL(DI
LT1014 ALL (DI
LT1022 ALL
LTC1050
LTC1052
*LT1055 ALL
*LT1056ALL
LTC7652
*LFI55ALL
*LF355 ALL
*LFI56ALL
OP·05ALL
OP·07 ALL
*Op·15ALL
*Op·16ALL
s60~
LTl077
LT1078(DI
LT1079 (01
sImA
LT1006
LT1008
LT1012ALL
LTlOI3(DI
LTl014 (01
LT1024(DI
LM108A
LH2108A(DI
HIGH GAIN
Typ Open Loop Gain
2:200
:v
v
2:1000 mV
LT1001
LT1002(01
LT1006
LT1008
LT1012 ALL
LT118A
LT318A
OP-05
OP·07
LTlO77
LTl078 (01
LTl079 (01
LTl 178 (01
LT1179 (01
*100HzNoise
HIGH SLEW RATE
Typ Slew Rate
2:10V/iLS
LT1022 ALL
LT1028 ALL
LT1037 ALL
LTl055 ALL
LT1056A
OP·37 ALL
OP·16A,B
Op·16E, F
OP·237 ALL (01
LF412A(DI
Op·215A, E(DI
LT1057A(01
LT1058A(01
s50~A
LT1078A(DI
LT1079A(01
LT1178A(DI
LT1178 (01
LT1179A(01
LT1179 (01
2:50V/iLS
LT118A/318A
LM118/318
LT10l0
LT1006A
LT1007
LTl013 (01
LT1014(01
LT1028
LT1037
OP·27
OP·37
OP·227(DI
OP·237 (01
LTC1050
LTC1052
LTC7652
(Ol-Dual Op Amp
(Ol-Ouad Op Amp
PACKAGES
® 0
Q
morn
W
0 0 0 0 €CO
wmw W wmw w rmww
H
TO·5
8 LEAD
10 LEAD
J8
HERMETIC
DIP
8LEAD
J
HERMETIC
DIP
14LEAD
16 LEAD
18LEAD
20 LEAD
24 LEAD
'000
"~oO
N8
PLASTIC
DIP
8 LEAD
N
PLASTIC
DIP
14LEAD
16LEAO
18 LEAD
20 LEAD
24 LEAD
08
HERMETIC
DIP
8 LEAD
D
HERMETIC
DIP
14 LEAD
16 LEAD
lBLEAO
~
c::J
S8
PLASTIC
SO
BLEAD
S
PLASTIC
SO
14 LEAD
16LEAD
=
~
D ~~
~
S
PLASTIC
SOL
16LEAD
18 LEAD
20 LEAD
24 LEAD
28 LEAD
W
CERPAK
10 LEAD
2-9
NOTES
2-10
L7UO~~----p-re-C-iS-io-n~o-p-e-ra-L~~i~-~-~~~
Amplifier
FEATURES
DESCRIPTion
• Guaranteed Low Offset Voltage
LT1001AM
15JlV max
LT1001C
60JlV max
• Guaranteed Low Drift
LT1001AM 0.6JlV 1°C max
LT1001C
1.0JlV fOC max
• Guaranteed Low Bias Current
LT1001AM
2nA max
LT1001C
4nAmax
• Guaranteed CMRR
LT1001AM
114dB min
LT1001C
110dB min
• Guaranteed PSRR
LT1001AM
110dB min
LT1001C
106dB min
• Low Power Dissipation
LT1001AM
75mW max
LT1001C
80mW max
• Low Noise 0.3JlVp_p
The LT1001 significantly advances the state-of-theart of precision operational amplifiers. In the design,
processing, and testing ofthe device, particular attention has been paid to the optimization of the entire distribution of several key parameters. Consequently, the
specifications of the lowest cost, commercial temperature device, the LT1001C, have been dramatically improved when compared to equivalent grades of
competing precision amplifiers.
Essentially, the input offset voltage of all units is less
than 50JlV (see distribution plot below). This allows . . .
the LT1001AM/883 to be specified at 15JlV.lnput bias . .
and offset currents, common-mode and power supply
rejection of the LT1001C offer guaranteed performance which were previously attainable only with expensive, selected grades of other devices. Power
dissipation is nearly halved compared to the most
popular precision op amps, without adversely affecting noise or speed performance. A beneficial by-product of lower dissipation is decreased warm-up drift.
Output drive capability ofthe LT1001 is also enhanced
with voltage gain guaranteed at 10 rnA of load current.
For similar performance in a dual precision op amp,
with guaranteed matching specifications, see the
LT1002. Shown below is a platinum resistance thermometer application.
APPLICATions
•
•
•
•
Thermocouple amplifiers
Strain gauge amplifiers
Low level Signal processing
High accuracy data acquisition
Typical Distribution
of Offset Voltage
Vs = ± 15V, TA = 25°C
Linearized Platinum Resistance Thermometer
with ± O.025°e Accuracy Over 0 to 1000 e
1 MEG·'
+15
1,2k*·
200 1-+-+-+-+
10k"
J>-+---+--200n
9Ok"
LM129
20k
Ln>lEAAITY
TRIM
OUTPUT
0 to 10V ~
0 to 100°C
~=> 150
:s
1-+-+--+--+--.ddH-+-l--/"FT+-+-+---l
~ 100
1-+-+-++-+"",
0:
::>
:z
10k'
OFfSET TRIM
o
• ULTRONIX 105A WIREWOUND
"" 1% FILM
t PLATINUM RTD
118MF (ROSEMOUNT, INC.)
* trim
Trim ""quence: trim offset
1000.0n),
linearity
1138.7n), trim gain
(O°C~
(35°C~
(100°C~ 1392.6n).
Repeat until all three
points are fixed with ± .02!)OC.
'--<=I="--L...L..J.:....l..c--'-'-'L....J...-"-",-="-'
-60
-40
-20
20
40
60
INPUT OFFSET VOLTAGE (MICROVOLTS)
2-11
LT100l
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage. . . . . .. . .. .. .. . . . .. .. . .. ± 22V
Differential Input Voltage. . . . . . . . . . . . . . .. ± 30V
Input Voltage. . . . . . . . . . . . . . . . . . . . . . . .. ± 22V
Output Short Circuit Duration. . . . . . . . . .. Indefinite
Operating Temperature Range
LT1001AM/LT1001M ......... -55°C to 150°C
LT1001AC/LT1001C ............ O°C to 125°C
Storage: All Devices .......... -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
TOPVIfW
ORDER PART NUMBER
LT1 001 AMH/883
LT1001MH
LT1001ACH
LT1001CH
(CASE)
HPACKAGE
METAL CAN
V-
TOP VIEW
~~~M
1
-IN
2
+IN
V-
3
4
i8+
7
~~~MV+
6
5
OUT
NC
B
LT 100 1AMJ8/883
LT1001MJ8
LT1001ACJ8
LT1001CJ8
JB PACKAGE
BPIN HERMETIC DIP
LT1001ACN8
LT1001CN8
N8 PACKAGE
B PIN PLASTIC DIP
ELECTRICAL CHARACTERISTICS
VS
=
± 15V, TA
=
25°C, unless otherwise noted
LT1001AM/883
LTlOOIAC
SYMBOL
PARAMETER
Vos
Input Offset Voltage
~
t. Time
los
Ib
en
en
Long Term Input Offset Voltage
Stability
Input Offset Current
Input Bias Current
Input NOise Voltage
Input Noise Voltage Density
CONDITIDNS
LTlOO1AM/883
Note 1
LT1001AC
Notes 2 and 3
O.IHz to 10Hz (Note 2)
10 = 10Hz (Note 5)
10 = 1000Hz (Note 2)
Large Signal Voltage Gain
RL '" 2kll, Vo = ± 12V
AwL
RL '" lkll, Vo = + 10V
V
CMRR
Common Mode Rejection Ratio
CM = ±13V
Power Supply Rejection Ratio
PSRR
Vs = ± 3V to + lBV
Rln
Input ReSistance Differential Mode (Note 4)
Input Voltage Range
VOUT
Maximum Output Voltage Swing
RL '" 2k!l
RL '" lk!l
Slew Rate
SR
RL '" 2kll (Note 4)
GBW
(Note 4)
Gain-Bandwidth Product
Pd
Power Dissipation
No load
No load, V, = ±3V
See Notes on page 3.
2-12
liN
450
300
114
110
30
+13
±13
±12
0.1
0.4
m
MAX
7
15
10
25
0.2
1.0
0.3
2.0
±0.5 ±2.0
0.3
0.6
10.3
18.0
9.6
11.0
800
500
126
123
100
+14
±14
±13.5
0.25
0.8
46
75
4
6
LTlOOII/LTlOOIC
np MAX
liN
18
400
250
110
106
15
±13
±13
±12
0.1
0.4
60
0.3
1.5
0.4
3.8
±0.7 ±4.0
0.6
0.3
10.5
18.0
11.0
9.8
800
500
126
123
80
±14
±14
±13.5
0.25
0.8
48
4
UNITS
p.V
JOY/month
nA
nA
p.V..P
nVv'Hz
VlmV
dB
dB
Mil
V
V
Vlp.s
MHz
80
8
mW
LT100l
ELECTRICAL CHARACTERISTICS
SYMBOL
Vos
A. emp
~
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
Power Dissipation
los
18
AwL
CMRR
PSRR
Your
Pd
Vs
=
~
.t. Temp
Your
Pd
=
COIIDITIONS
RL ;;. 2kn, Vo = ± 10V
VCM = ± 13V
Vs=+3to±18V
Rl ;;. 2kn
No load
± 15V, -55°e
•
~ TA ~ 125°e, unless olherwlse noled
mOOIAM/883
MIN
lYP
MAX
60
30
0.2
0.6
•
•
• 300
• 110
• 104
• ±13
• ±12.5
•
•
0.8
4.0
±1.0 ±4.0
700
122
117
±14
+13.5
55
90
mOOIM
Mill
m
MAX
160
1.0
UNITS
p.V
1.2
7.6
±1.5 ±8.0
200
700
106
120
100
117
+13
+14
+12.0 +13.5
60
100
nA
nA
V/mV
dB
dB
V
V
mW
45
0.3
p'vrc
Ell
± 15V, Doe ~ TA ~ 70 oe, unless otherwise noted
SYMBOL
Vos
los
18
AVOl
CMRR
PSRR
PARAMETER
Input Offset Voltage
Average Offset Voltage Drift
VS
PARAMETER
Input Offset Voltage
Average Offset Voltage Drift
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Common Mode Rejection Ratio
Power Supply Rejection RatiO
Input Voltage Range
Output Voltage Swing
Power Dissipation
COIliDITIONS
Rl ;;. 2kn, Vo = ± 10V
VCM = ±13V
Vs = ± 3V to ± 18V
RL ;;. 2kn
No load
The. denotes the specifications which apply over the full operating
temperature range.
Nola 1: Offset voltage for the LT1001AM/883 and LT1001AC are
measured after power is applied and the device is fully warmed up.
All other grades are measured with high speed test eqUipment,
approximately 1 second after power is applied. The LT1001AM/883
receives 168 hr. burn-in at 125°C. or equivalent.
•
•
•
•
•
•
•
•
••
MI.
LT10011C
TVP
MAX
20
60
0.6
0.2
0.5
3.5
±0.7 ±3.5
750
350
110
124
106
120
±13 ±14
± 12.5 ±13.8
50
85
MIN
LT1001C
TYP
30
0.3
MAX
110
1.0
5.3
0.6
±1.0 ±5.5
750
250
123
106
103
120
±13 ±14
± 12.5 ± 13.8
90
55
UNITS
p.V
p'vrc
nA
nA
V/mV
dB
dB
V
V
mW
Noll 2: This parameter is tested on a sample basis only.
Noll 3: Long Term Input Offset Voltage Stability refers to the
averaged trend line of Vo• versus Time over extended periods after
the first 30 days of operation. Excluding the Initial hour of operation,
changes in Vo• during the first 30 days are typically 2.5/tV.
Noll 4: Parameter is guaranteed by design.
Noll 5: 10Hz noise voltage density is sample tested on every lot.
Devices 100% tested at 10Hz are available on request.
2-13
LT100l
TYPICAL PERFORmAnCE CHARAaERISTICS
Typical Distribution of OHset
Voltage Drift with Temperature
Offset Voltage Drift with Temperature
01 Representative Units
W
warm-Up Drift
r-,--,--,--r--r--'~
I
40 I-+--If---+--+
80
~
60
40
H-+-+++
~
H-+-+-+
-0.2 0 +0.2 +0.6
TEMPERATURE ("C)
Long Term Stability of Four
Representative Units
r--
I/lCORNER
4Hz
r
~~
~IIA"ml !II. IIAI. ~J
lllilJ.\A
IiI" 1 '''lW •• 1fIII LIWIlAi 1'("
[r(
GE
lIfCORNER
""'
1
10
10
4
TIME (SECONDS)
1.4
06
.
0.1
1000
100
"-
~ 0.4
ii5
I-
~ 0.2
t\..
"
-50 -25
Input Bias Current vs.
Differential Input Voltage
Iv~~f
Vs -± 15V
TA - 25°C
J
DEVICE WITH POSITIVE 1T CUjNT
~
. . . r-.... r- :-r-
DEVICE WiTH NEGATIVE INPUT CURRENT
-1.0
OFFSfT CURLENT
25
50
75
100
I
Vs - ± 15V
TA - 25°C
["'.. ~CURREINT
TEMPERATURE ("C)
2-14
o
30
1.0
VS-±15V
'\.
-10
TIoE (MONTHS)
1.5
<"
~
~
~
i
13
Input Bias Current
Over the Common Mode Range
S 1.2
~
0.3
I
FREQUENCY (Hz)
Input Bias and OHset Current
vs Temperature
'"
05
&~
~
V
~
100
/-V V
V 125°C
r
.3
~
25°C
co
200
0.5
100f___~f___~~_+-_+-_+-~
~ 80f___~f___~~~~-+--+-~
~ 60f___~~~~_+~~~_+·-~
"
ffi 40
~--f___~-_+-_+-~~d
20
)--f___~-_+-_+-_+-~
~
10
125
100
1k
10k
lOOk
1M
a1
50
/;
co
~
"~ ~IStTtVE
-'"
g§§
SUPPLY VOLTAGE (V)
40
30
0--0
~CI) 20
SWING
'-'
r--....
r-.....
r--
10
·10
:1
100
300
1000
100
lk
10k
lOOk
Output Short Circuit Current
vs Time
Output Swing vs. Load Resistance
NJJSUj
10
FREQUENCY (Hz)
..
V"
VS~T15V
±9 ±12 ±15 .1B ±21
10
FREQUENCY (Hz)
40
TA" 25°C
I ' III
±6
~
20
75
-5~ ~o'C
.§.
180
Power Supply Rejection Ratio
vs Frequency
16
"
B5
FREQUENCY (MHz)
5
40
Supply Current vs Supply Voltage
~ 15
~
a:
~
160
'\
10k lOOk 1M 10M
60
TEMPERATURE °C
2.0
140
140 , - - - , - - , - - , - - - , - - - - , - - ,
I"
~ 100
:
-
V-
-4 )---+---1
- -.....
OJ
~
.0
.B
6
4
.2
5;1 4 f----~=;±;;~'kc.
':J
!$
Common Mode Rejection Ratio
vs Frequency
140
§'
i_
0--
FREQUENCY (Hz)
Common Mode Limit
vs Temperature
+
.2
.4
.6
B
.0
lk
120
w
-20
-50 -25
OJ 12 r----",n.---+--+-+.Hi!.l-t
!!.
~ 8 f-----+~4'I.++-
c-- -
Ns~ ± 15V
!$
16
25°C
~
3k
LOAD RESISTANCE (,,)
0
-
V-
5~OC~
25°C125°C
VS~I±15V
I
125°C
-
25°C
-55°C
i
10k
TIME FROM OUTPUT SHORT (MINUTESI
2-15
LT100l
TYPICAL PERFORmAnCE CHARACTERISTICS
Voltage Follower Overshoot
vs Capacitive Load
Small Signal Transient Response
Small Signal Transient Response
100 r--~'--------'----'
VS~±15V
~~ : ~~~~V
80
RL
>
---l------J
50k
0'------------1-------'-----'
100
1000
10,000
100,000
"'~
CAPACITIVE LOAD (PICOFARADS)
Maximum Undistorted
Output vs. Frequency
Large Signal Transient Response
28
-
Closed Loop Output Impedance
vsl~ IJW
TA
~
100
100
II-T--C::;:::j:::=:j
o01
I---~-~-I-
+25°C
\
10
0.001 L---LL----'---_..L----'_--'
10
100
lk
10k
lOOk
1000
FREQUENCY (Hz)
FREQUENCY (kHz)
APPLICATions InFORmATion
Application Notes and Test Circuits
The LT1001 series units may be inserted directly into
OP-07, OP-05, 725, 108A or 101A sockets with or
without removal of external frequency compensation
or nulling components. The LT1001 can also be used
in 741, LF156 or OP-15 applications provided that the
nulling circuitry is removed.
The LT1001 is specified over a wide range of power
supply voltages from ± 3V to ± 18V. Operation with
lower supplies is possible down to ± 1.2V (two Ni-Cad
batteries). However, with ± 1.2V supplies, the device
is stable only in closed loop gains of + 2 or higher (or
inverting gain of one or higher).
Unless proper care is exercised, thermocouple effects
caused by temperature gradients across dissimilar
2-16
+1,CL-l000pF
metals at the contacts to the input terminals, can exceed the inherent drift of the amplifier. Air currents
over device leads should be minimized, package leads
should be short, and the two input leads should be as
close together as possible and maintained at the same
temperature.
Test Circuit for Offset Voltage and its Drift with Temperature
Rl
*50k
+15V
R2
1000
~----<~-Vo
* RESISTORS
MUST HAVE LOW
THERMOELECTRIC POTENTIAL.
R3
50k
-15V
Vo
~
1000 VOS
•• THIS CIRCUIT IS ALSO USED AS THE BURN-IN
CONFIGURATION FOR THE LT1001, WITH SUPPLY
VOLTAGES INCREASED TO ",2{)V, Rl =R3=10k,
R2 = 2000, Av=100.
LT100l
Offset Voltage Adjustment
The input offset voltage of the LT1001, and its drift with temperature, are permanently trimmed at wafer test to a low level.
However, If further adjustment of Vas is necessary, nulling with
a 10k or 20k potentiometer will not degrade drift with temperature. Trimming to a value other than zero creates a drift of (Vosl
300) p,V/oC, e.g. if Vas Is adjusted to 300 ,.V, the change in drift
will be 1,.vrc. The adlustment range with a 10k or 20k pot is
approximately ± 2.5mY. If less adjustment range is needed, the
sensitivity and resolution of the nullin.ll can be lmproved by using a smaller pot in conjunction with fixed resistors. The example below has an approximate null range of ± 100 ,.V.
O.lHz to 10Hz Noise Test Circuit
""'"
Improved Sensitivity Adjustment
XI
Rtf -
7.51<
lk
1MD
'"''
+15V
(Peak to Peak noise measured In 10 Sec interval)
The device under test should be warmed up for three minutes
and shielded from air currents.
-15V
DC Stabilized
1000v/p,sec Op Amp
3.9k
300
22p.F TANTALUM
R.
lk
30l<
22
2N4440
1.2k
15-6OpF
TUSONIX # 519-3188
lk
R1
FlU POWeR
BANOWDTH BMHz
·ADJUSTFOR
BEST SQUARE WAVE
ATOUTPIJT
.L7lM
2-17
LT100l
TYPICAL APPLlCAI'IOnS
MlerlVIIlt CDII,.ratDr with TTL O.tput
Photodiode Amplifier
+5V
100pF
500t< 1%
NON
INVERTING
INPUT
OUTPUT
>----W/"A
tNERTtIG
INPUT
100pF
PosHlve feedback to one of the nulling terminals creates 5 IJ. to 20 IJ. Vof hysteresis. Input offset voltage Is
typically changed by less than 5 IJ. V due to the
feedback.
Precision Current Sink
Precision Current Source
V+ -21035V
lOUT -
VIN
010 (V+ - W)
2N3685
2N2219
10K
V- - -2 10 -35V
lOUT -
~R
Strain Gauge Signal Conditioner with Bridge Excitation
+15V
+15V
REFERENCE OUT
TOMQNlTORING
ND CONVERTER
35001lRlOGE_1
1
t--II~"""'30"'1k~""~ i~o
_I
:\>lIll>,,-"'W'o-+-C"
11k'"
2N2907
"'"
TRIM
100n
5W
'" RN60C FILM RESISTORS
2-18
~R
LT100l
Large Signal Voltage Follower
With O.OOW. Worst-Case Accuracy
rejections. Worst-case summation of guaranteed
specifications is tabulated below.
OUTPUT ACCURACY
LTlOO1AM
1183
25·C
MD.
LTloolC
LTlOOlAM
1813
LTlOO1C
25·C
Max.
-5511 125·e
MIX.
OlD 70·e
Max.
Offset Voltage
Bias Current
Common-Mode Rejection
Power Supply Rejection
Voltage Gain
15ILV
20ILV
20ILV
18!'V
'l2.!'V
BOILV
40ILV
30ILV
30!'V
25!'V
BOILV
40ILV
30ILV
36!'V
33!'V
110ILV
55ILV
so!'v
42!'V
40!'V
Worst-case Sum
Percent of Full Scale
(=20V)
95!'V
185!'V
199ILV
297!'V
0.0005%
0.0009%
0.0010%
0.0015%
OUTPUT
INPUT
-1010 +IOV
Rs
Err...
-1010 +10V
The voltage follower is an ideal example illustrating
the overall excellence of the LT1001. The contributing
error terms are due to offset voltage, input bias current, voltage gain, common-mode and power-supply
Thermally Controlled Nlead Charger
-----+15V
"- \
620K
-15V
--~w..-_-
CIRCUIT USES TEMPERATURE DIFFERENCE
BETWEEN BATTERY PACK MIJltjTED
THERMOCOI.'lE AND AMBIENT THERMOCOUPLE TO SET BAmRY CHARGE
CURRENT. PEAK CHARGING
CLflRENT IS 1 AMP.
1
lOll
• SINGLE POINT GROUNO
THERMOCOUPLES ARE
40!,V/oC CHROMEL-ALUMEL
(TYPE K)
PreCision Absolute Value Circuit
INPUT
10k
10k
0.1%
0.1%
10k
10k
-101010V 0.1%
OUTPUT
....~0-I010V
0.1%
2-19
Ell
LT100l
Precision Power Supply with Two Outputs
(1) 0 10 10V In 100,uV STEPS
(2) 0 10 100V in lmV STEPS
OUTl'\JT1
0-10V
25mA
8.2k
r----..,
I
I
LMa99:
I
:
I
L ____ ...I
KYO
00000-
99999+1
KEL YIN-VARLEY
DIVIDER
ESI#DP311
-15V
• JULE RSCH. LABS
#R-44
25k
74C74
33k
33k
+15
Dead Zone Generalor
BIPOLAR SYMMETRY IS EXCELLENT BECAUSE ONE DEVICE, Q2, SETS BOTH LIMITS
V""
OEADZot£
CONTROLItf'UT
Oto5V
47pF
0014
100.
+1511
lM301A
·l%FILt.4
-1511
.~-7J"-T_V+I~(_ V.
··AATIOMATCH005%
02,3.4.5 CA 3096 TRANSISTOR AARA'f
VSEl
2-20
LT100l
Instrumentation Amplifier with ± 300V
Common Mode Range and CMRR > 150dB
+15V
8201)
8201)
...,
r
10k
OUTPlJT
I
I
I
1
33Ok*
I
,
J
INPUT
0.2~F
Ell
••
I
I
I
J
j
9091)·
2001)
GAIN
TRIM
IACOUIAE)
01
OUT
OUT
74C908
IN
IN
2k.
74C04
74C86
4022
2k.
-=
ClK
EN
10k
1) ALL DIOOE 1N4148
2) S1-S4 OPTO MOS SWITCH OFM-1A.THETA-J CORP
3) * FILM RESISTOR
4) * • POLYPROPYLENE CAPACITORS
5) ADJUST R1 for 93 Hz AT TEST POINT
A
1k
A FlYING CAPACITOR CHARGEO BY ClOCKEO
PHOTO DRIVEN FET SWITCHES CONVERTS A
DIFFERENTIAL SIGNAL AT A HIGH COMMON
MODE VOLTAGE TO A smLE ENDED SIGNAL AT
THE LT1001 OUTPlJT.
2-21
LT100l
SCHEmATIC DIAGRAm
lT1001 Schematic Diagram
v+ ~~~----------~--~--~--~----~----~------~------~------~--~--~--~---,
6k
029
6k
025
401<
1.5k
40k
25k
30pF
3k
015
500
2k
030
120
240
09
8k
v-
4D-~----~--~~---4----~----+---~~------~------~-----4--~--~
PACKAGE DESCRIPTiOn
H Package
Metal Can
J8 Package
8 lead Hermetic Dip
0.' ~.',J:D~~'
~
'1+
N8 Package
8 lead Plastic
Q1!9
0040
MAX
L
.QJM
00500165
MAX
04115t.1AX
~
0005~
--r
0150
02000060
~
~
OIOOBSColJ
TVP
jL~TYP
0014
NOT~
IlNEfISIONSININCtlESlN.ESSOTHERWlSfNDTW
"1 EMlS WlTIfNO 001 I)' TRUE POSITION (TPl AT GAUGE PLANE
2-22
A"'
".-.
,
,,
"
-IlOO~15·
I.
I--ii29ii
0310
,,
,
.
---:1'.
fIlOTE OIMEN;'I(1tj:lININCHES\NES$O!1i[RWI&NOT[O
U ~%\VI1Hi'! ~ ~~I OF TAUf" f'(Jf)Jt ,1.1'·'A! o3AOOE PlANE
"
---1LOOI5 lYP
0008
' ....Y . llnlAQ
~)r
LT10OlCS8
TBCHNOLOG~~~--------P-re-C-i-Si-o-n-O-p-e-ra-t-io-n-a-I
Amplifier
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
The LT1001 significantly advances the state-of-the-art of
precision operational amplifiers. In the design, processing, and testing of the device, particular attention has
been paid to the optimization of the entire distribution of
several key parameters. Consequently, the specifications
of the lowest cost, commercial temperature device, the
LT1001C, have been dramatically improved when
compared to equivalent grades of competing precision
amplifiers.
Guaranteed Low Offset Voltage 60p,V Max.
Guaranteed Low Drift 1.0p,V/oC Max.
Guaranteed Low Bias Current 4nA Max.
GuaranteedCMRR 110dB Min.
GuaranteedPSRR 106dB Min.
Low Power Dissipation 80mW Max.
Low Noise O.3p,Vp-p
APPLICATions
•
•
•
•
Essentially, the input offset voltage of all units is less than
50p,V (see distribution plot below). Input bias and offset
currents, common-mode and power supply rejection of the
LT1001C offer guaranteed performance which were previously attainable only with expensive, selected grades of
other devices. Power dissipation is nearly halved compared to the most popular precision op amps, without adversely affecting noise or speed performance. Abeneficial
by-product of lower dissipation is decreased warm-up
drift. Output drive capability of the L1001 is also enhanced
with voltage gain guaranteed at 10mA of load current.
Thermocouple Amplifiers
Strain Gauge Amplifiers
Low Level Signal Processing
High Accuracy Data Acquisition
Typical Distribution
of Ollset Voltage
Vs = ± l5V, TA = 25°e
Linearized Platinum ReSistance Thermometer
with ± O.025°e Accuracy Over 0 to 1000 e
1 MEG."
+15
I
R plat.t
lk!1 - o·c
1.2k"
UNEARITY
TRIM
9Ok'
LM129
20k
OFFSET TRIM
• ULTRO~ 105A WlREWOUND
•• 1% FILM
t PLATINUM RTD
118MF (ROSEMOUNT. INC.)
10k'
* Trim
sequence: trim offset (0·C-l000.0!1),
trim Iinearfty (35·C-1138.7!1), trim gain
(100·C-1392.6!1). Repeat until all Ihree
points are fixed wilh ± .025·C.
OUTPUT
010 10V 0 to l00·C
I
I I
I
200
954 UNITS
FROM THREE RUNS
150
rhL..J
if]
10k •
>+--j---
I
I
l
100
w
50
o
.r
-60
-40
l.~
-20
20
40
60
INPUT OFFSET VOLTAGE (MICROVOLTS)
2-23
•
LT1001CS8
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage .................................. ± 22V
Differential Input Voltage ........................ ± 30V
Input Voltage
................................. ± 22V
Output Short Circuit Duration ................. Indefinite
Operating Temperature Range ............... OOC to 70°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
ORDER
PART NUMBER
TOP VIEW
LT1001CS8
PART MARKING
58 PACKAGE
PLASTIC SO
1001
ELECTRICAL CHARACTERISTICS Vs= :!: 15V, TAS25°C, unless otherwise noted
SYMBOL
Vas
!:,vas
LlTlme
las
Ib
en
en
PARAMETER
Input Offset Voltage
Long Term Input Offset Voltage
Stability
AVOL
large Signal Voltage Gain
CMRR.
PSRR
Vour
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Input Resistance Differential Mode
Input Voltage Range
Maximum Output Voltage Swing
SR
GBW
Pd
Slew Rate
Gain-Bandwidth Product
Power Dissipation
Rin
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
CONDITIONS
MIN
Note 1 and Note 2
O.lHzto 10Hz(Note I)
fo= 10Hz(Note I)
fo = 1000Hz (Note 1)
RL~2kll, Vo= ± 12V
RL~lkD, Vo= ± 10V
VCM= ±13V
Vs= ±3Vto ±ISV
RL~2k!1
RL~lka
RL~2kD(Note3)
(Note 3)
No load
No load, Vs= ±3V
400
250
110
106
15
±13
±13
±12
0.1
0.4
LT1001C
TYP
18
0.3
0.4
±0.7
0.3
10.5
9.8
800
500
126
123
SO
±14
±14
±13.5
0.25
O.S
46
4
MAX
80
1.5
UNITS
~V
~Vlmonth
3.8
±4.0
0.6
18.0
ItO
nA
nA
pVp·p
nVI"lfz
VlmV
VlmV
dB
dB
Mil
V
V
V
VI~
MHz
mW
mW
80
S
ELECTRICAL CHARACTE RISTICS VS = :!: 15V, ooc STA s70°C, unless otherwise noted
SYMBOL
Vas
~
LlTemp
las
18
AVOL
CMRR
PSRR
PARAMETER
Input Offset Voltage
Average Offset Voltage Drift
MIN
CONDITIONS
•
•
•
LT100IC
TYP
30
0.3
MAX
110
1.0
UNITS
~V
~VloC
Input Offset Current
0.6
5.3
nA
±5.5
Input Bias Current
±1.0
nA
large Signal Voltage Gain
750
250
VlmV
RL~2kD,Vo= ±10V
Common-Mode Rejection Ratio
123
106
dB
VCM= ± 13V
Power Supply Rejection Ratio
120
Vs= ±3Vto ±ISV
103
dB
Input Voltage Range
±14
±13
V
Output Voltage Swing
RL,,2kO
±12.5
±13.B
V
Vour
Power Dissipation
No load
55
90
mW
Pd
..
The. denotes the specifications which apply over the full operating temoperation, Excluding the initial hour of operation, changes In Vas dunng the
perature range.
first 30 days are typically 2.5~V.
Notel: This parameter is tested on a sample basis only.
Note 3: Parameter is guaranteed by design.
Note 2: long Term Input Offset Voltage Stability refers to the averaged
trend line of Vos versus Time over extended periods after the first 30 days of
•
•
•
•
•
•
•
2-24
~""-LTEClnHNOt/\l.JOO-~Q~
__
.
.
,
.
__
LT_l0_02
~,
Dual, Matched Precision
IT
Operational Amplifier
FEATURES
DESCRIPTion
• Guaranteed low offset voltage
LT1002A
60#LV max
LT1002
100#LV max
• Guaranteed offset voltage match
LT1002A
40#LV max
LT1002
80#LV max
• Guaranteed low drift
LT1002A
O.9#LV/oC max
LT1002
1.3#LV/oC max
• Guaranteed CMRR
LT1002A
110dB min
LT1002
110dB min
• Guaranreea channel separation
LT1002A
132dB min
LT1002
130dB min
• Guaranteea matching characteristics
• Low noise O.35#LV p-p
The LT1002 dual, matched precision operational amplifiers
combine excellent individual amplifier performance with tight
matching and temperature tracking between amplifiers.
In the design, processing, and testing of the device, particular
attention has been paid to the optimization of the entire distribution of several key parameters and their matching. Consequently, the specifications of even the low cost commercial
grade (the LT1002C) have been spectacularly improved compared to presently available devices.
APPLICATiOnS
•
•
•
•
•
•
Thermocouple Amplifiers
Strain Gauge Amplifiers
Low level signal processing
Medical instrumentation
Precision dual limit threshold detection
Instrumentation amplifiers
Essentially, the input offset voltage of all units is less than . . .
80#LV, and matching between amplifiers is conSistently better . . .
than 60#LV (see distribution plot below). Input bias 'and offset
currents, channel separation, common mode and power supply
rejections of the LT1002C are all specified at levels which were
previously attainable only on very expensive, selected grades of
other dual devices. Power dissipation is nearly halved compared to the most popular precision duals, without adversely
affecting noise or speed performance. A by-product of lower
dissipation is decreased warm-up drift. For even better performance in a single precision op amp, refer to the LT1001 data
sheet. A bridge signal conditioning application is shown below.
This circuit illustrates the requirement for both excellent
matching and individual amplifier specifications.
Distribution of Offset Voltage Match
Strain Gauge Signal Conditioner With Bridge Excitation
+15V
+15V
100D 5W
70
13 2k
>-"~-<. 2N2219
Vs - T 15V
TA - 25°C
60
REFERENCE OUT
2817 UN1ITS
TO MONITORING
Ml CONVERTER
1N4148
50
1Ju
40
r---i---"j3 +
30
LTt001
OTO 10V
OUT
340k·
>6~INM414.....
8 ~
.,-::j
[
10
I..I
J
-100-80-60-40-20 0
2k
n
-
11
20
o
2tm07
1E~ID
- ---- ---
l]
L. h
20 40 60 80 100
INPUT OFFSET VOLTAGE MATCH (,VI
1000
5W
• RN60e FILM RESISTORS
-15V
2-25
LT1002
ABSOLUTE mAXimum RATinGS
Supply Voltage (Note 6) . . . . . . . . . . . . . . . .. ± 22V
Differential Input Voltage . . . . . . . . . . . . . . .. ± 30V
Input Voltage Equal to Supply Voltage
Output Short Circuit Duration. . . . . . . . . .. Indefinite
Operating Temperature Range
LT1002AM/LT1002M ......... -55°C to 125°C
LT1002AC/LT1002C ............. O°C to 70°C
Storage Temperature Range
All Grades ................. -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
PACKAGE/ORDER InFORmATion
ORDER
PART NO.
OFFSET
VOLTAGE
MAX
at 25°C
LT1002AMJ
LT1002MJ
LT1002ACJ
LT1002CJ
LT1002ACN
LT1002CN
60ILV
100ILV
60ILV
100ILV
60ILV
100ILV
TDPVIEW
NULL (A) 1
14 V+ (A)
NULL (A) 2
13 OUT(A)
-IN (A) 3
12 V- (A)
+IN(A) 4
11 +IN(B)
V-IB) 5
10 -INIB)
DUTIB) 6
9 NULL IB)
v+ IB) 7
B NULL IB)
N PACKAGE
14 PIN PLASTIC
JPACKAGE
14 PIN HERMETIC
NOTE: Device may be operoled even ~ Insertion
is reversed; this is due to inherent symmetry of
pOl Iocalions of amplifiers Aand B. INcle 6)
ELECTRICAL CHARACTERISTICS, InDIVIDUAL AmPLIFIERS
Va
=
± 15V, TA
=
25°C, unless otherwise noted
SYMBOL
PARAMETER
CONDITIONS
Vos
Input Offset Voltage
Long Term Input Offset Voltage
Stability
Input Offset Current
Input Bias Current
Input NOise Voltage
Input Noise Voltage Density
Note 1
~
t. Time
los
18
en
en
AwL
CMRR
PSRR
Rln
VOUT
SR
GBW
Pd
2-26
LTl 002AM/LTl 002AC
MIN
TYP
MAX
20
Notes 2 and 3
0.1Hz to 10Hz (Note 2)
10 = 10Hz (Note 5)
10 = 1000Hz (Note 2)
large Signal Voltage Gain
RL ~ 2kll, Vo = ±12V
RL ~ 1k!l, Vo = ± 10V
Common Mode Rejection Ratio
VCM = +13V
Power Supply Rejection Ratio
Vs = +3Vto +18V
Input ReSistance Differential Mode Note 4
Input Voltage Range
Maximum Output Voltage Swing
RL ~ 2k!l
RL ~ lk!l
Slew Rate
RL ~ 2k!l (Note 4)
Gain Bandwidth Product
Note 4
Power Dissipation
No load
per amplifier
No load, V, = ±3V
400
250
110
108
20
+13
±13
±12
0.1
0.4
LT1 002M/LTl 002C
MIN
m MAX
60
0.3
1.5
0.3
2.8
±0.6 ±3.0
0.35
0.7
10.3
20.0
9.6
11.5
800
500
126
123
100
±14
±14
±13.5
0.25
0.8
46
75
7
4
25
350
220
110
105
13
+13
±13
±12
0.1
0.4
100
0.4
2.0
0.4
4.2
±0.7 ±4.5
0.38
0.75
20.0
10.5
9.8
12.0
800
500
126
123
80
+14
±14
±13.5
0.25
0.8
48
85
4
8
UNITS
,.V
,.Vlmonlh
nA
nA
,.V...
nVv'Hz
VlmV
dB
dB
Mil
V
V
Vlp.s
MHz
mW
LT1002
ELECTRICAL CHARACTERISTICS, InDIVIDUAL AmPLIFIERS
Vs
=
± 15V, -55°C.,;;; TA .,;;; 125°C, uAless otherwise noted
SYMBOL
Vos
~
PARAMETER
CONDITIOIIS
Input Offset Voltage
Note 1
Average Input Offset Voltage Drift
" Temp
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
Power Dissipation
per amplifier
los
Ie
AvoL
CMRR
PSRR
Your
Pd
Vs
=
RL .. 2kll, Vo = ± 10V
VCM = ± 13V
Vs=±3Vto±18V
RL .. 2kll
No 'Ioad
PARAMETER
CONDITIONS
Vos
Input Offset Voltage
Note 1
~
MIN
lT1002M
TYP
MAX
UNITS
30
150
45
230
IiV
0.2
0.9
0.3
1.3
livrc
1.2
8.5
±1.5 ±9.0
200
700
104
120
96
117
±13
±14
+12.0 + 13.5
60
100
nA
nA
V/mV
dB
dB
V
V
mW
0.8
5.6
±1.0 ±6.0
300
700
122
106
102
117
±13
±14
+ t2.5 + 13.5
90
55
MIN
Average Input Offset Voltage Drift
•
•
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Common Mode Rejection RatiO
Power Supply Rejection RatiO
Input Voltage Range
Output Voltage Swing
Power Dissipation
per amplifier
•
•
•
•
•
•
••
" Temp
Your
Pd
•
•
•
•
•
•
•
•
•
•
lT1002AM
TVP
MAX
± 15V, DoC .,;;; TA .,;;; 70°C, unless otherwise noted
SYMBOL
los
Ie
AvOL
CMRR
PSRR
MIN
RL .. 2kll, Vo = + 10V
VCM = +13V
Vs = +3Vto +18V
RL .. 2k!l
No load
The. denotes the specifications which apply over the full operating
temperature range.
For MIL-STD components, please refer to LTC 883C data sheet for test
listing and parameters.
Nola 1: Offset voltage measured with high speed test equipment,
approximately 1 second after power is applied.
Nola 2: This parameter is tested on a sample basis only.
Nola 3: Long Term Input Offset Voltage Stability refers to the averaged
trend line of Vas versus Time over extended periods after the first 30
days of operation. Excluding the initial hour of operation, changes in
Vas during the first 30 operating days are typically 2.5/LV.
LTlOO2AC
TYP
MAX
MIN
LTI002C
TYP
MAX
UNITS
20
100
30
160
IiV
0.2
0.9
0.3
1.3
IiV/'C
0.6
5.7
+1.0 +6.0
750
250
106
123
100
120
+13
+14
+12.5 +13.8
55
90
nA
nA
V/mV
dB
dB
V
V
mW
0.5
4.2
+0.7 +4.5
750
350
108
124
105
120
+13
+14
+12.5 +13.8
50
85
Nola 4: Parameter is guaranteed by design.
Nole 5: 10Hz noise voltage density is sample tested on every lot.
Devices 100% tested at 10Hz are available on request.
Nola 6: The V+ supply terminals are completely independent and may
be powered by separate supplies if desired (this approach, however,
would sacrifice the advantages of the power supply rejection ratio
matching). The V- supply terminals are both connected to the
common substrate and must be tied to the same voltage. Both V- pins
should be used.
2-27
LT1002
mATCHinG CHARACTERISTICS at Va =
± 15V. TA
=
25°C. unllss otherwise noted
LTlOO2M/C.
LTlOO2AM/AC
SYMBOL
18 +
los +
los
t.CMRR
t.PSRR
PARAMETER
Input Ollset Voltage Match
Average Non-Inverting Bias
Current
Non-Inverting Offset Current
Inverting Offset Current
Common Mode Rejection Ratio
Match
Power Supply Rejection Ratio
Match
Channel Separation
CONDITIONS
MIN
TYP
MAX
MIN
TVP
MAX
-
15
40
-
25
80
p.V
+0.6
0.6
0.6
+3.5
3.5
3.5
-
+0.7
0.7
0.7
+4.8
6.0
6.0
nA
nA
nA
-
dB
-
-
VCM = ± 13V
110
132
-
108
132
Vs = ±3Vto ±18V
I .;; 10Hz (Note 4)
108
132
130
148
-
-
102
130
128
146
mATCHinG CHARACTERISTICS at Vs
=
18 +
los +
los
t.CMRR
t.PSRR
PARAMETER
Input Offset Voltage Match
Input Offset Voltage Tracking
Average Non-Inverting Bias
Current
Non-Inverting Offset Current
Inverting Offset Current
Common Mode Rejection Ratio
Match
Power Supply Rejection Ratio
Match
m
MAX
MIN
TYP
MAX
UNITS
•
•
-
50
0.3
140
1.0
-
60
0.4
230
1.5
p.V
p.V/oC
•
•
•
•
-
±1.5
1.5
1.5
±6.0
6.5
6.5
-
±1.8
1.8
1.8
±10.0
12.0
12.0
nA
nA
nA
-
dB
•
Vs = ±3Vto +18V
mATCHinG CHARACTERISTICS at Vs
=
LTlOO2M
MIN
CONDITIONS
VCM = ± 13V
-
-
-
-
106
126
-
102
124
102
122
-
94
120
18 +
los +
los
t.CMRR
t.PSRR
2-28
PARAMETER
Input Offset Voltage Match
Input Offset Voltage Tracking
Average Non-Inverting Bias
Current
Non-Inverting Offset Current
Inverting Offset Current
Common Mode Rejection Ratio
Match
Power Supply Rejection Ratio
Match
CONDITIONS
VCM = +13V
Vs=±3Vto±18V
dB
± 15V. DoC.;;; TA .;;; 70°C. unlass otherwise noted
LTlOO2AC
SYMBOL
dB
dB
± 15V. -55°C.;;; TA .;;; moe. unless otherwise noted
LTlOO2AM
SYMBOL
UNITS
•
•
•
•
•
•
•
LTlOO2C
TYP
MAX
UNITS
-
45
0.4
150
1.5
p.V
p.V/oC
-
±1.2
1.2
1.2
±7.0
8.5
8.5
nA
nA
nA
-
dB
MIN
m
MAX
MIN
-
30
0.3
85
1.0
±1.0
1.0
1.0
±4.5
5.0
5.0
-
-
-
108
130
-
105
128
105
126
-
98
124
dB
LT1002
TYPICAL PERFORmAnCE CHARACTERISTICS
Distribution of Offset Voltage Drift
with Temperature
(Individual Amplifiers)
Distribution of Offset Voltage of
Individual Amplifiers
Distribution of Offset Voltage
Match Drift with Temperature
70 ,----,---,---,--..,--,---,
~
;;:
60
f----f----t-t-t---T
o
I
60
1----+--+--+--+---1--1
50
f-----+--+--
40
f-----+--+--
301---+-+
40 I-I-I-I-+IH
z
20
20
10
o
-0.8
-100-80-60-40-20 0 20 40 60 80100
100
100
80
~
~
60
§1
40
I-
~
It
0
ill
~
'~"'
20
0
LT100~
-40
i
-60
-80
~~~
T1 02AM
__ I--oIII!!!!!.
L \lJvZp--
_
............
+0.8
+ 1.2
-1.2
i""""
-...
r-.~1002M
;;-
60
"'"
is
40
~
I--+--I---+-+----+--+--i
-100 L---'-_.l-----L_-'----"_..L--'
75 100 125
25
50
-50 -25 0
- -1-0.
20
.....-= ~ r-
~
§1 -20
iii
-40
0
-60
........
~
~
~
-~
0
25
50
:::
~ 14 PLAS+,C PACKAGE
~
(
;i7'
100
HE~r;c DIP ~CKAGE
125
TEMPERATURE lOG)
TIME AFTER POWER ON BOTH AMPLIFIERS IMINUTES)
O.1Hz to 10Hz Noise
Noise Spectrum
100
1
TA
Vs
-
r
V
'11I1ai1i\l u\M.
n'I'
t::::
-10
)14
V
10
~
o
a
TIME IMONTHS)
"
TIME (SECONDS)
i- III CORNER
4Hz
LTAGE
"r"
1
lA'~ORNER
1
4
25°C
+310 +18V
~t"o
111Id~
..J
~"IM .l'''~I' I Jl.u.,,'
'If l'
II
Vs _'±15V
TA - 25°C
~2AM
75
+ 1.2
Warm-Up Drift
LT1002M'--
-80
-100
-50 -25
TEMPERATURE 1°C)
Long Term Stability of Four
Representative Units
LT10d~
..J.r1 02AM
~
It
-0.8 -0.4
+0.4 +0.8
OFFSET VOLTAGE MATCH DRIFT
WITH TEMPERATURE I.VlOC)
Vs - ±15V
80
-20
«
+0.4
Offset Voltage Tracking with Temperature
of Six Representative Units
Offset Voltage Drift with Temperature
of Six Representative Units
~
-0.4
INPUT OFFSET VOLTAGE DRIFT
WITH TEMPERATURE (,.VlOC)
INPUT OFFSET VOLTAGE I.V)
10
--
10
~~~,f I I
~
100
0.1
1000
FREOUENCY 1Hz)
2-29
LT1002
TYPICAL PERFORmAnCE CHARACTERISTICS
Matching and Individual Amplifier
Bias and Offset Currents vs Temperature
Input Bias Current
Over the Common Mode Range
2.0
15
1 1.8
1.0
'">--
1.6
~
30
lvc"~~
1.4
'"
'"
::>
f
0.6
DEVICE WITH NEGATIVE INPUT CURRENT
+--_.j I
I
I
COMMON·MODE
INPUT RESISTANCE - 02f~A 280Gll
0.4
~~
/
Vs - ,15V - TA •. 25°C
08
'"~
'"
iil
J
J
10
~
VS-±15V
TA ~ 25°C
DEVICE WITH POSITIVE INPI CURRENT
1.2
ffi
Input Bias Current vs.
Differential Input Voltage
02
50
75
100
15
125
10
Open Loop Voltage Gain
vs Temperature
1
120
1200k
~~ 1000k
....-
>::
~ 600k
g;
g
z 400k
~
'"
0
200k
rVs
~
± 15V, Vo - ,12V
rv:
..........
J±3V, lo ~
-
I.---'"
,
......
80
>::
60
~
a.
0
g
z
~
o
50
75
100
40
01
Vs~
TA ~
0.8
If
5
!d: 0.6
ill
'"z~
a.
o
KCENT GAIN MISMATCH
g
as
g;
/'
0.4
0.2
I--
~
140
±'15V
±3V
160
""
180
10
100
1k
100
--
0.1
0.2
I
I
I
I
100
1k
10k
100k
Power Supply Rejection and
PSRR Match vs Frequency
II-I-l:::;:::;:;~;;::::j
160
;g
10
120
~~
100
1---0-"'-1:"'''''''''-+--+---1
80
1---o--t--'''-f'''",,",''':-I---1
60
1---o--t--+---''''-f,"",-,''''C.3oo,;c-\
~
!
100
1k
FREQUENCY (Hz)
10k
100k
140
-
~
-
10
0.5
FREQUENCY (MHz)
OUTPUT A - OUTPUT 8
X 100%
+ OUTPUT 8)
10
~
'"
~
:I:
""a.
220
10k 100k 1M 10M
Closed Loop Output Impedance
±15V
25°C
'"e.
200
Y, (OUTPUT A
FREQUENCY (Hz)
2-30
100
FREOUENCY (Hz)
10
30
Gain, Phase Shift vs. Frequency
1\
TEMPERATURE (OC)
~
~
~
20
Open Loop Gain Mismatch
vs Frequency
10
~
Vs
125
3.0
ll!
~s-
-20
25
10
±DIFFERENTIAL INPUT (VOLTS)
120 iii
"
50k
80
60
~---+-------r
__
~--I
20 ~-----t~--'--r----~
OL-_ _--'-_ _ _...l...._ _- - '
100
1000
10,000
CAPACITIVE LOAD (PICOFARADS)
100,000
I
40
30
r---
§
....u
~
~
~10
-20
TrI2~;1
1000
3k
25"C125"C
r -=
Vs~ 15V
125"C
25°C-
~i -30
en
~
-40
~
VS~±15V
5l"c-
I
10
u
~~
300
~
ffioo 20
.... 0
100
i'..
~55"C
I
0
10k
LOAD RESISTANCE (Il)
TIME FROM OUTPUT SHORT (MINUTES)
APPLICATions InFORmATion
The LT1002 dual amplifier may be inserted directly
into OP-10, OP207, OP227 sockets with or without removal of external nulling potentiometers.
two op amps. Fortunately, the guaranteed offset voltage match of the LT1002 is very low, in most applications offset adjustment will be unnecessary.
Standard Adjustment
Ollset Voltage Adjustment The input offset voltage of the
LT1002, and its drift with temperature, are permanently trimmed at wafer testing to a low level. However, if
further adjustment of Vos is necessary, nulling with a
10k or 20k potentiometer will not degrade drift with
temperature. Trimming to a value other than zero creates a drift of (Vos/300) IN /oC, e.g. if Vos is adjusted
to 300JLV, the change in drift will be 1JLV 1°C. The adjustment range with a 10k or 20k pot is approximately
± 2.SmV. If less adjustment range is needed, the sensitivity and resolution of the nulling can be improved
by using a smaller pot in conjunction with fixed resistors. The example has an approximate null range of
± 100JLV.
10k
-15V
Improved Sensitivity Adjustment
In matching applications, both amplifiers can be
trimmed to zero, or the offset of one amplifier can be
trimmed to match the offset of the other. Offset adjustment, however, Slightly degrades the gain, commonmode and power-supply rejection match between the
-~15V
2-32
LT1002
APPLICATions InFoRmATion
Test Circuit for Offset Voltage and its Drill with Temperature
0.1Hz to 10Hz Noise Test Circuit
R1
'SDk
The device under test should be warmed up for three
minutes and shielded from air currents. Turn the device 180 0 to measure the noise of side B.
+1SV
VOLTAGfGAJN
:>-,-13.:....;(6)_*"-_ Vo
R2
100(J
=
SO,OOO
100
• RESISTORS MUST HAVE LOW
THERMOELECTRIC POTENTIAL.
R3
SDk
-1SV
Vo - 1000 Vas
This circuit is also used as the burn-in configuration for
the LT1002, with supply voltages increased to :l::20V,
R1 =R3 =20k, R2 =2000, Av =100.
Unless proper care is exercised, thermocouple effects,
caused by temperature gradients across dissimilar
metals at the contacts to the input terminals, can exceed the inherent drift of the amplifier. Air currents
should be minimized, package leads should be short,
the two input leads should be as close together as possible and maintained at the same temperature.
Channel Separation
This parameter is defined as the ratio of the change in
input offset voltage of one amplifier to the change in
output voltage of the other amplifier causing the offset
change.
Ell
(Peak to Peak noise measured in 10 Sec interval)
Power supplies
The LT1002 is specified over a wide range of power
supply wltages from ± 3V to ± 18V. Operation with
lower supplies is possible, down to ± 1.2V (two NiCad batteries). However, with ± 1.2V supplies, the device is stable only in closed loop gains of +2 or higher
(or inverting gain of one or higher).
The V+ supply terminals are completely independent
and may be powered by separate supplies if desired
(this approach, however, would sacrifice the advantages of the power supply rejection ratio matching).
The V- supply terminals are both connected to the
common substrate and must be tied to the same wltage. Both V- pins should be used.
At low frequencies the LT1002's channel separation is
an almost unmeasurable 148dB. As frequency increases, pin to pin capacitance of the package, between the output of one amplifier and the inputs of the
other, becomes dominant. Since these pins are nonadjacent, the capacitance is only O.02pF. To maintain
the LT1002's excellent channel separation at higher
frequencies, the socket and PC board capacitances
should be minimized.
2-33
LT1002
APPLICATions InFORmATion
Advantages of Matched Dual Op Amps In many applications the performance of a system depends on the
matching between two operational amplifiers rather
than the individual characteristics of the two op amps.
Two or three op amp instrumentation amplifiers,
tracking voltage references and low drift active filters
are some of the circuits requiring matching between
two op amps.
Three Op Amp Instrumentation Amplifier
"",UT
Rl
10k
1%
R4
R6
1000
1%
10k
1%
OUTPUT
The well-known triple op amp configuration illustrates
these concepts. Output offset is a function of the difference between the offsets of the two halves of the
LT1002. This error cancellation principle holds for a
considerable number of input referred parameters in
addition to offset voltage and its drift with temperature. Input bias current will be the average of the two
non-inverting input currents Qs +). The difference between these two currents (los ) is the offset current of
the instrumentation amplifier. The difference between
the inverting input currents (los -) will cause errors
flowing through R1, R2, and R3. Common-mode and
power supply rejections will be dependent only on the
match between the two amplifiers (assuming perfect
resistor matching).
The concepts of common mode and power supply rejection ratio match (aCMRR and aPSRR) are best
demonstrated with a numerical example:
Assume CMRR A = + 1.0~V IV or 120dB,
and CMRRs == +O.75~VlVor 122.5dB,
then aCMRR = O.25~V IV or 132dB;
if CMRRs = -O.75~V IV which is still 122.5dB,
then aCMRR = 1.75~V IV or 115dB.
Clearly, the LT1002, by specifying and guaranteeing
all of these matching parameters, can significantly
improve the performance of matching dependent
circuits.
2-34
R8
R2
10k
1%
Gain = tOOO
RS
1QOn
1%
INPUT
R7
976k
1%
A9
2000
+
Trim R8 for gain
Trim R9 for DC common mode rejection
Trim R10 for AC common mode rejection
Typical performance of the instrumentation amplifer:
Input offset voltage = 25~V
Input bias current = O.7nA
Input resistance = 200 GO
Input offset current = 0.6nA
Input noise = 0.5~V p-p
Power bandwidth (Vo = ± 10V) = 80kHz
LT1002
APPLICATions InFoRmATion
Precision ± 10V Reference
...------"1>--------__.---130k
5%
+ 15V
3 .""k-...
3
t -_ _t--"I
_ _ _ _ _ _--t_ _ _ _ ~~~~OV
5%
10k
OUT 2
~·'P)-~ -10 ooov
The LT1002 contributes less than 5% of the total drift
with temperature, noise and long term drift of the ref-
erence. The accuracy of the -1 OV output is limited by
the matching of the two 10k resistors.
Dual Limit Microvolt Comparator
+15V
430k
1%
UPPER
LIMIT
39.21)
1%
1k
5%
FlV117
"Iff
15k
1%
V.CA3118
13
INPUT
430k
1%
392\1
1%
15k
1%
20k
5%
LOWER
LIMIT
-15V
When the upper or lower limit is exceeded the LED
lights up. Positive feedback to one of the nulling terminals creates 5 to 20j.tV of hysteresis on both amplifiers. This feedback changes the offset voltage of the
LT1002 by less than 5j.tV. Therefore, the basic accuracy of the comparator is limited only by the low offset
voltage of the LT1002.
2-35
LT1002
APPLlCAI'IOnS InFORmATion
Two Op Amp Instrumentation Amplifier
RS
Rl
lOOk·
R2 2.21<+
R4
10k
lOOk
m.--4-- OUTPUT
INPUTS
+------------------~
• TRIM FOR COMMON-MOIlE REJECTION
+ TRt.4 FOR GAtI
R4 [ 1 +1- (R2
R2 +R3J ~100
Gai1=- - +R3)
- +
R3
2
Rl
R4
R5
Precision Amplifier Drives 5000 Load to ± 10V
1.1RI +O.lRs
10011
0.21\
lOOk
&--+- OUTPUT
50011
INPUT
2-36
At.
This application utilizes the guaranteed 10mA load
driving capability of the LT1002. The offset wltage of
amplifier A is the offset of the configuration. Amplifier
B provides the additional 10mA load current. When
load resistor RL is removed, amplifier Asinks this current without affecting accuracy. In the gain of 1000
configuration shown, approximately 0.3% gain accuracy can be realized.
LT1002
APPLICATions InFoRmATion
Dead Zone Generator
INPUT
VSET
DEAD ZONE
CONTROL INPUT
0105V
""
lOOk
""
BIPOLAR SYMMETRY IS EXCELLENT
BECAUSE ONE DEVICE, 02, SETS BOTH LIMITS
lOOk
4.7k
47pF
10k"
lOOk
30pF
IN914
lOOk
+15V
15pF
4.7k
VseT
lk
·1% FILM
• " RATIO MATCH 0.05%
02,3,4,5 CA 3096 TRANSISTOR ARRAY
-15V
VOUT
----:;7~1-+-1----/<--
VIN
VSET
Precision Absolute Value Circuit
INPUT
10k
10k
10k
0.1%
0.1%
0.1%
10k
-10to 10V 0.1%
6
OUTPUT
Oto 10V
10k
0,1%
2-37
LT1002
APPLICATions InFoRmATion
Dual Precision Power Supply
(1) 0 to 10V in 100~V Steps
(2) 0 to 100V in 1mV Steps
0UTPUT1
0-1OV
r----.,
I
W399 :
KVD
IL ____ ..JI
0000099999+1
2
0-100v. 25mA
-15V
KVD
•
~
~
ESI#DP311
JUlIE RSCII. LABS
#R-44
10k· (seIecI)
25k
10011
74C74
33k
33k
+15V--""".......+15
2-38
......
LT1002
SCHEmATIC DIAGRAm
v+
6k
029
6k
NULL
NULL
40k
1.5k
40k
25k
3k
20pF
+
30pF
500
3k
IN
016
015
500
2k
IN
2k
030
lHT1002
120
240
09
Bk
v-
PACKAGE DESCRIPTion
Dimensions in inches (millimeters) unless otherwise noted.
14-Lead Cavity DIP (J)
I"
1199391 ~
0310
(~R;~}~CJ'
",,"~ ". . 1:~I:s41
14-Lead Molded DIP (N)
0785
"AX
1
0,290-0320
0.280
Z
S
4
$
0160
,
1
-----.t
0200
1~1140641
dOOj
(7"112)
"IN
0300-0320
(7620-8128)
f (9779__""""T'~~~=~~~:I
~
0385±D025!
± 0 6351 ..
0100
(2540)
MAK 80TH ENDS
..
0325
(8255
~~~~;
•
~~~~~)
--(1 905±O 381)
(3i7s) MIN
0100 ±D.Ol0
(2.540 ± 0.254)
(~.~~~ :~.~~~)
I TJMAX I 0JA
I
I
I LT1002ACNI 125'C I 100'CIW I
LT1002CN
TJt.lAX
SJA
LT1002ACJ
LT1002CJ
125"C
100"CIW
LT1002AMJ
LT1002MJ
150'C
100'CIW
MIN
2-39
NOTES
2-40
~7YD~r.f!(~---p-r-e-Ci-Sio-n-'-S-in-g-le-~-~-~-~I~~
OpAmp
FEATURES
DESCRIPTion
• Single Supply Operation
Input Voltage Range Extends to Ground
Output Swings to Ground while Sinking Current
• Guaranteed Offset Voltage
50"V Max.
• Guaranteed Low Drift
1.3"V/oC Max.
• Guaranteed Offset Current
0.5nA Max.
• Guaranteed High Gain
5mA Load Current
1.5 Million Min.
17mA Load Current
0.8 Million Min.
• Guaranteed Low Supply Current
520"A Max.
• Supply Current can be Reduced by a Factor of 4
• Low Voltage Noise, 0.1 Hz to 10Hz
0.55"Vp-p
Low Current Noise0.07pAlKzat 10Hz
Better than OP-07
250MOMin.
• High Input Impedance
2.7VMin.
• Guaranteed Minimum Supply Voltage
The lT1006 is the first precision single supply operational
amplifier. Its design has been optimized for single supply
operation with a full set of specifications at 5V. Specifications at ± 15V are also provided.
The LT1006 has low offset voltage of 20"V, drift of
0.2"V/oC, offset current of 120pA, gain of 2.5 million, common-mode rejection of 114dB, and power supply rejection
of 126dB.
Although supply current is only 340~, anovel output stage
can source or sink in excess of 20mA while retaining high . . .
voltage gain. Common-mode input range includes ground to . . .
accommodate low ground-referenced inputs from strain
gauges or thermocouples, and output can swing to within a
few millivolts of ground. If higher slew rate (in excess of
1V/"s) or micropower operation (supply current down to
90~) is required, the operating currents can be modified by
connecting an external optional resistor to Pin 8.
APPLICATions
• Low Power Sample and Hold Circuits
• Battery Powered Precision Instrumentation
Strain Gauge Signal Conditioners
Thermocouple Amplifiers
• 4mA-20mA Current Loop Transmitters
• Active Filters
For similar single supply precision dual and quad op amps,
please see the LT1013/LT1014 data sheet. For micropower
dual and quad op amps, please see the LT1078/LT1079 data
sheet.
Distribution 01 Input Ollset Voltage
LT1006 Single Supply, Micropower Sample and Hold
+9V
20
"""'----,.,---r---,.--r-r-,-,--,
VS~5V,
18
300k
360k
14
_12~-+-e~~-+~~
39011
3900
OV
TA~25°C
350 LT1 006, TESTED
FROM TWO RUNS
J AND N PACKAGES
16
;F.
~ 10~-+---+
~
OUTPUT
-60
INPUT
0-5V
3
-~
0
~
60
INPUT OFFSET VOLTAGE (.VI
SAMPLE-HOLD COMMAND
HIGH~SAMPLE:
LOW~HOLO
"'CD4066
_ _-----
ACQUISITION TIME
HOLD SETTLING TIME
SoH OFFSET
HOLD SUPPLY CURRENT
SAMPLE SUPPLY CURRENT
1kHz SAMPLE RATE CURRENT
20.,
10.,
1mV
250~
5.0mA
BOO~
2-41
LT1006
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
TOP VlfW
Isv SET
(NOTE 2)
Supply Voltage .............•...•.•............... ± 22V
Input Voltage ........... Equal to Positive Supply Voltage
......... 5V Below Negative Supply Voltage
Differential Input Voltage ............................ 30V
Output Short Circuit Duration .................. Indefinite
Operating Temperature Range
LT1006AM, M ........................ - 55°C to 125°C
LT1006AC, C ............................. OOC to 70°C
Storage Temperature Range
All Devices ..............•........... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec) .............. 300°C
ORDER PART
NUMBER
LT1006AMH
LT1006MH
LT1006ACH
LT1006CH
V(CASE)
H8 PACKAGE TO-5 METAL CAN
TOPVlfW
LT1006AMJ8
LT1006MJ8
LT1006ACJ8
LT1006CJ8
LT1006CN8
..... 5 ~~rM (NOTE 4)
'---_
J8 PACKAGE
HERMETIC OIP
N8 PACKAGE
PLASTIC OIP
ELECTRICAL CHARACTERISTICS Vs=5V, VCM=OV, VOUT=1.4V, TA=25°C, unless otherwise noted.
SYMBOL
Vos
tNos
"'Time
los
18
en
in
CMRR
PSRR
AvoL
PARAMETER
Input Offset Voltage
Long Term Input Offset
Voltage Stability
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
Input Noise Current Density
Input Resistance
Differential Mode
Common·Mode
Input Voltage Range
Common·Mode Rejection
Ratio
Power Supply Rejection
Ratio
Large Signal Voltage Gain
Maximum Output Voltage
Swing
SR
Is
Slew Rate
Supply Current
Minimum Supply Voltage
2-42
CONDITIONS
MIN
LT1006AM/AC
TYP
MAX
20
50
0.4
0.12
9
0.55
23
22
0.07
0.1 Hz to 10Hz
10= 10Hz (Note 3)
10 = 1000Hz (Note 3)
10= 10Hz
(Note 1)
180
MIN
LT1006M/C
TYP
MAX
30
80
0.5
0.5
15
0.15
10
0.55
23
22
0.08
32
25
0.9
25
32
25
UNITS
pV
pVlMo
nA
nA
pVp·p
nV/VHz
nVlVHz
pAlVHz
100
300
VCM = OV to 3.5V
3.5
0
100
400
5
3.8
-0.3
114
3.5
0
97
4
3.8
-0.3
112
MO
GO
V
V
dB
Vs= ±2Vto ±18V, Vo=OV
106
126
103
124
dB
Vo=O.03Vto 4V, RL = 10k
Vo=0.03Vt03.5V, RL =2k
Output Low, No Load
Output Low, 6000 to GND
Output Low, ISINK = 1mA
Output High, No Load
Output Hlgh,6OODto GND
1.0
0.5
2.5
2.0
15
5
220
4.4
4.0
0.4
340
0.7
0.3
2.0
1.8
15
5
220
4.4
4.0
0.4
350
V/pV
V/pV
mV
mV
mV
V
V
Vips
pA
pA
4.0
3.4
0.25
RSET= co
RSET = 180k Pin 8to Pin 7
(Note 2)
25
10
350
4.0
3.4
0.25
520
90
90
2.7
2.7
25
10
350
570
V
LT1006
ELECTRICAL CHARACTERISTICS
\Is =5V, OV, VCM =O.1V, Vo =UV, - 55°esTA s 125°C, unle•• otherwise noted.
SYMBOL
Vos
.§:!sJ!..
t.Temp
los
Is
AVOL
CMRR
PSRR
Is
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Common-Mode Rejection
Ratio
Power Supply Rejection
Ratio
Maximum Output Voltage
Swing
Supply Current
CONDITIONS
•
MIN
•
•
•
•
•
•
••
•
Vo=0.05Vt03.5V, RL=2k
VCM = O.IV to 3.2V
Vs= :t2Vto :t18V, Vo=OV
Output Low, 8000 to GND
Output High, 8000 to GND
LT1008AM
TYP MAX
40
180
0.2
1.3
0.25
90
0.4
13
0.8
103
100
117
6
3.8
15
3.2
380
630
MIN
2.0
25
LT1008M
TYP MAX
80
250
1.8
0.3
0.15
87
0.5
16
0.7
102
97
116
3.1
6
3.8
400
4.0
40
UNITS
"V
"V/oC
nA
nA
VI"V
dB
dB
18
680
mV
V
p.A
ELECTRICAL CHARACTERISTICS
Vs =5V, OV, VCM =OV, Yo =UV, ooe STA s 70°C, unless otherwise noted.
SYMBOL
Vos
PARAMETER
Input Offset Voltage
CONDfTlONS
lT1006N8
t.Vos
t.Temp
los
Is
AVOL
CMRR
PSRR
Is
Input Offset Voltage Drift
lT1006N8
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Common-Mode Rejection
Ratio
Power Supply Rejection
Ratio
Maximum Output Voltage
Swing
Supply Current
Va = D.04V to 3.5V, RL =2k
VCM=OVt03.4V
Vs= :t2Vto :t18V, Vo=OV
Output Low, 8000 to GND
Output High, 8000 to GND
The • denotes the specifications which apply over the full operating temperature range.
Note 1: This parameter Is guaranteed by design and is not tested.
Note 2: Regular operation does not require an external resistor. In order to
program the supply current for low power or high SJ1.eed operation, connect
an external resistor from Pin 8to Pin 7or from Pin 8to Pin 4, respectively.
Supply current specifications (for Rscr = 18Ok) do not include current in
RseT·
••
••
•
•
•
•
•
••
•
MIN
LT1oo8A.C
TYP MAX
110
30
0.2
1.3
1.2
20
0.35
96
0.25
11
1.3
109
101
120
3.3
6
3.9
350
MIN
0.25
92
0.3
12
1.2
108
97
118
3.2
6
3.9
380
13
570
LT1008C
TYP
45
50
0.3
0.5
MAX
160
190
1.8
2.5
2.5
30
UNITS
,.V
,.V
"V/oC
"V/oC
nA
nA
V/"V
dB
dB
13
620
mV
V
p.A
Note 3: This parameter Is tested on a sample basis only. All noise parameters are tested with Vs = :t 2.5V. Va = OV.
Note.4: Optional offset nulling Is accomplished with apotentiometer connected between the trim terminals and the wiper to V- . A10k pot (providing
anull range of :t 6my) is recommended for minimum drift of nulled offset
voltage with temperature. For Increased trim resolution and accuracy, two
fixed resistors can be used In conjunction with a smaller potentiometer.
For example: two 4.7k resistors lied to pins 1and 5, with a5000 pot In the
middle, will haveanull range of :t 150"V.
2-43
111
LT1006
ELECTRICAL CHARACTERISTICS Vs = :!: 1SV, TA =2S"C, unless otherwise noted.
PARAMETER
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Voltage Range
CONDITIONS
AVOL
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
VOUT
SR
Maximum Output Voltage Swing
Slew Rate
VCM = +13.5V, -15V
Vs= ±2Vto ±18V, Vo=OV
Vo= ±10V, RL=2k
Vo = ± 10V, RL = 6000
RL=2k
RSET= co
RSET = 3900 Pin 8 to Pin 4
Is
Supply Current
SYMBOL
Vos
los
Ie
CMRR
PSRR
LT1006AM/AC
MIN
TYP
MAX
100
30
0.1
0.5
7.5
12.0
13.5
13.8
-15.0 -15.3
100
117
126
106
1.5
5.0
0.8
1.5
±13
±14
0.25
0.4
1.0
1.2
360
540
LT1006M/C
TYP
MAX
50
160
0.15
0.9
8.0
20.0
13.5
13.8
-15.0 -15.3
97
116
103
124
1.2
4.0
0.5
1.0
±12.5 ±14
0.25
0.4
1.0
1.2
360
600
MIN
UNITS
pV
nA
nA
V
V
dB
dB
V/pV
VlpV
V
VIpS
VIpS
pA
ELECTRICAL CHARACTERISTICS Vs= :!:1SV, -SS"C STAS12S"C, unless otherwise noted.
SYMBOL
Vos
6Vos
6Temp
los
Ie
AVOL
CMRR
PSRR
Is
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Maximum Output Voltage Swing
Supply Current
MIN
CONDITIONS
•
•
•
Vo= ±10V, RL::2k
VCM = +13V, -14.9V
Vs= ±2Vto ±18V, Vo::OV
RL=2k
•
•
•
•
•
•
0.5
97
100
±12
LT1006AM
TYP
MAX
60
320
0.5
2.2
0.2
9
1.5
114
117
±13.8
400
MIN
2.0
18
0.25
94
97
±11.5
650
LT1006M
TYP
110
0.6
0.3
11
1.0
113
116
±13.8
400
460
MAX
UNITS
pV
2.8
pV/oC
3.0
27
nA
nA
V/pV
750
dB
dB
V
pA
ELECTRICAL CHARACTERISTICS Vs = :!: 1SV, O"C ~TAS70"C, unless otherwise noted.
SYMBOL
Vos
PARAMETER
Input Offset Voltage
CONDITIONS
LT1006NB
6Vos
6Temp
Input Offset Voltage Drift
los
Ie
AVOL
CMRR
PSRR
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Maximum Output Voltage Swing
Supply Current
Is
2-44
LT1006N8
Vo= ± 10V, RL = 2k
VCM = 13V, -15V
Vs:: ±2Vto ±lBV, Vo=OV
RL=2k
•
••
•
•
•
•
•
•
•
MIN
LT1006AC
TYP
MAX
200
50
0.5
1.0
98
101
±12.5
0.15
B.O
3.0
116
120
±13.9
370
MIN
2.2
1.0
15
0.7
94
97
±11.5
600
LT1006C
TYP
75
60
0.6
0.7
0.25
10
2.5
114
118
±13.8
360
MAX
300
330
UNITS
pV
pV
2.B
pV/oC
3.5
pVloC
2.0
23
nA
nA
V/pV
660
dB
dB
V
pA
LT1006
TYPICAL PERFORmAnCE CHARACTERISTICS
Offset Voltage Drift with
Temperature of Representative
Units
150
30
0
...-
>
t;;-30
-
I--
~-60
500
--....
-
...........
~
-90
~
w
~
1.0
~
~
0
>
t;;
Rs
0.1
0
~
50
~
TEMPERATURE (0C)
tto
;;;:;
Vs=5V, OV, 25°C
lk
2.0
r
c
3k 10k 30k 100k 300k 1M 3M 10M
BALANCED SOURCE RESISTANCE, Rs (Il)
@T 125°C
I ICDPOsLE ts
-200
@NEGATIVE Vas
-300
-0.4
0
0.4
0.6
1.0
COMMON-MODE INPUT VOLTAGE (V)
10M
TA 25°C,....
w
/
'"~
g
ftt;;
(
;;;:;
w
0.5
is
o
I
o
LTl006 METAL CAN (H) PACKAGE
LTl006 CERDIP (J) PACKAGE
1
2
3
TIME AFTER POWER ON (MIN)
18
Input Offset Current vs
Temperature
0-
<>
~
a;
5a.
9
r--- r-Ys t--
6
5V,ov
~
~ r--- Vs=±15V
ffi~
-
V
~
0.3
<>
-,.."
~ 0.1
-50 -25
o
25
50
75
TEMPERATURE (0C)
100
125
o
Vs=5V,OV
.........
~
;;;:;
o
-
t;;
0.2
4
II
~
::>
ito
10k
~
i';
VCM=OV
~ 0.4
12
'/
lk
LOAD RESISTANCE TO GROUND (Il)
Input Bias Current vs Common·
Mode Voltage
0.5
~cM=dv
15
lOOk
100
10k
lk
LOAO RESISTANCE TO GROUND (Il)
Input Bias Current vs Temperature
I
ynrlr
/'~
1.0
o
'":i
14
Voltage Gain vs Load Resistance
with Vs = ± 15V
Vs=~V, OV
TA=25°C
:; 1.5
CDT 25°q_-: p@T 25°C
0
-100
Voltage Gain vs Load Resistance,
Vs=5V,OV
Warm·Up Drift
CDT-125°C
~100
t;;
i[
1~
100
300
~ 200
~
/
~r::::-~s- ±,15V,
-~
~
+
0.01
400
//
~
i=-'Vs= :C15V:
'
-55°C TO 125°C~~
It
0
0-
4>-
-120
-150
-50
VS=5V,OV
f==1==V S=5V,OV, -55°C TO 125°C=
-
90
ttl
~
c5
Vos vs Common· Mode Voltage vs
Temperature
10
bv
VSI=5V,
VCM=O.1V
120
~ 60
Offset Voltage vs Balanced
Source Resistor
-50 -25
r-o
~
ui
--
'"
i5
§!
V
2
~
;;;:;
~
o
::;;
r-!s=±15V
25
50
75
TEMPERATURE (OC)
3
~
::;;
::;;
VS=5V, OV, T=125°C
0
,S
o
<> -1
100
125
0
±15V~
VS=5V, OV, T=25°C
T=25° C
-6
-12
-18
INPUT BIAS CURRENT (nA)
2-45
LT1006
TYPICAL PERFORmAnCE CHARACTERISTICS
10Hz Voltage Noise Distribution
Noise Spectrum
1000
100
Vs= ±2.SV
TA=2S'C
200 UNITS TESTED
FROM THREE RUNS
80
0.1 Hz to 10Hz Noise
TA 2S'C
Vs ±2VTO ±18V
VS= ±2V TO ±1SV-+--+---1.-----+--+---1
TA=2S'C
60
'"
~
0
l!l
~
40
z
I
I
20
.......
1
I
f
o
16
1
immr
32
450
:1
~
i
400
Vs- ±1SV,..........
'->
350
ISINK 0
0.01
-50 -25
80
0
ISINK 100pA
ISINK 10pA
~
1\
VS=5V'~
BO
'"'"
60 -
g
40
~
C:i
20
1\
100
z
~
~
100
±15V
140
,1\
5V
4V
4V
2V
2V
OV
OV
03
~
I
160 ~
~\ \
,
I
Q..
""--100
~
VS=5V,OV
50,.s/DIV
o
VS=5V,OV
50,.s/DIV
2-49
LT1006
TYPICAL APPLICATions
Platinum RTD Signal Conditioner with Curvature Correction
+V
VoHage Controlled Current Source with Ground
Referred Input and Output
V=S.6V-1OV
+SV
INPUT
0-2V
LM334
0.68pf
+SV
1k
50k
S·C
TRIM
.J..
r--t!}--,
1koO
0.02V 10 4V OUT =
2·CIO 4OO·C
:l=O.2S°C
1k··
Rp
1k@
O·C
Rp=ROSEMOUNT 118MF
00=TRWMAR-60.1%
°=1% METAL FILM
OPERATES FROM A SINGLE 5V SUPPLY
Micropower 1MHz V- FConverter
LM334
3.1kO
2001<0
LJ1004-2.S
lJ1004-1.2
L...--------+--:::~lMHZ
1000pF (POL VSTYRENE)
-<
=2N3904
= 1II METAL FILM
=1% METAL ALM. SELECTED
-{>o- = 74&14
2-50
CHARGE PUMP
0.12% LINEARITY
280,.A QUIESCENT CURRENT
680,.AAT 1MHz
LT1006
TYPICAL APPLICATions
Micropower Thermocouple Signal Conditioner with Cold Junction Compensation
45V
(3AACElLS)
R4
233k*
lOOk
CATALYST
AESEARCH COAP _
MODEL 273628V
lT1034
12V
A2
186·
Al
1684·
R3
A,
OVTO 3V OUT=
O°C-60°C
::!:O.75"C
5.76M*
18k·
TYPE J THEAMOCOUPLE
TOTAL POWER CONSUMPTION .:s;500,IlW
*=TRWMAR-601%
Rr=YEllOW SPRINGS INST. CO
MODEL 44007 5k@25"C
5.981<·
Linear Thennometer
5V
5V
10k 5%
LT1004
1.235V
5000
100°C
T1 =YEllOW SPRINGS 144201.
ALL RESISTORS= TRW MAR-6 0.1% UNLESS NOTED.
::t 5V Precision Instrumentation Amplifier
5V
,.--..dJ..---,
: :
11
I
II
Vour
II
11
DIFFERENTIAL
,,,,,
INPUT p C l (EXTERNAL) I
I
12
I
I
_I
13
r;$
0.01"".
-sv
I
1
¥
Al
A2
>---~14~--i-~~--~~---J
y, LTC1043
!
,.I., ______ JI
~
-5V
CMRR> l20dB AT DC
CMRR> 120dB AT 60Hz
OUAL SUPPLY OA SINGLE 5V
GAIN=1+R2/R1
'<0 =150.V
.6Vos "2JlVI~C
aT
COMMON-MOOE INPUT VOLTAGE INCLUDES THE SUPPUES
2-51
LT1006
Ln006 SCHEmATIC DIAGRAm
PACKAGE DESCRIPTion
Dimensions in inches (millimeters) unless otherwise noted.
J8Package
Hermetic DIP
H8Package
TO·5 Metal Can
0040
(1016)
if
~
(0254-1.143)
t
l::=::::1
O~
0.305-0335
~1
OOSO
""L
("iT7O)
Nt
SEATING
__
PlJINE,-0010-0045
N8Package
Plastic DIP
1
RefERENCE
GAUGE
PLANE
------r-PLANE 0500-0750
T
(1270.,905)
00 a an
_II.--(~~:_~~~)
TVP
°zoo
0
1
(50801
MAX
0400:l
l10160i
MAX
765
2
-:JO.Ol0
-.l
(6.350::1:0254)
3
4
0045-0065
0130",0005
=tj".
11143-1~"1 (3"".012~ jO]iij
0065
(1'SSl)LT't'P
fJ
MIN
0.125
(3175)
MIN
0.045:1.0015
(1143±0381)
0100±0010
1',,",'.02541
j
0018=*:0.003
(0.457.00761
0009-0015
(0229-0381)
NOTE LEAD DIAMETER IS UNCQt,lTROLlED B£TWEEN
THE REFERENCE PLANE ANDSEAJIHG PLANE
2-52
I--- 0.325 ~~.~~ +I
(8.255~~:) I
I
~"""'-LlneJ\Q
~~
LTl006S8
TECHNOLOGY~------P-re-C-iS-iO-n-,-Si-ng-l-e-S-u-pp-l-y
OpAmp
FEATURES
DESCRIPTion
• Single Supply Operation
Input Voltage Range Extends to Ground
Output Swings to Ground while Sinking Current
• Guaranteed Offset Voltage
400,N Max.
• Guaranteed Low Drift
3.5/LV/oC Max.
• Guaranteed Offset Current
0.9nA Max.
• Guaranteed High Gain
5mA Load Current
1.2 Million Min.
17mA Load Current
0.5 Million Min.
• Guaranteed Low Supply Current
570/LA Max.
• Supply Current can be Reduced by a Factor of 4
• Low Voltage NOise, 0.1 Hz to 10Hz
0.55/LVp-p
• Low Current Noise0.08pA/v'HZat 10Hz
Better than OP-07
100M!} Min.
• High Input Impedance
2.7V Min.
• Guaranteed Minimum Supply Voltage
The LT1006S8 is the first precision single supply operational amplifier. Its design has been optimized for single
supply operation with a full set of specifications at 5V.
Specifications at ± 15V are also provided.
APPLICATions
• Low Power Sample and Hold Circuits
• Battery Powered Precision Instrumentation
Strain Gauge Signal Conditioners
Thermocouple Amplifiers
• 4mA-20mA Current Loop Transmitters
• Active Filters
The LT1006S8 has low offset voltage of 80/LV, drift of
O.7/LV/oC, offset current of 150pA, gain of 2 million, common-mode rejection of 112dB, and power supply rejection
of 126dB.
Although supply current is only 350p.A, a novel output stage
can source or sink in excess of 20mA while retaining high . . .
voltage gain. Common-mode input range includes ground to . . .
accommodate low ground-referenced inputs from strain
gauges or thermocouples, and output can swing to within a
few millivolts of ground. If higher slew rate (in excess of
W//Ls) or micropower operation (supply current down to
90/LA) is required, the operating currents can be modified by
connecting an external optional resistor to Pin 8.
For asimilar single supply precision dual op amp in the SO
package, please see the LT1013DS8 data sheet.
LT1006 Single Supply, Micropower Sample and Hold
+9V
360k
300k
390n
OUTPUT
INPUT
0-5V
~CD4066
SAMPLE-HOLO COMMANO
HIGH=SAMPLE---+-.....
LOW=HOlD
ACQUISITION TIME
HOLO SETTLING TIME
S-H OFFSET
HOLD SUPPLY CURRENT
SAMPLE SUPPLY CURRENT
1kHz SAMPLE RATE CURRENT
(SAMPLING FOR 20,...
HOLDING FOR 300,..)
DROOP RATE
20,..
10,..
1mV
250,.A
5.0mA
800,.A
0.5mV/ms
2-53
LT1006S8
A8S0LUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage ................................... ± 22V
Input Voltage ........... Equal to Positive Supply Voltage
......... 5V Below Negative Supply Voltage
Differential Input Voltage ............................ 30V
Output Short Circuit Duration .................. Indefinite
Operating Temperature Range ............... O°C to 70°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec) .............. 300°C
ORDER PART
NUMBER
TOP VIEW
T~I'iJ
1
6
~\j (NOTE 2)
LT1006S8
5
¥~rM (NOTE 4)
PART MARKING
S6 PACKAGE
PLASTIC SOIC
1006
ELECTRICAL CHARACTERISTICS Vs=5V,OV, VCM=OV, VOUT=1.4V, TA=25°C,unlessotherwisenoted.
SYMBOL
Vos
t:Nos
lITime
los
IB
en
in
PARAMETER
Input Offset Voltage
Long Term Input Offset
Voltage Stability
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
Input Noise Current Density
Input Resistance
Differential Mode
Common-Mode
Input Voltage Range
AVOL
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
VOUT
Maximum Output Voltage Swing
CMRR
PSRR
SR
Is
Slew Rate
Supply Current
Minimum Supply Voltage
2-54
CONDITIONS
MIN
0.15
10
0.55
23
22
0.08
0.1 Hz to 10Hz
10 = 10Hz (Note 3)
fo = 1000Hz (Note 3)
fo= 10Hz
(Note 1)
100
VCM = OV to 3.5V
Vs= ±2Vto ±18V, Vo=OV
Vo=0.03Vt04V, RL = 10k
Vo=o.o3Vt03.5V, RL =2k
Output Low, No Load
Output Low, 60011 to GND
Output Low, ISINK = 1mA
Output High, No Load
Output High, 60011 to GND
LT1006S8
TYP
80
0.7
3.5
0
97
103
0.7
0.3
4
3.8
-0.3
112
124
2.0
1.8
15
5
RSET= 00
RSET= 180k Pin 8to Pin 7
(Note 2)
2.7
4.4
4.0
0.4
350
90
UNITS
~V
~v/Mo
0.9
25
nA
nA
32
25
nV/v'Hz
nV/v'Hz
pAlv'Hz
~Vp·p
300
220
4.0
3.4
0.25
MAX
400
Mil
Gil
V
V
dB
dB
V/~V
V/~V
25
10
350
mV
mV
mV
V
V
V/~s
570
~
~
V
LT1006S8
ELECTRICAL CHARACTERISTICS Vs =± 15V, TA =25°C, unless otherwise noted.
SYMBOL
Vos
los
18
PARAMETER
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Voltage Range
CONDITIONS
AYOL
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Your
SR
Maximum Output Voltage Swing
Slew Rate
VCM= +13.5V, -15V
Vs= ±2Vto ±18V, Vo=OV
Vo= ±10V,RL=2k
Vo= ±10V,RL=6000
RL=2k
RSET= co
RSET = 3901l Pin 8to Pin 4
Is
Supply Current
CMRR
PSRR
MIN
13.5
-15.0
97
103
1.2
0.5
±12.5
0.25
1.0
LT1006S8
TYP
100
0.15
8.0
13.8
-15.3
116
124
4.0
1.0
±14
0.4
1.2
360
MAX
525
0.9
20.0
UNITS
~V
nA
nA
V
V
dB
dB
VI~V
V/~V
V
V/~
V/~s
600
~
ELECTRICAL CHARACTERISTICS
Vs =5V, OV, VCM =OV, VOUT =1.4V, OOC STA s70°C, unless otherwise noted.
SYMBOL
Vos
I;,Vos
I;,Temp
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
los
18
AYOL
CMRR
PSRR
Vour
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Maximum Output Voltage Swing
Is
Supply Current
CONDITIONS
MIN
•
•
•
Vo=0.04Vto3.5V, RL =2k
VCM=OVto3.4V
Vs= ±2Vto ±18V, Vo=OV
Output Low, 6000 to GND
Output High, 6OOIlto GND
•
•
•
•
••
•
0.25
92
97
3.2
LT1006S8
TYP
110
0.7
0.3
12
1.2
108
118
6
3.9
360
MAX
560
3.5
2.5
30
UNITS
~V
~VloC
nA
nA
V/~V
13
620
dB
dB
mV
V
~
2-55
LT1006S8
ELECTRICAL CHARACTERISTICS Vs= :t15V,OOC ::;TA::;70oC, unless otherwise noted.
SYMBOL
Vos
!::Nos
L'lTemp
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
los
16
AvoL
CMRR
PSRR
Your
Is
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Maximum Output Voltage Swing
Supply Current
CONDITIONS
Vo= ±10V,RL=2k
VCM=13V, -15V
Vs= ±2Vto ±18V, Vo=OV
RL=2k
The. denotes the specifications which apply over the full operating tem·
perature range.
Note 1: This parameter is guaranteed by design and is not tested.
Note 2: Regular operation does not require an external resistor. In order to
program the supply current for low power or high speed operation, connect
an external resistor from Pin ato Pin 7or from Pin a to Pin 4, respectively.
Supply current specifications (for RSET = taOk) do not include current in
RSET'
•
•
•
•
•
•
•
•
•
MIN
LT100658
TYP
150
1.0
0.7
94
97
±11.5
0.25
10
2.5
114
118
±13.8
380
MAX
730
4.5
2.0
23
UNITS
~V
~V/oC
nA
nA
V1~V
dB
dB
V
660
~
Note 3: This parameter is tested on a sample basis only. All noise parame·
ters are tested with Vs = ± 2.5V, Vo = OV.
Note 4: Optional offset nulling is accomplished with a potentiometer con·
nected between the trim terminals and the wiper to V-. A 10k pot (providing
a null range of ± 6mV) is recommended for minimum drift of nulled offset
voltage with temperature. For increased trim resolution and accuracy, two
fixed resistors can be used in conjunction with a smaller potentiometer.
For example: two 4.7k resistors tied to pins 1and 5, with a 5000 pot in the
middle, will have a null range of ± 150#
~-Y--Llnll\l2
~)r
LTl 007/LTl 037
TBCHNOLoG~~~------L-o-w--N-o-is-e-,-Hi-g-h-S-p-e-e-d
Precision Operational Amplifiers
FEATURES
DESCRIPTion
•
•
•
•
The LT1007/LT1037 series features the lowest noise
performance available to date for monolithic operational amplifiers: 2.5nV I vHz wideband noise (less
than the noise of a 400n reSistor), 1/f corner frequency of 2Hz and 60nV peak to peak 0.1Hz to 10Hz noise.
Low noise is combined with outstanding precision and
speed specifications: 10/LV offset voltage, 0.2/LV 1°C
drift, 130 dB common-mode and power supply rejection, and 60MHz gain-bandwith-product on the decompensated LT1037, which is stable for closed loop . . .
gains of 5 or greater.
...
•
•
•
•
•
Guaranteed 4.5 nV I vHz 10 Hz noise
Guaranteed 3.8 nV I vHz 1kHz noise
0.1 Hz to 10 Hz noise, 60 nV pop, typical
Guaranteed 7 million min. voltage gain,
RL = 2kn
Guaranteed 3 million min. voltage gain,
RL = 600n
Guaranteed 25/.N max. offset voltage
Guaranteed 0.6/LV 1°C max. drift with temperature
Guaranteed 11V I/Lsec min. slew rate (LT1037)
Guaranteed 117 dB min. CMRR
The voltage gain of the LT1007/1037 is an extremely
high 20 million driving a 2kn load and 12 million driving a 600n load to ± 10V.
In the deSign, processing, and testing of the device,
particular attention has been paid to the optimization
of the entire distribution of several key parameters.
Consequently, the specifications of even the lowest
cost grades (the LT1007C and the LT1037C) have
been spectacularly improved compared to equivalent
grades of competing amplifiers.
APPLICATions
•
•
•
•
•
•
•
Low Noise Signal Processing
Microvolt Accuracy Threshold Detection
Strain Gauge Amplifiers
Direct Coupled Audio Gain Stages
Sine Wave Generators
Tape Head Preamplifiers
Microphone Preamplifiers
The sine wave generator application shown below utilizes the low noise and low distortion characteristics
of the LT1037.
Ultra-Pure 1kHz Sine Wave Generator
O.1Hz to 10Hz Noise
430Q
»-'<-+-OUTPUT
!llJ
In I ill
#327 Lamp.
1
I ~ 2"RC
R ~ 1591.5Q ± .1%
C ~ 0.1 ~I ±.1%
Total Harmonic Distortion ~ < .0025%
Noise ~ < .0001%
Amplitude ~ ± 8 volts
Output Frequency ~ 1.000kHz lor values
given ±.4%
A, IMI, I,,~IA
P N' !'ttI
IAIII I'IW~ IijII ~II"
1'1
8
10
TIME (SECONDS)
2-57
LTl 007 /LTl 037
PACKAGE/ORDER InFORmATiOn
ABSOLUTE mAXimum RATinGS
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . .. ± 22V
Input Voltage ............ Equal to Supply Voltage
Output Short Circuit Duration. . . . . . . . . .. Indefinite
Differential Input Current (Note 8)....... " ± 25mA
Lead Temperature (Soldering, 10 sec.). . . . .. 300°C
Operating Temperature Range
LT1007/1037AM, M.......... -55°C to 125°C
LT1007/1037AC, C .............. O°C to 70°C
Storage Temperature Range
All Devices ................. -65°C to 150°C
ORDER PART NUMBER
4
V-(CASE)
METAL CAN H PACKAGE
TOP VIEW
HERMETIC DIP JB PACKAGE
PLASTIC DIP NB PACKAGE
ELECTRICAL CHARACTERISTICS VS =
SYMBOL
Vos
AVos
ATime
los
18
en
in
CMRR
PSRR
AVOL
Vour
SR
GBW
Zo
Pd
2-58
PARAMETER
Input Offset Voltage
Long Term Input Offset Voltage
Stability
Input Offset Current
Input Bias Current
Input NOise Voltage
Input Noise Voltage Density
Input Noise Current Density
± 15V. TA
CONDITIONS
(Note 1)
(Notes 2 and 3)
O.lHz to 10Hz (Notes 3 and 5)
fo = 10Hz (Notes 3 and 4)
fo = 1000Hz (Note 3)
fo = 10Hz (Notes 3 and 6)
fo = 1000Hz (Notes 3 and 6)
Input Resistance - Common Mode
Input Voltage Range
Common Mode Rejection Ratio
VCM = +11V
Power Supply Rejection Ratio
Vs = +4Vto +18V
Large Signal Voltage Gain
RL ;;. 2kQ, Vo = ± 12V
RL ;;. lkQ, Vo = ± 10V
RL ;;. 6000, Vo = + 10V
Maximum Output Voltage Swing
RL ;;. 2kO
RL ;;. 6000
RL ;;. 2kQ
Slew Rate
LT1007
LT1037
AvCL;;' 5
Gain-Bandwidth
LT1007
fo = 100kHz (Note 7)
Product:
LT1037
fo = 10kHz (Note 7) (AVCL ;;. 5)
Open Loop Output Resistance
Vo = 0,1 0 = 0
Power Dissipation
LT1007
LT1037
=
LT1007AMH
LT1007MH
LT1007ACH
LT1007CH
LT1037AMH
LT1037MH
LT1037ACH
LT1037CH
LT1007AMJ8
LT1007MJ8
LT1007ACJ8
LT1007CJ8
LT1007ACN8
LT1007CN8
LT1037AMJ8
LT1037MJ8
LT1037ACJ8
LT1037CJ8
LT1037ACN8
LT1037CN8
25°C. unless otherwise noted.
MIN
LT1007AM/AC
LTlO37AM/AC
TYP
MAX
10
25
0.2
1.0
7
30
+10
+35
0.06
0.13
2.8
4.5
2.5
3.8
1.5
4.0
0.4
0.6
7
+11.0 ±12.5
117
130
110
130
7.0
20.0
5.0
16.0
3.0
12.0
±13.0 ±13.8
+11.0 +12.5
1.7
2.5
11
15
8.0
5.0
45
60
70
80
120
60
130
Mill
LTlOO7M/C
LTl037M/C
TVP
MAX
20
60
0.2
1.0
12
50
+15
±55
0.06
0.13
2.8
4.5
2.5
3.8
1.5
4.0
0.4
0.6
5
+11.0 +12.5
126
110
106
126
5.0
20.0
3.5
16.0
2.0
12.0
±12.5 ±13.5
+10.5 +12.5
1.7
2.5
11
15
5.0
8.0
45
60
70
80
140
85
140
UNITS
/LV
/Lv/Mo
nA
nA
/LVp,p
nv~
nVl Hz
PA/~jg
pAl Hz
Go
V
dB
dB
VI/LV
VI/LV
VI/LV
V
V
VlI-'S
VM
MHz
MHz
0
mW
mW
LTl 007 jLTl 037
ELECTRICAL CHARACTERISTICS VS =
SYMeOL
Vos
...£!.9L
PARAMETER
Input Offset Voltage
CONOITIONS
(Note 1)
Average Input Offset Drift
(Note 9)
± 15V. -55°C,,;;; TA ,,;;; 125°C. unless olharwisa notad.
•
•
LlTemp
CMRR
PSRR
AVOL
Input Offset Current
Input Bias Current
Input Voltage Range
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Vour
Pd
Maximum Output Voltage Swing
Power Dissipation
los
10
SYMBOL
Vos
...£!.9L
PARAMETER
Input Offset Voltage
CONDITIONS
(Note 1)
Average Input Offset Drift
(Note 9)
=
LlTemp
CMRR
PSRR
AVOL
Input Offset Current
Input Bias Current
Input Voltage Range
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
VOUT
Pd
Maximum Output Voltage Swing
Power Dissipation
los
10
••
••
•
•
± 15V.
NOTES:
The. denotes the specifications which apply over full operating
temperature range.
For MIL-STD components, please refer to LTC 883C data sheet for test
listing and parameters.
Not. 1: Input Offset Voltage measurements are performed by
automatic test equipment approximately 0.5 seconds after
application of power. AM and AC grades are guaranteed fully
warmed up.
Not. 2: Long Term Input Offset Voltage Stability refers to the average
trend line of Offset Voltage'~s" Time over extended periods after the
first 30 days of operation. Excluding the initial hour of operation,
changes in Vos during the first 30 days are typically 2.5J.LV - refer
to typical performance curve.
Not. 3: This parameter is tested on a sample basis only.
0.6
50
15
+20
+60
+lt5
126
104
126
3.0
14.0
10.0
2.0
+ 12.5 + 13.5
100
150
LT1007M/LTlO37M
MAX
MIN
TYP
50
160
0.3
to
20
85
+35
+95
+10.3 +11.5
104
120
100
120
2.0
14.0
t5
10.0
+12.0 + 13.5
100
170
UNITS
"V
"VI'C
nA
nA
V
dB
dB
VI"V
VI"V
V
mW
ooe ,,;;; TA ,,;;; 70°C. un lass otherwise notad.
•
•
•
•
•
•
••
•
•
•
VCM ~ + 10.5V
Vs ~ ±4.5V to + 18V
RL ~ 2k!l, Vo ~ ± 10V
RL ~ lk!l, Vo ~ +10V
RL ~ 2k!l
0.2
•
• +10.3
• 112
VCM ~ + 1O.3V
Vs ~ +4.5V to + 18V
RL ~ 2k!l, Vo ~ ±10V
RL ~ lk!l, Vo ~ + 10V
RL ~ 2k!l
ELECTRICAL CHARACTERISTICS VS
LT1007AM/LT1037AM
MIN
TYP
MAX
60
25
LTlOO7AC/LTlO37AC
MIN
TYP
MAX
20
50
0.2
0.6
10
40
+14
+45
+10.5 +lt8
114
126
106
126
4.0
18.0
14.0
2.5
+ 12.5 + 13.6
90
144
LTlOO7C/LTlO37C
MIN
TYP
MAX
110
35
0.3
to
15
70
+20
+75
+10.5 +lt8
120
106
102
120
2.5
18.0
2.0
14.0
+ 12.0 + 13.6
90
160
UNITS
"V
"VI'C
nA
nA
V
dB
dB
V/"V
V/"V
V
mW
Not. 4: 10Hz noise voltage density is sample tested on every lot.
Devices 100% tested at 10Hz are available on request.
Not. 5: See the test circuit and frequency response curve for O.IHz to
10Hz tester in the Applications Information section.
Not. 6: See the test circuit for current noise measurement in the
Applications Information section.
Not. 7: This parameter is guaranteed by design and is not tested.
Not. 8: The inputs are protected by back-to-back diodes. Current
limiting resistors are not used in order to achieve low noise. If
differential input voltage exceeds ± 0.7V, the input current should be
limited to 25mA.
Not. 9: The Average Input Offset Drift performance is within the
specifications unnulled or when nulled with a pot having a range of
8kn to 20kn.
2-59
LTl 007 jLTl 037
TYPICAL PERFORmAnCE CHARACTERlsncs
10Hz Vollag. Noise Distribution
140 ,---,--,----::r---.--,---r---;--,--.---,
- ±15V
120 I---I-+--IH---+--+-+--- - 25'C
f!!
Z
:::>
~
I I !
I---I-+.......-+-
100
z
_100.~.
">
Vs
+15V
I~
:;:
MEASURED
SIX RUNS
80
TA
25°C
I
s30~~~~~ffl-H+m~+H~
I· illi:!
~
~
I
,!
co
~~ l°~~iI~II~~IIII~
-111'1f~'1~I~INER 2~lf
Ty~lf~~1
ffi 60
~
:::>
0.02 to 10Hz RMS Naisi. G.II = 50,000
(Measund OR HP3582 Splctr•• A•• lyzer)
Voltaae lolse vs Fnqaucy
~
~
40
20
o
o
1
2
3
4
5
6
7 8
MAXIMUM
!j
3
~
11111111
l~~illLLllillill~~LJ~~
-
111111 111111111
9 10
0.1
VOLTAGE NOISE DENSITY (nV I VHz)
1.0
10
100
Marker at 2Hz (-
1000
50,000
Tolal lolse vs Sourci RlIlslancl
0.01 to 1Hz Pllk to Puk Noisl
Ill.
III'
"
'.l1li'
I'll
- -r-
Jf'
II"-
I
.
VHz
Voltl.1 Noisl VI Ta.patln
~I .Ii.
.J. .1l11J.
Lm.~ 1m
I'
1" corner) -
179,N/VHz _ 359~
FREQUENCY (Hz)
f--
AT 10Hz_
-
~ ~- ~llkHZ
.'
-:::
-
Vs - ±15V
---,.--+-
--..,... - ---;-T--+------- .
20
40
60
~
80
100
0.1
TIME (SECONDS)
1.0
10
100
o
-50 -25
SOURCE RESISTANCE (k!l)
10.0
25
50
75
100
125
TEMPERATURE ('C)
Wid.b•• dValtagl Nol.a
(0.1 Hz to Frlqulncy Indlcatld)
Currlnt Noisl VS FraquI.cy
0
Villagi Naill vs Supply Valtl.1
10 _ _
~
w
~
"-
IIIIIII
10
100
II
::E
a:
II
lk
AT 1kHz
~
!$ 0.1
en
f- f~I~A
FREQUENCY (Hz)
2-60
AT 10Hz-
W
to
1" CORNER - 120Hz
0.1
en 1.0
z
15
r--.,.MAXIMUM
10k
TA i25'C 0.01
0.1
1.0
10
BANDWIDTH (kHz)
100
o
o
±5
±10
±15
±20
SUPPLY VOLTAGE (V)
±25
LTl 007 ILTl 037
TYPICAL PERFORmAnCE CHARAaERlsncs
Voltage Gall VI Suppl, Voltage
Vollage Gain va Frequency
180
160
140
~ 120
;; 100
~
'">=!'
80
T!
Vs
I- ""'=~
r-
~
~ ~50ci-
~
2-'"
r'\. l\..
I'\. I'\.
1-LT10~ 1\.LT1037
t\1\.
0
>
l\..r\.
10
z
~
5
o
-20
0.01 0.1 1 10 100 1k 10k 100k 1M 10M 100M
o
±5
~
20
~
15
!j'"
-1§! II
+.,
±10
±15
±20
~a:
o ;;;
+1
±25
-15
-5
0
5
10
15
warm-Up Drift
25r--r--r--r--r-------~
Vs
TA
.....
/
~
~
± 15V
25°C
1
METAL CAN (H) PACKAGE
'">=!'
g
§
-10
OUTPUT VOLTAGE (V)
MEASURED ON TEKTRONIX 178 LINEAR IC TESTER •
Voltage Gain va Temperalura
Voltaga Gain va Load Resistance
25
C.
z
we:
"'0
<0
600U
SUPPLY VOLTAGE (VOLTS)
FREQUENCY (Hz)
:>
~
T
"
0
I\:
Rl
jV
0
:>
..:;
I
v/
15
g
I'\:
V
I
"-
I\.
20
20
z
;;:
'"w
'"
""~
Voltage Gain, RL = 2K and 600n
~I!
:>
±15V
-
Rl~2kll
60
40
g
25
/-1
10
/
ti"i 5
!5
Vs
TA
/
~
~
±15V
25°C
I
o
0.3
0.1
1.0
3.0
0L......L---.l__..L..:'---"---__~___L____.J
-50 -25
10.0
0
50
10
/
'"
~
40
I
Vs
~
±15V
30
I
0.2.V/MONTH
:>
..:;
20
tll
~
10
0
§!
>- -10
~
o
0.2.V/MONTH TREND LINE
-20
-30
-40
-10
o
10
TIME (MONTHS)
50
75
100
.........
>c.-
TIME AFTER POWER ON (MINUTES)
LT1007f~
.-- ......
r-- I>< ......
..... 1--""
.--
-50
-50 -25
I--""
0
:;c 3 - - - ' - - _ . -.. -
.......
V
......V
""i'--...
50
- 125°C
.§.
V
c.:> 0LT1007/1037
25
Supply Current vs Suppl, Voltage
L
.........
i--
LT1007/1037A(
DUAL-IN-LiNE PACKAGE
PLrTIC (N) DR CETP (J)-
125
OHsel Voltage Drift wilh Temperalura
of Represenlalive Uails
Long Term Slabllity of Four
Represenlallve Units
!
25
TEMPERATURE (0G)
LOAD RESISTANCE (kll)
I
//
f
75
TEMPERATURE (OC)
T"'...
100 125
ffi
~ 2 I----~--~----
u
~
R:
i1l
11-----'-----·---~-·
~---+---------
±5
±10
±15
±20
SUPPLY VOLTAGE (VOLTS)
2-61
LT1007/LT1037
TYPICAL PERFORmAnCE CHARAOEAlSTICS
Cammal Mode RejlCtlon IS
Fraquency
1411
v+
TA - 25'C
Vs - ±15V
t-o=
120
Ci)~
IJI"" - ±IOV
~
i~
~~
z:
:::ia:
80 I---+_-t----'IJ'..
t-
0
LTl037
Av - +5
"-
I-
:::>
0
I
0.01
lo-lmA
Vs - ±15V
TA - 25'C
20 1---4---'-I
2-62
10
Ilf 10' 10' 10'
FREQUENCY (Hz)
'" 40
30
~ 20
0.001
10
100
lk
10k
lOOk
FREQUENCY (Hz)
10k
Ik
3k
LOAD RESISTANCE (II)
1M
~F I-...
:::>
If
~
-20
~~-30
"'~
-55'C
25'C
125'C
10
0
-10
t::
0.1
300
50
!
:::>
Vs - ±15V
TA - 25'C
100
l~
10
'""-w
~
III
Outp.t Silart Circuit C.rrent vs
Time
w
I-
"NEGATIVE
SWI~"
rrr
o
~m
~140
g
~
//
:::>
'00,---,-------...,------,
52
~120~~---4--+-~~--~
Ii
"-
I-
Closed Loop Outp.t IlIped.nn
160 ,-...,---,----,--,---.--,--,
OL---~~~--~~~~
-
!; 6
.......... ~/~37~
-~-50-~
~
40 1-----1-4-
_POSITIVE
SWING"
........
TEMPERATURE ('C)
~ 601---4--+--~~_+--L
12
~
~ 20 /-v---'--_'k+-t--f-++t---r-+---t---c-i-1
I
,
~ -5
~ -10
-3V 10 -20V
I
-50 -25
10'
-r----
~
+3
+2
-~
i
I
DEVICE WITH POSITIVE'-- .•..INPUT CURRENT
10 t-:::t:;::;:;i;~~-r-~
IS
I
-4
V-
40
~
20r-_---,---_-_ _
~
8:= +4
::eo
60
ffi
~
+3~ 10 +'20V
-3
;;::~
LT1007
Inp.t BIIS Curmt Over
tbe ca.... MO~I Ra••1
Comllon Modi Llllit va T.....r.t.ra
Vs-±15V
,
f--,
~
1
125'C
25'C- I---
55'C_ I---"'-40
~:
i
-50
0 1 3
TIME FROM OUTPUT SHORT TO GROUND (MINUTES)
LTl 007 jLTl 037
TYPICAL PERFORmAnCE CHARACTERISTICS
LT1037 Small Signal
Tranalent Response
LTl037 Phase Margin, Gain Bandwidth
Product, Slew Rate vs Temperature
LTl037 Large Signal Response
50mV
10V
70
OV
II
OV
-lOY
-50mV
AveL= +5, Vs= ±15V
CL=15pF
AveL= +5, Vs= ±15V
a
25
50
75
100
125
TEMPERATURE (OC)
LTl037 Gain. Phase Shift vs
Frequency
50
"
40
w
5
II
1
10
FREQUENCY (MHz)
190
100
I
+~ I~!~IN
0
,
- Vs ~ ± 15V.
TA ~ 25°C
CL ~ 100pF
II
-10
0.1
130
II
\
I.
I ji'l
10
160 ~
~
~
170 "-
~
w
vJ
100
-1-- -
-
~-
t- SLEW
I-
8G
=>
'"
~
7~
b
Vs
CL
1
-50 -25
0
25
50
~
~
75
±15V_
100pF
100
125
TEMPERATURE (OC)
Maximum Undislorted Output vs Frequency
en
':i
5V
....
=>
16
...."-=>
12
w
OV
OV
0
-5V
-50mV
LT1037
LT1oo7
'"~«
..'"
6
AveL= +1, Vs= ±15V
CL=l5pF
AveL= -1, Vs= ±15V
TA
«
~
o
lk
~ 25°C I
i'IIIIml
r
'\
.....
15
10k
lOOk
1M
10M
FREQUENCY (Hz)
2-63
~
~
~
z
;'!i
LTl 007 /LTl 037
APPLICATions InFoRmATion
General
The LT1007/1037 series devices may be inserted directly into OP-07, OP-27, OP-37, and 5534 sockets
with or without removal of external compensation or
nulling components. In addition, the LT1007/1037
may be fitted to 741 sockets with the removal or mod ification of external nulling components.
Offset Voltage Adjustment
The input offset voltage of the LT1007/1037 and its
drift with temperature, are permanently trimmed at
wafer testing to a low level. However, if further adjustment of Vas is necessary, the use of a 10k nulling potentiometer will not degrade drift with temperature.
Trimming to a value other than zero creates a drift of
(Vas/300) fJV 1°C, e.g., if Vas is adjusted to 300fJV, the
change in drift will be 1fJV 1°C.
amplifier unless proper care is exercised. Air currents
should be minimized, package leads should be short,
the two input leads should be close together and maintained at the same temperature.
The circuit shown to measure offset voltage is also
used as the burn-in configuration for the LT10071
1037, with the supply voltages increased to ± 20V.
5Dk·
Vo
5Dk·
.".
-15V
Vo ~1000 Vos
Test Circuli lor Offset Voltage
and OllS8t Voltage Drift with
Temperature
·RESISTORS MUST HAVE LOW
THERMOElECTRIC POTENTIAL
Unity Gain Buffer Applications (LTl 007 Only)
When Rf ~ 1000 and the input is driven with a fast,
large signal pulse (> 1V), the output waveform will
look as shown in the pulsed operation diagram.
Standard Adjustment
-15V
The adjustment range with a 10k pot is approximately
± 2.5mV. If less adjustment range is needed, the sensitivity and resolution of the nulling can be improved
by using a smaller pot in conjunction with fixed resistors. The example has an approximate null range of
± 200fJV.
+15V
Improved Sensitivity Adjustment
-15V
Offset Voltage and Drift
Thermocouple effects, caused by temperature gradients across dissimilar metals at the contacts to the input terminals, can exceed the inherent drift of the
2-64
OUTPUT
During the fast feedthrough-like portion of the output,
the input protection diodes effectively short the output
to the input and a current, limited only by the output
short circuit protection, will be drawn by the signal
generator. With R ;;;a. 5000, the output is capable of
handling the current requirements (IL ~ 20mA at 10V)
and the amplifier stays in its active mode and a
smooth transition will occur.
As with all operational amplifiers when Rf > 2kO, a
pole will be created with Rf and the amplifier's input
capacitance, creating additional phase shift and reducing the phase margin. A small capaCitor (20pF to
50pF) in parallel with Rf will eliminate this problem.
LTl 007 ILTl 037
APPLICAIlOnS InFORmATion -
nOISE
Noisa rasting
The 0.1Hz to 10Hz peak-to-peak noise of the LT10071
1037 is measured in the test circuit shown. The frequency response of this noise tester indicates that the
0.1Hz corner is defined by. only one zero. The test time
to measure 0.1Hz to 10Hz noise should not exceed 10
seconds, as this time limit acts as an additional zero to
eliminate noise contributions from the frequency band
below 0.1Hz.
Measuring the typical 60nV peak-to-peak noise performance of the LT1007/1037 requires special test
precautions:
(a) The device should be warmed up for at least five
minutes. As the op amp warms up, its offset voltage changes typically 3p,V due to its chip temperature increasing 10°C to 20°C from the
moment the power supplies are turned on. In the
10 second measurement interval these temperature-induced effects can easily exceed tens of
nanowlts.
(b) For similar reasons, the device must be
shielded from air currents to eliminate the
sibility of thermoelectric effects in excess
few nanowlts, which would invalidate
measurements.
well
posof a
the
(c) Sudden motion in the vicinity of the device can
also "feedthrough" to increase the observed
noise.
A noise-wltage density test is recommended when
measuring noise on a large number of units. A 10Hz
noise-wltage density measurement will correlate well
with a 0.1Hz to 10Hz peak-to-peak noise reading since
both results are determined by the white noise and the
location of the 11 f corner frequency.
Current noise is measured in the circuit shown and
calculated by the following formula:
i _ [e2 no - (130nV)2] 112
n1MOx100
10k
Bn.
The LT1007/1037 achieves its low noise, in part, by
operating the input stage at 120~A versus the typical
10p,A of most other op amps. Voltage noise is inversely proportional while current noise is directly proportional to the square root of the stage current. Therefore
the LT1007/1037's current noise will be relatively
high. At low frequencies, the low 1/f current noise
corner frequency (R<120Hz) minimizes current noise
to some extent.
In most practical applications, however, current noise
will not limit system performance. This is illustrated in
0.1 Hz 1010Hz pop Nolsa
Tasler Frequency Rasponsa
0.1 Hz 1010Hz Nols8 T8S1 Circuli
0.1,.1'
100
l00kll
22,.1'r-~~PE
90
-~
80
1\ \
.
~ 70
,
z
~ 60
llDk
[
50
1
40
• DEVICE UNDER TEST
NOTE: ALL CAPACITOR VALUES ARE FOR
NDN..f'OLARIZED CAPACITORS ONLY.
30
0.01
11 Ii:'
i
RIN=lMIl
L' I!
I itlll!!
1'1
I
0.1
:
1'> ill,',
1:1
11 ir '_i'~
.1
I;:!i
1.0
10
100
FREQUENCY (Hz)
2-65
LTl 007 ILTl 037
the total noise versus source resistance plot, where
total noise = [(voltage noisef + (current noise x RsY
+ (resistor noise)2]'h
Three regions can be identified as a function of source
resistance:
(i)
Rs ~ 400n. Voltage noise dominates
~ Rs ~ SOkn at 1kHZ} Resistor noise
400n ~ Rs ~ 8kn at 10Hz dominates
(iii) Rs> 50kn at 1kHZ} Current noise
Rs> 8kn at 10Hz dominates
Clearly the LT1007/1037 should not be used in region
(iii), where total system noise is at least six times high-
er than the voltage noise of the op amp, i.e., the low
voltage noise specification is completely wasted.
(ii) 400n
TYPICAL APPLICATiOnS
Gain Error vs Frequency
Closed Loop Gain = 1000
Glin 1000 Amplifier witb O.OlOfa
Accuracy, DC to 5Hz
340k
1%
15k
5%
1.0
201<
TRIM
~
~
~
ffi
e:.
a:
F
TYPICAL
PRECISION
OPAMP ./
LT1oo7/
0.1
~
OUTPUT
'/
z
~ 0.01
INPUT
LT1037
f-f-- f- GAIN ERROR
RN60C FILM RESISTORS
= CLOSED LOOP GAIN
OPEN LOOP GAIN
0.001
0.1
The high galn and wide bandwidth of the lT1037 and (LTlOO7) is useful in
low frequency high closed loop galn amplifier applications. Atypical precision
10
FREQUENCY (Hz)
~i:':'~:;r~=,~r:~~"J~:n:~~~no~.::~~=~~:;~z
only. Even instrumentation range signals can vary at a faster rate. The lT103l's
"gain precision - bandwidth product" is 200 times higher, as shown.
100
Precision Amplifier Drives 300n Load to ± lOY
340k 1%
20k 5%
10k
TRIM
Microvolt Comparator with Hysteresis
r------....-+15V
lOM[I
5%
INPUT
365[1
1%
15k
1%
>---+---DUTPUT
>''-4_'''NI..._---_-4_0UTPUT ± 10V
15[1
RL
5%
300[1
POsitive feedback to one of the nulling terminals creates approximately 51'Vof
hysteresis. Output can sink 16mA.
Input offset voltage is typically changed less than SI'V due to the feedback.
2-66
INPUT
The addition of the lT1007 doubles the amplifier's output drive to ± 33rnA.
Gain accuracy is 0.02%, slightly degraded compared to above because of
self heating of the LT1037 under load.
LT1007/LT1037
TYPICAL APPLlCAI'lonS
Tape Ha.d Amplifier
4.99k
01
.01 p.F
lOOk
.033Io1F
p'--......- -......-
OUTPUT
ALL RESISTORS METAL FILM
ALL RESISTORS METAL FILM
Infra-Rad Detector Pru.. pllfllr
100
+ l00",F
Ij
330
~.....,.,..,....-r2N2219A 1
...
CHOPPfD DETECTOR
OUTPUT
.J1.f1J1...fUL
+15V
+
---
.
IR RADIATION
3920
PHOTO-CONDUCTIVE
INFRA-RED
DETECTOR
HgCdT. TYPE
INFRA-fiED ASSOCIATES. INC.
OPTICAL
CHOPPER
3920'
13UAT nOK
•
~
1'110 METAL FILM
r------.-- +7.5V
Strell Gauge Slgnll Conditioner
with Bridge ExcltatioA
lT1009
+15V
L---+_____..J
11ll<
ZERO
TRIM
• RN60C FILM RESISTORS
The lT1007 is capable of providing excitation current directly to bias the
350u bridge at 5V. With only 5V across the bridge (as opposed to the
usuall0V) total power disslpatkln and bridge warm-up drift is reduced. The
bridge output signal is halved, but the l T1007 can amplify the reduced signal
accurately.
2-67
LTl 007 ILTl 037
SCHEmATIC DIAGRAm
20
OUTPUT
025
20
Cl - 110pF FOR LTlOO7
Cl - 12pF FOR LT1037
200
6k
200
v-
6k
PACKAGE DESCRIPTion
J8 Package
8 Lead Hermetic Dip
H Package
Metal Can
0.' l'
~
N8 Package
8 Lead Plastic
'1
0310
fi120
04Q5MAX
~
0200
0OO5~
""~
~
Xc
~
,~
0100BSC.-Lj
TYf
NOTE DM:HSK)NS IN WCHES
2-68
-.l005"'"
jL~TYp
0014
'fj'
,
,
Ir
I,
/1
II
II
II
-...r
0·_15"
--L..~1YP
0320-J
0200
NOlI. DIMENSIONS It INCtIES UNLESS OnEJIW\5E NOrm
'lEADS WlTItN 0 001 OF TFU POSITION (TP) AT GAUGE fUNE
0008
NOTE DlMENSOIS IN K:HES lK.ESS 0TJeIWISE NOTED.
"LEADSwmtM 0 001 OF lUPOSI'OON(TP)ATGAIJG(PI,JIE
~"""""-Llnlt\Q
~,
LTl007CS/LTl037CS
TECHNOLOG~~~----L-O-W-N-o-i-se-,-H-ig-h-S-p-e-e-d
Precision Operational Amplifiers
FEATURES
•
•
•
•
•
•
•
•
•
DESCRIPTion
Guaranteed 4.5nV/~z 10Hz Noise
Guaranteed 3.8nV/~z 1kHz Noise
0.1 Hz to 10Hz Noise, 60nVp-p, Typical
Guaranteed 5Million Min. Voltage Gain, RL = 2kO
Guaranteed 2Million Min. Voltage Gain, RL=6000
Guaranteed60p.V Max. Offset Voltage
Guaranteed 1.0p.V/oC Max. Drift with Temperature
Guaranteed 11V/p.Sec Min. Slew Rate (LT1037)
Guaranteed 110dB Min. CMRR
The voltage gain of the LT1007/LT1037 is an extremely high
20 million driving a 2kOIoad and 12 million driving a 6000
load to ± 10V.
APPLICATions
•
•
•
•
•
•
•
Next to the LT1028, the LT1007/LT1037 series features the
lowest noise performance available to date for monolithic
operational amplifiers: 2.5nV/~z wideband noise (less
than the noise of a 4000 resistor), 1/f corner frequency of
2Hz and 60nV peak to peak 0.1 Hz to 10Hz noise. Low noise
is combined with outstanding precision and speed speci·
fications: 20p.V offset voltage, 0.3p.V/oC drift, 126dB
common-mode and power supply rejection, and 60MHz
gain-bandwidth-product on the decompensated LT1037,
which is stable for closed loop gains of 5or greater.
Low Noise Signal Processing
Microvolt Accuracy Threshold Detection
Strain Gauge Amplifiers
Direct Coupled Audio Gain Stages
Sine Wave Generators
Tape Head Preamplifiers
Microwave Preamplifiers
In the design, processing, and testing of the device, particular attention has been paid to the optimization of the
entire distribution of several key parameters. Consequently, the specifications have been spectacularly im·
proved compared to competing amplifiers.
The sine wave generator application shown below utilizes
the low noise and low distortion characteristics of the
LT1037.
Ultra-Pure 1kHz Sine Wave Generator
O.1Hz to 10Hz Noise
43011
>-...-OUTPUT
C
#327 Lamp.
,U!,
IY'II!
m.
:" P IA,IIA
m'
loj,
~I' 11\.1
, ~I
IfI
R
1
f ~ 2"RC
R ~ 1591.5!l ±.1%
C ~ 0.1~f ±.1%
Total Harmonic Distortion ~ < .0025%
Noise ~ < .0001%
Amplitude ~ ± 8 wits
Output Frequency ~ 1.000kHz for values
given ±.4%
10
TIME (SECONDS)
2-69
...
~
LTl 007CS/LTl 037CS
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage .................................. , ± 22V
Input Voltage ................... Equal to Supply Voltage
Output Short Circuit Duration .................. Indefinite
Differential Input Current (Note 5) ............... , ± 25mA
lead Temperature (Soldering, 10 sec.) .............. 300°C
Operating Temperature Range ............... O°C to 70°C
Storage Temperature Range
All Devices ........................... - 65°C to 150°C
TOPYIEW
ORDER PART NUMBER
lT1007CS
lT1037CS
PART MARKING
LT1007CS
LT1037CS
816 PACKAGE
PlASTIC SOL
ELECTRICAL CHARACTERISTICS Vs =:t 15V, TA =25°C, unless otherwise noted
SYMBOL
Vas
~
LlTime
PARAMETER
Input Offset Voltage
Long Term Input Offset Voltage
Stability
los
18
en
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
in
Input Noise Current Density
AYOL
Input Resistance-Common·Mode
Input Voltage Range
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Vour
Maximum Output Voltage Swing
SR
Slew Rate
CMRR
PSRR
GBW
Zo
Pd
2-70
LTlOO7
LT1037
Gain·Bandwidth
LTloo7
Product
LT1037
Open Loop Output Resistance
Power Dissipation
LT1oo7
LT1037
CONDITIONS
(Note 1)
(Notes 2 and 3)
MIN
0.1 Hz to 10Hz (Note 3)
fo = 10Hz (Note 3)
fo = 1000Hz (Note 3)
fo = 10Hz (Note 3)
fo = 1000Hz (Note 3)
VCM=±l1V
Vs= ±4Vto ±18V
RL~---P-ic-o-a-m-p-ln-p-u-t-CIIIIII~-Trl-r~-~-~
Microvolt Offset
Low Noise Op Amp
I
FEATURES
DESCRIPTiOn
• Guaranteed Bias Current
25°C ..................... 100pA max.
-55°C to 125°C ............. 600pA max.
• Guaranteed Offset Voltage ......... 120~V max.
• Guaranteed Drift ............. 1.5~V 1°C max.
• Low Noise, O.1Hz to 10Hz ........... O.5~Vp-p
• Guaranteed Low Supply Current .... 600~A max.
• Guaranteed CMRR ............... 114 dB min.
• Guaranteed PSRR ............... 114 db min.
• Guaranteed Voltage Gain with 5mA
load current
The LT1008 is a universal precision operational amplifier which can be used in practically all precision applications. The LT1008 combines for the first time
picoampere bias currents (which are maintained over
the full - 55 °Cto 125 °Ctemperature range) microvolt
offset voltage (and low drift with time and temperature), low voltage and current noise, and low power
dissipation. Extremely high common-mode and power
supply rejection ratios, and the ability to deliver 5mA . . .
load current with high voltage gain round out the . . .
LT1008's superb precision specifications.
APPLICATions
The all around excellence ofthe LT1008 eliminates the
necessity of the time consuming error analysis procedure of precision system design in many applications;
the LT1008 can be stocked as the universal precision
opamp.
•
•
•
•
•
•
•
Precision instrumentation
Charge integrators
Wide dynamic range logarithmic amplifiers
Light meters
Low frequency active filters
Standard cell buffers
Thermocouple amplifiers
The LT1008 is externally compensated with a single
capacitor for additional flexibility in shaping the frequency response of the amplifier. It plugs into and upgrades all standard LM108A1308A applications. For
an internally compensated version with even lower
offset voltage but otherwise similar performance see
the LT1012.
Input Amplifier for 4Y2 Digit Voltmeter
I
Input Bias Current VI Temperature
r-----------------,
I
I
I
I
I
I
I
I
I
INPUT
100
I
50
I
I
I
..........
UNDERCANCELLED UNIT
I
--k
I-
I
I
~
lOOk
0
DVERCANCELLED UNIT ........
0:
=>
(.)
1k'"
1000v
l~Alvo~uf6 ~~~l
~ - 50
CONVERTER
..,
• RATIO MATCH ± 01'1'0
lOO1lV
10k
FN507
AllEN BRADlEY
DECADE VOLTAGE DIVIDER
This application requires low bias current and offset
vohage, low noise, and low drift with time and
temperature
.---
~
.........
" \.
-100
-150
-50
-25
\.
.......
~
0255075
TEMPERATURE (OC)
100
125
2-73
LT1008
ABSOLUTE mAXimum RATinG
PACKAGE/ORDER InFORmATIOn
Supply Voltage ....................... , ± 20V
Differential Input Current (Note 1). . . . . . . .. ± 10mA
Input Voltage. . . . . . . . . . . . . . . . . . . . . . . .. ± 20V
Output Short Circuit Duration. . . . . . . . . .. Indefinite
Operating Temperature Range
LT1008M .................. -55°C to 125°C
LT1008C ...................... O°C to 70°C
Storage Temperature Range
All Devices ................. -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
ORDER PART NO.
TOP VIEW
COMP
2
LT1008MH
LT1008CH
METAL CAN HPACKAGE
TOP VIEW
COMP1
-IN
+IN
V-
LT1008CN8
18SCOMP2
2
_
7 v+
3
+
6 OUT
4
5 NC
PLASTIC DIP N8 PACKAGE
ELECTRICAL CHARACTERISTICS VS =
SYMBOL
Vos
PARAMETER
Input Offset Voltage
CONDITIONS
Note 2
los
Long Term Input Offset Voltage
Stability
Input Offset Current
10
Input Bias Current
en
en
Input Noise Voltage
Input Noise Voltage Density
in
AVOL
Input Noise Current Density
Large Signal Voltage Gain
CMRR
PSRR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
Slew Rate
Supply Current
Note 2
Your
Is
2-74
Note 2
O.lHz to 10Hz
to = 10Hz (Note 3)
to = 1000Hz (Note 4)
to = 10Hz
Your = ± 12V. RL ;;., 10kn
Your = + 10V, RL ;;., 2kll
VCM = +13.5V
Vs = +2V to +20V
RL = 10kn
= 30pF
Note 2
~
± 15V. VeM = OV. TA = 25°C. unless olherwise noled.
MIN
mooeM
TVP
MAX
30
120
40
180
0.3
30
100
40
150
±30
±100
±40
±150
0.5
17
30
14
22
20
200
2000
120
600
114
132
114
132
+13.5 +14.0
±13
±14
0.1
0.2
380
600
lT100ec
MIN
m
30
40
MAX
120
180
0.3
30
100
40
150
±30
±100
±4O
±150
0.5
17
30
14
22
20
200
2000
120
600
114
132
114
132
±13.5 ±14.0
±13
±14
0.1
0.2
380
600
UNITS
I'V
I'V
IN/month
pA
pA
pA
pA
!,Vp-p
nVYHz
nVYHz
tA/YHz
V/mV
VlmV
dB
dB
V
V
Vll'8ec
p.A
LT1008
ELECTRICAL CHARACTERISTICS VS =
± 15V. VeM = OV. Doe.;; TA .;; 70 0 e for the lT1008e and
-55°e .;; TA .;; 125°e for the lT1008M. unless otherwise noted.
SYMBOL
Vos
PARAMETER
Input Offset Voltage
CONDITIONS
los
Average Temperature Coefficient of
Input Offset Voltage
Input Offset Current
Note 2
Note 2
18
Average Temperature CQefficient of
Input Offset Current
Input Bias Current
Note 2
/Jw..
CMRR
PSRR
VOUT
Is
Average Temperature Coefficient of
Input Bias Current
Large Signal Voltage Gain
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
Supply Current
VOUT ~ ± 12V, Rl ;;. 10k!!
VCM ~ ±13.5V
Vs ~ ±2.5Vto ±20V
Rl
~
10k!!
••
•
••
••
•
•
•
•
•
•
•
•
MIN
LT1008M
MAX
TYP
50
250
60
320
LT1008C
TYP
40
50
MAX
1BO
250
UNITS
p.V
p.V
1.5
250
350
0.2
40
50
1.5
1BO
250
p.V/'C
0.4
2.5
±80
±600
±150 ±800
0.4
±40
±50
2.5
±1BO
±250
pAl'C
pA
pA
2.5
pAl'C
V/mV
dB
dB
V
V
p.A
0.2
60
BO
0.6
100
1000
10B
128
108
126
±13.5
±13
±14
400
6.0
BOO
MIN
0.4
150
1500
110
130
110
12B
±13.5
±13
±14
400
BOO
pA
pA
The. denotes the specifications which apply over the full operating temperature range.
Nola 1: Differential input voltages greater than 1V will cause excessive current to flow through the input protection diodes unless current limiting
resistors are used.
Nola 2: These specifications apply for ± 2V ",;;; Vs"';;; ± 20V (± 2.5V ",;;; Vs"';;; ± 20V over the temperature range) and -13.5V ",;;; VCM ",;;; 13.5V (for
Vs = ±15V).
Nota 3: 10Hz noise voltage density is sample tested on every lot. Devices 100% tested at 10Hz are available on request.
Nola 4: This parameter is tested on a sample basis only.
FREQUEnCY comPEnSATion CIRCUITS
Standard Compensation Circuit
R1
Alternate" Frequency Compensation
R2
R1
-VIN-'I,,,,,","_--~'M-----,
R2
VOUT
VOUT
R3
+V'N
+V'N --'>NY---=-!
R1 Co
C,;e: R1 + R2
c,"
• • BANDWIDTH AND SLEW RATE ARE
PROPORTIONAL TO HC,
Co ~ 30 pF
• IMPROVES REJECTION OF POWER
SUPPLY NOISE BY A FACTOR OF 5 .
•• BANDWIDTH AND SLEW RATE ARE
PROPORTIONAL TO 1/Cs
FOR
~ >
200 NO EXTERNAL FREQUENCY COMPENSATION IS NECESSARY
2-75
LT1008
TYPICAL PERFORmAnCE CHARACTERISTICS
G
~100
Offset Voltl,' Drift VI Sourc. ReslatlDca
(Bllincad or Ulbllancld)
10.0
:;
!!)
~
t
./
i
/
/
1.0 MAXIMUM
i5
§!
o
TYPICAL
1
O'lk
MAXIMUM ............
0.01
lk
100M
~
r--
~
r
~ -4
:f -6
~~M~~~~~(Jl-
'-'
-8
-10
4
60
2
i5
Iii
~ -20
-40
3
'"
~~
-j§
12
9
,...
-ssoC
25°
125°(
15
if
U
I-
!5!;g
ili
i
-3
-6
-9
Ii5 -12
300
2-76
o
-15
±SV
±10V
±lSV
SUPPLY WLTAGE
±2OV
2SoC
r-
25°C
......
o
ssoC
1
2
-
0
25 50 75
TEMPERATURE(OC)
Output S~ort Circuli Curranl vs Tilia
!
ssoC
i'-.... -I-- .....r"""
r--..... r-
-50 -2S
15
10
15
- --
-60
TIME (MONTHS)
25°C
125°C
:~
§!
r--
Supply Current va SIPPIy Voltaga
5
+
Offalt Voillga Drift with Temperatura
01 Faur Represanlltlve Unlls
20
tll
--
0
B
COMMON-MODE INPUT VOLTAGE
~
o
TIME AFTER POWER ON (MINUTES)
500
-15 -10 ,-5
40
4
~
VCM
-60
100M
6
~i!; -2 "'-....
METAL CAN (H) PACKAGE-
3
10k
lOOk
1M
10M
SOURCE RESISTANCE (OHMS)
Long Terll Stability of fair
Raprasenlltlve Units
~ 2
Iii 0
2
/
-40
"'
V. = 1±15V_
T. = 25°C
1
RIOeMl = 2 Xl l0 121l
DEVICE WITH NEGATIVE INPUT CURRENT
I
f--
10
V
I
-r-
LITYPICALI
10k
lOOk
1M
10M
SOURCE RESISTANCE (OHMS)
1/
I
D~ICE WlJH POSITIVE INPUT CU RENT
VI
0.1
i
tll
i
V.- ±lSV
T. = 2SOC
40
/
T. - 2SOC
~ 1.0
60
laput Bias Carrot Over
CaliMon M.~I Rlngl
~
~
~
~
L
10
,---- v. = ±15V
~
/
!<
Offill Valta.. vs SOlrca Realsilin
(Ballaead or UI.lllnnd)
3
TIME FROM OUTPUT SHORT (MINUTES)
r-100
125
LT1008
TYPICAL PERFORmAnCE CHARAaERlsncs
0.1 Hz 10 10Hz Noise
Noise Speclrum
1000
TA=25°C
Vs±2V to ± 20V
Z
10.0
TA-25°C
Vs±2 to ±20V
~ r---t---+---+---+---~
TA 25'C
Vs = +2VIo +20V
II
~
~ f---+-.-+---f-,---+----.-1
~
[
~R
CURRENT NOISE
~II
'§111
cb~~~~
~ 2.5Hz
w
II IIIII
1
10
1
1
il Ili
1
Z
100
1000
401\.
~~
~ ~ Cs = 10pF
100
Cs = 100pF
30
~ ~ c, - 3pF
~\
~
-20
0.01 0.1
10M
1
_10L-~~WL~~~L-~llllill200
Valta.e Glln vs Load ReslslaDce
i--~
w
'"!:i
g
~
1M
......
25'C
125'C
120
I I
ILL!
1
s - ±15V
Vo = ±10V
2
5
10
LOAD RESISTANCE (kll)
I
100
!
40
;
.L
300k
lOOk
~
55'C
20
Cs = l00pF
1
160i
160
0.01
0.1
1
FREQUENCY (MHz)
10
Po_WlTr-=S-iup,-,-p~Iy,Re~I',cl...:..IO_lIrvs_FTr•....!qc..,uency
140 r
~1~~~~~4--+--+--+~
~
i 60~~~~~~.-+--+~
~
~
~
I
Vs - ±15V
TA = 25'C
10
1\ \
!if
140 iii
I!!
~100~~~~4.-+--+--+~
' .......
o
3Op!
iii
~1=30PF
60
60
20
120
I\~
I \c, -
-10L-~~~~--~~~Ullill200
10
Common Mode ReJection vs Freqlncy
140
~
0.1
1
FREQUENCY (MHz)
52
i
'r-.
100
TA = 25'C PHASE MARGIN~:\
Vs = ± 15~ ~I~~I - 3Op!
~
0.01
10'
II
IM'~'III'
11111"\.f, = 3p!
"\
GAIN\
GAIN
c, = 3pf
C, = 3Op1
flo
10 100 lk 10k lOOk 1M 10M
FREQUENCY (Hz)
3M
I "'
iii 20
f,= 3Op! ~ ~
20
,
~
Gain. Phase Shift vs Freq ••ncy
with Siandard (Feedback) Compensation
100
GAl
Cs = IOpI
40
ATlkHZ~
BI
Gain. Phase Sblft vs Freque.cy
wltb Alternale Compensation
Volta.e Gain vs Frequency
"
AT 10Hz
AT 10Hz
AT 1kHz ~ESISTOR NOISE ONLY
--r
0.010'
10' 10' 10' 10'
10'
SOURCE RESISTANCE (OHMS)
FREQUENCY (Hz)
140
120
10
I"
r-~
R Rs=2R
VOLTAGE NOISE
III CORNER
4
6
TIME (SECONDS)
Tolal Noisl vs Source Reslslanc.
100
lk
10k
FREQUENCY (Hz)
lOOk
1M
2-77
~
LT1008
Slew Rate vs Compensation Capacitance
10
Large Signll Transienl Responsa
Large Slgnll Transient Response
,\
Vs
TA
~
~
±15V
25'C
Cs
:,
0.1
Av
~
+ 1, Cs ~ 100pF,20l'seclDlV
Small Signal Transient Responsa
Av
~
+l,Cs ~ 100pF,CloAo
~
100pF,5)'SeC/DIV
o
-.
~
.....
~
20
40
60
80
COMPENSATION CAPACITOR (pF)
100
Av
Small Signal Transient Response
Av
~
+l,Cs
~
l00pF,CLOAO
~
600pF,5I'secIDIV
~
+ 1, C, ~ 30pF, 20l'secIDIV
Small Signal Transient Response
Av
~
+ 1, Ct ~ 30pF, ClOAO
~
100pF,51'sec1D1V
APPLICATions InFoRmATion
Achieving Plcoampere/Microvol1 Performance
In order to realize the picoampere - microvolt level
accuracy of the LT1008, proper care must be exercised. For example, leakage currents in circuitryexternal to the op amp can significantly degrade
performance. High quality insulation should be used
(e.g. Teflon, Kel-F); cleaning of all insulating surfaces
to remove fluxes and other residues will probably be
required. Surface coating may be necessary to provide a moisture barrier in high humidity environments.
Board leakage can be minimized by enCircling the input circuitry with a guard ring operated at a potential
close to that of the inputs: in inverting configurations
the guard ring should be tied to ground, in non-invert-
2-78
ing connections to the inverting input at pin 2. Guarding both sides of the printed circuit board is required.
Bulk leakage reduction depends on the guard ring
width. Nanoampere level leakage into the compensation terminals can affect offset voltage and drift with
temperature.
COMPENSATION
LT1008
APPLICATions InFORmATion
Microvolt level error voltages can also be generated in
the external circuitry. Thermocouple effects caused by
temperature gradients across dissimilar metals at the
contacts to the input terminals can exceed the inherent drift of the amplifier. Air currents over device leads
should be minimized, package leads should be short,
and the two input leads should be as close together as
possible and maintained at the same temperature.
The LT1 008 is specified over a wide range of powersupply voltages from :f::. 2V to :f::.18V. Operation with
lower supplies is possible down to :f::.1.OV (two Ni-Cadbatteries) .
Test Circuit lor Offset Voltage and its Drift with Temperature
Rl
'50k
+15V
R2
1001l
:>=------"*-- Va
• RESISTORS MUST HAVE LOW
THERMOELECTRIC POTENTIAL
R3
50k
-15V
Va = 1000 Vas
•• THIS CIRCUIT IS ALSO USED AS THE BURN-IN
CONFIGURATION FOR THE LT100B, WITH SUPPLY
VOLTAGES INCREASED TO :20V, Rl =R3 =20k
R2=2001l, Av=100.
Noise Testing
The 0.1Hzto 10Hz peak-to-peak noise ofthe LT1008 is
measured in the test circuit shown. The frequency response of this noise tester indicates that the 0.1Hz
corner is defined by only one zero. The test time to
measure 0.1Hz to 10Hz noise should not exceed 10
seconds, as this time limit acts as an additional zero to
eliminate noise contributions from the frequency band
below 0.1Hz.
O.1Hz to 10Hz Noise Test Circuit
A noise-voltage density test is recommended when
measuring noise on a large number of units. A 10Hz
noise-voltage density measurement wiUcorrelate well
with a 0.1Hz to 10Hz peak-to-peak noise reading since
both results are determined by the white noise and the
location of the 1/f corner frequency.
Current noise is measured in the circuit shown and
calculated by the following formula where the noise of
the source resistors is subtracted.
.
In =
[e2no - (820nV)2]'12
40Mo X 100
10k
1001l
• LTl008 DEVICE UNDER TEST
NOTE: ALL CAPACITOR VALUES ARE FOR
NON-POLARIZED CAPACITORS ONLY.
• METAL
FILM
2-79
LT1008
APPLICATions InFoRmATion
Frequency Compensation
The LT1008 is externally frequency compensated with
a single capacitor. The two standard compensation
circuits shown on page 3 are identical to the LM108AI
308A frequency compensation schemes. Therefore,
the LT1008 operational amplifiers can be inserted directly into LM108A1308A sockets, with similar AC
and upgraded DC performance.
External frequency compensation provides the user
with additional flexibility in shaping the frequency response of the amplifier. For example, for a voltage gain
of ten, and Cf = 3pF, a gain bandwidth product of
5MHz and slew rate of 1.2VI ~sec can be realized. For
closed loop gains in excess of 200, no external compensation is necessary, and slew rate increases to
4V I ~sec. The LT1008 can also be overcompensated
(Le. Cf > 30pF or Cs > 100pF) to improve capacitive
load handling capability or to narrow noise bandInverter Feedforward Compensation
width. In many applications, the feedback loop around
the amplifier has gain (e.g. logarithmic amplifiers);
overcompensation can stabilize these circuits with a
single capacitor.
The availability of the compensation terminals permits
the use of feedforward frequency compensation to enhance slew rate in low closed loop gain configurations.
The inverter slew rate is increased to 1.4V I ~sec. The
voltage follower feedforward scheme bypasses the
amplifier'S gain stages and slews at nearly 10VI ~sec.
The inputs of the LT1008 are protected with back-toback diodes. Current limiting resistors are not used,
because the leakage of these resistors would prevent
the realization of picoampere level bias currents at elevated temperatures. In the voltage follower configuration, when the input is driven by a fast, large signal
pulse (> 1V), the input protection diodes effectively
short the output to the input during slewing, and a current, limited only by the output short circuit protection
will flow through the diodes.
The use of a feedback resistor, as shown in the voltage
follower, feedforward diagram, is recommended because this resistor keeps the current below the short
circuit limit, resulting in faster recovery and settling of
the output.
C2
5 pF
INPUT' -'\I1IV-'~-OUTPUT
OUTPUT
VOUT = 10V/,.A
1oo0pF
Approximate error due to nOise, bias current, common-mode rejection,
voltage gain ofthe amplifier is 1/5 of a least Significant bit.
2-81
LT1008
Extended Range Charge Pump Voltage to Frequency Conv'!rter
+15V
-15V
22M
OPTIONAL
.01Hz TRIM
+15V
1.8k
l000pF (POLYSTYRENE)
VOLTAGE
INPUT
0-10V"-'IIotN-'""NV-+--
lOOk
ALL DIODES
lN4148
L---~--!::.!...-----ll----------+--- O.OIHz to 10kHz
>1% METAL FILM RESISTOR
5pF
FREQUENCY
OUTPUT
The LT1008 integrator extends low frequency range. Total
dynamic range is 0.01Hz to 10kHz (or 120dB) with 0.01% linearity.
Precision, Fast Settling, Low Pass Filter
10k
2k
INPUT--~NV-"""''''''
lk
This circuit is useful where fast signal acquisition and
high precision are required, as in electronic scales.
The filter's time constant is set by the 2KO resistor
and the 11lF capacitor until comparator #1 switches.
The time constant is then set by the 1.5MO resistor
and the 11lF capacitor. Comparator #2 provides a
quick reset.
> OPTO·MOS SWITCH
TYPEOFM1A
THETA.J CORP.
2-82
The circuit settles to a final value three times as fast as
a simple 1.5MO - 11lF filter, with almost no DC error.
LT1008
Fast Precision Inverters
INPUT
10k"
10k"
10k
10pF
lN4148
10k"
+15V
300pF
+15V
INPUT
-15V
10k
lN4148 (4)
-15V
30pF
"1% METAL FILM
FULL POWER BANDWIDTH - 2MHz
SLEW RATE - 50V I psec
SEffilNG (10V STEP) - 12pS TO 0.01%
BIAS CURRENT DC - 30pA
OFFSET DRIFT - 0.3pV 1°C
OFFSET VOLTAGE - 30pV
10k
10k
30pF
SLEW RATE @ 100V I pS
SETILING - 5pS TO .01%/10 VOLT STEP
OFFSET VOLTAGE - 30pV
BIAS CURRENT - 30pA
"1% METAL FILM
Ammeter With Six Decade Range
10k
r - - t - -.....---,----"""- + 15V
Rl
2k
10k
LT l004C-l.2
CURRENT INPUT
01.02.03,04, RCA CA3146 TRANSISTOR ARRAY.
CALIBRATION: ADJUST Rl FOR FULL SCALE
DEFLECTION WITH lpA INPUT CURRENT.
Ammeter measures currents from 100pA to 100JLA
without the use of expensive high value resistors. Accuracy at 100JLA is limited by the offset voltage between 01 and 02 and, at 100pA, by the inverting bias
current of the LT1008.
54911
2-83
LT1008
SCHEmATIC DIAGRAm
PACKAGE DESCRIPTion
HPackage
Metal Can
0
J8 Package
8 Lead Hermetic Dip
_,
o405 IoIAX
5]
0220
4~
l
'os''''''
0OO5Mt.1
~---+I
--r
'05'
~
JL "23
Oli14 TYP
NO'TfatJiENSKlrl>J4NHSLN.£SSOTlEflWlSENOTED
'I..EADS'M'MNOOO7OFllUPClSITKlN(TP)ATGAOOEPlANE
2-84
N8 Package
8 Lead Plastic
Oi"~0370
~
003iiTYP
0155
i-
~
0125 0020
~
OIOO!ISC'
TYP
o005 loIN
A
,7"'5"
~
~
OTiS
-----L
JL~TYP
0014
.. '
.,
,
,,
,1
It
~lOO_\5. L~T\1'
I--!!..!!Q -.:,:r- 0008
0290
NOTE DtENSIONSlNlNCHEStKfSSOTI£RWISENOTED
'LEAOSWlTMNOOO70FTAUEF?SIT1ON{TP)AlGAlXlEPUM.
L7YD~~--F-a-st-±-1-5-0-m-A-p-o-w-e-rL-~-1~_:_~
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
The LT1010 is a fast, unity-gain buffer that. can increase
the output capability of existing IC op amps by more than
an order of magnitude. This easy-to-use part makes fast
amplifiers less sensitive to capacitive loading, reduces
thermal feedback in precision dc amplifiers and is recommended for awide range of fast and slow applications.
20MHz Bandwidth
75V/p.s Slew Rate
Drives ± 10V into 750
5mA Quiescent Current
Drives Capacitive Loads> 1p.F
Current and Thermal Limit
Operates from Single Supply ~4.5V
Very Low Distortion Operation
Designed to be incorporated within the feedback loop, the
buffer can isolate almost any reactive load. Internal
operating currents are essentially unaffected by supply or
output voltage, accounting for the 4.5V to 40V supply voltage range with unchanged specifications. Single-supply
operation is also practical.
APPLICATions
•
•
•
•
•
•
•
•
Boost Op Amp Output
Isolate Capacitive Loads
Drive Long Cables
Audio Amplifiers
Video Amplifiers
Power Small Motors
Operational Power Supply
FETDriver
This monolithic IC is supplied in an a-pin miniDIP and three
standard power packages: the solid kovar base TO-5
(TO-39), the steel TO-3 and the plastic TO-220. The low thermal resistance power packages are an aid in reducing
operating junction temperatures. With the TO-3, TO-220,
and miniDIP packages, an option is available to raise
quiescent current and improve speed. The mini DIP version
is supplied for those applications not requiring high power
dissipation or where board space is apremium.
In the TO-39 package, the LT1010 can sometimes replace
the hybrid LHOOO2. With the exception of speed it exceeds
key specifications and fault protection is vastly superior.
Further, the lower thermal resistance package and higher
maximum operating temperature of the new monolithic
circuit allow more usable output.
Very Low Distortion Buffered Pre-Amplifier
o' vou,,;'jffi,p-p
RL =4000
R1
03
R8
"
100n
OUTPUT
R2
C1
1M
22pF
0.1
R3
'="
02
1k
00
RSET=
NOTE l' All R's 1% METAL FILM
33.2!I
NOTE 2: SUPPLIES WELL BYPASSED AND LOW Zo
1%
10
100
1000
10000
100000
FREQUENCY
-~~--+------'
2-85
LT1010
ABSOLUTE mAXimum RATinGS
Total Supply Voltage .............................. ± 22V
Continuous Output Current ......••....•••..... ± 150mA
Continuous Power Dissipation (Note 1)
LT1010MK .....................................•5.0W
LT1010CK .................................••.. .4.0W
LT1010CT ..................•...••.•............ .4.0W
LT1010MH .......•.............................. 3.1W
LT1010CH •....................•.......•........ 2.5W
LT1010CN8 .......... ; .................•...••..0.75W
Input Current (Note 2) ...•................... : ... ± 40mA
Operating Junction Temperature
LT1010M ..•...•.•....•.......•....... - 55°C to 150°C
LT1010C .................•...•...........0oC to 125°C
Storage Temperature ................••.. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) •.•.••.•.•....300 oC
PRECOnDITiOninG
100% Thermal Limit Burn in
PACKAGE/ORDER InFORmATiOn
ORDER PART
NUMBER
BOTTOM VIEW
INPUT~)V+
(
o
,:: 0
V- (CASE)
4,-, ~!.3
oUTPUT~'
53
IfB
./
~ 30
l - I--
e.
.
/'
fE
if 10
VIN= 100mVpp
Cl =1OOpF
Av= -3dB
TI=25'C
10
o
o
~SO
w
~
~
<.>
0
10
10
FREQUENCY (MHz)
20
J
5
Cl -1OOpF
Rs-500
RBIAS= 20!l
Tj=25'C
I
5
10
FREQUENCY (MHz)
2
20
Capacitive Loading
Output Impedance
10 Rs=SOll
IBlAS=O
T)=25'Ctttltl-+I-H+ttllhk++HttII
IBIAS 0
TI-25'C
Rl =100II
T1=25'C
/"
5
2
40
100
100
~
1/
5
10
20
30
QUIESCENT CURRENT (mA)
/
m
Cl-1OOpF
RS = 500
IBIAS=O
Tj=25'C
/
V200Il
Rl = SOil
S
200Il
/
Small·Step Response
150
VV /
m
VI
20
~
I
Rl=SOIl/,
/ /
II
;
V
20
S
V"
20
SO
V
/1'
;/
-"Mf1
0M
~
~-50
1/.1
-100
-1SO
o
10
20
30
L-.L.LLLIJIIIILJJL...J
1\L..LLL.JJlliLI\--L-L.Ll.WU
1.0
0.1
1.0
10
FREQUENCY (MHz)
TIME (ns)
Slew Response
400
:\ / '
\/
~SITIVE
R[=Jll
./
I'" ~ -
// "
/
100
-20
-SO
2-88
50
100
150
TIME (ns)
200
250
/
/
/
SOD
Jo-""
./
,/'"
Y
RBIAS=200
-15
o
o
100
Vs= ±15V
VIN= ±10V
Il=O
Tc=25'C
r:l
;:p-
/ ,/
NEGATIVE
1.0
10
FREQUENCY (MHz)
Supply Current
80
VS=±15V
O",VIN'" -10V
~
V
_ 20
0.1
Negative Slew Rate
20
Vs-±15V
15 Rl =100II
Tj=25'C
r",1MHz
10
100
10
20
30
QUIESCENT CURRENT (rnA)
/
40
o
f-- V"
o
2
3
FREQUENCY (MHz)
/
LT1010
TYPICAL PERFORmAnCE CHARACTERISTICS
Input Bias Current
Output Offset Voltage
200
150
V+=38V
V-=- 2VL
~
~100
~
o
50
,/
",
"
o
,/
V
V
~
150
V+ =38V
~
V
~
Vr'
V-=-~
tOO
~
'"
50
o
50
100
TEMPERATURE (OC)
150
-~
t-- r-
-50
~
g;;
100
1""-
""
--....
::>
'-'
~
'"
V+=2V
V-= -38V
-50
r- . . . . .
o
50
100
TEMPERATURE 1°C)
50
o
150
-150
lOUT'" 150mA
I--
I
r-
l -I--
~
~
<5
z
-50
I\.
o
50
100
TEMPERATURE (OC)
150
----
IL=-15Om~
~
IjRI~ I
o
10
o
-50
......- V
V
~55ob
-I
25°C
/
./
V
I
125 0
3
50
100
TEMPERATURE (OC)
10k
1
T)=
/'
150
II
Supply Current
-5OmA
-
50r
100
1k
FREQUENCY (Hz)
1-5mA
50
100
TEMPERATURE (OC)
Rs=1k!l
VIN=O
10ur=0
IBIAS =0
50mA
o
,
50
Negative Saturation Voltage
I-
150
\
~100
w
~
I-"""
I-
150
~
vl=-i
Voltage Gain
0.999
... V
'-'
. / ,/r'
. / "V+=2V v
-50
1.00
VS=z15V
RL = 7511
VIN=O
VIN=O
!
Input Bias Current
200
200
150
o
VI-"
6
1
I
10
20
30
TOTAL SUPPLY VOLTAGE (V)
40
2-89
LT1010
TYPICAL PERFORmAnCE CHARACTERISTICS
Bias Terminal Voltage
Total Harmonic Distortion
1.0
~ 0.9
~
~
VSI=~Jov-
:::::-..
-
~ 0.3
'--
~
-",,:::r--...
"""
I=~
C5 0.6
0.5
-50
r--
~
~
~ 0.2
~
.150
0.1
o
2-90
100
o
II
"
"- I"
i'-..
:'-..
"""--
15
o
TO-3, TO-220
r-.....
f'..
........
..........
~
i-0.1
III
1
..... ~INK
SOJ;;cr-- ......
m--
1k
Vs=±15V
Vour=O
r-......
9
I
10
100
FREQUENCY (kHz)
1
Peak Output Current
~ I--
10
1bdll
I
Ii
0.5
IIt
-5
0
5
INPUT VOLTAGE (V)
0.2
0.4
I
-10
'"~
TC=85°C
-25
-50
-15
RL =500
~
/
1.0
10
OUTPUT VOLTAGE (Vpp)
0.1
./
f
I
~ 0.4
RSIAS=500
Peak Power Capability
I
J
~
ISIAS=O
/
10
I
I
1/
u
o
r-....
VS=±15V
VOUT=O
T,=25°C
I
-
Z
~
ISIAS=O
Vs=±15V
VOUT= ± 10V
Tc=25°C
o
u
:-....
50
100
TEMPERATURE (OC)
o
Shorted Input Characteristics
50
~ 0.6
z
z
~ :--... ::::--.RSIAS = 10001-
1i!! 0.7
Total Harmonic Distortion
0.8
RL=501l
f=10 kHz
Vs=±15V
TC=25°C
-I
~ 0.8
~
0.4
10
PULSE WIOTH (ms)
100
o
-50
50
100
TEMPERATURE (OC)
150
LT1010
APPLICATions InFoRmATion
General
Equivalent Circuit
These notes briefly describe the LT1010 and how it is used;
adetailed explanation is given elsewhere". Emphasis here
will be on practical suggestions that have resulted from
working extensively with the part over a wide range of
conditions. A number of applications are also outlined
that demonstrate the usefulness of the buffer beyond that
of driving aheavy load.
Below 1MHz, the LT1010 is quite accurately represented
by the equivalent circuit shown here for both small and
large signal operation. The internal element, A1, is an idealized buffer with the unloaded gain specified for the
LT1010. Otherwise, it has zero offset voltage, bias current
and output resistance. Its output also saturates to the internal supply terminals t.
Design Concept
V+
The schematic below describes the basic elements of the
buffer design. The op amp drives the output sink
transistor, 03, such that the collector current of the output
follower, 02, never drops below the quiescent value
(determined by 11 and the area ratio of 01 and 02). As are·
suit, the high frequency response is essentially that of a
simple follower even when 03 is supplying the load current. The internal feedback loop is isolated from the effects of capacitive loading by asmall resistor in the output
lead.
tJR~sts
lB
Vas
INPUT
+
RoUT
>-""""'- OUTPUT
A1
R'
R' =RSAT-RaUT
T Vsos
V-
, - - - - - . . . - -.....-v+
Loaded voltage gain can be determined from the unloaded
gain, Av, the output resistance, ROUT, and the load resistance, RL, using:
INPUT
~.,.,.,..-+--OUTPUT
'-----o+---+--v-
The scheme is not perfect in that the rate of rise of sink
current is noticeably less than for source current. This can
be mitigated by connecting a resistor between the bias
terminal and V+, raising quiescent current. A feature of
the final design is that the output resistance is largely
independent of the follower quiescent current or the output load current. The output will also swing to the negative rail, which is particularly useful with single-supply
operation.
*R. J. Widlar, "Unique IC Buffer Enhances Op Amp Designs; Tames Fast
Amplifiers," Linear Technology Corp. TP-1, April, 1984.
AVL - AvRL
- ROUT+RL
Maximum positive output swing is given by:
VOUT + = (V+ - Vsos+) RL
RSAT+ RL
The input swing required for this output is:
VIN+ =VOUT+ (1 +
R~~T) -Vos+aVos,
where aVos is the 100mV clipping specified for the saturation measurements. Negative output swing and input drive
requirements are similarly determined.
t See electrical characteristics section for guaranteed limits.
2-91
LT1010
APPLICATions InFoRmATion
Supply Bypass
The buffer is no more sensitive to supply bypassing than
slower op amps, as far as stability is concerned. The O.1/LF
disc ceramic capacitors usually recommended for op
amps are certainly adequate for low frequency work. As al·
ways, keeping the capacitor leads short and using a
ground plane is prudent, especially when operating at
high frequencies.
The buffer slew rate can be reduced by inadequate supply
bypass. With output current changes much above 100mAi
j.lS, using 10j.lF solid tantalum capacitors on both supplies
is good practice, although bypassing from the positive to
the negative supply may suffice.
When used in conjunction with an op amp and heavily
loaded (resistive or capacitive), the buffer can couple into
supply leads common to the op amp causing stability
problems with the overall loop and extended settling time.
Adequate bypassing can usually be provided by 10/LF solid
tantalum capacitors. Alternately, smaller capacitors could
be used with decoupling resistors. Sometimes the op amp
has much better high frequency rejection on one supply,
so bypass requirements are less on this supply.
times average with reactive loads. It is particularly im·
portant to determine dissipation when driving large load
capacitance.
With ac loading, power is divided between the two output
transistors. This reduces the effective thermal resistance,
junction to case, to 30°C/W for the TO·39 package and
WCIW for the TO-3 and TO·220 packages, as long as the
peak rating of neither output transistor is exceeded. The
typical curves indicate the peak dissipation capabilities of
one output transistor.
Overload Protection
The LT1010 has both instantaneous current limit and ther·
mal overload protection. Foldback current limiting has not
been used, enabling the buffer to drive complex loads
without limiting. Because of this, it is capable of power
dissipation in excess of its continuous ratings.
Normally, thermal overload protection will limit dissipa·
tion and prevent damage. However, with more than 30V
across the conducting output transistor, thermal limiting
is not quick enough to insure protection in current limit.
The thermal protection is effective with 40V across the
conducting output transistor as long as the load current is
otherwise limited to 150mA.
Power Dissipation
Drive Impedance
In many applications, the LT1010 will require heat sinking.
Thermal resistance, junction to still air is 150°C/W for the
TO·39 package, 1000 CIW for the TO·220 package, 60 0 CIW
for the TO·3 package, and 130oC/W for the miniDIP pack·
age. Circulating air, a heat sink, or mounting the package
to aprinted circuit board will reduce thermal resistance.
When driving capacitive loads, the LT1010 likes to be driven
from a low source impedance at high frequencies. Certain
low power op amps (e.g., the LM10) are marginal in this reo
spect. Some care may be required to avoid oscillations,
especially at low temperatures.
In dc circuits, buffer dissipation is easily computed. In ac
circuits, signal waveshape and the ,nature of the load
determine dissipation. Peak dissipation can be several
Bypassing the buffer input with more than 200pF will solve
the problem. Raising the operating current also works, but
this cannot be done with the TO·39 package.
2-92
LT1010
APPLICATions InFoRmATion
Parallel Operation
Output load current will be divided based on the output
resistance of the individual buffers. Therefore, the available output current will not quite be doubled unless output
resistances are matched. As for offset voltage, the 25°C
limits should be used for worst case calculations.
V+
>--+--"'-VOUT
~ 6.IOUT
V-
Parallel operation provides reduced output impedance,
more drive capability and increased frequency response
under load. Any number of buffers can be directly paral·
leled as long as the increased dissipation in individual
units caused by mismatches of output resistance and offset voltage is taken into account.
When the inputs and outputs of two buffers are connected
together, acurrent, alOUT, flows between the outputs:
VOS1- VOS2
aIOUT=
,
ROUT1 +ROUT2
where Vos and ROUT are the offset voltage and output resistance of the respective buffers.
Normally, the negative supply current of one unit will increase and the other decrease, with the positive supply
current staying the same. The worst case (VIN-V+)
increase in standby dissipation can be assumed to be
alOUT VT, where VT is the total supply voltage.
Offset voltage is specified worst case over a range of supply voltages, input voltage and temperature. It would be
unrealistic to use these worst case numbers above because paralleled units are operating under identical conditions. The offset voltage specified for Vs = ± 15V, VIN =0
and TA = 25°C will suffice for aworst case condition.
Parallel operation is not thermally unstable. Should one
unit get hotter than its mates, its share of the output and
its standby dissipation will decrease.
As apractical matter, parallel connection needs only some
increased attention to heat sinking. In some applications,
afew ohms equalization resistance in each output may be
wise. Only the most demanding applications should require matching, and then just of output resistance at
25°C.
Isolating Capacitive Loads
Rf
20k
VOUT
The inverting amplifier above shows the recommended
method of isolating capacitve loads. Non-inverting amplifiers are handled similarly.
At lower frequencies, the buffer is within the feedback
loop so that its offset voltage and gain errors are negligible. At higher frequencies, feedback is through C" so that
phase shift from the load capacitance acting against the
buffer output resistance does not cause loop instability.
Stability depends upon the R,C, time constant, or the
closed loop bandwidth. With an 80kHz bandwidth, ringing
is negligible for CL = O.068fLF and damps rapidly for
CL = O.33fLF. The pulse response is shown in the graph.
2-93
Ell
LT1010
APPLICATions InFoRmATion
Pulse Response
IIN-t-----t
tL ;01068)
t-----,
Rf
20k
\\
VOUT
I~
I
0.33~F
1\
\
-5
50
w
100
TIME (,.s)
150
200
Small signal bandwidth is reduced by CI, but considerable
isolation can be obtained without reducing it below the
power bandwidth. Often, a bandwidth reduction is desirable to filter high frequency noise or unwanted signals.
Rf
2k
VOUT
If the integrating capaCitor must be driven from the buffer
output, the circuit above can be used to provide capacitive
load isolation. As before, the stability with large capaCitive loads is determined by RICI.
Wideband Amplifiers
This simple circuit provides an adjustable gain video amplifier which will drive 1Vp-p into 750. The differential pair
provides gain, with the LT1010 serving as an output stage.
Feedback is arranged in the conventional manner, although the 68JLF - 0.01 combination limits dc gain to unity
for all gain settings. For applications sensitive to NTSC requirements, dropping the 250 output stage bias value will
aid performance.
+15V
The follower configuration is unique in that capacitive
load isolation is obtained without a reduction in small
signal bandwidth, although the output impedance of the
buffer comes into play at high frequencies. The precision
unity-gain buffer above has a 10MHz bandwidth without
capacitive loading, yet it is stable for all load capacitance
to over 0.3JLF, again determined by RICI.
8.2k
22~F
,'1---1"""
This is agood example of how fast op amps can be made
quite easy to use by employing an output buffer.
Integrator
A low pass amplifier can be formed just by using large CI
in the inverter described earlier, as long as the increasing
closed loop output impedance above the cutoff frequency
is not a problem and the op amp is capable of supplying
the required current at the summing junction.
2-94
250
TYPICAL SPECIFICATIONS
1vp-p INTO 75[1
ATA;2
'hd8 TO 10MHz
3d8 DOWN AT 16MHz
ATA;10
'hdB TO 4MHz
-3dB;8MHz
OUTPUT (750)
9000
INPUT
01
02
2N3866
(2)
1k
GAIN SET
+
5.1k
-15V
'----I-t.". 66~F
LT1010
APPLICATions InFoRmATion
capacitors only reducing bandwidth. Buffer offset, reo
ferred to the op amp input, is divided by the gain. If the
load resistance is known, gain error is determined by the
output resistance tolerance. Distortion is low.
R2
800
VOUT
R3
Rl
800
100
R4
39
This shows the buffer being used with a wideband ampli·
fier that is not unity·gain stable. In this case, C1 cannot be
used to isolate large capacitive loads. Instead, it has an
optimum value for alimited range of load capacitances.
The buffer can cause stability problems in circuits like
this. With the TO·3 and TO·220 packages, behavior can be
improved by raising the quiescent current with a200 resis·
tor from the bias terminal to V+. Alternately, devices in the
TO·39 package or miniDIP can be operated in parallel.
It is possible to improve capacitive load stability by
operating the buffer class·A at high frequencies. This is
done by using quiescent current boost and bypassing the
bias terminal to V- with more than 0.02/LF.
R2
1.6k
OUTPUT
INPUT
Rl
400
Putting the buffer outside the feedback loop as shown
here will give capacitive load isolation, with large output
> -.........>/V'v--{o) OUTPUT 1
INPUT
Rl
50
R5
39
>----'\>/V'v--fO") OUTPUT 2
OTHER
SUIVES
The 500 video line splitter here puts feedback on one
buffer, with the others slaved. Offset and gain accuracy of
slaves depend on their matching with master.
When driving long cables, including a resistor in series
with the output should be considered. Although it reduces
gain, it does isolate the feedback amplifier from the ef·
fects of unterminated lines which present a resonant load.
When working with wideband amplifiers,special attention
should always be paid to supply bypaSSing, stray capaci·
tance and keeping leads short. Direct grounding of test
probes, rather than the usual ground lead, is absolutely
necessary for reasonable results.
The LT1010 has slew limitations that are not obvious from
standard specifications. Negative slew is subject to
glitching, but this can be minimized with quiescent cur·
rent boost. The appearance is always worse with fast rise
signal generators than in practical applications.
2-95
LT1010
APPLICATions InFoRmATion
Track and Hold
The 5MHz track and hold shown here has a 400kHz power
bandwidth driving ± 10V. A buffered input follower drives
the hold capacitor, C4, through 01, a low resistance FET
switch. The positive hold command is supplied by TIL
logic, with 03 level shifting to the switch driver, 02. The
output is buffered by A3.
When the gate is driven to V- for HOLD, it pulls charge
out of the hold capacitor. A compensating charge is put
into the hold capacitor through C3. The step into hold is
made independent of the input level with R7 and adjusted
to zero with R10.
Since internal dissipation can be quite high when driving
fast signals into a capacitive load, using a buffer in a
power package is recommended. Raising buffer quiescent
current to 40mA with R3 improves frequency response.
This circuit is equally useful as a fast acquisition sample
and hold. An LF156 might be used for A3 to reduce drift in
hold because its lower slew rate is not usually a problem
in this application.
>-+---..... OUTPUT
INPUT
02"
6V
R9
10k
R10
50k
V"2N2369 EMITTER BASE JUNCTION
2-96
R11
6.2k
LT1010
APPLICATions InFoRmATion
Current Sources
A standard op amp voltage to current converter with a
buffer to increase output current is shown here. As usual,
excellent matching of the feedback resistors is required to
get high output resistance. Output is bi-directional.
± 150mA output capability. High frequency output characteristics will depend on the bandwidth and slew rate of
the amplifiers. Both these circuits have an equivalent output capacitance of about 30nF.
Voltage/Current Regulator
Rl
R2
lOOk
lOOk
0.01%
0.01%
V, -,\OMt-....----'II\,fY---..,
IOUT~
R2(V2- V,)
R1R4
R4
This circuit regulates the output voltage at Vv until the
load current reaches a value programmed by VI. For heav·
ier loads, it is aprecision current regulator.
10
0.1%
>-~"""'_-IOUT
R3
lOOk
0.01%
R3
211
~~Mt--+-OUTPUT
R4
lOOk
0.01%
R4
2k
01
lN457
This circuit uses an instrumentation amplifier to eliminate
the matched resistors. The input is not high impedance
and must be driven from a low impedance source like an
op amp. Reversal of output sense can be obtained by
grounding pin 7of the LM163 and driving pin 5.
F+.JW~-IOUT
R5
2k
0.1%
0.1%
Rl
2k
Vv
1V/V
R6
99.8k
R7
99.8k
0.1%
VI
0.1% 10mAIV
With output currents below the current limit, the current
regulator is disconnected from the loop by 01, with 02
keeping its output out of saturation. This output clamp en·
abies the current regulator to get control of the output cur·
rent from the buffer current limit within a microsecond for
an instantaneous short.
In the voltage regulation mode, A1 and A2 act as a fast
voltage follower using the capacitive load isolation tech·
nique described earlier. Load transient recovery as well as
capacitive load stability are determined by C1. Recovery
from short circuit is clean.
Output resistances of several megohms can be obtained
with both circuits. This is impressive considering the
Bi·directional current limit can be obtained by adding an·
other op amp connected as acomplement to A3.
2-97
EI
LT1010
APPLICATions InFoRmATion
Supply Splitter
Dual supply op amps and comparators can be operated
from asingle supply by creating an artificial ground at half
the supply voltage. The supply splitter shown here can
source or sink 150mA.
also used on the buffer to avoid high frequency instability
that can be caused by high source impedance.
High Current Booster
The circuit below uses a discrete stage to get 3A output
capacity. The configuration shown provides aclean, quick
way to increase LT1010 output power. It is useful for high
current loads, such as linear actuator coils in disk drives.
------,.--- v+ 12
The output capacitor, C2, can be made as large as neces·
sary to absorb current transients. An input capacitor is
The 330 resistors sense the LT1010's supply current, with
the grounded 1000 resistor supplying a load for the
LT1010. The voltage drop across the 330 resistors biases
01 and 02. Another 1000 value closes a local feedback
loop, stabilizing the output stage. Feedback to the LT1056
control amplifier is via the 10k value. 03 and 04, sensing
across the 0.180 units, furnish current limiting at about
3.3A.
15pF
10k
+15V
O.18!l
+
68pF
T
22PF
3311 2N3:
Q1
MJE2955
10k
INPUT·--A/<~~
10011
- 1 5 V - + - -......"'N¥.....
HEAT SINK OUTPUT TRANSISTORS
2-98
LT1010
Wideband FET Input Stabilized Buffer
Gain Trimmable Wideband FET Amplifier
The figure below shows a highly stable unity gain buffer
with good speed and high input impedance. Q1 and Q2
constitute a simple, high speed FET input buffer. Q1 func·
tions as asource follower, with the Q2 current source load
setting the drain-source channel current. The LT1010
buffer provides output drive capability for cables or whatever load is required. Normally, this open loop configuration would be quite drifty because there is no dc feedback.
The LTC1050 contributes this function to stabilize the circuit. ft does this by comparing the filtered circuit output to
a similarly filtered version of the input signal. The amplified difference between these signals is used to set Q2's
bias, and hence Q1 's channel current. This forces Q1's
VGS to whatever voltage is required to match the circuit's
input and output potentials. The 2000pF capacitor at A1
provides stable loop compensation. The RC network in
A1's output prevents it from seeing high speed edges coupled through Q2's collector-base junction. A2's output is
also fed back to the shield around Q1's gate lead, bootstrapping the circuit's effective input capacitance down to
less than 1pF.
A potential difficulty with the previous circuit is that the
gain is not quite unity. The f.igure labelled (A) on the next
page maintains high speed and low bias while achieving a
true unity gain transfer function.
This circuit is somewhat similar, except that the Q2-Q3
stage takes gain. A2 dc stabilizes the input-output path,
and A1provides drive capability. Feedback is to Q2's emitter from A1's output. The 1k adjustment allows the gain to
be precisely set to unity. With the LT1010 output stage
slew and full power bandwidth (1Vp-p) are 100V//Ls and
10MHz, respectively. - 3dB bandwidth exceeds 35M Hz. At
A 10 (e.g., 1k adjustment set at 500) full power bandwidth
stays at 10MHz while the - 3dB point falls to 22M Hz.
=
With the optional discrete stage, slew exceeds 1000V//Ls
and full power bandwidth (1Vp-p) is IBM Hz. - 3dB bandwidth is 58MHz. At A 10, full power is available to 10M Hz,
with the - 3dB point at 36M Hz.
=
A
10M
0.1
-5V
~
2-99
...
...
LT1010
Figures A and B show response with both output stages.
The LT1010 is used in Figure A (Trace A=input, Trace
B=output). Figure Buses the discrete stage and is slightly
faster. Either stage provides more than adequate performance for driving video cable or data converters, and the
LT1012 maintains dc stability under all conditions.
15V
10pF
INPUT-...-----+I
15V
l
10M
1k
GAIN
AOJ
10k
2k
30011
5011
5.6k
A
3k
10M
-15V
-15V
(A)
(B)
Gain Trimmable Wideband FET Amplifier
A=O.2V/DIV
B=0.2V/DIV
A=0.2V/DIV
B=0.2V/DIV
HORIZONTAL = 10ns/DlV
Figure A. Waveforms Using LT1010
2-100
HORIZONTAL = 10ns/DIV
Figure B. Waveforms Using Discrete Stage
LT1010
DEFiniTion OF TEAms
Output Offset Voltage: The output voltage measured with
reference to the input.
Input Bias Current: The current out of the input terminal.
Large Signal Voltage Gain: The ratio of the output voltage
change to the input voltage change over the specified input voltage range_ •
Output Resistance: The ratio of the change in output voltage to the change in load current producing it.'
Output Saturation Voltage: The voltage between the output and the supply rail at the limit of the output swing toward that rail.
Saturation Resistance: The ratio of the change in output
saturation voltage to the change in current producing it,
going from no load to full load.'
Slew Rate: The average time rate of change of output voltage over the specified output range with an input step between the specified limits.
Bias Terminal Voltage: The voltage between the bias
terminal and V+.
Supply Current: The current at either supply terminal with
no output loading.
'Pulse measurements (-1 ms) as required to minimize thermal effects.
Saturation Offset Voltage: The output saturation voltage
with no load.
SCHEmATIC DIAGRAm (excluding protection circuits)
~~~~--------------~----~~~--v+
.......
..---~-------;------+-+---- BIAS
~+-+-----""'""M~ OUTPUT
I----;--INPUT
~~~--~-+~------~------~---+~--------+-~v-
2-101
•
LT1010
PACKAGE DESCRIPTion Dimensions in inches (millimeters) unless otherwise noted.
KPackage
4-Lead TO·3 Metal Can
(Steel)
HPackage
4-Lead TO·39 Metal Can
(Kovar Base)
r
0.350-0.370
(8.890 - 9.398)
0.305-0335
(7.747-8.509)
0.165-0.185
(4191-4.70)
0.760-0.775
(19.30-19.69)
0.320-0.350
(8.128 - 8.890)
OIA
J
W==::;;:=:;~:::::J-.l
t
OIA
0.116
(2.946)
MAX
0.420-0.480
(10.67-12.19)
0.152-0.162
(3860-4.114)
RTYP
0167-0.177
(4.241-4495)
R TYP
H3(39)188
LT1010M
LT1010C
~
l
,,,.-,,.,
r
TPackage
5·Lead TO·220 Plastic
0.390-0.410
(9.906-1041)
~
'~~
0.100-0.120
(2.540-3.048)
j
+
D
0.355-0370
(9.017-9.398)
0.062-0.072
(1.574-1.829)
j
1--1
~
0.170-0.180
r
0.030-0.040
(0.762-1016)
10.045-0055
ri1.143-1397)
rr-Tl
0460-0.500
(1168-1270)
U
~
(22.35-23.11)
0.970-1
(24.64-2
J
L
l
~
0.013-0025
(0.330-0.635)
(~;:~=~~:~) -4+----1
r---r::--r--,
2-102
~
0710
(15.75)
(18.03)
LT1010
PACKAGE DESCRIPTion Dimensions in inches (millimeters) unless otherwise noted.
NPackage
8-Lead Plastic DIP
r:
:l
0
1
0 400
(1~:))
.
765
2
3
-::r0.010
(6.350,,0.254)
4
~
0.300-0.320
(7.620-8.128)
r
0.325
~~:~~;
I
8255 +0.635)
.
-0.381
0.009-0.015
(0.229-0.381)
tJ
0.045,,0.015
(1.143,,0.381)
0.100,,0.010
(2.540" 0.254)
El],
15O'C
130'CfIII
2-103
NOTES
2-104
~""""-Llnlt\l2
~~
LTlO12A/LT1012
TECHNOLOGY~------P-ic-o-a-m-p-I-np-u-t-C-u-r-re-n-t
Microvolt Offset
Low Noise Op Amp
FEATURES
DESCRIPTiOn
• OP-07 Type Performance
at 1/8th of OP-07's Supply Current
at 1I20th of OP-07's Bias and Offset Currents
• Guaranteed Offset Voltage
25pV Max
• Guaranteed Bias Current
100pA Max
• Guaranteed Drift
0.6pV/oC Max
• Low Noise, 0.1 Hz to 10Hz
0.5I'Vp-p
• Guaranteed Low Supply Current
500l'A Max
• GuaranteedCMRR
114dB Min
• GuaranteedPSRR
114dBMin
• Guaranteed Operation @ ± 1.2V Supplies
The LT1012 is an internally compensated universal
precision operational amplifier which can be used in
practically all precision applications. The LT1012
combines picoampere bias currents (which are
maintained over the full - 55°C to 125°C temperature range), microvolt offset voltage (and low drift
with time and temperature), low voltage and current
noise, and low power dissipation. The LT1012
achieves precision operation on two Ni-Cad batteries with 1mW of power dissipation. Extremely high
common mode and power supply rejection ratios,
practically unmeasurable warm-up drift, and the
ability to deliver 5mA load current with a voltage
gain of one million round out the LT1012's superb
precision specifications.
APPLICATions
•
•
•
•
•
•
•
Replaces OP-07 While Saving Power
Precision Instrumentation
Charge Integrators
Wide Dynamic Range Logarithmic Amplifiers
Light Meters
Low Frequency Active Filters
Thermocouple Amplifiers
The all around excellence of the LT1012 eliminates
the necessity of the time consuming error analysis
procedure of precision system design in many applications; the LT1012 can be stocked as the universal internally compensated precision op amp.
Protected by U.S. patents 4,575,685 and 4,775,884
:!: 250V Common Mode Range Instrumentation Amplifier (Av
-IN
~
COMMON
MODE
INPUT
",250V
=1)
Typical Distrubution of Input
Oftset Voltage
]j
k OPTIONAL
CMRR
TRIM
~~~~U~~~~E -+-HII-160
~
~ 120
+IN
R1-R6:VISHAY 444 ACCUTRACT THIN FILM
SIP NETWORK
:VISHAY 444 PIN NUMBERS
ill
RUNS
f---+-+--+---+
:5
ffi
~
::>
80
f-+-+--+
40
f-+-+-
z
VISHAY INTERTECHNOLOGY, INC.
63 LINCOLN HIGHWAY
MALVERN, PA 19355
COMMON MODE REJECTION RATIO = 74dB (RESISTOR LIMITED)
WITH OPTIONAL TRIM = 130dB
OUTPUT OFFSET (TRIMMABLE TO ZERO) =500pV
OUTPUT OFFSET DRIFT = 10pV/oC
INPUT RESISTANCE = 1M
-~
-m
0
m
~
INPUT OFFSET VOLTAGE (pV)
2-105
...
...
LT 10 12AI LT 10 12
ABSOLUTE mAXimum RATinGS
Supply Voltage ............................. ± 20V
Differential Input Current (Note 1).......... ± 10mA
Input Voltage ............................... ± 20V
Output Short Circuit Duration ............. Indefinite
Operating Temperature Range
LT1012AM, LT1012M ............ -55°Cto125°C
LT1012AC, LT1012C,
LT1012D, LT1012S8............... O°C to 70°C
Storage Temperature Range
All Devices..................... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.)........300 oC
TOP VIEW
PACKAGE/ORDER InFORmATion
ORDER PART
NUMBER
TOP VIEW
Vas
TRIM
LT1012AMH
LT1012MH
LT1012ACH
LT1012CH
LT1012DH
H PACKAGE
a-LEAD TO-5 METAL CAN
ORDER PART
NUMBER
LT1012ACN8
LT1012CN8
LT1012DN8
LT1012S8
PART MARKING
SO PACKAGE
a-LEAD PLASTIC SOIC
N PACKAGE
a-LEAD PLASTIC DIP
1012
ELECTRICAL CHARACTERISTICS Vs= ± 15V, VCM =ov, TA = 25°C, unless otherwise noted.
SYMBOL PARAMETER
Input Offset Voltage
Vos
CONDITIONS
(Note 2)
los
Long Term Input Offset
Voltage Stability
Input Offset Current
15
100
25
150
Input Bias Current
±25 ±100
(Note 2)
±35 ±150
0.1 Hz to 10Hz
Input Noise Voltage
0.5
Input Noise Voltage Density
fo= 10Hz (Note 3)
17
30
fa = 1000Hz (Note 4)
14
22
Input Noise Current Density
20
fo= 10Hz
large Signal Voltage Gain
300
2000
VOUF ±12V, RL2:10k!l
300
1000
VOUT= ± 10V, RL2:2k!l
Common Mode Rejection Ratio VCM= ± 13.5V
114
132
Power Supply Rejection Ratio Vs= ± 1.2Vto ±20V
114
132
Input Voltage Range
±13.5 ±14.0
±14
Output Voltage Swing
±13
RL = 10kO
Slew Rate
0.1
0.2
Supply Current
370
500
(Note 2)
380
600
(Note 2)
18
en
en
in
AVOL
CMRR
PSRR
Your
Is
LT1 012AM/AC
MIN
TYP MAX
25
8
20
90
0.3
2-106
MIN
LT1012M
TYP MAX
8
35
20
90
0.3
15
100
25
150
±25 ±100
±35 ±150
0.5
17
30
14
22
20
2000
300
200
1000
114
132
132
114
±13.5 ±14.0
±13
±14
0.1
0.2
380
380
600
-
MIN
LT1012C
TYP
10
25
0.3
MAX
50
120
UNITS
~V
~V
~V/month
20
150
200
30
±30 ±150
±40 ±2oo
0.5
17
30
14
22
20
200
2000
200
1000
110
132
110
132
±13.5 ±14.0
±13
±14
0.1
0.2
380
380
600
-
pA
pA
pA
pA
~Vp·p
nVvltz
nVvltz
fA/{j:fz
V/mV
VlmV
dB
dB
V
V
V/psec
pA
pA
LT1012A/LT1012
ELECTRICAL CHARACTERISTICS Vs = ±15V, VCM =OV, TA =25°e, unless otherwise noted.
SYMBOL
Vos
PARAMETER
Input Offset Voltage
CONDITIONS
MIN
(Note 2)
los
Long Term Input Offset
Voltage Stability
Input Offset Current
16
Input Bias Current
en
en
Input Noise Voltage
Input Noise Voltage Density
in
AVOL
Input Noise Current Density
Large Signal Voltage Gain
CMRR
PSRR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
Slew Rate
Supply Current
Vour
Is
(Note 2)
(Note 2)
O.IHzto 10Hz
fa = 10Hz (Note 4)
fa = 1000Hz (Note 4)
fo= 10Hz
Vour = ±12V, RL",10kO
Vour= ± 10V, RL",2k!l
VCM = ± 13.5V
Vs= ± 1.2V to ± 20V
RL = 10k!l
200
200
110
110
±13.5
±13
0.1
(Note 2)
LT1012D
TYP
12
25
0.3
20
30
±30
±40
0.5
17
14
20
2000
1000
132
132
±14.0
±14
0.2
380
MIN
MAX
60
-
150
±150
30
22
200
120
110
110
±13.5
±13
0.1
600
LT1012S8
TYP
15
25
0.4
50
60
±8O
±120
0.5
17
14
20
2000
1000
132
132
±14.0
±14
0.2
3BO
MAX
120
lBO
UNITS
~V
~V
~Vlmonth
pA
pA
pA
pA
280
3BO
±300
±400
~Vp·p
30
22
nVv'Hz
nVv'Hz
fA/v'Hz
V/mV
VlmV
dB
dB
V
V
V/~sec
~
600
ELECTRICAL CHARACTERISTICS Vs =± 15V, VCM =OV, - we :5TA :5125°e, unless otherwise noted.
SYMBOL
Vos
PARAMETER
Input Offset Voltage
CONDITIONS
(Note 2)
los
Average Temperature Coefficient of
Input Offset Voltage
Input Offset Current
(Note 2)
16
(Note 2)
AVOL
CMRR
PSRR
Vour
Is
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
Supply Current
••
•
••
•
Average Temperature Coefficient of
Input Offset Current
Input Bias Current
Average Temperature Coefficient of
Input Bias Current
Large Signal Voltage Gain
MIN
Vour = ± 12V, RL",10kll
Vour= ± 10V, RL",2kll
VCM= ± 13.5V
Vs= ± 1.5V to ±20V
RL = 10kll
The • denotes the specifications which apply over the full operating
temperature range.
Nole 1: Differential input voltages greater than tv will cause excessive cur·
rent to flow through the input protection diodes unless limiting resistance
is used.
••
•
••
•
•
•
•
•
200
200
110
110
±13.5
±13
LT1012AM
TYP
MAX
30
60
40
lBO
0.2
0.6
MIN
LT1012M
TYP
30
40
0.2
MAX
lBO
250
1.5
UNITS
~V
~V
~VfOC
30
70
0.3
250
350
2.5
30
70
0.3
250
350
2.5
pA
pA
pA/oC
±80
±150
0.6
±800
±BOO
6.0
±BO
±150
0.6
±600
±BOO
6.0
pA
pA
pAloC
1000
600
128
126
±14
400
150
100
lOB
lOB
±13.5
±13
650
1000
600
12B
126
±14
400
VlmV
V/mV
dB
dB
V
V
BOO
~A
Note 2: These specifications apply for VMIN sVss ± 20V and
-13.5VsVCMSI3.5V(forVs= ±15V). VM1N = ±1.2Vat25°C, ± 1.3V from
OOC to 70°C, ± 1.5V from - 55°C to 125°C.
Note 3: 10Hz noise voltage density is sample tested on every lot. Devices
100% tested at 10Hz are available on request.
Note 4: This parameter is tested on a sample basis only.
2-107
LT1012A/LT1012
ELECTRICAL CHARACTERISTICS Vs= ±15V, VCM = OV, O·CSTAS70·C, unless otherwise noted.
SYMBOL
Vos
PARAMETER
Input Offset Voltage
CONDITIONS
(Note 2)
los
Average Temperature Coefficient of
Input Offset Voltage
Input Offset Current
(Note 2)
Is
Average Temperature Coefficient of
Input Offset Current
Input Bias Current
(Note 2)
AVOL
CMRR
PSRR
VOUT
Is
Average Temperature Coefficient of
Input Bias Current
Large Signal Voltage Gain
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
Supply Current
Vour = :t 12V, RL~10k!l
Vour= :t 10V, RL~2k!l
VCM=:t 13.5V
Vs=:t 1.3Vto :t20V
RL= 10k!l
MIN
••
•
••
•
••
•
••
•
•
•
•
•
200
200
110
110
:t13.5
:t13
LT1012AC
TYP
20
30
0.2
MAX
60
160
0.6
25
40
0.3
230
300
2.5
35
45
0.3
300
pA
pA
2.5
pA/oC
:t35
:t50
0.3
:t230
:t300
2.5
:t35
:tOO
0.3
:t23O
:t3OO
2.5
pA
pA
1500
1000
130
128
:t14
400
MIN
150
150
108
108
:t13.5
:t13
600
LT1012C
TYP
20
30
0.2
MAX
100
200
1.0
230
~V
~V
~V1°C
pA/oC
V/mV
V/mV
1500
600
130
128
:t14
400
UNITS
dB
dB
V
V
800
~A
ELECTRICAL CHARACTERISTICS Vs = ± 15V, VCM =ov, O·CSTAS70·C, unless otherwise noted.
SYMBOL
Vos
PARAMETER
Input Offset Voltage
CONDITIONS
(Note 2)
los
Average Temperature Coefficient of
Input Offset Voltage
Input Offset Current
(Note 2)
Is
Average Temperature Coefficient of
Input Offset Current
Input Bias Current
(Note 2)
AVOL
CMRR
PSRR
Vour
Is
Average Temperature Coefficient of
Input Bias Current
Large Signal Voltage Gain
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
Supply Current
Vour= :t 12V, RL~10k!l
Vour= :t10V, RL~2k!l
VCM= :t13.5V
Vs= :t1.3Vto :t20V
RL = 10k!!
MIN
••
•
••
•
••
•
••
•
•
•
•
•
LT1012D
TYP
25
40
0.3
35
45
0.35
:t50
:t65
0.4
150
150
108
108
:t13.5
:t13
MAX
140
-
1.7
380
-
4.0
:1:420
-
5.0
1500
800
130
128
:t14
400
MIN
150
100
108
108
:t13.5
:t13
800
LT1012SB
TYP
30
45
0.3
MAX
200
270
1.8
UNITS
~V
~V
~V/oC
pA
pA
60
80
0.4
380
500
4.0
pA/oC
:t 100
:t150
0.5
:t420
:t550
5.0
pA
pA
pAloC
V/mV
V/mV
1500
600
130
128
dB
dB
V
V
:t14
400
800
~A
Optional Offset Nulling and Over·Compensation Circuits
Input offset voltage can be adjusted over a ± aOO,N
range with a 5k to 100k potentiometer.
The LT1012 is internally compensated for unity gain
stability. The over-compensation capacitor, Cs, can
be used to improve capacitive load handling capability, to narrow noise bandwidth, or to stabilize circuits with gain in the feedback loop.
2-108
LT1012A/LT1012
TYPICAL PERFORmAnCE CHARACTERISTICS
Offset Voltage vs Source
Resistance (Balanced or
Unbalanced)
Typical Distribution of Input Bias
Current
1000
200
200
J
Vs= ±15V
TA=25'C
VCM=OV
160
/ /
f=.
H
~~
120
..
25'C/
80
Vs
40
f==
±15V
".,., ".,..
3k
10k 30k lOOk 300k 1M
SOURCE RESISTANCE (0)
-120
3M 10M
Input Bias Current vs Temperature
iI
i="
a;
~
60
'-'
~-50
~
J-
T-
0
'" "\.
~ ::::OvERCANdELLED LNIT' ~
~
-100
-150
-50 -25
" \.
25
50
75
TEMPERATURE ('C)
100
~-
40
"J n.
~
ir-I It"
~
-60
0
60
INPUT BIAS CURRENT (pA)
~
'"
13
Offset Voltage Drift vs Source
Resistance (Balanced or
Unbalanced)
~
'"
~ -20
;;;
I
:;
I
~
I
I
125
~
VCM
i:':
i"
;:
./
t;:
;;;
c 1.0
15
~
o
TYPICAL
0.1
lk
10k
lOOk
1M
10M
SOURCE RESISTANCE (0)
10
60
V I'--I--
----
..........
,..-
I
Vs=±15V _
TA=25'C
40
\-----
r
V-.
f'......
METAL CAN (H) PACKAGE -
/'
V
00
DUAL-IN-LiNE PACKAGE
PLASTIC (N) OR SO (S) -
1
2
3
4
TIME AFTER POWER ON (MINUTES)
-
100M
Offset Voltage Drift with
Temperature 01 Four
Representative Units
Long Term Stability 01 Four
Representative Units
Warm· Up Drift
/
/
MAXIMUM
w
/
'"
~
~
+
-10
-5
0
5
10
COMMON·MODE INPUT VOLTAGE
/
~ 10
T
-
fo"""
-40
/
:>
~
R,NCM=2xl0 120
I
DEVICE WITH NEGATIVE INPUT CURRENT
I
0
120
~ 100
---r
20
R=f
1.0-.
-60
0
60
INPUT OFFSET CURRENT (pA)
-120
120
DEilCE WITH POSITIVE INPUT CURRENT
-60
-15
o
I
VS=±15V
TA=25'C
40
UNDERCANCELLED UNIT
:>
II
80
II
Input Bias Current Over Common
Mode Range
100
..........
*f"
1020 UNITS
FROM THREE
RUNS
120
~,
r
n
Vs= ±15V
TA=25'C
VCM=OV
160
55'C TO 125'C
1
50
1020 UNITS
FROM THREE
RUNS
I..
/
lk
Typical Distribution 01 Input
Offset Current
r-
§:
20
~
~
tu
0
~ -20
f..-
~
-40
- -r-pc::::
r-- r--
-8
-10
o
2
3
TIME (MONTHS)
-60
-50
-25
0
25
50
75
TEMPERATURE ('C)
100
125
2-109
LT1012A/LT1012
TYPICAL PERFORmAnCE CHARACTERISTICS
0.1 Hz to 10Hz Noise
Noise Spectrum
Total Noise vs Source Resistance
1000
10.0
TA=25"C
Vs=:1.2VTO :20V
TA 25"C
Vs :1.2VTO:20V
TA 25"C
Vs= :1.2V TO : 2 0 V -
II
I
~ .... CURRENT NOISE
....
I1'ioI:L
=l/fJri~~~'
:::::
== 2.5Hz
1
10
4
6
TIME (SECONDS)
~120
r-- I--..
'"~ 100
z
'"
~
80
w
60
'"z
::;;
'"::;;
~
Ul
a:
25"C
125"C
'"
::;;
-55"C
8
o
:5
:10
:15
SUPPLY VOLTAGE (V)
o
:20
Voltage Gain vs Frequency
140
120
-
cc
:s
80
«
to
w
60
~
40
z
~
20
r\.
30
'\.
'\.
Vs=:15V
TA=25"C
J
-20
0.01 0.1
2-110
1
!\.
:""
~
"
10
120
l"\
'\.
'"~
"~
20
~
10
lOOk
TA=25"C
10 100 lk 10k lOOk 1M 10M
FREQUENCY (Hz)
-10
0.01
i
60
en
~ ~
Vs= ±15V
TA=25"C
20
0.1
1M
10
107
lOB
PHUI
I'\. :'\
I'\. 1,\
I'\. 1\
lOOk
1M
10M
/
\
0.1
1
FREQUENCY (MHz)
NEGATIVE
SUPPLY
100
lk 10k
FREQUENCY (Hz)
120
\'
'r-.
:'\
Voltage Gain ys Load Resistance
m
r'\
PHASE MARGIN
1I1'L 7O "C
'""\. .'\
~
I
180
'\
ONLY
104
105
lOS
SOURCE RESISTANCE (II)
I--POSITIV~
80
SUPPLY
:::>
"'
,ltlJJ
1\
~
:::: 100
100
lk
10k
FREQUENCY (Hz)
GAIN
cc
:s
'\.
_
1
103
'"~
Gain, Phase Shift vs Frequency
......
to
V'
102
1~
Vs=±15V
TA =25"C
~
100
0.01
Power Supply Rejection VI
Frequency
1,\
20
L
V-
=+ATlkH~ ~RESISTOR NOISE -
II
140
_
AT 10Hz
llf CORNER
Common Mode Rejection vs
Frequency
500
AT 1kHz
-~.
R
Rs=2R
12nlli
II 11111
10
100
1000
FREQUENCY (Hz)
1
Supply Current vs Supply Voltage
300
=-R
VOLTAGE NOISE
ATlOH~~
I
200
10
I
t/'
,..
,..
55"C
25"C
125"C
,
I
I
lOOk
1
Vs= :15V
Vo=:10V
2
5
LOAD RESISTANCE (kll)
10
20
LT1012A/LT1012
TYPICAL PERFORmAnCE CHARACTERISTICS
Large Signal Transient Response
Small Signal Transient Response
Small Signal Transient Response
>
25
~,
Ay= + 1, GLOAO=100pF, 5pS/DIV
Ay= + 1, 20pS/DIV
Ay=+1, CLOAO=1000pF, 5pS/DIV
Slew Rate, Gain Bandwidth
Product vs Over·Compensation
Capacitor
Output Short Circuit Current vs
Time
Closed Loop Output Impedance
1000
20
co
z
<3
'[
-
ffi
~
15
t--
-55'G
25'C
10
-0:::>
10
~y=1000
~~
~~
'"
Vs ±15V
TA 25'C
-10
100
~~
:::>
§
en
»
Z
GBW
~
~
1000
Co.
">---<:::>
0.1
V
0.01
V
111111
1
2
TIME FROM OUTPUT SHORT (MINUTES)
0.001
1
10
100
1000
OVER-COMPENSATION CAPACITOR (pF)
Common Mode Range and
Voltage Swing at Minimum Supply
Voltage
±1.B
~ V+-O.3
±1.6
GM JNGE
':;
V+-O.6
~
V+-O.9
o
a; V+-1.2
o
'"~
~
~
V-+1.2
V-+O.9
o
....-SWING RL 2k
I
~
o
'-'
1
0.001
1
10
~
100
10k
100k
±1.2
r-.....
±1.0
±O.B
~
---
~
.....
14~
~
~
125
s:
~
s:
C
s:
200k ~
-0
!<
300k
RL~~
:::>
II
SliNG R~
1
10,000
I
lo=1mA
Vs= ±15V
Minimum Supply Voltage, Voltage
GainatVMIN
V+
g
V
~o
111111111
V
~y~+1
<§
100k ~
~
o
-50
-25
0255075
TEMPERATURE ('C)
100
125
2-111
LT1012A/LT1012
APPLICATions InFoRmATion
The LT1012 may be inserted directly into OP-07,
LM11, 108A or 101A sockets with or without removal
of external frequency compensation or nulling components. The LT1012 can also be used in 741, LF411,
LF156 or OP-15 applications provided that the nul·
ling circuitry is removed.
Although the OP-97 is a copy of the LT1012, the
LT1012 directly replaces and upgrades OP-97 applications. The LT1012C and D have lower offset
voltage and drift than the OP-97F. The LT1012A has
lower supply current than the OP·97A1E. In addition,
all LT1012 grades guarantee operation at ± 1.2V
supplies.
Achieving Picoampere/Microvolt Performance
In order to realize the picoampere/microvolt level
accuracy of the LT1012, proper care must be exercised. For example, leakage currents in circuitry
external to the op amp can significantly degrade
performance. High quality insulation should be used
(e.g. Teflon, Kel-F); cleaning of all insulating
surfaces to remove fluxes and other residues will
probably be required. Surface coating may be necessary to provide a moisture barrier in high humidity
environments.
Board leakage can be minimized by enCircling the input circuitry with a guard ring operated at a potential
close to that of the inputs: hi inverting configurations the guard ring should be tied to ground, in
non-inverting connections to the inverting input at
pin 2. Guarding both sides of the printed circuit
OVER COMPO 5
2-112
board is required. Bulk leakage reduction depends
on the guard ring width. Nanoampere level leakage
into the offset trim terminals can affect offset voltage and drift with temperature.
Microvolt level error voltages can also be generated
in the external circuitry. Thermocouple effects
caused by temperature gradients across dissimilar
metals at the contacts to the input terminals can exceed the inherent drift of the amplifier. Air currents
over device leads should be minimized, package
leads should be short, and the two input leads
should be as close together as possible and maintained at the same temperature.
Noise Testing
For application information on noise testing and
calculations, please see the LT1008 data sheet.
Frequency Compensation
The LT1012 can be overcompensated to improve
capacitive load handling capability or to narrow
noise bandwidth. In many applications, the feedback
loop around the amplifier has gain (e.g. logarithmic
amplifiers); overcompensation can stabilize these
circuits with a single capacitor.
The availability of the compensation terminal permits the use of feedforward frequency compensation to enhance slew rate. The voltage follower
feed forward scheme bypasses the amplifier's gain
stages and slews at nearly 10V/p.s.
The inputs of the LT1012 are protected with backto-back diodes. Current limiting resistors are not
used, because the leakage of these resistors would
prevent the realization of picoampere level bias currents at elevated temperatures. In the voltage follower configuration, when the input is driven by a
fast, large signal pulse (> 1V), the input protection
diodes effectively short the output to the input during slewing, and a current, limited only by the output
short circuit protection will flow through the diodes.
LT1012A/LT1012
APPLICATions InFoRmATion
The use of a feedback resistor, as shown in the voltage follower feedforward diagram, is recommended
because this resistor keeps the current below the
Test Circuit for Offset Voltage
and its Drift with Temperature
short circuit limit, resulting in faster recovery and
settling of the output.
Follower Feedforward Compensation
Pulse Response of Feedforward
Compensation
SOpF
SDk'
lSV
10k
Vo
Sk
IN-JlN_H
OUT
Ell
SI"'/DIV
'RESISTORS MUST HAVE LOW THERMOELECTRIC
POTENTIAL
TYPICAL APPLICATiOnS
Ammeter with Six Decade Range
. . - - -_ _-
10k
......-IINo...-1SV
O.lpF
lSV
10k
LT1004C
CURRENT INPUT
01,02,03,04, RCA CA3146 TRANSISTOR ARRAY.
CALIBRATION: ADJUST R1 FOR FULL SCALE
DEFLECTION WITH 1pA INPUT CURRENT.
AMMETER MEASURES CURRENTS FROM 100pA
TO 100pA WITHOUT THE USE OF EXPENSIVE
HIGH VALUE RESISTORS. ACCURACY AT 100pA
IS LIMITED BY THE OFFSET VOLTAGE BETWEEN
01 AND 02 AND, AT 100pA, BY THE INVERTING
BIAS CURRENT OF THE lT1012.
5490
54911
54911
100pA 0 -......- - - - '
2-113
LT1012A/LT1012
TYPICAL APPLICATions
Kelvin-Sensed Platinum Temperature Sensor Amplifier
~
~
REFERENCE - LT102HO
5k
182k
R4
--~---------1-----Y~--~~----~~--~~------------------·~5k
235k'
6.65M
RI'
1~~~____~10yM~__~____________~______________~____~6~~~k~__~~(~~
10k
24.3k
20V
200k
5k'
r- - ~-___'r<>-'\o4.",75",k--1~__""~
ROSEMOUNT II
78S
OR
EaUIVALENT
I
I
-15V
RS
392k'
-15V --W~"""--------O-;L--_~
VOUT=100mV/'C
- 5O"C TO 15O"C
'=WIRE WOUND RESISTORS
ALL OTHER RESISTORS ARE 1% METAL FILM
TRIM R2 AT O'C FOR Vo=OV
TRIM R3 AT 100'C FOR Vo= 10V
TRIM R4 AT 5O"C FOR Vo=5V
IN THE ORDER INDICATED
619k
POSITIVE FEEDBACK (Rl) LINEARIZES THE
INHERENT PARABOLIC NONLINEARITY OF
THE PLATINUM SENSOR AND REDUCES
ERRORS FROM 1.2'C TO 0.004'C OVER
THE -50'C TO 150'C RANGE
Amplifier for Bridge Transducers
Saturated Standard Cell Amplifier
R5
56M
r-------1~15V
...----_V+
Rl
lOOk
1.018235V
10~~
T
R3
510k
+
SATURATED
STANDARD
CELL
#101
EPPLEY LABS
NEWPORT, R.1.
R4
510k
R2
Rl
R2
lOOk
S2
lOOk
R6
56M
VOLTAGE GAIN
=100
THE TYPICAL 30pA BIAS CURRENT OF THE LT1012 WILL DEGRADE THE
STANDARD CELL BY ONLY lppm/YEAR. NOISE IS A FRACTION OF A
ppm. UNPROTECTED GATE MOSFET ISOLATES STANDARD CELL ON
POWER DOWN.
Buffered Reference for Ato DConverters
Amplifier for Photodiode Sensor
15V~"",,"""'--------""----------,
7k
200
LM399
~----~YYr------i--~~
6.5k
lk'
'THE lk PRELOAD
MINIMIZES GLITCHES
INDUCED BY TRANSIENT
LOADS
2-114
LT1012A/LT1012
TYPICAL APPLICATions
Instrumentation Amplifier with :t 100V Common Mode Range
10M
Low Power Comparator with <10/lV Hysteresis
10011
100M
10k
100M
+ IN ......."""'~po-;.
10k
AV=1oo
ALL RESISTORS 1% OR BffiER
Air Flow Detector
Input Amplifier for 4 112 Digit Voltmeter
I
I
I
r-------------------I
I
I
I
IN
I
I
I
MOUNT R1 IN AIRFLOW.
ADJUST R2 SO OUTPUT
GOES HIGH WHEN AIRFLOW
STOPS.
'RATIO MATCH ",0.01%
FN507
ALLEN BRADLEY
DECADE VOLTAGE DIVIDER
Resistor Multiplier
THIS APPLICATION REQUIRES LOW BIAS CURRENT AND OFFSET VOLTAGE, LOW NOISE, AND
LOW DRIFT WITH TIME AND TEMPERATURE.
"No Trims" 12,8it Multiplying DAC Output Amplifier
RIN1GII
REFERENCE IN
O.WTO 10V
R1
10M
WHEN THE REFERENCE INPUT DROPS TO O.W,
THE LEAST SIGNIFICANT BIT DECREASES TO
THE MICROVOLTIPICOAMPERE RANGE.
2-115
LT1012A/LT1012
SCHEmATIC DIAGRAm
v+
OUT
PACKAGE DESCRIPTion Dimensions in inches (millimeters) unless otherwise noted.
HPackage
B-Lead TO·S Metal Can
~IITE
NPackage
B-Lead Plastic DIP
SO Package
B-Lead Plastic SOIC
lEADIMMETElIIS UNCONTfIOLl.EIlBEl'WEEN
TtlEIlEFERE~I'I.AIfEANDSEATING.PI.AME
~'"
lPJ«lMATEflIALPlASTIC
2lW~Al.A-c!.1INPl..ATED
TjMAX
6jA
150'C
17O'QW
2-116
~"Y"·llnlJ\Q
~,
LTlOl2S8
TECHNOLoo~k>~----P-ic-o-a-m-p-l-n-pu-t-C-u-r-re-n-t,
Microvolt Offset,
Low Noise Op Amp
FEATURES
DESCRIPTion
• Internally Compensated
• Guaranteed Offset Voltage
120,N Max.
• Guaranteed Bias Current
25°C
300pA Max.
OOC to 70°C
380pA Max.
• GuaranteedDrift
1.8/tV/oC Max.
• Low Noise,O.1Hzto 10Hz
O.5/tVp-p
• Guaranteed Low Supply Current
600~ Max.
• GuaranteedCMRR
110dB Min.
• Guaranteed PSRR
110dB Min.
• Guaranteed Voltage Gain with 5mA Load Current
The LT1012 is an internally compensated universal precision operational amplifier which can be used in practically
all precision applications. The LT1012 combines picoampere bias currents (which are maintained over the full OOC
to 70°C temperature range), microvolt offset voltage (and
low drift with time and temperature), low voltage and current noise, and low power dissipation. Extremely high
common-mode and power supply rejection ratios, practi- . . .
cally unmeasurable warm-up drift, and the ability to deliv- . . .
er 5mA load current with avoltage gain of a million round
out the LT1012's superb precision specifications.
APPLICATions
The all around excellence of the LT1012 eliminates the
necessity of the time consuming error analysis procedure
of precision system design in many applications; the
LT1012 can be stocked as the universal internally compensated precision op amp.
•
•
•
•
•
•
•
Precision Instrumentation
Charge Integrators
Wide Dynamic Range Logarithmic Amplifiers
Light Meters
•
Low Frequency Active Filters
Standard Cell Buffers
Thermocouple Amplifiers
Kelvin-Sensed Platinum Temperature Sensor Amplifier
+10V
REFERENCE
.
.
392K
-15V
182K
R, •
654K
665M
253K
liM
R,
OOK
,
. .
5K
~
c.2 _
200K
5K
,..- --,
ROSEMOUNT:
78S
OR
,
EQUIVALENT,
Rs
L_
100n
at
O·C
3 +
I
OK
1000
~243K
L.
~
6
4
Vour "" 100mV/" C
-5Q'Cto +150" C
- 0 to 70·C
.".
L
/
-15V
-25·C
619K
_J
Positive feedback (,)
R linearizes the inherent parabolic nonlinearity of the
platinum sensor and reduces errors
from 12°C to 0 (XWC over the
-SOoC to 150°C range
lK
5K
7
;(
475K
,,
~2
~1
Offset Voltage vs Source Resistance
(Balanced or Unbalanced)
·WIRE WOUND RESISTORS
.!-
ALL OTHER RESISTORS.
1% METAL FILM
Tnm R2 al O°C for Vo = OV
R3 at 100°C for Vo = 10V
R4 al SO°C 1(1( Vo = 5V
V,S
±,15V
~
1
lk
3k
10k 30k lOOk 300k 1M
3M
10M
SOURCE RESISTANCE (Il)
In the order rocaled
2-117
LT1012S8
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage ................................... ±20V
Differential Input Current (Note 1) ................ ± 10mA
Input Voltage .......... " ......................... ± 20V
Output Short Circuit Duration .................. Indefinite
Operating Temperature Range ............... OOC to 70°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
ORDER PART
NUMBER
TOP VIEW
LT101288
PART MARKING
S8 PACKAGE
PlASTIC SO
1012
ELECTRICAL CHARACTERISTICS Vs =:!: 15V, VCM =OV, TA =25°C, unless otherwise noted.
SYMBOL
Vos
PARAMETER
Input Offset Voltage
los
Long Term Input Offset Voltage Stability
Input Offset Current
CONDITIONS
MIN
Note 2
Note 2
18
Input Bias Current
en
en
Input Noise Voltage
Input Noise Voltage Density
In
AVOl
Input Noise Current Density
Large Signal Voltage Gain
CMRR
PSRR
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
Slew Rate
Supply Current
VOUT
Is
2-118
Note 2
0.lHztol0Hz
10 = 10Hz (Note 3)
10 = 1000Hz (Note 3)
10= 10Hz
VOUT= :t 12V, Rl 2:10kll
VOUT= :t 10V, Rl2:2kll
VCM= :t13.5V
Vs= :t 2V to :t2OV
Rl = 10kll
Note 2
200
120
110
110
:t13.5
±13
0.1
LT1012S8
TYP
10
25
0.3
50
60
:t80
:t12O
0.5
17
14
20
2000
1000
132
132
:t14.0
:t14
0.2
380
MAX
120
180
280
380
:t300
:t4OO
30
22
600
UNITS
p.V
p.V
p.V/month
pA
pA
pA
pA
p.Vp-p
nVl.JHz
nVl"iiz
IAlv'Hz
V/mV
VlmV
dB
dB
V
V
V/p.S
p.A
LT1012S8
ELECTRICAL CHARACTERISTICS Vs= :!: 15V, VCM =DV, DOCs, TAS7DoC, unless otherwise noted.
SYMBOL
Vas
PARAMETER
Input Offset Voltage
los
Average Temperature Coefficient of Input
Offset Voltage
Input Offset Current
CONDITIONS
MIN
••
Note 2
•
••
•
Note 2
Ie
Average Temperature Coefficient of Input
Offset Current
Input Bias Current
••
Note 2
AVOL
CMRR
PSRR
VOUT
Is
Average Temperature Coefficient of
Input Bias Current
Large Signal Voltage Gain
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
Supply Current
•
VOUT= ±12V, RLl!:10k!l
Vour = ± 10V, RLl!:2k!1
VCM= ± 13.5V
Vs= ±2.5Vto ±20V
RL = 10k!l
The • denotes the specifications which apply over the full operating tern·
perature range.
Note 1: Differential input voltages greater than 1V will cause excessive cur·
rent to flow through the input protection diodes unless limiting resistance
is used.
••
•
•
•
•
•
150
100
108
108
±13.5
±13
LT1012S8
TYP
20
30
0.2
MAX
200
270
1.8
UNITS
60
80
0.4
380
500
4
pA
pA
pAloC
±100
±150
0.5
±420
±550
5
pA
pA
pAloC
1500
pV/oC
V/mV
V/mV
dB
dB
V
V
SOO
130
128
±14
400
~V
~V
~
800
Note 2: These specifications apply for ± 2V s Vss ± 20V (± 2.5V s Vs s
± 20V over the temperature range) and -13.5V s VCM s 13.5V (for
Vs= ±15V).
Note 3: This parameter is tested on a sample basis only.
2-119
Ell
NOTES
2-120
tlntI\Q
TECHNOLOGr.~~-Q-u-a-d-pr-ec-i-sio-n-o-p-Am-p-(L-T-10-14-)
~""9·.
~,
LTl 01 3/LTlOl 4
Dual Precision Op Amp (LT1013)
FEATURES
DESCRIPTiOn
• Single Supply Operation
Input Voltage Range Extends to Ground
Output Swings to Ground while Sinking Current
• Pin Compatible to 1458 and 324 with Precision Specs
• Guaranteed Offset Voltage
150p.V Max.
• Guaranteed Low Drift
2p.V1°C Max.
• Guaranteed Offset Current
0.8nA Max.
• Guaranteed High Gain
SmA Load Current
1.5 Million Min.
17mA Load Current
0.8 Million Min.
• Guaranteed Low Supply Current
500p.A Max.
• Low Voltage NOise, 0.1 Hz to 10Hz
0.55p.Vp-p
• Low Current Noise-Better than OP-07, 0.07 pAl-v'RZ
The LT1014 is the first precision quad operational
amplifier which directly upgrades designs in the industry
standard 14-pin DIP LM324/LM348/0P-11 14156 pin
configuration. It is no longer necessary to compromise
specifications, while saving board space and cost, as
compared to single operational amplifiers.
The LT1014's low offset voltage of 50p.V, drift of 0.3p.V/oC,
offset current of 0.15nA, gain of 8 million, common-mode
rejection of 117dB, and power supply rejection of 120da
qualify it as four truly precision operational amplifiers. Particularly important is the low offset voltage, since no offset
null terminals are provided in the quad configuration.
Although supply current is only 350p.A per amplifier, a new
output stage design sources and sinks in excess of 20mA of
load current, while retaining high voltage gain.
Similarly, the LT1 013 is the first precision dual op amp in
the 8-pin industry standard configuration, upgrading the
performance of such popular devices as the MC14581
1558, LM158 and OP-221. The LT1013's specifications
are similar to (even somewhat better than) the LT1014's.
Both the LT1013 and LT1014 can be operated off a single
5V power supply: input common-mode range includes
ground; the output can also swing to within a few
millivolts of ground. Crossover distortion, so apparent on
previous single-supply designs, is eliminated. A full set
of specifications is provided with ± 15V and single 5V
supplies.
APPLICATions
• Battery-Powered Precision Instrumentation
Strain Gauge Signal Conditioners
Thermocouple Amplifiers
Instrumentation Amplifiers
.4mA-20mA Current Loop Transmitters
• Multiple Limit Threshold Detection
• Active Filters
• Multiple Gain Blocks
LT1 014 Distribution of Offset VoHage
3 Channel Thermocouple Thermometer
4k
1M
700
3k
VS=±15V
TA~25'C
600 425 LTl014s
+5V
1
OUTPUT A
10mV/'C
(1700 OP AMPS)
500 TESTEO FROM
THREE RUNS
400 J PACKAGE
,....
300
-
200
100
4k
USE TYPE K THERMOCOUPLES, ALL RESISTORS~l% FILM,
COLO JUNCTION COMPENSATION ACCURATE
TO ",l'CFROM O'C-6O'e
USE 4TH AMPLIFIER FOR OUTPUT C,
o
7
OUTPUT B
10mV/'C
r
~
r--
~
-300 -200 -100
0
100
200
INPUT OFFSET VOLTAGE (,V)
300
2-121
BI
LT1013/LT1014
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . .. :: 22V
Differential Input Voltage. . . . . . . . . . . . . . . . .. :: 30V
Input Voltage ........ Equal to Positive Supply Voltage
. . . . . . 5V Below Negative Supply Voltage
Output Short Circuit Duration ............. Indefinite
Operating Temperature Range
LT1013AM/LT1013MI
LT1014AM/LT1014M ......... -55°Ct0125°C
LT1013AC/1013C/1013D
LT1014AC/1014C/1014D ......... 0°Ct070° C
Storage Temperature Range
All Grades ................... -65°Cto 150°C
Lead Temperature (Soldering, 10 sec.) ........ 300°C
ORDER PART
NUMBER
LT1013AMH
LT1013MH
LT1013ACH
LT1013CH
4
v- (CASE)
METAL CAN H PACKAGE
TOP VIEW
LT1013AMJ8
LT1013MJ8
LT1013ACJ8
LT1013CJ8
LT1013CN8
LT1013DN8
HERMETIC DIP J8 PACKAGE
PLASTIC DIP, N8 PACKAGE
TOP VIEW
LT1014AMJ
LT1014MJ
LT1014ACJ
LT1014CJ
LT1014CN
LT1014DN
HERMETIC DIP J14 PACKAGE
PLASTIC DIP N14 PACKAGE
ELECTRICAL CHARACTERISTICS
Vs=
:I: 15V,
VCM=OV, TA=25°C unless otherwise noted
SYMBOL
PARAMETER
CONDITIONS
Vos
Input Offset Voltage
LT1013
LT1014
LT1013DNS/LT1014DN
los
Is
en
en
Long Term Input Offset Voltage
Stability
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
MIN
in
2-122
Input Noise Current Density
Input Resistance-Differential
Common-Mode
-
-
-
0.1Hz to 10Hz
fo=10Hz
fo=1000Hz
fo=10Hz
(Note 1)
-
100
-
LT1013AM
LT1013AC
LT1014AM
LT1014AC
TYP
40
50
-
0.4
0.15
12
0.55
24
22
0.07
400
5
LT1013M/LT1013C
LT1013DNB
LT1014M/LT1014C
LT1014DN
MAX
MIN
TYP
MAX
150
1S0
-
60
60
200
0.5
300
300
SOO
0.2
15
0.55
24
22
0.07
300
4
1.5
30
-
-
O.S
20
-
-
-
-
-
-
70
-
-
-
UNITS
p,V
p,V
p,V
p,V/Mo.
nA
nA
p,Vp·p
nVN}lz
nV/..JHz
pANHz
MO
GO
LT1013/LT1014
ELECTRICAL CHARACTERISTICS
Vs= :I: 15V, VCM=OV, TA=25°C unless otherwise noted
SYMBOL
PARAMETER
CONOITIONS
AVOL
large Signal Voltage Gain
Vo= ±10V, RL=2k
Vo= ± 10V, RL =6000
Input Voltage Range
CMRR
PSRR
VOUT
Is
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Channel Separation
Output Voltage Swing
Slew Rate
Supply Current
VCM = +13.5V, -15.0V
Vs=±2Vto ±18V
Vo= ±10V, RL=2k
RL =2k
Per Amplifier
lTlO13AM
lTlO13AC
lTlO14AM
lTl01 4AC
MIN
TYP
1.5
0.8
+13.5
-15.0
8.0
2.5
+13.8
-15.3
100
103
123
±13
0.2
117
120
140
±14
0.4
0.35
-
lT1013M/lT1013C
lT10130NB
lTl014M/lTlO14C
lTl0140N
MAX
-
-
0.50
MIN
TYP
1.2
0.5
+13.5
-15.0
97
100
120
±12.5
0.2
7.0
2.0
+13.8
-15.3
-
114
117
137
±14
0.4
0.35
-
-
UNITS
MAX
-
-
0.55
V/p.V
V/p.V
V
V
dB
dB
dB
V
V/p.S
mA
Nota 1: This parameter is guaranteed by design and is not tested.
Typical parameters are defined as the 60% yield of parameter distributions of individual amplifiers; i.e., out of 100 lTl014s (or 100
lT1013s) typically 240 op amps (or 120) will be better than the indicated specification.
ELECTRICAL CHARACTERISTICS
V{= +5V, Vs=ov, VOUT=1.4V, VCM=OV, TA=25°C unless otherwise noted
SYMBOL
PARAMETER
CONDITIONS
Vos
Input Offset Voltage
lTl013
LT1014
LT1013DN8/LT1014DN
los
18
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Input Voltage Range
AVOL
VOUT
Is
Output Voltage Swing
Supply Current
MIN
TYP
MAX
MIN
-
60
70
250
280
-
-
0.2
15
1.0
+3.8
-0.3
1.3
35
-
-
Vo=5mV to 4V, RL =5000
+3.5
0
Output Low, No Load
Output low, 6000 to Ground
Output Low, ISINK =lmA
Output High, No Load
Output High, 6000 to Ground
Per Amplifier
lTlO13M/lTl013C
lT10130N8
lTlO14M/lTl014C
lTlO140N
lTl01 3AM
lTlO13AC
lTlO14AM
lTlO14AC
-
4.0
3.4
-
-
15
5
220
4.4
4.0
0.31
-
-
-
+3.5
0
25
10
350
-
-
4.0
3.4
0.45
-
-
TYP
90
90
250
0.3
18
1.0
+3.8
-0.3
15
5
220
4.4
4.0
0.32
UNITS
MAX
450
450
950
2.0
50
25
10
350
-
-
0.50
p.V
p.V
p.V
nA
nA
V/p.V
V
V
mV
mV
mV
V
V
mA
2-123
LT1013/LT1014
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
Vas
los
Vs= :±:15V, VCM=OV,
CONDITIONS
•
•
Input Offset Voltage
Input Offset Voltage Orin
Input Offset Current
Vs= +5V, OV; Vo= +l.4V
- 55°C :sTA :sl00°C
VCM=O.1V, TA=125°C
VCM=OV, TA=125°C
(Note 2)
•
Vs= +5V, OV; Vo= +1.4V
Ie
Input Bias Current
AVOL
Large Signal Voltage
Gain
Common-Mode Rejection
Power Supply Rejection
Ratio
Output Voltage Swing
CMRR
PSRR
VOUT
Is
Supply Current
Per Amplifier
Vs= +5V, OV; Vo= +l.4V
Vo= ± 10V, RL =2k
VcM =+13.0V, -14.9V
Vs=±2Vto ±18V
RL =2k
Vs =+5V,OV;
RL = 6000 to Ground
Output Low
Output High
Vs= +5V, OV; Vo= +l.4V
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
Vos
••
••
•
•
•
•
••
••
los
Ie
Input Bias Currant
PSRR
VOUT
Is
-
80
300
-
90
350
-
110
550
-
450
450
900
2.0
2.5
6.0
30
0.5
80
120
250
0.4
0.3
0.6
15
20
2.0
80
-
480
480
960
2.0
2.8
7.0
30
90
-
-
0.4
90
150
300
0.4
0.3
0.7
15
25
2.0
-
0.25
100
200
400
0.5
0.4
0.9
18
28
2.0
750
",V
750
",V
1500
",V
",VloC
2.5
5.0
nA
nA
10.0
45
nA
120
nA
V/",V
-
97
100
114
117
-
96
100
114
117
-
94
97
113
116
-
dB
dB
±13.8
-
±13.8
-
±11.5 "±13.8
-
V
18
mV
V
0.7
0.65
rnA
-
±12
3.2
-
15
-
-
3.2
0.60
0.55
-
6
3.8
0.38
0.34
-
15
-
0.60
0.55
3.1
-
6
3.8
0.38
0.34
-
",V
rnA
TYP
MAX
MIN
TYP
55
240
350
-
65
-
-
-
380
2.0
-
75
0.3
-
-
1.0
98
0.2
0.4
13
18
5.0
116
-
1.0
98
85
0.3
0.2
0.4
13
20
5.0
116
101
119
-
101
119
-
-
The. denotes the specifications which apply over the full operating
temperature range.
LT1013C/LT1D13DN8
LT1 014C I LTl014DN UNITS
MAX MIN TYP
MAX
-
•
•
••
••
LT1014AC
MIN
-
Nota 2: This parameter is not 100% tested.
6
3.8
0.38
0.34
±12
LT1013AC
LT10130N8, LT10140N
Vs= +5V, OV; Vo=l.4V
LT1013DN8, LT1014DN
(Note 2)
LT1013DN, LT1014DN
Vs= +5V, OV; Vo=l.4V
Large Signal Voltage Gain Vo=±10V,RL=2k
Common-Mode Rejection VCM =+13.0V, -15.0V
Ratio
Power Supply Rejection Vs=±2Vto ±18V
RatiO
Output Voltage Swing
RL =2k
Vs= +5V, OV; RL =6000
Output Low
Output High
Supply Current per
Amplifier
Vs= +5V, OV; Vo=l.4V
2-124
LT1014AM
LT1013M/LT1014M
UNITS
MIN TYP
MAX MIN TYP
MAX
CONDITIONS
Vs= +5V, OV; Vo=l.4V
AVOL
CMRR
LT1013AM
MIN TYP
MAX
Vs= :±:15V, VCM=OV, O°C~TA~70°C unless otherwise noted
Input Offset Voltage
Average Input Offset
Voltage Drift
Input Offset Current
-55°C~TA~125°C unless otherwise noted
±12.5 ±13.9
3.3
-
6
3.9
0.36
0.32
-
2.0
-
1.5
3.5
25
55
-
-
-
-
-
±12.5 ±13.9
-
13
3.3
0.55
0.50
-
6
3.9
0.36
0.32
270
-
-
0.7
94
80
230
110
280
0.4
0.7
0.3
0.5
16
24
4.0
113
p.V
400
p.V
1000
570
",V
p.V
1200
2.5 ",VI DC
p.V/DC
5.0
nA
2.8
6.0
nA
nA
38
nA
90
Vlp.V
dB
-
-
97
116
-
dB
±12.0 ±13.9
-
V
13
mV
V
rnA
rnA
-
1.7
4.0
25
60
-
-
-
-
-
13
3.2
0.55
0.50
-
6
3.9
0.37
0.34
-
0.60
0.55
LT1013/LT1014
TYPICAL PERFORmAnCE CHARACTERISTICS
Offset Voltage Drift with
Temperature of Representative
Units
Offset Voltage vs Balanced
Source Resistance
Warm-Up Drift
Vs= .,15V
TA=25°C
Vs= ±15V
200
:!
100
w
'"
~
- --- - -
:;;-
.s
w
'"
~
I::::::::
~
~
ito
....
~ -100
:;;
-200
-50 -25
0
25
50
75
TEMPERATURE (0G)
..........
..........
r-.....
100
1.0
~
LT1013 METAL CAN (H) PACKAGE
~
it
Y
0
~
>- 0.1
~
:;;
125
Common-Mode Rejection Ratio
vs Frequency
120
Power Supply Rejection Ratio
vs Frequency
0
0
z
~
''""
1
2
3
4
TIME AFTER POWER ON (MINUTES)
TA=25°C
Vs=±2VTO ±18V
BO
;::
.II,
&l
Ul 60
~
40
=>
en
a:
~I
,JJ II\.
"
"
,
~ P'C
40
~ 20
20
~
<.)
OL--'-_~_l-.....J._~_l-.--'
0
10
100
lk
10k
FREQUENCY (Hz)
lOOk
0.1
1M
10
100 lk 10k
FREQUENCY (Hz)
lOOk
Supply Current vs Temperature
160 r--r--+-IIII-+-+-
I-+--+IIII--j---'r-+--+--+--+---l
I-+-+III--j----..,r-+--+--+--+---l
120
100 r-+--+IIIt--t-:r---r--+-+--+-l
CURRENT NOISE
460
:!ffi 420
160 r--r--+-IIIII-+-+140
u:
~ 380
z
g§
60
=>
<.)
,(.~
40
8: 300
lit tOrm
20
VOLTAGE NOISE
iIIl
10
1
10
100
FREQUENCY (Hz)
lk
Vs= .,15V
IE>-
60
~
340
,/
~
iil
o
10
20
30
40
50
VOLTAGE NOISE DENSITY (nV/,jHi)
10
6
TIME (SECONDS)
200 r--T"""-r-r--r-,-;-;---C;";::7"---r-,
TA-25°C
Vs .,2VTO .,16V
""
4
1M
10Hz Voltage Noise
Distribution
Noise Spectrum
1000
.,
~.~
a:
0
0
1
0
60
Ul
a:
'"Z
o
LT l013 CERr (J) PAiKAGE
~100r--+-~-r--t~~-r--1
~
~
z 60
a:
V
LT1014
O.lHz to 10Hz Noise
F=~:-r----'-I---'
i%>
i!'l
0
o
3k 10k 30k lOOk 300k 1M 3M 10M
BALANCED SOURCE RESISTANCE (II)
~ 100 f--+---"Io~-+----I---I
1
/
60
V
260
/'
-50 -25
..-r-
Vs=5V,OV
.......
~
--- --
0
25
50
75
TEMPERATURE (0G)
100
125
2-125
LT1013/LT1014
TYPICAL PERFORmAnCE CHARACTERISTICS
Input Bias Current vs
Common-Mode VoRage
Input Offset Current vs
Temperature
15
TA-25°C
10
VCM=OV
:[ 0.8
tli ~
i:§ §
o
Vs=5V,OV
~
~
~
8'"
'"
-10'~
'"'"o
-5
--- -
-10 -15 -20 -25
INPUT BIAS CURRENT (nA)
-15
-30
~
>- -20
0.6
/
<.>
~ 0.4
o
~
'" 0.2
~""'"
V
Vr5V~ ,/,,~
~~
V
ia -15
~
-50 -25
Output Saturation vs Sink
Current vs Temperature
10
VCM-OV
-25
:>
1\
-5
-H
-30
1,0
~
~
1\
f-'"'''~'
~
Input Bias Current vs
Temperature
0255075
TEMPERATURE (OC)
100
125
o
-50
-25
0255075
TEMPERATURE (OC)
100
125
Large Signal Transient
Response, Vs= :l:15V
Small Signal Transient
Response, Vs= :l:15V
V+-5VT03OV
V
OV
I SINK 10mA
;;-
ii 1.0
t'!i
ISINK 5mA
~
is
~
r-
ISINK-lmA
~ 0.1
ISINK 10011A
ISINK 1011A
en
AV=+1
2pS/DIV
AV=+1
50pS/DIV
ISINK-O
0.01
-50 -25
0
25
50
75
TEMPERATURE (OC)
100
125
Large Signal Transient
Response, Vs = 5V, OV
Small Signal Transient
Response, Vs=5V, OV
Large Signal Transient
Response, Vs = 5V, OV
4V-
4V-
2V-
2V-
100mV
50mV-
ov-
ov-
0Av=+1
RL =JlOOII TO GROUND
INPUT =OV TO l00mV PULSE
2-126
20pS/DIV
Av=+1
RL =4.71< 10 5V
INPUT =OV TO 4V PULSE
10pS/DIV
Av=+1
NO LOAD
INPUT =OV TO 4V PULSE
10pS/DiV
LT1013/LT1014
TYPICAL PERFORmAnCE CHARACTERISTICS
Output Short Circuit Current
vs Time
40
I--
30
55'C
25'C
-~
~ ~
-=>
20
12~'C
~
10
'"
Voltage Gain vs Load
Resistance
5", S
~
z
IX'
if!
t:
:i!
-10
U
I-
~ ~
V5~
en
-30
1M
r-
2~'C
~
/I
100k
100
o
1
2
3
TIME FROM OUTPUT SHORT TO GROUNO (MINUTES)
I
~ ~r..
'\ ~
0.3
12S"C,Vs_5V,rN
,'"
5V
100
'"
:s
80
z
:;;:
'" 60
~
~
~
-
,
VS=5V.~
r--
TA=25'C
Cl =100pF
~S=±15V
40
~
20
Vo=20mVT035V
WITHVs=5V,rN
10k
-200.01 0.1
1
1\
-
\\.
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
160 ,---.,---,---r--..,.----,
120 ~
140 1""""iC----F'_---f"<:-
il';
±15V
140 ~
160
.~\ \
~
0.1
TA=2S"C, Vs=5V,rN
~
120
Channel Separation vs
Frequency
80
TA=25'C
VCM=OV
Cl=10OpF 100
!II
: ~lAsE
,
W15V
5V.~
-10
IL
1k
LOAO RESISTANCE TO GROUNO (0)
Gain T Phase vs Frequency
-
:i:15V
Vo=±lOVWITHVs=*15V
III
V '"""'
-®
GAIN"
TA 125"C,VS
I
-55'C
20
:t:15V
TA
125'C
-20
140
/I.. _155.J v(-!,J, W
=>
<.>
=>
.,
we,vs
T.
1-0
U)
Voltage Gain vs Frequency
10M
Vs- ±15V
'"
:!i
~
180 §5
ffi
200 -
...........
1
FREQUENCY (MHz)
10
60 ' - - - - ' - - - ' - - - ' - - - - - ' - - - - - '
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
APPLICATions InFORmATion
Single Supply Operation
The LT1013/1014 are fully specified for single supply
operation, i.e., when the negative supply is OV. Input
common-mode range includes ground; the output swings
within afew millivolts of ground. Single supply operation,
however, can create special difficulties, both at the input
and atthe output. The LT1013/LT1014 have specific circuitry which addresses these problems.
At the input, the driving signal can fall below OV-inadvertently or on a transient basis. If the input is more than
a few hundred millivolts below ground, two distinct problems can occur on previous single supply deSigns, such
as the LM124, LM158, OP-20, OP-21 , OP-220, OP-221,
OP-420:
a) When the input is more than a diode drop below
ground, unlimited current will flow from the substrate
(V- terminal) to the input. This can destroy the unit. On
the LT1013/1014, the 4000 resistors, in series with the
input (see schematic diagram), protect the devices even
when the input is 5V below ground.
2-127
BII
LT1013/LT1014
APPLICATions InFoRmATion
(b) When the input is more than 400mV below ground
(at 25°C), the input stage saturates (transistors 03 and
04) and phase reversal occurs at the output. This can
cause lock-up in servo systems. Due to a unique phase
reversal protection circuitry (021,022,027,028), the
LT1013/1014's outputs do not reverse, as illustrated
below, even when the inputs are at -1.5V.
At the output, the aforementioned single supply designs
either cannot swing to within 600mV of ground (OP-20)
or cannot sink more than a few microamperes while
swinging to ground (LM124, LM158). The LT10131
1014's ali-NPN output stage maintains its low output
resistance and high gain characteristics until the output
is saturated.
There is one Circumstance, however, under which the
phase reversal protection circuitry does not function:
when the other op amp on the LT1013, or one specific
amplifier of the other three on the LT1 014, is driven hard
into negative saturation at the output.
In dual supply operations, the output stage is crossover
distortion-free.
Phase reversal protection does not work on amplifier:
A when D's output is in negative saturation. 8's and C's
outputs have no effect.
8 when C's output is in negative saturation. A's and D's
outputs have no effect.
Cwhen 8's output is in negative saturation. A's and D's
outputs have no effect.
Dwhen A's output is in negative saturation. 8's and C's
outputs have no effect.
Comparator Applications
The single supply operation of the LT1013/1014 lends
itself to its use as a precision comparator with TTL compatible output:
In systems using both op amps and comparators, the
LT1013/1014 can perform multiple duties; for example,
on the LT1014, two of devices can be used as op amps
and the other two as comparators.
Voltage Follower with Input Exceeding the Negative Common-Mode Range'
4V
4V
2V
2V
OV
OV
6Vp·p INPUT, -1.SV TO 4.SV
LM324, LM3S8, OP·20
EXHIBIT OUTPUT PHASE
REVERSAL
LT1013/LT1014
NO PHASE REVERSAL
Comparator Rise Response Time
10mV, 5mV, 2mV Overdrives
Comparator Fall Response Time
to 10mV, 5mV, 2mV Overdrives
!
100
~
:;;
Vs=SV,OV
2-128
SO/AS/DIV
Vs=SV,OV
SO/AS/OIV
LT1013/LT1014
APPLICATions InFoRmATion
Low Supply Operation
The minimum supply voltage for proper operation of the
LT1013/1014 is 3.4V (three Ni-Cad batteries). Typical
supply current at this voltage is 290pA, therefore power
dissipation is only one milliwatt per amplifier.
Test Circuit for Offset Voltage and
Offset Drift with Temperature
5Ok'
+15V
1000'
Noise Testing
501<'
For application information on noise testing and calculations, please see the LT1007 or LT1008 data sheet.
-15V
.".
'RESISTORS MUST HAVE LOW
THERMOELECTRIC POTENTIAL.
"THIS CIRCUIT IS ALSO USEO AS THE BURN·IN
CONFIGURATION. WITH SUPPLY VOLTAGES
INCREASEO TO '" 2OV.
Vo=1000Vos
TYPICAL APPLICATiOnS
50MHz Thermal rms to DC Converter
5V Single Supply Dual Instrumentation Amplifier
R1
2% ACCURACY. OC-50MHz.
100:1 CREST FACTOR CAPABILITY.
'0.1% RESISTOR.
TH2=YELLOW SPRINGS INST. CO. THERMISTOR COMPOSITE #44018.
ENCLOSE T1 ANO T21N STYROFOAM.
7.5niN OISSIPATION.
OFFSET=1SO.V
GAIN=M+1.
CMRR=120 dB.
COMMON·MOOE RANGE IS OV TO 5V.
2-129
LT1013/LT1014
TYPICAL APPLICATions
Hot Wire Anemometer
270
1W
OV-1OV=
0-1000 FEET/MINUTE
#328
REMOVE LAMP'S GLASS ENVELOPE FROM 328 LAMP.
A1 SERVOS '328 LAMP TO CONSTANT TEMPERATURE.
A2-A3 FURNISH LINEAR OUTPUT \IS FLOW RATE.
'1% RESISTOR.
Liquid Flowmeter
3.2k~
r
+
4.7k
OUTPUT
0-300ML/MIN
T1
150 HEATER RESISTOR
T2
FLOW-~"I'/I/~-FLOW
PIPE
2-130
0
0
'1% FILM RESISTOR.
"SUPPLIED WITH YSI THERMISTOR NETWORK.
T1, T2 YSI THERMISTOR NETWORK = #44201.
FLOW IN PIPE IS INVERSELY PROPORTIONAL TO
RESISTANCE OF T1-T2 TEMPERATURE DIFFERENCE.
A1-A2 PROVIDE GAIN. A3-A4 PROVIDE LINEARIZED
FREQUENCY OUTPUT.
LT1013/LT1014
TYPICAL APPLICATions
5V Powered Precision Instrumentation Amplifier
TO
INPUT
CABLE SHIELDS
10k'
20k
- INPUT~"""""'-""'--+::'(!
10k
10k'
+5V
OUTPUT
10k
10k'
+
10k'
20k
INPUT-"I,.,.,.....-+----''"!*
+5V
'1% FILM RESISTOR. MATCH 10k's 0.05%
GAIN EQUATION: A= 4'800 + 1.
tFOR HIGH SOURCE IMPEDANCES,
USE 2N2222 AS DIODES.
9V Battery Powered Strain Gage Signal Conditioner
TO AID
SAMPLED OPERATION GIVES LOW AVERAGE OPERATING CURRENT = 650.,A.
4.7k-0.Q1¢' RC PROTECTS STRAIN BRIDGE FROM LONG TERM DRIFTS DUE TO
HIGH AV!AT STEPS.
2-131
LT1013/LT1014
TYPICAL APPLICATions
5V Powered Motor Speed Controller
No Tachometer Required
330k
1N4001
MOTOR = CANON -FN30- R13N1B.
A1 DUTY CYCLE MODULATES MOTOR.
A2 SAMPLES MOTORS BACK EMF.
5V Powered EEPROM Pulse Generator
1N4148
1N4148
1N4148
10011
4.7M
21V
MEETS ALL Vpp PROGRAMMING SPECS WITH NO TRIMS AND
RUNS OFF 5V SUPPLY-NO EXTERNAL HIGH VOLTAGE SUPPLY REQUIRED.
SUITABLE FOR BATIERY POWERED USE (600pA QUIESCENT CURRENT).
'1% METAL FILM.
2-132
LI
600,," RC
LT1013/LT1014
TYPICAL APPLICATions
Methane Concentration Detector with Linearized Output
"1 % METAL FILM RESISTOR.
SENSOR=CALECTRO-GC ELECTRONICS #J4-807 OR FIGARO #813.
LT1004
1.2V
1N4148 (4)
CD4016
100k"
EI
2.7k
-5V
1N4148
OUTPUT
500ppm-10,OOOppm
50Hz-1kHz
2k
2k
150k"
12k"
Low Power 9V to 5V Converter
~~----------~---~~
390k
1%
~100i::
200 "-
I
220
-1 CL=300P!\"'l CL = 10pF
-10
1
10
30
FREQUENCY (MHz)
~ ~
e.
160 Ii:
:;:
p~Ask
\
100
140
[\1
Vs=",15
f-Tr250C
~ 40
Sl ;;:
CL=10pF
1\
80
120- ~
J
1\
i\..
20
~
co
~~
~A=-55~C
TA=125°C
40
Phase Margin, Gain Bandwidth
Product, Slew Rate vs
Temperature
240
100
~
60
a:
ffi
e.
'"
.....,;
r---...
r-
,
~
~
SLEW
F
i--
12 ~
~
...
11 t;
:::>
10~
1
9
:>::
7
~
E;
8 ~
~W(f=lMHz)
6 co
~
~
TA=25°C
5~-W~~~~~~~
~
18
'"z
~ O~~--~~--~
r
co
~
~
5-5~~~~-+~~-+~
r\..
AV= + 1, GL = l00pF, 0_2"s/DlV
TA=25°C, Vs= ±15V
........
o
lOOk
1M
FREQUENCY (Hz)
10M
5o
-10 '---,-.J..lJ.....1..-1I.._.l...-L...L.--I
1
2
o
SmLlNG TIME ("s)
The typical behavior of many LT1 022 parameters is identical to the LT1 056, Please refer to the LT1 055/ 1056 data sheet
for the following typical performance characteristics:
Input Bias and Offset Currents vs Temperature
Input Bias Current Over the Common-Mode Range
Distribution of Input Offset Yoltage (H and N8 Package)
Distribution of Offset Voltage Drift with Temperature
warm-Up Drift
Long Term Drift of Representative Units
O.1Hz to 10Hz Noise
Yoitage Noise vs Frequency
Noise vs Chip Temperature
2-148
Output Impedance vs Frequency
Common-Mode Range vs Temperature
Common-Mode and Power Supply Rejections vs
Temperature
Common-Mode Rejection Ratio vs Frequency
Power Supply Rejection Ratio vs Frequency
Voltage Gain vs Temperature
Supply Current vs Supply Yoltage
Output Swing vs Load Resistance
Short Circuit Current vs Time
LT1022
APPliCATions InFoRmATion
The LT1 056 applications information is directly applicable
to the LT1022. Please consult the LT1055/1056 data
sheet for details on:
(1) plug-in compatibility to industry standard devices
(2) offset nulling
(3) achieving picoampere/microvolt performance
(4) phase-reversal protection
(5) high speed operation (including settling time test
circuit)
(6) noise performance
(7) simplified circuit schematic.
TYPICAL APPLICATiOnS
Fast Piezoelectric Accelerometer
1pF-5pF
ENDEVCO #2215
ACCELEROMETER
OUTPUT
10Hz to 1MHz Voltage-to-Frequency Converter
100pF
(POLYSTYRENE)
1.8k
+ 15V --Jt,JVII-~-....,
..-+---+15V
1.8k
10k
+---1-TTL OUTPUT
4.7k
1.8k
1k
1.8k
1k
-15V
+15V
-+I- =1N4148
2-149
LT1022
TYPICAL APPLICATions
PIN Photodiode-to-Frequency Converter
5pF
FULL-SCALE TRIM
+15V
47pF,t
1.8k
........---+15V
1.8k
10k
1.8k
lOOk
-15V
3.3M
10k
DARK
CURRENT
TRIM
1.8k
+15V
-15V
SCALE FACTOR =
lnW/Hz AT 900 NANOMETERS FROM 20nW TO 2mW
~*
= HEWLm PACKARD PHOTODIODE HP5082-4204
-+i-=lN4148
tPOLYSTYRENE
'SELECT VALUE FOR 2mW IN = 2MHz OUT.
Wide Bandwidth Absolute Value Circuit
10k'
10k'
10pF
Fast, Differential Input Current Source
10k'
10pF
R'
10pF
R'
IOUT= VIN2- VINl
R
lN4148
10k'
~~~J"">M""-"+I
R'
lOUT
L - -_ _ _.......___
lN4148
10k'
2-150
'0.1%
1% ACCURACY TO 300kHz
5% ACCURACY TO 700kHz
RL
~_
'MATCH TO 0.01 %
FULL-SCALE POWER BANDWIDTH
=lMHz FOR IOUTR=8Vp-p
= 400kHz FOR I ourA = 20Vp-p
MAXIMUM IOUT=10mAp-p
COMMON-MODE VOLTAGE AT LT1022 INPUT = I OUTp-p x RL
2
LT1022
TYPICAL APPLICATions
High Output Current Op Amp
Low Distortion Sine wave Oscillator
10k
43011
SLEW RATE = 26V I ,..
lour=150mA
CLCAN BE 1""
Ay= +1, CF=1000pf
Ay= -1, CF=10pf
0.033""t
·1% FILM
10k DUAL POTENTIOMETER MATCH TRACKING TO 0.1 %
tMATCH CAPACITORS TO 0.1%
5kHz TO 50kHz RANGE
DISTORTION < 0.1 %
AMPLITUDE = lSVp-p.
Fast, Precision Sample-Hold
INPUT
----=:;;:::..::..:;;.;..---.--.
+ 1 5 V - - - - - -....
OUTPUT
10k
16ns APERTURE TIME
2,.s ACQUISITION TIME TO 0.01%
SAMPLE-HOLD OFFSET < 25O~V
HOLD SETTLING < lOOns
3.5k
2-151
LT1022
PACKAGE DESCRIPTiOn
Dimensions in inches (millimeters) unless otherwise noted.
H Package
Metal Can
NB Package
B Lead Plastic
..!!:!!!.
(0.1271
MIN
D.11O!D.14'
-JJjt 02.6831
(3.,7'r"
~
(D.mrYi,'''1
(~:~~I
~
TVP
(D.356,y,!'.584)
"LEADS WITHIN 0.007 OF TRUE POSITION (TP) AT GAUGE PLANE
2~152
~"""'-LTEClnHNfJ\OI..J0G-~~~_____LT_10_24
....A."
Dual, Matched
IT
Picoampere, Microvolt Input
Low Noise Op Amp
DESCRIPTiOn
FEATURES
• Guaranteed Offset Voltage
SOp,V Max.
• Guaranteed Bias Current
2SoC
120pA Max.
- SsoC to 12SoC
700pA Max.
• Guaranteed Drift
1.Sp,V1°C Max.
• LowNoise,0.1Hzt010Hz
O.Sp,Vp-p
• Guaranteed Supply Current
600p,A Max.
• GuaranteedCMRR
112dBMin.
• GuaranteedPSRR
112dBMin.
• Guaranteed Voltage Gain with SmA Load Current
• Guaranteed Matching Characteristics
The LT1024 dual, matched internally compensated universal precision operational amplifier can be used in practically all precision applications requiring multiple op
amps. The LT1024 combines picoampere bias currents
(which are maintained over the full -SsoC to 12SoC
temperature range), microvolt offset voltage (and low
drift with time and temperature), low voltage and current
noise, and low power dissipation. Extremely high common-mode and power supply rejection ratiOS, practically
immeasurable warm-up drift, and the ability to deliver
SmA load current with avoltage gain of a million round out
the LT1024's superb precision specifications.
APPLICATions
Tight matching is guaranteed on offset voltage, noninverting bias currents and common-mode and power
supply rejections.
•
•
•
•
•
•
•
•
Strain Gauge Signal Conditioner
Dual Limit Precision Threshold Detection
Charge Integrators
Wide Dynamic Range Logarithmic Amplifiers
Light Meters
Low Frequency Active Filters
Standard Cell Buffers
Thermocouple Amplifiers
The all-around excellence of the LT1 024 eliminates the
necessity of the time-consuming error analysis procedure
of precision system design in many dual applications; the
LT1 024 can be stocked as the universal dual op amp in
the 14-pin DIP configuration.
For a single op amp with similar specifications, see the
LT1 012 data sheet; for a single supply dual precision op
amp in the 8-pin configuration, see the LT1013 data
sheet.
Input Bias Current vs
Temperature
Two Op Amp Instrumentation Amplifier
R5
2.2kt
Rl
lOOk"
R4
lOOk
100
R2
10k
50
....
15
~
r----...
I
0
~ -50
,,-
~
ill:
(*+1) +R2~R31
"TRIM FOR COMMON-MODE REJECTION
tTRIM FOR GAIN
-
I -....j."
,
OVER CANCELLED UNIT'
G
GAIN=I [1 +~
UNDERCANCELLED UNIT
......
TYPICAL PERFORMANCE:
OFFSET VDLTAGE=20~V
BIAS CURRENT = ± 30pA
OFFSET CURRENT =30pA
~
""
-100
=100
.......
.~
-lSO
-so
-25
0
25
50
TEMPERATURE ('C)
75
100
125
2-153
2
LT1024
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
SupplyVoltage ......................... ± 20V
Differentiallnput Current (Note 1) .......... ± 10mA
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . .. ± 20V
Output Short Circuit Duration ............. Indefinite
Operating Temperature Range
LT1024AM/LT1024M ......... -55°Cto 125°C
LT1024AC/LT1024C .............. O°Ct070°C
Storage Temperature Range
All Devices .................. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ........ 300°C
TOP VIEW
ORDER PART
NUMBER
DPACKAGE
LT1024AMD
LT1024MD
LT1024ACN
LT1024CN
NPACKAGE
14 PIN HERMETIC
14 PIN PLASTIC
(SIDEBRAZED)
NOTE: OEVICE MAY BE OPERATED EVEN IF INSERTION
IS REVERSED;.THIS IS DUE TO INHERENT SYMMETRY OF
PIN LOCATIONS OF AMPLIFIERS AAND B(NOTE 2).
ELECTRICAL CHARACTERISTICS
Vs= ±15V, VCM=OV, TA=25°C unless otherwise noted
Individual Amplifiers
SYMBOL
los
IB
en
en
PARAMETER
Input Offset Voltage
Long Term Input Offset Voltage Stability
Input Offset Current
Input Bias Current
Input NOise Voltage
Input Noise Voltage Density
in
AVOL
Input NOise Current Density
Large Signal Voltage Gain
CMRR
PSRR
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
Slew Rate
Supply Current per Amplifier
vos
VOUT
Is
CONDITIONS
0.1Hz to 10Hz
fo = 10Hz (Note 3)
fo= 1000Hz (Note 3)
fo=10Hz
VOUT= ± 12V, RL;,,: 10kO
VOUT= ±10V, RL;,,:2kO
VCM = ±13.5V
Vs=±2Vto ±20V
RL = 10kO
LTl 024AM I LTl 024AC
MIN
TYP
MAX
15
50
0.3
20
100
±25
±120
0.5
17
33
14
24
20
250
2000
150
1000
112
.132
112
132
±13.5 ±14.0
±13
±14
0.1
0.2
380
600
LTl 024M I LTl 024C
MIN
TYP
MAX
100
20
0.3
25
180
±30
±200
0.5
17
33
14
24
20
180
2000
100
1000
108
132
108
132
±13.5 ±14.0
±13
±14
0.2
0.1
700
380
LTlO24AM/LT1024AC
MIN
TYP
MAX
20
75
±30
±150
LT1 024M 1lT1 024C
TYP
MAX
MIN
25
150
- ±40 ±250
-
UNITS
/LV
/LV/month
pA
pA
/LVp-p
nV/v'RZ
nV/v'RZ
fA/v'RZ
V/mV
V/mV
dB
dB
V
V
V/p.S
p.A
Matching Specifications
SYMBOL
IB+
los +
LlCMRR
LlPSRR
2-154
PARAMETER
Input Offset Voltage Match
Average Non-Inverting Bias
Current
Non-Inverting Offset Current
Common Mode Rejection Ratio
Match
Power Supply Rejection Ratio
Match
Channel Separation
CONDITIONS
-
UNITS
/LV
pA
-
-
106
30
132
300
110
30
132
150
VCM=±13.5V
-
pA
dB
Vs= ±2Vto 20V
110
132
-
106
132
-
dB
fs 10Hz (Note 3)
134
150
-
134
150
-
dB
LT1024
ELECTRICAL CHARACTERISTICS
Vs = ± 15V, VCM =ov, O°C STAS70°C for the LT1024AC and LT1024C;
-55°C STAS 125°C for the LT1024AM and LT1024M unless otherwise noted
Individual Amplifiers
SYMBOL
Vas
PARAMETER
Input Offset Voltage
los
Average Temperature Coefficient 01
Input Offset Voltage
Input Offset Current
18
Average Temperature Coefficient of
Input Offset Current
Input Bias Current
AVOL
Average Temperature Coefficient of
Input Bias Current
Large Signal Voltage Gain
CMRR
PSRR
VOUT
Is
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
Supply Current
CONDITIONS
DoC to 70°C
- 55°C to 125°C
DoC to 70°C
- 55°C to 125°C
DoC to 70°C
- 55°C to 125°C
DoC to 70°C
- 55°C to 125°C
VOUT= ± 12V. RL2: 10kll
VOUT= ± 10V. RL2: 2kD
VCM=±13.5V
Vs=±2.5Vto ±18V
RL = 10kD
••
•
•
•
•
••
••
••
•
LTlO24AM/LTlO24AC
MIN
TYP
MAX
120
30
40
200
0.25
1.5
LTlO24M/LT1024C
TYP
MAX
MIN
200
35
50
300
0.3
2.0
I'V/oC
40
80
0.5
250
350
2.5
50
100
0.7
pA
pA
pA/oC
±40
±100
±250
± 700
±50
±200
150
100
108
108
•
• ±13.5
• ±13'
•
0.4
1
1000
600
128
128
±14
400
3
6
0.5
2
1000
600
128
128
800
150
100
106
106
± 13.5
±13
±14
400
UNITS
I'V
I'V
300
500
3
±400
±1300
pA
pA
pA/oC
pA/oC
4
12
V/mV
V/mV
dB
dB
V
V
)lA
900
Matching Specifications
SYMBOL
18+
PARAMETER
Input Offset Voltage Match
Input Offset Voltage Tracking
Average Non-Inverting Bias Current
los+
Non-Inverting Offset Current
ACMRR
APSRR
Common-Mode Rejection Ratio Match
Power Supply Rejection Ratio Match
CONDITIONS
DoC to 70°C
- 55°C to 125°C
O°C to 70°C
- 55°C to 125°C
O°C to 70°C
-55°C to 125°C
VCM=±13.5V
Vs= ± 2.5V to ± 18V
The. denotes the specifications which apply over the full operating
temperature range.
Note 1: Differential input voltages greater than 1V will cause excessive
current to flow through the Input protection diodes unless limiting
resistance is used.
Note 2: The V+ supply terminals are completely independent and may
be powered by separate supplies if desired (this approach, however,
would sacrifice the advantages of the power supply rejection ratio
matching). The V- supply terminals are both connected to the common
substrate and must be tied to the same voltage. Both V- pins should be
used.
Note 3: This parameter is tested on a sample basis only.
LTl D24AM I LTl D24AC
MIN
TYP
MAX
••
•
••
••
•
•
106
106
35
50
0.3
±40
±100
40
80
128
128
170
280
2.0
±300
±800
300
800
-
-
LT1 D24M I LTl 024C
MIN
TYP
MAX
45
300
70
500
0.4
3.5
±50
±500
±200 ±1400
50
500
150
1500
104
128
104
128
UNITS
I'V
I'V
I'V/oC
pA
pA
pA
pA
dB
dB
Optional Offset Nulling Circuit
v+
OUTPUT
V-
INPUT OFFSET VOLTAGE CAN BE ADJUSTED
OVER A ± 600~V RANGE WITH A5k TO
lOOk POTENTIOMETER.
2-155
LT1024
TYPICAL PERFORmAnCE CHARACTERISTICS
Offset Voltage vs Source
Resistance (Balanced or
Unbalanced)
1000
~Vs
,
w
~
g
~
o
~
~
100
WC TO 125°C
V
,.,.,
-25°C
~
~
t;:;
It
10
0
>-
:!5
30
~
20
:--....
......... r---
lk
3k
10k 30k lOOk 300k 1M
SOURCE RESISTANCE (0)
3M 10M
/
.......
diN cM=kx 101~
i'
I
I
V
DEVICE WITr NEGA~IVE INPUT CURRENT
~
-40
10
-60
-~
0
~
60
~
TEMPERATURE (0C)
100
1~
-60
-15
Offset Voltage Drift and
Tracking with Temperature of
Representative Units
Warm-Up Drift
I I
DEVICE WI~H POSITIVE INPUT CURRENT
__
J
/
o
1
40
40
~
:!5
Vs= ±15V
TA=25°C
vJ=±lL
f--VCM=OV
50
~
~
I
60
60
±15V
/
:3,
Input Bias Current Over
Common-Mode Range
Input Offset Current vs
Temperature
~.
I,
':'
--
VCM
-10
-5
0
5
10
COMMON-MODE INPUT VOLTAGE (V)
15
Supply Current vs Supply
Voltage per Amplifier
500
Vs= ± 15V
TA=25°C
25°C
125°C
/'
o
V
o
-r
(j) INDIVIDUAL AMPLIFIERS
-40
® TRACKING (MATCH DRIFT)
1
2
3
-60 ~~_-L_~~_-L_~~
-50 -25' 0
25
50
75
100 125
TEMPERATURE (0C)
4
TIME AFTER POWER ON (MINUTES)
O.lHz to 10Hz Noise
~I--+--+--+--+-----j
~
l/f~~JJR
g
~zr--~--+--~-+--+
±20
~
1
AT
IIIII12°lz I
10
100
FREQUENCY (Hz)
AT 1kHz
Rs==:!fI
+
I
I
/
~
r----t AT 10Hz
llf CORNER
III
AT10H:~
R
-,
VOLTAGE NOISE
2.5Hz
1
2-156
=
-
~ CURRENT NOISE
1';
10
~~
11111111
~ r--~L-~~l-~-+--+
±10
±15
SUPPLY VOLTAGE (V)
TA 25°C
Vs ±2VTO ±20V
TA 25°C
Vs±2 TO ±20V
III
~
±5
10.0
1000
~r--~-.-+--~-+-~
o
Total Noise vs Source
Resistance
Noise Spectrum
TA=25°C
Vs±2VTO ±2OV
4
6
TIME (SECONDS)
300
lkH~ESISTOR NOISE- f--ONLY
0.01
1000
102
103
10 4
10 5
106
10 7
SOURCE RESISTANCE (0)
108
LT1024
TYPICAL PERFORmAnCE CHARACTERISTICS
Power Supply Rejection vs
Frequency
Common-Mode Rejection and
CMRR Match vs Frequency
140
~ 120
-----
~
~loo
i
i§
80
~ 60
!
o
::;;
140
I
~
2
MATC~
~ \."
~MRR)-
,
10
100
lk
10k
FREQUENCY (Hz)
lOOk
40
1M
Voltage Gain vs Frequency
140
120
100
iii
:S80
~
~
~
0
---
t\.
!
r\.
~
r'\
-20
0.01 0.1
1
AV= + 1, CLOAO=l00pF, SpSec/DlV
~ 110 1-++ttH-ttt-++tttttI+-+-N!ItII<;-++tttttH
Rs='ll"k ~
100 1-++ttH-ttt-++tttttllI--'t-ttttttfl'l""~.rttHtI
z
5
"
100
lk 10k
FREQUENCY (Hz)
lOOk
90 1-+-tttttttt--++tI+tttt-t-+IIttttttt--t-i"t.I'ffiIl
L...LLJJJ.lllL~LLLllJII
lk
10k
lOOk
80
100
1M
20
'\
~
10M
f3
w
z
t;:
a' 1M
«
e. co
w
1\
:;:
~~ASE MARGIN
3M
cc
140fB
Gri
10
I=vs : lSV
r=Vo :10V
120
I\JH)s~
-
160~
\
..:
'"
if
/
IIIIIII
0.1
1
FREQUENCY (MHz)
Small Signal TranSient
Response
AV= + 1, CLOAO=100OpF, 5,.sec/DIV
10
v.-
-SS·C
2S·C
i""
i-
12S·C
~
0
>
180
300k
200
lOOk
I
I
1'-.,
-10
0.01
1M
Voltage Gain vs Load
Resistance
TA=2S·C
Vs= tlSV
i\
LllL....W..l..l
FREQUENCY (Hz)
1111 =70·
10 100 lK 10k lOOk 1M 10M
FREQUENCY (Hz)
Small Signal Transient
Response
NEGATIVE
SUPPLY
100
"\.
20
10
~ ~IJ~oJ
I.....
130
~ 120 1-++tfH-ttt-++tttttI:Md'~tHttlt--l-tttll\ll
1\
0.1
z
'\.
40
>
i
40
30
'\.
60
II~s=l~m
Gain, Phase Shift vs Frequency
~s=~lSJ
TA=2S·C·-
~
POSITIVE
SUPPLY
~
20
160 r-r'Tl"T1mTr-n-mm,--,-..,.".rmr-rrTTTml
1111111
lS0
~ Rs~lilJn
1,~A=,2S·C
iii 140 l-+-++Jjfm!o
Channel Separation vs
Frequency
I
I
1
2
10
S
20
LOAD RESISTANCE (kll)
Large Signal Transient
Response
Av= + 1, 20pSeC/DIV
2-157
•
LT1024
APPLICATions InFoRmATion
The LT1024 may be inserted directly into OP-10, OP-207
or OP227 sockets with or without removal of external nulling components.
The LT1024 is specified over awide range of power supply
voltages from ::I:: 2V to ::I:: 18V. Operation with lower supplies is possible down to ::I:: 1.2V (two NiCad batteries).
Advantages of Matched Dual Op Amps
In many applications, the performance of a system depends on the matching between two operational amplifiers rather than the individual characteristics of the two op
amps. Two or three op amp instrumentation amplifiers,
tracking voltage references, and low drift active filters are
some of the circuits requiring matching between two op
amps.
The well-known triple op amp configuration illustrates
these concepts. Output offset is a function of the difference between the offsets of the two halves of the
LT1 024. This error cancellation principle holds for a considerable number of input-referred parameters in addition
to offset voltage and its drift with temperature. Input bias
current will be the average of the two non-inverting input
currents (IB+). The difference between these two cur-
rents (los + ) is the offset current of the instrumentation
amplifier. Common-mode and power supply rejections
will be dependent only on the match between the two
amplifiers (assuming perfect resistor matching).
The concepts of common-mode and power supply rejection . ratio match (.:lCMRR and .:lPSRR) are best
demonstrated with a numerical example:
Assume CMRRA= +1.0p,V/Vor 120dB
and CMRRB = +0.5p,V/Vor 126dB,
then .:lCMRR=O.5p,V/Vor 126dB
if CMRRB = -0.5p,V/V, which is still 126dB,
then .:lCMRR= 1.5p,V/Vor 116.5dB.
Typical performance of the instrumentation amplifier:
Input offset voltage = 25p,V.
Input bias current=30pA.
Input resistance = 1012 0.
Input offset current = 30pA.
Input noise = 0.7p,Vp-p.
Power bandwidth (Vo = ::I:: 10V) =80kHz.
Clearly, the LT1024, by specifying and guaranteeing all of
these matching parameters, can significantly improve the
performance of matching dependent circuits.
Three Op Amp Instrumentation Amplifier
INPUT -
R4
1000
R6
10k
1%
1%
Rl
10k
1%
R3
2.1k
1%
R5
lOO1l
1%
INPUT
GAIN =1000
R7
9.76k
1%
500Il
TRIM RS FOR GAIN.
TRIM R9 FOR OC COMMON-MOOE REJECTION.
TRIM Rl0 FOR AC COMMON-MOOE REJECTION.
2-158
LT1024
APPLICATions InFoRmATion
Achieving Picoampere I MicrovoH Performance
In order to realize the picoampere/microvolt level accuracy of the LT1 024, proper care must be exercised. For
example, leakage currents in circuitry external to the op
amp can significantly degrade performance. High quality
insulation should be used (e.g., Teflon, Kel-F); cleaning
of all insulating surfaces to remove fluxes and other residues will probably be required. Surface coating may be
necessary to provide a moisture barrier in high humidity
environments.
Board leakage can be minimized by encircling the input
circuitry with a guard ring operated at a potential close to
that of the inputs: in inverting configurations, the guard
ring should be tied to ground, in non-inverting connections, to the inverting input. Guarding both sides of the
printed circuit board is required. Bulk leakage reduction
depends on the guard ring width. Nanoampere level leakage into the offset trim terminals can affect offset voltage
and drift with temperature.
Microvolt level error voltages can also be generated in the
external circuitry. Thermocouple effects caused by temperature gradients across dissimilar metals at the contacts to the input terminals can exceed the inherent drift
of the amplifier. Air currents over device leads should be
minimized, package leads should be short, and the two
input leads should be as close together as possible and
maintained at the same temperature.
Test Circuit for Offset Voltage and its Drift with Temperature
R1
50k"
13
(6)
R2
10011"
Vo
"RESISTORS MUST HAVE LOW
THERMOELECTRIC POTENTIAL
"THIS CIRCUIT IS ALSO USED AS THE BURN-IN
CONFIGURATION FOR THE LT1024, WITH SUPPLY
VOLTAGES INCREASED TO ±20V, R1 =R3=20k,
R2=2001l, Av=100
VO= 1000Vos
R3
50k"
Direct Pressure Transducer to Digital Output Signal Conditioner
+15V
TRANSDUCER
ZERO
330!l
OUT B
1N4148
10k
t--"I'II'v--5V
10k
OUT A
10k
CLK
a
74C74
PRE
CLR
+15V
2k
620
10k
ADJ
-15V
VIN
LT137A
'1% METAL FILM RESISTOR
GATES = 74COO
TRANSDUCER=BLH # DHF-100 PSI
PRESSURE TRANSDUCER
0-100 PSI =0-1000
COUNTS FULL-SCALE AT CIRCUIT OUT~UT
10k'
OUT
-t-_ _ _ _.....
; - ._ _ _ _-+
2N3BD4
10Dk
100k
10k
-15V
-5V
2-159
LT1024
SCHEmATIC DIAGRAm
112 LT1024
v+
r---1---~----------~--------1-------r--------1~--~----~----------~~--~14
(7)
OUTPUT
1000
13
(6)
400
3200
400
3300
PACKAGE DESCRIPTiOn
N14 Package 14-Lead Plastic
014 Package 14-Lead Hermetic DIP (Sidebrazed)
F9
+~"-°-ll},1
L~~OJ
(7620)
R~
2-160
L
0OO9_0015
(0 22.9-1l 361)
0325~~~~
~255~~~)
LYytl~~~~---U-,tr-a--L-o-w-N-o-ise-p-r~-:-li~-i~-~
High Speed Op Amp
DESCRIPTion
FEATURES
1.1nVI.JHz Max. at 1kHz
0.85nVI.JHzTyp. at 1kHz
1.0nVI.JHz Typ. at 10Hz
35nVp·p Typ., 0.1Hz to 10Hz
Voltage and Current Noise 100% Tested
50MHzMin.
Gain·Bandwidth Product
11VI/LsMin.
Slew Rate
40/LVMax.
Offset Voltage
7Million Min.
Voltage Gain
0.8/LVloC Max.
Drift with Temperature
• Voltage Noise
•
•
•
•
•
•
APPLICATions
•
•
•
•
•
•
•
The LT1028 achieves a new standard of excellence
in noise performance with 0.85nVI.JHz 1kHz noise,
1.0nVI.JHz 10Hz noise. This ultra low noise is combined
with excellent high speed specifications (gain·bandwidth
product is 75MHz), distortion free output, and true preci·
sion parameters (0.1/LVloC drift, 10/LV offset voltage, 30
million voltage gain). Although the LT1028 input stage
operates at nearly 1mA of col/ector currents to achieve
low voltage noise, input bias current is only 25nA.
The LT1028's voltage noise is less than the noise of a 500
resistor. Therefore, even in very low source impedance
transducer or audio amplifier applications, the LT1028's
contribution to total system noise will be negligible.
Low Noise Frequency Synthesizers
High Quality Audio
Infrared Detectors
Accelerometer and Gyro Amplifiers
3500 Bridge Signal Conditioning
Magnetic Search Coil Amplifiers
Hydrophone Amplifiers
Voltage Noise vs Frequency
Flux Gate Amplifier
L
1
10
Vs ±15V
TA 25"C
DEMODULATOR
SYNC
OUTPUT TO
DEMODULATOR
"-
['..MAXIMUM
" i'--
1If CORNER= 14Hz
TYPICAL
lk
SQUARE
WAVE
ORIVE
1kHz
'l--..
'-L
1If CORNER 3.5Hz
==
500
0.1
0.1
10
100
FREQUENCY (Hz)
1000
2-161
LT1028
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage
-SSOCto 10SOC .................................. ±22V
10SoC to 12SoC ................................. ± 16V
Differential Input Current (Note 8) ................ ± 2SmA
Input Voltage ....................Equal to Supply Voltage
Output Short Circuit Duration ....... , .......... Indefinite
Operating Temperature Range
LT1028AM, M......................... - 55°C to 125°C
LT1028AC, C..............................O°C to 70°C
Storage Temperature Range
All Devices ........................... - 6SoC to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
ORDER PART NUMBER
TOP VIEW
LT1028AMH
LT1028MH
LT1028ACH
LT1028CH
V(CASE)
H8 PACKAGE TO-5 METAL CAN
LT1028AMJ8
LT1028MJ8
LT1028ACJ8
LT1028CJ8
LT1028ACN8
LT1028CN8
J8 PACKAGE HERMETIC OIP
N8 PACKAGE PLASTIC DIP
ELECTRICAL CHARACTERISTICS Vs= ±15V, TA=25°C, unless otherwise noted.
SYMBOL
Vos
tJ.Vos
tJ.Time
los
Ie
en
in
CMRR
PSRR
AYOL
VOUT
SR
GBW
Z.
Is
2-162
PARAMETER
Input Offset Voltage
Long Term Input Offset
Voltage Stability
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Oensity
Input Noise Current Density
Input Resistance
Common·Mode
Differential Mode
Input CapaCitance
Input Voltage Range
Common·Mode Rejection
Ratio
Power Supply Rejection
Ratio
Large Signal Voltage Gain
MaximulTI Output Voltage
Swing
Slew Rate
Gain·Bandwidth Product
Open Loop Output Impedance
Supply Current
CONDITIONS
(Note 1)
(Note 2)
LT1028AM/AC
MIN
TYP
MAX
10
40
0.3
12
:t25
35
1.0
0.85
4.7
1.0
VCM=OV
VCM=OV
0.1 Hz to 10Hz (Note 3)
fo = 10Hz (Note 4)
fo = 1000Hz, 100% tested
fo = 10Hz (Notes 3and 5)
fo = 1000Hz, 100% tested
MIN
18
:t30
35
1.0
0.9
4.7
1.0
50
:t90
75
1.7
1.1
10.0
1.6
Vs= :t4Vto :t18V
RL2:21dl, Vo= :t 12V
RL2:1kO, Vo= :t 10V
RL2:8000, Vo= ± 10V
RL 2: 21dl
RL2:8000
AYCL= -1
10 = 20kHz (Note 6)
Vo=O, 10=0
100
:t180
90
1.9
1.2
12.0
1.8
UNITS
~V
~V/Mo
nA
nA
nVp·p
nVlv'Hz
nV/v'Hz
pA/v'Hz
pA/v'Hz
:t 11.0
110
300
20
5
:t12.2
126
MO
Idl
pF
V
dB
133
110
132
dB
30.0
20.0
15.0
±13.0
±12.2
15
75
5.0
3.5
2.0
±12.0
±10.5
11
50
30.0
20.0
15.0
:t13.0
±12.2
15
75
V/~V
V/~V
300
VCM=:tl1V
LT1028M/C
TYP
MAX
20
80
0.3
:tl1.0
114
20
5
:t12.2
126
117
7.0
5.0
3.0
±12.3
±11.0
11
50
80
80
7.4
VI~V
9.5
7.6
10.5
V
V
VIps
MHz
!I
mA
LT1028
ELECTRICAL CHARACTERISTICS Vs= :!:15V, -55°CsTAS125°C, unless otherwise noted.
SYMBOL
Vos
!:Nos
~Temp
los
18
CMRR
PSRR
AVOl
VOUT
Is
PARAMETER
Input Offset Voltage
Average Input
Offset Drift
Input Offset Current
Input Bias Current
Input Voltage Range
Common·Mode Rejection
Ratio
Power Supply Rejection
Ratio
Large Signal Voltage Gain
Maximum Output Voltage
Swing
Supply Current
CONDITIONS
(Note 1)
(Note 7)
VCM=OV
VCM=OV
VCM= ±10.3V
Vs= ±4.5Vto ±16V
RL:1:2kll, Va = ± 10V
Rl:1:1 kll, Va= ±10V
Rl:1:2kll
•
•
•
•
•
•
•
•
•
•
MIN
LT1028AM
TYP
30
0.2
±10.3
106
25
±40
±11.7
122
110
3.0
2.0
±10.3
MAX
120
0.8
MIN
LT1028M
TYP
45
0.25
180
±300
UNITS
~V
~V/oC
nA
nA
V
dB
±10.3
100
30
±50
±11.7
120
130
104
130
dB
14.0
10.0
±11.6
2.0
1.5
±10.3
14.0
10.0
±11.6
v/~V
v/~V
8.7
90
±150
MAX
180
1.0
9.0
11.5
V
13.0
rnA
MAX
125
1.0
UNITS
ELECTRICAL CHARACTERISTICS Vs= :!: 15V, OOCSTAS70°C, unless otherwise noted.
SYMBOL
Vos
~Vos
~Temp
los
18
CMRR
PSRR
AVOL
VOUT
Is
PARAMETER
Input Offset Voltage
Average Input
Offset Drift
Input Offset Current
Input Bias Current
Input Voltage Range
Common·Mode Rejection
Ratio
Power Supply Rejection
Ratio
Large Signal Voltage Gain
Maximum Output Voltage
Swing
Supply Current
CONDITIONS
(Note 1)
(Note 7)
VCM=OV
VCM=OV
VCM = ±10.5V
Vs= ±4.5Vto ± lBV
Rl :1:2kO, Va= ± 10V
Rl :1:1kO, Vo= ± 10V
Rl:1:2kO
Rl :1:6000 (Note 9)
The • denotes the specifications which apply over the full operating tern·
perature range.
Note1: Input Offset Voltage measurements are performed by automatic
test equipment approximately 0.5 sec. after application of power. In addi·
tion, at TA= 25°C, offset voltage is measured with the chip heated to ap·
proximately 55°C to account for the chip temperature rise when the device
is fully warmed up.
Note 2: Long Term Input Offset Voltage Stability refers to the average trend
line of Offset Voltage vs. Time over extended periods after the first 30 days
of operation. Excluding the initial hour of operation, changes in Vos during
the first 30 days are typically 2.5~V.
Note 3: This parameter is tested on a sample basis only.
Note 4: 10Hz noise voltage density is sample tested on every lot. Devices
100% tested at 10Hz are available on request.
•
MIN
•
•
•
•
•
•
•
•
•
LT1028AC
TYP
15
0.1
±10.5
110
15
±3O
±12.0
124
114
5.0
4.0
±11.5
±9.5
MAX
MIN
BO
O.B
65
±12O
LT1028C
TYP
30
0.2
±10.5
106
22
±40
±12.0
124
132
107
132
dB
25.0
3.0
2.5
±11.5
±9.0
25.0
lB.O
v/~V
V/~V
±12.7
±10.5
8.2
V
V
rnA
lB.O
±12.7
±11.0
B.O
10.5
130
±240
~V
~V/oC
11.5
nA
nA
V
dB
Note 5: Current noise is defined and measured with balanced source res is·
tors. The resultant voltage noise (after subtracting the resistor noise on an
RMS basis) is divided by the sum of the two source resistors to obtain cur·
rent noise. Maximum 10Hz current noise can be inferred from 100% testing
at 1kHz.
Note 6: Gain·bandwidth product is not tested. It is guaranteed by design
and by inference from the slew rate measurement.
Note 7: This parameter is not 100% tested.
Note 8: The inputs are protected by back·to·back diodes. Current limiting
reSistors are not used in order to achieve low noise. If differential input volt·
age exceeds ± 1.BV, the input current should be limited to 25mA.
Note 9: This parameter guaranteed by deSign, fully warmed up at
TA = 70°C. It includes chip temperature increase due to supply and load
currents.
2-163
LT1028
TYPICAL PERFORmAnCE CHARACTERISTICS
10Hz Voltage Noise Distribution
180
-
160
148
Vs~
158
Wideband Voltage Noise
(0.1 Hz to Frequency Indicated)
Wideband Noise, DC to 20kHz
10
±15V
TA~25'C
500 UNITS
MEASURED
FROM 4 RUNS
140
~ 120
~
w
'"
6
z
:2
~ 100
o
L
w
~ 80
'"~
Vs ±15V
TA 25'C
-
!3'"
f-- 70
60
40
1
a:
:f.l
~3
Ir
0.6
§;
4~
20 ' - - 8
o
57
2 12
""
0.01
100
2.2
Total Noise vs Matched Source
Resistance
Total Noise vs Unmatched Source
Resistance
100
f-- t--@~~
=t>-
~
t=:::==
@1~Ht=
I&JI'
/
t-- t--
Vs~±15V
TA~25'C
1
3
10 30 100 300 1k 3k
MATCHED SOURCE RESISTANCE, Rs, (Il)
10k
0.1
0.1 Hz to 10Hz Voltage Noise
1If CORNER 800Hz
@10~
@1kHi-
1
1If CORMR
ill
Vs= ± 15V
TA=25'C
V
250Hz
ill
Will llilllli
0.1
3
10 30 100 300 1k 3k 10k
UNMATCHED SOURCE RESISTANCE, Rs, (Il)
Vs~
.,..... IIWiI
NJ.l.1JIltt"
TYPICAL
P'" Rs NOISE ONLY
10
0.01 Hz to 1Hz Voltage Noise
Vs= ± 15V
TA=25'C
10M
MAXIMUM
1=
0.1
1M
/
V
:J,~
2 Rs NOISE ONLY
/'
10k
100k
BANDWIDTH (Hz)
100
/
V
1k
Current Noise Spectrum
100
4>-
0.1
VERTICAL SCALE~0.5~VlDlV
HORIZONTAL SCALE~0.5ms/DiV
3 21 11
0.8 1.0 1.2 1.4 1.6 1.8 2.0
VOLTAGE NOISE DENSITY (nV/$z)
.L
/
100
1k
FREQUENCY (Hz)
10k
Voltage Noise vs Temperature
2.0
±15V
TA~25'C
Vs= ±15V
~
~ 1.6
~
L
I
I.
'W ~~. M MJ '", ~II~ rill' ~ ~ ~
II
rI
I'
l' I"'
IAn 1M
~
10nV
I
\L
r,' r'l1 " II 1
I
~
~ 1.2
fii
o
Z
L
0.8
til
!3
10nV
~
-
AT1~
r- ~
r-
-
0.4
~
4
6
TIME (SECONDS)
2-164
.
.l r\t'll .W klA .IILa n.,
10
20
40
60
TIME (SECONDS)
80
100
o
-50
-25
0
25
50
75
TEMPERATURE ('C)
100
125
LT1028
TYPICAL PERFORmAnCE CHARACTERISTICS
20~~~~~-r-.~--r-'-'
so
18
40
VS=,.15V
TA=25°C
16 :~N~6~:~t~~ -1--+-+--+-+-1
141--+-+--+-+-fhr+-+--+-+-f
!
~ 12r-+-+--r-+~1--t-+--r-+-i
~
~
z
10 r-+-+-+--F-
Vs= ",15V
30
20
----
........
~
10
§!
~ -10
~ -20
::>
Long Tenn Stability of Five
Representative Units
Offset Voltage Drift with Temperature
of Representative Units
Distribution of Input Offset Voltage
....
--
10
,.., . /
~ 6
....
........
~
'"~
§i
~
60
Vs= ± 15V
TA=25°C
t;;
~
.5.
20
16
12
8
23
4
/
V
o
o
V
---
~L-IN-LiNE PACKAGE
1
PLAr C (N) 0 CERDIP
r-
~
o
30
'"~
20
~
~
r--.....
~
is 0.75
>
100
125
AT 1kHz
RCM=
o
,.5
:""--.. ~NT
!15
40
~
20
'"
~ 10
OFFSi CUrENT
-25
-
as
~ -20
-80
100
-15
125
Supply Current vs Temperature
-
Vs= ,.15V
:...+-t:-
~=±5V
-----
so
-
'"
!~ 30
15 g 20
~
B
!=
~
100
./
~GATIVE INPUT CURRENT
(OVERCANCELLED) DEVICE
15
125
-55°C
2S°C
VS=",lSV
125°C
0
-10
.....
........ I"""
-40
0
25
so 75
TEMPERATURE (OC)
~
./
10
~ §g -20
oS<
-25
~
-10
-5
0
5
10
COMMON-MODE INPUT VOLTAGE (V)
r-- t-.
40
(3
o
-so
V
V
Output Short Circuit Current vs Time
,.20
.... /
-...-
l!: -40
-60
0
25
so 75
TEMPERATURE (OC)
I-
POSITIVE INPUT CURRENT
(UNDERCANCELLED) DEVICE
'-'
~
-
-r-4-.
60
~~-30
",10
,.15
SUPPlY VOLTAGE (V)
3
20V =300MII Vs=±15V
TA =25 0 c
16snA I
80
::>
...-. /.....
AT 10Hz
2
Bias Current Over the Common·Mode
Range
~
O.S
o
TIME (MONTHS)
l!:
~ 1.25
-
0
25
50
75
TEMPERATURE (OC)
100
~
~ 1_0
z
1-00.
-10
40
10
TA=2S°C
i
\.
-4
o -6
VS=,.15V
VCM=OV
o
-so
1
2
3
4
TIME AFTER POWER ON (MINUTES)
Voltage Noise vs Supply Voltage
1.5
so
B
METAL CAN (H) PACKAGE
w
'"~
~
_
:5
l!:
«
--
~ -.
-2
Input Bias and Offset Currents
Over Temperature
24
-
-8
-50
-50 -25
Warm·Up Drift
§!
./
W
"..
~
A
'-'
-40
~
w
'"i:§
4
~
:I:
-30
0"1...;.;...1..-50 -40 -30 -20 -10 0 10 20 30 40 50
OFFSET VOLTAGE (~V)
VS=,.15V
TA=25°C
t=o AFTER 1 DAY PRE-WilRM UP
-so
i"'""
12SoC
2SoC
I WC
o
1
2
3
TIME FROM OUTPUT SHORT TO GROUND (MINUTES)
2-165
LT1028
TYPICAL PERFORmAnCE CHARACTERISTICS
Voltage Gain vs Frequency
160
-
140
120
i
- r--.. I\.
70
Vs= ±lSV
TA=2S0C
RL=2k
~
so
;;40
~ 30
"- r\
60
CD
~ 40
~
CD
20
10
\
1
10 100 lk 10k lOOk 1M 10M 100M
FREQUENCY (Hz)
10k
TA 25°C
~01
~
b
z
;;;: 10
CD
1M
10M
FREQUENCY (Hz)
±1SV
-TAJ
2':.
-5~oC
z
;;;: 10
r--r-
(II
CD
CD
i3
~
'-'
~
~
/
/
/
I
1
±S
±10
±15
SUPPLY VOLTAGE (V)
L
---
k-""
Ttnr C
ILMAX - 35mA AT 5Soc
= 27mA AT 25°C
= 16mA AT 125°C
V~ ±~v
Vs
±15V
-
'"'"
Q
~ 100
z
0
~
Ul
'"
~
80
60
Z 40
0
Vs= ±5V TO ± 15V
2-166
0
25
SO
75
TEMPERATURE (OC)
30
ft-HIII'IfHIt-V s = ± 15V
o t:tjjttt~:r1l1U~~T~A:=~2s~oc~
10
:;;
:;;
0
'-'
100
125
160
a;- 140
~
"
120
~
~ 100
'"
~
§
iil
60
~
60
Vs= ±15V
TA=25°C
lk
10k
lOOk
FREQUENCY (Hz)
1M
SUPPLY
'" 40
~
10M
NEGATIJE_
~UPPLY
POSITIVE~
ill
0..
100
10.000
:2-
20
10
100
1000
CAPACITIVE LOAD, CL, (pF)
Power Supply Rejection Ratio
vs Frequency
o
-25
40 f-H-++H+H-H-IH-IH-+III-H-++If+IH
10
Vs= ±15V
TA-25°C
:;;
V-so
~
illE;
Common·Mode Rejection Ratio
vs Frequency
0
-
60
10
1
~ 120
100
~ 50
b
IIIII
140
-1
1
10
FREQUENCY (Hz)
70
LOAD RESISTANCE (kll)
V+
CLOS~D
lJp GAIN
OPEN LOOP GAIN
GAIN ERROR=
0.001
0.1
Capacitance Load Handling
V ~~ll
III
0.1
Common·Mode Limit Over
Temperature
+1
-10
100M
g.j
o
lT1028
-
lOOk
Vs
~
w
1
L
;;;:
Hl '"
"fH CD 0.01
.......
RL =2kO
>.:
'"
ffi
0
Voltage Gain vs Load Resistance
100
OPAMP
0.1
10~
ctJ1illlli
Voltage Gain vs Supply Voltage
100
"
30~
-a
Vs=±lSV
TA=2S0C
-10
-
4O~ ~
»
20
\
-20
0.01 0.1
\\
~ 20
~
=
TYPICAL
-PRECISION
50 ~
1);
GAIN\
~
1.0
60
~
a;-
r\.
BO
70
PHW
60
r\.
100
~
w
Gain Error vs Frequency
Closed Loop Gain = 1000
Gain, Phase vs Frequency
~
-
,
~
20
o
0.1
\
10
100 lk 10k lOOk 1M
FREQUENCY (Hz)
10M
LT1028
TYPICAL PERFORmAnCE CHARACTERISTICS
Total Harmonic Distortion vs Closed
Loop Gain
Small Signal Transient Response
Large Signal Transient Response
0.1
ti~lkHZ .
f~s;,
r~~:~~~~
.on
~I"
l~s/DlVISION
0.2,.s/DlVISION
AV; -1, RS;Rf;2k, Cf;30pF
Av=- -1, Rs;Rf;2kll
Cf;3OpF, CL ;80pF
Total Harmonic Distortion vs
Frequency and Load Resistance
30
AV +1000
RL 2k
Av +1000
RL ;6000
is
~
i5
;,: 0.01
V
./
/
o
I
./
~
0.001
-
/'
'"
~
g
'/ /
z
.J...I11 II
II I
§:
i
!:; 15
o
1000
Av
RL 2k
~
·1Ob~'±
Av"; RL;6000
I 'V o"=.20VP-P
Vs; ±15V
TA;25°C
100
~
t:; 0.1
o
~
1
0.01 ~-+-+.~--t--t---l
'-...
a
10k
lOOk
1M
FREQUENCY (Hz)
100
10M
lk
10k
FREQUENCY (Hz)
lOOk
1M
Slew Rate, Gain·Bandwidth Product
Over Temperature
18
17
l"'1000
100
l~i:25OG
01
~-*--+-
~
10
~
16
~
15
'"
14
w
I~oc
1
;!!
10,000
~
F
Closed Loop Output Impedance
1\
~
100
:-
100,000.
~
Slew Rate, Gain·Bandwidth·Product
vs Over·Compensation Capacitor
I-
1000
10,000
CLOSEO LOOP GAIN
100 r.--:-::-;------r---r--r----,
~
20
I-
10
FREQUENCY (kHz)
1
100
w
/
/
10
Vs- ± 15V
TA;25°C
RL ;2kll
~ 25
IUfJfltPDtA~
0.0001
Maximum Undistorted Output
vs Frequency
0.1
UR~D'-
1/
PIN
10
10
100
1000
10,000
OVER-COMPENSATION CAPACITOR (pF)
~
90
Vs; ±15V
r-
r- ~
!!!;L
. / r-""
~V
13
12
-50 -25
J--
RISE
--
"
~
~
a
25
50
75
TEMPERATURE (OC)
100
~
z
~
...........
.......
~
z
80
51
70
:r
60
illg
50
~
;}
II
~
40
...~
:r
30 "'125
2-167
LT1028
APPLICATions INFoRmATion
-noISE
Voltage Noise vs Current Noise
The LT1028's less than 1nV/..JHz voltage noise is three
times better than the lowest voltage noise heretofore
available (on ttie LT1007/1037). A necessary condition for
such low voltage noise is operating the input transistors
at nearly 1rnA of collector currents, because voltage noise
is inversely proportional to the square root of the collector
current. Current nOise, however, is directly proportional to
the square root of the collector current. Consequently, the
LT1028's current noise is significantly higher than on most
monolithic op amps.
Therefore, to realize truly low noise performance it is important to understand the interaction between voltage
noise (en), current noise (in) and resistor noise (rn).
Total Noise VB Source Resistance
The total input referred noise of an op amp is given by
et=[en2+ rn 2 + (inReq)~1/2
where Req is the total equivalent source resistance at the
two inputs
and rn ="4kTReq = 0.13.vReQ in nV/..JHz at 25°C
As a numerical example, consider the total noise at 1kHz
of the gain 1000 amplifier shown below.
100!l
100k
100!l
Req= 1000+ 10001 100k .. 2001l
rn = 0.13m =1.84nV/..JHz
en =0.85nV/..JHz
in = 1.0pAl..JHz
et =[0.852+ 1.842+ (1.0 X0.2)~1/2 =2.04nV/..JHz
output noise
2-168
=1000 et =2.04,Nl..JHz
At very low source resistance (Req <400) voltage noise
dominates. As Req is increased resistor noise becomes
the largest term-as in the example above-and the
LT1028's voltage noise becomes negligible. As Req is further increased, current noise becomes important. At 1kHz,
when Req is in excess of 20kO, the current noise component is larger than the resistor noise. The .total noise versus matched source resistance plot illustrates the above
calculations.
The plot also shows that current noise is more dominant
at low frequencies, such as 10Hz. This is because resistor
noise is flat with frequency, while the 1/f corner of current
noise is typically at 250Hz. At 10Hz when Req >1k~, the
current noise term will exceed the resistor noise.
When the source resistance is unmatched, the total noise
versus unmatched source resistance plot should be consulted. Note that total noise is lower at source resistances
below 1kO because the resistor noise contribution is less.
When Rs> 1kO total noise is not improved, however. This
is because bias current cancellation is used to reduce input bias current. The cancellation circuitry injects two
correlated current noise components into the two inputs.
With matched source resistors the injected current noise
creates a common-mode voltage noise and gets rejected
by the amplifier. With source resistance in one input only,
the cancellation noise is added to the amplifier's inherent
noise.
In summary, the LT1028 is the optimum amplifier for noise
performance-provided that the source resistance is kept
low. The following table depicts which op amp manufactured by Linear Technology should be used to minimize
noise-as the source resistance is increased beyond the
LT1028's level of usefulness.
Best OpAmp for Lowest Total Noise
vs Source Resistance
SOURCE RESISTANCE
(Note 1)
Oto4000
4000 to 4kl1
4kOto 40kO
4OklIto 5OOkO
500kOt05Mll
>5M
BESTOPAMP
AT LOW FREQ (10Hz) WIDEBAND(1kHz)
LT1028
LT1028
LT1007/1037
LT1028
LT1001
LT100711037
LT1012
LT1001
LT1012orLT1055
LT1012
LT1055
LT10SS
Note 1: Source resistance is defined as matched or unmatched, e.g.,
Rs= 1kl1 means: 1kl1 at each input, or 1kl1 at one input and zero althe other.
LT1028
APPLICATions INFoRmATion
-noISE
Measuring the typical 35nV peak-to-peak noise performance of the LT1028 requires special test precautions:
Noise Testing-Voltage Noise
(a) The device should be warmed up for at least five minutes. As the op amp warms up, its offset voltage
changes typically 10jLV due to its chip temperature increasing 30°C to 40°C from the moment the power
supplies are turned on. In the 10 second measurement
interval these temperature-induced effects can easily
exceed tens of nanovolts.
The LT1028's RMS voltage noise density can be accurately
measured using the Quan Tech Noise Analyzer, Model
5173 or an equivalent noise tester. Care should be taken,
however, to subtract the noise of the source resistor used.
Prefabricated test cards for the Model 5173 set the device
under test in a closed loop gain of 31 with a 601l source
resistor and a 1.8kll feedback resistor. The noise of
this resistor combination is 0.13v's8 =1.0nV/*lz. An
LT1028 with 0.85nV/*lz noise will rea~ (0.85 2+1.0 2)112
1.31nV/*lz. For better resolution, the resistors should be
replaced with a 101l source and 3001l feedback resistor.
Even a 101l resistor will show an apparent noise which is
8-10% too high.
=
The 0.1Hz to 10Hz peak-to-peak noise of the LT1028 is
measured in the test circuit shown. The frequency response of this noise tester indicates that the 0.1 Hz corner
is defined by only one zero. The test time to measure 0.1 Hz
to 10Hz noise should not exceed 10 seconds, as this time
limit acts as an additional zero to eliminate noise contributions from the frequency band below 0.1 Hz.
(b) For similar reasons, the device must be well shielded
from air currents to eliminate the possibility of thermoelectric effects in excess of a few nanovolts, which
would invalidate the measurements.
(c) Sudden motion in the vicinity of the device can also
"feedthrough" to increase the observed noise.
A noise-voltage density test is recommended when measuring noise on a large number of units. A 10Hz noise-voltage density measurement will correlate well with a 0.1 Hz
to 10Hz peak-to-peak noise reading since both results are
determined by the white noise and the location of the 1/f
corner frequency.
0.1 Hz to 10Hz Noise Test Circuit
0.1Hz to 10Hz p.p Noise
Tester Frequency Response
100
'\
90
100kll
\'
80
~ 70
22"T-F
~~PE
RIN=lMIl
z
~ 60
50
110k
40
VOLTAGE GAIN
=50,000
"DEVICE UNDER TEST
NOTE: ALL CAPACITOR VALUES ARE FOR
NON-POLARIZED CAPACITORS ONLY.
30
0.01
0.1
1.0
10
100
FREQUENCY (Hz)
2-169
LT1028
APPLICATions INFoRmATion
-noISE
Noise Testing-Current Noise
Current noise density (in) is defined by the following
formula, and can be measured in the circuit shown:
. [eno2 - (31 x 18.4nV/~z}~1/2
In=
20kx31
1.8k
10Hz voltage noise density is sample tested on every lot.
Devices 100% tested at 10Hz are available on request for
an additional charge.
10Hz current noise is not tested on every lot but it can be
inferred from 100% testing at 1kHz. A look at the current
noise spectrum plot will substantiate this statement. The
only way 10Hz current noise can exceed the guaranteed
limits is if its 1If corner is higher than 800Hz and/or its
white noise is high. If that is the case then the 1kHz test
will fail.
Automated Tester Noise Filter
If the Quan Tech Model 5173 is used, the noise reading is
input-referred, therefore the result should not be divided
by 31; the resistor noise should not be multiplied by 31.
10
,,~
'"~-10
100% Noise Testing
~
ffi -20
The 1kHz voltage and current noise is 100% tested on the
LT1028 as part of automated testing; the approximate frequency response of the filters is shown. The limits on the
automated testing are established by extensive correlation tests on units measured with the Quan Tech Model
5173.
OJ
u::
~ -30
o
z
-40
CURRENT
NOISE
II
-50
100
VOLTAGE
NOISE
l\
1,\
lk
10k
FREQUENCY (Hz)
lOOk
APPLICATions InFoRmATion
15V
General
The LT1028 series devices may be inserted directly into
OP-07, OP-27, OP-37, LT1007 and LT1037 sockets with or
without removal of external nulling components. In addition, the LT1028 may be fitted to 5534 sockets with the removal of external compensation components.
The adjustment range with a 1k pot is approximately
± 1.1mV.
Offset Voltage Adjustment
Offset Voltage and Drift
The input offset voltage of the LT1028 and its drift with
temperature, are permanently trimmed at wafer testing to
a low level. However, if further adjustment of Ves is necessary, the use of a1knulling potentiometer will not degrade
drift with temperature. Trimming to avalue other than zero
creates adrift of (Vesl300) /lV/oC, e.g., if Ves is adjusted to
300JLV, the change in drift will be 1JLV/oC.
Thermocouple effects, caused by temperature gradients
across dissimilar metals at the contacts to the input
terminals, can exceed the inherent drift of the amplifier
unless proper care is exercised. Air currents should be
minimized, package leads should be short, the two input
leads should be close together and maintained at the
same temperature.
2-170
OUTPUT
LT1028
APPLICATions InFORmATion
The circuit shown to measure offset voltage is also used
as the burn-in configuration for the LT1028.
Test Circuit for Offset Voltage
and Offset Voltage Drift with Temperature
10k"
15V
Vo
10k"
'::"
Another configuration which requires unity gain stability
is shown below. When C, is large enough to effectively
short the output to the input at 15MHz, oscillations can occur. The insertion of RS2~5000 will prevent the LT1028
from oscillating. When RSl ~5000, the additional noise
contribution due to the presence of RS2 will be minimal.
When RSl ~ 1000, RS2 is not necessary, because RSl represents a heavy load on the output through the C, short.
When 100D'-_--_.... OUTPUT
OUTPUT
All RESISTORS METAL FilM
MAG PHONO
INPUT
All RESISTORS METAL FilM
Low Noise, Wide Bandwidth Instrumentation Amplifier
300!)
10k
68pF
500
6BpF
OUTPUT
3OO!J
GAIN = 1000, BANDWIOTH=1MHz
INPUT REFERRED NOISE= 1.5nV/,fHz AT 1kHz
WIDEBAND NOISE-DC TO 1MHz=3~VRMS
IF BW LIMITED TO DC TO 100kHz = 0,55~VRMS
Gyro Pick·Off Amplifier
GYRO TYPICAlNORTHRUP CORP,
GR-G5AH7-,5B
SINE DRIVE
OUTPUT TO SYNC,
DEMODULATOR
1k
1000
2-173
LT1028
TYPICAL APPLICATions
Super Low Distortion Variable Sine Wave Oscillator
C1
0.047
15V
G2
0.047
r;i---I
Chopper Stabilized Amplifier
2000
WRMS OUTPUT
1.5kHz-15kHz
(f= 2:RC)
WHERE R1C1 =R2C2
4.7k
,..--....-'VI,.,...-15V
2.4k
LTf004-1.2V
-15V
WOk
MOUNT 1N4148's
IN CLOSE
PROXIMITY
INPUT ....~'----.-:::.fl\.
OUTPUT
10k
10k
10!)
<0.0018% DISTORTION AND NDiSE.
MEASUREMENT LIMITED BY RESOLUTION OF
HP339A DISTORTION ANALYZER
Low Noise Infrared Detector
5V
1Oil
1k
330
+
SYNCHRONOUS
DEMODULATOR
100~F
'I"OPTICAL
- CHOPPER
/ ' . WHEEL
10k"
10k"
IR-~
RADIATION_M
PHOTOELECTRIC
PICK-OFF
DC OUT
100
2-174
~
~
VII
n
::z:
1ft
R5
l30D
NULL
aZ
...-
R6
l30D
n
R2
1
Rl
3k
3k
9OD"A
500"A
t900"A
Q
5~6~
kU'O
T
Rll
200!l
NONINVERTING
INPUT
3"
=a
::D
J
C2
40pF
Q22
OUTPUT
+ IT
C3
80pF
4.5"A
"::D
Rl1
400D
Q27
R12
240!l
RI3
750U
C4
35pF
C5
25pF
300"A
BIAS
R7
80!l
f\)
+
Y"j
,
[023
R8
480D
~
V-
--'
I
OVERCOMP
......L
-.J
01
o
I\J
ex>
-
_ _ _--.JI_
LT1028
PACKAGE DESCRIPTions
Dimensions in inches (millimeters) unless otherwise noted.
JPackage
a·Lead Ceramic DIP
0.200
(5.000)
MAX
0.014-0026
(0360-0.660)~
0038-0.068
(0.965-1727)
NPackage
a·Lead Plastic DIP
t Q.4llO:l
0
(1~)
785
0.009-0.015
(0.229-0.381)
0325+ 0.025
1
1
1{8255 ~l:lh
2
3
f
0.250::1::0.010
~O.254l
"
HPackage
a·Lead TO·5 Metal Can
Ir:~~;~
0.040
(1016)
MAX
SEATING
L1=_
GAUGE
PLANE,-T~
(0.254-1143)
-,-PLANE
00000
-.II..O.016_0-::.02::-,---~-L
(0.406-0.533)
TV'
NOTE. lfAD DIAMETER IS UNCONTROLLED BETWEEN
THE REfERENCE PlANE AND SEATING PLANE.
2-176
'118188
~"""-LlneJ\12
~~
LTl028CS
TBCHNOLoG~~~------UI-tr-a--L-o-w-N-o-i-se--Pr-e-c-is-io-n
High Speed Op Amp
DESCRIPTion
FEATURES
1.2nV/VHz Max. at 1kHz
0.9nV/VHz Typ. at 1kHz
1.0nV/VHz Typ. at 10Hz
35n Vp-p Typ., 0.1 Hz to 10Hz
Voltage and Current Noise 100% Tested
50MHzMin.
Gain-Bandwidth Product
11V/lls Min.
Slew Rate
80IlVMax.
Offset Voltage
5Million Min.
Voltage Gain
111V/oC Max.
Drift with Temperature
• Voltage Noise
•
•
•
•
•
•
APPLICATions
•
•
•
•
•
•
•
The LT1028 achieves a new standard of excellence
in noise performance with 0.9nV/VHz 1kHz noise,
1.0nV/VHz 10Hz noise. This ultra low noise is combined
with excellent high speed specifications (gain-bandwidth
product is 75MHz), distortion free output, and true precision parameters (0.2I1V/oC drift, 20llV offset voltage, 30
million voltage gain). Although the LT1028 input stage
operates at nearly 1mA of collector currents to achieve
low voltage noise, input bias current is only 30nA.
The LT1028's voltage noise is less than the noise of a 501l
resistor. Therefore, even in very low source impedance
transducer or audio amplifier applications, the LT1028's
contribution to total system noise will be negligible.
Low Noise Frequency Synthesizers
High Quality Audio
Infrared Detectors
Accelerometer and Gyro Amplifiers
3501l Bridge Signal Conditioning
MagnetiC Search Coil Amplifiers
Hydrophone Amplifiers
Voltage Noise vs Frequency
Flux Gale Amplifier
10
DEMODULATOR
SYNC
OUTPUTTO
DEMODULATOR
1
Vs ±15V
TA 25'C
J¥
"-
=s
~
in
"
TYPICAL
z
~ 10
w
SQUARE
WAVE
DRIVE
1kHz
MAXIMUM
1/1 CORNER ~ 14Hz
'-... 'l-o."- ~
1/1 CORNER
~
35Hz
w
==
'"i3
501l
~
0.1
0.1
10
FREQUENCY (Hz)
100
1000
2-177
...
..
LT1028CS
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage ................................. " ± 22V
Differential Input Current (Note 4) .. " ........... , ± 25mA
Input Voltage .................... Equal to Supply Voltage
Output Short Circuit Duration .................. Indefinite
Operating Temperature Range ............... OOC to 70°C
Storage Temperature Range
All Devices ........................... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
TOP VIEW
ORDER PART NUMBER
LT1028CS
PART MARKING
LT1028CS
S16 PACKAGE
PLASTIC SOL
ELECTRICAL CHARACTERISTICS Vs= :!:15V, TA=25°C, unless otherwise noted.
SYMBOL
Vos
lNos
ATime
los
IB
en
in
PARAMETER
Input Offset Voltage
Long Term Input Offset Voltage
Stability
CONDITIONS
(Note 1)
(Note 2)
Input Oiiset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
VCM=OV
VCM=OV
0.1 Hz to 10Hz (Note 3)
io = 10Hz (Note 3)
io = 1000Hz, 100% tested
io= 10Hz (Notes 3 and 5)
fo = 1000Hz, 100% tested
Input Noise Current Density
AVOL
Input Resistance
Common·Mode
Differential Mode
Input Capacitance
Input Voltage Range
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
VOUT
Maximum Output Voltage Swing
SR
GBW
Slew Rate
Gain·Bandwidth Product
Open Loop Output Impedance
Supply Current
CMRR
PSRR
Z.
Is
2-178
VCM= ±11V
Vs= ±4Vto ±18V
RL2:2kll, Vo= ±12V
RL2:1k!l, Vo= ± 10V
RL2:600ll, Vo= ± 10V
RL2:2kll
RL2:6000
AVCL= -1
io = 20kHz (Note 6)
Vo=O, 10=0
MIN
LT1028CS
TYP
20
0.3
18
±30
35
1.0
0.9
4.7
1.0
±11.0
110
110
5.0
3.5
2.0
±12.0
±10.5
11
50
300
20
5
±12.2
126
132
30.0
20.0
15.0
±13.0
±12.2
15
75
80
7.6
MAX
80
UNITS
pV
~VIMo
100
±180
90
1.9
1.2
12.0
1.8
nA
nA
nVp·p
nVlv'Hz
nVlv'Hz
pA/v'Hz
pA/VHz
Mil
kIl
10.5
pF
V
dB
dB
VlpV
VlpV
VlpV
V
V
VIpS
MHz
Il
rnA
LT1028CS
ELECTRICAL CHARACTERISTICS Vs = ±15V, o·c STA s70·C, unless otherwise noted.
SYMBOL
PARAMETER
Input Offset Voltage
Average Input Offset Drift
CONDITIONS
(Note 1)
(Note 7)
VCM=OV
VCM=OV
AVOL
Input Offset Current
Input Bias Current
Input Voltage Range
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
VOUT
Is
Maximum Output Voltage Swing
Supply Current
Vos
AVos
ATemp
los
18
CMRR
PSRR
•
•
•
•
VCM= ±10.5V
Vs= ±4.5Vto ±18V
RL2: 2kll, Vo= ±10V
RL2:1kll, Vo= ± 10V
RL2:2kll
The. denotes the specifications which apply over the full operating tern·
perature range.
Note 1: Input Offset Voltage measurements are performed by automatic
test equipment approximately 0.5 sec. after application of power. In addi·
tion, at TA= 25°C, offset voltage is measured with the chip heated to ap·
proximately 55°C to account for the chip temperature rise when the device
is fully warmed up.
Note 2: Long Term Input Offset Voltage Stability refers to the average trend
line of Offset Voltage vs. Time over extended periods after the first 30 days
of operation. Excluding the initial hour of operation, changes in Vos during
the first 30 days are typically 2.5p.V.
Note 3: This parameter Is tested on a sample basis only.
•
•
•
•
•
•
MIN
±10.5
106
107
3.0
2.5
±11.5
LT1028CS
TYP
30
0.2
22
±40
±12.0
124
132
25.0
18.0
±12.7
8.2
MAX
125
1.0
130
±240
11.5
UNITS
p.V
p.V/oC
nA
nA
V
dB
dB
V/p.V
V/p.V
V
rnA
Note 4: The inputs are protected by back·to·back diodes. Current limiting
resistors are not used in order to achieve low noise. If differential input volt·
age exceeds ± 1.8V, the input current should be limited to 25mA.
Note 5: Current noise is defined and measured with balanced source res is·
tors. The resultant voltage noise (after subtracting the resistor noise on an
RMS basis) is divided by the sum of the two source resistors to obtain cur·
rent noise. Maximum 10Hz current noise can be inferred from 100% testing
at 1kHz.
Note 6: Gain·bandwidth product is not tested. It is guaranteed by design
and by inference from the slew rate measurement.
Note 7: This parameter is not 100% tested.
2-179
NOTES
2-180
~TUIl~Ir,~~--p-re-c-is-io-n-c-h-o-p-p-e-rs-~-:C-bi-~ -:-~
Operational Amplifier With
Internal Capacitors
FEATURES
DESCRIPTiOn
•
•
•
•
•
•
•
•
•
•
•
•
•
•
The LTC10S0 is a high performance, low cost chopper sta·
bilized operational amplifier. The unique achievement of
the LTC10S0 is that it integrates on chip the two sample·
and·hold capacitors usually required externally by other
chopper amplifiers. Further, the LTC10S0 offers better
combined overall DC and AC performance than is avail·
able from other chopper stabilized amplifiers with or with·
out internal sample/hold capacitors
No External Components Required
Noise Tested and Guaranteed
Low Aliasing Errors
Maximum Offset Voltage Sp.V
Maxim'um Offset Voltage Drift O.Sp.V/oC
Low Noise 1.6p.Vp•p(0.1Hzto 10Hz)
Minimum Voltage Gain, 130dB
Minimum PSRR, 125dB
Minimum CMRR, 120dB
Low Supply Current 1rnA
Single Supply Operation 4.7SV to 16V
Input Common Mode Range Includes Ground
Output Swings to Ground
Typical Overload Recovery Time 3ms
The LTC10S0 has an offset voltage of O.Sp.V, drift of
0.01p.V/oC, DC to 10Hz, input noise voltage of 1.6p.Vp•p and
atypical voltage gain of 160dB. The slew rate of 4V/p.s and
a gain bandwidth product of 2.SMHz are achieved with
only 1rnA of supply current.
Overload recovery times from positive and negative
saturation conditions are l.Sms and 3ms respectively,
which represents an improvement of about 100 times over
chopper amplifiers using external capacitors. Pin Sis an
optional external clock input, useful for synchronization
purposes.
APPLICATions
•
•
•
•
•
•
Thermocouple Amplifiers
Electronic Scales
Medical Instrumentation
Strain Gauge Amplifiers
High Resolution Data Acquisition
DC Accurate R, CActive Filters
The LTC10S0 is available in standard a·pin metal can, plas·
tic and ceramic dual in line packages as well as an a·pin
soa package. The LTC10S0 can be an improved plug in reo
placement for most standard op amps.
TYPICAL APPLICATiOn
High Performance Low Cost Instrumentation Amplifier
5V
16'
r--dr-,
~3;
: j~
D\FFERE1~~~i J :
.40
VOUT
I
I
I
OJ
IF': CH
12
I
I
R1
R2
-r.j4}-.-+-.w..-........--""'_...J
-5V
1\
40
I
bq
13
.20
.00
80
I
Cs
Noise Spectrum
CMRR>12OdBatOC
,
10
100
lk
10k
lOOk
FREQUENCY (Hz)
CMRfI,>12OdBaI6Otiz
DUAL SUf'PlV OR SINGLE 5V
GAIN =1 +R2/R1
vos ... 5,Il.V
COMMON MODE INPUT VOLTAGE
EQUAlS THE SUPPLIES
2-181
III
LTC10SO
ABSOLUTE .mAXlmum RATinGS
Operating Temperature Range
LTC1050 AM/M ....................... - 55°C to 125°C
LTC1050 AC/C ......................... - 40°C to 85°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ............. 300°C
(Note 1)
rv
Total Supply Voltage + to V-) .................... 18V
Input Voltage ............... + + 0.3V) to
0.3V)
Output Short Circuit Duration .................. Indefinite
rv
rv - -
PACKAGE/ORDEA InFORmATiOn
ORDER PART NUMBER
TOP VIEW
NO
4
vHOICKAGE
8 LEAD METAl CAN
TOP VIEW
"D'"
-IN 2
7 V+
+IN 3
V-4
6 OUT
SEXTCUlCK
INPUT
JPACKAGE
NPACKAGE:
8lEADCEAAMICDlP 8 lEAD PLASTIC DIP
TOP VIEW
LTC1050AMH
LTC1050MH
LTC1050ACH
LTC10SOCH
ORDER PART NUMBER
LTC10SOCS8
SSPACKAGE
8 LEAD PLASTIC SOle
LTC1050AMJ8
LTC10SOMJ8
LTC1050ACJ8
LTC1050CJ8
LTC1050ACN8
LTC10SOCN8
LTC1050ACN
LTC1050CN
.""""'"
14 LEAD PLASTIC DIP
ELECTRICAL CHARACTERISTICS
=
=
VS ± 5V, TA operating temperature range unless otherwise specified.
PARAMETER
Input Offset Voltage
Average Input Offset Drift
Long Term Offset Voltage Drift
Input Offset Current
CONDITIONS
TA=25°C (Note 3)
(Note 3)
Input Bias Current
TA =25°C (Note 5)
Input Noise Voltage
O.lHzto 10Hz (Note 6)
DCtolHz
f = 10Hz (Note 4)
VCM=V- to +2.7V, TA=25°C
Input Noise Current
Common Mode Rejection Ratio
Power Supply· Rejection Ratio
Large Signal Voltage Gain
Maximum Output Voltage Swing
Slew Rate
Gain Bandwidth Product
Supply Current
Internal Sampling Frequency
2-182
TA=25°C (Note 5)
Vs= ±2.375Vto ±8V
RL = 10kll, VOl1T= ±4V
RL = lOkI!
RL = 100kll
RL = 10kll, CL= 50pF
No Load, TA = 25°C
LTC1050AM
TYP
MAX
±0.5
±5
±o.ol ±0.05
50
±2O
±60
±150
±10
±30
±800
2.1
1.6
0.6
2.2
120
140
120
125
140
160
130
±4.7 ±4.85
±4.95
4
2.5
1
1.5
2.3
2.5
MIN
•
•
•
•
•
•
•
•
LTC1050AC
TYP
MAX
±0.5
±5
±0.01 ±0.05
50
±2O
±60
±150
±3jJ
±10
±100
2.1
1.6
0.6
2.2
120
140
120
125
140
130
160
±4.7 ±4.85
±4.95
4
2.5
1
1.5
2.3
2.5
MIN
UNITS
"V
"VloC
nV/.JMO
pA
pA
pA
pA
"Vp.p
"Vp.p
fA/../HZ
dB
dB
dB
dB
V
V
V/"s
MHz
rnA
rnA
kHz
LTC1050
ELECTRICAL CHARACTERISTICS
VS = :!: 5V, TA =operating temperature range unless otherwise specified.
PARAMETER
Input Offset Voltage
Average Input Offset Drift
Long Term Offset Voltage Drift
Input Offset Current
TA= 25°C (Note 5)
Input Bias Current
TA = 25°C (Note 5)
Input Noise Voltage
As = 1000, O.IHz to 10Hz (Note 6)
Rs= 1000, OCto 1Hz
f = 10Hz (Note 4)
VCM=V- to +2.7V,TA=25°C
Input Noise Current
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Maximum Output Voltage Swing
Slew Rate
Gain Bandwidth Product
Supply Current
CONDITIONS
TA = 25°C (Note 3)
(Note 3)
LTC1050M
TYP
MAX
±0.5
±5
±0.01 ±0.05
50
±loo
±2O
±200
±10
±50
±10oo
1.6
0.6
2.2
114
130
110
120
140
120
160
±4.7 ±4.85
±4.95
4
2.5
1.5
I
2.3
2.5
MIN
•
•
Vs= ±2.375Vto ±8V
RL = 10kO, Vour= ±4V
RL = 10kll
RL =lookO
RL = 10kll, CL= 50pF
No Load, TA= 25°C
•
•
•
•
•
•
Internal Sampling Frequency
MIN
LTC1050C
TYP
±0.5
±0.01
50
±20
±10
114
110
120
120
±4.7
MAX
±5
±0.05
±125
±200
±75
±150
2.5
~V
~VloC
nV/.JMO
pA
pA
pA
pA
~Vp.p
1.6
0.6
2.2
130
140
160
±4.85
±4.95
4
2.5
I
UNITS
~VP1l
fA/v'Hz
dB
dB
dB
dB
V
V
V/~s
1.5
2.3
MHz
rnA
rnA
kHz
Note 3: These parameters are guaranteed by design. Thermocouple effects
preclude measurement of these voltage levels in high speed automatic test
systems. Vas is l)1easured to alimit determined by test equipment capability.
Note 4: Current Noise is calculated from the formula: In = ,j(2q olb) where
q = 1.6 x 10- 19 Coulomb.
Note 5: AtTAsooC these parameters are guaranteed by design and not
tested.
Note 6: Every lot of LTCI050AM and LTC1050AC is 100% tested for Broad·
band Noise @ 1kHz and sample tested for Input Noise Voltage @ 0.1 Hz to
10Hz.
The • denotes the specifications which apply over the full operating tern·
perature range.
Note 1: Absolute Maximum ratings are those values beyond which life of
the device may be impaired.
Note 2: Connecting any terminal to voltages greater than V+ or less than
V- may cause destructive latch·up.lt is recommended that no sources
operating from external supplies be applied prior to power·up of the
LTCI050.
TEST CIRCUITS
DC·10Hz Noise Test Circuit
Electrical Characteristics Test Circuit
475k
1M
100k
FOR 1Hz NOISE BW INCREASE ALL THE CAPACITORS BY A FACTOR OF 10.
2-183
LTC1050
TYPICAL PERFORmAnCE CHARACTERISTICS
Offset Voltage vs Sampling
Frequency
Common·Mode Input Range vs
Supply Voltage
10Hzp.p Noise vs Sampling
Frequency
10
II
Vd='",5V
v"
Vs= ",5V
I
~
I
,.
I
II
o
o
2
...... ~M=V-
""
/
/
2.5
3
3.5
4
SAMPLING FREQUENCY, Is (kHz)
Sampling Frequency vs Supply
Voltage
..........
-6
-8
100
4.5
10k
1k
SAMPLING FREQUENCY, Is (Hz)
Sampling Frequency vs
Temperature
o
",1
,(
/'
-- --
.......
-
I'---..
r-.....
",8
-I t-- 0.5mo
VS=I",5V
..........
.........
Overload Recovery
TA=1250C
-/
r-.....
±2 ",3 ",4 ",5 ",6 ",7
SUPPLY VOLTAGE (V)
3.5
V
.,,-
OV-
r-- r-
OUTPUT {
-5V-
AV=-100 Vs=",5V
o
1.5
4
10
12
14
-50
16
TOTAL SUPPLY VOLTAGE, V+ TO V- (V)
Supply Current vs Supply Voltage
2.0
TA=125 o C
1.25
~
1
,.:
i/
~
cr .75
"<.>~
ll: .SO
I
"
en
I
--- ---
/
V"
I
!1.4 ...........
.2
'"
;::; 1.2
~
"
;:
~
en
1.0
16
~
:.........
0.8
0.6
cr
-- -
"<.>
!:;
f - - f---voJ=V
~
/
2
f
0
5- 10
"
~
c::;
0.2
o
~-20
f - - ~OUT-V+
:I:
en
-~
~
SO
m wo
AMBIENT TEMPERATURE, TA(OC)
.-t;;
V V
o
0.4
-SO
4
,.:
~
o
2-184
!
1.6
o
6
8
10
12
14
TOTAL SUPPLY VOLTAGE, V+ TO V ~ (V)
Output Short Circuit Current vs
Supply Voltage
Vs= ",5V
1.8
.25
4
125
Supply Current vs Temperature
1.5
!
-25
0
25
50
75
100
AMBIENT TEMPERATURE, TA (OC)
-30
1~
4
V
/
ISINK
6
8
10
12
14
TOTAL SUPPLY VOLTAGE, V+ TO V- (V)
16
LTC1050
TYPICAL PERFORmAnCE CHARACTERISTICS
Gain/Phase vs Frequency
Small Signal Transient Response
60
120
Vs= ±5V, TA=25°C
CL=looPiilllnlkll
100
80
...
'"B60
z
~
'"
~
~
Large Signal Transient Response
80
20
160 ~
-20
200
-~
~O
lk
10k
lOOk
FREQUENCY (Hz)
1M
T
:!l
"iii
140
iT.
STEP
40
180
VOUT{
100mV
120 :
GAIN
100
...L
100 ~
HASE
...L
VIN=6V
T
m
AV=+I RL=10kll CL=100pF Vs=±5V
10M
LTC10SO DC to 1Hz Noise
Wt, 1Ii A~ r..~ I~' IU u,.~1 ~ AI,, Ml IlA ,UA ~~...,. lAd
IJJiJ IAI JI~ ~1
~~
VV
v~
~v
~
V'
J
'p
'V
'VI ~V 'V' ~.-,
"~
~.
r~,
~
A~,
'~Jf' r~ ,
J.-1O SEC--i
LTC1050 DC to 10Hz Noise
r
1.0~V
+
L\ ~ "A.
I' "
IV'r
I
~.
'r\
IJ~I~.
'I
~
~
~
~
,
IA~ WA1AA
r~
~L, ~A t.~ 1.1
,.fr' ~W\
~ IU'Y
'\
.IV~\ A~V
.. AI iA11\tN
rv'
' J IJ
WI
IM(
'I
2-185
LTC1050
APPLICATions InFoRmATion
ACHIEVING PICOAMPEREIMICROVOLTPERFORMANCE
Picoamperes
In order to realize the picoampere level of accuracy of the
LTC1050, proper care must be exercised. Leakage currents
in circuitry external to the amplifier can significantly degrade performance. High quality insulation should be
used (e.g., Teflon, Kel-F); cleaning of all insulating surfaces to remove fluxes and other residues will probably be
necessary - particularly for high temperature performance. Surface coating may be necessary to provide a
moisture barrier in high humidity environments.
Connectors, switches, relay contacts, sockets, resistors,
solder, and even copper wire are all candidates for thermal
EMF generation. Junctions of copper wire from different
manufacturers can generate thermal EMFs of 200nV/oC 4 times the maximum drift specification of the LTC1050.
The copper/kovar junction, formed when wire or printed
circuit traces contact a package lead, has a thermal EMF
of approximately 35!1V/oC - 700 times the maximum drift
specification of the LTC1050.
Board leakage can be minimized by encircling the input
connections with a guard ring operated at a potential
close to that of the inputs: in inverting configurations the
guard ring should be tied to ground; in non-inverting connections to the inverting input (see Figure 1). Guarding
both sides of the printed circuit board is required. Bulk
leakage reduction depends on the guard ring width.
Minimizing thermal EMF-induced errors is possible if
judicious attention is given to circuit board layout and
component selection. It is good practice to minimize the
number of juctions in the amplifier's input Signal path.
Avoid connectors, sockets, switches and relays where
possible. In instances where this is not pOSSible, attempt
to balance the number and type of junctions so that differential cancellation occurs. Doing this may involve deliberately introducing junctions to offset unavoidable
junctions.
OPTIONAL
Figure 2 is an example ot the introduction of an unnecessary resistor to promote differential thermal balance.
Maintaining compensating junctions in close physical
proximity will keep them at the same temperature and reduce thermal EMF errors.
txT~~~~~ 0 5
NOMINALLY UNNECESSARY
RESISTOR USEO TO
THERMALLY BALANCE OTHER
INPUT RESISTOR
Figure 1.
~---,.-
Microvolts
Thermocouple effects must be considered if the LTC1050's
ultra low drift is to be fully utilized. Any connection of
dissimilar metals forms a thermoelectric junction producing an electric potential which varies with temperature
(Seebeck effect). As temperature sensors, thermocouples
exploit this phenomenon to produce useful information. In
low drift amplifier circuits the effect is a primary source of
error.
2-186
Figure 2.
OUTPUT
LTC1050
APPLICATions InFoRmATion
When connectors, switches, relays and/or sockets are
necessary they should be selected for low thermal EMF
activity. The same techniques of thermally balanCing and
coupling the matching junctions are effective in reducing
the thermal EMF errors of these components.
Resistors are another source of thermal EMF errors. Table
1shows the thermal EMF generated for different resistors.
The temperature gradient across the resistor is important,
not the ambient temperature. There are two junctions
formed at each end of the resistor and if these junctions
are at the same temperature, their thermal EMFs will cancel each other. The termal EMF numbers are approximate
and vary with resistor value. High values give higher thermal EMF.
plifier 1/f noise, yet still low enough to allow internal circuits to settle. The oscillator of the internal clock circuit
has a frequency 4 times the sampling frequency and its
output is brought out to pin 5through a2kO resistor. When
the LTC1050 operates without using an external clock, pin
5should be left floating and capacitive loading on this pin
shoud be avoided. If the oscillator signal on pin 5 is used
to drive other external circuits, a buffer with low input
capacitance is required to minimize loading on this pin.
Figure 3 illustrates the internal sampling frequency versus
capacitive loading at pin 5.
IIII
_l~IJI±5v
r--....
Table 1. Resistor Thennal EMF
Resistor Type
lin Oxide
Carbon Composition
Metal Film
Wire Wound
Evenohm
Manganin
~
Thennal EMF/·C Gradient
-mV/DC
-450~V1°C
-20~V/oC
-2~V1°C
-2~V1°C
PACKAGE-INDUCED OFFSET VOLTAGE
Package-induced thermal EMF effects are another import ant source of errors. It arises at the copper/kovar j unctions formed when wire or printed circuit traces contact a
package lead. Like all the previously mentioned thermal
EMF effects, it is outside the LTC1050's offset nulling loop
and cannot be cancelled. Metal can H packages exhibit
the worst warm-up drift. The input offset voltage specification of the LTC1050 is actually set by the package-induced
warm-up drift rather than by the circuit itself. The thermal
time constant ranges from 0.5 to 3 minutes, depending on
package type.
OPTIONAL EXTERNAL CLOCK
An external clock is not required for the LTC1050 to operate. The internal clock circuit of the LTC1050 sets the nominal sampling frequency at around 2.5kHz. This frequency
is chosen such that it is high enough to remove the am-
5
10
100
CAPACITANCE LOADING (pF)
Figure 3. Sampling Frequency vs
Capacitance Loading at Pin 5
When an external clock is used, it is directly applied to
pin 5. The internal oscillator signal on pin 5 has very low
drive capability and can be over-driven by any external
signal. When the LTC1050 operates on ± 5V power supplies, the external clock level is TIL compatible.
Using an external clock can affect performance of the
LTC1050. Effects of external clock frequency on input offset voltage and input noise voltage are shown in the section of typical performance characteristics. The sampling
frequency is the external clock frequency divided by 4. Input bias currents at temperatures below 100°C are dominated by the charge injection of input switches and they
are basically proportional to the sampling frequency. At
higher temperatures, input bias currents are mainly due to
leakage currents of the input protection devices and are
insensitive to the sampling frequency.
2-187
LTC1050
APPLICATions InFoRmATion
connected to pin 1 and a which are not needed for the
LTC1050. Pin 1and pin aof the LTC 1050 are not connected
internally while pin 5 is an optional external clock input
pin. The LTC1050 can be a direct plug in for the 7650 and
7652 even if the two capacitors are left on the circuit
board.
LOW SUPPLY OPERATION
The minimum supply for proper operation of the LTC1050
is typically below 4.0V ,( ±2.0V). In single supply applica·
tions, PSRR is guaranteed down to 4.7V (± 2.35V) to en·
sure proper operation down to the minimum TIL specified
voltage of 4.75V.
In applications operating from below +16V total power
supply, (±aV), the LTC1050 can replace many industrystandard operational amplifiers such as the 741, LM101,
LM10a, OP07, etc. For devices like the 741 and LM101, the
removal of any connection to pin 5is all that is needed.
PIN COMPATIBILITY
The LTC1050 is pin compatible with the a-pin versions of
7650, 7652 and other chopper-stabilized amplifiers. The
7650 and 7652 require the use of two external capacitors
TYPICAL APPLICATiOnS
Strain Gauge Signal Conditioner with Bridge Excitation
5V....;,;12¥OIl~2,5~V_ _ _ _ _--1_---;=-_---1r5V
LT1009
OUTPUT
~...--t-- (±2,5V)
~"""'3v\'Ol"""k-< ~~~o
RN60C
5V
6
2k
2N2907
5111
2W
'OPTIONAL REFERENCE OUT TO MONITORING 10 BIT A/D CONVERTER
"AT GAIN =1000, 10Hz PEAK-TO-PEAK NOISE IS < 112 LSB FOR 10
BIT RESOLUTION
-5V
Single Supply Thermocouple Amplifier
1%
1k
1%
1000
255k
5V
5V
2
VOUT
10mV/oC
LT1025A
DOC -lDO°C TEMPERATURE RANGE
2-188
LTC1050
TYPICAL APPLICATions
Battery Operated Temperature Monitor with 10"Bit Serial Output AID
VIN=9V
1N4148
LTC1092
1(;5
Vee
>'"4~'114711°1r-1_ _-"i2 +IN
CLK 7
3 -IN
DOUT 6
4 GND
VREF 5
1
TO
Ell
,.P"
O'C -500'C TEMPERATURE RANGE
2'C MAX ERROR
"THERMDCOUPLE LINEARIZATION CODE AVAILABLE FROM LTC
Air Flow Detector
10k
5V
100k
1%
1k
LT1004
-1.2
5V = NO AIR FLOW
OV=AIR FLOW
4320
1%
AMBIENT
TEMPERATURE
STILL AIR
2400
TYPE K
1I
AIR FLOW
2-189
LTC10SO
TYPICAL APPLICATions
Fast Precision Inverter
10k
1%
:!: 100mA Output Drive
10k
1%
10k
VIN-.....,.~....- - - - - -....- - - - - - - - - .
INPUT-"""'~""'--------1~--'lJ"","----.
5pF
100k
VOUT
~
",100mA
RL
OUTPUT
VOS=5~V
VOS/AT= 50nV/'C
GAIN=10
FULL POWER BANDWIDTH = 10kHz
FULL POWER BANDWIDTH = 2M Hz
":'
SLEW RATE"'40V/~S
SETTLING TIME=5~S TO 0.01% (10V STEP)
OFFSET VOLTAGE = 5~V
OFFSET DRIFT=50nV/'C
Ground Referred Precision Current Sources
LT1034
OSIOUTs25mA'"
0.2V"VOUT,,(V+)-2V
V+
'MAXIMUM CURRENT LIMITED BY
POWER DISSIPATION OF 2N2222
IOUT= \2;E~V
+
o"IOUT,,25mA'
V-
(V-)+2V "VOUT" -1.8V
'MAXIMUM CURRENT LIMITED BY
POWER DISSIPATION OF 2N2907
VOUT
LT1034
, ;'
2-190
LTC1050
TYPICAL APPLICATions
Precision Voltage Controlled Current Source
with Ground Referred Input and Output
5V
INPUT
0-3.2V
5V
1k
r--rl:t--,
1001l
I
VIN
• IOUT= 1001l
*
Sample·and·Hold Amplifier
Ultra Precision Voltage Inverter
VOUT
I
I
CL
! TO.0
HOLD
SA~
VIN
1"F
VOUT
--0-f
':'
FOR WSVINs4V. THE HOLD STEP IS s300.V.
ACQUISITION TIME IS DETERMINED BY THE SWITCH RON.
CL TIME CONSTANT
VFOR Vs= ±5V. (V-)+1.BV~-,\IIIY-1-------"'" VOUT (DC ACCURATE)
1--~""5V
• fCUTOFF=0.9 x flC6~
• RC= 0.2244
fCUTOFF
• 6OdB/OCT. SLOPE
• PASSBAND ERROR
Small Signal Transient
Response*
Large Signal Tran"lent
Response*
Gain Phase vs Frequency
120
'v~'':: ±5V
100
.lllltoOPF
80
PH1~W
~
:r
120dB DC-20kHz
BANOWlOTH =: 10Hz
OHset Stabilized Comparator
1500
2k
COMPARATOR
COMPARATOR
INPUTS
OUTPUT (::I:: 5V)
10k
GROUND OR
INPUT COMMON- _-1_ _ _ _-1--'
MODE VOLTAGE
I
I
I ttl
I l
~
+5V
T
-5V
18 ':" ' - - - - - - - - - - - -.....
ZERO COMMANO "."
I
+5V=ZER011!r ~-J
-5V=COMPARE
2-208
..
-5V
STATUS OUTPUT
~;~~MPARE
LTC1052/LTC7652
TYPICAL APPLICATions
1Hz -1.25MHz Voltage-to-Frequency Converter ( + 5V Supply)
47011
10k
33k
OUTPUT
1Hz-1.25MHz
10k
FUll-SCALE TRIM
30 1k* (1 25MHz)
....
2k
OVTOVJ~-'W -w.........~~.,
o22,F
I
'=
·TRW MTR-51 + 120ppmrc
-POLYSTYRENE-WESCO # 32-P 1-120ppm/oC
±0.05%
>12OdB
0.01Hz/oC
20ppm/oC
+5V
:L
~
-W--
3.3pF
10k
~ ~-Illt....,----t
I
I
11
LT1DD4
1.2V
O.1~
I
I
LINEARITY
DYNAMIC RANGE
ZERO POINT DRIFT
GAIN ORIFT
No Vos Adjust* CMOS DAC Buffer-Single Supply
Air Flow Detector
10k
+5V
100k
±1%
1k
'11)"::"'-+ Your
FOR HIGHER SPEED. SEE
~~~~ ~~~6~~~~~~~Tr~;~~
LT1DD4-1 2
43.20
:1:1%
10k
=-D.5V
·OFFSET VOLTAGE CAUSES
NONLINEARITY ERRORS.
SEE: "APPLICATION GUIDE
TO CMOS MULTIPLYING D/A
CONVERTERS,"
ANALOG DEVICES. INC.
AMBIENT
TEMPERATURE
STILL AIR + ' -_ _ _....;.;="'-_ _ _-'.
AIR FLOW
2-209
LTC1052/LTC7652
TYPICAL APPLICATions
1Hz - 30MHz Voltage-to-Frequency Converter
+SV
1201l
STABILIZING
AMP
7.Sk
0.1#
O.01.F
-5V
IN
OV-3V
2k
30MHz
TRIM
16.2k'
+SV
lOOk
1000M
10k
1Hz TRIM
lOOk
-SV
'TRW MTR-SI + 120ppm/'C
tWESCO #32-P/-120ppm/'C
O.3Hz/'C ZERO DRIFT
± 0.08% LINEARITY
20ppm/'C GAIN DRIFT
lS0dB DYNAMIC RANGE
±
100mA Output Drive
Increasing Output Current
lOOk
VIN - W_ _- - - - _ - - - - - - . . . . ,
220pF
1M
Your
~± 100mA
10k
INPUT -W_~~\l"
OUTPUT
RL
-5V
.".
VOS=5.V
VosnT=50nV/'C
GAIN=10
FULL POWER BANDWIDTH=lkHz
10k
.".
2-210
LOAD
Sk
2.Sk
lk
22011
lOOk
OUTPUT SWING
±4.92V
±4.84V
±46SV
±3.6SV
10011
-r2000PF
LTC1052/LTC7652
TYPICAL APPLICATions
Single + 5V Thermocouple Amplifier with Cold Junction Compensation
+5V
lOOk
LT1004-1.2
lk
Rl
16900
18m
O.l.F
CF·
Ell
43k
~ -0.5V
17
10k
tYEllOW SPRINGS INST. co. PART #44007
·CHooSE CF TO FILTER NOISE
Increasing Output Current and Voltage (VSUPPLY= ::I: 15V)
THERMOCOUPLE
TYPE
J
K
T
S
Rl
232k
301k
301k
2.1M
DC Stabilized FET Probe
INPUT CAPACITANCE BOOTSTRAP
INPUT
===:..--..r-
INPUT--W...-4~
>------+-OUTPUT
>~~·-:;~;;:.."""'·I LIMIT
STABLE FOR ALL GAINS. INVERTING
AND NON-INVERTING. OBSERVE
LTC1052 COMMON-MODE INPUT LIMITS
10M
10M
lk
BANDWIDTH: 20MHz
tRISE: lOOns
DElAY: 5ns
2-211
LTC1052/LTC7652
TYPICAL APPLICATions
Precision Multiplexed Differential Thermocouple Amplmer
r - - - - r--_-_I....l.-_ _ _--._ _ _ _ _ _...
+5V
I ~~'eiE~~~~g~
I
100k
I
I
I
I
LT1oo4
1.2V
I
I
R1
I
I
I
I
I
I
I
I
L_
I r----t
16900
18711
5k AT
2S"Ct
18200
j~-......._~VOUT=1001 XVTHERMOCOUPLE
I
I
O.1~F
I
1M
O.1~F
I
__..J
1k
I
I
!~"! 0'
I
I
~---W18~~
I
iTO.0047~F L-,._
I~
2-212
15
LTC1043
-sv
tYELLOW SPRINGS INST. CO. PART #44007
-
I-
J
THERMOCOUPLE
TYPE
J
K
T
S
R1
232k
301k
301k
2.1M
LTC1052/LTC7652
TYPICAL APPLICATions
Direct Thermocouple-to-Frequency Converter
·0.01% FILM-TRW MAlHi
uTRW/MTR/51 + 120
RT= YELLOW SPRINGS INST. 1144007
lOOpF =·POLVSTYRENE
tFOR GENERAL PURPOSE (ImV
FUll-SCAlE) 10-BIT A TO D, REMOVE
THERMOCOUPLE-COLD JUNCTION
COLD JUNCTION BIAS
NE!W1lfIK. GROUND POINT A. AND
DRIVE LTCI052 POSITIVE INPUT.
Direct 10-8it Strain Gauge Digitizer
DATA OUTPUT =
1N4148
ffil¥. = 1000 COUNTS FULL-SCALE
·0.1 % METAL FILM TRW MAR-5
SWI =MAIN CURRENT SWITCH
SW2=CURRENT LOADING COMPENSATION SWITCH
1N4148
i---~:\-~----------i
I
DlRECTLV ACROSS
BRIDGE DRIVE
lOOk
10k
I
CONNECT TO BRIDGE END OF
470k RESISTOR
~
~
2
~
IL _____________
POINTS
~~~:~iIR I
2-213
LTC1052/LTC7652
TYPICAL APPLICATions
16-Bit A- 0 Converter
75k'
CURRENT SINK
DATA OUTPUT =
{§H}
100,000 COUNTS FULL-SCALE
NO ZERO TRIM
20ppm/"C GAIN ORIFT
'VISHAY S-102 RESISTOR
2-214
CURRENT
SWITCH
LTC1052/LTC7652
TYPICAL APPLICATions
Precision Isolation Amplifier
1k"
74C04
10k
20k
ZERO TRIM
-15V--'WIr--+15V
• 100k"
30pF
22M
100k
1000PF
T
OUT
1k GAIN
INPUT
TRIMm
+15V
10k
13.3k"
74C04
1N414B
10k"
FLOATINGI25~~
SUPPlY
OUTPUTS
11k
~~~+-----~------<
250V ISOLATION
o03% ACCURACY
"1% FILM RESISTOR
1.Bk
+15V
2-215
LTC1052/LTC7652
PACKAGE DESCRIPTiOn
Dimensions in inches (millimeters) unless otherwise noted.
H Package
Metal Can
N8 Package
8 Lead Plastic
J8 Package
8 Lead Hermetic Dip
O
.,
f9--1 . . .!.. .
'!
b:oJ=r-=r"·
0.220-1.310
i&.iiiI-7.i14i
.~
JL ,. .
JL ,.....
j1.i1ij
fUiij
"'"
.9:!!!..
flUIIB)
'.Il0l
..
j1.ii4j
AX
_
r:::=~D~J~
lrDDII5
,.,,,!,.,,. ·t'~f-
___
IDM~)
-H
(U31-4.44&)
-;;;;!O.145
(lI2'.3.BB3)
o.03D-O.D60
(0.7&2-1.524)
m
~
(11.166-0.1114)
'"
'LEADSWITHNDOO7OF'TfU:POSITKJN(TP)ATGN.JGePlAtE
J Package
14-Lead Hermetic DIP
2-216
Tjmax
ajA
150'C
BO'C/W
'UADSWI1lIN 0 007 (;f TRUE POSITION (TP}AT GAUGE PLANE
N Package
14-Lead Plastic
L'",,,,,OlI
nll\D
~, TECHNOLoG~k>~C-ho-p-p-e-r--S-ta-b-ili-ze-d-O-p-e-ra-ti-o-na-I
LTC10 52CS
Amplifier (CSOATM)
FEATURES
DESCRIPTiOn
5p.V
Guaranteed Max. Offset
O.05p.V/oC
Guaranteed Max. Offset Drift
Typ. Offset Drift
O.~1f1V/oC
100nVI Month
Excellent Long Term Stability
30pA
Guaranteed Max. Input Bias Current
Over Operating Temperature Range
Guaranteed Min. Gain
120dB
Guaranteed Min. CMRR
120dB
Guaranteed Min. PSRR
120dB
• Single Supply Operation
4.75V to 16V
(Input Voltage Range Extends to Ground)
• External Capacitors can be Returned to V- with No
Noise Degradation
The LTC1052 is a low noise chopper·stabilized op amp
(CSOA) manufactured using Linear Technology's enhanced
LTCMOS™silicon gate process. Chopper-stabilization constantly corrects offset voltage errors. Both initial offset and
changes in the offset due to time, temperature and
common-mode voltage are corrected. This, coupled with picoampere input currents, gives this amplifier unmatched
performance.
•
•
•
•
•
•
The chopper circuitry is entirely internal and completely
transparent to the user. Only two external capacitors are
required to alternately sample and hold the offset correction voltage and the amplified input signal. Control circuitry is brought out on the 14-pin version to allow the
sampling of the LTC1052 to be synchronized with an external frequency source.
APPLICATions
•
•
•
•
Low frequency (1ff) noise is also improved by the chopping
technique. Instead of increasing continuously at a3dB/octave rate, the internal chopping causes noise to decrease
at low frequencies.
Thermocouple Amplifiers
Strain Gauge Amplifiers
Low Level Signal Processing
Medical Instrumentation
The LTC1052CS is a direct replacement for the ICL7652 in
surface mounted packages.
Ultra Low Noise, Low Drift Amplifier
LTC1052 Noise Spectrum
160
140
~'E= 120
/
~ 100
0;
~ 80
~
60
~
40
'">
20
z
gj
......-v1llr-+5V
INPUT ~I---""'I
OUTPUT
Vos=3"V
o
-
~
\
\
\
A
"
',.I
o
100
200
300
FREQUENCY (Hz)
400
500
1000
Vo~T=50nV/oC
CSOA™ and LTCMOS™ are trademarks of Unear Technology Corporation
NOISE=0.06"Vp-p 0.lHz-l0Hz
Tef(on™ IS a trademark of DuPont
2-217
LTC1052CS
A8S0LUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
ORDER PART
NUMBER
(Notes 1and 2)
Total Supply Voltage (V+ to V-)...................... 18V
Input Voltage................... (V+ +0.3V) to (V- - 0.3V)
Output Short Circuit Duration .................. Indefinite
Operating Temperature Range .......... " - 40°C to 85°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
LTC1052CS
PART MARKING
LTC1052CS
ELECTRICAL CHARACTERISTICS
Vs
=:!: 15V, TA =operating temperature range, test circuit TC1 (Note 6~ unless otherwise specified.
SYMBOL
Vos
!:J.Vos
!:J.Temp
!:J.Vos
!:J.Time
los
PARAMETER
Input Offset Voltage
Average Input Offset Drift
CONDITIONS
TA = 25°C (Note 3)
(Note 3)
MIN
•
Long Term Offset Voltage Stability
Input Offset Current
LTC1052C
TYP
MAX
:1:0.5
:1:5
:1:0.01 :1:0.05
100
UNITS
~V
p,V/oC
nVNMonth
pA
pA
Input Bias Current
:1:1
pA
TA = 25°C
18
pA
Input Noise Voltage
As = 100n, DC to 10Hz, TC3 (Note 6)
1.5
p,Vp·p
enp-p
p,Vp·p
0.5
Rs = 10011, DC to 1Hz, TC3 (Note 6)
Input Noise Current
0.6
f = 10Hz (Note 5)
fAlv'ffz
in
Common·Mode Rejection Ratio
120
140
dB
CMRR
VCM = V- to + 2.7V
Power Supply Rejection Ratio
120
150
dB
PSRR
VSUPPLY= ±2.375Vto ±8V
150
120
Large Signal Voltage Gain
dB
RL=10k, Vour= ±4V
AVOL
:1:4.85
Maximum Output Voltage Swing
±4.7
V
RL=10k
Vour
V
(Note 4)
:1:4.95
RL=I00k
V/p,S
Slew Rate
4
SR
RL = 10k, CL= 50pF
GBW
Gain Bandwidth Product
1.2
MHz
Supply Current
1.7
2.0
rnA
No Load, TA = 25°C
Is
3.0
rnA
Internal Sampling Frequency
330
Hz
fs
p,A
Clamp On Current
25
100
RL = lOOk
10
100
pA
Clamp Off Current
-4V-
~
""
Wr--~--+~-~~+--1
~
rT1055H iACKAGE
10
II..
J
10
5
V LT1055CN8
J:: ~T1056 H PACKAGE r--
/?
30
20
~
Pi
40
til
401-t-t-t-
Vs= ,.15V
40 TA=25°C
~
'"z=>
~ 60 r-+-~-+-+-H
50
VS=,.15V
TA=25°C
w
:s=>80r-+-~-+-++J~IA-I-+-l--1
'"
- 800 - 600 - 400 - 200 0 200 400 600 800
INPUT OFFSET VOLTAGE (/LV)
~ 80
§; 60
'''''I.
o LL.:.""""""'"
-120
Warm-Up Drift
120
v
80
80
40
100
LT1056
=>
!!. '"
z
C')
140 Vs= ,.15V
." rv' IAII..
~
~
~
Distribution of Offset Voltage
Drift with Temperature
(H Package)*
II..
s:
:sa:
;;:
-80 1-------1"'-:11="9---\---\--+--1 -8oo~
is
~
Av= + 1, CL = lOOpF, 0,5!1S/OIV
AV=I, CL = 100pF, 0.5,.s/OIV
Undistorted Output Swing vs
Frequency
30
Slew Rate, Gain-Bandwidth vs
Temperature
Output Impedance vs
Frequency
100
Vs-± 15V
TA=25°C
\"
8
\
6
l\
\
LT1055
4
LT1058
~
~
5'\
;g
:r
~
-.::r
§:
w
'-'
z
""
~
.
~
0.1
10M
-25
25
75
TEMPERATURE (OC)
125
...,
'"
~
~T1056
~
"II~
100
:!i
140
~
gJ
~
-20
10
~
~ 10f-~~~-4-~~~~~
~
1
~LT
lk 10k lOOk 1M
FREQUENCY (Hz)
10M 100M
1M
:;-
300
~
G
z
'" 100
-
Vs
Vo
::-
±15V
±10V
RL 2k
~
~~.......
-.....;:
~
'"
w
'"
i:§
0
>
30
160
VS=±15V
-10 TA=25°C
1
I
/.
10k
lOOk
FREQUENCY (Hz)
Vonaga Gain vs Temperature
120 ~
m055
20
V,
2Of----""''''''''
~
105E
/.
lk
Gain, Phase Shift vs Frequency
VS-±15V
120 TA=25°C
BO
r~~~~
: Av:,,'
1000
~
/.
=>
Vs= ±15V
10= lMHz FOR GBW
........
Gain vs Frequency
r- ~
V.
~
VXL
0
140
100
10
It-"V:"
r105~
~
1M
FREQUENCY (Hz)
100k
'~"
~~!?1~
z
15
c:
2
o
0:>
2
4
FREQUENCY (MHz)
8 10
10
-75
-25
25
75
TEMPERATURE (OC)
125
2-223
LT1055/LT1056
TYPICAL PERFORmAnCE CHARACTERISTICS
LT1055 Settling Time
Common-Mode Range vs
Temperature
LT1056 Settling Time
+15
+14
_+13
>
~ +12
to
z
~
+11
w
§ ±10
::>
~ -11
::;
::> -12
8
-13
-14
Vs= ±15V
-15
1
2
SmUNG TIME (,.s)
1
2
SmUNG TIME (,.s)
Common-Mode and Power
Supply Rejections vs
Temlwature
100
Ii> 110
VS=±15V
TA=25'C
~
""
80
:e
Ii>
:e
'"
'"
::>
PSRR
'"~
~
-25
25
75
TEMPERATURE ('C)
60
~Ul
t\.
"\
o
10
100
"-
lk
10k lOOk
FREQUENCY (Hz)
1M
"'
'"
60
en
40
~
=>
~
10
~
~
b
g
5
~=125'C
I
LT1055 TA= -55'C
0
-3
~ -6
o -9
~r125'C
-12
o
o
2-224
~
TA= -55'C
±5
±10
±15
SUPPLY VOLTAGE (V)
±20
100
I
i"o
20
10
=>
'-'
!:::
"
1M
10M
~
~j
-40
1111
300
lk
3k
LOAD RESISTANCE (II)
-20
~ -30
TA=125'C
10k
-
TA= -55'C
TA-25'C
TA=125'C
SOURCING
I I
Vs= *15V
~ -10
TA=25'C
.... ~
-15
Vs=± 15V
I
lk
10k
lOOk
FREQUENCY (Hz)
...........
30
:[
i
Ul~5,lc
A T 1-
...........
40
~TA=25'C
§g
LT1056 TA= -55'C
100
Short Circuit Current vs Time
50
11'111
AI~
_25'C_
I'-..
20
o
10M
12 T = !55!C
_25'C;
-
'"
15
~
,,
80
Output Swing vs Load
Resistance
Supply Current vs Supply
Voltage
r-.. POSITIVE_
~
,SUPPLY
NEGATI~
SUPPLY
~
z
40
125
,
~100
20
90
TA=25'C
Ii> 120
Q
'-'
CMRR
::>
'-' 100
140
:e
'-"\
100
Power Supply Rejection Ratio
vs Frequency
120
Vs= ±10VTO ±17V FOR PSRR
Vs= ± 15V, VCM= ± 10,5V FOR CMRR
60
TEMPERATURE ('C)
Common-Mode Rejection Ratio
vs Frequency
120
o
-50
-50
--
~INKIN~
I
I
TA 125'C
TA 25'C
TA-
V
o
1
55'C
2
3
TIME FROM OUTPUT SHORT TO GROUND (MINUTES)
LT1055/LT1056
APPLICATions InFORmATion
The LT1055/1056 may be inserted directly into LF155A1
355A, LF156A1356A, OP-15 and OP-16 sockets. Offset
nulling will be compatible with these devices with the
wiper of the potentiometer tied to the positive supply.
Offset Nulling
I
N/C
v+
OUTPUT
OFFSET
'6\ . i"
7
1
...-~-v+
OFFSET'~4
TRIM
OUT
No appreciable change in offset voltage drift with temperature will occur when the device is nulled with a potentiometer, Rp, ranging from 10k to 200k.
The LT1055/1056 can also be used in LF351 , LF411,
AD547, AD611, OPA-111, and TLOB1 sockets, provided
that the nulling circuitry is removed. Because of the
LT1055/1056's low offset voltage, nulling will not be
necessary in most applications.
Achieving Picoampere/Microvolt Performance
In order to realize the picoampere-microvolt level accuracy of the LT1055/1056 proper care must be'exercised. For example, leakage currents in circuitry external
to the op amp can significantly degrade performance.
High quality insulation should be used (e.g. Teflon™,
Kel-F); cleaning of all insulating surfaces to remove
fluxes and other residues will probably be required. Surface coating may be necessary to provide a moisture barrier in high humidity environments.
Board leakage can be minimized by encircling the input
circuitry with a guard ring operated at a potential close to
that of the inputs: in inverting configurations the guard
ring should be tied to ground, in non-inverting connections to the inverting input at pin 2. Guarding both sides
of the printed circuit board is required. Bulk leakage
reduction depends on the guard ring width.
Teflon™is a trademark of DuPont.
,
v-
Ell
The LT1 055 I 1056 has the lowest offset voltage of any
JFET input op amp available today. However, the offset
voltage and its drift with time and temperature are still not
as good as on the best bipolar amplifiers because the
transconductance of FETs is considerably lower than that
of bipolar transistors. Conversely, this lower transconductance is the main cause of the significantly faster
speed performance of FET input op amps.
Offset voltage also changes somewhat with temperature
cycling. The AM grades show a typical 20l'V hysteresis
(30fLV on the M grades) when cycled over the - 55°C to
125°C temperature range. Temperature cycling from O°C
to 70°C has a negligible (less than 10fLV) hysteresis
effect.
The offset voltage and drift performance are also affected
by packaging. In the plastic NB package the molding
compound is in direct contact with the chip, exerting
pressure on the surface. While NPN input transistors are
largely unaffected by this pressure, JFET device matching and drift are degraded. Consequently, for best DC
performance, as shown in the typical performance distribution plots, the TO-5 H package is recommended.
Noise Performance
The current noise of the LT1 055 I 1056 is practically immeasurable at 1.BfAl.JHz. At 25°C it is negligible up to
1GO of source resistance, Rs (compared to the noise of
Rs). Even at 125°C it is negligible to 100MO of Rs.
2-225
LT1055/LT1056
APPLICATions InFoRmATion
The voltage noise spectrum is characterized by a low 1If
corner in the 20Hz to 30Hz range, significantly lower than
on other competitive JFET input op amps. Of particular
interest is the fact that, with any JFET IC amplifier, the
frequency location of the 1If corner is proportional to the
square root of internal gate leakage currents and, therefore, noise doubles every 20°C. Furthermore, as illustrated in the noise versus chip temperature curves,
the 0.1Hz to 10Hz peak-to-peak noise is astrong function
of temperature, while wideband noise (fa = 1kHz) is
practically unaffected by temperature.
Consequently, for optimum low frequency nOise, chip
temperature should be minimized. For example, operating
an LT1056 at ± 5V supplies or with a 20°C/W case-toambient heat sink reduces 0.1 Hz to 10Hz noise from typically 2.5/-tVp-p (± 15V, free-air) to 1.5/-tVp-p. Similarly, the
noise of an LT1 055 will be 1.8/-tVp-p typically because of its
lower power dissipation and chip temperature.
the input pulse is merely used to steer current through
the diode bridges. For more details, please see Application Note 10.
As with most high speed amplifiers, care should be taken
with supply decoupling, lead dress and component
placement.
When the feedback around the op amp is resistive (RF), a
pole will be created with RF, the source resistance and
capaCitance (Rs, Cs), and the amplifier input capacitance (CIN =4pF). In low closed loop gain configurations
and with Rs and RF in the kilohm range, this pole can
create excess phase shift and even oscillation. A small
capacitor (CF) in parallel with RF eliminates this problem.
With Rs(Cs + CIN) =RFCF, the effect of the feedback
pole is completely removed.
High Speed Operation
Settling time is measured in the test circuit shown. This
test configuration has two features which eliminate problems common to settling time measurements: (1) probe
capaCitance is isolated from the' 'false summing" node,
and (2) it does not require a "flat top" input pulse since
OUTPUT
Settling Time Test Circuit
+15V
AUT OUTPUT
10k
2k
50!l
PULSE GEN
2W
INPUT -+--'W1I---1
(5V MIN STEP)
+15V
+15V
30
HP5082-2810
HEWLETT
PACKARD
2k
OUTPUT
TO
SCOPE
30
.".
-+I- =1N4148
-15V
2-226
-15V
1...-r~
LT1055/LT1056
APPLICATions InFoRmATion
Phase Reversal Protection
Most industry standard JFET input op amps (e.g.,
LF1551 i 56, LF351 , LF411, OP15/16) exhibit phase
reversal at the output when the negative common-mode
limit at the input is exceeded (i. e., from -12V to - 15V
with ± 15V supplies). This can cause lock-up in servo
systems. As shown below, the LT1055/1056 does not
have this problem due to unique phase reversal protection circuitry (Q1 on simplified schematic).
Voltage Follower with Input Exceeding the Negative
Common-Mode Range
1m1~~~"""OUTPUT
INPUT
",15V-I.. :·..:n
2k
SINE WAVE
-15V
INPUT
OUTPUT
(LF155/56, LF411, Op..15/16)
O.5ms/DiV
O.5ms/DiV
OUTPUT
LTl055/56
O.5ms/DiV
TYPICAL APPLICATIONS t
Exponential Voltage-to-Frequency Converter for Music Synthesizers
INPUT
OV-l0V
EXPONENT
TRIM
.".
11.3k*
250U"
2N3904
5OO!l"
3.57k"
ZERO
TRIM
Uk
4.7k
+15V
5620"
SAWTOOTH
OUTPUT
-15V
lk"
.".
LM329
.".
10k"
1k"
10k"
4.7k
27-""""".........-..:-:;---H - - -,
I
I
SCALE FACTOR
-15V
.".
I
1V IN/OCTAVE OUT
I
I
"1 % METAL FILM RESISTOR
.".
PIN NUMBEREDTRANSISTORS=CA3096 ARRAY L _ ..2!'~~~O~O~~ _ _ _ _ _ _ .J
7
33!l
t
For ten additional applications utilizing the LT1055 and
LTl 056. please see the LTel 043 data sheet and Application Note 3.
2-227
LT1055/LT1056
TYPICAL APPliCATiOns
12-Blt Charge Balance Analog-to-Dlgital Converter
Fast "No Trims" 12-BII Muhiplying CMOS OAC Amplifier
74COO
TYPICAL 12-BIT
CMOS OAC
Fast, 16-811 Current Comparator
DELAY "'2500,
• =1% FILM RESISTOR
+--....- ......."'N_+15V
CIRCUIT OUTPUT
RATIO fourlA)
fCLK(B)
Temperature-IO-Frequency Converter
TTL OUTPUT
OKHz-lkHz=
O·C-l00·C
2-228
LT1055/LT1056
TYPICAL APPLICATions
100kHz VoHage Controlled Oscillator
·1% FILM RESISTOR
+15V
SINE OUT
-*""=lN4148
FRED LlNEARITY=O.l%
FRED STABILITY =lSOppmrc
SmLING TIME=1.7..
DlSTORTION=0.25% AT 100kHz,
0.07% AT 10kHz
100kHz
DISTORTION
TRIM
9.09k·
2Vrms
22.1k
+15V
SOk
10Hz
DISTORTION
TRIM
211
D-1ookHz
-15V
FINE
DISTORTION
TRIMS
68k
-15V
4.7k
12-Bit Voltage Output Df A Converter
± 120V Output Precision Op Amp
+125V
,,25mA OUTPUT
HEAT SINK OUTPUT TRANSISTORS
10k
T
1,.F
510
3300
':-15V
SETTLING TIME TO 2mV (0.8 LSB) = 1.5" TO 2..
270
+--f--......~---1~--..... OUTPUT
INPUT .......w.rl~"""I
270
50k
5100
3300
-125V
2-229
LT105S/LT1056
SimPLIFIED SCHEmATIC
NUll
r-----~--_1~-r--._--_.----------~------------_1~--------_.~7
v+
7k
-INPUT
+ INPUT
OUTPUT
14k
14k
3k
v-
'CURRENTS PJl SHOWN FOR lT1055. (X)=CURRENTS FOR lT1056
PACKAGE DESCRIPTiOn
Dimensions in inches (millimeters) unless otherwise noted.
H Package Metal Can
NB Package
B Lead Plastic
r:
:l
0
0.300-0320
(7.620-8128)
1
O400
(10.160)
.
MAX
765
2
3
f
0.250::1::0.005
~0.127)
4
0.009-0.015
(0.228-0381)
+0.025
j.- 0.325 -0.015 ..j
I
8.255~~::
I
NOTE: lEAD DIAMETER IS UNCONTROLLED BETWEEN
THE REFEIIENCE PLANE ANO SEATING PlANE.
2-230
..L7~
~~Llnlt\Q
LT1055S8/LT1056S8
TECHNOLOGI!!::~IY~----P-re-C-is-io-n-,-H-ig-h-S-p-e-e-d,
....a..."
JFET Input Operational Amplifiers
FEATURES
DESCRIPTion
1.5mV Max.
2.2mVMax.
• Guaranteed Offset Voltage
OOC to 70°C
• Low Drift
• Guaranteed Bias Current
70°C Warmed Up
• GuaranteedSlew Rate
4,NIOCTyp.
400pAMax.
9V/p.s Min.
The Ln055/LT1056 JFET input operational amplifiers com·
bine precision specifications with high speed performance.
For the first time in an SO package, 14V/p.s slew rate and
5.5MHz gain-bandwidth product are simultaneously
achieved with offset voltage of typically O.5mV, 4p.VJOC
drift, and bias currents of 60pA at 70°C.
APPLICATions
The 1.5mV maximum offset voltage specification is the
best available on any JFET input operational amplifier in
the plastic SO package.
•
•
•
•
•
•
•
The LT1055 and LT1056 are differentiated by their operating currents. The lower power dissipation Ln055 achieves
lower bias and offset currents and offset voltage. The
additional power dissipation of the LT1056 permits higher
slew rate, bandwidth and faster settling time with a slight
sacrifice in DC performance.
Precision, High Speed Instrumentation
Logarithmic Amplifiers
D/A Output Amplifiers
Photodiode Amplifiers
Voltage to Frequency Converters
Frequency to Voltage Converters
Fast, Precision Sample and Hold
The voltage to frequency converter shown below is one of
the many applications which utilize both the precision and
high speed of the LT1055/LT1056.
oto 10kHz Voltage-to· Frequency Converter
3M
OVTO 10V INPUT~"";""...J
~ 100~--1----+----t-~~,!~
~
~
30~--1----+~~r-~~---1
~
a;
~
TA=125~
.
~ 0.6
~ ...............
=>
-
~
""
10~--17~-+~~r---~---1
;;;
;;;
3
~:"'-..J.-L--'-
o
_ _L-_--L_---'
25
50
75
100
AMBIENT TEMPERATURE ('C)
125
0
-0.2
-15
Distribution of Offset Voltage
Drift with Temperature
(H and JPackage)
120
~
VS=±15V
100
t::
so
-
~
~
0
=>
z
LT1057H: 102 OPAMPS
LT1057J: 130 OP AMPS
LT1058J: 136 OP AMPS
Ige
368 OP AMPS
120
~
60
I
~
~
20
:..!!
2....
Ioi.. 2
60
60
1£
:"'
;'
~
tu
0
;;;
20
'"d zt\J
0
'"
f..4TA=25'C
""
~ 5
1
-12 -9 -6 -3
0
3
6
9 12
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (~V/'C)
Voltage Noise vs Frequency
1
3
4
2
TIME AFTER POWER ON (MINUTES)
Long Tenn Drift of
Representative Units
50
r
~
~
,
>-
50
~
t::
~
30
z
(5
t\J
~ 20
0
,.>a:
'"
~
10
t\J
0
<.>
L~
~
5- 10
\.
[\.
-50
12
o
2
3
TIME (MONTHS)
(~V/'C)
Voltage Gain YS Temperature
'" ""'.
~
MI
~
100 300 fOOD 3000 fO,OOO
FREQUENCY (Hz)
~
~
~
±15V
±10V
100
r-J""""'o...
.~~"'"
'" ~
'"
~
~
10
TIME (SECONDS)
300
w
l/fcorJl~
30
Vs
Vo
RL 2k
10
2-238
-
\\.
"- r-
-40
0.1 Hz to 10Hz Noise
~,
10
~, i-""""
~-30
-12 -9 -6 -3
OFFSET VOLTAGE ORIFT WITH TEMPERATURE
- r- -
~
~-20
["L ~
-
fl
>
k
k.,
3
20
w
Vs= ±15V
TA=25'C
'"
i :l
I -~
~ 30
1 UNIT EACH AT
19, -16, -13
+14, +16~V/'C
.ilW
Vs= ±15V
TA=25'C
40
1000
VS=±15V
TA=25'C
70
20
15
100
~
40
-20~
,
40
20
0
>
40
/
80
80 ~
LT1057N: 180 OP AMPS
LTf058N: 176 OP AMPS
, 356 OP AMPS
100
60
E
--
Vs= ±15V
80
60
40
./
-10
-5
0
5
10
COMMON-MODE INPUT VOLTAGE (V)
=>
,.ffi"'
~TA=70OC
~
~
~ OJ
Distribution of Offset Voltage
Drift with Temperature
(Plastic NPackage)
70
z
en
100
II
~ 0.4
a;
~ 0.2
Vs= ±15V
TA=25'C
S
120 ~
II
~ 10
100
Z
140
A
1.2
>- 08
~-
.
'1 6
~ '"
~ ~
12
6
"o
lOOk
125
r-...
PHlsE JARGIJ =
'"f
'" 80
60
Z
~
40
-m
~HASE
10
100
60
120 ~
Il1 f--~
0:
140 :!j
0
0
'"
~ 0~
TA= -55'C
""'-
20
L
T~_125;C-
0 Vs= ",15V
TI
~ -10
u
Ii: -20
:z:
'"
'" -30
a
-50 -25
-50
a
25
50
75
TEMPERATURE ('C)
100
125
J
TA 25'C
----
10
1.25~C
TA-25'C
,,-
.,.,...
T~
-40
10M
125
Short Circuit Current vs Time
(One Output Shorted to Ground)
~ 30
,
~ "\.
~
~
100
-25
40
,
Q
~
90
100
50
~
ex:
~
CMRR
::E -12
8
TA=25'C
CD 120
~
PSRR
8::E ",10
Power Supply Rejection Ratio
vs Frequency
140
Vs= '" 10V TO '" 17V FOR PSRR
Vs= '" 15V, VCM= ± 10.5V FOR CMRR
+14
_+13
>
~ +12
40
a
120
+15
VS=",15V
TA=25'C
I--.
Common· Mode and Power
Supply Rejections vs
Temperature
Common·Mode Range vs
Temperature
I
55'C
I
I
o
1
2
3
TIME FROM OUTPUT SHORT TO GROUND (MINUTES)
APPLICATions InFORmATion
The LT1057 may be inserted directly into LF353, LF412,
LF442, TL072, TL082 and OP·215 sockets. The m058
plugs into LF347, LF444, TL074, TL084 sockets. Of course,
all standard dual and quad bipolar op amps can also be reo
placed by these devices.
(CF) in parallel with RF eliminates this problem. With
Rs(Cs +CIN) RFCF, the effect of the feedback pole is
=
completely removed.
High Speed Operation
When the feedback around the op amp is resistive (RF), a
pole will be created with RF, the source resistance and
capacitance (Rs, Cs), and the amplifier input capacitance
(CIN =4pF). In low closed loop gain configurations and
with Rs and RF in the kilohm range, this pole can create ex·
cess phase shift and even oscillation. A small capacitor
2-240
OUTPUT
LT1057/LT1058
APPLICATions InFoRmATion
Settling time is measured in a test circuit which can
be found in the LT1055/LT1056 data sheet and in Application Note 10.
Achieving Picoampere/Microvolt Performance
In order to realize the picoampere/microvolt level accuracy
of the LT1057/LT1058, proper care must be exercised. For
example, leakage currents in circuitry external to the op
amp can significantly degrade performance. High quality
insulation should be used (e.g., Teflon™, Kel-F); cleaning
of all insulating surfaces to remove fluxes and other
residues will probably be required. Surface coating may be
necessary to provide a moisture barrier in high humidity
environments.
Board leakage can be minimized by encircling the input
circuitry with a guard ring operated at a potential close to
that of the inputs; in inverting configurations the guard
ring should be tied to ground, in non-inverting connections
to the inverting input. Guarding both sides of the printed
circuit board is required. Bulk leakage reduction depends
on the guard ring width.
The LT1057/LT1058 have the lowest offset voltage of any
dual and quad JFET input op amps available today.
However, the offset voltage and its drift with time and
temperature are still not as good as on the best bipolar
amplifiers because the transconductance of FETs is considerably lower than that of bipolar transistors. Conversely, this lower transconductance is the main cause of the
significantly faster speed performance of FET input op
amps.
Tefion™ is a trademark of DuPont.
Offset voltage also changes somewhat with temperature
cycling. The AM grades show a typical 40/N hysteresis
(50/N on the M grades) when cycled over the - 55°C to
125°C temperature range. Temperature cycling from O°C
to 70°C has anegligible (less than 20/N) hysteresis effect.
The offset voltage and drift performance are also affected
by packaging. In the plastic N package the molding compound is in direct contact with the chip, exerting pressure
on the surface. While NPN input transistors are largely
unaffected by this pressure, JFET device drift is degraded.
Consequently, for best drift performance, as shown in the
typical performance distribution plots, the J or H packages are recommended.
In applications where speed and picoampere bias currents
are not necessary, Linear Technology offers the bipolar input, pin compatible LT1013 and LT1014 dual and quad op
amps. These devices have significantly better DC specifications than any JFET input device.
Phase· Reversal Protection
Most industry standard JFET input single, dual and quad
op amps (e.g., LF156, LF351, LF353, LF411, LF412, OP-15,
OP-16, OP-215, TL084) exhibit phase reversal at the output
when the negative common-mode limit at the input is exceeded (i.e., below -12V with ± 15V supplies). The photos
show a ± 16V sine wave input (A), the response of an
LF412A in the unity gain follower mode (B), and the response of the LT1 057/LT1 058 (C).
The phase reversal of photo (B) can cause lock-up in servo
systems. The LT1057/LT1058 does not phase-reverse due
to aunique phase reversal protection circuit.
A
(A) ± l6V Sine Wave Input
(B) LF412A Output
Ie) LT1057/LT1058 Output
All Photos 5VIDiv Vertical Scale, 50J.ls/Div Horizontal Scale
2-241
Ell
LT1057/LT1058
APPLICATions
Low Noise, Wideband, Gain = 100 Amplifier with High Input Impedance
4.3k
2.4k
7.5k
500D
4.3k
2.4k
OUTPUT
INPUT~""'----I
4.3k
2.4k
-30B BANDWIOTH=350kHz
GAIN-BANDWIOTH PRODUCT=35MHz
WIDEBAND NOISE = 13nV/v'Hz =7.5nV/v'Hz
~ REFERRED TO INPUT
RMS NOISE DC TO FULL BANDWIDTH =7~V
Wideband, High Input Impedance, Gain = 1000 Amplifier
4.7k
1k
4.7k
OUTPUT
1k
-30B BANDWIDTH = 400kHz
GAIN-BANDWIDTH PRODUCT=400MHz
WIDEBAND NOISE = 13nV/v'Hz REFERRED TO INPUT
Low Distortion, Crystal Stabilized Oscillator
13011
COMMON-MODE
SUPPRESSION
1VRMSOUT
20kHz
0.005%
DISTORTION
2-242
LT1057/LT1058
APPLICATions
Fast, Precision Bridge Amplifier
330pF
10k
10k
INPUT
SLEW RATE = 14V/"s
OUTPUT CURRENT TO LOAD = 150mA
LOAD CAPACITANCE: UP TO 1,.F
Analog Divider
806k.
20k
r-------,
1k
-5V_ftN.....-
I
....-t
OUTPUT=~
75k·
A INPUT-'W~~---------"'"
22k
330k
2N2907 ~-------------...
·1% FILM
-5V
2-243
LT1057/LT1058
APPLICATions
Bipolar Input (AC) V- FConverter
lk
-5V-'\N¥.....LT1004
2.5V
LTC1043
-qr f±l
...- ....-I.l~8J-f.ffi. - -illH--..,
.....-t.fr
-
0.01
POLYSTYRENE
DATA
OUTPUT
0-lkHz
I,=~~
. . . _fVIr~!1i--,....-+36.5k'
SIGN
BIT
'1% FILM
MATCH 1M RESISTORS TIJ'0.05%
12 Bit A-D Converter
FLIP-FLOP
IN
DATA OUTPUT =AOUT
BOUT
'VISHAY S-102 RESISTOR
2-244
LT1057/LT1058
APPLICATions
Instrumentation Amplifier with Shield Driver
lk
10k
OUTPUT
10k
lk
GAIN =10(1 +RF/RGl ~100
Is=5pA
RIN=10 12 n
BW=350kHz
100dB Range Logarithmic Photodiode Amplifier
50k
r--""",..,.,,,..._~DARK
TRIM
EOUT
LIGHT (900~Ml
lMW
l00~W
10~W
f1I
....... = HP-5082-4204 PIN PHOTODIODE.
Dl-Q5=CA3096.
CONNECT SUBSTRATE OF CA3096
ARRAY TO O4'S EMITIER.
·1 % RESISTOR
100dB RANGE LOGARITHMIC PHOTOOIODE AMPLIFIER
l~W
100nW
10nW
RESPONSE OAlil
DIODE CURRENT
350~
35~
3.5~
350nA
35nA
3.5nA
CIRCUIT OUTPUT
10.0V
7.85V
5.70V
3.55V
1.40V
-0.75V
2-245
LT1057/LT1058
PACKAGE DESCRIPTion
Dimensions in inches (millimeters) unless otherwise noted.
H Package
Melal Can
NOTE LEAODIAMETEA IS UNCONTROLLEDSETWEEN
THE REFEAEtiCE PLANE AND SEATING PLANE
J8 Package
8 Lead Hermetic Dip
N8 Package
8 Lead Plastic
t
",OO:l
0
1
o ?9!!-O 32Q
(737-813)
(1:!l~)
7"
2
-:J0010
(6350$02:54)
3
4
~
,:~:::~)
0"" I:~~=:~":)=LJ0ro
(1651JL-~'
TVP
~)
0009-0015
+0025
~ 0325_ 0015
0014-0026
-1
I (8255~~:n I
(0300-0660)~
0038-0068
t
004501.0015
(~
J
(O~oa)
MIN
0125
0100",0010
~
(2540",0254)
(0 451=1l 076)
(T"'.~
.Q1l&
(5080)
."
0008-00\8
(0203-0460)
I
I-(~::~:)-l
0125
(3175)
MIN
110'C
2-246
."
(3115)
~
130'C/W
....
"
.
tlnll\l2
~, TECHNOLOG~IY~---D-u-a-I
~
LT1057S/LTl0571S
J-F-E-T-In-p-u-t-P-re-c-is-io-n
High Speed Op Amp
DESCRIPTion
FEATURES
•
•
•
•
•
•
•
13V/f.ls Slew Rate
5MHz Gain·Bandwidth Product
Fast Settling Time
300f.lV Offset Voltage (LT1057)
5f.1V/oC Vos Drift
60pA Bias Current at 70°C
Low Voltage Noise
8V/f.lsMin.
1.3f.1s to 0.02%
13nV/VHz @ 1kHz
26nV/VHz @ 10Hz
The LT1057 is a matched JFET input dual op amp in the
industry standard 8 pin configuration, featuring a com·
bination of outstanding high speed and precision speci·
fications. It replaces all the popular bipolar and JFET
input dual op amps. In particular, the LT1057 upgrades the
performance of systems using the LF412A and OP·215
JFET input duals.
For the first time, precision dual JFET op amps are avail·
able in a surface mounted package. For extended operat·
ing temperatures (- 40°C STA s85°C), the LT10571S is
offered.
APPLICATions
•
•
•
•
•
•
•
Precision, High Speed Instrumentation
Fast, Precision Sample and Hold
Logarithmic Amplifiers
D/A Output Amplifiers
Photodiode Amplifiers
Voltage to Frequency Converters
Frequency to Voltage Converters
Current Output, High Speed, High Input Impedance Instrumentation Amplifier
7.5k
IOUT=2(V1-V2)
Rx
1k""
"GAIN ADJUST
""COMMON-MODE REJECTION ADJUST
BANDWIDTH = 2M Hz
2-247
LT1057S/LT10571S
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Supply Voltage ................................... ± 20V
Differential Input Voltage ......................... ± 40V
Input Voltage ..................................... ± 20V
Output Short Circuit Duration .................. Indefinite
Operating Temperature Range
LT1057S .................................. OOC to 70°C
LT10571S .............................. - 40°C to 85°C
Storage Temperature Range
All Devices ........................... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ............. 300°C
ORDER PART
NUMBER
TOP VIEW
LT1057S
LT10571S
PART MARKING
LT1057S
LT10571S
S16 PACKAGE
PLASTIC SOL
ELECTRICAL CHARACTERISTICS Vs= ±15V, TA=25°C, VCM =DVunlessotherwise noted.
SYMBOL
PARAMETER
Vas
Input Offset Voltage
los
Ie
Input Offset Current
Input Bias Current
Input Resistance -Differential
-Common·Mode
CONDITIONS
MIN
Fully Warmed Up
Fully Warmed Up
VCM = -11Vto +8V
VCM= +8Vto +IIV
Input Capacitance
en
en
Input Noise Voltage
O.IHzto 10Hz
Input Noise Voltage Density
fo= 10Hz
fo= 1kHz
in
Input Noise Current Density
fo= 10Hz, 1kHz
AVOL
Large Signal Voltage Gain
Vo=:t 10V
Input Voltage Range
CMRR
Common·Mode Rejection Ratio
PSRR
Power Supply Rejection Ratio
VCM = ± 10.5V
Vs= ±10Vto ±18V
VOUT
SR
Output Voltage Swing
RL=2k
GBW
Gain·Bandwidth Product
Is
Supply Current Per Amplifier
Slew Rate
Channel Separation
2-248
f= lMHz(Note 1)
RL=2k
RL= lk
100
50
:tl0.5
82
86
±12
TYP
MAX
0.3
2
mV
5
:tl0
0.4
0.4
0.05
4
2.1
26
13
1.8
300
220
14.3
-11.5
50
pA
:t 100
pA
TIl
TIl
TIl
pF
~Vp·p
nV/V'Hz
nV/V'Hz
fA/V'Hz
VlmV
V/mV
98
V
V
dB
102
dB
±13
V
8
13
V/~s
3
5
1.7
DC to 5kHz, VIN = :t 10V
UNITS
130
MHz
2.8
mA
dB
LT1057S/LT10571S
ELECTRICAL CHARACTERISTICS
Vs= :t 15V, VCM =ov, OOCSTAS700C(LT1057S)or - 4QOC STAS85°C (LT1057IS), unless otherwise noted.
SYMBOL
los
PARAMETER
Input Offset Voltage
Average Temperature
Coefficient of Input
Offset Voltage
Input Offset Current
Ie
Input Bias Current
AVOL
CMRR
PSRR
VOUT
Large Signal Voltage Gain
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Output Voltage Swing
Vas
CONDITIONS
MIN
•
•
Warmed Up, TA=7QOC(LT1057S)
Warmed Up, TA = 85°C (LT1057IS)
Warmed Up, TA = 70°C (LT1057S)
Warmed Up, TA=85°C(LT1057IS)
Vo= :l:l0V,RL=2k
VCM= ±10.5V
Vs= :l:l0Vto :l:18V
RL=2k
TYP
0.5
5
20
35
:1:60
±loo
•
•
•
•
80
84
50
200
96
100
±12
:1:12.8
MAX
2.5
UNITS
mV
~V/oC
250
400
:1:400
:1:700
pA
pA
pA
pA
V/mV
dB
dB
V
The' denotes the specifications which apply over the full operating tem·
perature range.
Note 1: Gain bandwidth product is not tested. It is guaranteed by design
and by inference from the slew rate measurement.
2-249
NOTES
2-250
~-""llneJ\12
~,
LTl078/LTl079
TECHNOLOGII:"Ff~--M-ic-ro-p-o-w-e-r.-,D-u-a-I-a-n-d-Q-ua-d-,
Single Supply, Precision Op Amps
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
•
The LT1078 is a micropower dual op amp in the standard
8-pin configuration; the LT1079 is a micropower quad op
amp offered in the standard 14-pin packages. Both devices
are optimized for single supply operation at 5V. ± 15V
specifications are also provided.
Micropower performance of competing devices is
achieved at the expense of seriously degrading precision,
noise, speed, and output drive specifications. The design
effort of the LT1078/1079 was concentrated on reducing
supply current without sacrificing other parameters. The
offset voltage achieved is the lowest on any dual or quad
non-chopper stabilized op amp-micropower or otherwise. Offset current, voltage and current noise, slew rate
and gain-bandwidth-product are all two to ten times better
than on previous micropower op amps.
The 11f corner of the voltage noise spectrum is at O.7Hz, at
least three times lower than on any monolithic op amp.
This results in low frequency (O.1Hz to 10Hz) noise performance which can only be found on devices with an order of magnitude higher supply current.
Both the LT1078 and LT1079 can be operated from a single
supply (as low as one lithium cell or two Ni-cad batteries).
The input range goes below ground. The all-NPN output
stage swings to within a few millivolts of ground while
sinking current-no power consuming pull down resistors
are needed.
50",A Max Supply Current per Amplifier
70",V Max Offset Voltage
250pA Max Offset Current
0.6",Vp·p 0.1 Hz to 10Hz Voltage Noise
3pAp·p 0.1 Hz to 10Hz Current Noise
0.4",V/oC Offset Voltage Drift
200kHz Gain·Bandwidth-Product
0.07V/",s Slew Rate
Single Supply Operation
Input Voltage Range Includes Ground
Output Swings to Ground while Sinking Current
No Pull Down Resistors are Needed
• Output Sources and Sinks 5mA Load Current
APPLICATions
• Battery or Solar Powered Systems
Portable Instrumentation
Remote Sensor Amplifier
Satellite Circuitry
• Micropower Sample and Hold
• Thermocouple Amplifier
• Micropower Filters
Single Battery, Micropower, Gain =100,
Instrumentation Amplifier
Distribution of Input Offset Voltage
(LT107S and LT1079 in All Packages)
16
tJ""
-=
r-
14
12
Vs=5V.OV
TA=25°C
1
I
10
OUT
L
TYPICAL PERFORMANCE
INPUT OFfSET VOLTAGE =40I'V
INPUT OFFSET CURRENT ==0 2nA
TOTAL POWER DISSIPATION =240~W
COMMON-MODE REJECTION =110dB (AMPLIFIER LIMITED)
GAIN BANDWIDTH PRODUCT =200kHz
NOISE=B5~Vp-p 0 1Hz TO 10Hz
=300I'VRMS OVER FULL BANDWIDTH
INPUT RANGE =0 03V TO j BV
OUTPUT RANGE=O Q3VTD 2 3V (0 3mV:sVIN+-VIN_ s23mV)
OUTPUTS SINK CURRENT -NO PULL DOWN RESISTORS ARE NEEDED
OUTPUT
o
b!
-120 -80
.,
..
-40
-'.
0
40
80
120
INPUT OFFSET VOLTAGE ijtV)
2-251
LT1078/LT1079
ABSOLUTE mAXimum RATinGS
Supply Voltage ................................... ± 22V
Differential Input Voltage ......................... ± 30V
Input Voltage .......... Equal to Positive Supply Voltage
........ 5V Below Negative Supply Voltage
Output Short Circuit Duration .................. Indefinite
Operating Temperature Range
LT1078AM/LT1078MI
LT1079AM/LT1079M ................... - 55°C to 125°C
LT1 078AC/LT1 078CI
LT1079AC/LT1079C ........................ OOC to 70°C
Storage Temperature Range
All Grades ........................... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
PACKAGE/ORDER InFORmATion
ORDER PART
NUMBER
LT1078AMH
LT1078MH
LT1078ACH
LT1078CH
LT1078AMJ8
LT1078MJ8
LT1078ACJ8
LT1078CJ8
LT1078ACN8
LT1078CN8
4
v- (CASE)
HPACKAGE
8 LEAD TO-5 METAL CAN
OUTPUT A 1
7 OUTPUT B
J PACKAGE
8 LEAD CERAMIC DIP
N PACKAGE
B LEAD PLASTIC DIP
LT1079AMJ
LT1079MJ
LT1079ACJ
LT1079CJ
LT1079ACN
LT1079CN
J PACKAGE
N PACKAGE
14 lEAD CERAMIC DIP 14 LEAD PLASTIC DIP
ELECTRICAL CHARACTERISTICS Vs =5V, OV, VCM =O.1V, Vo =1.4V, TA =25°C, unless noted.
SYMBOL
Vos
PARAMETER
Input Offset Voltage
:..vos
aTime
Long Term Input Offset
Voltage Stability
los
IB
en
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
in
Input Noise Current
Input Noise Current Density
Input Resistance
Differential Mode
Common-Mode
Input Voltage Range
CMRR
PSRR
AVOL
2-252
Common-Mode Rejection
Ratio
Power Supply Rejection
Ratio
Large Signal Voltage Gain
CONDITIONS(NOTE 1)
LT1078
LT1079
LT1078AM/AC
LT1079AM/AC
MIN
TYP MAX
30
70
35
100
0.4
LT1078M/C
LT1079M/C
MIN
TYP MAX
40
120
40
150
0.5
0.05
6
0.6
29
28
2.3
0.06
0.02
0.05
6
0.6
29
28
2.3
0.06
0.02
O.lHzto 10Hz (Note 2)
10 = 10Hz (Note 2)
10 = 1000Hz (Note 2)
0.1 Hz to 10Hz (Note 2)
10 = 10Hz (Note 2)
10= 1000Hz
(Note 3)
400
VCM = OV to 3.5V
3.5
0
97
800
6
3.8
-0.3
110
Vs = 2.3V to 12V
102
Vo=O.03Vto 4V, No Load
Vo = 0.03V to 3.5V, RL = 50k
200
150
0.25
8
1.2
45
37
4.0
0.10
300
0.35
10
UNITS
~V
~V
~V/Mo
nA
nA
pVp-p
nV/VHz
nV/VHz
pAp-p
pA/VHz
pA/VHz
3.5
0
94
800
6
3.8
-0.3
106
Mil
Gil
V
V
dB
114
100
114
dB
1000
600
150
120
1000
600
V/mV
V/mV
LT1078/LT1079
ELECTRICAL CHARACTERISTICS Vs = 5V, OV, VCM = O. lV, Vo = 1.4V, TA = 25°C, unless noted.
SYMBOL
PARAMETER
Maximum Output Voltage
Swing
SR
GBW
Slew Rate
Gain Bandwidth Product
Supply Current per Amplifier
Channel Separation
Minimum Supply Voltage
Is
CONDITIONS(NOTE 1)
Output Low, No Load
Output Low, 2k to GND
Output Low, ISINK = 1OO~A
Output High, No Load
Output High, 2k to GND
Ay= +1, Vs= ±2.5V
fo",20kHz
AVIN = 3V, RL= 10k
(Note 4)
LT1078AM/AC
LT1079AM/AC
TYP MAX
MIN
3.5
6
0.55 1.0
130
95
4.2
4.4
3.5
3.9
0.07
0.04
200
38
50
130
2.2
2.3
LT1078M/C
LT1079M/C
TYP
MIN
3.5
0.55
95
4.2
4.4
3.9
3.5
0.04
0.07
200
39
130
2.2
MAX
6
1.0
130
UNITS
mV
mV
mV
V
V
VI~s
kHz
55
~A
2.3
dB
V
ELECTRICA'L CHARACTERISTICS Vs = 5V, OV, VCM = 0.1V, Vo = 1.4V, - 55°CsTAS125°C, unless noted.
SYMBOL
Vos
AVO&AT
los
18
CMRR
PSRR
AYOL
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Common-Mode Rejection
Ratio
Power Supply Rejection
Ratio
Large Signal Voltage Gain
Maximum Output Voltage
Swing
Is
CONDITIONS
LT107a
LT1079
(Note 5)
VCM = 0.05V to 3.2V
Vs=3.1Vto12V
Vo = 0.05V to 4V, No Load
Vo = 0.05V to 3.5V, RL = 50k
Output Low, No Load
Output Low, ISINK = 100pA
Output High, No Load
Output High, 2k to GND
Supply Current per Amplifier
••
•
•
•
•
•
••
•••
•
•
LT1078AM/l079AM
MIN TYP MAX
65
250
280
80
0.4
1.8
0.07 0.50
7
10
92
106
LT1078M/1D79M
MIN TYP MAX
85
370
100 400
0.5
2.5
0.07 0.70
12
7
88
104
UNITS
~V
pV
~VloC
nA
nA
dB
98
110
94
110
dB
110
80
600
400
4.5
125
4.2
3.7
43
80
60
600
400
4.5
125
4.2
3.7
45
VlmV
VlmV
mV
mV
V
V
pA
3.9
3.0
8
170
3.9
3.0
60
a
170
70
ELECTRICAL CHARACTERISTICS Vs=5V,OV, VCM=O.1V, VO= 1.4V,O°CsTAS700C, unless noled.
SYMBOL
Vos
AVO&AT
los
18
CMRR
PSRR
AYOL
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Common-Mode Rejection
Ratio
Power Supply Rejection
Ratio
Large Signal Voltage Gain
Maximum Output Voltage
Swing
Is
Supply Current per Amplifier
CONDITIONS
LT1078
LT1079
(NoteS)
VcM =OVt03.4V
Vs = 2.6V to 12V
Vo = 0.05V to 4V, No Load
Vo = 0.05V to 3.5V, RL = 50K
Output Low, No Load
Output Low, ISINK = 100~A
Output High, No Load
Output High, 2k to GND
••
•
•
•
•
•
••
••
••
•
LT1078ACI1D79AC
MIN TYP MAX
50
150
60
180
0.4
1.8
0.06 0.35
6
9
94
108
LT1 078C/1 079C
MIN TVP MAX
60
240
70
270
0.5
2.5
0.06 0.50
11
6
106
90
100
112
97
112
dB
150
110
750
500
4.0
105
4.3
3.8
40
110
80
750
500
4.0
105
4.3
3.8
42
VlmV
4.1
3.3
7
150
4.1
3.3
55
UNITS
~V
pV
pV/oC
nA
nA
dB
V/mV
7
150
63
mV
mV
V
V
pA
2-253
LT1078/LT1079
ELECTRICAL CHARACTERISTICS Vs= ±15V, TA = 25°C, unless noted.
SYMBOL
PARAMETER
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Voltage Range
CONDITIONS
AVOL
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Your
Maximum Output Voltage Swing
VCM +13.5V, -15V
Vs=5V,OVto±18V
Vo= ± 10V, RL=50k
Vo= ± 10V, RL=2k
RL=50k
Rl=2k
SR
Slew Rate
Supply Current per Amplifier
Vas
los
18
CMRR
PSRR
Is
LT1 078AM/AC
LT1079AMIAC
TYP MAX
MIN
45
250
0.05 0.25
6
8
13.8
13.5
-15.0 -15.3
100
114
114
102
1000
5000
400
1100
±13.0 ±14.0
±11.0 ±13.2
0.06
0.10
46
MIN
13.5
-15.0
97
100
1000
300
±13.0
±11.0
0.06
65
LT1078MIC
LT1079MIC
TYP
50
0.05
6
13.8
-15.3
114
114
5000
1100
±14.0
±13.2
0.10
47
MAX
350
0.35
10
UNITS
~V
nA
nA
V
V
dB
dB
VlmV
VlmV
V
V
VI~
75
~
ELECTRICAL CHARACTERISTICS Vs= ±15V, -55°CsTAS125°C, unless noted.
SYMBOL
Vas
AVOPJAT
los
18
AVOL
CMRR
PSRR
Is
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Maximum Output Voltage Swing
Supply Current per Amplifier
CONDITIONS
•
•
•
•
•
(Note 5)
Vo= ± 10V, RL =5k
VCM = +13V, -14.9V
Vs=5V,OVto ±18V
RL =5k
•
•
•
•
LT1078AMll079AM
MIN
TYP MAX
85
430
0.4 1.8
0.07 0.50
10
7
200
700
110
94
98
110
±11.0 ±13.5
52
60
LT1078Mll079M
TYP MAX
MIN
100 600
0.5 2.5
0.07 0.70
7
12
150
700
110
90
94
110
±11.0 ±13.5
54
95
UNITS
~V
~VloC
nA
nA
VlmV
dB
dB
V
~A
ELECTRICAL CHARACTERISTICS Vs= ±15V,OOCsTAS700C, unless noted.
SYMBOL
Vas
AVos/AT
los
18
AVOL
CMRR
PSRR
Is
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Maximum Output Voltage Swing
Supply Current per Amplifier
CONDITIONS
(Note 5)
Vo= ±10V,RL=5k
VCM = 13V, -15V
Vs=5V,OVto ±18V
RL=5k
The • denotes the specifications which apply over the full operating
temperature range.
Note 1: Typical parameters are defined as the 60% yield of parameter
distributions of individual amplifiers; i.e., out of 100 LT1079s (or 100
LT1078s) typically 240 op amps (or 120) will be beUer than the indicated
specification.
Note 2: This parameter is tested on a sample basis only. All noise
2-254
•
•
•
•
•
•
•
•
•
LT1078ACll079AC
MIN
TYP MAX
330
60
0.4
1.8
0.06 0.35
6
9
1200
300
112
97
100
112
±11.0 ±13.6
49
73
LT1078Cll079C
TYP
MAX
75
460
0.5
2.5
0.06
0.50
6
11
250
1200
112
94
97
112
±11.0 ±13.6
50
85
MIN
UNITS
~V
~V/oC
nA
nA
VimV
dB
dB
V
~A
parameters are tested with Vs= ± 2.5V, Va = OV.
Nole 3: This parameter is guaranteed by design and is not tested.
Nole 4: Power supply rejection ratio is measured at the minimum supply
voltage. The op amps actually work at 1.8V supply but with atypical offset
skew of - 300~ V.
Nole 5: This parameter is not 100% tested.
LT1078/LT1079
TYPICAL PERFORmAnCE CHARACTERISTICS
!
55
~ 100
50
ffi
ffi
u:
~ 45
'"
--
a'i
§
35
'-'
":;
~
30
V
~
V~-±l~V
r
~-5v,bv
/'"
,/"
.,
~
50
ffi~
0
~ -5
V
ffi
~ -6
'"
25
-50 -25
Input Bias Current vs
Common· Mode Voltage
Input Bias and Offset Currents vs
Temperature
Supply Current vs Temperature
VS=5~, OV
VS=5V, OVTO ±15V
V
los
-2
-- -
r
TA=125°C
19
-10
~
-12
-1
on -7
0
25
50
75
TEMPERATURE (0C)
100
125
-50
0.1 Hz to 10Hz Noise
TA= -55°C
TA 25°C
-25
0
25
50
75
TEMPERATURE (OC)
100
125
o
1
2
3
COMMON-MODE VOLTAGE (V)
Noise Spectrum
0.01 Hz to 10Hz Noise
1000
11111
CURRENT
~EIIII
-
Vs ±2.5V
TA 25°C
(AT Vs ±15V
VOLTAGE NOISE
IS 4% LESS
CURRENT NOISE
IS UNCHANGED)
VOLTAGE
~ISE,,,,
f-4
6
10
20
TIME (SECONDS)
25
35
Vs= l2.5V
TA=25°C
'"
!:::
~ 20
~
<=>
>--
a'i
'-'
~
~
Z
'"
;
~
<=>
>--
10
44 (---
,.- 47
>
G:i -5
1,
it<=>
I - -3'5
1~
'25
30
35
VOLTAGE NOISE DENSITY (nv/v'Hz)
40
10
cu
~
7
~1
1
1
-2
-1
1
2
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (~V/OC)
10
FREQUENCY (Hz)
100
1000
Long Term Stability of Two
Representative Units (LT1078)
:;
891 18~
L:
!:::
L,."
o
0.1
15
LT1078s
109- 120
70 LT1079s
h "I 520 OP AMPS
.....
O'iHIZIIIIIII
10
100
rf-f J
Tn
15
10
VS=5V,OV
VCM=O.1V
20
1392 OP 'AMPS
TESTED FROM
THREE RUNS
I
106 Ln078s
45 LT1079s
25
80
Distribution of Offset Voltage Drift
with Temperature (In All Packages)
10Hz Voltage Noise Distribution
30
40
60
TIME (SECONDS)
~A Jd~~ER
VS=5V,OV
VCM=OlV
TA 25°C -
"\'-\.
-10
-15
o
r-1A
28
--
18
-
2A
--
2
3
TIME (MONTHS)
2-255
LT1078/LT1079
TYPICAL PERFORmAnCE CHARACTERISTICS
Voltage Gain vs Frequency
Gain, Phase vs Frequency
140
120
I==::~
~
100
TA=25'C
;;;:
~
20
80
Vs=5V,
40
GAIN"
OV~ ~
~
20
-20
0.01 0.1
~
""
~
0.10
~ 0.08
ili
'" 15
60 ~
G{W±"1tv-
1
180
-50 -25
~
140
en
--t""""T
50
220
~
5V,OV
15V
SLEW ±15V
q,M±5V,OV
~ 200
±15V
I
120~
Large Signal Transient Response
Vs=5V,OV
b 240
~
MARGIN
54'
,
h~
)slJv!
TA=25'C
100
II
-10
10 100 lk 10k lOOk 1M
FREQUENCY (Hz)
100
PHASE
~ \ ~1
TA=25'C
Cl =2OpF
Slew Rate, Gain Bandwidth
Product and Phase Margin vs
Temperature
~0.12
PHASE,ttH
ARGIN
66'
5V,ri~~
~
z
r
,~ ;:::::,
~ ~s=±15V
~80
120
~
~
a;-
'"w
'"
i:i
Capacitive Load Handling
30
5O,.s/DlV
100,.s1 DlV
INPUT PULSE OV TO 3.8V, Av= + 1, NO LOAD
Av= +1, NO LOAD
125
Small Signal Transient Response
Vs=5V,OV
Small Signal Transient Response
Vs=:!:15V
Small Signal Transient Response
Vs= :!:2.5V
>
i
OV
O.lV
OV
10,.s/DlV
10,.s/DIV
10,.s/DIV
Av= +1, Cl =15pF, INPUT 50mV TO 150mV
Av=+l, Cl=15pF
Av=+l, Cl=15pF
2-256
LT1078/LT1079
TYPICAL PERFORmAnCE CHARACTERISTICS
Minimum Supply Voltage
100
~
~
V+70~C
V-=OV
-O.lV,,;VeM ,,;0.4V
+1~5'cl
-100
t;:; -200
NON
I \
~
-300 I- FUNCTIONAL ....
~
~
-400
-500
WARM UP DRIFT
AT Vs=5V, OV IS
IMMEASURABLY LOW
'"
'3
1. +25'C }
2. 55'C
Vs
3. +125'C
3.
t;:;
'"
1
5.
o
~
'"
~
l/
o
.".
1
lOOk
100
2
Output Voltage Swing vs Load
Current
Output Saturation YS Temperature
vs Sink Current
1000
V+
ISINK 2mA
+125'C
ISINK lmA
ISINK
~
LT1rS
TIME AFTER POWER ON (MINUTES)
POSITIVE SUPPLY VOLTAGE (V)
I SINK = 100pA
I
Y
'-'
2
m
-+-
0.2
:>::
'\
6.
LT1079
w
1'\
I~
I'"
1...-
~ 0.4
O'C
[£;
V'
§!
-55'C
1.
±15V
V'
o
o
VS= ±15V
TA=25'C
;;; 0.6
~5'C
~
10M
~
I If
1{V
i"!:
g
Voltage Gain vs Load Resistance
Warm-Up Drift
O.S
V+-l
1.
-55'C}
III
5 +25'C Vs=5V,
6 +125'C
OV
lk
10k
lOOk
LOAD RESISTANCE TO GROUND (0)
1M
Short Circuit Current YS Time
40
+25'C
_ '"
a:
~~
55'C
Vs=5V,OV
>-=>
I
]
/ TA= +25'C, Vs=5V, ov
30
20
I
II
I
I
=i I---TA=+25'C, Vs=±15V
-
20 0
w'"
§
10pA
10
'\
'-'
TA=+125'C, Vs=5V, OV
I\TA=+125'C, Vs=±15V
ISINK-lpA
+,W c
NO LOAD
RL =dk TO
G~OUND
V-
1
-50 -25
0
25
50
75
TEMPERATURE ('C)
100
Common Mode Range vs
Temperature
V+
~
V+=2.5VTO lSV
V-=OVTO -lSV
V+ -1
Undistorted Output Swing vs
Frequency
-
~
-II
~
j;:
Vs=5V,OV,
'">-
RL"'lr
~
V-
\
> 20
ci
z
'"~
10
~
'~"'
-25
0255075
TEMPERATURE ('C)
100
125
I TA
\
~
0
V- -1
-50
-40
0.1
1
10
SOURCING DR SINKING LOAD CURRENT (mA)
30
f---
o
100
~
25'C
i j; II
Vs=5V,OV, R\"ll O
V~s=±15V
RL,,100k
JS=±15~
IllIml ~
o
1
2
3
TIME FROM OUTPUT SHORT TO GROUND (MINUTES)
Closed Loop Output Impedance
LO~R,,,RL' TO GROUND
\
-
-30 ~ I--TAT+25'i' VS=i 15V - -
JL~
0.01
125
~
TA= +125'C, Vs= ±15V
>
5~
~
lk
./ /
II
4~
20
'"
-
C-
\
I'-
lk
10k
FREQUENCY (Hz)
Av=l
j;:
3~
1\
2
~
~
[l
0
':ii"'
V
17
V
/
r\ 17 Av= +1
i7'
Av=10
V
01
/
0"lOOk
V
/
V
V
1~
V 7/
IT
-
-
10
100
lk
10k
FREQUENCY (Hz)
lOOk
2-257
LT1078/LT1079
TYPICAL PERFORmAnCE CHARACTERISTICS
Common·Mode Rejection Ratio
vs Frequency
120
r-............
""
~
~
o
t3
;;J
o
10
100
1k
10k
FREQUENCY (Hz)
'\
80
'\
~
lOOk
1M
Vs= ±2.5V + 1VP!P SINE
0.1
TA=r C
I
1
10
I
~
100
lk 10k
FREQUENCY (Hz)
80
IE
z
'\
100k
~
<.:>
Vs= ±2.5V
TA=25°C
VIN=3Vp-p TO 2kHz
RL=10k
40
20
o
\
~
~ 60
WA~ ~\
I
--- -"-
o
t\. ~
V>
o
iii
&-100
z
\
I\.
40
ffi
~ 20
120
~UPPLY
NEGATIVE'\
SUPPLY
~
~ 40
i!!i
~
z
~
w
........
~100
o
o
~
120
TA=~5°C
r-- t-....
~ 100
Power Supply Rejection Ratio
vs Frequency
I
1
10
\
\
I
100
1k
10k
FREQUENCY (Hz)
lOOk
1M
APPLICATions InFORmATion
The LT1078/LT1079 devices are fully specified with
V+ =5V, V- =0, VCM=O.1V. This set of operating conditions appears to be the most representative for battery
powered micropower circuits. Offset voltage is internally
trimmed to a minimum value at these supply voltages.
When 9V or 3V batteries or ± 2.5V dual supplies are used,
bias and offset current changes will be minimal. Offset
voltage changes will be just a few microvolts as given by
the PSRR and CMRR specifications. For example, if
PSRR=114dB (=2p.VN), at 9V the offset voltage change
will be 8p.V. Similarly, Vs = ± 2.5V, VCM =0is equivalent to a
common-mode voltage change of 2.4V or a Vas change of
7p.V if CMRR = 110dB (3p.VN).
A full set of specifications is also provided at ± 15V supply voltages for comparison with other devices and for
completeness.
Single Supply Operation
The LT1078/LT1079 are fully specified for single supply
operation, i.e., when the negative supply is OV. Input com·
mon-mode range goes below ground and the output
swings within a few millivolts of ground while sinking cur·
rent. All competing micropower op amps either cannot
swing to within SOOmV of ground (OP·20, OP·220, OP·420)
2-258
or need a pull down resistor connected to the output to
swing to ground (OP·90, OP·290, OP·490, HA5141/42/44).
This difference is critical because in many applications
these competing devices cannot be operated as micro·
power op amps and swing to ground simultaneously.
As an example, consider the instrumentation amplifier
shown on the front page. When the common·mode signal
is low and the output is high, amplifier A has to sink
current. When the common·mode signal is high and the
output low, amplifier Bhas to sink current. The competing
devices require a 12k pull down resistor at the output of
amplifier A and a 15k at the output of B to handle the
specified signals. (The LT1078 does not need pull down reo
sistors.) When the common·mode input is high and the
output is high these pull down resistors draw 300p.A (150p.A
each), which is excessive for micropower applications.
The instrumentation amplifier is by no means the only ap·
plication requiring current sinking capability. In 7 of the 9
single supply applications shown in this data sheet the op
amps have to be able to sink current. In two of the applica·
tions the first amplifier has to sink only the SnA input bias
current of the second op amp. The competing devices,
however, cannot even sink 6nA without a pull down
resistor.
LT1078/LT1079
APPLICATions InFoRmATion
Since the output of the LT1078/LT1079 cannot go exactly
to ground, but can only approach ground to within a few
millivolts, care should be exercised to ensure that the out·
put is not saturated. For example, a 1mV input signal will
cause the amplifier to set up in its linear region in the gain
100 configuration shown below, but is not enough to make
the amplifier function properly in the voltage follower
mode.
Gain 100 Amplifier
5V
Voltage Follower
~
.".
1mV
v
99R
l00mV
lmV
+
~
-
OUTPUT
SATURATED
+
~3.5mV
Single supply operation can also create difficulties at the
input. The driving signal can fall below OV-inadvertently
or on a transient basis. If the input is more than a few hun·
dred millivolts below ground, two distinct problems can
occur on previous single supply deSigns, such as the
LM124, LM158, OP·20, OP·21 , OP·220, OP·221, OP-420
(a and b), OP·90/290/490 (b only):
a) When the input is more than a diode drop below ground,
unlimited current will flow from the substrate (Vterminal) to the input. This can destroy the unit. On the
Ln078/Ln079, resistors in series with the input protect
the devices even when the input is 5V below ground.
b) When the input is more than 400mV below ground (at
25°C), the input stage saturates and phase reversal occurs . . .
at the output. This can cause lock·up in servo systems. . . .
Due to a unique phase reversal protection circuitry, the
Ln078/LT1079's output does not reverse, as illustrated
below, even when the inputs are at -1.0V.
Voltage Follower with Input Exceeding the Negative Common·Mode Range (Vs =5V, OV)
4V
4V
4V
2V
2V
2V
lms/DIV
lms/DIV
lms/DIV
6Vp-p INPUT, -1.0 TO +5.0V
OP-90 EXHIBITS OUTPUT
PHASE REVERSAL
LT1078/LT1079
NO PHASE REVERSAL
Comparator Applications
The single supply operation of the LT1078/1079 and its
ability to swing close to ground while sinking current
Comparator Rise Response Time
to 10mV, 5mV, 2mV Overdrives
VS=5V,OV
200,.s/DlV
lends itself to use as a precision comparator with TTL
compatible output.
Comparator Fall Response Time
to 10mV, 5mV, 2mV Overdrives
VS=5V,OV
200,.s/DlV
2-259
LT1078/LT1079
APPLICATions InFoRmATion
Matching Specifications
Some specifications are guaranteed by definition. For
example, 70p.V maximum offset voltage implies that mismatch cannot be more than 140p.V. 97dB (= 14p.VN) CMRR
means that worst case CMRR match is 91dB (=28p.VN).
However, the following table can be used to estimate the
expected matching performance at Vs = 5V, OV between
the two sides of the LT1078, and between amplifiers Aand
D, and between amplifiers Band Cof the LT1079.
In many applications the performance of a system
depends on the matching between two op amps, rather
than the individual characteristics of the two devices. The
two and three op amp instrumentation amplifier configurations shown in this data sheet are examples. Matching
characteristics are not 100% tested on the LT1078/79.
LT1078AM/AC
LT1079AM/AC
PARAMETER
Vos Match, .1Vos
50% YIELD
I
I
98% YIELD
110
150
1.2
8
0.4
100
105
30
40
LT1078
LT1079
Temperature Coefficient 4Vas
Average Non-Inverting 18
Match of Non·lnverting 18
CMRRMatch
PSRRMatch
LT1078M/C
LT1079M/C
0.5
6
0.12
120
117
50% YIELD
50
50
0.6
6
0.15
117
117
98% YIELD
190
250
1.8
10
0.5
97
102
TYPICAL APPLICATiOnS
Platinum RTD Signal Conditioner with Curvature Correction
3V (LITHIUM)
13k'
l~F
12.3k'
LT1004·1.Z
43.2k"
10k'
50k
5°C
TRIM
lk"
lk"
O.OZV TO Z.2V OUT =
2°C TO 220°C
",O.l°C
Rp
lk@
O°C
lk"
Rp=ROSEMOUNT l1BMF
"=TRW MAR-6 0.1%
'=1% METAL FILM
2-260
':'
1.21M'
(SELECT Kr 110°C)
UNITS
~V
~V1°C
nA
nA
dB
dB
LT1078/LT1079
TYPICAL APPLICATions
Gain of 10 Difference Amplifier
Micropower, 10ppm'"C, :!: 5V Reference
2M
LT1034BC r-......WIr--9-9V
1.2
10M
1M
INPUT
-5.000V OUTPUT
OUTPUT
00035 TO 2.4V
1M
+
.".
10M
20k
160k
1%
510k
1%
BANDWIDTH =20kHz
OUTPUT OFFSET = 0 7mV
OUTPUT NOISE=BO~Vpp (O.lHz TO 10Hz)
260~V RMS OVER FULL BANDWIOTH
SUPPLY CURRENT: +9V BATIERY= 115pA
-9V BATIERY=B5pA
OUTPUT NOISE: 36~Vpp, O.lHz TO 10Hz
THE USEFULNESS OF DIFFERENCE AMPLIFIERS IS LIMITED BY THE FACT THAT
THE INPUT RESISTANCE IS EQUAL TO THE SOURCE RESISTANCE THE PICOAMPERE OFFSET CURRENT AND LOW CURRENT NOISE OF THE LT107B ALLOWS THE USE OF 1M!l SOURCE RESISTORS WITHOUT DEGRADATION IN
PERFORMANCE. IN ADDITION, WITH MEGAOHM RESISTORS MICROPOWER
OPERATION CAN BE MAINTAINED.
THE LT107B CONTRIBUTES LESS THAN 3% OF THE TOTAL OUTPUT NOISE AND
DRIFT WITH TIME AND TEMPERATURE. THE ACCURACY OF THE -5V OUTPUT
DEPENDS ON THE MATCHING OF THE TWO 1M RESISTORS.
Picoampere Input Current, Triple Op Amp Instrumentation Amplifier with Bias Current Cancellation
-INPUT--.........-~
R2
1M
Rl
1M
Rl
1M
+INPUT -
OUTPUT
4mV TO B.2V
R2
1M
....- I -....::.f+
9V
R
R3
9.1M
RG
200k
2R
20M
R3
9.1M
GAIN =
10M
2R
20M
~ + W-) ~ = 100 FOR VALUES SHOWN
INPUT BIAS CURRENT TYPICALLY < 150pA
INPUT RESISTANCE=3R=30M FOR VALUES SHOWN
NEGATIVE COMMON-MODE LIMIT =Is x 2R +20mV ~ 140mV
GAIN BANDWIDTH PRODUCT = 1.BMHz
2-261
LT1078/LT1079
TYPICAL APPLICATions
+85V, -100V Common Mode
Range Instrumentation Amplifier
(Av=10)
Half-Wave Rectifier
1M
2M
10M
INPUT
2M
INPUT....,..,.,.....-f
10M
OUTPUT
8V TO -9V
OUTPUT
VOMIN=6mv
1M
NO DISTORTION TO 100Hz
.".
BANDWIDTH = 2kHz
OUTPUT OFFSET =8mV
OUTPUT
.
NDlSE:~:~~~p~~~ 1~~~O ;~L~Z~ANDWIDTH
r\.8V
\../
\../-1.8V
r\........I:"\ 1.8V
o
(DOMINATED BY RESISTOR NDlSE)
INPUT RESISTANCE = 10MIl
Absolute Value Circuit (Full-Wave Rectifier)
200k
200k
INPUT_..,.,._,,\
3.5VfVY\
OV
OUTPUT
3.5V-/\
-3. 5V
V V
VOMIN=4mV
NO DISTORTION TO 100Hz
Programmable Gain Amplifier (Single Supply)
100k
1M
3 TO 18V
11
OUT
------..:.::.f
IN ......- - - - -......
ERRORS DUE TO SWITCH ON RESISTANCE,
LEAKAGE CURRENTS, NOISE AND TRANSIENTS
ARE ElIMINATED.
2-262
GAIN
1000
100
10
PIN 13
high
low
low
CD4016B
PIN 5 PIN 6
low
low
high
low
low
high
LT1078/LT1079
TYPICAL APPLICATions
Single Supply, Micropower, Second Order Low Pass Filter with 60Hz Notch
27.6k
27.6k
01%
0.1%
INPUT .....M,.-....~\IY-1~-"'I
OUTPUT
TYPICAL OFFSET
=600~V
5.1M
1%
120k
5%
'c=40Hz
0>30
100pF
1000pF
0.5%
1000pF
0.5%
Micropower Multiplier/Divider
505k
YINPUT 0.1%
(5mV TO 50V)-W..........- - - - -..........- - - - - ,
505k
0.1%
Z INPUT
.----1------...........W-(5mV TO 50V)
10k
505k
0.1%
GAIN
X INPUT
15mV TO 50V)-W..........- - - - -..........- - - ,
OUTPUT
15mVTO BV)
TYPICAL LINEARITY =0.01 % OF FULL SCALE OUTPUT
NEGATIVE SUPPLY CURRENT = 165pA + X+ Y5'0~: OUT
01-Q4 = MAT -04
OUTPUT = IX) IY)
IZ)
,
POSITIVE INPUTS ONLY
POSITIVE SUPPLY CURRENT=165pA+ ~o~l
BANOWIDTH I <3V pp SIGNAL): X AND Y INPUTS =10kHz
Z INPUT =4kHz
2-263
LT1078/LT1079
TYPICAL APPLICATions
Micropower Dead Zone Generator
1M"
1M'
1M"
INPUT ...---W.-"'''''
BIPOLAR SYMMETRY IS EXCELLENT
BECAUSE ONE DEVICE, 02, SETS BOTH LIMITS
SUPPLY CURRENT =240pA
BANDWIDTH = 150Hz
510k
1M·
GAIN
200k
1M
1M·'
1N914
Your
Your
'1% FILM
·'RATIO MATCH 0.05%
02, 3, 4, 5 CA 3096 TRANSISTOR ARRAY
7
Lead Acid Low Battery Detector with System Shutdown
~--~---9---------------'--~-~~~~Y
2M
1%
2M
1%
910k
5%
-
12V
~
>---t----LO = BATTERY LOW
(IF VS< 10.90V)
255k
1%
280k
1%
LO =SYSTEM SHUTDOWN
(IFVs<10.05V)
TOTAL SUPPLY CURRENT =105pA
2-264
I
~
VI
.,.§,..
-'"
112 LT1078
1/4 LT1079
~
1 ft
v+
10k
10k
2.2k
5.6k
~ 5k
3.6k
1.3k
1
J
~~53
05"" "" 06
~
.,A ......
014
'lfII
015.,..
032C;--
)~a- - ~'w
.,A
Z
~
.,..
.......
047"A
~
011
6O01l
6001l
"'022
.....
09""
"A
if
,.........
C4
4pF
'6~035
301l
40~1
£1
":.I
t""
~-~
07~ ~08
044*"
036
t""
":.I
050
I
10k
034~
6.2k
042"1
":.I 049
*"
~
v+
.)038
....
135k
6.2k
*"
J1
023
020~
'=;::
04~
":.I 033
~
017~
~
150k
OUT
~031
-t;:018
v+
026
2.9k
H:
2.5pF
02~
K010
C2
175pF
3k
*"
02~
03:~
~ 02
1 0:5
86k
1
021
INa
INEE>
~ 01
v-
C1
50pF
......
n
)046
024
Q4
-....
""052
03?t
...... 03
a'":::D
2
1
. . 016
"~
12.5k
11.5k
301l
9.1k
05l'1 oj
r'045
r'
"*I
.... 055
4:
~
lOOk
~ 043~
5,35k
---'
o
4:
"""'J
ex>
.........
700k
~
I\.)
V
I
I\.)
m
---'
o
"""'J
CJ1
.~
_ _ _ _I_~
-0
LT1078/LT1079
PACKAGE DESCRIPTion
Dimensions jn inches (millimeters) unless otherwise noted.
HPackage
8Lead TO·S Metal Can
::~~~:~
M.t
o~o
(1016)
SEATING
0050
(~~)
~
PlAt.lE,-
t
THE REFERENCE Pl.AKE AND SEATING PLANE
l'IP
NPackage
8Lead Plastic DIP
J Package
8Lead Ceramic DIP
",OO:l
t 765
~)-Irr~
0
('~..heo)
'::)~D7M~6J
~l
MIN
MOlY?
~
(5588-7874)
0055
~
t
I
234
-.-l
t
0300-0320
(7620-1l1a81·
~
I
I
0038-0068
(0965-1727)-.1
I
3
(6350±0254)
0065
0045-0065
4
'1143_'~51)
JW
(1651l'l-......
TVP
0009-0015
--(0229-0381)
~ 0325~~E: _I
0\25
3i7'5
18255_0381
MIN
_0'00*0010
1
~
0200
0125
(3175)
."
(3302:0127)
(0508)
MIN
0125
(3175)
j~ ~
(2540",0254)
(0457 .. 0076\
NPackage
14 Lead Plastic DIP
(~<:)
0130",0005
==Lj02O
(~~:;:~~~~)
~
(~
J Package
14 Lead Ceramic DIP
2-266
2
~0010
0200
(5080)
~
.AX
(~:=~:)
P\.o\NE
",ro,'905)
--J!-(~~:=~~~~)
Non lEAD DIAMETER IS UNCONTROLLED &TW€EN (0254-1143)
(1397)
tflEfEllENC'f
...
PLANEOSOO0750
00 0 00
~
(~i~=~~~)
GAUGE
MIN
~"""'-LlnCf\Q
LTll 781 LTll 79
TECHNOLOGY~--17-fJ.-A-M-a-x-,-D-U-a-1a-n-d-Q-ua-d-,
Single Supply. Precision Op Amps
~,
FEATURES
DESCRIPTion
17~ Max Supply Current per Amplifier
70p.V Max Offset Voltage
250pA Max Offset Current
SnA Max Input Bias Current
0.9p.Vp-p 0.1 Hz to 10Hz Voltage Noise
l.SpAp-p 0.1 Hz to 10Hz Current Noise
O.Sp.V/oC Offset Voltage Drift
8SkHz Gain·Bandwidth·Product
0.04V/p.s Slew Rate
Single Supply Operation
Input Voltage Range Includes Ground
Output Swings to Ground while Sinking Current
No Pull Down Resistors are Needed
• Output Sources and Sinks SmA Load Current
The LT1178 is a micropower dual op amp in the standard
8-pin configuration; the LT1179 is a micropower quad op
amp offered in the standard 14·pin packages. Both devices
are optimized for single supply operation at SV. Specifica·
tions are also provided at ± 1SV supplies.
•
•
•
•
•
•
•
•
•
•
The extremely low supply current is combined with true
precision specifications: offset voltage is 3Op.V, offset cur·
rent is SOpA. Both offset parameters have low drift with
temperature. The l.SpAp-p current noise and picoampere
offset current permit the use of megaohm level source resistors without introducing serious errors. Voltage noise,
at 0.9p.Vp-p, is remarkably low considering the low supply
current.
Both the LT1178 and LT1179 can be operated from asingle
supply (as low as one lithium cell or two Ni-cad batteries).
The input range goes below ground. The all-NPN output
stage swings to within a few millivolts of ground while
sinking current-no power consuming pull down resistors
are needed.
APPLICATions
• Battery or Solar Powered Systems
Portable Instrumentation
Remote Sensor Amplifier
Satellite Circuitry
• Micropower Sample and Hold
• Thermocouple Amplifier
• Micropower Filters
For applications where three times higher supply current
is acceptable, the micropower LT1078 dual and LT1079
quad are recommended. The LT1078/79 have significantly
higher bandwidth, slew rate; lower voltage noise and better output drive capability.
Self·Buffered, Dual Output, Micropower Reference
Supply Current vs Temperature
20
·J-+------------6~~
1 1
v~~
18
./
16
2.470V
V
OUTPUT
14
Vs=5V,OV
V
//
10 /"'"
-50 -25
-I 1
1 1
_-1 .L
,/
12
- =0.1 % FILM RESISTORS
TOTAL BATIERV CURRENT = 28,..
OUTPUT ACCURACY"" *0.4% MAX
TEMPERATURE COEFFICIENT = 2Oppm/'C
LOAD REGULATION 25ppm/mA. 'l:55mA. V+ i:!:5V
LINE REGULATION"" 10ppmIV
V
v
.-- Vs= ±1 5V
1 1
I
0
25
50
75
TEMPERATURE ('C)
I
100
125
=
2-267
LT1 178/LT1 179
A8S0LUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
TOP VIEW
Supply Voltage ................................... ±22V
Differential Input Voltage ......................... ± 30V
Input Voltage .......... Equal to Positive Supply Voltage
........ 5V Below Negative Supply Voltage
Output Short Circuit Duration .................. Indefinite
Operating Temperature Range
LT1178AM/LT1178MI
LT1179AM/LT1179M ................... - 55°C to 125°C
LT1178AC/LT1178CI
LT1179AC/LT1179C ........................ OOC to 70°C
Storage Temperature Range
All Grades ........................... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
v+
ORDER PART
NUMBER
LT1178AMH
LT1178MH
LT1178ACH
LT1178CH
LT1178AMJ8
LT1178MJ8
LT1178ACJ8
LT1178CJ8
LT1178ACN8
LT1178CN8
4
V- (CASE)
H PACKAGE
a-LEAD TO·5 METAL CAN
J PACKAGE
a-LEAD CERAMIC DIP
N PACKAGE
a-LEAD PlASTIC DIP
LT1179AMJ
LT1179MJ
LT1179ACJ
LT1179CJ
LT1179ACN
LT1179CN
OUTPUT A 1
OUTPUT B 7
J PACKAGE
N PACKAGE
14-lEAD CERAMIC DIP 14-LEAO PLASTIC DIP
ELECTRICAL CHARACTERISTICS Vs =SV, OV, VCM =D.1V, Vo =1.4V, TA =2SOC, unless noted.
SYMBOL
Vos
PARAMETER
Input Offset Voltage
AVos
ATime
Long Term Input Offset
Voltage Stability
los
18
en
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
in
Input Noise Current
Input Noise Current Density
Input Resistance
Differential Mode
Common·Mode
Input Voltage Range
CMRR
PSRR
AVOL
2-268
Common·Mode Rejection
Ratio
Power Supply Rejection
Ratio
Large Signal Voltage Gain
CONDITIONS (NOTE 1)
LTl178
LT1179
LT1178AM/AC
LT1179AM/AC
MIN
TYP MAX
70
30
100
35
0.5
0.05
3
0.9
50
O.lHzto 10Hz (Note 2)
10= 10Hz (Note 2)
10 = 1000Hz (Note 2)
0.1 Hz to 10Hz (Note 2)
10 = 10Hz (Note 2)
10= 1000Hz
(Note 3)
49
1.5
0.03
0.01
0.8
VCM = OV to 3.5V
3.5
0
93
2.0
12
3.9
-0.3
103
Vs=2.2V to 12V
94
Vo=o.o3Vt04V, No Load (Note 3)
Vo = 0.03V to 3.5V, RL = 50k
140
80
LTl178M/C
LTll79M/C
MIN
TYP
40
40
0.6
0.25
5
2.0
75
65
2.5
0.07
0.05
3
0.9
50
49
1.5
0.03
0.01
0.6
MAX
120
150
UNITS
~V
~V
~V/Mo
0.35
6
nA
nA
~Vp·p
nV/v'Hz
nV/v'Hz
pAp·p
pAlv'Hz
pAlv'Hz
3.5
0
90
2.0
12
3.9
-0.3
102
Gil
Gil
V
V
dB
104
92
104
dB
700
200
110
70
700
200
V/mV
VlmV
LTl178/LTl179
ELECTRICAL CHARACTERISTICS Vs = 5V, ov, VCM = 0.1V, Vo = 1.4V, TA = 25°C, unless noted.
SYMBOL
PARAMETER
Maximum Output Voltage
Swing
SR
GBW
Is
Slew Rate
Gain Bandwidth Product
Supply Current per Amplifier
Channel Separation
Minimum Supply Voltage
CONDITIONS (NOTE 1)
Output Low, No Load
Output Low, 2k to GND
Output Low, ISINK = 1OO~A
Output High, No Load
Output High, 2k to GND
Av = +1, CL= 10pF (Note 3)
fos5kHz
Vs= ± 1.5V, Vo=OV
aV IN =3V, RL = 10k
(Note 4)
LT1178MIC
LTl179MIC
MIN
TYP
6.5
0.2
120
4.2
4.4
3.8
3.5
0.013
0.025
60
14
13
130
2.0
LT1178AMIAC
LT1179AMIAC
MIN
TYP
MAX
6.5
9
0.2
0.6
160
120
4.2
4.4
3.5
3.8
0.013
0.025
60
13
18
12
17
130
2.0
2.2
MAX
9
0.6
160
UNITS
mV
mV
mV
V
V
V/~
kHz
21
20
~A
~A
2.2
dB
V
ELECTRICAL CHARACTERISTICS Vs=5V,OV, VCM = 0.1 V, VO=1.4V, -55°C~TA~125°C, unless noted.
SYMBOL
Vos
aVoP)aT
los
16
CMRR
PSRR
AVOL
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Common-Mode Rejection
Ratio
Power Supply Rejection
Ratio
Large Signal Voltage Gain
Maximum Output Voltage
Swing
Is
CONDITIONS
LTl178
LTl179
(Note 5)
VCM = 0.05V to 3.2V
Vs= 3.0V to 12V
Vo=0.05Vto 4V, No Load (Note 3)
Vo = 0.05V to 3.5V, RL = 50k
Output Low, No Load
Output Low, ISINK = 100~
Output High, No Load
Output High, 2k to GND
Supply Current per Amplifier
••
•
•
•
•
•
••
••
••
•
LT1178AM11179AM
MIN TYP MAX
80
290
90
320
0.5
2.2
0.07 0.50
4
7
87
100
88
100
70
40
350
130
9
160
4.2
3.7
14
3.9
3.0
LT1178MI1179M
MIN TYP MAX
100 420
110 450
0.6
3.0
0.07 0.70
4
8
84
98
UNITS
~V
~V
~V/oC
nA
nA
dB
86
100
dB
55
350
130
9
160
4.2
3.7
15
VlmV
VlmV
mV
mV
V
V
35
13
220
3.9
3.0
23
13
220
~A
27
ELECTRICAL CHARACTERISTICS Vs=5V,OV, VCM=0.1V, Vo=1.4V,OOC~TA~70°C, unless noted.
SYMBOL
Vos
aVoslaT
los
16
CMRR
PSRR
AVOL
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Common-Mode Rejection
Ratio
Power Supply Rejection
Ratio
Large Signal Voltage Gain
Maximum Output Voltage
Swing
Is
Supply Current per Amplifier
CONDITIONS
LT1178
LT1179
(Note 5)
VCM = OV to 3.4V
Vs=2.5Vto12V
Vo = 0.05V to 4V, No Load (Note 3)
Vo = 0.05V to 3.5V, RL = 50K
Output Low, No Load
Output Low, ISINK = 100~A
Output High, No Load
Output High, 2k to GND
••
•
•
•
•
•
••
••
••
•
LTl178ACI1179AC
MIN TYP MAX
170
50
60
200
0.5
2.2
0.06 0.35
3
6
90
101
LTl178CI1179C
MIN TYP MAX
65
250
70
290
0.6
3.0
0.06 0.50
3
7
86
100
UNITS
~V
~V
~V/oC
nA
nA
dB
90
102
88
102
dB
105
55
500
160
8
140
4.3
3.8
14
80
45
500
160
8
140
4.3
3.8
15
V/mV
VlmV
mV
mV
V
V
4.1
3.3
11
190
4.1
3.3
21
11
190
24
~A
2-269
Ell
LT1 178/LT1 179
ELECTRICAL CHARACTERISTICS Vs= :t15V, TA =25°C, unless noted.
SYMBOL
Vos
los
Ie
PARAMETER
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Voltage Range
CONDITIONS
AVOL
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
VOUT
Maximum Output Voltage Swing
SR
GBW
Is
Slew Rate
Gain Bandwidth Product
Supply Current per Amplifier
VCM + 13.5V, -15V
Vs=5V,OVto±18V
Vo= ±10V,RL=50k
Vo= ± 10V, No Load
RL=50k
RL=2k
Av= +1
CMRR
PSRR
fo~5kHz
LTl178AM/AC
LT1179AM/AC
MIN
TYP
80
0.05
3
13.5
13.9
-15.0 -15.3
97
106
112
96
300
1200
2500
600
±13.0 ±14.2
±11.0 ±12.7
0.02
0.04
85
16
MAX
350
0.25
5
MIN
13.5
-15.0
94
94
250
400
±13.0
±11.0
0.02
21
LTl178M/C
LTl179M/C
TYP
100
0.05
3
13.9
-15.3
106
112
1000
2500
±14.2
±12.7
0.04
85
17
MAX
480
UNITS
0.35
6
nA
nA
V
V
dB
dB
V/mV
V/mV
V
V
Vips
kHz
pA
25
~V
ELECTRICAL CHARACTERISTICS Vs= :t15V, -55°CsTAS125°C, unless noted.
SYMBOL
Vos
ilVOFlilT
los
Ie
AVOL
CMRR
PSRR
Is
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Maximum Output Voltage Swing
Supply Current per Amplifier
CONDITIONS
(Note 5)
Vo= ±10V, RL=50k
VCM = + 13V, -14.9V
Vs=5V,OVto ±18V
RL=5k
•
•
•
•
•
•
•
•
•
LTl178AM/1179AM
MIN
TYP
MAX
140
630
2.8
0.6
0.07
0.50
4
7
120
500
103
92
91
109
±11.0 ±13.5
18
26
LTl178M/1179M
MIN
TYP
MAX
170
880
4.0
0.7
0.07
0.70
4
8
100
500
103
88
109
88
±11.0 ±13.5
19
30
UNITS
pV
pV/oC
nA
nA
VlmV
dB
dB
V
pA
ELECTRICAL CHARACTERISTICS Vs= :t15V,O°CsTAS70°C, unless noted.
SYMBOL
Vos
ilVOFlilT
los
Ie
AVOL
CMRR
PSRR
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Common· Mode Rejection Ratio
Power Supply Rejection Ratio
Maximum Output Voltage Swing
Supply Current per Amplifier
CONDITIONS
(Note 5)
Vo= ±10V,RL=50k
VCM=13V, -15V
Vs=5V,OVto ±18V
RL=5k
Is
The • denotes the specifications which apply over the full operating
temperature range.
Note 1: Typical parameters are defined as the 60% yield of parameter
distributions of individual amplifiers; i.e., out of 100 LT1179s (or 100
LT1178s) typically 240 op amps (or 120) will be better than the indicated
specification.
Note 2: This parameter is tested on a sample basis only. All noise
2-270
LTl178AC/1179AC
TYP
MIN
MAX
100
480
0.6
2.8
0.06
0.35
3
6
200
800
104
94
110
93
±11.0 ±13.6
24
17
LTl178C/1179C
TYP
MAX
130
660
0.7
4.0
0.06
0.35
3
7
150
750
91
104
91
110
±11.0 ±13.6
18
28
MIN
•
•
•
•
•
•
•
•
•
parameters are tested with Vs = ± 2.5V, Vo = OV.
UNITS
pV
pV/oC
nA
nA
V/mV
dB
dB
V
pA
Note 3: This parameter is guaranteed by design and is not tested.
Note 4: Power supply rejection ratio is measured at the minimum supply
voltage. The op amps actually work at 1.7V supply but with a typical offset
skew of - 300~V.
Note 5: This parameter is not 100% tested.
'7~ElcnHNfAO''OG-~~~---t-~-~~-~-~-~-~~-~-~-~-~~-~-~~-~-~
~
JFET-Input Operational Amplifiers
1.-"
IT
Low Supply Current (LF155)
High Speed (LF156)
FEATURES
DESCRIPTion
•
•
•
•
•
•
Linear Technology's LF155f 156 series features several
improvements compared to similar types from other manufacturers: offset voltage drift with temperature and slew
rate are guaranteed on all grades, not just on the more
expensive" A" grades. Other specifications such as voltage gain and high temperature bias and offset currents
are also improved.
Guaranteed Offset Voltage Drift on All Grades
Guaranteed Slew Rate on All Grades
Guaranteed Low Input Offset Current
10pA Max.
Guaranteed Low Input Bias Current
50pA Max.
Guaranteed High Slew Rate (156Af356A) 10VfpS Min.
Fast Settling to 0.01 %
1.5pS
The industry standard LF155f156 devices exhibit phase
reversal at the output when the negative common-mode
limit at the input is exceeded (Le., from -12V to -15V
with ± 15V supplies). This can cause lock-up in servo
systems. As shown below, LinearTechnology's LF155f156
does not have this problem due to unique phase reversal
protection circuitry. For applications requiring higher performance, see the LT1055 and LT1056 data sheets.
APPLICATions
•
•
•
•
•
Output Amplifiers for Df A Converters
Fast Sample and Hold Circuits
High Speed Integrators
Photocell Amplifiers
High Input Impedance Buffers
Voltage Follower with Input Exceeding the Negative
Common-Mode Range
INPUT
10V/DIV
O.5ms/DlV
OUTPUT
STANDARD
155/156
OUTPUT
LINEAR TECH
155/156
10V/DIV
10V/DIV
2-271
LF155A/355A/155/355
LF156A/356A/156/356
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Supply Voltage
LF155A/155/355A,
LF156A1156/356A ................... ±22V
LF355/356 ......................... ± 18V
Differential Input Voltage
LF155A1155/156A1156 . .............. ±40V
LF355A/355/356A1356 . .............. ±30V
Input Voltage (Note 1)
LF155AI 1551 156AI 156 . . . . . . . . . . . . . .. ± 20V
LF355A1355/356A1356 . . . . . . . . . . . . . .. ± 16V
Output Short Circuit Duration ............. Indefinite
Operating Temperature Range
LF155A1155/156A1156 ....... -55°Ct0125°C
LF355A1355/356A1356 . . . . . . . . . . . 0°Cto 70 °C
Maximum Junction Temperature
LF155A1155/156A/156 ............... 150°C
LF355A/355/356A/356 ............... 100°C
Storage Temperature Range
AIiDevices .................. -65°Ct0150°C
Lead Temperature (Soldering, 10 sec.) ........ 300 0
ORDER PART NUMBER
TOP VIEW
N/C
vHPACKAGE
METAL CAN
SYMBOL
PARAMETER
CONOITIONS
LF355N8 LF356N8
LF355AN8 LF356AN8
N8 PACKAGE
8 PIN PLASTIC
Input Offset
Voltage
TA=25°C
Over Temperature
355A/356A
Rs=500
Change in
Average TC with
Rs=500 (Note 4)
dVOS
AT
los
Input Bias
Current
RIN
AVOL
2-272
Input
Resistance
Large Signal
Voltage
Gain
= 25°C (Note 3)
:s125°C
:s70°C
25°C (Note 3)
:s125°C
:s70°C
TJ=25°C
Vs= ±15V. TA=25°C.
Vo= ± 10V. RL =2k
Over Temperature
Vos is adjusted with a 20k or 50k
potentiometer between the balance
terminals. The wiper is tied to V+
(Note 2)
LF155A/156A
LF355A/356A
MIN
Vos
LF156H
LF156AH
LF356H
LF356AH
TOP VIEW
e
ELECTRICAL CHARACTERISTICS
LF155H
LF155AH
LF355H
LF355AH
TYP
MAX
LF155/156
MIN
TYP
LF355/356
MAX
MIN
TYP
UNITS
MAX
LF155A/355A/155/355
LF156A 1356A 1156/356
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
(Note 2)
LF155A/156A
LF355A/356A
CONDITIONS
MIN
Va
VCM
CMRR
PSRR
Is
SR
GBW
ts
en
in
CIN
Output
Voltage
Swing
Input
Common-Mode
Voltage Range
Common-Mode
Rejection Ratio
Supply Voltage
Rejection Ratio
Supply Current
Slew Rate
Gain Bandwidth
Product
Settling Time
toO.Ol%
Input Noise
Voltage
Density
Input Noise
Current
Density
Input
Capacitance
MAX
LF155/156
MIN
TYP
LF355/356
MAX
MIN
TYP
UNITS
MAX
Vs= ±15V, RL =10k
Vs= ±15V, RL=2k
••
±12
±10
±13
±12
±12
±10
±13
±12
±12
±10
±13
±12
V
V
Vs= ±15V
•
•
±11
+15.1
-12
100
±11
+15.1
-12
100
±10
V
80
±15.1
-12
100
••
85
100
85
-
-
80
100
Vs=±10Vto ±18V
Vs= ±10Vto ±15V
TA=25°C, Vs= ±15V
LF155/355 Series
LF156/356 Series
LF356A
.85
2
5
and Vos, Isand los are measuredatVCM=O.
4
7
~S': t"] .
Av=+l
TA=25°C, Vs= ± 15V
LF155/355 Series
LF156/356 Series
TA=25°C, Vs= ± 15V
LF155/355 Series
LF156/356 Series
TA=25°C, Vs= ± 15V
LF155 Series (Note 5)
LF156 Series
TA=25°C, Vs= ±15V
f=100Hz
LF155 Series
LF156 Series
f=1000Hz
LF155 Series
LF156 Series
TA=25°C, Vs= ± 15V
f=100Hz
f=1000Hz
LF155A/156A
LF355A/356A
LF155/156
±15VsVss ,,20V
±15VsVss ±lBV
-55°CsTAs +125°C QOC:s;TA:s+70°C
85
-
':6 . . i;··~.A·":t;";iI·:¥?v ... "
/
100
-
2
5
7
2
5
-
-
-
:tiYtt~~
4
,'.
2.5
:A,
6
dB
dB
dB
4
10
..
12
.
rnA
rnA
rnA
V/p.s
VI p.s
10
12
-
2.5
5
2.5
5
2.5
5
MHz
MHz
4
1.5
4
1.5
4
1.5
p.s
p.s
25
15
25
15
25
15
nV/vHz
nV/vHz
20
12
20
12
20
12
nV/vHz
nV/vHz
0.01
0.01
3
0.01
0.01
3
0.01
0.01
3
pAlvHz
pA/vHz
pF
4
•
The. denotes the specifications which apply over the full operating
temperature range. The shaded electrical specifications indicate those
parameters which have been improved or guaranteed test limits provided
for the first time.
For MIL-STD components, please refer to LTC 883C data sheet for test
listing and parameters.
Note 1: Unless otherwise specified, the absolute maximum negative
input voltage is equal to the negative power supply voltage.
Note 2: Unless otherwise stated, these test conditions apply:
Supply Voltage, Vs
TA
TYP
LF355/356
vs= ±15V
0°CsTAs+70°C
Note 3: The input bias currents are junction leakage currents which
approximately double for every 100G increase in the junction
temperature, TI . Due to limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a
result of internal power dissipation, Po. TI = TA + 8 JA Po where 8JA is
the thermal resistance from junction to ambient. Use of a heat sink is
recommended if input bias current is to be kept to a minimum.
Note 4: The temperature coefficient of the adjusted input offset voltage
changes only a small amount (0.5!,V/oG typically) for each mV of adjustment from its original unadjusted value. Gammon-mode rejection and
open loop voltage gain are also unaffected by offset adjustment.
Note 5: Settling time is defined here for a unity gain inverter connection
using 2kO resistors. It is the time required for the error voltage (the
voltage at the inverting input pin on the amplifier) to settle to within
0.01 % of its final value from the time a 10V step input is applied to the
inverter.
2-273
LF155A/355A/155/355
LF156A/356A/156/356
TYPICAL PERFORmAnCE CHARAaERISTICS
Gain, Phase vs Frequency
100
20
Normalized Slew Rate vs
Temperature
Inverter Settling Time
10
TA~25°C
r-~-"'TTTTITr"'--r""1I7T"TTT'TT1
14
Vs=:15V
15
GAIN
VS~=15V
60
:~~
J
,LF15~
LF11f\~
1.0
PHASE
1~F15f\
~
" , ::::..
1.2
I
Li'56
LFJ55_
r--
LF156"'"
r--
0.8
~
-5
-10
01
0.6
\
1
3
10
FREQUENCY (MHz)
0.3
30
-20
100
1.0
SmLlNG TIME ("')
Supply Current vs
Temperature
10
-25
-75
LF156 Large Signal
Response
25
75
TEMPERATURE (OC)
LF156 Small Signal
Response
VS=::t::15V
........
-
LF156
I
LFJ55
o
-75
-25
25
75
TEMPERATURE (OC)
AV~
125
AV~
+1, Cl ~100pF, 1",/DlV
+1, Cl ~100pF, O.2pSEC/DIV
PACKAGE DESCRIPTiOn Dimensions in inches (millimeters) unless otherwise noted.
H Package Metal Can
0.040
11.01~
I
.~u
SEATING
PLANE
O.Dl0!O 045
(0254-1.143)
~ :~i!:~
NB Package B Lead Plastic
~~""!..."
~=r~:r'·
JL
.
DlA
--~----l~,,~.~~-----.
----r-- ---
00 0 OD
~l.·t"'AXI
_
BAUGE
-------r-PLANE
T
0"&&-1°·,86
(4.191-4t1!111)
..!!:!!!.::.!!.
O.04O
(12.70.'9.115)
i1.D16i MAX
_II.-~
G ./>
(""',y~.533)
/
~ ~~
45°TYP
ID,6B6-0.864)
0.060
(1.124)
D.370-0.40D~_
~
D.,..!,.".
(0.686-1.143)
.!.!l!.r~-Ir
~"'t~
- ~~~~
(3.937-4.445)
~O.14&
.LA"
(2.92'.1.813)
.!!!!..
1.0311-0.0lIl
(0.712-1.524)
(2.540)
1lP
0.o14-0.oza
TYP
irii=i.iiii
"'.
'
·
.
·
Fi,·.·
o
0
o
o
-f
,
t
.!:!!!=!:.!!!..
(7.386-7.I74)
1lP
'LEADS WITHIN 0.007 OF TRUE POSITION (TP) AT GAUGE PLANE
2-274
,
to: . . .-..
01.
(0203-o.a81)
TYP
125
~-Y""llnlt\Q
~~
LF412A IOP-21 5
TECHNOLoG~~~------D-u-a-IP-r-e-C-isi-O-n-J-FE-T-I-np-u-t
Operational Amplifiers
DESCRIPTion
FEATURES
•
•
•
•
•
•
•
•
1mVMax.
10p,V/oC Max.
10V/p,s Min.
3.5MHzMin.
1.8mA Typ.
10pATyp.
Internally Trimmed Offset Voltage
Offset Voltage Drift
High Slew Rate
Wide Bandwidth
Low Supply Current per Amplifier
Low Input Bias Current
Standard 8-Pin Configuration
All Packages Available:
Metal Can
Hermetic DIP
Plastic DIP
APPLICATions
•
•
•
•
•
Sample and Hold Amplifiers
Output Amplifier for Dual Current Output DACs
High Speed Integrators
Photocell Amplifiers
High Input Impedance Instrumentation Amplifiers
Linear Technology's LF412A and OP-215 series of dual
JFET input op amps feature several improvements compared to similar types from other manufacturers.
Both devices have lower input bias and offset currents
over the entire temperature range, and are available in all
standard 8-pin packages.
In addition, Linear's LF412A has lower voltage noise and
higher voltage gain. Linear's OP-215 supply currents are
nearly halved.
Please see the LT1 057/LT1 058 data sheet for applications
requiring higher performance. The LT1057 is a pin compatible JFET input dual, the LT1058 is a JFET input quad
op amp in the standard 14-pin DIP configuration.
Slew Rate
Voltage Noise Density vs Frequency
140
26
24
~
~
~
~
en
i""'- t--.
20
.............
80
~
60
>
20
~
~ 40
i5
RISING
Vs= ",15V
RL=2k
Av=1
10
-w
~
~
14
12
-~
w m
0
~
TEMPERATURE ('C)
TA=25'C
~ 100
18
16
WI~~lv
~120
1LLlN~
22
/~If CORNER
lRT9~fl~fY
I11111111
a
100
1~
1
10
100
FREQUENCY (Hz)
lk
10k
2-275
LF412A/OP-21S
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Supply Voltage
LF412AM/AC, OP·215A1E ........................ ± 22V
LF412M/C,OP·215C/G .......................... ± 18V
Internal Power Dissipation ....................... 670mW
Operating Temperature Range
LF412AM/M, Op·215A/C ............... - 55°C to 125°C
LF412AC/C,OP·215E1G ................... OOC to 70°C
Differential Input Voltage
LF412AM/AC, OP·215A1E ........................ ± 40V
LF412M/C, OP·215C/G ........................... ± 30V
Input Voltage (Note A)
LF412AM/AC, OP·215A1E ........................ ±20V
LF412M/C,OP·215C/G .......................... ± 16V
Output Short Circuit Duration .................. Indefinite
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec) .............. 300°C
TOP VIEW
ORDER PART
NUMBER
v+
8
LF412AMH
LF412MH
LF412ACH
LF412CH
OP·215AH
OP·215CH
OP·215EH
OP·215GH
LF412AMJ8
LF412MJ8
LF412ACJ8
LF412CJ8
LF412ACN8
LF412CN8
OP·215AJ8
OP·215CJ8
op.215EJ8
OP.215GJ8
OP.215EN8
OP.215GN8
4
v- (CASE)
H PACKAGE METAL CAN
7 OUTPUT B
6 -IN:
'---_----1 5 +IN
J8 PACKAGE HERMETIC OIP
N8 PACKAGE PLASTIC OIP
Note A: Maximum negative input voltage is equal to the negative supply
voltage.
:!:20VforLF412A, Vs= :!:15V~orallothergrades.
ELECTRICAL CHARACTERISTICS Vs=
VCM =OV, TA =25°C unless otherwise noted.
LF412,OP·215CJG
MIN
±12
:-----t--:c=-=---:---t--=-='~=-"'-'c.::..:..----i ±11
10
3.5
±13
±12.7
-
15
5.7
2.3
1.1
2.3
1.1
±16
CMRR
PSRR
en
2-276
80
+19.5
-16.5
100
-
TYP
MAX
10
15
100
200
UNITS
pA
pA
LF412A/OP-21S
±20VlorLF412A, Vs= ±1SVloralloth~rgrades.
ELECTRICAL CHARACTERISTICS Vs=
VCM =ov, -SS"CSTAS12S"C unless otherwise noted.
SYMBOL
los
PARAMETER
Input Offset Voltage
Average Input Offset
Voltage Drift
Input Offset Current
Is
Input Bias Current
Vos
Input Voltage Range
CONDITIONS
T = 125·C (Note 1)
fA = 125·C, Warmed·Up
Vs= t15V
T = 125·C (Note 1)
fA = 125·C, Warmed·Up
Vs= t 15V
OP·215
LF412
CMRR
Is
PSRR
AVOL
Vo
Common·Mode Rejection
Ratio
Supply Current
Power Supply Rejection
Ratio
Large Signal Voltage Gain
Output Voltage Swing
VCM=±16V
VCM= ±11V
VCM= ±10.3V
Vs= tl0Vto t20V
Vs= tl0Vto t16V
RL 2:2k1l, Va = ± 10V
Vs= ±15V
RL2:10kO, Vs= ± 15V
MIN
•
•
••
••
•
tl0.3
•
••
•
•
••
•
•
OP·215A
TYP
0.5
3
(Note 3)
0.8
1.2
-
-
82
-
80
30
t12
MAX
2.0
10
8
14
t1.5 tl0
t2.2 t18
+14.5
-11.5
MIN
100
-
4l
&.a
-
-
-
-
100
150
t13
LF412M, OP·215C
MIN TYP MAX
'5&,
-• ,>5'1.1l'.';,~,.?
~'rr>;te,( ,; ;.M1II:'"
. :} ,~';~;~:'i~~~ :i;j,,~;~<'~:~.
'"', m;;~,;;.t·lt~>.
;.;.'. ~"
f
'~A·',
,....
," , p.
• _"
-
-
LF412AM
TYP MAX
0.7
2.0
t16
80
80
-
V
-
-
. 10&'".v....,.. •
dB
dB
dB
rnA
dB
dB
"'~,':~ ~.:';'f;"·
V/mV
-
±11
-
1lilT
'
±13
-
-
"
-
..,.··~.··U'
-
/~
,-
"'"''
-
100
100
70
80
-
5.6
,;",
-
+19.5
-16.5
100
4.0
100
-
-
" , ': • i".:'. ;-f;'
-
nA
nA
V
tl0.3
-
nA
nA
-
-
-
±12
, .. '
.,'
~V/·C
+14.5
-11.5
+14.5
-11.5
-
' '30
'
"
UNITS
mV
±12
-
t13
V
±20VlorLF412A, Vs= ±1SVlorall.othergrades.
ELECTRICAL CHARACTERISTICS Vs=
VCM = OV, O"C STA S70"C unless otherwise noted.
SYMBOL PARAMETER
Input Offset Voltage
Vas
Average Input Offset
Voltage Drift
Input Offset Current
los
Is
Input Bias Current
Input Voltage Range
~ = 70·C (Note 1)
A= 70·C, Warmed·Up
Vs= ± 15V
T· = 70·C (Note 1)
fA = 70·C, Warmed·Up
Vs= ±15V
OP-215
LF412
CMRR
Is
PSRR
AVOL
Vo
Common·Mode Rejection
Ratio
Supply Current
Power Supply Rejection
Ratio
Large Signal Voltage Gain
Output Voltage Swing
MIN
CONDITIONS
VCM=±16V
VCM= tl1V
VCM= ±10.3V
•
•
••
-
••
•
•
••
•
-
0.45
0.8
±0.12 to.7
±0.16 tl.4
.:• -
80
•
•
•
The. denotes the specifications which apply over the full operating tern·
perature range. The shaded electrical specifications indicate those pa·
rameters which have been improved or guaranteed test limits provided for
the firsttime.
Note 1: Input bias and offset currents are specified for two different condi·
tions. The T specification is with the junction at ambient temperature; the
80
50
±12
-
100
"If)
-
100
180
±13
MIN
MAX
1.65
15
'.
"*10;$
,.',' ,+IA.t,'
::1~~, ,'~,
"..
Vs= tl0Vto t20V
Vs= tl0Vto t16V
RL 2: 2k1l, Vo= t 10V
Vs= t15V
RL2:10kO, Vs= ±15V
Op·215E
TYP
0.4
3
(Note 3)
0.06
0.08
-
-
-
.;:.' ' lUIit'
/ .
"
-"-'
-
-
±16
80
-
80
-
LF412C,OP·215G
MIN TYP MAX
~,
"
-
:!;iOll6 .t1A
+19.5
-11.5
100
-
3.8
100
-
t13
UNITS
mV
20:
~V/·C
'.
'
t,)
nA
nA
'~t4 *0$
·'r·
"- '£otI9 tl.8' .
nA
nA
'
,
..
- '~1O" !=~ ,..,.,
- til +14.5
-11.5
- - -- 7076 100
100 -
....
d,/l,
;n'
-
76
11Xj'
.1Jj)
-
.;,
±12
'-""'
5.6
-
'fll: It~;·,~,~, .
±12
elf '
.~,
"
:J;}',
',;t' .
•
±13
,
-
V
V
dB
dB
dB
rnA
dB
dB
V/mV
V
warmed·up specification Is with the device operating in a warmed·up condi·
tion at the ambient temperature specified.
Note 2: Gain·bandwidth product is not tested. It is guaranteed by design
and by inference from the slew rate measurement.
Note 3: The LF412A is 100% tested to this specification. All other grades
are sample tested.
2-277
LF412A/OP-215
TYPICAL PERFORmAnCE CHARACTERISTICS
Common·Mode Rejection Ratio
vs Frequency
Open· Loop Frequency
Response
120
100
~
OJ
:!:!.
60
>
40
0
"-
§
z
~
100
OJ
:!:!.
a:
a: 60
::;;
I\.
'-'
r\.
20
40
r\.
0
-20
10
100
lk
0
~ 100
z
Q
o
100
10
10k lOOk 1M 10M 100M
~
"- r--...
"
FREQUENCY (Hz)
lk
10k lOOk
FREQUENCY (Hz)
TA=25°C
OJ 120
:!:!.
20
[\.
1
" ""-"-
80
~
140
Vs= :15V
TA=25°C
i--
TA=25°C
'\.
80
~
'"
~
120
I J
VS=:15V_
bo..
Power Supply Rejection Ratio
vs Frequency
1M
iil
~
:::>
en
a:
80
I--
60
""NEGATI~
SUPPLY
POSITIVE_
,,-SUPPLY
"-
~
40
"-
~
i'i' 20
o
10M
10
100
lk
10k lOOk
FREQUENCY (Hz)
"-
"'-
1M
PACKAGE DESCRIPTiOnS
0165-0185
~)
-,c-~_ _+t__ ;~~ENCE
0500-0750
~
t
NOTE LEAD DIAMETER IS UNCONTROLLfD BETWEEN
THE REFERENCE PlANE AND SEATING PLANE
J Package
8 Lead Cerdip
N Package
8 Lead Molded Dip
O
r--{l~:JI
llBlr7611sl1
1
0009-0015
~)
1J
0045±0015
(1143±0381)
0100±0010
(2540±0254)
2-278
2
3
4
t
0250:0010
~254)
10M
.LTYJ~~k>~----o-p-e-ra-t-io-n-a-1A-Lm-H2-~-li~-i:-:
FEATURES
DESCRIPTion
•
•
•
•
•
•
The LH2108A series of precision operational amplifiers is
particularly well suited for high source impedance applications requiring low offset and bias currents, as well as
low power dissipation. Unlike FET input amplifiers, the
offset and bias currents of the LH2108A do not change
significantly with temperature variations. Advanced design, processing and testing techniques make Linear's
LH2108A a superior choice over previous devices.
Guaranteed 2nA Max. Input Bias Current
Guaranteed 600~ Max. Supply Current
Guaranteed 0.5mV Max. Offset Voltage
Guaranteed 5p.V1°C Max. Drift
Wide Supply Voltage Range: ± 2V to ± 20V
Interchangeable with Other Manufacturers' LH2108
For higher performance dual amplifiers, see the LT1024,
LT1002, and LT1013 data sheets.
APPLICATions
•
•
•
•
Integrators
Transducer Amplifiers
Analog Memories
Light Meters
0.1Hz to 10Hz Noise
Fast Precision Inverter
10k"
INPUT
TA=25°C
Vs±2V to ±20V
z
10k"
10k
§l
2:
0
10pF
3>
1N4148
~
+15V
300pF
+15V
~
;'!:
..J
0
>
~
~
4
6
10
TIME (SECONDS)
10k
30pF
-15V
*1% METAL FILM
FULL POWER BANDWIDTH = 2MHz
SLEW RATE = 50V/ pS
2-279
...
...
LH2108A
ABSOLUTE mAXimum RATinGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . .. ::I:: 20V
Differential Input Current (Note 1) . . . . . . . . .. ::I:: 10mA
Input Voltage (Note 2) . . . . . . . . . . . . . . . . . . .. ::I:: 15V
Output Short Circuit Duration ............. Indefinite
Operating Temperature Range ...... -55°C to 125°C
Storage Temperature Range ....... -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ........ 300°C
PACKAGE/ORDER InFORmATion
ORDER PART
NUMBER
V+(A) 1
OUT OOMP (A) 2
lNOOMP(A) 3
lNVERTlNG1NPUT(A) 4
13 NONINVERTING INPUT (8)
12 INVERTINGI'PUTI')
tIDNINVERTlNGINPUT(A) 5
11 INCOMPI')
LH2108AD/883B
LH2108D/883B
LH2108AD
LH2108D
TOP VIEW
HERMETlCDIP
ELECTRICAL CHARACTERISTICS
::I::5VsVss ::I::20V and -55°CsTAS125°C unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
Vos
Input Offset Voltage
TA=25°C
t::.Vos
t::.Temp
Average Temperature Coefficient
of Input Offset Voltage
los
Input Offset Current
t::.los
t::.Temp
Average Temperature Coeffcient
of Input Offset Current
Is
Input Bias Current
TA=25°C
AVOl
Large Signal Voltage Gain
TA=25°C, Vs= ± 15V,
VOUT= ±10V, Rl 2:10kll
CMRR
PSRR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
Input Resistance
Supply Current
VOUT
R)N
Is
MIN
LH2108A
TYP
0.3
1.0
0.05
TA=25°C
0.5
Vs=±15V
Vs-±15V, Rl =10kll
TA-25°C
TA=25°C
TA=125°C
Note 1: Differential input voltages greater than 1V will cause exceSsive
current to flow through the input protection diodes unless current limiting
resistance IS used.
0.5
80
40
96
96
±13.5
±13
30
R1
R2
LH2108
TYP
0.7
3.0
0.2
0.4
2.5
0.05
2.0
3.0
0.5
0.5
50
25
85
80
±13.5
±13
30
110
110
±14
70
0.3
0.15
MIN
0.5
1.0
5.0
300
0.6
0.4
MAX
2.0
3.0
15
mV
mV
",V/oC
0.2
0.4
2.5
nA
nA
pA/oC
2.0
3.0
nA
nA
V/mV
V/mV
dB
dB
V
V
Mil
rnA
rnA
300
100
96
±14
70
0.3
0.15
UNITS
0.6
0.4
Note 2: For supply voltages less than ± 15V, the maximum input
voltage is equal to the supply voltage. For typical performance, see
LM108A data sheet.
comPEnSATion CIRCUITS
Standard Compensation Circuit
MAX
Feedforward Compensation
Alternate Frequency Compensation
R1
R2
-VI' -J>,J1I'v-_--J>,JII'v----,
INPUT--""~H
VOUT
VOUT
VOUT
R3
+VIN""""'''''--I+
Cf'" l,1+'i\12
c,
2-280
Co=30pF
C1
500pF
~~~~~~~---------L-OW--p-ow--er-o-p-L_~_~_~
and Reference
DESCRIPTion
FEATURES
•
•
•
•
•
•
•
Guaranteed Operation at + 1.2V
Op Amp and Reference on Single Chip
Low Supply Current 400pA
Capable of Floating Mode Operation
Low Reference Drift 20ppm/oC
Low Offset Voltage
Output Swings to Within 15mVof Rails
The LM10 combines a precision reference, a reference
buffer amplifier and an independent, high quality op amp
on a single chip. The device is capable of operation from a
single supply as low as 1.1V, from dual supplies up to
± 20V and typically draws 270pA supply current. Input
voltage range for the op amp includes ground, while the
unloaded output can swing to within 15mV of each rail.
Further, the LM10 will deliver 20mA output current and
still swing within ±400mV of the supply rails.
APPLICATions
•
•
•
•
•
With its low operating current and floating operation
capability, the LM10 is ideal for two wire analog transmitter circuits where the processed signal is carried on
the same line used for power. The LM 10 is suggested for
portable battery powered equipment and is fully specified
for operation from a single 1.2V battery. Other applications include precision current and voltage regulators,
operating from very low voltages to several hundred
volts.
Remote Signal Conditioner ITransmitter
Battery Operated Instruments
Precision Current Regulators
Precision Voltage Regulators
Thermocouple Transmitter
15k
15k
+1.5V to +5V Converter
Line Regulation
01
0.1
5V OUT
TO CMOS
SYSTEM
~
0.05
~
~
25"C
tj
i
5.1M
~
-0.05
-0.1
0.1
~F
1
10
TOTAL SUPPLY VOLTAGE (V)
100
T1 = STANCOR PCT-39
01, 02=1N933 (GERMANIUM)
01, 02 = 2N2222A
R= OUTPUT ADJUST
THIS 1.5V BATIERY, TO 5V OUTPUT DESIGN
CAN DRIVE LOW POWER CIRCUITRY FOR MONTHS.
2-281
...
...
LM10
A8S0LUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Total Supply Voltage
LM10/LM10B/LM10C .................. 45V
LM10BLlLM10CL ....................... 7V
Differential Input Voltage (Note 1)
LM10/LM10B/LM10C ................ ±40V
LM10BLlLM10CL ..................... ± 7V
Output Short Circuit Duration ............. Indefinite
Operating Temperature Range (Note 2)
LM10 .................. -55°C~TA~125°C
LM10B/LM10BL .......... -25°C~TA~85°C
LM10C/LM10CL ............. 0°C~TA~70°C
Storage Temperature Range .... -65°C ~TA ~150°C
Lead Temperature (Soldering, 10 sec.) ........ 300°C
TOP VIEW
REFERENCE
FEEDBACK
ORDER
PART NUMBER
LM10H
LM10BH
LM10CH
LM10BLH
LM10CLH
VMETAL CAN HPACKAGE
TOP VIEW
REFERENCE
OUTPUT
OPAMP
INPUT (-)
OPAMP
INPUT (+)
LM10CN8
LM10CLN8
LM10CJ8
LM10CLJ8
8 REFERENCE
FEEDBACK
1
2
v+
6
3
v-
OPAMP
OUTPUT
LM10J8
LM10BJ8
LM10BLJ8
BALANCE
J8 HERMETIC PACKAGE
N8 PLASTIC OIP PACKAGE
OP Amp ELECTRICAL CHARACTERISTICS (Note 3)
SYMBOL
PARAMETER
Vas
Input Offset Voltage
f:J.Vos
f:J.Temp
Average Offset
Voltage Drift
los
Input Offset Current
f:J.los
f:J.Temp
Offset Current
Drift
IB
Input Bias Current
f:J.IB
f:J.Temp
Bias Current Drift
AVOL
Large Signal
Voltage Gain
Shunt Gain (Note 5)
2-282
LM10/LM10B
MIN TYP MAX
CONDITIONS
0,3
•
•
(Note 4)
•
•
•
•
Vs= ±20V.loUT=0. VOUT= ±19,95V
Vs= ±20V. VOUT= ± 19.4V
IOUT= ± 20mA
IOUT= ± 15mA
Vs =±0,6V,loUT=±2mA
VOUT= ±O.4V, VCM= -OAV
Vs= ±0,65V, 10UT= ±2mA
VOUT= ± 0.3V, VCM = -OAV
0, lmA:5l oUT :5 5mA, RL = 1.lkn
1,2V:5 VOUT :5 40V
1,3V:5VOUT :540V
0,lmA:5loUT:520mA, RL = 250n
1,5V:5 V+:5 40V
•
•
•
•
•
MIN
2,0
3,0
LM10C
TYP MAX
0,5
2,0
5,0
0,25 0,7
1,5
2,0
0.4
10
12
4.0
5,0
mV
mV
!lVrC
2,0
3,0
nA
nA
pA/oC
30
40
nA
nA
pA/oC
5,0
20
30
60
90
UNITS
120
80
400
80
50
400
V/mV
V/mV
50
20
130
25
15
130
V/mV
V/mV
1,5
3.0
1.0
3.0
V/mV
0,5
0,75
V/mV
14
6
33
10
6
33
V/mV
V/mV
8
25
6
4
25
V/mV
V/mV
4
LM10
OP Amp ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CMRR
Common-Mode
Rejection Ratio
PSRR
Power Supply
Rejection Ratio
RIN
Input Resistance
Is
Supply Current
dis
Supply Current
Change
(Note 3)
CONDITIONS
Vs= ±20V
- 20V" VCM,,19.15V
-20V"VCM,,19V
-0.2V'2V '2 -39V
V+=1.0V
V+=1.1V
V = -0.2V
1.0V" V+" 39.8V
1.IV"V+,,39.8V
(Note 6)
1.2V" Vs" 40V
1.3V"Vs,,40V
•
•
•
•
•
•
LM1O/LM1OB
MIN TYP MAX
MIN
93
87
102
90
87
102
dB
dB
90
84
96
87
84
96
dB
dB
96
90
250
150
106
93
90
150
115
106
dB
dB
k!l
k!l
p.A
Jl.A
Jl.A
p.A
500
270
15
400
500
75
75
15
(Note 3)
LM1O/LM1OB
MIN TYP MAX
MIN
195
194
190
189
PARAMETER
CONDITIONS
VREF
Feedback Sense
Voltage
Reference Drift
Voltage at Pin 1 with Pin 1
Connected to Pin 8
Feedback Current
Current into Pin 8
Line Regulation
0" IREF "lmA, VREF = 200mV
1.2V"Vs ,,40V
1.3V" Vs" 40V
0" IREF "lmA
V + - VREF '21.0V
V+-VREF'21.1V
dV REF
dTemp
Load Regulation
Reference Amplifier
Gain
•
•
0.2V" VREF " 35V
20
•
•
•
•
200 205
200 206
0.002
50
23
50
65
UNITS
400
300
REFEREnCE AmPLIFIER ELECTRICAL CHARACTERISTICS
SYMBOL
LM10C
TYP MAX
500
570
75
75
LM10C
TYP MAX
UNITS
200 210
200 211
0.003
mV
mV
%/OC
22
75
90
nA
nA
0.001 0.003
0.001 0.006
0.001 0.008
0.001 0.01
0.01
0.01
75
0.D1
0.01
70
0.1
0.15
25
15
0.15
0.20
%/V
%/V
%
%
V/mV
V/mV
2-283
LM10
OP Amp elECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
Vos
Input Offset Voltage
AVos
ATemp
Average Offset
Voltage Drift
los
Input Offset Current
Alos
ATemp
Offset Current
Drift
18
Input Bias Current
AlB
ATemp
Bias Current Drift
AVOL
Large Signal
Voltage Gain
CMRR
PSRR
Common-Mode
Rejection Ratio
Power Supply
Rejection Ratio
PSRR
RIN
Input Resistance
Is
Supply Current
2-284
LM1DBL
CONDITIONS
MIN
(Note 4)
0.1
•
IOUT= ±2mA, VCM= -0.4V
Vs= ±0.6V, VOUT= ±0.4V
Vs= ±0.65V, VOUT= ±0.3V
O.lmAs lOUTS 10mA, RL=50(){)
1.5VsV+ s6.5V
Vs= ±3.25V
-3.25VsV~Ms2.4V
- 3.25V 0$ VCM S 2.25V
-0.2Vi'!V i'! -S.4V
V+=1.0V
V+",1.2V
V '" -0.2V
1.0VsV+ s6.3V
1.lVsV+ s6.3V
(Note 6)
•
•
•
•
•
•
•
•
2.0
3.0
10
TYP MAX
UNITS
0.5
4.0
5.0
mV
mV
",V/oC
2.0
3.0
nA
nA
pA/oC
30
40
nA
nA
pA/oC
5.0
0.7
1.5
0.2
2.0
•
•
•
LM1DCL
MIN
2.0
•
Vs= ±3.25V, 10uT=0, VOUT= ±3.2V
TYP MAX
0.3
•
•
Vs= ±3.25V, VOUT= ±2.75V
10UT= ± 10mA
Shunt Gain (Note 5)
(Note 3)
5.0
20
30
12
60
90
60
40
300
40
25
300
V/mV
V/mV
10
4
25
5
3
25
V/mV
V/mV
1.5
0.5
3.0
1.0 3.0
0.75
V/mV
V/mV
8
4
30
6
4
30
V/mV
V/mV
89
83
102
80
74
102
dB
dB
86
80
96
80
74
96
dB
dB
94
88
250
150
106
80
74
150
115
106
dB
dB
kO
kO
500
260
400
500
400
280
500
570
~
~
LM10
REFEREnCE AmPLIFIER ELECTRICAL CHARACTERISTICS (Note 3)
SYMBOL
PARAMETER
CONDITIONS
VREF
Feedback Sense Voltage
Voltage at Pin 1 with Pin 1
Connected to Pin 8
Ll.V REF
Ll.Temp
Reference Drift
MIN
•
•
Feedback Current
Current into Pin 8
Line Regulation
O:s IREF :s0.5mA, VREF =2QOmV
1.2V:sVs:s6.5V
1.3V:sVs:s6.5V
0:sI REF :s0.5mA
V+ - VREF ", 1.0V
V+-VREF"'1.1V
0.2V:s VREF:s 5.5V
Load Regulation
Reference Amplifier Gain
195
194
The. denotes the specifications wnich apply over full operating temperatu re range.
Note 1: The input voltage can exceed the supply voltages as long as the
voltage from the input to any other terminal does not exceed the maximum differential voltage, and the maximum junction temperature is not
exceeded due to the excess power dissipation that occurs when the input
voltage is less than the negative supply voltage.
Note 2: The maximum operating junction temperatures are: 150°C for
the LM10; 100°C for the LM10B and LM10BL; and 85°C for the LM10C
and LM 1OCL. Package derating factors will be found on the back page of
this data sheet.
Note 3: These specifications apply for the following conditions unless
otherwise noted:
at 25°C
over temperature
(a) V- :sVCM:sV+ -0.85V
V- :sVCM:sV+ -1.0V
(b) 1.2V:sVS:SVMAX
1.3V:sVS:SVMAX
VREF =0.2Vand O:sIREF:s 1.0mA where VMAX =40V for the LM10,
LM10B and LM10C and VMAX =6.5V for the LM10BL and LM10CL. The
specifications do not include errors due to thermal gradients (T1 =20ms),
die heating (T2=0.2 sec) or package heating.
•
•
200 205
200 206
0.002
20
•
•
LM10BL
TYP MAX
30
20
MIN
190
189
LM10CL
TYP MAX
UNITS
200 210
200 211
0.003
mV
mV
%/oC
22
50
65
75
90
0.001 0.01
0.001 0.02
0.001 0.02
0.001 0.03
0.01
0.01
70
0.01
0.01
70
0.1
0.15
20
15
0.15
0.20
nA
nA
%/V
%/V
%
%
V/mV
V/mV
Note 4: ForTJ >90°C, los may exceed 1.5nAwhenVCM =V-. When
the common-mode input voltage is within 100mV of the negative supply
and TJ = 125°C, the offset current will be less than 5nA.
Note 5: Shunt gain defines the operation in floating applications when
the output is connected to the V+ terminal and input common-mode is
referred to V- (see typicai applications). The effects of larger output
voltage swing with higher load resistance can be accounted for by adding
the positive supply rejection error.
Note 6: Guaranteed by design.
2-285
LM10
TYPICAL PERFORmAnCE CHARACTERISTICS
Input Current
15
-----
~
I
vc~-v- ~
7i9v-r--
VCM
~
~-1.0
'\.
;;;
::J
w
- - --
~-
o
v-
'"
'"
8'"
Z
o
--
-50 -25
f--
f--
o
15
;;; 0.6
Offset Voltage Drift
I
f---
I---<;; -;:;Vas < 0.5mV
-0.5
OFFSET
0
25
50
75
TEMPERATURE (OC)
" Alos<2nA
AIB< 10nA
f--=
100
-1.0
-50
125
Input Noise Voltage
-25
--
0
25
50
75
TEMPERATURE (OC)
-0.5
-50 -25
125
~~111JOk
10
100
10
j
1k
FREQUENCY (Hz)
I"-
10k
100k
100k
~
0.1
~
0.05
~ 0.2
tll 0.1
./
~
I
'"
>
~, .. I~:.o2mA__
~
~ 0.02
0.01
en 0.005
, I 20~A
- -- -
0.5
IL=0.1mA
0.002 I--- - 0
'--
~
0
~
--NPN
--PNP
Vs=±2V
55°C
TA
0.001
-0.3 -0.2 -0.1
0
0.1
0.2
OFFSET VOLTAGE CHANGE (mV)
2-286
i5
1
-20m~/
-
\
0.05
I'
0.02
0.01
0.005
0.002
0.3
-0.1mA
± 2V
VSAT'" 1V
55°C
TA
Ifl
/
25°C
125°C
5o 0 .5
0.2
0.1
0.01
100
I
0.02
0.05 0.1
0.2
0.5
OFFSET VOLTAGE CHANGE (±mV)
1.0
lom=20mA
-- -
"
a.1m" .....
--
-- -NPN ___
PNP-Vs= ±2V
TA=25°C
0/
0.001
-0.3 -0.2 -0.1
0
0.1
0.2
OFFSET VOLTAGE CHANGE (mV)
0.2
1.0
./
\
h
~
~ 0.02
~
~
0.01
/
53 0.005
IL= -0.1mA
0.002
\. 15mA
-15mA
tl:l 0.1
~ 0.05
0.001
0.3
J
0.5
~
I '0
./
-
Output Satura.tion
Characteristics
\.
J
z
0
125
to;
-
10k
1k
LOAD RESISTANCE ((l)
1.0
20mA
illir
5
Output Saturation
Characteristics
1.0
0.2
-
~
IIlJ I
90
Output Saturation
Characteristics
0.5
~ob
JIIII
"........
111111
100
Vs>
50
~ 20
lli 10
I"-........ TA= -55°C
100
I
:<
UJlll
t--.
l"-
Rs 0
25
50
75
TEMPERATURE (OC)
Transconductance
VS=±12V
Vo=±10V
Rs=1M
111111
0
100
120
!-
I;(
100
130
AV>Hio
~
"\
DC Voltage Gain
1k
~
0.5
J+
-0.5
BIAS_ I---
Vs±20V
=>
'-'
Common-Mode Limits
"""-
f
(Op Amp)
'I
/
/0
",!I.L =0.1mA
--J __
1-
_ _ NPN
PNP
Vs= ±2V
TA=125°C
1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4
OFFSET VOLTAGE CHANGE (mV)
0.6
LM10
TYPICAL PERFORmAnCE CHARACTERISTICS
Minimum Supply Voltage
1.8
Minimum Supply Voltage
_1.6 TA=-55°C
2:VSAT=lt
w
'"~1.4
-lmA
~
~20mA-
-
- ---
'"-'
;;E
--==
1.0
-NPN
- - PNP
1.6 b--:-:':-::---t--\t---t--j-----j
l_
'"~1.4
::;
w
~
I
-15mA
~1
-'
\
,
2
;;E
o
""10
""1.0 ~~~:.=...j___:;;o,Lj~"""*=""'l'=""'l
,
-
15mA
I
-'
;;E
o
I'''~
--NPN
_ _ PNP
1.6 TA=125°C
VSAT=10V
~
10""
~
-lL
'"
V
08
08
0.3
0.2
0.1
0
-01
OFFSET VOLTAGE CHANGE (mV)
0.2
0.1
0 -01 -0.2
OFFSET VOLTAGE CHANGE (mV)
-02
Frequency Response
-0.3
Typical Stability Range
Output Impedance
TA=25°C
120
~~AIN
I'....
100
80
z
~
~ 60
t\l 40
'"\ ,
>3
~ 20
~
-20
~~r~-- - ..
I
-40
0.1
1.0
10
I
I'\.
I
100
lk 10k
FREQUENCY (Hz)
1.2Vl
§: 100
-c
200
~
~ 12
lOUT lmA
~
ii;
"§
150~
7'fOUT 0
""
0>
~
0
100
"
lOOk
-Av 100
Av 1
50
1M
~
~
\
~
~
5o
\.
100
i'--
50mV
50
~
a
10mV
\
-0.2
1
0.1 0.01 -0.1 -1 -10 -100
LOAD CURRENT (mA)
VOO=50mV
\
:r
\
1/
nom)
II
/
\
V+=5V
V-=O TAi25°i-
J
~
50
""
~ -50
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 18
TIME (ms)
J
/
/
/5mv
r- -
~ 100
i
0>
~-50
lOOk
10
Comparator Response Time for
Various Input Overdrives
VOO=5mV
\
~
~
,
4
3
2
~
lk
10k
FREQUENCY (Hz)
1M
lOOk
FREQUENCY (Hz)
10k
5
t\l 100
100
10- 9
Comparator Response Time for
Various Input Overdrives
VS=±15V
TA=25°C
,Iif
UNSTABLE
10- 10
0.1
lk
iI.IY
1.JJ11,
10- 8
EO
.m ~
on
1\
\
o
~~
lmA
lOUT
/V
=
PNP
'"z
10
NPN
g;:: 10- 7
w
U
Z
Large Signal Response
16
10- 6
250
!
I
,I
1.0
05
0 -05 -1 0 -1 5
INPUT VOLTAGE CHANGE (mV)
15
lk
140
~
~
t\l
~ 1.4 f----;f----t--I!I-~--j-----j
~1.2
\
--"
--lmA
--
o
1.8
~
IL = -2OmA
§5 1.2
J-
~
J U\ \
~
Minimum Supply Voltage
1.8 ...------,---,---,----,---,
0
-NPN
--PNP
(Op Amp)
- 0.2
V+ =5V
V-=O
TA=25°C
0 0 2 0.4 0 6 0 8 1.0 1 2 1 4 1 6 1 8
TIME (ms)
2-287
LM10
TYPICAL PERFORmAnCE CHARACTERISTICS
Follower Pulse Response
10
,
-1
~
w
~-10
~
10
!3
o
1
VREF=2oomV
'I.
r-- Rl~10~
,.
_ -125'C
--25'C
- - -55'C
&1 BO
~
,
Rlt7~
r,
0.2
5z
'f.
60
0.8
20
1.0
>-0.05
.§.
t'iJ
rr
~;:IA-
~
I'
-'
TJ=
~ -0,10
'"
~
I
g
I
.",
~55'C
v{ ~IO")
6
t'iJ
:Ii -0.2
:I:
~~-O.3
J
-
-0.25
'\.
100
lk
10k
FREQUENCY (Hz)
\.
\
1
VIN
[(2M)
_
4
6
~
-0.4
~-06~~~+--+--~-1--+-1
'S
.
~ t--++--t-v{t2~}M
-0.8
VOUT
4
5
-1.0 LL-.....L.__.L..-L.__"'---'__- ' - - - '
1
3
4
5
6
OUTPUT VOLTAGE (V)
6
OUTPUT VOLTAGE (V)
Change in Reference Op Amp
loading
Thermal Gradient Feedback
0.1
0.05
lr
>
.§.
r\
t'iJ
:;;
D -0.1
w
-- --
0.1
~
'"
t'iJ -0.05
~
'S
'S
NPN
IOUT=20mA
----
I' 1 1
\
lp I I- -r-rI--
lOUT =0
0.05
IOUT=20mA-
w
t;:;
'"
I
ito
V
PNP
IOT=2fmA f-
I
Vs= ",20V
VO~T=~
-0.1
-20
2-288
. /~
~
W
to
lOUT =0
to
~
"
NPN
""OUT= -20mA
20
40
TIME (ms)
60
80
1M
I
t'iJ
I
3
10
lOOk
FREQUENCY (Hz)
\
5w
I
1
lk
\
g- -0.2 1--+---::.l-"17""F--t~+-t
TJ=~5'C
;;;-0.4
3
4
5
6
OUTPUT VOLTAGE (V)
PSRR- \
I
-0.5
1
~\\
0.01
100
1M
"
SmA-
~0mA
'S
~
VOUT
AVos
lOOk
,,- ./" fo"'"
_-0.1
I
j -0.15
~
10
\
LINE REGU!LATION
"
~
Shunt Gain
-I
;;; -0.20
1
'\
"
'"~ 0.1
'"
t\. \. \
PT
0.4
0.6
TIME (ms)
\
r-....
w
to
'S
~1.0
oz
,
"~
\.~
40
Shunt Gain
,,-
I
~\ '
CMRR
PSRR+
~
~ 10
LINE
" . REGULATION--
"-
w
/J /
1\\ \.
1
r!.S~!.._
'"~100 F~-- --_::~
i5
...... ~MRR'"
;:::
L'
~\
~~
120
l~'
\...
-10
Rejection Slew Limiting
100
1
~,/
~
Noise Rejection
140
I
v
VS=±2OV
VO~T=~
-0.05
-20
20
40
TIME (ms)
60
60
LM10
TYPICAL PERFORmAnCE CHARACTERISTICS (Reference)
Supply Current
Reference Noise Voltage
Load Regulation
0.1
0.4
V+~'5V
VREF 0.2V
1kID
. . .
V-=O
~
r-...
~
,,~
0.2
-50 -25
~
~
"-
r--
~
TA=25°C
.......
V+ =1.2V
V-=O
w
'"
i5
I~ 1
~ 1111111111
'"
~ -0.1
v+ -40V
..z-=O
<.:>
~
100
te
.......................
~ -0.2
.........
""- '-..
'-..
0
25
50 75
TEMPERATURE (0C)
100
-0.3
125
Minimum Supply Voltage
o
2
WO
4
LOAD CURRENT (mA)
~ 1.0
lli
~
g
z
0.8
t.VREF=0.1%
~mA
'" r---.. r--....
.........
r-...
1mA
~
W-6
-.... t---- V /
b::; -....
'"
~
l""-
r--..... ......
o
~
10-5
I)
r-
100k
III
Typical Stability Range
Output Saturation
1.2
1k
Wk
FREQUENCY(Hz)
VREF=200mHr
10- 7
9
w
,.
E W-8
,tf;~
POTENTIALLY
UNSTABLE
Y
~ W-9
i'-- r-....
0.6
1 2V,;Vs";:;OV
-55°C:s;TAS +125°C
(/jI-(j.
tttJ.'fI0.8
L.--'-_..L---l._...J----.JL-....I-~
-~
-~
0
~
~
TEMPERATURE (OC)
~
WO
1~
04
-50 -25
W-10
0
25
50
75
TEMPERATURE (OC)
100
125
001
01
1.0
LOAD CURRENT (mA)
10
BLOCK DIAGRAm
BALANCE
5
OUTPUT
REFERENCE
FEEOBACK
6
8
V+
7
1 REFERENCE
OUTPUT
INPUTS {
REFERENCE
~----------4-----+4
V-
2-289
LM10
APPLICATion HinTS
With heavy amplifier loading to v- , resistance drops in
the V- lead can adversely affect reference regulation.
Lead resistance can approach 10. Therefore, the common to the reference circuitry should be connected as
close as possible to the package.
TYPICAL APPLICATiOnS
Standard
Offset Adjustment
Limited Range
Offset Adjustment
Limited Range Offset Adjustment
with Boosted Reference
Rl
R2
750
R3
250
V-
Low Voltage Regulator
OV to 5V Regulator
Best Regulation
Cl
O.OlpF
Cl
O.OlpF
VOUT
10V
VOUT
OVTO 5V
VOUT
3V
I
I
;:::::::; OPTIONAL t
I
I
"::"
~
t USE ELECTROLYTIC OUTPUT CAPACITORS
2-290
R2
3.9k
LM10
TYPICAL APPLICATions
Shunt Regulator
Two-Terminal Current Regulator
C1"
0.01,.F
R3)VREF
Io u(R2+
r=--R1R3
R2
...-M..-......--+-+Vour=
(1 +~) VREF
R1
R1
R2
R3
"REQUIRED FOR CAPACITIVE LOADING
Negative Regulator
Floating Regulator
.--.....- -.....- -.....- VIN
r - - - -......------1~ GROUNO
C1"
R2
100k
25pF
1%
:>::....,-+- Vour= -10V
L-+---4-----_~--+-Vour=50V
R1
2k
1%
..........- - - VIN"; -10.5V
"ELECTROLYTIC
C1
0.001~F
L - -....-----------~GROUND
2-291
LM10
TYPICAL APPLICATions
6V BaUery-Levellndicator
High Voltage Regulator
. - - - -.....- -....-
VIN>204V
R4
VOUT= ~ VREF
R1
100k
Q2
2N6513
L--t--_---~~--+-VOUT=200V
C1
O.001!'f
R4
R1
680k
1.5k
R2
12k
LED DIMS BELOW 7V
R2
2M
1%
L---_------....._---COMMON
Light Level Sensor
Transducer Amplifier
R2"
1M
R3"
10k
R1
200k
"PROVIDES HYSTERESIS
2-292
LM10
TYPICAL APPLICATions
Thermocouple Transmitter
Flame Detector
....------....---+
~IOUT
Sl
LM134
Rl
715
V+
1%
5V
...--1
PLATINUM"
RHODIUM
PROBE
CHROMEL
ALUMEL
PROBE
200'C"Tp,,700'C
lmAsIOUT,,5mA
R3
50
"800'C THRESHOLD IS ESTABLISHED BY CONNECTING BALANCE TO VREF
tGAIN TRIM
R2
100
i%
•• ~TOMOSOR
TIL LOGIC
Rl
200
COLO
JUNCTION
COMP
R5 t
6.67
1%
Thermometer
Meter Amplifier
R2
8.5M
1%
Rl
lOOk
1%
INPUT
10mV,100nA
FULL-SCALE
01
lN457
0-100'C
0-100,.11
.-----~--"'I
02
lN457
LM134
R2
7M
R5
~%
R4
5k
L . . . - -....-
+
1
-~Sl~
....
Bl
1.5V
1%
"TRIM FOR SPAN
tTRIM FOR ZERO
2-293
2
LM10
TYPICAL APPLICATions
Microphone Amplifier
Av"",1k
Vs
l.SV
RS
1M
R1
6.2M
RB
3M
':'
C4
4.7.F
C1
O.02.F
':'
R2
1M
R3
lOOk
RS
1M
':'
R7
10k
R6
2.2M
GAIN
':'
'10'"
C3
O.47.F
'~"'-~
':'
Isolated Voltage Sensor
for Switching Regulators
RS!
4.7
R2
47.Bk
1%
R6
Sk
FEEDBACK TO
SWITCH CONTROLLER
FROM
REGULATED
OUTPUT
R4
1.Slk
1%
! CONTROLS "LOOP GAIN"
FOR ENTIRE LOOP
2-294
LM10
OP Amp SCHEmATIC DIAGRAm
~
~-
).~~
'I.i'ir'
~
P-J
~~
~
....
-v
~~
~
oil
!~
~
.-
~~
0
g
..~
~~
~
~r
~
,;
a:_
~
12'"
~
~~
~
~~
'l::L
G~l.
i2
~~~T B~
'-0/
•
'""\~
•
j.......!!.....
~h
8
g
~~
~!}
~~
~~
D:E
~
<1;~ [l~
~~~
~.
\8
~
/
11
~2
~
y-
---~
'I. fL'
1l
'I.
~
~2
~.
~~
&@
B
"
~o
g ~
~~
a::::
~
if'
~~
5
8~~·
~2
1.~
~
~I"~
·1\
_'L<;r-
8'~
~~
R,1& It-
-+---....- ....-if---f----+-f--f-....-iI-t-....- t
BOOk
R78
150k
R75
40k
R54
100
REFERENCE
OUTPUT
R81
30k
R66
2.5k
R65
2k
a57t-----~~--------~---------_f---------f-----~
4
8
REFERENCE
FEEDBACK
v-
PACKAGE DESCRIPTion
H Package
Metal Can
J8 Package
8 Lead Hermetic Dip
0
..
N8 Package
8 Lead Plastic
'-:1·,,·
~
. .-l
jL~
i§~,.
-Ito.-\~.
0II1II_0015
(tI~r:!II11
~
(7 1II!i-1 IH}
ND1~
IIIli1tN5ION$ININClIESlINLEts01I1EII'MSEIIOTeO
°LEAOSWjTHINDOD1DFTlIUEPOsmDNlTPIAf8AUGEPlANE
2-296
IIIIUDlM8ISlONSlRINtMSUNLE5S0THERWISENDTED
"UAOS WITHIN 0101 OF TfIII£PDSITllINtTPlATIlAUBE Pl.ANE
v-
L.YLln
FAD
U\
LM101A/LM301A
LM107/LM307
T8CHNOLdG~~~------O~p-e-r-a~ti-on-a-I-A-m-p~l~ifi-e-rS
FEAI'URES
DESCRIPTion
• 30 Volt Differential Input Range
• 75 nA Input Bias Current
• Wide Common Mode Voltage Range
The LM101A and LM107 are general purpose operational amplifiers, featuring low bias current and the
ability to operate with high input differential voltages
up to 30 Volts. Unlike many FET input amplifiers, the
output of the LM101A/107 does not reverse if the
common mode range is exceeded, making them particularly useful in comparator and oscillator circuits.
APPLICATions
• Signal Conditioning Amplifiers
• Voltage Followers
• Comparators
Wein Bridge Sine Wave Oscillator
The LM101A uses external compensation, allowing
the frequency response and slew rate to be optimized
for the application. The LM107 is identical to the . . .
LM101Awith the exception that the compensation ca- . .
pacitor is internal. Linear's LM101A and LM107 include improved deSign and processing techniques
resulting in superior long term stability and reliability
over previous devices. The curve of bias current versus differential input voltage indicates that a minimal
change in input current occurs over a wide range of
input Signal, which is important in many applications.
Bias Current vs Differential Input Voltage
R1
750
>---+-- OUTPUT
1
40 f--+--t-~f-++--t----I
>:z
!!!
a
~
~
R2
20k
1%
~
20 1--+--t-F--f--3'o.ct--t----I
0
I--+"""~
- 20 I----_+___+__
~
*l1 - ELOEMA 1869
R1 - R2
C1 - C2
1_ _
1_
2.. R2C1
-1
-0.1
0
0.1
10
DIFFERENTIAL INPUT VOLTAGE (V)
2-297
LM 101 A/LM30 1A
LM 107 /LM307
ABSOLUTE mAXimum RATinGS
Supply Voltage
LM101A1LM107 ................. ±22 Volts
LM301A/LM307 ................. ± 18 Volts
Differential Input Voltage. . . . . . . . . . . .. ± 30 Volts
Input Voltage, Note 2 ................ ± 15 Volts
Output Short Circuit Duration, Note 3. . . .. Indefinite
Operating Temperature Range
LM101A1LM107 ............ -55°C to 125°C
LM301A/LM307 .............. O°C to 70°C
Maximum Junction Temperature
LM101A/LM107 .................... 150°C
LM301A/LM307 ....... . . . . . . . . . . . .. 100°C
Storage Temperature Range
All Devices ................. -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
PACKAGE/ORDER InFORmATiOn
ORDER PART NUMBER
TOP VIEW
LM101AH
LM301AH
LM107H
LM307H
vMETAL CAN H PACKAGE
• PINS 1,5,8 NO CONNECTION ON LM107l307
188
TOP VIEW
BAUCOMp·
-
_
7 V+
+IN3
+
601JT
V- 4
LM101AJ8
LM301AJ8
LM107J8
LM307J8
COMpo
IN 2
5 BAL·
J8 PACKAGE
HERMETIC DIP
·PINS 1,5,8 NO CONNECTION ON LM107/307
ELECTRICAL CHARACTERISTICS (note 1)
SYMBOL
Vos
~
.!l Temp
los
~
PARAMETER
Input Offset Voltage
Average Temperature Coefficient
of Input Offset Voltage
Input Offset Current
.!l Temp
Average Temperature Coefficient
of Input Offset Current
Ie
Input Bias Current
AvoL
Large Signal Voltage Gain
CMRR
PSRR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
COIIDITIOIIS
Rs .;;; 50KO, TA = 25°C
Rs';;; 50KO
Rs .;;; 50Ko
TA = 25°C
25°C.;;;TA.;;;TMAx
TMIN .;;; TA .;;; 25°C
TA = 25°C
TA = 25°C, Vs ± 15V, VOUT =
± 10V, RL ;;. 2KO
Vs = ± 15V, Your = ± 10V,
RL ;;. 2KO
Rs';;; 50KO
Rs .;;; 50KO
Vs = ±20V
Vs = ±15V
Your
Output Voltage Swing
RIN
Is
Input Resistance
Supply Current
Vs = ± 15V RL = 10Ko
RL = 2KO
TA = 25°C
TA = 25°C, Vs = ±20V
TA = 125°C, Vs = ±20V
The. denotes the specifications which apply over the full operating
temperature range.
Nota 1: Unless otherwise noted; all measurements are made with
unity gain compensation (Cl = 30pf for the LM 101A/301A); these
specifications apply for ±5V .;; Vs';; ±20V for the LM101A/
LM 107; and ± 5V .;; Vs .;; ± 15V for the LM301A1LM307.
2-298
•
•
•
LMIOIAILMI07
MIN
TYP
MAX
0.7
2.0
3.0
•
50
•
••
•
1•
••
•
25
80
80
±15
±12
±10
1.5
LM30lAlLM307
Mill
TYP
MAX
2.0
7.5
10
UNITS
mV
mV
3.0
1.5
15
10
20
6.0
3.0
30
50
70
/LVrC
nA
nA
0.01
0.02
30
0.1
0.2
75
100
0.01
0.02
70
0.3
0.6
250
300
nA/oC
nAloC
nA
nA
160
25
160
VlmV
96
15
70
70
90
96
VlmV
dB
dB
V
~6
+15
-13
±14
±13
4.0
1.8
1.2
±12
±12
±10
0.5
3.0
2.5
+15
-13
±14
±13
2.0
1.8
3.0
V
V
V
V
MO
rnA
rnA
Nota 2: For supply voltages less than ± 15 Volts, the maximum input
voltage is equal to the supply voltage.
Nota 3: The output may be shorted to ground or either power supply
indefinitely, provided the case temperature is below 125°C for the
LM 101A/l07 and below 70°C for the LM301A1307.
LM 101 A/LM30 1A
LM 107 /LM307
TYPICAL PERFORmAnCE CHARACTERISTICS
Single Pole Compensation
(LM101A)
Two Pole Compensation
R2
Feedforward Compensation
C2
R2
Rl
Rl
"""_--1
-VIN
-V/N ........
R2
Rl
VOUT
+VIN-----=--l'+
VOUT
+V/N
VIN
~"""--'--I
----"1
"
C2
30pf tor unily gain stabilily. At gains
above 1 frequency response can be maximized
C1 -
by decreasing C1.
(2 ..) (3) (106) (R,)
C2 needed tor stability.
120
120
120
I-. ""'-
r'\.
Vs
-30~
C
"
~
GAIN~ ~
r'\.]\
~20
-20
10
100
100
225
180
_80
180
lk
10k
100k
1M
"\
~~
135
~60
90
~ 40
45
S!ro
I\.
GAI~-\
10
100
16
16
~
C1-
IIIII
I\t,i1
NIII
~If'
UI~
IIIII
1k
10k
100k
0
-2
1;!
-4
po,..., i-i: I
INPUT H
:t OUTPUT
II
--
-6
U
W
TIME (.s)
GAIN\
I~
-20
10M
10
100
1k
10k
100k
1M
10M 100M
FREQUENCY (Hz)
Feedforward Large Signal
Frequency Response
16
V~ ~1'\Jv
TA
~
25°C
"
1M
100k
10
Feedforward Inverter
Pulse Response
10
r-
,
§!!
so ro
-10
80
t!I
~
~
Vs -,15V
C1=.. 30pF
o
10
~
~
~
~
TIME (.s)
2
---
OUTPUT
......
1il
INPUT ....
-
VS-:!;15V
-- -- -- ~;;rr;,-
~
r..-0UTPUT
\
-2
10M
FREQUENCY (Hzl
C2 - 300 pF
~ ~
'v ~1
FEE~FORWARO
2 Pole Voltage Follower
Pulse Response
I
I I
-6
-10
ro
225
20
1M
-8
10
S!
"
1M
100k
-4
-8
o
~ 40
"l
FREQUENCY (HzI
VS-,15V
\
!
,
~ 60
:t15V
1
to-
10k
10M
Single Pole Voltage
Follower Pulse Response
i\
45
80
~
1\
o
1M
FREQUENCY (HzI
-,
90f
~
.......
I'
10
IIIII
~
1';
Vs
I-
1\
Cl- 3pF
8
"'tI
Vs -±15V
12
i
100
TA - 25°C
Cl-30pF
C2 ~ 300pF
~±15V
12
~
10k 100k
2 Pole Large Signal
Frequency Response
T~ -12~~6
v
~
lk
FREQUENCY (Hzl
Single Pole Large Signal
Frequency Response
135
1,,\
-20
10M
FREQUENCY (HzI
10
If
r-
KtE
Vs = :!:15V
Cl=30pF
C2 -1 300 pr
r\
SINGLE POLE
1
225
PHASE
r'\. r'\.
~ 40
TWO POLE
±15V
=
~1-3PF
w
~
1
2-
Open Loop Frequency Response
~60
;
C _
10k
Open Loop Frequency Response
~80
1il
VOUT
Open Loop Frequency Response
100
~
R3
R4
30pF C2 - 10C1 tor unit gain. At
gains above 1. frequency response can be
maximized by decreasing Cl and C2.
C1 -
.-
00
ro
00
-2
-4
-6
-- .. _--
-
-8
-10
012345678
TIME (pS)
2-299
LM 101 A/LM30 1A
LM 107/LM307
TYPICAL PERFORmAnCE CHARACTERISTICS
Input Current
(lM101A/lM107)
Supply Current
Voltage Gain
70
130
I I
I, TA ~ -55°C
60
50
.......
'"
~~40
..... ~
t
120
--
~ 1.0 __ TA
i----
=
::;:..-'
1250C
1il
0.5
~
100
}-----1--+--+-+-+---1
-----
0
25
50
75
100
TEMPERATURE (0C)
Input Noise Voltage
1
5
z
20
~
!
I
I
--
~-L
i
i
15
20
SUPPLY VOLTAGE (, V)
Current limiting
I
1.5
:~
'>
,
~
1.2
>-
~ 0.9
::>
u
>-
».l
5'
0.6
10
-
......
5
z
~
0.3
10
100
1k
10k
100k
10
100
Common Mode Rejection
~ 80
~
80
§
60
~:z
60
~~
40
u
40 }--+-~-+--+---1'-"---1
"
!'-.
2-300
25
30
35
Closed loop Output Impedance
102
I"",OSITIVE SUPPLY
:g
t'5
I
~
NEGATIVE SUPPLY'
"I"-\... "
101
100 }--i---+---:7"f--
10-1
I--t---:.r--'--r-
10-2
h---:¥--+--+----+---1
--;f----j
o
--~-
FREQUENCY (Hz)
20
103 , - - , - - , - - - - , - - - - , - - - - - ,
I"-
'" 20
15
OUTPUT CURRENT (, mAl
", "
"" " "-,
'5
20 ' - - - - ' - - - " - - - ' - - - - - ' - - - - '
10
100
1k
10k
100k
1M
10
,
100
z
I-----j---+---'K<---+--j
100k
10k
Power Supply Rejection
120 ,---,--,---,------,-----,
RS ~ 1kll
TA - 25°C
~ 100 }-="Io.:---+--+---+---1
z
§
1k
FREQUENCY (Hz)
FREQUENCY (Hz)
I
TA -
I
125°C I
10
Input Noise Current
1.8
40
30
20
SUPPLY VOLTAGE (, V)
50
i~
15
10
125
I
I
90
-50 -25
I TA ~ ,25°C
~
?
10-3 '--_-'-_....L.._-'-_-'-_--'
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
10
100
1k
10k
FREQUENCY (Hz)
lOOk
1M
LM101A/LM301A
LM 107 /LM307
LM107
Open Loop Frequency Response
120
100
~ 80
-.
16
TA ~ 2SOC
Vs ~± ISV
i'.
~ 60
r'\.
~ 40
10
V~ ~IJJJ
8
I-
r'\.
20
""
~
~
~
\
-20
100
lk
10k
lOOk 1M
10M
INPUT
.i I
:
~
~PUTPUT
I
\
--
TA ~ 25°C
Vs ~±15V
-8
'r-..
-
V
~
-2
-4
-6
10k
lk
FREQUENCY (Hz)
,
r -
i\
il 2
~ 0
\
10
LM107
Voltage Follower Pulse Response
TA - 25°C
w
~
LM107
Large Signal Frequency Response
-10
o
lOOk
10 20 30 40 SO 60 70 80
TIME (.0)
FREQUENCY (Hz)
•
TYPICAL APPLICATiOnS
Standard Compensation
and OHset Balancing Circuit
Fasl Voltage Follower
Fast Summing Amplifier
R2
30k
C2
3 pF
Rl
30k
VOUT
C2
Vour
30 300PF
Ci
pi'
Power Bandwidlh: 250 kHz
..----'lNV-- v-
Sman Signal Bandwidth: 3.S Mhz
Slew Rale: 10Vl!,s
R3
50k
Low Frequency Square Wave Generator
Rl
Power Bandwidth: 15 kHz
Slew Rate: IV/!'s
10k
Cl
150 pi'
Rl
1M
...-_-+___
Cl
~~TPEOANCE
">~,"""",N'r-+_~" CLAMPED OUTPUT
01
6.2V
R2
lDM
Precision Rectifier
R6
20k
1%
02
6.2V
Voltage Comparator with Clamp
INPUTS
OUTPUl
C3
30 pi'
2-301
LM101A/LM301A
LM107/LM307
SCHEmATIC DIAGRAm
COMP
BAL
COMPo
r -_ _ _~~--~~~-~---~------~~-~7
v+
-+----+----i:..
INVERTING INPUT - 7.
+ -f----C
NON·INVERTING INPUT
2511
L-_1--......._6 OUTPUT
011
80kll
~
____
~_~_~-+
• C1 FOR LM107 ONLY
FOR LM107, THERE ARE NO INTERNAL
CONNECTIONS TO PINS 1, 5 ANO 8
______ ________
~
1k II
~~_~_~
__
4~V_
OFFSET BALANCE
PACKAGE DESCRIPTion
H Package
Melal Can
0.040
MAX
f==b 0
J.L=~;;;;;::;;:::;::jO~O
!lJ&
.1
0.165
0.045.
0.010 SEATNG
0.02~:
0.Q16
0.405 MAX
00 0
:.JI-
0.034
0.027 ~
']0
0.220
4
--l
~
0.055 MAX
0.005 MtI
Ct.
0.045
0.027,
-r
0.150
0.200 0.060
0.125
--'L
0Jfi5
-1-0.100 BSColJ
typ
NOTE, IlIt.tENSIONS ... NCHES
2-302
J8 Package
8 Lead Hermetic Dip
JlO.023typ
0.014
'Ej'
I
,
"
,I
II"
U
-...f
I'
\\
u
0'-15'
---L!!J!1§typ
~--l' 0.008
D.29ii
r«JTE, 1lIMENSIONS ... NCHES !KESS OllERMSE NOTED.
'LEADS WITlIN 0.007 OF TIllE POSIlldN Ill') AT GAWE PlANE
F t\ r\
L1n
1:.7 U \K
LM108A/LM308A
LM108/LM308
TBCHNOLOGY~------O-p-e-r-a-ti-o-n-a-IA--m-p-li-fie-r-S
FEATURES
DESCRIPTion
•
•
•
•
•
•
The LM108 series of precision operational amplifiers
are particularly well-suited for high source impedance
applications requiring low offset and bias currents as
well as low power dissipation. Unlike FET input amplifiers, the offset and bias currents of the LM108 do not
change significantly with temperature variations. Advanced design, processing and testing techniques
make Linear's LM108 a superior choice over previous
devices.
Guaranteed 200pA max. input offset current
Guaranteed 2nA max. input bias current
Guaranteed 600p,A max. supply current
Guaranteed O.5mV max. offset voltage
Guaranteed 5,.N 10 C max. drift
Wide supply voltage range: ± 2V to ± 18V
APPLICATions
•
•
•
•
A photodiode sensor application is shown below. For . . .
applications requiring higher performance, see the . . .
LT1008, and LT1012.
Integrators
Transducer amplifiers
Analog memories
Light meters
Amplifier For Photodiode Sensor
Input Currents
Rl
5M
1%
2.0
1.5
~ 1.0
ffi
0.5
g§
0
:;,
'-'
81
>---Vour - 10VI ~A
R2
5M
1%
Cl
Il00 PF
~
OUTPUT
a..
l- I'- I--
BI~S
---
0.15
~ 0.10
0.05
........... r--
OFFSET
o
-55 -35 -15
5
25 45 65 85 105 125
TEMPERATURE (OC)
2-303
LM 108A/LM308A
LM108/LM308
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage
lM108A1lM108 .. . . . . . . . . . . . . . . . . .. ± 20V
lM308A1lM308 .. . . . . . . . . . . . . . . . . .. ± 18V
Differential Input Current (Note 1). . . . . . . .. ± 10mA
Input Voltage (Note 2). . . . . . . . . . . . . . . . . .. ± 15V
Output Short Circuit Duration. . . . . . . . . .. Indefinite
Operating Temperature Range
lM108A1lM108 ............ -55°C to 125°C
lM308A1lM308 ................ O°C to 70°C
Storage Temperature Range
All Devices ................. -65°C to 150°C
lead Temperature (Soldering, 10 sec.) ..... , 300°C
ORDER PART NO.
TOP VIEW
COMP
2
lM108AH
lM108H
lM308AH
lM308H
METAL CAN HPACKAGE
88
TOP VIEW
COMPI 1
-IN
+IN
2
3
V-
4
_
+
COMP2
7
6
5
lM308AN8
lM308N8
V+
OUT
NC
PLASTIC DIP N8 PACKAGE
ELECTRICAL CHARACTERISTICS
SYMBOL
Vas
PARAMrnR
Input Offset Voltage
CONOITIOIS
TA = 25°C
Average Temperature Coefficient
of Input Offset Voltage
Input Offset Current
TA = 25°C
aTemp
Ie
Average Temperature Coefficient
of Input Offset Current
Input Bias Current
TA = 25°C
AvoL
Large Signal Voltage Gain
CMRR
PSRR
VOUT
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
RIN
Is
Input ReSistance
Supply Current
~
.:Hemp
las
~
2-304
± 5V ""
TA = 25°C, Vs ± 15V,
VOUT = ± 10V, RL .. 10kll
Vs = ± 15V
Vs = ± 15V, RL = 10kll
TA = 25°C (Note 3)
TA = 25°C
TA = 125°C
v. ""
± 20V and - 55°C"" TA "" 125°C, unless otherwise noted.
MIN
•
•
•
•
•
••
•
LM10IA
TYP
0.3
m
MAX
0.5
1.0
0.7
2.0
3.0
UNITS
mV
mV
1.0
0.05
5.0
0.2
0.4
3.0
0.05
15
0.2
0.4
/LVrC
nA
nA
0.5
0.5
2.5
2.0
3.0
0.5
0.5
2.5
2.0
3.0
pAloC
nA
nA
VlmV
V/mV
dB
dB
V
V
80
300
40
96
96
110
110
•
±13.5
•
±13
30
LM108
MAX
50
300
25
85
100
80
96
±13.5
±13
±14
±14
70
0.3
0.15
MIN
30
0.6
0.4
70
0.3
0.15
0.6
0.4
Mil
rnA
rnA
LM 108A/LM308A
LM 108/LM308
ELEORICAL CHARAOERISTICS
SYMBOL
Vas
~
A em
las
~
ATemp
Ie
PARAMETER
Input Offset Voltage
CONDITIONS
TA = 25°C
Average Temperature Coefficient
of Input Offset Voltage
Input Offset Current
TA = 25°C
Average Temperature Coefficient
of Input Offset Current
Input Bias Current
TA = 25°C
AwL
Large Signal Voltage Gain
CMRR
PSRR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Voltage Range
Output Voltage Swing
Input Resistance
Supply Current
Vour
R'N
Is
± 5V
~ Va ± 15V Ind DoC ~
Mil
•
•
•
•
• 80
• 9660
•
• ±1496
• ±13
TA = 25°C, Vs ± 15V,
VOtJT = ± 10V, RL ;;. 10kll
Vs
Vs
TA
TA
=
=
=
=
± 15V
± 15V RL = 10kll
25°C (Note 3)
25°C
•
10
Ta
LM30IA
TYP
0.3
~ 70°C, unless otberwise noted.
MAX
LM30e
lYP
2.0
Mil
0.5
0.73
MAX
7.5
10
UIITt
mV
mV
2.0
0.2
5.0
1.0
1.5
6.0
0.2
30
1.0
1.5
/LV/oC
nA
nA
2.0
1.5
10
7.0
10
2.0
1.5
10
7.0
10
pArC
nA
nA
V/mV
V/mV
dB
dB
V
V
Mil
rnA
300
25
15
80
80
±14
±13
10
110
110
±14
40
0.3
300
100
96
±14
40
0.3
0.8
0.8
The. denotes the specifications which apply over the full operating
temperature range.
For MIL·STD components, please refer to LTC 883 data sheet for test
listing and parameters.
Note 1: Differential input wltages greater than 1V will cause
excessive current to flow through the input protection diodes unless
current limiting resistance is used.
Noll 2: For supply wltages less than ± 15V, the maximum input
wltage is equal to the supply wltage.
Note 3: Guaranteed by design.
TYPICAL APPLICATiOnS
Standard Compensation Circuit
COMPENSATION CIRCUITS
Alternate" Frequency Compensalion
A1
R2
-V'N ......,.,..,._....--~"""-----,
R1
Feedforward Compensation
C2
5 pF
R2
R2
10k
INPUT """"",1V'v--+-"i
Your
Vour
R3
+V'N ......,'IV-----i
Vour
"""---"i
+V'N ......
c,"
•• BANOWIDTH AND SLEW RATE ARE
PROPORTIONAL TO 1IC,
C1
• IMPROVES REJECTION OF POWER
SUPPlY NOISE BY A FACTOR OF TEN.
500 pF
•• BANDWIDTH AND SLEW RATE ARE
PROPORTIONAL TO 1ICs
2-305
LM 108A/LM308A
LM 108/LM308
TYPICAL PERFORmAnCE CHARACTERISTICS
Guaranteed Offset Error
Guaranteed Drift Error
.s.
w
I=TA 125 °C
ji!
.I~~~/
!:l
!S!
III
-55°C ST s125°C
G
!!... 100
10
Rs ,,,,1M
:5
m
I-- 108
~
I
i
10BA
108
ia
w 0.1
0.1
10
1.0
10 A
MATCHED SOURCE RESISTANCE (Mil)
120
100
~
!80
!:l
!S!
C'I- 3
P~1fr-
P )i-
"- "."
"- '-" roc';"-
ji! 40
-
1
10
100
lk
135
~
~
90
30pF
4
45
~
~
i
;:!: -2
§! -4
~
!
- 1\
/OUTPUT
-
-10
10k
\
o
1M
lOOk
20 40 60 80 100 120 140 160
TIME (#s)
Supply Current
Output Swing
15
r-
-,
+15V
Vs
600
I'\.
~ 25 d
0
V
~125JC
-~5°C
Vi--'""
T.
V
T. - 25°C
T. __ 55°C f-" I--
o
10
15
SUPPLY VOLTAGE (± V)
2-306
\
~C
90
5
TA 125 0lC
Vs - ±15V
C,-30pF
FREQUENCY (Hz)
Voltage Gain
/
I
1/
-8
~
10k lOOk 1M 10M
120
..,.".
lOOk
20
I- -r
I
INPUT
\
0
-6
FREQUENCY (Hz)
T.
10k
8
Cs-l00,~~
C,-30pF ~
·20
lk
Voltage Follower
Pulse Response
!ill 2
'" '"
20 I--GAIN
I-- PHASE - --
11111
FREQUENCY (Hz)
180
r.
60
100
10
Cs -lori FI
w
10
Large Signal
Frequency Response
""c,
-~ +
"- "pF
I
10
100
10
1.0
MATCHED SOURCE RESISTANCE (Mil)
Open Loop
Frequency Response
lOOk
Rs - 0
I
1.0
0.1
100
I
111111
Rs
t:: 10
~
~ 10
tz·
~
Input Noise Voltage
1000
1000
S100
TA~ -Joc
'\
V'"
...-::
f--
100
---
ITA J5°C
TA - 125°C
o
o
5
OUTPUT CURRENT (± rnA)
10
15
SUPPLY VOLTAGE (± V)
20
LM 108A/LM308A
LM 108/LM308
TYPICAL PERFORmAnCE CHARACTERISTICS
Power Supply Rejection
Closed Loop Output Impedance
1~'--r-'--'--'--~~
120 ,--,---,-------,---,----,
100 b--""cl----+---t-
w
!i;l 10'
fa
~
;;
~
=>
f--+.V"I,-----v----'+-+---l
1 i-----l---t/>,,Ay ~ 1, C, - 30 pF
Ay~ 1000,C,-OpF
tv ~ 1000, C, ~ 30 pF
I
°10-'
I
TA - 25°C
lOUT - ±1mA
Vs ~ ±15V
10- 2 L---L..---'_ _---L---.L_ _..L...-----'
10
100
1k
10k 100k 1M 10M
-20
' - - - - ' - _ - L - _ - " - - - - - - '_ _--'
100
1k
FREQUENCY (Hz)
10k
100k
1M
10M
FREQUENCY (Hz)
-------------EI
TYPICAL APPLICATiOnS
Inverting Amplifier With High Input Resistance
Low Drift Integrator With Reset
R2
100k
R1
2M
1'10
"----~~
R2
2M
1%
R4
50k
1%
RESET
INPUT ---'lM--+---....U - - -...
R3
10k
R3
505
1%
R2> R1
R2 »R3
A _ R2(R3
.>--4--
+ R4)
OUTPUT
y-~
li>'--+-OUTPUT
R5
1M
R4
20M
":"
• Q1 AND Q3 SHOULD NOT HAVE
INTERNAL GATE-PROTECTION DIODES.
2-307
LM 108A/LM308A
LM108/LM308
TYPICAL APPLICATions
Amplifier For Piezoelectric Transducers
Amplifier For Bridge Transducers
r----~-V+
OUTPUT
R3
22M
Cl
30 pF
Cl
lO~F
Rl
lOOk
R2
11M
OUTPUT
R1
11M
[:=J TRANSDUCER
R3
J
5M
R2
102k
Rl- R2R3
R2+R3
Fast" Summing Amplifier
C5t
Bilateral Current Source
R3
Rl
2M
INPUT
R1
150k
Cl
0.002 pF
1M
1%
1%
V,N --'V..,...--6--+_ OUTPUT
R3
OUTPUT
Rl
10k
INPUT ----,\Mr-----'-f
INVERTING
Offset Voltage Test Circuit t
Rl
5Ok'
OUTPUT
INPUT
+15V
---f-+~
Rl
R2
R2
R3
5Ok'
>-........INPUT -------<~~
Vo
1000"
OUTPUT
-15V
• RESISTORS MUST HAVE
LOW THERMOELECTRIC
POTENTIAL
Av - 1000
t THIS CIRCUIT IS ALSO USED PS THE BURN·IN
CONFIGURATION WITH SUPPLY VOLTAGES EQUAL
TO .,2OV. Rl-R3=10k. R2-2000. Av-loo.
2-309
LM 108A/LM308A
LM 108/LM308
SCHEmATIC DIAGRAm
COMPENSATION
COMPENSATION
r -____~-r1~~--~;-8--~------------~---7
v+
20k
11---+-"""'....- OUTPUT
INPUTS
+
---b-----~
2k
820
PACKAGE DESCRIPTion
H Package
Metal Can
i
MOlE IlINEMSIONSIHH::Ie
2-310
N8 Package
8 Lead Plastic
t«lT£ot.IEHSICMINItDESLN.ESSOTHEAY!1SENOTED
tWDSWITltMOOO7 OFTUPOSITION(TPlKrtWlGEPUNE
L7Lln
FAr\
LTl18A/LT318A
LMl18/LM318
VlK
TECHNOLoo~f!(~----Hi""'gh-sp-ee-d
Operational Amplifier
FEATURES
•
•
•
•
•
•
DESCRIPTion
The LT118A is an improved version of the industry standard LM118. The LT118A features lower input offset voltage, lower input offset currents, higher gain and higher
common mode and power supply rejection. Because of
these enhancements, the LT118A will improve the accuracy of most applications. Unlike many wideband amplifiers, the LT118A is unity gain stable and has a slew rate of
50V/pS. When used in inverting amplifier applications,
feedforward compensation can be used to achieve slew . . .
rates in excess of 150VlpS. Linear Technology . . .
Corporation's advanced processing techniques make the
LT118A an ideal choice for high speed applications.
Guaranteed 1.0mV Max. Input Offset Voltage
Guaranteed 100,000 Min. Gain
Guaranteed 50V/pS Slew Rate
Guaranteed 20nA Max. Input Offset Current
15MHz Bandwidth
Unity Gain Stable
APPLICATions
•
•
•
•
Wideband Amplifiers
High Frequency Absolute Value Circuits
01 A Converter Amplifiers
Fast Integrators
Voltage Follower Pulse Response
Voltage Follower
10pF
5k
5k
INPUT - \ N \ o - " " f
5V/DIV
OUTPUT
TIME -O.5pS/DIV.
2-311
LTl18A/LT318A
LMl18/LM318
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . .. ::I:: 20V
Differential Input Current (Note 1) .......... ::I:: 10mA
Input Voltage (Note 2) .................... ::I:: 20V
Output Short Circuit Duration ............. Indefinite
Operating Temperature Range
LT118A1LM118 ............... -55°Cto 125°C
LT318A/LM318 .................. O°Cto70°C
Storage Temperature Range
All Devices .................. -65°Cto 150°C
Lead Temperature (Soldering, 10sec.) ... , .... 300°C
TOP VIEW
ORDER PART NUMBER
COMP 2
LT118AH
LM118H
LT318AH
LM318H
4
V-ICASE)
METAL CAN H PACKAGE
TOP VIEW
LT118AJ8
LM118J8
LT318AJ8
LM318J8
LT318AN8
LM318N8
HERMETIC DIP J8 PACKAGE
PLASTIC DIP N8 PACKAGE
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
Vas
CONDITIONS
Input Offset Voltage
los
Input Offset Current
Ie
Input Bias Current
RIN
Av
Input Resistance
Large Signal Voltage Gain
SR
Slew Rate
GBW
Gain Bandwidth Product
Output Voltage Swing
Is
(Note 3)
Input Voltage Range
Supply Current
MIN
•
•
•
Vs= ± 15V, Vour= ± 10V, RL2:2kO
Vs=±15V,Av=1
Vs= ±15V
Vs= ± 15V, RL =2kO
Vs=±15V
•
0.5
PSRR
Common Mode Rejection
Ratio
Power Supply Rejection Ratio
2-312
MAX
MIN
LM11B
TYP
MAX
1
Z
2
1
11
10
30
20
6
50
100
250
500
120
250
500
120
4
6
UNITS
mV
mV
nA
nA
nA
nA
1
3
100
500
1
50
25
3
200
MO
V/mV
V/mV
50
70
50
70
VIpS
15
±13
MHz
V
V
mA
mA
dB
too
15
±13
•
•
±12
±11.5
•
•
86
100
80
5
4.5
100
86
100
70
80
5
4.5
TA=125°C
CMRR
LT11BA
TYP
±12
±11.5
8
7
8
7
dB
LTl18A/LT318A
LMl18/LM318
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
(Note 3)
CONDITIONS
Vos
Input Offset Voltage
los
Input Offset Current
IB
Input Bias Current
RIN
Av
Input Resistance
Large Signal Voltage Gain
SR
GBW
Slew Rate
Gain Bandwidth Product
MIN
•
Vs=±15V, Av=1
Vs=±15V
Vs=±15V, Rl =2kO
Output Voltage Swing
Input Voltage Range
Vs= ±15V
Is
CMRR
Supply Current
Common Mode Rejection
Ratio'
PSRR
Power Supply Rejection RatiO
The. denotes those specifications which apply over the full operating
temperature range.
The shaded electrical specifications Indicate those parameters which have
been improved or guaranteed test limits provided for the first time.
Nate1: The Inputs are shunted with back-to-back zeners for overvoltage
protection. Excessive current will flow if a differential voltage greater than
5V is applied to the inputs.
MIN
150
0.5
3
0.5
100
100
500
25
20
50
70
15
±13
•
•
±12
•
•
86
5
100
86
100
LM318
TYP
1
2
20
30
250
500
10
•
Vs= ± 15V, VOUT= ± 10V, Rl
~
10M
30M
FREOUENCY (Hz)
i.
18
10M
~
~
40
~ ,/'
III
rEEDFOIRWAR~
10
100
lk
10k lOOk 1M
FREQUENCY (Hz)
r.:::: ......... t--!S= ±15V
~
......... h::- ........
Vs= ±10V
........
co
>-
!::
12
10
o
-55 -35 -15
5 25 45 65
TEMPERATURE (OC)
PHJ,.-
"'
VS- ±15V
RS=RI=10kll
C,=5pF
225
120
180 ...
:c
/j;
135 m
110
POSITIVE SLEW
~100
r-
i:
90
45
I
-
~
~
90
en
r---.. r---..
-
NEGATIVE SLEW
80
t-
70
Pulse Response of
Feedforward Inverter
2pF
5Y/DIY
5k
INPUT_V¥-"
27k
1%
0.4
2.5k
BALANCE"
2-314
27k
1%
"BALANCE CIRCUIT NECESSARY FOR
INCREASED SLEW RATE
r---..
60
-55 -35 -15 5 25 45 65 85 105 125
TEMPERATURE (OC)
10M 100M
Feedforward Compensation for
Slew Rates of 150VI p.S
5k
85 105 125
Voltage Follower Slew Rate
130
GAl" "
-20
100M
.........
16
~
100M
"\~
20
.......
z
:;;: 14
'"
VS- ±15V
TA=25°C
co
3M
~
20
:c
z
"'
10k lOOk 1M
FREOUENCY (Hz)
il!
":c
;s.
Open Loop Frequency
Response
FEEDFORWArD
1M
45
'\
C>
o
90-;;;
,g
\
10
TA=25°C
Vs=±15V
I-- ~
i:
>\' I-"
20
50M
;;- 10
~
""GAIN
22
225
180 ...
:c
/j;
135 m
PHAgE}
60
Large Signal Frequency
Response
!ill
~
"-
-20
0.5M
12
TA=25°C
VS= ±15V
l!l 40
~
C>
>
o
80
-"
Unity Gain Bandwidth
24
0.8
1.6
TIME-0.2,.s/DiV
2.0
2.4
LTl18A/LT318A
LMl18/LM318
TYPICAL PERFORmRnCE CHARACTERISTICS
Input Noise Voltage
TA=25°C
Vs= ±15V
1000
I
i! 100
-......
;::: 80
~
~
!
120
is
_ 300
~
'"'~
Rs-l00k
100
co
RS=2kll
TA=25°C
'"
'\
60
Rs '
lOOIl
;
\
40
8
100
lk
10k
FREQUENCY (Hz)
100
lOOk
Closed Loop Output Impedance
103
--/
Av-~ V
r---....
./
10- 2
10k
lOOk
FREQUENCY (Hz)
1M
4
10M
Current Limiting
16
Vs= ±15V
TA=25°C
102
lk
/
14
:;-
12
-
10
~
8
I
12JoC
10
15
SUPPlY VOLTAGE (±V)
5
LT118A Input Current
300
25[C
200
""
-H
i
5~oC
--
I"'"
20
o
3
2JC
.....-
:IE
10
10
--
I\.
:IE
30
Supply Current
Common Mode Rejection
3000
f
f
I1'l
125°C
~
100
f.l>I''"~'I 1-
~ -100
§
-200
Avl...!/
10-3
1
10
100
lk
10k
FREQUENCY (Hz)
Offset Balancing
lOOk
1M
o
o
-300
10
15
20
OUTPUT CURRENT (rnA)
25
10pF 100D
-9
-6
-3
0
3
6
DIFFERENTIAL INPUT VOLTAGE (V)
Isolating Large Capacitive Loads
200k
V+ ......""""_~
30
Overcompensation for
Increased Stability
"l"_ Cl
5.1k
INPUT ......WV_"'f
2-315
LTl18A/LT318A
LMl18/LM318
SETTLInG TimE CIRCUITS
Settling Time
Settling Time Test Circuit
5pF
~
INPUT
5V/OIV
~
1111<
~
±lOV
OUTPUT
5
5mv/OlV
O.2,.s/OIV
·IMPROVES SETTLING TIME
Settling Time
Alternate Compensation for
Improved Settling Time
III
5V/DIV
13
~
....
~
5mv/DlV
·IMPROVES SETTLING TIME
D.2,.s/DlV
APPLICATions InFoRmATion
Because of their wider bandwidth, the LT118A and LM118
operational amplfiers require more application care than
most general purpose low frequency amplifiers. One of
the most critical requirements is that power supplies
should be bypassed with a 0.1 ",F (or larger) disc ceramic
capacitor within an inch of the device. Also, stray capacitance at either the input or output can cause oscillation.
While input capacitance can be compensated by placing a
capacitor across the feedback resistor, load capacitance
must be minimized or isolated as shown. Even the 50pF
input capacitance of a 1X scope probe can alter the
response of the device.
2-316
Settling time, an important parameter in many high speed
amplifier applications, is difficult to measure and optimize. Settling time is very "application dependent" and
is influenced by external components, layout and the
amplifier. In general, the settling time to 0.01% can be
minimized by using acircuit similar to that shown. In addition to the compensation network shown, a capacitor is
needed across the feedback resistor to minimize ringing.
Power supply bypassing can also affect settling time. The
amplifier has low power supply rejection ratio at high frequencies, so transients and ringing on the supply leads
can appear at the output. Large (22",F) solid tantalum
capacitors are preferred to minimize supply aberrations.
LTl18A/LT318A
LMl18/LM318
Precision Inverting Amplifier
INPUT
RIO
10k*
10pF
10k
lN41411
300pF
.".
·1% METAL FILM
FULL POWER BANOWIDTH=ZMHz
SLEW RATE=50V/",ac
SETTLING (IOV STEP)=IZ", TO 0.01%
BIAS CURRENT DC=3OpA
OFFSET DRIFT =0.3.V/"C
OFFSET VOLTAGE=30.V
BI
2-317
LTl18A/LT318A
LMl18/LM318
PACKAGE DESCRIPTion
H Package
Metal Can
J8 Package
8 Lead Hermetic DIP
D
-(~::~jD~A~'::)
0040
11.016)
MAX
(
,
SEATING
PlANE
I
rrI
... 0.305-0.335
(7747-8509,"DIA
~r-..,O'O"50;;----T~
t
--
j,
0.165-0.185
MAX
(4191-4.699)
.1
+
+
t-
j
-''---''-U-GE---+'
00 0 00
II
O.010~O.045
(1270)
--'-PLANE
0.500-0.750
I
(1210.,905)
0.016-0'.-02-,---------'-
(O.254-1143)
/':::Z/"
'ffi'
FE
GLASS
0
6
0
~---+
13048-4064)
0.220-0.310
(5588-7.814)
*
4
1_0055
11.397)
MAX
(~~~~) ~I'-(~:)l
.G'ia~~
L - -_ _ _ _~o
t
5-
0125-0200
~
I
0005
~
t
50 4
,
II
-I
--- ~2~::OI
Bse·
'R'
to. t"
,
/I
II
II
"
"
,5' . . . . ~
TV'
0.290-0.320
173fi6-8128)
..- RADTYP
INSULATING
STANDOFF
NOTE: DIMENSIONS IN INCHES UNLESS OTHERWISE NOTED
'LEADS WITHIN 0.007 OF TRUE PQsmON ITP) AT GAUGE PlANE
NOTE: OIMENSIONS IN INCHES
N8 Package
8 Lead Plastic
'~
W
5 8_r~7'"')
-
JL
r
t
o.04Il
1
0.060
(1.016) MAX
~
0,240-0.280
0.370-0.400
(9.400-10.161
(1.524)
SQ
10;'~) ~__ ,::)
MIN
O.155~D.175
13.937-4.445)
+
-
~ t
0.125-0.130
t
TYP
~
(,.921.3.683)
J Ijt~
~............
I~s~)
---~
11
(O.162.rY~.524)
~
10.356Tv~·584)
,R
7
.
,
I
,
-it-o. ,5. jl~
"
I
10.203-0.381)
TV'
0.'90-0.310
(7.3fi6-7.874)
NOTE: DIMENSIONS IN INCHES UNLESS OTHERWISE NOTED
-LEADS WITHIN 0.007 OF TRUE POSITION ITP) AT GAUGE PLANE
2-318
.±5.
(0203-0381)
~7LTEClnHNfJ\OIJ0G-~~~_____LM_3_18_S8
~
High Speed
Operational Amplifier
FEATURES
DESCRIPTion
•
•
•
•
•
•
The LM318 is a high speed, unity gain stable operational
amplifier designed for applications requiring high slew
rate and wide bandwidth. Although the device is internally
compensated for unity gain operation, external compensation can be added for increased stability in reduced bandwidth applications. With a single capacitor, the 0.1 %
settling time is reduced to under 11's. Feedforward compensation can be used in inverting applications to increase slew rate to over 150V/I's and almost double the . . .
bandwidth.
...
4mV Typ.lnput Offset Voltage
Guaranteed 25,000 Min. Gain
Guaranteed 50V/I's Slew Rate
30nA Typ.lnput Offset Current
15MHz Bandwidth
Unity Gain Stable
APPLICATions
•
•
•
•
Wideband Amplifiers
High Frequency Absolute Value Circuits
D/A Converter Amplifiers
Fast Integrators
Voltage Follower Pulse Response
Voltage Follower
10pF
5V/DIV
5k
>-6+-OUTPUT
5k
INPUT
-""""Ir--.. . . .
TIME -0. 5jAS IDiV.
2-319
LM318S8
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage ................................... ± 20V
Differential Input Current (Note 1) ............... ± 10mA
Input Voltage (Note 2) ............................. ± 20V
Output Short Circuit Duration .................. Indefinite
Operating Temperature Range ............... OOC to 70°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ........... 300°C
ORDER
PART NUMBER
TOP VIEW
LM318S8
PART MARKING
S8 PACKAGE
PLASTIC SO
318
ELECTRICAL CHARACTERISTICS (Note 3)
SYMBOL
Vas
PARAMETER
Input Offset Voltage
los
Input Offset Current
Is
Input Bias Current
RIN
Av
Input Resistance
LargeSignal Voltage Gain
SR
GBW
Slew Rate
Gain Bandwidth Product
Output Voltage Swing
Input Voltage Range
Supply Current
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Is
CMRR
PSRR
CONDITIONS
•
•
•
Vs= :!: 15V, VOUT= ± 10V, RL2:2kll
Vs= ±15V,Av=1
Vs= ±15V
Vs = :!: 15V, RL = 2k!l
Vs= :!:15V
The • denotes those specifications which apply over the full operating
temperature range.
Nole 1: The inputs are shunted with back·ta-back zeners for overvoltage
protection. Excessive current will flow if adifferential voltage greater than
5V is applied to the inputs.
2-320
MIN
•
••
•
•
LM318
TYP
4
30
MAX
10
15
200
300
150
0.5
25
20
50
±12
±11.5
70
65
500
750
3
200
VI~s
70
15
:!:13
5
100
80
UNITS
mV
mV
nA
nA
nA
nA
Mil
VlmV
VlmV
10
MHz
V
V
mA
dB
dB
Nole 2: For supply voltages less than ± 15V, the maximum input voltage is
equal to the supply voltage.
Nott3: These specifications apply for:!: 5VsVss ± 20V. The power sup·
plies must be bypassed with a O.l~F or greater disc capacitor within 4
inches of the device.
'~LTEClnHNf!\OLJOG-~~~----_O_P-_05
~,
Operational Amplifier
IT
FEATURES
DESCRIPTion
•
•
•
•
The OP-OS is an internally compensated op-amp
which provides excellent input offset voltage, low bias
current, very high common mode rejection, and low
offset voltage drift with temperature when the input
offset voltage is externally trimmed to zero. Direct replacement of similar devices in existing systems can
result in significant system performance improvement
without redesign. The OP-OS is particularly well suited
for instrumentation and low signal level applications
where precision and stability over time and temperature are important. Internal frequency compensation
enhances the OP-OS's versatility for a wide variety of
precision op-amp uses. Linear's advanced design,
process and test techniques ensure device performance as well as reliability. An instrumentation amplifier application is shown below. For higher
performance requirements see the LT1001 single precision op amp and the LT1002 dual matched precision
op amp series.
Guaranteed max. O,SfJ-V10 C Drift
Guaranteed max. O.6fJ-V pk-pk Noise
Guaranteed max. 2nA Bias Current
Guaranteed minimum 114dB CMRR
APPLICATions
•
•
•
•
Strain Gauges
Thermocouple Amplifiers
Instrumentation Amplifiers
Medical Instruments
Instrumentation Amplifier
Trimmed Olfset Voltage with Temperature of Six
Representative Units
(Olfset Trimmed to Zero at 25°C with 20kn Pot)
50r----~----r----r----,
40r---+----r---r--~
~
~
1>
~
30r---+----r---r~~
20 r---""o;;:t--;; cl-~
10 I----r""o~~~
~
~ -10 i---<'~+--f-~r"'iii~
OUT
6l
::Ii - 20
t-------:;iII'<
I!: -30 I---f--+-----r--~-----""I
+
Av =
~
R4
( 2R1
R3
+ 1)
-40
r----+-----+----+-----\
- 50
L...-___...l...-___--'--___---'-___----'
-ro
-~
~
ro
125
TEMPERATURE (OC)
Av = 100
2-321
2
OP-05
ABSOLUTE mAXimum RATinGS
Supply Voltage ........................ ±22V
Differential Input Voltage ................ ±30V
Input Voltage Equal to Supply Voltage
Output Short Circuit Duration. . . . . . . . . .. Indefinite
Operating Temperature Range
OP-OS/OP-OSA .............. -SsoC to 12SoC
OP-05E/OP-05C ................. O°C to 70°C
Storage Temperature Range
All Devices ................. -6S0Cto 1S0°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
PACKAGE/ORDER InFORmAnon
TOP VIEW
OfFSET
ADJUST
OFFSET
VOLTAGE
MAX
ORDER PART NO.
r...faL
~H~
-IN 2 :
OP-05AH
OP-05H
OP 705EH
OP-05CH
OUT
+\N3~NC
v-
• O.15mV
O.5mV
O.5mV
1.3mV
METAL CAN HPACKAGE
-18TOP VIEW
ADJUST 1 .
-IN 2
+IN
3
4
v-
8 ADJUST
7 V+
+
6
5
OUT
NC
HERMETIC J8 PACKAGE
OP-05AJ8
OP-05J8
OP-05EJ8
OP-05CJ8
OP-05EN8
OP-05CN8
O.15mV
O.5mV
O.5mV
1.3mV
O.5mV
1.3mV
PlASTIC DIP N8 PACKAGE
ELEORICAL CHARACTERISTICS Va =
SYMBOL
Vos
~
I!. ime
los
Ie
en
in
Rln
CMRR
PSRR
AwL
Vour
SR
GBW
Z.
Pd
PARAMETER
Input Offset Voltage
Long Term Input Offset Voltage
Stability
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
(Notes 1 and 2)
0.1Hz to 10Hz (Note 2)
f. = 10Hz
(Note 2)
f. = 100Hz
f. = 1000Hz
Input Noise Current
0.1Hz to 10Hz (Note 2)
Input Noise Current Density
f. = 10Hz
(Note 2)
f. = 100Hz
f. = 1000Hz
Input Resistance Differential Mode (Note 3)
Input Resistance Common Mode
Input Voltage Range
Common Mode Rejection Ratio
VCM = ±13.5V
Power Supply Rejection Ratio
Vs=±3Vto±18V
Large Signal Voltage Gain
RL ;:: 2k1l. Vo = ± 10V
RL ;:: 5000. Vo = ± 0.5V
Vs = ±3V (Note 3)
Maximum Output Voltage Swing
RL ;:: 10kll
RL ;:: 2k1l
RL> 1k1l
Slew Rate
RL ;:: 2k1l (Note 2)
Closed loop Bandwidth
AvcL = + 1 (Note 2)
Open loop Output Impedance
Vo = O. 10 = O. f = 10Hz
Power Dissipation
No load
Vs = +3V. No load
Offset Adjustment Range
Null Pot = 20kll
See Notes on page 2-324
2-322
COIIDITIOII.
± 15V. TA
= 25°C. unla•• otharwlsa nota••
Mill
OP·05A
TVP
0.07
Max
0.15
0.2
1.0
2.0
0.7
±0.7 ±2.0
0.6
0.35
10.3
18.0
10.0
13.0
11.0
9.6
14
30
0.32
0.80
0.14
0.23
0.17
0.12
SO
30
200
±13.5 ±14.0
114
126
100
10S
500
300
150
500
±12.5 ±13.0
±12.0 ±12.S
±10.5 +12.0
0.1
0.3
0.4
0.6
60
90
4
+4
Mill
0'-05
TV'
MAX
0.2
0.5
0.2
1.0
1.0
2.8
±1.0 ±3.0
0.35
0.6
10.3
1S.0
10.0
13.0
9.6
11.0
14
30
0.32
O.SO
0.23
0.14
0.12
0.17
20
60
90
4
±4
I'VlMonth
nA
nA
I'V~p
nVlYHz
pA
pAlYHz
Mil
Gil
V
dB
dB
200
±13.5 ±14.0
114
126
108
100
200
500
150
500
VlmV
±12.5 ±13.0
±12.0 ±12.S
±10.5 ±12.0
0.1
0.3
0.4
0.6
80
120
6
UIlITS
mV
V
VI,,8
MHz
II
120
6
mW
mV
OP-05
ELECTRICAL CHARACTERISTICS
SYMBOL
Vos
~
A emp
los
~
ATemp
Ie
....&ATemp
CMRR
PSRR
AwL
Vour
~
A me
los
Ie
en
I.
RI.
CMRR
PSRR
AwL
Vour
SR
GBW
Z.
Pd
=
PARAMETER
COIIDITIONS
Input Offset Voltage
Average Input Offset Voltage Drift
Without External Trim
With External Trim
Null Pot = 20kll (Note 2)
Input Offset Current
Average Input Offset Current Drift (Note 2)
Input Bias Current
Average Input Bias Current Drift
(Note 2)
Input Voltage Range
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage Swing
VCM = +13V
Vs = +3Vto +18V
RL > 2kll. V. = + 10V
RL > 2kll
ELECTRICAL CHARACTERISTICS
SYMBOL
Vos
VS
PARAMETER
Input Offset Voltage
Long Term Input Offset Voltage
Stability
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
VS
=
CONDITIONS
(Notes 1 and 2)
O.IHz to 10Hz (Note 2)
f. = 10Hz
(Note 2)
f. = 100Hz
f. = 1000Hz
Input Noise Current
0.1Hz to 10Hz (Note 2)
Input NOise Current Density
f. = 10Hz
(Note 2)
f. = 100Hz
f. = 1000Hz
Input ReSistance Differential Mode (Note 3)
Input ReSistance Common Mode
Input Voltage Range
Common Mode Rejection Ratio
VCM = + 13.5V
Power Supply Rejection Ratio
Vs = +3V to + 18V
Large Signal Voltage Gain
RL "" 2kll. Vo = ± 10V
RL "" 500ll, Vo = ± 0.5V
Vs = ±3V (Note 3)
Maximum Output Voltage Swing
RL 2: 10kll
RL "" 2kll
RL "" lkll
Slew Rate
RL "" 2kll (Note 2)
Closed Loop BandWidth
AvcL = + 1 (Note 2)
Open Loop Output Impedance
Vo = 0, 10 = 0, f = 10Hz
Power Dissipation
No load
Vs = ±3V, No load
Offset Adjustment Range
Null Pot = 20kll
± 15V. -55°C,.; TA ,.; 125°C. unlass olherwlse nolad.
MIN
•
••
•
•
•
•
••
••
•
± 15V. T,
OP-OIA
np
0.10
MAX
0.24
0.3
0.2
1.0
0.9
0.5
4.0
5
OP-05
np
0.3
MAX
0.7
UNITS
mV
2.0
1.0
5.6
25
0.7
0.3
1.8
8
+1.0
+4.0
+2.0
+6.0
nA
8
25
13
50
pArC
±13.0 ±13.5
110
123
94
106
200
400
+12.0 +12.6
=
MIN
50
±13.0 ±13.5
110
123
106
94
150
400
+12.0 +12.6
p.V/oC
nA
pArC
V
dB
dB
VlmV
V
25°C. un lass olherwise nolad.
OP-05E
np
0.2
UNITS
mV
0.3
1.5
1.2
3.8
±1.2 ±4.0
0.6
0.35
10.3
18.0
10.0
13.0
9.6
11.0
14
30
0.32
0.80
0.14
0.23
0.12
0.17
15
50
180
±13.5 ±14.0
110
123
106
94
500
200
150
500
0.4
2.0
1.8
6.0
±1.8 ±7.0
0.38
0.65
10.5
20.0
10.2
13.5
9.8
11.5
15
35
0.90
0.35
0.15
0.27
0.13
0.18
33
8
120
±13.5 ±14.0
120
100
90
104
120
400
100
400
p.V/Month
nA
nA
p.V...
±12.5 ±13.0
±12.0 ±12.8
±10.5 ±12.0
0.1
0.3
0.4
0.6
80
±12.0 ±13.0
±11.5 ±12.8
±12.0
0.1
0.3
0.4
0.6
60
95
4
±4
90
4
±4
MAX
0.5
120
6
Mil
op·05e
np
0.3
MAX
1.3
MIN
nVly'~
pA,D
pAlYHz
Mil
Gil
V
dB
dB
VlmV
V
VIpS
MHz
Il
150
8
mW
mW
See Notes on page 2-324
2-323
OP-05
ElEORICAl CHARACTERISTICS Va
nMaOL
Vos
I!;. emp
~
los
~
=
PARAMrnR
COIDITIOIS
Input Offset Voltage
Average Input Offset Voltage Drift
Without External Trim
With External Trim
Null Pot = 20kn (Note 2)
Input Offset Current
Average Input Offset Current Drift (Note 2)
I!;.Temp
18
~
Input Bias Current
Average Input Bias Current Drift
(Note 2)
Input Voltage Range
Common to1ode Rejection RatiO
Power Supply Rejection RatiO
Large Signal Voltage Gain
Output Voltage Swing
VCM = ±13V
Vs = +3Vto +18V
RL > 2kll. V. = + 10V
RL > 2kll
I!;.Temp
CMRR
PSRR
AwL
Your
•
••
•
•
•
•
•
The. denotes the specifications which apply over the full operating
temperature range.
Nole 1: Long term offset voltage stability Is the average value of
offset voltage vs. time plotted over extended periods following 30
days of operation. Values for time under 30 days of operation are
typically 2.5pV following the first hour of operation.
Note 2: This parameter is sample tested.
Nole 3: This parameter is guaranteed by design.
2-324
± 15V. ooe ".;TA ".; 7o oe.
•
•
•
•
Mil
OP-85E
lYP
lAX
OP·05C
lYP
0.25
MAX
0.6
0.35
1.6
0.7
0.2
1.4
2.0
0.6
5.3
1.3
0.4
2.0
1"5
.5
8.0
pvrc
8
35
12
50
pArC
+1.5
±5.5
±2.2
±9.0
nA
13
35
18
50
pArC
±13.0 ±13.5
107
123
90
103
180
450
±12.0 ±12.6
Mil
±13.0 ±13.5
97
120
100
86
100
400
±11.0 +12.6
UIIITS
mV
nA
V
dB
dB
VlmV
V
OP-05
TYPICAL PERFORmAnCE CHARACTERISTICS
Total Input Noise Voltage
low Frequency Noise
(Closed loop Gain = 25.000)
120
1000
20Ok!!
RS1 = RS2
THERMAL NOISE OF SOLIlCE
RESISTORS
,EXClUQED
~
r- 'Is
I-;A
1.0
,
110
110
",
80
70
1.0
10
100
lk
10k
~
0.1
10
1.0
100
Ivs
~
25
~
lS
l!;
w
I
~ 10
5
§
;
S
o
1
2
3
TIME AFTER POWER SUPf'LY TURN ON (MINUTES)
S
10M
-
10k
-10
a
TIME (MONTHS)
~
Open-loop Gain vs
Temperature
1000
±11SJ-
I
-
r--- I--
r- r- r--- -
S
o
-20
k~~
~
r~
~
I I
I~ ~'CEI ~RSEO
I-- ' - r---
IN 70°C Oil BATH
r-- c-- r-
'......-I-""
W
•
60
TIME (SECONDS)
60
~
I
Vs = ±lSV
g
m 20
10
10k lOOk 1M
10
Ollset Voltage Change Due
to Thermal Shock
,,30
o
"
FREQUENCY (Hz)
~
lk
t:: ...
lk
-5
i r
10 100
long Term Stability 01 Four
Representative Units
"
60
TA = !soc
I-VS= ±lSV
~
Z
Warm-Up Drift
~
1
r
80
SO
_
FREQUENCY (Hz)
~
70
lOOk
~
Vs = ±lSV
FREQUENCY (Hz)
l!;
0.1
~ 90
90
60
1000
T~ ~I~~od
100
~100
~
100
120
11111111
=1 ±15~
= 2SoC
-40
10
Power Supply Rejection Ratio
vs Frequency
TA = 2S0C_
Vs = ±lSV
Vs
TA
""
FREQUENCY (Hz)
Common Mode Rejection Ratio
vs Frequency
120
""
'0'
TIME - SECONDS
IIIIII~
"-
80
.2~~C.
1.0
10
I"-
iI .,; a
"""
130
Open-loop
Frequency Response
vs Frequency
-
-
200
-60
SO
100
TEMPERATURE (OC)
2-325
Ell
OP-05
TYPICAL PERFORmAnCE CHARACTERISTICS
Input Bias Current vs
Temperature
Input Bias Current vs
Dillerentlallnput Voltage
Input Oftset
Current vs Temperature
30
2.5
Vs!. ± i5V
r AT IVOIFF I" tOV, (lB I" 2nA (OP-05A)
" 3M (OP-05)
c" 7nA (OP-05C)
Vs 1- ±\5V
-
,--
~
~
~
.....
01'-05
...
~ ["..
OP-O~A"""
~
0I'-Q5E
r-..... '-
0I'-05C
,
V
..,...:,/'
~ ~-~
,",
r 1"
~
0.5
~
~
01'-05
!'. :"'0
05
o
-50
50
100
-50
TEMPERATURE ("C)
-30
-30
100
~
~
to
I
i
UNTRIMMED
Vs
±15V
III
I
111111
0
l-
to
~ffi
0
ffi 0.1
0.01
0.1
::;
:::>
::;
~
I III Rs-Rl-R2
to
to
MATCHED OR UNMATCHED SOURCE RESISTANCE (kll)
20
±15V
~ 10
II
!
10
0.1
I-
z
!!1
:::>
5'"
'"<3
~'f
IX:
LOAD RESISTANCE TO GROUND (kll)
10
A2
1111111
to
o
25
~
100
10
5'"
",.
40
TOTAL SUPPLY VOLTAGE, V+ TO V- (VOlTS)
60
---. ....
1
20
§
20
1. VIM (PIN 3) - -lOmV, Vo - + 15V
2. VIN(l'IN 3) - +lOmV, Vo = -15V
~
~
~
to
Rl
+25"C
,
2-326
II 11111
1 30
rJ
0.1
.-'
TO 125"
Output Short-Circuit
Current vs Time
"".
o
I
35
ETA
to
30
MATCHED SOURCE RESISTANCE (kll)
NEGATIVE SWING
"",
I
1111 Rs
100
1000
IPOs!Jl~
VIN - ±10mV
15
UN~p
0.1
Power Consumption
vs Power Supply
lJU
-vs - LJ"d
TAL
5"CITOll~ l~
C
SOURCE RESISTANCE (kll)
Output Voltage vs
Load Resistance
20
+15V
UNTRWP: .
0.01
100
10
1.0
I
i
IX:
IX:
IX:
111111111
Vs
ig
It
55"C TO 125"C
WII
10
OP-05
55"C TO 125"C
~
I
55'C TO 125"C
-10
10
~
;;!;
ffi 0.1
TRIMMED
-20
Maximum Error vs
Source Resistance
~
UNTRIMMED 25"C
gj
I_
TAj j5"C
IlFFERfNTlAL INPUT VOLTAGE (VOLTS)
10
OP-05A
55'C TO 125"C
Vs - ±15V-
I'"
Maximum Error vs
Source Resistance
10
~
f.oo'"
~
TEMPERATURE ("C)
Maximum Error vs
Source Resistance
::e
50
-
~
/
Vs - ±15V
; - - TA - +25"C
15
1
1
o
TIME FROM OUTPUT BEING SHORTED (MINUTES)
OP-05
SCHEmATIC DIAGRAm
7k
40k
40k
20
6
OUTPUT
20
+
.......--Hl'"
021
~---~H~Q28
v
TEST CIRCUIT DIAGRAmS
Offset Nulling and Low
Frequency Noise Test Circuit
Offset Voltage Test Circuit t
R1
50k
*
+15V
+15V
3.3k
R2
1000
*
OP.()5
eo
Vo
+
R3
50k
*
-15V
-15V
* RESISTORS MUST HAVE
LOW THERMOELECTRIC
POTENTIAL
"'" =
1000
C
14.7I'F
2.5M
NOTES:
1) RC APPf10XIMAffiV 10Hz FLTER
2) OBSERVE OUTPUT FOR 10 SECONDS
"" - 25000
t This circuit is also used as the burn-in configuration
with supply voltages changed to ± 20V, R1= R3 = 10k,
R2=2000, Av=100.
Application lip
When the OP-05 ~ used as a replacement In 725, 108110BA, 308/308A applications,
removal of external compensation is optional. For conventionally nulled 741 type applications, exIernaltrimrrlng shoold be removed. Care should be taken to avoid thermocouple voltages caused by temperature variations between the input terminals or
dissimilar metals.
2-327
OP-05
TYPICAL APPLICATions
Precision Absolute Value Circuit
1001<
lOOk
lOOk
501<
lOOk
1N914
~--4>-- eo
= Iein I
1N914
ALL AES1STORS MATCl'fD WlTllIN 0.1%
Two Op-Amp Instrumentation Amplifier
lk
A2
*
2k
A5
A4
R3
10k
'>"-......-
Vo
FDA MAXIMl),1 CMRR,
R2
R3
R1
- R4
FOR THIS CONDmON,
* IIDJUST Rl FOR CMAR, TllEN
~------Vin
--------.!
+
ADJUST A5 FOR GAIN ACCURACY.
A5 DOES NOT AFFECT CMAR.
VO-Vi1[~][l +~
A3
~:
Rl
+ R2+R3]
R5
- 210 FOR VALUES SHOWN
PACKAGE DESCRIPTiOn
HPackage
Metal Can
J8 Package
8 Lead Hermetic Dip
IIJTE'I:ItIENSD4SININCHSlH.ESSOTIffIWISENOTSl
"LEADSwmtffD.O07C1'TRlEPOIlI1'QI(TP)ATGAOOEPlANE
2-328
N8 Package
8 Lelld Plastic
NOTE DIMENSIONSINI«:IESlH.ESSOTIDWISEtmED.
"LEADSWlTHNO.0D1C1'TRl.POSmIJt(TP)ATIWlGEPLAIE
L7~O~~~'iY!"'""----p-r-e-C-iSi-o-n-o-p-e-r-aO-ti-:--noa-~
Amplifier
FEATURES
DESCRIPTion
• Guaranteed 25J1-V max. Offset Voltage
• Guaranteed O.6J1-V 1°C max. Offset Voltage
Drift with Temperature
• Excellent l.0Jl-V IMonth max. Long Term Stability
• GuaranteedO.6J1-Vp_p max. Noise
• Guaranteed 2.0nA max. Input Bias Current
The OP-07 offers excellent performance in applications requiring low offset voltage, low drift with time
and temperature and very low noise. Linear's OP-07 is
interchangeable with many of the precision op-amp
device types. The OP-07 also offers a wide input voltage range, high common mode rejection and low input
bias current. These features result in optimum performance for small signal level and low frequency applications. Use of advanced design, processing and
testing techniques make Linear's OP-07 a superior
choice over similar products. A buffered reference ap- . . .
plication is shown below. For single op amp applica- . .
tions requiring higher performance, see the LT1001
and for matched dual precision applications see the
LT1002.
APPLICATions
•
•
•
•
Thermocouple Amplifiers
Strain Gauge Amplifiers
Low Level Signal Processing
Medical Instrumentation
Offset Voltage Drift With Temperature
Of Representative Units
Precision Buffered Single Supply Reference
..L
'
50~--~--~--~--~
............J-- ------,
130K
40r---+-~+-~~--~
J.12-18Y
30
f
3.3K
~
20
~
10r-~~~~-
is
~
t;:; -10 ~--+---+-,~~~""'I
LM129A
Your
1K
~
10.000V
3.3K
~
-20 f-----e-""""---+-----j-----j
-30
I---"""--+-----f""ooo;;:--+---~
-40
r---+---+---"'-t---~
-50 ~---'------'------'-----'
-75
-25
125
75
25
8.2K
TEMPERATURE ('G)
The OP-07 contributes less than 5% of the total drill with temperature. noise
and long term drift of the reference application.
2-329
OP-07
ABSOLUTE mAXimum RATinGS
Supply Voltage ........................ ±22V
Differential Input Voltage ................ ±30V
Input Voltage Equal to Supply Voltage
Output Short Circuit Duration. . . . . . . . . .. Indefinite
Operating Temperature Range
OP-07/0P-07A .............. -55°Cto 125°C
OP-07E/OP-07C ................. O°C to 70°C
Storage Temperature Range
All Devices ............... -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
PACKAGE/ORDER InFORmATion
TOP VIEW
OFFSET
ADJUST
-IN
~
q:
+IN 3
6 OUT
r.-.
--w
5 NC
v- (CASE)
ORDER PART NO.
OFFSET
VOLTAGE
(MAX)
OP-07AH
OP-07H
OP-07EH
OP-07CH
25p,V
75p,V
75p,V
150p,V
OP-07AJ8
OP-07J8
OP-07EJ8
OP-07CJ8
OP-07EN8
OP-07CN8
25p,V
75p,V
75p,V
150p,V
75p,V
150p,V
METAL CAN HPACKAGE
TOP VIEW
-'8'Vas
Vas
-IN
2
+IN
v-
3
4
+
7
v+
6
5
OUT
NC
HERMETIC DIP J6 PACKAGE
PLASTIC lkll
SR
Slew Rate
RL > 2kll (Note 4)
GBW
Closed Loop Bandwidth
AvCL = + 1 (Note 4)
Z,
Open Loop Output Impedance
Vo = 0, 10 = 0, f = 10Hz
Pd
Power Dissipation
Vs = ±15V
Vs = +3V
Offset Adjustment Range
Null Pot = 20kll
See Noles on page 2-332
2-330
± 15V, TA = 25°C, un leas otherwise noted.
MIN
OP-OlA
TY'
10
MAX
25
Mil
OP·07
TYP
30
MAX
75
0.2
1.0
0.3
2.0
±0.7 ±2.0
0.35
0.6
10.3
18.0
10.0
13.0
9.6
11.0
30
14
0.32
0.80
0.14
0.23
0.17
0.12
80
30
200
+13.5 +14.0
110
126
100
108
300
500
150
400
0.2
1.0
0.4
2.8
±1.0 ±3.0
0.35
0.6
10.3
18.0
10.0
13.0
9.6
11.0
14
30
0.32
0.80
0.14
0.23
0.12
0.17
20
60
200
±13.5 ±14.0
110
126
100
108
200
500
400
150
±12.5 ±13.0
±12.0 ±12.8
±10.5 ±12.0
0.1
0.25
0.4
0.6
60
75
4
+4
±12.5 ±13.0
±12.0 ±12.8
+10.5 ±12.0
0.1
0.25
0.4
0.6
60
75
4
+4
120
6
UNITS
/LV
/LV/Month
nA
nA
/LV...
nV/YHz
pAp-.
PAlYHz
Mil
Gil
V
dB
dB
V/mV
V
Vlp.S
MHz
11
120
6
mW
mV
OP-07
ELECTRICAL CHARACTERISTICS Va =
± 15V. -55°C..;; TA ..;; 125°C. unleas otherwise noted.
OP-07A
SYMBOL
Vos
~
A amp
los
A emp
~
Ie
A emp
~
CMRR
PSRR
Avm.
VOUT
MRAMmR
Input Offset Voltage
Average Input Offset Voltage Drift
Without External Trim
With External Trim
Input Offset Current
Average Input Offset Current Drift
eOIDITlONS
(Note 1)
Null Pot
= 20kn (Note 2)
(Note 2)
Input Bias Current
Average Input Bias Current Drift
(Note 2)
Input Voltage Range
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage SWing
VCM = ±13V
Vs= ±3Vto ±18V
RL > 2kn. V. = +10V
RL > 2kn
•
ELECTRICAL CHARACTERISnCS Vs =
SYIBOL
Vos
~
ATlme
los
Ie
e.
I.
RI•
CMRR
PSRR
AwL
Vo
SR
GBW
Z.
Pd
MRAMETU
Input Offset Voltage
Long Term Input Offset Voltage
Stability
Input Offset Current
Input Bias Current
Input NOise Voltage
Input Noise Voltage Density
•
•
•
•
•
•
COIDITIONS
(Note 1)
(Notes 2 and 3)
O.lHz to 10Hz (Note 2)
f. - 10Hz
f. = 100Hz
(Note 2)
f. - 1000Hz
Input Noise Current
O.lHz to 10Hz (Note 2)
Input Noise Current Density
f. - 10Hz
(Note 2)
f.= 100Hz
f. = 1000Hz
Input Resistance Differential Mode (Note 4)
Input Resistance Common Mode
Input Voltage Range
Common Mode Rejection Ratio
VCM - +13V
Power Supply Rejection RatiO
Vs = +3V to + 18V
Large Signal Voltage Gain
RL 2:: 2kn. Vo = ± 10V
RL 2:: 5000, Vo - ± 0.5V
Vs - ±3V(Note4)
Maximum Output Voltage SWing
~ 2:: 10kn
~ 2:: 2kn
RL 2:: lkn
Slewing Rate
RL 2:: 2kn (Note 2)
Closed Loop Bandwidth
/\vCL = + 1 (Note 2)
Open Loop Output Impedance
Vo = 0, 10 = 0, f = 10Hz
Power Dissipation
Vs = ±15V.
Vs = ±3V.
Offset Adjustment Range
Null Pot = 20kn
•
•
•
•
± 15V. TA
Mil
m
OP-07
TYP
60
200
25
MAX
60
0.2
0.2
0.8
5
0.6
0.6
4.0
25
0.3
0.3
1.2
8
1.3
1.3
5.6
50
+1.0
±4.0
±2.0
±6.0
8
25
13
50
1111
MAX
±13.0 ±13.5
106
123
106
94
400
150
±12.0 +12.6
±13.0 ±13.5
106
123
94
106
200
400
+12.0 ±12.6
UIITS
p.V
p.VloC
nA
pArC
nA
pArC
V
dB
dB
VlmV
V
= 25°C. unless otherwise noted.
III
OP·07E
TYP
30
lAX
75
III
OP-07C
TYP
lAX
60
150
0.3
1.5
0.5
3.8
+1.2 ±4.0
0.6
0.35
10.3
18.0
10.0
13.0
9.6
11.0
14
30
0.32
0.80
0.14
0.23
0.17
0.12
15
50
180
±13.5 ±14.0
106
123
94
106
200
500
400
150
0.4
2.0
0.8
6.0
+1.8 +7.0
0.35
0.65
10.5
20.0
10.2
13.5
9.8
11.5
15
35
0.32
0.90
0.15
0.27
0.13
0.18
8
33
120
±13.0 ±14.0
100
120
90
104
120
400
100
400
±12.5 ±13.0
±12.0 ±12.8
±10.5 ±12.0
0.1
0.25
0.4
0.6
±12.5 ±13.0
±11.5 ±12.8
±12.0
0.1
0.25
0.4
0.6
60
75
4
±4
80
4
±4
p.VlMonth
nA
nA
p.~
nVlYHz
pA...
PAlYHz
Mil
Gil
V
dB
dB
VlmV
V
Vlp.S
MHz
60
120
6
UIITS
p.V
Il
150
8
mW
mW
mV
See Notes on page 2-332
2-331
OP-07
ELEORICAL CHARAOERISTICS VS =
SYMBOL
Vos
~
aTemp
los
~
a emp
PARAMrnR
eoNDma.
Input Offset Voltage
Average Input Offset Voltage Drift
Without External Trim
With External Trim
Null Pot = 201<0 (Note 2)
Input Offset Current
Average Input Offset Current Drift (Note 2)
Ie
ale
afemp
CMRR
PSRR
Avot.
Your
Input Bias Current
Average Input Bias Current Drift
(Note 2)
Input Voltage Range
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage Swing
VCM = +13V
Vs = +3Vto +18V
RL > 2kll, V. = + 10V
RL > 2kll
•
•
•
•
•
•
•
The. denotes the specifications which apply over full operating
temperature range.
For MIL-STD components, please refer to LTC 883C data sheet for test
listing and parameters.
Nota 1: Offset voltage for the OP-07A is measured 60 seconds after
power is applied. All other grades are measured with high speed test
eqUipment, approximately 1 second after power is applied.
Not. 2: This parameter is tested on a sample basis only.
2-332
± 15V. DoC
•
•
•
•
~ 1, ~ 70°C.••1111 ."nISl natld.
liN
D,..o7C
DP..o7E
m
45
lAX
130
0.3
0.3
0.9
8
±1.5
13
+13.0 ±13.5
103
123
90
104
180
450
±12.0 ±12.6
III
m
lAX
250
UIITS
85
1.3
1.3
5.3
35
0.5
0.4
1.6
12
1.8
1.6
8.0
50
,..vrc
+5.5
35
+2.2
+9.0
50
nA
pArC
18
±13.0 +13.5
97
120
86
100
100
400
+11.0 ±12.6
f;V
nA
pArc
V
dB
dB
VlmV
V
.o.a 3: Long term Input Offset Voltage Stability refers to the
averaged trend line of Vos versus Time over extended periods after
the first 30 days of operation. Excluding the initial hour of operation,
changes in Vos during the first 30 operating days are typically 2.5"V.
• ... 4: This parameter is guaranteed by design.
.... 5: The OP-07D is available by special request.
OP-O?
TYPICAL PERFORmAnCE CHARACTERISTICS
Total Input Noise Voltage
Low Frequency Noise
(Closed Loop Gain = 25,000)
Open-Loop
Frequency Response
vs Frequency
120
i""'"-
~
80
r'\
r'\
I ±15~_
vsTA - 25'C
r'\
r'\
,
\
-40
10
10
4
TIME - SECONDS
100
120
TA - 25'C_
~1oo
~
110
100
~
80
"
.3
,
80
1.0
10
100
1k
10k
50
100k
;:;t!I
1.0
10
~~
1k
100
'" 30
TA -l5'C
~ 20 )---Vs - ±15V
~
til
t!I
~
~
15
~
~
20
~
15
~
10
~
5
is
5
S o /'
o
Tt.1E AFTER POWER SUPPLY TURN ON (MINUTES)
-5
10k
~
t:::::
o
TIME (MONTHS)
~
IVS~
Open-Loop Gain vs
Temperature
1000
o
I
r-- Vs -
i15L
I
± 15V
800
~
r- r- r- r- -
-20
~~~~
~
!'s
9
400
~
I~ .....
'..-+-"
600
iii
~~SF
I~
~
D~V1CE1 ~SED
r- - -
IN 70'C OIL BATH
r- -
~
00
TIME (SECONDS)
00
~
r-
"""'"
200
~
-w
o
W
~
...
-10 L-_...L..._-.L...._--1.._--'_--.J
25
;;:;
;;:; 10
0
§?
Offset Voltage Change Due
to Thermal Shock
.5
10M
.....---r---r---r---,----,
FREQUENCY (Hz)
Warm-Up Drift
'" 25
10k lOOk 1M
~
0.1
FREQUENCY (Hz)
.5
1k
(
z
15
60
60
I\5
'"t!I
70
70
~
10
Vs - ± 15V
~ 90
r\
90
,
Vs - ±15V
100
Long Term Stability of Four
Representative Units
T~ ~I~~,J I
11111111 1IIIIIm
110
10
FREQUENCY (Hz)
Power Supply Rejection Ratio
vs Frequency
130
~
0.1
FREQUENCY (Hz)
Common Mode Rejection Ratio
vs Frequency
120
1000
100
TEMPERATURE ('C)
2-333
OP-07
TYPICAL PERFORmAnCE CHARACTERISTICS
Input Bias Current vs
Temperature
Input Bias Current vs
DIHerentiallnput Voltage
Input Offset
Current vs Temperature
30
2.5
Vs!. ±J5V
AT IVrnFF I < 1.0V, lis I < 2nA (OP·07A)_
< 3nA (OP·07)
< 7nA (OP·07C) -
vs'= ± \5V
,
~ 2.0
ffi
~ 1.5
.....
... ~
OP·07
:--.... ~
....
oP.orA......
~
-50
(.)
-- -""
OP·07E
50
m
,
~ 1.0
~
,
OP·07
ri
0.5
./
100
~50
50
0.2
OP·07
j;;;;;;;;;;;;;;;;;;;~I---iiiil~~~~71
10
OP·07A
1.0
100
MATCHED OR UNMATCHED SOURCE RESISTANCE (kll)
Output Voltage vs
Load Resistance
20
IPOsiTIJE
-----/ '
10
~ 0.6
15
~
0.1
35
«
f-
illa:
".
25
~
I~
1. VIN (PIN 3) = -10mV, Vo - + 15V
2. VIN (PIN 3) - + 10mV, Vo = -15V
......
f-
I.J
o
30
a
~
10
100
+25"C
S-
1.0
10
1.0
Output Short-Circuit
Current vs Time
IS
LOAD RESISTANCE TO GROUND (kll)
OP·07E
o
100
Power Consumption
vs Power Supply
r=TA
o
-'
//
'/
-
OP·07C
MATCHED OR UNMATCHED SOURCE RESISTANCE (kll)
WJ
1.0
0.4
~ 0.2
a:
fi1
~
,
2-334
~
MATCHED OR UNMATCHED SOURCE RESISTANCE (kll)
I l~'f
II
0.1
~ 0.8
@5
NEGATIVE SWING
~
I
/
~
1000
III
TA U2J"d
-vs - ±15V
VIN = ±10mV
30
J
;:- 1.0
/
/J
t----/------1i-~"""~
1.0
20
O"C $ T $70°C
Vs = ±15V
~
J
ffi
~
10
1.2
-55"C $ T $125"C
Vs - ±15V
~
'"~
-10
Maximum Error vs
Source Resistance
1.0
TA - 25"C
Vs- ±15V
0.4
Vs - ±15VTAil5"CI -
DIFfERENTlAlINPUT VOlTAGE (VOlTS)
Maximum Error vs
Source Resistance
r----,---,------,
~
-20
TEMPERATURE ("C)
fa 0.6 t----/------1i-----jH
@5
-30
-30
100
~ 0.8
Ii
, 1/
~
~
7
Maximum Error vs
Source Resistance
~
".
\
"- ...... ~
... ~.\m
,",
TEMPERATURE ("C)
1.0
OP·07C
-
-;; ~
20
5
20
40
TOTAL SUPPLY VOlTAGE, V+ TOV- (VOLTS)
60
r--15
Vs
TA
"
.....
= ±15V
= +25"C
-
yo ~
v-
I -[
o
TIME FROM OUTPUT BEING SHORTED (MINUTES)
OP-07
TYPICAL APPLICATions
Precision Summing Amplifier
Instrumentation Amplifier
RS
Rl
2I(!!
2KIl
3
Vl
+
R4
lK
R6
10K
Rz
2K!!
Vz
ZIN
R3
~
10OG!!
2K!!
V3
R3
OP-37
Rl
1% 9K!!
2K
R4
2K!l
3
V4
+15V
R5
lIN
~
±lnA
2K!!
R5
1K
V5
OP'()7
VOUT
+
+
3
R7
+
10K
R6
2R1
)
Av=-- ( -+1
R4
R3
-15V
Av = 100
TEST CIRCUIT DIAGRAmS
Offset Voltage Test Circuit t
Offset Nulling and Low
Frequency Noise Test Circuit
Rl
*
+15V
50k
+15V
100f!
R2
loon
R3
50k
*
3.3k
>--_--Vo
l00f!
*
-15V
* RESISTORS MUST HAVE
-15V
LOW THERMOELECTRIC
POTENTIAL
"'" =
1000
2.51.1
NOTES:
1) RC APPROXIMATELY 10Hz FILTER
2) OBSERVE OUTPUT FOR 10 SECONOS
Py
t This circuit is also used as the burn-in configuration
with supply voltages changed to ± 20V, R1 = R3 = 10k,
R2=2000, Av=100.
~
25000
Application TIp:
When Ihe OP-071s used as a replacement in 725. 108Jl0BA. 3OB/30BA applications,
removal of external compensation Is optional. For conventionally nulled 741 type applications, external trimming should be removed. care should taken to avoid thermocouple voltages caused by temperature variations between Ihe Input terminals or dissimiar
metals.
2-335
OP-07
SCHEmATIC DIAGRAm
OUTPUT
v
PACKAGE DESCRIPTion
HPackage
Metal Can
J8 Package
8 Lead Hermetic Dip
N8 Package
8 Lead Plastic
7°±SO
,
,,
-.r i-lo·-,,·
!WQ
0.290
NDTE.DIIENSIONSININCIES
2-336
NOTE'IlItoIEMSI)NS IN IDlES UNLESS OMRWISE OOTED.
'LEADSWITHIN 0.007 QF TRUE POSITION(TPiAT GAUGE PlANE
NOTE'!HNSKlNS INH:HES IH.ESSOTHERWISENOTED
'UADSWI'f1II4 O.OD7 OF 1fIlIE POSITION (lP) AT GAUGE PLAN:
~-Y"·llntJW
~~
OP-07CS8
TBCHNOLdG~~~--------Pr-e-CI-'Si-o-n-O-p-e-ra-t-io-n-al
Amplifier
FEATURES
DESCRIPTion
• Guaranteed 150,N max. Offset Voltage
• Guaranteed 1.8p.V/oC max. Offset Voltage Drift with
Temperature
• Excellent 2.0p.V/Month max. Long Term Stability
• Guaranteed O.65p.Vp-p max. Noise
• Guaranteed 7nA max. Input Bias Current
The OP-07 offers excellent performance in applications requiring low offset voltage, low drift with time and temperature and very low noise. Linear's OP-07 is interchangeable
with many of the preCision op amp device types. The
OP-07 also offers a wide input voltage range, high common-mode rejection and low input bias current. These features result in optimum performance for small signal level
and low frequency applications. Use of advanced design,
processing and testing techniques make Linear's OP-07 a . . .
superior choice over similar products. A buffered refer- IiIII
ence application is shown below. For Single op amp applications requiring higher performance in the SO
package, see the LT1001CS8.
APPLICATions
•
•
•
•
Thermocouple Amplifiers
Strain Gauge Amplifiers
Low Level Signal Processing
Medical Instrumentation
Precision Buffered Single Supply Reference
I
Long Term Stability of Four
Representative Units
..L
10
"'----;P"-I-30K----,
r-----r-...,.-,----,----,
-b.12-18v
f
3.3K
LM129A
VOUT
lK
~
10.000V
3.3K
8.2K
-10
'-----L_.....I..._.1..----'_--'
o
TIME (MONTHS)
The OP-07 conlribules less lhan 5% of the total drift with temperature, noise
and long term drift of the reference application.
OP-07CS8
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage ................................... ± 22V
Differential Input Voltage ........................ ± 30V
Input Voltage Equal to Supply Voltage
Output Short Circuit Duration .................. Indefinite
Operating Temperature Range ............... OOC to 70°C
Storage Temperature Range
All Devices ........................... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
ORDER PART NUMBER
TOP VIEW
OP·07CS8
PART MARKING
sa PACKAGE
OP07CS8
PLASTIC SO
ELECTRICAL CHARACTERISTICS Vs =± 15V, TA =25°C, unless otherwise noted.
SYMBOL
Vos
!::Nos
lITlme
los
Is
en
PARAMETER
Input Offset Voltage
Long Term Input Offset Voltage Stability
Input Oflset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
In
Input Noise Current
Input Noise Current Density
Rln
AVOL
Input Resistance Differential Mode
Input Resistance Common·Mode
Input Voltage Range
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Vo
Maximum Output Voltage Swing
SR
GBW
Slewing Rate
Closed Loop Bandwidth
Open Loop Output Impedance
Power Dissipation
CMRR
PSRR
Zo
Pd
0.1 Hz to 10Hz (Note 2)
10= 10Hz
10 = 100Hz (Note 2)
10= 1000Hz
0.1 Hz to 10Hz (Note 2)
10= 10Hz
10 = 100Hz (Note 2)
10= 1000Hz
(Note 4)
VCM= ±13V
Vs= ±3Vto ±18V
RL=2k1l,Vo=±10V
RL = 500II, Vo = ± 0.5V
Vs= ± 3V(Note 4)
RL = 10kll
RL~2k1l
RL~lkll
Offset Adjustment Range
2-338
CONDITIONS
(Note 1)
(Notes 2 and 3)
RL ~2k1l (Note 2)
AVOL = +1(Note 2)
Vo=O, 10 =0,1= 10Hz
Vs= ±15V
Vs= ±3V
Null Pot = 20kIl
MIN
OP'()7Csa
TYP
60
0.4
0.8
±1.8
0.35
10.5
10.2
9.8
15
0.32
0.15
0.13
8
±13.0
100
90
120
100
±12.5
±11.5
0.1
0.4
MAX
150
2.0
6.0
±7.0
0.65
20.0
13.5
11.5
35
0.90
0.27
0.18
33
120
±14.0
120
104
400
400
±13.0
±12.8
±12.0
0.25
0.6
60
80
4
±4
UNITS
~V
~VlMonth
nA
nA
~Vp·p
nVlv'Hz
nVlv'Hz
nVlv'Hz
pAp·p
pAf.J,.Hz
pAlv'Hz
pAlv'Hz
Mil
Gil
V
dB
dB
V/mV
VlmV
V
V
V
VI~s
150
8
MHz
II
mW
mW
mV
OP-07CS8
ELECTRICAL CHARACTERISTICS Vs= :!:15V,OOCsTAS700C, unless otherwise noted.
OP.o7CS8
SYMBOL
Vos
tNos
"Temp
los
~
"Temp
18
~
PARAMETER
Input Offset Voltage
Average Input Offset Voltage Drift
Without External Trim
With External Trim
Input Offset Current
Average Input Offset Current Drift
CONDITIONS
(Note 2)
Input Bias Current
Average Input Bias Current Drift
(Note 2)
Null Pot = 201<11 (Note 2)
"Temp
CMRR
PSRR
AVOL
VOUT
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage Swing
VCM=:I: 13V
Vs= :l:3Vto :l:18V
RL~2kl1, Vo=:I: 10V
RL~2kn
The. denotes speCifications which apply over the full operating tempera·
turerange.
Nole1: Offset voltage is measured with high speed test equipment, ap·
proximately 1second after power is applied.
Nole 2: This parameter is tested on a sample basis only.
MIN
•
•
•
•
•
•
•
•
•
•
•
:1:13.0
97
86
100
:1:11.0
TYP
MAX
250
UNITS
85
0.5
0.4
1.6
12
1.8
1.6
8.0
50
~V/oC
~V/oC
nA
pA/oC
:1:2.2
18
±9.0
50
nA
• pAloC
:1:13.5
120
100
400
:1:12.6
~V
V
dB
dB
V1mV
V
Nole 3: Long Term Input Offset Voltage Stability refers to the averaged
trend line of Vos versus Time over extended periods after the first 30 days of
operation. excluding the initial hour of operation, changes in Vos during the
first 30 operating days are typically 2.5~V.
Nole 4: This parameter is guaranteed by design.
2-339
NOTES
2-340
''''''''-Llnlt\Q
~,
OP-1S/OP-16
TECHNOLOGY Precision, High Speed JFET-Input
Operational Amplifiers
FEATURES
DESCRIPTiOn
• Improved Specifications Compared to
LF155/ 156 Devices
500p,V Max.
• Guaranteed Low Offset Voltage
5p,V/oC Max.
• Guaranteed Low Offset Drift
• Guaranteed Bias Current Fully
Warmed-Up over Temperature
.OP-15: LF156 Speed with LF155 Power Dissipation
Guaranteed Supply Current
4mA Max.
Guaranteed Slew Rate
10V/p,S Min.
·OP-16:
Guaranteed Faster Slew Rate
18V/p,S Min.
No High Frequency Oscillation at Cold
Temperatures
• No Phase Reversal when Negative
Common-Mode Limit is Exceeded
The OP-15 /16 series devices feature distinct advantages
over other JFET-input operational amplifiers, in particular
compared to LF155/156 types.
The OP-15 has the speed of the LF156 design with the
low power dissipation of the slower LF155. The OP-16 is
considerably faster. Both devices offer offset voltages as
low as 0.5mV, with guaranteed drift of 5p,V/oC. Input
bias current at 125°C is just a few nanoamperes.
Other manufacturers' OP-15/16 (and LF155/156) exhibit phase reversal at the output when the negative . . .
common-mode limit at the input is exceeded; i.e., driving . .
from -12V to -15V with ::I:: 15V supplies. This can
cause lock-up in servo systems. As shown in the application section, Linear Technology's OP-15/16 does not
have this problem due to unique phase reversal protection circuitry.
In addition, Linear's OP-16 is free from high frequency
oscillation problems at cold temperatures, as is illustrated in the "Voltage Follower Small Signal Pulse
Response" photo. For applications requiring higher
performance, see the LT1 022, LT1 055 and LT1 056 data
sheets.
APPLICATions
•
•
•
•
Long Term Precision Integration
Current to Voltage Conversion
Medical Instrumentation-CAT Scanner
High Speed, Precision Sample and Hold
Voltage Follower Small Signal Pulse Response
TA= -55°C
Fast, 12-8it Current Comparator
4.7k
3k
INPUT·---!t-'II'.,.,.....
LT1009
2.SV
OUTPUT
DELAY = 25On8
*=1% FILM RESISTOR
= HP5082-2810
--f
CL =l00pF
VERTICAL SCALE = 211mVI DlV
HORIZONTAL SCALE=O.2pS/DIV
2-341
OP-15/0P-16
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Supply Voltage
A, B, E, FGrades. . . . . . . . . . . . . . . . . . . . .. ± 22V
C, GGrades ......................... ± 18V
Internal Power Dissipation . . . . . . . . . . . . . . . . 500mW
Operating Temperature Range
A, B, CGrades ............... - 55°C to 125°C
E, F, GGrades .................... O°C to 70°C
Junction Temperature .................... 150°C
Differential Input Voltage
A, B, E, FGrades ...................... ±40V
C,GGrades ......................... ±30V
Input Voltage (Note 4)
A, B, E, FGrades ...................... ± 20V
C, GGrades ......................... ± 16V
Output Short Circuit Duration ............. Indefinite
Storage Temperature Range ....... -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ........ 300°C
ORDER PART NUMBER
TOP VIEW
NC
8
4
V-ICASE)
H PACl.: 2.0
I-
RL=lkD
91.0
0.0
I
TA-25°C
2.2 Vs=±15V
~V
I!;
10 100 lk 10k lOOk 1M 10M 100M
FREQUENCY (Hz)
lk
FREQUENCY (Hz)
Open Loop Voltage Gain vs
Load Resistance
....... ~
RL=2kD , /
;;1.5
"C\ "'-
100
2.4
ii
1\
2-348
j 111111
0.1
~
TA=25°C
>.:
;;;:
~
1
20
~
TOTAL SUPPLY VOI1AGE (V+ -V-) (YOI1S)
2.0
N~
-20
0.1
2.5
TA=25°C
Vs= ±15V
120
W
Open Loop Voltage Gain vs
Supply Voltage
Voltage Gain vs Frequency
140
o
91.0
i
50
0.8
0.6
0.4
0.1
1.0
10
LOAD RESISTANCE (kO)
100
OP-27/0P-37
TYPICAL PERFORmAnCE CHARACTERISTICS
Offset Vonage Drift of
Representative Units
100
80
_
60
:340
I
I
Long Term Drift of
Representative Units
-
I
I
~27/37A
V
OP-27137
r-
f--"'"
1
co
~-4O
!Ii_ 60
-80
01j"27/3'f
OP-27/37G
I
I
-
I
I
-100
-50 -25
0
jKTR~oul!-c: O.2~ r'
25
50
75
TEMPERATURE ('CI
~
-6
125
50
I
15
co:
...'"co:
ANI
~
~
...!Ii
50
30
[\r-.,
20
80
100
o
Supply Current vs Supply
Vonage
,---.----r----.------,
-50 -25
cS.
40
15
iii
'"
..
30
_
20
i
10
i'"
tfH1
r--"r-.
10
/I~,.cr~:~:
I
-rl
20
40
60
TIME (SECONoSI
5.0
Input Offset Current vs
Temperature
Vs= ±15V
!;
V
1
2
3
4
TIME AFTER POWER ON (MINUTESI
40
/:;;,;u ••
iiTi
Vs= ±15V
,
~
'",- ~37J
"tr2~/37A,
o
0
25 50 75 100 125 150
TEMPERATURE ('CI
-75
-50 -25 0 25 50 75
TEMPERATURE ('CI
18
TA=25'C
Vs= ±15V
~
i'-..
.......
~ ......
TA=25'C
I
10
o
1
Isc(+1
2
SWING
NEGATiVE
SWING
ell
I
if
3
4
5
TIME FROM OUTPUT SHORTED TO GROUND (MINUTESI
;;...-
12 POSITive ,;'
e 10
Isc(-I
~
45
125
16 Vs= ±15V
14
15
25
35
TOTAL SUPPLY VOLTAGE (VoLTSI
100
Maximum Output Swing vs
Resistive Load
Short Circuit Current vs
Time
60
0P-27137A1E
V-
V
3
4
5
TIME (MONTHSI
i:
H~IIMA
V
II
Input Bias Current vs
Temperature
I I
~:~,~
o
V
/
......
t- ~
Offset Vonage Change Due
to Thermal Shock
VS=±15V
IO.2~~/MwlTH TR~~
NOUNE
__ -....
~
........
100
0P-27/37C/G
..l
1-
... r--....
-
TA=25'C
Vs= ±15V
__
..,...V
l!I
6 1V), the output waveform will look as
shown in the pulsed operation diagram.
Improved Sensitivity Adjustment
4.7k
1k
+15V
OUTPUT
-15V
Offset Voltage and Drift
Thermocouple effects, caused by temperature gradients
across dissimilar metals at the contacts to the input terminals, can exceed the inherent drift of the amplifier
unless proper care is exercised. Air currents should be
minimized, package leads should be short, the two input
leads should be close together and maintained at the
same temperature.
During the fast feedthrough-like portion of the output, the
input protection diodes effectively short the output to the
input and a current, limited only by the output short circuit protection, will be drawn by the Signal generator.
With Rt;:;: 5000, the output is capable of handling the
current requirements (I L S 20mA at 10V) and the
amplifier stays in its active mode and a smooth transition
will occur.,
As with all operational amplifiers when Rt> 2kO, a pole
will be created with Rt and the amplifier's input
capacitance, creating additional phase shift and reducing
the phase margin. A small capaCitor (20pF to 50pF) in
parallel with Rt will eliminate this problem.
2-353
OP-27/0P-37
SCHEmATIC DIAGRAm
Cl
NON-INVERTING
INPUT (+)
+-+-=..:;:.:....j
33.H~+-.........
INVERTING
INPUT(-)
240pA
Cl =l20pF FOR DP-27
Cl =l5pF FOR DP-37
2-354
340pA
v-
L---------~------~---4----------~--~--~~~g
OP-27/0P-37
PACKAGE DESCRIPTiOn
H Package
Metal Can
J8 Package
8 Lead Harmetic DIP
0
0.165-0.185
(4.191-4.6119)
5!
0.220-0.310
15.1188-7.874}
.1
~
4
I__ ~
J
t
~
(12.70-1•.05)
(1.397)
MAX
t
--+
~
(3.175-5.080)
'R'..
,
,
"
II
II"
\III
-1tO'-15" j~~
(0.203-0.381)
TVP
~
(7.366-8.128)
NOTE: DIMENSIONS IN INCHES (MILUMETERS) UNLESS OTHERWISE NOTED
·LEADS WITHIN 0.007 OF TRUE POSITION (TP) AT GAUGE PLANE
NOTE: DIMENSIONS IN INCHES (MILUMETERS)
N8 Package
8 Lead Plastic
~-t
-0.24010.280
~~(6'~r"2)
J I. . . .
0.040 MAX
(1.0Iai
0.050
(1.524)
..!!!!! ,_ (~.:=~o~)-,
(0.508)
0.155!0.175
_II
SQ
0005
Mt'~Ir-':=r1=-':::"--\:I--(O~,~)
(3937-4.445)
A
I
I
I
•1/
--I
7.±50
,
I
I
to'-
"u
150
t~
(0.2113-0.381)
TYP
0.290-0.310
(7.386-7.874)
NOTE: DIMENSIONS IN INCHES UNLESS OTHERWISE NOTED
·LEADS WITHIN 0.007 OF TRUE POSITION (TP) AT GAUGE PLANE
2-355
•
NOTES
2-356
I''''Y'llnCf\12
...£., TECHNOLOG~~~---D-u-a-I
OP-227/0P-237
M-a-tc-h-e-d-L-o-w-N-o-is-e
Precision Op Amp
and Dual High Speed Low Noise
Precision Op Amp
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
The OP-227 is a dual matched precision op amp which
combines low offset, low noise, and high gain with excellent matching characteristics. Typical individual
amplifier specifications of 20p,V Vas, O.2p,V / °C drift,
10nA IB and 2.BnV/...JFfZ 10Hz noise voltage density
make the OP-227 an impressive performer in terms of
single amplifiers. Matching characteristics are specified . . .
with guaranteed limits on all critical parameters including . . .
Vas, Vas drift, IBIAS and CMRR (see the Features section), which make the OP-227 an ideal choice for two and
three op amp instrumentation amplifier applications.
Guaranteed BOp,V Max. Vas
Guaranteed 6.0nV /...JFfZ 10Hz Voltage Noise Density
Guaranteed3.9nV/...JFfZ 1kHz Voltage Noise Density
Guaranteed 1p.V/oC Max. Vas Drift
Guaranteed 1 Million Min. Voltage Gain
Guaranteed Matching Characteristics
Guaranteed 1OV / p,S Min. Slew Rate (OP-237)
APPLICATions
•
•
•
•
Instrumentation Amplifiers
Low Level Signal Processing
Low Noise Audio Amplifiers
Strain Gauge Amplifiers
The OP-237 offers DC specifications identical to the
OP-227 and is decompensated for higher speed operation
at inverting gains greater than 5.
Precision Amplifier Drives 3000 Load to ± 10V
with 0.05% Accuracy
Matching Characteristic;
Drift of Offset Voltage Match
of Representative Units
20k
340k1%
15k5%
100
TRIM
80
:> 60
~ 40
~ 20
:::
0
'"
t§
-20
o
~ -40
150
5%
~'+-~"""'-"""'-+-OUTPUT ± 10V
INPUT
r-...
.......
'"
-
~.,.
I"
boo i-'""
_...
r"""
......
tr-...
80
-100
-120
-75
-35
5
45
1/
OP~27A
OP227A
-
, / r""" OP227C
............
~
I-""'"
I-
...... r-.,
~ -60
0_
RL
3000
"-
r- OP227A
"
85
.... OP227G
125
165
TEMPERATURE (oG)
2-357
OP-227/0P-237
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Supply Voltage (Note 9). . . . . . . . . . . . . . . . . .. ± 22V
Internal Power Dissipation ................ 500mW
Input Voltage . . . . . . . . . . . . .. Equal to Supply Voltage
Output Short-Circuit Duration ............ Indefinite
Differential Input Current (Note 8) . . . . . . . . .. ± 25mA
Storage Temperature Range. . . . .. -65°C to + 150°C
Operating Temperature
OP-227A1237A/227C/237C ., -55°Cto +125°C
OP-227E/237E/227G/237G ... -25°Cto +85°C
Lead Temperature Range (Soldering, 10sec.) .. 300°C
TOP VIEW
J PACKAGE
14 PIN HERMETIC
ORDER
PART NUMBER
OP-227AJ OP-237AJ
OP-227CJ OP-237CJ
OP-227EJ OP-237EJ
OP-227GJ OP-237GJ
OP-227EN OP-237EN
OP-227GN OP-237GN
N PACKAGE
14 PIN PLASTIC
NOTE: DEVICE MAY BE OPERATED EVEN IF INSERTION
IS REVERSED; THIS IS DUE TO INHERENT SYMMETRY OF
PIN LOCATIONS OF AMPLIFIERS A AND B (NOTE 9).
ELECTRICAL CHARACTERISTICS
Individual Amplifiers
Vs= ±15V, TA=25°C, unless otherwise noted
SYMBOL
PARAMETER
OP-227C, G
OP-237C, G
OP-227A, E
OP-237A, E
CONDITIONS
MIN
TYP
MAX
MIN
TYP
UNITS
MAX
Vas
IlVos
IlTime
Input Offset Voltage
(Note 1)
-
20
BO
-
60
1BO
p.V
Long Term Vas Stability
(Notes 2,3)
-
0.2
1.0
-
0.2
2.0
p.V/Mo
los
16
enp·p
Input Offset Current
Input Bias Current
Input Noise Voltage
-
7
±10
0.06
35
±40
0.20
-
12
±15
0.06
75
±BO
0.28
nA
nA
p.Vp-p
en
Input Noise Voltage Density
Input Noise Current Density
6.0
4.7
3.9
4.5
2.5
0.7
9.0
5.9
4.6
in
-
2.B
2.6
2.5
1.5
1.0
0.4
7
±11.0
114
±12.5
126
-
1
20
12
±13.8
±12.5
2.8
15
8
63
40
70
80
±4
0.1Hz to 10Hz
(Notes 3, 5)
f o =10Hz (Note 3)
fo=30Hz (Note 3)
fo= 1000Hz (Note 3)
fo=10Hz (Notes 3, 6)
fo=30Hz (Notes 3, 6)
fo= 1000Hz (Notes 3, 6)
Vour
Input ResistanceCommon Mode
Input Voltage Range
Common Mode Rejection
VCM = ±11V
RatiO
Power Supply Rejection Ratio Vs=±4Vto ±18V
Large-Signal Voltage Gain
RL~2kO, Vo= ± 12V
RL~6000, Vo= ± 10V
Output Voltage Swing
RL~2kO
SR
Slew Rate
CMRR
PSRR
AVOL
GBW
Zo
Pd
2-358
RL~6000
OP-227
OP-237
Gain Bandwidth PrOd. OP-227
OP-237
OP-237
Open-Loop Output Resistance
Power Consumption
Offset Adjustment Range
RL~2kO
AVCL~5
fa = 100kHz (Note 4)
fa = 10kHz (Note 4)
fo=1MHz (AVCL~5)
Vo=O, 10=0
Each Amplifier
Rp =10kO
-
-
-
3
1
±12.0
±10.0
1.7
10
5
35
-
-
-
-
-
-
2.B
2.6
2.5
1.5
1.0
0.4
5
-
±11.0
100
±12.5
126
10
-
-
2
O.B
±11.5
±10.0
1.7
10
5
35
2
20
12
±13.5
±12.5
2.8
15
8
63
40
70
90
±4
-
-
-
140
-
-
-
0.7
-
20
-
-
-
170
-
nV/Y'!lz
nV/.JHz
nV/.JHz
pAlyttl
pA/..JHz
pAl..JHi
GO
V
dB
p.V/V
Vlp.V
Vlp.V
V
V
VI p.S
VI p.S
MHz
MHz
MHz
0
mW
mV
OP-227/0P-237
ELECTRICAL CHARACTERISTICS
Vs=
::I: 15V,
SYMBOL
Individual Amplifiers
- 25°C STAS85°C, unless otherwise noted
PARAMETER
OP-227E
Op-237E
TYP
MAX
MIN
-
40
0.2
140
1.0
-
-
CONDITIONS
MIN
Vos
tJ.Vos
tJ.Temp
Inpul Offset Voltage
Average Input Offset
Drift
los
18
Input Offset Current
Input Bias Current
Input Voltage Range
Common Mode
Rejection Ratio
Power Supply
Rejection Ratio
Large Signal Voltage
Gain
Output Voltage Swing
CMRR
PSRR
AVOL
VOUT
(Note 1)
(Note 7)
•
•
•
•
-
•
•
•
±10.5
110
15
±20
±11.5
124
-
RL2<2kO, Vo= ± 10V
•
RL2<2kO
•
VCM-±10V
Vs= ±4.5V to ± 18V
-
MAX
85
0.3
280
1.8
/LV
/LV/oC
135
±150
nA
nA
V
dB
UNITS
-
±10.5
96
20
±35
±11.5
118
2
15
-
2
32
/LVIV
1
14
-
0.8
14
-
V//LV
±11.7
±13.6
-
±11.0
±13.3
-
V
-
50
±60
-
-
Op-227G
OP-237G
TYP
-
ELECTRICAL CHARACTERISTICS Individual Amplifiers
Vs =
::I: 15V,
SYMBOL
-55°C STAS125°C, unless otherwise noted
PARAMETER
MAX
MIN
-
60
0.2
180
1.0
-
110
0.3
±10.5
108
15
±20
±11.8
122
±10.2
94
-
2
16
1
14
±11.5
±13.5
MIN
Vos
tJ.Vos
tJ.Temp
los
Is
CMRR
PSRR
AVOL
VOUT
Input Offset Voltage
Average Input Offset
Drift
Input Offset Current
Input Bias Current
Input Voltage Range
Common Mode
Rejection Ratio
Power Supply
Rejection Ratio
Large Signal Voltage
Gain
Output Voltage Swing
(Note 1)
(Note 7)
VCM=±10V
Vs= ±4.5V to ± 18V
RL2<2kO, Vo= ± 10V
RL~2kO
•
•
•
•
•
•
•
•
•
OP-227C
OP-237C
TYP
MAX
OP-227A
Op-237A
TYP
CONDITIONS
The. denotes the specifications which apply over the full operating
temperature range.
For MIL-STD components, please refer to LTC 883C data sheet for test
listing and parameters.
Note 1: Input offset voltage measurements are performed by automated
test eqUipment approximately 0.5 seconds after application of power.
Note 2: Long-Term Input Offset Voltage Stability refers to the average
trend line of Vos vs Time over extended periods after the first 30 days of
operation.
Note 3: Sample tested.
Note 4: Parameter is guaranteed by design.
Note 5: See test circuit and frequency response curve for O.lHz to 10Hz
tester.
-
UNITS
350
1.8
/LV
/LV/oC
30
±35
±11.8
116
135
±150
nA
nA
V
dB
-
4
51
-
0.8
14
-
V
-
±10.5
±13.0
-
V
50
±60
-
-
/LV/V
Note 6: See test circuit for current noise measurement.
Note 7: The input offset drift performance is within the specifications unnulled or when nulled with Rp = 8kO to 20kO.
Note 8: The inputs are protected by back-to-back diodes. Current limiting
resistors are not used in order to achieve low noise. If differential input
voltage exceeds ±0.7V, the input current should be limited to 25mA.
Note 9: The V+ supply tenninals are completely independent and may be
powered by separate supplies if desired (this approach, however, would
sacrifice the advantages of the power supply rejection ratio matching). The
V- supply terminals are both connected to the common substrate and
must be tied to the same voltage. Both V- pins should be used.
2-359
OP-227/0P-237
mATCHinG CHARACTERISTICS
See notes on page 2-233.
at Vs= ::I: 15V, TA=25°C, unless otherwise noted
SYMBOL
PARAMETER
lNos
Input Offset Voltage Match
Average Non·lnverting Bias
Current
Non-Inverting Offset Current
Inverting Offset Current
Common Mode Rejection
Ratio Match
Power Supply Rejection
Ratio Match
Channel Separation
Gain Match
Is +
los +
los
ACMRR
APSRR
AAVOL
at Vs =
::I: 15V,
CONDITIONS'
Inverting Offset Current
Common Mode Rejection
Ratio Match
Power Supply Rejection
Ratio Match
-
=130
=130
-
97
=20
=20
117
nA
nA
dB
-
2
20
154
2.0
-
126
154
1.5
-
126
6.0
-
-
9.0
nA
p.V/V
dB
%
MIN
•
•
•
•
•
"
•
•
VcM ==10V
Vs= =4.5V to
± 18V
•
•
-
OP·227A, Op·237A
TYP
MAX
-
55
0.3
-
=20
180
1.0
MIN
-
-
-
200
p.V/oC
=170
nA
=45
250
=250
nA
pA/oC
=45
110
=250
90
-
4
51
=25
130
=90
-
-
-
=25
118
=90
-
-
16
p.V
480
1.8
pAloC
-
2
=35
UNITS
-
100
-
100
0.5
=60
-
105
OP·227C, OP·237C
TYP
MAX
-
nA
dB
p.V/V
-25°C STAS85°C, unless otherwise noted
Input Offset Voltage Match
Input Offset Voltage Tracking
Average Non-Inverting Bias
Current
Average Drift of NonInverting Bias Current
CONDITIONS
(Note 7)
Non·lnverting Offset Current
Average Drift of NonInverting Offset Current
Inverting Offset Current
Common Mode Rejection
Ratio Match
Power Supply Rejection
Ratio Match
2-360
=60
=60
-
Non-Inverting Offset Current
Average Drift of NonInverting Offset Current
AVos
TCAVos
Is +
APSRR
=12
=12
123
(Note 4)
fo=100kHz (Note 4)
RL2:2kO, Vo= =10V
Average Non-Inverting Bias
Current
Average Drift of NonInverting Bias Current
PARAMETER
ATemp
-
UNITS
-55°C STAS125°C, unless otherwise noted
SYMBOL
los
ACMRR
300
=90
10
(Note 7)
Als+
ATemp
los +
Alas +
55
=15
80
2
Input Offset Voltage Match
Input Offset Voltage Tracking
::I: 15V,
-
p.V
=40
-
AVos
AVos
ATemp
Is+
at Vs =
25
=10
Vs ==4Vto =18V
CONDITIONS
APSRR
-
110
PARAMETER
los
ACMRR
OP-227C, G, OP-237C, G
MIN
TYP
MAX
VcM ==llV
SYMBOL
Als+
ATemp
los+
los+
ATemp
OP-227A, E, OP-237A, E
MIN
TYP
MAX
VCM= =10V
Vs==4.5Vto =18V
MIN
•
•
•
•
•
•
•
•
•
-
OP·227E, Op·237E
TYP
MAX
MIN
OP·227G, Op·237G
TYP
MAX
140
1.0
=60
-
-
40
0.3
=14
-
90
0.5
=25
-
80
-
-
180
-
=20
130
=90
-
=20
120
=90
15
-
106
-
2
-
UNITS
p.V
400
1.8
=170
p.V/oC
nA
-
pA/oC
=35
250
=250
nA
pA/oC
90
=35
112
=250
-
3
32
-
nA
dB
p.V/V
OP-227/0P-237
TYPICAL PERFORmAnCE CHARACTERISTICS
Voltage Noise vs Frequency
100
O.OlHz to 1Hz Peak-to-Peak
Noise
0.1 Hz to 10Hz Noise
;=
Vs ±15V
TA 25'C
==
=
-
=
~
1'1 I'll
==
.
I..
111 r"
:11
_""1'1'
,
IlL
iIu ... J
II
p
1/1 CORNER 2Hz
11111111
1
0.1
II
1.0
10
100
FREQUENCY (Hz)
1000
4
6
TIME (SECONDS)
Total Noise vs Source
Resistance
Current Noise vs Frequency
1000
10.0
1~!:2~;gv
~
i
100
~
"'-
0.1
10
1111111
III
1
10k
o
~011111'1
I ONLY
1.0
10
SOURCE RESISTANCE (kll)
100
Vs= ±15V
10
0.01 1-...L..J....l.J..UJJJ......l..-UJ.J..Wl---1...L.L.llWJ
1.0
0.1
100
BANDWIDTH (kHz)
0.02Hz to 10Hz RMS Noise.
Gain=50,OOO (Measured on
HP3582 Spectrum Analyzer)
Voltage Noise vs Supply
Voltage
Voltage Noise vs Temperature
• •
w
1~6~~~TO
V
0.1
100
1
iM1.0~.n
'"~
~
~
100
1k
FREQUENCY (Hz)
>.:
i5
I
'" 10
li1j
80
10~"
z
'"z~
Yl r~~~IER=112r1zl
40
60
TIME (SECONDS)
Wideband Voltage Noise
(0. 1Hz to Frequency Indicated)
~
w
r-
20
10
TA=25'C
-
AT10Hz
_
~
~:.+-
-::.
r-- c---
AT 10Hz
~ r- AT 1kHz
AT 1kHz
r-
I I I '
i-·
I 1 I
o
-50 -25
0
25
50
75
TEMPERATURE ('C)
100
125
o
o
MARKER AT 2Hz (=111 CORNER) =
±5
±10
±15
±20
SUPPLY VOLTAGE (V)
±25
179.V/,;Hz =3.59J))L
50,000
,;Hz
2-361
111
OP-227/0P-237
TYPICAL PERFORmAnCE CHARACTERISTICS
Voltage Gain vs Frequency
180
160
140
-
~
I\.: ~
I\.: '\..
CD 120
;-100
~
'"~
Voltage Gain vs Supply Voltage
TA=2S0C
Vs= ±lSV
RL =2kll
60
§1 40
~ lS
a..
, ....
" t'\.
20
-20
0.01 0.1
1
g
10
5
o
10 100 lk 10k lOOk 1M 10M 100M
FREQUENCY (Hz)
~
~
w
'"
13
§1
15
~
20
~
~ lS
lS
~w
'"t:i
§1
10
1/
z
S
/
1/
o
0.1
0.3
1.0
3.0
LOAD RESISTANCE (kll)
±S
",10
±15
SUPPLY VOLTAGE (V)
-I--
10
o
so
r-:t-..
~1~
--
-2S
H
~~
~
20
~
10
~
0
:s -20
'i"-l
...........
II II
-40
2-362
4
6
TIME (MONTHS)
:.........
10
-so
-so
/-
/
........
0
2S
50
7S
TEMPERATURE (OC)
100
12S
o
V
o
1
2
3
4
TIME AFTER POWER ON (MINUTES)
Supply Current vs Supply
Voltage
./
....-
~
...... ......
/'
12SoC
2SoC
55°C
r- r-..
-30
0.2~V/iONTH TRr DLINE
o
.............
RL =6000 .... .........
VS=±lSV
I;j -10
~
VS=±lSV
TA=2SoC
RL =2k
30
-10
-10 -S
0
S
10
lS
OUTPUT VOLTAGE (V)
MEASURED ON TEKTRONIX 178 LINEAR IC TESTER
Warm-Up Drift
I I
40
0.2~V/MON
-lS
10
Offset Voltage Drift with
Temperature of Representative
Units
10
V
±2S
Vs=±lSV
VOUT= ±10V
VOUT= ±8V FOR TA .. l00°C
RL =6000
-so
10.0
Long Term Stability of Four
Representative Units
I
±20
Voltage Gain vs Temperature
/
9
0
o
2S
Vs= ±lSV
TA=2SoC
20
'/
,I
z
~
-
//RL=6000
Voltage Gain vs Load
Resistance
2S
Y
z
~,
--
lL=2kO
~ 20
~0>'-'
Voltage Gain, RL=2k and 6000
TA=2S0C
~
'\. '\..
0P227 '\. "-0P237
80
2S
---
-2S
i-""""
,/
...... f-"""
i;>'~
~
0
2S
so 7S
TEMPERATURE (OC)
i"...
100
125
o
o
±S
",10
±lS
SUPPLY VOLTAGE (V)
",20
OP-227/0P-237
TYPICAL PERFORmAnCE CHARACTERISTICS
Common Mode Rejection vs
Frequency
140
20
TA-25°C
~
Vs~±15V
VCM~
120
~
'-' so
40
103
V-~-3VTO
i'\
1~
1~
I
+1
-so
10 7
Input Bias Current vs
Temperature
-25
60
VS~±15V
100
I-
I
30
=>
'-'
~
~
=>
'['.
'-'
'-'
lS
~
13
~
5
r;o
"-'~
10 2 10 3 10 4 105
FREQUENCY (Hz)
106
10 7 108
0.1 fT--jo<---j
6
20
tf)
10
100k
1M
0
25°C
125°C
I
125°C
~ -20
oS<
~
-40
V
-50
1k
10k
FREQUENCY (Hz)
I 55 J
r- r---"I
~ ~ -30
0.01 j,o<--+----j,Y-
Vs- ±15V
-10
Ii:
100
10k
Output Short Circuit Current vs
Time
iD 140
~
SWING
300
1k
3k
LOAD RESISTANCE (0)
Closed Loop Output Impedance
TA=25°C
~ NEGATIVE
A
Iff
~
o
PSRR vs Frequency
I
POSIT!VE
30
10
0
25 so 75 100 125 150
TEMPERATURE (OC)
VS~±15V
TA~25°C
40
;;;;
-50 -25
-10
-5
0
5
10
COMMON MODE INPUT VOLTAGE (V)
12
~
10
RCM~ ~~~ ~7G!l
Output Swing vs Load
Resistance
~
I-
Vs=±15V
TA=25°C
-20
-15
125
50
40
o
0
25
50
75
TEMPERATURE (OC)
Input Offset Current vs
Temperature
~
"'
-15
V-
1~
FREQUENCY (Hz)
50
-20V
i--'"
DEVICE WITH NEGATIVE
INPUT CURRENT ~ ~
r-- _
,
so
""05
INPUT CURRENT
r-
-
r-- -DEtCEWI)H POS)IVE- f - -
~OP237
OP227
~
:;
15
~+= 13VTJ +20J
±10V
~
iD 100
~
Input Bias Current Over the
Common Mode Range
Common Mode Limit vs
Temperature
I--"""
o
25°C
I
1
55°C
I
2
3
TIME FROM OUTPUT SHORT TO GROUND (MINUTES)
2-363
OP-227/0P-237
TYPICAL PERFORmAnCE CHARACTERISTICS
OP-237 Small Signal Transient
Response
OP-237 Phase Margin, Gain
Bandwidth Product, Slew Rate
vs Temperature
OP-237 Large Signal Response
-
somv
~
~
:z
70
Vs- ",lSV
CL =100pF
60
; so ~
10V
r--
170
Ir...
II
II
r'\.
140 I:i:
AVisl
10
30
120~ iil
a:
130 ffi ~20
.e. :;;:
i-"
~~AIN
40
-
"
SLEW ~ I--
Maximum Undistorted Output
vs Frequency
OP-227 Gain, Phase Shift vs
Frequency
90
Vs- :lSV
TA=2S0C 100
CL =lOOpF
110
I
~
10
-so
OP-237 Gain, Phase Shift vs
Frequency
1'1
r...
lS
§
AVCL=+SV, Vs=:lSV
CL =lSpF
so
20
-2S
o
m
60
~
TEMPERATURE (OC)
100
1m
OP-227/0P-237
APPLICATions InFoRmATion
Noise Testing
The 0.1 Hz to 1OHz peak-to-peak noise of the OP-227 I
OP-237 is measured in the test circuit shown. The frequency response of this noise tester indicates that the
0.1 Hz corner is defined by only one zero. The test time to
measure 0.1 Hz to 10Hz noise should not exceed 10 seconds, as this time limit acts as an additional zero to
eliminate noise contributions from the frequency band
below 0.1Hz.
Measuring the typical 60nV peak-to-peak noise performance of the OP-22710P-237 requires special test
precautions:
(a) The device should be warmed up for at least five
minutes. As the op amp warms up, its offset voltage
changes typically 3p.V due to its chip temperature increasing 10°C to 20°C from the moment the power
supplies are turned on. In the 10 second measurement interval these temperature-induced effects can
easily exceed tens of nanovolts.
(b) For similar reasons, the device must be well shielded
from air currents to eliminate the possibility of
thermoelectric effects in excess of a few nanovolts,
which would invalidate the measurements.
(c) Sudden motion in the vicinity of the device can also
"feed through" to increase the observed noise.
A noise-voltage density test is recommended when
measuring noise on a large number of units. A 10Hz noise
voltage density measurement will correlate well with a
0.1 Hz to 10Hz peak-to-peak noise reading since both results are determined by the white noise and the location of
the 1If corner frequency.
Current noise is measured in the circuit shown and calculated by the following formula:
.
In=
[e 2no -(130nVif12
1MOx100
Ell
10k
·no
The OP-22710P-237 achieves its low noise, in part, by
operating the input stage at 120pA versus the typical
10pA of most other op amps. Voltage noise is inversely
proportional, while current noise is directly proportional to
the square root of the stage current. Therefore, the OP-227 I
OP-237 current noise will be relatively high. At low frequencies, the low 1If current noise corner frequency ("'" 120Hz)
minimizes current noise to some extent.
0.1 Hz to 1oHz Noise Test Circuit
o.lHz to 10Hz p-p Noise
Tester Frequency Response
100
look!l
100!l
!=
22#
>-..-Nv-.....-I
110k
t---....-"N\r-t
'OEVICE UNDER TEST
NOTE: ALL CAPACITOR VALUES ARE FOR
NON-POLARIZED CAPACITORS ONLY.
-
90
1\1
80
~ 70
SCOPE
x 1 PROBE
RIN=M!l
z
~ 60
50
40
30
0.01
0.1
1.0
10
FREQUENCY (Hz)
100
2-365
OP-227/0P-237
APPLICATions InFoRmATion
In most practical applications, however, current noise
will not limit system performance. This is illustrated in the
total noise versus source resistance plot, where total
noise =[(voltage nOise)2 + (current noise x Rs)2 +
(resistor nOise)2 fl2 .
Three regions can be identified as a function of source
resistance:
(i) Rs s4000-Voltage noise dominates
(ii) 4000 s Rs s 50kO at 1kHz Resistor noise
4000sRs s8kO at 10Hz dominates
(iii) As > 50kO at 1kHz Current noise
Rs >8kO at 10Hz dominates
Clearly the OP-227/0P-237 should not be used in region
(iii), where total system noise is at least six times higher
than the voltage noise of the op amp, i.e., the low voltage
noise specification is completely wasted.
APPLICATions InFoRmATion
OP AMP MATCHING
Advantages of Matched Dual Op Amps
In many applications the performance of a system depends on the matching· between two operational amplifiers rather than the individual characteristics of the two
op amps. Two or three op amp instrumentation amplifiers,
tracking voltage references and low drift active filters are
some of the circuits requiring matching between two op
amps.
The well-known triple op amp configuration illustrates
these concepts. Output offset is a function of the difference between the offsets of the two halves of tl)e
OP-227/0P-237. This error cancellation principle holds
for a considerable number of input referred parameters in
addition to offset voltage and its drift with temperature.
Input bias current will be the average of the two noninverting input currents (IB +). The difference between
these two currents (los +) is the offset current of the instrumentation amplifier. The difference between the inverting input currents (los - ) will cause errors flowing
through R1, R2, and R3. Common mode and power supply rejections will be dependent only on the match between the two amplifiers (assuming perfect resistor
matching).
The concepts of common mode and power supply rejection ratio match (.:lCMRR and dPSRR) are best demonstrated with a numerical example:
Assume CMRRA = + 1.0,N/V or 120dB,
and CMRRB= +0.75p,V/Vor 122.5dB,
then .:lCMRR=0.25p,V/Vor 132dB;
if CMRRB = -0.75p,V/V which is still 122.5dB,
then .:lCMRR=1.75p.V/Vor 115dB.
2-366
Clearly, the OP-227/0P-237, by specifying and guaranteeing all of these matching parameters, can significantly
improve the performance of matching dependent circuits.
Three Op Amp Instrumentation Amplifier
INPUTS
R3
2100
1%
OUTPUT
RB
200
-,-l00pF
R2 . .
lk
1%
R5
1000
1%
GAIN =1000
R7
9.761<
1%
Trim R8 for gain
Trim R9 for DC common mode rejection
Trim R10 for AC common mode rejection
Typical performance of the instrumentation amplifier:
Input offset voltage = 60p.V
Input bias current = ± 15nA
Input offset current = ± 20nA
Input noise = 0.08p.Vp-p
Power bandwidth (Va = ± 10V) =250kHz
OP-227/0P-237
APPLICATions InFoRmATion
Oual Limit Microvolt Comparator
Two Op Amp Instrumentation Amplifier
Rl
10k"
+15V
R4
10k
R5
2200 1
10MQ
5%
R2
lk
3550
1%
lk
5%
UPPER
LIMIT
OUTPUT
,,-[---------_
......
"TRIM FOR COMMON MODE REJECTION
trRIM FOR GAIN
INPUT
GAIN=M [1 +.1 (~+M) + R2+R3] 100
R3
2R1R4
R5
=
LOWER
LIMIT
Strain Gauge Signal Conditioner with Bridge Excitation
REFERENCE OUT
TO MONITORING
AI DCONVERTER
r
3500 BRIDGE
..,
I
~:"'--_-OVT01OVOUT
I
-I
340k"
301k"
Uk"
10k
ZERO
"RN60C FILM RESISTORS
-15V
2-367
OP-227/0P-237
SCHEmATIC DIAGRAm
1 (8)
NULL
2 (9)
NULL
r---~-I-----f-1--p--t-----t"---t------t--"""-""-,,,,,-o'4(7)
V+
750,.11
250,.11
Cl
4 Ill)
nf-+-..........-+---IF-=-r
31 10)D....-
........- F - - - - + - - - - -...
INVERTING
INPUT(-)
240,.11
Cl = 120pf fOR OP227
Cl =15pf fOR OP237
PACKAGE DESCRIPTion Dimensions in inches (millimeters) unless otherwise noted.
0160
14-Lead Cavity DIP (J)
0200
(4064) (SOBO)
MAX
MAX
LL~~~~a
(~~~~)
MAA
t--
~(~97~)~
MAA
GlASS
14
13
12
11
10
98
0291
(7391)~
MAX
(0.635)
~~~'-~-r~rr~~~~
OP-227EJ OP-237EJ
0P-227GJ OP-237GJ
OP-227AJ OP-237AJ
OP-227CJ OP-237CJ
14-Lead Molded DIP (N)
PLSI-I t::
Llf-I-II-+--------."
7' TYPl2
~ (~:)
(3175)
MIN
t
2-368
MIN
(4-----(109~;;B)----+(
MAX
SECTion 3-VOLTAGE REFEREnCES
Ell
3-1
INDEX
SECTION 3-VOLTAGE REFERENCES
INDEX .................................................................................................... .
SELECTlDN GUIDE ...
PROPRIETARY PRODUCTS
LTZ1 000, Ultra Precisian Reference . ............................................................................ .
LTZ1000A, Ultra Precisian Reference . ........................................................................... .
LTl004, MicrapawerValtageReference...........................................................................
LTl004CS8-1.2ILT1004CS8-2.5, Micrapawer Voltage References. . . . . . . . . . . . . . . . . . . . . . .
.......................
LTl009Series, 2.5 Volt Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1009S8, 2.5 Volt Reference. . . . . . . . . . . . . . . . . . . . . . .. . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTl019, Precisian Reference ...................................................................................
LT1021, Precisian Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . .
LTl021 DCS8, Precisian Reference ..............................................................................
LTl027, Precisian5VReference ................................................................................
LTl029, 5V8andgapReference.................................................................................
LTl031, Precisian 10V Reference .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . .
LTl034-1.2ILTl034-2.5, Micrapawer Dual Reference. . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTl034CS8-1.2ILT1034CS8-2.5, Micrapawer Dual Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1431, PragrammableReference..... ...................... . ... ......... ....... ..... .. ... ......... . . .... . . ... ..
ENHANCED AND SECOND SOURCE PRODUCTS
lH0070, Precisian 10V Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
lM129/lM329, 6.9V Precision Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
lM 134 Series, Constant Current Source and Temperature Sensor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
lM334S8, Constant Current Source and Temperature Sensor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
lMI36-2.5/lM336-2.5,2.5VoltReference .......................................................................
lM185-1.2/lM385-1.2, MicropowerVoltage Reference ......................................... .
lM185-2.5/lM385-2.5, MicropowerVoltage Reference... ... .. .... ... . .... . ...... ... . . .. . . . .. . ...
lM 385S8-1. 2/ lM 385S8-2.5, Micropower Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
lM 199/lM399/lM 199A1lM399A, Precision Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT580, Precision Reference . .................................................................................. .
LT581, Precisian Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
REF-Ol/REF-02, Precision Voltage References .....................................................................
3-2
3-2
3-3
3-9
3-9
3-17
3-25
3-27
3-31
3-33
3-41
3-57
13-8
3-61
3-65
3-77
3-81
13-72
3-65
3-83
3-87
3-99
3-101
3-105
3-109
3-113
3-115
3-121
3-121
3-125
~"""LlnlAQ
VOLTAGE REFERENCE SELECTION GUIDE
~, T~H~L~Y-------------------------miLITARY
-SS'Clo + 12S'C
VOLTAGE
Vz
(VOLTS)
1.235
2.S
4.S
5.0
6.9
6.95
7.0
10.0
VOLTAGE
TOLERANCE
MAXIMUM
TA =2S'C
±0.32%
±1%
±1%
DEVICE
LT1004M·1.2
LM1BS·1.2
LT1034BM·1.2
TEMPERATURE DRIFT,
ppm/'C OR mV CHANGE
20ppm (typ)
20ppm (typ)
20ppm(max)
±1%
LT1034M·1.2
±O.S%
±0.2%
±0.2%
±2%
±1%
±1.5%
±1%
±0.4%
±0.4%
±0.2%
±0.2%
±1%
±0.05%
±1%
±0.2%
±1%
±0.3%
±0.5%
±3%
±3%
±3%
±2%
LT1004M·2.S
LT1009M
LT1019M·2.S
LMI36-2.5
LMI36A·2.S
LM1B5-2.5
LTS80S
LT580T
LT5B0U
LT1019M-4.5
LT1019M·S
LT1021BM·5
LT1021CM·5
LT1021DM·5
LT1029AM
LT1029M
REF02A
REF02
LMI29A
LMI29B
LM129C
LM199A
±2%
LMI99
±0.7%
±0.7%
±0.2%
±0.5%
±0.05%
±0.5%
±O.OS%
±0.1%
±0.2%
±0.3%
±0.1%
±O.OS%
±0.1%
±0.1%
±0.3%
±o.S%
OPERATING
CURRENT RANGE
(OR SUPPLY CURRENT)
10~A t020mA
10~A t020mA
MAXIMUM
DYNAMIC
IMPEDANCE
20~t020mA
1.S
1.S
I.S
40ppm(max)
20~A t020mA
I.S
20~A t020mA
400~tol0mA
SOO~A to 10mA
I.S
1.0
N/A
1.0
1.0
1.S
N/A
N/A
N/A
N/A
N/A
0.1
0.1
0.1
0.6
0.6
N/A
N/A
0.8 (typ)
0.8 (typ)
0.8 (typ)
1.0
500~A to 10mA
1.0
Ultra Low Drift
LT1021BM·7
20ppm (typ)
lBmV(max)
2Sppm(max)
18mV(max)
lBmV(max)
20ppm(typ)
55ppm(max)
2Sppm(max)
10ppm (max)
2Sppm(max)
25ppm (max)
5ppm(max)
20ppm(max)
20ppm(max)
20ppm(max)
4Oppm(max)
8.5ppm (max)
25ppm(max)
10ppm(max)
2Oppm(max)
5Oppm(max)
0.5ppm (max) - 55'C to +B5'C
10ppm(max)+8S'Cto +125'C
1ppm (max) - 55'C to +85'C
15ppm (max) +85'C to +125'C
5ppm(max)
MAJOR FEATURE
Micropower
Micropower
Low TC Micropower with
7V Aux. Reference
LowTC Micropower with
7V Aux. Reference
Micropower
Precision
Precision Bandgap
General Purpose
General Purpose
Mlcropower
3Terminal Low Drift
3Terminal Low Drift
3Terminal Low Drift
Precision Bandgap
Precision Bandgap
Very Low Drill
Very Tight Inital Tolerance
Low Cost, High Performance
Precision Bandgap
Precision Bandgap
Precision Bandgap
Precision Bandgap
Low Drift
Low Drift
Low Cost
Ultra Low Drift
1.0mA
0.2
LT1021DM·7
LT1019M·l0
LT1021BM·l0
LT1021CM·l0
LT1021DM·l0
LT1031BM
LT1031CM
LT1031DM
LT5B1J
LT5BtT
LHOO70·2
LH0070·1
LH0070-0
REF01A
REFOI
20ppm(max)
25ppm(max)
5ppm (max)
20ppm(max)
2Oppm(max)
Sppm(max)
15ppm (max)
25ppm(max)
30ppm(max)
15ppm(max)
6.7ppm(max)
17ppm(max)
33ppm (max)
B.5ppm (max)
25ppm (max)
1.0mA
1.2mA
1.7mA
1.7mA
1.7mA
1.7mA
1.7mA
1.7mA
1.0mA
1.0mA
5.0mA
5.0mA
5.0mA
1.4mA
1.4mA
0.2
N/A
0.25
0.25
0.25
0.25
0.25
0.25
N/A
N/A
0.6
0.6
0.6
N/A
N/A
Low DrifUNoise, Exc.
Stability
Low Cost, High Performance
Precision Bandgap
Very Low Drift
Very Tight Initial Tolerance
Low Cost, High Performance
Very Low Drift
Very Tight Initial Tolerance
Low Cost, High Performance
3Terminal Low Drift
3Terminal Low Drill
Low Drill
Good Initial Tolerance
Low Cost, High Performance
Precision Bandgap
Precision Bandgap
1.2mA
400~A to 10mA
400~A to lOrnA
20~t020mA
1.5mA
1.5mA
1.5mA
1.2mA
1.2mA
1.2mA
1.2mA
1.2mA
700~A to 10mA
700~tol0mA
1.4mA
lAmA
600~A to 15mA
600~A to
15mA
600~A to 15mA
(D)
3-3
VOLTAGE REFERENCE SELECTION GUIDE
commERCIAL
O'Cto +70'C
VOLTAGE
Vz
(VOLTS)
1.235
2.5
4.5
5.0
6.9
6.95
7.0
10.0
VOLTAGE
TOLERANCE
MAXIMUM
TA =25'C
±0.32%
±0.32%
±1%
DEVICE
LT1004C-1.2
LT1004CSS·1.2
LT1034BC·1.2
10~to20mA
10~At020mA
20~A to20mA
MAXIMUM
DYNAMIC
IMPEDANCE
(0)
1.5
1.5
1.5
±1%
LT1034C-1.2
40ppm(max)
2O~to20mA
1.5
±2%
±1%
±0.5%
±0.8%
±0.2%
±2.5%
±0.2%
±4%
±2%
±3%
±1.5%
±3%
±1%
±0.4%
±0.4%
±0.2%
±0.2%
±1%
±0.05%
±1%
±1%
±0.2%
±1%
±0.3%
±0.5%
±1%
±2%
±3%
±5%
±5%
±5%
±4%
LM385·1.2
LM385B·1.2
LT1004C-2.5
LT1004CS8-2.5
LT1009C
LT1009S8
LT1019C-2.5
LM336-2.5
LM336B·2.5
LM385-2.5
LM365B-2.5
LT580J
LT580K
LT580L
LT580M
LT1019C·4.5
LT1019C·5
LT1021 BC·5
LT1021CC·5
LT1021DC-5
LT1021CS8
LT1029AC
LT1029C
REF02E
REF02H
REF02C
REF02D
LM329A
LM329B
LM329C
LM329D
LTZ1000
20ppm(typ)
20ppm(typ)
2Oppm(typ)
20ppm(typ)
6mV(max)
25ppm(max)
20ppm(max)
SmV(max)
6mV(max)
20ppm(typ)
20ppm(typ)
85 (max)
40 (max)
25 (max)
10 (max)
20ppm(max)
20ppm(max)
5ppm(max)
20ppm(max)
20ppm(max)
20ppm(max)
20ppm(max)
34ppm(max)
8.5ppm (max)
25ppm(max)
65ppm(max)
250ppm (max)
10ppm(max)
20ppm(max)
50ppm(max)
l00ppm (max)
O.lppml'C
15~t020mA
15~t020mA
1.5
1.5
1.5
1.5
1.4
0.6
NIA
1.4
1.4
1.5
1.5
NIA
NIA
NIA
N/A
NIA
NIA
0.1
0.1
0.1
0.1
O.S
0.6
NIA
NIA
NIA
NIA
1.0 (typ)
1.0 (typ)
1.0 (typ)
1.0 (typ)
20.0
±5%
±5%
±0.7%
LM399
LM399A
LT1021BC·7
2ppm(max)
lppm(max)
5ppm(max)
500~A to
500~A to
1.0mA
1.5
1.5
0.2
±0.7%
±0.2%
±0.5%
±0.05%
±O.5%
±0.5%
±0.1%
±0.2%
±0.3%
±0.1%
±0.3%
±0.5%
±1%
LT1021DC·7
LT1019C·l0
LT1021 BC·l0
LT1021CC-l0
LT1021DC-l0
LT1031BC
LT1031CC
LT1031DC
LT581J
LT581K
REFOIE
REF01H
REFOIC
20ppm(max)
20ppm(max)
5ppm(max)
20ppm (max)
20ppm(max)
5ppm(max)
15ppm(max)
25ppm(max)
30ppm(max)
15ppm(max)
8.5ppm (max)
25ppm (max)
65ppm (max)
1.0mA
1.2mA
1.7mA
1.7mA
1.7mA
1.7mA
1.7mA
1.7mA
1.0mA
1.0mA
l.4mA
1.4mA
1.6mA
0.2
NIA
0.25
0.25
0.25
0.25
0.25
0.25
NIA
NIA
NIA
NIA
NIA
• LTZ1000 requires external control and biasing circuits.
3-4
TEMPERATURE DRIFT,
ppm/'C OR mV CHANGE
2Oppm(typ)
20ppm(typ)
2Oppm(max)
OPERATING
CURRENT RANGE
(OR SUPPLY CURRENT)
2O~t020mA
2O~t030mA
4OO~A to 10mA
400~A to 20mA
1.2mA
4OO~tol0mA
4OO~tol0mA
2O~t020mA
2O~t020mA
1.5mA
1.5mA
1.5mA
1.5mA
1.2mA
1.2mA
1.2mA
1.2mA
1.2mA
1.2mA
700~tol0mA
700~tol0mA
l.4mA
1.4mA
1.6mA
2.0mA
600~toI5mA
600~to15mA
600~toI5mA
600~toI5mA
4mA
lOrnA
lOrnA
MAJOR FEATURE
Micropower
Micropower
Low TC Micropower with
7V Aux. Reference
Low TC Micropower with
7V Aux. Reference
Micropower
Micropower
Micropower
Micropower
Precision
Precision
Precision Bandgap
General Purpose
General Purpose
Micropower
Micropower
3Terminal Low Drift
3Terminal Low Drift
3Terminal Low Drift
3Terminal Low Drift
Precision Bandgap
Precision Bandgap
Very Low Drift
Very Tight Inltal Tolerance
Low Cost, High Performance
Low Cost, High Performance
Precision Bandgap
Precision Bandgap
Precision Bandgap
Precision Bandgap
Precision Bandgap
Bandgap
Low Drift
Low Drift
General Purpose
General Purpose
Ultra Low Drift,
2ppm Long Term Stability'
Ultra Low Drift
Ultra Low Drift
Low Drift/Noise, Exc.
Stability
Low Cost, High Performance
Precision Bandgap
Very Low Drift
Very Tight Initial Tolerance
Low Cost, High Performance
Very Low Drift
Very Tight Initial Tolerance
Low Cost, High Performance
3Terminal Low Drift
3Terminal Low Drift
Precision Bandgap
Precision Bandgap
Precision Bandgap
VOLTAGE REFERENCE SELECTION GUIDE
LT580
TO-52
0·,.,
INPUT
GROUND
- FEATUAES-
- mini DESCRIPTIOn -
• 2.SV Output
• Direct Replacement for
Analog Devices
• Selected Parts with
10ppm/oCTC
• Low Quiescent Current
Alternate source for industry
standard 2.SV 3terminal
reference.
BOTTOM VIEW
LT581
TO-5
INPUT
w,mM
- FEATURES-
- mini DESCRIPTIOn -
• 10VOutput
• Direct Replacement for
Analog Devices
• Low Quiescent Current
Alternate source for industry
standard 10V 3·terminal
reference.
•
GROUND
BOTTOM VIEW
LM129/329
10-46
·j~,~W
LM199A/199
LM399A/399
BlOCK DIAGRAM
10·46
D3-:~'
+~4-
695\1
_
4
LTl004
LM185/385
-
2
2
3
+
TOP VIEW
8
TO-46
SMAlLouruNE
~
:~;m:NC
~NC3
6
4
5 NC (DO NOT
USE!
- FEATURES-
- mini DESCRIPTIOn -
• Low Noise
• Low Cost
• Max Temperature Drift
Selections 10, 20, SO and
l00ppm/oC
• Wide Operating Current
Range
Subsurface zener reference with
wide operating current range
from 600~A to lSmA. Similar to
LM199/399 without stabilizing
heater on the die.
- FEATURES-
- mini DESCRIPTIOn -
• Ultra Low Drift
• Very Low Noise
• Wide Operating Current
Range
• Provided with Thermal
Shield
• Excellent Long Term
Stability
• Low Hysteresis
• Guaranteed Long Term
Stability Available
An on board stabilizing heater
keeps the die at constant
temperature. Reference is a low
noise subsurface zener. Excel·
lent long term stability.
- FEATURES-
- mini DESCRIPTion -
•
•
•
•
Bandgap reference with oper·
ating current range as low as
1O~A. Low noise and good long
term stability.
Micropower
1.235V and 2.SV Available
Low Dynamic Impedance
Wide Operating Current
Range
• Very Tight Tolerance
BOTTOM 'JEW
3-5
VOLTAGE REFERENCE SELECTION GUIDE
LTl009
LM136/336
- FEATUAES-
- m.... DESCRIPTIOR -
• No Adjustment Needed on
General purpose reference
using bandgap circuit. Low cost,
medium performance.
LT1009
SMALL OUTLINE
NClm'
NC 2
NC3
7NC
6
4
5AOJ PIN
BOTTOMVlEW
LTlO19
TO-5
NC'
,"
VIN
2
7
T~~:
3
6
VOUT
5 TRIM
GND
4
5
TRIM
P\.ASTlCDIP
6 VOUT
··o~
NC'
GND
TOP VIEW
TOP VIEW
'00 NOT CONfECT EXTERNAl CIRCUITRY TO TI£SE PWS
LTl021
TI}S
PLASTIC DIP
NC'
7
NC'
'V,,,N
C O7 ' NC'
2
NC'
a VOUT
"fIG
3
6
VOUT
5 TRIMh GNO
4
5
TRIM"
GND
TOP VIEW
TOP VIEW
SMALL OUTLINE
HC"O'NC'
3-6
Y,N 2
7 NC'
NC' 3
GND4
6VOUT
5 TRIM"
• 00 MOT cotH.CT eXTERNAL ClRClKTRY TO THESE PINS
•• NO T~ Pt4 ON LT1021·7 DO NOT CONNECT
EXTERNAL C1RClITRY TO PIN 5 ON LTI021 7
• Temperature Coefficient or
Voltage Easily Adjusted on
LM136
• Wide Operating Current
Range
• Low Cost
• 2.5V
• Very Tight Tolerance
- FEATURES-
- mlRI DESCRIPTIOR -
• 2.5V, 4.5V, 5Vand 10V
Versions
• Plug·ln Replacement for
Many Devices
• Series or Shunt Operation
• Low Drift-3ppm/ OCTyp.
• 100% Noise Tested
• Optional Chip Heater Can
Be Used for Lower Drift
• Temperature Output
Curvature corrected bandgap
design for very low drift and
tight initial tolerance. Replaces
and upgrades REF01, REF02,
MC14XX and other popular
series type references.
- FEATURES-
- mlRI DESCRIPTIOR -
•
•
•
•
Trimmed voltage reference with
ultra low drift. Reference is a
low noise subsurface zener.
Available in 5V, 7Vand 10V
versions. The 7V and 10V ver·
sions can be used as 2·terminal
shunt regulators as well as
series references.
Ultra Low Drift
Trimmed Output Voltage
Very Low Noise
Operates in Series or Shunt
Mode
• Replaces REF01, REF02,
LM368, MCI400 and MCI404
with Improved Stability,
Noise and Drift
VOLTAGE REFERENCE SELECTION GUIDE
LTlO29
TO-46
't ~ riJ
TO-92
BOTTOM VIEW
LTlO31/LHOO70
TO-5
INPUT
0",,",
GROUND
LTlO34
TO·46
~'"""'
TO-92
+
12VI25~)
P12V125V~
1\
BOTTOM VIEW
REFOl/REF02
TO·5
NCS
NC· I
VIN 2
TEMP 3
DUT-
PlASTIC DIP
'''''0<
6VOlJT
5 TRIM
4
- mini DESCRIPTion Precision 3terminal shunt SV
bandgap reference. Very low
drift and tight initial output
tolerance.
- FEATURES-
- mini DESCRIPTion -
•
•
•
•
•
Very low tempco is achieved
without chip heater. The LT103l
can replace the AD581 with
better specifications.
•
•
BOTTOM VIEW
+
- FEATURES• 0.2% Output Tolerance
• O.OSO Shunt Impedance
• 700~A to 10mA Operating
Current
• Pin Compatible with
LM136-5
• 20ppm/oC Max. Drift Output
Voltage Trim does not Affect
Drift
• Can be Used as Positive or
Negative Reference
VIN
'2
7
oTJT~~
3
6
VOUT
GND
4
5
TRIM
NC*
10VOutput
Ultra Low Drift
Very Low Noise
Trimmed Output Voltage
Operates in Series or Shunt
Mode
Pin Compatible with AD581
LHOO70 is aDirect
Replacement for NSC
LHOO70
- FEATURES-
- mini DESCRIPTion -
• 1.2V and 2.S Versions
• Guaranteed Drift of
20ppm/oC and 40ppm/oC
1.2V and 7V Reference
1.2V Reference Operates
20~A t020mA
• 1%Tolerance on 1.2V
Reference
• 7V Reference Operates
1OO~A to 20mA
• Compatible with the LM385
and LT1004
The LT1034 is a bandgap 1.2V or
2.5V reference with low operat·
ing current and low temperature
coefficient, combined with a7V
subsurface zener reference on
the same chip.
•
•
- FEATURES-
- mini DESCRIPTion -
• Direct Replacement for PMI
Devices
• Low Drift
• High Line Rejection
• Low Supply Current
• Temperature Output on
REF02
Industry standard 5V and 10V
bandgap voltage references.
Ell
GNO
TOP VIEW
rOPVIEW
·00 I«)T CONNECT EXTERNAL CllCUITRY TO H£SE PN)
*"REF02QNlV
3-7
NOTES
3-8
~"""-Lln'll'\Q
LTZ1000/LTZlOOOA
~~
T8CHNOLOG~~~~-----U-ltr-a-P-r-ec-i-si-o-n-R-e-fe-r-e-n-ce-
FEATURES
DESCRIPTion
•
•
•
•
•
The LTZ1000 and LTZ1000A are ultra stable temperature
controllable references. They are designed to provide 7V
outputs with temperature drifts of O.05ppm/oC, about
1.2p.Vp-p of noise and long term stabilities of 2p.V per
month.
1.2/Np-p Noise
2p.V Long Term Stability
Very Low Hysteresis
O.05ppm/oC Drift
Temperature Stabilized
Included on the chip is a subsurface zener reference,
heater resistor for temperature stabilization, and a temperature senSing transistor. External circuitry is used to
set operating currents and to temperature stabilize the
reference. This allows maximum flexibility and best long
term stabi lity and noise.
APPLICATions
•
•
•
•
•
Voltmeters
Calibrators
Standard Cells
Scales
Low Noise RF Oscillators
The LTZ1000 and LTZ1000A references can provide superior performance to older references such as the LM199 at
the expense of increased circuit complexity and thermal
layout considerations. The LTZ1000 is packaged in a
standard TO-99 package while the LTZ1000A utilizes a
proprietary high thermal resistance die attach which
eases thermally insulating the reference.
TYPICAL APPLICATiOn
Low Noise Reference
lJZ1000
Long Term Stability
VIN '" 10V
r--'
.----H----+-.......
I
I
-OUTPUT
30k
I
1N4148
I
I
L_,
120
I
-2 ' - - - - - - ' - - - - ' - - - - - - - '
o
10
30
20
DAYS
LONG TERM STABILITY OF A TYPICAL DEVICE FROM TIME=O
WITH NO PRECONDITIONING OR AGING
3-9
II
LTZ1000/LTZ1000A
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Heater to Substrate ................................. 35V
Collector Emitter Breakdown Q1 ..................... 15V
Collector Emitter Breakdown Q2 ..................... 35V
Emitter Base Reverse Bias ............................ 2V
Operating Temperature Range ....... - 55°C~TA ~ 125°C
Storage Temperature Range ......... -65°C~TA~150°C
Substrate Forward Bias ............................. O.1V
ORDER
PART NUMBER
BonOM VltW
LTZ1000
LTZ1000A
4
PREconDITiOninG
HB PACKAGE
METAL CAN
150°C Burn-In
ELECTRICAL CHARACTERISTICS (Note 1)
PARAMETER
Zener Voltage
Zener Change with Current
Zener Leakage Current
Zener Noise
Heater Resistance
Heater Breakdown Voltage
Transistor 01 Breakdown
Transistor 02 Breakdown
01, 02 Current Gain
Thermal Resistance
Long Term Stability
CONDITIONS
Iz=5mA, (Vz+ VBE01) 101 = 100,.A
Iz= 1 rnA, (Vz+ VBE01) 101 = 100,.A
1mAslz<5mA
Vz=5V
Iz= 5mA, 0.1Hz
ffi
'"
./
V
75
LTZ1000A _
I--"'r~
.-H-r
25 35 45 55 65 75 85 95 105 115 125
OlE TEMPERATURE ABOVE AMBIENT (OC)
it!
50
is
25
r--ILb\~~
lIIiII
IIIIII
r-
!;;:
V
20
30
40
TIME (SECONDS)
50
60
Die Temperature Rise vs Time
0.8
0.6
II
Zener Noise
Zener Voltage Noise Spectrum
!!~ll.
~mTEi
If
irrilit
V
7W
HEATER POWER=O.5W
l-
~w
w
25
r-
o 1.01
10
100
TIME (SECONDS)
1000
I
l-
a
0.1
I"
.-::
.....
Hriilmrrmm
10
100
TIME (SECONDS)
1000
3-11
LTZ1000/LTZ1000A
APPLICATion HinTS
LTZ1000 and LTZ1000A are capable of providing ultimate
voltage reference performance. Temperature drifts of better than O.03ppm/oC and long term stability on the order of
1p.V per month can be achieved. Noise of about O.15ppm
can also be obtained. This performance is at the expense
of circuit complexity, since external influences can easily
cause output voltage shifts of more than 1ppm.
Thermocouple effects are one of the worst problems and
can give apparent drifts of many ppm/oC as well as cause
low frequency noise. The kovar input leads of the TO-5
package form thermocouples when connected to copper
PC boards. These thermocouples generate outputs of
35p.V/oC. It is mandatory to keep the zener and transistor
leads at the same temperature, otherwise 1to 5ppm shifts
in the output voltage can easily be expected from these
thermocouples.
Air currents blowing across the leads can also cause
small temperature variations, especially since the package is heated. This will look like 1 to 5ppm of low frequency noise occurring over a several minute period. For
best results, the device should be located in an enclosed
area and well shielded from air currents.
Certainly, any temperature gradient externally generated,
say from a power supply, should not appear across the
critical circuitry. The leads to the transistor and zener
should be connected to equal size PC traces to equalize
the heat loss and maintain them at similar temperatures.
The bottom portion of the PC board should be shielded
against air currents as well.
Resistors, as well as having resistance temperature coefficients, can generate thermocouple effects. Some types of
resistors can generate hundreds of microvolts of thermocouple voltage. These thermocouple effects in the resistor
can also interfere with the output voltage. Wire wound resistors usually have the lowest thermocouple voltage,
while tin oxide type resistors have very high thermocouple
voltage. Film resistors, especially Vishay preCision film resistors, can have low thermocouple voltage.
3-12
Ordinary breadboarding techniques are not good enough
to give stable output voltage with the LTZ1000 family devices. For breadboarding, it is suggested that a small
printed circuit board be made up using the reference, the
amplifier, and wire wound resistors. Care must be taken to
ensure that heater current does not flow through the same
ground lead as the negative side of the reference (emitter
of Q1). Current changes in the heater could add to or subtract from the reference voltage causing errors with temperature. Single point grounding using low resistance
wiring is suggested.
Setting Control Temperature
The emitter-base voltage of the control transistor sets the
stabilization temperature for the LTZ1000. With the values
given in the applications, temperature is normally 60°C.
Production variations in emitter-base voltage will typically
cause about ± 10°C variation. Since the emitter-base voltage changes about 2mV/oC and is very predictable, other
temperatures are easily set.
The lowest temperature consistent with the operating
environment should be used. Higher temperatures accelerate aging and decrease long term stability. The
LTZ1000A should be set about WC higher than the
LTZ1000. This is because normal operating power dissipation in the LTZ1000A causes a temperature rise of about
WC. Of course both types of devices should be insulated
from ambient. Several minutes of warm-up is usual.
For applications not requiring the extreme precision or the
low noise of the LTZ1000, Linear Technology makes a
broad line of voltage references. Devices like the LT1021
can provide drifts as low as 2ppm/oC and devices such as
the LM399A can provide drifts of 1ppm/oC. Only applications requiring the very low noise or low drift with time of
the LTZ1000 should use this device. Application help is
available from Linear Technology.
LTZ1000/LTZ1000A
TYPICAL APPLICATions
Negative Voltage Reference
. . . - - - - - - - - - - Z E N E R + SENSE
...------------------t-------1~----V+15V
...---~r_----------------_.----_.--.__.--+_----_1~--_r-----GND
R2
70k
R5
1k
1N414B
R1
120
""_""_+-",,__+ __,,,,,
1...-_ _
'PROVIDE TEMPERATURE COMPENSATION. DELETE FDR LTZ1000A.
APPROXIMATE CHANGE IN REFERENCE VOlTAGE FOR A 100ppm CHANGE IN
RESISTOR VALUES:
100ppm = L'>R(Il)
L'>VZ
R1
0.01211
1ppm
R2
711
0.3ppm
R3
711
O.2ppm
R4/R5 RATIO
L'>R=O.01%
1ppm
BOTH A1 AND A2 CONTRIBUTE LESS THAN 2~V OF OUTPUT DRIFT OVER A 50"C RANGE.
Averaging Reference Voltages for Lower Noise and Better Stability
V~~~
__- ._ _ _ _ _ _ _ _ _ _- . _
1.6k
1.6k
3011'
3011'
II
ZENER- FORCE
I...----+---ZENER- SENSE
V- .. 10V
Improving Supply Rejection
VIN .....1"'.5.,.,k......_ _ _p-_ VOUT1
15V
SUPPLY REJECTION
AT Voun=2OmVIV
5011
VOUT2 SUPPLY REJECTION AT
VOUT2 = 3mV IV
'Rlil" Ie
q
3-13
LTZ1000/LTZ1000A
TYPICAL APPLICATions
Adjusting Temperature Coefficient in Unstabilized Applications
15V
r--.. .
lMIN
nr*
----t---t--VOUT+
lN4148
1 MIN
120
'PULSE HEATER ON AND OFF TO HEAT AND COOL THE
REFERENCE. ADJUST Rl FOR MINIMUM VOLTAGE
CHANGE THROUGH A TEMPERATURE CYCLE.
7V Positive Reference Circuit
r--------------~i~~~+
r--------------------t--------~~-----~:
R3
70k
R2
70k
lN4148
1M
t-_______0_.l_~_F_'-~~4~00~k.~---~~--~---L----~~~Ji--+------~~~R5
lk
Rl
120
GROUND
L - - -_ _- - -_ _- - -....- - - -.....------!r--------ZENER-
FORCE
lN4148
HEATER
L-_ _ _ _ _ _ _ _ _ _ _ _~---------------~-----R~URN
(TIED TO
GROUND)
'PROVIDES TC COMPENSATION, DEL~E FOR LTZ1000A.
APPROXIMATE CHANGE IN REFERENCE VOLTAGE FOR A 100ppm (0.01%) CHANGE IN
RESISTOR VALUES:
6R([J)
6Vz
Rl
0.0120
lppm
R2
7[J
0.3ppm
R3
7[J
0.2ppm
R4/R5 RATIO
6R=0.01%
lppm
BOTH Al AND A2 CONTRIBUTE LESS THAN 2~V OF OUTPUT DRIFT OVER A 50'C RANGE.
3-14
LTZ1000/LTZ1000A
aLOCK DIAGRAm
5
r
..,
I
I
I
I
I
I
I
I
I
I
L
Q1
I
I
I
I
..J
7
·SUBSTRATE DIODES-OO NOT FORWARD BIAS
PACKAGE DESCRIPTion
Dimensions in inches (millimeters) unless otherwise noted.
H8Package
Metal Can
0.040
(1.016)
MAX
1f
[
(~~;~D~} ;~~)0.305 - 0.335
(7 747-8 509)~1
~+---:C-:00""50;---------'-.
(1.270)
L
t
!
t__
SEATING _ _ _
PLANE
t
- -
00 0 O~
0.010-0.045
0 165-0 185
(4 191 4699)
!
t
REFERENCE
--->--G-AU-GE--+'--PLANE
---r-PLANE 0.500-0.750
M~X
II
T
(1270;1905)
A - --450fv~n?7_nn X~ ~
(0.254-1.143)
0016-0021
(0 406Ty ; 533)
/,:::::,"'" 'L:l'
..
~----++o
0
6
I
o 50_4-',j0~<--_--'._
0.110-0.160
(2.794-4064)
INSULATING
STANOOFF
NOTE: LEAD DIAMETER IS UNCONTROLLED BETWEEN
THE REFERENCE PLANE AND SEATING PLANE.
H8l88
3-15
NOTES
3-16
~~~~~~~--------M--ic-ro-p-o-w-e-r-v-~-~~-~-~-:
References
FEATURES
DESCRIPTion
•
•
•
•
•
•
The lT1004 Micropower Voltage References are two
terminal bandgap reference diodes designed to provide high accuracy and excellent temperature characteristics at very low operating currents. Optimization
of the key parameters in the design, processing and
testing of the device results in accuracy specifications
previously attainable only with selected units. Below
is a distribution plot of reference voltage for a typical
lot of lT1004-1.2. Virtually all of the units fall well
within the prescribed limits of ± 4mV.
Guaranteed ± 4mV initial accuracy lT1004-1.2
Guaranteed ±20mV accuracy lT1004-2.5
Guaranteed 10ILA operating current
Guaranteed temperature performance
Operates up to 20mA
Very low dynamic impedance
APPLICATions
•
•
•
•
Portable meter references
Portable test instruments
Battery operated systems
Current loop instrumentation
The lT1004 is a pin for pin replacement for the
lM185/385 series of references with improved accuracy specifications. More important, the lT1004 is an
attractive device for use in systems where accuracy
was previously obtained at the expense of power consumption and trimming.
For a low drift micropower reference with guaranteed
temperature coeffiCient, see the LT1034 data sheet.
Micropower Cold Junction Compensation For Thermocouples
lOOk
3V
LITHIUM
•~ R,
200 r-T--r--;;;;O;;;;;-'---"--r-T--'--'
-=-
+
LT 1004·1.2
K
T
S
R,
300k
2.1M
t--i~"""'f-"1----t--~r-t----j---j
120
r---t"~
100
J-+~
60~--+~47~r;-T-T~
40
+
233k
299k
f--I---+--+-+---l---i- i~~ ~~~6S
160
80~~~~+-r;-T
186
J
180
140 J---I~~""""'-t---+---r-t--+---j
1684
THERMOCOUPLE
TYPE
Typical Distribution of
Reference Voltage (LT1 004-1.2)
1-4-+~
20~~"""
• QUIESCENT CURRENT", 15"A
t YELLOW SPRINGS INSI CO.
PART #44007
COMPENSATES WITHIN
± 1"C FROM D"C TO 6D"C
3-17
~
~
LT1004
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Reverse Breakdown Current. . . . . . . . . . . . . .. 30mA
Forward Current ........................ 10mA
Operating Temperature Range
LT1004M .................. -55°C to 125°C
LT1004C ...................... O°C to 70°C
Storage Temperature Range
LT1004M .................. -65°C to 150°C
LT1004C .................. -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
BOTTOM VIEW
(3
LT1004MH
LT1004CH
HPAOOGE
T()'46 METAL CAN
BOTTOMVEW
~
LT1004CZ
ZPACKAGE
TO·92 PLASTIC
ELECTRICAL CHARACTERISTICS (See note 1)
lTlOO4-2.5
lTlOO4·1.2
SYMBOL
Vz
PARAMETER
Reverse Breakdown Voltage
CONDITIONS
IR = 100ltA
LT1004M -55°C.;; TA .;; 125°C
LT1004M/C O°C .;; TA .;; 70°C
j,Vz
j, Temp
Average Temperature Coefficient
Iml n .;; IR .;; 20mA (Note 2)
'min
Minimum Operating Current
~
Reverse Breakdown Voltage
Change with Current
j,IR
Imin .;; IR.;; lmA
lmA .;; IR .;; 20mA
rz
Reverse Dynamic Impedance
IR = 100ltA
en
Wide Band Noise (RMS)
IR = lOOItA
10Hz.;; f .;; 10kHz
Long Term Stability
IR = 100ltA
TA = 25°C ± O.l°C
~
j, Time
The. denotes the specifications which apply over the full operating
temperature range.
Nota 1: All specifications are for TA = 25°C unless otherwise noted.
Note 2: Selected devices with guaranteed maximum temperature
coefficient are available upon request.
3-18
••
•
•
•
•
MIN
1.231
1.220
1.225
TYP
1.235
1.230
1.235
MAX
1.239
1.245
1.245
20
8
0.2
MIN
2.480
2.460
2.470
TYP
2.500
2.500
2.500
MAX
2.520
2.535
2.530
20
10
1
1.5
10
20
0.6
1.5
12
0.2
60
120
20
20
20
1
1.5
10
20
0.6
1.5
UNITS
V
V
V
ppm/oC
itA
mV
mV
mV
mV
{!
{!
ltV
ppm/kHr
LT1004
TYPICAL PERFORmAnCE CHARACTERISTICS 1.2 VOLT
Reverse Characteristics
Reverse Voltage Change
Forward Characteristics
100
-55°C TO
+ 125°C
;;:-
12
S
./
/
0.1
~
-
V V
z
:;;
'"
~
~
§!
5
V
0.2
~
=>
0
04
06
08
1.0
1.2
1.4
REVERSE CURRENT (rnA)
REVERSE VOLTAGE (V)
Temperature Drift
Reverse Dynamic Impedance
1.245
100
1.240
~
~
~
~
ii:ia:
1.235
........
1.230
- - '"
~I
Ik
S
~
.........
,
0.1
0.01
0.1
TEMPERATLRE (OC)
fjj
~
300
/'
~
~
r...
~
200
~ 100"Arfi-l
40
30
b'
.
II
--
V
,/
./
V
i\;
'I
01
100
10
100
10k
Ik
lOOk
1M
FREQUENCY (Hz)
Response Time
I: I:
IR~IOO"A::
60
50
.....
10
"1
10
70
IR'; jo~,!Ji
TA - 25°C
I'
"'"""
Filtered Dutput Noise
600
400
100
REVERSE CURRENT (mA)
Noise Voltage
~
Ilt~ ~I
~
z
i
I
I
I
II
700
TA ~ ~5°C
IR ~ 100"A
f - 25Hz
)
l-
-55 -35 -15 .5 .25 .45 .65 .85 .105 .125
~
Reverse Dynamic Impedance
10k
+ 125°C
- 55°C TO
I
1.225
500
FORWARD CURRENT (rnA)
ilcLOlLU
I
~
15
OUTPJ
/
~ 10
~
g
05
~
V
I
36k
v"
Vo
",
20 ---"-
\
100
o
10
100
Ik
FREQUENCY (Hz)
10k
j..-
10
100k
o
5V
100
INPUT
I
I
Ik
10k
lOOk
100
500
600
FREQUENCY (Hz)
3-19
LT1004
TYPICAl PERFORmAnCE CHARACTERISTICS 2.5 VOlT
Reverse Characteristics
Forward Characteristics
12
100
i
i
"'Z
-0\
10
~
'-'
V
~
~
'"
0.1
/
V
"
25°C
ji"
." >'"~"
~ imm
II i '
TA ~.
-5J·C TO L25 C
z:
~ !----
tIj
-r~
t 11-.I_~+~
0.8
I!i,:'i
;'!
;;?
c
'"3!
~
1+1'I
-
1.0
1.5
2.0
2.5
0.01
3.0
2.515
.....
~
.........
,I
~
10
" I
......
V
25
• '.
I I'!'~
,.,
-tl
45
65
85
-
.,
.,
. I!I
\
,~,
,I t'l·
iI
100
Reverse Dynamic Impedance
10k
TA - 25°C
IR ~ 100~A
TEMPERATURE (OC)
>2
10
./
0.1
I
10
V
./
0.1
100
10
100
1k
Response Time
100
A..
600
~
~
i'
400
!i
\
OUTtT
80
24k
~
.s
~
100k
1oo~
1000
~
10k
FREQUENCY (Hz)
Filtered Output Noise
iR-
800
V
120
1200
~:;:
V
/
L
i-"
I
REVERSE CURRENT (rnA)
Noise Voltage
100
~
~
III
0.Q1
~
~
,....,
105 125
1400
"j
I
10
i\
01
5
. . . ,.
1k
2.480
-55 -35 -15
"
0.1
~
~
;'!
2.485
:
J5bl~~~f;1~~~~
II
§: 100
tIj 2.505
; 2.490
i
Reverse Dynamic Impedance
1000
2.510
...... #
FORWARD CURRENT (rnA)
Temperature Drift
2.495
.' V. .'
j
I
o
REVERSE VOLTAGE (V)
~
I
I
0.5
~ 2.500
"'t",
i'Ai
I
> .
0.4
••
V'N~VOOT
60
40
20
200
iN?
o
10
100
1k
FREQUENCY (Hz)
3-20
10k
100k
100
1k
10k
CUTOFF FREOUENCY (Hz)
100k
100
TIME (~SEC)
500
1M
LT1004
TYPICAL APPLICATions
High Stability 5V Regulator
Ground Referenced Current Source
+15V
5V
2k"
30011
1%
LT1004-1.2
10011
1%
lOUT
1_235
IO\IT=-R-
-5V
" MAY BE INCREASED
FOR SMALL OUTPUT CURRENTS
2V
R - lOUT + 10"A
0-100°C Linear Output Thermometer
NETWORK DETAIL
YSI44201
r-----l sRN
GRN
RT NETWORK
YSI44201
+15V
2.7k
5%
REO
10k
2765
LT1004-1.2
0-10VOUT
0-100"C
"
-=-
I
10k
168.3
"0_1%
3-21
LT1004
TYPICAL APPLICATions
Constant Gain Amplifier
Over Temperature
low Temperature Coefficient
2 Terminal Current Source
---------.---.----------v+~5V
250k
250k
OUTPUT
R '" 5k
200k
Variable Output Supply
low Noise Reference
1-_----_-
V.--_--t
VOUT
+
V. '" 5V
22Q
~""""''''''''''-OUTPUT
V- -1V
R, "'(j]"j5
2k
LT1004-1.2
~(
:
+50~f
V-
2.5V Reference
5V
Micropower Reference
from 9V Battery
+1.5V·
+9V
50k
3k
510k
2.500
LT1004-2.5
1.2V Reference from 1.5V Battery
1.235V
LT1004-1.2
1.235V
LT1004-1.2
• OUTPUT REGULATES
OOWN TO 1.285V
FOR lOUT - 0
3-22
LT1004
TYPICAL APPLICATions
Micropower 5V Reference
Lead Acid Low Battery Detector
r-------~--------~--------~----~~~~~
tR,
1M
1%
-=-
J-
LO
12V
~
BATTERY LOW
133k
1%
LT
1004-1.2
•
t R, SETS TRIP POINT, 60.4k
PER CELL FOR 1.8V/CELL
1M
1%
Vpp Generator for Eproms - No Trim Required
100 pi
LT1004-1.2
10k
L.J'"iTL INPUT
• 1% METAl FILM RESISTORS
-5
3-23
LT1004
SCHEmATIC DIAGRAm
LTl004-1.2
LT1004-2.5
r---.----.-----.------.-.---~----~----+
200k
SDk
300k
SOOk
500
PACKAGE DESCRIPTion
H Package, 2 Lead TO-46 Metal Can
~ ---1__
Dimensions in inches (millimeters) unless otherwise noted.
Z Package, 3 Lead TO-92 Plastic
--~ &~~=:i;~)
0178"-0195
(4521-4953)
SEATING __
PLANE
2l£ADS
I~~~~=~~~~)
Rfi
...l
-0
DIA-J
~
o085-0105
(2159-2667)
D__ __
(~~~~)
500~
60'"
60k
MAX
0500
- - - MIN
(12700)
0090
5"
NOM
(22s6)
~
~
/1
------l r-- (03683
00145-00155
0.3937)
TVP
B€FOOE LEAD
FINISH
3-24
0045-0055
(1143-1397)
L7Lln
FAD
LT1004CS8-1.2/
LT1004CS8-2.5
TECHNOLdG~~~-------M--ic-ro-p-o-w-e-rV-o-lt-a-g-e
V ,
References
FEATURES
DESCRIPTion
•
•
•
•
•
•
The LT1004 Micropower Voltage References are two
terminal bandgap reference diodes designed to provide high accuracy and excellent temperature characteristics at very low operating currents. Optimization
of the key parameters in the design, processing and
testing of the device results in accuracy specifications
previously attainable only with selected units. Below
is a distribution plot of reference wltage for a typical
lot of LT1004-1.2. Virtually all of the units fall well
within the prescribed limits of ± 4mV.
Guaranteed ±4mV initial accuracy LT1004-1.2
Guaranteed ± 20mV accuracy LT1004-2.5
Guaranteed 10JLA operating current
Guaranteed temperature performance
Operates up to 20mA
Very low dynamic impedance
APPLICATions
•
•
•
•
Portable meter references
Portable test instruments
Battery operated systems
Current loop instrumentation
The LT1004 is a pin for pin replacement for the 385
series of references with improved accuracy specifications. More important, the LT1004 is an attractive
device for use in systems where accuracy was
previously obtained at the expense of power consumption and trimming.
For a low drift micropower reference with guaranteed
temperature coefficient, see the LT1034CS8 data sheet.
Micropower Cold Junction Compensation For Thermocouples
lOOk
•
Typical Distribution of
Reference Voltage (LT1004-1.2)
200
~ R,
i:~~~~1S-- --f-
180
160
3V
LITHIUM
1684
-
5k AT
2S'C
140
t
120
+
LT 1004-1.2
--I--'--
100
-c-
+-
80
186
1800
60
--,
40
+
20
'-THERMOCOUPLE
TYPE
J
K
T
S
..L7YmtB
R,
233k
299k
300k
2.1M
• QUIESCENT CURRENT"" 15"A
t YELLOW SPRINGS INST. CO.
PART #44007
COMPENSATES WITHIN
± l'C FROM O'C TO 6O'C
~
'"~
M
1;]
'"
~
;;; '"
'"~ ~ ~ '"
'"~
:g
1;]
'"
1;]
'" '"
'" t;;
1ll
~
~
'"
~
3-25
II
LT1004CS8-1.2/
LT1004CS8-2.5
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Reverse Breakdown Current. . . . . . . . . . . . . . . 30m A
Forward Current. . . . . . . . . . . . . . . . . . . . . . .. 10mA
Operating Temperature Range ........ O°C to 70°C
Storage Temperature Range ...... -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
ORDER PART
NUMBER
TOP VIEW
LT1004CS8·1.2
LT1004CS8·2.5
NC
NC
NC
_ _ _ _....1 5 (00 NOT USE)
PART MARKING
58 PACKAGE
PLASTIC SO
0412 (1.2V VERSION)
0425 (2.5V VERSION)
ELECTRICAL CHARACTERISTICS (See Note 1)
SYMBOL
Vz
PARAMETER
Reverse Breakdown Voltage
CONDITIONS
IR ~ 100~A
LT1004C O°C ,;;; TA ,;;; 70°C
::'Vz
::. Temp
Average Temperature Coefficient
Imm ,;;; IR ,;;; 20mA
Imm
Minimum Operating Current
::'V z
~
Reverse Breakdown Voltage
Change with Current
rz
Reverse Dynamic Impedance
IR
en
Wide Band Noise (RMS)
IR ~ 100~A
10Hz ,;;; f ,;;; 10kHz
::'Vz
::. Time
Long Term Stability
IR ~ 100~A
TA ~ 25°C ± 0.1°C
Imm';;; IR ,;;; 1mA
1mA ,;;; IR ,;;; 20mA
~ 100~A
The. denotes the specifications which apply over the full operating
temperature range.
Nole 1: All specifications are for TA = 25°C unless otherwise noted.
3-26
•
•
LTlOO4·1.2
MIN
TYP
MAX
1.231 1.235 1.239
1.225 1.235 1.245
•
•
•
20
20
8
0.2
LTlOO4·2.5
TYP
MAX
MIN
2.480 2.500 2.520
2.470 2.500 2.530
10
1
1.5
10
20
0.6
1.5
12
0.2
60
120
20
20
UNITS
V
V
ppml'C
20
~A
1
1.5
10
20
0.6
1.5
mV
mV
mV
mV
II
II
~V
ppm/kHr
~"""'-Llnll\l2
~~
LT1OO9 Series
TBCHNOLOGY~---------2-.5--Vo-l-t-Re-f-e-re-n-c-e
FEATURES
DESCRIPTion
•
•
•
•
•
The LT1009 is a preCision trimmed 2.500 Volt shunt regulator diode featuring a maximum initial tolerance of only
::I:: 5mV. The low dynamic impedance and wide operating
current range enhances its versatility. The 0.2% reference tolerance is achieved by on-Chip trimming which not
only minimizes the initial voltage tolerance but also minimizes the temperature drift.
0.2% Initial Tolerance Max
Guaranteed Temperature Stability
Maximum 0.60 Dynamic Impedance
Wide Operating Current Range
Directly Interchangeable with LM136 for Improved
Performance
• No Adjustments Needed for Minimum Temperature
Coefficient
APPLICATions
•
•
•
•
•
Reference for 5V Systems
8 Bit AID and DI A Reference
Digital Voltmeters
Current Loop Measurement and Control Systems
Power Supply Monitor
Even though no adjustments are needed with the LT1009,
a third terminal allows the reference voltage to be adjusted ::I:: 5% to calibrate out system errors. In many
applications, the LT1009 can be used as a pin-to-pin
replacement of the LM136H-2.5 and the external trim
network eliminated.
For a lower drift 2.5V reference, see the LT1019 data
sheet.
2.5 Volt Reference
Output Voltage
2.530
5V-35V
2.520
:>
ii' 2.510
3.6k
~--.-
Ln009~&~~---.~10k'
-
TRIM
OUTPUT
=
;::; 2.500
Ty)llCAL
c..>
15
~ 2.490
w
a:
2.480
'DOES NOT AFFECT
TEMPERATURE COEFFICIENT.
±5% TRIM RANGE
GUARANfEED MAX
!:§
/'"
#'
-00
,/""
//.
-/k//,
-r-....
VI"""" ~
rGUARANTEED MINIMU~
-~
0
~
00
ro
TEMPERATURE (OC)
~
~
100
1~
3-27
II
LT1009 Series
ABSOLUTE mAXimUm RATinGS
PACKAGE/ORDER InFORmATiOn
Reverse Current. . . . . . . . . . . . . . . . . . . . . . . . 20mA
Forward Current ........................ 10mA
Operating Temperature Range
LT1009M .................. -55°C to 125°C
LT1009C ...................... O°C to 70°C
Storage Temperature Range
LT1009M and C ............. -65°C to 150°C
Lead Temperature (Soldering, 10 sec.). . . . .. 300°C
ORDER PART NUMBER
BOTTOM VIEW
LT1009MH
LT1009CH
H PACKAGE
TO·46 METAL CAN
BOTTOM VIEW
CL2J
LT1009CZ
Z PACKAGE
TO·92 PLASTIC
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
Vz
1!.Vz
1!.IR
Reverse Breakdown Voltage
TA=25°C,IR=lmA
Reverse Breakdown Change with
Current
400pA:s IR:S 10mA
rz
Reverse Dynamic Impedance
IR=lmA
1!.Vz
1!.Temp
Temperature Stability
Average Temperature Coefficient
TMIN:sTA:sTMAX
0°C:sTA:s70°C
-55°C:sTA:S 125°C (Note 1)
1!.Vz
1!. Time
Long Term Stability
TA=25°C±0.1°C,IR=lmA
--
The • denotes the specifications which apply over full operating
temperature range.
Note 1: Average temperature coefficient is defined as the total voltage
change divided by the specified temperature range.
3-28
MIN
2.495
•
•
•
LT1009M
TYP
MAX
2.500
2.505
2.6
3
0.2
0.4
15
25
20
MIN
2.495
LT1009C
TYP
MAX
2.500
2.505
6
10
2.6
3
10
12
0.6
1
0.2
0.4
1.0
1.4
15
1.8
4
25
35
15
25
20
UNITS
V
mV
mV
{j
{j
mV
ppm/oC
ppm/oC
ppm/kHr
LT1009 Series
TYPICAL PERFORmAnCE CHARACTERISTICS
Reverse Characteristics
Forward Characteristics
Reverse Voltage Change
1.2
/
T;=25'C
1.0
:;;; O.B
:i
!:l
i
.
---
0.6
;'"
~ 0.4
0.2
o
0.001
Dynamic Impedance
v- v
/
/
V
./
0.01
0.1
1
FORWARD CURRENT (rnA)
o
10
0
Zener Noise Voltage
/
1/
8
12
16
REVERSE CURRENT (mA)
20
Response Time
250
100
IR lmA
55'CsT;s125'C
....
,/
IR=lmA
Tj=25'C
200
§:
\
10
I
l!!
/
!:
/
:IS
.
;i
2.5 HKt-PHI't-H';';"'++-Hrl
2.0 H~c...L::±:::!=!---<".....l--l--Hrl
1\
~ 1.5
\
~ 1.0
~
........ ~
~
~
>-
0.5
0
100
10
100
lk
10k
FREQUENCY (Hz)
lOOk
H-+-+-t-I-::±:::t<.-t-:r-t-t--1
4.0
I-l-+-+-t--l-=r=,+-+-f-+-+--i
O~-L~~~~.~~~~
50
0.1
10.0
10
100
lk
10k
FREQUENCY (Hz)
1
lOOk
TIME
(~SEC)
SCHEmATIC DIAGRAm
~-------------------------.--------.---.-----+
Uk
500
30k
I--+---......JWI.-ADJ
6.6k
3-29
LT1009 Series
TYPICAL APPLICATiOnS
Wide Supply Range, Adjustable Reference
Low Temperature Coefficient Power Regulator
+3.6V TO +40V
LT317A
I-.....-~P--VOUT
L-.:;:;:-...J
375
6211
k-_(10k
2k
Switchable ±1.25V Bipolar Reference
Low Noise 2.5V Buffered Reference
5V
5k
+5V-n
10k
5k
.J L
- 5V
1k
2.5V
LT100a
5k
-5V
PACKAGE DESCRIPTiOn Dimensions in inches (millimeters) unless otherwise noted.
H Package
Metal Can
8r
Z Package
Plastic
1~..!!.:.!1!=.!!!
I 1··..·-4.699)
1::::::::;':)
0.118-0.195
I~ -(4.521-4.953)
0.085-0.105
12.159-2.667)
0,500
SE.T1HG_t.e::::IlH'
PLANE
--u-rr
o 0 0_ 11~::O)
(::::::::::)--11- (:::)
DIA
MAX
0.100
(2.540)
0.1"!;,;' I
14.44'-4.699)
I
0
PlANEf.1..
.!!!!!!.. ~
(12.70) (2.286)
MIN
NOM
0'065~'
==t
I
I
SEATING~ L _ _ _
1 11.1161)
---I. DlA
-,
0.025
(0.636)
MAX
nnn
-W i-J!!.
~U UUUN='\lI~LED
~
(1.143-1.397)
5°HOM
~
J
~
(OT~;)
.'
~
-II.-
NOM
0.0145-0.0155
(0.3683,.;:.3937)
BEFORE WO
FINISH
~
(~:?H('~"43_',397)
NOM
1O'HOM
1 2 3
lJ
10'NOM
3-30
~
(3.429-3.883)
~""""-Llnlt\l2
~)r
LT1009S8
TBCHNOLOG~~~----------2-.5-V-O-I-t-Re-f-e-re-n-c-e
FEATURES
DESCRIPTion
•
•
•
•
•
The LT1009 is a precision trimmed 2.500 Volt shunt regulator diode featuring a maximum initial tolerance of only
± 1OmV. The low dynamic impedance and wide operating
current range enhances its versatility. The 0.4% reference tolerance is achieved by on-chip trimming which not
only minimizes the initial voltage tolerance but also minimizes the temperature drift.
0.4% Initial Tolerance Max
Guaranteed Temperature Stability
Maximum 0.60 Dynamic Impedance
Wide Operating Current Range
Directly Interchangeable with LM336 for Improved
Performance
• No Adjustments Needed for Minimum Temperature
Coefficient
APPLICATions
•
•
•
•
•
Reference for 5V Systems
8 Bit AID and DI A Reference
Digital Voltmeters
Current Loop Measurement and Control Systems
Power Supply Monitor
Even though no adjustments are needed with the LT1009,
a third terminal allows the reference voltage to be adjusted ± 5% to calibrate out system errors. In many
applications, the LT1009 can be used as a pin-to-pin
replacement of the LM336-2.5 and the external trim network eliminated.
Output Voltage
2.5 Volt Reference
2.530
5V-35V
3.6k
.---+- OUTPUT
LT1009 r:....~,....---t.~ 10k"
~
TRIM
2.520
:;;;; 2.510
;:: 2.500
z
LI.I
<.>
LI.I
a:
'*
T~~icAL
C>
~ 2.490
"DOES NOT AFFECT
TEMPERATURE COEFFICIENT.
±5% TRIM RANGE
GUARAN!EED MAX
~
!:l
2.480
/
,b//
-
.............
/ ' /? """" ~/
rGUARANTEED MINIMUM""'" ~
~
-~
-~
0
~
~
~
TEMPERATURE rC)
""
100
1~
3-31
~
~
LT1009S8
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Raverse Current. . . . . . . . . . . . . . . . . . . . . . .. 20mA
Forward Current. ....................... 10mA
Operating Temperature Range ........ O°C to 70°C
Storage Temperature Range ...... -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
ORDER PART NUMBER
.oW
TOP VIEW
NC 2
LT1009S8
7 NC
NC 3
6
PART MARKING
5 ADJ
4
1009
58 PACKAGE
PlASTIC SO
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
Reverse Breakdown Voltage
Reverse Breakdown Change with Current
CONDITIONS
TA=25°C,IR=lmA
Reverse Dynamic Impedance
IR=lmA
~
!;'Temp
Temperature Stability
Average Temperature Coefficient
TMINSTAsTMAX
OOCSTAS70oC (Note 1)
~
Long Term Stability
TA=25°C±0.1°C, IR= lmA
Vz
!;,Vz
!;,IR
rz
400~As1Rsl0mA
!;'Time
The. denotes the specifications which apply over the full operating
temperature range.
Note 1: Average temperature coefficient is defined as the total voltage
change divided by the specified temperature range.
3-32
MIN
2.490
•
•
•
LT1009S8
TYP
MAX
2.500 2.510
2.6
10
12
3
0.2
0.4
1.8
15
20
1.0
1.4
4
25
UNITS
V
mV
mV
II
II
mV
ppm/°C
ppm/kHr
L7YD~I!r.IY~-----p-re-C-iS-io-n-R-e-f-eL-r:-1~-.~_:
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
•
•
•
The LT1 019 is a third generation bandgap voltage reference utilizing thin film technology and a greatly improved
curvature correction technique. Wafer level trimming of
both reference and output voltage combines to produce
units with high yields to very low TC and tight initial
tolerance of output voltage.
Available at 2.5V, 4.5V, 5V, and 10V
Plug-In Replacement for Present References
Ultra Low Drift-3ppm/oC Typical
Curvature Corrected
Series or Shunt Operation
Ultra High Line Rejection = lhppm/V
Low Output Impedance =0.020
Tight Initial Output Voltage <0.05%
Can be Heated for Drifts below 2ppm/oC
100% Noise Tested
Temperature Output
APPLICATions
•
•
•
•
•
The LT1019 can both sink and source up to 10mA and
can be used in either the series or shunt mode. This
allows the reference to be used for both positive and
negative output voltages without external components.
Minimum input-output voltage is less than 1V in the
series mode, providing improved tolerance of low line
conditions.
The LT1019 is available in four voltages: 2.5V, 4.5V, 5V,
and 10V. It is a direct replacement for most bandgap references presently available including AD580, AD581 ,
REF-01, REF-02, MC1400, MC1404 and LM168.
A to Dand Dto A Converters
Precision Regulators
Constant Current Sources
V to F Converters
Bridge Excitation
For ultra low drift applications ( < 2ppm/°C), the LT1019
can be operated in a heated mode by driving an internal
resistor with an external amplifier. Chip temperature can
be externally set for minimum power consumption.
For a 6.2V version of the LT1019, consult the factory.
Ultralinear Strain Gauge *
+15V
35m" 'hW
III
5V
LT!019-5
OUT
r----,
I
R3
2M
Output Voltage Drift
1.003
3500
BRIDGE
€1.002
~
Ci! 1.001
i
~1.000
FJLL
'" "BDy----"r--t:;
!
"S~~cg:O~~~~~AP7'" ~
~
' - - - - - - - - t - 5V
35m"
Y,W
-15V
'c::
.,..,
g 0.999
"ELIMINATES BRIDGE
LOADING AND INSTRUMENTATION
AMPLIFIER.
TE~~P~~~ "Bdx"
T
0.998
"REDUCES REFERENCE AND AMPLIFIER
LOADING TO -0.
HIF R6=R3, BRIDGE IS NDTlDADED
BY R2 AND R4.
tAl VosAND DRIFT ARE NOT CRITICAL.
T
"-
-5prm/oCtwi
-
t---'
:::,.".
DRIFT CURVE
0.997
-50 -25
0
25
50
75
TEMPERATURE (OC)
100
125
3-33
II
LT10l9
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Input Voltage ............................ 40V
Output Voltage (Note 1)
LT1019-5, LT1019-10 .................... 16V
LT1019-2.5,LT1019-4.5 .................. 7V
Output Short Circuit Duration (Note 1)
VIN ~20V ......................... Indefinite
20V:s;VIN :s;35V ...................... 10sec
Trim Pin Voltage . . . . . . . . . . . . . . . . . . . . . . .. :I:: 30V
Temp Pin Voltage .......................... 5V
Heater Voltage
(Continuous) .......................... 18V
(Intermlttent-30 sec.) ................... 32V
ORDER PART
NUMBER
TOP VIEW
NC'
NC'
INPUT
PJ..rn. Q;
<¥
TEMP
LT1019AMH-10
LT1019MH-10
LT1019ACH-10
LT1019CH-10
LT1019AMH-5
LT1019MH-5
LT1019ACH-5
LT.1019CH-5
HEATER
~ OUTPUT
m.. ".. JE
TRIM
G~E)
METAL CAN H PACKAGE
'INTERNALLY CONNECTEO. 00 NOT
CONNECT EXTERNALLY.
·'0·'
TOP VIEW
INPUT 2
LT1019ACN8-10 LT1019ACN8-4.5
LT1019CN8-10 LT1019CN8-4.5
LT1019ACN8-5 LT1019ACN8-2.5
LT1019CN8-5
LT1019CN8-2.5
AVAILABLE
IN SO PACKAGE
7 HEATER
TEMP 3
6 OUTPUT
GNO 4
LT1019AMH-4.5
LT1019MH-4.5
LT1019ACH-4.5
LT1019CH-4.5
LT1019AMH-2.5
LT1019MH-2.5
LT1019ACH-2.5
LT1019CH-2.5
5 TRIM
PlASTIC DIP N8 PACKAGE
'INTERNALLY CONNECTED. 00 NOT
CONNECT EXTERNAllY.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
VIN-VOUT=5V, IOUT=O, TJ=25°C
LT1019A
CONDITIONS
MIN
Output Voltage Tolerance
~utput Voltage
LT1019C (O°C to 70°C)
~emperature Coefficient LT10t9M (-55°C to + 125°C)
(Note 2)
.6.VOUT Line Regulation (Note 3) (VOUT+ 1.5V) SV1N s40V
.6.V 1N
Ripple Rejection
RR
SOHz sf s400Hz
Te
.6.VOUT Load Regulation Series
.:).lOUT Mode (Notes 3 and 4)
Load Regulation. Shunt
Mode
Thermal Regulation
(Note 6)
Quiescent Current
Ie
Series Mode
Minimum Shunt Current
Minimum Input-Output
Voltage Differential
Trim Range
Isc
en
Heater Resistance
Short Circuit Current
Output Connected to
Ground
Output Voltage Noise
(Note 9)
3-34
OSIOUTS10rnA*
1rnAsisHUNTS10rnA
(Notes 4 and 5)
.6.I'=200mW
t=50ms
(Note 7)
IOUTS1rnA
lOUT = 10rnA
LT1019-2.5
LT1019-S
LT1019-10
••
•
•
•
2.5V. 4.SV. 5V •
90
10Hzsfs1kHz
0.1Hzsfs10Hz
MAX
0.002
3
5
O.S
1
MAX
0.05
5
10
0.02
5
8
0.2
20
25
%
ppm/oC
ppm/oC
3
5
0.5
1
3
5
ppm/V
ppm/V
90
0.1
0.1
0.65
•
•• ±4
±4
±4
15
10
110
84
0.02
•
MIN
0.5
0.9
±6
+5, -13
+S, -27
400
25
2.5
2.S
UNITS
TYP
110
10V.
•
LT1019
TYP
84
300
2V SV 1N s35V
unless otherwise noted
0.05
0.08
0.4
0.8
O.S
0.02
1
1.3
0.8
1.1
1.3
0.65
500
50
4
0.1
0.1
O.S
0.9
±4
±4
±4
300
15
10
±6
+S, -13
+S, -27
400
25
2.5
2.5
O.OS
0.08
0.4
0.8
O.S
1.2
1.5
0.8
1.1
1.3
500
50
4
dB
dB
mV/rnA(O)
mV/rnA (0)
mV/rnA (0)
mV/mA (0)
ppm/mW
rnA
rnA
rnA
V
V
%
%
%
0
rnA
rnA
ppm (Rms)
ppm (p-p)
LT1019
Note 6: Thermal regulation is caused by die temperature gradients
created by load current or input voltage changes. This effect must be
added to normal line or load regulation.
Note 7: Minimum shunt current is measured with shunt voltage held
20mV below value measured at 1mA shunt current.
Note 8: Minimum input-output voltage is measured by holding input
voltage O.5V above the nominal output voltage, while measuring
The • denotes the specifications which apply over the full operating
temperature range.
Note 1: These are high power conditions and are therefore guaranteed
only at temperatures equal to or below 70 o e. Input is either floating, tied
to output, or held higher than output.
Note 2: Output voltage drift is measured using the box method. Output
voltage is recorded at TMIN, 25°e, and TMAX. The lowest of these three
readings is subtracted from the highest and the resultant difference is
divided by (TMAX - TMIN).
Note 3: Line regulation and load regulation are measured on a pulse
basis with low duty cycle. Effects due to die heating must be taken into
account separately. See thermal regulation and application section.
Note 4: Load regulation is measured at a point '10 • below the base of the
package with Kelvin contacts.
Note 5: Shunt regulation is measured with the input floating. This
parameter is also guaranteed with the input connected (V IN - VOUT) > lV,
OmA s ISINK slOmA. Shunt and sink current flow into the output.
VIN-VOUT·
Note 9: RMS noise is measured with a single high pass filter at 10Hz
and a 2-pole low pass filter at 1kHz. The resulting output is full wave
rectified and then Integrated for a fixed period, making the final reading
an average as opposed to RMS. A correction factor of 1.1 is used to convert from average to RMS, and a second correction of 0.88 is used to
correct for the non-ideal bandpass of the filters.
Ell
TYPICAL PERFORmAnCE CHARACTERISTICS
Quiescent Current (LT1019-2.5)
Quiescent Current (LT1019-4.5, 5)
Quiescent Current (LT1 019-1 0)
1.6
1.6
1.6
1.4
1.4
1.4
1.2
1.2
1.2
f-"
0.4
'-
F1~OC
H~OC
~ 1.0
25°C
ffi
0.8
B
0.6
~
55°C
5
10
15 20 25 30
INPUT VOLTAGE (V)
WC
55°C
35
40
oI
o
45
)
0.4
0.2
o
.;!:.!l5°C
25°C
0.4
0.2
o 11
25°C
I
V
0.2
5
10
15
20
25
30
INPUT VOLTAGE (V)
35
o
40 45
1/
o
5
10
15
20
25
30
INPUT VOLTAGE (V)
35
40
45
Minimum Input-Output Voltage
Differential
Ripple Rejection
Load Regulation
10
2.0
120
LT\J!~lljlb
TJi25°f
110
1.5
I
~ 7.5
~~
<.>
5.0
!w
-
~
o 2.5
~'"-'·1 '--
TJ= -55°C
I
I
r--
TJ=25°C
J
o
o
SJ'
,LT1019'10
.)
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
INPUT-OUTPUT VOLTAGE (V)
i...
~
§
1.0
0.5
100
~T1019-4.5, 5
LT1J19~ ~ .....
-0.5
~
iii' 90
~
~
80
>
70
g
LT1019·2.5
-1.0
60
T'=25°C
-1.5
50
1'1111111 I
-2.0
-10 -8 -6 -4 -2 0 2 4 6 8 10
SINKING
SOURCING
OUTPUT CURRENT (mA)
40
IIIII~
10
100
~
LT1019·4.5, 5
~
I
lk
10k
FREQUENCY (Hz)
lOOk
1M
3-35
LT1019
TYPICAL PERFORmAnCE CHARAaERISTICS
Shunt Mode Characteristics
(LT1019-2.5V)
Shunt Mode Characteristics
(LT1019-5)
1.0
0.9
1.0
INPUT OPEN
Shunt Mode Characterls1lcs
(LT1 019-1 0)
INPUT OPEN
0.9
INPUT OPEN
0.9
1--+---+--+--+--+---+-1--1
0.8
0.8
0.8
0.7
0.7
1M
1M
0.7
I-+-+--+--+-+-t-i--I
I-+-+--+--+-+-t-i--I
0.6
1--+---+--+--+--+---+-1--1
~u
~
~
~U
0.3
0.2
I
~u
0.3
TJ=+I2S°C/ ~ TJ= +2S°C
0.2
y/. V TJ=-55°C
0.1
{C-TJ= +25°C
aU
~
0.1
o ~
o 0.5 1.0 1.5
0
2.0 2.5 3.0 3.5 4.0
OUTPUT TO GROUNO VOLTAGE (V)
Temp Pin Voltage
TJ=+125 ° V
IWJ=-SSoc
0
1
2
3
4
5
6
7
OUTPUT TO GROUND VOLTAGE (V)
120 TJ=25°C
0.75
./
./'
~
/'
~
-25
LT1019-2.5* Stability with
Output Capacitance
0
25
50
75 100
JUNCTION TEMPERATURE (OC)
1.0
80
-
LT1019·2.5
0
125
-20
-30
..-:::::....- ~
LT1019·1~
20
50-10
0.40
-so
lJj
z
!:l
/
16
~100
~
/
0.50
4
6
8 10 12 14
OUTPUT TO GROUND VOLTAGE (V)
10llT
~ 60
~ 40
/
0.55
0.45
/'
2
10
140
0.80
L'
o
8
Une Regulation
0.90
~ 0.65
!:l
§1 0.60
O.~
A
0.85
€0.70
V
o
5
W m 20
2S 30
INPUT VOLTAGE (V)
~
0.1
~
0.01
g
~~~~;Ig~ OSSIELE=
LT10lg.5
10.001
~
40
0.0001
20
15 10
5
SINK CURRENT
0
5
10 15 20
SOURCE CURRENT
lOUT (mA)
*LT1019-4.5, 5, 10 Are Stable WIIh All
Load Gapacitance.
APPLICATions InFORmATIOn
Una and Load Regulation
Line regulation on the LT1019 is nearly perfect. A 10V
change in input voltage causes a typical output shift of
less than 5ppm. Load regulation (sourcing current) is
nearly as good. A 5mA change in load current shifts output voltage by only 1OO"V. These are electrical effects,
measured with low duty cycle pulses to eliminate heating
effects. In real world applications, the thermal effects of
load and line changes must be considered.
3-36
Two separate thermal effects are evident in monolithic circuits. One is a gradient effect, where power dissipation
on the die creates temperature gradients. These gradients can cause output voltage shifts even if the overall
temperature coefficient of the reference is zero. The
LT1019, unlike previous references, specifies thermal
regulation caused by die temperature gradients. The
specification is O.5ppm/mW. To calculate the effect on
LT1019
APPLICATions InFoRmATion
output voltage, simply multiply the change in device
power dissipation by the thermal regulation specification.
Example: a 10V device with a nominal input voltage of
15V and load current of 5mA. Find the effect of an input
voltage change of 1V and a load current change of 2mA.
~p
(line change) = (~VIN )(ILOAD) = (1V)(5mA) =5mW
~VOUT = (0.5ppm/mW)(5mW) =2.5ppm
~ (load change)=(~ILOAD)(VIN -VOUT)
= (2mA)(5V) = 10mW
~VOUT=(0.5ppm/mW)(10mW)=5ppm
Even though these effects are small, they shou Id be taken
into account in critical applications, especially where input voltage or load current is high.
The second thermal effect is overall die temperature
change. The magnitude of this change is the product of
change in power dissipation times the thermal resistance
(8JA) of the IC package ==(100°C/W-150°C/W). The
effect on reference output is calculated by multiplying die
temperature change by the temperature drift specification
of the reference. Example: same conditions as above with
8JA=150°C/W and an LT1019 with 20ppm/oC drift
specification.
(line change) =5mW
~VOUT = (5mW)(150°C/W)(20ppm/OC)
=15ppm
~p (load change) = 10mW
~VOUT =(10mW)(150°C/W)(20ppm/OC)
=30ppm
~p
These calculations show that thermally induced output
voltage variations can easily exceed the electrical effects.
In critical applications where shifts in power dissipation
are expected, a small clip-on heat sink can significantly
improve these effects by reduCing overall die temperature
change. Alternately, an LT1019A can be used with 4
times lower TC. If warm-up drift is of concern, these
measures will also help. With warm-up drift, total device
power dissipation must be considered. In the example
given, warm-up drift (worst-case) is equal to:
Warm-up drift = [(VIN )(10) + (VIN - VouT)(ILOAD))
[(8JA)(TC))
with 10 (quiescent current) =0.6mA,
warm-up drift = [(15V)(0.6mA) + (5V)(5mA)]
[(150°C/W)(25ppm/ O C)]
=127.5ppm
Note that 74% of the warm-up drift is due to load current
times input-output differential. This emphasizes the importance of keeping both these numbers low in critical
applications. With heavy loads, warm-up drift can also be
improved using the technique described under" Driving
Loads Above 10mA", or by heat sinking.
Note that line regulation is now affected by reference output impedance. R1 should have a wattage rating high
enough to withstand full input voltage if output shorts
must be tolerated. Even with load currents below 10mA,
R1 can be used to reduce power dissipation in the
LT1019 for lower warm-up drift, etc.
Output Trimming
Output voltage trimming on the LT1 019 is nominally accomplished with a potentiometer connected from output
to ground with the wiper tied to the trim pin. The LT1019
was made compatible with existing references, so the
trim range is large; +6%, -6% for the LT1019-2.5,
+5%, -13% for the LT1019-5,and +5%, -27% for
the LT1019-10. This large trim range makes precision
trimming rather difficult. One solution is to insert resistors
in series with both ends of the potentiometer. This has the
disadvantage of potentially poor tracking between the
fixed resistors and the potentiometer. Asecond method of
reducing trim range is to insert a resistor in series with
the wiper of the potentiometer. This works well only for
very small trim range because of the mismatch in TCs
between the series resistor and the internal thin film
resistors. These film resistors can have a TC as high as
500ppm/oC. That same TC is then transferred to the
change in output voltage; a 1% shift in output voltage
3-37
II
LT1019
APPLICATions InFoRmATion
causes a (500ppm) (1%)=5ppm/oC change in output
voltage drift. The worst-case error in initial output voltage
for the LT1019 is 0.2%, so a series resistor is satisfactory if the output is simply trimmed to nominal value.
1ppm/oC TC shift would be the maximum expected.
Using the Temp Pin
The LT1019 has a TEMP pin like several other bandgap references. The voltage on this pin is directly proportional to
absolute temperature (PTAT) with a slope of ""2.1mV/oC.
Room temperature voltage is therefore ",,(295°K)
(2.1mV/oC) = 620mV. Previous bandgap references have
been very sensitive to any loading on the TEMP pin because
it is an integral part of the reference "core" itself. The
LT1019 "taps" the core at a special pOint which has much
less effect on the reference. The relationship between TEMP
pin loading and a change in reference output voltage is less
than 0.05%/pA, about 10 times improvement over previous references.
The TEMP pin can be used to sense chip temperature in
applications where the chip is forced to constant temperature (see "Heated Mode") or to sense ambient temper-
Wide Range Trim ~
::I:: 5%
001
VIN
III
Your
mots
ature in applications where the temperature difference
between chip and ambient is tolerable or can be calibrated out. Typical chip temperature rise over ambient is
::::: 2°C with no output load and 15V input voltage, but it
could be as high as 6°C with a 5mA load and 5V Inputoutput differential. A Centigrade thermometer is shown in
the application circuits. This particular configuration has
the advantage of trimming "zero" and "slope" simultaneously. The PTAT nature of the TEMP pin output has a
known predictable relationship between initial zero error
and slope. This circuit takes advantage of that relationship by trimming at point that corrects the zero and
slope errors simultaneously.
a
A simple over-temp circuit is also shown in the application section using an LT1 011 comparator. This circuit is
intended to be an ambient sensor, so temperature rise in
the reference must be considered when setting trip level.
R2B is adjusted by connecting a DVM across the inputs of
the comparator and setting the DVM to read 2.1 mV for
each degree above room temperature. A 70°C trip would
require (2.1mV)(70°C-22°C)=101mV. R3 provides
about 1°C hysteresis to prevent oscillations.
Narrow Trim Range (::1::0.2%)
M
-iN lT1!!19
R1
GNOiltlM
25k
Your
R2"
1.5M
"INCREASE TO 4.7MU FOR LTl019A (±0.05%)
Trimming LT1019-5 Output to 5.120V
Your
0llT
I!t1ot~S
R1
1OOk
GN.OTlltf.l,
-=-
Trimming LT1019-10 Output to 10.240V
...----t-vour
41 .2k
1%
9O.9k
1%
5k"
± 1% TRIM
5k"
±1% TRIM
4. 02k
4.02k
1%
-lit
IIHf)tIII!II 1-+
l'Yo
"LOW TC CERMET
3-38
-=-I...
"LOW TC CERMET
-=-
LT1019
APPLICATions InFoRmATion
Precision 1pA Current Source
Negative 10V Reference for CMOS OAC
+15V
11.5k
1%
fttI
OUT
LJ1ilIIHO
TRIIiIIlHO
5k"
':"
59k
1%
LT101g..2.5
SNll11llltl
5k"
IB
2.49M
1%
5.76k
1%
8.25k
1%
IOUT=lpA
ZOUT,,101111
VOUT
'" llV COMPLIANCE
REF
-15V
"LOWTC CERMET, TRIM RANGE= ",1.5%
"LOW TC CERMET, TRIM RANGE = '" 1.5%
V+;2:
Rl
2200
III
Negative Series Reference
V+
(VOUT+2.8V)--~"""--+LED
VOUT
1.2k
Output Current Boost with Current limit
GLOWS IN
CURRENT LIMIT
(DO NOT OMIT)
CMOS
DAC
Rl"...---..,
lT1019
8.20
~~
til
OUT
IN
lT1019
OUT
" ' - - -....- - - -VREF @ 50mA
GND
aLOCK DIAGRAm
Rl
LT1019-2.5 = 11k, LnOI9-4.5= 13.9k
LnOI9·5=16k, LnOI9·10=37.1k
R3
SDk
TRIM-...,........-+---~
R2
1.188V
LT1019·4.5, 5, 10=5k
LT1019-2.5=10k
I1I1
VOUT
' - - - - - -........---,GNO
3-39
LT1019
SCHEmATIC DIAGRAm
YIN
Vour
R2B
'"
1k
3k
R2B
9k
TRIM
'13
5k
24.5k
L-------4_----~--~--~--------------~--4_------4_~~~--
__________ ____ ____
~--
~
PACKAGE DESCRIPTiOn
N8 Package 8 Lead Plastic
U
t-(I~:I--t
'7'l1511
0165-11185
1 ~~~:ENCf
~~;u;rr~~~~~I'~19~'-E';~~',
GAUGE
PLA~E
0500-0750
{U 70-li 05)
1
t
+0025
I- 0.325_0,015..j
I (8.255~~·:) I
NOTE. l.EADOIAMElERfS UNCONTROLLED BElWEEN
TtlEREF£II£NCEPl.AHEAMDSEAfINGPl.AItE
3-40
2
3
4
-::fo.otO
.--l
(6.35020'l54)
~_IGNO
L7YO~I!:"~~'-----p-re-C-iS-iO-n-R-e-f-e-~:-~-~2-~
FEATURES
DESCRIPTion
• Pin Compatible with Most Bandgap Reference
Applications, Including Ref 01, Ref 02, LM368,
MC1400, and MC1404, with Greatly Improved
Stability, NOise, and Drift
• Ultra Low Drift-2ppm/oC Max Slope
• Trimmed Output Voltage
• Operates in Series or Shunt Mode
• Output Sinks and Sources in Series Mode
• Very Low Noise < 1ppm p-p (0.1 Hz to 10Hz)
• > 100dB Ripple Rejection
• Minimum Input-Output Differential of 1V
.100% Noise Tested
The LT1021 is a precision reference with ultra low drift
and noise, extremely good long term stability, and almost
total immunity to input voltage variations. The reference
output will both source and sink up to 10mA. Three voltages are available; 5V, 7Vand 1av. The 7V and 10V units
can be used as shunt regulators (two terminal zeners)
with the same precision characteristics as the three terminal connection. Special care has been taken to minimize thermal regulation effects and temperature induced
hysteresis.
The LT1 021 references are based on a buried zener diode
structure which eliminates noise and stability problems
associated with surface breakdown devices. Further, a
subsurface zener exhibits better temperature drift and
time stability than even the best band-gap references.
APPLICATions
•
•
•
•
•
•
Unique circuit design makes the LT1 021 the first IC reference to offer ultra low drift without the use of high power
on-chip heaters.
A to Dand Dto A Converters
Precision Regulators
Digital Voltmeters
Inertial Navigation Systems
Precision Scales
Portable Reference Standard
The LT1021-7 uses no resistive divider to set output voltage, and therefore exhibits the best long term stability and
temperature hysteresis. The LT1 021-5 and LT1 021-1 0 are
intended for systems requiring a precise 5V or 10V reference, with an initial tolerance as low as ±0.05%.
Basic Positive and
Negative Connections
Typical Distribution of
Temperature Drift-LT1021
24
bIST~\BU~ION I _
21
tT1021
(1 AND 100NlYl
lT1021
VOUT
NC
18
1M
.".
GNO
~
~
GND
OF THREE RUNS
..... r-
15
r-
12
Z
io-
=>
-VOUT
..-
ro-
R1
o
t-
l-
-5 -4 -3 -2 -1
0
1 2 3
OUTPUT DRIFT (ppm/oCI
4
5
3-41
II
LT1021
A8S0LUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V
Input-Output Voltage Differential .............. 35V
Output to Ground Voltage (Shunt Mode Current Limit)
LT1021-5 ............................. 10V
LT1021-7 ............................. 10V
LT1021-10 ............................ 16V
Trim Pin to Ground Voltage
Positive ....................... Equal to VOUT
Negative. . . . . . . . . . . . . . . . . . . . . . . . . . .. - 20V
Output Short Circuit Duration
VIN =35V ........................... 10 sec
VIN s 20V ......................... Indefinite
Operating Temperature Range
LT1021 Mil. ................. -55°Cto125°C
LT1021 Comm ................... 0°Cto70°C
Storage Temperature Range
All Devices .................. -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ........ 300°C
ORDER PART NUMBER
TOP VIEW
NC'
..m..1::r;
NC'W
NC'
VIN~
~VOUT
NC'ID. . . . 1i. TRIM"
LT1021BMH-5
LT1021CMH-5
LT1021DMH-5
LTl 021 BCH-5
LT1021CCH-5
LT1 021 DCH-5
LTl021AMH-l0
LT1021BMH-l0
LT1021CMH-l0
LT1021DMH-l0
LT1021ACH-l0
LT1021BCH-l0
LT1021CCH-l0
LT1021DCH-l0
LT1021AMH-7
LTl021BMH-7
LT1021DMH-7
LT1021ACH-7
LT1021 BCH-7
LT1021 DCH-7
Yo
METAL CAN H PACKAIlE
·CONNECTED INTERNALLY. DO
NOT CONNECT EXTERNAL CIRCUITRY
TO THESE PINS.
UNO TRIM PIN ON LT1021-7. DO NOT
CONNECT EXTERNAL CIRCUITRY TO
PIN 5 ON lT1021·7.
TOP VIEW
LT1 021 BCNS-5
LT1021CCNS-5
LT1021 DCN8-5
NC·OSNC.
V'N 2
7 Ne·
Ne· 3
6 VOUT
GND 4
5 TRIM··
LT1021 BCNS-7
LTl021 DCN8-7
PlASTIC DIP NS PACKAIlE
'CONNECTEO INTERNAllY. 00
NOT CONNECT EXTERNAL CIRCUITRY
TO THESE PINS.
"NO TRIM PIN ON lT1021-7. DO NOT
CONNECT EXTERNAL CIRCUITRY TO
PIN SON lT1021-7.
ELECTRICAL CHARACTERISTICS
LT1 021 BCN8-1 0
LTl 021 CCN8-1 0
LT1021DCN8-10
LT1021-5
VIN=10V, IOUT=O, TA=25°C, Mil or Comm version, unless otherwise noted
PARAMETER
CONDITIONS
Output Voltage (Note 1)
LT1021C-5
LT1 021 B-5, D-5
Output Voltage Temperature
Coefficient (Note 2)
TMIN sTJ sT MAX
LT1021B-5
LT1021C-5, D-5
7.2VsV IN sl0V
Line Regulation (Note 3)
10V SV IN s40V
Load Regulation (Sourcing Current)
Load Regulation (Sinking Current)
as lOUT slOmA
(Note 3)
OSlOUTsl0mA
(Note 3)
Supply Current
Output Voltage Noise (Note 5)
Long Term Stability of
Output Voltage (Note 6)
Temperature Hysteresis of Output
3-42
0.lHzsfsl0Hz
10HzsfslkHz
~t=1000 Hrs
Non-Cumulative
~T= :I: 25°C
LT1021-5
MIN
4.9975
4.95
•
•
•
•
•
TYP
5.000
5.00
MAX
2
3
4
5
20
12
20
6
10
20
35
100
150
1.2
1.5
2
10
60
O.S
3
2.2
15
10
5.0025
5.05
3.5
UNITS
V
V
ppm/DC
ppml"C
ppm/V
ppm/V
ppmlV
ppm IV
ppm/mA
ppm/mA
ppm/mA
ppm/mA
mA
rnA
I'Vp-p
I'Vrms
ppm
ppm
LT1021
ELECTRICAL CHARACTERISTICS
LT1021·7
VIN=12V, IOUT=O, TA=25°C, Mil or Comm version, unless otherwise noted
PARAMETER
Output Voltage (Note 1)
Output Voltage Temperature
Coefficient (Note 2)
Line Regulation (Note 3)
TMIN :5TJ:5T MAX
LT1021A-7
LT1021B-7
LT10210-7
8.5V:5V IN :512V
12V:5VIN :540V
Load Regulation (Sourcing Current)
0:51 0UT :510mA
(Note 3)
Load Regulation (Shunt Mode)
1. 2mA :51 SHUNT :51 OmA
(Notes 3,4)
Supply Current (Series Mode)
Minimum Current (Shunt Mode)
VIN is Open
Output Voltage Noise (Note 5)
0.lHz:5f:510Hz
10Hz:5f:51kHz
~t=1000 Hrs
Non-Cumulative
~T= ±25°C
Long Term Stability of
Output Voltage (Note 6)
Temperature Hysteresis of Output
LT1021-7
CONDITIONS
UNITS
MIN
TYP
MAX
6.95
7.00
7.05
V
1
2
3
1
2
0.5
1
12
2
5
20
4
8
2
4
25
40
100
150
1.2
1.5
1.0
1.2
ppm/oC
ppm/oC
ppm/oC
•
•
•
•
•
50
0.75
0.7
•
4
2.5
7
4
ppm/V
ppm/V
ppm/V
ppm/V
ppm/rnA
ppm/rnA
ppm/rnA
ppm/rnA
rnA
rnA
rnA
rnA
!,Vp-p
I'Vrms
ppm
ppm
3
ELECTRICAL CHARACTERISTICS
LTl021·10
VIN=15V, IOUT=O, TA=25°C, Mil or Comm version, unless otherwise noted
PARAMETER
CONDITIONS
Output Voltage (Note 1)
LT1021C-l0
LT1021A-l0, B-l0, 0-10
Output Voltage Temperature
Coefficient (Note 2)
TMIN :5TJ:5TMAX
LT1021A-l0
LT1021B-l0
LT1021C-l0, 0-10
11.5V :5V IN :514.5V
Line Regulation (Note 3)
14.5V:5VIN:540V
Load Regulation (Sourcing Current)
Load Regulation (Shunt Mode)
0:51 0UT :510mA
(Note 3)
1. 7mA:51 SHUNT:51 OmA
(Notes 3, 4)
Series Mode Supply Current
Shunt Mode Minimum Current
VIN is Open
Output Voltage Noise (Note 5)
0.lHz:5f:510Hz
0.lHz:5f:51kHz
~t=1000 Hrs
Non-Cumulative
~T= ±25°C
Long Term Stability of
Output Voltage (Note 6)
Temperature Hysteresis of Output
LT1 021-1 0
•
•
•
•
•
•
MIN
TYP
MAX
9.995
9.95
10.00
10.00
10.005
10.05
1
2
5
1
2
5
20
4
6
2
4
25
40
100
150
1.7
2.0
1.5
1.7
0.5
12
50
1.2
1.1
6
3.5
15
5
6
UNITS
V
V
ppm/oC
ppm/oC
ppm/oC
ppm/V
ppm/V
ppm/V
ppm/V
ppm/rnA
ppm/rnA
ppm/rnA
ppm/rnA
rnA
rnA
rnA
rnA
!,Vp-p
!'Vrms
ppm
ppm
3-43
Ell
LT1021
The. denotes the specifications which apply over the full operating
temperature range.
Note 1: Output voltage is measured immediately after turn-on. Changes
due to chip warm-up are typically less than 0.005%.
Note 2: Temperature coefficient is measured by dividing the change in
output voltage over the temperature range by the change in temperature.
Separate tests are done for hot and cold; TMIN to 25°C, and 25°C to
TMAX. Incremental slope is also measured at 25°C. Forthe "A" version
only, a box method is used from O°C to 70°C with a height of
2ppm/oC x 70°C = 140ppm. Military "A" grades receive an additional
-55°C to +125°C tesllo ±5ppm/oC.
Note 3: Line and load regulation are measured on a pulse basis. Output
changes due to die temperature change must be taken into account
separately. Package thermal resistance is 150°C/W for TO-5 (H), and
130°C/W for N.
Note 4: Shunt mode regulation is measured with the input open. With
the input connected, shunt mode current can be reduced to OmA. Load
regulation will remain the same.
Note 5: RMS nOise is measured with a single high pass filter at 10Hz
and a 2-pole low pass filter at 1kHz. The resulting output is full wave
rectified and then integrated for a fixed period, making the final reading
an average as opposed to RMS. A correction factor of 1.1 is used to convert from average to RMS, and a second correction of 0.88 is used to
correct for the non-ideal bandpass of the filters.
Peak-to-peak noise is measured with a single high pass filter at 0.1 Hz
and a 2-pole low pass filter at 10Hz. The unit is enclosed in a stili-air
environment to eliminate thermocouple effects on the leads. Test time is
10 seconds.
Note 6: Consult factory for units with long tefm stability data.
TYPICAL PERFORmAnCE CHARACTERISTICS
Ripple Rejection
115
,V
. /V
~
:z
52100
~
V
..-t"
lT10~HO
0
!rlUl
LT1021-5
a:
95
/'
90
o
5
10
15 20 25 30
INPUT VOLTAGE (V)
35
40
~ 10
~
5
9
8
7
6
'"
LT102HO
!5
I'
0.8
I"
LT1021-7
I ........
lT1021-5
1
1
1
10
3-44
2
o
10k
14
-
r-
OUT
_
~.
-
'"
~300
~ 250
w
:;l! 200
!:i
o
I
['...
> 150
LT1021-7
TlME("s)
10
12
III
III
lT1021-10
1
100 r--...
6
6 8 10 12 14 16 18 20
OUTPUT CURRENT (mA)
400
/ h:~-tJ-
4
4
350
50
12
j =2S 0 C
Output Voltage Noise
Spectrum
1~T10~1-10
I/'I'..
10
k. k
~ 0.4
I I
I I
6
8
TIME (PS)
o
II. . .
!5
100
lk
FREQUENCY (Hz)
~
I I
4
V
I--"" V'
T) 125°C
0.2
10
11
L
~
:=
9 0.6
1"1'
OY
1
~
Start·up (Shunt Mode)
LT1021·7 and LT1021·10
I I
I I
VIN=OTO 12V
11
g
1.0
50
12
~
~
§i:
60
Start·up (Series Mode)
13
Jl~
80
TJ-b . /
U.J
~
70
90
85
b-tIJ
./
~ 1.2
....... !'"
LT1021-~
~100
z
V
1.4
L~lJ2\-~1
110
IT
1.6
II
VIN-15V
120 cour=O
LT1021-7
110
;;;- 105
Ripple Rejection
130
i=l50Hz
Minimum Input·Output
Differential LT1 021·7 and
LT1021·10
o
10
LT1021-7
rrm
100
lk
FREQUENCY (Hz)
10k
LT1021
TYPICAL PERFORmAnCE CHARACTERISTICS
Output Voltage Temperature
Drift LT1021-5
Output Voltage Noise
16
JllJ.ll
Cour=O
14 FILTER=1 POLE
ILOW=0.1Hz
5.004
12
~
Load Regulation LT1021-5
5.006 r---r-,---r---r-,---r--,
§ 5.002 r--+-~-+--+-~-+--1
10
'";'!;
w
en
~
II
en
a:
'"
LT102HO
Jd:2
V
§!
~'\
......
5.000
1-----"--T"'-l--+-+---1--+"""""I
~ 4.998 r--+-~-+--+-~-+--1
...<>'1;
~
5
......
VIN=8V
r--+-~-+--+-~-+--1
'/
~ -1
is
-2
-3
4.996 r--+-~-+--+---t--t--1
-4
4.994 '----'----'--"-----'----'--"-----'
-50 -25
0
25
50
75 100 125
TEMPERATURE ('C)
10k
100
1k
BANDWIDTH (Hz)
10
V
I
LT1021-5
o
,.....1'
!
Quiescent Current
LT1021-5
-5
-10 -8 -6 -4 -2 0 2 4 6
SOURCING
SINKING
OUTPUT CURRENT (mA)
Sink Mode* Current Limit
LT1021-5
60
1.8
10ur=0
VIN=8V
~OWER=2001T111
~ 1.0
Ir
G o.S
If
5
~ 0.6
0.4
o
1/
o
w
0
T=25'C
12
~
T-125'C
30
i--' ~
t-
ill
"
20
/
f--
~~oJo
I
R!GU~I0I'!.._
......
u
t~-1.0
~ERMAL
r-- 1 t REGULATION
- -
5o
~
u
ILOAD=10mA
10
10
15 20
25 30
INPUT VOLTAGE (V)
35
40
Load Transient Response
LT1021-5, CLOAO=O
.<1JSOURCE = 100pAp-p
'> t--t""':P--+---'l'--1.......i--:.....-+--+-i
c r-~~~-+~~~~~~-r-1
~ r-+--hr+-+~-i~+-+-r~-r-1
o
o
6
8 10 12 14 16 18
OUTPUT VOLTAGE (V)
"NOTE THAT AN INPUT VOLTAGE IS REQUIREO
FOR 5V UNITS.
Load Transient Response
LT1021-5, CLOAO=1000pF
ISD~R~tO r,
111
v
j
20mV
~
u
I SDURCE=0.2mA
I
I
...
o ~~4-~-+~~ ~+-~~~
~
5
r--
r
100 120 140
FILTERING=1 ZERO AT 0.1Hz
2 POLES AT 10Hz
I t 1\
VISINK=0.2mA
1
40 60 80
TIME (ms)
r--5~vrt
V
20mV
rr'""'•
1.. 1
i'l 1
al SOURCE = 100pAp-p
o
~
20
Output Noise O.1Hz to 10Hz
LT1021-5
,ISINK=2-10mA-
I SOURCE = 2-1 OmA
0123401234
TIME (1'5)
'I~INK~O
ii\L
III j
ItA
~~.-~-r-+--1.......~+-~~~
~
5
'" -0.5
:2
z
~
=>
I
0.2
~
1 40
T= -55'C
t-
II
VIN-25V
50
1 1.2
10
Thermal Regulation
LT1021-5
1.6
1.4
8
......
.M
i
1
I
, aISINK=100pAp-p
10 15 20 0
TIME (1'5)
5
10 15
20
234
TIME (MINUTES)
3-45
LT1021
TYPICAL PERFORmAnCE CHARACTERISTICS
Output Voltage Temperature
Drift LT1021-7
Load Regulation
LT1021-7, 10
7.003
r---r-,--,---Y-,--,---,
7.002
1---+-+-+--+-+-+--+
~ 7.001 1---+-+-+--+-+-+--+
~
~ 7.000
g
"t-,-+-+--+-+-i-""'I
~
g 6.999 1---+-+-+--+-+-+--+
6.998
'> 2
1
~
<>
;; -1
:=
5
~
a:
0.4
5
0.2
o
f-
~
:::>
0
~
( ~~ J
-3
0.4
-4
0.2
~
1 'i J
lt~
I
IJ.-.
'SOURCE=2-10mA
-1.0
REGULATION
r-- ~~OAD
~-----
) THERMAL'
REGULATION_ r--
-1.5
ILOAD=10mA
10
o
Load Transient Response
LT1021-7, CLOAO=O
'SOURCE=0.5mA
o
10
:::>
012345678
OUTPUT TO GROUND VOLTAGE (V)
"tNKlo.8~A
.r
8
II""
a:
."
5rnV
TJ=125"C
V,N-27V
40
f-
Y
II
oJ
INPUT PIN OPEN
:;;
~
Tj=25"C
:;;
50
'I.Y 1)(
.....
Jt
Tj- -55"C
ir 0.6
-10 -8 -6 -4 -2 0 2 4 6
SOURCING
SINKING
OUTPUT CURRENT (mA)
!
T,=-55"C
I
0 .8
f-
-2
60
'SOURCE=O
-
1.0
5
f-
Shunt Mode Current Limit
LT1021-7
,.
~ 0.6
l12
i!
-5
INPUT PIN OPEN
!;
o
-I-- I--
1.4
./
,/
S
~
Shunt Characteristics
LT1021-7
1.0
10ur=0
1.6
/
I--+-+-+----+-+-+----i
l!:; 0.8
1.8
V,N=12V
6.997 L..--L_...J...._.l---I._...J...._.l--'
-50 -25
0
25
50
75 100 125
TEMPERATURE ("C)
1.2
Quiescent Current
LT1021-7
I ,I
"SINKn2t
o
6
8 10 12 14
OUTPUT VOLTAGE (V)
16
18
Output Noise O.1Hz to 10Hz
LT1021-7
Load Transient Response
LT1021-7, CLOAO=1000pF
-
5
9.998
9.994
-50 -25
0
25
50
75
TEMPERATURE (OC)
100
-2
i
-4
0.2
60
INPUT PIN OPEN
§
1.0
~
0.8
~
T'~-55°C
I
~ 0.6
r:c
a 0.4
o
o
iii
r:c 20
ISOURCE~O
rll
r:c
=>
12
41 SINK - 100pAp-p
Ifl
ljlSINK~0.8mA
rl
ISOURCE~0.2mA
J I l
IsotCEt2-1~A
o
o
41 SOURCE ~ 100pAp-p
ISOURCE~O ~
I I
0123401234
TlME(i- -1.0
,.- I- /
>-
J
2
4
6
8
10
OUTPUT TO GROUND VOLTAGE (V)
~ -0.5
0
I
0.2
!
w
30
10
4POWER ~120'
~
~
IJ
o
VIN~3OV
>- 40
I...............
.4/
./'\~ ..- ........
/ ' <=boc
LV
>-
o
10
,
INPUT PIN IS OPEN
50
1.2
v
Thermal Regulation
LT1021-10
1.6
~ 1.4
VI
0.6
0.4
TI_125°C
II
III
a 0.8
Shunt Mode Current Limit
LT1021-10
1.8
(
~ 1.0
-3
Shunt Characteristics
LT1021-10
~
1.2
>-
-5
-10 -8 -6 -4 -2 0 2 4 6 8
SOURCING
SINKING
OUTPUT CURRENT (rnA)
125
~
"
---
TJ~J5OC
1.4
./
2
TI~~55"d
IOUT~O
1.6
/
10.004
11\
!
VISINK~2-10mA
I I
0246802468
TIME (pO)
NOTE VERTICAL SCALE CHANGE
BETWEEN SOURCING AND SINKING
234
TIME (MINUTES)
3-47
LT1021
APPLICATions InFoRmATion
Effect of Reference Drift on System Accuracy
A large portion of the temperature drift error budget in
many systems is the system reference voltage. This
graph indicates the maximum temperature coefficient
allowable if the reference is to contribute no more than
lhLSB error to the overall system performance. The example shown is a 12-bit system designed to operate over
a temperature range from 25°C to 65°C. Assuming the
system calibration is performed at 25°C, the temperature
span is 40°C. It can be seen from the graph that the
temperature coefficient of the reference must be no worse
than 3ppml °C if it is to contribute less than lhLSB error.
For this reason, the LT1021 family has been optimized for
low drift.
Maximum Allowable Reference
Drift
100
\
\
~BIT
"
r---- r-..
""-
The LT1021-10 "C" version is pre-trimmed to :!::5mV
and therefore can utilize a restricted trim range. A 75kO
resistor in series with a 20kO potentiometer will give
:!:: 10mV trim range. Effect on output TC will be only
1ppm/oC for the :!::5mV trim needed to set the "C"
device to 10.000V.
LT1021·5
The LT1021-5 does have an output voltage trim pin, but
the TC of the nominal4V open circuit voltage at this pin is
about -1. 7mV1°C. For the voltage trimming not to affect reference output TC, the external trim voltage must
track the voltage on the trim pin. Input impedance of the
trim pin is about 1OOkO and attenuation to the output is
13: 1. The technique shown below is suggested for trimming the output of the LT1021-5 while maintaining minimum shift in output temperature coefficient. The R1 IR2
ratio is chosen to minimize interaction of trimming and TC
shifts, so the exact values shown should be used.
r-.,10-BIT1
LT102'1-5
S-BIT
~14-BIT
1.0
~
10 20
"""'" r-.....
r- r--
-IN
-
a!p
0IlT
TlU.M
L
30 40 50 60 70 80 90 100
TEMPERATURE SPAN (OC)
VOUT
Rl
27k
..
1;;148
R2
50k
Trimming Output Voltage
LT1021·10
LT1021·7
The LT1021-10 has a trim pin for adjusting output voltage. The impedance of the trim pin is about 12kOwith a
nominal open circuit voltage of 5V. It is designed to be
driven from a source impedance of 3kO or less to minimize changes in the LT1021 TC with output trimming.
Attenuation between the trim pin and the output is 70:1.
This allows :!:: 70mV trim range when the trim pin is tied
to the wiper of a potentiometer connected between the
output and ground. A 10kO potentiometer is recommended, preferably a 20 turn cermet type with stable
characteristics over time and temperature.
The 7V version of the LT1 021 has no trim pin because the
internal architecture does not have a point which could be
driven conveniently from the output. Trimming must
therefore be done externally, as is the case with ordinary
reference diodes. Unlike these diodes, however, the output of the LT1021 can be loaded with a trim potentiometer. The following trim techniques are suggested; one
for voltage output, and one for current output. The voltage output is trimmed for 6.95V. Current output is 1mA,
as shown, into a summing junction, but all resistors may
be scaled for currents up to 10mA.
3-48
LT1021
APPLICATions InFORmATion
Both of these circuits use the trimmers in a true potentiometric mode to reduce the effects of trimmer TC. The
voltage output has a 2000 impedance, so loading must
be minimized. In the current output circuit, R1 determines output current. It should have a TC commensurate
with the LT1021 or track closely with the feedback
resistor around the op amp.
-IN
tTl!l2H
1lIlT
R2
14k'
1%
tlND
R3
10k
.".
Kelvin Connections
Rl
200II
1%
VOUT
=6.9S0V
, TC TRACKING TO SOppm/·C
LT1!121-7
our
-IN
tlND
Rl'
7.1Sk
R2"
182k
R3
SOk
...
internal current drain on the output, actual worst-case occurs at ILOAO =0 on LT1021-5, ILOAD = -O.SmA (sinking)
on LT1021-7, and ILOAD = 1.4mA (sinking) on LT1021-10.
Significantly better load transient response is obtained by
moving Slightly away from these points. See Load Transient
Response curves for details. In general, best transient
response is obtained when the output is sourcing current. In
critical applications, a 10p,F solid tantalum capacitor with
several ohms in series provides optimum output bypass.
Although the LT1 021 does not have true force/ sense
capability at its outputs, significant improvements in
ground loop and line loss problems can be achieved
with proper hook-up. In series mode operation, the
ground pin of the LT1 021 carries only ... 1rnA and can
be used as a sense line, greatly reducing ground loop
and loss problems on the low side of the reference. The
high side supplies load current so line resistance must
be kept low. Twelve feet of # 22 gauge hook up wire or
1foot of 0.025 inch printed circuit trace will create 2mV
loss at 1OmA output current. This is equivalent to 1LSB
in a 10V, 12-bit system.
I11.000mA
~$>l~i
+ OPAMP
r
The circuits below show proper hook up to minimize
errors due to ground loops and line losses. Losses in the
output lead can be greatly reduced by adding a PNP boost
transistor if load currents are 5mA or higher. R2 can be
added to further reduce current in the output sense lead.
-!
Standard Series Mode
'RESISTOR TC OETERMINES lOUT TC
"TC '" 10 x Rl TC. R2 AND R3 SCALE
WITH Rl FOR DIFFERENT OUTPUT CURRENTS.
lT1Ol1
INPUT
It!
OUt
KEEP THIS LINE RESISTANCE LOW
Capacitive Loading and Transient Response
The LT1021 is stable with all capacitive loads, but for optimum settling with load transients, output capacitance
should be under 1000pF. The output stage of the reference
is class AB with afairly low idling current. This makes transient response worst-case at light load currents. Because of
~~~~~------------..
3-49
Ell
LT1021
APPLICATions InFoRmATion
Series Mode with Boost Transistor
INPUT_---,
Ltt02l
QUT t -......- - - - '
~~~~~-----6------~
·OPTIONAl-REDUCES CURRENT IN OUTPUT SENSE LEAD
R2=2.4k (LTl021-S), 3k (LT1021-7), S.6I< (LT1021-10)
shielded from ambient air with a small foam cup. The cup
was then removed for the second half of the trace. Ambient in both cases was a lab environment with no excessive air turbulence from air conditioners, opening/
closing doors, etc. Removing the foam cup increases the
output noise by almost an order of magnitude in the
O.01Hz to 1Hz band! The kovar leads of the TO-5 (H)
package are the primary culprit. Alloy 42 and copper lead
frames used on dual-in-line packages are not nearly as
sensitive to thermally generated noise because they are
intrinsically matched.
There is nothing magical about foam cups-any enclosure which blocks air flow from the reference will do.
Smaller enclosures are better since they do not allow the
build-up of internally generated air movement. Naturally,
heat generating components external to the reference
itself should not be included inside the enclosure.
Effects of Air Movement on Low Frequency Noise
The LT1 021 has very low noise because of the buried
zener used in its design. In the 0.1Hz to 10Hz band,
peak-to-peak noise is about O.5ppm of the DC output. To
achieve this low noise, however, care must be taken to
shield the reference from ambient air turbulence. Air
movement can create noise because of thermoelectric differences between IC package leads (especially kovar
lead TO-5) and printed circuit board materials and/or
sockets. Power dissipation in the reference, even though
it rarely exceeds 20mW, is enough to cause small temperature gradients in the package leads. Variations in
thermal resistance, caused by uneven air flow, create differentiallead temperatures, thereby causing thermoelectric voltage noise at the output of the reference. The XV
plotter trace shown below dramatically illustrates this effect. The first half of the plot was done with the LT1021
3-50
Noise Induced by Air
Turbulence (TO-5 Package)
LT1021-7 (TO-S PACKAGE)
f=0.01HzTO 10Hz
20r
l
1+ FOAM CUP REMOVED
IV
f\..
4
6
8
TIME (MINUTES)
...I
'""
10
12
.Ji.:TUIW
LT1021
APPLICATion CIRCUITS
LT1021-10 Full Trim Range (:1::0.7%)
LT1021-10
VIN
IN
Negative Series Reference
+15V
OUT
Vour
Rl
lT1021-l0
4.7k
Rl'
IN
10k
-15V-+-....J
'CAN BE RAISED TO
2OkO FOR LESS
CRITICAL APPLICATIONS
Boosted Output Current With No Current Limit
Ell
-"---.....---@~~
Boosted Output Current With Current Limit
V+ ;"Vour+2.BV .....- -........- - - - ,
V+ ;"evour+ 1.BV) .....- - - ,
l~~· -2?-
Rl
Rl
2200
8.20
2200
+
10V
@100mA
10V
@100mA
2pF
SOLiO
q.F
SOLID
TANT
TANT
'GLOWS IN CURRENT LIMIT.
00 NOT OMIT.
3-51
LT1021
APPLICATion CIRCUITS
Ultra Precise Current Source
Handling Higher Load Currents
+15V
+15V
LT1D2H
IN
QUTI-......- - - - - .
-
30rnA
IN
17.4k
R1"
16911
1%
1021-10 0i.Il't---t--VOUT10V
6.96k"
0.1%
"SELECT R1 TO DELIVER TYPICAL LOAD CURRENT.
LT1021 WILL THEN SOURCE OR SINK AS NECESSARY
TO MAINTAIN PROPER OUTPUT. 00 NOT REMOVE LOAD
AS OUTPUT WILL BE DRIVEN UNREGULATED HIGH. LINE
REGULATION IS DEGRADED IN THIS APPLICATION.
IOUT=1rnA
REGULATION < 1ppm/V
COMPLIANCE = -13V TO + 7V
"LOWTC
Strain Gauge Conditioner for 3500 Bridge
R1
35m
112W
128rnA
LT1021-1l)
+15V
t
28.5rnA
OOTH---';;"""-...,
IN
GND
VOUT
X100
......- - - - - - -.... -5V
35m
1/2W
-15V
"THIS RESISTOR PROVIDES POSITIVE FEEDBACK TO
THE BRIDGE TO ELIMINATE LOADING EFFECT OF
THE AMPLIFIER. EFFECTIVE liN OF AMPLIFIER
STAGE IS .. 1MII. IF R2-R5 ARE CHANGED,
SET R6=R3.
3-52
""BRIDGE IS UL1RA LINEAR WHEN ALL LEGS ARE
ACTIVE, TWO IN COMPRESSION AND TWO IN TENSION,
OR WHEN ONE SIDE IS ACTIVE WITH ONE COMPRESSED
AND ONE TENSIONED LEG.
tOFFSET AND DRIFT OF LM301A ARE VIRTUALLY
ELIMINATED BY DIFFERENTIAL CONNECTION OF LT1012C.
LT1021
APPLICATion CIRCUITS
Ultra Linear Platinum Temperature Sensor*
lT102HO
OUT
IN -
+20V
GND
*
R2'
5k
Rl"
253k
J.~4
RIO
182k
1%
Rll
6.65M
1%
R15
10k
R8
10M
R9
lOOk
Ri"'
654k
':'
.l:R12
lk
':'
R3"
5k
~~
-,
r
Rst
10011
@ooci
I
R~'
R4
4.75k
1%
200k
1%
-.J
L
~
1%
R13
.
243k
~
7
2 _
~
3 .
+
I"
I
392k
R5
6':'
Vour=lOOmV/oC
-50°C"T "l50°C
4
-15V
R6
619k
1%
tSTANDARD INDUSTRIAL 10011 PlATINUM 4-WIRE SENSOR,
ROSEMOUNT 78S, OR EQUIVALENT. 0<=0.00385
TRIM R9 FOR VOUT=O @ O°C
TRIM R12 FORVour=10V @ 1OO°C
TRIM R14 FOR Vour=5V @ 50°C
USE TRIM SEQUENCE AS SHOWN. TRIMS ARE NON-INTERACTIVE
THAT ONLY ONE TRIM SEQUENCE IS NORMALLY REQUIRED.
-15V
so
'FEEDBACK LINEARIZES OUTPUT TO '" 0.005°C FROM
_50°C TO + 15O"C
"WIREWOUNO RESISTORS WITH LOW TC
Restricted Trim Range for Improved
Resolution, 10V, "e" Version Only
lT1021-1Q
LTl021!HO
-IN
10.000v
OUT
GNU tRIM
l
Trimming 10V Units to 10.24V
-IN
OUT I- VOUT=10 .24V
1]mI liND
I
Rl
75k
*
R2
50k
4.32k
5k
TRIM RANGE
='" 10mY
Y-=-15Y'
'MUST BE WELL REGULATED
~~
dY- = V
3-53
LT1021
APPUCATlon CIRCUITS
Negative Shunt Reference Driven
by Current Source
2-Pole Low Pass Filtered Reference
...oor
~
.'"
tlNI)
>-4)+VREf
TOTAl NOISE
f=1OHz
s2pVrms
1Hzsfs1OkHz
270
--------------------~------~-V~F
-11VTO -4OV
CMOS oAC with Low-Drift Full Scale Trimming··
R3
4.02k
1%
fB'r--.....--------+-(
R4.
~~LSCALE
ADJUST
CMOS
DAC
7520, ETC.
1.2k
-15V
3-54
·TC LESS THAN 200ppmI'C
··NO ZERO ADJUST REQUIRED
WITH LT1007 (VOS"60~V)
10Y
F.S.
LT1021
APPLICATion CIRCUITS
Operating 5V Reference from 5V Supply
. . . - - -......_ _ _ _ _ _ _ _ _ +5V LOGIC SUPPLY
LTlIl21-5
ooT
+5V
REFERENCE
UNO
'FOR HIGHER FREQUENCIES C1 AND C2 MAY BE DECREASED.
"PARALLEL GATES FOR HIGHER REFERENCE CURRENT LOADING.
II
Precision OAC Reference with System TC Trim
LTlIl2FID
+15V -III
0tJT
8.87k
1%
GNO
50k
ROOM TEMP
D1"
1N457
50k
TCTRIM'
1.24k
1%
10k
1%
.".
10k
1%
~, ~~457
~
10.36k
1%
200k
1%
r
50k
!1~
8.4~k
DAC
'TRIMS 1~ REFERENCE CURRENT
TC BY ",4Oppm/oC. THIS TRIM
SCHEME HAS VERY LlTILE EFFECT ON ROOM
TEMPERATURE CURRENT TO MINIMIZE ITERATIVE
TRIMMING.
3-55
LT1021
EQUIVALEnT SCHEmATIC
.------.....-+......t--+-OUTPUT
Rl
R2
-4~--------~~-----~GND
PACKAGE DESCRIPTiOn
H Package
N8 Package
8 Lead Plastic
Metal Can
~~0,240t.280
~1(6'~r'2)
J 1_
r
0,040 MAX
(1,016)
O,DIiO
11,524)
SO
0,370-0400
I9,400-10 16)--,
0,Q2Q
10,508)
-'1 r
0005
O.155-~0-"-75-_Mtl~b-=,,=---r=-:r-ti (O~I~I
(3937-4.445)
,Fi
,
-/" L
OO _W
to
0,290-0,310
(7,366-7,874)
NOTE: DIMENSIONS IN INCHES UNLESS OTHERWISE NOTED
·LEADS WITHIN 0,007 OF TRUE POSITION (TP) AT GAUGE PLANE
3-56
0±5
I
"
"
NOTE: DIMENSIONS IN INCHES (MIWMETERS)
0
7
I
tI
~
10,203-0,381)
TVP
~"Y"llnlt\l2
LT1021DCS8
~)r
T8CHNOLoG~~~---------P-r-e-c-isi-o-n-R-e-fe-r-e-n-c-e
FEATURES
DESCRIPTion
•
•
•
•
•
The LT1021 is aprecision reference with ultra low drift and
noise, extremely good long term stability, and almost total
immunity to input voltage variations. The reference output
will both source and sink up to 10mA. Three voltages are
available; 5V, 7V and 10V. The 7V and 10V units can be
used as shunt regulators (two terminal zeners) with the
same precision characteristics as the three terminal connection. Special care has been taken to minimize thermal
regulation effects and temperature induced hysteresis.
Low Drift-20ppm/oC Max Slope"
Trimmed Output Voltage"
Operates in Series or Shunt Mode
Output Sinks and Sources in Series Mode
Very Low Noise <1ppm p-p(0.1Hzto 10Hz)
• >100dB Ripple Rejection
• Minimum Input-Output Differential of 1V
• 100% Noise Tested
The LT1021 references are based on a buried zener diode
structure which eliminates noise and stability problems
associated with surface breakdown devices. Further, a
subsurface zener exhibits better temperature drift and ~
time stability than even the best band-gap references.
...
APPLICATions
•
•
•
•
•
•
Ato Dand Dto AConverters
Precision Regulators
Digital Voltmeters
Inertial Navigation Systems
Precision Scales
Portable Reference Standard
Unique circuit design makes the LT1021 the first IC reference to offer ultra low drift without the use of high power
on-chip heaters.
The LT102H uses no resistive divider to set output voltage, and therefore exhibits the best long term stability and
temperature hysteresis. The LT1021-5 and LT1021-10 are
intended for systems requiring a precise 5V or 10V reference, with an initial tolerance as low as 0.05%. "
'Unils specified al10pprnl°C maximum drift and 0.1% oulputvollage loler.
anca are available on request.
Basic Positive and
Negative Connections
LT1021
VIN
IN
Your
IN
NC
OUT
IN
':'
GND
GND
R1 = Vour- (V-)
IlOAO+1.5mA
R1
(V-)
tll
15
z
w
'"'
;:3
-5V
':'
-Your
Vour- (V-)
R1=
IlOAD+ 1.5mA
0
>
to;
R1
FILTERING = 1 ZERO AT O.lHz
2 POLES AT 10Hz
~ r--1LV!l Ppl)
OUT
'::"
GND
:;~
LTlO21
(7 AND 10 ONLY)
LT1021-5
~3V
OUT
Output Noise 0.1 Hz
to 10Hz-LT1021·10
i
~
=>
0
-15V
(v-)
2
3
4
TIME (MINUTES)
3-57
LT1021DCS8
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
""o·c
Input Voltage .......................... , •. , '" ...... 40V
Input·Output Voltage Differential .................... 35V
Output to Ground Voltage (Shunt Mode Current Limit)
LT1021·5 ......................................... 10V
LT1021·7 ......................................... ,10V
LT1021·10 ........................................ 16V
Trim Pin to Ground Voltage
Positive ................................ Equal to VOUT
Negative ..................... '.................. - 20V
Output Short Circuit Duration
VIN 35V ...................................... 10 sec
VIN :s20V ................................... Indefinite
Operating Temperature Range ............... OOC to 70°C
Storage Temperature Range
All Devices ........................... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
TOP VIEW
ORDER PART
NUMBER
VIN 2 '
7 NC'
NC' 3 .'
6 VOUT
GND 4 '
5 TRIM"
LT1021 DCS8·5
LT1021 DCS8·7
, LT1021DCS8·10
S8 PACKAGE
PLASTIC SO
PART MARKING
'CONNECTED INTERNALLY. DO
NOT CONNECT EXTERNAL CIRCUITRY
TO THESE PINS.
"NO TRIM PIN ON LT1021·7. DO NOT
CONNECT EXTERNAL CIRCUITRY TO
PIN 5 ON LT1021-7.
=
,2105 (5V VERSION)
2107 (7V VERSION)
2110 (10V VERSION)
ELECTRICAL CHARACTERISTICS LTl 021-5 VIN =10V, lOUT =0, TA =25°C, unless otherwise noted
PARAMETER
Output Voltage (Note 1)
Output Voltage Temperature
Coefficient (Note 2)
Line Regulation (Note 3)
CONDITIONS
0°CsTJs70°C
7.2VsVlNs10V
10VsVIN s40V
Load Regulation (Sourcing Current)
Load Regulation (Sinking Current)
Osioursl0mA
(Note 3)
Osiours10mA
(Note 3)
Supply Current
Output Voltage Noise (Note 5)
Long Term Stability of
Output Voltage
Temperature Hysteresis of Output
MIN
4.95
0.lHzsfs10Hz
10HzsfslkHz
LT1021I).S
TYP
5.00
5
4
•
•
2
10
•
60
•
0.8
•
3
2.2
15
MAX
5.05
20
UNITS
V
ppm/oC
12
20
6
10
20
35
100
150
1.2
1.5
ppmlV
ppmlV
ppmN
ppmlV
ppm/rnA
ppm/rnA
ppm/rnA
ppm/rnA
rnA
rnA
3.5
ppm/v'khrS
10
aT= ±25°C
~Vp·p
~Vrms
ppm
ELECTRICAL CHARACTE RISTICS LTl 021-7 VIN =12V, lOUT =0, TA =25°C, unless otherwise noted
PARAMETER
Output Voltage (Note 1)
Output Voltage Temperature
Coefficient (Note 2)
3-58
CONDITIONS
TMINSTJsTMAX
MIN
6.95
LT10211).7
TYP
7,00
5
MAX
7.05
20
UNITS
V
ppm/oC
LT1021DCS8
ELECTRICAL CHARACTE RISTICS LTl021-7 VIN = 12V, lOUT = 0, TA = 25°C, unless otherwise noted
PARAMETER
Line Regulation (Note 3)
CONDITIONS
8.5VsV1NSI2V
12VsV1N s40V
Load Regulation (Sourcing Current)
Load Regulation (Shunt Mode)
Osioursl0mA
(Note 3)
1.2mAsisHUNTsl0mA
(Notes 3,4)
Supply Current (Series Mode)
Minimum Current (Shunt Mode)
V1NisOpen
Output Voltage Noise (Note 5)
0.lHzsfsl0Hz
10HzsfslkHz
Long Term Stability of
Output Voltage
Temperature Hysteresis of Output
MIN
•
•
•
•
LT1021D·7
TYP
1
2
0.5
1
12
50
0.75
•
0.7
•
4
2.5
7
MAX
4
8
2
4
25
40
100
150
1.2
1.5
1.0
1.2
4
ppm
3
II.T= ±25°C
UNITS
ppmN
ppmN
ppmN
ppmN
ppm/mA
ppm/mA
ppm/mA
ppm/mA
mA
mA
mA
mA
I'Vp·p
I'Vrms
ppm/VkhrS
ELECTRICAL CHARACTERISTICS LTl021-10 VIN = 1SV, IOUT=O, TA = 25°C, unless otherwise noted
PARAMETER
Output Voltage (Note 1)
Output Voltage Temperature
Coefficient (Note 2)
Line Regulation (Note 3)
CONDITIONS
TM1NsTJsTMAX
11.5VsV1N sI4V.5
14.5VsVINS4OV
Load Regulation (Sourcing Current)
Load Regulation (Shunt Mode)
Oslours 10mA
(Note 3)
1.7mA s ISHUNTS 10mA
(Notes3,4)
Series Mode Supply Current
Shunt Mode Minimum Current
Output Voltage Noise (Note 5)
MIN
9.95
V1NisOpen
0.IHzsfsl0Hz
O.IHzsfslkHz
Long Term Stability of
II.t=IOOOHrs
Output Voltage
Non-Cumulatlve
Temperature Hysteresis of Output
II.T= ±25°C
The. denotes the specifications which apply over the full operating temperature range_
Notel: Output voltage is measured Immediately after turn-on. Changes
due to chip warm-up are typically less than 0.005%.
Note 2: Temperature coefficient is guaranteed as a slope from room temperature (25°C) to OOC and 70°C, also known as a "butterfly" specification.
Note 3: Line and load regulation are measured on a pulse basis. Output
changes due to die temperature change must be taken Into account separately_ Package thermal resistance is 110°CJW.
•
•
•
•
•
•
LT1021D-10
TYP
10.00
5
1
0.5
12
50
1.2
1.1
6
3.5
15
MAX
10.05
20
4
6
2
4
25
40
100
150
1.7
2.0
1.5
1.7
6
UNITS
V
ppm/DC
ppmN
ppmN
ppmN
ppmN
ppm/mA
ppm/mA
ppm/mA
ppm/mA
mA
mA
mA
mA
I'Vp·p
I'Vrms
ppmNkhrs
ppm
5
Note 4: Shunt mode regulation is measured with the input open_ With the
input connected, shunt mode current can be reduced to OmA. Load regulation will remain the same.
Note 5: RMS noise is measured with asingle high pass filter at 10Hz and a
2-pole low pass filter at I kHz. The resulting output is full wave rectified and
then integrated for a fixed period, making the final reading an average as
opposed to RMS. Acorrection factor of 1.1 is used to convert from average
to RMS, and a second correction of 0.88 is used to correct for the non-ideal
bandpass of the filters.
Peak-to-peak noise is measured with a single high pass filter at 0.1 Hz and a
2-pole low pass filter at 10Hz. The unit is enclosed in a still-air environment
to eliminate thermocouple effects on the leads. Test time is 10 seconds.
3-59
II
NOTES
3-60
,-,,.'"llnlJ\Q
~,
LTl029/LTl029A
TECHNOLOOI!:'~~---5-V-Ba-n-d-g-a-p-Re-f-e-re-n-c-e
FEATURES
DESCRIPTion
.0.2% Output Tolerance
• 0.50 Shunt Impedance
• 600ttA to 10mA Operating Current
• Pin Compatible with LM136-5
• 20ppm/oC Max. Drift
• Output Voltage Trim does not Affect Drift
• Can be Used as Positive or Negative Reference
The LT1 029 is a 5V bandgap reference intended for use
in the shunt or "zener" mode, allowing it to be used as
either a positive or negative reference. The output is
pretrimmed to ::1:::0.2% accuracy with 20ppm/oC maximum temperature drift. A trim pin allows additional output adjustment for even more precise output voltage.
APPLICATions
•
•
•
•
Operating current range for the LT1 029 is 600ttA to 10mA.
Extremely low dynamic impedance allows excellent output
regulation even with fluctuating operating current.
The LT1029 will replace an LM136-5 or LM336-5 and
simplify circuits using the' 'minimum temperature coefficient" trim network. The LT1029 does not require this
special network to meet its temperature drift specification
and these application network components are simply
removed. If output trimming is required for initial accuracy, the diodes in the trim network should be replaced
with jumpers.
A-to-D and D-to-A Converters
Precision Regulators
Precision Current Sources
V to F and F to V Converters
TYPICAL APPLICATiOn
Output Voltage Drift
+15V
5.015
R1
10k
5.010
+5V
~
g 5.000
lT1029
-5V
R2
10k
-15V
~5.oo5
...,
tll
LT1029
~ 4.995
./'
5
4.990
4.895
-50 -25
0
25
50
75
100
125
TEMPERATURE (Oe)
3-61
III
LT1029/LT1029A
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Reverse Current ........................ 15mA
Forward Current . ....................... 10mA
Operating Temperature Range
LT1029M/LT1029AM ....... -55°Cto +125°C
LT1029C/LT1029AC ............ O°Cto + 70°C
Storage Temperature. . . . . . . . . .. - 65°C to + 150°C
ORDER PART
NUMBER
LT1029AMH
LT1029MH
LT1029ACH
LT1029CH
Lead Temperature (Soldering, 10sec.) ........ 300°C
H PACKAGE
TO'46 METAL CAN
BOTTOM VIEW
LT1029ACZ
LT1029CZ
Z PACKAGE
TO·92 PLASTIC
BOTTOM VIEW
ELECTRICAL CHARACTERISTICS
PARAMETER
Reverse Breakdown Voltage
Reverse Breakdown Change with Current
CONDITIONS
IR=1mA LT1029AM, LT1029AC
LT1029M, LT1029C
6OOl'AsIRs10mA
Reverse Dynamic Impedance
IR=1mA
Temperature Stability
IR=1mA
Equivalent Temperature Drift
LT1029AC
LT1029C
LT1029AM
LT1029M
lT1029AM. LT1029AC
LT1029C
LT1029M
Long Term Stability
Trim Range
The. denotes the specifications which apply over the full operating
temperature range.
3-62
MIN
4.99
4.95
•
•
•
••
•
•••
TYP
5.00
5.00
2
3
0.2
0.3
3
5
7
10
8
±3
12
15
20
+5, -13
MAX
5.01
5.05
5
8
0.6
1.0
7
12
18
36
20
34
40
UNITS
V
V
mV
mV
{}
{}
mV
mV
mV
mV
ppm/DC
ppml"C
ppm/DC
ppm/kHr
%
LT1029/LT1029A
TYPICAL PERFORmAnCE CHARACTERISTICS
Reverse Characteristics
1.0
0.9
0.8
0.7
! 0.6
ffi
0.5
B
0.4
~
0.3
~TJ=+25°C
TJ-+125
0.2
0.1
o
0" V
Iw'J=-55°C
A'
012345678
OUTPUT TO GROUND VOLTAGE (V)
III
APPLICATions InFORmATion
Output Trimming
Output voltage trimming on the LT1029 is nominally accomplished with a potentiometer connected from output to
ground with the wiper tied to the trim pin. The LT1029 was
made compatible with existing references, so the trim range
is large; + 5%, -13%. This large trim range makes precision trimming rather difficult. One solution is to insert
resistors in series with both ends of the potentiometer. This
has the disadvantage of potentially poor tracking between
the fixed resistors and the potentiometer. A second method
of reducing trim range is to insert a resistor in series with.~he
wiper of the potentiometer. This works well only for a very
small trim range because of the mismatch in TCs between
the series resistor and the internal thin film resistors. These
film resistors can have a TC as high as 500ppm/oC. That
same TC is then transferred to the change in output voltage;
a 1% shift in output voltage causes a (500ppm) (1%)=
5ppm 1° Cchange in output voltage drift. The worst-case error in initial output voltage for the LT1029A is 0.2% and for
the LT1029 is 1%, so a series resistor is satisfactory if the
output is simply trimmed to nominal value. 1ppm/oC TC
shift would be the maximum expected for the LT1 029A and
5ppm/oC for the LT1029.
Wide Trim Range ( + 5%, -13%)
Narrow Trim Range
V+
1
1>:800",4
1
1"'700",4
t-------<~ VREF=5.0ooV
t----1~ VREF
...t.-_.._-+< 25k
TRIM RANGE
0.4% - LT1029A. R1 = 750k
1.2% - Ln029. R1=250k
3-63
LT1029/LT1029A
APPLICATions InFoRmATion
Shunt Capacitance
The LT1 029 is stable with all values of shunt capacitance,
but values between 300pF and 0.011'F are not recommended because they cause longer settling following a
transient in operating current. A 11'F solid tantalum
capacitor is suggested for most situations where bypassing is desirable.
Trimming Output to 5.120V
V+
!
Split
:I:: 2.5V
References
r---......- - - - - -..... + 2.5V
1>:700,..4
+5V
t----._VREf=5.120V
LT1029
Rl
41.2k
~~
R2
5k
-2.5V
R3
lk
5%
R3
4.02k
-5V
V
PACKAGE DESCRIPTiOn Dimensions in inches (millimeters) unless otherwise noted.
H Package
TO-46 Metal Can
0.209-0.230
(5.309 - 5.842)
Z Package
TO-92 Plastic
1
0.178-0.195
(4.521-4.953)
0.016-0.019
(0.406-0.463)
OIA
0.050
(1.270)
TYP
0.045-0.055
(::~H(1~'143-1'397)
NOM
1O"NOM
1 2 3
lJ
~
10"NOM
3-64
0.135-0.145
(3.429-3.683)
'
....
··llnll\l2
~, TECHNOLOGf!rk>~--P-re-C-is-iO-n-l-O-V-O-lt-R-e-fe-r-e-n-c-e
LTl031/LH0070
FEATURES
DESCRIPTion
•
•
•
•
•
•
The LT1031 is a precision 10V reference with ultra low
drift and nOise, extremely good long term stability, and
almost total immunity to input voltage variations. The
reference output will both source and sink up to 10mA
and can be used as a shunt regulator (two terminal zener)
with the same precision characteristics as the three terminal connection. Special care has been taken to minimize thermal regulation effects and temperature induced
hysteresis.
Pin Compatible with LH0070 and AD581 *
Ultra Low Drift-5ppml °C Max Slope
Trimmed Output Voltage
Operates in Series or Shunt Mode
Output Sinks and Sources in Series Mode
Very Low Noise < 1ppm pop 0.1 Hz to 10Hz
• > 100dB Ripple Rejection
• Minimum Input Voltage of 11V
The LT1031 reference is based on a buried zener diode
structure which eliminates noise and stability problems
associated with surface breakdown devices. Further, a ~
subsurface zener exhibits beUer temperature drift and . .
time stability than even the best band-gap references.
APPLICATions
•
•
•
•
•
•
A to Dand D to A Converters
Precision Regulators
Digital Voltmeters
Inertial Navigation Systems
Precision Scales
Portable Reference Standard
Unique circuit design makes the LT1031 the first three
terminal IC reference to offer ultra low drift without the
use of high power on-Chip heaters. Output voltage is pretrimmed to 0.05% accuracy.
The LT1031 can be used as a plug-in replacement for the
AD581 and LH0070*, with improved electrical and thermal performance.
·See LH0070 Electrical Characteristics table and AD581 cross reference
guide.
Distribution of Output Accuracy
Basic Positive and
Negative Connections
lTtIl31
IN
_
LT1031
0tJT
e
0tJT
VOUT
':'
GNJl
-VOUT
R1 _
VIN - VOUT
- ILOAO+1.SmA
40
TA=25°C
35 t-- DISTRIBUTION
FROM 5 RUNS
30
~
z
25
=>
~
...
20
~
15
~
10
r-
-
R1
-VIN
o
-0.10
......
.......
.......
-0.06 -0.02 0 0.02
0.06
OUTPUT ACCURACY (%)
0.10
3-65
LT1031/LH0070
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V
Input-Output Voltage Differential .............. 35V
Output to Ground Voltage
(Shunt Mode Current Limit) ................ 16V
Trim Pin to Ground Voltage
Positive ....................... Equal to VOUT
Negative. . . . . . . . . . . . . . . . . . . . . . . . . . .. - 20V
Output Short Circuit Duration
VIN =35V ........................... 10 sec
VIN s20V ......................... Indefinite
Operating Temperature Range
LT1031 (Mil) ................ -55°Ct0125°C
LT1031 (Comm) .................. 0°Ct070°C
StorageTemperatureRange ....... -65°Ct0150°C
Lead Temperature (Soldering, 10 sec.) ........ 300°C
ORDER PART
NUMBER
BOTTOM VIEW
INPUT
LH0070-0H
LH0070-1H
LH0070-2H
w~~
LT1031BMH
LT1031CMH
LT1031DMH
LT1031BCH
LT1031CCH
LT1031DCH
GROUND
H PACKAGE
TO-5 METAL CAN
ELECTRICAL CHARACTERISTICS LT1031
VIN =15V, IOUT=O, TA=25°C, Mil or Comm version, unless otherwise noted
SYMBOL
PARAMETER
CONOITIONS
VR
Output Voltage (Note 1)
LT1031B
LT1031C
LT1031D
Output Voltage Temperature
Coefficient (Note 2)
TMIN:sTJ:sTMAX
LT1031B
LT1031C
LT1031D
11.5V :sVIN:s 14.5V
tN R
--:IT"""
4V R
4V IN
4V R
Line Regulation (Note 3)
14.5V :sV IN :s40V
Load Regulation (Sourcing Current)
0:sIOUT:s10mA
(Note 3)
Load Regulation (Shunt Mode)
1.7mA:slsHUNT:S 10mA
(Notes 3,4)
~
4V R
~
10
Series Made Supply Current
IMIN
Shunt Mode Minimum Current
VIN is Open
en
Output Short Circuit Current
Minimum Input Voltage (Note 6)
Output Voltage Noise
Long Term Stability of
Output Voltage
11V :sVIN s35V
lOUTS 1mA
0.1Hzsf:s10Hz
0.1Hz:sf:s10kHz
11t=1000 Hrs
Non-Cumulative
Temperature Hysteresis of Output
4T=50°C
11VR
4Time
3-66
MIN
9.995
9.990
9.980
••
•
•
•
•
•
•
•
LT1031
TYP
MAX
UNITS
10.000
10.000
10.000
10.005
10.010
10.020
3
6
10
1
5
15
25
4
6
2
4
25
40
ppm/DC
ppm/DC
ppm/DC
ppm/V
ppm/V
ppm/V
ppm/V
ppm/rnA
ppm/rnA
50
100
150
ppm/rnA
ppm/rnA
1.2
1.7
2.0
1.5
1.7
rnA
rnA
rnA
rnA
rnA
V
/LVp-p
/LVrms
ppm
0.5
12
1.1
30
10.8
6
11
15
5
11.0
V
V
V
ppm
LT1031/LH0070
ELECTRICAL CHARACTERISTICS LH0070
VIN=15V, RL=10kO, -55°C:sTA:S +125°C unless otherwise noted
SYMBOL
VR
.lV R
.lV R
.lV R
aT
.lV R
~
.lV R
PARAMETER
Output Voltage
Output Accuracy
-0, -1
-2
Output Accuracy
-0, -1
-2
Output Voltage Change
with Temperature
-0
-1
-2
Line Regulation
-0, -1
-2
Input Voltage Range
load Regulation
MIN
CONOITIONS
TA=25°C
TA=25°C
ro
.lV z
.lTime
Quiescent Current
Change in Quiescent Current
Output Noise Voltage
Ripple Rejection
Output Resistance
long Term Stability
-0, -1
-2
MAX
UNITS
V
±0.1
±0.05
%
%
±0.3
±0.2
%
%
±0.2
±0.1
±0.04
%
%
%
0.01
0.1
0.03
40
0.03
%
%
V
%
1.2
0.1
5
1.5
mA
mA
±0.03
±0.02
TA= -55°C, 125°C
•
Note 5
13V:sVIN :s33V, TA=25°C
••
•
±0.02
±0.01
0.006
0.006
•
•
OmA:sl oUT :s5mA
~
la
.lla
.lV IN
en
TYP
10.000
13V:sVIN:s33V
.lVIN = 20V from 13V to 33V
f= 120Hz
TA=25°C (Note 7)
The. denotes the specifications which apply over the full operating
temperature range.
Note 1: Output voltage is measured immediately after turn-on. Changes
due to chip warm-up are typically less than 0.005%.
Note 2: Temperature coefficient is measured by dividing the change in
output voltage over the temperature range by the change in temperature.
Separate tests are done for hot and cold; TMIN to 25°C, and 25°C to
TMAX. Incremental slope is also measured at 25°C. For l Tl 031 BMH, the
5ppml °C drift specification is for - 25°C to 85°C. Drift over the full
-55°C to +125°C range is guaranteed to 7ppml"C.
CROSS REFEREnCE
The following cross reference guide may be used to select
LT1031 grades which meet or exceed output voltage,
temperature drift, load and line regulation, and output
cu rrent specifications of the AD581 reference.
Parameters such as nOise, hysteresis, and long term
stability will be significantly beUer for all LT1031 grades
compared to the AD581.
11.4
•
•
6
0.001
0.2
•
•
I'Vp-p
%/Vp-p
0.6
11
±0.2
±0.05
%/Yr
%/Yr
Note 3: Line and load regulation are measured on a pulse basis. Output
changes due to die temperature change must be taken into account
separately. Package thermal resistance is 150°C/W.
Note 4: Shunt mode regulation is measured with the input open. With
the input connected, shunt mode current can be reduced to OmA. Load
regulation will remain the same.
Note 5: Temperature drift is guaranteed from - 25°C to + 85°C on
lH0070.
Note 6: See curve for guaranteed minimum VIN versus lOUT.
Note 7: Guaranteed by design.
Cross Reference Guide-lT1031 to AD581
AD581J
AD581K
AD581L
AD581S
AD581T
AD581 U
order
order
order
order
order
order
LT1031DCH
LT1031CCH
LT1031BCH
LT1031DMH
LT1031CMH
LT1031BMH
3-67
II
LT1031/LH0070
TYPICAL PERFORmAnCE CHARACTERISTICS
Ripple Rejection
lIS
Ripple Rejection
Minimum Input Voltage
130
11.6
VIN=ISV
120 Cour=O
f=15OHz
110
11.4
~
iil
90
85
o
5
m
U
~
2: 11 0 I-
~100
z
90
~
~
30
" i"
10.4
60
10.2
9
g
8
~
7
~
£. ~J=2S0C I - -
o
10k
2
4
6 8 10 12 14 16 18 20
OUTPUT CURRENT (mA)
Output Voltage Noise Spectrum
I~
350 HH-Htlttt--t-+-HHtttt--+-++H+Hl
10
/ h:'
~ 10
W
TJ='-SS'oC
Start-Up (Shunt Mode)
11
,.......
f-"'"
10.0
100
lk
FREQUENCY (Hz)
10
12
11
.....
~
TJ=12S oC
~
Start-Up (Series Mode)
VIN=OTO 12V
. /V
,/
V
~ 10.6
70
INPUT VOLTAGE (V)
13
.
V , /....... ~
~ 10.8
>
V /'
80
50
~
~
/
TE,
11.2
110
..//
GUCt~:E~!~~
tJ"
~
O~
-
~o
_
'"
is 6
4
6
8
TIME (PS)
10
12
Output VoHage Noise
16
~
i5
z
W,ll
'"il!'
,
6
-o
10
3-68
10.006
/
2
~
1
~
0
(.)
I
~ -1
>-
S
-2
/
~
---
10.004
~10.002
;I'
~
;!i
~ 10.000
./
~
o
-3
...... '"
100
lk
BANDWIDTH (Hz)
!
10k
Output Voltage Temperature
Drift
VIN=12V
10
8
100
lk
FREQUENCY (Hz)
12
Load Regulation
Cour=oj
14 FILTER=1 POLE
fLOW=O.IHz
12
~
10
4
6
·TIME (pS)
14
V
~
9.998
9.996
-4
-5
10k
-10 -8 -6 -4 -2 0 2 4 6
SOURCING
SINKING
OUTPUT CURRENT (mA)
9.994
8 10
-50 -25
0
2S
50 7S
TEMPERATURE (OC)
100
125
LT1031/LH0070
TYPICAL PERFORmAnCE CHARAOERISTICS
Input Supply Current
1.8
Shu nt Characteristics
Tj=~ssod
lour=O
1.6
Shunt Mode Current Limit
60
1.8
INPUT PIN IS OPEN
INPUT PIN OPEN
1.6
60
1.4
:[1.2
~ 1.2
Tj=12S oC
(
....
~ 1.0
:=
15
~
II
lL
a 0.8
!5
~ 0.6
10
1S 20 2S 30
INPUT VOLTAGE (V)
3S
40
o
o
<1ISOURce=1oopllp-p
ISOURCE=O
§g -0.5 f--
~LOAD
:2
"...
~GU~TIO:
-
::-1.0
~
5-1.5
THERMALREGULATION -
-
ILOAO=10mA
r
20
12
40 60 80 100 120 140
TIME(ms)
-INDEPENDENT OF TEMPERATURE COEFFICIENT
-
ltl\
l!lsINK=0.8mA
J J\.
1('1 SINK = 1.DmA
IlL.
Iso!CEL-1~
1
I...
ISINK=2-10mA
J
o
o
2
4
6 8 10 12 14
OUTPUT VOLTAGE (V)
16
18
II
Load Transient Response
CLOAO=1000pF
SOmV
ISOURCE=0.2mA
TJ
o
10
<1ISINK=100pllp-p
1
/
t.:I
'ISINKI0,6~
rd
10mv
Jt1
~~
::>
2
4
6
8
10
OUTPUT TO GROUND VOLTAGE (V)
APOWERTi'
30
~ 20
a:
J
VIN=30V
::
....
z
Load Transient Response
CLOAO=O
Thermal Regulation
40
~
' / -<=ksoc
JV I
0.2
o
.....
~
::>
0
~/
./'\~- ..,.."
O.B
a 0.4
oJ
~
w
I..........
1.0
~ 0.6
0.2
....
TI= -SSoc
!z
I
0.4
I
:[
~ 1.4
Tj=JsoC
Ll
0123401234
TIME(,..)
NOTE VERTICAL SCALE CHANGE
BETWEEN SOURCING AND SINKING
<11 SOURCE = 100pllp-p
ISOURCE=O
~
ISINK=0.8mA~
1, 1
smv·
w
. / -l'.
,.... V
.
a: -1.5
"
-2.0
-2.5
-50 -25
0
25
50
75
TEMPERATURE(OC)
100
125
3-77
Ell
LT1034-1.2/LT1034-2.5
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Operating Current. ................................ 20mA
Forward Current (Note 1) .................•....•... 20mA
Operating Temperature Range
LT1034BM, M......................... - 55°C to 125°C
LT1034BC, C.......•.•••.................. OOC to 70°C
Storage Temperature ................... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ........•....• 300°C
@
H PACKAGE
TO-46 METAl CAN
BOTTOM VIEW
ORDER PART NUMBER
LT1034BMH·1.2, LT1034MH·1.2
LT1034BCH·1.2, LT1034CH·1.2
LT1034BMH·2.5, LT1034MH·2.5
LT1034BCH·2.5, LT1034CH·2.5
LT1034BCZ·1.2
LT1034CZ·1.2
LT1 034BCZ-2.5
LT1034CZ·2.5
~~
Z PACKAGE
TO-92 PlASTIC
BOTTOM VIEW
Available In SO Package
ELECTRICAL CHARACTERISTICS
PARAMETER
Reverse Breakdown Voltage
CONDITIONS
IR= l00J
:§:
~
-
10
!
1.0
,,
~
ll!
!
/'
--
10
~
0.1
1.0
-
6.8k
V
Ii
-
f---
VOUT
r-\.
14V
IN UT
'-----'-----1-'----..........'---'-----'---'
0.01
6.45
6.55
6.65
6.75
6.85
6.95
0.1
10
7.05
100
REVERSE VOLTAGE (V)
Forward Characteristics
~
til
~
0.6
I
0.4
0.2
a
lOOk
Noise Voltage
Low Frequency Noise Voltage
150
r-
T,J
---
0.001
I I I I I
25 o c
0.01 Hz TO 1 Hz
0.8
IS
10k
FREOUENCY (Hz)
1.2
1.0
lk
~
,,-
/'
~
~ ~ I'\\..J I~ ~ VI ~ MI~
I"
""""-
50
0.01
0.1
FORWARD CURRENT (rnA)
10
10
100
lk
FREQUENCY (Hz)
10k
lOOk
50
100
150
200
250
TIME SECONDS
3-85
LM 129/LM329
SCHEmATIC DIAGRAm
1
l.
50
I
03,......
~r
2k
Lt
04 .......
~h
1k
~(D1
02(
6.2V
os .......
........
30pF
V
"'"
10k
.........
07
o1,,-
2k
2.6k
30k
2
PACKAGE DESCRIPTion
H Package, 2 Lead TO-46 Metal Can
Z Package, 3 Lead TO-92 Plastic
-.
I~~
I (4.445-4699)
---t-- 0
PLANE
T
to
.Q..§QQ.
~
(1270)
MAX
UNCONTROLLED
lEADOIA
Inn n
-ilJ-:-~~
~
(OT~~7)
---L-U UU
J
~
0045-0.055
p
123
lOoNOM
3-86
NOM
-11-!.Qli
(O~')
(I~143_'397)
0036-0046
(0.914-1168)
•
~
~
(1270)
MIN
(1.143-1.397)
5°NOM
~
0175-0185 I
I
---I
I
(4.445-4699) I
I
1
SEATING
L. ___ .J -----1
=t
0.135-0.145
(3.429-3.683)
+
,--r-LlnCf\Q
~, TECHNOLOGI!:"~~---C-o-n-s-ta-n-t-C-u-r-re-n-t-S-ou-r-c-e
LM134 Series
and Temperature Sensor
FEATURES
DESCRIPTiOn
•
•
•
•
•
•
The LM134 is athree-terminal current source designed to
operate at current levels from 1pA to 10mA, as set by an
external resistor. The device operates as a true twoterminal current source, requiring no extra power connections or input signals. Regulation is typically
O.02%/V and terminal-to-terminal voltage can range
from 800mV to 40V.
1pA to 10mA Operation
O.02%/V Regulation
O.8V to 40V Operating Voltage
Can be Used as Linear Temperature Sensor
Draws No Reverse Current
Supplied in Standard Transistor Packages
APPLICATions
•
•
•
•
•
•
•
Current Mode Temperature Sensing
Constant Current Source for Shunt References
Cold Junction Compensation
Constant-Gain Bias for Bipolar Differential Stage
Micropower Bias Networks
Buffer for Photoconductive Cell
Current Limiter
Because the operating current is directly proportional to
absolute temperature in degrees Kelvin, the device will
also find wide applications as a temperature sensor. The
temperature dependence of the operating current is
+O.336%/oC at room temperature. For example, a
device operating at 298pA will have a temperature coefficient of + 1pA/oC. The temperature dependence is extremely accurate and repeatable. Devices specified as
temperature sensors in the 100pA to 1mA range are the
LM134-3, LM234-3 and the LM134-6, LM234-6, with
the dash numbers indicating ±3°C and ±6°C accuracies, respectively.
If a zero temperature coefficient current source is required, this is easily achieved by adding a diode and a
resistor.
Remote Temperature Sensor
with Voltage Output
Operating Current vs
Temperature
225
500
/
400
~SET!226b
i2'
:;; 300
a:
RSET
22611
10mV/OK
~
l/
~ 200
~
,,
100
o
V
/
/
"
,"
o
100
200
300
400
OPERATING CURRENT (pA)
125
25
E
~
~
-75 ~
-175
-ill
500
3-87
e.
~
LM134 Series
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
v+ to V- Forward Voltage
LM134 ............................... 40V
LM 134-3 / LM 134-6/ LM 234-3 /
LM234-6/LM334 ....................... 30V
V+ toV- ReverseVoltage .................. 20V
RPin to V- Voltage. . . . . . . . . . . . . . . . . . . . . . . .. 5V
Set Current ............................ 10mA
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . 200mW
Operating Temperature Range
LM134/ LM134-3/ LM134-6 .... - 55°C to 125°C
LM234-3/LM234-6 ........... -25°Cto 100°C
LM334 ......................... O°C to 70°C
Lead Temperature (Soldering, 10sec.) ........ 300°C
ORDER PART NUMBER
CURRENT
SOURCE
TEMP
SENSOR
LM134H
LM334H
LM134H-3
LM234H-3
LM134H-6
LM234H-6
LM334Z
LM234Z-3
LM234Z-6
BOTTOM VIEW
~
HPACKAGE
METAL CAN
TO'46
BOTTOM VIEW
~
Z PACKAGE
TO·92 PLASTIC
ELECTRICAL CHARACTERISTICS
CURRENT SOURCE (Note 1)
SYMBOL
PARAMETER
CONDITIONS
~ISET
Set Current Error, V+ =2.SV
(Note 2)
10,..A:slsET :s1mA
1mA.V=0.4V
Ir f=500ns
1/
l00pA
ISET
82
Ii" vJTOV -=5V
I
10
10pA
0
lmA
86
ISET = lmA
~
~
Voltage Across RSET
1--2ps
-1
V
V
0.001
lpA
1--200,..
,~
I
V
om
I\.. I(
l00pA
/'
Transient Response .
nv
V
0.1
I
10pA
v
V
1.0
"
1=100~
..
Start-Up
10
,,V
V
~
l/
125
E
~
25
i
-75 ~
~
-175
"
"
o
100
200
300
400
OPERATING CURRENT CpA)
-275
500
LM134 Series
APPLICATions InFoRmATion
Basic Theory of Operation
The equivalent circuit of the LM 134 is shown in Figure 1.
A reference voltage of 64mV is applied to the minus input
of A1 with respect to the V- pin. A1 serves the drive to
Q2 to keep the Rpin at 64mV, independent of the value of
RSET. Transistor Q1 is matched to Q2 at a 17: 1 ratio so
that the current flowing out of the V- pin is always 1118
of the total current into the V+ pin. This total current is
called ISET and is equal to
( 64mv)
RsET
(!!l)
17
= 67. 7mV .
RSET
ratio compared to unity. The LM134-3, for instance, is
specified at 0.98T to 1.02T, indicating that the maximum
slope error of the device is ± 2% when the room temperature current is set to the exact desired value.
Supply Voltage Slew Rate
At slew rates above a given threshold (see curve), the
LM134 may exhibit non-linear current shifts. The slewing
rate at which this occurs is directly proportional to ISET. At
ISET =10p.A, maximum dv/dtis O.01V/p.S; atiSET =1 rnA,
the limit is 1VI p.S. Slew rates above the limit do not harm the
LM134, or cause large currents to flow.
Thermal Effects
64mV :::::::
L...-----.......-ovFigure 1
Internal heating can have a significant effect on current
regulation for ISET greater than 100p.A. For example,
each 1V increase across the LM 134 at ISET = 1rnA will increase junction temperature by "",O.4°C in still air. Output current (ISET) has a temperature coefficient of
"",0.33%/OC, so the change in current due to temperature rise will be (0.4) (0.33)=0.132%. This is a 10:1
degradation in regulation compared to true electrical effects. Thermal effects, therefore, must be taken into account when DC regulation is critical and ISET exceeds
100p.A. Heat sinking of the TO-46 package or the TO-92
leads can reduce this effect by more than 3: 1.
The 67.7mV equivalent reference voltage is directly proportional to absolute temperature in degrees Kelvin (see
curve, "Operating Current vs Temperature"). This
means that the reference voltage can be plotted as a
straight line going from OmV at absolute zero temperature
to 67.7mV at 298°K (25°C). The slope of this line is
67. 7mV1298 = 227p.V1°C.
Shunt Capacitance
The accuracy of the device is specified as a percent error
at room temperature, or in the case of the -3 and -6 devices, as both a percent error and an equivalent temperature error. The LM134 operating current changes at a
percent rate equal to (100) (227p.V/oC)/(67.7mV)=
0.336%/OCat 25°C, so each 1% operating current error
is equivalent to "'" 3°C temperature error when the device
is used as a temperature sensor. The slope accuracy
(temperature coefficient) of the LM 134 is expressed as a
In certain applications, the 15pF shunt capacitance of the
LM134 may have to be reduced, either because of loading
problems or because it limits the AC output impedance of
the current source. This can be easily accomplished by buffering the LM 134 with an FET, as shown in the applications.
This can reduce capacitance to less than 3pF and improve
regulation by at least an order of magnitude. DC characteristics (with the exception of minimum input voltage) are not
affected.
3-91
•
LM134 Series
APPLICATions InFoRmATion
Noise
Current noise generated by the LM 134 is approximately 4
times the shot noise of a transistor. If the LM 134 is used
as an active load for a transistor amplifier, input referred
noise will be increased by about 12dB. In many cases,
this is acceptable and a single stage amplifier can be built
with a voltage gain exceeding 2000.
Lead Resistance
The sense voltage which determines the operating current of the LM134 is less than 100mV. At this level,
thermocouple or lead resistance effects should be
minimized by locating the current setting resistor
physically close to the device. Sockets should be avoided
if possible. It takes only 0.70 contact resistance to
reduce output current by 1% at the 1rnA level.
A typical temperature sensor application is shown in
Figure 2. The LM134 operating current at 25°C is set at
29a~ by the 2260 resistor, giving an output of 1~/oK.
The current flows through the twisted pair sensor leads to
the 1OkO termination resistor, which converts the current
output to a voltage of 10mV/oK referred to ground. The
voltage across the 10kO resistor will be 2.9aV at 25°C,
with a slope of 10mV/oC. The simplest way to convert
this signal to a Centigrade scale is to subtract a constant
2.73V in software. Alternately, a hardware conversion
can be used, as shown in Figure 3, using an LT1009 as a
level shifter to offset the output to a Centigrade scale.
The resistor (RSET) used to set the operating current of the
LM134 in temperature sensing applications should have
low temperature coefficient and good long term stability.
Start-Up Time
The LM134 is designed to operate at currents as low as
1~. This requires that internal biasing current be well
below that level because the device achieves its wide
operating current range by using part of the operating
current as bias current for the internal circuitry. To ensure
start-up, however, a fixed trickle current must be provided internally. This is typically in the range of
20nA-200nA and is provided by the special ultra-low
loss FETs shown in the Schematic Diagram as 07 and
aa. The start-up time of the LM134 is determined by the
loss of these FETs and the capaCitor C1. This capaCitor
must charge to approximately 500mV before 03 turns on
to start normal circuit operation. This takes as long as
(500mV) (50pF)/(20nA)=1.25ms for very low loss
values.
r--I~
LM234·3
R
TO
DATA Aca~~~~~~ _ - - .
10mVI"K
RSET
22611
9.53k
lk
CALIBRATE
Figure 2. Kelvin Temperature Sensor
r--I~
OUTPUT
lDmV/'C
LMl34·3
RSET
22611
Using the LM134 as a Temperature Sensor
Because it has a highly linear output characteristic, the
LM 134 makes a good temperature sensor. It is partiCUlarly useful in remote sensing applications because it is a
current output device and is therefore not affected by long
wire runs. It is easy to calibrate, has good long term
stability, and can be interfaced directly with most data acquisition systems, eliminating the expensive preamplifiers required for thermocouples and platinum sensors.
3-92
Figure 3. Centigrade Temperature Sensor
LM134 Series
APPLICATions InFoRmATion
30ppm/oC drift in the resistor will change the slope of the
temperature sensor by 1%, assuming that the resistor is at
the same temperature as the sensor, which is usually the
case since the resistor should be located physically close to
the LM134 to prevent errors due to wire resistance. A long
term shift of 0.3% in the resistor will create a 1°C
temperature error. The long term drift of the LM134 is
typically much better than this, so stable resistors must be
used·for best long term performance.
The two trims shown in Figure 3 are still intended to be a
"one point" temperature calibration, where the zero and
the slope are trimmed at a single temperature. The
LT1 009 reference is adjusted to give 2. 700V at node "a"
at TSENSOR = 25°C. The 1k trimmer then adjusts the output for 0.25V, completing the calibration. If the calibration is to be done at a temperature other than 25°C, trim
the LT1009 for 2.7025 - (1pA)[TSENSOR (°C)](1000) at
node' 'a", then adjust the 1k trimmer for proper output.
calibration of the LM134 as a temperature sensor is extremelyeasy. Referring to Figure 2, calibration is achieved
by trimming the termination resistor., This theoretically trims
both zero and slope simultaneously for Centigrade and
Fahrenheit applications. The initial errors in the LM134 are
directly proportional to absolute temperature, just like the
actual output. This allows the sensor to be trimmed at any
temperature and have the slope error be corrected at the
same time. Residual slope error is typically less than 1%
after this single trim is completed.
If higher accuracy is required, a two point calibration
technique can be used. In Figure 4, separate zero and
slope trims are provided. Residual non-linearity is now
the limitation on accuracy. Non-linearity of the LM 134 in a
100°C span is typically less than 0.5°C. This particular
method of trimming has the advantage that the slope trim
does not interact with the zero trim. Trim procedure is to
adjust for zero output with TSENSOR =O°C, then trim
slope for proper output at some convenient second
temperature. No further trimming is required.
LM134·3
.........t~
2260·
ZERO
TRIM
10k
·LOW Te, STABLE RESISTOR
Figure 4. Centigrade Temperature Sensor with 2 POint Trim
3-93
III
LM134 Series
TYPICAL APPLICATiOnS
Basic 2·Terminal Current Source
I SET
~
LM334 I.-+.-.I
RSET
Low Output Impedance
Thermometer (Kelvin Output)
R3'
"!4-~""""",,6,,,00_ _ Vour= 10mV/'K
Zour'" 100(1
R1
230
LM334 .....-+~~
1%
.
~-
1.-._"
R2
10k
1%
'OUTPUT IMPEDANCE OF THE LM134 ATTHE "R" PIN IS
-Ro
APPROXIMATELY l l l ( l , WHERE Ro IS THE EQUIVALENT
EXTERNAL RESISTANCE CONNECTED TO THE V- PIN. THIS
NEGATIVE RESISTANCE CAN BE REDUCED BY A FACTOR OF 5 OR
MORE BY INSERTING AN EQUIVALENT RESISTOR IN SERIES
WITH THE OUTPUT.
Zero Temperature Coefficient Current Source
Higher Output Current
R1'
v+
LM334 I.--+:,~
t--.-.I
R1'
= 10 RSET
LM334 .....-+~"'
C1'
RSET
'SELECT RATIO OF R1 TO RSET TO OBTAIN
ZERODRIFT.I+=2ISET·
'SELECT R1 AND C1 FOR OPTIMUM STABILITY
3-94
LM134 Series
TYPICAL APPLICATiOnS
Low Output Impedance
Thermometer
Low Input Voltage Reference Driver
R2
300
C1
0.0022
R1
1.Sk
~14-r--4_VOUT=10mV/OK
ZOUTs21l
R3
100
LM334
R4
4.Sk
L-4---'
II
1.2V Regulator with 1.8V Minimum Input
Micropower Bias
i-'WI,....._ _ VOUT=1.2V
IOUTs200pA
1N4S7"
R1·
=6k
1%
LM334 '--+':""""
R2·
680
1%
·SELECT RATIO OF R1 TO R2 FOR ZERO TEMPERATURE DRIFT
··LM134 AND DIODE SHOULD BE ISOTHERMAL
Zener Biasing
LM334 '--+':--1
RSET
....- -....-VOUT
3-95
LM134 Series
TYPICAL APPLICATiOnS
Anernate Trimming Technique
Buffer for Photoconductive Cell
High Precision Low TC Currant Source
(+)
~ ISET,,50pA
v+
1.5V
LM334 L....+,:--'
RSET
R2·
H
·FOR ± 10% ADJUSTMENT, SELECT RSET
10% HIGH AND MAKE Rl ~3RSET
·ISET= 1.37V +10pA
R2
ISET TC=0.016%I'C +33nA1'C
REGULATION .0.OOl%/V
Precision 10nA Current Source
Micropower 5V Reference
+15V
...------.-VIN=6.5VTO 15V
LM334
Rl
2.7k
R2
226k
R4
l00MO
R3
1M
~:""'''''--_VOUT=5V
+15V
150pF
-15V
IO=10nA
Zo .. 1012Q
COMPLIANCE=-14VTO +12.5V
3-96
3.01M
1%
LM134 Series
TYPICAL APPLICATions
FET Cascoding for Low Capacitance and/or
Ultra High Output Impedance
In-Line Current Limiter
RSET
LM334 L-_--'
T
RSET
C1·
RSET
-VIN
'SELECT Q1 OR Q2 TO ENSURE AT LEAST 1V ACROSS THE LM134. Vp (1-ISET/Ioss)" 1.2V.
Generating Negative Output Impedance
·USE MINIMUM VALUE REQUIRED TO ENSURE STABILITY OF PROTECTED
DEVICE. THIS MINIMIZES INRUSH CURRENT TO A DIRECT SHORT.
II
Ground Referred Fahrenheit Thermometer
V+
R1·
(')
R
I---+-______ VOUT= lOmV/'F
~)
LM334
+VIN
R1
B.25k
V
V+
10'F,,;T,,;250'F
R5··
1%
R3·
-VIN
·ZOUT= -16· R1 (R1/VIN MUST NOT EXCEED ISET).
LM334
L-+.v-_....I
R2
100
LT1009
2.5V·
1%
"::"
"::"
·SELECT R3=VREF/583,.A.
··SELECT FOR 1.2mA
SCHEmATIC DIAGRAm
V+
L-~---~
__- __~-1-R
L---~----------V-
3-97
LM134 Series
PACKAGE DESCRIPTiOn
H Package
Metal Can
S
_I
~
1_
(~::=~::)
0.178-0.195
(4.521
4.953)
0.085 - 0.105
SEATING_Lc:::::JJfl(2.169 2.667)
PLANE
0.500
TIT
o0 0
0.016-0.019
(0.406 0.483)
OIA
--II.-
0.030
(0.762)
MAX
0.100
(12.700)
MIN
(2.540)
Z Package
Plastic
_I
0.175-0.185
(4.445-4.699)
-~1
0.175·!-0.-195---:-..1....-="...
0.065
5'NOM
-----.t
~+
.L
~
(4.445-4.699)
I
I
1 (1.651)
S r n l N G h 1.._ - - oJ ----1. DIA
PLANE
t
----r
~
T
0.090
0.025
(l~i~O) (~~:) ~ ~ ~ (~:)
I
UNCONTROLLED
LEAD OIA
,
o045 _ 0 055
..
(1.143-1.397)
I ..
J J.lI-~
t-(0.457)
TYP
~
-II-
0.045-0.055
(~:~HO)
(1~'143_1'397)
NOM
10'NOM
312
J
WNOM
3-98
0.135-0.145
(3.429-3.683)
5'
NOM
0.0145-0.0155
(0.3683 - 0.3937)
TYP
BEFORELEAD
FINISH
~7UfJ~r.k>~---c-o-n-st-a-n-t-c-ur-re-~-~-s-~3_u~_:_!
and Temperature Sensor
FEATURES
DESCRIPTion
•
•
•
•
•
The LM334 is a three·terminal current source designed to
operate at current levels from 1~ to 10mA, as set by an
external resistor. The device operates as a true two·
terminal current source, requiring no extra power connec·
tions or input signals. Regulation is typically O.02%N and
terminal·ta-terminal voltage can range from BOOmV to 30V.
1f.!A to 10mA Operation
O.02%N Regulation
O.BV to 30V Operating Voltage
Can Be Used as Linear Temperature Sensor
Draws No Reverse Current
APPLICATions
•
•
•
•
•
•
•
Current Mode Temperature Sensing
Constant Current Source for Shunt References
Cold Junction Compensation
Constant·Gain Bias for Bipolar Differential Stage
Micropower Bias Networks
Buffer for Photoconductive Cell
Current Limiter
Because the operating current is directly proportional to
absolute temperature in degrees Kelvin, the device will
also find wide applications as a temperature sensor. The
temperature dependence of the operating current is
+O.336%/OC at room temperature. For example, a device
operating at 29B~ will have a temperature coefficient of
+1f.!A/oC. The temperature dependence is extremely accu·
rate and repeatable.
If a zero temperature coefficient current source is
required, this is easily achieved by adding a diode and a
resistor.
Remote Temperature Sensor
with Voltage Output
Operating Current vs
Temperature
225
500
400
RSET
2260
~SET~22eh
10mVI"K
100
,
o
o
,,
,,
,,
V
V
/
v
125
l/
100
200
300
400
OPERATING CURRENT (,.A)
-175
-m
500
3-99
II
LM334S8
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
V+ to V- Forward Voltage ........................... 30V
V+ to V- Reverse Voltage ........................... 20V
RPin to V- Voltage .................................. 5V
Set Current ....................................... 10mA
Power Dissipation ............................... 200mW
Operating Temperature Range .............. OOC to 70°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
ORDER
PART NUMBER
TOP VIEW
'-lD"
R 2
LM334S8
7 NC
V+ 3
6 NC
NC 4
5 NC
PART MARKING
334
58 PACKAGE
PLASTIC so
ELECTRICAL CHARACTERISTICS CURRENTSQURCE(Note1)
SYMBOL
L'lISET
PARAMETER
Set Current Error, V+ = 2.5V
(Note 2)
Ratio of Set Current to
V- Current
VMIN
Minimum Operating Voltage
L'lISET
L'lVIN
Average Change in Set Current
with Input Voltage
Cs
Temperature Dependence of
Set Current (Note 3)
Effective Shunt Capacitance
CONDITIONS
10,.AslsETslmA
lmA----"N'v--.ADJ
30k
6.6k
2k
1.lk
3-103
LM 136-2.5/LM336-2.5
TYPICAL APPLICATions
Wide Supply Range, Reference
Low Temperature Coefficient Power Regulator
+3.6V TO +40V
V,.
~---4~------~--VOOT
1.2k
1N4146
.
Rl
375
10k
R2
LY336
AO.KJ5TR2
FOR 3.75V
ACROSS Rl
tl4148
2k
Switchable ± 1.25V Bipolar Reference
Low Noise 2.5V Buffered Reference
5V
V" '"
6V
51<
10k
OOT
lk
10k
2.5V
lk
+
N4148
20""
10k
5k
+
20~F
iN4148
-5V
PACKAGE DESCRIPTiOn
H Package. 3 Lead TO·46 Metal Can
Z Package, 3 Lead TO·92 Plastic
(5.309-5.842)
~1
J
0.Q15
0.500 (0.381)
(12.70)
MF'lrll
t+-----+t-~
I
O.OBO-O.IOO
(2.032-2.540)
I
f--t-'-4Tin?o
~ 0 ~
(0635)
0016-0.019
MAX
(0.406-0.483)
(:::0) (::)
TYP
TYP
L-~
T
~
~
50
~
(l~i~)
I
-L(1.143-1.397)
0.050
(1.270)
TYP
C1
-=t
~t
I
--t- 0-- I ---11
PlANE
5 NOM
--.l
(4.445-4.699)
---.--~
0.175-0.185 I
(4.445-4.699) I
SEATING
~
OIA
I
~ ~ ~ UNCONTROLLED
(~)
JJ.lI-.Q£!!
lEADDIA
~
(0~~7)
~
-11-~
(Oi~')
0.045-0.055
(I~·143_'.397)
r
123
0.135-0.145
100NOM
3-104
NOM
(3.429-3.683)
''''''''''-LlntAQ
~~ T8CHNOLoG~~~--------M-i-c-ro-p-o-w-e-r~v~o~lt-a-g-e
LM 185-1.2/LM385-1.2
Reference
FEATURES
DESCRIPTion
•
•
•
•
The LM185-1.2 is a two terminal band gap reference
diode that has been designed for applications which
require precision performance with micropower operation. The device provides guaranteed operating
specifications at currents as low as 10,uA. The nominal voltage is 1.235V with both 1% and 2% tolerances
available. Some additional features are: maximum dynamic impedance of 10, low noise and excellent stability over time and temperature. Advanced deSign,
processing and testing techniques make Linear's
LM185-1.2 a superior choice over previous designs. A
micro-power 5V reference application is shown below.
For guaranteed tc, micropower references, see the
LT1 034 data sheet.
10,uA to 20mA operating range
Guaranteed 1% initial voltage tolerance
Guaranteed 10 dynamic impedance
Very low power consumption
APPLICATions
•
•
•
•
Portable meter references
Portable test instruments
Battery operated systems
Current loop instrumentation
Reverse Voltage Change
with Current
Micro-power 5V Reference
VH
10
. - - - - - - - - - - - - - = 7 V t o 15V
V+
tl~I~~~C
l.M334
~
~
~
R
is
V-
~
V
1!i
5.6k
~
~
5V
§
~
LM385 -
1.2
150pF
3.011.1
1%
0.01
0.1
10
100
REVERSE CURRENT (mA)
1M
1%
3-105
Ell
LM185-1 .2/LM385-1.2
ABSOLUTE mAXimum RAI'lnGS
PACKAGE/ORDER InFORmATion
Reverse Breakdown Current. . . . . . . . . . . . . . . 30mA
Forward Current. . . . . . . . . . . . . . . . . . . . . . .. 10mA
Operating Temperature Range
LM185-1.2 ................. -55°Cto125°C
LM385-1.2 ..................... O°C to 70°C
Storage Temperature Range
LM185-1.2 ................. -65°Cto150°C
LM385-1.2 ................. -65°Cto150°C
lead Temperature (Soldering. 10 sec.). . . . .. 300°C
ORDER PART NUMBER
BOTTOM VIEW
8
LM185H-1.2
LM385H-1.2
LM385BH-1.2
(NOTE 3)
HPACKAGE
TO-46 METAl CAN
BOTTOM VIEW
~
LM385Z-1.2
LM385BZ -1.2
Z PACKAGE
TO-92 PLASTIC
(NOTE 3)
ELECTRICAL CHARACTERISTICS (See note 1)
LM185·1.2
SYMBOL
Vz
~
Il. Temp
Imin
MIN
PARAMETER
CONDITIONS
Reverse Breakdown Voltage
TA = 25°C, Imln ,,; IR ,,; 20mA
LM 185· 1.2
LM385·1.2
LM385B-1.2 (Note 3)
Average Temperature Coefficient
Imln ,,; IR ,,; 20mA (Note 2 and Note 3)
Minimum Operating Current
Tmin
Reverse Breakdown Voltage
Change with Current
Il.Vz
Il.IR
~
TA
::E;;;
Tmax
Imin ,,; IR ,,; 1mA
TA = 25°C
Tmin
~ TA.::s;;
Tmax
1mA ,,; IR ,,; 20mA
TA = 25°C
Tmln ,,; TA ,,; Tmax
rz
Reverse Dynamic Impedance
IR = 100J-LA
TA = 25°C
Tmln ,,; TA ,,;Tmax
en
Wide Band NOise (RMS)
IR ~ 100!,A
10Hz,,; f ,,; 10kHz
Il.Vz
Il. Time
Long Term S1ability
IR = 100!,A
TA = 25°C ± O.l°C
The. denotes the specifications which apply over full operating
temperature range.
Nalal: All specifications are for TA = 25°C unless otherwise noted.
For the LM185·1.2 Tmin = -55°C and Tmax = + 125°C. For LM3851.2 Tmin = O°C and Tmax = + 70°C.
3-106
m
MAX
LM385·1.2/385B·l.2
MIN
TVP
MAX
1.223 1.235 1.247
1.205 1.235 1.260
1.223 1.235 1.247
20
•
8
•
•
•
0.2
V
V
V
ppmrC
20
10
UNITS
15
J.LA
1
1.5
1
1.5
mV
mV
10
20
20
25
mV
mV
0.6
1.5
8
0.4
1
1.5
(l
(l
60
60
J.LV
20
20
ppm/kHr
Nola 2: Selected devices with guaranteed maximum temperature
coefficient are available upon request.
Nola 3: For applications requiring low initial tolerance guaranteed over
temperature consult LT1004 data sheet. The LT1004 is a low cost pin
for pin substitution device
LM 185-1.2/LM385- 1.2
TYPICAL PERFORmAnCE CHARACTERISTICS
Reverse Characteristics
Forward Characteristics
100
1.2
~
~
~
10
!
!
./
0.1
II
o
~
~
~
0.8
1:!i
s;<
~
c
I
:/
0.2
T; ~ k~!'h
+ 125'C
-55'C TO
~
....
I0.4
o
0.4
0.6
0.8
1.0
1.2
0.01
1.4
10
0.1
REVERSE VOLTAGE (V)
Temperature Drift
Reverse Dynamic Impedance
+125'C
-55 dC'TO
1.245
§: 10
~
1.240
~
~ 1.235
a:
1/
~
[...00
~
0.1
0.Q1
I;':': l00,.A
I
300
"!.
100..
~ 40
~ 30
~
z
200
i
~
100
o
10
100
10
6~
50
lk
FREQUENCY (Hz)
10k
20
10
lOOk
V
'f"
L
If'
I-
0.1
~ - l00~111
60
500
~
l/
0.1
100
10
100
lk
10k
lOOk
1M
FREQUENCY (Hz)
Filtered Output Noise
70
600
llj
<5
/
REVERSE CURRENT (mA)
Noise Voltage
700
-l00,A
lk
I'
TEMPERATURE ('C)
400
IR
I
I
-55 -35 -15 .5 .25 .45 .65 .85 .105 .125
~
T. - 25·C
f - 25Hz
""""
1.230
Ell
Reverse Dynamic Impedance
10k
100
~
100
FORWARD CURRENT (mA)
Response Time
Rc~ol!~1
,
1.5
~
1.0
~
~ 0.5 t - - -
;5
~
a I--
/
I
OUTPU)
36k
VON
VOU
'
5V
INPUT
,,~
o
100
lk
10k
CUTOFF FREQUENCY (Hz)
lOOk
100
200
300
400
500
TIME (pSEC)
3-107
LM 185-1.2/LM385- 1.2
TYPICAL APPLICATions
1.2V Reference from 1.5V Battery
Micropower Reference for 9V Battery
+9V
+1.5V
5101<
3k
1.23V
1.23V
LM385 -1.2
LM385 -1.2
SCHEmATIC DIAGRAm
+
2001<
501<
300k
100k
500
PACKAGE DESCRIPTion
H Package, 2 Lead TO·46 Metal Can
0.178-0.195
(4.521-4.953)
8
5'
NOM
-
0.085-0.105
SEAllNG _u:==:I!]}12.,59-2.007)
TT
PLANE
2LEAllS-D
0.016-0.019
10.406-0.483)
DlA
~
f.-
Z Package, 3 Lead TO-92 Plastic
1:::::~~)
0
~t.tN
112.700)
0.030 MAX
10.762)
~
~II
0.0145-0.0155
0.393n
-----II-- 10.3663
TVP
BEFOOELEAD
FNSH
3-108
0.090
12.286)
0.045-0.055
(1.143-1.397)
I'
........
Llnll\D
LM185-2.5/LM385-2.5
~~ TECHNOLOG~~~------~M~i~c-ro-p-o-w-e-rV~o~l~ta-g-e
Reference
FEATURES
•
•
•
•
DESCRIPTion
20JtA to 20mA operating range
Guaranteed 1% initial voltage tolerance
Guaranteed 10 dynamic impedance
Very low power consumption
APPLICATions
•
•
•
•
•
Portable meter references
Portable test instruments
Battery operated systems
Panel meters
Current loop instrumentation
The LM185-2.5 is a two terminal band gap reference
diode that has been designed for applications which
require precision performance with micropower operation. The device provides guaranteed operating
specifications at currents as low as 20JtA. The nominal voltage is 2.5V with both 1% and 2% tolerances
available. Some additional features are: maximum dynamic impedance of 10, low noise and excellent stability over time and temperature. The advanced
design, processing and testing techniques make linear's LM185-2.5 a superior choice over previous designs. A circuit for cold junction compensation of a
thermocouple is show below.
For applications requiring guaranteed temperature
drift, see the LT1034 data sheet.
Thermocouple Cold Junction Compensator
Io~
Reverse Voltage Change
16
50ItA
~~~~gl~ T~ ~ ~1\25;CI
16k
1M
_
I
2 MERCURY
CELLS
2.6V
(
"
TYPE K
" ' - - - - METER
-4
0.01
0.1
10
100
REVERSE CURRENT (mA)
3-109
III
LM 185-2.5jLM385-2.5
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Reverse Breakdown Current. . . . . . . . . . . . . .. 30mA
Forward Current. . . . . . . . . . . . . . . . . . . . . . .. 10mA
Operating Temperature Range
LM185-2.5 ................. -55°C to 125°C
LM385-2.5 ..................... O°C to 70°C
Storage Temperature Range
LM185-2.5 ................. -65°C to 150°C
LM385-2.5 ................. -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
BonOMVIEW
ORDER PART NUMBER
8
LM185H-2.5
LM385H-2.5
LM385BH-2.5
HPACKAGE
TO-46 METAL CAN
(NOTE 2)
BonOMVIEW
LM385Z-2.5
(g)
LM385BZ-2.5
(NOTE 2)
Z PACKAGE
TO-92 PLASTIC
ELECTRICAL CHARACTERISTICS (See note 1)
SYMBOL
Vz
PARAMETER
CONDITIONS
Reverse Breakdown Voltage
TA = 25°C, 20"A .;; IR
LM185-2.5
LM385-2.5
LM385B-2.5 (Note 2)
t>V z
t> Temp
Average Temperature Coefficient
20"A
Imin
Minimum Operating Current
Tmm
Reverse Breakdown Voltage
Change with Current
t>V z
~
E;
~
IR
TA
MIN
E;
~
E;
2.462 2.5
en
t>V z
•
Tmax
•
10kHz, IR = 100"A
Wide Band Noise (RMS)
10Hz
Long Term Stability
TA = 25°C ± O.l°e, IR = 100"A
E;
8
•
IR = 100"A (Note 3)
TA = 25°C
Tmin ~ TA ~Tmax
f
20
20mA (Note 2)
20"A E; IR E; lmA
TA = 25°C
Tmin ~ TA ~ Tmax
E;
UNITS
2.538
2.425 2.5
2.462 2.5
Tm;n ~ TA ~ Tmax
Reverse Dynamic Impedance
LM385-2.5/3858-2.5
MIN TYP MAX
20mA
lmA E; IR E; 20mA
TA = 25°C
rz
LM185-2.5
TYP MAX
•
0.2
20
20
ppmrC
20
"A
1
1.5
2
2.5
mV
mV
10
20
20
25
mV
mV
0.6
1.5
8
V
V
V
2.575
2.538
0.4
120
120
20
20
1
1.5
!l
!l
"V
ppm/kHr
t> Time
The. denotes the specifications which apply over full operating
temperature range.
Note 1: All specifications are for TA =25°e unless otherwise noted. For
the LM185-2.5 Tmin= -55°e and Tmax= +125°e. For LM385-2.5
Tmin=Ooe and Tmax = + 70 oe.
3-110
Note 2: For very low initial tolerance, consult LT1004 data sheet. The
LT1004 is a low cost, pin for pin substitution device. For guaranteed
temperature coefficient consult the LTl 034-2.5 data sheet.
Note 3: Guaranteed but not tested.
LM 185-2.5/LM385-2.5
TYPICAL PERFORmAnCE CHARACTERISTICS
Reverse Characteristics
Forward Characteristics
100
1.6
I 11111
J5 0 CJ+12J
V
/
/
0.1
.........
-
12
~
lli
«
>::;
§Z
l..o"
08
~
1.,.00
;!
~
1?
0.4
o
0.5
10
15
20
2.5
3.0
0.01
FORWARD CURRENT (mA)
Temperature Drift
10k
IIJIJ1Il
I_I JJ~~
- 55°C TO + 125°C
TA - 25°C
IR ~ 100"A
f
2.520
lk
2.515
§
2.510
i
2.505
~
2.500
2.495
)f"
2.490
""
~
2.485
100
~
I
10
Q
~
5
25
45
65
85
Noise Voltage
120
1200
100
~
1000
W
600
~
~
z
I'"
0.1
10
100
~
a:
i\
§
80
60
P
1+11JO~~11I1
I
20
lk
FREQUENCY (Hz)
10k
lOOk
lOOk
1M
11111111
40
C
Wlllil"v
30
~ 20
>::;
~ 10
/
-
....
OUT~UT
24k
VIN.,-VOUT
fI"
<
fo""
5V
IN~UT
o
100
10k
lk
100
Response Time
~
40
;!;
200
10
10
FREQUENCY (Hz)
0
400
V
V
/
./
Filtered Output Noise
1400
800
10
REVERSE CURRENT (mA)
TEMPERATURE (OC)
~
100
~
01
0.01
105 125
~
-
~
'iii
0.1
-55 -35 -15
/
§
I
r......
".
III
Reverse Dynamic Impedance
Reverse Dynamic Impedance
1000
~
100
10
0.1
REVERSE VOLTAGE (V)
~
I
TA'~125°C
100
lk
10k
CUTOFF FREQUENCY (Hz)
lOOk
100
500
TIME (~SEC)
3-111
LM 185-2.5/LM385-2.5
SCHEmATIC DIAGRAm
r---------~----~------~~------_.--~--_.------~----~+
200k
50k
500k
300k
1001<
500
500k
TYPICAL APPLICATions
9V
220k
LM334
2.7k
; - -.......--2.5V
2.5V
LM385 ·2.5
REFERENCE FROM A
9VSAnERY
OPERATION OVER A
WIDE SUPPlY RANGE
PACKAGE DESCRIPTion
H Package, 2 Lead TO-46 Metal Can
(~::=~:~~)J
(~:~~~=~::)
0.18O:t0 005
(4572:1:0.121)
~
0,015
r~uul"
(2032-2.54O)
nn
uU
0.016-0.019
0090
It'B6)
0.180:0.005
-L
MIN
I
NOM
L ___ .J
~
:~
(4572:1:0.127)
SEATING
PLANE
0.025
iD.63si
--t-T
0.500
MAX
(1270)
MIN
10.406-0.483)
~
OIA
fOR a·LEAD PACKAGE ONLY
H3("8)I8B
r-:;:-fo-~--rI-44-0a...::-oC/W-"'1-80-:~:-C/W-'1
3-112
Z Package, 3 Lead TO-92 Plastic
t
0050
~~~
(~:::~::)~
11.'70)
MAX
UNCONTROLLED
~i.
~
-HI t!:I:~:~:) j~~
-Ur .,
0.016::1::0.003
(0.406:1:0.076)
j.-
(0.381::1::0.051)
~-9""llnF "D
~,
LM385S8-1.2/LM385S8-2.5
TECH~o'G!!:'!k>~----M-ic-ro-p-o-w-e-rV-o-'t-a-g-e
Reference
FEATURES
DESCRIPTion
•
•
•
•
The LM385 series are two terminal band gap reference
diodes that have been designed for applications which reo
quire precision performance with micropower operation.
The devices provide guaranteed operating specifications
at currents as low as 15f.1A. Some additional features are:
maximum dynamic impedance of 10, low noise and excellent stability over time and temperature. The advanced design, processing and testing techniques make Linear's
LM385 series a superior choice over previous designs. A
circuit for cold junction compensation of a thermocouple
is shown below.
15f.1A to 20mA Operating Range-1.2V Version
20f.lA to 20mA Operating Range-2.5V Version
Guaranteed 10 Dynamic Impedance
Very Low Power Consumption
APPLICATions
•
•
•
•
•
Portable Meter References
Portable Test Instruments
Battery Operated Systems
Panel Meters
Current Loop Instrumentation
Reverse Voltage Change
with Current
Thermocouple Cold Junction Compensator
(LM38S-1.2)
10
la~50,.A
:[
16k
1M
LM334
-_""
2MJ~~Y
2.6V
t 1!1~~~c
VIN
':I
~ ~M385-2.5
~
950!l
100k W.W.
ZERO
RSH
~
2k
V
----
+
TYPEK~
-
'"u
~
>:!j
§2
450!l
METER-
~Ok
AOJUST
FOR
12.17mv
AT 25' c
ACROSS
450!l
,
~
0
0.01
0.1
If
10
100
REVERSE CURRENT (mA)
3-113
•
LM385S8-1.2/LM385S8-2.5
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Reverse Breakdown Current ...................... 30mA
Forward Current .................................. 10mA
Operating Temperature Range ............... O°C to 70°C
Storage Temperature Range ............ - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
ORDER
PART NUMBER
.om
TOP VIEW
NC 2
7 NC
NC 3
6
LM385S8·1.2
LM385S8·2.5
NC
5 (DO NOT USE)
4
PART MARKING
S8 PACKAGE
PLASTIC SO
3851 (1.2V VERSION)
3852 (2.5V VERSION)
ELECTRICAL CHARACTERISTICS (See Nole 1)
SYMBOL
Vz
~
PARAMETER
Reverse Breakdown Voltage
Average Temperature Coefficient
CONDITIONS
TA =25°C, 2O,.As IRs20mA
IMIN s IR s20mA (Note 2)
Imin
L'lVz
L'lIR
Minimum Operating Current
Reverse Breakdown Voltage
Change with Current
TminsTASTmax
Imln slRs1mA
TA=25°C
TminsTASTmax
1mAsIRs2OmA
TA=25°C
TmlnsTASTmax
IR= 100,.A
TA=25°C
TminsTASTmax
LM385·1.2
MIN TYP MAX
1.205 1.235 1.260
20
L'lTemp
rz
en
~
Reverse Dynamic Impedance
Wide Band Noise (RMS)
Long Term Stability
•
•
8
•
•
10Hzsfs10kH~IR=100,.A
TA=25°C±0.I°C, IR= 100,.A
0.4
60
20
15
LM385·2.5
MIN TYP MAX
2.425 2.5
2.575
20
UNITS
V
ppm/oC
20
,.A
1
1.5
2
2.5
mV
mV
20
25
20
25
mV
mV
1
1.5
II
II
1
1.5
8
0.4
120
20
~V
ppm/kHr
L'lTime
The • denotes the specifications which apply over full operating tem·
perature range.
Note 1: All specifications are for TA =25°C unless otherwise noted.
Tmin =OOC and Tmax = +70°C.
3-114
Note 2: For guaranteed Te and very low initial tolerance, consult
LT1034CS8 data sheet. The LT1034CS8ls a low cost, pin for pin substitution
device.
LYLln
FAI)
LM199/LM399
U \K
LM199A/LM399A
TBCHNOLOG~~~~---------P-re-c-is-io-n-R-e-f-e-re-n-c-e
FEATURES
DESCRIPTion
•
•
•
•
•
APPLICATions
The LM199/399 precision reference features excellent temperature stability over a wide range of voltage,
temperature, and operating current conditions. A stabilizing heater is incorporated with the active zener on
a monolithic substrate which nearly eliminates
changes in voltage with temperature. The subsurface
zener operates over a current range of O.SmA to 10mA,
and offers minimal noise and excellent long term
stability.
•
•
•
•
•
Ideal applications for the LM199/399 include digital
voltmeters, precision calibration equipment, current
sources and a variety of other precision low cost references. A 10 volt buffered reference application is
shown below.
Guaranteed 0.5 ppm / 0 Ctemperature coefficient
Guaranteed 1.0 Q max. dynamic impedance
Guaranteed 20,.N RMS max. noise
Guaranteed initial tolerance of 2%
Wide operating current range
Precision voltage reference for multi meters
Calibration equipment voltage standards
Laboratory measurement equipment
Industrial monitor/control instruments
High accuracy data converters
10 Volt Buffered Reference
Reverse Voltage Change
+15V
7.5k
5%
>
.§.
9k
.
0.1%
+
3
1
I.M399H
~
-
4
6.95~
...
..
~~7
LT1001
J
3
t.'I
w
6
C!J
1OV
~
5
4
!$
+
20k V
0.1%
....J
w
C!J
Z
:I:
4
ljj
a:
2
a:
1
~
2
10
-'-
REVERSE CURRENT (rnA)
3-115
II
LM199/LM399
LM199A/LM399A
ABSOLUTE mAXimum RATinGS
Temperature Stabilizer. . . . . . . . . . . . . . . . . . .. 40V
Reverse Breakdown Current. . . . . . . . . . . . . . . 20mA
Forward Current. . . . . . . . . . . . . . . . . . . . . . . .. 1mA
Reference to Substrate Voltage V(RS), (Note 1). -0.1V
Operating Temperature Range
lM199/199A ............... -55°C to 125°C
lM399/399A ................... O°C to 70°C
Storage Temperature Range
lM199/199A ............... -65°C to 150°C
lM399/399A .............. , -65°C to 150°C
lead Temperature (Soldering, 10 sec.) .... " 300°C
PACKAGE/ORDER InFORmATion
TOI'YlEW
ORDER PART NO:
lM199H, lM199AH
lM399H, lM399AH
lM199AH-20,LM399AH-50
+~
-~+
HPKG.
TO·46 METAL CAN INSIDE THERMAL SHIELD
tw3
___ 1~
FUNCTIONAL BLOCK
DIAGRAM
I H
I
I
I
I
I
L ____ --l
-
4
2
-
ELECTRICAL CHARACTERISTICS (See note 2)
SYMBOL
Vz
I!..Vz
rz
PARAMETER
Reverse Breakdown Voltage
Reverse Breakdown Voltage
Change with Current
Reverse Dynamic Impedance
Temperature Coellicient
LM 199/LM399
I!.. emp
~
LM199A1LM399A
en
I!..Vz
ir"i'iiiie
IH
VH
RMS NOise
Long Term Stability
CONDITIONS
0.5mA .;; IR .;; 10mA
MIN
• 6.8
0.5mA .;; IR .;; 10mA
IR = 1mA (Note5)(10sfs100Hz)
•
•
6
0.5
9
1
-55°C.;; TA .;; 85°C
+85°C .;; TA .;; 125°C
O°C .;; TA .;; 70°C
0.3
5
1
15
-55°C.;; TA .;; 85°C
+85°C .;; TA .;; 125°C
O°C .;; TA .;; 70°C
10Hz .;; I .;; 10kHz
Stabilized, 22°C.;; TA .;; 28°C
1000 Hours, IR = 1mA ± 0.1%
TA = +25°C, Still Air, VH = +30V
TA = -55°C (Note 4)
0.2
5
0.5
10
7
20
Note 3
•
Temperature Stabilizer
Supply Current
Temperature Stabilizer Supply Voltage
• 9
Warm-up Time to ± 0.05% Vz
VH= 3OV, TA = 25°C
Initial Turn-on Current
9V .;; VH .;; 40V, TA = 25°C, (See Note 4)
The. denotes the specifications which apply over full operating
temperature range.
Noll 1: The substrate is electrically connected to the negative
terminal of the temperature stabilizer. The voltage that can be
applied to either terminal of the reference is 40V more positive or
O.W more negative than the substrate.
Nola 2: These specifications apply for 30Vapplied to the temperature
stabilizer and -55°C ... TA ... 125°C for the LM199; and O°C ... TA
... 70°C for the LM399.
3-116
LMI99/199A
TYP MAX
6.95 7.1
8
8.5
22
3
140
14
28
40
200
LM399/399A
MIN
6.75
TYP
MAX
6.95
7.3
6
12
1.5
0.5
UNITS
V
mV
(I
ppmfOC
ppm/oC
ppmrC
0.3
2
0.3
7
8
ppmrC
ppmfOC
ppmfOC
1
50
",V
Note 3 ppm/v'kif
8.5
15
mA
40
V
seconds
mA
9
3
140
200
Nola 3: Devices with maximum guaranteed long term stability of
20 ppm/,,!kH are available. Drift decreases with time.
.
Nola 4: This initial current can be reduced by adding an appropriate
resistor and capacitor to the heater circuit. See the performance
characteristic graphs to determine values.
Nota 5: Guaranteed by" Reverse Breakdown Change with Current."
LM199/LM399
LM199A/LM399A
TYPICAL PERFORmAnCE CHARACTERISTICS
Reverse Characteristics
Dynamic Impedance
100
Stabilization Time
100
J
T.
10
«g
§:
..
~
ffic:
/
10
STABILlZg~
z
c:
u
~
1.0
::>
~
~
u
~
-~ ::::::
0.1
I /
i
6.25
6.45
6.65
7.05
6.85
10
100
r-.... .......
::>
u
......
ffi
55
100
:!!;
4~V
T. = 25°C
140
"""- r-....
«
120
I-
z
100
c:
c:
::>
60
c:
60
~'"
~,
u
....45
40
20
-55 -35 -15
65 85 105 125
Zener Noise Voltage
w
100
,
50
~
z
~
\
'"
\
~,
"
10
100
!3§;'"
STABILIZED (T, - 90°C) _
~
65
o
85 105
2
4
5
4
25°C
,
0
20
10
"
6
8 10 12 14 16 16
Limiting Surge Current
a
i
;
;;; 700
U,T, = '25°C
LL, ..[
10V
20V - t /YH = 30V
VH = 40V _ t -
TIME (SEC)
OUTPUT
r-STABllIZE~1
,--(T, = 900C)
'"
w
T,
45
Response Time
200
§.
25
V
TEMPERATURE (OC)
TURN ON TEMPERATURE (OC)
~ 150
5
'"
l
..- ",-VHVH ==
~ V , / ,~
~~
50
25
20
Heater Current
w
o
15V
16
160
~
:r::
-55 -35 -15 5
'"~
12
J
HEATER ON TIME (SEC)
:r::
g
VH
lOOk
g
........
"
,
i
Heater Current
VHI =
~
c: 150
10k
...
i
FREQUENCY (Hz)
Initial Heater Current
200
lk
-' -
= -55°C
I
-4
01
250
«g
25°C"
-3
REVERSE VOLTAGE (V)
IZ
I
-2
(T = 9rC)
J
0.01
T,
z
>Cl
~BILIZED
5Cl
,'T.
I
-1
=>
0..
/J
:E 1.0
:>
g
l-
.-'I f
..
T, = 25°C
ffi
~
(T, -900C)
Cl
25°C
75.
INPUT~.
T~"OUrUT
600
~ :::
-
~
~
f---+---t-+---+-t---+-~'--i
300
1---r----j-'--r-~~'I":sI"b0"9_:::.o"1
::. 200
f---+---t--Vih"""''F:;;;o.'''F---I...---J
1
IN UT
f---+---t-+---+-t---+--t~
100 1--t---tJI
01..-...l.-....:L--l._.L-...L--"-_'---'
lk
FREQUENCY (Hz)
10k
lOOk
100
200
TIME (j.s)
300
400
10
30
40
20
MINIMUM SUPPLY VOLTAGE (V)
·Healer must be bypassed wilh a 2 pF or larger
tantalum capaCitor ~ resistors are used.
3-117
II
LM199/LM399
LM199A/LM399A
TYPICAL PERFORmAnCE CHARACTERISTICS
Long Term Reference Performance
44 Units Tested
Low Frequency Noise Voltage
12
10
1
SIGMA
Ir
I
1/,/
o
-
.-""
/
V
!J.\
..:~ 10
2
12
llll~
50
MONTHS
.IM ;~ ~ W' ~,
100
150
Mw
200
250
TIME (SEC.)
TYPICAL APPLICATiOnS
Single Supply Operation
9V lo40V
~p---.....,
Split Supply Operation
Negative Heater Supply with
Positive Reference
+15V-~---,
Rs
+15V - - - - - - ,
7.5k
7.5k
-9VTO
-33V
-15V
Portable Calibrator
8.8k
1%
Standard Cell Replacement
200k
18V -
LT1001AC 6
3 +
+---+-"1
4
5k
OUTPUT
3-118
OUTPUT
10V
LM199/LM399
LM199A/LM399A
SCHEmATIC DIAGRAmS
Temperature Stabilizer
Reference
W
00
6.3V
Ql
30pF
016
10k
all
2k
2k
2.6k
30k
4.2
lk
~------~~~-+---+----~--4-~4
-
~
_____
-~2
-
PACKAGE DESCRIPTiOn
H Package, 4 Lead
TO-46 Metal Can
0.209-0.219
(5.309-5.563)
1_
l
J
r
0.015
0.500 (0.381)
(12.70)
Thermal Shield *
For TO-46, H Package
(;7~+';~~;"'~--::~~·~~,*,~)
0.085-0.105
(2159-2.667)
M~.
t:!:o
00 ,::,
0.016-0.019 / '
(0.406-0.483)
DIA
MAX
0.016-0.019 OIA TYP
(0.406 - 0.483)
jL
I
0.036-0.046
(0.914-1.168)
Lo.l00
(2.540)
0.050
(1.270)
"Thermal Shield Material is Vatox"
Valax Is a registered lrademark Df General Electric
3-119
II
NOTES
3-120
~-Y"llnll\l2
~~
LTS80/LTS81
T8CHNOLOG~~~--------P-r-e-Ci-si-o-n-R-e-fe-re-n-c-e-s
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
The LT580/LT581 are bandgap voltage references utilizing
thin film technology and a greatly improved curvature
correction technique. Wafer level trimming of both refer·
ence and output voltage combines to produce units with
high yields to very low TC and tight initial tolerance of out·
put voltage.
Direct Replacement for Present References
Ultra Low Drift-3ppm/oC Typ.
Curvature Corrected
Series or Shunt Operation
Ultra High Line Rejection .. 1l2ppmlV
Low Output Impedance .. 0.020
Tight Initial Output Voltage
100% Noise Tested
The LT580/LT581 can both sink and source up to 10mA
and can be used in either the series or shunt mode. This
allows the reference to be used for both positive and nega·
tive output voltages without external components. Mini·
mum input·output voltage is less than 1V in the series •
mode, providing improved tolerance of low line conditions.
APPLICATions
•
•
•
•
•
Ato Dand Dto AConverters
Precision Regulators
Constant Current Sources
Vto FConverters
Bridge Excitation
For voltage references with improved speCifications,
please see the LT1019, LT1021, and LT1031 data sheets.
Output Voltage Drift
Negative 10V Reference for CMOS DAC
1.003
_1.002
~
:l! 1.001
~
i
1.000
~
~
VOUT
5
~
~
V
0.999
00.998
-15V
•LOW TC CERMET, TRIM RANGE = ± 1.5%
0.997
-50 -25
0
25
50
75
TEMPERATURE (Oe)
100
125
3-121
LTS80/LTS81
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Input Voltage .................................. 40V
Storage Temperature Range ........... - 65°e to 175°e
Lead Temperature (Soldering, 10 sec.) ............ 300 0 e
Operating Temperature Range
J, K, L, MGrades ...................... ooe to 70 0 e
S, T, UGrades ..................... - 55°e to 125°e
ORDER PART
NUMBER
BOTTOM VIEW
INPUT
CJ"~'
LT580JH
LT580KH
LT580LH
LT580MH
LT580SH
LT580TH
LT580UH
GROUND
H PACKAGE
TO'52 METAL CAN
BOTTOM VIEW
INPUT
LT581JH
LT581KH
LT581LH
LT581SH
LT581TH
LT581UH
CJ""-'
GROUND
HPACKAGE
TO·39 METAL CAN
LTseo ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VR
Output Voltage
TC
Output Voltage Change
Over Temperature in
mV and (ppm/oC)
VIN
IlVOUT
IlVIN
Line Regulation
IlVOUT
IlIOUT
load Regulation (Sourcing)
Shunt Mode
LT580J
LT580K, S
LT580L, M, T, U
LT580J (OOC to 70°C)
LT580K (OOC to 70°C)
LT580l (O°C to 70°C)
LT580M (OOC to 70°C)
LT580S( -WC to +125°C)
LT580T (- WC to +125°C)
LT580U (- 55°C to +125°C)
7V-5VIN-530V LT580J, S
LT580K
LT580l, M, T, U
4.5V-5V IN -57V LT580J,S
lT580K
LT580L, M, T, U
0-5 IOUT-510mA
1.5mA -5 ISHUNT -5 10mA
10
en
Quiescent Current
Output Noise (Note 1)
Output Voltage
Stability with Time
0.1Hzto10Hz
Per Month
long Term
3-122
=+15V, TA =25°C unless otherwise noted
MIN
2.425
2.475
2.490
LT580
TYP
2.500
2.500
2.500
••
•••
••
MAX
2.575
2.525
2.510
15 (85)
7 (40)
4.3 (25)
1.75 (10)
25 (55)
11 (25)
4.5 (10)
0.5
0.5
0.5
0.1
0.1
0.1
1
2
6
4
0.75
10
25
250
1.5
2
3
2
1
10
10
UNITS
V
V
V
mV(ppm/oC)
mV(ppm/°C)
mV(ppm/oC)
mV(ppm/oC)
mV(ppm/oC)
mV(ppm/°C)
mV(ppm/°C)
mV
mV
mV
mV
mV
mV
mV
mV
rnA
~Vp·p
~V
~V
LT580/LT581
LT581 ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VR
Output Voltage
TC
Output Voltage
Change, Maximum
Deviation from 25°C
in mV and (ppml°C)
AVOUT
AV IN
Line Regulation
LT581S, J
LT5811, K
LT581U, L
LT581J (O°C to 70°C)
LT581 K(OOC to 70°C)
LT581 L (O°C to 70°C)
LT581S (- 55°C to +125°C)
LT581T(-55°Cto +125°C)
LT581U(-55°Cto +125°C)
15VsVIN s30V
13VsV IN s15V
AVOUT
AloUT
Load Regulation (Sourcing)
Shunt Mode
la
en
Quiescent Current
Output Noise (Note 1)
Long Term Stability
Short Circuit
Current
Output Current
Isc
lOUT
V'N= +15V, TA=25°C unless otherwise noted
MIN
9.970
9.990
9.995
•
•••
•
•
50
100
0.75
30
25
30
0.1 Hz to 10Hz
Non·Cumulative
Sourcing
Sourcing
Sinking
10
5
5
••
UNITS
MAX
10.030
10.010
10.005
13.5(30)
6.75(15)
2.25(5)
30 (30)
15 (15)
10 (10)
3
1
0.5
0.1
OSlOUTs5mA
1mAsisHUN Ts5mA
The. denotes the specifications which apply over the full operating
temperature range.
LT581
TYP
10.000
10.000
10.000
V
V
V
mV(ppm/OC)
mV(ppm/°C)
mV(ppm/°C)
mV(ppml°C)
mV(ppm/°C)
mV(ppm/°C)
mV
mV
~VlmA
500
500
1.0
~VlmA
rnA
~Vp·p
ppmlkHr
rnA
25
rnA
rnA
rnA
Note 1: Although 0.1Hz to 10Hz noise is not a standard production test,
Linear Technology does 100% test 10Hz to 1kHz noise. Consult factory
for details.
TYPICAL APPLICATiOnS
High Current Precision Supply
VIN .. 15V .....- - - - . . ,
Suggested Output Trim
Output Current Boost with Current Limit
,
I
3900
: 2N6040
I
oJ
GLOWS IN
CURRENT LIMIT
(DO NOT OMIT)
+Vs
trr:
R3
2Dk
0.1~F
R1
VDUT
+10VAT4A
.,..
R1
2200
LED
8.20
~~
OUT
GNll
+Vs
lT581 OUT
.....--~~
V+"'(VDUT+2.8V) ....-
-15V
LT580J
LT580K,S
lT580L, M, T, U
LT561S,J
lT561T, K
lT561U, L
R1
470
100
6.B!l
1B!l
6.80
3.30
R2
2k
2k
2k
5k
5k
5k
III
LT58Q
LT581
GNO
OUT
ILOAD s 100mA
2~F
SOLID TANTALUM
GNO
.,..
3-123
•
LT580/LT581
TYPICAL APPLICATions
12V Supply Connection
Two·Terminal Negative Reference
-.I--U
.. ...
EjE
_~~~LOG
t=
IN
.
.' I f ( ' .
. LiO!Il . OUT
OUT
12V%S%
5SOII%S%'
10V AT OmA TO SmA
GND
...
'NOT REQUIRED ON LTC LT580 OR LTS81
R= 15V-VREF
4mA
-lSV
Negative Series Reference
Optional Trim Configuration
+lSV
V+
Rl'
III
+vs
LT5IlO
l1li81
. OUT
+10.00V
M.
~1li8j.
6.8k!l
V- _ _ _J
" " - - - + - - - - - V REF @ ILOAD "SOmA
'Rl=V+-5V R2=IY-IYREF Dl'YREF+5V
2mA '
lmA'
10k!l
22Il
12!1
3.90
TRIM
RANGE
'30mV
'10mV
'5mV
MAX
4TCR
3.5ppm/'C
2.0ppm/'C
O.6ppm/'C
...
4.3k!l
-lSV
PACKAGE DESCRIPTiOn
LT581
TO·39
LT580
TO·52
0.165-0.185
(4.191-4.70)
0.350-0.370
(8.890-9.398)
DIA
0.305-0.335
(7.747-8.509)
DlA
0.050
(1.270)
TYP
0.036-0.046
(0.914-1.168)
H3(52)188
H3(38I188
3-124
~-.··llntf\Q
~,
REF-0l/REF-02
TECHNOLOGI!."'k>~--p-re-C-iS-iO-n-V-o-lta-g-e-R-e-fe-r-e-n-c-es
FEATURES
DESCRIPTion
•
•
•
•
•
•
The REF-01 / REF-02 are precision 10V and 5V bandgap
references which provide stable output voltages over a
wide range of operating conditions. Output voltage is accurate to ±O.3% with a low 5ppm/oC typical temperature
coefficient. The REF-01 and REF-02 are excellent choices
for applications where low drift, moderate accuracy, low
power consumption and low cost are considerations.
Trimmed Output ±O.3%
Low Drift-5ppm/oC Typical
Low Noise-3ppm (p-p)
High Line Rejection
Temperature Output-REF-02
Low Supply Current 1.4mA Max.
APPLICATions
•
•
•
•
•
The REF-02 includes a temperature output pin which provides a linear voltage proportional to absolute temperature.
A to Dand Dto A Converters
Precision Regulators
Constant Current Sources
V to F Converters
Bridge Excitation
For lower drift and higher accuracy references, please
see the LT1019 and LT1021 data sheets.
Unra Linear Strain Gauge AmplHier
Output Voltage Temperature
Drift
+15V
4120· 'hW
5V
r----,
I
R3
2M
3500
BRIDGE
~ 1.002
GAIN=100
:i
1.001
~ t:;r;F~~~~~~
~ 1.000
~
~ 0.999
'--------t-5V
3570·
'hW
-15V
R6
~
o 0.998
I--+--+--+-rl--t--i--;
FULL TEMP RANGE BOX GUARANTEED FOR
REF-OlA AND REF-02A (8.5ppm/ OC)
2M"
·REDUCES REFERENCE AND AMPLIFIER
LOADING TO = O.
"IF R6=R3. BRIDGE IS NOT LOADED
BY R2 AND R4.
tAl Vos AND DRIFT ARE NOT CRITICAL.
0.997 L---'---'---L..--L--1.--'---'
-50 -25
0
25
50
75 100 125
TEMPERATURE (OC)
3-125
REF-Ol / REF-02
PACKAGE/ORDER InFORmATiOn
ABSOLUTE mAXimum RATinGS
REF-01 102, A, E, H ....................... 40V
REF-01C/02C ........................... 30V
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . 500mW
Output Short Circuit Duration
To Ground ......................... Indefinite
To VIN ::$16V ....................... Indefinite
To VIN > 16V . . . . . . . . . . . . . . . . . . . .. Not Allowed
Storage Temperature ............. - 65°C to 150°C
Operating Temperature
REF-01/02, REF-01A102A ...... -55°Ct0125°C
REF-01E/02E, REF-01H/02H,
REF-01G/02C, REF-01 D/02D ....... O°C to 70°C
TOP VIEW
ORDER PART
NUMBER
4
GNO (CASE)
REF-01AH
REF-01H
REF-01EH
REF-01HH
REF-01CH
REF-02AH
REF-02H
REF-02EH
REF-02HH
REF-02CH
REF-02DH
REF-01 EJ8
REF-01 HJ8
REF-01 CJ8
REF-01 EN8
REF-01 HN8
REF-01CN8
REF-02EJ8
REF-02HJ8
REF-02CJ8
REF-02DJ8
REF-02EN8
REF-02HN8
REF-02CN8
REF-02DN8
METAL CAN HPACKAGE
• INTERNAllY CONNECTED. 00 NOT
CONNECT EXTERNAllY.
"00 NOT CONNECT ON REF·01.
TOP VIEW
NC·OBNC'
INPUT 2
7 NC'
TEMP" 3
6 OUTPUT
GNO 4
5 TRIM
PlASTIC OIP N8 PACKAGE
8 PIN HERMETIC DIP
'INTERNAllY CONNECTED. 00 NOT
CONNECT EXTERNAllY.
"00 NOT CONNECT ON REF·01.
ELECTRICAL CHARACTERISTICS
VIN=
+ 15V, TA= 25°C unless otherwise noted
SYMBOL PARAMETER
CONDITIONS
Vo
Output Voltage
enp-p
Output Adjustment Rp= 10k{l
Range
Output Voltage
O.lHz to 10Hz (Note 6)
Noise
Input Voltage Range
VIN
aVOUT
aV IN
aVOUT
alOUT
10
lOUT
Isc
VT
Il=O
Line Regulation
(Note 1)
(VouT+3V) :sVIN:s 33V
Load Regulation
(Note 1)
Il =OrnA to lOrnA
Quiescent Supply
No Load
Current
Load Current
Sink Current
Short Circuit
Vo=O
Current
Temperature Voltage (Note 2)
Output
3-126
REF-Ol
REF-02
REF-Ol
REF-02
REF'Ol
REF'02
REF-Ol
REF-02
REF-Ol
REF-02
MIN
9.97
4.985
±3.0
±3.0
-
-
MAX
10.03
5.015
-
12
7
-
-
-
-
-
0.0001
40
40
0.010
-
0.0005
0.0010
0.008
0.010
0.65
1.4
-
-
25
-
-
620
-
20
-20
MIN
9.95
4.975
±3.0
±3.0
REF-DlIH
REF-D2IH
TYP
10.00
5.000
+5, -27
+5, -13
20
10
-
12
7
10
-0.3
REF-02 Only
REF-D1AtE
REF-D2A/E
TYP
10.00
5.000
+5, -27
+5, -13
20
10
-
UNITS
MAX
10.05
5.025
-
-
V
V
%
%
JLVp-p
JLVp,p
0.0001
40
40
0.010
V
V
%/V
0.0005
0.001
0.010
0.010
%/mA
%/mA
0.65
1.4
rnA
-
rnA
rnA
rnA
mV
-
10
-0.3
20
-20
-
25
-
-
620
-
REF-Ol / REF-02
ELECTRICAL CHARACTERISTICS
V'N= +15V, TA=25°C unless otherwise noted
Output Adjustment
Range
Rp= 10kO
Output Voltage
Noise
Line Regulation
(Note 1)
0.1 Hz to 10Hz (Note 6)
-
REF-01C
REF-02C
TYP
10.00
5.000
+5, -27
+5, -13
30
12
(VOUT + 3V):sV 1N :s33V
-
0.0001
0.015
Load Regulation
(Note 1)
IL =OmA to 8mA
IL =OmA to 4mA
-
0.0005
0.015
-
SYMBOL PARAMETER
Va
enp•p
AV OUT
AV;;AVOUT
AloUT
la
lOUT
Isc
VT
Output Voltage
CONDITIONS
IL =OmA
Quiescent Supply
No Load
Current
Load Current
Sink Current
Short Circuit
Vo=O
Current
Temperature Voltage (Note 2)
Output
REF-Ol
REF-02
REF-Ol
REF-02
REF-Ol
REF-02
MIN
9.90
4.950
±2.7
-
UNITS
MIN
TYP
MAX
4.900
5.000
5.100
-
-
-
-
V
V
%
%
!,Vp-p
!,Vp-p
±2.0
+5, -13
-
12
-
0.0001
0.04
-
-
-
-
0.001
0.04
0.65
1.6
-
0.65
2.0
rnA
-
8
-0.2
-
20
20
25
-
20
20
25
-
rnA
rnA
rnA
-
620
-
-
620
-
mV
8
-0.2
REF-02 Only
REF-02D
MAX
10.10
5.050
%/V
%/mA
%/mA
ELECTRICAL CHARACTERISTICS
V'N= +15V, -55°C::s;TA::S; ±125°C for REF-01A/02A and REF-Ol/REF-02, O°C::s;TA::S; + 70°C for REF-01E/02E and
REF-01H/02H, IL=OmA unless otherwise noted
SYMBOL
AV
AT
TC
AV OUT
AV 1N
AV OUT
AloUT
PARAMETER
Output Voltage Change with
Temperature
(Notes 3 and 4)
Output Voltage Temperature
Coefficient
Change in Vo Temperature
CoeffiCient with Output
Adjustment
Line Regulation
(V 1N = SV to 33V) (Note 1)
Load Regulation
(I L= OmA to SmA) (Note 1)
Temperature Voltage Output
Temperature Coefficient
CONDITIONS
REF-01A/E
REF-02A/E
MIN
TYP
MAX
0.02
0.06
0.09
0.15
REF-OllH
REF-02lH
MIN
TYP
0.035
0.144
MAX
0.17
0.45
UNITS
O°C:sTA:s + 70°C
-55°C:sTA:s + 125°C
••
(Note 5)
•
•
-
5
S.5
-
8
25
ppm/oC
-
0.5
-
-
0.5
-
ppm/%
••
••
•
-
0.0001
0.0001
0.012
0.015
0.0001
0.0001
0.012
0.015
%/V
%/V
0.002
0.002
2.1
0.010
0.012
-
0.002
0.002
2.1
0.012
0.015
%/mA
%/mA
mV/oC
Rp= 10kO
O°C:sTA:s + 70°C
-55°C:sTA:s +125°C
O°C:sTA:s + 70°C
-55°C:sTA:s +125°C
(Note 2) REF-02
-
-
-
%
%
The. denotes the specifications which apply over the full operating
temperature range.
3-127
•
REF-Ol / REF-02
ELECTRICAL CHARACTERISTICS
VIN= +15V, O°CSTAS + 70°C and IL=OmA unless otherwise noted
SYMBOL
PARAMETER
CONDITIONS
MIN
IlV
lIT'"
TC
IlVOUT
IlVIN
IlVOUT
IlIOUT
Output Voltage Change with
Temperature
Output Voltage Temperature
Coefficient
Change in Va Temperature
Coefficient with Output
Adjustment
Line Regulation
(Note 1)
(Notes 3 and 4)
Load Regulation
(Note 1)
Temperature Voltage Output
Temperature Coefficient
IL =OmA to 5mA
(Note 5)
Rp= 10kll
VIN=8V to 30V
(Note 2) REF-02
Note 1: Line and load regulation specifications include the effect of self
heating.
Note 2: Limit current in or out of pin 3 to 50nA and capacitance on pin 3
to 30pF.
Note 3: !l V is defined as the absolute difference between the maximum
output voltage and the minimum output voltage over the specified
temperature range expressed as a percentage of nominal output.
t.V=
I
VMAX-V IN
VOUT
I
xl00
PACKAGE DESCRIPTiOn
H Package
Metal Can
•
•
•
•
•
•
REF-01C
REF-02C
TYP
-
REF-02D
MAX
0.45
MIN
UNITS
TYP
MAX
1.7
-
%
-
8
65
-
8
250
ppm/oC
-
0.5
-
-
0.5
-
ppm/%
-
0.0001
0.018
-
0.0001
0.05
%/V
-
0.002
0.018
-
0.002
0.05
%/mA
-
2.1
-
-
2.1
-
mV/oC
Note 4: !lV specification applies trimmed or untrimmed.
Note 5: TC is defined as IlV divided by the temperature range, i.e.,
TC=~
TMAX-TMIN
Note 6: O.IHz to 10Hz noise cannot be 100% tested on modern high
speed test equipment, so Linear Technology does not put a guaranteed
maximum specification on this parameter for standard units. 100%
bench testing of O.IHz to 10Hz noise is available on special request. To
ensure low output noise, Linear Technology does 100% test 10Hz to
1kHz noise. Consult factory for details.
Dimensions in inches (millimeters) unless otherwise noted.
J8 Package
8 Lead Hermetic DIP
N8 Package
8 Lead Plastic
t"~:I:l
O
'65!
1
*LEADS WITHIN 0.007 OF TRUE PDSlnoN (TP) AT GAUGE PLANE
3-128
2
3
O~",OOO5
~0127)
4
*lEADS WITHIN 0.007 OF TRUE POSITION (TP) AT GAUGE PlANE
SECTion 4-VOLTAGE REGULATORS
4-1
INDEX
SECTION 4-VOLTAGE REGULATORS
INDEX .................................................................................................... .
SELECTION GUIDE . ................ .
PROPRIETARY PRODUCTS
LTl003, 5 Volt, 5 Amp Voltage Regulator ......................................................................... .
LTl005, Logic Controlled Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTl020, Micropower Regulator and Comparator . ...................... .
LTl020CS, Micropower Regulator and Comparator .............................
. ........ .
LTl033, 3A Negative Adjustable Regulator . ....................................................................... .
LTt 035, Logic Controlled Regulator . ............................................................................ .
LTt036, Logic Controlled Regulator . ........................................................................ .
LTl038, 10 Amp Positive Adjustable Voltage Regulator . ......................................................... .
LTl083, 7.5A Low Dropout Positive Adjustable Regulator . .............................................. .
LTl083-5, 7.5A Low Dropout Positive Fixed 5V Regulator . ............................. .
LTt 083-12, 7.5A Low Dropout Positive Fixed 12V Regulator. . . . . . . . . . . . . . .
. ................ .
LTl084, 5A Low Dropout Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . .
................
. ........... .
LTl084-5, 5A Low Dropout Positive Fixed 5V Regulator ................
. .................................... .
. ......... .
LTt 084-12, 5A Low Dropout Positive Fixed 12V Regulator. . . . . . . . . . . . . . . . . . . . . .
LTl085, 3A Low Dropout Positive Adjustable Regulator. . . . . . . . . . . .
. ............ .
LTt 085-5, 3A Low Dropout Positive Fixed 5V Regulator ............................................ .
. ............. .
LTt 085-12, 3A Low Dropout Positive Fixed 12V Regulator. . . . . . . .
LTl086, 1.5A Low Dropout Positive Adjustable Regulator . ... .
LTt 086-5, 1.5A Low Dropout Positive Fixed 5V Regulator . ...... .
LTl086-12, 1.5A Low Dropout Positive Fixed 12V Regulator . ............ .
LTt 087 Adjustable Low Dropout Regulator with Kelvin-Sense Inputs . ....... .
LT1120, Micropower Regulator with Comparator and Shutdown ........................................................ .
ENHANCED AND SECOND SOURCE PRODUCTS
LM117/LM317, Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . .
..........................
LTI17AILT317A,'mprovedLMI17 ..............................................................................
LM117HV ILM317HV, High Voltage Positive Adjustable Regulator .............
. . . . . . . . . . . . . . . . . . . . . ..
LTI17AHVILT317AHV,'mprovedLMI17HV .......................................................................
LM123/LM323, 5 Volt, 3AmpReguiator ..
........................
.................
LT123A1LT323A, Improved LM 123. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM137/LM337, Negative Adjustable Regulator ....... ......................
....................
LTI37AILT337A,'mprovedLMI37.....................................................................
LM137HVILM337HV, High Voltage Negative Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTI37AHVILT337AHV,'mprovedLMI37HV..............................................................
LM138/LM338, 5 Amp Positive Adjustable Regulator .. .
LTt38AILT338A, Improved LM138 . ................................................................. .
LM150/LM350, 3Amp Positive Adjustable Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . .
LTI50AILT350A,lmprovedLMI50 ..............................................................................
4-2
4-2
4-3
4-9
4-17
4-29
4-45
4-49
4-57
4-69
4-77
4-89
4-101
4-101
4-89
4-101
4-101
4-89
4-101
4-101
4-113
4-113
4-113
13-28
4-125
4-137
4-137
4-145
4-145
4-149
4-149
4-157
4-157
4-165
4-165
4-169
4-169
4-177
4-177
_____R_E_G_ULA_TO_R_S_EL_EC_T_IO_N_G_U_ID_E
L7YD~
mlLlTAAY
POSITIVE
10
OUTPUT
OR
CURRENT NEGATIVE
(AMPS)'
OUTPUT'
10.0
Pos.Adj.
7.5
Pos. Fixed
PART NUMBER
LT1038MK
LT10B3MK·5
LT1083MK·12
Pos.Adj.
LT1083MK
5.0
Pos. Fixed
LT1084MK·5
LT1084MK·12
LT1003MK
Pos.Adj.
LT138AK LM138K
LT1084MK
Swilching
LT1070MK
LT1070HVMK
3.0
Pos. Fixed
LT1085MK·5
LT1085MK·12
LT123AK LM123K
Pos.Adj.
LT150AK LMI50K
LT1085MK
Neg. Adj.
LT1033MK
Dual Pos. Fixed LT1035MK
Positive
LT1036MK
LT1071MK
2.5
Switching
LT1071HVMK
1.5
Pos. Fixed
LT1086MK·5
LT1086MK·12
Pos.Adj.
LT1086MK
LT117AK LM117K
0.5 to 1.5 Pas. Adj.
LT111AH LM117H
Neg. Adj.
LT137AK LM137K
LT137AH LM137H
Pas. Adj.
LT117AHVK LM117HVK
High Voltage LT117AHVH LM117HVH
Neg. Adj.
LT137AHVK LM137HVK
High Voltaae LT137AHVH LM137HVH
1.25
Switching
LT1072MK
LT1072HVMK
LT1172MK
LT1172HVMK
1.0
Dual Pos. Fixed LT1005MK
125mA Positive
LT1020MJ
40mAto Switched
LT1026MJ8
100mA Capacitor
LT1026MH
LTC1044MJ8
LTC1044MH
LT1054MJ
LT1054MH
VIN
PACKAGE
TYPE
SteelTO·3
Steel TO·3
Steel TO·3
Steel TO·3
Steel TO·3
SteelTO·3
Steel TO·3
Steel TO·3
Steel TO·3
Steel TO·3
Steel TO·3
Steel TO·3
Slee1TO·3
Steel TO·3
SteelTO-3
Steel TO·3
SteelTO-3
Steel TO·3
Steel TO·3
SteelTO-3
SteelTO-3
Steel TO·3
Steel TO·3
Steel TO·3
SteelTO-3
TO·39
Steel TO·3
TO·39
Steel TO·3
TO·39
Steel TO·3
TO·39
SteelTO·3
Steel TO·3
Steel TO·3
Steel TO·3
Steel TO·3
14 Pin CERDIP
CERDIP
TO·5Can
CERDIP
TO·5Can
CERDIP
TO·5Can
MAX
IV)
35
35
35
35
35
35
20
35
35
40
60
35
35
20
35
35
40
20
30
40
60
35
35
35
40
40
40
40
Vo
NOMINAL REGULATED
OUTPUT VOLTAGE
(V)
1.2 to 33
5
12
1.2 to 34
5
12
5
1.2 to 33
1.2t034
··
5
12
5
1.2t033
1.2 to 34
-1.2to -37
Two 5V Outputs
12,5
,
·
5
12
1.2 to 34
1.2 to 37
-1.2to -37
FEATURES/COMMENTS
0.8% VOUT Tol., Plug In Compatible with 117, 150, 138.
Low Oropout (1.2V), 1% VOUT Tol.
Low Dropout i1.2Vi: 1%Your Tol.
Low Dropout 11.2V), 1% VREF Tol. Pin Compatible with 117, 150, 138 Types
Low Dropout (1.2V), 1% Your Tol.
Low Dropout (1.2V), 1% Your Tol.
2% VourTol.
LT138A Has 1% VREF Tol.
Low Dropout 11.2VI, 1% VREF Tol. Pin Compatible with 117, 150, 138 Types
Self Contained PWM and 5Amp Switch in a5·Pin Package
Low Dropout (1.2V), 1% VourTol.
Low Dropout (1.2V), 1%Your Tol.
LT123A Has 1% Your Tol.
LT150A Has 1% VREF Tol.
Low Dropout (1.2V), 1% VREF Tol. Pin Compatible with 117, 150 Types
2% VREFTol.
Logic Controlled Main Output Voltage, 75mA
Logic Controlled 12V, 3A Output, 5V, 75mA Auxiliary Output
Self Contained PWM and 2.5 Amp Switch in a5·Pin Package
Low Dropout (1.2V), 1% Your Tol.
Low Dropoutl1.2V), 1% VourTol.
Low Dropout (1.2VI, 1%VREFTol. Pin Compatible with 117Types.
LT117A Has 1% VREFTOI.
LT137A Has 1%VREF Tol.
60
60
1.2 to 57
LT117AHV Has 1% VREFTol.
50
50
40
60
-1.2to-47
LT137AHV Has 1% VREF Tol.
40
60
20
36
10
10
9.5
9.5
16
16
··
··
......
..
Two 5V Outputs
4t03O
tt
tt
Self Contained 40kHz PWM and 1.25 Amp Switch in a5·Pin Package
Self Contained 100kHz PWM and 1.25 Amp Switch in a5·Pin Package
Logic Controlled 1Am~Main OUlfiut Voltage, 35mA Auxiliary OulQut
Dropout Voltage =0.5V 40~A Ie Reference and Comparator
Voltage Converter, 10mA Output
Voltage Converter, 40mA Output, 5kHz Switching Rate
Voltage Converter and Regulator, 100mA Output, 25kHz Switching Rate
• The 10 values for the LT1070, LT1071, LT1072, and LT1172 are switch current values. Actual output current, voltage and polarity depends on the type of switching regulator employed .
•• These devices are non· regulating converters.
tt The available output voltage range is dependent upon the mode of operation selected.
4-3
REGULATOR SELECTION GUIDE
commERCIRI.
POSITIVE
OR
NEGAnvE
MP • OUTPUT'
10.0 Pos.AdJ.
7.5
Pas. Fixed
10
OUTPUT
I~r~w
PACKAGE
PART NUMBER
TYPE
lTl038CK
SteellO-3
lT1083CK·5
SteellO-3
LT1083Cp·5
PlasticT().3P
lT1083CK·12
SteelT().3
lT1083Cp·12
Plastic T().3P
Pos.Adj.
lT1083CK
SleellO·3
Plastic T().3P
lT1083CP
5.0
lTl003CK
SteelT()'3
Pas. Fixed
lT1OB4CK·5
Steel TO·3
lT1084CP.s
Plastic TO·3P
LT1084CI(.12
SteellO·3
LT1084CP·12
Plastic T().3P
Pas. Adj.
LT33BAK LM33BK
SteelTO-3
LT1084CK
SteeITO-3
LT1084CP
Plastic T().3P
Switching
SteelT()'3
lT1070CK
LT1070CT
TO·220
LT1070HVCK
SteelTO-3
LT1070HVCT
TO·220
3.0
Pos. Fixed
LT323AK LM323K
SteeITO-3
LT323AT
TO·22O
LT1085CK·5
SteellO-3
T()'22O
LT1085CT·5
LT1085CK·12
SteellO-3
T()'22O
lTt085CT·12
Pos.Adj.
Stee1T()'3
l T350AK lM350K
T()'220
LT350AT lM350T
lTl085CK
SteellO·3
LTt085CT
Plastic lO·22O
Neg. Adj.
LTt033CK
SteelT().3
LT1033CT
TO·22O
Dual Pos. Fixed LT1035CK
SteellO·3
LT1035CT
TO·22O
POSitive
LT1036CK
SteelT().3
LT1036CT
TO·22O
2.5
Switching
lTt071CK
Steel TO·3
T()'22O
LTt071CT
SteelT().3
LT1071 HVCK
T()'22O
LTt071HVCT
Stee1T()'3
Pos.Fixed
LTt086CK·5
T()'220
LTt086CT·5
Stee1T()'3
lT1086CK·12
LT1086CT·12
lO·220
0.5 to 1.5 Pos.Adj.
LT317AK lM317K
SteeITO-3
LT317AH LM317H
TO·39
lT317AT LM317T
lO·22O
lT1086CK
SteellO-3
T()'220
lTl086CT
Neg. Adj.
Stee1T()'3
l T337 AK lM337K
T().39
l T337 AH LM337H
T()'22O
lT337AT lM337H
Pos.Adj.
lT317AHVK lM317HVK SteeITO-3
High Voltage lT317AHVH lM317HVH TO·39
Neg. Adj.
lT337AHVK lM337HVK SteelT().3
High Voltage lT337AHVH lM337HVH T()'39
4-4
Vo
VIN NOMINAl REGUlATED
MAX OUTPUT VOLTAGE
M
M
35
1.2 to 33
5
5
12
12
1.2 to 29
1.2 to 29
5
5
5
12
12
1.2 to 33
1.2 to 29
1.2 to 29
35
35
35
35
30
30
20
35
35
35
35
35
30
30
40
40
60
60
20
20
35
35
35
35
35
35
30
30
40
40
20
20
30
30
40
40
60
60
35
···
·
5
5
5
12
12
1.2 to 33
1.2 to 33
1.2 to 29
1.2 to 29
-1.2to -37
Two 5V Outputs
12,5
12,5
··
··
FEATURESICOMMENTS
2% VOUT Tol. Plug In Compatible with 317,350, 33B.
low Dropout (1.2V), 1%Vour Tal.
low Dropout (1.2V), 1%VOUT Tal.
low Dropout (1.2V), 1% VOUT Tal.
low DroQoutj1.2vi; 1%Your Tal.
Low Dropout (1.2V) Pin Compatible with 317, 350, 33B Types
2'10 VOUTTol.
low Dropout (1.2V), 1% VOUTTol.
low Dropout (1.2V), 1'10 Vour Tol.
Low Dropout (1.2V), 1'10 VourTol.
Low Dropout (1.2V), 1%Your Tal.
LT338AHas 1% VREF Tol.
low Dropout (1.2V) Pin Compatible with 317, 350, 33B Types
Low Dropout (1.20 Pin Compatible with 317 350, 33B Types
Self Contained PWM and 5Amp SWitch In a5-Pln Package.
lT323A Has 1% VOUTTol.
low Dropout (1.2V), 1'10 VOUTTol.
Low Dropout (1.2V), 1'10 VOUT Tal.
Low Dropout (1.2V), 1'10 VOUT Tal.
low Dropouti1.2V), 1'10 VOUTTol.
LT350A Has 1'10 VREF Tal.
Low Dropout (1.2V) Pin Compatible with 317, 350 Types
2'10 VREF Tal.
logic Controlled Main Output Voltage, 75mA Auxiliary Output
logic Controlled 12V, 3A Output, 5V, 75mA Auxiliary Output
Self Contained PWM and 2.5 Amp Switch in a5·Pin Package
5
5
12
12
1.2 to 37
Low Dropout (1.2V), 1'10 Vour Tal.
low Dropout (1.2V), 1'10 Vour Tal.
Low Dropout (1.2V), 1'10 Vour Tal.
low Dropout (1.20: 1'10 Vour Tol.
lT317A Has 1'10 VREFTol.
35
35
40
40
40
60
60
1.2 to 34
1.2 to 34
-1.2to -37
low Dropout (1.2V), 1'10 VREF Tol.
Pin Compatible with 317Types
lT337AHasl'1o VREFTol.
1.2 to 57
lT317HV Has 1'10 VREF Tal.
50
50
-1.2to-47
lT337HV Has 1'10 VREF Tal.
35
35
35
40
40
40
REGULATOR SELECTION GUIDE
commERCIAL
POSITIVE
10
OR
OUTPUT
CURRENT NEGATIVE
(AMPS)'
OUTPUT'
1.25 Switching
PART NUMBER
LT1072CK
LT1072CT
LT1072HVCK
LT1072HVCT
LT1072CN8
LT1172CK
LT1172CT
LT1172HVCK
LT1172HVCT
LT1172CN8
1.0
Dual Pas. Fixed LT1005CK
LT1005CT
125mA Positive
LT1020CJ
LT1020CN
LT1020CS
LT112OCJ8
LT112OCN8
LT1120CH
40mAto Switched
LT1026CJ8
l00mA Capacitor
LT1026CN8
LT1026CH
LTC1044CJ8
LTC1044CN8
LTC1044CH
LTC1044CS8
LT1054CJ8
LT1054CN8
LT1054CH
LT1054CSB
PACKAGE
TYPE
SteelT0-3
Plastic T0-22O
Steel T0-3
Plastic T0-220
8Pin DIP
SteelT0-3
Plastic TO·220
SteeIT0-3
Plastic TO·220
Plastic 8Pin DIP
SteeITO-3
TO-220
14 Pin CERDIP
14 Pin Plastic
8Pin Plastic SOL
8PinCERDIP
8Pin Plastic DIP
8Pin TO·5
CERDIP
Plastic DIP
T0-5Can
CERDIP
Plastic DIP
TO·5Can
Plastic SO
CERDIP
Plastic DIP
TO·5Can
Plastic SOL
Va
VIN NOMINAL REGULATED
MAX OUTPUT VOLTAGE
(V)
(V)
FEATURESICOMMENTS
40
Sell Contained 40kHz PWM and 1.25 Amp Switch in a5-Pin Package
*
40
60
*
60
40
40
Self Contained 100kHz PWM and 1.25 Amp Switch in a5·Pin Package
40
60
60
40
20
20
·
···
··
··
Two 5V Outputs
38
38
38
36
38
36
10
10
10
9.5
9.5
9.5
9.5
16
16
16
16
4t03O
4t030
4t03O
4t030
4t030
4t030
....
......
..
Logic Controlled Main Output Voltage
=
Dropout Voltage 0.5V, 40~ 10, Reference and Comparator
=
Dropout Voltage 0.2V, 40A 10, Reference, Comparator, Shutdown, 8 Pin Package
Voltage Converter, 10mA Output
Voltage Converter, 40mA Output, 5kHz Switching Rate
..
tt
tt
tt
tt
Voltage Converter and Regulator, l00mA Output, 25kHz Switching Rate
• The 10 values for the LT1070, LT1071, LT1072, and LT1172 are switch current values. Actual output current, voltage and polarity depends on the type of switching regulator employed .
•• These devices are non· regulating converters.
tt The available output voltage range is dependent upon the mode of operation selected.
SWITCHING REGULATORS I
~
00
0
00
MILITARY
LT1070MK
LT1070HVMK
COMMERCIAL
LT1070CK
LT1070HVCK
FEATURES
Current Mode 40kHz PWM with Self·Protected 5 Amp Switch on
the Same Chip, Capable of Operation in Flyback, Boost, Buck·
Boost, and 'CUK Converters.
LT1071MK
LT1071HVMK
LT1071CK
LT1071 HVCK
Current Mode 40kHz PWM with Self·Protected 2.5 Amp Switch on
the Same Chip, Capable of Operation in Flyback, Boost, Buck·
Boost, and 'CUK Converters.
LT1072MK
LT1072HVMK
LT1072CK
LT1072HVCK
Current Mode 40kHz PWM with Self·Protected 1.25 Amp Switch on
the Same Chip, Capable of Operation in Flyback, Boost, Buck·
Boost, and 'CUK Converters.
LT1172MK
LT1172HVMK
LTII72CK
LT1172HVCK
Current Mode 100kHz PWM with Self·Protected 1.25 Amp Switch
on the Same Chip, Capable of Operation in Boost, Buck·Boost, and
CUK Converters.
Current Mode 40kHz PWM with Self·Protected 5Amp Switch on
the Same Chip, Capable of Operation in Flyback, Boost, Buck·
Boost, and 'CUK Converters.
LT1070CT
LT1070HVCT
c::CY=-
1
0
1
r1F
LT1071CT
LT1071 HVCT
Current Mode 40kHz PWM with Self·Protected 2.5 Amp Switch on
the Same Chip, Capable of Operation in Flyback, Boost, Buck·
Boost, and 'CUK Converters.
LT1072CT
LT1072HVCT
Current Mode 40kHz PWM with Self·Protected 1.25 Amp Switch on
the Same Chip, Capable of Operation in Flyback, Boost, Buck·
Boost, and 'CUK Converters.
LTII72CT
LT1172HVCT
Current Mode 100kHz PWM with Self·Protected 1.25 Amp Switch
on the Same Chip, Capable of Operation in Boost, Buck·Boost, and
CUK Converters.
4-5
REGULATOR SELECTION GUIDE
MILITARY
SWITCHING REGULATORS I
WW
0
SWITCHED CAPACITOR CONVERTER/REGULATORS I
Q
011000
WW
(@
0
POSITIVE FIXED I
=9=
0
0
~
0
00
COMMERCiAl
LT1072
FEATURES
Current Mode 40kHz PWM with Sel'·Protected 1.25 Amp Switch on
the Same Chip, Capable 01 Operation In Boost, Buck·Boost, an~
CUK Converters in an 8-pin minlDIP package.
LT1172CN8
LT1026MH
LT1026CH
Current Mode 100kHz PWM with Sell·Protected 1.25 Amp Switch
on the Same Chip, Capable 01 Operation in Boost, Buck·Boost, and
CUK Converters in an'8-pin miniDIP package.
10mAOutput
LT1044MH
LTC1044CH
40mA Output, 5kHz Switching Rate
LT1054MH
LT1054CH
100mA, 25kHz Switching Rate, Voltage Regulated Output
LT1026MJ
LT1026CJ8
LT1026CN8
10mAOutput
LTC1044MJ
LTC1044CJ8
LTC1044CN8
40mA Output, 5kHz Switching Rate
LTt054MJ
LT1083MK·5
LT1083MK·12
LT1084MK·5
LT1084MK·12
LTt085MK·5
LT1085MK·12
LT1086MK·5
LT1086MK·12
LT1003MK
LT123AK
LM123K
LT1005MK
LT1054CJ8
LT1083CK·5
LT1083CK·12
LT1084CK·5
LT1084CK·t2
LTt085CK·5
LT1085CK·12
LT1088CK·5
LT1086CK·12
LT1003CK
LT323AK
LT323K
LT1005CK
LT1035MK
LT1035CK
100mA Output, 25kHz Switching Rate
5V, 7.5A Low Dropout
12V, 7.5A Low Dropout
5V, 5A Low Dropout
12V, 5A Low Dropout
5V, 3A Low Dropout
12V, 3A Low Dropout
5V, 1.5A Low Dropout
12V, 1.5A Low Dropout
5V±2%,5Amp
5V±t%,3Amp
5V±3%,3Amp
Dual Output Regulator with 5V 1Amp Logic Switchable Output
and Auxiliary 5V
35mAOutput
Dual Output Regulator with 5V 3Amp Logic Switch able Output
and Auxiliary 5
75mAOutput
LT1038MK
LT1038CK
00
LT1005CT
c::CY=- ~
LTt035CT
LT1038CT
CZJL::J
~
4-6
[3
°5
~
LT1083CP-5
LTt083Cp·12
LT1084Cp·5
LT1084CP·12
LT1003CP
LT323AP
LM323P
LT1085CT-5
LT1085CT·12
LT1086CT-5
LT1086CT-12
LT323AT
Dual Output Regulator with 12V 3Amp Logic Switchable Output
and Auxiliary 5V
75mAOutput
Dual Output Regulator with 5V 1Amp Logic Switchable Output
and Auxiliary 5V
35mAOutput
Dual Output Regulator with 5V 3Amp Logic Switchable Output
and Auxiliary 5V
75mAOutput
Dual Output Regulator with 12V 3Amp Logic Switchable Output
and Auxiliary 5V
75mAOutput
5V, 7.5A Low Dropout
12V, 7.5A Low Dropout
5V, 5A Low Dropout
12V, 5A Low Dropout
5V±2%,5Amp
5V±1%,3Amp
5V±3%,3Amp
5V, 3A Low Dropout
12V,3A Low Dropout
5V, 1.5A Low Dropout
12V, 1.5A Low Dropout
5V±1%,3Amp
REGULATOR SELECTION GUIDE
MILITARY
LT1038MK
LT1083MK
LT1084MK
LT138AK
LM138K
LT1085MK
LT150AK
LM150K
LT1086MK
LM117AK
LM117K
LT117AHVK
LM117AHVK
LT117AH
LM117H
LM117AHVH
LM117HVH
POSITIVE ADJUSTABLES I
=¥=
0
L;;l
DOD
0
0
Q ~
COMMERCIAL
LT1038CK
LT1083CK
LT1084CK
LT338AK
LM338K
LT1085CK
LT350AK
LM350K
LT1086CK
LT317AK
LM317K
LT317AHVK
LM317AHVK
LT317AH
LM317H
LT317AHVH
LM317HVH
FEATURES
10Amp
7,5 Amp Low Dropout
5Amp Low Dropout
5Amp 1%Relerence
5Amp
3Amp Low Dropout
3Amp 1%Relerence
3Amp
1.5 Amp Low Dropout
1.5 Amp 1%Reference
1.5 Amp
l.S Amp 1%Reference, Hi Voltage
l.S Amp, Hi Voltage
O,S Amp 1%Reference
0,5 Amp
0,5 Amp 1%Reference, Hi Voltage
0,5 Amp, Hi Voltage
LT1120CH
LT112DCS
Micropower, Ultra Low Dropout Regulator with 2,5V Independent
Reference and Comparator, and Output Shutdown in 8 Pin
Package
LT1083CP
LT1084CP
lT338AP
LM338P
LT350AP
LM350P
LT1020CJ
LT1020CN
7,5 Amp Low Dropout
5Amp Low Dropout
SAmp 1%Reference
SAmp
3Amp 1%Reference
3Amp
Very Low Dropout Voltage, 4O~A Supply Current, 2,5V Independent
Reference, and Voltage Comparator on Same Chip,
lT112OCJ8
LT1120CN8
Micropower, Ultra low Dropout Regulator with 2,SV Independent
Reference and Comparator, and Output Shutdown in 8 Pin
Package
LT1085CT
LT350AT
LM350T
LT1086CT
lT317AT
lM317T
LT337K
LM337K
LT337AHVK
lT337HVK
LT1033CK
LT337AH
LM337H
lT337AHVH
LM337HVH
3Amp Low Dropout
3Amp 1%Reference
3Amp
1.5 Amp Low Dropout
1.5 Amp 1% Reference
1.5 Amp
1.5 Amp 1% Reference
1.5 Amp
1.5 Amp 1% Reference, Hi Voltage
1.5 Amp, Hi Voltage
3Amp 2% Reference
0,5 Amp 1%Reference
O,5Amp
0,5 Amp 1% Reference, Hi Voltage
0,5 Amp, Hi Voltage
LT1033CP
3Amp 2% Reference
LT337AT
LM337T
LT1033CT
1.5 Amp 1%Reference
1.5 Amp
3Amp 2% Reference
OOHD
I
\ i:,
,
,
18 °5
wwwr 0
WW 0
lT1020MJ
cLJ-- ~
NEGATIVE ADJUSTABLES I
\ i..\
==¥=
0
0
Q
DOD
0
I
[3
LT137AK
LM137K
lT137AHVK
lM137HVK
LT1033MK
LT137AH
LM137H
lT137AHVH
LM137HVH
°5
c:=O- ~
4-7
NOTES
4-8
'~LTEClnHNOf.I\LJOG-~~,.--_____
LT_l0_03
5 Volt,S Amp
~,
IT
Voltage Regulator
FEAl'UAES
DESCRIPTiOn
•
•
•
•
•
The LT1003 is a 5 amp version of the popular LM123
5V regulator. In addition to higher output current, it offers improved line regulation and an initial output wltage tolerance of ± 2%. These tightened specifications
ease design and application problems several ways:
safety margin is improved, error budgets on other
parts of the system are expanded, and output wltage
loss due to long supply runs can be better tolerated.
Guaranteed 2% Initial Tolerance of output wltage
5 Amp Output Current
40 Watt Capability
Full Internal Overload Protection
100% Burn-in in Thermal Limit
APPLlCAI'IOnS
•
•
•
•
Local 5V Regulators
On Card Regulation
Lab Supplies
Instrumentation Supplies
The LT1003 incorporates Linear Technology's advanced design, process and test techniques for improved quality and reliability over Similar device
types. Specifically, all devices are burned in by shorting the outputs, thereby forCing the regulator into its
current limit and eventually, thermal limit mode. This . .
ensures that all device protection features are . .
working.
Standard 5 Volt Regulator
Load Regulalion •
50,--,--,--,---,-,
40r--+--+-~--~~
VIH_-+_
~
30r--+--+-~--~~
~
20
~
0
f---+--+-~---=
g 10 r-~--==
;of
~ -10
~ -20
5r=
I----+----=I----+---+---t-----='
-30
f---+--+-~--__+_~
-40
r--+--+-~--~~
-50 '-----'-__....l...---'-_ _--L...----.J
o
4
OUTPUT CURRENT (AMPS)
... The LT1003 has load compensation to cancel the effects of voltage
loss in the output lead. This results in a nominal "zero"load regulation.
The shaded band shows typical production spread.
4-9
LT1003
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmAl'IOn
.
V
Input Voltage. • . . . . . . . . . . . . . . . . . . . . .. 20 Volts
Power Dissipation ............. Internally Limited
Operating Junction Temperature Range
LT1003M .................. -55°C to 150°C
LT1003C ..................... O°C to 125°C
Storage Temperature Range
LT1003M .................. -65°C to 150°C
LT1003C .................. -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
ORDER PART NO.
BOnOMVIEW
0 •
INPUT
1
LT1003CK
OUTPUT
2
LT1003MK
CASE
~ND
o
K PllCKAGE
TO·3 METAL CAN
(STEEL)
PREconDITiOninG
100% Burn-In in Thermal Limit
ELECTRICAL CHARACTERISTICS (See note 1)
LTlOO3C
LTlOO3M
SYMBOL
PARAMETER
CONDITIONS
MIN
m
MAX
MIN
VOUT
Output Voltage
Tj = 25°C, VIN = 7.5V, lOUT = 0
4.9
5.0
5.1
4.9
5.2
15
4.8
5
7.5V .. VIN .. 15V
0 .. IOUT .. 5A,P<30W
~
LIne RegulatIon
TS = 25°C, 7.5V .. VIN .. 15V
( ee Note 1)
~
Load RegulatIon
Tj = 25°C, VIN = 7.5V
o.. lOUT" 5A (See Note 1)
TI = 25°C, 20 msec pulse
7.5V .. VIN .. 15V, 0 .. lOUT" 5A
TI = 25°C, 10Hz .. 1 .. 100kHz
Tj = 25°C,
VIN = 15V
VIN = 7.5V
.:l.VIN
.:l.IOUT
IQ
en
Isc
8JC
Thermal RegulatIon
QuIescent Current
Output Noise Voltage
Short CircuIt
Current LImit
Long Term Stability 01 Output
Voltalle
Thermal ResIstance Junction to
Case
K Package
The. denotes the specifications which apply over the full operating
temperature range.
Nola 1: Load and line regulation are tested with pulsed low duty
cycle techniques where pOise width .. 1msec and duty cycle .. 5%.
Nola 2: Tmin';' -55°C for the LT1DD3MK and DOC for LT1DD3CK.
Tmax = 150°C for LT1DD3MK and 125°C for LT1003CK.
4-10
•
•
4.8
UNITS
5.1
V
5
5.2
15
V
mV
25
0.005
12
100
0.02
20
25
0.005
12
40
100
0.02
20
5
7
8
9
5
7
35
35
1.5
1
1
MAX
TVP
5.0
40
mV
%/W
mA
tJ.Vrms
8
9
A
A
mV
1.5
°C/W
LT1003
TYPICAL PERFORmAnCE CHARACTERISTICS
Minimum Input-Output
Voltage Differential
Output Voltage Temperature Drift
Peak Available Output Current
10
2,6
5,15
~ 2.4
~
~
T
5.05
-
1"
...=>
~ 5.00
...
~ 1,8
=>
0
1.6
~ 4.95
,.,.
0:;
XI
~
2.2
':;
~ 2,0
ii:
, Tj - -55°C
5,10
=>
0
1.4
4,90
r-
~
25°C
~
Tj-150°C
""'II
4,85
1.2
-50 -25
0
Output Impedance
25
50
75 100 125 150
2
==
~
0;
Suggested Heat Sink
Thermal Resistance (LT1DD3M)
LT1003C=
4
10k
100k
75°C f\-TA
TA~ 25°C_
'"
~ "'" r-(
z
1"
1M
FREQUENCY (Hz)
10
15
20
1
~
25
° _\TA-75°C
TAi100lC ~
0.4
30
\
o
40
5
10
~
~
~
~
~
Line Transient Response
Ripple Rejection
:> 5,0
10V
=VIN
_lOUT - 0,5A
~~
2.5
!jjQ
_CouT~1"F
1 Hz
~
POWER DISSIPATION (WATTS)
7,5
~
\
0,1
35
100
FLOW
,\.
0,2
POWER DISSIPATION (WATTS)
Output Noise Voltage
"-
~ 0,6
I\,
~
5
\ ~" ...... K+A~50OC
1\
2
*
\
o
LT1003M= ~
4
;0
E
t'5
21
50°C
\
8
6
0.8
0,2
0,1
1k
"-
)
1
~ 0.4
0,001
100
1\
~
~
«
~
10
10
~ 0.8 TA
~ 0.6
Cl ~ 1O.F
SOLID TANT
/
B 10 12 14 16 18 20
Suggested Heat Sink
Thermal Resistance (LT1DD3C)
8
6
~
6
INPUT VOLTAGE (VOLTS)
10
Cl 1,F
SOLID TANTI ':;::
__
4
TEMPERATURE (OC)
OUTPUT CURRENT (AMPS)
~~
V
ul:'j
~~ -2.5
""1"
g§!
55
~~
./
13
5,0
f\
\
IL ~ 150 ~A
CL~0,1"FT, ~ 25°C -
I
....
V
1,0
0,5
1
100
1k
10k
BANDWIDTH (Hz) 1 POLE ROlLOFF
100k
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
4-11
•
LT1003
TYPICAL PERFORmAnCE CHARACTERISTICS
Load Transient Response
~_ 0.2
!5~
0
~
r,
§~
-0.2
TI-
Cl = 10,.!'
SOLID TANTALUM
~Cl
=
SS'f~
12
I\.
~
!j<:'
5
I!:
is
2)1
0
iJ
Your
GouT - 0
j\.,
5V
'::'
VENABlE
0
0123456
T1ME(,.sec)
4-17
LT 1005M/LT 1005e
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Power Dissipation ............. Internally Limited
Input Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . .. 20V
Enable Voltage (VEN) . . . . . . . . . . . • • . . . . . . .. 20V
Operating Junction Temperature
LT1005M .................. -55°C to 150°C
LT1005C ..................... O°C to 125°C
Storage ................... -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
BOnOMVIEW
LT1005MK
LT1005CK
4 LEAD TO·3
FRONT VIEW
o
Jl("GND(TAB)
LT1005CT
PREconDITiOninG:
Vo
100% Burn-in in thermal limit
VEN_
_AUX
GND
5LEAD TO·220
ELECTRICAL CHARACTERISTICS SYMBOL
Vo
PARAMETER
Output Voltage
low
~
..EL
load Regulation
•
•
Quiescent Current
Thermal Resistance
Junction to Case
Output High
Output low
T0-3
TO·220
7.0
7.5
4.8
5.0
5.2
V
UNITS
V
0.3
0.1
0.3
V
5
25
5
25
mV
2
0.3
2
0.005
••
MAX
5.1
0.1
66
Minimum Input Voltage to Maintain
Regulation
lT1005C
TYP
5.0
5.2
50Hz os; f os; 500Hz
l!.Pd ~ 10W (Note 4)
7AV os; VIN os; 15V
VIN ~ 20V
7.0V os; VIN os; 15V
VIN ~ 20V
(Note S)
10 ~ 0.2A
10 ~ 1.0A
1
0.7
MIN
4.9
5.0
Ripple Rejection
Thermal Regulation
Available load Current
VIN
4-18
7.5V os; VIN os; 15V
OmA os; 10 os; 1A (Note 2)
4.8
0.3
Short Circuit Current
IlJC
7.2V os; VIN os; 20V
10 ~ 0
•
7.4V os; VIN os; 20V
(Note 2)
Isc
10
7AV os; VIN os; 20V
Pd os; 10W
OmA os; 10 os; 1A
lT1005M
TYP
MAX
5.0
5.1
line Regulation
!!.VIN
10
MIN
4.9
CONDITIONS
Tj ~ 25°C
High
!!.Vo
mAin REGULAI'OR (See note 1)
0.02
1
0.7
1.7
1.3
1.S
1.2
2.S
2.0
6.S
7.0
2
1.S
3
6.9
7.5
4
3
4
66
O.OOS
1.7
1.0
1.5
1.2
0.02
2.S
2.0
6.5
7.0
2
1.5
3
3
mVIV
dB
O/O/W
A
A
A
.A
V
V
4
4
4
5
rnA
rnA
°C/W
°C/W
LT 1005M/LT 1005e
ELECTRICAL CHARACTERISTICS (See note 1)
SYMBOL
Vo
PARAMETER
Output Voltage
CONDITIONS
TI ~ 25°C
7.0V.;;; VIN .;;; 20V
OmA .;;; 10 .;;; 35mA
I!.Vo
~
-EL
Load Regulation
7.0V .;;; VIN .;;; 20V
OmA .;;; 10 .;;; 35mA
(Note 2)
•
•
4.8
LTlOO5M
TYP
MAX
5.0
5.1
Mil
4.9
LT1005C
TYP
5.0
MAX
5.1
4.8
5.0
5.2
V
mV
5.0
5.2
5
15
5
15
7.0V .;;; VIN .;;; 20V
(Note 2)
0.2
1
0.2
1
Ripple Rejection
Short Circuit Current
Minimum Input Voltage to Maintain
Regulation
50Hz .;;; f .;;; 500Hz
7.0V .;;; VIM .;;; 20V
(Note 5)
10 ~ lmA
10 ~ 35mA
74
90
150
74
90
150
ELECTRICAL CHARACTERISTICS SYMBOL
VEN
Mil
4.9
line Regulation
I!.VIN
Isc
VIN
AUXILIARY REGULATOR
PARAMETER
Enable Threshold Voltage
Enable Pin Current
••
VEN';;; 1V
(See Note 3)
VEN .. 2.4V
The. denotes the specifications which apply over the full operating
temperature range.
NaIll: Unless otherwise indicated, these specifications apply for
VIN = 10V,lo = OmA, and TJ = 25°C.
Noll 2: Line and load regulation are measured using a low duty cycle
pulse, causing little change in the junction lemperature. Effects due
to thermal gradients and device heating must be taken into account
separately.
6.1
6.5
6.5
6.9
mVIV
dB
rnA
6.1
6.5
V
V
lOGIC COnTROL (See note 1)
CONDITIONS
7.0V '" VIN '" 20V
Tj = 25°C
6.5
6.9
UNITS
V
Mil
•
1.45
1.3
0
LT1oo5M
TYP
MAX
1.6
1.6
0
1.75
1.85
150
1
MIN
1.45
1.3
0
LT100se
TYP
1.6
1.6
0
MAX
UNITS
1.75
1.85
150
V
V
~A
1
!tA
Noll 3: When the enable pin is at a low logic level, current flows out
of the enable pin.
Noll 4: Pulse length for this measurement is 20msec.
Nat15: Input Voltage is reduced until output drops by 100mV from Its
initial value.
4-19
LT 1005MjLT 1005e
TYPICAL PERFORmAnCE CHARACTERISTICS
Minimum Input-Output Differential
of Main Output
\--\---+--+-+---1
~ 2.4
2.5
2.0 .-----;---,--,---,.....,---,
2.8 . - - - - - , - - , - - , - - - , - - - ,
~
§!
Maximum Available
Load Current-Main Output
Minimum Input-Output
Differential 01 Auxiliary Output
~ 1.8
2.0
~
~
2.0
§2
1.6
11.6
~
5
1.4 1----1r7"'---t~-+--+-----I
F---+::..,....'f--::;;oio''''''
.2
.8
.6
.4
r-... .......
~
;:; 1.2
-50 -25
25°C
"-
I\.
""
-20
"'-
~
;:;
~
~ -50
-20
V
12
14
16
18
Output Impedance
Ripple Rejection
~ 5.05
1.0
I
~
~
........
S
.......
4.95
0
25
50
75
TEMPERATURE (OC)
4-20
100 125 150
T-l
roo.
:s
50
~40
~~
30
20
-50 -25
10UTVIN-10V
lOUT ~ 200mA
60
,
I
TIME (,.sec)
I~IN - 1O~i~~1
",
oVIN - 1V
-
12
70
5.00
..II
TIME (,.sec)
Output Voltage as Function
of Temperature
§!
I\. COUT - 1.F
V
lW
INPUT VOLTAGE (V)
~
100 125 150
V
20dmA
olD - 50mA
10
75
~UT-lO,F
-
-
COUT - 1,F
<>
8
50
Line Transient Response
of Main Output
COUT ~ 1O,F
:>
.........
25
+20
r--
.§. +50
0
JUNCTION TEMPERATURE (OC)
Load Transient Response
of Main Output
+lW
I~
0.5
OUTPUT CURRENT (mA)
2.0
-
1.0
F--:7SlF----+--+--+--j
1.0 L - - - . J I . . . - - - l . _ - - ' - _ - L _ - - '
10
lW
30
40
50
1.0
Short Circuit Output Current
6
-'-'r-..."""
VIN-lWV
OUTPUT CURRENT (A)
o
7.SV':;' VIN':;' 15V
~
\-:71""-----+--+-+---1
1.2
-
I:~J-
10
100
lk
10k
FREQUENCY (Hz)
lOOk
~
0.1
i
GoUT - 1O,F
I
O! 0.01
0.001
100
lk
10k
FREQUENCY (Hz)
lOOk
1M
LTl 005M/LTl 005e
TYPICAL PERFORmAnCE CHARAOERlsncs
Enable Pin Characteristics
Tj-
i
SV
1.S
~ ........
2do
LOADI!
.......
II
z -0.50
~
~
ks·c
I~
-0.25
"- ~
J
-0.75
~/
-1.0
Switching Characteristics
Enable Threshold
1.7
~nLOAD
......
~
1.4
J
~
VOUT
COUT - 0
5V
VENABLE
OV
1.3 1.4
1.5
1.S
1.7
1.B
1.3
-50 -25
1.9 20Y
0
25
50
75 100 125 150
Output Characteristics
in Low State
3.0
!z
~
G
l!!
2.5
1---+--+--+-----1----1
1---+--+--+-----1----1
I---+--+--+-----I~---T'
/'-:1
1.5
1---+--+--+---7I'----;f-l
Tj - 150°';r
60
I
1.0
f---t--I---t:7"'----j::;----1
......-
0.5
,/
r--MAIN
OUTPUY
Tj-25°CA..!
-+'/1-
I-~==$=='ff.:==i:;::;'~
;
T)~ -50°C
0.2
0.4
0.6
OUTPUT VOLTAGE (V)
O.B
1.0
20
10
~~
100
300
•
/
VIN- 10V
COUT - 1,.F
Tj- 25°C
70
/
2.0
CJ5
TIME (,sec)
Output Noise
4.0 .----,-----.--.,------,--.,
7V ~ VIN ~ 15V
3.5 1---+--+--+-----1----1
!
0123456
TEMPERATURE (OC)
VOLTAGE (VOlTS)
,/
/ /~UXILIAAY
/'
lk
OUTPUT
3k
10k
30k
BANDWIDTH (1 POLE)
4-21
LTl 005M/LTl 005e
APPUCATlOns InFORmfll'lOn
ae.er.llnfor••tlo.
The LT1005 is a dual output 5V regulator. The main
output is capable of delivering up to 1amp of load current and can be shut down with a logic signal. The
auxiliary output supplies a minimum of 35mA and is
unaffected by the logic signal. The outputs are
trimmed to ± 2% initial tolerance and exhibit excellent
line and load regulation.
cations. The enable pin can be used as a '10w battery" detector or to shut down major portions of
system power, allowing memory portions to continue
to operate from the auxiliary output. At low output currents, the auxiliary output will regulate with input wltage typically as low as 6.W, giving maximum battery
life.
The logic control feature makes the LT1005Ideal for
many system applications where It is desirable to
power up a portion of the system for a period of time
and then power the system down during a standby operation. As an example, the LT1005 could be used to
activate various memory space locations only as
needed, thus saving substantial power dissipation
and other cooling costs. The LT1005 could also be
used to power micro-computers, such as the 8048 series. The auxiliary supply can be used for RAM keepalive during power down operation. Additional power
savings can be accomplished by using the LT1005 to
power PROM, EPROM, and E2PROM devices. During
program load, or look-up table operations the ROM
type device can be activated and its' contents placed
in RAM, and then the ROM power can be removed. Or
for high speed but low power data acquisition systems, the power could be applied to fast memory, then
the data transferred to CMOS memory. The main regulator can then be shutdown and the CMOS memory
can be powered by the auxiliary for lower power dissipation. Other applications, such as multiple power
supply sequencing, elimination of expensive AC and
DC power switches, delayed start applications,
switching 5V DC loads, and many others are noweasily accomplished.
Good design practice with all regulators is to bypass
the input and output terminalS. A 1pF solid tantalum at
the Input and at both outputs is suggested. For the applications which follow, the bypass capaCitors are still
recommended, but are not shown on the diagram for
simpliCity. It is also recommended that for maximum
noise immunity, the wltage enable pin be tied high if it
is unused. It can be tied directly to V1N as shown in
Figure 1, or to the, auxiliary output. If the enable pin is
left open, it will float to a high logic level of approximately 1.6V and the main output regulator will be at
5V.
Timing functions can also be performed directly at the
enable pin, such as delayed power-up or power-down.
Because a logic low on the enable pin shuts down the
main regulator, feedback from output to enable can be
used to generate hysterisis or latching functions.
The low quiescent current drain of the LT1005 makes
it useful in battery powered or battery back-up appli-
4-22
Figural.
VIN _ _-
---.,,... +5V
-...-+-+5V
The enable pin is fully protected against input wltages up to 20 wits, even if the power input wltage is
zero.
The basic shutdown control circuit uses a direct gate
drive or an open collector driver and a pull-up reSistor
which is tied to VAUX as shown in Figure 2.
Figure 2.
7.5-2OV
- - - - - . - - +5V
LT 1005M/LT 1005e
Driving Ibe Enable Pin
The enable pin equivalent schematic is shown in Fig. 3.
Basically, enable pin current is zero above the threshold,
and between 2and 70pA below the threshold, flowing out
of the pin. Standard logic, such as TTL & CMOS will interface directly to the enable pin, even if the logic output
swing is higher than the input voltage (VIN) to the
regulator. 15V CMOS can be used to drive the enable pin
even if the regulator is not powered up, without loading
the CMOS output.
15V. If VIN is 20V, the output during shutdown will beapproximately O.2V due to an internal current path in the
regulator (see Figure 4).
Figure 4.
Output Characteristics
in Low State
4.0
7V ..;; VIN ..;; 15V
3.5
3.0
Figure 3.
tk
2-70pA
+1V~ENABLE
::<
.Eo 2.5
ffi
IE
/
2.0
::>
Tj- 1W
u
~ 1.5
Tj~25°CL
1.0
.,,-- t - f
0.5
Main Oulpul Current/Vollage Cbanclerlsllcs
Following a high to low transition at the enable pin, the
main regulator output will begin to drop after a delay of
approximately 1#tsec. With no capacitive load, the
output will fall to zero in approximately 0.5#tsec (RL =
5-1000). With a capacitive load, fall time is limited by
the RC product of the load and the output capacitance.
For light loads (RL > 1000), the discharge time is
controlled by an internal equivalent load of 2000 for
output voltages down to 1volt. Below 1volt, the output
decays linearly, with a slope equivalent to the load capaCitance and a pull down current of approximately
0.5mA. The DC output voltage in the shutdown mode
is approximately 0.1 volt for input voltages (VIN) up to
~
./
---
Tj- 10°c
/'
0.2
Timing functions, such as delayed power-up or powerdown can be implemented by driving the enable pin
with an RC network. The current flowing out of the enable pin should not be used as the timing current in
delayed power up applications, as it is temperature
sensitive and varies somewhat from device to device.
Instead, a resistor tied to the auxiliary output, the input, or to a logic signal should be used. The timing resistor chosen should provide at least 500JtA of current
to "swamp-out" the effects of the internal current.
V~
0.4
0.6
0.8
1.0
OUTPUT VOLTAGE M
The user should note that the output in the low state
can only sink about O.5mA. If current is forced into the
output, the output voltage will rise to O.SVat 1mA and
above 1V at 10mA. With no output capacitor, the rise
time of the main output is about 1.5#ts. With an output
capacitor, rise time is limited by the short circuit current of the LT1005 and the load capacitance;
tr ~ (C) (5V)/(1.5A). A 1#tF output capacitor slows the
output rise time to approXimately 3#ts and a 10#tF output capaCitor slows the output rise time to 30#ts.
Oulpul Currenl
The main output current limits at about 1.7A for input
voltages below 19V.lnternal fold back, or "power limiting" circuitry detects the input-output voltage differential and reduces current limit for input to output
voltages exceeding 14V. With 20V input, for instance,
short circuit current is reduced to ~ 1.1A.
An additional feature of the LT1005 is that the auxiliary supply does not incorporate nor is it affected by
thermal shutdown. Any fault condition of the main
regulator will not affect the auxiliary output voltage.
The following applications circuits will serve to indicate the versatility of the LT1005.
4-23
LTl 005M/LTl 005e
TYPICAL APPUCRIlOns
First-On, Last-Oft Sequencing
First-On, First-Off Sequencing
+5V
VIN
+5V
+5V
+5V
A8
AS
68k
68k
T", (1) - 50ms
T.. (1) - lOOms
T.. (2) - 200ms
TO' (2) = 150ms
Power Supply Turn-On Sequencing
Fast Turn-Oft, Delayed Turn-On
+5V
• CAN BE Nfl GATE TYPE
Thermal Cutoff at High Ambient Temperatura
--t--+5V
Latch-Oft for VOUT ,.;; 4.7V
- - - -......---<"...-+5V
25mA
MlNIAW
LOAD
Sl.lk
ToIf·S8"C
Ton ' 42"C
Rt·
• YELLOW SPRINGS #44008. 30k II@ 2S"C
~-----~---~~
A3
4.71<
4-24
LT 1005M/LT 1005e
TYPICAL APPLICATions
Proportional Motor Speed Controller
High Input Voltage Detection
TRANSfOAlAER AN)
RECTfERSET
VIN = !W DC NOIAINAL
+5V
+5V
Rl
7.51<
W4148
R3
4.7k
OUTPUT SHUTS OFF _
IIOV N:. TRANSfORMER
IS OVER VOLTAGED TO 220 VN:..
Opto-Coupled Output Control
Push-On, Push-Off
+5V
Cz
+5V
+5V
+5V
10,#
lOOk
2k
10k
3k
,
,
~
,
,
F Cz 15 LARGER THAN 10,#, Cl sHOI1D BE
INCREASEO TO C2Il0
'-H'
,
-
1,#
COlJ>LER "ON" - OUTPUT "ON"
10k
-'
SElECT R DEPENDING UPON THE
ON-RESISTANCE Of TIE OPTO COlPLER
Latch-Off When Output Short
VIN
- -__-+5V
Delayed Power Up
VIN
4.7k
L...--f--+5V
4-25
. .
. .
LT1005M/LT1005C
TYPICAl. APPI.ICfII'lOnS
Fast Electronic Circuit Breaker
Battery Voltage Sensing Circuit
_ _ _-+-_ VOUT
v,,_. . . . . .
~_--
r----+---
MAIN
f----+--- +5V
10k
1k
R3
2k
+
+
Memory Save·on·Power-Down
VtI,.7.5V
-+---
_ _ _ _ _ _ _-
+5V
4.7k MAINOUT
+-"'Nv-+--'lNH~-+--- +5V
AUX OUT
5.1k
2.2k
The auxiliary output powers the memory, while the main
output powers the system and is connected to the memory
store pin. When power goes down, the main output goes
low, commanding the memory to store. The auxiliary output
then drops out.
4-26
+5V
LT 1OOSM/LT loose
TYPICAL APPlICAI'IOnS
Line Dropout Detector
+sv
TRPSET
TO SECOI()ARY
OfAC
POWER
TRANSFORMER
+
10 Amp Regulator with Current and Thermal Protection
1.2k
r
2011
10k
10k
lk
lOA
1000.'
l00·C
N.O. THERMOSWITCH
ON HEATSINK
+
4-27
LTl 005M/LTl 005e
SCHEmATIC DIAGRAm
PACKAGE DESCRIPnon
TO-220 PACKAGE (5 LEAD)
4-Pin Metal Package Similar to JEDEC TO-3
...,
~
.11113.841
~:.l~1
.030-.040
~
=113.341
AldirnInIIict18 in 1nChe..... and mllliInBtBrS(plrenhlaesl
{.t.W(
eJC
\
LTlOO5M
150"C
4"CIW
\ LT1005C \ 125"C \ 5"C/W \
LT1005C
125"C
4°C/W
\
4-28
\ T.t.IAX \ 6JC
~~~~~~~-------M--ic-ro-p-o-w-e-r-R-e-~-~-:-!-~
and Comparator
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
•
•
The LT1020 is a combination micropower positive regulator and free collector comparator on a single monolithic
chip. With only 40pA supply current, the LT1020 can supply
over 12SmA of output current. Input voltage range is from
4.SV to 36V and dropout voltage is O.6V at 12SmA. Dropout
voltage decreases with lower load currents. Also included
on the chip is a class B output 2.5V reference that can either source or sink current. Adropout detector provides an
output current to indicate when the regulator is about to
drop out of regulation.
40pA Supply Current
12SmA Output Current
2.SV Reference Voltage
Reference Output Sources 1rnA and Sinks O.SmA
Dual Output Comparator
Comparator Sinks 10mA
Dropout Detector
O.2V Dropout Voltage
Thermal Limiting
Available in SO Package
APPLICATions
•
•
•
•
Battery Systems
Battery Backup System
Portable Terminals
Portable Instruments
The dual output comparator can be used as a comparator
for system or battery monitoring. For example, the comparator can be used to warn of low system voltage while . .
the dropout detector shuts down the system to prevent . .
abnormal operation. Frequency compensation of the comparator for amplifier applications can be obtained by adding external output capacitance. Dual output or positive
and negative regulators can also be made.
The 2.5V reference will source or sink current. This allows
it to be used as asupply splitter or auxiliary output.
Dropout Voltage and Supply Current
5V Regulator
tOO
10
V'N>5.2V
la=40pA
P'
I
/
0.01
0.1
1
10
100
0.1
1000
OUTPUT CURRENT (mAl
4-29
LT1020
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Input Voltage ...................................... 36V
NPN Collector Voltage .............................. 36V
PNP Collector Voltage ..................... Supply - 36V
Output Short Circuit Duration .................. Indefinite
Power Dissipation .................... Internally Limited
Operating Temperature Range
LT1020C ................................ O°C to 100°C
LT1020M ............................ - 55°C to 125°C
Storage Temperature Range
LT1020C,M .......................... - 65°C to 150°C
ELECTRICAL CHARACTERISTICS
PARAMETER
I CONDITIONS
Reference
Reference Voltage
Line Regulation
Load Regulation
Output Source Current
Output Sink Current
Temperature Stability
Regulator
Supply Current
Output Current
Load Regulation
Line Regulation
Dropout Voltage
Feedback Sense Voltage
Dropout Detector Current
Feedback Bias Current
Minimum Load Current
Short Circuit Current
Comparator
Offset Voltage
Bias Current
Offset Current
Galn·NPN Pull down
Common Mode Rejection
4-30
4.5V s VIN s 36V
4.5VsVINS36V
-0.5mAsIREFslmA, VIN= 12V
VIN =5V
VIN=5V
VIN=6V, IOUTS100~
VIN=36V, IOUTS100~
VIN = 12V, lOUT = 125mA
(YIN - VouT)~1V, VIN~6V
ORDER PART
NUMBER
J14 PACKAGE HERMETIC DIP
N14 PACKAGE PLASTIC DIP
Tj = 25°C
MIN
TYP
MAX
UNITS
2.46
2.50
0.01
0.2
4
2
1
2.54
0.015
0.3
%N
45
75
11
80
120
20
0.5
0.D15
0.05
0.65
2.56
3
0.2
0.01
0.02
0.4
2.5
20
15
1
250
30
7
40
15
2000
80
3
15
4
10000
94
1
0.5
6VsV IN s36V
IOUT=l00~
AVOUT= -0.05V
VIN=36V
VIN=36V
Pin 9 and Pin 10 shorted, VIN = 4.5V
OVsVcMs35V, VIN=36V
OVsVcM s35V, VIN = 36V
OVsVCMs35V, VIN =36V
AVOUT =29V, RL =20k
OVsVcMs35V, VIN=36V
2.44
3
V
%
mA
mA
%
125
(VIN-VOUT)~1V, VIN~6V
lOUT = 125mA
VIN =12V
LT1020MJ
LT1020CJ
LT1020CN
(ALSO AVAILABLE
IN SO PACKAGE)
~
~A
mA
mA
%
%N
V
V
V
~
40
5
360
nA
~A
mA
mA
mV
nA
nA
VN
dB
LT1020
ELECTRICAL CHARACTERISTICS
PARAMETER
Comparator
Power Supply Rejection
Output Sink Current
I
CONDITIONS
MIN
TYP
4.5V~Vs~3SV
80
10
96
18
0.4
200
VIN =4.5V
IOUT= lmA
NPN Saturation Voltage
Output Source Current
SO
0
Input Voltage Range
Response Time
MAX
UNITS
dB
mA
O.S
V
~A
VIN -l
5
V
~s
2
Leakage Current (NPN)
~A
ELECTRICAL CHARACTERISTICS
PARAMETER
Reference
Reference Voltage
Line Regulation
Load Regulation
Output Source Current
Output Sink Current
Regulator
Supply Current
Output Current
I
CONDITIONS
4.5V ~ VIN ~ 3SV
4.5V ~ VIN ~ 36V
-0.5mA~IREF~lmA, VIN = 12V
VIN=5V
VIN =5V
VIN=SV, IOUT~100~
VIN =3SV, IOUT~1oo~
VIN = 12V, IOUT= 125mA
(VIN - VOUT)"W, VIN"SV
Load Regulation
Line Regulation
(VIN - Vourl"W, VIN"SV
Dropout Voltage
lOUT = loo~
lOUT = 125mA
VIN =12V
Feedback Sense Voltage
Dropout Detector Current
Feedback Bias Current
Minimum Load Current
Short Circuit Current
Comparator
Offset Voltage
Bias Current
Offset Current
Gain-NPN Pulldown
Common Mode Rejection
Power Supply Rejection
Output Sink Current
Output Source Current
Input Voltage Range
Leakage Current (NPN)
6V~VIN~36V
dVOUT= -O.05V
VIN=3SV
VIN =36V
Pin 9 and Pin 10 shorted, VIN =4.5V
OV ~ = VCM ~35V, VIN = 3SV
OV~VcM~35V, VIN =36V (Note 1)
OV ~VcM~35V, VIN = 36V
dVOUT= 29V, RL =20k
OV ~VCM ~35V, VIN = 3SV
4.5V~Vs~36V
VIN = 4.5V (Note 2)
VIN=3SV
The • denotes the specifications which apply over full operating temperature range.
MIN
•
•
•
•
•
••
•
•
•
•
•
•
•
•
•
•
••
•
•
•
•
•
•
•
•
•
•
2.40
TYP
MAX
UNITS
2.50
2.55
0.01
0.3
0.02
0.4
V
%N
%
1
mA
0.5
mA
S5
85
11
95
120
20
125
2.5
0.06
0.85
2.57
50
240
30
15
50
360
~A
mA
mA
10
mV
nA
nA
VN
dB
1000
40
0
nA
60
20
80
80
5
%
%N
V
V
V
~A
3
2.5
mA
mA
1
0.02
2.38
~A
~A
dB
10
120
mA
~
VIN-l
8
V
~
Note 1: ForOV~VCM~O.W andT>85°C I bias max is 100nA.
Note 2: For TA~ - 40°C output sink current min is 2.5mA.
4-31
•
LT1020
Pin FunCTions
Pins 1, 12, 14-No internal connection.
Pin 2-Regulator Output. Main output, requires lOJtF output capacitor. Can be shorted to VIN or ground without
damaging device.
Pin 3-lnput Supply. Bypass with 10JtF cap. Must always
be more positive than ground.
Pin 4-Reference. 2.5V can source or sink current. May be
shorted to ground or up to 5V. Voltages in excess of 5V
can damage the device.
Pin 5-Comparator PNP Output. Pull up current source for
the comparator. May be connected to any voltage from VIN
to 36V more negative than VIN (operates below ground).
Short circuit protected. For example, if VIN is 6V then pin 5
will operate to - 30V.
Pin 6-Comparator NPN Output. May be connected to any
voltage Irom ground to 36V more positive than ground
(operates above VIN). Short circuit protected.
Pins 7, 8-Comparator Inputs. Operates from ground to
VIN -1V. Comparator inputs will withstand 36V even with
VIN oIOV.
Pin 9-Ground.
Pin 10-Current Limit. Connecting this pin to ground decreases the regulator current limit to 3mA min. Leave open
when not used.
Pin 11-Feedback. This is the feedback point of the regulator. When operating, it is nominally at 2.5V. Optimum
source resistance is 200k to 500k. The feedback pin should
not be driven below ground or more positive than 5V.
Pin 13-Dropout Detector. This pin acts like acurrent
source Irom VIN which turns on when the output transistor
goes into saturation. The magnitude of the current
depends on the magnitude of the output current and the
input-output voltage diflerential,Pin current ranges from
5JtA to about 300JtA.
TYPICAL PERFORmAnCE CHARACTERISTICS
Regulator Load Regulation
0.3
_
.:.
PRE-LbAD = 1OO~
0.2
~
~
g
350
IIITJ~
~~~!~I
'I I 1
I~J=12J)C
w
Regulator Short Circuit Current
Supply Current
0.1
300
!
....
10
!
1
...'-'
~
ffi
~
0
13
~-O.1
[j150
a:
U
:::>
~ -0.2
I;: 100
o
en 0.1
ill
50
o
-0.3
0.1
4-32
1
10
100
OUTPUT CURRENT (rnA)
1000
i--
g;j 200
~
TJ=125'C
250
1
10
100
REGULATOR OUTPUT CURRENT (mA)
1000
-
-50
-
CURRENT LIMIT TIED TO GROUND
-10
30
70
TEMPERATURE ('C)
110
f-150
LT1020
TYPICAL PERFORmAnCE CHARACTERISTICS
Dropout Voltage
Dropout Voltage
a.VOUT-l00mV
~
;;'
~
;;'
II
;:::
~
~
=>
~
ii'
-
>-=>
~ 0.1
=>
-
~
ii'
;;::
;;::
~
-
I OROPOUT DETECTOR = 1% lOUT
~
ffi
0.01
0:
0.1
110
100
REGULATOR OUTPUT CURRENT (rnA)
1000
0.01 L...JL...U.J..IJt"--LLJLJ.lll"--J....L..LWJJl......I....1.!..Wl!J
0.1
1
10
100
1000
REGULATOR OUTPUT CURRENT (rnA)
Dropout Detector Current
0.01
0.1
Dropout Detector Current
100
~
-
o
1/
~
1
10
REGULATOR OUTPUT CURRENT (rnA)
\
a:
a:
=>
<>
a:
lOUT 25mA \
~
~
a:
I
/
~
<>
0
~
~
\
:;2 0.1
0
a:
0
L
10
J
\
11
o
1000
.......
iii
:e
z
0
60
I O~T 1111~~1~
nl 50
JIIIIIII
Ul
0:
UJ
&
<2
45
VIN=10VDC,
lVp-p
35
VOUT=5V
10
j
1
70
80
90
100 110 120 130 140
TEMPERATURE (OC)
150
Supply Current at Dropout
10
TJ
55°C TO 125°C
100mA
--=--=--
lOUT
100mA
V
~OUT lOrnA
c-IOUT lOrnA
LJ
1\
II
100
lk
10k
RIPPLE FREQUENCY (Hz)
~ i;;20UT
=loUT lmA
lmA
VOUT=5V
TJ=-55°CTO 125°C
COUT,:,,~?"F
30
\
/
0.1
0.2
0.3
0.4
05
0.6
REGULATOR INPUT-OUTPUT DIFFERENTIAL (V)
=i OUT
r\
.,Illjlll.~ IOUT=lm~\
40
,.'"z
lOUT lmA-\ -
IOUT=100mA
1\
55
;:::
IOUT-5mA~ ~
,
x
10
I I IIIIIIII
E
65 10;;;
9
;;j
10
Supply Current
Regulator Ripple Rejection
70 r-
\-t
1
100
REGULATOR OUTPUT CURRENT (rnA)
\
1\
\ \
>-=>
0.01
•
Regulator Minimum load Current
_~OUT 100mA-
500mV
10
UJ
VDlF
100
100
1000
VDlFF
z>--
I DROPOUT DETECTOR';"O.l% lOUT
0:
=>
1:l
~
tt
is
/
0.1
5~
;:::
z
is
>--
ORO POUT DETECTOR
Dropout Voltage
0.Q1
0.01
lOOk
1
5
10
15
20
25
. REGULATOR INPUT-OUTPUT DIFFERENTIAL (V)
o
0.1
0.2
0.3
0.4
0.5
0.6
REGULATOR INPUT-OUTPUT DIFFERENTIAL (V)
4-33
LT1020
TYPICAL PERFORmAnCE CHARACTERISTICS
Comparator Input Bias Current
Reference Regulation
,
100
[
~
w
2
<.>
1
~
0
~
§!
w
<.>
"
90
"-
-1
il5
~ -2
a:
<'
.s
'"
~
a:
~
------
~
-1.0 -0.5
0
0.5
1.0
REFERENCE OUTPUT CURRENT (rnA)
1.5
40
\
30
l\
T]=2JOC
,
:l!
w
~
!:J
0
g
r-...
I-
~ -0.1
,...
V
l"'- t-.
-
VOUT=5V
• 5.0
00 00
l00l~l~looloo
TIME (ms)
,
"'J7
4.5
~ 4.0
2.5
2.0
~
1000
Jo LOA
~
o
~
1
10
100
REGULATOR OUTPUT CURRENT (rnA)
LTl 020 Turn·On Characteristic
!;5 3.0
o
r11111111
0.1
A
;:!:
~ 3.5
5o
TJ =25°C
TJ=125°C
o
-0.6 -0.2 GND 0.2
0.6
COMMON-MODE VOLTAGE (V)
REFERRED TO PIN 9 (GND)
5.5
VIN=15V
Vour=5V
-
--
0.1
is
....
f- rf-
Regulator Thermal Regulation
~
TJLIJ~~j~
60
10
. 0
-1
-4
111111111
35
_ TJ= -55°C
20
-3
-1.5
70
I-
;;;
I
Tj=12~oC
I
80
13 50
...........
Feedback Pin Current
40
o
J.
If
Rl =50011
I---
If!
Rli5011
012345678
INPUT VOLTAGE (V)
APPLICATion HinTS
The LT1020 is especially suited for micropower system applications. For example, the comparator section of the
LT1020 may be used as a battery checker to provide an indication of low battery. The dropout detector can shutdown the system when the battery voltage becomes too
low to regulate. Another type of system application for the
LT1020 would be to generate the equivalent of split supplies off of asingle power input. The regulator section pro·
vides regulated output voltage and the reference, which
can both source and sink current is then an artificial system ground providing asplit supply for the system.
For many applications the comparator can be frequency
compensated to operate as an amplifier. Compensation
4-34
values for various gains are given in the datasheet. The
comparator gain is purposely low to make it easier to frequency compensate as an amplifier. Two outputs are
available on the comparator, the NPN output is capable of
sinking 10mA and can drive loads connected to voltages in
excess of the positive power supply. This is useful for driving switches or linear regulators off of a higher input voltage. The PNP output, which is capable of sourcing 100l'A
can drive loads below ground. It can be used to make
negative regulators with the addition of an external pass
transistor. Both outputs can be tied together to provide an
output that swings from rail-to-rail for comparator or amplifier applications. Although it is not specified, the gain
for the PNP output is about 500·1000.
LT1020
APPLICATion HinTS
If the PNP output is being used, to maximize the gain, a
1-5/LA load should be placed upon the NPN output collector. This is easily done by connecting a resistor between
the NPN collector and the reference output. (Providing this
operating current to the NPN side increases the internal
emitter base voltages and maximizes the gain of the PNP
stage.) Without this loading on the NPN collector, at temperatures in excess of 75°C, the gain of the PNP collector
can decrease by a factor of 2or 3.
Overload Protection
Reference
If the device is overloaded for long periods of time, thermal shutdown turns the output off. In thermal shutdown,
there may be some oscillations which can disturb external
circuitry. A diode connected between the reference and
feedback terminal provides hysteresis under thermal shutdown, so that the device turns on and off with about a 5
second period and there are no higher frequency oscillations. This is shown in Figure 2. This diode is recommended for most applications. Thermal shutdown temperature is set at approximately 145°.
Internal to the LT1020 is a 2.5V trimmed class B output
reference. The reference was designed to be able to
source or sink current so it could be used in supply splitting applications as well as a general purpose reference
for external circuitry. The design of the reference allows it
to source typically 4 or 5mA and sink 2mA. The available
source and sink current decreases as temperature increases. It is sometimes desirable to decrease the AC output impedance by placing an output capacitor on them.
The reference in the LT1020 becomes unstable with large
capacitive loads placed directly on it. When using an output capacitor, about 20{} should be used to isolate the
capacitor from the reference pin. This 20{} resistor can be
placed directly in series with the capacitor or alternatively
the reference line can have 20{} placed in series with it and
then a capacitor to ground. This is shown in Figure 1.
Other than placing large capacitive loads on the
reference, no other precautions are necessary and the
reference is stable with nominal stray capacitances.
The main regulator in the LT1020 is current limited at approximately 250mA. The current limit is stable with both
input voltage and temperature. A current limit pin, when
strapped to ground, decreases the output current. This allows the output current to be set to a lower value than
250mA. The output current available with the current limit
pin strapped to ground is not well controlled so if precise
current limiting is desired it should be provided externally
as is shown in some of the application circuits.
Like most other IC regulators, a minimum load is required
on the output of the LT1020 to maintain regulation. For
most standard regulators this is normally specified at
5mA. Of course, for a micropower regulator this would be
a tremendously large current. The output current must be
large enough to absorb all the leakage current of the pass
transistor at the maximum operating temperature. It also
affects the transient response; low output currents have
long recovery times from load transients. At high operating temperatures the minimum load current increases and
OUTPUTr2--.--~-t4 EF
-JEF
4
OUTPUT
}
+200
'J'
10~F
LTlO2O
20
OR
r
+
OUTPUT
REF
FB 11
1O.F
'OIODE ADDS FEEDBACK
Figure 1. Bypassing Reference
Figure 2. Minimizing Oscillation In Thermal Shutdown
4-35
LT1020
APPLICATion HinTS
having too low of a load current may cause the output to
go unregulated. Devices are tested for minimum load current at high temperature. The output voltage setting resistors to the feedback terminal can usually be used to provide the minimum load current.
Frequency Compensation
The LT1020 is frequency compensated by adominant pole
on the output. An output capacitor of 10/LF is usually large
enough to provide good stability. Increasing the output
capaCitor above 10/LF further improves stability. In order to
insure stability, a feedback capacitor is needed between
the output pin and the feedback pin. This is because stray
capaCitance can form another pole with the large value of
feedback resistors used with the LT1020. Also, a feedback
capacitor minimizes noise pickup and improves ripple
rejection.
With the large dynamic operating range of the output current, 10000:1, frequency response changes widely. Low AC
impedance capacitors are needed to insure stability.
While solid tantalum are best, aluminum electrolytics can
be used but larger capaCitor values may be needed.
The CURRENT LIMIT pin allows one of the internal nodes
to be rolled off with a0.05/LF capacitor to ground. With this
capaCitor, lower values of regulator output capacitance
can be used (down to 1/LF) for low «20mA) output
currents. Values of capaCitance greater than 0.05/LF
degrade the transient response, so are not recommended.
If the CURRENT LIMIT pin is connected to GND, the current limit is decreased and only a 1/LF output capaCitor is
needed.
When bypassing the reference, a20{J resistor must be connected in series with the capaCitor.
TYPICAL APPLICATiOnS
Regulator With Output Voltage Monitor
100k
1M
LOGIC OUTPUT GOES LOW WHEN
VOUT DROPS BY 100mV
Driving Logic With Dropout Detector
4-36
LT1020
TYPICAL APPLICATions
Compensating the Comparator as an Op Amp
1Amp Low Dropout Regulator
2.2k
AT Av=100,
SLEW RATE= +0.05V/"s
-6V/ps
t - -.....'IN"""'P--..
VIN
VOUTf2. .~,
lTl020
Rl
t-.....-----1P-VOUT 5V
10k'
C2
T
Av
1
10
100
Rl
Cl
330
O.lpF
100{l 0.047pF
10k O.002pF
lOOk
CI
C2
O.OOlpF
....
R2
'FOR CURRENT LIMIT
=1.5A
tMUST HAVE LOW
ESR. SEVERAL 100"F
CAPACITORS CAN BE
PARALLELEO.
lOOk
10k
5V Regulator
Regulator with Improved Transient Response
VilUT .2:;,........_ _.........._5V
t"-.....- -.....-P--5V
lTl020
I'S 11
....
....
Dual Output Regulator
t - - - - - - - - - - - _ - - - - - - - 5 V REG 10mA
4-37
LT1020
TYPICAL APPLICATions
Maintaining Lowest IQ at Dropout
Dual Output 150mA Regulator
8
':"
GND
-HIPIiT
VIN
OUT.,:;2+-_-<1~
Vour i"'--.....-
3 VIN
_ _ _ 5V
OUTPUT
U1020
.....- ..... 5V
~T1021l
500k
GNp
IJIlOP
OUT
9
13
2N3904
500k
1M
--------5 REG 150mA
t - -....... . - - - - - - - -....
4.7k
'TRANSISTOR USED BECAUSE OF LOW LEAKAGE CHARACTERISTICS
'FOR TEMPERATURES GREATER THAN 70'C
REDUCE 51k RESISTORS TO 15k. 10 WILL
INCREASE.
t--...- -....--VIN
Dual Output Positive Regulator
r-.....---------1~VIN"'12 3V
Vourt-:'-....----1P-....-5V
-+
12VOUT --1P--.....
Battery Backup Regulator
VOUT
5V
BATIERY 3 VIN
INPUT
Vour
LTt02Q
2
11
':"
INTERNAL PARASITIC
DIODES OF LT1020
VIN
4-38
I 1l1li
1l1li
I
Voor
VllI
LT102Q
O.OOl~F
A'I
IlI{Il
2
1M
VOUT
':"
NC
3 MAIN
POWER
INPUT
LT1020
TYPICAL APPLICATions
5V Regulator with Shutdown
VIN >5.2V
la=40"A
---+-_--_-
3 'IIN.-
VJllltJ.:2
L"tl020
~~TPUT
NC
LOGIC INPUT
1M
'TRANSISTOR USED BECAUSE OF LOW LEAKAGE CHARACTERISTICS.
TO TURN OFF THE OUTPUT OF THE LTl020
FORCEFB (PIN 11) > 2.5V.
Tum Off at Dropout
R1
1.5M
R2
1M
_----,\O,.,.,----....-I>JVIr-,
VIN .....
} = - - - - t -.....--t--OUTPUT
11
1M
":"
OUTPUT TURNS OFF
AT DROPOUT. OUTPUT
TURNS ON WHEN:
VINXR2=2.5V
Rl +R2
Current Limited 1Amp Regulator
2.2k
0.5U"
r - - -.....W .....- - -...--~~tM......_ - - V I N
r-_t-_____-+_~--VO~
5V@lA
lOOk
2700
":"
":"
lOOk
'='
'SETS CURRENT
LIMIT BUT INCREASES
DROPOUT VOLTAGE BY
O.SV.
t MUST HAVE LOW
ESR. SEVERAL 100pF
CAPACITORS CAN BE
PARALLELED.
4-39
LT1020
TYPICAL APPLICATions
1 Amp Regulator with Current Limit
2.2k
t---"""1~-"""--1- Your
5V@lA
lOOk
1.2k
2700
lOOk
lN4l48
ISC
SENSE
0.030
tMUST HAVE LOW
ESR. SEVERAL 100pF
CAPACITORS CAN BE
PARALLELED.
Logic Output on Dropout
+
r~
13
1M
1M
"DROPOUT"
4-40
OV
S
VIN
TTL COMPATIBLE
LT1020
TYPICAL APPLICATions
Charge·Pump Negative Voltage Generator
1M
51k
+
I1O~F
51k
J~
1N5819
OR EQUIVALENT
VOUT(NL)= -(VIN-1V)
VOUT (5mA) = -(VIN-3V)
la=300pA
1
r
VOUT
(-)
20pf
Charge·Pump Voltage Doubler
1M
51k
1N5819
OR EQUIVALENT
------t---+-I...............+-......-
r-JVll'Ir--......
+VOUT
+
1"#
VOUT (NL) =2VIN-1V
VOUT (5mA)=2VIN-3V
la=300pA
4-41
LT1020
TYPICAL APPLICATions
SOmA Battery Charger and Regulator
lO~F
~----~~~~--------~+~20k
220k
4
3
VIN
~~2~~~~____1-~ ~
_
2,5V
1M
fB
6V
'00''1' '1--
11
1M
3.90
VIN MUST BE GREATER THAN THE
BATTERY VOLTAGE PLUS 1.3V
Switching Preregulator for Wide Input Voltage Range
VIN ___7_.5_V.TO_3_0V_~______- ......__....._____...,
+
100~FT
r - - - - -pOsT REG. -
SWITCHING
REGULATOR OUTPUT
TO 1.8M
VREF ...M ......---i
(PIN 4)
1M
10k
1k
100k
L
4mH \
--..,..'¥--4t----.....- . L .-...-...-"T-:::\
I
I
.
3 Vm
~
lT11l2O
VN~ 2
- - - - -,
I
I
VOUT
5V@100mA
~,
I
I
I
11
I
I
220k
I
I
I
I
220k
I
L ______ _____ .J
O,01~
MAINTAINS LOW I Q ( < 100~)
FOR ALL INPUT VOLTAGES
SWITCHER EFFIC. =85%
POST REG. EFFIC. =82%
OVERALL EFFIC. = 70%
SWITCHING REGULATOR OUTPUT =
2.5 x (1 +RA/RB)' FOR A CLEAN OUTPUT
FROM THE LINEAR REGULATOR SET TO VOUT+ 1.2V
4-42
RB
1M
~
+
2M
30k
LT1020
SCHEmATIC DIAGRAm
~
,-~
<;::'
~
~~
~~
~
~~
+
~
2~
~~
12iJ
1i:~
4-43
LT1020
BLOCK DIAGRAm
REFERENCE
OUTPUT
PNP OUT
OUTPUT
NPN OUT
DROPOUT
DETECTOR
NONINVERTING
11 FEEDBACK
INVERTING
9 GROUND
PACKAGE DESCRIPTiOn
Dimensions in inches (millimeters) unless otherwise noted ..
N14Package
Plastic DIP
J14 Package
Hermetic DIP
~------(~!~)------~~
I--------('~:,------~"I
MAX
MAX
0025
ri~~~~~~~~~~~~~~+---r
0092
0055
(2337)
PIN NO 1
OIANOM
IDENT
(1397)
MAX
0200
(5080)
MAX
4-44
ajA
Tjmax
ajA
SOOC/W
11O"C
130'C/W
jf""'-LlnO\~D
....JL..., . TECHNOLOGY
____
LT1_020_CS
Micropower Regulator
and Comparator
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
•
•
The LT1020 is a combination micropower positive regula·
tor and free collector comparator on a single monolithic
chip. With only 40J.lA supply current, the LT1020 can supply
over 12SmA of output current. Input voltage range is from
4.SV to 36V and dropout voltage is O.6V at 12SmA. Dropout
voltage decreases with lower load currents. Also included
on the chip is a class Boutput 2.SV reference that can ei·
ther source or sink current. Adropout detector provides an
output current to indicate when the regulator is about to
drop out of regulation.
40fLA Supply Current
12SmA Output Current
2.SV Reference Voltage
Reference Output Sources 1rnA and Sinks O.SmA
Dual Output Comparator
Comparator Sinks 10mA
Dropout Detector
O.2V Dropout Voltage
Thermal Limiting
Electrical Shutdown
The dual output comparator can be used as a comparator
for system or battery monitoring. For example, the com·
parator can be used to warn of low system voltage while
the dropout detector shuts down the system to prevent . , . .
abnormal operation. Frequency compensation of the com· . .
parator for amplifier applications can be obtained by add·
ing external output capacitance. Dual output or positive
and negative regulators can also be made.
APPLICATions
•
•
•
•
Battery Systems
Battery Backup System
Portable Terminals
Portable Instruments
The 2.SV reference will source or sink current. This allows
it to be used as asupply splitter or auxiliary output.
Dropout Voltage and Supply Current
1.00
5V Regulator
V'N>5.2V
la=40"A
5V
10
~
w
~
'::;
LTl020
' 'r
+
GND
11
.,..
FB
~
§1 0.10
10-
t:;
~
0
'"0
II
j/
0.01
0.1
1
10
100
0.1
1000
OUTPUT CURRENT (mA)
4-45
LT1020CS
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Input Voltage ...................................... 36V
NPN Collector Voltage ...........•.................. 36V
PNP Collector Voltage ..................... Supply - 36V
Output Short Circuit Duration .................. Indefinite
Pow.er Dissipation .................... Internally Limited
Operating Temperature Range .............. OOC to 100°C
Storage Temperature Range ............. - 65°C to 150°C
ORDER
PART NUMBER
LT1020CS
PART MARKING
LT1020CS
S16 PACKAGE
PLASTIC SOL
ELECTRICAL CHARACTERISTICS T,=25°C
PARAMETER
Reference
Reference Voltage
Line Regulation
Load Regulation
Output Source Current
Output Sink Current
Temperature Stability
CONDITIONS
MIN
TYP
MAX
UNITS
4.5V SVIN s36V
4.5V SV1N S36V
2.46
2.50
0.G1
0.2
4
2
1
2.54
0.015
0.3
%/V
45
75
tl
50
80
120
20
-0.5mAsIREFslmA, V1N ", 12V
VIN=5V
V1N =5V
1
0.5
V
%
mA
mA
%
Regulator
Supply Current
Output Current
Load Regulation
Line Regulation
Dropout Voltage
Feedback Sense Voltage
Dropout Detector Current
Feedback Bias Current
Minimum Load Current
Short Circuit Current
V1N = 6V, lOUTS l00,.A
V1N = 36V, lOUTS 100,.A
VIN= 12V, lOUT = 125mA
VIN s36V Shutdown
(V1N-Vourl~1V, VIN~6V
lour = l00,.A
lour = 125mA
VIN=12V
t.vOUT= -O.05V
VIN=36V
V1N =36V
Pin 11 and Pin 12 shorted, VIN=4.5V
0.5
0.G15
0.05
0.65
2.56
3
0.2
0.01
0.02
0.4
2.5
20
15
1
250
30
7
40
15
2000
3
15
4
10000
80
94
2.44
3
~A
mA
~A
125
(VIN- Vour)~1V, VIN~6V
6VSV1NS36V
,.A
mA
%
%N
V
V
V
~A
40
5
360
nA
,.A
mA
mA
Comparator
Offset Voltage
Bias Current
Offset Current
Gain·NPN Pulldown
Common Mode Rejection
4-46
OVsVcM s35V, V1N =36V
OVsVcM s35V, V1N =36V
OVsVCM s35V, V1N=36V
aVoUT=29V, RL =20k
OV SVCM s35V, V1N = 36V
mV
nA
nA
VN
dB
LT1020CS
ELECTRICAL CHARACTERISTICS
PARAMETER
Comparator
Power Supply Rejection
Output Sink Current
NPN Saturation Voltage
Output Source Current
Tj=25°C
CONDITIONS
MIN
TYP
4.5V"Vs,,36V
VIN =4.5V
80
96
dB
10
18
mA
lour = lmA
60
0
Input Voltage Range
Response Time
Leakage Current (NPN)
0.4
200
MAX
0.6
UNITS
V
~A
VIN-l
5
V
~s
2
~
ELECTRICAL CHARACTERISTICS
PARAMETER
Reference
Reference Voltage
Line Regulation
Load Regulation
Output Source Current
Output Sink Current
Regulator
Supply Current
Output Current
CONDITIONS
4.5V"V IN ,,36V
4.5V"V IN ,,36V
-0.5mA"I REF "lmA, VIN =12V
VIN =5V
VIN =5V
VIN = 6V, lour,,100~A
VIN = 36V, lour,,100~
VIN = 12V, lour = 125mA
(V IN - Vour)2:1V, VIN 2:6V
Load Regulation
Line Regulation
(V IN -Vour)2:1V, VIN 2:6V
Dropout Voltage
lour = 100~A
lour = 125mA
6V"V IN ,,36V
Feedback Sense Voltage
VIN= 12V
Dropout Detector Current
Feedback Bias Current
avour = -0.05V
Minimum Load Current
Short Circuit Current
VIN=36V
VIN=36V
Pin 11 and Pin 12 shorted, VIN = 4.5V
Comparator
Offset Voltage
Bias Current
Offset Current
Gain-NPN Pulldown
Common Mode Rejection
Power Supply Rejection
Output Sink Current
Output Source Current
Input Voltage Range
Leakage Current (NPN)
OV" = VCM " 35V, VIN = 36V
OV "VcM,,35V, VIN =36V (Note 1)
OV "VcM,,35V, VIN = 36V
avour = 29V, RL =20k
OV"VcM,,35V, VIN=36V
4.5V"Vs,,36V
VIN=4.5V
VIN =36V
The. denotes the specifications which apply over full operating temperature range.
•
•
•
•
•
•
•
•
•
•
•
••
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
MIN
TYP
MAX
UNITS
2.40
2.50
0.01
2.55
0.02
0.3
0.4
V
%N
%
mA
mA
65
85
11
95
120
20
1
0.5
125
2.5
0.06
0.85
2.57
3
240
30
15
50
360
10
60
20
1000
80
80
5
40
0
%
%N
V
V
V
~A
50
2.5
mA
mA
1
0.02
2.36
~A
~A
nA
~A
mA
mA
mV
nA
nA
VIV
dB
dB
mA
10
120
~A
VIN -l
8
V
~A
Note 1: ForOV"VCM "O.1V and T>85°C I bias max is 100nA.
4-47
LT1020CS
Pin FunCTions
Pins 1, 8, 9, 16-No internal connection.
Pin 2-RegulatorOutput. Main output, requires 10JLF out·
put capacitor. Can be shorted to VIN or ground without
damaging device.
Pin 3-lnput Supply. Bypass with 10JLF cap. Must always
be more positive than ground.
Pin 4-Reference. 2.5V can source or sink current. May be
shorted to ground or up to 5V. Voltages in excess of 5V
can damage the device.
Pin 5-Comparator PNP Output. Pull up current source for
the comparator. May be connected to any voltage from VIN
to 36V more negative than VIN (operates below ground).
Short circuit protected. For example, if VIN is 6V then pin 5
will operate to - 30V.
Pin 6-Comparator NPN Output. May be connected to any
voltage from ground to 36V more positive than ground
(operates above VIN). Short circuit protected.
4-48
Pins 7, 10-Comparator Inputs. Operates from ground to
VIN -1V. Comparator inputs will withstand 36Veven with
VINofOV.
Pin 11-Ground.
Pin 12-Current Limit. Connecting this pin to ground de·
creases the regulator current limit to 3mA min. Leave open
when not used.
Pin 13-Feedback. This is the feedback pOint of the regulator. When operating, it is nominally at 2.5V. Optimum
source resistance is 200k to 500k. The feedback pin should
not be driven below ground or more positive than 5V.
Pin 14-Shutdown. Logic high turns the regulator output
off. Shutdown threshold is 1.4V and impedance is 65kll.
Pin 15-Dropout Detector. This pin acts like acurrent
source from VIN which turns on when the output transistor
goes into saturation. The magnitude of the current
depends on the magnitude of the output current and the
input-output voltage differential.Pin current ranges from
5JLA to about 300JLA.
L7YI1~~ff~---3-A-.-Ne-g-a-t-iv-e-A-d-j-U~-~l-a~-~-!
Regulator
FEATURES
DESCRIPTion
•
•
•
•
The LT1033 negative adjustable regulator will deliver
up to 3 Amps output current over an output voltage
range of -1.2V to -32V. Linear Technology has
made significant improvements in these regulators
compared to previous devices, such as better line and
load regulation, and a maximum output voltage error
of 1%.
Guaranteed 1% Initial Voltage Tolerance
Guaranteed 0.015%/V Line Regulation
Guaranteed 0.02%/W Thermal Regulation
100% Burn-in in Thermal Limit
APPLICATions
•
•
•
•
Adjustable Power Supplies
System Power Supplies
Precision Voltage/Current Regulators
On-Card Regulators
The LT1033 is easy to use and difficult to damage. Internal current and power limiting as well as true thermal limiting prevents device damage due to overloads
or shorts, even if the regulator is not fastened to a heat
sink.
Maximum reliability is attained with Linear Technology's advanced processing techniques combined with
a 100% burn-in in the thermal limit mode. This assures that all device protection circuits are working
and eliminates field failures experienced with other
regulators that receive only standard electrical
testing.
Precision Regulator t
Current Limit
-
R,·
2pF
+
R,
374!l
I\.
-v,,-+----/
~
..........
........
IMPROVED LINE & LOAD REGULATIDN ••
• R,
~
3R;5 (V.UT - 3.75)
•• REGULATION IS IMPROVED BY V.UT
1.25
o
o
5
10
15
20
25
30
35
INPUT·OUTPUT DIFFERENTIAL (VI
t EXTERNAL LT1004 REFERENCE IMPROVES
LINE. LOAD. AND THERMAL REGULATION
4-49
LT1033
ABSOLUTE mAXimum RATinGS
PREconDITiOninG
Power Dissipation ............. Internally Limited
Input to Output Voltage Differential . . . . . . . . .. 35V
Operating Junction Temperature Range
LT1033M .................. -55°C to 150°C
LT1033C ..................... Ooe to 125°C
Storage Temperature Range
LT1033M .................. -65°C to 150°C
LT1033C .................. -65°C to 150°C
Lead Temperature (Soldering, 10 sec.). . . . .. 300°C
100% THERMAL LIMIT BURN-IN
PACKAGE/ORDER InFORmATion
LT1033MK
LT1033CK
T PACKAGE
LT1033CT
KPACKAGE
TO·3 METAL CAN
ELECTRICAL CHARACTERISTICS (See note 1)
LT1033M
SYMBOL
VREF
AVOUT
AlouT
PARAMETER
Reference Voltage
load Regulation
CONDITIONS
IVIN-VOUTI = 5V, lOUT = 5mA,
Tj = 25'C
3V "" IVIN - vouTI ",,35V
5mA "" lOUT"" IMAx, P "" PMAX
lOrnA "" lOUT"" IMAX, (See Note 2)
TJ = 25'C, IVOUT I"" 5V
TJ = 25'C,lvoUT I .. 5V
IVOUT I"" 5V
IVOUTI .. 5V
AVOUT
AV1N
line Regulation
Ripple Rejection
IADJ
AI AOJ
Thermal Regulation
Adjust Pin Current
Adjust Pin Current Change
Minimum load Current
Isc
Current limit
~
A em
Temperature Stability 01 Output
Voltage
~
Long Term Stability
ATime
en
eJC
RMS Output Noise
(% 01 VOUT)
Thermal Resistance
Junction to Case
3V "" I V1N - VOUT I "" 35V, (See
Note 2)
TJ = 25'C
VOUT = -10V, 1 = 120Hz
CADJ = 0
CADJ = 1OI'F
T = 25'C, 10msec Pulse
lOrnA "" louT"" .\MAX
3V "" IVIN-VOUT "" 35V
IVIN-VOUTI"" 35V
IVIN-VOUTI"" 10V
V1N - VOUT
10V, (See Note 2)
VIN-VOUT = 35V,
T = 25'C
I
•
TMIN "" T "" TMAX
TA = 125'C, 1000 Hours
LTlO33C
MAX
MIN
TYP
MAX
UNITS
-1.238 -1.250 -1.262
V
-1.215 -1.250 -1.285
-1.200 -1.250 -1.300
V
•
56
70
10
50
10
50
0.2
1.0
0.2
1.0
%
20
20
0.4
75
mV
0.4
75
1.5
1.5
%
0.005
0.01
0.015
0.04
0.01
0.02
0.02
0.05
3
66
80
0.002
65
0.2
1.0
2.5
1.2
4.3
0.02
100
2
5
5.0
3.0
6
0.5
1.3
2.5
0.6
1.5
0.3
1.0
•
••
•
TYP
-1.238 -1.250 -1.262
•
•
I""
TA = 25'C, 10Hz"" 1 "" 10kHz
0.003
T Package
K Package
1.2
The. denotes the speCifications which apply over the full operating
temperature range. Otherwise TI = 25°C.
Nola 1: Unless otherwise indicated, these specifications apply:
IV1N - VOUT I= 5V; and lOUT = 5mA. Power dissipation is internally
limited. However, these specifications apply for power dissipation up
to 30W. See guaranteed minimum output current curve. IMAX = 3A.
4-50
MIN
%IV
%IV
60
77
0.002
65
0.5
2
2.5
0.02
100
2
5
5.0
3
1.2
4.3
3.0
6
I'A
I'A
I'A
rnA
rnA
A
.5
1.3
2.5
A
0.6
1.5
0.3
1.0
%
%
66
dB
dB
4
1.2
%/W
%
0.003
2.0
mV
2.0
'C/W
'C/W
Nola 2: Testing is done using a pulsed low duty cycle technique. See
thermal regulation specifications for output changes due to heating
effects. Load regulation is measured on the output pin at a point 1/8"
below the base of the package.
LT1033
TYPICAL PERFORmAnCE CHARACTERlsncs
Dropout Voltage
Temperature Stability
2.B
Minimum Load Current
1.B
1.270
1.6
2.6
~
I
>-
T)
2.4
~ 1.260
2.2
~
~
1.B
>'~
;;:;
1.6
~
II!
.s
1.0
~
0.8
!z
r--.
~
0
!5
0.4
0.2
1.S
1.0
2.S
2.0
3.0
-R-5O-~
OUTPUT CURRENT (A)
L
80
'~
60
40
11O• F
80
~
z
S
60
~
40
~
r-
Jv
4
~
1oo~S~0
10
-20
-30
10
-40
iz
.
~
'"
cF~ I"\.. " .
"- ~"-. ' ..
J
.... CAOJ - 1O.F
~
~
100
10k
1k
100k
'-
~
'f
~ 10-1
;!i
~ CAOJ - 0
>-
,
~
>-
10-2
0.6
I
j5~
0.4
1
~~
>-w
0.2
"'~~
•
0
-0.4
1O.F=
~~
~~
>-<
10-3
10
100
1k
~,1
",0
10k
FREQUENCY (Hz)
VIN - -1SV
VOUT ~ -10V
~ 120 Hz
20
T) - 2SoC ""
0.1
0.01
100k
1M
"''''
-
-O.S -
0..'-' -1.0
;;:;
0.4 -
w
"'.::~
~z
0.2
'( ~CA~JJ, -IJ
1\ 1-1..
~Q
1\
~~
>-w
CAOJ - 10.F
-0.2
I I
I I
",0
".
0
-0.4
-0.6
1
>-
I'"
t-- Tj ~ 2S'C
CL - 1.F
-0.5
'-' -1.0
20
30
40
S1
g
-1.S
\ If
""
JIN-~1SV
g
- -10V
r-- ILVOU~
~ SOmA
10
10
Load Transient Response
: 1_\.
CAOJ - 1O.F
r--
OUTPUT CURRENT (A)
I.
J
F
4D
1M
I
.ACAOJ ~ 0
II
i lo• - ....
CAOJ - 0
0.6
-0.2
./tAOJ
CADI
60
Line Transient Response
w
40
f
O.B
VIN - 1SV
VOUT -10V
IL - 500mA
100 CL - 1.F
~Tj 2SoC
30
Ripple Rejection
FREQUENCY (Hz)
Output Impedance
20
INPUT-OUTPUT DIFFERENTIAL (V)
VIN- 1SV
VOUT ~ -10V
)L - SOOmA
Tj - 2SOC
20
101
'"
0
R
BO
, ......"
OUTPUT VOLTAGE (V)
:s
A-
V-
100
o
~
50
Ripple Rejection
VIN - VOUT 20 f-IL - SoomA
f ~ 120Hz
Tj - 2S~C I
-10
~
0
100
cL~lo
J:~
w
~
a:
Tj - 2SoC
V
Tj_~~~O:~
TEMPERATURE (0C)
Ripple Rejection
100
!
,,
1.230
O.S
i'D
:!1z
,
;; ,
'-' 0.6
1.240
1.4
1.2
-5SoC
/}\
1.2
'<'
§ 1.2S0
2.0
~
1.4
~
\
,
VOUT - -10V
INL ~ 50mA
T) - 2S'C
CL - 1.F
10
I
I
30
40
TIME (.s)
4-51
LT1033
TYPICAL PERFORmAnCE CHARACTERISTICS
Guaranteed Minimum
Output Current
Load Regulation"
Adjustment Current
80
0.8
75
z
0.4
Q
~
~
~
~
I-- f--
0
.,..--.-.
r- r-
~
"
----
~ -0.4
i'
5
r-.... ........
~
I'...
-0.8
0.8
*
1.6
2.4
3.2
4.0
o
OUTPUT CURRENT (A)
The LT 1033 has load regulation compensation
which makes the typical unit read close to
zero. This band represents the typical
production spread.
5
10
15
"
20
......... jo..",
I.,...;' ~
-
55
50
25
30
-~-50-~
35
0
~
50
~
100m150
TEMPERATURE (OC)
INPUT-OUTPUT DIFFERENTIAL (V)
APPLICATion InFORmATion
Output Voltage: The output voltage is determined by
two external reSistors, R1 & R2 (see Figure 1). The exact formula for the output voltage is:
VOUT
=
VRe' ( 1 +
:~ )
+ IADJ (R2)
Where: VRef = Reference Voltage, IADJ = Adjustment
Pin Current. In most applications, the second term is
small enough to be ignored, typically about O.S% of
VO UT • In more critical applications, the exact formula
should be used, with IADJ equal to 6SJLA. Solving for R2
yields:
R2
= VOUT - VRef
VRef
R1
-IADJ
Smaller values of R1 and R2 will reduce the influence of
IADJ on the output voltage, but the no-load current
drain on the regulator will be increased. Typical values
for R1 are between 100n and 300n, giving 12.SmA
and 4.2mA no-load current respectively. There is an
additional consideration in selecting R1, the minimum
load current specification of the regulator. The operating current of the LT1033 flows from input to· output. If
this current is not absorbed by the load, the output of
the regulator will rise above the regulated value. The
current drawn by R1 and R2 is normally high enough to
4-52
absorb the current, but care must be taken in no-load
situations where R1 and R2 have high values. The
maximum value for the operating current, which must
be absorbed, is SmA for the LT1033. If input-output
voltage differential is less than 10V, the operating current that must be absorbed drops to 3mA.
+C,
R2
10~'ADJ
vrt
R1
I--~----+-- -VOUT
-Vtl
Figure 1
EXAMPLE:
1. A precision 10V regulator to supply up to 3 Amp load current.
a. Select R,
=
b. Calculate R2
1000 to minimize effect of IAOJ
=
VOUT - VReI
VRe'
I
R1 -
AOJ
=
10V - 1.25V
1.25V - 65 A
1000
P,
=
7040
LT1033
APPlICRI'IOn InFORmATion
Capacitors and Protection Diodes: An output capacitor,
C3, is required to provide proper frequency compensation of the regulator feedback loop. A 2~F or larger
solid tantalum capacitor is generally sufficient for this
purpose if the 1MHz impedance of the capacitor is 1Q
or less. High capacitors, such as Mylar, are not recommended because they tend to reduce the phase
margin at light load currents. Aluminum electrolytic
capacitors may also be used, but the minimum value
should be 25~F to ensure a low impedance at 1MHz.
The output capacitor should be located within a few
inches of the regulator to keep lead impedance to a
minimum. The following caution should be noted: if
the output voltage is greater than 6Vand an output capacitor greater than 20~F has been used, it is possible
to damage the regulator if the input voltage becomes
shorted, due to the output capacitor discharging into
the regulator. This can be prevented by using diode DI
(see Figure 2) between the input and the output.
+
R2
+
C3
Rl
IN4002
1'-----.----+- -Vour
a
The input capaCitor, C2, is only required if the regulator is more than 4 inches from the raw supply filter
capacitor.
02* ..
01* IN4002
.. 01 protects the regulator from input shorts to .... D2 protects the adjust pin of the regulator
ground. )t is required only when C3 is larger
from output shorts if C2 is larger than 10llF
than 20~F and VOUT is larger than 6V.
andVOUT is larger than -25V.
Figure 2
Proper Connection of Divider Resistors: The LT1033 has
a load regulation specification of 0.8% and is measured at a pOint 1/8" from the bottom of the package.
To prevent degradation of load regulation, the resistors which set output voltage, R1and R2, must be connected as shown in Figure 3. Note that the positive
side of the load has a true force and sense (Kelvin)
connection, but the negative side of the load does not.
/
Lead resistance here does not
affect load regulation.
R2
Bypassing the Adjustment Pin: The adjustment pin of the
LT1033 may be bypassed with a capaCitor to ground,
C1, to reduce output ripple, noise, and impedance.
These parameters scale directly with output voltage if
the adjustment pin is not bypassed. A bypass capacitor reduces ripple, noise, and impedance to that of a
1,25V regulator. In a 15V regulator for example, these
parameters are improved by 15V /1,25V = 12 to 1,
This improvement holds only for those frequencies
where the impedance of the bypass capaCitor is less
than R1. Ten microfarads is generally sufficient for
60Hz power line applications where the ripple frequency is 120Hz, since Xc = 130ft The capaCitor
should have a voltage rating at least as high as the
output voltage of the regulator. Values larger than
10~F may be used, but if the output is larger than 25V,
a diode, 02, should be added between the output and
adjustment pins (see Figure 2).
-VIN
"-
Lead resistance here degrades
load regulation. Minimize
the length of ttis lead.
Figure 3
R1 should be connected direct/yto the output lead of
the regulator, as close as possible to the specified
point 1/8" from the case. R2 should be connected to
the positive side of the load separately from the positive (ground) connection to the raw supply. With this
arrangement, load regulation is degraded only by the
resistance between the regulator output pin and the
load. If R1 is connected to the load, regulation will be
degraded.
4-53
LT1033
TYPICAL APPLICATions
The output stability, load regulation, line regulation,
thermal regulation, temperature drift, long term drift,
and noise, can be improved by a factor of 6.6 over the
standard regulator configuration. This assumes a
zener whose drift and noise is considerably better
than the regulator itself. The LM329B has 20PPM/oC
maximum drift and about 10 times lower noise than
the regulator.
In the application shown below, regulators #2 to liN"
will track regulator # 1 to within ± 24mV initially, and
to ± 60mV over all load, line, and temperature conditions. If any regulator output is shorted to ground, all
other outputs will drop to:=:: -2V. Load regulation of
regulators 2 to liN" will be improved by Vour/1.25V
compared to a standard regulator, so regulator #1
should be the one which has the lowest load current.
High Stability Regulator
R2"
7V
lM3298
+I.F
RI
I'
1%
SOliD
TANTAlUM
I " - - - - - - - + - - -VOUT
-VH'I
"R2 _
IVDUT I
9.08 X 10-3
-
90811
Dual Tracking 3A Supply ± 1.25V 10 ± 20V
+VU'I
VIN LT150A Vour
+Vour
ADJ
R1**
W;)!!
+
2.2"
.F
Multiple Tracking Regulators
APJ
.~
l11OO3 VWrI-"----4---+---Vour
" Solid Tan1aium
." RI Of R5 may be trimmed slighlly to improve tracking
Current Regulator
+
CI
2.F
sauD TANTALUM
(-)
1.25V
1=65.A+Rs
(0.511 .;; As .;; 25011)
4-54
LT1033
SCHEmATIC DIAGRAm
01'
4k
•
The following table allows convenient selection of
program resistors from standard 1% values.
OUTPUT
ERROR
VOUT
Rl
R2
5
6
8
10
12
15
18
20
22
24
28
30
100
121
115
115
118
100
150
121
130
121
115
121
301
453
619
806
1020
1100
2000
1820
2150
2210
2430
2740
(Ofo)
0.6
-0.7
0.6
0.6
1
0.5
0.2
0.8
0.2
0.9
-0.7
-0.9
4-55
LT1033
PACKAGE DESCRIPTion
K Package TO-3 STEEL Metal Can
0325-0350
(8255 - 8 890)
0420-0480
,"668-'21921
n
12946)
' • ---L. SEATN) PLANE
O:!:OOlO
±02S4}
0181):1-0005
..
0395-0420
11003-1069j-
0.151::tO,002
(3.835±0051)
J!...!.!!..
~ --r
~
1--
0760-0775
119304-1968S)
MAX
, ,
T Package TO-220 Plastic
-e[
~
0050:t:.0OO2
~
0038-0043
-----It- (0965-1092)
o34O:to.ol0
,. .
~
U
:tOOI5
1:1:0.3111)
0490-0510 R
(12446-129541
0050
'('i27jTYP
I
1 ~.536".;
01
~'i4.
",,"""""
!:~L::~:J
(3.81
0.41
"04
~
o032:!:0 005
+0010
0105 -0015
~
-0381
~
4-56
TJIotAX
8JC
LT1033M
150'C
2'CIW
LT1033C
125'C
2°CIW
(&08±0254)
~
0381 -O~1
~-Y--LlneJ\12
~,
LT1035M/LTl035C
TECHNOLOG![':rf~--L-Og-i-C-C-o-n-tr-o-"e-d-R-e-g-U-la-to-r
FEATURES
DESCRIPTion
• Two Regulated Outputs
+sv at 3A
+SVat 7SmA
• 2% Output Voltage Tolerance
• 66dB Ripple Rejection
• 0.7% Load Regulation
• TIL and CMOS Compatible Logic Control
.100% Thermal Burn-In on All Devices
The LT103S features two positive SV regulators in the
same package. The main regulator offers excellent performance while supplying load currents up to 3A, and the
auxiliary regulator provides similar performance while
supplying lighter loads of 7SmA. The main regulator has
the additional feature of being under the shutdown control of a logic signal. When the enable pin is taken to a low
logic level, the main regulator shuts down and its output
voltage goes to near OV. During this command, the auxiliary output is unaffected by the main regulator's condition and continues to provide a SV output.
APPLICATions
The main output has current and power limiting combined with thermal shutdown to make it virtually blowout
proof. The auxiliary output is not affected by the thermal
shutdown mechanism or the state of the main output,
allowing it to be used as a back-up in case of overloads or
shorts on the main supply.
• Power Supply Sequencing
• Remote On / Off Power Control
• Selective System Power during Emergency Power
Operation
• Memory Power Supply with Back-Up
The logic input of the LT103S (enable pin) has a 1.6V
threshold and can be driven from a high source impedance. This allows it to be driven by most logic
families, including TIL and CMOS.
For a 1A version of the LT103S, please see the LT100S
data sheet. For a 12V output voltage version, consult the
factory.
Functional Diagram
Guaranteed Load Current
4.0
+5V~
3.5
OV'-ENABLE
LOGIC
L
+5V
3.0
«
;=
2.5
til
§
2.0
POWE~
DlSSIPIlfION
LIMIT
'-'
~
1.5
1.0
........
""
0.5
o
.L7~
o
2
4
6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
4-57
•
LT1035M/LT1035C
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Power Dissipation-Continuous .............. , 24W
Power Dissipation-Fault Conditions. .. Internally Limited
Input Voltage (V IN) . . . . . . . . . . . . . . . . . . . . . . .. 20V
Enable Voltage (V EN) ...................... 20V
Operating Junction Temperature
LT1035M ................... -55°Cto150°C
LT1035C ...................... 0°Cto125°C
Storage .................... -65°Cto150°C
Lead Temperature (Soldering, 10 sec.) ........ 300°C
ORDER PART
NUMBER
BOTTOM VIEW
LT1035MK
LT1035CK
4 LEAO TO·3
FRONT VIEW
o /
GNO (TAB) .
LT1035CT
PREconDITiOninG
100% Burn-In in Thermal Limit
VIN
VEN_
_AUX
GND
5 LEAD TO·220
ELECTRICAL CHARACTERISTICS
Main Regulator (See Note 1)
LT1D35M
TYP
MAX
MIN
LT1D35C
TYP
MAX
5.1
4.9
5.0
5.1
V
5.0
5.2
4.8
5.0
5.2
V
0.1
0.1
0.2
0.3
0.1
0.1
0.2
0.3
V
V
10
35
10
35
mV
0.3
2
0.3
2
mV/V
70
0.003
0.012
4
2.4
4
2.5
6
4
dB
O/O/W
A
A
A
A
5
4
2.5
3
V
V
rnA
rnA
°C/W
°C/W
SYMBOL
PARAMETER
CONDITIONS
MIN
Vo
Output Voltage
High
Tj=25°C
7.7Vs VIWS 20V
PDS 24W
OmAs los 3A
7Vs VINS 12.5V
V1N=20V
8Vs V1Ns 12.5V
Os los 3A (Note 2)
4.9
5.0
4.8
Low
I:!.Vo
Load Regulation (Note 6)
AiD
llVo
I:!.VIN
Line Regulation
7.4Vs VINS 20V
(Note 2)
10
Ripple Rejection
Thennal Regulation
Available Load Current (Note 6)
Isc
Short Circuit Current
V1N
Minimum Input Voltage to
Maintain Regulation
50Hzs Is 500Hz
llPo= 20W (Note 4)
8Vs VINs 12.5V
VIN=20V
VIN=8V
VIN=20V
(Note 5)
10=1A
10=3A
Output High
Output Low
TO-3
TO-220
10
Quiescent Current
9)C
Thennal Resistance,
Junction to Case
4-58
•
••
•
60
70
••
3
1.6
0.003
4
2.4
4
2.5
••
7.2
7.7
6.7
7.2
3
2
1.5
60
0.012
3
1.6
6
4
7.2
7.7
5
4
2.5
6.7
7.2
3
2
1.5
2
UNITS
LT1035M/LT1035C
ELECTRICAL CHARACTERISTICS
Auxiliary Regulator (See Note 1)
SYMBOL
PARAMETER
CONDITIONS
MIN
LT1035M
TYP
MAX
MIN
LT1035C
TYP
MAX
Vo
Output Voltage
4.9
5.0
5.1
4.9
5.0
5.1
V
4.8
5.0
5.2
4.8
5.0
5.2
V
IlVo
Load Regulation
Tj=25°C
7.2Vs V1NS 20V
OmAslos 75mA
7.2Vs VINS 20V
OmAslos 75mA
(Note 2)
5
15
5
15
mV
0.2
1
2
0.2
1
2
&0
IlVo
IlVIN
Isc
V1N
Line Regulation
7.2Vs VINS 20V
(Note 2)
Ripple Rejection
50Hzs fs 500Hz
Short Circuit Current
Minimum Input Voltage to
Maintain Regulation
7.0VsVIN=20V
(Note 5)
los10mA
10=75mA
ELECTRICAL CHARACTERISTICS
•
•
••
74
140
6.5
7.2
74
140
250
6.2
6.8
mV/V
mV/V
dB
250
6.5
7.2
6.2
6.8
MIN
LT1035C
TYP
MAX
1.6
1.6
1.5
0
1.7
1.8
6
1
mA
V
V
Logic Control (See Note 1)
SYMBOL
PARAMETER
CONDITIONS
VEN
Enable Threshold Voltage
7.0Vs VINS 20V
T1=25°C
Enable Pin Current
•
UNITS
VENS!V (Note 3)
VEN 2: 2.4V
The • denotes the specifications which apply over the full operating
temperature range.
Note 1: Unless otherwise indicated, these specifications apply for
VIN= 10V, 10=OmA, and Tj =25°C.
Note 2: Line and load regulation is measured using a low duty cycle
pulse, causing little change in the junction temperature. Effects due to
thermal gradients and device heating must be taken into account
separately.
MIN
•
1.45
1.3
0
LT1D35M
TYP
MAX
1.6
1.6
1.5
0
1.7
1.8
6
1
1.45
1.3
0
UNITS
V
V
p.A
p.A
Nota 3: When the enable pin is at a low logic level, current flows out of
the enable pin.
Nota 4: Pulse length for this measurement is 20ms.
Nota 5: Input voltage is reduced until output drops by 100mV from its
initial value.
Nota 6: See "Guaranteed Load Current" graph.
4-59
LT1035MI LT1035C
TYPICAL PERFORmAnCE CHARAOERISTICS
Minimum Input-Output
Differential of Main Output
Minimum Input-Output
Differential of Auxiliary Output
2.6 ...---,--,---r-.,---r----,
2.6
2.4 f--t--+--+.-+.",,--t::;,.....,
2.4
~
2.2
f--t--+--+---::;;o"""--I:io~
~
2.0
f--t-'7I'~-+---::;"""'-T--i
~
~ 1.8
9 1.6 f-'"7I"'--+-"""'----1--+---i
~
~
1.4
~-+-_..I'O'--+----1--+---i
:;-
5.5
g
A/~
TJ=lSOOC- ~
1.8
./'V
. / '/"
~ 1.6
=> 1.4
:!~
~
1.2
~ 1.0
1.2
0.5
1.0
1.5
2.0
OUTPUT CURRENT (A)
2.5
3.0
I~
-
,
a 3.5 r-~
~.
3.0
o=>
2.5
r---
-- ---
2.0
o
20
40
60
80
OUTPUT CURRENT (mA)
100
Cour=2.2~F TANT ~
1/
:--
7VsVINS12.5V
r-
VIN=15V
r- r-
v,NLov
0
25 50 75 100 125 150
JUNCTION TEMPERATURE (OC)
Line Transient Response
Load Transient Response
Tj=-50°C
. / TJ=l~ f:§
ii§
Tj=25°C
1.5
-50 -25
so
-
r-
~'
Short Circuit Output Current
h
.4.5
5:
!z 4.0
V"/
0.8
0.6
5.0
TJ=- 55°V.
2.2
:;; 2.0
~
Maximum Available Load
Current-Main Output
CouT=2.2~F
l
TANT
r
Jour=lA
,our=o.2A
SOmV
Cdur=lbp F T~NT
/Tj=25°C
1
Cour=10#~ANT r-.
........
~~
<1VIN=0.5V
~
~
I-- 1-1 our = 2imA
<1lour
I-- ~r-2Ar
1
10 12 14 16
INPUT VOLTAGE (V)
4
18
4
20
Output Voltage as Function of
Temperature
~
I v
~
r- r-....
I"-
4.95
4-60
0
25 50 75 100 125 150
TEMPERATURE (OC)
4
14
70
lour=2oomA
u.s)
8
10
12
14
1.0
=!our 200mA
-VIN-l0V
our- l#
11111
r-..
g
,
50
~
z
w
=> 40
53
a:
0.1
~
z
r-
is
~
:E
H
Cour- 1O#
~
-0.01
30
10
6
TIME
Output Impedance
~I~~I\OV I III
CO~';;~I::i
20
-50 -25
12
80
60
~
10
Ripple Rejection
5.05
~
g5.oo
6
8
TIME(,.s)
10
100
'JilillitrJ
lk
10k
REJECTION (dB)
lOOk
f1M
0.001
100
lk
10k
FREQUENCY (Hz)
-
lOOk
1M
LT1035M/LT1035C
TYPICAL PERFORmAnCE CHARACTERISTICS
Enable Pin Characteristics
Output Switching
Characteristics
Enable Threshold
1.75
1.70
II"""
-0.2
/
0.4
/TJ=25°C
~ 0.6
....as
a:
1.65
~1.60
g
0.8
~ 1.0
1.2
..... I-
1.4
-
VIN=10V
A.
'"
........
........
"'- .......
~ 1.55
/
l!li!: 1.50
./
"'-
1.6
1.B
1.35
-50 -25
i
......
o
Tj=25./::
A
"""" I,...-
0.2
0.4
6 8 10 12
TlME(pS)
r- Cour=lpF
If
/
1.4
1.6
o
o
2
~
~
4
Jd-;t;;
/
)1'
:!l
~ 40
'"
~
30
20
10
6 8 10 12 14
INPUT VOLTAGE (V)
•
I
"' 50
OUTPUT ACTIVE
/
16 18
/
VIN=10V
70
'I
Tj=-:55°C
14
Output Noise
/ /
0.6 O.B 1.0 1.2
OUTPUT VOLTAGE (V)
4
60
I II'TJ=150°C
U
o
2
TJ=25°C
~
o
I
I
BO
10ur=0
Tj=25°C'
If
1/
T
0
25 50
75 100 125 150
JUNCTION TEMPERATURE (OC)
Quiescent Current
/ /
VIN=10V
Cour=10"r
VENABLE
1.40
Output Characteristics in
Low State
//
V
.........
./
V
I
1.45
o 1.3 1.4 1.5 1.6 1.7 l.B 1.9 2.0 2.1 20
ENABLE VOLTAGE (V)
......
V
I/Cour-0.1"r
16 18 20
o
MAIN/.
OUTPUT
~
100
300
/
/"
,/
~UXILIARY
OUTPUT
1k
3k
10k
BANDWIDTH (1 POLE)
30k
'10 IS NEARLY INOEPENOENT OF TEMPERATURE
4-61
LT1035M/LT1035C
APPLICATions InFORmATion
General Information
The LT1035 is a dual output 5V regulator. The main output is capable of delivering up to 3A of load current and
can be shut down with a logic signal. The auxiliary output
supplies a minimum of 75mA and is unaffected by the
logic signal. The outputs are trimmed to ± 2% initial
tolerance and exhibit excellent line and load regulation.
The logic control feature makes the LT1035 ideal for
many system applications where it is desirable to powerup a portion of the system for a period of time, and then
power the system down during a standby operation. As
an example, the LT1 035 could be used to activate various
memory space locations only as needed, thus saving
substantial power dissipation and other cooling costs.
The LT1035 could also be used to power microcomputers
such as the 8048 series. The auxiliary supply can be
used for RAM keep-alive during power-down operation.
Additional power savings can be accomplished by using
the LT1035 to power PROM, EPROM, and E2PROM
devices. During program load or look-up table operations, the ROM type device can be activated and its contents placed in RAM, and then the ROM power can be
removed. Or for high speed but low power data acquisition systems, the power could be applied to fast memory,
then the data transferred to CMOS memory. The main
regulator can then be shut down and the CMOS memory
can be powered by the auxiliary for lower power dissipation. Other applications such as multiple power supply
sequencing, elimination of expensive AC and DC power
switches, delayed start applications, switching 5V DC
loads, and many others are now easily accomplished.
Timing functions, such as delayed power-up or powerdown, can also be performed directly at the enable pin.
Because a logic low on the enable pin shuts down the
main regulator, feedback from output to enable can be
used to generate hysteresis or latching functions.
The low quiescent current drain of the LT1035 makes it
useful in battery-powered or battery back-up applications. The enable pin can be u$ed as a "low battery"
detector or to shut down major portions of system power,
4-62
allowing memory portions to continue to operate from the
auxiliary output. At low output currents, the auxiliary output will regulate with input voltage typically as low as
6.1V, giving maximum battery life.
Good design practice with all regulators is to bypass the
input and output terminals. A 2/-,F solid tantalum at the input and at both outputs is suggested. For the applications
which follow, the bypass capacitors are still recommended, but for simplicity are not shown on the diagram.
It is also recommended that for maximum noise immunity
the voltage enable pin be tied high if it is unused. It can be
tied directly to VIN, as shown in Figure 1, or to the auxiliary output. If the enable pin is left open, it will float to a
high logic level of approximately 1.6V and the main output regulator will be at 5V.
--..:-Vo
-",--+-SV
Figure 1
The enable pin is fully protected against input voltages up
to 20V, even if the power input voltage is zero.
The basic shutdown control circuit uses a direct gate
drive or an open collector driver and a pull-up resistor
which are tied to VAUX, as shown in Figure 2.
- - -_ _ _ +SV
7.S·20V
Figure 2
LT1035M/LT1035C
APPLICATions InFoRmATion
Driving the Enable Pin
The enable pin equivalent schematic is shown in Figure 3.
Basically, enable pin current is zero above the threshold
and about 1.SpA below the threshold, flowing out of the
pin. Standard logic, such as TTL and CMOS, will interface directly to the enable pin, even if the logic output
swing is higher than the input voltage (VIN) to the
regulator. 1SV CMOS can be used to drive the enable pin,
even if the regulator is not powered up, without loading
the CMOS output.
",--}~,""
Output Characteristics in Low
State
10
1
8
~
7
VIN=10V
V
I-
/ /
::>
o
A ~
i::V
Tj= 25
o
/ /
/
/1
o
./
1/
/
~ Tj= -55°C
7
0.2
TJ =150°C
0.4
0.6
0.8
1.0
1.2
1.4
1.6
OUTPUT VOLTAGE (V)
Figure 4
Figure 3
Timing functions, such as delayed power-up or powerdown, can be implemented by driving the enable pin with
an RC network. The current flowing out of the enable pin
should not be used as the timing current in delayed
power-up applications as it is temperature sensitive and
varies somewhat from device to device. Instead, a resistor tied to the auxiliary output, the input, or to a logic
signal should be used. The timing resistor chosen should
provide at least 2SpA of current to "swamp out" the effects of the internal current.
Main Output Current/Voltage Characteristics
Following a high to low transition at the enable pin, the
main regulator output will begin to drop after a delay of
approximately 0.4tts. With no capacitive load, the output
will fall to zero in approximately 0.8tts (RL =20-1000).
With a capacitive load, fall time is limited by the RC product of the load and the output capacitance. For light loads
(R L> 4000), the discharge time is controlled by an internal current pull-down of 1SmA for output voltages down
to 1.SV. Below 1.SV, the pull-down current drops to
=4mA. The DC output voltage in the shutdown mode is
approximately 0.07V for input voltages (V IN) up to 12V. If
VIN is 20V, the output during shutdown will be approximately 0.1SV due to an internal current path in the
regulator.
The user should note that the output in the low state can
only sink about 3mA. If current is forced into the output,
the output voltage will rise to 1Vat SmA and about 1.SV at
10mA. With no output capacitor, the rise time of the main
output is about 3ttS. With an output capacitor, rise time is
limited by the short circuit current of the LT103S and the
load capacitance; tr=(C) (SV)/4A. A 10ttF output
capacitor slows the output rise time to approximately 12ttS.
Output Current
The main output current limits at about 4A for input
voltages below 12.SV. Internal foldback, or "power
limiting", circuitry detects the input-output voltage differential and reduces current limit for input to output
voltages exceeding 7.SV. With 20V input, for instance,
short circuit current is reduced to = 2.4A.
An additional feature of the LT103S is that the auxiliary
supply does not incorporate, nor is it affected by. thermal
shutdown. Any fault condition of the main regulator will
not affect the auxiliary output voltage.
The following applications circuits will serve to indicate
the versatility of the LT103S.
4-63
LT1035M/LT1035C
TYPICAL APPLICATions
First-On, Last-Off Sequencing
First-On, First-Off Sequencing
+sv
+SV
Vtl
+SV
+5V
RS
R6
56k
66k
RS
lk
T,,(l) = sOm.
T,,(2) = 150ms
OFF iON
Power Supply Turn-On Sequencing
Rl
lk
T",(l) - lOOms
T.,(2) - 200m.
Fast Turn-Off, Delayed Turn-On
+5V
r
C2
Cl
Rl
11=0.4 Rl Cl
12=0.4 R2 C2
Thermal Cutoff at High Ambient Temperature
----<_+5V
Sl.lk
57,.A
lOOk
TON .0.3 R1Cl
Latch-Off for VOUT:S 4. 7V
----p----,--+5V
25mA
MINIMUM
LOAD
Rl
1.Sk
+
S6'C
Ton ~ 42'C
Toff~
'YELLOW SPRINGS # 44006, 30kll @ 2S'C
Cl
10,.1'
.. t~
~----------+-----~
R3
4.7k
4-64
LT1035M/LT1035C
TYPICAL APPLICATions
High Input Voltage Detection
Proportional Motor Speed Controller
TRANSFORMER AND
RECTIFIER SET
VIN = 9V DC NOMINAL
..
~;
+5V
~)~:Auli
Rl
75k
+5V
V,hutolf (INPUT)
lN4148
~
(3.8V)
(~)
R2
3.6k
OUTPUT SHUTS OFF WHEN 110VAC TRANSFORMER
IS OVER VOLTAGED TO 220VAC.
Opto-Coupled Output Control
Push-On, Push-Off
-l------..--....- _ - +5V
+5V
C2
+5V
10~F
+5V
lOOk
2k
10k
3k
II
18 1
NN
-= 1
1
COUPLER "ON" = OUTPUT "ON"
IF C2 IS LARGER THAN
INCREASED TO C2Il0
10~,
Cl SHOULD BE
10k
1
-
.....I
SELECT RDEPENDING UPON THE
ON-RESISTANCE OF THE OPTO COUPLER
Latch-Off when Output Short
---t-+5V
27k
Delayed Power-Up
VIN
'lie •..
. "!'lIIt
+5V
~<,,' ~Tt035: j
Nix
+5V
L-.--t-+5V
Rl
27k
IDELAy=OA R1Cl
4-65
LT1035M/LT1035C
TYPICAL APPLICATions
Fast Electronic Circuit Breaker
Battery Voltage Sensing Circuit
- - -....- - - + 5 V
VB
f----+---
+
+5V
R3
Memory Save on Power-Down
VIN'" 7.SV -11------
- - - - - - - - - - . - - MAIN
+~ OUT
+5V
AUXOUT
5.1k
2.2k
THE AUXILIARY OUTPUT POWERS THE MEMORY. WHILE THE MAIN OUTPUT
POWERS THE SYSTEM AND IS CONNECTED TO THE MEMORY STORE PIN.
WHEN POWER GOES OOWN, THE MAIN OUTPUT GOES LOW, COMMANDING THE
MEMORY TO STORE. THE AUXILIARY OUTPUT THEN DROPS OUT.
Line Dropout Detector
+5V
TRIP SET
+ 5V AUXILIARY
TO SECONDARY
OFAC
POWER
TRANSFORMER
3.3k
DROPOUT
SIGNAL
4-66
LT1035M/LT1035C
TYPICAL APPLICATions
Low Dissipation Regulator
Regulator Losses at IOUT=3A
27k
40 ~+-~-+-+--r-+-~-b~~
V,N
10VDC20VDC
~ 35
,,,2
,,
3.9k
1k
100DpF
,,
3k
L--G=
I
30
~
25
~+-~-+~~~~-+--+-1--1
OUTPUT
CONTROL
LOGIC
11
5k
5k
12
13 14 15 16 17 18 19 20
INPUT VOLTAGE (Voe)
"DALE TD-5
THIS CIRCUIT IS DESIGNED TO REDUCE POWER DISSIPATION
IN THE LT1035 OVER A 90VAG-140VAC INPUT RANGE.
sCHEmATIC DIAGRAm
2 ENABLE
GND
4-67
LT1035M/LT1035C
PACKAGE DESCRIPTion
l
~
(14.48-15.49)
r
10-220 Package (5 Lead)
0.390-0.410
(9.906-10.41)
~
0.100-0.120
(2.540-3048)
(3.734~
~
+
D
0.355-0370
(9.017 -9.398)
_0.062-0.720
_ __
(1 .574-18.29)
j
r
i
0.880-0.910
J.'~m'
.050
(24.84~
!:::I1__-;'·oao::O.04O
(0.762 1.018)
0.013-0.025
(~
0.327-0.335
(8.308-8.609)
--1----1
4-Pin Metal Package Similar to JEDEC 10-3
(;853~::;9~:)~
0.273-0.293
(~)
0.760-0.775
(19.30-19.69)
J
+---i'---\>---
.1
~=:b::::r==::;;;:::::;:;==I:ri~=--- PlANE
SEATING
0.151-0.161
(3.935-4.089)
(~!~)R
2 PlACES
0.470
i1194)
mAPIN
CIRCLE
0.525
(13.33)
MAX
4-68
~-Y"llnll\l2
~~
LT1036M/LT1036C
TECHNOLOG~~~---L-o-g-ic-c-o-n-tr-o-lIe-d--R-eg--UI-a-to-r
FEATURES
DESCRIPTion
• Two Regulated Outputs
+12Vat3A
+5Vat75mA
• 2% Output Voltage Tolerance
• 60dB Ripple Rejection
• 0.7% Load Regulation
• TTL and CMOS Compatible Logic Control
• 100% Thermal Burn-In on All Devices
The LT1036 features two positive regulators in the same
package. The 12V main regulator offers excellent per·
formance while supplying load currents up to 3A, and the
5V auxiliary regulator provides similar performance while
supplying lighter loads of 75mA. The main regulator has
the additional feature of being under the shutdown control
of a logic signal. When the enable pin is taken to a low
logic level, the main regulator shuts down and its output
voltage goes to near OV. During this command, the auxil·
iary output is unaffected by the main regulator's condition
and continues to provide a5V output.
APPLICATions
• Power Supply Sequencing
• Remote On/Off Power Control
• Selective System Power during Emergency Power
Operation
• Power Supply with Back-Up
The main output has current and power limiting combined
with thermal shutdown to make it virtually blowout proof.
The auxiliary output is not affected by the thermal shut·
down mechanism or the state of the main output, allowing
it to be used as aback-up in case of overloads or shorts on
the main supply.
The logic input of the LT1036 (enable pin) has a 1.6V
threshold and can be driven from a high source impedance. This allows it to be driven by most logic families,
including TTL and CMOS.
For adual5V version of the LT1036, please see the LT1035
data sheet.
Guaranteed Load Current, 12V
Output
Functional Diagram
4.5
+12V,
ovL
ENABLE
LOGIC
L
+5V
3.5
$
3
.........
>-
a:J 2.5
'"
!!5
'"
'"
2
1.5
I'.....
0.5
o
14
16
18
20 22 24 26
INPUT VOLTAGE (V)
'"
28
30
4-69
4
LT1036M/LT1036C
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Power Dissipation-Continuous (Note 6) ........... 24W
Power Dissipation-Fault Conditions .. Internally Limited
Input Voltage (VIN) •.•.....••.•.•.••••.•••.•••..•.••• 30V
Enable Voltage (VEN) ...•...•..•.•.•..•...•.•••....•• 30V
Operating Junction Temperature
LT1036M ............................ - 55°C to 150°C
LT1036C ................................ OOC to 125°C
Storage .............................. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ............. 300°C
PREconDITiOninG
100% Bum-In in Thennal Limit
ELECTRICAL CHARACTERISTICS Main Regulator (See Note 1) VIN =15V unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
Vo
Oulput Voltage
High
Ti = 25°C
15VsV1N S30V
10llT s IMAX (Note 6)
7VSVINS30V
V1N = 16V
Oslo s 3A (Note 2)
IlVo
Low
Load Regulation (Note 6)
~
IlVo
IlV1N
Line Regulation
15VsV1N S30V
(Note 2)
Ripple Rejection
50Hz s f s 500Hz
(NoteS)
IlPo = 20W (Note 4)
15VsV1N s20V
VIN=25V
V1N =15V
VIN=25V
(Note 5)
10=lA
10=3A
Output High
Output Low
TO-3
TO·22O
10
Thermal Regulation
Available Load Current (Note 6)
Isc
Short Circuit Current
V1N
Input Voltage to Maintain
Regulation (Dropout Voltage)
10
Quiescent Current
GiC
Thermal Resistance,
Junction to Case
4~70
•
•
MIN
11.76
11.52
•
50
••
••
3
2
LT1036M/C
TYP
12
MAX
UNITS
12.24
12.4S
V
V
0.1
0.3
V
10
SO
mV
1
4
mVN
60
dB
0.003
4
2.7
2.3
1
0.012
13.S
14.4
4
14.5
15
5.5
4.5
2.5
3
1.5
2
4
2
3
'Io/W
A
A
A
A
V
V
rnA
rnA
°C/w
0c/w
LTl036M/LT1036C
ELECTRICAL CHARACTERISTICS
Auxiliary Regulator (See Note 1)
SYMBOL
PARAMETER
CONDITIONS
Vo
Output Voltage
Ti = 25°C
7.2VsV IN s30V
OmA s 10 s 75mA
7.2VsV IN s30V
OmAslos75mA
(Note 2)
7.2VsV IN s30V
(Note 2)
AVo
Alo
Load Regulation
AVo
AV IN
line Regulalion
Ripple Rejection
Short Circuit Current (Note 7)
Input Voltage to Maintain
Regulation (Dropout Voltage)
Isc
VIN
LT1036MIC
TYP
5.0
MIN
4.9
•
•
4.8
•
50Hz s f s 500Hz
7.0V SV IN = 30V
(Note 5)
los10mA
10= 75mA
•
•
UNITS
MAX
5.1
V
5.0
5.2
V
5
15
mV
0.2
1
2
mV/v
mV/v
74
140
250
6.2
6.8
6.5
7.2
dB
rnA
V
V
ELECTRICAL CHARACTERISTICS Logic Control (See Note 1)
SYMBOL
PARAMETER
CONDITIONS
VEN
Enable Threshold Voltage
7.0V sVINs30V
Ti =25°C
Enable Pin Current
LT1036MIC
TYP
MIN
VEN s 1V (Note 3)
VEN,,2.4V
1.6
1.6
1.5
0
1.45
1.3
0
•
•
•
UNITS
MAX
1.7
1.8
12
6
V
V
~A
~A
Nole 3: When the enable pin is at a low logic level, current flows out of the
The. denotes the specifications which apply over Ihe full operating tern·
perature range.
Nole 1: Unless otherwise indicated, these specifications apply for
VIN = 15V, 10 = OmA, and Ti = 25°C.
Nole 2: line and load regulation is measured using a low duty cycle pulse,
causing little change in the junction temperature. Effects due to Ihermal
gradients and device heating must be taken into account separately.
enable pin.
Nole 4: Pulse length for this measurement is 20ms.
Nole 5: Input voltage is reduced until output drops by 100mV from its initial
value.
Nole 6: See "Guaranteed Load Current" graph.
Nole 7: Continuous shorts on the auxiliary output are not allowed unless
adequate heat sinking is used to maintain junction temperature below
150°C.
Nole 8: Guaranteed but not tested.
TYPICAL PERFORmAnCE CHARACTERISTICS
Minimum Input-Output
Oifferential of Main Output
Line Transient Response, 12V
Output
Minimum Input-Output
Differential of Auxiliary Output
2.6
2.4
~ 2.2 f---+--I---t-":7"'F----ji7""~
'"~
2.0
f---+--=*"'-----t--:7'F--7If---I
~ 1.8
f-7"4---b.,£-t---,.jL----jI---I
o
:>
r
24
f---+--I--*--i=,..---iI:::7"'9
r-
;;-
y/
:;; 2.0
~
§;
TJ =150°C- ~y
18
/
~ 1.6
~
"' 1.4 tL---+--7/"--\---+----jI----l
12
~ 1.2
z
-
1.0
.&
7,/
'"
'"
r-Z
~ ~
t::;'-'
o
~
i5
is
/\=25°C
./~
~ 1.4
6
'[ 20
TJ=- 55°.v.
2.2
:>
-
0
I
0
1\
0.5
1.0
15
2.0
OUTPUT CURRENT (A)
2.5
30
1.
V
AVIN=1V
,,;'
0
I
Jl
Vi N=1iV- f--
0.8
0.6
f-----
COUTT 10) TANJALUM f-- f--
I
-20
~.
~
COUT= 1"FTANTALUM
-20
20 -
J .!
1\.....
m
~
M
OUTPUT CURRENT (mA)
M
100
4
6
8
TIME(",)
10
12
14
4-71
LT1036M/LT1036C
TYPICAL PERFORmAnCE CHARAOERISTICS
Maximum Available Load
Current, 12V Output
--
-I
--
-
Quiescent Current
Output Voltage vs Temperature
:;-
J
T!=25 C-
;:=12.1
HjLlc
I\,
o
12V pUT~r
\.
l/~
'\
]!"
--
.J-+12V OUTPUT "OFF"
~~
II
o
8
12 16 20 24
INPUT VOLTAGE (V)
28
o
32
I
V
~
i5
~
)
w
9 g m
~
INPUT VOLTAGE (V)
M V
~
§
...
5.0
I - I::"--- 1""0.
4,9
4.7
-60 -25
0
25 60 75 100 125 150
TEMPERATURE ('C)
Enable Threshold
~
1.70
-0.2
I
0.4
.....
I
ffi
0.8
13
1.0
g§
LOAD TRANSIENT
1.2
I
1.4
=1A
f-- r- IOUT
AloUT=0.2A
1.65
I/Tj=25'C
~ 0.6
COUT= 1O~F TANTALUM
6
8
TIME (pS)
10
12
14
["--..
........
~1.60
~
b-
9
~
~ 1.55
II
IIIi!= 1.60
.... ~I"""
......
r-....,
f'.
1.45
'"
1.40
1.6
1.8
4
~ 5.1
1.75
I
I I-
-50
11.8
Enable Pin Characteristics
COUT= 1~F TANTALUM
10'"
~11.9
:E
:§ 4.8
036
Load Transient Response, 12V
Output
60
--
~
!5 12.0
DEVICE OUT OF REGULATION
BELOW 14V
o
12.2
o
1.35
-60 -25
1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 20
ENABLE VOLTAGE(Vj"
0
25 60 75 100 125 150
JUNCTION TEMPERATURE ('C)
• NOTE SCALE CHANGE
Short Circuit Current, 12V
Output
Output Switching
Characteristics
Output Voltage Noise
15
2QO
TJ=25'C
f--
fJ-COUT:S0.1~F
\
3:
3
I13
2
4-72
I A
t.- ~EE
\
'\
1
o
o
~r=1~
8
'"
"
V
l.....-
28
I
160
/
140
l..--"clouTT10i-t-
W120
>
S~CTIJN
lpPLICATlbN
,_
FOR FALL TIME INFORMATION
~100
r---
60
20
32
o
10 20
40 50 60 70 80 90
TIME (pS)
~
MAIN (12V)
~ 80
z
40
i"""--
12 16 2Q 24
INPUT VOLTAGE (V)
I
180
V
L
L I-"""
o r-100
~
V
OUTP~
L
L
~
i"""
-4000), the discharge time is controlled by an internal
current pull-down of 1SmA for output voltages down to
1.SV. Below 1.SV, the pull-down current drops to ::::4mA.
The DC output voltage in the shutdown mode is approximately 0.12V due to an internal current path in the
regulator. (See Figure 4)
=
Output Current
The main output current limits at about 4A for input voltages below 20V.lnternal foldback, or "power limiting", circuitry detects the input-output voltage differential and
reduces current limit for input to output voltages exceeding BV. With 2SV input, for instance, short circuit current is
reduced to ",0.9A.
An additional feature of the LT1036 is that the auxiliary
supply does not incorporate, nor is it affected by, thermal
shutdown. Any fault condition of the main regulator will
not affect the auxiliary output voltage.
The following applications circuits will serve to indicate
the versatility of the LT1036.
10
I /
V'N~ 15V
v
/
The user should note that the output in the low state can
only sink about 3mA. If current is forced into the output,
the output voltage will rise to 1V at SmA and about l.SV at
10mA. With no output capacitor, the rise time of the main
output is about 12p.s. With an output capacitor, rise time is
limited by the short circuit current of the LT1036 and the
load capacitance. A 10p.F output capacitor slows the output rise time to approximately BOp.s.
TJ~251:
o
I
/1
o
7
0.2
./
-A
~
'-
I
V
/
TJ~
-55°C
TJ~15QOC
04
0.6 0 8 1.0 1 2
OUTPUT VOLTAGE (V)
I4
1.6
Figure 4
TYPICAL APPLICATiOnS
Fast Turn-Off, Delayed Turn-On
Latch-Off with Output Short
Delayed Power-Up
VIN
+12V.
+12V
+5V
+
I
"::"
Cl
Rl
lOOk
tON~0.3
Rl
27k
tOELAy~0.4
Rt Cl
Thermal Cutoff at High Ambient Temperature
Power Supply Turn-On Sequencing
+5V
t54k
Rt'
'YELLOW SPRINGS #44008, 30kO@ 25°C
4-74
tl~04R1Ct
t2~0
t5 R2 C2
Rt Ct
LT1036M/LT1036C
TYPICAL APPLICATions
First-On, First-Off Sequencing
First-On, Last-Off Sequencing
+12V
+12V
·'l!tI;O'?/llllil!1--1- +SV
+5V
AS
150k
RS
150k
ION
ION
(1)~50ms
OFFi Oll
(2)~ISOms
ION (1)~100ms
ION (2) ~ 200ms
Line Dropout Detector
+12V
TAJPSET
+5V AUXtUAAV
TO S£CQNOARV
OFAC
!'OWER
TAANSFOAtIfR
DROPOUT
SIGNAl
Low Dissipation Regulator
Opta-Coupled Output Control
271<
+12V
V,N
t7.SVDC
TO 30VDC
+12V
+5V
,,
,,
,
L--G=
OUTPUT
CONTROL
LOGIC
,,
'-H'
I
Sk
Sk
-
I
-'
SELECT R OEPENDING 1J'ON THE
OIl-RESISTANCE OF TIE OPTO COUPlER
'DALE To.S
THIS CIRCUIT IS DESIGNED TO REDUCE POWER DISSIPATION
IN THE LT1036 OVER A 9QVA(}-14OVAC INPUT RANGE.
4-75
LT1036M/LT1036C
SCHEmATIC DIAGRAm
PACKAGE DESCRIPTiOn
Dimensions in inches (millimeters) unless otherwise noted.
4-Pin Metal Package Similar to JEDEC TO-3
TO-220 Package (5 Lead)
0570-0610
l
O.390_041O
(9.906-1041)
~
~
r
~
j ::i
0460-0.500
(~
F.
0045-0055
(1143-1.3Q7)
n
PLANE
0067
i1Toii
..Q.B2.071D
(1575)
(1803)
0970-'050
0151-0161
(3835-4.089)
1_. 0030-0040
r--i076:?-1016)
(~!~)R
0013-0025
2 PLACES
(D.330-a.635)
0525
("'1'3.33)
MAX
4-76
SEATING
r
(2464-2667)
(9017-9398)
0062-0720
(1574-1829)
(4318-4.5721
*
':D~
U- J
11448-1549)
0170_··~'11
0100-0.120
(2540-3.048)
.L7UO~I!rk>~--lO-A-m-p-p-o-Si-tiv-e-A-d-~-ULS-~-~Ob-~-!
Voltage Regulator
FEATURES
DESCRIPTion
• Guaranteed 0.8% Initial Tolerance
• Guaranteed 0.4% Load Regulation
• Guaranteed 10 Amp Output Current
.100% Thermal Limit Burn-in
• 24 Amp Transient Output Current
• Standard Adjustable Pinout
• Operates to 35V
The LT1 038 is athree terminal regulator which is capable
of providing In excess of 10 amps output current over
1.2V to 32V range. The device is packaged in a standard
TO-3 power package, and is plug-in compatible with
industry standard adjustable regulators, such as the
LM117 and LM138. Also, the LT1038 is a functional replacement for the LM396.
APPLICATions
In addition to excellent load and line regulations, the
LT1038 is fully protected by current limiting, safe area
protection and thermal shutdown. New current limiting
circuitry allows transient load currents up to 24 amps
to be supplied for 500fLS without causing the regulator
to current limit and drop out of regulation during the
transient.
•
•
•
•
•
System Power Supplies
High Power Linear Regulator
Battery Chargers
Power Driver
Constant Current Regulator
On-chip trimming of initial reference voltage to ::1:0.8%
combined with 0.4% load regulation minimize errors in
all high current applications. Further, the LT1038 is
manufactured with standard bipolar processing and has
Linear Technology's high reliability.
5V, 10 Amp Regulator
Load Regulation
0.2
I
IVIN J15V I
~
\1m
LT1038 Vovrl-..--.........5V AT 10A
Al1J.
1210
L-..-_--+1%
+
r10~F
z
o
~
~
~
3650
1%
VOUT=10V
PRELOAD = 100mA
0.1
0
I-- r- 1OUT=6A
-0.1 I-- f-10UT 10A
13
~
~ -0.2
-.....; I'-..
......
~
5
0_0.3
-0.4
-75 -50 -25
0 25 50 75 100 125 150
TEMPERATURE ('e)
4-77
LT1038
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Power Dissipation ............... Internally Limited
Input to Output Voltage Differential. . . . . . . . . . . . . 35V
Operating Junction Temperature Range
LT1038M
Control Circuitry ............ -55°Cto150°C
Power Transistor . . . . . . . . . . .. - 55°C to 200°C
LT1038C
Control Circuitry ............... O°C to 125°C
Power Transistor ............... O°C to 175°C
Storage Temperature ............. -65°Cto 150°C
Lead Temperature (Soldering. 10sec.) ........ 300°C
PREconDITiOninG
SYMBOL PARAMETER
CONDITIONS
VREF
IOUT=20mA, Tj =25°C
3V,;;(VIN-VOUT),;;35V
20mAsl oUT s10A, Ps75W
3V S(VIN -VO UT ) s35V,
IOUT=20mA (See Note 2)
TA=25°C
Ll,V OUT
Ll,V IN
L\,VO UT
L\,IOUT
Line Regulation
Load Regulation
Thermal Regulation
Ripple Rejection
IAOJ
Ll,I AOJ
Isc
Adjust Pin Current
Adjust Pin Current
Change
Minimum Load
Current
Current Limit
4-78
Temperature Stability
K PACKAGE
TO'3 METAL CAN
(STEEL)
20mA sl OUT s1 OA
(See Note 2)
TA=25°C
3V,;; (VIN - VOUT ) s 35V
3V ,;;(VIN -V ouT ),;;35V
TA=25°C, 20ms Pulse
VouT =10V, f=120Hz
CADJ=O
CAOJ = 10"F
20mA sl OUT s1 OA
3V s(VIN - VOUT) s35V
(V IN - VOUT ) =35V
(VIN - VOUT) s 20V
(VIN-VOUT)s10V
DC
Transient (0.5ms)
(See Note 1)
•
MIN
LT1038M
TYP
MAX
MIN
LT1038C
TYP
MAX
1.24
1.22
1.25
1.25
1.26
1.285
1.23
1.22
1.25
1.25
1.275
1.285
0.005
0.02
0.01
0.03
0.005
0.02
0.02
0.03
%/V
%/V
0.1
0.3
0.002
0.4
0.8
0.005
0.1
0.3
0.002
0.6
1
0.01
%
%
%/W
•
•
••
•
•
••
•
(VIN-VOUT)=30V, TJ =25°C
L\,VOUT
L\,Temp
LT1038MK
LT1038CK
100% THERMAL LIMIT BURN-IN
ELECTRICAL CHARACTERISTICS
Relerence Voltage
ORDER PART NUMBER
BOTTOM VIEW
•
60
60
75
50
0.2
7
10
14
1
60
100
1
0.2
7
3
20
10
14
22
2
10
14
1
2
60
75
50
14
22
2
1
UNITS
V
V
dB
dB
100
JLA
3
20
10
mA
mA
JLA
A
A
A
%
LT1038
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
AV OUT
ATime
Long Term Stability
en
RMS Output Noise
(% ofV OUT )
Thermal Resistance
Junction to Case
SYMBOL
8JC
(See Note 1)
LT1038M
LT1038C
TYP
MAX
TA=12SoC, 1000 Hours
0.3
1
TA=2SoC,
10HzsfslOkHz
Power Transistor
Control Circuitry
0.001
MIN
MIN
TYP
MAX
0.3
1
UNITS
%
0.001
•
%
1
O.S
°C/W
°C/W
1
O.S
Note 2: See thermal regulation specifications for changes in output
voltage due to heating effects. Load and line regulation are measured at a
constant junction temperature by low duty cycle pulse testing.
The. denotes the specifications which apply over the full operating
temperature range.
Note 1: Unless otherwise specified, these specifications apply:
VIN - VOUT = SV and lOUT = SA. These specifications are applicable for
power dissipations up to 7SW. At input-output voltage differentials
greater than 10V, achievable output current and power dissipation
decrease due to protection circuitry.
TYPICAL PERFORmAnCE CHARACTERISTICS
Dropout VoHage
,I j
J
'-
IOUT=10A
~
11-
r--
-
IOUT=6A
I~ r- :- r--
1.270
60
IIVOUT=100mV-
~~
Temperature Stability
Adjustment Current
65
1>~
=>
'"
z>-
:i
>-
a'"=>«
./
55
50
/
45
1/
,..........
~1 260
./
w
~
':J
o
> 1.250
i
/v
40
I
it
'" 1.240
V
..v
V
.......
35
1
-75 -50 -25 0
25
50
75 100 125 150
TEMPERATURE (0C)
Output Impedance
30
-75
-25
25
75
1.230
-50 -25
125
TEMPERATURE (0C)
Minimum Operating Current
§:
~
50
75
100 125
150
25
35
Ripple Rejection
100
C~DJ=1J~F
....
80
OJ
z
I----/-----t-~'!_-+--j
2
......... __1 1
~o
~
0.1
25
TEMPERATURE (0C)
10r---,----,---,----,---,
~
:z
0
60
b3
Ul
'"~~ 0.01 f--+-7"f-~.f---
'"
40
a:
VIN- VOUT=5V
IOUT=1A
20 r---f=120Hz
~
§
0.001 t--........."""'--t--+--+--j
~i=25Ic
0.0001 L-_--'--_--'_ _"-_--L_--'
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
O--~~--~~~--~~~
o
5
10
15
20
25
30
INPUT-OUTPUT DIFFERENTIAL (V)
35
40
o
o
10
I
15
20
OUTPUT VOLTAGE (V)
30
4-79
LT1038
TYPICAL PERFORmAnCE CHARACTERISTICS
Ripple Rejection
100
Ripple Rejection
80
I--LIlJ=10~
80
~
iii'
z
~
Ul
60
~
a:
40
0::
~
~
\.
g
z
frl
Ul
1'\.\
~
a:
r-...\.
0::
0::
lk
10k
FREQUENCY (Hz)
~
CAIlJ-O
'-'
lOOk
0
I
o
o
10
1
OUTPUT CURRENT (A)
Current Limit
11111111 V,N=10V
Vour=5V
.L!lWII
20
I-
I-
~
0::
12
1.0
24 .........d-t~f-+-
TCASE=25'C
g
~ELOAD=O
""
t--
20 f-+=1~+Hl1~+--+++ftHt-l-++HtfH
I 16r-~ittlffl~tiiT~~~~~
16 I-- c--PRELOAD = lOA
~
~
r-
10
20
30
INPUT-OUTPUT DIFFERENTIAL (V)
40
1.5
24
'-'
.......
...
...... 1'r-
Line Transient Response
28
g
I
Y.PR~LOAJ=lJ-r-\
PRErOADI2A~
Tcri 25 1'C
Current Limit
PRELOAD~O
I I'.: \
:\. \~
Vour=10V
0.1
- - PEAK CURRENT LIMIT
DC CURRENT LIMIT
TCASE=25'C
I
r- f =120HZ
1M
-... ,
Ii'.. '''~
16
~
50 r-Y,N=15V
40
100
il-
I-
~
10
24
ffi
60
0::
\.
20
70
52
CADJ~ \
o
CADJ~I;;;;
V,N=15V
Vour=10V
lour=IA
~
Current Limit
32
K
~
'-'
~
I-
I~
0
.l I J .l
~L =j"F; CL=10"F,
-1.0
12r-~~~-i~~ffi!~~~
f--
Vour=10V
lour=l00mA
TI=25'C
I-- -
Cour=O
CAIlJ=O
-
-1.5
W
"'~~
1.0
>'"
0.5
T
OW
o
O~J....J.J.J.J.W.I....-'--'-'-LWJ~J....J.J.J.J.WI
0.1
10
100
0.1
1.0
TIME (ms)
10
100
TIME (ms)
~~
;;;'-'
10
20
TIME (.s)
30
40
Load Transient Response
I
hL=rl;
I I
C~=O If'
T
"'"~ ~L=I~F; C~=10"F _ _
I I
I
V,N=15V
-
I"
~~M[~A~~200mA TCASE 25'C
I
I 1\
I \
10
4-80
20
TIME (.s)
-
I I
30
40
.L7~
LT1038
APPLICATions InFoRmATion
General
The LT1 038 develops a 1.25V reference voltage between
the output and the adjustment terminal (see Figure 1). By
placing a resistor, R1, between these two terminals, a
constant current is caused to flow through R1 and down
through R2 to set the overall output voltage. Normally this
current is the specified minimum load current of 10 or
20mA. Because IADJ is very small and constant when
compared with the current through R1, it represents a
small error and can usually be ignored.
Bypass Capacitors
Input bypassing using a 1p.F tantalum or 25p.F electrolytic
is recommended when the input filter capacitors are more
than 5 inches from the device. Improved ripple rejection
(80dB) can be accomplished by adding a 10p.F capacitor
from the adjust pin to ground. Increasing the size of the
capaCitor to 20p.F will help ripple rejection at low output
voltage since the reactance of this capacitor should be
small compared to the voltage setting resistor, R2. For improved AC transient response and to prevent the possibil-
ity of oscillation due to unknown reactive load, a 1p.F
capaCitor is also recommended at the output. Because of
their low impedance at high frequencies, the best type of
capaCitor to use is solid tantalum.
Protection Diodes
The LT1038 does not require a protection diode from the
adjustment terminal to the output (see Figure 2). Improved internal circuitry eliminates the need for this diode
when the adjustment pin is bypassed with a capaCitor to
improve ripple rejection.
If a very large output capacitor is used, such as a 100p.F
shown in Figure 2, the regulator could be damaged or destroyed if the input is accidentally shorted to ground or
crowbarred, due to the output capaCitor discharging into
the output terminal of the regulator. To prevent this, a
diode, D1 as shown, is recommended to safely discharge
the capaCitor.
01
1N4002
,IN
VIN
LT1!l38
0IJ1"
l'
VOUT
IADJL:
50,..A
VOUT=VREF (1
+~)
VIN
OUT
R1
VREF
R2
....
....
+IADJ R2
Figure 1. Basic Adjustable Regulator
Figure 2
4-81
,.
LT1038.
APPLICATions InFoRmATion
Load Regulation
Because the LT1038 is a three-terminal device, it is not
possible to provide true remote load sensing. Load
regulation will be limited by the resistance of the wire
connecting the regulator to the load. The data sheet
specification for load regulation is measured at the bottom
of the package. Negative side sensing can be a true
Kelvin connection if the bottom of resistor R2 is returned
to the negative side of the load. Although it may not be immediately obvious, best load regulation is obtained when
the top of the resistor divider, R1 , is connected directly to
the case,not to the load. This is illustrated in Figure 3. If
:.;"\'
R1 were connected to the load, the effective resistance
between the regulator and the load would be
(R2~R~
Rp x
,Rp =Parasitic Line Resistance.
Connected as shown, Rp is not multiplied by the divider
ratio. Rp is about 0.0040 per foot using 16 gauge wire.
This translates to 4mV/ft at 1A load current, so it is important to keep the lead between the regulator and the
load as short as possible, and use large wire or PC board
traces.
Rp
PARASITIC
LINE RESISTANCE
VIN
CONNECT
R1 TO CASE
R1
R2
J.,
I
!'
CONNECT R2
TO LOAO
Figure 3. Connections for Best Load Regulation
TYPICAL APPLICATiOnS
VIN
Paralleling Regulators
•
tnPlia .?Ut:I------.
AOO
VOUT=1.25 (1
+~)
IOUT=OA TO 20A
·THE # 18 WIRE ACTS
AS BALLAST RESISTANCE
INSURING CURRENT SHARING
BETWEEN BOTH DEVICES.
4-82
LT1038
TYPICAL APPLICATIOnS
10 Amp Variable Regulator*
T1
TRIAD
F-269U
L
C3De
1MH
r-~--~~-.-----.~~rnn-~-----1
20
1N4oo3
T2
.3
20
__
~ IN
lSO'OOOp/'
Lf1038
OUT t-.....- .....- .....- .....-~~~~
ADJ
+ C1
750' - 1.5k
LT1oo4-1.2
+---+
":'
":'
L -_ _
I
+
100~F
":'
LT1004-2.5
C30e
20k
OUTPUT
ADJUST
1N4003
16k'
II
+15V
16k'
82k
200k
11k'
-15V
10k
*1% FILM RESISTOR
L-DALE TO-5 TYPE
T2-STANCOR 11Z-2003
15k
+15V
-15V
11k'
15V
GENERAL PURPOSE REGULATOR WITH SCR PRE REGULATOR TO LOWER POWER
DISSIPATION. ABOUT 4V DIFFERENTIAL IS MAINTAINED ACROSS THE m038
INDEPENDENT OF OUTPUT VOLTAGE AND LOAD CURRENT.
4-83
LT1038
TYPICAL APPLICATions
1.2V-25V Adjustable Regulator
Improving Ripple Rejection
'. ~~~. V~1-__-_VOUTtt
5V
.'. AIi.{ ....
R1
12111
1%
R1
12111
+
R2
3650
1%
.....-
~
'C1 IMPROVES RiPPlE REJECTION. Xc SHOULD
BE SMALL COMPARED TO R2.
"NEEDED IF DEVICE IS FAR FROM FILTER CAPACITORS
tOPTIONAL -IMPROVES TRANSIENT RESPONSE
ttVOUT=1.25V (1
5V Regulator with Shutdown
m~-_5V
12111
1%
3650
1%
4-84
+~)
LT1038
TYPICAL APPLICATions
Remote Sensing
Rp
(MAX DROP 300mVj
VIN
VIN
lT100s
OUTPUT
VOUTJ::-----.......'INt.....-----.....-5V
Al!J
2511
1210
36511
L-----.. . . .
......
~~_
-~RETURN
2511
RETURN------------------'
Temperature Compensated Lead Acid
Battery Charger
10 AMP
DIODE
VIN_-I~-IVIII
25k
U103II
Vourl-.....- .....-...,
ADJ
12111
1%
SOD
10k·
THERMALLY
COUPLED
,, __ J__
+
- - ":"12V
SOk·
·LOAD ON SATTERY - 200pA WHEN NOT CHARGING
4-85
LT1038
TYPICAL APPLICATions
Lamp Flasher
Automatic Light Control
12V
15V
1PF
VIN -'
T
':'
Lll038, VIJUTt-.-~,.....,
, AOJ
OFF
J:2N3904
+
12k 10pF
+
12k 10pF
+
12k 10pF
Protected High Current Lamp Driver
12V
10A
....-..--fVOilT" LT1038
TTL OR
CMOS
4-86
AbI
VIiII--~,l-15V
LT1038
SCHEmATIC DIAGRAm
D1
6.3V
D2
. .
6.3V
. .
4-87
LT1038
PACKAGE DESCRIPTiOn
K Package TO-3 Steel Metal Can
t
0.116
(2.946)
Mf
0.325-0.350
(6.~-6.000)~~~____________~~~----L
0.420-0.490
(10.67-12.45)
Lw,'-i.-__-.~------...i.....i...J ---.-SEATING PLANE
J
I
l...1c-______ H
0168-0.176
(4267-4.521)
RTYP
2 MOUNTING HOLES
0.151-0161
(3.835-4.000)
OIA
0.490-0.510
(1245-12.95)
R
4-88
~"""'-Llnlt\l2
~,
LTl083/LT1084/LTl085
TECHNOLOG~~~--7-.5-A-I-5A-,-3-A-L-o-w-D-r-op-o-u-t
Positive Adjustable Regulators
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
APPLICATions
The LT1083 series of positive adjustable regulators are designed to provide 7.SA, SA and 3A with higher efficiency
than currently available devices. All internal circuitry is designed to operate down to 1V input to output differential
and the dropout voltage is fully specified as a function of
load current. Dropout is guaranteed at a maximum of 1.SV
at maximum output current, decreasing at lower load currents. On-chip trimming adjusts the reference voltage to
1%. Current limit is also trimmed, minimizing the stress
on both the regulator and power source circuitry under
overload conditions.
•
•
•
•
The LT1083/84/8S series devices are pin compatible with
older 3terminal regulators. A 10/LF output capacitor is required on these new devices; however, this is usually included in most regulator designs.
Three Terminal Adjustable
Output Current of 3A, SA or 7.SA
Operates Down to 1V Dropout
Guaranteed Dropout Voltage at Multiple Current Levels
0.01S% Line Regulation
0.01 %Load Regulation
100% Thermal Limit Burn-In
Fixed Versions Available
High Efficiency Linear Regulators
Post Regulators for Switching Supplies
Constant Current Regulators
Battery Chargers
OUTPUT CURRENT"
DEVICE
7.5 Amps
lT10B3
LT10B4
5.0 Amps
3.0 Amps
lT10B5
"For a 1.5A low dropout regulator see the LT1086 data sheet.
Unlike PNP regulators, where up to 10% of the output current is wasted as quiescent current, the LT1083 quiescent
current flows into the load, increasing efficiency.
Dropout Voltage vs
Output Current
SV, 7.SA Regulator
lT1083
1--.--........
-5V AT 7.5A
12111
1%
+ 10#'
TANTALUM
~~
T..,.
~
36511
1%
'REQUIRED FOR STABILITY
OV
o
IFULL lQADl2
IFUll LOAD
OUTPUT CURRENT (A)
4-89
LT1083/LT1084/LT1085
ABSOLUTE mAXimum RATinGS
Power Dissipation ..................... Internally Limited
Input to Output Voltage Differential
"M" Grades ...................................... 35V
"C" Grades ...................................... 30V
Operating Junction Temperature Range
"M"Grades
Control Section ................... - 55°C to 150°C
Power Transistor .................. - 55°C to 200°C
"C" Grades
Control Section ....................... OOC to 125°C
Power Transistor. ..................... OOC to 150°C
Storage Temperature ................... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec) .............. 300°C
PACKAGE/ORDER InFORmATion
ORDER
PART NUMBER
BonOMVIEW
~r
2
o
OUTPUT
0
LT1083MK LT1084CK
LT1083CK LT1085MK
LT1084MK LT1085CK
1
AIlJ
KPACKAGE
TO'3 METAL CAN
FRONT VIEW
I:
PREconDITiOninG
100% Thermal Limit Burn-In
§
:VIN
LT1083CP
LT1084CP
::T
PPACKAGE
TO'3P PLASTIC
FRONT VIEW
lol g
LT1084CT
LT1085CT
:~:UT
AIlJ
TPACKAGE
TO'220 PLASTIC
ELECTRICAL CHARACTERISTICS (See Note 1)
PARAMETER
Reference Voltage
Line Regulation
Load Regulation
Dropout Voltage
Current Limit
LT1083
LT1084
LT1085
4-90
CONDITIONS
loUT = lOrnA, Tj = 25°C,
(VIN - VOUT) = 3V (K Package Only)
lOrnA S loUT SIFULL LOAD
1.5V S(VIN - VouT)s25V (Notes 3, 5)
ILOAD= lOrnA, 1.5VS(VIN - VOUT)sI5V, Tj = 25°C
MGrade
15V S(VIN - VoUT)s35V
CGrade
15V S(VIN - Vourls30V
(Noles 1,2)
(VIN - VOUT) = 3V
lOmAs lOUTS IFULLLOAD
Tj = 25°C (Notes I, 2, 3, 5)
LWREF = 1%, lOUT = IFULL LOAD, (Notes 4, 5)
(VIN - VouT)=5V
(VIN-VOUT)=25V
(VIN - VOUT) = 5V
(VIN - VOUT) = 25V
(VIN-VOUT)=5V
(VIN - VOUT) = 25V
•
MIN
TYP
MAX
UNITS
1.238
1.250
1.262
V
1.225
1.250
0.015
0.035
1.270
0.2
0.2
%
%
0.05
0.5
%
0.05
0.5
%
0.1
0.2
1.3
0.3
0.4
1.5
%
%
•
•
•
•
•
••
••
••
8.0
0.4
5.5
0.3
3.2
0.2
9.5
1.0
6.5
0.6
4
0.5
V
V
A
A
A
A
A
A
LT1083/LT1084/LT1085
ELECTRICAL CHARACTERISTICS (See Note 1)
PARAMETER
Minimum Load Current
Thermal Regulation
LT1083
LT1084
LT1OB5
Ripple Rejection
CONDITIONS
(VIN- VOUT)= 25V
TA = 25°C, 30ms pulse
MIN
•
f=120Hz
CADJ =25~F, COUT = 25~FTantalum
lour =IFULLLOAD, (VIN - VOUT) = 3V (Note 5)
Ti =25°C
Adjust Pin Current
Adjust Pin Current Change
10mAsioUTSIFUllLOAD
1.5V S(VIN - Your) S25V (Note 5)
Temperature Stability
Long Term Stability
RMS Output Noise (% of VOUT)
TA = 125°C, 1000 Hrs.
TA=25°C
10Hz= sfs10kHz
Thermal Resistance
Junction to Case
LT1083
•
•
•
•
10
0.002
0.003
0.004
0.01
0.015
0.02
LT1085
UNITS
rnA
75
55
60
0.2
0.5
0.3
~
~A
5
~
1
%
%
0.003
The • denotes the specifications which apply over the full operating
temperature range.
Notet See thermal regulation specifications for changes in output voltage due to heating effects. Load and line regulation are measured at a constant junction temperature by low duty cycle pulse testing.
Note 2: Line and load regulation are guaranteed up to the maximum power
dissipation (SOW for the LT1083, 45W for the LT1084 (K, p), 30W forthe
LT1084 (T) and 30W for the LT1085). Power dissipation is determined by the
input/output differential and the output current. Guaranteed maximum
power dissipation will not be available over the full input/output voltage
range.
%rN
%rN
%IW
dB
120
K Package: Control Circuitry/Power Transistor
PPackage: Control Circuitry/Power Transistor
K Package: Control Circuitry/Power Transistor
PPackage: Control Circuitry/Power Transistor
T Package: Control Circuitry/Power Transistor
K Package: Control Circuitry/Power Transistor
T Package: Control Circuitry/Power Transistor
LT1084
MAX
TYP
5
%
0.6/1.6
0.5/1.6
0.75/2.3
0.65/2.3
0.65/2.7
0.9/3.0
0.7/3.0
°CIW
°CIW
°CIW
°CrN
°CrN
°CrN
°CrN
Note 3: IFULllOAD is defined in the current limit curves. The IFUlllOAD curve
is defined as the minimum value of current limit as funcfion of input to
output voltage. Note that the 60W power dissipation for the LT1083 (45W for
the LT1084 (K, p), 30W forthe LT1084(T), 30W for the LT1OB5) is only achievable over a limited range of input to outputyoltage.
Note 4: Dropout voltage is specified over the full output current range of
the device. Test pOints and limits are shown on the Dropout Voltage curve.
NoteS: For LT1083IFulllOAD is 5A for - 55°CsTi < -40°C and 7.5A for
TJ~ -40°C.
a
TYPICAL PERFORmAnCE CHARACTERISTICS
LT1083 Dropout Voltage
LT1083 Load Regulation
LT1083 Short Circuit Current
0.10
• INDICATES GUARANTEED TEST POINT
-40"C sTF" 150"C
0"CsT,s125"C
--
61l7.5A
'" 0.05
I\. -~
t:s:: F::::: P'"
i= ~
is
~
~
~
~-0.05
l),. f('
I-
TJ=150"C
\Tj=25"C
T,= -55"C
i3o
;: -0.10
~
-
t-- r-
~
5-0.15
o
o 1 2 3 4 5 6 7
OUTPUT CURRENT (A)
8
9
10
5 10 15 20 25 30
INPUT/OUTPUT DIFFERENTIAL (V)
35
-0.20
-50 -25 0
25 50 75 100 125 150
TEMPERATURE ("C)
4-91
LT10831LT1084/LT1085
TYPICAL PERFORmAnCE CHARACTERISTICS
LT1084 Short Circuit CUlT8nt
LT1084 Dropout Voltage
LT1084 Load Regulation
10
0.10
• INDICATES GUARANTEED TEST POINT
.:1ll5A
~ 0.05
-55°C:5Tjsl50°C
_OlCSTI~125°C
.r- r-..
~
-
:-s; 7"
........-;
~'"
\
~
13
o
;:: -0.10
~-0.15
~
I FULL LOAO
3
OUTPUT CURRENT (A)
...\
10
15
20
25
30
35
-0.20
-50 -25
0
25
50
75
0.10
~
.......
o
o
100
125 150
11=:J.
-55°C sTjs150°C
- -"
,
LT1OB5 Load Regulation
LT1085 Short Circuit Current
• INDICATES GUARANTEED TEST POINT
0°CsTjs125°C'
......
TEMPERATURE (OC)
INPUT10UTPUT DIFFERENTIAL (V)
LT10B5 Dropout Voltage
-..
\.
o
o
4
-
~-0.05
~-55°C
'\ \\'
Tj=25°C
2
!;;:
,~ ,.-25°C
Tj=-55°C
"Tj=15O°C
o
o
~
'/- ~ ~15O"C
I~~ ~ ~~
'Y.
D..- ~ ~
~ i""'"
-..i'..
Tj= -55°C
Tj=25°C
i'-..
"Tj=15O°C
1
2
3
5
OUTPUT CURRENT (A)
Minimum Operating CUlT8nt
10
15
20
25
30
INPUT10UTPUT DIFFERENTIAL (V)
35
-0.20
-50 -25
Temperature Stability
10
1.270
0
25 50 75 100
TEMPERATURE (OC)
~
125 150
Adjust Pin Current
r---.-,.----.---,,--"T'"'--;--.---.
100
90
~ 1.260
1--+-1--1----11----+---+--+---+
~
~
0
~ "l'
Tj=150°C,
-'"-
.>V. . . . "/
Tj=25°C
-'!..
o
o
4-92
1.250
1,..-o"'1=::=:=ji'-4--+-+-,"",,=i==~
~
~
cr
70
60
..- i""'"
:::>
'-' 50
:z
0::
m
cr 1.240 1---J----1I----+---+-_+_-t-+_---1
"/
~
:::>
a
""
40
.......
V
v
",.
30
20
10
Tj=-55°C
5
10
15
20
25
30
INPUT10UTPUT DIFFERENTIAL (V)
~
'-'
_80
35
1.230 L-~---JL-...J....._.l_..l.---l_..l--'
-50 -25 0
25 50 75 100 125 150
TEMPERATURE (OC)
o
-50 -25
0
25 50 75 100 125
TEMPERATURE (OC)
150
LT1083/LT1084/LT1085
TYPICAL PERFORmAnCE CHARACTERISTICS
LT1OB3 Ripple Rejection
100
90
90
80
80
iii 70
iii 70
:s
:s
~ 60
fa 50
'2
z
Ul
a:
w
it;r
LT1083 Maximum Power Dissipation"
LT1083 Ripple Rejection vs Current
100
z
60
t.l
Ul
50
'"
40
~
;r
30
100
90
fR 120Hz
80
VRIPPLE '" 3Vp-p
fR=20kHz
--
70
.........,v RIPPlE ",0.5 vp-p
~
.......... t.....
40
30
20
10
VOUT=5V
CAOJ= 25pF
10
Cour 25(
10
o
lOOk
~
o
2
\.
I........
i'-
30
20
lk
10k
FREQUENCY (Hz)
~
40
20
100
LT1083MK
~ 60
ffi 50
T08iCK
o
3
4
5
6
OUTPUT CURRENT (A)
1\
.......L~3CP
I--
"
~
\
1\
50 60 70 80 90 100 110 120 130 140 150
CASE TEMPERATURE (OC)
, AS LIMITED f!I MAXIMUM JUNCTION TEMPERATURE
LT1OB4 Ripple Rejection vs Current
LT1084 Ripple Rejection
100
100
90
90
80
80
z
it
;r
~
60
40
~
;r
30
20
10
100
lk
10k
FREQUENCY (Hz)
lOOk
30
CADJ= 25pF
I- COUT= 25pF
90
80
90
1-
2
O'---'--'----'--'---'__.l.-..!...l"-'--"---'
50 90 70 80 90 100 110 120 130 140 150
3
CASE TEMPERATURE (OC)
'AS LIMITED BY MAXIMUM JUNCTION TEMPERATURE
I
0
~
a:
40
~
;r 30
20
10
10
o
lOOk
VRiPPlE",0.5 vp-p
r---
40
20
10k
lk
FREQUENCY (Hz)
fR=20kHz
50
;r 30
fR 120Hz
40
VRIPPLE",3Vp-p
:s
~
LT1OB5 Maximum Power Dissipation"
50
iii 70
z
0
60
iii 70
z
:s
!\.-
~... LT1084Cr \ - -
10 ~-+--I-+-f---+--\f\--t-~H\
LT1 OB5 Ripple Rejection vs Current
90
""
LT1084CK;'I~
I- Vour=5V
10
100
100
LT1084~ l
I-
20
LT1OB5 Ripple Rejection
~ ....... ~
30
20
OUTPUT CURRENT (A)
100
~
I
t-....
r
40
o
o
0
Ul
a:
-
fR-20kHz
fa 50 - VRIPPlE",0.5Vp-p
Ul
a:
-
VRIPPLE < 3Vp-p
:s
z
'2
60
§
~ 50
a:
w
fR=120~Z-
iii 70
iii 70
:s
0
LT1084 Maximum Power Dissipation"
r-~'--r~~--r-~-r~~
90
-
LJl085MK
........
VOUT=5V
CADJ=25pF
COUT=25pF
10
J
o
0.5
o
1.0
1.5
2.0
OUTPUT CURRENT (A)
2.5
3.0
r--.. ~
........
I"--
~
r--.. ~5Cr\
LJl085C~1
\
50 60 70 80 90 100 110 120 130 140 150
CASE TEMPERATURE (OC)
'AS LIMITED f!I MAXIMUM JUNCTION TEMPERATURE
4-93
LT1083/LT1084/LT1085
TYPICAL PERFORmAnCE CHARACTERISTICS
LT1083 Load Transient Response
~
0.4
~
0.2
0
I;;:
~
J
rl
CIN=l~
COUT= 10~ TANITAL~M - I--I--
- -
-0.4
, 'Vou;=lOV
VIN=l3V
6
4
\ I
2
o
o
100
50
TlME(,..)
5:
6
1li
4
a
~
2
t-
l tRE~OAOt'r'"
<>
~
l2
100
50
~~
a
o ~
-50
=>1;;:
-
'7;tADJ=O
~
t-z
14
~!cc
~
o
12
~Q
13
' - - I--
CIN=l~F
r--COUT=10~ TANTAL~M
-
i
a:
50
TIME (PS)
100
a
~
I
100
TIME(,..)
~~
13
z'< 12
-~
200
V
,I
I
I\ ~o~=lOV
I
2
I
1
\ VIN=13V
"PR~OAO [lor"
0
100
50
TIME (PS)
0
,
ii:!§
§~
P
CAIlJ=O
~J
0
i;i-20
CAIlJI=lJ-
IV
II
-40
VOUT=10V
IOUT=O.2A
-60
CIN=l~FTANTALUM
COUT= lO~F TANTA~UM
1
100
TIME (PS)
-
t-! 20
1\
-40
~ 14
V-
I
CIN=l~
- I-- f-COUT= 10~ TANTALUM
I I
3
40
1
-60
~
LT1085 Line Transient Response
c~=o
- PAW=l~F
VOUT=10V
IOUT=O.2A
CIN=l~ TANTALUM
COUT=10~ TANTALUM
rJ
60
AI
rlf
./1
0
-0.3
5:
\l'RELfAD ,1001mA
II
0.1
-0.2
I--
CADJ=l~
CADJ=O-
~~-O.l
~OUT'-10V
VIN=13V
\
II
I-
0 _ 100
-150
~~
I
0.2
LT1084 Line Transient Response
1\,
~
~~
'-'z
o
0
II
A
... J
1I
60
CA~=l~F_ l if
l -I -
vc~=ll~
~
r"!
0
LT1083 Line Transient Response
150
t-~
LT108S Load Transient Response
0.3
CADJ=oA
-0.4
-0.6
5:
§
I
w
0.4
"'~;0' '. I - >2 0.2
l/F=l~F
t- t;:
0
~Cfi
r'1
50-0.2
o
CAW=O -
c -0.2
~
LT1084 Load li'ansient Response
0.6
0.6
~ 14
~~
zl;;:
-~
200
13
Vour=lOV
10UT=0.2A
CIN=l~TANTALUM
Cour=10~F TANTALUM
l
12
100
200
TIME (PS)
APPLICATion HinTS
The LT1083 family of three terminal adjustable regulators
is easy to use and has all the protection features that are
expected in high performance voltage regulators. They are
short circuit protected, have safe area protection as well
as thermal shutdown to turn off the regulator should the
temperature exceed about 165°C.
These regulators are pin compatible with older three
terminal adjustable devices, offer lower dropout voltage
and more precise reference tolerance. Further, the refer·
ence stability with temperature is improved over older
types of regulators. The only circuit difference between
using the LT1083 family and older regulators is that they
require an output capacitor for stability.
4-94
Stability
The circuit design used in the LT1083 family requires the
use of an output capacitor as part of the device frequency
compensation. For all operating conditions, the addition
of 150I'F aluminum electrolytic or a22l'F solid tantalum on
the output will ensure stability. Normally, capacitors
much smaller than this can be used with the LT1083. Many
different types of capacitors with widely varying charac·
teristics are available. These capacitors differ in capacitor
tolerance (sometimes ranging up to ± 100%), equivalent
series resistance, and capacitance temperature coeffi·
cient. The 150I'F or 22l'F values given will ensure stability.
LT1083/LT1084/LT1085
APPLICATion HinTS
When the adjustment terminal is bypassed to improve the
ripple rejection, the requirement for an output capacitor
increases. The values of 22fLF tantalum or 150fLF aluminum
cover all cases of bypassing the adjustment terminal.
Without bypassing the adjustment terminal, smaller
capacitors can be used with equally good results and the
table below shows approximately what size capacitors are
needed to ensure stability.
Recommended Capacitor Values
Input
Output
10~F Tantalum, 50~F Aluminum
22~FTantalum, 150~F Aluminum
I
I
Adjustment
None
20~F
I
I
Normally, capacitor values on the order of 100fLF are used
in the output of many regulators to ensure good transient
response with heavy load current changes. Output capacitance can be increased without limit and larger values of
output capacitor further improve stability and transient response of the LT1083 regulators.
Another possible stability problem that can occur in
monolithic Ie regulators is current limit oscillations.
These can occur because, in current limit, the safe area
protection exhibits a negative impedance. The safe area
protection decreases the current limit as the input·to·
output voltage increases. That is the equivalent of having
a negative resistance since increasing voltage causes cur·
rent to decrease. Negative resistance during current limit
is not unique to the LT1083 series and has been present on
all power Ie regulators. The value of the negative reo
sistance is a function of how fast the current limit is
folded back as input·to-output voltage increases. This
negative resistance can react with capacitors or inductors
on the input to cause oscillation during current limiting.
Depending on the value of series resistance, the overall
circuitry may end up unstable. Since this is asystem prob·
lem, it is not necessarily easy to solve; however it does not
cause any problems with the Ie regulator and can usually
be ignored.
protection diodes between the adjustment pin and the out·
put and from the output to the input to prevent overstress·
ing the die. The internal current paths on the LT1083
adjustment pin are limited by internal resistors. Therefore,
even with capacitors on the adjustment pin, no protection
diode is needed to ensure device safety under short circuit
conditions.
Diodes between input and output are usually not needed.
The internal diode between the input and the output pins
of the LT1083 family can handle microsecond surge cur·
rents of 50A to 100A. Even with large output capacitances,
it is very difficult to get those values of surge currents in
normal operations. Only with high value of output capaci·
tors, such as 1000fLF to 5000fLF and with the input pin in·
stantaneously shorted to ground, can damage occur. A
crowbar circuit at the input of the LT1083 can generate
those kinds of currents, and adiode from output to input is
then recommended. Normal power supply cycling or even
plugging and unplugging in the system will not generate
current large enough to do any damage.
The adjustment pin can be driven on a transient basis
± 25V, with respect to the output without any device
degradation. Of course, as with any Ie regulator, exceeding the maximum input to output voltage differential
causes the internal transistors to break down and none of
the protection circuitry is functional.
01
1N4002
(OPTIONAL)
LT1083
OUT.....--.....----VOUT
1
+ COUT
150"F
R2
Overload Recovery
Protection Diodes
In normal operation, the LT1083 family does not need any
protection diodes. Older adjustable regulators required
Like any of the Ie power regulators, the LT1083 has safe
area protection. The safe area protection decreases the
current limit as input·to·output voltage increases and
4-95
LT1083/LT1084/LT1085
APPLICATion HinTS
keeps the power transistor inside a safe operating region
for all values of input-to-output voltage. The LT1083 protection is designed to provide some output current at all values of input-to-output voltage up to the device breakdown.
When power is first turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During the start-up, as the input
voltage is rising, the input-to-output voltage differential
remains small, allowing the regulator to supply large output currents. With high input voltage, a problem can occur
wherein removal of an output short will not allow the output voltage to recover. Older regulators, such as the 7800
series, also exhibited this phenomenon, so it is not unique
to the LT1083.
The problem occurs with a heavy output load when the input voltage is high and the output voltage is low, such as
immediately after a removal of a short. The load line for
such a load may intersect the output current curve at two
pOints. If this happens, there are two stable output operating points for the regulator. With this double intersection,
the power supply may need to be cycled down to zero and
brought up again to make the output recover.
Ripple Rejection
The typical curves for ripple rejection reflect values for a
bypassed adjustment pin. This curve will be true for all values of output voltage. For proper bypassing, and ripple
rejection approaching the values shown, the impedance of
the adjust pin capacitor, at the ripple frequency should
equal the value of R1, (normally 1001l-1201l). The size of the
required adjust pin capacitor is a function of the input ripple frequency. At 120Hz the adjust pin capacitor should be
131'F if R1 1000. At 10kHz only O.161'F is needed.
=
For circuits without an adjust pin bypass capacitor, the
ripple rejection will be a function of output voltage. The
output ripple will increase directly as a ratio of the output
voltage to the reference voltage (VouTIVREF). For example,
with the output voltage equal to 5V, and no adjust pin
capacitor, the output ripple will be higher by the ratio of
5V/1.25V or 4 times larger. Ripple rejection will be degraded by 12dB from the value shown on the typical curve.
4-96
Output Voltage
The LT1083 develops a 1.25V reference voltage between
the output and the adjust terminal (see Figure 1). By placing aresistor, R1, between these two terminals, aconstant
current is caused to flow through R1 and down through R2
to set the overall output voltage. Normally this current is
the specified minimum load current of 10mA. Because
IADJ is very small and constant when compared with the
current through R1, it represents a small error and can
usually be ignored.
OUT~-+-VOUT
T
~~L:--""""
VOUT=VREF (1 +"*) +IADJ R2
-:r R2
Figure 1. Basic Adjustable Regulator
Load Regulation
Because the LT1083 is a three-terminal device, it is not
possible to provide true remote load sensing. Load regulation will be limited by the resistance of the wire connecting the regulator to the load. The data sheet specification
for load regulation is measured at the bottom of the package. Negative side sensing is a true Kelvin connection,
with the bottom of the output divider returned to the negatived side of the load. Although it may not be immediately
obvious, best load regulation is obtained when the top of
the resistor divider, (R1), is connected directly to the case
not to the load. This is illustrated in Figure 2. If R1 were
connected to the load, the effective resistance between
the regulator and the load would be
Rp x(R2 :1 R" Rp =Parasitic Line Resistance.
Connected as shown, Rp is not multiplied by the divider ratio. Rp is about O.0041l per foot using 16 gauge wire. This
translates to 4mV/ft at 1A load current, so it is important to
keep the positive lead between regulator and load as short
as possible, and use large wire or PC board traces.
LT1083/LT1084/LT1085
APPLICATion HinTS
Rp
PARASITIC
LINE RESISTANCE
R2
CONNECT R2
TO LOAO
Figure 2. Connections for Best Load Regulation
Thermal Considerations
The LT1083 series of regulators have internal power and
thermal limiting circuitry designed to protect the device
under overload conditions. For continuous normal load
conditions however, maximum junction temperature rat·
ings must not be exceeded. It is important to give careful
consideration to all sources of thermal resistance from
junction to ambient. This includes junction to case, case
to heat sink interface, and heat sink resistance itself. New
thermal resistance specifications have been developed to
more accurately reflect device temperature and ensure
safe operating temperatures. The data section for these
new regulators provides a separate thermal resistance
and maximum junction temperature for both the Control
Section and the Power Transistor. Previous regulators,
with a single junction to case thermal resistance speci·
fication, used an average of the two values provided here
and therefore could allow excessive junction tempera·
tures under certain conditions of ambient temperature
and heat sink resistance. To avoid this possibility, calcula·
tions should be made for both sections to ensure that both
thermal limits are met.
Junction·to·case thermal resistance is specified from the
IC junction to the bottom of the case directly below the
die. This is the lowest resistance path for heat flow. Proper
mounting is required to ensure the best possible thermal
flow from this area of the package to the heat sink. Ther·
mal compound at the case·to·heat·sink interface is
strongly recommended. If the case of the device must be
electrically isolated, athermally conductive spacer can be
used, as long as its added contribution to thermal reo
sistance is considered. Note that the case of all devices in
this series is electrically connected to the output.
For example, using a LT1083CK (TO·3, Commercial) and
assuming:
VIN (max continuous) = 9V, VOUT = SV, lOUT = 6A,
TAMBIENT= 7Soc, DHEATSINK = 1°CIW,
DCASE·TO·HEAT-SINK =O.2°CIW for Kpackage with
thermal compound.
III
Power dissipation under these conditions is equal to:
Po = (YIN - VOUT) (lOUT) = 24W
Junction temperature will be equal to:
Tj = TAMBIENT +Po (DHEAT-SINK +
DCASE-TO-HEAT·SINK +Dje)
For the Control Section:
Tj = 7SoC +24W (1 °CIW +O.2°CIW +O.6°CIW) = 118°C
118°C <12SoC =Tjmax (Control Section
Commercial Range)
For the Power Transistor:
Tj = 7SoC +24W WCIW +O.2°CIW +1.6°CIW) = 142°C
142°C <1S0oC =Tjmax (Power Transistor
Commercial Range)
In both cases the junction temperature is below the maximum rating for the respective sections, ensuring reliable
operation.
4-97
LT1083/LT1084/LT1085
TYPICAL APPLICATions
Paralleling Regulators
Improving Ripple Rejection
V,N
VOUT=1.25
(1+~)
IOUT=OA TO 15A
'THE #18 WIRE ACTS
AS BALLAST RESISTANCE
INSURING CURRENT SHARING
BETWEEN 80TH DEVICES.
'C1 IMPROVES RIPPLE REJECTION. Xc SHOULD
8E ~R1 AT RIPPLE FREQUENCY.
7.5A Variable Regulator
T1
TRIAD
F-269U
L
C30B
1MH
r -......--I~-......--~~.....J'VV"V'~~---.....-IjN
20
T2
.3
0IJT1--.--.-...._--1""""~~5~A
AIlJ
+ C1
1N4003
lT1083
150·000W
+
-+_.....
750
L-_ _ _
• ....1.5k
l100~F
20
C30B
1N4oo3
.1
1N914
20k
OUTPUT
ADJUST
1N4003
16k'
+15V
LT1004-1.2
2.7k
16k"
B2k
-15V
10k
1N4148
'1 % FILM RESISTOR
L-DALE TO-5 TYPE
T2-STANCOR 11Z-2003
+15V
-15V
15V
GENERAL PURPOSE REGULATOR WITH SCR PREREGULATOR TO LOWER POWER
DISSIPATION. ABOUT 1.7V DIFFERENTIAL IS MAINTAINED ACROSS THE LT10B3
INDEPENDENT OF OUTPUT VOLTAGE AND LOAD CURRENT.
4-98
11k"
....
LT1083/LT1084/LT1085
TYPICAL APPLICATions
High EHiciency Regulator
,....-----.
1mH
2BV
INPUT
I-___ 'OUTPUT
10k
Remote Sensing
Rp
(MAX OROP 300mV)
V,N
12m
3650
RETURN
RETURN ~"""--------~"""-----"':;:;:"""---'
1.2V-15V Adjustable Regulator
5V Regulator with Shutdown
5V
V,N
1210
1%
100""
TTL
3650
1%
"NEEDED IF DEVICE IS FAR FROM FILTER CAPACITORS
tVOUT=1.25V (1
+~)
Protected High Current Lamp Driver
Automatic Light Control
t-~~-15V
TTL OR
CMOS
4-99
LT1083/LT1084/LT1085
PACKAGE DESCRIPTions
Dimensions in inches (millimeters) unless otherwise noted.
KPackage
TO·3 Metal Can
..lJ1.?.=..l.m
(2990-3(40)
~31::::;
I TYP
~II'M'
(424-449)
0495-0525
~
PPackage
TO·3P Plastic
TPackage
TO·220 Plastic
f---+~
LI----l
(4826-5334)
lS"TVP
-\
'L---\
0660-0880
'F-~o
rh=====;o355-0 371'l
~
1020",0015
{2590B",0381}
-i-I __
0540*0040
(13716",1016)
0180-0820
JItoo"."..
--l t--(081301o0.127)
0100",0010
"1:t.1
(5060)
BSC
4-100
0050
(1~~O)
0010-0090
~}
0110-0130
(2794-3302)
~
~-I~
(0330- 06351--1
0090-0125
(2286-3175)
L.7Lln U,
FAD
LT1083/4/S-5
LT1083/4/S-12
-~v- - - TECHNOl.JOG
IT
3A, SA, 7.SA Low Dropout
Positive Fixed Regulators
FEATURES
DESCRIPTiOn
•
•
•
•
•
•
•
•
APPLICATions
The LT1083 series of positive fixed regulators are designed
to provide 3A, SA and 7.SA with higher efficiency than currently available devices. A" internal circuitry is designed
to operate down to 1V input to output differential and the
dropout voltage is fully specified as afunction of load current. Dropout is guaranteed at amaximum of l.SV at maximum output current, decreasing at lower load currents.
On-chip trimming adjusts the output voltage to 1%. Current limit is also trimmed, minimizing the stress on both
the regulator and power source circuitry under overload
conditions.
•
•
•
•
The LT1083 series devices are pin compatible with older 3
terminal regulators. A10l'F output capacitor is required on
these new devices; however, this is usually included in . , .
most regulator designs.
..
Three Terminal Fixed SV and 12V
Output Current of 3A, SA or 7.SA
Operates Down to 1V Dropout
Guaranteed Dropout Voltage at Multiple Current Levels
0.01S% Line Regulation
0.1 %Load Regulation
100% Thermal Limit Burn·ln
Adjustable Versions Available
High Efficiency Linear Regulators
Post Regulators for Switching Supplies
Constant Current Regulators
Battery Chargers
DEVICE
OUTPUT CURRENT"
LT1083
7.5 Amps
LT1084
5.0 Amps
LT1085
3.0 Amps
"For a 1.5A low dropout regulator see the LT1086 data sheet.
Unlike PNP regulators, where up to 10% of the output current is wasted as quiescent current, the LT1083 quiescent
current flows into the load, increasing efficiency.
Dropout Voltage YS
Output Current
3A, SA, 7.SA Regulator
2V
--
~
'REQUIRED FOR STABIlITY
OV
o
I FULL LOAoI2
I FULL LOAD
OUTPUT CURRENT (A)
4-101
LT1083/4/5-5
LT1083/ 4/5-12
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Power Dissipation ..................... Internally Limited
Input Voltage (Note 1) ............................... 30V
Operating Input Voltage
5V Devices ...•................................. 20V
12V Devices ..........••........................ 25V
Operating Junction Temperature Range
"M" Grades
Control Section ................... - 55°C to 150°C
Power Transistor .................. - 55°C to 200°C
"C" Grades
Control Section ....................•.. O°C to 125°C
Power Transistor...................... OOC to 150°C
Storage Temperature ................... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec) .............. 300°C
Note 1: Although the devices maximum operating voltage is limited, (20V
for a 5V device, and 25V for a 12V device) the devices are guaranteed to
withstand transient input voltages up to 30V. For input voltages greater
than the maximum operating input voltage some degradation of specifica·
tions will occur. For input/output voltage differentials greater than ISV, a
minimum external load of SmA is required to maintain regulation.
ORDER
PART NUMBER
LT1083MK·5
LT1083MK·12
LT1083CK·5
LT1083CK·12
LT1084MK·5
LT1084MK·12
LT1084CK·5
LT1084CK·12
LT1085MK·5
LT1085MK·12
LT1085CK·5
LT1085CK·12
gr
BOnOM VIEW
2
o
OUTPUT
0
1
GND
KPACKAGE
HEAD TO-3 METAL CAN
FRONT VIEW
[ ~
:::~
GND
PPACKAGE
3-LEAD TO-3P PLASTIC
FRONT VIEW
PREconDITiOninG
100% Thermal Limit Burn·ln
lol §
:~i~
TPACKAGE
3-LEAD TO-220 PLASTIC
LT1083Cp·5
LT1083Cp·12
LT1084CP·5
LT1084Cp·12
LT1084CT·5
LT1084CT·12
LT1085CT·5
LT1085CT·12
ELECTRICAL CHARACTERISTICS
PARAMETER
Output Voltage
LT108314/5-5
LTl 0831415-12
Line Regulation
LTt083/415-5
LT10831415-12
4-102
CONDITIONS
lOUT = OmA, TI = 25°C, VIN = BV (K Package Only)
Os lOUT SIFULL LOAD, 6.5V SVIN s20V (Notes 3, 5)
10UT=OmA, lj = 25°C, VIN= 15V (K Package Only)
OsioUTs IFULL LOAD 13.5V sV IN s25V (Notes 3, 5)
lOUT = OmA, Tj = 25°C, 6.5V s VIN s 20V (Notes 1, 2)
lOUT = OmA, Tj = 25°C, 13.5V SVIN s25V (Notes 1,2)
•
•
•
•
MIN
TYP
MAX
4.950
4.900
11.880
11.760
5.000
5.000
12.000
12.000
5.050
S.100
12.120
12.240
O.S
1.0
1.0
2.0
10
10
25
25
UNITS
V
V
V
V
mV
mV
mV
mV
LT1083/4/5-5
LT1083/4/5-12
ELECTRICAL CHARACTERISTICS
PARAMETER
Load Regulation
LT1083/415-5
LT1083J4I5-12
Dropout Voltage (VIN - VOUT)
LT1083J415-5
LT1083J4I5·12
Current Limit
LT1083-5
LT1083-12
LT1084-5
LT1084-12
LT1085-5
LT1085·12
Quiescent Current
LT1083J4I5-5
LT1083/415·12
Thermal Regulation
LT1083-5/12
LT1084-5/12
LT1085-5/12
Ripple Rejection
LT1083J4I5-5
LT1083J4/5-12
Temperature Stability
Long Term Stability
RMS Output Noise (% of VOUT)
Thermal Resistance
Junction to Case
LT1083
LT1084
LT1085
CONDITIONS
MIN
V1N = 8V, OSIOUTSIFULLLOAD,
Tj = 25°C (Notes 1, 2, 3, 5)
V1N = 15V, OSIOUTS IFULL LOAD,
TI = 25°C (Notes 1, 2, 3, 5)
aVouT=50mV, lOUT = IFULL LOAD (Notes 4, 5)
aVOUT= 120mV, lOUT = IFULL LOAD (Notes 4, 5)
V1N =10V
V1N =17V
V1N =10V
V1N =17V
V1N =10V
V1N =17V
•
•
•
•
•
•
•
••
V1NS20V
V1N s25V
TA = 25°C, 30ms pulse
f = 120Hz, COUT = 25~F Tantalum
IOUT=IFuLLLOAD
V1N = 8V (Note 5)
V1N = 15V (Note 5)
••
•
TA = 125°C, 1000 Hrs.
TA=25°C
10Hz= sfsl0kHz
8.0
8.0
5.5
5.5
3.2
3.2
SO
54
MAX
5
10
20
35
mV
mV
12
24
36
72
mV
mV
1.3
1.3
1.5
1.5
V
V
UNITS
9.5
9.5
6.5
6.5
4.0
4.0
A
A
A
A
A
A
5.0
5.0
10.0
10.0
rnA
rnA
0.002
0.003
0.004
0.01
0.Q15
0.02
%IW
68
SO
0.5
0.03
1.0
0.003
KPackage: Control Circuitry/Power Transistor
PPackage: Control Circuitry/Power Transistor
KPackage: Control Circuitry/Power Transistor
PPackage: Control Circuitry/Power Transistor
T Package: Control Circuitry/Power Transistor
KPackage: Control Circuitry/PowerTransistor
T Package: Control Circuitry/Power Transistor
The. denotes the specifications which apply over the full operating
temperature range.
Note 1: See thermal regulation specifications for changes in output volt·
age due to heating effects. Load and line regulation are measured at acon·
stant junction temperature by low duty cycle pulse testing.
Note 2: Line and load regulation are guaranteed up to the maximum power
dissipation (SOW for the LT1083, 45W for the LT1084 (K, p), 30W for the
LT1084 (T) and 30W for the LT1085). Power dissipation is determined by the
input/output differential and the output current. Guaranteed maximum
power dissipation will not be available over the fullinputloutput voltage
range.
•
•
•
TYP
'Io1W
'Io1W
dB
dB
%
%
%
0.6/1.6
0.511.6
0.7512.3
0.6512.3
0.6512.7
0.913.0
0.7/3.0
°CIW
°CIW
°CIW
°CIW
°CIW
°CIW
°CIW
Note 3: IFULLLOAD is defined in the current limit curves. The IFULL LOAD curve
is defined as the minimum value of current limit as a function of input to
output voltage. Note that the SOW power dissipation for the LT1083 (45W for
~LT1084~~3OWb~~84m3OWb~LT1~~_~~
able over a limited range of input to output voltage.
Note 4: Dropout voltage is specified over the full output current range of
the device. Test points and limits are shown on the Dropout Voltage curve.
Note5: ForLT1083 IFULLLOAD is 5A for -55°CsTI< -40°C and 7.5A for
Ti~ -40°C.
4-103
LT1083/4/5-5
LT1083/4/5-12
TYPICAL PERFORmAnCE CHARACTERISTICS
LT1083 Dropout Voltage
LT1OS3 Short Circuit Current
LT1083 Load Regulation
0.10
""1~7.5A
• INDICATES GUARANTEED TEST POINT
-40'C sTF,,150'C
9'CsTJs125'C
F
~"" ~
100-
z
2
~
P'
-~
).. ~
f-
'\..
~ 0.05
!;;c
~
--
tlj-0.05
Tj=150'C
~
r-
~-010
\TJ=25'C
~
TJ= -55'C
-....
0-0.15
o
o
1
3 4 5 6 7
OUTPUT CURRENT (A)
2
8
9
10
5
10
15
20
25
30
INPUT {OUTPUT DIFFERENTIAL (V)
LT1084 Dropout Voltage
-0.20
-50 -25
35
0
25 50 75 100
TEMPERATURE ('C)
0.10
• INDICATES GUARANTEED TEST POINT
~
fil
Ii:
o
"Tj=150'C
iJi
o
t:;;
~
~ ,.- 25~C
5
4
tlj-0.05
'\ ~-55'C
2
~-O.10
\.
10
15
20
25
30
-0.20
-50 -25
35
:..~ r- ~
V
o
o
4-104
""
1
'\.
-:::- ~
"TJ=150'C
2
3
OUTPUT CURRENT (A)
125 150
11=a1
~
I
5
100
~ 0.05
:5:
'-'
TJ= -55'C
75
0.10
~
~
:::>
TI=25'C
50
LT10SS Load Regulation
LT1 OSS Short Circuit Current
-55'CsTj s150'C
~~
25
TEMPERATURE ('C)
• INDICATES GUARANTEED TEST POINT
~
..... ~
~
0-0.15
INPUT {OUTPUT DIFFERENTIAL (V)
LT108S Dropout Voltage
0'CsTjs125'C
-.... .......
f'!i
'\. W
J
I FULL LOAD A
3
o
o
2
3
4
OUTPUT CURRENT (A)
z
t/- ""'
~ ~150'C
",-
'-'
'-'
Tj=25'C
o
o
150
LT1084 Load Regulation
LT1084 Short Circuit Current
10
f--'
125
3 ~-+-~~~-+-+-f---1
~
u
Ii:
o
--
::;::-0.05
'"
f'!;
g-O.10
~
"'"
r-....
~
0-0.15
5
10
15
20
25
30
INPUT{OUTPUT DIFFERENTIAL (V)
35
-0.20
-50 -25
0
25 50 75 100
TEMPERATURE ('C)
r--..
125 150
LT1083/4/5-5
LT1083/4/5-12
TYPICAL PERFORmAnCE CHARACTERISTICS
LT108314J5·5 Ripple Rejection
vs Current
LT1083/415·5 Ripple Rejection
BO
70
60
iil
;- 50
Ul
30
a:
20
70
0
60
VjlPPLE ,,3YP-P
60
fR-20kHz
~
~
40
Ul
'"
40
a:
30
~
I
VRIPPLE,,0.5Vp-p
-
ii
:;:; 1.0
'"
~
0
i:§
~
............
11111111
10
.......
~
!;;-1.0
o
100
III
o
lk
10k
FREOUENCY (Hz)
o
lOOk
02
0.4
0.6
O.B
OUTPUT CURRENT (0 TO IFULL LOAD)
10
-2.0
-50 -25
LT1 08314/5·12 Ripple Rejection
vs Current
LT10831415·12 Ripple Rejection
90
1:
BO
BO
100
60~hK~~~~-r~~~~m
!
50
1-""11-J:.1o'f'lHfl'-t~oIHIf'..P
§
40
~hK+t!HIrl+tl~-.3k:HId.~~m
~
i--
10
o
o
-
I---
t!i
20
lOUT =! F.P'LL LOAD
10
fR~120Hz
~
:z
(V IN - VOUT) '" VDROPOUT
'"
~
BO
i-
0
B
w
90
JI~~~I~I~T)W
I-
l-
Temperature Stability
2.0
100
VRIPI'LE ,,3vp-plVRIPI'LE "IO?~P-P
'"
70
0
60
~
:z
§
Ul
889)
JIt
0032."••
-ll-~
0.050
(iT7'Oj
TYP
0.100=1;0.010
~
~--II-
(0.330-0635)
---I
0090-0125
~
F A r\
L1n
L7 V \K
LT1086/LT1086-5
LT1086-12/LT1086H
TECHNOLOGY~----------1.5-A--Lo-w--D-ro-p-o-u-t
Positive Regulators
Adjustable and Fixed 5V, 12V
FEATURES
DESCRIPTiOn
•
•
•
•
•
•
•
APPLICATions
The LT1086 is designed to provide 1.5A with higher efficiency than currently available devices. All internal circuitry
is designed to operate down to 1V input to output differential and the dropout voltage is fully specified as a function
of load current. Dropout is guaranteed at a maximum of
1.5V at maximum output current, decreaSing at lower load
currents. On-chip trimming adjusts the reference/output
voltage to 1%. Current limit is also trimmed, minimizing the
stress on both the regulator and power source circuitry under overload conditions.
•
•
•
•
The m086 is pin compatible with older 3 terminal adjustable regulators. A 10fLF output capacitor is required on
these new devices; however, this is usually included in . .
most regulator designs.
..
Three Terminal Adjustable or Fixed 5V, 12V
Output Current of 1.5A, (0.5A for LT1086H)
Operates Down to 1V Dropout
Guaranteed Dropout Voltage at Multiple Current Levels
0.015% Line Regulation
0.1 %Load Regulation
100% Thermal Limit Burn-In
High Efficiency Linear Regulators
Post Regulators for Switching Supplies
Constant Current Regulators
Battery Chargers
Unlike PNP regulators, where up to 10% of the output current is wasted as quiescent current, the m086 quiescent
current flows into the load, increasing efficiency.
High Efficiency Regulator
LT1 086 Dropout Voltage
1mH
28V
INPUT
OUTPUT
• INDICATES GUARANTEED TEST POINT
~
8
~
"!ii
I-
10k
.,..
2k
OUTPUT
ADJUST
O'C';Tj';1~5;C
tt
15
t-
~
=>
0
1
I"'"'
;:::
r--
=>
c..
;;!:
1k
'"z
'">E
1
-55 c,;Tj L15o'!~
TI=~55'C
......~
-
-::
_Tj-25'C
~-Tj=150'C-
=>
........-......I\IIo/Y--28V
o
o
0,5
1
OUTPUT CURRENT (A)
1.5
4-113
LT1086/LT1086-5
LT1086-12/LT1086H
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Power Dissipation ..................... Internally Limited
Input Voltage" ...................................... 30V
Operating Input Voltage
Adj. Devices ..................................... 25V
·5V Devices ...................................... 20V
·12V Devices ..................................... 25V
Operating Junction Temperature Range
"MnGrades
Control Section ................... - 55°C to 150°C
Power Transistor .................. - 55°C to 200°C
"C"Grades
Control Section ....................... OOC to 125°C
Power Transistor...................... O°C to 150°C
Storage Temperature ................... -65°C to 150°C
Lead Temperature (Soldering, 10 sec) .............. 300°C
~r
2
o
1
OUTPUT
0
AOJ
(GROUND)"
K PACKAGE
HEAD TO-3 METAL CAN
LT1086MK LT1086CK
LT1086-5MK LT1086·5CK
LT1086·12MK LT1086·12CK
FRONT VIEW
lol 8
LT1086CT
LT1086·5CT
LT1086·12CT
:~~T
(GROUND)·
T PACKAGE
HEAD TO-220 PLASTIC
BOTTOM VIEW
•Although the devices maximum operating voltage is limited, (2OV for a·5V
device, and 25V for adjustable and ·12 devices) the devices are guaranteed
to withstand transient input voltages up to 3OV. For input voltages greater
than the maximum operating input voltage some degradataion of specifi·
cations will occur. For -5 and ·12 devices operating at input/output voltage
differentials greater than 15V, a minimum external load of 5mA is required
to maintain regulation.
PREconDITiOninG
ORDER
PART NUMBER
BOTTOM VIEW
LT1086CH
LT1086MH
~'~
AOJ
OUTPUT
(CASE)
H PACKAGE
HEAD TO-39 METAL CAN
·FOR FIXED VERSIONS
100% Thermal Limit Burn·ln
ELECTRICAL CHARACTERISTICS (See Note 1)
PARAMETER
Reference Voltage
LT1086, LT1086H
Output Voltage
LT1086-5
LT1086-12
Line Regulation
LT1086, LT1086H
CONDITIONS
lOUT = 10mA, TI = 25°C,
(VIN - VOUT) = 3V (K Package Only)
10mA s lOUT s 1.5A, (0.5A for LT1086H)
1.5VS(VIN- VouT)s15V
lOUT = OmA, TJ = 25°C
VIN = 8V (K Package Only)
Os lOUT S1.5A, 6.5V SVIN s20V
lOUT = OmA, Tj = 25°C
VIN = 15V (K Package Only)
OVsIQUTs1.5A,13.5VsVINS25V
ILOAD= 10mA, 1.5VS(VIN- VouT)s15V, lj = 25°C
LT1086-5
lOUT = OmA, Tj = 25°C, 6.5V s VIN s 20V
LT1086-12
IQUT= OmA, T) = 25°C, 13.5VsVINS25V
4-114
•
•
•
•
•
•
MIN
TYP
MAX
UNITS
1.238
1.250
1.262
V
1.225
1.250
1.270
V
4.950
4_900
5.000
5.000
5.050
5.100
V
V
11.880
11.760
12.000
12.000
12.120
12.240
V
V
0.015
0.035
0.5
1.0
1.0
2.0
0.2
0.2
10
10
25
25
%
%
mV
mV
mV
mV
LT1086/LT1086-5
LT1086-12/LT1086H
ELECTRICAL CHARACTERISTICS (See Note 1)
PARAMETER
Load Regulation
LT1086, LT1086H
CONDITIONS
MIN
(VIN - VOUT) = 3V, 1OmA s lour s 1.5A, (0.5A for LT1086H)
Tj = 25°C (Notes 1, 2)
LT1086-5
VIN=8V, Os lOUTS 1.5A, Tj = 25°C (Notes 1, 2)
LT1Q86.12
VIN = 15V, OSIOUTS1.5A, Tj = 25°C (Notes 1, 2)
Dropout Voltage (VIN - VOUT)
LT1086
LT1086H
LT1Q86.5
LT1Q86.12
Current Limit
LT1086, LT1(J86.5, LT1()86.12
LT1086H
Minimum Load Current
LT1086, LT1086H
Quiescent Current
LT1Q86.5
LT1(J86.12
Thermal Regulation
Ripple Rejection
LT1086, LT1086H
LT10SS-5
LT1086·12
Adjust Pin Current
LT10SS, LT1086H
Adjust Pin Current Change
LT10SS, LT1086H
Temperature Stability
Long Term Stability
RMS Output Noise (% of VOUT)
Thermal Resistance
Junction to Case
aVREF= 1%, lOUT = 1.5A (Note 3)
aVREF = 1%, lOUT = 0.5A (Note 3)
aVOUT=50mV, lOUT = 1.5A (Note 3)
aVouT= 12OmV, lour = 1.5A (Note 3)
(VIN - VOUT) = 5V
(VIN- VOUT)= 25V
(VIN - VOUT) = 5V
(VIN - VOUT) = 2.5V
•
•
•
••
••
••
••
1.5
0.075
0.5
0.03
TVP
MAX
0.1
0.2
5
10
12
24
0.3
0.4
20
35
36
72
1.3
0.95
1.3
1.3
1.5
1.25
1.5
1.5
V
V
V
V
1.6
0.15
0.7
0.075
2.5
A
A
A
A
1.2
UNITS
%
%
mV
mV
mV
mV
(VIN - VOUT) = 25V (Note 4)
•
5
10
mA
VINs20V
VINs25V
TA = 25°C, 30ms Pulse
••
5
5
0.008
10
10
0.04
mA
mA
%IW
f = 120Hz, COUT = 25~F Tantalum
lOUT = 1.5A, (lOUT = 0.5A for LT1086H)
CADJ = 25~F, (VIH - VOUT) = 3V
VIN=8V
VIM = 15V
•••
Tj=25°C
•
10mAsloUTs1.5A, (0.5A for LT1086H)
1.5VS(VIN- Vour)s15V
•
•
TA= 125°C, 1000 Hrs.
TA=25°C
10Hzsfsl0kHz
75
68
60
dB
dB
dB
120
~
~
5
~
55
0.2
0.5
0.3
%
1
0.003
K Package: Control Circuitry/Power Transistor
T Package: Control Circuitry/Power Transistor
HPackage: Control Circuitry/PowerTransistor
The • denotes the specifications which apply over the full operating
temperature range.
Note 1: See thermal regulation specifications for changes in output volt·
age due to heating effects. Load and line regulation are measured at acon·
stant junction temperature by low duty cycle pulse testing. Load regulation
is measured althe output lead .. 1/8' from the package.
Note 2: Line and load regulation are guaranteed up to the maximum power
dissipation of 15W for the LT1086, LT1086·5 and LT10SS·12, and 3W forthe
LT1086H. Power dissipation is determined by the input/output differential
60
60
54
%
%
1.7/4.0
1.514.0
15/20
°CIW
°CIW
°CIW
and the output current. Guaranteed maximum power dissipation will not be
available over the full input/output voltage range. See Short Circuit Current
Curve for available output current.
Note 3: Dropout voltage is specified over the full output current range of
the device. Test points and limits are shown on the Dropout Voltage curve.
Note 4: Minimum load current is defined as the minimum output current reo
quired to maintain regulation. At 25V input/output differential the device is
guaranteed to regulate if the output current is greater than 10mA.
4-115
LT1086/LT1086-5
LT1086-12/LT1086H
TYPICAL PERFORmAnCE CHARACTERISTICS
LT1086 Short Circuit Current
2.5 .---__r----r--,---,----,----,
g
2
~
!5
1.5
10
t::
~
0.10
~ 0.05
fi
-
~
~-0.05
:::l
>-010
@§
:I:
en 0.5
fi--\--\--tr..-\--f_----l
30
5
10
15
20
25
INPUT 10UTPUT DIFFERENTIAL (V)
~
~
-... ......
~
1
<>
Minimum Operating Current
(Adjustable Device)
LT1086 Load Regulation
.
0-0.15
-0.20
-50 -25
Temperature Stability
Tj=25'C
r-.... I"-...
25
50 75 100 125
TEMPERATURE ('G)
"./
"\
150
o
TI = -55'G
5
10
15
20
25
30
INPUT10UTPUT DIFFERENTIAL (V)
35
LT1086 Maximum Power
Dissipation·
Adjust Pin Current
100
2.0
). , / "'/
..l.. f--
o
0
.0 'l"
Tj=150'G\
20
90
80
!
70
i
60
0::
40
f-
1........- r -
-...
.......
:::l
~
<> 50
:z
f-
en
:::l
...a
1086MK
,./
,./
...-V
15
-~'"
!
" ~~86C~
10
1086CK
30
20
10
-2.0
-50 -25
o
0
25 50 75 100 125
TEMPERATURE ('G)
-50 -25' 0
150
,
1\
1\
o
25 50 75 100 125 150
TEMPERATURE ('C)
\
1,\
~
I--
,
1\
50 60 70 80 90 100 110120 130 140 150
GASE TEMPERATURE ('C)
• AS LIMITED BY MAXIMUM JUNCTION TEMPERATURE
LT1086 Ripple Rejection vs
Current
LT1086 Ripple Rejection
100
100
90
90
80
80
iii"
1:- 70
:z
0
~
60
~
40
a:
30
iil
it
'"
70
0
60
~
:z
§
iil
~
a:
50
r-...
~UJ
30
a:
10
lOOk
VRlPPLE,,0.5VP:P-
iii"
~
VOUT=5V
0.25
0.5
0.75
1
OUTPUT CURRENT (A)
Ntl~~~I~~T)W
f'lo..
-
(V IN - VOUT) " VOROPOUT
40
'"
~
30
20
10
I
o
....
....
lour=l.5A
CAOJ=25~F
COUT=25~F
o
_.
60
1::z 50
a:
20
lk
10k
FREQUENGY (Hz).
fR=20kHz
VRIPPLE"~~~E"10·15~P-P
70
40
10
100
--
120H1
Z
VRIPPlE" 3Vp-p
50
20
4-116
f~
LT1Q86.5 Ripple Rejection
60
1.25
1.5
o
10
111111111
100
lk
10k
FREQUENCY (Hz)
lOOk,
LT1086/LT1086-5
LT1086-12/LT1086H
TYPICAL PERFORmAnCE CHARACTERISTICS
LT1086-5 Ripple Rejection vs
Current
100
so
100
90
70
90
80
f~-120~Z
a;-
:!!. 70
z
0
60
,
~
0:
,
VRIPPlE s3Vp'p
~ so
Ul
a:
LT1086·12 Ripple Rejection vs
Current
LT1 086-12 Ripple Rejection
-t:----.,
~
50
~
40
o
fR=20kHz
VRiPPlE
40
~0,5VP'P
~
VOUT=5V
CAOJ = 25pF
COUT=25pF
10
70
fR 120Hz
0
60
~ so
VRIPPl~"3VP'~
40
fR-:20kHz
Ul
a:
'w
~
0:
0: 20
20
~
z
~ 30
~
30
so
60
a;-
0,25
10
0,5
0,75
1
OUTPUT CURRENT (A)
1.25
10
o
1.5
100
LT1 086 Line Transient Response
60
~~
~~-20
o
rr{L 1
>fi
~~
~c
$
-0.2
-
-0.3
-
c
9
0.10
-
-55'CsT l s150'C \J'CST'SI125'CI
-"
tt,...+"",:",!,,-t----Y---1
~
l;: 0.4 ~-+~-t-~~-\-+---I
~
'-'
\J
i
13
./
- CIN=l~FTANTALUM
_ COUT= 10pF TANTALiM
... 1.5
...........
LT1086H Short Circuit Current
/AOJ=l~F
~I
~~-O.l
I I
o
lOOk
CADJ=~IT
~~
o
1 I I
12
11
i
... !;;:
I -I '1
13
00
0.2
g~ 0.1
VOUT=10V
10UT=0.2A
CIN = l~F TANTALUM ,_
COUT=10~F TANTALUM
~€ 14
!jz
~~
~
'CADJ=lpF _
-40
-60
10k
LT1086 Load Transient Response
w
IcAo}=O
,v
0
... ;:;
lk
FREQUENCY (Hz)
0.3
I I
40
~> 20
~.!.
iR'PPlEiO,5VP'r
VouT=5V
CADJ=25pF
COUTi25pF
20
o
a
30
-
-
fR=20Hz
>=
VRIPPlESO.5Vp'p
frl 50
Ul
a:
.........
~
0:
~
5
40
30
VOUT=5V
20
0-0.15
CADJ=25~F
10 rCouTi25pF
o
o
a
-0.20
0.1
0.2
0,3
0.4
OUTPUT CURRENT (A)
0.5
-so
-25
25 50 75 100
TEMPERATURE ('C)
125 lSO
a
0.1
0,2
0.3
0.4
OUTPUT CURRENT (A)
0.5
4-117
LT1086/LT1086-5
LT1086-12/LT1086H
TYPICAL PERFORmAnCE CHARACTERISTICS
LT1086H Maximum 'Power
Dissipation·
LT1086H Ripple Rejection
100
vi 1111~I~v~pIJIIIIII ~0!5V~~
90
RiPPlE
_60
OJ
~
70
o
~
60
z
~
50
~
a:
40
30
I
f-
I
(V IN - VOUT) "
RIPPLE
'"
vDROPOUT
I IlIlIil
(VIN- VOUT),,3V
~
~
~
a:
.~
3
\
2
1\
LT1086CH
CADJ=200# ATFREQUENCIES <60Hz
CADJ = 25# AT FREQUENCIES P>I6OHz
20
10
11urll~i~
o
10
100
r\ \
o
100k
50 60
,
1\
\
IIJ IlJIll I JIJIIUI .L
1k
10k
FREQUENCY (Hz)
~T10B6MH
'\
70 80 90 100 110 120 130 140 150
CASE TEMPERATURE ('C)
"AS LIMITED BY MAXIMUM JUNCTION TEMPERATURE
APPLICATion HinTS
The LT1086 family of three terminal regulators is easy to
use and has all the protection features that are expected
in high performance voltage regulators. They are short
circuit protected, have safe area protection as well as thermal shutdown to turn off the regulator should the temperature exceed about 165°C at the sense pOint.
These regulators are pin compatible with older three
terminal adjustable devices, offer lower dropout voltage
and more precise reference tolerance. Further, the reference stability with temperature is improved over older
types of regulators. The only circuit difference between
using the LT1086 family and older regulators is that they
require an output capacitor for stability.
Stability
The circuit design used in the LT1086 family requires the
use of an output capacitor as part of the device frequency
compensation. For all operating conditions, the addition
of 150"F aluminum electrolytic or a22"F solid tantalum on
the output will ensure stability. Normally, capaCitors
much smaller than this can be used with the LT1086. Many
different types of capacitors with widely varying characteristics are available. These capacitors differ in capacitor
tolerance (sometimes ranging up to ± 100%), equivalent
series reSistance, and capaCitance temperature coeffi·
cient. The 150"F or 22"F values given will ensure stability.
4-118
When using the LT1086 the adjustment terminal can be
bypassed to improve ripple rejection. When the adjustment terminal is bypassed the requirement for an output
capaCitor increases. The values of 22"F tantalum or 150"F
aluminum cover all cases of bypassing the adjustment
terminal. For fixed voltage devices or adjustable devices
without an adjust pin bypass capacitor, smaller output
capaCitors can be used with equally good results and the
table below shows approximately what size capaCitors are
needed to ensure stability.
Recommended Capacitor Values
Input
Output
10~F
10~F
10~FTantalum, 5O~F Aluminum
22,.F Tantalum, 150~F Aluminum
Adjustment
None
2O~F
Normally, capacitor values on the order of 100"F are used
in the output of many regulators to ensure good transient
response with heavy load current changes. Output capacitance can be increased without limit and larger values of
output capaCitor further improve stability and transient response of the LT1086 regulators.
Another possible stability problem that can occur in
monolithic Ie regulators is current limit oscillations.
These can occur because, in current limit, the safe area
LT1086/LT1086-5
LT1086-12/LT1086H
APPLICATion HinTS
protection exhibits a negative impedance. The safe area
protection decreases the current limit as the input·to·
output voltage increases. That is the equivalent of having
a negative resistance since increasing voltage causes cur·
rent to decrease. Negative resistance during current limit
is not unique to the LT1086 series and has been present on
all power Ie regulators. The value of the negative reo
sistance is a function of how fast the current limit is
folded back as input·to·output voltage increases. This
negative resistance can react with capacitors or inductors
on the input to cause oscillation during current limiting.
Depending on the value of series resistance, the overall
circuitry may end up unstable. Since this is asystem prob·
lem, it is not necessarily easy to solve; however it does not
cause any problems with the Ie regulator and can usually
be ignored.
degradation. Of course, as with any Ie regulator, exceed·
ing the maximum input to output voltage differential
causes the internal transistors to break down and none of
the protection circuitry is functional.
01
1N4002
(OPTIONAL)
IN
lT1086
ouTt--+-----.-VOUT
R1
R2
Overload Recovery
Protection Diodes
In normal operation, the LT1086 family does not need any
protection diodes. Older adjustable regulators required
protection diodes between the adjustment pin and the out·
put and from the output to the input to prevent overstress·
ing the die. The internal current paths on the LT1086
adjustment pin are limited by internal resistors. Therefore,
even with capaCitors on the adjustment pin, no protection
diode is needed to ensure device safety under short circuit
conditions.
Diodes between input and output are usually not needed.
The internal diode between the input and the output pins
of the LT1086 family can handle microsecond surge cur·
rents of 10A to 20A. Even with large output capacitances,
it is very difficult to get those values of surge currents in
normal operations. Only with high value of output capaci·
tors, such as 1000/LF to 5000/LF and with the input pin in·
stantaneously shorted to ground, can damage occur. A
crowbar circuit at the input of the LT1086 can generate
those kinds of currents, and adiode from output to input is
then recommended. Normal power supply cycling or even
plugging and unplugging in the system will not generate
current large enough to do any damage.
The adjustment pin can be driven on a transient basis
± 25V, with respect to the output without any device
Like any of the Ie power regulators, the m086 has safe
area protection. The safe area protection decreases the
current limit as input·to·output voltage increases and
keeps the power transistor inside a safe operating region
for all values of input·to·output voltage. The LT1086 protec·
tion is designed to provide some output current at all val·
ues of input·to·output voltage up to the device breakdown.
When power is first turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During the start·up, as the input
voltage is rising, the input·to·output voltage differential
remains small, allowing the regulator to supply large out·
put currents. With high input voltage, a problem can occur
wherein removal of an output short will not allow the out·
put voltage to recover. Older regulators, such as the 7800
series, also exhibited this phenomenon, so it is not unique
to the LT1086.
The problem occurs with a heavy output load when the in·
put voltage is high and the output voltage is low, such as
immediately after a removal of a short. The load line for
such a load may intersect the output current curve at two
pOints. If this happens, there are two stable output operat·
ing pOints for the regulator. With this double intersection,
the power supply may need to be cycled down to zero and
brought up again to make the output recover.
4-119
•
LT1086/LT1086-5
LT1086-12/LT1086H
APPLICATion HinTS
Ripple Rejection
Load Regulation
For the LT1086 the typical curves for ripple rejection reo
flect values for abypassed adjustment pin. This curve will
be true for all values of output voltage. For proper bypass·
ing, and ripple rejection approaching the values shown,
the impedance of the adjust pin capacitor, at the ripple fre·
quency should equal the value of R1, (normally
1000-1200). The size of the required adjust pin capacitor is
a function of the input ripple frequency. At 120Hz the
adjust pin capacitor should be 131'F if R1 =1000. At 10kHz
only O.161'F is needed.
Because the LT1086 is a three·terminal device, it is not
possible to provide true remote load sensing. Load regula·
tion will be limited by the resistance of the wire connect·
ing the regulator to the load. The data sheet specification
for load regulation is measured at the bottom of the pack·
age. Negative side sensing is a true Kelvin connection,
with the bottom of the output divider returned to the nega·
tived side of the load. Although it may not be immediately
obvious, best load regulation is obtained when the top of
the resistor divider, (R1), .is connected directly to the case
not to the load. This is illustrated in Figure 2. If R1 were
connected to the load, the effective resistance between
the regulator and the load would be
For circuits without an adjust pin bypass capacitor, the
ripple rejection will be a function of output voltage. The
output ripple will increase directly as aratio of the output
voltage to the reference voltage (VouTNREF). For example,
with the output voltage equal to 5V, and no adjust pin
capacitor, the output ripple will be higher by the ratio of
5V/1.25V or 4 times larger. Ripple rejection will be degraded by 12dB from the value shown on the LT1086 curve.
Typical curves are provided for·5 and ·12 devices since the
adjust pin is not available.
Output Voltage
Rp
-
.,
VIII
111086 VOIII'
, ,
.':j,~
PARASITIC
LINE RESISTANCE
I'\,
R1
CONNECT
R1 TO CASE
R2
The LT1OB6 develops a 1.25V reference voltage between
the output and the adjust terminal (see Figure 1). By plac·
ing aresistor, R1, between these two terminals, aconstant
current is caused to flow through R1 and down through R2
to set the overall output voltage. Normally this current is
chosen to be the specified minimum load current of 10mA.
Because IADJ is very small and constant when compared
with the current through R1, it represents asmall error and
can usually be ignored. For fixed voltage devices R1 and
R2 are included in the device.
I--r_-VOUT
r
,
~~ ~--.r.-.t
Vour=VREF (1 +
g)
R1
+IAOJ R2
R2
Figure 1. Basic Adjustable Regulator
4-120
Rp x R2 + R1 ,Rp =Parasitic Line Resistance.
R1
,
'\.
CONNECT R2
TO LOAD
Figure 2. Connections for Best Load Regulation
Connected as shown, Rp is not multiplied by the divider ra·
tio. Rp is about O.OO4!lper foot using 16 gauge wire. This
translates to 4mV/ft at 1A load current, so it is important to
keep the positive lead between regulator and load as short
as pOSSible, and use large wire or PC board traces.
Note that the resistance of the package leads for the H
package .. O.06!llin. While it is usually not possible to con·
nect the load directly to the package, it is possible to con·
nect larger wire or PC traces close to the case to avoid
voltage drops that will degrade load regulation.
For fixed voltage devices the top of R1 is internally Kelvin
connected, and the ground pin can be used for negative
side sensing.
LT1086/LT1086-5
LT1086-12/LT1086H
APPLICATion HinTS
Thermal Considerations
The LT10B6 series of regulators have internal power and
thermal limiting circuitry designed to protect the device
under overload conditions. For continuous normal load
conditions however, maximum junction temperature ratings must not be exceeded. It is important to give careful
consideration to all sources of thermal resistance from
junction to ambient. This includes junction to case, case
to heat sink interface, and heat sink resistance itself. New
thermal resistance specifications have been developed to
more accurately reflect device temperature and ensure
safe operating temperatures. The data section for these
new regulators provides a separate thermal resistance
and maximum junction temperature for both the Control
Section and the Power Transistor. Previous regulators,
with a single junction to case thermal resistance specification, used an average of the two values provided here
and therefore could allow excessive junction temperatures under certain conditions of ambient temperature
and heat sink resistance. To avoid this possibility, calculations should be made for both sections to ensure that both
thermal limits are met.
For example, using a LT10B6CK (T0-3, Commercial) and
assuming:
=
=
=
VIN (max continuous) 9V, VOUT 5V, lOUT 1A,
TAMBIENT =75°C, OHEAT SINK =3°CIW,
0CASHO-HEAT.SINK O.2°CIW for Kpackage with
thermal compound.
=
Power dissipation under these conditions is equal to:
=
=
Po (VIN - VOUT) (lOUT) 4W
Junction temperature will be equal to:
Tj =TAMBIENT +Po (OHEAT·SINK +
OCASHO·HEAT·SINK +Ojd
For the Control Section:
=
=
Tj 75°C +4W (3°CIW +O.2°CIW +1.7°CIW) 95°C
95°C <125°C =Tjmax (Control Section
Commercial Range)
For the Power Transistor:
=
=
Tj 75°C +4W (3°CIW +O.2°CIW +4°CIW) 103.BoC
103.BoC <150°C =Tjmax (Power Transistor
Commercial Range)
In both cases the junction temperature is below the maximum rating for the respective sections, ensuring reliable
operation.
Junction to case thermal resistance for the K and T packages is specified from the I.C. junction to the bottom of the
case directly below the die. This is the lowest resistance
path for heat flow. While this is also the lowest resistance
path for the H package, most available heat sinks for this
package are of the clip-on type that attach to the cap of the
package. The datasheet specification for thermal resistance for the Hpackage is therefore written to reflect this.
In all cases proper mounting is required to ensure the best
possible heat flow from the die to the heat sink. Thermal
compound at the case-to-heat sink interface is strongly
recommended. In the case of the Hpackage, mounting the
device so that heat can flow out the bottom of the case will
significantly lower thermal resistance (.. afactor of 2). If the
case of the device must be electrically isolated, athermally
conductive spacer can be used, as long as its added contribution to thermal resistance is considered. Note that the
case of all devices in this series is electrically connected to
the output.
5V, 1.5A Regulator
~_-_5VAT 105A
3651l
1%
'REQUIRED FDR STABILITY
4-121
LT1086/LT1086-5
LT1086-12/LT1086H
TYPICAL APPLICATions
SV Regulator with Shutdown
1.2V-1SV Adjustable Regulator
1-......- _ - 5 V
1-.....- ......-VOUT t
V,N
12m
1%
R1
1210
+
C2
100""
365U
1%
'NEEDED IF DEVICE IS FAR FROM FILTER CAPACITORS
tVOUT=1.25V
(1+~)
Remote Sensing
Rp
(MAX DROP 300mVj
5V
121U
365U
RETURN
Regulator with Reference
Adjusting Output Voltage of Fixed Regulators
10V
VIN>11.5V
+
1_
5VOUT
100.F
LTt029
'OPTIONAL IMPROVES RIPPLE REJECTION
Battery Charger
Protected High Current Lamp Driver
1--~.J-15V
lT1006
V,N
I""'"--t_rv.;.~-VOUT
TIL OR
CMOS
IF
VOUT-1.25~+"*)
-RS (1 +"*)
4-122
LT1086/LT1086-S
LT1086-12/LT1086H
TYPICAL APPLICATions
High Efficiency Dual Linear Supply
(HEATSINK)
2N6667
Q1
(DARLINGTON)
1k
510k
LT1004-2.5
D1
1N4002
100.F
30.1k·
MDA201
130VAC-]
90VAC
1.07k·
STANCOR
P-S6S5
12411·
(HEATSINK)
2N6667
(DARLINGTON)
D2
1N4002
100.F
MDA2Q1
1.07k·
• = 1% FILM RESISTORS
MDA = MOTOROLA
L1 =PULSE ENGINEERING. INC. NPE-92106
~
__ ________ __________
~
~
~~
______________________ ____ ____
~
High Efficiency Dual Supply
~
~_;~v
Battery Backed Up Regulated Supply
FEEDBACK PATH
Y,N -.--1*,"-1>--1
MUR410
SELECT
FOR
CHARGE
RATE
470pF
6.5V :
J
1N4002
Improving Ripple Rejection
V,N
150pF
1N4002
~
__.....______.....______
~
____....__....._ _.-12V
1.5A
·C1IMPROVES RIPPLE REJECTION.
Xc SHOULD BE -R1 AT RIPPLE
FREQUENCY.
4-123
LT1086/LT1086-5
LT1086-12/LT1086H
TYPICAL APPLICATions
Automatic Light Control
Low Dropout Negative Supply
FLOATING INPUT
BLOCK DIAGRAm
V,N
VOUT
PACKAGE DESCRIPTiOnS Dimensions in inches (millimeters) unless otherwise noted.
HPackage
3-Lead TO-39 Metal Can
KPackage
2·Lead TO·3 Metal Can
TPackage
Head T()'220 Plastic
0150
(3810)
MIN
~3~~=~:;
J ~t(~::~'~~J
0100",0010
(2540=0.2541
(~::~::l-ll-
---I
~41~~=: ~r II WP
~
j228S-3175)
{~6~=~76~}+_ _--I
4-124
RTYP
L7~ID~~--M-ic-ro-p-o-w-e-r-R-e-g-UI-at-~-~-~-~-~
Comparator and Shutdown
FEATURES
DESCRIPTION
•
•
•
•
•
•
•
•
•
•
The LT1120 is a combination micropower positive regula·
tor and free collector comparator on a single monolithic
chip. With only 4OJ,!A supply current, the LT1120 can supply
over 125mA of output current. Input voltage range is from
4.5V to 36V and dropout voltage is O.6V at 125mA. Dropout
voltage decreases with lower load currents. Also included
on the chip is a class Boutput 2.5V reference that can ei·
ther source or sink current. A shutdown pin allows logic
shutdown of the output.
a·Lead MiniDIP
40J,!A Supply Current
12SmA Output Current
2.5V Reference Voltage
Reference Output Sources 2mA and Sinks 2mA
Open Collector
Comparator Sinks 10mA
Logic Shutdown
O.2V Dropout Voltage
Thermal Limiting
The comparator can be used as a comparator for system
or battery monitoring. For example, the comparator can be
used to warn of low system voltage. Frequency com pen sa·
tion of the comparator for amplifier applications can be
obtained by adding external output capacitance.
APPLICATions
•
•
•
•
•
Battery Systems
Battery Backup System
Portable Terminals
Portable Instruments
Memory Keep Alive
The 2.5V reference will source or sink current. This allows
it to be used as asupoly splitter or auxiliary output.
Dropout Voltage and Supply Current
5V Regulator
1.00
V'N> 5.2V
5 V,N
lo=40~
5V
~
w
;'"
LT1120
+
' '1
10
~
§; 0.10
>-
~
~
'"
SHUTDOWN
1/
./
.".
0.01
0.1
1
10
100
OUTPUT CURRENT (mA)
0.1
1000
4-125
•
LTl120
ABSOLUTE mAXimum RATINGS
Input Voltage ...................................... 36V
NPN Collector Voltage .............................. 36V
Output Short Circuit Duration .................. Indefinite
Power Dissipation .................... Internally Limited
Operating Temperature Range
LT1120C ................................ OOC to 100°C
Storage Temperature Range
LT1120C ............................ - 65°C to 150°C
PACKAGE/ORDER InFORmATiOn
TOP VIEW
ORDER PART
NUMBER
ORDER PART
NUMBER
-INPUT
GND 1
FEEDBACK 2
7 COMP OUT
SHUTDOWN 3
LT1120CH
LT1120CJ8
LT1120CN8
N PACKAGE
8·LEAD PLASTIC MINIDIP
VOUT
H PACKAGE
HEAD TO·5 METAL CAN
ELECTRICAL CHARACTERISTICS TJ =25°C
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Reference Voltage
4.5V:5V IN :536V
2.46
Line Regulation
4.5V:5 VIN :5 36V
2.50
0.01
2.54
0.Q15
%N
0.3
0.6
Reference
Load Regulation
Output Source Current
Output Sink Current
-2.0mA:5IREF:52mA, VIN = 12V
VIN =5V
VIN =5V
V
%
2
4
rnA
2
4
1
rnA
Temperature Stability
%
Regulator
Supply Current
VIN=6V, IOUT:5100~A
VIN =36V, IOUT:5100~A
VIN = 12V, lOUT = 125mA
Output Current
(VIN-VOUT)"1V, VIN ,,6V
Load Regulation
Line Regulation
Dropout Voltage
Feedback Sense Voltage
Shutdown Pin Voltage
Shutdown Pin Current
4-126
45
75
11
80
100
20
(YIN - VouT)"1V, VIN,,6V
6V:5VIN:536V
0.2
0.01
0.5
0.Q15
lOUT = 100~
lOUT = 125mA
VIN = 12V
0.02
0.4
2.5
0.05
0.65
2.56
V
V
0.4
V
VouT:50.5V
VIN =1.4V
INormal
IShutdown
125
2.44
2.2
~
~
rnA
rnA
%
%N
V
1.4
V
25
~A
LTl120
ELECTRICAL CHARACTERISTICS TJ=25°C
PARAMETER
Regulator
Feedback Bias Current
Minimum Load Current
Short Circuit Current
Comparator
Offset Voltage
Bias Current
Offset Current
Gain
Common Mode Rejection
Power Supply Rejection
Output Sink Current
Saturation Voltage
Input Voltage Range
Response Time
Leakage Current
I
CONDITIONS
I
TYP
MIN
VIN =36V
VIN=36V
OVsVCM',35V, VIN =36V
OVsV cM s35V, VIN = 36V (Note 1)
OVsVcM s35V, VIN =36V
dV our = 29V, RL =20k
OVsV cM s35V, VIN =36V
4.5VsVss36V
VIN=4.5V
MAX
UNITS
15
40
1
5
pA
250
360
rnA
3
15
7
mV
40
nA
4
15
nA
nA
2000
80
10000
94
80
10
96
dB
18
0.4
rnA
lour = lmA
VN
dB
0.6
0
V
VIN -l
V
ps
2
pA
5
ELECTRICAL CHARACTERISTICS
PARAMETER
Reference
Reference Voltage
Line Regulation
Load Regulation
Output Source Current
Output Sink Current
Regulator
Supply Current
CONDITIONS
Output Current
(VIN - Vour) "IV, VIN ,,6V
Load Regulation
Line Regulation
(VIN - Vour)"W, VIN ,,6V
6VsV IN s36V
Dropout Voltage
lour = 100pA
lour = 125mA
VIN =12V
Feedback Sense Voltage
Feedback Bias Current
Minimum Load Current
Short Circuit Current
4.5V SVIN s36V
4.5V s VIN s 36V
-2.0mAsI REF s2mA, VIN = 12V
VIN =5V
VIN =5V
VIN=6V,loursI00pA
VIN=36V,loursl00pA
VIN = 12V, lour = 125mA
VIN=36V
VIN =36V
•
•
•
•
•
•
•
•
•
•
•
••
•
•
•
•
MIN
TYP
MAX
UNITS
2.40
2.50
0.01
2.55
0.02
V
'ioN
0.4
0.8
2
2
rnA
65
85
II
95
100
20
125
pA
pA
rnA
rnA
I
0.02
2.38
%
rnA
2.5
0.06
0.85
2.57
50
50
240
360
%
'ioN
V
V
V
nA
pA
rnA
4-127
LTl120
ELECTRICAL CHARACTERISTICS
PARAMETER
Comparator
Offset Voltage
Bias Current
Gain
Output Sink Current
Leakage Current
CONDITIONS
VIN = 36V (Note 1)
.1VO\JT=29V, RL =20k
VIN=4.5V
VIN=36V
MIN
•
•
•
•
•
1000
5
TYP
MAX
15
10
60
UNITS
mV
nA
VN
10
mA
8
r.A
The • denotes the specifications which apply over full operating tempera·
turerange.
Note 1: For OV S VOM sO.1V and TA >85°C I bias max is 100nA.
Pin FunCTions
Pin 1-Ground.
Pin 2-Feedback. This is the feedback pOint of the reg·
ulator, When operating, it is nominally at 2.5V. Optimum
source resistance is 200k to 500k. The feedback pin should
not be driven below ground or more positive than 5V.
Pin 3-Shutdown. A logic 1shuts off main regulator. Cau·
tion: noise or leakage into the shutdown pin can affect
output voltage.
Pin 4-Regulator Output. Main output, requires 10!,F out·
put capacitor. Can be shorted to VIN or ground without
damaging device.
4-128
Pin 5-lnput Supply. Bypass with 10!,F cap. Must always
be more positive than ground.
Pin 6-Reference. 2.5V can source or sink current. May be
shorted to ground or up to 5V. Voltages in excess of 5V
can damage the device.
Pin 7-Comparator Output. May be connected to any volt·
age from ground to 36V more positive than ground (oper·
ates above VIN). Short circuit protected.
Pin a-Comparator Input. Inverting comparator input.
LTl120
TYPICAL PERFORmAnCE CHARACTERISTICS
Regulator Load Regulation
0.3
PRE-LOAD = 100pA
0.2
~
0.1
c(
Regulator Short Circuit Current
100~"
IIITJ~I~W!'U
"I II
I~J=12J,h
w
'"z
:z:
Supply Current
~
g§ 200
w
<>
'"~
~
300
! 250 I--
r-..
<>
~
350
t::
~ 150
TJ=125'C
C3
-0.1
~
'" -0.2
li' 100
'"
il5
-0.3
o
0.1
1
10
100
OUTPUT CURRENT (mA)
1
10
100
REGULATOR OUTPUT CURRENT (mA)
1000
Dropout Voltage
1000
-50
Regulator Minimum Load Current
~
70
65
....~
o
~
=>
i]
~
0.1
<3
Q
9
:;;
~
I
10
3
=>
0.01
0.1
1000
Supply Current
80
90
110
150
III
I"-
IOiTll11~~
..IIIJlll.lllouT=lm~\
VIN=10VDC,
lVp-p
VOUT=5V
COUT=10pF
35
V
~
lllllWI
45
II
11111111
IOUT=100mA
1\
II
30
10
Supply Current at Dropout
100
lk
10k
RIPPLE FREQUENCY (Hz)
lOOk
Reference Regulation
10
TJ
55'C TO 125'C
lOUT 100mA
[
w
;;(
!
'"~
S
....
~IOUT
10mA
~
-...lOUT 10mA
~
<>
& 0.1
=IOUT lmA
<>
~
~
=>
en
~ ~OUT
lmA
0
~
-2
a:
-3
til
0.01
1
5
10
15
20
25
REGULATOR INPUT-OUTPUT DIFFERENTIAL (V)
"",""-
~ -1
VOUT=5V
TJ= -55'C TO 125'C
0.01
2
§;
~
0.1
30
70
TEMPERATURE (OC)
1\
a: 40
100 110 120 130 140 150
TEMPERATURE (OC)
;:::: I OUT 100mA
=>
<>
50
/
70
10
I
55
!rlUl
'"
/
1
1
10
100
REGULATOR OUTPUT CURRENT (mA)
60
z
~
'"
,/
iii"
:8-
a:
z
a:
en
J
=>
:;;
;;!;
~=>
--
avOUT 100mV
I
-10
Regulator Ripple Rejection
100
~
r- I-- CURRENT LIMIT TIED TO GROUND r-
50
o
0.1
0.2
0.3
04
0.5
0.6
REGULATOR INPUT-OUTPUT DIFFERENTIAL (V)
'"
............
...............
-4
-1.5
-1.0 -0.5
0
0.5
1.0
REFERENCE OUTPUT CURRENT (mA)
1.5
4-129
LTl120
TYPICAL PERFORmAnCE CHARACTERISTICS
Comparator Input Bias Current
100
I
90
<'
S
>-
80
~ 60
50
T]=2JoC
I-
U)
~ 40
\
>-
K 30
f--
-
25
~
c
~
15
o
-1
0
~
....... r-
V
~
I-"
~
TJ= 25°C
~
~
I
T(Hmlii-
0.1
-0.6 -0.2 GND 0.2
0.6
CDMMON·MODE VOLTAGE (V)
REFERRED TO PIN 9 (GND)
VIN=15V
Vour=5V
~-O.1
10
o
Regulator Thermal Regulation
0.1
~
s:
r\.
10
;i!
!:l
~
~ 20
~
\
~
20
TJLIJ~~j~
!z
~
=>
~w
11111111
~30
I
_ TJ= -55°C
a:
a
~
35
Tl=12boc
70
~
Feedback Pin Current
40
1
10
100
REGULATOR OUTPUT CURRENT (rnA)
50
=>
u
5
1000
§
0
o 00
~
00 00
lOOloo~OffiOl00
TIME (ms)
LT1120 Tum-On Characteristic
5.5
Vour=5V
Jo LOA
5.0
[)J,V
4.5
Iff
~
~ 4.0
j
>!
Si 3.5
~
is
3.0
2.5
2.0
o
RL =50011 f--
1/1
i'
iff
RLj5011
012345678
INPUT VOLTAGE (V)
APPLICATion HinTS
The LT1120 is especially suited for micropower system applications. For example, the comparator section of the
LT1020 may be used as abattery checker to provide an indication of low battery. Another type of system application for the LT1120 would be to generate the equivalent of
split supplies off of a Single power input. The regulator
section provides regulated output voltage and the reference, which can both source and sink current is then an
artificial system ground providing a split supply for the
system.
4-130
For many applications the comparator can be frequency
compensated to operate as an amplifier. Compensation
values for various gains are given in the datasheet. The
comparator gain is purposely low to make it easier to frequency compensate as an amplifier. The NPN output is
capable of sinking 10mA and can drive loads connected to
voltages in excess of the positive power supply. This is
useful for driving switches or linear regulators off of a
higher input voltage.
LTl120
APPLICATion HinTS
Reference
Internal to the LT1120 is a 2.5V trimmed class B output
reference. The reference was designed to be able to
source or sink current so it could be used in supply split·
ting applications as well as a general purpose reference
for external circuitry. The design of the reference allows it
to source typically 4 or 5mA and sink 2mA. The available
source and sink current decreases as temperature in·
creases. It is sometimes desirable to decrease the AC out·
put impedance by placing an output capacitor on them.
The reference in the LT1020 becomes unstable with large
capacitive loads placed directly on it. When using an out·
put capacitor, about 200 should be used to isolate the
capacitor from the reference pin. This 200 resistor can be
placed directly in series with the capacitor or alternatively
the reference line can have 200 placed in series with it and
then a capacitor to ground. This is shown in Figure 1.
Other than placing large capacitive loads on the
reference, no other precautions are necessary and the
reference is stable with nominal stray capacitances.
Figure 1. Bypassing Reference
Overload Protection
The main regulator in the LT1120 is current limited at ap·
proximately 250mA. The current limit is stable with both
input voltage and temperature.
Like most other IC regulators, a minimum load is required
on the output of the LT1120 to maintain regulation. For
most standard regulators this is normally specified at
5mA. Of course, for a micropower regulator this would be
a tremendously large current. The output current must be
large enough to absorb all the leakage current of the pass
transistor at the maximum operating temperature. It also
affects the transient response; low output currents have
long recovery times from load transients. At high operat·
ing temperatures the minimum load current increases and
having too low of a load current may cause the output
to go unregulated. Devices are tested for minimum load
current at high temperature. The output voltage setting reo
sistors to the feedback terminal can usually be used to
provide the minimum load current.
Frequency Compensation
The LT1120 is frequency compensated by adominant pole
on the output. An output capaCitor of 10ftF is usually large
enough to provide good stability. Increasing the output
capacitor above 10ftF further improves stability. In order to
ensure stability, a feedback capaCitor is needed between
the output pin and the feedback pin. This is because stray
capacitance can form another pole with the large value of
feedback resistors used with the LT1120. Also, afeedback
capacitor minimizes noise pickup and improves ripple
rejection.
With the large dynamic operating range of the output cur·
rent, 10000:1, frequency response changes widely. Low AC
impedance capacitors are needed to insure stability.
While solid tantalum are best, aluminum electrolytics can
be used but larger capacitor values may be needed.
4-131
III
LTl120
TYPICAL APPLICATions
Regulator with Output Voltage Monitor
I-'-...._ _,....-....._~~TPUT
LOGIC OUTPUT GOES LOW WHEN
VOUT DROPS BY 100mV
1Amp Low Dropout Regulator
Compensating the Comparator as an Op Amp
2.2k
5
...- ....W'oMI-....
AT Av=loo,
SLEW RATE= +O.05V/jS.2V
la=40pA
lOOk
150D"
GNO
LTl120
TYPICAL APPLICATions
Battery Backup Regulator
BATIERY
INPUT 5
V'N
MAIN
VIII 5 POWER
INPUT
4
Vour
~Tl120
.001~F
1'8
GND
2
'::"
INTERNAL PARASITIC
DIODES OFLTl120
V,N
I 1"-
I
1"-
VOUT
'::"
5V Regulator with Feedback Shutdown
VOUT ~4"--_........._ _,...._ ~~TPUT
LT1l20
GND
NC
FB
LOGIC INPUT
1M
·TRANSISTOR USED BECAUSE OF LOW LEAKAGE CHARACTERISTICS.
TO TURN OFF THE OUTPUT OF THE LT1120
FORCE FB (PIN 2) >2.5V.
Current Liinited 1Amp Regulator
2.2k
0.50·
V,N
5
Y,N
VOUT
5V@lA
0.22~F
GND
2700
lOOk
·SETS CURRENT
LIMIT BUT INCREASES
DROPOUT VOLTAGE BY
O.5V.
t MUST HAVE LOW
ESR. SEVERAL 1OO~
CAPACITORS CAN BE
PARALLELED.
4-133
z~
~
I
.....£.
11\
W
a::D
~
REFERENCE
R8
'Ok
41 [) I
n
FEEDBACK
-ill v"
Ik
Q
40k
::D
!.I OUTPUT
r~56
~~1
037
R32
O"~
2k
"8
15k
100pF_
:~ ~:
I ~~
~~~8k~~k
I:~
I
l15k~81k~ ~;g~
I I
~~~ ~ ~:~;
1~-tl+l+
15k
15k
2k
SO
R34
50'
~
I
dl
-INPUT
~
::D
038
07
-....
-
3
SHUTDOWN
m
GNO
::D
a
I~---'
---'
~
LTl120
BLOCK DIAGRAm
REFERENCE
6
-----If-------+----.
V1N I51---.....
COMPARATOR
OUT
VOUT
'-------llJFEEDBACK
SHUTDOWN
'------+->----------l1JGROUND
INV IN
PACKAGE DESCRIPTion Dimensions in inches (millimeters) unless otherwise noted.
JPackage
a·Lead Ceramic MiniDIP
NPackage
8-Lead Plastic MiniDIP
0
t :lr
(1o'i6Qi
04OO
MA'
,6,
1
2
0045-0065
3
0250:0010
~0254)
4
(1143_1~1)
(1651)~-'
0065
TVP
~
(02:29-0381)
1JJj
0045.0015
~
0.1oo±0010
(~)
=L1
~
(3302±0127)
020
508)
MIN
{a
Jl
0.125
(3175)
MIN
0018:1::0000
~
4-135
LT1l20
PACKAGE DESCRIPTion Dimensions In inches (millimeters) unless otherwise noted.
HPackage
a·Lead T()'S Metal Can
0040
(1.016)
MAX
If::i~{::
0050
{1T7Oi
0165-0185
MAX
(4191-4699)
~·~;;;;::;;:::;;;;:::t'::1t~='--::~t~=-REFERENCE
SEATING"
•
PLANE-,- - -
ptAN'
0500-0750
DO D DO
~
(1270t905)
I\'-~
(0254-1143)
-
(0406-0533)
TYP
NOTE LEAD DIAMETER IS UNCONTROLLED BETWEEN
THE REFERENCE P\.ANE AND SEATING PLANE
4-136
L7LlnFAD
u ,
LTl17A/LT317A
LM 117 /LM31 7
TECHNOLdGr.~~--------P-O-Si-ti-ve--A-dJ-·u-st-a-bl-e
Regulator
FEATURES
DESCRIPTion
•
•
•
•
•
The LT117A Series are 3-terminal positive adjustable
voltage regulators which offer improved performance
over earlier devices. A major feature of the LT117A is
the output voltage tolerance is guaranteed at a maximum of ± 1%, allowing an overall power supply tolerance to be better than 3% using inexpensive 1%
resistors. Line and load regulation performance has
been improved as well. Additionally, the LT117A reference voltage is guaranteed not to exceed 2% when operating over the full load, line and power dissipation
conditions. The LT117A adjustable regulators offer an
improved solution for all positive voltage regulator requirements with load currents up to 1.5 amps.
Guaranteed 1% Output Voltage Tolerance
Guaranteed max. 0.01%/V Line Regulation
Guaranteed max. 0.3% Load Regulation
Min. 1.5A Output Current
100% Burn-in in Thermal Overload
APPLICATions
• Wide Range Power Supplies
• Constant Current Supplies
• Voltage Programmable Supplies
Regulator with Reference
Output Voltage Error
12
VIN
11
5V
~ 10
~
ffi 9
12111
eo.
c:c
0
7
i:lj
6
5
ffi
12111
2.5V
LT1009
8
c:c
~
S!
5
1=
is
2
...
V
...
2% RESISTO S LM317
1% RESISTORS ~~~~
2% RESIST.Q S "
'M"'
I LT3
l%RESISTO
m
ls\Mil
I III
p-
II
II
":"
4
6 810
11'11
IIII
20
40
100
OUTPUT VOLTAGE
4-137
LTl17A/LT317A
LM 117 /LM317
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Power Dissipation ............. Internally Limited
Input to Output Voltage Differential .. . . . . . . .. 40V
Operating Junction Temperature Range
LT117A1LM117 ............. -55°C to 150°C
LT317A1LM317 ................ O°C to 125°C
Storage Temperature Range
LT117A1LM117 ............. -65°C to 150°C
LT317A1LM317 ............. -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
we
PRECOnDITiOninG:
100% THERMAL LIMIT BURN-IN
ORDER
8OTTOMVEW
PART NO.
LT117AK
~ASE LT317AK
o ompUT LM117K
K PACKAGE
TO-3 METAL CAN
LM317K
(STEEL)
r
~
lOl I~
(lp
01 m
AOJ
°2
°3
OUTPUT
HPACKAGE
TO-39 METAL CAN
-AOJ
t
T PACKAGE
TO-220 PLASTIC
ORDER
PART NO.
LT117AH
LT317AH
LM117H
LM317H
ORDER
PART NO.
LT317AT
LM317T
::~:,
CASE IS
OUTPUT
BOTTOM VIEW
ELECTRICAL CHARACTERISTICS (See note 1) LTl17AfLm 117
SYMBOL
VREF
PARAMETER
Reference Voltage
COIIDITIONS
lour = 10mA TJ = 25°C
3V ..; (VIN - VOUT) ..; 40V
10mA ..; 10m ..;I max, P ..; Pmax
.Mmi.!..
Line Regulation
£l.Vour
£l.lour
Load Regulation
£l.VIN
Thermal Regulation
Ripple Rejection
Adjust Pin Current
Adjust Pin Current Change
Imln
Minimum Load Current
Current Limit
10mA ..; lOUT"; Imax , (See Note 2)
Vour"; 5V
VOUT ;;' 5V
Vour "; 5V
VOUT;;' 5V
TA = 25°C, 20msec Pulse
Your = 10V, f = 120Hz
CADJ = 0
10mA ..; lour ..; Imax
2.5V ..; (VIN - Your) ..; 40V
(VIN - Your) = 40V
(VIN - Your) ..; 15V
K Package
H Package
Temperature Stability
(VIN - Your) = 4OV, Tj = 25°C
K Package
H Package
-55°C..; Tj ..; + 150°C
£l.Vour
£l.Time
Long Term Stability
en
8je
RMS Output Noise (% of Your)
Thermal Resistance
Junction to Case
~
MAX
•
1.225
1.250
1.270
0.005
3V ..; (VIN - Your) ..; 40V, (See
Note 2)
CADJ = 10ltF
IADJ
£l.I AOJ
LT117A
lYP
1.238 1.250
Mill
LM117
TYP
MAX
UIIITS
V
1.20
1.25
1.30
V
0.01
0.01
0.02
%N
0.01
0.02
0.02
0.05
%N
5
0.1
15
0.3
5
0.1
15
0.3
mV
%
20
0.3
50
01)02
0.02
20
0.3
0.03
50
1
0.07
mV
%
%IW
Mill
•
••
•
•
•
•
•
••
1.262
1
65
66
65
dB
80
50
100
80
50
100
dB
itA
0.2
3.5
5
5
0.2
3.5
5
5
itA
mA
66
1.5
0.5
2.2
0.8
1.5
0.5
2.2
0.8
A
A
0.3
0.15
0.5
0.2
0.3
0.15
0.4
0.2
A
A
%
1
2
1
TA = 125°C
0.3
1
0.3
1
TA = 25°C, 10Hz..; f ..; 10kHz
H Package
K Package
0.001
12
2.3
15
3
0.001
12
2.3
15
3
£l.Temp
4-138
%
%
°C/W
°C/W
LTl17AjLT317A
LM 117 jLM31 7
ELECTRICAL CHARACTERISTICS (See note 1) LT317A/Lm317
SYMBOL
VREF
PARAMETER
Reference Voltage
CONDITIONS
lOUT ~ 10mA TI
~
MIN
1.238
25°C
•
3V ,,; (V'N - yo) ,,; 40V
10mA ,,; lOUT"; lmax. P ,,; Pmax
~
C.V,N
Line Regulation
~
Load Regulation
c.IOUT
Thermal RejJulation
Ripple Rejection
3V ,,; (V'N - VOUT) ,,; 40V. (See
Note 2)
10mA ,,; lOUT"; Imax. (See Note 2)
Vo"; 5V
Vo;;' 5V
Adjust Pin Current
Adjust Pin Current Change
Imlt!
Minimum Load Current
Current Limit
~
•
••
•
Vo"; 5V
Vo;;' 5V
TA ~ 25°C. 20msec Pulse
Vo ~ 10V. f ~ 120Hz
CAOJ ~ 0
CAOJ
IADJ
c.I ADJ
1.225
66
10mA ,,; lOUT ,,; Imax
2.5V ,,; (V,N - VOUT) ,,; 40V
(V'N - VOUT) ~ 40V
(V,N - VOUT) ,,; 15V
K and T Package
H Package
~
MAX
MIN
LM317
TVP
MAX
UNITS
V
1.20
1.25
1.30
V
1.250
1.262
1.250
1.270
O.oos
0.01
0.01
0.04
%IV
0.01
0.02
0.02
0.07
%IV
5
0.1
25
0.5
5
0.1
25
0.5
20
0.3
0.04
70
1.5
0.07
20
50
0.3
1
0.002
0.02
•
•
••
66
mV
%
mV
%
%/W
dB
65
65
lO/LF
(V,N - VOUT) ~ 40V. Tj
K and T Package
H Package
LT317A
TVP
80
SO
100
80
50
100
dB
/LA
0.2
3.5
5
10
0.2
3.5
5
10
/LA
mA
1.5
0.5
2.2
0.8
1.S
0.5
2.2
0.8
A
A
0.15
0.075
0.4
0.2
0.15
0.075
0.4
0.2
A
A
%
25°C
~
Temperature Stability
O°C ,,; Tj ,,; 125°C
1
2
1
~
Long Term Stability
TA
~
125°C
0.3
1
0.3
RMS Output Noise
(% of VOUT)
Thermal Resistance
Junction to Case
TA
~
25°C. 10Hz,,; f,,; 10kHz
0.001
c.Temp
1
%
c.Time
e.
8jc
H Package
K Package
T Package
The. denotes the specifications which apply over the full operating
temperature range.
.ala 1: Unless otherwise specified, these specifications apply for Y,N
- VOUT = 5V; and lOUT = O.1A for the TO-39 and lOUT = O.5A for
the TO-3 and TO-220 packages. Although power disSipation is
internally limited, these specifications are applicable for power
dissipations of 2W for the TO-39, and 20W for the TO-3 and TO-220.
1MAl( is 1.5A for the TO-3 and TO-220 packages and O.5A for the TO39.
12
2.3
4
0.001
15
3
5
12
2.3
4
%
15
3
°C/W
°C/W
°C/W
Nola 2: Regulation is measured at constant junction temperature, using
pulse testing with a low duty cycle. Changes in output voltage due to
heating effects are covered under the specification for thermal
regulation. Load regulation is measured on the output pin at a point Va"
below the base of the K and H package and at the junction of the wide
and narrow portion of the lead on the T package.
4-139
•
LTl17A/LT317 A
LM 11 7/LM31 7
TYPICAL PERFORmAnCE CHARACTERISTICS
Current limit
(TO-3 and TO-220 Package)
Load Regulation
Adjustment Current
0.1
65
,..,..
60
~
ffi
lOUT
~
.......
lA
0.1
~
0.2
~
0.3
is
~
$2
"
~
- y
-
5
Tj = 150'G"
I I I
0.5
-75-50-25 0
a II
a
25 50 75 100 125 150
TEMPERATURE
Dropout Voltage
55
~
50
ffi
~
145
i'r--.....
20
-
30
40
1/
30
-75
-25
25
Minimum Operating Current
1.270
TJ=I50'~
!ii§i!
TJ=25'G
1.250
~
~ 1.240
1.5
1.0 '---'--'--'--'--'--'--'--'---'"
-75-50-25 a 25 50 75 100 125 150
V
~
1.230
-50 -25
~
25
80
20
20
25
OUTPUT VOLTAGE (V)
4-140
o
5
W
ffi
V
ILTJ=-55'G
~
~
~
~
~
INPUT-OUTPUT IlffERENllAL (V)
Ripple Rejection
- 0"""'"
,
'"
\.
VIN - VOUT = 5V
lOUT = 500mA
20 I-- f = 1201fz
Tj = 25'G
i I
o
15
100 125 150
V
~V
~
~1DJ=10J\.
/
GAQJ =
10
75
Ripple Rejection (dB)
"'I'-- ~Io
5
~ ::::: ~
~
/.~
f-'"
100
GA~= lLF
o
50
TEMPERATURE
Ripple Rejection
80
"'"
a
a
'T
0,1
0,01
I-----+-+--A---f-----J
f---+------.;'t--~
11
V
1
5§
!3~
0.5
5:
10k
lOOk
a
-0.5
~!z
1.5
1
g~ 0.5
CL~O, CAOJ~O.....
cL
1 ) C~J]
1J,
1\
l+V
... il
'VIN
10
20
TIME (~s)
FREQUENCY (Hz)
30
40
I----
wilmA
\oj
I
II
1\
\.
'-' a
1M
1 15V_
VOUT ~ 10V
PRELOAO ~
TI ~ 25'C- I----
:::>
'-----'-_~--L_~---'
lk
~~
§lIS
-1.5
-1
VOUT ~ 10V
lOUT ~ 500 mA
100
1.5
-1
:::>
10
"'o
o 0,001 I-----oii;;;;;;;;j;,o~+--+
0.0001
w
10
20
f-- +--
30
40
TIME (~s)
APPLICATions InFORmATion
Ganaral: The LT117A develops a 1.25V reference voltage between the output and the adjustable terminal
(see Figure 1). By placing a resistor, R1, between these
two terminals, a constant current is caused to flow
through R1 and down through R2 to set the overall
output voltage. Normally this current is the specified
minimum load current of 5mA or 10mA.
LT317A
IN
1
OUT r--._- VOUT
1..--_'AOJ:.:r:--..::.I
VREF
Rl
Figure 1
Because IADJ is very small and constant when compared with the current through R1, it represents a
small error and can usually be ignored.
It is easily seen from the above equation, that even if
the resistors were of exact value, the accuracy of the
output is limited by the accuracy of VREF • Earlier adjustable regulators had a reference tolerance of ± 4%.
This tolerance is dangerously close to the ± 5% supply tolerance required in many logic and analog systems. Further, many 1% resistors can drift O.01%/ C
adding another 1% to the output voltage tolerance.
For example, using 2% resistors and ±4% tolerance for VREF , calculations will show that the
expected range of a 5V regulator design would be . .
4.66V ..;; VOUT ..;; 5.36V or approximately ± 7%. If the . .
same example were used for a 15V regulator, the expected tolerance would be ± 8%. With these results
most applications require some method of trimming,
usually a trim pot. This solution is both expensive and
not conducive to volume production.
One of the enhancements of Linear Technology's adjustable regulators over existing devices is tightened
initial tolerance. This allows relatively inexpensive 1%
or 2% film resistors to be used for R1and R2 while setting output voltage within an acceptable tolerance
range.
With a guaranteed 1% reference, a 5V power supply
design, using ± 2% resistors, would have a worst
case manufacturing tolerance of ±4%.lf 1% resistors
were used, the tolerance would drop to ± 2.5%. A plot
of the worst case output voltage tolerance as a function of resistor tolerance is shown on the front page.
O
4-141
LTl17A/LT317A
LM 11 7/LM31 7
For convenience, a table of standard 1% resistor val~ .
ues is shown below.
Table of 1h% and 1% Standard Resistance Values
1.00
1.02
1.05
1.07
1.10
1.13
1.15
1.18
1.21
1.24
1.27
1.30
1.33
1.37
1.40
1.43
1.47
2.15
3.16
4.64
6.81
1.50
2.21
3.24
4.75
6.98
1.54
2.26
3.32
4.87
7.15
1.58
2.32
3.40
4.99
7.32
2.37
3.48
5.11
7.50
1.62
5.23
7.68
1.65
2.43
3.57
1.69
2.49
3.65
5.36
7.87
1.74
2.55
3.74
5.49
8.06
1.78
2.61
3.83
5.62
8.25
2.67
3.92
5.76
8.45
1.82
2.74
4.02
5.90
8.66
1.87
4.12
6.04
8.87
1.91
2.80
9.09
1.96
2.87
4.22
6.19
2.00
2.94
4.32
6.34
9.31
2.05
3.01
4.42
6.49
9.53
3.09
9.76
2.10
4.53
6.65
Standard ReSistance Values are obtained from the Decade Table
by multiplying by multiples of 10. As an example, 1.21 can represent 1.210, 12.10, 1210, 1.21KO etc.
Bypass Capacitors: Input bypassing using a 1#'F tantalum or 25#'F electrolytiC is recommended when the input filter capacitors are more than 5 inches from the
device. Improved ripple rejection (80 dB) can be accomplished by adding a 10#'F capacitor from the adjust pin to ground. Increasing the size of the capacitor
to 20#'F will help ripple rejection at low output wltage
since the reactance of this capaCitor should be sma"
compared to the wltage setting resistor, R2. For improved AC transient response and to prevent the possibility of oscillation due to unknown reactive load, a
1#'F capacitor is also recommended at the output. Because of their low impedance at high frequencies, the
best type of capacitor to use is solid tantalum.
Protection Diodes: The LT117A1317A do not require a
protection diode from the adjustment terminal to the
output (see Figure 2). Improved internal circuitry
D1
eliminates the needfor this diode when the adjustment
pin is bypassed with a capacitor to improve ripple
rejection.
If a very large output capacitor is used, such as a
100#'F shown in Figure 2, the regulator could be damaged or destroyed if the input is accidentally shorted
to ground or crowbarred. This is due to the output capacitor discharging into the output terminal of the regulator. To prevent damage a diode 01 is recommended
to safely discharge the capacitor.
Load Regulation: Because the LT117A is a three-terminal device, it is not possible to provide true remote
load sensing. Load regulation will be limited by the resistance of the wire connecting the regulator to the
load. For the ·data sheet specification, regulation is
measured at the bottom of the package. Negative side
sensing is a true Kelvin connection, with the bottom of
the output divider returned to the negative side of the
load. Although it may not be immediately obvious, best
load regulation is obtained when the top of the divider
is connected direct/yto the case not to the load. This
is illustrated in Figure 3. If R1were connected to the
load, the effective resistance between the regulator
and the load would be
Rp X (R2 ~ R1) ,Rp
~ Parasitic Line ReSistance.
Connected as shown, Rp is not multiplied by the divider ratio. Rp is about 0.0040 per foot using 16 guage
wire. This translates to 4mV 1ft at 1A load current, so it
important to keep the positive lead between regulator
and load as short as possible.
Ap
PARASITIC
LtE RESISTANCE
CONNECT
A1TOCASE
1N4002
A1
'--""':':;::_...J A1
A2
'\ i='
NOT NEEDED
A2
CONNECTA~
TO LOAD
Figure 2
4-142
Connections for Best Load Regulation
Figure 3
LTl17 A/LT317 A
LM 117 /LM31 7
TYPICAL APPLICATions
1.2V-2SVAdjustable Regulator
Improving Ripple Rejection
. lT317A
l--....- -....-
VOUT
VIN
VOUT
1--.....- - - - - 5V
AllJ
R1
R1
12W
2431l +
•
Optional - improves transient
response
Needed if device is far from
filter capactiors
VOUT~
1.25V (1 +
:~
• C1 IMPROVES RIPPLE REJECTION
Xc SHOULD BE SMALL
COMPARED TO R2
)
SV Regulator with Shut Down
5V
Remote Sensing
VOUT
121Q
Rp (MAX DROP 300mV)
OUTPUT
~-------~~--------~5V
3S31l
21V Programming Supply for UV PROM/EEROM
21V
3S31l
f
+24V --
2% RESISTORS
V
>-
~
0
2
-Tl
,
1% RESISTORS
I I III
LM317HV
LT317AHV
LT317AHV
I I III
V
I I
4
L7~
II
LM317HV
6 8 10
20
OUTPUT VOLTAGE
II
40 60 100
4-145
LTl17 AHV/LT317 AHV
LM 117HVILM3 17HV
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Power Dissipation ............... Internally Limited
Inputto Output Voltage Differential. . . . . . . . . . . . . 60V
Operating Junction Temperature Range
LT117AHV/LM117HV ........... -55°C to 150°C
LT317AHV/LM317HV ............. O°Cto 125°C
Storage Temperature Range
LT117AHVI LM 117HV . . . . . . . . . .. -65°C to 150°C
LT317AHVI LM317HV ........... -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ........ 300°C
ORDER
BOTTOM VIEW
ADJOV~
r
PART NO.
~
LT117AHVK
LT317AHVK
o ~UTPUT LM 117HVK
TOK3~~ftL~AN
LM317HVK
CASE
(STEEL)
ORDER
PART NO.
BOTTOM VIEW
el
INPUT
LT117AHVH
LT317AHVH
OUTPUT LM 117HVH
HPACKAGE
LM317HVH
TO-39 METAL CAN
l
ADJ
03 °2
PREconDITiOninG:
100% THERMAL LIMIT BURN-IN
ELECTRICAL CHARACTERISTICS
(Sea Notal) LTl17AHV/LMl17HV
LT117AHV
SYMBOL
VREF
PARAMETER
Reference Voltage
~
Line Regulation
~
Load Regulation
~VIN
~louT
Thermal Regulation
Ripple Rejection
CONDITIONS
lOUT - lOrnA TJ ~ 25°C
3V .. (VIN - VOUT)" 60V
lOrnA .. lOUT" lmax, P.. Pmax
3V .. (VIN - VOUT ) .. 60V (See
Note 2)
lOrnA ... louT'" Imax, (See Note 2)
VOUT'" 5V
VOUT " 5V
VOUT ... 5V
VOUT" 5V
TA ~ 25°C, 20msec Pulse
VOUT ~ 10V, f ~ 120Hz
CADJ ~ 0
CADJ
IADJ
~IADJ
Imin
~VOUT
Adjust Pin Current
Adjust Pin Current Change
Minimum Load Current
Current Limit
~
10/LF
lOrnA .. lOUT" lmax
2.5V" (VIN - VOUT ) .. 60V
(VIN - VOUT) - 60V
(VIN - VOUT) ... 15V
K Package
H Package
Temperature Stability
(VIN - VOUT) ~ 60V, Tj = 25°C
K Package
H Package
-55°C ... Tj ... + 150°C
Long Term Stability
TA
RMS Output Noise (% of VOUT)
Thermal Resistance
Junction to Case
TA ~ 25°C, 10Hz ... f ... 10kHz
H Package
K Package
~Temp
~
~
125°C
•
TYP
MAX
1.250
1.262
1225
1.250
1.270
0.005
•
••
•
•
•
•
•
••
LM117HV
MIN
1.23$
66
1.5
0.5
MIN
TYP
MAX
UNITS
V
1.20
1.25
1.30
V
Q01
0.01
0.02
%IV
0.01
0,02
0.02
0.05
%IV
5
0.1
15
0.3
5
0.1
15
0.3
mV
%
20
0.3
50
1
50
1
0.07
mV
%
0.002 0.02
20
0.3
0.03
65
65
66
%IW
dB
80
50
100
80
50
100
dB
/LA
0.2
3.5
5
7
0.2
3.5
5
7
/LA
rnA
2.2
0.8
1.5
0.5
0.1
0.03
2.2
0.8
A
A
0.1
0.03
A
A
%
1
2
1
0.3
1
0.3
1
0.001
12
2.3
15
3
0.001
12
2.3
15
3
%
~Time
en
Si'
4-146
%
°C/W
°CIW
LTl17AHV/LT317AHV
LM 117HV/LM317HV
ELEaRICAL CHARAaERISTICS
SYMBOL
VREF
PARAMETER
Reference Voltage
(Saa Nota 1) LT317AHV/LM317HV
CONDITIONS
lOUT = 10mA Tj = 25"C
MIN
•
3V" (V IN - Vol " 60V
lOrnA" lOUT" lmax. P" Pmax
~
aVIN
Line Regulation
..Eoo...
Load Regulation
alOUT
Thermal Regulation
Ripple Rejection
Vo .; 5V
Vo;;' 5V
TA = 25"C. 20msec Pulse
Vo = 10V. f = 120Hz
CAW = 0
CAOJ = IO!LF
IAOJ
alAOJ
Adjust Pin Current
Adjust Pin Current Change
Imin
Minimum Load Current
Current Limit
aVOUT
aTemp
~
aTime
e.
!:lie
1.238
1.25ll 1.262
1.225
1.250 1.270
3V" (VIN - VOUT) " 60V (See
Note 2)
lOrnA.; lOUT'; Imax. (See Note 2)
Vo'; 5V
Vo;;' 5V
lOrnA" lour" lmax
2.5V" (YIN - Your) " 60V
(VIN - Your) - 60Y
(VIN - Your)" 15V
K Package
H Package
•
••
•
•
•
•
•
••
LT317AHV
TVP
MAX
MIN
1.20
1.5
0.5
1.25
1.30
V
0.01
0.01
0.04
%IV
0.01
IU)2
0.02
0.07
%IV
5
0.1
25
0.5
5
0.1
25
0.5
20
0.3
50
0.002
0.02
20
0.3
0.04
70
1.5
0.07
1
65
66
mV
%
mV
%
%/W
dB
80
50
100
80
50
100
dB
!LA
0.2
3.5
5
12
0.2
3.5
5
12
!LA
rnA
2.2
0.8
1.5
0.5
2.2
0.8
A
A
0.1
0.03
A
A
%
(YIN - Your) = 60V. Ti = 25°C
K Package
H Package
0.1
0.03
Temperature Stability
O"C .; TI .; 125"C
1
2
1
Long Term Stability
TA = 125"C
0.3
1
0.3
RMS Output Noise
(% of VOUT)
Thermal Resistance
Junction to Case
TA = 25"C. 10Hz.; f .; 10kHz
0.001
H Package
K Package
12
2.3
The. denotes the specifications which apply over the full operating
temperature range.
The shaded electrical specifications indicate those parameters which
have been improved or guaranteed test limits provided for the first time.
Note 1: Unless otherwise specified. these specifications apply for
(V IN - Your) =5Y: and 10ur=O.IA for the TO-39 and lour=O.5A for the
TO-3 package. Although power dissipation is internally limited. these
specifications are applicable for power dissipations of 2W for the TO-39.
and 20W for the TO-3. IMAX is 1.5A for the TO-3 package and O.5A for
the TO-39.
UNITS
V
0.005
65
66
LM317HV
TYP
MAX
1
0.001
15
3
12
2.3
%
%
15
3
"C/W
"C/W
Note 2: Regulation is measured at constant junction temperature. using
pulse testing with a low duty cycle. Changes in output voltage due to
heating effects are covered under the specification for thermal regulation.
4-147
LTl17AHV/LT317AHV
LM 117HV/LM317HV
SCHEmATIC DIAGRAm
r---~~------~----~~----~----'-~--~------------------~r----'-----------1--~--flVIN
310n
04
06
02
160k
180
0.1
PACKAGE DESCRIPTion
Dimensions in inches (millimeters) unless otherwise noted.
KPackage TO-3 STEEL Metal Can
H Package 3-Lead Metal Can
~3'~=~ ~~~ ATVP
~4'~~=~!~~ RTYP
0490-0510
(1245-1295)
llmax.
4-148
8ja
111AHV
117HV
150'C
35'C/W
317AHV
317HV
125'C
35'C/W
li max.
8ja
8jc
3'CIW
117AHV
117HV
150'C
150'C/W
15'C/W
3'C/W
317AHV
317HV
125'C
150'CIW
15'CIW
8jc
£.YLlnFAD
U,
LT123A/LT323A
LM123/LM323
TECHNOLOG~~""'-'----5-V-OI""tl-3A-m-p
Voltage Regulator
DESCRIPTiOn
FEATURES
•
•
•
•
•
Guaranteed 1% Initial Tolerance of Output Voltage
3 Amp Output Current
30 Watt
Full Internal Overload Protection
100% Burn-in in Thermal Limit
APPLICATions
•
•
•
•
Local 5V Regulators
On Card Regulation
Lab Supplies
Instrumentation Supplies
The LT123A1LT323A is an improved version of the
popular LM123/LM323 5 Volt, 3 Amp Regulator.
These new devices offer maximum initial output voltage tolerance of 1% and maintain a maximum tolerance of 3% over worst case operating conditions. Line
and load regulation are also improved by a factor of 2.
These tightened specifications ease design and application problems since safety margins are improved.
Also, error budgets in other parts of the system can be
expanded, and output voltages at the end of long supply runs can be more accurately maintained.
The LT123AILT323A incorporates Linear Technology's advanced design, process and test techniques
for improved quality and reliability over similar device . . .
types. Specifically, all devices are burned in by short- . .
ing the output, thereby forcing the regulator into its
current limit and eventually, thermal limit. This ensures that all device protection features are functional. A graph of the worst case output voltage, taking
into account temperature, load and line variations,
and power dissipation is shown below. For higher output current requirements, see the LT1003, 5V, 5A regulator data sheet.
Precision 5 Volt Regulator
Worst Case Output Voltage
5.2
lT323A
VIN
2.0 "F
SOLID
TANTALUM
VIM
I
+
GHD
-=-
LT123A1lT323A
5V ± 1%
@3A
our
J
+10"F
SOLID
TANTALUM
4.8 f--f--f--f--f--If--If--I--l
-50 -25
a
25
50
75
100 125 150
JUNCTION TEMPERATURE ('C)
4-149
LT123A/LT323A
LM123/LM323
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
"
Input Voltage. . . . . . . . . . . . . . . . . . . . . . .. 20 Volts
Power Dissipation ............. Internally Limited
Operating Junction Temperature Range
LT123A1LM123 ............. -55°C to 150°C
LT323A1LM323 ................ O°C to 125°C
Storage Temperature Range
LT123A/LM123 ............. -65°C to 150°C
LT323A1LM323 ............. -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
ORDER PART NO.
BOTTOM VIEW
..
~o~
1
LT123AK
2
o
CASE
LT323AK
3ROUND
LM123K
K PACKAGE
TO·3 METAL CAN
LM323K
(STEEl)
CASE IS GND
Your
j
(
lol I~
T PACKAGE
TO·220 PlASTlC
LT323AT
GND
LM323T
:J
1
VIN
PREconDITiOninG:
Thermal limit burn-in for all devices.
ELECTRICAL CHARACTERISTICS (See note 1)
SYMBOL
VOUT
~
IlVIN
IlVOUT
IlloUT
10
en
Isc
OJC
PARAMETER
Output Voltage
Line Regulation
Load Regulation
Quiescent Current
Output Noise Voltage
Short Circuit
Current Limit
Long Term Stability of Output
Voltage
Thermal Resistance Junction to
Case
CONDITIONS
Tj = 25°C, VIN = 7.5V, louT = 0
7.5V ..; VIN ..; 15V, TMIN"; Tj ..;
TMAX
0..;I OUT ..;3A,P..;30W
TS - 25°C, 7.5V ..; VIN ..; 15V
( ee Note 1)
Tj = 25°C, VIN = 7.5V
o..; lOUT"; 3A (See Note 1)
7.5V..; VIN ..; 15V, 0 ..; lOUT"; 3A
T = 25°C, 10Hz..; f ..; 100kHz
Tj = 25°C,
VIN = 15V
VIN = 7.5V
(See Note 3)
•
LT123A
TVP
MAX
4.95
5,0
5.05
MIN
4.7
4.85
5.0
5.15
4.6
5
25
12
40
3
4
LM123
TVP
5.0
5.3
UNITS
V
10
5
5.4
25
V
mV
50
20
25
12
40
100
20
mV
mA
3
4
4.5
5
A
A
35
mV
4.5
6
35
(See Note 3)
K Packalie
The. denotes the specifications which apply over the full operating
temperature range.
Nota 1: Load and line regulation are tested with pulsed low duty
cycle techniques where pulse width..; 1msec and duty cycle..; 5%.
Noll 2: Tmin = -55°C for the LT123A/LM123 and O°C for LT323A1
LM323. Tmax = 150°C for LT123A/LM123 and 125°C for LT323AI
LM323.
Nola 3: Guaranteed, but not tested.
4-150
•
MIN
1.8
2.5
1.8
MAX
p.Vrrro
°C/W
LT123A/LT323A
LM 123/LM323
ELECTRICAL CHARACTERISTICS (See note 1)
LT323A
SYMBOL
VOUT
,.RAMETER
Output Voltage
~
.:1V,N
Line Regulation
.E.m.
Load Regulation
.:1louT
IQ
en
Isc
oJe
COIDlnDIS
TJ = 25°C. Y,N
Mil
=
7.5V. lOUT
=
7.5V .. Y,N .. 15V. TUIN .. TJ..
TMAX
o .. lOUT" 3A. P .. 30W (Note 2)
TSe= 25°C. 7.5V .. Y,N .. 15V
( e Note 1)
Quiescent Current
Output Noise Voltage
Short Circuit
Current Limit
Long Term Stability 01 Output
Voltage
Thermal Resistance Junction to
4.95
0
TJ = 25°C. Y,N = 7.5V
o .. lOUT" 3A (See Note 1)
7.5V .. Y,N .. 15V. 0 .. lour .. 3A
T = 25°C. 10Hz .. 1 .. 100kHz
TJ= 25°C.
Y,N = 15V
Y,N = 7.5V (See Note 4)
(See Note 3)
•
4.95
•
LM323
TYP
5.0
MAX
5.05
MIN
4.8
4.75
5.0
5.15
5
10
25
12
40
50
3
4
4.5
20
6
TYP
5.0
MAX
5.2
UNITS
V
5.0
5
5.25
25
V
mV
25
12
40
100
20
mV
rnA
3
4
4.5
5
A
A
35
mV
35
(See Note 3)
K Package
T Package
case
1.8
2.5
2.5
4.0
1.8
3.0
p'vrms
°C/W
°C/W
•
The. denotes the specifications which apply over the full operating
temperature range.
Naill: Load and line regulation are tested with pulsed low duty
cycle techniques where pulse width '" 1msec and duty cycle", 5%.
Noll 2: Tmin = -55°C for the LT123A/LM123 and O°C for LT323A1
LM323. Tmax = + 150°C for LT123A1LM123 and + 125°C for
LT323A/LM323.
Noll 3: Guaranteed, but not tested.
Noll 4: Iscat V1N = 7.5Vis6A max forLM323T.
TYPICAL PERFORmAnCE CHARACTERISTICS
Dropout Voltage
Output Voltage Temperature Drift
2.5
,!
~ 2.0
~
1
5
I=:
~
~
1.5
.:::: ~ ::::t--......
t-,It.
~ lA
IL ~ 2~::::r-..
t"
1.0
5.15
5.10
~
5.05
."
§2
5.00
~
4.95
-r--.,
10-
(5
4.90
0.5
4.85
o
-m-~-eo
e
~
mDe~
JUNCTION TEMPERATURE (0G)
-50 -25 0
25
50
75 100 125 150
TEMPERATURE lOG)
4-151
LT 123A/LT323A
LM123/LM323
TYPICAL PERFORmAnCE CHARACTERISTICS
100
~
f----- Tj
~
'3
o
TI
Tj
~
~
100
lT323A1LM323
50
155"C
54
i§
~
""'IIiiiiII
150"C
Ln23A1LM123
25"C
3
~
........
~~
~~
2
/TA
"-
~ "TA -
V"
\
10
15
20
10
INPUT VOLTAGE (V)
20
Output Impedance
TJ
lA
25"C
'r
Ft
_COUT - IpF
FLOW ~ 1 Hz
100
Ik
10k
lOOk
100
1M
Line Transient Response
7.5
5.0
!55
il!;~
5
20
25
30
35
Ripple Rejection
I
,I
IL - 150m~_
CL - O.lpF
Tj - 25"C -
If\
\
lk
lOOk
10k
20 '-----'----'--...J,---'---'----'
10
100
Ik
10k lOOk
1M
BANDWIDTH (Hz) 1 POLE ROLLOFF
FREQUENCY (Hz)
~~
15
POWER DISSIPATION (WATTS)
"
I
10
-2.5
,'" ~ f"'.,
SOLID
TANTALUM
7.5V
rVJN
10- 3
~~
10
['....
""
CL~IOpF
/
f.i-..I.
;5<
o
35
== ~
=
x ......
'\
25"C
50"C
75"C
~
100"C= r--
=~~T -I~~A
lpF-
CL
f:=VIN
15V
(THERMAL EFFECT)
~~
~~
30
Output Noise Voltage
l
2.5
TA
TA
TA
100
lOUT
~;
'(
I
25
V
I'(
POWER DISSIPATION (WATTS)
10'
5.0
-
75"C
,N
15
I
~
-TA
==
-
25"C
50"C
TA
$'
Suggested ~eat
Sink Thermal Resistance
Suggested Heat
Sink Thermal Resistance
Peak Available Output Current
I
FREQUENCY (Hz)
Load Transient Response
0.2
loLl
~~
5z
~~
~~
0
-0.2
,
VIN - 10V
Tj - 25"C
~
r,
Quiescent Current
14
~
TI -
l
CL-IOpF
SOLID TANTALUM
"CL - 0.1 pF
1.0
/
0.5
/
Tj - 25"C/
1
Tj - 125"C
I
o II
o
TIME (ps)
4-152
r
II
~
""
<
-55"C~
12
TIME (PS)
12
INPUT VOLTAGE (V)
16
20
LT 123A/LT323A
LM 123/LM323
APPLICATIOnS InFORmATion
Bypass Capacitors: The LT123A does not require an
output capacitor fo.r resistive loads. For almost all applications, however, a 1#LF or larger solid tantalum capacitor should be used at the output within 2" of the
regulator to improve the output impedance at high frequencies. For applications where very low high frequency impedance is required, a 10#LF solid tantalum
output capacitor is recommended. Total output capacitance either local or distributed may be increased
without limit.
A 2#LF or larger solid tantalum capacitor or a 25#LF aluminum capacitor, must be used at the input if the regulator is more than 4" away from the large rectifier
capacitor.
Avoiding Ground Loops: For best regulation, the ground
pin of the LT123A should be tied directly to the load
pOint as shown. This prevents excess drop in load
voltage caused by load current flowing through the
ground return lead. This is essentially a Kelvin connection for the low side of the regulator. A Kelvin connection cannot be made for the high output of
regulator because only three pins are available on the
package. Therefore, every attempt should be made to
minimize the resistance between the output pin of the
regulator and the load. #18 gauge hookup wire has a
resistance of 0.006 ohms per foot. This translates to
0.36% change in load voltage at fulll.oad current. The
LT123A is specified at 1% maximum load regulation,
so o.ne foot of wire represents a significant loss of regulation. If connectors are used, careful consideration
must be given to contact resistance, especially if the
connector is subjected to nasty ambients, vibration, or
multiple insertions.
LT128A
+
GND
RAW SUPPLY
12mA
THIS RESISTANCE DOES NOT
CONTRIBUTE TO LOAD REGULATION
"-HI CURRENT PATH
Raw Supply: Transformer, diode, and capaCitor selection for the raw supply to the LT123A is very important
because of the conflicting requirements for reliability,
efficiency, and resistance to "brown-out" conditions.
High secondary voltage on the transformer will cause
unnecessarily high power dissipation in the regulator.
Too Iowa secondary voltage will cause the regulator
output to drop out of regulation with only a small reduction in AC mains voltage. The following formula
gives a good starting pOint for transformer selection.
This formula assumes a center tapped transformer,
using two rectifier diodes.
where:
VOUT
Voo
=
VRECT
VRI ?
=
=
=
5V
Minimum input-output differential of the
regulator
Rectifier forward drop at 310UT
Y2 pop capaCitor ripple voltage
"'" (5.3 X ~~3) (lOUT)
VNOM = Rated line voltage for the transformer
(RMS)
VLOW = Lowest expected line voltage (RMS)
lOUT = DC output current
*1.1 is a nominal load regulation factor for the
transformer
4-153
4
LT123A/LT323A
LM123/LM323
APPLICATions InFoRmATion
Example: lOUT = 2.5A, VOUT = 5V
Assume: Voo = 2.5V, VREcr = 1.1V, C = 8,0001£F
VNOM = 115V, VLOW = 0.88V
VRIP
VRMS
=
=
VRMS
x
10-3) (2.5)
2 (8 X 10-3)
(5.3
=
=
(5
=
0.83V
+ 2.5 +~ 1 + 0.83)
(
~~ )
(1.1)
8.03 VRMS
(VOUT + VOO :;RECT + VRIP)) (
~~~: )
(1.1*)
IRMS = (lOUT) (1.2)
The filter capacitor should be at least2000JLF per amp
of load current to minimize capacitor heating and ripple voltage. The diodes should be rated at 5-6 amps
even though their average current is only 1.5A at full
rated load current. The reason for this is that although
the average current is 1.5A, the RMS current is typically twice this value. In addition, the diode must withstand very high surge currents during power turn-on.
This surge can be 10-20 times the DC rating of the
supply, depending on capacitor size and wiring resistance and inductance.
TYPICAL APPLICATiOnS
01
1---.._-- Your
\ - - - - - - Your
01··
02t
211
211
OUTPUT CROWBAR
INPUT CROWBAR
t
tt
02 AND 01 MUST WITHSTAND LARGE SURGE CURRENTS
UNTIL THE 5A FUSE BLOWS. PEAK SURGE CURRENT IS
LIMITED ONLY BY THE FUSE, WIRING, AND FILTER CAP
RESISTANCE.
TRIP POINT IS APPROXIMATELY 7.3V.
4-154
•
THE 6.4V ZENER IS INTERNAL TO THE LT123A.
•• 01 MUST BE ABLE TO WITHSTAND CONTINUOUS CURRENTS
OF 5A IF ADDITIONAL SYSTEM SHUTDOWN IS NOT USED.
LT 123A/LT323A
LM 123/LM323
SCHEmATIC DIAGRAm
10k
1k
50
003
OUT
1k
64V
6.4V
4k
250
GNO
PACKAGE DESCRIPTion
y
KPackage STEEL METAL CAN
~'::~:::~)1
OJ20_0350
~,o:=~~~
(813-889)
~
-.l
t-
0420-0480
T Package TO-220
1
0045-0055
11143-1391)
~020
(6350±0508)
(1087-1219)
I
0170-0180
(4318-4572)
-.--L
-----...J I-- ~C:5~Ol o~
1171-1197
(2990-304{l)
~3'==~~:; RTVP
JIt""·"05
--l f.---(OB13z0127)
010001.0010
(2!)40*0254j
0495-0525
(1257-1334)
~---II--
(0330-0635)---1
0000-0125
(2286-3175)
0655-0675
(1664-1715)
TJmax.
Up
8;
LT123AK
LM123K
150°C
35°CIW
1.8°CIW
LT323AK
LM323K
125°C
35°CIW
1.8°CIW
4.. 155
•
NOTES
4-156
L.7Lln
FAr\
U \K
LT137A/LM137
LT337 A/LM337
TECHNOLOo~~~-------N~e-g-a~t~iv-e-A~d~j-us~ta~b~l~e
Regulator
FEAI'URES
DESCRIPTion
•
•
•
•
•
The LT137A1LT337A negative adjustable regulators
will deliver up to 1.5Amps output current over an output voltage range of -1.2V to -37V. Linear Technology has made significant improvements in these
regulators compared to previous devices, such as better line and load regulation, and a maximum output
voltage error of 1%.
Guaranteed 1% Initial Voltage Tolerance
Guaranteed 0.01%/V Line Regulation
Guaranteed 0.5% Load Regulation
Guaranteed 0.02%/W Thermal Regulation
100% Burn-in in Thermal Limit
Every effort has been made to make these devices
easy to use and difficult to damage. Internal current
and power limiting coupled with true thermal limiting
prevents device damage due to overloads or shorts,
even if the regulator is not fastened to a heat sink.
APPLlCAI'IOnS
•
•
•
•
Adjustable Power Supplies
System Power Supplies
Precision Voltage/Current Regulators
On-Card Regulators
Maximum reliability is attained with Linear Technol- . .
ogy's advanced processing techniques combined with . .
a 100% burn-in in the thermal limit mode. This assures that all device protection circuits are working
and eliminates field failures experienced with other
regulators that receive only standard electrical
testing.
Output Voltage Error
Negative Regulator
12,-~~~,-~~~
11 f---+-t--H-++t+f---+-t--H-+++tI
[lOf---+-l--H-##f---+-l--H-Hffi
ffi
~
9 f---+-t--H-tt++f--+-t-+-t-+++tI
8
% RESISm 3S LM337
~ 7 f---+-t--,J...1<'FH+f---+-l--jI-+
'"'i'+lT'[++I
1% RESlinORS IL~~i7
ffi
~
5
'"
•. ':vm~--+--- -VOUl =
1.25V ( 1 +
:~ )
g
t-
~
o
• R2
=
R1
(Ivourl 1.25V
1\
I
4
3
2
/
2% RESISTORS'
I u..-
I I , ,
LT337A
f-"'Y,-+--j--j~++mf---+-l-+-t-+++tI
""
1% RESI TO S 'Li:bjl'
fl
I I I
~~~~-+++++IIf---+-t--jI-+I+lII++l111
II
4 6 810
II
20
40
III
100
OUTPUT VOLTAGE
4-157
LT137 A/LM 137
LT337 A/LM337
ABSOLUTE mAXimum RATinGS
Power Dissipation ............. Internally Limited
Input to Output Voltage Differential .... ~ . . . .. 40V
Operating Junction Temperature Range
LT137A1LM137 ............. -55°C to 150°C
LT337A1LM337 ................ O°C to 125°C
Storage Temperature Range
LT137A1LM137 ............. -65°C to 150°C
LT337A1LM337 ........... " -65°C to 150°C
Lead Temperature (Soldering, 10 sec.). . . . .. 300°C
PRECOnDITiOninG
100% THERMAL LIMIT BURN-IN
a
PACKAGE/ORDER InFORmAI'IOn
ORDER
BOTTOM VIEW
A
ru
VOUT
••
1
2
o
CASE IS V
tj
PART 00
LT137AK
LM137K
LT337AK
LM337K
K PACKAGE
ORDER
BOTTOM VIEW
CJ~
2@
VOUT
30
VIN
CASE IS INPUT
PART 00.
LT137AH
LM137H
LT~37 AH
LM337H
H PACKAGE
FRONT VIEW
lOll I~
ORDER
PART NO.
::~~T
LT337AT
LM337T
-ADJ
T PACKAGE
ELECTRICAL CHARACTERISTICS (See note 1)
LMI37
SYMBOL
VREf
PARAMETER
Reference Voltage .
aVOUT
alouT
Load Regulation
~
Line Regulation
liN
aVIN
m
lAX
UNITS
-1.225 -1.250 -1.275
V
-1.200 -1.250 -
V
15
0.3
20
0.3
25
0.5
50
1.0
mV
%
mV
%
0.01
0.02
0.02
0.05
"'"IV
%IV
Ripple Rejection
Minimum Load Current
Isc
Current Limit
A
A
1.0
0.003
12
2.3
4-158
0.003
15
3.0
12
2.3
lib
'!b
%
15
3.0
·CIW
·C/W
.L7urntB
LT137 A/LM137
LT337 A/LM337
ELECTRICAL CHARACTERISTICS (See note 1)
SYMBOL
VREF
~
PARAMETER
Reference Voltage
Load Regulation
alour
~
aVIN
Line Regulation
Ripple Rejection
IADJ
alADJ
Thermal Regulation
Adjust Pin Current
Adjust Pin Current Change
Minimum Load Current
Isc
~
aTemp
~
aTime
en
8JC
Current Limit
Temperature Stability of Output
Voltage (Note 4)
Long Term Stability
RMS Output Noise
(% of Your)
Thermal Resistance
Junction to Case
LT337A
CONDITIONS
IVIN-Vourl ~ 5V, lour ~ 10mA,
Tj ~ 25'C
MIN
10mA I~ lour .. ~i~
3V.. VIN - Vour .. 40V
IVIN-Vourl .. 40V
IVIN-Vourl .. 10V
IVIN-Vourl .. 15V,
K and T Package
HPackage
IVIN-Vourl ~ 40V,
Kand T Package
Tj ~ 25'C
H Package
TA
~
125'C, 1000 Hours
TA
~
25'C, 10Hz", f .. 10kHz
HPackage
K Package
T Package
The. denotes the specifications which apply over the full operating
temperature range.
The shaded electrical specifications indicate those parameters
which have been improved or guaranteed test limits provided for the
first time.
NaIll: Unless otherwise indicated, these specifications apply:
I VIN - VOUT I = 5V; and lOUT = O.1A for the H package, lOUT = O.5A
for the K and T packages. Power dissipation is internally limited.
However, these specifications apply for power dissipation up to 2W
for the H package and 20W for the K and T packages. IMAX = 1.5A
for the K and T packages, and O.2A for the H package.
MAX
MIN
LM337
TYP
MAX
-1.238 -1.250 ';';1:& . -1.213 -1.250 -1.287
3V .. IVIN - Vour 1 .. 40V
10mA .. lour" IMAX, P .. PMAX
10mA '" lour" IMAX, (See Note 2 &
3)
Tj ~ 25'C, IVourl .. 5V
Tj ~ 25'C, IVourl;;, 5V
IVourl .. 5V
IVourl;;, 5V
3V .. IVIN' Your I", 40V, (See Note
2)
Tj ~ 25'C
Your ~ -10V, f ~ 120Hz
CADJ ~ 0
CADJ ~ 10!,F
T ~ 25'C, 10msec Pulse
TYP
'
•
•
V
.
• ..: 1.220::" 1.250 '::"1.200
5
0.1
10
0.2
UNITS
- 1.200 - 1.250 -1.300
V
15
0.3
20
0.3
50
1.0
70
1.5
mV
%
mV
%
0,01
0.02
0.04
0.07
25
0.5
50
1.0
"
•
•
•
••
•
•
••
0.005 0.01
M1 0.03
60
70
66
80
Q.Ofl2
- 86_
02.
.'0*
<0.15
•
o.pg
100
2
t.O
5
:t~
5
s:
12
1.5'
'0.5
66
2.2
0.&,
.,'
U'
U'
,1.0<
0Ji
0.25' ·0.5
··M
0.3
1.5··
1.0
0.003
"
12
60
77
0.003
65
0.5
2
2.5
1
0.04
100
5
5
10
6
1$
dB
dB
%/W
~
!'A
~
rnA
rnA
1.5
0.5
2.2
0.8
A
A
0.15
0.10
0.4
0.17
A
A
0.6
0.3
1.0
0.003
ao
t:~;> u'
IL
::5"
%IV
%IV
12
2.3
3
%
%
%
15
3.0
5
'C/W
'C/W
'C/W
Noll 2: Testing is done using a pulsed low duty cycle technique. See
thermal regulation specifications for output changes due to heating
effects. Load regulation is measured on the output pin at a point 1/8"
below the base of the K and H package and at the junction of the
wide and narrow portion of the lead on the T package.
Noll 3: Load Regulation for the LT337 AT is the same as for LM337T.
Nota 4: Guaranteed on LT137A and LT337A, but not 100% tested In
production.
4-159
LT137 A/LM137
LT337 A/LM337
TYPICAL PERFORmAnCE CHARAOERISTICS
Dropout Voltage
Temperature Stability
3.0
Minimum Load Current
f.8
1.270
1.6
2.6
~ 1.260
i;
2.2
- -
1.4
1.0
,>'C
"\~
",
, , ..,. f-'f
,,~
. / i"""
"'
~
I- ",,>'C
\'
1.8
,\'
!!j
~
i::
/
.'C
~
0.8
1.2
1.6
Ripple Rejection
:z
!
~
'"
CLJ10,.f
60
cL~lo
l'~
~
~
~
~
~ Jv
'"
-20
,
-30
60
~
u
~
re 100 m5 ffiO
/t AOJ -
>-1;;:
0.2
~:z
5-1;;:
:., 1_\
~~
-0.2
o
-0.4
!z
IL ~ 50mA
Tj - 25'C
CL- 1.F
-1.0
20
TIME (ps)
30
40
II!
-0.5
B
-1.0
~
-1.5
~~I
CADJ - 1O.F
1 1
1 1
JIN ~ ~15V
-0.6
VOU~ ~ -10V
10
10
0.1
OUTPUT CURRENT (A)
1
r- I--
F
VIN - -15V
VOUT - -10V
f-120Hz
Tj - 25'C III
0.6
1
lo• -
40
!l!
' ..
lOOk
10k
CADJ - 1O.F
~ I--
-0.5
40
CAOJ ~ 0
o
lk
J\CAOJ~O
-0.4
10-3
100
!
10,.f
"'"-
1
1
w
10.F
~~
10
~
"'-.
100
0.6
-
....
S
z
FREQUENCY (Hz)
0.4
30
III
Line Transient Response
F===== CADJ -
o 10-2
.
J
10
~~
20
iii"
..... CAOJ
0.8
I'
10
INPUT-OUTPUT DIFFERENTIAL (V)
80
VIN - 15V
VOUT - -10V
IL- 500mA
T) - 25'C
20
Output Impedance
VIN - -15V
VOUT- 10V
IL- 500mA
100 ~CL- 1.F
T)- 25'C
o
Ripple Rejection
CF~ I'\.. ....
40
-40
101
~
0
......."
OUTPUT VOLTAGE (V)
110- 1
rr-
100
80
VIN-VOUT
20 -IL~ 500mA
f - 120Hz
Tj - 25'C I
-10
Tj_-:,~:O:: ~
Ripple Rejection
80
40
0.6
0.4
100
o
:s
a
v'
TEMPERATURE ('C)
100
~i'...
Tj - 25'C
z
M:! 0.8
o
-re-~-u
2.0
/.,
1.0
0.2
OUTPUT CURRENT (A)
~
~
>-
1.230
0.4
Jr>'
.,. , ,
,,
1.2
-
>!'
~
Tj~ -55'C.~
1.4
~
,
\
VOUT - -10V
INL- 50mA
Tj - 25'C
CL- M
10
20
TIME (ps)
'"
I
J
If
30
40
LT137 A/LM 137
LT337 A/LM337
TYPICAL PERFORmAnCE CHARACTERISTICS
Load Regulation*
Adjustment Current
Current Limit
80
~
!;c
0.4
f---t-+-+--+-f---t-+-+-+--f
0.2
f---t-+-+--+-f---t..."rt-+-I
I:........
--Tj-25"C
- - - - Tj - -55"C
-1- Tj-150"C
~
~
" i'.
~~EV1CES
~
,,
\~
;5
s;!
5
75
1
TANDK
, PACKAGED
-0.2
f---t-+-+--+-f--+--==!'-4-+-I
-0.4
f---t-+-+--+-f---t-+-+-+-I
~
is
0.4
0.8
1.2
1.6
-
H
PACKAGED
-I
2.0
OUTPUT CURRENT (A)
"The LT137A1337A has load regulation com·
pensation which makes the typical unit read
close to zero. This band represents the typi~
cal production spread.
DEVr
10
Output Voltage: The output voltage is determined by
two external resistors, R1 & R2 (see Figure 1). The exact formula for the output voltage is:
vR.,
(
1+
~~ )
,
'\ ".... ~ ~ t-=:;.
20
50
-~-w-~
40
30
+ IAOJ (R2)
Where: VRef = Reference Voltage, IADJ = Adjustment
Pin Current. In most applications, the second term is
small enough to be ignored, typically about O.S% of
VOUT • In more critical applications, the exact formula
should be used, with IADJ equal to 6S}La. Solving for R2
yields:
""
i.-
55
~ ~ 1=-=
INPUT· OUTPUT DIFFERENTIAL (V)
APPLICATion InFORmATion
VOUT =
~
V .....
0
~
w
~
100~5MO
TEMPERATURE ("C)
absorb the current, but care must be taken in no-load . , .
situations where R1 and R2 have high values. The . .
maximum value for the operating current, which must
be absorbed, is SmA for the LT137A. If input-output
voltage differential is less than 10V, the operating current that must be absorbed drops to 3mA.
+C,
R2
10~F
+
+
4--IADJ
C2
t
!
5~
-=
C3
l~F
Al
VREF
-V~
-VOUT
Figure 1
Smaller values of R1 and R2 will reduce the influence of
IADJ on the output voltage, but the no-load current
drain on the regulator will be increased. Typical values
for R1 are between 100n and 300n, giving 12.SmA
and 4.2mA no-load current respectively. There is an
additional consideration in selecting R1, the minimum
load current specification of the regulator. The operating current of the LT137A flows from input to output. If
this current is not absorbed by the load, the output of
the regulator will rise above the regulated value. The
current drawn by R1 and R2 is normally high enough to
EXAMPLES:
1, Aprecision 10V regulator to supply up to 1Amp load current.
a. Select R, = 1000 to minimize effect of IAOJ
b. Calculate R2 = VOUT - VR.' = 10V - 1,25V = 7040
VRe' _ I
1,25V - 65 A
R,
AOJ
1000
IL
2. A15V regulator to run off batteries and supply 50mA.
VIN MAX = 25V
a. To minimize battery drain, select R, as high as possible
R, = 1,25V = 4170, use 4040, 1%
3mA
4-161
LT137 A/LM137
LT337 A/LM337
b. The high value for R1 will exaggerate the error due 10 IADJ. so
Ihe exact formula to calculate R2 should be used.
15V - 1.25V
R2 = VOUT - VAe,
45390
1.25V
VRe'
I
_ 65 X 10-6
- AOJ
R1
4040
Use R2 = 45300
Capacitors and Protection Diodes: An output capacitor,
C3, is required to provide proper frequency compensation of the regulator feedback loop. A 1",F or larger
solid tantalum capacitor is generally sufficient for this
purpose ifthe 1MHz impedance ofthe capacitor is 20
or less. High capacitors, such as Mylar, are not recommended because they tend to reduce the phase
margin at light load currents. Aluminum electrolytic
capacitors may also be used, but the minimum value
should be 10",F to ensure a low impedance at 1MHz.
The output capacitor should be located within a few
inches of the regulator to keep lead impedance to a
minimum. The following caution should be noted: if
the output voltage is greater than 6Vand an output capacitor greater than 20",F has been used, it is possible
to damage the regulator if the input voltage becomes
shorted, due to the output capacitor discharging into
the regulator. This can be prevented by using diode 01
(see Figure 2) between the input and the output.
a
01
°IN4002
001 protec1s the regulator from input shor1s to "02 protects the adjust pin of the regulator
ground. It is required only when C3 is larger
from output shorts nC2 is larger than 10#F
than 20#F and Vour is larger than Sv,
andVoor is larger than -25V.
Figure 2
Proper Connection of Divider Resistors: The LT137A has
an excellent load regulation specification of 0.5% and
is measured at a point 1/8" from the bottom of the
package. To prevent degradation of load regulation,
the resistors which set output voltage, R1 and R2,
must be connected as shown in Figure 3. Note that the
positive side of the load has a true force and sense
(Kelvin) connection, but the negative side of the load
does not.
/
Lead resistance here does not
affect load regulation.
The input capaCitor, C2, is only required if the regulato'r is more than 4 inches from the raw supply filter
capacitor.
Bypassing the Adjustment Pin: The adjustment pin of the
LT137A may be bypassed with a capaCitor to ground,
C1, to reduce output ripple, noise, and impedance.
These parameters scale directly with output voltage if
the adjustment pin is not bypassed. A bypass capaCitor reduces ripple, nOise, and impedance to that of a
1.25V regulator. In a 15V regulator for example, these
parameters are improved by 15V11.25V = 12 to 1.
This improvement holds only for those frequencies
where the impedance of the bypass capaCitor is less
than R1. Ten microfarads is generally sufficient for
60Hz power line applications where the ripple frequency is 120Hz, since Xc = 1300. The capaCitor
should have a voltage rating at least as high as the
output voltage of the regulator. Values larger than
10",F may be used, but if the output is larger than 25V,
a diode, 02, should be added between the output and
adjustment pins (see Figure 2).
4-162
,
Lead resistance here degrades
load regulation. Minimize
the length of this lead.
Figure 3
R1 should be connected directly to the output lead of
the regulator, as close as possible to the specified
pOint 1/8" from the case. R2 should be connected to
the positive side of the load separately from the positive (ground) connection to the raw supply. With this
arrangement, load regulation is degraded only by the
resistance between the regulator output pin and the
load. If R1 is connected to the load, regulation will be
degraded.
LT137 A/LM137
LT337 A/LM337
TYPICAL APPLICATions
High Stability Regulator
The output stability, load regulation, line regulation,
thermal regulation, temperature drift, long term drift,
and noise, can be improved by a factor of 6.6 over the
standard regulator configuration. This assumes a
zener whose drift and noise is considerably better
than the regulator itself. The LM3298 has 20PPM/oC
maximum drift and about 10 times lower noise than
the regulator.
In the application shown below, regulators #2 to "N"
wi" track regulator # 1 to within ± 24mV initially, and
to ± 60mV over a" load, line, and temperature conditions. If any regulator output is shorted to ground, a"
other outputs will drop to ""' - 2V. Load regulation of
regulators 2 to "N" will be improved by Vour/1.25V
compared to a standard regulator, so regulator #1
should be the one which has the lowest load current.
.2·
7V
lM329B
+
.,
1,.005
0.Q1·'
0.01
0.03
.'.
00
60
70
0.002
65
0.2
2
,
15
0.3
66
0.04
100
2
6
20
0.3
50
1.0
70
1.5
mV
%
mV
%
0.01
0.02
0.04
0.07
%/V
%/V
60
77
0.003
65
2
3
2.5
1
0.04
100
5
6
10
6
dB
dB
%/W
I'A
I'A
I'A
mA
mA
2.&
·5
'1.2
3'
1.5
0.5
2.2
0.8
3.5
1.8
1.5
0.5
2.2
0.8
3.5
1.8
A
A
0.1
0.05
0.4
0.17
0.8
0.5
0.1
0.05
0.4
0.17
0.8
0.5
A
A
1},6
1.'5
0.6
0.3
1.0
0.3
" .. '
0.003
%
1.0
0.003
%
%
(% of VOUT)
0JC
Thermal Resistance
Junction to Case
H Package
K Package
The. denotes the specifications which apply over the full operating
temperature range.
The shaded electrical specifications indicate those parameters which
have been improved or guaranteed test limits provided for the first time.
Note 1: Unless otherwise indicated, these specifications apply:
IV IN - VouTI = 5V; and lOUT = O.lA for the H package, lOUT = 0.5A
for .the K package. Power dissipation is internally limited. However, these
specifications apply for power dissipation up to 2W for the H package
and 20W for the K package. I MAX = 1. 5A for the K package, and 0, 2A
for the H package.
12
2.3
15
3.0
12
2.3
15
3.0
°C/W
°C/W
Note 2: Testing is done using a pulsed low duty cycle technique. See
thermal regulation specifications for output changes due to heating
effects. Load regulation is measured on the output pin at a point
1/8 inch below the base of the K and H package.
Note 3: Guaranteed on the LT137AHV and LT337AHV, bul noll00%
tested in production.
4-167
LT137 AHV/LT337 AHV
LM137HV/LM337HV
SCHEmATIC DIAGRAm
o~
ADJ
02~
2k
'"
D4
r-: .... 15"
20.
"....k....J
L......A-04
05
oj
750
",-W
01
~
'"
00k
"'"
.
00
6"
,
~u~~·
~
..
os{ '"
20
20
~
'2k~~'"
460
tQ.n
017
018
..
K"
4211.
6k
1'''' .... ""
"h,J
.
4k
~
,.1
'50
1'03'
1"",
...
10
100
.---
029
Ik
12k
~
""I"
~p, KQ20~r<02'
015
~o"
~~R
:-. 15.
01
600
220
~O11
09
lY-:
.
'7J
~25
00.
100
24k
500
v.
PACKAGE DESCAIPnOn
KPackage TO-3 STEEL Metal Can
HPackage 3-Lead Metal Can
0.350-0.310
t
0320-0350
(8.890-9.398)
~
(1.52-343)
IlIA
0.165-0185
(4.191-4.70)
~13~.c====;==~~==t
0.305-0335
(7.747-8.509)
IlIA
0420-0480
(10.67-1219)
+
~3~:=~:;
RTYP
~4':!=~ ~~ RTYP
0.495-0.525
~
TJMAX
137AHV
137HV
337AHV
337HV
4-168
150'C
125'C
6JC
TJMAX
8JC
3'CIW
137AHV
137HV
150'C
15'CIW
3'CIW
337AHV
337HV
125'C
15'CIW
L7LlnFAD
U,
LT138A/LT338A
LM138/LM338
TECHNOLOG!:fY~-~5-A~m-p~P-oS~it~iv-e-A~d~j-uslllll!lta-b!lll!l-e
Voltage Regulator
FEATURES
DESCRIPTiOn
•
•
•
•
•
The lT138A series of adjustable regulators provide 5
amps output current over an output voltage range of
1.2 volts to 32 volts. The internal voltage reference is
trimmed to less than 1%, enabling a very tight output
voltage. In addition to excellent line and load regulation, with full overload protection, the lT138A incorporates new current limiting circuitry allowing large
transient load currents to be handled for short periods. Transient load currents of up to 12 amps can be
supplied without limiting, eliminating the need for a
large output capacitor.
Guaranteed 1% Initial Tolerance
Guaranteed 0.3% load Regulation
Guaranteed 5 Amp Output Current
100% Thermal limit Burn-in
12 Amp Transient Output Current
APPLlCAI'IOnS
•
•
•
•
High Power linear Regulator
Battery Chargers
Power Driver
Constant Current Regulator
The lT138A is an improved version of the popular
lM138 with improved circuit design and advanced
process techniques to provide superior performance . .
and reliability.
..
The graph below shows the significant improvement
in output voltage tolerance achieved by using the
LT138A or LT338A.
* Parallal Regulators lor Higher Currant
Output Voltage Error
11 r--t---I-Httttt---t---I-Htttt!
~10r--t---I-Httttt---t---I-Htttt!
~ 9 r--t---I-Httttt---t---I-Htttt!
••
LT350A
0.D160
Vour
VIN
AOJ
1210
1%
3650
1%
• TIIS ClRClIT WIll NOT IWRK
WITH LM VERSION DEVICES
··~S~~GRESI~~
DEGRADE llEGULATION TO 1%
~
W~
8
7
6
~
5
~
S!
~
§
t=tjj:t:U~%R~ESI:eST~OR:JS~LM3~3BW
~
1%RESISTORS
J.J~
t
2% RESISTO S l3I:M
4 f-46'~--+-:l;oolo'l"l'l+nt-'+-I-t++tttI
3
io"
1% RESI TOlslL+:k~1
2
1
I~
_
~~"'Httttt---t---I-Htf-ltHl
PII
111111
O~~~~'I~I~~I~I~II~III
2
4 68m
~
~
mo
OUll'UT VOLTAGE
4-169
LT138A/LT338A
LM 138/LM338
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Power Dissipation ............. Internally Limited
Input to Output Voltage Differential . . . . . . . . .. 35V
Operating Junction Temperature Range
LT138A1LM138 ............. -55°C to 150°C
LT338A1LM338 ................ ooe to 125°C
Storage Temperature Range
LT138A1LM138 ............. -65°C to 150°C
LT338A1LM338 ............. -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
BOTIOMVlEW
ORDER PART NUMBER
LT138AK
LT338AK
LM138K
LM338K
KPACKAGE
TO·3 METAL CAN
(STEEL)
PREconDITiOninG
100% THERMAL LIMIT BURN-IN
ELECTRICAL CHARAnERISTICS (See note 1)
LT138A
SYMBOL
VREF
PARAMETER
Reference Voltage
CONDITIONS
lOUT = 10mA TI = 25°C
3V ..; (VIN - VOUT) ..; 35V
10mA ..; lOUT ..; 5A, P ..; SOW
aVOUT
aVIN
~
Line Regulation
Load Regulation
alOUT
Thermal Regulation
Ripple Rejection
IAOJ
alAOJ
Isc
Adjust Pin Current
Adjust Pin Current Change
Minimum Load Current
Current Limit
3V ..; (VIN - VOUT) ..; 35V, (See
Note 2)
TA = 25°C
10mA ..; lOUT ..; 5A, (See Note 2)
TA = 25°C
VOUT "; 5V
VOUT ~ 5V
VOUT "; 5V
Vour ~ 5V
TA = 25°C, 20msec pulse
VOUT = 10V, f = 120Hz
CAOJ = 0
CAOJ = 10!LF
10mA ..; lOUT ..; 5A,
3V ..; (VIN-VOUT) ..; 35V
(VIN - Vour) = 35V
(VIN - Vour) ..; 10V
DC
0.5ms peak
(VIN - Vour) = 30V, T = 25°C
~
Temperature Stability
~
Long Term Stability
RMS Output Noise
("10 of Vour)
Thermal Resistance
Junction to Case
•
TYP
MAX
1.238
1.250
1.262
1.225
1.250
1.270
•
••
••
•
•
•
••
LM138
MIN
60
5
7
MIN
TYP
MAX
1.19
1.24
1.29
UNITS
V
V
0.005
0.02
0.01
0.04
0.005
0.02
0.01
0.04
"IoN
"IoN
5
0.1
15
0.3
5
0.1
15
0.3
mV
"10
20
0.3
0.002
30
0.6
0.01
20
0.3
0.002
30
0.6
0.01
mV
"10
60
75
45
0.2
3.5
"Io1W
100
60
75
45
100
!LA
5
5
0.2
3.5
5
5
!LA
mA
60
5
7
8
12
A
A
8
12
1
A
1
2
1
"10
TA = 125°C, 1000 Hours
0.3
1
0.3
TA = 25°C, 10Hz..; f ..; 10kHz
0.001
aTemp
1
dB
dB
•
1
"10
aTime
en
9JC
4-170
K Package
0.003
1
"10
1
°CIW
LT 138A/LT338A
LM138/LM338
ELEnRICAL CHARAnERISTICS (See note 1)
SYIBOL
MRAIETER
eOlalnoa
VREF
Reference Voltage
lour = 10mA TA
=
25°C
3V .. (VIN - Your) .. 35V
10mA .. lour" 5A, P .. 50W
~
diN
~
dour
Line Regulation
Load Regulation
Thermal Regulation
Ripple Rejection
IAOJ
dlAOJ
Adjust Pin Current
Adjust Pin Current Change
Isc
Minimum Load Current
Current Limit
3V .. (VIN - Your) .. 35V, (Sea
Note 2)
TA = 25°C
10mA .. lour .. 5A, (Sea Note 2)
TA = 25°C
Vour" 5V
Vour " 5V
Vour" 5V
Vour" 5V
TA = 25°C, 20msec Pulse
Vour = 10V, 1 = 120Hz
CAOJ = 0
CAOJ - 1Ol'F
10mA .. lour .. 5A,
3V .. (VIN-Vour) .. 35V
(VIN - Your) = 35V
(VIN - Your) .. 10V
DC
0.5ms peak
(V IN - Vour) = 30V, TI = 25°C
TYP
MAX
1.238 1.250 1.262
III
•
1.226
1.19
•
••
•
5
7
MAX
DilTS
1.24
1.29
V
.
0.005
0.02
0.03
0.06
'ioN
'Io1V
5
0.1
o.s
15
5
0.1
25
0.5
mV
20
SO·
0.6
0.002
0.02
20
0.3
0.002
50
1
0.02
mV
0.3
'10
'Io1W
60
75
60
TYP
V
1.270
0.005 OJ)1
0.02 0.04
•
••
••
•
•
1.250
45
100
45
100
0.2
3.5
5
10
0.2
3.5
5
10
p,A
mA
60
8
12
5
7
60
75
'10
dB
dB
p,A
8
12
A
A
'10
..
1
1
2
2
1
1
1
0.3
~
d emp
Temperature Stability
~
dime
Long Term Stability
TA
=
125°C, 1000 Hours
0.3
RMS Output Noise
TA
=
25°C, 10Hz .. 1 .. 10kHz
0.001
e.
LI331
LT338A
III
A
1
'10
'10
0.003
('10 01 Vour)
8JC
Thermal Resistance
Junction to Case
K Package
1
1
°C/W
The. denotes the specifications which apply over the full operating
temperature range.
NaIll: Unless otherwise specified, these specifications apply:
VIN - Vour = SV and lOUT = 2.SA. These specifications are
applicable for power dissipations up to SOW.
11101, 2: See thermal regulation specifications for changes in output
voltage due to heating effects. Load and line regulation are
measured at a constant junction temperature by low duty cycle
pulse testing.
4-171
LT 138A/LT338A
LM 138/LM338
TYPICAL PERFORmAnCE CHARACTERISTICS
Load Regulation
Adjustment Current
Dropout Voltage.
0,2
AVour
l
65
= 100mV
60
0,1
~
0 I-lour=3A
!;(
~
~
lour
-0,1
I!
c5
5A
.~
~~
~
~i"'-oo.
-02
:>
~
-0.4
VIN
15V
Your = 10V
PRELOAD = 50 mA
25 50
Temperature Stability
~
45
~
40
«
Its
20 1.260
i"!
1.250
V
, /V
V
/"
~
35
25 50 75 100125 150
-75
-25
1/......
l"-
I
~
25
75
125
TEMPERATURE ('C)
Minimum Operating Current
Output Impedance
10
~
1.240
50
TEMPERATURE ('G)
1.270
i:I!
~
......"i-"'"
30
-75-50-25 0
75 100 125150
TEMPERATURE ('C)
i
-
jQI,Ir= 3A
55
ffi
1
-75-50-25 0
~
Ii- ....
lour~ I"- r- r-
L
,
0-0,3
I,.-
lour= 5A
1;
,---,----r---,---,---,
/1;::/' ~
V V f/
TJ=150'~
0,1
0.Q1
o 0,001
TJ=25'C
1--+---+----,;"1---+--1
I--t-~"f--.;ro.
{~
hiiOiii......~+--
-
~
~V
/
/ ' LTJ=-55'C
lour = 500 mA
0,0001
1.230
-50 -25 0
25
50
75
10
100 125 150
100
Ripple Rejection
100
,
80
1D
:Eo
z
0
&l
i
10k
80
CADJ = 0"""'"
I--
f = 120Hz
Ti = 25 'C
o
10
20
25
OUTPUT VOLTAGE (V)
4-172
30
35
25
30
35
40
10~F
~ 70
CAQJ = 0
&l 60
~
,
~
~
0:
o
15
20
-.Ji~
~
"'~
'\.
1
. 0
,,
20 I- v... = 15V
Your = 10V
rlour = 0,2A
I
15
Ripple Rejection
~1DJ=lOJ-
~
I
VIN - Vour = 5V
lour = 500mA
10
INPUT-OUTPUT DIFFERENTIAL (V)
80
60
20
5
1M
Ripple Rejection
j'.... ~Io
40
100k
100
CA~= 1LF
Ul
0:
1k
FREQUENCY (Hz)
TEMPERATURE ('C)
50
V... = 15V
Vour = 10V
f = 120Hz
TeASE = 25'C
40
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
0,1
10
OUTPUT CURRENT (A)
LT 138A/LT338A
LM 138/LM338
TYPICAL PERFORmAnCE CHARACTERlsncs
Current Limit
16
Current Limit
- PEAK CURRENT LIMIT
-
-~
IF- ,
Ji'-..
\
~ ~~~~~E~Jo~MIT ~
PRELOAD
o
o
10
!z
0
~""
i3
~ 6
It'::RElOAD ~ lA
~>
........
PRELOAD-
ll:' 8
11111
~ElOAD ~
t-
g 10
,
20
'II
12
~ 0 -I
lVR~LOJ ~ dA
I 1\~.
f\.
I
Current Limit
14
5
...
4
VIN. ~ 10V
Vour ~ 5V
l"- t-
30
o TC~EIII~~~I?
40
0.1
10
INPUT-OUTPUT DIFFERENTIAL (V)
100
TIME (ms)
TIME (ms)
Line Transient Response
Load Transient Response
1.5
1.0
w
~~
§?~
5~
Cl
0.5
0
~
~
~
VOUT
-1.0 -lOUT
~
TI
~
-1.5
.....
~
~~ -0.5
5
Cl~O;CAOJ~O
/'F; Cl ~ 10/,F\
10V
COUT~ 0
SOmA -CADJ~O ' - 25°C
V
~
z
10
20
30
40
TIME (/,s)
I"
-
VCl ~ l/'F; CAOJ ~ 10/,F
I
VIN ~ 15V
VOUT ~ 10V
~:~~ 25
-3
-
0
)?0 mA_
6
~
4
~
'3
2
I
1\
\
0
10
20
30
40
TIME (j-- VOUT
VOUT = VREF ( 1
+
:~ ) + IADJ R2
Basic Adjustable Regulator
Figure 1
close to the ± S% supply tolerance required in many
logic and analog systems. Further, even 1% resistors
can drift 0.01%1 ac, adding additional error to the output voltage tolerance.
4-173
LT 138A/LT338A
LM 138/LM338
For example, using 2% resistors and ±4% tolerance for VREF , calculations will show that the
expected range of a 5V regulator design would be
4.66V,.. VOUT ,.. 5.36Vor approximately ± 7%. If the
same example were used for a 15V regulator, the expected tolerance would be ± 8%. With these results
most applications required some method of trimming,
usually a trim pot. This solution is both expensive and
not conducive to volume production.
One of the enhancements of Linear Technology's adjustable regulators over existing devices is the tightened initial tolerance of VREF. This allows relatively
inexpensive 1% or 2% film resistors to be used for R1
and R2 to set the output voltage within an acceptable
tolerance.
With a guaranteed 1% reference, a 5V power supply
design, using ± 2% resistors, would have a worst
case manufacturing tolerance of ± 4%. If 1% resistors
are used, the tolerance will drop to ± 2.5%. A plot of
the worst case output voltage tolerance as a function
of resistor tolerance is shown on the front page.
For convenience, a table of standard 1% resistor values is shown below.
1.47
1.50
1.54
1.58
1.62
1.65
1.69
1.74
1.78
1.82
1.87
1.91
1.96
2.00
2.05
2.10
2.15
2.21
2.26
2.32
2.37
2.43
2.49
2.55
2.61
2.67
2.74
2.80
2.87
2.94
3.01
3.09
3.16
3.24
3.32
3.40
3.48
3.57
3.65
3.74
3.83
3.92
4.02
4.12
4.22
4.32
4.42
4.53
4.64
4.75
4.87
4.99
5.11
5.23
5.36
5.49
5.62
5.76
5.90
6.04
6.19
6.34
6.49
6.65
6.81
6.98
7.15
7.32
7.50
7.68
7.87
8.06
8.25
8.45
8.66
8.87
9.09
9.31
9.53
9.76
Standard Resistance Values are obtained from the Decade Table
by multiplying by multiples of 10. As an example, 1.21 can represent 1.210, 12.10, 1210, 1.21KO etc.
Bypass Capacitors
Input bypassing using a 1J.1.F tantalum or 25J.1.F electrolytic is recommended when the input filter capacitors
are more than 5 inches from the device. Improved ripple rejection (80 dB) can be accomplished by adding a
4-174
...
D1 "'IN4002
LT338A
VIN---<~
VOUT
OUT t--+-........-~-
IN
ADJ
l...-....:::r-1----J
10~F
R1
~~
~+ 100~F
:t~Tc~.-- ~
1-::-
COUT
'AOJ
R2
NOT NEEDED
Figure 2
Table of %% and 1% Standard Resistance Values
1.00
1.02
1.05
1.07
1.10
1.13
1.15
1.18
1.21
1.24
1.27
1.30
1.33
1.37
1.40
1.43
10J.l.F capacitor from the adjust pin to ground.lncreasing the size of the capacitor to 20J.l.F will help ripple
rejection at low output voltage since the reactance of
this capacitor should be small compared to the voltage
setting resistor, R2. For improved AC transient response and to prevent the possibility of oscillation due
to unknown reactive load, a 1J.1.F capacitor is also recommended at the output. Because of their low impedance at high frequencies, the best type of capacitor to
use is solid tantalum.
Protection Diodes
The LT138A1338A do not require a protection diode
from the adjustment terminal to the output (see figure
2). Improved internal circuitry eliminates the need for
this diode when the adjustment pin is bypassed with a
capacitor to improve ripple rejection.
If a very large output capacitor is used, such as a
100J.l.F shown in figure 2, the regulator could be damaged or destroyed if the input is accidentally shorted
to ground or crowbarred, due to the output capacitor
discharging into the output terminal of the regulator.
To prevent this, a diode 01 as shown, is recommended
to safely discharge the capacitor.
Load Regulation
Because the LT138A is a three-terminal device, it is
not possible to provide true remote load sensing. Load
regulation will be limited by the resistance of the wire
connecting the regulator to the load. The data sheet
specification for load regulation is measured at the
bottom of the package. Negative side sensing is a true
Kelvin connection, with the bottom of the output divider returned to the negative side of the load. Although it
may not be immediately obvious, best load regulation
is obtained when the top of the resistor divider, (R1), is
connected directly to the case not to the load. This is
illustrated in Figure 3. If R1 were connected to the
LT 138A/LT338A
LM 138/LM338
load, the effective resistance between the regulator
and the load would be
Rp
Rp X ( R2 R1
+ R1) , R
.
p = Parasl't'IC L'Ine ReSlstance.
RHO CASE
R1
Connected as shown, Rp is not multiplied by the divider ratio. Rp is about 0.0040 per foot using 16 gauge
wire. This translates to 4mV 1ft at 1A load current, so it
is important to keep the positive lead between regulator and load as short as possible, and use large wire or
PC board traces.
RL
R2
CONNECT R2
TO lOAD
Connections For Best Load Regulation
Figure 3.
TYPICAL APPLICATiOnS
Improving Ripple Rejection
1.2V-25V Adjustable Regulator
5V Regulator With Shut Down
VauTt
R1
240
5V
Vour
VIN
ADJ
+
+
C2t
l~f
• C, IMPIlOVES RIPPLE REJECTION
BE SMALL COMPARED TO R2
LT338A
Y,N
121!l
1%
1 ~F
2N3904
x.: SHOULD
365!)
1%
'" Needed if device is far from
filter capac"ors
t Optional-improves transient
response
*
VOUT
~
1.25V (1
:~
)
Temperature Compensated Lead Acid
Battery Charger
Remote Sensing
Rp (MAX DROP 300mV)
+
OUTPUT
k-----------~~------------~5V
-=- 12V
RL
2k
365!)
RETURN
50k
RET
~--------~--~~~------~
4-175
LT 138A/LT 338A
LM 138/LM338
Lamp Flasher
Automatic Light Control
15V
YiN'"",
;
11~F
'~,
'~
15V
0tJ1'1-_--,
.,~,,~,".
12V
5A
l.2k
12V
12k
1OI'F
12k
10l'F
12k
10)'f
OFF
-.-J 2N3904
1k
Protected High Current Lamp Driver
, t.'rw
,:,',L__ ',,,
-=
+
SCHEmATIC DIAGRAm
LT138A/LT338A
r---_.------_1-----1~----t_--_.--1__1------------------~--_1----------~--t__{]V,N
02
160
0.01
L--+----4-------4_~~~__~_+~--4__4--4_--t_-----4----4-------------------~~--1J~UT
0.750-0775
PACKAGE DESCRIPTion
0325-0.350
(8.255-8090)
(2:A~6)
K Paekage To-3
Steel Metal Can
138A
138
338A
338
0.420-0.490
(12.168 12.192)
Tjmax.
Oja
0Je
150'C
35'CIW
l'CIW
35'CIW
l'CIW
125'C
n ( 1 9 3 0 4 19085)
0.116
~- r
, ,
• r - - L SEATING PlANf
0038-0.043
-I t- (0.965-1.092)
0.660-0.670
. _(~::~=~:~~~)
RTVP
2 MOONTING HOlES
0.151-0.161
(3.835-4.029)
DIA
4-176
F A"
L1n
L7 V
LT150A/LT350A
LM150/LM350
\I(
T8CHNOLOG~~~----3-A--m-p-P-o-S-it-iv-e-A-d-ju-s-ta-b-l-e
Regulator
FEATURES
DESCRIPTion
•
•
•
•
•
The LT150A Series are 3-terminal positive adjustable
voltage regulators which offer improved performance
over earlier devices. A major feature of the LT150Al
350A is the output voltage tolerance is guaranteed at a
maximum of ± 1%, allowing an overall power supply
tolerance to be better than 3% using inexpensive 1%
resistors. Line and load regulation performance has
been improved as well. Additionalty, the LT150AI
350A reference voltage is guaranteed not to exceed
2% when operating over the full load, line and power
dissipation conditions. The LT150Al350A adjustable
regulators offer an improved solution for all positive
voltage regulator requirements with load currents up
to 3 amps.
Guaranteed 1% Initial Voltage Tolerance
Guaranteed 3A Output Current
Guaranteed 0.3% Load Regulation
Guaranteed 0.01%1V Line Regulation
100% Thermal Limit Burn-in
APPLICATions
•
•
•
•
Improved Linear Regulators
Adjustable Power Supplies
Constant Current Regulation
Battery Chargers
Regulator With Reference
Output Voltage Error
12
VIN
l~FI
11
. traBOAT
SV
Your
\11
jI)J
121!l
>=-
10
~
8
~
a::
0
a::
2% RESISTORS LM3S0
j..o'
ffi
ttl
12111
2.SV
i:3
~
5
5
0
I't'T"'"
jjJJl
1% RESISTORS I L~js6~1
j..o'
:::>
L~1JJ I
2% RESISTQfts LT350A
~
I-
LT1009
1% RESISTORS
~
p
illW
III
III
4
6 810
llll
llll
20
40
100
OUTPUT VOLTAGE
4-177
LT 150AjLT350A
LM 150jLM350
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Power Dissipation ............. Internally Limited
Input to Output Voltage Differential . . . . . . . . .. 35V
Operating Junction Temperature Range
LT150AlLM150 ............. -55°C to 150°C
LT350AlLM350 ................ O°C to 125°C
Storage Temperature Range
LT150AlLM150 ............. -65°C to 150°C
LT350AlLM350 ............. -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
BOTTQMVIEW
ORDER PART NUMBER
v~
..
ADJUSTMEVNO
1
CAS<
~UTPUT
o
K PACKAGE
TO-3 METAL CAN
(STEEL)
YOUT
YIN
I
lol I~
PREconDITiOninG:
T PACKAGE
TO-220 PlASTIC
100% THERMAL LIMIT BURN-IN
LT150AK
LT350AK
LM150K
LM350K
2
YOUT
;J
LT350AT
LM350T
ADJ
ELECTRICAL CHARACTERISTICS (See note 1)
SYMBOL
VREF
PARAMETER
Reference Voltage
~
line Regulation
.M2l!L
Load Regulation
liV IN
liioUT
liVOUT
liTemp
Temperature Stability
li~gUT
li ime
Long Term Stability
en
TA
=
25°C, 10Hz ... f ... 10kHz
K Package
4-178
0.005
0.02
0.01
0.05
5
0.1
15
0.3
MIN
LM150
TVP
MAX
UNITS
V
1.20
1.25
1.30
V
0.005
0.02
0.01
0.05
0f01V
15
0.3
mV
'10
0.3
0.3
0.001
0.001
1.5
1.5
LT 150A/LT350A
LM150/LM350
ELECTRICAL CHARACTERISTICS (See note 1)
SYMBOL
VREF
PARAMETER
Reference Voltage
CONDITIONS
louT = lOrnA, Tj = 25'C
MIN
Line Regulation
A.VIN
~
Load Regulation
A.louT
Thermal Regulation
Ripple Rejection
IAOJ
A.I AOJ
Adjust Pin Current
Adjust Pin Current Change
Minimum Load Current
Current Limit
3V <;; (VIN - VOUT)
Note 2)
TA = 25°C
<;;
~
lOrnA <;; louT <;; 3A, (See Note 2)
TA = 25°C
VOUT <;; 5V
VOUT ;;> 5V
•
lOrnA <;; louT <;; 3A
3V <;; (VIN - VOUT) <;; 35V
(VIN - VOUT) <;; 35V
(VIN - VOUT) <;; 10V
=
TA = 25°C, 10Hz
UNITS
V
1.20
1.25
1.30
V
fUIOS M1
1l.n2 0.05
0.005
0.02
0.03
0.07
%IV
%/V
5
5
0.1
25
0.5
mV
%
20
0.3
0.002
70
1.5
0.03
mV
%
%/W
1.250
1m
15
OJ
15
50
0.3
1
·0.002 0.01
66
3
0.25
•
RMS Output Noise
(% of VOUT)
Thermal Resistance
Junction to Case
MAX
0.1
25°C
Temperature Stability
TA = 125°C
1m
•
••
••
•
•
•
•
VOUT <;; 5V
VOUT;;> 5V
TA = 25'C, 20msec Pulse
VOUT = 10V, f = 120Hz
CAOJ = 0
CAOJ = 10"F
Long Term Stability
LM350
TYP
35V, (See
(VIN - VOUT) = 30V, T
AVOUT
ATemp
MIN
MAX
1.23!l 1.250 1.262
3V <;; (VIN - VOUT) <;; 35V
lOrnA <;; louT <;; 3A, P <;; 30W
~
LT350A
TYP
65
86
50
0.2
3.5
4.5
66
100
65
86
50
3
0.2
3.5
4.5
0.25
5
10
dB
dB
100
"A
5
10
"A
rnA
A
,
1
A
~
1
%
0.3
1
0.3
1
1
%
A.Time
en
0jc
<;;
f
<;;
K Package
T Package
10kHz
0.001
0.001
1.2
3
1.5
4
1.2
3
%
1.5
4
°C/W
°C/W
The. denotes the specifications which apply over the full operating
temperature range.
Nol. 1: Unless otherwise specified, Ihese specifications apply for
VIN-VOUT = 5Vand lOUT = 1.5A. These specifications are
applicable for power dissipations up to 30W for the K package and
up to 25W for the T package. Power dissipation is guaranteed at
these values up to 15 Volts input-output differential. Above 15 Volts
input-output differential power dissipation is limited by device
internal protection circuitry.
Nol. 2: Regulation is measured at a constant Ti. Changes in output
due to heating must be taken into account separately. Pulse testing
with low duty cycle is used.
4-179
LT 150A/LT350A
LM 150/LM350
TYPICAL PERFORmAnCE CHARACTERISTICS
Current Limit
Load Regulation
Adjustment Current
0.1
65
I
~
tl
lOUT
I
~ 0.1
~
i"""-o
3A
~4
~
<.:>
~
~
~
!
"
I
~
~ 0.2
5o
0.3
~
TJ ~ 25°C
2
c--Tj
r\
0.4
a
0.5
-75-50-25 a
25
50
75 100 125 150
a
10
.
-
~
~
-
-
'OUT ~ 3A_
~
10U~ ~ ~A -
~
~
louTJ1-
25
I
CADJ
75
25
30
30
-75
35
-25
25
75
125
TEMPERATURE (0C)
Minimum Operating Current
1.250
i
V~
......
~
........
(:. ::::
a
25
50
75
5
100.125 150
80
z
!
i
I
~ ..,..- V
V
15
80
10 pF
~
10
""'fJ
'/"
~ IOJ-
"
60
CADJ~~
40
Vy,
20
~
~
ILTJ--55°C
20
25
30
35
40
Ripple Rejection
Ripple Rejection
I
-
......::~
v
~ V
INPUT-OUTPUT DIFFERENTIAL (V)
100
500 mA
'-- f ~ 120Hz
TI ~ 25°C
35
f"""..
TEMPERATURE (0C)
- VOOT - 5V
~
20
"
/'
~ 40
.........
V'
i-"""
TJ~1500~
1.230
-50 -25
125
I
lOUT
"
V
45
a: 1.240
'I'-- ~Io
W~
~
./
TJ~25°C
Ripple Rejection
80
...ffi
50
1.260
TEMPERATURE (OC)
100
~
i5
r...r--. .......
-25
ffi
150°C
,
1.270
100 mV
r... ....... I""r--. .......
0.5
-75
.:; 55
Temperature Stability
Dropout Voltage
~
15
~
:<
INPUT-OUTPUT DIFFERENTIAL (V)
TEMPERATURE (OC)
':'VOUT
60
t::: ~- -TJ T-5r C
\.
'\.\.
'\.
15V
VOUT ~ 10V
lOUT ~ 500 mA
r- ~ADJ
l?p~;
~ 70
S
CADJ
~60
a
~
i
~
Vtj ~ 15V
VOUT ~ 10V
f ~ 120Hz
TeASE ~ 25°C
50
"-
o
40
D
10
15
20
25
OUTPUT VOLTAGE (V)
4-180
30
35
10
100
lk
10k
FREQUENCY (Hz)
lOOk
1M
0.1
10
OUTPUT CURRENT (A)
LT150A/LT350A
LM150/LM350
TYPICAL PERFORmAnCE CHARACTERISTICS
Output Impedance
Line Transient Response
Load Transient Response
1.5
~
tl
~
~
~
0
w
CO~T ~ ri, CA6J -
~
0.1 J----t--+-~-_+______l
0 01
.
I---+~f---~
1
J
-0.5
ri
VOUT - 10V
lOUT - 50 mA
Ti - 25'C
"'i!:~
§!~
~~
1 .1
-1
7
"""'-+---
0.001 f--...........
~!z
1.5
1
g~ 0.5
:::>
<>
10
20
TIME (~s)
FREQUENCY (Hz)
~ LF, bADJ I~ 1OI'F
COJT
/
1
t""
V1N
\
30
40
t7
lI,...
il.
1 15V_ -
VOUT - 10V
PRELOAD - wOiiiA
Tj- 25'C-
V
-1.5
g
VOUT - 10V I
lOUT - 500mA
0.0001 ' - - - - ' - - - ' - - - - - ' - - - ' - - - - - '
10
100
lk
10k
lOOk
1M
0
-0.5
-1
If
COUT ~ 0, CADJ ~ 0,..
1
~~ 0.5
o
COUT - 1 ,F, CADJ - 10,F
1.5
-~
I
I
1\
\.
0
10
20
30
40
TIME (ps)
APPLICATion InFORmATion
General
The LT1S0A develops a 1.25V reference voltage between the output and the adjustable terminal (see Figure 1). By placing a resistor, R1, between these two
terminals, a constant current is caused to flow
through R1 and down through R2 to set the overall
output voltage. Normally this current is the specified
minimum load current of SmA or 10mA.
U150A
our I--r-_- VOUT
dangerously close to the ± S% supply tolerance required in many logic and analog systems. Further, . .
even 1% resistors can drift O.01%I O C, adding addi- . .
tional error to the output voltage tolerance.
For example, using 2% resistors and ± 4% tolerance
for VREF , calculations will show that the expected
range of a SV regulator design would be 4.66V 0;;; VOUT
0;;; S.36Vor approximately ± 7%. If the same example
were used for a 1SV regulator, the expected tolerance
would be ± 8%. With these results most applications
required some method of trimming, usually a trim pot.
This solution is both expensive and not conducive to
volume production.
Basic Adjustable Regulator
Figure 1
One of the enhancements of Linear Technology's adjustable regulators over existing devices is the tightened initial tolerance of VREF . This allows relatively
inexpensive 1% or 2% film resistors to be used for R1
and R2 to set the output voltage within an acceptable
tolerance.
Because IADJ is very small and constant when compared with the current through R1, it represents a
small error and can usually be ignored. It is easily
seen from the above equation, that even if the resistors
were of exact value, the accuracy of the output is limited by the accuracy of VREF. Earlier adjustable regulators had a reference tolerance of ± 4% which is
With a guaranteed 1% reference, a SV power supply
design, using ± 2% resistors, would have a worst
case manufacturing tolerance of ±4%.lf 1% resistors
were used, the tolerance would drop to ± 2.S%. A plot
of the worst case output voltage tolerance as a function of resistor tolerance is shown on the front page.
VOUT
=
VREF ( 1
+ ~~ ) +
IADJ R2
4-181
LT 150A/LT350A
LM150/LM350
For convenience, a table of standard 1% resistor values is shown below.
D1
IN4002
Table of V2% and 1% Standard Resistance Values
1.00
1.02
1.05
1.07
1.10
1.13
1.15
1.18
1.21
1.24
1.27
1.30
1.33
1.37
1.40
1.43
1.47
1.50
1.54
1.58
1.62
1.65
1.69
1.74
1.78
1.82
1.87
1.91
1.96
2.00
2.05
2.10
2.15
2.21
2.26
2.32
2.37
2.43
2.49
2.55
2.61
2.67
2.74
2.80
2.87
2.94
3.01
3.09
3.16
3.24
3.32
3.40
3.48
3.57
3.65
3.74
3.83
3.92
4.02
4.12
4.22
4.32
4.42
4.53
4.64
4.75
4.87
4.99
5.11
5.23
5.36
5.49
5.62
5.76
5.90
6.04
6.19
6.34
6.49
6.65
1-
+ 1DO~F
6.81
6.98
7.15
7.32
7.50
7.68
7.87
8.06
8.25
8.45
8.66
8.87
9.09
9.31
9.53
9.76
Rl
~---~ ~
R2
eour
NOT NEEDED
FOR LT150Al350A
Figure 2
Standard Resistance Values are obtained from the Decade Table
by multiplying by multiples of 10. As an example, 1.21 can represent 1.21f!, 12.1f!, 121f!, 1.21 Kf! etc.
If a very large output capaCitor is used, such as a
100p,F shown in Figure 2, the regulator could be damaged or destroyed if the input is aCCidentally shortell
to ground or crowbarred, due to the output capaCitor
discharging into the output terminal of the regulator.
To prevent this, a diode 01 as shown, is recommended
to safely discharge the capacitor.
Bypass Capacitors
Load Regulation
Input bypassing using a 1p,F tantalum or 25p,F electrolytic is recommended when the input filter capacitors
are more than 5 inches from the device. Improved ripple rejection (80 dB) can be accomplished by adding a
10p,F capacitor from the adjust pin to ground.lncreasing the size of the capacitor to 20p,F will help ripple
rejection at low output voltage since the reactance of
this capacitor should be small compared to the voltage
setting resistor, R2. For improved AC transient response and to prevent the possibility of oscillation due
to unknown reactive load, a 1p,F capacitor is also recommended at the output. Because of their low impedance at high frequencies, the best type of capaCitor to
use is solid tantalum.
Because the LT150A is a three-terminal device, it is
not possible to provide true remote load sensing. Load
regulation will be limited by the resistance of the wire
connecting the regulator to the load. The data sheet
specification for load regulation is measured at the
bottom of the package. Negative side sensing is a true
Kelvin connection, with the bottom ofthe output divider returned to the negative side of the load. Although it
may not be immediately obvious, best load regulation
is obtained when the top of the resistor divider (R1) is
connected directly to the case not to the load. This is
illustrated in Figure 3. If R1 were connected to the
load, the effective resistance between the regulator
and the load would be
Protection Diodes
Rp x (R2 ~ R1) , Rp = Parasitic Line Resistance.
The LT150Al350A do not require a protection diode
from the adjustment terminal to the output (see Figure
2). Improved internal circuitry eliminates the need for
this diode when the adjustment pin is bypassed with a
capaCitor to improve ripple rejection.
4-182
Connected as shown, Rp is not multiplied by the divider ratio. Rp is about 0.0040 per foot using 16 gauge
wire. This translates to 4mV 1ft at 1A load current, so it
LT 150A/LT350A
LM 150/LM350
is important to keep the positive lead between regulator and load as short as possible, and use large wire or
PC board traces.
Rp
PARASITIC
LINE RESISTANCE
CONNECT
RlTO CASE
R,
R2
.-------------ll~
J
CONNECT R2
TOLOAO
Connections for Best Load Regulation
Figure 3
TYPICAL APPLICATiOnS
1.2V-25V Adjustable Regulator
·Parallel Regulators for Higher Current
Improving Ripple Rejection
OUT
1-_----4.....V
..:.
*
I-_--Sv
~-
LT 338A
VIN
R'
240
*
t Optional-improves
transient response
••
Needed if device is far from
filter capacitors
* VOUT-1.2SV('+
• C, IMPROVES RIPPLE REJECTION Xc SHOULD
':" BE SMAlL COMPARED TO R2
:~)
Automatic Light Control
Adjustable Current Limiter
*
O.SII
LT:I\!OA
onl-_-~
'.2k
..
tT350A
~
SV
8
O.OHl
I
-
t
VOUT
ADJ
0.0'611
VW!
MJJ
I
• THIS CIRCUIT WILL NOT WORK
WITH LM VERSION DEVICES
8ECAUSE OF WIDER
REFERENCE VOLTAGE LIMITS
•• CURRENT SHARING RESISTORS
DEGRACE REGULATION TO ,%
12H1
1%
36Sn
1%
V
":'
Precision High Current Reference
+ ,ov
tI'3IIQA
~
~~----~~~
NI.i
V"
":'
Remote Sensing
Rp (MAX CROP 300mVI
~------~~--------.-~
~
MJJ
2k
15k
1%
2k
4.991<
.-----------~--~~~
1%
L-_ _ _ _~~~~-~---~~T
RETURN
4-183
+
LT150A/LT350A
LM150/LM350
SCHEmATIC DIAGRAm
LT150A/LT350A
r----.-------.-----1~---1~--~~~~----------------~~--~--------~~_t--{]vw
02
160
01
0.05
L-~----~------~--4_~~~--4_4_~~~--4_--+_----~~--~------------------~~~--{]~UT
PACKAGE DESCRIPTion
Dimensions in inches (millimeters) unless otherwise noted.
K Package TO-3 STEEL Metal Can
T Package TO-220 Plastic
0.147-0151
~
,,,,,
~ 1br=r=;"'P;=r!l.T
l
0.174-0.186
(4420-4724)
0045-0055
(1143-1391)
1
(25.91±0381)
0540=0,015
~
0.152-0.162
(3.86-411)
"'"
0.167-0.117
(4.24-449)
RlYP
~
(127)
~
TV'
(12.45-1295)
4-184
TI"'"'"
ft)!l
8Jc
LT150A
LM150
150°C
35°CIW
1.5°CIW
LT350A
LM350
125°C
35°CIW
1.5°CIW
t
J
OO".'.""
r-~
0100=0,010
(254",0.254)
0200",0,010
~
0.013-0.030
(0.330-0162)
~
(2286-3.175)
SECTion 5-SWITCHlnG
REGULATORS/
VOLTAGE conVERTERS
II
5-1
INDEX
SECTION 5-SWITCHING REGULATORS AND VOLTAGE CONVERTERS
INDEX...
. ......... .
PROPRIETARY PRODUCTS
LT1 026, Voltage Converter
LTC I 04417660, Switched Capacitor Voltage Converter ..
LTCI044CS8, Switched Capacitor Voltage Converter.
LT1 054, Switched Capacitor Voltage Converter with Regulator
LTI 054CSILTI 05415, Switched Capacitor Voltage Converter with Regulator ..................... .
LT1 070, 5A High Efficiency Switching Regulator .
. . . . . . . . . . .. . ........ .
LT1 071, 2.5A High Efficiency Switching Regulator.
LT1 072, 1.25A High Efficiency Switching Regulator.
LTI074, Switching Regulator . ............ .
LT1170, 5A High Efficiency 100kHz Switching Regulator .
LTl171, 2.5A High Efficiency 100kHz Switching Regulator
LTl172, 1.25A High Efficiency 100kHz Switching Regulator ..
ENHANCED AND SECOND SOURCE PRODUCTS
SG1524/SG3524, Regulating Pulse Width Modulators ............... .
SG3524S, Regulating Pulse Width Modulator.
LTl5241L T3524, Regulating Pulse Width Modulators
SG1525A/SG3525A, Regulating Pulse Width Modulators.
LT1525AIL T3525A, Regulating Pulse Width Modulators
LT15261LT3526, Regulating Pulse Width Modulators ...
SG1527A/SG3527A, Regulating Pulse Width Modulators.
LT1527AILT3527A, Regulating Pulse Width Modulators
LT18461LT1847, Current Mode PWM Controller .
LT38461LT3847, Current Mode PWM Controller .
5-2
5-2
5-3
5-9
5-21
5-23
5-35
5-37
5-37
5-49
13-21
5-61
5-61
5-73
5-85
5-93
5-85
5-97
5-97
5-105
5-97
5-97
5-113
5-113
~7url~~-----V-o-,t-ag-e-c-o-~T-v~-°rt-2e-~
FEATURES
•
•
•
•
•
•
•
•
DESCRIPTion
Generates + and - from Single Input
Up to ± 18V Output
Only Needs Four 1fLF Capacitors
No Inductors
10mA Output Current Min
Operates Down to 4V
No Latch Up
8Pin Minidip
The LT1026 is aswitched capacitor voltage doubler and inverter on a single monolithic die. Capable of operating
from 4V to 10V input, it provides ± 7V to ± 18V out. Output
currents of over 10mA are available. Two charge pumps
first double the input voltage then invert the doubled voltage. Manufactured in bipolar technology, the LT1026 is not
susceptible to latch up and generates up to 36V.
The LT1026 offers a convenient way of generating additional system voltages without using inductors. Powering
interface circuits, op amps or data acquisition circuitry off
logic supplies is simplified. Other Linear Technology voltage converters such as the low power LTC1044 CMOS and
100mA bipolar LT1054 are available.
APPLICATions
•
•
•
•
Line Drivers
Op Amp Supplies
Battery Splitters
RS232 Power
DI
TYPICAL APPLICATiOn
Output Voltage
Voltage Doubler and Inverter
10
8
+VOUT
+
Y,N
l'
1~
r--
~
w
'"
j'!
i5
>
- --
~
-2
6
-4
-10
-
TA=25°C-
-6
-8
C=1~F
V,N =5V
0
i""'"
o
~
-
10
15
LOAD CURRENT (rnA)
20
25
5-3
LT1026
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage ..................................... 10V
V+ ................................................20V
V- .............................................. -20V
Short Circuit Duration ....................... 10 seconds
Operating Temperature Range
LT1026M ............................ - 55°C to 125°C
LT1026C ..................................0oC to 70°C
Lead Temperature (Soldering, 10 sec.) ............. 300°C
TOP VIEW
J PACKAGE
8-LEAD CERAMIC DIP
ORDER PART
NUMBER
NPACKAGE
8-LEAD PLASTIC DIP
TOP VIEW
LT1026MJ
LT1026CJ
LT1026CN
LT1026MH
LT1026CH
+VOUT
-VOUT
H PACKAGE
8-LEAD TO-S METAL CAN
ELECTRICAL CHARACTERISTICS
PARAMETER
Output Voltage
CONDITIONS
VIN =4V IL = aPositive
(Note 1) IL = aNegative
IL = lOrnA Positive
IL = -lOrnA Negative
VIN =5V IL = 15mA Positive
IL = -15mA Negative
VIN = 10V IL = aPositive
IL = 0 Negative
IL = lOrnA Positive
IL = -lOrnA Negative
IL = 15mA Positive
IL = -15mA Negative
VIN =5V IL = lOrnA, -lOrnA
VIN = 10V IL = lOrnA, -lOrnA
Supply Current
••
Positive
Negative
Positive
Negative
VIN =4V IL=O
VIN = 10V IL=O
The. denotes specifications which apply over DoC to 70°C for commercial
or - 55°C to 125°C lor military grade devices. Loads are applied to individual
outputs unless otherwise marked.
Note1: VIN Min= -4.5VlorTAs40°C
5-4
MIN
6.5
-6
5_25
-4.5
6.25
-5.5
18
-17.7
16
-15.3
15.25
-14.5
6.25
-5.5
15
-14.25
TYP
7
-6.7
5.7
-5
7
-6.2
18.5
-18
17.6
-17
17
-16.5
7.2
-6.5
16.8
-15.75
7
15
MAX
12.5
30
UNITS
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
rnA
rnA
LT1026
TYPICAL PERFORmAnCE CHARACTERISTICS
Load Regulation (Both Outputs
Loaded)
10
I--..
-
~
- --
10
t---
r--
w
'"
r'5
§1
10
I - - IL-O
~
C=l,.F VIN=5V
TA=25'C-
C=l,.F VIN=5V
TA=25'C-
0
Load Regulation for Negative
Loading
Load Regulation for Positive
Loading
~ -2
5
......-
-6
""'"
o
-6
-6
IL=O
-8
20
Supply Current
=>
/
45
~=>
'"
30
15
o
/
~
ffi
a:
a:
=>
V
40
/
30
<.)
~
-
C=22~F
VIN=5V
TA=25'C
BOTH OUTPUTSLjADED
I'
o
R:
=>
'"
20
/
10
V
I
10
15
20
OUTPUT CURRENT (mA)
25
o
o
25
~40
a:
a: 30
=>
/
/
<.)
~
-
C=22,.F
VIN=5V
TA=25'C
NEGATIVE OUTPUT LOiDEO
=>
'"
10
15
OUTPUT CURRENT (mA)
20
20
/
10
1/
LOiOED
25
o
o
-
C=22~F
VIN=5V
TA=25'C
POSITIVE OUTPUT-
I
10
15
20
OUTPUT CURRENT (mA)
25
Output Voltage vs Temperature
10
50
\
40
J..
g30
20
\
~
\
1
~
~
2
§;
0
~
-2
~
10
o
50
I
5
10
15
20
LOAD CURRENT (mA)
z>w
Ripple
~~
o
60
/
60
Q:
25
/
50
//
<.)
20
-- -
Supply Current
60
/
60
10
15
LOAD CURRENT (mA)
Supply Current
75
>-
-10
o
25
l---
-8
r-
-10
10
15
LOAD CURRENT (mA)
90
Ii!a:
C=l,.F VIN=5V
TA=25'C-
0
5 -2
-8
~
gr'5
4
2
50-4
-4
-10
~
2.2
......
VIN=5V
IL=5mA
BOTH OUTPUTS
o -4
-6
~
4.7
10
22
47
OUTPUT CAPACITOR (,.F)
C-22,.F
VIN=5V IL=lmA
100
-8
-10
-50
-~
0
~
50
TEMPERATURE ('C)
m
100
1~
5-5
LT1026
APPLICATion HinTS
The LT1026 is a non-regulating voltage converter which
converts a single input voltage into both a positive and
negative output at up to 1SmA. A positive input voltage is
first doubled and then the doubled voltage is inverted. The
voltage output level is dependent on both the input voltage and the output loading. The total output current available depends on the individual loading of the outputs
since loading on one output affects the load and the voltage of the other.
Only four external components are needed for operation.
Two charge pump capacitors and two output storage
capacitors. Nominal value for these capacitors is 11'F, but
the LT1026 will operate (with reduced performance) down
to O.1I'F. Higher value capacitors (221'F) will reduce ripple
and slightly lower output impedance. For higher output
currents the outputs of several converters may be paralleled with common output capacitors.
The substrate diodes are an inherent part of the IC, and
must always be reversed biased to isolate the individual
transistors. In the LT1026 the substrate is tied to the negative output. If the negative output is not used, such as
when only the voltage doubler output is needed, the
- VOUT must be tied to ground so the substrate diodes are
properly biased. The substrate diodes must never become
forward biased even during overload conditions. For
example, pulling the - VOUT positive with respect to
ground can forward bias the substrate diodes. Clamping
the substrate to ground with an external diode would be
needed to ensure proper operation and prevent the substrate from carrying any current.
No overload protection is included on the LT1026. Neither
output is damaged by momentary shorts, but during
sustained shorts the resulting high current flow will overheat the IC.
TYPICAL APPLICATiOnS
Positive to Negative Converter
-VOUT-9----tt,
1pF
5-6
-:J;1PF
Voltage Doubler
.t-+-.. . .
VOUT
LT1026
TYPICAL APPLICATions
Voltage Quadrupler
Standard Configuration Voltage Doubler and Inverter
81--1--~",,+VOUT
8~f--__
+ +VOUT
7
"*1,.F
vIN (FLOATING)
-VOUT
Parallel Converters for Higher Output Current
and Lower Output Impedance
1--t-4- + VOUT
-VOUT
5V Powered RS232 Line Driver
1,.F
81--1----~------~
+
2
3
LT1028
6
5V/N
5
LINE
5-7
LT1026
TYPICAL APPLICATions
Regulated Converter
5V
OUT
a
lpF
500k
+VOUT
,7,
+
Il
VIN"'4VJ
11
+
lpF
10pF
500k
+
10pF
lpFl
'::"
-5VREG 10mA
PACKAGE DESCRIPTiOn Dimensions in inches (millimeters) unless otherwise noted.
HPackage
8-Lead TO·S Metal Can
JPackage
a·Lead Ceramic DIP
NPackage
8-Lead Plastic DIP
1-''''4
1ri1/~lilr5l1
"'1
0
1
NOTE LEADIlIAMETER IS UNCONTIIOLlEDBETWEEN
THE REFERENCE PLANE AND SEPJlNG PLAME.
5-8
2
3
0250,.,0010
4
_:::r·
2541
~~~~~~~_______UC_l_04_4/_~6_0
Switched Capacitor
Voltage Converter
FEATURES
DESCRIPTiOn
• Plug-In Compatible with 7660 with These Additional
Features:
• Guaranteed Operation to 9V, with No External
Diode, Over Full Temperature Range
• Boost Pin (Pin 1) for Higher Switching Frequency
• Lower Quiescent Power
• Efficient Voltage Doubler
• 200~ Max. No Load Supply Current at 5V
• 97% Min. Open Circuit Voltage Conversion
Efficiency
• 95% Min. Power Conversion Efficiency
• Wide Operating Supply Voltage Range, 1.5V to 9V
• Easy to Use
• Commercial Device Guaranteed Over -40°C to
85°C Temperature Range
The LTC1044 is a monolithic CMOS switched capacitor
voltage converter which is manufactured using Linear
Technology's enhanced LTCMOS™ silicon gate process.
The LTC1044 provides several voltage conversion functions: the input voltage can be inverted (VOUT = - VIN),
doubled (VOUT =2VIN), divided (VOUT =VIN /2) or multiplied (VOUT = :i: nVIN).
Designed to be pin-for-pin and functionally compatible
with the popular 7660, the LTC1044 provides significant
features and improvements over earlier 7660 designs.
These improvements include: fu1l1.5V to 9V supply operation over the entire operating temperature range, without the need for external protection diodes; 2112 times
lower quiescent current for greater power conversion efficiency; and a boost" function which is available to raise
the internal oscillator frequency to optimize performance
in specific applications.
II
APPLICATions
•
•
•
•
Conversion of + 5V to :i: 5V Supplies
Precise Voltage Division, VOUT =VIN /2 :i: 20ppm
Voltage Multiplication, VOUT = :i: nVIN
Supply Splitter, VOUT = :i: Vs / 2
Although the LTC1044 provides significant design and
performance advantages over the earlier 7660 device, it
still maintains its compatibility with existing 7660 designs.
LTCMOS™ is a trademark of Linear Technology Corp.
Supply Current vs Supply
Voltage
Generating CMOS Logic Supply from 2 Mercury Batteries
400
360
RL=CO
1320
1--~---4~---9-VOUT
2-1.2V _
CELLS-
C1
10F
+
1
.:: 280
i
240
B
200
>-
/
J
;;;
~ 120
o
z
SUPPLY CURRENT Is=3,.A
GUARANTEED
f- f-
rOlNr
80
I- IIfPICfL- f-
A
40
o
II
V
~ 160
.J..1'
o
1
2
3 4 5 6 7 8
SUPPLY VOLTAGE. V+ (V)
9 10
5-9
LTC1044/7660
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
(Notes 1 and 2)
TOP VIEW
Supply Voltage ......... , ................ 9.5V
Input Voltage on Pins 1, 6 and 7
(Note 2) ............. -0.3V:::;VIN :::;V+ +0.3V
Current into Pin 6 . . . . . . . . . . . . . . . . . . . . . . .. 20pA
Output Short Circuit Duration
(V+ :::;5.5V) ..................... Continuous
Operating Temperature Range
LTC 1044C ............... - 40°C :::;TA :::; 85°C
LTC1044M .............. -55°C:::;TA :::;125°C
Storage Temperatu re Range. . . . .. - 65 °Cto + 150 ° C
Lead Temperature (Soldering, 10sec.) ........ 300°C
ORDER PART NUMBER
LTC1044CH
LTC1044MH
CAPMETAL CAN HPACKAGE
TOP VIEW
BOOSTOB v+
CAP+ 2
7 OSC
GROUND 3
6 LV
CAP-
4
5
VOUT
LTC1044CJ8
LTC1044CN8
LTC1044MJ8
HERMETIC DIP JB PACKAGE
PLASTIC DIP NB PACKAGE
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
Is
Supply Current
RL =
RL =
V+ L
V+ H
ROUT
Minimum Supply Voltage
Maximum Supply Voltage
Output Resistance
RL =10k
RL = 1Ok (Note 3)
IL =20mA, fosc=5kHz
fosc
Oscillator Frequency
PEFF
VOUTEFF
lose
Power Efficiency
Voltage Conversion
Efficiency
Oscillator Sink or ~ource
Current
00,
00,
Y+ =5Y, TA=25°C, Test Circuit Figure 1, unless otherwise specified.
Pins 1 and 7 No Connection
Pins 1 and 7 V+ =3V
V+ =2V, IL =3mA, fosc= 1kHz
Cos c = 1pF (Note 4)
V+=5V
V+=2V
RL =5kO, fosc= 5kH'z
RL = 00
Vosc=OV or V+
Pin 1=OV
Pin 1=V+
The. denotes the specifications which apply over the full operating
temperature range.
Nota 1: Absolute Maximum Ratings are those values beyond which the
life of the device may be impaired.
Nota 2: Connecting any input terminal to voltages greater than V + or
less than ground may cause destructive latch-up. It is recommended that
no inputs from sources operating from external supplies be applied prior
to power-up of the LTC1044.
5-10
MIN
LTC1044M
TYP
MAX
60
20
•
•
•
•
•
•
••
MIN
200
1.5
LTC1044C
TYP
MAX
60
20
1.5
9
100
130
325
9
100
150
400
5
1
95
97
200
5
1
95
97
98
99.9
3
20
UNITS
pA
pA
V
V
0
0
0
kHz
kHz
%
%
98
99.9
3
20
pA
pA
Note 3: The LTC1044 is guaranteed to operate with alkaline, mercury or
NiCad 9V batteries, even though the initial battery voltage may be slightly
higher than 9.0V.
Note 4: f osc is tested with Cosc = 100pF to minimize the effects of test
fixture capaCitance loading. The 1pF frequency is correlated to this
100pF test pOint, and is. intended to simulate the capaCitance at pin 7
when the device is plugged into a test socket and no external capacitor is
used.
LTC1044/7660
TYPICAL PERFORmAnCE CHARACTERISTICS
Operating Voltage Range vs
Temperature
Power Efficiency vs Oscillator
Frequency
100
1---+-+--+-+--+-+--1
~96
;7 1---+-+-+--+~+-"""-1
:>
~ 61--+-+-+--+......,+-+--1
~ 51--+-+-+--+-+-+--1
~ 41--+-+-+--+,..-+-+--1
:t
i 94
"-
_ 8
ijl 3
....100~F
lO~F
I~F
as: 90
~88
~86
125
~80
~ 70
ifi
§ 60
J
It
"!50
N
V
~3O
o
~ 20
~ 10 /
oV
10
V+=2V
i--TA=25'C
Cl =C2=10~F
lose = 1kHz
o
~300
z
i"
OJ
100
6
t-
~
Ilil l
~
a:
5 ::::>
r--
.........
r-
,.
<>
4 ~
J
Vis
~ 40
ffi
:t
::::>
OJ
~ 30
0
ffi 20
2
3
4
5
LOAD CURRENT, IdmA)
7
10
o/
J
J
V'\
1111~IF
lk
10k
OSCILLATOR FREQUENCY, lose (Hz)
\.
\
1000
Il3inA
TAl 25'C
£
50'"
::::>
~100
<>
r
'\
z
~
:t ::::>
t-
Cose 0
40~
I
V
30
20
~
€
0.5
10
20
30
40
50
LOAD CURRENT, IdmA)
60
r=
::::>
0
10
70
Output Voltage vs Load Current
for V+ =5V
TA=25'C
V+=2V
'losc=lkHz
\
,
TA=25'C
V+=5V
fosc=5kHz
\
o
1
2
3 4 5 6 7 8
SUPPLY VOLTAGE, V+ (V)
V
-2.0 . /
t-
~160
/SLOPE=801l
-4
-5
1
2
3 4 5 6 7 8
LOAD CURRENT, IdmA)
/
-3
-2.5
o
£320
9
10
/
./
o
10 20 30 40 50 60 70 60 90 100
LOAD CURRENT, Il (mA)
-
II
~ 280 I------ V+ = 2V
~ 240
/"
Cl =C2=10~F
360
in
KLOPE=250!L -- --
-1
-1.5
9 10
Output Resistance vs
Temperature
Ii! 200
)
~-O.5
t-
-
10
\
~
III
....... ~ose-l00PF
0
60 ~
'"~
400
,
lOOk
Output Resistance vs Supply
Voltage
0
o
=C2=I~F
1\
\
= f~
100
100
V+=5V
90
TA=25'C
Cl =C2=10~F
80
lose=5kHz
70!
Pm
.......
I::b 50
z
~
1.5
5
"c1
o
lOOk
2.5
~
Cl
\.
1\
0100
11~
lk
10k
OSCILLATOR FREQUENCY, losc(Hz)
~60
u::
Output Voltage vs Load Current
for V+ =2V
~
Cl=C2=10~F
in
Ii! 200
Il =ITr
I
~80
7 <" ~70
o
o
£400
a:
1-!1fi"'""
, I
~90
t\,
J
V
IL~I~'
Iii
TA=25'C
V+=5V
Il=10mA
Power Conversion Efficiency vs
Load Current for V+ =5V
S
ViS
140
w
100~~--j
~I
80
100
Power Conversion Efficiency vs
Load Current for V+ =2V
.l-...!EFF
I
,
,
~
,
82
O~~-~--~~--~--~~
100
500
<>
u
~94
~90 /'"'
tlUr'
>,92
I--t-+-t--t-+-t--I
-55 -25
0
25
50
75
100
AMBIENT TEMPERATURE, TA('C)
Output Resistance vs Oscillator
Frequency
v+ 5V
TA=25'C
.... Cl=C2
Jl 11I11
98
:>
(Using Test Circuit Shown in Figure 1)
50120
80
40
o
-V+=5V
-I I
-~
-~
.1
.1.
lose = 1kHz
V
-~~
fosc=5kHz
-
0
~
50
~
100
AMBIENT TEMPERATURE ('C)
1~
5-11
LTC1044/7660
TYPICAL PERFORmAnCE CHARACTERISTICS
Oscillator Frequency as a
Function of Cose
(Using Test Circuit Shown in Figure 1)
Oscillator Frequency vs Supply
Voltage
100km.~
Oscillator Frequency vs
Temperature
15
lOOk
Cose OpF
TA-25?C
'N
;:.
V+;5V
Cosc;O
14
'N
~ 13
>-
§12
~ 11
'"~ 10
fil
IE
I
."\..
~
t'-...
9
IX:
~
8
r--.....
..............
~ 7
o
10
L-L-.J...U..I>IIL.......L...L..I..UWL-L....L.U.llJlL-.J....U.WJ1I
1
10
100
lk
10k
O.lk
o
r-....
6
5
1
2
EXTERNAL CAPACITOR (PIN 7 TO GROUND),CoSC (pF)
3 4 5 6 7 8
SUPPLY VOLTAGE, V+ (V)
TEST CIRCUIT
9
-55 -25
10
0
25
50
75
100
125
AMBIENT TEMPERATURE (OC)
V+ (5V)
-+!
m-_ _ _ _ _ _
r--'l"""'JI.......
Is
Cl
10~F
I-++-------+-+ VOUT
- C2
I1O~F
Figure 1
APPLICATions InFORmATion
Theory of Operation
To understand the theory of operation of the LTC1044, a
review of a basic switched capacitor building block is
helpful,
If the switch is cycled f times per second, the charge
transfer per unit time (I.e., current) is:
I =f xAq =f xC1(V1-V2).
In Figure 2, when the switch is in the left position,
capacitor C1 will charge to voltage V1 , The total charge on
C1 will be q1 = C1V1. The switch then moves to the right,
discharging C1 to voltage V2. After this discharge time,
the charge on C1 is q2 =C1V2, Note that charge has
been transferred from the source, V1, to the output V2.
The amount of charge transferred is:
Aq=q1-q2=C1(V1-V2).
5-12
Figure 2. Switched Capacitor Building Block
LTC1044/7660
APPLICATions InFoRmATion
Rewriting in terms of voltage and impedance
equivalence,
I _ V1 - V2 _ V1 - V2 .
- (1/fC1) - REQUIV
A new variable, REQUlV, has been defined such that
REQUIV =1IfC1. Thus, the equivalent circuit for the
switched capacitor network is as shown in Figure 3.
Figure 3. Switched Capacitor Equivalent Circuit
Examination of Figure 4 shows that the LTC 1044 has the
same switching action as the basic switched capacitor
building block. With the addition of finite switch onresistance and output voltage ripple, the simple theory,
although not exact, provides an intuitive feel for how the
device works.
For example, if you examine power conversion efficiency
as a function of frequency (see typical curve), this simple
theory will explain how the LTC1044 behaves. The loss,
and hence the efficiency, is set by the output impedance.
As frequency is decreased, the output impedance will
eventually be dominated by the 1/fC1 term and power
efficiency will drop. The typical curves for power efficiency versus frequency show this effect for various
capacitor values.
Note also that power efficiency decreases as frequency
goes up. This is caused by internal switching losses
which occur due to some finite charge being lost on each
switching cycle. This charge loss per unit cycle, when
multiplied by the switGhing frequency, becomes a current
loss. At high frequency this loss becomes significant and
the power efficiency starts to decrease.
LV (Pin 6)
The internal logic of the LTC1044 runs between V+ and
LV (pin 6). For V+ greater than or equal to 3V, an internal
switch shorts LV to GND (pin 3). For V+ less than 3V, the
LV pin should be tied to GND. For V+ greater than or
equal to 3V, the LV pin can be tied to GND or left floating.
Figure 4. LTC1044 Switched Capacitor Voltage Converter Block Diagram
5-13
II
LTC1044/7660
APPLICATions InFoRmATion
OSC (Pin 7) and Boost (Pin 1)
The switching frequency can be raised, lowered or driven
from an external source. Figure 5 shows a functional
diagram of the oscillator circuit.
By connecting the boost pin (pin 1) to V+ , the charge and
discharge current is increased and, hence, the frequency
is increased by approximately 7 times. Increasing the frequency will decrease output impedance and ripple for
higher load currents.
Loading pin 7 with more capacitance will lower the frequency. Using the boost (pin 1) in conjunction with external capacitance on pin 7 allows user selection of the
frequency over a wide range.
Driving the LTC 1044 from an external frequency source
can be easily achieved by driving pin 7 and leaving the
boost pin open, as shown in Figure 6. The output current
from pin 7 is small, typically O.5J.tA, so a logic gate is
capable of driving this current. The choice of using a
CMOS logic gate is best because it can operate over a
wide supply voltage range (3V to 15V) and has enough
voltage swing to drive the internal Schmitt trigger shown
in Figure 5. For 5V applications, a TTL logic gate can be
used by simply adding an external pull-up resistor (see
Figure 6).
External Diode (Ox)
Previous circuits of this type have required a diode between VOUT (pin 5) and the external capacitor, C2, for
voltages above 6.5V (5V for military temperature range).
Because of improvements which have been made in the
LTC1044 circuit design and Linear Technology's silicon
gate CMOS process, this diode is no longer required. The
LTC1044 will operate from 1.5V to 9V, without the protection diode, over all temperature ranges.
It should, however, be noted that the LTC1044 will
operate without any problems in existing 7660 designs
which use the protection diode, as long as the maximum
operating voltage (y+) of 9Y is not exceeded.
Capacitor Selection
External capacitors C1 and C2 are not critical. Matching is
not required, nor do they have to be high quality or tight
tolerance. Aluminum or tantalum electrolytics are excellent
choices, with cost and size being the only consideration.
v+
v+
Cl
Figure 6. External Clocking
Figure 5. Oscillator
5-14
LTC1044/7660
TYPICAL APPLICATions
Negative Voltage Converter
Figure 7 shows a typical connection which will provide a
negative supply from an available positive supply. This circuit operates over full temperature and power supply ranges
withoutthe need of any external diodes. The LV pin (pin 6)
is shown grounded, but for V+ ~3V it may be "floated",
since LV is internally switched to ground (pin 3) for
V+ ~3V.
The exact expression for output impedance is extremely
complex, but the dominant effect of the capacitor is clearly
shown on the typical curves of output impedance and power
efficiency versus frequency. For C1 = C2 = 1OI'F, the output impedance goes from 600 at fose = 10kHz to 2000 at
fose = 1kHz. As the 1f fC term becomes large compared to
the switch on-resistance term, the output resistance is determined by 1ffC only.
Voltage Doubling
The output voltage (pin 5) characteristics of the circuit are
those of a nearly ideal voltage source in series with an
800 resistor. The 800 output impedance is composed of
two terms: 1) the equivalent switched capacitor resistance (see Theory of Operation) and 2) aterm related to the
on-resistance of the MOS switches.
At an oscillator frequency of 10kHz and C1 = 1OI'F, the
first term is:
1
REQUIV = (foscf2) xC1 =
____
1_ _-:- =200.
3
5 x 10 X 10 x 10- 6
Notice that the above equation for REQUIV is not a
capacitive reactance equation (Xe = 1f WC) and does not
contain a 27r term.
Figure 8 shows two methods of voltage doubling. In
Figure 8a doubling is achieved by simply rearranging
the connection of the two external capacitors. When the
input voltage is less than 3V, an external 1MO resistor is
required to ensure the oscillator will start. It is not required for higher input voltages.
In this application the ground input (pin 3) is taken
above V+ (pin 8) during turn-on, making it prone to
latch-Up. The latch-Up is not destructive but simply
prevents the circuit from doubling. Resistor R1 is added
to eliminate the problem. In most cases 2000 is sufficient. It may be necessary in a particular application to
increase this value to guarantee start-up.
The voltage drop across R1 is : VR1 = 2 X lOUT x R1. If
this voltage exceeds two diode drops (1.4V for silicon,
0.8V for Schottky), the circuit in Figure 8a is recommended. This circuit will never have a start-up problem.
V+ (1.5V TO 9.0V)
10,F
6
-~EQUIREO
-_
FORV+<3V
VOUT=
-v+
~10'F
Figure 7. Negative Voltage Converter
Y,N p.5V TO 9V)
V,N
(1 5V TO 9.0V)
lN914
J-----,...- 2V,N (3.0V TO 18V)
Cl
10,F
+
6
-,
+ C2
10,F
~1 M-;;rREQUIRED FOR
.l""'!":"
V+<3.0V
":' '='
(a)
Figure 8. Voltage Doubler
(b)
5-15
III
LTC1044/7660
TYPICAL APPLICATions
Ultra Precision Voltage Divider
An ultra precision voltage divider is shown in Figure 9. To
achieve the 0.0002% accuracy indicated, the load current should be kept below 100nA. However, with a slight
loss in accuracy, the load current can be increased.
Figure 11 shows two LTC1044s connected in parallel to
provide a lower effective output resistance. If, however,
the output resistance is dominated by 1/fC1 , increasing
the capacitor size (C1) or increasing the frequency will be
of more benefit than the paralleling circuit shown.
Battery Splitter
A common need in many systems is to obtain ( + ) and
( - ) supplies from asingle battery or single power supply
system. Where current requirements are small, the circuit shown in Figure 10 is a simple solution. It provides
symmetrical ± output voltages, both equal to one half
the input voltage. The output voltages are both referenced to pin 3 (output common). If the input voltage between pin 8 and pin 5 is less than 6V, pin 6 should also be
connected to pin 3, as shown by the dashed line.
Paralleling for Lower Output ReSistance
Figures 12 and 13 make use of "stacking" two
LTC 1044s to provide even higher voltages. In Figure 12,
a negative voltage doubler or tripler can be achieved,
depending upon how pin 8 of the second LTC 1044 is connected, as shown schematically by the switch. Figure 13
indicates a similar circuit which can be used to obtain
positive tripling, or even quadrupling (the doubler circuit
appears in Figure 8a. In both of these circuits, the
available output current will be dictated/decreased by
the product of the individual power conversion efficiencies and the voltage step-up ratio.
Additional flexibility of the LTC 1044 is shown in Figures 11,
12 and 13.
V+ (3V TO l8V)
1--_++VB/2 (4.5V)
Cl +
10~F
~ ",0.002%
2
TMIN :sTA:sTMAX
IL:S l00nA
L----'LrTI
+
C2
"Il0~F
OUTPUT
COMMON
3V:sVB:s18V
Figure 9. Ultra Precision Voltage Divider
5-16
Figure 10. Battery Splitter
LTC1044/7660
TYPICAL APPLICATions
(V+)
Cl
Cl
lO~F
lO~F
+
H -..... vour= -(V+)
'THE EXCLUSIVE NOR GATE SYNCHRONIZES BOTH LTC1044s TO MINIMIZE RIPPLE
Figure 11. Paralleling for Lower Output Resistance
V+
FORVour=-3V+-
-
FORVour=-2V+
10pF
Figure 12. Stacking for Higher Voltage
lN914
V+ (+5V)
lN914
!---+-_Vour
~
_ _--",6
- .J. .'_;_~lM-:r,:,+
1
10pF
FOR Vour=3V+
FOR Vour=4V+
(+20V)
L-_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _(:..;+...1...
5V.;..)--o -
'REOUIRED FOR V+ < 3 OV
l
Figure 13. Voltage Tripler/Quadrupler
5-17
LTC1044/7660
TYPICAL APPLICATions
200k
B.2k
.---~_IOUTPUT
~lO~F
VIN" I-VOUTI +0.5V
LOAD REGULATION ",0.02%, OmA TO 15mA
Figure 14. Low Output Impedance Voltage Converter
18lf---...... +5V
100~F
2200
B
-,
I
OUTPUT
®
1.2V REFERENCE TO
AID CONVERTER FOR-....- _ - - -.....- . ,
RATIOMETRIC OPERATION (1mA MAX)
LT1004
1.2V
>-":",~-",,,-'OV TO 3.5V
10k ~....,..,.,..-+--4,;;;:..----'
ZERO
TRIM
'1% FILM RESISTOR
PRESSURE TRANSDUCER BLH/DHF-350
(CIRCLED LETTER IS PIN NUMBER)
Figure 15. Single 5V Strain Gauge Bridge Signal Conditioner
5-18
Opsl TO 350psi
O.047~F
1000'
LTC1044/7660
TYPICAL APPLICATions
3V
m - + - . . , . . . - - + - - - - _ - + 5 V OUTPUT
LTC1(144
48M
1k
EVEREADY EXP-30
-=-
330k
1k
I
I
L_
1N914
150k
100k
Figure 16_ Regulated Output + 3V to + 5V Converter
...-_ _-t_ _ _ _ _ _ _....._ _ _ _ _ _ _ _ _---\.2N2219
VOUT=5V
1N914
l8l-+--... +12V
1001l
SHORT CIRCUIT
PROTECTION
4 EVEREADY E-91 CELLS
-=-
1M
5
r --- V + - - -----,
8
FEEDBACK AMP
1
21
1
31
1
6V
120k
1
1
L_ V- _ _
4
1
LOAD
Ir
LT1013
_
1N914
_ _ _ ...l
6
LT1004
1.2V
1.2k
30k
50k
OUTPUT
ADJUST
O.011l
Figure 17. Low Dropout 5V Regulator
VOROPOUT AT 1mA= 1mV
VOROPOUTAT 1OmA=15mV
VQROPOUTAT 100mA=95mV
5-19
LTC1044/7660
PACKAGE DESCRIPTiOn
H Package
Metal Can
0.040
(1.~~
MU
SEATING
If :~:~~:;
DlA
0
.
--------~t'o~.o~-------.
J8 Package
8 Lead Hermetic DIP
0.220-0.310
i5.5ii=7.i7ii
.1
".ml
T
5
.~
jL~
~·i:;;;::;;:::;;:;;::~L:M[r~=-=l
(1.3971
MU
PLANE,0.010-0.045
(0.254-1.1431
,
BlASS
I
I
~
(3.175-5.0801
~
(2.5401
asc'
JJ j t
J [--00015' .
0.030-0.070
(0.712y~.7781
T
~
1..,,0.2110-0.320
(7.366-8.1281
(0.356-0.5841
TVP
NOTE: DIMENSIONS IN INCHES (MILLIMETERSI UNLESS OTHERWISE NOTED
*LEADS WITHIN 0.007 OF TRUE POSInON (TP) AT GAUGE PLANE
NOTE: DIMENSIONS IN INCHES (MILLIMETCRS)
N8 Package
8 Lead Plastic
C]'1:=1l
0.240-0.280
5
8
JL
0.040 MO.
i1.Oiii -
.!!!!!.
(0.508)
MIN
0.155!0.1n
(3.937 -'.445)
r(:::=:a~1
tb-~~=r~~H
(6.09Sr"21
0.0&0
(1.524)
'0
0.005
(0.127)
MIN
A
T• H •
,
,
I
,
Jto.o,.. j~~
(0.203-0.381)
TVP
~
(7.366-7.874)
NOTE: DIMENSIONS IN INCHES (MILLIMETERS) UNLESS OTHERWISE NOTED
'lEAOS WITHIN 0.007 OF TRUE POSITION (TP) '" GAUOE PLANE
5-20
I
\I
\I
\I
0.008-0.01&
(0.203·-0.3811
TYP
~"""-LlnCJ\Q
~~
LTC1044CS8
TECHNOLOG~~~--------S-W-it-c-he-d-C--a-pa-C-i-to-r
Voltage Converter
FEATURES
DESCRIPTion
• Plug-In Compatible with 7660 with These Additional
Features:
• Guaranteed Operation to 9V, with No External
Diode, Over Full Temperature Range
• Boost Pin (Pin 1) for Higher Switching Frequency
• Lower Quiescent Power
• Efficient Voltage Doubler
• 200pA Max. No Load Supply Current at 5V
• 97% Min. Open Circuit Voltage Conversion
Efficiency
• 95% Min. Power Conversion Efficiency
• Wide Operating Supply Voltage Range, 1.5V to 9V
• Easy to Use
• Commercial Device Guaranteed Over -40°C to
85°C Temperature Range
The LTC1044 is a monolithic CMOS switched capacitor
voltage converter which is manufactured using Linear
Technology's enhanced LTCMOS™ silicon gate process.
The LTC1044 provides several voltage conversion functions: the input voltage can be inverted (VOUT = - VIN),
doubled (VOUT =2VIN), divided (VOUT =VIN 12) or multiplied (VOUT= ±nVIN).
APPLICATions
•
•
•
•
Conversion of + 5V to ± 5V Supplies
Precise Voltage Division, VOUT =VIN 12 ± 20ppm
Voltage Multiplication, VOUT = ± nVIN
Supply Splitter, VOUT = ± Vs 12
Designed to be pin-for-pin and functionally compatible
with the popular 7660, the LTC1044 provides significant
features and improvements over earlier 7660 designs.
These improvements include: fu1l1.5V to 9V supply operation over the entire operating temperature range, without the need for external protection diodes; 21/2 times
lower quiescent current for greater power conversion efficiency; and a' 'boost" function which is available to raise
the internal oscillator frequency to optimize performance
in specific applications.
Although the LTC1044 provides significant design and
performance advantages over the earlier 1660 device, it
still maintains its compatibility with existing 1660 designs.
LTCMOS™ is a trademark of Linear Technology Corp.
Supply Current vs Supply
Voltage
Generating CMOS Logic Supply from 2 Mercury Batteries
400
360
Rl;OO
~ 320
1--"'--_~-1_VOUT
2-1.2V _
CEllS-
C1
+
10~F
/
II
~ 280
~
a;
240
B
200
>--
V
EC 160
~
~
g
o
z
SUPPLY CURRENT
Is~3~
tOlN(
SO
40
o
17
I- lIyPIC~L - I -
GUARANTEED
120 l -I -
.Y
o
1
2
3
4
.x
5
6
7
B
9 10
SUPPLY VOLTAGE. V+ (V)
..L7~
5-21
5
LTC1044CSB
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
(Notes 1 and 2)
Supply Voltage .......................... 9.5V
Input Voltage on Pins 1, 6 and 7
(Note 2) ............. -0.3V::;VIN ::;V+ +0.3V
Current into Pin 6 ........................ 20~
Output Short Circuit Duration
(V+ ::;5.5V) ..................... Continuous
Operating Temperature Range .... -40°C ::;TA ::;85°C
Storage Temperature Range ...... -65°C to + 150°C
Lead Temperature (Soldering, 10 sec.) ........ 300°C
ORDER
PART NUMBER
TOP VIEW
OO~;[)"
CAP+ 2
LTC1044CSB
7 OSC
GROUND 3
6 LV
CAP- 4
5 VOUT
PART MARKING
S8 PACKAGE
PLASTIC SO
1044
ELECTRICAL CHARACTE RISTICS v+ = sv, TA = 25°C, unless otherwise specified.
See LTC104417660 data sheet for test circuit.
SYMBOL
Is
PARAMETER
Supply Current
V\
V+ H
ROUT
Minimum Supply Voltage
Maximum Supply Voltage
Output Resistance
losc
Oscillator Frequency
PEFF
VOUTEFF
losc
Power Efficiency
Voltage Conversion
Efficiency
Oscillator Sink or Source
Current
CONDITIONS
RL = co, Pins 1and 7 No Connection
RL = co, Pins 1and 7V",3V
RL = 10k
RL = 10k (Note 3)
IL = 2OOmA, lose = 5kHz
V+ =2V, IL =3mA, losc= 1kHz
c~ = lpF (Note 4)
V =5V
V+ =2V
RL = 5k1l, losc = 5kHz
RL = co
Vosc=OVorV+
Pin 1=OV
Pin 1=V+
The. denotes the specifications which apply over the full operating
temperature range.
Note 1: Absolute Maximum Ratings are those values beyond which the
life of the device may be impaired.
Note 2: Connecting any input terminal to voltages greater than V+ or
less than ground may cause destructive latch-up. It is recommended that
no inputs Irom sources operating from external supplies be applied prior
to power-up of the LTC1044.
5-22
MIN
•
•
••
••
••
LTC1044Csa
TYP
MAX
60
200
20
1.5
9
100
130
325
5
1
95
97
UNITS
p.A
p.A
V
V
!J
!J
!J
kHz
kHz
98
%
%
99.9
3
20
p.A
p.A
Note 3: The LTC1044 is guaranteed to operate with alkaline, mercury or
NiCad 9V batteries, even though the initial battery voltage may be slightly
higher than 9.0V.
Note 4: fosc is tested with Cos c = 100pF to minimize the effects of test
fixture capacitance loading. The 1pF frequency is correlated to this
100pF test point, and is intended to simulate the capacitance at pin 7
when the device is plugged into a test socket and no external capacitor is
used.
.L7YJ~~~~-S-W-i-tc-h-e-d-c-a-p-a-c-ito-r-v-~-~~-~-~-:
Converter with Regulator
FEATURES
DESCRIPTiOn
•
•
•
•
•
•
•
•
The LT1054 is a monolithic, bipolar, switched capacitor
voltage converter and regulator. The LT1054 provides
higher output current than previously available converters
with significantly lower voltage losses. An adaptive switch
drive scheme optimizes efficiency over a wide range of
output currents. Total voltage loss at 100mA output current is typically 1.1V. This holds true over the full supply
voltage range of 3.5V to 15V. Quiescent current is typically
2.5mA.
100mA Output Current
Low Loss-1.1Vat 100mA
Operati ng Range 3.5V to 15V
Reference and Error Amplifier for Regulation
External Shutdown
External Oscillator Sync
Can be Paralleled
Pin Compatible with the LTC1 044/7660
APPLICATions
•
•
•
•
Voltage Inverter
Negative Voltage Doubler
Voltage Regulator
Positive Voltage Doubler
The LT1054 also provides regulation, a feature not previously available in switched capacitor voltage converters.
By adding an external resistive divider, a regulated output
can be obtained. This output will be regulated against
changes in both input voltage and output current. The
LT1054 can also be shut down by grounding the feedback
pin. Supply current in shut down is less than 100I'A.
The internal oscillator of the LT1054 runs at a nominal frequency of 25kHz. The oscillator pin can be used to adjust
the switching frequency, or to externally synchronize the
LT1054.
The LT1054 is pin compatible with previous converters
such as the LTC1044/7660.
BLOCK DIAGRAm
Voltage Loss
3.5V"VIN,,15V
CIN=Cour=l00,.F
TJ=125°C
,.;>
./
,.-
--
./
./
,.- . /" .....
v:: I.--".: """ .....-'I ....
./ ~ ~
-< Tj=25°C
I
j/; v r"Tj= ~55°?_
o
-
~
o
INDICATES GUARANTEED TEST POINT
10
20
30 40 50 60 70 80 90 100
OUTPUT CURRENT (rnA)
5-23
II
LT1054
A8S0LUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage (Note 1) ............................. 16V
Input Voltage (Pin 1) ............•......... OV ~VPIN1 ~V+
Input Voltage (Pin 7) .................... OV ~VPIN7~VREF
Operating Temperature Range
LT1054C ................................. OOC to 70°C
LT1054M ............................ - 55°C to 125°C
Junction Temperature (Note 2)
LT1054C ....................................... 125°C
LT1054M ...................................... 150°C
Storage Temperature Range ............. - 55°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
ORDER PART
NUMBER
J8 PACKAGE
HERMETIC DIP
LT1054MJ
LT1054CJ
LT1054CN
N8 PACKAGE
PLASTIC DIP
TOP VIEW
V+
LT1054MH
LT1054CH
ALSO AVAILABLE
IN SO pACKAGE
H PACKAGE
TO-5 METAL CAN
ELECTRICAL CHARACTERISTICS
PARAMETER
Supply Current
Supply Voltage Range
Voltage Loss(VIN -IVourl)
Output Resistance
Oscillator Frequency
Reference Voltage
CONDITIONS
ILOAO=OmA
VIN=3.5V
VIN =15V
CIN = Cour =1OO~F Tantalum
(Note 3)
lour=10mA
lour=100mA
I110ur = 10mA to 100mA
(Note 4)
3.5V:5VIN :515V
IREF=60~
Ti=25°C
Regulated Voltage
Line Regulation
Load Regulation
Maximum Switch Current
Supply Current In Shutdown
VIN = 7V, Ti =25°C, RL =SOOO
(Note 5)
7V:5VIN:512V, RL =5001l
(Note 5)
VIN =7V
1000:5RL:55000
(Note 5)
VPIN1=OV
The. denotes specifications which apply over the full operating tempera·
ture range. For Cgrade parts these specifications also apply up to ajunco
tion temperature of 100°C.
Note 1: The absolute maximum supply voltage rating of 16V is for unregu·
lated circuits. For regulation mode circuits with Vour :515V at Pin 5, this rat·
ing may be increased to 2OV.
Nole 2: The devices are guaranteed by design to be functional up to the
absolute maximum junction temperature.
Note 3: For voltage loss tests, the device is connected as avoltage
5-24
MIN
••
•
TYP
MAX
2.5
3.0
3.5
4.5
15
0.35
1.10
0.55
1.60
10
25
15
35
2.35
2.25
2.SO
2.65
2.75
V
V
-4.70
-5.00
5
-5.20
25
V
mV
3.5
••
•
•
•
•
15
UNITS
10
SO
•
300
100
150
•
Inverter, with Pins 1, 6, and 7 unconnected. The voltage losses may be
rnA
rnA
V
V
V
0
kHz
mV
rnA
~
higher in other configurations.
Nole 4: Output resistance is defined as the slope olthe curve, (I1VoUTvs
I1I0ur), for output currents of 10 to 100 rnA. This represents the linear por·
tion of the curve. The incremental slope of the curve will be higher at cur·
rents <1OmA due to the characteristics olthe switch transistors.
Nole 5: All regulation specifications are for adevice connected as a
positive to negative converter/regulator with R1 = 2Ok, R2 = 102.5k,
C1 = O.002~F, CIN = 10~F tantalum, Cour = 100~F tantalum.
LT1054
TYPICAL PERFORmAnCE CHARACTERISTICS
Supply Current
Shutdown Threshold
Oscillator Frequency
0.6
0.5
r--....
35
IL~O
r--.... ...........
V~Nl
i'...
~
--
................
-r--
'~
~=15V- r--
-........:
VIN=3.~ ='
i"....: r--
0.1
a
-50 -25
o
a
25
50
75
TEMPERATURE ('C)
100
125
a
Supply Current in Shutdown
80
~r-
l.---
120
v
VpIN1=OV
i
_
~
~
ill
~
80
to
60
60
20
5
10
INPUT VOLTAGE (V)
aV
o
15
20
€
w
~
§!
1.0
"
o
1
lou;
......
'ouLL
IOU~=lJmA
0.4
INVERTER CONFIGURATION
COUT= 100~F TANTALUM
fosc=25kHz
0.2
40
60
80
OUTPUT CURRENT (mA)
100
o
o
10
20 30 40 50 60
CIN (~F)
70 80 90 100
INVEhE~ CMI~L~~~ION
t- GIN= 100~F TANTALUM
2.0 t- COUT=100~F TANTALUM
\
€
~w
'"
~
i'...1 OUT = SOmA
\
0.8
Output Voltage Loss
1\
"IOU71~mA
I
......
IOUT=100mA
§!
INVE~TE~ C6NIFI~~It1.~ION
~
II
............
~ 0.6
CIN=10~ TANTALUM
COUT= 100~ TANTALUM
g
~
w
Output Voltage Loss
2.0
125
_ 1.0
V
ll:
a
~
100
2:-
/
./V
w
20
a
/
g 40
40
1.2
/v
;::- 100
I-
ffi
1.4
~
~
0
25 50 75
TEMPERATURE ('C)
Output Voltage Loss
140
100
i13
15
-75 -50 -25
15
Average Input Current
120
~
5
10
INPUT VOLTAGE (V)
g
1.0
"-.
JJ~
I'-,Iml 100m~
IOUT-50mA
COUT=l00~F
10
OSCILLATOR FREQUENCY (kHz)
"-
100
a
Iml 10mAI
1
10
OSCILLATOR FREQUENCY (kHz)
100
5-25
III
LT1054
TYPICAL PERFORmAnCE CHARACTERISTICS
Reference Voltage Temperature
Coefficient
Regulated Output Voltage
100
-4.7
-4.8
~4.9
~
-5.0
~
-5.1
..-
r-
!j
~ -11.8
1"-,...
f-
60
w
~
40
5w
20
~ 0
g -20
§; -11.6
is -12.0
80
!
~
~-40
."V
...-
...- ...-
......
VREF@0=2.500V
/'
~-60
-80
-12.2
-12.4
-12.6
-50 -25
-100
0
25
50
75
100
125
-50 -25
0
TEMPERATURE (oG)
25
50
75
100
125
TEMPERATURE (oG)
APPLICATions InFORmATion
Theory of Operation
To understand the theory of operation of the LT1054, a
review of a basic switched capacitor building block is
helpful.
In Figure 1, when the switch is in the left position, capacitor C1 will charge to voltage V1. The total charge on C1 will
be q1 C1V1. The switch then moves to the right, discharging C1 to voltage V2. After this discharge time, the
charge on C1 is q2 C1 V2. Note that charge has been
transferred from the source, V1, to the output, V2. The
amount of charge transferred is:
=
=
=
=
Ilq q1- q2 C1(V1- V2).
If the switch is cycled f times per second, the charge
transfer per unit time (Le., current) is:
1= f x Ilq = f x C1(V1- V2).
To obtain an equivalent resistance for the switchedcapacitor network we can rewrite this equation in terms of
voltage and impedance equivalence:
I =V1 - V2 =V1 - V2
(lIfC1) REQUIV
=
A new variable, REQUIV, is defined such that REQUIV lIfC1.
Thus, the equivalent circuit for the switched capacitor network is as shown in Figure 2. The LT1054 has the same
switching action as the basic switched capacitor building
block. Even though this simplification doesn't include finite switch on-resistance and output voltage ripple, it provides an intuitive feel for how the device works.
These simplified circuits explain voltage loss as a function of frequency (see typical curve). As frequency is
decreased, the output impedance will eventually be dominated by the lIfC1 term and voltage losses will rise.
Note that losses also rise as frequency increases. This is
caused by internal switching losses which occur due to
some finite charge being lost on each switching cycle.
This charge loss per-un it-cycle, when multiplied by the
switching frequency, becomes a current loss. At high frequency this loss becomes significant and voltage losses
again rise.
The oscillator of the LT1054 is designed to run in the frequency band where voltage losses are at aminimum.
V1
Figure 1. Switched Capacitor Building Block
5-26
V2
Figure 2_ Switched Capacitor Equivalent Circuit
LT1054
APPLICATions InFoRmATion
Pin Functions
Y+ (Pin 8): Input supply pin. The LT1054 alternately
charges CIN to the input voltage when CIN is switched in
parallel with the input supply, and then transfers charge to
COUT when CIN is switched in parallel with COUTo Switching
occurs at the oscillator frequency. During the time that GIN
is charging, the peak supply current will be approximately
equal to 2.2 times the output current. During the time that
GIN is delivering charge to GOUT the supply current drops
to approximately 0.2 times the output current. An input
supply bypass capacitor will supply part of the peak input
current drawn by the LT1054, and average out the current
drawn from the supply. A minimum input supply bypass
capacitor of 21lF, preferably tantalum or some other low
ESR type is recommended. A larger capacitor may be desirable in some cases, for example when the actual input
supply is connected to the LT1054 through long leads, or
when the pulse currents drawn by the LT1054 might affect
other circuitry through supply coupling.
YOUT (Pin 5): In addition to being the output pin, the pin is
also tied to the substrate of the device. Special care must
be taken in LT1054 circuits to avoid pulling this pin positive with respect to any of the other pins. Pulling Pin 5
positive with respect to Pin 3 (GND) will forward bias the
substrate diode which will prevent the device from starting. This condition can occur when the output load driven
by the LT1054 is referred to its positive supply, (or to some
other positive voltage). Note that most op amps present
just such a load, since their supply currents flow from
their V+ terminals to their V- terminals. To prevent startup problems with this type of load, an external transistor
must be added as shown in Figure 3. Th'is will prevent VOUT
v+
'----;4
(Pin 5) from being pulled above the ground pin (Pin 3) during start-up. Any small, general purpose transistor such as
2N2222 or 2N2219 can be used. Rx should be chosen to
provide enough base drive to the external transistor so
that it is saturated under nominal output voltage and maximum output current conditions. In some cases an N-channel enhancement mode MOSFet can be used in place of
the transistor.
Rx~ (IVOUTI).B
lOUT
YREF (Pin 6): Reference output pin. This pin provides a2.5V
reference point for use in LT1054 based regulator circuits.
The temperature coefficient of the reference voltage has
been adjusted so that the temperature coefficient of the
regulated output voltage is close to zero. This requires the
reference output to have a positive temperature coefficient as can be seen in the typical performance curves. . .
This non-zero drift is necessary to offset adrift term inher- ~
ent in the internal reference divider and comparator network tied to the feedback pin. The overall result of these
drift terms is a regulated output which has a slight positive temperature coefficient at output voltages below 5V
and a slight negative TC at output voltages above 5V. Reference output current should be limited, for regulator feedback networks, to approximately 60IlA. The reference pin
will draw =100IlA when shorted to ground, and will not affect the internal reference/regulator, so that this pin can
also be used as a pull-up for LT1054 circuits that require
synchronization.
CAP +ICAP - (Pin 2/Pin 4): Pin 2, the positive side of the input capacitor (CIN) is alternately driven between V+ and
ground. When driven to V+, Pin 2 sources current from
V+. When driven to ground, Pin 2 sinks current to ground.
Pin 4, the negative side of the input capaCitor is driven alternately between ground and VOUT. When driven to
ground, Pin 4 sinks current to ground. When driven to
VOUT, Pin 4sources current from COUT.ln all cases current
flow in the switches is unidirectional, as should be expected using bipolar switches.
Figure 3
5-27
LT1054
APPLICATions InFoRmATion
OSC (Pin 7): Oscillator pin. This pin can be used to raise or
lower the oscillator frequency, or to synchronize the de·
vice to an external clock. Internally, Pin 7 is connected to
the oscillator timing capacitor (Ct'" 150pF) which is alternately charged and discharged by current sources of
± 7p.A, so that the duty cycle is ",50%. The LT1054 oscilla·
tor is designed to run in the frequency band where
switching losses are minimized. However, the frequency
can be raised, lowered or synchronized to an external sys·
tern clock if necessary.
r---------------,
::::::C2
J
Figure 4
The frequency can be lowered by adding an external
capacitor (C1 Figure 4) from Pin 7 to ground. This will increase the charge and discharge times, which lowers the
oscillator frequency. The frequency can be increased by
adding an external capacitor (C2 Figure 4, in the range of
5pF-20pF) from Pin 2 to Pin 7. This capacitor will couple
charge into Ct at the switch transitions, which will shorten
the charge and discharge time, raising the oscillator frequency. Synchronization can be accomplished by adding
an external resistive pull-up from Pin 7to the reference pin
(Pin 6). A 20k pull·up is recommended. An open collector
gate or an NPN transistor can then be used to drive the os·
cillator pin at the external clock frequency as shown in
Figure 4. Pulling up Pin 7to an external voltage is not rec·
ommended. For circuits that require both frequency synchronization and regulation, an external reference can be
used as the reference point for the top of the R1/R2 divider
allowing Pin 6to be used as apull·up pOint for Pin 7.
5-28
Feedback/Shutdown (Pin 1): This pin has two functions.
Pulling Pin 1below the shutdown threshold ('" 0.45V) puts
the device into shutdown. In shutdown, the referencel
regulator is turned off and switching stops. The switches
are set such that both CIN and COUT are discharged
through the output load. Quiescent current in shutdown
drops to approximately 100p.A (see typical curves). Any
open·collector gate can be used to put the LT1054 into
shutdown. For normal (unregulated) operation the device
will start back up when the external gate is shut off. In
LT1054 circuits that use the regulation feature, the ex·
ternal resistor divider can provide enough pull-down to
keep the device in shutdown until the output capacitor
(COUT) has fully discharged. For most applications where
the LT1054 would be run intermittently, this does not present a problem because the discharge time of the output
capacitor will be short compared to the off time of the device. In applications where the device has to start-up before the output capacitor (COUT) has fully discharged, a
restart pulse must be applied to Pin 1of the LT1054. Using
the circuit of Figure 5, the restart signal can be either a
pulse (tp> 100p.s) or a logic high. Diode coupling the restart
signal into Pin 1will allow the output voltage to come up
and regulate without overshoot. The resistor divider R3/R4
in Figure 5 should be chosen to provide a signal level at
Pin 1of O.7V-1.1V.
Pin 1 is also the inverting input of the LT1054's error amplifier, and as such can be used to obtain a regulated output voltage.
Regulation
The error amplifier of the LT1054 servoes the drive to the
PNP switch to control the voltage across the input capacitor (CIN), which in turn will determine the output voltage.
Using the reference and error amplifier of the LT1054, an
external resistive divider is all that is needed to set the
regulated output voltage. Figure 5shows the basic regulator configuration and the formula for calculating the appropriate resistor values. R2 should be chosen to be 20kll
or greater because the reference output current is limited
LT1054
APPLICATions InFoRmATion
Jl
R3
V,N
R4
Jl
LT1054
.,..
~~
RESTART
SHUTDOWN
B£
R1
= (
V
+1) ~ (lVaUTI +1~
1 21V
-40mV
.
IVauTI
~EF
WHERE VREF=2.5V NOMINAL
VOUT
FOR EXAMPLE. TO GET VaUT= -5V
REFERRED TO THE GROUND PIN OF
THE LT1054. CHOOSE R1 =20k. THEN
R2=20k
(~
-40mV
2t
+1) =102 6k·
·CHOOSE THE CLOSEST 1% VALUE
FigureS
to '" 100/LA. R1 should be chosen to be in the range of 100k
to 300k. Frequency compensation is accomplished by
adjusting the ratio of CIN/COUT. For best results, this ratio
should be '" 1110. C1, required for good load regulation at
light load currents, should be 0.OO2/LF for all output
voltages.
It can be seen from the circuit block diagram that the
maximum regulated output voltage is limited by the supply voltage. For the basic configuration, IVOUT I referred to
the ground pin of the LT1054 must be less than the total of
the supply voltage minus the voltage loss due to the
switches. The voltage loss versus output current due to
the switches can be found in the typical performance
curves. Other configurations such as the negative doubler
can provide higher output voltages at reduced output currents (see typical applications).
Capacitor Selection
While the exact values of CIN and COUT are non-critical,
good quality, low ESR capacitors such as solid tantalum
are necessary to minimize voltage losses at high currents.
For CIN the effect of the ESR of the capacitor will be multi·
plied by four, due to the fact that switch currents are approximately two times higher than output current, and
losses will occur on both the charge and discharge cycle.
This means that using a capacitor with 10 of ESR for CIN
will have the same effect as increasing the output
impedance of the LT1054 by 40. This represents a significant increase in the voltage losses. For COUT the affect of
ESR is less dramatic. COUT is alternately charged and discharged at a current approximately equal to the output
current, and the ESR of the capacitor will cause a step
function to occur, in the output ripple, at the switch transitions. This step function will degrade the output regulation for changes in output load current, and should be
avoided. Realizing that large value tantalum capacitors
can be expensive, a technique that can be used is to parallel a smaller tantalum capacitor with a large aluminum
electrolytic capacitor to gain both low ESR and reasonable cost. Where physical size is a concern some of the
newer chip type surface mount tantalum capaCitors can
be used. These capaCitors are normally rated at working
voltages in the 10V-20V range and exhibit very low E.S.R.,
(in the range of 0.10).
Output Ripple
The peak-to-peak output ripple is determined by the value
of the output capacitor and the output current. Peak-topeak output ripple may be approximated by the formula:
where dV =pop ripple
f oscillator frequency
=
5-29
II
LT1054
APPLICATions InFoRmATion
For output capacitors with significant ESR, a second term
must be added to account for the voltage step at the
switch transitions. This step is, approximately equal to:
(2IoUT)(ESR of COUT)
Power Dissipation
The power dissipation of any Ln054 circuit must be lim·
ited such that the junction temperature of the device does
not exceed the maximum junction temperature ratings.
The total power dissipation must be calculated from two
components, the power loss due to voltage drops in the
switches, and the power loss due to drive current losses.
The total power dissipated by the LT1054 can be calcu·
lated from:
P"'(VIN-IVoUTI)(IOUT) +(VIN) (louT)(O.2)
where both VIN and VOUT are referred to the ground pin
(Pin 3) of the LT1054. For LT1054 regulator circuits, the
power dissipation will be equivalent to that of a linear
regulator. Due to the limited power handling capability of
the Ln054 packages, the user will have to limit output current requirements or take steps to dissipate some power
external to the LT1054 for large input/output differentials.
This can be accomplished by placing a resistor in series
with CIN as shown in Figure 6. A portion of the input voltage will then be dropped across this resistor, without af·
fecting the output regulation. Because switch current is
approximately 2.2 times the output current, and the resis·
tor will cause a voltage drop when CIN is both charging
and discharging, the resistor should be chosen as:
Rx =Vx/(4.4 lOUT)
where
VX",VIN - [(LT1054 voltage loss)(1.3) +IVOUTIJ
and lOUT =maximum required output current. The factor of
1.3 will allow some operating margin for the LT1054.
For example: assume a +12V to - 5V converter at 100mA
output current. First calculate the power dissipation without an external resistor:
P=(12V - I - 5V 1)(1 OOmA) +(12V) (100mA)(O.2)
P 700mW +240mW 940mW
=
5-30
=
Your
COUT'1'
C1
Figure 6
At 9JA of 1300 CIW for a commercial plastic device this
would cause a junction temperature rise of 122°C, so that
the device would exceed the maximum junction tempera·
ture at an ambient temperature of 25°C. Now calculate the
power dissipation with an external-resistor (Rx). First find
how much voltage can be dropped across Rx. The maxi·
mum voltage loss of the LT1054 in the standard regulator
configuration at 100mA output current is 1.6V, so
=
Vx 12V - [(1.6V)(1.3) + I - 5V IJ=4.9V and
Rx =4.9V/(4.4) (100mA) 110.
=
This resistor will reduce the power disSipated by the Ln054
by (4.9V) (100mA) 490mW. The total power disSipated by
the LT1054 would then be =(940mW - 490mW) =450mW.
The junction temperature rise would now be only 58°C.
Although commercial devices are guaranteed to be func·
tional up to ajunction temperature of 125°C, the specifications are only guaranteed up to a junction temperature of
100°C, so ideally you should limit the junction temperature to 100°C. For the above example this would mean
limiting the ambient temperature to 42°C. Other steps can
be taken, however, to allow higher ambient temperatures.
The thermal resistance numbers for the LT1054 packages
represent worst·case numbers with no heat-sinking and
still air. Small clip-on type heat sinks can be used to lower
the thermal resistance of the Ln054 package. In some·
systems there may be some available airflow which will
help to lower the thermal resistance. Wide PC board
traces from the LT1054 leads can also help to remove heat
from the device. This is especially true for plastic
packages.
=
LT1054
TYPICAL APPLICATions
Basic Voltage Inverter/Regulator
Basic Voltage Inverter
VIN
2,.F
&
T
lT1064
6
100~F
-Your
100~F
"¥
B£R1 ; ( VREF)Vour)
+1); (IVOur)
-40mV
1.21V
+1J' [REFER TO]
FIGURE 5
2
Negative Voltage Doubler
Positive Doubler
1N4001
VIN
3.5V TO 15V
1N4001
-1~~~~~--~f-----+--,+
LT1064
-:t'" 2~F
6
100~F VIN
VIN; -3.5V TO -15V
Vour;2VIN+(LT1054 VOLTAGE LOSS) +(Ox SATURATION VOLTAGE)
VIN;3.5V TO 15V
Vour~2VIN-(VL +2VOIOOE)
VL ; LT1 064 VOLTAGE LOSS
'SEE FIGURE 3
100mA Regulating Negative Doubler
VIN
3.5VTO 15V
HP5082-2810
2
1O~F
13
LT1064
5
4
1N4002
1O~F
R1
40k
1O~F --r:;'
..L
lN4002
1N4002
vour
SET
111
R2
500k
0.002
r----1--------------------------.. . . --4--.. . .
VIN;3.5 TO 15V
VOUT MAX~ -2VIN+[1054 VOLTAGE lOSS +2 (VOIOOE)[
B£;(
)Vour)
+1); (IVOUTI
Rl
VREF -40mV
1.21V
1:
10
,.F
-Vour
---lour .. 100mA MAX
+1~,[REFERTO]
FIGURE 5
2
5-31
LT1054
TYPICAL APPLICATions
Dual Output Voltage Doubler
VIN=3.5V TO 15V
+VOur-2VIN-(VL +2VOIOOEl
-Vour= -2VIN+(VL +2V0I00El
VL =LT1054 VOLTAGE LOSS
*=lN4001
1"
l00pF
J
-Your
+SV to :t 12V Converter
10pF
Strain Gage Bridge Signal Conditioner
5V
400
Z~Tl0pF
TRIM ":'
A=125
FOR 0-3VOUT
FROM FULL-SCALE BRIDGE
OUTPUT OF 24mV
10pF
5-32
LT1054
TYPICAL APPLICATions
3.SV to SV Regulator
V'N
3.5V TO 5.5V
201<
T + 5,.1'
Rl _
20k -
10,.F
R2
125k
3k
+}_ VOUT=5V
"Jr-=-+ 1,.F
~-4---+----1---
lN914
V'N=3.5VTO 5.5V
VOUl=5V
'OUT MAX = SOmA
lN5817
Regulating 200mA +12V to - SV Converter
S.F
12V
~~++--------------,
III
HP5082-2810
lOll 11M
lOll
10,.F
11M
10k
0002
2oo,.F
"E
·5
VOUT= -SV
IOUT=1I-2OOmA
-=- B = (
Rl
!VoUTI
+1) = (IVOUlI +1) [REFER TOj
VREF -40mV
1.21V
FIGURE S
2
Digitally Programmable Negative Supply
15V
.rl j : . + 4 - - - - - - - - - - - ,
-=-
5,.1'
20k
11
I
OIGiTAL
INPUT
2.5V [
t-----J
"'-=-T:"";"'~-.
20k
10,.F
.. S~-+--VOUT=-V'N(PROGRAMMED)
5-33
LT1054
TYPICAL APPLICATions
Positive Doubler with Regulation
(+5V to +8V Converter)
Negative Doubler with Regulator
VIN=5V 2~F
8.,..
.---.....----~+
50k
VIN
3.5V TO 15V
8
VO~J-4"""""--+l""-""--'i .......--11--.... 2
+
,~-'i+
lTl054
100~FI
0.03
h
.,..
2~
6
10k
R1
60k
tT1054
51-......--1
5.5k
10k
10k
10~F
0.002
1N4001
L---------.....
-~t_-+_--....~VOUT
2.5k
VIN=3.5V TO 15V
VOUT MAX= -2VIN+(VL +2VOIOOE)
VL =LT1054 VOLTAGE LOSS
~
R1
PACKAGE DESCRIPTiOn
=
(~_ +1~
VREF -40mV
2
1N4001
= (IVOUTI
1.21V
1100~
+1~,[REFERTOl
FIGURE 5
Dimensions in inches (millimeters) unless otherwise noted.
HPackage Metal Can
A
450{,;"7_003~d
~
0155-0185
(4191-4699)
--''---___---}t--;~~~ENCE
0500-0750
(1270-1905)
t
Jrn
NOTE LEAD DIAMETER IS UNCONTROLLED BETWEEN
THE REFERENCE PLANE AND SEATING PLANE
J8 Package Cerdip
OO15_0060
(0381-=1'524)
-L
(~~~=~ ~:)
I0965-17271~ j
0200
(5080)
MAX
~ ~~~
I
MIN
0100%0010
0038-0068
L,2540.02541
t :l
0
o. 400
(l~~O)
765
0009-0015
(0229-0.381)
1
5-34
2
3
r
0250:1:0010
~O.254)
4
0065
(1~~1)L- -
'-II.~·llnlJ\Q
....A..,
TECHNOLOO~~~--Sw-itc-h-e-d-C-a-p-a-c-ito-r-V-o-It-a-g-e
FEATURES
•
•
•
•
•
•
•
100mA Output Current
Low Loss-1.1V at 100mA
Operating Range 3.5V to 15V
Reference and Error Amplifier for Regulation
External Shutdown
External Oscillator Sync
Can be Paralleled
APPLICATions
•
•
•
•
LTl054CS/LT10541S
Voltage Inverter
Negative Voltage Doubler
Voltage Regulator
Positive Voltage Doubler
Converter with Regulator
DESCRIPTiOn
The LT1054 is a monolithic, bipolar, switched capacitor
voltage converter and regulator. The LT1054 provides
higher output current than previously available converters
with significantly lower voltage losses. An adaptive switch
drive scheme optimizes efficiency over a wide range of
output currents. Total voltage loss at 100mA output cur·
rent is typically 1.1 V. This holds true over the full supply
voltage range of 3.5V to 15V. Quiescent current is typically
2.5mA.
The LT1054 also provides regulation, a feature not previ·
ously available in switched capacitor voltage converters.
By adding an external resistive divider, a regulated output
can be obtained. This output will be regulated against
changes in both input voltage and output current. The
LT1054 can also be shut down by grounding the feedback
pin. Supply current in shut down is less than 100JLA.
The internal oscillator of the LT1054 runs at a nominal fre·
quency of 25kHz. The oscillator pin can be used to adjust
the switching frequency, or to externally synchronize the
LT1054.
BLOCK DIAGRAm
Voltage Loss
3.5V ",VIN '" 15V
CIN=COUT=100~F
Tj=125°C
./
V
V
./ ~ ~
,..
D. V
o
·EXTERNAL CAPACITORS
o
,/
./
"",'"
./
",
V ..... ..... ......
v t::- ~ ..... ......
"' I-'K
Tj=25°C
I
1"Tj=-55°C_
INDICATES GUAMNTEEb TEin pOINT
I--"""
10 20
30 40 50 60 70 80 90 100
OUTPUT CURRENT (mA)
COUTO
5-35
lJI
LT1054CS/LT1054IS
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Supply Voltage (Note 1) ............................. 16V
Input Voltage (Pin 3) ...................... OV SVPIN3SV+
Input Voltage (Pin 13) .................. OV SVPIN13SVREF
Operating Temperature Range
LT1 054C ................................. OOC to 70°C
LT10541.. ............................. -40°C to 85°C
Junction Temperature (Note 2) ..................... 125°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
ORDER PART
NUMBER
TOP VIEW
LT1054CS
LT1 0541 S
PART MARKING
LT1054CS
LT10541S
S PACKAGE
16 LEAO PLASTIC SOL
ELECTRICAL CHARACTERISTICS
PARAMETER
Supply Current
Supply Voltage Range
Voltage Loss (VIN -IVOUTI)
Output Resistance
Oscillator Frequency
Reference Voltage
CONDITIONS
ILOAO=OmA
VIN=3.5V
V1N =15V
CIN = COUT = 100~FTantalum
(Note 3)
lOUT = 10mA
10UT=100mA
alOUT = 10mA to l00mA
(Note 4)
3.5VsVINS15V
IREF=60~A
TI=25·C
Regulated Voltage
Line Regulation
load Regulation
Maximum Switch Current
Supply Current In Shutdown
VIN = 7V, Ti = 25·C
(Note 5)
7VsV IN s12V
(Note 5)
VIN =7V
1000 s RL s 5000
(Note 5)
VPIN3=OV
The • denotes specifications which apply over the full operating tempera·
ture range. For Cgrade parts these specifications also apply up to a junco
tion temperature of l00·C.
Notel: The absolute maximum supply voltage rating of 16V Is for unregu·
lated circuits. For regulation mode circuits with VouTs15Vat Pin 11, this
rating may be increased to 2OV.
Note 2: The devices are guaranteed by design to be functional up to the
absolute maximum junction temperature.
5-36
TYP
MAX
2.5
3.0
3.5
4.5
15
0.35
1.10
0.55
1.60
10
25
15
35
2.35
2.25
2.50
2.65
2.75
V
V
-4.70
-5.00
5
-5.20
25
V
mV
10
50
mV
mA
150
~
MIN
•.:
.,
••
•
•
•
•
•
•
3.5
15
300
100
UNITS
mA
mA
V
V
V
II
kHz
Note 3: For voltage loss tests, the device is connected as a voltage
inverter, with Pins 3,12, and 13 unconnected. The voltage losses may be
higher in other configurations.
Note 4: Output resistance is defined as the slope of the CUlVe, (aVOUT vs
alour), for output currents of 10 to 100 mAo This represents the linear por·
tion of the cUlVe. The incremental slope of the cUlVe will be higher at cur·
rents <10mA due to the characteristics of the switch transistors.
Note 5: All regulation specifications are for a device connected as a posi·
tive to negative converter/regulator with Rl 2Ok, R2 = 102.5k, Cl = O.05~F,
CIN = 10~F tantalum, COUT = l00~F tantalum.
=
'-Y--Llnll\Q
~, TECHNOLOGY~--5-A-a-n-d-2-.5-A-H-ig-h-E-ff-ic-ie-n-C-Y
LTl070/LT107l
FEATURES
Switching Regulators
DESCRIPTion
•
•
•
•
•
•
•
•
•
•
The LT1070 and LT1071 are monolithic high power switching regulators. They can be operated in all standard
switching configurations including buck, boost, flyback,
forward, inverting and "Cuk". A high current, high efficiency switch is included on the die along with all oscillator, control, and protection circuitry. Integration of all
functions allows the LT1070/LT1071 to be built in a standard 5-pin TO-3 or TO-220 power package. This makes it extremely easy to use and provides "bust proof" operation
similar to that obtained with 3-pin linear regulators.
Wide Input Voltage Range 3V-60V
Low Quiescent Current -6mA
Internal5A Switch (2.5A for LT1071)
Very Few External Parts Required
Self-Protected Against Overloads
Operates in Nearly All Switching Topologies
Shutdown Mode Draws Only 50/LA Supply Current
Flyback-Regulated Mode has Fully Floating Outputs
Comes in Standard 5-Pin Packages
Can be Externally Synchronized (Consult Factory)
The LT1070/LT1071 operates with supply voltages from 3V
to 60V, and draws only 6mA quiescent current. It can deliver load power up to 100 watts with no external power devices. By utilizing current-mode switching techniques, it
provides excellent AC and DC load and line regulation.
APPLICATions
•
•
•
•
•
•
•
Logic Supply 5V @ 10A
5V Logic to ± 15V Op Amp Supply
Offline Converter up to 200W
Battery Upconverter
Power Inverter (+ to -) or (- to +)
Fully Floating Multiple Outputs
For Lower Current Applications see LT1072
USER NOTE:
TIlls data sheet Is only Intended to provids specifications. graphs, and ageneral functional description of
the LT10701LT1071. Application circuits are included to show the capability of the LT10701LT1071. Acom·
plete design manual (AN·I9) should be obtained to asSist in developing now desig"s. This manual con·
tains acomprehensive discussion of both the moro and the extemal components usod with it, as wail a,
complete fonnula, for calculating the values of the.. components. TIle manual can also be usod for the
LT1071 by factoring in the lower switch current rating. Asecond application note, AN·25, which detail,
off·line applications i, available.
The LT1070/LT1071 has many unique features not found
even on the vastly more difficult to use low power control . .
chips presently available. It uses adaptive anti-sat switch ~
drive to allow very wide ranging load currents with no loss
in efficiency. An externally activated shutdown mode reduces total supply current to 5O/LA typical for standby
operation. Totally isolated and regulated outputs can be
generated by using the optional "flyback regulation
mode" built into the LT1070/LT1071, without the need for
opto-couplers or extra transformer windings.
TYPICAL APPLICATiOn
Maximum Output Power"
Boost Converter (5V to 12V)
100
/
80
/
.,...
/
///
10.7k
1%
ID
20
V
!;( 0.6
'"~
~
:I:
0.4
0.2
o
0 25 50 75 100 125 150
TEMPERATURE (OC)
Line Regulation
TI=I~
~
r
o
~
~
~
1.242
~
1.240
~
20
30
40
INPUT VOLTAGE (V)
50
15
-75
"-
)""
REFERENCE VOLTAGE
TI= -55;'-
./ ~
V/
Ti",25°C
700
40
t600
~ 500
0 25 50 75 100 125 150
TEMPERATURE (OC)
i"'- .........
"a;
m:::>
-
38~~400
z~
""'" I'..
"''''t§ 300
37 ~
~0iI
100
o
-75
-~
-25
0 25 50 75 100 125
TEMPERATURE (OC)
r-
T=2JOC
j
J .1. .1
-90%DUTYCY~
r
14
1 13 .,...... f-"""
~ 12
g§ 11
--
13
~ 10
T
J.,......1""
.....
~
~ f--"1
g
7
o
W
w
f--
-
~
~
~
INPUT VOLTAGE (V)
'UNDER VERY LOW OUTPUT CURRENT
CONDITIONS, DUTY CYCLE FOR MOST
CIRCUITS WILL APPROACH 10% OR LESS.
1~
Tj=25°C
iii
I
0% OUr\- CYCLE1
1m
140
~
I-
10% DUTY CYCLE
~
160
......
I
H
Supply Current vs Supply Voltage
(Shutdown Mode)
J
~%DUTYCYC~
~
TEMPERATURE (OC)
I SWITCH slOmA
I
0 m
-H-~-m
1~
Supply Current vs Input Voltage·
6
-25
36!:::!.~200
V
023
SWITCH CURRENT (A)
'AVERAGE LT1070 POWER SUPPLY CURRENT IS
FOUND BY MULTIPLYING DRIVER CURRENT BY
DUTY CYCLE, THEN ADDING QUIESCENT
CURRENT.
800
41
M
140
v
a
39 "
I: ~
/'~
I I I I
-~
Feedback Bias Current vs
Temperature
I~M
15
V L
/ 1/
/'
tEDLLJ
17
35
60
~FEELKllkJ
18
1.236
16
5-40
~
~ 1.238
V
~
""uOil
rlW!TCHI~G FJEOUJNCY
~ 1.244
160
o~
-55°C
3
4
5
6
SWITCH CURRENT (A)'
'DIVIDE CURRENT BY 2 FOR LT107l
~ 1.246
Driver Current· vs Switch Current
20
21
20
16
1.248
/
10
'"
~
J I I .1
RFEEDBACK - 500!)
I I I
§! 19
2
!j
~
......./ 1'/
f
w
Reference Voltage vs Temperature
/\~
,
~
~V
1~~
I-TI=-~
v-:: ~
/'5:; ~ ~C
~ 0.8
I I I I
22
Y
150 0
~
I'-
Z
1.4
§; 1.0
"'- I'..
.......
CURRENT=~ .........
SWITCH
:;;
:;-
....... ~ITCH CURRENT = 5A
i"'- .........
§!
:il
23
1.6
r--... r--..
!j
~
Isolated Mode Flyback Reference
Voltage
Switch Saturation Voltage
60
120
100
~
u
80
[
60
:::>
'"
Vc-50mV
/'
~
r
40
20
o
Vc=OV
o"
10
20
30
40
SUPPLY VOLTAGE (V)
50
60
LT1070/LT1071
TYPICAL PERFORmAnCE CHARACTERISTICS
NormaliFlyback Mode Threshold
on Feedback Pin
-24
200
5000
490
-22
lBO
4500
_4BO
>
~470
t3 460
'"~ 450
'"'
~ 440
g;:
430
u.
420
t±:
---
-
l -I--"
r--...
160
~
~ 140
l>
-14 ~ gj 100
co
25 50
75 100
TEMPERATURE (0C)
125
~
-8
FEEDBACK PIN CURRENT (AT THRESHOLD)
I'--.!.
BO
i
-10~
-.
20
-4
o
-
J
CUkRENt (out OF e PIJ,!..-
-:.-
300
V
!250
~
'"
~ 200
~
~ 150
-
VOLTAjS-
~
100
o
o
-400
11
-350
10
-300
.-- I--""
.....
~
500
20
30 40 50 60 70
Ve PIN VOLTAGE (mV)
-75 -50 -25
BO 90 100
I
450
400
~ 350
-150~ ~
5
~ 200
g;
4
~ 150
3
100
~
-100-
VO~TAG~
Feedback Pin Clamp Voltage
6
-50
B
.
VSUPPLV
60V
VSUPPLV
3V
~ 300
~
300
r-\
V
300
I
~
J
!z
~'
=>
~ -100
20 30 40 50 60 70
SWITCH VOLTAGE (V)
BO 90 100
I
150°C
0
0.5
I
I
I I
I I
-30
'{l
g5000
I
3
~ 4000
60
8:z 2000
90 ~
120
I\.
;;; 1000
>-
-
150
lBO
I I
L
1.0
1.5
2.0
Ve PIN VOLTAGE (V)
~
l>
\
o=>
I
30
G;::'"
~
03000
I
I
I
I
I
1
I
6000
VFB I= 0IBV (fUR~ENTloUT 10F VIC PI~)-
I
I
0 0.10.20.304050607 O.B 09
FEEDBACK CURRENT (mA)
7000
tl ='25ot
I I
I I
I I
'"' -200
~
-G
10
I
II
-300
100
-
~
Transconductance of Error
Amplifier
L L I
100
200
o
0 25 50 75 100125150
TEMPERATURE (0C)
VFB = 1.5V (CURRENT INTO Ve PIN)
200
BOO
V
--- II
-5JoC
o
-75-50-25
900
VSUPPLV = 55VVSUPPLV = 40V
~ 600
VSUPPLV = 15V
.j....
§ 500
VSUPPLV = 3V.....-:
u
13 400
........
'"
Vc Pin Characteristics
-
-- l
:--
50
0 25 50 75 100 125 150
TEMPERATURE (0C)
~ 700
,-
~ 250
- 1000
-200~ g§
Switch "Off" Characteristics
iii
2000
~ 1500
Ve = 0.6V
1
r-
;;;
0
-75 -50 -25
!:::
10
u
r-
8
7
~
Vc
IS REDUCED UNTIL
RE~ULA ~OR C~RRE~T DRIOPS ~ELOf 300rA
50
- ---
I
--
....
«
~ 2500
'"
is
125°C
I
(Ve PIN)
!!.V (FB PIN)
~ 3000
Idle Supply Current vs
Temperature
400
r--
I
-6
V
V
,,;T
_ Ai
Gm -
l3500
/./
0
40
150
/
L'\5 C II,,;
J
./'"
60
Shutdown Thresholds
350
.....
./
u
-12 ~
g;l
V V
TI=150°C
~
'"
-0 4000
. /V
-16 ~ >- 120
r-t--l
400
-50 -25
-20 ~
-18
FEEDBACK PIN VOLTAGE
(AT THRESHOLD)
410
>"
Error Amplifier Transconductance
Shutdown Mode Supply Current
500
-1000
2.5
lk
10k
lOOk
1M
FREQUENCY (Hz)
210
10M
5-41
LT1070/LT1071
BLOCK DIAGRAm
16V
SHUTDOWN
CIRCUIT
SWITCH
OUT
O.02[J
(O.04[J LT1071)
O.15V
LT1070/LT1071 OPERATion
The LT10701LT1071 is a current mode switcher. This means
that switch duty cycle is directly controlled by switch current
rather than by output voltage. Referring to the block diagram,
the switch is turned "on" at the start of each oscillator cycle.
It is turned "off" when switch current reaches a predetermined level. Control of output voltage is obtained by using
the output of avoltage sensing error amplifier to set current
trip level. This technique has several advantages. First, it has
immediate response to input voltage variations, unlike ordinary switchers which have notoriously poor line transient
response. Second, it reduces the 90 0 phase shift at midfrequencies in the energy storage inductor. This greatly simplifies closed loop frequency compensation under widely
varying input voltage or output load conditions. Finally, it
allows simple pulse-by-pulse current limiting to provide maximum switch protection under output overload or short condi-
5-42
tions. Alow-dropout internal regulator provides a2.3V supply
for all internal circuitry on the LT1070/LT1071. This lowdropout design allows input voltage to vary from 3V to f1JV
with virtually no change in device performance. A40kHz oscillator is the basic clock for all internal timing. It turns "on"
the output switch via the logic and driver circuitry. Special
adaptive anti-sat circuitry detects onset of saturation in the
power switch and adjusts driver current instantaneously to
limit switch saturation. This minimizes driver dissipation and
provides very rapid turn-off of the switch.
A 1.2V bandgap reference biases the positive input of the error amplifier. The negative input is brought out for output
voltage sensing. This feedback pin has a second function;
when pulled low with an external resistor, it programs the
LT1070/LT1071 to disconnect the main error amplifier output
LT1070/LT1071
LT1070/LT1071 OPERATion
and connects the output of the flyback amplifier to the com·
parator input. The LT1070/LT1071 will then regulate the value
of the flyback pulse with respect to the supply voltage. This
flyback pulse is directly proportional to output voltage in the
traditional transformer coupled flyback topology regulator.
By regulating the amplitude of the flyback pulse, the output
voltage can be regulated with no direct connection between
input and output. The output is fully floating up to the break·
down voltage of the transformer windings. Multiple floating
outputs are easily obtained with additional windings. A special delay network inside the LT1 070/Ln071 ignores the leak·
age inductance spike at the leading edge of the flyback pulse
to improve output regulation.
The error signal developed at the comparator input is brought
out externally. This pin IYcl has four different functions. It is
used for frequency compensation, current limit adjustment,
soft starting, and total regulator shutdown. During normal
regulator operation this pin sits at a voltage between O.9V
(low output current) and 2.0V (high output current). The error
amplifiers are current output (gm) types, so this voltage can
be externally clamped for adjusting current limit. Likewise, a
capacitor coupled external clamp will provide soft start.
Switch duty cycle goes to zero if the Vc pin is pulled to ground
through a diode, placing the LT1070/LT1071 in an idle mode.
Pulling the Vc pin below O.15V causes total regulator shut·
down, with only 50~ supply current for shutdown circuitry
biasing. See AN·19 for full application details.
TYPICAL APPLICATiOnS (Note that maximum output currentsare divided by 2lor LT1071.)
Driving High Voltage FET
(lor Offline Applications, See AN·25)
External Current Limit
V,
DI
lTIll7O/LT1071
R2
~2V
1D-20V-=-
LT107DILT1071
Negative to Positive Buck·Boost Converter
GIlD
J'I/
R1
5000
01
Vc
External Current Limit
LTt0701tT1071
GIlD
R1
1k
R2
C1
1000pF
'--6--.......~~_-+'REQUIRED IF INPUT LEADS",2'
"PULSE ENGINEERING 92113
Rs
C2
NOTE THAT THE LTl07D/LT1071
GNO PIN IS NO LONGER COMMON
TOV,N(-)
5-43
LT1070/LT1071
TYPICAL APPLICATions
Totally Isolated Converter
OPTIONAL
OUTPUT FILTER
01
','"
N=0.875=7:8
FORVOUT=15V
\
"
"REQUIRED IF INPUT LEADS", 2"
V
'~
~SWITCHVOLTAGE
LOFF
tON
rm--u..
VOUT
·OV
----'
+Vj{V,=DIODEFORWARD VOLTAGE)
SECONDARY VOLTAGE
t
N· VIN
Flyback Converter
CLAMP TURN-ON
SPIKE
VSNUB
V'N
bE ~m~._~'~-''''''
I
--I
~~
~
OV
r-......~_~-*
__ ~~UT
6A
VIiWI--......_ _..J
R1
3.74k
VOUT
~
+ V,
rhN.V'N
OV~ ~11
o:iclr
IT..Ol."
C4
100",,-
LT1070/LT1071 SWITCH VOLTAGE
AREA "a" = AREA "b" TO MAINTAIN
ZERO DC VOLTS ACROSS PRIMARY
SECONDARY VOLTAGE
AREA "e" = AREA "d" TO MAINTAIN
ZERO DC VOLTS ACROSS SECONDARY
PRIMARY CURRENT
SECONDARY CURRENT
LT1070 SWITCH CURRENT
R2
1.24k
SNUBBER DIODE CURRENT
"REQUIRED IF INPUTLEADS ",2"
5-44
LT1070/LT1071
TYPICAL APPLICATions
Positive to Negative Buck·Boost Converter
03 t
1N4001
·REQUIRED IF INPUT LEADS .. 2"
-PULSE ENGINEERING 92113
r-I........- - - - - 1 -......,.;..-....---1-~~30V
t
!.TWO
02
1N914
TO AVOID START-UP PROBLEMS
FOR INPUT VOLTAGES BELOW 10V,
CONNECT ANODE OF 03 TO VIN,
AND REMOVE R5. C1 MAY BE
REDUCED FOR LOWER OUTPUT
CURRENTS. C1 ~(500.F)(loUT)
FOR 5V OUTPUTS, REDUCE R3
TO 1.5k, INCREASE C2 TO 0.3,F,
AND REDUCE R6 TO 1000.
L1··
200,,"
Voltage Boosted Boost Converter
V$VI
H-----I
1
} TOTAL INDUCTANCE=4mH
INTERLEAVE PRIMARY ANO
SECONDARYFOR LOW LEAKAGE
INDUCTANCE.
~1_5
C2
0.047
Current Boosted Boost Converter
C3
VIN
_
16c24V-
I 01
VOUT
)e-~""'-~28V
4A
R1
27k
lTI070
C1
R2
1.24k
5-45
LT1070/LT1071
TYPICAL APPLICATions
Negative Buck Converter
01
VIN
tl
LTi070
1DO 'F'
FS ....- - - - - - - '
GNO
~
-~~
U"
200,H
C3 +
DPTIONA
INPUT
FILTER
L3
VSw
C2
1DDD,F
Cl
R2
1.24k
,----~------~--~
'REQUIRED IF INPUT LEADS,,2"
"PULSE ENGINEERING 92113
Negative Current Boosted Buck Converter
MINIMUM
LOAD=10mA
r-....--....'-'-+-.....--+--------~--~V~~6A
R5
Ql
2N3906
1:N
Vsw
R1=~_VOUT-O.6V
1mA
lT10lO
GND
R2
1.24k
Positive Buck Converter
VIN ....- - - -.....- - - - - - - - - - - - - - - - - - - - ,
Vsw
L2
~5
06~~Op~~L
m070
FILTER
R1
374k
~200'F
-
02
GNO
R4
10n
'-----....--.....;;'--+-......;.~\.-..:..--....--~...............'""'"""1H~+_5V, 4.5A
1100mA
'MINIMUM
'REQUIRED IF INPUT LEADS,,2"
"PULSE ENGINEERING 92112
5-46
LT1070/LT1071
TYPICAL APPLICATions
Negative Boost Regulator
Driving High Voltage NPN
C1
02
VIII
V&N
R1
27k
tTl0'fl)
+ C3
10,F
+ C1
1000,F
Ro
(MINIMUM
LOAD)
GNO
R2
124k
11
Y,N
C2
o 22,F
200J!H
lTIO'fl)/lTI07f
01
VOUT
-15V
GND
-28V@1A
"REQUIREO IF INPUT LEAOS ,,2"
"SETS I B (ON)
··SETS I B (OFF)
Negative Input·Negative Output Flyback Converter
T1
II
1:N
R2
5k
R3
1k
111
•
.. Viii.
......+----~--VOUT
R1
= IVOUTI-1.6V
200pA
R4
1.24k
-Y,N
Forward Converter
T1
01
VOUT
...............rnrn_-_-5V
6A
R1
3.74k
Y,N _
04
20-30V-
GNU
~r----~Rr6-~--~~----'
330
C4
R5
R2
1.24k
111
5-47
LT1070/LT1071
TYPICAL APPLICATions
Positive Current Boosted Buck Converter
~~-------------.-------------t--~-----1~--'
II
V~~
__
~~
-+__-J
______
1:N
•
N=0.25
lnD10
R2
1.24k
R2
1k
D1
R3
6800
C1
0.33
' - - -......f=--......------------+--~--~S~10A
"REQUIRED IF INPUT LEADS >02"
PACKAGE DESCRIPTiOn Dimensions in inches (millimeters) unless otherwise noted.
TO·3 Type Metal Can (Steel) KPackage
TO·220 Type Plastic
TPackage
l
f[-n
U
0320-0350
(8128-8890)
O.170_0·,80
~
~
(1143-1397)
0460-0500
0420-0480
(1067-1219)
(~
.Q..g!L0710
(1575)fiB.031
0.152-0162
(3860-4114)
.TVP
O.167-0m
(4.Z41-4495)
• TV!'
LT1070MK, LT1070HVMK
LT107OCK, LT1070HVCK
LT1071MK, LT1071HVMK
LT10ncK, LT1071HVCK
5-48
TJMAX
150'C
l00'C
150'C
l00'C
9JC
2'C/W
2'C/W
4'C/W
4'C/W
9JA
35'C/W
35'C/W
35'C/W
35'C/W
I
I
I
I
LT107DCT, LT1070HVCT
LT1071CT, LT1071 HVCT
I
I
TJMAX
l00'C
l00'C
I
I
I
9JC
2'C/W
4'C/W
I
I
I
9JA
75'C/W
75'C/W
I
I
I
~~~~~~~--------1-.2-5-A-H-i9-h-E-ff-iC-~:_1~_;_~
FEATURES
Switching Regulator
DESCRIPTion
•
•
•
•
•
•
•
•
•
•
The LT1072 is a monolithic high power switching
regulator. It can be operated in all standard switching
configurations including buck, boost, flyback, forward, inverting and "Cuk". Ahigh current, high efficiency switch
is included on the die along with all oscillator, control, and
protection circuitry. Integration of all functions allows the
LT1072 to be built in astandard 5-pin TO-3 or TO-220 power
package as well as the a-pin mini DIP. This makes it extremely easy to use and provides "bust proof" operation
similar to that obtained with 3-pin linear regulators.
Available in MiniDIP, TO-220, and TO-3 Packages
Wide Input Voltage Range 3V-60V
Low Quiescent Current-6mA
Internal1.25A Switch
Very Few External Parts Required
Self-Protected Against Overloads
Operates in Nearly All SWitching Topologies
Shutdown Mode Draws Only 50~ Supply Current
Flyback-Regulated Mode has Fully Floating Outputs
Can be Externally Synchronized
The LT1072 operates with supply voltages from 3V
to 60V, and draws only 6mA quiescent current. It can deliver load power up to 20 watts with no external power dev.ices. By utilizing current-mode switching techniques, it
provides excellent AC and DC load and line regulation.
APPLICATions
•
•
•
•
•
•
•
Logic Supply 5V @ 2.5A
5V Logic to ± 15V Op Amp Supply
Offline Converter up to 50W
Battery Upconverter
Power Inverter (+ to -) or (- to +)
Fully Floating Multiple Outputs
Driver for High Current Supplies
USER NOTE:
This data sheet Is only intended to provide specifications, graphs, and aganeral functional description of
the m072. Application circuits are included to show the capability of the m072. A complete design
manual (AN·t9) should be obtained to assist In developing new designs. This manual contains acomprehensive discussion of both the LTt070 and the external components used with It, as w~1 as complete
formulas for calculating the values of thasa components. The manual can also be used for the LTt072 by
factoring in the lower switch current rating.
The LT1072 has many unique features not found even on
the vastly more difficult to use low power control chips
presently available. It uses adaptive anti-sat switch drive
to allow very wide ranging load currents with no loss in
efficiency. An externally activated shutdown mode reduces total supply current to 50~ typical for standby
operation. Totally isolated and regulated outputs can be
generated by using the optional "flyback regulation
mode" built into the LT1072, without the need for optocouplers or extra transformer windings.
TYPICAL APPLICATiOn
Maximum Output Power·
Boost Converter (5V to 12V)
5V
25
I
V
20
I
~ 15
mora
C3
25p.F*
12V,0.25A
10.7k
-
I
~
~
I/"/
JU
GND
470,F
V60
1.24k
1pF
'REQUIRED IF INPUT LEADS ,,2"
"PULSE ENGINEERING 52626
Vo=30V,_
V
-
BOOST/ / '
10
o
BUCK.BO~ST-
/
... VIII .. .. Vow
7
o
ISOLATED _
....... fo-
I
FLYBACK·-
~
BU~~!~e~ I-----
10
20
30
40
50
INPUT VOLTAGE (VI
'ROUGH GUIDE ONLY. BUCK MODE POUT= 1A XVOUT.
MINI DIP OUTPUT POWER MAY BE LIMITED BY PACKAGE TEMPERI\fURE RISE AT HIGH INPUT
VOLTAGES OR HIGH DUTY CYCLES.
5-49
II
LT1072
A8S0LUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage
LT1072HV (See Note 1) ......................... 60V
LT1072 (See Note 1) ........................... 40V
Switch Output Voltage
LT1072HV ....................................... 75V
LT1072 ....................................... 65V
Feedback Pin Voltage (Transient, 1ms) ............. ± 15V
Operating Junction Temperature Range
LT1072HVM, LT1072M ........ -55°C to +150°C
LT1072HVC, LT1072C (Oper.) ..... O°C to +100°C
LT1072HVC, LT1072C (Sh. Ckt.) ... OOC to +125°C
Storage Temperature Range .......... - 65°C to +150°C
Lead Temperature (Soldering, 10sec) ............. 300°C
Note 1: Minimum switch "on" time forthe LT1072 in current limit is
'" O. 7~sec. This limits the maximum input voltage during short circuit
conditions, in the buck and inverting modes only, to ",40V. Normal
(unshorted) conditions are not affected. If the LT1072 is being operated in
the buck or inverting mode at high input voltages and short circuit
conditions are expected, a resistor must be placed in series with the
inductor, as follows:
The value of the resistor is given by:
R= (t)(1) (V,N)- VI _ RL
l(lIMIT)
ORDER PART NUMBER
BonOM VIEW
.~.'
o
0
1
4
2
3
LT1072HVMK
LT1072MK
LT1072HVCK
LT1072CK
CASE
ISGND
VIN
FB
4 LEAD TO·3
LT1072HVCT
LT1072CT
FRONT VIEW
5
4
V'N
01
Vc
Vsw
~~_GNDFB
0
1
5 LEAD TO· 220
TOP VIEW
GNOI! •
'-'"
LT1072MJ8
LT1072CJ8
LT1072CN8
~E2
~vsw
~E1
vc~
FBIl
~V'N
NC!!
HERMETIC J8 PACKAGE
PLASTIC DIP N8 PACKAGE
t = Minimum "on" time of LT1072 in current limit, ",0.7~s
f = Operating frequency (40kHz)
Vf = Forward voltage of external catch diode at I(LlMIT)
l(lIMIT) = Current limit of LT1072 (2A)
RL = Internal series resistance of inductor
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VIN =15V, Vc =O.5V, VFB =VREF, output pin open.
SYMBOL
VREF
PARAMETER
Reference Voltage
IB
Feedback Input Current
gm
Error Amplifier
Transconductance
Error Amplifier Source or
Sink Current
Error Amplifier Clamp
Voltage
Reference Voltage Line
Regulation
Error Amplifier Voltage
Gain
Minimum Input Voltage
Supply Current
Control Pin Threshold
Av
10
NormaliFlyback Threshold
on Feedback Pin
5-50
CONDITIONS
Measured at Feedback Pin
Vc=0.8V
VFB= VREF
alc=
:!:25~A
Vc= 1.5V
Hi Clamp, VFB = 1V
Lo Clamp, VFB = 1.5V
3V:sV,N:sVMAX
Vc=0.8V
0.9V:sVc:S1.4V
3V:sV ,N :sVMAX, Vc=0.6V
Duty Cycle = 0
•
•
•
•
MIN
1.224
1.214
3000
2400
150
120
TYP
1.244
1.244
350
4400
200
UNITS
V
nA
~mho
~
~
1.8
0.25
0.38
500
SOO
2000
VN
2.6
6
0.9
3.0
9
1.08
1.25
0.54
V
rnA
V
•
•
•
MAX
1.264
1.274
750
1100
6000
7000
350
400
2.3
0.52
0.03
0.8
0.6
0.4
0.45
V
V
'ioN
V
LT1072
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VIN = 15V, Vc =O.5V, VFB =VREF, output pin open.
SYMBOL
VFB
BV
PARAMETER
Flyback Reference Voltage
CONDITIONS
Change in Flyback
Reference Voltage
Flyback Reference Voltage
Line Regulation
Flyback Amplifier
Transconductance (gm)
Flyback Amplifier Source
and Sink Current
Output Switch Breakdown
Voltage
0.05slFBslmA
IFB=50~A
diiN
dlsw
Supply Current Increase
During Switch On·Time
f
Switching Frequency
UNITS
V
6.8
MAX
17.6
18
8.5
0.01
0.03
'ioN
150
300
500
~mho
15
25
65
75
32
40
90
90
0.6
70
70
~
~
V
V
1
!l
IFB=50~
Vc=0.6V
IFB=50~
••
Source
Sink
••
•
LT1072
LT1072HV
3V SVIN SV MAX
Isw=5mA
Isw=1.25A
Control Voltage to Switch
Current Transconductance
SWitch Current Limit
ILIM
•
3VSVINSVMAX
dlc::: ± 10~A
Output Switch (Note 1)
"On" Resistance
VSAT
MIN
15
14
4.5
TYP
16.3
V
2
Duty Cycle s50%
Duty Cycles50%
Duty Cycle = 80% (Note 2)
Tj~25°C
Tj<25°C
•
Maxjmum Switch Duty Cycle
Flyback Sense Delay Time
Shutdown Mode
3VSV IN SVMAX
Supply Current
Vc=0.05V
Shutdown Mode
3VSVINSVMAX
Threshold Voltage
..
The • denotes the speCifications which apply over the full operating
temperature range.
Note 1: Measured with Vc in hi clamp, VFB = 0.8V.
3
3.5
2.5
A
A
A
25
35
mAlA
40
45
47
97
kHz
1.25
1.25
1
••
35
33
90
•
DC (max)
AN
100
92
1.5
100
%
~
150
250
~A
250
mV
300
mV
• 50
..
Note 2: For duty cycles (DC) between 50% and 80%, minimum guaranteed
switch current is given by ILiM = 0.833 (2 - DC).
TYPICAL PERFORmAnCE CHARACTERISTICS
Switch Current Limit vs Duty Cycle
Maximum Duty Cycle
96
22
95
2.0
/
~ 94
-55°C
125°C
w
/25°C
....;::
~
E;: ~ :-..
93
i;
...;;:::~
'" 92
91
o
o
10
20 30 40
50 60 70 80 90 100
DUTY CYCLE (%)
Flyback Blanking Time
-
~
...... ,/'
......V
V
0
V
14
25
50
75 100 125 150
JUNCTION TEMPERATURE lOG)
/
/
1.2
90
-;15 -50 -25
/
1.8
......V
10
-75 -50 -25
0
25
50
75 100 125 150
JUNCTION TEMPERATURE lOG)
5-51
LT1072
TYPICAL PERFORmAnCE CHARACTERISTICS
Minimum Input Voltage
2.9
~
r-....
..........
§!
~ 2.6
;;;
~ .......
r-.... I"...
SWITCH CURRENT =';;A--
:;;
~ 2.5
i'- ......
Z
:;
:;-
, L J H JRRELLA
w
~ 2.7
1.4
i1.2
,,
~
~
=>
5i
'"
0.2
50
ro
~
~
~
o
o
1~~
~
0.25
TEMPERATURE (OC)
TJ=l%
~
0
!:J
o
/"\~
I-TJ=~
~ -1
,
/./
'-'
~ -2
~ -3
-4
-5
I
V
/v
~ 1.244
~
~
~
'-'
z
~
/
1.242
~
1i'
10
20
30
40
INPUT VOLTAGE (V)
50
tDLLJ
/
30
60
800
42
41
700
40
:[ 600
!Z
38~~400
""" ~
nS
-<""
37"'1:5 300
-
V
v
~
V
5-52
11
10
,.---
~
180
Tj=25°C
--r
1
50 %
9
OUT~ CY~
10% DUTY CYCLE
or
2
140
o
10
120
~
>-- 100
i'E
=>
5
0 25 50 75 100 125 150
TEMPERATURE (OC)
Supply Current vs Supply Voltage
(Shutdown Mode)
r---
'"
i--'"
"AVERAGE LT1072 POWER SUPPLY CURRENT IS
FOUND BY MULTIPLYING DRIVER CURRENT BY
DUTY CYCLE, THEN ADDING QUIESCENT
CURRENT.
~
R:
./
0.2 0.4 0:6 0.8 1 1.2 1.4 1.6 1.8
SWITCH CURRENT (A)
-75 -50 -25
I
NOTE THAT THIS CURRENT DOES NOT
INCLUDE DRIVER CURRENT, WHICH IS
A FUNCTION OF LOAD CURRENT AND
DUTY CYCLE.
90% DUTY CYCLE
'-'
....
@ 200
o
!5
r-
E~
100
12
i ' ..........
o=>
M
-75 -50 -25 0 25 50 75 100 125 150
TEMPERATURE (OC)
13
!
0 25 50 75 100 125 150
TEMPERATURE (OC)
Feedback Bias Current vs
Temperature
35
Tj=25°C
1kO
1
I I I I
15
-75 -50 -25
2
Supply Current vs Input Voltage·
V
c
R
39~~500
j) ~
15
o
17
36
14
50
o
1
0
1~
40
10
18
1.236
80
20
19
'"
~ 1.238
70
=>
'-'
>
'-'
~
1.240
80
~
a:
\-55°C
l FEEDBACK
I I J
--
I
1
'"
~
16
./ V
>j
/
o
I I
~C
SW!TCHI~G FJEQuJNCY
~ 1.246
",oe
'"«z
w
21
20
0.5 0.75 1 1.25 1.5 1.75
SWITCH CURRENT (A)
1.248
3
w
1
w
~ /'"
1.250
i'5
~
JFEEDLCK i 500~
Reference Voltage and Switching
Frequency vs Temperature
Line Regulation
[
,
I I I I
22
k
/. ~
./~ '?
~~
0.6
2.3
~
100°C
1.0
~ 0.4
~
0
150 0
z
o
~ 0.8
2.4
-ro-50-~
23
1.6
r--. .......
2.8
Isolated Mode Flyback Reference
Voltage
Switch Saturation Voltage
1
DUTYI CYCLE
20
30
40
50
60
INPUT VOLTAGE (V)
"UNDER VERY LOW OUTPUT CURRENT
CONDITIONS, DUTY CYCLE FOR MOST
CIRCUITS WILL APPROACH 10% OR LESS.
~
'-'
Vc=5DmV
80
'::;
~ 60 I'
./
~
40
20
o
Vc=OV
,.
o
10
20
30
40
SUPPLY VOLTAGE (V)
50
60
LT1072
TYPICAL PERFORmAnCE CHARACTERISTICS
NormallFlyback Mode Threshold
on Feedback Pin
Shutdown Mode Supply Current
500
-24
490
-22
:;;480
-20
~470
'"~ 460
o
~ 450
0::
"" 440
~
~ 430
ttl
~
.........
410
4500
140
~ =>
~
14
-
....... ~BACK PIN CURRENT- -8
(AT THRESHOLD)
25 50
75 100
TEMPERATURE (OC)
~ '"
-6
w
-4
o
§!
VOLTA~
-n
100
Vc
50
w
V
f..- I--""
.....
VO~TAG~ IS REOUCED UNTIL
RE1ULA~OR C~RRE~T O~OPS ~ELOf 300rA
o
~5OC"'TI"'125OC I--
~
30 40 50 60 70
Vc PIN VOLTAGE (mV)
80 90 100
-200~ ~
6
~a
-150~ ~
VSUPPLY
60V
400
VSUPPLY
3V
~
4
~
3
5400
"
t::
~ 300
V
100
o
-75-50 -25
0 25 50 75 100 125150
TEMPERATURE (OC)
I I I
!
7000
I
VFB = 1.5V (CURRENT INTO Vc PIN)
/
100
..-
/
I
0::
-400
10
20 30 40 50 60 70 80 90 100
SWITCH VOLTAGE (V)
o
0.5
30
~
~
,., 4000
g 3000
"
~ 2000
i i
10
1.5
2.0
Vc PIN VOLTAGE (V)
60
G~
§i!
VFB = 0.8V (CURRENT OUT OF Vc PIN)_
"I
1 ·1 I i i
I I I I I
,,~
:g 5000
I I I
\1
I I I
I I I
ILL
~-200
1
-30
I
6000
TJ = 25°C
~ -100
0 0.1 0.20.30.40.5060.7 0.8 09
FEEDBACK CURRENT (rnA)
Transconductance of Error
Amplifier
Vc Pin Characteristics
-300
o
-
if
200
100
r-
J.
150°C
50
200
r1
III
-55°C
I- ~~
200
fa 150
300
VSUPPLY = 40V
VSUPPLY = 15V
;;.;.
VSUPPLY = 3V""
-
l"- t-
~
-50
VSUPPLY = 55V- I-
l'..
;5
-100- '"
0 25 50 75 100 125 150
TEMPERATURE (OC)
700
0 25 50 75 100 125 150
TEMPERATURE (OC)
;;:t- t"---
g 250
5
~ ~
350
~ 300
800
o
-75 -50 -25
Feedback Pin Clamp Voltage
Vc = 0.6V
-250~ ~
900
<.>
~ 1500
~
..- 1000
Iii
450
1000
~ 600
~
500
'-'
10
Switch "Off" Characteristics
g;
""
-350
8
7
r- r- ~
~ 2000
500
_
;;- ~
AV (FB PIN)
...
~ 2500
V
I
_ M (VcPIN)
Gm -
~ 3000
0
-75 -50 -25
!
~3500
11
j......-
u
2
V
L
4000
-400
-300
'"
~ 150
>
PIJ)
V .....
200
l- fo 10 20
X
I-'
I-'
Idle Supply Current vs
Temperature
.... ?--:J.-I-""
300
~
;;:; 250
!l!
~
J
I
II
40
125 150
400
CUlRENLou+ OF
V- I-'
60
Shutdown Thresholds
350 f--
vI-""
80
~~
-10"""'=>
,/
TJ=150°C
100
C">
§i'-'
-12:D ~
-+-l
400
-50 -25
180
-16 ~!z 120
I-- r-
f-
420
5000
160
-n
-1B~,. -~
FEEDBACK PIN VOLTAGE
(AT THRESHOLD)
Error Amplifier Transconductance
200
..-~ 1000
I\.
,.
~
90 ~
120 -2
150
180
2.5
-1000
lk
10k
lOOk
1M
210
10M
FREQUENCY (Hz)
5-53
LT1072
BLOCK DIAGRAm
16V
SWITCH
OUT
FB
SHUTDOWN
CIRCUIT
0.1611
0.1611
El'
E2
0.15V
L-------.......,GND
.,..
'ALWAYS CONNECT El TO GROUND PIN ON MINI DIP PACKAGE .
EMITTERS TIED TO GROUND ON TO-3 AND TO-220 PACKAGES.
LT1072 OPERATion
The LT1072 is a current mode switcher. This means that
switch duty cycle is directly controlled by switch current
rather than by output voltage. Referring to the block diagram, the switch is turned "on" at the start of each oscillator cycle. It is turned "off" when switch current reaches a
predetermined level. Control of output voltage is obtained
by using the output of avoltage sensing error amplifier to
set current trip level. This technique has several advantages. First, it has immediate response to input voltage
variations, unlike ordinary switchers which have notoriously poor line transient response. Second, it reduces the
90° phase shift at midfrequencies in the energy storage inductor. This greatly simplifies closed loop frequency compensation under widely varying input voltage or output
load conditions. Finally, it allows simple pulse-by-pulse
current limiting to provide maximum switch protection
under output overload or short conditions. A low-dropout
internal regulator provides a2.3V supply for all internal cir-
5-54
cuitry on the LT1072. This low-dropout design allows input
voltage to vary from 3V to 60V with virtually no change in
device performance. A 40kHz oscillator is the basic clock
for all internal timing. It turns "on" the output switch via
the logic and driver circuitry. Special adaptive antisat circuitry detects onset of saturation in the power switch and
adjusts driver current instantaneously to limit switch
saturation. This minimizes driver dissipation and provides
very rapid turn-off of the switch.
A1.2V bandgap reference biases the positive input of the error amplifier. The negative input is brought out for output
voltage sensing. This feedback pin has a second function;
when pulled low with an external reSistor, it programs the
LT1072 to disconnect the main error amplifier output and connects the output of the flyback amplifier to the comparator input. The LT1072 will then regulate the value of the flyback
pulse with respect to the supply voltage. This flyback pulse is
LT1072
LT1072 OPERATion
directly proportional to output voltage in the traditional transformer coupled flyback topology regulator. By regulating the
amplitude of the flyback pulse, the output voltage can be
regulated with no direct connection between input and output. The output is fully floating up to the breakdown voltage
of the transformer windings. Multiple floating outputs are
easily obtained with additional windings. Aspecial delay network inside the LT1072 ignores the leakage inductance spike
at the leading edge of the flyback pulse to improve output
regulation.
These packages are rated at 50 0 CIW and 35°C/W respectively. The mini DIPs, however, are rated at 1000 CIW in ceramic (J) and 130 0 IW in plastic (N).
The error signal developed at the comparator input is brought
out externally. This pin Nd has four different functions. It is
used for frequency compensation, current limit adjustment,
soft starting, and total regulator shutdown. During normal
regulator operation this pin sits at a voltage between 0.9V
(low output current) and 2.0V (high output current). The error
amplifiers are current output (gm) types, so this voltage can
be externally clamped for adjusting current limit. Likewise, a
capacitor coupled external clamp will provide soft start.
Switch duty cycle goes to zero if the Vc pin is pulled to ground
through a diode, placing the LT1072 in an idle mode. Pulling
the Vc pin below 0.15V causes total regulator shutdown, with
only 50~ supply current for shutdown circuitry biasing. See
AN·19 for full application details.
Average supply current (including driver current) is:
Extra Pins on the MiniDIP Package
The miniDIP LT1072 has the emitters of the power transistor brought out separately from the ground pin. This eliminates errors due to ground pin voltage drops and allows
the user to reduce switch current limit 2:1 by leaving the
second emitter (E2) disconnected. The first emitter (E1)
should always be connected to the ground pin. Note that
switch "on" resistance doubles when E2 is left open, so
efficiency will suffer somewhat when switch currents exceed 100mA. Also, note that chip dissipation will actually
increase with E2 open during normal load operation, even
though dissipation in current limit mode will decrease.
See "Thermal Considerations."
Thermal Considerations When Using the MiniDIP Package
The low supply current and high switch efficiency of the
LT1072 allow it to be used without a heat sink in most applications when the TO-220 or TO-3 package is selected.
Care should be taken for miniDIP applications to ensure
that the worst case input voltage and load current conditions do not cause excessive die temperatures. The following formulas can be used as a rough guide to calculate
LT1072 power dissipation. For more details, the reader
is referred to Application Note 19 (AN-19), "Efficiency
Calculations" section.
liN ",,6mA + Isw(0.004 + DC/40)
Isw =switch current
DC =switch duty cycle
Switch power dissipation is given by:
Psw =(lsw)2 • Rsw • DC
Rsw =LT1072 switch "on" resistance (Hl maximum)
Total power dissipation is the sum of supply current times
input voltage plus switch power:
PrOT =(lIN)(VIN) + Psw
In a typical example, using a boost convertor to generate
+12V@0.12A from a +5V input, duty cycle is approximately 60%, and switch current is about 0.65A, yielding:
=
=
Psw =(0.65)2 • Hl • (0.6) =0.25W
liN 6mA +0.65(0.004 + DC/40) 18mA
PTOT =(5V)(0.018A) +0.25 =0.34W
Temperature rise in a plastic miniDIP would be 1300 CIW
times 0.34W, or approximately 44°C. The maximum ambient temperature would be limited to 100°C (commercial
temperature limit) minus 44°C, or 56°C.
In most applications, full load current is used to calculate
die temperature. However, if overload conditions must
also be accounted for, four approaches are possible. First,
if loss of regulated output is acceptable under overload
conditions, the internal thermal limit of the LT1072 will
protect the die in most applications by shutting off switch
5-55
•
LT1072
LT1072 OPERATion
current. Thermal limit is not a tested parameter, however,
and should be considered only for non-critical applica·
tions with temporary overloads. A second approach is to
use the larger TO·220 (l) or TO-3 (K) package which, even
without a heat sink, may limit die temperatures to safe lev·
els under overload conditions. In critical situations, heat
sinking of these packages is required; especially if over·
load conditions must be tolerated for extended periods of
time.
The third approach for lower current applications is to
leave the second switch emitter (miniDIP only) open. This
increases switch "on" resistance by 2:1, but reduces
switch current limit by 2:1 also, resulting in a net 2:1 reduc·
tion in 12R switch dissipation under current limit
conditions.
The fourth approach is to clamp the Ve pin to a voltage
less than its internal clamp level of 2V. The LT1070 switch
current limit is zero at approximately 1V on the Ve pin and
2A at 2V on the Ve pin. Peak switch current can be ex·
ternally clamped between these two levels with a diode.
See AN·19 for details.
shown in the accompanying figures. Synchronizing occurs
when the Ve pin is pulled to ground with an external tran·
sistor. To avoid disturbing the DC characteristics of the in·
ternal error amplifier, the width of the synchronizing pulse
should be under 1pS. C2 sets the pulse width at ... O.35pS.
The effect of a synchronizing pulse on the LT1072 ampli·
fier offset can be calculated from:
aVos=
(~) (ts)(fs) (Ie+~)
Ie
KT =26mV@250C
q
ts = pulse width
fs = pulse frequency
Ie = LT1072 Ve source current (=200~)
Ve = LT1072 operating Ve voltage (1V-2V)
R3 = resistor used to set mid·frequency "zero" in LT1072
frequency compensation network.
The LT1072 can be externally synchronized in the fre·
quency range of 48kHz to 70kHz. This is accomplished as
With ts = 0.35"s, fs = 50kHz, Ve = 1.5V, and R3 = 2KD, off·
set voltage shift is. =2.2mV. This is not particularly bother·
some, but note that high offsets could result if R3 were
reduced to a much lower value. Also, the synchronizing
transistor must sink higher currents with low values of R3,
so larger drives may have to be used. The transistor must
be capable of pulling the Ve pin to within 200mVof ground
to ensure synchronizing.
Synchronizing with Bipolar Transistor
Synchronizing with MOS Transistor
LT1072 Synchronizing
rI R3
I
I Cl
L_
5-56
C2
68pF
R2
2.2k
Rl
r-!--nr
FROM 5V
LOGIC
C2
200pF
...........,14--..---1
r
02
lN4158
rlf"
FROM
5V LOGIC
LT1072
TYPICAL APPLICATions
Totally Isolated Converter
OPTIONAL
OUTPUT FILTER
Ll
01
15V 10,.H
.-tM-.....---.+~-:t::
~_+__i+C!!! ___
L2
......+ __....""_~
III
VIN _
1
200:
7
C6
200
:
C5
5V- 25,.1"
N=0.875-7:8
FOR VOUT= 15V
'REQUIRED IF INPUT LEADS ,. 2"
V
'~
~SWITCHVOLTAGE
tOFF~L--
III
Vour +VdV,=DlODE FOR\\P\RD VOLTAGE)
OV
---'~ SECONDARY VOLTAGE
N· VIN
Flyback Converter
CLAMP TURN-ON
SPIKE
. ~ ~-,,-~,~-.~:.'
VSNUB
IN
OV
I
---l
~
OV--1
Rl
C4
25pF'
,:~:
~
Vour + V,
VOUT
..-"'+-_~~_5V
I.SA
3,74k
~~~
rIl
NOV IN
~11
O~
_
DC
SECONDARY VOLTAGE
AREA "e" = AREA "d" TO MAINTAIN
ZERO DC VOLTS ACROSS SECONDARY
PRIMARY CURRENT
0 = - n . . D l ' W SECONDARY CURRENT
R2
1.24k
LnJ'r
o
.t-
~
O~
'REQUIRED IF INPUTLEADS "2'
"OPTIONAL TO REPLACE R4 & C3
LT1072 SWITCH VOLTAGE
AREA "a" = AREA "b" TO MAINTAIN
ZERO
VOLTS ACROSS PRIMARY
LTt070 SWITCH CURRENT
SNUBBER DIODE CURRENT
-11-1= (JPRI)(Lll
TsNUB
5-57
LT1072
TYPICAL APPLICATions
External Current Limit
Negative to Positive Buck·Boost Converter
Ve
-=-VIN
fB
FS....- - - - - - - I
ilNO
R2
1.14k
_{~
__
C1
-+~~
0.22
____-6____
~~
·REOUIRED If INPUT LEADS ;,,2"
··PULSE ENGINEERING 52626
__-J
Positive to Negative Buck·Boost Converter
oot
·REOUIRED If INPUT LEADS;,,2"
"PULSE ENGINEERING 92113
1N4001
rl*".....--------.....--¥JIr-....----""'1~~g:.30V
t
mon
01
1N914
R1
107k
External Current Limit
R4
470
TO AVOID START-UP PROBLEMS
FOR INPUT VOLTAGES BELOW 10V,
CONNECT ANODE Of 00 TO VIN,
AND REMOVE RS. C1 MAY BE
REDUCED fOR LOWER OUTPUT
CURRENTS. C1 ~(500"f)(IOUT).
fOR 5V OUTPUTS, REDUCE R3
TO 1.Sk, INCREASE C2 TO 0.3,.1',
AND REDUCE R6 TO 1000.
v,
man
R1
~1V
/1/
~
R1
5000
Voltage Boosted Boost Converter
""
Driving High Voltage FET
(for Offline Applications, See AN·25)
R4
1.Sk
1/2W
1
J-4>------e(L
1
} TOTAL INDUCTANCE=BmH
~E~~~~~ ~~~Mt: ~~KAGE
N~S
INDUCTANCE.
10-20V-=-
L~~-.;_!)..~t1r"'ll\o1'v-1-
VOUT
100V@7SmA
+ C1
200l'F
5-58
GND
lT1072
Vc
!
LT1072
TYPICAL APPLICATions
Negative Buck Converter
'::'
C2
5OD,.F
01
VIII
Vsw
U··
220.H
~flm
fII
Cl
R2
l.24k
·REQUIRED IF INPUT LEADS "2'
··PULSE ENGINEERING 52626
Positive Buck Converter
Y,N
111
C3
2.2-"
Ysw
III
111612
Rl
3.74k
C5·
25,.F
02
R4
100
5V.1A
~ l00mA
MINIMUM
'::'
'REQUIRED IF INPUT LEADS ,,2'
'·PULSE ENGINEERING 52626
Negative Boost Regulator
'::'
VfIN
,Vm
l1'1lln
Rl
27k
Ro
(MINIMUM
LOAD)
R2
l.24k
01
Y,N
-l5V
Vour
-28V@(I.26A
·REQUIRED IF INPUT LEAOS "2"
..L7UWB
5-59
LT1072
PACKAGE DESCRIPTion Dimensions in inches (millimeters) unless otherwise noted.
JPackage
8Lead Hermetic DIP
NPackage
8Lead Molded DIP
r:0:l
(l~~O)
0400
765
-:10.010
1
0.200
(5.080)
(0.360-0660)
~
TI75
MIN
0100:1:0.010
(2540::l::0.254)
0038-0.068
(0965-1727)
3
I
0.325
~~.~;~
I
fa~. 255 +0
635)
-0.381
Based on continuous operation.
'ljMAX =125'C for intermittent
fault conditions.
Based on continuous operation,
TO·220 Type Plastic TPackage
TO·3 Type Metal Can (Steel) KPackage
0320-0350
(8128-8890)
l ~r
(9.906-10.41)
~
(14.48-1549)
0.147-0.151
(3.734~
0100-0.120
0.170_0~'0
(4.318-4572)
(2.540-3048)
1
D,J~,
0420-0480
(10.67-12.19)
0.355-0370
(9.017 -9.398)
0152-0162
(3860-4.114)
RTYP
0.167-0.177
(4241-4.495)
RTYP
Ll1072MK, LT1072HVMK
llMAX
150'C
LT1072CK, Ll1072HVCK
100'C'
Based on continuous operation.
'lIMAX =125'C for intermittent fault conditions.
5-60
I
I
I
ajC
8'C/W
alA
35'C/W
8'C/W
35'C/W
0062-0.072
(---
1574-1829)
J !:::l
J
0.460-0.500
(11.68-1270)
0970-1
(2464-
1---,0(0.762
030 =0 040
1018)
1F1...=,
0.045-0.055
~
+
I
I
I
4
0300-0320
(7620-8128) ..
MAX
'::::'~~JL'T',,"
2
(6.350:1:::0254)
~
0 013-0025
(0.330-0635)
LTt072Cl, LT1072HVCT
Based on continuous operation.
'ljMAX =t25'C for Intermittent fault conditions.
rata r
I
_._
0710
(1575)
(18.03)
~""""-LineN.2
~~
LT1l70/LT1l71
TECHNOLOGY~---5-A-a-n-d-2-.5-A--Hi-g-h-Eff-ic-i-en-C-Y
100kHz Switching Regulators
FEATURES
DESCRIPTiOn
•
•
•
•
•
•
•
•
•
•
The LT1170 and LT1171 are monolithic high power switch·
ing regulators. They can be operated in all standard
switching configurations including buck, boost, flyback,
forward, inverting and "Cuk". A high current, high effi·
ciency switch is included on the die along with all oscilla·
tor, control, and protection circuitry. Integration of all
functions allows the LT1170/LT1171 to be built in a stand·
ard S·pin TO·3 or TO·220 power package. This makes them
extremely easy to use and provides "bust proof" operation
similar to that obtained with 3·pin linear regulators.
Wide Input Voltage Range 3V-40V
Low Quiescent Current-6mA
Internal SA Switch (2.SA for LT1171)
Very Few External Parts Required
Self·Protected Against Overloads
Operates in Nearly All Switching Topologies
Shutdown Mode Draws Only 5O,u\ Supply Current
Flyback·Regulated Mode has Fully Floating Outputs
Comes in Standard S·Pin Packages
Can be Externally Synchronized
The LT1170/LT1171 operates with supply voltages from 3V
to 4OV, and draws only 6mA quiescent current. It can de·
liver load power up to 100 watts with no external power de·
vices. By utilizing current·mode switching techniques, it
provides excellent AC and DC load and line regulation.
APPLICATions
•
•
•
•
•
•
•
Logic Supply SV @ 10A
SV Logic to ± 1SV Op Amp Supply
Offline Converter up to 200W
Battery Upconverter
Powerlnverter(+ to -)or(- to +)
Fully Floating Multiple Outputs
For Lower Current Applications see LT1172
USER NOTE:
This data sheet Is only Intendad to provlda speclfk:atlons, graphs, and ageneral functional description of
the LTt t10ILTt 171. Application clrculls are Includad to show the capability of the LTt 1101LTt171. Acomplete design manual (AN· t9) should be obtalnad to assist In developing new designs. This manual con·
talns acomprehenslve discussion of both the LTt070 and theex1emal components usad with It, as well as
complete formulas for calculating the .alues of theae components. The manual can also be usad for the
LTt t70 and LTt 171 by factoring In the higher frequency. Asecond application note, AN·25, which datalls
off~lne applications Is available.
The LT1170/LT1171 has many unique features not found . .
even on the vastly more difficult to use low power control . . .
chips presently available. It uses adaptive anti·sat switch
drive to allow very wide ranging load currents with no loss
in efficiency. An externally activated shutdown mode reo
duces total supply current to 5O,u\ typical for standby
operation.
TYPICAL APPLICATiOn
Maximum Output Power'
Boost Converter (5V to 12V)
100
/
~
Rl
LTtl70
C3
100,,1"
+
10.7k
1%
/
60
/
R2
1.24k
1%
'REOUIRED IF INPUT LEADS .. 2·
-PULSE ENGINEERING 92114
BOOST/./
/,/
40
Vo=30V,---
V
ID
//.-
20
a
BUCK'BO~ST -
J
ffi
~
I
1/
80
m
I
FLYBACK'-----
.........
BUCK'mx;~
Vo,~5V
r
a
-
~
~
-
~
~
INPUT VOLTAGE (V)
'ROUGH GUIDE ONLY. BUCK MODE
IibUT=5AxVOUT. SPECIAL TOPOLOGIES
DELIVER MORE POWER.
ftDlVIDE VERTICAL POWER SCALE
BY lWD FOR LT1171
5-61
LTl170/LTl171
ABSOLUTE mAXimum RATinGS
Supply Voltage
LT1170171 (See Note 1) ........................... 40V
Switch Output Voltage
LT1170171 ....................................... 65V
Feedback Pin Voltage (Transient, 1ms) ............. ± 15V
Operating Junction Temperature Range
LT1170171 M........................ - 55°C to +150°C
LT1170171C (Oper.) ..................... OOC to +100°C
LT1170171C(Sh.Ckt.) .................. OOCto +125°C
Storage Temperature Range .......... - 65°C to +150°C
Lead Temperature (Soldering, 10 sec) .............. 300°C
PACKAGE/ORDER InFORmATion
ORDER PART
NUMBER
BOTTOM VIEW
V~VC
o 4 3 0
1
2
V,N
LT1170/LT1171 MK
LT1170/LT1171 CK
CASE IS GND
fB
K PACKAGE
HEAD TO-3 METAL CAN
LT1170/LT1171CT
fRONT VIEW
lol
T PACKAGE
5-LEAD TD-220
Note 1: Minimum effective switch "on" time lor the LT1170171 (in current
limit only) is ,,0.6,.s. This limits the maximum sale input voltage during an
output shorted condition. Buck mode and inverting mode input voltage is
limited to:
Maximum input voltage can be increased by increasing Ror Vf.
Transformer designs will tolerate much higher input voltages because
leakage inductance limits rate of rise of current in the switch. These
designs must be evaluated individually to assure that current limit is well
controlled up to maximum input voltage.
Boost mode designs are never protected against output shorts because the
external catch diode and inductor connect input to output.
Rell +VI
Y,N (max, output shorted) = 15V + - buck and inverting mode
te f
R= Inductor DC Resistance
Il = lOA lor lT1170 and 5A for LT1171
VI = Output Catch Diode Forward Voltage at Il
t=0.6~s, 1= 100kHz Switching Frequency
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VIN =15V, Vc =O.5V, VFB =VREF, output pin open.
SYMBOL
VREF
PARAMETER
Relerence Voltage
IB
Feedback Input Current
gm
Error Amplilier
Transconductance
Error Amplilier Source or
Sink Current
Error Amplilier Clamp
Voltage
Reference Voltage Line
Regulation
Error Amplifier Voltage
Gain
Minimum Input Voltage
Supply Current
Control Pin Threshold
Av
10
5-62
CONDITIONS
Measured at Feedback Pin
Ve=0.8V
VFB = VREF
dle=
±25~A
Ve=1.5V
Hi Clamp, VFB = tV
Lo Clamp, VFB = 1.5V
3V ",V ,N ",VMAX
Ve=0.8V
0.9V",Ve",1.4V
3V",V,N",VMAX, Ve=0.6V
Duty Cycle = 0
•
•
•
•
•
MIN
1.224
1.214
3000
2400
150
120
4400
200
MAX
1.264
1.274
750
1100
6000
7000
350
400
2.3
0.52
0.03
UNITS
V
nA
~mho
~
~
1.8
0.25
0.38
500
800
2000
V/V
2.6
6
0.9
3.0
9
1.08
1.25
V
mA
V
•
•
TYP
1.244
1.244
350
0.8
0.6
V
V
'Io/V
LTl170/LTl171
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VIN = 15V, Vc =O.5V, VFB =VREF, output pin open.
ILiM
PARAMETER
Output Switch Breakdown
Voltage
Output Switch (Note 1)
"On" Resistance
Control Voltage to Switch
Current Transconductance
Switch Current Limit (LTl170)
ILiM
Switch Current Limit (LTl171)
AIIN
Alsw
Supply Current Increase
During Switch On·Time
f
Switching Frequency
SYMBOL
BV
VSAT
CONDITIONS
3VSVIN SV MAX
LT1170, LTl171
Isw=5mA
LT1170
LT1171
LTl170
LTl171
Duty Cycle = 50%
TJ~25°C
Duty Cycle = 50%
TJ<25°C
Duty Cycle = 80% (Note 2)
Duty Cycle = 50%
TJ~25°C
Duty Cycle = 50%
TJ<25°C
Duty Cycle = 80% (Note 2)
DC (max)
Maximum Switch Duty Cycle
Shutdown Mode
3VSV IN SVMAX
Supply Current
Vc=O.OSV
Shutdown Mode
3VSV IN SVMAX
Threshold Voltage
..
The • denotes the speclflcalions which apply over the full operatmg
temperature range.
Notet Measured with Vc in hi clamp, VFB=0.SV.lsw=4A for LTl170and
2A for LT1171.
•
•
•
MIN
65
••
•
•
••
5
5
4
2.5
2.5
2
•
68
85
80
100
TYP
90
MAX
0.15
0.3
8
4
0.24
0.5
UNITS
V
II
II
10
11
10
5
5.5
5
AN
AN
A
A
A
A
A
A
25
35
mAlA
100
112
115
90
100
95
250
kHz
kHz
%
pA
150
250
mV
mV
300
• 50
..
Note 2: For duty cycles (DC) between 50% and 80%, minimum guaranteed
switch current is given by ILiM = 3.33 (2 - DC) for the LT1170 and ILiM = 1.67
(2-DC) for the LT1171.
TYPICAL PERFORmAnCE CHARACTERISTICS
Switch CUlTent Limit vs Duty Cycle·
16
12
-55°C
125°C
/25°C
-
......; ~ ~ t--..
f:::::::~
o
o
10
20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
"DIVIOf VERTICAL SCALE BY
TWO FOR LTl171
5-63
LTl170/LTl171
TYPICAL PERFORmAnCE CHARACTERISTICS
Minimum Input Voltage
Switch Saturation Voltage
2.9
~
r-....
2.8
w
~ 2.7
1.4
~
........ ~TCH CURRENT = I MAX
~ r--....
!j
§;
~ 2.6
"- "-
.......
r;;p;.. ..........
;!:
SWITCH CURRENT =
::;;
~
2.5
.......
Z
:i
Line Regulation
1.6
1.2
~ 0.8
~
06
:z:
~
0.4
3:
2.4
2.3
-75'-50-25
~~
0.2
OJ
o
0 25 50 75 100 125150
TEMPERATURE (OC)
13
",oC
w
1
r-Tj=-55°
~ -1
'" -2
iIi
~V
~ -3
-5
3
4
5
6
SWITCH CURRENT (A)'
'DlVIDE CURRENT BY 2 FOR LT1171
BOO
160
.700
140
~ 1.246
1600
~ 1.244
:z
~ 500
=>
'"t:!
:z
....... b..,
"'""-
1.240
~ 1.238
"" 300
200
140
14
120
V
;:: 100
<=>
v
j
V 1/
:z
w
'"
'"~
80
y V
Tj=-55°
60
40
20
o i.--"
o
~
./' ~
V /"
.....TI" 25°C
~
10
1
40
~
=>
OJ
r----r
20
30
40
SUPPLY VOLTAGE (V)
50
60
Tj=150°C
120
'">
~
OJ
60
v ....
,.......
80
..,/
I
40
or' DUTYI CYCLE
30
~
INPUT VOLTAGE (V)
. / f"""
~ 100
1
W
160
ffi
10% DUTY CYCLE
W
10
~ 140
501% DUrJ CYCLE
2::
o
Vc OV
180
r--
'"~
5
'AVERAGE LT1170 POWER SUPPLY CURRENT IS
FOUND BY MULTIPLYING DRIVER CURRENT BY
DUTY CYCLE, THEN ADDING QUIESCENT
CURRENT.
5-64
11
I"
Shutdown Mode Supply Current
NOTE THAT THIS CURRENT ODES NOT
INCLUDE DRIVER CURRENT, WHICH IS
A FUNCTION OF LOAD CURRENT AND
DUTY CYCLE.
90% DUTY CYCLE
12
ffi
./
~
200
Tj=25°C
13
!
Vc- 5OmV
o I .....
o
0 25 50 75 100 125 150
TEMPERATURE (0C)
,/'
2
3
SWITCH CURRENT (A)
60
=>
OJ
Supply Current vs Input Voltage·
15
E
'"~
-
.....
20
-75 -50 -25
160
60
z
t:!
is BO
o
Driver Current· vs Switch Current
'"
'"=>
.......
"
0 25 50 75 100 125 150
TEMPERATURE (0C)
50
~
f- 100
100
1.234
-75 -50 -25
:<
I"'- r--...
OJ
1.236
20
30
40
INPUT VOLTAGE (V)
120
~ 400
~
fa
::::
10
Tj=25°C
f-
/V'
o
Supply Current vs Supply Voltage
(Shutdown Mode)
1.250
1,242
,/
-4
2
~..-
,/ , / ,r ./
ffi
1.248
~
~~
Feedback Bias Current vs
Temperature
Reference Voltage vs Temperature
!j
V'\~
'"
~
'f"
o
Tj=1%
'"
~
/"~ ~""C
,,- -55°C
~~
is
r--..
~f
100°C
§; 1.0
"-
~
w
150jV
tll
~
50
'UNDER VERY LOW OUTPUT CURRENT
CONDITIONS, DUTY CYCLE FOR MOST
CIRCUITS WILL APPROACH 10% OR LESS.
60
20
o
..,/
/'
X
f"""
V
,/
~5OCST'S125°C r-I
I
I
I
,.... ro
10
20
30 40 50 60 70
Vc PIN VOLTAGE (mV)
80
90 100
LTl170/LTl171
TYPKAlPER~RmAnCECHARACTERBTKS
Error Amplifier Transconductance
5000
400
_ At (VC PIN)
4500
Gm -
:g 4000
....
~3500
ilV (FB PIN)
350
t- r- .....
300
w
t--
~
~ 200
'$
Q
2000
~ 1500
0 25 50 75 100 125 150
TEMPERATURE (OC)
-75 -50 -25
Feedback Pin Clamp Voltage
1000
450
900
400
1
1\t- "r-...
~ 300
;:;
g 250
t-
r-
8
z
7
<>
-200 §5
!l;]
i
....
i
=>
<.>
i
1"-
-
g;
<.>
is
t::
'¥:
VO~TAG~
-50
=>
~
1
0
0 25 50 75 11)0 125 150
TEMPERATURE (OC)
VSUPI'LY = 55V
VSUPPLY = 40V
600
VSUPI'LY = 15V
...... ~
500
VSUPI'LY = 3V,...-:
400
100
200
50
100
o
o
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.6 0.9
FEEOBACK CURRENT (mA)
1
3V
It
-75 -50 -25
0 25 50 75 100 125 150
TEMPERATURE (OC)
VCPin Characteristics
200
~ 300
~ 150
60V
VSUPPLY
Ul
WO
,
VSUPPLY
-150 --< ':;
-100-
1 700
~ +-15O"C
o
VOLTA.$.-- ~
.,...
Vc = 0.6V
;:;- <'
§.
-2503!
800
5JoC
I""-- l"-
'" 200
~
11
10
Switch "Off" Characteristics
500
350
-400
-350
-300
Vc
IS REDUCED UNTIL
RE~ULAjOR C~RRE~T D~OPS rELO~ 300rA
o
-75 -50 -25
PIJrl-
--n
50
500
t
-j..:.-
V ......
-
~150
>"
100
.... 1000
culREN+ (OU+ OF
,
!250
l;13000
g..: 2500
is
<.>
Idle Supply Current vs
Temperature
Shutdown Thresholds
r-
V
1
I
I I I
VFB - 1.5V (CURRENT INTO Vc PIN)
I
/
100
I
V
!z
~
~ -100
Ij ='25°C
~ ~
~ 1
1
1
111
c::
,;' -200
VFB = 0.6V (CURRENT OUT OF Vc PIN)_
I
-300
o
10
W W
~
50 60
m
SWITCH VOLTAGE (V)
-400
60 00 100
I
I
o
0.5
Ilii~ii
1 1 1 ~ ~
IllJ~~
1.0
1.5
2.0
Vc PIN VOLTAGE (V)
2.5
Transconductance of Error
Amplifier
7000
~
g5000
~
~
-30
I
6000
4000
G~
~ 3000
25
8~ 2000
....~ 1000
t-
30
t--
60
"\
60
~
~
-
120 -.2
\
150
160
-1000
1k
10k
100k
1M
FREQUENCY (Hz)
210
10M
5-65
•
LT1l70/LT1l71
8LOCK DIAGRAm·
16V.
SWITCH
OUT
5A, 75V
SWITCH
FB
0.020
(O.041l LT1071)
·ALTHOUGH STILL CONNECTEO ON THE LT1170 AND LT1171, THE ISOLATED
FLYBACK CIRCUITRY IS NOT SPECIFIED FOR 100kHz OPERATION.
':'
LT1170/LT1171 OPERATion
The LT1170/LT1171 is a current mode switcher. This means
that switch duty cycle is directly controlled by switch current
rather than by output voltage. Referring to the block diagram,
the switch is turned "on" at the start of each oscillator cycle.
It is turned "off" when switch current reaches a predetermined level. Control of output voltage is obtained by using
the output of avoltage sensing error amplifier to set current
trip level. This technique has'several advantages. First, it has
immediate response to input voltage variations, unlike ordinary switchers which have notoriously poor line transient
response. Second, it reduces the 90° phase shift at midfrequencies in the energy storage inductor. This greatly simplifies closed loop frequency compensation under widely
varying input voltage or output load conditions. Finally, it
allows simple pulse-by-pulse current limiting to provide maximum switch protection under output overload or short condi-
5-66
tions. Alow-dropout internal regulator provides a2.3V supply
for all internal circuitry on the LT1170/LT1171. This lowdropout deSign allows input voltage to vary from 3V to 60V
with virtually no change in device performance. A100kHz oscillator is the basic clock for all internal timing. It turns "on"
the output switch via the logic and driver circuitry. Special
adaptive anti-sat circuitry detects onset of saturation in the
power switch and adjusts driver current instantaneously to
limit switch saturation. This minimizes driver dissipation and
provides very rapid turn-off of the switch.
A1.2V bandgap reference biases the positive input of the error amplifier. The negative input is brought out for output
voltage sensing. This feedback pin has a second function;
when pulled low with an external resistor, it programs the
LT1170/LT1171 to disconnect the main error amplifier output
LTl170/LTl171
LT1170/LT1171 OPERATion
and connects the output of the flyback amplifier to the com·
parator input. The LT1170/LT1171 will then regulate the value
of the flyback pulse with respect to the supply voltage". This
flyback pulse is directly proportional to output voltage in the
traditional transformer coupled flyback topology regulator.
By regulating the amplitude of the flyback pulse, the output
voltage can be regulated with no direct connection between
input and output. The output is fully floating up to the break·
down voltage of the transformer windings. Multiple floating
outputs are easily obtained with additional windings. Aspecial delay network inside the LT1170/LT1171 ignores the leak·
age inductance spike at the leading edge of the flyback pulse
to improve output regulation.
'See note under block diagram.
The error signal developed at the comparator input is brought
out externally. This pin rJc) has four different functions. It is
used for frequency compensation, current limit adjustment,
soft starting, and total regulator shutdown. During normal
regulator operation this pin sits at a voltage between O.9V
(low output current) and 2.0V (high output current). The error
amplifiers are current output (gm) types, so this voltage can
be externally clamped for adjusting current limit. Likewise, a
capacitor coupled external clamp will provide soft start.
Switch duty cycle goes to zero if the Vc pin is pulled to ground
through adiode, placing the LT117o/LT1171 in an idle mode.
Pulling the Vc pin below O.15V causes total regulator shut·
down, with only 50~ supply current for shutdown circuitry
biasing. See AN·19 for full application details.
TYPICAL APPLICATiOnS (Note that maximum output currents are divided by2 for LT1171.)
Driving High Voltage FET
(for Offline Applications, See AN·25)
External Current Limit
V,
LTlI1OILT1171
R2
lG-20V-=-
=2V
LT111'0/U"1111
BND
/1/
Rl
01
Vc
5000
T
Negative to Positive Buck·Boost Converter
External Current Limit
VI«
Ysw
LT111OJLT1111
GND
-=-VIN
Rl
lk
Cl
l000pF
Vo
Fa
R2
C2
NOTETHATTHE LT1170/LT1171
L-..+-............,.,IV--+---6- GNO PIN IS NO LONGER COMMON
'REQUIRED IF INPUT LEADS "2"
··PULSE ENGINEERING 92114
RS
TOV'N(_j
5-67
LTl170/LTl171
TYPICAL APPLICATIOnS
Flyback Converter
2~~~-------1~---1~--'---'-----'
...,-*-...,-5V
r-..........
l i t " VWtt------'
VOUT
SA
R1
3.74k
R2
1.24k
'REQUIRED IF INP\JT LEADS" 2'
CLAMP TURN-oN
SPIKE
VSNUB
...L
~
VIN
I
-...J
j
TPRIMARYFLYSACKVOLTAGE='VOUT/ VI
~~~
~
OV
VOUT
~
OV.-J
+ VI
mN.VIN
~11
O~
_
o:.....n....nI~
o~rc
. ~
~
.-J\..L..JL-
o
5-68
-11-t=
(IPRI) (Ll)
VSNUB
LT1170/LT1171 SWITCH VOLTAGE
AREA "a" = AREA "b" TO MAINTAIN
ZERO DC VOLTS ACROSS PRIMARY
SECONDARY VOLTAGE
AREA "c" = AREA "d" TO MAINTAIN
ZERO DC VOLTS ACROSS SECONDARY
PRIMARY CURRENT
SECONDARY CURRENT
LT1170SWITCHCURRENT
SNUBBER DIODE CURRENT
LTl170/LT1l71
TYPICAL APPLICATiOns
Positive to Negative Buck·Boost Converter
03 t
lN4001
'REQUIRED IF INPUT LEADS,,2'
"PULSE ENGINEERING 92114
----""1.....~M-
...--~P_~~30V
r-I"'...
C4 +
t TO AVOIO START-UP PROBLEMS
FOR INPUT VOLTAGES BELOW 10V.
CONNECT ANODE OF 03 TO V,N.
AND REMOVE R5. Cl MAY BE
REDUCED FOR LOWER OUTPUT
CURRENTS. Cl =(500pF)(IOUTi.
FOR 5V OUTPUTS. REOUCE R3
TO 1.5k. INCREASE C2 TO 0.3"".
AND REDUCE R6 TO 1000.
LT117Q
1""
02
lN914
Voltage Boosted Boost Converter
II
1
} TOTAL INDUCTANCE=lmH
INTERLEAVE PRIMARY AND
N=5 ~:g~~:NR;/OR LOW LEAKAGE
1-4----4(L1
C2
0.047
Current Boosted Boost Converter
I 01
VOUT
2BV
4A
VIll1
Rl
27k
VIN _
li1110
16-24V-
Cl
\lIIO
R2
1.24k
C2
....
5-69
LT1l70/LT1l71
TYPICAL APPLICAnOnS
Negative Buck Converter
C2
01
V..
1000""
Vsw
L1··
5O.H
F8
R2
1.24k
·REOUIRED IF INPUT LEADS ",2·
··PULSE ENGINEERING 92114
Negative Current Boosted Buck Converter
MINiMUM
LOAD=10mA
r-.....-
......:..:...+--1-+-----::l~
....-5v~~6A
R5
01
01
2N390B
R1
vOUT-O.BV
lmA
LTl170
R2
1.24k
C2
-VIN .......- -.....- -.......- - -.....- - - - - - - - - - '
Positive Buck Converter
VIN .....- -....- - - - - - - - - - ,
.VI~
V'iI/I
LT1170
R1
3.74k
D2
GNO
1N914
R4
100
,..,.,fV'.......
L - - -.....-...;.:;;.....-..:....-I'iI~;..........- -......
~~+_5V.
4.5A
1100mA
tMINIMUM
·REOUIRED IF INPUT LEADS", 2·
··PULSE ENGINEERING 92114
5-70
LTl170/LTl171
TYPICAL APPLICATions
Negative Boost Regulator
Driving High Voltage NPN
C1
D2
R2··
R1·
R1
27k
lTlHO
D1
RO
(MINIMUM
LOAD)
C4 +
470/lF* _
v~~---------I
lTl1701LT11n
R2
124k
11
_1V~~ -
50pH
D1
......rrvv"-
S
10' H
1000C
~ 1.0
~
V
I./lh
~
...........
2.3
-75 -50 -25
1.4
~ 1.2
r-......
w
~
Line Regulation
1. 6 ,---,----,---,----,-,----,-,--,
2.9
1.250
800
160
1.248
700
140
Tj=25°C
~
~ 1.246
~ 1.244
~
~
'-'
z
ffi
~
/'
1.242
!
,,-
r---. .........
"
1.240
!
400
CU~REN~
(Ve PIN)
Gm - AV (FB PIN)
4500
Idle Supply Current vs
Temperature
Shutdown Thresholds
-
350
-
~
~
300
:;:; 250
~
'"
~200
2000
~
~ 150
1500
>'-'
.... 1000
J PIJ)
...... ~
100
-350
-;....~
...,
VDLT~
......
Vc =
-
......
VO~TAGJ
Vc
IS REDUCED UNTIL
RE~ULA~OR C~RRE~T D~OPS rEL0'l300j
50
500
(out OF
~
V
Feedback Pin Clamp Voltage
1000
450
900
'r-. -
400
!
350
tli
300
§1
250
~
t-...
r---
5200
~ 400
-
~
-
100
o
1
V
300
50
0.1 0.2 0.3 0.4 0.5 0.6 0.7 O.S 0.9
FEEDBACK CURRENT (mA)
= 55V-
or- ~
100
o
VSUPPLY
SOO
-5ci,c
200
o
0 25 50 75 100 125 150
TEMPERATURE ('C)
Switch "Off" Characteristics
500
SOV
o
0
-75 -50 -25
VSUPI'LY
o.sv
-50
o
-75-50-250255075100125150
TEMPERATURE ('C)
10
-400
'1
L
100
I
~
~
J
I I I
I I I
~ -100
a::
1 JL
,;' -200
VFB,
= o,sv (fUR~ENT,OUT ,OF V,e PI~)_
-300
-400
o
10
20 30 40 50 SO 70 SO 90 100
SWITCH VOLTAGE (V)
II
t = 25'6
/
:::>
I I I
I I I
o
0.5
I
I
1.0
15
2.0
Ve PIN VOLTAGE (V)
2.5
Transconductance of Error
Amplifier
7000
I
6000
NJ
:g 5000
3~ 4000
G~
z
t33000
is
8 2000
-30
30
60
~
90
~
120 -3
~ 40k
17.S
o
r~
400k
If 10k
.;"
!
lOUT 10mA
;0.5
II
500 lk
1M
~
j$
~
F
,ri·Oii :
Oscillator Frequency vs Timing
Resistance
Output Transistor Emitter
Voltage
.,.,.....
v
I/~Tir/~
r
fr,Tir· 02
5 10 20
50 100 200
OSCILLATOR PERIOD (pS)
(~F)
VIN=2O·0V
~
=>
~
0.1
19.0
~
5! 1.5
V
1/1
I
1
0.1
0.001
Output Transistor Saturation
Voltage
~ 2.0
O.O~ I
10
:iii
10M
2.5
,../.
I
CT
~
O.OO~F.
friil r·005~
l-
~
..... 1-"
>=
\
10
~
'"
......
RL -lOOk
CT 0.001~F.
CT
50
"-
RL -3OOk
-20
f== Vcc- 2OV
~TA 25'C
RL-1M
60
Oscillator Period
100
125
1
4
7 10 . 20
R,RESISTANCE (kD)
40
70 100
Current Limit Sense Voltage
Standby Current
Duty Cycle
5.0
(VptN 4 - VPIN 5)
220
50
TA=25'C
lOUT REF = OmA
I
<.:I
40
,
~
g
4.0
I
§
o
3.0
10
15
20
25
30
VIN-INPUT VOLTAGE (V)
35
40
V~N
l
~
g
/
20
10
(VPIN 2-VPIN 1)~50 mV
9=2.0V
/
/
~30
I'
5
f
/
1
2
2.5
3
VOLTAGE ON PIN 9 (V)
200
tJj
ffi
3.5
lS0
170
.:. 75 -50 -25 0
25 50 75
TEMPERATURE ('C)
100
125
5-89
LT1524/LT3524
SG1524/SG3524
APPLICATions InFoRmATion
FUNCTIONAL DESCRIPTION AND PIN FUNCTIONS
Voltage Regulator
Synchronous OpenrUon
The internal 5V regulator (input pin 15, output pin 16)
supplies a regulated 5V to all internal circuitry, as well as
up to 50mA for external circuitry. For operation below SV
input, pins 15 and 16 may be tied together and 5V to 6V
externally applied.
When an external clock is desired, a clock pulse of approximately 3V can be applied directly to the oscillator
output, pin 3. The impedance to ,ground at this point is
approximately 2ka. In this configuration, RT CT must be
selected for a clock period slightly greater than that of the
external clock.
Oscillator
The fall time of the ramp sets the blanking or dead time
where both outputs are off in push-pull regulators. This is
controlled by the value of the capacitor alone.
If two or more LT1524 regulators are to be operated synchronously, all oscillator output terminals should be tied
together. The oscillator programmed for the minimum
clock period will be the master from which all the other
LT1524s operate. In this application, the CT RT values of
the slaved regulators must be set for a period approximately 10% longer than that of the master regulator. In
addition, CT (master) =2 CT (slave) to ensure that the
master output pulse, which occurs first, has a wider
pulse width and will subsequently reset the slave
regulators.
Output Translstcn
Shutdown
The two output transistors have both the emitters (pins 11
and 14) and the collectors available (pins 12 and 13). Internal current limiting for both of these transistors is about
1OOmA. The two transistors are driven 1S0° out of phase by
the flip-flop. For single-ended operation they should be connected in parallel.
A logic high at pin 10 will shut down the regulator and
cause both output transistors to turn off.
The internal oscillator circuitry sets the frequency of
operation for the switching regulator. The oscillator waveform is a ramp from about 1V to 3.5V (pin 7). Frequency
is set by a timing resistor from pin 6 to ground and a
capacitor from pin 7to ground. The oscillator period is approximately RC for the recommended range of 1.Sk to
100k for Rand 0.001/LF to 0.1/LF for C.
Error AmplHier
The differential input (pins 1 and 2) single,ended output
(pin 9) transconductance amplifier provides about SOdB
of gain, as well as providing a point for loop frequency
compensation or electronic shutdown.
DC gain of the loop can be controlled by resistive loading,
while AC compensation is usually accomplished with a
series R-C connected from pin 9 to ground. The output
impedance at pin 9 is about 5Ma and current is about
200~, so external op-amps or voltage sources can easily
drive the comparator input. Normally, the 5V reference is
divided down to generate a voltage within the commonmode range of the error amplifier.
5-90
Currant limit
Current limiting is activated when the voltage between
pins 4 and 5 exceeds 200mV. The output of the current
limit amplifier internally sums with the error amplifier to
shorten the output pulse width. The gain of the current
limit circuitry is relatively low, so current control in limit is
typically about 5%. Two areas of caution should be
observed with current limiting. First, the response time of
the current limit is set by the loop roll-off on pin 9. Fast
current limiting requires external circuitry. Second, the
common-mode range of the current limit amplifier is limited. Even fast spikes outside this range can disrupt
operation.
~
6
~
~VREf
COLLECTOR "1
I. lID-
III
rt:tdn~
IriD
C2
2SpF
"'T'
01.}-...........\iiii;.
R6 (
10' ~~
R39
038
039
V-
V-
1ft
J~
JI3D' I I I
069
!
n
":5
~
Q
68
RS8
'80
RS6
a
r~
R59
l'
'53
02..L
6.3·...
~
:z:
qilEMITIER "1"
Q3fh?I:037
R3S
RS7
5D
500
R63
.80
0f:1
R61
500
~
I
1S
O~
016
RS
13.1'
....I-
~i'T'
R9
$500
r:-JL~r:~==:::;:i[066
017
Rn.(R12
R10- 3' SSOO
SOO
R3.
8140
I t:1
f:l . IIII
042
I
R.O
R.1
'Ok
I
~~ ~
V-RSS
8.6'
"2"
=~
a
067
tt
,
,
:~---R-e-g-UI-at-in-g-p-u-~sG-e3_~_~_~_~
Modulator
FEATURES
•
•
•
•
DESCRIPTion
The SG3524 PWM switching regulator control circuit con·
tains all the essential circuitry to implement single-ended
or push-pull switching regulators. Included on the circuit
are oscillator, voltage reference, a pulse width modulator,
error amplifier, overload protection circuitry and output
drivers.
±5% Typ. Oscillator Tolerance
20mV/1000 Hrs Typ. Long Term Stability
Interchangeable with all SG3524 or LM3524 Devices
Operates Above 100kHz
Although pin· for-pin and functionally compatible with in·
dustry standard 3524 devices, Linear Technology has in·
corporated several improvements in the design of the
3524. Asubsurface zener reference has been used to pro·
vide excellent stability with time and the reference is
trimmed at the wafer level.
APPLICATions
• Switching Power Supplies
• Motor Speed Control
• Off-Line Power Converters
Linear Technology Corporation's advanced processing,
design and passivation techniques make the SG3524 a
superior and more reliable choice over previous devices.
5V, 1Amp Regulator
Distribution of Reference Output Voltage
5k
200
""+- ~~MP
,..-...........-r6orvOOp-rH
i'"'"
180
I-
160
r
140
120
01 =2N6191
02=2N3906
600
100
l-
80
5k
5k
16 VREF
15
V,N
60
510
C1 12
f"'"
40
t""'
20
0.1pf
5k
6.5k
1 NI
E1 11
2 INV
C2 13
o
4.95
6
SG3524
I4.97
4.99
5.01
5.03
REFERENCE OUTPUT VOLTAGE (V)
5.05
01
MR850
RT
7 C.T
9 COMP
0.15
5-93
SG3524S
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Input Voltage ..................................... 40V
Reference Output Current ......................... SOmA
Output Current (Each Output) .................... 100mA
Oscillator Charging Current (Pin 6or 7) ............. 5mA
Internal Power DisSipation (Note 1) ................... 1W
Operating Temperature Range ............... OOC to 70 0 e
Storage Temperature Range ............. - 65°e to 1500 e
Lead Temperature (Soldering, 10 sec.) .............. 300oe
ORDER PART
NUMBER
TOP VIEW
SG3524S
PART MARKING
SG3524S
S16 PACKAGE
PLASTIC SO
ELECTRICAL CHARACTERISTICS (Note 2)
PARAMETER
Reference Section:
Output Voltage
Line Regulation
load Regulation
Ripple Rejection
Short Circuit Current Limit
Temperature Stability
long Term Stability
Oscillator Section:
Maximum Frequency
Initial Accuracy
Voltage Stability
Temperature Stability
Output Amplitude
Output Pulse Width
Error Amplifier Section:
Input Ollset Voltage
Input Bias Current
Open loop Voltage Gain
Common·Mode Voltage
Common·Mode Rejection Ratio
Small Signal Bandwidth
Output Voltage
Comparator Section:
Duty Cycle
Input Threshold
Input Threshold
Input Bias Current
5-94
CONDITIONS
VIN = BV to 40V
IL=OmAt020mA
f=12OHz
VREF=O
Cr = O.ool~F, RT = 2kll
RT and Cr Constant
V1N = BVto 40V
Note 3
Pln3
Cr=O.OI~F, TA=25°C
VCM=2.5V
VCM= 2.5V
MIN
•
•
•
4.6
SG3524
TYP
5.0
10
20
100
0.3
20
•
300
5
•
2
3.5
0.5
1
60
1.8
2
2
80
•
•
•
•
10
10
3.4
3.B
45
0
1
3.5
1
V
mV
mV
dB
mA
%
kHz
%
%
%
V
~s
70
3
0.5
UNITS
mV/&r
1
Av=OdB
% Each Output On
Zero Duty Cycle
Max Duty Cycle
5.4
30
50
66
•
•
•
•
MAX
mV
~
dB
V
dB
MHz
V
%
V
V
~
SG3524S
ELECTRICAL CHARACTERISTICS (Note 2)
PARAMETER
Current limiting Section:
Sense Voltage
Sense Voltage T.C.
Common·Mode Voltage
Output Section: (Each Output)
Coliector·Emitter Voltage
Collector Leakage Current
Saturation Voltage
Emitter Output Voltage
Rise lime
Fall lime
Total Standby Current
CONDITIONS
MIN
SG3524
TYP
MAX
Pin 9= 2V with Error Amplifier
Set for Max Out
180
200
220
•
•
VCE = 40V
Ic=50mA
VIN=20V
Rc=2kll
Rc=2k(l
VIN = 40V (Note 4)
The • denotes specifications that apply over the full operating tempera·
turerange.
Note1: For operating at elevated temperatures, the device in the SO pack·
age must be derated at 100°CIW to a maximum junction temperature of
115°C.
Note 2: These specifications apply for V1N = 2OV, f = 20kHz. TA = 25°C un·
less otherwise noted.
•
•
•
•
•
0.2
-1
1
40
17
UNITS
mV
mV/oC
V
V
0.1
1
18
0.2
0.1
8
50
2
~A
V
V
~
~s
10
mA
Note 3: Although many manufacturers specify a maximum specification of
2%, Linear Technology's experience is that this specification is not being
presently met by other manufacturers. LinearTechnology's basic deSign,
although improved, is essentially identical to other manufacturer's devices.
Linear Technology Is, however, unwilling to place a maximum specification
on its data sheet which cannot be met or guaranteed.
Note 4: Standby current does not include the oscillator charging current,
error and current limit dividers, and the outputs are open circuit.
5-95
NOTES
5-96
AOG_l)v~__L_T_/S_G_15_2_5_A_' I_S_G_35_2_5_A
,
~.-Y-~!ONFOl.J
Regulating Pulse Width
L_T
LT/SG1527A,LT/SG3527A
U~~
Modulators
FEATURES
DESCRIPTion
• Undervoltage Lockout with Hysteresis
• Guaranteed 1% 5.1 V Reference
• Guaranteed 1OmV /1000 Hr Long Term Stability
• Latching PWM
• 8V to 35V Operation
• 100Hz to 400kHz Oscillator
.400mA Source and Sink Current
The LT1525A and LT1527A are improved general purpose switching regulator control circuits. Included on the
chip are a trimmed 1% voltage subsurface zener reference, oscillator, comparator and high current class B
totem pole output drivers. Included in the design of the
LT1525A are easy synchronization to an external clock,
soft-start and adjustable deadtime control. A shutdown
pin allows instantaneous shutdown.
APPLICATions
• Switching Power Supplies
• Motor Speed Control
• Power Converters
The LT1525A and LT1527A differ only in their output
logic phasing. The LT1525A has a low output during the
"off" state, while the LT1527A has a high output during
the' 'off" state. Both devices have undervoltage lockout
with about 0.5V hysteresis, giving reliable operation even
with slowly varying supplies.
The combination of improved features and advanced
processing for high reliability make Linear Technology's
switching regulators a supreme choice.
BLOCK DIAGRAm
+VIN 15
LT1525A Start-Up
GROUND 1 2 - - - - - - .
10
SYNC 3 - - - - ,
TURN·ON
VOrTAGr:~ r--r--
RT 6
COMPENSATION
V
OUTPUT LOADED TO V-
CT 5
DISCHARGE 7
V
9---_-1
OUTPUT
SWITCHING
l,.,
INV INPUT 1
NIINPUT 2
o
SOFT-START 8 - - - - - t - - t
o
4
6
10
VIN (V)
SHUTDOWN 10+'\o""""'+-~
....
SG1527A
L ___ °.!!ll'l!l,.S~E....J
5-97
111
LT /SG1525A, LT /SG3525A
LT /SG1527 A, LT /SG3527 A
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
(Note 1)
Supply Voltage ( +VIN) .................. +40V
Logic Inputs .................. -0.3Vto +5.5V
Analog Inputs .................. -0.3Vto +VIN
Output Current, Source or Sink ............ 500mA
Reference Output Current ................. 50mA
Oscillator Charging Current . . . . . . . . . . . . . . . .. 5mA
Power Dissipation atTA = +25°C(Note2) ... 1000mW
Thermal Resistance: Junction to Ambient. .. 100°C /W
Power Dissipation atTc = + 25°C (Note 3). .. 2000mW
Thermal Resistance: Junction to Case .. . . .. 60°C/W
Operating Temperature Range
1525A, 1527A ............... -55°Ct0150°C
3525A,3527A ................... 0°Ct070°C
Storage Temperature Range ........ -65°Ct0150°C
Lead Temperature (Soldering, 10sec.) ..... +300°C
ORDER PART
NUMBER
TOP VIEW
LT1525AJ
LT1527AJ
LT3525AJ
LT3527AJ
LT3525AN
LT3527AN
J PACKAGE
16 PIN HERMETIC
SG1525AJ
SG1527AJ
SG3525AJ
SG3527AJ
SG3525AN
SG3527AN
N PACKAGE
16 PIN PLASTIC
REcommEnDED OPERATinG conDITions
(Note 4)
Input Voltage ( +VIN) .............. +8Vto +35V
Collector Supply Voltage (Vc) ...... + 4. 5V to + 35V
Sink/Source Load Current
(Steady State) ................. OmA to 100mA
Sink/Source Load Current (Peak) . . . .. OmA to 400mA
ELECTRICAL CHARACTERISTICS
PARAMETER
REFERENCE SECTION
Output Voltage
Line Regulation
Load Regulation
Temperature Stability
Total Output Variation
Short Circuit Current
Output NOise Voltage
Long Term Stability
5-98
Reference Load Current. . . . . . . . . . . .. OmA to 20mA
Oscillator Frequency Range. . . . . . .. 100Hz to 400kHz
Oscillator Timing Resistor. . . . . . . . . . .. 2kO to 150kO
Oscillator Timing Capacitor ........ 0.001p.FtoO.1p.F
Deadtime Resistor Range . . . . . . . . . . . . .. 00 to 5000
VIN = +2DV unless otherwise noted
CONDITIONS
Tj=25°C
VIN = 8V to 35V
IL = OmA to 20mA
Line, Load, and Temperature
VREF=O, Tj=25°C
10Hzs Is 10kHz, Tj _ 25°C
Tj = 125°C
•
•
•
•
LT1525A
LT1527A
MIN TYP MAX
SG1525A
SG1527A
MIN TYP MAX
5.05
5.05
5.0
5.10
5
20
20
5.1
80
40
1
5.15
10
50
50
5.2
100
200
10
5.0
5.10
10
20
20
5.1
80
40
20
5.15
20
50
50
5.2
100
200
50
UNITS
V
mV
mV
mV
V
mA
",Vrms
mV/v'K/ir
LT /SG1525A, LT /SG3525A
LT /SG1527 A, LT /SG3527 A
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
OSCILLATOR SECTION (Note 6)
Initial Accuracy
Tj = 25°C (Note 6)
Voltage Stability
VIN - 8V to 35V
Temperature Stability
Minimum Frequency
RT=150kO, CT=0.1f'F
Maximum Frequency
RT=2kO, CT=lnF
Current Mirror
IRT =2mA
Clock Amplitude
Clock Width
Tj =25°C
Sync Threshold
Sync Input Current'
Sync Voltage = 3.5V
ERROR AMPLIFIER SECTION (VCM =5.1V)
Input Offset Voltage
Input Bias Current
Input Olfset Current
DC Open Loop Gain
RL;;, 10MO
Gain Bandwidth Product
Av = OdB, Tj = 25°C (Note 5)
Output Low Level
Output High Level
Common Mode Rejection
VCM = 1.5V to 5.2V
Supply Voltage Rejection
VIN = 8V to 35V
PWM COMPARATOR
Minimum Duty Cycle
Maximum Duty Cycle
Input Threshold
Zero Duty Cycle (Note 6)
Input Threshold
Max Duty Cycle (Note 6)
Input Bias Current
SOFT-START SECTION
Soft-Start Current
VSHUTDOWN = OV
Soft-Start Voltage
VSHUTDOWN = 2V
Shutdown Input Current
VSHUTDOWN = 2.5V
OUTPUT DRIVERS (Each Output) (Vc =20V)
Undervoltage Lockout Hysteresis
Output Low Level
ISINK= 20mA
Output High Level
Undervoltage Lockout
Collector Leakage
Rise Time
Fall Time
Shutdown Delay
TOTAL STANDBY CURRENT
Supply Current
ISINK=100mA
ISOURCE = 20mA
ISOURCE = 100mA
VCOMP and Vss = High
Vc = 35V (Note 7)
CL = 1nF, Ti = 25°C (Note 5)
CL = 1nF, Ti = 25°C (Note 5)
VsD =3V, Cs=O, Tj=25°C (Note 5)
•
•
•
•
•
•
•
LT1525A
LT1527A
MIN TYP MAX
SG1525A
SG1527A
MIN TYP MAX
2
0.5
3
6
1
6
100
2
0.3
3
6
1
6
100
%
%
%
Hz
kHz
2.0
3.5
0.5
2.0
1.0
2.2
2.0
3.5
0.5
2.0
1.0
2.2
rnA
V
f'S
V
rnA
0.5
0.2
5
3
0.5
0.5
1
5
10
1
400
1.7
3.0
0.3
1.2
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
70
1
3.8
75
75
•
60
1
0.5
3.8
60
50
75
2
0.2
5.6
75
60
0
45
0.6
25
0.2
•
•
•
•
•
80
2
0.2
5.6
90
90
1
2.8
2.5
400
1.7
3.0
0.3
1.2
18
17
6
45
0.6
3.6
1.0
50
0.4
0.4
80
0.6
1.0
25
0.6
0.2
1.0
19
18
7
1
0.4
2.0
0.2
100
50
0.2
14
20
0.5
0
49
0.9
3.3
0.05
8
200
600
300
0.5
1
2.8
2.5
18
17
6
49
0.9
3.3
0.05
3.6
1.0
50
0.4
0.4
80
0.6
1.0
0.6
0.2
1.0
19
18
7
1
0.4
2.0
100
50
0.2
8
200
600
300
0.5
14
20
UNITS
mV
~
~
dB
MHz
V
V
dB
dB
%
%
V
V
f'A
~
V
rnA
V
V
V
V
V
V
~
ns
ns
f'S
rnA
5-99
III
LT /SG1525A, LT /SG3525A
LT /SG1527 A, LT /SG3527 A
ELECTRICAL CHARACTERISTICS
PARAMETER
REFERENCE SECTION
Outpul Voltage
Line Regulation
Load Regulation
Temperature Stability
Total Outpul Variation
Short Circuil Current
Output Noise Voltage
Long Term Stabllily
OSCILLATOR SECTION (Note 6)
Initial Accuracy
Voltage Stability
Temperature Stability
Minimum Frequency
Maximum Frequency
Current Mirror
Clock Amplitude
Clock Width
Sync Threshold
Sync Input Current
ERROR AMPLIFIER SECTION (V CM =5
Input Offset Voltage
Input Bias Current
Input Offset Current
OC Open Loop Gain
Gain Bandwidth Product
Output Low Level
Output High Level
Common Mode Rejection
Supply Voltage Rejection
PWM COMPARATOR
Minimum Duty Cycle
Maximum Duty Cycle
Input Threshold
Input Threshold
Input Bias Current
SOFT-START SECTION
Soft-Start Current
Soft-Start Voltage
Shutdown Input Current
5-100
CONDITIONS
Tj =25°C
VIN -BV to 35V
IL =OmA to 20mA
Line, Load, and Temperature
VREF=O, TI=25°C
10Hzsfs 10kHz, TI-25°C
Tj-125°C
Tj = 25°C (Nole 6)
VIN -BV to 35V
RT=150kO, CT=0.1/LF
RT=2kO, CT=1nF
IRT=2mA
TI=25°C
Sync Voltage = 3.5V
1V)
RL2: 10MO
Av=OdB, Tj=25°C (Note 5)
Zero Duty Cycle (Note 6)
Max Duty Cycle (Note 6)
VSHUTDOWN =OV
VSHUTDOWN =2V
VSHUTDOWN =2.5V
SG3525A
SG3527A
MIN TVP MAX
5.05
5.00
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
VCM = 1.5V to 5.2V
VIN = BV to 35V
LT3525A
LT3527A
MIN TVP MAX
4.95
400
1.7
3.0
0.3
1.2
70
1
•
•
•
•
•
•
•
•
3.B
75
75
•
•
•
25
5.10
5
20
20
5.1
80
40
1
5.15
10
50
50
5.25
100
100
10
2
0.5
3
6
2
6
100
2.0
3.5
0.5
2.0
1.0
2.2
2
1
5
3
0.5
80
2
0.2
5.6
90
90
1.0
2.B
2.5
5.10
10
20
20
5.20
20
50
50
5.25
100
200
50
V
mV
mV
mV
V
rnA
/LVrms
mV/khr
2
1
3
6
2
6
100
2.0
3.5
0.5
2.0
1.0
2.2
%
%
%
Hz
kHz
rnA
V
2
1
10
10
1
4.95
80
40
20
400
1.7
3.0
0.3
1.2
60
1
0.5
3.8
60
50
75
2
0.2
5.6
75
49
0.9
3.3
0.05
3.6
1.0
50
0.4
0.4
0.6
1.0
0.5
0
45
0.6
BO
1.0
2.8
2.5
60
0
45
0.6
25
UNITS
,.s
V
rnA
mV
,.A
,.A
dB
MHz
V
V
dB
dB
49
0.9
3.3
0.05
3.6
1.0
%
%
V
V
,.A
50
0.4
0.4
80
0.6
1.0
,.A
V
rnA
LT /SG1525A, LT /SG3525A
LT /SG1527 A, LT /SG3527 A
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
OUTPUT DRIVERS (Each Output) (Ve =20V)
Undervoltage Lockout Hysteresis
Output Low Level
ISINK=20mA
ISINK = 100mA
Output High Level
ISOURCE = 20mA
ISOURCE = 100mA
Undervoltage Lockout
VCOMP and Vss = High
Collector Leakage
Vc = 35V (Note 7)
Rise Time
Cl = lnF, Tj=25°C (Note 5)
Fall Time
Cl=lnF, Tj=25°C (Note 5)
Shutdown Delay
Vs o-3V, Cs-O, Tj-25°C (Note 5)
TOTAL STANDBY CURRENT
Supply Current
The. denotes the specifications which apply of the full operating
temperature range.
Note 1: Values beyond which damage may occur.
Note 2: Derate at 10mW/oC for ambient temperatures above +50°C.
Note 3: Derate at lBmW/oC for case temperatures above +25°C.
Note 4: Range over which the device is functional and parameter limits
are guaranteed.
•
•
•
•
•
•
LT3525A
LT3527A
MIN TVP MAX
SG3525A
SG3527A
MIN TYP MAX
0.2
0.2
18
17
B
O.B
0.2
1.0
19
18
7
O.B
0.2
1.0
19
18
7
8
8
100
50
0.2
200
600
300
0.5
100
50
0.2
200
BOO
300
0.5
14
20
14
20
0.4
2.0
18
17
B
UNITS
V
V
V
V
V
V
p.A
ns
ns
0.4
2.0
iL5
mA
Note 5: These parameters, although guaranteed over the recommended
operating conditions, are not 100% tested in production.
Note 6: Tested at fosc=40kHz (RT=3.Bkll, CT=O.OI,.F, Ro=OIl).
Note 7: Applies to 1525A13525A only, due to polarity of output pulses.
TYPICAL PERFORmAnCE CHARACTERISTICS
Oscillator Charge Time vs RT
Error Amplifier Open Loop
Frequency Response
Oscillator Discharge Time
1000
I
f
f:l:!
h!.!.~~:
500
Rr
t;;'"
~
50
1
I "I
'RD~OIl
1'"
_
V
CT ,5;on'1':; ~I'
-9r=2.onF ' - '
'"
z 20
V
Cr'=I.OnF/V
~ 10
~
i
5.0
2.0
V. /V
l- V IV)
V
V
VJ
VVIT
iii"
/
~ 60r--r~~~~--~-+--1
~
'" 40
~
r--r~I---T-t-'r-~-+--1
~
.:. 20
1
:;
ICT 0.02#
~ rYT=:0.~5#
CT=O.lpF
1.0
1 0 2.0 5.0 10 20 50100200 500 lk 2k 5k 10k
CHARGE TIME (pS)
o~-L~~~~~-L~~
0.10.20.51.02.05.01020 50100200500 lk
DISCHARGE TIME (pS)
1.0
10
100
1.0k
f,
10k
lOOk 1.0M 10M
FREQUENCY (Hz)
5-101
LT /SG1525A, LT /SG3525A
LT /SG1527 A, LT /SG3527 A
TYPICAL PERFORmAnCE CHARAaERISTICS
1525A Output Saturation
Characteristics
LT1527A Start-Up
10
I ",I,
TURN·ON-
I- V1N =20V
T~RN1FF
'[
~
TA=25°C
I I
SOU~CE bATURATlON,
vC-I~ "/
I-
OUTPUT LADED TO V+
V
1I
SINK SATURATION, V?L
o
---
0.01
IIII
.~ ·t'"·
V
fI!tr
~
17
cl/
1/
II
0.02
0.05 0.10 0.2
0.5
OUTPUT CURRENT, SOURCE OR SINK (A)
o 17
V
o
1
V
V
OUTPUT
~ITCHING
4
6
-
~
10
VIN(V)
1525A/1527A
CL =lkpF,
=5kpF,
=10kpF
V =2.5V/DIV
H =100ns/DIV
1525A11527A
CL=lkpF,
=5kpF,
=10kpF
V =2.5V/DiV
H = l00ns/DIV
OUTPUT CURRENT
100mA/DIV
100ns/DIV
OUTPUT CURRENT
lIlOmA/DiV
loons/DIV
APPLICATions InFORmATion
Shutdown Options
1, An external open collector comparator or transistor
can be used to pull down the compensation pin (9),
This will set the PWM latch and turn off both outputs,
Pulse-by-pulse protection can be accomplished if the·
shutdown signal is momentary, since the PWM latch
will be reset with each clock pulse,
5-102
2, Shutdown can also be accomplished by pulling down
on the soft-start pin (8). When using this approach,
shutdown
not affect the amplifier compensation
network; however, if a soft-start capacitor is used, it
must be discharged, possibly slowing shutdown
response.
will
LT /SG1525A, LT /SG3525A
LT /SG1527 A, LT /SG3527 A
APPLICATions inFORmATion
3. Applying a positive-going signal to the shutdown pin
(10) will provide the most rapid shutdown of the outputs if a soft-start capacitor is not used at pin 8. An
external soft-start capacitor at pin 8 will slow shutdown response due to the discharge time of the softstart capacitor. Discharge current is approximately
twice the charging current.
4. The shutdown terminal can be used to set the PWM
latch on a pulse-by-pulse basis if there is no external
capacitance on pin 8. Soft-start characteristics may
still be achieved by applying an external capacitor,
blocking diode and charging resistor to the compensation pin (9).
TYPICAL APPLICATiOnS
Bipolar Push-Pull Supply
Single Ended Supply
V+
r - -.........rY"YT"'-1~OUTPUT
C1
R1
13
R2
He
13
+Vc
All
1525A
1525A
GND
All
GND
6 14
B 14
12
':"
12
IN CONVENTIONAL PUSH·PULl BIPOLAR
DESIGNS, FORWARD BASE DRIVE IS
CONTROLLED BY R1-R3. RAPID TURN·OFF
TIMES FOR THE POWER DEVICES ARE
ACHIEVED WITH SPEED-UP CAPACITORS C1
AND C2.
FOR SINGLE ENDED SUPPLIES, THE DRIVER
OUTPUTS ARE GROUNDED. THE +Vc TERMINAL
IS SWITCHEO TO GROUND BY THE TOTEM·
POLE SOURCE TRANSISTORS ON EVERY
OSCILLATOR CYCLE.
Power FETs Push-Pull Supply
Driving Transformers Directly
V+
V+
R1
C1
R1
152M
GND B
12
THE LOW SOURCE IMPEDANCE OF THE
OUTPUT DRIVERS PROVIDES RAPID CHARGING
OF POWER FET INPUT CAPACITANCE,
WHILE MINIMIZING EXTERNAL COMPONENTS,
C2
R2
•
LOW POWER TRANSFORMERS CAN BE DRIVEN
DIRECTLY BY THE 1525A. AUTOMATIC RESET
OCCURS DURING DEADTIME, WHEN BOTH
ENDS OF THE PRIMARY WINDING ARE
SWITCHED TO GROUND.
5-103
LT /SG1525A, LT /SG3525A
LT /SG1527 A, LT /SG3527 A
TEST CIRCUIT
30k
PWM
ADJ
10k
RT
3.6k
1.5k
2.0k
DUT
.lL0-+
SHUTDOWN
PACKAGE DESCRIPTiOn
16 Pin Cavity DIP (J)
16 Pin Molded DIP (N)
0310
(7874)
:F '"
.AX J----(~97:)-----,
'1
14
13
10
"
(7391)
L'-rn-trr-m-r.n-rr1T1rTlT"1r
5-104
Tjmax
alA
ajC
LT/SG1525AJ
LT/SG1527AJ
150°C
100°C/W
60°C/W
LT I SG3525AJ
LT ISG3527AJ
150°C
100°C/W
60°C/W
VREF
~""""-Llntf\Q
...A.,
LTl526/LT3526
TECHNOLOG~~~----Re-g-u-la-t-in-g-P-u-15e-W-id-t-h
Modulator
FEATURES
DESCRIPTion
•
•
•
•
•
•
The LT1526 is an improved general purpose switching
regulator control ciruit.lncluded on the chip are a1%volt·
age reference, oscillator, error amplifier, pulse width
modulator and low impedance output drivers. Also in·
cluded are protective features such as acurrent limit com·
parator, undervoltage lockout, soft·start circuitry, and
adjustable deadtime. This versatile device can be used to
implement single·ended or push·pull switching regulators
of either polarity, both transformerless and transformer·
coupled.
8V to 35V Operation
Guaranteed ± 1%5V Reference
Guaranteed 1OmV/1 000 Hrs. Long Term Stability
Guaranteed ± 3% Oscillator Temperature Stability
Undervoltage Lockout
100mA Source/Sink Outputs
APPLICATions
• Switching Power Supplies
• Motor Speed Control
• Power Converters
Although pin·for·pin and functionally compatible with in·
dustry standard 1526 and 3526 devices, Linear Technology
has incorporated several improvements in the design of
the LT1526. A subsurface zener has been used to provide
excellent reference voltage stability and the reference of·
fers improved line regulation and load regulation. The cur·
rent limit comparator sense voltage initial accuracy and
temperature stability have been greatly improved.
The combination of improved features and advanced lin·
ear processing for high reliability make Linear Technol·
ogy's switching regulators asuperior choice.
BLOCK DIAGRAm
SYNC
Reference Line Regulation
12
-
,
-1
-2
1I£m' 5
-3
CSOFTSTART 4
-4
COMPENSATION 3
-5
0
10
20
30
40
+VIN(V)
+CURRENT 7
SENSE
-CURRENT 6
SENSE
8
Sll1JTnilWII
5-105
l1I
LT1526/LT3526
PACKAGE/ORDER InFORmATion
ABSOLUTE mAXimum RATinGS
(Note 1)
ORDER PART
NUMBER
TOP VIEW
Input Voltage (+VIN) ................... , ....... " +40V
Collector Supply Voltage (+ Ve) ................... +40V
Logic Inputs ........................... - O.3V to +5.5V
Analog Inputs .......................... , - O.3V to +VIN
Source/Sink Load Current (each output) ........... 200mA
Reference Load Current ........................... 50mA
Logic Sink Current ................................ 15mA
Operating Junction Temperature Range
LT1526 ............................ -55°Cto +150°C
LT3526 ............................... OOC to +125°C
Storage Temperature Range .......... - 65°C to +150°C
Lead Temperature (Soldering, 10sec) ............ +300°C
+ERROR 1
COMPENSATION 3
LT1526J
LT3526J
LT3526N
CSOFTSTART 4
-CURRENT SENSE 6
+CURRENT SENSE 7
SHUTDOWN 8
J PACKAGE
N PACKAGE
18 PIN HERMETIC 18 PIN PLASTIC
REcommEnDED OPERATinG conDITions (Note2)
Input Voltage ............................. +8V to +35V
Collector Supply Voltage ............... +4.5V to +35V
Sink/Source Load Current (each output) ... OmA to 100mA
Reference Load Current ................. - 5mA to 20mA
Oscillator Frequency Range ............... 1Hz to 400kHz
Oscillator Timing Resistor .................. 2kO to 150kO
Oscillator Timing Capacitor ................. 1nF to 20llF
Available Deadtime Range at 40kHz .......... 3% to 50%
ELECTRICAL CHARACTERISTICS
(+ VIN =15V, and over operating junction temperature, unless otherwise specified.)
PARAMETER
REFERENCE SECTION (Note 3)
Output Voltage
Line Regulation
Load Regulation
Temperature Stability
Total Output
Voltage Range
Short Circuit Current
Long Term Stability
UNDERVOLTAGELOCKOUT
RESET Output Voltage
RESET Output Voltage
OSCILLATOR SECTION (Note 4)
Initial Accuracy
Voltage Stability
Temperature Stability
5-106
CONDITIONS
Ti= + 25°C
+ VIN =8Vto35V
IL= -5mAto +20mA
Over Recommended
Operating Conditions
VREF=OV
Ti= 125°C
MIN
4.95
•
•
•
•
•
VREF = 3.8V
VREF = 4.8V
Tj= +25°C
+ VIN=8Vto35V
•
•
4.90
25
LT1526
TYP
MAX
MIN
LT3526
TYP
MAX
4.90
5.00
5.10
2:
1&
~
50
5.15
5.00
5.05
2:
5
10
10
15
5.00
&0
5.10
4.85
5
15
5.00
25
&0
100
2:
10
0.2
4.8
0.4
&0
100
2
10
0.2
4.8
0.4
±3
0.5
1
2.4
±8
1
3
±3
0.5
1
±8
1
3
UNITS
V
mV
mV
mV
V
rnA
mVlv'khr
V
V
%
%
%
LT1526/LT 3526
ELECTRICAL CHARACTERISTICS
(+VIN =15V, and over operating junction temperature, unless otherwise specified.)
PARAMETER
LT1526
CONDITIONS
OSCILLATOR SECTION (Nole 4)
Minimum Frequency
Rr = 150kll, CT = 2O~F
Maximum Frequency
RT = 2kll, CT = 1.0nF
Sawtooth Peak Voltage
+VIN=35V
Sawtooth Valley Voltage
+VIN=8V
ERROR AMPLIFIER SECTION (Note 5)
Input Offset Voltage
Rss2kl1
Input Bias Current
Input Offset Current
DC Open Loop Gain
Ru~10MII
High Output Voltage
Vpin1- Vpin2l!:150mV, lsource = 100~
Low Output Voltage
Vpin2- Vpin1l!:150mV, ISink= 100~
Common·Mode Rejection
Rss2kll
Supply Voltage Rejection
+ VIN = 12V to 18V
PWM COMPARATOR (Nole 4)
Minimum Duty Cycle
Vcompensalion= +0.4V
Maximum Duty Cycle
Vcompensallon= +3.6V
DIGITAL PORTS (SYNC, SHUTDOWN, and RESET)
HIGH Output Voltage
Isource=4O~
LOW Output Voltage
Isink = 3.6mA
HIGH Input Current
VIH= +2.4V
LOW Input Current
VII:= +0.4V
CURRENT LIMIT COMPARATOR (Nole 6)
Sense Voltage
Rss50!l
Input Bias Current
SOFT·START SECTION
Error Clamp Voltage
RESET = + 0.4V
Cs Charging Current
RESET = + 2.4V
OUTPUT DRIVERS (Each Outpul) (Note 7)
Isource= 20mA
HIGH Output Voltage
lsource = 100mA
Isink=20mA
LOW Output Voltage
Islnk = loomA
Collector Leakage
Vc=4OV
Rise Time
CL= l000pF
Fall Time
CL= 1000pF
POWER CONSUMPTION (Nole 8)
Standby Current
SHUTDOWN = +0.4V
•
•
•
•
•
•
•
•
•
•
•
•
MIN
TYP
0.5
400
3.0
1.0
MAX
MIN
LT3526
TYP
1
0.5
66
45
49
2.4
4.0
0.2
-125
-225
0.4
-200
100
-3
110
-10
0.1
100
0.4
150
64
3.6
70
1
3.5
2
-350
35
72
4.2
0.2
94
80
400
3.0
1.0
70
66
2
-350
35
72
4.2
0.2
94
80
45
49
2.4
4.0
0.2
-125
-225
5
-1000
100
60
3.6
0.4
o
•
•
•
•
90
50
•
•
•
•
•
•
•
I
The • denotes specifications that apply over the full operating tempera·
turerange.
The shaded electrical specifications indicate those parameters which have
been improved or guaranteed test limits provided for the first time.
Nole 1: Values beyond which damage may occur.
Nole 2: Range over which the device is functional and parameter limits are
guaranteed.
12.5
12
13.5
13
0.2
1.2
50
0.3
0.1
18
MAX
3.5
10
-2000
200
0.4
o
-360
80
50
12.5
12
UNITS
Hz
kHz
V
V
mV
nA
nA
dB
V
V
dB
dB
%
%
0.4
V
V
-200
~
-360
~A
100
-3
120
-10
mV
0.1
100
0.4
150
~
V
~
0.3
2.0
150
0.6
0.2
13.5
13
0.2
1.2
50
0.3
0.1
V
V
V
V
0.3
2.0
150
0.6
0.2
~
30
18
30
mA
~s
~s
Note 3: IL = OmA.
Nole4: fosc=40kHz(RT=4.12kD± 1%, Cr=O.Q1~F ±1%, Ro=O!l).
Note5: VCM=OVto +5.2V.
Note 6: VCM = 0to VIN - 3V. The current limit sense voltage for the LT1526 is
80mV s VSENSE s 120mV for temperatures less than O°C or greater than 125°C.
Nole7: Vc= + 15V.
Nole8: +VIN= +35V,RT=4.12kll.
5-107
LT1526/LT 3526
TYPICAL PERFORmAnCE CHARAOERISTICS
Reference Voltage vs Supply
Voltage
Reference Temperature Stability
Reference Short Circuit Current
75
120
i;:- 100
IIII
::la:i
13
~
..-
r--..... ..........
I
I
o
60
iii
40
~
20
w
'-'
20
+VIN(V)
r-...
-
o
-75
-75 -50 -25 0 25 50 75 100 125 150
JUNCTION TEMPERATURE (OC)
40
30
-75 -50 -25 0 25 50 75 100 125 150
JUNCTION TEMPERATURE (OC)
Current Limit Comparator Transfer
Function
Current Limit Comparator Sense
Voltage
140
120
;;100
110
LlVIN-Wp-P
IL=OmA
!g'120 CL =O~F
115
~
o
f=
:;-
w
80
'"~
.....
a:
3 ~+-+--+--HH--+--+-----1-+--I
o
:-
~60
~ 40
.....
20
a:
~ 105
~
!:i 100
~
I
'-'
z
~
..........
a:
10
Reference Ripple Rejection
~
..........
~
o
1
o
80
t:::
:::>
~
95
~
..-""'"
-..-
-,....
U)
90
85
10
100
lk
10k
lOOk
RIPPLE FREQUENCY (Hz)
O~~~~~~±=±=~
o
~
00 00 l00IWl~I00IOOWO
DIFFERENTIAL INPUT VOLTAGE (mV)
w
1M
Oscillator Frequency Temperature
Stability
Oscillator Period vs Ry and Cy
200
RO-Oll
1/
/
100
80
-75 -50 -25 0 25 50 75 100 125 150
JUNCTION TEMPERATURE (OC)
/
/
/
/
/
1/ / 1/ 1/ / / /
'OSC=40kHz
(RT=4.12kll CT=O.OI~F
RO=OIl)
50
"'~ "'~ ",, ,. l" ",,,,. ",,,,. fjir","" /' 'If/~"'<;
r;j/
~~,~~~~/
<>" <>" <>" <>" <>" <>" <>" <>" <>" <>" <>"
1--."'''
~20 -
,
ci: 10
,
/
// /
1
2,..
/
5,.. 10,.. 20,..
5-108
",'<
~ <.;'
/
/
/
1/ V 1/
/
V /
V
..- f-"
-r-
/
/
1/ /
50,.. 100,.. 200,.. 500,.. lms 2ms
5ms 10ms 20ms
OSCILLATOR PERIOD
50ms looms 200ms 500ms 1 SEC 2 SEC
-10
-75 -50 -25 0 25 50 75 100 125 150
JUNCTION TEMPERATURE (OC)
LT1526/LT 3526
TYPICAL PERFORmAnCE CHARACTERISTICS
Error Amplifier Open Loop Gain vs
Frequency
5~F,
USE SURGE
LIMIT CIRCUIT
SHOWN BELOW
w
~
~
60
'"
to
'1\
W
~
':;
40
'"
>
g,
g
r-
20
z
~
I-
~
3
+
u
~
=>
:;;
~
\
lOOk
FREQUENCY (Hz)
1M
10
0.5
10M
100
~
30
<' 25
"''-'=>
>-
i'!'i 20
:I
il
>
+
~w
I
~
40
fOSC=40kHz
V
15V
10
5
~
6
:E
;::
~
5
50
/'
V
/'
o
4
10
20
40
100 200
OSCILLATOR FREQUENCY (kHz)
400
1/
./'
4
2
1
20
30
+VIN(V)
2
3
4
REFERENCE VOLTAGE (V)
(CT=O.Ol~)
20
!
-r-
10
\
10
50
li'
§.
oV
o
V
o
Output Driver Deadtime vs Ro
p::=~::;:r======R
>z
1:; 15
'"
z
«
t> 10
o
50
20
+VCOLLECTOR Current (Note 9)
35
"'~
10
h
CSOfTSTART(~F)
Standby Current vs Supply
Voltage
u
"
o,~
/
~ 20
1\
"100 1\-'
lk
10k
10
1000
50
w
220pF _
-20
200
'" 100
:;;
"-
ccoMP=T
2 -
/
/
§:'
z
Undervoltage Lockout
Characteristic
Soft·start Time Constant vs Cs
o
./'
2
4
6
8
10 12 14 16 18 20
Ro (Il)
NOTE 9: TRANSIENT CURRENTS OCCUR WITHIN THE
OUTPUT STAGES DURING SWITCHING,
INDEPENDENT OF LOADING, THE GRAPH
SHOWS THE AVERAGE (DC) VALUE OF THE
TRANSIENT CURRENTS.
Output Driver Shutdown Delay
1.6
Output Driver Saturation Voltage
Output Driver Saturation Voltage
VSISINK
VSISOURCE
2,5
+Vc
OUTPUT LOW
1.4
1.2
F~OM dURRJNT LlIMIT
~
r- COMPARATOR
(100mV OVERDRIVE)
~ 1.0
0.4
0.2
o
,..-
, /V
~ 08
'" 0.6
./
, /V
V
-
~ I--
~ ""';ROM SRlITOOWlI PIN
-75 -50 -25 0 25 50 75 100 125 150
JUNCTION TEMPERATURE (0C)
OUTPUT HIGH
-0.5
2.0
~
1.5
{
~
z
i'"
~
-
I
1.0
I
II
0.5
-20
I-
GND
2
5
10
20
50
100
OUTPUT SINK CURRENT (mA) .
-2.5
200
2
5
10
20
50
100
OUTPUT SOURCE CURRENT (mA)
200
5-109
LT1526/LT 3526
APPLICATions InFoRmATion
FUNCTIONAL DESCRIPTION AND PIN FUNCTION
Oscillator
Voltage Reference
The internal oscillator circuitry sets the frequency of
operation for the switching regulator. Frequency is set by
RT (pin 9), CT (pin 10), and RD (pin 11). With RD=OO, the
values for RT and CT may be chosen from the oscillator
period graph. If the desired deadtime is increased, the
value of RT may need to be decreased to maintain the desired frequency.
The reference regulator (pin 18) supplies a regulated 5.0V
to all internal circuitry, as well as up to 20mA for external
circuitry. It is fully active at supply voltages (pin 17) of 8V
and greater.
The LT1526 can operate from a 5V supply by connecting
+ VIN to VREF (pin 18 to pin 17) and maintaining the supply
between 4.8V and 5.2V.
Undervoltage Lockout
The undervoltage lockout circuitry protects both the
switching regulator and the power devices it controls from
inadequate supply voltage, which can result in unstable
control circuitry. If + VIN is too low, the circuit turns off
the output drivers, holds RESET (pin 5) low and the softstart capacitor in adischarged state.
Soft·Start
The soft·start circuitry protects the power devices from
high surge currents during power supply turn-on by limiting the available PWM duty cycle.
When + VIN reaches asufficient voltage to allow RESET to
go high, a 100JLA current source charges the external Cs
capacitor (pin 4) linearly to 5V. The ERROR AMPLIFIER
output is clamped to 600mV above the Cs voltage, and the
available duty cycle of the PWM increases linearly. Maximum duty cycle is available when the Cs voltage reaches
about3V.
Digital Control Ports
The three digital control ports are bidirectional. Each port
can drive TTL and 5V CMOS logic directly. They can also
be driven by open'collector TTL, open·drain CMOS, and
open-collector voltage comparators.
Driving SYNC (pin 12) low causes a discharge cycle in the
oscillator. Driving SHUTDOWN (pin 8) low causes the outputs to turn off. Driving RESET (pin 5) low causes the outputs to turn off and discharges the Cs capacitor.
5-110
The frequency at either output is half that of the oscillator,
and the frequency at + Vc (pin 14) is equal to the
oscillator.
Synchronous Operation
Two or more switching regulators may be synchronized by
setting the master to the desired frequency and sharing
the oscillator signals with the slave units. Slave CT pins
are tied to the master CT pin, and slave SYNC pins are tied
to the master SYNC pin. Slave RT and RD pins are left
open.
External logic synchronization can be used by setting the
oscillator period to be 10% longer than the external clock
period, and connecting the external clock to the SYNC pin.
A periodic low of about 0.5J1s wide will lock the oscillator
to the external frequency.
Error Amplifier
The differential input (pins 1 and 2), single-ended output
(pin 3) transconductance amplifier provides about 70dB of
gain. The output has an impedance of 2MO, and since all
voltage gain occurs at the output, the gain characteristics
can be controlled with shunt reactance to ground.
Output Drivers
The totem-pole output drivers can source and sink 100mA
continuously and 200mA peak. The outputs are driven
1800 out of phase by the flip-flop. Loads can be driven either from the outputs or the + Vc pin. Since large transient
currents occur within the output stages during switching,
a resistor is recommended in series with + Vc (pin 14) to
limit the peak current. The resistor value should be
+Vc/2OOmA.
LT1526/LT 3526
APPLICATions InFoRmATion
Current Limit
The current limit comparator turns off the outputs when
the input voltage (pin 7 to pin 6) exceeds 100mV. Hystere·
sis is built into the trip pOint, of about 10mV, to prevent
oscillations.
TYPICAL APPLICATiOnS
Bipolar Push·Pull Supply
Single Ended Supply
V+
Driving Transformers Directly
V+
V+
,--_...rVV"""_OUTPUT
C1
R1
R2
14
14
+Vc
+Vc
'" 13
LT1526
LT1526
GND
C1
A 13
16
GND
8 16
15
.,..
15
FOR SINGLE ENDED SUPPLIES, THE DRIVER
OUTPUTS ARE GROUNDED. THE +Vc TERMINAL IS SWITCHED TO GROUND BY THE
TOTEM POLE SOURCE TRANSISTORS ON
EVERY OSCILLATOR CYCLE.
C2
IN CONVENTIONAL BIPOLAR PUSH-PULL DESIGNS,
FORWARD BASE DRIVE IS CONTROLLED BY R1-R3.
RAPID TURN-OFF TIMES FOR THE POWER DEVICES
ARE ACHIEVED WITH SPEED-UP CAPACITORS C1
AND C2,
Power FEls Push·Pull Supply
.,..
6~~E~~I~~6~t~~~0~~Er~1~~~
BE
AUTOMATIC RESET OCCURS DURING DEADTIME, WHEN BOTH ENDS OF THE PRIMARY
WINDING ARE SWITCHED TO GROUND.
Extending Reference Output Current
Oscillator Connections
V+
Cx'
R1
RX',..._ _ _ _ _ _-.
22{l
5.0V
UPTO 1A
'MAY BE REQUIRED WITH SOME TYPES OF
TRANSISTORS.
.,..
THE LOW SOURCE IMPEDANCE OF THE
OUTPUT DRIVERS PROVIDES RAPID CHARGING OF POWER FET INPUT CAPACITANCE,
WHILE MINIMIZING EXTERNAL COMPONENTS.
Error Amplifier Connections
R1
NEGATIVE
.---w....-_ OUTPUT
VOLTAGE
POSITIVE
......-w....-_ OUTPUT
VOUT=VREF(;)
VOUT=VREf (
R3= ( R1R2 )
R1+R2
R3-
R1~R2
VOLTAGE
)
(..B1B.L)
R1 +R2
5-111
III
LT1526/LT 3526
TYPICAL APPLICATions
LT1526 Lab Test Fixture
Vc
r
5F
"='
750
14
lT1526
C,
R,
Cs
13 OUTPUT A
16 OUTPUT B
12
8
rSHUTOOWN
l
Jl
EXTERNAL
SYNC
2N2369
510
PACKAGE DESCRIPTiOn
U
. j1j
0.200-0.32.11
11'i3i6T12iI
..Q.1!!!!..
I
J Package
18 Lead Ceramic DIP
0056±O.OO3
~~ ~~
~9S"S·+I0203-<>.3061
I[
"00
f4------(~:~:)-------i·1
(50B0)
MAX
MAX
f
(0.508-1718)
-.l
\.-(~:;~:~:~~)-.J
0.025
(0.635)
RAO
0.125
(3.175)
MIN
N Package
18 Lead Plastic DIP
f
.Q!§!.
(6.350)
L
O.009-0."'j
~
0.325 ~~:~~~
(8.255~~:=~)
5-112
I.- (2.540)
0.100
0.014-0023
~
TYP
jt
t
0.030-0060
(0762-1.524)
0.290
(7.366)
~~~rr.rr.~~~r.r~~
~"'9"'1InlJ\l2
....6...,
Ln846/l847. LT3846/3847
TECHNOLOGr.k'~-c-ur-re-n-t-M-o-d-e-P-W-M-C-o-n-tr-o-lIe-r
FEATURES
DESCRIPTion
• Automatic Feed-Forward Compensation
• Programmable PUlse-by-Pulse Current Limiting
• ± 1%Bandgap Reference
• Undervoltage Lockout
• External Shutdown
• Dual200mA Totem Pole Outputs
• Double Pulse Suppression
• Soft-8tart Capability
• Direct Replacement for UC1846, UC1847
The LT1846 family of control ICs contains all necessary
circuitry to implement fixed frequency, fixed output voltage, current mode control schemes. Current mode control
loops are easy to design and compensate, and provide
superior transient line regulation, inherent pulse-by-pulse
current limiting, and automatic symmetry correction for
push-pull converters. In addition, the LT1846 has built-in
undervoltage lockout with hysteresis to prevent oscillations near the threshold, soft-start capability, and can be
shut down instantaneously by an external logic level. Internallogic prevents double-pulsing and output overlap.
APPLICATions
• Switching Power Supplies
• Motor Speed Control
• Power Converters
The oscillator circuitry of the LT1846 allows the user to
adjust output deadtime as well as frequency and also provides a bidirectional sync pin to allow paralleling power
modules.
Both the internal error amplifier and current sense amplifiers operate over awide common-mode range to allow design flexibility. The dual outputs provide active pull up/pull . .
down, ideal for driving bipolar or FET switches. The in- S .
ternal reference regulator provides excellent stability for
changes in line, load, and temperature. The LT1846 outputs are low in the off state while the LT1847 outputs are
high in the off state.
1 - - - - - - - \ 2 VREF
I
11 AOUT
JlI
LT1846
OUTPUT STAGE
LT1847
)
( OUTPUTS
INVERTEO
14 BOUT
IL ___
COMP
I
I
I
I
III
I
I
_____ -1
12 GND
~
7J------'
CURRENT
LlMITH1j-------'
AOJUST
5-113
LT18461l847, LT3846/3847
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
(Note 1)
Supply Voltage (Pin 1S) ............................ +40V
Collector Supply Voltage (Pin 13) ................... +40V
Output Current, Source orSink(Pins 11, 14) ........ SOOmA
Analog Inputs (Pins 3, 4, S, 6, 16)........... - 0.3V to +VIN
Reference Output Current (Pin 2) ................. - 30mA
Sync Output Current (Pin 10) ...................... - SmA
Error Amplifier Output Current (Pin 7)............. - SmA
Soft Start Sink Current (Pin 1) ...................... SOmA
Oscillator Charging Current (Pin 9) .................. SmA
Operating Temperature Range
LT1846J1847 ....................... - SsoC to + 12SOC
LT3846J3847 ...................•.•...•.... OOC to 70°C
Power Dissipation at TA =2SoC (Note 2) ......... 1000mW
Power Dissipation at Tc =2SoC (Note 3) ......... 2000mW
Thermal ReSistance, Junction to Ambient ....... 1000 CIW
Thermal ReSistance, Junction to Case ............ 60 oCIW
Storage Temperature Range ........... - 6SoC to + 150°C
Lead Temperature (Soldering, 10sec) ............ + 300°C
ORDER PART
NUMBER
TOP VIEW
CURRi~:T~~~~:
1
VREF
2
LT1846J
LT1847J
LT3846J
LT3847J
LT3846N
LT3847N
(-) CURRENT SENSE 3
( +) CURRENT SENSE 4
(+)ERRORAMP
5
(-)ERRORAMP 6
COMPENSATION 7
J PACKAGE
16·LEAO CERAMIC OIP
N PACKAGE
16·LEAO PLASTIC DIP
ELECTRICAL CHARACTERISTICS (Note4)
PARAMETER
CONDITIONS
MIN
LT1846ILT1847
TYP
MAX
MIN
LT3846ILT3847
TYP
MAX
UNITS
Reference Voltage
Output Voltage
Line Regulation
Load Regulation
Temperature Stability
Total Output Variation
Output Noise Voltage
Long Term Stability
Short Circuit Output Current
Tj = 25°C, 10 = 1mA
VIN = 8V to 40V
IL = 1mA to 10mA
Over Operating Range, (Note 5)
Line, Load, and Temperature (Note 5)
10Hz :s f :s 10kHz, TI = 25°C (Note 5)
Tj = 125°C, 1000Hrs., (Note 5)
VREF = OV
Oscillator Section
Initial Accuracy
Voltage Accuracy
Temperature Stability
Sync Output High Level
Sync Output Low Level
Sync Input High Level
Sync Input Low Level
Sync Input Current
ElfOr Amp Section
Input Offset Voltage
Input Bias Current
Input Offset Current
Common-Mode Range
5-114
T, = 25°C
VIN = 8V to 40V
Over Operating Range (Note 5)
PinS = OV
Pin8 = OV
Sync Voltage = 5.25V, Pin 8 = OV
VIN = 8Vto 40V
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
5.05
5.10
5
3
0.4
5.00
5.15
20
15
5.00
5.20
4.95
-10
-45
39
43
-1
-1
4.35
2.3
3.0
3.0
0.7
47
±2
0.5
-0.6
40
5
-1
250
VIN-2V
3.9
0
5.20
20
15
5.25
100
5
100
5
3.9
5.10
5
3
0.4
-10
39
3.9
2.5
3.9
2.5
1.5
0
V
. mV
mV
mVloC
V
~V
mV
mA
-45
43
-1
-1
4.35
2.3
3.0
3.0
0.7
47
±2
0.5
-0.6
40
10
-2
250
VIN -2V
2.5
2.5
1.5
kHz
%
%
V
V
V
V
mA
mV
~
nA
V
LT1846/1847, LT3846/3847
ELECTRICAL CHARACTERISTICS (Note 4)
PARAMETER
Error Amp Section (Cont.)
Open Loop Voltage Gain
Unity Gain Bandwidth
CMRR
PSRR
Output Sink Current
Output Source Current
High Level Output Voltage
Low Level Output Voltage
CuRtn! Sense Amplifier Section
Amplifier Gain
Maximum Differential
Input Signal (VPin 4 - VPin ~
Input Offset Voltage
CMRR
PSRR
Input Bias Current
Input Offset Current
Input Common·Mode Range
Delay to Outputs
Current limit Adjust Section
Current Limit Offset
Input Bias Current
Shutdown Tenninal Section
Threshold Voltage
Input Voltage Range
Minimum Latching Current
(l pin1 )
Maximum Non·Latching
(IPinl)
Delay to Outputs
Output Section
Coliector·Emitter Voltage
Collector Leakage Current
Output Low Level
Output High Level
Rise Time
Fall Time
Undervoltage Lockout Section
Start·Up Threshold
Threshold Hysteresis
ToIal Standby CuRtnt
Supply Current
~7~
LTI8461LT1847
CONDITIONS
INo = 1.2Vt03V
VCM = OV to 3BV, VIN = 40V
VIN = 8V to 40V
VID = -15mVto -5V, VPln7 = 1.2V
VID = 15mVt05V, VPin7 = 2.5V
RdPin 7) = 15kll
RdPin 7) = 15k!)
VPin 3 = OV, Pin 1Open (Notes 6 &7)
Pin 1Open (Note 6)
RdPin 7) = 15kll
VPln1 = 0.5V
Pin 7 Open (Note 6)
VCM = 1V to 12V
VIN = 8V to 40V
VPin 1 = 0.5V, Pin 7 Open (Note 6)
VPin 1 = 0.5V, Pin 7 Open (Note 6)
Tj = 25°C, (Note 5)
VPin3 = OV
VPln 4 = OV, Pin 7Open (Note 6)
VPln5 = VREF, VPln6 = OV
(Note B)
(Note 9)
MIN
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
SO
0.7
75
80
2
-0.4
4.3
2.5
1.1
60
60
(Note 11)
•
•
•
•
•
•
1·1
105
1.0
100
105
6
-0.5
4.6
0.7
0.45
1
5
25
83
84
-2.5
O.OB
200
0.5
0.55
400
VIN
1.5
TYP
105
1.0
100
105
6
-0.5
4.6
0.7
0.45
1
UNITS
dB
MHz
dB
dB
rnA
rnA
V
V
3
VIV
V
5
25
mV
83
84
-2.5
0.08
dB
dB
~A
200
-10
1
VIN-3
500
pA
V
ns
0.5
0.55
V
-10
250
0
3.0
MAX
2.B
1.2
0
-30
350
-30
400
~A
VIN
mV
V
rnA
1.5
1.5
0.8
1.5
O.B
rnA
300
600
300
600
ns
40
13
12
2.5
1.1
60
60
-10
1
VIN-3
500
350
LT3846/LT3847
MIN
BO
0.7
75
SO
2
-0.4
4.3
3
-10
250
0
3.0
MAX
2.8
1.2
0
(Note 5), Tj= 25°C
Vc = 40V (Note 10)
ISINK = 20mA
ISINK = loomA
ISOURCE = 20mA
ISOURCE = 100mA
(Note 5), CL = lnF, TI = 25°C
(Note5),CL = lnF,Tj = 25°C
TYP
40
0.1
0.4
13.5
13.5
50
50
200
0.4
2.1
13
12
300
300
0.1
0.4
13.5
13.5
50
50
200
0.4
2.1
V
pA
V
V
300
300
ns
ns
7.7
0.75
8.0
7.7
0.75
8.0
V
V
17
21
17
21
rnA
5-115
Ln846/1847, LT3846/3847
The. denotes the specifications that apply over the full operating tern·
perature range.
Note1: All voltages are with respect to Ground, pin 12. Currents are posi·
tive into, negative out of the specified terminal.
Note 2: Derate at 1OmW/·C for TAabove 50·C.
Note 3: Derate at 16mW/·C for Tc above 25·C.
Note4: UniessotherwisestatedV1N 15V, RT 10k,CT 4.7nF.
Note 5: These parameters, although guaranteed over the recommended
operating conditions are not 100% tested in production.
Note 6: Parameter measured at trip pOint of latch with VPln5 VREF,
VPln'6 = OV.
=
=
Note 7: Amplifier gain defined as
G = .1VPin7;.1VPln4 = OVtoloOV
.1VPin4
Note 8: Current into pin 1guaranteed to latch circuit in shutdown state.
Note 9. Current into pin 1guaranteed not to latch circuit in shutdown state.
Note10: Applies to LT184613846 only due to polarity of outputs.
Note11: Standby currrent does not include oscillator charging current, er·
ror and current limit dividers, and the outputs are open circuit.
=
=
TYPICAL PERFORmAnCE CHARACTERISTICS
Reference Voltage vs
Temperature
Standby Current vs V,N
!
20
18
16
14
j
-
T);25 JC
II
I/IJ
112
~
l!iz
t;i
6
o
~
!il5.110
§; 5.100
l"- t"'-..
r-......
.......
i5
m5,090
I
I
0
10
~
J
125 d
Tj
1-1""- r- CL"l000pF-
12
5,120
':;
10
Output Rise and Fall Time
1\
1
j
f'
5.030
j
1
11
t"'-.. 1"-
II
J
o 5 10 15 20 25
30
35
40
-75 -50 -25
Output High Level Saturation
Voltage vs Output Source
Current
~
'Tj;125°C
2
1/
TIME (SOns/DIV)
Error Amp Open. Loop DC Gain
vs Load Resistance
.J,....oo
I I I' J.I I' nJ.-
I-
-
25 50 75 100 125 150
Output Low Level Saturation
Voltage vs Output Sink Current
Tj- 55°C
rr;-25lC
0
TEMPERATURE (OC)
VIN (V)
Tj; -55'C
I-
l- I- t 1
1/,
5-116
40 00 30 100g0~0100100200
OUTPUT SOURCE CURRENT (rnA)
o ~ P"
o
~
~100
z
Tj;25°C
§;
100
1/ f-""
~
w
~
~ 80
o
200
L
90
§
AV
OUTPUT SINK CURRENT (rnA)
vl~;2bv
r-Tj;25°C
~ ~1251oc
I
LV
o
o ro
110
70
I
~=
RL
I
o 10 20 30
-
40 so 60 70 80 90
OUTPUT LOAD RESISTANCE, RL (k!l)
100
LT1846/1847, LT3846/3847
TYPICAL PERFORmAnCE CHARACTERISTICS
Oscillator Frequency vs
Temperature
6
r-
:E~PER~TUR~
40
~
600
COJFFICiENT
OF RT. CT=O
.,
Current Limit Offset vs
Temperature
Reference Current Limit
_
~d:FtosJ~
::;::.. ~
g
30
/
f-
~
~
20
'/
'-'
!=;
[;
o
r-.... .......
V
r--."
REFERENCE
REGULATOR
T
-4
CJ
80
r'\
'" '"
3
0
1
MIN
-+-(~~~=~~~)
0325~~·~1t
ejA
150'C
100'CIW
ejC
rJ(J'CIW
LT3846
LT3847
105'C
100'CIW
6O'C/W
NPackage
16·Lead Plastic DIP
.
J
Tjmax
LT1846
LT1847
L
0.065
(\~')
~[:'!""------+t-""--1
t
t
n
0220-0.310
(5588-7847)
0.025
(0635j
::§t::::::1
I'
ono
'I
SECTion 6-comPARATORS
6-1
INDEX
SECTION 6-COMPARATORS
INDEX .... ...................................................................................... ,. ..........
SELECTION GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PROPRIETARY PRODUCTS
LT685, High Speed Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . .
LT1011, Voltage Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTt015, High Speed DualLine Receiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . .. . . .. . . .. . .. . . .. . . .. . . . . . . . ...
LTt016, Ultra Fast Precision Comparator ..... ..................................... ........ ....... ........ ..........
LTt016CSB, Ultra Fast Precision Comparator. . . . . .. . . . . . . . . . .. . .. . . . . . .. . . . . . . . . . . . . . .. . . .. . . . . . . . . . . . . . . . . . . . . . . . ..
LT1017, MicropowerDuaIComparator.......................... ...................... ........... ..................
LTt01B, Micropower Dual Comparator .. ......................................................... ..... .............
LTt017CSILTt01BCS, MicropowerDualComparator .. ............................................. ..................
LTC1040, Dual Micropower Comparator . ........................................................................ '"
LTC1041, BANG-BANG Controller .............................................................. ..................
LTC1042, Window Comparator ..... ......... . ....... .... ....... ... ... ... ... .. .... .... ... . ... .. .. ... . ... . .. .. ....
ENHANCED AND SECOND SOURCE PRODUCTS
LM111/LM311, Voltage Comparator ..............................................................................
LTt11 AIL T311 A. Improved LM 111. . . . .. . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LM119/LM319, Dual Comparator ................................................................................
LT119AILT319A,'mprovedLM119.......................................... ....... ....... ..... ....... ...........
6-2
6-2
6-3
6-5
6-9
13-6
6-25
6-41
6-45
6-45
6-53
6-57
6-69
6-77
6-85
6-85
6-93
6-93
LTYD~r--
____
C_O_M_P._'A_RA_J_O_R_S_EL_EC_T_IO_N_G_U_ID_E
mlLlTAAY
PART NUMBER
LT10llAM
LT10llM
LT1016M
RESPONSE
TIME
MAX
(ns)
250
250
12
LT1017M
LT1018M
-
LTlllA
LMlll
LTl19A
LMl19
LTC1040M
LTC1041M
LTC1042M
LT685M
250
-
80 (typ)
80 (typ)
l00jLS
100jLS
l00jLS
6.5
Vos
MAX
(mY)
0.5
1.5
±2.5
Is
MAX
(nA)
DRIVE
CAPABILITY
(mA)
25
50
10000
50
50
10
1
1
15
75
30
1.0
3.0
1.0
4.0
0.5
0.5
1.0
±2.0
100
100
500
500
3
0.3
3
10000
50
50
·
·
Vos
MAX
(mY)
0.5
0.5
±2.5
GAIN
MIN
(VJmY)
200
200
2
ISUPPLY
POSITIVE
(mA)
4.0
4.0
35
ISUPPLY
NEGATIVE
(mA)
2.5
2.5
5
1000
1000
0.060
0.250
-
200
t
4.0
6.0
11.5
11.5
300nA' •
2.5
5.0
4.5
4.5
lnA
t
3
300nA' •
tt
1.6typ
22
Is
MAX
(nA)
DRIVE
CAPABILITY
(mA)
GAIN
MIN
(VJmY)
ISUPPLY
POSITIVE
(mA)
25
50
10000
50
50
10
200
200
2
4.0
4.0
35
1
1
15
75
30
35
1000
1000
0.060
0.250
-
1.0
7.5
1.0
8.0
0.5
0.5
1.0
±2.0
100
250
500
1000
3
0.3
3
10000
50
50
25
25
200
4.0
7.5
12.5
12.5
300nA * *
2.5
5.0
5.0
5.0
lnA
3
300nA' •
22
lnA
26
35
25
40
20
10
10
-
25
-
PACKAGES
AVAILABLE
H,J8
H,J8
H,J8
H,J8
H,J8
lnA
26
H,J8
H,J8
H,J
H,J
J
J8, N8
J8
H,J
ISUPPLY
NEGATIVE
(mA)
2.5
2.5
5
PACKAGES
AVAILABLE
H,J8, N8
H,J8,N8
H, J8, S8
-
IMPORTANT FEATURES
LowVos, Low Ie, High Output Drive,
12 Bit Acc.
Ultra High Speed, TTL Outputs, True
Output Latch, Stable in Active Region,
PinJPin Replacement for AM686.
LT1017 Has Lowest Supply Current,
LT1018 is Faster. Both are Dual
Comparators with Same Pin-Out as 193
Types.
Low Vos, High Gain
General Purpose
Dual, LowVos, Hi CMRR
Dual, General Purpose
CMOS Sampling Comparator
CMOS Bang-Bang Controller
CMOS Window Comparator
Ultra High Speed, ECL Outputs, Output
Latch, External Hysteresis Control
commEACIAl
PART NUMBER
LT10llAC
LT10llC
LT1016C
LT1017C
LT1018C
LT311A
LM311
LT319A
LM319
LTC1040C
LTC1041C
LTC1042C
LT685C
RESPONSE
TIME
MAX
(ns)
250
250
12
-
250
80 (typ)
80 (typ)
l00jLS
l00jLS
100~s
6.5
·
·
tt
10
40
20
8
t
t
1.6typ
-
-
I
H,S
H,S
H,J8
H,J8
H,J,N
H,J, N
J,N,S
J8,N8
J, N8
H,J,N
IMPORTANT FEATURES
LowVos, Low Ie, High Output Drive, 12
Bit Acc.
Ultra High Speed, TTL Outputs, True
Output Latch, Stable in Active Region,
PinJPin Replacement for AM686.
LT1017 Has Lowest Supply Current,
LT1018 is Faster. Both are Dual
Comparators with Same Pin-Out as 193
Types.
Low Vas' High Gain
General Purpose
Dual, Low Vas, Hi CMRR
Dual, General Purpose
CMOS Sampling Comparator
CMOS Bang·Bang Controller
CMOS Window Comparator
Ultra High Speed, ECL Outputs, Output
Latch, External Hysteresis Control
• 1Std. TTL Load .
•• Supply Current Depends on Clock Rate.
t Gain errors are included in Vas spec.
tt Can drive terminated 500 transmission lines.
6-3
NOTES
6-4
L7YD~~k>~---H-i9-h-S-p-e-e-d-c-o-m-pa-L;-:-t~-~
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
The LT685 is an ultra-fast comparator with differential inputs and complementary outputs fully compatible with
ECL logic levels. The output current capability is adequate
for driving transmission lines terminated in 50n. The low
input offset and high resolution make this comparator
ideally suited for analog-to-digital signal processing
applications.
Ultra Fast (5.5ns typ)
Complementary ECL Output
50n Line Driving Capability
Low Offset Voltage
Output Latch Capability
External Hysteresis Control
Pin Compatible with Am685
APPLICATions
• High Speed Ato DConverters
• High Speed Sampling Circuits
• Oscillators
A latch function is provided to allow the comparator to be
used in a sample-hold mode. When the latch enable input
is ECL high, the comparator functions normally. When the
latch enable is driven low, the comparator outputs are
locked in their existing logical states. If the latch function
is not used, the latch enable must be connected to ground
or ECLhigh.
The device is pin-compatible with the Am685. Hysteresis
has been added to improve switching time with slow input
signals as well as to minimize oscillation. Asingle resistor
between the hysteresis pin and V- adds input hysteresis
voltage as more current is drawn. If hysteresis is not required, the pin can be left unconnected.
TYPICAL APPLICATiOn
Hysteresis
Comparator with Hysteresis
100
6V
HYSTERESIS IS ZERO
IF PIN LEFT OPEN
""""'_ _ _-IQ
~-_._+-ai
~
LATCH
ENABLE
-S.2V
1
100
200
SOD
1k
2k
RESISTANCE (0)
5k
10k
6-5
..
~
LT685
ABSOl.UTE mAXimum RATinGS PACKAGE/ORDER InFORmATion
Positive Supply Voltage .............................. 7V
Negative Supply Voltage ........................... - 7V
Input Voltage ...................................... ± 4V
Differential Input Voltage .......................... ± 6V
Latch Pin Voltage ............................. 2V to VHysteresis Pin Voltage .......................... OV toVOutput Current. ................................... 30mA
Power Dissipation (Note 1) ......................500mW
Operating Temperature
LT685C ............................ -30oCsTAS85°C
LT685M .......................... - 55°C sTAS 125°C
TOP VIEW
GND #1
ORDER PART
NUMBER
INVE::J~~~ 3
7
LT685CH
LT685MH
a OUTPUT
H PACKAGE
TO'5 METAL CAN
TOP VIEW
GND #1
1
V+
NON·INVERTING
INPUT
INVERTING INPUT
2
4
LATCH
ENABLE
NC
7
LT685CJ
LT685CN
LT685MJ
9
J PACKAGE
HERMETIC DIP
HYSTERESIS
N PACKAGE
MOLDED DIP
El.ECTRICAl. CHARACTERISTICS
V+=a.DV, V- = - 5.2V, VT = - 2.0V, RL =500, R=co over the operating temperature ranges, unless otherwise specified.
Vos
PARAMETER
Input Offset Voltage
TA=25°C
LT685C
TYP
1.0
dVosIdT
los
Input Offset Voltage Drift
Input Offset Current
(Note 2)
TA=25°C
0.3
18
Input Bias Current
TA=25°C
5
RIN
CIN
VCM
CMRR
SVRR
VOH
Input Resistance
Input Capacitance
Input Voltage Range
Common·Mode Rejection
Supply Voltage Rejection
Output High Voltage
TA= 25°C (Note 2)
TA= 25°C (Note 2)
VOL
Output Low Voltage
1+
1-
Positive Supply Current
Negative Supply Current
Power Dissipation
SYMBOL
PDISS
6-6
CONDITIONS
TA=25°C
TA=TMIN
TA=TMAX
TA=25°C
TA=TMIN
TA=TMAX
MIN
MAX
±2.0
±2.5
±10
±1.0
±1.3
10
13
MIN
dO
. 0.3
5
±10
±1.0
±1.6
10
16
6.0
6.0
3.0
±3.3
60
70
-0.960
-1.060
-0.890
-1.850
-1.890
-1.825
LT6BSM
TYP
MAX
1.0 ±2.0
-0.810
-0.890
-0.700
-1.650
-1.675
-1.625
22
26
300
3.0
±3.3
60
70
-0.960
-1.100
-0.850
-1.850
-1.910
-1.810
-0.810
-0.920
-0.620
-1.650
-1.690
-1.575
22
26
300
UNITS
mV
mV
~V/oC
p.A
p.A
p.A
p.A
kll
pF
V
dB
dB
V
V
V
V
V
V
mA
mA
mW
LT685
SWITCHING CHARACTE RISTICS (VIN =100mV step, 5mVoverdrive)
SYMBOL
PARAMETER
Propagation Delay (Note 3)
CONDITIONS
TA=25°e
TA=TMAX
TA=TMIN
Latch Enable to
TA=25°e
tpOIE)
Output Delay (Note 2)
TA=TMAX
TA=TMIN
Minimum Set·Up lime (Note 2)
TMINSTAS25°e
ts
TA=TMAX
Minimum Hold Time (Note 2)
tH
TMINSTASTMAX
Minimum Latch Enable
TMINSTAS25°e
tpwlE)
Pulse Width (Note 2)
TA = TMAX
Nole 1: For the metal can package, derate at 6.BmW/oe for operation at
ambient temperatures above +100°C; for the hermetic dual·in·line
package, derate at9mW/oe for operation at ambient temperatures above
+ 105°e.
Nole 2: Guaranteed by design, but not tested.
Nole 3: Sample tested at 25°C only.
Definitions:
IpD: The propagation delay measured from the time the input signal crosses
the input offset voltage to the 50% point of the output transition.
tpo
MIN
4.5
5.0
4.0
4.5
5.0
4.0
LT685C
TYP
5.5
5.5
MAX
6.5
9.5
6.5
6.5
9.5
6.5
3.0
4.0
1.0
3.0
4.0
LT685M
TYP
5.5
MIN
4.5
5.5
3.5
4.5
5.5
3.5
5.5
MAX
6.5
12
6.5
6.5
12
6.5
3.0
6.0
1.0
3.0
5.0
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tPDIE): The propagation delay measured from the 50% point of the latch en·
able signal positive transition to the 50% pOint of the output transition.
Is: The minimum time before the negative transition of the latch enable
signal that an input Signal change must be present in order to be acquired
and held at the outputs.
IH: The minimum time after the negative transition of the latch enable
signal that the input signal must remain unchanged in order to be acquired
and held at the outputs.
IpWIE): The minimum time that the latch enable signal must be HIGH in
order to acquire and hold an input signal change.
SCHEmATIC DIAGRAm
GND#2
NON·INV
INPUT
08
R7
275[1
GND#l
R8
275t!
INV
INPUT
t--I-{
023
E~~~~ - - - t - - ;
cr
0
OUTPUT OUTPUT
HYSTERESIS
6-7
LT685
TYPICAL PERFORmAnCE CHARACTERISTICS
Hysteresis as aFunction of
Temperature
Propagation Delays as aFunction
of Temperature
12
100
90
10
80
L
,/
./
- -
Voo=5mV,
.,..
ot" /
-';.
...-
Voo 2.5mV
Voo-20mV
!en
I
iii
ffi
50
Ii; 40
?c
30
20
/
FfVOrl0nr
2
-50 -25 0
25
50
75
TEMPERATURE ('C)
70
10
o
100
125
R=2000.......
60
.".,.
- -
.".,.
...-
-50 -25
0
25
R-~
~
50
R-1ko.=
75
100
125
TEMPERATURE ('C)
PACKAGE DESCRIPTiOn
Dimensions in inches (millimeters) unless otherwise noted.
HPackage
10 Lead TO·5 Metal can
~::i~{~:
0.040
(1O'i'6)
MAX
SEAlING
PLANE
0.050
(1T7Oj
0.165-0.185
_~==~~~~u.;U;Ui~~MAA~~~14~.19;'_t4~.699;)~
t
t ~~ENCE
GAUGE
PLANE
0.500-0.750
00 0 on'!=____l'_'.70.. L,19 05)
l::~=:~:)
--J I-l:::L:~)
TV'
NOTE'
1. lEAD DIAMETER IS UNCONTROu.ED BETYJEEN THE REFERENCE PLANE AND SEAnNG PLANE.
J Package
16 Lead Cerdip
~;~)-{f.MIN
0025
(0635)
TVP
D.290-032O
(7.37-813)
"60
NPackage
16 Lead Molded DIP
o~
o ..
(21336)
MAA
15
14
13
12
11
10
9
n
I'
(19.S58)
0770
'I
0220-0.310
~
(4064)
0065
MAX
(1.851)
TVP
r:'!""'""----t+--,J
f
6-8
~"""'LlnlJ\l2
~~
LTlOll/LTlOllA
TBCHNOLOGr.~~-------V-o-lt-a-g-e-C-o-m-p-a--ra-to-r
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
•
The LT1 011 is a general purpose comparator with significantly better input characteristics than the LM 111.
Although pin-compatible with the LM 111, it offers four
times lower bias current, six times lower offset voltage,
and five times higher voltage gain. Offset voltage drift-a
previously unspecified parameter-is guaranteed at
15/LV/oC. Additionally, the supply current is lower by a
factor of two with no loss in speed. The LT1 011 is several
times faster than the LM 111 when subjected to large
overdrive conditions. It is also fully specified for DC
parameters and response time when operating on a
single + 5V supply. These parametric improvements
allow the LT1 011 to be used in high accuracy ( ~ 12-bit)
systems without trimming. In a 12-bit A to Dapplication,
for instance, using a 2mA DAC, the offset error introduced by the LT1011 is less than 1/2 LSB. The LT1011
retains all the versatile features of the LM 111, including
single 3V to ::I:: 18V supply operation, and a floating transistor output with 50mA source/sink capability. It can
drive loads referenced to ground, negative supply or
positive supply, and is specified up to 50V between V- . .
and the collector output. A differential input voltage up to . . .
the full supply voltage is allowed, even with ::I:: 18V supplies, enabling the inputs to be clamped to the supplies
with simple diode clamps.
Pin-Compatible with LM111 Series Devices
Guaranteed Max. 0.5mV Input Offset Voltage
Guaranteed Max. 25nA Input Bias Current
Guaranteed Max. 3nA Input Offset Current
Guaranteed Max. 250ns Response Time
Guaranteed Min. 200,000 Voltage Gain
50mA Output Current Source or Sink
::I::30V Differential Input Voltage
Fully Specified for Single + 5V Operation
APPLICATions
•
•
•
•
•
•
•
SAR A to D Converters
Voltage to Frequency Converters
Precision R/C Oscillator
Peak Detector
Motor Speed Control
Pulse Generator
Relay / Lamp Driver
1DILl 12-Bit A-O Converter
3.9k
Rl
r--"-~LMM329""'+15V
FULL-S~~
7V
Response Time vs Overdrive
TRIM
R2"
6.49k
+15V
20
-15V
R3
6.981<
14
0.001
INPUT
OV-l0V
15
I
-
01 A CONVERTER
12 11 10 9 8
7 6
~Rf~~~~ ~~I:t..J
5
400
~ 200
L.~~t::
t::
4 5 6 7 8 9 16;t.,o;-17':":;'18!:;:,9+':2:::t
0 2::-'-0
+5V
450
i 350
~300
'"~ 250
601212-81T
13
500
~ 150
FALLING OUTPUT
50
0.1
24
AM2504
SAR REGISTER
........."......-;---"i----"i-'
START
..L7~
11111
I~I
r-~ISI~ !bU+~
100
o
I
I
rf fftIif
I
11111
I
11111
1.0
10
OVERDRIVE (mY)
100
"R2 AND R4 SHOULD TC TRACK
CLOCKf=1.4MHz
6-9
LT10ll/LT10llA
A8S0LUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Supply Voltage (pin 8 to pin 4) . . . . . . . . . . . . . . . . 36V
Output to Negative Supply (pin 7 to pin 4)
LT1011AM, LT1011M .... '" . '" ......... 50V
LT1011AC, LT1011C ..................... 40V
Ground to Negative Supply
(pin 1topin4) ......................... 30V
Differential Input Voltage .................. ±:36V
Voltage at Strobe Pin (pin 6 to pin 8) . . . . . . . . . . . . . 5V
Input Voltage (Note 1) ............ Equal to Supplies
Output Short Circuit Duration .............. 10 sec.
Operating Temperature Range (Note 2)
LT1011AM/LT1011M .......... -55°Ct0125°C
LT1011AC/LT1011C .............. 0°Ct070°C
Storage Temperature Range ....... -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ........ 300°C
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
Input Offset Voltage
Vos
* Input Offset Voltage
Rs ::s50kO (Note 4)
los
* Input Offset Current
Note 4
Ib
Ib
Input Bias Current
* Input Bias Current
Note 3
Note 4
Input Offset Voltage Drift
(Note 5)
* Large Signal Voltage Gain
TMIN::sT::sT MAX
-----xrAVOL
CMRR
Td
VOL
Common·Mode Rejection Ratio
* Input Voltage Range
(Note 8)
... Response Time
*Output Saturation Voltage
*Output Leakage Current
* Positive Supply Current
* Negative Supply Current
* Strobe Current
Input Capacitance
ORDER PART
NUMBER
v+
vH PACKAGE
TO'S METAL CAN
TOP VIEW
LT1011AMJ8
LT1011MJ8
LT1011ACJ8
LT1011CJ8
LT1011ACN8
LT1011CN8
NOTE PIN 4 CONNECTEO TO CASE.
JB PACKAGE B PIN CEROIP
NB PACKAGE B PIN PLASTIC
Vs= ±15V, VCM=OV, Rs=O, TJ=25°C, VI= -15V,
output at pin 7 unless otherwise noted.
LTtOl1AM/LT1011AC
MIN
TYP
MAX
Note 3
•
Minimum to Ensure Output
Transistor is Off
0.2
•
15
20
•
•
RL=lkOto +15V,
-10V::sVOUT ::s14.5V
RL =5000 to +5V,
0.5V ::sVOUT ::s4.5V
Vs=±15V
Vs=Single +5V
Note 6
VIN =5 mV, ISINK=8mA
VI=0,ISINK=50mA
VIN=5mV, Vl = -15V
VouT =35V (25V for LT10llC)
0.3
•
••
LT1011M/LT1011C
MIN
TYP
MAX
0.5
1.0
0.75
1.5
3
5
25
35
0.6
0.2
20
25
50
4
15
4
1.5
3.0
2.0
3.0
4
6
50
65
80
25
UNITS
mV
mV
mV
mV
nA
nA
nA
nA
nA
p.V/oC
200
500
200
500
V/mV
50
300
50
300
V/mV
94
-14.5
0.5
115
90
-14.5
0.5
115
150
0.25
0.7
0.2
••
•
3.2
1.7
13
3.0
250
0.4
1.5
10
500
4.0
2.5
500
13
3.0
150
0.25
0.7
0.2
3.2
1.7
500
6
*Indicates parameters which are .guarantee'!."'r 3\! .upply v~tages,'jncluding a single 5V supply. See Note 4.
6-10
LT1011AMH
LT1011MH
LT1011ACH
LT1011CH
6 BALANCE/
STROBE
CONDITIONS
Vos
AVos
TOP VIEW
250
0.4
1.5
10
500
4.0
2.5
dB
V
V
ns
V
V
nA
nA
rnA
rnA
p.A
6
pF
LT10ll/LT10llA
The. denotes the specifications which apply over the full operating
temperature range.
Nota 1: Inputs may be clamped to supplies with diodes so that maxImum input voltage actually exceeds supply voltage by one diode drop.
See Input Protection in applications section.
Nota 2: TJ max = t50°C for the LT10llAM/LT1011M and 95°C for
the LT1011AC/LT1011C.
Nota 3: Output is sinking 1.5mA with VOUT=OV.
Nota 4: These specifications apply for all supply voltages from a single
+ 5V to ± 15V, the entire input voltage range, and for both high and
low output states. The high state is ISINK",100,.A, VOUT",(V+ -tv)
and the low state is ISINKsSmA, VOUTSO.SV. Therefore, this
specification defines a worst-case error band that includes effects due
to common-mode Signals, voltage gain, and output load.
Nate 5: Drift is calculated by dividing the offset voltage difference
measured at min and max temperatures by the temperature difference.
Nota 6: Response time is measured with a 100mV step and 5mVoverdrive. The output load is a 5000 resistor tied to + 5V. Time measurement is taken when the output crosses 1.4V.
Nota 7: Do not short the strobe pin to ground. It should be current
driven at 3mA to 5mA for the shortest strobe time. Currents as low as
500,.A will strobe the LT111A if speed is not important. External
leakage on the strobe pin in excess of 0.2,.A when the strobe is "off"
can cause offset voltage shifts.
Nate 8: See graph, Input Offset Voltage vs Common-Mode Voltage.
TYPICAL PERFORmAnCE CHARACTERISTICS
Input Offset Current
Input Bias Current
45
40
0.8
Ib kow~ OUT 10F
35 -INPUTS
~ 0.6
;:: 0.5
15
g§ 0.4
20
" \,
15
a
\
10
D
0.3
Input Characteristics·
-0.5
"EITHER INPUT.
-5 r- REMAINING INPUT GROUNDED. - rCURRENT FLOWS OUT OF INPUT._ !-10
vs= ",15V.
~ -15
~
-25
-30
~-1.0
w
~-1.5
~ -2
~
_1'\
~ 0.4
:2:
~ 0.3
'"""
~
-20 -15 -10 -5 0 5 10
INPUT VOLTAGE (V)
0
-
FLT1011AM. LT1011AC
v
f-,.
25 so 75 100 125 1SO
TEMPERATURE (OC)
8 0.2
0.1
15
20
v-
llill
III
J.1
IlIlllllI 111111111
10k
100k
SOURCE RESISTANCE (0)
1k
I I I
~SITIJE LlMIIT
C~LL~CT6R
40
OUTPUT
AL=lk
I
1"1
I I I
T
1\
REFERRED TO SUPPLIES
I I I
-so -25 0 25 so 75 100 125 1SO
TEMPERATURE (OC)
-0.5
EMITIEA
IOUTPUT
RL =6000 r-
\
-0.3
-0.1
25°C
I I
10
a
I
rIr-
1I
V
jGATIlELIMiT
I I I
1M
Transfer Function (Gain)
50
2
-35
-40
r--...
Common-Mode limits
v+
('r"""
.......
a
-so -25
V
-LT1011M. LT1011C
0.1
TEMPERATURE (OC)
5
\
0.2
-so -25 0 25 50 75 100 125 150
'"
'"
i3 -20
III
LM311 (FOR COMPARISON)
0.7
! ::
Ia
Worst-Case Offset Error
100
0.9
a
0.1
0.3
0.5
DIFFERENTIAL INPUT WLTAGE (mY)
6-11
LT10ll/LT10llA
TYPICAL PERFORmAnCE CHARACTERISTICS
Response TimeCollector Output
OV~RD~IVE
20mV
-r--5mV
2mV
Response TlmeCollector Output
I I
I!J
11
M
1 1_:_ -
VIN- _
~H~
_
+
...
INPUT ~ 1OOmV' STEIl
o
...
I-
TI
I I
~
0
1'/
>" -5
oS -10
III -15
::>
~
g
v"
VOUT
0
~~100
1
..
0.4
o
I/"
r::r-5~oC
5101520253035404550
SINK CURRENT (mA)
50 100 150 200 250 300 350 400 450
TIME (ns)
Response Time Using GND Pin
as Output
III
~
g
15
10
\'
20mV
! -~
TA -1 25
;;!;
I
5mV~
2m~~
III
~
,
Output Limiting
Characteristics·
140
,l~
\-1
~=
VOUT
.".
l.~ -~
\ \ --.J
2'-
V-
Vs
~
0
i3
!=
I I
1
i
-
±i5V
60
(3
40
~en
\
"
./
1/
#'-"
I
0.1
'---~ AFTER SHORT
o
10
OUTPUT VOLTAGE (V)
15
Output Leakage Current
~Vs
+15V
/,<31). ~
?./
~~~
POSITIVE SUPPLY
COLLECTOR OUTPUT "LO"
POSITIVESUPPLY--
I"" r--.... ~LECTOR OUTPUT "LO"
I
-
o
o
6-12
r--.... rPOSITIVE AND NEGATIVE SUPPLY
COLLrTOR rTPUi"HI" I
o
10
15
20
25
SUPPLY VOLTAGE (V)
30
===+ ?~~~.
-~~L
.......
r-POSITIVE AND NEGATIVE SiPPLYi
COLLECTOR OUTPUT "HI"
1
-50-~
1
'j
1
0
~
50
n
TEMPERATURE (OC)
~
m
10- 11
25
45
2l
0.5 ~
65
85
105
TEMPERATURE (OC)
~
~
0.2 ~
CIRCUIT CURRENT
o
0.6
0.3
8if;j-9r~
f
0.7
0.4 ~
en
:/
~ "MEASURED 3 MIN
20
TIME(~S)
Supply Current vs Temperature
<;)~
1\
80
!i
~~I--
/J
100
o
4
2
TA~5~
~ 120
-
TAi25;C-
2
TIME(,.S)
Supply Current vs Supply
Voltage
.....
~V
~V
...
o
~)±l~V-
°f-
....· I y
'
0.1
INPUT ~ 100mV STEP
~ -10
-15
;5 100
~ 50
r-t-t-
.... -50
o
2k
J...
/JI~
....
.' ::..-
0.2
~
~i£W
':'
'J
~ 0.7
§! 0.6
~ 0.5
!;;: 0.3
100 mV
T - 125°.~
PIN 1 GROUNDED
~ 0.8
w
en
I I I I
/
0.9
~
5000
Response Time Using GND Pin
as Output
I
-15V'"
2mV--
50 100 150 200 250 300 350 400 450
TIME (ns)
20niv
I "
10 5mV
5
2mV
5000
.,r- +
I- OVERPRIVE- I1 - _ 2 : : : . 1-'"
1 1
VIN
~I
1.0
+15V
Vs~±15V
~
"
l00mV
Collector Output Saturation
Voltage
125
LT10ll/LT10llA
TYPICAL PERFORmAnCE CHARACTERISTICS
Output SaturatlonGround Output
Response Time vs Input Step
Size
Output Saturation Voltage
1000
0.6
~
0.5
~\
I~ TJ=~
........: f::::t ~
~
~
ISIJK=ajA
0.4
800
~
~
~ 600
........ TJJ25'C-'-
~
~ 0.3
o
~
r - -TJ
=> 0.2
~
r---c--
0.1
o
10
20
30
40
OUTPUT CURRENT (rnA)
50
o
2
3
4
5
6
2.0
_
~
w
~
UPPER COMMON· MODE
UMIT=V+-(1.5V) -
1.0
~ -0.5
......
o
~
-2.0
=
I-+---+--+-
2+
I
""I IJ-~r-
1--+-+-+++::.01-"9--1-H
.,..,r-I .1.
,/;;.;;' F~LUNh INPUT
200
1--1"""
~r-~I~I..I........I-Ia ---'---'
9 10
~ 0.2 fc;NGE IN Vas FOR CURRENT INTO PIN 5 OR 6
«
III
0
~
-150mV
-1.0
~ -1.5
~
;; 04
.
5
t'-...
~
tu
5000
7
--- -
~ 0.6
1.5
3 _
Offset Pin Characteristics
'1: o.a
0.5
INPUT
01234567
INPUT STEP (V)
INPUT OVERDRIVE (mV)
TJ=25'C
I I I I +5~I
RISING INPUT
o
o
Input Offset Voltage vs CommonMode Voltage
2.5
400
Vs= '" 15V
RL = 500II TO +5V
OVERDRIVE=5mV
""
'"
O~--~--~--~--~--~
~
~
~
55'C
t;>l
~.,.--.--r-~-r--'---r---"r-........,
-100mV
V-(OR GND WITH
SINGLE SUPPLY)
-2.5
V- 0.1 0.2 0.3 0.4 0.5 0.6 0.7
COMMON-MODE VOLTAGE (V)
f-- --VOLTAGE ON PINS 5 AND 6-WITH RESPECT TO V+
-50mV
V+
o
-50 -25
0
25 50
75 100
TEMPERATURE ('C)
-=
125 150
6-13
LT10ll/LT10llA
APPLICATions InFoRmATion
Preventing Oscillation Problems
Oscillation problems in comparators are nearly always
caused by stray capacitance between the output and inputs or between the output and other sensitive pins on the
comparator. This is especially true with high gain-bandwidth comparators like the LT1011, which are designed for
fast switching with millivolt input signal levels. The gainbandwidth product of the LT1 011 is over 10GHz. Oscillation problems tend to occur at frequencies around 5MHz,
where the LT1 011 has a gain of ... 2000. This implies that
attenuation of output signals must be at least 2000:1 at
5MHz as measured at the inputs. If the source impedance is 1kO, the effective stray capacitance between
output and input must have a reactance of more than
(2000) (1kO) =2MO, or less than 0.02pF. The actual interlead capacitance between input and output pins on the
LT1 011 is less than 0.002pF when cut to printed circuit
mount length. Additional stray capacitance due to printed
circuit traces must be minimized by routing the output
trace directly away from input lines and, if possible, running ground traces next to input traces to provide shielding. Additional steps to ensure oscillation-free operation
are:
1. Bypass the strobe/balance pins with a 0.01/LF
capacitor connected from pin 5 to pin 6. This eliminates stray capacitive feedback from the output to the
balance pins, which are nearly as sensitive as the
inputs.
2. Bypass the negative supply (pin 4) with a 0.1/LF
ceramic capacitor close to the comparator. 0.1/LF can
also be used for the positive supply (pin 8) if the pullup load is tied to a separate supply. When the pull-up
load is tied directly to pin 8, use a 2/LF solid tantalum
bypass capacitor.
3. Bypass any slow moving or DC input with a capacitor
(~0.01/LF) close to the comparator to reduce high
frequency source impedance.
4. Keep resistive source impedance as low as possible.
If a resistor is added in series with one input to bala~ce source impedances for DC accuracy, bypass it
With a capacitor. The low input bias current of the
6-14
LT1 011 usually eliminates any need for source resistance balancing. A 5kO imbalance, for instance, will
create only 0.25mV DC offset.
5. Use hysteresis. This consists of shifting the input offset voltage of the comparator when the output
changes state. Hysteresis forces the comparator to
move quickly through its linear region, eliminating
oscillations by "overdriving" the comparator under
all input conditions. Hysteresis may be either AC or
DC. AC techniques do not shift the apparent offset
voltage of the comparator, but require a minimum input signal slew rate to be effective. DC hysteresis
works for all input slew rates, but creates ashift in offset voltage dependent on the previous condition of the
input signal. The circuit shown below is an excellent
compromise between AC and DC hysteresis.
Comparator with Hysteresis
+15V
~---+-OUTPUT
This circuit is especially useful for general purpose
comparator applications because it does not force any
signals directly back onto the input signal source. Instead, it takes advantage of the unique properties of
the balance pins to provide extremely fast, clean output switching even with low frequency input signals
in the millivolt range. The 0.003/LF capacitor from pin
6 to pin 8 generates AC hysteresis because the voltage on the balance pins shifts slightly, depending on
the state of the output. Both pins move about 4mV. If
one pin (6) is bypassed, AC hysteresis is created. It is
only afew millivolts referred to the inputs, but is sufficient to switch the output at nearly the maximum
speed of which the comparator is capable. To prevent
LT10ll/LT10llA
APPLICATions InFoRmATion
problems from low values of input slew rate, a slight
amount of DC hysteresis is also used. The sensitivity
of the balance pins to current is about 0.5mV input
referred offset for each microampere of balance pin
current. The 15mO resistor tied from output to pin 5
generates 0.5mV DC hysteresis. The combination of
AC and DC hysteresis creates clean oscillation-free
switching with very small input errors. The curve
below plots input referred error versus switching frequency for the circuit as shown.
negative supply. In this condition, input current must be
limited to 1rnA. If very large (fault) input voltages must be
accommodated, series resistors and clamp diodes should
be used (see drawing below).
limiting Fault Input Currents
v+
R1"
INPUTS
{--'IIVv---+--+-..,.,..-i+
R2-
Input Offset Voltage vs Time to
Last Transition
vD1-04 1N4148
'MAY BE ELIMINATED FOR
IFAULT",1mA
-SELECT ACCORDING TO ALLOWABLE
FAULT CURRENT AND POWER
DISSIPATION
,
,
\
C8-6=0.003.F
II 11111
~
6u+p~V .1.I~b" TO "HI"
OUTPUT "HI" TO "LO"
-1
-2
1,.:;
(50kHz)
10,.:;
II
(5kHz)
100,.:;
II
1m,
TIME/FREQUENCY
Note that at low frequencies, the error is simply the DC
hysteresis, while at high frequencies, an additional
error is created by the AC hysteresis. The high frequency error can be reduced by reducing CH, but
lower values may not provide clean switching with
very low slew rate input signals.
Input Protection
The inputs to the LT1 011 are particularly suited to general
purpose comparator applications because large differential and / or common-mode voltages can be tolerated without damage to the comparator. Either or both inputs can
be raised 40V above the negative supply, independent of
the positive supply voltage. Internal forward biased
diodes will conduct when the inputs are taken below the
The input resistors should limit fault current to a
reasonable value (0.1mA to 20mA). Power dissipation in . .
the resistors must be considered for continuous faults, ~
especially when the LT1 011 supplies are off. And one
final caution: lightly loaded supplies may be forced to
higher voltages by large fault currents flowing through
D1-D4.
R3 and R4 limit input current to the LT1011 to less than
1mA when the input signals are held below V-. They
may be eliminated if R1 and R2 are large enough to limit
fault current to less than 1rnA.
Input Slaw Rate Limitations
The response time of a comparator is typically measured
with a 100mV step and a 5mV-10mV overdrive. Unfortunately, this does not simulate many real-world situations where the step size is typically much larger and
overdrive can be significantly less. In the case of the
LT1 011, step size is important because the slew rate of
internal nodes will limit response time for input step sizes
larger than 1V. At 5V step size, for instance, response
time increases from 150ns to 360ns. See the curve labeled Response Time vs Input Step Size for more detail.
6-15
LT10ll/LT10llA
APPLICATions InFoRmATion
If response time is critical and large input signals are
expected, clamp diodes across the inputs are recommended. The slew rate limitation can also affect performance when differential input voltage is low, but both
inputs must slew quickly. Maximum suggested commonmode slew rate is 1OV IpS.
Output Transistor
The LT1 011 output transistor is truly floating in the sense
that no current flows into or out of either the collector or
emitter when the transistor is in the "off" state. The
equivalent circuit is shown in the drawing below.
Strobing
The LT1011 can be strobed by pulling current out of the
strobe pin. The output transistor is forced to an "off"
state, giving a "hi" output at the collector (pin 7). Currents as low as 250~ will cause strobing, but at low
strobe currents strobe delay will be 200ns-300ns. If
strobe current is increased to 3mA, strobe delay drops to
about 60ns. The voltage at the strobe pin is about 150mV
below V+ at zero strobe current and about 2V below V+
for 3mA strobe current. Do not ground the strobe pin. It
must be current driven. The drawing below shows a
typical strobe circuit.
Typical Strobe Circuit
Output Transistor Circuitry
V+
......H-I~_-+--,... COLLECTOR (OUTPUT)
OUTPUT
TRANSISTOR
' - - _ " - ' EMITTER (GND PIN)
~-+-- OUTPUT
TTL OR
DRIVE (5V SUPPLY)
3k
Note that there is no bypass capacitor between pins 5
and 6. This maximizes strobe speed, but leaves the comparator more sensitive to oscillation problems for slow,
low level inputs. A 1pF capacitor between the output and
pin 5 will greatly reduce oscillation problems without
reducing strobe speed.
DC hysteresis can also be added by placing a resistor
from output to pin 5. See step number 5 under "Preventing Oscillation Problems".
The pin (6) used for strobing is also one of the offset adjust pins. Current flow into or out of pin 6 must be kept
very low «0.2~) when not strobing to prevent input
offset voltage shifts.
6-16
In the "off" state, 11 is switched off and both 01 and 02
turn off. The collector of 02 can be now held at any voltage above V- without conducting current, including voltages above the positive supply level. Maximum voltage
above V- is 50V for the LT1011 and 40V for the
LT1 011 C. The emitter can be held at any voltage between
V+ and V- as long as it is negative with respect to the
collector.
In the "on" state, 11 is connected, turning on 01 and 02.
Diodes D1 and D2 prevent deep saturation of 02 to improve speed and also limit the drive current of 01. The
R1 IR2 divider sets the saturation voltage of 02 and provides turn-off drive. Either the collector or emitter pin can
be held at a voltage between V+ and V- . This allows the
remaining pin to drive the load. In typical applications,
the emitter is connected to V- or ground and the collector
drives a load tied to V+ or a separate positive supply.
LT10ll/LT10llA
APPLICATions InFORmATion
When the emitter is used as the output, the collector is
typically tied to V+ and the load is connected to ground or
V- . Note that the emitter output is phase reversed with
respect to the collector output so that the ,. + " and
•• - " input designations must be reversed. When the
collector is tied to V+ , the voltage at the emitter in the
"on" state is about 2V below V+ (see curves).
Input Signal Range
fhe common-mode input voltage range of the LT1011 is
about 300mV above the negative supply and 1. 5V below
the positive supply, independent of the actual supply
voltages (see curve in typical performance characteristics). This is the voltage range over which the output will
respond correctly when the common-mode voltage is
applied to one input and ahigher or lower signal is applied
to the remaining input. If one input is inside the commonmode range and one is outside, the output will be correct.
If the inputs are outside the common-mode range in oppoSite directions, the output will still be correct. If both inputs are outside the common-mode range in the same
direction, the output will not respond to the differential input; it will remain unconditionally high (collector output).
TYPICAL APPLICATiOnS
Offset Balancing
Strobing
R2
3.0k
NOTE: 00 NOT GROUND STROBE PIN.
Driving Load Referenced
to Positive Supply
Driving Load Referenced
to Negative Supply
V+
v
INPUTS·
v+ + CAN BE GREATER OR LESS THAN V+
• INPUT POLARITY IS REVERSED WHEN
USING PIN 1AS OUTPUT
6-17
LT10ll/LT10llA
TYPICAL APPLICATions
Driving Ground Referred Load
Window Detector
OUTPUT HIGH
INSIDE "WINDOW"
AND LOW
ABOVE HIGH
LIMIT OR
BELOW LOW
LIMIT
"INPUT I'OlARllY IS REYERSED WHEN USING
PIN 1 AS OUTPUT
~Y++ MAY BE ANY VOLTAGE
ABOVE V-. PIN 1 SWINGS
TO WITHIN = 2Y OF Y++.
LOW
LIMIT
Using Clamp Diodes to Improve Frequency Response·
CURRENT MODE INPUT_-_-......--...;;.
(DAC, ETC)
OUTPUT
0,
GROUND OR
' - - - - - - LOW
IMPEDANCE
REFERENCE
·SEE CURVE, "RESPONSE TIME VS INPUT STEP SIZE"
Crystal Oscillator
10k
50k
1k
.85
KHz
--+-- OUT
~!..-......
10k
10k
6-18
LT10ll/LT10llA
TYPICAL APPLICATions
Noise Immune 60Hz Line Sync**
High Efficiency**Motor Speed Controller
+15V
C1
+5V
5O~FT
R1
1k
R3
1k
R2
75k
--------,
MOTOR-TACH
GLOBE 397A120-2
+5V
2V-25V R1"
rms
330k
I~~ -M,....J\NI..-....-..::.f,-R2
470!l
I
R3"
10k
TACH I
I
R4
27k
_..J
+15V
R6
27k
+5V -'VII'~,-------I
R5
10k
II
R6
2k
R7
1k
"INCREASE R1 FOR LARGER INPUT
VOLTAGES
"LT1011 SELF OSCILLATES AT =60Hz,
CAUSING ITTO "LOCK" ON TO INCOMING LINE SIGNAL
-5VTO
-15V
Combining Offset Adjust lind Strobe
OV-10V
INPUT
"R3/C2 DETERMINES OSCILLATION
FREOUENCY OF CONTROLLER
"01 OPERATES IN SWITCH MODE
Direct Strobe Drive when CMOS* Logic
Uses Same V+ Supply as LT1011
V+
10k
TIL OR CMOS
5V
"NOT APPLICABLE FOR TIL LOGIC
Combining Offset Adjustment and Hysteresis
5k
V+
"HYSTERESIS IS =O.45mV/~ OF
CURRENT CHANGE IN RH
"THIS RESISTOR CAUSES HYSTERESIS
TO BE CENTERED AROUND Vas
6-19
LT10ll/LT10llA
TYPICAL APPLICATions
Low Drm RIC Oscillator t
..
25k '" Rs '" 2001<0
BUFFERED
OUTPUT
~---------------------+~~--+15
·1% METAL FILM
•• - TRW TYPE MTR·5/+120ppm/"C.
C, - .015 - POLYSTYRENE -12Oppm/"C ± JOppm WESCO TYPE 32·P
NOTE: COMPARATOR CONTRIBUTES", 10ppm/oC DRIFT FOR
FREQUENCIES BELOW 1Oktiz.
tLOW DRIFT AND ACCURATE FREQUENCY ARE
OBTAINED BECAUSE THIS CONFIGURATION
REJECTS EFFECTS DUE TO INPUT OFFSET
VOLTAGE AND BIAS CURRENT OF THE
COMPARATOR.
Positive Peak Detector
+15V
100pf
·MYLAR
"SELECT FOR REQUIRED RESET TIME CONSTANT
Negative Peak Detector
·MYLAR
"SELECT FOR REQUIRED RESET TIME CONSTANT
6-20
LT10ll/LT10llA
TYPICAL APPLICATions
4-Digit (10,000 Count) A-D Converter
+15V
OUTPUT = 1COUNT
PER my, f= 1MHz
START
ALL DIODES 1N4148
'POLYSTYRENE
"NPO
l!:12ms-fl-
Capacitance to Pulse Width Converter
n
.-J
n
L.J
L
THl!:[CMAl«(pF)] [l,.s/pF]
TL'" 10 • CMAX • (l,.s/pF)
TIL OR
D1
CMOS
(OPERATING .....~*"'t--ON +5V)
.........,
R1
5k
n
R5
4.7k.J
L
"'ilI~......j....._OUTPUT
.,
l,.s/pF
R4
10k
'PW=(R2+R3) (C){R1~R4), INPUT CAPACITANCE OF
LT1011IS -6pF. THIS IS AN OFFSET TERM.
tTHESE COMPONENTS MAY BE ELIMINATED IF NEGATIVE SUPPLY
IS AVAILABLE (-1VTO -15V).
"TYPICAL 2 SECTIONS OF 365pF VARIABLE
CAPACITOR WHEN USED AS SHAFT ANGLE
INDICATION.
6-21
LT10ll/LT10llA
TYPICAL APPLICATions
Fast Settllng* Fiber
l00pF
+15
OUTPUT
4.7k
V,. -p-----tW.....- - -...--f-t
4.71<
l00pF
1.5k
5k
THRESHOLD
'COMPARATORS DRIVE OPTO-COUPLED FET
"ON" WHEN DIFFERENCE BETWEEN OUTPUT
AND INPUT EXCEEDS THRESHOLD. WHEN
OUTPUT APPROACHES INPUT, THE FET TURNS
"OFF" AND LOW PASS FILTERING OCCURS.
tFROM THETA-J CORP., WOBURN, MASS.
_15V+ 15V
10Hz to 100kHz Voltage to Frequency Converter
+15V
Rl
4.7k
R2
5k
FULL-SCALE
LINEARITY -0.01 %
+15V
R3
R8
O~~~~ ""'1r'1TRII;'M~--,BII·06k.,..'1':'p-_--<~,,;;,
4.7k
C2
o.eB,.FT
+15V
10Hz R16
TRIM SDk
.".
-15V
1.s,..
--1 r1f1J1f
Rll
20k
-15V
ALL DIODES lN4148
TRANSISTORS 2N3904
'USEO ONLY TO
GUARANTEE START-UP
tMAY BE INCREASED FOR
BmER 10Hz TRIM
RESGLUTION
6-22
R13
620k
+15V
+4.4V
-15V
R9
51<
LT10ll/LT10llA
TYPICAL APPLICATions
100kHz Precision Rectifier
""""\.-t-..:.
AC INPU'r-....
SCHEmATIC DIAGRAm
R9
800
INPUT 1I2H--="+*.......-
R1
R2
1.31<
1.3k
II
111011
J---+......-ill7 OUTPUT
..
R24
400II
R13
40
1 GNO
R25
R26
1.6k
1.6k
R19
500
6-23
LT10ll/LT10llA
PACKAGE DESCRIPTion
J8 Package
8 Lead Hermetic DIP
H Package
Metal Can
0.040
1,.ma)
+
t
(~~~~=~.~::)
MAX
L
if
D
l:':::~:':-+l
17.747-8.509)
OIA
--~~--~+'O~.O~~'-------'.
(1.270)
.1
fa,,)
J
0.165-0.185
M;'
14.191
~~:~ (~2~=~9!)
t
t
5-
0.220-0.310
(5.588-7.874)
*
4
LO.055
11.397)
MAX
•
~
GlASS
I~:!:I
MIN
I
0.125-0.200
0.100
i:)
J_lj I
(:::T~P~:~:)
,
11
\1
"
-l
4-.Y1!=!m.
(f
10.358-0.584)
'R'
t
,
1/
"
11
o'-15'
(~:::=::~~).,..
TVP
HOTE: DIMENSIONS IN INCHES UNLESS OTHERWISE NOTED
-LEADS WITHIN 0.007 OF TRUE POSITION ITP) AT GAUGE PLANE
NOTE. DIMENSIONS IN INCHES
N8 Package
8 Lead Plastic
F9~
brrdiIUT'12)
JI
0.040 MAX
' 4 - (1.0161
0.155!0.175
0.060
(1.5241
so
1....- 0'370-0400---+-~
(9400-1016)
.!lli.1
Mt'~
(0508)
0.)0.280
0005
IOM',~7)
~
13.175-3.302)
.!!1!!!!.JJ
(~s~)
TYP
I
0.115~0 145
II +-1:::;~J:f.·)603)
-.-
4-~
10.358-0.584)
Fi
,,
"
..
-I
t
. - 0'-15'
,
II
-+jl~~
17.366-7.874)
NOTE: alMENSIONS IN INCHES UNLESS OTHERWISE NOTED
-lEADS WITHIN 0.001 OF TRUE POSITION fTP) AT GAUGE PLME
6-24
,,
0.290-0.310
TYP
7'±5'
(0.203-0.381)
TYP
-+Ii"
0.008-0.015
(O.203-0.381)
TYP
~7YJ~~F{~-U-,tr-a-F-a-s-t-pr-e-C-iS-iO-n-C-o-m-p-a-L:-:-~:-~
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
The LT1 016 is an ultra fast (1 Ons) comparator specifically designed to interface directly to TTL logic while
operating off either a dual ± 5V supply or a single + 5V
supply. Tight offset voltage specifications and high gain
allow the LT1 016 to be used in precision applications.
Matched complementary outputs further extend the versatility of this new comparator.
Ultra Fast (10ns typ)
Operates Off Single +5V Supply, or ±5V
Complementary Output to TTL
Low Offset Voltage
No Minimum Input Slew Rate Requirement
No Power Supply Current Spiking
Output Latch Capability
APPLICATions
•
•
•
•
•
High Speed A to D Converters
High Speed Sampling Circuits
Line Receiver
Extended Range V to F Converters
Fast Pulse Height/Width Discriminators
A unique output stage is featured on the LT1016. It provides active drive in both directions for maximum speed
into TTL logic or passive loads, yet does not exhibit the
large current spikes normally found in "totem pole"
output stages. This eliminates the need for a minimum
input slew rate typical of other very fast comparators.
The ability of the LT1 016 to remain stable with the outputs in the active region greatly reduces the problem of
output "glitching" when the input signal is slow moving or is low level.
The LT1 016 has a true latch pin for retaining input data
at the outputs. The outputs will remain latched as long
as the latch pin is held high. Quiescent negative power . .
supply current is only 3mA-about ten times lower than ~
competitive units. This reduces die temperature and
allows the negative supply pin to be driven from virtually
any supply voltage with a simple resistive divider.
Device performance is not affected by variations in negative supply voltage.
10-25MHz Crystal Oscillator
Response Time
+5V
2k
10-25MHz
(AT CUT)
n
r-N"""----Iu
221l
VIN
100mV STEP
SmV OVERDRIVE
+5V
2k
7''''"''''-''- OUTPUT
VOUT
W/DIV
I!HRESHO LD'..-'j
,
,
-~
J
II
II
\
~
J--
20
T200PF
-
W
0
20
TIME(n,)
6-25
LT1016
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Positive Supply Voltage (Note 4) ............... 7V
Negative Supply Voltage ..................... 7V
Differential Input Voltage ................... :l::.5V
Input Voltage (Either Input) ........ Equal to Supplies
Latch Pin Voltage ................ Equal to Supplies
Output Current (Continuous) .............. :I::. 20mA
Operating Temperature Range
LT1016M ................. -55°Cto +125°C
LT1016C ...................... 0°Cto + 70°C
StorageTemperatureRange ..... -65°Cto +150°C
Lead Temperature (Soldering, 10 sec) ........ 300°C
TOP VIEW
ORDER PART NUMBER
LT1016MH
LT1016CH
LATCH
ENABLE
METAL CAN HPACKAGE
TOP VIEW
LT1016MJ
LT1016CJ
LT1016CN
~~l~~E
'--_--I 5
HERMETIC DIP J8 PACKAGE
PLASTIC DIP N8 PACKAGE
ELECTRICAL CHARACTERISTICS
v+ =5V, v- =5V, VouT (Q)=1.4V, VLATCH=OV, TA=25°C, unless otherwise noted.
SYMBOL PARAMETERS
VDS
Input Offset Voltage
aVos
aT
Input Offset Voltage Drift
los
Input Offset Current
18
Input Bias Current
CONDITIONS
Rs:S 1000 (Note 1)
MIN
•
•
(Note 1)
0.3
(Note 2)
Input Voltage Range
Av
VOH
(Note 5)
Single + 5V Supply
Common-Mode Rejection -3.75V:sV CM :S +3.5V
Supply Voltage Rejection Positive Supply 4.6V :sV+ :s5.4V
Negative Supply 2V:s V :s7V
Small Signal Voltage Gain lV:sVOUT :s2V
V+ :s4.6V,
Output High Voltage
10UT= lmA
Val
Output Low Voltage
1+
Positive Supply Current
Negative Supply Current
Latch Pin Hi Input Voltage
Latch Pin Lo Input Voltage
Latch Pin Current
VLATCH=OV
CMRR
PSRR
I
VIH
VIL
III
6-26
LT1016M
MAX
TYP
±2
0.8
3
4
•
•• -3.75
•
•
•
•
•
IOUT=10mA •
ISINK =4mA
•
ISINK =10mA
•
•
•
•
•
+1.25
80
60
80
1400
2.7
2.4
5
96
75
100
3000
3.4
3.0
0.3
0.4
25
3
1
1.3
10
13
+3.5
+3.5
MIN
0.3
0.3
5
-3.75
+1.25
80
60
80
1400
2.7
2.4
0.5
35
5
2.0
LTlO16C
TYP
MAX UNITS
1.0
±3
mV
3.5
mV
p.V/oC
4
96
75
100
3000
3.4
3.0
0.3
0.4
25
3
1
1.3
10
13
+3.5
+3.5
0.5
35
5
2.0
0.8
500
0.8
500
p.A
p.A
p.A
p.A
V
V
dB
dB
dB
V/V
V
V
V
V
rnA
rnA
V
V
p.A
LT1016
ELECTRICAL CHARACTERISTICS
Y+ =5Y, Y- =5Y, YOUT(Q) =1.4Y, YLATCH =OY, TA = 25°C, unless otherwise noted.
SYMBOL PARAMETERS
tpD
Ll.tpD
CONDITIONS
MIN
Propagation Delay
(Note 3)
Ll.V IN =100mV,OD=5mV
(N()te 3)
Ll.V IN = 100mV, OD = 20mV
Differential Propagation
Delay
Latch Setup Time
(Note 3) Ll.V IN =100mV, OD=5mV
LTlO16M
TYP
MAX
14
16
12
15
3
10
•
•
9
~
~
~
25
TJ~
r- r:::
~
35 t-:-.
~
3.0
§; 2.5
~
20
2:,1.5
IOUT~O
+125°C
20
Vs= ±5V
IOUT=O
-TJ~25°C
g
STEP SIZE = l00mV
~
15
...;~
!;;g
i=
10
tPDLH
f-----
~
1.0
\\\
0
-2.5
-1.5 -0.5 0 0.5
1.5
DIFFERENTIAL INPUT VOLTAGE(mV)
o
2.5
Propagation Delay vs
Source Resistance
80
±5V
OVERDRIVE ~ 20mV
I
EQUIVALENT INPUT CAPACITANCE
IS ~3.5pF
60
o
ro
w
0
~
~
~
OVERDRIVE(mV)
Propagation Delay
Supply Yoltage
Vs~
70
0
10
20
30
40
OUTPUT LOAD CAPACITANCE(pF)
50
vs
Propagation Delay vs Temperature
25
30
20
25
STEP SIZE = 100mV
OVERDRIVE = 5mV
OUTPUT LOAD CAPACITANCE = 10pF
Vs= ±5V
20
50
~
ns
20
~~
0.5
i!:i
:;;
;:;
25
~
I-- -TJ~-55o~
ns
ns
ns
ns
ns
Propagation Delay vs
Load Capacitance
TJ~J5OC
±5V
UNITS
14
16
12
15
3
2
Propagation Delay vs Overdrive
vs~
9
MAX
Note 3: tpD and Ll.tpD cannot be measured in automatic handling equipment
with low values of overdrive. The LT1016 is 100% tested with a IV step and
500mV overdrive at 25°C only. Correlation tests have shown that tpD and
Ll.t pD limits shown can be guaranteed with this test, if additional DC tests are
performed to guarantee that all internal bias conditions are correct. For low
overdrive conditions Vos is added to overdrive.
Note 4: Electrical specifications apply only up to 5.4V.
Note 5: See text for discussion of input voltage range for supplies other
than ±5V, or +5V.
TYPICAL PERFORmAnCE CHARACTERISTICS
Gain Characteristics
LTlO16C
TYP
10
2
The • denotes the specifications which apply over the full operating
temperature range.
For MIL·STD components, please refer to LTC883 data sheet for test listing
and parameters.
Note 1: Input offset voltage is defined as the average of the two voltages
measured by forcing first one output, then the other to I.4V. Input offset
current is defined in the same way.
Nole 2: Input bias current (IB) is defined as the average of the two input
currents.
5.0
4.5
4.0·
MIN
15
~
~
40
i!:i
'"
;:;
30
i!:i
;:;
FALLING EDGE tPOHL
'"
10
RISING EDGE tpDLH
20
15
10
RISING OUTPUT tpDLH
10
0
0
500
lk 1.5k 2k 2.5k
SOURCE RESISTANCE(Il)
.L7YrntB
3k
o
4.4
4.6
4.8 5.0
5.2
5.4
POSITIVE SUPPLY VOLTAGE(V)
56
0
-50 -25
0 25 50 75 100
JUNCTION TEMPERATURE(CO)
125
6-27
LT1016
TYPICAL PERFORmAnCE CHARACTERISTICS
Latch Set-Up Time
Output High Voltage (V OH )
Output Low Voltage (Vou
6
0.8
5.0
Vs= ±5V, VIN=30mV
0.7
-----
-2
v
V
V
~ 0.5
;'"
0.3
;'"
0.2
-4
~
,.. ~
+ \25'b
..... r-;:-c
J
f
o
-50
-25
0
25
50
75 100
JUNCTION TEMPERATURE('C)
125
o
-
2
/
'"
=>
<.:>
20
ill
~
~
-50
-25
0
25
50
75 100
JUNCTION TEMPERATURE('C)
125
TJ= +125'C I~
~y,
o
Common-Mode Rejection
100
m
§~
...
2
VSI=
80
~
70
'"
60
r--...
....
~
V
30
~ 25
~
~
<.:>
T~=,1~5~U
I"" TJ=25'C
~TJ= -55'C
20
15
10
T =l55'd
o
3
4
5
6
SUPPLY VOLTAGE(V)
10
SWITCHING FREQUENCY(MHz)
1
-
100
Negative Common-Mode Limit
V~=SIN~LE+5t SUpJLY
-
r-- r--
~ 0
~ -1
....>
~
Ul
-2
-3
50
6-28
4 6 8 10 12 14 16 18 20
OUTPUT SOURCE CURRENT(mA)
35
TTJ=25'C
Q
40
10k
2
±5~·
r- r--
90
z
1'1
o
Positive Supply Current
Positive Common-Mode Limit
VIN=2V p-p
VS= ±5V
TJ=25'C
TJ=-55'C
40
~IJII
120
110
~
~
10
TJ-25'C
2.0
A
25
o
2.5
.,.
V-=OV
15
o
~
5o
1.0
35
30
3.0
4 6 8 10 12 14 16 18 20
OUTPUT SINK CURRENT(mA)
40
~
~
~
t5,b
1.5
50
45
3.5
I I
Positive Supply Current
Negative Supply Current
~
t
--
4.0
~
11
0.1
-6
-
,.. -t:tr
~ T1= _155'C
~ 0.4
g
4.5
II
0.6
lOOk
1M
FREQUENCY(Hz)
10M
o
Vs= ±5V·
-50
-25
0
25
50
75
100 125
JUNCTION TEMPERATURE ('C)
·SEE APPLICATION SECTION FOR COMMON-MODE
LIMIT WITH VARYING SUPPLY VOLTAGE.
-4
-50
-25
0
25
50
75 100 125
JUNCTION TEMPERATURE ('C)
·SEE APPLICATION SECTION FOR COMMON-MODE
LIMIT WITH VAR¥ING SUPPLY VOLTAGE.
LT1016
TYPICAL PERFORmAnCE CHARACTERISTICS
Latch Pin Threshold
Latch Pin Current*
2.6
300
2.2
250
VS='",5V
1.8
f': :::::-
1.0
_200
~ArED
O~D
1
--
~
'"
0.6
02
-50 -25
150
a:
=>
100
50
0
25
50
75
100
125
JUNCTION TEMPERATURE (0C)
o
- I--
'CURRENT COMES OUT OF LATCH PIN
BELOW THRESHOLD
-55 -25
0
25
50
75
100
125
JUNCTION TEMPERATURWC)
APPLICATions InFORmATion
Common-Mode Considerations
The LT1 016 is specified for a common-mode range of
-3.75Vto +3.5Vwith supply voltages of ±5V. Amore
general consideration is that the common-mode range is
1.25V above the negative supply and 1.5V below the
positive supply, independent of the actual supply voltage.
The criteria for common-mode limit is that the output still
responds correctly to a small differential input signal.
Either input may be outside the common-mode limit (up to
the supply voltage) as long as the remaining input is
within the specified limit, and the output will still respond
correctly. There is one consideration, however, for inputs
which exceed the positive common-mode limit. Propagation delay will be increased by up to 10ns if the signal input is more positive than the upper common-mode limit
and then switches back to within the common-mode
range. This effect is not seen for signals more negative
than the lower common-mode limit.
Input Impedance and Bias Current
Input bias current is measured with the output held at
1.4V. As with any simple NPN differential input stage, the
LT1 016 bias current will go to zero on an input which is
low and double on the input which is high. If both inputs
are less than 0.8V above V- , both input bias currents
will go to zero. If either input exceeds the positive
common-mode limit, input bias current will increase
rapidly, approaching several milliamperes at VIN =V+.
Differential input resistance at zero differential input
voltage is about 10kO, rapidly increasing as larger DC differential input signals are applied. Common-mode input
resistance is about 4MO with zero differential input
voltage. With large differential input signals, the high input will have an input resistance of about 2MO and the
low input, greater than 20MQ.
Input capacitance is typically 3.5pF. This is measured by
inserting a 1kO resistor in series with the input and
measuring the resultant change in propagation delay.
Latch Pin Dynamics
The latch pin is intended to retain input data (output
latched) when the latch pin goes high. This pin will float
to a high state when disconnected, so a flow-through
condition requires that the latch pin be grounded. To
guarantee data retention, the input signal must be valid at
least 5ns before the latch goes high (set-up time) and
must remain valid at least 3ns after the latch goes high
(hold time). When the latch goes low, new data will appear at the output in approximately 8-1 Ons. The latch pin
is designed to be driven with TIL or CMOS gates. It has
no built-in hysteresis.
6-29
LT1016
APPLICATions InFoRmATion
Measuring Response Time
The LT1 016 is able to respond quickly to fast low level
signals because it has a very high gain~bandwidth
product ( ... 50GHz), even at very high frequencies. To
properly measure the response of the LT1 016 requires an
input signal source with very fast rise times and exceptionally clean settling characteristics. This last requirement comes about because the standard comparator test
calls for an input step size that is large compared to the
overdrive amplitude. Typical test conditions are 100mV
step size with only 5mV overdrive. This requires an input
signal that settles to within 1% (1 mV) of final value in only a few nanoseconds with no ringing or "long tailing".
Ordinary high speed pulse generators are not capable of
generating such a Signal, and in any case, no ordinary
oscilloscope is capable of diplaying the waveform to
check its fidelity. Some means must be used to inherently
generate a fast, clean edge with known final value.
The circuit shown in Figure 1 is the best electronic means
of generating a known fast, clean step to test comparators. It uses a very fast transistor in a common base
configuration. The transistor is switched "off" with a
fast edge from the generator and the collector voltage settles to exactly OV injust afew nanoseconds. The most important feature of this circuit is the lack of feedthrough
from the generator to the comparator input. This prevents
overshoot on the comparator input which would give a
false fast reading on comparator response time.
To adjust this circuit for exactly 5mV overdrive, V1 is adjusted so that the LT1016 output under test settles to
OV--,
1.4V (in the linear region). Then V1 is changed -5V to
set overdrive at 5mV.
The test circuit shown measures low to high transition on
the + " input. For opposite polarity transitions on the
output, simply reverse the inputs of the LT1 016.
II
High Speed Design Techniques
A substantial amount of design effort has made the
LT1016 relatively easy to use. It is much less prone to
oscillation and other vagaries than some slower comparators, even with slow input signals. In particular, the
LT1016 is stable in its linear region, a feature no other
high speed comparator has. Additionally, output stage
switching does not appreciably change power supply
current, further enhancing stability. These features make
the application of the 50GHz gain-bandwidth LT1016
considerably easier than other fast comparators. Unfortunately, laws of physics dictate that the circuit
environment the LT1016 works in must be properly
prepared. The performance limits of high speed circuitry
are often determined by parasitics such as stray
capacitance, ground impedance, and layout. Some of
these considerations are present in digital systems where
designers are comfortable describing bit patterns and
memory access times in terms of nanoseconds. The
LT1 016 can be used in such fast digital systems and
Figure 2 shows just how fast the device is. The simple
test circuit allows us to see that the LT1016's .(Trace B)
r-
L-J -100mV
0.01 ....
25!l
~
-lOX SCOPE PROBE
IN = 10pF)
'SEE TEXT FOR CIRCUIT EXPLANATION
··TOTAL LEAO lENGTH INCLUDING OEVICE PIN,
SOCKET AND CAPACITOR LEADS SHOULD BE
LESS THAN 0.5 IN. USE GROUND PLANE
t(Vos+OVERDRIVE) x 1000
Figure 1. Response Time Test Circuit
6-30
LT1016
APPLICATions InFoRmATion
response to the pulse generator (Trace A) is as fast as a
TIL inverter (Trace C) even when the LT1016 has only
millivolts of input signal! Linear circuits operating with
this kind of speed make many engineers justifiably wary.
Nanosecond domain linear circuits are widely associated
with oscillations, mysterious shifts in circuit characteristics, unintended modes of operation and outright failure
to fu nction .
Other common problems include different measurement
results using various pieces of test equipment, inability to
make measurement connections to the circuit without
inducing spurious responses and dissimilar operation between two "identical" circuits. If the components used
in the circuit are good and the design is sound, all of the
above problems can usually be traced to failure to provide
a proper circuit' 'environment." To learn how to do this
requires studying the causes of the aforementioned
difficulties.
By far the most common error involves power supply
bypassing. Bypassing is necessary to maintain low supply impedance. DC resistance and inductance in supply
wires and PC traces can quickly build up to unacceptable
levels. This allows the supply line to move as internal cur-
PULSE
GENERATOR
rent levels of the devices connected to it change. This will
almost always cause unruly operation. In addition,
several devices connected to an unbypassed supply can
"communicate" through the finite supply impedances,
causing erratic modes. Bypass capacitors furnish a simple way to eliminate this problem by providing a local
reservoir of energy at the device. The bypass capacitor
acts like an electrical flywheel to keep supply impedance
low at high frequencies. The choice of what type of
capacitors to use for bypassing is a critical issue and
should be approached carefully. An unbypassed LT1016
is shown responding to a pulse input in Figure 3. The
power supply the LT1 016 sees at its terminals has high
impedance at high frequency. This impedance forms a
voltage divider with the LT1016, allowing the supply to
move as internal conditions in the comparator change.
This causes local feedback and oscillation occurs.
Although the LT1016 responds to the input pulse, its output is a blur of 100MHz oscillation. Always use bypass
capacitors.
In Figure 4 the LT1016's supplies are bypassed, but it
still oscillates. In this case, the bypass units are either too . .
far from the device or are lossy capacitors. Use capacitors ~
with good high frequency characteristics and mount
A=5V/OIV
VERTICAL B= 5V 1OIV
C=5V/OIV
HORIZONTAL = 10ns/OlV
Figure 2. LT1016 vs a TTL Gate
A=2V/OIV
HORIZONTAL = 1OOnsl OIV
Figure 3. Unbypassed LT1016 Response
HORIZONTAL = 1OOnsl OIV
Figure 4. LT1016 Response with Poor Bypassing
6-31
LT1016
APPLICATions InFoRmATion
them as close as possible to the LTt016. An inch of wire
between the capacitor and the LTt016 can cause problems. If operation in the linear region is desired, the
LTt016 must be over a ground plate with good RF bypass
capacitors ('?!0.01pF) having lead lengths less than 0.2
inches. Do not use sockets.
probe used is too heavily compensated or slow for the oscilloscope. Never use 1Xor' 'straight" probes. Their bandwidth is 20MHz or less and capacitive loading is high.
Check probe bandwidth to ensure it is adequate for
the measurement. Similarly, use an oscilloscope
with adequate bandwidth.
In Figure 5 the device is properly bypassed but a new
problem pops up. This photo shows both outputs of the
comparator. Trace Aappears normal, but Trace Bshows an
excursion of almost 8V - quite atrick for adevice running
from a + 5V supply. This is a commonly reported problem
in high speed circuits and can be quite confusing. It is not
due to suspension of natural law, but is traceable to a
grossly miscompensated or ir;nproperly selected oscilloscope probe. Use probes which match your oscilloscope's input characteristics and compensate them properly. Figure 6 shows another probe-induced problem.
Here, the amplitude seems correct but the 10ns response
time LT1016 appears to have 50ns edges! In this case, the
In Figure 7 the probes are properly selected and applied
but the LT1016's output rings and distorts badly. In this
case, the probe ground lead is too long. For general purpose work most probes come with ground leads about 6
inches long. At low frequencies this is fine. At high
speed, the long ground lead looks inductive, causing the
ringing shown. High quality probes are always supplied
with some short ground straps to deal with this problem.
Some come with very short spring clips which fix directly
to the probe tip to facilitate a low impedance ground connection. For fast work, the ground connection to the
probe should not exceed 1 inch in length. Keep the
probe ground connection as short as possible.
A=2V/DIV
B=2V/DIV
Figure 5. Improper Probe Compensation Causes
Seemingly Unexplainable Amplitude Error
VERTICAL=
VERTICAL = 1V IDiV
HORIZONTAL = 50"51 DlV
Figure 6. Overcompensated or Slow Probes Make Edges
Look Too Slow
6-32
HORIZONTAL=20ns/DlV
Figure 7. Typical Results Due to Poor Probe Grounding
LT1016
APPLICATions InFoRmATion
Figure 8 shows the LT1 016's output (Trace B) oscillating
near 40MHz as it responds to an input (Trace A). Note
that the input signal shows artifacts of the oscillation.
This example is caused by improper grounding of the
comparator. In this case, the LT1016's ground pin connection is 1 inch long. The ground lead of the LT1016
must be as short as possible and connected directly to a
low impedance ground point. Any substantial impedance
in the LT1016's ground path will generate effects like
this. The reason for this is related to the necessity of
bypassing the power supplies. The inductance created
by a long device ground lead permits mixing of ground
currents, causing undesired effects in the device. The
solution here is simple. Keep the LTt016's ground pin
connection as short (typically '/4 inch) as possible and run
it directly to a low impedance ground. Do not use sockets.
Figure 9 addresses the issue of the "low impedance
ground," referred to previously. In this example, the output is clean except for chattering around the edges. This
photograph was generated by running the LT1 016 without a' 'ground plane." Aground plane is formed by using
a continuous conductive plane over the surface of the cir-
cuit board. The only breaks in this plane are for the circuit's necessary current paths. The ground plane serVes
two functions. Because it is flat (AC currents travel along
the surface of a conductor) and covers the entire area of
the board, it provides a way to access a low inductance
ground from anywhere on the board. Also, it minimizes
the effects of stray capacitance in the circuit by referring
them to ground. This breaks up potential unintended and
harmful feedback paths. Always use a ground plane with
the LT1016, when input signal levels are low or slow
moving.
"Fuzz" on the edges is the difficulty in Figure 10. This
condition appears similar to Figure 10, but the oscillation
is more stubborn and persists well after the output has
gone low. This condition is due to stray capacitive feedback from the outputs to the inputs. A 3kO input source
impedance and 3pF of stray feedback allowed this oscillation. The solution for this condition is not too difficult.
Keep source impedances as low as possible, preferably
1kO or less. Route output and input pins and components
away from each other.
Figure 8. Excessive LT1016 Ground Path Resistance
Causes Oscillation
VERTICAL = 2V I OIV
HORIZONTAL = 100ns/OlV
HORIZONTAl=50ns/OlV
Figure 9. Transition Instabilities Due to No Ground Plane
Figure 10. 3pF Stray Capacitive Feedback with 3kO
Source Can Cause Oscillation
6-33
LT1016
APPLICATions InFoRmATion
The opposite of stray-caused oscillations appears in
Figure 11. Here, the output response (Trace B) badly lags
the input (Trace A). This is due to some combination of
high source impedance and stray capacitance to ground'
at the input. The resulting RC forces a lagged response at
the input, and output delay occurs. An RC combination of
2kO source resistance and 10pF to ground gives a 20ns
time constant -,significantly longer than the LT1016's
response time. Keep source impedances low and minimize stray input capacitance to ground.
Figure 12 shows another capaCitance-related problem.
Here the output does not oscillate, but the transitions are
discontinuous and relatively slow. The villain of this situation is a large output load capacitance. This could be
caused by cable driving, excessive output lead length or
the input characteristics of the circuit being driven. In
most situations this is undesirable and may be eliminated
by buffering heavy capacitive loads. In a few cir-
cumstances it may not affect overall circuit operation and
is tolerable. Consider the comparator's output load
characteristics and their potential effect on the circuit. If
necessary, buffer the load.
Another output-caused fault is shown in Figure 13. The
output transitions are initially correct but end in a ringing
condition. The key to the solution here is the ringing.
What is happening is caused by an output lead which is
too long. The output lead looks like an unterminated
transmission line at high frequencies and reflections occur. This accounts for the abrupt reversal of direction on
the leading edge and the ringing. If the comparator is
driving TTL this may be acceptable, but other loads may
not tolerate it. In this instance, the direction reversal on
the leading edge might cause trouble in a fast TTL load.
Keep output lead lengths short. If they get much longer
than a few inches, terminate with a resistor (typically
2500-4000).
A=2V/DIV
VERTICAL
B=2V/DIV
HORIZONTAL = 10ns/DlV
Figure 11. Stray 5pF Capilcitance from Input to Ground
Causes Delay
A=1V/DIV
A=2V/DIV
HORIZONTAL = 100ns/DIV
Figure 12. Excessive Load Capacitance Forces
Edge Distortion
6-34
Figure 13. Lengthy, Unterminated Output Lines Ring
from Reflections
LT1016
APPLICATions InFoRmATion
200ns-0.01 % Sample-and-Hold Circuit
Figure 14's circuit uses the LT1016's high speed to
improve upon a standard circuit function. The 200ns acquisition time is well beyond monolithic sample-and-hold
capabilities. Other specifications exceed the best commercial unit's performance. This circuit also gets around
many of the problems associated with standard sampleand-hold approaches, including FET switch errors and
amplifier settling time. To achieve this, the LT1016's high
speed is used in a circuit which completely abandons
traditional sample-and-hold methods.
Important specifications for this circuit include:
Acquisition Time
< 200ns
Common-Mode Input Range :I:: 3V
Droop
1p.V / pS
Hold Step
2mV
Hold Settling Time
15ns
Feedthrough Rejection
> > 100dB
When the sample-hold line goes low, a linear ramp starts
just below the input level and ramps upward. When the
ramp voltage reaches the input voltage, A1 shuts off the
ramp, latches itself off, and sends out a signal indicating
sampling is complete.
1.8p.S, 12-8it A-O Converter
The LT1016's high speed is used to implement avery fast
12-bit A-O converter in Figure 15. The circuit is a modified
form of the standard successive approximation approach
and is faster than most commercial SAR 12-bitunits. In
this arrangement the 2504 successive approximation
register (SAR) , A1and C1 test each bit, beginning with the
MSB, and produce adigital word representing VIN 's value.
To get faster conversion time, the clock is controlled by the
window comparator monitoring the OAC-input summing
junction. Additionally, the OMOS FET clamps the OAC output to ground at the beginning of each clock cycle,
shortening DAC settling time. After the fifth bit is converted, the clock runs at maximum speed.
1Hz-10MHz V-F Converter
The LT1 016 and the LT1 012 low drift amplifier combine
to form a high speed V- F converter in Figure 16. A
variety of circuit techniques is used to achieve a 1Hz to
10MHz output. Overrange to 12MHz (VIN =12V) is
provided. This circuit has awider dynamic range (140dB,
or 7 decades) than any commercially available unit. The •
10MHz full-scale frequency is 10 times faster than
currently available monolithic V- F's. The theory of
operation is based on the identity a= CV.
SN7402(3)
300
Figure 14. 200ns Sample-and Hold
SAMPLE-HOLD
COMMAND (TTL)
6-35
LT1016
APPLICATions InFORmATion
Each time the circuit produces an output pulse, it feeds
back a fixed quantity of charge (Q) to a summing node
(I;). The circuit's input furnishes acomparison current at
the summing node. The difference signal at the node is
integrated in a monitoring amplifier's feedback capacitor.
The amplifier controls the circuit's output pulse
generator, completing a feedback loop around the
integrating amplifier. To maintain the summing node at
zero, the pulse generator runs at a frequency which
permits enough charge pumping to offset the input
signal. Thus, the output frequency will be linearly related
to the input voltage. A1 is the integrating amplifier.
To trim this circuit, ground the input and adjust the 1k pot
for 1Hz output. Next, apply 10.000V and setthe 2kOunit
for 10. OOOM Hz output. The transfer linearity of the circuit
is 0.06%. Full-scale drift is typically 50ppm/ °C and zero
point error about 0.2p.V/oC (0.2Hz/°C).
+15V
Q1-OS RCA CA3127 ARRAY
..... lN4148
-tf
HP5082·2810
'1% FILM RESISTOR
"PRECISION 0.01%; VISHAY S·102
Figure 15. 12·Bit 1.8J1S SAR A-D
6-36
LT1016
APPLICATions InFoRmATion
1Hz-10MHz V to F Converter
l.Bk
+15V --'IIIIII-....-
. .-tH---,
+5V
430
INPUT
OV-10V
15011
-!!iwt\2kffi--'IIIIII-+"-----L
GAIN TRIM
+15V
150
9.1k
1k ................' - 1
1Hz TRIM
9.1k
200k
I--+-......Wlr- + 15V
-15V
1k
-+t- =1N414B
1Hz-10MHz
OUTPUT
60pS WIDE PULSES
Voltage Controlled Pulse Width Generator
25(1
STARTS-
VIN=O TO 2.5~'----+-
oTO 2.5pS
(MINIMUM WIDTH =0.05pS)
I----I
:r
"J
~'Y029
'"
U
~
Y 036
~l
Uk
Uk
13k
490
12k
L..-
350
955
~
049~
1.5k
rt:
L..-
~
165
v+
~040
023
100
1.5k
024>-
+
3:O~pF
100
1.5k
700
170
041
t"'
J
11
043
"-1- t"' 04'
r~
O:r
J"o
"Ii
670
019~,
r'
300
565
_
11k
170
031
1k
020
65
013
15PF~~
05"11
016
... 022
- ,:Q'"
~D9 010>-
LL-;::-
700
'OOPF
150
012
'"
051)-
830
050
y
3k
13k
D2
r-
150
~32
r - 1.,0
r
r'
150
r<03
-~'
LATCH
015~k~~
375
rnf,..
50
t"' 021
'"
,:f
... 026
."
35,
165
3.Sk
90
5i'Gl:
." 0 4
~J
210
~027
...
010
t" O'
~I
480
Uk
v-
GNO
PACKAGE DESCRIPTiOn Dimensions in inches (millimeters) unless otherwise noted.
10 lead TO·5 Metal Can (H)
N8 Package
8 lead Plastic
J8 Package
8 Laad Hermetic Dip
"W
t-(l~)--'
'lml
1
0325+ 0025
(82S5~~:)+I
-0381
I
0110-0150
(2794-41l64)
IftSULATIMG
STANOOFF
'"~
1 LEAD DIAMETER IS UNCONTJIOLLEO BEIMEN WE REFERENCE PLANE ANO SEATING PW/E
6-40
2
3
4
~0010
-.:J,02MI
~"""""-L1n'lJ\Q
~,
LT10l6CS8
TECHNOLOGY~U-lt-ra-F-a-st-P-re-C-i-siO-n-C-o-m-p-a-r-a-to-r
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
The LT1016 is an ultra fast (10ns) comparator specifically
designed to interface directly to TTL logic while operating
off either adual ± 5V supply or a single +5V supply. Tignt
offset voltage specifications and high gain allow the
LT1016 to be used in precision applications. Matched
complementary outputs further extend the versatility of
this new comparator.
Ultra Fast (10ns typ)
Operates Off Single +5V Supply, or ± 5V
Complementary Output to TTL
Low Offset Voltage
No Minimum Input Slew Rate Requirement
No Power Supply Current Spiking
Output Latch Capability
A unique output stage is featured on the LT1016. It provides active drive in both directions for maximum speed
into TTL logic or passive loads, yet does not exhibit the
large current spikes normally found in "totem pole" output stages. This eliminates the need for a minimum input
slew rate typical of other very fast comparators. The ability of the LT1016 to remain stable with the outputs in the
active region greatly reduces the problem of output
"glitching" when the input signal is slow moving or is low
level.
APPLICATions
•
•
•
•
•
High Speed Ato DConverters
High Speed Sampling Circuits
Line Receiver
Extended Range Vto FConverters
Fast Pulse HeightlWidth Discriminators
The LT1016 has a true latch pin for retaining input data at
the outputs. The outputs will remain latched as long as the
latch pin is held high. Quiescent negative power supply
current is only 3mA - about ten times lower than com·
petitive units. This reduces die temperature and allows the
negative supply pin to be driven from virtually any supply
voltage with asimple resistive divider. Device performance
is not affected by variations in negative supply voltage.
10-25MHz Crystal Oscillator
Response Time
5V
2k
10-25MHz
(AT CUT)
n
220
V,N
100mV STEP
5mV OVERORIVE
r"""'\II"""""'---i u~---,
T820PF
5V
2k
OUTPUT
Vour
lV/OIV
- i/-
j
lL
II
\
\
IL
T200PF
-
/,THRESHO LD'~
,
20
---
~
0
20
TIME(ns)
6-41
LT1016CS8
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Positive Supply Voltage (Note 4) ...................... 7V
Negative Supply Voltage ............................. 7V
Differential Input Voltage .......................... ± 5V
Input Voltage (Either Input) ............. Equal to Supplies
Latch Pin Voltage ...................... Equal to Supplies
Output Current (Continuous)..................... ± 20mA
Operating Temperature Range ............... O°C to 70°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ......... , ... 300°C
ORDER PART
NUMBER
TOP VIEW
LT1016CS8
PART MARKING
S8 PACKAGE
PLASTIC SO
1016
ELECTRICAL CHARACTERISTICS
v+ =5V, v- =5V, Vour(Q)= 1.4V, VLATCH =ov, TA=25°C, unless otherwise noted.
SYMBOL
Vas
PARAMETERS
Input Offset Voltage
li.vos
Input Offset Voltage Drift
CONDITIONS
Rss1000(Note 1)
MIN
•
•
aT
los
Input Offset Current
(Note 1)
Is
Input Bias Current
(Note 2)
Input Voltage Range
(Note 5)
Single + 5V Supply
-3.75VsVCM s +3.5V
Positive Supply 4.6V sV+ s5.4V
Negative Supply 2V sV - s 7V
CMRR
PSRR
Common·Mode Rejection
Supply Voltage Rejection
Av
VOH
Small Signal Voltage Gain
Output High Voltage
VOL
Output Low Voltage
1+
1-
Positive Supply Current
Negative Supply Current
Latch Pin Hi Input Voltage
Latch Pin Lo Input Voltage
Latch Pin Current
VIH
VIL
IlL
6-42
1VsVoUT s2V
V+ ~4.6V,
VLATCH=OV
IOUT=lmA
IOUT=10mA
ISINK=4mA
ISINK=10mA
•
•
•
•
•
•
•
••
•
•
•
•
•
•
LT1016C
TYP
1.0
MAX
±3
±3.5
p.V/oC
4
0.3
0.3
5
-3.75
+1.25
80
60
80
1400
2.7
2.4
1
1.3
10
13
+3.5
+3.5
96
75
100
3000
2.9
2.8
0.3
0.4
25
3
UNITS
mV
mV
p.A
p.A
p.A
p.A
V
V
dB
dB
dB
VN
0.5
35
5
2.0
0.8
500
V
V
V
V
mA
mA
V
V
p.A
LT1016CS8
ELECTRICAL CHARACTERISTICS
v+ = 5V, V - = 5V, VOUT(Q)= 1.4V, VLATCH = OV, TA = 25°C, unless otherwise noted.
SYMBOL
tpo
PARAMETERS
Propagation Delay
(Note 3)
MIN
CONDITIONS
.1V1N = l00mV, 00= 5mV
.1V1N = 100mV, 00 = 20mV
.1tpo
Differential Propagation
Delay
•
•
LT1016C
TYP
14
16
9
12
15
UNITS
ns
ns
ns
ns
3
ns
(Note 3).1V 1N = l00mV, 00=5mV
Latch Setup Time
The • denotes the specifications which apply over the full operating tern·
perature range.
Note f: Input offset voltage is defined as the average of the two voltages
measured by forcing first one output, then the other to l.4V.lnput offset
current is defined in the same way.
Note 2: Input bias current (Ie) is defined as the average of the two input
currents.
MAX
10
2
ns
Note 3: Propagation delay is measured with the overdrive added to actual
Vas. Guaranteed but not tested.
Note 4: Electrical specifications apply only up to 5.4V.
Note 5: See text for discussion of input voltage range for supplies other
than ± 5V, or +5V.
6-43
NOTES
6-44
L7unw
mOl71LTlOl8
--Micropower Dual Comparator
-~v
TECHNOLJOG
I'
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
The LT1017 and LT1018 are general purpose micropower
comparators. The LT1017 is optimized for lowest operating power while the LT1018 operates at higher power and
higher speed. Both devices can operate from a single 1.1V
cell up to 40V. The output stage includes a class "B" pullup current source, eliminating the need for an external resistive pull-up and saving power. The output stage is also
designed to allow driving loads connected to a supply
more positive than the device, as can comparators with
open collector output stages.
Maximum Offset Voltage
1mV
Maximum Bias Current
15nA
Typical Output Drive
70mA
Operates from 1.1V to 40V
Internal Pull-Up Current
Output Can Drive Loads Above V+
30/LA Supply Current(LT1017)
110/LA Supply Current (LT1018)
APPLICATions
Input specifications are also excellent. On-chip trimming
minimizes offset voltage, while high gain and commonmode rejection ratio keep other input-referred errors low.
Common-mode voltage range includes ground. Special circuitry prevents false output states even if the input is
overdriven.
• Power Supply Monitors
• Relay Driving
• Oscillators
The LT1017 and LT1018 are pin compatible with older dual
comparators such as 393 type devices.
Supply Current
1.SV Powered Refrigerator Alarm
-t-----.
V+ ......
1.5V
160
665k"
1
665k"
52.3k"
LT1018
-
140
OUTPUT HIGH FOR
0"C",Ts5"C
_ 120
~
~
100
~
is 60
to
>
~
-
60
:::>
30mV
Output Source Current
V+ =40V, V- =0
VIN =5mV, Vour =O.4V
Output Source Current
V+ =1.2V, V- =0
VIN =5mV, Vour =O.4V
6-46
MIN
25°C
•
125°C
25°C
•
125°C
25°C
•
125°C
25°C
•
125°C
25°C
•
125°C
25°C
•
125°C
25°C
•
25°C
•
125°C
25°C
•
125°C
25°C
•
125°C
105
100
86
96
95
86
110
105
100
100
94
30
25
10
30
25
25
25
15
25
LT1017
TYP MAX
1
0.4
0.5
1.4
1.5
5
15
7
25
10
40
0.4
2
0.5
3
12
115
115
100
110
105
MIN
1
1.6
105
100
95
96
95
86
115
115
110
LT1018
TYP
0.4
0.5
0.7
15
18
110
105
100
100
115
115
110
110
105
100
125
120
110
94
65
50
20
75
70
75
35
20
35
25
10
75
50
50
70
45
40
40
70
50
30
250
220
200
140
120
110
MAX
1
1.4
1.5
75
100
110
8
12
20
UNITS
mV
mV
mV
nA
nA
nA
nA
nA
nA
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
mA
mA
mA
~A
~A
~
~
~A
~
LT1017/LT1018
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
Negative Output Saturation
lOUT = 0
=O.lmA
=lmA
=10mA
=30mA
10UT=0
=O.lmA
=lmA
=10mA
=30mA
10UT=0
=O.lmA
=lmA
=10mA
=30mA
Positive Output Saturation
MIN
V· =4.5V. V- =0
VIN= -10mV
••
•••
125°C
125°C
125°C
125°C
125°C
25°C
25°C
10UT=0
=1O~A
=10~A
125°C
125°C
25°C
=0
=1O~A
Vs=5V. VouT=40V
VIN 2:100mV
Supply Current
0.5
0.6
•
125°C
25°C
Vs=5V
30
40
•
•
125°C
125°C
25°C
Vs=40V
Minimum Operating Voltage
40
175
45
190
50
••
=0
Leakage Current
25°C
25°C
25°C
25°C
25°C
LT1017
TYP
5
35
60
120
·350
5
40
75
150
600
25
60
100
300
40
55
25°C
10UT= lmA
•
125°C
The • denotes specifications which apply over operating temperature
range of - 55°C to 85°C for Mgrade parts and OOC to 70°C for Cgrade
parts.
MAX
20
60
120
200
600
20
75
150
300
900
50
100
200
600
MIN
80
250
90
300
100
300
3
3
5
LT101S
TYP
5
35
60
120
350
8
35
70
150
500
10
60
110
300
900
35
175
45
190
50
1
1.8
110
110
60
80
80
90
100
100
1.15
1.15
1.15
130
140
MAX
15
60
120
250
700
20
70
150
300
900
40
100
200
400
UNITS
mV
mil
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
80
250
90
300
100
300
8
10
15
250
250
300
250
270
300
1.2
1.2
1.2
~A
~
~A
~A
~
~A
~
~A
~
V
V
V
Note 1: Offset voltage is guaranteed over acommon·mode voltage range of
V- SVINS(V· -0.9V).
Note 2: No load gain is guaranteed but not tested (LT1017 only).
TYPICAL PERFORmAnCE CHARAOERISTICS
Input Bias Current
Bias Current vs Differential Input
Input Offset Current
100
20
3.0
2.5
_LT1018 VCM v-LTl018 JCM-\v+) 1V
-m."'~
,
LTlO17,cM=IV+)i1V
1
-50 -25 0
~ 2.0
~
/
fi!IJ
REVERSES
. POLARITY
j
~
/
r-r--
25 50 75 100 125 150
TEMPERATURE (0C)
1£010
2.
;!!;
~
0.5
o
-50
LT1018 +Ie
'- -'\ 1
\ 1
\11
LT1018 -Ie
LT1017 +Ie
11\
f\, 1\
LT1017 -Ie
15
Xl
'"
~ 1.5
r--
>-
.-<
VI
V
~
-25
0 25 50 75
TEMPERATURE (0C)
100 125
o L.,
-20
fL .~
-0.2 -0.1
0
0.1
0.2
DIFFERENTIAL INPUT VOLTAGE (V)
,.....
20
6-47
LT1017/LT1018
TYPICAL PERFORmAnCE CHARACTERISTICS
Input Bias Current with Inputs
Driven Below the Supply
Supply Current
v+ Common·Mode Limits
160
100
i:~~HfftfH I -i
VSUPl'Ly=20V
140
l/'/' /
~ 10
I13
!
125°e
1
~
'-C 'ti we
~
'"
I J
~ -0.4
<.:>
-0.6
/1/
0.01
0.2
V-
-0.2 -0.4 -0.6 -0.6
COMMON-MODE VOLTAGE (V)
-1.0
Positive Supply Current
0
10
1,.A
LT1016
Vs 5V
<" 60
-
LT1017
VS=5V
~
a:
=>
<.:> 40
~=>
20
o
-50 -25
6-48
I
I
0
25°C./
/
~
'/
'~"
<.:>
W
10;,A
!5
<.:>
55°e- I-- -
~ l\
RL(LT1016)
RL(LT1017)
VOUT 90%
VOVERORIVE
~
125 150
~=>
100mA
47kll
200Kll_
VFINAL 5mV -
10
~
5
10
20 3040
TOTAL SUPPLY VOLTAGE (V)
1
100 i=LT1017
~. RISE
-",,",:'"
F~
-
LT1016
RISE
--'
;:;
I
I
~
I
Output Delay
LT1017
LT1017
RISE
1
Ib
40
20
~
"G1017
60
o
lT1b16
FALL
~
VOUT 10%VFINAL
LT1017
FALL
~II
l'C
LT1016
"
11'IoJJ'I~
•
~~ 10~~R~ISEII~~~~JftlA10m1i6~~~1I1
FALL
1"0.
I
~\
25 50 75 100 125 150
TEMPERATURE (OC)
25
50 75 100
TEMPERATURE (0C)
1111L .......
I-
0
1oo,.A
1mA
10mA
SINK CURRENT (rnA)
t::
~~
-
LT1017
OUTjUTS ilGH
LT1016
60
ii'i
a:
w
z
'"
0
t::
:;;
::;
I-
'/
:;;
i=
LT1016
VS=40V
LT1017
VSi40V
I-
~
- '-,
'" \
§.
IZ
v
Total Switching Time
100
OUTPUT SHORTED TO V+
t::
1/
~
V
Output Sinking Current Limit
f--
OUTPUT SHORTED TO V+
125°e
100
-
Output Sinking Current Limit
!
1
10
OUTPUT SINK CURRENT rnA
.....:: f:::-- ~:t0W
100
t::
10
0.1
I J
lT101~
-50 -25
NPN Output Saturation Voltage.
'"
1i:
LT1016
OUTPUTS HIGH
o
25 50 75 100 125 150
TEMPERATURE (0C)
V
l'"
~100
0
20
VOLTAGES ARE REFERRED TO SUPPLIES
LT1017
I'
60
80
60
.l
LT1016
~
=>
:;;
::;
~
<.:>
'" 40
~
1k
100
100
1000
~
~
......-V
~
~ VAVos=0.5mV
-0.6
-50 -25
10k
a:
=>
<.:>
~~
Z -0.2
J
J
..I
o
:;;
I-
~
T T
v-
~
o
:;;
25°e
;;: 0.1
LT1016
OUTPUTS LOW
_120
l-
I. J
I
1
-50 -25
0
25 50 75 100 125 150
TEMPERATURE (OC)
1
10
OVERDRIVE (mV)
100
LT1017/LT1018
TYPICAL PERFORmAnCE CHARACTERISTICS
Transition Time
100
Positive Transition Time
10
10% VFINALSVOUTS90% VFlNAL
VOVERORIVE 10mV
~
,.
I--
LT1b17
RISE
w
;=
10
z
0
-
z
'"
~
>-
./
/. , /
,
o
L
LT1018
FALL
10
20
30
TOTAL SUPPLY VOLTAGE (V)
1k
40
g 32,
:>
'"
:A r/
~V
LT101~
/'
V~40V
LT1018
Vsup=2V
'/
I--I--
10% VFINAL"VOUTS90% VFINAL
VOVERDRIVE = 1OmV
0.1
10k
WOk
PULL-UP RESISTOR ([I)
1M
LT1017 Response Time
V+=5V;V-=OV
VIN=100mV WITH
10mV OVERDRIVE
5
4
.,.
r7
I
LT1017 Response Time
:E
LT1017
Vsup=2~
LT1 017 FALL!
LT1018 RISE
E
1
LT1017
VSUP 40V
]
:>
1
0
V+=5V; V-=OV
VIN = 100mV WITH
10mV OVERDRIVE
~
1
o
z
z
:>
:>
o
o 5 10 15 20 25 30 35
TIME(,..)
5 10 15 20 25 30 35
TIME(,..)
LT1018 Response Time
LT1018 Response Time
V+=5V; v-=ov
VIN=100mV WITH
10mV OVERDRIVE
]
:>
V+=5V; V-=OV
VIN = 100mV WITH
10mV OVERDRIVE
5
4
~
1
o
z
z
:>
:>
o
o
2 4 6 8 10 12
TIME(,..)
2 4 6 8 10 12
TIME (,..)
APPLICATions
Driving Relays
+12V
Increasing Positive Output Current
Delay On Power Up
v+
v+
> ..........-VOUT
s
V1k
6-49
LT1017/LT1018
APPLICATions
LT1017 Op Amp, Av = 100
LT10180p Amp, Av= 100
5V
5V
> .....-r-VOUT
R1'
>'+-"'r-VOUT
-5V
1MO
10k\}
10kO
RL = 100k
BANDWIDTH =30Hz
- SLEW = 320V1m,
+SLEW=0.93V/m,
'WITH R1 =1k
BANDWIDTH ,,200Hz
150
1;0.22#
10\}
-SLEW = 2:i':5V/ms
+SLEW=O.017V/ms
BANDWIDTH =O.3Hz@RL=220k
2,Wire Comparator
Negative Voltage Regulator
4.7k
~SUPPLY
510kO ~
L--OUTPUT
LT1004
2.5V
> ....-1~-- VOUT
-5V@50mA
4.7k
~SUPPLY
100kO
1kO
L-OUTPUT
T220PF
L...----....-------=~.I~VTO
-40V
Precise Tri,Wave Generator
5V Power Supply Monitor
5V
3k
TRIANGLE WAVE
.----4---+1"----------..---------.-----OUTPUT
..
(O.5V TO 2.5V)
V+
36.5k'
2.5k'
OUTPUT HIGH FOR
4.5V "v IN ,,5.5V
SQUARE WAVE
OUTPUT
LT1034
1.235V
11.2k'
'1% RESISTOR
6-50
OUTPUT VALID
FORV+,,1.1V
LT1009
2.5V
LTl017/LT1018
APPLICATions
Power Supply Monitor
1.5V Input Flyback Regulator
6V
160k
22~F
1.5V
3300
~----------.-.....,+ ~
2M
100k
1M
220pF
100k
1N414B
LT1004
1.2V
HP50B2·2B10
1N414B
120k
VIN
600V
5.25V
5.00V
475V
LED
OFF
FLASH AT 1Hz
FLASH AT 3Hz
FLASH AT 5Hz
t---"\o,.,.,--+-,OUTPUT 5V
365k"
562k'
110k
-=
LT1004
1 2V
-=
120k 1N4148
+
T47~F
'1 % FILM RESISTOR
L1 =RL1123·4 7·RENCO, INC
BO% EFFICIENCY AT 2mA OUTPUT
Regulated Up Converter
low Power' Vto FConverter
5V
3M
OkHz-1kHz
OUTPUT
9V
~",+...*-........._OUTPUT
10V,2mA
FULL SCALE
TRIM
OV-1V
INPUT
~W'I~""'NI"""_""''''''"",
1N414B
LT1004
1.2V
2000pF
100k
220pF
IN414B
10k
fVOUT=1.2 (1
+;.)
"OALE TE·5/03/400mH
LT1034
1.2V
1M
330k
b
R2t
120k
o 1~F
.".
'la"350~
11 % RESISTOR
6-51
LT1017/LT1018
APPLICATions
Fully Isolated Limit Comparator
5V
INTERROGATE PULSE
INTERROGATE
PULSE
500,..
-11-
OUTPUT PULSE-DVIN>VTRIP
NO OUTPUT PULSE FOR VIN
A/'£.
0.009-0.015
(0.229-0.381)
tJ
0.045 .. 0.015
(1.143 .. 0.381)
0.100 .. 0.010
(2.5.ro.,o.254)
NOTE LEAD DIAMETER IS UNCONTROLLED BETWEEN
THE REFERENCE PLANE AND SEATING PLANE.
6-52
.
765
2
3
t
0.250 .. 0.010
~0.254)
4
~'''Y''llnlt\l2
~,
TECHNOLOGY~-M-ic-r-O-p-o-w-e-r-D-u-a-I-C-o-m-p-a-r-a-to-r
FEATURES
•
•
•
•
•
•
•
LT 10l7CS/LTl 0l8CS
DESCRIPTion
1mV
1SnA
70mA
Maximum Offset Voltage
Maximum Bias Current
Typical Output Drive
Operates from 1.1V to 40V
Internal Pull-Up Current
Output Can Drive Loads Above V+
3O,.J. Supply Current (LT1017)
110,.J. Supply Current (LT1018)
APPLICATions
The LT1017 and LT1018 are general purpose micropower
comparators. The LT1017 is optimized for lowest operating power while the LT1018 operates at higher power and
higher speed. Both devices can operate from asingle 1.1V
cell up to 40V. The output stage includes a class "B" pullup current source, eliminating the need for an external resistive pull-up and saving power. The output stage is also
designed to allow driving loads connected to a supply
more positive than the device, as can comparators with
open collector output stages.
Input specifications are also excellent. On-chip trimming
minimizes offset voltage, while high gain and commonmode rejection ratio keep other input-referred errors low.
Common-mode voltage range includes ground. Special circuitry prevents false output states even if the input is
overdriven.
• Power Supply Monitors
• Relay Driving
• Oscillators
Supply Current
1.5V Powered Refrigerator Alarm
V+...-_....-_...,
160
1.5V
LT1018
OUTPUTS
140
665k'
_ 120
665k'
52.3k·
3
OUTPUT HIGH FOR
O°C "T ,,5°C
~100
'"
gs
80
i
60
'"
40
<.>
YSI44011
258.3k@5°C
333.1k@0°C
'1 % RESISTOR
~
:!
t-'"
r-
IIII
LT1018
OUTPUTS
HIGH
bbill
LT1017
OUTPUTS
20
o
LT1017
OUTPUTS
LOW
~
lTh
1
4
10
20
40
TOTAL SUPPLY VOLTAGE (V)
6-53
LT1017CS/LT1018CS
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage ..................................... 40V
Differential Input Voltage ........................... 40V
Input Voltage ............................. - 0.3V to 40V
Short Circuit Duration ......................... Indefinite
Operating Temperature Range ............... OOC to 70°C
Storage Temperature Range ............ - 65°C to 150°C
Lead Temperature (Soldering, 10 sec) .............. 300°C
ORDER PART
NUMBER
LT1017CS
LT1018CS
PART MARKING
LT1017CS
. LT1018CS
S16 PACKAGE
PLASTIC SOL
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
Offset Voltage
(Note 1)
Bias Current
to.75VsVss t20V
. to.75VsVss t20V
Offset Current
to.75VsVss t20V
Common·Mode Rejection Ratio
Vs= t20V, -2OVsVC!.is19.1V
Power Supply Rejection Ratio
to.75VsVss t20V
Gain
No Load, Vour= t19.9V(Note2)
Rl =4k, VOUT= t 19V
Output Sink Current
Output Source Current
Output Source Current
6-54
V+ =4.5V, V- =0
Overdrlve>30mV
V+ =4OV, V- =0
VIN = 5mV, VOUT = 0.4V
V+ = 1.2V, V- =0
VIN=5mV, Vour= 0.4V
MIN
25°C
•
25°C
•
25°C
•
25°C
•
25°C
•
25°C
•
25°C
•
25°C
•
25°C
•
25°C
•
105
100
96
95
110
105
100
LT1017
TYP
0.4
0.5
5
7
0.4
0.5
115
115
110
105
115
115
110
94
30
25
30
25
25
15
65
50
75
70
35
20
MAX
MIN
1
1.4
15
25
2
3
105
100
96
95
LT1018
TYP
0.4
0.5
15
18
1
1.6
115
115
110
105
125
120
110
110
105
100
94
35
70
25
50
75
250
50
220
70 . 140
45
120
MAX
1
1.4
75
100
8
12
UNITS
mV
mV
nA
nA
nA
nA
dB
dB
dB
dB
dB
dB
dB
dB
mA
mA
~
~
~
~
LT1017CS/LT101BCS
ELECTRICAL CHARACTERISTICS
PARAMETER
Negative Output Saturation
Positive Output Saturation
CONDITIONS
10UT=0
=O.lmA
=lmA
=10mA
=30mA
10ur=0
=O.lmA
=lmA
=10mA
=30mA
MIN
V+ =4.5V, V- =0
VIN = -10mV
lour=O
= 10iVC+~
A+B="1" WHEN
VC-~"'VIN:SVc+~
BOUT="1" WHEN
VIN
en
0.10
0.01 1<----'-_-'-_""-----'._--'
0.1
1
10
100
1,000 10,000
SAMPLING FREQUENCY, fs (Hz)
™Is atrademark of linear Technology Corporation.
LTCMOS
6-57
LTC1040
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Total Supply Voltage (V+ to v- ) . . . . . . . . . . . ... 18V
InputVoltage .......... (V+ +O.3V)to(V- -O.3V)
Operating Temperature Range
LTC1040C ................... -40°Ct085°C
LTC1Q40M .................. -55°Ct0125°C
Storage Temperature Range ....... - 55°C to 150°C
Lead Temperature (Soldering, 10 sec.) ........ 300°C
Output Short Circuit Duration ........... Continuous
TEMPERATURE
RANGE
ORDER
PART NUMBER
- 55°C to 125°C
-40°C to 85°C
LTC1040MJ
LTC1040CN
LTC1040CJ
ELECTRICAL CHARACTERISTICS
Test conditions: V+ =5V, V- = -5V, TMINSTASTMAX unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
Vos
Offset Voltage (Note 1)
Split Supplies ± 2.BV to ± 6V
Single Supply (V- =GND) +2.BV to 6V
Split Supplies ± 6V to ± BV
Single Supply (V- =GND) +6V to + 15V
Split Supplies ± 2.BV to ± BV
Single Supplies (V- =GND) +2.B to +16V
I BIAS
RIN
CMR
PSR
Tracking Error
between Input Pairs
(Notes 1 and 2)
Input Bias Current
Average Input
Resistance
Common·Mode Range
Power Supply Range
ISION )
Power Supply ON
Current (Note 4)
ISIOFF)
Power Supply OFF
Current (Note 4)
Response Time
(Note 5)
A,B,A+Band
ON/OFF Outputs (Note 6)
Logic" 1" Output Voltage
Logic "0" Output Voltage
STROBE Input (Note 6)
Logic" 1" Input Voltage
Logic "0" Input Voltage
External Timing
Resistor
Sampling Frequency
to
VOH
VOL
VIH
VIL
REXT
Is
6-58
MIN
TA = 25°C, OSC = GNO
Is = 1kHz (Note 3)
Split Supplies
Single Supplies (V =GND)
V+ = 5V, Vpp On
V+ = 5V,Vpp 011
LTC1040C
LTC1040M
TA=25°C
V+ =4.75V, 10UT= -360p.A
V+ =4.75V, louT= 1.6mA
V+=5.25V
V+ =4.75V
Resistor Tied between V+ and OSC Pin
TA=25°C, REXT =1MIl, CEXT =0.1p.F
LTC1040M/LTC1040C
TYP
MAX
UNITS
•
±0.3
±0.5
mV
•
±1
±3
mV
•
•
•
•
•
•
••
0.05
20
±0.3
30
1.2
•
2.4
•
•
2.0
•
%
nA
Mil
V+
V
±2.B
+2.B
60
0.1
±B
+16
3
V
V
V
mA
0.001
0.001
BO
0.5
5
100
p.A
p.A
p'S
4.4
0.25
0.4
V
V
1.6
1.0
100
5
O.B
10,000
V
V
kll
Hz
LTC1040
Note 4: Average supply current = to x IS(ON) xiS + (1- to x IS) x
IS(OFF).
Note 5: Response time is set by an internal oscillator and is independent
01 overdrive voltage.
Nola 6: Inputs and outputs also capable 01 meeting EIAI JEOEC B series
CMOS specifications.
The. denotes the specilications which apply over the lull operating
temperature range.
Nole 1: Applies over input voltage range limit and includes gain
uncertainty.
Note 2: Tracking error=(VIN1-VIN2)/VIN1.
Note 3: RIN is guaranteed by design and is not tested.
RIN = 1I(IS x 33pF).
TYPICAL PERFORmAnCE CHARAOERISTICS
Normalized Sampling
Frequency vs Supply Vonage
and Temperature
Peak Supply Current vs
Supply Voltage
20
2.2
j
18
1/
16
j
14
;/25~
;( 12
E
~ 10
}
o ..-.~
WC/
V //
/ / ./
/ ./ ~'c- f-~V
'-,
6
2
~
2.0
iii
=>
S'i_
1.8
10
12
SUPPLY VOLTAGE. v+ (V)
14
VA=125'C
~~
««
1.4
en "'
@?
1.2
~-
:=;
o
'"
"
W
:=;
F
!ll
"-
0.8
:z.
~\
I
......
I
o
4
""""
TA- -wc
6
8
10 12
SUPPLY VOLTAGE. V + (V)
14
i ~II~'
.......
80
70
-
~
....~
Vpp Output Voltage vs Load
Current
>
§:1011
~ 0.2
x
~ 0.4
~1010
90
0.1 ,---,--,--,1...J.1..J...Ll.
1'-'---L--,r--.....J!IoJu...u.lJ
lOOk
1M
10M
REXT (0)
16
Input Resistance vs Sampling
Frequency
T~=25'~
III
z
~
\\
TA=25'C
1.0
16
100
~
\
~~ 1.6
Response Time vs Supply
Voltage
110
R~lM. b=O.1.F
\
"'u
0.6
8
Sampling Rate vs REXT, CEXT
~
g
~ 10
en
~
B.,
~
2
6
8
10
12
SUPPLY VOLTAGE. V+ (V)
14
16
107
\' \ l'\.
~ 0.6
~~~
~ 0.8
g~ 10.
g
~-LJ..WJII.......I.-l..WIIJL...L.LWWL-L.3o..U.wJI
1
10
10 2
103
10 4
SAMPLING FREQUENCY. fs (Hz)
VV+=10V
.......;
V+=16V
V+=2.~ t-.... ........ ~ ~
.......
....... ~
)+~
" "
1.2
5
~ 1.6
8
10
50
:~ ~
o
~~ ~IIPII~IIII ~~
60
~
....
1.4
1.8
2.0
0
1
2
3 4 5 6 7
LOAD CURRENT. Il (rnA)
8
9
10
6-59
LTC1040
TYPICAL PERFORmAnCE CHARACTERISTICS
Quick Hookup Guide
Response Time vs
Temperature
130
Self-Oscillating
V+:5V
120
/
110
/
~100
~ 90
'~"
80
~
70
60
50
External Strobe
/"
,/
V
/'
V
/'
40
-50 -25
0
25
50
75 100
AMBIENTTEMPERATURE, TA (OC)
125
TEST CIRCUIT
V1NW-V+(18)
~
OUTPUT
GND(9)
.". V- (10)
ALL INPUTS ON OPPOSITE COMPARATOR AT GROUND
BLOCK DIAGRAm
III
GND
6-60
~
V-
LTC1040
APPLICATions InFoRmATion
The LTG1040 uses sampled data techniques to achieve
its unique characteristics. Some of the experience acquired using classic linear comparators does not apply to
this circuit, so a brief description of internal operation is
essential to proper application.
The most obvious difference between the LTG1 040 and
other comparators is the dual differential input structure.
Functionally, when the sum of inputs is positive, the comparator output is high and when the sum of the inputs is
negative, the output is low. This unique input structure is
achieved with GMOS switches and a precision capacitor
array. Because of the switching nature of the inputs, the
concept of input current and input impedance needs to be
examined.
The equivalent input circuit is shown in Figure 1. Here,
the input is being driven by a resistive source, Rs, with a
bypass capacitor, Gs. The bypass capacitor mayor may
not be needed, depending on the size of the source resistance and the magnitude of the input voltage, VIN.
charge is shared between Gs and GIN. The change in
voltage on Gs because of this charge sharing is:
GIN
.1V=VIN X GIN +Gs
This represents an error and can be made arbitrarily small
by increasing Gs.
With the addition of Gs a second error term caused by the
finite input resistance of the LTG1040 must be considered. Switches S1 and S2 alternately open and close,
charging and discharging GIN between VIN and ground.
The alternate charge and discharge of GIN causes a current to flow into the positive input and out of the negative
input. The magnitude of this current is:
liN = q x fs = VIN GIN fs
where fs is the sampling frequellcy. Because the input
current is directly proportional to input voltage, the
LTG1 040 can be said to have an average input resistance . .
of:
~
R - -.y!!! __1_
IN - liN - fs GIN
1
fs x33pF
(see typical curve of RIN vs fs). Avoltage divider is set up
between Rs and RIN causing error.
Figure 1. Equivalent Input Circuit
For Rs<10kO
Assuming Gs is zero, the input capacitor, GIN, charges to
VIN with a time constant of Rs GIN. When Rs is too large,
GIN does not have a chance to fully charge during the
sampling interval ("'" 80f.tS) and errors will result. If Rs
exceeds 10kO a bypass capacitor is necessary to minimize errors.
For Rs>10kO
For Rs greater than 10kO, GIN cannot fully charge and a
bypass capacitor, Gs , is needed. When switch S1 closes,
The input voltage error caused by these two effects is:
l
GIN
Rs \
VERROR = VIN ,GIN + Gs + Rs + RIN
t
Example: fs = 10Hz, Rs = 1MO,
Gs=1jtF, VIN=1V
106
)
33X10- 12
VERROR = 1V ( 1 X 10- 6 + 106 +3 x 109
= 33jtV + 330jtV = 363jtV.
Notice that most of the error is caused by RIN. If the
sampling frequency is reduced to 1Hz, the voltage error
is reduced to 66jtV.
6-61
LTC1040
APPLICATions InFoRmATion
Minimizing Comparison Errors
Tracking Error
The two differential input voltages, V1 and V2, are converted to charge by the input capacitors CIN1 and CIN2
(see Figure 2). The charge is summed at the virtual
ground pOint and if the net charge is positive, the comparator output is high and if negative, it is low. There is an
optimum way to connect these inputs, in a specific application, to minimize error.
Tracking error is caused by the ratio error between CIN1
and CIN2 and is expressed as a percentage. For example,
consider Figure 3(a) with VREF = 1V. Then at null,
CIN1
VIN =VREF CIN2 =1V± 1mV
because CIN1 is guaranteed to equal CIN2 to within 0.1 %.
(a) OK
(b) Optimum
Figure 3. Two Ways to Do It
Figure 2. Dual Differential Equivalent Input Circuit
Ignoring internal offset, the LTC1 040 will be at its switching point when:
V1 XCIN1 +V2XCIN2=0.
Optimum error will be achieved when the differential
voltages, V1 and V2, are individually minimized. Figure 3
shows two ways to connect the LTC 1040 to compare an
input voltage, VIN, toa reference voltage, VREF. Using the
above equation, each method will be at null when:
Common-Mode Range
The input switches of the LTC 1040 are capable of switching to either the V+ or V- supply. This means that the input common-mode range includes both supply rails.
Many applications, not feasible with conventional comparators, are possible with the LTC1040. Inthe load current detector shown in Figure 4, a 0.10 resistor is used to
sense the current in the V+ supply. This application requires the dual differential input and common-mode
capabilities of the LTC1040.
(a) (VREF - OV) CIN1 - (OV - VIN) CIN2 = 0
or VIN =VREF (CIN1 /CIN2)
(b) (VREF-VIN) CIN1- (OV-OV) CIN2=0
or VIN = VREF .
Notice that in method (a) the null point depends on the
ratio of CIN1 /CIN2, but method (b) is independent of this
ratio. Also, because method (b) has zero differential input
voltage, the errors due to finite input resistance are
negligible. The LTC1040 has a high accuracy capacitor
array and even the non-optimum connection will only
result in ± 0.1 % more error worst-case compared to the
optimum connection.
6-62
OUT
Vs
-=.!,
OUT~HIIF·IL>1A
DUT~LO
IF IL <1A
Figure 4. Load Current Detector
LTC1040
APPLICATions InFoRmATion
Offset Voltage Error
The errors due to offset, common-mode, power supply
variation, gain and temperature are all included in the offset voltage specification. This makes it easy to compute
the error when using the LTC1040.
In a ratiometric network (see Figure 6), the inputs are all
proportional to VPP. Consequently, for small changes, the
absolute value of Vpp does not affect accuracy.
Example: error computation for Figure 4.
Assume: 2.BV$.Vs$.6V.
Then total worst-case error is:
I l(ERROR) = ±(100mV x
0.~01 +0.5;V) x 10~mv =
Tracking Error
The Vpp output voltage is not precise (see Vpp Output
Voltage versus Load Current curve). There are two ways
Vpp can be used to power external networks without excessive errors: (1) ratiometric networks and (2) fast settling references.
,/Ir---..------- ....__
6.81k
~_+_COOL
10M
82k*
COOL
olpF
SEPARATION
(20mV)
TIME
20M
tTHERMISTOR # 44007
YELLOW SPRINGS INSTRUMENT CO , INC
• HYSTERESIS ~ 5V x
~J'~ ~ 20mV
Window Comparator with Independent Window Limits and Fully Floating Differential Input
AOUT~"l"
VU-+++.......t-
VL
WHEN
VIN>VU
WHEN
-~=Hh+~~~~~~~~r BOUT="1"
VINVU= VTRIP :12:~~V) Rl =0.996 VTRIP+20mV
OUT="I" WHEN VINVA+(Vl-V2)
6-67
LTC1040
PACKAGE DESCRIPTiOn
Dimensions in inches (millimeters) unless otherwise nbted.
J Package
18 Lead Hermetic DIP
0.025
(0.635)
RAD
0.220-0.310
(5.590-7.870)
~~"T"""r."T-r::-r-T":"T""T-:-r-r-::T"""T::T"'-.l
.!l!!
'j
m=__. .
0.290-0.320
rc-~
+00-150
r
I~I
I
90°::1:4°
+(0.203-0.460)
t-- (9.779,&S3?)-+t
0.200
(5080)
0.038-0.068
TV'
~j~w
(~:O)
-j~~
_0._'0_0=_0_.0_'0
(2.540=0.254)
(0.360-0.660)
N Package
18 Lead Plastic DIP
1------(~i':o)-------1
MAX
r
0.300-0.320
"1
1/620-S.,28)11
A
L t
0.065
(1.651)
~'---.~-----------r+-----~
i= --
0.130::1:0.005
(3.302±:O.12~L.-.-
t~t(3.175)
MIN
0.009-0.015
(0.229-0.381)
0.325 ~~:~~;
(8255~~::)
6-68
0.045:1::0.015
(1.143=0.381)
!.- 0.100=0.0~·'0
(2.540=0.254)
L
0.018:i::O.OO3
(0.457 .. 0.076)
0.125
(3.175)
MIN
L'-Y1TEClnHNf.I\Ol.J0G_~Q~_____L_Tc_lo_41
....A..,
IT
FEATURES
BANG-BANG Controller
DESCRIPTiOn
• Micropower 1.5p.W (1 Sample/ Second)
• Wide Supply Range 2.8V to 16V
• High Accuracy
Guaranteed SET POINT Error ±0.5mV Max.
Guaranteed Deadband ± 0.1 % of Value Max.
• Wide Input Voltage Range V+ to Ground
• TTL Outputs with 5V Supply
• Two Independent Ground-Referred Control Inputs
• Small Size 8-Pin MiniDlP
The LTC1 041 is amonolithic CMOS BANG-BANG controller
manufactured using Linear Technology's enhanced
LTCMOSTM silicon gate process. BANG-BANG loops are
characterized by turning the control element fully ON or
fully OFF to regulate the average value of the parameter to
be controlled. The SET POINT input determines the average control value and the DELTA input sets the deadband.
The deadband is always 2 x DELTA and is centered around
the SET POINT. Independent control of the SET POINT and
dead band , with no interaction, is made possible by the
unique sampling input structure of the LTC1041.
APPLICATions
An external RC connected to the OSC pin sets the sampling rate. At the start of each sample, internal power to
the analog section is switched on for"" 80p.s. During this
time the analog inputs are sampled and compared. After
the comparison is complete, power is switched off. This
achieves extremely low average power consumption at
low sampling rates. CMOS logic holds the output continuously while consuming virtually no power.
•
•
•
•
Temperature Control (Thermostats)
Motor Speed Control
Battery Charger
Any ON-OFF Control Loop
To keep system power at an absolute minimum, aswitched
power output (Vpp) is provided. External loads, such as . .
bridge networks and resistive dividers, can be driven by . . .
this switched output.
The output logic sense (Le., ON = V+ ) can be reversed
(Le., ON =GND) by interchanging the VIN and SET
POINT inputs. This has no other effect on the operation of
the LTC1041.
Supply Current vs Sampling Frequency
Ultra Low Power 50°F to 100°F (2.4p.W) Thermostat
26VAC 2 WIRE
THERMOSTAT
10000 r - - - - r - - , - - - r - - - - r - - ,
VS=6V
1000 f---+--f--+---f---.-Si'I
~
100
I---+--f---!-:UI----l
10
I---+--f--b't---I----j
~
Ii'!
~
<.:>
i
1f---+~A--r-~-~
ijl
0.1
ALL RESISTORS 1%.
tYELLOW SPRINGS INSTRUMENT CO., INC. PIN 44007
DRIVING THERMISTOR WITH Vpp ELIMINATES 3.8'F
ERROR DUE TO SELF-HEATING.
1--74-+--+--+-""
1
10
100
1000
SAMPLING FREQUENCY, Is (Hz)
10000
™Is a trademark of linear Technology Corporation
LTCMOS
6-69
LTC1041
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Total Supply Voltage (V+ to V-) . . . . . . . . . . . . .. 18V
Input Voltage .......... (V+ + 0.3V) to (V- - 0.3V)
Operating Temperature Range
LTC1041C ................... -40°Ct085°C
LTC1041M .................. -55°Ct0125°C
Storage Temperatu re Range ....... - 55 ° Cto 150 ° C
Lead Temperatu re (Solderi ng, 10 sec. ). . . . . . . . 300 ° C
Output Short Circuit Duration ........... Continuous
'-'
ON/OFFg;
VI~~
lTC1041
SfT POINT 3
GNo[3
~v
~vpp
~osc
~DELTA
TEMPERATURE
RANGE
ORDER PART
NUMBER
- 55°C to 125°C
- 40°C to 85°C
LTC1041MJ8
LTC1041CN8
N8 PACKAGE
PLASTIC DIP
JB PACKAGE
HERMETIC DIP
ELECTRICAL CHARACTERISTICS
Test Conditions: Y+ =5Y, TMIN:sTA:sTMAX unless otherwise specified.
SYMBOL
LTC1041M/LTC1041C
MAX
MIN
TYP
PARAMETER
CONOITIONS
SET POINT Error (Note 2)
v+ =2.8V to 6V (Note 1)
±0.3
+
±0.05
±1
+
±0.05
±0.6
+
±0.1
±2
+
±0.1
±0.3
•
V+ =6V to 15V (Note 1)
•
Deadband Error (Note 3)
V+ =2.8V to 6V (Note 1)
•
V+ =6V to 15V (Note 1)
los
Input Current
RIN
Equivalent Input Resistance
Input Voltage Range
Power Supply Range
Power Supply ON
Current (Note 5)
Power Supply OFF
Current (Note 5)
Response Time (Note 6)
ON IOFF Output (Note 7)
Logical "1" Output Voltage
Logical "0" Output Voltage
External Timing Resistor
Sampling Frequency
PSR
IS(ON)
IS(OFF)
to
VOH
VOL
REXT
fs
V+ = 5V, Vpp ON
V+ = 5V, Vpp OFF
LTC1041C
LTC1041M
V+ =5V
V+ =4.75V, 10UT= -360pA
V+=4.75V,l oUT =1.6mA
Resistor Connected between V+ and OSC Pin
V+=5V, TA=25°C,
REXT =lM CEXT =O.lI'F
The. denotes the specifications which apply over the full operating
temperature range. The shaded electrical specifications indicate those
parameters which have been improved or guaranteed test limits provided
for the first time.
Note 1: Applies over input voltage range limit and includes gain
uncertainty.
Note 2: SET POINTerror= (VU;VL) -SET POINT
where Vu= upper band limit and VL = lower band limit.
6-70
•
V+=5V, TA =25°C, OSC=GND
(VIN' SET POINT and DELTA Inputs)
fs= 1kHz (Note 4)
•
•
•
•
••
10
GND
2.8
•
•
2.4
60
±0.5
+
±0.1
±3
+
±0.1
±1
+
±0.2
±6
+
±0.2
15
1.2
V
16
3
0.001
0.001
80
0.5
5
100
4.4
0.25
100
5
0.4
10,000
UNITS
mV
% of DELTA
mV
% of DELTA
mV
% of DELTA
mV
% of DELTA
nA
MO
V
V
mA
pA
pA
,..s
V
V
kO
Hz
Note 3: Deadband error=(V u- Vd- 2 x DELTA where Vu= upper band
limit and VL= lower band limit.
Note 4: RIN is guaranteed by design and is not tested.
RIN = 1/(fsx 66pF).
Note 5: Average supply current=tox IS(ON)xfs+(l-toxfs) IS(OFF)'
Note 6: Response time is set by an internal oscillator and is independent
of overdrive voltage. to= Vpp pulse width.
Note 7: Output also capable of meeting EIAI JEDEC standard B series
CMOS drive specifications.
LTC1041
TYPICAL PERFORmAnCE CHARACTERISTICS
Normalized Sampling
Frequency vs V+ ,
Temperature
20
j
18
1/25~
12
10
55°C /
V //
/ / /
2
-~ 6
14
1.8
~~
1.6
~~
1.4
\
VA=125°C
\ 1\
C1.i~
o.$' 1.2
TA=25·C
~- 1.0
/ ./ 1/,';'5°C-I f---~V
8
10
12
SUPPLY VOLTAGE, V+ (V)
@
0: _
Sampling Rate vs REXT, CEXT
R~ 1M, b=o.l~F
\
2.0
15
j
14
o
~
/
16
i
-;:
j
2.2
o
0.8
Z
0.6
16
1\.\
'\
I
o
-
I
TA-
55·C
4
6
8
10 12
SUPPLY VOLTAGE, V+ (V)
14
REXT (0)
Response Time vs Supply
Voltage
110
0.1 '----'-_JL..l
.....l.................._""'--....
~___...........
lOOk
1M
10M
16
Response Time vs Temperature
130
T!=25oh
V+ =5V
/'
120
100
110
~
90
',..,
ui
~
III
80
l.-
f.-' f.-'
~
~
m 70
!ll
80
70
60
60
50
50
2
6
8
10
12
SUPPLY VOLTAGE, V+ (V)
14
:;I
+
02
0.4
16
is
gs
~x
\\ [\.
~1010
~~~
0.8
l/V+=10V
V+=2~ ~ I"'.......-- ~ r--.
.......
w
"'
>-
~ 1.4
o 1.6
;;;!
~ 1.8
i'..
V+=16V
ui
~
;5
I' ~I+~
....
>>- 2.0
'"'
Z
1
2
3 4 5 6 7
LOAD CURRENT, IL (mA)
8
9
10
109
V>
~
~
lOB
;!:
~
~
o
125
RIN vs Sampling Frequency
I~ ~
~ 1.0
!:;
~ 1.2
V
V
§: 1011
~
~ 0.6
V
lL
lL
40
-50 -25
0
25
50
75
100
AMBIENT TEMPERATURE, TA (·C)
Vpp Output Voltage vs Load
Current
i>
V
~100
:i
90
;::
L
107
L-L...U.WllJ.--L.,U,
1
10
10 2
10 3
SAMPLING FREQUENCY, Is (Hz)
10'
6-71
LTC1041
APPLICATions InFoRmATion
The LTC1041 uses sampled data techniques to achieve
its unique characteristics. It consists of two comparators,
each of which has two differential inputs (Figure 1).
When the sum of the voltages on a comparator's inputs is
positive, the output is high and when the sum is negative,
the output is low. The inputs are interconnected such that
the RS flip-flop is reset (ON/OFF=GND) when
VIN > (SET POINT + DELTA) and is set (ON IOFF = V+)
when VIN < (SET POINT - DELTA). This makes a very
precise hysteresis loop of 2 x DELTA centered around the
SET POINT. See Figure 1(b).
for Rs < 10kO
The dual differential input structure is made with CMOS
switches and a precision capacitor array. Input impedance characteristics of the LTC1041 can be determined
from the equivalent circuit shown in Figure 2. The input
capacitance will charge with a time constant of Rs x CIN .
The ability to fully charge CIN from the signal source during the controller's active time is critical in determining
errors caused by the input charging current. For source
resistances less than 10kQ, CIN fully charges and no error is caused by the charging current.
ON/OFF
(1)
i---SET POINT-
L-
SET
POINT
1 ~~
nElTA
(5)
00,
r
5
I
~
-OEA+ND~
o
6
I
I
osc
Vpp
(7)
(6)
cm
POWERONTL
I
GND L-_....L.-_ _L--I__...L...___
OV
VL
Vu
INPUT VOLTAGE, VIN
1-80",-1
(b)
(a)
Figure 1. LTC1041 Block Diagram
Figure 2. Equivalent Input Circuit
6-72
OELTA f-+OELTA-i
~v+~--~I----~--_~I
(3)
LTC1041
APPLICATions InFoRmATion
For Rs>10kO
For source resistances greater than 10kO, CIN cannot fully
charge, causing voltage errors. To minimize these errors, an
input bypass capacitor, Cs, should be used. Charge is
shared between CIN and Cs, causing a small voltage error.
The magnitude of this error is tN = VIN x CIN / (CIN + Cs).
This error can be made arbitrarily small by increasing Cs .
The averaging effect of the bypass capacitor, Cs, causes
another error term. Each time the input switches cycle
between the plus and minus inputs, CIN is charged and
discharged. The average input current due to this is
IAVG = VIN x CIN x fs, where fs is the sampling frequency. Because the input current is directly proportional
to the differential input voltage, the LTC1 041 can be said
to have an average input resistance of RIN = VIN / IAVG =
I/(fs XCIN).
Since two comparator inputs are connected in parallel,
RIN is one half of this value (see typical curve of RIN versus fs). This finite input resistance causes an error due to
the voltage divider between Rs and RIN .
The input voltage error caused by both of these effects is
VERROR = VIN [2CIN / (2CIN + Cs) + Rs / (Rs + RIN )].
Example: assume fs=10Hz,Rs=1M, Cs=1{tF,
VIN = 1V, VERROR = 1V(66{tV + 660{tV) = 726,N. Notice
that most of the error is caused by RIN. If the sampling
frequency is reduced to 1Hz, the voltage error from the
input impedance effects is reduced to 136{tV.
in the SET POINT and dead band is critical. These errors
may be defined in terms of Vu and VL .
=( -VU+VL)
2 - -SET POINT
dead band error =(Vu - VL) - 2 x DELTA
SET POINT error
The specified error limits (see electrical characteristics)
include error due to offset, power supply variation, gain,
time and temperature.
Pulsed Power (Vpp) Output
It is often desirable to use the LTC1 041 with resistive networks such as bridges and voltage dividers. The power
consumed by these resistive networks can far exceed
that of the LTC1 041 itself.
At low sample rates the LTC1 041 spends most of its time
off. A switched power output, Vpp, is provided to drive
the input network, reducing its average power as well.
Vpp is switched to V+ during the controller's active time
( z BO{ts) and to a high impedance (open circuit) when in- . .
ternal power is switched off.
~
Figure 3 shows the Vpp output circuit. The Vpp output
voltage is not precisely controlled when driving a load
(see typical curve of Vpp output voltage versus load current). In spite of this, high precision can be achieved in
two ways: (1) driving ratiometric networks and (2) driving fast settling references.
Input Voltage Range
The input switches of the LTC 1041 are capable of switching either to the V+ supply or ground. Consequently, the
input voltage range iAcludes both supply rails. This is a
further benefit of the sampling input structure.
Error Specifications
The only measurable errors on the LTC 1041 are the deviations from "ideal" of the upper and lower switching
levels [Figure 1(b)]. From a control standpoint, the error
Figure 3. Vpp Output Switch
6-73
LTC1041
APPLICATions InFoRmATion
In ratiometric networks (Figure 4) all the inputs are proportional to VPP. Consequently, the absolute value of Vpp
does not affect accuracy.
R1
Internal Oscillator
An internal oscillator allows the LTC1041 to strobe itself.
The frequency of the oscillation, and hence the sampling
rate, is set with an external RC network (see typical
curve, OSC frequency versus REXT, CEXT). REXT and
CEXT are connected as shown in Figure 1. To assure oscillation, REXT must be between 1OOkO and 1OMO. There is
no limit to the size of CEXT .
R2
Figure 4. Ratiometric Network Driven by Vpp
If the best possible performance is needed, the inputs to
the LTC1041 must completely settle within 4f-ts of the
start of the comparison cycle (Vpp high impedance to V+
transition). Also, it is critical that the input voltages do not
change during the BOf-ts active time. When driving resistive input networks with Vpp, capacitive loading should
be minimized to meet the 4f-ts settling time requirement.
Further, care should be exercised in layout when driving
networks with source impedances, as seen by the
LTC1041, of greater than 10kO (see For Rs > 10kO).
In applications where an absolute reference is required,
the Vpp output can be used to drive a fast settling
reference. The LTC1009 2. 5V reference settles in "'" 2f-tS
and is ideal for this application (Figure 5). The current
through R1 must be large enough to supply the LT1009
minimum bias current ( "'" 1mAl and the load current, IL.
v+
R1
~L
R2
LT1009-25
R3
R4
Figure 5. Driving Reference with Vpp Output
6-74
At low sampling rates, REXT is very important in determining the power consumption. REXT consumes power
continuously. The average voltage at the OSC pin is approximately V+ /2, giving a power dissipation of
PREXT =(V+ /2)2/ REXT .
Example: assume REXT = 1MO, V+ = 5V, PREXT =
(2.5)2/10 6 =6. 25f-tW. This is approximately four times
the power consumed by the LTC1041 at V+ = 5V and
fs = 1 sample/second. Where power is a premium, REXT
should be made as large as possible. Note that the power
dissipated by REXT is not a function of fs or CEXT .
If high sampling rates are needed and power consumption
is of secondary importance, a convenient way to get the
maximum possible sampling rate is to make REXT = 100kO
and CEXT =O. The sampling rate, set by the controller's active time, will nominally be "'" 1OkHz.
To synchronize the sampling of the LTC1041 to an external frequency source, the OSC pin can be driven by a
CMOS gate. A CMOS gate is necessary because the input
trip pOints of the oscillator are close to the supply rails and
TTL does not have enough output swing. Externally
driven, there will be a delay from the rising edge of the
OSC input and the start of the sampling cycle of approximately 5f-ts.
LTC1041
TYPICAL APPLICATions
Motor Speed Controller
V+
1N4002
MOTOR'
LT1009
20k
24k
SOOO
~-------+s DEADBAND
'CANNON CKT26-TS-3SAE
Battery Charger
GE 106Bt
100kO
12V
LEAD-=ACID ~
1N4002
2kO )~I---+----rn
2.21kO
10kO
130
1N4002
t SCR FIRES AT ZERO CROSSING.
'SET BATTERY VOLTAGE. BATTERY IS
MEASURED WITH ZERO CHARGE CURRENT.
6-75
LTC1041
PACKAGE DESCRIPTiOn
Dimensions in inches (millimeters) unless otherwise noted.
J Package
8 Lead Hermetic DIP
1Oi27)
0005t
MIN
~
(10.287)
(~~;)~D7M~6:Jr
I
RADTYP
0220-0310
(5588-7874)
0055
(1397)
MAX
Tjmax
15O"C
~
1
234
~
I
r--
EljA
100'C/W
N Package
8 Lead Plastic
0
t
1
0.300-0.320
0009-0015
(0.229-0.381)
tJ
0.045::1::0015
(1143::1:0.381)
0100::100010
(2540:i:O.254)
6-76
°.400~
765 r
(10160)
MAX
2
3
0250:0010
~0254)
4
.
0200
(5080)
MAX
~-Y"·llnll\D
LTC1042
~~
TECHNOLdG~~~-------W-i-nd-O-w--C-o-m-p-a-ra-to-r
FEATURES
DESCRIPTion
• Micropower 1.5,tW (1 Sample/Second)
• Wide Supply Range- +2.8V to +16V
• High Accuracy
Center Error ± 1mV Max
Width Error ± 0.15 %Max
• Wide Input Voltage Range
V+ to Ground
• TIL Outputs with 5V Supply
• Two Independent Ground·Referred Control Inputs
• Small Size 8-Pin MiniDIP
The LTC1042 is a monolithic CMOS window comparator
manufactured using Linear Technology's enhanced
LTCMOSTM silicon gate process. Two high impedance
voltage inputs, CENTER and WIDTH/2, define the middle
and width of the comparison window. Whenever the input
voltage, VIN, is inside the window the WITHIN WINDOW
output is high. The ABOVE WINDOW output is high
whenever VIN is above the window. By interchanging VIN
and CENTER the ABOVE WINDOW output becomes
BELOW WINDOW and is high if VIN is below the window.
Sampling techniques provide high impedance voltage inputs that can common-mode to both supply rails (V+ and
GND). An important feature of the inputs is their noninteraction. Also the device is effectively "chopper
stabilized", giving it extremely high accuracy over all
conditions of temperature, power supply and input voltage
range.
APPLICATions
• Fault Detectors
• Go/No·Go Testing
• Microprocessor Power Supply Monitor
Another benefit of the sampling techniques used to de·
sign the LTC1042 is the extremely low power consump- . .
tion. When the device is strobed, it internally turns on the . .
power to the comparators, samples the inputs, stores the
outputs in CMOS latches and then turns off power to the
comparators. This all happens in about 80"s. Average
power can be made small, almost arbitrarily, by lowering
the strobe rate. The device can be self-strobed using an
external RC network or strobed externally by driving the
OSC pin with aCMOS gate.
lTCMOSTM is atrademark of llnearTeohnology Corp.
Total Supply Current vs Sampling
Frequency
Battery Powered Remote Freezer Alarm
V+
,..-----150k
.. "HI"=TEMPERATURE
+--I~
BETWEEN
26'F AND 31 'F
*1°F
r6l---+-_ "HI"=TEMPERATURE
3V-16V
RI'
7.5k
ABOVE 31'F
"'I'F
10000
V+26V
_1000
:!
~
B
::;
a:
R2-
1il
576D
-'
V
I
0.1
0.01
~
V
V
10
;$
t=:
T=YELLOW SPRINGS INSTRUMENT CO" INC. PIN 44007.
ALL RESISTORS '" I % UNLESS OTHERWISE SPECIFIED.
'OTHER TEMPERATURE BANDS MAY BE SELECTED BY CHOOSING APPROPRIATE VALUES FOR RI AND R2.
)T
~
;:: 100
[7
0.1
KLTCI042 SUPPLY
TRENT
FOR THIS APPLICATION
fS"IHz
I
-
I---
I
10
100
1000
SAMPLING FREQUENCY, Is (Hz)
10000
6-77
LTC1042
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Total Supply Voltage (V+ to GND) .................... 18V
Input Voltage ........................ Y+ +0.3V to - 0.3Y
Operating Temperature Range
LTC1042C ............................ - 40°C to 85°C
LTC1042M ........................... - ~5°C to 125°C
Storage Temperature Range ............ ; - 55°C to 150°C
Lead Temperature (Soldering, 10 sec) .............. 300°C
Output Short Circuit Duration ................ Continuous
ORDER
PART NUMBER
TOP VIEW
LTC1042MJ8
LTC1042CN8
J8 PACKAGE
HERMETIC
N8 PACKAGE
PLASTIC
ELECTRICAL CHARACTERISTICSTest Conditions: TMINSTASTMAX unless otherwise specified
SYMBOL
PARAMETER
Center Error (Note 2)
TEST CONDITIONS
V+ = 2.8V to 6V (Note 1)
V+ =6V to 15V (Note 1)
Width Error (Note 3)
Input Bias Current
RIN
VO H
VOL
REXT
Average Input Resistance
Input Voltage Range
Power Supply Range
Power Supply ON
Current (Note 5)
Power Supply OFF
Current (Note 5)
Response Time (Note 6)
Output Levels
Logic 1Output
Logical 0 Output
External Timing Resistor
Is
Sampling Frequency
PSR
IS{ON)
IS(OFF)
To
V+ =2.BV t06V (Note 1)
V+ =5V, TA=25°C,OSC=GND
VIN, CENTER and WIDTH/21nputs
Is = 1kHz (Note 4)
V+ =5V
V+ =5V LTC1042C
LTC1042M
V+ =5V
V+ = 4.75V, lOUT = - 360~
V+ =4.75V, 10UT= 1.6mA
Resistor Connected between V+
and OSC Pin
V+ =5V, TA=25°C
REXT = 1MO, CEXT = 0.1 ~F
The. denotes the speclications which apply over the lull operating
temperature range.
Nole 1: Applies over input voltage range limit and includes gain
uncertainty.
Nole 2: Center error = [(Vu +VJ/2 - CENTER] (where Vu = upper band limit
and VL = lower band limit).
Nole 3: Width error = (Vu - VL- 2x WIDTH/2)(where Vu = upper band limit
and VL= lower band limit).
6-78
•
+
+
±0.05
±0.6
•
+
±0.1
±2
•
+
±0.1
±0.3
•
•
•
•
••
10
GND
2.8
••
2.4
'.
TYP
±0.3
±0.05
±1
•
V+ = 6V to 15V (Note 1)
IBIAS
MIN
MAX
±1
+
±O.15
±3
+
±0.15
±2
+
±0.3
±6
+
±0.3
0.001
0.001
80
4.4
0.25
100
5
%WIDTHI2
mV
%WIDTH/2
mV
%WIDTH/2
mV
% WIDTH/2
nA
15
1.2
UNITS
mV
V+
16
3
0.5
5.0
100
0.45
10,000
MO
V
V
rnA
~A
~
~
V
V
kO
Hz
Nole 4: RIN is guaranteed by design and is not tested. RIN = 1/(ls x 66pF).
Nole 5: Average supply current = To x IS{ON) x Is +(1- To Is) IS(OFF)'
Note 6: Response time is set by an internal oscillator and is independent 01
overdrive voltage. TD is guaranteed by correlation test and is not directly
measured.
LTC1042
TYPICAL PERFORmAnCE CHARACTERISTICS
Normalized Sampling Frequency
vs V+, Temperature
IS(ON)VSV+
20
/
18
/
16
~ 10
55°C /
'/
§-
/
o
-
~
2
//
/ /'
g
a;-
\ TA=125°C
1.6
1.4
~
~ 12
/ / ' ~5°C- t - -I
~V
14
1.0
16
'\
-
I
I
o
2
TA- -55°C
4
6
8
10 12
SUPPLY VOLTAGE, V+ (V)
T~=25ob
~
w
.........
V+=5V
i,...-
f--
80
'"
~
--
70
/'
110
F
70
60
50 /'
60
50
2
6
8
10
12
SUPPLY VOLTAGE, V+ (V)
14
16
10M
V
V
V
~
:8x
-!i: 10 10
V
m 80
~
1M
REXT (11)
RIN vs Sampling Frequency
/
~100
!:i 90
ill
:l;!
.....
I II
§: 1011
120
90
0.1
100k
16
130
100
~
14
Response Time vs Temperature
Response Time vs Supply Voltage
110
\
TA=25O~ ",\
0.8
06
6
8
10
12
SUPPLY VOLTAGE, V+ (V)
\
1.8
~25V
'[ 12
R!IM, t=OLF
\
2.0
j
14
Sampling Rate vs REXT, CEXT
2.2
z
V
"'~
10 9
;5
'"
~
~ 10 8
;;0
w
'"
CENTER +WIDTH/2, VIN is above the window and the ABOVE WINDOW output is high.
6-79
LTC1042
APPLICATions INFoRmATion
An important feature of the LTC1042 is the non-interaction
of the inputs. This means the center and width of the window can be changed without one affecting the other. Also
note that the width of the window is set by a ground referred signal (WIDTH/2).
At low sampling rates, REXT dominates the power consumption. REXT consumes power continuously. The aver·
age voltage at the OSC pin is approximately V+/2. The
power consumed by REXT is:
Strobing
EXAMPLE: Assume REXT= 1Mnand V+ =5V. Then:
P(REXT) = (2.5)2/1 Mn = 6.2511W
An internal oscillator allows the LTC1042 to strobe itself.
The frequency of oscillation sets the sampling rate and is
set with an external RC network (see typical curve, OSC
frequency vs REXT, CEXT). To assure oscillation, under all
conditions, REXT must be between 100kn and 10Mn. There
is no limit to the size of CEXT.
A sampling cycle is initiated on the positive going transition of the voltage on the OSC pin. When this voltage is
near the positive supply, a Schmitt trigger trips and initiates the sampling cycle. Asampling cycle consists of applying power to both comparators, sampling the inputs,
storing the results in CMOS output latches and turning
power off. This whole process takes approximately 80lls.
During the 80lls "active" time, the LTC1042 draws typically
1.2mA (IS(ON)) at V+ = 5V. Because power is consumed
only during the "active" time, extremely low average
power consumption can be achieved at low sample rates.
For example at a sample rate of 1sample/second the average power consumption is:
P(REXT) = (V +/2)2/REXT
This is more than ten times the typical power consumed
by the LTC1042 at V+ = 5V and 1 sample/second. Where
power is a premium, REXT should be made as large as
possible. Note that the power dissipated by REXT is not a
function of the sampling frequency or CEXT.
If high sampling rates are needed and power consumption
is of secondary importance, a convenient way to get the
maximum possible sampling rate is to make REXT = 100kn
and eEXT = O. The sampling rate, set by the LTC1042's active time, will nominally be ",,10kHz.
To synchronize the sampling of the LTC1042 to an external
frequency source, the OSC pin can be driven by a CMOS
gate. A CMOS gate is necessary because the input trip
points of the oscillator are close to the supply rails and
TTL does not have enough output swing. Externally driven,
there will be a delay from the rising edge of the OSC input
and the start of the sampling cycle of approximately 511s.
Power = (V+) (IS(AVG)) = 5V x1.2mA x80lls/1sec
=0.48I1W
WINDOW
CENTER 2 ........- - 1
(V,N)
III v+
WINDOW
V,N
(WINDOW 3 ~H-i-l
CENTER)
)0---4 1
"'-+++-_ _--{
""
WIDTHI2
WITHIN WINDOW
ABOVE WINDOW
6 (BELOW WINDDW)
51--~H
'"
i'!:
~
(A)
6-80
r--l- - - - POWER ON
-.J
-WIDTHI2 : WIDTH/2
I
I
VL
1--80,..-
POWER OFF
Figure 1. LTC1042 Block Diagram
I
I
I
-----,----....Vu
INPUT VOLTAGE. V,N
L - I
ABOVE
§!
13
o
TIMING .......----'
GENERATOR 1--_.....1
WITHIN
§ V+ ~ ~ENTER yWINDOW __ LWINDOW
(B)
LTC1042
APPLICATions INFoRmATion
Input Impedance
The input impedance of the LTC1042 does not look like a
classic linear comparator. CMOS switches and aprecision
capacitor array form the dual differential input structure.
Input impedance characteristics can be determined from
the equivalent circOit shown in Figure 2. The input capaci·
tance will charge with atime constant of Rs xCIN.lt is crit·
ical, in determining errors caused by the input charging
current, that CIN be fully charged during the "active" time.
For Rs:;;10kO
For Rs less than or equal to 10kO, CIN fully charges and no
error is caused by the charging current.
For Rs>10kO
For source resistances greater than 10kO, CIN cannot fully
charge, causing voltage errors. To minimize these errors
an input bypass capacitor, Cs, should be used. Charge is
shared between CIN and Cs, causing a voltage error. The
magnitude of this error is l\V= VIN XCIN/(CIN +Cs). This
error can be made arbitrarily small by increasing Cs.
The averaging effect of the bypass capacitor Cs causes
another error term. Each time the input switches cycle be·
tween the plus and minus inputs, CIN is charged and dis·
charged. The average input current due to this is
IAVG = VIN XCIN Xfs, where fs is the sampling frequency.
Because the input current is directly proportional to the
differential input voltage, the LTC1042 can be said to have
an average input resistance of RIN = VIN/IAVG = 1/(fs xCIN).
Since two comparator inputs are connected in parallel, RIN
is one half this value (see typical curve of RIN vs Sampling
Frequency). This finite input resistance causes an error
due to voltage divider between Rs and RIN.
The input error caused by both of these effects is
VEAAOA = VIN[2CIN/(2CIN +Cs) +Rs/(Rs +RIN)].
EXAMPLE: Assume fs=10Hz, Rs=1MO, Cs=1/LF and
VIN = 1V. Then VEAAOA = 1V(66/LV +660/LV) = 726/LV. If the
sampling frequency is reduced to 1Hz, the voltage error
from input impedance effects is reduced to 136/LV.
Input Voltage Range
The input switches of the LTC1042 are capable of
switching either to the V+ supply or ground. Conse·
quently, the input voltage range includes both supply rails.
This is afurther benefit of the input sampling structure.
Error Specifications
The only measurable errors on the LTC1042 are the devia·
tions from "ideal" of the upper and lower window limits . .
[Figure 1(B)]. The critical parameters for a window com· IiII
parator are the width and center of the window. These er·
rors may be expressed in terms of Vu and VL.
center error = [(Vu +VL)/2]- CENTER
width error = (VU - VL)- 2x(WIDTH/2)
The specified error limits (see Electrical Characteristics)
include error due to offset, power supply variation, gain,
time and temperature.
Figure 2. Equivalent Input Circuit
6-81
LTC1042
APPLICATions InFoRmATion
TTL Power Supply Monitor
TTL SUPPLY
.--------1-1--1--+ "HI"=SUPPLY IN
RANGE
(4.55.5V)
LT1004-2.5
ALL RESISTORS =5% UNLESS OTHERWISE NOTED.
'SUPPLYTOLERANCE EaUALS R21N kD. I.E., 10k= =10%.
Single 5V Thermocouple Over Temperature Alarm
5V
36k '" 5%
R4
r-:;;;;;::;;;;;;;:-__t .....
16800
LT1034-1.2
TEMPERATURE
IN WINDOW
18/11
THERMOCOUPLE
TYPE
J
K
T
VCENTER= 1.235 x (R2+R3)
Rl +R2+R3
R4
WIDTH=2x 1.235xR3
Rl +R2+R3
232k
301k
301k
2.1M
S
L ____________ _
lk
+
Vr
6-82
tYELLOW SPRINGS INST. CO. PIN 44007
'CHOOSE CF TO FILTER NOISE
"CHOOSE RF, RI, Rl, R2 AND R3 TO SET WINDOW
ALL RESISTORS = 1% UNLESS OTHERWISE NOTED
LTC1042
APPLICATions InFoRmATion
Wind Powered Battery Charger
A simple wind powered battery charger can be con·
structed using the new LTC1042, a 12V DC permanent
magnet motor, and low cost power FET transistor.
2) If the generator voltage output is between 13.8V and
15.1V, the 12V lead acid battery is being charged at
about a1amp/hour rate (limited by the power FEn.
The DC motor is used as agenerator with the voltage out·
put being proportional to its RPM. The LTC1042 monitors
the voltage output and provides the following control
functions.
3) If generator voltage exceeds lS.1V (a condition caused
by excessive wind speed or 12V battery being fully
charged) then a fixed load is connected thus limiting
the generator RPM to prevent damage.
1) If generator voltage output is below 13.8V, the control
circuit is active and the NiCad battery is charging
through the LM334 current source. The lead acid bat·
tery is not being charged.
This charger can be used as a remote source of power
where wind energy is plentiful such as on sailboats or reo
mote radio repeater sites. Unlike solar powered panels,
this system will function in bad weather and at night.
•
107k
10k
LM334
215k
lOOk
4.5V'
=1
LT1004-1
OVER VOLTAGE
(>15.1V)
6-83
LTC1042
PACKAGE DESCRIPTion
Dimensions in inches (millimeters) unless otherwise noted.
J8Package
8Lead Hermetic DIP
~
(0.127)0.005
MIN
I
0.025
0.405 ~
(10.287)
MAX
1
(0.635) 1.L.::,8.J...J1..:7...L.,L.;;.,6........;.5~
RADTYP
r
0.220-0.310
(5.588-7.874)
:-,..,.11-
U
....2,...,...,.-,.3.,.....,...,4-(.
0.200
--l I-
(5:OaQi
,:.::::,Jl
J
(~:~-~:~~~)~ 1-
3T75
o 055
',~' WW7'~
0'-15'
~ 0.385±0.025_1
(9.779±0.635)
0125
_
MIN
0.100±0.010
(2.540±0.254)
J8188
N8Package
8Lead Plastic
t (10
~O~):l
MAX
8
7
6
5
r
0.250 ±0.01O
(6.350±0.254)
br.i=i~~-+
0.300-0.320
(7.620-8.128) ,.
I
-"I
0.325
~~~~;
8 255
+ 0.635)
-0.381
0.009-0015
(0.229-0.381)
TJ
tJ
0.045 ± 0.015
(1.143±0.3Bl)
0.loo±0.010
(2.540±0 254)
N8188
6-84
~7Lln FAD
V,
LTlllA/LT311A
LMl 1 1/LM31 1
. TECHNOLdG~~~-------V-o-lt-a-g-e-c-o-m-p-a-r-a-to-r
FEATURES
DESCRIPTion
Guaranteed Max Input Offset Voltage 1.0mV
Guaranteed Max Input Offset Current 5nA
Guaranteed Max Response Time 250n5
Guaranteed Min. Voltage Gain 200,000
• ± 30V Differential Input Voltage
• Drives 50mA Loads At Up To 50V.
• 112 The Power Dissipation For LT111A1LT311A
The LT111A is an improved version of the LM111 general purpose comparator. These new devices offer
maximum input offset voltage of 1.0mVand input offset current of 5.0nA with a maximum response time of
250ns. The LT111A operates from a single 5V supply to
::I:: 15V supplies and can drive up to 50mA loads referred to ground or either supply. A separate output
ground pin allows output Signals to be isolated from
analog ground.
•
•
•
•
The versatility of the LT111A is enhanced by an input
stage design which allows differential input signals of
up to ± 30V. Offset balancing, strobe capability and
the ability to "OR" the output is also included. These
features plus Linear Technology Corporation's advanced processing and reliability enhancements make
the LT111 A an ideal choice for most comparator applications. For higher performance requirements, see the
LT1011. For operation up to 200°C, see LT111Xdata sheet.
APPLICATions
• General Purpose Comparator
• Zero Crossing Detector
• Voltage To Frequency Converter
Low Drift RIC Oscillator
..
Transfer Function
25k .. As .. 200kll
50
I I I
40
C~~i~J~A -
I......
AL
T,
.
.
10k
1\
25'C 1
1 1 1
\
R,.~600!l
-
I I I
10k
-0.5
·l%METALFU..M
1kll -
EMITIEA
VOUTPUT 10
L....------------<~NV_-+15V
•• ~ TRW TYPE MTA·51 + 120ppm/,C.
C, ~ .015 ~ POlYSTYAENE -120ppm/,C ± 30ppm WESCO TYPE 32-P
NOTE: COMPAAATOR-GONTAIBUTES .. lOppm/'C DRIFT FOA
FAEQUENCIES BELOW 10kHz.
~
-0.3 -0.1 0 0.1
0.3
0.5
DIFFEAENTIALINPUT VOLTAGE (my)
6-85
LTlllAjLT311A
LM 1 1 1jLM311
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATIOn
Supply Voltage
(pin 8 to pin 4) . . . . . . . . . . . . . . . . . . . . . . .. 36V
Output to Negative Supply
(pin 7 to pin 4)
LT111A1LM111 ....................... 50V
LT311A1LM311 ....................... 40V
Ground to Negative Supply
(pin 1 to pin 4) . . . . . . . . . . . . . . . . . . . . . . .. 30V
Differential Input Voltage. . . . . . . . . . . . . . .. ± 30V
Voltage at Strobe Pin (pin 6 to pin 8) . . . . . . . . .. 5V
Input Voltage (Note 1). . . . . . . . . . . . . . . . . .. ± 15V
Output Short Circuit Duration. . . . . . . . . . . .. 10 sec.
Operating Temperature Range (Note 2)
LT111A1LM111 ............. -55°C to 125°C
LT311A/LM311 ................. O°C to 70°C
Storage Temperature Range ...... -65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ...... 300°C
ELECTRICAL CHARACTERISTICS VS =
SYMBOL
Vos
PARAMETER
Input Offset Voltage
los
Input Offset Current
v+
6 BALANCE I
STROBE
v-
188
TOP VIEW
GROUNO
INPUT 2
INPUT 3
v- 4
± 15V. T.
CONDITIONS
=
-
7 OUTPUT
6 BALANCE I STROBE
5 BALANCE
25°C unless otherwise nolad.
MIN
Rs"" SOl<
(Note3,4)
•
•
Input Bias Current
LT l11A
TYP
MAX
0.5
•
lM
MIN
LM111
TYP
MAX
3.0
4.0
UNrrs
mV
4.0
10.0
20.0
nA
60
100
150
nA
U
2'h
0.7
5:,1)--
10.0
60
200
100
150
Ill!!
40
VlmV
Large Signal Voltage Gain
Note 7
Response Time
NoteS
200
250
200
Saturation Voltage
VIN"" -5mV, lOUT ~ 50mA
V+ "'4.5V, V- ~O
VIN"" -6mV, ISINK ""8rnA
0.75
1.5
0.75
1.5
0.23
0.4
0.23
0.4
Strobe ON Current
Note 6
3.0
0
3.0
Output Leakage Current
VIN ",5mV, Vour
ISTROBE ~ 3mA
0.2
0.1
10.0
0.5
0.2
0.1
10.0
0.5
nA
p.A
Input Voltage Range
V+ = 15V, V-- = 15V
Pin 7 Pull up may go to 5V
{ 13.8 }
-14.7
13.0
V
~
•
35V
Positive Supply Current
Negative Supply Current
Shading of a specification highlights those items which offer key
improvements in parametric performance or guaranteed test limits
provided for the first time.
6-86
+
LT111AJ8
LM111J8
LT311AJ8
LM311J8
LT311AN8
LM311N8
v+
NOTE: PIN 4 CONNECTED TO CASE.
J8 PACKAGE 8 PIN CEROIP
N8 PACKAGE 8 PIN PLASTIC
Note 3
Ava.
LT111AH
LM111H
LT311AH
LM311H
H PACKAGE
TO-5 METAL CAN
(Note 3,4)
Ie
ORDER PART
NUMBER
•
•
-14.5 { 13.8 }
-14.7
U
1.5
13.0
4.0
2.5
-14.5
200
nS
V
V
rnA
5.1
6.0
rnA
4.1
5.0
rnA
LTlllA/LT311A
LM 1 1 1/LM31 1
ELECTRICAL CHARACTERISTICS Va =
PARAMETER
CONDITIONS
Vos
Input Offset Voltage
Rs"" 50k
los
Input Offset Current
SYMBOL
± 15V, TA
(Note3,4)
(Note 3,4)
Is
Input Bias Current
=
25°C unlass olherwisl noled.
MIN
•
•
LT311A
MAX
TYP
MAX
0.5
1.0
2.0
a.o
M
10
20
7.5
10
S.O
50
60
100
100
Note 3
AvoL
LM311
TYP
MIN
200
500 )
40
250
300
Note 5
200
260
200
Ssturation Voltage
V,N"" -10mV, lOUT = SOmA
V+;"4.5V, V- =0
V,N"" -lOmV, ISINK "" SmA
NoteS
0.75
1.5
0.75
1.5
0.23
0.4
0.23
0.4
3.0
4.0
3.0
0.2
0.1
50
0.5
0.2
Output Leakage Current
V,N ;.. 10mV, VOUT = 35V
ISTROBE = 3mA
Input Voltage Range
•
•
•
-14.5 { 13.8 }
-14.7
13.0
-14.5
nA
V/mV
200
Response TIme
Strobe ON Current
nA
70
150
Large Signal Voltage Gain
UNITS
mV
nS
V
V
mA
50
{ 13.8 }
-14.7
13.0
nA
p.A
V
Positive Supply Current
3.0
4.0
5.1
7.5
mA
Negative Supply Current
l.S
2.5
4.1
5.0
mA
The. denotes the specifications which apply over the full operating
temperature range.
Nota 1: Applicable for ± l5V supplies. The positive input voltage limit
is 30V above the negative supply. The negative input voltage limit is
the negative supply.
Nota 2: Tj max. = 150°C for the LT1llA and 95°C for the LT3llA.
Nata 3: Offset voltage, offset current and bias current specifications
apply for any supply voltage from a single 5V up to ± l5V supplies.
Nata 4: Offset voltages and offset currents shown are the maximum
values required to drive the output within a volt of either supply with
a lmA load. These parameters define an error band and take into
account the worst case effects of voltage gain and input impedance.
Natl 5: Response time is specified for a 100mV input step with 5mV
overdrive with the collector output terminated with a 500n pullup
resistor tied to 5V.
Nate 6: Do not short the strobe pin to ground. It should be current
driven at 3 to 5mA for the shortest strobe time. Currents as low as
500/LA will strobe the LT1llA if speed is not important. External
leakage on the strobe pin in excess of O.2/LA when the strobe is "off"
can cause offset voltage shifts.
Note 7: RL =1kD, -10V:sV OUT :s14.5V
6-87
LT111A/LT311A
LM 111 /LM311
TYPICAL PERFORmAnCE CHARACTERISTICS
Input Offset Current
Input Bias Current
400
Vs
......
~
300
~
a:
±15V-
~
Vs
RAISED
' " ' " (SHORT PIN~b f-' " 5,6,AND8) r-
'"
a:
13
200
'"
!;
~ 100 ---
"
-
160
-
.. 140
.s
V+
-
Vs ~ ± 15V
~A ~ ~5:C.
-
--
-
!2:
120
w
-I·
.-1
20
o
-1.0
itt!
Ll ,tt+!
-1.5
U,,
0.2
--
~-r-,
80
-0.5
+--1--1.--1.:
-
-
~ 100
=>
I 1-;
- I
1
I
w
~ 4
!;
t
~
,2mV
o
'[1
~
,
-5mV
,
0
cJ I
'II I
~
~ 100
~
50
~
0
=>
_ Vs
TA
'"
~
4
>--
3
!$
=>
c..
>--
5mV
,
2mV
s
oS
100
~
§!
-50
I I
~
-100
~
0.8
--\
\
-
~
>--
1+'i
I I i
Vs
TA
~
~
0.4
TIME(~S)
0.6
-0.3 -0.1 0 0.1
0.3
0.5
DIFFERENTIAL INPUT VOLTAGE (mV)
~ 0.8
T7
:z.
4J'~25°C
I·....+--'
1 ___
!$ 0.6
~"
~ 0.5
0.8
J"
,
,'::"- ..-{:f-5~OC
en
!
t
I A"
1 .
~ 0.7
0.1
!
IT ~ 125°C
w
0.2
I
i
0.9
~ 0.4
=>
!;( 0.3
± 15V
25°C
I I
0.2
\
1.0
I I I
0
r---- _.
Collector Output Saturation Voltage
VOUT
":"
t----t------'
-
-0.5
125
i>.i-
v"
25°C
o
f-+--+_'5V
\
T
\
10
25 50 75
TEMPERATURE (0C)
w
If--I I
0.6
20~V~
0
=>
VOUT
TIME(~S)
6-88
±15V._
25°C
-
0.4
-...-
o
~
w
Pd-
V1N
~ 30
!$
!; 20
Response Time for Various
Input Overdrives
I 15V I
~+
0.2
~
~
__ L _ _
I--
-50 -25
w
T-,---·--
-
V-
16
I I
I 1/
'-../ I
L
0.1
i
Transfer Function
40
0.3
1
10M
50
f----
0.4
Response Time for Various
Input Overdrives
'";5
100k
1M
INPUT RESISTANCE (II)
REFERRED TO SUPPLY VOLTAGES
-2.0
I
-16 -12 -8 -4 0 4
8 12
DIFFERENTIAL INPUT VOLTAGE (V)
~
-+-
Common Mode Limits
Input Characteristics
40
-ELEVATED
(SHORT PINS_~
' " ..... 5,6,AND8)
-55 -35-15 5 25 45 65 85 105125
TEMPERATURE (0C)
180
~
,
o
-55-35-15 5 25 45 65 85 105125
TEMPERATURE (0C)
60
"-
~ ~AL
NORMAL
o
~
±15V-
~
-'.
'"
~
~
~
Offset Error
30
II'
C.
..Y .....
""
"" ""
,
I
:
i
i i
i
I I
5 10 15 20 25 30 35 40 45 50
SINK CURRENT (mA)
LTlllA/LT311A
LMl 1 1/LM31 1
TYPICAL PERFORmAnCE CHARACTERISTICS
Response Time Using GND
Pin as Output
2:
w
'"~
§!
I:::>
"I:::>
0
~
w
'"~
§!
I:::>
15 20~V
I '
10 5mV
/
r'~1
«
a:
~
:5
li-
I-
a:
en
o
0.2:§
01
20
L -_ _ _ _ _ _ _ _ _
1
0
TIME(~S)
Supply Current
vs
Supply Voltage
o
:z
.~~,.,............,
40
~O
0
2
r-- ~
POSITIVE AND NEGATIVE SUPPLY
I
o
25
10
15
20
SUPPLY VOLTAGE (V)
30
10
OUTPUT VOLTAGE (V)
15
Leakage Current
vs
Temperature
Supply Current
vs
Temperature
POSITIVE SUPPLY
COLLECTOR OUTPUT "LO"
-
COLrTOR rTPUI "HI"
03
"::j
. i5
0
:I:
TIME(~S)
r---
60
a:
i'3
iA=125'~ .
I
:D
POSITIVE SUPPLY ~f-COLLECTOR OUTPUT "LO"
i""'---
- - --
.........
r-. r--.....
I-POSITIVE AND NEGATIVE suPPi:Y~
C9 LLEC OR oYTPUj "HI]
I
-50 -25
i
25 50 75
TEMPERATURE eC)
100 125
1EMPERATURE ('C)
TYPICAL APPLICATiOnS
Offset Balancing
Strobing
Increasing Input
Stage Current
R2
3.0k
lk
Note: Pin Connections Shown
are tor T0-5 package
Note: Do Not Ground
Strobe Pin.
~
0.4
I-
u
~)±l~V-
-50
~ -100
m
80
U
2k
v
;:g
0.5 :;:
:z 100
UJ
VOUT
':"
0.6
120
g
I-
v"
rt'
-5
-10
-15
Output Limiting Characteristics
140 , - - - - - - - - - - - - - - - , 07
I I I
II
2mV
Response Time Using GND
Pin as Output
Increases typical
common mode slew
rate from 7.0 VI ~S
to 18V/~S.
6-89
LTlllA/LT311A
LM 111/LM31 1
TYPICAL APPLICATions
Driving Load Referenced
Driving Ground Referred Load
Driving Load Referenced
To Negative Supply
To Positive Supply
r---_.-V+
INPUTS'
+
+
V
V+ + CAN BE GREATER OR LESS THAN V+
• NOTE THAT INPUT
POLARITY IS REVERSED
WHEN USING PIN 1 AS
OUTPUT
• NOTE THAT INPUT
POLARITY IS REVERSED
WHEN USING PIN 1 AS
OUTPUT
Window Detector
Using Clamp Diodes To Improve Frequency Response'
FROM
LADDER---~-1----'''f'J''':;
OUTPUT HIGH
INSIDE "WINDOW"
AND LOW
ABOVE HIGH
LIMIT OR
BELOW LOW
LIMIT
NETWORK
0,
0,
R,
L---4_..--- ANALOG INPUT
• RESPONSE TIME
INCREASES TO ~500nS
IF INPUT MUST SLEW 5V
TO REACH THRESHOLD.
Crystal Oscillator
Detector For Magnetic Transducer
10k
r------...---~r_-
+5V
V+ - SV
50k
1k
4.Sk
2.31<
85
KHz
;t l_
co
100pt
~-~"""--OUT
tOk
10k
MAGNETIC
PICKUP
6-90
10k
LT111A/LT311A
LM 111 /LM311
Low Drift RIC Oscillator
strobing Off Both Input" And Output Stages
FROM DIA NETWORK
25k "" Rs "" 200k!!
ANALOG
INPUT
.
TTL/CMOS (5V)
STROBE
.
10k
L------------+..J\At.--+15V
SAMPLE
10k
1.0k
• 1% METAL FILM
•• ~ TRW TYPE MTR-51 + 120ppm/'C.
C, ~ 015 ~ POLYSTYRENE -120ppm/,C ± 3Dppm WESCO TYPE 32-P
NOTE COMPARATOR CONTRIBUTES"" 10ppm/'C DRIFT FOR
FREQUENCIES BELOW 10kHz.
• TYPICAL INPUT CURRENT IS 50pA
WITH INPUTS STROBED OFF.
DO NOT GROUND STROBE PIN
Positive Peak Detector
+15V
III
2.01<
INPUT-...Jo,/'"....-....
y:.--w
1.0
Vs Rl V"
TA -
/2.omv
I, /
/I S.OmV
os!
Y,N
F= VI!-- _..-
_.
".
--
..
--
±lSV
SOO!!
- S.OV
2SoC._
_.
_.
--~
. -- -
VOUT = 5.0V lor
VLT
1
MAX
8.0
8.0
10
80
•
LM319
TYP
2.0
Supply Current
The. denotes the specifications which apply over the full operating
temperature range.
MIN
1
2
Is
=
5V, V- = OV
LT319A
TYP
MAX
0.3
O.S
0.5
•
Common Mode Rejection Ratio
los
VSAT
MIN
4.3
1
3
±5
4.3
8
3
V
V
V
V
rnA
12.S
rnA
5
rnA
Note 2: Unless otherwise noted, supply voltage equals ± l5V and
TA = 25°C. The ground pin is grounded. Note that the maximum
voltage allowed between the ground pin and V+ is l8V. Do not tie the
ground pin to V- when the power supply voltage exceeds ± 9V. The
offset voltage, offset current and bias current specifications apply for
all supply voltages between ± l5V and +5V unless otherwise
specified.
Note 3: The offset voltages and currents given are the maximum values
required to drive the output within 1 volt of either supply with almA
load - thus, these parameters define an error band and take into
account the worst case effects of voltage gain and input impedancb.
Nole 4: Response time specified is for a 100mV input step with 5mV
overdrive.
6-95
..
~
LTl19A/LT319A
LMl19/LM319
TYPICAL PERFORmAnCE CHARACTERISTICS
Transfer Function
Input Characteristics
40,-,-,-,--r-r-,-,-,--r-;80
.1 1
V++-36V'
35 V, - ± 15V-+--+-,F~~M 7.0
Rl - 1.4kn
~ 30 T. - 25'e +-+~f-+-+-+---i 6.0 ~
'"
I
I V+ + _ 5.0V
3=
400
J.
~ 25
~
+
- --t--
t .-!t-';'+-+--+-I
4.0 ~
:
~
20
~
~ 15
~
ft- -
--f--- 3.0
~
2.0
~
r+- t-
10
5.0
1-7·-- ........- 5.0 ~
-
o
------.------~J
-1 0
+
- 0.6
- 02
02
0.6
1.0
DIFFERENTIAL INPUT VOLTAGE (mV)
1.0
0
5.0
:;-
40
"-'"
30
0-::>w
~~>
2o±A 1\
\
2.0mV
\
20
1.0
I\"
-+.\-50mV
Vs - ±15V
:
I-t---t-!-+ T. - 25 'e _-+f-t-+,+-+--1
I
200 r--.
~ 300
!Z
~+-+++--+-
200 ~+--t++--t--t---r
~
100
5
f-+-+++
;?
1I
<> 100
~ 150
~
~
_. +-':'1
~
~t-irl~~~==~+L!i,
'
'
I
,I
-i-H--
MAXIMUM OIFFEREN-
I
TIALI'NPU1VOLTAGE
I
!I .
I
-
r- r-
i
50
1
o
- 100 L-"----LL-'--..L.--'-~__-'--__----l
-10
-6
-20
20
60
10
DIFFERENTIAL INPUT VOLTAGE (V)
I I I
Vs - ± 15V
I,
~~ ~~
l
+-+--H:-+-
!
Response Time for Various
Input Overdrives
60
Input Currents
250
r-'-rr'-~~'-'-'.--r,
OFFSET
1
-55 -35-15 5.0 25 45 65 85 105 125
TEMPERATURE ('e)
Response Time for Various
Input Overdrives
Response Time for Various
Input Overdrives
6.0 ,-,----,--,--,-,----,--,---,
6.0 ,-,--,--,--,--,-,,--:-:-:-;
± 15V
5.0
5.0
Rl - 500!)
V" - 5.0V
T. - 25'e
o-~ 40
l-
1= ~
j
v, -I
!.
4.0
: Vs - 5.0V
Rl - 500!!
, V· . - 5.0V
T. ;"' 25:e
::>w
3.0
o§; 2.0
::>Ij
\ \
i- L
1.0
3.0
2.0
f--+--+-\t-
1.0
o -
i
:;-
1-+--+--oo;I-..J
1-+---+1.-
I
E
~~ -50
:§:~ -100
§;
50 100 150 200 250 300 350
TIME (0')
Output Saturation Voltage
25
; / T,
;?
i1i 15
'"'"<>
::>
10
_.
_.-
"-
0::>
°
12
~ 25'e
/
V
10
1.2
;?
100
1.0
0z
w
80
08 ~
;::
t:: 60
0.6 Cii
.s
E
;:: 8.0
/
'"'"u
i1i
'"u~
~
::>
6.0
8':
!!l
::>
0
u
~
8::
::>
'"
U
40
Ii:
en
b;~Vs 15V
5.0
120
T, - 25'e
;?
0-
0::>
Output Limiting
Characteristics
Supply Current
20
.s
50 100 150 200 250 300 350
TIME (os)
50 100 150 200 250 300 350
TIME (os)
0.4 '"
~
40
~
~
2.0
0.2
en 20
±
o
./
o
6-96
0.2
INPUT OVERDRIVE - 50mV
08
0.4
0.6
OUTPUT VOLTAGE (V)
1.0
0
0
5.0
10
15
SUPPLY VOLTAGE (V)
20
10
5.0
OUTPUT VOLTAGE (V)
LTl19A/LT319A
LMl19/LM319
TYPICAL PERFORmAnCE CHARACTERISTICS
Common Mode Limits
Supply Current
V+c---.-.-.---------,
-0.4
~O
~-0.8
I
Vs
en
~ -1.2
-2.0
~
1.2
0.8
~
;;f'
.s
8.0
t-
i;j
~ -1.6
~
z
10
---+
-f '
~ ±15V
l--.
1--
l--__
ifi
•
§
REFERRED TO SUPPLY VOLTAGES
6.0
POSITIVE SUPPLY V'
'-'
1--
;--
~
It
I
r-r-r-r-r-f-i-:"-'_I
~
0.4
5.0V, V - 0
4.0
2.0
~~~~~r-r-~~
NEGATIVE SUPPLY
i I I
!
V-L-L-L-~L-L-L-L-~
~
~
-15V '
!
i
!
O~~~~~L-----~
-55-35-155.0 25 45 65 85 105 125
TEMPERATURE (OC)
-55-35-155.0 25 45 65 85 105 125
TEMPERATURE Cc)
TYPICAL APPLICATiOnS
High Noise Immunity 60Hz
Sync Circuit
Relay Driver
+5.0V
+5V
28V
68k
I~~~~ IN4148
20k
3.3k
(10V pp)
(TYP)
>'--+-.......-OUTPUT
10k
AT CUT
18p!
Voltage Controlled Crystal Oscillator
With 100PPM Trim Range
INPUT~l00k
10~HZ
10k
10k
0-5V
+5
MV·
1405
5V
lk
1000p!
1
lk
39k
""-"----"---OUTPUT
20k
5V
20k
• VARACTOR DIDDE
2k
6-97
LT 119A/LT319A
LMl19/LM319
TYPICAL APPlICAI'IOnS
Voltage Controlled High Speed One Shot
+5V
5V
INPUT
PULSE
10 Bit Serial Output AID Converter
+5
10k·
47'
1N4148
-5
74C04
t
J1000Pf
DATA
OUT
lN4148
82'
1N4148
1% FILM
POLYSTYRENE, MOUNT
CAPS ClOSE TOQETtf:R
-5V
CONVERT COMMAND
INPUT (TTL)
15k
l'
CONVERSION TIME = 10mS
*"'" 1%
CAPACITORS ARE POLYSTYRENE-MOUNT
IN CLOSE PROXIMITY
+5V
5 Microsecond Sample and Hold with Zero Hold Step
+15V
lN4148
3kn
t---.--.---.-----------t--VOUT
12'
0.003
.F
t
l'
l'
3'
9'
-15V
• TRIM FOR ZERO VOLTS OUT
WITH ZERO VOLTS IN
t POLYSTYRENE CAPACITOR
6-98
INPUT--.JVoIY----'
lN4148
LTl19A/LT319A
LMl19/LM319
TYPICAL APPLICATions
5kHz to 2M Hz V ~ F Converter
+5V
3.3k
50p1 POLYSTYRENE
+5V
+5
330
TTL
t-----+-OUT
470
20k
INI-W<;<-ir---\Nor-+-...:!..f
2kt
0-10V
5kHz-2MHz
10k
470
.01~
+5V
1 MEG
22p1
10k
2k
-5V
220
ALL DIODES IN4148
t SET SCALE FACTOR
SCHEmATIC DIAGRAm
R13.5k
R24k
R12
13k
INPUTS{:
I-+----l-.__OUTPUT
R25
600
R24
250
TO OTHER
SlOE
LT119A
V- GND
6-99
LI
IIYA/LI~
IYA
LMl19/LM319
PACKAGE DESCRIPTion
10 Lead TO-5 Metal Can (H)
14-Lead Cavity DIP (J)
'I i~~~
,-'''-1...J",",-'''-'-'-'''--'-=-L'-'...L.:.I-,
'-T",,,,,..,..,r.rr.-r-..r,.-;o-,
TlMAX
LT119AH
LM119H
LT319AH
LM319H
9,.
9JC
150'C
150'C/W 45'C/W
85'C
150'C/W 45'C/W
TjMAX
14-Lead MOlded DIP (N)
...
~
0300-0320
11620-'1281
6-100
•
9,.
LT119AJ
150'C 100'C/W
LM119J
150'C 100'C/W
LT319AJ
85'C
100'C/W
LM319J
85'C
100'C/W
l
SECTion 7-FILTERS
•
7-1
INDEX
SECTION 7-FILTERS
INDEX.... .. . .... .. . ... ..... ... . .... . .. . ........... ............ .. ............ ... . .............. . ... ........
7-2
PROPRIETARY PRODUCTS
LTC1059, High Performance SWitched Capacitor Universal Filter ........................................................
7-3
LTC1059CS, High Performance Switched Capacitor Universal Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-11
LTC1060, UniversalDualFilterBuildingBlock ..................................... :................................ 7-15
LTC1060CS, Universal Oual Filter Building Block .............. :................... ................................... 7-35
LTC1061, High Performance Triple Universal Filter Building Block . .' ..................................................... , 7-39
LTC1061CS, High Performance Triple Universal Filter Building Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-55
LTC1062, 5th Order Low Pass Filter ...................................................................... ........ 7-59
LTCI062CS, 5th Order Low Pass Filter. ........................................................................... 7-71
LTCI064, Low Noise,Fast, Quad Universal Filter Building Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-73
LTC 1064-1, Low Noise, 8th Order, Clock Sweepable Elliptic Lowpass Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-89
LTC1064-2, Low Noise, High Frequency 8th Order Butterworth Lowpass Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 13-15
LTC I064-3, Low Noise, High Frequency 8th Order Linear Phase Lowpass Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 13-19
LTC1064-4, Low Noise, 8th Order, Clock Sweepable Cauer Lowpass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 13-20
7-2
L7YD~~-----HI-·g-h-p-e-rf-o-~:-C-~-~-=e-9
Switched Capacitor Universal Filter
DESCRIPTion
FEATURES
•
•
•
•
•
•
•
•
•
•
All Filter Parameters Guaranteed over Temperature
Wide Center Frequency Range (0.1 Hz to 40kHz)
Low Noise Wide Dynamic Range
Guaranteed Operation for ± 2.37V and ± 5V Supply
Low Power Consumption
Guaranteed Clock to Center Frequency Accuracy of
0.3% (LTC1059A)
Guaranteed Low Offset Voltages over Temperature
Very Low Center Frequency and QTempco
Clock Input T2L or CMOS Compatible
Separate Highpass (or Notch or All pass), Bandpass,
Lowpass Outputs
Higher than second order filter functions can be obtained
by cascading the LTC1059 with the LTC1060 dual universal filter or LTC1061 triple universal filter. Any classical filter realization (such as Butterworth, Cauer, Bessel and
Chebyshev) can be formed.
APPLICATions
•
•
•
•
The LTC1059 consists of a general purpose, high performance, active filter building block and an uncommitted op
amp. The filter building block together with an external
clock and 2 to 5 resistors can produce various second order functions which are available at its three output pins.
Two out of three always provide lowpass and bandpass
functions while the third output pin can produce notch or
highpass or all pass. The center frequency of these functions can be tuned from 0.1 Hz to 40kHz and it is dependent
on an external clock or an external clock and a resistor ratio. The filter can handle input frequencies up to 100kHz.
The uncommitted op amp can be used to obtain additional
all pass and notch functions, for gain adjustment or for
cascading techniques.
Sinewave Oscillators
Sweepable Bandpass/Notch Filters
Full Audio Frequency Filters
Tracking Filters
The LTC1059 can be operated with single or dual supplies
ranging from ± 2.37V to ± 8V (or 4.74V to 16V Single supply) and is pinout compatible with MF5.
The LTC1059 is manufactured by using Linear Technology's enhanced LTCMOSTM silicon gate process.
LTCMOS™is a trademark of LinearTechnology Corp.
TYPICAL APPLICATiOn
Center Frequency and QError
Wide Range 2nd Order Bandpass/Notch Filter with Q =10
50k
715k
VIN
L.
4
---2.
+BV-
~
f
I 3~35
,;'"
1
~
~
3
DC-200kHz
T2 L CLOCK IN ,;2MHz
14
2
5Dk
I
TA~25°C
CLOCK
CENTER FREQUENCY
NOTCH OUT
BP OUT
20 ~
'll
~
LTC 1059
r---
11
r----
CENTER FREQUENCY ERROr
r!£- -BV -=1-
~
0.2
D
,/
o
5
v
,/
./
r----
V
y lL
10 15 20 25 30 35 40
IDEAL CENTER FREQUENCY (kHz)
45
15
'"
'"5
~
10 ~
'"
a
7-3
LTC1059
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage ..................................... 18V
Power Dissipation ......................... ~' ... . 500mW
Operating Temperature Range
LTC1059AC, LTC1059C ... ......... - 40 oCsTAS85°C
LTC1059AM, LTC1059M ........... - 55°CsTAS125°C
Storage Temperature Range ............ - 65°C to 150°C
Lead Temperature (Soldering, 1Osee) .............. 300°C
ORDER PART NUMBER
LTC1059ACN
LTC1059ACJ
LTC1059AMJ
LTC1059CN
LTC1059CJ
LTC1059MJ
ELECTRICAL CHARACTERISTICS
(Complete Filter) Vs = ± 5V, TA = 25°C, T2l clock input level unless otherwise specified.
PARAMETER
CONDITIONS
Center Frequency Range, io
io x 0 s400kHz, Mode 1
fox Os1.6MHz, Mode 1
ioxOs250kHz, Mode 3, Vs= ± 7.5V
foxOs1MHz, Mode 3, Vs= ±7.5V
MIN
Input Frequency Range
Clock to Center Frequency Ratio
LTC1059A
LTC1059
LTC1059A
LTC1059
Mode 1, 50:1, fClK = 250kHz, 0 = 10
Mode 1, 50:1, fClK = 250kHz, 0 = 10
Mode 1,100:1, fClK = 500kHz, 0= 10
Mode 1, 100:1, fCLK = 500kHz, 0 = 10
••
••
QAccuracy
LTC1059A
LTC1059
Mode 1,50:1 or 100:1, fo=5kHz
0=10
••
fo Temperature Coefficient
QTemperature Coefficient
Mode 1, fCLK <500kHz
Mode 1, fClK<5OOkHz, 0= 10
DC Offset VOS1
VOS2
VOS2
VOS2
VOS2
VOS3
VOS3
iClK = 250kHz, 50:1, SAle High
fClK = 500kHz, 100:1, SAle High
fCLK = 250kHz, 50:1, SAle Low
fClK = 500kHz, 100:1, SAle Low
fClK = 250kHz, 50:1
fClK = 500kHz, 100:1
DC Low Pass Gain Accuracy
BP Gain Accuracy at fo
Clock Feedthrough
Max. Clock Frequency
Mode 1, R1 = R2= 50kll
Mode 1, 0= 10, fo=5kHz
fClKS1MHz .
Mode 1,0<5, Vs~ ±5V
Power Supply Current
7-4
TYP
MAX
Hz
Hz
Hz
Hz
0-200k
Hz
5O±0.3%
5O±0.8%
1oo±0.3%
100±0.8%
±0.5
±0.5
3
5
•
2
3
6
2
4
2
4
±0.1
±0.1
10
2
3.5
%
%
ppm/DC
ppm/oC
5
15
•
•
•
•
•
•
•
•
UNITS
0.1-40k
0.1-18k
0.1-20k
0.1-16k
15
30
60
20
40
20
40
mV
mV
mV
mV
mV
mV
mV
2
%
%
mV
MHz
5.5
7
rnA
rnA
LTC1059
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
Center Frequency Range
foxQ~l20kHz, Mode 1, 50:1
foxQ~l20kHz, Mode 3, 50:1
(Complete Filter)Vs= :t2.37V, TA=25°C unless otherwisespecified
MIN
Input Frequency Range
Clock to Center Frequency Ratio
lTC1059A
lTC1059
lTC1059A
lTC1059
Mode 1, 50:1, fcU(=250kHz, Q= 10
Mode 1, 50:1, felK= 250kHz, Q= 10
Mode 1, 100:1, fcU( = 250kHz, Q= 10
Mode 1, 100:1, fCLK =250kHz, Q= 10
QAccuracy
lTC1059A
lTC1059
Mode 1, fClK = 250kHz, Q= 10
50:1 and 100:1
•
Hz
Hz
60k
Hz
50±0.5%
•
±1
±2
%
%
2.5
Hz
rnA
(IntemaIOpAmps)TA=25°Cunlessotherwisespecified
MIN
CONDITIONS
Supply Voltage Range
Voltage Swings
lTC1059A
lTC1059
lTC1059,LTC1059A
UNITS
0.1-12k
0.1-10k
700k
1.5
ELECTRICAL CHARACTERISTICS
MAX
50 ± 0.8%
loo±0.5%
loo±0.8%
Max. Clock Frequency
Power Supply Current
PARAMETER
TYP
TYP
±2.375
Vs= ±5V, Rl=5k(Plnsl, 14)
Rl = 3.5k (Pins 2, 13)
•
•
±4
±3.8
±3.6
MAX
±8
±4.2
±4.2
UNITS
V
V
V
V
Input Offset Voltage
Input Bias Current
Output Short Circuit Current
Source/Sink
DC Open loop Gain
Vs= ±5V
1
3
40/3
Vs= ±5V
60
dB
GBW
Slew Rate
Vs= ±5V
Vs= ±5V
2
7
MHz
15
mV
pA
rnA
V1~s
The • denotes the specifications which apply over the full operating
temperature range.
7-5
LTC1059
BLOCK DIAGRAm
N/AP/HP
BP
S1
LP
INV2~2
'13 V02
AGND
+
TYPICAL PERFORmAnCE CHARACTERISTICS
Graph 1. Mode 1:
(fClK/fJ Deviation vs Q
0.4
Vs= ±5V
TA=25'C
1ClK = 250 kHz
'"d -O.B
-1.6
~
-2.0
~
VS=±5V
,11111111 11111111
r-TA=25'C
IClK=500k HZr-- IClK =100 (TEST POINT)
IQ
<3
~
~
d -0.1
'"~ -1.2
~
0.1
\
E -0.4
Graph 3. Mode 1; QError vs Clock
Frequency
Graph 2. Mode 1:
(fClK/fo) Deviation vs Q
/
IClK
10
'"~ -0.2
50 (TEST POINT)
II
~ -0.3
:;
~
-2.4
-0.4
/
-0.5
-0.6
0.1
10
IDEAL Q
7-6
100
o
0.1
10
IDEAL Q
100
IClK =50'1
~
.
0.2 0.4 0.6 0.8 10 1.2 1.4 1.6 1.8 2.0
CLOCK FREQUENCY (MHz)
LTC1059
TYPICAL PERFORmAnCE CHARACTERISTICS
Graph 4. Mode 1: QErrorvs Clock
Frequency
Graph 5. Mode 1: Measured Qvs
'ClK and Temperature
Graph 6. Mode 1: ('ClK/'o! vs 'ClK
andQ
0.8
TA=2S0C
t
Vs=1,., svI
0.6 TA=2SOC
fClK =100'1
f
.
f~~K =100:1--1-+-+-+--I~r-.I
20
~ 0.4
'"fE
0.2
~
i"'" 1/1
./ _V
0-50
:z
o
~
I'
VJ
,
--~
o
0
-0.2
10
~
~
o~~~~~~~~--L-j
0.2 0.4 0.6 0.8 1.0 1.2 14 1.6 1.8
2
o
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
CLOCK FREOUENCY (MHz)
0 2 0.4
Graph 7. Mode 1: ('ClK/'o!vs 'ClK
andQ
0.6
0.8
1.0
1.2
1.4
16
CLOCK FREOUENCY (MHz)
CLOCK FREOUENCY (MHz)
Graph 9. Mode 1: (fClK/'o! vs fClK
and Temperature
Graph 8. Mode 1: ('ClK/'o) vs 'ClK
and Temperature
0.8
~
Vs=l,.,sv I
0.6 TA=2S0C
fClK =50'1
f,
,-; 0.4
:i'l
~
fE 0.2
~
$
t;
~
.
/
r-- 0=5
".
o
vs=I±SV I
0.8 0=10
fClK =50'1
0.8
~
;:- 0.6
§ 0.6
'/
0
-0.2
II
J ~I
~=J
~~
.... ~ V
o 20
0=10_ V
/
'"fE 0.4 I---+--+-f-++--+--+--If----l
'"EE 0.4
~
o
~ 0.2
V
~
I---+--+-I-tr-+---H'-+--''=:;;-i
0.2
0.4
0.6
0.8
1.0
1.2
1.4
-0.2 '---'-----'-~__.L-....1--L.~L-....J
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
1.6
0.8
0.8 TA=2SoC
fClK =100'1
f,
j
.
~ 0.6
/V
/1
0.4
0.2
~
....,,;
0=50
0=20
0=1~
-0.2
o
I
V
jTA=2S oC
8SoC
~~ ~ V
0.1
-0:;- ""
0.2
0.3
0.4
~
0.5
fCLK (MHz)
-0.2
0.2
./
".-
Vs=I"'2.S~
~
;:- 0.4
f,
oJ
g
'"z~ 0.2
.......
0-20
o
~
~
./
0 0=1&
r
-0.2
~
1."
.
~
~
0.7. 0.8
0.8
1.0
1.2
1.4
-
1.6
1.8
0.8
Vs= ,.,2.SV
Q=10
fClK =100'1-t---+--+--\---;
f,
.
§ 0.6
'I
'"z 0.4
~
o
!;i 0.2 1---+-+1---11-
~
/'
a=s~
-0.4
0.6
0.6
~
Graph 12. Mode 1: ('ClK/fo) vs 'ClK
and Temperature
I
0.6 TA=2SoC
fClK =50'1
0.4
/
fCldMHz)
Graph 11. Mode 1: ('ClK/'o!vs 'ClK
andQ
VS=I"'2.S~
is
!;i
V;
0.2
fClK(MHz)
Graph 10. Mode 1: ('ClK/'o! VS 'ClK
andQ
'"fE
12S~C/
z
~
/
.
".....
fCLK(MHz)
~
f,
:i'l
a
0.1
0.2
0.3
0.4
0.5
fCLK (MHz)
0.6
0.7
0.8
-0.2 '----'-__......L-_ _.L----L_ _......L.L-....J
o 0.2 0.4 0.6 0.8 1.0 1.2
fClK (MHz)
LTC1059
TYPICAL PERFORmAnCE CHARACTERISTICS
120
Vs; ±2.5V
0=10
O.B fcu< =50:1
fo I
#
;. 0.6
'"
J
~ 0.4 r---125 0 c
z
~
~
0.2
-?
-0.2
o
0.2
100
TA=25°C
J
I}
B5°C
:il
<>
/
--
V
0.4
/
~
J
55 0 C-
V
P"-..
r-.....
0.6
O.B
fCLK (MHz)
1.0
1\4=5
~ ...f1fI'I1l1
O=~ ~ .......
50:1
i'
0.2
0.4 0.6 O.B 1.0
f£LK (MHz)
fCLK =100.1
fo
.
~
o
Graph 19. Mode 3(R2 = R4~
fClKlfol VS 'ClK and Q
Vs= ±5V
TA=25°C
fCLK ;100.1
fo
.
~
0 , -,;:O=j,.....
-0.2
0=5
~
-~~
JJ
~I
7-8
o
0.2
20
'I
0=10
20
»
0.2 0.4 0.6 O.B 1.0 1.2 1.4 1.6 1.B 2.0
CLOCK FREQUENCY (MHz)
iJ
~
~
Graph 21. Mode 3(R2 = R4):
('clKlfol vs 'ClK and Temperature
Vs= ±5V
0",10
I
0.2
0
~
,-±::::
~~
0=10
-0.2
V
V
~
V' .I
0=50
<>
1
-0.4
fCLK =50.1
fo
.
'" 0.4
z
100
5
JI //~
:il
'"EE
10
Graph 18. Mode 3(R2 = R4):
Measured Qvs fClK and
Temperature
Vs±15V I
TA=25°C
fCLK =50.1
fo
.
~
...-V
0.1
Graph 20. Mode 3(R2 = R4~
(fClK/fJ VS fClK and Q
~ 0.4
~
1.6
0.2 0.4 0.6 O.B .1.0 1.2 1.4 1.6 1.B 2.0
CLOCK FREOUENCY (MHz)
0.2 0.4 0.6 O.B 1.0 1.2 1.4 1.6 I.B 2.0
CLOCK FREOUENCY (MHz)
0=20
./..
I
10
o~~~~~-L~~f~o~~·
f~K
o =200.1.
Vs= ~7.5y
<>
10 l--+-flH-tI--+lI-+--+--jI--+--I
fCLK =50.1
/-Jij-2
R4 -
IDEAL 0
,Vi
til 20
0.2
1.2 1.4
Vs= ±7.5V
Q=10
'I j
20
~ 10
~
~ 0
ff
(8)
Graph 17. Mode 3(R2 = R4): Q
Error vs Clock Frequency
TA=25°C
:;;
/
11111111
11111111
00
1.2
11111111
~=500.1
Vi
20
201--+--f-
~
Vs= ±5V
TA=25°C
PIN 9 AT 100:1
Vs= ±5V
TA=25°C
VIN=1VRMS
oj
1,10·=1
1/100:1
Graph 16. Mode 3: QError vs Clock
Frequency
0.6
Graph 15. Mode 3: Deviation of
(fClK/fJ with Respect to Q= 10
Measurement
Graph 14. Mode 1: Notch Depth vs
Clock Frequency
Graph 13. Mode 1: (fClKlfol vs fClK
and Temperature
~
O.B
I~.~K =100:1
~ 0.6
t::
:;;
fE
0.4 I---f--I--+-It-l+-
~
to: 0.2
1---+---+--7I'-7''I:::::,---+--~--::;;;I~
~
Q:V
0.4
0.6 O.B 1.0
fCLK (MHz)
1.2
1.4
1.6
o
0.2
0.4
0.6 O.B 1.0
fCLK(MHz)
1.2
1.4-
1.6
-0.2 '---'-----'-----'-"'----'--'---'--'
0.2 0.4 0.6 O.B 1.0 1.2 1.4 1.6 1.8
fCLK(MHz)
LTC1059
TYPICAL PERFORmAnCE CHARACTERISTICS
Graph 22. Mode 3(R2 = R4):
(fClK"o! vs fClK and Temperature
Graph 23. Mode 3(R2 = R4):
(fClK/fo! vs 'ClK and Temperature
Graph 24. Mode 3(R2 = R4):
('ClK/fo! vs fClK and Temperature
1.0
Vs= ±5V
Q=10
0.8
06
lelK =50:1
10
~ 0.6
§ 04
::;;
E 0.4
125/ 85'C
...--i-" TA=25'C
z
i
I~ /
~/
~V
/
0.2
V~
~ 0.2
z
o
~
~
0
-02
TJ25'C
125'C
//
1// /
leLK =100'1
::;;
o
Vs= ±2.5V
TA=25'C
Q=10
0.6
85'C J
10
-- ~ ~
~
~ 0.4
-55Y
5l
1----'----r----IIt--#;--t---ft-------i
::;;
fE
,/
......
0.2
z
o
~ o~~~~1I-1-1I_J
~
-0.2
f-----+--t----+--t----+-------i
F-'
-0.2
0.2
0.4
0.6
0.8 1.0 1.2
leLdMHz)
14
1.6
1.8
0.2
0.4
Graph 25. Mode 1c(R5=O),
Mode 2(R2 = R4) Q Error vs Clock
Frequency
0.6
08
leLdMHz)
1.0
12
0.2
04
0.6
0.8
leLK (MHz)
1.0
1.2
Graph 26. Supply Current vs
Supply Voltage
J
TA=25'C
/I
~)-551,/ I-Vrl=2J,c
20 f-----1f----+--+
J
V
~
D
1/ 1/ V
1/1 J / ~=125'C I-V
,~
l n v. . .
VIL IL
0~
____
~~L-L-L-~
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
CLOCK FREQUENCY (MHz)
±2 ±3 ±4 ±5 ±6 ±7 ±8 ±9 +10
POWER SUPPLY VOLTAGE (± V)
APPLICATions InFORmATion
The LTC1059 is compatible with the LTC1060. All the
LTC1059 pins are functionally equivalent to the LTC1060
pins bearing the same title. For a detailed pin description
and definition of various modes of operation refer to the
LTC1060 data sheet. The LTC1059 is typically "faster"
than the LTC1060 especially under single 5V (or ± 2.5V)
supply operation. This becomes apparent through the typo
ical performance characteristics of the part. All the graphs
shown in this data sheet have been drawn under the same
test conditions as in the LTC1060 data sheet; they are also
numbered in the same order. For acomplete discussion of
the filter characteristics see the LTC1060 data sheet.
7-9
LTC1059
PACKAGE DESCRIPTion
Dimensions in inches (millimeters) unless otherwise noted.
J Package
14·Lead Ceramic DIP
0005
(Oi3i
MIN
0220-0310
(5588-7874)
I: ::)
MAxmm~
(0381-1524)
'---'--'---'I
----1-
/0'-15"
0008-00~
(0.203-0460)
II"-r:-r--,-;;-r-r;-rr:-n-;-rr;-,..,-;;-'~
1
2
3
4
5
6
7
---I 1-
T
-4--
/.- (~;~~:~ ~~~)---.j
NPackage
14·Lead Plastic DIP
1
t
0250:1::0010
(6350±0.254)
0300-0320
L
0009_0015j
10229-0381)
0.325
~~ ~~;
(8.255 ~~
7-10
~~~)
t
0075::1:0.015 -+(1.905:1:0381)
MAX
··-----ll097;5~1------ TA !> 85°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10sec) .............. 300°C
ORDER PART NUMBER
TOP VIEW
LTC1059S
PART MARKING
LTC1059S
S14 PACKAGE
PLASTIC SO
ELECTRICAL CHARACTERISTICS
(Complete Filte~ Vs
=::!: SV, TA =25°C, T2L clock Input level unless otherwise specified.
PARAMETER
Center Frequency Range, fo
Input Frequency Range
Clock to Center Frequency Ratio
(Note 1)
QAccuracy (Note 1)
fo Temperature Coefficient
QTemperature Coefficient
DC Offset VOS1(Note 2)
V0S2
V0S2
V0S2
V0S2
V0S3
V0S3
DC Low Pass Gain Accuracy
BP Gain Accuracy at fo
Clock Feedthrough
Max. Clock Frequency
Power Supply Current
CONDITIONS
foxQs400kHz, Mode 1
foX Qs1.6MHz, Model
fox Qs25OkHz, Mode 3, Vs= ±7.5V
foxQslMHz, Mode3,Vs= ±7.5V
Mode 1,50:1, fClK=250kHz, Q=10
Mode 1, 100:1, fClK=5OOkHz, Q= 10
Mode 1,50:1 or 100:1, fo = 5kHz
Q=10
Mode 1, fCLK<5OOkHz
Model, fCLK <5OOkHz,Q=10
fCLK = 250kHz, 50:1, SA/B High
fCLK = 500kHz, 100:1, SAiB High
fCLK =25OkHz, 50:1, SA/B Low
fCLK = 500kHz, l00:I,SAlB Low
fCLK = 250kHz, 50:1
fCLK = 500kHz, 100:1
Mode 1, Rl = R2=5OkO
Mode 1, Q= 10, fo=5kHz
fCLKS1MHz
Mode 1, Q<5, Vs~ ± 5V
Hote1: An LTC1059S with improved Qand clock to center frequency ratio
accuracy can be made available upon special request.
Hote2: For definition of the DC offset voltages, refer to the LTC1059 data
sheet. An LTC1059S with improved DC offset specifications can be made
available upon special request.
7-12
MIN
••
•
••
••
••
•
•
•
TYP
0.1-40k
Ool-18k
0.1-20k
0.1-16k
0-200k
±0.5
5
15
2
3
6
2
4
2
4
±0.1
±0.1
10
2
3.5
MAX
50 ± 0.8%
100 ± 0.8%
5
15
40
80
30
60
30
60
2
5.5
7
UNITS
Hz
Hz
Hz
Hz
Hz
%
ppm/DC
ppm/DC
mV
mV
mV
mV
mV
mV
mV
%
%
mV
MHz
mA
mA
LTC1059CS
ELECTRICAL CHARACTERISTICS (Complete Filter) Vs =±2.37V, TA =25°C unless otherwise specified
PARAMETER
Center Frequency Range
Input Frequency Range
Clock to Center Frequency Ratio
QAccuracy
CONDITIONS
foxQ~120kHz,
foxQ~120kHz,
MIN
Mode 1, 50:1
Mode 3, 50:1
Mode 1, 50:1, fClK = 250kHz, Q= 10
Mode 1, 100:1, fClK =250kHz, Q= 10
Mode 1, fClK = 250kHz, Q= 10
50:1 and 100:1
Max. Clock Frequency
Power Supply Current
TYP
0.1-12k
0.1-10k
SOk
50±0.8%
100±0.8%
±2
700k
1.5
MAX
UNITS
Hz
Hz
Hz
%
2.5
Hz
rnA
ELECTRICAL CHARACTERISTICS (Internal Op Amps) TA = 25°C unless otherwise specified
PARAMETER
Supply Voltage Range
Voltage Swings
Input Offset Voltage
Input Bias Current
Output Short Circuit Current
SourcefSink
DC Open Loop Gain
GBW
Slew Rate
CONDITIONS
Vs= ±5V, Rl =5k(Pins1, 14)
Rl = 3.5k (Pins 2, 13)
Vs= ±5V
Vs= ±5V
Vs= ±5V
Vs= ±5V
--
MIN
± 2.375
±3.S
±3.S
TYP
MAX
±8
±4.2
1
3
25/3
SO
2
7
15
UNITS
V
V
V
mV
pA
rnA
dB
MHz
Vf~s
The _ denotes the specifications which apply over the full operating
temperature range.
7-13
NOTES
7-14
.L7YD~~~~----u-n-iv-e-rs-a-I-D-~-:C-1F_l~-I~-~
Building Block
FEATURES
DESCRIPTion
• Guaranteed Filter Specification for ± 2.37V and
±5VSupply
• Operates up to 30kHz
• Low Power and 88dB Dynamic Range at ± 2.5V Supply
• Center Frequency QProduct up to 1.6MHz
• Guaranteed Offset Voltages
• Guaranteed Clock to Center Frequency Accuracy over
Temperature
0.3 %for LTC1060A
0.8% for LTC1060
• Guaranteed QAccuracy over Temperature
• Low Temperature Coefficient of Qand Center
Frequency
• Low Crosstalk, 70dB
• Clock Inputs TIL and CMOS Compatible
The LTC1060 consists of two high performance, switched
capacitor filters. Each filter, together with 2 to 5 resistors,
can produce various 2nd order filter functions such as lowpass, bandpass, high pass notch and all pass. The center
frequency of these functions can be tuned by an external
clock, or by an external clock and resistor ratio. Up to 4th
order full biquadratic functions can be achieved by cascading the two filter blocks. Any of the classical filter configurations (like Butterworth, Chebyshev, Bessel, Cauer)
can be formed.
The LTC1060 operates with either a single or dual supply
from ± 2.37V to ± When used with low supply (Le.
single 5V supply), the filter typically consumes 12mW and
can operate with center frequencies up to 10kHz. With
± 5V supply, the frequency range extends to 30kHz and
very high Qvalues can also be obtained.
av.
APPliCATiOns
The LTC1060 is manufactured by using Linear Technology's enhanced LTCMOSTM silicon gate process. Because of this, low offsets, high dynamic range, high center
frequency Q product and excellent temperature stability
are obtained.
• Single 5V Supply Medium Frequency Filters
• Very High Q and High Dynamic Range Bandpass,
Notch Filters
• Tracking Filters
• Telecom Filters
The LTC1060 is pinout compatible with MF10.
LTCMOSTM Is a trademar1<: of LinearTechnology Corp.
Single 5V, Gain of 1000 4th Order Bandpass Filter
Amplitude Response
3.16k
70
...----+_OUTPUT
60
50
40
+5V
J.:=-----'
1k
0.1~F
~~-+-I~
1k
'"
~
~
1\
30
I \
20
10
-10
/
o
'\
100 125 150 175 200 225
INPUT FREQUENCY (Hz)
250 27
7-15
III
LTC1060
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage ..................................... 18V
Power Dissipation .............................. 500mW
Operating Temperature Range
LTC1060AC, LTC1060C ............ - 40 oCsTAS85°C
LTC1060AM, LTC1060M .......... -55°CsTAS125°C
Storage Temperature Range ............ - 65°C to 150°C
Lead Temperature (Soldering, 10sec.) .............. 300°C
ORDER PART
NUMBER
J PACKAGE
CERDIP
ELECTRICAL CHARACTERISTICS
(Complete Filte~ Vs
PARAMETER
CONDITIONS
Center Frequency Range
(see Applications Information)
fo x 0 s400kHz, Mode 1, Figure 4
foxOs1.6MHz, Mode 1, Figure 4
Clock to Center Frequency Ratio
LTC1060A
LTC1060
LTC1060A
LTC1060
Mode 1,50:1, fCLK = 250kHz, 0 = 10
Mode 1, 50:1, fClK=250kHz, 0= 10
Model, 100:1, fClK=500kHz, 0= 10
Mode 1,100:1, fClK = 500kHz, 0 = 10
oaccuracy
LTC1060A
LTC1060
Mode 1, 50:1 or 100:1, fo=5kHz
0=10
fo Temperature Coefficient
oTemperature Coefficient
Mode 1, fCLK <500kHz
Mode 1, fCLK<500kHz, 0= 10
DC Offset Vos1
Vos2
V0S2
V0S2
V0S2
V0S3
V0S3
fClK = 250kHz, 50:1, SAiB High
fClK = 500kHz, 100:1, SA/B High
fClK = 250kHz, 50:1, SAiB Low
fCLK = 500kHz, 100:1, SAiB Low
fCLK = 250kHz, 5O:1,SAlB Low
fCLK =5OOkHz,100:1,SAlBLow
DC Low Pass Gain Accuracy
BP{3ain Accuracy at fo
Clock Feedthrough
Max. Clock Frequency
Power Supply Current
Crosstalk
7-16
LTC1060ACJ
LTC1060MJ
LTC1060ACN
LTC1060AMJ
LTC1060CN
LTC1060CJ
N PACKAGE
MOLDED DIP
=:!: 5V, TA =25°C unless othelWise specified.
MIN
TYP
MAX
O.l-20K
0.1-16K
••
•
Hz
Hz
50±0.3%
50±0.8%
l00±0.3%
l00±0.8%
•
••
±0.5
±0.5
3
5
•
•
•
•
•
•
•
Model,Rl=R2=50k
Mode 1, 0= 10, fo = 5kHz
fClK S1MHz
3
2
3
6
2
4
2
4
15
30
60
20
±0.1
±0.1
10
1.5
5
2
70
%
%
ppm/oC
ppm/oC
-10
+20
•
UNITS
40
20
40
8
12
mV
mV
mV
mV
mV
mV
mV
%
%
mV(p-p)
MHz
mA
mA
dB
LTC1060
ELECTRICAL CHARACTERISTICS
(Complete Filter)Vs= ±2.37V, TA=25°C
PARAMETER
CONDITIONS
Center Frequency Range
fo x Qs100kHz
Clock to Center Frequency Ratio
LTC1060A
LTC1060
LTC1060A
LTC1060
Mode 1, 50:1, fClK = 250kHz, Q= 10
Mode 1, 50:1, fClK = 250kHz, Q= 10
Mode 1, 100:1, fClK = 250kHz, Q= 10
Mode 1, 100:1, fClK =250kHz, Q= 10
QAccuracy
LTC1060A
LTC1060
MIN
OJ-10k
•
•
Supply Voltage Range
Voltage Swings
LTC1060A
LTC1060
LTC1060, LTC1060A
Output Short Circuit Current
Source
Sink
Op Amp GBW Product
Op Amp Slew Rate
Op Amp DC Open Loop Gain
Hz
50±0.5%
±2
±4
Mode 1, fo=2.5kHz, Q= 10
%
%
500
2.5
ELECTRICAL CHARACTERISTICS
UNITS
50±0.8%
100±0.5%
100±0.8%
Max Clock Frequency
Power Supply Current
PARAMETER
MAX
TYP
kHz
rnA
4
(InternaIOpAmps)TA=25°C
CONDITIONS
MIN
TYP
±2.37
Vs= ±5V, Rl =5k(Pins 1, 2, 19, 20)
Rl = 3.5k (Pins 3, 18)
Vs= ±5V
±4
±3.8
±3.6
•
Vs= ±5V
Vs= ±5V
Rl =10k,Vs= ±5V
MAX
±8
UNITS
V
4
4
4
V
V
V
25
3
2
7
85
mA
mA
MHz
V/~s
dB
The • denotes the specifications which apply over the full operating
temperature range.
BLOCK DIAGRAm
TO AGND
--=::;:====-'<1.
N/APIHPS S1s
BPs
LPs
7-17
LTC1060
TYPICAL PERFORmAnCE CHARACTERISTICS
Graph 1. Mode 1:
(feLK/fol Deviation vs Q
Graph 2. Mode 1:
(feLK/fal Deviation vs Q
Graph 3. Mode 1: QError vs Clock
Frequency
Vs~ ±5V "."
0.4
TA~25°C
20
fCLK ~ 250 kHz
1\
:2 -0.4
'"
a
~
d - 0.1
d -0.8
'=-
~ -12
/
>=
~ -1.6
~
fCLK
fo
13 - 0.2 1-+--l-++++WI-H'H-f+III-l--+++tttH
50 (TEST POINT)
~
1/
-2.0
1-+--l-++++WI-+--+-bI'f+III~l--+++tttH
'=-
~
-2.4
- 0.3 1-+--l-++++WI-JlJ++++HIIl--+-++l+l+H
- 0.4
~+-1--++tltTf--/ft-+++tt1Ilt-+++ttttti
- o. 5
~+-1--++tltTfl-H-++ftt\\-f--t++ttttl
- 0.6 1-+--l-++ttt+I-H-t+f+III-l--+++tttH
01
IDEAL a
10
100
0.1
Graph 4. Mode 1: QError vs Clock
Frequency
11~K
~
o
~
'"ff
13
~
0.8
VS=±5V
=100 1
TA~25°C
fr~K =100 1
~
~
'"ff
I
/
/
fCLK ~ 100:1
fo [
0.6
10~+--+~~~~~~~~~
0.4
0.2
z
I
j
1~~20[ a~50
0
20 I-+--+--+-----,t'"
~
20
-20L--L~L--L~_~~_~~
02 0.4 0.6 0.8 1.0 1.2 1 4 1.6 1 8 2.0
fCLK (MHz)
0.2
fCLK
04
\
0
~
0.2
1.0
~50:1
i
1
~r;
-- -.--- ~V
a-5~
aJ 20
.L--
0
~
as
a:f
0
-02
,//
0020.4
7-18
0.6 0.81.0121.4
fCLK (MHz)
0.8
1.0
1.2
0.8
~
~
'ff'"
0
0,6
0.4
~5'C
++'C
~ 1/
±5V
Vs~
a~10
14
1.6
-0.4
1.8
o
0.2
0.4
~
0.2
-0.2
0.2
/
-
~=).O~
~
0.6
0.8
fCLK (MHz)
1.0
1.2
1.4
Graph 9. Mode 1: (feLK/fol vs feLK
and Temperature
1.0
r---,----,~-,--"'""T--,--,--;__,
TA~25'C
0.8 1--+-11-+--++-
/
I ;!
/
~ ~~
/
0
~
II
~~100:1
z
Q~y'
-0.4
0.6
Graph 8. Mode 1: ('eLK/'olvs 'eLK
and Temperature
Vs~ ±5V
TA~25°C
0.6
0.4
a~51
fCLKlMHz)
Graph 7. Mode 1: (feLK/folvs feLK
andQ
08
,~V
~
-0.2
o~~~~~~~~~~
ff'"z
Vs~ ±5V
0=:10
20
20
Graph 6. Mode 1: (feLK/fol vs feLK
andQ
~ 101-+--+~~~~~~~4-~
~
0.4 0.6 0.8 10 1.2 1.4 1.6 1.8
fCLK (MHz)
100
Graph 5. Mode 1: Measured Qvs
feLK and Temperature
VS=±75V
TA=25"C
20
10
IDEAL Q
'"ff
0.4 ~"-t--r++-f++--+-+----l
z
-55'C
o
~ 0.2 1--+-~~--boY--!----7"""i::----7I
:?" \
~
-02%L--L_L--L~_~~_~~
04
0.6
0.8 1.0 1.2
fCLK (MHz)
1.4
1.6
1.8
0.2 0.4
0.6
08 1.0 1.2
fCLK (MHz)
14
1.6
1.8
LTC1060
TYPICAL PERFORmAnCE CHARACTERISTICS
Graph 10. Mode 1: (fClK/fJ VS fClK
andQ
1.0
I
0.8
J
Vs= ±2.SV
0.8 ,- TA=2S'C
~=100:1
~
~
""fE
0
~'"
o=~_ _
~'1
0.2
;;;
~
0=50
..4
o 20
.,..,.
0=1h:rO=S
-0.2
o
100 200 300
0=20
0=10
~
-0.2
SOO
600
700
0
100
0.8
100 oJo
~
g 0.6 1---t--+-+--+----1+---t---I
0.41--+--1+-+-+-+-+--+---1
~ 0.4
i
I---t--+I-I+--+-H---I
o
'"
0.2
200
300
~
~~~q._+_+- 'r~K =SO:1
600
0.2
700
0.4
0.6
.~
60
P'--
0.8
1.0
Vs= ±5V
TA=25'C
PIN 12 AT 100.1
11111111
f~~K =500
0.4
"-
0.6
0.8
1.0
/
"
1.2 1.4
1.6
01
10
20
Graph 18. Mode 3(R2 = R4):
Measured Qvs fClK and
Temperature
10
15
Iiic
0
IClK =SO.,
.
10
20
10
2.0
o
10
/ /1
IClK =,00.,
.
10
SO
ssoc'Iv
VS=±5V
20 1~t,J<=100·1
10
o=S
~
i
10
o
'"
ff
~
0=1S
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
IClKtMHz)
125°C
c
~~
J
j If
100
IDEAL 0
0=10
si
'T~K =200:1
11111111
11111111
40
Js = 17.SJ
I-TA =2S'C
/JM=l
R4 2
(8)
Graph 17. Mode 3(R2 =R4): Q
Error vs Clock Frequency
20 1-+---t=J7f,
1
~ -11mfI1
~
'ClKtMHz)
Graph 16. Mode 3: QErrorvs Clock
Frequency
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
Graph 15. Mode 3: Deviation of
(fClK/fJwith Respect to Q= 10
Measurement
i'....
1"0-
0.2
1.2
R4 - 5
40
o
1.2
1.0
V*-1
o=w--50:1
o
0.8
IClKtkHz)
Vs= ±sv
TA=2S'C
V,N=IVRMS
'ClK (kHz)
'ClK(MHz)
SOO
20
'----'-_~_...L__.L---'-_.....J
0.6
400
1/
~ 80
~
vs= ±2.SV
0.2 I---t-+J'-+-~-+- a= 10
0.4
:E
' , ' 100:1
0=1
:J:
0.2
~ 'l
.
10
06 1--+--++-+--t--++---1
Graph 14. Mode 1: Notch Depth vs
Clock Frequency
120
o
~
IClK (kHz)
1.0 r-----r---,---,---r-----r---.,
-0.2
0.8
"$.
V
O=S . "
Vs= ±2.SV
0=10
IClK = 100.1
-0.4
400
Graph 13. Mode 1: (fClK/fJvs fClK
and Temperature
~~
1
-......t;::Vj
IClK (MHz)
""~
i
~=SO:1
/
0.4
J.
I
Vs= ±2.SV
0.6 t- TA=2S'C
/
0.6
Graph 12. Mode 1: (fClK/fo) vs fClK
and Temperature
Graph 11. Mode 1: (fClK/fJvs fClK
andQ
0
-20
40
~/
Jri=25'!
-5~'\
/
r-r-}'cJ
~-;=501
20
~
-20
0.2
85'C
.,t,V :/
0.4
0.6
0.8
L25'C
-55'C
:--... -P'"
1.0 1.2 1.4
J
1.6
1.8
IClKtMHz)
7-19
LTC1060
TYPICAL PERFORmAnCE CHARACTERISTICS
Graph 20. Mode 3(R2 = R4):
('ClKIfJ vs 'ClK and Q
Graph 19. Mode 3(R2 = R4):
'cuJ'J vs 'ClK and Q
0.8
Vs= ±5V
TA=25°C
0.6
~'=100:1
ii
~
~
0.4
'"
'"
fE
~ 0.2
<=>
z
<=>
~
~
0,
0
r-;i
~?
-0.2
-0.4 0=5
o 0.2
./
20,0 40,0 50
0.4
V
0.8
1.0
0.6
OB
0.4
iii
1.2
j
1.4
1.0
O.B
0.8
g
'"ff
0.6
~
-125°C 850C
~V_ ~25OC
0.4
z
<=>
!:i
~
0.6
-
0.2
V
~~
~
vr-
-
r \
'"fE
<=>
-55°C\
0.4 0.6
-
0.2
~
~
0.6
0.4
z
0.4
0.6 O.B
fCLKtMHz)
1.0
1.2
~ 0.2
0.2
~
-0.2
0.2
-
1.8
o
0.2
0.6
,/TA=25 0C
I
0.4
0.6
O.B
fCLK (MHz)
II
ii
85°C
?' 0.6
0
/25 C/
fil
'z"
125°C]
~ 0.4
JJ I V
<=>
~
ill
./
0.2
~~
1.2
02
04
Graph 26. Supply Current vs
Supply Voltage
16
10
o~~~--~~~+-~~
~ 20
~
/
~ 12
~ 10
/
/ /
'-'
~
8
!5
6
'"
~
IA 'V /"
O~~~~~~~~~~
7-20
TA~ -5Jor.
~ 14
0.2
0.4
0.6 O.B 1.0
fCLd MHz)
1.2
J
1.4 1.6
-55°C
20
a
-55
O.B 1 1.2
fCLK (MHz)
18 - ,dLKJMH!
~
is
./
0.8
V
Graph 25. Mode 1c (R5 = 0),
Mode 2(R2 = R4) QError vs Clock
Frequency
"~
- ~1/'
1.0
. 1 55 oC
'I I J
A 'J -" /
0
0.4
-
"...
Graph 24. Mode 3(R2 = R4):
('ClKIfJ VS 'ClK and Temperature
125°C
-0.2
V. I
~
1.4
TA~25°C
J /
<=>
f~~K =50:1
Ire!
<=>
>=
s;
B5°C
125°C
'"~
Vs= ±5V
TA=25°C -
Vs= ±2.5V
0=10
fClK=100'1
fa
.
,'-
0.8 1 1.2 1.4 1.6
fCLK (MHz)
V
/
Vs= ±5V
0=10
I- fClK =100'1
fa
~~
z
-0.4
0.2
o
~
,/
§ 0.4
VS=±5V _ _
0=10
fClK=50:1
fi
o~
~
Graph 23. Mode 3(R2 = R4):
('ClK/'J vs 'ClK and Temperature
Graph 22. Mode 3(R2 = R4):
('ClKIfJ YS 'ClK and Temperature
ii
-
::;...-
0:;-;- /"
z
<=>
-0.4
1.0
0-20 0=50
0.2
-0.2
0.6 0.8
fCLK (MHz)
Graph 21. Mode 3(R2 = R4):
('ClK/'J vs 'ClK and Temperature
1.4
o
IV v
..1A=25°CJ
/ ,/ ""'fA=1J5 0C ",
'"
'" 1 '" 2 ± 3 ± 4 '" 5 ± 6 ± 7 ± B ± 9 ± 10 ± 11
SUPPLY VOlTAGE(± V)
Vs= ±2.5V
0=10
fClK=50'1
'a
.
06
08
fCLK (MHz)
1~
1.B
LTC1060
Pin DESCRIPTion AnD APPLICATions InFoRmATion
Power Supplies
The Vtand Vo(pins 7and 8) and the VA, Vo(pins 14 and 13)
are, respectively, the analog and digital positive and nega·
tive supply pins. For most cases, pins 7 and 8 should be
tied together and bypassed by a 0.1/LF disc ceramic
capacitor. The same holds for pins 14 and 13. If the
LTC1060 operates in high digital noise environment, the
supply pins can be bypassed separately. Pins 7 and 8 are
internally connected through the IC substrate and should
be biased from the same DC source. Pins 14 and 13 should
also be biased from the same DC source.
The LTC 1060 is designed to operate with ± 2.5V supply (or
single 5V) and with ± 5V to ± 8V supplies. The minimum
supply, where the filter operates reliably, is ± 2.37V. With
low supply operation, the maximum input clock frequency
is about 500kHz. Beyond this, the device exhibits exces·
sive Qenhancement and center frequency errors.
Clock Input Pins and Level Shift
The level shift (L5h) pin 9 is used to accommodate T2L or
CMOS clock levels. With dual supplies equal or higher to
± 4.5V, pin 9 should be connected to ground (same poten·
tial as the AGND pin). Under these conditions the clock
levels can be T2L or CMOS. With single supply operation,
the negative supply pins and the L5h pin should be tied to
the system ground. The AGND, pin 15, should be biased at
1/2 supplies, as shown in the "Single 5V Gain of 1000 4th
Order Bandpass Filter" circuit. Again, under these condi·
tions, the clock levels can be T2L or CMOS. The input
clock pins (10, 11) share the same level shift pin. The clock
logic threshold level over temperature is typically
1.5V ± 0.1V above the LSh pin potential. The duty cycle of
the input clock should be close to 50%. For clock frequen·
cies below 1MHz, the (fCLK/fo) ratio is independent from
the clock input levels and from its rise and fall times. Fast
rising clock edges, however, improve the filter DC offsets.
For clock frequencies above 1MHz, T2L level clocks are
recommended.
50/1oo/Hoid (Pin 12)
By tying pin 12 to (Vt, Vol, the filter operates in the 50:1
mode. With ± 5V supplies pin 12 can be typically 1V below
the positive supply without affecting the 50:1 operation of
the device. By tying pin 12 to 1/2 supplies (which should be
the AGND potential), the LTC1060 operates in the 100:1
mode. The 112 supply bias of pin 12 can vary around the 1/2
supply potential without affecting the 100:1 filter opera·
tion. This is shown in Table 1.
When pin 12 is shorted to the negative supply pin, the filter
operation is stopped and the bandpass and lowpass out·
puts act as a SIH circuit holding the last sample. The hold
step is 20mV and the droop rate is 150/LV/secondl
Table 1
Total Power Supply
Voltage Range of Pin 12
for 100:1 Operation
+5V
+10V
+15V
2.5V±O.5V
+5V±1V
+ 7.5V ± 1.5V
S1 A, S1 B(Pins 5and 16)
These are voltage signal input pins and, if used, they
should be driven with a source impedance below 5kll. The
S1A, 51B pins can be used to alter the CLK to center fre·
quency ratio (fCLK/fo) of the filter (see Modes 1b, 1c, 2a, 2b)
or to feedforward the input signal for all pass filter con·
figurations (see Modes 4 and 5). When these pins are not
used, they should be tied to the AGND pin.
SAlB(Pin 6)
When SAiB is high, the S2 input of the filter's voltage sum·
mer (see Block Diagram) is tied to the lowpass output. This
frees the 51 pin to realize various modes of operation for
improved applications flexibility. When the 5A1B pin is con·
nected to the negative supply, the 52 input switches to
ground and internally becomes inactive. This improves the
filter noise performance and typically lowers the value of
the offset VOS2.
AGND(Pin 15)
This should be connected to the system ground for dual
supply operation. When the LTC1060 operates with a
single positive supply, the analog ground pin should be
tied to 1/2 supply and bypassed with a 0.1/LF capacitor, as
shown in the application, "Single 5V, Gain of 1000 4th Or·
der Bandpass Filter". The positive inputs of all the internal
op amps, as well as the reference point of all the internal
7-21
III
LTC1060
APPLICATions InFoRmATion
switches are connected to the AGND pin. Because of this,
a"clean" ground is recommended.
felK/fo Ratio
The (fCLK/fo) reference of 100:1 or 50:1 is derived from the
filter center frequency measured in mode 1, with a 0= 10
and Vs = ± 5V. The clock frequencies are, respectively,
500kHz/250kHz for the 100:1/50:1 measurement. All the
curves shown in the Typical Performance Characteristics
section are normalized to the above references.
Graphs 1and 2in the Typical Performance Characteristics
show the (fClK/fo) variation versus values of ideal a. The
LTC1060 is a sampled data filter and it only approximates
continuous time filters. In this data sheet, the LTC1060 is
treated in the frequency domain because this approximation is good enough for most filter applications. The
LTC1060 deviates from its ideal continuous filter model
when the (fClK/fo) ratio decreases and when the a's are
low. Since Iowa filters are not selective, the frequency
domain approximation is well justified. In graph 15 the
LTC1060 is connected in mode 3 and its (fCLK/fol ratio is
adjusted to 200:1 and 500:1. Under these conditions, the
filter is over-sampled and the (fCLK/fo) curves are nearly independent of the a values. In mode 3, the (fCLK/fo) ratio
typically deviates from the tested one in mode 1
by ±0.1%.
fo x a Product Ratio
This is a figure of merit of general purpose active filter
building blocks. The fo x a product of the LTC1060
depends on the clock frequency, the power supply voltages, the junction temperature and the mode of operation.
At 25°C ambient temperature for ± 5V supplies, and for
clock frequencies below 1MHz, in mode 1 and its derivatives, the fo x a product is mainly limited by the desired fo
and a accuracy. For instance, from graph 4at 50:1 and for
fClK below 800kHz a predictable ideal a of 400 can be
obtained. Under this condition, a respectable fo x a product of 6.4MHz is achieved. The 16kHz center frequency will
be about 0.22% off from the tested value at 250kHz clock
(see graph 1). For the same clock frequency of 800kHz and
for the same a value of 400, the fo x a product can be further increased if the clock to center frequency ratio is low-
7-22
ered below 50:1. In mode 1c with R5=0 and R6= 00, the
(fClK/fo) ratio is 50/..J2. The fo x a product can now be increased to 9MHz since, with the same clock frequency and
same a value, the filter can handle a center frequency of
16kHzx..J2.
For clock frequencies above 1MHz, the fo x a product is
limited by the clock frequency itself. From graph 4 at
±7.5V supply, 50:1, and 1.4MHz clock, a a of 5 has about
8% error; the measured 28kHz center frequency was
skewed by 0.8% with respect to the guaranteed value at
250kHz clock. Under these conditions, the fo x a product
is only 140kHz, but the filter can handle higher input signal
frequencies than the 800kHz clock frequency-very high a
case described above.
Mode 3, Figure 11, and the modes of operation where R4 is
finite, are "slower" than the basic mode 1. This is shown
in graph 16 and 17. The resistor R4 places the input op
amp inside the resonant loop. The finite GBW of this op
amp creates an additional phase shift and enhances the a
value at high clock frequencies. Graph 16 was drawn with
a small capaCitor, Cc, placed across R4 and as such, at
Vs= ±5V, the (1I211'R4CC) = 2M Hz. With Vs= ±2.5V the
(1/211'R4Cc) should be equal to 1.4MHz. This allows the a
curve to be slightly "flatter" over a wider range of clock
frequencies. If, at ± 5V supply, the clock is below 900kHz
(or 400kHz for Vs = ± 2.5V), this capacitor, Cc, is not
needed.
For graph 25, the clock to center frequency ratios are altered to 70.7:1 and 35.35:1. This is done by using mode 1c
with R5 = 0, Figure 7, or mode 2 with R2 = R4 = 10kO. The
mode 1c, where the input op amp is outside the main loop,
is much faster. Mode 2, however, is more versatile. At 50:1,
and for TA = 25°C the mode 1c can be tuned for center frequencies up to 30kHz.
Output Noise
The wideband rms noise of the LTC1060 outputs is
nearly independent from the clock frequency provided that
the clock itself does not become part of the noise. The
LTC1 060 noise slightly decreases with ± 2.5V supply. The
noise at the BP and LP outputs increases for high a's.
Table 2 shows typical values of wideband rms noise. The
numbers in parentheses are the noise measurement in
mode 1 with the SAIS pin shorted to V- as shown in
Figure 25.
LTC1060
APPLICATions InFoRmATion
Table 2. Wideband rms Noise
'elK
V.
'.
Notch/HP
I/IVnns)
±5V
±5V
±2.5V
±2.5V
50:1
100:1
50:1
100:1
49(42)
70(55)
33(31)
48(40)
±5V
±5V
±2.5V
±2.5V
50:1
100:1
50:1
100:1
±5V
±5V
±2.5V
:t2.5V
±5V
±5V
±2.5V
:t2.5V
BP
I/IVrms)
LP
I/IVrms)
CONDITIONS
52(43)
75(65)
80(58)
90(88)
36(32)
52(40)
48(43)
66(55)
20(18)
25(21)
16(15)
20(17)
150(125)
220(160)
100(80)
150(105)
186(155)
240(180)
106(87)
150(119)
50:1
100:1
50:1
100:1
57
72
40
50
57
62
80
42
53
Mode 3, Rl = R2= R3= R4
0=1
40
50
50:1
100:1
50:1
100:1
135
170
100
125
120
160
88
115
140
185
100
130
Mode 3, R2= R4, 0= 10
R3 = R1for BP out
R4=Rl forLPandHPout
72
Mode 1, Rl = R2= R3
0=1
Model,O=10
Rl = R3 for BP out
Rl = R2 for LP out
Short Circuit Currents
Short circuits to ground, positive or negative power supply
are allowed as long as the power supplies do not exceed
± 5V and the ambient temperature stays below 85°C.
Above ± 5V and at elevated temperatures, continuous
short circuits to the negative power supply will cause ex·
cessive currents to flow. Under these conditions, the de·
vice will get damaged if the short circuit current is allowed
to exceed 80mA.
DEFinITiOn OF FILTER FunCTions
Each building block of the LTC1060, together with an external clock and a few resistors, closely approximates 2nd
order filler functions. These are tabulated below in the freQuency domain.
1. Bandpass function: available at the bandpass output
pins (2, 19), Figure 1.
G(s) - H
sWo/Q
- OSP s2 +(swoIQ) +w0 2
=
Q Quality factor of the complex pole pair. It is the
ratio of fo to the - 3dB bandwidth of the 2nd order bandpass function. The Qis always mea·
sured at the filter BP output.
2. Lowpass function: available at the LP output pins
(1,20), Figure 2.
=
G(s) HOLP
Hosp= Gain at W=Wo
fo =wol21r; fo is the center frequency of the complex
pole pair. At this frequency, the phase shift between input and output is -180°.
S2 +s(wolQ) +w~
=
HOLP DC gain of the LP output.
7-23
II
LTC1060
DEFiniTion OF FILTER FunCTions
5. Allpass function: available at pins 3(18) for mode 4, 4a.
3. Highpass function: available only in mode 3at the out·
put pins (3, 18), Figure 3.
G() H [s2 - s(UlolQ) h~l
s = OAP s2 +s(UlolQ) +Ul~
s2
G(s) =HOHP
s2 +s(wdQ) +Ul~
.
feLK
HOHP =gain of the HPoutput for f- 2
HOAP =gain of the allpass output for 0 -30
-40
T2L OR CMOS _ - - - - - - '
CLOCK IN
Rll=60k
R41=28.84k
R52=5k
R32=455.75k
RESISTOR VALUES
R21=5k
R31=54.75k
Rh1=5k
RI1=19.3k
R62=1.59k
R22=60k
R42=503.85k
-50
-60
0.7
0.8
0.9
10 =1.0
1.1
1.2
1.3
INPUT FREQUENCY NORMALIZED TO FILTER CENTER FREQUENCY
Figure 22. Combining mode 3 with mode 2b to create a 4th order
BR elliptic filter with 1dB ripple and a ratio of OdB to stop
bandwidth equal to 9/1.
Figure 23. Amplitude Response of the notch filter of Figure 22.
LTC1060 OFFSETS
Switched capaCitor integrators generally exhibit higher
input offsets than discrete R,C integrators.
These offsets are mainly due to the charge injection of the
CMOS switches into the integrating capacitors and they
are temperature independent. The internal op amp offsets
also add to the overall offset budget and they are typically
acouple of millivolts.
Because of this, the DC output offsets of switched capacitor filters are usually higher than the offsets of discrete
active filters.
7-32
Figure 24 shows half of an LTC1060 filter building block
with its equivalent input offsets VOS1, VOS2, VOS3. All three
are 100% tested for both sides of the LTC1060. VOS2 is
generally the larger offset. When the SAlB, pin 6, of the
LTC 1060 is shorted to the negative supply (i.e., mode 3),
the value of the VOS2 decreases. Additionally, with SAIB
low, a 20%-30% noise reduction is observed. Mode 1can
still be achieved, if desired, by shorting the S1 pin to the
lowpass output, Figure 25.
LTC1060
LTC1060 OFFSETS
(20)
V,N
Figure 24. Equivalent Input Offsets of 112 LTC1060 Filter Building
Block
Output Offsets
The DC offset at the filter bandpass output is always equal
to VOS3. The DC offsets at the remaining two outputs
(Notch and LP) depend on the mode of operation and ex·
ternal resistor ratios. Table 5illustrates this.
Figure 2S. Mode
1(LN~
Same Operation as Mode 1 but Lower
VOS2 Offset and Lower Noise
especially when the filter handles input signals with large
dynamic range. As a rule of thumb, the output DC offsets
increase when:
1. The Q's decrease
2. The ratio (fCLK/fo) increases beyond 100:1. This is
done by decreasing either the (A2/A4) or the A61
(A5 +A6) resistor ratios.
It is important to know the value of the DC output offsets,
TableS
VOSN
Pin 3(18)
Mode
VOSLP
Pin 1(20)
VOSBP
Pin 2(19)
1,4
Vosl[(l/Q) + 1+ IHoLpl]- V0S3/Q
V0S3
VOSN-V0S2
1a
Vos l[l + (1/QIl - VOS3/Q
V0S3
VOSN- VOS2
1b
VOS1[(1/Q)+ 1 + R2IR1]- VOS3/Q
V0S3
-(VOSN - VosiJ (1 + R5IR6)
1c
VOS 1[(1/Q)+ 1 + R2IR1]- V0S3/Q
,V0S3
-(V _ VosiJ (R5+ R6)
OSN
(R5 + 2R6)
2,5
[Vosl(l + R2IR1 + R2/R3+ R2IR4)- V0S3(R2IR3Ilx
x [R4I(R2+ R41l+ V0S2[R2I(R2+ R4)]
V0S3
VOSN - VOS2
2a
[Vosl(l + R2IR1 + R2IR3 + R2IR4) - V0S3(R2IR31l x
VOS3
-(V
X
2b
t
OSN
_ VosiJ (R5+ R6)
(R5 + 2R6)
[Vosl(l + R2IR1 + R2IR3 + R2IR4) - V0S3 (R2IR3)] x
x
3,4a
bR2+R4(l+k)
d+V0S2 bR2+ R4(1+k)
R2
d,'k- R6
R4(1 +k)
R5+ R6
II
~R4kj
R2+ R4k
Vos2
V
+ 0S2
R2 j k
R6
R2+ R4k ; = R5+ R6
VOS3
VOS3
-(VOSN- VosiJ(l + R5IR6)
~
~Ri)
Vosl 1+-+-+R4 R4 R4J -V0S2 R1 R2 R3
R2
-V0S3
(~)
7-33
LTC1060
PACKAGE DESCRIPTion
Dimensions in inches (millimeters) unless otherwise noted.
JPackage
20 Lead CERDIP
1.060
t---------(26.924)---------i·~1
MAX
t
0220-0310
(5.588-7.874)
0.025
(0.635)
~
RAD TYP
0.290-0.320
I
0160
(4064)
MAX
GLASS
SEALANT
rr(7.366-8.128)-!
0.015-0060
j
123456789
I--
~"~'
'H-+
L
-J -
0385±0025 _____
(9779 ±O 635)
-.i
0200
[0",-""
0008- 0018
(0203-0457)
0.005
(0 127)
MIN
~
(3.175)
MIN
~
-t
0080
-I-- (2.032)
MAX
......
0038-0068
(0.965 -1.727)
W
0 100 ±O 010
(2.540 ±0.254)
__ __ 0.014-0.026
(0.356-0.660)
TJMAX
150'C
J20188
9JA
70'CIW
NPackage
20 Lead Molded DIP
1.040
t---------(26.416)----------;~
MAX
15
-t
0.250±0.010
(6.350±0.254)
~~~~~~~~~
-I
0.300-0.320
(7.620-8.128)
1-
~
jl-(~:~~~=~:~~~)
0.325
~~:~~~
/8255 +0.635)
\,.
-0.381
7-34
-
0.065
[i651i
0.130±0.005
(3.302±0 127)
1
(~.~~~)r-~
o
-t
t
0125
(3.175)
MIN
L ~jt
I
0.045-0.065 __
-(1143-1651)
o 065±0 015
(1651 ±0.381)-
0.018±0 003
(0.457,,0.076)
TJMAX
6JA
100'C
100'C/W
~
0.100±0 010
(2540±0.254)
N20188
'-y""Llnlt\Q
~~ T8CHNOLOG~~~----------u-ni-ve-r-sa-I-D-u-a-I-Fi-lte-r
LTC1060CS
Building Block
FEATURES
DESCRIPTion
•
•
•
•
•
•
The LTC1060 consists of two high performance, switched
capacitor filters. Each filter, together with 2 to 5 resistors,
can produce various 2nd order filter functions such as low·
pass, bandpass, high pass notch and all pass. The center
frequency of these functions can be tuned by an external
clock, or by an external clock and resistor ratio. Up to 4th
order full biquadratic functions can be achieved by cas·
cading the two filter blocks. Any of the classical filter con·
figurations (like Butterworth, Chebyshev, Bessel, Cauer)
can be formed.
•
•
•
•
Operates from ± 2.5V supply up to ± 8V
Operates up to 30kHz
Low Power and 88dB Dynamic Range at ± 2.5V Supply
Center Frequency QProduct up to 106M Hz
Guaranteed Offset Voltages
Guaranteed Clock to Center Frequency Accuracy over
Temperature, 0.8% or Better
Guaranteed QAccuracy over Temperature
Low Temperature Coefficient of Q and Center
Frequency
Low Crosstalk, 70dB
Clock Inputs TIL and CMOS Compatible
APPLICATions
The LTC1060 operates with either a single or dual supply
from ±2.37V to ±8V. When used with low supply (i.e.,
single 5V supply), the filter typically consumes 12mW and
can operate with center frequencies up to 10kHz. With
± 5V supply, the frequency range extends to 30kHz and
very high Qvalues can also be obtained.
• Single 5V Supply Medium Frequency Filters
• Very High Qand High Dynamic Range Bandpass,
Notch Filters
• Tracking Filters
• Telecom Filters
The LTC1060 is manufactured by using Linear Tech·
nology's enhanced LTCMOSTM silicon gate process. Be·
cause of this, low offsets, high dynamic range, high center
frequency Q product and excellent temperature stability
are obtained.
l TCMOSTM is a trademark of LlnearTechnology Corp.
Single 5V, Gain of 1000 4th Order Bandpass Filter
Amplitude Response
3.16k
70
,..---!_OUTPUT
60
50
+5V
40
iD
~
z
~
1\
I \
30
20
10
-10
/
o
100
"
125 150 175 200 225
INPUT FREQUENCY (Hz)
250 27
7-35
LTC1060CS
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage ..................................... 18V
Operating Temperature Range ........ - 40°C ~ TA~ 85°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
ORDER PART
NUMBER
LTC1060S
PART MARKING
LTC1060S
S20 PACKAGE
PLASTIC SOL
ELECTRICAL CHARACTERISTICS (CompleteFilte~Vs= ±5V,TA=25°Cunlessotherwisespecified.
PARAMETER
Center Frequency Range
Clock to Center Frequency Ratio
(Note 1)
QAccuracy (Note 1)
10 Temperature Coefficient
QTemperature Coelficient
DC Offset VOS 1 (Note 2)
V0S2
V0S2
VOO2
V0S2
V0S3
V0S3
DC Low Pass Gain Accuracy
BP Gain Accuracy at fo
Clock Feedthrough
Max. Clock Frequency
Power Supply Current
CONDITIONS
lox Qs1.6MHz, Mode 1
Mode 1, 50:1, IClK = 250kHz, Q= 10
Mode 1,100:1, IClK = 500kHz, Q= 10
Mode 1,50:1 or 100:1, 10 = 5kHz
Q=10
Mode 1, IClK<500kHz
Mode 1, fClK <500kHz, Q= 10
fCLK = 250kHz, 50:1, SAiB High
fClK = 500kHz, 100:1, SAiB High
fClK = 250kHz, 50:1, SAiB Low
fClK = 500kHz, 100:1, SAiB Low
fClK = 250kHz, 50:1, SAIB Low
fClK=5OOkHz, 100:1, SAiB Low
Mode 1, Rl = R2=5Ok
Mode 1, Q= 10, fo=5kHz
fClKS1MHz
Crosstalk
Note 1: An LTC1060S with improved Q and clock to center frequency ratio
accuracy can be made available upon special request.
NOle2: For definition olthe DC offset voltages refer to the LTC1060 data
sheet. An LTC1060S with improved DC offset specifications can be made
available upon special request.
7-36
MIN
10 x Qs400kHz, Mode 1
••
•
MAX
UNITS
Hz
Hz
50:t0.8%
loo:t0.8%
••
••
••
•
•
TYP
O.l-20k
0.1-16k
3
:to.5
-10
+20
2
5
3
40
80
30
6
2
4
2
4
:to.l
:to.l
10
1.5
5
70
15
60
30
60
2
8
12
%
ppm/oC
ppm/°C
mV
mV
mV
mV
mV
mV
mV
%
%
mV(p-p)
MHz
rnA
rnA
dB
LTC1060CS
ELECTRICAL CHARACTERISTICS (Complete Filter) Vs = ± 2.37V, TA =25°C
PARAMETER
Center Frequency Range
Clock to Center Frequency Ratio
CONDITIONS
MIN
TYP
0.1-10k
50±0.8%
l00±0.8%
10 x Qs 100kHz
Mode 1, 50:1, ICLK=250kHz, Q= 10
Mode 1, 100:1, lelK = 250kHz, Q= 10
MAX
UNITS
Hz
QAccuracy
±2
Mode 1, 10 = 2.5kHz, Q= 10
50:1 and 100:1
MBK Clock Frequency
Power Supply Current
%
500
2.5
kHz
rnA
4
ELECTRICAL CHARACTERISTICS (Internal Op Amps)TA = 25°C
PARAMETER
Supply Voltage Range
Voltage Swings
Output Short Circuit Current
Source
Sink
Op Amp GBW Product
Op Amp Slew Rate
Op Amp DC Open Loop Gain
CONDITIONS
Vs= ±5V, RL=5k(Pins 1, 2, 19,20)
Rl = 3.5k (Pins 3, 18)
Vs= ±5V
MIN
±2.37
±3.8
±3.6
•
TYP
±4
±4
25
3
2
7
85
Vs= ±5V
Vs= ±5V
RL= 10k, Vs= ±5V
MAX
±8
UNITS
V
V
V
rnA
rnA
MHz
VI~s
dB
The • denotes the specifications which apply over the lull operating tern·
perature range.
BLOCK DIAGRAm
01
TOAGND
--=:;:=====--~---H-ig-h-p-e-rf-o-rm-a-n-c-L:-~-;~-p6_,~
Universal Filter Building Block
FEATURES
DESCRIPTion
• Up to 6th Order Filter Functions with aSingle 20 Pin
0.3" Wide Package
• Center Frequency Range up to 35kHz
• fo xa Product Up to 1MHz
• Guaranteed Center Frequency and a Accuracy Over
Temperature
• Guaranteed Low Offset Voltages Over Temperature
• 90dB Signal to Noise Ratio
• Filter Operates From Single 4.7V Supply and Up to
± 8V Supplies
• Guaranteed Filter Specifications with ± 5V Supply and
± 2.37V Supply
• Low Power Consumption with Single 5V Supply
• Clock Inputs T2L and CMOS Compatible
The LTC1061 consists of three high performance, universal filter building blocks. Each filter building block together with an external clock and 2 to 5 resistors can pro·
duce various second order functions which are available
at its three output pins. Two out of three always provide
low pass and bandpass functions while the third output
pin can produce highpass or notch or all pass. The center
frequency of these functions can be tuned with an external clock or an external clock and a resistor ratio. For
0<5, the center frequency ranges from 0.1Hz to 35kHz.
For a's of 10 or above, the center frequency ranges from
0.1 Hz to 28kHz.
APPLICATions
The LTC1061 can be used with single or dual supplies
ranging from ± 2.37V to ±8V (or 4.74V to 16V). When the
filter operates with supplies of ± 5V and above, it can handle input frequencies up to 100kHz.
The LTC1061 is compatible with the LTC1059 single universal filter and the LTC1060 dual. Higher than 6th order
functions can be obtained by cascading the LTC1061 with
the LTC1059 or LTC1060. Any classical filter realization
can be obtained.
• High Order, Wide Frequency Range Bandpass,
Lowpass, Notch Filters
• Low Power Consumption, Single 5V Supply Clock
Tunable Filters
• Tracking Filters
• Antialiasing Filters
The LTC1061 is manufactured by using Linear Technology's enhanced LTCMOSTM silicon gate process.
LTCMOS™is a trademark of LinearTechnology Corp.
Amplitude Response
TYPICAL APPLICATiOn
6th Order, Clock Tunable, O.SdB Ripple Chebyshev BP Filter
931k
1k
11
-!-1""\II;~--"oI165vYk-+1'2 '.
165k
"V"
Ie
20
.' 191 787k
1 499k
3,
18
I
4 ;",
17
L..--"""I
6
~,
<12MHz
V+ ~7
9 .
£ .... '.
1
1
z
237k
~ -40
16
ci;eI
+75V---' .
T2 elK 1~----1 .'
499k
.>
499k
~~;5V
14
499k
13
165k
12
549k
... 11
5v-=.l!!L..:..-.,;,.jr-,--.......
-60
-80
4VOUT
-100
m
w
w
~
~
INPUT FREQUENCY (kHz)
7-39
LTC1061
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage ..................................... 18V
Power Dissipation .............................. 500mW
Operating Temperature Range
LTC1061AC, LTC1061C ............ -40oCsTAS85°C
LTC1061AM, LTC1061M ........... -55°CsTAS125°C
Storage Temperature Range ............ - 65°C to 150°C
Lead Temperature (Soldering, 10sec) .............. 300°C
ORDER PART NUMBER
LTC1061AMJ, LTC1061MJ
LTC1061ACJ, LTC1061CJ
LTC1061ACN, LTC1061CN
(ALSO AVAILABLE IN
SO PACKAGE)
J20 PACKAGE
HERMETIC
N20 PACKAGE
PlASTIC
ELECTRICAL CHARACTERISTICS
=
=
(Complete Filter) Vs ± SV, TA 25°C, T2L clock input level, unless otherwise specified
PARAMETER
CONDITIONS
Center Frequency Range, fo
10 x Q:s17SkHz, Mode 1, Vs= ± 7.SV
loxQ:s1.6MHz, Model, Vs= ±7.SV
foxQ:s7SkHz, Mode 3, Vs= ± 7.SV
foxQ:s1MHz, Mode 3, Vs= ±7.SV
(Note 1)
MIN
Input Frequency Range
Clock to Center Frequency Ratio,
fCLlJfo
LTC1061A
LTC1061
LTC1061A
LTC1061
Sides A, B: Mode 1, R1 = R3 = 50klI
R2 = SkO, Q= 10, fClK = 250kHz
Pln7Hlgh.
Side C: Mode 3, Rl = R3 = SOk
R2 = R4 = Sk, fClK = 250kHz
Same as Above, Pin 7at
Mid·Supplles, fClK =500kHz
TYP
10 Temperature Coefficient
QTemperature Coefficient
7-40
UNITS
0.1-3Sk
0.1-2Sk
0.1-2Sk
0.1-17k
Hz
Hz
Hz
Hz
0-200k
Hz
••
5O±0.6%
5O±1.2%
••
100±0.6%
100±1.2%
Clock to Center Frequency Ratio,
Side to Side Matching
LTC1061
QAccuracy
LTC1061A
LTC1061
MAX
1.2%
Sides A, B, Mode 1
Side C, Mode 3
10 x Q:s50kHz, 10:sSkHz
Mode 1, SO:l, fClK <300kHz
Mode 1, 100:1, fCLK <500kHz
Mode 3, fClK <500kHz
••
±2
±3
±1
±S
±S
S
S
%
%
ppm/°C
ppm/°C
ppm/oC
LTC1061
ELECTRICAL CHARACTERISTICS
(Complete Filte~ Vs = ± 5V, TA = 2SoC, T2l clock input level, unless otherwise specified
PARAMETER
CONDITIONS
DC Offset Voltage
Vos 1, Figure 23
VOS2
Vos2
VOS3
VOS3
ICLK = 250kHz, 50:1
ICLK = 500kHz, 100:1
ICLK = 250kHz, 50:1
ICLK = 500kHz, 100:1
Clock Feedthrough
Max. Clock Frequency
Power Supply Current
MIN
•
•
•
•
•
MAX
2
3
6
3
6
15
30
60
6
UNITS
40
mV
mV
mV
mV
mV
11
15
mVRMS
MHz
mA
mA
20
0.4
2.5
8
ICLK --+--........t-+""f
O.1,.Fr
':'
..........:..;..;.:..........
T2L CLOCK
':'
IN>-------'
'CLK<1MHz
Figure 1. The 6th order LP Butterworth Filter of Figure 5
Operating with aSingle 5V Supply.
7-44
R1
LTC1061
Pin DESCRIPTion AnD APPLICATion HinTS
Table 2 illustrates the typical clock feedthrough numbers
for various power supplies.
A=2V/DIV
Table 2
Power Supply
±2.5V
±5V
±8V
B=10mV/DIV
HORIZONTAL = 1O"s/DlV
Figure 2. Typical Clock Feedthrough 01 the LTC1061
Operating with ±5V Supplies. Top Trace is the Input Clock
Swinging 0-5V and Bottom Trace is One 01 the Lowpass
Outputs with Zero or DC Input Signals.
Clock Feedthrough
O.2mVRMS
O.4mV RM S
O.8mV RMS
Definition of Filter Functions
Refer to LTC1060 datasheet.
mODES OF OPERATion
Description and Applications
1. Primary Modes: There are two basic modes of operation,
Mode 1 and Mode 3. In Mode 1, the ratio of the external
clock frequency to the center frequency of each 2nd order
section is internally fixed at 50:1 or 100:1. In Mode 3, this
ratio can be adjusted above or below 50:1 or 100:1. The
side C of the LTC1061 can be connected only in Mode 3.
Figure 3illustrates Mode 1providing 2nd order notch, low·
pass, and bandpass outputs (for definition of filter func·
tions refer to the LTC1060 datasheet). Mode 1 can be used
to make high order Butterworth low pass filters; it can also
be used to make low Q notches and for cascading 2nd
order bandpass functions tuned at the same center fre·
quency and with unity gain. Mode 3, Figure 4, is the classi·
cal state variable configuration providing high pass, ~
bandpass and lowpass second order filter functions. . .
Cc
r--------1
~------,
R4
R3
R3
LP
LP
NOTE: ADD Cc FOR 0>5
AND IClK>IMHz SUCH AS
Cc=0.16/(R4 x 1 2MHz)
- IClK 1 -I H - HZ H _ BJ.· H
R2 Q R3
10100(50)' n- 0, OlP- - Rl' OBP- - Rl ' ON! = - lIT
='R2
Figure 3. Mode 1: 2nd Order Filter Providing Notch, Bandpass,
Lowpass.
10 =
16%f~0)V*' o=~~~: HOHP= -R2/Rl, HOBP= -R3/Rl, HOLP= -R4/Rl
Figure 4. Mode 3: 2nd Order Filter Providing Highpass,
Bandpass, Lowpass.
7-45
LTC1061
mODES OF OPERATion
Since the input amplifier is within the resonant loop, its
phase shift affects the high frequency operation of the fil·
ter and therefore, Mode 3 is slower than Mode 1. Mode 3
can be used to make high order all·pole bandpass, low·
pass, highpass and notch filters. Mode 3as well as Mode 1
is a straightforward mode to use and the filter's dynamics
can easily be optimized. Figure 5 illustrates a 6t~ order
lowpass Butterworth filter operating with up to 40kHz cut·
off frequency and with up to 200kHz input frequency.
Sides A, B are connected in Mode 1 while side C is con·
nected in Mode 3. The lower Qsection was placed in side
C, Mode 3, to eliminate any early 0 enhancement. This
could happen when the clock approaches 2MHz. The mea·
sured frequency response is shown in Figure 6. The at·
tenuation floor is limited by the crosstalk between the
three different sections operating with a clock frequency
above 1MHz. The measured wide band noise was
150,NRMS. For limited temperature range the filter of
Figure 5works up to 2.5MHz clock frequency thus yielding
a50kHz cutoff.
2. Secondary Modes: Mode 1b-lt is derived from Mode 1.
In Mode 1b, Figure 7, two additional resistors, R5 and R6,
are added to attenuate the amount of voltage fed back
from the lowpass output into the input of the SA (58)
R13
R33
R23
switched capacitor summer. This allows the filter clock to
center frequency ratio to be adjusted beyond 50:1 (or
100:1). Mode 1b still maintains the speed advantages of
Mode 1. Figure 8 shows the 3 lowpass sections of the
LTC1061 in cascade resulting in a Chebyshev lowpass fiI·
ter. The side Aof the ICls connected in Mode 1bto provide
the first resonant frequency below the cutoff frequency of
the filter. The practical ripple, obtained by using a non·A
version of the LTC1061 and 1% standard resistor values,
was 0.15dB. For this 6th order lowpass, the textbook Q's
and center frequencies normalized to the ripple bandwidth
are: 01 =0.55, fo 1=0.71, 02 =1.03, f02 =0.969, 03 = 3.4,
f03=1.17. The design was done with speed in mind. The
higher (03, f03) section was in Mode 1 and placed in the
side Bof the LTC1061. The remaining two center frequen·
cies were then normalized with respect to the center fre·
quency of side B; this changes the ratio of clock to cutoff
frequency from 50:1 to 50 x 1.17 = 58.5:1. As shown in
Figure 9, the maximum cutoff frequency is about 33kHz.
The total wide band output noise is 220,NRMS and the
measured output DC offset voltage is 60mV. Another
example of Mode 1b is illustrated on the front page of
the datasheet. The cascading sequence of this 6th
order bandpass filter is shown in block diagram form,
Figure 10A. The filter is geometrically centered around the
.---------VOUT
~
,
yo"
2
: :1:."
3 ,,:,
,~
19
R32
18
R22
-10
R12
;g
R41
R31
T2L CLOCK<2,5MHz ~I---~'
\
-20
1\
;; -30
«
'" -40
R21
VS"- ±5V
TA=25'C
VIN=1VRMS
i\
17
fCLK=lMHz
f c=20kHz
-50
\.
-60
V
Rll
VIN~------------''''''''''
HARMONIC DISTORTION WITH fCLK=2MHz
fiN
fOkHz, lVRMS
20kHz, lVRMS
30kHz, lVRMS
40kHz, lVRMS
2ND HARMONIC
74dB
-62dB
-62dB
-62dB
STANDARD 1% RESISTOR VALUES
Rll =20k
R31 =llk
R12=20k
R32=14k
R13= 10k
R21 =20k
R41 =20k
R22=20k
R23=10k
R33=17.8k
Figure 5. 6th Order Butterworth Lowpass Filter with
Cutoff Frequency up to 45kHz.
7-46
fCLK=2MHz
f c=40kHz
-70
10k
20k
40k
lOOk 200k
fiN (Hz)
Figure 6. Measures Frequency
Response of the Lowpass
Butterworth Filter of Figure 3.
1M
LTC1061
mODES OF OPERATion
side Bof the LTC1061 connected in Mode 1. This dictates
a clock to center frequency ratio of 50:1 or 100:1. The side
Aof the IC operates in Mode 1bto provide the lower center
frequency of 0.95 and still share the same clock with the
rest of the filter. With this approach the bandpass filter
R6
can operate with center frequencies up to 24kHz. The
speed of the filter could be further improved by using
Mode 1to lock the higher resonant frequency of 1.05 and
higher Q of 31.9 to the clock, Figure 10B, thus changing
the clock to center frequency ratio to 52.6:1.
R5
'.W:'.,
LP
R51
VIN
1
~
R31
.' 19
R21
.:' lB
>-'II'IR1~1-+--6I __..:.f'
'~.
R61
lreiOln
6
-€";
IClK<2MHz
~
V+>-------'i
~'f -f '0_R3 ~.
f - fClK
0-100(50) R5+R6' n- 0,
V
-ll2VR5+'R6'
ICLK)
HONI (I -0 ) = HON2 (I --y=
Figure 7. Mode 1b: 2nd Order Filter Providing Notch, Bandpass,
Lowpass.
-10
tsLL' II
:><;
13
R43
12
R33
11
R23
VIN-!
MODE 16
SIDE C
SIDE 6
H
101=095
01 =31.9
'"
R33=13k
R21 =12.1k
R61 =2 B7k
R22=11k
R23=105k
R43=15Bk
Figure 8. 6th Order Chebyshev, Lowpass Filter using 3Different
Modes of Operation for Speed Optimization.
TA=25'C
VIN=1VRMS
ICLK=1.9MHz
~
.. ''';'
Rll =35.7k
R31 =11 5k
R51 =5.49k
R12=11k
R32=36.5k
R13=15.Bk
SIDE A
~ -20
1l----t-----'i
9
R12
R32
MODE 1
H
MODE 3
~VOUT
103=1.05
03=31.9
102=1
02=159
Figure 10A. Cascading Sequence of the Bandpass Filter Shown
on the Front Page, with (fCLKlfo) =50:1 or 100:1.
~ -30
> -40
-50
-60
10k
SIDE A
30k
lOOk
liN (Hz)
1M
Figure 9. Amplitude Response of the 6th Order Chebyshev
Lowpass Filter of Figure 8.
VIN-!
MODE 16
101 =0.95
01 =31.9
SIDE C
SIDE 6
H
MODE 1
102=1.05
02=31.9
H
MODE 3
~VOUT
103=1
03=15.9
Figure 10B. Cascading Sequence of the Same Filter for Speed
Optimization, and with (fCLKifo) = 52.6:1.
7-47
II
LTC1061
mODES OF OPERATion
Mode 38-This is an extension of Mode 3 where the
highpass and lowpass outputs are summed through two
external resistors Rh and RI to create a notch, Figure 11.
Mode 3a is very versatile because the notch frequency can
be higher or lower than the center frequency of the 2nd or·
der section. The external op amp of Figure 11 is not always
required. When cascax!ing the sections of the LTC1 061,
the highpass and lowpass outputs can be summed di·
rectly into the inverting input of the next section. Figure 12
shows an LTC1061 providing a 6th order elliptic bandpass
or notch response. Sides C and B are connected in
Mode 3a while side A is connected in Mode 1 and uses
only two resistors. The resulting filter response is then
geometrically symmetrical around either the center fre·
quency of side A (for bandpass responses) or the notch
frequency of side A(for notch responses). Figure 13 shows
the measured frequency response of the circuit Figure 12
configured to provide a notch function. The filter output is
taken out of pin 3. The resistor values are standard 1%.
Cc
r-------,
~ ------,
R4
R3
LP
NOTCH
NOTE: FOR 0>5 AND fClK>1MHz
ADD Cc SUCH AS Cc=O.16/(R4x 1.2MHz)
fo=
1~g(~0)
vg;
fn=
EXTERNAL OP AMP OR
INPUT OP AMP OF THE
LTC1061 , SIDE A, B, C
1~~~~)~; HOHP= -R2IR1; HOBP= -R3/R1, HOlP= -R4/R1
HON1(f-O)=~ x;; HON2 ~- fCiK) = ~ x~; HON(f=fo)=O (~HOlP-~ HOHP) ;Q= ~ VI
Figura 11. Mode 3a: 2nd Order Filter Providing Highpass, Bandpass, Lowpass, Notch.
R33
r-22
R23
3
-
RJ2
4
....2
6
~
VIN
R42
R32
18
R22
16
LTeW&l
'.
~
~V14
MOS~9
~
20
19
17
T2L, C
CLOCK INPUT
V+~
Rt)2
RI1
R41
13
R31
12
R21
NOTE: FOR NOTCH RESPONSES,
PIN 7 SHOULD BE PREFERABLY
CONNECTED TO GROUND AND
THE FILTER OUTPUT IS PIN 3.
FOR BANDPASS OR LOWPASS
RESPONSES PIN 7 CAN BE EITHER
AT GROUND OR POSITIVE SUPPLY,
AND THE FILTER- OUTPUT IS PIN 2
OR PIN 1.
11
.,".,
Rh1
R11
Figura 12. 8th Order Elliptic Bandpass, Lowpass or Notch Topology.
7-48
LTC1061
mODES OF OPERATion
fn2 =1.187, f03=1, 03 =26.2). The output of the filter is the
BP output of Side A, Pin 2.
The ratio of the OdB width, BW1, to the notch width BW2,
is 5:1 and matches the theoretical design value. The mea·
sured notch depth was - 53dB versus - 56dB theoretical
and the clock to center notch frequency ratio is 100:1.
Figure 14 shows the measured frequency response of the
circuit topology, Figure 12, but with pole/zero locations
configured to provide a high a, 6th order elliptic bandpass
filter operating with a clock to center frequency ratio of
50:1 or 100:1. The theoretical passband ripple, stopband
attenuation and stopband to ripple bandwidth ratio are
0.5dB, 56dB, 5:1 respectively. The obtained results with
1% standard resistor values closely match the theoretical
frequency response. For this application, the normalized
center frequencies, a's, and notch frequencies are
(fo1=0.969, 01 =54.3, fn 1=0.84, f02 =1.031, 02 =54.3,
Lowpass filters with stopband notches can also be
realized by using Figure 12 provided that 6th order lowpass filter approximations with 2 stopband notches can
be synthesized. Literature describing elliptic double
terminated (RLC) passive ladder filters provide enough
data to synthesize the above filters. The measured amplitude response of such a lowpass is shown in Figure 15
where the filter output is taken out of side A's Pin 1,
Figure 12. The clock to center frequency ratio can be either 50:1 or 100:1 because the last stage of the LTC1061
operates in Mode 1 with a center frequency very close to
the overall cutoff frequency of the lowpass filter.
IBWll
\
-10
Vs=±5V
~ -20 r- f ClK = 260kHz
z
~ -30
_~s= ±5V
I
:1
\
Rll =165k
R31 = 143k
Rh1=1Ok
R22= 20k
R42=15.4k
R12= 10k
R33=169k
\
~ -40
\
-50
B~2-
-60
"f
R21 =10k
R41 = 13k
Rll = 1O.5k
R32=221k
Rh2=10.5k
R23=B45k
-10
-20
I
I
~ -30
~ -40
"-5 -50
I
>
-60
NOTES: USE A 15pF CAPACITOR
BETWEEN PINS 17 AND lB.
PIN 7 IS GROUNDED
r--
-\
fClK=130kHz
STANDARD 1% RESISTOR VALUES
STANDARD 1% RESISTOR VALUES
\
\
I-t--..
:.-
-70
-
-80
26kHz
-70
Rll =576k
R3l =562k
Rhll =287k
R22=10.7k
R42=10k
R12=10k
R33= 75k
R2l=10k
R4l=107k
Rill =40.2k
R32=562k
Rh2=14k
R23=294k
NOTE' FOR CLOCK FREQUENCIES
ABOVE 500kHz CONNECT A
5pF IN PARALLEL WITH R41 AND
R42
-90
1
1.5
2
2.5
fiN (kHz)
3.5
1
Figure 13. Resistor Values and Amplitude Response
of Figure 12 Topology. The Notch is Centered at 2600Hz.
1.5
2.5
fiN (kHz)
30
35
Figure 14. Resistor Values and Amplitude Response of Figure 12
Topology. The Bandpass Filter is Centered Around
2600Hz when Operating with a 130kHz Clock.
STANDARD 1% RESISTOR VALUES
-10
1\
\
-20
~ -30
\
z
~ -40
~
>
Rll =39.2k
R3l =13 7k
Rhl =20.5k
R22=10k
R42=14k
R,2=11.Bk
R33=100k
-50
,
-70
-BO
-90
NOTES: USE A 10pF ACROSS
R42 FOR fClK>lMHz.
THE ELLIPTIC LOWPASS FILTER
HAS ONLY TWO NOTCHES IN THE
STOPBAND, AND IT OPERATES
WITH A CLOCK TO CUTOFF
FREQUENCY RATIO OF 50:1
U 1\ /'
II \,
-60
o
1
2
3
4 5 6
fiN (kHz)
7
8
R2l=10k
R4l =39.2k
Rll =12.4k
R32=267k
Rh2=324k
R23=10k
9
10
Figure 15. Resistor Values and Amplitude Response olthe Topology of Figure 12.
7-49
III
LTC1061
mODES OF OPERATion
In Figure 16, all three sides of the LTC1061 are connected
in Mode 3a. This topology is useful for elliptic highpass
and notch filters with clock to cutoff (or notch) frequency
ratio higher than 100:1. This is often required to extend the
allowed input signal frequency range and to avoid prema·
ture aliasing. Figure 16 is also aversatile, general purpose
architecture providing 3 notches and 3 pole pairs, and
there is no restriction on the location of the poles with reo
spect to the notch frequencies. The drawbacks, when
compared to Figure 12, are the use of an external op amp
and the increased number of the required external resistors. Figure 17 shows the measured frequency of a 6th or·
der highpass elliptic filter operating with 250:1 clock to
cutoff frequency ratio. With a 1MHz clock, for instance,
the filter yields a 4kHz cutoff frequency, thus allowing an
input frequency range beyond 100kHz. Band limiting can
be easily added by placing a capacitor across the feed·
back resistor of the external op amp of Figure 16.
R9
RI1
R41
R31
I'Ll CMOS
CLOCK INPUT
R21
V+
Rh1
R11
VIN
Figure 16. Using an External Op Amp to Connect all 3Sides 01 the LTC1061 in Mode 3a.
STANDARD 1% RESISTOR VALUES
1
-10
I
I
_-20
OJ
:; -30
1 [.1.
f ClK = 250kHz- -
R11 =105k
R31 =47.5k
Rh1=10k
R22=32.4k
R42=52.3k
RI2=750k
R33=255k
RIJ3=10k
Rg =140k
~
~ -40
>
-so
-60
"\
Ir
V
-70
V'
R21 =10k
R41 =45.3k
RI1=1.07M
R32=28.7k
Rh2=42.2k
R23=10k
R43=63.4k
R13=110k
NOTE: FOR CLOCK FREQUENCIES BELOW
500kHz, USE A CAPACITOR IN PARALLEL
WITH R21 SUCH AS (1/2 ..R21C)=dclK/3
-80
-90
o
0.5
1
1.5
fiN (kHz)
2.5
Figure 17. Measured Amplitude Response 01 the Topology 01 Figure 16, Conllgured to Provide
a6th Order Elliptic Highpass FiHer Operating with aClock to Cutoff Frequency Ratio 01250:1.
7-50
LTC1061
mODES OF OPERATion
Figure 18 shows the plotted amplitude responses of a6th
order notch filter operating again with a clock to center
notch frequency ratio of 250:1. The theoretical notch depth
is 70dB and when the notch is centered at 1kHz its width is
50Hz. Two small, noncritical capacitors were used across
the R21 and R22 resistors of Figure 16, to bandlimit the
first two highpass outputs such that the practical notch
depth will approach the theoretical value. With these two
fixed capacitors, the notch frequency can be swept within
a3:1 range.
When the circuit of Figure 16 is used to realize lowpass elliptic filters, a capacitor across Rg raises the order of the
filter and at the same time eliminates any small clock
feedthrough. This is shown in Figure 19 where the amplitude response of the filter is plotted for 3 different cutoff
frequencies. When the clock frequency equals or exceeds
1MHz, the stopband notches lose their depth due to the finite bandwidth of the internal op amps and to the small
crosstalk between the different sides of the LTC1061. The
lowpasss filter, however, does not lose its passband
accuracy and it maintains nearly all of its attenuation
slope. The·theoretical performance of the 7th order lowpass filter of Figure 19 is 0.2dB passband ripple, 1.5:1
stopband to cutoff frequency ratio, and 73dB stopband
attenuation. Without any tuning, the obtained results
closely approximate the textbook response.
STANDARD 1% RESISTOR VALUES
tClK=250kHz
-10
\
iD -20
:s.z
Rll =84.5k
R31 =31 6k
Rh 1 =48.7k
R22 = 10k
R42=97.6k
R,2=66.5k
R33=300k
R,,:J=10.2k
Rg=210k
I
I
E -30
"
..g -40
-50
NOTE: CONNECT 39pF ANO 100pF
ACROSS R21 AND R22 RESPECTIVELY.
-60
-70
R21 = 10.2k
R41 =63.4k
R,I =287k
R32=232k
Rn2=10.2k
R23=20k
R43=80.6k
R,3=63.4k
o
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 20
t'N (kHz)
Figure 18. 6th Order Band Reject Filter Operating with aClock to Center
Notch Frequency Ratio of 250:1. The Ratio of OdB to the - 65dB Notch Width is 8:1.
STANDARD 1% RESISTOR VALUES
·••
I
-10
1\
-20
~ -30
-
tClK
200kHz
I
tClK
500kHz -
";:ClK
,lMHz
•,
•
,
~-40
5 -50
>
-60
\
-70
:~
-80
\!
-90
1
Rll =30.9k
R31 =16.2k
Rn1 =45.3k
R22=10.5k
R42=10k
R,2= 15.8k
R33=287k
Rn3=953k
Rg=28k
\
R21 =10k
R41 =26.7k
Rll =19 6k
R32=100k
Rh2=523k
R23=10k
R43= 12.7k
R,3=10k
NOTE: ADD A CAPACITOR C ACROSS Rg
TO CREATE A 7TH ORDER LOWPASS SUCH AS
(1/2TR gC) =(CUTOFF FREQUENCY) x 0.38
/
100
Figure 19. Frequency Responses of a7th Order Lowpass
Elliptic Filter Realized with Figure 16 Topology.
7-51
LTC1061
mODES OF OPERATion
Mode 2-This is a combination of Mode 1 and Mode 3,
Figure 20. With Mode 2, the clock to center frequency
ratio, fCLK/fo, is always less than 50:1 or 100:1. When compared to Mode 3 and for applications requiring 2nd order
sections with fCLK/fo slightly less than 100 or 50:1, Mode 2
provides less sensitivity to resistor tolerances. As in
Mode 1, Mode 2has anotch output which directly depends
on the clock frequency and therefore the notch frequency
is always less than the center frequency, fo, of the 2nd order section. Figure 21 shows the side A of the LTC1061
connected in Mode 2 while sides 8 and Care in Mode 3a.
This topology can be used to synthesize elliptic bandpass,
highpass and notch filters. The elliptic highpass of
Figure 17 is synthesized again, Figure 22, but the clock is
now locked onto the higher frequency notch provided by
the side Aof the LTC1061. As shown in Figure 22, the highpass corner frequency is 3.93kHz and the higher notch frequency is 3kHz while the filter operates with a 300kHz
clock. The center frequencies, O's, and notches of
Figure 22, when normalized to the highpass cutoff frequency, are (f01=1.17, 01=2.24, fn1=0.242, f02=1.96,
02=0.7, fn2 = 0.6, f03=0.987, fn3= 0.753, 0=10). When
compared with the topology of Figure 16, this approach
uses lower and more restricted clock frequencies. The
obtained notch in Mode 2 is shallower; however, this
topology is more efficient.
R4
Figure 21. LTC1061 with Side AIs Connected in Mode 2while
Sides B, Care in Mode 3a. Topology Is Useful for Elliptic
Highpass, Notch and Bandpass Filters.
Figure 20. Mode 2: 2nd Order Filter Providing Notch, Bandpass,
Lowpass.
,I
-10
I
I
I
-20
~ -30
z
>-40
';0.
5-50
>
-60
1,,1,
fCLK=300kHz
STANDARD 1% RESISTOR VALUES
-
R11=54.9k
R31 = 34.Bk
Rh1 =2B.7k
R22=68.1k
R42=1Ok
~f3:1~5~k
~ I" ~
NOTE: FOR CLOCK FREQUENCIES
ABOVE 300kHz ADD A CAPACITOR, C,
ACROSS R21 AND R22 SUCH AS (1/2wR21C)=fcLK
If
-70
R21 =24.3k
R41 =10k
RI1=2BOk
R32=1B.2k
Rh2=10.2k
R23=10k
R43=14k
-80
-90
o
1
2
3
4
5 6
fiN (kHz)
7
B
9
10
Figure 22. 6th Order Elliptic Highpass Filter Operating with aClock to Cutoff Frequency
Ratio of 75:1, and USing the Topology of Figure 21.
7-52
LTC1061
mODES OF OPERATion
Output Noise
ways equal to Vosa. The DC offsets at the remaining two
outputs (Notch and LP) depend on the mode of operation
and external resistor ratios. Table 4illustrates this.
The wideband RMS noise of the LTC1061 outputs is
nearly independent from the clock frequency. The
LTC1061 noise when operating with ± 2.SV supply is
lower, as Table 3 indicates. The noise at the bandpass and
lowpass outputs increases roughly as the .JQ. Also the
noise increases when the clock to center frequency ratio
is altered with external resistors to exceed the internally
set 100:1 or 50:1 ratios. Under this condition, the noise in·
creases square root-wise.
Output Offsets
It is important to know the value of the DC output offsets,
especially when the filter handles input signals with large
dynamic range. As a rule of thumb, the output DC offsets
increase when:
1. The Q's decrease
2. The ratio (feLK/fo) increases beyond 100:1. This is
done by decreasing either the (R2IR4) or the R6/
(RS +R6) resistor ratios.
The equivalent input offsets of the LTC1061 are shown in
Figure 23. The DC offset at the filter bandpass output is ai-
Table 3. Wideband RMS Noise
V.
10
Notch/HP
",VRMSI
BP
LP
",VRMsl
",VRMsl
±5V
±5V
±2.5V
±2.5V
50:1
100:1
50:1
100:1
45
65
30
40
55
65
30
40
70
85
45
60
Mode 1, Rl = R2= R3
Q=l
±5V
±5V
±2.5V
±2.5V
50:1
100:1
50:1
100:1
18
20
15
17
150
200
100
140
150
200
100
140
Model,Q=10
Rl = R3 for BP oul
Rl = R2 for lP oul
±5V
±5V
±2.5V
±2.5V
50:1
100:1
50:1
100:1
57
72
40
50
57
72
40
50
62
80
42
Mode 3, Rl = R2= R3=R4
Q=1
±5V
±5V
±2.5V
±2.5V
50:1
100:1
50:1
100:1
135
170
100
125
120
160
88
115
140
185
100
130
leLK
(12.18)
CONDITIONS
53
(13,19)
Mode 3, R2= R4, Q=10
R3 = R1for BP out
R4= R1forlPand HPoul
(14.20)
Figura 23. Equivalent Input Offsets of 113 LTC1061 Filter Building Block.
7-53
LTC1061
mODES OF OPERATion
Table 4
VOSN
Pin 3(18)
Mode
VOSLP
Pin 1(20)
VOSBP
Pin 2(19)
Vos1[(1/Q) +1+ liHoLP~]- VOS3/Q
VOS3
1b
Vos1 [(lIQ) +1+R2/R1]- VOS3/Q
VOS3
- (VOSN - Vos21 (1 +R5/R6)
2
[Vos1(1 +R2IR1 +R2IR3 +R2IR4)- Vos3(R2/R3)] x
X[R4/(R2 +R4)] +Vos2[R2/(R2 +R4)]
VOS3
VOSN - VOS2
3
Vos2
VOS3
R4 R4 R4]
Vos1 [ 1+-+-+R1 R2. R3
1
VOSN - VOS2
- VOS2 (R4)
-
-VOS3(~)
PACKAGE DESCRIPTiOn
Dimensions in inches (millimeters) unless otherwise noled.
J20 Package Ceramic DIP
t
0220-0310
Looo"-'m'j
(0203-0457)--
0385..,0025
19779±0fi35j
!
0125
(3175)
'"
TJmax
125'C
9la
100'CIW
N20 Package Molded DIP
t------12~~1~)-----1
0300-0320
MAX
17620-8128)
-t
n
0250",0010
(6350±0254)
_ \ ~~~~~mm~
7-54
R2
'
....
,.
.
llnw
~~ TBCHNOLdG~~~------H-ig-h-p-e-rf-o-rm-a-n-c-e-~-ri-PI-e
LTC1061CS
Universal Filter Building Block
FEATURES
DESCRIPTiOn
• Up to 6th Order Filter Functions with aSingle 20 Pin
Surface Mount Package
• Center Frequency Range up to 35kHz
• foxQ Product Upt01 MHz
• Guaranteed Center Frequency and QAccuracy Over
Temperature
• Guaranteed Low Offset Voltages Over Temperature
• 90dB Dynamic Range
• Filter Operates From Single 4.7V Supply and Up to
±8VSupplies
• Low Power
• Clock Inputs T2L and CMOS Compatible
The LTC1061 consists of three high performance, universal filter building blocks_ Each filter building block together with an external clock and 2 to 5 resistors can produce various second order functions which are available
at its three output pins. Two out of three always provide
lowpass and bandpass functions while the third output
pin can produce highpass or notch or ail pass. The center
frequency of these functions can be tuned from 0.1 Hz to
35kHz and is dependent on an external clock or an external clock and aresistor ratio.
The LTC1061 can be used with single or dual supplies
ranging from ±2.37V to ±8V (or 4.74V to 16V). When the
filter operates with supplies of ± 5V and above, it can handle input frequencies up to 100kHz.
The LTC1061 is compatible with the LTC1059 single universal filter and the LTC1060 dual. Higher than 6th order
functions can be obtained by cascading the LTC1061 with
the LTC1059 or LTC1060. Any classical filter realization
(such as Butterworth, Cauer, Bessel and Chebyshev) can
be obtained by the appropriate choice of the external
resistors.
The LTC1061 is manufactured by using Linear Technology's enhanced LTCMOSTM silicon gate process.
APPLICATions
• High Order, Wide Frequency Range Bandpass,
Lowpass, Notch Filters
• Low Power Consumption, Single 5V Supply Clock
Tunable Filters
• Tracking Filters
LTCMOSTM Is a trademark of LinearTechnorogy Corp.
TYPICAL APPLICATiOn
Amplitude Response
2kHz
6th Order, Clock Tunable, O.SdB Ripple Chebyshev BP Filter
931k
~
V1N < 100l< Hz
1k 11
165k
I
165k
499k
I
I
20
2
1d 787k
3
18
4
17
5 .'
16
6
~
+75V--'-
LTC1061
499k
1l.~~5V
14
I
I
237k
-40
499k
499k
T' ClK I~----!!
13
165k
<12MHz
12
549k
9
V+=75V~
!elK 1MHz
-60
11
-80
4v OUT
-100
10
20
30
INPUT FREQUENCY (kHz)
40
50
60
7-55
III
LTC1061CS
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage .. ; .................................. 18V
Operating Temperature Range ........ - 40oC:5;TA:5;85°C
Storage Temperature Range ...... , ...... - 65°C to 150°C
Lead Temperature (Soldering, 10sec)............... 300°C
ORDER PART NUMBER
TOP VIEW
LTC1061S
PART MARKING
LTC1061S
S20 PACKAGE
PLASTIC SOL
ELECTRICAL CHARACTERISTICS
(Complete Filter) Vs = ± 5V, TA =25°C, T2L clock input level, unless otherwise specified
PARAMETER
Center Frequency Range, fo
Input Frequency Range
Clock to Center Frequency Ratio, fClK/fo
(Note 1)
Clock to Center Frequency Ratio,
Side to Side Matching
QAccuracy (Note 1)
fo Temperature Coefficient
QTemperature Coefficient
7-56
CONDITIONS
fo x Q::;; 175kHz, Mode 1, Vs= ± 7.5V
fo x Q::;; 106M Hz, Mode 1, Vs= ±7.5V
foxQ::;;75kHz,Mode3,Vs = ±7.5V
foxQ::;;1MHz, Mode 3, Vs= ± 7.5V
(Note 1)
MIN
TYP
0.1-35k
0.1-25k
0.1-25k
O.1-17k
MAX
0-200k
Sides A, B: Mode 1, R1 = R3 = 50kll
R2=5kll, Q= 10, fClK =250kHz
Pin 7 High.
Side C: Mode 3, R1 = R3 = 50k
R2 = R4 = 5k, fClK = 250kHz
Same as Above but Pin 7 at
Mid·Supplies, fCLK = 500kHz
S!des A, B, Mode 1} 50:1 or 100:1
Side C, Mode 3
fo = 5kHz, Q= 10
Mode 1, 50:1, fClK < 300kHz
Mode 1, 100:1, fCLK <500kHz
Mode 3, fClK<500kHz
Hz
•
5O±1.2%
•
•
•
100±1.2%
1.2%
±3
±1
±5
±5
UNITS
Hz
Hz
Hz
Hz
5
%
ppm/oC
ppm/oC
ppm/oC
LTC1061CS
ELECTRICAL CHARACTERISTICS
(Complete Filter) Vs
=:!: SV, TA=25°C, T2l clock input level, unless otherwise specified
PARAMETER
DC Offset Voltage (Note 2)
VOS1
VOS2
Vos2
VOS3
VOS3
Clock Feedthrough
Max. Clock Frequency
Power Supply Current
CONDITIONS
ICLK = 250kHz, 50:1
ICLK = 500kHz, 100:1
ICLK = 250kHz, 50:1
ICLK = 500kHz, 100:1
ICLK
-8
-10
1\
\
\
\
\
\
2"RC
1 62
-12
-14
01
0 2 03 0.5
1
flN/fe
10
Figure 2. Amplitude Response of Pin 1
Internal Buffer
Cose, PinS
The internal buffer out (pin 8) and pin 1 are part of the
signal AC path. Excessive capacitive loading will cause
gain errors in the passband, especially around the cutoff
frequency. The internal buffer gain at DC is typically
O.006dB. The internal buffer output can be used as a filter
output, however it has a few millivolts of DC offset. The
temperature coefficient of the internal buffer is typically
1p,v/oC.
The Case, pin 5, can be used with an external capacitor,
Case, connected from pin 5to ground. If Case is polarized
it should be connected from pin 5 to the negative supply,
pin 3. Case lowers the internal oscillator frequency. If pin 5
is floating, an internal 33pF capacitor plus the external
interpin capacitance set the oscillator frequency around
140kHz with ± 5V supply. An external Case will bring the
oscillator frequency down by the ratio (33pF)/(33pF +
Case). The typical performance characteristics curves provide the necessary information to get the internal oscillator frequency for various power supply ranges. Pin 5 can
also be driven with an external CMOS clock to override the
internal oscillator. Although standard 7400 series CMOS
gates do not guarantee CMOS levels with the current
source and sink requirements of pin 5, they will, in reality,
drive the Case pin. CMOS gates conforming to standard B
series output drive have the appropriate voltage levels and
more than enough output current to simultaneously drive
several LTC1062 Case pins. The typical trip levels of the internal Schmitt trigger which input is pin 5, are given below.
Filter Attenuation
The LTC1062 rolloff is typically 30dB/octave. When the
clock, and the cutoff frequencies increase, the filter's
maximum attenuation decreases. This is shown in the
Typical Performance Characteristics. The decrease of the
maximum attenuation, is due to the roll off at higher frequencies of the loop gains of the various internal feedback
paths and not to the increase of the noise floor. For instance, for a 100kHz clock and 1kHz cutoff frequency, the
maximum attenuation is about 64dB. A4kHz, 1Vrms input
signal will be predictably attenuated by 60dB at the
output. A 6kHz, 1Vrms input signal will be attenuated by
64dB and not by 77dB as an ideal 5th order maximum flat
filter would have dictated. The LTC1062 output at 6kHz will
be about 630,Nrms. The measured rms noise from DC to
17kHz was 100/LVrms which is 16dB below the filter output.
VSUPPLY
±2.5V
±5V
±6V
±7V
Viti +
+O.9V
+1.3V
+1.7V
+1.75V
vltl -1V
-2.1V
-2.5V
-2.9V
7-63
LTC1062
APPLICATions InFoRmATion
Divide By 1,2, 4(Pin 4)
Filter Noise
By connecting pin 4 to V+, to mid supplies or to V-, the
clock frequency driving the internal switched capacitor
network is the oscillator frequency divided by 1, 2, 4,
respectively. Note that the feLl(lfe ratio of 100:1 is with
respect to the internal clock generator output frequency.
The internal divider is useful for applications where octave
tuning is required. The + 2threshold is typically ± 1V from
the mid supply voltage.
The filter wideband rms noise is typically 100,Nrms for
± 5V supply and it is nearly independent from the value of
the cutoff frequency. For single 5V supply the rms noise is
8O",Vrms. Sixty-two percent of the wide band noise is in the
passband, that is from DC to fe. The. noise spectral
density, unlike conventional active filters, is nearly zero
for frequencies below 0.1 xfe. This is shown in the typical
performance characteristics section. Table 1 shows the
LTC1062 rms noise for different noise bandwidths.
Transient Response
Figure 3 shows the LTC1062 response to a 1V input step.
200mV/VERT DIV
50ms/HORIZ DlV, f c=10Hz
5ms/HORIZ DlV, fc= 100Hz
O.5ms/HORIZ DlV, fc=lkHz
_1_=i
21rRf,
_l_=i
21rRC
1.62
Figure 3. Step Response to a tV Peak Input Step
Table 1
NOISEBW
DC-O,1 xfc
DC-O.25xfc
DC-O.5xfc
DC- 1xfc
DC- 2xfc
7-64
nnsNOISE
vs= :t5V
2p.V
ap'v
2Op.V
62p.V
100p.V
1.94
LTC1062
TYPICAL APPLICATions
AC Coupling an External CMOS Clock Powered from a
Single Positive Supply, V+
V,N >-.IVII.......,....-------_.VOUT
Adding an External (Rt, Ct) to Eliminate the Clock
Feedthrough and to Improve the High Frequency Attenuation
Floor
VOUT
V,N>-"'II'._,....-------.....'IN~~-_I
*C1=O.01C
II
V+
fClK
Filtering AC Signals from High DC Voltages
-rV,N
R
25 Bk
:t:--C------------.
>--'\I\.iI\·....
DC OUTPUT
O.01,.F
HIGH DC INPUT=100V
~
V+=+5V
EX fClK=100kHz, fc=1kHz. THE FILTER
ACCURATELY PASSES THE HIGH DC INPUT
AND ACTS AS 51h ORDER LP FILTER FOR THE
AC SIGNALS RIDING ON THE DC. THE AMPLITUDE RESPONSE IN THE PASSBAND IS
SHOWN BELOW.
7-65
LTC1062
TYPICAL APPLICATions
Cascading Two LTC1062s to Fonn a Very Selective Clock Sweepable Bandpass Filter
R1
R'1
VOUT
' - - - - - - - - - -....... 1CLK
R1=10k, R2=10k
R'1=10k, R'2=12.5k
Clock Tunable Notch Filter
ForsimplicityuseR3= R4= R5= 10k;
R1 = 1.234, felK = 79.3
R2
fnotch
1
R4
R5
R3
VOUT
5V
fCLK
Frequency Response of the Bandpass Filter
n
+10
o
-10
,
Vs= ±5V
R1
1
R2
R'1
R'2=0.8
11\
-20
\
-30
~-40
,
-60
VIN=100mVrms_
-80
40
50
'\.
-90
0.5 1.0
7-66
1.5
2.0
20
~ 30
"
-70
I
10
I'
-50
Notch Response
2.5 3.0
(kHz)
3.5
60
I'\.
4.0
70
4.5
200
400
600
(Hz)
800
1000
LTC1062
TYPICAL APPLICATions
Simple Cascading Technique
+5V
DC ACCURATE
OUTPUT
10Hz, 10th ORDER DC ACCURATE LOW PASS FILTER
60dB/OCTAVE ROLLOFF
O.5dB PASSBAND ERROR, OdB DC GAIN
MAXIMUM ATTENUATION 110dB (fCLK=10kHz)
100dB (fCLK=1kHz)
95dB (fCLK=1MHz)
100Hz, 50Hz, 25Hz 5th Order DC Accurate LP Filter
25.8k
VIN-J\IIt,..,.....,----....----'"'"11-+
III
100k
+5V
TO PIN 5 OF CD4016
CONTROL
(HIGH, GROUND, LOW) ......J\NII-4
-5V
BY CONNECTING PIN 4 OF THE LTC1062 HIGH/
GROUND/LOW THE FILTER CUTOFF FREQUENCY
IS 100Hz/50Hz/25Hz.
+5V
100k
TO PIN 13 OF CD4016
100k
-5V
LTC1062
TYPICAL APPLICATions
7th Order 100Hz Lowpass Filter with Continuous Output Flnering, Output Buffering and Gain Adjustment
R3
2.6k
R4
>6-.... VOUT
R1
a..........+--5V
THE LTC1052 IS CONNECTED AS A 2nd ORDER
SALLEN AND KEY LOWPASS FILTER WITH A
CUTOFF FREQUENCY EQUAL TO THE LTC1062.
THE ADDITIONAL FILTERING ELIMINATES ANY
10kHz CLOCK FEED THROUGH PLUS DECREASES
THE WIDEBAND NOISE OF THE FILTER.
DC OUTPUT OFFSET (REFERRED TO A DC GAIN OF
UNITY)=5"V MAX.
WIDEBANO NOISE (REFERRED TO A DC GAIN OF
UNITY) :::60"Vrms
DC GAIN
1
10
OUTPUT FILTER COMPONENT VALUES
R4
R1
R2
o
14.3k
53.6k
3.57k
32.4k
46k
274k
R3
Single 5V Supply 5th Order LP Finer
'>-IIN\I/"':::t
.....---------:r:
.... OC ACCURATE OUTPUT
R
VIN
+~
10"F
SOLID
25k
TANTALUM
C
C
BUFFERED
OUTPUT
p+
+5V
25k
CLK
12R
FOR A 10Hz FILTER R=29.4k, C=1"F, fCLK=1kHz
1
fc
THE FILTER IS MAXIMALLY FLAT FOR 21TAC =T:ll4
7-68
LTC1062
TYPICAL APPLICATions
ALowpass Filter with a60Hz Notch
R5
19.35k
R3
20k
R7
20k
R4
10k
R=9.09k
R2
20k
V+
VOUT
I---+-<~~~~~z
~----------~~1~=~
2..RC
100 x 1.52
Frequency Response of the Above Lowpass Filter with the Notch fNOTCH =~~~
10
II
"N 20
~
!30
1;
~
40
"
50
60
70
1
10
50100
lk
fIN (Hz)
ALow Frequency, 5Hz Filter using Back·to-8ack Solid Tantalum Capacitors
5.23k
VIN>-"""".....- - - - -........ VOUT
7-69
LTC1062
PACKAGE DESCRIPTiOn
Dimensions in inches (millimeters) unless otherwise noted.
JIl Package
8 Lead Hermetic DIP
(~~~~}
MIN
... l-~~
~
110287)
MAX
0025
(0635)~B
765
RADTYP
---t
0220-0310
(5588-7874)
~-::-r-T""::"~.~
0200
(5080)
MAX
~0015-0060
nn"'T'"
j L
0014_0026Jlt'
(0360-0660)
"'0125
3'175
B54)~
MIN
0100±0010
12540.0254)
0030-0073
10762-1
N8 Package
8 Lead Plastic
0 -*
0400--1
(1016oi
(
MAX
765
r
o250±0005
{6350±O 127}
1
1
0 325
~~.~~;
I
0 635)Is 25S+-0381
'\
7-70
2
3
4
~"""'-LlnlJ\Q
~~
LTC1062CS
TECHNOLoG~~~-----5-t-h-O-r-de-r-L-O-w-P-a-s-s-Fi-lte-r
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
•
The LTC1 062 is a 5th order all pole maximally flat lowpass
filter with no DC error. Its unusual architecture puts the filter outside the DC path so DC offset and low frequency
noise problems are eliminated. This makes the LTC1062
very useful for lowpass filters where DC accuracy is
important.
Lowpass Filter with No DC Error
Low Passband Noise
Operates DC to 20kHz
Operates on aSingle 5V Supply or Up to ± 8V
5th Order Filter
Maximally Flat Response
Internal or External Clock
Cascadable for Faster Rolloff
Buffer Available
APPLICATions
•
•
•
•
•
•
•
60Hz Lowpass Filters
Anti-Aliasing Filter
Low Level Filtering
Rolling Off AC Signals from High DC Voltages
Digital Voltmeters
Scales
Strain Gauges
The filter input and output are simultaneously taken
across an external resistor. The LTC1062 is coupled to the
signal through an external capacitor. This R,C reacts with
the internal switched capacitor network to form a 5th order rolloff at the output.
The filter cutoff frequency is set by an internal clock which
can be externally driven. The clock to cutoff frequency ratio is typically 100:1, allowing the clock ripple to be easily
removed.
Two LTC1062s can be cascaded to form a 10th order quasi
max flat low pass filter. The device can be operated with
single or dual supplies ranging from ± 2.5V to ± 9V.
The LTC1062 is manufactured using Linear Technology's
enhanced LTCMOSTM silicon gate process.
™is a trademark of linear Technology COrp.
LTCMOS
TYPICAL APPLICATiOn
10Hz 5th Order Butterworth Lowpass Filter
Filter Amplitude Response and Noise
1
-10
.,
Cosc=3900pF
-20
\
\
E.-3~
~
~ -40
:!l
~
~ -50
1\
w
§ -60
'"
« -80
-90
L . . - - - - - - - - - - - . . - V + = +5V
NOTE: TO ADJUST OSCILLATOR FREQUENCY.
USE A 6800pF CAPACITOR IN SERIES
WITH A 50k POT FROM PIN 5 TO GROUND.
b---:'"
1
.....
II
\
50
~
40 ~
en
30~
1\
t::
ii -70
-100
o
<=
\
\
20 '
I'
10
INPUT FREQUENCY (Hz)
10~
o
100
7-71
e.
..
LTC1062CS
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
TotaISupplyVoltage(V+ tOV-) ..................... 18V
Input Voltage at Any Pin ...... V- -0.3V SVINSV+ +0.3V
Operating Temperature Range ........ -40oCsTAS85~C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature Range (Soldering, 10 sec.) ....... 300°C
ORDER
PART NUMBER
TOP VIEW
LTC1062CS
PART MARKING
DIVIDER
RATIO
NC 7
LTC1062CS
S16 PACKAGE
PLASTIC SOL
ELECTRICAL CHARACTERISTICS
Test Conditions: Y+
=+5Y, Y- =- 5Y, TA =25°C unless otherwise specified, AC output measured at pin 7
PARAMETER
Power Supply Current
Input Frequency Range
Filter Gain at liN = 0
liN = 0.51c (Note 1)
IIN=lc
IIN= 2Ic
IIN= 4Ic
Clock to Cutoff Frequency RatiO, ICLKIfC
Filter Gain at lIN = 16kHz
'cuJ'c Tempeo
Filter Output (Pin 7) DC Swing
Clock Feedthrough
Inlemal Buffer
Bias Current
Bias Current
Offset Voltage
Voltage Swing
Short Circuit Current Source/Sink
Clock (Note 3)
Internal Oscillator Frequency
CONDITIONS
Cosc (Pin 5to V-I = 100 pF
•
ICLJ( = 100kHz, Pin 4at V+
C=O.OlI'F, R=25.78k
Same as above
ICLJ( = 400kHz, Pin 4 at V+
C=0.01"F, R=6.5k
Same as above
Pin 7 bulffered with an external op amp
Rl =2Okll
Cosc (Pin 5to v-) = loopF
Cosc (Pin 5to v-) = loopF
The. denotes the specifications which apply over the lull operating tern·
petature range.
Note 1: Ic is the Irequency where the gain is - 3dB with respect to the in·
put signal.
TYP
4.5
•••
•
-2
0-2Ok
0
-0.02
-3
-28
-54
-30
-60
-46
1oo±1
-52
•
±3.5
•
Max Clock Frequency
Pin 5Source or Sink Current
7-72
MIN
•
•
•
±3.5
25
15
MAX
7
10
-0.3
%
dB
ppm/oC
V
mVp·p
10
±3.8
10
2
170
2
±3.8
40/3
32
50
1000
20
pA
pA
mV
V
rnA
50
65
kHz
kHz
MHz
60
,.A
4
40
UNITS
rnA
rnA
Hz
dB
dB
dB
dB
dB
Nole 2: The LTC1062C operates Irom - 4OoC:$TA:$ 85°C.
Nole 3: The external or driven clock frequency is divided by either 1, 2, or 4
depending upon the voltage at pin 4. When pin 4= V+, ratio = 1; when
pin 4= GND, ratio = 2; when pin 4= V- , ratio = 4.
~""""-Llnt1\Q
~,
LTC1064
TECHNOLOGY~L-o-w-N-o-ise-,-F-a-st-,-Q-u-a-d-U-n-iv-e-r-sa-I
Filter Building Block
FEATURES
DESCRIPTiOn
•
•
•
•
•
The LTC1064 consists of four high speed, low noise
switched capacitor filter building blocks. Each filter building block, together with an external clock and 3to 5 resistors can provide various 2nd order functions like low pass,
high pass, bandpass and notch. The center frequency of
each 2nd order function can be tuned with an external
clock, or a clock and a resistor ratio. For Q~5, the center
frequency range is from 0.1Hz to 100kHz. For Q~3, the
center frequency range cao be extended to 140kHz. Up to
8th order filters can be realized by cascading all four 2nd
order sections. Any classical filter realization (such as
Butterworth, Cauer, Bessel and Chebyshev) can be
formed.
•
•
•
•
4Filters in a0.3" Wide Package
1/2 the Noise of the LTC1059, 60, 61 Devices
140kHz Maximum Center Frequency
7MHz Maximum Clock Frequency
Clock to Center Frequency Ratio of 50:1 and 100:1
Simultaneously Available
Operates from ±2.37V to ±8V Power Supplies
Low Offsets
Low Harmonic Distortion
Customized Version with Internal Resistors Available
APPLICATions
•
•
•
•
Acustomized monolithic version of the LTC1064 including
internal thin film resistors can be obtained for high volume
applications. Consult LTC marketing for details.
Antialiasing Filters
Wide Frequency Range Tracking Filters
Spectral Analysis
Loop Filters
The LTC1064 is manufactured using Linear Technology's
enhanced LTCMOSTM silicon gate process.
TYPICAL APPLICATiOn
Gain vs Frequency
Clock Tunable 8th Order Cauer Low Pass Filter with 'CUTOFF up to 100kHz
13k
665k
I
22.1k
V'N
102k
1 lllVa ...." IWI
lB.25k
231 10k
1 2 H~IN~ HPC .
3' .
12.1k
22
10.7k
17.4k
10k
llf'S
4 t.PlI .
,t;
BV
O.l""p
10k ':'
(FROM Rh2. RI2 )
9
49.9k
10
11.5k
11
112
I
$II.
21
~j
V'+'
s-.
\III~
~
~
•
-30
m-- 45
BV
lB
0.1""=i=
f"'-5MHz
'='
1l1l11 OO~_BV
l)'tJ 16
eI' 15 41.2k
12.7k
1!I,'ll14
IIIV 0 13
14k
1\
-15
26.7k
20
.
PIN 12
24
i' -60
'CLK=5MHz
\
RIPPLfi
\
" -75
lirn1dB
1111111
CI
-90 I-Vou
f\
\
-105
fcl~1\UUz
RIPPLE", rl'0.OSdB
1111111
-120
1111111
-135
lk
10k
r-
I
I
lOOk
1M
121k
10k
FOR fClK=5MHz. ADD Cl =10pF BETWEoN PINS 4,1
C2 = 10pF BETWEEN PINS 21, 24
C3=27Pf BETWEEN PINS 9,12
WIDEBAND NOISE ~ 140.V RM'
7-73
LTC1064
ABSOLUTE mAXimum RATinGS
Total Supply Voltage (V+ to V-I .................... 18V
Power Dissipation ............................... 500mW
Operating Temperature Range
LTC1064AM, LTC1064M ............... - 55°C to 125°C
LTC1064AC, LTC1064C ................ - 40°C to 85°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
PACKAGE/ORDER InFORmATiOn
ORDER PART
NUMBER
ORDER PART
NUMBER
TOP VIEW
LTC1064AMJ
LTC1064MJ
LTC1064ACJ
LTC1064CJ
LTC1064ACN
LTC1064CN
J PACKAGE
2HEAD CERAMIC DIP
LTC1064CS
SO PACKAGE
2HEAD PLASTIC sOle
N PACKAGE
24-LEAD PLASTIC DIP
ELECTRICAL CHARACTERISTICS
(Internal Op Amps) TA=25°C, unless otherwise specified.
PARAMETER
Operating Supply Voltage Range
Voltage Swings
CONDITIONS
Output Short Circuit Current (Source/Sink)
DC Open Loop Gain
GBW Product
Slew Rate
Vs=
Vs=
Vs=
Vs=
7-74
Vs= ±5V, RL=5kO
±5V
±5V,RL=5kO
±5V
±5V
MIN
±2_37
•
±3.3
±3.2
TYP
±3.6
3
80
7
to
MAX
±B
UNITS
V
V
V
rnA
dB
MHz
V/~s
LTC1064
ELECTRICAL CHARACTERISTICS
=
=
(Complete Filter) Vs :!: 5V, TA 25°C, TTL clock input level, unless otherwise specified.
PARAMETER
Center Frequency Range, 10
Input Frequency Range
Clock to Center Frequency
Ratio,lcLK/lo
CONDITIONS
Vs= ±8V, 0,,3
LTC1064A (Note 1)
LTC1064
LTCI064A (Note 1)
LTCI064
Clock to Center Frequency
Ratio, Side to Side Matching
Clock to Center Frequency
Ratio, ICLK/lo (Note 2)
LTCI064A (Note I)
LTCI064
LTC1064A (Note 1)
LTCI064
LTCI064A (Note 1)
LTC1064
oAccuracy
10 Temperature Coefficient
Temperature Coellicient
o
DC Offset Voltage
VOS1
VOS2
VOS3
Clock Feedthrough
Maximum Clock Frequency
Power Supply Current
MIN
Sides A, B, C: Mode 1,
Rl = R3 = 50kll, R2 = 5kll, 0 = 10,
fCLK = IMHz, fo=20kHz, Pin 17 High
Side D: Mode 3, RI = R3 = 50kll,
R2=R4=5kll
Same as above, Pin 17 Low, ICLK = IMHz
10= 10kHz
SidesA. B,C
SideD
ICLK = IMHz
Sides A, B,C: Mode I, Vs= ± 7.5V
Rl =R3=50kll, R2=5kll, 0=5,
ICLK = 4MHz, 10 = 80kHz, Pin 17 High
Side D: Mode 3, RI = R3 = 50kll,
R2 = R4 = 5k!l, fCLK = 4MHz
Same as above, Pin 17 Low
ICLK = 4MHz, fo = 40kHz
Sides A, B, C: Mode I, 0= 10
Side D: Mode3, ICLK= lMHz
Mode 1, 50:1, ICLK<2MHz
Mode 1, 100:1, ICLK <2MHz
Mode3,lcLK <2MHz
ICLK= IMHz, 50:1 orlOO:1
ICLK = 1MHz, 50:1 or 100:1
ICLK= lMHz, 50:1 or 100:1
ICLK
I I
.
,I I "I
VrJ,SV
y -j--
10
TA=25'C_
Q=5
Q=10
20
-
~ 15
-
I
' ~.
Vs-t7.~V
If/}/.,I _
A9I'
-S
~~ 1.5
fEf§
~ffi
--
I
-
VS~..'2.5~'
-, ,
I I
itSr-
I I
I I
VS= ~5V TA=25'C
Q=50R 10-
I
I
1 VSj
0.5
II.
0
0 10 20 30 40 50 60 70 60 90 100
CENTER FREQUENCY. I., (kHz)
j
~VSi~~·SV;-t+
a
Q=10
TA=25'C
PIN 17 AT V+
(R2/Rj)=r
10
S f0
-5
VS- ~2.5V
CC=ISpF
VS==5V
CC=15pF
l"-
-
~
~~ 1.5
fE~ 1
~ffi 0.5 f- f- -Vs==2." f- Vs==", i'- -
iii
<>
0
a
10 20 30 40 50 60 70 60 90 100
CENTER FREQUENCY, I., (kHz)
LTC1064
TYPICAL. PERFORmAnCE CHARACTERISTICS
=
Graph 4. Mode 2, (fCLKIfg) =25:1
TA=25'C
PIN 17ATV--
TA=25'C
V5= ",,7.5V
PIN17ATV+
(R2IR4)j3
r-
-
Q=5
I- Cc=22PY
..... ~
~ t;;;; 10=2
@:
-
L
1
Q=5 i'Vr ",,5V_ --- Q=lO_
f-V5=ri~~
f (R2IR4)=3
,
10
I
Cc=39pF,_
I'
."
I
It. ~
@:
15
o
_ 15
~
Q~ ~ ~ QT2 f-- f-~~
o
~
W
'"
I
=
@:
'"
1f
ffi
15
10
ffi~ 05
.... w
~.
0
'I
V
.II j~5=)""7i5V
j
Q=2
...
;..
:::::
i-""
'"
~
@:
10
'" -5
V5- ",,7.5V
tz
~~
w-
r5~""M--!
Vs= ",,2.5V
11
y
B::5
",,,,
I"
1
~ffi
0 10 20 30 40 60 60 70 80 90 100
CENTER FREQUENCY, I" (kHz)
I
05
~
1.1'
0
J
I
Graph 10. Power Supply Currant
ONEA~:C~~~~;DER
-
R3 =Rl.
SECTION MODE 1 OR 3100:1 OR 50:1
-
u;
'" 160
...-::: ~
120
cl00
~ 80
3: 60
40
20
i--" rI-
",,7.5V
",,5V_
",,2,SV
...... t;;.-:: ~
~~
III
/~ ......
~~
;
o
0 10 20 30 40 50 60 70 80 90 100
CENTER FREQUENCY, I" (kHz)
VI Supply VoHage
Y
Graph g. Wideband Noise VI Q
~
Vs- ",,7.5V
I
V
L
1 JL
o 10 20 30 40 50 60 70 80 90 100
CENTER FREQUENCY, I" (kHz)
!iii'"
II
J
V5=I",,7.SVr--
~
V5= ""sv
Vs= ",,2,5V
'
-
~ 140
I I/J5=~7ISV
I
1/ J,
1"'1 r/
I
i
Q=I
../I~
1 I-V5= ",,2.5V r- 1-,5 = I""/I-Vs= ",,7.SV
0.5
ffi 0
=
0::-
'I.
'1
_15
~
10 20 30 40 50 60 70 60 90 100
CENTER FREQUENCY, I" (kHz)
1.
l
-S
J
t
1
L.I1
Vs=""5~
TA=25'C
R2=R4 f-I
I
Cc=SpF rV5= ",,2.5V
I
Q=10
rV,Vs=",,5V r-
5
ffi_ 15
f--
1
5
0
Graph 8. Mode 3, (fCLKIfg) 100:1
TA=25'C
R2=R4
Cc=15pF
V5= ",,7.5V
'" -5
§~
",,,,
I
o
Graph 7. Mode 3, (fCLKIfg) 50:1
-
t
Vr""L2.5
1
~ 0.5
ffi 0
20 4060 80100120140160180200
CENTER FREQUENCY, I" (kHz)
TA=2S'C
I
R2=R4
I
Cc=SpF
_ _ v~=~sv __ H _ - Q = s
IS
---Q=10
~ 10 _ Vs=""2.SV
I
~
/)V5=1""7 15V
'" -5
~ 1
ffi 05
=
Graph 6. Mode 3, (fCLKIfg) 50:1
Graph 5. Mode 2, (fCLKlfg) 50:1
o 2 4 6 8 10 12 14 16 18 20
Q
Graph 11. Harmonic Distortion,
8th Order LP Butterworth
fC = 20kHz THD =0.015% for
3VRMSInput
!....
z
~
:::>
u
i
:::>
'"
!
24
20
16
12
8
o
(\
5S'c,.....
i...o' :J...::::
'14 Il~ ~ ~'C
1.
...
25'C
--
.j
I
I
o 2 4 6 8 10 12 14 16
POWER SUPPLY VOLTAGE (V + - v -)
7-77
LTC1064
Pin DESCRIPTion
Power Supplies (Pins 7, 19)
AGND(Pin6)
They should be bypassed with 0.1/LF ceramic disc. Low
noise, non-switching, power supplies are recommended.
The device operates with a single 5V supply and with dual
supplies. The absolute maximum operating power supply
voltage is ± 9V.
When the LTC1064 operates with dual supplies, Pin 6
should be tied to system ground. When the LTC1064 operates with a single positive supply, the analog ground pin
should be tied to 1/2 'supply and it should be bypassed
with a 1/LF solid tantalum in parallel with a 0.1/LF ceramic
disc, Figure 1. The positive input of all the internal op
amps, as well as the common reference of all the internal
SWitches, are internally tied to the analog ground pin. Because of this, avery "clean" ground is recommended.
Clock (Pin 18)
For ± 5V supplies the logic threshold level is 1.4V. For
± BV and 0 to 5V supplies the logic threshold levels are
2.2V and 3V respectively. The logic threshold levels vary
± 100mV over the full military temperature range. The
recommended duty cycle of the input clock is 50% although for clock frequencies below 500kHz the clock "on"
time can be as low as 2oon8. The maximum clock frequency for ± 5V supplies is 4MHz. For ± 7V supplies and
above, the maximum clock frequency is 7MHz.
50/100 (Pin 17)
By tying Pin 17 to V+, all filter sections operate with a
clock to center frequency ratio internally set at 50:1. When
Pin 17 is at mid-supplies, sections Band Coperate with
(fClK/fol =50:1 and sections A and 0 operate at (100:11.
When Pin 17 is shorted to the negative supply pin, all filter
sections operate with (fClK/fol =100:1.
NOTE: PIN 5, S, 20, IF NOT USED, SHOULD BE CONNECTED TO PIN 6.
Figure 1. Single Supply Operation
7-78
LTC1064
APPLICATions InFoRmATion
ANALOG CONSIDERATIONS
1. Grounding and Bypassing
The LTC1064 should be used with separated analog and
digital ground planes and single pOint grounding
techniques.
Pin 6(AGND) should be tied directly to the analog ground
plane.
Pin 7(V+) should be bypassed to the ground plane with a
0.11'F ceramic disk with leads as short as possible. Pin 19
(V-) should be bypassed with a 0.11'F ceramic disk. For
single supply applications, V- can be tied to the analog
ground plane.
For good noise performance, V+ and V- must be free of
noise and ripple.
All analog inputs should be referenced directly to the sin·
gle pOint ground. The clock inputs should be shielded
from and/or routed away from the analog circuitry and a
separate digital ground plane used.
Figure 2 shows an example of an ideal ground plane de·
sign for a two sided board. Of course this much ground
plane will not always be possible, but users should strive
to get as close to this as possible. Proto boards are not
recommended.
2. Buffering the Filter Output
When driving coaxial cables and 1x scope probes, the fil·
ter output should be buffered. This is important especially
when high Os are used to design a specific filter. InadeQuate buffering may cause errors in noise, distortion, Q,
and gain measurements. When 10 x probes are used,
buffering is usually not required. An inverting buffer is
recommended especially when THO tests are performed.
As shown in Figure 3, the buffer should be adequately
bypassed to minimize clock feedthrough.
III
7.o;N'-f-......--f7I
l!H==!:~=3-CLOCK
~~_.....I
I
----.,I
DlGIT~~REOUND
'-- -
-
-~ (~POINT
GROlItlD)
NOTE: CoNNeCT ANALOG ANO DIGITAL
GROUIIIl PlANES AT ASIMlI..£ POINT AT
TIlE BOAI\O EDGE.
Figure 2. Example Ground Plane Breadboard Technique for LTC1064
7-79
LTC1064
APPLICATions InFoRmATion
3. Offset Nulling
4. Noise
Low pass filters may have too much DC offset for some
users. Aservo circuit may be used to actively null the off·
sets of the LTC1064 or any LTC switched capacitor filter.
The circuit shown in Figure 4 will null offsets to better
than 3OOJlV. This circuit takes seconds to settle because
of the integrator pole frequency.
All the noise performance mentioned excludes the clock
feedthrough. Noise measurements will degrade if, the
already described grounding, bypassing, and buffering
techniques are not practiced. Graph 9is avery good repre·
sentation of the noise performance of this device.
SEPARATE V+ POWER SUPPLY TRACE FOR SUFFER
R12
V,N
_
~Rl~l_-W-~"'"t - - - - - t
FROM
FILTER
OUTPUT
0.22,.F
,*+l,,1'TA'
10k
r------------------f--~
Rl
1M
TO FILTER
FIRST SUMMING"""VI~--<
NODE
R3
lOOk
I
I
I
I
Cl
I
To.l,,1' ,
,
':'
I
I
C2
R2
I
0.1,,1'
1M
:
I Cl =C2=LOW LEAKAGE FILM (I.E. POLYPROPYLENE) ':'
I
i!1..:~:.M~Al;.F!!;M...!::' _ _ _ _ _ _ _ _ _ _ _ _ _ .J
Figure 3. Buffering the Output of a4th Order Bandpass Realization
Figure 4. Servo Amplifier
mODES OF OPERATiOn
R3
PRIMARY MODeS
LP
Mode 1
In Mode 1, the ratio of the external clock frequency to the
center frequency of each second order section is internally fixed at 50:1 or 100:1. Figure 5illustrates Mode 1providing 2nd order notch, low pass, and bandpass outputs.
Mode 1 can be used to make high order Butterworth low
pass filters; it can also be used to make low Q notches and
for cascading 2nd order bandpass functions tuned at the
same center frequency with unity gain. Mode 1 is faster
than Mode 3. Note that Mode 1 can only be implemented
with 3of the 4LTC1064 sections because section Dhas no
7-80
10=
l~t~O): In=lo: HOLP= --Rt: Hosp= --lW-: HON1= -
-Rt
Q=i
Figure 5. Mode 1: 2nd Order Filter Providing Notch, Bandpass,
Low Pass
LTC1064
mODES OF OPERATion
externally available summing node. Section 0, however,
can be internally connected in Mode 1 upon special
request.
When the internal clock to center frequency ratio is set at
50: " the design equations for Qand bandpass gain are different from the 100:1 case. This was done to provide speed
without penalizing the noise performance.
Mode 3
Mode 3is the second of the primary modes. In Mode 3, the
ratio of the external clock frequency to the center frequency of each 2nd order section can be adjusted above
or below 50:1 or 100:1. Side Dof the LTC1064 can only be
connected in Mode 3. Figure 6 illustrates Mode 3, the
classical state variable configuration, providing high
pass, bandpass, and low pass second order filter functions. Mode 3 is slower than Mode 1. Mode 3can be used
to make high order all-pole bandpass, low pass, high pass
and notch filters.
SECONDARY MODES
Mode1b
Mode1b is derived from Mode tin Mode 1b, Figure 7, two
additional resistors R5 and R6, are added to alternate the
amount of voltage fed back from the low pass output into
the input of the SA (or S8 or SC) switched capacitor summer. This allows the filter clock to center frequency ratio
to be adjusted beyond 50:1 or 100:1. Mode 1b maintains
the speed advantages of Mode 1.
Mode 2
Cc
r-------~~------,
R4
R3
LP
Mode 2is acombination of Mode 1and Mode 3, as shown
in Figure 8. With Mode 2, the clock to center frequency
ratio, felK/fo, is always less than 50:1 or 100:1. The advantage of Mode 2 is that it provides less sensitivity to resistor tolerances than does Mode 3. As in Mode 1, Mode 2has
R6
II
R5
LP
f
MODE 3 (100:1):
fClK {R2 . Q R3. fR2. H
R2/R1'
0=1OOVR4' ='R2VR4' OHP=,
HOBP= -R3/R1; HOlP= -R4/R1
fClK !R2.
1.005(v'R27R4).
fo= 50 V R4' Q= (R2/R3)-(R2I1BR4) ,
MODE 3 (50:1):
HOHP= -R2IR1; HOBP= -
1-~;/~~R4); HOlP= -R4/R1
NOTE: THE 50:1 EQUATIONS FOR MODE 3 ARE DIFFERENT FROM THE EQUATIONS
FOR MODE 3 OPERATION OF THE LTC1059, LTC10BO AND LTC10B1. START WITH
fo, CALCULATE R2/R4, SET R4; FROM THE QVALUE, CALCULATE R3:
R3
1.0Q5~R~a +_R2
-
a
R4
1BR4
; THEN CALCULATE R1 TO SET
THE DESIRED GAIN.
f - fClK
.r::::JlL. f -f . Q_ R3 ~.
0-100(50) V R5+R6' n- 0, -'R2VRS+R6'
H (f-O)-H
ONt
- ON2
HOBP=
Figure 6. Mode 3: 2nd Order Filter Providing High Pass,
Bandpass, Low Pass
-*;
(1- 2
fClK) -
H
R2.
-R2IR1.
- -lIT'
OlP= RB/(R5 + R6) ,
(R51IR6)<5kll
Figure 7. Mode 1b: 2nd Order Filter Providing Notch, Bandpass,
Low Pass
7-81
LTC1064
mODES OF OPERATion
a notch output which depends on the clock frequency, and
the notch frequency is therefore I~ss than the center frequency, fo.
When the internal clock to center frequency ratio is set at
50:1, the design equations for Qand bandpass gain are different from the 100:1 case.
Mode3A
This is an extension of Mode 3 where the high pass and
low pass output are summed through two external resistors Rh and RI to create a notch. This is shown in Figure 9.
Mode 3A is more versatile than Mode 2because the notch
frequency can be higher or lower than the center fre·
quency of the 2nd order section. The external op amp of
Figure 9 is not always required. When cascading the sections of the LTC1064, the high pass and low pass outputs
can be summed directly into the inverting input of the next
section. The topology of Mode 3A is useful for elliptic high
pass and notch filters with clock to cutoff frequency ratios
higher than 100:1. This is often required to extend the allowed input signal frequency range and to avoid premature aliasing.
When the internal clock to center frequency ratio is set at
50:1, the design equations for Qand bandpass gain are different from the 100:1 case.
MODE 2 (100:1)'
R4
ICL' r;-:Fi2.
IOLK. Q_ R3 r;-:Fi2,
R2. H _ -R2/R1
10~lOOV HR4,ln~SO' -R2V'+R4' aLP- H (R2/R4)
-R2/R1.
(ICL')
R2/R1
HaBP~-R3/R1, HaN1(1-0)~ H(R2/R4)' HON' ~-:2 ~-
LP
ICLK r;-:R2. _ ICL'. _
10~SO V 1 + R4' In-SO' Q-
MODE 2(50.1):
V'N
H aBP- HaN'
1.005(.Jf+R27R4)
(R2/R3)-(R2116R4)
:
HaLP~ 1~rR2:/RR~)
R3/R1
'H (1_0)----=.BWlL
1-(R3116R4)' aN1
- 1 +(R2/R4)
~- 'Ci') ~ -R2/R1
NOTE. THE 50 1 EQUATIONS FOR MODE 2 ARE DiffERENT fROM THE EQUATIONS
fOR MODE 2 OPERATION Of THE LTC1059, LTC1060 AND LTC1061 START WITH
10, CALCULATE R2/R4, SET R4; fROM THE Q VALUE, CALCULATE R3:
R3=
'~5
R* ;
1+
+
':~4
THEN CALCULATE R1 TO SET THE DESIRED GAIN.
Figure 8. Mode 2: 2nd Order Filter Providing Notch, Bandpass, Low Pass
Cc
r--------j
r- -------,
R4
MODE3A(1OD1).
10=
',c5~
/ * ; In=
;C5~ n,:HOHP=-R2/R1,HOBP~-R3/RI
Rg
R4
/, ICL') Rg
R2
HaLP=-R4/R1,HaN1(1-0)=Ri x Rf: HaN2 ~-2 ~lfhxRf
Rg
Rg
\. _ R3
HaN(I=lo)~Q ( RiHOLP-IfhHOHPj' Q- R2
R3
LP
MODE 3A (50.1).
r:5l. HaHP (1- ICL')
~ -R2/R1
VR4'f) ~ leLK
50 VRI'
2
I - ICLK@. I
0-
50
HOBP= -
R3/R1.
_ _
. _
1.005(v'R27R4)
1-(R3116R4)' HOLP(I-O)- -R4/R1, Q- (R2/R3) (R2116R4)
NOTE' THE 50.1 EOUATIONS fOR MODE 3A ARE DiffERENT fROM THE EQUATIONS
fDR MODE 3A OPERATION Of THE LTC1059, LTC1060 AND LTC1061. START WITH
10, CALCULATE R2/R4, SET R4, fROM THE Q VALUE, CALCULATE R3:
1/4 LTC1064
R3=
NOTCH
Jii
~ ~ + ---.!lL
Q
R4
16R4
'
THEN CALCULATE R1 TO SET
THE DESIRED GAIN.
EXTERNAL OP AMP OR
INPUT OP AMP Of THE
LTC1064, SIDE A, B, C, 0
Figure 9. Mode 3A: 2nd Order Filter Providing High Pass, Bandpass, Low Pass, Notch
7-82
{R2
V R4
LTC1064
APPLICATion CIRCUITS
Wideband Bandpass: Ratio of High to Low Comer Frequency Equal to 2
Amplitude Response
R14
.-_-+_"fl !NV B ' - ' !NV cf2"-4- -....
R23
2 Hl'B/NB Hl'C/NC 23
R33
3
Of'll
aPC 22
R34
R43
4 lPB
lPC 21
R44
HJ-' r! ~;
~
. "': ~ SA
3MHz. ADD C2 = 10pF ACROSS R42
C3 = 10pF ACROSS R43
C4 = lOpF ACROSS R44
WfDEBAND NOISE=170.VRMS
8th Order Clock Sweepable Low Pass
elliptic Antialiasing Filter
Amplitude Response
Rhl
II
Rll
Rh2
OdB
RI2
1
R22
2
R32
R42
R21
3
22
R31
4
21
R41
7
::i:=~
8
~-7.5V
...L.,
16
R44
15
R34
R33
11
14
R24
R23
12
13
7.5V
-75dB
-9OdB
RI3
-105dB
VOUT
Rh3
R31 =13 7k
R22=10k
R12=267k
R33=B45k
Rh3=6Q 2k
R24=154k
_t
\
IV '\V
'::'
9
RESISTOR VALUES
Rll=191k
R21 =10k
Rh1=30 9k
Rll =14k
R42=10 2k
Rh2=76 Bk
\
~-45dB
>
1;
~ICLKS2MHZTo.lpF
10
'::'
-30dB
~-60dB
~
R43
'::'
Y,N
20
g
-15dB
Rll
24
23
-n::j
7.5V
"'"
R41 =15 4k
R32=237k
R23=113k
R43=10k
R13=10k
R34=15.2k
o
10k
20k 30k 40k SDk
FREQUENCY (Hz)
60k
70k
BTH ORDER CLOCK SWEEPABLE LOW PASS
ELLIPTIC ANTIALIASING FILTER MAINTAINS.
FOR 0 lHzsIOUTOFF,,20kHz. A ",0 ldB MAX.
PASSBAND ERROR AND 72dB MIN STOPBAND
ATTENUATION AT 1.5 xlOUTOFF
TOTAL WIOEBAND NOISE = 150pV RMS.
THO = 70dB (0 03%) FOR VIN = 3V RMS.
ICLK/ICUTOFF=100.1 THIS FILTER AVAILABLE
AS LTC1064-1 WITH INTERNAL THIN FILM
RESISTORS.
R44=427k
NOTE FOR ICUTOFF>15kHz. ADD A 5pF
CAPACITOR ACROSS R41 AND R43
7-85
LTC1064
APPLICATion CIRCUITS
Amplitude Response
Dual 4th Order Bessel Filter with 140kHz Cutoff Frequency
R13
R12
1 IWB""" 1lIV~ 24
R22
2 1iPBINB
23
15
3m>s
IIPC 22
R33
R42
4 lPil
lPC
21
R43
£
BV
T 7
:;::0.1,.F B
~
T
li
AIlflO
!:l
v+
SA
lAA
10 SPA
R31
11 H{'AI!IA
12
-30
~
19
CIJ( r!!-7MHZ CLOCK
TO.
17
BV
1,.F
;--45
~
T
501100 I--BV
16~VOUT2
LPO
R41
R21
v-
SPD 15
INV A
14
iNVO 13
1\
-15
so ~.Voun
Be
VS= ,.BV
fCLK=7MHz
R23
R32
....2
Rll
Hl'ClNd
-60
-75
R44
-90
R34
-105
1M
lOOk
10k
R24
f,. (Hz)
R14
RESISTOR VALUES
Rll =14.3k
RI2=15.4k
RI3=3.92k
RI4=3.92k
R21=13k
R22=15.4k
R23=20k
R24=20k
R31 =7.5k
R32=7.5k
R33=27.4k
R34=6.Bk
R41 =10k
R42=10k
R43=40k
R44=lOk
8th Order Linear Phase (Bessel) Filter with f ~C~B =~
Amplitude Response
R12
Rll
1 INV8 -INYC 24
V'N
R21
2 HPBlNIJ
R31
ffPCItle
23
BPi:
22
21
3BP8
4
R41
tJ'Il.
~ $1\
5VTOBV
~ Allm i~
_ , - 7 V+
-:r
_ 0.l ,.Fr-"B SA
-
9 lPA
R43
10
R33
FROM
PIN 20
R13
oW.
11 HPAlNA
R23
12 INVA
!.PC
R22
R32
-15
R42
.,-30
sa ~TORI3
V~
19
CIJ( .!!..fClKS7MHZ
17
501100 ';;"'TOV+
T
T
16 ,-:-:-:--VOUT
LPO
BPO 15
R44
HPlI 14
R34
INV& 13
R24
R14
RESISTOR VALUES
Rll =34.Bk
RI2=10.5k
RI3=f2.7k
RI4=20k
R21 =34.Bk
R22=45.3k
R23=34.Bk
R24=34.Bk
WlDEBAND NOISE =70.VRMS
7-86
R31
R32
R33
R34
10k
22.1k
24.3k
13.3k
'" ,
\
~-45
R41 =40.2k
R42=39.2k
R43=20k
R44=20k
5VTO -BV
O.l ,.F
~
1\
-50
fClK=4.5MHz
-75
fClK=50% DUTY CYCLE
f-f-3dB:70kHZ
-90
~S-i'"rv,
-105
10k
I 1111
lOOk
f'N (Hz)
1M
LTC1064
APPLICATion CIRCUITS
Dual 5th Order Chebyshev Low Pass Filter
with 50kHz and 100kHz Cutoff Frequencies
Amplitude Response
R14
R13.
R13b
1 INVB"'" INYC 24
ci...L
R23
1000 F T
R33
P
2 HPBIMI
3
n
R43
4L.1'9
lPC 21
~J-$~ v+
20
sa
lIGNa
8V
o 1.F
T -1 ~F
-
SC
CLK
!;l
R31
Rll.
Rllb
R21
10 ePA
11
1lPIl
flPAlNA
12 II'IVA
jPh
R44
Ic=100kHz
~5MHZ, T'L
17
'5
Hl'D 14
T
Ol
R22
\
\
;--45
.F
\
\
~-60
VOUTI
Ic=SOkHz
;9~
R32
-30
;n
_ , 8V
\
-75
-90
-105
!Nva 13
Cl-'1000pF
\
-15
VOUT2
~tR42
LPn
501100
LPA
R41
PASSBAND RIPPLE=O 2dB
R34
v- ~
i;:;
- ; SA
15
R24
HPeMl 23
IIPC 22
10k
SOk
R12
1M
toOk
lIN (Hz)
RESISTOR VALUES
Rll.=4.32k
R13.=3k
Rllb=27.4k
R12=10.5k
R13b=294k
R14=10.5k
R21 =11.8k
R22=20k
R23=11.8k
R24=20k
R31=294k
R32=215k
R33=29.4k
R34=21 6k
R41 10k
R42 316k
R43 10k
R44 316k
Clock Tunable, 30kHz to 90kHz 8th Order Notch
Filter Providing Notch Depth in Excess of BOdB
C2
Amplitude Response
R13
R14
10
R23
I
o
R33
~
Vs- ±8V
fCLK=4MHz
I
-30
0.1""
I
r-BW
-10
-20
ED-40
~ -50
~-60
fCLKSSMHz
-70
-80
Rll
VIN-"I/VY....- - - - " ' /
R21 = 5k
R22=10k
R23=10k
R24=10k
Rh4=10k (0.1%)
-90
R34
-100
RI40.1%
R31 = 50k
R32=887k
R33=100k
R34=63.4k
R14=10k (01%)
-110
R24
RESISTOR VALUES
Rll =50k
R12=154k
R13=10k
R14=9.09k
Rg=68.1k
R44
10k
20k
30k
40k
"N (Hz)
SOk
60k
70k
Rg
R42=48.7k
R44=12.4k
VOUT
Cl=C2=C3=15pF
THE NOTCH DEPTH FROM 5kHz TO 30kHz IS SOdB
WIDEBAND NOISE=300.VRMS
7-87
LTC1064
PACKAGE DESCRIPTion Dimensions in inches (millimeters) unless otherwise noted.
J Package
24-Lead Ceramic DIP
I~~~
24
23
22
21
20
19MAX1f!
rm
[j6J fj"5J
on @J
I
~
(7493)
.AX
L~
\2$40±1l254)
NPackage
24·Lead Plastic DI P
SO Package
24·Lead Plastic SOIC
raa':"llh
,0,,0
0"'431
NODFLEAOS
.
"
~
(10033-10541)
0450-0470
(11430-11938)
0495 0515
(1257313081)
0600-0615
039<-0419
(1524015621)
~
(17700-18161)
t:;,
seN
tnnnnnnnnriLl
12:
3 4;' 6 78
0093-0104
(~~~~:~ ~~~ x45°
NOTE
PIN 1 IDENT,NOTCHONTOPANOCAVlTIES
0tI THESDTTOM OF PACKAGE ARE THE
MANUFACTURlNGOPTlONS TIIEPAAT
• MAYBE$UPPUEDWITHOAWITHOUT
AIIV OF THE OPTIONS
7-88
(2362-2642)
0037-0045
(0940-11-,
I
0050-J
(\~~l
l-JL
0014-0019
10356-(482)
o
}-45dB
t"--+-VOUT
-6OdB
,f....
-75dB
IV
-SOdB
NOTE: THE POWER SUPPLIES SHOULD BE BYPASSED BY A 0.1pf
CAPACITOR CLOSE TO THE PACKAGE.
FOR SERVO OFFSET NULLING APPLICATIONS, PIN 1 IS THE 2ND
STAIlE SUMMING JUNCTION.
"FOR CUTOFF FREQUENCY ABOVE 20kHz, USE COMPENSATION
CAPACITORS (5pF-56pF) BETWEEN PINS 13 AND 1 AND 6 AND 7.
o
5
10
'\ lL
15 20 25 30
FREOUENCY (kHz)
35
40
8TH ORDER CLOCK SWEEPABLE LOWPASS ELLIPTIC ANTIALIASING
FILTER MAINTAINS, FOR 0.1Hz:
24
16
~
12
o
Pin DESCRIPTion
lI\
20
~
I
1# Il
I.....
o
:::::
I-""
;:;- f""'"
.".. -55'C
25'C- 125'C -
--
r-
r--
2 4 6 8 10 12 14 15 f8 20 22 24
TOTAL POWER SUPPLY VOLTAGE (V)
The V+ (pin 4) and V- (pin 12) should be bypassed with a
0.1p.F capacitor to an adequate analog ground. Low noise,
non·switching power supplies are recommended. To avoid
latch up when the power supplies exhibit high turn·on
transients, a 1N5817 schottky diode should be added from
the V+ and V- pins to ground, Figure 1.
2.2V and 3V respectively. The logic threshold levels vary
± 100mV over the full military temperature range. The
recommended duty cycle of the input clock is 50% al·
though for clock frequencies below 500kHz the clock "on"
time can be as low as 200ns. The maximum clock fre·
quency for ± 5V supplies is 4MHz. For ± 7V supplies and
above, the maximum clock frequency is 5MHz. Do not al·
low the clock levels to exceed the power supplies. For
clock level shifting, see Figure 3.
Clock Pin (11)
Analog Ground Pins (3, 5)
For ± 5V supplies the logic threshold level is 1.4V. For
± 8V and OV to 5V supplies the logic threshold levels are
For dual supply operation these pins should be connected
to a ground plane. For single supply operation both pins
Power Supply Pins (4, 12)
LTC1064-1
Pin DESCRIPTion
should be tied to one half supply, Figure 2. Also pins 8and
10, although they are not internally connected should be
tied to analog ground or system ground. This improves the
clock feedthrough performance.
capacitor for each kHz increase in cutoff frequency above
20kHz. For more details refer to graphs 4, 5, and 6.
Connection Pins (7,14)
The input pin 2 is connected to an 18kO resistor tied to the
inverting input of an op amp. Pin 2 is protected against
static discharge. The device's output, pin 9, is the output
of an op amp which can typically source/sink 3/1mA. AI·
though the internal op amps are unity gain stable, driving
long coax cables is not recommended.
A very short connection between pins 14 and 7 is recom·
mended. This connection should be preferably done under
the IC package. In a breadboard, use a one inch, or less,
shielded coaxial cable; the shield should be grounded. In a
PC board, use a one inch trace or less; surround the trace
by aground plane.
Compensation Pins (13 and 1, 6and 7)
For filter cutoff frequencies higher than 20kHz, in order to
minimize the passband ripple, compensation capacitors
should be added between pins 6 and 7(comp1) and pins 1
and 13 (comp2). For comp1 (comp2), add 1pF (1.5pF) mica
Input, Output Pins (2, 9)
When testing the device for noise and distortion, the out·
put, pin 9, should be buffered, Figure 4. The op amp power
supply wire (or trace) should be connected directly to the
power source.
NC Pins (8, 9)
The "no connection" pins preferably should be grounded.
14
14
13
13
12
-::f'"""=L 0.1 ~F
~--+-VV+~-""""----'i
fCLK
III
lN5817
VOUT
Figure 1. Using Schottky Diodes to Protect the IC
from Power Supply Spikes.
Figure 2. Single Supply Operation. If Fast Power Up or Down
Transients are Expected, Use a1N5817 Schottky Diode
Between Pins 4and 5.
-.lr---'1:"':r.......,14
13
V+
12
v+ ......-+-~
5k
5k
Figure 3. Level Shifting the Input f2L Clock for Single Supply Operation, V+ >6V
7-93
LTC1064-1
Pin DESCRIPTion
..I
I
I
,I
LTC10M-1
I
I
I
--_..I
VOUT
RECOMMENDED OP AMPS:
m022. LT31B. LT1056
Figure 4. Buffering the Filter Output. The Buffer Op Amp Should Not Share the
LTC11J64.1 Power Lines.
TYPICAL APPLICATiOnS
Transitional Elliptic-Bessel 10th Order Lowpass Filter
14
VOUT
LTC1064·1
47.5k ......- - - - - - -.....
oC=_3_(,.F)
f -3dB
o
OUTPUT WIDEBAND NOISE:
Transient Response to a2V Step Input
Horizontal: 0.1mslDiv
Vertical: 1V/Div
110~VRMS
Amplitude Response
f_~~=13~~;
f eLK = 750kHz
-15
65'-30
~
z
::>-45
'5
~-60
-75
!\
-90
'V
-105
1
10
fiN (kHz)
7-94
..100
LTC1064-1
TYPICAL APPLICATions
Transitional Elliptic-Bessel Dual 5th Order Lowpass Filter
14
13
VOUT1
F-"1--- VOUT2
oC=_5_(pF)
f
o OUTPUTf WIDEBAND NOISE: 50pVRMS
o OUTPUT2 WIDEBAND NOISE: 110pVRMS
-3dB
47.5k
Transient Reponse to a2V Step Input
Horizontal: 0.1 msJDiv
Vertical: 1V/Div
AmplHude Response
~3d~=\k~~
f
fCLK=lMHz
-15
VOUT2 \ \VOUT1
a:i' -30
\A' B
\ fy ...
:!;!.
z
>-45
§:> -60
III
-75
-90
VOUT2
VOUT1
-105
100
1
Adding an Output Buffer·FiHer to Eliminate Any Clock Feedthrough
Over a10:1 Clock Range, for fe =2kHz to 20kHz
1
14
.
0.1,.F
n..
v- ·11
10k
;:" 10
. :'~F9_+-"o""""'t"'\I'~~
-if
8
SOli
~0.027,.F
LTC1064-1
PACKAGE DESCRIPTion Dimensions in inches (millimeters) unless otherwise noted.
J Package
14-Lead Ceramic DIP
0200
(5080)
MAX
0125
(3175)
MIN
NPackage
14-Lead Plastic DIP
l t
OO15
0OO9(0229-0381)
o325 ~~ ~~;
~ 255 ~~ ~~~)
SPackage
16-Lead Plastic SOL
1iii,:::1I::,t-,
NOTE.
PIN 1 fDENT, NOTCH ON TOP ANa CAVITIES
ON THE BOTIOM OF PACKAGE ARE THE
MANUFACTURING OPTIONS THE PART
MAV 8E SUPPUEOWITH OR WITHOUT
ANYOF THE OPTIONS
~.~~::::: }::[~
12345678
0.093-0,104
(2362-2642)
0.037-0.045
0010_0.029X450t
(0.940-1.143)
(0254-0737)
-.-t
... ""'C,......--f"-'~,=tTYP
L
7-96
LtiilpnnnnnalJ
I~~~)-Il-JL ------:::rom,
TYP
(0.102-0.305)
0014-0019
(0.356-0482)
816(W)1aB
SECTion a-InSTRumEnTATion
AmPLIFIERS
8-1
INDEX
SECTION 8-INSTRUMENTATION AMPLIFIERS
INDEX .................................................................................................... .
PROPRIETARY PRODUCTS
LTC I043, Duallnstrumentation Switched-Capacitor Building Block ......................................................
LTC I 100, Precision, Single Supply, Instrumentation Amplifier (Fixed Gain = 100) ...........................................
LT1101, Precision, Micropower, Single Supply Instrumentation Amplifier (Fixed Gain = 100r 100) ....... . . .. ...................
LT1102, High Speed, JFETlnputlnstrumentation Amplifier (Fixed Gain 100r 100). . . . ' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
=
8-2
8-2
11-15
13-35
13-36
13-48
SECTion 9-DATA conVERSion
9-1
INDEX
SECTION 9-0ATA CONVERSION
INDEX .................................................................................................... .
SELECTION GUIDE . .......................................................................................... .
PROPRIETARY PRODUCTS
LTC1090, Single Chip 10-Bit Data Acquisition System ................................................................
LTC1091, 1-Channel, 10-BitSerial/lODataAcquisitionSystem . . .. . .... . .. ... . .. . ... .. . . ..... .... . ... . . ... . . ... ... .. ...
LTC1092,2-Channel, 10-Bit Serial/IO Data Acquisition System . ....................................... .
LTC1 093, 6-Channel, 1a-Bit Serial/IO Data Acquisition System . ............................... .
LTC1094,8-Channel, to-Bit Serial/IO Data Acquisition System . ....................... .
LTC1095, Complete 1a-Bit Data Acquisition System with On Board Reference ......................................... .
LTC1099, High Speed 8-Bit AID Converter with Built-In Sample-and-Hold ................................................ .
LTC1290, Single Chip 12-Bit Data Acquisition System .............................. .
LTC 1291 , 1-Channel, 12-Bit Serial/IO Data Acquisition System .............................. .
LTC1292, 2-Channel, 12-Bit Serial/lO Data Acquisition System . ........................................... .
LTC1293, 6-Channel, 12-Bit Serial/IO Data Acquisition System. . . . . . . . . . . . . . . . . . . .
. .......... .
LTC1294, B-Channel, 12-Bit Serial/lO Data Acquisition System . .................... '........... .
SECOND SOURCE PRODUCTS
LF198A/LF398A, Precision Sample and Hold Amplifier ........................ .
LF198/LF398, Precision Sample and Hold Amplifier ................................. .
LF398S8, Precision Sample and Hold Amplifier ....
9-2
9-2
9-3
9-5
9-29
9-29
9-29
9-29
9-57
9-81
13-62
13-70
13-70
13-70
13-70
9-97
9-97
9-113
L7UD~:---
__
DA_J._A_A_C_Q_UI_SI_TIO_N_SE_L_EC_T_IO_N_G_U_1D_E
mlLlTAAY AnD commEACIAl.
PART NUMBER DESCRIPTION
LTC1090C,M
10 Bit Serial 110, Analog to
Digital Converter with 8
Channel Multiplexer. Full
Duplex Serial Interface.
RESOLUTION
10 Bits
LTC1091C,M
10 Bit Serial 110, Analog to
Digital Converter with 2
Channel Analog Multiplexer
10 Bits
LTC1092C,M
10 Bit, 8 Pin Analog to Digital
Converter with Serial Output
10 Bits
LTC1093C, M
10 Bit Serial I/o, Analog to
Digital Converter with 6
Channel Multiplexer
10 Bits
LTC1094C,M
10 Bit Serial 110, Analog to
Digital Converter System with 8
Channel Multiplexer
10 Bits
LTC1099C,M
8 Bit, 2pS Analog to Digital
Converter with Built In Sampleand-Hold
8 Bits
LTC129OC, M
12 Bit, Serial 1/0, Analog to
Digital Converter with 8
Channel Multiplexer. Full
Duplex Senallnterlace.
12 Bits
TOTAL UNADJUSTED CONVERSION
MAXIMUM
PACKAGES
IMPORTANT FEATURES
ERROR
TIME
SUPPLY CURRENT AVAILABLE
± 1/2LSB (LTC1090A)
10 Bit Ato Dwith Built In 8
2q,s
2.5mA
J,N,S
Channel Analog MUX and
OverFull
Temperature Range
Sample/Hold. Compatible with
All Microprocessors with Serial
Ports. Software Conflgurable
Bipolar or Unipolar Operation.
Full Duplex Serial 1/0.
±1/2LSB(LTC1091A)
10 Bit Ato Dwith Built In 2
20pS
3.5mA
J8, N8
Channel Analog MUX and
OverFull
Temperature Range
Sample/Hold. Compatible with
All Microprocessors with Serial
Ports. Unipolar Operation.
±1I2lSB(LTC1092A)
Separate Relerence Pin Allows
20pS
2.5mA
J8,N8
Reduced Span (Down to 2OOmV)
OverFull
Temperature Range
Operation. Unipolar Ato D
Conversions are Performed on
a Differential Input Pair.
Compatible with All
Microprocessors with Serial
Ports.
± 1/2LSB(lTC1093A)
20pS
2.5mA
J, N
10 Bit Ato Dwith Built In 6
OverFull
Channel Analog MUX and
Temperature Range
Sample/Hold. Compatible with
All Microprocessors with Serial
Ports. Software Conligurable
Bipolar or Unipolar Operation.
Half Duplex Serial 1/0.
± 1I2lSB (LTC1094A)
10 Bit Ato Dwith Built In 8
20pS
2.5mA
J,N
Channel Analog MUX and
OverFull
Temperature Range
Sample/Hold. Compatible with
All Microprocessors with Serial
Ports. Soltware Conligurable
Bipolar or Unipolar Operation.
Half Duplex Serial 110.
±ILSB
15mA
J,N,S
Built In SIH Allows Direct
4-'
ffi
a:
a:
"- ........
0.8
::>
~ 0.6
,/
-
ACLK=2MHz
CS=5V
Vee=5V
'"
!
6
7
8
SUPPLY VOLTAGE, Vee (V)
Unadjusted Offset Error vs
Reference Voltage
-25
0
25
50
75
100
AMBIENT TEMPERATURE, TA (OC)
1.25
J
Vee=5V
x
II
18
0.2
1.0 _
I
x
I"
T-~
0.75
0.5
~W
0.5
\
:J
o
1.0
5.0
REFERENCE VOLTAGE, VREF (V)
o
~
;;;;
~
"
~
u
1
2
1.25
Vos=1.25mV@Vee=5V
!15
0.5
VREF~4V
~
1.0
t;:; 0.5
8
9-10
9
0.25
- -- -......
;'ij
;;;;-0.25
~
---
2:
0.25
10
I
ACLK=2MHz
ffi
o
7
SUPPLY VOLTAGE, Vee (V)
VRE~=4V
z
:J
o
1
2
3
4
REFERENCE VOLTAGE, VREF (V)
~
0.75
~
~ 0.5
-
...-
~
~
ffi
I
o
Change in Gain Error vs Supply
Voltage
ACLK=2MHz
~CLK=2MHz
6
o
4
Linearity Error vs Supply Voltage
~0.75
4
0.25
REFERENCE VOLTAGE, VREF (V)
a:
0.25
1.0
~
~ 0.25
I
I
Vee=5V
0.75
2:
::--
125
II
a:
~
~
-50 -25
0
25
50
75 100
AMBIENT TEMPERATURE, TA (0C)
1
>
1.0
~
VR~=4V I
0.1
1.25
I
Vee=5V
Offset Error vs Supply Voltage
1.25
0.2
Change in Gain Error vs Reference
Voltage
~
"
Vas 0.5mV
~
125
~!~
1\ Vos=lmV
-- - -
0.3
Linearity Error vs Reference
Voltage
10
~
~
a:
u
w
u
a:
0.2
-50
10
VREF~5V
'""'-
>-'
::>
en 0.4
o
0.5
~ 0.4
--
-....
~
......,.., ./'
4
REIF+OP~N
1.2
Reference Current vs Temperature
0.6
4
6
7
8
SUPPLY VOLTAGE, Vee (V)
z·
~
10
r--.....
-0.5
6
7
8
SUPPLY VOLTAGE, Vee (V)
10
LTC1090
TYPICAL PERFORmAnCE CHARACTERISTICS
Change in Linearity Error
vs Temperature
~
I
~
~ 0.6
I
0.5
~
~ 05
z
'"
~
[5 0.3
~
§
z
~
~
~ 0.4
w
'"
~
[5 0.3
z
~
02
o
z
w
-
0.1
o r-
:3
-50 -25
0
25
50
75
100
AMBIENT TEMPERATURE, TA (OC)
g
~
125
~
~
o
a
-50
'"
0
25
50
.........
/'
I"- ............
1~
---
o
1
VIN
§
,
-
r-
/'~
VREF=4V _
f--
/
2
3
10k
Sample and Hold Acquisition
Time vs Source Resistance
'10
~
VREF 5V
Vee 5V
TA=25°C
o TO 5V INPUT STEP
+
eFllTER"l'F~
./
VIN
~
RSOURCC
100
lk
RSOURec (Il)
10
10k
0.1
10
100
1000
CYCLE TIME, teye (¢l)
'MAXIMUM ACLK FREQUENCY REPRESENTS THE ACLK FREQUENCY AT WHICH A O.lLSB SHIFT
IN THE ERROR AT ANY CODE TRANSITION FROM ITS 2MHz VALUE IS FIRST DETECTED.
10
6
7
8
SUPPLY VOLTAGE, Vee (V)
4
1\
10
-
TA=25°C
/V
-INPUT
I11111111
125
Maximum Conversion Clock Rate
vs Supply Voltage
lOOk
VREF=5V
TA=25°C
\
....---
--
~
0
-50 -25
0
25
50
75
tOO
AMBIENT TEMPERATURE, TA (OC)
Maximum Filter Resistor vs Cycle
Time
U=15~1
V'N- +INPUT
125
REFERENCE VOLTAGE, VREF (V)
Maximum Conversion Clock Rate
vs Source Resistance
t-r-.
100
~
'"
V
o
0
~
~
~
100
AMBIENTTEMPERATURE, TA (OC)
75
AMBIENT TEMPERATURE, TA (~C)
Vee=5V
TA=25°C
-~
r--
-25
~
Maximum Conversion Clock Rate
vs Reference Voltage
o
-~
.......... t--
Vee=5V
VREF=5V
f'....
~ 0.1
01
Maximum Conversion Clock Rate
vs Temperature
~ ........
0.2
w
::1
v v
VREF=5V
ACLK=2MHz
z
~
15
0.2
Ve~=5V I
=-~ 0.5
-
~ 0.3
'-'
o
!::
VREF=5V
ACLK=2MHz
06
~O.4
w
z
'"
:- 0.4
~
u.
Ve~=5V I
~
Vee=5V
VREF=5V
ACLK=2MHz
Change in Gain Error
vs Temperature
10k
100
,/
~
lk
RSOUReE+ (Il)
+
10k
"MAXIMUM RFILTER REPRESENTS THE FILTER RESISTOR VALUE AT WHICH A 0 lLSB
CHANGE IN FULL-SCALE ERROR FROM ITS VALUE AT RFlLTER=O IS FIRST DETECTED.
9-11
LTC1090
TYPICAL PERFORmAnCE CHARACTERISTICS
Input Channel Leakage Current vs
Temperature
Digital Input Logic Threshold vs
Supply Voltage
1000
J
V
V~
V
/
800
~ 700
V
B
w
~
4
600
2. 1.5
'"offi 1.25
IJC1090
~300
~
200
~
100
10
-50
ON CHANNEL-
I
OFF jANN~t,::
Lsi
...~
-25 0
25
50
75
100
AMBIENT TEMPERATURE, TA (0G)
~
'" 0.5
~
"-0.25
125
APPLICATions InFORmATion
DIGITAL CONSIDERATIONS
The LTC1090 is a data acquisition component which contains the following functional blocks:
1. Seriallnterface
1. 10-bit successive approximation capacitive
AtD converter
2. Analog multiplexer (MUX)
3. Sample and hold (StH)
4. Synchronous, full duplex serial interface
5. Control and timing logic
9-12
II
PEAK-TO-PEAK
~
'"
r-- r-t:::::
0.2
1
5
REFERENCE VOLTAGE, VREF (V)
The LTC1090 communicates with microprocessors and
other external circuitry via a synchronous, full duplex, four
wire serial interface (see Operating Sequence). The shift
clock (SCLK) synchronizes the data transfer with each bit
being transmitted on the falling SCLK edge and captured
on the rising SCLK edge in both transmitting and receiving
systems. The data is transmitted and received simultaneously (full duplex).
Operating Sequence
(Example: Differential Inputs (CH3-CH2), Bipolar, MSB First and 10·Bit Word Length)
SCLK
NOISE=200~V
w
z
z
6
7
8
SUPPLY VOLTAGE, Vee (V)
llUill
_1.75
&l
25 1.0
'"
~O.75
500
cd 400
~
o
I
/'
GU~RANTkED :::: j - -
~ 900
ffi
TA 25 0 C
Noise Error vs Reference Voltage
2.0
LTC1090
APPLICATions INFoRmATion
Data transfer is initiate~by a falling chip select (CS)
signal. After the falling CS is recognized, an 8·bit input
word is shifted into the DIN input which configures the
LTC1090 for the next conversion. Simultaneously, the reo
suit of the previous conversion is output on the DOUT line.
At the end of the data exchange the requested conversion
begins and CS should be brought high. After tCONV, the
conversion is complete and the results will be available on
the next data transfer cycle. As shown below, the result of
a conversion is delayed by one CS cycle from the input
word requesting it.
D,N
DOUT
IDIN Word3 I
ID,N Word 1 I
IDouT Word 0 I
IDouT Word 1 I
IDOUT Word 2 I
Ih Data ~
I tCONV
I
Data
I
tCONV
I
AID ~
~ AID---I
Transfer
Conversion
Transfer
Conversion
2. Input Data Word
The LTC1090 8·bit input data word is clocked into the DIN
input on the first eight rising SCLK edges after chip select
is recognized. Furth~nputs on the DIN pin are then ig·
nored until the next CS cycle. The eight bits of the input
word are defined as follows:
Data Input (DIN) Word:
MUXAddress
Unipolarl
Bipolar
Word Length
Multiplexer (MUX) Address
The first four bits of the input word assign the MUX con·
figuration for the requested conversion. For a given chan·
nel selection, the converter will measure the voltage
between the two channels indicated by the + and - signs
in the selected row of Table 1. Note that in differential
mode (SGLlDIFF 0) measurements are limited to four
adjacent input pairs with either polarity. In single ended
mode, all input channels are measured with respect to
COM. Figure 1 shows some examples of multiplexer
assignments.
=
Table 1. Multiplexer Channel Selection
SGLI
OIFF
0
0
0
0
0
0
0
0
MUXAOORESS
0001 SELECT
SIGN 1
0
0
0
0
1
0
0
1
0
0
1
1
0
1
1
1
1
DIFFERENTIAL CHANNEL SELECTION
0
1
+
-
a
a -
0
1
1
a
1
1
2
3
+
-
4
5
+
-
6
7
+
-
-
+
+
-
+
-
+
MUXAOORESS
SINGLE ENDED CHANNEL SELECTION
SGU 0001 SELECT
DlFF SIGN 1
0 0 1 2 3 4 5 6 7 COM
1
a 0 0 +
1
0
1
0
+
1
1
0
0
+
1
a 1 1
+
1
1
0
a
+
1
1
1
0
+
1
1
1
0
+
1
1
1
1
+
-
9-13
LTC1090
APPLICATions INFoRmATion
Combinations of Differential and Single Ended
8Single Ended
4Differential
CHANNEL
+
+
+
+
+
+
+
+
2.31
4.51
6.71
2.31
+
+
+
COM (-)
COM (-)
.".
.".
Changing the MUX Assignment "On the Fly"
4.51
6.71
.".
Unipolar/Bipolar (UNI)
+
+
+
+
+
COM (UNUSEO)
COM (-)
1ST CONVERSION
2ND CONVERSION
Figure 1. Examples of Multiplexer Options on the LTC1090
The fifth input bit (UNI) determines whether the conversion
will be unipolar or bipolar. When UNI is a logical one, a
unipolar conversion will be performed on the selected in·
put voltage. When UNI is a logical zero, a bipolar conver·
sion will result. The input span and code assignment for
each conversion type are shown in the figures below.
Unipolar Output Code (UNI =1)
1111111111
1111111110
0000000001
00 0 0 0 0 0 0 0 0
L...L-+--+----Jo\r---+--+-l--__ VIN
OV
1LSB
VREF-2LSB:
VREF
VREF~ 1LSB
Bipolar Output Code (UNI =0)
0111111111
0111111110
----t--/---"y---t---!-+-rt-.L-I--+---'\r--+-+--+--- VIN
VREF-2LSBI
VREF
I
VREF~1LSB
1000000001
1000000000
9-14
LTC1090
APPLICATions INFoRmATion
Unipolar Transfer Curve (UNI =1)
OUTPUT CODE
1111111111
1111111110
•
·•
0000000001
0000000000
INPUT VOLTAGE
VREF-1LSB
VREF -2LSB
•
•
INPUT VOLTAGE
(VREF=5V)
4.9951V
4.9902V
··•
·
lLSB
OV
control the length of the present, not the next, DOUT word.
WL1 and WLO are never "don't cares" and must be set for
the correct DOUT word length even when a "dummy" DIN
word is sent. On any transfer cycle, the word length should
be made equal to the number of SCLK cycles sent by the
MPU.
WLI
0
0
1
1
0.0049V
OV
Bipolar Transfer Curve (UNI =0)
OUTPUT CODE
0111111111
0111111110
•
•
·
INPUT VOLTAGE
VREF-1LSB
VREF -2LSB
•
•
•
INPUT VOLTAGE
(VREF 5V)
4.9902V
4.9805V
=
•
·•
0000000001
0000000000
1111111111
1111111110
lLSB
OV
-lLSB
-2LSB
0.0098V
OV
-0.OO98V
-0.0195V
1000000001
1000000000
-(VREF)+lLSB
-(VREF)
-4.9902V
-5.000V
•
•
•
•
•
•
•
•
·
MSB First/LSB First Format (MSBF)
The output data of the LTC1090 is programmed for MSB
first or LSB first sequence using the MSBF bit. For MSB
first output data the input word clocked to the LTC1090
should always contain a logical one in the sixth bit loca·
tion (MSBF bit). Likewise for LSB first output data, the in·
put word clocked to the LTC1090 should always contain a
zero in the MSBF bit location. The MSBF bit in a given DIN
word will control the order of the next DOUT word. The
MSBF bit affects only the order of the output data word.
The order of the input word is unaffected by this bit.
MSBF
0
1
OUTPUT FORMAT
LSB First
MSB First
WLO
0
1
0
1
Figure 2 shows how the data output (DoUT) timing can be
controlled with word length selection and MSB/LSB first
format selection.
3. Deglitcher
Adeglitching circuit has been added to the Chip Select in·
put of the LTC1090 to minimize the effects of errors
caused by noise on that input. This circuit ignores
changes in state on the CS input that are shorter in dura·
tion than 1 ACLK cycle. After a change of state on the CS
input, the LTC1090 waits for two falling edges of the ACLK
before recognizing a valid chip select. One indication of
CS low recognition is the DOUT line becoming active (Ieav·
ing the Hi·Z state). Note that the deglitching applies to
both the rising and falling CS edges.
ACLK
Dour _ _
I
..!!H~IGH!1Z_ _~II(::=~~~=
'.
VALID OUTPUT
LOW CS RECOGNIZED
INTERNALLY
ACLK
Word Length (WL1, WLO)
The last two bits of the input word (WL1and WLO) program
the output data word length of the LTC1090. Word lengths
of 8, 10, 12 or 16 bits can be selected according to the fol·
lowing table. The WL 1 and WLO bits in a given DIN word
OUTPUT WORD LENGTH
8Bits
10 Bits
12Bits
16 Bits
Dour
:==:)__
:
I
I
I
I
-+'_~H'G~H~Z
_ __
I
I
HIGH CS RECOGNIZED
INTERNALLY
9-15
LTC1090
APPLICATions INFoRmATion
r'----p-
a·Bit Word Length
cs\
8
SCLK _ _...I
(SB)
TH E LAST TWO BITS
ARE TRUNCATED
DOUT
MSB FIRST
DOUT
LSB FIRST
10·Bit Word Length
·---tSMPL---~~+---tCONV
r
cs\~________4.____________~'--SCLK
----'
(SB)
DOUT
MSB FIRST
(SB)
DOUT
LSB FIRST
12·Bit Word Length
1-1·-----tSMPL----~~+--tcONV
CS\~________~I----------------~,--SCLK _ _...I
(SB)
DOUT
MSB FIRST
(SB)
DOUT
LSB FIRST
16·Bit Word Length
1+---------tSMPL-------~t+---ttccoONV
cs~~_______+--------------------------~,--SCLK
----I
(SB)
FILL
ZEROES
DOUT
MSB FIRST
(SB)
DOUT
LSB FIRST
"IN UNIPOLAR MODE, THESE BITS ARE FILLED WITH ZEROES.
IN BIPOLAR MODE, THE SIGN BIT IS EXTENDED INTO THESE LOCATIONS.
Figure 2. Data Output (DOUT) Timing with Different Word Lengths
9-16
LTC1090
APPLICATions INFoRmATion
4. CS Low During Conversion
In the normal mode of operation, CS is brought high during
the conversion time (see Figure 3). The serial port ignores
any SCLK activity while CS is high. The LTC1090 will also
operate with CS low during the conversion. In this mode,
SCLK must remain low during the conversion as shown in
Figure 4. After the conversion is complete, the DOUT line
SHIFT
will become active with the first output bit. Then the data
transfer can begin as normal.
5. Microprocessor Interfaces
The LTC1090 can interface directly (without external hardware) to most popular microprocessor (MPU) synchronous
tSMPL
I--- MUX _--+--_ _ SAMPLE _ _-.j~_40 TO 44 ACLK CYCLES~I'------ SHIFT RESULT OUT _ _ _ _-1.1
I
ADDRESS
ANALOG
,~
AND NEW ADDRESS IN
IN
INPUT
~,--_ _ _ _ _ _ _ _ _ _ _.....
r
SCLK
DOUT
Figure 3. CS High During Conversion
SHIFT
tSMPL
IN
INPUT
r-- AD~~:SS--+----~~~~~~-----+-40
SCLK
TO 44 ACLK
CYCLES-----4~---A~~I~~~DUDL;E~~TI·.. - - - - - - - I
SCLK MUST REMAIN LOW
Figure 4. CS Low During Conversion
9-17
LTC1090
APPLICATions INFoRmATion
serial formats (see Table 2). If an MPU without a serial interface is used, then 4of the MPU's parallel port lines can
be programmed to form the serial link to the LTC1090. Included here are three serial interface examples and one
example showing a parallel port programmed to form the
serial interface.
Table 2. Microprocessors with Hardware Serial
Interfaces Compatible with the LTC1090··
PART NUMBER
Motorola
MC6805S2, S3
MC68HC11
MC68HC05
RCA
CDP68HC05
Hitachi
HD6305
HD63705
HD6301
HD63701
HD6303
National Semiconductor
COP400 Family
COPBOO Family
NS8050U
HPC16000 Family
Texas Instruments
TMS7002
TMS7042
TMS70C02
TMS70C42
TMS32011'
TMS32020'
TYPE OF INTERFACE
The COP420 transfers data MSB first and in 4-bit increments (nibbles). This is easily accommodated by setting
the LTC1090 to MSB first format and 12·bit word length.
The data output word is then received by the COP420 in
three 4-bit blocks with the final two unused bits filled with
zeroes by the LTC1090.
Hardware and Software Interface to National Semiconductor
COP420 Processor
SPI
SPI
SPI
SPI
SCI Synchronous
SCI Synchronous
SCI Synchronous
SCI Synchronous
SCI Synchronous
MICROWIREt
MICROWIRE/PLUSt
MICROWIRE/PLUS
MICROWIREIPLUS
Serial Port
Serial Port
Serial Port
Serial Port
Serial Port
Serial Port
'Requires external hardware
"Contact factory for interface information for processors not on this list
tMICROWIRE and MICROWIRE/PLUS are trademarks of National
Semiconductor Corp.
Serial Port Microprocessors
Most synchronous serial formats contain a shift clock
(SCLK) and two data lines, one for transmitting and one for
receiving. In most cases data bits are transmitted on the
falling edge of the clock (SCLK) and captured on the rising
edge. However, serial port formats vary among MPU manufacturers as to the smallest number of bits that can be
sent in one group (e.g., 4-bit, 8-bit or 16-bit transfers). They
also vary as to the order in which the bits are transmitted
(LSB or MSB first). The following examples show how the
LTC1090 accommodates these differences.
9-18
National MICROWIRE (COP420)
LTC1090
ANALOG [
INPUTS
--•
••
·
-
COP420
ll!l
GO
SClK
SK
DIN
SO
Dour
SI
Dour from LTC1090 stored in COP420 RAM
Msst
Location A
1B9 B8 B7 B61
Location A+1 1B5 B4 B3 B21
LSB
Location A+2 1B1 BO 0 01
first 4bits
second 4bits
third 4bits
tB9 is MSB in unipolar or sign bit in bipolar
MNEMONIC
LEI
SC
OGI
LDD
XAS
LDD
NOP
XAS
XIS
NOP
XAS
XIS
RC
NOP
XAS
XIS
OGI
LEI
DESCRIPTION
EnabieSIO
Set Carry flag
GO is set to 0 (CS goes low)
Load first 4 bits of DIN to ACC
Swap ACC with SIO reg. Starts SK Clk
Load 2nd 4 bits of DIN to ACC
Timing
Swap first 4 bits from AID with ACC. SK continues.
Put first 4 bits in RAM (location A)
Timing
Swap 2nd 4 bits from AID with ACC. SK continues.
Put 2nd 4 bits in RAM (location A+1)
Clear Carry
Timing
Swap 3rd 4 bits from AID with ACC. SK off
Put 3rd 4 bits i!!BAM (location A+2)
GO is set to 1(CS goes high)
DisableSIO
LTC1090
APPLICATions INFoRmATion
Motorola SPI (MC68HC05C4)
Hitachi Synchronous SCI (HD63705)
The MC68HC05C4 transfers data MSB first and in 8-bit in·
crements. Programming the LTC1090 for MSB first format
and 16-bit word length allows the 10·bit data output to be
received by the MPU as two 8-bit bytes with the final 6 un·
used bits filled with zeroes by the LTC1090.
The HD63705 transfers serial data in 8·bit increments, LSB
first. To accommodate this, the LTC1090 is programmed
for 16-bit word length and LSB first format. The 10·bit out·
put data is received by the processor as two 8-bit bytes,
LSB first. The LTC1090 fills the final 6 unused bits (after
the MSB) with zeroes in unipolar mode and with the sign
bit in bipolar mode.
Hardware and Software Interface to Motorola MC68HC05C4
Processor
LTC1090
ANALOGI
INPUTS
--•
••
•
-
CS
SCLK
Hardware and Software Interface to Hitachi HD63705 Processor
MC68HC05C4
LTC1090
co
SCK
DIN
MOSI
Dour
MISO
ANALOG
INPUTS I
--•
••
•
-
HD63705
~
co
SCLK
CK
D,N
Tx
Dour
R,
Dour from LTC1090 stored in MC68HC05C4 RAM
Dour from LTC1090 stored in HD63705 RAM
MSB*
1B9 B8 B7 B6 B5 B4 B3 B21 byte 1
LSB
Location A+1 1B1 BO 0 0 0 0 0 01 byte 2
LSB
IB7 B6 B5 B4 83 B2 B1 Bol byte 1
Sign.
Location A+1 IB9 B9 B9 B9 89 B9 B9 B81 byte 2
Bipolar
Location A
Location A
• B9 is MSB in unipolar or sign bit in bipolar
MNEMONIC
BCLRn
LDA
STA
DESCRIPTION
CO is cleared (CS goes low)
Load DIN for LTCI090 into ACC
Load DIN from ACC to SPI data reg. Start SCK
t
NOP
I
LOA
LOA
STA
STA
8 NOPs for timing
Load contents of SPI status reg. into ACC
Load LTCI090 DOUT from SPI data reg. into ACC (byte I)
Load LTCI090 DOUT into RAM (location A)
Start next SPI cycle
t
NOP
I
BSETn
LOA
LOA
STA
6 NOPs for timing
CO is set (CS goes high)
Load contents of SPI status reg. into ACC
Load LTCI090 DOUT from SPI data reg. into ACC (byte 2)
Load LTCI090 DOUT into RAM (location A + I)
LSB
IB7 B6 B5 B4 83 B2 B1 Bol byte 1
MSB
Location A+1
o 0 o 0 0 0 B9 B8
byte 2
Unipolar
Location A
MNEMONIC
LOA
BCLRn
STA
I
NOP
I
LOA
STA
NOP
BSETn
LOA
STA
DESCRIPTION
Load DIN w0lf!.for LTCI090 into ACC from RAM
CO cleared (CS goes low)
Load DIN word for LTCI090 into SCI data reg from ACC
and start clocking data (LSB first)
6 NOPs for timing
Load contents of SCI data reg into ACC (byte I)
Start next SCI cycle
Load LTCI090 DOUT word into RAM (Location A)
Timing_
CO set (CS goes high).
Load contents of SCI data reg into ACC (byte 2)
Load LTCI090 DOUT word into RAM (Location A +I)
9-19
g
LTC1090
APPLICATions INFoRmATion
Parallel Port Microprocessors
8051 Code
When interfacing the LTC1090 to an MPU which has a
parallel port, the serial signals are created on the port with
software. Three MPU port lines are programmed to create
the CS, SCLK and DIN signals for the LTC1090. A fourth
port line reads the DOUT line. An example is made of the
Intel 8051/8052/80C252 family.
MNEMONIC
MOVPI,#02H
CONTINUE:
~cedinACC.
Inlel8051
LOOP:
To interface to the 8051, the LTC1090 is programmed for
MS8 first format and 10·bit word length. The 8051 gener·
ates CS, SCLK and DIN on three port lines and reads DOUT
on the fourth.
Hardware and Software Inlerface 10 Inlel8051 Processor
.-
LTC1090
-•
ANALOG
INPUTS
•
•••
••
•
,-
8051
Dovr
P1.1
DIN
P1.2
SCLK
P1.3
~
P1.4
ACt.K
ALE
DELAY:
DOUT from LTC 1090 stored in 8051 RAM
R2
R3
CLR P1.3
SETB P1.4
MOVA.#ODH
CLR PI.4
MOV R4,#08
NOP
MOVC,PI.I
RLCA
MOVPI.2,C
SETB P1.3
CLR PI.3
DJNZ R4, LOOP
MOVR2,A
MOVC,PI.I
CLRA
RLCA
SETB P1.3
CLR P1.3
MOVC, PI.I
RRCA
RRCA
MOVR3,A
SETB P1.3
CLR PI.3
SETB PI.4
MOV R5,#07H
DJNZ R5, DELAY
AJMPCONTINUE
MS8*
189 88 87 86 85 84 83 821
LS8
181 80 0 0 0 0 0 01
DESCRIPTION
Initialize port I (bit I is made
an input)
§.QLK goes low
CS goes high
DIN word for the LTCI090 is
CSgoeslow
Load counter
Delay for deglitcher
Read data bit into carry
Rotate data bit into ACC
Output DIN bit to LTCI090
SCLK goes high
SCLK goes low
Next bit
Store MSBs in R2
Read data bit into carry
ClearACC
Rotate data bit into ACC
SCLK goes high
SCLK goes low
Read data bit into carry
Rotate right into ACC
Rotate right into ACC
Store LSBs in R3
SCLK goes high
§.QLK goes low
CS goes high
load counter
Delay for LTCI090 to perform
conversion
Repeat program
6. Sharing the Serial Interface
The LTC1090 can share the same 3 wire serial interface
with other peripheral components or other LTC1090s (see
Figure 5). In this case, the CS signals decide which
LTC1090 is being addressed by the MPU .
• B9 is MSB in unipolar or sign bit in bipolar
~
OUTPUT PORT
SERIAL DATAh~~---+--......
3 WIRE SERIAL
----+---....----f--+ INTERFACE
TO OTHER
PERIPHERALS OR LTC1090s
MPU
8 CHANNELS
8 CHANNELS
8 CHANNELS
Figure 5. Several LTC1090s Sharing One 3Wire Seriallnlerface
9-20
LTC1090
APPLICATions INFoRmATion
ANALOG CONSIDERATIONS
1. Grounding
The LTC1090 should be used with an analog ground plane
and single point grounding techniques.
Pin 11 (AGND) should be tied directly to this ground plane.
Pin 10 (DGND) can also be tied directly to this ground
plane because minimal digital noise is generated within
the chip itself.
Pin 20 (Vecl should be bypassed to the ground plane with a
4.7/LF tantalum with leads as short as possible. Pin 12 (V-)
should be bypassed with a 0.1/LF ceramic disk. For single
supply applications, V- can be tied to the ground plane.
It is also recommended that pin 13 (REF-) and pin 9(COM)
be tied directly to the ground plane. All analog inputs
should be referenced directly to the Single point ground.
Digital inputs and outputs should be shielded from andlor
routed away from the reference and analog circuitry.
1
ANALOO
GROOND
PlANE
Figure 6. Example Ground Plane for the LTC1090
Figure 6 shows an example of an ideal ground plane design for a two sided board. Of course this much ground
plane will not always be possible, but users should strive
to get as close to this ideal as possible.
2. Bypassing
For good performance, Vee must be free of noise and rip·
pie. Any changes in the Vee voltage with respect to analog
ground during a conversion cycle can induce errors or
noise in the output code. Vee noise and ripple can be kept
below 1mV by bypassing the Vee pin directly to the analog
ground plane with a 4.7/LF tantalum with leads as short as
possible. Figures 7 and 8 show the effects of good and
poor Vee bypassing.
HORIZONTAL: 10pS/DIV
Figure 7. Poor Vcc Bypassing. Noise and Ripple
can Cause AJD Errors
3. Analog Inputs
Because of the capacitive redistribution AID conversion
techniques used, the analog inputs of the LTC1090 have
capacitive switching input current spikes. These current
spikes settle quickly and do not cause a problem.
HORIZONTAL: 10pS/DIV
Figure 8. Good Vcc Bypassing Keeps Noise and Ripple
on Vcc Below 1mV
9-21
LTC1090
APPLICATions INFoRmATion
However, if large source resistances are used or if slow
settling op amps drive the inputs, care must be taken to in·
sure that the transients caused by the current spikes set·
tie completely before the conversion begins.
Source Resistance
The analog inputs of the LTC1090 look like a60pF capaci·
tor (CIN) is series with a 500n resistor (RON) as shown in
Figure 9. CIN gets switched between the selected" +" and
" -" inputs once during each conversion cycle. Large ex·
ternal source resistors and capacitances will slow the set·
tling of the inputs. It is important that the overall RC time
constants be short enough to allow the analog inputs to
completely settle within the allowed time.
"+"Input Settling
This input capacitor is switched onto the" +" input ouring
the sample phase (tSMPL, see Figure 10). The sample phase
starts at the 4th SCLK cycle and lasts until the falling edge
of the last SCLK (the 8th, 10th, 12th or 16th SCLK cycle
depending on the selected word length). The voltage on
the" +" input must settle completely within this sample
time. Minimizing RSOURCE+ and C1 will improve the input
settling time. If large" +" input source resistance must be
used, the sample time can be increased by using a slower
SCLK frequency or selecting a longer word length. With
the minimum possible sample time of 411S, RSOURCE+ <2k
and C1 < 20pF will provide adequate settling.
" - " Input Settling
"+"
RSOURCE+
INPUT
Figure 9. Analog Input Equivalent Circuit
SAMPLE
cs
At the end of the sample phase the input capacitor
switches to the" -" input and the conversion starts (see
Figure 10). During the conversion, the" +" input voltage is
effectively "held" by the sample and hold and will not af·
fect the conversion result. However, it is critical that the
"-" input voltage be free of noise and settle completely
during the first four ACLK cycles of the conversion time.
Minimizing RSQURCE- and C2 will improve settling time. If
large" -" input source resistance must be used, the time
allowed for settling can be extended by using a slower
ACLK frequency. At the maximum ACLK rate of 2M Hz,
RSOURCE- <1kn and C2<20pF will provide adequate
settling.
.. +" INPUT MUST
SETTLE DURING THIS TIME
HOLD
j
--i:~~~~~_M_~~_I~~_~DR_~~_s=====·:I=~~.~.~._tS_MPl_-_-_-_ ~-'t'!
1
-_
SCLK
r'"1- - - - - - - - - - - - -
-LAST SCLK (8TH. 10TH. 12TH OR 16TH DEPENDING ON WORD LENGTH)
•••
ACLK
I
"+"INPUT
r
l. . ._____________
.. - .. INPUT _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _- i
Figure 10.
9-22
I
1ST BIT
TEST-I
.. -" INPUT MUST SETTLE
DURING THIS TIME
"+" and" -" Input Settling Windows
LTC1090
APPLICATions INFoRmATion
Input Op Amps
When driving the analog inputs with an op amp it is important that the op amp settle within the allowed time (see
Figure 10)_ Again, the" +" and" - " input sampling times
can be extended as described above to accommodate
slower op amps. Most op amps including the LT1006 and
LT1013 single supply op amps can be made to settle well
even with the minimum settling windows of 411s (" +"
input) and 211s (" -" input) which occur at the maximum
clock rates (ACLK=2MHz and SCLK=1MHz). Figures 11
and 12 show examples of adequate and poor op amp
settling.
HORIZONTAL: 1,.s/QlV
Figure 11. Adequate Settling of Op Amp Driving Analog Input
inated by increasing the cycle time as shown in the typical
curve of Maximum Filter Resistor vs Cycle Time.
LTC1000
H_"
Figure 13. RC Input Filtering
Input Leakage Current
Input leakage currents can also create errors if the source
resistance gets too large. For instance, the maximum input leakage specification of 111A (at 12S°C) flowing
through a source resistance of 1kO will cause a voltage
drop of 1mV or 0.2LSB. This error will be much reduced
at lower temperatures because leakage drops rapidly
(see typical curve of Input Channel Leakage Current vs
Temperature).
Noise Coupling into Inputs
HORIZONTAL: 20,.s/DIV
Figure 12. Poor Op Amp Settling can Cause AID Errors
RC Input Filtering
It is possible to filter the inputs with an RC network as
shown in Figure 13. For large values of CF (e.g., 1I1F), the
capacitive input switching currents are averaged into a
net DC current. Therefore, a filter should be chosen with a
small resistor and large capacitor to prevent DC drops
across the resistor. The magnitude of the DC current is approximately IDC = 60pF xVIN/tcyc and is roughly proportional to VIN. When running at the minimum cycle time of
3311S, the input current equals 911A at VIN = SV. In this case,
a filter resistor of SOO will cause 0.1 LSB of full-scale error.
If a larger filter resistor must be used, errors can be elim-
High source resistance input signals (>SOOO) are more
sensitive to coupling from external sources. It is preferable to use channels near the center of the package (i.e.,
CH2-CH7) for signals which have the highest output resistance because they are essentially shielded by the pins
on the package ends (DGND and CHO). Grounding any unused inputs (especially the end pin, CHO) will also reduce
outside coupling into high source resistances.
4_ Sample and Hold
Single Ended Inputs
The LTC1090 provides a built-in sample and hold (S&H)
function for all signals acquired in the single ended mode
(COM pin grounded). This sample and hold allows the
LTC1090 to convert rapidly varying signals (see typical
curve of S&H Acquisition Time vs Source Resistance). The
input voltage is sampled during the tSMPL time as shown in
Figure 10. The sampling interval begins after the fourth
MUX address bit is shifted in and continues during the
remainder of the data transfer. On the falling edge of the
9-23
9
LTC1090
APPLICATions INFoRmATion
final SCLK, the S&H goes into hold mode and the conver·
sion begins. The voltage will be held on either the 8th,
10th, 12th or 16th falling edge of the SCLK depending on
the word length selected.
Differential Inputs
With differential inputs or when the COM pin is not tied to
ground, the AID no longer converts just a single voltage
but rather the difference between two voltages. In these
cases, the voltage on the selected" +" input is still sam·
pled and held and therefore may be rapidly time varying
just as in single ended mode. However, the voltage on the
selected" -" input must remain constant and be free of
noise and ripple throughout the conversion time. Other·
wise, the differencing operation may not be performed
accurately. The conversion time is 44 ACLK cycles. There·
fore, achange in the" - " input voltage during this interval
can cause conversion errors. For a sinusoidal voltage on
the" -" input this error would be:
VERROR (MAX) VPEAK x 2x 7rX f(" - ")x 44/fACLK
Where f(" - ") is the frequency of the" -" input voltage,
VPEAK is its peak amplitude and fACLK.is the frequency of
the ACLK. In most cases VERROR will not be significant.
For a 60Hz signal on the" -" input to generate a 1I4LSB
error (1.25mV) with the converter running at ACLK 2M Hz,
its peak value would have to be 150mV.
1. The source resistance (ROUT) driving the reference in·
puts should be low (less than 10) to prevent DC drops
caused by the 1mA maximum reference current (I REF).
2. Transients on the reference inputs caused by the
capacitive switching currents must settle completely
during each bit test (each 4 ACLK cycles). Figures 15
and 16 show examples of both adequate and poor set·
tling. USing a slower ACLK will allow more time for the
reference to settle. However, even at the maximum
ACLK rate of 2MHz most references and op amps can
be made to settle within the 2fLS bit time.
3. It is recommended that the REF- input be tied directly
to the analog ground plane. If REF- is biased at a volt·
age other than ground, the voltage must not change
during a conversion cycle. This voltage must also be
free of noise and ripple with respect to analog ground.
=
=
Figure 14. Reference Input Equivalent Circuit
5. Reference Inputs.
The voltage between the reference inputs of the LTC1090
defines the voltage span of the AID converter. The refer·
ence inputs look primarily like a 10kll resistor but will have
transient capacitive switching currents due to the
switched capacitor conversion technique (see Figure 14).
During each bit test of the conversion (every 4 ACLK cy·
cles), a capacitive current spike will be generated on the
reference pins by the AID. These current spikes settle
quickly and do not cause a problem. However, if slow set·
tling circuitry is used to drive the reference inputs, care
must be taken to insure that transients caused by the~e
current spikes settle completely during each bit test of the
conversion.
When driving the reference inputs, three things should be
kept in mind:
9-24
HORIZONTAL: 1pS/DIV
Figure 15. Adequllte Reference Settling
HORIZONTAL: 1pS/DIV
Figure 16. Poor Reference Settling Can Cause AID Errors
LTC1090
APPLICATions INFoRmATion
6. Reduced Reference Operation
The effective resolution of the LTC1090 can be increased
by reducing the input span of the converter. The LTC1090
exhibits good linearity and gain over a wide range of reference voltages (see typical curves of Linearity and Gain
Error vs Reference Voltage). However, care must be taken
when operating at low values of VREF because of the reduced LSB step size and the resulting higher accuracy requirement placed on the converter. The following factors
must be considered when operating at low VREF values.
1. Conversion speed (ACLK frequency)
2. Offset
3. Noise
Conversion Speed with Reduced VREF
With reduced reference voltages, the LSB step size is reduced and the LTC1090 internal comparator overdrive is
reduced. With less overdrive, more time is required to perform a conversion. Therefore, the maximum ACLK frequency should be reduced when low values of VREF are
used. This is shown in the typical curve of Maximum Conversion Clock Rate vs Reference Voltage.
Offset with Reduced VREF
The offset of the LTC1090 has a larger effect on the output
code when the AID is operated with reduced reference
voltage. The offset (which is typically a fixed voltage) becomes a larger fraction of an LSB as the size of the LSB is
reduced. The typical curve of Unadjusted Offset Error vs
Reference Voltage shows how offset in LSBs is related to
reference voltage for a typical value of Vas. For example, a
Vas of O.SmV which is 0.1LSB with a SV reference be-
comes O.SLSB with a 1V reference and 2.SLSBs with a 0.2V
reference. If this offset is unacceptable, it can be corrected digitally by the receiving system or by offsetting
the" -" input to the LTC 1090.
Noise with Reduced VREF
The total input referred noise of the LTC1090 can be reduced to approximately 200/LV peak-to-peak using a
ground plane, good bypassing, good layout techniques
and minimizing noise on the reference inputs. This noise
is insignificant with a SV reference but will become a
larger fraction of an LSB as the size of the LSB is reduced.
The typical curve of Noise Error vs Reference Voltage
shows the LSB contribution of this 200/LV of noise.
For operation with a SV reference, the 200/LV noise is only
0.04LSB peak-to-peak. In this case, the LTC1090 noise will
contribute virtually no uncertainty to the output code.
However, for reduced references, the noise may become a
significant fraction of an LSB and cause undesirable jitter
in the output code. For example, with a 1V reference, this
same 200/LV noise is 0.2LSB peak-to-peak. This will reduce
the range of input voltages over which a stable output
code can be achieved by 0.2LSB.lf the reference is further
reduced to 200m V, the 200/LV noise becomes equal to one
LSB and a stable code may be difficult to achieve. In this
case averaging readings may be necessary.
This noise data was taken in a very clean setup. Any setup
induced noise (noise or ripple on Vee, VREF, VIN or V-) will
add to the internal noise. The lower the reference voltage
to be used, the more critical it becomes to have a clean,
noise-free setup.
TYPICAL APPLICATiOnS
A"Quick Look" Circuit forthe LTC1090
Users can get a quick look at the function and timing of
the LTC1090 by using the following simple circuit. REF+
and DIN are tied to Vee selecting aSV input span, CH7 as a
single ended input, unipolar mode, MSB first format and
16-bit word length. ACLK and SCLK are tied together and
driven by an external clock. CS is driven at 1/64 the clock
rate by the CD4S20 and DauT outputs the data. All other
pins are tied to a ground plane. The output data from the
DaUT pin can be viewed on an oscilloscope which is set up
to trigger on the falling edge of CS.
9-25
LTC1090
TYPICAL APPLICATions
Scope Trace of LTC1090 "Quick Look" Circuit
Showing AlD Output of 0101010101 (155HExl
A "Quick Look" Circuit for the LTC1090
5V
1164
ClK
0,1
VOO
EN
RESET
01
04
02
Q3
TIME
C04520
03
(89)
(BO)
ZEROES
02
VERTICAL: 2V/DIV
HORIZONTAL: 2,.s1 DlV
01
EN
ClK
':"
CLOCK IN
1MHz MAX
--.,.....,
TO OSCillOSCOPE
SNEAK·A·BIT™
Two 10·bit unipolar conversions are performed: the first
over a 0 to 5V span and the second over a 0to - 5V span
(by reversing the polarity of the inputs). The sign of the in·
put is determined by which of the two spans contained it.
Then the resulting number (ranging from -1023 to +1023
decimal) is converted to 2's complement notation and
stored in RAM.
The LTC1090's unique ability to software select the polar·
ity of the differential inputs and the output word length is
used to achieve one more bit of resolution. Using the cir·
cuit below with two conversions and some software, a 2's
complement 10·bit +sign word is returned to memory in·
side the MPU. The MC68HC05C4 was chosen as an exam·
pie; however, any processor could be used.
SNEAK·A·BIT Circuit
9V
2M Hz
CLOCK
OTHER CHANNELS
OR SNEAK-A-8IT
INPUTS
1
&110,
~
CH2 '
$¢u(
+ - - - - - - - - - - 1 MOSI
~ _
.Pii£J.'
,',~
"
~ ,~'t!\l~
-5V TO
+~~
~'
MC68HC05C4
SCK
,
MISO
CO
el
';1II!I'of<
"~~
_<
-"-:1-+-...,
~
':"
SNEAK·A·BIT is a trademark of Linear Technology Corp.
9-26
-5V
LTC1090
TYPICAL APPLICATions
Sneak·A·Bit Code for the LTC1090 Using the MC68HC05C4
SNEAK·A·BIT
VIN~(+ICH6
-!-t-
5V 1]1 ST CONVERSION
1024 STEPS
1CH7
SOFTWARE
1ST CONVERSION
2047 STEPS
VIN~(-ICH6
OV
OVI]2NO CONVE: OV
1024 STEPS
n(+ICH7
-~
-~
2ND CONVERSION
SNEAK·A·BIT Code
DOUT from LTC1090 in MC68HC05C4 RAM
Sign
1810 89 88 87 86 85 84 831
LS8
182 81 80
filled with Os
Location $77
Location $87
DIN words for LTC 1090
MUXAddr.
(OODISIGNI
DIN 1
0
DIN2
0
DIN3
0
0
MS8F
UNI
t
t
Word
Length
1 1
0
Sneak·A·Bit Code for the LTC1090 Using the MC68HC05C4
MNEMONIC
LOA 1#$50
STA $OA
LOA #$FF
STA $06
BSET 0,$02
JSR READ-I+
DESCRIPTION
Configuration data for SPCR
Load configuration data into $OA
Configuration data for port CDDR
Load confi~ation data into port CDDR
Make sure is high
Dummy read configures LTC1090 for next
read
JSR READ+I- Read CH6 with respect to CH7
JSR READ-I+ Read CH7 with respect to CH6
JSR CHKSIGN Determines which reading has valid data,
converts to 2's complement and stores in
RAM
MNEMONIC
READ -I +: LDA #$3F
JSR TRANSFER
LDA $60
STA $71
LDA $61
STA $72
RTS
READ +I-:LDA 1#$7F
JSR TRANSFER
LDA $60
STA $73
LDA $61
STA $74
RTS
TRANSFER: BCLR 0, $02
STA SOC
LOOPt
TST $OB
BPL LOOP 1
LDA SOC
STA SOC
STA $60
LOOP 2:
TST SOB
BPL LOOP2
BSET 0,$02
LDA SOC
STA $61
RTS
CHKSIGN: LDA $73
ORA $74
BEQ MINUS
CLC
ROR $73
ROR $74
LDA $73
STA $77
LDA $74
STA $87
BRA END
MINUS:
CLC
ROR $71
ROR $72
COM $71
COM $72
LDA $72
ADD #$01
STA $72
CLRA
ADC $71
STA $71
STA $77
LDA $72
STA $87
END:
RTS
DESCRIPTION
Load DIN word for LTC1090 into ACC
Read LTC1090 routine
Load MSBs from LTC1090 into ACC
Store MSBs in $71
Load LSBs from LTC1090 into ACC
Store LSBs in $72
Return
Load DIN word for LTC1090 into ACC
Read LTC1090 routine
Load MSBs from LTC1090 into ACC
Store MSBs in $73
Load LSBs from LTC1090 into ACC
Store LSBs in $74
Return
CSgoes low
Load DIN into SP!. Start transfer
Test status of SPIF
Loop to previous instruction if not done
Load contents of SPI data reg into ACC
Start next cycle
Store MSBs in $60
Test status of SPIF
Loop to previous instruction if not done
CS goes high
Load contents of SPI data reg into ACC
Store LSBs in $61
Return
Load MSBs of +1- read into ACC
Or ACC (MSBs) with LSBs of +1- read
If result is 0goto minus
Clear carry
Rotate right $73 through carry
Rotate right $74 through carry
Load MSBs of + 1- read into ACC
Store MSBs in RAM location $77
Load LSBs of +1- read into ACC
Store LSBs in RAM location $87
Goto end of routine
Clear carry
Shift MSBs of -I + read right
Shift LSBs of -I + read right
1'5 complement of MSBs
l's complement of LSBs
Load LSBs into ACC
Add 1to LSBs
Store ACC in $72
ClearACC
Add with carry to MSBs. Result in ACC
Store ACC in $71
Store MSBs in RAM location $77
Loac LSBs in ACC
Store LSBs in RAM location $87
Return
9-27
LTC1090
PACKAGE DESCRIPTion Dimensions in inches (millimeters) unless otherwise noted.
J20 Package Ceramic DIP
f
0.220-0310
(5.588 -7.874)
0025
(0635)
~
RAD TYP
0.160
J
GLASS
(4 064)
SEALANT MAX
L
0.005
ro-(0.127)
MIN
~----------------~~
~
0015-0.060
(0 381-1 524)
0.008-0018j
(0203-0.457)
---
2
I
tTl'
-t--=J-I-~
-
JIt
MAX
-t
I
0.080
(2032)
MAX
(3.175)
MIN
0.385±0 025
(9.779±0.635)
0.200
(5080)
.
0.038-0068
-(0.965-1727)
_
W
O. 100 ±0.010
(2.540±0254)
0.014-0026
(0.356-0660)
N20 Package Molded DIP
·r---------(2~04~06)--------l~
r
20
MAX
t
0.25O±0.010
(6.35O±0 254)
-+-~~~~~~~~
o 13O±0 005
0.300-0320
~)
r
---
0.009-0.015
(0.229-0381)
o325 ~~~i;
---
(8255
9-28
~~~m
-
0.065
,".,."'m~mrnMl
0.125
(3.175)
MIN
o065±0.015
(1.651 ±0.381)
L Ujt~':::::~,-, r-~
I
o018±0 003
(0 457 ± 0 076)
(2 540±0 254)
F A"
L1n
L7 U \K
LTC1091/LTC1092
LTC1093/LTC1094
TECHNOLOGY~---1-1-2/-6-a-n-d-8--C-h-a-nn-e-I,-1-O--B-it
Serial 1/ 0 Data Acquisition Systems
as well as on chip sample and holds. On-chip serial ports
allow efficient data transfer to a wide range of microprocessors and microcontrollers. These circuits can provide a
complete data acquisition system in ratiometric applications or can be used with an external reference in others.
FEATURES
• Programmable Features
Unipolar/Bipolar Conversions
Differential/Single Ended Multiplexer Configurations
• Sample and Holds
• Single Supply SV, 10V or ± SV Operation
• Direct 3or 4Wire Interface to Most MPU Serial Ports
and All MPU Parallel I/O Ports
• Analog Inputs Common-Mode to Supply Rails
• Resolution
10 Bits
• Total Unadjusted Error (A Grade) ± 1/2LSB Over Temp
• Fast Conversion Time
20lls
• Low Supply Current LTC1091
3.SmA Max, l.SmA Typ
LTC1092/3/4 2.SmA Max, 1mA Typ
DESCRIPTion
The LTC1091/2/3/4 10-bit data acquisition systems are de·
signed to provide complete function, excellent accuracy
and ease of use when digitizing analog data from a wide
variety of signal sources and transducers. Built around a
10-bit, switched capacitor, successive approximation A/D
core, these devices include software configurable analog
multiplexers and bipolar and unipolar conversion modes
The high impedance analog inputs and the ability to operate with reduced spans (below 1V full scale) allow direct
connection to sensors and transducers in many applications, eliminating the need for gain stages.
An efficient serial port communicates without external
hardware to most MPU serial ports and all MPU parallel I/O
ports allowing eight channels of data to be transmitted
over as few as 3 wires. This, coupled with low power consumption, makes remote location possible and facilitates
transmitting data through isolation barriers.
Temperature drift of offset, linearity, and full scale error
are all extremely low (1 ppm/DC typically) allowing all
grades to be specified with offset and linearity errors of
± O.SLSB maximum over temperature. In addition, the A
grade devices are specified with full scale error and total
unadjusted error (including the effects of offset, linearity,
and full scale errors) of ± O.SLSB maximum over temperature. The lower grade has a full scale specification of
± 2LSB for applications where full scale is adjustable or
less critical.
TYPICAL APPLICATiOn
1.25
~
MPU
(e.g .. 8051)
ANALOG INPUT # 1
0-5V RANGE
ANALOG INPUT #2
0-5V RANGE
-I~
II
~
'---_-----iP1.4
a:
ffi
~
SERIAL DATA LINK
0.75
&l
1-----I------iP13
---IP1.2
rl-.._--__
vcc 15V
1.0
~
~
0.5
\
0.25
::J
LTC1091
o
FOR 8051 CODE SEE
APPLICATIONS INFORMATION SECTION
o
"'
1
2
3
REFERENCE VOLTAGE, VREF (V)
9-29
LTC1091/LTC1092
LTC1093/LTC1094
ABSOLUTE mAXimum RATinGS
(Noles 1and 2)
Supply Voltage (Vee) to GND or V- ................... 12V
Negative Supply Voltage (V-) ............... - 6V to GND
Voltage
Analog Reference and LTC1091/2 CS
Inputs ....................... (V-) - 0.3V to Vee +0.3V
Digital Inputs (except LTC 109112 CS) ..... - 0.3V to 12V
Digital Outputs ................... - 0.3V to Vee +0.3V
Power Dissipation ............................... 500mW
Operating Temperature Range
LTC1091-4AC, LTC1091-4C ............ - 40°C to 85°C
LTC1091-4AM, LTC1091-4M .......... - 55°C to 125°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
PACKAGE/ORDER InFORmATiOn
ORDER PART
NUMBER
TOP VIEW
J PACKAGE
8 LEAD CERAMIC DIP
LTC1091AMJ8
LTC1091MJ8
LTC1091ACJ8
LTC1091CJ8
LTC1091ACN8
LTC1091CN8
N PACKAGE
8 LEAD PLASTIC DIP
ORDER PART
NUMBER
TOP VIEW
J PACKAGE
8 LEAD CERAMIC DIP
LTC1092AMJ8
LTC1092MJ8
LTC1092ACJ8
LTC1092CJ8
LTC1092ACN8
LTC1092CN8
N PACKAGE
8 LEAD PLASTIC DIP
TOP VIEW
LTC1094AMJ
LTC1094MJ
LTC1094ACJ
LTC1094CJ
LTC1094ACN
LTC1094CN
LTC1093AMJ
LTC1093MJ
LTC1093ACJ
LTC1093CJ
LTC1093ACN
LTC1093CN
J PACKAGE
16 LEAD CERAMIC DIP
N PACKAGE
16 LEAD PLASTIC DIP
J PACKAGE
20 LEAD CERAMIC DIP
N PACKAGE
20 LEAD PLASTIC DIP
PRODUCT GUIDE
PART NUMBER
LTC1091
LTC1092
LTC1093
LTC1094
9-30
# CHANNELS
2
1
6
8
CONVERSION MODES
UNIPOLAR
BIPOLAR
•
•
•
•
•
•
REDUCED SPAN
CAPABILITY
(SEPARATE VREF)
•
•
•
:!:5V
CAPABILITY
Pin for pin 10·bit upgrade of ADC0832
Pin for pin 10·bil upgrade of ADC0831
•
•
LTC1091/LTC1092
LTC1093/LTC1094
REcommEnDED OPERATinG conDITions
Vcc
V-
PARAMETER
Supply Voltage
Negative Supply Voltage
fClK
tCYC
Clock Frequency
Total Cycle Time
SYMBOL
LTC1091-4/LTC1091-4A
MIN
MAX
4.5
10
-5.5
0
CONDITIONS
Vcc=5V
lTC1093/4
Vcc=5V
lTC1091
0.01
15 ClK Cycles
UNITS
V
V
0.5
MHz
+2ps
12 ClK Cycles
lTC1092
+2ps
lTC1093/4
18 ClK Cycles
+2ps
thOI
tsucs
tsuOI
tWHClK
tWlClK
tWHCS
tWlCS
Hold Time, DIN After SClK I
Setup Time CSt Before ClK I
Setup Time, DIN Stable Before ClK I
ClK High Time
ClKlowTime
CS High Time Between Data Transfer Cycles
CS Low Time During Data Transfer
150
1
400
0.8
1
2
15
12
18
Vcc=5V
Vcc=5V
Vcc=5V
Vcc=5V
Vcc=5V
Vcc=5V
LTC1091
lTC1092
lTC1093/4
ns
ps
ns
pS
ps
pS
ClKCycles
ClKCycles
CLKCycies
conVERTER AnD mULTIPLEXER CHARACTERISTICS (Note 3)
PARAMETER
Offset Error
Linearity Error
Full Scale Error
Total Unadjusted Error
Reference Input Resistance
Analog and REF Input Range
On Channel leakage Current
(Note 8)
Off Channel Leakage Current
(Note 8)
CONDITIONS
(Note 4)
(Notes 4 and 5)
(Note 4)
VREF = 5.000V
(Notes 4and 6)
VREF=5V,
MIN
•
•
•
lTC1092/3/4
•
•
(Notel)
On Channel = 5V
Off Channel = OV
On Channel = OV
Off Channel = 5V
On Channel = 5V
Off Channel = OV
On Channel = OV
Off Channel = 5V
•
•
•
•
5
lTC1091-4A
TYP
MAX
±0.5
±0.5
±0.5
±0.5
10
MIN
LTC1091-4
TYP
5
MAX
±0.5
±0.5
±2.0
10
UNITS
LSB
LSB
LSB
lSB
kll
(V -) - 0.05V to Vee +0.05V
1
1
V
pA
-1
-1
pA
-1
-1
pA
1
1
pA
9-31
•
LTC1091/LTC1092
LTC1093/LTC1094
AC CHARACTERISTICS (Note 3)
SYMBOL
tSMPL
tCONV
tdDO
tdis
ten
thoo
tf
tr
CIN
PARAMETER
Analog Input Sample Time
Conversion Time
Delay Time, CLKI to Dour Data Valid
DelayTlme, CSI to Dour Hi·Z
Delay Time, CLKI to Dour Enabled
Time Output Data Remains Valid After SCLKI
Dour Fall Time
Dour Rise Time
Input Capacitance
CONDITIONS
See Operating Sequence
See Operating Sequence
See Test Circuits
See Test Circuits
See Test Circuits
•
•
•
•
•
See Test Circuits
See Test Circuits
Analog Inputs On Channel
011 Channel
Digital Inputs
LTC1091-4/LTC1091-4A
MIN
TYP
MAX
1.5
10
400
850
450
180
160
450
150
90
300
60
300
65
5
5
UNITS
CLKCycies
CLKCycies
ns
ns
ns
ns
ns
ns
pF
pF
pF
DIGITAL AnD DC ELECTRICAL CHARACTERISTICS (Note 3)
SYMBOL
VIH
VIL
IIH
IlL
VOH
PARAMETER
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
High Level Output Voltage
CONDITIONS
Vee = 5.25V
Vee= 4.75V
VIN = Vee
VIN=OV
Vcc = 4.75V, 10 = 10~
10=360~A
VOL
loz
Low Level Output Voltage
Hi·Z Output Leakage
ISOURCE
ISINK
lee
Output Source Current
Output Sink Current
Positive Supply Current
IREF
1-
Reference Cu rrent
Negative Supply Current
Vee = 4.75V, 10 = 1.6mA
Vour = VccJ;S High
Vour=OV,CSHigh
Vour=OV
Vour= Vee
Q§ High, LTC1091
CS High, REF+ Open, LTC10921314
VREF=5V, LTC109213/4
CS High, V- = - 5V, LTC109314
Note 1: Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with DGND, AGND,
GND and REF- wired together (unless otherwise noted). REF- is internally
connected to the AGND pin on the LTC1093. DGND, AGND, REF- and Vare internally connected to the GND pin on the LTC1091/2.
Note 3: Vee=5V, VREF+ =5V, VREF- =OV, V- =OV for unipolar mode and
- 5V for bipolar mode, CLK =0.5MHz unless otherwise specified. The.
indicates specs which apply over the full operating temperature range; all
other limits and typicals TA = 25°C.
Note 4: These specs apply for both unipolar (LTC1091-4) and bipolar
(LTC1093/40nly) modes. In bipolar mode, one LSB is equal to the bipolar in·
put span (2V REF) divided by 1024. For example, when VREF = 5V, 1LSB
bipola~ = 2(5V)/l024 = 9.77mV.
Note 5: Linearity error is specified between the actual end pOints of the AID
transfer curve.
9-32
•
•
•
•
•
•
••
••
•
•
LTC1 091-4/LTC1 091-4A
MIN
TYP
MAX
2.0
0.8
2.5
-2.5
4.7
2.4
4.0
0.4
3
-3
-10
10
1.5
3.5
1.0
2.5
1.0
0.5
1
50
UNITS
V
V
~A
~A
V
V
V
~
~
mA
mA
mA
mA
mA
~
Note 6: Total unadjusted error includes ollset, full scale, linearity, multi·
plexer and hold step errors.
Note 7: Two on·chip diodes are tied to each reference and analog input
which will conduct for reference or analog input voltages one diode drop
below V- or one diode drop above Vee. Be ~areful during testing at low Vee
levels (4.5V), as high level reference or analog inputs (5V) can cause this in·
put diode to conduct, especially at elevated temperatures, and cause errors
for inputs near full·scale. This spec allows 50mV forward bias of either
diode. This means that as long as the reference or analog input does not ex·
ceed the supply voltage by more than 5OmV, the output code will be correct.
To achieve an absolute OV to 5V input voltage range will therefore require a
minimum supply voltage of 4.950Vover initial tolerance, temperature varia·
tions and loading.
Nole 8: Channel leakage current is measured after the channel selection.
LTC1091/LTC1092
LTC1093/LTC1094
TEST CIRCUITS
Load Circuit for tdOO, Ir, and tl
On and Off Channel Leakage Current
5V
14V
ON CHANNEL
3kO
DOUT~+-TEST POINT
-r100PF
/POLARITY
I °
L
OFF
CHANNELS
J
O
Voltage Waveforms for DOUT Rise and Fall Times, tr, II
___
O.4V
DOUT £ 7 , - - 2 4
V
Vollage Waveforms for DOUT Delay Time, IdOO
CLK
- - tr
--tj
-x.;..;.O;;,8V~_ _ __
l~tdDO~I~
~-_-_-_-_-_-_ ~:~
DOUT
Vollage Waveforms for Idis
2.0V
DDUT ------------t~
WAVEFORM 1
(SEE NOTE 1)
Load Circuit for Idls and len
Dour
TEST
POINT
5V
3kO
tdlS WAVEFORM 2, ten
DOUT
~
-r100PF
tdlS WAVEFORM t
WAVEFORM 2
(SEE NOTE 2)
------------...Ji
NOTE t WAVEFORM t IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH THAT
THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL
NOTE 2' WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH THAT
THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL
Vollage Waveforms for len
LTC1091
~ ~~-----------------------------------D,N
~
START
\ ' -_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
CLK
Dour
/
B9
9-33
LTC1091/LTC1092
LTC1093/LTC1094
TEST CIRCUITS
Voltage Waveforms for ten
lTC1092
~
\~---------------------
ClK
DOUT
/
B9
lTC1093/4
~~~-----------------------------------------------DIN
~'--_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __ _
ClK
DOUT
Pin FunCTions LTC1091J2
lTC1091 g
1
2,3
lTC109a
1
PIN
CS
CHO,CH1
IN+,INGND
DIN
VREF
FUNCTION
Chip Select Input
Analog Inputs
Analog Inputs
Analog Ground
Digital Data Input
Reference Input
6
7
DOUT
ClK
VCC(VREF)
8
Vcc
Digital Data Output
Shift Clock
Positive Supply and
Reference Voltage
Positive Supply
Voltage
2,3
4
5
4
5
6
7
8
9-34
DESCRIPTION
A logic low on this input enables the lTC109112.
These inputs must be free of noise with respect to GND.
These inputs must be free of noise with respect to GND.
GND should be tied directly to an analog ground plane.
The multiplexer address is shifted into this input.
The reference input defines the span of the AID converter and must be kept free of
noise with respect to AGN D.
The AID conversion result is shifted out of this output.
This clock synchronizes the serial data transfer.
This pin provides power and defines the span of the AID converter. It must be kept
free of noise and ripple by bypassing directly to the analog ground plane.
This pin provides power to the AID converter. It must be kept free of noise and
ripple by bypassing directly to the analog ground plane.
LTC1091/LTC1092
LTC1093/LTC1094
Pin FunCTions LTC1093J4
LTC1093#
1-6
LTC1094#
7
1-8
9
PIN
CHO-CH5
CHO-CH7
COM
8
9
10
11
DGND
V-
Digital Ground
Negative Supply
10
11
12
AGND
VREF
REF +, REFDIN
12
13
14
15
16
FUNCTION
Analog Inputs
Analog Inputs
Common
13,14
15
16
17
18
~UT
ClK
Vec
Analog Ground
Reference Input
Reference Input
Data Input
Digital Data Output
Chip Select Input
Shift Clock
Positive Supply
19,20
AVec, DVce
Positive Supply
DESCRIPTION
The analog inputs must be free of noise with respect to AGND.
The analog inputs must be free of noise with respect to AGND.
The common pin defines the zero reference point for all single ended inputs. It
must be free of noise and is usually tied to the analog ground plane.
This is the ground for the internal logic. Tie to the ground plane.
Tie V- to most negative potential in the circuit. (Ground in single supply
applications.)
AGND should be tied directly to the analog ground plane.
The reference input must be kept free of noise with respect to AGND.
The reference input must be kept free of noise with respect to AGND.
The AID configuration word is shifted into this input.
The AID conversion result is shifted out of this output.
A logic low on this input enables the LTC1093/4.
This clock synchronizes the serial data transfer.
This supply must be kept free of noise and ripple by bypassing directly to the
analog ground plane.
This supply must be kept free of noise and ripple by bypassing directly to the
analog ground plane. AVec and DVcc should be tied together on the LTC1094.
BLOCK DIAGRAm (Pin numbers refer to LTC1094)
AVCC~
DOUT
CHO
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
10·BIT
SAR
10·BIT
CAPACITIVE
DAC
110
OGND
112
AGNO
9-35
LTC1091/LTC1092
LTC1093/LTC1094
TYPICAL PERFORmAnCE CHARACTERISTICS LTC1091-4
f·6
Change in Offset Error vs
Temperature
Change in Linearity Error vs
Temperature
8l
~ 0.6
Veel(VREF)~5V
elK = 500kHz -
Vee (VREF)=5V
ClK=500kHz
iii" 0.5
1£
tli
!
0.6
~
0.5
~
~ 0.3
0.3
u
~
t;;
~
~ 0.2
~ 0.2
~
0.1
'"'"
!:::
~
~
0
I"-'-
-~
-&
I'--..
~~
&
0
~
~
WO
AMBIENT TEMPERATURE, TA (OC)
1.
Digital Input Logic Threshold vs
Supply Voltage
-
J
TA 25 0 C
V
Jee =5~
j500
V
§
~
~
V V
;;:
/
d 400
300
Maximum Clock Rate vs Supply
Voltage
N
.ffi
i!l
'"
Maximum Clock Rate vs
Temperature
400
~
:;g
~100
6
r-
600
V
/'
~B FIRST1DATA
-
~~
0
-50 -25
0
25
50
75
100
125
AMBIENT TEMPERATURE, TA (OC)
Dour Delay Time vs Supply
Voltage
'"
4
0.1
Dour Delay Time vs Temperature
g
/
o
-
600
o
1
§g 0.4
:I:
~
I.
Vee (VREF)=5V
ClK=500kHz -
u.i
s;j 0.4
:l1
Change in Full Scale Errorvs
Temperature
-
0.5
a::
IE
r-- r-
t-- r--
r--
./"
/"
~io.15
V
~
tE
'"
~ 0.05
~
125
678
SUPPLY VOLTAGE, Vee (V)
'MAXIMUM ClK FREQUENCY REPRESENTS THE HIGHEST FREQUENCY AT WHICH ClK CAN BE
OPERATED (WITH ~% DUTY CYCLE) WHilE STill PROVIDING lOOns SETUP TIME FOR THE
OEVICE RECEIVING THE DOUT DATA.
9-36
/
III
u
-50 -25
0
25
50
75
100
AMBIENT TEMPERATURE, TA ('C)
0.1
10
'"
~
~
......
/
V
-50 -25
0
25
~ 75 100
AMBIENT TEMPERATURE, TA ('C)
125
"AS THE ClK FREQUENCY IS DECREASEO FROM 500kHz, MINIMUM ClK FREQUENCY
(.ol.ERROR:sO.llSB) REPRESENTS THE FREQUENCY AT WHICH A O.llSB SHIFT IN ANY CODE
TRANSITION FROM ITS 500kHz VALUE IS FIRST DETECTED.
LTC1091/LTC1092
LTC1093/LTC1094
TYPICAL PERFORmAnCE CHARACTERISTICS
Maximum Clock Rate vs Source
Resistance LTC1091-4
lOOk
N
:I:
~
VIN
i
~
Sample and Hold Acquisition
Time vs Source Resistance
LTC1091-4
Maximum Filter Resistor vs Cycle
Time LTC1091-4
10
~
CFILTER " 1.F-=!="
10
S' 10k
~
i
VI
~ O. 75 f---+1I+1+H+f---+-t++ftHj~H++ttHl
I
RSOURCE
~ 0.5
o
~
w
1k
::;;
i=
z
o
i=
~ 100
::;;
a
~
~
15
53
fE 0.25
'"
0 L-..LJL.L.1llllL-.L.J...LLll.UJ_.L.1...J...LLLW
10
100
~
lk
10
10k
0.1
100
~
ill
~
~
2:-
CLKJOOkHZ
~ 10 r-- TA=25°C
80
Linearity Error vs Supply Voltage
LTC1091
I
I
I
-
II
z
~
20
ffi
~o
)
~
;;;
V
o
-50
-25
0
25
50
75 100
AMBIENT TEMPERATURE, TA (0G)
0.25
!---0
125
4
Change in Full Scale Error vs
Supply Voltage LTC1091
5
6
7
8
9
SUPPLY VOLTAGE, Vee (V REF) (V)
Supply Current vs Supply Voltage
LTC1091
Supply Current vs Temperature
LTC1091
1.8
CLK=500kHz
j--GS=vee (VREF)
TA=25°C
CLk=500JHZ
TA=25°C
0.25
II
-r-
I--
&l
~
-
~w-
-0.25
~
-05
10
5
6
7
8
9
SUPPLY VOLTAGE, Vee (V REF) (V)
10
0.5
t-- l"-
t-..
V
/'
CLK1= 500JHz
1/
/
lL
'" ~
~~(~~EF)=5V
........
1'-... I'"-.
~.
r--
r--
./
2
;;;
~
10k
&l
~ 0.5
c(
W
lk
RSOUReE+ (Il)
100
~1~0.75
60
40
ul
z
:j
~
+
Vos=0.85mV@Vee(VREF)=5V
x
:I:
<.:>
V
~1.25
ON CIHANNE~ OR
OFF CHANNEL
~
I-
10k
Offset Error vs Supply Voltage
LTC1091
IX'
=>
<.:>
100
1000
CYCLE TIME, leye (~s)
10
RSOURCE (Il)
Input Channel Leakage Current vs
Temperature LTC1091/2
I-
VIN
:L
d
::;;
§
L
1
~
::;;
=>
~
!=ffft
Vee 5V
TA 25°C
o TO 5V INPUT STEP
+
o
-0.75
4
5
6
789
SUPPLY VOLTAGE, Vee (V REF) (V)
10
4
5
6
7
8
9
SUPPLY VOLTAGE, Vee (V REF) (V)
-AS THE ClK FREQUENCY AND SOURCE RESISTANCE ARE INCREASED, MAXIMUM CLK
FREQUENCY (IIERROR:
I
0.75
0.5
~
0.2
0.25
z
o
1,.,Q
5.0
REFERENCE VOLTAGE, VREf (V)
Noise Error vs Reference Voltage
LTC109213/4
LTC109213/4
~ 1.5
NOISE=200~V
0:
1
2
3
4
REFERENCE VOLTAGE, VREf (V)
I
II I
PEAK-TO-PEAK
1.0 _
~
I
VREf=4V
CLK=500kHz
1.0
&f
~
~0.75
~ 1.0
:z
ffi
r\
~075
~
~ 0.5
:z
\
~ 0.5
,,::
;:li
"-0.25
~
0.25
' -r-
4
Change in Full Scale Error vs
Supply Voltage LTC109213t4
0.5
VR~f=4V
...-
w
~
en
--'
~-O.25
z
_
--- -.....
V
6
7
B
SUPPLY VOLTAGE, Vee (V)
4
V
SUPPLY VOLTAGE, Vee (V)
V
1.2
/
;;;:
.s
4
B5 0.8
gj
~ 0.6
&
:::>
./
6
7
B
SUPPLY VOLTAGE, Vee (V)
1.0
..,:
10
,I
.........
~
J.
VREf OPEN
CLK=500kHz
CS=5V
Vee=5V
.........
""
""-
I--
""'-
en 0.4
o
10
--
Supply Current vs Temperature
LTC109213/4
V
'-'
678
VR:f OPEN I
CLK = 500kHz
CS=Vee
TA=25°C
~
-0.5
9-38
o
10
1.4
I
0.25
ffi
6
7
8
9
SUPPLY VOLTAGE, Vee (V)
Supply Current vs Supply Voltage
LTC109213/4
CLK=500kHz
!ii
0.25
o
0.2
1
5
REFERENCE VOLTAGE, VREf (V)
w
to
~
:>::
1
2
3
4
REFERENCE VOLTAGE, VREf (V)
1.25
I
VREf=4V
CLK = 500kHz
Vos=I.25mV@Vee=5V
w
2.
"
o
Linearity Error vs Supply Voltage
LTC109213/4
IE 1.25
&f
0.25
"'
o
o
1.25
II 1111
0.5
Offset Error vs Supply Voltage
LTC109213t4
2.0
~1.75
~
:::
~
~
Vos-O.5mV
075
en
\ .......
~
.....
~
~
~
I'"
1.0
II
8l
&l
\ Vos=lmV
Vee=5V
-I~
1.0
~!~
II
I
x
Vee=5V
10
0.2
-50
-25
0
25
50
75 100
AMBIENT TEMPERATURE, TA (OC)
125
LTC1091/LTC1092
LTC1093/LTC1094
TYPICAL PERFORmAnCE CHARACTERISTICS
Input Channel Leakage Current vs
Temperature LTC109314
Reference Current vs Temperature
LTC10921314
0.6
~ 0.5
1000
VREF~5V
- r--- r-- r--
i-
~ 0.4
L
:[900
GU~RANThD:::: r-
~ 800
ili 700
::0
'-'
w
ffi
600
1
~ 0.3
500
~ 400
'-'
w
'-'
~ 300
~ 0.2
1'5
it
f-
~
'" O. 1
ON CHANNELI
OFF CIANNEIS~
200
;;; 100
--
o
-~
0
~
~
~
100
AMBIENT TEMPERATURE. TA (0C)
-~
1~
Lv.
~
-50 -25 0
25
50
75
100
AMBIENT TEMPERATURE, TA (0C)
125
APPLICATions InFORmATion
The lTC1091-4 are data acquisition components which
contain the following functional blocks:
1.
2.
3.
4.
5.
10-bit successive approximation AID converter
Analog multiplexer (MUX)
Sample and hold (S/H)
Synchronous, half duplex serial interface
Control and timing logic
DIGITAL CONSIDERATIONS
1. Serial Interface
The lTC1 091 13/4 communicates with microprocessors and
other external circuitry via a synchronous, half duplex,
four wire serial interface while the lTC1092 uses a three
wire interface (see Operating Sequence). The clock (ClK)
synchronizes the data transfer with each bit being transmitted on the falling ClK edge and captured on the rising
ClK edge in both transmitting and receiving systems. The
lTC1091/3/4 first receives input data and then transmits
back the AID conversion result (half duplex). Because of
the half duplex operation, DIN and Dour may be tied together allowing transmission over just 3 wires: CS, ClK
and DATA (DINlDour).
Data transfer is initiated by a falling chip select (CS)
signal. After CS falls the lTC1 091 13/4 looks for a start bit.
After the start bit is received, a 3-bit input word (6-bits for
the lTC1093/4) is shifted into the DIN input which configures the lTC109113/4 and starts the conversion. After one
null bit, the result of the conversion is output on the Dour I
line. At the end of the data exchange CS should be
brought high. This resets the lTC1091/3/4 in preparation
for the next data exchange.
cslL-_ _ _ _ _nL-_ _ _ _ _n
CQ;;JJ
I I + 1.I~Dour1____j.1
_.
+
ShiftMUX.
Address in
1
Dour2
• ••
1Null Bit
Shift AID Conversion
Result Out
9-39
LTC1091/LTC1092
LTC1093/LTC1094
APPLICATions INFoRmATion
The lTC1092 does not require a configuration input word
and has no DIN pin. A falling CS initiates data transfer as
shown in the lTC1092 operating sequence. After CS falls,
the first ClK pulse enables Dour. After one null bit, the
AID conversion result is output on the Dour line. Bringing
CS high resets the lTC1092 for the next data exchange.
The lTC1091/3/4 clocks data into the DIN input on the rising edge of the clock. The input data words are defined as
follows:
2. Input Data Word
MUX
Address
The lTC1092 requires no DIN word. It is permanently configured to have asingle differential input and to operate in
unipolar mode. The conversion result is output on the
Dour line is MSB first sequence, followed by lSB sequence providing easy interface to MSB or lSB first serial
ports. The following discussion applies to the configuration of the lTC109113/4.
MUXAddress
LTC1091 Operating Sequence
Example: Dilferentiallnputs (CH1 +,CHO - )
MSB First Data (MSBF =1)
cs
-1-------------. --r-----------------------------------------------jL--1
cvc
CLK
Hi-Z
tSMPL-+-----I-~---
LSB First Data (MSBF =0)
1-1- - - - - - - - - - - - - . c v c - - - - - - - - - - - - - - - ! · I
csl~
______________________________________________
~r_-
__
--jL
CLK
000/
SIGN
START
o"LJLJTl . . . . . . . . .#N:t:9K~~~
SGLi
MSBF
OIFF
-----1--..,
Dour __.:::;HI":.,Z
9-40
LTC1091/LTC1092
LTC1093/LTC1094
APPLICATions INFoRmATion
LTC1092 Operating Sequence
-------------Ic'"
1-1
~----,
1
r·--------------·-------··-----·--··~
elK
OOUT_.:.::.;Hr.z;........,
tsMPl--l-~---tCONv----+_------tsMPL---------
LTC1093J4 Operating Sequence
Example: Differential Inputs (CH4 +,CH5 - ), Unipolar Mode
MSB First Data (MSBF = 1)
1
r----·-------------------------.---------.---.--rL-----I
~ ll-I- - - - - - - - - - - - - - - I c v c - - ClK
START
SEll
UNI
0INLJLJU..::.r---,:~=='777777I'777777I==='7!Z@ml1:tm;{grm~f~==='777771!'777777I'777777I==='777771!'777777I'777777I'777777I7J7JJ
SGLI 0001
OIFF SIGN
Dour
SElO
MSBF
-I---.
HI·Z
_--!!:;Hl-ZO--_ _ _
I'M"-+---I-_ _ __
LSB First Data (MSBF =0)
--------------Icvc--------------~I
__________________________~r_-·_-rL
1-1
~l~
ClK
START
SEll
UNI
:99Hf%~f~
OrNL.JLSL.fTl
. . . . . . . . .
SGLI 0001
SELD
MSBF
OIFF SIGN
_-+-----.
Dour _-=HI-Z,--_""",Hr..:;..·Z
I'MPL--t-----I----lOONv-------i
9-41
...
IWII
LTC1091/LTC1092
LTC1093/LTC1094
APPLICATions INFoRmATion
Start Bit
The first "logical one" clocked into the DIN input after CS
goes low is the start bit. The start bit initiates the data
transfer. The LTC109113/4 will ignore all leading zeros
which precede this logical one. After the start bit is received, the remaining bits of the input word will be clocked
in. Further inputs on the DIN pin are then ignored until the
next CS cycle.
given channel selection, the converter will measure the voltage between the two channels indicated by the + and signs in the selected row of the following tables. In single
ended mode, .all input channels are measured with respect
to GNDon the LTC1091 and COM on the LTC1093/4.
LTC1091 Channel Selection
MUXADDRESS
SGU
ODDI
DIFF
SIGN
1
0
1
1
0
0
0
1
Multiplexer (MUX) Address
The bits of the input word following the START bit assign
the MUX configuration for the requested conversion. For a
SGLI
DIFF
1
1
1
1
1
1
1
1
MUXADDRESS
SELECT
ODDI
SIGN
1
0
0
0
0
0
1
0
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
MUXADDRESS
ODDI SELECT
SIGN 1
0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
0
1
1
1
1
0
1
1
1
9-42
Dilferenlial MUX mode {
0
GND
1
-
+
+
+
-
+
LTC1094 Channel Selection
LTC1093 Channel Selection
SGU
DIFF
0
0
0
0
0
0
0
0
Single-ended MUX mode {
CHANNELl
DIFFERENTIAL CHANNEL SELECTION
0
1
+
-
2
+
3
4
+
5
-
NOT USED
-
+
-
+
-
+
NOT USED
SINGLE ENDED CHANNEL SELECTION
0
1
2
3
4
5
COM
-
+
-
+
+
NOT USED
-
+
-
+
+
NOT USED
-
SGU
DIFF
0
0
0
0
0
0
0
0
MUXADDRESS
ODDI SELECT
SIGN 1
0
0
0
0
0
0
1
1
0
0
1
1
0
1
0
0
1
0
1
1
1
0
1
1
1
DIFFERENTIAL CHANNEL SELECTION
0
+
-
1
2
3
+
-
-
4
5
+
-
6
7
+
-
-
+
+
-
+
-
+
SINGLE ENDED CHANNEL SELECTION
MUXADDRESS
SGLI ODDI SELECT
DIFF SIGN 1
0 0 1 2 3 4 5 6 7 COM
1
0
0
0 +
1
0
0
1
+
1
1
0
0
+
1
1
1
0
+
1
1
0
0
+
1
1
1
0
+
1
1
1
0
+
1
1
1
1
+
-
-
LTC1091/LTC1092
LTC1093/LTC1094
APPLICATions INFoRmATion
MSB First/LSB First (MSBF)
Unipolar Output Code (UNI =1)
The output data of the LTC1091/3/4 is programmed for
MSB first or LSB first sequence using the MSBF bit. When
the MSBF bit is a logical one, data will appear on the DOUT
line in MSB first format. Logical zeros will be filled in indefinitely following the last data bit to accommodate
longer word lengths required by some microprocessors.
When the MSBF bit is a logical zero, LSB first data will follow the normal MSB first data on the DOUT line. (See
operating sequence).
Unipolar/Bipolar (UNI)
The UNI bit of the LTC1093/4 determines whether the conversion will be unipolar or bipolar. When UNI is a logical
one, a unipolar conversion will be performed on the selected input voltage. When UNI is a logical zero, a bipolar
conversion will result. The input span and code assignment for each conversion type are shown in the figures
below.
The LTC109112 are permanently configured for unipolar
mode.
OUTPUT CODE
1111111111
1111111110
•
•
•
INPUT VOLTAGE
VREF -1LSB
VREF -2LSB
INPUT VOLTAGE
(VREF=5V)
4.9951V
4.9902V
·•
·•
•
0000000001
0000000000
1LSB
OV
•
0.0049V
OV
Bipolar Output Code (UNI =0) LTC1093/4 Only
OUTPUT CODE
0111111111
0111111110
INPUT VOLTAGE
VREF-1LSB
VREF -2LSB
•
•
•
•
•
•
INPUT VOLTAGE
(VREF= 5V)
4.9902V
4.9805V
•
·•
0000000001
0000000000
1111111111
1111111110
1LSB
OV
-1LSB
-2LSB
0.0098V
OV
-0.0098V
-0.0195V
1000000001
1000000000
-(VREF)+1LSB
-(VREF)
-4.9902V
-5.000V
·••
•
•
•
·•
·
Unipolar Transfer Curve (UNI =1)
1111111111
1111111110
0000000001
0000000000
L...L.-+--+--ty.---+-t-+-_ V,N
OV
1LSB
VREF-2LSB:
VREF
I
VREF-1LSB
=
Bipolar Transfer Curve (UNI 0) LTC1093/4 Only
0111111111
0111111110
0000000001
---I--+----'\r--t----1I--+-r-+--L+---1----'\r--+--+---+-- V,N
VREF-2LSBI
VREF
I
I
VREF-1LSB
1000000001
1000000000
9-43
LTC1091/LTC1092
LTC1093/LTC1094
APPLICATions INFoRmATion
3. Accommodating Microprocessors with Different Word
Lengths
4. Operation with DIN and DOUT Tied Together
The LTC1091/3/4 can be operated with DIN and DOUT tied
together. This eliminates one of the lines required to
communicate to the MPU. Data is transmitted in both
directions on a single wire. The processor pin connected
to this data line should be configurable as either an input
or an output. The LTC1091, for example, will take control
of the data line and drive it low on the 4th falling CLK edge
after the start bit is received (see Figure 2). Therefore the
processor port line must be switched to an input before
this happens, to avoid aconflict.
The LTC109113/4 will fill zeroes indefinitely after the trans·
mitted data until CS is brought high. At that time the DOUT
line is disabled. This makes interfacing easy to MPU serial
ports with different transfer increments including 4 bits
(e.g., COP400) and 8bits (e.g., SPI and MICROWIRE/PLUS).
Any word length can be accommodated by the correct
positioning of the start bit in the LTC1091 input word.
Figure 1 shows examples of LTC1091 input and output
words for 4·bit and 8·bit processors. A complete data ex·
change can be implemented with two 4·bit MPU outputs
and three inputs in 4·bit systems and one 8·bit output and
two inputs in 8·bit systems. The resulting data winds up
left justified in the MPU with zeroes automatically filled in
the unused low order bits by the LTC1091.ln section 5an·
other example is given using the MC68HC05C4 which
eliminates one 8·bit transfer and positions data right justi·
fied inside the MPU.
~~~
In the next section, an example is made of interfacing the
LTC1091 with DIN and DOUT tied together to the Intel 8051
MPU.
__________________________________________
~r
ClK
START
DIN _ _ _ _ _ _IrlSGl/lDDDI
I7/ff#'
L![JSIGN MS6F~ • • •
DOIlT----~--___.
Fill ZEROES
MPU SENDS
2 DIN WORDS
X=DON'T CARE
4-BIT [
TRANSFERS
MPU READS BACK
3 DOUTWORDS
MPU SENDS
1 DIN WORD
8-BIT [
TRANSFERS
MPU READS BACK
2 DOUTWORDS
I
START
61T
~~~: ~~g~
MSBF
69
68
67
6611 B5
B4
B3
B211 B1
60
D
o
68
67
66
64
B3
B211 B1
BO
0
0
I
X
I
69
B5
0
0
Figure 1. LTC1091lnput and Output Word Arrangements for 4-Bit and 8·Bit Serial Port Microprocessors
9-44
0
o
I
LTC1091/LTC1092
LTC1093/LTC1094
APPLICATions INFoRmATion
MSBF BIT
LATCHED
~l~___________________BY_u~r_OO1__________________
4
ClK
DATA (D,N/OOUT)
'iI
I
I
I
I
PROCESSOR
I
MUST RELEASE
:
DATA LINE AFTER 4TH---l
RISING ClK AND BEFORE
THE 4TH FALLING ClK
Figure 2. LTC1091 Operation with DIN and DOUT Tied Together
5. Microprocessor Interfaces
The LTC1091-4 can interface directly (without external
hardware) to most popular microprocessor (MPU) synchro·
nous serial formats (see Table 1). If an MPU without adedicated serial port is used, then 3or 4of the MPU's parallel
port lines can be programmed to form the serial link to the
LTC1091-4.lncluded here are one serial interface example
and one example showing a parallel port programmed to
form the serial interface.
Table 1. Microprocessors with Hardware Serial
Interfaces Compatible with the LTC1091-4
PART NUMBER
TYPE OF INTERFACE
Motorola
MC6805S2, S3
SPI
MC68HC11
SPI
MC68HC05
SPI
RCA
CDP68HC05
SPI
Hitachi
HD6305
SCI Synchronous
HD63705
SCI Synchronous
HD6301
SCI Synchronous
HD63701
SCI Synchronous
HD6303
SCI Synchronous
HD64180
CSIIO
National Semiconductor
COP400 Family
MICROWIREt
COP800 Family
MICROWIREIPLUSt
NS8050U
MICROWIREIPLUS
HPC16000 Family
MICROWIREIPLUS
Texas Instruments
TMS7002
Serial Port
TMS7042
Serial Port
TMS70C02
Serial Port
TMS70C42
Serial Port
TMS32011 ,
Serial Port
TMS32020
Serial Port
'Requires external hardware
tMICROWIRE and MICROWIREIPLUS are trademarks
of National Semiconductor Corp.
9-45
LTC1091/LTC1092
LTC1093/LTC1094
APPLICATions INFoRmATion
Motorola SPI (MC68HC05C4, MC68HC11)
The MC68HC05C4 has been chosen as an example of an
MPU with adedicated serial port. This MPU transfers data
MSB first and in 8-bit increments. With two 8-bit transfers,
the AID result is read into the MPU. The first a·bit transfer
sends the DIN word to the LTC1091 and clocks B9 and B8
of the AID conversion result into the processor. The sec·
ond a·bit transfer clocks the remaining bits, B7 through
BO, into the MPU.
ANDing the first MPU received byte with 03 Hex clears the
6 most significant bits. Notice how the position of the
start bit in the first MPU transmit word is used to position
the AID result right justified in two memory locations.
Data Exchange Between LTC1091 and MC68HCOSC4
START
BIT
BYTE 2 (DUMMY)
MPU TRANSMIT
WORD
________________________________
X=DON'T CARE
~~~
~r-
ClK
Dour - - - - - - - - - ,
MPU
RECEIVED WORD
BYTE 1
BYTE 2
1?111?1?1?I O IB9IBsl
I.
1STTRANSFER
.1
1~loolooIMI~I~I~lool
Hardware and Software Interface to Motorola MC68HCOSC4
Mlcroconlroller
lTC1091
r
ANALOG
INPUTS
'tt¢
.. ~
_
.
,"
.".
MC6SHC05C4
co
MOSI
9-46
MNEMONIC
BClRn
LDA
STA
LDA
MISO
DOUT from LTC1091 stored in MC68HC05C4 RAM
MSB
Location A
10 0 0 0 0 0 B9 Bal byte 1
LSB
Location A+1 B7 B6 B5 B4 B3 B2 B1 BO byte 2
I
LABEL
START
2ND TRANSFER
TST
BPl
SCK
-",;""
'Ililut
I.
I
STA
AND
STA
TST
BPL
BSETn
LDA
STA
·1
COMMENTS
Bit 0 Port Cgoes low (CS goes low)
Load LTCI090 DIN word into Acc.
Load LTCt 090 DIN word Into SPI from Acc.
Transfer begins.
Test status of SPIF
Loop to previous instruction if not done
with transfer
load contents of SPI data register
into Acc. (DOUT MSBs)
Start next SPI cycle
Clear 6 MSBs of first Dour word
Store in memory location A(MSBs)
Test status of SPIF
Loop to previous instruction if not done
with transfer
Set eo of Port C(CS goes high)
Load contents of SPI data register into
Acc. (DOUT LSBs)
Store in memory location A+1(lSBs)
LTC1091/LTC1092
LTC1093/LTC1094
APPLICATions INFoRmATion
Interfacing to the Parallel Port of the Intel 8051 Family
The Intel 8051 has been chosen to demonstrate the interface between the LTC1091 and parallel port microprocessors. Normally the CS, SCLK and DIN signals would be
generated on 3 port lines and the DOUT signal read on a4th
port line. This works very well. However, we will demonstrate here an interface with the DIN and DOUT of the
LTC1091 tied together as described in section 4. This
saves one wire.
The 8051 first sends the start bit and MUX address to the
LTC1091 over the data line connected to P1.2. Then P1.2 is
reconfigured as an input (by writing to it a one) and the
8051 reads back the 10-bit AID result over the same data
line.
ANALOG {
INPUTS
cs
P14
P1.3
P1.2
UC1Il!l1tJ~
-
DIN ...J
LABEL
LOOP 1
LOOP
8051
MUX ADDRESS
A/D RESULT
DOUT from LTC1091 stored in 8051 RAM
R2
R3
MNEMONIC
MOV
SETB
CLR
MOV
RLC
CLR
MOV
OPERAND
A,#FFH
P1.4
P1.4
R4,#04
A
P1.3
P1.2,C
SETB
DJNZ
MOV
CLR
MOV
MOV
RLC
SETB
CLR
DJNZ
MOV
MOV
SETB
CLR
CLR
RLC
P1.3
R4, LOOP 1
P1,#04
P1.3
R4,#09
C,P1.2
A
P1.3
P1.3
R4,LOOP
R2,A
C,P1.2
P1.3
P1.3
A
A
MOV
RRC
RRC
MOV
SETB
C,P1.2
A
A
R3,A
P1.4
COMMENTS
DIN word fo.!.!:TC1091
~ke sure CS is high
CSgoeslow
Load counter
Rotate DIN bit into Carry
SCLK goes low
Output DIN bit to
LTC1091
SCLK goes high
Next bit
Bit 2becomes an input
SCLK goes low
Load counter
Read data bit into Carry
Rotate data bit into Ace.
SCLK goes high
SCLK goes low
Next bit
Store MSBs in R2
Read data bit into Carry
SCLK goes high
SCLK goes low
Clear Ace.
Rotate data bit from
Carry to Acc.
Read data bit into Carry
Rotate right into Ace.
Rotate right into Acc.
Store LSBs in R3
CSgoeshigh
MS8
189 88 87 86 85 84 83 821
LS8
181 80 0 0 0 0 0 01
MSBF BIT lATCHED
~ ' \ ' -_ _ _ _ _ __NT_Ol+!C_10_91_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _~~
-
I
I 4
ClK
DATA (DIN/Dour)
BO
'-----~-----"I i'
8051 P1.2 OUTPUTS DATA
I I
TO LTC1091
: :
LTC1091 SENDS AID RESULT
BACK TO 8051 P1.2
8051 P1.2 RECONFIGURED
I I
AS AN INPUT AFTER THE 4TH RISING---I j.--LTC1091 TAKES CONTROL OF DATA
ClK AND BEFORE THE 4TH FALLING ClK
LINE ON 4TH FALLING ClK
.L7YD~
9-47
LTC1091/LTC1092
LTC1093/LTC1094
APPLICATions INFoRmATion
~
OUTPUT PORT
3 WIRE SERIAL
SERIAL DATAJ.--..1t.::....,----+-_----+-_----+_INTERFACETOOTHER
PERIPHERALS OR LTC1094s
MPU
8 CHANNELS
Figure 3. Several LTC1094s Sharing One 3Wire Serial Interface
Sharing the Serial Interface
The LTC1094 can share the same 2 or 3 wire serial inter·
face with other peripheral components or other LTC1094s
(see Figure 3). In this case, the CS signals decide which
LTC1094 is being addressed by the MPU.
ANALOG CONSIDERATIONS
1. Grounding
The LTC1091-4 should be used with an analog ground
plane and single pOint grounding techniques.
The AGND pin (GND on the LTC109112) should be tied
directly to this ground plane.
The DGND pin of the LTC 1093/4 can also be tied directly to
this ground plane because minimal digital noise is
generated within the chip itself.
Figure 4 shows an example of an ideal LTC1091 ground
plane design for a two sided board. Of course this much
ground plane will not always be possible, but users should
strive to get as close to this ideal as possible.
2. Bypassing
For good performance, Vee must be free of noise and rip·
pie. Any changes in the Vee voltage with respect to analog
ground during a conversion cycle can induce errors or
noise in the output code. Because the Vee (VREF) pin of the
LTC1091 defines the voltage span of the AiD converter, its
bypassing is especially important. Vee noise and ripple
can be kept below 1mV by bypassing the Vee pin directly
to the analog ground plane with a 4.7I'F tantalum with
leads as short as possible. AVee and DVee should be tied
together on the LTC1094. Figures 5 and 6 show the effects
of good and poor Vee bypassing.
The Vee pin should be bypassed to the ground plane with
a4.7I'F tantalum with leads as short as possible. AVee and
DVee should be tied together on the LTC1094. The V- pin
(LTC1093/4) should be bypassed with a0.11'F ceramic disk.
For single supply applications, V- can be tied to the
ground plane.
It is also recommended that the REF- pin and the COM
pin be tied directly to the ground plane. All analog inputs
should be referenced directly to the single point ground.
Digital inputs and outputs should be shielded from and/or
routed away from the reference and analog circuitry.
9-48
Figure 4. Example Ground Plane for the LTC1091
LTC1091/LTC1092
LTC1093/LTC1094
APPLICATions INFoRmATion
3. Analog Inputs
Because of the capacitive redistribution AID conversion
techniques used, the analog inputs of the lTG1091-4 have
capacitive switching input current spikes. These current
spikes settle quickly and do not cause a problem. However, if large source resistances are used or if slow settling op amps drive the inputs, care must be taken to
insure that the transients caused by the current spikes
settle completely before the conversion begins.
HORIZONTAL: 10,.s/OIV
Figure 5. Poor Vee Bypassing. Noise and Ripple Can Cause
AID Errors
Source Resistance
The analog inputs of the lTG1091-4 look like a 60pF
capacitor (GIN) is series with a 5000 resistor (RON) as
shown in Figure 7. GIN gets switched between the selected
"+" and" -" inputs once during each conversion cycle.
large external source resistors and capacitances will
slow the settling of the inputs. It is important that the overall RG time constants be short enough to allow the analog
inputs to completely settle within the allowed time.
"+" Input Settling
This input capacitor is switched onto the" +" input during
the sample phase (tSMPL, see Figure 8). The sample phase
is the 1 1/2 GlK cycles before the conversion starts. The
voltage on the" +" input must settle completely within
this sample time. Minimizing RSOURCE+ and G1 will improve the input settling time. If large" +" input source resistance must be used, the sample time can be increased
by using a slower GlK frequency. With the minimum
possible sample time of 3j.1s, RSOURCE+ <2k and C1 <20pF
will provide adequate settling.
HORIZONTAL: 10,.s/OIV
Figure 6. Good Vee Bypassing Keeps Noise and Ripple On Vcc
Below1mV
"+"
RSDURCE +
INPUT
Figure 7. Analog Input Equivalent Circuit
9-49
LTC1091/LTC1092
LTC1093/LTC1094
APPLICATions INFoRmATion
" - " Input Settling
Input Op Amps
At the end of the sample phase the input capacitor
switches to the" -" input and the conversion starts (see
Figure 8). During the conversion, the" +" input voltage is
effectively "held" by the sample and hold and will not af·
fect the conversion result. However, it is critical that the
" -" input voltage settle completely during the first ClK
cycle of the conversion time and be free of noise. Minimiz·
ing RSOURCE- and C2 will improve settling time. If large
" -" input source resistance must be used, the time al·
lowed for settling can be extended by using a slower ClK
frequency. At the maximum ClK rate of 500kHz,
RSOURCE- <1kO and C2<20pF will provide adequate
settling.
When driving the analog inputs with an op amp it is im·
portant that the op amp settle within the allowed time (see
Figure 8). Again, the II +" and" -" input sampling times
can be extended as described above to accommodate
slower op amps. Most op amps including the LT1006 and
LT1013 Single supply op amps, can be made to settle well
even with the minimum settling windows of 3J.!S (" +" input)
and 2j£s (" - " input) which occur at the maximum clock rate
of 500kHz. Figures 9 and 10 show examples of adequate
and poor op amp settling.
elK
DOUT--------------..r------~
r
"+"INPUT
"-"INPUT
l
----------------------------~~-------
Figure 8.
9-50
"+" and" - " Input Settling Windows
LTC1091/LTC1092
LTC1093/LTC1094
APPLICATions INFoRmATion
Input Leakage Current
HORIZONTAL: 1"s/OIV
Figure 9. Adequate Settling of Op Amp Driving Analog Input
Input leakage currents can also create errors if the source
resistance gets too large. For instance, the maximum in·
put leakage specification of 1J.1A (at 125°C) flowing
through a source resistance of 1kO will cause a voltage
drop of 1mV or 0.2lSB. This error will be much reduced
at lower temperatures because leakage drops rapidly
(see typical curve of Input Channel leakage Current vs
Temperature).
4. Sample and Hold
Single Ended Inputs
HORIZONTAL: 20"s/OIV
Figure 1O. Poor Op Amp Settling Can Cause AID Errors
The lTC1091, lTC1093 and lTC1094 provide a built·in sam·
pie and hold (S&H) function for signals acquired in the sin·
gle ended mode. This sample and hold allows conversion
of rapidly varying signals (see typical curve of S&H Ac·
quisition Time vs Source Resistance). The input voltage is
sampled during the tSMPL time as shown in Figure 8. The
sampling interval begins as the bit preceding the MSBF bit
is shifted in and continues until the falling ClK edge after
the MSBF bit is received. On this falling edge, the S&H
goes into hold mode and the conversion begins.
RC Input Filtering
It is possible to filter the inputs with an RC network as
shown in Figure 11. For large values of CF (e.g., 1J.1F), the
capacitive input switching currents are averaged into a
net DC current. Therefore, a filter should be chosen with a
small resistor and large capacitor to prevent DC drops
across the resistor. The magnitude of the DC current is ap·
proximately IDC 60pF xVIN/tcyc and is roughly propor·
tional to VIN. When running at the minimum cycle time of
32J.1s, the input current equals 9J.1A at VIN 5V.ln this case,
a filter resistor of 500 will cause 0.1 lSB of full·scale error.
If a larger filter resistor must be used, errors can be elim·
inated by increasing the cycle time as shown in the typical
curve of Maximum Filter Resistorvs CyCle Time.
=
=
Figure 11. RC Input Filtering
9-51
LTC1091/LTC1092
LTC1093/LTC1094
APPLICATions InFoRmATion
Differential Inputs
With differential inputs, the AID no longer converts just a
single voltage but rather the difference between two volt·
ages.ln this case, the voltage on the selected" +" input is
still sampled and held and therefore may be rapidly time
varying just as in single ended mode. However, the voltage
on the selected" -" input must remain constant and be
free of noise and ripple throughout the conversion time.
Otherwise, the differencing operation may not be per·
formed accurately. The conversion time is 10 ClK cycles.
Therefore, a change in the" -" input voltage during this
interval can cause conversion errors. For a sinusoidal volt·
age on the" - " input this error would be:
=
VERROR(MAX) VPEAKX 2X'7r Xf(" -") X10/fClK
2. Transients on the reference inputs caused by the
capacitive switching currents must settle completely
during each bit test (each ClK cycle). Figures 13 and 14
show examples of both adequate and poor settling. Us·
ing a slower ClK will allow more time for the reference
to settle. However, even at the maximum elK rate of
500kHz most references and op amps can be made to
settle within the 2ILs bit time.
3. It is recommended that the REF- input of the lTC1094
be tied directly to the analog ground plane. If REF- is
biased at avoltage other than ground, the voltage must
not change during a conversion cycle. This voltage
must also be free of noise and ripple with respect to
analog ground.
Where f(" -") is the frequency of the" -" input voltage,
VPEAK is its peak amplitude and fClK is the frequency of
the ClK. In most cases VERROR will not be significant. For
a 60Hz signal on the" - " input to generate a 1/4lSB error
(1.25mV) with the converter running at elK =500kHz, its
peak value would have to be 150mV.
Figure 12. Reference Input Equivalent Circuit
5. Reference Inputs
The voltage on the reference inputs of the lTC1091-4 de·
fines the voltage span of the AID converter. The reference
inputs look primarily like a 10k{l resistor but will have tran·
sient capacitive switching currents due to the switched
capacitor conversion technique (see Figure 12). During
each bit test of the conversion (every elK cycle), acapaci·
tive current spike will be generated on the reference pins
by the AID. These current spikes settle quickly and do not
cause a problem. However, if slow settling circuitry is
used to drive the reference inputs, care must be taken to
ensure that transients caused by these current spikes set·
tie completely during each bit test of the conversion.
HORIZONTAL: 1,.s/OlV
Figure 13. Adequate Reference Settling
When driving the reference inputs, three things should be
kept in mind:
1. The source resistance (ROUT) driving the reference in·
puts should be low (less than W) to prevent DC drops
caused by the 1mA maximum reference current (I REF).
9-52
HORIZONTAL:
1~s/DIV
Figure 14. Poor Reference Settling Can Cause AID Errors
LTC1091/LTC1092
LTC1093/LTC1094
APPLICATions InFoRmATion
6. Reduced Reference Operation
Noise with Reduced VREF
The minimum reference voltage of the LTC1091 is limited
to 4.5V because the Vee supply and reference are internally tied together. However, the LTC1092/3/4 can operate with reference voltages below 1V.
The total input referred noise of the LTC1092/3/4 can be reduced to approximately 200/LV peak-to-peak using a
ground plane, good bypassing, good layout techniques
and minimizing noise on the reference inputs. This noise
is inSignificant with a 5V reference but will become a
larger fraction of an LSB as the size of the LSB is reduced.
The typical curve of Noise Error vs Reference Voltage
shows the LSB contribution of this 200/LV of noise.
The effective resolution of the LTC1092/3/4 can be increased by reducing the input span of the converter. The
LTC1092/3/4 exhibits good linearity and gain over a wide
range of reference voltages (see typical curves of Linearity
and Full Scale Error vs Reference Voltage). However, care
must be taken when operating at low values of VREF because of the reduced LSB step size and the resulting
higher accuracy requirement placed on the converter. The
following factors must be considered when operating at
low VREF values.
1. Offset
2. Noise
3. Conversion speed (CLK frequency)
Offset with Reduced VREF
The offset of the LTC1092/3/4 has a larger effect on the
output code when the AID is operated with reduced reference voltage. The offset (which is typically afixed voltage)
becomes a larger fraction of an LSB as the size of the LSB
is reduced. The typical curve of Unadjusted Offset Error vs
Reference Voltage shows how offset in LSBs is related to
reference voltage for atypical value of Vas. For example, a
Vas of O.5mV which is O.1LSB with a 5V reference becomes O.5LSB with a 1V reference and 2.5LSBs with a0.2V
reference. If this offset is unacceptable, it can be corrected digitally by the receiving system or by offsetting
the" - " input to the LTC1092/3/4.
For operation with a 5V reference, the 200/LV noise is only
0.04LSB peak-to-peak. In this case, the LTC1092/3/4 noise
will contribute virtually no uncertainty to the output code.
However, for reduced references, the noise may become a
significant fraction of an LSB and cause undesirable jitter
in the output code. For example, with a 1V reference, this
same 200/LV noise is O.2LSB peak-to-peak. This will reduce
the range of input voltages over which a stable output
code can be achieved by O.2LSB. If the reference is further
reduced to 200mV, the 200/LV noise becomes equal to one
LSB and a stable code may be difficult to achieve. In this
case averaging readings may be necessary.
This noise data was taken in avery clean setup. Any setup
induced noise (noise or ripple on Vee, VREF, VIN or V-I will
add to the internal noise. The lower the reference voltage
to be used, the more critical it becomes to have a clean,
noise-free setup.
Conversion Speed with Reduced VREF
With reduced reference voltages, the LSB step size is reduced and the LTC1092/3/4 internal comparator overdrive
is reduced. Therefore, it may be necessary to reduce the
maximum CLK frequency when low values of VREF are
used.
9-53
LTC1091/LTC1092
LTC1093/LTC1094
TYPICAL APPLICATions
9V
LT1021-5
6 VOUT
VIN
8 J LT1025A
J TYPE
1N4148
20k
+
LTC1091A
)<
Veo
Clk
MCU
-,~
siIu
34k
178k
1%
01%
,~
O·C-500·C Furnace Exhaust Gas Temperature Monitor with Low Supply Detection
5V 4.7,F
'~-----1HL,::,
15k±10%
I .1.
.\l\fEiliH~---+
AVGIl<
D:I-----+---] ~ocu
~t----t--
5k@25°C
20°C-40°C
fiEf"
1!Ef-
9V
4.7pY- 5V
f - -- -i
1
LM134 OR OTHER
~1~/OKSENSOR
P
VOU]
h30
+-_;;;....._+-j 1
12260.
I
...-_ _ _ _
I
1
LTC1Q92
L- - --t -~ - - - I
1O,F
'~t------+-- ~cu
'$IlU<
115k
AGNIl
50000
¥~
45620
14910
'YSI 44007, 44034 OR EQUIVALENT
O·C-100·C O.25·C Accurate Thermistor Based Temperature
Measurement System
9-54
- 55·C to +125·C Thermometer Using Current Output
Silicon Sensors
LTC1091/LTC1092
LTC1093/LTC1094
TYPICAL APPLICATions
4N28s
C1
SCK
5.1k
(3)
CO
TO
68HC05""
8
ANALOG
INPUTS
0-5V RANGE
MOSI
TO ADDITIONAL
LTC1094s
10k
t-+--4I----IMISO
ISOLATION
BARRIER
""MC68HC05 CODE AVAILABLE FROM
LINEAR TECHNOLOGY
Micropower, 500V Opto Isolated, Multichannel, 10·Bit Data
Acquisition System is Accessed Once Every Two Seconds
9-55
LTC1091/LTC1092
LTC1093/LTC1094
PACKAGE DESCRIPTion Dimensions in inches (millimeters) unless otherwise noted.
J Package
J Package
Tjmax
150'C
100'CIW
NPackage
Tjrnax
110'C
150'CIW
8Lead Ceramic DIP
9 jA
9jA
NPackage
8Lead Plastic DIP
t
"OO:l
0
,
0300-0320
(7620-8128)1
'005
(10160)
MAX
'65
2
0250",0010
~0254)
3
4
=tj,ro
1:~~=:~65:1 ,::~::~;,
(i'65ij~-o
TVP
-...0009-0015
(0229-0381)
0325~~~~;
I-(~~~:~~~l-I
~
1(8255_
0 381)l
J Package
16 Lead Ceramic DIP
tJ
0045",0015
(1143,.0381)
0100.,0010
(2540 .. 0254)
j
MAX
L j
,oos-oo,"
0125
(0203-0460)
(3175)
M1N
~-
0100.,0010
(2540±0254)-
(9779±0635)
J Package
20 Lead Ceramic DIP
1
I
0220-0310
(5588-7874)
NPackage
20 Lead Plastic DIP
0025
(0535)
RADTYP
1
2
I
0005
l---(O 127)
M"
G1W
GlASS
(4054)
MAX a
S_
0015-000'
"38H~4)
~
_,"00
mmmrr~'
L(~:=~~!~)-I- 1J~,::, Jjll_':~:=::~IWI:::::::::1
I
~_
(3175)
MIN
MAX
O{l14-0025
0009-0015
---(0229-0381)
o325 ~~ ~~~
-(0356-0660)
(8 255
9-56
0125
(3175)
0200
(5080)
(737-613)
(9779",0635\
105M)
MIN
NPackage
16 Lead Plastic DIP
O~O-0320
~~ ~~~)
1
L
0005",0015
(1651=0381)-----
MIN
~
(0457",0076)
~7U1J~~----c-o-m-p-le-te-10-~-~i-~-~o-a:-:
Acquisition System with On Board Reference
FEATURES
DESCRIPTiOn
•
•
•
•
•
•
•
•
•
The LTC1095 is a complete data acquisition component
which contains aserial 110, successive approximation AID
converter, a6channel multiplexer, asample and hold, and
an on board reference. It uses LTCMOSTM switched capaci·
tor technology to perform either 10 bit unipolar, or 9 bit
plus sign bipolar AID conversions. The 6 channel input
multiplexer can be software configured for either single
ended or differential inputs (or combinations thereoij. The
on chip sample and hold is included for all single ended in·
put channels. The LTC1095 is specified as a complete
system. This specification includes the error contribution
of the AID, MUX, S&H, and reference.
On Board 5V Precision Buried Zener Reference
Software Controlled 6Channel Multiplexer
Differential and Single Ended Input Capability
Built·ln Sample and Hold for Single Ended Inputs
Analog Inputs Common Mode to Both Supply Rails
Single Supply (7.2V to 4OV) or Split Supply Operation
10 Bit Unipolar or 9Bit Plus Sign Bipolar
2's Complement Output Coding on Bipolar Conversions
Direct Interface to Most Microprocessor Serial Data
Ports Including Mortorola SPI, Hitachi SCI and National
MICROWIREIPLUS'
• Software Interface to Other Microprocessor Parallel
Ports
• MSB or LSB First Data
KEY SPECIFICATiOnS
•
•
•
•
•
•
•
10 Bits
Resolution
±0.5LSB (0.05% FSR) Max
Linearity Error
±0.15% FSR
Total Unadjusted Error
Conversion Time
20"s
25kH2
Sampling Rate
4.7mA Max, 2.3mA Typ
Supply Current
Full Scale Error Temperature
23ppm/oC Max
Drift (B Grade)
'MICROWIREIPLUS is a trademark of National Semiconductor.
The serial 110 is designed to be compatible with industry
standard serial interfaces. It allows either MSB or LSB
first data and automatically provides 2's complement out·
put coding in the bipolar mode. This allows easy interface
to shift registers and avariety of processors.
All grades of the LTC1095 have guaranteed maximum off·
set and linearity errors of ±0.5LSB over the full operating
temperature range. The LTC1095B is specified with gain
error less than ± 0.1 %maximum.
The LTC1095C is specified with again error limit of ± 0.2%
FSR maximum.
•
TYPICAL APPLICATiOnS
Micropower, 500V Opto Isolated, Multichannel, 10·Bil Data Acquisition System
"
'OK
"
68HCOS o •
•
ANAlOG
INPUTS
G-5VRAHGE
MOSI
"SEETYPICAlAPPUCATIONS
fORMC68HC05CODt
9-57
LTC1095
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
(Notes 1and 2)
Supply Voltage (V+) to GND ........•....•.•....•....40V
Supply Voltage (Vee) to GND or V- ..................12V
Negative Supply Voltage (V-) ............... - 6V to GND
Voltage
Analog and Reference Inputs .. (V-) - 0.3V to Vee +0.3V
Digital Inputs ........................... - 0.3V to 12V
Digital Outputs ......•....•....... - 0.3V to Vee +0.3V
Power Dissipation .............................. 500mW
Operating Temperature Range
LTC1095BC, LTC1095CC .................. OOC to 70°C
LTC1095BM, LTC1095CM ............. - 55°C to 125°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 3QOoC
ORDER PART
NUMBER
TOP VIEW
LTC1095BMJ
LTC1095CMJ
LTC1095BCJ
LTC1095CCJ
LTC1095BCN
LTC1095CCN
J PACKAGE
l8·LEAD CERAMIC DIP
N PACKAGE
l8·LEAD PLASTIC DIP
conVERTER AnD mULTIPLEXER CHARACTERISTICS (Note 3)
(With internal reference)
CONDITIONS
PARAMETER
Offset Error
Linearity Error
Gain Error
Total Unadjusted Error
Full Scale Error
Temperature Coefficient
9-58
(See Schematic of Figure 1)
(Notes 4and 5)
(Note 4)
Commercial Range
Military Range
(Notes 4and 6)
Commercial Range
Military Range
Commercial Grade
Military Grade
(Note 10)
•
•
•
•
•
•
•
•
MIN
LTC109SB
TYP
MAX
±0.5
±0.5
±0.1
±0.15
±0.2
±0.15
±0.2
±0.25
(Note 9)
23
MIN
LTC109SC
TYP
MAX
±0.5
±0.5
±0.2
±0.3
±0.4
±0.25
±0.35
±0.45
(Note 9)
45
UNITS
LSB
%FSR
%FSR
ppm/oC
LTC1095
InTERnAL REFEREnCE CHARACTERISTICS (Note 3)
PARAMETER
Output Voltage
Output Voltage Temperature
Coefficient
Line Regulation
CONDITIONS
MIN
7.2V sV+ s 10V
10VsV+ s40V
Load Regulation
(Sourcing Current)
Load Regulation
(Sinking Current)
OSilREFOUTIs10mA
OsllREFOUTI s10mA
LTC1095B
TYP
MAX
5.000
2
4
•
•
2
•
•
10
60
12
20
6
10
25
40
150
200
MIN
LTC1095C
TYP
MAX
5.000
5
4
2
10
60
12
20
6
10
25
40
150
200
UNITS
V
ppm/oC
ppmlV
ppm/mA
DIGITAL AnD DC ELECTRICAL CHARACTERISTICS (Note 3)
SYMBOL
VIH
VIL
IIH
IlL
VOH
PARAMETER
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
High Level Output Voltage
CONDITIONS
Vcc=5.25V
Vcc=4.75V
VIN = Vcc
VIN=OV
Vcc=4.7SV, lo=10~A
lo=360~A
VOL
loz
Low Level Output Voltage
Hi·Z Output Leakage
ISOURCE
ISINK
Icc
IREFIN
11+
Output Source Current
Output Sink Current
Positive Supply Current
Reference Input Current
Negative Supply Current
On Chip Reference Current
Reference Input Resistance
Analog and REF Input Range
On Channel Leakage
Current (Note 8)
Off Channel Leakage
Current (Note 8)
Vcc=4.7SV,lo=1.6mA
VOUT= Vcc~S High
VOUT=OV, CS High
VOUT=OV
VOUT= Vec
CS High, REF+ Open
REF IN =5V
CS High
V+ = 10V REFoUT Open
(Note 7)
On Channel = SV
Off Channel = OV
On Channel = OV
Off Channel = SV
On Channel = SV
Off Channel = OV
On Channel = OV
Off Channel = SV
•
•
•
•
•
•
•
•
•
•
•
•
LTC1095B/LTC1095C
MIN
TYP
MAX
2.0
0.8
2.5
-2.5
4.7
2.4
4.0
0.4
3
-3
-10
10
1.0
2.S
0.5
1.0
1
SO
0.8
1.2
10
(V-) - 0.05V to Vec +O.OSV
•
1
•
•
-1
•
1
-1
UNITS
V
V
~A
~A
V
V
V
~A
~A
rnA
rnA
rnA
rnA
~A
rnA
kG
V
~A
~
9-59
LTC1095
AC CHARACTERISTICS (Note 3)
SYMBOL
tSMPl
tCONV
~oo
tdis
Iso
thOO
tf
t,
CIN
PARAMETER
Analog Input Sample Time
Conversion Time
Delay Time, ClKI to Dour Data Valid
Delay Time, CSt to DOUT Hi·Z
Delay Time, ClKI to DOUT Enabled
Time Output Data Remains Valid After ClKI
DOUT Fall Time
DouT Rise Time
Input Capacitance
CONDITIONS
See Operating Sequence
See Operating Sequence
See Parameter Measurement Section
See Parameter Measurement Section
See Parameter Measurement Section
See Parameter Measurement Section
See Parameter Measurement Section
Analog Inputs On Channel
Off Channel
Digital Inputs
Note 1: Absolute maximum ratings are those values beyond which the life
of adevice may be impaired.
Note 2: All voltage values are with respect to ground with DGND, AGND,
and REF- wired together (unless otherwise noted).
Note3: Vee =5V, REF IN = REFoUT' V+ = 10V,IREFOUT=O, V- =OVforuni·
polar mode and - 5V for bipolar mode, ClK = 0.5MHz unless otherwise
specified. The • indicates specs which apply over the full operating tem·
perature range; all other limits and typicals TA = 25°C.
Note 4: These specs apply for both unipolar and bipolar modes. In bipolar
mode, one LSB is equal to the bipolar input span (2REFIN) divided by 1024.
For example, when REFIN = 5V, 1lSB (bipolar) = 2(5V)/l024 = 9.77mV.
Note 5: Linearity error is specified between the actual end pOints of the AID
transfer curve.
Note6: Total unadjusted error includes offset, full scale, linearity, multi·
plexer, reference and hold step errors.
Note 7: Two on-chip diodes are tied to each reference and analog input
which will conduct for reference or analog input voltages one diode drop
•
•
•
•
•
lTC1095B/lTC109SC
MIN TYP MAX
1.5
10
400 850
180 450
180 450
150
90
300
60
300
65
5
5
UNITS
ClKCycles
ClKCycles
ns
ns
ns
ns
ns
ns
pF
pF
pF
below V- or one diode drop above Vee. Be careful during testing at low Vee
levels (4.5V), as high level reference or analog inputs (5V) can cause this in·
put diode to conduct, especially at elevated temperatures, and cause errors
for inputs near full·scale. This spec allows 50mV forward bias of either
diode. This means that as long as the reference or analog input does not ex·
ceed the supply voltage by more than 5OmV, the output code will be correct.
To achieve an absolute OV to 5V input voltage range will therefore require a
minimum supply voltage of 4.950V over initial tolerance, temperature varia·
tions and loading.
Note 8: Channel leakage current is measured after the channel selection.
Note 9: For commercial grade parts with tested and specified IC. consult
the factory.
Note 10: This is specified for both unipolar and bipolar modes via the
"box" method. The lowest of three readings (TMIN, TROOM, TMAXl subtracted
from the highest and divided by TMAX - TMIN is guaranteed to be less than
the specified IC. These numbers are guaranteed by the Mil range gain er·
ror test limits. FortighterlC. specifications, consult the factory.
REcommEnDED OPERATinG conDIT,lons
SYMBOL
Vee
VfClK
tCYC
thO!
isucs
tsuDI
tWHClK
tWlCLK
tWHCS
tWlCS
9·60
PARAMETER
Supply Voltage
Negative Supply Voltage
Clock Frequency
Total Cycle Time
Hold Time, DIN After SClKI
SetupTimeCSI BeforeClK!
Setup Time, DIN Stable Before ClK!
ClK High Time
ClKlowTime
CS High Time Between Data Transfer Cycles
CS low Time During Data Transfer
CONDITIONS
Vee=SV
Vee=SV
Vee=5V
Vcc=SV
Vcc=5V
Vee=SV
Vee=SV
Vee=SV
lTC1095B/LTC1095C
MIN
MAX
4.S
10
-S.S
0
0.01
O.S
18 ClK Cycles +2~s
150
1
400
0.8
1
2
18
UNITS
V
V
MHz
ns
~s
ns
~
~
~s
ClKCycles
LTC1095
TEST CIRCUITS
On and Off Channel Leakage Current
Load Circuit for tdDO, tr, and tf
I.4V
5V
3kll
DOUT
TEST POINT
':t'100PF
Voltage Waveforms for DOUT Rise and Fall Times, tl'! tf
DOUT£1E--2.4V
- - - O.4V
Voltage Waveforms for DOUT Delay Time, tdDO
ClK
--t
r
-tf
~Fo.;.;8V~_ _ _ __
i=tdOO~
Voltage Waveforms for tdis
=""""''''''''''=2.4V
F;"='=';:;';;;;';;;O.4V
DOUT
DOUT ------------+~
WAVEFORM 1
(SEE NOTE 1)
Load Circuit for tdis and ten
TEST
POINT
DOUT
WAVEFORM 2
(SEE NOTE 2)
5V
--------------'1
tdlS WAVEFORM 2, ten
NOTE 1. WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH THAT
THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL.
DOUTt--+-'W.....- "
tdlS WAVEFORM 1
NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONOITIONS SUCH THAT
THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL.
Voltage Waveforms for ten
~~~----------------------------------------------DIN
~~_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ ___
CLK
DOUT
9-61
LTC1095
Pin FunCTions
LTC1095 II
1-6
7
PIN
CHO-CH5
COM
FUNCTION
Analog Inputs
Common
8
DGND
V-
Digital Ground
Negative Supply
V+
REFoUT
AGND
REFIN
DIN
Reference Supply
Reference Output
Analog Ground
Reference Input
Data Input
Digital Data Output
Chip Select Input
Shift Clock
Positive Supply
9
10
11
12
13
14
15
16
17
18
gr
CLK
Vee
DESCRIPTION
The analog inputs must be free of noise with respect to AGND.
The common pin defines the zero reference pOint for all single ended inputs. It
must be free of noise and is usually tied to the analog ground plane.
This is the ground for the internal logic. Tie to the ground plane.
Tie V-to most negative potential in the circuit. (Ground in single supply
applications.)
Supply pin for on board reference.
Output of on board reference.
AGND should be tied directly to the analog ground plane.
The reference input must be kept free of noise with respect to AGND.
The AID configuration word Is shifted into this input.
The AID conversion result is shifted out of this output.
Alogic low on this input enables the LTC1095.
This clock synchronizes the serial data transfer.
This supply must be kept free of noise and ripple by bypassing directly to the
analog ground plane.
BLOCK DIAGRAm
Dour
CHO
CHl
CH2
CH3
CH4
CH5
COM
la-BIT
SAR
l()'BIT
CAPACITIVE
OAC
112
CONTROL
AND
TIMING
AGND
v+
9-62
10
5V
REFERENCE
REFoUT
16 CS
LTC1095
TYPICAL PERFORmAnCE CHARACTERISTICS
Change in Offset Error vs
Temperature
_ 0.6
III
~
~
~ 0.5
z
;::. 0.5
~
w
~
w
~ 0.4
«
~ 0.3 ~-+-+-+--!-7I""-+-::::;;;I
1il
~
~
~ 0.2 ~-+-"'o.,d--+--Ir~+-+--l
~ 0.2
z
0.2
~
:::;
u-
w
Q
E
--
~ 0.1
~ 0.1
""'- r-.
~ ~SO
:--!--
~
-a
0
a
50
100
AMBIENT TEMPERATURE, TA (OC)
la
Q
::>
~
~
-
~
0
-so -25
0
25
50
75 100
AMBIENT TEMPERATURE, TA (~C)
:2
Digital Input Logic Threshold vs
Vee Supply Voltage
Vee=5~
1-
TA=25'C
V
/
o
4
125
~ 0.1 f-.:::>;o...,..-j-4H'F-l--+-+--f
z
~
-25
0
25
50
75 100
AMBIENT TEMPERATURE, TA ('C)
7
:/
,/'
-"B FIRST DATA
/
1
6
7
8
SUPPLY VOLTAGE, Vee (V)
E. 500
j
~ 400
= 200
~ 100
'""
~
~;: -
~
-
lSB FIRST DATA
§
Q
o
125
4
678
SUPPLY VOLTAGE, Vee (V)
10
Minimum Clock Rate vs
Temperature
Maximum Clock Rate vs Vee
Supply Voltage
TA~25'C
Jee=5~
TA=~5'C
Q
-50 -25
0
25
50
75
100
AMBIENTTEMPERATURE, TA ('C)
10
600
/'"
~:: -
----
/
/'
:/
125
Dour Delay Time vs Vee Supply
Voltage
Dour Delay Time vs Temperature
600
/
f--+--j--+--l--+-+--f
i3
~ 0.3
'-'
0.3
r--r-,--,---,--,.--,--,
Vee=5V
~
ClK = 500kHz
-
2.0
ffi>-
2.0
1.5
filfE
1.5
::>
i
'"
d
::E 1.0
::E
::>
x
:li
-
r-- ,...
r-- r-- r--
d
::E 1.0
::>
::E
x
'Vi 0.20
'"
liE
V
V
~0.15
/'
~
as
i:5
~ 0.5
0.5
'-'
::E
::>
- 50 -25
0
25
50
75
100
AMBIENT TEMPERATURE, TA('C)
125
678
SUPPLY VOLTAGE, Vee (V)
"MAXIMUM ClK FREQUENCY REPRESENTS THE HIGHEST FREQUENCY AT WHICH ClK CAN BE
OPERATED (WITH 50% DUTY CYCLE) WHilE STill PROVIDING lOOns SETUP TIME FOR THE
DEVICE RECEIVING THE DOUT DATA.
10
~
:;;
0.1
0.05
/
/
/
-50 -25
0
25
50
75
100
AMBIENT TEMPERATURE, TA (OC)
125
•• AS THE ClK FREQUENCY IS DECREASED FROM 500kHz, MINIMUM ClK FREQUENCY
(AERROR !SO.llSB) REPRESENTS THE FREQUENCY AT WHICH A 0.1 lSB SHIFT IN ANY CODE
TRANSITION FROM ITS 500kHz VALUE IS FIRST DETECTED.
9-63
•
LTC1095
TYPICAL PERFORmAnCE CHARACTERISTICS
Maximum Clock Rate vs Source
Resistance
Sample and Hold Acquisition
Time vs Source Resistance
Maximum Filter Resistor vs Cycle
Time
10
I=I=tft
VCC -5V
TA 25°C
o TO 5V INPUT STEP
i
~ 1.0
1--I-H-!+H!+--HIo.H-H-ftI----l---t-++t-l1jJ
ci
VI
13 0.75 1--+-1-H+Htf---+-If+t+H+I++--+-++H1tl
I
/"
RSOURCE
~
VIN
til
e: 0.25
":l
<>
~
'"
~
0 L--L.l-LJ..LlllL-.L..l...LLWlI_L..L..LWLLW
100
1k
10k
10
RSOURCE (Il)
10L-.L..l..LW~~~~~~~~
10
100
1000
CYCLE TIME, tCYC ("s)
10
1.25
~x
-I~
II
~
II
~
0.75
lE
ffi
u..
"
o
;;!;
~
"<>
1
2
3
4
REFERENCE VOLTAGE, REF IN (V)
.11
REFIN=4V
1.0
ClK=5OOkHz
1.0
&i'
Vas=1.25mV@Vcc=5V
~
13 0.75
i
IE
1£
o
z
~
~ 0.5
t;:; 0.5
:::;
0.25
"- t-
1
2
4
REFERENCE VOLTAGE, REFIN (V)
REFIN~4V
1
r- ClK = 500kHz
"'-0.75
0.2
1
5
REFERENCE VOLTAGE, REFIN (V)
\
o
Linearity Error vs Supply Voltage
CJ)
\
o
1.25
&i'
r-..
0.25
Offset Errorvs Supply Voltage
PEAK-TO-PEAK
11.25
0.5
~
~
1.25
II II
1111
NOISE=2oo~V
\
0.25
:::;
0.2
1.0
5.0
REFERENCE VOLTAGE, REF IN (V)
~1.75
VCC~5V
1.0
~
u
~
i
=>
i
6
7
8
SUPPLY VOLTAGE, Vee (V)
o
-~
500
~ 300
ON CHANNELI
0
m
~
~
roo 1m
OFF CrANNEIS~
100
................
I--£!oK =GND
CS=GND
-50
! '----~
~ 1.00
'-
~
.- ~
AMBIENT TEMPERATURE, TA (OC)
-25 0
25
~
75
100
AMBIENTTEMPERATURE, TA (OC)
125
J J
>-'
z
-m
~
i+,2.00
g§ 700
=>
~
I"--
-25
0
25
50
75 100
AMBIENT TEMPERATURE, TA (OC)
3.00
GU~RANT~ED :::: -
800
~ 200
r--- "-
V+ Supply Current YS
Temperature
u
w 600
~
........
'--
0.6
0.2
-50
10
/'
~ 900
ffi
'"i'..
0.8
Input Channel Leakage Current YS
Temperature
:I:
U
0.1
1.0
I
I
REFIN OPEN
CLK=500kHz
CS=5V
Vee=5V
en 0.4
cd 400
~ 0.2
i
«
§.
u
1000
I
f---
----
4
Reference Current YS Temperature
~
V
V
u
j
V
1.2
./
-0.5
0.5
1.4
RE~IN OPE~
:I:
!
Vee Supply Current YS
Temperature
125
r--
-
REF OUT DRIVING
REFIN AND
i-...POWERING/ee
r:tI---
REF OUT DRIVING
REFIN
T---
-
RrOUTrEN=
o
-50
-25
0
25
50
75
100
AMBIENTTEMPERATURE, TA (OC)
125
Change in Full Scale Error vs V+
Supply Voltage
V+ Supply Current vs Supply
Voltage
~ 0.6
225
2.00
CLK=GND
CS=GND
i+,1.75
~
REF OUT DRIVING
REFIN ANO
POWERI NG lee
.,; 0.5
':!;
w
'" 0.4
~
13
~.
~ 150
~ 0.3
REFluT DRIVING
REF IN
!S
u
~ 1.25
=>
U)
U)
-'
~ 0.2
I
100
§
10
15
20
25
30
SUPPLY VOLTAGE, V+ (V)
35
0.1
REI+A/~ \
to:
REF OUT JPEN
z
~
0.75
5
tEF °INLY
~
o
40
:;;
o
o
1\
10
15 20 25 30
SUPPLY VOLTAGE, V+ (V)
35
40
9-65
LTC1095
APPLICATions InFoRmATion
The lTC1095 is a data acquisition component which contains the following functional blocks:
1.
2.
3.
4.
5.
6.
10-bit successive approximation AID converter
Analog multiplexer (MUX)
Sample and hold (S&H)
Synchronous, half duplex serial interface
Control and timing logic
On board reference
2. Input Data Word
The lTC1095 clocks data into the DIN input on the rising
edge of the clock. The input data word is defined as follows:
Unipolar!
Bipolar
MUXAddress
DIGITAL CONSIDERATIONS
MSBFirstl
LSB First
1. Serial Interface
The lTC1095 communicates with microprocessors and
other external circuitry via a synchronous, half duplex,
four wire serial interface (see Operating Sequence). The
clock (ClK) synchronizes the data transfer with each bit
being transmitted on the falling ClK edge and captured on
the rising ClK edge in both transmitting and receiving systems. The lTC1095 first receives input data and then
transmits back the AID conversion result (half duplex). Because of the half duplex operation, DIN and Dour may be
tied together allowing transmission over just 3 wires: CS,
ClK and DATA (DINIDour).
Data transfer is initiated by a falling chip select (CS)
signal. After CS falls the lTC1095 looks for a start bit. After the start bit is received, a6-bit input word is shifted into
the DIN input which configures the lTC1095 and starts the
conversion. After one null bit, the result of the conversion
is output on the Dour line. At the end of the data exchange
CS should be brought high. This resets the lTC1095 in
preparation for the next data exchange.
~
J
U
ShiftMUX _ .
Address in
t
1 Null Bit
9-66
n
n
~l
~
DOUT1
t
I
~I
Shift AID Conversion
Result Out
IL.:D""'OUTL::.2_---"
Start Bit
The first "logical one" clocked into the DIN input after CS
goes low is the start bit. The start bit initiates the data
transfer. The lTC1095 will ignore all leading zeros which
precede this logical one. After the start bit is received, the
remaining bits of the input word will be clocked in. Further
inputs on the DIN pin are then ignored until the next CS
cycle.
LTC1095
APPLICATions InFoRmATion
Multiplexer (MUX) Address
The bits of the input word following the START bit assign
the MUX configuration for the requested conversion. For a
given channel selection, the converter will measure the
voltage between the two channels indicated by the + and
- signs in the selected row of the following tables. In single ended mode, all input channels are measured with respect to COM.
LTC1095 Channel Selection
SGU
OIFF
0
0
0
0
0
0
0
0
MUXAOORESS
0001
SELECT
SIGN
1
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
0
1
0
1
1
1
0
1
1
1
DIFFERENTIAL CHANNEL SELECTION
0
1
+
-
2
3
+
-
4
5
+
-
-
+
NOT USED
-
+
-
+
NOT USED
SGU
DIFF
1
1
1
1
1
1
1
1
MUXAOORESS
0001 SELECT
SIGN 1
0
0
0
0
1
0
0
1
0
0
1
1
0
0
0
1
1
0
1
1
1
0
1
1
1
SINGLE ENDED CHANNEL SELECTION
0
1
2
3
4
COM
5
-
+
-
+
-
+
NOT USED
-
+
-
+
-
+
NOT USED
MSB First/LSB First (MSBF)
The output data of the LTC1095 is programmed for MSB
first or LSB first sequence using the MSBF bit. When the
MSBF bit is a logical one, data will appear on the DOUT line
in MSB first format. Logical zeros will be filled in indefinitely following the last data bit to accommodate longer
word lengths required by some microprocessors. When
the MSBF bit is a logical zero, LSB first data will follow the
normal MSB first data on the DOUT line. (See operating
sequence).
LTC1095 Operating Sequence
Example: Diflerentiallnputs (CH4 +,CH5 - ), Unipolar Mode
=
MSB First Data (MSBF 1)
--------------tcvc-------------r-I~I
~l~
______________________________________________________1
~
ClK
HI-Z
tsMPL+--+----
LSB First Data (MSBF =0)
1-1--------------tcvc-------------~·I
~l~
______________________________________________________1L
ClK
START
SEL1
UNI
DINL..f""L..-.JlJT
SGll 0001
SELD
OIFF SIGN
DOUT _ _--.:::;:H>Z=--_ _..:::HI~·Z_ _
~:99riI%Kf.nf• • • •f!~
MSBF
-1----.
tSMPL-1-----J.----tCONV---~
9-67
LTC1095
APPLICATions InFoRmATion
=
Unipolar/Bipolar (UNI)
Bipolar Output Code (UNI 0)
The UNI bit of the LTC1095 determines whether the conver·
sion will be unipolar or bipolar. When UNI is a logical one, a
unipolar conversion will be performed on the selected input
voltage. When UNI is a logical zero, abipolar conversion will
result. The input span and code assignment for each con·
version type are shown in the figures below.
=
Unipolar Output Code (UNI 1)
OUTPUT CODE
1111111111
1111111110
•
•
·
0000000001
0000000000
INPUT VOLTAGE
REF 1N -1LSB
REF1N -2LSB
INPUT VOLTAGE
(REF1N =5V)
4.9951V
4.9902V
1LSB
OV
0.0049V
OV
•
•
•
•
•
•
OUTPUT CODE
0111111111
0111111110
INPUT VOLTAGE
REF 1N -1LSB
REF 1N -2LSB
·•
·•
•
•
0000000001
0000000000
1111111111
1111111110
1LSB
OV
-lLSB
-2LSB
·
1000000001
1000000000
•
•
·•
- (REF1Nl+ 1LSB
-(REF1N)
Unipolar Transfer Curve (UNI =1)
1111111111
1111111110
0000000001
0000000 0 0 0
L..L.-+--+---"v--+-+--+-_ VIN
OV
1LSB
REFIN-2LSB:
REF IN
I
REFIN-1LSB
Bipolar Transfer Curve (UNI =0)
0111111111
0111111110
.. VIN
---+__-+----'\r--+__-+--+...,...,t-L+--+---"v~-+___+_-+--
1000000001
1000000000
9-68
•
•
•
0.OO98V
OV
-O.OO98V
-O.Ol95V
•
•
•
INPUT VOLTAGE
(REFIN= 5V)
4.9902V
4.9805V
·
-4.9902V
-5.000V
LTC1095
APPLICATions InFoRmATion
3. Accommodating Microprocessors with Different Word
Lengths
4. Operation with DIN and DOUT Tied Together
The lTC1095 can be operated with DIN and Dour tied to·
gether. This eliminates one of the lines required to
communicate to the MPU. Data is transmitted in both
directions on a single wire. The processor pin connected
to this data line should be configurable as either an input
or an output. The lTC1095 will take control of the data line
and drive it low on the 7th falling ClK edge after the start
bit is received (see Figure 2). Therefore the processor port
line must be switched to an input before this happens, to
avoid aconflict.
The LTC1095 will fill zeroes indefinitely after the transmit·
ted data until CS is brought high. At that time the Dour line
is disabled. This makes interfacing easy to MPU serial
ports with different transfer increments including 4 bits
(e.g., COP400) and abits (e.g., SPI and MICROWIRElPlUS).
Figure 1 shows examples of lTC1095 input and output
words for 4·bit and a·bit processors. A complete data ex·
change can be implemented with two 4·bit MPU outputs
and three inputs in 4·bit systems and one a·bit output and
two inputs in a·bit systems. The resulting data winds up
left justified in the MPU with zeroes automatically filled in
the unused low order bits by the lTC1095. In section 5 an·
other example is given using the MC6aHC05C4 which
positions data right justified inside the MPU.
In the next section, an example is made of interfacing the
lTC1095 with DIN and Dour tied together to the Intela051
MPU.
~I~------------------------------~I
eLK
START
DIN
•••
DOUT _ _ _--:::;HI-Z"--_--,
4-BIT
TRANSFERS
!
!
FILL ZEROES
MPU SENDS
2 DIN WORDS
X=OON'T CARE
MPU READS BACK
3 DOUTWORDS
1B9
START
MPU SENDS
1 DIN WORD
1,
~FVI~~t~
S1
S(I
UN'
MSBF
X
II
BB
B7
B611 B5
B'
B3
B2
B1
BO
0
o
Ba
B7
BB
B5
B4
B3
"II"
so
0
0
1
I
8-81T
TRANSFERS
MPU READS BACK
2 DOUTWORDS
I"
0
0
0
o
1
Figure 1. LTC1095 Input and Output Word Arrangments for 4-Bit and 8-Bit Serial Port Microprocessors
9-69
LTC1095
APPLICATions InFoRmATion
MSBF BIT
LATCHED
~ -,~_______________________________~_~+r_OO_5___________________
7
ClK
MPU CONTROLS
DATA LINE AND SENDS
MUX ADDRESS TO lTC1095
,, ,:'I
,,
,
: ,
I
I
I
lTC1095 CONTROLS
DATA LINE AND SENDS
I
I
I
AID RESULT BACK TO MPU
PROCESSOR
MUST RELEASE
DATA LINE AFTER 7TH -----I : - - lTC1095 TAKES CONTROL OF DATA LINE
ON 7TH FALLING ClK
RISING ClK AND BEFORE
THE 7TH FALLING ClK
Figure 2. LTC1095 Operation with DIN and DOUT Tied Together
5. Microprocessor Interfaces
The LTC1095 can interface directly (without external hard·
ware) to most popular microprocessor (MPU) synchronous
serial formats (see Table 1). If an MPU without a dedicated
serial port is used, then 3 or 4 of the MPU's parallel port
lines can be programmed to form the serial link to the
LTC1095. Included here are one serial interface example
and one example showing a parallel port programmed to
form the serial interface.
Motorola SPI (MC68HC05C4, MC68HC11)
The MC68HC05C4 has been chosen as an example of an
MPU with adedicated serial port. This MPU transfers data
MSB first and in a·bit increments. With three a·bit trans·
fers, the AID result is read into the MPU. The first a·bit
transfer sends the start bit and the SGUDIFF bit of the DIN
word to the LTC1095. The second a·bit transfer clocks the
remaining DIN word bits, and B9 and Ba of the AID conver·
sion result. The third transfer clocks the remaining Dour
bits into the "P.
ANDing the most significant byte with 03 Hex clears the 6
most Significant bits. Notice how the position of the start
bit in the first MPU transmit word is used to position the
AID result right justified in two memory locations.
9-70
Table 1. Microprocessors with Hardware Serial
Interfaces Compatible with the LTC1095
TYPE OF INTERFACE
PART NUMBER
Motorola
SPI
MC6805S2, S3
MC68HC11
SPI
SPI
MC68HC05
RCA
CDP68HC05
SPI
Hitachi
SCI Synchronous
HD6305
HD63705
SCI Synchronous
HD6301
SCI Synchronous
HD63701
SCI Synchronous
HD6303
SCI Synchronous
HD64180
CSI/O
National Semiconductor
COP400 Family
MICROWIREt
COP800 Family
MICROWIREIPLUSt
MICROWIREIPLUS
NS8050U
HPC16000 Family
MICROWIREIPLUS
Texas Instruments
Serial Port
TMS7002
TMS7042
Serial Port
Serial Port
TMS70C02
TMS70C42
Serial Port
TMS32011,
Serial Port
Serial Port
TMS32020
Serial Port
TMS320C25'
'Requires external hardware
tMICROWIRE and MICROWIREIPLUS are trademarks
of National Semiconductor Corp.
LTC1095
APPLICATions InFoRmATion
Data Exchange Between l TC1095 and MC68HCD5C4
BYTE 1
~~~
BYTE 3
BYTE 2
START
1""1-0 rl-oT"I-oT"I-oTI-oTI-o-TI;;;';"IO;:~;";J~1
MPUTRA~~b
I~~~I S1 1SO 1UNI IMSBFI
X
(DUMMYI
1x1 x1
________________________________________________
x= DON'T CARE
~r-
START
0"
----------------~
elK
DOUT - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - . ,
MPU
RECEIVED WORD
luloolooIMIMI~I~lool
I
J
LTC1095
CO
elK
SCK
O'N
MOSI
OOUT
MISO
ANALOG (
-
LABEL
START
MNEMONIC
BCLRn
LDA
STA
MC68HC05C4
TIS"
INPUTS
I
1ST TRANSFER
Hardware and Software Interface to Motorola MC68HCD5C4
Microcontroller
-
BYTE 2
BYTE 1
I? I? I? I? I? 1 0 1B91 BB 1
TST
BPL
LOA
STA
TST
BPL
LDA
Dour from LTC1095 stored in MC68HC05C4 RAM
MSB
10 0 0 0 0 0 B9 B81 byte 1
LSB
Location A+1 IB7 B6 B5 B4 B3 B2 B1 BO I byte 2
Location A
STA
AND
STA
TST
BPL
BSETn
LDA
STA
2ND TRANSFER
I
COMMENTS
Bit 0 Port Cgoes low (CS goes low)
Load LTC1095 DIN word into Acc.
Load LTC1095 DIN word into SPI from Acc.
Transfer begins.
Test status of SPIF
Loop to previous instruction if not done
with transfer
Load next LTC1095 DIN word into Acc.
Load LTC1095 DIN word into SPI from Acc.
Transfer begins.
Test status of SPIF
Loop to previous instruction if not done
with transfer
Load contents of SPI data register
into Acc. (DOUT MSBs)
Start next SPI cycle
Clear 6 MSBs of first DouT word
Store in memory location A(MSBs)
Test status of SPIF
Loop to previous instruction if not done
with transfer
Set BO of Port C(CS goes high)
Load contents of SPI data register into
Acc. (Dour LSBs)
Store in memory location A+1(LSBs)
9-71
LTC1095
APPLICATions InFoRmATion
Interfacing to the Parallel Port of the Intel 8051 Family
The Intel 8051 has been chosen to demonstrate the interface between the lTC1095 and parallel port microprocessors. Normally the CS, ClK and DIN signals would be
generated on 3port lines and the DOUT signal read on a4th
port line. This works very well. However, we will demonstrate here an interface with the DIN and DOUT of the
lTC1095 tied together as described in section 4. This
saves one wire.
The 8051 first sends the start bit and MUX address to the
lTC1095 over the data line connected to P1.2. Then P1.2 is
reconfigured as an input (by writing to it a one) and the
8051 reads back the 10-bit AID result over the same data
line.
LABEL
LOOP 1
lOOP
Hardware and Software Interface to 8051 Microcontroller
ANALOG .{
INPUTS
-
es
LTC1095
P1.4
P1.3
P1.2
ClK
°OUT
DIN ~
8051
MUX ADDRESS
AID RESULT
MNEMONIC
MOV
SETB
CLR
MOV
RLC
CLR
MOV
OPERAND
A,#FFH
Pt4
P1.4
R4,#07
A
Pt3
Pt2,C
SETB
DJNZ
MOV
ClR
MOV
MOV
RLC
SETB
ClR
DJNZ
MOV
MOV
SETB
ClR
ClR
RlC
Pt3
R4,looP1
P1,#04
P1.3
R4,#09
C,P1.2
A
P1.3
P1.3
R4,lOOP
R2,A
C,P1.2
P1.3
Pt3
A
A
MOV
RRC
RRC
MOV
SETB
C, P1.2
A
A
R3,A
P1.4
COMMENTS
DIN word for.bTC1095
M!ke sure CS is high
CSgoeslow
Load counter
Rotate DIN bit into Carry
CLKgoeslow
Output DIN bit to
lTC1095
ClK goes high
Next bit
Bit 2becomes an input
CLKgoeslow
load counter
Read data bit into Carry
Rotate data bit into Acc.
ClK goes high
CLKgoeslow
Next bit
Store MSBs in R2
Read data bit into Carry
ClK goes high
CLKgoeslow
Clear Acc.
Rotate data bit from
Carry to Acc.
Read data bit into Carry
Rotate right into Acc.
Rotate right into Acc.
Store lSBs in R3
goes high
cs
DOUT from lTC1095 stored in 8051 RAM
MS8
189 88 87 86 85 84 83 821
lS8
181 80 0 0 0 0 0 01
R2
R3
Data Exchange Between lTC1095 and 8051
~
"""'\.
r
MSBF BIT LATCHED
\'-________________
'N_TO+~G_'00_5______________________________~
-
I
, 7
eLK
~-__------~·i,i=,
==--~==--~==~;=~
8051 P1 2 OUTPUTS DATA
I, "
TO lTC1095
INP~~~R\~~ri'~I~~~~~
I I
AN
--: :'-LTC1095 TAKES CONTROL OF DATA
elK AND BEFORE THE 7TH FALLING elK
LINE ON 7TH FALLING eLK
f!.!j
9-72
__
BO
~~~~=====
LTC1095
APPLICATions InFoRmATion
~
OUTPUT PORT
3 WIRE SERIAL
SERIAL O A T A H t . 4 - - - - + - - - - . - - - - + - - - - 1 - - - - t - INTERFACE TO OTHER
PERIPHERALS OR LTC1095s
MPU
6 CHANNELS
Figure 3. Several LTC1095s Sharing One 3Wire Serial Interface
Sharing the Serial Interface
The LTC1095 can share the same 2 or 3 wire serial interface with other peripheral components or other LTC1095s
(see Figure 3). In this case, the CS signals decide which
LTC1095 is being addressed by the MPU.
ANALOG CONSIDERATIONS
1. Grounding
The LTC1095 should be used with an analog ground plane
and single point grounding techniques.
The AGND pin should be tied directly to this ground plane.
It is also recommended that the COM pin be tied directly
to the ground plane. All analog inputs should be referenced directly to the single pOint ground. Digital inputs
and outputs should be shielded from and/or routed away
from the reference and analog circuitry.
Figure 4 shows an example of an ideal LTC1095 ground
plane design for a two sided board. Of course this much
ground plane will not always be possible, but users should
strive to get as close to this ideal as possible.
Vee
4.7,0: TANTALUM
~
The DGND pin of the LTC1095 can also be tied directly to
this ground plane because minimal digital noise is
generated within the chip itself.
The Vee pin should be bypassed to the ground plane with
a 4.7flF tantalum with leads as short as possible. The Vpin should be bypassed with aO.1flF ceramic disk. For single supply applications, V- can be tied to the ground
plane.
Figure 4. Example Ground Plane for the LTC1095
9-73
LTC1095
APPLICATions InFoRmATion
2. Bypassing
For good performance, Vcc must be free of noise and ripple. Any changes in the Vee voltage with respect to analog
ground during a conversion cycle can induce errors or
noise in the output code. Vee noise and ripple can be kept
below 1mV by bypassing the Vcc pin directly to the analog
ground plane with a4.7"F tantalum with leads as short as
possible. Figures 5 and 6 show the effects of good and
poor Vcc bypassing.
sistance must be used, the sample time can be increased
by using a slower ClK frequency. With the minimum
possible sample time of 3"s, RSOURCE+ <2k and C1 <20pF
will provide adequate settling.
3. Analog Inputs
HORIZONTAL: 10,.s/DIV
Because of the capacitive redistribution AID conversion
techniques used, the analog inputs of the lTC1095 have
capacitive switching input current spikes. These current
spikes settle quickly and do not cause a problem. However, if large source resistances are used or if slow settling op amps drive the inputs, care must be taken to
insure that the transients caused by the current spikes
settle completely before the conversion begins.
Figure 5. Poor Vcc Bypassing. Noise and Ripple Can Cause
AID Errors.
Source Resistance
The analog inputs of the lTC1095100k like a 60pF capacitor (CIN) in series with a 5000 resistor (RON) as shown in
Figure 7. CIN gets switched between the selected" +" and
II _ " inputs once during each conversion cycle. Large external source resistances and capacitances will slow the
settling of the inputs. It is important that the overall RC
time constants be short enough to allow the analog inputs
to completely settle within the allowed time.
HORIZONTAL: 10,.s/DIV
Figure 6. Good Vee Bypassing Keeps Noise and Ripple On Vee
Below1mV
"+"
RSOURCE+
INPUT
" +" Input Settling
This input capacitor is switched onto the" +" input during
the sample phase (tSMPL, see Figure 8). The sample phase
is the 1 112 ClK cycles before the conversion starts. The
voltage on the" +" input must settle completely within
this sample time. Minimizing RSOURCE+ and C1 will improve the input settling time. If large" +" input source re-
9-74
VIN-
-""N\"""""'''''''''''
1--.........
Figure 7. Analog Input Equivalent Circuit
LTC1095
APPLICATions InFoRmATion
SAMPLE
!
HOLD
"+"INPUTMUST
SmlE DURING
THIS TIME
!
elK
DOUT--------------J'------~
'--_-+-"r....-.
r
"+" INPUT
"-" INPUT
l
----------------------------~-------Figure 8. "+" and" - " Input Settling Windows
" - " Input Settling
Input Op Amps
At the end of the sample phase the input capacitor
switches to the" -" input and the conversion starts (see
Figure 8). During the conversion, the" +" input voltage is
effectively "held" by the sample and hold and will not af·
fect the conversion result. However, it is critical that the
" -" input voltage settle completely during the first ClK
cycle of the conversion time and be free of noise. Minimiz·
ing RSQURCE- and C2 will improve settling time. If large
" -" input source resistance must be used, the time al·
lowed for settling can be extended by using a slower ClK
frequency. At the maximum ClK rate of 500kHz,
RsoURCE- <1kD and C2<20pF will provide adequate
settling.
When driving the analog inputs with an op amp it is im·
portant that the op amp settle within the allowed time (see
Figure 8). Again, the" +" and" -" input sampling times
can be extended as described above to accommodate
slower op amps. Most op amps including the LT1006 and
LT1013 single supply op amps, can be made to settle well
even with the minimum settling windows of 3ILs (" +" input)
and 2!L5 (" -" input) which occur at the maximum clock rate
of 500kHz. Figures 9 and 10 show examples of adequate
and poor op amp settling.
9-75
LTC1095
APPLICATions InFoRmATion
RC Input Filtering
It is possible to filter the inputs with an RC network as
shown in Figure 11. For large values of CF (e.g., 1JtF), the
capacitive input switching currents are averaged into a
net DC current. Therefore, a filter should be chosen with a
small resistor and large capacitor to prevent DC drops
across the resistor. The magnitude of the DC current is ap·
proximately loc =60pF x VIN/tcyc and is roughly propor·
tional to VIN. When running at the minimum cycle time of
38Jts, the input current equals 8JtA at VIN =5V.ln this case,
a filter resistor of 500 will cause 0.1 lSB of full·scale error.
If a larger filter resistor must be used, errors can be elim·
inated by increasing the cycle time as shown in the typical
curve of Maximum Filter Resistor vs Cycle Time.
begins as the bit preceding the MSBF bit is shifted in and
continues until the falling ClK edge after the MSBF bit is
received. On this falling edge, the S&H goes into hold
mode and the conversion begins.
HORIZONTAL: lpSlDIV
Figure 9. Adequate Settling of Op Amp Driving Analog Input
Input leakage Current
Input leakage currents can also create errors if the source
resistance gets too large. For instance, the maximum in·
put leakage specification of 1JtA (at 125°C) flowing
through a source resistance of 1kO will cause a voltage
drop of 1mV or 0.2lSB. This error will be much reduced
at lower temperatures because leakage drops rapidly
(see typical curve of Input Channel leakage Current vs
Temperature).
HORIZONTAL: 20pSIDIV
Figure 10. Poor Op Amp Settling Can Cause AID Errors
4. Sample and Hold
Single Ended Inputs
The lTC1095 provides a built·in sample and hold (S&H)
function for Signals acquired in the single ended mode.
This sample and hold allows conversion of rapidly varying
signals (see typical curve of S&H Acquisition Time vs
Source Resistance). The input voltage is sampled during
the tSMPL time as shown in Figure 8. The sampling interval
LT01095
"-"
Figure 11. RC Input Filtering
LTC1095
APPLICATions InFoRmATion
Differenliallnpuls
With differential inputs, the AID no longer converts just a
single voltage but rather the difference between two voltages.ln this case, the voltage on the selected "+" input is
still sampled and held and therefore may be rapidly time
varying just as in single ended mode. However, the voltage
on the selected "_ " input must remain constant and be
free of noise and ripple throughout the conversion time.
Otherwise, the differencing operation may not be performed accurately. The conversion time is 10 CLK cycles.
Therefore, a change in the II - " input voltage during this
interval can cause conversion errors. For asinusoidal voltage on the II - " input this error would be:
=
VERROR(MAX) VPEAKX 2X1rX f("-") X10lfclK
Where f(" -") is the frequency of the II - " input voltage,
VPEAK is its peak amplitude and fClK is the frequency of
the CLK. In most cases VERROR will not be significant. For
a60Hz signal on the II - " input to generate a 1I4LSB error
(1.25mV) with the converter running at CLK 500kHz, its
peak value would have to be 150mV.
During each bit test of the conversion (every CLK cycle), a
capacitive current spike will be generated on the reference
pin by the AID. These current spikes settle quickly and do
not cause a problem. However, if slow settling circuitry is
used to drive the reference input, care must be taken to ensure that transients caused by these current spikes settle
completely during each bit test of the conversion.
REF IN
.-----t13l--+-..--.,
101<0
TYP
T
lTC1096 ...
5pF-aopF
Figure 12. Reference Input Equivalent Circuit
=
5. Inlernal Reference
The LTC1095 contains an internal precision 5V buried
zener reference which is capable of supplying the full
scale reference for the converter when connected as
shown in Figure 15. With its 10mA output current the reference can also power the AID and other external circuitry to
provide aTTL inputlTTL output system running off asingle
7.2V-40V supply (see Figure 16).
HORIZONTAL: 1,.s/DlV
Figure 13. Adequate Reference Settling
6. Reference Input
The voltage on the reference input of the LTC1095 defines
the voltage span of the AID converter. The reference input
looks primarily like a 10kO resistor to ground but will have
transient capacitive switching currents due to the
switched capacitor conversion technique (see Figure 12).
HORIZONTAL: 1,.s/DIV
Figure 14. Poor Reference Settling Can Cause AID Errors
9-77
LTC1095
APPLICATions InFoRmATion
When driving the reference input, three things should be
kept in mind:
1. The source resistance (ROUT) driving the reference input
should be low (less than 10) to prevent DC drops
caused by the 1mA maximum reference current (IREFIN).
2. Transients on the reference input caused by the capaci·
tive switching currents must settle completely during
each bit test (each ClK cycle). Figures 13 and 14 show
examples of both adequate and poor settling. Using a
slower ClK will allow more time for the reference to
settle. However, even at the maximum ClK rate of
500kHz most references and op amps can be made to
settle within the 2JLs bit time.
3. It is recommended that REFIN be tied to REFoUT as
shown in Figure 15.
REFOUT
1!J
*10~F
Figure 15. Suggested Circuit for REFIN Tied to REFoUT
CHANNELS
[
The effective resolution of the lTC1095 will be increased by
reducing the input span of the converter. The lTC1095 ex·
hibits good linearity and gaiR over awide range of reference
voltages (see typical curves of Linearity and Full Scale Error
vs Reference Voltage). However, care must be taken when
operating at low values of VREF IN because of the reduced
lSB step size and the resulting higher accuracy require·
ment placed on the converter. The following factors must be
considered when operating at low VREF IN values.
1. Offset
2. Noise
3. Conversion speed (elK frequency)
The offset of the lTC1095 has a larger effect on the output
code when the AID is operated with reduced reference
voltage. The offset (which is typically a fixed voltage) be·
comes a larger fraction of an lSB as the size of the lSB is
reduced. The typical curve of Unadjusted Offset Error vs
Reference Voltage shows how offset in lSBs is related to
reference voltage for atypical value of Vos. For example, a
VREfIN
2.5V
1.000
-----""""
----""""
The lTC1095 can operate with reference voltages below
1V, by dividing down the 5V reference output voltage as
shown in Figure 17.
Offset with Reduced Reference Voltages
REFINq
AGND
ANALO~ _.....
7. Reduced Reference Operation
11--..--.. . . '"
r~
I 10k!l
R1
I 10k!l
R2
10.2kll
2.55kll
V
5. R2
REF
R1 +R2
0.2V:s;VREF IN<5V
IN=
lTC1~
"----'-- 7.2V TO 40V
7.2V TO 40V
Figure 16. LTC1095 Single Supply Operation
9-78
Figure 17. Operating LTC1095 on Reduced Reference Voltage
LTC1095
APPLICATions InFoRmATion
Vos of O.5mV which is O.1LSB with a 5V reference becomes O.5LSB with a1V reference and 2.5LSBs with aO.2V
reference. If this offset is unacceptable, it can be cor·
rected digitally by the receiving system or by offsetting
the" -" input to the LTC1095.
Noise with Reduced Reference Voltages
The total input referred noise of the LTC1095 can be reduced to approximately 200,N peak·to·peak using a
ground plane, good bypassing, good layout techniques
and minimizing noise on the reference input. This noise is
insignificant with a 5V reference but will become a
larger fraction of an LSB as the size of the LSB is reduced.
The typical curve of Noise Error vs Reference Voltage
shows the LSB contribution of this 200,N of noise.
For operation with a 5V reference, the 200p,V noise is only
O.04LSB peak-to·peak. In this case, the LTC1095 noise will
contribute virtually no uncertainty to the output code.
However, for reduced references, the noise may cause
undesirable jitter in the output code. For example, with a
1V reference, this same 200p,V noise is O.2LSB peak-to·
peak. This will reduce the range of input voltages, over
which a stable output code can be achieved, by O.2LSB. If
the reference is further reduced to 200mV, the 200p,V noise
becomes equal to one LSB and astable code may be difficult to achieve. In this case, averaging readings may be
necessary.
This noise data was taken in avery clean setup. Any setup
induced noise (noise or ripple on: Vee, REFIN, VIN or V-)
will add to the internal noise. The lower the reference voltage to be used, the more critical it becomes to have a
clean, noise-free setup.
Conversion Speed with Reduced Reference Voltages
With reduced reference voltages, the LSB step size is reduced and the LTC1095 internal comparator overdrive is
reduced. Therefore, it may be necessary to reduce the
maximum eLK frequency when low reference voltages are
used.
TYPICAL APPLICATiOnS
Micropower, 500V Opto Isolated, Multichannel, 10·8it Data Acquisition System
4N28s
6
ANALOG
,NPUTS
0-5V RANGE
-·SEE NEXT PAGE FOR
MC66HC05 COOE
9-79
LTC1095
TYPICAL APPLICATions
68HC05 Code Communicates with LTC1095 through
Opto·lsolators
LABEL
START
Tl
T2
T3
MNEMONIC
ORG
CLRX
LOA
STA
LOA
STA
LOA
STA
LOA
STA
LOA
STA
LOA
STA
LOA
STA
LOA
STA
BCLR
LDA
DECA
BNE
LOA
DECA
BNE
LOA
DECA
BNE
LOA
OPERAND
$100
#$lF
$50
#$9F
$51
#$3F
$52
#$BF
$53
#$5F
$54
#$DF
$55
#$53
$OA
#$FF
$06
1,$02
#$FF
Tl
#$FF
T2
#$FF
T3
#$FF
COMMENTS
LABEL
T4
Clear Xregister
CHO
CHOaddress
CHl
CHl address
CH2
CH2address
CH3
CH3address
CH4
CH4address
CH5
CH5address
Data lor SPCR
Load data into SPCR
DatalorDDR
Conligure PORT CDDR
Cl (PWR OFF) goes low
Load counter
Decrement Acc.
START1
TEST2
TEST
SKIP
TESTl
SKIPl
Load counter
Decrement Acc.
Load counter
Decrement Acc.
MNEMONIC
DECA
BNE
BCLR
LOA
STA
TST
BPL
LoA
STA
TST
BPL
LOA
STA
LOA
STA
TST
BPL
BSET
LOA
STA
INCX
CPX
BNE
BSET
CLRX
JMP
OPERAND
COMMENTS
Decrement Acc.
T4
0,$02
#$03
SOC
SOB
TEST2
$50,X
$OC
$OB
TEST
#DC
$60,X
#$FF
SOC
$OB
TEST1
0,$02
SOC
$70,X
CO (CS) goes low
DIN prefix start and SGL
Start transfer
Test ildone
If not try again
Put DIN word in Acc.
Start transfer
Test If done
If not try again
Load MSBs In Acc.
Store MSBs In $60 +X
Insure 1's output last
Start next transfer
Test II done
II noJjry again
CO (CS) goes high
Put LSBs In Acc.
Put LSBs In $70 +x
Increment Xregister
Check If done
#$06
STARTl
1,$02
Set C1 (PWR OFF)
Reset counter
Start next loop
Load counter
PACKAGE DESCRIPTiOn Dimensions in inches (millimeters) unless otherwise noted.
NPackage
18·Lead Plastic DIP
J Package
18·Lead Ceramic DIP
----(~2:)----1
r
18
f
o22{)-O 310
(5590-7870\
~:rT':'l-r:-r-r:T'T.T'r.'T--r.rr.:r'~
16
15
~:
1
12
IT
10
{6350",02!)4}
L'rn-,"'ffi,Ff',IT""i'IT".'m',"'F.',Ff',i'FFof'.offl.
(l065
0200
{S08O}
MAX
(1&51)
~~~
0130",0005
(3302"'012~
fi,ifF
(3175)
MIN
...
0125
13m)
9-80
17
~
~
(1143>100381)
0.045-0065
_ _ _ _++_(1_'U_-,_.M'~1
''''''''-unlt\l2
~~
LTC1099
TECHNOLOGY~H-ig-h-S-p-e-ed--8--B-it-A-/-D-C-o-n-v-e-rt-er
with Built-In Sample-and-Hold
FEATURES
DESCRIPTion
•
•
•
•
The LTC1099 is a high speed microprocessor compatible
a-bit analog-to-digital converter (AID). An internal sampleand-hold (S/H) allows the AID to convert inputs up to the full
Nyquist limit. With a conversion rate of 2.5~s this allows
156kHz 5Vp-p input Signals, or slew rates as high as 2.5V/~s,
to be digitized without the need for an external S/H.
•
•
•
•
•
•
•
Built-In Sample-and-Hold
No Missing Codes
No User Trims Required
All Timing Inputs Edge Sensitive for Easy Processor
Interface
Fast Conversion Time: 2_5~s
Latched Three-State Outputs
Single 5V Operation
No External Clock
Overflow Output Allows Cascading
Tc Input Allows User Adjustable Conversion Time
0.3" Wide 20-Pin DIP
KEY SPECIFICATiOnS
aBits
• Resolution
• Conversion Time
2.5~s (RD Mode)
2.5~s (WR-RD Mode)
Two modes of operation, READ (RD) mode and WRITEREAD (WR-RD) mode, allow easy interface with processors. All timing is internal and edge sensitive which
eliminates the need for external pulse shaping circuits.
The Stand-Alone (SA) mode is convenient for those applications not involving aprocessor.
Data outputs are latched with three-state control to allow
easy interface to a processor data bus or I/O port. An overflow output (OFL) is provided to allow cascading for higher
resolution.
2.5V/~s
• Slew Rate Limit (Internal S/H)
• Low Power
• Total Unadjusted Error
LTC1099
LTC1099A
75mWMax
±1 LSB
± 1/2 LSB
Infinite Hold Time Sample-and-Hold (TACQ =240ns)
5.000V
Signal to Noise Ratio (SNR) ys
Input Frequency
15V
-36
ITA~1dobl
10k
-38
20
Tc=2.51'"
ig
i- 40
V>
6-42
82
llI!li
VIN,
SAMPLE
L
tJC1099
6
tg -44
<5
84
083
85
-'
~
86
'"
en
081
13
VOUT
0B4 14
5
082
HOLD
~
83
DBO
3
87
2
-48
-50
-52
10k
....
~ -46
1
10
INPUT FREQUENCY 1kHz)
100
-15V
9-81
LTC1099
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
(Noles 1and 2)
ORDER PART
NUMBER
Supply Voltage (Vee) to GND ........................ 12V
Voltage
Analog and Reference Inputs ...... - 0.3V to Vee +0.3V
Digital Inputs ........................... - 0.3V to 12V
Digital Outputs ................... - 0.3V to Vee +0.3V
Power Dissipation ............................... 500mW
Operating Temperature Range
LTC1099C/1099AC ........................ O°C to 70°C
LTC1 0991/1 099AI ...................... - 40°C to 85°C
LTC1099M/1099AM ................... - 55°C to 125°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
LTC1099CN
LTC1099ACN
LTC1099IN
LTC1099AIN
LTC10991J
LTC1099AIJ
LTC1099CJ
LTC1099ACJ
LTC1099MJ
LTC1099AMJ
J PACKAGE
N PACKAGE
20-LEAD CERAMIC DIP 20-LEAD PLASTIC DIP
CONVERTER CHARACTERISTICS (Note 3)
PARAMETER
Accuracy
Total Unadjusted Error
LTC1099A
LTC1099
Minimum Resolution (No Missing Codes)
Reference Input
Input Resistance
REF + Input Voltage Range
REF - Input Voltage Range
Analog Input
Input Voltage Range
Input Leakage Current
Input Capacitance
Sample·and·Hold
Acquisition Time
Aperature Time
Tracking Rate
9-82
LTC1099AIl10991
LTC1099AMI1099M
MIN
TYP
MAX
CONDITIONS
Note 4
Note 5
Note 5
CS=Vcc, VIN=VCC, GND
••
•
•
•
•
•
•
LTC1099AC11099C
MIN
TYP
MAX
±112
±1
8
1
REFGND
±112
±1
LSB
LSB
Bits
4.5
kll
V
V
8
3.2
GND
6
Vee
REF+
Vcc
±3
2
REFGND
3.2
Vcc
REF+
GND
UNITS
Vee
±3
V
~A
60
60
pF
240
110
2.5
240
110
2.5
ns
ns
VI~s
LTC1099
DIGITAL AND DC ELECTRICAL CHARACTERISTICS (Nole3)
SYMBOL
VIH
VIL
IIH
PARAMETER
High Level Input Voltage
Low Level Input Voltage
High Level Input Currenl
IlL
VOH
Low Level Input Current
High Level Output Voltage
CONDITIONS
All Digital Inputs, Vcc= 5.25V
All Digital Inputs, Vcc = 4.75V
VIH = 5V; ~ RD, Mode
VIH =5V;WR
VIL = OV; All Digital Inputs
DBO-DB7, OFL, INT; Vcc=4.75V
IOUT=360~A
VOL
Low Level Output Voltage
loz
High·Z Output Leakage
ISOURCE
ISINK
Icc
Output Source Current
Output Sink Current
Supply Current
lOUT = 10~A
DBO-DB7, OFL, INT, ROY; Vcc= 4.75V
10UT= 1.6mA
DBO-DB7, ROY; VOUT = 5V
DBO-DB7, ROY; VOUT=OV
DBO-DB7, OFL, INT; VOUT=OV
DBO-DB7, OFL, INT, ROY; VOUT = 5V
CS=WR=RD=Vcc
•
•
••
•
•
•
••
•
•
•
LTC1 099AII1 0991
LTC1099AM/1099M
MIN
TYP
MAX
2.0
0.8
0.0001
1
0.0005
3
- 0.0001 -1
2.4
4.0
4.7
0.1
-0.1
-11
14
11
LTC1099AC/1099C
MIN
TYP
MAX
2.0
0.0001
0.8
1
0.0005
3
-0.0001 -1
2.4
0.4
3
-3
-6
7
20
4.0
4.7
0.1
-0.1
-11
14
11
UNITS
V
V
~A
~A
~A
V
V
0.4
3
-3
-7
9
15
V
~A
~A
mA
mA
mA
AC CHARACTERISTICS (Nole3)
SYMBOL PARAMETER
RD Mode (Figure 2) Pin 7= GND
Conversion Time
tCRO
CONDITIONS
Delay From CS I to ROY I
Delay From RDI to Output Data Valid
Delay From ROt to tNTI
Delay From ROt to High·ZState on Outputs
Delay Time Between Conversions
Delay Time From RD! to Output Data Valid
tACC2
WR·RD Mode (Figures 3and 4) Pm 7= Vcc
Conversion Time
tcwR
CL=100pF
CL= 100pF
CL= 100pF
Test Circuit Figure 1
tROY
tACCO
tlNTH
t1H, tOH
tp
tACCO
tACC2
tlNTH
tlHWR
t1H, tOH
tp
tWR
Delay Time From WR! to Output Data Valid
Delay From RD! to Output Data Valid
Delay From ROt to INTt
Delay From WRI to INTI
Delay From ROt to High·Z State on Outputs
Delay Time Between Conversions
Minimum WR Pulse Width
TA=25°C
TA=25°C
CL= 100pF
CL= 100pF
CL= 100pF
CL= 100pF
Test Circuit Figure 1
Note 1: Absolute maximum ratings are those values beyond which the life
of the device may be impaired.
Note 2: All voltages are with respect to GND (Pin 10) unless otherwise
noted.
•
•
LTC1099Al/10991
LTC1099AM/1099M
MIN
TYP
MAX
MIN
2.3
2.3
2.3
2.5
2.8
5.0
LTC1099AC/1099C
TYP
MAX
2.5
70
70
tCRo+35
70
70
700
70
tCRo+35
70
70
700
70
2.5
tcwR+40
70
70
240
70
700
55
2.8
5.0
2.3
2.5
tcwR+40
70
70
240
70
700
55
2.8
3.75
UNITS
~s
~s
ns
ns
ns
ns
ns
ns
2.8
3.75
~s
~s
ns
ns
ns
ns
ns
ns
ns
Note 3: Vcc = 5V, REF + = 5V, REF - = OV and TA = TMIN to TMAX unless
otherwise noted. All typical values at TA = 25°C. The. indicates specifica·
tions which apply over the full operating temperature range.
Note 4: Total unadjusted error includes offset, gain, linearity and hold step
errors.
Note 5: Reference input voltage range is guaranteed but is not tested.
9-83
LTC1099
TEST CIRCUITS
t1H
tr =20ns, CL =10pF
Vee
Vee
RD
GND
00
tlHj
DATA
OUT
VOH
lk
90:~
DATA OUT
GND
tOH
tr =20ns, CL =10pF
Vee
Vee
Vee
lk
Tel
RD
GND
DATA
OUT
10%
tOH~
Vee
DATA OUT
VOL
r:
Figure 1. Three·State Test Circuit
TiminG DIAGRAmS
00-+--'"
~~ I
RDY
RD
iNT----r---'"
iNT-----""'
080-0B7----+IcwtU
LTC1099
TiminG DIAGRAmS
cs \,--~I\,--
__---,A______ _
CS(GND)-------------
AD ( G N D ) - - - - - - - - - - - - -
1+---tCWR--------+---tpJ.. ----
AD
----1----""'
WR
1-----+-""'
00-____
tAGe2
DBO-DB7
-....,-----<1
Figure 38. WR·RD Mode (Pin 7is HIGH and tRD VREF·
User adjustable conversion time.
Positive supply; 4.75VsVees
5.25V.
9-85
III
LTC1099
TYPICAL PERFORmAnCE CHARACTERISTICS
Supply Current vs Temperature
Linearity Error vs Reference
Voltage
Vos Errorvs Reference Voltage
1.0
20
TA!25'C
Tc=2,5pS -
18
!
~
16
14
r--
12
..........
110
:::>
<.>
~
8::
iil
r--r-.
8
I'r-.
6
ffi
2
l!l
>
ffi
a
125
Total Error vs Reference Voltage
a
TA=125•C _
Tc=2,5pS
r--
a
--
~RESISTOR BElWEEN PIN 19,AND ~99
"
TA= 25'C
0.8
i\
~ 0.2
a
0.1
10
100
RESISTANCE (kll)
ffi
0.8
o
<.>
L
-so
0.6
4.0
/v
3.5
1.4
$;
-36
4.5
;:::
V
V
~
-25
a 25 so 75 100
AMBIENT TEMPERATURE, TA ('C)
1000
1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5
CONVERSION TIME (pS)
Signal to Noise Ratio (SNR) vs
Input Frequency
/
V
r-.
--'
~ 1.8
z
~ 0.4
:::>
i!J
I!lI 1.6
w
:::.
~ 1.0
4
;5
Conversion Time vs Temperature
51
3
1\
a:
~
RESISTOR BElWEEN PIN 19 AND GRO UNO
1
2
3
4
REFERENCE VOLTAGE, VREF (V)
1.2
2
Tl=25'.c
~
~
~
u;
1
Accuracy vs Conversion Time
:::>
~
a
REFERENCE VOLTAGE, VREF (V)
ffi 0.6
is
- -
1.0
~
" --r-- -
...... ~
0.1
Conversion Time vs REXT
1\
9-86
'\.
0.2
---- -
\
a
0.5
1
2
3
4
REFERENCE VOLTAGE, VREF (V)
\
\
a
\
0.6
~ 0.3
100
\
0.7
Tc=2.5pS
~
~.0.4
"-
a
-50 -25
a
25
50
75 100
AMBIENT TEMPERATURE, TA('C)
~
i
\
\
a:
~
\
\
0.8
t
a;- 3
~
TA=~5'C _
\
0.9
a;-
g
z
i'ii
~
3.0 0z
:::j
Tc=2.5pS
~-40
z
en
0-42
~
w-44
en
i g
;:
2.5
'TA~~~'~'
-38
0
-46
--'
~-48
2.0
1.5
125
u;
'"
-50
-52
1
10
INPUT FREQUENCY (kHz)
100
LTC1099
FunCTionAL DESCRIPTion
Figure 5 shows the functional block diagram for the
LTC1099 two step flash ADC.lt-consists of two 4·bit flash
converters, a4·bit DAC and adifferencing circuit. The con·
version process proceeds as follows:
1) At the start of the conversion the on·board sample·
and·hold switches from the sample to the hold mode.
This is a true sample·and·hold with an acquisition
time of 240ns, an aperture time of 110ns and atrack·
ing rate of 2.5V/p,s.
To take the simple block diagram of Figure 5and reconfig·
ure it to reuse the MS· Flash to do the LS·Flash is con·
ceptually simple, but from a hardware point of view is not
practical. A new six input switched capacitor comparator
is used to accomplish this function in a simple, although
not straightforward, manner.
1--......- - - - 8 7
1--+-1....---- 86
1--t-i......- - - 8 5
I--+-Ir-+.......- - 84
2) The held input voltage is converted by the 4·bit
MS·Flash ADC. This generates the upper or most sig·
nificant 4·bits of the B·bit output.
3) A 4·bit approximation, from the DACoutput, is sub·
tracted from the held input voltage.
4) The LS·Flash ADC converts the difference between
the held input voltage and the DAC approximation.
This generates the lower or least significant 4·bits of
the B·bit output. The LS·Flash reference is one six·
teenth of the MS·Flash reference. This effectively
multiplies the differellCe by 16.
5) Upon the completion of the LS 4·bit flash the eight
output latches are updated simultaneously. At the
same time the sample·and·hold is switched from the
the hold mode to the acquire mode in preparation for
the next conversion.
The advantage of this approach is the reduction in the
amount of hardware required. A full flash converter reo
quires 255 comparators while this approach requires only
31. The price paid for this reduction in hardware is an in·
crease in conversion time. A full flash converter requires
only one comparison cycle while this approach requires
two comparison cycles, hence two step flash.
This architecture is further simplified in the LTC1099 by
reusing the MS·Flash hardware to do the LS·Flash. This reo
duces the number of comparators from 31 to 16. This is
possible because the MS and LS conversions are done at
different times.
HIT
DAC
+
REMAINDER
LS
4-81T
FLASH
1-------83
1-------82
t------
81
1-------80
Figure 5. 8·Bit Two-Step Semiflash AID
Figure 6shows the six input switched capacitor compara·
tor. Intuitively the comparator is easy to understand by
noting that the common connection between the two input
capacitors, C1 and C2, acts like avirtual ground. In opera·
tional amplifier circuits, current is summed at the virtual
ground node. Input voltage is converted to current by the
input resistors. In the switched capacitor comparator, in·
put voltage is converted to charge by the input capacitors
and these charges are summed at the virtual ground node.
9-87
LTC1099
FunCTionAL DESCRIPTion
Amajor advantage of this technique is that the switch-on
impedance has no affect on accuracy as long as sufficient
time exists to fully charge and discharge the capacitors.
During the first time period the T+ and Tz switches are
closed. This forces the common node between C1 and C2
to an arbitrary bias voltage. Since the capacitors subtract
out this voltage it may be considered, for the sake of this
discussion, to be exactly zero (Le. virtual. ground). Note
also that variations in the bias voltage with time and temperature will also be rejected. In this state C1 charges to
VIN. When Tzopens VIN is held on C1.
(+)H8
The next step is the first comparison - the MS-Flash. Tz
and T+ are opened and T-1 is closed. The equation for
each comparator is:
VIN+ 1/2LSB- MSTAP=OV
There are 16 identical comparators each tied to the tap on
a 16 resistor ladder. The MS tap voltages vary from VREF to
OV in 16 equal steps of VREF/16.
Notice that capacitor C2 adds 1/2LSB to VIN. This offsets
the converter transfer function by 1/2LSB, equally distributing the 1LSB quantization error to ± 1/2LSB.
T+ T_l T_2
111
VIN -
I
I
I
I I
I
I
I
MSTAPi
DAC (-)
1/2LSB
I
Tz
Cl
\!.L~
I
C2
OV ( - - - ) -
LS TAP (-)
.r~-----------HOLD--------------+f1,-SAMPLE
Tz
\
t
__________________________
SAMPLE
\~--------------------------~/
\~---------------------L2
STROBE
\~----
/
------------------~
r--\
----------------~/
Figure 6. Six Input Switched Capacitor Comparator
9-88
r--\
\~----------~/
\~------
LTC1099
FunCTionAL DESCRIPTion
The outputs of the 16 comparators are temporarily latched
and drive the 4-bit DAC directly without need of decoding.
This holds the DAC output constant for the next step the LS conversion. The LS conversion is started when T-1
is opened and T-2 is closed. Capacitor C1 subfracts the
4-bit DAC approximation from VIN and inputs the difference charge to the virtual ground node. The equation for
each comparator is:
VIN +1t2LSB- VDAC- LSTAP=OV
The 4-bit DAC approximation is input to all 16
comparators. The LS tap voltages are converted to charge
by capacitor C2. LS taps vary from VREFt16V to OV in 16
equal steps of VREFt256. The comparators look at the net
charge on the virtual ground node to perform the LS-Flash
conversion. When this conversion is complete the 4 LSB's
along with the 4 MSB's are transferred to the output
latches. In this way all eight outputs will change
simultaneously.
DIGITAL InTERFACE
The digital interface to the LTC1099 entails. either controlling the conversion timing or reading data. There are two
basic modes for controlling and reading the A/D - the
WRITE-READ (WR-RD) mode and the READ (RD) mode.
WR·RD Mode (Pin 7= High)
In the WR-RD mode a conversion sequence starts on the
falling edge of WR with CS low (Figures 3A and 3B). This is
an edge sensitive control function. The width of the WR input is not important. All timing functions are internal to
theA/D.
The first thing to happen after the falling edge of WR is the
internal StH is switched to hold. This typically takes 110ns
after WR falls and is the aperture time of the StH.
Next the AtD conversion takes place. The conversion time
is internally set at 2.5fLS, but is user adjustable (see Adjusting the Conversion Time). The end of conversion is
signaled by the high to low transition of INT. The StH is
switched back to the acquire state as soon as the conversion is complete.
After the conversion is complete the B-bit result is available on the three-state outputs. The outputs are active
with RD and CS low. Output data is latched and, if no new
conversion is initiated, is available indefinitely as long as
the power is not turned off.
The WR-RD mode is also used for stand-alone operation.
By tying CS and RD low the data outputs will be continuously active (Figure 4). The falling edge of WR starts the
conversion sequence and when done new data will appear
on the outputs. All outputs will be updated simultaneously.ln stand-alone operation the outputs will never be in
a high impedance state.
RD Mode (Pin 7=Low)
In the RD mode a conversion sequence is initiated by the
falling edge of RD when CS is low (Figure 2). The StH is
switched to the hold state 110ns after the falling edge of
RD. It is switched back to the acquire state at the end of
conversion.
When RD goes low, with CS low, the result of the previous
conversion is output. This data stays there until the ongoing conversion is complete (INT goes low). At this time the
outputs are updated with new data.
As long as CS and RD stay low long enough, the receiving
device will get the right data. Remember the receiving device reads data in on the rising edge of RD. The ROY output facilitates making RD long enough.
In the RD mode the WR input becomes the ROY output. On
the falling edge of RD the RDY goes low. It is an open drain
output to allow awired OR function so it requires a pull-up
resistor. At the end of conversion the active pull-down is
released and ROY goes high.
9-89
LTC1099
DIGITAL InTERFACE
The RDY output is designed to interface to the Ready In
(RDYIN) function on many popular processors. RDYIN al·
lows these processors to work with slow memory by
stretching the RD strobe coming from the processor. RD
wi" remain low as long as RDY is low. In the case of the
LTC1099, RDY stays low until the conversion is complete
and new data is available on the outputs. This greatly sim·
plifies the programmers task. Each time data is required
from the AID a simple read is executed. The hardware in·
terface makes sure the RD strobe is long enough.
Adjusting the Conversion Time
The conversion time of the LTC1099 is internally set at
2.5/Ls. If desired it can be adjusted by forcing avoltage on
~
~1~
Figure 7. Adjusting the Conversion Time
Pin 19. With Pin 19 left open the conversion time runs
2.5/Ls. Aconvenient way to force the voltage is with the cir·
cuit shown in Figure 7. To preset the conversion time to a
fixed amount a resistor may be tied from Pin 19 to Vee or
GND. Tying it to Vee slows down the conversion and tying
it to GND wi" speed it up (see Typical Curves).
AnALOG InTERFACE
The inclusion of a high quality sample·and·hold (StH) sim·
plifies the analog interface to the LTC1099. A" of the error
terms normally associated with an S/H (hold step, offset,
gain, and droop errors) are included in the error specifica·
tions for the AID. This makes it easy for the designer since
a" the error terms need not be taken into account
individually.
S/HTiming
A falling edge on the RD or WR input switches the StH
from acquire to hold and starts the conversion. The aper·
ture time is the delay from the falling edge to the actual in·
stant when the S/H switches to hold. It is typically 110ns.
As soon as a conversion is complete (2.5/Ls typ.) the StH
switches back to the sample mode. Even though the ac·
quisition time is only 240ns a new conversion cannot be
started for 700ns (typ.) after aconversion is completed.
Analog Input
The input to the AtD looks like a 60pF capacitor in series
with 5500 (Figure 8).
9-90
V1N--o~"
5500
1:
"I
TOAID
60PF
Figure 8. Equivalent Input Circuit
With this high input capacitance care must be taken when
driving the inputs from a source amplifier. When the input
switch closes an instantaneous capacitive load is applied
to the amplifier output. This acts like an impulse into the
amplifier and if it has poor phase margin the resulting ring·
ing can cause a considerable loss of accuracy. If the am·
plifier is too slow the resulting settling tail wi" also cause
a loss of accuracy. The amplifier should also have low
open circuit output impedance. The LT1006 is an excellent
amplifier in this regard. It also works with a single supply
which fits nicely with the LTC1099.
Reference Inputs
Sixteen equal valued resistors are internally connected be·
tween REF + and REF -. Each resistor is nominally 2000
giving a total resistance of 3.2kO between the reference
terminals. When VIN equals REF + the output code wi" be
a" ones. When VIN equals REF - the output code wi" be
a" zeros.
LTC1099
AnALOG InTERFACE
Although it is most common to connect REF + to a 5V
reference and REF - to ground, any voltages can be used.
The only restrictions are REF +>REF - and REF + and
REF - must be within the supply rails. As the reference
voltage is reduced the AID will eventually lose accuracy.
Accuracy is quite good for references down to 1V.
If a ground plane is not practical, Single point grounding
techniques should be used. Ground for the AID should not
be mixed in with other noisy grounds.
APPLICATIONS
Analog Multiplier
The schematic Figure 9 shows the LTC1099 configured
with a DAC to form a 2 quadrant analog multiplier. An input waveform is applied to the LTC1099 where it is
digitized at a300kHz rate. The digitized signal is fed to the
DAC in "flow through" mode where another signal is input
to the DAC reference input. In this way the two analog
signals are multiplied to produce a Double Sideband Amplitude Modulated Output. Figure 10 shows a 3kHz sine
wave multiplied by a 100Hz triangle.
Even though the reference drives a resistive ladder a lot of
capacitive switching is taking place internally. For this
reason driving the reference has the same characteristics
as driving VIN. A fast low impedance source is necessary.
The reference has the additional problem of presenting a
DC load to the driving source. This requires the DC as well
as the AC source impedance to be low.
Good Grounding
Note that since this is only a2quadrant multiplier acarrier
component (the input to the LTC1099) will appear in the
output spectrum. Figure 11 shows the frequency spectrum
of a42.5kHz sine wave multiplied by a5kHz sine wave. The
depth of modulation is about 30dB. Figure 12 shows a
42.375kHz sine wave multiplied by a 30.875kHz sine wave.
Note that at these higher frequencies, the depth of
modulation is still about 30dB. The carrier feed through is
seen in Figure 12.
As with any precise analog system care must be taken to
follow good grounding practices when using the LTC1099.
The most noise free environment is obtained by using a
ground plane with GND (Pin 10) and REF - (Pin 11) tied to
it. Bypass capacitors from REF + (Pin 12) and Vee (Pin 20)
with short leads are also required to prevent spurious
switching noise from affecting the conversion accuracy.
(V'N')OVTO 5V
(V'N,)+10VTO -10V
ANALOG
ANALOG
INPUT
4
INPUT
MICROLINEAR
,....-..:::CS:..:;:AN.:::,D:.:::.Rii.:;::.LOW~:::::DBO:....::-D::;B3~--"';~+--1>-----.,;M::::.Pl:..;::20::..:;BD::;::AC....,B~
5V
Ll-'11r---'1.32~0-':"5V
N/C
2 D80 .TC1OOO
19
3 061
4 DB2
18
BYTg
--+
r-:17_ _
P-t==~-=-t6 Wl\iru)y
5V 7 MODE
Blm
l'V
24
BYTE 11 23
22
WR2
4
OB4-DB7
5 063
V
Vee
XFER 21
014
016 20
6 013
DI7 19
7 012
DIB 18
B Dll
DI9 17
9 DID
0110 16
=ANALOG GROUND
~ = DIGITAL GROUND
AGND
FigureS.
9-91
LTC1099
AnALOG InTERFACE
VINl "OV TO 5V
TRIANGLE INTO LTC1099
-100Hz
VIN2" ±4.8V SINE
INTO DAC-3kHz
Figure 10.
~
_v \.II.[ JY V'J V\i r'V'v '\J l '\j
v~
-70
32.5
Ii
A
A
34.5
36.5[38.5
40.5
42.5
44.5
1
37500Hz
42500Hz
f\J'J
50.5
46.5148.5
52.
47500Hz
Figure 11. Two Quadrant Multiplier Output Spectrum with OV to
4.5Vat 42.5kHz into LTC1099 and ± 2Vat 5kHz into DAC
n
A
/\
''V /'IV
A
I \ • A 1\
vv \J
lJV
V~
\J
I\J
ft
\,J"\
1\ /1
V
-70
5
115
11500Hz
25 1 35
145
30875Hz 42375Hz
55
65
r5
85
95
73250Hz
Figure 12. Two Quadrant Multiplier Output Spectrum with OV to
4.5V at 42.375kHz into LTC1099 and ±2V at 3D.875kHz into DAC
9-92
10
LTC1099
TYPICAL APPLICATions
Cascading for 9·Bit Resolution
f\.
Cll
13 ~
Vee
W!i
BWI\
\lIN
F-I>
SO
81
)0---2.
2
~5V
1
110
DBO
MODE
3 081
VRIiI'(+)
,.P 82
4082
~us 83
5 093
84
14 084
85
15 085
86
16 DBO
87
17 087
rZ-- 5V
12
5V
.7pF
LTC11l99
T4
11
VReF(-)
1=4
BB
OF[
1k
18
SNOn
ll'fL
\.
f'-+:
5k
1k
Vee ~5V
13 ~
BWI{
VIN
1
Jo---! 110
2
3
'
DBO
MODE
DBI
\(RIiI'(+)
4082
rZ-5V
12
LTC1'099
5 083
14 084
15 085
16
IJfi6
17 IlB7
18 1lJ'[
11
VRIiI'(-)
SNOn.,..
.,..
t'"
9-93
LTC1099
TYPICAL APPLICATions
TMS320C25 Interface Using RI).Mode
5V
(Bl. Kll. L2)
I (Al0. Bll. H2. L6)
Vee
74AS138
AO~(K~l):"'------Ir- A
Al (K2)
~
... B
-c
A2 (L3)
is
'-"
Vee LhJ----t
YO
... C
(Jll)
A3 (K3)
G2A
Y2 ]
::: G28
Y3 ]
5V--I:: Gl
[
Y4 ]
Y7
Y5 ]
~GNO
TMS320C25
I=:
!-'
Yl ]
Y6 ]
04 (01)
05 (C2)
06 (Cl)
07~(B~2):...-_ _ _ _ _ _ _ _----~--,
v
ANALOG---.r
~
INPUT VOLTAGE ----;: lit,'
:
DO (Fl)
1i8II
(E2)
~
011-'-'------LJQal·
02 (El)
i1B2
:=
REAOY
MSC
STRB 03
(02)
.....:J
fl(
/l91' ;;;;01-1-_+----1
-C *ilf
=:
.....1-1--+-----1
'llIl& :
:::,Rt\\r'
'-----t---+--LJ
c~
...
+
__
. , _ r- Cl _:: C2
iii!C ~
: : '
... ~
1186
L...;.;~(B8~)-,;;;;;;;(C~10~)--=-;.;;;1(~Hl~O)
A.
Vci1L...,J-......-
'"
~ ~~--+-------I
$r~-l-f--f-----.....t
-E :' '=~§::~:::'+I~+J..--1.....·
~6~!-:.(4)-((-33))..r-,..iill--'(1"')
-5,OOOV
~
LTC1099
112 74ASOO
10k
5V
Cl=4,7,.FTANTALUM
C2=O,1,.F CERAMIC
TMS32OC25 Assembly Code for RD· Mode Interface to LTC10$9
0001 0000
0002 0032
AORG >32
0003 0032 CE01
DINT
Disable Interrupts
LDPK >00 Data Page Pointer is 0
0004 0033 C800
0005 0034 8064 LOOP IN 1oo,PAO Input 1099 Data to Address 100
0006 0035 CB13
RPTK
12 Repeat Next Instruction
12Times
0007 0036 5500
NOP
Don't Convert Again Too Soon
0008 0037 FF80
B
LOOP Go for Another Conversion
9-94
T.!.LC1Tc2
LTC1099
TYPICAL APPLICATions
TMS320C25 Interface Using WR·RD Mode
+
T
C7
C61;"_
...--_ _...;.(A_10_,_Bl_l,_H2_,L...;.6)_ _ _ _ _ _ _ _ _ _--";.",..,,~5V
74F138
Vee
AO~(K-'l)~----_n
Al~(K-'2)~----_n
C5
T 0 1pF
A2 (L3)
is (Jll)
A3!-'(K_3)'--_ _ _ _-I
TMS320C25
00 (Fl)
ANALOG
INPUT VOLTAGE
Dl (E2)
D2 (El)
D3 (D2)
READY
(88)
MsC
R/W
(Cl0)
U - - . - - 1 - 5.OOV
STRB
(Hl1)
(Hl0)
Cl, C3, C6=4.7pF TANTALUM
C2, C4, C5, C7, C8=0 lpF CERAMIC
TMS320C25 Assembly Code for WR·RD·Mode Interface to
LTC1099
0001
0002
0003
0004
0005
0006
0007
0032
0032
0033
0034
0035
0036
0037
oooa 0038
AORG >32
CE01
DINT
C800
LDPK
>0
E064 LOOP OUT >64.PAO
CB20
RPTK
>12
5500
NOP
8064
IN >64.PAO
FF80
B
LOOP
Disable Interrupts
Data Page Pointer is ¢
Start LTC 1099 Conversion
Wait for Conversion to Finish
Read LTC1099 Data; Store
in >64
Do Again
9-95
LTC1099
PACKAGE DESCRIPTion Dimensions in inches (millimeters) unless otherwise noted.
JPackage
20·lead Ceramic DIP
-------(2~~~4)--------·1
MAX
t
0025
(0.635)
0.220-0310
(5.588-7874)
~
RAOTYP
j
1
I
2
0.005
1--(0127)
MIN
0160
i[
"";"~ I ~"~
r':;f~'L
_1
~
L
0'-15'
0008-0018
(0203-0457j-
0385:1::0025
~l
H_
.Q.E2.
(3175)
MIN
(5080)
Il
oaBO
1.-(2032)
MAX
--1
0038-0068
0100:1:0010
-It(0965-'727)W(2540±0254)
--.
(9779"0635)
0014-0026
(0356-0660)
NPackage
2O·lead Plastic DIP
~--------(~~6)'--------+·1
MAX
13
-t
12
11
o250:i:::0.010
(6350::1::0254)
~·~MT~~~~~Tn~~10~
0300-0.320
~)
~
0130:1::0005
:'H"'~j
- ~LUjt
U~~~
~ ~1
(~ :;=~: ;) I iI ~
(3J,~5)
~
0125
0065±O 015
(1651:1:0381)-'
9-96
0018:1::0003
(0.457::1:0076)
1--(2540"0254)
H201118
L.YLln
FAr\
U \K
LF198A/LF398A
LF198/LF398
TECHNOLOGY~----p-re-c-is-io-n-S-a-m-p-Ie--a-nd--H-o-Id
Amplifier
FEATURES
•
•
•
•
•
•
•
DESCRIPTion
Guaranteed 6pS Max. Acquisition Time
Guaranteed 0.005% Max. Gain Error
Guaranteed 1mV Max. Offset Voltage
Guaranteed 1mV Max. Hold Step
Very Low Feedthrough 86dB Min.
High Input Impedance under All Conditions
Logic Inputs Compatible with All Logic Families
APPLICATions
•
•
•
•
•
12-Bit Data Acquisition Systems
Ramp Generators
Analog Switches
Staircase Generators
Sample and Difference Circuits
The LF198 is a precision sample and hold amplifier which
uses a combination of bipolar and junction FET transistors to provide precision, high speed, and long hold
times. A typical offset voltage of 1mV and gain error of
0.002% allow this sample and hold amplifier to be used in
12-bit systems. Dynamic performance can be optimized
by proper selection of the external hold capacitor. Acquisition times can be as low as 4pS for small capacitors
while hold step and droop errors can be held below
0.1mV and 30ILV/sec respectively when using larger
capacitors.
The LF198 is fixed at unity gain with 101°0 input impedance independent of sample/hold mode. The logic inputs are high impedance differential to allow easy interfacing to any logic family without ground loop problems.
A separate offset adjust pin can be used to zero the offset
voltage in either the sample or hold mode. Additionally,
the hold capacitor can be driven with an external signal to
provide precision level shifting or "differencing" operation. The device will operate over a wide supply voltage
range from :i:: 5V to :i:: 18V with very little change in performance, and key parameters are specified over this full
supply range.
The LF198A version offers tightened electrical specifications for key parameters.
Acquisition Time
Basic Sample and Hold
VIN=OVTO ±10V
Tj=25°C
V+
iii
10
0.1~
~
w
:=;
;:::
100
0.01%
I,
1000
0.001
0.01
HOLD CAPACITOR (pF)
1.0
9-97
LF198AI LF398A
LF198/LF398
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Input Voltage .............. Equal to Supply Voltage
Logic to Logic Reference Differential
Voltage (Note 2) . . . . . . . . . . . . . . . .. + 30V, - 30V
Output Short Circuit Duration ............. Indefinite
Hold CapaCitor Short Circuit Duration . . . . . . . .. 10 sec
Lead Temperature (Soldering, 10 seconds) ..... 300°C
Supply Voltage. .. . . .. . . .. . . .. . . . .. . . ... :I: 18V
Power Dissipation (Package limitation)
(Note 1) ........................... 500mW
Operating Temperature Range
LF198/LF198A .............. -55°Cto125°C
LF398/LF398A .................. 0°Cto70°C
Storage Temperature Range ....... -65°Cto 150°C
TOP VIEW
ORDER
PART NUMBER
LOGIC
LF198AH
LF198H
LF398AH
LF398H
yHMCKAG£
METAL CAN
TOP YIEW
Y+08LDBIC
LIIGIC
OFfIET
ADJUST 2
INPUT a
LF398J8
LF398AN8
LF398N8
7 REFERENCE
8 C.
Y- 4
6 OUTPUT
J8 PACKAGE HERMETIC DIP
N8MCKAGE
DUAL IN UNE
PlASTIC
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
Input Offset Voltage (Note 6)
RL =10k
Ch=O.OlF
"HOLD" S1ep (Note 4)
Supply Current (Note 6)
Logic and Logic Reference Input
Current
Leakage Current Into Hold
capaCitor (Note 6)
Acquisition Time to 0.1 %
Ch=O.OlF. VOUT=O
T1:?;25°C
9-98
"HOLD" Mode
•
LF198A
TYP
0.5
5
•
Feedthrough Attenuation Ratio
at 1kHz
Output Impedance
Hold capacitor Charging Current
Supply Voltage Rejection Ratio
Differential Logic Threshold
MIN
•
Input Bias Current (Note 6)
Input Impedance
Gain Error
(Nate 3)
1010
0.001
86
LF398A
MAX
MIN
1
2
25
75
MAX
1
2
3
25
10
50
1010
0.001
0.005
0.01
86
96
TYP
UNITS
rrN
mV
nA
nA
11
0.005
0.01
%
%
dB
11
11
mV
mA
96
0.5
0.25
4.5
2
1
4
1
5.5
10
0.25
4.5
2
1
6
1
6.5
10
"HOLD" Mode (Note 5)
10
100
10
100
pA
.1VOUT=10V. Ch=l000pF
Ch=O.OlF
VIN- Vour=2V
VOUT=O
4
16
5
110
1.4
6
25
4
16
5
110
1.4
6
25
pS
pS
2.4
mA
dB
V
0.5
•
90
0.8
2.4
90
0.8
pA
LF198AI LF398A
LF198/LF398
ELECTRICAL CHARACTERISTICS
PARAMETER
CDNDlTlDNS
MIN
Input Offset Voltage (Note 6)
RL =10k
Ch=O.OII'F
"HOLD" Step (Note 4)
Ch=O.OII'F. VOUT=O
Tj 2: 25°C
Supply Current (Note 6)
Logic and Logic Reference In!lut
Current
Leakage Current into Hold
CapaCitor (Note 6)
Acquisition Time to 0.1 %
Hold capac~or Charging Current
Supply Voltage Rejection Ratio
Differential Logic Threshold
5
1010
0.002
•
Feedthrough Attenuation Ratio
at 1kHz
Output Impedance
"HOLD" Mode
LFl98
TYP
1
•
•
Input Bias Current (Note 6)
Input Impedance
Gain Error
(Note 3)
86
MIN
MAX
LF398
TYP
2
3
5
25
75
10
1010
0.004
0.005
0.02
96
80
MAX
7
10
50
100
0.01
0.02
96
0.5
2
4
0.5
0.5
4.5
2
2.0
5.5
10
0.5
4
6
2.5
4.5
2
6.5
10
"HOLD" Mode (Note 5)
30
100
30
200
AVOUT =10V. Ch=1000pF
Ch=O.OI"F
VIN -VoUT=2V
VOUT=O
4
16
5
110
1.4
2.4
4
16
5
110
1.4
•
80
0.8
The. denotes the specifications which apply over the full operating
temperature range.
Nota 1: TI max tor the LFI98/LFI98A is 150°C; Tj max for the
LF398/LF398A is 100°C.
Nota 2: The logic Inputs are protected to ± 30V differential as long as the
voltage on both pins does not exceed the supply voltage. For proper operation. however. both logic and logic reference pins must be at least 2V below
the positive supply and one of these pins must be at least 3V above the
negative supply.
Nota 3: Unless otherwise noted. Vs= ± 15V. TI=25°C. -1 (5V SVINS
+11.5V. Ch =O.OIJtf. RL =10kOand unit is in "sample" mode. Logic reference=OVand logic voltage=2.5V.
FunCTionAL DIAGRAm
80
0.8
UNITS
mV
mV
nA
nA
0
%
%
dB
0
0
mV
rnA
JtA
pA
JtS
JtS
2.4
rnA
dB
V
N1IIII4: The hold step is sensitive to stray capacitance coupling between input logic signals and the hold capacitor. lpF. for instance. will create an additional 0.5mV step with a 5V logic swing and a O.OIJtf hold capacitor.
Magnitude of the hold step Is Inversely proportional to hold capacitor value.
Nota 5: Leakage current is measured at a junction temperature of 25°C.
The effects of junction temperature rise due to power dissipation or elevated
ambient can be calculated by doubling the 25°C value tor each 11°C increase in chip temperature. Leakage Is guaranteed over full input signal
range.
NIIIII 6: These parameters are guaranteed over a supply voltage range of
±5Vto ±18V.
OFFSET
2
----;;-------,
I
I
OUTPUT
/
"
"
t[>
LOGIC
LOGIC
REFeRENCE
8
"
I
7
Cl
J
1500
16
HOLD
L--"W_-"'::- CAPACITOR
I
L ______________ .J
9-99
II
LF198AI LF398A
LF198/LF398
TYPICAL PERFORmAnCE CHARACTERISTICS
Aperture Time*
500
450
400
V+=V-=15V
4VOUTSl mV
4VIN=10V
350
NEGATIVE
INPUT~~
_ 300
! 250
:;;
V
;::: 200
150
100
5D
"
V
L'
V ,..- V
,..- i-"""
V
:E
/
1
~
~
l"F
0
25 50 75 100 125 150
JUNCTION TEMPERATURE ('C)
~
0.6
~ropr
-lD
...-
,,/
..... /
D.4
O.l"F
0.2
D'----'-----'_...l-____'__-'-....J.._'---I
D.l
lDOO
1
lD
lDD
INPUT SLEW RATE (V/mSEC)
-5D -25
D 25 5D 75 lDD 125
JUNCTION TEMPERATURE ('C)
• See Def~ition of Terms
·See Definition of Terms
Hold Step vs Input Voltage
Hold Step vs Logic Slew Rate
15D
1.6
1.2
10
'"
./"
1.2
INPUT STEP
Hold Step
1.0
1.4
j
;::: 0.8
100
ti~
f=
-~E
·See Definition of Terms
!...
1.6
l000pF
-lDD
-50 -25
V+=V-=15V
SETTLING TO 1mV
1.8
HOLD
CAPACITOR
O.Ol"F
F
~
.......
o
"Hold" Settling Timet>
Dynamic Sampling Error*
100 V+ V
15V
T· 25'C
11111
I
11111 I
10
Ch=D.Ol"F·
TI=25'C
D.8
ME.MI1I
I
D.4
Ti--~
~
- t::- ~5'C....
~
~-D.4
r\. L
-D.8
V\
0.1_l1li
-1.2
0.01 L.....J-W..LW.LL.......1...J....1..LW.LL.......1-U.WIIl--l:>J..I-WJJI
190pF
1000pF
O.Ol"F
O.l"F
HOLD CAPACITOR
!
-1.6
-15
-lD
Tj-25'C
I
-5
D
5
INPUT VOLTAGE (V)
ti
~
2.5 H-NJttttH-+tttttlH-t+tttttl-+-++tttttl
2.0 1-f-+t1+tl1l"rl-+t+tIttI--+Httttll--+t++tttll
1.5 H-+t+ttttH-'ldttttlH-t+tttttl-+-++tttttl
H-+t+ttttH-+t+-tmk=-t-t+tttttl-+-++tttttl
1.0
"'
0.5 H-+t+ttttH-+t+ttttH411-tttttl-t-t+tttttl
_ D.5 L-lc...U.lllllL.......1...J...J..LWJ.L-l...J...J.LWlJ----'...J...LllWI
lD
15
D.Dl
D.l
1.D
lD
LOGIC SLEW RATE (V/"S)
lDD
• Amplitude of hold step scales
inversely with hold capacitor value
Input Bias Current
Capacitor Pin Leakage
Output Droop Rate
lDDk
25
10 0
20
10k
10- 1
15
'[ 10
~
5
'"
B
0
i'-
-5
'"
.......
...........
"-.. ......
1D
L
10-
-10
-15
-50 -25
9-100
-50-~
1iRMlli
lD-4L.....J...J...J.LWlJ----'...J...J.LWlJ~...J...L~____'_~~
1
0
25 50 75 100 125 150
JUNCTION TEMPERATURE ('C)
3
D ~ 50 ~ ~
JUNCTION TEMPERATURE ('C)
m
~
l00pF
lDOOpF
D.Dl"F
D.l"F
HOLD CAPACITOR
LF198AI LF398A
LF198/LF398
TYPICAL PERFORmAnCE CHARACTERISTICS
Output Short Circuit Current
20
18
"-
..-
I-
z
w
'"'"
a
"-
14
......... SOURCING
8
- -..........
~NKING
OL-~~
-50 -25
JW~b"
:s
.,w
. . . . r-....
S
z
!
MODE
~100
~
......
TI=25"C
RL=10kO
IIIIII
120
12
10
Gain Error
0.3
140
16
.s
Output Noise
160
~
~ I'"'---..
I'-~-- ---
g
~
:>
60
40 SAMPLE
MODE
20
__~-L~L-~~~
I
0.1
~
80
<>
"-
,!
10
;!;
100
-0.1
LSLrE=0'i7%
ii!
III
o
0
25 50 75 100 125 150
JUNCTION TEMPERATURE I"C)
D.2
lk
10k
FREQUENCY 1Hz)
Feedthrou gh Rejection Ratio
50
<>
'"
~
5z90
1--++++jjjjj-Ch=O.Ol~_-+i--mIl---++I++HH 30 ~ ~
80
1--+~~-+~~~~~~++~20
70
S
<>
-
10k
lOOk
1M
FREQUENCY 1Hz)
...'" i"";; 100
Ch- 1OOOpF
~
aV-l0V
MEASURED 1m. AFTER ISTART 0f,,~OLD MODE
§:0.01
POLy$fWi~NE
~
z
15
i!S
>=
~
60
-
r-..
POSITIVE
SUPPLY
NEGATIVE
SUPPLY
~
40
~
20
50
o
10
100
lk
10k
FREQUENCY (Hz)
lOOk
1M
100
lk
10k
lOOk
FREQUENCY 1Hz)
Capacitor DielectriC Absorption
0.001
~~~LO~
~
§: 0.01
~FL
l"-
~
i--':POLYPROPYLENE
I:>'
z
<>
<>
5
:il
~
'" 80
~
Capacitor Dielectric Absorption
0.001
10
120
...
60
10M
-5
0
5
OUTPUT VOLTAGE (V)
T =25"C
V+=V-=15V
VOUT=OV
140
::l
,-,--,-Ill
111J.ll11111"--11L...L.1.JJJll.!V,--,-""C""h~=°.......J....LllllllJ 0
lk
ch-~i~~~F
S ;;- 100
40i
~hlfl~II:"FkHfjjl/Hfr"lftIttt--++++lt/tll0
ch"H'~~FI
110
-<
V+=V-=15V
V,N=10Vp-p
T, =25"C
111111111
I
-10
Power Supply Rejection
160
120
~~
-0.2
-0.3
-15
lOOk
-
I-- N
0.1
li:
MICA
~
ll!
~
1.0
1",
I0.1
1.0
10",
100",
SAMPLE TIME
1m.
10m,
:~~;PLETIME=
1",
10",
100",
1m.
TIME IN HOLD MODE
10m.
9-101
LF'198AI LF398A
LF198/LF398
TYPICAL PERFORmAnCE CHARACTERISTICS
Output Transient at Start of
Sample Period
Output Transient at Start of Hold
Mode
ALL VALUES OF Ch
0.4
+5mV
~
w
"
E
,.~ -5mv
'\ "'~.01%
'"
1\ v
(1mV)
SmLING~O.B,,"
v
H\--+--+--+----+----l
0.2
~ -0.2 ~-\+----,7"t---+----+----l
:!l
~-0.4~~~=
:!!~
....
'"
~
5
0.4
0.2
I-I-\---+-f--+--+---+__----I
-0.2 ~-+-\o
0.2
0.4
0.6 O.B 1.0
TIME(,...)
1.2
1.4 1.6
2
3
TIME (PS)
APPLICATions InFORmATion
Hold Capacitor
For fast sample and hold applications, the size of the hold
capacitor is critical. A low value will give fast acquisition,
but will also increase errors due to hold step, and droop
caused by amplifier bias current The capacitor should be
made as large as possible, consistent with acquisition
time and dynamic sampling error requirements. CapaCitors larger than O.1JLi= have an additional problem. They
are generally not available in the low loss dielectrics like
Teflon, Polystyrene, and NPO, at least not at a reasonable
price and size. Mylar, even with its poor dielectric
absorption properties, may be a reasonable choice where
lIery long sample times are used and low droop rates are
needed.
Dielectric absorption in the hold capaCitor can often be the
major source of error in asample and hold. The equivalent
•'circuit" of a typical capaCitor is shown below with
parallel RC networks used to model dielectric absorption.
9-102
Typical Hold Capacitor
Equivalent Circuit
Ca. Cb~0.01 TO 0.1 Ch
Ra. Rb GENERATE TIME CONSTANTS
OF 0.1-50 MILLISECONDS WITH Ca. Cb
One can see that rapid changes in capacitor voltage will
not be tracked by the internal parasitic capacitors
because of the resistance in series with them. This leads
to a "sag" effect in the hold capacitor after a sudden
change in voltage followed by rapid switch to the hold
mode. The capacitor remembers its previous state via the
charge on the internal parasitic capacitance and sags
LF198AI LF398A
LF198/LF398
APPLICATions InFoRmATion
back slightly toward the previous voltage. The magnitude
of the sag depends on the voltage change and the time
spent sampling the new voltage. Several time constants
are typically evident in the sag, although some capacitors
tend to exhibit a single time constant, while others show a
sag that indicates a blending of many time constants. The
curves labeled CAPACITOR DIELECTRIC ABSORPTION
show the amount of sag found after a 10V step with sample time at the new voltage and hold time at the new
voltage as variables. It is obvious that sag problems are
minimized by long sample times and short hold times.
This is often in conflict with basic sampling requirements,
but one point should be made: if at all possible, keep the
sample and hold amplifier in the "tracking", or sampiing, mode as much as possible to maximize the time the
hold capacitor spends near the voltage at which it will
eventually "hold".
The best capacitor for sample and hold applications is
Teflon. It is clearly superior with regard to dielectric absorption and operates over the full - 55°C to 125°C
temperature range. If size or price becomes a problem,
the second choice for full temperature range operation is
"NPO", or "COG" ceramic units. Some care must be
used here-not all NPO capacitors use the low dielectric
constant ceramic necessary for low dielectric absorption.
For lower temperatures (s 70°C), Polystyrene has traditionally been the best hold capacitor. The best units are
cylindrical and fairly large-there seems to be a strong
correlation between small size and poorer dielectric performance. Polypropylene has nearly the same absorption
properties as polystyrene and offers 85 DC operation. It
also tends to be smaller. Again, stay with cylindrically
wrapped units. Other standard dielectrics such as mica,
glass, mylar, and ordinary ceramic are much worse with
regard to dielectric absorption. Mylar is sometimes used
for large values when the ratio of sample to hold time is
large and extremely low droop is required.
Dynamic Sampling Error
A significant sampling error can occur in any sample and
hold if the input is moving when the unit is put into the hold
mode. The two major causes for this error are digital delay in
switch opening and analog delay across the hold capacitor.
The switch opening delay is obvious and leads to a "held"
output error of (dv/dt) X (Td) , where dv Idt is the slew rate
of the input signal and Td is switch delay. In the case of the
LF198, Td is approximately 150ns, giving a 4.5mV error
when sampling the zero crossing of a 5V (peak) sine wave
at 1kHz (dv/dt=A-2711=5-21/"-103). The analog delay is
the difference between input signal and capacitor voltage. It
is determined by the RC product of the hold capaCitor and
the effective series resistance, which in the case of the
LF198 is about 1500. This analog delay with a 0.01p.F hold
capaCitor is R-C = 150 X 10-8 = 1.5pS, or about ten times
the delay of the switch. The sign of the analog delay is
negative-the held output is related in time to the input
voltage before the hold command was given. The overall
dynamic sampling error is the sum of the digital and analog
errors. The curve labeled Dynamic Sampling Error will be
helpful in estimating these errors as afunction of input slew
rate and hold capacitor size.
Dynamic sampling error can be reduced by a factor of ten
or more by inserting a delay in the logic input so that the
"hold" command is delayed by an amount equal to the
RC time constant of the LF198 and external hold capacitor. For a 0.01p.F hold capaCitor and the 1500 resistor internal to the LF198, this is 1.5pS. A simple RC network
can be used in front of the logic input for delays up to
"'" 1pS. Longer delays require the addition of a logic gate
to speed up the rise time of the delayed signal. See LOGIC
RISE TIME in this section for further details.
Hold Step
Hold step is the small voltage step (after settling) seen at
the output of a sample and hold amplifier when it is
switched from the sample mode to the hold mode with a
steady DC input. Hold step is typically the result of, or can
be modeled as, a fixed quantity of charge transferred to
the hold capaCitor as a result ofthe internal switching that
occurs during the hold command. In the case of the
LF198, that charge is about 5 picocoulombs, giving a
hold step of 0.5mV for a 0.01p.F hold capacitor and 5mV
for a 1000pF hold capacitor. (V=Q/C.) Hold step is
reasonably independent of logic amplitude if care is taken
to minimize the stray capaCitance between the logic input
9-103
LF198A/LF398A
LF198/LF398
APPLICATions InFORmATion
and the hold capacitor. With thoughtful layout, including
the guarding technique shown below, stray capacitance
should be under 0.3pF, limiting charge variations to less
than 0.3 picocoulombs per volt.
Guarding Technique
A fairly accurate model for hold step is a fixed charge
injected into the hold capacitorby the switch turn-off circuitry. The magnitude of the charge is reasonably independent of logic input amplitude. The resulting change in
hold capaCitor voltage is Q/Ch. The charge, Q, is typically
Spicocoulombs, giving a O.SmV hold step with a 0.011'F
hold capaCitor. Since most sample and hold amplifiers are
"used," i.e., have their outputs read by an A to Dconverter, etc., during the hold mode, hold mode offset is
arguably much more important than sample mode DC
offset.
LOGIC
REFERENCE
HOLD
CAPACITOR
BOTTOM VIEW
Use 10-pin layout. Guard around Ch is tied to output.
Hold step varies slightly with analog input voltage (see
curves). Atypical unit will change at 0.4 picocoulombs per
volt. This manifests itself as again error when the amplifier
is switched to the hold mode. With a 0.01# capacitor, the
resulting gain error will be (0.4 PC/v)/0.01I'F =0.004%.
This gain error is in the opposite direction of DC (sample
mode) gain error. At high values of hold capacitor, DC gain
error will dominate and gain will be slightly below unity
(0.002%). For low value capacitors « 0.01I'F), hold step
induced gain error will dominate and hold mode gain will
be Slightly above unity. Zeroing out hold step does not
change the variation of hold step with regard to input
voltage.
9-104
Offset Zeroing
A sample and hold amplifier has two distinct offset voltages. The first is just the DC offset of the amplifier while in
the sample or "tracking" mode. It is identical to the input
offset of any operational amplifier. The second offset
voltage is the sum of the DC offset plus a dynamic term
called hold step. Hold step is a change in output voltage
when the amplifier is switched from sample mode to hold
mode, with the input held steady. This second offset is
often called hold mode offset. It can be less than or much
greater than the DC offset, depending on the magnitude
and sign of hold step.
DC offset adjustment is accomplished with a 1k low TC
cermet potentiometer tied to V+ with 0.6mA flowing
through it and the wiper tied to pin 2. This allows pin 2 to
be moved :I: 300mV around its nominal voltage (0.3V
below V+). Offset adjustment range is :I: 9mV, and the
adjustment procedure nominally improves offset drift
when the DC offset is reduced to zero. This offset
method can be used to zero out hold mode offset, but at
the expense of some induced offset drift. Each millivolt of
hold step offset that is corrected by this method introduces 3.31'V;oC drift. For 0.002",F or larger hold
capacitors where hold step is afew millivolts or less, this
is a practical solution to hold mode offset. In precision
wide temperature range applications, or where Ch is less
than 0.002",F, a separate hold mode zeroing method
should be used. The circuit shown in the application section using a logic inverter and a SpF capaCitor is recommended (DC AND AC ZEROING).
LF198AI LF398A
LF198/LF398
APPLICATions InFoRmATion
Logic Fall Tima
Hold step is independent of logic input fall time only for
fall times faster than 10VI pS. For instance, as logic fall
time changes from 1OV I pS to 1VIpS, hold step with a
O.01p.F hold capacitor will typically increase from O.25mV
to 1.0mV. See the curve labeled HOLD STEP vs LOGIC
SLEW RATE for further data pOints. If logic slew rate is not
constant, use the value at the threshold point (1.5V with
respect to logic reference). An RC network will have a
discharge slew rate of VL/RC, where VL is the logic
threshold of the LF19B. The delay generated by the network will be RC-ln(V+ IVL), where V+ is logic amplitude. For a 1pS delay, with 5V logic, an RC time constant
of O. BpS is needed. This has a slew rate of 2V I pS at
threshold, which will slightly degrade hold step. It is obvious that an RC delay network significantly longer then
1pS will have a large effect on hold step. If longer delays
are required, they should be followed by several inverter
stages or a Schmitt trigger to increase slew rate.
Adding Delay to LogiC Input
y+
ANALOG
INPUT
I
e
3
'INYERTERS MAY BE ELIMINATED
FOR RCs3,..
lOGIC InpUT COnFIGURATiOns *
TTL and CMOS
3VSVL (Hi State)s1UV
CMOS
7VSVL (Hi State)s15V
Up Amp Drive
Y+
~
2Dk
nSA~
...J
H
13V-
AMPLE
8.2k
-"IIIIr-t
LHDLD
-13V
HOLD
4.7k
THRESHOLD = 1.4V
THRESHDLD=D.6 (Y+)+1.4V
V+
Y+
2Dk
Rl'
n
...J
HOLD
7
LSAMPLE
THRESHOLD = 1.4V
'SELECT FOR 2.BV AT PIN B
THRESHOLD = +4V
2.8V
RB
5.6k
n
--1
HDLD
7
LSAMPLE
3Dk
THRESHOLD=D.6 (Y+)-1.4V
1 3 V - HDLD
-13V
"::"
B.2k
SAMPLE
4.7k
THRESHOLD = - 4V
·The logic input signal high state must be at least 2V below the positive supply voltage of the LF19K
9-105
LF198AI LF398A
LF198/LF398
TYPICAL APPLICATions
X1000 Sample and Hold
Sample and Difference Circuit
(Output Follows Input in Hold Mode
and Resets to VB In Sample Mode)
VOUT=VB+t.VJN (HOLD MODE)
R1
OF~~~ ~.1\111~""'-~ADJUST
n
.J
RESET
L
TRACK
"THIS RESISTOR PROTECTS INPUT
FROM SURGE CURRENTS, BUT INCREASES
SAMPLE TIME. IT CAN BE EUMINATEO
IF INPUT IS OTHERWISE PROTECTED.
"FOR LOWER GAINS, THE LT100B MUST BE FREQUENCY COMPENSATED
USE - W!PF FROM COMP 2 TO GROUND
Ramp Generator with Variable Reset Level
Integrator with Programmable Reset Level
V+
RESET
LEVEL
INPUT
RESET-n
INTEGRATE.J
15V
L
*_
"SELECT FOR RAMP RATE t.v =~
h:1Dk
AT \n2J~bJ
DIFFERENTIAL {
C
INTEGRATING
b
INPUT -.l\1li'\,-_-'"'1
R3
1M
1%
-15V
R4
20Dk
1%
VOUT(HOLD MODE) = [ (R11Cb)
9-106
f~
V,Nd
II I
+ [VR
LF198AI LF398A
LF198/LF398
TYPICAL APPLICATions
Output Holds at Average of
Sampled Input
Fast Acquisition, low Droop Sample and Hold
15V
15V
V+
INPUT
10pS---I
SAMPLE~
L
no
T
'5V
n
Ch
5m.-!
SELECT (Rh)(Ch»> 211"11: (Min)
DC and AC Zeroing
2·Channel Switch
DC
24k
~
15V
Vos 15V
1k ZERO
"A" SELECT
5V-n
5pF
OV.J
"B" SELECT
L
AC (HOLD STEP) ZERO
Gain
10k
Z,N
BW
Crosstalk
@1kHz
Offset
1±0.02%
10'''n
=1MHz
-90dB
1±0.2%
47kll
=400kHz
-90dB
,.601V
,.7501V
9-107
LF198A/LF398A
LF198/LF398
TYPICAL APPLICATions
Staircase Generator
.J
15V
>...::....-.....-_-OUT
RESET
5V-n
~~
~
~
C
5V~n LOCKn
OV.J
L.J
':"
L
47k
---~~-4-4~'V'v-"
T';"
C3
C2
300PF
15V
1
6
O.01~T
R7
R6"
50k
7
8
1N914
T
C4
300 PF
Capacitor Hysteresis Compensation
R8
12k
':"
4.7k
02
R4
8.2k
15V
R9
3k
'SELECT FOR STEP HEIGHT
50k- =1V STEP
Differential Hold
v+
...------..!fi:l. •£)~.~~- OUTPUT
OUTPUT
Ch
R1
R2
200k
R3 u
200
200k
C1'
JQ.2~F
':"
'SELECT FOR TIME CONSTANT C1 = 1o'iJk
"ADJUST FOR AMPLITUDE
9-108
=VS WHEN IN
HOLD MODE
=(VS+VCM) WHEN IN
SAMPLE MODE
LF198A/LF398A
LF1981 LF398
TYPICAL APPLICATions
isolated Temperature Sensor
;7
r-~~__~__
Rl
120k
Tl 6
•
R2
1.5M
lN914
nLM135
2U
'OmV/ oK
TI = TRW PC-SSO-32
15V
Cl
O.I,.FT
5 OUTPUT
1~\r'
-15V
R4
2.7k
R3
33k
-15V
'COMPENSATES FOR TRANSFORMER RESISTANCE.
SELECT FOR FLAT OUTPUT FROM LFI98 WHILE
IN SAMPLE MODE.
Pulse Width to Vohage Converter
15V
Cl
0.1,.F
02
R2
3k
03
04
C2
1000pF
POLYSTYRENE
05
5V
R3
12k
R5
lk
-5V
5V
R4
lk
INPUT
5,14
1
Q
3,4
a6
R6
lk
74L121
REF
R7
10k
-5V
02-05
lN914
5V
C4
l000pF
'READ ""'" AFTER
GOES LOW
a
t FOR REPETITIVE PULSES
ONLY. INCREASE C5 FOR
,,,,0kHz
9-109
LF198AI LF398A
LF198/LF398
TYPICAL APPLICATions
Motor Speed Controller Needs No Tachometer*
'BACK EMF OF MDTOR IS SAMPLED
AND USED TO CONTROL SPEED.
"SELECT FOR OPTIMUM LOOP STABILITY.
C3 IS NON POLARIZED
tOllS USED FOR START-IIP.IT
LIMITS DUTY CYCLE TO -75%
DEFiniTion OF TERms
Hold Step: The voltage step at the output of the amplifier
when switching from sample mode to hold mode with a
constant analog input voltage and a logic swing of 5V.
Hold Settling Time: The time required for the output to
settle within 1mV of final value after a hold command is
initiated.
Acquisition Time: The time required to acquire, within a
defined error, a new analog input voltage with an output
change of 10V. Acquisition time includes output settling
time and includes the time required for all internal nodes
to settle so that the output is at the proper value when
switched to the hold mode.
Dynamic Sampling Error: The error introduced into the
held output voltage due to a changing analog input at the
time the hold command is given. Error Is expressed in mV
with a given hold capaCitor value and input slew rate.
Note that this error term occurs even for long sample
times.
Gain Error: The ratio of output voltage swing to Input
voltage swing in the sample mode expressed as a percent
difference.
Aperture Time: The delay required between "Hold"
command and an input analog transition, so that the transition does not affect the held output.
9-110
~
:z:
1ft
~
~
~
T
41
a
LOGIC
REF
LOGIC
'1'
.....
y+
:!I
n
o
j
:::II»
::::D
a
411
05'
:~ II ~,,-~~y+y~
50.
8k
.,.,
am
alB
Q&Q,..r
f16' .JlI24
m~
Q22~
~ ~&
Ok
a6~
6k
~
QM~
1.11<
251<
'"
'"
.......
"Tl
•
---'
..0
"Tl(X)
CAP
.......
.......
•
~750
'7'
m
cp
'"
~aaa
~
<»>
.........
(X) ........
•
"Tl
"TlW
w..o
•
..0 (X)
(X»>
LF198AI LF398A
LF198/LF398
PACKAGE DESCRIPTion Dimensions in inches (millimeters) unless otherwise noted.
H Package
Metal Can
J8 Package
8 Lead Hermetic DIP
DL
s-t
0.220-0.310
15.588-7.874)
0.050
.1
•
~
~
---±
4
I
O.055
---+
PlANE 112 70-19 05)
t
11.200
15.051l)~
-'~E
r
MAX
l~O~:)+
MAX
~
~
~
~-Lljt (~::~J:~)
('a:)
,
II
\1
"
II
......1"
~
(0.356-0.584)
TV'
_~;'::0)
'R'
t jO
,
"
(::!~:I
MIN
I
0.125-0.200
GLASS
(1.397)
II
o•.w
~
(7.388-8.128)
BSC·
..- RADTYP
I
'LEAOS WITHIN 0.007 OF T1IUE POS1TION (ll') AT DAUGE PLANE
O~
I
llmax
150'C
Oja
LF19B/LFI98A
15D'C/W
45'C/W
LF39B/LF398A
I
lDO'C
150'C/W
45'C/W
N8 Package
8 Lead Plastic
~-.l0....10280
~116'51IT'1')
JL
~
(0.508)
~t':'"
~
~
I
0.040 MAX
0.050
(1.016)
(1.524)
so
0.370-0.400
(9.400-10.16)
..._.!]M.
(0.121)
MIN
b->=ro=<~~~
A
L
,,
"
-r
,,
,
II
jO~
"
o•.n ,
0.290-0.310
(7.388-7.874)
'LEAOS WIIHIN 0.007 OF TRUE POsmON (ll') AT GAUGE PLANE
9-112
7'±5'
(0.2113-0.381)
TV'
~
(0.2113-0.381)
TV'
~7LTECIONO~OO.~~~____L_F3_98_S8
~
Precision Sample and Hold
Amplifier
FEATURES
•
•
•
•
•
•
•
DESCRIPTion
41's Typical Acquisition Time
Guaranteed 0.01 %Max. Gain Error
2mV Typ. Offset Voltage
2.5mV Max. Hold Step
Very Low Feedthrough 80dB Min.
High Input Impedance Under All Conditions
Logic Inputs Compatible with All Logic Families
APPLICATions
•
•
•
•
•
12-Bit Data Acquisition Systems
Ramp Generators
Analog Switches
Staircase Generators
Sample and Difference Circuits
The LF398 is a precision sample and hold amplifier which
uses a combination of bipolar and junction FET transistors to provide precision, high speed, and long hold times.
Atypical offset voltage of 2mV and gain error of 0.004% al·
low this sample and hold amplifier to be used in 12·bit systems. Dynamic performance can be optimized by proper
selection of the external hold capacitor. Acquisition times
can be as low as 41's for small capacitors while hold step
and droop errors can be held below 0.1mV and 30/LV/sec respectively when using larger capacitors.
The LF398 is fixed at unity gain with 101°0 input
impedance independent of sample/hold mode. The logic
inputs are high impedence differential to allow easy in·
terfacing to any logic family without ground loop problems. A separate offset adjust pin can be used to zero the
offset voltage in either the sample or hold mode. Addi·
tionally, the hold capacitor can be driven with an external
signal to provide precision level shifting or "differencing"
operation. The device will operate Qver a wide supply voltage range from ± 5V to ± 18V with very little change in
performance, and key parameters are speCified over this
full supply range.
Basic Sample and Hold
Acquisition Time
V,N=OV TO ±10V
Tj=,25'C
v+
irl
10
0,1r
~
1;;£
;::
100
0,01%
to\.
I~
1000
0,001
0,01
HOLD CAPACITOR ("F)
1,0
9-113
LF39BSB
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Input Voltage .................... Equal to Supply Voltage
Logic to Logic Reference Differential
Voltage (Note 2) ......................... +30V, - 30V
Output Short Circuit Duration .................. Indefinite
Hold Capacitor Short Circuit Duration ............. 10 sec
Lead Temperature (Soldering, 10 seconds) ......... 300°C
Supply Voltage ................................. ± 18V
Power Dissipation (Package Limitation)
(Note 1) ...................................... 500mW
Operating Temperature Range ............... O°C to 70°C
Storage Temperature Range ............. - 65°C to 150°C
ORDER
PART NUMBER
TOP VIEW
··U~'
OFFSET
ADJUST 2 "
INPUT 3 .
v-
LF398S8
LOGIC
7 REFERENCE
6 C,
5 OUTPUT
4
pART MARKING
S8 PACKAGE
PLASTIC SO
398
ELECTRICAL CHARACTERISTICS (Note 3)
PARAMETER
Input Offset Voltage (Note 6)
CONDITIONS
MIN
•
Input Bias Current (Note 6)
RL = 10k
Feedthrough Attenuation Ratio at 1kHz
Output Impedance
Ch=O.Q1~F
"HOLD" Mode
"HOLD" Step (Note 4)
Supply Current (Note 6)
Logic and Logic Reference Input Current
Leakage Current Into Hold Capacitor (Note 6)
Acquisition Time to 0.1 %
10
•
Input Impedance
Gain Error
•
10'0
0.004
80
•
Ch=O.Q1~F, VOUT=O
T2:25°C
"HOLD" Mode (Note 5)
i1VOUT= 10V, Ch= l000pF
Ch=O.Ol~F
Hold Capacitor Charging Current
Supply Voltage Rejection Ratio
Differential Logic Threshold
VIN- VOUT=2V
VOUT=O
The • denotes the specifications which apply over the full operating
temperature range.
Note 1: Tj max for the LF398SS is 100°C.
Note 2: The logic inputs are protected to ± 30V differential as long as the
voltage on both pins does not exceed the supply voltage. For proper opera·
tion, however, both logic and logic reference pins must be at least 2V below
the positive supply and one of these pins must be at least 3V above the
negative supply.
Note 3: Unless otherwise noted, Vs = ± 15V, TJ= 25°C,
-l1.5VsVIN S = +l1.5V, Ch=o.ol~F, RL = 10k!! and unit is in "sample"
mode. Logic reference = OV and logic voltage = 2.SV.
9-114
LF398
TYP
2
80
O.S
96
0.5
0.5
4.5
2
30
4
16
5
110
1.4
MAX
7
10
50
100
0.Q1
0.02
4
6
2.5
6.5
10
200
UNITS
mV
mV
nA
nA
II
%
%
dB
II
II
mV
mA
~A
pA
~s
~
2.4
rnA
dB
V
Note 4: The hold step is sensitive to stray capacitance coupling between
input logic signals and the hold capacitor. 1pF, for instance, will create an
additional O.SmV step with a SV logic swing and a O.Ol~F hold capacitor.
Magnitude of the hold step is inversely proportional to hold capacitor value.
Note 5: Leakage current is measured at ajunction temperature of 2SoC.
The effects of junction temperature rise due to power dissipation or elevat·
ed ambient can be calculated by doubling the 2SoC value for each 11°C in·
crease In chip temperature. Leakage Is guaranteed over full input signal
range.
Note 6: These parameters are guaranteed over asupply voltage range of
±5Vto ±lSV.
SECTion 10- RS232 InTERFACE
10-1
INDEX
SECTION 10-RS2321INTERFACE
INDEX ..................................... ,................................................................
SELECTION GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PROPRIETARY PRODUCTS
LTl015, High Speed DualLine Receiver .. ... ...... ... . .. .... ... ... ..... ... . .. ...... . .. ... . .. . .. . . ... . .... ....... . .
LTl030, QuarJ,LowPowerLineDriver.. ..... ... ... ... . ................ ... . ... .. ... ... .. . . .. . .. ... . . . ... .... ... .. . .
LTl03OCS, Quad Low Power Line Driver ..........................................................................
LTl032, Quad Low Power Line Driver. . .. . . . . . . .. . .. . . .. . . . . . . . . . . . . . . . . . . . .. . . . . . . . .. .. . . . . . .. . . . . . . . . . . .. . .
LTl039,RS232DriveriReceiverwithShutdown ....................................................................
LTC 1045, Programmable Mlcropower Hex TranslatorIReceiverIDriver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTl080, Advanced Low Power5V RS232 Dual DriverIReceiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTlOBI, Advanced Low Power 5V RS232 Dual DriverIReceiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1080CSIL TlOBICS, 5V Powered RS232 DriverIReceiver with Shutdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTl130, 5-DriverI5-ReceiverRS23~ Transceiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTl131, 5-Driver14-Receiver RS232 Transceiver with Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1132, 5-DriverI3-ReceiverRS232 Transceiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTlI33, 3-DrlverI5-ReceiverRS232 Transceiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTlI34, 4-Driver14-Receiver RS232 Transceiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . ..
LTl135, 5-Driver13-Receiver RS232 Ti'ansceiver without Charge Pump ...................................................
LT1136, 4-Driver15-Receiver RS232 Transceiver with Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTl137, 3-Driver15-Receiver RS232 Transceiver with Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTl138, 5-Driver13-Receiver RS232 Transceiver with Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1139, 4-DriverI4-Receiver RS232 Ti'ansceiverwith Shutdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1140, 5-Driver13-Receiver RS232 Transceiver without Charge Pump .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1141, 3-Driver15-Receiver RS232 Transceivllr without Charge Pump ...................................................
LT1180, Advanclld Low Power 5V RS232 Dual DriverIRliceiver with Small Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1181, Advanced Low Power 5V RS232 Dual DriverIReceiver with Small Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1280, Advanced Low Power 5V RS232 Dual DriverIReceiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT1281, Advanced Low Power 5V RS232 Dual DriverIReceiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
10-2
10-2
10-3
13-6
10-5
10-9
10-11
10-19
10-27
10-43
10-43
10-51
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-55
10-67
10-67
10-75
10-75
I'--rLlnl1\Q
...A...,
INTERFACE PRODUCTS SELECTION GUIDE
TECHNOLOGyr---------
mll.ITAAY, commEACIAl AnD InDUSTAIAl
PART NUMBER
DESCRIPTION
LT1030C
Quad Micropower RS232 Line Driver
LTl032C, I, M
Quad Micropower RS232 Line Driver
LT1039C,I, M
Triple RS232 Driver/Receiver with
Shutdown
LT1039C·16
Triple RS232 Driver/Receiver
LT1060C, i, M
.+SV Powered RS232 Driver/Receiver
with Shutdown
LTll6OC,I, M
+5V Powered RS232 Driver/Receiver
with Shutdown
LT1061C,I, M
+ SV Powered RS232 Driver/Receiver
LT1181C,I,M
+ 5V Powered RS232 Driver/Receiver
LTC1045C, M
programmable Micropower Hex Level
Translator/Receiver/Driver
LTll3OC,M
LT1131C M
LTII32C,M
LTII33C M
LTII34C,M
LT1135C M
LTII36C, M
LT1137C, M
LTII36C,M
LT1139C M
LT114OC,M
LTI141C,M
+ 5V Powered RS232 Transceiver
+ 5V Powered RS232 Transceiver
+ 5V Powered RS232 Transceiver
+ 5V Powered RS232 Transceiver
+ SV Powered RS232 Transceiver
+5V Powered RS232 Transceiver
+ 5V Powered RS232 Transceiver
+ 5V Powered RS232 Transceiver
+ 5V Powered RS232 Transceiver
+ 5V Powered RS232 Transceiver
+SV Powered RS232 Transceiver
+5V Powered RS232 Transceiver
NUMBER OF NUMBER OF
MAXIMUM
SHUTDOWN PACKAGES
IMPORTANT FEATURES
DRIVERS
RECEIVERS SUPPLY CURRENT FEATURE AVAILABLE
Quad RS232 Driver, Can be Strobed
4
0
lmA
X
J,N,S
Off lor Zero Supply Current. Supply
Rangefrom ±SVto ± ISV.
Quad RS232 Driver. Can be Strobed
4
0
lmA
X
J,N
Off for Zero Supply Current. Supply
Range from ± SV to ± ISV.
15mA
X
J,N
Triple RS232 Driver/Receiver Includes
3
3
Shutdown Feature. Bias Pin Allows
One Receiver to Remain Active while
the Rest of the Device is Shut Down.
Rugged Bipolar Design.
3
3
15mA
J16,N16 16Pln Version of LT1039 without
Shutdown Feature. Pln·For·Pin
Compatible with MCI4S406, Rugged
Bipolar Design Less Subject to ESD
Damage and Latchup.
Dual RS232 Driver/Receiver with Built
2
2
22mA
X
J, N,S
In +SV to ± 9V Power Converter.
Shutdown Feature Allows Device to
be Turned Off When Not Used, Saving
Power.
Dual RS232 Driver/Receiver with Built
2
2
22mA
X
J,N,S
In + 5V to ± 9V Power Converter.
Shutdown Feature Allows Device to
be Turned Off When Not Used, Saving
I
Power. Uses smalierO.l~F
capacitors.
16 Pin Version of LT1060without
2
2
22mA
J,N,S
Shutdown Feature. Pin·For·Pln
Compatible with MAX·232, Rugged
Bipclar Design Less Subject to ESD
Damage and Latchup.
22mA
J,N,S
16 Pin Version of LTII80without
2
2
Shutdown Feature. Pin·FoT·Pin
Compatible with MAX·232, Rugged
Bipolar Design Less Subject to ESD
Damage and Latchup. Uses smaller
O.I~F Capacitors.
4.SmA
Versatile Level Translator Performs
0
6
J,N,S
l00~··
Many Level Translation, Line Driver
and Line Receiver Functions. Power
Consumption is Programmable.
27mA
J,N,S
LTII3X Product Family Offers Wide
S
5
Array of Multiple Driver/Receiver Func·
5
4
27mA
X
J,N,S
tions. All Devices (Except LTII35,
5
3
27mA
J,N,S
LTII39, LTII40, LT1141) Have +SVto
J,N,S
3
5
27mA
:l: QV Power Supply Converter On-Chip.
4
27mA
4
J NS
All Outputs are Overload Protected and
Do Not Allow Current Flow Back Into
5
3
J,N,S
Power Supplies When Shut Down. The
4
27mA
X
J NS
5
LTII35, LTII40and LT1141 Do Not
27mA
X
J N,S
3
5
Have Onboard Vo~age Converters and
27mA
X
J N S are Ideal for Low Power Applications
5
3
with ± 12V Supplies Already Available.
4
4
X
JNS
The LT1139 Has a +12Vto -QVVolt·
5
X
J N,S
3
age Converter and Is Suited for Low
3
X
J,N,S
5
Power Applications where + 12V and
+5V Supplies are Avallable.
·
·
··
• Not yet determined at time of printing. WIJI be substantially below 27mA. Consult factory for actual values .
• • Programmable down to l00~A.
10-3
NOTES
10-4
L7~O~!---Q-Ua-d-LO-W-p-o-w-e-r-Li-ne-L-~l-r~-:-~
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
•
The LT1030 is an RS232 line driver that operates over a
:i: 5V to :i: 15V range on low supply current and can be
shut down to zero supply current. Outputs are fully protected from externally applied voltages of :i: 30V by current
limiting, Since the output swings to within 200mV of the
positive supply and 1V of the negative supply, power supply
needs are minimized,
Low Operating Voltage :i: 5V to :i: 15V
500JAA Supply Current
Zero Supply Current when Shut Down
Outputs Can Be Driven :i: 30V
Output '~Open" when Off (3-State)
10mA Output Drive
Pinout Similar to 1488*
Output of Several Devices can be Paralleled
Available in SO Package
APPLICATions
A major advantage of the LT1030 is the high impedance
output state when off or powered down, which allows
several different drivers on the same bus,
Our RS232 product line includes other high-performance
devices. The LT1039 is a triple low-power driver /
receiver with shutdown that can be powered from a 5V
supply. The LT1 080 is a 5V powered dual driver / receiver
with on-chip :i: 9V power generator, and shutdown.
• RS232 Driver
• Micropower Interface
• Level Translator
• Check comoatibilily, some pins different
TYPICAL APPLICATiOn
RS232 Line Driver
V+
:;-~
+~
;';;--0.2
-
Output Swing vs Output Current
OUTPUT HIGH
UJ
INPUT
STROBE'
~ -0.4
c..
:::J
OUTPUT
ON-OFF
(OV-5V)t
INPUT
INPUT
OUTPUT
NC
en
0
ICl
UJ
a::
a::
UJ
LL
......
1.2
1.0
. /~
UJ
OUTPUT
INPUT
a::
UJ
0.8
C!J
OUTPUT
«
!:i 0.6
OUTPUT LOW
./
0
>
'NO CONNECTION NEEDED WHEN NOT USED.
t5V=ON.
I-
0.4
:::J
c..
I-
0.2
0
V-
:::J
o
2
3
4
OUTPUT CURRENT (rnA)
5
10-5
LT1030
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . .. ± 15V
Logic Input Pins ..................... V- to 25V
On-Off Pin ......................... GND to 12V
Output(Forced) ............. V- +30V, V+ -30V
Short CircuitDuration (to ± 30V) . . . . . . . . .. Indefinite
Operating Temperature Range
LT1030C ........................ 0°Ct070°C
Guaranteed Functional by Design. .. - 25°C to 85°C
Storage Temperature. . . . . . . . . . . .. -65°C to 150°C
Lead Temperature (Soldering, 10 sec) ........ 300°C
ELECTRICAL CHARACTERISTICS
PARAMETER
Supply Current
Power Supply Leakage Current
Output Voltage Swing
ORDER PART
NUMBER
J PACKAGE
N PACKAGE
l4-LEAD CERAMIC DIP S PACKAGE l4-LEAD PlASTIC DIP
l4-LEAD PlASTIC S
(.150·WIDE)
(Supply Voltage = ±5V to ±15V)
CONDITIONS
VON-OFF;;,:2.4V, lour=O, All Outputs Low
VON-OWs O.4V
VoN -owsO.1V .
Load = 2mA I Positive
Negative
VSUPPLY ± 5V to ± 15V
Operating or Shutdown
Shutdown
Vour = ±30V
Operating or Shutdown
Low Input (Vour= High)
High Input (Vour=Low)
VIN>2.0V
VIN 1.B
;;:; 1.6
~
L
/
0.1
I~
40
0
20
Z
/
. .V
0
1/
25
v
/
50
75
100
TEMPERATURE lOG)
125
Current Limit vs Temperature
30
S 25
e1li
~ -0.4
~ING
=>
"
14
R:=3kb_
~
V+
~)'--...
;;(
V
-20
GND
35
e~
e=>
0
/
Z
OUTPUT FORGEDTO 25'9
12S
50
75
100
TEMPERATURE lOG)
Shutdown Voltage vs
Temperature
2.4
0:
e-
25
140
~
~
W
'"
;2
'"
~
30
15
20
25
TOTAL SUPPLY VOLTAGE IV)
On-Off Pin Current vs Voltage
v:
10
V
001
10
100
f-- t-
ALL OUTPUTS LOW
0.5
Off Output Leakage vs
Temperature
0.01
0.1
10
-75 -50 -25
~
i
=>
1
'"=>
L
10
to
2.0
ALL OUTP~1§l!- !---
2:: 15
15
~
I-
~ 2.5
1.0
1
e-
±12V
VSUPPLY
4.0
~
V
V
2.0
&
ALL hUTPJTS
r--r--
§§ 25
to
~
45
i
40
35
100
VSUPPLY= ± 12V
4.5
~
Off Supply Current vs
Temperature
On Supply Current vs Supply
Voltage
~
w
~
~
VS=±12V
RL =3kll
GL =51pF
VSLEW= ±BV
L
19
17
1/
f'"FALLING
~
15
RISING
~
k/
13
11
/"
02
v-75 -50 -25
5
0
25
50 75
TEMPERATURE lOG)
100 125
-75 -50 -25
0
25 50 75
TEMPERATURE 1°C)
100
125
10-7
LT1030
TYPICAL PERFORmAnCE CHARACTERISTICS
On-Off Response Time
On-Off Response Time
OUTPUT {
IV'N=OV)
1~~
OUTPUT
IV'N=OVI
OV
OUTPUT { -5V
OV
IVIN=5VI -10V
ON-ffi'F {
INPUT
rv
rv
4V
2V
OV
OUTPUT -2V
IV'N=5VI -4V
-6V
ON-'Q'FF { 5V
INPUT
OV
5V
OV
H=100",/OIV
H=100",/OIV
Output Waveform Oriving
Capacitive Load
Output Wave~orm
~~
OUTPUT {
IV,= ±6VI -5V
OUTPUT
OUTPUT rOY
OV
IV,=±12V) -10V
INPUT {
r
4V
2V
OV
-2V
-4V
-6V
5V
OV
INPUT {
~
H=10",/OIV
H =2/lS/DIV
Strobe Pin Response Time
OUTPUT
11~~
-5V
-10V
STROBE {
INPUT
5V
OV
H=2",/OIV
PACKAGE DESCRIPTiOn
Dimensions in inches (millimeters) unless otherwise noted.
J Package
14-Lead Hermetic DIP
N Package
14-Lead Plastic
0005
(01ij
MIN
.Q1QQ..
(;,0Btl)
MAX
0125
(3175)
MIN
alA
8O'C/W
10-8
~-""·llntJ\Q
LTl030CS
~,
TECHNOLOO~~~--Q-ua-d-L-o-w-P-o-w-e-r-L-in-e-D-r-iv-e-r
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
The LT1030 is an RS232 line driver that operates over a
± 5V to ± 15V range on low supply current and can be shut
down to zero supply current. Outputs are fully protected
from externally applied voltages of ± 30V by current limiting. Since the output swings to within 200mV of the positive supply and 1V of the negative supply, power supply
needs are minimized.
LowOperatingVoltage ±5Vto ±15V
500~ Supply Current
Zero Supply Current when Shut Down
Outputs can be Driven ± 30V
Output "Open" when Off (3-State)
10mA Output Drive
Pin Compatible with 1488
Output of Several Devices can be Paralleled
APPLICATions
A major advantage of the LT1030 is the high impedance
output state when off or powered down, which allows
several different drivers on the same bus.
• RS232 Driver
• Micropower Interface
• Level Translator
TYPICAL APPLICATiOn
Output Swing vs Output Current
RS232 Line Driver
v+
I
:>
-6V
+6V
OUT POT
I
OUTPUT HIGH
w
i2 -0.4
INPUT
OUTPUT
ON-OIT
(OV-5V)t
INPUT
;;;-0.2
Q.
:::>
2.0V
VIN <0.8V
•
••
2
O"VIN " 5V
•
-10
The. denotes specifications which apply over the operating
temperature range.
•
TYP
500
1
10
V+-0.1V
MAX
1000
10
150
V +0.9V
12
V +1.4V
2
V
1.4
1.4
2
10
30
15
4
V +30V
100
15
0.8
20
20
65
30
UNITS
pA
pA
pA
V
V
mA
V
p.A
V
V
V
pA
pA
p.A
V/p.S
Note 1: 3V applied to the strobe pin will force all outputs low. Strobe pin
input impedance is about 2k to ground. Leave open when not used.
Pin FunCTions
PIN
FUNCTION
COMMENT
1
Minus Supply
Operates - 2V to - 15V
2,5,9,12
Logic Input
Operates properly on TTL or CMOS levels.
Output valid from (V- + 2V) "V IN ,,15V.
Connect to 5V when not used.
3,6,8,11
Output
Line drive output.
4
On-Off
7
Ground
Shuts down entire circuit. Cannot be left
open. For "normally on" operation, connect between 5V-l0V.
Ground must be more positive than V-
13
Strobe
14
10.,10
Forces all ou,tputs low. Orive with
3V.
Positive supply 5V to 15V.
14
LT1030
I
....,
I
1N4001
Nole: As with other bipolar ICs, forward biasing the substrate
diode can cause problems. The l Tl030 will draw high current
from V+ to ground if the V- pin is open circuited or pulled
above ground. If this is pOSSible, connecting adiode from Vto ground will prevent the high current state. Any low cost diode
can be used.
~Y~~~~~--Q-U-a-d-Lo-W-p-o-w-e-r-Li-ne-L-~-~~_V:-~
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
The LT1032 is a RS232 and RS423 line driver that operates
over a ::I: 5V to ::I: 15V range on low supply current and can
be shut down to zero supply current. Outputs are fully protected from externally applied voltages of ::I: 30V by both
current and thermal limiting. Since the output swings to
within 200mV of the positive supply and 600mV of the negative supply, power supply needs are minimized.
Low Operati ng Voltage ::I: 5V to ::I: 15V
500~ Supply Current
Zero Supply Current when Shut Down
Outputs Can Be Driven ::I: 30V
Thermal Limiting
Output "Open" when Off (Three-State)
10mA Output Drive
Pinout Similar to 1488 (See Diagram)*
APPLICATions
•
•
•
•
RS232 Driver
Power Supply Inverter
Micropower Interface
Level Translator
Also included is a strobe pin to force all outputs low independent of input or shutdown conditions. Further, slew
rate can be adjusted with a resistor connected to the
supply.
A major advantage of the LT1 032 is the high impedance
output state when off or powered down.
For applications requiring dual or triple RS232 driverIreceiver devices, see the LT1080 (dual) or LT1 039 (triple)
datasheets.
• Check compatibility, some pins different
TYPICAL APPLICATiOn
Output Swing vs Output Current
V+
RS232 Line Driver
~ 0.2
- ....
I
VOUT HIGH
en
u.J
-6V
INPUT
OUTPUT
ON'OFF
(OV-5V)t
INPUT
OUTPUT
+6V
STROBE'
INPUT
OUTPUT
RESPONSE TIME
CONTROL'
INPUT
OUTPUT
:::;
DD-
r--
0.4
=>
en
:='
0
u.J
a::
a::
u.J
u..
1.0
.,.,
u.J
a::
u.J
!3'"
~
....=>
....=>
0.8
0.6
0.4
VOUT~~ ~
~
/
D-
'NO CONNECTION NEEDED WHEN NOT USED.
t5V=ON.
0
0.2
V-
o
4
6
8
OUTPUT CURRENT (rnA)
10
10-11
LT1032
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . .. ± 15V
Logic Input Pins ..................... V- to 25V
On-Off Pin ......................... GNDto 15V
Output (Forced) ............. V- + 30V, V+ - 30V
Response Pin . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 6V
Short Circuit Duration (to ± 30V) .......... 1ndefinite
Operating Temperature Range
LT1032M .................... -55°Cto125°C
LT1 032C ........................ O°C to 70°C
Guaranteed Functional by Design. .. - 25°C to 85°C
Lead Temperature (Soldering, 10 sec) ........ 300°C
VEE
(-15VTO -5V) 1
ORDER PART
NUMBER
2
LT1032MJ
LT1032CJ
LT1032CN
J PACKAGE
14-PIN HERMETIC
NPACKAGE
14-PIN PLASTIC
ELECTRICAL CHARACTERISTICS
(Supply Voltage = ± 5V to ± 15V)
PARAMETER
Supply Current
Power Supply Leakage Current
Output Voltage Swing
CONDITIONS
VoN -Oir,,2.4V.
MIN
louT~O.
All Outputs Low
VON-OFF"O.4V
VON-OFF"O.W. TA~125°C
Load ~ 2mA I Positive
Negative
•
•
V+-0.3V
I
Output Current
Output Overload Voltage (Forced)
Output Current
Input Overload Voltage (Forced)
Logic Input Levels
Logic Input Current
o;;:QffPin Current
Slew Rate
Change in Slew Rate (Note 2)
Response Pin Leakage
VSUPPLY ± 5V to ± 15V
Operating or Shutdown
Shutdown
VOUT~ ±30V
Operating or Shutdown
Low Input (VouT~High)
High Input (VOUT~ LOw)
VIN>2.0V
VIN <0.8V
O"VIN " 5V
I RESPONSE ~ 0
IRESPONSE ~ + 50pA
I RESPONSE ~ - 50pA
VSUPPLY~ ±6V. VON/OFF"O.4V.
VRESPONSE = ± 6V
The. denotes specifications which apply over the operating
temperature range.
Nole 1: 3V applied to the strobe pin will force all outputs low_ Strobe pin
input impedance is about 2k to ground. Leave open when not used.
10-12
•
10
V+ -30V
TYP
500
1
10
V+ -O.W
V +O.7V
22
2
•
••
V
•
-10
2
4
1.4
1.4
2
10
3
15
+50
-50
1
MAX
1000
10
50
V +0_9V
V +30V
100
30V
0.8
20
20
50
30
UNITS
pA
pA
pA
V
V
mA
V
pA
V
V
V
pA
pA
pA
V/p.S
%
%
pA
Nole 2: Response can be changed by connecting a resistor to the
supply_ For supplies less than ± 6V this current is disconnected when
shut down. Leave open when not used.
LT1032
TYPICAL PERFORmAnCE CHARACTERISTICS
On Supply Current vs
Temperature
3.0
<
2.0
§.
>-
ALL
~ 2.0
'"
=>
<.>
~
8::
1.5
V
=>
'"I
AL~ OUTJUTS JIGH
1.8
2.5
1.0
.....
O~TPUTl
-
HIGH
~
I--- f..-
1.4
ffi
1.2
'"
§
1.0
.,./
~
100
'"I
10
'"
i3
::;
8::
=>
:"1 0.8
8::
ALL OUTPUTS LOW
~
0.6
V
/
0.2
o
-50 -25
0
25
50
75
TEMPERATURE (OC)
100
o
125
V+
ffi 0.2
~
r-
VOUT HIGH
./
1
=>
'"
:='
ill
~ 1.0
VOUT~_
~ 0.8
t3'"
~
~
5
o
V i-"""
0.6
~ =Vour- 30V
w
'"z
i
Vour 3OV./
./
10nA
v
ii:
./
/
10
o
./
1nA
10
4
6
OUTPUT CURRENT (mA)
10
/
/
-2
/
V
V
/
50
25
/V~-5V
2
3
INPUT VOLTAGE (V)
125
V
1.8
1.6
~
§1.4 ........
~
~
0.8
o
100
-
70
!
..........
1.0
%
0.6
o
50
75
TEMPERATURE (OC)
25
Current Limit vs Temperature
~ MIN IN VO~TAGE
~ 1.2
~z
V V
80
"'- .........
-so -25
0
60
>-
50
'"
=>
<.>
40
Ii!
..........
f-- ~AX ~FF V~LTAG'
0.2
o
75
100
TEMPERATURE (OC)
2.0
0.4
-4
1
Shutdown Pin Voltage vs
Temperature
On-Off Pin Current vs Voltage
-6
5V
L
0.2
V-
125
/ /
100
z
./
loonA
/
0.4
~
~
../
1,.,4
-
75
100
TEMPERATURE (OC)
1000
10,.,4
0.4
50
Response Pin Leakage vs
Temperature (Device Off)
100,.,4
r-
v
/
1
25
15
Output Leakage vs
Temperature
Output Swing vs Output Current
:>
7.5
10
12.5
SUPPLY VOLTAGE (zV)
5
zl2V
j
ALL OUTPUTS LOW
0.4
VSUPl'LV
i
1.6
!
~
§
1000
f-- r-
<.>
~
.!!.' 0.5
Off Supply Current vs
Temperature
Supply Current vs Supply
Voltage
i'-~
~~NG
.........
>-
~
30
0
"-
20
\
25 50 75 100 125 150
TEMPERATURE (OC)
r--.....
......
SOURCING
10
o
-so -25
0
25 50 75 100 125 1SO
TEMPERATURE (OC)
10-13
LT1032
TYPICAL PERFORmAnCE CHARACTERISTICS
Slew Rate vs Temperature
Output Swing vs Temperature
V+
20
~ 200
K:
~ 400
c~~,."....- TO LINE
INPUT
V-
":'
FET Driver
Slew Rate Adjustment*
j":FJt:~5VINCREASES
10Vt
SLEW RATE
INPUT
lTI032
~ PIN 10
-15V
OR
OR
'If,~,7.),'"
~ tt ~"...,
SLEW RATE
-5V
-15V
lovt
• ABOUT 4V/". CHANGE
t ZENERS PREVENT LEAKAGE
DURING SHUT DOWN
TTL/CMOS Compatible Strobe
TO LT1032
STROBE
TTL INPUT
10k
":'
10-16
Strobing wIth CMOS
TTL INPUT
LT1032
TYPICAL APPLICATions
:!::5V to :!::15V Voltage MuHiplier
+5V
---Uio32l
I
f CLOCK = 1kHz
5Y-n
DY....J L-
I
L ___ _
-5V
Phase Shift Oscillator
Operating from a Single 5V Supply
+5V
CMOS
INPUT
15k"
·-..........._OUTPUT
D.N TO 4.BV
7 GIlD
1N4148
1N4148
"LEVEL SHIFTING RESISTORS NEEDED FOR EACH INPUT
10-17
LT1032
RESPONSE TIME ADJ
STROBE
PACKAGE DESCRIPTiOn
JPackage
14-Lead Ceramic DIP
NPackage
14-Lead Plastic DI P
0."
(0.131
.m
.!..!!!!.
(5«*1)
MAX
01~
(3115)
.m
..'"
LT1032MJ
LT1032CJ
LT1032CN
10-18
ejA
ejC
Tlmax
1WC 100"C/W 6O"C/W
8S"C 100"C/W 60"C/W
8S"C 100"C/W 6O"C/W
~-"'··llntI\R
~~
LTl039/LT1039-16
TBCHNOLOGY~-------R-S2-3-2-D-r-iv-e-r/-R-e-c-e-iv--er
with Shutdown
FEATURES
DESCRIPTion
•
•
•
•
•
The LT1039 is a triple RS232 driver/receiver which includes
SHUTDOWN. Each receiver will accept up to ± 30V input
and can drive either TIL or CMOS logic. The RS232 drivers
accept TIL logic inputs and output RS232 voltage levels.
The outputs are fully protected against overload and can
be shorted to ground or up to ± 30V without damage to the
drivers. Additionally, when the system is shut down or
power is off, the outputs are in a high impedance state allowing data line sharing. Bipolar circuitry makes this
driver/receiver exceptionally rugged against overloads or
ESDdamage.
•
•
•
•
•
•
•
Operates from ± 5V to ± 15V Supplies
Fully Protected Against Overload
Outputs can be Driven ± 30V without Damage
Three-State Outputs; Outputs Open when Off
Bipolar Circuit-No Latch Up
± 30V Input Range
Triple Driver/Receiver
No Supply Current in Shutdown
30k{llnput Impedance
Meets All RS232 Specifications
16 Pin Version-Pin Compatible with MC145406
Available in SO Package
APPLICATions
A bias pin allows one receiver to be kept on while the rest
of the part is shut down.
The 1039 is also available in the 16 pin version, without
shutdown or bias pin functions.
• RS2321nterface
• Terminals
• Modems
For applications requiring operation from a Single 5V supply, see LT10BO/B1 datasheet.
TYPICAL APPLICATiOn
12V
LT1039
BIAS'
Driver Output Swing
17
16
RS232 IN
ON-OFF
V+
LOGIC
POSITIVE
RS232
OUTPUT
4
15
14
RS232 IN
LOGIC
~
LOGIC
>
~
~
6
13
15
LOGIC
12
11
RS232
OUTPUT
LOGIC
V-
-
..--
"... . / NEGATIVE
10
o
05
RS232 IN
v~
I-
B:
to;
RS232
OUTPUT
r--
-05
V
o
4
6
OUTPUT CURRENT (mA)
10
LOGIC
-12V
'BIAS PIN USED TO KEEP
THE RECEIVER ON WHILE
IN SHUTDOWN .
.L7YJ~
-=
10-19
LT1039/LT1039-16
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
ORDER PART
NUMBER
Supply Voltage
Driver (V + ,V -) ................................ ± 16V
Receiver (Vee) .................................... .7V
Logic Inputs ................................. V- to 25V
Receiver Inputs .................................. ± 30V
On·Off Input ................................ GND to 12V
Driver Outputs ................... V- +30V to V+ - 30V
Short Circuit Duration ......................... Indefinite
Operating Temperature Range
LT1039M ............................. - 55°C to 125°C
LT1039C ............................... OOC to ?DOC
Guaranteed Functional by Design ..... - 25°C to 85°C
Lead Temperature (Soldering, 10 sec.) ............ 300°C
LT1039CN16
LT1039CJ16
LT1039MJ16
LT1039CN
LT1039CJ
LT1039MJ
LT1039CS
J PACKAGE
IS'LEAD CERAMIC DIP
N PACKAGE
S PACKAGE
IS-LEAD PlASTIC DIP
18-lEADPLASTIC SOL
ELECTRICAL CHARACTERISTICS
I
PARAMETER
CONDITIONS
Driver V+ = 12V; V- = -12V; VON'()FF 2.SV
Output Voltage Swing
Load=3k
to Ground
Logic Input Voltage
Levels
Logic Input Current
=
I
Positive
Negative
Input Low Level (Vour= High)
Input High Level (Vour = Low)
V1N ;;:2.0V
V1N sO.8V
Output Short Circuit
Current
Output Leakage Current
Supply Leakage Current
Sourcing Current, Vour=OV
Sinking Current, Vour=OV
Slew Rate
Supply Current
RL =3kll; CL=51pF
SHUTDOWN (Notes 1and 2); Vour= ± 18V, V1N=0
SHUTDOWN (Note 1)
Vour=Low
Receiver Vce = SV; VON.oFF= 2.SV
Input Voltage Thresholds
Input Low (Vour = High)
Input High (Vour = Low)
Hysteresis
Input Resistance
Output Voltage
OutP'Jt Short Circuit
Current
Output Leakage Current
Supply Current
10-20
Output Low, lour = -1.6rnA
Output High, lour = 160pA
Sinking Current, Vour= Vee
Sourcing Current, Vour = OV (Note 3)
SHUTDOWN (Note 1); OV s Vour s Vee, VIN = 0
••
••
MIN
TYP
V+ -0.4
V- +1.5
V+ -0.1
V- +1
1.4
1.4
0.8
2.0
1
5
15
-15
20
20
5
-5
•
•
••
•
•
••
••
•
•
4
0.5
0.1
MAX
V
V
V
V
pA
~A
rnA
rnA
~A
10 (25°C)
1(25°C)
15
200
100
30
V/~s
4
8
rnA
1.3
1.7
2.8
0.4
1.0
0.4
4.8
pA
V
V
V
kll
30
3.5
-10
0.5
UNITS
0.5
1
V
V
rnA
rnA
1
10
~A
4
7
rnA
LT1039/LT1039-16
ELECTRICAL CHARACTERISTICS
PARAMETER
Supply Leakage Current
CONDITIONS
SHUTDOWN (Note 1)
On·Off Pin Current
OV ~VON.OFF~5V
MIN
II-
The _ denotes specifications which apply over the operating temperature
range.
Note1: VON-OFF 0.4V for - 55°C~TA~100°C, and VON.OR''' O.2V for
1OooC ~ TA~ 125°C. Does not apply to LT1 039·16 part.
=
Pin FunCTions
TYP
MAX
I (25°C)
100
~A
80
~
-15
UNITS
Note 2: For TA2: 100°C, leakage current is 350~ max.
Note 3: For TA ~ - 25°C, output source current is 0.4 mAo
(Pin numbers listed are for18 pin device).
v+, V- (Pins 1, 9): Driver supply pins. Supply current
drops to zero in SHUTDOWN mode. Driver outputs are in a
high impedance state when V+ and V- =OV.
REC IN (Pins 3, 5, 7): Receiver input pins. Accepts RS232
voltage levels (± 30V) and has O.4V of hysteresis to provide
noise immunity. Input impedance is nominally 30kO.
Vee (Pin 18): 5V power for receivers.
REC OUT (Pins 12, 14, 16): Receiver outputs with TIL/
CMOS voltage levels. Outputs are in a high impedance
state when in the SHUTDOWN mode to allow data line
sharing. Outputs are fully short circuit protected to ground
or Vee with power on, off, or in the SHUTDOWN mode.
GND (Pin 10): Ground pin.
TR IN (Pins 11, 13, 15): RS232 driver input pins. Inputs are
TTL/CMOS compatible. Inputs should not be allowed to
float. Tie unused inputs to Vee.
TR OUT (Pins 4, 6, 8): Driver outputs with RS232 voltage
levels. Outputs are in a high impedance state when in the
SHUTDOWN mode or when power is off (V + and
V- OV) to allow data line sharing. Outputs are fully
short circuit protected from V- +30V to V+ - 30V with
power on, off, or in the SHUTDOWN mode. Typical output
breakdowns are greater than ± 45V and higher applied
voltages will not damage the device if moderately current
limited.
=
ON·OFF (Pin 17): Controls the operation mode of the
LT1039 and is TIL/CMOS compatible. A logic low puts the
device in the SHUTDOWN mode which reduces input sup·
ply current to zero and places both driver and receiver out·
puts in ahigh impedance state.
BIAS (Pin 2): Keeps receiver 1on while the LT1039 is in the
SHUTDOWN mode. Leave BIAS pin open when not in use.
See Application Hints for proper use.
TYPICAL PERFORmAnCE CHARACTERISTICS
Driver Output Short
Circuit Current
Receiver Input Thresholds
On·OO Pin Thresholds
5.0
50
3.00
45
2.75
4.5
40
2.50
40
!
35
~
30
~ 25
...........
~ 2.25
..........
'-'
~
20
§
15
~
~I
;5
c5 1.75
>
~ 1.50
=------..
S~URCI~G
10
r--
o
-55 -25
0
25
50
75
TEMPERATURE (OC)
INPUT HIGH
2.00
100
125
INPUT LOW
;;; 1.25
1.00
1.0
0.75
0.5
0.50
-55
--
_ _MINIMUM ON VOLTAGE
-
1--1MAXIMUM OFF VOLTAGE-
r--
o
-25
0
25
50
75
TEMPERATURE (OC)
100
125
-55
-25
0
25
50
75
TEMPERATURE (OC)
100
125
10-21
LT1039/LT1039-16
TYPICAL PERFORmAnCE CHARACTERISTICS
Receiver Output Short
Circuit Current
Driver Output Leakage
in SHUTDOWN
Supply Current in SHUTDOWN
1000
100
1000
SUPPLY CURRENT MEASURED
INTO Vee AND V+
OUTPUT SINKING= =
/
~
'I
100
/
f
>-
i
:=>
I
:=>
/
'->
/
':i
~
10
>-
10
Vour= -30V /
'->
to;
/
OUTPUT SOURCING
~
1
o
I
/
'I
1
-55 -25
0
25
50
75
TEMPERATURE (OC)
100
125
-55
Vour=30V
/
1
-25
0
25
50
75
TEMPERATURE (OCr
100
On-Oil Pin Current vs Voltage
V+
'>
35
/
30
25
§
20
/
/
/
~ 15
13
~ 10
L
;;:;
i\.
-5
-10
fB -0.2
~ -0.4
10V
OV
~
~
~w
INPUT{5V
OV
08
~
0
0.6
>
>-
0.4
is:
to;
O~TPU~ LO~
1.0
~
--~
/
--
0.2
V-
2
3
INPUT VOLTAGE (V)
o
0.5 1.0 1.5 2.0 2.5 30 3.5 40 4.5 5.0
OUTPUT CURRENT (mA)
SHUTDOWN to Driver Output
DRIVER {
OUTPUT
10V
5V
OV
DRIVER {
OUTPUT
OV
-5V
-10V
ON-OFF {5V
INPUT OV
1m,
10-22
0
25
50
75
TEMPERATURE (OC)
.l
1.2
'"
-10V
RECEIVER {5V
OUTPUT OV
O~TPUr HI1H
0
o
-25
Driver Output Swing vs Current
40
1
0.1
-55
125
2m,
3m,
4m,
100
125
LT1039/LT1039-16
TYPICAL PERFORmAnCE CHARACTERISTICS
SHUTDOWN to Receiver Output
Bias Pin Response Time
6V
6V
RECEIVER { 4V
OUTPUT 2V
RECEIVER 1 { 4V
OUTPUT 2V
OV
OV
ON.OFF
INPUT
{5V
BIAS INPUT {5V
(THRU 25kll) OV
OV
1ms
2ms
3ms
O.2pS
4ms
O.4pS
O.6~s
O.BpS
TYPICAL APPLICATiOn
lT1080 (Driver/Receiverwith Power Supply) Driving an lT1039
SHUTOOWN
5V
Vee
17
1B Vee
LT10BO
TTL INPUT
RS232 OUT
TTL INPUT
RS232 OUT
TTL INPUT
RS232 OUT
TTL INPUT
RS232 OUT
TTL INPUT
RS232 OUT
TTL OUT
RS232 IN
TTL OUT
RS232 IN
TTL OUT
RS232IN
TTL OUT
RS232 IN
TTL OUT
RS232 IN
2 C1 +
':"
1pF
4 C1-
+
5 C2+
V+ 3
1,J'
6 C2-
GND
16
V-
7
1pF
10-23
LT1039/LT1039-16
APPLICATion HinTS
The driver output stage of the LT1039 offers significantly
improved protection over older bipolar and CMOS designs.
In addition to current limiting, the driver output can be ex·
ternally forced to ± 30V with no damage or excessive cur·
rent flow, and will not disrupt the supplies. Some drivers
have diodes connected between the outputs and the sup·
plies, so externally applied voltages can cause excessive
supply voltage to develop.
Placing the Ln039 in the SHUTDOWN mode (Pin 17 low)
puts both the driver and receiver outputs in a high
impedance state. This allows data line sharing and
transceiver applications.
The SHUTDOWN mode also drops all supply currents
(Vee, V+, V-) to zero for power·conscious systems.
When driving CMOS logic from a receiver that will be used
in the SHUTDOWN mode and there is no other active reo
ceiver on the line, a 51k resistor can be placed from the
logic input to Vee to force a definite logic level when the
receiver output is in ahigh impedance state.
Sharing aReceiver Line
LT1039 Driver
LT1039 # 1
RECEIVER
RS232
INPUT A
LT1039 #2
RECEIVER
Older RS232 Drivers and Other CMOS Drivers
-c>t
RS232
INPUT B
V+
WITH SOME DRIVERS,
EXTERNALLY APPLIED
VOLTAGE CAN FORCE
THE SUPPLIES
pN-OFF
(CHANNEL
SELECT)
INPUT
v-
Sharing aTransmitter Line
LOGIC
OUTPUT
LOGIC
INVERTER
Transceiver
LT1039 #1
DRIVER
LOGIC
TRANSMIT IRECEIVE
LINE
IN~~~I~----1
LT1039 #2
RECEIVER
LT1039 #2
DRIVER
>0-+-.....-
ON-ifI'i'
(CHANNEL
SELECT)
INPUT
10-24
LOGIC
INVERTER
-----I >c>-.....
RS232
TRANSMITIRECEIVE
LINE
RS232
TRANSMISSION
LINE
LOGIC
INVERTER
ON-OFF
(TRANSMIT/_-+---I
RECEIVE)
INPUT
LT1039/LT1039-16
APPLICATion HinTS
To protect against receiver input overloads in excess of
± 30V, avoltage clamp can be placed on the data line and
still maintain RS232 compatibility.
The receiver input impedance of the LT1039 is nominally
30kO. For applications requiring a 5kO input impedance, a
5.6kO resistor can be connected from the receiver input to
ground.
Driver inputs should not be allowed to float. Any unused
inputs should be tied to Vee.
The bias pin is used to "keep alive" one receiver while in
the SHUTDOWN mode (all other circuitry being inactive).
This allows a system to be in SHUTDOWN and still have
one active receiver for transferring data. It can also be
used to make an RS232 compatible SHUTDOWN control
line. Driving the bias pin low through a resistance of 24kO
to 3OkO keeps the receiver active. Do not drive the bias pin
directly from a logic output without the series resistor. An
unused bias pin should be left open.
Keeping Alive One
Receiver while in
SHUTDOWN
Vee
RS232
INPUT
LOGIC
OUTPUT
LOGIC SHUTDOWN
INPUT
25kO
'FORCES LOGIC INPUT STATE
WHEN VON-orr IS LOW
ON-OF!'
INPUT
ON-lW!' 17
1J1039
-I. .
RECEIVER
~,"1I-""'~N~"'" :-::-I~~'
RS232 Compatible
SHUTDOWN Control Line
25kD
RECEIVER
RS232INPUT~LOGIC
5 6kOl
~
OUTPUT
RS232
SHUTDDWN~--f "OO--r16~
INPUT
(11039
10·25
LT1039/LT1039-16
PACKAGE DESCRIPTion
Dimensions in inches (millimeters) unless otherwise noted.
J16 Package Ceramic DIP
0840~
MAX
.
0160
(4064)
0005
MAX
(OT3j
MIN
~ I--
(21336)
15
131211109
~
TVP
L j
n
0220-0310
0025
(0635)
0OO8-001B
(0203-0460)
0385::1:0025
(9 n9±O 635)
J18 Package Ceramic DIP
rc
~
(7 36,"8128It!'
00')
o29(J-.()320
0036-0068
MAX
(096S-1m)
..Q.2Q2..
~! I~
(50801
.
~~
J
........... ..-a"-w
0008-0018
90"::1:4"
(0203-0460)
TYP
I--~-..J
0098
(2M: )
(9779±D635)
MAX
I~'
(0380-1520)
0220-0310
(5590-7870)
--~+--+
I
I.-
W
---....J\.-
0100::1:0010
0014-0026
(0 360-(}660j
f.r.r-r::rT:"1,....,......-r::-r-T":"'r-r::-rT.:r'~
0125
(3175)
(2540::1:0254)
MIN
N16 Package Plastic DIP
I"
..Q..Q22.
(1651)
TYP
'I
(19558)
0770
~
t
LT1039CN16
Tjmax
e,.
e.
B5'C
140'CiW
50'CiW
N18 Package Plastic DIP
~-----(~29B~O)-------<>J
I
{7620-B12Bj......
r,0~-0320
MAX
PI
I
0OO9-0015j(0229-0381)
__ 0 325
~~ ~~~
(6255~~~n
LT1039CN
10-26
Tjmax
el'
e,
B5'C
120'CiW
50'CiW
......
I'TIINF~n
,~
~7YlJ~~f!(~-pr-o-g-ra-m-m-b-b-le-M-ic-ro-p-o-~-TC-e-;~-:-~
Translator / Receiver / Driver
FEATURES
DESCRIPTion
•
•
•
•
•
•
The lTC1045 is a hex level translator manufactured using
Linear Technology's enhanced lTCMOS™ silicon gate
process. It consists of six high speed comparators with
output latches and three·state capability. Each comparator's plus input is brought out separately. The minus inputs of comparators 1-4 are tied to VTRIP1 and 5-6 are tied
to VTRIP2.
Efficiently Translate Voltage levels
Internal Hysteresis for Noise Immunity
Output latches Included
Three-State Outputs
Programmable Power/Speed
Power can be Completely Shut Off
• ± 50Von Inputs with External100kO Limit Resistor
• 1.2f.lS Response at 100f.lA Supply Current
The ISET pin has several functions. When taken to V+ the
outputs are latched and power is completely shut off.
Power/speed can be programmed by connecting ISET to
V- through an external resistor.
APPLICATions
•
•
•
•
•
TTL/CMOS to ± 5V Analog Switch Drive
TTUo CMOS (3V to 15V Vecl
ECl to CMOS (3V to 15V Vecl
Ground Isolation Buffer
low Power RS232 Line Receiver
LTCMOSTM is a trademark of Linear Technology Corp.
Flat Ribbon Cable Driver/Receiver
5V
5V
TTL IN
>-=XM"""TO~UT~ )
66 FT FLAT RIBBON CABLE
Zo=1501l
( ~_""-"':':':;':':"---I
RCV OUT
TTL OUT
ADJACENT CONDUCTORS
XMIT IN (5V/DIV)
XMT OUT (W/DIV)
RCV IN (W/DIV)
Rev OUT (5V/DIV)
100ns/DIV
10-27
LTC1045
A8S0LUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
(Notes 1and 2)
ORDER PART
NUMBER
Total Supply Voltage 0/+ ,VOH to V-, Vou ............ 18V
Output High Voltage0/oH) ......................... ~V+
Input Voltage .......................... 18V to V- - 0.3V
Operating Temperature Range
LTC1045C ............................. - 40°C to 85°C
LTC1045M ........................... -55°Cto125°C
Storage Temperature Range ............. - 55°C to 150°C
Lead Temperature (Soldering, 10 sec) .............. 300°C
Output Short Circuit Duration
0/0H - VOL~10V) .......................... Continuous
ESD (MIL·Sro-883, Method 3015.1) ................ . 2000V
LTC1045MJ
LTC1045CJ
LTC1045CN
J20 PACKAGE
HERMETIC DIP
N20 PACKAGE
PLASTIC DIP
ELECTRICAL CHARACTERISTICS
(Note3)Y+ =YOH =5Y, Y- =YOL=OY, TA=25°C unless otherwise specified.
SYMBOL PARAMETER
Input Bias Current
Ie
Is
IOFF
VREF
Trip Voltage Range
(Pin 8and Pin 9)
V+to V- Supply Current
V+ to V- Supply Current
in Shutdown
Voltage on ISET (Pin 12)
CONDITIONS
V- :sVIN:sV+
DISABLE = V+, RSET= 10k
DISABLE = ISET = V+
RSET = 10k
lour = - 360~A, V+ = 4.5V
10llT = 1.6rnA, V+ = 4.5V
VIN = VTR\!, -100rnV,
VOllT=V
VIN = VTRIP +1oornV,
Vour=VDISABLE=V+
VOL:sVOUT:sVOH
ROH
TTL Output High Voltage
TTL Output Low Voltage
Output Short Circuit
Sink Current
Output Short Circuit
Source Current
Three-5tate Leakage
Current
Output Resistance to VO H
ROL
Output Resistance to VOL
II0uTI:s 1oo~A
VOH
VOL
ISINK
ISOURCE
loz
VIH
V1L
IlouTI:s100~
ISET Voltage for Shutdown
DISABLE Input Logic
V+ = 4.5V, V- = OV
Levels
V+ =5.5V, V- =OV
Input Supply Differential
(V + - v-) (Note 3)
Output Supply Differential
(VoH- VoU(Note3)
10-28
MIN
•
•
•
•
•
•
•
•
•
•
•
•
•
••
•
•
V-
LTC1045M
TYP
MAX
±1
1.0
V+ -2
2.5
MIN
LTC1045C
TYP
±1
0.5
V+-2
V-
3.5
5.0
2.5
10
0.9
8.5
5.5
4.5
3.2
4.4
0.2
15
0.6
2.4
0.4
7.5
5.5
4.0
3.2
8.0
0.005
260
100
~A
0.4
8.0
0.005
1
400
600
150
250
260
1
475
600
100
160
250
V+ -0.5
V+ -0.5
2.0
4.5
3
15
V
V
V
V
rnA
rnA
rnA
rnA
~
~
!l
Il
!l
Il
V
2.0
0.8
15
V
1
1.25
4.4
0.2
15
~A
rnA
rnA
nA
0.9
1.4
UNITS
nA
3.5
4.5
10
5
0.5
2.4
MAX
4.5
0.8
15
V
V
V
3
15
V
ITllnfJ\D
-,~
LTC1045
AC ELECTRICAL CHARACTERISTICS
v+ = VOH =5V, v- = VOL =OV, TA = 25°C unless otherwise specified.
SYMBOL
I
-
1
>
~
+
>
V+=VOH=5V
1
I
~
~ 0.8 rrH-llfj;ll-l~HHt-+++ttl#I-~-HIIltI
~
~'"
<.>
~
r--
J J
~ RSET=10k
V+=VOH=5V
V-=VOL=OV
V,N=VTR,P± 100mV
1.0
4 1-+t-tttf~-+++ItItt-+V- =VOL=OV
+
+
I
1.2 r-r-~TTl~~TTTl2nr~~5~oc-,lrr,"T'T
11ITTT1T""
11111 "'T""T'T"TTTTTT-rT"T'T'TTT1I
~~~+*~+~~~~oCIII
V+=5V
<'
.5
Delay Time vs RSET
1+ VSRSET
2rr~~~~~~~#OO
~
0.6
1-+f-Hjjj'H---l+*~-H+-HfHI--H1+ttHI
0.4 I-+ftItH'H---l-+++ItItt--H+-HfHI-/-++tHittI
+
>
0.2
rrH-llfj;ll-l~HHt-+++-H.I!If-~#OO
RisETJM
o
-50 -25
0
25
50
75 100
AMBIENT TEMPERATURE, TA (0C)
125
1k
10k
RSET (Il)
WOk
1k
1M
Wk
WOk
1M
RSET (Il)
VREF vs Temperature
20
2.5
V+=5V
Hysteresis vs RSET
......
V+=5V
18
~
2.0
~ 1.5
z
a:
lJj
;;: 1.0
o
'"~
~
>
0.5
:> 16
.5
U)
RSET=1M
-
Bi
I\.
14
ffi 12
t;
~
or
.I .l
~
:-!!~Ok
~
r---
'"
10
8
6
8
0.1 '---'----'-----'_..L--'---'-----'
-50
-~
0
~
50
~
WO
~5
1k
AMBIENT TEMPERATURE, TA (0C)
Wk
WOk
1M
RSET (0)
Pin DESCRIPTion
Pin
1
Name
VOH
2-7
INPUT
8
VTRIP2
9
VTRIP1
10
V-
10-30
Description
High level to which the output
switches
Six comparator inputs; voltage
range = V- to V- +18V
Trip point for first four comparators
(inputs 1-4); voltage range =V- to
V+ -2V
Trip point for last two comparators
(inputs 5-6); voltage range =V- to
V+ -2V
Low level to which the output switches
Pin
11
12
Name
VOL
ISET
Description
Comparator negative supply
This pin has three functions
1) RSET from this pin to V- sets bias
current
2) When forced to V+ power is shut
off completely
3) When forced to V+outputs are
latched
13
DISABLE When high outputs are Hi·Z
14-19 OUTPUT Six driver outputs
20
V+
Comparator positive supply
LTC1045
BLOCK DIAGRAm
VBIAS
BIAS
~-I--------="-I GENERATOR
-8kn
LATCH
ENABLE
I
I
I
I
.J
RSET
10-31
LTC1045
APPLICATions INFoRmATion
turned off to the linear circuitry, the CMOS output logic is
powered and maintains the output state. With no DC load
on the output, power dissipation, for all practical pur·
poses, is zero.
The LTC1045 consists of six voltage translators and asso·
ciated control circuitry, see Block Diagram. Each transla·
tor has a linear comparator input stage with the positive
input brought out separately. The negative inputs of the
first four comparators are tied in common to VTRIPl and
the negative inputs of the last two comparators are tied in
common to VTRIP2. With these inputs the switching point
of the comparators can be set anywhere within the com·
mon·mode range of V- to V+ - 2V. To improve noise
immunity each comparator has a small built·in hysteresis.
Hysteresis varies with bias current from 7mV at low bias
current to 20mV at high bias current (see typical curve of
Hysteresis vs RSET).
Latching the output is fast-typically 80ns from the rising
edge of ISET. Going from the latched to flow through state
is much slower-typically 1.5fLs from the falling edge of
ISET. This time is set by the comparator's power up time.
During the power up time, the output can assume false
states. To avoid problems, the output should not be con·
sidered valid until 2fLS to 5fLS after the falling edge of ISET.
Putting the Outputs in Hi·Z State
Setting the Bias Current
A DISABLE input sets the six outputs to a high impedance
state. This allows the LTC1045 to be interfaced to a data
bus. When DISABLE = "1" the outputs are high impedance
and when DISABLE = "0" they are active. With TTL sup·
plies, V+ = 4.5V to 5.5Vand V- =GND, the DISABLE input
is TTL compatible.
Unlike CMOS logic, any linear CMOS circuit must draw
some quiescent current. The bias generator (Block Dia·
gram) allows the quiescent current of the comparators to
be varied. Bias current is programmed with an external reo
sistor (see typical curve of 1+ vs RSET). As the bias current
is decreased, the LTC1045 slows down (see typical curve
of Delay Time vs RSET).
Power Supplies
There are four power supplies on the LTC1045: V+, V-,
VOH and VOL. They can be connected almost arbitrarily,
but there are a few restrictions. A minimum differential
must exist between V+ and V- and VOH and VOL. The V+
to V- differential must be at least 4.5V and the VOH to VOL
differential must be at least 3.0V. Another restriction is
caused by the internal parasitic diode D1 (see Figure 5).
Shutting Power Off and Latching the Outputs
In addition to setting the bias current, the ISET pin shuts
power completely off and latches the translator outputs.
To do this, the ISET pin must be forced to V+ - 0.5V. As
shown in Figure 4, aCMOS gate or aTTL gate with aresis·
tor pull·up does this quite nicely. Even though power is
r----,
v+ (4.5V TO 5.5V)
V+ (4.5V TO 15V)
v+
20t--P--...,
10Ck
UC104!>
DATA
DISABLE -----,L/
(A) CMOS
(B) TTL
Figure 4. Driving the ISET Pin with Logic
10-32
Figure 5. Output Driver
LTC1045
APPLICATions InFoRmATion
Because of this diode, VOH must not be greater than V+.
Lastly the maximum voltage between any two power supply pins must not exceed 15V operating or 18V absolute
maximum. For example, if V+ =5V, V- or VOL should be
no more negative than -10V. Note that VOL should not be
more negative than -10V even if the VOH to VOL differential does not exceed the 15V maximum. In this case the V+
to VOL differential sets the limit.
Input Voltage
The LTC1045 has no upper clamp diodes as do conventional CMOS circuits. This allows the inputs to exceed the V+
supply. The inputs will break down approximately 30V
above the V- supply. If the input current is limited with
100kD, the input voltage can be driven to at least ± 50V
with no adverse effects for any combination of allowed
power supply voltages. Output levels will be correct even
under these conditions (Le., if the input voltage is above
the trip pOint, the output will be high and if it is below, the
output will be low).
Output Drive
Output drive characteristics of the LTC1045 will vary with
the power supply voltages that are chosen. Output
impedance is affected by V+, VOH and VOL. V- has no effect on output impedance. Guaranteed drive characteristics are specified in the table of electrical characteristics
for V+ =VOH=5V and V- =VOL=OV. Figures 6 and 7
show relative output impedance for other supply combinations. In general, output impedance is minimized if V+ to
VOH is minimized and VOH to VOL is maximized.
20
\
\
\.t
SPECIFIEO POINT
1\
I
.........
o
o
2
4
6
8
10
12
14
16
,
o
2
-
r-- r-
1
4 5 6
8
10
12
14
16
V+-VOH(Vj
VOH-VOc(V)
Figure 6. Relative Output Sourcing
Resistance (ROHl vs V+ - VOH
Figure 7. Relative Output Sinking
Resistance (ROLl vs VOH - VOL
TYPICAL APPLICATiOnS
TTL/CMOS (Vcc =5V) to High Voltage CMOS (Vcc = 15V)
ECL to CMOs/TLL Logic
5V
ECl
IN
15V
CMOSlTTl
(Vcc=5V)
TTL/CMOS
(Vcc=5V)
CMOS
(Vcc=15V)
--1.3Vt--""~-i-----+--+----'
10k
-5.2V
10-33
LTC1045
TYPICAL APPLICATIOnS
High Voltage CMOS (Vee = 15V)to TTUCMOS (Vee = 5V)
5V
CMOS
(Vcc=15V)
TTl/CMOS
(Vcc=5V)
-2.5V
TTUCMOS (Vee =5V) to Low Voltage CMOS (Vee =3V)
5V
3V
TTl/CMOS
(Vcc=5V)
CMOS
(Vcc=3V)
100k
TTUCMOS Logic Levels to ±5V Analog Switch Driver
5V
±5V
OUT
TTl/CMOS
INPUT
(Vcc=5V)
CMOS ANALOG
SWITCH
(CD4016 FOR
EXAMPLE)
20k
-5V
10-34
LTC1045
TYPICAL APPLICATions
TTUCMOS (VCC = 5V)to +10V/- 5V Clock Driver
10V
TTL/CMOS
(VCC=5V)
+10V TO -5V
CLOCK DRIVER
20k
-5V
Logic Ground Isolation when Two Grounds are within LTC1045 Common· Mode Range
I
I
I
II
,--I
SYSTEM A
r
I
TTL/CMOS LOGIC
I
VCCB=5V
,---------i
I
I
I
I
I
I
I
2.7k
I
LOGIC
OUT
VT=1.35V
SETS LOGIC
THRESHOLD REFERRED
TO GNDA
I
1k
I
I
L_
SYSTEM B
GNDA .,..
II
I
L ____
I
I
I
I
~~-- ~
(GNDB- V- +VT) sGNDA s(GNDB +V CCB-2V - VT)
10-35
LTC1045
TYPICAL APPLICATions
±5V Analog Switch Driver
5V
CD4016
v+
5V
r - - - 114 1
20
~
l'
2 IN 1
±5V
3 IN 2
±5V
4 IN3
TTL
OR CMOS
LOGIC INPUTS
±5V
,
5 IN4
,
~
I
6 INS
±5V
L ___ ..J
-5V
7
1~6
8 VT2
I»Il
13
.".
9 Vf1
I SET
12
lOOk
10
v-
VOl
11
.".
-5V
Coax Cable Driver/Receiver
5V
5V
30 FT RG 174
~~X~M~TO~U~T~» __~~~__C_OA_X_~_B_LE__~~__~(~-.__~Re~V~IN~
V
V
~:':::':"::::':""""_TTLOUT
50n
0.2V
Rev OUT (5V/DlV)
Rev IN (lV/DIV)
XMIT OUT (lV/DIV)
XMIT IN (5V/DlV)
200ns/DiV
10-36
JTLln~
....-.,
I~Y
LTC1045
TYPICAL APPLICATions
Logic Systems DC Isolation
SYSTEM B
SYSTEM A
SYSTEM B
POWERtPPLY
L
VOH
LTC1045
V+J
2 IN 1
rf./0UTI19
3 IN 2
WOUT2
~8
4 IN 3
WooT317
TIL OR CMOS
5 IN4
6 tN 5
rv
CMOS OR TIL
OUT 4 16
~OUT5 15
7 tN 6
rb>0UT614
SYSTEM A
POWER SUPPLY
VT (1)
8 VT2
l~F-L ~
~9 r:!!.!.
rus ~THREE-STATE CONTROL
ISET
I~F
(2~
i
10
SYSTEM A GND
'="~
lOOk
(3)
I
v-
VOL
.1.L.
l
(1) SET VT TO HALFWAY BETWEEN
VOH AND VOL OF SYSTEM A.
(2) SHUNTS COMMON-MODE SIGNAL.
(3) PROVIDES LEAKAGE PATH FOR TOTALLY
ISOLATED SYSTEMS
Il 7 SYSTEM 8 GND
RS232 Receiver
5V
30V-}l>-'lN1r-=-!
-30V-
0.9V
'INPUTS HAVE NO INTERNAL
PULL DOWN. IF INPUTS FLOAT
EXTERNAL PULL DOWN MUST
BE ADDED
10-37
LTC1045
TYPICAL APPLICATions
24V Relay Supply from +12VI +15V Supply
LED Driver
V+ (5VTO 15V)
v+
v+
LOW TURNS LED ON
1N414B
1N4148
+24V
10k
9 VU
10
100k
tSE'( 12
v-
11'H--,
VOLr
~1.5V
100k
10k
1000PF~
r
r-;---;V-- - - - ,
I
__ --IREF LED
6
""
B
I
I
I
I
I
I
I
REGULATES
LED CURRENT
R (ADJUSTS LED CURRENT)
I
I
I
I
I
L _ _ _ _ _ _ _ _ _ _ _ _ _ .J
10-38
LTC1045
TYPICAL APPLICATions
Multi"Window Comparator and Display
V+
5V
.......-.!.
V+ 20
VOiI
LTC1045
2 IN 1
V,N>VREF
OUT119
R
rY
VH
3 IN 2
+
-V
10k
ourz
18
4 IN 3
0UT317
10k
rY
5 IN4
OUT 4 16
'"
-V
10k
6 IN 5
~OUH15
GI MV 57164"
8AR GRAPH DISPLAY
10k
5V
7 1«6
[
Y,N
.m.
~
...
OUT6 14
H;/
......
OIS 13
VTl
r
----2.
r.-...
ISET
12
...
VOl l ' t - -
V-
v+
VOH
...
20
lTC1045
10k
...
2 INl
rY0UTl19
10k
3 1«2
10k
4 IN
•
-V
a
0012 18
-f..;0UT317
10k
5 IN 4
rYlltIT416
10k
6 INS
~OUT515
10k
7
INs
Vl
8 VT2
9
VIN~V+-2
R= 100 (VR" -VH)
(VH-V Ll
EACH WINDOW BElWEEN VH AND Vl
EQUALS 1/10 (VH-VLl
V(VH-VLl.,0.5
v
UTI
f v~
rY
VIN::
~ 1.50
=>
~ 1.25
1.00
0.75
o
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
TIME(ms)
35
/
30
~ 1.75
:>::
V - SUPPLY
40
2.50
~
-
~
On·OIl Pin Current vs Voltage
100
2.75
'"
<5
Cl-C4=1~F
Rl=4.7k;V+ TO V-
-8
V- OUTPUT VOLTAGE
o
I
Vee=5J
\
Ver5i
-6 -IOA~ED~
-8 ,-
OUTPUT LOW
l..--- ...-
II
~ -2
o -4
r- Vri 5
'" -6
V
2
~
-2
Vee=4.5V
V+ SUPPLY
LbAOEO TO GROUND
~
III
15
~
2
-4
10
v + OUTPUT VOLTAGE
LOAOEOTO V -
Vee 4.5V
~
III
15
Vcc- 5.5V
Supply Generation from Vee
or Shutdown
Supply Generator Outputs
DriYer Output Voltage
--V
L
0.50
-55
-25
/i'
1
.......-
J...- ...-
20
'"'"
'"=>
15
~
10
'"'~
OUTPUT SOURCING
..,. J. . . iN;,UT LO~- -
25
~
z
/
/
/
/
:;:
/
l
-5
0
25
50
75
TEMPERATURE ('C)
100
0.1
-55
125
-10
-25
0
25
50
75
TEMPERATURE ('C)
100
125
5.0
2
3
INPUT VOLTAGE (V)
Driver Output Leakage
in Shutdown
Supply Current in Shutdown
On·OiI Pin Thresholds
a
100
1000
4.5
f-- Vee 5V
4.0
§ 3.5
'"15
20
Z 1.5
o
1.0
MAXIMUM OFF VOLTAGE
-55 -25
10-46
~
!5
r- r-.
r--
-
'"'
~
=>
w
100
125
'"
;2
/
VOUT=f~ ftC
~
10
~
~
U)
=>
0
/
1
0
25
50
75
TEMPERATURE ('C)
10
'-'
~
~ONVOLTAGE I - -
r-- r--l-
0.5
o
~
IE
3.0
g
2.5
z
....... I'--.
~
1
~ 100
-55
-25
0
25
50
75
TEMPERATURE ('C)
100
125
0.1
-55 -25
/ 1/ VIOUT= i 30V
0
25
50
75
TEMPERATURE ('C)
100
125
LT1080/LT1081
TYPICAL PERFORmAncE CHARACTERISTICS
Output Wavaforms
DRIVER {
OUTPUT
5V
OV
-5V
RECEIVER { 5V
OUTPUT
OV
INPUT {
Shutdown to Receiver
Output
Shutdown to Driver Output
DRIVER {
OUTPUT
10V
5V
OV
RECEIVER
OUTPUT
DRIVER {
OV
-5V
OUTPUT -10V
5V
OV
2,..
4,..
6,..
ON-OFF { 5V
INPUT OV
5V
OV
ON-OIT {
INPUT
r
4V
2V
OV
lms 2ms 3ms 4ms
8,..
1ms 2ms 3ms 4ms
TYPICAL APPLICATiOn
Supporting an LT1039 (Triple Driver/Receiver)
SHUTDOWN
5V
Vee
17
18 Vee
lT1039
TTL INPUT
RS232 OUT
TTL INPUT
RS232 OUT
TTL INPUT
RS232 OUT
TTL INPUT
RS232 OUT
TTL INPUT
RS232 OUT
TTL OUT
RS232 IN
TTL OUT
RS232IN
TTL OUT
RS232IN
TTL OUT
RS232IN
TTL OUT
RS232IN
III
'Cl
l~F
l~F
16
V+
1 V+
v-
9 Vl~F
GND
10
·IN APPLICATIONS WHERE A SEPARATE SECOND POSITIVE SUPPLY IS AVAILABLE (SUCH AS +5V
AND + 12V). THE + 12V SUPPLY MAY BE CONNECTED TO PIN 2 AND Cl DELETED. THE POWER
SUPPLY CIRCUITRY WILL THEN INVERT THE +12V SUPPLY. THE +5V SUPPLY IS STILL NEEDED
TO POWER THE BIASING CIRCUITRY AND RECEIVERS.
10-47
LT1080/LT1081
APPLICATion HinTS
The driver output stage of the LT1080 offers significantly
improved protection over older bipolar and CMOS designs.
In addition to current limiting, the driver output can be externally forced to ± 30V with no damage or excessive current flow, and will not disrupt the supplies. Some drivers
have diodes connected between the outputs and the supplies, so externally applied voltages can cause excessive
supply voltage to develop.
Placing the LT1080 in the SHUTDOWN mode (Pin 18 low)
puts both the driver and receiver outputs in a high
impedance state. This allows data line sharing and
transceiver applications.
The SHUTDOWN mode also drops input supply current
(Vee; Pin 17) to zero for power-conscious systems.
Transceiver
LT1080/LT1081 Driver
~~
~AN
Lnoso #1
DRIVER
JL30V
-30V
BE FORCED
EXTERNALLY
LOGIC
TRANSMIT IRECEIVE
LINE
RS232
>O---+--TRANSMIT IRECEIVE
LINE
Lnoso #2
Older RS232 Drivers and CMOS Drivers
-vt
RECEIVER
V+
WITH SOME DRIVERS.
EXTERNALLY APPLIED
VOLTAGE CAN FORCE
THE SUPPLIES
V-
Sharing a Receiver Line
Lnoso # 1
RECEIVER
Lnoso #2
RECEIVER
LOGIC
INVERTER
ON-OFF
(TRANSMIT 1_-+--1
RECEIVE)
INPUT
Sharing aTransmitter Line
LT10S0 # 1
DRIVER
LT10S0 # 2
ORIVER
RS232
>o-t---TRANSMISSION
LINE
ON-OFF
(C~:~~~\
INPUT
10-48
LOG!C
INVERTER
----I
>0--.....
LOGIC
INVERTER
ON-OFF
(CHANNEL - - - - - I ">0--.....
SELECT)
INPUT
LT1080/LT1081
APPLICATion HinTS
When driving CMOS logic from a receiver that will be used
in the SHUTDOWN mode and there is no other ,active receiver on the line, a 51k resistor can be placed from the
logic input to Vee to force a definite logic level when the
receiver output is in ahigh impedance state.
Vce
RS232
INPUT
ON-OFF
INPUT
The generated driver supplies N+ and V-) may be used
to power external circuitry such as other RS232 drivers or
op amps. They should be loaded with care, since exces"
sive loading can cause the generated supply voltages to
drop causing the RS232 driver output voltages to fall below RS232 requirements. See the graph "Supply Generator
Outputs" for a comparison of generated supply voltage
versus supply current.
LOGIC
OUTPUT
LT10ao
EXTERNAL OP AMP
"FORCES LOGIC INPUT STATE
WHEN VON-OFF IS LOW
To protect against receiver input overloads in excess of
± 30V, a voltage clamp can be placed on the data line and
still maintain RS232 compatibility.
16 GND
-=
v-
RECEIVER
LOGIC
OUTPUT
"A PTC THERMISTOR WILL
ALLOW CONTINUOUS OVERLOAD
OF GREATER THAN ± 100V
-=
-=
TYPICAL APPLICATiOn
Operating with SV and 12V
17
12V
INPUT'
5V INPUT
"¥
1,F
12
- 12VOUT
1,F
RS232 OUTPUT
LOGIC {
INPUTS
11
13
RS232 OUTPUT
RS232 INPUT
LOGIC {
OUTPUTS
10
ON-OFF
RS232 INPUT
18
'PIN ONE USED
ON LT1081
10-49
LT1080/LT1081
PACKAGE DESCRIPTion
Dimensions in inches (millimeters) unless otherwise noted.
J16 Package Ceramic DIP
~
O~
(~~t~(;;;;';=I;:;;;~;;::;;::;;;::;;;:::,;;::;iI'
N16 Package Plastic DIP
TJmIX
12S'C
LT1081CN1IN
12O'CJW
5O'CJW
J18 Package Ceramic DIP
r(::-~~:'~j'
I[
0025
(ffi)-
AAD
,
~
0220-0310
15590-7870)
MAX
.
~-r.rT~r.r~rr.",~~~~
.
i
0'_15'
00oa_0018
(0203-0460)
~(~~~:~~~I-1
I
I
I
LT1080MJIU
LT1080CJ
I
I
I
TJmIX
150'C
150'C
a~
ai'
11lO'CJW
4O'C/W
4O'C/W
100'CIW
I
J
I
N18 Package Plastic DIP
J------(i2:01----~·1
\$
~~
\
12
II
,"',
i165ii
01~~k='''·'''·-----++----,
10
~±
! .!.!1l.!
(3175)
.IN
0045",0015
(1143:t:03e1)
LT11l11OCNnN
10-50
12S'C
120'C/W
5O'CJW
J..-"".oo~'L
(2540"'02~~
(0457=0076)
~"''''''·llnlt\l2
~~
LTl080CS/LT1081CS
TECHNOLOG~~~----5-V--Po-w-e-r-e-d-R-S2-3-2-D-r-iv-er-/
Receiver with Shutdown
FEATURES
DESCRIPTion
•
•
•
•
•
•
The LT1080 is a dual RS232 driver/receiver which includes
a capacitive voltage generator to supply RS232 voltage
levels from a single SV supply. Each receiver will accept
up to ± 30V input and can drive either TTL or CMOS logic.
The RS232 drivers accept logic inputs and output RS232
voltage levels. The driver outputs are fully protected
against overload and can be shorted to ground or up to
± 30V without damage. Additionally, when the system is
in the SHUTDOWN mode the driver and receiver outputs
are at a high impedance allowing data line sharing. Bipolar circuitry makes this driver/receiver exceptionally
rugged against overloads or ESD damage.
•
•
•
•
•
Operates on Single SV Power Supply
Generates ± 9V Supplies with Only 1/LF Capacitors
Fully Protected Against Output Overloads
RS232 Outputs can be Forced ± 30V without Damage
Three-state Outputs are High Impedance when Off
Bipolar Circuitry; No Latch Up
± 30V Receiver Input Range
Can Power Additional RS232 Drivers such as LT1039
No Supply Current in Shutdown
Meets All RS232 Specifications
16 Pin Version without Shutdown Available
APPLICATions
•
•
•
•
•
The power supply generator doubles the SV input supply
to obtain 9V, and then inverts the 9V to obtain -8.SV. Up
to 1SmA of external current is available to power additonal
RS232 drivers or other external circuitry. The SHUTDOWN
mode disables the supply generators and reduces input
supply current to zero. Aversion of the LT1080, the LT1081 ,
is available without shutdown for 16 pin applications.
RS2321nterface
Battery Powered Systems
Power Supply Generator
Terminals
Modems
TYPICAL APPLICATiOn
Supply Generator Outputs
.,:.17~_5VINPUT
LT1080
r
7 ':'
1pF
'~"I
9V OUT
+
10
I I
RL TO GNO::
I I
Vc~=5~
I-
RS232 OUTPUT
T
I
I I
INPUTS
~,[
V+ OUTPUT
RL TOV -
-9V OUT
"¥1 PF
12
I
J
1pF
11
-6 I--
-8
13
c--+~ -:--r
RL TO GND
RS232 OUTPUT
RS232 INPUT
~
I I
-10
o
2
4
r O~TP~T
6 8 10 12 14 16 18 20
OUTPUT CURRENT (mA)
OUTPUTS
10
ON-Oi'!'
RS232 INPUT
18
10-51
LTl OBOCS/LTl OB1CS
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage (Vee) ................................ 6V
V+ ............................................... 12V
V- .............................................. -12V
Input Voltage
Driver...............................V- to V+
Receiver.............................. - 30V to 30V
On-Off Pin............................. GND to 12V
Output Voltage
Driver...................... V- +30V to V+ -30V
Receiver. . . . . . . . . . . . . . . . . . . . . . - 0.3V to Vee + 0.3V
Short Circuit Duration
V+........................................30 Seconds
V- .......................................30 Seconds
Driver Output. .......................... Indefinite
Receiver Output. ......................... Indefinite
Operating Temperature Range
LT1080C............................ OOC to 70°C
Guaranteed Functional ............... - 25°C to 85°C
Lead Temperature (Soldering, 10 sec.)............300°C
ORDER PART
NUMBER
LT1080CS
PART MARKING
LT1080CS
818 PACKAGE
PLASTIC SOL
ORDER PART
NUMBER
TOP VIEW
LT1081CS
PART MARKING
LT1 081 CS
516 PACKAGE
PLASTIC SOL
ELECTRICAL CHARACTERISTICS (Note 1)
PARAMETER
Driver
Output Voltage Swing
Logic Input Voltage
Level
Logie Input Current
Output Short Circuit
Current
Output Leakage Current
Slew Rate
Receiver
Input Voltage Thresholds
I
CONDITIONS
Load = 3k to GND
Both Outputs.
MIN
I
Positive
Negative
Input Low Level (Vour = High)
Input High Level (Vour= Low)
VIN2:2.0V
V1N sO.8V
Sourcing Current, Your = OV
Sinking Current, Vour=OV
SHUTDOWN (Note 2), VOUT = ± 30V
RL =3kll, CL=51pF
Input Low Threshold, (Vour = High)
Input High Threshold, (Vour= Low)
Hysteresis
Input Resistance
Output Voltage
Output Short Circuit
Current
Output Leakage Current
10-52
Output Low, lour = -1.6mA
Output High, lour = 160pA (Vee = 5V)
Sinking Current, Vour= Vee
Sourcing Current, Your = OV
SHUTDOWN (Note 2), OV S Your S Vee
••
••
••
•
••
•
••
•
5.0
-5.0
2.0
7
-7
4
0.2
0.1
3
3.5
-10
0.6
TYP
7.3
-6.5
1.4
1.4
5
5
12
-12
10
15
1.3
1.7
0.4
5
0.2
4.8
-20
1
1
MAX
UNITS
V
V
0.8
20
20
100
30
3.0
1.0
7
0.4
10
V
V
pA
pA
mA
mA
pA
V1~s
V
V
V
kG
V
V
mA
mA
pA
LTl oaOCS/LTl oales
ELECTRICAL CHARACTERISTICS (Note 1)
PARAMETER
Power Supply Generator (Note 3)
v+ Output Voltage
I
V- Output Voltage
CONDITIONS
MIN
8
7
6.5
-7.5
-5.5
-5
lour=OmA
lour = lOrnA
lour = 15mA
lour=OmA
lour= -lOrnA
lour= -15mA
•
•
•
Supply Current
Supply Leakage Current (Vccl
On·Oll Pin Current
Supply Rise Time
SHUTDOWN (Note 2)
OV s VON.OFF S 5V
(Note 4)
(LTt0800nly)
(LTl 080 On Iy)
The • denotes specifications which apply over the operating temperature
range (0°CsTAs70°C).The LT1080/LTt081 is guaranteed functional by de·
sign for -25°CsTAs85°C.
Note 1: These parameters apply for 4.5V sVcc s5.5V and VON.QfF= 3V,
unless otherwise specified.
TYP
9
8
7.5
-8.5
-6.5
-6
10
1
-15
MAX
V
V
V
22
100
80
1
UNITS
V
V
V
rnA
p.A
~A
ms
Note 2: VON.OFF = OAV. (LT1080 only)
Note 3: Unless otherwise specified, Vee = 5V, external loading of V+ and
V- equals zero and the driver outputs are low (inputs high).
Note 4: Time from either SHUTDOWN high (LTt080 only) or power on until
V+ ~6Vand V- s -6V. All external capacitors are I~F.
Pin FunCTions
Vee (Pin 1n: Input supply pin. Supply current drops to zero
in the SHUTDOWN mode.
GND (Pin 16): Ground pin.
On·Off (Pin 18): Controls the operation mode of the LT1080
and is TIL ICMOS compatible. A logic low puts the device
in the SHUTDOWN mode which reduces input supply cur·
rent to zero and places both driver and receiver outputs
in a high impedance state. A logic high fully enables the
device.
V+ (Pin 3): Positive supply for RS232 drivers. V+ ::::
2Vee -1.5V. Requires an external capacitor (~1/tF) for
charge storage. May be loaded (up to 15mA) for external
system use. Loading does reduce V+ voltage (see
graphs.)
V- (Pin 7): Negative supply for RS232 drivers. V- ::::
- (2Vee - 2.5V). Requires an external capacitor (~1/tF) for
charge storage. May be loaded (up to -15mA) for external
system use. Loading does reduce V- voltage (see
graphs).
TR1IN; TR21N (Pins 12, 11): RS232 driver input pins. Inputs
are TTL/CMOS compatible. Inputs should not be allowed
to float. Tie unused inputs to Vee.
TR1 OUT; TR2 OUT (Pins 15, 8): Driver outputs with RS232
voltage levels. Outputs are in a high impedance state
when in the SHUTDOWN mode or when power is off
(Vee OV) to allow data line sharing. Outputs are fully
short circuit protected from V- +30V to V+ - 30V with
power on, off, or in the SHUTDOWN mode. Typical output
breakdowns are greater than ± 45V and higher applied
voltages will not damage the device if moderately current
limited.
=
REC1 IN; REC2 IN (Pins 14, 9): Receiver inputs. Accepts
RS232 voltage levels (± 30V) and has O.4V of hysteresis to ~
provide noise immunity. Input impedance is nominally ...:.
5kl}'
REC1 OUT; REC2 OUT (Pins 13, 10): Receiver outputs with
TIL/CMOS voltage levels. Outputs are in a high
impedance state when in the SHUTDOWN mode to allow
data line sharing. Outputs are fully short circuit protected
to ground or Vee with power on, off, or in the SHUTDOWN
mode.
C1 +; C1 -; C2 +; C2 - (Pins 2, 4, 5, 6): No user applica·
tions. Requires an external capacitor (~1/tF) from C1 + to
C1 - and another from C2 + to C2 - .
10-53
NOTES
10-54
~"""""-Llnlt\Q
~~
LTl130 Series
TECHNOLOGY~------A-d-v-a-n-c-e-d-L-o-w-P-o-w-e-r
5V RS232 Drivers/Receivers
with Charge Pump
FEATURES
DESCRIPTiOn
•
•
•
•
Absolutely No Latchup
CMOS Comparable Low Power - 80mW
Operates from aSingle 5V Supply
Superior to CMOS
- Easy PC Layout - Flow Through Architecture
-Improved Speed - Operates Over 64K Baud
-Improved Protection - Outputs Can be Forced
to ± 30V Without Damage
- Three·State Outputs are High Impedance When Off
- Only Needs 1JlF Capacitors
- Output Overvoltage Does Not Force Current Back Into
Supplies
• 1J1A Supply Current in Shutdown
• Available in SO Package
The LT1130 Series are the only RS232 drivers/receivers
with charge pump to guarantee absolutely no latchup.
These interface optimized devices provide a realistic bal·
ance between CMOS levels of power dissipation and real
world requirements for ruggedness. The driver outputs are
fully protected against overload and can be shorted to
± 30V. Unlike CMOS, the advanced architecture of the
LT1130 does not load the signal line when "shut down" or
when power is off. Both the receiver and RS232 outputs
are put into a high impedance state. An advanced output
stage allows driving higher capacitive loads at higher
speeds with exceptional ruggedness.
Basic Operation
Output Waveform
For applications requiring only 2 drivers and 2 receivers
with charge pump in one package see the LT1180 Series
data sheet. All of Linear Technology's RS2321C's are avail·
able in standard surface mount packages.
DRIVER
OUTPUT
1::
-5V
LT1130 5·Driver/5·Receiver RS232 Transceiver
LT11315·Driver/4·Receiver RS232 Transceiver w/Shutdown
LT1132 S·Driver/3·Receiver RS232 Transceiver
LT1133 3·Driver/5·Receiver RS232 Transceiver
LT1134 4·Driver/4·Receiver RS232 Transceiver
LT1135 5·Driver/3·Receiver RS232 Transceiver w/o Charge Pump
RECEIVER {
OUTPUT
5V
OV
INPUT {
5V
OV
LT1136 4·Driver/5-Receiver RS232 Transceiver w/Shutdown
LT1137 3-Driver/5·Receiver RS232 Transceiver w/Shutdown
LT1138 5·Driver/3·Receiver RS232 Transceiver w/Shutdown
LT1139 4·Driver/4·Receiver RS232 Transceiver w/Shutdown
LT1140 5·Driver/3·Receiver RS232 Transceiver w/o Charge Pump
LT11413·Driver/5·Receiver RS232 Transceiverw/o Charge Pum\.
10-55
LTl130 Series
ABSOLUTE mAXimUm RATinGS
SupplyVoltage(Vcc) ................................ 6V
V+ ................................................13.2V
V- ............................................. -13.2V
Input Voltage
Driver ...................................... V- toV+
Receiver ................................. - 30V to 30V
On·Off Pin ................................ GND to 12V
Output Voltage
Driver ........................... V- t30VtoV+ -30V
Receiver .......................... - 0.3V to Vcc t 0.3V
Short Circuit Duration
V+ ....................................... 30 Seconds
V- ....................................... 30 Seconds
Driver Output ............................... Indefinite
Receiver Output ............................ Indefinite
Operating Temperature Range
Military(LT113XM/LT114XM) ........... - 55°C to 125°C
Industrial (LT113XI/LT114XI) ............ - 40°C to 85°C
Commercial (LT113XC/LT114XC) ........... OOC to 70°C
PRODUCT SELECTION TABLE
Part Number
Power Supply Voltages *
Shutdown
Drivers
Receivers
External Components
LT1130
No
5
5
4Capacitors
+5
LT1131
Yes
5
4
4Capacitors
+5
LT1132
No
4Capacitors
5
3
+5
LTII33
5
4Capacitors
No
3
+5
LT1134
No
4
4Capacitors
4
+5
LTII35
None
+5, +12, -12
No
5
3
LTII36
Yes
5
4Capacitors
4
+5
LT1137
4Capacitors
Yes
3
5
+5
LTII38
Yes
5
3
4Capacitors
+5
LT1139
4
2Capacitors
Yes
4
+5, +12
LTII40
+5, +12, -12
Yes
5
3
None
LT1141
+5, +12, -12
Yes
3
5
None
"The LTII30, LT1131, LT1132, LT1133, LT1134, LTII36, LT1137, and LT1138 can operate with + 5V and + 12V supplies and two external capacitors.
PACKAGE/ORDER InFORmATiOn
5-DRIVERl5-RECEIVER
TOP VIEW
DRIV£R om
1l5}' r--C><>-im
DRIVER OUT
ORIV£R OUT
7
ll9]-.J ...-t>o-liiil
J PACKAGE
28-LEAO CERAMIC DIP
(.6OO" WIDE)
10-56
N PACKAGE
28-LEAD PlASTIC DIP
! 600 " WIDE)
ORDER PART
NUMBER
LT1130MJ
LT1130CJ
LT1130CN
LT1130IJ
LT1130lN
LT1130CS
5-DRIVER/4-RECEIVER WITH SHUTDOW~
TOP VIEW
LT1131MJ
LT1131CJ
LT1131CN
LT11311J
LT11311N
LT1131CS
DRIVER OUT 5
DRIVER OUT 7
DRIVER OUT 9
DRIVER OUT 11
J PACKAGE
28-LEAD CERAMIC DIP
(.600'WIDEI
ORDER PART
NUMBER
N PACKAGE
28-lEAD PlASTIC DIP
{.600"WIDEI
LTl130 Series
PACKAGE/ORDER InFORmATiOn
5·DRIVER13-RECEIVER
TOP VIEW
ORDER PART
NUMBER
3·DRIVERl5·RECEIVER
TOP VIEW
LT1132MJ
LT1132CJ
LT1132CN
LT11321J
LT11321N
LT1132CS
J PACKAGE
N PACKAGE
24-lEAO CERAMIC DIP
24-LEAO PLASTIC DIP
( aoo "WIDE)
( aoo "WIDE)
S PACKAGE
24-LEAO PLASTIC SOL
( 300 " WIDE)
LT1133MJ
LT1133CJ
LT1133CN
LT11331J
LT11331N
LT1133CS
J PACKAGE
N PACKAGE
24·lEAD CERAMIC DIP
24·lEAD PlASTIC DIP
(.3DD"WIDE)
S PACKAGE
(.300 " WIDE)
24-LEAD PlASTIC SOL
(.300" WIDE)
5-DRIVERJ3.RECEIVER
WITHOUT CHARGE PUMP
4·DRIVER/4-RECEIVER
TOP VIEW
TOP VIEW
LT1134MJ
LT1134CJ
LT1134CN
LT1134IJ
LT1134IN
LT1134CS
J PACKAGE
24-lEAD CERAMIC DIP
( 300" WIDE)
S PACKAGE
24-lEAD PLASTIC SOL
( 3OD'WIDE)
J PACKAGE
2O-LEAD CElIAMIC OIP
(.300"WIDE)
N PACKAGE
24-LEAO PLASTIC DIP
(.3DO"WIDE)
LT1135MJ
LT1135CJ
LT1135CN
LT11351J
LT1135IN
LT1135CS
N PACKAGE
2Q-lEAOP!.ASTlCDlP
S PACKAGE
2O-LEAD PlASTIC SOL
(300"WIDE)
(.300 H WIDE)
3-DRIVERl5-RECEIVER WITH SHUTDOWN
4·DRIVER/5·RECEIVER WITH SHUTDOWN
TOP VIEW
TOP VIEW
LT1136MJ
LT1136CJ
LT1136CN
LT1136IJ
LT1136IN
LT1136CS
J PACKAGE
28-LEAO CERlIMIC OIP
(.600~WmE)
ORDER PART
NUMBER
N PACKAGE
2a-LEAD PlASTIC DIP
( 600'WIOE)
SPACKAGE
2a-LEAD PlASTIC SOL
( 6OO"WIDE)
LT1137MJ
LT1137CJ
LT1137CN
LT11371J
LT11371N
LT1137CS
J PACKAGE
28-LEAD CERAMIC DIP
(.600·WIDE)
N PACKAGE
28-lEAD PlASTIC DIP
S PACKAGE
(.600 'WIDE)
28-LEAD PlASTIC SOl
(_600'WIOE)
10-57
LTl130 Series
PACKAGE/ORDER InFORmATiOn
5·DRIVER/3·RECEIVER WITH SHUTDOWN
TOP VIEW
ORDER PART
NUMBER
4·DRIVERl4-RECEIVER WITH SHUTDOWN
WITH +12V AND +5V SUPPLIES
ORDER PART
NUMBER
LT1138MJ
LT1138CJ
LT1138CN
LT1138IJ
LT11381N
LT1138CS
LT1139MJ
LT1139CJ
LT1139CN
LT11391J
LT11391N
LT1139CS
(BOO"WIOE)
J PACKAGE
N PACKAGE
24-LEAD PLASTIC DIP
24·lEAO CERAMIC DIP
S PACKAGE
(.300·WIOE)
(.300"WIOE)
24-lEAO PLASTIC SOL
(300"WIOE)
5·DRIVER/3·RECEIVER
WITHOUT CHARGE PUMP
3·DRIVERl5·RECEIVER
WITHOUT CHARGE PUMP
J PACKAGE
28-LEAD CERAMIC DIP
(.600· WIOE)
N PACKAGE
S PACKAGE
28-LEAD PLASTIC SOL
28-LEAD PLASTIC DIP
(.600·WIOE)
TOP VIEW
J PACKAGE
24-lEAD CERAMIC DIP
(.300·WIOE)
S PACKAGE
24-lEAD PLASTIC SOL
LT1140MJ
LT1140CJ
LT1140CN
LT1140lJ
LT1140lN
LT1140CS
LT1141MJ
LT1141CJ
LT1141CN
LT11411J
LT11411N
LT1141CS
N PACKAGE
24·LEAD PLASTIC DIP
J PACKAGE
24·LEAD CERAMIC DIP
(.300"WIOE)
(.300·WIDE)
S PACKAGE
24-LEAD PLASTIC SOL
N PACKAGE
24-LEAD PLASTIC DIP
( JOO"WIOE)
(.300"WIOE)
135O·WIOE)
For 2·Driver/2·Receiver devices, see LT1080/81 and LT1180/81 data sheet.
ELECTRICAL CHARACTERISTICS (Note 1)
PARAMETER
Any Driver
Output Voltage Swing
Logic Input Voltage
Level
Logic Input Current
Output Short Circuit Current
Output Leakage Current
Slew Rate
10-58
CONDITIONS
Load = 3k to GND
I
Input Low Level (Your = High)
MIN
Positive
Negative
Input High Level (YOUT= Low)
O.BV :S V1N:s 2.0V
Vour=OV
SHUTDOWN (Note 2), VOUT = ± 30V (Note 3)
RL = 3kl1, CL= 51pF
••
••
•
•
5.0
-5.0
2.0
4
TYP
7.3
-6.5
1.4
1.4
5
12
10
15
MAX
0.8
20
100
30
UNITS
V
V
V
V
pA
rnA
pA
VIpS
LTl130 Series
ELECTRICAL CHARACTERISTICS (Note 1)
PARAMETER
Any Receiver
Input Voltage Thresholds
Hysteresis
Input Resistance
Output Voltage
Output Short Circuit
Current
Output Leakage Current
Power Supply Generalor
V+ Output
V- Output
Supply Current
Supply Leakage Current
Supply Rise Time
OnlOff Pin Current
CONDITIONS
Input Low Threshold, (Vour = High)
Input High Threshold, (Vour = Low)
•
Output Low, lour = -1.6mA
Output High, lour = l60pA (Vee = 5V)
Sinking Current, Vour= Vee
Sourcing Current, Vour=OV
SHUTDOWN (Note 2), OV sVoursVee
••
MIN
TYP
MAX
0.8
1.3
1.7
0.4
5
0.2
4.8
2.4
1.0
7
0.4
0.1
3
3.5
-10
0.4
•
-20
1
1
SHUTDOWN, -55°CsTAs125°C
SHUTDOWN,ooCsTAs70oC
SHUTDOWN To Tum On
SHUTDOWN,OVSVONIOFF S5V
The • denotes the specifications which apply over the full operating temperature range. (OOC STA S70°C for commercial grade, - 40°C STA s85°C for
industrial grade, and - 55°C STA s 125°C for military grade).
Note 1: Testing done at Vee = 5V and VON/OFF = 3V
•
•
•
-15
V
V
V
kIl
V
V
mA
mA
10
8
-7.5
17
1
1
2
UNITS
27
100
10
80
,.A
V
V
mA
,.A
,.A
ms
,.A
Nolt2: VOtOOFFsO.1V
Note3: ForLTll39,40,and41 with 12Vsupplies, Vourleakageis200,.Aand
VOUT Is forced to ± 25V.
Pin FunCTions
Vee: Input supply pin. Supply current drops to zero in the
SHUTDOWN mode.
GND: Ground pin.
On/Off: Controls the operation mode of the device and is
TIL/CMOS compatible. A logic low puts the device in the
SHUTDOWN mode which reduces input supply current to
zero and places both driver and receiver outputs in a high
impedance state. Alogic high fully enables the device.
V+: Positive supply (RS232 drivers). V+,.. 2Vcc -1.SV.
Requires an external capacitor (~1f.1F) for charge storage.
Capacitor may be tied to ground or +SV input supply. V+
voltage is short circuit proof for 30 seconds. With multiple
transceivers, the V+ and V- pins may be paralleled into
common capacitors.
V- : Negative supply (RS232 drivers). V- ,.. - (2Vcc - 2.SV).
Requires an external capacitor (~1 f.lF) for charge storage.
Loading does reduce V- voltage. V- is short circuit proof
for 30 seconds. With multiple transceivers, the V+ and Vpins may be paralleled into common capacitors.
DRIVER IN: RS232 driver input pins. Inputs are TIL fCMOS
compatible. Inputs should not be allowed to float. Tie
unused inputs to Vee.
DRIVER OUT: Driver outputs with RS232 voltage levels.
Outputs are in a high impedance state when in the SHUT·
DOWN mode or when power is off (Vee =oV) to allow data
line sharing. Outputs are fully short circuit protected from
V- +30V to V+ - 30V with power on, off, or in the SHUT·
DOWN mode. Typical output breakdowns are greater than
± 4SV and higher applied voltages will not damage the
device if moderately current limited. Although the outputs
are protected, short circuits on one output can load the
power supply generators disrupting the signal level from
other outputs.
10-59
LTl130 Series
RX IN: Receiver inputs. Accepts RS232 voltage levels
(± 30V) and has O.4V of hysteresis to provide noise
immunity. Input impedance is nominally 5kO.
C1 +; C1 -; C2 +; C2 -: Requires an external capacitor
(;:d ~F) from C1 + to C1 - and another from C2 + to C2 - .
In applications where larger positive voltages are avail·
able, such as +12V, C1 can be eliminated and the positive
voltage connected directly to the C1 + terminal.
RX OUT: Receiver outputs with TIL/CMOS voltage levels.
Outputs are in a high impedance state when in the SHUT·
DOWN mode to allow data line sharing. Outputs are fully
short circuit protected to ground or Vee with power on, off,
or in the SHUTDOWN mode.
TYPICAL PERFORmAnCE CHARACTERISTICS
Supply Generation from Vec
or Shutdown
Driver Output Voltage
10
~
tjj
1'>
<5
>
Vee- S.SV
OUTPUT HIGH
Vee 4.5V
V'"
~
ttl
1'>
2
-
~6
-2
'"
~
-4
i:2
c
-6
2
<5
f-Rl =3kll
Vee=4.SV
3.00
V+ SUPPLY
V~15.6V
4
i'..
'S"
10
i
o
20
1
'"
/
/
/
/
/
5
-10
10-60
0
25
50
75
TEMPERATURE (OC)
100
125
0
25
50
75
TEMPERATURE (OC)
100
125
4.5
/
\
-5
-25
-25
On·OIl Pin Thresholds
/
~ 10
OUTPUT SOURCING
-
5.0
<..>
t-
0.1
-55
0.50
-55
0.2 0.4 0.6 O.S 1.0 1.2 1.4 1.6 1.S 2.0
TIME (ms)
~ 15
=>
<..>
~
'"
ffi
.---
~UTLOW_ -
0.75
30
25
.... V
V
,..-
V- SUPPLY
35
1
....- V
1.00
r-
On·OIl Pin Current vs Voltage
OUTPUT SINKING=--- -
/
~ 1.50
=>
~ 1.25
40
100
INPUT HIGH .........
2.00
or
-s
Receiver Output Short
Circuit Current
2.25
~ 1.75
r-...
-6
125
2.50
~
c
5
\
U)
100
275
or
-2
g;~ -4
-10
I
Vee=5J
I
C1-C4=1,.F
Rl =4.7k;V+ TO V-
V I-"
I
0
>
r-vre~51v
-s Vee 15.5V
OUTPUT LOW
-10
-55 -25
0
25
50
75
TEMPERATURE (OC)
Receiver Input Thresholds
10
o
4.0
~
'"~
~
z
~
3.5
3.0
2.5
20
~ 1.5
1.0
0.5
o
2
3
INPUT VOLTAGE (V)
"""" ......
~NVOLTAGE
-
- r--+-J. ---.........
MAXIMUM OFF VOLTAGE
-55 -25
0
25
50
75
TEMPERATURE (OC)
100
125
LTl130 Series
TYPICAL PERFORmAnCE CHARACTERISTICS
Driver Output Leakage
in Shutdown
Supply Current in Shutdown
1000
100
~Vcc
5V
I
VOUT=ti
F
/
/
1
-55
-25
0
25
50
75
TEMPERATURE (OC)
100
0.1
-55 -25
125
5V
OV
-5V
RECEIVER { 5V
OUTPUT
OV
DRIVER {
OUTPUT
5V
OV
ON-OFF (
INPUT
INPUT {
2,..
4,..
6,. 8,..
100
125
Shutdown to Receiver
Output
:~
10V
5V
OV
RECEIVER {
OUTPUT 2V
OV
DRIVER {
OV
-5V
OUTPUT -10V
0
0
25
50
75
TEMPERATURE (OC)
Shutdown to Driver Output
Output Waveforms
DRIVER {
OUTPUT
/ i/ VIOUT= 130v
ON-OFF { 5V
INPUT OV
5V
OV
0
o
lms 2ms 3ms 4ms
1ms 2ms 3ms 4ms
APPLICATion HinTS
The driver output stage of the LT1130 offers significantly
improved protection over older bipolar and CMOS designs.
In addition to current limiting, the driver output can be ex·
ternally forced to ±30V with no damage or excessive cur·
LT1130 Driver
rent flow, and will not disrupt the supplies. Some drivers
have diodes connected between the outputs and the sup· ~
plies, so externally applied voltages can cause excessive . . : .
supply voltage to develop.
Older RS232 Drivers and CMOS Drivers
-t>t
V+
WITH SOME DRIVERS,
EXTERNALLY APPLIED
VOLTAGE CAN FORCE
THE SUPPLIES
V-
10-61
LTl130 Series
APPLICATion HinTS
Placing the LT1130 type device in the SHUTDOWN mode
puts both the driver and receiver outputs in a high
impedance state. This allows data line sharing and
transceiver applications.
Sharing aTransmitter Line
r------,
I
I
# 1 RECEIVER
IN~~~3~ - - - ! - /
I
I
The SHUTDOWN mode also drops input supply current to
zero for power-conscious systems.
Transceiver
LOGIC
TRANSMITIRECEIVE -......t-f
LINE
>0+--........-
RS232
INPUT B
RS232
TRANSMIT IRECEIVE
LINE
LOGIC
OUTPUT
LOGIC
INVERTER
ON-OFF
(CHANNEL _ _--I >0---'
SELECT)
INPUT
OEVICE
RECEIVER
When driving CMOS logic from areceiver that will be used
in the SHUTDOWN mode and there is no other active receiver on the line, a 51k resistor can be placed from the
logic input to Vee to force a definite logic level when the
receiver output is in ahigh impedance state.
LOGIC
INVERTER
ON-OFF
(TRANSMIT/_-+---i
RECEIVE)
INPUT
Vee
Sharing aReceiver Line
RS232
INPUT
l#1oruVER-l
LOGIC
I
INPUTA---t-f
ON-OFF
INPUT
I
.>cl""'t--...,
LOGIC
OUTPUT
'FORCES LOGIC INPUT STATE
WHEN VON-Oi'F IS LOW
To protect against receiver input overloads in excess of
± 30V, avoltage clamp can be placed on the data line and
still maintain RS232 compatibility.
RS232
>O--+-+-......-TRANSMISSION
I
RECEIVER
LINE
LOGIC
OUTPUT
____ JI
r-i---'
ON-OFF
(CHANNEL
SELECT)
INPUT
10-62
LOGIC
INVERTER
-+---f
">c>-...I
• A PTC THERMISTOR WILL
ALLOW CONTINUOUS OVERLOAD
OF GREATER THAN ± 100V
3DV
LTl130 Series
TYPICAL APPLICATiOnS
Operating with +5V and +12V Supplies
Basic Operation
NC 1
POWER INPUT
5V Vee
POWER INPUT 12V
TO
LOGIC
TO
LINE
Paralleling Power Supply Generator
with Common Storage Capacitors
TO
LINE
TO
LOGIC
10-63
LTl130 Series
2500V Isolated 5·Driver/5-Receiver RS232 Transceiver
VOUT=5V
MUR120
SYSTEM SUPPLY
VIN=3.5V-15V
PULS!~~~~~~~RING
~------------------------~-+~~
~--~--~--'---~~-1-----1
+
Ie 3.6kO"
220,.F
1,;;,..--.....---IVfNi
LT1072
GND
5000
SECONDARY
VOUT ADJUST
10kll
1,.F
38011
AT VIN=5V
(NOTE 2)
HP6N136
38011
2.2kO
HP6N136
..J:.
=SYSTEM GROUND
,j., =FLOATING COMMON
NOTE 1: REPEAT THE OPTOCOUPLER CONNECTIONS FOR EACH LINE.
NOTE 2: SELECT FOR 10mA THROUGH LED.
"FOR IMPROVED EFFICIENCY, REPLACE THE 3.6kO RESISTOR WITH A 30V ZENER DIODE.
RS232 Receiver Signals
RS232 Driver Signals
+5
100kHz LOGIC
INPUT TO OPTOCOUPLER
10
5
LT1130 DRIVER OUTPUT
-10
10-64
o
-5
100kHz RS232
INPUT
OPTOCOUPLER
OUTPUT
LTl130 Series
PACKAGE DESCRIPTiOn Dimensions in inches (millimeters) unless otherwise noted.
SPackage
20',24- and 2a.Lead Plastic SOL
(.300"1.300"1.600" Wide)
.
,
I'IH1 IDfNT,HOTCJlONTllI'ANOCAIIITIES
00 THE EIOlTOM OF PACKAGE AflETltE
MANUFAClUAINGOPTKlNSTHEPART
M~V8ESUPl'LIEOW1THORWITHOUT
ANY OF TliEOPTIONS
JPackage
2()'Lead Ceramic DIP
(.300" Wide)
NPackage
2D-Lead Plastic 01 P
(.300" Wide)
~-" . Ljt I~ ~-~:~I ~
._-
.~.
--lI I1--12 ~o .. o254)
~
(165,,,,03811
~
(0 457.t0 076)
.....
JPackage
24-Lead Ceramic DIP
(.300" Wide)
~----------;(~)----------~
10-65
LT1l30 Series
PACKAGE DESCRIPTiOn Dimensions in inches (millimeters) unless otherwise noted.
NPackage
24·Lead Plastic DIP
(.300' Wide)
......
''''''
J Package
28·Lead Ceramic DIP
(.600' Wide)
NPackage
28·Lead Plastic DIP
(.600' Wide)
r:
~115151
"'~Lbr.rr.rr.rr.rr.rr.rr.rr.rr.;;=;;;n;n;n;n~
10-66
~"""'-Llntf\Q
~~
TECHNOLOGY~-------A-d-v-a-nc-e-d--Lo-w--P-o-w-e-r
5V RS232 Dual Driver I Receiver
with Small Capacitors
DESCRIPTiOn
FEATURES
•
•
•
•
O.1/LF Capacitors
Absolutely No Latchup
CMOS Comparable Low Power - 70mW
Superior to CMOS
-Improved Speed - Operates Over 64K Baud
-Improved Protection - Outputs Can be Forced
to ± 30V Without Damage
- Three·State Outputs are High Impedance When Off
- Smaller Board Area Required
• 1/LA Supply Current in Shutdown
• Available in SO Package
• Available With or Without Shutdown
APPLICATions
•
•
•
•
•
LTl180/LTl181
The LT1180 and LT1181 are the only dual RS232 driverl
receiver with charge pump to guarantee absolutely no
latchup. Requiring only O.1/LF charge pump capacitors,
these interface optimized devices provide a realistic bal·
ance between CMOS levels of power dissipation and real
world requirements for ruggedness. Small capacitors reo
duce cost as well as board size. The driver outputs are
fully protected against overload and can be shorted to
± 3OV. Unlike CMOS, the advanced architecture of the
LT1180/LT1181 does not load the signal line when "shut
down" or when power is off. Both the receiver and RS232
outputs are put into a high impedance state. An advanced
output stage allows driving higher capacitive loads at
higher speeds with exceptional ruggedness against ESD.
For applications requiring up to 5 drivers and 5 receivers
with charge pump in one package see the LT1130 Series
data sheet. A version of the LT1180/81, the LT1080 and
LT1081 is available for applications requiring extra current
from the charge pump to power other circuitry. All of
Linear Technology's RS232 IC's are available in standard
surface mount packages.
Portable Computers
Battery Powered RS232 Systems
Power Supply Generator
Terminals
Modems
TYPICAL APPLICATiOn
~17_ _ 5V INPUT
Output Wavefonns
lTll$O
12
~--+,1:::....5--RS232 OUTPUT
DRIVER {
OUTPUT
::
-5V
RECEIVER {
OUTPUT
5V
fN
INPUT {
5V
fN
~....f:""'--RS232 OUTPUT
......-1-':::..,4--RS232 INPUT
2,..
4,..
Bps
8,..
......-¥---RS232 INPUT
'8
ON-lll'l'_-::1.1
16
10-67
LTl180/LTl181
ABSOLUTE mAXimum RATinGS
Supply Voltage (Vee) ................................ 6V
V+ ...............................................13.2V
V- ............................................. -13.2V
Input Voltage
Driver.......•.......................V- to V+
Receiver.............................. - 30V to 30V
On-Off Pin............................. GND to 12V
Output Voltage
Driver...................... V- +30V to V+ - 30V
Receiver. . . . . . . . . . . . . . . . . . . . . . - 0.3V to Vee +0.3V
Short Circuit Duration
V+........................................30 Seconds
V- ....•..................................30 Seconds
Driver Output. .......................... Indefinite
Receiver Output. ......................... Indefi nite
Operating Temperature Range
LT1180M/LT1181M .................... - 55°C to 125°C
LT11801/LT11811 ...................... - 40°C to 85°C
LT1180C/LT1181 C........................ OOC to 70°C
Lead Temperature (Soldering, 10 sec.)......•.....300°C
PACKAGE/ORDER InFORmATiOn
TOP VIEW
ORDER PART
NUMBER
TOP VIEW
LT1180MJ
LT1180lJ
LT1180lN
LT1180CJ
LT1180CN
J PACKAGE
18-LEAD CERAMIC DIP
N PACKAGE
18-LEAD PLASTIC DIP
TOP VIEW
J PACKAGE
16-LEAD CERAMIC DIP
10-68
N PACKAGE
16-LEAD PLASTIC DIP
ORDER PART
NUMBER
LT1180lS
LT1180CS
S PACKAGE
18-LEAD PLASTIC SOL
LT1181MJ
LT11811J
LT11811N
LT1181CJ
LT1181CN
TOP VIEW
S PACKAGE
16-LEAD PLASTIC SOL
LT11811S
LT1181CS
LTl180/LTl181
ELECTRICAL CHARACTERISTICS (Nole 1)
PARAMETER
Driver
Output Voltage Swing
Logic Input Vollage
Level
Logic Input Current
Output Short Circuil
Current
Output Leakage Currenl
Slew Rate
Receiver
Input Voltage Thresholds
Hysteresis
Input Resistance
Output Voltage
Output Short Circuit
Current
Output Leakage Current
Supply Current
Supply Leakage Current (vccl
On·OlfPin Current
I
CONDITIONS
Load = 3k to GND
Both Outputs.
MIN
I
Positive
Negative
••
••
Input Low Level (VOUT= High)
Input High Level (VOUT= Low)
VIN~2.0V
VINsO.8V
Sourcing Current, VOUT=OV
Sinking Current, VOUT=OV
SHUTDOWN (Note 2), VOUT= ±30V
Rl = 3kD, Cl = 51pF
•
Input Low Threshold, LT1180C, LT1181C
LT11801, M/LT11811, M
Input High Threshold, LT1180C/LT1181C
LT11801, M/LT11811, M
Output Low, lOUT = -1.6mA
Output High, lOUT = 160pA (Vcc = 5V)
Sinking Current, VOUT = Vce
Sourcing Current, VOUT=OV
SHUTDOWN (Note 2), OV sVoursVec
(Note 3)
TA=125°C
SHUTDOWN (Note 2) (LTII80 Only)
OV SVON.QFFS5V (LT1180 Only)
The • denotes specifications which apply over the operating temperature
range (OOC STA s700C for commercial grade, - 40°C STA s85°C for indus·
trial grade or - 55°CsTAs 125°C for military grade devices).
Note 1: These parameters apply for VON.QFF = 3V, Vcc = 5V and C= 0.1 pF un·
less otherwise specified.
••
••
••
•
••
•
•
•
•
5.0
-5.0
2.0
7
-7
4
0.8
0.2
0.1
3
3.5
-10
0.6
TYP
7.3
-6.5
1.4
1.4
5
5
12
-12
10
15
1.3
1.3
1.7
1.7
0.4
5
0.2
4.8
1
1
14
UNITS
V
V
0.8
20
20
100
30
2.4
3.0
1.0
7
0.4
-20
1
-15
MAX
10
23
30
100
80
V
V
pA
pA
rnA
rnA
pA
Vips
V
V
V
V
V
kD
V
V
rnA
rnA
pA
rnA
rnA
pA
pA
Note 2: VON.O FF = O.4V for - 55°CsTAsIOO°C, and VON.QFF = 0.2V for
100oCsTAs125°C (LT1180 only).
Note 3: Unless otherwise specified, Vee = 5V, external loading of V+ and
V- equals zero and the driver outputs are low (inputs high).
10-69
LT1l80/LTl181
Pin FunCTions (Pin numbers refer to LT1180)
TR1 OUT; TR2 OUT (Pins 15, 8): Driver outputs with RS232
voltage levels. Outputs are in a high impedance state
when in the SHUTDOWN mode or when power is off
(Vee OV) to allow data line sharing. Outputs are fully
short circuit protected from V- +30V to V+ - 30V with
power on, off, or in the SHUTDOWN mode. Typical output
breakdowns are greater than ± 4SV and higher applied
voltages will not damage the device if moderately current
limited. Shorting one output will affect output from the
other.
Vee (Pin 17): Input supply pin. Supply current drops to zero
in the SHUTDOWN mode.
GND (Pin 16): Ground pin.
=
On·Off (Pin 18): Controls the operation mode of the LT1180
and is TTL fCMOS compatible. A logic low puts the device
in the SHUTDOWN mode which reduces input supply current to zero and places both driver and receiver outputs
in a high impedance state. A logic high fully enables the
device.
REC1 IN; REC2 IN (Pins 14, 9): Receiver inputs. Accepts
RS232 voltage levels (± 30V) and has O.4V of hysteresis to
provide noise immunity. Input impedance is nominally
SkO.
V+ (Pin 3): Positive supply for RS232 drivers. V+ '"
2Vee -1.SV. Requires an external capacitor (;:& 1!IF) for
charge storage. Capacitor may be tied to ground or +SV
input supply. With multiple transceivers, the V+ and Vpins may be paralleled into common capacitors.
REC1 OUT; REC2 OUT (Pins 13, 10): Receiver outputs with
TTL/CMOS voltage levels. Outputs are in a high
impedance state when in the SHUTDOWN mode to allow
data line sharing. Outputs are fully short circuit protected
to ground or Vee with power on, off, or in the SHUTDOWN
mode.
V- (Pin 7): Negative supply for RS232 drivers. V- '"
-(2Vee-2.SV). Requires an external capacitor (~O.1!1F)
for charge storage. With multiple transceivers, the V+
and V- pins may be paralleled into common capacitors.
TR1IN; TR21N (Pins 12, 11): RS232 driver input pins. Inputs
are TTL/CMOS compatible. Inputs should not be allowed
to float. Tie unused inputs to Vee.
C1 +; C1 -; C2 +; C2 - (Pins 2, 4, 5, 6): Requires an external capacitor (~O.1!1F) from C1 + to C1- and another
from C2 + to C2 -. Pin 2 can be used for connecting a
second positive supply. When a separate positive supply
is used, C1 can be deleted.
TYPICAL PERFORmAnCE CHARACTERISTICS
Supply Generation from Vee
or Shutdown
Supply Ripple vs Capacitor
Receiver Input Thresholds
3.00
10
300
V+ SUPPLY
V
200
1\
~
~
ii' 100
o
10-70
I
1---
0.2
CAPACITOR
0.3
(~F)
0.4
2.25
INPUT HIGH
Q
c5
2.00
~ 1.50
l'....
~ 1.25
r-
~
P
.Y
~ 1.75
V
./
1.00
...... V
V
J..-l--'"
~TLOW_ e.--
0.75
v- SUPPLY
-10
0.1
~
:J::
l\.
-6
2.50
Cl-C4=0.1~F
,
~
2.75
I
RL =4.7k; V+ TO V-
7
-8
o
Vcc=5~
t- I-'
0
20 40 60 80 100 120 140 160 180 200
TIME()O--......-TRANSMIT/RECEIVE
......-1
V+
WITH SOME DRIVERS,
EXTERNALLY APPLIED
VOLTAGE CAN FORCE
THE SUPPLIES
V-
LOGIC
INVERTER
ON-OFF
(TRANSMIT/ _ _---i
RECEIVE)
INPUT
Sharing aReceiver Line
Sharing aTransmitter Line
LT1180 #1
RECEIVER
LT1180 #1
DRIVER
LT1180 #2
RECEIVER
LT1180 #2
DRIVER
RS232
>O-+-.....-TRANSMISSION
LINE
ON-OFF
(CHANNEL SELECT)
INPUT
10-72
LOGIC
INVERTER
.....--i
>O--....J
ON-OFF
(CHANNEL SELECT)
INPUT
LOGIC
INVERTER
.....--i
>0--.....
.....ITllnfAD
,~
LTl180/LTl181
APPLICATion HinTS
When driving CMOS logic from areceiver that will be used
in the SHUTDOWN mode and there is no other active reo
ceiver on the line, a 51k resistor can be placed from the
logic input to Vee to force a definite logic level when the
receiver output is in ahigh impedance state.
To protect against receiver input overloads in excess of
± 30V, avoltage clamp can be placed on the data line and
still maintain RS232 compatibility.
RECEIVER
LOGIC
OUTPUT
• A PTe THERMISTOR WILL
ALLOW CONTINUOUS OVERLOAD
OF GREATER THAN ± 100V
+
!+
ORlVEfl
RS232
INPUT
ON-lm'
INPUT
.,..
LT1180
EXTERNAL
. . . - - -.....- - - - - - - . . . , "POWER
OPAMP
T_ I"F
Vee
30V
LOGIC
OUTPUT
16 GNU
'FORCES LOGIC INPUT STATE
WHEN VON-orr IS LOW
TYPICAL APPLICATiOn
Operating with 12Vand 5V Supplies
~17~_~~PUT
LT1I80
- 12VOUT
0.1#
"¥,O.I"F
12
""'I
RS232 OUTPUT
INPUTS
11
13
""'I
RS232 OUTPUT
RS232 INPUT
OUTPUTS
ON-OFF
10
RS232 INPUT
18
10-73
LTl180/LTl181
PACKAGE DESCRIPTiOn Dimensions in inches (millimeters) unless otherwise noted.
JPackage
18·Lead Ceramic DIP
JPackage
16·Lead Ceramic DIP
0025
(OT~)
L
j
'ooo-,...
(0203-(146(1)
0100",0010
~~~:~:)
00I4_002G
\0:!5-01itl)
~
I
I
I
LT1181MJIIJ
LT1181CJ
Tjmax
ai'
ejc
TJmax
ai'
a~
lS0'C
l00'CJW
4O'C/W
LT1180MJ/IJ
lSO'C
l00'C/W
40'C/W
lS0'C
l00'CJW
4O'C/W
LTl180CJ
lSO'C
l00'C/W
4O'C/W
NPackage
16·Lead Plastic DIP
NPackage
18-Lead Plastic DIP
I..
"I
0251],00010
~
Lm'f"fl!''''I'lFf!Fm=r;rF.'l''''!'!!'
~
J
~)
o300-0 321l 0130"'0005
~I~
~LL"-'-------++---,.1
(OM~a) r==r='R(1(1(1(1(1(1(111
i (~:=~~:~1
+OO2!i
0325_ 0015
TVP
(~~~J
MIN
0045",0015
~2M~g:,) -
(1143",0:181)
Tjnw<
LTl181CN/IN
125'C
1:!O'C/W
SPackage
16·Lead Plastic SOL
SO'C/W
LT1180CN/IN
12S'C
12Jl'CJW
SO'C/W
SPackage
18·Lead Plastic SOL
0398-0413
(10109-10490)
161514131211109
10-74
JTLn~
..--,
rt:l;HNUUJtl'Y
l''''''''''-unet\12
~~ TECHNOLOGY~-------A-d-va--nc-e-d--Lo-w--P-o-w-e-r
LTl280/LT1281
5V RS232 Dual Driver/Receiver
FEATURES
DESCRIPTion
•
•
•
•
The LT1280 and LT1281 are the only dual RS232 driverl
receiver with charge pump to guarantee absolutely no
latch up. Requiring only 1/LF charge pump capacitors,
these interface optimized devices provide a realistic balance between CMOS levels of power dissipation and real
world requirements for ruggedness. Small capacitors reduce cost as well as board size. The driver outputs are
fully protected against overload and can be shorted to
± 30V. Unlike CMOS, the advanced architecture of the
LT1280/LT1281 does not load the signal line when "shut
down" or when power is off. Both the receiver and RS232
outputs are put into a high impedance state. An advanced
output stage allows driving higher capacitive loads at
higher speeds with exceptional ruggedness against ESD.
10mA Max Supply Current
Absolutely No Latchup
CMOS Comparable Low Power - 35mW Typ
Superior to CMOS
-Improved Speed - Operates Over 64K Baud
-Improved Protection - Outputs Can be Forced
to ± 30V Without Damage
- Three-State Outputs are High Impedance When Off
- Smaller Board Area Required
• 1/LA Supply Current in Shutdown
• Available in SO Package
• Available With or Without Shutdown
APPLICATions
•
•
•
•
•
For applications requiring up to 5 drivers and 5 receivers
with charge pump in one package see the LT1130 Series
data sheet. A version of the LT1280/81 , the LT1180 and
LT1181 is available for applications requiring small (O.1/LF)
capacitors. All of Linear Technology's RS2321C's are available in standard surface mount packages.
Portable Computers
Battery Powered RS232 Systems
Power Supply Generator
Terminals
Modems
TYPICAL APPLICATiOn
r:-17_ _ SV INPUT
Output Waveforms
lri2$(1
12
S --RS232 OUTPUT
')000-4'1i.i:..
DRIVER {
OUTPUT
::
-SV
RECEIVER {
OUTPUT
5V
OV
{
5V
OV
~-I"'---RS232 OUTPUT
14 --RS232 INPUT
......-r:-
INPUT
2,.s
4,.s
6,.s
8,.s
......-+---RS232 INPUT
ON_ili'F_--,,1BL_ _~16 ':"
10-75
LT1280/LT1281
ABSOLUTE mAXimum RATinGS
Supply Voltage (Vee) ................................ 6V
V+ .............................................. ,13,2V
V- ............................................. -13.2V
Input Voltage
Driver...............................V- to V+
Receiver.............................. - 30V to 30V
On·Off Pin ............................. GND to 12V
Output Voltage
Driver...................... V- +30V to V+ - 30V
Receiver. • . . . . . . . . . . . . . . . . . . .. - 0.3V to Vee +0.3V
Short Circuit Duration
V+........................................30 Seconds
V- .......................................30 Seconds
Driver Output. ......•.•................. Indefinite
Receiver Output. ......................... Indefinite
Operating Temperature Range
LT1280M/LT1281M .................... - 55°C to 125°C
LT1280I/LT12811 ...................... - 40°C to 85°C
LT1280C/LT1281C........................ OOC to 70°C
Lead Temperature (Soldering, 10 sec.)............300oC
PACKAGE/ORDER InFORmATiOn
TOP VIEW
ORDER PART
NUMBER
TOP VIEW
LT1280lS
LT1280CS
LT1280MJ
LT12801J
LT1280lN
LT1280CJ
LT1280CN
J PACKAGE
l8-LEAD CERAMIC DIP
N PACKAGE
l8-LEAD PLASTIC DIP
S PACKAGE
l8-LEAD PLASTIC SOL
TOP VIEW
TOP VIEW
LT1281MJ
LT12811J
LT12811N
LT1281CJ
LT1281CN
J PACKAGE
l6-LEAD CERAMIC DIP
10-76
N PACKAGE
l6-LEAD PLASTIC DIP
ORDER PART
NUMBER
LT1281IS
LT1281CS
S PACKAGE
l6-LEAD PLASTIC SOL
~TllnFA()
.......
,~
LT1280/LT1281
ELECTRICAL CHARACTERISTICS (Note 1)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Driver
Output Voltage Swing
Load = 3k to GND
Both Outputs.
Logic Input Voltage
Level
Input Low Level (Vour = High)
Input High Level (Vour: Low)
I
Positive
Negative
Logic Input Current
VIN~2.0V
Output Short Circuit
Current
Output Leakage Current
V1N :50.8V
Sourcing Current, VOUT=OV
Sinking Current, Your = OV
SHUTDOWN (Note 2), Vour = ±30V(Note4)
Slew Rate
RL =3k(l, Cl =51pF
Receiver
Input Voltage Thresholds
Input Low Threshold, LT1280C/LT1281 C
LT12801, M/LT12811, M
Input High Threshold, LT1280C/LT1281C
LT12801, MILT12811, M
Hysteresis
Input Resistance
Output Voltage
Supply Current
Output Low, lour = -1.6mA
Output High, lOUT = 160~A (Vee = 5V)
Sinking Current, Vour = Vec
Sourcing Current, Vour=OV
SHUTDOWN (Note 2), OV:5Vour :5Vce
(Note 3)
Supply Leakage Current (Vee)
On-Off Pin Current
OV :5 VON.OFF:5 5V (LT1280 On Iy)
Output Short Circuit
Current
Output Leakage Current
SHUTDOWN (Note 2) (LT1280 Only) (Note 4)
The. denotes specifications which apply over the operating temperature
range (0°C:5TA:570oC for commercial grade, -40 oC:5TA:585°C for industrial grade or - 55°C:5TA:5125°C for military grade devices).
Note 1: These parameters apply for VON.OFF = 3V, Vee = 5V and C= 1.0~F unless otherwise specified.
Note 2: VON.OFF= O.4V for - 55°C:5TA:5100oC, and VON.O FF = 0.2V for
l000C:5TA:5125°C (LT1280 only).
••
••
••
•
••
••
•
••
•
•
•
•
V
V
5.0
-5.0
7.3
-6.5
1.4
1.4
0.8
2.0
V
V
20
20
~A
~A
7
-7
5
5
12
-12
10
25
~A
4
15
30
V/~s
0.8
0.2
1.3
1.3
1.7
1.7
rnA
rnA
2.4
3.0
0.1
0.4
1.0
3
5
0.2
4.8
7
3.5
-10
0.3
0.4
-20
0.6
1
7
1
-15
V
V
V
V
V
k(l
V
V
rnA
rnA
10
~A
10
14
rnA
rnA
25
80
~A
~A
Note 3: Unless otherwise specified, Vee = 5V, external loading of V+ and
V - equals zero and the driver outputs are low (inputs high).
Note 4: Leakage current at 125°C = 100~ max.
10-77
LT1280/LT1281
Pin FunCTions (Pin numbers refer to LT1280)
TR1 OUT; TR2 OUT (Pins 15, 8): Driver outputs with RS232
voltage levels. Outputs are in a high impedance state
when in the SHUTDOWN mode or when power is off
(Vcc=OV) to allow data line sharing. Outputs are fully
short circuit protected from V- +30V to V+ - 30V with
power on, off, or in the SHUTDOWN mode. Typical output
breakdowns are greater than ± 45V and higher applied
voltages will not damage the device if moderately current
limited. Shorting one output will affect output from the
other.
Vee (Pin 17): Input supply pin. Supply current drops to zero
in the SHUTDOWN mode.
GND(Pin 16): Ground pin.
On-Off (Pin 18~ Controls the operation mode of the LT1280
and is TIL/CMOS compatible. A logic low puts the device
in the SHUTDOWN mode which reduces input supply current to zero and places both driver and receiver outputs
in a high impedance state. A logic high fully enables the
device.
REC1 IN; REC2 IN (Pins 14, 9): Receiver inputs. Accepts
RS232 voltage levels (± 30V) and has O.4V of hysteresis to
provide noise immunity. Input impedance is nominally
5kU.
V+ (Pin 3): Positive supply for RS232 drivers. V+ ""
2Vee-1.5V. Requires an external capacitor (~O.1fLF) for
charge storage. Capacitor may be tied to ground or +5V
input supply. With multiple transceivers, the V+ and Vpins may be paralleled into common capacitors.
REC1 OUT; REC2 OUT (Pins 13, 10): Receiver outputs with
TIL/CMOS voltage levels. Outputs are in a high
impedance state when in the SHUTDOWN mode to allow
data line sharing. Outputs are fully short circuit protected
to ground or Vee with power on, off, or in the SHUTDOWN
mode.
V- (Pin 7): Negative supply for RS232 drivers. V- ""
-(2Vee-2.5V). Requires an external capacitor (~O.1fLF)
for charge storage. With !Y1ultiple transceivers, the V+
and V- pins may be paralreled into common capacitors.
TR1IN; TR21N (Pins 12, 11): RS232 driver input pins. Inputs
are TIL/CMOS compatible. Inputs should not be allowed
to float. Tie unused inputs to Vee.
C1 +; C1-; C2 +; C2 - (Pins 2, 4, 5, 6): Requires an external capacitor (~O.1fLF) from C1 + to C1- and another
from C2 + to C2 -. Pin 2 can be used for connecting a
second positive supply. When a separate positive supply
is used, C1 can be deleted.
TYPICAL PERFORmAnCE CHARACTERISTICS
Supply Generation from Vee
or Shutdown
10
-
3.00
v+ SUPPLY
".....
II
V~=5J
I
I
RL =4.7k; V+ TO V-
-10
OUTPUT SINKING=
~2.25
INPUT HIGH ....... V
c
:I:
~ 1.75
1..,...--' .....
:I:
:: 1.50
"-
=>
~ 1.25
'-
!==
2.50
;5 2.00
r-...
-8
100
2.75
Cl-C4=l~F
,
-6
Receiver Output Short
Circuit Current
Receiver Input Thresholds
1.00
0.75
V
--- V
--
V
1-.....
OUTPUT SOURCING
J....iNPUTL~_ +--
V- SUPPLY
o
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
TIME (ms)
10-78
0.50
-55 -25
0
25
50
75
TEMPERATURE ('G)
100
125
0.1
-55
-25
0
25
50
75
TEMPERATURE ('C)
100
125
fTlnfAD
......
,~
LT1280/LT1281
TYPICAL PERFORmAnCE CHARACTERISTICS
On·Off Pin Thresholds
On-Olf Pin Current vs Voltage
40
5.0
4.5
35
/
30
!
25
~
20
~
15
4.0
/
§ 3.5
/
'"
~
/
/
'-'
~ 10
3.0
§; 2.5
z
0::
I~ 2.0
~
~ 1.5
/
-10
1.0
\.;
-5
o
0.5
o
........ ~
- t---I--J ----
MAXIMUM OFF VOLTAGE
-55 -25
2
3
INPUT VOLTAGE (V)
~ONVOLTAGE I---
0
25
50
75
TEMPERATURE (0C)
100
125
Driver Output Leakage
in Shutdown
Supply Current in Shutdown
1000
100
f=:Vcc
5V
VOUT=~~ ~
/
/
1
-55 -25
/
a
25
50
75
TEMPERATURE (OC)
100
0.1
-55 -25
125
10V
{
DRIVER {
OUTPUT
25
50
75
TEMPERATURE (0C)
100
125
!
6V
RECEIVER
OUTPUT
5V
OV
_~~
4V
2V
OV
-10V
ON-OFF {
INPUT
0
Shutdown to Receiver
Output
Shutdown to Driver Output
g~+~~~
/ 1/ VtOUT= 'I 3OV
ON-OFF { 5V
INPUT
OV
5V
OV
1ms
2ms
3ms
4ms
1ms
2ms
3ms
4ms
10-79
LT1280/LT1281
APPLICATion HinTS
The driver output stage of the LT1280 offers significantly
improved protection over older bipolar and CMOS designs.
In addition to current limiting, the driver output can be ex·
ternally forced to ±30V with no damage or excessive cur·
rent flow, and will not disrupt the supplies. Some drivers
have diodes connected between the outputs and the supplies, so externally applied voltages can cause excessive
supply voltage to develop.
Placing the LT1280 in the SHUTDOWN mode (Pin 18 low)
puts both the driver and receiver outputs in a high
impedance state. This allows data line sharing and
transceiver applications.
The SHUTDOWN mode also drops input supply current
(Vcc; Pin 17) to zero for power-conscious systems.
Transceiver
LT12801LT1281 Driver
~
n
~~..J
BE FORCED
EXTERNALLY
LT1280 #1
DRIVER
30V
L_ 30V
LOGIC
TRANSMITIRECEIVE -+--4
LINE
LT1280 #2
RECEIVER
Older RS232 Drivers and CMOS Drivers
-t>t
RS232
>O--+--TRANSMIT/RECEIVE
LINE
V+
WITH SOME DRIVERS,
EXTERNALLY APPLIED
VOLTAGE CAN FORCE
THE SUPPLIES
V-
ON-OFF
(TRANSMITI
RECEIVE)
INPUT
Sharing aReceiver Line
LOGIC
INVERTER
Sharing aTransmi"er Line
LT1280 #1
RECEIVER
LT1280 #1
DRIVER
LOGIC
INPUT A
LT12BO #2
RECEIVER
LT1280 #2
DRIVER
RS232
TRANSMISSION
LINE
LOGIC
INPUT B
LOGIC
INVERTER
ON-OFF
(CHANNEL _"---1 > 0 -....
SELECT)
INPUT
10-80
ON-OFi"
(CHANNEL
SELECT)
INPUT
LOGIC
INVERTER
ITllnff\D
-,~
LT1280/LT1281
APPLICATion HinTS
When driving CMOS logic from a receiver that will be used
in the SHUTDOWN mode and there is no other active reo
ceiver on the line, a 51k resistor can be placed from the
logic input to Vee to force a definite logic level when the
receiver output is in ahigh impedance state.
lk!l'
RECEIVER
~~~~~----"w.,-_--+..,
LOGIC
OUTPUT
'APTC THERMISTOR WILL
ALLOW CONTINUOUS OVERLOAD
OF GREATER THAN ± lDOV
To protect against receiver input overloads in excess of
±30V, avoltage clamp can be placed on the data line and
still maintain RS232 compatibility.
LT1280
EXTERNAL
~POWER
Vee
+
OPAMP
~1~F
RS232
INPUT
LOGIC
OUTPUT
16 GND
ON-OFi'
INPUT
.,..
'FORCES LOGIC INPUT STATE
WHEN VON-Ili'I'IS LOW
v~1#
TYPICAL APPLICATiOn
Operating with 12V and 5V Supplies·
IN~~~--~
t-:1.;...7- - 5 V INPUT
!.!!tBD
.--......._ - 12VOUT
¥1~F
1#
~'I
12
~-~--RS232 OUTPUT
INPUTS
11
13
"""I
~-F---RS232 OUTPUT
....-+:.:.---RS232 INPUT
OUTPUTS
ON-OFi'
10
....-+'----RS232 INPUT
18
'SUPPLY CURRENT IS SHUTDOWN
FROM BOTH SUPPLIES.
10 TYP=4mA.
10-81
LT1280/LT1281
PACKAGE DESCRIPTion Dimensions in inches (millimeters) unless otherwise noted.
JPackage
16-Lead Ceramic DIP
~
(013)
MIN
JPackage
18·Lead Ceramic DIP
~~~ (:(~.,~
MAX
I
1514131211
10
9
1
--~:t310
0220-0310
\559Q-7Sro)
fn--T""'-r.r.",...,.",",,-r.r""'~
1234567808471
~"(H'
.::J..15201
•
.. ,·:-·\T
IT:.)~ ~ ~ --I~~
(2490)
0100 .. 0010
MAX
TJmax
LT1281MJIIJ
150'C
LT1281CJ
150'C
I
I
I
9ja
100'CIW
l00'C!W
I
I
I
(0 360-0 66D)
(2540±02!>4)
81'
40'CfW
40'C!W
NPackage
18·Lead Plastic DIP
NPackage
16·Lead Plastic DIP
I
..
---..Q1lQ.
(:;~~€
(195S\l)~
::::::: I
~)
~
(1651)
"'-----++---.j
OI3j)~OOOS
r[
r...,------+J----,
(3302,,01271, _ _
r-i125t==~r~i~,~~.r-\r'r~r~e
(3Mll~)
50'CI
SPackage
16·Lead Plastic SOL
SPackage
18·Lead Plastic SOL
0447-0463
LI113;4-11761l)~
10 H:
6 15 14 IS 12
'l
BBt-
0093-0104
(231;2-2642)
0010_00'19 x45
~.~:~~~7)
~~;:::;:~-+
0009-0013
~)
0016-0OS0
(040fi-1270)
10-82
L
0037-0045
~nnnnnnnnh
(:~:(--I
TYP
,
~'
~
I.-JL '-"
0014-0019
~)
(010
SECTion 11- SPECIAL FunCTion
11-1
INDEX
SECTION 11-SPECIAL FUNCTION
INDEX ..... ....................................................................................... " . .... ..
11-2
PROPRIETARY PRODUCTS
LTK001, Thermocouple Cold Junction Compensator and Matched Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC201, Quad CMOS SPSTLow Charge Injection Analog Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTt 025, Micropower Thermocouple Cold Junction Compensator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC 1043, Dual Precision Instrumentation Switched-Capacitor Building Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1043CS, Dual Precisionlnstrumenlation Switched-Capacitor Building Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTtOBB, WidebandRMS-DCConverterBuildingBlock ................................................................
LT10B9, High.,SideSwitch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LT11BB, 1.5A High Side Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
11-3
13-3
11-7
11-15
11-31
11-33
11-4!l
13-55
11-2
.LTUD~~~~-T-h-e-rm-o-c-o-u-p-Ie-C-O-I-d-J-U~_T:_~-i~-~
Compensator and Matched Amplifier
and extremely low input bias currents «600pA) to allow
high impedance input filters to be used without degrading
offset voltage or drift.
FEATURES
•
•
•
•
•
0.75°C Initial Accuracy (A Version)
Extremely Low Warmup Drift
Preset Outputs for Type E, J, K, R, S, T
Single 5V to ± 20V Operation
4aOfLA Typical Supply Current
Matching of the kits is accomplished by separating the
compensators and amplifiers according to the polarity of
their initial (room temperature) errors. This eliminates the
need to sum the errors of the two components to find the
worst-case error.
APPLICATions
The LTK001 has direct thermocouple outputs of 60.9fLV/oC
(E), 51.7fLV/oC (J), 40.6fLV/oC (K, T), and 5.95fLV/oC (R, S). It
also has a 10mV/oC output which can be scaled to match
any arbitrary thermocouple.
• Thermocouple Cold Junction Compensation
DESCRIPTion
The LTKOO1 is a thermocouple amplifier supplied with a
matched cold junction compensator. By separating the
amplifier and compensator functions, the problem of compensator temperature rise is virtually eliminated. The compensator is a selected version of the LT1025 cold junction
compensator. The amplifier, which is also available separately as LTKAOx has been specially selected for thermocouple applications. It has low supply current to minimize
warmup drift, very low offset voltage « 35fLV), high gain,
The amplifier in the LTKOO1 kit is available in an a-pin plastic miniDIP for OOC to 70°C operation and an 8-pin TO-39
metal can for - 55°C to +125°C operation. The compensator is available in a-pin plastic miniDIP for O°C to
70°C operation and a-pin ceramic miniDIP for - 55°C to
+125°C operation.
For multiple thermocouple applications using one compensator, amplifiers may be ordered separately (LTKAOx),
still matched to the compensator.
For typical performance curves and applications circuits consult the
LT1025 data sheet.
Type K10mV/oC Thennometer
R2
10011
FULL·SCALE TRIM
R3-'
255k
1%
C2
O.lpf
Rl
lk
1%
v+
v+
LT1025
'R4s
v-
3~~ ,R4IS NOT REQUIRED (OPEN) fOR
LT1025 TEMPERATURES "O°C.
"SELECTED fOR 0°C-100°C RANGE.
11-3
LTKDDl
ABSOLUTE mAXimum RATinGS
Amplifier (LTKAOx)
Supply Voltage (Total V+ to V-) ..................... 40V
Differential Input Current (Note 1) ................ ± 10mA
Common-Mode Input Voltage .......... Equal to Supplies
Output Short Circuit Duration .................. Indefinite
PACKAGE/ORDER InFORmATion
TOPVlEW
'0'
,.m,O'·-
8 ~~ 7p,V/OC
60.9/tV/"C 1
VIN 2
1OmV/~g
7 40.6pV/"C
3
6
GND 4
PlASTIC DIP
COMPENSATOR
COMMON
HERMETIC DlP
COMPENSATOR
(LT1025)
Compensator (LT1 025)
Supply Voltage (VIN to Ground Pin) ................... 36V
Output Voltage (Forced) .............................. 5V
Output Short Circuit Duration .................. Indefinite
~~~/"C
5 R-
(LT1025)
TOP VIEW
Both Devices
Operating Temperature Range
LTK001AMJ, LTK001MJ ............... -55°Cto 125°C
LTK001ACN, LTK001CN .................... O°C to 70°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature Range (Soldering, 10 sec.) ....... 300°C
v+
-IN 2
7
+IN 3
6 OUT
v-
5 OVER COMP
4
ORDER
PART NUMBER
KIT
LTKOO1CN
LTK001ACN
LTKOO1MJ
LTKOO1AMJ
AMPLIFIER ONLY
(Note A)
LTKAOOCN8
LTKA01CN8
PLASTIC DIP ·AMPLIFIER (lTKAOx)
TOP VIEW
AMPLIFIER ONLY
(Note A)
LTKAOOMH
LTKA01MH
VosTRIM
v.iai
TRI~~V+
:
~OUT
-INq
+IN 3
(5j OVER-
_
~
caMP
VMETAL CAN AMPLIFIER (LTKAOx)
Note A: The polarity of the amplifier is indicated by the 0 or 1 in the part
number. An LT1025 with a0 identifier is properly matched with an LTKAOO
while an LT1025 with a 1 identifier should be used with an LTKA01.
ELECTRICAL CHARACTERISTICS - mATCHED AmPLIFIER
AnD COMPEnSATOR TA=25°C, VS= ±15V(Amplilier~ VS=5V(Compensalor)
PARAMETER
Total Temperature Error @25°C
(Note 2)
CONDITIONS
Slope Error (Notes 3 and 8)
O°C:5 Tj's 70°C
Total Temperature Error at
Temperature Extremes (Note 8)
00C:5TJ:5700C
-55°C:5Tj:5125°C
Temperature Error Change with
Supply Voltage (Note 4)
Supply Current
11-4
MIN
TypeE
TypeJ
TypeK, T
TypeR,S
TypeE
TypeJ
Type K, T
Type R,S
TypeE
TypeJ
Type K, T
TypeR,S
TypeE
TypeJ
TypeK, T
TypeR,S
LTKOO1A
TYP
(Note 11)
(Note 11)
(Note 11)
480
MAX
0.75
0.75
0.86
5.0
0.05
0.06
0.07
0.28
2.0
2.1
2.6
16
6
6
6.3
MIN
LTKOO1
TYP MAX
2.5
2.5
2.5
5.0
0.09
0.09
0.10
0.32
5
5
5.2
16
8.5
8.5
9
30
30
0.1
0.1
900
480
900
UNITS
°C
°C
°C
°C
°CfoC
°CfoC
°CfoC
°CfoC
°C
°C
°C
°C
°C
°C
°C
°C
°CN
p.A
I'TllnfJ\D
'TECHNCllOGV
.-,
LTKOOl
ELECTRICAL CHARACTERISTICS
comPEnSATOR (LTl 025) Vs =SV unless otherwise specified
PARAMETER
Temperature Error at 10mV/oC Output (Note 8)
Temperature Error at Individual Outputs (Note 9)
Supply Current
Change in Supply Current
Line Regulation (Note 10)
Load Regulation (Note 10)
Divider Impedance
CONDITIONS
LTK001A
TJ=25°C
LTK001
Full Temperature Span
LTK001A
E,J, K,T
R,S
LTK001
E,J,K,T
R,S
Full Temperature Span
4VSVINS36V
0°CsTis70oC
-55°CsTiS125°C
4VSVINS3SV
4VSV1NS3SV
10mV/oC Output
Oslos1mA
10mV/oC Output
E
J
K,T
R,S
•
•
•
•
•
COMPENSATOR (LT1025)
MIN
TYP
MAX
0.3
0.5
0.5
2.0
See Curve on LT1025 Data Sheet
0.4
0.75
0.4
1.5
0.8
2.4
1.2
3.5
See Curve on LT1025 Data Sheet
100
80
150
200
0.01
0.05
0.003
0.02
•
0.04
0.2
2.5
2.1
4.4
3.S
UNITS
°C
°C
°C
°C
°C
°C
pA
pA
pA
~AN
°CN
°C
kll
kll
kll
kG
ELECTRICAL CHARACTERISTICS
AmPLIFIER (LTKAOx) Vs = ± 1SV, VCM =0, Tj =25°C, unless otherwise specified
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift with Temperature
Input Bias Current
Input Bias Current Drift with Temperature
Input Offset Current
Input Offset Current Drift with Temperature
Large Signal Voltage Gain
Common·Mode Rejection Ratio
Power Supply Rejection Ratio
Common·Mode Input Voltage Range
Output Voltage Swing (Notes 5and 7)
Supply Current
Supply Voltage Range
(Note 5)
OOCSTAS70°C
- 55°CsTAs125°C
(Note 5)
OOCsTAs70oC
-55°CsTAs125°C
(Note 5)
RL = 10kll
VCM= ±13.5V
±2.5VsVss ±20V (Note 4)
Above VNotes5andS
BelowV+
Referred to
lour=0.1mA
Supplies
IOUT=1mA
Total V+ to V- Voltage
AMPLIFIER (LTKAOx)
TYP
MAX
10
35
0.3
1.5
±200
±600
±300
±1500
1
5
±100
±500
±700
±200
O.S
4
400
2000
106
130
106
125
0.75
1.0
O.S
1.1
400
SOO
4.5
40
MIN
CONDITIONS
•
••
•
••
•
•
•
•
•
•
UNITS
~V
~V/oC
pA
pA
pAfoC
pA
pA
pAfoC
VlmV
dB
dB
V
V
V
V
pA
V
11-5
III
LTKOOl
The. denotes the specifications which apply over the full operating
temperature range.
Note 1: The inputs olthe LTKAOx amplifier are clamped with diodes, so a
differential voltage rating does not apply.
Note 2: Total temperature error is the overall error at 25°C taking into
account the offset of the amplifier, the offset at the compensator 10mV/oC
output, and the error in the compensator divider network. Warmup drift is
not included.
Note 3: Slope error is the increase in total temperature error as ambient
temperature Is increased. It Is guaranteed by design and by other tests, but
is not tested directly.
Note 4: This is aworst~ase limit assuming that any or all supply voltages
change.
Note 5: Guaranteed, but not tested.
Note 6: By referring common-mode range to the supplies, the range
referred to ground can be quickly calculated for any given supply voltage.
With a single 5V supply, for instance, which has a worst-case low value of
4.7V, the upper common-mode limit is 4.7V -W = 3.7V. The lower commonmode limit IsOV +0.75V=0.75V. With ± 15V supplies, the limits would be
+ 14Vand -14.25V, respectively. Common-mode range has atemperature
sensitivity of .. 2mV/oC.
Note 7: Absolute output voltage swing Is calculated by subtracting the
given limits from actual supply voltage. These limits indicate the point
where offset voltage has changed suddenly by ~I'V.
Note 8: Temperature error is defined as the deviation from the following
formula:
Vour=a(T)+ap(T _25°C)2
a = Typical thermoucouple Seebeck coefficient as follows, E= 6O.91'V/oC,
J = 51.7I'V/oC, K, T=40.6I'V/oC, R, S=5.95I'V/oC.a= 10mV/oCatthe 10mV
output.
P= Nonlinearity coefficient built into the LT1025 to help compensate for
the nonllnearitles ofthermocouples. p= 5.5x 10- 4, generating 0.34°C bow
for 25°C temperature change, and 1.36°C bow for 50°C change.
Note 9: Temperature error at the individual outputs is the sum of the
10mV/oC output error plus the resistor divider error.
Note 10: Line and load regulation do not take Into account the effects of
self-heating. Output changes due to self·heating can be calculated as
follows:
J1Vour(Line) = J1V IN (lq+ Iload) (l50oCIW)
J1Vour(Load)=(J1lload)(VIN) (l50°CIW)
Iq = LT1025 supply current
Load regulation is 30p.A s 10 s 1rnA for TAS ooC.
Note 11: Larger errors with type Rand Sthermoucouples are due mostly to
35p.V offset of the amplifier. This error can be reduced to 51'V max with the
LTC1050 or LTC1052 operational amplifiers.
PACKAGE DESCRIPTiOn Dimensions in inches (millimeters) unless otherwise noted.
NPackage
8Lead Molded DIP
J Package
8Lead Hermetic DIP
HPackage
8Lead TO·5 Metal Can
t D.400:l
(:M1~)1MQl..+
(10287)
0025
8
7
6
'6,
5
0220-0310
(5588-7874)
~1'~'~~~4~ ~
(~:)-l ~
MAA
0 -=r
(10160)
MAX
MAX
(0.635)
RADTYP
~
f
0.250::1::0010
0.254 )
1
2
3
4
(5M':)
_
~J~Jj~ ~L_7~" tJ tj
(0.360-0660)
~
31Ts'
MI.
0.038-0.068
(0965-1727)
0.100::1:0.010
~
0045±0015
(1143±0381)
0100:1::0.010
(2540::1:0254)
0.009-0.015
NOTE: LEAD DIAMETER 15 UNCONTROUED BETWeEN
THE REFERENCE PlANE AND SEATING PLANE
11-6
1
+0.025
°.325_00151
8255+ 0635
-0361
~
~7YD~l!:"ff~--M-ic-r-o-p-o-w-e-r-Th-e-r-m-o-~-:-~-:-I:
Cold Junction Compensator
FEATURES
DESCRIPTion
•
•
•
•
80fLA Supply Current
4V to 36V Operation
0.5°C Initial Accuracy (A Version)
Compatible with Standard Thermocouples
(E, J, K, R, S, T)
• Auxiliary 10mV/oC Output
The LT1025 is a micropower thermocouple cold junction
compensator for use with type E, J, K, R, S, and T thermo·
couples. It utilizes wafer level and post-package trimming
to achieve 0.5°C initial accuracy. Special curvature correc·
tion circuitry is used to match the "bow" found in all
thermocouples so that accurate cold junction compensa·
tion is maintained over awider temperature range.
APPLICATions
The LT1025 will operate with a supply voltage from 4V to
36V. Typical supply current is 80tLA, resulting in less than
0.1°C internal temperature rise for supply voltages under
10V. A 10mVJOC output is available at low impedance, in
addition to the direct thermocouple voltages of 60.9/NloC
(E), 51.7fLVJOC (J), 40.3fLV/oC (K, T) and 5.95fLV/oC (R, S). All
outputs are essentially independent of power supply
voltage.
• Thermocouple Cold Junction Compensator
• Centigrade Thermometer
• Temperature Compensation Network
A special kit is available (LTK001) which contains an
LT1025 and acustom tailored thermocouple amplifier. The
amplifier and compensator are matched to allow a much
tighter specification of temperature error than would be
obtained by adding the compensator and amplifier errors
on a worst·case basis. The amplifier from this kit is avail·
able separately as LTKAOx.
The LT1025 is available in an 8pin plastic miniDIP for temperatures between OOC and 70°C. A ceramic miniDIP is
also available for - 55°C to +125°C operation.
BLOCK DIAGRAm
TYPICAL APPLICATion
III
Type K10mV/oC Thermometer
R2
1000
FULL-SCALE TRIM
A3~·
255k
1%
R1
1k
1%
v+
v+
R- COMMON
·CORRECTS FOR BOW IN COLD JUNCTION,
NOT IN PROBE (HOT Jl'NCT!ON)
GND
"'-'O!ti"
R4'
"R4s
-k. R41S NOT REQUIRED (OPEN) FOR
LT1025 TEMPERATURES
~O°C
··SELECTED FOR O°G-l0Q c C RANGE
ttOR EQUIVALENT SEE "AMPlIFIER CONSIDERATIONS"
11-7
LT1025
ABSOLUTE mAXimum RATinGS
Input Supply Voltage ................................ 36V
Output Voltage (Forced) .............................. 5V
Output Short Circuit Duration .................. Indefinite
Operating Temperature Range
LT1025AC, LT1025C .................... OOC to +70°C
LT1025AM,LT1025M ............... -55°Cto +125°C
Storage Temperature Range ........... - 55°C to +150°C
Lead Temperature (Soldering, 10 sec) ............. 300°C
PACKAGE/ORDER InFORmATion
ORDER PART
NUMBER
TOP VIEW
E
60.9~vrc 1
10mv/~g
LT1025AMJ8
LT1025MJ8
LT1025ACN8
LT1025CN8
3
' - -_ _...J
J PACKAGE
HERMETIC DIP
5
~~MMON
N PACKAGE
MOLOED DIP
ELECTRICAL CHARACTERISTICS Vs=5V,TA=25°C, Pin 5tied to Pin4,unlessotherwisenoted.
PARAMETER
Temperature Error at
10mV/oC Output (Notes 3, 4)
Resistor Divider Accuracy
(Notes 1,3)
CONDITIONS
TJ=25°C
LT1025A
LT1025
Full Temperature Span
VOUT= 10mV/oC
LT1025A
E
MIN
K,T
R,S
LT1025
E
J
K,T
R,S
Supply Current
Line Regulation (Note 2)
Load Regulation (Note 2)
Divider Impedance
4VsV1N s36V
LT1025AC, LT1025C
LT1025AM, LT1025M
4VSVINS36V
OsloslmA
E
J
K,T
R,S
Change in Supply Current
4VSVINS36V
The • denotes the specifications which apply over the full operating
temperature range.
Note 1: Divider accuracy Is measured by applying a10.000V signal to
the output divider and measuring the individual outputs.
Note 2: Regulation does not Include the effects of self·heatlng. See
"Internal Temperature Rise" in Application Guide. Load regulation is
3O~sloslmA forTAsOoC.
11-8
••
•
•
MAX
UNITS
0.3
0.5
See Curve
0.5
2.0
60.6
51.4
40.3
5.8
60.9
51.7
40.6
5.95
61.3
52.1
41.0
6.2
~V/oC
60.4
51.2
40.2
5.75
50
50
60.9
51.7
40.6
5.95
61.6
52.3
41.2
6.3
100
150
200
0.02
0.2
~VloC
~V/oC
~VloC
~V/oC
0.05
,.AN
•
J
TYP
80
0.003
0.04
2.5
2.1
4.4
3.8
0.Q1
°C
°C
~V/oC
~V/oC
~VloC
~
~
~
°CIV
°C
kII
k!l
k!l
k!l
Note 3: To calculate total temperature error at individual thermocouple
outputs, add 10mV/oC output error to the resistor divider error. Total error
for type Koutput at 25°C with an LT1025A Is 0.5°C plus (0.4~VI°C) (25°C) I
(40.6~VIOC) = 0.5°C+0.25°C = 0.75°C.
Note 4: Temperature error is defined as the deviation from the following
formula: VOUT= 10mV(T) + (10mVj(5.5x 10- 4)(T - 25°Cj2. The second term is
a built·in nonlinearity designed to help compensate the nonlinearity of the
cold junction. This "bow" is ",0.34°C for a25°C temperature change.
LT1025
TYPICAL PERFORmAnCE CHARACTERISTICS
10mV/oC Output Temperature
Error LT1 025
10mV/oC Output Temperature
Error LT1 025A
Supply Current
10
~
/
GUA~NTE~D LIMITS"
-
LT1025
.........
..-V
...... ...- .......... r--.....
I\.
GUARANTEED LIMITS"
~ ~ LT1025A . . - /
/'
./'
.......... f-""""
I"'-
L
........
-~
-~
0
~
~
~
JUNCTION TEMPERATURE (OC)
roo
-
"ERROR CURVE FACTORS IN THE NONLINEARITY
TERM BUILT IN TO THE LT1025. SEE THEORY OF
OPERATION IN APPLICATION GUIDE SECTION.
-~
160
TJ=125°C
1 120
~
100
§
80
'-'
I I
I I
TJ-25°C
60
I I
40
\.
0
~
~
~
100
JUNCTION TEMPERATURE (OC)
TJ--55°C
20
'\
-~
DOES NOT INCLUDE 30pA
PULL -DOWN CURRENT
REQUIRED FOR TEMPERATURES
BELOW O°C
180
140
5
1~
/
'\.
V
·8
10
/
...... r--..
/
200
o
1~
o
I I
5
10
PIN 4 TIED TO PIN 5
15
20 25 30
SUPPLY VOLTAGE (V)
35
40
"ERROR CURVE FACTORS IN THE NONLINEARITY
TERM BUILT IN TO THE LT1025. SEE THEORY OF
OPERATION IN APPLICATION GUIDE SECTION.
APPLICATion GUIDE
The LT1025 was designed to be extremely easy to use, but
the following ideas and suggestions should be helpful in
obtaining the best possible performance and versatility
from this new cold junction compensator.
Theory of Operation
A thermocouple consists of two dissimilar metals joined
together. Avoltage (Seebeck EMF) will be generated if the
two ends of the thermocouple are at different tempera·
tures. In Figure 1, iron and constantan are joined at the
temperature measuring point T1. Two additional thermo·
couple junctions are formed where the iron and con·
stantan connect to ordinary copper wire. For the purposes
of this discussion it is assumed that these two junctions
are at the same temperature, T2. The Seebeck voltage, Vs,
is the product of the Seebeck coefficient a, and the tern·
perature difference, T1 - T2; Vs =a (T1 - T2). The junco
tions at T2 are commonly called the cold junction because
a common practice is to immerse the T2 junction in OOC
ice/water slurry to make T2 independent of room tempera·
ture variations. Thermocouple tables are based on a cold·
junction temperature of O°C.
To date, IC manufacturers efforts to make microminiature
thermos bottles have not been totally successful. There·
fore, an electronically simulated cold·junction is required
for most applications. The idea is basically to add a tem·
perature dependent voltage to Vs such that the voltage
sum is the same as if the T2 junction were at a constant
O°C instead of at room temperature. This voltage source is
called acold junction compensator. Its output is designed
to be OV at OOC and have a slope equal to the Seebeck
coefficient over the expected range of T2 temperatures.
TEMPERATURE~
TO BE MEASUREO
Fe
r.,
l~l
Cu
~""'CO:-:-:NS':::-:AN""TA""'N...;,'.,~\;-....,-
}vs
L~~025
MUST BE LOCATED
NEXT TO COLD JUNCTION
FOR TEMPERATURE TRACKING
Figure 1
To operate properly, a cold junction compensator must be
at exactly the same temperature as the cold junction of
the thermocouple (T2). Therefore, it is important to locate
the LT1025 physically close to the cold junction with local
temperature gradients minimized. If this is not possible,
an extender made of matching thermocouple wire can be
11-9
IIII
LT1025
used. This shifts the cold junction from the user termination to the end of the extender so that the LT1025 can be
located remotely from the user termination as shown in
Figure 2.
AMPLIFIER
"HOT"
,..-:'::""""f-<';-"";';'---f<';-:"""+I
JUNCTION
"'-,,.,,.....;r<+~-;.~C:-u+I
"NEW" COLD
JUNCTION
Figure 2
The four thermocouple outputs on the LT1025 are
60.9/NioC (E), 51.7p'v/oC (J), 40.6/LV/oC (K and 1), and
6/LV/oC (R and S). These particular coefficients are chosen
to match the room temperature (25°C) slope of the thermocouples. Over wide temperature ranges, however, the
slope of thermocouples changes, yielding a quasi-parabolic error compared to a constant slope. The LT1025
outputs have a deliberate parabolic "bow" to help compensate for this effect. The outputs can be mathematically
described as the sum of a linear term equal to room temperature slope plus a quadratic term proportional to
temperature deviation from 25°C squared. The coefficient
@) of the quadratic term is a compromise value chosen to
offer improvement in all the outputs.
VOUT=aT +a~(T -25°)2
~=5.5X10-4
The actual ~ term which \Vould be required to best compensate each thermocouple type in the temperature range
of O°C to 50°C is: E, 6.6x 10- 4; J, 4.8 x 10- 4; K, 4.3 x 10- 4;
R, 1.9 x 10- 3; S, 1.9 x 10- 3; T, 1X 10- 3•
The temperature error specification for the LT1025
10mV/oC outpu,t (shown as a graph) assumes a /1 of
5.5x 10- 4• For example, an LTt025 is considered
"perfect" if its 10mV/oC output fits the equation
Va= 10mV(T) +(10mV)(5.5x 10- 4)fT -25°C)2.
Operating at Negative Temperatures
The L11025 is designed to operate with a Single positive
supply. It therefore cannot deliver proper outputs for temperatures below zero unless an external pull-down resistor
is added to the Vo output. This resistor can be connected
to any convenient negative supply.ltshould be selected to
sink at least 30JLA of current. Suggested value for a - 5V
11-10
supply is 150kO, and for a -15V supply, 470kO. Smaller resistors must be used if an external load is connected to
the 10mVIoC output. The LT1025 can source up to 1mA of
current, but there is a trade-off with internal temperature
rise.
Internal Temperature Rise
The LT1025 is specified for temperature accuracy assuming no internal temperature rise. At low supply voltages
this rise is usually negligible ('" 0.05°C@5V), but at higher
supply voltages or with external loads or pull-down current, internal rise could become significant. This effect
can be calculated from a simple thermal formula,
~T (8JAl IV +) (10 +IU, where 8JA is thermal resistance
from junction to ambient, ('" 1300 CIW), V+ is the LT1025
supply voltage, 10 is the LT1025 supply current ('" 8OJLA),
and IL is the total load current including actual load to
ground and any pull-down current needed to generate
negative outputs. A sample calculation with a 15V supply
and 50/LA pull-down current would yield, (130 0 CIW) (15V)
(80 +50JLA) 0.32°C. This is a significant rise in some applications.lt can be reduced by lowering supply voltage (a
simple fix is to insert a 10V zener in the VIN lead) or the
system can be calibrated and specified after an initial
warm-up period of several minutes.
=
=
Driving External Capacitance
The direct ther,flocouple drive pins on the LT1025 (J, K,
etc.) can be loaded with as much capacitance as desired,
but the 10mV/oC output should not be loaded with more
than 50pF unless external pull-down current is added, or a
compensation network is used.
Thermocouple Eftects in Leads
Thermocouple volta~es are generated whenever dissimilar
materials are joined. This includes the leads of IC packages, which may be kovar in TO-5 cans, alloy 42 or copper
in dual-in-line packages, and avariety of other materials in
plating finishes and solders. The net effect of these thermocouples is "zero" if all are at exactly the same temperature, but temperature gradients exist within IC packages
and across PC boards whenever power is dissipated. For
this reason, extreme care must be used to ensure that no
temperature gradients exist in the vicinity of the thermocouple terminations, the LT1025, or the thermocouple amplifier. If a gradient cannot be eliminated, leads should be
LT1025
positioned isothermally, especially the LT1025 R- and
appropriate output pins, the amplifier input pins, and the
gain setting resistor leads. An effect to watch for is amplifier offset voltage warm-up drift caused by mismatched
thermocouple materials in the wire-bond/lead system of
the IC package. This effect can be as high as tens of microvolts in TO-5 cans with kovar leads. It has nothing to do
with the actual offset drift specification of the amplifier
and can occur in amplifiers with measured "zero" drift.
Warm-up drift is directly proportional to amplifier power
dissipation. It can be minimized by avoiding TO-5 cans,
using low supply current amplifiers, and by using the lowest possible supply voltages. Finally, it can be accommodated by calibrating and specifying the system after a five
minute warm-up period.
Reversing the Polarity of the 10mV/oC Output
The LT1025 can be made to "stand on its head" to achieve
a minus 10mV/oC output point. This is done as shown in
Figure 3. The normal output (Vo) is grounded and feedback
is established between the ground pin and the positive
supply pin by feeding both of them with currents while
coupling them with a6V zener. The ground pin will now be
forced by feedback to generate -10mV/oC as long as the
grounded output is supplying a net "source" current into
ground. This condition is satisfied by selecting R1 such
that the current through R1 (1-) is more than the sum of
the LT1025 supply current, the maximum load current (IU,
and the minimum zener current (=< 50f.lA). R2 is then
selected to supply more current than 1- .
V+ (15V)
1+
l
R2
15k
V,N
Vo
lT102&
D1
Vz~6V
GNO
VOUT
-10mV/'C
I-l
RL
R1 ILl
47k
V- (-15V)
Figure 3
':'
R1=
VR2= V+-Vz(",,6V)
300f.lA +IL
V-/R1 +280f.lA
For ± 15V supplies, with IL = 20f.lA maximum, R1 = 47k and
R2=15k.
Amplifier Considerations
Thermocouple amplifiers need very low offset voltage and
drift, and fairly low bias current if an input filter is used. The
best precision bipolar amplifiers should be used for type J,
K, E, and Tthermocouples which have Seebeck coefficients
of 40-60f.lV/oC. In particularly critical applications or for R
and Sthermocouples (6-15f.1V/°C), achopper-stabilized amplifier is required. Linear Technology offers three amplifiers
specifically tailored for thermocouple applications. The
LTKAOx is a bipolar design with extremely low offset
«35f.1V), low drift «1.5f.1V/°C), very low bias current «1nA),
and almost negligible warm-up drift (supply current is
",,400f.lA). It is very cost effective even when compared with
"jellybean" op amps with vastly inferior specifications.
For the most demanding applications, the LTC1050 and
LTC1052 CMOS chopper-stabilized amplifiers offer 5f.1Voffset and 0.05f.1V/oC drift (even over the full military temperature range). Input bias current is 3OpA, and gain is typically
30 million. These amplifiers should be used for Rand S
thermocouples, especially if no offset adjustments can be
tolerated, or a large ambient temperature swing is
expected.
Regardless of amplifier type, it is suggested that for best
possible performance, dual-in-line (DIP) packages be used
to avoid thermocouple effects in the kovar leads of TO-5
metal can packages if amplifier supply current exceeds
500f.lA. These leads can generate both DC and AC offset
terms in the presence of thermal gradients in the package
and/or external air motion.
In many Situations, thermocouples are used in high noise
environments, and some sort of input filter is required.
(See discussion of input filters). To reject 60Hz pick-up
with reasonable capacitor values, input resistors in the
10k-100k range are needed. Under these conditions, bias
current for the amplifier needs to be less than 1nA to avoid
offset and drift effects.
To avoid gain error, high open loop gain is necessary for
single-stage thermocouple amplifiers with 10mV/oC or
higher outputs. A type K amplifier, for instance, with
11-11
III
LT1025
100mVfOC output, needs aclosed loop gain of "'2,500. An
ordinary op amp with a minimum open loop of 50,000
would have an initial gain error of (2,500)/(50,000) 5%!
Although closed loop gain is commonly trimmed, temperature drift of open loop gain will have a very deleterious effect on output accuracy. Minimum suggested open loop
gain for type E, J, K, and Tthermocouples is 250,000. This
gain is adequate for type Rand S if output scaling is
10mV/oC or less.
=
E
I-
~
~
2.5 f-\-t--+---P'-d--+-~~rI-I 1
5
2
7.5
3
~ 10
THERMOCOUPLE
E,J, K, T
:!:15V
LTKAOx
LT1012
LT1001
R,S
LTKAOx
LT1012
Thermocouples are linear over relatively limited temperature spans if accuracies of better than 2°C are needed.
The graph in Figure 4shows thermocouple nonlinearity for
the temperature range of O°C-400oC. Nonlinearities can
be dealt within hardware by using offsets, breakpoints, or
power series generators. Software solutions include lookup tables, power series expansions, and piece-wise approximations. For tables and power series coefficients,
the reader is referred to the ASTM Publication 470A.
Hardware correction for nonlinearity can be as simple as
an offset term. This is shown in Figure 5. The thermocouple shown in the figure has an increasing,slope (a) with
temperature. The temperature range of interest is between
TLand TH, with acalibration point at TM. If a simple amplifier is used and calibrated at TM, the output will be very
high at TL and very low at TH. Adding the proper offset
term and calibrating at T1/6 or T5/6 can significantly reduce errors. The technique is as follows:
1. Calculate amplifier gain:
G (SF)(TH - TL)/(VH- Vu
SF Output scale factor, e.g., 10mV/oC
VH Thermocoupl~ output @ TH
VL Thermocouple output @ TL
11-12
~
~
0
15
:A
'"~ 17.5 f--t--'t-+--+---l--.f+--l-----I
20
f--+--I--'I.-
o
Thermocouple Nonlinearities
=
=
=
=
5
~
Suggested Amplifier Types
SUPPLY VOLTAGE
:!:5V
SINGLE SUPPLY
LTKAOx
LTC1050
LT1012
LTC1052
LT1001
LT1006
LTC1050
LTC1052
LT1006
LTC1050 LTC1050
LTC1052 LTC1052
LTKAOx
LT1006
~
C'l
:D
~
~12.5
~
!lJ
50
100
150 200 250 300 350
TEMPERATURE (OC)
400
Figure 4. Thermocouple
Nonlinearity, O·C-400·C
VH
~
to;
~
VL
TL T1/6
TM
T5/6 TH
TEMPERATURE (OC)
Figure 5. Offset Curve Fitting
2. Use precision resistors to set gain or calibrate gain by
introducing a precision "delta" input voltage and
trimming for proper "delta" output.
3. Calibrate output by adding in a true offset term which
does not affect gain (by summing, etc.). Calibration
may be done at any temperature either by immersing
the thermocouple in a calibrated bath or by substituting a precision input voltage. The method which tends
to minimize worst-case error over the whole TL to TH
range is to calibrate at 1/6 or 5/6 of span. This may be
modified if best accuracy is desired at one particular
point.
Breakpoint correction for nonlinearity is more complicated than a simple offset, but a single breakpoint combined with offset will reduce errors typically by 4:1 over a
simple offset technique.
LT1025
APPLICATion CIRCUITS
Type KThermometer with Grounded Thermocouple
Eliminating Amplifier Feedback Resistors
(Output Goes Negative with Increasing Temperature)
15V
R3
255k
1%
R2
lOon
R6
91k
LTl025
.------~K
C1
Vo
GNll
VIN
R-
VOUT
10mV/oC
Vo
o l~F
R1
1k
1%
LT1025
R4"
470k
V+
300k
O.l~F
V+
-15V
v-15V
15V
"R4,;
tt OR EQUIVALENT. SEE "AMPLIFIER CONSIDERATIONS"
Differential Thermocouple Amplifier
Utilizing Negative L11025 Drive to
Accommodate Grounded Thermocouple *
C1"
15V
R3
1M
0.1%
R1
10k
R7
15k
V+
R6
75k
1%
VOUT
10mV/oC
R7
500
FULL-SCALE
TRIM
R5
VIN
3k
10mV/oC
R1
1k
1%
L-_-+'~..,.,.
__________
~
~~OO
R3
141k
RS
5k
1%
1%
VOUT
>-....--4t--10rnV/oC
Vor-+---~~~------~
DOC-500°C
R9
_ (V-) (10k)
lOOk - VOUT (MAX)
LTl025
GND
3~;;' IF OUTPUT MUST SINK CURRENT, R·.
MUST BE DECREASED APPROPRIATELY. R4 IS NDT
REQUIRED (OPEN) FOR LT1025 TEMPERATURES ;"O°C
WHEN SOURCING CURRENT ONLY.
ttOR EQUIVALENT. SEE "AMPLIFIER CONSIDERATIONS"
V-15V
TYPE E
"SEE "REVERSING THE POLARITY OF THE 10mV/oC OUTPUT"
"C1 AND C2 FILTER RIPPLE AND NOISE, BUT WILL LIMIT AC COMMON·MODE REJECTION IF NOT
MATCHED. SUGGESTED VALUES ARE O.OOl~F TO 0.1~F.
""USE LOWEST POSSIBLE SUPPLY VOLTAGE TO MINIMIZE INTERNAL TEMPERATURE RISE.
t FOR BEST ACCURACY, THERMOCOUPLE RESISTANCE SHOULD BE LESS'THAN 1000.
ttDR EQUIVALENT. SEE "AMPLIFIER CONSIDERATIONS"
ttOR EQUIVALENT. SEE "AMPLIFIER CONSIOERATIONS"
11-13
111
LT1025
Type SThermocouple Amplifier with Ultra· Low Offset and Driftt
R2"
loon
FULL-SCALE
TRIM
R3
909k
1%
R4
2.7k
Rl
lk
Grounded Thermocouple Amplifier with Positive Output
Rl
10k
R3
1M
1
........,1..,%11-...._ _"1"'0/,"",...._.......
O.l~F
1%
R4
10k
~R5 ~~~tE
2k ADJUST
15V
V+
":'
":'
R6"
8.4k
Your
>'--....-10mV/'C
800'C-1200'C
V+
R4
1.37M
V+
1%
R5'
10k
OFFSET
1-17""5,,,Okrl~M""''''''-.t.... TRIM
R7
6.8k
R7
C2
o.OlT
-15V
'TRIM R5 FOR Vour= 1.669V@VIN=0.OOOmV (+ INPUT OF AMPLIFIER GROUNDED)
"TRIM R2 FOR Vour=9.998V@T=1000'C, OR FOR VIN@+INPUTOFAMPLIFIER=9.585mV
tTHIS AMPLIFIER HAS A DELIBERATE OFFSET TO ALLOW OUTPUT SLOPE (10mV/'C) TO BE SET
INDEPENDENTLY FROM AN ARBITRARY HIGH TEMPERATURE CENTER POINT (1000'C). THIS IS
REQUIRED BECAUSE THE SLOPE OF TYPE "S" THERMOCOUPLES VARIES RAPIDLY WITH
TEMPERATURE, INCREASING FROM 6~VI'C@25'C TO 11~V/'C@1000'C. NONLINEARITY LIMITS
ACCURACY TO ~3'C OVER THE 800'C TO 1200'C RANGE EVEN WITH OFFSET CORRECTION.
'FOR BEST ACCURACY, THERMOCOUPLE RESISTANCE
SHOULD BE LESS THAN 50n
"SELECTED FOR O'C TO 200'C RANGE
ttOR EQUIVALENT. SEE "AMPLIFIER CONSIDERATIONS"
PACKAGE DESCRIPTiOn Dimensions in inches (millimeters) unless otherwise noted.
NPackage
8 Lead Molded DIP
JPackage
8Lead Hermetic DIP
0 _:r
(:~;)-I--
t :lr
L...Q...!!lli...~
(10.287)
MIN
MAX
0025
(0635)
8
7
6
5
RADTYP
(10.160)
04OO
MAX
765
r
0.250:0.010
0220-0310
(5588-7874)
~
r-,-,..,.,.."..,.-r::-T"'T-;-('
J
0.014-0.026
(O 360-0 660)
I
965-1.727)~ ~
0038-0068
(O
11-14
0.200
{~
I-
0'-15'
1
j
0.009-0015
(0229-0381)
I
0.125
3175
MIN
D 100::1::0.010
....-(2540:l:0.254}
tJ
0.045::1::0015
(1143:1:0381)
0100:1:0.010
(2.540±0254)
2
3
4
254
)
~7YD~~~~-D-u-a-l-pr-e-c-iS-io-n-ln-s-tr-u-m-~-~C_ta-1~-i~-~
Switched-Capacitor Building Block
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
The LTC 1043 is a monolithic, charge-balanced, dual
switched-capacitor instrumentation building block. A
pair of switches alternately connects an external capacitor to an input voltage and then connects the charged capacitor across an output port. The internal switches have
a break-before-make action. An internal clock is provided
and its frequency can be adjusted with an external capacitor. The LTC1 043 can also be driven with an external
CMOS clock.
Instrumentation Front End with 120dB CMRR
Precise, Charge-Balanced Switching
Operates from 3V to 18V
Internal or External Clock
Operates up to 5MHz Clock Rate
Low Power
Two Independent Sections with One Clock
APPLICATions
• Precision Instrumentation Amplifiers
• Ultra Precision Voltage Inverters, Multipliers and
Dividers
• V-F and F-V Converters
• Sample and Hold
• SWitched-Capacitor Filters
The LTC 1043, when used with low clock frequencies,
provides ultra precision DC functions without requiring
precise external components. Such functions are differential voltage to single-ended conversion, voltage inversion, voltage multiplication and division by 2, 3, 4, 5,
etc. The LTC 1043 can also be used for precise V-F and
F-V circuits without trimming, and it is also a building
block for switched-capacitor filters, oscillators and
modulators.
The LTC1 043 is manufactured using Linear Technology's
enhanced LTCMOS™ silicon gate process.
CMRR vs Frequency
Instrumentation Amplifier
100 I--t-++Htttt--++++-ttttt--t-+++Httl
!g
i
801--t-++Htttt--++++-ttttt--t-+++Httl
""
<.)
40 I---I-H-H+ffI--+++++I+II--+-+-l+f++H
1k
10k
100k
FREQUENCY OF COMMON-MODE SIGNAL
CMRR> 120dB AT DC
CMRR> 120dB AT 60Hz
DUAL SUPPLY OR SINGLE 5V
GAIN=1 +R2IR1
Vos=150~V
.:IVos =2,V/'C
.:IT
LTCMOSTM Is a trademarl< of Linear Technology Corporation
COMMON-MOOE INPUT VOLTAGE INCLUOES THE SUPPLIES
11-15
LTC1043
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATiOn
ORDER PART
NUMBER
SupplyVoltage{V+ toV-) .................. 18V
Input Voltage
at Any Pin ......... V- -0.3V::s;VIN ::s;V+ +0.3V
Operating Temperature Range
LTC1043C ............... -40°C ::s;TA ::s;85°C
LTC1043M .............. -55°C::s;TA ::s;125°C
Storage Temperature Range ....... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ........ 300°C
LTC1043CN
LTC1043MD
ELECTRICAL CHARACTERISTICS v+ =10V, v- =ov, TA=25°C unless otherwise specified.
SYMBOL PARAMETER
Is
Power Supply Current
CONDITIONS
MIN
Pin (16) Connected High or Low
II
OFF Leakage Current
Any Switch, Test Circuit 1 (Note 1)
RON
ON Resistance
Test Circuit 2, VIN=7V, 1= ±0.5mA
V+=10V, V-=OV
RON
ON Resistance
Test Circuit 2, VIN =3.1V, 1= ±0.5mA
V+ =5V, V- =OV
lose
Internal Oscillator Frequency
Case (Pin 16 to V )=OpF
Case (Pin 16 to V-)=100pF
Test Circuit 3
Pin 16atV+ orV
fM
Break-Belore-Make Time
Clock to Switching Delay
Cos c Pin Externally Driven
Maximum External ClK Frequency Case Pin Externally Driven with CMOS
Levels
Common-Mode Rejection Ratio
V+=5V, V-= -5V, -5V-
400
250
f--+-+-+'fhl4~~A--il-t--I
200
0.2 f--+--h~~>""f--+-t--il-t--I
~~
:::::: ....
~
~
'.'00,A __
~A=25'C
I = 1DOpA
I":::
'"
~
I.......
8 200
~
V/,=mA
150
v"
240
220
1.
or:
V+ =10~ ~
---V-=OV
RON (PEAK)
260
1~100~ I I~
8 350
~300
~ 0.6 Cosc=0.0047PF:T.i'J/k.~Y.-h">f<-:.-+---+---1
'" 0.4
V"n,·,00,A=
450
-
n
r-~~~:-r--r--r--r-""'--'--'
280
V+=5V
-V-=OV
_ TA=25'C
RQN(PEAK}
j180f--+-+--+-~-+~~'_~1~mA~~
160 f-+-+--+-~-+~L--j-f--~
h
140
[-~~~~~~~~~T-~
120
100
100
::::::::::;;-1-"""
O'---.L..-.:I!!::'-'---'---'--'---'--''---L--J
o
2
4
6
8 10 12
VSUPPLV (V)
14
16 18 20
1
1000
RON (PEAK)
v"n,·,00,A=
240
220
200
c
j160
120
..-::: ;::::..
~
~
6
~'=lmA
c-Tr=r
o
o
4
6
8
10
12
14 16 18
lk
OV
N
I
I
150
z
::;; 125
[
OV
v-
§i
'"
ii;
Cosc=OpF
........
-
~
~
75
4k
6k
Cosc(pF)
8k
10k
1.4
0.8
~ 0.4
0
Cosc=100pF
z
I
I
I
I
I
0.2
2
"
4
o
6
10 12 14
16
18
20
8 10 12 14 16 18
VSUPPlV (V)
20
OpF
i"",,-
T;=251,C
~
70
r--
10
125
4
6
8
10
12
14
16
AMBIENT TEMPERATURE (OC)
18
o
2
4
6
8
10 12 14 16 18
VSUPPLY (V)
BLOCK DIAGRAm
v+
v-It
THE SWITCHES ARE TIMED AS SHOWN WITH PIN 16 HIGH
11-18
THE CHARGE BALANCING CIRCUITRY SAMPLES THE VOLTAGE
AT S3 WITH RESPECT TO 54 (PIN 16 HIGH) AND INJECTS A
SMALL CHARGE AT THE C+ PIN (PIN 16 LOWI.
THIS BOOSTS TKE CMRR WHEN THE LTC1043 IS USED AS AN
INSTRUMENTATION AMPLIFIER FRONT END.
FOR MINIMUM CHARGE INJECTION IN OTHER TYPES OF
APPLICATIONS, SSA AND S3B SHOULD BE GROUNDED.
20
LTC1043
TEST CIRCUITS
NOTE: TO OPEN SWITCHES
S1 AND S3
SHOULD BE CONNECTED
10 V-. TO OPEN S2, S4,
Cose PIN SHOULD BE
TO V+. Cose
Test Circuit 1. Leakage Current Test
Test Circuit 2. RON Test
"C)ooIo>-.....yf.t-~VOUT
Test Circuit 3. Oscillator Frequency, fose
':"
CMRR=20 LOG
~VeM)
VOUT
NOTE: FOR OPTI UM CMRR, THE Cose SHOULD
BE LARGER THAN 0.0047~F, AND
THE SAMPLING CAPACITOR ACROSS
PINS 11 AND 12 SHOULD BE PLACED
OVER A SHIELD TIED TO PIN 10.
Test Circuit 4. CMRR Test
APPLICATions InFoRmATion
Common-Mode Rejection Ratio (CMRR)
The LTC 1043, when used as a differential to single-ended
converter (Figure 1) rejects common-mode signals and
preserves differential voltages. Unlike other techniques,
the LTC1043's CMRR does not degrade with increasing
common-mode voltage frequency. During the sampling
mode, the impedance of pins 2, 3 (and 11, 12) should be
reasonably balanced, otherwise, common-mode signals
will appear differentially. The value of the CMRR depends
on the value of the sampling and holding capacitors (Cs,
CH) and on the sampling frequency. Since the commonmode voltages are not sampled, the common-mode signal
frequency can well exceed the sampling frequency without
experiencing aliasing phenomena. The CMRR of Figure 1
III
Cs, CH ARE MYLAR OR POLYSTYRENE
Figure 1. Differential to Single-Ended Converter
11-19
LTC1043
APPLICATions InFoRmATion
is measured by shorting pins 7 and 13 and by observing,
with a precision DVM i the change of the voltage across CH
with respect to an input CM voltage variation. During the
sampling and holding mode, charges are being transferred
and minute voltage transients will appear across the
holding capacitor. Although the RON on the switches is low
enough to allow fast settling, as the sampling frequency increases, the rate of charge transfer increases and the
average voltage measured with a DVM across it will increase proportionally; this causes the CMRR of the sampled data system, as seen by a "continuous" instrument
(DVM), to decrease, Figure 2.
.
Switch Charge Injaction
Figure 3 shows one out of the eight switches of the
LTC1043, configured as a basic sample and hold circuit.
When the switch opens, a "hold step" is observed and its
magnitude depends on the value of the input voltage.
Figure 4 shows charge injected into the hold capacitor. For
instance, a 2pCb of charge injected into a0.01 J.tf capacitor
causes a 200p.V hold step. As shown in Figure 4, there is a
predictable and repeatable -charge injection cancellation
when the input voltage is close to half the supply voltage of
the LTC 1043. This is a unique feature of this product, containing charge-balanced switches fabricated with a selfaligning gate CMOS process. Any switch of the LTC1043,
when powered with symmetrical dual supplies, will
sample and hold small signals around ground without any
significant error.
Shielding the Sampling Capacitor for Very High CMRR
Internal or external parasitiC capaCitors from the C+ pin(s)
to ground affect the CMRR of the LTC1043, (Figure 1).
The common-mode error due to the internal junction capaCitances of the C+ pin(s) 2 and 11 is cancelled through
internal circuitry. The C+ pin, therefore, should be used
as the top plate of the sampling capacitor. The interpin
capaCitance between pin 2 and dummy pin 1 (11 and 10)
appears in parallel with the sampling capaCitor so it does
not degrade the CMRR. A shield placed underneath the
sampling capaCitor (Figure 5) and connected to either pin 1
or 3 helps to boost the CMRR in excess of 120dB.
Excessive external parasitiC capacitance between the Cpins and ground indirectly degrades CMRR; this
becomes visible especially when the LTC1043 is used
with clock frequencies above 2kHz. Because of this, if a
shield is used, the parasitic capaCitance between the
shield and circuit ground should be minimized.
It is recommended that the outer plate of the sampling
capacitor be connected to the C- pin(s).
Input Pins, SCR Sensitivity
An internal 600 resistor is connected in series with the inputoftheswitches(pins5,6, 7,8, 13, 14, 15, 18)andit
is included in the RON specification. When the input
voltage exceeds the power supply by a diode drop, current will flow into the input pin(s). The LTC 1043 will not
SAMPLE
v+~
HOLO TO PIN 16
ov-
-
lose (Hz)
Figure 2. CMRR vs Sampling
Frequency
11-20
Figure 3
LTC1043
APPLICATions InFoRmATion
latch until the input current reaches 2mA-3mA. The
device will recover from the latch mode when the input
drops 3V-4V below the voltage value which caused the
latch. For instance, if an external resistor of 200n is connected in series with an input pin, the input can be taken
1.3V above the supply without latching the IC. The same
applies for the C+ and C- pins.
Cose Pin (16). Figure 6
The Case pin can be used with an external capacitor,
Case, connected from pin 16 to pin 17, to modify the internal oscillator frequency. If pin 16 is floating, the internal 24pF capacitor plus any external interpin capacitance
set the oscillator frequency around 190kHz with ± 5V
supply. The typical performance characteristics curves
provide the necessary information to set the oscillator fre-
quency for various power supply ranges. Pin 16 can also
be driven with an external clock to override the internal
oscillator. Although standard 7400 series CMOS gates do
not guarantee CMOS levels with the current source and
sink requirements of pin 16, they will in reality drive the
Case pin. CMOS gates conforming to standard B series
output drive have the appropriate voltage levels and more
than enough output current to simultaneously drive several LTC1043 Case pins. The typical trip levels of the
Schmitt trigger, Figure 6, are given below.
SUPPLY
V+ =5V, V- =OV
V+ =10V, V- =OV
V+ =15V, V- =OV
TRIP LEVELS
VH =3.4V
VH =6.5V
VH =9.5V
VL=1.35V
VL=2.BV
VL =4.1V
12 r-r-,-,..-,--,--,--,--,
10
r------------- , 1,I ,
D
<.>
.e
z
8 ~+---l*-+-+--+---A---+----l
I
Q
I
~ 6~~+-~~~~~~
'"'"~
'"
Q
OUTSIDE FOIL
I
I
~
(Cs
I
I
4~~rr-~~~-+-4~
2
I
I
I
I
I
I
I
:3f
~-------------PRINTED CIRCUIT
BOARD AREA
\.TCIlM3
O~~~W--L-L-L~~
o
2
4
6
8
10
12
14
16
VIN (V)
Figure 4. Individual Switch
Charge Injection vs Input
Voltage
Figure 5. Printed Circuit Board Layout Showing Shielding
the Sampling CapaCitor
V+
rco:::;:.sefl$lo......""""'~~......
+-........+
IlII
TO CLK GENERATOR
I
I
I
I
Cose
(EXTERNAL)
,I
,I
1
_..J
v(24pF)
fose=190kHzx (24pF+Cose)
Figure 6. Internal Oscillator
11-21
LTC1043
APPLICATions
Divide by 2
Multiply by 2
Ultra Precision Voltage Inverter
VOUT=VIN/2± 1ppm
OSVINSV+
3sV+s18V
VOUT=2VIN±5ppm
OSVIN 10s
GAIN=R2IR1+1
ISlAS =1nA
11-24
R1
100!)
LTC1043
APPLICATions
Lock-In Amplifier ( =Extremely Narrow-Band Amplifier)
THERMISTOR BRIDGE
IS THE SIGNAL SOURCE
SYNCHRONOUS
DEMODULATOR
10k'
VOUT= 1000 x DC
BRIDGE SIGNAL
T1 = TF5SX17U, TOROTEL
RT = VSI THERMISTOR 44006
=6.19k AT 37.S"C
'MATCH 0.05%
6.19k=VISHAV S-102
OPERATE LTC1043 WITH
",SV SUPPLIES
+5V
LOCK-IN AMPLIFIER TECHNIQUE
USED TO EXTRACT VERY SMALL SIGNALS
BURIED INTO NOISE.
lk
ZERO CROSSING DETECTOR
50MHz Thermal rms-DC Converter
+5V
3Ok'
3Ok'
+SV
CALIBRATION ADJUST
10k
10k
III
30111'
10k
'1% RESISTOR
2% ACCURACY-DC-SOMHz
100:1 CREST FACTOR CAPABILITY
T1-T2=YELLOW SPRINGS INSt. ca. THERMISTOR COMPOSITE
ENCLOSE T1 AND T2 IN STYROFOAM
11-25
LTC1043
APPLICATions
Quad Single 5V Supply, Low Hold Step, Sample and Hold
OUTPUT
NC
OUTPUT
NC
OUTPUT
NC
OUTPUT
HOLD
SA~
FOR WSVIN,,4V, THE HOLD STEP IS :s300.V.
ACQUISITION TIME -8 x RON CH FOR 10-BIT ACCURACY.
Single Supply Precision Linearized Platinum RTD Signal Conditioner
2501<'
+5V
10k'
2.4k
LT1009
2.5V
Rp=ROSEMOUNT 118MFRTD
'1% FILM RESISTOR
TRIM SEQUENCE:
SET SENSOR TO O·C VALUE. ADJUST ZERO
FOR OV OUT. SET SENSOR TO 1000C VALUE.
ADJUST GAIN FOR 1,OOOV OUT. SET SENSOR
TO 400·C VALUE. ADJUST LINEARITY FOR 4.000V OUT.
REPEAT AS REQUIRED.
11-26
LTC 1043
APPLICATions
O.005%F- V Converter
1k
VIN=-5V
LT1004
1.2C
OV-3V OUTPUT
I
I
CS
-FREQUENCY IN
fiN D-30kHz
-$
Vour=(R2 Cs VIN) fiN
m1
T
'f1OOpf
16
+5V
,..
rm....-5V
.J
'75k=TRW# MTR-5/ + 120ppm
L _____ _
High Frequency Clock Tunable Ban dpass FiHer
R1
10k
--,
............-~.~~
'.
1
I
CLOCK
INPUT
__
~_-+
~
I.
I
1000pF
'~l
BANDPASS
OUTPUT
+5V
-dr-,
r-VtItl
.'; . . .
...'~.
.'..'.'.
3
':'
L
--
__ .J
.......--410..--.6
I
I
l
BANDPASS CENTER FREQUENCY f 0 =
55 GAIN AT fo IS, Ra/RIN
BANDPA~
Ra 2
Q=A2 R1
,,;100kHz
fo MAX 100kHz fo IS <10
QMAX AT
<1MHz
(foxQ) M~MHZ. Q<2
fClK MAX
fClK
m
!Ri
x VIII
II
.
III
,,1
.
..... I
~I
;
~'"
':'
L
_4!p-_...J
-5V
11-27
LTC1043
APPLICATions
Frequency·Controlied Gain Amplifier
VIN _ _ _ _ _ _ _ _...I
O.Q1~F
+5V
FOR OIFFERENTIAL INPUT, GROUND PIN SA AND USE PINS 13A AND 7A FOR INPUTS.
fiN xO.01pf
GAIN 1kHz x 100pF ; GAIN IS NEGATIVE AS SHOWN.
>,,---4~ VOUT
·FOR SINGLE-ENDED INPUT AND POSITIVE GAIN, GROUND PIN 8A AND USE PIN 7A FOR INPUT.
USE ",SV SUPPLIES FOR LTC1043.
Relative Humidity Sensor Signal Conditioner
-5V
470
1k'
5DO
90% ~_--m'f!i'iIo!'!(t,
10k
RHTRIM
OUTPtlTOV-1V=
0%-100%
L..~
....._
1~F
..
.".
1~F
SENSOR D 2 2 M
1---!
.".
, = 1% FILM RESISTOR
11-28
10k
5% RH TRIM
100pF
33k
SENSOR = PANAMETRICS # RHS
~500pF AT RH=76%
1.7 pF/%RH
1k'
LTC1043
APPLICATions
Linear Variable Differential Transformer (LVDT), Signal Conditioner
0.005
0.005
RD-BlUE
lOOk
•BLUE
GRN
•
AMPliTUDE STABLE
SINE WAVE SOURCE
OUTPUT
OV- :2.SV
OM-2.50M
200k
BlK
lVDT
-SV
lVDT =SCHAEVITZ E-l00
+5V
lk
">:...-....-+ TO PIN 16, lTC1043
-5V
Precision Current Sensing in Supply Rails
SHUNT CAN BE liN
IN POSITIVE OR --~P-"\Nw""+
NEGATIVE SUPPLY
lEAD
III
11-29
LTC1043
PACKAGE DESCRIPTiOn
Dimensions in inches (millimeters) unless otherwise noted.
oPackage
18 Lead Side Brazed
0.910
1-------(23.114)------.!
MAX
t
0.298
(7.569)
MAX
t
0.165
(4.191)
MAX
Pl
L
0.300
(7.620)
REF
0.485
~(12.319)-!
I
I
MAX
0.125
(3.175)
MIN
j-
0.008-0.015
(0.203-0.381)
0.050±0.010
(1.270 ± 0.254)
0.054
(1.372)
TYP
018188
Tjmax
eja
LTC1043MD
15O"C
100·C/W
LTC1043CD
150·C
100·C/W
N Package
18 Lead Plastic DIP
0.900
~t-------(22.860)-------l~
r
18
MAX
r
0.250±0.010
(6.350±0.254)
r
0.300-0.320
"1
1,(7.620 8.128)11
A
L t
0.009-0.015
(0.229-0.381)
0.325 ~~:~~~
18255 +0.635)
~
11-30
.
-0.381
~~~~~~~~
I
0.065
(1.651)
TYP
~'--*
0.130±0.005
_
~------~H---~
I.- 0.100±0.0~0
(2.540 ± 0.254)
L
0.018±0.003
(0.457 .. 0.076)
N18188
~7Ytl~~-D-u-a-l-pr-e-c-iS-io-n-ln-s-tr-~-~-e-1~-t:_~-i~-~
Switched-Capacitor Building Block
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
The LTC1043 is a monolithic, charge-balanced, dual
switched-capacitor instrumentation building block. A
pair of switches alternately connects an external capacitor to an input voltage and then connects the charged capacitor across an output port. The internal switches have
a break-before-make action. An internal clock is provided
and its frequency can be adjusted with an external capacitor. The LTC 1043 can also be driven with an external
CMOS clock.
Instrumentation Front End with 120dB CMRR
Precise, Charge-Balanced Switching
Operates from 3V to 18V
Internal or External Clock
Operates up to 5MHz Clock Rate
Low Power
Two Independent Sections with One Clock
APPLICATions
• Precision Instrumentation Amplifiers
• Ultra Precision Voltage Inverters, Multipliers and
Dividers
• V-F and F-V Converters
• Sample and Hold
• Switched-Capacitor Filters
The LTC 1043, when used with low clock frequencies,
provides ultra precision DC functions without requiring
precise external components. Such functions are differential voltage to single-ended conversion, voltage inversion, voltage multiplication and division by 2, 3, 4, 5,
etc. The LTC1 043 can also be used for precise V-F and
F-V circuits without trimming, and it is also a building
block for switched-capacitor filters, oscillators and
modulators.
The LTC 1043 is manufactured using Linear Technology's
enhanced LTCMOS™ silicon gate process.
Instrumentation Amplifier
CMRR vs Frequency
+5V
r----rh---'
I
+5V
vaUT
100 f--l--++++++tf--l-f+H++fj--f-f+H++fj
20~~llW~~UW~~UW
100
lk
10k
lOOk
FREQUENCY OF COMMON·MOOE SIGNAL
CMRR> 120dB AT DC
CMRR> 120dB AT 60Hz
DUAL SUPPLY OR SINGLE 5V
GAIN=l +R2IRl
Vas = 150,V
™IS a trademark ollmear Technology Corporation
LTCMOS
avos ~2"VI"C
aT
COMMON·MODE INPUT VOLTAGE INCLUDES THE SUPPLIES
11-31
LTC1043CS
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage .................................... 18V
Input Voltage
at Any Pin ................... -0.3VSVINSV+ +0.3V
Operating Temperature Range ......... - 40oCsTAS85°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
ORDER PART
NUMBER
TOP VIEW
LTC1043CS
PART MARKING·
LTC1043CS
S18 PACKAGE
PlASTIC SOL
ELECTRICAL CHARACTERISTICS Y+ =10V, Y- =OY, TA=25°C unless otherwise specified.
SYMBOL
Is
PARAMETER
Power Supply Current
CONDITIONS
Pin 16 Connected High or low
Cosc(Pln 16 to v-) = 100pF
II
OFF leakage Current
Any Switch, Test Circuit 1(Note 1)
RON
ON Resistance
RON
ON Resistance
fose
Internal Oscillator Frequency
lose
Pin Source or Sink Current
Test Circuit 2, VIN = lV, 1= ± 0.5mA
v+ =10V, V- =OV
Test Circuit 2, VIN=3.1V, 1= ±0.5mA
V+ =5V, V- =OV
Cosc(Pln 16 to v-) = OpF
Case (Pin 16 to v-) = l00pF
Test Circuit 3
Pinl6atV+ orV-
fM
CMRR
Break·Befora-Make-Time
Clock to Switching Delay
Maximum External ClK Frequency
Common·Mode Rejection Ratio
The • denotes specifications which apply over the full operating
temperature range. lTC1043 operates from - 4OoC:sTA:s85°C.
Note 1: OFF leakage current is guaranteed but not tested at 25°C.
11-32
Cosc Pin Externally Driven
Cosc Pin Externally Driven with CMOS levels
V+ =5V, V- = -5V, -5V
h
25
o
11
nI
.J .J
30
100
1
10
FREQUENCY (MHz)
Distribution of Thermal
Resistance
Distribution of Diode Offset
Voltage
.,.../
-3
-25
10
100
FREQUENCY (MHz)
-
2
U~
Ir
j"
I
a,. rt.
5
Heater Resistance vs RMS
Volts-501l Heater
TA=25'C
/
l'-
-30
-10 0 10
30
50
THERMAL RESISTANCE DIFFERENCE-SIDE A YS B ('C/W)
OFFSET FOR SIDE A vs B (mV)
-j
V
o
2SO 260
270
260 290 300 310 320 330
RESISTANCE (II)
Figures 4's Settling Time
(LT1088CD)
III
.,.
,/
~
, / TA=25'C
~
HORIZ-200ms/DlV
If
o
50 51 52 53 54 55 56 57 58 59 60 61 62
RESISTANCE (II)
11-35
LT1088
APPLICATions INFoRmATion
Pin Functions
AIN 500, BIN 500, AlN 2500, BIN 2500 (Pins 2, 9, 3, 10):
Heater input pins. Input and servo amplifier are connected
to these pins. Since the LT10SS is symmetrical, either
channel A or Bmay be used as the input. For higher input
impedance, the SOD and 2500 heaters may be series con·
nected. No heater pin may be below V- or more than 40V
above V-. Maximum heater dissipation must not exceed
the absolute maximum ratings.
AlN COM, BIN COM (Pins 1, 8): Common pOint for the 500
and 2500 input heaters, usually tied to ground.
AoUT+, BOUT+ (Pins 12, 5): High side of the temperature
sensing diodes. Normally they are driven at SmA from the
positive supply. No diode pin may be below V- or more
than 40V above V- .
AoUT-, BOUT- (Pins 13, 6): Low side of the temperature
sensing diodes. These pins are normally tied to ground.
No diode pin may be below V- or more than 40V above
V-.
v- (Pins 7, 14): These pins must be the most negative potential of the circuit, usually tied to ground.
Parasitic Diodes
As with all bipolar ICs the LT10SS contains parasitic
diodes which must not be forward biased. The parasitic
diodes, marked with asterisks, appear in Figure 1. The
dashed lines indicate that all points of the heaters are
parasitically diode connected to V- .
Thermal Considerations
Because the LT1088's operation depends on thermal
symmetry, it is sensitive to external temperature
gradients. This is particularly the case for small inputs,
which cause the device to run very close to ambient temperature. The device should be mounted in an area which
is isothermal and free of drafts. Power generating components should be kept away from the LT10SS and particular
caution taken in fan cooled equipment. -Under normal
conditions no thermal baffle or enclosure is required. Under no circumstances should aheat sink be used.
Heater Protection
Most LT1088 failures will be caused by excessive heater
drive. Input power (25°C) is specified at 375mW with 30
second excursions to 435mW permitted. These figures are
derated by - 3mW/oC above 25°C. Figure 2 plots safe
operating limits for input duty cycle vs input voltage. Accidental heater overdrives can damage or destroy the
LT10SS. In situations where overdrive may occur, some
form of heater protection should be employed. Suggested
circuits appear in the applications section.
40
\
\
35
~
30
1\
"i'..
~ 25
~
~ 20
5
a:
Figure 1
11-36
"-
10
o
'DENOTES PARASTIC DIODE,
SEE APPLICATIONS INFORMATION
I"-
\
~ 15
en
:E
fMIN=20Hz
25011 INPUT
r-T-
5OII1~ ~
o
20
40
-
60
~
80
INPUT DUTY CYCLE (%)
Figure 2. Safe Operating Limits
100
LT1088
APPLICATions INFoRmATion
Filtering
The LT10BB's thermal time constant provides effective low
pass filtering. Low frequency cut·off is set by servo loop
time constants. For the 3300pF value given in the basic
RMS·DC application, the circuit begins to follow the input
below about 50Hz. Normally, this is not a problem, be·
cause the LT10BB's primary application will be at high
frequency. Lower frequency operation is obtainable by in·
creasing the 3300pF value, although settling time will in·
crease proportionally.
Crest Factor
Crest factor is defined as the ratio of peak input voltage to
RMS value. Crest factor performance is set by IC break·
down limits and the usable low input power range. Break·
down limits are a function of processing. The usable low
input power range is a basic signal·to·noise conflict. Low
input power produces small amounts of signal. This
makes accurate, stable discrimination between desired in·
puts and ambient thermal phenomena uncertain and
noisy. These constraints set crest factor at 50:1 for the 500
input and 40:1 for the 2500 input.
Layout
At frequencies above 10M Hz, input connections require
care. Parasitic inductance builds quickly in wire runs, so
the LT1088's input heater lead should be directly con·
nected to the source to be measured. It is also wise to
shield the input line from the rest of the circuit. The heater
common should be returned directly to a ground plane. An
additional precaution is to mount the 0.011'F bypass
capacitors right at the LT1088 package. These units mini·
mize the effects of RF pick·up by the temperature sensing
diodes.
Accuracy
Amplitude measurement at high frequency to significant
accuracy is difficult because of parasitic effects. At frequencies much above 5MHz, small parasitic capacitive
and inductive terms become important. The accuracy fig·
ures quoted for the applications circuits were taken
against certified standards utilizing direct and transfer
techniques. Thermal transfer standards (Fluke Model
540B with A·55 converters) certified to 50MHz were used
as references. The data above 50MHz was also taken with
these ref~rences, although the individual units used had
not been certified at these frequencies. The accuracy of
units of this type which have been certified is normally in·
side the tolerances listed, so there is good probability the
data is valid.
CIRCUIT BOARD
WITH COMPONENTS
Figure 3. Typical Evaluation Layout
11-37
LT1088
APPLICATions INFoRmATion
1.5M"' O.022~F"
3300pF
15V
"A"
LT10041.2V·'
3k"
10k
FULL-SCALE
TRIM
VOUT
-15V
'1% METAL FILM
"THESE COMPONENTS IMPROVE SETTLING TIME AND MAY BE DELETED. IF THIS IS DONE,
SHORT THE 2N2219 EMITIER TO POINT "Au.
10k'
Figure 4. Basic RM5-DC Converter
Figure 4's Typical Specifications
Accuracy:
SOOlnput
DCtoSOMHz ..............•..........•.•.... 1% FS
DC to 100MHz ............................... 2% FS
2S00lnput
DC to 20MHz ....•..............•............ 1% FS
Temperature Effect on Accuracy .............. 100ppm/oC
Dynamic Range........•. 20:1 (LT1088CD)/14:1 (LT1088CN)
11-38
Crest Factor:
SOO Input ........................................ SO:1
2S00 Input .................. ____ ................. 40:1
3dB Bandwidth ...........••.................... 300M Hz
Full-Scale Settling Time (1 %) .......... SOOms (LT1088CD)
.......... 710ms (LT1088CN)
Input Voltage Range (2S°C)
SOO Input ............. _..... _................... 4.2SV
2S00lnput ...................•................... 9.SV
LT1088
APPLICATions
Fast Settling RMS·DC Converter
O.022pF
1.5M
3300pF
15V
ZERO TRIM
(TRIM AT 10%
OF FULL-SCALE)
15V
9.09M·
50011
2.7k·
LT1004-1.2V
3k
1N914
0.01#*"
10
>-.....-VOOT
10k·
-15V
-:;r0.1#
10k·
·1% METAL FILM
11-39
LT1088
APPLICATions
Servo·Sensed Heater Protection Circuit (.. 50ms Response)
15V
15V
TORMS
llNPUT
560k
TORMS
CIRCUIT OUTPUT
~TOHEATER
1N914
.........\111\,....-15V
10k
RELAY=C. P. CLARE #HGWM51111POO
Diode Sensed Heater Protection Circuit (.. 15ms Response)
15V
15V
1k
15V
510k
l}TOHEATER
\ . . . . CONNECTIONS
TO INPUT DIODE
OF LT10SS
1N914
4.7k
....- M.....-15V
10k
SET AT LT1 088 INPUT
DIODE VOLTAGE AT
MAXIMUM ALLOWABLE
DIE TEMPERATURE
'::"
Discrete Input Buffer for the LT1088
15V
INPUT
5011
PNP=2N3906
NPN=2N3904
FET=U440
501l
(SELECT FOR
MINIMUM Vas)
-15V
11-40
LT1088
APPLICATions
LT1010 Buffert
15V
OUTPUT
-15V
LT1010 Buffer with Gain of 10t
15V
330
3300
200
220
1N414B
15pF
1:
OUTPUT
INPUT--_-~
470
9k
200
-15V
0.002
1M
1k
10k
tSee Summary of Buffer Characteristics table for buffer speed.
11-41
LT1088
APPLICATions
Wideband Discrete Buller with Gain = 10t
EOS CONTROL
330pF
0.1
~
5.1k""
15V
1M
1.2k
3k
10011
3D
INPUT-....-JtII.""""-I
. - _....._ ......4iio
70ii\(J;,....._+-_ _ _....._ _-4-+_+-_0UTPUT
9k
311
10011
1k
3k
-15V
10k"
PNP=2N3906
NPN =2N3904
*10pF TRIMMER
(SEE TEXT)
"SELECT FOR A1
OUTPUT ~ OV WITH
2k TRIM CENTERED AND
INPUT GROUNDED.
""SELECT FOR A2
OUTPUT ~ OV AND
INPUT GROUNDED.
t See Summary of Buffer Characteristics table for buffer speed.
11-42
......JyVY--15V
LT1088
APPLICATions
Summary of Buffer Characteristics
1% Error Bandwidth
5011 Load
(:tSVOUT)
(:t10Your)
32MHz
25MHz
O.75MHz
2MHz
25M Hz
15MHz
2MHz
0.75MHz
2500 Load
Type of Buffer
Discrete-A =10
LT1010 Based-A =10
Discrete-A =1
LT10l0 Based-A =1
Slew Rate
3000VlpS
100VlpS
2000Vlps
l00VlpS
RF
INPUT
10MHz
0.6-U"~MS
0.33
11-43
LT1088
PACKAGE DESCRIPTion
Dimensions in inches (millimeters) unless otherwise noted.
DPackage
14-Lead Sldebrazed Ceramic DIP
t
0.298
(7.569) PIN NO.1
MAX
IDENT--.........·
t
~
0.165
(4.191)
MAX
F9
-r
.OO8-0JOI5
(0.203-0.381)
0.300
(7.620)
REF
0.050:0.010
0.125 (1.270:0.254)
(3.175)
MIN
0.100:0.010
(2.540:0.254)
J L ~~jtL
(1.372)
~P
0.015-0.023
(0.381-0.584)
014188
NPackage
14-Lead Plastic DIP
~_ _ _ _ (19.558)
0.770 ----~.I
MAX
0.300-0.320
(7.620-8.128)
L
0.009-0.015
(0.229 0.381)
0.325 ~~:~~~
t
~.255~~:~)
11-44
0.075:0.015
(1.905:0.381)
N14188
JTlntJU>
_,
I t::O-INOI..DGV
L7~rt~"'-'-----H-ig-h-S-id-e-L-L-l~_t:_~
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
The LT1089 is a logic driven, high current, high side switch
utilizing bipolar technology. The device is capable of driving loads up to 7.SA with a low series drop of only 1.5V, and
the series drop is specified over the full range of switch
currents. The device has internal current limiting and thermal overload protection. The input logic is designed so
that the output can drive loads referenced either above or
below the device ground pin. Either positive or negative
logic can be used to drive the input. The device is available
in both TO-3 metal can and TO-220 plastic packages.
7.5A Switch Capability
Low Series Drop « 1.5V@7.5A)
Logic Input (Positive or Negative Logic)
Current Limited
Thermal Overload
5mA Quiescent Current
10/ls Risetime
BLOCK DIAGRAm
Vee
LT1089 Switch Voltage vs Output
Current
• INOICATES GUARANTEED TEST POINT
-
-5S'CSTj,,150'C
O'C"Tj"125'C
'\..
;:,.- ::::::: po
~
'""" ~ ~
I-
~
...
~
Tj=150'C
\Tj=2S'C
VOUT
Tj=-55'C
o
LOGIC GNO
o
1
2
3 4 5 6 7
SWITCH CURRENT (A)
8
9
10
TYPICAL APPLICATiOnS
Driving Ground Referred Loads
Driving Inductive Loads
Driving Negative Referred Loads
12V
12V
12V
20V
LOGIC
IN
lT1069
I--_-VOUT
lOGIC
IN
LT1ll8l1
I--__..-VOUT
lOGIC
IN
Ln069
I---+-VOUT
-5V
11-45
LT1089
ABSOLUTE mAXimum RATinGS· mAXimum OPERATinG
Switch Voltage (Vee - VOUT) ......................... 30V SPECIFICATions •
Logic Input Voltage (VIN - GND) ...................... 15V
Logic Input Voltage Range {VIN) .... (Vee- 30V)100°C.
ELECTRICAL CHARACTERISTICS
V+ =4.6V to 5.4V, VLATCH =OV, Common Mode Input Voltage =2.5V, Tj =25°C, unless otherwise noted.
PARAMETER
Input Offset Voltage (Note 1)
Input Bias Current
Reference Input Current
Voltage Gain (Note 3)
Common Mode Input Range (Note 5)
Output High Voltage
Output Low Voltage
Supply Current
Latch Pin High Input Voltage
Latch Pin Low Input Voltage
Latch Pin Current
Propagation Delay
CONDITIONS
VCM = 1.25Vto(V+ -1.5V)
aVIN =OV(Note2)
aVIN = OV (Note 2)
Vour = 0.5V to 2.5V
Load = 1TIL Gate
Minimum Input
Maximum Input
lOUT = 4mA
ISINK=4mA
V+ =5V
Device Latched
Device Active
aVIN2:20mV (Note 4)
O°C sTI s 100°C
-55°CsTjsl500C
Latch Setup Time
The • denotes the specifications which apply over the full operating tem·
perature range.
Note 1: Input offset voltage is the maximum required to drive the output to
a low state of 0.5V and a high state of 2.5V.
Note 2: Input currents are measured by applying a large positive differential input voltage. The resulting input current is divided by two to obtain input current at aVIN OV.
Note 3: Voltage gain is guaranteed by design, but not tested.
Note 4: Propagation delay is 100% tested in production with a large over·
drive. The limit is guard banded to account forthe slight increase (",500ps)
at2OmVoverdrive.
=
•
•
•
•
••
••
•
•
•
•
••
MIN
1000
V+ -1.5
2.5
MAX
TYP
1
15
30
2500
20
30
60
1.0
V+ -1.0
1.25
0.3
55
0.5
70
2
1
10
10
2
~A
~
VN
0.8
7
7
UNITS
mV
14
16
V
V
V
V
mA
V
V
mA
ns
ns
ns
Note 5: Common mode input range is the voltage range over which the differential input offset voltage is less than 2OmV.lf both inputs remain Inside
this common mode range, propagation delay will be unaffected. It will also
be normal ilthe Signal input is below the 1.25V lower limit when the input
transition begins. An increase in propagation delay of up to 10ns may occur
if the signal input is above the upper common mode limit when the transition begins. Sine wave inputs may not be affected when the peak exceeds
the common mode range if the signal is inside the common mode range for
10ns before threshold is reached.
13-7
lEI
l.r' Ln.1LSLSUlJ\!/U UlJ\.U'::,lLn.1 U
L7YD~~---p-re-C-i5-iO-n-5-V-Re-.f-~-~e-l~-:-~
May 1989
FEATURES
DESCRIPTion
•
•
•
•
•
Very Low Drift - 2ppm/oC Max Slope
Pin·Compatible with LT1021·5, REF'()2
Factory·Trimmed to 5.000V ± 1mV@25°C
Output Sinks or Sources 10mA
Excellent Transient Response Suitable for A·to·D
Reference Inputs
• Noise Reduction Pin
• Excellent Long Term Stability
• Low Noise
The LT1027 is a precision reference with extra·low drift,
low noise, excellent line and load regulation and low out·
put impedance at high frequency. This device is intended
for use in 12· to 16-bit A·to·D and D·to·A systems where de·
manding accuracy requirements must be met without the
use of power·hungry heated·substrate references. The
fast·settling output recovers quickly from load transients
such as those presented by A·to·D converter reference in·
puts~ The LT1027 represents the next major advance in
low·drift, high·accuracy voltage references.
APPLICATions
The LT1027 reference is based on LTC's proprietary
advanced subtsurface zener bipolar process which elim·
inates noise and stability problems associated with sur·
face breakdown devices.
•
•
•
•
A·to·D and D·to·A Conversion
Digital Voltmeters
Reference Standard
Precision Current Source
TYPICAL APPLICATIOn
PACKAGE/ORDER InFORmATiOn
Driving a 12·Bit ADC
ORDER PART
NUMBER
TOP VIEW
NC'
7.5V TO 35V
INPUTSl
~~
LTC1290
CH7
L:lj.\;--'J.\lW"~ 10k'
'='
I
'="
4.7.F
TANTALUM ""RE;;..F-_....
m \Z:
NC' ~ -
NC·
VIN~
~VOUT
ID. ,.., JJ.
NR
VTRIM
%
H PACKAGE
a'LEAD TO'5 METAL CAN
·CDNNECTED INTERNALLY. DO NOT CONNECT
EXTERNAL CIRCUITRY TO THESE PINS.
'='
TOP VIEW
·NOISE REDUCTION CAP AND TRIM POTENTIOMETER OPTIONAL.
Nc·OaNC.
Y,N 2
7 NC·
NR 3
6 Vour
GND 4
5 VTRIM
N PACKAGE
HEAD PLASTIC DIP
·CONNECTED INTERNALLY. DO NOT CONNECT
EXTERNAL CIRCUITRY TO THESE PINS.
13-8
LT1027BMH
LT1027CMH
LT1027BCH
LT1027CCH
Specifications on this datasheet are preliminary only, and subject to
change without notice. Contact the manufacturer before finalizing adesign
using this part.
LT1027BCN
LT1027CCN
LT1027
ABSOLUTE mAXimum RATinGS
Input Voltage ....................................... 40V
Input-Output Voltage Differential .................... 35V
Output to Ground Voltage ............................ 7V
Trim to Ground Voltage
Positive ................................ Equal to Your
Negative ........................................ - 3V
Output Short Circuit Duration
VIN 35V ...................................... 10 sec.
VIN<20V ................................... Indefinite
Operating Temperature Range
LT1027M ............................. -55°Ct0125°C
LT1027C .................................. OOC to 70°C
Storage Temperature Range
All Devices ........................... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
=
ELECTRICAL CHARACTERISTICS VIN =10V, lOUT =0, TA =25°C unless otherwise specified.
PARAMETER
Output Voltage
Output Voltage Accuracy
Output Voltage Temperature Coefficient
Settling Time (0.01 %)
Line Regulation
Load Regulation (Source)
Load Regulation (Sink)
Supply Current
Output Trim Range
CONDITIONS
TA=25°C
lOUT = lOrnA
10VIOUT> -lOrnA
a>VTRIM>VOUT
MIN
TYP
5.000
±0.02
2
2
4
10
25
2
±50
MAX
UNITS
V
%
ppm/oC
~s
ppmlV
ppm/rnA
ppm/rnA
rnA
mV
APPLICATions InFORmATion
Transient Response
When a 10mA load step is applied to the LT1027 output, the
reference will settle to 0.01 % in under 21's. For faster transient response under no DC load or while sourcing current,
a 4.7/LF (or greater) tantalum capacitor connected between
Your and ground is recommended. This will reduce the settling time to under 5OOns. Electrolytic capacitors are not
advisable as the series resistance of these type units will
degrade the response. If the LT1027 is to be used as a current sink, a bypass cap is not recommended. For driving
capacitive-type ADCs, the 4.7/LF cap will give optimum performance, although it is not required.
Trimming Output Voltage
The LT1027 has a trim pin for adjusting output voltage. The
impedance of this pin is about 20kO with an open circuit
voltage of 2.5V. A ± 50mV trim range is obtainable by tying
the trim pin to the wiper of a 10k potentiometer connected
between Your and ground. Trimming the output voltage will
not affect the TC of the device.
Noise Reduction
A1/LF capacitor between the NR (noise reduction) pin (3) and
ground will reduce the noise of the LT1027 from 2.5/LVRMS to
1.5/LVRMS in a 0.1Hz to 1kHz bandwidth. The pin should be
left open if not used. Open circuit voltage on the NR pin is
4.4V. This point goes to the internal amplifier input and is
gained up to 5.000V. Do not put any DC load on this pin.
13-9
lEI
lrJln1~LLU WAJU ~~ln1Yr'
~7UD~~-L-O-W-p-o-w-e-rC-ho-p-pe-r-s~-:-~-i;i~-;-:
Operational Amplifier with
Internal Capacitors
April 1989
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
The LTC1049 is a high performance low power chopper
stabilized operational amplifier. The two sample-and-hold
capacitors usually required externally by other chopper
stabilized amplifiers are integrated on the chip. Further,
the LTC1049 offers superior DC and AC performance with
a nominal supply current of only 200I'A.
Low Supply Current 200pA
No External Components Required
Maximum Offset Voltage 10l'V
Maximum Offset Voltage Drift O.11'V/oC
Single Supply Operation 4.75V to 16V
Input Common Mode Range Includes Ground
Output Swings to Ground
Typical Overload Recovery Time 25ms
APPLICATions
•
•
•
•
•
•
4mA-20mA Current Loops
Thermocouple Amplifiers
Electronic Scales
Medical Instrumentation
Strain Gauge Amplifiers
High Resolution Data Acquisition
The LTC1049 has an offset voltage of O.5I'V, with drift of
O.01I'V/oC, O.1Hz to 10Hz input noise voltage is 3l'Vp-p and
typical voltage gain is 160dB. The slew rate is O.8V/l's with
the gain bandwidth product of O.8MHz.
Overload recovery times from positive and negative
saturation conditions are 6ms and 25ms respectively, a
very significant improvement over chopper amplifiers using external capacitors.
The LTC1049 is available in standard 8-pin metal can, plastic and ceramic dual in line packages as well as an 8-pin
SO package. The LTC1049 can be aplug-in replacement for
most standard op amps with improved performance.
TYPICAL APPLICATiOn
Single Supply Thermocouple Amplifier
O.068p!'
K
LT1025A
SUPPLY CURRENT = 280pA
13-10
Specifications on this datasheet are preliminary only, and subject to
change without notice. Contact the manufacturer before finalizing adesign
uslna this DArt.
JTUntJ\12
...-.,
II:U"1I'\IUI...D
LTC1049
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
(Note 1)
ORDER PART
NUMBER
TOP VIEW
Total Supply Voltage (V + toV-) .....................18V
Input Voltage ..................(V + +0.3V) to (V - - 0.3V)
Output Short Circuit Duration ................. Indefinite
Operating Temperature Range
LTC1049M ........................... - 55°C to 125°C
LTC1049C ............................. - 4QoC to 85°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ..............300oC
NC (CASE)
LTC1049MH
LTC1049CH
H PACKAGE
8-LEAD TO-5 METAL CAN
TOP VIEW
LTC1049MJ8
LTC1049CJ8
LTC1049CN8
NC08NC
-IN 2
7 V+
+IN 3
6 OUT
V- 4
5 NC
J PACKAGE
8-LEAD CERAMIC DIP
N PACKAGE
8-LEAD PLASTIC DIP
TOP VIEW
LTC1049CS8
SO PACKAGE
8-LEAD PLASTIC SDiC
ELECTRICAL CHARACTERISTICS
=
=
VS :t 5V, TA operating temperature range, unless otherwise specified.
PARAMETER
Input Offset Voltage
Average Input Offset Drift
Long Term Offset Voltage Drift
Input Offset Current
CONDITIONS
TA= 25°C (Note 3)
(Note 3)
Input Bias Current
TA=25°C
Input Noise Voltage
0_1 Hz to 10Hz
O_lHztolHz
f = 10Hz (Note 4)
VCM=V- t02.7V
Vs= ±2_375Vto ±8V
RL=l00kll, Vour= ±4_9V
Input Noise Current
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
TA=25°C
MIN
•
MAX
±10
±0_1
MIN
50
±30
•
•
•
•
•
LTC1049M
TYP
±2
±0_02
±15
115
115
130
3_0
1.0
2_0
130
130
160
±60
%150
±30
±800
LTC1049C
TYP
±2
±0_02
50
±30
±15
110
110
130
3_0
1.0
2_0
130
130
160
MAX
±10
±0_1
±100
%150
±50
±150
UNITS
pV
pV/oC
nV/..Jmo
pA
pA
pA
pA
pVp-p
pVp-p
fAlv'Hz
dB
dB
dB
13-11
LTC1049
ELECTRICAL CHARACTERISTICS
VS = :!: 5V, TA =operating temperature range, unless otherwise specified.
PARAMETER
Maximum Output Voltage Swing
CONDI:rJONS
RL = 10kll
MIN
LTC1049M
TYP
-4.9/+4.2
LTC1049C
TYP
-4.9/+4.2
MIN
UNITS
V
-4.6/+3.2
-4.6/+3.2
V
±4.9
±4.97
±4.9
±4.97
V
RL = 100kll
Slew Rate
0.8
0.8
VIpS
RL = 10kll, CL=50pF
Gain Bandwidth Product
0.8
0.8
MHz
Supply Current
No Load
270
200
p.A
TA=25°C
200
300
450
p.A
400
Internal Samplmg Frequency
700
700
Hz
..
Note 3: These parameters are guaranteed by design. Thermocouple effects
The • denotes the speClflcalions which apply over the full operatmg
temperature range.
preclude measurement of these voltage levels in high speed automatic test
Note1: Absolute Maximum Ratings are those values beyond which the life
systems. Vas Is measured to alimit determined by test equipment capability.
of the device may be impaired.
Note 4: Current Noise is calculated from the formula:
Note 2: Connecting any terminal to voltages greater than V+or less than
INd(2q'1b)
V- may cause destructive latch up. It is recommended that no sources
where q= 1.6 x 10 -19 Coulomb.
operating from external supplies be applied prior to power·up of the
LTC1049.
TA=25°C
•
•
MAX
MAX
•
TEST CIRCUITS
DC to 10Hz and DC to 1Hz Noise Test Circuit
Electrical Characteristics
Test Circuit
C2
C3
1M
R4
R2
v+
R3
34k
.,..
34k
.,..
R4
BANDWIDTH
R1
R2
R3
C2
C3
C4
10Hz
16.211 162k 16.2k 16.211 O.lpF 1.0# 1.0pF
1Hz
16.211 162k 162k t62k 1.0# 1.0pF 1.0#
13-12
LTUllfM
~~~[LD[M]DOO&~W
L7YO~~---D-u-a-l-p-re-c-is-io-n-c-L~-~_;_~-:-;
Stabilized Operational Amplifier With
Internal Capacitors
May 1989
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
•
•
•
•
•
•
The LTC1051 is a high performance, low cost dual chopper
stabilized operational amplifier. The unique achievement
of the LTC1051 is that it integrates on chip the sampleand-hold capacitors usually required externally by other
chopper amplifiers. Further, the LTC1051 offers better
combined overall DC and AC performance than is available from other chopper stabilized amplifiers with or without internal sample/hold capacitors
Dual Low Cost Precision Op Amp
No External Components Required
Maximum Offset Voltage 5p.V
Maximum Offset Voltage Drift 0.05p.V/oC
Low Noise 1.5p.Vp•p(0.1 Hz to 10Hz)
Minimum Voltage Gain, 120dB
Minimum PSRR, 120dB
Minimum CMRR, 114dB
Low Supply Current 1mAlOp Amp
Single Supply Operation 4.75V to 16V
Input Common Mode Range Includes Ground
Output Swings to Ground
Typical Overload Recovery Time 3ms
Pin Compatible with Industry Standard Dual Op Amps
Overload recovery times from positive and negative
saturation conditions are 1.5ms and 3ms respectively,
about 100 or more times improvement over chopper amplifiers using external capacitors.
APPLICATions
•
•
•
•
•
•
The LTC1051 has an offset voltage of 0.5p.V, drift of
0.01p.V/oC, DC to 10Hz, input noise voltage of 1.5p.Vp•p and
a typical voltage gain of 140dB. The slew rate of 4V/p,s and
a gain bandwidth product of 2.5MHz are achieved with
only 1rnA of supply current per op amp.
Thermocouple Amplifiers
Electronic Scales
Medical Instrumentation
Strain Gauge Amplifiers
High Resolution Data AcquiSition
DC Accurate R, CActive Filters
The LTC1051 is available in standard plastic and ceramic
dual in line packages as well as a 16-pin SOL package. The
LTC1051 can be a plug in replacement for most standard
dual op amps with improved performance.
TYPICAL APPLICATiOn
High Performance Low Cost Instrumentation Amplifier
LTC1051 Noise Spectrum
R1
R2
~l00~+H~-H+mffi-rH~
~
R1
~
in
oor++B~-H+mffi-rH~
m
z
~
~ 60r++B~-H+mffi-rH~
~
R1=4991l,0.1%
R2=100kll.0.1%
GAIN =201
MEASURED CMRR-12OdB AT DC
MEASURED INPUT Vas 3~V
MEASURED INPUT NOISE 2~Vp-p (DC -10Hz)
w
-5V
~~ 40~+H~-H+mffi-rH~
w~~~~~=-~~
10
Specifications on this datasheet are preliminary only, and subject to
change without notice. Contact the manufacturer before finalizing adesign
using this part.
100
1k
FREQUENCY (Hz)
10k
13-13
LTC1051
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER inFORmATion
TOP VIEW
ORDER PART
NUMBER
LTC1051MJ8
LTC1051CJ8
LTC1051CN8
OUTA08V+
Total Supply Voltage (1/ + to V-) .................... 18V
Input Voltage ............... (1/ + + 0.3V) to (V - - 0.3V)
Output Short Circuit Duration .................. Indefinite
Operating Temperature Range
LTC1051 M............................ - 55°C to 125°C
LTC1051C ............................. - 40°C to 85°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ............. 300°C
INA 2
7 OUTB
+INA 3
6 -INS
v-
4
5 +IN B
J PACKAGE
8-LEAD CERAMIC DIP
N PACKAGE
a·LEAD PLASTIC DIP
TOP VIEW
~NQ
Nell
oUTAIl~~
~v+
~OUTB
~-INB
-INAIi :
+INA[I'
~+INB
~NC
v-[[
Ncll
NC
LTC1051CS
~NC
Nerr
i!........_ - - - - 'l!i
Ne
SO PACKAGE
16-lEAD PLASTIC SOle
ELECTRICAL CHARACTERISTICS
Vs = :!: SV, TA =operating temperature range unless otherwise specified.
PARAMETER
Input Offset Voltage
Average Input Offset Drift
Long Term Offset Drift
Input Bias Current
CONDITIONS
TA=25°C
Input Offset Current
TA = 25°C
LTC1051C
LTC1051M
TA=25°C
Input Noise Voltage
As = lOon, DC to 10Hz
Input Noise Current
Common Mode Rejection Ratio, CMRR
Rs = 1000, DC to 1Hz
f=10Hz
VCM=V- to +2.7V, TA = 25°C
Differential CMRR
Power Supply Rejection Ratio
Large Signal Voltage Gain
Maximum Output Voltage Swing
Slew Rate
Gain Bandwidth Product
Supply Current
Vs= ±2.375Vto ±8V
RL=10kll,VoUT =±4V
RL=10kll
RL=I00kll
RL = 10kll, CL = 50pF
No Load, TA= 25°C
Internal Sampling Frequency
MIN
•
••
•
•
•
•
•
LTC1051
TYP
±0.5
±O.O
50
±15
±3O
114
110
114
120
120
±4.7
UNITS
pV
pV/oC
nV/..fMo
pA
pA
pA
pA
pA
±65
±125
±450
±125
±175
pV~p
pVp~
1.5
0.4
2.2
130
fAl.JHz
dB
dB
dB
dB
dB
V
V
Vips
MHz
rnA
rnA
kHz
140
180
:t4.85
±4.95
4
2.5
2
•
MAX
±5
±0.05
3.25
4.5
3
Vs =SY, GND, TA =operating temperature range unless otherwise specified.
PARAMETER
Input Offset Voltage
Input Offset Drift
Input Bias Current
Input Offset Current
Input Noise Voltage
Supply Current
CONDITIONS
TA=25°C
TA=25°C
TA=25°C
DCtotOHz
No Load, TA= 25°C
The • denotes the specifications which apply over the full operating temperature range.
13-14
MIN
•
LTC1051
TYP
±O.5
±O.Ot
±10
±2O
1.8
1
MAX
UNITS
pV
pV/oC
pA
pA
pV...
rnA
±5
±O.05
±50
±80
2
JTLln~
........,
I~-Y
''''''''-unlt\Q
~~
~~~[LDUMilDOO&~W
LTC1064-2
TECHNOLOGY~---L-O-W-N-o-is-e-,-Hi-g-h-F-re-q-u-e-n-cy.-,
8th Order Butterworth Lowpass Filter
May 1989
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
The LTC1064·2 is a monolithic 8th order lowpass butter·
worth filter, which provides a maximally flat passband.
The attenuation slope is - 48dB/octave and the maximum
attenuation is in excess of 80dB. An external TIL or CMOS
clock programs the filter's cutoff frequency. The clock to
cutoff frequency ratio is 100:1 (pin 10 at negative supply)
or 50:1 (pin 10 at V+). The maximum cutoff frequency is
140kHz. No external components are needed.
8th Order Filter in a14-Pin Package
140kHz Maximum Corner Frequency
No External Components
50:1 and 100:1 Clock to Cutoff Frequency Ratio
80l'VRMS Total Wideband Noise
0.03% THO or Better
Operates from ± 2.37V to ± 8V Power Supplies
APPLICATions
• Antialiasing Filters
• Smoothing Filters
• Tracking High Frequency Lowpass Filters
The LTC1064·2 features low wideband noise and low har·
monic distortion even for input voltages up to 3VRMS. In
fact the LTC1064·2 overall performance competes with
equivalent multi·op amp RC active realizations. The
LTC1064·2 is available in a 14·pin DIP or 16·pin surface
mounted SOL package. The LTC1064·2 is fabricated using
LTC's enhanced analog CMOS Si·gate process.
The LTC1064·2 is pin compatible with the LTC1064·1.
TYPICAL APPLICATiOn
8th Order Clock Sweepable
Lowpass Butterworth Filter
Measured Frequency Response
OdB
NC
1
14
Llll1ll\l1H!
13
vfClJ(
12
11
501100 10
9
Vs= ±7.5V
-15dB
OUT(C)
NC
\
-30dB
-8V
CLOCK=5MHz
v+
,; -45dB
\
1\
~
~ -60dB
\
VOUT
-75dB
-90dB
'I\.
-105dB
NOTE: THE POWER SUPPLIES SHOULD BE BYPASSED BY A O.I~F
CAPACITOR CLOSE TO THE PACKAGE THE NC PINS 1, 6, 8, AND
13 SHOULD BE PREFERABLY GROUNDED.
1\
o
100
Specifications on this datssheet are preliminary only, and subject to
change without notice. Contact the manufacturer before finalizing adesign
using this part.
V
200 300 400 500
FREQUENCY (kHz)
m
~
600
700
13-15
LTC1064-2
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Total Supply Voltage (V + to V-) ................... 16.5V
Power Dissipation ...............................400mW
Storage Temperature Range ............. - 65°C to 1500 G
Lead Temperature (Soldering, 10 sec.) ..............3000 C
Operating Temperature Range
LTC1064-2M .......................... - 55°C to 125°C
LTC1064·2C ........................... - 40°C to 85°C
ORDER PART
NUMBER
TOP VIEW
LTC1064·2MJ
LTC 1064·2CJ
LTC1064·2CN
J PACKAGE
14-LEAO CERAMIC DIP
N PACKAGE
14-LEAD PLASTIC DIP
TOP VIEW
LTC1064·2CS
S PACKAGE
16-LEAO PLASTIC SOL
ELECTRICAL CHARACTERISTICS
Vs = :!: 7.5V, 100:1, fClK =2MHz, R1 =1OkO, TA =25°, TTL clock input level, unless otherwise specified.
PARAMETER
Passband Gain (Note 1)
Gain TempCo
- 3dB Frequency
Gain at - 3dB Frequency
Stopband Attenuation
Stopband Attenuation
Stopband Attenuation
Stopband Attenuation
Input Frequency Range
Output Voltage Swing and
Operating Input Voltage Range
Total Harmonic Distortion
Wideband Noise
Output DC Offset (Note 1)
Output DC Offset Tempeo
13-16
CONDITIONS
Referenced toOdB, lHzto 1kHz
100:1
50:1
Referenced to OdB, fiN = 20kHz
At 1.5'-3dB, 50:1, fiN = 60kHz
At 2'-3dB, 100:1, fiN = 40kHz
At 3'-3dB, 100:1, fiN = 60kHz
At 4'-3dB, 100:1, fiN = 80kHz
100:1
50:1
Vs= ±2.37V
Vs= ±5V
Vs= ±7.5V
Vs = ± 5V, Input = 1VRMS atl kHz
Vs= ± 7.5V, Input = 3VRMS at 1kHz
Vs = ± 5V, Input = GND 1Hz-1.99MHz
Vs= ±7.5V, Input=GND1Hz-l.99MHz
Vs= ±7.5V
Vs= ±5V
•
MIN
-0.5
••
-46
••
0
0
-1.0
-3.1
-5.0
•
•
24
TYP
0.0002
20
40
-3
27
47
74
90
MAX
0.15
-2.75
<.)
24
\CLK=IMHZ
!
-15
..,. -55'C
1\
25'C- f - J \ . / i--::: 125'C 1 - 'fA It ~ ;::::: .....
~
:::>
~ 16
-
1:
4
o
i\
~
8: 20
~
\
iii' -30
o
~-45
§
> -60
-75
-90
-105
2 4
6 8 10 12 14 16 18 20 22 24
POWER SUPPLY VOLTAGE (V)
1
10
100
fiN (kHz)
Pin DESCRIPTIOn
The "no connection" pins (1, 6, 8, 13) should be preferably
grounded, especially when high cutoff frequencies are
sought.
13-18
When the 50/100 pin (10) is connected to V+, the fCLKif -3dS
ratio is equal to 50. When pin 10 is at V-, the fCLK/f -3dS
ratio equals 100. When pin 10 is grounded (or floated), the
passband of the filter loses its flatness, Graph 7, and its
amplitude response does not approximate a Butterworth
filter.
.
~~~[LO[M]OOO&~W
~-Y--Llnet\Q
~~
LTC1064-3
T8CHNOLOGY~---L-o-w-N--oi-se-,-H-ig-h-F-r-eq-u-e-n-c-y,
8th Order Linear Phase Lowpass Filter
March 1989
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
The LTC1064·3 is amonolithic 8th order lowpass Bessel fil·
ter, which provides a linear phase response over its entire
passband. An external TIL or CMOS clock programs the
filter's cutoff frequency. The clock to cutoff frequency ra·
tio is 75:1 (pin 10 at V+) or 150:1 (pin 10 at V-I. The maxi·
mum cutoff frequency is 100kHz. No external components
are needed.
8th Order Filter in a14-Pin Package
100kHz Maximum Corner Frequency
No External Components
75:1 and 150:1 Clock to Cutoff Frequency Ratio
80/LVRMS Total Wideband Noise
0.005% THO or Better
Operates from ±2.37V to ±8V Power Supplies
Low Total Output DC Offset
APPLICATions
• Antialiasing Filters
• Smoothing Filters
• Tracking High Frequency Lowpass Filters
The LTC1064-3 features low wideband noise and low harmonic distortion even for input voltages up to 3VRMS. In
fact the LTC1064·3 overall performance competes with
equivalent multi-op amp RC active realizations. The
LTC1064·3 is available in a 14-pin DIP or 16'pin surface
mounted SOL package. The LTC1064·3 is fabricated using
LTC's enhanced analog CMOS Si·gate process.
The LTC1064·3 is pin compatible with the LTC1064·1, ·2,
and·4.
TYPICAL APPLICATiOn
8th Order Clock Sweepable
Lowpass Bessel Filter
Measured Frequency Response
OdB
.--~.--..,14
NC
2
lTC1064-3
OUT(C)
I"-
-15dB
\
.,:.:13:..-+- NC
v-
12
l(llK 11
CLOCK=7MHz
7511SO.,:.:10:..-+- V+
. 9
-30dB
-8V
VOUT
\
"'-45dB
~
,;'-6OdB
-75dB
lEI
-90dB
NOTE: THE POWER SUPPLIES SHOULD BE BYPASSED BY A O.lpf
OR BETTER CAPACITOR CLOSE TO THE PACKAGE. THE
CONNECTION BETWEEN PINS 7 AND 14 SHOULD BE MADE UNDER
THE I.C. PACKAGE.
-105dB
10
Specifications on this datasheet are prellmlnaJY only, and subject to
change Without notice. Contact the manufacturer before finalizing adesign
using this part.
100
FREQUENCY (kHz)
GROUP DELAY =91'"
13-19
L,7unlt\D
~~~[10[t¥j]OOO&~W
LTC1064-4
-----
-~v
TECHNOI.JOG
I'
Low Noise, 8th Order, Clock
Sweepable Cauer Lowpass Filter
February 1989
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
The LTC1064-4 is an 8th order, clock sweepable Cauer lowpass switched capacitor filter. An external TIL or CMOS
clock programs the value of the filter's cutoff frequency.
With pin 10 at V+, the clock to cutoff frequency ratio is
50:1; the passband ripple is ±0.1dB and the stopband
attenuation is 80dB at 2x fCUTOFF. Cutoff frequencies up
to 100kHz can be achieved. When pin 10 is at V-, the filter
has a transitional Butterworth-Cauer response with a
clock to - 3dB frequency ratio of 100:1. The stopband
attenuation of 92dB is at 2.5 times the cutoff frequency.
8th Order Filter in a14-Pin Package
80dB or More Stopband Attenuation
50:1 and 100:1 Clock to Center Ratio
130/LVRMS Total Wide band Noise
0.03% THO or Better
100kHz Maximum Cutoff Frequency
Operates up to ± 8V Power Supplies
Input Frequency Range up to 50 Times the Filter
Cutoff Frequency
The LTC1064-4 features low noise and low harmonic distortion even when input voltages up to 3VRMS are applied.
The LTC1064-4 overall performance competes with equivalent multi-op amp RC active realizations. The LTC1064-4 is
pin compatible with the LTC1064-1, LTC1064-2, and
LTC1064-3.
APPLICATions
• Antialiasing Filters
• Telecom Filters
• Sinewave Generators
The LTC 1064-4 is manufactured using Linear Technology's
enhanced LTCMOSTM silicon gate process.
TYPICAL APPLICATiOn
8th Order Clock Sweepable
Lowpass Elliptic Filter
Measured Frequency Response
OdB
A\
R(h,l)
~-+-COMP2
~-+--8V
'IUt-'''--+- CLOCK (TTL, :s;5MHz)
t:.::...-+-V+ORV-
-1SdB
-3OdB
~-45dB
>-6OdB
F--+-VOUT
~7SdB
-9OdB
NOTE: THE POWER SUPPLIES SHOULD BE BYPASSEO BY A 0.1~F
CAPACITOR CLOSE TO THE PACKAGE.
BYPASSING PIN 10 WITH A 0.1~F DISC CERAMIC CAPACITOR
IMPROVES CLOCK FEEDTHROUGH.
FOR CUTOFF FREQUENCY ABOVE 40kHz, USE 27pF-5pF
COMPENSATION CAPACITORS. BETWEEN PINS 13 AND 1 AND 6 AND 7
THE CONNECTION BETWEEN PINS 7 AND 14 SHOULD BE
PHYSICALLY DONE UNDER THE PACKAGE.
13-20
-10SdB
10k
Specifications on this datasheet are preliminary only, and subJect to
change without notice. Contact the manufacturer before finalizing adesign
!..!!!~: ~~!~ ;!~:'!.
B
\
1\
C
\
\
\
\
~IV
V
100k
FREQUENCY (Hz)
CURVE A: 1CLK=2MHz, 100:1
CURVE B: fCLK=2MHz, 50:1
CURVE C: fCLK=5MHz, 50:1
CCOMP1 = 18pF
CCOMP2=24pF
1M
~~~[bD[M]DOO&~)1
~~~~~~~__________~_lO_74
Switching Regulator
June 1989
a negative boost converter, and as a flybackor forward
converter. The switch output is specified to swing 40V below ground. This feature permits the LT1074 to use a
tapped inductor in the buck mode, with output currents up
to 10A using no external switch transistor.
FEATURES
•
•
•
•
•
•
•
•
•
5A On-Board Switch
Up to 200kHz Switching Frequency
Greatly Improved Dynamic Behavior
Available in Low Cost 5-Lead Packages
Only 7mA Quiescent Current
Programmable Current Limit
Operates Up to 60V Input
Includes Output Voltage Monitor
Micropower Shutdown Mode
The LT1074 uses a true analog multiplier in the feedback
loop. This makes the device respond nearly instantaneously to input voltage fluctuations and makes loop gain
independent of input voltage. As aresult, dynamic behavior of the regulator is significantly improved over previous
voltage mode designs without the complexity and noise
sensitivity of current mode approaches.
APPLICATions
• 5A Buck Converter with Output Voltage Range of
2.5Vt050V
• Tapped Inductor Buck Converter with 10A Output at 5V
• Positive-to-Negative Converter, 4.5V to 50V Input,
- 3.5V to - 40V Output
• Negative Boost Converter, - 4.5V to - 40V Input,
- 8V to - SOV Output
• Multiple Output Buck Converter
• Single or Multiple Output Flyback or Forward Converter
DESCRIPTiOn
The LT1074 is a5A monolithic bipolar switching regulator
which requires only a few external parts for normal operation. The power switch, all oscillator and control circuitry,
all current limit components, and an output monitor are included on the chip. The topology is a classic positive
"buck" configuration but several design innovations allow
this device to be used as apositive to negative converter,
On-chip pulse by pulse current limiting makes the LT1074
nearly bust-proof for output overloads or shorts, and
avoids surge damage to external components. The input
voltage range as a buck converter is 8V to 6OV, but a
self-boot feature allows the device to operate with input
voltages as low as 4.5V in the inverting and boost
configurations.
The LT1074 is available in low cost 5-lead TO-220 or TO-3
packages with frequency pre-set at 100kHz and current
limit at 7A. An 11-pin single-in-line package (SIP) is also
available which allows switching frequency to be increased to 200kHz and current limit to be adjusted down
to zero. In addition, full micropower shutdown can be programmed as well as external current senSing, and soft
start. An output monitor "status" pin can be used as a microprocessor reset, and a complementary output pin will
allow implementation of ultra-high-efficiency designs.
TYPICAL APPLICATiOn
Switch "On" Voltage
Basic Positive Buck Converter
3.5
L1t
lOVT040V . . . . . - - - - - - .___~..J'V'I50pllr'V'\...--...,.....5V
~
--~
U1014
~
MBR745
Rl
2.8k
1%
;;~ 2,5
i!O
g
k
2.0
?
1.5
-OPTIONAL - USE IF CONVERTER IS MORE THAN 2'
FROM RAW SUPPLY FILTER CAPACITOR
tpULSEENGINEERING. INC. NPE-92114
TI=2~'C
3.0
1.0
,--
-- -
V
~
o
Specifications on this datasheet are preliminary onlll and subject to
change without notice. Contact the manufacturer before Tlnallzlng adesign
using this part.
~
2
3
4
SWITCH CURRENT (A)
13-21
LT1074
ABSOLUTE mAXimum RATinGS
Input Voltage
LT1074 ........................................... ·45V
LT1074HV ..... , .,................................. 64V
Switch Voltage with Respect to Input Voltage
LT1074 ........................................... S4V
LT1074HV ........................................ 75V
Switch Voltage with Respect to Ground Pin
LT1074 ........................................... 35V
LT1074HV ........................................ 45V
Feedback Pin Voltage ....................... - 2V, +10V
Shutdown Pin Voltage ............................... 40V
Status Pin Voltage .................................. 30V
(Current Must Be Limited to 5mA When Status Pin
Switches "On")
Complementary Output Voltage ..................... 40V
(Current Must Be Limited to 15mA When Output
Switches "On")
ILiM Pin Voltage (Forced) ............................ 4.5V
ExtLim Pin Voltage ................. VIN - 2V to VIN +O.4V
Freq Pin Voltage ................................... 5.5V
Maximum Operating Ambient Temperature Range
LT1074C, LT1074HVC ..................... OOC to 70°C
LT1074M, LT1074HVM ................ -55°Cto 125°C
Maximum Operating Junction Temperature Range
LT1074C, LT1074HVC...............•..... OOCto 100°C
LT1074M, LT1074HVM ................ -55°C to 150°C
Maximum Storage Temperature ......... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec) ....... '" .... 300°C
13-22
PACKAGE/ORDER InFORmATion
ORDER PART
NUMBER
BOTIOM VIEW
'~''"
o ~ ; 0
CASE IS GND
FB
VSN
K PACKAGE
HEAD TO-3 METAL CAN
FRONT VIEW
5 ~VIN
4
0
3 ==GND VsW
2
01 = = F B Vc
LT1074MK
LT1074HVMK
LT1074CK
LT1074HVCK
LT1074CT
LT1074HVCT
T PACKAGE
HEAD TO-220
LEADS ARE FORMED STANDARD
FOR STRAIGHT LEADS, ORDER
FLOW 06
FRONT VIEW
COMOUT
11
10
Vc
9
0
8
7
6
5
STATUS
4
EXTLIM
FRED
SHUT
GND
FB
3
Vsw
2
01
I LIM
VIN
V PACKAGE
1HEAD SIP
CASE IS CONNECTED TO GROUND
LEADS ARE FORMED.
LT1074CV
LT1074HVCV
LT1074
ELECTRICAL CHARACTERISTICS TJ = 25°C, Y,N =25V, unless otherwise noted.
PARAMETER
Switch "On" Voltage (Note 1)
Switch "Off" Leakage
Supply Current
Minimum Supply Voltage
Switch Current Limit
CONDITIONS
Isw= 1A, Ti'!:O·C
Isw=1A, TI
~
tt'
li! 1.2401---+--+-+--+---+--+--+---1
TI- -55'C
m
1.260 1---+--+-+--+---+--+--+---1
w
60
0::
'"~
40
[.....--
......
~ 30
--
.....-
..-
20
10
1.230 '-----'-----'----'-----'--'----'----'--'
-50 -25 0
25 50 75 100 125 150
TEMPERATURE I'C)
o
-50 -25 0
25 50 75 100 125
TEMPERATURE I'C)
150
APPLICATion HinTS
The LT1087 is an adjustable voltage regulator with Kelvin
sense inputs. These inputs can be used to fully Kelvin
sense a remote load so that the regulation at the load is
nearly perfect. The sense inputs can also be used in a 2wire configuration to compensate for voltage drops in
long output leads eliminating the two extra wires needed
for full Kelvin sensing.
This regulator is easy to use and has all the protection features that are expected in high performance voltage
regulators. They are short circuit protected, have safe area
protection as well as thermal shutdown to turn-off the
regulator should the temperature exceed about 165°C.
Sense Inputs
In a three terminal regulator the sense inputs are terminated at the output pin of the device (normally the case for
adjustable regulators). This means that regulation will be
best at the case of the device. Any wire resistance between the regulator and the actual load will degrade the
regulation, especially at high currents. This five pin configuration allows the user to select the pOint where regulation will be optimized.
13-31
I
~
LT1087
APPLICATion HinTS
The sense pins can be used. in two basic configurations.
They can be used to make aremote Kelvin sensed output,
or they can be used as a differential amplifier to simply
compensate for along wire run.
For full Kelvin sensing of the output, the sense pins are
tied together, then connected through a 1k resistor to the
top of the R1/R2 divider that sets the output voltage. The
1kresistor is necessary to prevent high currents from flowing into the sense pins under fault conditions and will
cause no significant error in the output voltage. The top
and bottom of the R1/R2 divider are then tied to the points
in the circuit where optimum regulation is desired. These
connections must be made separate from the wires that
carry the main load current. See the Remote Kelvin Sensed
Output Circuit in the Typical Applications Section. At light
load currents the voltage drop down the output lead will be
small and the sense pins will be at approximately the
same voltage as the output pin. For heavy load c.urrents
the output pin will be driven positive with respect to the
sense pins by the value of the voltage drop across the output leads and the voltage at the sense pOints will be regulated. The output is allowed to go 1V above the sense pins
in this configuration. For output pin voltages greater than
1V above the sense pins some degradation in regulation
will occur. Since the output is allowed to go positive with
respect to the sense pins by 1V and assuming that both
the power lead to the load and the ground return are approximately equal, this configuration allows the user to
have almost perfect regulation at the sense point with 2V
of drop in the wire leads between the regulator and the
load. Note that the input voltage to the regulator must provide enough headroom to the regulator to allow this to
happen. The input voltage must be greater than the total
of the regulated output voltage plus the wire drops plus
the dropout voltage of the regulator (.. 1.5V for LT1087 at
5A).
If the user does not want to run the extra two wires required for full Kelvin sensing, a second method can be
used to compensate for wire drops. The sense inputs can
be considered to be the inputs to a differential amplifier
13-32
with again of 11 when the +Sense pin is positive with respect to the - Sense pin. Pulling the - Sense pin negative
with respect to the +Sense pin (with the +Sense pin tied
to the output) by 10mV will cause the reference voltage,
nominally 1.25V, to increase by 110mV to l.36V. The output
of the regulator would then increase by the factor
See the Remote Load Regulation Compensation Circuit in
the Typical Applications. In this manner sensing across a
small part of the output leads can compensate for the entire length. The maximum differential input voltage over
which the differential gain holds true is 60mV at 25°C, and
this voltage is proportional to absolute temperature. For
most circuits the differential input voltage should be less
than 4OmV. Exceeding this small differential voltage will
not damage the device until the differential exceeds 5V.
Regulation, however, will be degraded. Assuming a maximum differential input voltage of 40mV and an output voltage of 5V, and using the formula from the Remote Load
Regulation Compensation Circuit, this configuration can
compensate out 1.76V of wire drop. For higher output voltages larger wire drops can be compensated out. As in the
previous circuit the input voltage to the regulator must
provide enough headroom for this to happen.
Output Voltage
The LT1087 develops and tries to maintain a 1.25V reference voltage between its sense pins and its adjust pin (see
Figure 1). By placing· aresistor between the device's sense
point (the end of R3) and its adjust pin, aconstant current
is caused to flow through R1 and down through R2 to set
the overall output voltage. Normally R1 is chosen so that
the current flowing through it is equal to the specified
minimum load current of 10mA. Because IADJ is very small
and constant when compared with the current through R1,
it represents asmall error and can usually be ignored.
LT1087
APPLICATion HinTS
-SENSE
INPUT
R3
1k
LT1007 +SEMSl: 1--_~iIIo-I
I
R2
Figure 1. Standard Connection
TYPICAL APPLICATiOnS
Remote Kelvin Sensed Output (4-Wlre)
-SENSE
INPUT
LT1007, +SENSE
n
1k
+SENSE
+ POWER
ADJUST OUTPUT
--- ::;:::~10~F
I
R1
VOUT=VREF (1
;: ~1O~F
TANT.
REMOTE
LOAD
+-at)
;::~ WHERE VREF=1.25V
GLARGE>100~
R2
-SENSE
-POWER
13-33
LT1087
TYPICAL APPLICATions
Remote Load Regulation Compensation (2·Wire)
lk
-SEI'lSE
lT1087
INPUT
_*O.l pF
+SENSE
lk
X"
A"
,..--...-...,
~
ADJUST OUi1'UT
===
I
:;::~10pF
J
Rl
REMOTE
LOAD
Vour=VREF (1 + *)
;:~ WHERE vREF = 1. 25V
CLARGE > 100pF
R2
,
,
1
B"
EXAMPLE: IF THE LOAD MUST BE LOCATED
10 FT. (120,,) FROM THE REGULATOR
AND Your IS 5V
THEN (A"+B")=24.0·
Rl =1200, R2=3600
X"=
(A"+B")
-X"=5.2"
[11 (1+*)]
BY CONNECTING THE -SENSE PIN 5.2" FURTHER DOWN
THE OUTPUT WIRE THAN THE +SENSE PIN THE LOAD
REGULATION CAUSED BY 20' OF WIRE CAN BE
COMPENSATED OUT.
Paralleling Devices for Higher Current
MASTER
lk
-SENSE 1---'-_1,""","--'I,/IIIr---,
.....-iINPUT
r--~-
LT1087 +SEI'lSE
AOJUST OUTPUT~---~~-_'I,/IIIr--~-_1-'Vour
1T
Rl
,
r ----------------1k
SLAVE
+ ,,10pF
Rs
R2
....
+SENSE~---~
INPUT
Lil001
-SENSE
ADJUST 0UTPUT1--. .- - 4 - -.......
L _________________________
~
FOR PARALLELING MORE THAN TWO DEVICES - DUPLICATE SLAVE SECTION
MINIMUM LOAD CURRENT =(10mA) (# OF DEVICES IN PARALLEL)
Rl, R2 NETWORK CAN BE USED AS THE MINIMUM LOAD
RM=8mO=10"OF #20 A.W.G. SOLID WIRE (COPPER)
Rs=7,3mll=9.1" OF #20 A.w.G. SOLID WIRE (COPPER)
RM AND Rs SHOULD BE NON-INDUCTIVE. THIS IS EASILY ACCOMPLISHED BY FOLDING THE
WIRE BACK UPON ITSELF SO THAT THE FielDS GENERATED, BY CURRENT FLOWING IN THE
WIRE, CANCEl.
13-34
f"
~~~[lO[M]OOO&~Y(
~~~EICO~OUO-G~~~----------U_C_llO_O
~
Precision, Single Supply,
Instrumentation Amplifier
(Fixed Gain =100)
June 1989
FEATURES
DESCRIPTiOn
•
•
•
•
•
•
•
•
•
•
The LTC1100 is a high precision instrumentation amplifier
using chopper stabilization techniques to achieve out·
standing DC performance. The input DC offset is typically
2"V while the DC offset drift is 20nV/oC; a very low bias
current of 25pA is also achieved.
Offset Voltage 2"V
Offset Voltage Drift 20nV/oC
Bias Current 25pA
Offset Current 10pA
Gain Non·Linearity 8ppm
Gain Error 0.03%
CMRR110dB
0.1 Hz-10Hz Noise 2"Vp·p
Single 5V Supply Operation
8·Pin MiniDIP
The LTC1100 is self contained, that is, it achieves a differ·
ential gain of 100 without any external gain setting resis·
tor or trim pot. The gain linearity is 8ppm and the gain drift
is 4ppm/oC. The LTC1100 operates from a single 5V supply
up to ± 8V. The output, pin 8, typically swings 150mV from
its power supply rails.
APPLICATions
An optional external capacitor can be added from pin 7to
pin 8 to tailor the device's 20kHz bandwidth and to elim·
inate any unwanted noise pickup.
• Strain Gauge Amplifier
• Thermocouple Amplifier
• Differential to Single Ended Converters
The LTC1100 is manufactured using Linear Technology's
enhanced LTCMOSTM silicon gate process.
SLOCK DIAGRAm
TYPICAL APPLICATION
Single 5V Supply, DC Instrumentation Amplifier
99R
lTCll00
VOUT=100 (+V,N - -Y,N)
O.Q1,.F
99R
lEI
Specifications on this datssheet are preliminary only, and subject to
change without notice. Contact the manufacturer before finalizing adesign
using this part.
13-35
lPLliLSl1UWAJU~~Lli If
L7~~~----p-re-C-is-io-n-'-M-ic-r-o-~-:_~_1~_:'
Single Supply Instrumentation Amplifier (Fixed Gain =10 or 100)
April 1989
DESCRIPTion
FEATURES
•
•
•
•
•
•
•
•
•
Gain Error
Gain Non·Linearity
Gain Drift
Supply Current
Offset Voltage
Offset Voltage Drift
Offset Current
CMRR,G=100
0.1Hzto 10Hz Noise
• Gain Bandwidth Product
• Single or Dual Supply Operation
0.04% Max
0.0008% (8ppm) Max
4ppm/oCMax
105/LA Max
160/LV Max
O.4/LVfOCTyp
600pAMax
100dB Min
0.9/LVp,p Typ
2.3pAp·p Typ
250kHz Min
APPLICATions
• Differential Signal Amplification in Presence of
Common·Mode Voltage
• Micropower Bridge Transducer Amplifier
- Thermocouples
- Strain Gauges
- Thermistors
• Differential Voltage to Current Converter
• Transformer Coupled Amplifier
• 4mA-20mA Bridge Transmitter
The LT1101 establishes the following milestones:
(1) It is the first micropower instrumentation amplifier,
(2) It is the first single supply instrumentation amplifier,
(3) It is the first instrumentation amplifier to feature fixed
gains of 10 and/or 100 in low cost, space·saving 8·lead
packages.
The LT1101 is completely self·contained: no external gain
setting resistor is required. The LT1101 combines its mi·
cropower operation (75/LA supply current) with a gain error
of 0.008%, gain linearity of 3ppm, gain drift of 1ppm/oC.
The output is guaranteed to drive a 2k load to ± 10V with
excellent gain accuracy.
Other precision specifications are also outstanding: 50/LV
input offset voltage, 130pA input offset current, and low
drift (O.4/LV/oC and 0.7pA/°C). In addition, unlike other in·
strumentation amplifiers, there is no output offset voltage
contribution to total error.
A full set of specifications are provided with ± 15V dual
supplies and for single 5V supply operation. The LT1101
can be operated from a single lithium cell or two Ni·Cad
batteries. Battery voltage can drop as low as 1.8V, yet the
LT1101 still maintains its gain accuracy. In single supply
applications, both input and output voltages swing to
within a few millivolts of ground. The output sinks current
while swinging to ground - no external, power consum·
ing pull down resistors are needed.
aLOCK DIAGRAm
Gain Error Distribution
.-------1-r8 OUTPUT
GROUND 1
(REF)
OOR
30
OOR
SHORTTO 1. G=10 2
N.C. G=100
.... S
25
7 SHORTT08,G=10
N.C. G=1oo
~
!5
....I
20
G-1oo
RL=50k
TA=25°C
930 UNlT$
TESTEO
IN All PACKAGES
o
I:
INVERTING 3
6 NON· INVERTING
INPUT
INPUT
' - -_ _ _ _--t"-5 V+
o
r
n.
-0.04 -0.03-0.02 -0.01 0 +0.01 +0.02+0.03+0.04
GAIN ERROR (II)
GROUND PIN 1. OUTPUT AT ~N 8
G=1oo: NO ADDITIONAL CONNECTIONS
G=10' SHORT PIN 2 TO PIN 1, SHORT PIN 7 TO PIN 8
13-36
Specifications on this datasheet are preliminary only. and subject to
change without notlos. Contact ths manufacturer before finalizing adesign
using this part.
LTllOl
ABSOLUTE mAXimum RATinGS
PACKAGE/ORDER InFORmATion
Supply Voltage ................................... ± 22V
Differential Input Voltage ......................... ± 36V
Input Voltage .......... Equal to Positive Supply Voltage
....... 10V Below Negative Supply Voltage
Output Short Circuit Duration .................. Indefinite
Operating Temperature Range
LT1101AM/LT1101 M................... - 55°C to 125°C
LT1101AilLT11011 ...................... -40°Cto85°C
LT1101AC/LT1101C ....................... O°C to 70°C
Storage Temperature Range
All Grades ........................... - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) .............. 300°C
ORDER PART
NUMBER
TOP VIEW
OUTPUT
LT1101AMH
LT1101MH
LT1101ACH
LT1101CH
REF 2
G=10
4
V-(CASE)
H PACKAGE
HEAD TO-5 METAL CAN
TOP VIEW
LT1101AIN8
LT11011N8
LT1101ACN8
LT1101CN8
LT1101AMJ8
LT1101MJ8
LT1101ACJ8
LT1101CJ8
GROUND 1
(REF)
7
OUT
G=10
NPACKAGE
8-LEAD PLASTIC DIP
J PACKAGE
HEAO CERAM IC DIP
ELECTRICAL CHARACTERISTICS
Vs =5V, ov, VCM =o.w, VREF(PIN 1) =D.W, G=10 or 100, TA =25°C, unless otherwise noted (Note 3).
SYMBOL
GE
PARAMETER
Gain Error
GNL
Gain Non·Linearity
Vos
los
18
Is
CMRR
Input Offset Voltage
Input Offset Current
Input Bias Current
Supply Current
Common·Mode
Rejection Ratio
Va
BW
SR
Minimum Supply Voltage
Maximum Output
Voltage Swing
Bandwidth
Slew Rate
CONDITIONS
G= 100, Vo = 0.1V to 3.5V, RL =50k
G= 10, Va = 0.1V to 3.5V, RL =50k
G= 100, RL=50k
G= 10, RL = 50k (Note 1)
1k Source Imbalance
G= 100, VCM = 0.07V to 3.4V
G=10, VCM=0.07Vt03.1V
(Note 4)
Output High, 50k to GND
Output High, 2k to GND
Output Low, VREF=O, No Load
Output Low, VREF = 0, 2k to GND
Output Low, VREF=O, ISINK= 100~
G= 100 (Note 1)
G= 10 (Note 1)
(Note 1)
LT1101AM/AI/AC
MIN TYP
MAX
0.010 0.050
0.009 0.040
20
60
3
7
50
160
0.13
0.60
6
8
75
105
95
84
4.1
3.5
2.0
22
0.04
106
100
1.8
4.3
3.9
3.3
0.5
90
3.0
33
0.07
MIN
92
82
2.3
4.1
3.5
6
1
130
2.0
22
0.04
LT1101M/I/C
TYP
MAX
0.011
0.075
0.060
0.010
20
75
3
8
60
220
0.15
0.90
6
10
78
120
105
99
1.8
4.3
3.9
3.3
0.5
90
3.0
33
0.07
2.3
6
1
130
UNITS
%
%
ppm
ppm
~V
nA
nA
~
dB
dB
V
V
V
mV
mV
mV
kHz
kHz
V/~s
13-37
LTllOl
ELECTRICAL CHARACTERISTICS
Vs = ± 15V, VCM =ov, TA =25°C, Gain =10 or 100, unless otherwise noted.
SYMBOL
GE
PARAMETER
Gain Error
GNL
Gain Non·Linearity
Vos
los
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Resistance
Common·Mode
Differential Mode
Input Noise Voltage
Input Noise Voltage
Density
Input Noise Current
Input Noise Current
Density
Input Voltage Range
18
en
in
CONDITIONS
G=100, Vo= ± 10V, RL =50k
G=l00, Vo= ± 10V, RL =2k
G=10,Vo= ±10V,RL=50kor2k
G=100,R L=50k
G=100,RL=2k
G= 10, RL =50k or2k
(Note 1)
(Note 1)
O.lHzto 10Hz (Note 2)
fo = 10Hz (Note 2)
fo = 1000Hz (Note 2)
0.1Hzto 10Hz (Note 2)
fo = 10Hz (Note 2)
fo=1000Hz
G=100
G=10
CMRR
Common· Mode
Rejection Ratio
BW
Power Supply
Rejection Ratio
Supply Current
Maximum Output
Voltage Swing
Bandwidth
SR
Slew Rate
PSRR
Is
Vo
1k Source Imbalance
G= 100, Over CM Range
G= 10, Over CM Range
Vs= +2.2V, -O.1Vto ± 18V
RL =50k
RL =2k
G= 100 (Note 1)
G= 10 (Note 1)
Note 1: This parameter is not tested. It is guaranteed by deSign and by
inference from other tests.
Note 2: This parameter is tested on a sample basis only.
Note 3: These test conditions are equivalentto Vs = 4.9V, - 0.1V, VCM = OV,
VREF(PIN 1) =OV.
Note 4: Minimum supply voltage is guaranteed by the power supply
rejection test. The LT1101 actually works at 1.8V supply with minimal
degradation in performance.
13-38
LT1101AM/AI/AC
MIN
TYP MAX
0.008 0.040
0.011 0.055
0.008 0.040
7
16
24
45
3
8
160
50
0.13 0.60
6
8
4
7
+13.0
-14.4
+11.5
-13.0
7
12
0.9
45
43
2.3
0.06
0.02
+13.8
-14.7
+12.5
-13.3
100
84
102
112
100
114
±13.0
±11.0
2.3
25
0.06
92
±14.2
±13.2
3.5
37
0.10
MIN
LTll01M/I/C
TYP
0.009
0.012
0.009
8
25
3
60
0.15
6
3
5
MAX
0.060
0.070
0.060
20
60
9
220
0.90
10
UNITS
%
%
%
ppm
ppm
ppm
pV
nA
nA
+13.0
-14.4
+11.5
-13.0
7
12
0.9
45
43
2.3
0.06
0.02
+13.8
-14.7
+12.5
-13.3
GO
GO
pVp·p
nV/~z
nV/~z
pAp·p
pA/~z
pA/v'Hz
V
V
V
V
98
82
100
112
99
114
dB
dB
dB
±13.0
±11.0
2.3
25
0.06
94
±14.2
±13.2
3.5
37
0.10
1.8
64
54
4.0
0.10
130
150
pA
V
V
kHz
kHz
Vips
LTllOl
ELECTRICAL CHARACTERISTICS
Vs = :!: 15V, VCM =OV, Gain =10 or 100, - 55°CsTAS125°C for AliI grades,
SYMBOL
GE
PARAMETER
Gain Error
TCGE
Gain Error Drift
(Note 1)
GNL
Gain Non·Linearlty
Vos
4Vw4T
los
41W4T
Is
41s14T
CMRR
PSRR
Is
Vo
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Offset Current Drift
Input Bias Current
Input Bias Current Drift
Common-Mode
Rejection Ratio
Power Supply
Rejection Ratio
Supply Current
Maximum Output
Voltage Swing
CONDITIONS
G= 100, Vo= ±10V, RL =50k
G= 100, Vo= ±10V, RL =5k
G= 10, Vo= ± 10V, RL = 50kor5k
G=100,RL=50k
G= 100, RL = 5k
G= 10, RL =50kor5k
G=100,RL=50k
G=100, RL=5k
G= 10, RL=50k
G=10, RL=5k
(Note 1)
(Note 1)
(Note 1)
G= 100, VCM = -14.4V to 13V
G=10, VCM= -13Vt011.5V
Vs= +3.0, -O.Wto ±18V
RL=50k
RL=5k
- 40°C STAS85°C for Alii grades, unless otherwise noted.
LT1101AM/AI
MIN
TYP MAX
0.024 0.070
0.030 0.100
0.015 0.070
2
4
7
2
1
4
24
70
70
300
4
13
10
40
350
90
0.4
2.0
0.16 0.80
4.0
0.5
7
10
10
25
111
96
80
99
110
98
±12.5
±11.0
105
±14.0
±13.5
94
78
94
LT1101Mft
TYP
0.026
0.035
0.018
2
2
1
26
75
5
12
110
0.5
0.19
0.8
7
10
111
98
110
±12.5
±11.0
108
1014.0
1013.5
MIN
165
MAX
0.100
0.130
0.100
5
8
5
90
500
15
60
500
2.8
1.30
7.0
12
30
190
UNITS
%
%
%
ppm/oC
ppm/oC
ppm/oC
ppm
ppm
ppm
ppm
~V
~VloC
nA
pAloC
nA
pAloC
dB
dB
dB
~
V
V
ELECTRICAL CHARACTERISTICS
Vs = :!: 15V, VCM =OV, Gain =10 or 100, DoC sTAs 70°C, unless otherwise noted.
SYMBOL
GE
PARAMETER
Gain Error
TCG E
Gain Error Drift
(Note 1)
GNL
Gain Non-Linearity
Vos
4VW4T
los
41os14T
Is
41s14T
CMRR
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Offset Current Drift
Input Bias Current
Input Bias Current Drift
Common-Mode
Rejection Ratio
Power Supply
Rejection Ratio
Supply Current
Maximum Output
Voltage Swing
PSRR
Is
Vo
CONDITIONS
G= 100, Vo= 1010V, RL =50k
G= 100, Vo= 1010V, RL=2k
G= 10, Vo= 10 10V, RL =50kor2k
G= 100, RL =50k
G=100,RL=2k
G= 10, RL = 50k or 2k
G= 100, RL =50k
G=100,RL=2k
G= 10, RL = 50k or 2k
(Note 1)
(Note 1)
(Note 1)
G= 100, VCM = -14.4V to 13V
G=10, VCM = -13Vt011.5V
Vs=2.5, -O.Wto ±18V
LT1101AC
TYP
0.012
0.018
0.009
1
2
1
9
33
4
70
0.4
0.14
0.5
6
10
112
98
82
100
112
100
MIN
98
RL=50k
RL=2k
±12.5
±10.5
±14.1
1013.0
MAX
0.055
0.085
0.055
4
7
4
25
75
10
250
2.0
0.70
4.0
9
25
MIN
96
80
97
148
1012.5
1010.5
LT1101C
TYP MAX
0.014 0.080
0.020 0.100
0.010 0.080
1
5
2
9
5
1
10
35
36
100
4
11
85
350
0.5
2.8
0.17 1.10
0.8
7.0
11
6
10
30
112
99
112
100
±14.1
±13.0
170
UNITS
%
%
%
ppm/oC
ppm/oC
ppm/oC
ppm
ppm
ppm
~V
~VloC
nA
pAloC
nA
pAloC
dB
dB
dB
~
V
V
13-39
lEI
LTllOl
ELECTRICAL CHARACTERISTICS
Vs=5V, OV, VCM =0.1V, VREF(PIN 1)=0.1V, Gain=10or100, - 55°CsTAS125°C for AM/M grades, -4O'CsTAs85°Cfor AlII grades,
unless otherwise noted.
SYMBOL
GE
PARAMETER
Gain Error
TCGE
GNL
Gain Error Drift
Gain Non·Llnearlty
Vas
AVO'IIAT
Input Offset Voltage
Input Offset Voltage
Drift
Input Offset Current
Input Offset Current
Drift
Input Bias Current
Input Bias Current
Drift
Common-Mode
Rejection Ratio
Supply Current
Maximum Output
Voltage Swing
las
AIO'IIAT
18
Ala/AT
CMRR
Is
Vo
CONDITIONS
G=loo, Vo = 0.1V to 3.5V, RL=50k
G= 10, VCM = 0.15, RL =50k
RL = 50k (Note 1)
G=loo,RL=50k
G= 10, RL = 50k (Note 1)
MIN
(Note 1)
LT110lAM/AI
TYP
MAX
0.026 0.080
0.011 0.070
1
4
45
110
4
13
90
350
0.4
2.0
MIN
LT1101MII
TYP
MAX
0.028 0.120
0.014 0.100
1
5
48
140
5
15
110
500
0.5
2.8
UNITS
%
%
ppm/oC
ppm
ppm
~V
~V/oC
(Note 1)
0.16
0.5
0.80
4.0
0.19
0.8
1.30
7.0
nA
pAJoC
(Note 1)
7
10
10
25
7
10
12
30
nA
pAJoC
G=100, VCM = 0.1V to 3.2V
G= 10, VCM=0.IVt02.9V, VREF=0.15V
91
80
Output High, 50k to GND
Output High, 2k to GND
Output Low, VREF=O, No Load
Output Low, VREF = 0, 2k to GND
Output Low, VREF = 0, ISINK = lOO~
3.8
3.0
105
98
88
4.1
3.7
4.5
0.7
125
88
77
135
3.8
3.0
8
1.5
170
104
97
92
4.1
3.7
4.5
0.7
125
dB
dB
160
~
8
1.5
170
V
V
mV
mV
mV
ELECTRICAL CHARACTERISTICS
Vs = 5V,
ov, VCM = 0.1V, VREF(PIN 1) = 0.1V, Gain = 10 or 100, OOC sTAs 70°C, unless otherwise noted.
SYMBOL
GE
PARAMETER
Gain Error
TCGE
GNL
Gain Error Drift
Gain Non-Linearity
Vas
AVO'IIAT
Input Offset Voltage
Input Offset Voltage
Drift
Input Offset Current
Input Offset Current
Drift
Input Bias Current
Input Bias Current
Drift
Common-Mode
Rejection Retio
Supply Current
Maximum Output
Voltage Swing
las
AIO'IIAT
18
Ala/AT
CMRR
Is
Vo
13-40
CONDITIONS
G=loo, Vo=O.1Vto 3.5V, RL =50k
G=10, VCM =0.15V, RL =50k
RL = 50k (Note 1)
G=loo, RL=5Ok
G= 10, RL = 50k (Note 1)
MIN
(Note 1)
LT1101AC
TYP
MAX
0.017 0.065
0.010 0.060
1
4
25
80
4
10
70
250
0.4
2.0
MIN
LT1101C
TYP
0.018
0.012
1
25
4
0.5
MAX
0.095
0.080
5
100
11
350
2.8
85
UNITS
%
%
ppm/oC
ppm
ppm
~V
~V/oC
(Note 1)
0.14
0.5
0.70
4.0
0.17
0.8
1.10
7.0
nA
pAJoC
(Note I)
6
10
9
25
6
10
11
30
nA
pAJoC
G= 100, VCM = 0.07V to 3.3V
G= 10, VCM=0.07Vt03.0V, VREF=0.15V
Output High, 50k to GND
Output High, 2k to GND
Output Low, VREF = 0, No Load
Output Low, VREF=O, 2ktoGND
Output Low, VREF=O, ISINK=loo~
93
105
90
104
82
99
80
98
85
4.0
3.3
4.2
3.8
4
0.6
100
4.0
3.3
80
4.2
3.8
4
0.6
100
120
7
1.2
150
dB
dB
145
~
7
1.2
150
V
V
mV
mV
mV
LTllOl
TYPICAL PERFORmAnCE CHARACTERISTICS
Gain = 100 Non-Linearity
Distribution
30
~
Z
TA=25'C
RL,,50k!l
J
20
708 UNITS
_
TESTED IN
ALL PACKAGES
=>
u.
!z
i
-
40
~
Z
=>
o
o
I
L
2
708 UNITS
TESTED IN
ALL PACKAGES
It
r-
i
ffi
o
l
z
z
10
o
~ 200
~
=>
80
~
~
~
70
60
25
50
75
TEMPERATURE (OC)
is'
Y
100
-200
125
100
125
l
-25
200
J
,../
-2
TA--55°C
TA 25'C
-50
l
-100
0
100
INPUT OFFSET VOLTAGE (~V)
Input Bias Current vs CommonMode Voltage
\
/'"
TA=125°C
lEI
_IB
-10
I'D -7
25
50
75
TEMPERATURE (OC)
1
r'""'
(j)
~
0
I
10
Vs=5V,OV
los
-- -
r--
1I
20
~ 100
V ",,/
V '"
1M
>-
VS=5V, OVTO ±15V
150
lOOk
0
til
/ ' ~-5V,~V
50
-50 -25
0
a
J
Vs=±15V
<.:>
-25
lk
10k
FREQUENCY (Hz)
~
u.
Input Bias and Offset Currents vs
Temperature
>-
~
@)j
V V '"
V j
~
~f
L
-50
1~
110
,I
V V
«
Supply Current vs Temperature
>-
~
20
O~-L_~~_~_L--L~
100
J
/
30
z
100
TA=25'C
746 UNITS MEASURED IN ALL PACKAGES
EACH UNIT MEASURED AT Vs=5V,
OVANDATVs=±15V
30
=>
'"c;'j
'"
100
(J)/
V@
40
Z
0
~
50
~
TEMPERATURE ('C)
10
Input Offset Voltage Distribution
SE~
~
0
~~-+~~~~~~~
-~
10
10
,\
-1.5
2
4
6
8
GAIN NON-LINEARITY (PPM)
GAIN Ivs T 1
50 r-FOR DEFINITIONS
:::;
90
1
60
~0.02
-50
r--
-10
Gain Non-Linearity Over
Temperature
G=100, VS= ±15V, RL =2k
2 G=10, Vs=±15V, RL=2k
G=100, VS= ±15V, RL =5k
4 G=100, VS=5V, OV, RL =50k
5 G=100, Vs= ± 15V, RL =50k
G=10, VS= ±15V, RL =5k
7 G=10,VS=±15VOR5V,OV,-@
RL =5Ok _.--+_+---+---."¥~
20
...
-0.5
Gain Error Over Temperature
1E
G=10
~
o
18
30
1\
o
'"
z
10
40
-05
~-10
ffi-1.5
~
16
IJll~IJJv
TA=25'C
20
<.:>
4
6
8 10 12 14
GAIN NON-LINEARITY (PPM)
G~llIJ~
,
30
ffi
tl
Lh
r
><
~0.03
~15V_
0
10
0.04
Gain vs Frequency
Vs=
TA=25'C
RL,,2k!l -
r--
u.
15
o
50
V~=~15V ~
, ,
r r-,.
25
Gain = 10 Non-Linearity
Distribution
0
25
50
75
TEMPERATURE (OC)
100
125
-12
-1
o
1
2
3
COMMON-MODE VOLTAGE (V)
13-41
LTllOl
TYPICIl PERFORmAnCE CHIRlaERISTICS
Common·Mode Rejection Ratio vs
Frequency
120
V+
...... 6=100
~6=10ii'.. C=82pF PIN 1 TO PIN 2
6=10
~
~ V+-2
\
'\
o
0.1
10
100
lk
FREQUENCY (Hz)
w
8
,
lDk
V+-3
6~:7f'1---'"
ALL
,...... i---'""
"
...... 6=}00
.... =>
i~
a!::
+1~~oC
Y- +1
100
0.01
125
I
~
\
-H
V
\
~
>
.,; 20
z
~
....
60
~
6=100
=>
0
II
0.1
13-42
V
1
10
CAPACITIVE LOAD (nF)
Vs=SV.OY.
RL;;,;1j
10
~ - JS="'15~
""
V
20
o
30
~
G=10
i1ii 40
0.1
1
10
SOURCING OR SINKING LOAD CURRENT (mA)
Undlstorted Output Swing vs
Frequency
Capacitive Load Handling
S.
lL~
Y25
50
75
TEMPERATURE (OC)
:mtl
'"
~
100
o
100
~
~
e-
100
/ TA;+25ol:. vs=~v. ov
30
20 ~. -
J
10
\
TA= + 125°C. Ys=5V. OV
\TA=+125°C. vs=",isv
~
'"
-10
TA=+125°C. Vs=",15V
li~
~ ~ -20
'"
~
-30 ~ -
-40
TAj +25°]. Vs=r5V- f--
o
1
2
Output Impedance vs Frequency
./ /
"""
~
- - r- J=l~ 1/ /
V
Ys= ",15Y
RL;;,;100k
V
1\
~
3
TIME FROM OUTPUT SHORT TO GROUND (MINUTES)
TA-2SoC
LOAD. RL. TO GROUND
\
-
TAI= +25 C. Ys=l", 15V
I
Vs=5V.OY. Ri;;';llii
lOOk
lk
10k
FREQUENCY (Hz)
Short Circuit Current vs Time
~]
Vs=5Y.OY
RL =~k TO GimUND
l8D
10
'"
-5SOC
r-
~
o '-
+25°C
+125°C
V+ -1
NO LOAD
';15V
TA=25°C
r-
40
ISINK=l,.,4
V~= 1",12~JJ%
20
Output Voltage Swing vs Load
Current
ISINK 10..A:
100
r-
0",2 ",4 ",6 ",8",10",12",14",16",18
SUPPLY YOLTAGE (V)
ISINK=2mA
SINK=lmA
120
40
-
V-
lOOk
V+
0
,A=25°C
'-
~
rEjpERA~RES
SUPPLY
ATI~
Ul 60 ,-
'"~
a:=>
'"'"
W]IJ
~
r-
~
~
Y-+l
~
r-.
NE6
SUPPLY
0
=!'
~ Y-+2
=
-
8D -
100
r-
z
~1~
55°C
!5°C
lDDD
ISINK=loo,.,4
~
125°C
~.
Output Saturation YS Temperature
vs Sink Current
1
-50 -25
i2
25°C
~
"~
'"
Vs= ",15V
TA=25°C
120
1~5°C
~550k
6=100
V+-l
"-'\ \
Power Supply Rejection Ratio vs
Frequency
Common·Mode Range vs Supply
Voltage
V
V
L
,I
r\
6=10
/
t'---
rlTmil
lk
10k
FREQUENCY (Hz)
10
100
lk
10k
FREQUENCY (Hz)
lOOk
LTllOl
TYPICAL PERFORmAnCE CHARACTERISTICS
Large Signal Transient Response
Noise Spectrum
Warm-Up Drift
1000
Vs
08
",2.5V TO '" 15V
TA 25'C
~
~
~
CURRENT
~OISE
G= 10, Vs=5V, OV
VS=",15V
TA=25'C
WARM UP DRIFT
AT Vs=5V, OV IS
IMMEASURABLY LOW
a6
i3
§;
>-
~ 04
VOLTAGE
NOISE
-
lIt CORNER
0.6Hz
o
z
'"'"~
r-.
111111111
10
0.1
10
FREQUENCY (Hz)
0.2
/
'-'
o
100
Large Signal Transient Response
G=10, Vs= :t 15V
200J'SIDIV
NO LOAD
Small Signal Transient Response
G=10,Vs=5V,OV
1000
/'
-
50J'SIDIV
OUTPUT FROM OV TO 4. 5V, NO LOAD
o
TIME AFTER POWER ON (MINUTES)
Large Signal Transient Response
G=100,Vs=:t15V
200J'SIDIV
NO LOAD
Small Signal Transient Response
G=10,Vs=:t15V
Large Signal Transient Response
G= 100, Vs=5V, OV
100J'SIDIV
OUTPUT FROM OV TO 4.5V, NO LOAD
Small Signal Transient Response
G= 100, Vs=5V, OV
lEI
20J'SIDIV
OUTPUT FROM 0.05V TO 0.15V, NO LOAD
200J'SIDIV
OUTPUT FROM 0 05V TO 0.15V, NO LOAD
(RESPONSE WITH Vs= '" 15V, G=100 IS IDENTICAL)
13-43
LTllOl
TYPICAL PERFORmAnCE CHARACTERISTICS
Single Supply: Minimum
Common-Mode Voltage vs Output
Voltage
120
~ 100
~
80
i!:l
is
1/
60
::;;
8 40 1M (/
::E
::>
~
/./'I-""
"
I::
§!
Single Supply: Minimum Output
Voltage vs Common-Mode
Voltllge
~V
/
L
~
MINIMUM
I-OUTPUT SWING"""' ~UPPLY VOLTAGE-
=1' 2.0
8
G-10
ll:
~~M SUPPLY
r-... 1'-,.,.
r-- ......
1.0
::i 0.5
COMMON-MOOE RANGE
AT MJ.NIMU~ SUPP~Y
ill
::;;
10 20 30 40 50 60 70 60 90 100
MINIMUM OUTPUT VOLTAGE (mV)
1.5
~
o
~~ i0oiii j!!ii=r--'
o0
is
g
~
V //
~~
...........
Jl
125'C
v =OV
~
g
::E
::;;
/ / /
-55''1
w
§g 2.5
11J25'C
j
'/
1 /
111.'1
G=1oo
II
L
I
Minimum Supply Voltage vs
Temperature
~
~
~
0
-50
-25
0
r-
-- -
25
50
75
TEMPERATURE ('C)
~
100
125
APPLICATions InFORmATion
Single Supply Applications
The LT1101 is the first instrumentation amplifier which is
fully specified for single supply operation, i.e. when the
negative supply is OV. Both the input common-mode range
and the output swing are within afew millivolts of ground.
Probably the most common application for instrumentation amplifiers is amplifying a differential signal from a
transducer or sensor resistance bridge. All competitive instrumentation amplifiers have· a minimum required common-mode voltage which is 3V to 5V above the negative
supply. This means that the voltage across the bridge has
to be 6V to 10V or dual supplies have to be used, i.e. micropower, single battery usage is not attainable on competitive devices.
The minimum output voltage obtainable on the LT1101 is a
function of the input· common-mode voltage. When the
common-mode voltage is high and the output is low, current will flow from the output of amplifier Ainto the output
of amplifier B. See the Minimum Output Voltage vs Common-Mode Voltage plot.
Similarly, the Minimum Common-Mode Voltage vs Output
Voltage plot specifies the expected common-mode range.
13-44
When the output is high and input common-mode is low,
the output of amplifier A has to sink current coming from
the output of amplifier B. Since amplifier Ais effectively in
unity gain, its input is limited by its output.
Common-Mode Rejection vs Frequency
The common-mode rejection ratio (CMRR) of the LT1101
starts to roll off at a relatively low frequency. However, as
shown on the CMRR vs Frequency plot, CMRR can be enhanced significantly by connecting an 82pF capacitor between pins 1and 2. This improvement is only available in
the gain 100 configuration, and it is in excess of 30dB at
60Hz.
Offset Nulling
The LT1101 is not equipped with dedicated offset null
terminals. In many bridge transducer or sensor applications, calibrating the bridge Simultaneously eliminates the
instrumentation amplifier's offset as asource of error. For
example, in the Micropower Remote Temperature Sensor
Application shown, one adjustment removes the offset errors due to the temperature sensor, voltage reference and
the LT1101.
LTllOl
APPLICATions InFoRmATion
Asimple resistive offset adjust procedure is shown below.
If R= 50 for G= 10, and R=500 for G= 100 then the effect
of Ron gain error is approximately 0.006%. Unfortunately,
about 450l'A has to flow through Rto bias the reference
terminal (pin 1) and to null out the worst·case offset volt·
age. The total current through the resistor network can ex·
ceed 1mA, and the micropower advantage of the LT1101 is
lost.
+15V
10k
OUT
Gains Between 10 and 100
Gains between 10 and 100 can be achieved by connecting
two equal resistors (= Rx) between pins 1and 2and pins 7
and 8.
Gain=10+
Rx
R+Rx/90
The nominal value of R is 9.2kO. The usefulness of this
method is limited by the fact that R is not controlled to
better than ± 10% absolute accuracy in production. How·
ever, on any specific unit 90R can be measured between
pins 1and 2.
10k
+--"""'-~20k
Input Protection
10k
-15V
Another offset adjust scheme uses the LT10n micropower op amp to drive the reference pin 1. Gain error and
common-mode rejection are unaffected, the total current
increase is 45JLA. The offset of the LT10n is trimmed and
amplified to match and cancel the offset voltage of the
LT1101. Output offset null range is ± 25mV.
r - - - - - - . . . - . . . . - - 1 . 2 V T O 18V
100k
Instrumentation amplifiers are. often used in harsh environments where overload conditions can occur. The
LT1101 employs PNP input transistors, consequeltly the
differential input voltage can be ± 30V (with ± 15V supplies, ± 36V with ± 18V supplies) without an increase in in·
put bias current. Competitive instrumentation amplifiers
have NPN inputs which are protected by back to back
diodes. When the differential input voltage exceeds
± 1.3V on these competitive devices, input current increases to the milliampere level; more than ± 10V differen·
tial voltage can cause permanent damage.
When the LT1101's inputs are pulled above the positive
supply, the inputs will clamp a diode voltage above the
positive supply. No damage will occur if the input current
is limited to 20mA.
5000 resistors in series with the inputs protectthe LT1101
when the inputs are pulled as much as 10V below the
negative supply.
-1.2VTO -18V
13-45
LTllOl
APPLICATions InFoRmATion
Micropower, Battery Operated, Remote Temperature Sensor
3V
REMOTE TEMP ___
SENSOR
~--+-------------~
75k
LT1004-1.2
75k
22101l
.".
621l
2k
POT
100nA
Oi<
OUT
20k
10k
.".
TRIM UTPUT TO 250mV AT 25'C
TEMPERATURE RANGE=2 5'C TO 15O'C
ACCURACY = ±O.5'C
Differential Voltage Amplification from aResistance Bridge
V+
OUT
MINIMUM VOLTAGE ACROSS BRIDGE=20mV
MINIMUM SUPPLY VOLTAGE=1.8V
13-46
JTunm>
_,
TECHNOLOGY
LTllOl
APPLICATions InFoRmATion
Instrumentation Amplifier with ± 150mA Output Current
V+= +15V -
.....- - - - - - - - - - - - - ,
2k
>-_-OUT
GAIN=10, DEGRADED BY 0.01% DUE TO LT10lO
OUTPUT = ± lOV INTO 750 (TO 1.5kHz)
DRIVES ANY CAPACITIVE LOAD
SINGLE SUPPLY APPLICATION (V + =5V, V- =OV):
VOUTMIN=120mV, VOUTMAX=3.4V
Differential Input - Differential Output Instrumentation Amplifier
IN
GAIN =200, AS SHOWN
GAIN =20, SHORT PIN 1 TO PIN 2, PIN lTD PIN 8
ON BOTH DEVICES
GAIN=110, SHORT PIN 1 TO PIN 2, PIN lTD PIN 8
ON ONE DEVICE, NOT ON THE OTHER
lEI
13-47
~[rurn[sD[M]DOO&[ruW
~7YD~~H-i9-h-S-p-e-e-d/-p-re-C-is-iO-n-'-JF-E-~-~n-l~-~-~
Instrumentation Amplifier (Fixed Gain =10' or 100)
May 1989
FEATURES
DESCRIPTion
3fLS
25V/fLS
30MHz
0.05% Max
5ppm/oC
10ppm Max
500fLVMax
2.5fLV/ oC
50pAMax
40pAMax
1pA/oC
•
•
•
•
•
•
•
Settling Time (0.01 %)
Slew Rate
Gain·Bandwidth Product
Gain Error
Gain Drift
Gain Non·Linearity
Offset Voltage (Input +Output)
Drift with Temperature
• Input Bias Current
• Input Offset Current
Drift with Temperature (to 70°C)
• Common·Mode Rejection Ratio
G=100
G=10
100dB
94dB
The LT1102 is the first fast FET input instrumentation am·
plifier offered in the low cost, space saving a-pin
packages. Fixed gains of 10 and 100 are provided with excellent gain accuracy (0.015%) and non-linearity (2ppm).
No external gain setting resistor is required.
The fastest slew rate of any instrumentation amplifier is
combined with impressive precision specifications: less
than 10pA input bias and offset currents, 200fLVoffset voltage. Unlike other FET input instrumentation amplifiers, on
the LT1102 there is no output offset voltage contribution
to total error, and input bias currents do not double with
every WC rise in temperature. Indeed, at 70°C ambient
temperature the input bias current is only 50pA.
APPLICATions
• Fast Settling Analog Signal Processing
• Multiplexed Input Data Acquisition Systems
• High Source Impedance Signal Amplification from High
Resistance Bridges, Capacitance Sensors, Photodetec·
tor Sensors
• Bridge Amplifier with <1Hz Lowpass Filtering
BLOCK DIAGRAm
~
GROUND 1
(REF)
90R
_ _ _-+!-8 OUTPUT
goR
7 SHORTTO 8, G=10
N.C. G=100
SHORT TO 1, G=10 2
N.C. G=100
9R
9R
6 NON-INVERTING
INPUT
INVERTING 3
INPUT
V- ..;.41------l
L..-_ _ _ _ _.....j.::..5 V+
GROUND PIN 1, OUTPUT AT PIN 8
G= 100: NO ADDITIONAL CONNECTIONS
G= 10: SHORT PIN 2 TO PIN 1, SHORT PIN 7T0 PIN 8
13-48
Specifications on this datasheet are preliminary only, and subject to
change without notlce_ Contact the manufacturer before finalizing adesign
:!e!~; !~!e ~:~.
JTUntfQ
~,
I~Y
~~~[bO[}¥{]OOO&~W
~-Y--Llnlt\l2
~~
LTC1l50
TECHNOLOGY~----+-1-5-V-C-h-o-p-p-e-rS-t-a-b-iliz-e-d
Operational Amplifier with
Internal Capacitors
June 1989
FEATURES
DESCRIPTion
•
•
•
•
•
•
•
•
•
•
•
•
•
The LTC1150 is a high-voltage, high-performance chopper
stabilized operational amplifier. The two sample-and-hold
capacitors usually required externally by other chopper
amplifiers are integrated on-chip. Further, the LTC's proprietary high-voltage CMOS structures allow the LTC1150 to
operate at up to 36V total supply voltage.
High Voltage Operation, ± 1SV
No External Components Required
Maximum Offset Voltage 5/LV
Maximum Offset Voltage Drift 0.05/LV/oC
Low NOise, l.S/LVp-p (0.1 Hz to 10Hz)
Minimum Voltage Gain 140dB
Minimum PSRR 130dB
Minimum CMRR 120dB
Low Supply Current O.SmA
Single Supply Operation 4.75V to 36V
Input Common Mode Range Includes Ground
200/LA Supply Current with Pin 1Grounded
Typical Overload Recovery Time 20ms
The LTC1150 has an offset voltage of 0.5/LV, drift of 0.01/LV/oC,
0.1Hz to 10Hz input noise voltage of l.S/LVp-p and a typical
voltage gain of 180dB. The slew rate of 3V//Ls and a gain
bandwidth product of 2.5MHz are achieved with O.SmA of
supply current. Overload recovery times from positive and
negative saturation conditions are 3ms and 20ms,
respectively.
For applications demanding low power consumption, pin 1
can be used to program the supply current. Pin 5 is an optional AC-coupled clock input, useful for synchronization.
APPLICATions
•
•
•
•
•
Strain Gauge Amplifiers
Electronic Scales
Medical Instrumentation
Thermocouple Amplifiers
High Resolution Data ACQuisition
The LTC1150 is available in standard S-pin metal can, plastic and ceramic dual in line packages as well as an S-pln
SOS package. The LTC1150 can be a plug-in replacement
for most standard bipolar op amps with significant improvement in DC performance.
TYPICAL APPLICATiOn
Single Supply Instrumentation Amplifier
1k
1M
V+
V+
m
1k
Your
'::'
OUTPUT OFFSET s 5mV
TOTAL SUPPLY CURRENT DECREASES
TO 400"A WHEN BOTH PIN 1's
ARE GROUNDED
Specifications on this datasheet are preliminary only, and subject to
change without notice. Contact the manufacturer before finalizing adesign
using this part.
13-49
LTCl150
A8SOLUTE mAXimum RATInGS
(Note 1)
Total Supply Voltage (V+ to V-) ..................... 36V
Input Voltage ...................(V+ +0.3V) to (V- -0.3V)
Output Short Circuit Duration ................. .Indefinite
Burn·ln Voltage ..................................... 30V
Operating Temperature Range
LTC1150M ............................ -55°Cto 125°C
LTC1150C ............................. - 40°C to 85°C
Storage Temperature Range ............. - 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ..............300oC
PACKAGE/ORDER InFORmAnOn
TOP VIEW
ORDER PART
NUMBER
TOP VIEW
CLOCK OUT
ORDER PART
NUMBER
LTC1150MH
LTC1150CH
LTC1150MJ
LTC1150CJ
LTC1150CN
VH PACKAGE
a-LEAD TO-S METAL CAN
J PACKAGE
14-LEAD CERAMIC DIP
TOP VIEW
TOP VIEW
ISUPPLY O a CLOCK OUT
-IN 2
7 V+
+IN 3
V- 4
6 OUT
LTC1150MJ8
LTC1150CJ8
LTC1150CN8
LTC1150CS8
ISUPPLY 1
_ _ _ _....I S
S EXT" CLOCK
IN
J PACKAGE
a-LEAD CERAMIC DIP
N PACKAGE
14-LEAD PLASTIC DIP
N PACKAGE
a-LEAD PLASTIC DIP
IN CLOCK
EXT
so PACKAGE
a-LEAD PLASTIC SOIC
ELEnRICAL CHARACTERISTICS
=
=
=
Vs :!: 15V, Pin 1 Open, TA Operating Temperature Range, Unless OthelWise Specified.
PARAMETER
Input Offset Voltage
Average Input Offset Drift
Long Term Offset Voltage Drift
Input Offset Current
CONDITIONS
TA= 25°C (Note 3)
(Note 3)
Input Bias Current
TA = 25°C
Input Noise Voltage
As = 1000, 0.1 Hz to 10Hz, TC2
As = 1000, 0.1 Hz to 1Hz, TC2
Input Noise Current
Common Mode Rejection Ratio
f= 10Hz (Note 4)
VCM=V-t012V
13-50
TA = 25°C
MIN
•
•
•
•
120
LTC1150M
TYP
MAX
:1:0.5
:1:5
:l:0.D1 :1:0.05
50
:1:60
:1:20
:1:150
:1:10
:1:30
:1:800
1.8
0.6
2.5
MIN
115
LTC1150C
TYP
MAX
:1:0.5
:1:5
:1:0.01 :1:0.05
50
:1:20
:1:100
:1:150
:1:10
:1:50
:1:100
1.8
0.6
2.5
UNITS
p.V
p.VloC
nVl-lmo
pA
pA
pA
pA
p.Vp·p
p.Vp-p
fANHz
dB
LTCl150
ELECTRICAL CHARACTERISTICS
Vs = :!: 1SV, Pin 1=Open, TA =Operating Temperature Range, Unless Otherwise Specified.
PARAMETER
Power Supply Rejection Ratio
Large Signal Voltage Gain
Maximum Output Voltage Swing
Slew Rate
Gain Bandwidth Product
Supply Current
.CONDITIONS
Vs= ±2.375Vto ±16V
RL = lOki!, Vour= ± 10V
RL = lOki!
TA=25°C
RL = lOki!
RL = 100kO
RL = lOki!, CL= 50pF
No Load
No Load, Pin 1= VNo Load
•
•
•
TA=25°C
TA = 25°C
•
Internal Sampling Frequency
LTCll50M
MIN
TYP
MAX
130
145
140
180
±13.8 ±14.5
±11.3
±14.95
3
2.5
0.8
1.2
0.2
1.8
550
LTCll50C
MIN
TYP
125
145
140
180
±13.8 ±14.5
±12.3
±14.95
3
2.5
0.8
0.2
MAX
1.2
1.8
550
UNITS
dB
dB
V
V
V
VIps
MHz
mA
mA
mA
Hz
ELECTRICAL CHARACTERISTICS
Vs =SV, Pin 1=Open, TA=Operating Temperature Range, Unless Otherwise Specified.
PARAMETER
Input Offset Voltage
Average Input Ollset Drift
Long Term Offset Voltage Drift
Input Offset Current
TA = 25°C
Input Bias Current
TA = 25°C
Input Noise Voltage
Rs= 1000, O.lHzto 10Hz, TC2
Rs= 1000, 0.1 Hz to 1Hz, TC2
1= 10Hz (Note 4)
VCM=OVto2.7V
Vs= ±2.375Vto ±16V
RL = lOki!, Vour= 0.3Vto 4.5V
RL=10k!l
RL=l00kll
RL = 10kll, CL= 50pF
Input Noise Current
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Maximum Output Voltage Swing
Slew Rate
Gain Bandwidth Product
Supply Current
CONDITIONS
TA= 25°C (Note 3)
(Note 3)
No Load
MIN
•
TA=25°C
Internal Sampling Frequency
The • denotes the specifications which apply over the lull operating
temperature range.
Note 1: Absolute Maximum Ratings are those values beyond which lile of
the device may be Impaired.
Note 2: Connecting any terminal to voltages greater than V+ or less than
V- may cause destructive latch,up.lt Is recommended that no sources operating Irom external supplies be applied prior to power·up olthe LTCll50.
•
•
•
•
•
•
110
130
130
LTCll50M
TYP
MAX
±0.5
±5
±0.01 ±0.05
50
±10
±30
±100
±15
±5
±400
2.0
0.7
1.3
145
180
0.15-4.85
0.02-4.97
1.5
1.8
0.4
MIN
110
125
130
0.65
0.95
300
LTC1150C
TYP
MAX
±0.5
±5
±0.01 ±0.05
50
±10
±60
±100
±5
±30
±100
2.0
0.7
1.3
145
180
0.15-4.85
0.02-4.97
1.5
1.8
0.4
300
0.65
0.95
UNITS
pV
pVloC
nVNmo
pA
pA
pA
pA
pVp-p
pVp-p
IANHz
dB
dB
dB
V
V
Vips
MHz
mA
mA
Hz
Note 3: These parameters are guaranteed by deSign. Thermocouple effects
preclude measurement 01 these voltage levels in high-speed automatic test
systems. Vas is measured to a limit determined by test equipment
capability.
Note 4: Current Noise is calculated from the lormula:
INd(2q.lb)
whereq= 1.6 x 10-19Coulomb.
13-51
~
~
LTCl150
TEST CIRCUITS
Offset Voltage Test Circuit
DC·10Hz Noise Test Circuit
475k
1M
lOOk
0.1#
>'~-1-0UTPUT
vFOR 1Hz NOISE BW INCREASE ALL THE CAPACITORS BY A FACTOR OF 10.
TYPICAL PERFORmAnCE CHARACTERISTICS
Sampling Frequency vs Supply
Voltage
Supply Cunnt vs Supply Voltage
TA=125oC
900
~ BOO
!2'
I--
700
f
ll;!
~800
:::>
;j!j
400
TA=25°C
4
.§.
VOUT-V-
g
r
ISOUR1CE
-
0
~ -3
!5
-
r---
-25
5
35
65
95
AMBIENT TEMPERATURE (0C)
125
Supply Cunnt vs RsET
~ -6
vJUJJ
1000
TA=25°C
~ 800
ffi
u
i'-... r--......
200
-55
36
1200
«
J.
Vs==15V-
500
8
12
16 20 24 28 32
TOTAL SUPPLY VOLTAGE, V+ TO V- (V)
Output Short Circuit Current vs
Supply Voltage
~
700
800
~
il:
iil
4
38
900
ffi
'"
~1000
o
12 16 20
24 2B 32
TOTAL SUPPLY VOLTAGE, V+ TO V- (V)
Sampling Frequency vs
Temperature
li'l
a:!
::;;
----
100
4
fE
1200
;j!j 200
200
is
-
::;;
300
~
TA=1250C
700
~ 600
>-
I
u
f 500
Supply Cunnt vs Temperature
1400
800
1000
a:
"-
~UT=V+
ISINK .........
:::>
~ -9
u
~-12
:t:
~ 600
u
~
......
-... ......
~ 400
v ..
~ 0.8
;:>
is
0.6
'"
~
0.4
>-
3:
U)
-
TJ=-55OC_~_+-\ ~ f.-
>-
~ 1.0
35
~~
~
po
~
~
V V
30
s:
I
3
1
I-+---\--=="""~"-C:-J
~
'-'
~
-
~ 25
::>
I--
,...-
20
~ 15
2
1);
--
;;;
10
0.2
o
o U-_ _L-__
o
0.2
0.4
0.6
0.8
1.0
OUTPUT CURRENT IA)
1.2
1.4
1.6
o
5
L-~~~
10
15
__~__~
20
25
SWITCH VOLTAGE IVcc-VoUT). IV)
30
o
o
10
15
20
25
30
INPUT VOLTAGE IV)
13-57
LTl188
TYPICAL PERFORmAnCE CHARACTERISTICS
Clamp Voltage
Open Circuit Detection Current
Slew Rate
60
-1
«
§.
-2
r-
~
!5
'-'
~ -3
w
~
-4
"
::; -6
u
-7
...... R,...
-8
F=== I:::;; :-- -.:...r-
--
I-
TI -25°C'1
o
0.2
0.4
0.6 0.8 1.0 1.2
CLAMP CURRENT IA)
1.4
-50
-25
0
25
50
75
TEMPERATURE 1°C)
to: 20
=>
'"<3
~
100
~ 8 f---+----+-\.----::::;~:s;::;;ifi=;:;;::;::::j
a
300
~
~
~ 200
~
~
ILOAD = LOA -1-----1----+-----1
0'--__-'-__-'-____'--__-'-__- '
10
5
1~
15
20
SUPPLY VOLTAGE IV)
25
30
Short Circuit Sense Time
75
--
F
w
tD
to:
.=>
u
10
5
15
20
SUPPLY VOLTAGE IV)
Status Reset Time
1.0
2mV) shift in reference voltage occurs when VKA drops
below 3V. Forthis reason, these tests are not performed at VKA = VREF .
13-73
~"""""-LlneJ\l2
~,
Extended Temperature Range
Linear ICs (200°C)
Linear Technology now offers a number of its high performance products fully characterized, tested, and with
specification limits guaranteed over an extended operating temperature range of from - 55°C to +200°C.
The list of extended temperature range products being offered by Linear Technology continues to grow. At the time
this catalog was printed, the company offered for sale the
following products.
LTCMOSTM and CSOATM are trademarks of linear Technology Corporation.
13-74
NEW PRODUCTS
TECHNOLOGY~-----OpAmps:
LT1001XH Precision Op Amp
LT1007XH Low Noise, High Speed Precision Op Amp
LM101AXH Uncompensated General Purpose Op Amp
LM118XH High Slew Rate Op Amp
Precision References:
LM129XH 6.9V Precision Voltage Reference
Comparators:
LM111XH General Purpose Comparator
LM119XH High Speed Dual Comparator
Complete specifications on Linear Technology's 200°C
product offerings can be obtained from your local LTC
sales representative or directly from the factory.
SECTion 14- PACKAGE DimEnSions
14-1
INDEX
SECTION 14-PACKAGE DIMENSIONS
INDEX. .. . . .. . . .. . .. . ... . .. .. . .. ... .. .. . . .. ... ... .... .. ..... ............................................... 14-2
Package Cross Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Package Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
14-2
14-3
14-5
~"""""-Lln'Cf\R
~,
0
FifiiiiiiYW
~~
;
~
(Optional)
~
(0 W
0::0
"IWWW'
;m B
Q
Don
~
0
mil
W
"tIV'lIW'
T0
f----
\;.E>:~o
=W @
o
~
uuu
~'
lID
,~-
c:J
NSC
N
N-8
SIG
N
FSC
T
MOT
Pl
TI
P
SG
M
AMD
P-8
RAYTH
P, NB
PMI
P
Plastic DIP
14,16,18,20,
24, and 28 Lead
TO-220
3 Lead
N
N
N-14
N
P
P2
N
N
P-14
P-16
p,N
P
U
T
NE
NG
KC
T
T
-
P
-
-
-
TO-220
5 Lead
T
T
-
U
-
-
P
-
-
-
Side Brazed Hermetic DIP
8 Lead
D-8
D
I
D
L
-
-
D-8
-
-
Side Brazed Hermetic DIP
14,16,18 and 20 Lead
D
D
I
D
L
-
-
D-14
D-16
D-18
-
TO-92
3 Lead
Z
Z
-
W
P
LP
-
-
-
-
TO-5, TO-39, TO-96
TO-99, TO-l00 and TO-l0l
H
H
-
H
G
H
-
T
H
T
H
H
J
K
Ceramic DIP
8 Lead
J-8
J
J-8
F
R
U
JG
Y
D-8
DE
Z
Ceramic DIP
14,16,18,20,
24, and 28 Lead
TO-3 (Steel)
2 Lead
J
J
J-14
F
D
L
J
J
D-14
D-16
DB
DC
J
0
K
K
Steel
-
K
K
-
K
-
-
-
(Aluminum)
-
K
-
K
K
-
-
-
-
-
TO-3
4 Lead
K
K
-
K
-
-
K
-
-
-
TO-46
3,4Lead
H
H
-
-
-
--
T
-
-
H
J
K
P
-
-
-
-
-
-
-
-
Plastic SO
8Lead
S-8
M
D
-
D
D
-
-
-
-
Plastic SO
14,16Lead
S
M
D
-
D
D
-
-
-
-
YB
08
XB
Y
X
'1
~ ~
0
LTC
N-8
Plastic DIP
8 Lead
W WW
PACKAGE CROSS REFERENCE
TECHNOLOGY~------
=
~
TO-52
3 Lead
TO-3P
3 Lead
\
-
14-3
PACKAGE CROSS REFERENCE
Cl~
~ ~
Q~
LTC
S
NSC
M
SIG
D
FSC
MOT
D
TI
D
SG
AMD
RAYTH
PMI
-
-
-
-
-
Plastic SIP
11 Lead
V
-
-
-
-
-
-
-
-
-
100Lead Cerpac
W
W
H
F
F
W
F
FM
-
RC
NE
SE
pA
MC
TL
SG
AM
RM
RC
OP
REF
CMP
Plastic SOL
16,18,20,24,28 Lead
PROPRI ETARY DEVICE
PREFIXES
14-4
LT
LTC
LF
LH
LM
LP
MF
~""""-Lln'lAR
~,
PACKAGE DIMENSIONS
TECHNOLOGY~----oPackage
8 Lead Sidebrazed
~
8
0020
(0.508)
RAD
0520
(13.208)
~
MAX
7
6
5
r
0298
(7.569)
MAX
I(~!~~)I
IF
REF
~I
A
II
--11----
0.008-0015
(0.203-0381)
oPackage
14 Lead Sidebrazed
f
0296
(7.569)
MAX
t
F9
1::
o.008-0J015
(0.203 - 0.381)
0.300
(7.620)
REF
014188
14-5
PACKAGE DIMENSIONS
oPackage
16 Lead Sidebrazed
0.010
(0.254)
MIN
1
I
0.080
(2.032)
MAX
~~T-~~~~~~~~
0050
(1212)
REF RAD
I"
0.295±0.010
(7.493±0.254)
0.008- 0015
(0203-0381)
0.290-0.320
0.840
(21.336)
MAX
0.050
~I
(1.270)
TYP
0.050
(1.270)
fIT1 ,::,_
±J '::::I~jLj L ;q
I
-----.II-
MIN
0.014-0.023
(0.356-0.584)
(3.180)
MIN
0.100 sse
(2540) sse
(7.366-8.128)
0.040-0.060
(1.016-1524)
016188
oPackage
18 Lead Sidebrazed
0.910
1-------(23.114)--------t
MAX
t
0.298
(7.569)
MAX
t
P9
L r
-
--0300
(7620)
REF
14-6
0125
i3i75i
MIN
0008-0015
(0203-0381)
018188
lTLln~
_""
IC\..KlI'\III..A...l...T
PACKAGE DIMENSIONS
oPackage
20 Lead Sidebrazed
1010
(25654)
MAX
r
0025
0298
{ii63si"
(i569I
RAO
MAX
PIN llDENT
'-r7r-T~-r.T""'T";"T'"'"T7r~rr;;'T""l:;;r'.~
0485
~-I~UU
l -
~
(4191)
(1372)
P9J J
TV,
(:::::::::1
OOOB-0015t
(0203-0381)
0300
~
0020-0060
~_
0100±OOlOj
(2 540±O 254)
(O~~::1528)
'("3'i'7'5;
(762Oj
MIN
REF
HPackage
8Lead TO·5 Metal Can
HPackage
10 Lead TO·5 Metal Can
(~ ;~~O~A~ ;;~)----
0335-0370
....-(8509-9398)---DIA
o O4D
I·{~ ~;=~ ~:)-'I
MAX
SEATING
PLANE,-
0305-0335
0010-0045
(0254-1143)
(1270)
MAX
~
GAUGE"
-------r-PLANE 0500-0750
00 0 OU
II 0016-0021
r
iiOi6i ~j-;;cOO"'50,----T+
0165-0185
(4191-4699)
+.
-
~r
(7747-8509) ....1
0040
iiOi6i ~f-D~O~50~---T+
,I -•
-t-
.-
(~~~~=~ ~!!l
(1270.1905)
----..~(0406-0533)
TV'
MAX
SEATlNG
PLANE
---t-t
0010-0045
(0254-1143)
0165-0185
(4191-4699)
+.
~
REFERENCE
'--'--GA-U-GE----1.:---PLANE
--t-PLANE 0500-0750
00 D OU
(1270.1905)
-JI....- 0016-0-::02::-:,-----~
~
G
(1
/ (: :::=:
(0406-0533)
3S"BSC
NOTE LEAD DIAMETER IS UNCONTROLLED BETWEEN
THE REFERENCE PLANE AND SEATING PLANE
(1270)
MAX
L
I
REFERENCE
PLANE
:::/~
0
TV
'
0
NOTE
1 LEAD DIAMETER IS UNCONTROLLED BElWEEN THE REFERENCE PLANE AND SEATING PLANE
14-7
PACKAGE DIMENSIONS
HPackage
3Lead TO·39 Metal Can
HPackage
4Lead TO·39 Metal Can
r(~ ::=~'~~~)1
D1A
0305-0335
+-__#
(7.747-8.509)
OIA
___-/
I
2.:.Q?2..
(1.2701
MAX
-t--C::;;:;:;:J--.l
~
~______-D
n~
Uu --~11~lJ:31
0016-0019
0029-0040
(0.737-1016)
H4(39l168
H3(39)188
HPackage
3Lead TO·46 Melal Can
0209-0,219
1
J
(12.701
0.080-0100
(2.032-2.540)
MF'lrtl~
0209-0230
(5309- 58421
0.085-0105
(2159-2667)
00151
0.500
HPackage
3·Lead TO·52 Metal Can
0178-0.195
(4521-4953)
---+
Mc:INt~
O00 0.025
0.016-0 019 / '
(0.406-04831
OIA
f
(:;::=:;~11
(5309-5.5371
0015
~(0381)
HPackage
4Lead TO·46 Metal Can
(0.3811
1
---~I
(12~OIMAX
1
MIN
-L
O00 ~
(06351
(0.6351
MAX
0016-0 019 / "
{O 406-0 483)
MAX
OIA
0.050
11.2701
TYP
0.036-0.046
(0.914-1.168)
0036-0.046
(0914-1.168)
H3I52)18B
14-8
PACKAGE DIMENSIONS
J Package
8 Lead Cerdip
0.005
(0.127) - MIN
r
_...QJlill....~
(10.287)
I
MAX
0025
(0.635) 1 8
7
6
5
RADTYP
1
0.220-0.310
(5.588 7.874)
~~~~
10.290-0.320 ....
I~
I[ ''''-. '"
rn=tlm
0.055
(1.397)-
MAX
0.200
(5.080)
MAX
0.015-0.060
mTl(17'
0°-15°
1_(9.779
0.385±0.025 _I
± 0.635)
2
t-
•• H M J i
(0.360-0.660) ~ ~
JL
0.125
3.i75
MIN
0.100±0.010
(2.540 ± 0.254)
0.038-0.068
(0.965 -1.727)
J81B8
JPackage
14 Lead Cerdip
:::l
785
(19.939)
0.
MAX
0.005 ------i~
0.025
MIN
(0.635)
(Ol3i
11
10
9
8
RADTYP
0.220-0.310
(5.588-7.874)
Ll
1~~1~~2~~3~~4~~5~~6~~7~·
0.098-/
I-
'~ ~ ...,,-..""
I
1
-
0.385±0.025_1
(9.779±0.635)-J
0.014_0.026- 1~ ~
-I I--
(0.36-0.66)
.,oo.~~1
(2.540±0.254)
0.038-0.068
(0.965-1.727)
0.200
(5.080)
MAX
0.125
(3.175)
MIN
J14188
14-9
PACKAGE DIMENSIONS
J Package
16 Lead Cerdip
0.005
(013)
MIN
£-(~183~6)=-:I
-t
MAX
1
15
14
13
12
11
10
9
0.220-0.310
(5.588-7.847)
0.025
(0.635)
TYP
~~"""'T"':"T"""1~.....,."......=-,U
12345678
0290-0.320
..Q1QQ.
0.160
~
I'~)
I'.~)
J16188
J Package
18 Lead Cerdip
0.220-0.310
(5.590 -7.870)
0.025
(0.635)
RAO
~~~~~~~~
0.290-0.320
~
1(7365-8128):i-S4)
I[
.1lj
I
---... j.- oo-15'
I
0.385±0.025
-
0.008-0.018
--I~\-o!-"'(0c.::.2"'03'----"0"'-.46""0)
!+- (9.779 ± 0.635)
---.J
0038-0.068
(0.965 1.727)\
..-
I
::r.
0.200
(5.080)
MAX
I
~'.H.~
520)
90'±4'
TYP
I
~J ~ W
(2490)
MAX
--.JI---
0.100± 0.010
(2.540 ± 0 254)
0.014-0.026
(0.360-0.660)
0.125
(3.175)
MIN
J18188
14-10
PACKAGE DIMENSIONS
JPackage
20 Lead Cerdip
---------(2~0:2~)--------1°1
MAX
t
0220-0310
(5.588-7.874)
0025
(0635)
RADTVP
~
1
j
2
\
0.005
1--(0127)
MIN
0160
GLASS
(4064)
--.l
SEA
aN
MAX T
~0200
(5080)
0015-0060
(0381-1524)
tTI~
I
0008 0018--Ji
(0203=0457)
_t-YI.-0080
!!..ill. (2032)
(3175)
-+-- 0385::1:0025 -----.
(9 779±O 635)
Jl
MAX
-t
It003S-0068!.-J-0100::l:0010
(0965-1727)
(254'h0254)
MAX
MIN
---+
0014-0026
(0356-0 660)
JPackage
24 Lead Cerdip
J+----------(;J::)
-mJ--rm-'-4-rm--o'11
0
--[ifJ-17-ffi]-'-6
'5
3
~
0290-0320
rc(7366-8128)~
(~~)
~ (:~:;)t
+----==-
(0203-0305)~1_
0008-0012
950±50
1.- (~ ~~~::::~04~~) ----.l
-
L
0095
(2413)
MAX
14-11
PACKAGE DIMENSIONS
J Package
28 Lead Cenlip
~---------------------I::::)--------------------~~
MAX
0514-0526
~r-~-T~'-~~-r'-T>r>-r~~,,~-r'-r-rT-r,-~J
"'O'j""
~ ~~~
0590-0.620
G;~;;]
II ~
IS
::
I
(MAX)
(::::=::;;)
0125
(3175)
(5715)
t~~MAX
-L
I
.\.
0060-0100
(1.524-2.540)
J L
86°-94°
-I
(8128t_889~O)=rr=~
0320-0350
(813~C:::~~~::::~::J~
0760-0.775
(1930-1969)J
f
0420-0.480
(1067-1219)
0116
L ___
------0.420-0480
~ I-foO::5-=-~~~
(1067-1219)
~3:~~=~:~~;
RTVP
~41~:=~ ~~r RTYP
0.495-0525
(1257-13.34)
14-12
I~TYP
O.OlB±ODD2
(0 457±0 051)
KPackage
4Lead TO·3 Metal Can
0.060-0.135
(152-343)
0320-0350
JL
0100::1:0010
(2540±0 254)
KPackage
2Lead TO·3 Metal Can
f
t
-ih----- 1
MLf'N
+0025
0.685_ 0.060 ~
(17.40 ~Ul:)
•
J.1E2.
0055::1:0 005
(2946)
MAX
!I
(0965-1.092)---1 i--0038-0.043
0.152-0162
(3860-4114J
RTVP
0.167-0177
14241-4495)
RTYP
PACKAGE DIMENSIONS
NPackage
8 Lead Molded DIP
r: (100~0~0)-1
MAX
8
7
6
5
r
0.250 ± 0.010
(6.350±0.254)
~~:;==r.=r=I-+
0300-0.320
(7620-8.128)-
0.130±0 005
TYP
I
0009-0015
(0229-0381)
~~~~;
,j(3
(~~~~)~r-_,._HI-_ _
I
0 325
+ 0 635)(8 255 -0.381
tJ
302±0 127)
(~~;~)
MIN
t
}
tJ
0 125
(3175)
f
H - - - - ' - MIN
o045±0 015
(1143±0.381)
o 100±0 010
(2 540±0 254)
II
0 018±0 003
- - - ( 0 457±0 076)
N8188
NPackage
14 Lead Molded DIP
0770
(19.558)
MAX
"
__
1_
\
-----+-1_\
r
o 250±0.01O
(6350±0.254)
L""""""""'T"::'T"""r.:-r-T'":-T""T":"'1r-r;;-r-r:;;-'
R
L jl0.009-0.015
(0.229 -0.381)
o325 ~~:~~;
f8 255 +0.635)
~
.
t
0.075±0.015
(1.905±0.381)
_
0.100±0010
(2540±0.254)
-0.381
14-13
PACKAGE DIMENSIONS
NPackage
16 Lead Molded DIP
0.770
~----(19.558)------t
0.250",0.010
(6.350",0.254)
~.I=;:;:;=:;=;;;;=;::;;:;=;=;;::;::=;::;;=r==;=;;::r=:;=;;=;=;;;;==1
r
J
0300-0320
0.065
0.130",0.005
(T651i
= ~ "~;:., "~r",0.127)
(0.508)
MIN
-
0.325 ~~:~~~
TYP
-.l
t
--
t
~==~==:H
t
I..... (0.229-0.381)
0.009-0.015
0.125
(3.175)
MIN
18255 +0.635)
~
.
-0.381
N16188
NPackage
18 Lead Molded DIP
0.900
·I-------(22.860)-------l~
r
18
MAX
r
0.250",0.010
(6.350",0.254)
rr'::-:::.
J
A
~~~~~~~~~
0.020
(0.508)
_t
I
I.- 0.100"'0.0~0
0.009-0.015
(0.229 0.381) ..... -
0.325 +0.025
..
-0.015 __
18255 +0.635)
~ .
-0.381
14-14
0.045",0.015 .....
(1.143",0.381)
(2.540", 0.254)
L
-t
0.018",0.003
(0.457 ",0.076)
N18188
PACKAGE DIMENSIONS
NPackage
20 lead Molded DIP
1040
---------(26.416)-----------
MAX
-t
o 250±0 010
(6.350±0.254)
_t_~~~~~~~~~
-I
-
0300 -0320
(7620-8128)
A
1-
0.009-0.015
II-(0.229
0.381)
-
+0025
0325 -0015
+0635)
(8255 -0381
-
0.065±0.015
(1.651 ±0.381)-
--
o018±0 003
- - (0457 ±O 076)
N20188
NPackage
24 lead Molded DIP
I-----------(;,'::)---------~
i
0260::1:0005
0035
(6604::1:0127) (0889)
!
RAD
14-15
PACKAGE DIMENSIONS
NPackage
28 Lead Molded DIP
r~
0510::1:0005
(1575)
'''·~~~=T~~~~=r=rT=~=T=r~~rT=r~T=~=r=rT=~
...-..Q...Q§!L
(1.270)
TVP
j
L0100±0010
(2540::1:0254)
SO Package
8 Lead Small Outline
r-fi~
0189-0197 ~
(4801-5004)
87651
0228-0.244
(579]~
1
0010-0020
r(O 254-0 508) x45
0
(:1
b
0053-0069
(1346-1752)
0008-0010
254 )
2
3
0.150-0.157
~988)
4
0.004-0010
(0.101-0254)
~~
t
0014-0019
(0 355-04a3)
I--t- ii270)
J~II~
TYP
NOTES1 PKG MATERIAL PLASTIC
2 LEAD MATERIAL A-42, TIN PLATED
14-16
PACKAGE DIMENSIONS
SO Package
14 Lead Small Outline
rlW
0.337-0.344 ~
(8.560-8.738)
""""""j
0.228-0.244
0.150-0.157
""'0
1
~
r-
O'-8'TYP
0010-0020
r(0:254-0.508) x45"
0.053-0069
(1.346-1752)
0.008-0010
254
(:7
b
--=r"'
)
0.004-0010
(0101-0254)
~~
f
0014-0.019
(0.355 0.483)
J~I
i
I
0.050
1--+(1270)
TYP
NOTES:
1. PKG MATERIAL: PLASTIC
2. LEAD MATERIAL: A-42, TIN PLATED
814188
SO Package
16 Lead Small Outline
0.386-0.394
(9.804-10.008)
14
13
12
@
11
10
0.228-0.244
9
--:10.157
""IJ:;:::;:::::;:;:::;::;:::::;::;;::::::;:::;:::::;:;:::::;:;:::::::;::;j--=r.
968
)
0.004-0.010
(0.101-0.254)
~
f
0.014-0.019
(0.355-0.483)
NOTES:
1. PKG MATERIAL: PLASTIC
2. LEAD MATERIAL: A-42, TIN PLATED
816188
14-17
PACKAGE DIMENSIONS
SOL Package
16 Lead Small Out/ine (Wide)
ra(::~~F~ifl
0.394-0.419
(10.007 -10.643)
SEE NOTE
~~U
0.291-0.299
(7.391_ 7.595)}
0.005
(0.127)
RAO MIN
~I
ir-----
Thl=
u;~=_=_=~=;;i..I~
0.009 -0.013
(0.229-0.330)
1 2 3 4
0.093-0104
(2.362-2642)
0010-0029
~(0"'.25;':'4'::_"'0."'73~7)X45
00_8°TYP
0tL0:
.
0037-0045
(0.9:11143 )
IIJL
j
UUJ...lLJilDD Dut
0.050
(1.270)
SEE NOTE
5 6 7 8
TYP
0.016-0.050
(0.406-1.270)
-I /.-
t
0.004-0.012
(0.102-0.305)
0014-0.019
(0.356-0.482)
NOTE:
PIN lIDENT, NOTCH ON TOP AND CAVITIES
ON THE BOTTOM OF PACKAGE ARE THE
MANUFACTURING OPTIONS. THE PART
MAY BE SUPPLIED WITH OR WITHOUT
ANY OF THE OPTIONS.
S16(W)186
SOL Package
18 Lead Small Outline (Wide)
riH1
0.447_0.463lh
(11.354-11.760)
18 17 16 15 14 13 12 11 10
SEE NOTE
0.005
(0.127)
RAO MIN
0.009-0.013
(0.229-0.330)
1 2 3 4
0093-0.104
(2362-2.642)
0010-0 029 45'
5 6 7 8
i1.i~~O)
0.014-0.019
(0.356-0482)
9
0.037-0.045
(0 940-1.143)
~~~nx
0.016-0.050
(0.406 1.270)
14-18
~: :; : :; :;:;: :;:;: ;: ;:;:;:;:;:~ ('".~
t
~. L=r 1fE
0291-0299
(7391-7595)}
r"'
0.394-0.419
•
JL
DD DDDh
J""
(0.102 -0.305)
518188
NOTE:
PIN 1 IDENT, NOTCH ON TOP AND CAVITIES
ON THE BOTTOM OF PACKAGE ARE THE
MANUFACTURING OPTIONS. THE PART
MAY BE SUPPLIED WITH OR WITHOUT
ANY OF THE OPTIONS.
PACKAGE DIMENSIONS
SOL Package
20 Lead Small Outline (Wide)
0.496-0.512
~(12.598-13.005)~
IQBQ
17 16 15 14 11
0.005
(0.127)
RAD MIN
---I
,
1,...----
1
0.394-0.419
~:; : ; : ;: ;: ;: ;: ;:;:; : ;: ;: ;: ;: ~
1 2
0093-0104
(2362 2642)
0010-0029 X45 0
(0254-0737)
~ = t;. . L-t
0°
I
(1.270)
0016-0.050
(0.406-1.270)
TYP
4
5
6
7
8
9 10
0037 -0.045
+
'JL
U
~
0050 _ _
SEE NOTE
3
"0.00'
(0940-1.143)
t
8°TYP
\'rit=,""",,-"=- =- =
r""
"
SEE NOTE
0291-0299}
(7391-7595)
HHt--T
00 0 DDt
I--
t
NOTE:
PIN 1 IDENT, NOTCH ON TOP AND CAVITIES
ON THE BOITOM OF PACKAGE ARE THE
MANUFACTURING OPTIONS. THE PART
MAY BE SUPPLlEO WITH OR WITHOUT
ANY OF THE OPTIONS.
0.004-0.012
(0.102 0.305)
(~:~!::::~:~~~)
520188
SOL Package
24 Lead Small Outline (Wide)
1
0.394-0.419
SEE NOTE
,,000'r~]
1/;::;::;::;;::;;::;:;::;:;::;::;::;:;:;:;::::;;::;::;:;:;
0.291-0.299
1
(7.391_7.595)}
0.005
(0.127)
RAD MIN
0.010-0.029 X450t
(0.254-0.737)
r:d!J~-~~"~L-t
0.050
5
6
7 8
9 10 11 12
0.037 -0.045
-.i
(0.940-1.143)
WOJDOLOMOODDilt
I--
---.j
SEE NOTE
(1.270)
0.016-0.050
TYP
(0.406 -1.270)
4
t~~~j
00_8°TYP
0.009-0.013
(0.229-0.330)
2 3
0.093-0.104
(2.362 - 2.642)
t
NOTE:
PIN 1 IDENT, NOTCH ON TOP AND CAVITIES
ON THE BOITOM OF PACKAGE ARE THE
MANUFACTURING OPTIONS. THE PART
MAY BE SUPPLIED WITH OR WITHOUT
ANY OF THE OPTIONS.
0.004-0.012
(0.102-0.305)
0.014-0.019
(0.356 0.482)
.24'89
14-19
PACKAGE DIMENSIONS
SOL Package
28 Lead Small Outline (Wide)
SEE NOTE
1 2
0.093-0.104
(2.362-2.642)
0.010-0.02S
(0254-0.737)
0.037-0.0'5
X'5"~
!
(0.940-1.143)
• _
QO-8°TYP
.~~~--~~.-t
j
nnnnnnnnnnnnij~
L ~ l-JL
--:::I0.012
(0102-0.305)
('r~~0)
0.014-0.019
(0356-0.482)
NOTE'
PIN 1 IDENT, NOTCH ON TOP AND CAVITIES
ON THE BOTTOM OF PACKAGE ARE THE
MANUFACTURING OPTIONS THE PART
MAY BE SUPPLIED WITH OR WITHOUT
ANY OF THE OPTIONS.
P Package
3 Lead TO·247
MOUNTING HOLE
0.125
(Tmi
f+-+~
LI.-.-J
('.828-5334)
15°TYP
DIATYP
~
L --~
15"TYP
L
~
(21.84'-22.352)
0.160-0.180
('.084-'.572)
0.060-0.070
(1.52'-1.778)
7"TYP
o
L
\
0.250
0.780-0.820
(19.812-20.828)
0040-0.060
(1018-152')
(6.350)
MAX
B
0200
(5060)
BSC
14-20
0.070-0.090
~)
=t
O,070-0,090
(1.778-2.288)
~
(0.835-0.889)
PACKAGE DIMENSIONS
TPackage
3·Lead TO·220
~
0170-0180
(4318-4572)
0045-0055
(1143-1397)
025010020
(6350±0508)
0147-0151
(3734-3835)
DlA
0570-0610
TI
---.L
015()
(38101
MIN
It
0013-0025
(0 330 - 0 6351
0032.0005
I--.J ~(0813:1::0127)
..Q..Q2Q..----..
---II-----I
0090-0125
(2286-3175)
(~~~~:~ ~~~)
--.
(12701
TV'
TPackage
5Lead TO·220 (Straight Lead)
~
--;;;,0235 - 0270
(5 .969 1858)
0.380-0420
(9.652-10668)
01390153
(3531-38;
OIA
0
r
0079-0.135
(2.007 -3. 429)
t
0169-0185
(4.293-4699)
1
F
0035-0.055
(0.889-1.397)
t
fO
1.020-1.181
(25.908-29997)
0.560 -0.650
(14.224 16.510)
0.057-0.077
(1448-1.956)
---I 1---1
---I
J
L
0028-0.035
(0711
0889)
IH
0015-0025 __
(0.381 0.635) ~
k-
0079-0115
(2007-2921)
T5(S)289
14-21
PACKAGE DIMENSIONS
0.570-0.610
l
'''~-''...
0.390-0.410
(9.906-10.41)
0.147 -0.151
r
TPackage
5Lead TO·22O
"m~
~
+
D
0.355-0.370
(9.017 -9.398)
0.062-0.072
(1.574 1.829)
J :j
/4'-
0.170-0.180
(4.318-4.572)
0.100-0.120
(2.540-3.048)
1
10.045-0.055
ri1·143-1.397)
i
0.880-0.910
(22.35-2311)
0.970-1 .050
(24.64- 26.67)
J
L
0.013 -0.025
(0330-0.635)
0.030-0.040
(0.762-1.016)
0.170-0.185
(4.318-4.699)
0.327-0.335 _ ; . -_ _- . j
(8.306 - 8.509)
T5168
VPackage
11 Lead Molded SIP
0.146-0.152 DIA
(3.708-3.861)
0.157-0.197
(3.988 5 ' 0 0 4 ) i j _
~
1
--'-----'~--~m:;;;1"i=i"iT'T;=;:;:::;:;::iT'T;:::::.J
0.080
(2.032)
RAD
0.843-0.874
~
--
0.062-0.072
(1.575-1.829)-
-
II~(0.889-0.940)
0.035-0.037
(~66~;=~76~~) - -
t
0.685-0.713
(17.40-18.11)
0.039
5' (0.991)
TYP TYP
.--i-
(21.41 - 22.20)
0.177
(4.496)
TYP
(~:~~=~:~~~)
0.846-0.878
(21.49-22.30)
..
0.008
(0.203)
RAD
0.019-0.022 _
(0.483-0.559)
tl
0.089 -0.104
(2.261-2.642)
.-
0.185-0.209
(4.699-5.309)
V11889
14-22
PACKAGE DIMENSIONS
WPackage
10 Lead Flatpack (Cerpak)
0.290 '
_(7.366) _ _
MAX
I
0.003-0.006 2
(0.076-0.152)- -
0.010-0.Q19 2
'(0.254-0.463)
-t
"'1 r-- -I
0.005
I-- (0MIN
127)
=r
0.250-0.370
f
0.240 -0.260
(6.096 6.604)
DETAIL A
I.-
-+
o.005
(0.127)
MIN
0.006-0.015
(0.203 -0.361)
0.250 -0.370
(6.350-9.396)
0.050
1
(1.270) _ _
BSC
0.026-0.045 _
(0.660-1.143)
___ 0.030-0.085
(0.760-2.160)
0.045
_(1.143)
MAX
WI0688
NOTES:
1. THIS DIMENSION ALLOWS FOR OFF-CENTER LID, MENISCUS AND GLASS OVERRUN.
2. INCREASE DIMENSIONS BY 0.003 (0.076) WHEN LEAD FINISH A IS APPLIED
(SOLDER DIPPED).
ZPackage
a·Lead 10·92
0.060±0.005
(1.524±0.127)
:'1:
rr
0.160±0.005
(4.572±0.127)
i-~;-l
(U;) ~
\.V ~
60 !0005
(4.572±0.127) I
SEATING
PLANE
I
--t-'----..J~
(~ ~ ~) ~ ~ ~t(tfu)
I
I
---I
_
0.050±0.005 _
(1.270±0.127)
It
~ l~
UNCONTROLLED
LEAD DlA
t
I"
f.--
O.020±O.003
(0.506±0.076)
0.016±0.003
J.
~
_
III- 0.015±0.002
(0.381 ±0.051)
(0.406±0.076)
0.060 ±0.010
Ql-I~"oo,
lOoNOMJ~
(3.556±0.127)
ZI ..
14-23
NOTES
14-24
SECTion 15- APPEnDICES
ID
15-1
INDEX
SECTION 15-APPENDICES
INDEX.. .. . . ... .. ..... ...... ...... . . .... ...... ... ....... ......... ........ ........ ... . .. ..... .. ... ... . ... ...
Introduction to Quality and Reliability Assurance Programs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reliability Assurance Program. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Quality Assurance Program. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
R-Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ESD Protection Program ........................................................................................
Surface Mount Products. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Surface Mount Parts List. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Dice Products. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Application Notes Index. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
15-2
15-2
15-3
15-5
15-13
15-21
15-23
15-35
15-43
15-45
15-47
~"""-LlnLf\Q
~,
INTRODUCTION
TECHNOLOGY-------
Quality and Reliability Assurance Programs
Linear Technology Corporation has awide ranging program
integrating vendor participation, design engineering, and
manufacturing to produce the most reliable and highest
quality linear integrated circuits available on the market.
Our modern manufacturing facility in Milpitas, California is
DESC Class S and Class B line certified and we have successfully completed over 70 major OEM quality system surveys to MIL-Q-9858 and MIL-I-45208 including achieving
several major customer quality awards. Our Quality and Reliability Assurance Programs are summarized below:
• Wafer Fabrication-A modern class 100 area, modular
clean room construction with full environmental monitors. Emphasis is placed on statistical quality control, CV
plots, SEM monitors and on our proprietary dual layer
passivation system.
• Assembly & End of Line-Incoming inspection of all
materials and piece-parts, line surveillance and process
control monitors.
• Testing-Incoming inspection and acceptance of all offshore lots prior to release to test. Ultra modern LTX
testers, multipass testing with closed loop binning to reduce outgoing electrical defective levels. Many "beyond
data sheet" tests and full temperature QA lot buy-offs are
performed as standard processing.
• Traceability-A backside or side mark is placed on all
units, where space permits, to give information on aunitby-unit basis tracing back to the wafer fab lot, assembly,
end of line (e.o.l.) and test lots. We consider traceability
to be essential for good engineering control and additional insurance for our customers. The information provided exceeds the seal week traceability control required
by MIL-STD-883.
• Training and Certification-Operator training has been
established for all operations and certification is performed on a6monthly basis.
• Major Change Control-Major change controls are in
place to notify our customers in accordance with MIL-M38510, LTC internal specifications, or specific customer
specifications as required.
• Quality Assurance-Full monitoring and reporting of
quality data with emphasis on statistical process control
charts. Refer to our Quality Assurance Program.
• Failure Analysis and Reporting-A formal program ex·
ists to record, analyze and take appropriate corrective action on all returns. A report is generated and sent to the
customer stating our findings and action.
• Reliability Flows-Linear Technology reliability flows include Class Sand Class BJAN-38510, Standard Military
Drawings (SMD), DESC Drawings, 883 (to the new Rev.
R-Flow, and Hi-Rei (Source Controlled Drawings). In addition specialized processing such as SEM, PIND and
oth~r tests can be performed as required.
9
• Reliability Monitor-LTC has a unique reliability structure built into each wafer that is used to obtain rapid
feedback on reliability. This data is obtained in less than
1week,versus 40 weeks for atypical reliability
. audit. See
the LTC Reliability Program for more details.
• Reliability Audit-Data is gathered on a monthly basis
for selected package/product combinations. This data is
summarized each quarter and published in a Data Pak
showing Operating Life, 85/85, Autoclave, Temperature
Cycle, Thermal Shock, 883 Group C, and ~83 Group .D
summary data. Copies of Data Pak summanes are available by writing or calling Linear Technology, 1630 McCarthy Blvd., Milpitas, CA 95035, (408) 942-0810.
• ESD (Electro Static Discharge)-A full program is in
place from design through manufacturing. Products are
fully characterized to MIL-STD-883C (Method 3015) and
strict controls on handling and packaging are observed.
15-3
NOTES
15-4
I'''''''lln~
....&...,
RELIABILITY ASSURANCE
TECHNOLoG~~~-_ _ _P_RO_G_RA_M
Introduction
Design
In the early 1960's the study of reliability was mainly the
province of mathematicians and statisticians. In the late
1960's and throughout the 1970's it was realized that an
understanding of the physical phenomena was necessary
to identify the various failure mechanisms and considerable progress was made in this area. Sophisticated
diagnostic techniques were devised and this knowledge
complemented the earlier theoretical work to form a very
sound foundation.
At the DESIGN stage the reliability of the circuit is heavily
dependent on layout considerations. The thickness and
width of the metallization has been defined to minimize
the current density and avoid electromigration problems
at elevated temperatures. The routing of the metal pattern
is designed to eliminate potential inversion, or leakage
failures and guard ring structures are used where appropriate. The positions of the bonding pads are carefully
selected to optimize device performance and also to fit
easily into avariety of packages without creating potential
bond loop problems that could result in shorted wires. In
all of our voltage regulators, thermal limiting is included
in the circuitry to shut down the device if the temperature
exceeds a threshold value. Additional insurance is provided by employing short circuit current protection to
safeguard catastrophic failure. The philosophy of incorporating fault tolerant designs with innovative circuit concepts is a fundamental design rule at Linear Technology
At Linear Technology Corporation we have a firm appre·
ciation for the impact of Reliability on our products and
we have made every effort to integrate this knowledge into
our device designs and manufacturing processes. We believe that "LINEAR" should be "THE MOST RELIABLE
COMPONENTS" and it is our intention to supply "TOMORROW'S RELIABILITY-TODAY"!
All areas that impact reliability have received considerable attention and achieving our goal of "THE NUMBER
ONE" Reliability Supplier of Analog Circuits has impacted
the DESIGN, FABRICATION, PACKAGING AND TESTING
of our products.
5Amp Positive Adjustable Regulator
"RELIABILITY" requires a total systems approach involving all parties; from the raw material vendor, to the de·
signer, to manufacturing.
Cooperative Interface
ISOLATING RESISTOR - - - - - - '
Prevents destruction from high transient
current in 'Adjust' Pin.
15-5
RELIABILITY ASSURANCE
PROGRAM
Corporation. The design rules used by Linear Technology
are conservative to avoid compromising reliability, and
safe operation regions are chosen to prolong device life in
the field. Input protection is provided and the ability of our
devices to withstand transient voltage spikes is beller
than average. We focus on reducing lead count of our device designs since there is generally a strong correlation
between the number of leads in a package and the mean
time between failures for a device. The thermal layout of
our circuits is also a major consideration to minimize
parameter drift and optimize performance. The designs at
Linear Technology Corporation cover adiverse technological base ranging from Bipolar to CMOS. In the case of
CMOS, design techniques are used to minimize SCR and
latch-up phenomena. Many integrated circuit designs are
susceptible to electrostatic discharge effects (ESD) and
electrical overstress (EOS) with generally catastrophic results. In the designs at Linear Technology Corporation,
care is taken to ensure that a high degree of protection is
built into our products to minimize this effect.
Diverse Range of Processes
Prior to release, new devices are thorougly characterized
and subjected to rigorous mechanical and electrical
stress testing to exercise all facets of the design, process,
and package combination. Linear Technology Corporation
has an active in-house ESD (Electrostatic Discharge) program to prevent yield loss and the potential weakening on
devices.
.
Wafer Fabrication
In the WAFER FABRICATION area the key to a reliable
process is consistency and repeatability. Linear Technology has a brand new ultramodern wafer fabrication facility
and wafer handling has been kept to a minimum. Cassette
to cassette transfer is used extensively and proximity
mode aligners are utilized in masking to significantly reduce photomasking defects. Microprocessor controlled
furnaces are used to eliminate the impact of operator
error.
Cassette to Cassette Transfer
Canon Proximity Aligner
15-6
1.
Super Beta Structure
2.
Bi-Iet Structure
3.
Silicon Gate CMOS Structure
RELIABILITY ASSURANCE
PROGRAM
Stringent incoming inspection checks are made on the
raw silicon wafers and masks used in the process. Environmental monitoring of the gases, clean air, particle
count, deionized water, and furnace temperature and
flows are done on a routine basis to avoid any sudden
changes that could impact device reliability.
Quality Control checks at various points in the process ensure consistency and control charting is used extensively
throughout the fabrication area. The quality of the oxide is
checked regularly using C-V plots to check for contamination and surface state anomolies and processes are not
operational until minimum requirements are met. Each
wafer contains diagnostic structures in addition to the device structures and these test vehicles are used to investigate and detect potential yield and reliability hazards in
advance. Scanning electron microscope pictures are
taken periodically to check the integrity of the metallization system. Emphasis is given to the early detection of
step coverage or misalignment problems. A proprietary
passivation system has been developed that will enable
our die to operate in a variety of plastic packages and the
nature of this unique multilayer system will make the die
virtually impervious to the packaging medium.
The strategy of Linear Technology in developing its process is to make the chip as impervious as possible to moisture and ionic contaminants. This approach assures
reliable operation even in marginal environments. The Linear Technology process offers several layers of protection. 1) Extensive CV monitoring of all diffusion tubes and
deposition systems assure underlying oxides with low
levels of positive ionic contamination. Phosphorous gettering ties up these ions in an inactive state. 2) A proprietary deposited oxide gives conformal coverage of metal
and oxide steps, and is free of cracks. 3) A plasma nitride
overcoat protects the die from external ionic contamination during handling, testing and assembly. The dual nitride/oxide layer is completely free of cracks and pinholes
which enhance corrosion protection against moisture
contamination.
Microprocessor Controlled Furnaces
Passivation Process
OXIDE
SILICON
1.
Contamination Free Passivation
Oxide
2.
Conformal Oxide Underlayer
3.
Plasma Nitride Top Layer - - - - '
Control Chart
1--------
X CHART
.r~"Y..,,~-*\(x)fOf(
---
--
R CHART
~.
ID
IV
---------
15-7
RELIABILITY ASSURANCE
PROGRAM
Packaging
The impact of new equipment, techniques and materials
have had a tremendous impact on device reliability. In the
area of wafer scribing, sawing of the wafers has decreased device chipping and cracking significantly. The
handling of dice at second optical inspection and die attach is now mainly automated, removing the need to use
tweezers and the resultant damage due to this operation.
Automated lead bonding machines have produced tremendous gains in productivity but as importantly more consistent lead bonds have resulted from this new innovation.
Die attach materials have improved and modern low temperature glass ceramic seals have dramatically increased
product reliability. At Linear Technology we are using the
latest state-of-the-art assembly equipment and materials.
Our epoxy material has the lowest sodium and chlorine
content of.any molding compound available and the data
on operating life, power cycling and pressure pot is outstanding. Composibility between the different package
elements, such as the molding compound and lead frame,
Wafer Saw
are carefully researched and selected particularly on our
surface mount packages to achieve the highest reliability
after board soldering. All materials are inspected to better
than industry standards prior to use and strict QC checks
are performed on-line to assure control and conformance
to specifications. At LTC traceability to a fabrication lot is
considered to be of primary importance. On all packages
where space allows a side mark or a backside mark is
used to give this key information. We are able to track the
country of origin, assembly location, die type, wafer fab
lot, exact seal date and also identify non standard
processing if required on a special flow. This unique benefit is offered as a standard feature at no additional cost
and adds immensely to the level of control and traceability
on Linear Technology products.
Mil-Standard 883 Method 2010 Condition B or equivalent
visual criteria are applied to all Linear Technology products and a thorough inspection of all lots received from
our assembly operations in Southeast Asia is performed
prior to testing. A system of effective and rapid communications exist between our operation in Milpitas, California and Southeast Asia to analyze and correct any
assembly or process related problems before the product
is shipped to the customer. Precautions are taken
throughout the assembly process to minimize the impact
of ESD (Electrostatic Discharge) on our devices.
Die Attached and Wire Bonded Unit
Side/Backside Mark on Unit
Encapsulated and Finished Unit
15-8
RELIABILITY ASSURANCE
PROGRAM
Test
The testing of analog circuits is a science in its own right
and requires very special technical skills to overcome the
challenges that are presented. At Linear Technology we
have invested in the very latest "state·of·the·art" com·
puter controlled testers and our device designs exercise
the limits of these excellent testers. All Military 883 prod·
ucts receive a 150°C or a 125°C burn·in prior to test and
full temperature testing is performed. Regulator products
are put on "rack burn·in" and the devices are exercised in
the thermal shutdown mode prior to testing. This pretest
burn·in contributes to the removal of infant mortality fail·
ures and enhances product reliability. Other tests check
the thermal regulation and verify the integrity of the die attach as the presence of voids under the die for a regulator
affects device performance adversely. Often, tests addi·
tional to the data sheet tests are added to a test flow to de·
tect potential flaws that could impact reliability.
At Linear Technology we believe that the thorough and
complete testing of our components is an essential ele·
ment in our plan to provide 'premier' reliable products.
Precautions are taken throughout test to safeguard our
devices from the insidious effects of ESD (Electrostatic
Discharge). As an example, all chip capacitors are pre·
stressed with voltages (in excess of the device maximum
voltage ratings) to induce failure in substandard lots.
Rack 'Bum·in' of TO·3 Regulators
LTx/LINEAR Tester with Environmental Handler
Burn·in Operation
15-9
RELIABILITY ASSURANCE
PROGRAM
Reliability Flow
Reliability failure rate can be broken out into three main
categories: 1) Infant Mortality, 2) Freak Failures and 3)
Long Term Failures. Short term burn-in screening as described in the previous section address the first category-infant mortality. The long term failures represent a
significant number of hours in terms of the mean time between failures and so the major area of concern is asufficient pre-screen conditioning to eliminate the bulk of the
infant mortality and freak failures.
These early life failures impact customer warranty costs
and reputation severely and the replacement costs are
clearly several orders of magnitude greater than the initial
component costs. The Linear Technology 883 program addresses this requirement and offers a cost effective inhouse flow. The flow is defined in our MIL-STD 883
brochure and the essential elements of the program include visual inspection at second and third optical inspection to Condition B (Mil-Standard 883, Method 2010,
temperature cycling from -65°C to 150°C, constant acceleration, fine and gross leak, followed by a 125°C burnin for 160 hours or equivalent. Assuming an active energy
of 1.0ev, this burn-in is equivalent to 80,000 hours or approximately 9 years at a normal operating temperature of
around 55°C.
Failure Rate vs Time- LT07H
Typical Representation of IC Lot Failure
Rates at SO·C Operation
~~~--~-.--~-,
·30+---+--+----+----(I'''*"''mtrl
FAILURE RATES (FITS)
10'
.25+--W.---+----+---+----i
2O+-----t'I.:----
10'
.15+---I-~+----+---+----i
.10 +---+-----1'-;---"
10'
.05+---I----+----l........;;::t-----i ___ 0.5 Fits
at 55°C
10'
1Yr
10
2Yrs
3Yrs.
20
4Yrs.
5Yrs.
30
40
50
No. of Hours (K) at 125 C
Q
101
1.
102
103
104
105
OPERATING LIFE (HOURS)
106
101
Infant mortality population which could be
2280 Yrs. at 55°C
Operating Life Drift Data
0.5% of the lot. Its mean life could be as low as
50 hrs.
2.
The freak population could represent up to 5%
of the lot. Its mean life could be 5 yrs.
3.
Main population whose mean life could be
4.
The dramatic impact on total lot reliability that
hundreds of years.
is achieved by weeding out early failures via
100% burn-in.
Offset Voltage Drift - Microvolts
15-10
RELIABILITY ASSURANCE
PROGRAM
Wafer Fab Reliability Audit
As an additional reliability control, Linear Technology has
innovated a periodic reliability audit of the wafer fab process, using a specifically designed reliability structure
which is stepped into all wafers.
This structure is optimized to accelerate, under temperature and bias, the two most common failure mechanisms
in linear circuits, namely mobile positive ions and surface
charged-induced inversions. The three-terminal structure
is scribed from a run and assembled in a hermetic package. These devices are burned-in for a predetermined temperature and time. The same structure becomes sensitive
to either failure mechanism depending upon the bias
scheme used during burn-in. Alimit is defined for the leakage current change during burn-in; a failure indicates a
wafer fab problem which will be addressed by the process
engineering group. The use of atest pattern allows any device to be monitored and also gives faster unambiguous
feedback than is normally achieved by performing reliability testing on assembled product. Reliability data is
generated in less than one week giving immediate feedback on device reliability. The standard industry monitoring schemes typically take a minimum of 22 weeks to
obtain this feedback and it is not uncommon for the cycle
time to be up to 40 weeks before fab is alerted of a
problem.
Linear Technology utilizes this new control technique in
addition to the conventional reliability audit on randomly
pulled finished product.
Process Reliability Monitor
STANDARD INDUSTRY RELIABILITY AUDIT
FJ Fa Probed
WIP
Offshore
Assembly
FIELD CHANNEL MONITOR
v-
Tesl
WIP
1
ISO
r - --Parasitic I
I
Gate L-l
I
3 EPI
Base
SODIUM MONITOR
ACCELERATED FAB RELIABILITY AUDIT
v-
In~House
FAB
Assembly
Test
2
ISO
Base
EPI
3
v+
15-11
RELIABILITY ASSURANCE
PROGRAM
Conclusion
At Linear Technology Corporation we are addressing reliability and quality with the same priority to produce the
best possible product in the analog world. We believe that
the combination of our extensive design skills, and exciting innovations in the wafer fabrication process, coupled
with the most modern assembly techniques, has produced
the "MOST RELIABLE" linear products available in the
market today. Our standard product flows include thermal
limit rack burn-in (for all regulators) and 150°C or 125°C
burn-in for Military 883 products to significantly reduce
the infant mortality failures. In addition, our 883 flow is designed to further enhance product reliability. We fully
realize that the cost of failure in the field is many orders of
magnitude more than the initial component cost. By purchasing Linear Technology Corporation's products, worthwhile insurance can be gained.
LT07H-Mean Time Between Failures
Reliability Test Structure
Part No. 5001
1520406080
.5
2
10
30 50
70
9599
90
98 99.5
1,000,000
.
l00,OOOf-H++++++#H+-t+-t+-I' 7
,
10,000
f---H+---hoF-'+t-t--t+l-++-+++-I
1,000
h,IPH---+--t-+t-t+t-+++++Hl2 ,'on"
~§
3 ~
10
.5
2
10
30 50 70
90 -'- 98 J~EI.5
1520408080
95
99
Failures (Cum %)
15-12
~-9"'1Inll\l2 QUALITY ASSURANCE PROGRAM
~,
TECHNOLOGY
At Linear Technology Corporation our overriding commit·
ment is to achieve Excellence in Quality, Reliability and Ser·
vice (QRS) and total customer satisfaction. We interpret the
word "excellence" to mean delivering products that consis·
tently exceed all the requirements and expectations of our
customers. The commitment to QRS extends from the Pres·
ident to every employee, from design to product qualifica·
tion, and from manufacturing to shipping. To meet this
commitment, Linear Technology has established acompre·
hensive program called "Quality for the Nineties."
This program is divided into four separate, but highly interrelated programs, namely Quality Environment, Total
Quality Control (TQC), Vendor Participation, and Focus for
the Nineties.
Quality Environment
This first program, Quality Environment, serves as the build·
ing block for three other programs. It entails establishing an
environment that is conducive to the partiCipation of each
and every employee in helping to build quality into our prod·
ucts. This program encourages every employee to identify
any quality problem and partiCipate in recommending
solutions.
Quality for the '90's
A comprehensive operator training and certification pro·
gram has been established that covers every area of man·
ufacturing from incoming raw material inspection, wafer
fabrication, assembly, and test to shipping. Emphasis is
placed on compliance with specifications, performance to
quality goals, electrostatic discharge damage (ESD) aware·
ness and controls, encouraging operators to think quality
and recommend quality improvement ideas.
To ensure compliance with specifications, a Quality Audit
Team performs asystems audit of key manufacturing areas
and suppliers at periodic intervals. Compliance with
process specifications and the detailed programs of the
Corporate Quality Assurance Policy are verified, and dis·
crepancies reported for quick resolution with special em·
phasis to eliminate recurring problems. The performance of
each area is then rated, providing a strong incentive for
each area to excel.
With the philosophy that each department, starting from
incoming raw materials, is considered a customer of the
preceding department, every effort is made by working
closely together to meet or exceed our end-customer reo
quirements and goals.
Systems Quality Audit·Tracking Recurring Problems
1\
~
1\
/[\
\
\
o
1
2
3
4
5
6
7
8
~
~
9 10 11
12
PERIOD
IDI
15-13
QUALITY ASSURANCE PROGRAM
Total Quality Control (TQC)
The second program starts with the incorporation of innova·
tive, but conservative, design and layout rules to achieve
the best performance without sacrificing quality and relia·
bility. During the design and development cycle, Design,
Product, Package, Manufacturing, Quality and Reliabilty
Engineering groups participate in design reviews to ensure
that all program aspects are covered; ranging from product
performance objectives to ensuring reproducibility and reo
peatability in wafer fabrication and assembly. Special em·
phasis is placed on devising input protection circuitry to
minimize susceptibility to voltage spikes and ESD, optimiz·
ing thermal layout to minimize parametric drift, and
optimizing bond pad layout to maximize assembly and elec·
trical test yields, at the same time allowing the die. to be
assembled in awide selection of packages.
method 5005 qualification testing for hermetic packages.
Product performance on these tests must be equal to or bet·
ter than similar products within the same generic group to
be considered qualified. Major design, package, material
and process changes are also subjected to these same
stringent qualification requirements. In addition to achiev·
ing the required reliability performance, an engineering
change must also achieve manufacturing yield and quality
performance levels equal to orbetter than the original prod·
uct to be considered qualified.
Once the design is approved, a stringent manufacturing
qualification test plan is conducted on the initial engineer·
ing runs. The test plan is selected to bring out any weak·
nesses in the design and any manufacturability. problems,
and includes reliability stress tests such as high tempera·
ture operational life and high temperature humidity bias
85°C/85% RH for plastic packages, and MIL·STD-883C
In manufacturing, process controls start with vendor quali·
fication on raw material piece parts. AQualified Vendor List
is maintained and performance of each vendor is continuo
ously monitored on a Vendor Rating Program. A dimen·
sional, visual, functional and, where applicable, composi·
tional analysis is performed on each direct raw material lot.
Automated state-of·the·art wafer fabrication, assembly and
test equipment, cassette·to·cassette handling in wafer fab·
rication and automated handling in assembly are utilized,
where possible, to maintain manufacturing consistency
and quality~ Only fully trained and certified operators are al·
lowed to work on production material.
Raw Material Controls
SEM Monitor of Metallization Quality
VENDOR QUALIFICATIONMINIMUM 3 MANUFACTURING LOTS
QUALIFIED VENDOR LlSTADDITION OF NEWLY QUALIFIED VENDOR TO LIST
STRINGENT INCOMING INSPECTION ON EVERY LOT:
• DIMENSIONAL
• VISUAL EXAMINATION
• FUNCTIONAL TESTING TO SIMULATE ACTUAL
MANUFACTURING CONDITIONS
• PLATING THICKNESS MEASUREMENTS
• COMPOSITIONAL ANALYSIS
• CHEMICAL ANALYSIS FOR CONTAMINANTS
• SPC ON CRITICAL PARAM ETERS
VENDOR PERFORMANCE TRACKINGTO DETERMINE VENDOR QUALIFICATION/
DISQUALIFICATION STATUS
15-14
QUALITY ASSURANCE PROGRAM
Stringent process controls, typically beyond industry standards, are established for each critical manufacturing step in
wafer fabrication, wafer test, assembly, package finishing,
mark and pack and shipping as depicted in the Quality Control Flow Diagram_ The process controls include monitors of
critical assembly processes at a minimum frequency of four
times per shift, and lot acceptance inspection for operations
requiring 100% production inspection_ Initial die inspection
and preseal visual inspection are performed per MIL-STD-883
Method 2010 Test Condition B. Statistical quality control
techniques are employed in optimizing process parameters,
and monitoring process performance through the use of control charts with action limits and upper and lower control limits, and in parametric distribution analysis at electrical test.
Electrical quality is guaranteed by conservative guardbanding on production test programs of a minimum of three
machine guardbands, by using state-of-the-art test equipment and 0.04% AQL for lot acceptance testing at 25°C for all
military and commercial lots. Additional tests, like rack burnin, beyond the data sheet specifications on regulator products are performed by exercising the parts in a thermal
shutdown mode. These tests are incorporated into the test
flow to improve reliability and weed out infant mortality failures. Visual and mechanical quality is optimized by minimizing handling of parts in assembly, test and end of line
operations. Lead finish processes have been selected that
mimimize solderability problems and all lots are subjected to
Xand RControl Chart for One Variable
~_~I/2.~
-.2J.3
SJ.J
a stringent major visual/mechanical inspection. Administrative errors due to mixed and wrong parts are minimized by
strictly adhering to a one lot per station policy, and double
checking orders at order entry and shipping. Before shipment
of a lot to the customer each lot is inspected to ensure that it
meets internal and customer specifications and purchase order requirements. The level of attention paid to each unit is
demonstrated by the fact that each unit is traceable to the
wafer fabrication lot number via aside or back mark on both
883 and commercial products on all packages, except where
there is aphysical constraint.
Through the use of automated equipment, strict process
controls (utilizing proven statistical quality control techniques), periodic systems and quality audits (conducted by
the Quality Audit Team), stringent facilities and environmental controls and monitors, Linear Technology is able to
ensure quality is built into the product and to guarantee a
consistently high quality level.
The manufacturing quality controls are complimented by a
reliability audit program designed to weed out design, fabrication, packaging and assembly deficiencies. Additionally, controls are supported by a comprehensive failure
analysis and corrective action program designed to provide
timely feedback of findings to all operating groups for resolution. The analysis of customer returns, and corrective action taken, completes the closed loop of our Total Quality
Control program.
Military and Commercial Products Share
the Same Stringent Inspections and Controls
• WAFER FABRICATION PROCESS CONTROLS & CLASS 100 PROCESSING.
• REGULAR SEM MONITORS.
• DICE INSPECTION PER MIL-STD-883C METHOD. 2010 TEST CONDITION B.
• PRE-SEAL VISUAL INSPECTION PER MIL-STD-883C METHOD 2010. TEST
CONDITION B.
• DIE SHEAR TEST PER MIL-STD-883C METHOD 2019.
• BOND PULL TEST PER MIL-STD-883C METHOD 2011.
• SOLDERABILITY TEST PER MIL-STD-883C METHOD 2003
• MARK PERMANENCY TEST PER MIL-STD-883C METHOD 2015.
• HERMETICITY TESTING PER MIL-STD-883C METHOD 1014.
• QA ELECTRICAL TEST TO 0.04% AQL AT 25'C, AND TEMPERATURE TESTING
• EXTERNAL VISUAL PER MIL-STD-883C METHOD 2009.
15-15
QUALITY ASSURANCE PROGRAM
Bond Strength Histogram
1400.----------------------------,
_LTC lac 1.25 MIL BOND PULL DATA
1200
I-----------------Im-~:t__------_____J
1000
1--------------~t__lf01-~:t__m_-----_____J
800
I--------------t:~__r'ljt__l~____(%:t__VA___;;;;=_---_____J
600
I---------------I:~__r'ljt__l~____(%:t__VA_~~---_____J
400
1------------VA---I:~-f%'f-~'f__VA____i%':I___m___....---___j
200
I---------------F.~
~ ASSY 1.25 MIL TO-5 BOND PULL DATA
9
10
11
12
BOND STRENGTH (GRAMS)
13
Failure Analysis Photomicrographs
15-16
14
15
16
17
18
QUALITY ASSURANCE PROGRAM
Vendor Participation
Statistical Process Control (SPC)
The requirements of high quality raw materials for integrated circuit manufacture range from ppb (parts per billion)
impurity levels for electronic grade chemicals to ppm (parts
per million) defective levels for lead frame packaging
materials. It is not only essential, but critical for the semiconductor manufacturer to work closely with their vendors
to attain the high quality levels needed in raw materials. At
Linear Technology, a program has been established and implemented to allow vendor participation in formulating
specifications and establishing percentage defective and
lot rejection rate goals. This vendor participation ensures
that the direct and raw material quality levels received are
consistent with our manufacturing and end-product quality
goals. Clearly, achieving optimum quality product requires
the use of the best possible materials available and with
continuous communication and feedback from our vendors
to improve in this key area.
The increased reliance on automated manufacturing and
test equipment underlines the need for strict process control techniques. SPC is a valuable tool and, at Linear
Technology, we realize the importance of these methods.
Engineering analysis is performed regularly, using SPC
techniques to establish the process capability. Control
charts showing X and R points are tracked to ensure the
process is within normal limits and action and shutdown
limits are established for critical operations. The process
capability of key processes are calculated using the Cpk
capability index on an ongoing basis to ensure a program
for continuous quality improvement.
Xand RControl Chart lor Two Variables
Focus For the 90's
The following key quality improvements programs have
been established to meet the quality requirements of the
90's.
PPM Goals
As demand for quality semiconductor components becomes increasingly more stringent, the percentage goals
from the 1970's have given way to ppm goals in the 1980's.
At Linear Technology, ppm quality goals are established for
every major operation, from incoming inspection to customer returns. Performance to goals is reviewed quarterly
and, where goals are not met, quality improvement programs are defined and implemented. Quality goals are
updated and tightened on an annual basis, and quality programs are redefined to achieve the new goals established.
One of the early benefits of this program is demonstrated by
the excellent average outgoing electrical quality (AOQ).
15-17
QUALITY ASSURANCE PROGRAM
ESDControl
Customer Ship·To·Stock Program
A comprehensive ESD control program has been established which encompasses design, handling, testing, storage, and final packaging for shipment. The program
includes the use of grounded table tops, floor mats, wrist
straps and heel straps, topical antistatic treatment of floor
coverings, banning of static bearing materials from the
manufacturing environment, ionizers, and use of conductive or antistatic materials for handling and final packaging.
Areas where ESD control must be enforced are designated
as ESD Protected areas. ESD awareness training programs
help to increase the operator's awareness for successful
implementation of this program. Every effort is made to
stamp out this silent chip killer. The benefits of this program are improved quality and reliability to the customer.
Linear Technology is working hand-in-hand with customers
to supply consistently high quality-level products to help
achieve a Ship-to-stock program by eliminating the need to
do an incoming inspection. We recognize the benefits to our
customers of a ship-to-stock program, namely savings in
the need to purchase and maintain incoming test equipment, savings in the need to maintain asafety stock in case
of incoming lot rejections, and reduction in board failures
and re·work costs because of higher component quality.
Ship·lo·Stock Program Flow
Quality System Surveys MIL·Q·9858 and MIL·I·45208 Approval
100% INCOMING INSPECTION
80
70
ESTABLISH PPM GOAL WITH CUSTOMER.
~ 60
o
a;
o
50
IF
FAILURE
RATE IS
EXCEEDED
;t
;:: 40
o
~ 30
CUSTOMER MEASURES AIQ
(AVERAGE INCOMING QUALITY)
ELIMINATE 100% INCOMING INSPECTION AND
START SHIP-TO-STOCK WHEN AIQ"PPM GOAL.
:;;
~
20
LTC PROVIDES CUSTOMER WITH AOQ
(AVERAGE OUTGOING QUALITY) DATA.
10
I
87
B31841B51 B6
BB
CALENDAR QUARTER (FOR CY1983-1989)
IB9
Based on the foregoing quality programs, Linear
Technology Corporation is positioned to con·
tinuously improve our product quality and ex·
ceed the demands of our customers in the 80's
and beyond.
15-18
CUSTOMER TRACKS BOARD/SUBSYSTEM/SYSTEM
TEST DATA ON SHIP-TO-STOCK PARTS.
CUSTOMER TO RETURN FAILED PARTS
TO LTC FOR FAILURE ANALYSIS.
QUALITY ASSURANCE PROGRAM
Quality Control Flow Diagram
INCOMING RAW MATERIAL
VISUAL, 4 x/SHIFT
FINE LEAK, 2 x/SHIFT
GROSS LEAK, 2 x/SHIFT
MOISTURE, 4 x/SHIFT
SILICON WAFERS
MASK PLATES
PIECE PARTS
PER MIL-STD-883
METHOD 1010
10 CYCLES
PER MIL-STD-883
METHOD 1014
LTC WAFER FABRICATION
LTC WAFER SORT
RESISTIVITY,
OXIDE THICKNESS,
METALLIZATION THICKNESS
PINHOLE DENSITY,
CD MEASUREMENT, ETC
100% ELECTRICAL TEST OF
EVERY DIE
(OFFERS UNIT TRACEABILITY
TO WAFER FAB LOT NUMBER
KAO AAH 515XX
K=ASSEMBLY PLANT CODE
AO=DIE TYPE
AAH=WAFER RUN NUMBER
515=SEAL DATE CODE
XX=SPECIAL CODES
INSPECT FOR FLOW, VISUAL
QUAlITY, BACKSIDE QUALITY,
PROBE QUALITY, ETC.
OUTGOING VISUAL/
MECHANICAL INSPECTION
4 x/SHIFT
PER MIL-STD-883
METHOD 2010
LTC QA INCOMING
INSPECTION
VISUAL/MECHANICAL
FUNCTIONAL
(INTERNAL VISUAL, DIE SHEAR,
BOND PULL, SOLDERABILITY,
ETC.)
VISUAL 4 x/SHIFT.
DIE SHEAR TEST 2 x/SHIFT
QA MARK VISUAL AND
PERMANENCY TEST
PER MIL-STD-833
METHOD 2015
QA SOLDERABILITY
TEST
PER MIL-STD-883
METHOD 2003
QA FINAL ELECTRICAL TEST
25"C AND TEMPERATURE
EXTREMES
VISUAL 4 x/SHIFT
BOND PULL TEST 2x/SHIFT
CHECK FOR DIE ATIACH
QUALITY
PER MIL-STD-883
METHOD 2010
QA PRESEAL VISUAL
QA POST PACK
VISUAL/MECHANICAL
INSPECTION
INSPECTION (3rd OPTICAL)
INSPECT TO CUSTOMER
P.O, REQUIREMENTS
15-19
NOTES
15-20
~~~!O~~
__________
R_-F_LO_W
Linear Technology R·Flow
Reliability has been a key focal pOint at Linear Technology
Corporation since our inception in 1981. Our standard prod·
uct reliability is monitored closely and we have generated
an extensive reliability data base for both hermetic and
plastiC devices. This data is published on a quarterly basis
and we are seeing very low reliability failure rates in the under 1FIT range at 55°C. *
In response to customer requests, we have added an even
higher level of reliability screening for commercial hermetic
and plastiC components. LTC's R-Flow adds an equivalent
160 hours 125°C burn-in to the standard commercial process flow. Following burn-in, a100% room temperature test
is performed and a 10% PDA (Percent Defective Allowed) is
applied. This PDA limit affords an additional level of insurance on a lot-by-Iot basis and prevents the occasional disparate lot from being shipped for critical applications. The
additional room temperature insertion also decreases the
probability of any electrical defectives in the R-Flow lot.
=
----/
4. INSULATION PAD
~1
CONDUCTIVE OR STATIC
DISSIPATIVE TABLE MAT
~ TABLE TOP
~
C
GROUND
MATERIALS: 1
-
FLOOR
1116" THICK CONDUCTIVE OR STATIC DISSIPATIVE TABLE MAT WITH SURFACE
RESISTIVITY OF ,;1080 PER SQUARE.
2. INSULATED CONDUCTIVE GROUND CORD WITH A SERIES RESISTOR OF 112W
MINIMUM, 1MO± 10%, AND 1BAWG OR LARGER INSULATED WIRE
3. INSULATED CONDUCTIVE WRIST STRAP WITH 1/4W MINIMUM, 1MO± 10%,
AND 20AWG OR LARGER INSULATED WIRE. THE CURRENT LIMITING 1MO
RESISTOR MUST BE LOCATED RIGHT NEXT TO THE WRIST TO PREVENT THE
POSSIBILITY OF SHUNTING THE RESISTOR.
4. POWER TEST EQUIPMENT MUST BE CHASSIS GROUNDED VIA A THREE-PRONG
PLUG, AND PLACED ON AN INSULATION PAD MADE OF FORMICA, FIBERGLASS
OR EQUIVALENT MATERIAL.
Figure 1
CONDUCTIVE FLOOR MAT
OR CONDUCTIVE FLOORING
GROUND
MATERIALS: 1. OPTIONAL 1/B" THICK CONDUCTIVE OR STATIC DISSIPATIVE MAT OR
CONDUCTIVE FLOORING (e.g., CONDUCTIVE FLOOR TILES) WITH A SURFACE
RESISTIVITY OF ,;10 80 PER SQUARE.
2. CONDUCTIVE SHOE STRAP WITH A SURFACE RESISTIVITY OF < 10 50 PER
SQUARE.
3. INSULATED CONDUCTIVE GROUND CORD WITH A SERIES RESISTOR OF 112W
MINIMUM, 1M!l± 10%, AND 18AWG OR LARGER INSULATED WIRE
Figure 2
15-29
ESD PROTECTION PROGRAM
Option 2(Figure 2): Shows an alternate installation method for an ESD Protected Workstation. It consists of a
conductive or static dissipative floor mat grounded to
earth or electrical ground through a 1MU series resistor
with the operator wearing aconductive shoe strap. This installation is typically used where the operator needs freedom of movement over a large area, e.g., environmental
chamber loading and unloading, electrical testing, etc. To
be effective the conductive shoe strap must be attached
to the wearer's shoe to maximize contact between the
strap and the conductive floor.
Option 3: Utilizes the same conductive or static dissipative floor mat installation as Option 2 with the exception
that the operator is grounded via a wrist strap through the
equipment ground instead of aconductive shoe strap. It is
utilized where an operator is working with a piece of freestanding equipment and does not require a great deal of
freedom of movement.
Handling
At Linear Technology Corporation all products are handled, transported and staged in volume conductive tote
boxes. This offers maximum protection to the components from triboelectrically generated and inductive static
charges. The rule is under no circumstances should components be removed from their approved containers except at an ESD protected workstation.
Final Packaging
Only antistatic and conductive final packaging containers
(for example, antistatic or conductive dip tubes, volume
conductive carbon loaded plastic bags or metallic film
laminate bags, foil lined boxes) are used. Filler (dunnage)
material used should be antistatic, non-corrosive, and
should not crumble, flake, powder, shred or be of fibrous
construction. Conductive packing materials are preferred
since they not only prevent buildup of triboelectric charge,
but also provide shielding from external fields.
• Ensure all electronic and electro-mechanical equipment is chassis grounded, including conveyor belts, vapor degreasers and baskets, solder pots, etc.
• Tips of hand soldering irons are to be grounded.
• All parts of hand tools (e.g., solder suckers, pliers, etc.)
which can be expected to come in contact with electronic components are to be made of conductive material and grounded.
• Conductive shorting bars are to be installed on all
terminations for PC boards with electronic components
during assembly, loading, inspecting, repairing, soldering, storing and transporting.
• All PC boards with electronic components are not to be
handled by their circuitry, connector points or connector pins.
• High velocity air movement is to be delivered through a
static neutralizer.
• Air ionizers are to be employed in neutralizing static
buildup on insulators if they have to be used or as an extra precautionary measure for extremely sensitive
assemblies.
• Do not slide electronic components over asurface.
Air ionizers come in three basic types: nuclear, AC and
pulsed DC. These ionizers can neutralize static charges on
non-conductive materials by supplying the materials with
astream of both positive and negative ions.
The advantage of the AC or pulsed DC type air ionizer is
that there is no recurring annual replacement cost. The
disadvantages are: it emits ozone which can damage rubber in equipment; EMI (Electro Magnetic Interference);
and an imbalance in the stream of ions if not properly
maintained, therefore necessitating frequent preventive
maintenance.
Other ESO Preventative Measures
The advantages of the nuclear type air ionizer are low
maintenance, no ozone, no EMI and no imbalance problems. The disadvantages are that it requires careful handling because of the radioactive source, and the annual
recurring cost to replace the radioactive source.
• Where possible, ban all static bearing materials,
e.g., common plastics, styrofoam from the work
environment.
• Use only synthetic material smocks with 1% to 2% interwoven steel.
The selection of air ionizers must be done with care with
awareness of the above limitations. The squirrel cage
ionized air blower has been proven to produce a significantly more even distribution of ion patterns than does a
conventional fan blower design.
15-30
ESD PROTECTION PROGRAM
Maintenance
ESO protective floor and table coverings must be properly
maintained. Do not wax over them. Cleaners must not degrade their electrical properties. Vacuum to remove loose
particles, followed by a wet mop with a solution of mild
detergent and hot water.
Periodic Audits
At Linear Technology Corporation periodic audits are conducted to check on the following at least once a month,
unless otherwise noted.
• Compliance with ESO control procedures.
• Ensure that the conductive ground cord connection is
intact by measuring the series resistance to ground
with an ohmmeter.
• Ensure that wrist straps are still functional by measuring the resistance from the person to ground. The
ground lead of the ohmmeter is connected to the
ground connection of the wrist strap, and the positive
lead is connected to a stainless steel electrode (one
inch in diameter, and three inches long #304 stainless
steel) which is held by the person. This test method not
only checks the resistance of the series resistor, but
also resistance through the ground cord and also any
contact resistance between the wrist strap and the person's skin. This test procedure is required when wrist
straps with an elastic nylon band with interwoven
metallic strands are used, since the metallic strands
breakdown with prolonged use. This monitor frequency
may be shortened depending on audit results.
• Measure the surface resistivity of conductive or static
dissipative table tops once every 6 months using
ASTM-F-150-72, ASTM-0-257 or ASTM-0-991 test methods as appropriate.
Materials Selection and Specification
Based on the tremendous amount of ESO protective
materials available, it is important that materials are selected based on astringent qualification. Once the materials have been selected and specifications defined, a
material procurement specification needs to be initiated
that defines the materials and quality requirements to the
vendor. One of the major pitfalls is to procure material in
haste, e.g., a wrist strap, only to find out it does not perform reliably.
The SOAR-1 report titled "ESO Protective Material and
Equipment: A Critical Review" published by the Rome Air
Development Center is an excellent reference on the various types of ESO protective materials available.
At Linear Technology Corporation a minimum of three
manufacturing lots from a potential vendor are subjected
to qualification testing per the requirements of the material procurement specification for ESO protective materials.
The vendor is considered qualified only when all three lots
are found to be acceptable. Once vendors have been qualified, all incoming ESO protective materials are subjected
to astringent incoming inspection.
The following table summarizes a sample material and
test specification for ESO protective materials.
Wrist Strap Resistance Test Set-Up
#304
OHMj_ETE_R----",
STAINLESS STEEL
ELECrOOE
.
@
-p"
15-31
ESD PROTECTION' PROGRAM
MATERIAL
Wrist Strap
Conductive or Static
Dissipative Table and Floor
Coverings, Conductive Tote
Boxes, Conductivd Shoe
Straps
Conductive Foam
Antistatic and Conductive
Dip Tubes
Antistatic and Conductive
Bags
Static Eliminatorsflonized Air
Blowers
PROPERTIESI DESCRIPTION
• Insulated coil cord with a 1M!! ± 10%, V.W minimum
series resistor molded into snap fastener (at wrist end),
and an elastic wrist band with inner metallic filaments
and insulative exterior.
• Must not shed particles
• Must not support bacterial or fungal grbwth
• Conductive: surface resistivity <10 501square. Static
Dissipative: surface resistivity> 10 5 and <1090/square.
• Shall not contain more than 30PPfll CI, K, Na when a
quantitative chemical analysis is' performed
• Must not support bacterial or fullgal growth
• Must not exhibit an oily·like film
• Antistatic bags must meet MIL·B·81705Iype 2
• Conductive bags must meet MIL·B·I17 and sealing
requirements of MIL·B·81705
• Must nol support bacterial or fungal growth
• Ozone level: 0.1 ppm maximum for 8hour exposure
• Noise: 60dB maximum
• EMI: non-detectable when measured 6 inches away
TEST METHODS
Measure series resistance with ohmmeter. Apply normal
tug to both ends of strap and remeasure series resistance.
Resistance must be between 0.8 to 1.2M!!.
Test per ASTM.F.150.726ASTM·D·257, ASTM·D·991 (for
surface resistivity <10 a/square).
With devices inserted into the foam, the foam must not
cause lead corrosion after a 24 hour85°C/85% RH
temperature/humidity storage.
Must meet an Electrostatic Decay test per Federal Test
Method Standard 101 Test Method 4046. Material charged
to 5000V must be discharged to I % of its initial value (50V)
in 2seconds after a 24 hour conditioning at 15% relative
humidity.
Test method for antistatic bags same as for antistaticl
conductive dip tubes. Test method for conductive bags
same as for conductive table/floor coverings.
Voltage Decay test: A non·conductive sheet of material
charged to 5kV must be discharged to I % of its initial value
(50V) in 2seconds at a distance of 2 feet from the ionizer or
larger distance if application calls for a larger distance.
Training and Certification Program
The training program should be developed to increase
ESD awareness and to assist all personnel in complying
with the ESD control specification. The program should
include:
1. Adiscussion on "What is Static Electricity?"
ESD awareness, it is often a good idea to show ESD
awareness films and video tapes which are available from
a variety of sources (Reference 3 provides a list of films
and video tapes). Personnel are retrained and recertified at
aminimumfrequency of once per year.
2. How ESD affects ICs
Measuring the Benefits
3. Estimated cost of ESD related losses
Where possible, the benefits of an ESD Protection Program should be tracked and quantified. The two yardsticks used at Linear Technology Corporation are final test
yields and QA electrical average outgoing quality (AOQ).
Since the implementation of this program, there has been
asignificant improvement in final test yields especially on
static sensitive CMOS devices. With the elimination of
ESD as a potential failure cause, the electrical AOQ has
averaged well under 100ppm for all products combined.
Improvements such as this help to provide positive feedback to manufacturing and support personnel on the importance of an ESD Protection Program, and also help to
ensure its continuing success.
4. Materials and equipment for controlling static
5. The importance of wearing the wrist strap
6. The importance of an audit program
7. Encourage floor personnel to feedback any ESD potential areas to the ESD task force
ESD training should be incorporated into the personnel
training and certification program. At Linear Technology
Corporation only fully trained and certified personnel are
allowed to do actual production work. To help increase
15-32
ESD PROTECTION PROGRAM
References
1. DOD·STD·1686
Electrostatic Discharge Control
Program for Electrical and Elec·
tronic Parts, Assemblies and
Equipment.
2. DOD·HDBK·263
Electrostatic Discharge Control
Handbook for Electrical and Elec·
tronic Parts, Assemblies and
Equipment.
3. SOAR·1
4. VZAp·1
State·of·the·Art Report ESD Pro·
tective Materials and Equipment:
ACritical Review, published by
the Rome Air Development
Center.
Electrostatic Discharge (ESD)
Susceptibility of Electronic De·
vices published by the Rome Air
Development Center.
5. EOS·1, EOS·2,
etc.
Electrical Overstress/Electro·
static Discharge Symposium Pro·
ceedings 1979 to current year.
6. MIL·STD·883C
Test Methods and Procedures For
Microelectronics
7. MIL·M·38510F
Microcircuits, General Specifica·
tion for
8. MIL·M·55565A
Microcircuits, Packaging of
9. MIL·M·81705B
Barrier Materials, Flexible, Elec·
trostatic-Free, Heat Sealable
10. FED·STD·101
Preservation, Packaging and
Packing Materials Test Proce·
dures; Test Methods. 4046: Elec·
trostatic Properties of
15-33
NOTES
15-34
'
...
·••
.
llnlt\Q
~, TECHNOLOGY~-SURFACE MOUNT PRODUCTS
Introduction
Linear Technology Corporation was founded in 1981 to address the growing demand for high performance and
superior quality linear integrated circuits_
Today, Linear Technology has successfully established a
leadership position by introducing and supplying leading
edge products in each of the industry's basic functional
groups-op amps, comparators, voltage regulators, references, switched-capacitor filters, interface, data conversion, and avariety of special function CMOS devices, in all
major package styles.
accommodated by the smaller SO-8 package. Although it
is preferable for an SO-8 device to have the same pin-out
as the standard 8-pin dual-in-line version, some devices
necessitate arotation of the die to fit in the SO-8 package.
Please refer to the applicable SO device datasheet, or
consult with the factory to verify exact pinouts for each
device.
NO OF lEADS
8
Early on, Linear Technology made the commitment to provide advanced technology, surface mount packaging. This
makes Linear Technology the first company to offer true
precision and high performance linear devices across the
full range of functional categories, plus many of the popular second-source devices in JEDEC Standard SO-8, 14, 16
and SOL-16, 18 and 20 pin packages.
0336-0344
This section contains information summarizing Linear
Technology's capabilities and services for surface mount
packaged products, as well as specific device datasheets.
Package Descriptions
Linear Technology's SO packages conform to Standard
JEDEC SOIC outlines. Figure 1 represents the 8, 14 and
16-lead narrow (150 mil width) SO packages. The 300 mil
width large cavity SOL package is pictured in Figure 2.
In some instances, an LTC product available in an 8-pin
standard DIP package is offered in a 16'pin SOL package.
This covers the situation where the die is too large to be
0228-0244
(8534-8737)
16
0150-0.157
(9779-IQOO7)
15rnI~~~39"1
0010-0020.
r(ii2s4=o5oiil x4S
0053-0069
(t 346-1 752)
0385-0394
1
0008-0010
1::1'541
2
3
4
0004-0010
b~ ~
10101-02541
00"-0050-1
10400-12701
Support for Linear Technology's surface mount devices includes service for tape and reel, anti-static rails, quality
and reliability data, and datasheets on each product.
Linear Technology intends to address customer demand
for surface mount devices where technology and die sizes
permit, making the combination of small package size and
high performance linear devices readily available to our
users.
r-fA:i
',-1_ -1
~
"A"DlM
0188 0196
(4755-4978)
14
0014-0019
(0355-0483)
f
Ii--IWI::~I
TVP
NOTES
1 PKGMATERIAL PlASTIC
2 LEADMATERJAL A-42, TINPLATED
Figure 1
CJlli1--r
~
NQOFLEADS
(1~~~~_~04~,)
"A" DIM
16
16 15 14 13 A12 11 10 9
~"04500470
r -m
20 --Ip(1i-i~:",~-:i;i~\ii'<~8"-i1
r-...---+-,-I'",,25iiC73-:.;c13~08'''-i1
(1~~~_~56~~,)
24
28
~••_~.
SEE NOTE
.....Q....ZQQ..
u(I~~~=~o4~3)
.
'---_--'-'-1'''-'77=80---''''-''''''''--'1
0291-0299
(739t_759S1}
1 2 3 4 5 6
0093-0104
(2362-2642)
7 8
0037-0045
-j 1::::=::~IX45l~'431
~~-i=tTVP ~~
SEE NOTE
0016-0050
L (~J!~J JL
(0406-1270)
0014-0019
(~~~=~~~~\
(0356-0482)
NOTE
PIN1IQENT,NOTCHONTOPANDCAVITIES
ON THE BOTTOM OF PACKAGE ARE THE
MANUFACTURING OPTIONS THE PART
MAVBESUPPLIEDWITHORWITHOUT
ANY OF THE OPTIONS
Figure 2
15-35
SURFACE MOUNT PRODUCTS
Electrical Specifications
Lead Finish and Solderability
Wherever possible, electrical specifications for an SO de·
vice are the same as the plastic molded equivalent. Excep·
tions to this are identified by the omission of the standard
product electrical grade designator from the part number.
For example:
Lead finish is electroplated, matte·tin, with a low carbon
content. Solderability meets the requirements of MIL·
STD·883C, Method 2003. Recommended solder pads are
given in Figure 3.
-LT1013DS8 has the same electrical specifications
as LT1013DN8, since the "0" is common to both prod·
uct numbers.
-LT1012S8 has one or more different electrical specifica·
tions than LT1012CN8, as the "C" is missing from this
product designator suffix.
Please consult the appropriate SO package datasheet for
complete electrical specifications.
Marking
Because of the limited space available for part marking on
some SO packages, abbreviated marking codes are used
to identify the device. These codes, if used, are identified
in the individual SO package datasheets.
Wave and Reflow Soldering
Following are the recommended procedures for soldering
surface mount packages to PC boards.
1. Wave Soldering
•
•
•
•
Use solder plating boards.
Dispense adhesive to hold components on board.
Place components on board.
Cure adhesive per adhesive manufacturer's speci·
fication.
• Foam flux using RMA (Rosin Mildly Activating) flux
or an organic acid flux if more aggressive flux is
required.
Wave solder using a dual wave soldering system at
240°C to 260°C for 2seconds per wave.
• Clean board.
*.
'Note: LTC packages will survive temperatures of 260°C for 10 seconds.
Recommended Solder Pads
SO·8, SO·14, SO·16
SOL·16, SOL·18, SOL·20
rt9999
Q6666
·040_0.055
I 'I
. . ---r-1
0028-0035
0.420
MIN
0.050-H
TYP
Figure 3. Wave and Reflow Soldering
15-36
T
0.315-0.335
I
H-
0.050
TYP
SURFACE MOUNT PRODUCTS
2. Reflow Soldering
•
•
•
•
•
Use solder plating boards.
Screen solder paste on board.
Mount components on board.
Bake for 15-20 minutes at 65°C-90°C.
Reflow solder paste. The solder paste temperature
must be 200°C for at least 30 seconds. LTC recommends vapor phase or infra red ref low systems for
best performance.
• Clean boards.
DEVICE
TYPE
OP07
LT385-1.2
LT1012
LTC1044/7660
LT1021
SS
200
40
46
59
45
390
# DEVICE # DEVICE # DEVICE
HOURS
HOURS
HOURS
AT
AT
AT
125°C(I)
55°C(I) # FAILURES
150°C
211.8K
1186.1K 591.9KK
0
41.9K
234.7K 117.1KK
0
29.4K
164.6K
82.1KK
0
47.4K
265.6K 132.5KK
0
0
23.4K
131.0K
65.4KK
0(4)
353.9K
1982.0K 989.0KK
• 85/85 With Bias
Thermal Information
Table 1shows the range of junction-to-ambient thermal resistance of devices mounted on a PCB of FR4 material
with copper traces, in still air at 25°C. OJA with a ceramic
substrate is about 70% of the FR4 value. Maximum power
dissipation may be calculated by the following formula:
PD MAX [TA]
58 (8 Lead Small Outline Plastic DIP)
Reliability Data • October 1986
• Operating Life
=TjM~X- TA
JA
where Tj MAX = Maximum operating junction temperature.
TA=Desired ambient operating temperature.
OJA = Junction to ambient thermal resistance.
DEVICE TYPE
OP07
LTC1044C
SS
153
78
TOTAL DEVICE
HOURS
234.3K
114.2K
348.5K
# FAILURES
0
0
0
SS
304
103
85
148
TOTAL DEVICE
HOURS
260.4K
161.8K
129.6K
38.0K
589.8K
#FAILURES
0
1(3)
0
1
2
• Autoclave
DEVICE TYPE
OP07
LTC1044C
LM385B·l.2
LT1012
• Temperature Cycle (Airto Air) - 65·C to 150·C
SO-8
SO·14
SO·16
150 to 200 0 C/W
l00tol40oC/W
90 to 130 0 C/w
SOL-16
SOL-18
SOL·20
85to 1000 C/w
70 to l000C/w
70 to 90 0 C/W
DEVICE TYPE
OP07
LTC1044C
SS
155
96
Conditions: PCB mount on FR4 material, still air at 25°C, copper trace.
Table 1. Typical Thermal Resistance Values
Product Reliability
Linear Technology Corporation publishes a reliability data
pak on a quarterly basis for our complete range of hermetic and plastic devices. The data generated on the SO-8
compares favorably with that generated for dual-In-line
packages. The tests that are run to assess package and
device reliability are high temperature operating life with
electrical bias, temperature and humidity under bias
(85/85), autoclave, temperature cycle, and thermal shock.
A sample of the data for the S8 (SO-8 small outline plastic
DIP) is shown below.
TOTAL DEVICE
CYCLES
465.0K
192.0K
657.0K
# FAILURES
0
0
0
• Thermal Shock (Liquid to Liquid) - 65°C to 150°C
DEVICE TYPE
OP07
LTC1044C
Note 1:
Note 2:
Note 3:
Note 4:
SS
156
96
TOTAL DEVICE
CYCLES
312.0K
91.7K
403.7K
# FAILURES
0
0
0
=
Assumes E. 1.0eV.
1Fit =1failure in 10 9 device hours.
Non·functional-Bonding pad corrosion.
Failure rate at 55°C 1.2 fits(2) to a 60% confidence level.
More current data, by device type, may be obtained by
contacting Linear Technology Corporation, Marketing
Department.
15-37
III
SURFACE MOUNT PRODUCTS
Tape and Reel Packing
Plastic Tube Packing
Tape and reel packing is available for all SO and SOL packages (except 18-lead) in accordance with EIA Specification
481-A. Table 2 lists the applicable tape widths, dimensions, and quantities for all LTC small-outline products.
Consult factory for tape and reel pricing and minimum order requirements.
Linear Technology SO and SOL packaged devices are
packed in conductive plastic tubes with the dimensions indicated in Figure 4. Unit quantities per tube are as listed in
Table 3.
COMPONENT
PACKAGE TAPE SIZE
PITCH
12mm
8mm
SO-8
SO-14
16mm
Bmm
SO-16
16mm
8mm
SOL-16
16mm
12mm
SOL-1B'
SOL-20
24mm
12mm
'Unavailable at thiS time.
-
-
HOLE
REEL
PARTS PER
PITCH DIAMETER
REEL
4mm
13"
2500
4mm
13"
2500
4mm
2500
13"
4mm
13"
1000
-
4mm
-
13"
Table 2. Tape and Reel Packing Specifications
15-38
-
1000
SO-8
SO·14
SO·16
100 ea.
60 ea.
50 ea.
SOL·16
SOL·18
SOL·20
SOL·24
SOL·28
Table 3. Devices Per Tube
50 ea.
40 ea.
40 ea.
31 ea.
27 ea.
SURFACE MOUNT PRODUCTS
Linear Technology Corp. packs their SO and SOL products
in either conductive plastic tubes or tape and reel, depending on customer preference. Plastic tubes are manufactured to LTC specifications, while tape and reel packing
follows EIA specification 481-A, and is an extra cost item.
The following pages describe and detail these packing
methods.
PLASTIC TUBE SPECIFICATiOnS
SOL Package Shipping Tube
SO Package Shipping Tube
0.060
r"[ -r
0.310
REF
0.250
KEEP FLAT
00 NOT ROUND
OUT
0.010 RAD
REF
0.580
.
+ 1116.
Length. 20.50 -1132 Inches
0.050 ---+-~.,.....j
~ 0.030 ±
0.005
TVPWALL
.
+1132.
Length. 20.75 -1116 Inches
Figure 4.
m
Note 1: Tolerances: :!: 0.010 unless otherwise specified.
Note 2: Material: anti·static treated rigid transparent PVC or rigid black conductive.
Note 3: Printing: "LTC logo, Linear Technology Corp., Antistatic" on top side of tube.
15-39
SURFACE MOUNT PRODUCTS
TAPE AnD REEL SPECIFICATions
Embossed Carrier Dimensions (12, 16, 24mm Tape Only)
Po--->~-
TOP
COVER
TAPE
B1
L
~
Ko
SEE NOTE 1
FOR MACHINE REFERENCE ONLY
INCLUOING DRAFT AND RADII
CONCENTRIC AROUND Bo
CENTER LINES
OF CAVITY
USER DIRECTION OF FEED
Embossed Tape-Constant Dimensions
D
E
I (Max.) Ao Bo Ko
Po
4.0±0.10
0.400 See Note 1
+0.10 1.75±0.10
-0.0 (0.069 ± 0.004) (0.157 ±0.004) (0.016)
Tape Size
12,16,
24mm 1.5
~ ~:~04
0.059
Embossed Tape-Variable Dimensions
Tape Size
12mm
16mm
24mm
B1
Max.
8.2
(0.323)
12.1
(0.476)
20.1
(0.791)
D1
Min.
F
1.5
(0.059)
5.5 ± 0.05
(0.217 ± 0.002)
7.5±0.10
(0.295 ± 0.004)
11.5±0.10
(0.453 ± 0.004)
K
Max.
4.5
(0.177)
P2
2.0±0.05
(0.079 ± 0.002)
6.5
(0.256)
2.0±0.10
(0.079 ± 0.004)
Nolet Ao Bo Ko are determined by component size. The clearance between
the component and the cavity must be within 0.05 (0.002) min. to 0.65 (0.026)
max. for 12mm tape, 0.05 (0.002) min. to 0.90 (0.035) max. for 16mm tape and
0.05 (0.002) min. to 1.00 (0.039) max. lor 24mm tape and larger. The compo·
15-40
R
Min.
30
(1.181)
40
(1.575)
50
(1.969)
P(SO)
P(SOL)
W
8.0±0.10
12.0 ± 0.30
(0.472 ± 0.012) (0.315 ± 0.04)
16±0.30
8.0±0.10
12.0±0.10
(0.630 ± 0.012) (0.315 ± 0.04) (0.472 ± 0.004)
24 ± 0.30
(0.945 ± 0.012)
nent cannot rotate more than 20° within the determined cavity, see
Component Rotation.
Nole 2: Tape and components shall pass around radius "R" without
damage.
SURFACE MOUNT PRODUCTS
TAPE AnD REEL SPECIFICATions
Bending Radius
Component Rotation
TYPICAL
COMPONENT CAVITY
CENTER LINE
RMIN
TYPICAL
COMPONENT
CENTER LINE
BENOING RADIUS
SEE NOTE 2
Tape Camber (Top View)
lODmm
14------(3.937)------.1
~-----------2Wmm
(9.843)------------.j
Allowable camber 10 be 1mrnl100mm nonaccumulalive over 250mm
Tape Leader (Start/End) Specification
END
o
~
t
0
0
0
0
0
0
0
lH3llH3l E3l
NO COMPONENTsTCOMPONENTstNO
40mm (1 575) MIN
.
COMPONENTS~
START
MIN 500mm (19.685)
MAX 560mm (22.047)
~ EMPTY COMPONENT ~
POCKETS SEALEO
WITH COVER TYPE
lEI
USER DIRECTION OF FEED
15-41
SURFACE MOUNT PRODUCTS
REEL DimEnSions
Direction of Feed
TOP COVER
TAPE THICKNESS (11)
0.10mm MAX THICK
(.004)
.......:::~--EMBOSSMENT
Reel Dimensions
40mm (1.575) MIN.
ACCESS HOLE
AT SLOT LOCATION
A
tA~\
~~\
0"1
\
t " . . _-
I
FULL RADIUS"
TAPE SLOT IN CORE
FOR TAPE START.
2.5mm (0.098) MIN WIDTH
10mm (0.394) MIN DEPTH
"DRIVE SPOKES OPTIONAL IF USED
ASTERISKED DIMENSIONS APPLY.
Tape
Size
12mm
16mm
A
Max.
330
(12.992)
B
Min.
1.5
(0.059)
360
(14.173)
1.5
(0.059)
G(MEASURED AT HUB)--II-
13.0 ± 0.20
(0.512 ± 0.008)
D"
Min.
20.2
(0.795)
N
Min.
50
(1.969)
13.0 ± 0.20
(0.512 ± 0.008)
20.2
(0.795)
50
(1.969)
e
12.4
T
Max.
18.4
(0.724)
164 +2.0
. -0.00
22.4
(0.882)
G
~~:~
(0.488 ~ ~:~78)
(0.646
24mm
360
(14.173)
1.5
(0.059)
13.0 ± 0.20
(0.512 ± 0.008)
20.2
(0.795)
50
(1.969)
24.4
(0.961
"Metric dimensions will govern.
English measurements rounded and for reference only.
15-42
~~:~8)
~~:~
~~:~~8)
30.4
(1.197)
SURFACE MOUNT PRODUCTS
SURFACE MOUNT PARTS LIST
LF398S8, Precision Sample and Hold Amplifier ..
LM318S8, High Speed OpAmp .................. .
LM334S8, Constant Current Source and Temperature Sensor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LM385S8-1.2/LM385S8-2.5, Micropower Voltage Reference ........................ , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTl001CS8, PrecisionOpAmp ... .... ................. . . ....... . . ........ ...... .... ..................... . . ... . .
LTl004CS8-1.2ILT1004CS8-2.5, Micropower Voltage References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LT1006S8, Precision, SingleSupplyOpAmp .............. .. . .. . .... . . ... . ... ....... ................... . . . ..... ....
LTl001CSIL Tl031CS, Low Noise, High Speed Precision Op Amps. . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTl009S8, 2.5 Volt Reference . .......... ......... ....... . ........ . .... . ....... ...... ...... .......... .. .. .......
LTl012S8, PicoamplnputCurrent, MicrovoltOffset, Low Noise OpAmp ...................................................
LTI 0130S8, Oual Precision Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . ..
LTl016CS8, Ultra Fast Precision Comparator .......................................................................
LTlOl1CSILT1018CS, MicropowerDualComparator ................................................................
LTl020CS, Micropower Regulator and Comparator ..................................................................
LTl021DCS8, Precision Reference ..............................................................................
LTI 028CS, Ultra-Low Noise Precision High Speed Op Amp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . ..
LTl030CS, Quad Low Power Line Driver ..........................................................................
LTl034CS8-1.2ILTl034CS8-2.5, Micropower Dual Reference . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTl054CSIL Tl0541S, Switched Capacitor Voltage Converter with Regulator ...............................................
LTl055S81L Tl056S8, Precision, High Speed, JFET InputOpAmps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .. . . . . . . . . . . .. ..
LTl051SIL Tl051lS, DualJFETlnput Precision High Speed Op Amps. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . ..
LTI 080CSILT1081 CS, 5V Powered RS232 DriverIReceiver with Shutdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1043CS, Dual Precision Instrumentation Switched-Capacitor Building Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LTC1044CS8, Switched Capacitor Voltage Converter. . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . .
LTC1052CS, Chopper-StabilizedOpAmp(CSOA™j.... ........ ... . .... . . ........ ... ....... ...... . ............ . .... ..
LTC1059CS, High Performance Switched Capacitor Universal Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1060CS, Universal Dual Filter Building Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . .
LTC1061CS, High Performance Triple Universal Filter Building Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LTC1062CS, 5th Order Low Pass Filter. . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OP-07CS8, Precision Op Amp ..................................................................................
...SG3524S, Regulating Pulse Width Modulator. . .. . .. .. . . .. . . . .. . ... . . . . .. . . ... . ... .. . . .. ... ... ... . .. ... . . . . ..... ....
9-113
2-319
3-99
3-113
2-23
3-25
2-53
2-69
3-31
2-117
2-141
6-41
6-53
4-45
3-57
2-177
10-9
3-81
5-35
2-231
2-247
10-51
11-31
5-21
2-217
7-11
7-35
7-55
7-71
2-337
5-93
15-43
NOTES
15-44
~""""'-Llntf\12
~,
DICE PRODUCTS
TECHNOLOGY~------
INTRODUCTION
Linear Technology Corporation offers a wide variety of
precision linear IC's in die form. It is our intent to offer
dice electrically tested to levels which can be expected to
yield the best possible performance in hybrid circuits.
Complicating this task is the fact that many specifications
given for our standard packaged products cannot be
tested at the wafer level. Further, parameters which are
100% tested at wafer probe testing may shift during the
die attach/assembly process.
12 mils to 20 mils, depending on product type. Bond pad
dimensions are 4.5 x4.5 mils. minimum.
Topside Passivation
GENERAL INFORMATION
Linear Technology products are passivated with a two
layer system: A proprietary deposited oxide gives a crackfree conformal coverage of metal and oxide steps. A
plasma nitride overcoat protects the die from ionic contamination and scratches during handling, testing and
assembly. Note that LTC uses fuse link and zener zap
trimming techniques which require windows in the passivation over the trim points. This passivation system is a
major contributor to the extremely high reliability demonstrated throughout millions of device-hours of accelerated
testing of LTC devices in plastic and hermetic packages.
Electrical Testing
Topside Metallization
Dice are 100% tested in wafer form at 25°C to the DC limits shown on the dice data sheet for a given device type.
Many LTC packaged products have multiple electrical
grades associated with a basic die type. Across reference
appears on each dice data sheet indicating which die
product grade should be ordered to optimize candidates to
meet the specifications of the desired finished product
grade. This information should be used as aguideline only
since LTC does not guarantee electrical specifications after assembly. Since electrical testing is done only at 25°C,
no absolute guarantee can be made regarding performance at other temperatures. Some LTC products require
post-package trimming to overcome certain assembly related parameter shifts. Details on this trimming may be
obtained by contacting the factory.
The metallization is a minimum of 11,000 A thick unless
otherwise specified. The quality of the metallization step
coverage is monitored via a weekly SEM inspection per
MIL-STD-883, Method 2018.
There is a Dice Products Catalog available that contains
ordering information and datasheets for obtaining dice
products. Catalogs are available from your local LTC
Sales Rep, or from LTC Communications at (800) 637-5545.
Visual Inspection
Dice are 100% visually inspected in accordance with MILSTD-883, Method 2010 Condition B.
Chip Dimensions
Chip dimensions are as indicated on individual dice data
sheets. Tolerance is ± 1 mil. Chip thickness ranges from
Backside Metal
Most dice product backsides are coated with an alloyed
gold layer. There are some CMOS products with no backside metallization. In addition, some voltage regulators
may be specially ordered with a chrome-nickle-silver
(Cr-Ni-Ag) backside layer. Contact LTC for details on this
type of backside layer or to inquire about availability of
LTC products with aparticular backside metallization.
Backside Potential
Linear Technology products are junction isolated. For
proper operation the backside must be electrically connected to the most negative potential seen by the IC (for
bipolar products) or the most positive potential (for CMOS
products). This information is also given in the individual
dice data sheets.
15-45
DICE PRODUCTS
Packaging
Electrostatic Discharge (ESD) Precautions
Dice are packaged in compartmentalized waffle packs for
ease of handling and storage. Each waffle pack contains
100 dice. Special packaging methods are also available by
contacting the factory.
Precision linear devices, especially those with very low
(pA) input bias current levels and low «50 microvolts) input offset voltages are susceptible to shifts in .electrical
performance and ESD damage as aresult of improper handling. LTC recommends that ESD precautions, such as
grounded conductive work stations, grounded conductive
wrist straps and grounded equipment, be taken to prevent
ESDdamage.
Quality Levels of Dice Shipped
Each dice lot is guaranteed to meet the following
requirements:
I Internal visual per MIL-STD-883, Method 2010
Condition B: 1.0% AQL Level II.
I Electrical: Due to variations in assembly methods and
packaging techniques LTC does not guarantee electrical specifications after assembly. When a determination as to the finished product assembly yield is needed,
the lot acceptance testing available at extra cost should
be pursued.
ORDERING INFORMATION
Dice may be ordered by the part number defined in the
dice data sheet. Minimum direct dice order, per delivery, is
1000 pieces or $5,000, whichever is greater. In some cases,
tighter parameter selections than indicated on the dice
data sheets can be obtained by special order. Please contact the factory for details.
Reliability Assurance
Lot Acceptance Testing
In addition to the more conventional reliability audits performed on finished products, LTC has innovated a unique
periodic wafer fab reliability audit using a specially designed reliability structure that is stepped into all wafers.
The test structure is optimized to accelerate the two
primary failure mechanisms in linear circuits, namely mobile positive ions and surface charge-induced inversions.
This provides a continuous monitor on the reliability performance of LTC's wafer fab processes and provides
immediate feedback to wafer fab typically within one
week.
Lot acceptance testing (LAT.) based on sample assembly
and testing is available at extra cost. Sample sizes and ac-ceptable electrical test limits vary from device to device
and must be negotiated at the time of quoting. Contact the
factory for details.
15-46
~""""-Llnet\Q
APPLICATION NOTES
....A.."
TECHNOLOGY~-----AN1
Understanding and Applying the LT100S Multifunction Regulator
This application note describes the unique operating characteristics of the Ln005 and describes a number of useful applications which take advantage of the regulator's ability to control
the output with a logic control signal.
AN2
Performance Enhancement Techniques lor 3-Terminal
Regulators
This application note describes a number of enhancement
circuit techniques used with eXisting 3-terminal regulators
which extend current capability, limit power dissipation, provide
high voltage output, operate from 110VAC or 220YAC without the
need to switch transformer windings, and many other useful
application ideas.
AN 3
Applications lor a Switched-Capacitor Instrumentation Building
Block
This application note describes a wide range of useful
applications for the LTC1043 dual precision instrumentation
switched-capacitor building block. Some of the applications
described are ultra high performance instrumentation amplifier,
lock-in amplifier, wide range digitally controlled variable gain
amplifier, relative humidity sensor signal conditioner, LVDT
signal conditioner, charge pump F to V and V to F converters,
12-bit A to Dconverter and more.
AN9
Application Considerations and Circuits lor a New
Chopper-Stabilized Op Amp
A discussion of circuit, layout and construction considerations
for low level DC circuits includes error anl\lysis of solder, wire
and connector junctions. Applications include sub-microvolt instrumentation and isolation amplifiers, stabilized buffers and
comparators and precision data converters.
AN 11
Designing Linear Circuits lor 5V Operation
This note covers the considerations for
linear circuits which must operate from
Applications include various transducer
instrumentation amplifiers, controllers
converters.
designing precision
a single 5V supply.
Signal conditioners,
and isolated data
AN 12
Circuit Techniques lor Clock Sources
Circuits for clock sources are presented. Special attention is
given to crystal-based designs including TXCOs and VXCOs.
AN13
High Speed Comparator Techniques
The AN13 is an extensive discussion of the causes and cures of
problems in very high speed comparator circuits. A separate
applications section presents circuits, including a 0.025%
accurate 1Hz-30MHz V to F converter, a 200ns 0.01 % samplehold and a 10MHz fiber optic receiver. Five appendices covering
related topics complete this note.
AN14
Designs lor High Frequency Voltage-To-Frequency Converters
A variety of high performance V to F circuits is presented.
Included are a 1Hz to 100MHz design, a quartz stabilized type
and a 0.0007% linear unit. Other circuits feature 1.5V operation,
sine wave output and non-linear transfer functions. A separate
section examines the trade-offs and advantages of various
approaches to Vto Fconversion.
AN4
Applications lor a New Power Buller
The LT1010 150~A power buffer is described in a number of useful applications such as boosted op amp, a feed-forward, wideband DC stabilized buffer, a video line driver amplifier, a fast
sample-hold with hold step compensation, an overload protected motor speed controller, and a piezoelectric fan servo.
AN5
Thermal Techniques in Mea.surement and Control Circuitry
6 applications utilizing thermally based circuits are detailed.
Included are a 50MHz RMS to DC converter, an anemometer, a
liquid flowmeter and others. A general discussion of thermodynamic considerations involved in circuitry is also presented.
AN15
Applications 01 New Precision Op Amps
Application considerations and circuits for the Ln001 and
Ln002 single and dual precision amplifiers are illustrated in a
number of circuits, including strain gauge signal conditioners,
linearized platinum RTD circuits, an ultra precision dead zone
circuit for motor servos and other examples.
Circuitry lor Single Cell Operation
1.5V powered circuits for complex linear functions are detailed.
Designs include a V to F converter, a 10 bit A-D, sample-hold
amplifiers, a switching regulator and other circuits. Also
included is a section on component considerations for 1.5V
powered linear circuits.
AN16
Unique IC Buller Enhances Op Amp Designs, Tames Fast
Amplifiers
This note describes some of the unique IC design techniques
incorporated into a fast, monolithic power buffer, the Ln010.
Also, some application ideas are described such as capacitive
load driving, boosting fast op amp output current and power
supply circuits.
AN 17
Considerations lor Successive Approximation A- 0 Converters
A tutorial on SAR type A-D converters, this note contains
detailed information on several 12-bit circuits. Comparator,
clocking, and pre-amplifier designs are discussed. A final circuit
gives a 12-bit conversion in 1.8~s. Appended sections explain the
basic SAR technique and explore DAC considerations.
AN18
Power Gain Stages for Monolithic Ampliliers
This note presents output stage circuits which provide power
gain for monolithic amplifiers. The circuits feature voltage gain,
current gain, or both. Eleven designs are shown, and performance is summarized. A generalized method for frequency
compensation appears in a separate section.
AN6
AN 7
AN8
Some Techniques for Direct Digitization of Transducer Outputs
Analog-to-digital conversion circuits which directly digitize low
level transducer outputs, without DC preamplification, are
presented. Covered are circuits which operate with thermocouples, strain gauges, humidity sensors, level transducers and
other sensors.
Power Conditioning Techniques lor Batteries
A variety of approaches for power conditioning batteries is
given. Switching and linear regulators and converters are shown,
with attention to efficiency and low power operation. 14 circuits
are presented with performance data.
15-47
II
APPLICATION NOTES
AN19
AN20
LT1070 Design Manual
This design manual is an extensive discussion of all standard
switching configurations for the LT1070; including buck, boost,
flyback, forward, inverting and "Cuk". The manual includes
comprehensive information on the LT1070, the external components used with it, and complete formulas for calculating
component values.
Applications for a DC Accurate Low·Pass Switched·Capacitor
Filter
Discusses the principles of operation of the LTC1062 and helpful
hints for its application. Various application circuits are ex·
plained in detail with focus on how to cascade two LTC1062's
and how to obtain notches. Noise and distortion performance
are fully illustrated.
AN21
Composite Amplifiers
Applications often require an amplifier that has extremely high
performance in several areas. For example, high speed and DC
preCision are often needed. If a single device cannot simultane·
ously achieve the desired characteristics, a composite amplifier
made up of two (or more) devices can be configured to do the
job. AN21 shows examples of composite approaches in designs
combining speed, preCision, low noise and high power.
AN22
AMonolithic IC for 100MHz RMS·DC Conversion
AN22 details the theoretical and application aspects of the
m088 thermal AMS·DC converter. The basic theory behind
thermal AMS-DC conversion is discussed and design details of
the LT1088 are presented. Circuitry for AMS·DC converters,
wideband input buffers and heater protection is shown.
AN23
Micropower Circuits for Signal Conditioning
Low power operation of electronic apparatus has become
increasingly desirable. AN23 describes a variety of low power
circuits for transducer signal conditioning. Also included are
designs for data converters and switching regulators. Three
appended sections discuss guidelines for micropower design,
strobed power operation and effects of test equipment on
micropower circuits.
AN24
Unique Applications for the LTC1062 Lowpass Filler
Highlights the LTC1062 as a lowpass filter in a phase lock loop.
Describes how the loop's bandwidth can be increased and the
VCO output jitter reduced when the LTC1062 is the loop filter.
Compares it with a passive AC loop filter.
Also discussed is the use of LTC1062 as simple bandpass and
bandstop filter.
15-48
AN25
Switching Regulators for Poets
Subtitled" A Gentle Guide for the Trepidatious", this is a tutorial
on switching regulator design. The text assumes no switching
regulator design experience, contains no equations, and requires no inductor construction to build the circuits described.
Designs detailed include flyback, isolated telecom, off·line, and
others. Appended sections cover component considerations,
measurement techniques and steps involved in developing a
working circuit.
AN26
A collection of interface applications between various microprocessors/controllers and the LTC1090 family of data acquisi·
tion systems. The note is divided into sections specifiC to each
interface. The following sections are available:
Microprocessorl
Number
AID
Microcontroller
AN26A
LTC1090
8051
AN26B
LTC1090
68HC05
AN26C
LTC1090
63705
AN26D
LTC1090
COP820
LTC1090
AN26E
TMS7742
LTC1090
AN26F
COP402N
LTC1091
AN26G
8051
AN26H
68HC05
LTC1091
AN261
COP820
LTC1091
AN26J
TMS7742
LTC1091
LTC1091
AN26K
COP402N
AN26L
HD63705VO
LTC1091
AN26M
LTC1090
TMS320C25
AN26N
LTC1091192
TMS320C25
AN260
LTC1090
Z-80
AN26P
LTC1090
HD64180
LTC1091
AN26Q
HD64180
AN26R
LTC1094
TMS320C25
These interface notes demonstrate the ease with which the
LTC1090 family can be interfaced to microprocessors/con·
trollers having either parallel or serial ports. A complete
hardware and software description of the interface is included.
AN27A ASimple Method of Designing Multiple Order All Pole
Bandpass Filters by Cascading 2nd Order Sections
Presents two methods of designing high quality Switched
Capacitor bandpass filters. Both methods are intended to vastly
simplify the mathematics involved in filter design by using
tabular methods. The text assumes no filter design experience
but allows high quality filters to be implemented by techniques
not presented before in the literature. The designs are
implemented by numerous examples using devices from LTC's
Switched Capacitor filter family: LTC1060, LTC1061, and
LTC1064. Butterworth and Chebyshev bandpass filters are
discussed.
..L7l!O~
APPLICATION NOTES
AN28
AN29
Thermocouple Measurement
Considerations for thermocouple based temperature measure·
ment are discussed. A tutorial on temperature sensors summar·
izes performance of various types, establishing a perspective on
thermocouples. Thermocouples are then focused on. Included
are sections covering cold·junction compensation, amplifier
selection, differential/isolation techniques, protection, and
linearization. Complete schematics are given for all circuits.
Processor based linearization is also presented with the
necessary software detailed.
Some Thoughts on DC·DC Converters
This note examines a wide range of DC·DC converter applica·
tions. Single inductor, transformer, and switched capacitor
converter designs are shown. Special topics like low noise, high
efficiency, low quiescent current, high voltage, and wide·input
voltage range converters are covered. Appended sections
explain some fundamental properties of different types of
converters.
AN30
Switching Regulator Circuit Collection
Switching regulators are of universal interest. Linear Technology
has made a major effort to address this topic. A catalog of cir·
cuits has been compiled so that a design engineer can swiftly
determine which converter type is best. This catalog serves as a
visual index to be browsed through for a specific or general
interest.
AN 31
Linear Circuits for Digital Systems
Subtitled "Some Affable Analogs for Digital Devotees,"
discusses a number of analog circuits useful in predominantly
digital systems. Vpp generators for flash memories receive
extensive treatment. Other examples include a current loop
transmitter, dropout detectors, power management circuits, and
clocks.
AN32
High Efficiency Linear Regulators
Presents circuit techniques permitting high efficiency to be
obtained with linear regulation. Particular attention is given to
the problem of maintaining high efficiency with widely varying
inputs, outputs and loading. Appendix sections review com·
ponent characteristics and measurement methods.
AN33
Converting Light to Digits: LTC1099 Half Flash 8·Bit AID
Converter Digitizes Photodiode Array
This application note describes a Linear Technology "Half
Flash" AID converter, the LTC1099, being connected to a 256
element line scan photodiode array. This technology adapts
itself to hand held (i.e. low power) bar code readers, as well as
high resolution automated machine inspection applications.
AN34
LTC1099 Enables PC Based Data Acquisition Board to
Operate DC·20kHz
A complete design for a data acquisition card for the IBM PC is
detailed in this application note. Additionally, C language code
is provided to allow sampling of data at speeds of more than
20kHz. The speed limitation is strictly based on the execution
speed of the "C" data acquisition loop. A "Turbo" XT can
acquire data at speeds greater than 20kHz. Machines with 80286
and 80386 processors can go faster than 20kHz. The computer
that was used as atest bed in this application was an XT running
at 4.77MHz and therefore all system timing and acquisition time
measurements are based on that the 4.77MHz clock speed.
15-49
NOTES
15-50
LINEAR TECHNOLOGY CORPORATION
1630 McCarthy Blvd ., Milpitas, CA 95035
Phone: (408) 432-1900
FAX: (408) 434-0507
Telex: 499-3977
© LINEAR TECHNOLOGY CORPORATION 1989
IMfGP88950M
Source Exif Data:
File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.3 Linearized : No XMP Toolkit : Adobe XMP Core 4.2.1-c041 52.342996, 2008/05/07-21:37:19 Create Date : 2017:07:15 10:53:33-08:00 Modify Date : 2017:07:15 11:50:35-07:00 Metadata Date : 2017:07:15 11:50:35-07:00 Producer : Adobe Acrobat 9.0 Paper Capture Plug-in Format : application/pdf Document ID : uuid:4100153e-7ae9-894c-8b46-c9eb3a8483df Instance ID : uuid:38db8ac7-505c-2b40-a735-1838c9d2c738 Page Layout : SinglePage Page Mode : UseNone Page Count : 1439EXIF Metadata provided by EXIF.tools