1991_TI_Interface_Circuits_Data_Book 1991 TI Interface Circuits Data Book

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-I!I

TEXAS
INSTRUMENTS

Interface Circuits
Data Transmission and Control Circuits,
Peripheral Drivers/Power Actuators,
Display Drivers

1991

1991

Linear Products

Linear Products Quick Reference Guide
Data Book
•

Linear Circuits Vol 1
Operational Amplifiers
Amplifiers, Comparators, Voltage Comparators
and Special Functions
Video Amplifiers
Hall-Effect Devices
Timers and Current Mirrors
Magnetic-Memory Interface
Frequency-to-Voltage Converters
Sonar Ranging Circuits/Modules
Sound Generators

Linear Circuits Vol 2
• Data
Acquisition

Supervisor Functions
Series-Pass Voltage Regulators
Shunt Regulators
Voltage References
DC-to-DC Converters
PWM Controllers

SLYD005, 1989

Linear Circuits

Operational Amplifier Macromodels

SLOS047, 1990

Linear Circuits

SN75C091 SCSI Bus Controller

SLLS064, 1990

Telecommunications
Circuits

Equipment Line Interfaces
Subscriber Line Interfaces
Modems and Receivers/Transmitters
Ringers, Detectors, Tone Encoders
PCM Interface
Transient Suppressors

Optoelectronics and
Image Sensors

Optocouplers
CCD Image Sensors and Support
Phototransistors
IR-Emitting Diodes
Hybrid Displays

Supervisors

•

SLYD003, 1989

SLYD004, 1989

Linear Circuits Vol 3
• Voltage
Regulators and

•

Document No.

A/D and D/A Converters
DSP Analog Interface
Analog Switches and Multiplexers
Switched-Capacitor Filters

and Conversion

•
•
•

Contents

Speech System Manuals TSP50C4X Family
TSP50C 10/11 Synthesizer

SCTD001 A, 1988/89

SOYD002A, 1990

SPSS010, 1990
SPSS011, 1990
July 1990

General Information

Data Transmission and Control Circuits

~_D_i_s_PI_a_Y_D__riV_e_r_s______________________~I@_lII

Peripheral Drivers/Power Actuators

~_M__ec_h_a_n_i_ca_I_D__at_a_______________________
'h~

ifiiII

~_E_x_p_la_n_a_t_io_n__o_f_L_O_9_iC_S__ym
__b_O_IS_____________

Interface Circuits
Data Book

1990
Data Transmission and Control Circuits,
Peripheral Drivers/Power Actuators,
Display Drivers

~

TEXAS
INSTRUMENTS

IMPORTANT NOTICE
Texas Instruments (TI) reserves the right to make changes to or
to discontinue any semiconductor product or service identified
in this publication without notice. TI advises its customers to
obtain the latest version of the relevant information to verify,
before placing orders, that the information being relied upon is
current.
TI warrants performance of its semiconductor products to current
specifications in accordance with TI's standard warranty. Testing
and other quality control techniques are utilized to the extent TI
deems necessary to support this warranty. Unless mandated by
government requirements, specific testing of all parameters of
each device is not necessarily performed.
TI assumes no liability for TI applications assistance, customer
product design, software performance, or infringement of patents
or services described herein. Nor does TI warrant or represent that
any license, either express or implied, is granted under any patent
right, copyright, mask work right, or other intellectual property
right of TI covering or relating to any combination, machine, or
process in which such semiconductor products or services might
be or are used.
Texas Instruments products are not intended for use in life support
appliances, devices or systems. Use of a TI product in such
applications without the written consent of the appropriate TI
officer is prohibited.

Copyright

© 1990, Texas Instruments Incorporated

INTRODUCTION
In the 1990 Interface Circuits Data Book, the Linear Products Division of Texas Instruments presents technical
information on various products for electronic media and electronic devices.
TI's Interface circuits represent technologies from classic bipolar through BIDFET, Advanced Low-Power Schottky
(ALS), IMPACT"', LinBiCMOS"', and Advanced LinCMOS" processes. The ALS and IMPACT'" oxide-isolated
technologies provide the Interface family with improved speed-power characteristics. LinBiCMOS'" and Advanced
LinCMOS'" technologies feature a step-function improvement in impedance, speed, power dissipation, and
threshold stability.
This data book provides information on the following types of products:
•
•
•
•
•

Data-Transmission Circuits
High-Current Actuators and Peripheral Drivers
High-Voltage Display Drivers
Asynchronous Communication Elements
Intelligent-Power Devices

The data-transmission line drivers, receivers, and transceivers, which support many popular data transmission
standards, connect electronic devices and systems at high data rates over significant cable lengths. The highcurrent actuators and peripheral drivers combine both logic control and high-current drive capability in a single
package. For flat-panel, AC-plasma, vacuum fluorescent, and electroluminescent display applications, the highvoltage display drivers provide cost-effective and reliable service.
Among TI's new products in the 1990 Interface Data Book are Asynchronous Communication Elements (ACEs)
and Intelligent-Power devices. The ACEs provide complete universal interface capabilities between electronic
systems, which minimize device components and power dissipation while increasing data rates. The IntelligentPower devices are useful for applications that require high energy loads and load protection circuits operating
in harsh electrical environments.
These Interface products range from the classic line driver to the Asynchronous Communication Element. New
surface-mounted packages (8 to 68 leads) include both ceramic and plastic chip carriers, and the small-outline
(D) plastic packages that optimize board density with minimum impact on power dissipation capability.
The alphanumeric index provides a quick method of locating the correct device type, with new products as
indicated. The selection guide includes a functional description of each product with information on key
parameters and packaging types. A cross-reference table listing other manufacturers with the TI direct or nearest
replacement devices is also available. Ordering information and mechanical data are in the last section of this
data book.
While this volume offers design and specification data only for Interface components, complete technical data
for any TI semiconductor product is available from your nearest TI Field Sales Office, local authorized TI distributor,
or by writing directly to:
Texas Instruments Incorporated
LITERATURE RESPONSE CENTER
P.O. Box 809066
DALLAS, TEXAS 75380-9066
We sincerely feel that you will discover the new 1990 Interface Circuits Data Book to be a significant addition
to your collection of technical literature.

IMPACT"', LinBiCMOSN, and Advanced LinCMOSN are trademarks of Texas Instruments Incorporated.

v

vi

General Information

1-1

Contents
Page

Alphanumeric Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Transmission and Control Circuits - Selection Guide ...........
Data Transmission Circuits - Cross-Reference Guide . . . . . . . . . . . . . . .
Control Circuits - Cross-Reference Guide. . . . . . . . . . . . . . . . . . . . . . . .
Display Drivers - Selection Guide .............................
Display Drivers - Cross-Reference Guide . . . . . . . . . . . . . . . . . . . . . . . .
Peripheral Drivers/Actuators - Selection Guide . . . . . . . . . . . . . . . . . . . . .
Peripheral Drivers/Actuators - Cross-Reference Guide. . . . . . . . . . . . . . . .

1-2

1-3
1-6
1-11
1-13
1-14
1-1 7
1-18
1-20

ALPHANUMERIC INDEX

DEVICE
AM26LS31C ..
AM26LS32AC .
AM26LS32AM
AM26LS33AC .
AM26LS33AM
AM26S10C ..
AM26S11C ..
DP8480
. . . . . . .f.
... .f.
DP8481
. . . . . . f. .
DS36801 ..
L293 ...
L293D
L298.
... t.
L Tl030.
MAX232.
. . .t..
MC3450
MC3452 ............ .
MC3453
MC3486.
MC3487.
MC3550 . . . . . . . . . . .t.
MC3552.
. . . . . . f. . . . . . . . . . . .
. .....t ..
MC3553 ..
N8T26
SN5i5107A
SN551078
SN55108A
SN551088
SN55109A
SN551 lOA
. . . . . . .f.
SN55111
SN551 13
SN55114
SN551 1 5
SN551 16
SN55121
SN55122
SN55138
SN55157
SN55158
...... t ..
SN55173
SN55182
SN55183
SN55188
SN55189
SN55189A
SN554518
SN554528
SN554538
SN554548
SN55461
SN55462
SN55463
SN55464
SN55500E
SN55501E
SN55551
SN55552
SN55553
SN55554
SN55563A . . . ..
. .. t.

PAGE NO.
2-3
2-11
2-11
2-11
2-11
2-21
2-21
2-29
2-33
4-3
4-7
4-11
4-15
2-37
2-43
2-47
2-47
2-55
2-59
2·65
2·69
2-69
2-77
2-81
2-87
2-87
2-87
2-87
2-103
2-103
2-111
2-117
2-129
2-137
2-147
2-161
2-167
2-173
2-185
2-191
2-199
2-207
2-217
2-225
2-231
2-231
4-23
4-23
4-23
4-23
4-31
4-31
4-31
4-31
3-3
3-9
3-15
3-15
3-23
3-23
3-29

DEVICE
SN55564A ..
SN55ALS056 .
.t........... .
..t. .
SN55ALS057 .
SN55ALS126
.f..
SN55ALS130 ........t .
SN55ALS160
. f.
SN55ALS161
SN55ALS192
..........
. . . . .t ...
SN55ALS194
.... t.
SN55ALS195
SN650768
SN651768
SN65500E
SN65501E
SN655128
SN65518
SN65551
SN65552
SN65553
SN65554
SN65555
SN65556
SN65557
SN65558
SN65563A
SN65564A
.t..
SN65ALS176 .
SN65ALS180 ........t ..
....t ..
SN65C185 ..
SN65C188 ..
.....t.
... t .
SN65C1154 ..
SN65C1406
· .t............
SN75061
SN750768
· .t.
SN75107A
SN751078
SN75108A
SN751088
SN75109A
SN75110A
SN75111
SN75112
SN75113
SN75114
SN75115
SN75116
SN75117
SN75118
SN75119
SN75121
SN75122
SN75123
SN75124
SN75125
SN75126
· .t.
SN75127
SN75128
SN75129
SN75130
SN75136
SN75138

PAGE NO.

.... .t. ..

.... .t.

.

3-29
2-239
2-239
2-251
2-257
2-265
2-275
2-285
2-295
2-305
2-317
2-327
3-37
3-43
3-49
3-55
3-63
3-63
3-73
3-73
3-81
3-81
3-89
3-89
3-97
3-97
2-337
2-349
2-361
2-369
2-379
2-387
2-395
2-317
2-87
2-87
2-87
2-87
2-103
2-103
2-111
2-103
2-117
2-129
2-137
2-147
2-147
2-147
2-147
2-161
2-167
2-405
2-409
2-415
2-421
2-415
2-427
2-427
2-433
2-439
2-173

t New devices added to this volume

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1-3

ALPHANUMERIC INDEX

DEVICE
SN75140
SN75141
SN75146
SN75150
SN761S1
SN75153
SN76154
SN75155
SN751S7
SN76158
SN75159
SN751608
SN751618
SN751628 ........................... .
SN751638 ..................•.........
SN75164B ........................... .
SN75172 ............................ .
SN75173 ................•............
SN75174 ............................ .
SN75175 ............................ .
SN75176A ..........t ................. .
SN75176B ........................... .
SN75177B ........................... .
SN75178B ........................... .
SN76179B ........................... .
SIII75182 ............................ .
SN75183 ..............•..............
SN75186 ...........t ................. .
SN75188 ............................ .
SN75189 ............................ .
SN75189A .................•..........
SN75207 ............................ .
SN75207B ........................... .
SN75372 ............................ .
SN75374 ............................ .
SN75435 ............................ .
SN75436 ............................ .
SN75437A ........................... .
SN75438 ............................ .
SN76439 ...........t ................. .
SN75446 ............................ .
SN75447 ............................ .
SN75448 ............................ .
SN75449 ............................ .
SN75451B ........................... .
SN75452B
SN75453B
SN75454B
SN75461
SN75462
SN75463
SN75465
SN75466
SN75467
SN75468
SN75469
SN75471
SN75472
SN75473

PAGE NO.

2-445
2-445
2-453
2-459
2-465
2-465
2-477
2-485
2-185
2-191
2-495
2-507
2-516
2-515
2-527
2-535
2-545
2-553
2-561
2-569
2-577
2-327
2-587
2-587
2-599
2-207
2-217
2-607
2-226
2-231
2-231
2-617
2-617
4-39
4-49
4-69
4-65
4-65
4-65
4-71
4-77
4-77
4-77
4-77
4-23
4-23
4-23
4-23
4-31
4-31
4-31
4-83
4-83
4-83
4-83
4-83
4-91
4-91
4-91

DEVICE
SN75476 ............................ .
SN76477 ............................ .
SN75478 ............................ .
SN75479 ............................ .
SN75500E ...........•................
SN75501E .. .'........................ .
SN7~1~ .....................•......
SN75518 ............................ .
SN75551 ............................ .
SN75552 ............................ .
SN75553 ............................ .
SN75554 ............................ .
SN75555 ............................ .
SN75556 ............................ .
·SN75557 ............................ .
SN75558 ............................ .
SN75563A ........................... .
SN75564A ........................... .
SN751177 ........................... .
SN751178 ........................... .
SN751506
SN751508
SN751516 ........................... .
SN751518 ........................... .
SN751730 ...... , ...t ................. .
SN754410 ........................... .
SN754411 ........................... .
SN75ALS053 ........t ................. .
SN75ALS056 ........t ................. .
SN75ALS057 ........t ................. .
SN75ALS085 ........t ................. .
SN75ALS121 ........t ................. .
SN75ALS123 ........t ................. .
SN75ALS125 ........t ................. .
SN75ALS126 ......................... .
SN75ALS127 ........t ................. .
SN76ALS130 ......................... .
SN75ALS160 ......................... .
SN75ALS161 ......................... .
SN75ALS162 ......................... .
SN75ALS163 ......................... .
SN75ALS164 ......................... .
SN75ALS165 ......................... .
SN75ALS170 ........t ................. .
SN75ALS171 ........t ................. .
SN75ALS176 ........t ................. .
SN75ALS176A .......t ................. .
SN75ALS1768 .......t ................. .
SN75ALS180 ........t ................. .
SN75ALS191 ........t ................. .
SN75ALS192 ......................... .
SN75ALS193 ......................... .
SN75ALS194 ......................... .
SN75ALS195 ......................... .
SN75ALS197 ........t ................. .
SN75ALS199 ........t ................. .
SN75C185 ..........t ................. .
SN75C188 ..........t ................. .
SN75C189 .•........t ................. .

t New devices added to this volume

.

1-4

TEXAS'"

INSTRUMENTS
POST OFACE BOX 655303 • DALLAS, TEXAS 76286

PAGE NO.

4-97
4-97
4-97
4-97
3-37
3-43
3-49
3-55
3-63
3-63
3-73
3-73
3-81
3-81
3-89
3-89
3-97
3-97
2-625
2-625
3-105
3-113
3-105
3-113
2-633
4-103
4-109
2-639
2-647
2-647
2-659
2-675
2-681
2-685
2-251
2-685
2-257
2-689
2-699
2-707
2-717
2-725
2-735
2-745
2-761
2-337
2-337
2-337
2-349
2-777
2,285
2-781
2-295
2-305
2-793
2-805
2-361
2-369
2-817

ALPHANUMERIC INDEX

DEVICE
SN75C189A .........t ................. .
SN75C198 ..........t ................. .
SN75C1154 .........t ................. .
SN75C1406 .........t ................. .
SN951768 ..........t ................. .
TCM78808 ..........t ................. .
TL3695 . ............t ................. .
TL4Bl0B ............................. .
TL4Bl0BI ............................ .
TL5BI2 .............................. .
TL5Bl~ ............................. .
TL 16C450. . . . . ......t. . . . . . . . . . . . . . . . . .
TL 16C451 . ..........t ................. .
TL 16C452 . ..........t ................. .
TL 16C550A .........t ................. .
TPIC0298 ...........t . . . . . . . . . . . . . . . . . .
TPIC2404 ...........t ................. .
TPIC2406 . ..........t ................. .
TPIC2801 ...........t ................. .

PAGE NO.
2-B17
2-B27
2-379
2-387
2-837
2-B47
2-B67
3-123
3-123
3-129
3-129
2-B79
2-903
2-903
2-925
4-115
4-123
4-129
4-141

DEVICE
uA9636AC ...........................
uA9637AC ...........................
uA9637AM ...........................
uA963BC ............................
uA9639C ............................
ULN2001A ...........................
ULN2002A ...........................
ULN2003A ..........................
ULN2004A ...........................
ULN2005A ...........................
ULN2064 ............................
ULN2065 ............................
ULN2066 ............................
ULN2067 ............................
ULN2068 ............................
ULN2069 ............................
ULN2074 ............................
ULN2075 ............................

.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.

PAGE NO.
2-955
2-961
2-961
2-967
2-971
4-155
4-155
4-155
4-155
4-163
4-163
4-163
4-163
4-163
4-169
4-169
4-175
4-175

t New devices added to this volume

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 75285

1-5

DATA TRANSMISSION AND CONTROL CIRCUITS
SELECTION GUIDE
line drivers
APPLICATION

OUTPUT

DRIVERS
PER
PACKAGE

DEVICE
TYPE
SN55158
SN75158

2

SN75159
SN75ALS191
uA9638C
AM26LS31C
MC3487

EIA Standard RS-422-A

Differential

4

EIA Standard RS-485

Differential

4

EIA Standard RS-423-A

Single-Ended

2
2

EIA Standard RS-232-C

Single-Ended
4

2

IBM 360/370

General-Purpose

Single-Ended

Single-Ended

4

2

SN75151
SN75153
SN75172

JG
D,JG,P
D,J,N
D,P
D,JG,P
D,J,N
D J,N
DW,J,N

PAGE
NUMBER
2-191
2-495
2-777
2-967
2-3
2-65
2-465
2-465
2-545

SN75174
SN55ALS192

DW,J,N
DW,J,N
DW,J,N
FK,J

SN75ALS192
SN55ALS194

D,J,N
FK,J

SN75ALS194
SN75172

D,J,N
DW,J,N

SN75174

DW,J,N
D,JG,P

2-955

D,JG,P
D,JG,P

2-459
2-955

D,N

2-37

uA9636AC
SN75150
uA9636AC
LT1030
SN55188
SN75188
SN75C188

FK,J
D,J
D,DB,N

SN75C198
SN75123

D,J,N
D,J,N

SN75ALS123
SN75126

D,N
D,J,N
FK,J

SN55ALS126
SN75ALS126
SN75130

D,J,N
D,J,N

SN55ALS130

FK,J

SN75ALS130
SN55121
SN75121

D,J,N
FK,J
D,J,N

SN75ALS121
SN55109A

D,N
FK,J

SN75109A

D,J,N

SN55110A
SN75110A
SN75112
SN55113

FK,J
D,J,N
D,J,N
FK,J

2-561
2-285
2-285
2-295
2-545
2-561

2-225
2-369
2-405
2-681
2-421
2-251
2-433
2-257
2-161
2-675
2-103
2-103
2-103
2-117

SN75113

D,J,N

SN55114
SN75114

FK,J
D,J,N

2-129

SN55183
SN75183

fK,J
D,J,N

2-217

TEXAS ."

1-6

PKG

INSTRUMENTS
POST OFFICE BOX 666303 • DALlAS, TEXAS 76265

DATA TRANSMISSION AND CONTROL CIRCUITS
SELECTION GUIDE
line drivers (continued)
DRIVERS
APPLICATION

OUTPUT

DEVICE

PER

TYPE

PACKAGE

MC3453
General-Purpose

Differential

4

MC3553
SN75111

PKG

PAGE
NUMBER

D,J,N
FK,J

2-55
2-77

D,J,N

2-111

line receivers
RECEIVERS
APPLICATION

INPUT

DEVICE

PER

TYPE

PACKAGE

2

SN75146

D,JG,P

SN55157

JG
D,JG,P
D,JG,P

SN75157
uA9637A
uA9639C

EIA Standard RS-422-A

Differential

4

EIA Standard RS-485

Differential

4

EIA Standard AS-423-S

Single-Ended

EIA Standard AS-232-C

Single Ended

4

2-453
2-185
2-961
2-971
2-11

D,J,N
FK,J

2-59
2-199

SN75173
SN75175

D,J,N
D,J,N

2-553

SN75ALS193
SN55ALS195

J
FK,J

SN75ALS195
SN55173

J
FK,J
D,J,N

2-199

D,J,N
D,JG,P

2-569
2-453

SN75173
SN75175
SN75146

2-569
2-781
2-305

2-553

SN75157
uA9637A

JG
D,JG,P
D,JG,P

uA9639C
AM26LS32A

D,JG,P
D,FK,J,N

2-971
2-11

D,J,N

2-59

SN75173
SN75176

FK,J
D,J,N
D,J,N

SN75ALS193
SN55ALS195

J
FK,J

2-199
2-553
2-569
2-781

SN75ALS195
SN75164

J
D,J,N

SN55189
SN75189
SN55189A

FK,J
D,J,N
FK,J
D,J,N

MC3486
SN55173
4

D,JG,P
D,FK,J,N

PAGE
NUMBER

AM26LS32A
MC3486
SN55173

SN55157
2

PKG

SN75189A
SN75C189
SN75C189A

INSTRUMENTS
TEXAS "
POST OFFICE BOX 856303 • DALLAS, TEXAS 75265

D,DB,N
D,DB,N

2-185
2-961

2-305
2-477
2-231
2-231
2-817
2-817

1-7

DATA TRANSMISSION AND CONTROL CIRCUITS
SELECTION GUIDE
line receivers (continued)
APPLICATION

IBM 360/370

RECEIVERS
PER
PACKAGE
3

INPUT

Single-Ended

7

8
2
General-Purpose

Single-Ended
4

2

General-Purpose

Differential

4

CCITT V.l1 and X.27

Differential

4

DEVICE
TYPE

PKG

SN75124
SN75125
SN75ALS125
SN75127
SN75ALS127
SN75128
SN75129
SN75140
SN75141
SN55122
SN75122
SN55107A
SN75107A
SN55107B
SN75107B
SN55108A
SN75108A
SN55108B
SN75108B
SN55115
SN75115
SN55182
SN75182
SN75207
SN75207B
AM26LS33A
MC3450
MC3452
MC3550
MC3552
SN75ALS197
SN75ALS199

D,J,N
D,J,N
D,J,N
D,J,N
D,J,N
DW,J,N
DW,J,N
D,JG,P
D,JG,P
FK,J
D,J,N
FK,J
D,J,N
FK,J
D,J,N
FK,J
D,J,N
FK,J
D,J,N
FK,J
D,J,N
FK,J
D,J,N
D,N
D,N
D,J,N
D,J,N
D,J,N
FK,J
FK,J
D,N
D,N

DEVICE
TYPE

PKG

PAGE
NUMBER
2-409
2-415
2-685
2-415
2-685
2-427
2-427
2-445
2-445
2-167
2-87
2-87
2-87
2-87
2-137
2-207
2-617
2-617
2-11
2-47
2-47
2-69
2-69
2-793
2-805

line transceivers
APPLICATION

TRANSCEIVERS
OR DRVS/RCVS
PER PACKAGE
1/1
2/2

BUS I/O

3/3
EIA Standard RS-232-C

Single-Ended

4/4

3/5

SN75155
MAX232
SN65C1406
SN75C1406
SN75186
SN65C1154
SN75C1154
SN65C185
SN75C185

TEXAS.

1-8

INSlRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 76265

PAGE
NUMBER

D,JG,P
D,N

2-485
2-43

D,N

2-387

FN

2-607

DW,N

2-379

DW,N

2-361

DATA TRANSMISSION AND CONTROL CIRCUITS
.
SELECTION GUIDE

line transceivers (continued)
APPLICATION

TRANSCEIVERS
OR DRVS/RCVS

BUS I/O

DEVICE
TYPE

PER PACKAGE

1

EIA Standard RS-422-C
and

Differential .

EIA Standard RS-485

1/1

2/2
3

SN65176B

D,P

SN75176A
SN75176B
SN65ALS176

D,P
D,JG,P

SN75ALS176
SN75ALS176A
SN75ALS176B

IEEE 802.3 1BASE5
IEEE 802.3 10BASE5

Differential
Differential

8

1/1
2/2

4
Single-Ended

B

General-Purpose

Differential

1

TEXAS

2-327
2-577
2-327

D,P

2-337

D,P
D,P

2-337
2-337

SN75177B

D,JG,P
JG,P
FK,JG,W

2-5B7
2-587
2-837

TL3695

D,P
D,JG,P

2-867
2-599

D,N

2-349

N
N

2-625
2-625
2-745

SN75179B
SN65ALS180
SN75ALS180
SN751177
SN751178
SN75ALS170
SN75ALS171

SN75ALS160
SN65ALS161
Sing la-Ended

PAGE
NUMBER

SN75178B
SN95176B

SN75160B
SN55ALS160

IEEE Standard 488 GPIB

PKG

SN75161B
SN75ALS161

J
J
DW,J,N
FK,J,W
DW.J,N
FK,J,W
DW,J,N
DW,J,N

SN75162B
SN75ALS162

DW,N
DW,N

SN75164B
SN75ALS164

DW,N
DW,N
DW,N

SN75ALS165
SN75061
SN75ALS085

N
NT

AM26S10C
AM26S11C

D,J,N
D,J,N

N8T26
SN75136

D,J,N
O,J,N

SN55138

FK,J
D,J,N

SN75138
SN75163B

OW,J,N
DW,J,N

SN75ALS163
SN65076B
SN75076B
SN55116

D,P
D,P
FK,J

SN75116
SN75117

D,J,N
D,JG,P

SN75118
SN75119

D,J,N
D,JG,P

2-761
2-507
2-265
2-689
2-275
2-515
2-699
2-515
2-707
2-535
2-725
2-735
2-395
2-659
2-21
2-21
2-81
2-439
2-173
2-527
2-717
2-317
2-147
2-147
2-147
2-147

-II

INS1R.UMENlS
POST OFFICE BOX 856303 • DALLAS. TEXAS 75285

1-9

DATA TRANSMISSION AND CONTROL CIRCUITS
SELECTION GUIDE

line transceivers (continued)
TRANSCEIVERS
APPLICATION

DEVICE

OR DRVS/RCVS

BUS I/O

4
IEEE Std 896.1-1987

Single-Ended
8

IBM 360/370

Single-Ended

3/3

PAGE

PKG

TYPE

PER PACKAGE

SN75ALS053
SN55ALS057
SN75ALS057
SN55ALS056
SN75ALS056
SN751730

NUMBER

FN,N

2-639

J,W
DW,N
J,W
DW,N

2-239
2-647
2-239
2-647

D,N

2-633

translators
APPLICATION

TRANSLATORS

DEVICE

PER PACKAGE

TYPE

5
5

DP8480
DP8481

10K ECL-to-TTL with Latch
10K TTL-to-ECL with Latch

PAGE

PACKAGE

NUMBER

2-29

D,N
D,N

2-33

controllers
DESCRIPTION

ACET

FUNCTION

PRODUCT FEATURES

TYPE

PACKAGE

PAGE
NUMBER

Programmable Baud Generation

TL16C450

FN,N

2-879

TL16C451

FN

2-903

Programmable Interface Characteristics

TL16C452

FN

2-903

ACEt

Port and without FI FO *
Dual ACE with Parallel
Port and without FIFO *
Single ACE with FIFO*

Programmable Interface Characteristics

Functional Upgrade of the 16C450

TL16C550A

FN,N

2-925

Converter/Controller

Octal Receiver/Transmitter

Programmable Baud Rates:
50 to 19,200

TCM78808

FN,HA,HB

2-847

ACEt
ACEt

Single ACE without FIFO*

DEVICE

Single ACE with Parallel

t ACE-Asynchronous Communications Element
*FIFO-First In First Out

TEXAS .."
1-10

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 75265

DATA TRANSMISSION CIRCUITS
CROSS·REFERENCE GUIDE

Replacements are based on similarity of electrical and mechanical characteristics as shown in currently published
data. Interchangeability in particular applications is not guaranteed. Before using a device as a substitute. the
user should compare the specifications of the substitute device with the specifications of the original.
Texas Instruments makes no warranty as to the information furnished and buyer assumes all risk in the use
thereof. No liability is assumed for damages resulting from the use of the information contained herein.
Manufacturers are arranged in alphabetical order.
AMD
AM26LS31C
AM26LS32C
AM26LS33C
AM26S10C
AM26S11C

SUGGESTED
TI REPLACEMENT
AM26LS31C
AM26LS32AC
AM26LS33AC
AM26S10C
AM26S11C

PAGE
NO.
2-3
2-11
2-11
2-21
2-21

SUGGESTED
TI REPLACEMENT
SN75188
SN75189A
SN75189
AM26LS31C
AM26LS32AC
MC3486
MC3487
SN55107A
SN55107B
SN55108A
SN55108B
SN55110A
SN55121
SN55122
SN75107A
SN75108A
SN75108B
SN75107B
SN75110A
SN75150
SN75154
SN75121
SN55121
SN75122
SN55122
SN75123
SN75124
SN75114
SN55114
SN75115
SN55115
SN75172
SN75173
SN75174
SN75175
SN75176B
SN75177B
SN75178B

PAGE
NO.
2-225
2-231
2-231
2-3
2-11
2-59
2-65
2-87
2-87
2-87
2-87
2-103
2-161
2-167
2-87
2-87
2-87
2-87
2-103
2-459
2-477
2-161
2-161
2-167
2-167
2-405
2-409
2-129
2-129
2-137
2-137
2-545
2-553
2-561
2-569
2-327
2-587
2-587

FAIRCHILD
~A9636AC
~A9637AC
~A9637AM

~A9638C

I'A9639AC
~A.9640C

FAIRCHILD
~A1488C

I'A1489AC
~A1489C
~A26LS31C

pA26LS32C
~A3486C

pA3487C
I'A55107AM
~A55107BM

pA55108AM
I'A55108M
pA55110M
~A55121M

I'A55122M
I'A75107AC
~A75108AC

I'A75108BC
pA75108C
pA75110C
~A75150C

pA75154C
~A8T13C

pA8T13M
I'A8T14C
~A8T14M
~A8T23C

I'A8T24C
I'A9614C
pA9614M
~A9615C
~A9615M
~A96172C

I'A96173C
pA96174C
~A96175C
~A96176

~A96177
~A96178

~A9641C

LTC
LT1030
MOTOROLA
AM26LS31
AM26LS32
MC14B8
MC1489
MC1489A
MC26S10
MC26S11
MC3450
MC3452
MC3453
MC3481
MC3485
MC3486
MC3487
MC55107
MC55108
MC75107
MC75108
MC75125
MC75127
MC75128
MC75129
MC75140
MC145406
MC75S110
SN75172
SN75173
SN75174
SN75175
SN75176
SN75177
SN75178

SUGGESTED
TI REPLACEMENT
uA9636AC
uA9637AC
uA9637AM
uA9638C
uA9639C
AM26S10C
AM26S11C

PAGE
NO.
2-955
2-961
2-961
2-967
2-971
2-21
2-21

SUGGESTED
TI REPLACEMENT
LT1030

PAGE
NO.
2-37

SUGGESTED
TI REPLACEMENT
AM26LS31C
AM26LS32AC
SN75188
SN75189
SN75189A
AM26S10C
AM26S11C
MC3450
MC3452
MC3453
SN75ALS126
SN75ALS130
MC3486
MC3487
SN55107A
SN55108A
SN75107A
SN75108A
SN75125
SN75127
SN75128
SN75129
SN75140
SN75C1406
SN75110A
SN75172
SN75173
SN75174
SN75175
SN75176B
SN75177B
SN75178B

PAGE
NO.
2-3
2-11
2-225
2-231
2-231
2-21
2-21
2-47
2-47
2-55
2-251
2-257
2-59
2-65
2-87
2-87
2-87
2-87
2-415
2-415
2-427
2-427
2-445
2-387
2-103
2-545
2-553
2-561
2-569
2-327
2-587
2-587

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 855303 • OALLAS, TEXAS 75285

1-11

DATA TRANSMISSION CIRCUITS
CROSS·REFERENCE GUIDE

NATIONAL
OP8480·
OP8481
051488
051489
051489A
0514C88
0514C89
0514C89
0526L531
0526L532
0526L532M
0526L533C
0526L533M
0526510C
0526511C
053486
053487
053695
053893
053896
053897
0555107
0555108
0555109
0555110
0555113
0555114
0555115
0555121
0555122
0575107
0575108
0575109
0575110
0575113
0575114
OS75115
0575121
0575122
0575123
0575124
0575125
0575127
0575128
0575129
0575150
0575154
0575207
0575207
0575108
D57820A
0578220
057830
058820
058820A
058830

SUGGESTED
TI REPLACEMENT
OP8480
OP8481
5N75188
5N75189
5N75189A
5N75C188
5N75C189
5N75C189A
AM26L531C
AM26L532AC
AM26L532AM
AM26L533AC
AM26L533AM
AM26510C
AM26511C
MC3486
MC3487
TL3695
5N75AL5053
5N75AL5066
5N75AL5057
5N55107B
5N55108A
5N55109A
5N55110A
5N55113
5N55114.
5N55115
5N55121
5N55122
5N75107B
5N751088
5N75109A
5N75110A
5N75113
5N75114
SN75115
5N75121
5N75122
5N75123
5N75124
5N75125
5N75127
5N75128
5N75129
5N75150
5N75154
5N75207
5N75207B
5N75108B
.5N55182
5N55182
5N551B3
5N75182
5N75182
5N75183

PAGE
NO.
2-29
2-33
2-225
2-231
2-231
2-369
2-817
2-817
2-3
2-11
2-11
2-11
2-11
2-21
2-21
2-59
2-65
2-867
2-639
2-647
2-647
2-87
2-87
2-103
2-103
2-117
2-129
2-137
2-161
2-167
2-87
2-87
2-103
2-103
2-117
2-129
2-137
2-161
2-167
2-405
2-409
2-415
2-415
2-427
2-427
2-459
2-477
2-617
2-617
2-87
2-207
2-207
2-217
2-207
2-207
2-217

SIGNETICS
8T125
8T126
8T127
8T128
8T129
8T13
8T14
8T23
8T24
8T26
OM7820
OM7830
OM8820
OM8830
MC1488
MC1489
MC1489A

TEXAS .."

INSTRUMENTS
1-12

POST OFFICE BOX 866303 • DALLAS. TEXAS 15265

SUGGESTED
TI REPLACEMENT
5N75125
5N75AL5126
5N75127
5N75128
5N75129
5N75121
5N75122
5N75123
5N75124
N8T26
5N55182
5N55183
5N75182
5N75183
5N75188
5N75189
5N75189A

PAGE
NO.
2-415
2-251
2-415
2-427
2-427
2-161
2-167
2-405
2-409
2-81
2-207
2-217
2-207
2-217
2-225
2-231
2-231

CONTROL CIRCUITS
CROSS·REFERENCE GUIDE

Replacements are based on similarity of electrical and mechanical characteristics as shown in currently published
data. Interchangeability in particular applications is not guaranteed. Before using a device as a substitute, the
user should compare the specifications of the substitute device with the specifications of the original.
Texas Instruments makes no warranty as to the information furnished and the buyer assumes all risk in the
use thereof. No liability is assumed for damages resulting from the use of the information contained herein.
Manufacturer's are arranged in alphabetical order.
NATIONAL

SUGGESTED
TI REPLACEMENT

PAGE
NO.

NS16C450
NS16450
NS16550A
NS16C550A

TL16C450
TL16C450
TL 16C550A
TL 16C550A

2-879
2-879
2-925

VLSI
TECHNOLOGY INC

SUGGESTED
TI REPLACEMENT

PAGE
NO.

VL 16C450
VL16C451B
VL16C452B
VL 16C550

TL16C450
TL16C451
TL16C452
TL16C550A

2-879
2-903
2-903
2-925

WESTERN DIGITAL

SUGGESTED
TI REPLACEMENT

PAGE
NO.

WD8216C450
WD8216C451
WD8216C452

TL16C450
TL16C451
TL16C452

2-879
2-903
2-903

TEXAS ."

INSIRUMENTS
POST OFFICE BOX 665303 • OALlAS. TEXAS 75286

1-13

DISPLAY DRIVERS
SELECTION GUIDE

electroluminescent display drivers
DRIVERS
DESC.

PRODUCT FEATURES

PER
PKG

INPUT

POWER SUPPLY

COMPATIBILITY

SN55551

• 225-V open-drain DMOS outputs
• Serial-in, parallel-out arch!tecture

SN55552

• 50-rnA current sink output capability

SN65551

• Extremely low steady-state power

SN65552

consumption

SN75551

• Left side (SNXX551) and right side
(SNXX552) drivers enhance circuit
layout

SN75552

DRIVERS

PKG

FD

FN. N

32

• Monolithic BIDFET integrated circuits
ROW

TYPE

SN65557

• Very low steady-state power

CMOS

consumption
• 300-mA output capability

SN65558
VCCI (logic) = 10.8 V

SN75557

to 15 V

SN75558

FN

• High-voltage open-collector N-P-N
outputs
• 225-V totem-pole BIDFET output

SN55563A
SN55564A

structures

• Very low steady-state power

SN65564A

34

consumption

FJ

SN65663A

• 70-mA output sourcelsink capability

SN75563A

FN

SN75564A

• 3-state capabilities
• Selectable open-source or open-drain
output
• 60-V totem-pole BIDFET output

SN55553
SN55554

structures

COLUMN
DRIVERS

• Serial-in, parallel-out architecture

SN65553

• 15-mA sink or source output
capability

SN65554

• Top (SNXX553) and bottom
(SNXX5554) drivers enhance circuit

SN75554

SN75553

layout

32

CMOS

FN, N

VCCl (logic) = 10.8 V
to 15 V

• 90-V output voltage swing capability

SN65555

• 15-mA output source and sink

SN65556
SN75555

current capability
• High-speed serially-shifted data input

SN75556

• Totem-pole outputs
• Latches on all driver outputs

TEXAS .."

1-14

FD

INSIRUMENTS
POST OFFICE BOX '655303 • DALLAS. TEXAS 75266

FN, N

DISPLAY DRIVERS
SELECTION GUIDE
vacuum fluorescent display drivers
DRIVERS
DESC.

PER

PRODUCT FEATURES

INPUT

• Serial-in, parallel-out

architecture
• 60-V totem-pole outputs

12

• 25 mA current source

POWER SUPPLY

COMPATIBILITY

PKG

TTL

M

TYPE

VCCI (logic) = 5 V
to 15 V,

SN65512B

VCC2 (display) = 0
to 60 V

SN75512B

VCCI (logic) = 5 V

SN65518

PKG

DW,N

output capability
• On-board latches
All features same as
ANODE,
GRID

SN65512B except:

DRIVERS

• 32 bits for large format
displays

FOR

• Serial-in, parallel-Qut

SEGMENT

CMOS,

32

TTL

to 15 V,
SN75518

VCC2 (display) = 0
to 130 V

FN,N

TL4810B

architecture

OR DOT

• 60-V totem-pole outputs

MATRIX

• 40-mA current source output

FORMATS

• Improved direct replacement

10

DW,N

for UCN4810A and

CMOS

TL4810A
• 70-V output voltage swing

VCCI (logic) = 5 V
to 15 V,

TL4810BI

VCC2 (display) =0
to 60 V

TL5812

capability
20

• Drives up to 20 lines

FN,N

• Direct replacement for
Sprague UCN5812

TL58121

dc plasma and gas discharge display drivers
DRIVERS
DESC.

PRODUCT FEATURES

PER
PKG

INPUT
COMPATIBILITY

POWER SUPPLY

TYPE

PKG

SN751506

SCAN

• 180-V open drain parallel outputs

LINE

• 220-mA parallel output sink current

VCC (logic) =4V

DRIVERS

• Left side (SN751506) and right side

to 6 V

SN751516

FT

(SN751516) drivers enhance circuit layout
DATA
LINE
DRIVERS

• -120-V open collector P-N-P parallel

32

outputs

SN751508

CMOS

• Two parallel high-speed 16-bit shift registers

VCC (logic) = 4.5 V

• Latches on all driver outputs

to 5.5 V

SN751518

FT

• Top (SN751508) and bottom (SN751518)
drivers enhance circuit layout

TEXAS ~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75286

1·15

DISPLAY DRIVERS
SELECTION GUIDE
ac plasma display drivers
DESC.

PRODUCT FEATURES

DRIVERS
PER
PKG

• High-speed serial-in,
parallel-out architecture
(8 MHz)

INPUT
COMPATIBILITY

POWER SUPPLY
VCCl (logic)
to 13.2 V

32 18 bits with 1
of 4 selectors)

(150 ns typ)
• 1 5-mA output current
capability

DRIVERS

• X-axis driver

• Military temperature

packages available
(SN55500, SN55501)

FD,JD

SN65500E
SN75500E

SN55501E
32
32x 1

FD,JD

SN65501E
FN,N
SN75501E

TEXAS ."

1-16

SN55500E

FN,N
CMOS

(SNXX500J
• Y-axis driver
(SNXX501)

PKG

10.8 V

VCC2 (display) = 0
to 100 V

• Fast output transitions

AXIS

=

TYPE

INSTRUMENTS
POST OFACE BOX 655303 • DALLAS. TEXAS 75285

DISPLAY DRIVERS
CROSS·REFERENCE GUIDE

Replacements are based on similarity of electrical and mechanical characteristics as shown in currently published
data. Interchangeability in particular applications is not guaranteed. Before using a device as a substitute, the
user should compare the specifications of the substitute device with the specifications of the original.
Texas Instruments makes no warranty as to the information furnished and buyer assumes all risk in the use
thereof. No liability is assumed for damages resulting from the use of the information contained herein.
Manufacturers are arranged in alphabetical order.

GOULD/AMI

SUGGESTED
TI
REPLACEMENT

S4535

SN75518

SILICONIX

SUGGESTED
TI
REPLACEMENT

SI9551
SI9552
SI9553
SI9554

SN75551
SN75552
SN75553
SN75554

SPRAGUE

SUGGESTED
TI
REPLACEMENT

UCN5810A
UCN5812A
UCN5818A
UCN5851A
UCN5852A
UCN5853A
UCN5854A

TL4810B
TL5812
SN75518
SN75551
SN75552
SN75553
SN75554
SUGGESTED

SUPERTEX

TI
REPLACEMENT

HV51
HV52
HV53
HV54

SN75551
SN75552
SN75553
SN75554

PAGE

NO.
3-55
PAGE

NO.
3-63
3-63
3-73
3-73
PAGE

NO.
3-123
3-129
3-55
3-63
3-63
3-73
3-73
PAGE

NO.
3-63
3-63
3-73
3-73

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALlAS. TEXAS 75265

1-17

PERIPHERAL DRIVERS/ACTUATORS
SELECTION GUIDE
General-Purpose Drivers and Actuators
OFFSWITCHING
OUTPUT DRIVERS OUTPUT
STATE
INPUT
VOLTAGE
CURRENT
PER
CLAMP
VOLTAGE
CAPABILITY
MAX (V)
(rnA)
PACKAGE DIODES
MAX (V)
20
30
300
2
NO
TTL
20
2
NO
TTL
30
300
20
30
300
2
NO
TTL
20
300
NO
TTL
2
30
20
30
300
2
NO
TTL
20
2
TTL
NO
30
300
20
30
2
TTL
NO
300
20
30
300
2
NO
TTL
24
24
500
2
YES TTL
24
24
500
4
YES TTL
2
NO
TTL
30
35
300
30
35
300
2
NO
TTL
30
35
300
2
NO
TTL
30
35
300
2
NO
TTL
30
35
300
NO
TTL
2
30
35
300
2
NO
TTL
30
35
2
NO
TTL
300
30

24

1000

B

YES

35
35
35
35
35
35
35
45
55
55
55
55
50
50
50
50
50
50
50
50
50
50
50

70
70
70
50
50
50
50
45
70
70
70
70
70
50
50
50
50
50
50
80
BO
80
80

500
600
1000
1250
1250
1250
1250
1000
350
350
350
350
500
350
350
350
350
350
1300
1500
1500
1500
1500

4
4
4
4
4
4
4
4
2
2
2
2
4
7
7
7
7
7
4
4
4
4
4

YES
YES
YES
YES
YES
YES
NO
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
NO

FUNCTION

AND
NAND
OR
NOR
AND
NAND
OR
NOR
MOS DRIVER
MOS DRIVER
AND
NAND
OR
NOR
AND
NAND
OR
SERIAL TO
TTL,CMOS
PARALLEL
POWER CHIP
TTL,CMOS
INVERT W ENAB
TTL,CMOS
INVERT W ENAB
TTL,CMOS
INVERT W ENAB
TTL
INVERT
MOS
INVERT
TTL,CMOS
INVERT
TTL,CMOS
INVERT
TTL,CMOS
AND
TTL,CMOS
AND
TTL,CMOS
NAND
TTL,CMOS
OR
TTL,CMOS
NOR
TTL,CMOS
INVERT W ENAB
TTL,CMOS,PMOS INVERT
25 V PMOS
INVERT
TTL,CMOS
INVERT
15 V MOS
INVERT
TTL
INVERT
TTL,CMOS
INVERT W ENAB
TTL
INVERT
MOS
INVERT
TTL,5 V MOS
INVERT
TTL,5 V MOS
INVERT

TEXAS ."

1-18

INSlRUMENTS
POST OFFICE BOX 655303 • OALLAS, TEXAS 75265

DELAY
TIME
TYP

TYPE

PKG

PAGE

(ns)

lB
25
lB
26
lB
25
lB
26
35
35
2B
3B
2B
35
2B
3B
2B

SN55451B
SN55452B
SN55453B
SN55454B
SN75451B
SN75452B
SN75453B
SN75454B
SN75372
SN75374
SN55461
SN55462
SN55463
SN55464
SN75461
SN75462
SN75463

FK,JG 4-23
FK,JG ""4-23
FK,JG ""4-23
FK,JG ""4-23
D,P ""4-23
D,P ""4-23
D,P ~
D,P ""4-23
D,P 4-39
D,N ~
FK,JG 4-31
FK,JG """4-3'1
FK,JG """4-3'1
FK,JG """4-3'1
D,P """4-3'1
D,P """4-3'1
D,P """4-3'1

2000 TPIC2BOl

KV

1050
750
1050
500
500
500
500
2000
300
300
300
300
1050
250
250
250
250
250
1500
500
500
500
500

NE
4-65
NE 4-59
NE 4-65
NE ~
NE 4-1ii3
NE
NE
4-175
4_123
KN
D,P 4-77
D,P 4-77
_
D,P 4 77
D,P 4-77
4 _65
NE
D,N 4-155
D,N : 4-155
D,N 4-155
D,N 4-155
D,N : 4-155
NE
4-71
NE 4-i63
NE
NE
4-169
NE 4-i75

SN75437A
SN75435
SN7543B
ULN2064
ULN2066
ULN206B
ULN2074
TPIC2404
SN75446
SN75447
SN75448
SN75449
SN75436
ULN2001A
ULN2002A
ULN2003A
ULN2004A
ULN2005A
SN75439
ULN2065
ULN2067
ULN2069
ULN2075

4-141

~

1

1

1
1

1
1

1

1

~

PERIPHERAL DRIVERS/ACTUATORS
SELECTION GUIDE

General-Purpose Drivers and Actuators (Continued)
SWITCHING
VOLTAGE
MAX (VI

OFFSTATE
VOLTAGE
MAX (VI

OUTPUT

DRIVERS

OUTPUT

CURRENT

PER

CLAMP

(mAl

PACKAGE

DIODES

DELAY
INPUT

FUNCTION

CAPABILITY

TIME
TYP

TYPE

PKG

PAGE

(nsl
28

SN75471

D,P

38

D,P

28

SN75472
SN75473

200

SN75476

D,P

SN75477

D,P

55

70

300

2

NO

55

70

300

2

NO

TTL
TTL

AND
NAND

55

70

300

2

NO

TTL

OR

55

70

300

2

YES

TTL,CMOS

AND

55

70

300

2

YES

TTL,CMOS

NAND

200

D,P

D,P

4-91

~
~

1 4 _97

4 _97
4 _97
1 4 _97
1
1

55

70

300

2

YES

TTL,CMOS

OR

200

SN75478

55

70

300

2

YES

TTL,CMOS

NOR

200

SN75479

D,P

60

60

100

4

YES

TELECOM RY DRV 1000

DS36801

60

60

1000

4

YES

TTL,CMOS,MOS
TTL,CMOS

INVERT

TPIC2406

60

100

350

7

YES

TTL

INVERT

250

SN75465

60

100

350

7

YES

TTL,CMOS,PMOS INVERT

250

SN75466

60

100

350

7

YES

25 V PMOS

INVERT

250

SN75467

60

100

350

7

YES

TTL,CMOS

INVERT

250

SN75468

60

100

350

7

YES

15 V MOS

INVERT

250

SN75469

D,J,N 4-3
1 4 _129
KN
1 4 _83
D,N
1
4 _83
D,N
1 4 _83
D,N
1 4 _83
D,N
1
4 _83
D,N

Motor Drivers and Power Actuators
SWITCHING
VOLTAGE
MAX (VI

OFFSTATE
VOLTAGE
MAX (VI

OUTPUT

DRIVERS

OUTPUT

CURRENT

PER

CLAMP

(mAl

PACKAGE

DIODES

DELAY
INPUT
CAPABILITY

FUNCTION

TIME
TYP

TYPE

PKG

PAGE

(nsl

36

36

600

4

YES

TTL

HALF-H DRIVER

600

L293D

NE

4-11

36

36

1000

4

NO

TTL

HALF-H DRIVER

600

L293

NE

~

36

36

1000

4

YES

TTL,CMOS

HALF-H DRIVER

600

SN754410 NE

36

36

1000

4

NO

TTL,CMOS

HALF-H DRIVER

600

SN754411 NE

~
4-109

L298

KV

4-'i"5

TPIC0298

KV

4=115

46

46

2000

2

NO

TTL

FULL-H DRIVER

46

46

2000

2

NO

TTL

FULL-H DRIVER

TEXAS ~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

1-19

PERIPHERAL DRIVERS/ACTUATORS
CROSS·REFERENCE GUIDE
Replacements are based on similarity of electrical and mechanical characteristics as shown in currently published
data. Interchangeability in particular applications is not guaranteed. Before- using a device as a substitute, the
user should compare the specifications of the substitute device with the specifications of the original.
Texas Instruments makes no warranty as to the information furnished and buyer assumes all risk in the use
thereof. No liability is assumed for damages resulting from the use of the information contained herein.
Manufacturers are arranged in alphabetical order.

FAIRCHILD

SUGGESTED
TI
REPLACEMENT

PAGE

NO.

5N75451B
5N75452B
5N75453B
5N75454B

4-23
4-23
4-23
4-23

~75462

5N75461
5N75462

4-31
4-31

MC1412
MC1413

ULN2002A
ULN2003A

4-155
4-155

"A3680

053680

4-3

"A9665
"A9666
"A9667
"A9668

ULN2001A
ULN2002A
ULN2003A
ULN2004A

4-155
4-155
4-155
4-155

"A75471
"A75472
"A75473

5N75471
5N75472
5N75473

4-91
4-91
4-91 -

"A75451
~75452

"A75453
"A75454
"A75461

MOTOROLA

SUGGESTED
TI
REPLACEMENT

PAGE

NO.

MC1411
MC1412
MC1413
MC1413T
MC1416

ULN2001A
ULN2002A
ULN2003A
5N75468
ULN2004A

4-155
4-155
4-155;
4-83
4-155

MC1471
MC1473
MC1474

5N75476
5N75478
5N75479

4-97
4-97
4-97

5N75451B
5N75452B
5N75453B
5N75454B

5N75451B
5N75452B
5N75453B
5N75454B

4-23
4-23
4-23
4-23

ULN2001
ULN2002

ULN2001A
ULN2002A

4-155
4-155

MOTOROLA

PAGE

NO.

ULN2003
ULN2004

ULN2003A
ULN2004A

4-155
4-155

ULN2064
ULN2065
ULN2066
ULN2067
ULN2068
ULN2069

ULN2064
ULN2065
ULN2066
ULN2067
ULN2068
ULN2069

4-163
4-163
4-163
4-163
4-169
4-169

ULN2074
ULN2075

ULN2074
ULN2075

4-175
4-175

NATIONAL

SUGGESTED
TI
REPLACEMENT

PAGE

NO.

053611
053612
053613

5N75471
5N75472
5N75473

4-91
4-91
4-91

053658

5N75437A

4-65

053668

5N75435

4-59

053680

053680

4-3

0575361
0575365

5N75372
5N75374

4-39
4-49

0575451
0575452
0575453
0575454

5N75451B
5N75452B
5N75453B
5N75454B

4-23
4-23
4-23
4-23

0575461
0575462
0575463

5N75461
5N75462
5N75463

4-31
4-31
4-31

LM3611
LM3612
LM3613

5N75471
5N75472
5N75473

4-91
4-91
4-91

LM75453

5N75453B

4-23

TEXAS ."

1-20

SUGGESTED
TI
REPLACEMENT

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

PERIPHERAL DRIVERS/ACTUATORS
CROSS·REFERENCE GUIDE

SUGGESTED
TI
REPLACEMENT

PAGE
NO.

SILICON
GENERAL

PBD352301
PBD352302
PBD352303
PBD352304

ULN2001A
ULN2004A
ULN2003A
ULN2002A

4-155
4-155
4-155
4-155

SG2023
SG2024

SN75468
SN75469

4-83
4-83

PBD352311
PBD352312
PBD352313
PBD352314

SN75466
SN75469
SN75468
SN75467

4-83
4-83
4-83
4-83

SG75451
SG75452
SG75453
SG75454

SN75451B
SN75452B
SN75453B
SN75454B

4-23
4-23
4-23
4-23

SG75461
SG75462
SG75463

SN75461
SN75462
SN75463

4-31
4-31
4-31

SG75473

SN75473

4-91

RIFA

SGS-ATES

SUGGESTED
TI
REPLACEMENT

PAGE
NO.

L201
L202
L203
L204

ULN2001A
ULN2002A
ULN2003A
ULN2004A

4-155
4-155
4-155
4-155

L293
L293
L293D
L293D
L298

L293
SN754411 t
L293D
SN754410 t
L298

4-7
4-109
4-11
4-103
4-15

ULN2001
ULN2002
ULN2003
ULN2004

ULN2001A
ULN2002A
ULN2003A
ULN2004A

4-155
4-155
4-155
4-155

ULN2064
ULN2065
ULN2066
ULN2067
ULN2068
ULN2069

ULN2064
ULN2065
ULN2066
ULN2067
ULN2068
ULN2069

4-163
4-163
4-163
4-163
4-169
4-169

ULN2074
ULN2075

ULN2074
ULN2075

4-175
4-175

SUGGESTED
TI
REPLACEMENT

PAGE
NO.

SG2001
SG2002
SG2003
SG2004

ULN2001A
ULN2002A
ULN2003A
ULN2004A

4-155
4-155
4-155
4-155

SG2022

SN75467

4-83

SILICON
GENERAL

SPRAGUE

SUGGESTED
TI
REPLACEMENT

SUGGESTED
TI
REPLACEMENT

PAGE
NO.

PAGE
NO.

UDN-2541

SN75437A

4-65

UDN-3611
UDN-3612
UDN-3613

SN75471
SN75472
SN75473

4-91
4-91
4-91

UDN-5711
UDN-5713
UDN-5714
UDN-5722

SN75476
SN75478
SN75479
SN75477

4-97
4-97
4-97
4-97

ULN-2001
ULN-2002
ULN-2003
ULN-2004
ULN-2005

ULN2001A
ULN2002A
ULN2003A
ULN2004A
ULN2005A

4-155
4-155
4-155
4-155
4-155

ULN-2021
ULN-2022
ULN-2023
ULN-2024
ULN-2025

SN75466
SN75467
SN75468
SN75469
SN75465

4-83
4-83
4-83
4-83
4-83

ULN-2064
ULN-2065
ULN-2066
ULN-2067
ULN-2068
ULN-2069

ULN2064
ULN2065
ULN2066
ULN2067
ULN2068
ULN2069

4-163
4-163
4-163
4-163
4-169
4-169

ULN-2074
ULN-2075

ULN2074
ULN2075

2-175
2-175

tConsult product data sheet for possible slight product differences.

TEXAS ~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

1-21

PERIPHERAL DRIVERS/ACTUATORS
CROSS·REFERENCE GUIDE
SUGGESTED
TI
REPLACEMENT

PAGE
NO.

L293
L293

L293
SN754411t

4-7
4-109

L293D

L293D

4-11

L293D

SN754410t

4-103

L298

L298

4-15

UNITRODE

tConsult product data sheet for possible slight product differences.

TEXAS ."

1-22

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. T~AS 75285

Data Transmission and Control Circuits

2-1

2-2

AM26LS31C
QUADRUPLE DIFFERENTIAL LINE DRIVER
I 979-REVISED MAY 1990

•
•

Meets EIA Standard RS-422-A

0, J, OR N PACKAGE
(TOP VIEW)

Operates From a Single 5-V Supply

•
•

TTL Compatible

•

High Output Impedance In Power-Off
Conditions

•

Complementary Output Enable Inputs

1A
1Y
1Z
ENABLEG
2Z
2Y
2A
GND

Complementary Outputs

Vee

4A
4Y
4Z
ENABLEG
3Z
3Y
3A

description
The AM26LS31 C is a quadruple complementaryoutput line driver designed to meet the
requirements of EIA Standard RS-422-A and
Federal Standard 1020. The 3-state outputs have
high-current capability for driving balanced lines
such as twisted-pair or parallel-wire transmission
lines, and they provide a high-impedance state in
the power-off condition. The enable function is
common to all four drivers and offers the choice of
an active-high or active-low enable input. Lowpower Schottky Circuitry reduces power
consumption without sacrificing speed.

FUNCTION TABLE (EACH DRIVER)
INPUT
A

ENABLES
G
G

H
L
H
L

H
H

X
X

X
X

X

L

L
L
H

OUTPUTS
V
Z

H
L
H
L
Z

L
H
L
H
Z

H = high level
L= low level
X = irrelevant
Z = high impedance (off)

The AM26LS31 C is characterized for operation
from O·C to 70·C.
logic symbol t

G

EN

G
1Y

1A

1Z
2Y

2A
2Z
3Y

3A

3Z
4Y

4A

4Z

t This symbol is in accordance w~h ANSI/IEEE SId 91-1984 and lEe
Publication 617·12.

PRODUCTION DATA documents contain Information current

:~.~~~~I~eOx~:~:t::'~:=~=:~~ !~~~::.t;=:~:tf:~

processing does not necessarily Include tesUng of all

parameters.

Copyright © 1990. Texas Instruments Incorporated

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-3

AM26LS31C
QUADRUPLE DIFFERENTIAL LINE DRIVER
logic diagram (positive logic)
G

_ - - ' I e - - '....

G ---.....c....-"
-----+--1

1A

2A

3A

-----+--1
-----+--1

4A - - - - - - - 1

1Y

1Z
2Y
2Z

3Y
3Z
4Y

4Z

schematic (each driver)
INPUTA

90
OUTPUT V

II 22 kO
ENABLE_---t--M---4----JW-H

G

EN~BLE --+--.--:f4-.......~---+--'

All resistor values are nominal.

TEXAS .Jf

2-4

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 75265

AM26LS31C
QUADRUPLE DIFFERENTIAL LINE DRIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ............................................................. 7 V
Input voltage ............................................................................... 7 V
Output off-state voltage .................................................................... 5.5 V
Continuous total dissipation ........................................... See Dissipation Rating Table
Operating free-air temperature range .................................................... 0 to 70°C
Storage temperature range ......................................................... - 65 to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ..................... 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package ................ 260°C
NOTE 1: All voltage values. except differential output voltage VOD. are with respect to network ground terminal.
DISSIPATION RATING TABLE
TA s 2S·C
PACKAGE

POWER RATING

DERATING FACTOR
ABOVE T A

= 2S·C

TA

= 70·C

POWER RATING

D

950mW

7.SmWrC

SOSmW

J

1025mW
1150mW

S.2mWrC

65SmW
73SmW

N

9.2mWrC

recommended operating conditions
Supply voltage. V CC

MIN

NOM

MAX

UNIT

4.75

5

5.25

V
V

2

High·level input Voltage. VIH
Low-level input voltage. VIL
High·level output current. IOH
Low-level output current. IOL
Operating free-air temperature. T A

0

O.S

V

-20

mA

20

mA

70

·C

TEXAS .If

INSlRUMENlS
POST OFFICE BOX 656303 • DAllAS. TEXAS 75265

2-5

AM26LS31C
QUADRUPLE DIFFERENTIAL LINE DRIVER
electrical characteristics over operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONS

VIK

Input clamp voltage

Vee = 4.75 V,

11=-18mA

VOH

High-level output voltage

Vcc = 4.75 V,

IOH=-20mA

VOL

Low-level output voltage

Vcc = 4.75 V,

IOL=20mA

10Z

Off-state (high-Impedance-state) output current

II

Input current at maximum input voltage

IIH
IlL

.

VCC = 4.75 V

MIN

TYpt

V
0.5

IV O=0.5V

-20

I Vo = 2.5 V

20

r.lA

0.1

mA

High-level input current

Vee = 5.25 V,

VI=2.7V

20

r.lA

Low-level input current

Vcc = 5.25 V,

VI = 0.4 V

-0.36

mA

-150

mA

80

mA

= 5 V, TA = 25°e
TEST CONDITIONS

Propagation delay time,
low-to-high-Ievel output
Propagation delay time,

MIN

TYP

MAX

UNIT

14

20

ns

14

20

ns

CL =30 pF,

See Figure I,

S 1 and S2 open

1

6

ns

Output enable time to high level

CL =30 pF,

RL = 75 Q,

See Figure 1

25

40

ns

CL=30 pF,

RL=180Q,

See Figure 1

37

45

ns

21

30

ns

23

35

ns

high-to-Iow-Ievel output
Output-to-output skew

!PZL

Output enable time to low level

tpHZ

Output disable time from high level

tpLZ

Output disable time from low level

CL= 10 pF,

See Figure I,

S 1 and S2 closed

TEXAS ,If

INSJRUMENlS
2-6

V

VI=7V

PARAMETER

tpZH

V

Vcc = 5.25 V,

switching characteristics, Vee

IpHL

UNIT

-1.5
2.5

Short-circuit output current;
-30
VCC=5.25V
lOS
Supply current
32
Vee = 5.25 V, All output disabled
ICC
t All typical values are at Vee = 5 V and T A = 25°C.
:f: Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second.

tpLH

MAX

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

AM26LS31C
QUADRUPLE DIFFERENTIAL LINE DRIVER
PARAMETER MEASUREMENT INFORMATION
Input A

-11.3

V

(See Note B) I

~ tPLH--+I

11
.

outputy.I

--li-s-k-e-w-I".J.:
tpHL

.1
I

I..

I

\1.5V

OutputZ

PROPAGATION DELAY TIMES AND SKEW
Enable G

-:::::\r 1.5 V /~

EnableG -

-

---+I
I

1

I 51 Closed
S20pen

i

I
~
Waveform 2
(See Note D)

-

-

"'

X
·1- -

_

~+1.5 V

3V

1.5 V

-'I'
:.-- tpZL

Waveform 1
(See Note D)

-

(See Note C)

~

tpLZ
-4.5 V

-

-

I

I
I

r=y ___

I

I
tpZH

51 Open
52 Closed

---+I

tpHZ

-

.1
I 51 Closed
I" 52::tClosed

OV

.1.5 V
VOL

0.5 V

1<1

.:

0.5 V

\==t---

~

T ~·~~..ov

51 Closed

VOH
.1.5 V

52 Closed
ENABLE AND DISABLE TIMES
VOLTAGE WAVEFORMS
Test Point

VCC

From Output _ _............--{)"S_'
Under Test
CL
(See Note E)

J

'M 0

750

I

52

TEST CIRCUIT
All input pulses are supplied by generators having the following characteristics: PRR s 1 MHz, Zo • 50 0, t r " 15 ns, and tf " 6 ns.
When measuring propagation delay times and skew, sw~ches 81 and 52 are open.
Each enable is tested separately.
Waveform 1 is for an output with internal conditions such thatthe output is low except when disabled by the output control. Waveform 2
is for an output with internal conditions such that the output is high except when disabled by the output control.
E. CL includes probe and jig capacitance.

NOTES: A.
B.
C.
D.

Figure 1. Switching Times

TEXAS

.Jf

INSlRUMENTS
POST OFFICE BOX 655303 ., DALLAS, TEXAS 75265

2-7

AM26LS31C
QUADRUPLE DIFFERENTIAL LINE DRIVER
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE

OUTPUT VOLTAGE

vs

vs

ENABLE G INPUT VOLTAGE

ENABLE G INPUT VOLTAGE

4

4

I
-'VCC=5.25V
VCC=5V
VCC=4.7SV

TA=70'C

3

>

.,
I

I

i

Jl!'"
~
:;
a.

TA=O'C_

3

>

~

2

I

I

Load =470 0
to Ground
See Note 2
TA = 2S'C

o

o

~

I

I
1
2
VI- Enable G Input Voltage - V

t-

o

3

VCC=SV
Load =4700
toGround
See Note 2

o

I

I
1
2
VI- Enable G Input Voltage - V

Figure 2

5

OUTPUT VOLTAGE

vs

vs

ENABLE G INPUT VOLTAGE

ENABLE G INPUT VOLTAGE
6

I
I
Load = 470 0 to VCC
TA=2S'C
See Note 3

I.
VCC=S.2SV
VCC=SV
VCC=4.7SV

>I

~

4

:;

3

:
I

I

~

TA=70'C' '\

I

4

~

~

~
0

I
VCC=ISV
Load = 470 0 to VCC
See Note 3

S

>

.,I

I

2

o

~

l\
o

2

3

I

ITA = 2SJC
3
TA=ri,C

~

r-

2

o

,
\.t
o

Vi - Enable G Input Voltage - V

Figure 4

2
VI- Enable G Input Voltage - V

FigureS

NOTES: 2. TheA input is connected to Vee during the testing of the Youtputs and to ground during testing of the Z outputs.
3. The A input is connected to ground during the testing of the Y ouputs and to Vee during the testing of the Z outputs.

TEXAS -If

INSTRUMENTS
2-8

3

Figure 3

OUTPUT VOlTAGE

6

-r-

2

I

:;

0

~

TA=25'C

POST OFFICE BOX 655303 • DAUAS, TEXAS 75265

3

AM26LS31C
QUADRUPLE DIFFERENTIAL LINE DRIVER
TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE

HIGH-LEVEL OUTPUT VOLTAGE

vs

vs

FREE-AIR TEMPERATURE

HIGH-LEVEL OUTPUT CURRENT

5
VCC=5V
See Note 2

>
I

"'"
~

4

~

;;

~

3~

0
'ii

a;

oJ
I

-

IOH =-20mA

IOH=-40mA -

2

.c
.2'

J:
I
J:

-?

TA = 25·C
See Note 2

o

o

25
50
TA - Free-Air Temperature - ·C

75
IOH - High-Level Output Current - mA

Figure 6

Figure 7

LOW-LEVEL OUTPUT VOLTAGE

LOW-LEVEL OUTPUT VOLTAGE

vs

vs

FREE-AIR TEMPERATURE

LOW-LEVEL OUTPUT CURRENT

0.5

l

VCC=5V
IOL=40mA
See Note 3

>

0.4

I

0.8

"'"
~

0.7

;;

0.6

0

0.5

~
0.3

~

0.2

~

0.4

~

.3

0.3

oJ

0.1

-?
o

75

...........: V
~V

2

VCC=5.2SV

~ /'

0.2

r

0.1

o
25
50
TA - Free-Air Temperature - ·C

I

I
/

/V/
VCC=4.75V./

!I
I

o

TA = 2S·C
See Note 3

0.9

o

20

40

60

80

100

120

IOL - Low-Level Output Current - mA

Figure 9

Figure 8

NOTES: 2. The A input is connected to Vee during the testing 01 the Youtputs and to ground during testing 01 the Z outputs.
3. The A input is connected to ground during the testing olthe Y outputs and to Vee during the testing 01 the Z outputs.

TEXAS ."

INSlRUMENlS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-9

AM26LS31C
QUADRUPLE DIFFERENTIAL LINE DRIVER
TYPICAL CHARACTERISTICS
Y OUTPUT VOLTAGE
vs
DATA INPUT VOLTAGE

Y OUTPUT VOLTAGE
vs
DATA INPUT VOLTAGE

5

5
No Load
TA=25·C

>

4

VCC=5.25V -

I

"

~
'5
'5

>

I

TA=7O·C

"

III

~

3

~

TA=O·C

3

...

...

0

4

I

V"" = 5 V
VCC = 4.75 V

III

~

'5

TA=25·C -

'5

0

2

I

~

2

~

o

o

o
2
VI - Data Input Voltage - V

3

o

Figure 10

2
VI - Data Input Voltage - V

Figure 11

TEXAS ~

INSlRUMENIS
2-10

1-

No Load
TA=25·C

.1

POST OFFICE BOX 655303 • DALlAS. TEXAS 75265

3

AM26LS32AC, AM26LS33AC, AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
02434, OCTOBER 1980-REVISED SEPTEMBER 1986

AM26LS32AC. AM26LS33AC ... D. J, OR N PACKAGE
AM26LS32AM, AM26LS33AM ... J PACKAGE

•

AM26LS32A Meets EIA Standards
RS-422-A and RS-423-A

•

AM26LS32A Has ± 7-V Common-Mode
Range With ± 200-mV Sensitivity

'TOP VIEW)

•

AM26LS33A Has ±15-V Common-Mode
Range With ± 500 mV Sensitivity

•

Input Hysteresis ... 50 mV Typical

•

Operates From a Single 5-V Supply

•

Low-Power Schottky Circuitry

Vee

18
1A
1Y

48
4A
4Y

G

G

2Y
2A
28

3Y
3A
38

GND

•

3-State Outputs

•

Complementary Output Enable Inputs

•

Input Impedance ... 12 kO Min

« co u uu co

•

Designed to Be Interchangeable With
Advanced Micro Devices AM26LS32C and
AM26LS33C

3

AM26LS32AM. AM26LS33AM .•. FK PACKAGE
'TOP VIEW)

2>'<1'

description
The AM26LS32A and AM26LS33A are
quadruple line receivers for balanced and
unbalanced digital data transmission, The enable
function is common to all four receivers and
offers a choice of active-high or active-low input.
Three-state outputs permit connection directly
to a bus-organized system. Fail-safe design
ensures that if the inputs are open, the outputs
will always be high,

2

1 2019
18

4
5

17

6

16

7

15

8

14
9 1011 1213

NC - No internal connection

Compared to the AM26LS32C and the AM26LS33C, the AM26LS32A and AM26LS33A incorporate an
additional stage of amplification to improve sensitivity. The input impedance has been increased resulting
in less loading of the bus line, The additional stage has increased propagation delay; however, this will
not affect interchangeability in most applications.
The AM26LS32AC and AM26LS33AC are characterized for operation from OOC to 70°C, The
AM26LS32AM and the AM26LS33AM are characterized for operation over the full military temperature
range of - 55°C to 125°C.
FUNCTION TABLE 'EACH RECEIVER)
DIFFERENTIAL

ENABLES

INPUT
VID ;,: VTH
VTL " VID " VTH
VID " VTL
X

OUTPUT

G

G

H

X

H

X

L

H

H

X

X

L

H

X

?
?
L
L
Z

X

L

L

H

H = high level, L = low level, X = irrelevant
Z = high impedance 'off). 7 = indeterminate
PRODUCTION DATA documants contain information

currant 81 of publication date. Products conform to

specifications per the terms of Texas Instruments

::~~:~~i~ai:I~1e ~:~:~i:r :'~D:::::::::'s

not

TEXAS

~

Copyright © 1986, Texas Instruments Incorporated

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-11

AM26LS32AC, AM26LS33AC, AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
logic symbol t

lA

logic diagram (positive logic)

131

1Y

>--1-""(3,,,,1 1Y

2Y

(61 2y

lB
2A

151

2B
3A

1111

3B
4A

3Y

(131 4Y

(111 3y

4B
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.
Pin numbers shown are for D, J, and N packages.

(131 4y

schematics of inputs and outputs
EQUIVALENT OF EACH

EQUIVALENT OF EACH ENABLE INPUT

DIFFERENTIAL INPUT
VCC------~---.--

20 k!l
NOM

VCC----------.----B.3 k!l
NOM

ENABLE-f-.....--i

INPUT_~--~=-+-_

TEXAS . .

INSTRUMENTS
2-12

POST OFFICE BOX· 655303 • DALLAS, TEXAS 76265

TYPICAL OF ALL OUTPUTS

AM26LS32AC. AM26LS33AC. AM26LS32AM. AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
AM26LS32AC

AM26LS32AM

AM26LS33AC

AM26LS33AIiII

Supply voltage, VCC Isee Note 1)

UNIT

7

7

V

Input voltage, any differential input

±25

±25

V

Differential input voltage Isee Note 21

±25

±25

V

See Dissipation Rating Table

Continuous total power dissipation

o to

Operating free-air temperature range

- 55 to 125

70

Lead temperature 1,6 mm 11116 inch)

D or N package

from case for 10 seconds
Case temperature for 60 seconds

°c

300

J package

from case for 60 seconds

°C

260

FK package

Lead temperature 1,6 mm 11116 inch)

°c

-65 to 150

-65 to 150

Storage temperature range

260

°c

300

°C

NOTES: 1. All voltage values, except differential voltages, are with respect to the network ground terminal.
2. Differential voltage values are at the noninverting (A) input terminals with respect to the inverting (8) input terminals.

DISSIPATION RATING TABLE
PACKAGE

TA '" 25°C
POWER RATING

DERATING FACTOR

TA = 70°C

ABOVE TA - 25°C
7.6 mWloC

POWER RATING

D

950 mW

FK

1375 mW

11.0 mWloC

880 mW

J IC-SUFFIX)
J 1M-SUFFIX)

1025 mW

8.2 mWloC

656 mW

1375 mW

11.0 mWloC

880 mW

N

1150mW

9.2 mWloC

736 mW

TA - 125°C
POWER RATING

608 mW
275 mW
275 mW

recommended operating conditions
AM26LS32AC

AM26LS32AM
AM26LS33AM

AM26LS33AC
Supply voltage, VCC

NOM

MAX

MIN

NOM

MAX

4.75

5

5.25

4.5

5

5.5

High-level input voltage, VIH

2

Low-level input voltage, VIL
Common-mode input voltage, VIC

I AM26LS32AC, AM26LS32AM
I AM26LS33AC, AM26LS33AM

High-level output current, IOH
Low-level output current, IOL

Operating free-air temperature, T A

0

TEXAS

UNIT

MIN

V
V

2
0.8

0.8

±7

±7

±15

±15

-440

-440

pA

8

8

mA

125

°c

70

-55

V
V

~

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TEXAS 76265

2-13

AM26lS32AC, AM26LS33AC, AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS

electrical characteristics over recommended ranges of Vee, VIC, and operating free-air temperature
(unless otherwise noted)
PARAMETER
Differential input

VTH

high-threshold voltage
Differential input

VTL

low-threshold voltage

VIK

Hysteresis, VT + - VT- §
Enable input clamp voltage

VOH

High-level output voltage

VOL

Low-level output voltage

Vhvs

Off-state (high-impedance-state)
10Z

output current

TEST CONDITIONS

Vo = VOHmin,
Vo = 0.45 V,

10L = 8 mA

VCC = MIN,

11=-18mA

VCC = MIN,
VI(G) = 0.8 V,

VID = 1 V,
10H = -440

VCC = MIN,

VID = -1 V,

Typt

MAX

0.2

AM26LS33A

0.5

AM26LS32A

-0.2*

AM26LS33A

-0.5*

~A

VI(G) = 0.8 V
VCC = MAX

2.7

'32AM, '33AM

2.5

10L = 4 mA

0.4
0.45

Va = 2.4 V

20
-20

VI = 15 V,
VI = -15V,

Other input at -15 V to 10 V

line input current

II(EN)

Enable input current

IIH

High-level enable current

IlL
rj

Low-level enable current

VI = 0.4 V

Input resistance

VIC -

)05

Short-circuit output current'
Supply current

VCC = MAX

V
V

10L = 8 mA
Va - 0.4 V
Other input at -10 V to 15 V

V

mV
-1.5

'32AC, '33AC

UNIT

V
50

II

ICC

10H = -440 pA

MIN

AM26LS32A

1.2
-1.7

V
~A

mA

VI = 5.5 V

100

~A

VI = 2.7 V

20

pA

-0.36

mA

-85

mA

70

mA

-15Vto 15V, One input to AC ground

VCC = MAX,

12

15

-15
All outputs disabled

52

kll

t All typical values are at VCC = 5 V, T A = 25 ·C, and VIC = O.
tThe algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold

levels only.
§Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative·going input threshold voltage,
VT _. See Figures 10 and 11.
'Not more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.

switching characteristics, Vee = 5 V, TA = 25°e
PARAMETER

TEST CONDITIONS

tpLH

Propagation delay time, low-to-high-Ievel output

tpHL

Propagation delay time, high-to-Iow-Ievel output

tpZH

Output enable time to high level

tpZL

Output enable time to low level

tpHZ
tpLZ

Output disable time from high level
Output disable time from low level

CL=15pF,

See Figure 1

CL = 15 pF,

See Figure 1

CL = 5 pF,

See Figure 1

TEXAS .."

2-14

INSTRUMENTS
POST OFFICE BOX 865303 • DALLAS. TEXAS 75265

MIN

TYP

MAX

20

35

ns

22

35

ns

17

22

ns

20

25

ns

21

30

ns

30

40

ns

UNIT

AM26LS32AC, AM26LS33AC, AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
PARAMETER MEASUREMENT INFORMATION
TEST
POINT

INPUTJOV

--+2.5V

O V )....
: _-_ _

I
FROM OUTPUT _ _ _.................- .
UNDER TEST
CL

(See Note BI
OUTPUT

(See Note Al

VOLTAGE WAVEFORMS FOR tpLH. tpHL
TEST CIRCUIT

ENABLE

ENABLE
G

G

Ir:::::::-- 3
ENABLE

-

G
S1 open
S2 closed

OUTPUT _ _ _- I

V

ENABLE

- - -OV
0.5 V ,

G

~~:-VOH

I
~~1.4V
tpHZ ~ S1 closed

1.3V

S2 closed
tpLZ

~

~~ 1.4 V

J._

OUTPUT
S2 open

S2 closed
VOLTAGE WAVEFORMS FOR tpHZ. tpZH

-,§-VOL
0.5 V

VOLTAGE WAVEFORMS FOR tpLZ. tpZL

NOTES: A. CL includes probe and jig capacitance.
B. All diodes are , N3064 or equivalent.
C. Enable G is tested with G high; G is tested with Glow.

FIGURE 1

TEXAS . .

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 75285

2-15

AM26LS32AC, AM26LS33AC, AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT

5

a.

J:.
:E

'"

VCC = 4.75 V

I
:t:
0

>

o

-10

>

.3

-30

2

J:.
:E

'"

~~
~~
~~

-20

3

0

I~ ~ VVCCI- 5 j 25 Y
I~ ~ VCC - 5 V

2

o

=
=
a;

1"'\ ~

a;

4

>

~~

3

0

>

I

i'"

~

>

......

..

4

"0

=
~

>

TA - 25°C

I

S'"

5

V:O _I 0.2I V_

>

..

HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

I
:t:
0

VCC - 5 V
VIO - 0.2 V
IOH = -440/LA

>

o

-40

-50

-I

o

II

10

20

0.6
VCC - 5 V
TA - 25°C
0.5

>

0.4

I

.ll!'"
0

=
=
a.

0

0.3

l

....
CD

~

0.2

0

0.1

oS
....I
>

/

/

V

/V

/

/'

/

70

80

>
I

"
.ll!'"

0.4

0

>

=
So

0.3

'"

0
'ii
>

...."

0.2

~

....0
....I

0.1

VCC - 5 V
VIO - -0.2 V
IOL-8rnA

0

0

5

10

15

20

25

30

o

I

I

10

20

IOL-Low-Level Output Current-rnA

FIGURE 4

30

40

POST OFFICE BOX 655303 • DAL.LAS. TEXAS 76265

50

60

TA-Free-Air Ternperature- °C

FIGURE 5

TEXAS . . ,
INSTRUMENTS
2-16

60

0.5

/

>

o
o

50

LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT

..

40

FIGURE 3

FIGURE 2

>

30

TA-Free-Air Ternperature- °C

IOH-High-Level Output Current-rnA

70

80

AM26LS32AC, AM26LS33AC, AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE

OUTPUT VOLTAGE

vs

vs

ENABLE G VOLTAGE

ENABLE G VOLTAGE

5

5

VIO - 0.2 V
- TA - 25°C
load - 8 kG
4 - to ground

>

Vee - 5.5 V

4

>

Vee - 5 V

..

1

.ll!0

3

~

2

J

I

..

1

Vee - 4.5 V

CI

Vee - 5 V
VIO - 0.2 V
Load - 8 kG to ground
T A _ 700C - ~ A - 25°C

CI

~

..

>
:;

TA - ooe

3

>
::I

0.

0

:;
0

1

2

1

0

0

>

>

o

o

o
1.5

0.5

2

2.5

3

o

0.5

FIGURE 6

vs

ENABLE G VOLTAGE

ENABLE G VOLTAGE

Vee - 5 V

5

Vee - 4.5 V

3

OUTPUT VOLTAGE

vs

I

Vee - 5.5 V

2.5

FIGURE 7

OUTPUT VO LTAG E

6

2

1.5

Enable G Voltage-V

Enable G Voltage-V

6

J
-0.2 V

VID TA - 25°C
Load - 1 kG to Vee

Vee - 5 V
VIO - -0.2 V
oad - 1 kG to Vee

5

>

I

1

~

.ll!
~

..

~
o
II

4
TA - 25°e- r+

i

3

I

1

1

2

2.5

~ TA = ooe

I

TA I. 700b ....
2

o
>

o

o

0.5

1.5

2

2.5

3

o

o

0.5

Enable G Voltage-V

1.5

3

Enable G Voltage-V

FIGURE 8

FIGURE 9

TEXAS ...
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-17

AM26LS32AC, AM26LS33AC, AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
TYPICAL CHARACTERISTICS
AM26LS33A
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE

AM26LS32A
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
5

4

5
VCC - 5 V
10 - 0
TA = 25°C

>

.,I
i'"

3 -

>

5Q.
5

I

VCC - 5 V

VIC- VIC·
-7 V OV

I

I

-VT- VT+ VT +
VT

4

vIC7V

>

.,I
'"
~.

r--vT- VT+

v~d= - f-~I~- I-r---~VIC- r---

-

-15 V

OV

15 V

VT-

VT-

VT-

VT+

VT+

VT+

3

>
5

e0"
I

2

0
I
0

TA - 25°C

10 - 0

2

0

>

>

o

o

-200 -150-100-50 0

50

100 150200

-200-150-100-50

VID-Differential Input Voltage-mV

INPUT CURRENT
vs
INPUT VOLTAGE

21-+--+-~~~~~-+-If--t---i

I

E
~

"

C,)

5

@'
I
.=

-1

-2

-25-20-15-10-5

0

5

10 15 20 25

VI-Input Voltage-V

FIGURE 12

TEXAS •
INSTRUMENTS
2-18

50

FIGURE 11

FIGURE 10

~

0

100 150 200

VID-Differential Input Voltage-mV

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

AM26LS32AM, AM26LS33AM, AM26LS32AC, AM26LS33AC
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
APPLICATION INFORMATION
~

~

AM26LS31C

DATA

RT*

IN

~

Y. AM26LS32AC

AM26LS32AC
DATA
OUT

AM26LS33AC
DATA
OUT

DATA
OUT

*RT equals the characteristic impedance of the line.

FIGURE 13. CIRCUIT WITH MULTIPLE RECEIVERS

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 15265

2-19

2-20

AM26S10C, AM26S11C
QUADRUPLE BUS TRANSCEIVERS
D2298. JANUARY 1977-REVISED MAY 1990

AM26S10C. AM26S11C ... D, J, OR N PACKAGE
(TOP VIEW)

•

Schottky Circuitry for High Speed, Typical
Propagation Delay Time . . . 12 ns

•

Drivers Feature Open-Collector Outputs for
Party-Line (Data Bus) Operation

•

Driver Outputs Can Sink 100 rnA at 0.8 V
Maximum

•

P-N-P Inputs for Minimal Input Loading

•

Designed to Be Interchangeable With
Advanced Micro Devices AM26S 10 and
AM26S11

Vee

GND
16
1R
1D
2D
2R
29
GND

49
4R
4D
S
3D
3R
39

description
The AM26S 10 and AM26S 11 are quadruple bus transceivers utilizing Schottky-diode-clamped transistors
for high speed. The drivers feature open-collector outputs capable of sinking 100 mA at 0.8 V maximum.
The driver and strobe inputs use p-n-p transistors to reduce the input loading.
The driver of the AM26S10 is inverting; the driver of the AM26S11 is noninverting. Each device has two
ground connections for improved ground current-handling capability. For proper operation, the ground pins
should be tied together.
The AM26S 1 oe and AM26S 11 e are characterized for operation over the temperature range of

70 o e.

AM26S10

AM26S11

FUNCTION TABLE

FUNCTION TABLE
(TRANSMITTING)

(TRANSMITTING)
INPUTS

INPUTS

OUTPUTS

ooe to

OUTPUTS

S

D

B

R

S

D

B

L

H

L

H

L

H

H

L

·L

L

H

L

L

L

L

H

R

AM26S10 AND AM26S11
FUNCTION TABLE
(RECEIVING)

H

PRODUCTION DATA documenls contain information
curront as of publication data. Products conform to
specifications per the terms of Taxas Instruments

::~~:~~~ai=I':li ~:~:~ti:r :,~o::::t::S

not

S

INPUTS
B

H

H

H

L

OUTPUT
D

R

X
X

H

= high level, L = low level,

L

X

= irrelevant

Copyright © 1990. Texas Instruments Incorporated

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-21

AM26S10C, AM26S11C
QUADRUPLE BUS TRANSCEIVERS
logic symbols t
AM26S10

AM26S11

s

1"'-_...:(-'.:.7) 28

p..._-.:.;(7:,.:1 28

p-_...:(::::.9) 38

p..._-,,(9~1 38

(151 48

(15) 48

tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

logic diagrams (positive logic)
AM26S11

AM26S10

10(41

(21 18

P-__....H-+-...:;(2::=-1 18

(71 28

(71 28

(91 38

(9)

1R~(3~1--------~---C
20~(5~1--------~L-~

2R~(6~1--------~---<
3D (11)

3R(10)

40 (131

(151 48

4R (141

TEXAS.

INSTRUMENTS
2-22

POST OFFICE BOX 655303'. DALLAS. TeXAS 75266

38

AM26S10C. AM26S11C
QUADRUPLE BUS TRANSCEIVERS
schematic (each transceiver)
B---~====~======~==~

r·-;·l

2 kO

i
i
i

NOM

__

~~+-____~~~__- +___ Vcc
110 O·
NOM

I

v

I

AM26S11i

It

I .
I
I

!
!

R

.--+-.f4---+ IL .. ...J
I
_ .J ___ -.J
I

AM26S10

I

I
I
I

~--

__------~~----~--~----~----~--~~----~~~--~--~--~----GND

,------------ --------- --------1
I
I

~~
~M

I

I

~MMON---~

I
I

CIRCUITRY

I

TO THREE

I

I

+--~-g!~EE~S

I s

I
I

I

TO ONE

TO TWO

~:~:'~ER

~:~:'~ERS

I
I

I

I

I

L ____________________________________

I

~

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

2-23

AM26S10C, AM26S11C
QUADRUPLE BUS TRANSCEIVERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, Vcc (see Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Driver or strobe input voltage range ................................... -0.5 V to 5.5 V
Bus voltage range, driver output off .................................. -0.5 V to 5.25 V
Driver or strobe input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Driver output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 200 mA
Receiver output current .......... '. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 30 mA
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . .. O°C to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............. 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package. . . . . . . .. 260°C
NOTE 1: All voltage values are with respect to network ground terminals connected together.
DISSIPATION RATING TABLE
PACKAGE

TA s 25·C

DERATING FACTOR

POWER RATING

ABOVE TA - 25·C

TA - 70·C
POWER RATING

D

950mW

7.6 mW/oe

J
N

1025 mW

S.2 mW/oe

60SmW
656 mw

1150 mW

9.2 mW/oe

736 mW

recommended operating conditions
Supply voltage, Vee
High-level input voltage, VIH
Low-level input voltage, VIL

D or S

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

2

D or S

O.S
1.75
-1

B

Receiver high-level output current, IOH
Low-level output current, IOL

I Driver

100
20

Receiver

0

Operating free-air temperature, T A

TEXAS

2-24

V

2.25

B

.Jf

INSlRUMENTS
POST.OFFICE BOX 855303. DALLAS. TEXAS

7~266

70

V
mA
mA
°e

AM26S10C. AM26S11C
QUADRUPLE BUS TRANSCEIVERS

electrical characteristics over recommended operating free-air temperature range
noted)
PARAMETER

VIK

Input clamp voltage

VOH

High-level output voltage

TEST CONDITIONS

D or
S

R

Vee = 4.75 V, VIH = 2 V,
10H = -1 mA

'Oloff) Off-state output current

IIH
II

High-level input current

B
D

r-s

Input current at maximum

D or

input voltage

S

I,L

Low-level input current

lOS

Short-circuit output current:!:

lee

8

D

r-sR

Supply current

VIH = 2 V,
VIL = 0.8 V

I Vee
I Vee
I Vee

VIH = 2 V,
VIL = 0.8 V

VIL = 0.8 V,

2.7

MAX

UNIT

V

3.4

V
0.5

10L = 40 mA

0.33

0.5

10L = 70 mA

0.42

0.7

0.51

10L = 100 mA
= 5.25 V, Vo = 0.8 V

V

0.8
-50

= 5.25 V, Vo = 4.5 V
= 0,
Vo = 4.5 V

100

pA

100
30

Vee = 5.25 V, VI = 2.7 V

20
100

Vee = 5.25 V, VI = 5.5 V

-0.54

Vee = 5.25 V, VI = 0.4 V

-0.36
-60

-18

Vee = 5.25 V
Vee = 5.25 V, Strobe at 0 V,

otherwise

-1.2

10L = 20 mA

I--- Vee = 4.75 V,
Low-level output voltage

Typt

MIN

Vee = 4.75 V, 11= -18 mA

R

VOL

(un~ess

No load,

45

70
80

All driver outputs low

pA
pA
mA
mA
mA

t All typical values are at T A = 25°e and Vee = 5 V.
iNat more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.

switching characteristics. Vee = 5 V. T A
PARAMETER

tpLH

FROM

Propagation delay time. low-to-high-Ievel output

tpHL Propagation delay time, high-to-Iow-level output
tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
tpLH Propagation delay time, low-to-high-fevel output
tpHL Propagation delay time, high-to-Iow-Ievel output
tTLH Transition time, low-to-high-Ievel output
tTHL Transition time, high-to-Iow-Ievel output

0

5

=

25°e

TO

TEST
CONDITIONS

AM26S10
MIN

B

8
See Figure 1

8

R
B

AM26S11

TYP

MAX

MIN

TYP

MAX

10

15

12

19

10

15

12

19

14

18

15

20

13

18

14

20

10

15

10

15

10

15

10

15

4

10

4

10

2

4

2

4

UNIT

ns
ns
ns
ns

TEXAS .."

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS, TEXAS 75265

2-25

AM26S 1DC, AM26S 11 C
QUADRUPLE BUS TRANSCEIVERS

PARAMETER MEASUREMENT INFORMATION
VCC

,·---·-·-·-·-·-·-·-·----1
"'-"+-,... -

50 II

.-------------I----~~--------.

AM26S11

-{>o- -1

I
I

280 II

I

RECEIVER

iL._._._._._._._._. ___ ._. ___ J,
50 pF
(See Note 8)

o

1

15 pF
(See Note 8)

5

(See Note CI

1
R

8
TEST CIRCUIT

AM26S11

~~-::']......,..,.,..,,..,..,.....,,.....J*r------------------------------------ :.:
I
I

I
I

AM26S10

0 V

~T:~:E _i_i----_+i------'/I

\===== ::v

__

I

~

14-

tPLH
(OtoB

'~-1

-.j ... tpHL

--I :-.... BtPtHoLR

I

OtoB

--.t

14I

OV

I

tpLH
StoB

-.t 14I

tpHL
StoB

\. ----...Jl r~==::v

-+I ... tPLH
I B to R

~~~~~~R---.,\I.._____JI

j4-

.....I
"1

I

--I

tPHL
14- tPLH
B to R I B to R

.....L£ ~::

\\.___

VOLTAGE WAVEFORMS
NOTES: A. The pulse generators have the following characteristics: Zo = 50 II, tr = 10 ± 5 ns.
B. Includes probe and jig capacitance.
C. All diodes are 1 N916 or equivalent.

FIGURE 1

TEXAS .."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

2-26

V

AM26S 1DC, AM26S 11 C
QUADRUPLE BUS TRANSCEIVERS
APPLICATION INFORMATION
STROBE
DRIVER
INPUTS

]If
DODD

5 V

AM26S101
AM26S11
B
100 !l
100 !l

B

1 I

1

B

B

STROBE

STROBE
DRIVER

RECEIVER

INPUTS

OUTPUTS

~

RECEIVER
OUTPUTS

r-"'-.,

"J !!!!
R-

SR

AM26S101
AM26S11

RR_

B

B

B

B

DRIVER
INPUTS

DODD

rR r---

1 I

SR

AM26S101
AM26S11
B

B

1 I

1

~

nIT

R

Rr--

RECEIVER
OUTPUTS

1

B

B

5 V

RRR_
100 !l
100 !l

100 !l

100 !l

100 !l

100 !l
100-!) TRANSMISSION LINE

FIGURE 2_ PARTY-LINE SYSTEM

TEXAS •
INSTRUMENTS
POST OFFICE SOX 655303 • DALLAS, TEXAS 75265

2-27

2-28

DP8480
10K ECl-TO-TTL lEVEL TRANSLATOR WITH lATCH
03058, NOVEMBER 1987-REVISED DECEMBER 1988

o OR N PACKAGE

•

ECl Control Inputs

•

3-State Outputs

•

10K ECl Input Compatible

•

Package Options Include Plastic "Small
Outline" Package and Standard Plastic
300-mil DIPs

•

Direct Replacement for National
Semiconductor DP8480

(TOP VIEW)

VEE
DO
01
02
03
04

IT
GNO

Vee
00
01
02
03
04

OE
GNO

description
This circuit translates ECl input levels to TTL output levels and provides an inverting transparent latch.
The 3-state outputs are designed to drive highly capacitive loads. All inputs operate at ECl levels.
If Latch Enable (LE) is low, the latches are transparent and the Q outputs follow the complement of the
o inputs. If LE is high, the outputs are latched. If output enable (OE) is high, the outputs are in the
high-impedance state, as they are during power up and power down.
The DP8480 is characterized for operation from O°C to 75°C.

logic symbol t

logic diagram

ECl/TTL

DO (2)

EN

Dl (3)

.;....;----1--110

D2 (4)
D3 (5)

ECl/TTL

D4 (6)

EN
tThis symbol is in accordance with ANSIIIEEE' Std 91-1984
and lEe Publication 617-12.

10
ECl/TTL

FUNCTION TABLE
(EACH lATCHITRANSLATOR)
Q

X

0
X

L

L

H

L

L

H

L

L

H

X

QO

OE

lE

H
L

EN

(13) Q2

Z
ECl/TTl
EN

10
ECllTTL
EN

10

PRODUCTION DATA do.umenll .ontein infarmatl.n
• urrent as of publicati.n date. Produots ••of.... to
speoifi..tl... per the term. of Texas Instrumenll
=rI~·{:'~'la =:~:; :.r;:::~:" not

Copyright © 1987. Texas Instruments Incorporated

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 76265

2-29

DP8480

10K ECl·TO·TTl lEVEL TRANSLATOR WITH lATCH
absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Supply voltage, VEE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 8 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 0 V to VEE
Output voltage, Vo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range ...................................... ooC to 75°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260°C
DISSIPATION RATING TABLE
PACKAGE

TA ,,;26°C
POWER RATING

DERATING FACTOR

D

950 mW

ABOVE TA - 25°C
7.6 mw/oe

N

1150mW

9.2 mw/oe

TA - 75°C
POWER RATING
570 mW
690mW

recommended operating conditions
MIN
4.5

Supply voltage, Vee

High-level input voltage, VIH
(see Note 1)
Low-level input voltage, VIL
(see Note 1)

= ooe
= 25°C
= 75°C
= ooe

TA
TA
TA

TA - 25°C

=

TA

MAX

5
5.5
-4.68 -5.20 -5.72
-1145
-840

Supply voltage, VEE
TA

NOM

75°C

-1105

-810

-1045

-720

-1870
-1850

-1490
-1475

-1830

-1450

UNIT
V
V
mV

mV

Pulse duration. LE low. tw (see Figure 1)

5

ns

Setup time, data before LEt, tsu (see Figure 1)
Hold time, data after LEt, th (see Figure 1)

3

ns

Operating free-air temperature, T A

0

3

ns
75

°e

NOTE 1: The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet
for logic levels only.

electrical characteristics over recommended ranges of supply voltages and operating free-air temperature
(unless otherwise noted)
PARAMETER
VOH

High-level output voltage

TEST CONDITIONS
IOH -

-10 mA

= 12 mA
= VIH max

VOL

Low-level output voltage

IOL

IIH

High level input current

VIH

IlL

Low-level input current

IOHS

High-state short-circuit output current

VIL - VIL min
VOHS = 0, See Note 2

IOLS
IOZ

High-impedance state output current

ICC

Supply current from Vee

lEE

Supply current from VEE

low-state short-circuit output current

MIN

VOLS = 2,5 V, See Note 2
Vo - 0 to 5 V
Outputs open, Inputs = VIL
Outputs open, Inputs - VIL

Typt

MAX

Vee-2

-70
70

UNIT
V

0.2

0.5

V

75

350

p.A

50
-150

85

p.A
mA
mA

150
±1

±50

p.A

16

35

mA

-30

-50

mA

tTypical values are at Vee = 5 V, VEE = -5.2 V, TA = 25°C.
NOTE 2: During testing of IOHS or IOLS, only one output should be tested at a time and the current should be limited to a maximum
of ±120 mAo

TEXAS . "
INSTRUMENTS
2-30

POST OFFICE BOX 655303 • DALlAS. TEXAS 75265

DP8480
10K ECl-TO-TTL lEVEL TRANSLATOR WITH lATCH
switching characteristics over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted)
MIN

TYpt

MAX

tpLH

Propagation delay time. low-to-high-Ievel output from LE input

4

10

15

ns

tPHL

Propagation delay time. high-to-Iow-Ievel output from [E' input

4

11

15

ns

3.5

10

15

ns

3.5

11

15

ns

PARAMETER

TEST CONDITIONS

UNIT

tPLH

Propagation delay time. low-to-high-Ievel output from D input

tPHL

Propagation delay time. high-to-Iow-Ievel output from 0 input

ten

Output enable time from

"15E input

6

12

25

ns

tdis

Output disable time from

OE input

4.5

8

22

ns

eL = 50 pF.
See Figure 1

tTypical values are at Vee = 5 V. VEE = -5.2 V. TA = 25°e. and with all channels switched simultaneously.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 75265

2-31

DP8480
10K ECl-TO-TTL lEVEL TRANSLATOR WITH lATCH

PARAMETER MEASUREMENT INFORMATION
7V

!

S1

SOO !l
Q~~----.

CL
(See Note A)

SOO!l

OUTPUT LOAD CIRCUIT
NOTE A: CL includes probe and jig capacitance.

14
[E - - - " " ' {

tl

tw

. L , . s - o - % - - - - - - - -....~SO%

"---"
~

I

i4-f-

-rc.:..t
1

I+-th

t su -+!

I

1
:

Q (S1 OPEN)

II

1

\

-

1
r-----+---------~

I I I
D

r \ ..... - _ ........ - - - - -- -O.S V

-1--------1.SV
I+-tPHL-+\

-I---VOH

, 2.4 V

~

'\

2.4 V

O.S V

,

f

SO%

f+,tPHL+!

""·-..;;;.;;.....;....---111--........

~~~

OE

_ - - - - - -O.S V

I
I

t

-1.10V

-----y-------

OE

SO%

OS V
.
VOL

I·

'+- ten---+!

3.S V
----:"V:-O-H--'"""l:0~.3:-:V~~ S1 CLOSED

+ 0.3VY"'-

'::C::":LO~S:::E::::D:--- ...'r:ft"C......-

'::S':"1

-1.10V
-1.47V

VOH

Q S1 OPEN

OV

VOL

S10PEN

NOTE B: ECL input rise times and fall time are 2 ns ±0.2 ns from 20% to SO%.

FIGURE 1. SWITCHING CHARACTERISTICS

TEXAS . "

INSTRUMENTS
2-32

I

\~.;:------

-1.47 V

,

VOL

I
I

~~~

~tdis

Q

1.S V

POST OFFICE BOX 665303 • DALLAS, TEXAS 75265

DP8481
TTL·TO·ECl (10K) lEVEL TRANSLATOR WITH lATCH
03059, NOVEMBER 1987 - REVISED AUGUST 1989

o OR

•

ECl Control Inputs

•

10K ECl Compatible

•

Propagation Delay ... 4 ns Typ

•

Package Options Include Plastic "Small
Outline" Package and Standard Plastic
300·mil DIPs

•

Direct Replacement for National
Semiconductor DP8481

N PACKAGE

(TOP VIEW)

VEE
00
01
02
03
04
DE
GND

Vee
DO
D1
D2
D3
D4
IT
GND

description
This circuit translates TTL input levels to ECl output levels and provides a 5-bit transparent latch. The
outputs are gated by Output Enable (OEI and can be wire-OR connected. The Latch Enable (LEI and OE
inputs are ECL.
If Latch Enable (lEI is low, the latches are transparent and the 0: outputs follow the complement of the
D inputs. If LE is high, the outputs are latched. If Output Enable (OEI is low, the outputs are forced to the
low level.
The DP8481 is characterized for operation from DoC to 75°C.
logic symbol t

logic diagram (positive logic)

OE

LE
DO
01
02

03
04

tThis symbol is in accordance with ANSI/IEEE Std 91-1984
and lEe Publication 617-12.
FUNCTION TABLE
(EACH LATCH/TRANSLATOR)
Q

OE

LE

0

H

H

L

H

L
L

L

H

H

H

X

QO

L

X

X

L

PRODUCTION DATA do.uments contain information
currant as of publication date. Products confurm to
spacifications par the tarms of Texas Instruments
:~~~::~~i~ar::,~'l~ ~:~::i:; :1~D:;::::9t:~~S not

Copyright @ 1987. Texas Instruments Incorporated

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-33

DP8481

TTL·TO·ECl (10K) lEVEL TRANSLATOR WITH lATCH
absolute maximum ratings over operating free· air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Supply voltage, VEE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 8 V
Input voltage, VI: OE or LE input ......................................... 0 V to VEE
Dinputs ........................................... -1 Vt05.5V
Output current, 10 ...................................................... - 50 mA
Continuous total dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating temperature range, TA ........................................ ooC to 75°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260°C
DISSIPATION RATING TABLE
PACKAGE

TA :s25°C
POWER RATING

o
N

950mW
1150mW

DERATING FACTOR
ABOVE TA - 25°C
7.6 mW/oC
9.2 mW/oC

TA - 75°C
POWER RATING
570mW
690mW

recommended operating conditions
MIN NOM MAX
5.5
4.5
5
-4.68 -5.20 -5.72

Supply voltage. V CC
Supply voltage, VEE
High-level input voltage. VIH (TIL-level 0 inputs)
low-level input voltage, Vil (TTL-level 0 inputs)
TA = OoC
High-level input voltage. VIH
(ECl-level OE and
(see Note 1)

LE inputs)

low-level input voltage, VIL
(Eel-level OE and LE Inputs)
(see Note 1)

-1145
-1105
-1045

TA = 25°C
TA = 75°C
TA = ooC
TA = 25°C
TA = 75°C

Pulse duration, LE low, tw
Setup time, tsu

2

l Data before LEt
I Data before OE! (see Note 2)

Hold time, data after LEt, th

NOTES:

-1490

-1850
-1830

-1475
-1450

5

(see Figure 1)
(see Figure 1)
(see Figure 1)

5

mV

mV
ns
ns

5.5
1
0

V
V
V

ns
75

°c

1. The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet
for logic levels only.
2. This setup time applies when operating in the transparent mode (LE is low) and it is necessary that valid data be available
at the output immediately after the outputs are enabled.

TEXAS ."

2-34

-810
-720

-1870

(see Figure 1)

Operating free-air temperature, T A

0.8
-840

UNIT
V

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

DP8481
TTL-TO-ECl (10K) lEVEL TRANSLATOR WITH lATCH
electrical characteristics over recommended ranges of supply voltages and operating free-air temperature
(unless otherwise noted)
PARAMETER
VIK
IIH
IlL

TEST CONDITIONS

Input clamp voltage

00-04

High-level input

00-04

II = -12 rnA
VI = 2.5 V

current

OE. LE

VI

Low-level input

00-04

current

OE,LE

VI
VI

High-level output voltage
VOH

Isee Notes 1 and 3)
Critical high-level

VEE -

VOHC output voltage
Isee Notes 1 and 3)

VEE
VEE
VEE

Low-level output voltage

VOL

= -0.8 V
= 0.5 V
= -1.8 V
VEE = -5.2 V,
VEE = -5.2 V,
VEE = -5.2 V,

VEE

Isee Notes 1 and 3)

VEE

VEE -

Critical low-level output
VOLC

Supply current from VCC

lEE

Supply current from VEE

NOTES:

TA
TA

= ooC
= 25°C
= 75°C

-5.2 V,

TA

-5.2 V,
-5.2 V,

TA
TA

-5.2 V,

TA

-5.2 V,

TA
TA - ooC

-5.2 V,

MAX

UNIT

-0.8

-1.2

V

1

40

-50

-200
150

-5.2 V,

= -5.2 V,
VEE = -5.2 V,
VCC = 5.5 V
VEE = -5.7V

TYpt

200

TA
TA - ooC

VEE

voltage Isee Notes 1 and 3)

ICC

=
=
=
=
=

MIN

TA
TA

= 25°C
= 75°C
= ooC
= 25°C
= 75°C
=
=

-1000

-840

-960

-810

-900

-720

I'A
I'A

mV

-1020
-980

mV

-920
-1870

-1665

-1850

-1650

-1830

-1625

mV

-1645

25°C

-1630

75°C

-1605

mV

20

rnA

-90

rnA

1. The algebraic convention, in which the least positive (most negative) value is designated one minimum, is used in this data
sheet for logic levels only.
3. VOH and VOL are tested using the "outer-limit" values VIH max and VIL min. The "critical" values VOHC and VOLC are
tested using the "inner-limit" values V,H min and V,L max. The latter values ensure the noise margins of 155 mV high and
125 mV low associated with 10K ECL.

switching characteristics over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted)
PARAMETER

MIN

Typt

MAX

1.5
).5

4

6

4

6

ns

RL = 5011 to - 2 V,

2.5

4

7.5

ns

See Figure 1

TEST CONDITIONS

tpLH

Propagation delay time, low-to-high level output from LE input

tpHL

Propagation delay time, high-to-Iow-Ievel output from LE input

tpLH

Propagation delay time, low-to-high-Ievel output from 0 input

UNIT
ns

tpHL

Propagation delay time, high-to-Iow-Ievel output from 0 input

2.5

4

7.5

ns

ten

Output enable time from OE input

1

3

4

ns

tdis

Output disable time from OE input

1

3

4

ns

tTypical values are at VCC

=

5 V, VEE

=

-5.2 V, TA

=

25°C.

TEXAS .."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-35

DP8481

TTL·TO·ECl (10K) lEVEL TRANSLATOR WITH lATCH
PARAMETER MEASUREMENT INFORMATION
OE

\~:----VIH
I
Vil

/SO%

----'I
j+--+I-tsu

I+-tdis--+f

~~--I---3V

I
I
I
OV
~ten~
I
~~50-%-----------------5-0~%)t--VOH

,1.svl
I

D

Q

.

. " - - vOL

I+-tw-+J
IT ------...~r--------------~

I

~thj+-

j+-+-tsu--+f

I

I

I

I
I

I

l
Q

I
I

I
I

- - - - - - - - - - - :::

I

I

,.---~I_ _ _ _ _.......

I
I

,.-_ _ _ _ 3

1.5V

V

1.5V

I
-1-------oV
I
!+----+t-tPHl
I.
'" tPHl
I r---------~ 1 J . r : : : _ ' s t " - - VOH

f

-------:-I--.....J I

50%

\,50%

T.

'-----;.-- I

50% " - - - VOL

14--.,,4-1 tPlH

1oII1.f---t"oI-l tplH

NOTE A: Eel input rise and fall times at OE and IT are 2 ns ±0.2 ns from 20% to 80%. TTL input rise and fall times at D inputs are
3 ns maximum measured between 10% and 90%.

FIGURE 1. SWITCHING TIME WAVEFORMS

TEXAS . "
INSTRUMENTS
2-36

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

LT1030
QUAD LOW-POWER LINE DRIVER
03297, APRIL 1989-REVISEO JULY 1989

±5 V to ± 15 V

•

Low Supply Voltage ...

•

Supply Current ... 500 IlA Typ

•

Zero Supply Current When Shut Down

•

Outputs Can Be Driven

LT1030 .,' 0 OR N PACKAGE
(TOP VIEW)
VCCIN1

±30 V

OUT1
ON/OFF

•

Output Open When Off (3-State)

•

10-mA Output Drive

•

Output of Several Devices Can Be Paralleled

•

Meets ANSIIEIA-232-D-1986 Specifications
(Revision of EIA Std RS-232-C)

•

Designed to Be Interchangeable With Linear
Technology LT1 030

1

VCC+
STROBE
IN4
OUT4

4

NC

NC - No internal connection
AVAILABLE OPTIONS
PACKAGE
TA

SMALL OUTLINE
(D)

O°C to 70°C

LT1030CD

description
The LT1030 is an EIA-232 line driver that
operates over a ±S-V to ±1S-V supply voltage
range on low supply current. The device can be
shut down to zero supply current. Current-limiting
fully protects the outputs from externally applied
voltages of ±30 V, Since the output swings to
within 200 mV of the positive supply and to within
1 V of the negative supply, supply voltage
requirements are minimized,

(N)

I

LT1030CN

The D package is available taped and reeled. Add
the suffix R to the device type (I.e., LT1 030CDR).

logic symbol t

ON/OFF
IN1

A major advantage of the LT1030 is the highimpedance output state when the device is off or
powered down, This feature allows several
different drivers on the same bus,
The device can be used as an EIA-232 driver,
micropower interface, or level translator, among
others,

I PLASTIC DIP

IN2

3

6
8
11

oun
OUT2
OUT3
OUT4

1rhis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.

The LT1030 is characterized for operation from
O°C to 70°C.

pin descriptions
PIN
NAME
GND

NO
7

DESCRIPTION
Ground pin.

IN1,IN2,

2,5,

Logic inputs. Operate properly on TTL or CMOS levels. Output valid from VI = VCC- + 2 V to 15 V. Connect to

IN3,IN4

9,12

5 V when not used.

ON/OFF

4

OUT1,OUT2,

3,6,

OUT3, OUT 4

8,11

Shuts down entire circuit. Cannot be left open. For "normally on" operation, connect between 5 V and 10 V. If VIL
is at or near 0.8 V, significant settling time

may be required.

Line driver outputs.
Forces all outputs low. Drive with 3 V. Strobe terminal input impedance is approximately 2 kQ to GND. Leave open

STROBE

13

VCC+
VCC-

14

Positive supply.

1

Negative supply.

when not used.

PRODUCTION DATA doc.menll conlaln inlormalion
current as of publication date. Products conform to
speclllcalions per Ihe terms 01 Te..s Instrumenll
::c='lr:r~::. ~~~::!;~nr::~~:I~:'~" nol

Copyright © 1989, Texas Instruments Incorporated

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-37

lT1030

QUAD lOW-POWER LINE DRIVER
logic diagram
4

ON/OFF
STROBE

13

>--1--,,-6_ OUT2

5

IN2

>-+--=-8_ OUT3

9

IN3

IN4

>-+--,,3_ oun

2

IN1

>-----,1,,-1_ OUT4

12

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC+ (see Note 1) .......................................... 0 V to 15 V
Supply voltage range, VCC- ................................................... 0 V to -15 V
Input voltage range, logic inputs ................................................ VCC- to 25 V
Input voltage range, ON/OFF pin ................................................. 0 V to 12 V
Output voltage range (any output) ................................. VCC+ - 30 V to VCC- + 30 V
Duration of output short-circuit at (or below) 25°C (to ±30 V, see Note 2) . . . . . . . . . . . . . . . . . .. unlimited
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. O°C to 70°C
Storage temperature range ................... : . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -65°C to 150°C
Lead temper;l.ture 1,6 mm (1/16 inch) from case for 10 seconds ............................ 260°C
NOTES: 1. All voltage values, except differential vottages, are with respect to the GND terminal.
2. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
PACKAGE

TA" 2S'C
POWER RATING

D
N

950 mW
1150 mW

DERATING FACTOR
ABOVE T A = 2S'C
7.6 mW/'C
9.2 mW/'C

TA = 70'C
POWER RATING
608 mW
736 mW

recommended operating conditions
MIN
5
-5

Suppty voltage, VCC+
Supply voltage, VCCHigh-level input voltage, VIH (see Note 3)
Low-level input voltage, VIL (see Note 3)
Operating free-air temperature, T A

TYP

MAX
15

UNIT
V

2

-15
15

V
V

0

0.8
70

V
·C

NOTE 3: These VIH and VIL specifications apply only for inputs IN1-IN4. For operating levels for ON/OFF, see Figure 2.

TEXAS ..,
2-38

INSTRUMENTS
POST OFFICE BOX·655303 • DALlAS, TEXAS 75265

LT1030
QUAD LOW-POWER LINE DRIVER

electrical characteristics over operating free-air temperature range, V cc±
otherwise noted)
PARAMETER
Maximum positive peak
VOM+

output voltage swing
Maximum negative peak

VOM-

output voltage swing

IIH

High-level input current

IlL

Low-level input current

II

ON/OFF terminal current

10

Output current

10Z

OIl-state output current

ICC

Supply current (all outputs low)

ICC(off)

OIl-state supply current

operating characteristics, VCC±

TEST CONDITIONS
10

= -2mA,

TA

= 25"C

10

= 2mA,

TA

= 25"C

VI" 2V,
VI'; O.BV,

TA

= 25"C
= 25"C

MIN

TA

MAX

UNIT
V

VCC+ - 0.1
VCC-+ 0.9
VCC_ + 1.4
2

5

VI" at2.4V,
10
ON/OFF at 0.4 V

TVPt

VCC+ - 0.3

VI

= 25"C
=0

V

20

I'A

!lA

10

20

-0.1

-10

30

65

12

I'A
mA

±2

±100

I'A

500

1000

I'A

10

ON/OFF at 0.1 V

10

150

MIN

TVpt

MAX

4

15

30

I'A

= ± 5 V to ± 15 V, TA = 25°C

PARAMETER
SR

TA

=0
VI = 5V
TA = 25"C
Vo = ±30V,

= ± 5 V to ± 15 V (unless

TEST CONDITIONS

Driver slew rate

tAli typical values are at VCC± = ±12 V, TA = 25"C.

TEXAS ."

INSIRUMENlS
POST OFFICE BOX 655303 a DALLAS, TEXAS 75265

2-39

LT1030
QUAD LOW-POWER LINE DRIVER
TYPICAL CHARACTERISTICS
ON/OFF TERMINAL VOLTAGE

MAXIMUM PEAK OUTPUT VOLTAGE SWING

vs

vs

OUTPUT CURRENT

FREE-AIR TEMPERATURE
1.8

Vcc+ I-

>

vcc+ - 0.2

i.. vcc+ I

1.6

0.4

'[

-

:; VCC- + 1.2

o

-=
~

VCC- + 1

~ VCC- + 0.8

/'"

E

~ VCC- +0.6

::;;
I

:;

---

-

OUTPUTLOW_

~VCC- +0.2
±1

±2
±3
±4
10 - Output Current - mA

I:

j

0.8

Ill:

0.6

0

0.4

\

GND

"

I
o

10

----

t--

-

r-I---

20
30
40
50
60
TA - Free·Air Temperature - °c

FIGURE 2

MAXIMUM PEAK OUTPUT VOLTAGE SWING

ON/OFF TERMINAL CURRENT

vs

vs

FREE-AIR TEMPERATURE

ON/OFF TERMINAL VOLTAGE

~ VCC+- 0.2

i~ VCC+- 0.4

10 = 1 mA

i
fJ

Vcc± = ±12V
TA = 25°C

120
10=5mA

C(

::1.100
I

/

E

:;
5-

~

c5 VCC- + 1.4

ii

10= -5mA

~ VCC- + 1.2
:>

60

{!!

40

z

20

iQl :

VCC- + 1
"-

10 = -1 mA

-

VCC± = ±12V

o

/

10

20
30
40
50
60
TA - Free·Alr Temperature - °c

0

70

-20

/

/

/'

/

/

/

0

>

Vcc- + 0.6

I:

.~

E

~VCC- +0.8

80

:>

0

':
I

, 70

140

I

V

o

2.5

7.5
10
12.5
5
On/Off Terminal Voltage - V

FIGURE 4

FIGURE 3

TEXAS ."

INSTRUMENlS
2-40

I

Ii-

MAX OFF VOLTAGE10 < 200I1A

1--:--1-

MAX OFF VOLTAGE
10 < 2OI1A

0.2

±5

.

FIGURE 1

>

.~
::;;

"'-'" '--

>

ii

VCC± = ±12V
TA = 25°C

o

1.2

0

~

VCC- +0.4

Vcc-

~

I

MINONVOLTAGE

I-- r--J

I

~ VCC- + 1.4

I

........

> 1.4

.'"

Vcc± = ±12V
RL = 3kQ

.....................

OUTPUT HIGH

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

15

lT1030

QUAD lOW-POWER LINE DRIVER
TYPICAL CHARACTERISTICS
OFF-STATE OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE

OUTPUT CURRENT LIMIT
vs
FREE-AIR TEMPERATURE
-1

30
Vcc±
27.5

r.....

c(

E

25

I

........

=

±12V

1

'---... ['--.,.

~

..............

20

o

~

I

o

c(

0.07

20
30
40
50
60
TA - Free-Air Temperature - ·c

70

~
40 ~
50
M
00
TA - Free-Air Temperalure - ·C

OFF-STATE SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE

SUPPLY CURRENT
vs
SUPPLY VOLTAGE

~

ro

5
Vcc± = ±12V
ON/OFF at 0.4 V

V

V

0.03

I

~

~

FIGURES

-aa.

0.01

/

/

~

/

FIGURES

0.05

I
!

V

9

0.1

cilCIl

/

-0.D1

10

/

/'

I

15

o

/

'[
:; -0.1

17.5 f-- SOURCING

~~

/V

o

~INKING

a.

::I.
I

/

~

:;

~
9

/

/'

I

'---...

~
a
22.5
:;

Vcc± - +12V
Vo = -25V

L

V

/

TA

4.5

L

= 25·C

4
c(

E 3.5
I

/

C

~

"

0

~

a.
a.

/

"I

3
2.5

--

-

f---_f--rALL OUTPUTS HIGH

2

U)

0

1.5

9

ALL OUTPUTS LOW

0.5

o

50
60
65
55
TA - Free-Air Temperature - ·C

70

10

12.5

15

17.5

20

22.5

25

27.5

30

iVcc+ - Vcc-I - Total Supply Voltage - V

FIGURE 7

FIGURES

TEXAS . .

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-41

LT1030
QUAD LOW-POWER LINE DRIVER
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE

SLEW RATE
vs
FREE-AIR TEMPERATURE
17

4
vcc± = ±12V
3.5

a.
Q.
::I

In

2.5

-

=

Vcc±
±12V
RL 3ka
CL 51 pF

=
=

I--

16

~
ALL OUTPUTS HIGH

In

~

::t

:>

.,I

OJ

II:

2

.,

;:
Cii

1.5

~

II:
In

9

ALL OUTPUTS LOW

0.5

o

o

-

14

20
30
40
50
60
TA - Free-Air Temperature - ·C

/

RISING

I-r-V

r--13

10

FALLING ..----

/

15

I

I

0

r--

I

70

o

10

20
30
40
50
60
TA - Free-Air Temperature - ·C

70

FIGURE 10

FIGURE 9

TYPICAL APPLICATION DATA

forward biasing the substrate
As with other bipolar integrated circuits, forward biasing the substrate diode can cause problems. The LT1 030
will draw high current from VCC+ to ground if the VCC- terminal is open-circuited or pulled above ground.
If this is possible, connecting a diode from VCC- to ground will prevent the high-current state. Any low-cost
diode can be used (see Figure 11).
LT1030
14

lN4001

7

8

FIGURE 11. CONNECTING A DIODE
FROM VCC- TO GROUND

TEXAS •

2-42

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MAX232
DUAL EIA-232 DRIVER/RECEIVER
03120. FEBRUARY 19B9-REVISED JUNE 1989

•

Operates with Single S-V Power Supply

•

LinBiCMOS'" Process Technology

•

Two Drivers and Two Receivers

o OR N PACKAGE
(TOP VIEW)

•

± 30-V

•

Low Supply Current ... 8 mA Typ

•

Meets ANSIIEIA-232-D-1986 Specifications
(Revision of EIA Standard RS-232-C)

•

Designed to be Interchangeable with Maxim
MAX232

•

Applications
EIA-232 Interface
Battery-Powered Systems
Terminals
Modems
Computers

C1+
VS+
C1 C2+
C2VST20UT
R2)N ......_ _..J--'

Input Levels

VCC
GND
T10UT
R11N
R10UT
T1IN
T21N
R20UT

logic symbol t
vec

C1 +

Vs+

ClC2+

Vs_

C2-

description
The MAX232 is a dual driver/receiver that
includes a capacitive voltage generator to supply
EIA-232 voltage levels from a single 5-V supply.
Each receiver converts EIA-232 inputs to 5-V
TTUCMOS levels. These receivers have a typical
threshold of 1.3 V and a typical hysteresis
of 0.5 V, and can accept ± 30-V inputs. Each
driver converts TTL/CMOS input levels into
EIA-232 levels. The driver, receiver, and voltagegenerator functions are available as cells in the
Texas Instruments LinASIC'" library.

T1IN

T10UT

T21N

T20UT

Rl0UT

RllN

R20UT

R21N

GND
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.

absolute maximum ratings over operating free-air temperature range (unless otherwise notedl
Input supply voltage, VCC (see Note 1) ..... . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.3 V to 6 V
Positive output supply voltage, Vs + ............................... VCC - 0.3 V to 15 V
Negative output supply voltage, Vs - .................................. 0.3 V to - 15 V
Input voltage range: Driver.................................... -0.3 V to VCC + 0.3 V
Receiver ............................................... ± 30 V
Output voltage range: T10UT, T20UT ..................... Vs _ - 0.3 V to Vs + + 0.3 V
R10UT, R20UT ......................... "
-0.3 V to VCC + 0.3 V
Short-circuit duration: VS+ ........... '.' ...................................... 30 s
Vs - ........................... '. . . . . . . . . . . . . . . . . . . . . . .. 30 s
T10UT, T20UT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. unlimited
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 0 DC to 70 DC
Storage temperature range .......................................... - 65 DC to 1 50 DC
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . .. 260 DC
NOTE 1: All voltage values are with respect to network ground terminal.

LinASIC and LinBiCMOS are. trademarks of Texas Instruments Incorporated.

PRuuuenUN DATA .....m.nll_.in information
..mol al 01 publlcltio. dill. 'roduOll .onform to
.pacificatians p. th' tar. of Taxa. Instruments

=~~i~ai:I~'l~ =~~i:;

:.r::::::.::s

not

Copyright © 1989, Texas Instruments Incorporated

TEXAS •

INSTRUMENTS
POST OFFiCe BOX 655303 • DALLAS, TEXAS 75265 '

2-43

MAX232
DUAL EIA·232 DRIVER/RECEIVER
recommended operating conditions
Supply voltage, Vee
High-level input voltage, VIH (nIN, T2IN)

MIN

NOM

MAX

4.5

5

5.5

V

0.8

V

2

V

Low-level input voltage, VIL (T1IN, T2IN)
Receiver input voltage, R1IN, R21N

±30

Operating free-air temperature, T A

UNIT

70

0

V
°e

electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
range (unless otherwise noted)
MIN

Typt

T1OUT, T20UT

RL - 3 kll to GND

5

7

R10UT,R20UT
T10UT, T20UT

IOH=-lmA
RL = 3 kll to GND

3.5

R10UT,R20UT

IOL = 3.2 mA

R1IN, R21N

Vee = 5 V, TA = 25°e

R1IN, R21N

PARAMATER
VOH
VOL

High-level output voltage
Low-level output voltage ~
Receiver positive-going input

VT+

threshold voltage
Receiver negative-going input

TEST CONDITIONS

-7

MAX

V
-5
0.4

1.7

2.4

Vee = 5 V, TA = 25°e

0.8

1.2

Vhvs

Input hysteresis

R1IN, R21N

Vee = 5 V

0.2

0.5

1

r;

Receiver input resistance

R1IN, R21N

Vee - 5V,TA = 25°e

3

5

7

ro
IOS§

Output resistance

T10UT, T20UT

Short-circuit output current

T1OUT,T20UT

VS+ = VS- = 0, Vo = ±2V
Vee = 5.5 V, Vo = 0

liS

Short-circuit input current

T1IN, T21N

VI = 0

VT-

lee

threshold voltage

Supply current

8

V
V

200
10

mA

±10

TA = 25°C

V

kll
kll
Il
mA
pA

300

Vee = 5.5 V, All outputs open,

UNIT

t All typical values are at Vee = 5 V, TA = 25°e.
+The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for logic
voltage levels only.
§Not more than one output sbould be shorted at a time.

switching characteristics. Vee

=

5 V. TA - 25°e

PARAMETER
tpLH(R)
tpHL(R)
SR
SR(tr)

Receiver propagation delay time.

low-to-high-Ievel output

Receiver propagation delay time,
high-to· low-level output
Driver slew rate

Driver transition region

slew rate

TEST CONDITIONS

TYP

MAX

UNIT

See Figure 2

500

ns

See Figure· 2

500

ns

RL = 3 kll to 7 kll, See Figure 3
See Figure 4

. TEXAS.
2-44

MIN

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

30
3

Vips
VIpS

MAX232
DUAL EIA-232 DRIVER/RECEIVER
TYPICAL APPLICATION DATA

1

+5 V

(16)
~F

VCC

(1)

~

*
FROM
CMOS 0 R
TTL

Cl+

(3)

(2)
(6)

(4!~ C2+

(11)

r--r---

[>

(10)

(9)

+t

-2VCC +1.5 V

C2-

I>

1

~F

-8.5 V

(14)
EIA-2320 UTPUT
(7)

EIA-2320 UTPUT
(13)

(12) . /
TO CM OS
OR TT L

+8.5 V

2VCC-l.5V

Cl-

(5)

[1;1

.IT

EIA-232IN PUT
(8)

L

.IT

OV

EIA·232 IN PUT

f(15)
GND

FIGURE 1. TYPICAL OPERATING CIRCUIT

PARAMETER MEASUREMENT INFORMATION
VCC

RL - 1.3 kll
(SEE NOTE C)

PULSE
GENERATOR
(SEE NOTE A)

J

CL-50pF
(SEE NOTE 8)

TEST CIRCUIT

I+-

" 1 0 ns ---+I

--.j 1+-" 10

I I

INPUT

¥S
1

10%

ns

I I

90%

I 50%

1
~
1 10%

90%
50%

:-I------- 3 V

0 V

14--500 ns--.!

tPHL~

~tPLH

1
OUTPUT

1.5X

I

VOH

1.5Vk'_ _ _ _ _ VOL

WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: Zout

=

50 Il, Duty Cycle" 50%.

B. CL includes probe and jig capacitance.

C. All diodes are 1 N3064 or equivalent.

FIGURE 2. RECEIVER TEST CIRCUIT AND WAVEFORMS FOR tpHL AND tPLH MEASUREMENT

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-45

MAX232
DUAL EIA·232 DRIVER/RECEIVER
PARAMETER MEASUREMENT INFORMATION

PULSE
GENERATOR
(SEE NOTE A) ,

EIA-232
OUTPUT

r

CL - 10 pF
(SEE NOTE B)

TEST CIRCUIT
,;10 ns~

I 1

i ;/90%

INPUT

I+- ,;10 ns

-.j

j4-

1 I

90%'\...1- -

-

--

3V

50%~,...:.;10:.:%:::....._ _ _ _ 0 V

10%71 50 %

1'f--5"s~

tpHL ~

I+-+t- tPLH

I
-----.i1\90%
OUTPUT
I 10%
I

1

tTHL~

SR

= O.B

1

,JGI""9""0""%.,---10
~

14-

VOH

I

1----

I

VOL

I4-tTLH

(VOH - VOL) or 0.8 IVOL - VOH)
tTHL

tTLH
WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: Zout
B. CL includes probe and jig capacitance.

=

500, Duty Cycle ,;50%.

FIGURE 3. DRIVER TEST CIRCUIT AND WAVEFORMS FOR tPHL AND tPLH MEASUREMENT (5-l's INPUT)
PULSE
GENERATOR
(SEE NOTE A)

X}-_...__...___ EIA-232
OUTPUT

'J

CL - 2.5 nF

TEST CIRCUIT

,; 10 ns --+I
INPUT

'+--

-+I 14-,; 10 ns

!}90%
10%lr 1 . 5 V

90%l!
1.5 Vli.""1:.,:0""%'--_ __

j4---20"s~

tTHL -+I
OUTPUT

14-

~

14- tTLH

-_3_V"'Jt~ ~

3_:\k1"1_ _ _

VOH
__

6V
SR----tTHL or tTLH
WAVEFORMS
NOTE A: The pulse generator has the following characteristics: ZOUT = 50 0, Duty Cycle ,; 50%

FIGURE 4. TEST CIRCUIT AND WAVEFORMS FOR tTHL AND tTLH MEASUREMENT (20-l's INPUT)

2-46

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MC3450, MC3452
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
03006, FEBRUARY 1986-REVISEO OCTOBER 1986

•

Four Independent Receivers with Common
Enable Input

D, J, OR N PACKAGE
(TOP VIEW)

•

High Input Sensitivity, , , 25 mV Max

•

High Input Impedance

1B
1A
1Y

•

MC3450 has Three-State Outputs

EN

•

MC3452 has Open-Collector Outputs

•

Glitch-Free Power-Up/Power-Down
Operation

2Y
2A
2B

VCC+
4B
4A
4Y
VCC3Y
3A
3B

GND

description

FUNCTION TABLE

The MC3450 and MC3452 are quadruple
differential line receivers designed for use in
balanced and unbalanced digital data
transmission. The MC3450 and MC3452 are the
same except that the MC3450 has three-state
ouputs whereas the MC3452 has open-collector
outputs, which permit the wire-AND function
with similar output devices. Three-state and
open-collector outputs permit connection
directly to a bus-organized system.

DIFFERENTIAL INPUTS

ENABLE

OUTPUT

A-B

EN

VID '" 25 mV
- 25 mV < VID < 25 mV

L

Y
H
?

L

VID '" 25 mV

L

L

X

H

Z

H = high level, L = low level. ?
Z ~ impedance (off)

=

indeterminate,

The MC3450 and MC3452 are designed for
optimum performance when used with either the
MC3453 quadruple differential line driver or
SN75109A, SN75110A, and SN75112 dual
differential drivers.
The MC3450 and MC3452 are characterized for
operation from OOC to 70°C.
logic symbols t

MC3450

MC3452

EN
1A

(3)

18
2A

(5)

28
3A
38

(11 )

4A

(13)

48

1Y

2Y
3Y
4Y

1A

(3)

18
2A

(5)

28
3A
38

(11)

4A

(13)

4B

1Y
2Y
3Y
4Y

tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

PRODUCTION DATA documents contain information
currant as of publication date. Products conform to
specifications per the terms of Texas Instruments

:~~=~~i;8{::1~1i ~=:~i:; :.~o::~:::~:;.s

not

Copyright © 1986, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS, TEXAS 75265

2-47

MC3450, MC3452
QUADRUPLE DIFFERENTIAL LINE RECEIVERS

logic diagram (positive logic)
EN'

1A
1B

2A
2B

3A

(2)
(1)

(6)
(7)

(10)
(9)

3B

4A
4B

(14)
(13)

(15) ,

4Y

schematics of inputs and outputs
EQUIVALENT OF
A OR B INPUT
VCC+----4~-

EQUIVALENT OF
ENABLE INPUT

TYPICAL OF MC3450
OUTPUT

VCC+-----.-----

- - - - -... VCC

3 kG
NOM

1 kG
NOM

140 !l
NOM

INPUT

INPUT

200 G
NOM

TYPICAL OF MC3452
OUTPUT '

OUTPUT

VCC--t------4I-..........-

' - -.....-GND
VCC--.........-

GND _ . . - - - - - - - -

TEXAS . .
INSTRUMENTS
2-48

POST OFFICE BOX 855303 • DALLAS, TEXAS 75265

MC3450, MC3452
QUADRUPLE DIFFERENTIAL LINE RECEIVERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC + (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Supply voltage, VCC _ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 7 V
Differential input voltage (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 6 V
Common-mode input voltage (see Note 3) ........ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 5 V
Enable input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total dissipation at (or below) 25 °c free-air temperature (see Note 4):
D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 950 mW
J package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1025 mW
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1150 mW
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 0 °c to 70 °c
Storage temperature range .......................................... - 65 °c to 150 °C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package ........ , 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package . . . . . . . . . . . .. 300 °C
NOTES:

1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.
3. Common~mode input voltage is the average of the voltages at the A and B inputs.
4. For operation above 25 ac free-air temperature, derate the 0 package to 608 mW at 70 ac at the rate of 7.6 mWI QC, the
J package to 656 mWat 70°C althe rate of 8.2 mW/oC, and the N package to 736 mW at 70°C at the rate of 9.2 mW/oC.
In the J package, MC3450 and MC3452 chips are glass mounted.

recommended operating conditions
MIN

NOM

MAX

UNIT

Supply voltage, V CC +

4.75

5

5.25

V

Supply voltage, VCC-

4.75

-5

5.25

V

0.8

V
V

16

mA

2

High·level enable input voltage, VIH
Low-level enable input voltage, VIL
Low-level output current, IOL

Differential input voltage, VID Isee Note 5)

-5

5

V

Common-mode input voltage, Vlk Isee Note 5)

-3 T
-5 t

3

V

0

70

Input voltage range, any differential input to ground
Operating free-air temperature, T A

3

V
°c

t The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for commonmode input voltage.
NOTE 5: The recommended combinations of input voltages fall within the shaded area of Figure 1.

RECOMMENDED COMBINATIONS OF INPUT VOLTAGES

Input B to Ground Voltage-V

FIGURE 1

TEXAS •
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TEXAS 15265

2-49

MC3450. MC3452
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
electrical characteristics over recommended operating free-air temperature range. Vee ± ... ± 5.25 V
(unless otherwise noted)
PARAMETER

TEST CONDITIONS

input current

Low-level
IlL

input current

EN

lOS

30

ICCH-

75
40
1

1
-10

-10

-10

-10

-1.6

-1.6

UNIT
~A
~A

mA
~

mA
V

0.5

250

~A

0.5

V

VIC = -3Vto3V

High-impedance-state

Vo = 2.4 V

40

output current

Vo - 0.4 V

-40

Short-circuit
output current+

VID - 25 mY,
EN at 0.8 V

Vo - 0,

-18

~A

-70

Supply current from
ICCH+

75

2.4

VCC± '= ±4.75 V, VIO = -25 mY,
EN at 2 V,
IOL = 16 mA,

Low-level output
voltage

10Z

30

75

VCC± = ±4.75 V, VOH = 5.25 V

current

VOL

75
40

VCC± - ±4.75 V, VIO - 2.5 mY,
EN at 0.8 V,
IOH = -400~,
VIC = -3Vto3V

High-level output

10H

MC3452
TYpt
MAX

30

A inputs VIO = 2 V
B inputs VIO - 2 V
EN
VIL = 0.4 V

voltage

MIN

30

VIH - 2.4 V
VIH - 5_25 V

High-level output

VOH

MC3450
TYpt
MAX

A inputs VIO = -2 V
B inputs VIO - -2 V

High-level
IIH

MIN

VCC +, outputs high
Supply current from
V CC _, outputs high

mA

60

60

mA

-30

-30

mf-

tAli typical values are atVcc+ = 5V,VCC_ = -5V,TA = 25°C.

:t: Not more one output should be shorted at a time.

switching characteristics. Vee± = ±5 V. TA - 25°e
PARAMETER

FROM
(INPUT)

TO
(OUTPUTI

tpLH

A and B

Y

tpHL

A and B

Y

tpZH

EN

tpZL

EN

tpHZ

EN

Y
Y
Y
Y
Y
Y

tpLZ

EN

tpLH

EN

tpHL

EN

t All typical values are at VCC +

=

TEST CONDITIONS

MIN

MC3450
Typt
MAX

17

CL = 50 pF, See Figure 2

17

25°C.

.Jf

POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

UNIT
ns
ns
ns
ns

29

INSTRUMENTS
2-50

25

18

CL - 1 5 pF. See Figure 4
CL = 1 5 pF. See Figure 4

TEXAS

19
27

CL = 15 pF, See Figure 3

=

25

21

CL = 50 pF, See Figure 2

-5V.TA

19
25

CL - 15 pF, See Figure 2

5 V. VCC-

MC3452
Typt
MAX

25

CL - 15 pF, See Figure 2
CL = 50 pF, See Figure 2

MIN

25

ns

25

ns

MC3450, MC3452
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
OUTPUT

5V

390 Il
GENERATOR
(SEE NOTE AI

50 Il
r---~. 100 mV

5V

~

FOR
MC3452

FOR
MC3450
(SEE NOTE CI
TEST CIRCUIT
_ _ _ _ _ _ 200mv

INPUT

~
100 mV

100 mV

I
I

I
I

I

I

tPLH~

I

tpHL~

I

-I----VOH

~
I

OUTPUT

OV

I

1.5 V

1.5 V

VOL
NOTES:

A. The input pulse is supplied by a generator having the following characteristics: PRR :s; 1 MHz, duty cycle = 50%. tr :s 6 ns,
tf :s 6 ns.
B. CL includes probe and jig capacitance.
C. All diodes are 1N916 or equivalent.
VOLTAGE WAVEFORMS

FIGURE 2. PROPAGATION DELAY TIMES

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TeXAS 75265

2-51

MC3450, MC3452
QUADRUPLE DIFFERENTIAL LINE RECEIVERS

tpZH
tpZL
tpHZ
tpLZ

A
B
100 mV
GND
GND
100 mV
m
GND
100mV

51

52

Open
Closed
losed
Closed

Closed
Open
losed
Closed

0--5 V

(SEE NOTE CI

1 kO
GENERATOR
(SEE NOTE AI

51

3900

500

TEST CIRCUIT

~~:----::

ENABLE

ENABLE

I

I

tpZH

I

ENABLE_ _ _

-J.f~~

Jt~~

tPHZ-.j

14-

__

'\:.~--- "

VOH

0""'"
0 V

\ , . . - - - - VOL

____ "
3V

OUTPU~~O~ ~o~~
I

OV

tPZL~

--If--+!

OUTPUT_ _ _ _

\ 1 : : - - - - 3V

,~
.,;--3V
ENAB~ _ _ _ _ _ _ _ ov
I

,~

VOH

~=1.5V

tPLZ~

~=1.5V

OUTPU~~~~ :~_

VOL

VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
tf S 6 ns.
B. CL includes probe and jig capacitance.
C. All diodes are 1N916 or equivalent.

s

1 MHz, duty cycle

FIGURE 3. MC3450 ENABLE AND DISABLE TIMES

TEXAS . "
INSTRUMENTS
2-52

POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

=

50%, tr S 6 ns,

MC3450. MC3452
QUADRUPLE DIFFERENTIAL LINE RECEIVERS

5V

390 !l

>-....- ....-- OUTPUT
CL
GENERATOR
(SEE NOTE AI

""""'' 1

50 !l

TEST CIRCUIT

ENABLE~'5V
-~~V-----3V
I
I

I

I

I

tPLH -1+--+1

I

0V

I

tpHL ~

I

I

:-I~--- VOH

I

I

OUTPUT

VOLTAGE WAVEFORMS
NOTES:

A. The input pulse is supplied by a generator having the following characteristics: PRR s; 1 MHz. duty cycle -= 50%, tr :5 6 n5,
tf :$ 6 ns.
B. CL includes probe and jig capacitance.

FIGURE 4. MC3452 PROPAGATION DELAY TIMES FROM ENABLE

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-53

2·54

MC3453
QUADRUPLE LINE DRIVER WITH COMMON ENABLE
D3000, FEBRUARY 1986-REVISED JULY 1990

•

Similar to a Dual Version of SN75110A Line
Driver

•

Improved Stability Over Supply Voltage and
Temperature Ranges

•

Constant-Current Outputs

•

High Output Impedance

D, J, OR N
DUAL·IN·LlNE PACKAGE
{TOP VIEWI
lA

VCC+

lY

4A

lZ

4Y

2Z

4Z

2Y

3Z

ENABLE

3Y

•

High Common-Mode Output Voltage Range
(-3 V to 10 V)

•

Glitch-Free Power-Up/Power-Down
Operation

•

TTL Input Compatibility

•

Common Enable Circuit

LOGIC

ENABLE

•

Designed to be Interchangeable with
Motorola MC3453

INPUT

INPUT

Z

Y

H

H

ON

OFF

3A

2A

VCC-

GND
FUNCTION TABLE

description
The MC3453 features four line drivers with a
common enable input. When the enable input is
high, a constant output current is switched
between each pair of output terminals in
response to the logic level at that channel's
input. When the enable is low, all channel
outputs are nonconductive (transistors biased to
cutoff), This minimizes loading in party-line
systems where a large number of drivers share
the same line.

L

H

OFF

ON

H

L

OFF

OFF

L

L

OFF

OFF

L == low logic level
H

~

high logic level

logic symbol t

1Y
1Z

The driver outputs have a common-mode voltage
range of - 3 volts to 10 volts, allowing commonmode voltages on the line without affecting
driver performance,
All outputs should be maintained within the
recommended common-mode output voltage
range to ensure that the channels do not interact
with each other, To minimize power dissipation,
all unused outputs should be grounded,

OUTPUT
CURRENT

2Y
2Z
3Y
3Z
4Y
4Z
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEG Publication 617-12.

All inputs are diode clamped and are designed
to satisfy TTL-system requirements. The inputs
are tested at 2 volts for high-logic-level input
conditions and 0.8 volt for low-logic-level input
conditions, These tests guarantee 400 millivolts
of noise margin when interfaced with Series
54174 TTL.
The MC3453 is characterized for operation from
OOC to 70°C.

PRODUCTION DATA doc.mants contain information
current as of publication datB. Products conform to
specifications per the tarms of Texas Instruments

=~~;ai~r;,~1i =~:~ti:; :.~O::;::::~:~~S not

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75285

Copyright © 1990, Texas Instruments Incorporated

2-55

MC3453
QUADRUPLE LINE DRIVER WITH COMMON ENABLE
logic diagram (positive logic)
ENABLE

1Y

1A-----I-I

1Z
2Y
2Z

3Y
3Z

4Y

4A------f

4Z

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS
. - - - - - OUTPUT

Vcc+ - - - -....._ - -

INPUT

--41--.--1

' - - - - - OUTPUT

Vcc--4----4~---

......~.------ VCC-

GND--4I~--

TEXAS . "

INSTRUMENTS
2-56

POST OFFICE BOX 655303 • DALlAS. TeXAS 75285

MC3453
QUADRUPLE LINE DRIVER WITH COMMON ENABLE
absolute maximum ratings over operating free-air temperature range. (unless otherwise noted)
Supply voltage, Vcc + (see Note 1) ............................................. 7 V
Supply voltage, VCC _ ..................................................... - 7 V
Input voltage (any input) .................................................... 5.5 V
Output voltage range (any output) ...................................... , - 5 V to 12 V
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 2):
D package ......................................................... 950 mW
J package ......................................................... 1025 mW
N package ........................................................ 1150 mW
Operating free-air temperature range .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N package .......... 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package. . . . . . . . . . . .. 300°C
NOTES:

1. All voltage values are with respect to network ground terminal.
2. For operation above 25 DC free-air temperature, derate the 0 package to 608 mW at 70 DC at the rate of 7.6 mW/ DC, derate
the J package to 656 mW at 70 De at the rate of 8.2 mW/De, and the N package to 736 mW at 70°C at the rate of 9.2
mW/De. In the J package the Me3453 is glass mounted.

recommended operating conditions
MIN

NOM

MAX

UNIT

Supply voltage, Vee +

4.75

5

5.25

V

Supply voltage, Vee-

-4.75

-5 -5.25

V

High-level input voltage, VIH

2

5.5

V

Low-level input voltage, VIL

0

0.8

v

0

10

V

0

-3

v

0

70

°C

Common-mode output voltage range

I VOCR+
I VOCR-

Operating free-air temperature, T A

electrical characteristics over recommended operating free-air temperature range. VCC+
VCC - = - 5.25 V (unless otherwise noted)
PARAMETER

TEST CONDITIONS

VIK

Input clamp voltage

11= -12 mA

10(on)

On-state output current

VCC+ - 5.25 V,
VCC+ = 4.75 V,

10(off)

Off-state output current

VCC+ = 4.75 V,

IIH

High-level input current

IlL

Low-level input current

ICC+
ICC-

Supply current from Vce +
Supply current from Vce-

VCC- -

MIN

-5.25 V

VCC- = - 4.75 V
VCC- = -4.75 V,

6.5

TYpt

MAX

-0.9

-1.5

11

15

11
100

Va = 10 V

VI = 2.4 V
VI = 5.25 V
VI = 0.4 V
A inputs at 0.4 V
A inputs at 0.4 V

tAli typical values are at VCC+ = 5 V, Vee-

Enable at 2 V
Enable at 0.4 V

5.25 V,

33

UNIT
V
mA
I'A

40

I'A

1

mA

-1.6

mA

50

33

50

Enable at 2 V

-68

-90

Enable at 0.4 V

-31

-40

mA
mA

-5 V, and TA = 25 D C.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-57

MC3453
QUADRUPLE LINE DRIVER WITH COMMON ENABLE

switching characteristics. VCC+

=

5 V. VCC- -

PARAMETER

-5 V. RL - 50!l. CL '" 40 pF. TA .. 25°C

FROM

TO

TEST

(INPUT)

(OUTPUT)

CONDITIONS

tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output

A

V or Z

A

Vor Z

tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output

Enable

V or Z

Enable

V or Z

MIN

TVP

MAX

9
7

15

ns

15

ns

14

25

ns

15

25

ns

See Figure 1

UNIT

PARAMETER MEASUREMENT INFORMATION
AINPUT--------------~

ENABLE

r----------":'(1:..:3::..) 4Z

PRODUCTION DATA documonts contai. information
currant as of publication date. Products conform to

specifications per the terms of Texas Instruments

:~~'::!:~~i~8i~:1~1e ~=:~ti:r :'IO::~::::':~~S not

Copyright © 1986, Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-65

MC3487
QUADRUPLE DIFFERENTIAL LINE DRIVER
WITH 3-STATE OUTPUTS
FUNCTION TABLE (EACH DRIVERI
OUTPUT
ENABLE

INPUT

~ Hi9h-l~edance I

H

L
X
H

OUTPUTS

t-----::y:---'--'-...:....:....-Z=----l

= TTL

high level

High-Im:edance

X = irrelevant

L = TTL low level

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS

- - - - 1......- -.....- - vee

vee--~~----

INPUT

9nNOM

tI---+--....-

OUTPUT

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table,
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. OoC to 70°C
Storage temperature range ..•...................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package. . . . . . . . . . . .. 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D and N packages ....... 260°C
NOTE 1: All voltage values, except differential output voltage, VOD, are with respect to the network ground terminal.
DISSIPATION RATING TABLE
PACKAGE

TA'" 25°C
POWER RATING

DERATING FACTOR
ABOVE TA - 25°C
7.6 mw/oe

TA - 70°C
POWER RATING

D

950 mW

J

1025 mW

8.2 mw/oe

608 mW
656 mW

N

1150 mW

9.2 mw/oe

736 mW

recommended operating conditions
Supply voltage, Vec
High-level input voltage, VIH

NOM
5

MAX
5,25

2

Low-level input voltage, VIL
Operating free-air temperature, TA

0

'TEXAS . "
INSTRUMENTS
2-66

MIN
4.75

POST OFFICE BOX 665303. DALLAS, TEXAS 75265

UNIT
V
V

0,8

V

70

°e

MC3487
QUDRUPLE DIFFERENTIAL LINE DRIVER
WITH 3-STATE OUTPUTS
electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted)
PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

-1.5

V

VIK

Input clamp voltage

11=-18mA

VOH

High-level output voltage

VIL = 0.8 V,

VIH = 2 V,

VOL

Low-level output voltage

IVODI

Differential output voltage

VIL = 0.8 V,
RL = 1000,

VIH = 2 V,
See Figure 1

RL = 1000,

See Figure 1

±0.4

V

RL = 1000,

See Figure 1

3

V

RL = 1000,

See Figure 1

±0.4

V

VCC = 0

Vo = 6 V
Vo = -0.25 V

100
-100

~A

High-impedance-state

Output enables

Vo = 2.7 V

100

output current

at 0.8 V

Vo = 0.5 V

-100

Change in magnitude of

"IVool differential output voltage t
VOC

Common-mode output voltage.t:
Change in magnitude of

"IVocl common-mode output voltage t
10

IOZ
II

Output current with power off

Input current at maximum
input voltage

IOH = -20 mA
IOL = 48 mA

2.5

V
0.5

V

2

VI = 5.5 V

V

100

~A
~A

IIH

High-level input current

VI = 2.7 V

50

III

Low-level input current

VI = 0.5 V

-400

~A

lOS

Short-circuit output current ~

-140

mA

ICC

Supply current (all drivers)

VI = 2 V
Outputs disabled
Outputs enabled,

-40

105
No load

85

mA

t"IVooland "IVocl are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high
level to a low level.

tin EIA Standard RS-422-A, VOC, which is the average of the two output voltages with respect to ground, is called output offset voltage, Vas.
§Only one output at a time should be shorted and duration of the short-circuit should not exceed one second.

switching characteristics over recommended range of operating free-air temperature.
PARAMETER

TEST CONDITION

tplH

Propagation delay time, low-to-high-Ievel output

tpHL

Propagation delay time, high-to-Iow-Ievel output

CL = 15 pF,

MIN

See Figure 2

Skew
tTD

Differential-output transition time

tpZH

Output enable time to high level

tpZl

Output enable time to low level

tpHZ

Output disable time from high level

tpLZ

Output disable time from low level

CL=15pF,

See Figure 3

CL = 50 pF,

See Figure 4

Vee =
MAX

5 V

UNIT

20

ns

20

ns

6
20
30
30
25
30

ns
ns
ns
ns
ns
ns

PARAMETER MEASUREMENT INFORMATION

FIGURE 1. DIFFERENTIAL AND COMMON-MODE OUTPUT VOLTAGES

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-67

MC3487
QUADRUPLE DIFFERENTIAL LINE DRIVER
WITH 3·STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION

INPUT~I.5V
YOUTPUT

I
I

GENERATOR
(Soo Noto AI

:(Soo Noto BI
I

~--+-""':t-

I

- - -

VOH

I Skow-i-1

I 1.5V
I
I '-----'- VOL
I Skew-j-1

j . - tPHL- - ;

t-tPLH--!

I

--I--JI

ICL =15pF
3V LI _ _ _ _ _ _ ..JI

\.=---.L- tpHL

L.....J
I tPLH,

5V

200n

1---+-_0. SW1

t.\..-_-_-_-_-_-_-::

1.5V

I

,VT

(See Noto CI ....

VOH

Z OUTPUT

\1.5 V

1. 5V

'-----~

-

-

-VOL

VOLTAGE WAVEFORM

TEST CI RCUIT

FIGURE 2. PROPAGATION DELAY TIMES

1\---3V

INPUT

L-ov

J
GENERATOR
(Soo Note AI

OUTPUT

50n

~~~-~--~

3V-+-C~

tTO--: :-- - - : : - - tTO
OUTPUT

J:\L90%
I
I

I

IL.. _ _ _ _ _ .J

•

10%
VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 3. DIFFERENTIAL· OUTPUT TRANSITION TIMES

r-----'I

5V

I

I

I

....... ".I_~

Oor3V

_-'d"

The MC3550 and MC3552 are quadruple
differential line receivers designed for use in
balanced and unbalanced digital data
transmission, The two devices are the same
except that the MC3550 has three-state outputs
whereas the MC3552 has open-collector
outputs, which permit the wire-AND function
with similar output devices. Three-state and
open-collector outputs permit direct connection
to a bus-organized system.
The MC3550 and MC3552 are designed for
optimum performance when used with either the
MC3553 quadruple differential line driver or
SN55109A, SN55110A, and SN55112 dual
differential drivers.
The MC3550 and MC3552 are characterized for
operation over the full military temperature range
of -55°C to 125°C.

3

2

1 20 19

18
17
16
15
14

9 10 11 12 13

NC-No internal connection

FUNCTION TABLE
DIFFERENTIAL INPUTS

ENABLE

OUTPUT

A-B

EN

y

VIO ,. 25 mV

L

H

<

<

L

7

VIO s 25 mV

L

L

X

H

Z

-25 mV

VID

25 mV

H = high level, L = low level, ? = indeterminate.

Z = impedance (off)

PRooucnON DATA d••ollonts .oot.in information
comot .. af poblicatio. data. P,.ducts ...form to
spacifications par th. torms Taxa. Inatrum.nts

=riI~·{n':.':!1.;

0'

=::r r.iO:::=~

not

Copyright © 1989, Texas Instruments Incorporated

TEXAS ...,
INSTRUMENTS
POST OFFICE BOX 655303 • DAUAS, TEXAS 75265

2-69

MC3550, MC3552
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
logic symbols t
MC3550

MC3552

EN

EN

1A

(3)

2A

15)

28
3A

(11)

2A

(5)

3A

(11)

38
(13)

4A

4V

48

48

tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and lEG Publication 617-12.

logic diagram (positive logic)
EN

1A
18

2A
28

3A
38

4A
48

(21
13)

11)

1V

(S)

(5) 2V

(7)

(10)
(11)

(9)

3V

(14)
(13)

(15)

TEXAS . . ,
INSTRUMENTS
2-70

1V

2V

28

3V

(13)

(3)

18

2V

38
4A

1A

1V

18

POST OFFICE BOX 655303

~

DALLAS. TEXAS 76265

4V

3V
4V

MC3550, MC3552
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
schematics of inputs and outputs
EQUIVALENT OF
A OR B INPUT

VCC+--....- -

TYPICAL OF MC3550
OUTPUT

EQUIVALENT OF
ENABLE INPUT
VCC+-----~-------

, kll
NOM

TYPICAL OF MC3552
OUTPUT

---------e-VCC

3 kll
NOM

140 Il
NOM

INPUT

INPUT

OUTPUT

OUTPUT

VCC--+--~-e~~-VCC----4H~

GND -

.....- - - - - -

__~-~-~~GND

L - -.....-GND

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC + (see Note 1) ............................................. 7 V
Supply voltage, VCC _ ..................................................... - 7 V
Differential input voltage (see Note 2) .......................................... ± 6 V
Common-mode input voltage (see Note 3) ....................................... ± 5 V
Enable input voltage ...................................................... " 5.5 V
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 4) . . . . . .. 1375 mW
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
Storage temperature range ......................................... - 65°C to 150°C
Case temperature for 60 seconds: FK package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............ , 300°C
NOTES:

1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.

3. Common-mode input voltage is the average of the voltages at the A and B inputs.
4. For operation above 25·C free-air temperature, derate to 275 mW at 125·C at the rate of 11.0 mW/·C.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-71

MC3550, MC3552
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
recommended operating conditions
Supply voltage. Vcc +

TA '" 25 D C
TA < 25°C

Supply voltage. VCC-

TA'" 25 C
TA < 25°C
D

MIN

NOM

4.5
4.75
-4.5

5

MAX
5.5

5
-5

5.5
-5.5

-4.75

-5

-5.5

High-level enable input voltage, VIH
Low-level enable Input voltage, VIL
Low·level output current, IOL

2

UNIT
V
V

0.8

V
V

-16

rnA

Differential input voltage, VID (see Note 5)

-5 t

5

V

Common-mode input voltage. VIC (see Note 5)

-3 t

3

V

Input voltage range. any differential input to ground

-5 t

3

V

Operating free-air temperature. TA

-55

125

°C

t The algebraic convention,

in which the less positive (more negative I limit is designated minimum, is used in this data sheet for commonmode input voltage.
NOTE 5: The recommended combinations of input voltages fall within the shaded area of Figure 1.

RECOMMENDED COMBINATIONS OF INPUT VOLTAGES
3

>

2

.
I

'"
..,>c
~
0

12"

0
-1

Cl

2 -2

<

5Q. -3

.5

-4

o

2

Input B to Ground Voltage-V

FIGURE 1

TEXAS "
INSTRUMENTS
2-72

POST OFFICE BOX 666303 • DALLAS, TEXAS 75266

3

MC3550, MC3552
QUADRUPLE DIFFERENTIAL LINE RECEIVERS

electrical characteristics over recommended operating free-air temperature range,
(unless otherwise noted)
MC3550

TEST CONDITIONS t

PARAMETER

High-level
input current

input current

MAX

30

75

30

75

30

75

30

~

-2 V

VIH

~

2.4 V

VIH ~ VCC+MAX

B inputs VID

~

2 V

EN

~

0.4 V

VIL

VCC± ~ MIN,
EN at 0.8 V,

High-level output
VOH

voltage

VIC

~

High-level output
10H

VCC±

current

voltage

10Z
lOS

VID - 25 mV,
10H ~ - 400 p.A,

VIC

~

MIN,

~

Vo - 2.4 V

output current

Vo

Short-circuit

VID

output current§

EN at 0.8 V

~

75

40

40

1

1

-10

-10

-10

-10

-1.6

-1.6

2.4

VOH ~ VCC+MAX
VID -

0.5

ICCH-

I'A
mA

250

I'A

0.5

V

40

I'A

-40

0.4 V
Vo

25 mV,

A inputs at GND,

V CC +, outputs high
Supply current from

I'A
mA

-25 mV,

~

0,

-18

-70

mA

Supply current from
ICCH+

I'A

V

10L ~ 16 mA,
- 3 V to 3 V

High-impedance-state

~

MIN

-3 V to 3 V

VCC± - MIN,
EN at 0.8 V,

Low-level output
VOL

UNIT

TVP~

-2 V

~

A inputs VID ~ 2 V

Low-level
IlL

MC3552
MAX

A inputs VID
B inputs VID
EN

... MAX

TVP~

MIN

IIH

Vee ±

B inputs at 3 V,

EN at 3 V

V CC _, outputs high

60

60

-30

-30

mA
mA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
tAli typical values are at VCC+ ~ 5 V, VCC- ~ -5 V, TA ~ 25°C.
§ Not more than one output should be shorted at a time.

switching characteristics,
PARAMETER
tPLH

FROM
(lNPUTI
A and B

Vec± TO

tpHL

A and B

y

tpZH

EN

V

tpZL

EN

y

tpHZ

EN

V

tPLZ
tpLH

EN

tPHL

EN

y
y
y

EN

TEST CONDITIONS

(OUTPUTI
V

±5 V, TA
MC3550
MIN

CL - 50 pF, See Figure 2
CL

~

MC3552

TVP'
17

MAX

17

25

CL - 15 pF, See Figure 2
CL
CL

~

~

50 pF, See Figure 2
1 5 pF, See Figure 3

CL - 1 5 pF, See Figure 4
CL - 15 pF, See Figure 4

, All typical values are at VCC + ~ 5 V, VCC-

-5 V, TA

~

TVP'

MAX

19

25

19

25

25

15 pF, See Figure 2

CL - 50 pF, See Figure 2

MIN

21

UNIT
ns
ns
ns

27
18

ns

29
25

ns

25

ns

25°C.

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-73

MC3550. MC3552
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
OUTPUT

5V

390 !l

GENERATOR
(SEE NOTE Al

50 \l
100 mV

5V

~

FOR
MC3452

FOR
MC3450
(SEE NOTE CI
TEST CIRCUIT

INPUT

100 mV

I
I

0 V

I

tPHL~

I

r---~-I-

- - -

VOH

I
OUTPUT

NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR :5 1 MHz, duty cycle :5 50%, tr :5 6 ns,
tf :5 6 ns.
B. CL includes probe and jig capacitance.
C. All diodes are 1 N916 or equivalent.
VOLTAGE WAVEFORMS

FIGURE 2. PROPAGATION DELAY TIMES

~

TEXAS
INSTRUMENTS
2-74

POST OFFICE BOX &55303 • DALLAS, TEXAS 75265

MC3550, MC3552
QUADRUPLE DIFFERENTIAL LINE RECEIVERS

tpZH
tpZL
tPHZ
tpLZ

A
B
100 mV
GNO
GNO
100 mV
1
mV
N
GNO
100 mV

51
Open
Closed
losed
Closed

52
Closed
Open
esed
Closed

(SEE NOTE CI

1 k!l
GENERATOR
(SEE NOTE Al

CL

50 !l

""'' ' '1

::

TEST CIRCUIT

ENABLE

\~:----

ENABLE

\ 1 : : - - - - 3V

I

I

tPZH~

tpZL

I

OUTPUT_ _ _ _

v

,\,-,~---"

VOH

...J"-~ ~ __ a v

0

--l+-+I

,"'M

1...----

VOL

~3V

.P

ENAB~ _ _ _ _ _ _ _ oV
I
tpLZ~

,~

~=1.5V

OUTPU~:~~~~_VOL
VOLTAGE WAVEFORMS

NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR " 1 MHz, duty cycle = 50%, tr " 6 ns,

tf

===

6 ns.

B. CL includes probe and jig capacitance.
C. All diodes are 1 N916 or equivalent.

FIGURE 3. MC3550 ENABLE AND DISABLE TIMES

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75285

2-75

MC3550, MC3552
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
5V

390 !l
~--~--~--- OUTPUT

GENERATOR
(SEE NOTE Al

50 !l

TEST C(RCUIT

ENABLE~5V
-~.~V-----3V
I

I

I

I

I

I

tpLH~

I
I

0V

tpHL~

I
:-1- - - -

I

VOH

I

OUTPUT
VOL
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
tf :$ 6 ns.
B. CL includes probe and jig capacitance.

:$

1 MHz, duty cycle

FIGURE 4, MC3552 PROPAGATION DELAY TIMES FROM ENABLE

TEXAS . "
INSTRUMENTS
2-76

POST OFFICE BOX 656303 • DALLAS. TEXAS 76266

:$

50%, tr

:$

6 ns,

MC3553
QUADRUPLE LINE DRIVER WITH COMMON ENABLE
03170. OCTOBER 1988

•

Similar to a Dual Version of SN55110A Line
Driver

•

Improved Stability Over Supply Voltage and
Temperature Ranges

•

Constant-Current Outputs

•

High Output Impedance

•

High Common-Mode Output Voltage Range
(-3Vt010V)

•

Glitch-Free Power-Up/Power-Down
Operation

•

TTL Input Compatibility

•

Common Enable Circuit

•

Military-Temperature-Range Version of
MC3453

J PACKAGE
ITOPVIEWI

lA

VCC+

1Y

4A
4Y
4Z
3Z
3Y
3A

lZ
2Z
2Y
ENABLE
2A
GND

VCCFK PACKAGE
ITOPVIEWI

+
u

~~~~~
3

2

1 20 19
18
17

description

16

The MC3553 features four line drivers with a
common enable input. When the enable input is
high, a constant output current is switched
between each pair of output terminals in
response to the logic level at that channel's
input. When the enable is low, all channel
outputs are nonconductive (transistors biased to
cutoff). This feature minimizes loading in partyline systems where a large number of drivers
share the same line.

15

14

9 10 11 12 13

«ou 1«
N Z Z u'"
(!)
U
>
NC - No internal connection

The driver outputs have a common-mode voltage
range of - 3 V to 10 V, allowing common-mode
voltages on the line without affecting driver
performance.
All outputs should be maintained within the
recommended common-mode output voltage
range to ensure that the channels do not interact
with each other. To minimize power dissipation,
all unused outputs should be grounded.

FUNCTION TABLE
OUTPUT

LOGIC

ENABLE

INPUT

INPUT

Z

y

H

H

ON

OFF

CURRENT

L

H

OFF

ON

H

L

OFF

OFF

L

L

OFF

OFF

L = low logic level
H = high logic level

All inputs are diode clamped and are designed
to satisfy TTL-system requirements. The inputs
are tested at 2 V for high-logic-level input
conditions and 0.8 V for low-logic-level input
conditions. These tests guarantee 400 mV of
noise margin when interfaced with Series 54
TTL.
The MC3553 is characterized for operation over
the full military temperature range of - 55 DC to
125 D C.

I. 0'

PRODUCTION DATA d••umants.ontain infonnllion
• urrant
publi.ation date. Products •••farm to
.peclfication. par tho to.... T.... Instrum.nts

0'

=~~ir:"ir:~":l.i ~=:~~n lIl"::;:':~::.s

n.t

Copyright © 1988, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-77

MC3553
QUADRUPLE LINE DRIVER WITH COMMON ENABLE
logic symbol t

logic diagram (positive logic)

ENABLE
1Y

1Y

1A

1A - - - - - - l - - l

1Z

1Z

2Y

2A

2Y

2Z
2A-----t-l

3Y

3A

2Z

3Z
4Y

4A

3Y
3A - - - - - - l - - l

4Z

3Z
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.

4Y
4A------I
4Z

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS
. - - - - - OUTPUT

VCC+ - - - - - - ; . - - -

INPUT

--1.-.....-1

' - - - - - - OUTPUT

Vcc--I---~~'----

--4I~'--------vCC_

GND-4I~--

TEXAS •
INSTRUMENTS
2-78

POST OFFICE BOX 655303. DALLAS. TEXAS 75265

MC3553
QUADRUPLE LINE DRIVER WITH COMMON ENABLE

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc + (see Note 1) ............................................. 7 V
Supply voltage, VCC _ ..................................................... - 7 V
Input voltage (any input) .................................................... 5.5 V
Output voltage range (any output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 5 V to 12 V
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 2) . . . . . .. 1375 mW
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
- 65°C to 126°C
Storage temperature range ......................................... - 65°C to 150°C
Case temperature for 60 seconds: FK package ................................. " 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............. 300°C
NOTES:

1. All voltage values are with respect to network ground terminal.
2. For operation above 25°C free·air temperature, derate to 275 mW at 125°C at the rate of 11.0 mW/oC.

recommended operating conditions

Supply voltage, VCC +
Supply voltage, VCC-

TA 2: 25°C

MIN

NOM

MAX

4.5

5

5.5

TA < 25°C

4.75

5

5.5

TA 2: 25°C

-4.5

-5

-5.5

TA < 25°C

-4.75

-5

-5.5

UNIT
V
V

High-level input voltage, VIH

2

5.5

Low-level input voltage, VIL

0

0.8

V

0

10

V

Common-mode output voltage range

VOCR+
VOCR-

Operating free-air temperature, TA

0

-3

V

-55

125

°c

electrical characteristics over recommended operating free-air temperature range. Vee +
Vee- = -MAX (unless otherwise noted)
PARAMETER

TEST CONDITIONSt

VIK

Input clamp voltage

11= -12 mA

10(on)

On-state output current

VCC+ = MAX,
VCC+ = MIN,

VCC- = MAX
VCC- = MIN

10(off)

Off-state output current

VCC+ = MIN,

VCC- = MIN,

IIH

High-level input current

IlL

Low-level input current

ICC+
ICC-

MIN

6.5

MAX

-0.9

-1.5

11

15

11

100

Supply current from VCC-

VI = 0.4 V
A inputs at 0.4 V
A inputs at 0.4 V

V
mA
~A
~A

1

mA

-1.6

mA

33

50

Enable at 2 V

33
-68

50
-90

Enable at 0.4 V

-31

-40

Enable at 0.4 V

UNIT

40

VI = 2.4 V
VI = VCC+ MAX

Supply current from VCC +

MAX,

TYP*

Va = 10 V

Enable at 2 V

V

mA
mA

tFor conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
tAli typical values are at VCC+ = 5 V, VCC- = -5 V, and TA = 25°C.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-79

MC3553
QUADRUPLE LINE DRIVER WITH COMMON ENABLE
switching characteristics, VCC +

5V,VCC-

=

FROM
(INPUT)

TO
(OUTPUT)

tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output

A

Y or Z

A

Y orZ

tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output

Enable

Y or Z

Enable

Y or Z

PARAMETER

500, CL

-5V,RL

TEST
CONDITIONS

40 pF, TA
MIN

TYP

MAX

9
7
14
15

15
15
25
25

See Figure 1

UNIT
ns
ns
ns
ns

PARAMETER MEASUREMENT INFORMATION
AINPUT--------------~

ENABLE

, - - - - - - - . - - - - -.....- - - - OUTPUT Y

1I>--------4I~---e_---

--------------~

OUTPUT Z

TEST CIRCUIT

A INPUT

~50%
~S----J

---I:

j+-twl-+1
I
I
I
I

ENABLE

" - - - - - OV

14------tw2---+1

I

I

I

I
I
I

I

I

I
I

I

, . - - - - 3V

50%

50%

OV

I

I

tPLH~
I
I

I

~tPHL
I

off

I
I

OUTPUT Y

50%

on

.-..(sf:....--------------

off

-1I _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

on

OUTPUT Z
I

I

tPHL~

~tPLH
VOLTAGE WAVEFORMS

NOTES: A. The pulse generators have the following characteristics: Zo = 500, tr = tf = 10 ±5 ns, twl :s 200 ns, PRR :s 1 MHz,
tw2 :s 1 ~s, PRR :s 500 kHz.
B. CL includes probe and jig capacitance.

FIGURE 1. PROPAGATION DELAY TIMES

TEXAS •
INSTRUMENTS
2-80

POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

NBT26
QUADRUPLE BUS TRANSCEIVER
WITH 3-ST ATE OUTPUTS
D2462. MAY 1978-REVISED SEPTEMBER 1986

•

P-N-P Inputs for Minimal Input Loading
(200 /LA Maximum)

•

High-Speed Schottky Circuitry

•

3-State Outputs for Driver and Receiver

1R

DE

•

Party-Line (Data-Bus) Operation

•

Single S-V Supply

•

Designed to Be Interchangeable with
Signetics N8T26. also Called 8T26

16
1D
2R
26
2D

4R
46
4D
3R
36

D. J. OR N PACKAGE
(TOP VIEW)

RE

Vee

GND """::'-----':..1-' 3D

description
The N8T26 is a quadruple transceiver utilizing
Schottky-diode-clamped transistors. Both the
driver and receiver have 3-state outputs. With
p-n-p inputs. the input loading is reduced to a
maximum input current of 200 /LA. This device
is capable of high switching rates into highcapacitance loads and are suitable for driving
long bus lines.

logic symbol t
DE
RE
(3) lB

10
lR

20

(S)

2B

no)

3B

2R

The N8T26 is characterized for operation from
ooe to 70 oe.

3D
3R

(13) 4B

FUNCTION TABLE (DRIVER)
INPUT

OUTPUT

DE

0

B

H

L

H

H

H

L

L

X

Z

tThis symbol is in accordance with ANSI/lEEE Std 91-1984 and
lEe Publication 617-12.

logic diagram (positive logic)

FUNCTION TABLE (RECEIVER)
INPUT

H
L
X
Z

OUTPUT

RE

B

R

L

L

H

L

H

L

H

X

Z

=
=
=
=

(2)
(3)
(S)
(S)

high level
low level
irrelevant
high impedance

lB
2R
2B
3R

3D

3B

13)

4R
4B

Copyright © 1986, Texas Instruments Incorporated

PRODUCTION DATA documents contain information

current as of publication data. Products conform to
spacifications par the tarms of Texas Instruments
standard warranty. Production processing does not
necessarily includa tasting of all p~r8meters.

lR

TEXAS ,.,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS,

TEX~S

75265

2-81

NUT26
QUADRUPLE BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS
VCC

VCC------~--------

5kfl NOM

INPUT
OUTPUT

Drivers:
Receivers:

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. OoC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............ 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package ........ 260°C
NOTE 1: Voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
PACKAGE

TA - 25°C
POWER RATING

DERATING FACTOR

TA - 70°C
POWER RATING

D

950mW

ABOVE TA - 25°C
7.6 rnw/oe

J

1025 mW

8.2 rnw/oe

656 rnW

N

1150mW

9.2 rnw/oe

736 rnW

608 rnW

recommended operating conditions
Supply voltage, Vee
High-level input voltage, VIH

B, D, DE, RE

Low-level input voltage, VIL

B, D, DE,

High-level output current, IOH
Low-level output current, IOL

NOM

MAX

UNIT

5

5.25

V

2

RE

V
0.85
-10

Driver, B
Receiver, R
Driver, B

-2

Receiver, R

16

40

Operating free-air temperature, TA

0

TEXAS

~

INSTRUMENTS
2-82

MIN
4.75

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

70

V
rnA
rnA
°e

N8T26
QUADRUPLE BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
electrical characteristics over recommended operating free-air temperature and supply voltage range
(unless otherwise noted)
PARAMETER
VIK

Input clamp voltage

VOH High·level output voltage
VOL
IOZ

Low-level output voltage

TEST CONDITIONS

=

MIN

B,D,DE,RE

II

B

VIH - 2 V,

Vil = 0.85 V, 10H -

R

Vil - 0.85 V

B

VIH - 2 V,

2 mA
10H
IOl - 40 mA

R

VIH

=

Vil

2 V,

= 0,85

Off-state (high·impedance

B,R

DE at 0,85 V

RE at 2 V,

R

RE at 2 V,

Vo

IIH

High-level input current

D,DE,RE

VI

Low-level input current

B,D,DE,RE

VI

lOS

Short-circuit output current:l:

ICC

Supply current

B
R

MAX
-1

state) output current

III

Typt

-5 mA

= 0.5

10 mA

2.6

3.1

2.6

3.1

Vo

= 16 mA
= 2,6 V

0,5
100
-100

V

= 5.25 V
= 0.4 V

25
-200

VCC

=

5,25 V

VCC

=

5,25 V, No load

V
V

0,5

V, 10l

UNIT

50

150

-30

-75
87

V
~A
~A
~A

mA
mA

t All typical values are at TA = 25°C and VCC = 5 V,
:t:Onl y one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.

switching characteristics. Vee

=

5 V. T A

=

25°e

PARAMETER

FROM

TO

tplH Propagation delay time, low-to-high-Ievel output
tPHl Propagation delay time, high-to-Iow-Ievel output

B

R

tplH Propagation delay time, low-to-high-Ievel output
tpHl Propagation delay time, high-to-Iow-Ievel output
tpLZ

Output disable time from low level

tpZl Output enable time to low level
tplZ Output disable time from low level
tpZl Output enable time to low level

D

B

FiE

R

DE

TEST CONDITIONS

B

Cl

= 30 pF,

See Figure 1
Cl

= 300 pF,

See Figure 2

=

MIN

TYP

MAX

8

18

7

10

14

20

12

20

30 pF,

9

17

See Figure 3,

15

30

20

43

20

38

Cl
Cl

=

300 pF,

See Figure 4

UNIT
ns
ns
ns
ns

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-83

N8126
QUADRUPLE BUS TRANSCEIVER
WITH 3·STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
2.6 V

VCC
TEST
POINT
CIRCUIT
UNDER
TEST
(See Note BI

B
DE

fiE

920

R

D (alii
OPEN

CL-30pF
(See Note CI

GND

";"

TEST CIRCUIT

t-- <;S ns

~

~ ~.:~n~ __ 2.6 V

90%~
l.5V I

I
I N P U T J 90%
I 1.SV
10%

i

:

10%

---"""' :

. !,r-

~Ll._S_V

OUTPUT

OV

tpLH~

I+---*tPHL

VOH

_______________
l._SJV;r

VOLTAGE WAVEFORMS

- - VOL

FIGURE 1. PROPAGATION DELAY TIMES FROM BUS TO RECEIVER OUTPUT
2.6 V

Vce

2.6V

TEST
POINT
CIRCUIT
UNDER
TEST
(S.e Note BI

DE
RE
D

300
(See Note DI

B

R (alii
OPEN

CL - 300 pF
(See Note CI

260 0

";"

";"

TEST CIRCUIT

~

INPUT

If- <;S ns

:

~

90%
1.S V

I

10%

.!!"=.~ n~

_

1 10%

I

:"'-""tPHL

-----""""'~,
OUTPUT

~

2.6 V

90%4i
1.5 V
OV

tPLH~

' V-

~.SV

l'S7

""'-_ _ _ _ _ _ _ _ _ _ _- J

-

VOH
VOL

VOLTAGE WAVEFORMS

FIGURE 2. PROPAGATION DELAY TIMES FROM DRIVER INPUT TO BUS
NOTES: A.
B.
C.
D.

The pulse generator in Figures 1 and 2 has the following characteristics: PRR ,;; 10 MHz, duty cycle = 50%, Zo = SO O.
All inputs and outputs not shown are open.
CL includes probe and jig capacitance.
All diodes are lN916 or lN3064.

TEXAS . "

INSTRUMENTS
2·84

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

NBT26
QUADRUPLE BUS TRANSCEIVER
WITH 3·STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
2.6V

5V

Vcc
TEST
POINT

RE

o (alii

2.4kfl

CIRCUIT
UNDER
TEST
(See Note BI

DE

240fl

R

(See Note 01

5kfl

GND

CL-30pF
(See Note CI

TEST CIRCUIT

_";5ns

: J'=".,...--="..:,

2.6V

INPUT

I
fit- tPL;;.:Z=--_ _...;..,
OUTPUT

!~

____~Y,O%

VOLTAGE WAVEFORMS

FIGURE 3. RECEIVER ENABLE AND DISABLE TIMES
5V

2.4kfl

CL - 300 pF
(See Note CI

70fl

(See Note DJ

TEST CIRCUIT

t4-+I- ..;5 ns
I

....... ..;5 ns
'-!------2.5V
90%
I
1.5 V
: 1;..1:.:0%;;:;...._ __

I

I
INPUT:
10% :

I

___....;14.....,~
OUTPUT

tPZL

\.5 V

10%Y
~tPLZ

VOLTAGE WAVEFORMS

FIGURE 4. DRIVER ENABLE AND DISABLE TIMES
NOTES: A.
B.
C.
D.

The pulse generator in Figures 3 and 4 has the following characteristics: PRR '" 5 MHz. duty cycle
All inputs and outputs not shown are open.
CL includes probe and jig capacitance.
All diodes are lN916 or lN3064.

= 50%.

Zo

= 50 n.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-85

2-86

SN55107A, SN551078, SN55108A, SN551088
SN75107A, SN751078, SN75108A, SN751088
DUAL LINE RECEIVERS
02304. JANUARY 1977-REVISED MAY 1990

•

High Speed

•

Standard Supply Voltage

SN55107A.SN55107B.SN55108A
SN55108B ... J PACKAGE
SN75107A.SN75107B.SN75108A
SN75108B ... D. J. OR N PACKAGE

•

Dual Channels

•

High Common-Mode Rejection Ratio

•

High Input Impedance

•

High Input Sensitivity

•

Differential Input Common-Mode Range of

(TOP VIEW)

1A
16
NC
1Y
1G

VCC+
VCC2A
26
NC
2Y
2G

5

±3 V
•

Strobe Inputs for Receiver Selection

•

Gate Inputs for Logic Versatility

•

TTL Drive Capability

•

High DC Noise Margin

GND

SN55107A.SN55107B.SN55108A.
SN55108B ... FK PACKAGE
(TOP VIEW)

+

I

UU

•

'107A and '1078 Have Totem-Pole Outputs

•

'108A and '1088 Have Open-Collector
Outputs

•

~~~~~
3

N·
NC
1Y
NC
1G

"8" Versions Have Diode-Protected Input
for Power-Off Condition

description

2

1 20 19

4
5

18

6

16

8

14

17
15

9 10111213

These circuits are TTL-compatible high-speed
line receivers. Each is a monolithic dual circuit
featuring two independent channels. They are
designed for general use as well as such specific
applications as data comparators and balanced.
unbalanced. and party-line transmission
systems. These devices are unilaterally
interchangeable with and are replacements for
the SN55107. SN55108. SN75107. and
SN75108. but offer diode-clamped strobe inputs
to simplify circuit design.

UlOU(!)>-

ZZNN

(!)

NC - No internal connection

The essential difference between the" A" and "8" versions can be seen in the schematics. Input-protection
diodes are in series with the collectors of the differential-input transistors of the "8" versions. These diodes
are useful in certain" party-line" systems that may have multiple Vee + power supplies and may be operated
with some of the Vee + supplies turned off. In such a system. if a supply is turned off and allowed to
go to ground. the equivalent input circuit connected to that supply would be as follows:

. . .,

INPU1-..
...,~~~_.----<

""Lw...J-.l:-

"A" VERSION

"B" VERSION

This would be a problem in specific systems that might possibly have the transmission lines biased to
some potential greater than 1.4 V.
The SN55107A. SN55107B. SN55108A. and SN55108B are characterized for operation over the full
military temperature range of - 55°C to 125°C. The SN751 07A. SN751 07B. SN75108A. and SN75108B
are characterized for operation from ooe to 70°C.
PRODUCTION DATA documents CDnlain information
current as of publication date. Products conform
to specifications per the terms of Taxas Instruments
standard warranty. Production processing does not
necessarilv include testing of all parameters.

~

Copyright © 1990, Texas Instruments Incorporated

TEXAS
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-87

SN55107A, SN55107B, SN55108A, SN551088
SN75107A, SN75107~ SN75108A, SN751088
DUAL LINE RECEIVERS·
logic symbols t
SN55108

SN55107

SN75108

SN75107

S

S

1A

1A

1B

1G

1B
""-~--

1G

2A

2A

2B

2B
2G 181

2G IBI

1"These symbols are in accordance with ANSI/IEEE Std 91-1984 and lEG Publication 617-12.
Pin numbers shown are for 0, J, and N packages.

logic diagram (positive logic)

1B

1G-=----.J

2G..!.::.:.-----,
2A

2B--..........
FUNCTION TABLE
DIFFERENTIAL
INPUTS

STROBES

G

5

y

VID 2: 25 mV

X

X

H

X

L

H

L

X

H

H

H

Indeterminate

X

L

H

L

X

H

H

H

L

- 25 mV < VIO < 25 mV

VID'" -25 mV

H

=

OUTPUT

A-B

high level, L

=

low level, X

=

irrelevant

TEXAS . "
INSTRUMENTS
2-88

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55107A, SN55107B, SN55108A, SN55108B
SN75107A, SN75107B, SN75108A, SN75108B
DUAL LINE RECEIVERS
schematic (each receiver)
1141

VCC+--'--1~--~--~~--.---------.-------~~---t

1 kll

1 kn

400 Il

4 k!l

1.6 kll

y

11,121
A
INPUTS

GNO

B 12,111

+---+-----',--------'
:
3 kn

4.25 kll

1

3 kll
: COMMON
I TO BOTH

II

Lf!:~~':~S__ J

VCC

_1-13...:1+--~~---4---..---~-f__-----~

...........__+.:.:16:.:..1

STROBE
S

TO OTHER RECEIVER

Pin numbers shown are for 0, J, and N packages.

t R = 1 k!l for '107A and '1076, 750!l for '10BA and '10B6.
NOTES: 1. Resistor values shown are nominal.
2. Components shown with dashed lines in the output circuitry are applicable to the '107A and '1078 only. Diodes in series
with the collectors of the differential input transistors are short circuited on ' 107 A and ' 1OBA.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC + (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Supply voltage, VCC _ ........ , ... ,........................................ -7 V
Differential input voltage (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 6 V
Common mode input voltage (see Note 5) .........................
+5 V
Strobe input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5,5 V
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 6):
D package .... , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 950 mW
FK or J package: Series 55 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1375 mW
J package: Series 75 ............................ , .......... , ......... , 1025 mW
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 11 50 mW
Operating free-air temperature range: Series 55 . . . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
Series 75 .................. , .......... ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package . , . . . . . . . . . .. 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package. . . . . . . .. 260°C
NOTES: 3.
4.
5.
6.

All voltage values, except differential voltages, are with respect to network ground terminal.
Differential voltage values are at the non inverting (AI terminal with respect to the inverting (B) terminal.
Common-mode input voltage is the average of the voltages at the A and B inputs.
For operation above 25°C free·air temperature, derate linearly at the following rates: 7.6 mW/oC for the D package, 11.0 mW/oC
for the FK and J packages with series 55 chips, B.2 mW/oC for the J package with series 75 chips, and 9,2 mW/oC for the
N package.

TEXAS ..,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-89

SN55107A, SN551078, SN55108A, SN551088
SN75107A, SN751078, SN75108A, SN751088
DUAL LINE RECEIVERS
recommended operating conditions (see Note 7)

Supply voltage. VCC +

VIOH (see Note 8)
Low-level input voltage between differential inputs,
VIOL (see Note 8)
Common-mode input voltage. VIC (see Notes 8 and 9)
Input voltage, any differential input to ground (see Note 8)
Low-level input voltage at strobe inputs, VIL(S)

SN75107A.SN75107B

SN5510BA.SN55108B

SN75108A.SN75108B

MIN

NOM

MAX

MIN

4.5

5
-5

5.5

4.75

5

5.25

V

-5.5

-4.75

-5

-5.25

V

0.025

5

0.025

5

V

-5 t

-0.D25

-5 t

-0.025

V

-3 t
-5 t

3

-3 t
-5 t

3

V

3

V

2
0

5.5

2
0

5.5
0.8

V

-16

rnA

70

·C

-4.5

Supply voltage. VCCHigh-level input voltage between differential inputs.

High-level input voltage at strobe inputs, VIHISI

SN55107A.SN55107B

3
0.8
-16

Low-level output current, IOL
-55

Operating free-air temperature, T A

t The algebraic convention,

125

0

NOM

UNIT

MAX

V

in which the less positive (more negativellimit is designated as minimum, is used in this data sheet for input

voltage levels only.
NOTES: 7. When using only one channel of the line receiver. the strobe G of the unused channel should be grounded and at least one
of the differential inputs of the unused receiver should be terminated at some voltage between - 3 V and 3 V.
8. The recommended combinations of input voltages fall within the shaded area of the figure shown.
9. The common-mode voltage may be as low as -4 V provided that the more positive of the two inputs is not more negative
than -3V.

RECOMMENDED COMBINATIONS
OF INPUT VOLTAGES

>
I

8.

2

~

~

o

[ -4
.5 -5
-5-4-3-2-10

2

3

Input B to Ground Voltage-V

TEXAS . .
INSTRUMENTS
2-90

POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

SN55107A, SN55107B, SN55108A, SN55108B
SN75107A, SN75107B, SN75108A, SN75108B
DUAL LINE RECEIVERS
electrical characteristics over recommended free-air temperature range (unless otherwise noted)
PARAMETER
High-level
IIH

A

r-s
r-s

input current

A

Low-level

III

TEST CONDITIONSt

input current

IIH

Low-level input current

III

into 1G or 2G
High-level input

IIH

current into S

current into S
High-level

VOH

output voltage
lOW-level

Val

output voltage
High-level

10H

output current
output current §

30

30

75
-10

30

VIO

=

5 V

VIH(S) = 2.4 V

= 0.4

75
75
-10

UNIT
~A

~

-10

-10

40

40

~

1

1

mA

VIHIS) - MAX VCC+
ViliS)

V

-1.6

-1.6

mA

VCC± = MAX,
VCC± - MAX,

VIHIS) = 2.4 V

BO

BO

2

2

~
mA

-3.2

-3.2

mA

VCC±

VIHISI - MAX VCC±

=

MAX,

ViliS) = 0.4 V

=

MIN,

ViliS)

=

O.B V, VIDH = 25 mV,
2.4
-400~A,VIC = -3Vt03V
VIH(S) - 2 V,
VIOL - -25 mV,
VCC± - MIN,
10l = 16 mA,
VIC = -3Vt03V
VCC±
10H =

VCC± = MIN,
VCC±

=

V
0.4

VOH = MAX VCC +
-18

MAX

Supply current from
ICCH + VCC+, outputs high

VCC± = MAX,

TA

=

25°C

Supply current from
ICCH - VCC _, ouputs high

VCC± = MAX,

TA

=

25°C

t For

75

VCC± = MAX,

Short-circuit
lOS

30

VID = -5 V

VCC± = MAX

Low-level input

III

'108A, '1088
MIN TYP* MAX

VIO = 5 V
VIO = -5V

VCC± = MAX

High-level input current VCC± = MAX,
into 1G or 2G
VCC± - MAX,

'107A, '1078
MIN TYP* MAX

0.4

V

250

~A

-70
1B

mA

30

1B

-8.4 -15

30

mA

-6.4 -15

mA

conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
= 5 V, VCC- = -5 V, TA = 25°C.

*All typical values are at VCC+

§ Not more than one output should be shorted at a time.

switching characteristics. VCC± = ±5 V. TA = 25°C (see Figure 1)
PARAMETER
tPlHID)
tpHl(D)
tPlHIS)
tpHlIS)

TEST CONDITIONS

Propagation delay time, low-to-high-Ievel

Rl = 390 II, Cl = 50 pF

output, from differential inputs A and B

Rl = 390 II, Cl = 15 pF

Propagation delay time, high-to-Iow-Ievel

Rl = 390 II, Cl = 50 pF

output, from differential inputs A and B

Rl - 390 II, Cl -

Propagation delay time, low-to-high-Ievel

Rl = 390 II, Cl = 50 pF

output, from strobe input G or S

Rl - 390 II, Cl -

Propagation delay time, high-to-Iow-Ievel

Rl = 390 II, Cl=50pF

output, from strobe input G or S

Rl = 390 II, Cl = 15 pF

'107A, '1078
MIN

TYP MAX
17

25

17

25

15 pF
10

15

B

15

15 pF

'10BA, '10B8
MIN

TYP MAX
19

25

19

25

13

20

13

20

UNIT
ns
ns
ns
ns

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TeXAS 75265

2-91

8N55107A, 8N551078, 8N55108A, SN551088
8N75107A, SN751078, SN75108A, 8N751088
DUAL LINE RECEIVERS
PARAMETER MEASUREMENT INFORMATION
VCC-

DIFFERENTIAL
INPUT

r----- 1 ------,

lAI

OUTPUT
'107A, '107B

I

~>----~.;-I-I'......

11Y

390
lG

5

2G

n

VCC+
OUTPUT

....- - - 4.......""',.--.......- '108A, '108B

~~---r--~

CL~5PF

STROBE
INPUT
(See Note B)

J.,(see Note C)

TEST CIRCUIT

IN~UT

J-too
mV

100 mV

II

II

I

I

~

____J

I4--tpl--+1
STROBE
INPUT
G or 5

I
I

I
I

II

II

--+t

I

tPLH(D)-+/

If.--

'-----OV

14----tp2--~~

{

3V
1.5 V
1.5 V
'--_ _ _ _ _.I:.L ____ 0 V

I4-tPHL(D)
I

I

I

,"~M ~.,.~_(_S_)-+I_.J;~.5-V----~-1.-5"'\(':~:
VOLTAGE WAVEFORMS

FIGURE 1, PROPAGATION DELAY TIMES
NOTES: A. The pulse generators have the following characteristics: Zo = 50 n, tr = 10 ±5 ns, tf = 10 ±5 ns, tpdl = 500 ns,
PRR s 1 MHz, tpd2 = 1 ~s, PRR s 500 kHz.
B. Strobe input pulse is applied to Strobe 1G when inputs 1A-l B are being tested, to Strobe 5 when inputs 1A-l B or 2A-2B
are being tested, and to Strobe 2G when inputs 2A-2B are being tested.
C. CL includes probe and jig capacitance.
D. All diodes are lN916.

TEXAS

-II

.INSTRUMENTS
2-92

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN55107A, SN551078, SN5510BA, SN5510B8
SN75107A, SN751078, SN7510BA, SN7510B8
DUAL LINE RECEIVERS
TYPICAL CHARACTERISTICSt
HIGH-LEVEL INPUT CURRENT INTO 1A or 2A

OUTPUT VOLTAGE

vs

vs

DIFFERENTIAL INPUT VOLTAGE

FREE-AIR TEMPERATURE

6

r

5
I

Inputs _

.. 4

'"
"is

\

ID

> 3
:;Q.

'I

r\1

«"-

Nl),.v~rting

InVe~ng

>

100

'~08A 1'108~
r---

r---

iur

r\

'107A, '107B

80

u

60

.5
a;

40

I'-.

.............

~

.i:.

:E'"

VCC± - ±5V
RL-400n
TA - 25 DC

o

I

>
CD

2

>

I

I

I

±5 V

Q.

:;

~
o

I

E
2?
:;

:;

'\

I

VCC± -

I

...............

20

E

I

-40 -30 -20 -10

0

10

20

30

-------

r--

o

40

- 75 - 50 - 25

VID-Differentiallnput Voltage-mV

0

25

50

75

100 125

TA-Free-Air Temperature- DC

FIGURE 3

FIGURE 2

'107A, '1078
PROPAGATION DELAY TIME
(DIFFERENTIAL INPUTS)

SUPPLY CURRENT, OUTPUTS HIGH

30

vs

vs

FREE-AIR TEMPERATURE

FREE-AIR TEMPERATURE

I

Vcc±

«

I

40

!

= ±5V

25

.,

E

."

I

E
~

I

20

u"
>Q. 15

E

ICC+

-

~

~

a;

/Jl

::z:
9

I

I

25

>-

CD

Q.

"I

I

VCC± - ±5V
35 -RL - 390 n
CL - 50 pF
30

20 _tPLHIDI

.g"

15

IV

ICC-

10

0

'"

r-

.--

tPHLIDI

IV

Q.

u

0

.t

5

10

--

,/

..--/

5

o

o

-75 -50 -25

0

25

50

75

100 125

-75-50 -25

TA-Free-Air Temperature- DC

0

25

50

75

100 125

T A - Free-Air Temperature - DC

FIGURE 4

FIGURE 5

t Values below 0 DC and above 70°C apply to SN55 Series only.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-93

SN55107A, SN551078, SN55108A, SN551088
SN75107A, SN751078, SN75108A, SN751088
DUAL LINE RECEIVERS
TYPICAL CHARACTERISTICS t
'108A, '1088

'108A, '1088

PROPAGATION DELAY TIME, LOW-TO-HIGH LEVEL
(DIFFERENTIAL INPUTS)
vs
FREE-AIR TEMPERATURE

PROPAGATION DELAY TIME, HIGH-TO-LOW LEVEL
(DIFFERENTIAL INPUTS)
vs
FREE-AIR TEMPERATURE
40

120

.

VCC±-±5V
CL - 15 pF

c
I

.,

III

100

E

j::

>.!!

..

n

80
RL - 3900

Q

r I--

c
0

60

.~

..

01
Q.

0

40

Ii:
I

20

a---'

RL = 390

I I
0
-75 -50 -:25

n
I
0

25

V

V

.

35

j::

30

E

>.!!

.,

Q

I

0

.~

..

RL - 390

Q.

---

50

I

/'"

/

15

RL - 1950 n
RL - 3900

C

10

J:

a-

35

.,

-75-50 -25

40

V~±_1±5~

35

RL - 390 n
CL - 50 pF

III

c
I

..E

£

5

t1.:'"H(Si

- I
o

I

-75 -50 -25

I

l

I

30

tValues below

ooe and

t!:!:.HISI

01
Q.

e

10

Il.

.-+-"

tPHLISI
5

---....-

/

7
./
./

o
0

25

50

75

100 125

-75 -50 -25

above 70

0

e apply to

0

25

50

75

100 125

TA-Free-Air Temperature- °C

TA-Free-Air Temperature- °C
FIGURE 8

FIGURE 9

SN55 Series only.

TEXAS •

INSTRUMENTS
2-94

100 125

VCC±=±5V
RL - 390 n
CL - 15 pF

25
>'ii 20
Q
c
15

.
·B.
..

- ------

..

tPHL(S)
10

75

j::

25
>'ii 20
Q
c

Q.

50

'108A, '1088

.

01

25

PROPAGATION DELAY TIME (STROBE INPUTS)
vs
FREE-AIR TEMPERATURE

30

15

0

TA-Free-Air Temperature- °C
FIGURE 7

j::

...

n

5

100 125

E

~

/

o

75

'107A, '1078

c
I

Ii

:::;

PROPAGATION DELAY TIME (STROBE INPUTS)
vs
FREE-AIR TEMPERATURE

III

f\

01

e

n""\

~

20

Il.

V

j

25

TA-Free-Air Temperature- °C
FIGURE 6

40

I

f-VCC± = ±5V
CL - 15 pF

c

....- . / '

50

-Rj-

C
:E

-

---

V-

c
I

POST OFFICE BOX 656303 • DAUAS. TEXAS 75265

SN55107A. SN55107B. SN55108A. SN55108B
SN75107A. SN751078. SN75108A. SN751088
DUAL LINE RECEIVERS
APPLICATION INFORMATION
basic balanced-line transmission system
The '1 07A, '1 07B, '108A, and '108B dual line circuits are designed specifically for use in high-speed data
transmission systems that utilize balanced, terminated transmission lines such as twisted-pair lines. The
system operates in the balanced mode, so noise induced on one line is also induced on the other. The
noise appears common mode at the receiver input terminals where it is rejected. The ground connection
between the line driver and receiver is not part of the signal circuit so that system performance is not
affected by circulating ground currents.
The unique driver-output circuit allows terminated transmission lines to be driven at normal line impedances.
High-speed system operation is ensured since line reflections are virtually eliminated when terminated lines
are used. Crosstalk is minimized by low signal amplitudes and low line impedances.
The typical data delay in a system is approximately (30 + 1.3 L) ns, where L is the distance in feet separating
the driver and receiver. This delay includes one gate delay in both the driver and receiver.
Data is impressed on the balanced-line system by unbalancing the line voltages with the driver output
current. The driven line is selected by appropriate driver-input logic levels. The voltage difference is
approximately:
VDIFF '" 1/2I O(on) • RT·
High series line resistance will cause degradation of the signal. The receivers, however, will detect signals
as low as 25 mV (or less). For normal line resistances, data may be recovered from lines of several thousand
feet in length.
Line-termination resistors (RT) are required only at the extreme ends of the line. For short lines, termination
resistors at the receiver only may prove adequate. The signal amplitude will then be approximately:
VDIFF '" 10(on) • RT·

A _ . . r - -.....

DATA INPUT

TRANSMISSION LINE HAVING
CHARACTERISTIC IMPEDANCE Zo '--........DL.o'"
RT = ZOl2

...

c-~-

INHIBIT

~I

D-",,-_,
DRIVER
SN55109A, SN55110A,
SN75109A,SN75110A,
SN75112

y

STROBES

RECEIVER
'107 A, '107B, '10BA, '10BB

FIGURE 10

data-bus or party-line system
The strobe feature of the receivers and the inhibit feature of the drivers allow these dual line circuits to
be used in data-bus or party-line systems. In these applications, several drivers and receivers may share
a common transmission line. An enabled driver transmits data to all enabled receivers on the line while
other drivers and receivers are disabled. Data is thus time-multiplexed on the transmission line. The device
specifications allow widely varying thermal and electrical environments at the various driver and receiver
locations. The data-bus system offers maximum performance at minimum cost.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-95

SN55107A, SN55107B, SN55108A, SN55108B
SN75107A, SN75107B, SN75108A, SN75108B
DUAL LINE RECEIVERS
APPLICATION INFORMATION
RECEIVER 4

RECEIVER 2

RECEIVER 1
DRIVERS
SN55109A. SN551 10A.
SN75109A. SN751 10A.
SN75112

V

V

V

STROBES
RT

STROBES

STROBES
RT

RT
LOCATION 2
DRIVER 1
A
DATA INPUT B

A

C
INHIBIT D

C

DRIVER 3

DRIVER 4

LOCATION 3

LOCATION 4

B

RECEIVERS:
'107A, '107B,
'10BA, '10BB

D
LOCATION 1

FIGURE 11

unbalanced or single-line systems
These dual line circuits may also be used in unbalanced or single-line systems. Although these systems
do not offer the same performance as balanced systems for long lines, they are adequate for very short
lines where environmental noise is not severe.
The receiver threshold level is established by applying a dc reference voltage to one receiver input terminal.
The signal from the transmission line is applied to the remaining input. The reference voltage should be
optimized so that signal swing is symmetrical about it for maximum noise margin. The reference voltage
should be in the range of - 3 V to 3 V. It can be provided by a voltage supply or by a voltage divider from
an available supply voltage.
A single-ended output from a driver may be used in single-line systems. Coaxial or shielded line is preferred
for minimum noise and crosstalk problems. For large signal swings, the high output current (typically 27 mAl
of the SN75112 is recommended. Drivers may be paralleled for higher current. When using only one channel
of the line drivers, the other channel should be inhibited and/or have its outputs grounded.

SN55109A.SN55110A
SN75109A,SN75110A
SN75112

A-r-INPUT

·107A. '107B
OUTPUT

INPUT=t>frD'1088
l08A.

8-L--~

V

INHIBIT C

STR08ES

D-L--~

FIGURE 12

TEXAS . . ,
INSTRUMENTS
2-96

OUTPUT

ref

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55107A. SN55107~ SN55108A. SN55108B
SN75107A. SN75107B. SN75108A. SN75108B
DUAL LINE RECEIVERS
APPLICATION INFORMATION
'108A, '1088 dot-AND output connections
The '1 08A, '1 08B line receivers feature an opencollector-output circuit that can be connected in
the dot-AND logic configuration with other
similar open-collector outputs. This allows a level
of logic to be implemented without additional
logic delay.

p.-H~-OUTPUT

SN5401/SN7401 or equivalent

FIGURE 13
increasing common-mode input voltage range of receiver
The common-mode voltage range or CMVR is defined as the range of voltage applied simultaneously to
both input terminals that if exceeded does not allow normal operation of the receiver.
The recommended operating CMVR is ± 3 V, making it useful in all but the noisiest environments. In
extremely noisy environments, common-mode voltage can easily reach ± 10 V to ± 15 V if some precautions
are not taken to reduce ground and power supply noise, as well as crosstalk problems. When the receiver
must operate in such conditions, input attenuators should be used to decrease the system common-mode
noise to a tolerable level at the receiver inputs. Differential noise is also reduced by the same ratio.
These attenuators have been intentionally omitted from the receiver input terminals so the designer may
select resistors that will be compatible with his particular application or environment. Furthermore, the
use of attenuators adversely affects the input sensitivity, the propagation delay time, the power diSSipation,
and in some cases (depending on the selected resistor values) the input impedance, therefore reducing
the versatility of the receiver.
The ability of the receiver to operate with
approximately ± 15 V common-mode voltage at
the inputs has been checked using the circuit
shown in Figure 14. The resistors R1 and R2
provide a voltage divider network. Dividers with
three different values presenting a 5-to-1
attenuation were used so as to operate the
differential inputs at approximately ± 3 V
common-mode voltage. Careful matching of the
two attenuators is needed so as to balance the
overdrive at the input stage. The resistors used
are shown in Table A.

TABLE B. TYPICAL PROPAGATION DELAYS FOR
RECEIVER WITH ATTENUATOR TEST CIRCUIT
SHOWN IN FIGURE 14
DEVICE

tpLH
'107A, '107B
tpHL

tpLH

TABLE A
Attenuator 1:

Rl

~

Attenuator 2:

Rl

Attenuator 3:

Rl

PARAMETERS

2 kg, R2

~

0.5 kg

~

6 kg, R2

~

1.5 kg

~

12 kg, R2

~

3 kl1

'108A, '10BB
tpHL

INPUT
ATTENUATOR
1

TYPICAL
(ns)
20

2

32

3

42

1

22

2

31

3

33

1

36

2

47

3

57

1

29

2

38

3

41

Table B shows some of the typical switching
results obtained under such conditions.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-97

SN55107A, SN55107~ SN55108A, SN551088
SN75107A, SN751078, SN75108A, SN751088
DUAL LINE RECEIVERS
APPLICATION INFORMATION

+16V}
-16V---'/
~v

+14V~or

5V

ONE
ATTENUATOR
ON EACH
INPUT
R1
R2

+15 V
OR "IN~.....---I
-15 V R1

+5 V

RZ

FIGURE 14. COMMON-MODE CIRCUIT FOR TESTING INPUT ATTENUATORS,
WITH RESULTS SHOWN IN TABLE B
Two methods of terminating a transmission line to reduce reflections are:
METHOO Z

R1

RZ

R2

- c < ! / - : 3 _ 3__-""""R_Z.....R_Z....

R1
R3 - R1 + R2 - 20/2

R1
R1 + R2 > > 20
R3 - 20/2

FIGURE 15
The first method uses the resistors as the attenuation network and line termination. The second method
uses two additional resistors for the line terminations.

TEXAS . "

INSTRUMENTS
2-98

POST OFFICE BOX 655303 • DALLAS, TEXAS 75266

SN55t07A, SN55t07B, SN55t08A, SN55t08B
SN75t07A, SN75t07B, SN75t08A, SN75t08B
DUAL LINE RECEIVERS
APPLICATION INFORMATION
For party-lin.e operation, method 2 should be used as follows:

~
:3 -~i lR~ 2

.F-_-zo+--.....- - - - - I - - L - j - q i ; "

':"

':"

FIGURE 16
To minimize the loading, the values of R1 and R2 should be fairly large. Examples of possible values are
shown in Table A.

furnace control using the SN75108A
The furnace control circuit in Figure 17 is an example of the possible use of the SN551 07 A Series in areas
other than what would normally be considered electronic systems. Basically the operation of this control
is as follows. When the room temperature is below the desired level, the resistance of the room temperature
sensor is high and channel 1 noninverting input is below (less positive than) the reference level set on
the input differential amplifier. This situation causes a low output, operating the "heat on" relay and turning
on the heat. The channel 2 noninverting input is below the reference level when the bonnet temperature
of the furnace reaches the desired level. This causes a low output, thus operating the blower relay. Normally
the furnace is shut down when the room temperature reaches the desired level and the channel 1 output
goes high, turning the heat off. The blower remains on as long as the bonnet temperature is high, even
after the "heat on" relay is off. There is also a safety switch in the bonnet that shuts the furnace down
if the temperature there exceeds desired limitations. The types of temperature-sensing devices and biasresistor values used are determined by the particular operating conditions encountered.
5V
BONNET UPPER
TEMP
SENSOR

TO "HEAT ON"
RELAY
RETURN

TO BLOWER
RELAY
RETURN

FIGURE 17. FURNACE CONTROL USING SN75108A

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TexAS 75265

2-99

SN55107A. SN551078. SN55108A. SN551088
SN75107A. SN751078. SN75108A. SN751088
DUAL LINE RECEIVERS
APPLICATION INFORMATION
repeaters for long lines
In some cases, the driven line may be so long that the noise level on the line reaches the common-mode
limits or the attenuation becomes too large and results in poor reception. In such a case, a simple application
of a receiver and a driver as repeaters [shown in Figure 18(a)] restores the signal level and allows an adequate
signal level at the receiving end. If multichannel operation is desired, then proper gating for each channel
must be sent through the repeater station using another repeater set as in Figure 18(b).
REPEATERS

D~:A

f~===:;-'"'"";:=~\~------,

1. .

_D_R_IV_E_R_tfJ RECEIVER

H

DRIVER

~

P

RECEIVER

~

DATA
OUT

P
a. SINGLE·CHANNEL LINE

DATA
IN

DATA
OUT

CLOCK
IN

P

P

b. MULTICHANNEL LINE WITH STROBE

FIGURE 18. RECEIVER-DRIVER REPEATERS

receiver as dual differential comperator
There are many applications for differential comparators, such as voltage comparison, threshold detection,
controlled Schmitt triggering, and pulse width control.
As a differential comparator, a '107 A or '1 08A may be connected so as to compare the noninverting input
terminal with the inverting input as shown in Figure 19. Thus the output will be high or low resulting from
the A input being greater or less than the reference. The strobe inputs allow additional control over the
circuit so that either output or both may be inhibited.
STROBE 1

OUTPUT 1

REFERENCE 1

STROBE 1.2
OUTPUT 2
REFERENCE 2

-=

STROBE 2

FIGURE 19. SN55107A SERIES RECEIVER AS A DUAL DIFFERENTIAL COMPARATOR

~

TEXAS
INSTRUMENTS
2-100

POST OFFICE BOX 665303 • DALLAS, TEXAS 75265

SN55107A. SN55107B. SN55108A. SN55108B
SN75107A. SN75107B. SN75108A. SN75108B
DUAL LINE RECEIVERS
APPLICATION INFORMATION

window detector
The window detector circuit in Figure 20 has a large number of applications in test equipment and in
determining upper limits, lower limits, or both at the same time - such as detecting whether a voltage
or signal has exceeded its limits or "window". Illumination ofthe upper-limit (lower-limit) indicator shows
that the input voltage is above (below) the selected upper (lower) limit. A mode selector is provided for
selecting the desired test. For window detecting, the "upper and lower limits" test position is used.
+5 V -5 v

5V

, k!l
UPPER
P-Hr---VV\--::I~~ LIMIT
INDICATOR

SET

UPPER
LIMIT
INPUT
FROM
TEST
POINT

LOWER
P--:--1f--">N\,---:!,.-F~ LIMIT
INDICATOR

SET

LOWER
LIMIT

, k!l

L_

r _04':::+~

':"':"
----

"

::"~1/1:~~'"

_____

4.7k!l

MODE
SELECTOR

MODE SELECTOR LEGEND
POSITION

CONDITION
OFF

2

TEST FOR UPPER LIMIT

3

TEST FOR LOWER LIMIT

4

TEST FOR UPPER AND LOWER LIMITS

FIGURE 20. WINDOW DETECTOR USING SN75108A

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

2-101

SN55107A, SN551078, SN55108A, SN551088
SN75107A, SN751078, SN75108A, SN751088
DUAL LINE RECEIVERS
APPLICATION INFORMATtON

temperature controller with zero-voltage switching
The circuit in Figure 21 switches an electric resistive heater on or off by providing negative-going pulses
to the gate of a triac during the time interval when the line voltage is passing through zero. The pulse
generator is the 2N5447 and four diodes. This portion of the circuit provides negative-going pulses during
the short time (approximately 100 /LS) when the line voltage is near zero. These pulses are fed to the inverting
input of one channel of the '1 OBA. If the room temperature is below the desired level, the resistance of
the thermistor is high and the noninverting input of channel 2 is above the reference level determined by
the thermostat setting. This provides a high-level output from channel 2. This output is AND'ed with the
positive-going pulses from the output of channel 1, which are reinverted in the 2N5449.

r

120 V TO
220 V
60 Hz

HEATER
LOAD

FIGURE 2,1. ZERO-VOLTAGE SWITCHING TEMPERATURE CONTROLLER

TEXAS , . ,
INSTRUMENlS
2-102

POST OFFICE BOX 655303 • DALLAS. TEXAS 76266

SN55109A, SN55110A
SN75109A, SN75110A, SN75112
DUAL LINE DRIVERS
02106. DECEMBER 1975·-REVISEO MAY 1990

•

Improved Stability over Supply Voltage and
Temperature Ranges
Constant-Current Outputs

•

High Speed

•

Standard Supply Voltages

•

High Output Impedance

•

High Common-Mode Output Voltage Range
(-3Vto10V)

•

TTL Input Compatibility

•

Inhibitor Available for Driver Selection

•

Glitch-Free During Power-Up/Down
OOC to 70°C

J or FK PACKAGE

J or N PACKAGE
SN75109A

SN55109A
SN55110A

SN75110A
SN75112

SN75109A. SN75110A. SN75112 .
D. J. OR N PACKAGE

•

-55°C to 125°C

SN55109A. SN55110A• . . . J PACKAGE

(TOP VIEWI

lA
18
1C
2C
2A
28

1Z
VCC0
2Z

2Y

SN55109A. SN55110A ... FK PACKAGE
(TOP VIEWI

+

OUTPUT

-

~Z>~

FUNCTION
6-mA Current

3

Switch
1 2-mA Current

1C
NC
2C
NC
2A

Switch
27 -mA Current
Switch

2 1 20 19

4
5

18
17

1Z
NC

6

16

VCC-

7

15

NC

8

14

0

9 1011 1213

The SN55109A, SN55110A, SN75109A,
SN75110A, and SN75112 have improved
output current regulation with supply voltage
and temperature variations. In addition, the
higher current of the SN75112 (27 mAl allows
data to be transmitted over longer lines. These
drivers offer optimum performance when used
with the SN55107A, SN55108A, SN75107A,
and SN75108A line receivers.

logic symbol t
(31

1Y

GND

description

lC

VCC+

NC - No internal connection

logic diagram (positive logic)
&

lA (11
lB (2)

ENI

lC (31

&

EN2
2C
0(101
lA
lB

(11
(21

2A (5)
2B

(6)

IV
lZ

2C ..:.(4.;.:,1_ _-L_/

2V
2A (51

2Z

2B (6)

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lED Publication 617-12.

PRODUCTION DATA documonts contain information
current as af publication date. Products conform to
spacifications per the tarms of Texas Instruments

:=~~i~a{::1~1i ~~::\~:i:; ~r::::£:~~ not

Pin numbers shown are for 0, J, and N packages.
Copyright © 1990, Texas Instruments Incorporated

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-103

SN55109A, SN55110A
SN75109A, SN75110A, SN75112
DUAL LINE DRIVERS
description (continued)
These drivers feature independent channels with common voltage supply and ground terminals. The
significant difference between the three drivers is in the output current specification. The driver circuits
feature a constant output current that is switched to either of two output terminals by the appropriate
logic levels at the input terminals. The output current can be switched off (inhibited) by low logic levels
on the enable inputs. The output current is nominally 6 mA for the' 109A, 12 mA for the' 11 OA, and 27 mA
for the SN75112.
The enable/inhibit feature is provided so the circuits can be used in party-line or data-bus applications.
A strobe or inhibitor (enable 0), common to both drivers, is included for increased driver-logic versatility.
The output current in the inhibited mode, IO(off), is specified so that minimum line loading is induced when
the driver is used in a party-line system with other drivers. The output impedance of the driver in the inhibited
mode is very high-the output impedance of a transistor biased to cutoff.
The driver outputs have a common-mode voltage range of - 3 V to 10 V, allowing common-mode voltage
on the line without affecting driver performance.
All inputs are diode clamped and are designed to satisfy TTL-system requirements. The inputs are tested
at 2 V for high-logic-level input conditions and 0.8 V for low-logic-level input conditions. These tests assure
400 mV of noise margin when interfaced with Series 54/74 TTL.
The SN551 09A and SN5511 OA are characterized for operation over the full military temperature range
of - 55°C to 125°C. The SN751 09A, SN7511 OA, and SN75112 are characterized for operation from
OOC to 70°C.
FUNCTION TABLE {EACH ORIVERI
LOGIC

ENABLE

INPUTS

INPUTS

OUTPUTSt

A

B

C

0

y

z

x

X

L

X

OFF

OFF

X

X

X

L

OFF

OFF

L

X

H

H

ON

OFF

X

L

H

OFF

H

H

H
H

ON

H

OFF

ON

H = high level. L = low level, X = irrelevant
tWhen using only one channel of the line drivers, the
other channel should be inhibited andlor have its
outputs grounded.

TEXAS . "
INSTRUMENTS
2-104

.POST OFFice BOX 655303 • DALLAS, TEXAS 75266

SN55109A, SN55110A
SN75109A, SN75110A, SN75112
DUAL LINE DRIVERS
schematic leach driver)

INPUT A+.(l~,5;;;)___Jf.,..
INPUT B ..>:2,,-,6~l--"

GNDl(7~)~~~==~~---t

rCoMMONToBoTH DRiVERS "I
I

I
I
VCC_~(l~l~)~4-------~

'\fl, .. VCC+ bus
\/",VCC_ bUS

L _ _ _ _ _ _ _ _ _ _ ..J

~------~v---------~
TO OTHER DRIVER

Pin numbers shown are for D, J, and N packages.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75285

2-105

SN55109A, SN55110A
SN75109A, SN75110A, SN75112
DUAL LINE· DRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
SN55109A
SN55110A
7
-7

Supply voltage (see Note 1)

VCC+
VCC- Supply voltage
Input voltage
VI
Output voltage range
Continuous total power dissipation (see Note 2)
Operating fre&-air temperature range

5.5
-5 to 12

SN75109A
SN75110A

SN75112

UNIT

7
-7

7
-7

V
V

5.5
-5 to 12

5.5
-5 to 12
See Dissipation Rating Table
-55to 125
to 70
o to 70
-65 to 150 -65 to 150 -65 to 150

o

Storage temperature range

Case temperature for 60 seconds: FK package
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package

260
300

.1I D package
N package

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds

300

300

260
260

260
260

V
V
°C
°C
°C
°C
°C

NOTES: 1. Voltage values are with respect to network ground terminal.
2. In the FK or J package, SN55109A and SN55110A chips are either silver glass or alloy mounted, and SN75109A, SN75110A,
and SN75112 chips are glass mounted.
DISSIPATION RATING TABLE
PACKAGE
D
FK
J (SN55 _ _ A)
J (SN75 _ _ )
N

TA s 25°C
POWER RATING
950 mW

ABOVE TA - 25°C
7.6 mW/oC

TA = 70°C
POWER RATING
608 mW

TA - 125°C
POWER RATING

1375 mW
1375 mW
1025 mW

11.0 mW/oC
11.0 mW/oC
8.2 mW/oC

880 mW
880 mW
656 mW

275 mW

1150mW

9.2 mW/oC

736 mW

DERATING FACTOR

~

TEXAS
INSTRUMENTS
2-106

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

275 mW

recommended operating conditions (see Note

3)
SN76109A.

SN55109A.

SN75110A

SN55110A

TA

2::

coe
coe
coe

TA

<

coe

TA

Supply Voltage VCC+

2:

TA <

Supply voltage VCC-

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

4.75

5

5.5

4.5

-5

-5.5

-4.75

-5

-5.25

-4.75

-5

-5.5

~

~z

i~~

10

0

10

V

Negative common-mode output voltage

0

-3

0

-3

V

High-level input voltage. VIH

2

-55

TEST CONDITIONS t

PARAMETER

SN55109A.

SN55110A.

SN75109A

SN75110A

MIN

~ Ul..t

Input clamp voltage

On-state output current

~

1010ff)

Off-state output current

8l

II

VCC±

= MIN,
= MAX.
= MIN.
= MIN,

VCC±

= MAX.

VI

VCC±
VCC+
VCC±

Input current at maximum
II

A. B. or C inputs

o input

input voltage

A, B, or C inputs

=

-12rnA

=
=
=

Vo
Vo
Vo

=

10 V
-3 V

VCC±

=

MAX.

VI

=

VCC±

=

MAX,

VI

= 0.4 V

IIH

III

Low-level input current

ICC+lon)

Supply current from

ICC-Ion)

Supply current from

Vee + with driver enabled
Vee _ with driver enabled

ICC+loff)

Supply current from

Vee +

with driver inhibited

VCC"

ICC-loll)

Supply current from

Vee _

with driver inhibited

A. 8, C, and 0 inputs at 0.4 V

A, B, or C inputs

o input

~

-0.9
6

V

70

·c

A and B inputs at 0.4 V r
C and 0 inputs at 2 V
MAX.

MIN

SN75112

TVP*

MAX

-1.5

-0.9

7

12

6

2.4 V

VCC± - MAX.

=

MAX

5.5 V

High-level input current

o input

3.5

TVP*

10 V

tFor conditions shown as MIN or MAX, use appropriate value specified under recommended operating conditions.
+AII typical values are at VCC+ = 5 V. VCC- = -5 V, TA = 25°C.

-.J

0

electrical characteristics over recommended operating free-air temperature ,range (unless otherwise noted)

1010n)

o

125

0.8

NOTE 3: When using only one channel of the line drivers. the other channel should be inhibited andlor have its outputs grounded.

VIK

r;.>

V

2
0.8

Operating free-air temperature, TA

~l"'I

'"...

V

0

8.;~
c:~
~Z

V

Positive common-mode output voltage

Low-level input voltage, VIL

C!l

UNIT

SN75112

6.5

UNIT

TVP*

MAX

-1.5

-0.9

-1.5

15

27

36

12

MIN

18

27

100

100

100

1

1

1

2

2

2

40

40

40

80

80

80

-3

-3

-3

-6

V
rnA

-6

-6

18

30

23

35

25

40

-18

-30

-34

-50

-65

-100

18

21

30

-10

-17

-32

,.Po
rnA

en

,.Po

-

z

--..

UI

CI
ca

:z-

rnA

rnA

rnA

- en
enz

ClZUl
C--..UI
:Z-UlI""'_CI
_ca
!::CI:ZZ

:z--

m- en
Cl enz

::aZUl
_ --.. UI

m-o;t

3

2

1 20 19

4

18

NC

6

16

17
15
14

3Z
3Y

9 1011 12 13

«DU 1«
'" Z Z UC'l
(9
U
>
NC - No internal connection

logic symbol t

1Y

lZ
2Y

All inputs are diode clamped and are designed
to satisfy TTL-system requirements, The inputs
are tested at 2 V for high-logic-level input
conditions and 0.8 V for low-logic-level input
conditions. These tests guarantee 400 mV of
noise margin when interfaced with Series 54/74
TTL.
The SN55111 is characterized for operation from
-55°e to 125°e, The SN75111 is characterized for operation from ooe to 70 oe.

>lZ

All outputs should be maintained within the
recommended common-mode output voltage
range to ensure that the channels do not interact
with each other. To minimize power dissipation,
all unused inputs should be grounded,

PRooucnON DATA d...IIIDts .ontain ioformatlon
•• rnnt IS of publication data. Praduots .onfarm to
spooifioatlo•• per tho term. of Tu•• Instruments

VCC+
4A
4Y
4Z
3Z
3Y
3A
VCC-

2Z

3Y
3Z
4Y
4Z

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEG Publication 617-12.
Pin numbers shown are for D, J, and N packages.

Copyright @ 1986, Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75266

2-111

SN55111, SN75111
QUADRUPLE LINE DRIVERS WITH COMMON ENABLES
FUNCTION TABLE
OUTPUT

LOGIC

ENABLE

INPUT

INPUT

Z

Y

H

H

ON

OFF

CURRENT

L

H

OFF

ON

H

L

OFF

OFF

L

L

OFF

OFF

L = low logic level
H = high logic level

logic diagram (positive logic)
ENABLE

1Y

1A----i--t

1Z

2Y
2Z

3Y

(10)

3A----if-l
3Z

4Y

(15)

4A --'----------I
4Z

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS
.---------- OUTPUT

Vcc+ -----e---

INPUT ....._

.....-I

L -_ _ _ _ _ OUTPUT

Vcc_~----4~----

--e---l~----- VCC-

GNO-4>----

TEXAS •
INSTRUMENTS
2-112

POST OFFICE BOX 866303 • DALLAS, TEXAS 75285

SN55111, SN75111
QUADRUPLE LINE DRIVERS WITH COMMON ENABLES
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc + (see Note 1) .................................. . . . . . . . . . .. 7 V
Supply voltage, VCC _ ..................................................... - 7 V
Input voltage (any input) .................................................... 5.5 V
Output voltage range (any output) ..................................... "
- 5 V to 12 V
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN55111 ........................ "
- 55°C to 125°C
SN75111 ............................. ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Case temperature for 60 seconds: FK package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package ........ 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............ 300°C
NOTE 1: All voltage values are with respect to network ground terminal.

DISSIPATION RATING TABLE
PACKAGE

TA '" 25°C
POWER RATING

D
FK

J (SN55111)
J (SN75111)
N

950 mW
1375 mW
1375 mW
1025 mW
1150mW

DERATING FACTOR
ABOVE TA - 25°C
7.6 mW/oe
11.0mW/oC
11.0 mW/oe

TA - 70°C
POWER RATING
608 mW
880mW

TA - 85°C
POWER RATING
N/A
275 mW

880 mW
656 mW

275 mW
N/A
N/A

8.2 mW/oe
9.2 mW/oe

736 mW

recommended operating conditions (see Note 2)

Supply voltage, Vee +

TA
TA

Supply voltage, Vee-

TA
TA

~

<
~

<

25°e
25°e

MIN
4.5
4.75
-4.S

25°e
2soe -4.75

High-level input voltage, VIH

SN55111
NOM MAX
5
5
-S
-5

2
0

Low-level input voltage, VIL
IVOeR+
IVOeR-

Common-mode output voltage range

Operating free-air temperature, TA

0
0
-55

SN75111
MIN
4.75
4.75

5.5
5.5
-5.S -4.75
-5.5 -4.75
5.5

2

0.8
10
-3

0
0

125

0
0

NOM

MAX
5.25

5
5
5.25
-5 -5.25
-5 -5.25

5.5
0.8
10

-3
70

UNIT
V
V
V
V
V
°e

NOTE 2: All unused outputs should be grounded.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-113

SN55111, SN75111
QUADRUPLE LINE DRIVERS WITH COMMON ENABLES
electrical characteristics over recommended operating free-air temperature range,
VCC - .. MAX (unless otherwise noted)
VIK

PARAMETER
Input clamp voltage

10(on) On-state output current
IOloffl Off-state output current

TEST CONDITIONst
II

=

MIN

= MAX,

VCC-

VCC+ = MIN,
VCC+ - MIN,
VI = 2.4 V

VCC-

= MAX
= MIN

3.5

IIH
IlL

Low-level input current

VI = VCC+ MAX
VI - 0.4 V

ICC+

Supply current from V CC +

A inputs at 0.4 V

Enable at 2 V
Enable at 0.4 V

A inputs at 0.4 V

Enable at 2 V
Enable at 0.4 V

Supply current from VCC-

MAX
-1.5

5.5
5.5

7
100
40
1
-1.6

VCC- - MIN, Va - 10V

High-level input current

ICC-

Typt
-0.9

-12 mA

VCC+

Vcc + ..

28

40

27
-43
-25

40
-55
-35

MAX,
UNIT
V
mA
I'A
pA
mA
mA
mA
mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
tAli typical values are at VCC+ = 5 V, VCC- = -5 V, and TA = 25°C.

switching characteristics. VCC+ '" 5 V. VCCPARAMETER
tpLH
tpHL

Propagation delay time, low-to-high-Ievel output
Propagation delay time, high-to-Iow-Ievel output

tpLH
tpHL

Propagation delay time, low-to-higli-Ievel output
Propagation delay time, high-to-Iow-Ievel output

=

-5 V. RL - 50 D. CL '" 40 pF. TA = 25°C

FROM
(INPUT)

TO
(OUTPUT)

A

Yor Z
YorZ

A
Enable
Enable

YorZ
Yor Z

TEST
CONDITIONS

See Figure 1

TEXAS ",
INSTRUMENTS
2-114

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

MIN

TYP

MAX

9
7

15

14
15

15
25
25

UNIT
ns
ns
ns
·ns

SN55111, SN75111
QUADRUPLE LINE DRIVERS WITH COMMON ENABLES
PARAMETER MEASUREMENT INFORMATION
AINPUT------------~

r-----~t---~_---

ENABLE - - - - - - - - - - - - - ,

10-------....----_---

OUTPUT V

OUTPUT Z

=
TEST CIRCUIT

A INPUT

..Is::'\..
----I:
~~ __
50%

J

~----OV

!4-'w1-t>t
I

1

I

1
5:5-""'\.
---+1---:l

if---.w2----.t

1

---+1

ENABLE

I

I

I
I

I
I

1

I

'PLH~
I
I
I
OUTPUT V

I

I ,--- 3 V

'------.1--:----I

~'PHL

I

_-----...--1- -- off

I

I

I

I

I

OV

I4-*'PHL

I
I

on

F--(f~~------------------

off

I
-1________________

on

OUTPUT Z
I

I
I
'PHL --It-+I

k-.!-tPLH
VOLTAGE WAVEFORMS

NOTES: A. The pulse generators have the following characteristics:
tw2 ,. 1 p.O, PRR ,. 500 kHz.
B. CL includes probe and jig capacitance.

Zo

= 50 II, tr = tf = 10 ± 5 ns, tw 1 ,. 200 ns, PRR ,. 1 MHz,

FIGURE 1. PROPAGATION DELAY TIMES

TEXAS

..If

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 76265

2-115

2-116

SN55113, SN75113
DUAL DIFFERENTIAL LINE DRIVERS
01315. SEPTEMBER 1973-REVISED SEPTEMBER 19B6

•

Choice of Open-Collector, Open-Emitter, or
3-State Outputs

•

High-Impedance Output State for Party-Line
Applications

•

Single-Ended or Differential AND/NAND
Outputs

SN55113 ... J PACKAGE
SN75113 ... D. J. OR N PACKAGE
(TOP VIEW)
lZP

VCC
2ZP

1ZS
1YS

2ZS

1YP

2YS

•

Single 5-V Supply

1A

2YP

•

Dual Channel Operation

18

2A

•

Compatible With TTL

•

Short-Circuit Protection

•

High-Current Outputs

•

Common and Individual Output Controls

2C

GND

CC

SN55113 ... FK PACKAGE
(TOP VIEW)

•

Clamp Diodes at Inputs and Outputs

•

Easily Adaptable to SN55114 and SN75114
Applications

•

1C

3

1 20 19
18

4
5

17

2YS

NC

6

16

NC

1A

7

15

2YP

18

8

14

2A

Designed for Use With SN55115 and
SN75115

description

2ZS

9 1011 1213

The SN 55113 and SN7 5113 dual differential line
drivers with 3-state outputs are designed to
provide all the features of the SN55114 and
SN75114 line drivers with the added feature of
driver output controls. Individual controls are
provided for each output pair, as well as a
common control for both output pairs. If any
output is low, the associated output is in a highimpedance state and the output can neither drive
nor load the bus. This permits many devices to
be connected together on the same transmission
line for party-line applications.
The output stages are similar to TTL totem-pole
outputs, but with the sink outputs, YS and ZS,
and the corresponding active pull-up terminals,
YP and ZP, available on adjacent package pins.
The SN55113 is characterized for operation over
the full military temperature range of - 55°C to
125°C. The SN75113 is characterized for
operation over the temperature range of 0 °C to
70°C.

UOUUU
~ZZUN

(!)

NC - No internal connection

FUNCTION TABLE
INPUTS

not

DATA

OUTPUTS
AND
NAND

OUTPUT

CONTROL

C

CC

A

at

Y

z

L

X

X

L

X
X

Z
Z

Z
Z

H

H

L

X
X
X

L

H

H

H

X

L

H

H

H

H

L
H

H

L

H = high level. L = low level. X = irrelevant,
Z = high impedance (off)
ta input and 4th line of function table are applicable only
to driver number 1.

PRODUCTION DATA documents contein information

currant as of publication date. Products conform to
spacifications per the terms of TexIS Instruments

::~:~~i~at::1~1~ =~::i:; :,~o:~::~as

2

1YS
1YP

Copyright © 1986, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-117

SN55113, SN75113
DUAL DIFFERENTIAL LINE DRIVERS
logic diagram (positive logic)

logic symbol t
1C (7)

&
EN 1

CC
2C

1YP
1YS
1ZP
1ZS

1A
1B

1A

= __r - -.. L--l

2YP
2YS
2ZP
2ZS
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for Dr J. and N packages.

schematic
INPUT 1B
(6)

INPUT 1A
(51

r-~--~--~---~r----'---~-~~(t~6~)

AND (4)
PULL·UP
tvP

(1)

AND
SINK (31
OUTPUT
tvS

(2)

OUTPUT (7)
CONTROL
1C

=---+-+

W... Vee

bus

tThese components common to both drivers.
Resistor values shown are nominal and in ohms.

TEXAS •
INSTRUMENTS
2-118

POST OFFICE BOX 855303 • DALLAS, TEXAS 75265

Vee

NAND
PULL·UP
1ZP

NAND
SINK
OUTPUT
1ZS

SN55113, SN75113
DUAL DIFFERENTIAL LINE DRIVERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Off-state voltage applied to open-collector outputs ................................. 12 V
Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN55113.......................... - 55°C to 125°C
SN75113 ............................. 0°Cto70oC
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package. . . . . . . .. 260°C
Case temperature for 60 seconds: FK package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package. . . . . . . . . . . .. 300°C
NOTES: 1. All voltage values are with respect to network ground terminal.
2. In the J and FK packages, SN55113 chips are alloy mounted; SN75113 chips are glass mounted.

DISSIPATION RATING TABLE
PACKAGE

TA

s

25·C

DERATING FACTOR

POWER RATING

TA - 70·C
POWER RATING

TA - 125°C
POWER RATING

D

950 mW

ABOVE TA - 25°C
7.6 mW/oe

608 mW

N/A

FK

1375 mW

11.0 mW/oe

880 mW

275 mW

J (SN55113)
J (SN75113)
N

1375 mW

11.0 mW/De
8.2 mW/De
9.2 mW/oe

880mW

275 mW

656 mW

N/A

736 mW

N/A

1025 mW
1150mW

recommended operating conditions
SN55113
Supply voltage, Vee

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

High-level input voltage, VIH

2

Low·level input voltage, Vil
High-level output current, IOH

low-level output current, IOL
Operating free-air temperature, T A

SN75113

MIN

2
0.8

0.8

-40

-40

40
-55

125

40
0

70

UNIT
V
V
V
mA
mA
DC

TEXAS •
INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS, TeXAS 75265

2-119

SN55113, SN75113
DUAL DIFFERENTIAL LINE DRIVERS

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)

VIK

Input clamp voltage

VOH

High~level

output voltage

Vce = MIN,

II = -12mA

Vee = MIN,

VIH = 2 V,

VIL - O.B V

output voltage

VOL

low~level

VOK

Output clamp voltage

Vee = MIN,

VIH = 2 V,

VIL - O.B V,

10L = 40 mA

Vee = MAX,

MAX

-0.9

-1.5

2

3.0

2

3.0

TA

=

0.23

0.4

V

-1.1

-1.5

-1.1

-1.5

V

1

10
200
1

±10
-20

Vo = 0.4 V

±80

±20

Vo = 2.4 V

±80

±20

80

20

at O.B V

input voltage
IIH

IlL

A, B, e

A, B, e

input current

ee

Low-level

A, B, e

input current

ee

Vee = MAX,

Vee = MAX,

output current §
Supply current

ICC

. (both drivers)

"A

1

2

2

~

mA

VI = 2.4 V

VI - 0.4 V

Short-circuit
lOS

1
VI = 5.5 V

ee

High-level

10
20

±10

output current

Vee = MAX,

V

-150

Output controls

V

0.4

Vo - 0 to Vee

(high-impedance-state)

UNIT

0.23

70°C

Vo = 0

at maximum

-1.5

10H = -40mA

Vo - Vee
II

-0.9
3.4

Vee = MAX,
TA - MAX

MAX

2.4

TA = 25"e

TA = 25"e,

TYP;

3.4

Off-state

Input current

MIN

2.4

TA = 125"e

VOH - 5.25 V

10Z

SN75113

TYP;

10H = -10mA

TA = 25"e

Vee = MAX

output current

MIN

10=-40mA
VOH = 12V

Off-state open-collector
1010ff)

SN55113

TEST CONDITIONS t

PARAMETER

=

40

80

80

-1.6

-1.6

-3.2

-3.2

Vee = MAX,

Vo - 0,

TA

-90

-120

-90

-120

All inputs at 0 V,

No load.

Vee = MAX

47

65

47

65

Vee - 7 V

65

85

65

85

TA - 25"e

-40

40

25°C

-40

~

mA

mA

mA

tAli parameters with the exception of off-state open-collector output current are measured with the active pull-up connected to the sink output.
tAli typical values are at TA == 25°e and Vee == 5 V, with the exception of ICC at 7 V.
§Only one output should be shorted at a time, and duration of the short-circuit should not exceed one second.

switching characteristics. Vee = 5 V. eL - 30 pF. TA
PARAMETER

=

TEST CONDITIONS

25°e
SN55113
MIN

MAX

13

20

12

See Figure 2

.

MAX

13

30

ns

20

12

30

ns

7

15

7

20

ns

See Figure 3

14

30

14

40

ns

See Figure 2

10

20

10

30

ns

RL = 250 0, See Figure 3

17

35

17

35

ns

Propagation delay time, low-to-high-Ievel output

tpHL

Propagation delay time, high-to-Iow-Ievel output

tpZH

Output enable time to high level

RL

ipZL

Output enable time to low level

RL

tpHZ

Output disable time from high level

RL

tpLZ

Output disable time from low level

See Figure 1

=
=
=

n,
250 n,
180 n,
180

TEXAS . . ,
INSTRUMENTS
POST OFFICE BOX ~55303 • DALLAS. TEXAS 75266

MIN

UNIT

TYP

tpLH

2-120

SN75113

TYP

SN55113 r SN75113
DUAL DIFFERENTIAL LINE DRIVERS

PARAMETER MEASUREMENT INFORMATION
lk.!l

5 V ---'IM~H-I
AND

INPUT

~--"'-OUTPUT

PULSE
GENERATOR
(Se. Note A)

I

I
L

50.!l

NAND

~IL--""'-OUTPUT

-- ----

--'

CL = 30 pF

-:;;J;' (S.eNoteS)

TEST CIRCUIT

---I

-+I

:
J(

14-";5 ns

190%

I

INPUT

10%

I

NAND
OUTPUT

I

I

\5V

I
tPLH

14

I
tPHL

~

10%

OV

I t
I4r--v."~;i-;~PL~H!......_

I

I

VOH

/1.5V

\..·----+-I-J
I.. ~I

oJ!..

OU::U~ ____

3V

I

1.5V

~

I..

t-------

90%1I

1.5V

I

1+-";5 ns

1

----VOL

\-= ~ ---'.'

.

tpHL

.....----VOL
WAVEFORMS

FIGURE 1. tPLH and tPHL
NOTES: A. The pulse generator has the following characteristics: Zo = 50 Il, PRR " 500 kHz, tw = 100 ns.
B. CL includes probe and jig capacitance.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-121

SN55113, SN75113
DUAL DIFFERENTIAL LINE DRIVERS

PARAMETER MEASUREMENT INFORMATION
INPUT

PULSE
GENERATOR
(See Note A)

AND

~----~----------OUTPUT

NAND
~----~----------OUTPUT

5V

CL = 30 pF
~ (See Note B)

1 kll

TEST CIRCUIT

.. 5

14-

ns-.j

:r.::=---=~I·--I-90%
90%
I -- -- 3 V
INPUT

I

I

",""'O%",,,-_ _ OV

I

~tPZH

I
OUTPUT

r--~--.

____J.5V
.

i

--*-VOH

}-~

tPHZ~ ~

voff'"OV

WAVEFORMS

FIGURE 2. tpZH and tpHZ
NOTES: A. The pulse generator has the following characteristics: Zo = 50 Il, PRR
B. CL includes probe and jig capacitance.

s

500 kHz, tw = 100 ns.

TEXAS ."

INSTRUMENTS
2-122

POST OFFICE BOX 656303 • "DALLAS, TEXAS 75265

SN55113, SN75113
DUAL DIFFERENTIAL LINE DRIVERS

PARAMETER MEASUREMENT INFORMATION

PULSE
5V
~r---~----------,AND

5V

2500

UTPUT

OUTPUT

I
I

OUTPUT

J
CL=30pF
,
'J;' (See Note B)
I
L __________ ..:. _____ J
L

I

- - - - - -

TEST CIRCUIT

INPUT

I
!+-tPZL

I

-+I

\

OV

I

I

I

I

I

I

OUTPUT

10%

I

(

I

~

......5_V
_ _I4__tP_L_Z_-+l
...
-

-

5V

~-VOL

WAVEFORMS

FIGURE 3. tpZL and tPLZ
NOTES: A. The pulse generator has the following characteristics: Zo = 50
B. CL includes probe and jig capacitance.

n,

PRR '" 500 kHz, tw = 100 ns.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-123

8N55113.8N75113
DUAL DIFFERENTIAL LINE DRIVER8

TYPICAL CHARACTERISTICS t
OUTPUT VOLTAGE
vs
DATA INPUT VOLTAGE

OUTPUT VOLTAGE
vs
DATA INPUT VOLTAGE

6

6

No load
TA=25"e

5

>I

..'"

5

>I

Vee = 5.5 V

4

Vee=5V
Vee = 4.5 V

"0

'$ 3

TA = 125°e

& 4

~

~

>

"0

>

'5 3

13-

...a.

0

0
I 2
0

9"

Vee=5V
No load

\TA=25°e

"

2

TA = _55°c

>

>

o
o

o

2

4

3

o

2

OUTPUT VO LT AG E
vs
OUTPUT CONTROL VOLTAGE

OUTPUT VOLTAGE
vs
OUTPUT CONTROL VOLTAGE

6

Load = 500 n to ground
TA = 25°C

'"

4

..."

>I

..'"

I

°
TA=125e
/

4

"0

'\

>

VCC= 4.5 V

3

'5a. 3

1\

...

a.

"

"

0
I
0

2

>

2

DISABLED

DISABLED

HIGH

I

i\
°e
T';\o=25

TA=-55 e

>

o
o

I

~

Vec=5V

"0

0
I
0

I

Load = 500 n to ground

VCC=5.5V_ r - -

~

....>

ve~=5V

5

5

=t..

4

FIGURE 5

FIGURE 4

6

3

VI-Data Input Voltage-V

VI-Data Input Voltage-V

I

HIGH

I
2

3

4

o
o

2

3

4

VI-Input Voltage (Output eontroll-V

VI-Input Voltage (Output Controll-V

FIGURE 6

FIGURE 7

toata for temperatures below O°C and above 70°C and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55113
circuits only. These parameters were measured with the active pull·up connected to the sink output.

TEXAS ...,
INSTRUMENTS
2-124

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN55113. SN75113
DUAL DIFFERENTIAL LINE DRIVERS

TYPICAL CHARACTERISTICSt
OUTPUT VOLTAGE
vs
OUTPUT CONTROL VOLTAGE

6

6

Load = 500 n to VCC
TA = 25°C

Vcc = 5.5 V
VCC=5V

5

OUTPUT VOLTAGE
vs
OUTPUT CONTROL VOLTAGE
Load = 500
VCC=5V

n to VCC

5

VCC=4.5V

>I

.,
...'"

.

>I

.,

4

'"
i!

0

VTA = 25°C

0

>

'5 3
So

"

0
I
0

2

>

DISABLED

o

l*-

>

'5 3
So

9"0

4

2

>

LOW

TA

o

3
2
VI-Input Voltage (Output Controll-V

4

5
VCC= 4.5 V

3.6

~ 2.4

~
'5

--

VOHUOH = -10 mA1--

2.8

2.0

J---

-- --

r-r-

4

>I

.,
i!'"
0
>
...
"
So
0"
I

i-- -VOHUOH = -40 mAl

a.

~

i

1.6

I

01.2

3

2

-TA = 25°C

------

VCC=5.5V

t---. LV~C=5V

-----

r--... ---"':fZ.....
-.....:. r-...'
----,- t--...'
VCC=4.5 V

0

\

>

0.8

o

\

:I:

>

0.4 -

4

2
3
VI-Input Voltage (Output Controll-V

HIGH-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

4.0

3.2

LOJ

FIGURE 9

OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

&

I

DIS~BLE~

o
o

FIGURE 8

=t

TA = -55°C

=~25°~

r-VOLUOL - 40 mAl

I

-75 -50 -25

0

25

50

75

100

125

o

o

-20

TA-Free-Air Temperature-oC

-40

-60

-80

-100 -120

IOH-Output Current-mA

FIGURE 10

FIGURE 11

tOata for temperatures below ooe and above 70 e and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55113
circuits only. These parameters were measured with the active pull-up connected to the sink output.
0

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75266

2-125

SN55113, SN75113
DUAL DIFFERENTIAL LINE DRIVERS.
TYPICAL CHARACTERISTICS t
SUPPLY CURRENT
(BOTH DRIVERS)
vs
SUPPLY VOLTAGE

lOW-lEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT
0.6

80

1 °
TA= 25 C

0.5

l'.,

VCC=4.5~

0.4

0.3

~
::I

9

A

0.2

..J

~

0.1

o

~

[7
o

/

1/

V

«E

60

E

50

A
.:>('~l#

I

~

!'

~..

N~ load I
70 I- TA = 25°C

/~

VCC=5.5V

::I

U

>-

ii
a.
::I

'fu

V

~..o

,

40

,~q

30

!d 20

40
60
80
100
IOl-Output Current-rnA

o

120

./

o

ii
a.
::I

100

VCC=5V
54 I nputs grounded
No load
52

'fu

!d

«

7

8

VCC=5V
Rl =00
Cl = 30pF
Inputs: 3-volt square wave
TA = 25°C

80

E

50

...cI
1'---..

45

/

SUPPl Y CURRENT
(BOTH DRIVERS)
vs
FREQUENCY

56

~

V

FIGURE 13

FIGURE 12

~ 48
::I
u
>- 46

.:>~

2
4
5
3
6
VCC-Supply Voltage-V

SUPPLY CURRENT
(BOTH DRIVERS)
vs
FREE-AIR TEMPERATURE

«
E
.!.c

~

0<1

~ ,~q

10
20

.:>~

~

~

1/11

60

V

::I

U

~

>-

ii
a.

"'"

42

::I

40

'fu

"- ........

!d

40

20

38
36
-75 -50 -25

0

25

50

75

100

125

o

0.1

TA-Free-Air Temperature-DC

0.4

4
10
f-Frequency-MHz

40

100

FIGURE 15

FIGURE 14

tOata fo;temperatures below oDe and above 70 0C and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55113

circuits only. These parameters were measured with the active pull-up connected to the sink output.

TEXAS . "

2-126

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 7526.6

SN55113, SN75113

DUAL DIFFERENTIAL LINE DRIVERS
TYPICAL CHARACTERISTICSt
PROPAGATION DELAY TIMES
FROM DATA INPUTS

20

f

:l 18
"'I:
16

"

~ 14
C
E
~

vs

FREE·AIR TEMPERATURE

FREE·AIR TEMPERATURE

a;

C

30

Vee- 5V
eL = 30 pF
See Figure 1

......

12

tpLH
tPHL

o

E
~

OUTPUT ENABLE AND DISABLE TIMES

vs

- --

- -- f.---'

10

..E~

V

Vee = 5 V
See Figures 2 and 3
25

~

20

C
-c

15

/""

tPLZ

~

tP~z

..

8

:is

:l!

6

UJ

4

So

10

tpZH

...

o=

2

o

-75 -50 -25

o

25

50

75

100 125

-- -

-~ ----

I:

co

,./'

~

f---

5

o

-75 -50 -25

TA-Free·Air Temperature-Oe

o

25

50

75

100

125

TA-Free·Air Temperature-Oe

FIGURE 17

FIGURE 16

tData for temperatures below DOC and above 7DoC and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55113
circuits only. These parameters were measured with the active pull-up connected to the sink output.

APPLICATION INFORMATION

=a
=D-

tRT

= Zoo

TWISTED
PAIR
SN75113 DRIVER

SN75115 RECEIVER

A capacitor may be connected in series with RT to reduce power dissipation.

FIGURE 18. BASIC PARTY-LINE OR DATA-BUS DIFFERENTIAL DATA TRANSMISSION

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-127

2-128

SN55114, SN75114
DUAL DIFFERENTIAL LINE DRIVERS
D1315, SEPTEMBER 1973-REVISED SEPTEMBER 1986

•

Choice of Open-Collector. Open-Emitter. or
Totem-Pole Outputs

•

Single-Ended or Differential AND/NAND
Outputs

•

Single 5-V Supply

•

Dual-Channel Operation

•

TTL-Compatible

•

Short-Circuit Protection

•

High-Current Outputs

•

Triple Inputs

•

Clamp Diodes at Inputs and Outputs

•

Designed for Use with SN55115 and
SN75115 Differential Line Receivers

SN55114 ... J PACKAGE
SN75114 ... D. J, OR N PACKAGE
(TOP VIEW)

lZP
lZS
lVS
lYP
lA
1B
lC

VCC
2ZP
2ZS
2YS
2VP
2C
2B
2A

GND

SN55114 ... FK PACKAGE

•

nop

3

VIEW)

2 1 20 19
18
17

Designed to Be Interchangeable with
Fairchild 9614 Line Driver

16

15

description

14

The SN55114 and SN75114 dual differential line
drivers are designed to provide differential output
signals with the high-current capability for
driving balanced lines, such as twisted pair, at
normal line impedances without high power
dissipation. The output stages are similar to TTL
totem-pole outputs, but with the sink outputs,
YS and ZS, and the corresponding active pullup terminals, YP and ZP, available on adjacent
package pins. Since the output stages provide
TTL-compatible output levels, these devices may
also be used as TTL expanders or phase splitters.
The SN55114 is characterized for operation over
the full military temperature range of - 55 °e to
125°e. The SN75114 is characterized for
operation from ooe to 70 oe.

2YP
2C

9 10111213

NC - No internal connection

FUNCTION TABLE
INPUTS
A
H

B
H

OUTPUTS
C
H

All OTHER INPUT COMBINA nONS
H

~

high level, l

~

Y

Z

H

L

l

H

low level

logic diagram (positive logic)
1YP
lA
1YS

logic symbol t
lA
18
lC

2A
28
2C

(5)

&1>

(6)

(7)

(4)
(3)

18--"''----1
1YP
lVS

1ZP
1C

lZS

lZP
lZS

(9)

2VP

(10)

2VS
2ZP

(11)

2YP

2VS
2ZP

2ZS

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.

2ZS
Pin numbers shown are for 0, J, and N packages.
Copyright © 1986. Texas Instruments Incorporated

PRODUCTION DATA documants contain information

currant as of publication data. Products conform to
specifications per the terms of Texas Instruments

::'~::i~ai~:1~1i ~::i~:i~n ~~':~:~~:~ not

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-129

SN55.114, SN75114
DUAL DIFFERENTIAL LINE DRIVERS

schematic (each driver)
TO
OTHER
DRIVER

r-"--1161

Vee

AND
'--_ _....._.,1-"1.'-'1"'51 ~:ND PULL·UP

PULL.~~1",4.,,1:.:2::.11~....._ _- '

+-_-+__r,,""""-.r---,12=<.-,1=41 ~,~~DOUTPUT

AND 13.131
SINK OUTPUT

vs

,81

ZS

GND

Pin numbers shown are for D. J. and N packages
tThese components are common to both drivers.
Resistor values shown are nominal and in ohms.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
SN55114
Supply voltage. Vee (see Note 1)
Input voltage
Off·state voltage applied to open-collector outputs
Continuous total power dissipation (see Note 2)

SN75114

UNIT

7

7

V

5.5

5.5

V

12

12

V

See Dissipation Rating Table
-55 to 125
-65 to 150

Operating free-air temperature range
Storage temperature range

Case temperature for 60 seconds: FK package

260

Lead temperature 1.6 mm (1/16 inchl from case for 60 seconds: J package

300

o to 70

DC

-65 to 150

DC
DC
DC

Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds: D or N package

DC

260

NOTES: 1. Voltage values are with respect to network ground terminal.
2. In the FK and J packages. SN55114 chips are either silver glass or alloy mounted. In the J package. SN75114 chips are glass
mounted.

DISSIPATION RATING TABLE
PACKAGE

TA :5 25 DC

DERATING FACTOR

POWER RATING

TA - 70·C
POWER RATING

TA = 125·C
POWER RATING

D

950 mW

ABOVE TA - 25°C
7.6 mW/Dee

FK

1375 mW

11.0 mW/De

880 mW

275 mW

J (SN55114)
J (SN751151

1375 mW

11.0 mW/De

880 mW

275 mW

1025 mW

8.2 mW/De

656 mw

N

1150mW

9.2 mW/De

736 mW

60B mW

recommended operating conditions
SN55114
Supply voltage. Veel
High-level input voltage. VIH

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

Low-level input voltage. VIL

-55

TEXAS . "
INSTRUMENTS
2-130

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

V

0.8

0.8

V

-40

-40

mA

40

mA

70

°e

40

Low-level output current, tOl

UNIT

V

2

2

High-level output current. IOH

Operating free-air temperature, TA

SN75114

MIN

125

0

SN55114, SN75114
DUAL DIFFERENTIAL LINE DRIVERS

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
TEST CONDITIONSt

PARAMETER
VIK
VOH
VOL
VOK

Input clamp voltage

VCC=MIN,

11= -12 mA

High-level output

VCC=MIN,

VIH=2

voltage

VIL=0.8

v.

1

Low-level output

VCC=MIN,

voltage

VIL =0.8 V, IOL=40 mA

Output clamp voltage

Off-state open-collector

10(oft)

v,l

output current

VCC=5 V,

SN55114
Typt
MAX
-0.9

MIN

SN75114
Typt
MAX
-0.9

-1.5

10H= -10 mA

2.4

3.4

2.4

3.4

10H= -40 mA

2

3

2

3

VIH=2 V,
10=40 mA,

VCC=MAX, 10= -40 mA,
VOH=12V

-1.5

UNIT
V
V

0.2

0.4

0.2

0.45

TA=25°C

6.1

6.5

6.1

6.5

TA=25°C

-1.1

-1.5

-1.1

-1.5

TA=25°C

1

V
V

100
200

TA=125°C

VCC=MAX
VOH=5.25 V

Input current at

MIN

1

TA=25°C

100

TA=70oC

~A

200
mA

VCC=MAX, VI=5.5 V

1

1

IIH

High-level input current

VCC= MAX, VI=2.4 V

40

40

~A

IlL

Low-level input current

VCC=MAX, VI=0.4 V

-1.1

-1.6

mA
mA

II

maximum input voltage

Short-circuit
lOS
ICC

output current §

VCC=MAX, VO=O,

Supply current

All inputs at 0 V, No load,

(both drivers)

TA=25°C

TA=25°C

-40

-1.1

-1.6

-90

-120

-90

-120

37

50

37

50

47

65

47

70

I VCC=MAX
I VCC=7 V

-40

mA

t All parameters with the exception of off-state open-collector output current are measured with the active pullup connected to the sink
output. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
tAli typical values are at TA = 25°C and VCC = 5 V, with the exception of ICC at 7 V.
§Only one output should be shorted at a time, and duration of the short circuit should not exceed one second.

switching characteristics. Vee - 5 V. TA - 25°e
TEST

PARAMETER

CONDITIONS

SN75114

SN55114
MIN

TYP

MAX

MIN

TYP

MAX

UNIT

tpLH

Propagation delay time. low-to-high-Ievel output

CL = 30 pF,

15

20

15

30

ns

tpHL

Propagation delay time, high-to-Iow-Ievel output

See Figure 1

11

20

11

30

ns

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-131

SN55114, SN75114
DUAL DIFFERENTIAL LINE DRIVERS

PARAMETER MEASUREMENT INFORMATION
~

INPUT

VCC=5V

~s5ns

: ~90%
~
10%
I

y

2k.ll

INPUT

1.5V,

tw----1~"'

101

y

x---

...
j4-....~~tpLH

:

:

I

z

I

JI,.5 V

/.

I

CL = 30 pF

OV

,

1414---1~~I-tPLH

OUTPUT

~ (See Not. B)

~s5ns

90%tr'
-:----3V
I 10%

1.5V

I

AND OUTPUT

Z
NAND OUTPUT

~

1.5

"

VOH

"---VOL

,

tPLH_'41---y-"~1 VOH

OUTPUT:

\5V

tpHL~'41----I~~1
TEST CIRCUIT

1.57

------

-

-

VOL

VOL TAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: Zo = 500 0, PRR
B. CL includes probe and jig capacitance.

s

500 kHz, tw

s

100 ns.

FIGURE 1. PROPAGATION DELAY TIMES

TYPICAL CHARACTERISTICSt
OUTPUT VOLTAGE
vs
DATA INPUT VOLTAGE

6

OUTPUT VOLTAGE
vs
DATA INPUT VOLTAGE

6

No load
TA = 25"e

5

5

Vee=5V
No load
TA = 125°e

Vee=5.5V
Vee=5V
Vee = 4.5 V

\

TA=25°e

TA=-55°e

o

o

2

3

2

4

VI-Data Input Voltage-V

3

4

VI-Data Input Voltage-V

FIGURE 2

FIGURE 3

above 70°C and for supply volt~ges below 4.75 V and above 5.25 V are applicable to SN55114
circuits only. These parameters were measured with the active pullup connected to the sink output.

t Data for temperatures below 0 °C and

TEXAS •
INSTRUMENTS
2·132

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN55114. SN75114

DUAL DIFFERENTIAL LINE I)RIVERS
TYPICAL CHARACTERISTICS t
HIGH-LEVEL OUTPUT VOLTAGE

LOW-LEVEL OUTPUT VOLTAGE

vs

vs

OUTPUT CURRENT

OUTPUT CUR RENT
0.4

5

---- -,--TA = 25°C

TA=25°C

VCC= 5.5 V

4

J

r-r-r-- r--

VCC=5.5 V

.,
I

VCC=5 V

K
~

~

'15

r-...\

>

r--"

e9"

VCC=4.5V

IA

> 0.3

S

\

0.2

/

...J

~

~0.1

/

/

o

o
o

-20

-40

-60

-80

-100

-120

o

V

V

~
VCC = 4.5 V

V

'"
10

20

30

40

50

60

70

80

IOL -Output Current-rnA

IOH-Output Current-rnA

FIGURE 5

FIGURE 4

PROPAGATION DELAY TIMES

OUTPUT VO LT AG E

vs

vs

FREE-AIR TEMPERATURE

FREE-AIR TEMPERATURE
40

4.0
VCC= 4.5 V
3.6

-- - - - -

3.2

~

!----

&

~ 2.4

~
S 2.0

r.,

_t-'

VOHUOH = -10 rnA~

2.8

~ 1.6

30

E

r----

j::

>
IV

C--VOH(lOH = -40 rnA)

a.

VCC=5V
See Figure 1

.,/

CD
C 20

~

I:

0

.~

I

'"a.
IV

01.2

>

2 10

o

tPHL

II.

0.8
0.4

,..,-/

-

-

i

r-VOL(lOL - 40 rnA)

o

I

-75 -50 -25

0

25

50

75

100

125

-75 -50 -25

0

25

50

75

100 125

T A -Free-Air Ternperature-OC

TA-Free-Air Ternperature-OC

FIGURE 7

FIGURE 6

t Data for temperatures below ooe and above 70 0 e are applicable to SN55114 circuits only. These parameters were measured with the
active pullup connected to the sink output.

TEXAS

-II

INSTRUMENTS
POST OFFICE BOX 855303 • DAllAS. TeXAS 75265

2-133

SN55114, SN75114
DUAL DIFFERENTIAL LINE DRIVERS
TYPICAL CHARACTERISTICSt
SUPPLY CUR R'ENT
(BOTH DRIVERS)

SUPPLY CURRENT
(BOTH DRIVERS)

vs

vs

SUPPLY VOLTAGE

FREE-AIR TEMPERATURE

80

42

No load
70 TA = 25·e

«

E

Vce=5V
I nputs grounded
40 Outputs open

«
E
.!.c 38

60

I

1: 50

~
V·

2!

~
CJ 40

~o~

~'\.~r:>

>

\~~

Ii

§' 30

~

20

,/

""" """ "-

Ii
a.

"
'134
~

,

(

10

o
o

~~

~'\.~O

\~~

'1

-......

~

r;." 36

32

~

/

2

3

4

5

6

7

30
-75 -50 -25

8

0

25

50

75

100 125

TA-Free-Air Temperature-·e

vee-Supply Voltage-V

FIGURE 8

FIGURE 9
SUPPLY CURRENT
(BOTH DRIVERS)

vs
FREQUENCY
100

~1:

Vec=5V
RL = 00
CL = 30 pF
80
Inputs: 3-volt square wave
TA = 25·C

~ 60

(3

1/
.,/

>

8:
'1"

~

40

20

o

0,1

0.4

4
10
f-Frequency-MHz

40

100

FIGURE 10
t Data for temperatures below aoe and above 70°C are applicable to SN55114 circuits only. These parameters were measured with the
active pullup connected to the sink output.

TEXAS •
INstRUMENTS
2-134

POST OFFICE BOX 856303 • DALLAS. TEXAS 75265

SN55114. SN75114
DUAL DIFFERENTIAL LINE DRIVERS

APPLICATION INFORMATION t
1/2 SN75114
DRIVER

1/2 SN75115
RECEIVER

rI

r- -

I

I
L_

-,

L_

_.J

_.J

TWISTED
PAIR

t RT = ZOo A capacitor may be connected in series with RT to reduce power dissipation.

FIGURE 11. BASIC PARTY-LINE OR DATA-BUS DIFFERENTIAL DATA TRANSMISSION

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-135

2-136

SN55115, SN75115
DUAL DIFFERENTIAL LINE RECEIVERS
01315, SEPTEMBER 1973-REVISED OCTOBER 1986

•

Choice of Open-Collector or Active Pull-Up
(Totem-Pole) Outputs

•

Single 5-V Supply

•

Differential Line Operation

•

Dual-Channel Operation

•

TTL Compatible

•

± 15 V

•

Optional-Use Built-In 130-0 Line-Terminating
Resistor
Individual Frequency Response Controls

•

Individual Channel Strobes

•

(TOP VIEW)

lYS
lYP
lSTRB
lRTC
lB
lRT
lA
GND

Common-Mode Input Voltage Range

•

•

SN55115 ... J PACKAGE
SN75115 ... D. J. OR N PACKAGE

VCC
2YS
2YP
2STRB
2RTC
2B
2RT
2A

SN56115 ... FK PACKAGE
(TOP VIEW)

"- U)
UU)
>->-UU>-

Designed for Use With SN55113,
SN75113, SN55114, and SN75114 Drivers

~Z>N

3

Designed to Be Interchangeable With
Fairchild 9615 Line Receivers

lSTRB
lRTC
NC
lB
lRT

description
The SN55115 and SN75115 dual differential line
receivers are designed to sense small differential
signals in the presence of large common-mode
noise, These devices give TTL-compatible output
signals as a function of the differential input
voltage. The open-collector output configuration
permits the wire-ANDing of similar TTL
outputs (such as SN5401/SN7401) or other
SN55115/SN75115 line receivers, This permits
a level of logic to be implemented without extra
delay. The output stages are similar to TTL
totem-pole outputs, but with sink outputs, 1YS
and 2YS, and the corresponding active pull-up
terminals, 1YP and 2YP, available on adjacent
package pins, The frequency response and noise
immunity may be provided by a single external
capacitor. A strobe input is provided for each
channel. With the strobe in the low level, the
receiver is disabled and the outputs are forced
to a high level.

2

1 2019

4
5

18

6

16
15

17

7

14

8

2YP
2STRB
NC
2RTC
2B

9 10111213
I_ZZNtt:

<{ClU<{

t:l

N

NC - No internal connection

FUNCTION TABLE
STROBE

DIFF

OUTPUT

INPUT

(YP AND YS TIED TOGETHER)

L

X

H

H

L

H

H

H

L

H ~ VI "' VIH min or VIO more positive than VTH max
L = VI s VIL max or VIO more negative than VTL max
X = irrelevant

The SN55115 is characterized for operation over
the full military range of - 55°C to 125°C. The
SN75115 is characterized for operation from
ooe to 70°C.

PRODUCTION DATA d.cumenlS c.ntain informati.n
curnnt as of publication datB. Products conform to
specifications par the tarms of TaXIS Instruments

:::~:~~i~ai~:1~1i

=:::i:; lI~a::;:::!I.t:~~ not

TEXAS

~

Copyright © 1986, Texas Instruments Incorporated

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-137

SN55115, SN75115
DUAL DIFFERENTIAL LINE RECEIVERS
logic symbol t
1B
1A
1RT

logic diagram (positive logic)

(51

1YP
1YS

1STRB
1RTC
2B
2A

2YP
2YS

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEG Publication 617-12.

schematic (each receiver)

STROBE
(3,13)

RT

(6,10)
lk

1.Sk

RESPONSETIME
CONTROL
14.12)

lk

1.64k

INPUT",17",.9",1"'_~>-l_ _-+-+-l

A

~

3k
INPUT (5,11)
B

130
'.5 k

L-_~~

_ _ _ _ _ _ _+-___

COMMON TO

r-------,I
I
BOTH RECEIVERS

I
I
I
I

I
I

I
I
I
I
I

I

IL _______ JI
Pin numbers shown are for 0, J, and N packages.
Resistor values are nominal and in ohms.

TEXAS •
INSTRUMENTS
2-138

POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

~~_~181'GND

SN55115, SN75115
DUAL DIFFERENTIAL LINE RECEIVERS
absolute maximum ratings over operating' free-air temperature range (unless otherwise noted)
SN55115

SN75115

UNIT

7

7

V

Input voltage at A, B, and RT inputs

±25

±25

V

Input voltage at strobe input

5.5

5.5

V

Off-state voltage applied to open-collector outputs

14

14

V

Supply voltage, VCC (see Note 1)

Continuous total power dissipation (see Note 2)
Operating free-air temperature range

See Dissipation Rating Table
-55 to 125
o to 70

Storage temperature range

-65 to 150

Case temperature for 60 seconds: FK package

260

Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package

300

-65 to 150

°C
°C
°e
°e

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: 0 or N package

260

°e

NOTES: 1. All voltage values, except differential input voltage. are with respect to network ground terminal.

2. In the FK and J packages, SN55115 chips are either silver glass or alloy mounted and SN75115 chips are glass mounted.
DISSIPATION RATING TABLE
PACKAGE

TA

s

25°C

POWER RATING

DERATING FACTOR

TA - 70·e
POWER RATING

TA - 125°C
POWER RATING

0

950mW

ABOVE TA - 25·C
7.6 mw/oe

FK

1375 mW

11.0 mw/oe

880mW

275 mW

J (SN55115)
J (SN75115)

1375 mW

11.0 mW/oC

880mW

275 mW

1025 mW

8.2 mw/oe

656 mW

N

1150mW

9.2 mw/oe

736 mW

608mW

recommended operating conditions
SN55115

SN75115

MIN

NOM

MAX

MIN

NOM

MAX

Supply voltage, Vee

4.5

5

5.5

4.75

5

5.25

High-level (strobe) input voltage, VIH

2.4

Low-level (strobe) input voltage, VIL

2.4
0.4
-5

High-level output current, IOH

15

Low-level output current, IOL
-55

Operating free-air temperature, T A

125

0

UNIT
V
V

0.4

V

-5

mA

15

mA

70

°e

TEXAS •
INSTRUMENTS
POST OFFICE BOX 855303. DALLAS, TEXAS 75285

2-139

8N55115. SN75115

DUAL DIFFERENTIAL LINE RECEIVERS
electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN55115

TEST CONDITIONS t

PARAMETER

MIN

TYP*

SN75115
MAX

MIN

TYP*

MAX

UNIT

Differential input
VTH§

high-threshold voltage

VO-O.4V,

10L - 15 mA,

VIC - 0

Vo - 2.4 V,

10H -

VIC - 0

500

500

mV

Differential input
VTL§

low-threshold voltage

-5 mA.

+15

Common-mode
VICR

VOH

VOL

IlL

-5001

VCC - MIN,

High-level output voltage

10H -

10L -

to

to

to

-19

-15

-19

2.2

ITA - MAX

2.4

2.4

VID - 0.5 V,

2.4
3.4

0.22

ISL

low-level strobe current

I(RTCI

VI - 0.4 V,

VCC - MIN,

=

Vstrobe

-0.5

TA - 25°C

=

V strobe

VIO -

Response-time-control

VCC - MAX,

current

VRC - 0
VIO -

VIO - 0.5 V,

VOH - 12 V,

VCC - MIN,

Line-terminating

lOS

ICC

0.45

V

VOH - 5.25 V,

-4.75 V

=5V

VCC

Short-circuit

VCC - MAX,

output current!

VIO -

Supply current

Vce - MAX,

(both receivers)

VIC - 0

Vo - 0,

-0.5 V
VIO - 0.5 V,

-0.9
-0.5

-0.7
-0.7

-0.7

2

5

5

10

TA

= 25°C

-1.15

-1.2

-2.4

-3.4

-1.15

-1.2

TA - 25°C

100

TA - MAX

200

mA

-0.7

= MAX

VIO - 0.5 V,

-4.5 V

VIO -

resistance

0.22

0.4

TA

TA - 25°C

output current

V

TA - 25°C

0.4 V

Vce - MIN,

RT

-0.5 V,

4.5 V

. Vce - MAX,

Off-state open-collector
10(0111

3.4

-0.9

TA - MAX
High-level strobe current

2.4
2.4

TA - MIN

Other input at 5.5 V

ISH

V

15mA

VCC - MAX,

low-level input current

mV
+24

to

ITA - MIN
-0.5 V, ITA _ 250C

-5mA

Vce - MIN,

Low-level output voltage

VID -

+15

-15

±1 V

VID -

input voltage range

-5001
+24

-2.4

-3.4

pA

mA

mA

TA - 25°C

100

TA - MAX

200

pA

TA - 25 6 C

77

130

167

74

130

179

TA - 25°C

-15

-40

-80

-14

-40

-100

mA

32

50

32

50

mA

TA

= 25°C

0

t Unless otherwise noted Vstrobe = 2.4 V. AU parameters with the exception of off-state open~collector output current are measured with the active pull-up
connected to the sink .output.

*Ail typical values are at Vee =

5 V. TA

=

25°C, and VIC = O.

§ Differential voltages are at the 8 input terminal with respect to the A input terminal.

, The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold voltages only.
I Only one output should be shorted to ground at a time, and duration of the short-circuit should not exceed one second.

switching characteristics, Vee" 5 V, eL - 30 pF, TA = 25°e
PARAMETER
tpLH
tpHL

Propagation delay time,
low-to-high-Ievel output
Propagation delay time,
high-to-Iow-Ieve( output

SN66116

TEST CONDITIONS

MAX

50

18

75

ns

50

20

75

ns

1

18

See Figure 1

20

= 3.9 kll, See Figure

RL

= 390 11,

TEXAS . "

POST OFFICE BOX 665303 • DALLAS. TEXAS 76265

MIN

UNIT

TYP

MAX

INSTRUMENTS
2-140

SN75115

TYP

RL

MIN

SN55115, SN75115
DUAL DIFFERENTIAL LINE RECEIVERS
PARAMETER MEASUREMENT INFORMATION
OPEN

2.4 V
5V

--,I

STROBE

" 5 no-.l

I+-

I

0 V

OIFFERENTIA~i 90%
INPUT
10

I

I

--.I
RESPONSE
TIME CONTROL
OPEN

~'PHl

1--" 5 no

~

90%:x
1- - 0 V I
I 10%

- - +3 V
3 V

I

--.I

j4-'PlH
I

I
I
~

OUTPUT

1.5 V

VOH

1.5 V

-----VOl

WAVEFORMS

TEST CIRCUIT
NOTES: A. The pulse generator has the following characteristics: Zo
B. CL includes probe and jig capacitance.

= 50 0,

PRR

s 500 kHz, tw s 100 ns, duty cycle

= 50%.

FIGURE 1. PROPAGATION DELAY TIMES

TYPICAL CHARACTERISTICS
INPUT CURRENT
VS

INPUT VOLTAGE

6

4

'E"
I

Vce = 5 V
Input not under test at 0 V
TA = 25°e

~

0

~

::>

Co

/

.E -2
I

/

/

V

/

-4
-6

/

V

2

C
::>
U

/

/

/

-25-20-15-10-5

0

5

10 15 20 25

VI-Input Voltage-V

FIGURE 2

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 655303 • DALlAS._TEXAS 75265

2-141

SN55115. SN75115
DUAL DIFFERENTIAL LINE RECEIVERS

TYPICAL CHARACTERISTICSt
OUTPUT VOLTAGE
vs'
FREE-AIR TEMPERATURE
4.0

Vee

=

>
I

"

2.8

S'" 2.4

6

4.5 V

3.4
3.2

OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE

VOHI(VID I =

_1-----

-b.5 Vi, IOH I =

f..--

_15 md!.--

5

I

"

~'"

2.0

>

S:::

1.6

0;

0
I
0

0;

Vee

I

1.2

3

VOL (VID

o

=
0

0.5 V, IOL

I

I

25

50

=

I
75

.rIVID

o

100 125

-25-20-15-10-5

>

>
Sc.
S

3

0

c;;

--

0.4

VID = 0.5 V
TA = 25°C

>

~5V-

-

J:.
J:'"

veC=4.~~

>
Sc.

""- l\
.\'

> 2

0.3

0

". V
-E.c__
.. 45~

0;
0 0.2

J:

/

c;;

>

V

...."
~

....0
....I

~

I

0.1

>

~
-20

-30

Vee = 5.5 V

/

V

0

0

>
-10

/-/

I

"
S'"

r- ~5V

...."

o
o

10 15 20 25

LOW-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

VID = -0.5 V
TA = 25°C

vi

5

FIGURE 4

HIGH-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

5

0

1= 1 1V

Vlc-Common-Mode Input Voltage-V

FIGURE 3

4

VID

15 mAl_

T A - Free-Air Temperature - °e

I

I = I-1 .I.V

~~
2

0

-75 -50 -25

"'"
J:!
'0"

V

I

>

0.8
0.4 -

= 4.5

I

c.

0

>

Vee - 5V

4

0

~

::

Vee = 5.5 V

>

0

>

No Load
TA = 25°C

o

-40

o

-50

IOH-High-Level Output Current-rnA

5

10

15

20

25

30

IOL -Low-Level Output Current-rnA

FIGURE 5

FIGURE 6

t Data for temperatures below OOC and above 70°C and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55115
circuits only. These parameters were measured with the active pull~up connected to the sink output.

TEXAS •
INSTRUMENTS
2-142

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55115, SN75115
DUAL DIFFERENTIAL LINE RECEIVERS
TYPICAL CHARACTERISTICSt
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE

6

OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE

6

Vee = 5 V
Load = 2 k[J to Vee

I

4

CD

TA - 125°e

~

S

>

T~ = k5

0

e

--'~

TA

=

SCo
S

-55°e

0
I
0

2

I

4

l!!

"0

II

3

5

0

.
I

co

>

Vee = 4.5 V

>

>
CD

Vee = 5 V

5

5

.

Vee = 5.5 V

0

3

2

>

>

o

o
-0.2

o

-0.1

0.1

Load = 2 k[J to Vee
TA = 25°C

-0.2

0.2

VID-Differentiallnput Voltage-V

Vee =

>

.
I

CD

4

j

~
0

>
SCo
S

3

I

2

0

0

>

~

i\
Vee - 5

6

No Load
VID - 0.5 V
TA = 25 0 e

5.~ V
I\.

Vee = 5 V
No Load

5

Vll- 0.5 V

.. -

>
I

CD

N
\

4

l!!

"

TA
V·I·

"0

>
~

:l

3

~

So
:l

~\

0

I

2

0

Vee = 4.5 Vl

o
o

0.2

OUTPUT VOLTAGE
vs
STROBE INPUT VOLTAGE

OUTPUT VOLTAGE
vs
STROBE INPUT VOLTAGE

5

0.1

FIGURE 8

FIGURE 7

6

o

-0.1

VID-Differentiallnput Voltage-V

>

2

3

o
o

4

J

=

~ TAl =

125 0
I
I
_155oel

T~ =
2

k5 0 e

3

4

Vstrobe-Strobe Input Voltage-V

Vstrobe-Strobe Input Voltage-V

FIGURE 10

FIGURE 9

t Data for temperatures below 0 DC and above 70 DC and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55115
circuits only. These parameters were measured with the active pull up connected to the sink output.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-143

SN55115, SN75115
DUAL DIFFERENTIAL LINE RECEIVERS
TYPICAL CHARACTERISTICS t
SUPPLY CURRENT
(BOTH RECEIVERS)
vs
SUPPLY VOLTAGE
60

SUPPLY CURRENT
(BOTH RECEIVERS)
vs
FREE-AIR TEMPERATURE
40

No Load
TA - 25°C

E

B INPUT AT VCC

)

40

E

AINPUTAT~

~

'"

CJ

Q,
Q,

'"I

II)

V



Q,
Q,

INPUTATOV
A INPUT AT Vce

V

'I"

15

!:}

10

II)

CJ

/V
2

30

I

/

I

30

>

-

35

50



~

Vee = 5 V
See Figure 1
tPHL (RL - 390 {J)

i=

50

MAXIMUM OPERATING FREQUENCY
vs
RESPONSE-TIME-CONTROL CAPACITANCE

PROPAGATION DELAY TIMES
vs
FREE-AIR TEMPERATURE

..

25

FIGURE 12

FIGURE 11

30

0

T A - Free-Air Temperature- °e

V

---

/"

/ ' --;;LH (RL -

~

lM1R1IB

V

3.9 k{J)
10kml
. . .

10

~
~

Q.

5

o

25

50

75

100 125

TA-Free-Air Temperature

0.01

0.1

10

Response-Time-Control Capacitance -"F

FIGURE 13

FIGURE 14

t Data for temperatures below 0 DC and above 70 DC and for supply voltages below 4.75 V and above 5.25 V are applicable to SN5511 5
circuits only. These parameters were measured with the active pull·up connected to the sink output.

TEXAS •
INSTRUMENTS
2-144

POST OFFICE SOx 655303 • DALLAS, TeXAS 76266

SN55115. SN75115
DUAL DIFFERENTIAL LINE RECEIVERS

APPLICATION INFORMATION

TWISTED
PAIR
=D=SN75113 DRIVER

=d::>--SN75115 RECEIVER

t A capacitor may be connected in series with Zo to reduce power dissipation.

FIGURE 15. BASIC PARTY-LINE OR DATA-BUS DIFFERENTIAL DATA TRANSMISSION

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-145

2-146

SN55116, SN75116 THRU SN75119
DIFFERENTIAL LINE TRANSCEIVERS
02143. MAY 1976-REV1SEO MAY 1990

Features common to all types

Additional features of the SN55116/SN75116

•

Single 5-V Supply

•

Independent Driver and Receiver

•

3-State Driver Output Circuitry

•

•

TTL-Compatible Driver Inputs

Choice of Open-Collector or Totem-Pole
Outputs on Both Driver and Receiver

•

TTL-Compatible Receiver Output

•

Dual Data Inputs on Driver

•

Optional Line-Termination Resistor in
Receiver

•

Differential Line Operation

•

Receiver Output Strobe ('116, SN75117) or
Enable (SN75118, SN75119)

•
•

Designed for Party-Line (Data-Bus)
Applications

•

± 15-V Receiver Common-Mode Capability

•

Receiver Frequency Response Control

Additional features of the SN75117

Choice of Ceramic or Plastic Packages

•

Driver Output Internally Connected to
Receiver Input

The Sf 15"18 is an SN75116 with 3-State Receiver Output Circuitry
The Si\l75119 is an SN75117 with 3-State Receiver Output Circuitry
description
These integrated circuits are designed for use in interfacing between TTL-type digital systems and differential
data transmission lines. They are especially useful for party-line (data-bus) applications. Each of these circuit
types combine in one package a 3-state differential line driver and a differential-input line receiver, both
of which operate from a single 5-V power supply. The driver inputs and receiver outputs are TTL compatible.
The driver employed is similar to the SN55113/SN75113 3-state line driver, and the receiver is similar
to the SN55115/SN75115 line receiver.
The '116 and SN75118 circuits offer all the features of the SN55113/SN75113 driver and the
SN55115/SN75115 receiver combined. The driver performs the dual input AND and NAND functions when
enabled, or presents a high impedance to the load when in the disabled state. The driver output stages
are similar to TTL totem-pole outputs, but have the current-sink portion separated from the current-sourcing
portion and both are brought out to adjacent package pins. This feature allows the user the option of using
the driver in the open-collector output configuration, or, by connecting the adjacent source and sink pins
together, of using the driver in the normal totem-pole output configuration.
The receiver portion of the '116 and SN75118 features a differential-input circuit having a common-mode
voltage range of ± 15 V. An internal 130-0 resistor is also provided, which may optionally be used for
terminating the transmission line. A frequency response control pin allows the user to reduce the speed
of the receiver or to improve differential noise immunity. The receiver of the '116 also has an output strobe
and a split totem-pole output. The receiver of the SN7 5118 has an output-enable for the 3-state split totempole output. The receiver section of either circuit is independent of the driver section except for the Vee
and ground pins.
The SN75117 and SN75119 circuits provide the basic driver and receiver functions of the '116 and
SN75118, but use a package that is only half as large. The SN75117 and SN75119 are intended primarily
for party-line or bus-organized systems as the driver outputs are internally connected to the receiver inputs.
The driver has a single data input and a single enable input, and the SN75117 receiver has an output strobe
while the SN75119 receiver has a 3-state-output enable. These devices do not, however, provide output
connection options, line termination resistors, or receiver frequency-response controls.
The SN55116 is characterized for operation over the full military temperature range of - 55°e to 125°e;
the SN75116, SN75117, SN75118, and SN75119 are characterized for operation from Doe to 70 oe.

PRODUCTION DATA doeuments contain inlormation
current IS 0' publication date. Products conform to
speCifications per the terms of Texaa Instruments

:=:~~i;8i~:'~'i =:~ti:r :,~o:::~:t::~s

not

Copyright © 1990, Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TEXAS 75265

2-147

SN55116. SN75116 THRU SN75119
DIFFERENTIAL LINE TRANSCEIVERS

SN75118 •.• D, J, OR N PACKAGE

SN55116 •.. J PACKAGE
SN75116 ••• D, J, OR N PACKAGE

(TOPVIEWI

(TOPVIEWI
DZP
DZS
DYS
DYP
RA

DZP
DZS
DYS
DYP
RA
RT
RB
GND

VCC
DB
DA
DE
RYP
RYS
RS
RTC

4

5
6

VCC
DB
DA
DE
RYP
RYS
RE
RTC

SN55116
FK PACKAGE

SN75117 ••. D, JG. OR P PACKAGE

(TOPVIEWI

(TOPVIEWI

Ult>.
N N U

U

D I [ J j 8 VCC
B
2
7
DE
A 3
6 RY
GND 4
5
RS

Um

ooz>o
3

DYS
DYP
NC
RA
RT

I

2 I 20 19

4

18

5

17

6
7

16
15

14

8

DA
DE
NC
RYP
RYS

SN75119 .•. D, JG. OR P PACKAGE
(TOPVIEWI

9 1011 12 13

D I [ J 8 VCC
B
2
1
DE
A
3
6
RY
GND 4
5
RE

NC-No internal connection

. TEXAS.
INSTRUMENTS
2-148

POST OFFICE BOX 656303 • DALLAS. TEXAS 75265

SN55116, SN75116 THRU SN75119
DIFFERENTIAL LINE TRANSCEIVERS
'116. SN7511B

SN75117.SN75119

FUNCTION TABLE
OF DRIVER

FUNCTION TABLE
OF DRIVER

INPUTS

OUTPUTS

INPUTS

DE

DA

DB

DY

DZ

DI

DE

A

L

X

X

Z

Z

H

H

H

L

H

L

X

H
H

L

H

L

H

X

L

Z

Z

L

H

X

L

L
L

H

H

H

H

OUTPUTS
B

'116. SN7511B

SN75117. SN75119

FUNCTION TABLE OF RECEIVER

FUNCTION TABLE OF RECEIVER

RS/RE

DIFF

INPUTS

OUTPUT RY

INPUT

'116

SN7511B

A

OUTPUT RY

B

RS/RE

SN75117 SN75119

L

X

H

Z

H

L

H

H

H

L

H

H

L

H

H

L

L

H

H

L

L

X

X

L

H

Z

H

H = high level (VI '" VIH min or VIO more
positive than VTH max)
L = low )evel (VI :5 VIL max or VIO more
negative than VTL max)
X = irrelevant
Z = high impedance (off)

schematics of inputs and outputs
EQUIVALENT OF
EACH DRIVER INPUT
AND EACH RE AND RS INPUT

v c c 74kll
----

EQUIVALENT OF
EACH RECEIVER INPUT
(EXCLUDING ENABLES
ANO STROBES)

VCC -------1~- - -

NOM

INPUT

TYPICAL OF ALL OUTPUTS

INPUT

12~

--"""...._----

7kll
NOM

Bkll

NOM

.....-------

(

R

--rC1--Y

L-_ _ _ _-.,---4~-

130 Il
NOM

~~_

PULLUP
OUTPUTt

SINK

O",~"

Driver output R - 9 IJ NOM
Receiver output R - 20 IJ NOM
tOn SN75117 and SN75119. common
outputs replace the separate pullup and
sink outputs.

TEXAS .."
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-149

SN55116, SN75116 THRU SN75119
DIFFERENTIAL LINE TRANSCEIVERS

logic diagra!1ls (positive logic)

logic symbols t

1116 AND SN75118

'116

at>
DE (13)

(4)
(3)

EN

DA (14)
DB (15)

DE (13)
DVP
DVS
DZP

DA (14)

DZS

DB (1_5)
__ ........_

......~

at>
'116 RECEIVER
RT
RS
RTC
SN75118

&t>
DE (13)

EN

SN75118 RECEIVER

DA (14)
DB (15)

t>

RS~{5~)

SN75117 DRIVER AND RECEIVER
________________
~

SN75117

DE
01

(7)

t>
V

EN

(1)

V

(3) A
(2) B

L....._________........_ _=:::

&
EN

01 (1)

(3) A

JIC_--:;(6::.) RV

(3) A}

(2) B



High-level
input current

Low-level
IlL

input current

Enable
Strobe
Enable

Response-time-control

I(Rel

current (Pin 9)

Off-state open-collector
10(off) output current

Vee

~

MAX,

Vee

~

MAX,

z

~

~~

~~

lOS
ICC

~

0.5 V,

VID

Vee

~

MAX,

VO~12V,

~
~

-1 V

(high-impedance statel

Va ~ Oto Vee,
RE at 0.4 V

MAX,

Short-circuit

Vee ~ 5 V
Vee ~ MAX,

output current §

VID

Supply current (driver

Vee ~ MAX,
See Note 4

and receiver combined)

VID

2.4 V

Vee ~ MAX,
Re at 0 V,

Vee

Line-terminating resistance

~

See Note 4

Off-state
output current

RT

VI

Vstrobe ~ 0.4 V,
Vee ~ MAX,

VIO
10Z

'116, SN75118

TEST CONOITIONst

PARAMETER
IIH

en

::;;Z

~

-0.5 V,

VI - 0.4 V
~

0.5 V,

See Note 4
TA ~ 25°C
TA

~

MAX

TA

~

25°C

TA

Va

~

~

MAX

0,

See Note 4
VID

~

0.5 V,

MIN

TYP*

SN75118, SN75119

MAX

SN75117,SN75119
MIN

TYP*

MAX

40

40

-2.4

-2.4

-1.6

-1.6

::a-

UNIT

mZen
-I-

I'A

;!::Z
.....

-en

~U'I

'116, SN75117
SN75118, SN75119
TA

~

25°C

-1.2

mA

1

10

SN75

I'A

20
±10

SN75118

±20

±10
~

SN75119

±20

TA

~

25°C

77

167

TA

~

25°C

-15

-80

TA ~ 25°C

42

60

Il

-15
42

-80

rnA

60

mA

tUnless otherwise noted Vstrobe = 2.4 V. All parameters with the exception of off-state open-collector output current are measured vvith the active pull-up connected to
the sink output. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
tAli typical values are at Vee ~ 5 V, TA ~ 25°C, and VIC ~ O.

§Not more than one output should be shorted at a time.
NOTE 4: This applies with the less positive receiver input grounded. For SN55116, VIO

-1 V.

::a::c
:I>::a
~c

nen

200

SN75118, SN75119

men
-1-1

mA

SN55116

Z--

!!!Z
< .....
mU'l
::a-

enCD

SN55116. SN75116 THRU SN75119
DIFFERENTIAL LINE TRANSCEIVERS
switching characteristics, VCC .. 5 V, CL .. 30 pF, TA - 25°C

receiver section

tPHL
tpZH
tpZL

PARAMETER·
Propagation delay time, low-to-hi.gh-Ievel output
Propagation delay time, high-to-Iow-Ievel output
Output enable time to high level
SN75118
Output enable time to low level
and

tpHZ
tpLZ

Output disable time from high level
Output disable time from low level

tpLH

TEST CONDITIONS
RL= 400O,

TVP

See
See
RL = 480O, See
RL = 250O, See

Figure
Figure
Figure
Figure

9
16

MAX
75
75
20
35

12
17

30
35

20
17

See Figure 16

RL = 480O,
RL = 250O,

SN75119
only

MIN

14
15
14
15

UNIT
ns
ns
ns
ns
ns
ns

TYPICAL CHARACTERISTICS
DRIVER OUTPUT VOLTAGE
vs
DRIVER INPUT VOLTAGE

DRIVER OUTPUT VOLTAGE
vs
DRIVER INPUT VOLTAGE

6

6
No load
TA = 25°C

Vcc=SV
No load
5

S

>I

..'"

VCC=5.5V

4

.!::

..a-

3

0
I
0

2

::I

....

4

..a-

3

19

VCC = 4.5 V

0

>

>I

VCC=5V

~

::I

::I

..

dI

0 2

>

>

~

TA = -SSoC

I

f-- -TA=25°C

-

I
I.

TA=125°C -

o
o

2

3

4

o
o

2

3

4

VI-Data Input Voltage-V

VI-Date Input Voltage-V

FIGURE 1

FIGURE 2

TEXAS . . ,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

2-155

SN55116. SN75116 THRU SN75119
DIFFERENTIAL LINE TRANSCEIVERS

TYPICAL CHARACTERISTICS
DRIVER HIGH-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

DRIVER LOW-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

6

0.6

r °

TA = 2JoC

>I

TA = 25 C

1".,
I~

5

8.

III

15

>
;

t
0

..........

4

r--- ~
~511 t--...

3

0;;;;;;;;;;;::

1.,

...

.fi,

...

0.4

c5

0.3

VCC=lf ~

&

II.
r--:££.:
4.5 II -

r-:- ~

2

1
j

~

:f
I
:z::

0.2

oS

...I
~ 0.1

0

>

~\
-20

-40

-60

-80

V

/

o
o

-100

V

/

20

'OH-High·Level Output Current-mA

40

FIGURE 3

18

tpHL

1;-

2l
c

8

'J

6

~

l!! 25

.,,-

.,

I--

20 I - -

J5

= 15
is

V V

~
tpZL

V

--I?
tpHZ

..

"i

:a.c

.'"

w

t
0

2

-75 -50 -25

0

25

50

75

100

125

10
tpZH
5

~75

-50 -25

TA-free·Air Temperature-°c

0

25

50

75

TA-free.Air Temperature-oC

FIGURE 5

FIGURE 6

t Data for temperatures below O°C and above 70°C are applicable to SN55116.
NOTE 6: For tPZH and tPHZ: RL = 180 0, see Figure 1'4. For tpZL and tpLZ: RL

=

250 0, see Figure 15.

TEXAS •
INSTRUMENTS
2-156

120

./

I

:l
E

j::

4

o

VCC=5V
See Note 6

I

10

o

100

DRIVER OUTPUT ENABLE AND DISABLE TIMES
vs
FREE-AIR TEMPERATUREt

V

tPLH

j:: 12

80

60

FIGURE 4

--

16

~

VCC = 5.5 V

30

VCC=5V
CL = 30 pf
See figure 13

~ 14
E

V

~V

IOL -Low· Level Output Current-mA

DRIVER PROPAGATION DELAY TIMES
vs
FREE-AIR TEMPERATUREt

20

~

0.5

POST OFFICE BOX 656303 • DALLAS. TEXAS 75266

100 125

SN55116, SN75116 THRU SN75119
DIFFERENTIAL LINE TRANSCEIVERS

TYPICAL CHARACTERISTICS
RECEIVER OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE

6

Vee = 5.5V

RECEIVER OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGEt
6

Load = 2 kn to Vee
TA = 25°e

Vee- 5V

Vee=5V
Load = 2 kn to Vee
5

5

Vee = 4.5 V

>I

'\

4

"

'"
:!

4-- Tj = 125°C

15

>

."

Sa. 3

0
I
0

I
°
~ I--TA=25 e

2

>

o

-0.2

o

-0.1

0.1
VID-Differentiallnput Voltage-V

T A = _55°e ___

o

0.2

-0.2

0.1
-0.1
o
VID-Differentiallnput Voltage-V

FIGURE 7

FIGURE 8
RECEIVER OUTPUT ENABLE AND DISABLE TIMES
vs
FREE-AIR TEMPERATUREt

RECEIVER PROPAGATION DELAY TIMES
vs
FREE-AIR TEMPERATUREt
30

25
~
I

;J
E 20

i=

>-

.!!
15
C
c

"
0

30

Ve~=5V

RL = 400 n
See Figure 16

--

tp'-Y

I--- I-""""

.----

-

V

/

Vee=5V
See Note 7
~

c

25

tv /

I
;J

E

f..-""

i= 20

V

:c"

I---"

III

t PHL

is 15
."

-

cco

:c"co

.~

co 10
a.

'"

.."
c

10

..-f.--

............ 1

tpZL

--+-

a.

5

S

0

-75 -50 -25

0

25

50

75

100

125

tpHZ

.-

w

...S!

o

0.2

t~ZH

5

o
-75 -50 -25

T A-Free·Air Temperature-oe

0

25

50

75

100

125

T A -Free-Air Temperature-°e

FIGURE 10

FIGURE 9

to ata for temperatures below ooe and above 70 0 e are applicable to SN55116.
NOTE 7: For tpZH and tpHZ: Rl = 480 11, see Figure 14. For tpZl and tpLZ: RL = 250 11, see Figure 15.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-157

SN55116. SN75116 THRU SN75119
DIFFERENTIAL LINE TRANSCEIVERS

TYPICAL CHARACTERISTICS
SUPPLY CURRENT (DRIVER & RECEIVER)

SUPPLY CURRENT (DRIVER AND RECEIVER)

70

vs

vs

SUPPLY VOLTAGE

FREE-AIR TEMPERATUREt
50

~
I
No load
D
TA=25 e

1 60

i
::I

U'

i

::I

'1U

V

50

30

10

o
o

)

J/

"'-

40

/

<

E 35

...c
I

u 25

-aa.

V

::I

20

en
I
u 15
!:}

10
5 t- Vee=5V

/
3
1\
5
2
6
vee-Supply Voltage-V

7

8

o

1 I

-75 -50 -25

ooe

0

25

50

75

TA-Free-Air Temperature-DC

FIGURE 12

FIGURE 11
tOata for temperatures below

and above 70 D e are applicable to SN55116.

TEXAS ...,
INSTRUMENTS
2-158

r--

§ 30

/

40

!:} 20

- -

45

POST OFRCE BOX 656303· DALLAS•. TEXAS 75285

100 125

SN55116, SN75116 THRU SN75119
DIFFERENTIAL LINE TRANSCEIVERS

PARAMETER MEASUREMENT INFORMATION
FROM OUTPUT
UNDER TEST

---1. . ---

FROM OUTPUT
TEST
UNDER TEST - -...----~IR-L POINT
CL = 3D pF
(Soe Note B)

CL - 3D pF

':I:' (See Note B)
~

LOAD CIRCUIT

$:

~

INPUT
I
lD%

1+--<5 ns

-1

NAND
OUTPUT

-

I

-

1.---.11

:

I

I

I

1

1

I

1.5V

f'1.-5-V--.....;."""'\\~5:
____-J.

-VOL

--

~tPZH

I
1

,1,

:

OUTPUT

1.5V

1D%

DV

i
~-f" VOH

I

1

tPHZ--k-+!

_ _ _oJ

D5V
Voll = D V

-VOH

~,------VOL

VOLTAGE WAVEFORMS

VOLTAGE WAVEFORMS

FIGURE 13. tPLH and tPHL (DRIVERS ONLY)
5V
FROM OUTPUT
UNDER TEST

I

9D%

DV

~;:L- -

-+I1_114-<5
ns
_ _ _ _ 3V

14-<5 ns

- -3 V

tpLH
I ,..----VOH

tPLH~

AND
OUTPUT

-

lD%

I+---M- tpH L

- _ -... 1

~

LOAD CIRCUIT

1

1.5V

1

~

~<5 ns

~I~9~D%~-~9~D~%~(I- 1.5V

..

1

TEST
POINT

FIGURE 14. tpZH and tPHZ

~RL = 250 n

--=t
...- ....-•

TEST
POINT

CL -3DpF
~ (Seo Note BI

FROM OUTPUT_. ._ ..._ ....I-......t-. .f-. .--,
UNDER TEST

LOAD CIRCUIT

LOAD CIRCUIT

1+--<5 ns

-.j
~l:.;;D';;%_ _ _

DV

-+I

.... <5 ns

I .Joo.=---.....,,=L:1-1-----VH
BINPUT
I
9D%
9D%
I
(See Note E) lD% I I 5D%
5D% I 1 lD%
(See Noto E)

I

1.....------- VL

-+I

-.I

~---VOH

OUTPUT
OUTPUT

VOLTAGE WAVEFORMS

VOLTAGE WAVEFORMS

FIGURE 15. tpZL and tPLZ
NOTES: A.
B.
C.
D.
E.

1.5V

FIGURE 16. tPLH and.tPHL (RECEIVERS ONLY)

Input pulses are supplied by generators having the following characteristics Zo = 500, PRR s 500 kHz, tw = 100 ns.
CL includes probe and jig capacitance.
All diodes are 1N3064 or equivalent.
When testing the' 116 and SN75118 receiver sections, tne response-time control and the termination resistor pins are left open.
For'116andSN75118,VH = 3V,VL = -3V,theAinputisatOV.
For SN75117 and SN75119, VH = 3 V, VL = 0, the A input is at 1.5 V.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75285

2-159

2-160

SN55121, SN75121
DUAL LINE DRIVERS
01334. SEPTEMBER 1973-REVISED SEPTEMBER 1986

•

•

High-Speed
tpd - 20 ns Max at CL ~ 15 pF

•

TTL Compatible With Single 5-V Supply

•

2.4-V Output at IOH -

•

Uncommitted Emitter-Follower Output
Structure for Party-Line Operation

00

0

0

0

0

(TOP VIEWI

lA
1B
1C
10
1E
1F
1Y
GNO

- 75 mA

•

Short-Circuit Protection

•

AND-OR Logic Configuration

•

Designed for Use With Triple Line Receivers
SN55122.SN75122

•

SN55121
J PACKAGE
SN75121
D. J. OR N PACKAGE

Designed for Digital Data Transmission over
50-0 to 500-0 Coaxial Cable. Strip Line. or
Twisted Pair

VCC
2F
2E
20
2C
2B
2A
2Y

SN55121
FK PACKAGE
(TOP VIEW)
000

U

m<{U Uu.

Z>N

Designed to Be Interchangeable With
5ignetics N8T13

3

1C
10
NC
1E
1F

description
The SN55121 and SN75121 dual line drivers are
designed for digital data transmission over lines
having impedances from 50 to 500 ohms. They
are also compatible with standard TTL logic and
supply voltage levels.
The low-impedance emitter-follower outputs of
the SN55121 and SN75121 will drive
terminated lines such as coaxial cable or twisted
pairs. Having the outputs uncommitted allows
wired-OR logic to be performed in party-line
applications. Output short-circuit protection is
provided by an internal clamping network which
turns on when the output voltage drops below
approximately 1.5 V. All of the inputs are in
conventional TTL configuration and the gating
can be used during power-up and power-down
sequences to ensure that no noise is introduced
to the line.

2

1 20 19

4

18

5

17

6

16

7

15

8

14

2E
20
NC
2C
2B

9 1011 12 13

>-OU>-<{

-ZZNN
(!)

NC - No internal connection

FUNCTION TABLE
INPUTS
A

B

C

H

H

x

X

OUTPUT

E

F

Y

H

0
H

X

X

H

X

X

H

H

H

All other input combinations

L

H = high level
L = low level
X = irrelevant

The SN55121 is characterized for operation over
the full military temperature range of - 55 °e to
125°eo The SN75121 is characterized for
operation from ooe to 70 oe.

PRODUCTION DATA documenls contein in'ormetio.
current as of publication date. Products conform to
specificatioRs par the terms of Texas Instrumants

~:=:~~i~a[::1~1i

=::i:: :'IO::::::~:':' not

Copyright © 1986, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

2-161

SN55121, SN75121
DUAL LINE DRIVERS

logic symbol t

logic diagram (positive logic)
&

lA (11

2:1t>

lA~-T"""-""

lB
lC
10......,'--......- - -

lB (21
lC (31

(71 1V

10 (41
(51
lE
(61
IF
(101
2A
(111
2B
(121
2C
(131
20
(141
2E
(151
2F

lE

&

lF
2A "';';;;f--r--_
2B
2C
2D....!..!.2L........- - -

(91 2V

2E

2F

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and lEe Publication 617-12.
Pin numbers shown are for D. J, and N packages.

schematic (each driver)
VCC-----.----~~----._----._----------~--~~--~._------.__,
TO OTHER
15.n
LINE DRIVER

A----_..r

B-----+--.
C--t--H
O----+--+~

........----+--+---- V

E--+-~~-----_~

F ____+--+~~--------~--~
GNO----~~~~--------------~~~_.~~~~--~~~~------~

TO OTHER
LINE DRIVER

All resistor values shown are nominal.

TEXAS . "

2-162

INSTRUMENTS
,

POST OFFICE BOX 655303 • DALLAS,

TEX~5

75265

SN55121, SN75121
DUAL LINE DRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
SN55121

SN75121

UNIT

Supply voltage, VCC (see Note 1)

6

6

V

Input voltage

6

6

V

Output voltage

6

6

V

See Dissipation Rating Table

Continuous total power dissipation (see Note 2)

o to

Operating free-air temperature range

-55 to 125

Storage temperature range

-65 to 150

Case temperature for 60 seconds: FK package

260

Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package

300

·C

70

-65 to 150

·C
·C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package

300

·C

260

·C

NOTES: 1. All voltage values are with respect to both ground terminals connected together.
2. In the FK and J packages, SN55121 chips are either silver glass or alloy mounted and SN75121 chips are glass mounted.
DISSIPATION RATING TABLE
PACKAGE

TA "" 25°C
POWER RATING

DERATING FACTOR
ABOVE TA - 25°C
7.6 mW/·C

TA - 70°C
POWER RATING

TA - 125°C
POWER RATING

D

950 mW

FK

1375 mW

11.0 mW/oC

880 mW

608 mW
275 mW

J (SN55121)
J (SN75121)

1375 mW

11.0 mW/oC

880 mW

275 mW

1025 mW

8.2 mW/oC

656 mW

N

1150mW

9.2 mW/oC

736 mW

recommended operating conditions
SN55121
Supply voltage, VCC

SN75121

MIN

NOM

MAX

MIN

NOM

MAX

4.75

5

5.25

4.75

5

5.25

High-level input voltage, VIH

2

Low-level input voltage, VIL
High-level output current, 10H
Operating free-air temperature, T A

-55

TEXAS

UNIT
V
V

2
0.8

0.8

V

-75

-75

mA

70

°C

125

0

~

INSTRUMENlS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

2-163

SN55121, SN75121
DUAL LINE DRIVERS
electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
range (unless otherwise noted)
PARAMETER

TEST CONDITIONS

MAX
-1.5

MIN

VIK

Input clamp voltage

VCC = 5 V,

11=-12mA

VIBRII

Input breakdown voltage

VCC = 5 V,

II = lOrnA

VOH

High-level output voltage

VIH = 2 V,

10H = -75 rnA,

See Note 3

10H

High-level output current

VCC = 5 V,
TA = 25°C,

VIH = 4.5 V,

VOH = 2 V,

10L

Low-level output current

VIL = O.B V,

VOL = 0.4 V,

10(ofl)

Off-state output current

VCC = 3 V,

Va = 3 V

IIH

High-level input current

VI = 4.5 V

IlL

Low-level input current

VI = 0.4 V

5.5

V
V

2.4

V

-100

See Note 3

UNIT

See Note 3

-0.1

-250

rnA

-BOO

~A

500

~

40

~

-1.6

rnA

lOS

Short-circuit output current t

TA = 25°C
All inputs at 2 V,

rnA

Supply current, outputs high

VCC = 5 V,
VCC - 5.25. V,

-30

ICCH

Outputs open

28

rnA

ICCL

Supply current, outputs low

VCC = 5.25 V,

All inputs at 0.8 V, Outputs open

60

rnA

t Not more than one output should be shorted at a time.
NOTE 3: The output voltage and current limits are valid for any appropriate combination of high and low inputs specified by the
function taple for the desired output.

switching characteristics. VCC

=

5 V. TA =25C

PARAMETER

TEST CONDITIONS

tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output

RL = 370,

MIN

TYP

MAX

11

20

8

20

22

50

20

50

CL=15pF,

See Figure 1
RL = 370,

CL = 1000 pF,

See Figure 1

UNIT
ns
ns

PARAMETER MEASUREMENT INFORMATION
3V

INPUT

~-e~-----e--OUTPUT

CL
(Seo Noto B) .

1.5V
:
I

10%

OV

tpLH~~--~'1
I

tpHL~

I

I

j.5V

OUTPUT

I

l'5~VOH

________J

VOL

VOL TAGE WAVEFORMS

TEST CIRCUIT

FIGURE 1. SWITCHING TIMES
NOTES: A. The pulse generators have the following characteristics: Zo = 50 0, tw = 200 ns, duty cycle:;; 50%, PRR :;; 500 kHz.
8. CL includes probe and jig capacitance.

TEXAS . "

2-164

INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS, TEXAS 76286

SN55121. SN75121
DUAL LINE DRIVERS
TYPICAL CHARACTERISTICS
OUTPUT CURRENT vs OUTPUT VOLTAGE
-300
Vec= 5V
VIH =2V
TA = 25°C

-250

!

-200

'\

c

!:!

a...

-150

e-"
c5
I

l\.

\

-100

1\

9
-50

o

o 0.5

1

1.5 2 2.5 3 3.5 4 4.5
Vo--Output Voltage-V

5

FIGURE 2

APPLICATION INFORMATION

I
I

L!!~~~!!!!..J

I

I
I

L_l&~~~~lJ

FIGURE 3. SINGLE-ENDED PARTY LINE CIRCUITS

TEXAS.

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-165

2-166

SN55122, SN75122
TRIPLE LINE-RECEIVERS
D1334, SEPTEMBER 1973-REVISED SEPTEMBER 1986

•
•

Designed for Digital Data Transmission Over
Coaxial Cable, Strip Line, or Twisted Pair

(TOP VIEW)

Designed for Operation With 50-a to 500-0
Transmission Lines

•

TTL Compatible

•

Single 5-V Supply

•

Built-In Input Threshold Hysteresis

•

High Speed . . , Typical Propagation
Delay Time - 20 ns

•

Independent Channel Strobes

•

Input Gating Increases Application Flexibility

•

Fanout to 10 Series 54/74 Standard Loads

•

Can Be Used With Dual Line-Drivers
SN55121 and SN75121

•

SN55122. , ,J PACKAGE
SN75122, , , D, J, OR N PACKAGE

1A
16
2R
2S
2A
26
2Y
GND

VCC
1S
1R
1Y
3A
3S
3R
3Y

SN55122 ... FK PACKAGE

(TOP VIEW)
U
Ill~

3

2R
2S
NC
2A
26

Interchangeable With Signetics N8T14

description
The SN55122 and SN75122 are triple linereceivers that are designed for digital data
transmission over lines having impedances from
50 to 500 O. They are also compatible with
standard TTL-logic and supply voltage levels,

2 1 20 19

4

18

5

17

6

16

7

15

8

14

1R
1Y
NC
3A
3S

9 10111213

>-CU>-a:
NZZMM
(!l

NC - No internal connection

The SN55122 and SN75122 have receiver inputs with built-in hysteresis to provide increased noise margin
for single-ended systems. The high impedance of this input presents a minimum load to the driver and
allows termination of the transmission line in its characteristic impedance to minimize line reflection, An
open line will affect the receiver input as would a low-level voltage, The receiver can withstand a level
of - 0.15 V with power on or off. The other inputs are in TTL configuration. The S input must be high
to enable the receiver input, Two of the line receivers have A and B inputs that. if both are high. will hold
the output low, The third receiver has only an A input that, if high. will hold the output low.
The SN55122 is characterized for operation over the full military temperature range of - 55°e to 125 °e.
The SN75122 is characterized for operation from ooe to 70°C,

PRODUCTION DATA d.cuments contain information
current 8S of publication date. Products conform to
specifications per the terms of Texas Instruments

=~~:~~i~8{::1~1i ~~:\~:i:; :.~o:=:::::.:~~s

not

Copyright © 1986. Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-167

SN55122, SN75122
TRIPLE LlNE·RECEIVERS
logic symbol t

logic diagram
1R

1R

1S~~-E~--~~-'

1S
1A
1B

1B----------~~~

2R

2R---u•.lJ

2S
2A

2S-~~~---~__'

)0--.:1_71:..- 2Y

2A~~------~r-~

2B

2B~~------~1

3R

~

3R

3S

3S---~---L_-'

3A
tThis symbol is in· accordance with ANSI/IEEE Std 91-1984 and
lEG Publication 617-12.
Pin numbers shown are for 0, J, and N packages.

3A--------1

FUNCTION TABLE
INPUTS
A

a*

H

H

X

X
X
X
L
L

L
L

X
X

OUTPUT

R
X

S
X

L

H

L

H

X

H

X

L

H

H

X

H

X

L

H

Y
L

*a

input and last two lines of the
function table are applicable to
receivers 1 and 2 only.
H = high level
L = low level
X = irrelevant

TEXAS . "
INSTRUMENTS
2-168

(131
)Q.---1Y

1A~~------~r-~

POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

(91

)Q..----3Y

SN55122. SN75122
TRIPLE L1NE·RECEIVERS

schematic diagram (each receiver)

4 k!l

TO OTHER

800 n

58

{!

RECEIVERS

(13,7.9)

115.4. 111

S-------.----------~

TO OTHER
RECEIVERS

W'"

VCC bus

§S input is provided on receivers 1 and 2 only.
Resistor values shown are nominal.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6 V
Input voltage: R input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6 V
A, B, or S input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Output voltage ................. '.' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6 V
Output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 100 mA
Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN55122.......................... - 55°C to 125°C
SN75122 .......... '" ... , ............ ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1116 inch) from case for 60 seconds: J package ............ 300°C
Lead temperature 1,6 mm (1116 inch) from case for 10 seconds: D or N package ........ 260°C
NOTES: 1. Voltage values are with respect to network ground terminal.
2. In the FK and J packages, SN55122 chips are alloy mounted and in the J package, SN75122 chips are glass mounted.
DISSIPATION RATING TABLE
PACKAGE

0

TA s 25°C
POWER RATING
950mW

DERATING FACTOR
ABOVE TA - 25°C
7.6 mW/oC

TA - 70°C
POWER RATING

TA - 125°C
POWER RATING

608mW

FK

1375 mW

11.0 mW/oC

880 mW

275 mW

J (SN55122)
J (SN75122)

1375 mW

11.0 mW/oC

880mW

275 mW

1025 mW
1150mW

8.2 mW/oC

656 mW

9.2 mW/oC

736 mW

N

TEXAS . . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-169

SN55122, SN75122
TRIPLE L1NE·RECEIVERS

recommended operating conditions
Supply voltage, VCC
High-level input voltage, VIH
Low-level input voltage, VIL

I A, B, R, or S
I A, B, R, or S

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

2

V

High-level output current, IOH

I SN55122
I SN75122

V

-500

p.A

16

mA

-55

125

·C

0

70

·C

Low-level output current, IOl

Operating free-air temperature, TA

O.S

electrical characteristics over recommended operating free-air temperature. Vee - 4.75 V to 5.25 V
(unless otherwise noted)
Hysteresis

R

VIK

Input clamp voltage

A,B, or S

VI/SRI

Input breakdown voltage

A,B, or S

VOH

VOL

MIN Typt

TEST CONDITIONS

PARAMETER
Vhvst

TA = 25·C
= 5 V,
II = -12 mA
VCC = 5 V,
II = 10 mA
VCC = 5 V,
VIL = O.S V,
VIH = 2 V,
VI(AI = 0,
VI(BI = 0,
VI(RI = 1.45 V (see Note 31,
IOH = -500 p.A
VIL = O.S V,
VIH = 2 V,

High-level output voltage

VI(AI - 0,

Low-level output voltage

VI(R)

I

A,B, or S

I
I

R
A,B, or S

IIH

High-level input current

IlL

Low-level input current

IOS§

Short-circuit output current

ICCH

High-level supply current

ICCL

Low-level supply current

0.3

VCC

=

VI(BI - 0,
1.45 V (see Note 4),

5.5
IOH VI(SI

-500 p.A

=

V

2 V,

V

= 16 mA
= 2 V,

0.4

VI(S)

0.4
40

= O.S V
= 25·C

TA
All inputs at O.S V, Outputs open

V

p.A

-0.1

170
-1.6

mA

-50

-100

mA

72

mA

100

mA

VI

VIR

V

2.6
2.6

IOL

UNIT
V

-1.5

IOL = 16 mA
VI = 4.5 V

= 3.S V
VI = 0.4 V,
VCC = 5 V,
VCC = 5.25 V,
VCC = 5.25 V,

MAX

0.6

All inputs at 2 V, Outputs open

(see Note 5)

tAli typical values are at VCC = 5 V and T A = 25 ·C.
tHysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going input threshold voltage,
VT _. See Figure 4.
§Not more than one output should be shorted at a time and duration of the short circuit should not exceed one second.
NOTES: 3. The receiver input was high immediately before being reduced to 1.45 V.
4. The receiver input was low immediately before being increased to 1.45 V.
5. For SN55122, VCC = 5.5 V

switching characteristics. Vee'" 5 V. TA ... 25°e
TYP

MAX

tpLH Propagation delay time, low-to-high-Ievel output from R input

PARAMETER

TEST CONDITIONS
See Figure 1

20

30

tpHL Propagation delay time, high-to-Iow-Ievel output from R input

See Figure 1

20

30

. TEXAS'"

INSTRUMENTS
2-170

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

MIN

SN55122, SN75122
TRIPLE LlNE·RECEIVERS
PARAMETER MEASUREMENT INFORMATION
2.6 V

VCC

I+- '" 5

ns

90%

PULSE
GENERATOR
(See Note A)

--+t

t4- '" 5

ns

1:,..."=-__-..",,..,..,...,:1_+ _ _ _ _ 2.6 V
90%

1N3064

» ...._ ....--4t-0UTPUT

14--....~! tPLH
I

I
I 1 10%
I JI;..:.';';';'--OV
I

I
tPHL-
I

Vec = 5 V
3.5 -No load
TA - 25°C
3.0

CIl

CI

l!! 2.5

..

2.0

So
:::J

1.5

"0

>
:::J

0
I
0

>

VT-

VT+

1.0
0.5

o

o

0.4

0.8 1

1.4

1.8 2

VI-Input Voltage-V
FIGURE 2

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TEXAS 75265

2-171

SN55122, SN75122
TRIPLE L1NE·RECEIVERS
APPLICATION INFORMATION

r -1iasN5s122- - i
I

I

I

I

L.2~~~l~~J

I

I
I

L.2/~S~~l~l_J

FIGURE 3. SINGLE·ENDED PARTY LINE CIRCUITS

R
INPUT

OUTPUT

The high gain and built·in hysteresis of the
SN55122 and SN75122 line receivers enable them
to be used as Schmitt triggers in squaring pulses.

FIGURE 4. PULSE SQUARING

TEXAS . "
I

2-172

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

SN55138, SN75138
QUADRUPLE BUS TRANSCEIVERS
D1663, SEPTEMBER 1973-REVISED SEPTEMBER 198fl

•
•
•
•
•
•

•
•

SN55138 ... J PACKAGE
SN75138 ... D, J, OR N PACKAGE

Single 5-V Supply
High-Input-Impedance, High-Threshold
Receivers

(TOP VIEW)

Vee

GND
18
1R
1D
2D
2R
28
GND

Common Driver Strobe
TTL-Compatible Driver and Strobe Inputs
with Clamp Diodes
High-Speed Operation
100-mA Open-Collector Driver Outputs

48
4R
4D
5
3D
3R
38

Four Independent Channels
SN55138 ... FK PACKAGE

TTL-Compatible Receiver Output

ITOP VIEW)

o

description

cozu

The SN55138 and SN75138 quad bus
transceivers are designed for two-way data
communication over single-ended transmission
lines. Each of the four identical channels consists
of a driver with TTL inputs and a receiver with
a TTL output, The driver open-collector output
is designed to handle loads of up to 100 mA
open-collector. The receiver input is internally
connected to the driver output, and has a high
impedance to minimize loading of the
transmission line, Because of the high driveroutput current and the high receiver-input
impedance, a very large number (typically
hundreds) of transceivers may be connected to
a single data bus,
The receiver design also features a threshold of
2.3 V (typical), providing a wider noise margin
than would be possible with a receiver having
the usual TTL threshold. A strobe turns off all
drivers (high impedance) but does not affect
receiver operation, These circuits are designed
for operation from a single 5-V supply and
include a provision to minimize loading of the
data bus when the power-supply voltage is zero.

U

UCO

~t?Z>-- VCC

130n NOM
-q0UTPUT

OUTPUT

TEXAS . .
INSTRUMENTS
2-174

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55138, SN75138
QUADRUPLE BUS TRANSCEIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
SN55138

SN75138

UNIT

7

7

V

5.5

5.5

V

7

7

Supply voltage, VCC (see Note 1)
Input voltage
Driver off-state output voltage

V

150
150
See Dissipation Rating Table

Low-level output current into the driver output
Continuous total power dissipation (see Note 2)

mA

Operating free-air temperature range

-55 to 125

o to 70

°C

Storage temperature range

-65 to 150

-65 to 150

°C

lead temperature 1.6 mm (1/16 inch) from case for 10 seconds: 0 or N package

260

Case temperature for 60 seconds: FK package

260

lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package

300

°C
°C

300

°C

NOTES: 1. All voltage values are with respect to both ground terminals connected together.

2. In the FK and J packages, SN55138 chips are alloy mounted and SN75138 chips are glass mounted.
DISSIPATION RATING TABLE
PACKAGE

TA s 25°C
POWER RATING

D
FK

7.6
11.0
11.0
8.2
9.2

950 mW
1375 mW

J (SN55138)
J (SN7513B)

1025 mW

N

1150mW

DERATING FACTOR
ABOVE TA - 25°C

1375 mW

TA - 70°C
POWER RATING

mW/oe
mWloe
mWloe
mWloe
mWloe

TA - 125°C
POWER RATING

608mW
880mW

275 mW

880 mW

275 mW

656 mW
736 mW

recommended operating conditions
SN5513B
Supply voltage, Vec
High-level input voltage, VIH
low-level input voltage, Vll
High-level output current, IOH
low-level output current, IOl

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

2

3.2

2.9

Driver or strobe
Receiver

SN75138

MIN

Driver or strobe

0.8
1.5

1.8

-400

-400

100

100

Driver output

Receiver output

Operating free-air temperature, T A

-55

TEXAS

O.B

16
125

16
0

V
V

Receiver

Receiver output

UNIT

70

V
~A

mA
°e

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-175

SN55138, SN75138
OUA.DRUPLE BUS TRANSCEIVERS
electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
PARAMETER
Input clamp

VIK

voltage
High-level

VOH

output voltage
Low-level

VOL

output voltage

=

=

MIN TYP*

Driver or strobe

Vee

Receiver

= MIN,
VIL(R) = VIL max,

VIH(S)

Vee MIN,

VIH(D) = 2 V,
IOL = 100 mA

Driver
Receiver

II

MIN,

Vee

= 0.8 V,
Vee = MIN,
VIHISI = 2 V,
VIL(SL

-12 mA

=

=

IOH

IOL

2 V,

-400 ~A

=

VIH(R)

=

MAX

SN75138
MIN TYP; MAX

-1.5

-1.5

SN55138

TEST CONDITIONSt

2.4

3.5

2.4

3.5

UNIT
V
V

0.45

0.45

0.4

0.4

1

1

40

40

V

VIH min,

16 mA

Input current at
maximum input

II

=

MAX,

VI

=

Vee

Vee

= MAX,
= 5 V,
VIIS) = 2 V
Vee = MAX,
Vee = MAX,
VI(Sl = 2 V

VI

=

2.4 V

Vee

VI(R)

VI

Driver or strobe

Vee

Driver or strobe

mA

voltage
High-level
IIH

input current
Low-level

IlL

input current
Input current

with power off
Short-circuit

lOS

lee

output current §

Supply current

Receiver

Driver or strobe
Receiver
Receiver

Vee

=

0,

=

MAX

Receiver

Vee

All driver

Vee - MAX,

outputs low

VI(SI

All driver
outputs high

Vee

= 0.8 V
= MAX,
= 2 V,

VI

=

VI(R)

= 4.5 V,
0.4 V

= 0.45

= 4.5

300

25

300

-1

-1.6

-1

-1.6

mA

-50

~A

1.5

mA

-55

mA

V,

-50
1.1

V
-20

Vim)

VI(R)
VI(S)
Receiver outouts ooen

=2
=

1.5
-55

V,

~A

25

1.1
-18

50

65

50

65

42

55

42

55

3.5 V,

mA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recdmmended operating conditions, Parenthetical letters
D. R, and 5 used with VI refer to the driver input, receiver input. and strobe input, respectively.
*AII typical values are at Vee = 5 V, T A = 25 ·e.
§Not more than one output should be shorted at a time.

switching characteristics. Vee - 5 V. TA - 25°e
PARAMETER
tpLH
tPHL
tpLH
tPHL
tpLH
tpHL

FROM
(INPUT)

(OUTPUT)

TO

Driver

Driver

Strobe

Driver

Receiver

Receiver

TEST CONDITIONS

eL = 50 pF,
See Figure 1
eL = 15 pF,

RL

RL

See Figure 2

ttPLH .. propagation delay time, low-to·high-Ievel output
tpHL " propagation delay time, high-to-Iow-Ievel output.

TEXAS . "

2-176

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS, TEXAS 75286

=

50O,

= 400O,

MIN

TYP

MAX

15

24

14

24

18

28

22

32

7

15

8

15

UNIT
ns
ns
ns

SN55138, SN75138
QUADRUPLE BUS TRANSCEIVERS
PARAMETER MEASUREMENT INFORMATION
TEST
POINT

Vcc

FROM OUTPUT
UNDER TEST

~Rl

VCC

~ POINT
TEST

TCl

-=

DRIVER
INPUT

~r--~X""--3V

(Soe Note D)
STROBE
INPUT

1.5V
-

..J

\

I '--_ _ _ _--'

I -

-I

I.
DRIVER
OUTPUT

(Soo Note B)

tplH

12l

_ _ _ _.J

l.5V

1'- -

~~pCUE~VER

ov

114.f-----1.~I- tPlH

141.f-----1.~I- tPHl

5V

}\,.2_.5_V_ _ _ _--'!2.5V _ _

-OV

I

.

,..----4V

~.

~~e"

~

I
VOH

RECEIVER_ _ _ _
OUTPUT
J

lI,.5
l'

V

VOL

VOLTAGE WAVEFORMS

VOLTAGE WAVEFORMS

FIGURE 1. PROPAGATION DELAY TIMES
FROM DATA AND STROBE INPUTS

FIGURE 2. PROPAGATION DELAY TIMES
FROM RECEIVER INPUT

NOTES: A. Input pulses are supplied by generators having the following characteristics: tw = 100 ns, PRR '" 1 MHz, tr '" 10 ns, tf '" 10 ns,
Zo.=50 !l.
B. Cl includes probe and jig capacitance.
C. All diodes are 1 N916 or 1 N3064.
D. When testing driver input Isolid line) strobe must be low; when testing strobe input Idashed line) driver input must be high.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TEXAS 75265

2-177

SN55138, SN75138
QUADRUPLE BUS TRANSCEIVERS

TYPICAL CHARACTERISTICS t
DRIVER TRANSFER CHARACTERISTltS

DRIVER TRANSFER CHARACTERISTICS

6

6

>I

..

Vce=5V
VI(S)= 0.8 V
Load = 50 n to Vee

5

"'"

.e-..

>

'0

4

..

3

0

....
.

4

>
TA = 125°e

"

5

!"
'0

.!:

Q 2
I

Vee = 4.5 V

Q.

TA = 25°C

~

>I

0

I I
TA = -55 e

3

:;;

0

.!:

Q

l.

C

2

c

0"

~

>

o
o

o
o

4

3

2

STROBE·TO·DRIVER OUTPUT
TRANSFER CHARACTERISTICS

STROBE·TO·DRIVER OUTPUT
TRANSFER CHARACTERISTICS

6

..e-..

'0

>

.

0

6

>I

5

I

.

I I
I

"

Q

.e-.

TA = 25°C

.!:

0

C

Q
I
C

I

0>

3

VI(D) = 2 V
TA = 25°C
Load = 50 n to Vee

2

0>

Vee =5 V
VI(D) =2 V
Load = 50 n to Vee
2

3

.!:

TA = -55 e

o

Vee = 4.5 V

:;;

1o

2

o

5

'0 4
>

4

3

Vee = 5.5 V
Vee=5V

"'"
:l

TA = 125°e

~

I

l

Vee=5.5V
4

o

Vee = 4.5 V

o

Vl(s)-5trobe Input Voltage-V

2

3

Vl(s)-5trobe Input Voltage-V

FIGURE 6

FIGURE 5

toata for temperatures below DOC and above 7DoC is applicable to SN55138 circuits only.

TEXAS ."

2-178

4

FIGURE 4

FIGURE 3

&
:l

3

2

VI(D)-Driver Input Voltage-V

VI(D)-Driver Input Voltage-V

~

VI(S) =0.8 V
TA =25°e
Load = 50 n to Vee

Vee = 5.5 V
Vee=5V

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75285

4

SN55138, SN75138
QUADRUPLE BUS TRANSCEIVERS

TYPICAL CHARACTERISTICS t
RECEIVER TRANSFER CHARACTER ISTICS

=j

VCC= 5V
Load:
5f---I--+---1----l-

RECEIVER TRANSFER CHARACTERISTICS

6

5V

>I

.

400n

R _ _W..

~

l!i

..e-"

>

e-"

c:"

"

3 f--f---i--t~o:+-

~

~
.~

a:

...
.
a:

0

400n

4

VCC-5 V

I

......, ~
~~

VCC = 4.5 V ...........

3
2

"

0-

>

o

o

FIGURE 8

5

HIGH-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT (RECEIVER)

I

.

"

..
......

5

I

VCC=5V
VJ(R) = O.S V

=j

Q;

2

>I

.'"

l!i
"0

~ TA = 125°C

"\l

;Q.
; 3

:r-=-'"

,

:r-=-'"I

I~

o
o

10

15

20

25

'\
,"'\

2

35

40

VCC =5.5 V

g

'\."\

J:

VCC= 4.5 V'\

o
30

."'-

"'\ ,'\. '\.
'\ ~ '('"VCC=5V

~

'\ ~

5

...........

Q;

~

l.
a:
J:
0
>

...........

0

.
.......

VH~) = OI.S V
TA=25°C

,

4

>

~ ~TA = 25°C
TA=-55°~

4

3

VJ(R)-Receiver Input Voltage-V

HIGH-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT (RECEIVER)

0

V

~

FIGURE 7

3

."

All
diodes
1N914

2

VI (R)-Receiver Input Voltage-V

If 4

...."

\

a:

~

-a
>
...
e-"

10 kQ
"'

u

I

.....

R

VCC =5.5 V

.;
2 f--f---'---J.--ir+4---i".---I----I----i

5V

5

'"
l!i
"0

10 kn

~ 41==+==j--11

TA=25°C
Load:

o

5

10

15

"- i\.
,'\.
'\: [\.\

20

25

30

35

40

IOH(R)-High-Level Output Current-rnA

IOH(R)-High-Level Output Current-rnA

FIGURE 9

FIGURE 10

t Data for temperatures below OOC and above 70·C is applicable to SN5513B circuits only.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76285

2-179

SN55138, SN75138
QUADRUPLE BUS TRANSCEIVERS

TYPICAL CHARACTERISTICSt
LOW-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT (DRIVER OUTPUT)

LOW-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT (RECEIVER)
1.2

1.2

1.

.'"

I °
TA=-55C

Tl d

1..

= 25 0

1.0

~

co

.So

0.8

0
a;

0.6

::J

~

..J

~

..J

A

0.4

I

cc

::i 0.2
0

>

~

~

~

:

V

~

+'\'/,.~

::J

,..

1.0

'0

'0

>

VCC=4.5V
VI(D) = 2V
VI(S) = 0.8 V

::J

~

/"'"

0.6

~

A

0.4

C

::i 0.2

~

VCC=4.5V
VI(R) = 3.5 V

o

60
20
10
40
50
30
IOLIR)-Low-Level Output Currnet-rnA

~
o

~~

50

I

I

I

i'.I

°
TA=125,25 C

1.2

TA = _55°C

~::J
u 1.0

J

100

~

150

V

200

.

TA = 25°C

1.4

+--+---+---1---1
/

/

::J

Q.

f--+--+--+---+-I>>1->

It)

..

0.6

f---+--+---r--~

~

.L

0.4

1-_ _+--_-+-__+--__ U

~

'3
cr:

II

U

ES

r

TA = 25°C, _55°C
0.2

o

I

0'

2

3

~

TA=125C

o

4

5

2

6

VI(R)-Receiver Input Voltage-V

3

4

It)

~ru

U

u
-> >f---

5

VI(R)-Receiver Input Voltage-V

FIGURE 13

FIGURE 14

tOata for temperatures below ooe and above 70~e is applicable to SN55138 circuits only.

TEXAS ~

INSTRUMENTS
2-180

300

v

rr

.5 0.8

,..

250

, RECEIVER INPUT CURRENT
vs
RECEIVER INPUT VOLTAGE
1.6 .--------,r----,---,.----,----,
VI(S) = 2 V

1.6

.!.c

~

FIGURE 12

RECEIVER INPUT CURRENT
vs
RECEIVER INPUT VOLTAGE

E

r- ;;--

10L(D)-Low-Level Output Current-rnA

FIGURE 11

«

~

0.8

I

VCC=5V
1.4 VI(S) =2 V

1/

TA = _55°C

ii
..J
..J

t

rou

~

So
::J

0

o

oU

POST OFFICE BOX 655303. DALlAS. TEXAS 76265

6

SN55138. SN75138
QUADRUPLE BUS TRANSCEIVERS

TYPICAL CHARACTERISTICS t
SUPPL Y CU RRENT
vs
SUPPLY VOLTAGE
(ALL DRIVER OUTPUTS LOW)

SUPPLY CURRENT
vs
SUPPLY VOLTAGE
80~-----------------r---r---

80

VIIS) = 0.8 V
70 VIID) = 2 V
Driver loads = 1



"6.
a.
::J

'"UI
9

TA = 25°C
70 VIIS) = 0.8 V
Driver loads = 1 kn to 5 V

if

30

h

~~

~ V:;A = 125°C

V

Ii ' / TA = _55°C

20
10

o

o

~

V/y

10r--1---+~~--~--+-~r--+--~

~

2

3

5

4

7

6

2

8

Vee-SupplyVoltage-V

FIGURE 15

FREE·AIR TEMPERATURE
30

Vee - 5 V
Driver load: CL = 50 pF, RL = 50 H, See Figure 1
28 Receiver load: CL = 15 pF, RL = 400 n, See Figure 2

24

j.:

20

.E~

i;"
a; 16
Q

c:
0

.~

'"a.co

...e

12
8

--

I

..

I

~--t~\..\"\lS'O.1~

--

__

~

'"E

tpLHIO~-

I

tpILH(~.D)

20

tPHL(D·D)

1 -I

0

'"a.

10

tPHL(R·R)

co

...e

tP~LlRtl

I
40

60

---

tPLH(D·D)

c:
.~

.I.~

20

I

Q

W\..

0

n. See Figure 1
tPHL(S·D)

j.:
>co
-;; 15

~

1--

40

Driver load: CL "" 50 pF, RL = 50

R --tlHl )

5

4

o

8

Receiver load: Cl":' 15 pF, RL 400.n, See Figure 2
TA = 25°C

c:

tpHLlD·DI

-60 -40 -20

7

6

PROPAGATION DELAY TIMES
vs
SUPPLY VOLTAGE

32

c:

5

4

FIGURE 16

PROPAGATION DELAY TIMES
vs

.,

3

vee-SupplyVoltage-V

o

80 100 120 140

4.5 4.6 4.7 4.8 4.9

5

5.1 5.2 5.3 5.4 5.5

Vee-Supply Voltage-V

TA-Free·Air Temperature-oe

FIGURE 18

FIGURE 17
tOata for temperatures below O·C and above 70·C is applicable to SN55138 circuits only.

TEXAS . "

INSTRUMENlS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2·181

SN55138, SN75138
QUADRUPLE BUS TRANSCEIVERS

TYPICAL CHARACTERISTICS
DRIVER PROPAGATION DELAY TIMES

RECEIVER PROPAGATION DELAY TIMES

vs

vs

LOAD CAPACITANCE

LOAD CAPACITANCE
16

..

25 1--+--1-+--<-:-;

f
~

I:

I

20

j.:

6
.~

a~

E

I-''''F--+-+-

....

151--+-~__~~~~

W"'\.

j.:

10

>
co
-;;

8

c

I:

10

0
.;:;
co
co
co.
~

I--+--I-+--+-~-+--t--f---+--I
I--t---+-~-+-

6

~~

-

~

~

:::::: ~\"'.""
W\..:

'"

....
5

~
--:-:::

12

~

1;'
~

VCC = 5 V
RL = 400 n, See Figure 2
TA = 25°C

14

VCC = 5 V

RL = 50 n, See Figure 1
TA = 25°C

4
2

o

o

10

CL -Load Capacitance-pF

20

30

40

50

60

70

80

CL -Load Capacitance-pF

FIGURE 19

FIGURE 20

APPLICATION INFORMATION
5V

5V

P

loon

r--j

I
I
@I>--'-I-@

50 ft Belden #8795
100·n Telephone Cable

L.!/~5~3~
--3V
---2V

---\,...._ _ ov
- - - - - - --OV

TYPICAL VOLTAGE WAVEFORMS

FIGURE 21. POINT·TO-POINT COMMUNICATION OVER 50 FEET OF TWISTED PAIR AT 5 MHz

TEXAS .".
2-182

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TeXAS 76265

SN55138, SN75138
QUADRUPLE BUS TRANSCEIVERS

APPLICATION INFORMATION
5V

5V

loon

loon

-==;;:--4 V

2V
OV

---4V
®

2V
OV
TYPICAL VOLTAGE WAVEFORMS

FIGURE 22. PARTY-LINE COMMUNICATION ON 500 FEET OF TWISTED PAIR AT 1 MHz

1000 It RG·53

I
@I>-..:..I..... @

or equivalent

~~5~~

(er-f-_~j

-=:-=4V

1'( --_ -t-~~@+-~---f
__ _ ov L -- ~- -- ~

__
-.3_ _ _....

4V

2V

---------------OV

- 5V

@

-==:: @t-- I -

~

==::

~-3V

\-- I

TYPICAL VOLTAGE WAVEFORMS

FIGURE 23. POINT-TO-POINT COMMUNICATION OVER 1000 FEET OF COAX AT 1 MHz

TEXAS .."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-183

2-184

5N55157,5N75157
DUAL DIFFERENTIAL LINE RECEIVER
02300, SEPTEMBER 1980-REVISEO SEPTEMBER 1986

SN55157 ... JG PACKAGE
SN75157 ... D, JG. OR P PACKAGE

•

Meets EIA Standards RS-422-A and
RS-423-A

•

Meets Federal Standards 1020 and 1030

•

Operates from Single 5-V Power Supply

•

Wide Common-Mode Voltage Range

(TOP VIEW)

•

High Input Impedance

•

TTL-Compatible Outputs

l I N + [ ] 8 Vee
lOUT 2
7
l1N20UT 3
6
21N+
GND 4
5
21N-

logic symbol t

•

High-Speed Schottky Circuitry

•

8-Pin Dual-In-Line Package

•

Similar to uA9637AC except for Corner
VCC and Ground Pin Positions

.at>
(2) lOUT
l1N21N+

(3) 20UT

21N-

description
The SN75157 is a dual differential line receiver
designed to meet EIA standards RS-422-A and
RS-423-A and Federal Standards 1020 and
1030. It utilizes Schottky circuitry and has TTLcompatible outputs. The inputs are compatible
with either a single-ended or a differential-line
system, The device operates from a single 5-volt
power supply and is supplied in an 8-pin dual-inline package and small outline package,

tThis symbol is in accordance with ANSI/IEEE Std 91·1984 and
lEG Publication 617·12.

logic diagram

The SN55157 is characterized over the full
military temperature range of - 55°C to 125°C.
The SN75157 is characterized for operation from
ooe to 70°C.

lIN+~l)
.rr
(2)

lOUT

l1N- f7)

2IN+~6)
.rr
(31 20UT
21N- (5)

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS

VCC
------------~~--VCC

SO fl NOM

INPUT--~--~~-1~"----~

OUTPUT

CURRENT
SOURCE

PRODUCTION DATA d.cumants oonlain information
current as of publication data. Products conform to

specifications par the terms of TUls Instruments

~':'=~ri;a{::1~1i ~=:i~~i:r :.~o::~::!It:~~s not

Copyright © 1980, Texas Instruments Incorporated

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-185

SN55157, SN75157

DUAL DIFFERENTIAL LINE RECEIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) ...................................... -0.5 V to 7 V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 15 V
Differential input voltage (see Note 2) ...............•......................... ± 15 V
Output voltage (see Note 1) ......................................... -0.5 V to 5.5 V
Low-level output current ................................................... 50 mA
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 3):
SN55157 JG package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1050 mW
SN75157 D package ................................................. 725 mW
JG package ............................................... , 825 mW
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1000 mW
Operating free-air temperature range: SN55157 .......................... -55°C to 125°C
SN75157 ............................. ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds JG package ............ 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds D or P package ......... 260°C
NOTES:

1. All voltage values, except differential input voltage, are with respect to the network ground terminal.
2. Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.
3. For operation above 25°e free-air temperature, derate the SN55157 JG package to 672 mW at 70 0 e at the rate of B.4 mW/oe,
the SN75157 JG package to 52B mW at 70 0 e at the rate of 6.6 mW/oe, the D package to 464 mW at 70 0 e at the rate
of 5.B mW/oe, and the P package to 640 mW at 70 0 e at the rate of B.O mW/oe. In the JG package, SN55157 chips are
alloy mounted and SN75157 chips are glass mounted.

recommended operating conditions
Supply voltage, Vee

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

±7

V

eommon-mode input voltage, Vie

I
I

Operating free-air temperature, T A

SN55157

-55

25

125

SN75157

0

25

70

°e

electrical characteristics over recommended ranges of supply voltage. common-mode input voltage.
and operating free-air temperature (unless otherwise noted)
PARAMETER

TEST CONDITIONS

Threshold voltage (VT + and VT-I

Vhys

Hysteresis (VT +

VOH

High-level output voltage

VID

VOL

Low-level output voltage

VIQ

- VT-I

. Input current

0.2

-0.4

See Note 5

MAX

Saa Nota 4
-0.2

VT

II

MIN TYpt

0.4
70

= 0.2 V,
= -0.2 V,
Vee = 0 to 5.5
See Note 6

lOS

Short~circuit output current:l:

Va

lee

Supply current

VID

= 0,
= -0.5

V,

= -1 rnA
= 20 rnA
IVI = 10 V
IVI = -10 V
VID = 0.2 V
10

2.5

10

V,

No load

3.5

V

0.35

0.5

1.1

3.25

-75 -100
35

V
mV

-1.6 -3.25
-40

UNIT

50

V
rnA
rnA
rnA

tAli typical values are at Vee = 5 V, TA = 25°e.
*Only one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
NOTES: 4. The algebraic convention, where the less-positive (more-negative) limit is designated as minimum, is used in this data sheet
for threshold levels only.
5. The expanded threshold parameter is tested with a 500-11 resistor in series with each input.
6. The input not under test is grounded.

TEXAS . .

INSTRUMENTS
2-186

POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

SN55157, SN75157

DUAL DIFFERENTIAL LINE RECEIVER
switching characteristics, VCC = 5 V. TA = 25°C
PARAMETER

MIN

TEST CONDITION

tPLH

Propagation delay time, low-to-high·level output

tpHL

Propagation delay time, high-to-Iow-Ievel output

CL

~

15 pF,

TYP

MAX

15

25

13

25

See Figure 1

PARAMETER MEASUREMENT INFORMATION
OUTPUT

INPUT

392n

INPUT

50%

50%

I

I

-0.5 V

I
14---1
tpHL

:....ttPLH
I

CL = 15 pF

(see Note AI

!1.5V

VOLTAGE WAVEFORMS

TEST CIRCUIT
NOTES:

"'\

OUTPUT

3.92 kn

A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: tr :5 5 ns, tf :5 5 ns, PRR
duty cycle = 50%.

s

5 MHz,

FIGURE 1, TRANSITION TIMES

TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE

OUTPUT VOLTAGE

4

vs

vs

DIFFERENTIAL INPUT VOLTAGE

DIFFERENTIAL INPUT VOLTAGE

vch

=

4

4.~5 V

VCC = 5.25 V

TA~25°C

-TA = 25°C

>I

I

3

'""
:l

.
e-"

I
I

a

0

>

2

"

0
I
0

VIC = ±7 V

>

VIC=O
I
I

-50

a

3

I
I VIC=

'""
:l

: VIC= ±7 V
I
I
I
I
I
I
I
I
I
I

5

2

e-

VIC = ±7 V

VIC = ±7 V:

"

:

0
I
0

I
I
I
I

>

VIC~O

:
a

50

a

I
I
I
I

0

>

I
I

a
-100

>I

I

VIC=

--

I
I

100

-50

-100

a

50

100

VID-Differential Input Voltage-·mV

VID-Differential Input Voltage-mV

FIGURE 3

FIGURE 2

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 75265

2-187

SN75157

DUAL DIFFERENTIAL LINE RECEIVER
TYPICAL CHARACTERISTICS
HIGH·LEVEL OUTPUT VOLTAGE

LOW·LEVEL OUTPUT VOLTAGE

.s

.s
HIGH·LEVEL OUTPUT CURRENT
5.0

:r&

LOW·LEVEL OUTPUT CURRENT
0.6

I[

VCC=5V _
V,O = 0.2 V
TA=25°C -

4.5
4.0

:r&

l!!

l!!

~ 3.5

i

..,.'"
o

""" "-

3.0
2.5

j 2.0
J:

:f

1.5

6I 1.0
>

0.5

o

VC~=5~

0.5 _V,O = -0.2 V
TA = 25°C

o

-10

"0

>
...

"

0.4

...'a."

'"

,,/

'"

0 0.3
a;

.,,.
..J

""

~ 0.2

/'

/

I
00.1

..J

'I\.

>

"\

o
o

-20 -30 -40 -50 -60 -70 -80

5

10

15

FIGURE 4

FIGURE 5
SUPPLY CURRENT

.s
SUPPLY VOLTAGE
100
No"oad I
90

r- I nputs open

80 _TA=25°C
c(

E 70
60

~

/

u

50
>15.
a. 40

!:

//

/

30

/

20

/

10

o

"..-

o

,,/

234

5

6

VCC-Supply Voltage-V

FIGURE 6

TEXAS . "
INSTRUMENTS
2-188

20

25

30

35

IOL -Low·Level Output Current-mA

'OH-High·Level Output Current-mA

'1u'"

~

~

0
..J

I'\.

.!.c
e

/

/"

POST OFFICE BOX 865303 • DALLAS. TEXAS 76265

7

8

40

SN75157

DUAL DIFFERENTIAL LINE RECEIVER
TYPICAL APPLICATION DATA
+5V

TWISTED PAIR

+5 V

+5V

FIGURE 7. RS·422-A SYSTEM APPLICATIONS

TEXAS .",
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-189

2-190

SN55158, SN75158
DUAL DIFFERENTIAL LINE DRIVERS
02292, JANUARY 1977-REVISEO SEPTEMBER 1986

•
•
•
•
•
•
•

SN55158 , , . JG PACKAGE
SN75158, , ,D, JG, OR P PACKAGE

Meets EIA Standard RS-422-A
Single 5-V Supply

(TOP VIEW)

lZ[]8 Vee

Balanced-Line Operation

1Y
1 A.
GND

TTL-Compatible
High Output Impedance in Power-Off
Condition

2
3

4

7
6
5

2Z
2Y
2A

High-Current Active-Pullup Outputs
Short-Circuit Protection

•

Dual Channels

•

Input Clamp Diodes

description
The SN55158 and SN75158 are dual complementary-output line drivers designed to satisfy the
requirements set by the EIA Standard RS-422-A interface specifications, The outputs provide
complementary signals with high-current capability for driving balanced lines, such as twisted pair, at normal
line impedance without high power dissipation, The output stages are TTL totem-pole outputs providing
a high-impedance state in the power-off condition,
The SN55158 is characterized for operation over the full military temperature range of - 55 °e to 125 °e,
The SN75158 is characterized for operation from ooe to 70 oe,
logic symbol t

logic diagram (positive logic)

~1Y

(21 1Y

1A-

lA (31

~1Z

lZ
2A (51

~2Y

2Y

2Z

2A

----vb----E!. 2Z

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12,

PRODUCTION DATA documants contain information
CU"lnt as of publication date. Products conform to
specifications per the tarms of Texas Instruments

:=~:~~;at::I:ri ~r:~:~ti:; lI~D::::::':~~ not

Copyright © 1986, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TEXAS 75265

2-191

SN55158. SN75158
DUAL DIFFERENTIAL LINE DRIVERS
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT
vcc-------e------~

TYPICAL OF ALL OUTPUTS

___

-----e----- V CC

4 k!J
NOM

INPUT

9!J NOM

OUTPUT
GND----.-----------~

- - -....--GND

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN55158.......................... - 55°C to 125°C
SN75158 ............................. ooC to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65°C to 1 50°C
Lead temperature 1,6 mm (1/16 inch) fr()m case for 60 seconds: JG package ........ , .. 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package. . . . . . . .. 260°C
NOTES: 1. All voltage values except differential output voltage VOD are with respect to network ground terminal. VOD is at the Y output

with respect to the Z output.
2. In the JG package, SN55158 chips are alloy mounted and SN75158 chips are glass mounted.
DISSIPATION RATING TABLE
PACKAGE

TA :5 25°C

DERATING FACTOR

POWER RATING

ABOVE TA - 25°C

D

725 mW

JG (SN55158)

1050 mW

JG (SN75158)
p

1000 mW

825 mW

TA - 70°C
POWER .RATlNG

5.8 mW/oC
8.4 mW/oC
6.6 mW/oC
8.0 mW/oC

TA - 125°C
POWER RATING

464 mW

N/A

672 mW

210mW

528 mW

N/A

640 mW

N/A

recommended operating conditions
SN55158
Supply voltage, Vee

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

High-level input voltage, VIH

2

2

Low-level input voltage, VIL
High-level output current, IOH
-55

TEXAS •
INSTRUMENTS
POST OFFICE BOX S55303 • DALLAS. TEXAS 75265

UNIT
V
V

0.8

0.8

V

-40

-40

rnA

40

rnA

70

°c

40

Low-level output current, IOL

Operating free-air temperature, T A

2-192

SN75158

MIN

125

0

SN55158. SN75158
DUAL DIFFERENTIAL LINE DRIVERS

electrical characteristics over operating free-,air temperature range (unless otherwise noted)
PARAMETER
VIK

Input clamp voltage

VOH

High-level output voltage

VOL

Low-level output voltage

I V ODll Differential output voltage
I V OD21 Differential output voltage
Change in magnitude of
L1I V ODI
differential output voltage §
Common-mode output volta,ge'

Voe
L1I V oel

TEST CONDITIONst
Vee = MIN,

11= -12 mA

Vee - MIN,

VIL - 0.8 V,

VIH

Vee - MIN,

= 2 V,
= MAX,
Vee = MIN

10L

10 = 0

Vee

10

II

Output current with power off

input voltage

Vee

= MAX,

VI

= 5.5 V

VI
VI

= 2.4 V
= 0.4 V

IIH

High-level input current

IlL

Low-level input current

Vee = MAX,
Vee = MAX,

lOS

Short-circuit output current 11

Vee

lee

Supply current (both drivers)

Vee = MAX,
No load,

= MAX

-0,9

-1.5

3.0
0.2

2

0.4

V
V

±0.02

±0.4

1.8

3

1.4

3

1.5

3

±0.01

±0.4

±0.01

±0.4

0.1

100

0.1

100

-100

-0.1

±100

1

1

40
-40

= 25°e

-100

±100

-1

-1.6

-90

-150

37

50

'--40

V

3.5 2VOD2
3.0

3

-0.1

UNIT

V

±0.4

Inputs grounded,
TA

MAX

1.9

= 6V

Vee = 0 Iva = -0.25 V
Iva = -0.25 to 6 V

0.4

TYP*

±0.02
See Figure 1

= MIN or MAX

MIN

2.4

3.5 2VOD2
3.0

RL= 1000,

Vee - MIN

Input current at maximum

-1.5

3.0
0.2

= MIN

IVo

-0,9

2

Vee - MAX

Vee

MAX

= 40 mA

VIH

SN75158

TYP*

2

10H = -40 mA
VIL - O.B V,

Vee

Change in magnitude of
common-mode output voltage §

= 2 V,

SN55158
MIN

V
V
V
V

~A

mA

40

~A

-1

-1.6

mA

-90

-150

mA

37

50

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
* All typical values are at Vee = 5 V and TA = 25°e except for Voe, for which Vee is as stated under test conditions.
§ L1IVOD I and L1IVoe I are the changes in magnitudes of VOD and Voe, respectively, that occur when the input is changed from a high
level to a low level.
, In EIA Standard RS-422-A, Voe, which is the average of the two output voltages with respect to ground, is called output offset voltage, VOS.
#Only one output should be shorted at a time. and duration of the short-circuit should not exceed one second.

switching characteristics. Vee

=

5 V. TA

=

25°e
TEST

.PARAMETER

CONDITIONS

SN55158
MIN

SN75158

TYP

MAX

MIN

TYP

MAX

UNIT

tpLH

Propagation delay time, low-to-high-Ievel output

See Figure 2,

16

25

16

25

ns

tpHL

Propagation delay time, high-to-Iow-Ievel output

Termination A

10

20

10

20

ns

tpLH

Propagation delay time. low-to-high-Ievel output

See Figure 2,

13

20

13

20

ns

tpHL

Propagation delay time, high-to-Iow-Ievel output

Termination B

9

15

9

15

ns

tTLH

Transition time, low-to-high-Ievel output

See Figure 2,

4

20

4

20

ns

tTHL

Transition time, high-to-Iow-Ievel output

Termination A

4

20

4

20

ns

10

%

Overshoot factor

See Figure 2,
Termination C

10

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303

~

DALLAS. TEXAS 75265

2-193

SN55158, SN75158
DUAL DIFFERENTIAL LINE DRIVERS

PARAMETER MEASUREME""T INFORMATION

FIGURE 1. DIFFERENTIAL AND COMMON-MODE OUTPUT VOLTAGES
INPUT
V OUTPUT

Z OUTPUT

T

v-------,
CL - 15 pF ...L

v
100

CL-30pF
(See Note BI

n

Z

(See Note BI

Z

CL - 15PFl
(See Note BI*,

TERMINATION A

-=

TERMINATION B

TERMINATION C

TEST CIRCUIT

OVERSHOOT

,oo%;=r;'I .

-,.;.:1.;;0.:.:%~_ _ 0 V

OIFFERENTIAL
OUTPUT

10%

O%t~~

r-

10%

I

I

OVERSHOOT

tTLH-+i

VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: Zo ~ 50
B. CL includes probe and jig capacitance.

n,

tw

=

25 ns, PRR ,; 10 MHz.

FIGURE 2. SWITCHING TIMES

TEXAS . "
INSTRUMENTS
2-194

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN55158, SN75158
DUAL DIFFERENTIAL LINE DRIVERS
TYPICAL CHARACTERISTICSt
OUTPUT VOLTAGE
vs
DATA INPUT VOLTAGE

OUTPUT VOLTAGE
vs
DATA INPUT VOLTAGE
6

6

vc6 = 51V
No load

No load
TA = 25°C

5

5

>

1

'"
"'6

>

VCC - 5.5 V

4

III

1

III

'"o

TA' = 125°C

I

4

j]!

!!!

>
:;
Q.
:;

VCC = 5 V

3

0

~::I 3

VCC = 4.5 V

S::I

9o

2

1

0

0

\ T i = j5 C

2

TA

>

>

o

o

2

o

4

3

o

2

FIGURE 3

FIGURE 4

HIGH-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

>

4

1
III

'"
"'6
....>
!!!

3

::I

0.4
TA 1= 251oC

V~C

-

~.5 V

r-..
r-..

2

I

>

1

cc = 5 V

0.3

III

~K

!!!'"

"'6

~

>...
::I

0.2

/

c.

:;
0

VCC = 4.5 V

1

0

1\
o

>

o

-20

-40

-60

-80

0.1

/

~\

o
-100 -120

o

/

10

Vcc = 4.5 V

20

30

40

50

60

70

80

IOL -Output Current-rnA

FIGURE 5

ooe

~

V

IOH-Output Current-rnA

tOata for temperatures below

V

V

//

1

..J

J:

0

>

.1.

VCC = 5.5 VA

J
r--....'
1-r--'\

r--. I

Q.

:;
0

LOW-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

TA = 25°C

----r--

4

3

VI-Data Input Voltage-V

VI-Data Input Voltage-V

5

= -55°C

FIGURE. 6

and above 70 0 e are applicable to SN55158 circuits only.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 75265

2-195

SN55158, SN75158
DUAL DIFFERENTIAL LINE DRIVERS
TYPICAL CHARACTERISTICSt
OUTPUT VOLT AGE
vs
FREE-AIR TEMPERATURE

4.0

Vc~= 5 ~.I

3.5

>

3.0

'"
l'J'"

2.5

~

I,

I

_20 ItI

PROPAGATION DELAY TIMES
vs
FREE-AIR TEMPERATURE

30

~l

_40 ItI
~Al
\/OHliOH ~ ,..--;:.--

,.---~

I

=



1.0
0.5

o

-75 -50 -25

0

25

50

75

100 125

-75 -50 -25

TA - Free-Air Temperature - °c

42

No load I
TA = 25°C

40

50

U

>-

~
~-r<

~....",

Q.

,('oQ

Q.

::I

30

I

.1.

Vee = 5 V
Input grounded
Outputs open

C":>~o

~....",

38

r----..

~::I

u

~

>-

OQ0

36

"" ""-

Q.

::I

U)

I

34

u

20
10

o

o

.,./

9

!
V

32

3

2

4

5

6

7

8

30
-75 -50 -25

Doe

25

FIGURE 10

FIGURE 9
tData for temperatures below

0

50

75

T A - Free-Air Temperature- °c

vee-Supply Voltage-V

and above 70 0 e are applicable to SN55158 circuits only.

TEXAS . "

INSTRUMENTS
2-196

~

Q.

/ ' , ,('oQ

I

u

9

100 125

E

I
c

~

40

U)

75


C.

g.

V

V

40

CI)

I

u

9

20

o
0.1

0.4

4

10

40

100

f - Frequency - MHz

FIGURE 11

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-197

2-198

SN55173
QUADRUPLE DIFFERENTIAL LINE RECEIVER
DECEMBER 1988

•

Meets EIA Standards RS-422-A. RS-423-A.
and RS-485

•

Meets CCITT Recommendations V.10.
V.11. X.26. and X.27

•

J PACKAGE
(TOP VIEW)

3-State Outputs

•

Common-Mode Input Voltage
Range . . . - 12 to 12 V

•

Input Sensitivity ...

•

Input Hysteresis ... 50 mV Typ

•

High Input Impedance . . . 12 kO Min

•

Operates from Single 5-Volt Supply

± 200

G

38
FK PACKAGE
ITOP VIEW)

Low Power Requirements

•

Plug-In Replacement for AM26LS32

U
«ccUUcc
~~Z>'Oj"

3

description
The SN55173 is a monolithic quadruple
differential line receiver with three-state outputs.
It is designed to meet the requirements of EIA
Standards RS-422-A. RS-423-A. and RS-485
and several CCITT recommendations. The
device is optimized for balanced multipoint bus
transmission at rates up to 10 megabits per
second. The four receivers have an ORed pair of
enables in common. Either G being high or G
being low enables all of the receivers. The device
features high input impedance. input hysteresis
for increased noise immunity. and input
sensitivity of ± 200 mV over a common-mode
input voltage range of - 12 to 12 V. The
SN55173 is designed for optimum performance
when used with the SN55172 or SN55174
quadruple differential line drivers.

2

1 20 19

4

18

5

17

6

16

7

15

8

14
9 1011 1213

NC-No internal connection

logic symbol

The SN55173 is characterized for operation from
-55°C to 125°C.

not

3Y
3A

GND

•

==~~i;a{nr:I~'i ~r::\:~:r lI~o=::::,:;:.s

G

2Y
2A
28

mV

PRODUCTION DATA d••umonls contoin informati••
• urrant o. of publicati.n data. Products •••form t.
spacificatioRs par the tarms of TaXI. Instrumants

48
4A
4Y

1Y

Designed for Multipoint Bus Transmission on
Long Bus Lines in Noisy Environments

•

Vee

18
1A

lA

(3)

1Y

1B

2A

(5)

28

3A

(11)

38
4A

(13)

2Y
3Y
4Y

48

Copyright © 1988, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-199

SN55173
QUADRUPLE DIFFERENTIAL LINE RECEIVER
logic diagram (positiv., logic)

FUNCTION TABLE (EACH RECEIVER)
DIFFERENTIAL

ENABLES

A-B
VID '" 0.2 V

(3) 1Y

-0.2 V

<

VIO

s

VIO

<

0.2 V

-0.2 V

X
(5) 2Y

3A

OUTPUT

G
Ii'
X
H
X
H
X

G
X

Y

L

H
1
1

L

X
L

H

X

L

L

L

H

Z

H = high level
L = low level
X = irrelevant
?
indeterminate
Z = high-impedance loffl

(10)
(11) 3Y

3B (9)
4A (14)
(13) 4Y
4B

(15)

schematics of inputs and outputs
EQUIVALENT OF A OR B INPUT

EQUIVALENT OF G OR

G INPUT

VCC------1---~-VCC----------~-----

8.3 kll
NOM
16.8 kll
NOM
INPUT _ _-1~~~
INPUT--_.....- I

TEXAS •
INSTRUMENTS
2-200

POST OFFICE BOX 655303 • DALlAS, TEXAS 75266

TYPICAL OF ALL OUTPUTS

SN55173
QUADRUPLE DIFFERENTIAL LINE RECEIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage, A or B inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 25 V
Differential input voltage (see Note 2) ......................................... ± 25 V
Enable input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Low-level output current ................................................... 50 mA
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 3) . . . . . .. 1375 mW
Operating free-air temperature range .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 65°C to 150°C
Case temperature for 60.seconds: FK package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds. . . . . . . . . . . . . . . . . . . . .. 300°C
NOTES: 1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2.

Differential~input

voltage is measured at the noninverting input with respect to the corresponding inverting input.

3. For operation above 25 De free·air temperature, derate to 275 mW at 125 De at the rate of 11.0 mW/De.

recommended operating conditions
Supply voltage, Vee

MIN

NOM

MAX

UNIT

4.5

5

5.5
±12
±12

V

Common-mode input voltage, VIC

Differential input voltage, VID
Low·level input voltage, VIL
High-level output current, IOH
Low-level output current, IOL

-55

Operating free-air temperature, T A

V
V

2

High-level input voltage, VIH

V

0.8
-400
16
125

V
~A

mA
De

..If

TEXAS
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-201

SN55173
QUADRUPLE DIFFERENTIAL LINE RECEIVER
electrical characteristics over recommended ranges of common~mode input voltage. supply voltage.
and operating free-air temperature (unless otherwise noted)
VTH

Differential-input high-threshold voltage

PARAMETER

TEST CONDITIONS
Vo = 2.7 V,
10 = -0.4 mA

VTL

Differential-input low-threshold voltage

Vo

Vhvs
VIK
VOH

Hysteresis §
Enable-input clamp voltage

11= -18 mA

High-level output voltage

VID

=

200 mV,

VOL

Low-level output voltage

VID

=

-200 mV,

IOZ

High·impedance-state output current

II

Line input current

IIH

High·level enable-input current

IlL

Low-level enable-input current

Vo - 0.4 V to 2.4 V
Other input at 0 V,
I VI = 12 V
See Note 4
I VI = -7 V
VIH - 2.7 V
VIL = 0.4 V

lOS

Short-circuit output current'

ICC

Supply current

= 0.5 V,

10 = 16 mA

MIN

TYpt

MAX
0.2

-0.2t

V
V

50
-1.5
IOH = -400 p.A

UNIT

2.5

IIOL = 8 mA
IIOL = 16 mA .

0.45
0.5
±20
1
-0.8
20
-15

Outputs disabled

mV
V
V
V
p.A
mA

p.A

-100

~A

-85

mA

70

mA

tAli typical values are at VCC = 5 V, TA = 25°C.
.
tThe algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for threshold
voltage levels only.
§Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going input threshold voltage,
VT _. See Figure 4.
'Not more than one output should be shorted at a time and the duration of the short-circuit should not exceed one second.
NOTE 4: Refer to EIA Standard RS-422-A and RS-423-A for exact conditions.

switching characteristics. Vee'" 5 V. TA ... 25°e
PARAMETER

TYP

MAX

20

35

ns

Propagation delay time, high-to-Iow-Ievel output

VID = -1.5 V to 1.5 V, CL = 15 pF,
See Figure 1

TEST CONDITIONS

22

35

ns

Output enable time to high level

CL = 15 pF,

See Figure 2

17

22

ns

tPZL

Output enable time to low level

CL-15pF,

See Figure 3

25

ns

tpHZ

Output disable time from high level

CL = 5 pF,

See Figure 2

20
21

30

ns

tplZ

Output disable time from low level

Cl = 5 pF,

See Figure 3

30

40

ns

tpLH

Propagation delay time, low-to-high-Ievel output

tPHL
tpZH

TEXAS . . ,
INSTRUMENTS
2-202

POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

MIN

UNIT

SN55173

QUADRUPLE DIFFERENTIAL LINE RECEIVER
PARAMETER MEASUREMENT INFORMATION

~~V---2.5V

INPUT

1L-

::.J~ v

>-+-'-OUTPUT

tPlH...j

~

-2.5 V

..... !t-tPHL

'

~

II----VOH

I

OUTPUT

I

1.3V

1.3V

VOL

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 1. tPLH. tPHL
VCC

~~~.-~~~.,~~~S~2kn

:Fvt:--

INPUT

1.3 V

I

(see Note CI

I

tPZH+!M-

I

3V

1.3 V

--OV

tPHZ'" ....

I

0.5 V

"-VOH

~~
l'

OUTPUT
S1 open

1.3 V
---=OV

S1 closed
=1.4V

500

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 2. tPHZ. tpZH
NOTES: A. The input pulse is supplied by a generetor having the following characteristics: PRR
tr S 6 ns, tf s 6 ns, Zout = 50 O.
B. CL includes probe and jig capacitance.
C. All diodes are 1N91 6 or equivalent.
D. To test the active-low enable ~, ground G and apply an inverted Input waveform to

s

1 MHz. duty cycle

50%.

n-.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 656303 • DALlAS. TEXAS 75265

2-203

5N55173

QUADRUPLE DIFFERENTIAL LINE RECEIVER
PARAMETER MEASUREMENT INFORMATION

~~

---3V

INPUT

1.3 V

1.3 V

I

tPZL
S2 open

I

-.Iff-

I

=\:

OUTPU~

-..

1.3V

OV

M- tpLZ

I S2 closed
~~1.4V

-L.~:

VOL

0.5 V

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 3. tpZL. tPLZ
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR "
tr " 6 ns, tf " 6 ns, Zout = 50 0.
B. CL includes probe and jig capacitance.
C. All diodes are 1 N916 or equivalent.
D. To test the active·low enable G. ground G and apply an inverted input waveform to G.

1 MHz. duty cycle

50%.

TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE

HIGH-LEVEL OUTPUT VOLTAGE

vs

vs

DIFFERENTIAL INPUT VOLTAGE

HIGH-LEVEL OUTPUT CURRENT

5

5
VCC

= 5V

.1

TA = 25°C

10 = 0

I

>

.,
5'"
"0

II

4

I

3

>

VIC -12 V
I
VT-VT+

VIC =
I-OV

V~_-+ I-VT+

S

~

0
I
0

12 V

-

.lll'"
0

VT-~

-

S

VT+ -

0
"ii
>
II
-'

VI~

=

4

~

2

.........
3

'\~.'\

"' , ~'\.
, ~' .)<.

2

.1:.

-75

-25 0

25 50 75 100 125

TI I

o

o

VIO-Oifferentiallnput Voltage-mV

I

, .", ~
, '~
.....

-10

-20

-30

-40

IOH-High·Level Output Current-rnA

FIGURE 5

FIGURE 4

T~XAS ~

INSTRUMENTS
2-204

.I

.... VCC = 5V_ r -

'\

0

o

.K'VCe = 5.5 V

Vec = 4.5 V "

>
-125

,

"-

'\~

:E'"
I
:z:

>

I.

......... tII,.

>

I

I.

VIO = 0.2 V_
TA = 25°C

>

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

-50

SN55113
QUADRUPLE DIFFERENTIAL LINE RECEIVER
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE

LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT

0.6
Vee
5 V
TA = 25°C
K

>
I

0.5

'"
i'!

0)

"0

>

0.4

SCo
S

0

0.3

a;

>

...'"
...~I
...
0

0.2

0

/

/

V

/V

/

V

5

V
/"

VIO = 0.2 V
Load = 8 k(J to ground
TA = 25°C

4

>

I
Vee

I

"

0)

~

.1.

Vee

= 5.5 V
=5V

Vee

= 4.5

V

3

>

SCo
S 2
0
I
0

>

0.1

>

o

o

0
5

10

15

20

25

0.5

0

30

INPUT CURRENT
vs
INPUT VOLTAGE

OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
Vee
Vee

5

Vee

>

= 5.5 V
=5V
= 4.5 V

=1_ 0 .2 ~
Load = 1 k(J to
TA = 25°C

1.0

VIO

0.75

Vee

I

II

0)

~

«

0.5

I

0.25

E

4

E
.,

>

§

SCo 3
S

0
I
0

3

FIGURE 7

FIGURE 6

6

2.5

2

1.5

VI-Enable G Voltage-V

IOL -Low-Level Outi>ut eurrent-mA

0

U
~

::l

g. -0.25
I"

2

>

-0.5
-0.75

o

o

-1.0
0.5

1.5

2.5

2

-8 -6 -4 -2

3

VI-Enable G Voltage-V

0

2

4

6

8

10 12

VI-Input Voltage-V

FIGURE 8

FIGURE 9

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-205

2-206

SN55182. SN75182
DUAL DIFFERENTIAL LINE RECEIVERS
D1292, OCTOBER 1972-REVISED SEPTEMBER 1986

•

SN55182 ... J PACKAGE
SN75182 .•. 0, J. OR N PACKAGE

Single 5-V Supply

•

Differential Line Operation

•

Dual Channels

•

TTL Compatibility

•

± 15 V Common-Mode Input Voltage Range

•

± 15 V Differential Input Voltage Range

•

Individual Channel Strobes

(TOPVIEWI
l1N-

VCC
21N-

lRT
l1N+

•

Built-In Optional Line-Termination Resistor

•

Individual Frequency Response Controls

•

Designed for Use With Dual Differential
Drivers SN55183 and SN75183

•

Designed to Be Interchangeable With
National Semiconductor DS7820A and
DS8820A

2RT
21N+
2STRB

lSTRB
lRTC
lOUT

2RTC

GND

20UT

SN55182 ... FK PACKAGE
(TOP VIEWI

3

description

l1N+

4

NC
lSTRB

5
6

NC

7

2

1 2019
18
17
16
15
14

The SN55182 and SN75182 dual differential line
lRTC 8
receivers are designed to sense small differential
9 1011 1213
signals in the presence of large common-mode
I-OUI-U
noise. These devices give TTL-compatible output
::::lZZ::::l1Ot!)
Oce
",,,,
signals as a function of the polarity of the
differential input voltage, The frequency
NC-No internal connection
response of each channel may be easily
controlled by a single external capacitor to
provide immunity to differential noise spikes, The output goes to a high level when the inputs are opencircuited, A strobe input is provided which, when in the low level, disables the receiver and forces the
output to a high level.
~

The receiver is of monolithic single-chip construction, and both halves of the dual circuits use common
power supply and ground terminals.
The SN55182 is characterized for operation over the full military temperature range of - 55°C to 125°C.
The SN75182 is characterized for operation from O°C to 70°C.

logic symbol t
l1N+

(31

logic diagram (positive logic)
&

l1N+

lIN-

lIN-

1RT
lSTRB

lRT

lRTC

lRTC
lSTRB

(31
(11

lOUT

121
151
141

21N+
21N2RT
2STRB
2RTC

21N+

tThis symbol is in accordance with ANSI/lEEE Std 91-1984 and
lEe Publication 617-12.
Pin numbers shown are for 0, J and N packages.

PRODUCTION DATA documents contain information
current as of publication date. Products conform
to _ilicatio.. par Ihetenns 01 Texas Instruments
staMard warrant~. Production pnJt8SSing daas not
nscassarily incloila testing of all parameters.

(111

21N-

(131

2RT

1121

2RTC
2STRB

20UT

(91
(101

Copyright

© 1986, Texas Instruments Incorporated

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-207

SN55182, SN75182
DUAL DIFFERENTIAL LINE RECEIVERS

schematic leach receiver)
FUNCTION TABLE

RESPONSE TIME
CONTROL
(5,9)

(14)

r-------~---.----~--~------~~----~~VCC

STROBE

DIFF
INPUT'

L

X

H
H

H
L

167
4.15
k

5k

320

NON INVERTING
INPUT
\

....---4>-- OUTPUT
(6,8)

(3,11)

170

5k

RT
(2,12)

OUTPUT
H
H
L

H = VI '" VIH min or VID more
positive than VTH max
L = VI:S VIL max or VID more
negative than Vn max
X = irrelevant

750
1671 k

1k

t----------1----~--------~--~------~(~7)GROUND
167
INVERTING (1, 13)
INPUT
"'"k.......- - - - - '

-"'5

(4,10)
STROBE

Resistor values shown are nominal and in ohms.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
SN75182

SN55182
8
±20

Supply voltage, VCCl (see Note 1)
Common-mode input voltage
Differential input voltage (see Note 21
Strobe input voltage
Output sink current
Continuous total power dissipation (see Note 3)

8
±20
±20

±20

V
8
8
50
50
mA
See Dissipation Rating Table
-55 to 125
-65 to 150

Operating free-air temperature range

Storage temperature range

o to 70
-65 to 150

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: 0 or N package
Case temperature for 60 seconds: FK package
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package

DISSIPATION RATING TA8LE

0
FK
J (SN55182)
'J (SN75182)
N

DERATING FACTOR

TA:S 25°C
POWER RATING
950 mW

ABOVE TA - 25°C
7.6 mW/oC

TA - 70°C
POWER RATING
6D8mW

TA - 125°C
POWER RATING

1375 mW
1375 mW

11.0mW/oC
11.0 mW/oC

880mW
880mW

275mW

1025 mW
1150mW

8.2 mW/oC
9.2 mW/oC

656mW
736 mW

TEXAS •
INSTRUMENTS
2-208

POST OFFICE BOX 656303 • DALLAS, TeXAS 76266

275 mW

°C

260

°C
°C

300

°C
°C

260
300

NOTES: 1. All voltage values, except differential voltages, are with respect to network ground terminal.
2. Differential voltage values arB at the noninverting terminal with respect to the inverting terminal.
3. In the FK and J packages, SN55182 chips are alloy mounted and SN75182 chips are glass mounted.

PACKAGE

UNIT
V
V
V

SN55182, SN75182
DUAL DIFFERENTIAL LINE RECEIVERS
recommended operating conditions
SN55182
Supply voltage, VCC

SN75182

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.5

5

5.5

V

±15

V

Common-mode input voltage, VIC

±15

High-level strobe input voltage, VIH(strobel

2.1

5.5

2.1

5.5

V

0

0.9

0

0.9

V

Low-level strobe input voltage, VIL(strobel
High-level output current, 10H

-400

-400

p.A

16

16

mA

70

°C

Low-level output current, 10L.
Operating free-air temperature, T A

-55

electrical characteristics over recommended ranges of Vee.
(unless otherwise noted)

VTH
VTL

Differential input low-threshold voltage

~

Va

~

2.5 V,

10H
Va

~

- 400 p.A
0.4 V,

10L

~

16 mA

VID - 1 V,
VOH

VOL

-400 ~A
VID = -1 V,
10H = -400 p.A
VIO = -1 V,
10H

High-level output voltage

Low-level output voltage

Inverting input

II

125

~

VIC

= 15 V
=0
= -15 V

VIC
VIC

Input current

MIN TYP*

0.5

VIC ~ -3 V to 3 V
VIC ~ -15Vto15V

-0.5

Vstrobe - 2.1 V,
Vstrobe ~ 0.4 V,

1
-1
2.5

4.2

5.5

2.5

4.2

5.5

0.25

0.4

=

VIC
VIC

~

Vstrobe ~ 2.1 V,

16 mA

3

4.2

0

-0.5

-3

-4.2

5
-1

0
-15 V

ISH

High-level strobe current

Vstrobe

ISL

Low-level strobe current

Vstrobe

r;

Input resistance

RT

Line terminating resistance

TA

lOS

Short-circuit output current

VCC

ICC

Supply current (average per receiver)

= 5.5 V
=0

Inverting input

,Noninverting input

= 25°C
= 5.5 V,
VIC = 15 V,
VIC = 0,
VIC = -15 V,

Va

~

0
VIO ~ -lV
VID = -0.5 V
VIO ~ -1 V

UNIT
V
V

V

VIC ~ 15 V
Noninverting input

MAX

VIC ~ -3Vto3V
VIC ~ -15Vto15V

~

10L

0

Vie. and operating free-air temperature

TEST CONDITIONSt

PARAMETER
Differential input high-threshold voltage

UNIT

MIN

V

mA

7
-1.4

-7

-9.8

-1

5
-1.4

mA
~A

mA

120

170

250

-2.8

-4.5

-6.7

kll
kll
Il
mA

4.2
6.8

6
10.2

mA

9.4

14

3.6

5

1.8

2.5

tUnless otherwise noted, Vstrobe ~ 2.1 V or open.
*AII typical values are at VCC

=

5 V, VIC

= 0,

and TA

=

25°C.

TEXAS~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-209

SN55182, SN75182

DUAL DIFFERENTIAL LINE RECEIVERS

switching characteristics, Vee - 5 V" TA = 25°e
PARAMETER

TEST CONDITIONS

MIN

tPLH(D)

MAX

18

40

ns

tpHL(D)

RL = 40011,

31

45

ns

CL=15pF,
See Figure 1

tpLH(S)

9

30

ns

tpHL(S)

15

25

ns

from differential input
Propagation delay time, high-to-Iow-Ievel output
from differential input
Propagation delay time, low-to-high·level output

from strobe input

UNIT

TYP

Propagation delay time, low-to-high-Ievel output

Propagation delay time, high-to-Iow-Ievel output
from strobe input

PARAMETER MEASUREMENT INFORMATION
INPUT

OUTPUT
~----+-------~---VCC=5V

40011

PULSE
GENERATOR NO.1r-----.....----q
(5•• Note A)

- See Not. C

CL = 15 pF
(See Note B)

PULSE
GENERATOR NO. 21------t.------....
(5•• Not. A)
INPUT
TEST CIRCUIT

:---tw~

..Jt

oV~\.

ov

INPUT _ _ _ _

---.I> 100 ns I.--

I

STROBE

-1'l,3V

---"
tpHL(D)

--.:> 100

I

:1 1.3V~

~

I

ns~

,I

:1
I

'\

---l

---.I >100 ns:'----

,..-_ _ _..... '

f,.1.3V

l('
~<

OV~

:
,

i ~1.3V

tPHL(S)~

2.5 V
-2.5 V

I
>100 ns

J+-

1.3V,--- -

.I

I

i--I-tPLH(D)
I.
----....:..-""
I
l,3V'----!1.3V
OUTPUT

I

r- tw--l

"I1tlloL)_--,tl ov

__

I '

_

-

I .

-

2.6V
0V

I
I
I
I
:

VOH

t~·:V_____ VOL

-.i-+tPLH(S)

VOLTAGE WAVEFORMS
NOTES: A. Thepulsegeneratorshavethefoliowingcharacteristics:Zo = 50ll,t,s 10ns,tf s 10ns,tw = 0.5 ±0.1 f'S,PRR s 1 MHz.
B. CL includes probe and jig capacitance.
C. All diodes are 1 N3064 or equivalent.

FIGURE 1. PROPAGATION DELAY TIMES

TEXAS . "
INSTRUMENTS
2-210

POST OFFICE BOX 665303 • DALLAS, TEXAS 75265

SN55182, SN75182
DUAL DIFFERENTIAL LINE RECEIVERS
TYPICAL CHARACTERISTICS t
DIFFERENTIAL INPUT THRESHOLD VOLTAGE
vs
COMMON·MODE VOLTAGE

DIFFERENTIAL INPUT THRESHOLD VOLTAGE
vs
SUPPLY VOLTAGE

=r

8,
:l

'0

0.3

0.5

=r

VIC=O
TA = 25°C

t

0.2

>

~

0.3

0

:!2
o

0.2

e

0.1

:!2

-5

e
..c:

0.1

I-

...

.='"

a.

0

]c -01
•

e

~I

-5

I'-. ~=25V
~'o = -400,uA
Vo

=0.4

J.

10

1

=

~

...
'a."

-

-0.1

I--

.;::

rnA - f----

c -0.2

e

-0.2

:E
9C

"> -0.3

">
6

5.5
5
VCC-Supply Voltage-V

""'==

o

.='iii

C

4.5

VCC = 5 V
TA = 25°C
I

0.4

V

I

o = 2.5 V. '0 = - 4OO .uA

-

"- Vo

=O.~ V

.1

_-:..!.o

=16

-

-...;,:~

-0.3
-0.4
-0.5
-20

-10
10
o
Vlc-Common.Mode Input Voltage-V

FIGURE 2

20

FIGURE 3

DIFFERENTIAL INPUT THRESHOLD VOLTAGE
vs
FREE·AIR TEMPERATURE

100
50

v. I J
I'-. ~"'<'
.S..,
...... ~

o

VCC = 5 V
VIC=O

J
~R-4

..................

-50

..........
~ -100

e

:E

9c

">

II:

-"""::0"'0

~..,

"0

-150

~"'76

~~ '50 75 100 125

-200
-75 -50 -25 o
25
TA-Free·Air Temperature-OC
FIGURE 4

tData for temperatures below OOC and above 70°C are applicable to SN55182 circuits only.

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

2-211

SN55182. SN75182
DUAL DIFFERENTIAL LINE RECEIVERS
TYPICAL CHARACTERISTICS t
OUTPUT VOLTAGE

vs
VOLTAGE TRANSFER CHARACTERISTICS

FREE-AIR TEMPERATURE
5

I I

VCC=5V

>I

.,
'"

~

."

3

0
I
0

2

"6

VCC=5V
VIC=O

_ 5 V IOH = _400 ji.A-.;;.
VIO- O.
•

-

4

5

I

4

>I

.,
..
::'"

it

10kll

3

>

&

"

'5
&

"

0
I
0

>

2 -

I

C

2

."

0

~

U

So -2

c

I

-4

0.5

TERMINATING RESISTANCE

vs
FREE·AIR TEMPERATURE
200

VCC=5V
VID = 0 to ±20 V
TA = 25·C

/

V

'"

~vu~

a:

...4

~-.J~v.~ \~~V
~-<..

X~
~-<..'~
N~ V
I

...-

FIGURE 6

INPUT CURRENT

6

~

0.1
0.3
-0.3
-0.1
VID-Oifferentiallnput Voltage-V

FIGURE 5

8

i...--

f (,
JL /J

o
-0.5

1\

;/ 'j

VID = -0.5 V. IOL = 16 mA- -75 -50 -25
0
25 50
75 100 125
TA-Free·Air Temperature-·C

v

4 •• 010
1N3G64

-t=1125lc

>

o

I

FRDIIIIDUTPUT
UNDER TEST

0

>

TA = 25°C

I

TEXAS'"

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

SN55182, SN75182
DUAL DIFFERENTIAL LINE RECEIVERS

TYPICAL CHARACTERISTICS t
POWER DISSIPATION
(AVERAGE PER RECEIVER)

SUPPLY CURRENT
(AVERAGE PER RECEIVER)

vs

vs

COMMON-MODE INPUT VOLTAGE

COMMON-MODE INPUT VOLTAGE

12

«
E
.!.I:

300

10

.......

"-

8

~

:;

u
>

6

VCC=5V
No load
TA = 25°C

'"

....... '-

"
U

~ 200

v

,~
v''v
'D"

.g
.~

,

1"0.. -. . . . . .

4

j

-...........

2

_I

J

o

o

-10

10

/,

\

100

1\

I
C

a.

125°C

I

o

I

/

//

//

"- ,~

..-

o

-10

-20

20

/:'

\\

TA

-20

_1_ •

V- Max rated PD at TA = 125 C

\~A=25°C

Ci

"-i'--.

E

VCC = 5 V
VIO=-1V

\\

:!:
E

is.
Q.
en
I

\

10

20

Vlc-Common-Mode Input Voltage-V

Vlc-Common-Mode Input Voltage-V

FIGURE 9

FIGURE 10

NOISE PULSE DURATION

vs
RESPONSE TIME-CONTROL CAPACITANCE

I

1000
700

.g

400

UI

c:
c:

co

:;
o
II>

VCC 5V
TA 25°C
See Note 4

2_5V~~-~~-c=1 ____ _

==.J----c=0v

200

UI

~
II>

100

-0

z

70

E
::l
E

40

:lE

20

)1

-2_SV

UI

-;<
co

I

I

~tw

...

INPUT PULSE FOR FIGURE 11

I

}

10
10

40

100

400

1000

4000 10,000

Response Time Control Capacitance-pF

FIGURE 11
tO ata for temperatures below aoc and above 70°C are applicable to SN55182 circuits only.
NOTE 4: Figure 11 shows the maximurn duration of the illustrated pulse that can be applied differentially without the output changing
from the low to high level.

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75266

2-213

SN55182, SN75182
DUAL DIFFERENTIAL LINE RECEIVERS

TYPICAL CHARACTERISTICS t
PROPAGATION DELAY TIMES, FROM
DIFFERENTIAL INPUT
vs
FREE-AIR TEMPERATURE

38

E

VCC=5V
See Figure 1

l...--

34

tpHL(O)

,/

30

26

PROPAGATION DELAY TIMES FROM STROBE INPUT
vs
FREE-AIR TEMPERATURE

."

V

V

£..
E

i=

..

>

;3

"'"

20

16

c ~
,2 I

14

ag-

12

1V ~

0'-

VCC=5V

18 See Figure 1

i'--..

./

!PHL(~) ,.,,- /'"
..........
,/
tPLH(~

a:~

./

22

18

Q

:E
...I

a-

,./"
tPLH(O)

~~
..J

..... I--"'"

--+-

14
-75 -50 -25

1. 210

a-

::J:

8

§

6

25

..........

50

75

100 125

a-

TA-Free-Air Temperature-oC

/1'

4
-75 -50 -25
0
25
50
75 100 125
T A-Free-Air Temperature-°c

FIGURE 13

FIGURE 12
toata for temperatures below OOC and above 70°C are applicable to SN55182 circuits only.

TEXAS •

2-214

/~

::J:

...I

0

,.,,-

/'"

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS, TEXAS 75286

SN55182, SN75182
DUAL DlF.FERENTIAL LINE RECEIVERS

APPLICATION INFORMATION
Vee = 5 V
Vee=5V

r---%'183

INPUTS {

1

%'182

r--- --

--I

i ~~~~~_~)o-~II~z-L____

J

-l

I

I_~N.p~_T-+:---N

Designed for Use With Dual Differential
Drivers SN66182 and SN76182
Designed to Be Interchangeable With
National Semiconductor DS7830 and
DS8830

description

1C
NC

4

18

5

1D

6

17
16

NC
1Y

7
8

14

15

2C
NC
2B
NC
2A

9 10111213

The SN55183 and SN75183 dual differential line
drivers are designed to provide differential output
signals with high-current capability for driving
balanced lines. such as twisted-pair, at normal
line impedances without high power
dissipation,These devices may be used as TTL
expander/phase splitters. as the output stages
are similar to TTL totem-pole outputs.

NOUN>

~ZZNN

<.:)

NC-No internal connection.

The driver is of monolithic single-chip construction, and both halves of the dual circuits use common power
supply and ground terminals.
The SN55183 is characterized 'for operation over the full military temperature range of - 55°C to 125°C.
The SN75183 is characterized for operation from O°C to 70°C.

logic symbol t
1A
18
lC
10
2A
28

zc
20

(1)

logic diagram (positive logic)
&[>

(2)

(5)

1V

(3)
(4)

lZ

lA

(1)

18

(2)

lC

(3)

10

(4)

(10)
(11)

Zy

(1Z)

(13)

2Z

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617·12,
Pin numbers shown are for D, J, and N packages.

PRODUCTION DATA documents contain information
currant as of publication data. Products conform
to s~ifications per the tenns of Taxas Instruments
standard warranty. Production prol:8SSing dOBS not
nlcassarily ineluD tasting of all parametars.

2A

(10)

28

1111

2C

(121

20

(131

2Y

2Z

positive logic:

v

~

ABeD

z

~

ABeD

Copyright © 1986, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-217

SN55183; SN75183
DUAL DIFFERENTIAL LINE DRIVERS

schematic (each driver)
(14)

Vce

v

2k

3k

9
(6,8)

A

(1,10)

B

(2,11)

e

(3,12)
4k

3.2 k

z

3k

9
D

(4,13)

(5,9)

y

L -_ _- - . - . -....- -..........._.....;(;.;..7) GND

Resistor values shown are nominal and in ohms.

TEXAS •
INSTRUMENTS
2-218

POST OFFICE BOX 655303 • DALLAS, TEXAS 75266

SN55183, SN75183
DUAL DIFFERENTIAL LINE DRIVERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
SN55183

SN75183

UNIT

Supply voltage, Vee (see Note 1)

7

7

V

Input voltage

5.5

5.5

V

1

1

s

Duration of output short-circuit (see Note 2)
Continuous total power dissipation (see Note 3)

See Dissipation Rating Table

o to

Operating free-air temperature range

-55 to 125

Storage temperature range

-65 to 150 -65to 150

Lead temperature, 1,6 mm (1/16 inch) from case for 10 seconds: D or N package

70

260

Case temperature for 60 seconds: FK package

260

Lead temperature 1.6 mm (1/16 inch) from case for 60 seconds: J package

300

°e
°C
°e
°e

300

°e

NOTES: 1. All voltage values, except differential voltages, are with respect to network ground terminal.
2. Not more than one output should be shorted to ground at a time.

3. In the FK and J packages, SN55183 chips are alloy mounted and SN75183 chips are glass mounted.
DISSIPATION RATING TABLE
PACKAGE

TA '" 25°C
POWER RATING

DERATING FACTOR

TA - 70 0 e
POWER RATING
608rnW

TA - 125°C
POWER RATING

D

950 mW

ABOVE TA - 25°C
7.6 mW/oe

FK

1375 mW

11.0 mW/oe

880 mW

275 mW

J (SN55183)
J (SN75183)

1375 mW

11.0 mW/oe

880mW

275 mW

1025 mW

8.2 mW/oe

656 mW

N

1150rnW

9.2 mW/oe

736 mW

recommended operating conditions
SN75183

SN55183
Supply voltage, Vee

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

High-level input voltage, VIH
Low-level input voltage, VIL
High-level output current, IOH
Operating free-air temperature, T A

-55

V
V

2
0.8

0.8

V

-40

-40

rnA

40

rnA

70

°e

40

Low-level output current, IOl

UNIT

125

0

TEXAS .."

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

2-219

SN55183, SN75183

DUAL DIFFERENTIAL LINE DRIVERS
electrical characteristics over recommended ranges of Vee and operating free-air temperature
(unless otherwise noted)
PARAMETER

VOH

TEST CONDITIONS

High-level output voltage

V

(ANDI
VOL

Low-level output voltage

OUTPUT

VOH

High-level output voltage

Z
(NANDI

VOL

Low-Ievael output voltage

OUTPUT

IIH
II

High-level input current
Input current at maximum input voltage
Low-level input current

I'lL
lOS
ICC

Short-circuit output current

*

Supply current (average per driverl

VIH - 2 V.
VIH = 2 V.
VIL = 0.8 V,
VIL = 0.8 V,
VIL = O.B V,

10H - -0.8 mA
10H = -40 mA

= 0.8 V,
VIH = 2 V,
VIH = 2 V,
VIH = 2.4 V
VIH = 5.5 V
VIL = 0.4 V
VCC = 5 V,
VCC = 5 V,

10H

VIL

10L = 32 mA
10L - 40 mA
10H = -0.8 mA
10L
10L

= -40 mA
= 32 mA
= 40 mA .

MIN

Typt

MAX

2.4
1.8

V

3.3
0.2
0.22

0.4

2.4
1.8

0.4
120

-40

No load

V

-100

-120

pA
mA
mA
mA

10

18

mA

2
-4.8
TA = 125°C
All inputs at 5 V,

V
V

3.3
0.2
0.22

UNIT

t All typical values are at VCC = 5 V, TA = 25°C.
tNot more than one output should be shorted to ground at a time and duration of the short circuit should not exceed one second.

switching characteristics, Vee'" 5 V, TA = 25°e

tpLH
tpHL

PARAMETER
Propagation delay time,

low-to-high-Ievel V output
Propagation delay time,

TEST CONDITIONS

AND
gates

high-to· low-level V output

tpLH

Propagation delay time,
low-to-high-Ievel Z output

tpHL

Propagation delay time,
high-to-Iow-Ievel Z output

CL = 15 pF,
See Figure 1(al
NAND
gates

MIN

TYP

MAX

8

12

UNIT

ns

12

18

ns

6

12

ns

6

8

ns

9

16

ns

8

16

ns

Propagation delay time,

tpLH

low-to-high-Ievel

tpHL

differential output
Propagation delay time
high-to-Iow-Ievel

V output
with respect
to Z output

ZL = 100 !l in series
with 5000 pF,
See Figure 1 (bl

differential output

TEXAS

2-220

+

INSTRUMENTS

POST OfFICE BOX 655303 • DALLAS, TEXAS 75265

SN55183,SN75183
DUAL DIFFERENTIAL LINE DRIVERS

PARAMETER MEASUREMENT INFORMATION
VCC=±5V

INPUT

~~~ - - -

INPUT -'/1.5 V

:

Y

I
I

--l---.J
"::"

ov

I

I- ----t tPHL~

~
I
1.5 V
1.5V
,I
'
'/OL
I
-I tPLHj4;::
V
'
OH
I
1.5V
1.5V
~

Y
OUTPUT

Z

I
L ___

:

I
~ tpLH

I
I
I

'

I

----vOH

I
I

OUTPUT
TCL = 15 pF

Z
OUTPUT

"::" (See Note B)

--.ltPHLi-

-----VOL

VOLTAGE WAVEFORMS

TEST CIRCUIT
(a) OUTPUTS Y AND

INPUT

2.5 V

Z

VCC = 5 V

Y

~.;~---- 3V

INPUT J 1 . 5 V

OUTPUT

I

Z
OUTPUT

DIFFERENTIAL
OUTPUT
VOLTAGE

OV

I

-t>\ tpLH j4--

-.jtPHLj+-

~l---- +VYS
OV

OV
-VYS

VOLTAGE WAVEFORMS

TEST CIRCUIT
(b) DIFFERENTIAL OUTPUT

NOTES: A. The pulse generators have the following characteristics: Zo
B. CL includes probe and jig capacitance.

=

50 II, tr

:s

10 ns, tf

:s

10 ns, tw

= O. 5 ~s,

PRR

:s

1 MHz.

C. Waveforms are monitored on an oscilloscope with Rin ~ 1 MO.

FIGURE 1. PROPAGATION DELAY TIMES

TEXAS ~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-221

SN55183, SN75183
DUAL DIFFERENTIAL LINE DRIVERS
TYPICAL .CHARACTERISTICS t
THRESHOLD VOLTAGE

2.4
2.2

vs

FREE-AIR TEMPERATURE

OUTPUT CURRENT

4

VCC~5V
r-VO~1.5V

VIH min

2.0

>I

HIGH-LEVEL OUTPUT VOLTAGE

vs

1.8

>I

!9'" 1.6

~'"

'"

1.4

-lii

1.2

0

~

....:::::: t--

I

>
....::I
Co
;,

NAND GATE

AND GATe-:

f:::::: ~

1.0

-...:::: f::::-.

I-

>

f ~ ~~
,
I
,, ~ ~

2

.......

!,

0
I

I I

J:

I,
Il /

0

>

0.8

{I

VIL max

t'

I

/

0.4
-75 -50 -25

,

\
TA=125°C

I

0

25

50

75

100

oY

125

o

-20 -40 -60 -80-100-120 -140-160
IOH-Output Current-mA

FIGURE 2

FIGURE 3
LOW-LEVEL OUTPUT VOLTAGE

DIFFERENTIAL OUTPUT VOLTAGE
vs

vs

DIFFERENTIAL OUTPUT CURRENT

OUTPUT CURRENT

4

3
VCC = 5 V

VCC~5V

"

0

~
3

...........

>
....::I

S::I

0

~c

I

1o

TA~125

".::::~

~

.......::
2

C

>I

'"

TA ~ 25°C

'- ~

'"

TA = - 55°C-

:t:

0

!9'"

>

:

........

t- --....... '\

o

\

2

>
....::I
....:ICo

\

25
50
75
100
IOD-Differential Output Current-mA

125

V
/

I

TA = _55°C

0
I
.J
0

...-...o
o

20

....- .......

40

60

....- ~/

/'

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75286

1-

°

80 100 120 140 160 180 200

FIGURE 5

FIGURE 4

7

Tj=r

IOL -Output Current-mA

tData for temperatures below DoC and above 70°C are applicable to SN55183 circuits only.

2-222

V

TA=25°C (

>

\ \ --;

I

N

>

,.- /

0

~ .......

~

o

r

" .TA=-55C
I
°

/

T A-Free-Air Temperature-°c

!9'"

j T1A=2r C

~~I

0.6

>I

VCC = 5 V

50 n LOAD

{
I

0

.c

I-

,I

'"

0

..,>

3

~oonLOAD .1
:~onL;OADI

SN55183, SN75183
DUAL DIFFERENTIAL LINE DRIVERS

TYPICAL CHARACTERISTICS t
TOTAL POWER DISSIPATION
(BOTH DRIVERS)

PROPAGATION DELAY TIME OF
DIFFERENTIAL OUTPUT

20

vs

vs

FREE-AIR TEMPERATURE

FREQUENCY

240

.~

I

Vee = 5 V
See Figure 1 (b)

l!

.
E
I

220
~ 200

15

k

o

'i
'C=

j::

>
co

a;

c

10

...

tPLH

....... ~

c
0

~

.~

'"8-0

0:

tpHL

~ f.--

~

..-

......

Vec = 5 V
No load
Input: 3-volt square wave
TA = 25°e

180
160

/

140

.. 120

~

~

/

~ I-""

.. 100

~

5

80
60

o
-75 -50

40
0.1

-25 0
25
50
75 100 125
TA-Free-Air Temperature-Oe

0.4

4

10

40

100

f-Frequency-MHz

FIGURE 6

FIGURE 7

toata for.temperatures below O°C and above 70°C are applicable to SN55183 circuits only.

APPLICATION INFORMATION
Vee = 5 V

Vee =5 V

~~5~~_1
I

INPUTS {

}\ SN55182

I

I

~l~~~~

J

r----- -l

__ ...,
INV
INPUT

:z

I

I

I

I

I
I

0.002 !J.F
(See Note AI

I

I

Iv
I

I
GND

PAIR

IL __ GND
____ JI
~

-='

-='
NOTES:

I

TWISTED

I

L.---- 1-- ...J
I

A. When the inputs are open circuited. the output will be high. A capacitor may be used for de isolation olthe line-terminating
resistor. At the frequency of operation, the impedance of the capacitor should be relatively small.

f = 5 MHz
C = O.002I'F

Example: let

Zc =_1_
2.-fC
Zc

~

16!l

8. Use of a capacitor to contro; response time is optional.

FIGURE 8. TRANSMISSION OF DIGITAL DATA OVER TWISTED-PAIR LINE

TEXAS •
INSTRUMENTS
POS'" OFFICE BOX 665303 • DALLAS, TeXAS 75265

2-223

2-224

SN55188, SN75188
QUADRUPLE LINE DRIVERS
01323, SEPTEMBER 1983--REVISED SEPTEMBER 1986

•

Meets Specifications of EIA RS-232-C

•

Designed to Be Interchangeable With
Motorola MC1488

•

Current-Limited Output: 10 mA Typ

SN55188 ... J PACKAGE
SN75188 ... D OR J PACKAGE
(TOP VIEW)

Vcc-

•

Power-Off Output Impedance: 300 0 Min

•

Slew Rate Control by Load Capacitor

•

Flexible Supply Voltage Range

•

Input Compatible With Most TTL Circuits

VCC+

lA
lY
2A
28
2Y

48
4A
4Y
38
3A
3Y

GND

SN55188 ... FK
CHIP CARRIER PACKAGE
(TOP VIEW)

description
The SN55188 and SN75188 are monolithic
quadruple line drivers designed to interface data
terminal equipment with data communications
equipment in conformance with EIA Standard
RS-232-C using a diode in series with each
supply-voltage terminal as shown under typical
applications.

I

«
3

The SN55188 is characterized for operation over
the full military temperature range of - 55°C to
125°C. The SN75188 is characterized for
operation from OOC to 70°C.

U

+

U

UU Um

>Z>

(21

lV

(41

&[>

logic diagram (positive logic)

2V

(5)
(9)

3A
(101
3B
(121
4A
(13)
4B

~

lA~lV

3V

2A
2B

t This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.

3A

(41
(5)

(9)

(10)
3B

FUNCTION TABLE
(DRIVERS 2 THRU 4)
A

B

H

H

L

L

X

H

L

H
H = high level,
L = low level,
X = irrelevant
X

4A

V

PRODUCTION DATA documents contain information
currant as of publication data. Products conform to
specifications per the tarms of TaxIs Instruments

:~:~:~~i~af::1~18 ~~::i:; :.~o:=:::9t::.~ not

4B

(12)
(131

~2V

~3V
~4V

Positive logic
Y = A (driver 1)
Y = AB or A+B (drivers 2 thru 4)
Pin numbers shown are for 0 and J packages.

Copyright

© 1986, Texas Instruments Incorporated

TEXAS . .

'INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-225

SN55188. SN75188
QUADRUPLE LINE DRIVERS
schematic (each driver)
TO OTHER

DRIVERS
Vcc+--~~--~t_------------t_-----4~-------,

B.2k

INPUT!SI {A

•

.

B---~-300

t------1~~~t_---v~--OUTPUT

GND

TD

3.7 k

70

Vcc_--~~----__----~----------~~------~-----J
All resistor values shown
are nominal and in ohms.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage V CC + at (or below) 25·C free-air temperature (see Notes I and 2)
Supply voltage VCC _ at (or below) 25·C free-air temperature (see Notes 1 and 2)

SN55188
15
-15

Input voltage range
Output voltage range

-15t07
-15 to 15

Continuous total power dissipation (see Note 2)
Operating free-air temperature range

See Dissipation Rating Table
-55to125
o to 70
-65to 150
-65 to 150

Storage temperature range

I Dar N package
I FK package
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds I J package

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
Case temperature for 60 seconds

SN75188
15
-15
-15 to 7

UNIT
V

-15 to 15

V

260
260
300

300

V
V

·C
·C
·C
·C

NOTES: 1. All voltage values are with respect to the network ground terminal.
2. For operation above 25·C free-air temperature, refer to the maximum supply voltage curve, Figure 6. In the FK and J packages,
SN55188 chips are alloy mounted ..
DISSIPATION RATING TABLE
PACKAGE

TA s 25'C
POWER RATING

D
FK
J (SN55188)
J (SN75188)

950 mW
1375 mW

N

1150mW

1375 mW
1025 mW

DERATING FACTOR
ABOVE TA - 25'C
7.6 mW/'C
11.0 mW/'C
11.0 mW/'C

TA - 70'C
POWER RATING

TA - 125'C
POWER RATING

608mW
880mW
880mW

275 mW
275 mW

8.2 mW/·C
9.2 mW/'C

656 mW
736 mW

TEXAS " ,
INSTRUMENTS
2-226

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN55188. SN75188
QUADRUPLE LINE DRIVERS

recommended operating conditions
SN55188
NOM MAX

MIN
7.5
-7.5

Supply voltage, VCC +
Supply voltage, V CC
High-level input voltage, VIH

9
-9

15
-15

1.9

Low-level input voltage, VIL
Operating free-air temperature, T A

MIN
7.5

15
-15

9

-9

-7.5
1.9

0.8
125

-55

SN75188
NOM MAX

UNIT
V
V
V

0.8
70

0

V
°C

electrical characteristics over operating free-air temperature range, VCC+ .. 9 V, VCC- .. -9 V
(unless otherwise noted)

VOH

VOL

IIH
IlL
IOS(HI

High-level output voltage

Low-level output voltage

High-level input current
Low-level input current

Short-circuit output

current at high level*
Short-circuit output

IOS(L)
ro

current at low level t
Output resistance,
power off

Supply current
ICC+

ICC-

from VCC+

Supply current
from ICC-

SN55188
MIN Typt MAX
(See Note 31

TEST CONOITIONS

PARAMETER

VCC+ = 9 V,
VCC- = -9 V
VCC+ = 13.2 V,
VCC- = -13.2 V
VCC+ = 9 V,
VCC- = -9 V

VIL = 0.8 V,
RL = 3 kll

VIH = 1.9 V,
RL = 3 kll

6

7

6

7

9

10.5

9

10.6

VI = 0.8 V,

Va = 0

-4.6

VI = 1.9 V,

Va = 0

4.6

VCC+ = 0,
Va = -2Vt02V

VCC- = 0,

VCC+ = 9 V,
No load
VCC+ = 12 V,
No load

All inputs at 1.9 V
All inputs at 0.8 V

VCC+ - 15 V,
No load, TA = 25°C
VCC- = -9 V,

All inputs at 1.9 V
All inputs at 0.8 V

No load
VCC- = -12 V,
No load

1.9
0.8
1.9
0.8

V
V
V
V

,All inputs at 1.9 V
VCC- - -15 V,
No load, TA = 25°C All inputs at 0.8 V
VCC+ =9V,
VCC- = -9 V,

Po

Total power dissipation

No load
VCC+ = 12 V,
No load

-6

-7

-6

-10.5

-9

-10.5

-9

-1

10
-1.6

-1

10
-1.6

mA

VCC- = -12 V,

~A

-9 -13.5

-6

-9

-12

mA

13.5

6

9

12

mA

9

300

All inputs at 1.9 V
All inputs at 0.8 V

at
at
at
at

-7

V

VI = 5 V
VI = '0

inputs
inputs
inputs
inputs

UNIT

V

VCC+ = 13.2 V,
VCC- = -13.2 V

All
All
All
All

SN75188
MIN TYpt MAX
(See Note 31

II

300
15
4.5
19

20

5.5

7
34
12
-17,

-13
-18

6
25

-0.5
-23
-0.5

15
4.5
19
5.5

20
6
25
7
34

mA

12
-13

-17

-18

-0.015
-23
-0.015

-34

-34

-2.5

-2.5

333

333

576

576

mA

mW

t All typical values are at TA = 25°C.
~Not more than one output should be shorted at a time.
NOTE 3: The algebraic convention in which the less positive (more negative) limit is de$ignated as minimum, is used in this data sheet
for logic voltage levels only, e.g., if -6 V is a maximum, the typical value!s a more negative voltage.

TEXAS . . ,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76286

2-227

SN55188, SN75188
QUADRUPLE LlNE DRIVERS

switching characteristics. VCC+ = 9 V. VCC- '" -9 V. TA
PARAMETER

TEST CONDITIONS

tpLH

Propagation delay time, low-to-high-Ievel output

tpHL

Propagation delay time, high-to-Iow-Ievel output

RL = 3 kll,

trLH
tTHL

Transition time, low-to-high-Ievel output T

See Figure 1

trLH

Transition time, low-to-high-Ievel output*
Transition'time, high-to-Iow-Ievel output;

trHL

MIN

CL = 15 pF,

TYP

MAX

UNIT

220

350

ns

100

175

ns

55

100

ns

45

75

ns

Transition time, high-to-Iow-Ievel output t
RL - 3 kll to 7 kll, CL - 2500 pF,
See Figure 1

2.5

p.s

3.0

ps

tMeasured between 10% and 90% pOints of output waveform.
*Measured between + 3 V and - 3 V points on the output waveform (EIA RS-232-C conditions)

PARAMETER MEASUREMENT INFORMATION

INPUT~

INPUT

PULSE
GENERATOR
(See Note A)

~:v---------::

:.-.!-tPHL

~------~--~t----OUTPUT

1

---::9~o~%~i
OUTPUT

CL
(SoeNoteB)

I ' 50%

~I~9::0%=---- VOH

50%:

I J;.1.:.:0%:.:::......;1:.::0%~i~11 __ I I

tTHL ~

I+-

= 0.5 ps, PRR s

1 MHz, 20

FIGURE 1. PROPAGATION AND TRANSITION TIMES

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS' 75265

- - - - - VOL

I

-..

i+--tTLH

VOLTAGE WAVEFORMS

TEST CIRCUIT
NOTES: A, The pulse generator has the following characteristics: tw
B, CL includes probe and jig capacitance.

2-228

:.-....- tPLH

= 50 Il.

SN55188. SN75188
QUADRUPLE LINE DRIVERS
TYPICAL CHARACTERISTICSt
OUTPUT CURRENT

vs
OUTPUT VOLTAGE

VOLTAGE TRANSFER CHARACTERISTICS
20

12
Vcc+ = 12 V, VCC- = -12 V

9

..'"

==j

~

I

I

16

I

12

«
E
.!.c

6 VCC+ = 9 V, VCC- = -9 V
3 VCC+ = 6 V, VCC- = -6 V

8

2!

4

"
S-

0

u

0

0
I
0

-3

0

"0

>
...

"

!i

...

"
S-

"I

> -6

P

-12

RL = 3 kn
TA = 25°C

o

1

1.2 1.4 1.6 1.8

/

-8

-16

0.2 0.4 0.6 0.8

...

-4

-12

-9

VCC+=9V
VCC-= -9V
TA = 25°C

f:

-f-~

V

,./

\tOrN'j .

-8

~

..."
...Co"
0"
...

.~

U

~

'"'1

en

p

-4

I

o

4

8

12

16

FIGURE 3
SLEW RATE

vs

FREE·AIR TEMPERATURE

LOAD CAPACITANCE

12

U

."lL....

3~nl

LOAD LlNE-

vs
1000

Vcc+= 9 V
VCC = 9V
RL = 00
TA = 25°C

9
'OS(l) (V, = 1.9 V)

I

J

VO-Output Voltage-V

SHORT·CIRCUIT OUTPUT CURRENT

E

V

~,

FIGURE 2

...c

-- -- -I

/

VI-Input Voltage-V

«

/

/

/

/

-20
-16 -12

2

l

L ,I
vOLIVI = 1.9 V)o:=r

6
~

~

3

100

==j

~

0

c:

VCC+=9V
-3 -VCC-= -9V
VO=O

~
iii

10

-6
loSIH) IV, = 0.8 V)

-9
-12
-100-75 -50 -25

0

25

50

75 100 125 150

1
10

100

1000

10,000

CL -Load Capacitance-pF

T A-Free·Air Temperature-'C

FIGURE 4

FIGURE 5

tData for temperatures below OOC and above 70·C are applicable to SN55188 circuit only.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-229

S1I55188, SN75188
QUADRUPLE LINE DRIVERS
THERMAllNFORMATIONt
MAXIMUM SUPPLY VOLTAGE
vs
FREE·AIR TEMPERATURE

16

--

14

~

12

I

~

10

-a
g,

8

.1

6

>

----

+1

g
~

.

4
2

RL ~ 3 k~ (fro~ eac~ out~ut to rroun~)

o

-75 -50 -25

0

25

50

75

100 125

T A-Free·Air Temperature-"C

FIGURE 6
toata for temperatures below OOC and above 70°C are applicable to SN551 BB circllit only.

APPLICATION INFORMATION
Diodes placed in series with the Vee + and Vee _ leads will pro·
teet the SN551 BB/SN751 BB in the fault condition in which the
device outputs are shorted to ± 1 5 V and the power supplies are
at low voltage and provide low-impedance paths to ground.

Vcc+= 12V
VCC_*-12V

~
__

1/4SN55188
OR SN75188

OUTPUTTOHNIL
-O.7VT010V

"::'

~
FIGURE 8. POWER SUPPLY PROTECTION TO MEET
POWER·OFF FAULT CONDITIONS OF
EIA STANDARD RS·232·C

10ka

-12V

FIGURE 7. LOGIC TRANSLATOR APPLICATIONS

TEXAS ,.,
INSTRUMENTS
2·230

POST OFFICE BOX 665303 • DALLAS. TEXAS 75266

SN55189, SN55189A, SN75189, SN75189A
QUADRUPLE LINE RECEIVERS
01619. SEPTEMBER 1973-REVISEO MAY 1990

SN55189. SN55189A ... J PACKAGE
SN75189. SN75189A ... D. J. OR N PACKAGE
(TOP VIEW)

•

Input Resistance ... 3 kO to 7 kO

•

Input Signal Range . . .

•

Operates from Single 5-V Supply

•

Built-In Input Hysteresis (Double Thresholds)

•

Response Control Provides:
Input Threshold Shifting
Input Noise Filtering

± 30

V

•

Satisfies Requirements of EIA RS-232-C

•

Fully Interchangeable with Motorola
MC14B9. MC1489A

lA
lCONT
lY
2A
2CONT
2Y
GND

VCC
4A
4CONT
4Y
3A
3CONT
3Y

SN55189. SN55189A ... FK PACKAGE
(TOP VIEW)
IZ

description

o

These devices are monolithic low-power
Schottky quadruple line receivers designed to
satisfy the requirements of the standard
interface between data terminal equipment and
data communication equipment as defined by
EIA Standard RS-232-C. A separate response
control terminal is provided for each receiver. A
resistor or a resistor and bias voltage source can
be connected between this terminal and ground
to shift the input threshold levels. An external
capacitor can be connected between this
terminal and ground to provide input noise
filtering.
The SN55189 and SN55189A are characterized
for operation over the full military temperature
range of - 55°C to 125°C. The SN75189 and
SN75189A are characterized for operation from
ooe to 70°C.

U

~ ~ ~ ~~
3

lY
NC
2A
NC
2CONT

2

1 2019

4

18

5

17

6

16

7

15

8

14

4CONT
NC
4Y
NC
3A

9 10111213
>-CU>-INZZ"'Z
(!)
0
U

'"
NC-No internal connection
logic diagram leach receiver)

A~Y

RESPONSE~

logic symbol t

CONTROL

lA
lCONT
2A
;2CONT
3A
3CONT
4A
4CONT

lY
2Y
3Y
4Y

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.
Pin number. shown are for D. J. and N packages.

PRODUCTION DATA documonts contain In'ormallon
curranl •• of publication data. Products conform to
apacificatio•• par Iba IIrm. Taxa. lastrumants
standard warranty. Production p'rocBSlin. dOli nat
.....arily I.cluda tastfng of all parametars.

0'

Copyright @ 1990, Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DAUAS. TEXAS 75265

2-231

SN55189, SN55189A, SN75189, SN75189A
QUADRUPLE LINE RECEIVERS

schematic (each receiver)
r-~'--------'~--VCC

9 kll

1.66 kll

5 kll

OUTPUT Y
RESPONSE ________- .__-YR~1~~---4~._--~
CONTROL

4 kll

INPUT A

--.J\!\"'-..........--I

Resistor values shown are nominal.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
SN55189
SN55189A
10
±30

Supply voltage, VCC (see Note 1)
Input voltage

SN75189
SN75189A
10
±30

UNIT
V

V
20
20
mA
See Dissipation Rating Table
-55 to 125
o to' 70
°c
-65 to 150
-65 to 150
°c
DC
260

Output current
Continuous total power dissipation (see Note 2)
Operating temperature range
Storage temperature range
Case temperature for 60 seconds: FK package
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package

300

300
260

DC
DC

NOTES: 1, All voltage values are with respect to network ground terminals.
2, In the J package, SN55189 and SN55189A chips are either silver glass or alloy mounted and SN75189 and SN75189A chips

are glass mounted.
DISSIPATION RATING TABLE
PACKAGE
D
FK
J (SN55 _ _ )

J (SN75 ____ )
N

TA :s 25 DC
POWER RATING
950
1375
1375
;025

mW
mW
mW
mW

1150mW

608mW

TA - 125 DC
POWER RATING
N/A

8.2 mW/oC

880 mW
880mW
656 mW

275 mW
275 mW
N/A

9.2 mW/oC

736mW

N/A

DERATING FACTOR
ABOVE TA - 25·C
7.6 mW/oC
11.0 mW/oC
11,OmW/oC

TEXAS

TA - 70·C
POWER RATING.

.Jf

INSTRUMENTS
2-232

POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

SN55189, SN55189A, SN75189, SN75189A
QUADRUPLE LINE RECEIVERS

electrical characteristics over operating free-air temperature range, Vee - 5 V ± 1 %, (unless otherwise
noted)
TEST

PARAMETER

TEST CONDITIDNSt

FIGURE

VT+

Positive-going
threshold voltage

TA -

1
'189A

VT-

VOH

Negative-going
threshold voltage
High-level

1

output voltage
Low-level

VOL
IIH

1

output voltage
High-level

2

input current

Low-level
IlL

2

input current

Short-circuit
lOS
lee

1

'189A

-55°e to 125°e

MAX

1

1.3

1.5

0.6

TA = 25°e
TA = ooe to 70 0 e

1.75

TA -

1.30
0.75

V, = 3 V,

2

MAX

1

1.3

1.5

1.9

2.25

1.75

1.9

1.0

1.25

2.25

0.75

1.0

1.25
1.25

4

5

2.6

4

5

2.6

4

5

2.6

4

5

0.2

0.45

0.2

0.45

8.3

3.6

8.3

0.43

-3.6

-8.3

-0.43

-3.6

-8.3

-0.43
-3

Outputs open

V

1.6

3.6

-3 V

V

2.65

0.43

VI = 3 V
25 V
VI-

2.25

2.6

IOL = 10 mA

VI - 5 V,

1.6

1.9

0.35

3

output current

Supply current

TYP*

0.65

VI - 25 V

UNIT

MIN

1.55

-55°e to 125°e

T A - - 55 °e to 125°e
V, = 0.75 V,
IOH = -0.5 mA
Input open,
IOH - -0.5 mA

VI -

TYP*

0.9

TA - 25°e
TA - ooe to 70 0 e

'189,

SN75189
SN75189A

MIN
TA = 25°e
TA = ooe to 70 0 e

'189

SN55189
SN55189A

20

-3
26

V
V
mA
mA
mA

20

26

mA

t All characteristics are measured with the response control terminal open.
t All typical values are at Vee = 5 V, TA = 25°e.

switching characteristics, Vee" 5 V, TA = 25°e
TEST

PARAMETER
tPLH

FIGURE

Propagation delay time, low-to-high-Ievel output

tpHL

Propagation delay time, high-to-Iow-Ievel outut

tTLH

Transition time. low-to-high-Ievel output

tTHL

Transition time, high-to-Iow-Ievel output

4

TYP

MAX

eL = 15 pF, RL = 3.9 kO

TEST CONDITIONS

25

85

eL=15pF, RL - 3900
eL=15pF, RL = 3.9 kO

25

50

120

175

= 3900

10

20

eL - 15 pF, RL

MIN

UNIT
ns
ns

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS, TEXAS 75265

2-233

SN55189, SN55189A, SN75189, SN55179A
QUADRUPLE LINE RECEIVERS

PARAMETER MEASUREMENT INFORMATIONt

.,.,.+-{
RESPONSE
CONTROL

',....O-PEN-l----'A
UNLESS
OTHERWISE ICC
SPECIFIED

':"

i t
RC

:t-VC

fl+

r~ -

V

c

i

\

IPOL

+VC

-=

'="
FIGURE 1. Vr +. Vr -. VOH. VOL

.-..~-,OPEN

RESPONSE
CONTROL
OPEN
ICC is tested for all four
receivers simultaneously

FIGURE 2. IIH. IlL. ICC
VCC

OPEN

FIGURE 3. lOS
t Arrows indicate actual direction of current flow. Current Into a terminal is a positive value.

TEXAS . . ,
INSTRUMENTS
2-234

POST OFFICE BOX 655303 • DA.lLAS. TEXAS 75265

V10H

SN55189, SN55189A, SN75189,SN75189A
QUADRUPLE LINE RECEIVERS
PARAMETER MEASUREMENT INFORMATION
VCC

RESPONSE
CONTROL
OPEN

T

(See Note C)

Cl - 15pF

.... (See Note B)

TEST CIRCUIT

s 10ns~ ~
I I

~

I4-s 10ns
I I
- -

Ltr~90:-:%-'--------=:90:-:%::""!i"\-r - -

10%~50%
INPUT

_""";""'J'

.
-

-

- -

4 V

50%~",_..;.10;;.%;;;..._ _ _ _ __
I0 V

I

If-tPHl""
OUTPUT _ _ _ _~~ I

/+-tPlH-+I
I

90%~UV
~10%
I

VOH

10~.5V~
~,
-----L+-----VOl

I

tTHl~ ,.....

. ~tTLH~

VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: Zo = 50 ll. tw = 500 ns.
B. Cl includes probe and jig capacitances.
C. All diodes are 1N3064 or equivalent.

FIGURE 4. SWITCHING TIMES

TEXAS •
INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 75285

2-235

SN55189, SN55189A, SN75189,

S~75189A

QUADRUPLE LINE RECEIVERS

TYPICAL CHARACTERISTICS
SN55189.SN75189

OUTPUT VOLTAGE
vs
INPUT VOLTAGE
6
5

>

RC - 13 kll
Vc - 5 V

RC - 5 kll
Vc - 5 V

I

RC •

RC- 11kll
Vc - -5 V

00

VCC - 5V
TA - 2SoC
See Figure 1

I

.

!l.
.t:

4

0

>

=
~

0
I
0

3

VT-

VT-

VT+

VT+ VT-

VT+

VT-

VT+

2

>
L--

o

-2

-3

~

-1

-

'---

'--

o

2

f3

S

4

VI-Input Voltage-V

FIGURE 5
SN55189A.SN75189A

OUTPUT VOLTAGE
vs
INPUT VOLTAGE
6

>

I

RC- 5kll
Vc - 5 V

RC -

RC· 11kll
Vc - -5 V

00

VCC - 5 V
TA - 2SOC
See Figure 1

5

I

II

'" 4

~

=
3
~

VT-

VT-

VT+

VT+

VT-

VT+

~ 2

o
>

o

-3

-2

-1

o

2
VI-Input Voltage-V

FIGURE 6

TEXAS " ,
INSTRUMENTS
2-236

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

4

5

SN55189, SN55189A, SN15189, SN15189A
QUADRUPLE LINE RECEIVERS

TYPICAL CHARACTERISTICS t
INPUT THRESHOLD VOLTAGE
vs
FREE-AIR TEMPERATURE

INPUT THRESHOLD VOLTAGE
vs
SUPPLY VOLTAGE

2.4
2.2

>

.....
I

~

>

....
"0

.c
OJ
!
.c

.........

2.0

>

,,~

1.4
1.2

SC- 1.0
0.8

............

r-......
.............

"76'9 V

~

....:::: ~V1"-

"78~t::-

'1

1",

0.6
0.4
-100-75-50-25 0

I

1.6

r----. r--.

r--

&

1,4

i>

1.2

:s!

1.0

r-

I
'189 VT+

i!

0.8

~

0.6

.5

0.4

~

1

'~89 JT -

I

1.6

..........

'189A VT+

1.8

----":76'9)

1.8

l-

.5

2.0

'189A VT-

0.2

o
25 50 75 100 125150

2

3

T A - Free-Air Temperature- °e

4

5

6

7

8

9

10

Vee-Supply VOltage-V

FIGURE 7

FIGURE 8

toata for free-air temperatures below Doe and above 7D·e are applicable to SN55189 and SN55189A circuits only.

TEXAS . "
INSTRUMENTS
POST OfFICE

aox 666303. DALLAS, TE~AS 15266

2-237

SN55189. SN55189A. SN75189. SN75189A
QUADRUPLE LINE RECEIVERS

TYPICAL CHARACTERISTICS
SN76189A
NOISE REJECTION

SN7518!1
NOISE REJE;CTION
6

I

\

5 1\

>

..
iE

4

\

\

I

\

\:

\

I

'C

ct

3
2

\

\

\

\

VCC - 5 V
TA - 25°C
See Note 3
I

III~

11 r'l

Cc -,3

\

~,

Cc - 12 pF'> f-.

C61~ I~~O pF

Ccl_r~~g~F

'"

~

o
10

400010000

40

100

400 1000

4000 10000

tw-Pulse Wldth-ns

tw-Pulse Width-ns
FIGURE 9

FIGURE 10
INPUT CURRENT
vs
INPUT VOLTAGE

10

VCC - 5 V

8 Control open
6
ct

E
I

2

(J

0

/"

/"
/

...c

':i -2

I

=

./

/"

4

'C

~;,

TA - 25°C

-4
-6

/'

/"

/'

-8
-10
-25-20-15-10-5

0

5

10 15 20 25

VI-Input Voltage-V
FIGURE 11
NOTE 3: This figure shows the maximum amplitude of a positive-going pulse that, starting from zero volts, will not cause a change of
the output level.

TEXAS ..,
INSTRUMENTS
2-238

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN55ALS056, SN55ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
03275. APRil 1989

SUITABLE FOR IEEE STANDARD 896 APPLlCATIONSt
•

SN55ALS056 Is an Octal Transceiver

•

SN55ALS057 Is a Quad Transceiver

SN55ALS056 ... J OR W PACKAGE
(TOP VIEW)

•

High-Speed Advanced Low-Power Schottky
Circuitry

•

Low Power Dissipation ... 60 mW/Channel
Max

B1
B2
B3
B4

A1
A2
A3
A4

Vee

GND
B5
B6
B7
B8
T/R

A5
AS

•

High-Impedance P-N-P Inputs

•

BTL'" Logic Level l-V Bus Swing Reduces
Power Consumption

•

Trapezoidal Bus Output Waveform Reduces
Noise Coupling to Adjacent Lines

•

Power-Up/Down Protection (Glitch-Free)

•

Open-Collector Driver Outputs Allow
Wired-OR Connections

A7
A8

es

SN55ALS057 ... J OR W PACKAGE
(TOP VIEW)
D1

R2

81
E1
B2
E2

R3
D4
R4

B3
E3
84
E4

IT

FiE

GND

description
The SN55ALS056 is an 8-channel, monolithic,
high-speed, Advanced Low-Power Schottky
device designed for 2-way data communication
in a densely populated backplane. The
SN55ALS057 is.a 4-channel version with
independent driver input (Dn) and receiver output
(Rn) pins and a separate driver disable for each
driver (En). Both are compatible with Backplane
Tranceiver Logic (BTL'·) technology at
significantly reduced power dissipation per
channel.

These transceivers feature open-collector driver outputs with a series Schottky diode to reduce capacitive
loading to the bus. By using a 2-V pull-up termination on the bus, the output signal swing will be
approximately 1 V, which reduces the power necessary to drive the bus load capacitance. The driver outputs
generate trapezoidal waveforms that reduce crosstalk between channels. The drivers are capable of driving
an equivalent dc load as low as 18.5 O. The receivers have internal low-pass filters to further improve
noise immunity.
The SN55ALS056 and SN55ALS057 are characterized for operation from -55°C to 125°C.
t The transceivers are suitable for IEEE Standard 896 applications to the extent of the operating conditions and characteristics specified
in this data sheet. Certain limits contained in the IEEE specification are not met or cannot be tested over the entire military temperature range.
BTL is a trademark of National Semiconductor Corporation.

PRooUCTloll DATA d••aments.ontain inf.'''"tion
• a,root IS of publicltion date. P,oducts •••fo,m to
spacifications par til. tanns of TaxI. Instruments
:::~:~ir,"i~:I':!1.; =:~II:; :.r:::~~~ not

Copyright © 1989, Texas Instruments Incorporated

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-239

SN55ALS056, SN55ALS057
TRAPEZOIDAL·WAVEFORM INTERFACE BUS TRANSCEIVERS
SN55ALS056 ... FK PACKAGE
(TOP VIEW)
N.-.-.-_

SN55ALS057 ... FK PACKAGE
(TOP VIEW)

oa:cmw

3 2 1 20 19

R2

3

2 1 20 19

4

18

Vee
16

03
R3
04

15
14
9 10 11 12 13

9 10 11 12 13

TEXAS .."

INSTRUMENTS
2·240

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55ALS056, SN55ALS057
TRAPEZOIDAL·WAVEFORM INTERFACE BUS TRANSCEIVERS
logic symbols t

logic diagrams (positive logic)
SN55ALS056

SN55ALS056
_ 111)
T/R

1111

T/R

CS ..:.ll_0":')"'-dL-.J

cs
111

1201

12)

1191

(3)

I1B)

(4)

1171

16)

115)

171

1141

IB)

(13)

19)

112)

Al

XMIT ....

Bl

(20)

A2
A3

J;>-+....~- Bl

111

Al~---~--r-~__- '

B2
B3

A4

B4
+-REC

A5
A6
A7
AB

B5

6 IDENTICAL CHANNELS NOT SHOWN

B6
A8..:.19~)_ _ _- ._ _ _~__~

B7
BB

SN55ALS057

SN55ALS057

TE
RE
01

TE

RE

1101
1111

1201 Bl

El

XMIT - .

Rl
02

01

(18) B2

E2

El

R2
03

1151 B3

Rl

E3
R3
04

1121 B8

(1)

120)

81

(19)

121
+-REC

113) B4

E4

2 IDENTICAL CHANNELS NOT SHOWN

R4

tThese symbols are in accordance with ANSI/IEEE Std 91-1984
and lEe Publication 617-12.

04
E4

R4

TEXAS

181

1131

B4

(12)

191

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-241

SN55ALS056, SN55ALS057
TRAPEZOIDAL·WAVEFORM INTERFACE BUS TRANSCEIVERS
SN55ALS057
FUNCTION TABLE
TRANSMIT/RECEIVE

SN55ALS056
FUNCTION TABLE
TRANSMIT/RECEIVE
CONTROLS

e'!
L
L
H

L

A-B
T (A- BI
R (B- AI

X

0

CHANNELS

CONTROLS

CHANNELS

T/R
H

TE
L
L
L

fiE

L
H
H

D-B

B-R

L
L
H

En
L
H
L

0

R
R

H
L
H

H
X
X

T

0
0

0
0

0

T

0

R

H = high-level, L = low-level, R = receive, T = transmit, 0 '= disable, X = irrelevant
Direction of data transmission is from An to Bn for the SN55ALS056 and from On to Bn for the SN55ALS057.
Direction of data reception is from Bn to An for the SN55ALS056 and from Bn to Rn for the SN55ALS057.
Data transfer is inverting in both directions.

schematics of inputs and outputs
DRIVER OUTPUT

r-

CONTROL INPUTS

RECEIVER INPUT

VCC-------1~----------~--_.--------._--------

VCC----------~~----

I

TElAE ---_--.-.l
INPUT

GND------~~--~--~--~----+----------~------

GND--_4------~--_4-

-..I
RECEIVER OUTPUT

---,

DRIVER INPUT

VCC-------------_~----~~--~------_~--------~---

48 II

I
I

SN55ALS057

20 kU

ONLY

r - -- - --,

----~------~--~

I

En

I

~N

I
I
I
I

_..J

t Additional ESO protection is on the SN55ALS057, which has separate receiver output and driver input pins.

TEXAS

~

INSTRUMENTS
2-242

I
I
I
I

I I
L ______ ..J

GND
. All resistor values shown are nominal.

I

I

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN55ALS056. SN55ALS057
TRAPEZOIDAL·WAVEFORM INTERFACE BUS TRANSCEIVERS

absolute maximum ratings over operating free·air temperature (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6 V
Control input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Driver input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Driver output voltage ....................................................... 2.5 V
Receiver input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2.5 V
Receiver output voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total power dissipation at (or below) 25°C free-air temperature
(see Note 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1375 mW
Operating free-air temperature range .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds. . . . . . . . . . . . . . . . . . . . .. 300°C
NOTES: 1. Voltage values are with respect to network ground terminal.

2. For operation above 25°C free-air temperature, derate to 275 mW at 125°C at the rate of 11.0 mW/oe.

recommended operating conditions
MIN
4.5
2

Supply voltage, Vee
High-level driver and control input voltage, VIH

NOM
5

MAX
5.5

0.8

Low-level driver and control input voltage, VIL
1.9
-55

Bus termination voltage
Operating free-air temperature, T A

2.1
125

UNIT
V
V
V
V
°e

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75266

2-243

SN55ALS056, SN55ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SN55ALS056 electrical characteristics over recommended ranges of operating free-air temperature
and supply voltage (unless otherwise noted)
PARAMETER

TEST CONDITIONS

VIK

Input clamp valtage at An, T IR, ar C§

VT

Receiver input threshold at Sn

= 4.5 V,
= 5 V,
= 5 V,
= 4.5,

Vee
Vee
Vee

Vee
C§ at O.B V,

VOH High-level autput valtage at An

II

=

TA
TA

MIN

TYpt

MAX
-1.5

-lB mA

= 25°C
= -55'e ta 125°C

Bnatl.2V,
TIR at O.B V,

1.65

1.45
1.4

1.7

2.4

UNIT
V
V

V

= -400 ~A
Vee = 4.5 V, Bn

10H
An
Val

law-level autput valtage

es at O.B V,

at 2 V,
TIR at O.B V,

TIR at O.B V,

10l

=

0.5

16 mA

V

Vee = 4.5 V, An at 2 V,
es at O.B V,
TIR at 2 V,
See Figure 1

Bn
An, TIR, ar es
IIH

High-level input current

III

law-level input current at An, TIR, ar es

lOS

Short-circuit output current at An

Bn

0.75

1.2

VI = Vee = 5.5 V
Vee = 5.5 V, VI = 2 V,
An at O.B V,
TIR at O.B V

40
100

Vee = 5.5 V, VI = 0.4 V
Vee = 5.5 V, An at 0 V,
C§ at O.B V,
Bn at 1.2 V,

-35

~

-400

~A

-125

~A

B5

mA
pF

TiA at O.B V
ICC Supply current
ealB) Driver autput capacitance

=

Vee

5.5 V
4.5

SN55ALS057 electrical characteristics over recommended ranges of operating free-air temperature
and supply voltage (unless otherwise noted)
VIK

PARAMETER
Input clamp valtage at Dn, En, TE, ar RE

VT

Receiver input threshold at Sn

=
=
=
=

4.5 V,

Vee
5 V,
Vee
5 V,
Vee
4.5,
liE at O.B V,

VOH High-level autput valtage at Rn

Vee = 4.5 V,
liE at O.B V,
Vee = 4.5 V,

Rn
Val

TEST CONDITIONS
Vee

law-level autput valtage

II

=

TA = 25°C
TA = -55°C ta 125°C
Bn at 1.2 V,
10H = -400
Bn at 2 V,

IT at 0.8

En at 2 V,
See Figure 1

On, En, TE, ar RE

VI = Vee '= 5.5 V
Vee = 5.5 V,
VI = 2 V,
On at O.B V,
En at O.B V,
IT at 0.8 V

IIH

III

law-level input current at On, En, TE, ar RE

lOS

Short-circuit output current at Rn

Bn

ICC Supply current
ealBI Driver autput capacitance

Vee = 5.5 V,
Vee = 5.5 V,
Bn at 1.2 V,
Vee

=

~A

V

VI = 0.4 V
Rn at 0 V,

liE at 0.8

V

1.45
1.4
2.4

TEXAS .."

POST OFFICE BOX 655303 • DAllAS, TEXAS 75265

UNIT
V
V
V

0.5
V
0.75

1.2
40
100

-35

4.5

INSTRUMENlS

MAX
-1.5
1.65
1.7

5.5 V

tAli typical values are at Vee = 5 V, TA = 25'e.

2-244

Typt

10l = 16 mA
On at 2 V,

Bn

High-level input current

MIN

-lB mA

~A

-400

~A

-125

~A

45

mA
pF

SN55ALS056
TRAPEZOIDAL·WAVEFORM INTERFACE BUS TRANSCEIVERS

switching characteristics over recommended ranges of operating free-air temperature and supply voltage
(unless otherwise noted)
receiver
PARAMETER
tpLH
tpHL
tpLZ
tpZL
tpHZ
tpZH
tpLZ

Propagation delay time,
low- to high-level output

Propagation delay time,
high- to low-level output
Output disable time
from low level
Output enable time

to low level
Output disable time
from high level
Output enable time
to high-level
Output disable time
from low level

Output enable time
tpZL
tPHZ
tpZH

FROM
TO
(INPUT) (OUTPUT)

Bn

An

TEST CONDITIONS
es at 0.8 V,

T/R at 0.8 V,

VL = 5 V,

S1 closed,

See Figure 4

es

es

T/R

An

Bn at 2 V,

T/R at 0.8 V,

VL = 5 V,
See Figure 5

S1 closed,

Bn at 0.8 V,

T/R at 0.8 V,

VL = 0, S1 closed, See Figure 5

An

An

20
22

25°C

13

Full range

14

25°C

12

Full range

13

es at 0.8 V,

ve at 2 V,
S1 closed,

25°C

17

Full range

20

S1 open,

See Figure 5
An

25°C
Full range

14

es at 0.8 V,
VL = 5 V,
See Figure 6

or Rn

20

22

VL = 0
See Figure 5

Bn

18

Full range

Full range

S1 closed,

Receiver noise rejection
tw(NR) pulse duration

22

25°C

See Figure 5

es at 0.8 V,

to high level

20

S1 open,

VL = 5 V,

An

25°C
Full range

25°C

from high level

T/R

TYP MAX

T/R at 0.8 V,

Output disable time
Output enable time

MIN

Bn at 0.8 V,

See Figure 5

to low level

TAt

S1 closed,

25°C

25

Full range

40

25°C

12

Full range

13

25°C

15

Full range

22

25°C

4

Full range

2

UNIT

ns

ns

ns

ns

ns

ns

driver
PARAMETER
tpLH
tpHL
tpLH
tpHL
tpLH
tpHL
tTLH
tTHL

Propagation delay time,
low- to high-level output
Propagation delay time,
high- to lOW-level output
Propagation delay time,
low- to high-level output

Propagation delay time,
high- to low-level output
Propagation delay time,
low- to high-level output
Propagation delay time,
high- to low-level output
Transition time,
low- to high-level output
Transition time,
high- to low-level output

FROM
TO
(INPUT) (OUTPUT)

An

es

T/R

Bn

Bn

Bn

TEST CONDITIONS

es at 0.8 V,

T/R at 2 V,

VL = 2 V,

See Figure 2

An and T/R at 2 V, VL = 2 V,
See Figure 2

CS at O.B

V,

VL = 2 V,

See Figure 3

TAt

MIN TYP*

10

Full range

40

25°C

12

Full range

15

25°C
Full range

Bn

es at O.B V,

T/R at 2 V,

VL = 2 V,

See Figure 2

UNIT

ns

18
30
20

25°C
Full range

ns

22

25°C

1B

Full range

37

25°C

1B

.ns

21

Full range

An

MAX

25°C

25°C
Full range

1

25°C
Full range

1

3

1

8
33

1

3

10

ns

13

tFull range is - 55°C to 125°C.
*Typical values are at Vee = 5.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 15265

2-245

SN55ALS056. SN55ALS057
TRAPEZOIDAL·WAVEFORM INTERFACE BUS TRANSCEIVERS
switching characteristics over recommended ranges of operating free·air temperature and supply voltage
.
(unless otherwise noted)
receiver
PARAMETER

FROM
TO
(INPUT) (OUTPUT)

Propagation ·delay time,
tpLH
tpHL

low- to high-level output

Propagation delay time,

RE at 0.8
Bn

Rn

tpZL
tpHZ
tpZH

Output enable time

RE

Rn

Output enable time

Bn at 2 V,

'FE at 2 V,

VL = 5 V,

51 closed,

Bn at 0.8 V, TE at 2 V, VL = 0,

RE

Rn

to high-level

Receiver noise rejection
tw(NR} pulse duration

51 closed,

See Figure 5

to low level
Output disable time
from high level

'FEat2V,

See Figure 4

high- to low-level output
from low level

V,

VL = 5 V,

Output disable time
tpLZ

TAt

TEST CONDITIONS

Sn

Rn

51 closed,

See Figure 5

Bn at 0.8 V,

TE at 2 V,

51 closed,

See Figure 5

VL = 5 V,

Sl closed,

See Figure 6

MIN

MAX

25°e
Full range

UNIT

20
22

25°e

18

Full range

20

25°e

15

Full range

17

25°e

13

Full range

14

25°e

12

Full range

13

25°e

14

Full range

15

25°e

4

Full range

2

ns

ns

ns

ns

driver
PARAMETER

FROM
TO
(INPUT) (OUTPUT)

TAt

TEST CONDITIONS

Propagation delay time,
tPLH
tpHL
tPLH
tpHL

27
12

high- to low-level output

Full range

15

Propagation delay time,

25°e

10

Full range

27

25°e
Full range

17

On

or En

low- to high-level output
Propagation delay time,

TE

TI

Bn

at 0.8 V,

VL = 2 V,

On, En,

Bn

RE et

RE at 2

V,

See Figure 2

2 V, VL = 2 V,

See Figure 2

high- to low-level output
low- to high-level output
Transition time.

trHL

MAX

25°e

low- to high-level output
Propagation delay time,

Transition time,
tTLH

MIN TYP*

25°e
Full range

On
or En

RE at 2

Bn

V,

VL =2 V,

See Figure 2

high- to low-level output

UNIT

10
ns

ns

19

25°e

1

Full range

1

25°e

1

Full range

1

13

MIN

MAX

I

3

8
33

3

10

ns

*Typical values are at Vee = 5 V.

driver plus receiver
PARAMETER
tpLH
tpHL

TO
FROM
(INPUT) (OUTPUT)

Propagation delay time,
low- to high-level output
Propagation delay time,
high- to low-level output

TEST CONDITIONS

RE
On

Rn

at 0.8 V,

reat 0.8 V,

See Figure 7
VL = 2 V,
(Both loads are used)

tFull range is -55°e to 125°e.

TEXAS ."

INSTRUMENTS
2-246

POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

TAt
25°e

25

Full range
·25°e

35

Full range

35

25

UNIT

ns

SN55ALS056. SN55ALS057
TRAPEZOIDAL·WAVEFORM INTERFACE BUS TRANSCEIVERS

PARAMETER MEASUREMENT INFORMATION

RL - IS II

~IB-nl--VO

FIGURE 1. TEST CIRCUIT FOR DRIVER LOW-LEVEL OUTPUT VOLTAGE

IS II
SN55ALS056
OR
SN55ALS057

VI _ _
ICS.TE.An.Dn.Enl

t--:---:-....._--4~- Vo
1 5 0 pF UNCLUDES JIG CAPACITANCEI

TEST CIRCUIT

ICS.'fE13V-----/.-l.5V

VI

OV:
tpLH-+I

{

""'"b' :: ___ ~:~
tPLH~
V
OIBnl

VOH VOL

-

-

I+-

I

r--

1.5V\

I~-------tPHL-+t

I+-

,,,I:,..-!-i-------tPHL....

~

- - --t:":IiI~0%::-----------::9~0%~~11.55 V
1.55 V I
10%_ I
I
10%

..... If-ITLH

ITHL-tot If-

VOLTAGE WAVEFORMS
NOTE: tr = tf S 5 ns from 10% to 90%.

FIGURE 2. DRIVER PROPAGATION DELAY TIMES

TEXAS .."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75266

2-247

SN55ALS056. SN55ALS057
TRAPEZOIDAL·WAVEFORM INTERFACE BUS TRANSCEIVERS
PARAMETER MEASUREMENT INFORMATION

VI

--=.r----,
mil)
1 - -.....

-4--4~VO

J

50 pF UNCLUDES JIG CAPACITANCE)

- TEST CIRCUIT

VI(T/R) 3 V - -

-

-:;-.5"vl

-

\1.5 V

oV I I
tPHL-.j I+tPLH---.! !+-------11""'1
I 1,..----VOIBn)

\10..1_.5_5 _V_ _ _ _ _l)olf1.55 V

:

VOLTAGE WAVEFORMS
NOTE: tr

~

tf s 5 ns from 10% to 90%.

FIGURE 3. PROPAGATION DELAY FROM T/R TO Bn

. . - -....- - ' - -....-VO

VI ---18-n)-I

J

50 pF UNCLUDES JIG CAPACITANCE)

TEST CIRCUIT
2V

1.55 V \
1 V -

-

-

__

1.55

~:Io..- - - - - - - - - - - ' .
~

r

tPLH-+I
VOH VO(An.Rn)

vii

,------

VI(Bn)

.

-

-

-

vI

'-

1.5

-t

1.5 V \

~.-----

VOL'
VOLTAGE WAVEFORMS
NOTE: tr

= tf

S 10 ns from 10% to 90%.

FIGURE 4. RECEIVER PROPAGATION DELAY TIMES

TEXAS

~

INSTRUMENTS
2·248

j4--tPHL

I

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

I
SN55ALS056. SN55ALS057
TRAPEZOIDAL·WAVEFORM INTERFACE BUS TRANSCEIVERS

PARAMETER MEASUREMENT INFORMATION

J

50 pF (INCLUDES JIG CAPACITANCEI

TEST CIRCUIT

VI(CS.iiE.TlRI 3V
. OV

-----I~~1

I

tPHZ-+!

\1.5V

1------k-tpZH

rO. 5 V ~

I+-

------il!-..I- - - - ~
tpLZ ~

1,.-----

1

I ~-f
I

jJl.5V

I
---+t

~

F-_iO.
VO(An.Rnl--------.J· - - -

5V

of

k-tpZL

~1.5V

~.- - - - - -

VOLTAGE WAVEFORMS
NOTE: t,

= tf

5 ns from 10% to 90%.

S

FIGURE 5. PROPAGATION DELAY FROM CS OR T/R TO An OR FROM RE TO Rn

VI----(:'::B-:nl-l
50 pF (INCLUDES JIG CAPACITANCE)

TEST CIRCUIT
BUS LOGIC
HIGH lEVEL

1.85V~
VI

~
1.55 V

1.55 V
1.1 V

BUS LOGIC
LOW LEVEL

1

I

I

I

I

I
I"

1oIII1"1---t."'I-tw(NRI

tw is increased until the output voltage fall just reaches 2.0 V.

L

I

2V

--125V

.

~tw(NRI

tw is increased until the output voltage rise just reaches 0.8 V.

VOLTAGE WAVEFORMS
NOTE: tr = tf

S

2 ns from 10% to 90%.

FIGURE 6. RECEIVER NOISE IMMUNITY

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-249

SN55ALS056. SN55ALS057
TRAPEZOIDAL·WAVEFORM INTERFACE BUS TRANSCEIVERS
PARAMETER MEASUREMENT INFORMATION
2V

50011

-= 50 PF

J

J

50 pF (INCLUDES JIG CAPACITANCE)

TEST CIRCUIT

VIIDn) 3 V -

OV

-

-

-

-;-:'5~

t

~1'5V

I

I+-+t-tPHL

I+-+t-tPLH
VOlRn)

1.5 V

fI~------------------~I

\""_.5_V_ _ _ _ __

VOLTAGE WAVEFORMS

NOTE: Ir

= If

S 5 ns from 10% 10 90%.

FIGURE 7. DRIVER PLUS RECEIVER DELAY TIMES

TEXAS ",

INSTRUMENTS
2-250

POST OFF=ICE BOX 666303 • DALLAS, TEXAS 7&265

SN55ALS126, SN75ALS126
QUADRUPLE LINE DRIVERS
D2299, FEBRUARY 1986-REVISED DCTDBER 1989

•

SN55ALS126, SN75ALS126 ... J PACKAGE
SN75ALS128 ... D OR N PACKAGE

Meets IBM 360/370 1/0 Interface
Specification GA22-6974-3 (Also See
SN55ALS130 and SN75ALS130)

ITOP VIEW)

1Y

VCC

11'
lA
1,2G
2A
21'
2Y
GND

4Y
41'
4A
3,4G
3A
31'
3Y

•

Minimum Output Voltage of 3.11 V at
IOH - -60 rnA

•

Fault Flag Circuit Output Signals Driver
Output Fault

•

Fault-Detection Current Limit Circuit
Minimizes Power Dissipation During a Fault
Condition

•

Advanced Low-Power Schottky Circuitry

•

Dual Common Enable

ITOPVIEW)

•

Individual Fault Flags

U
IU.>U U>

•

Designed to Be an Improved Replacement
for the MC3481

SN55ALS126 ... FK PACKAGE

_.-Z>'I;f'
3

description
The SN55ALS126 and SN75ALS126 quadruple
line drivers are designed to meet the
IBM 360/370 1/0 specification GA22-6974-3.
The output voltage is 3.11 V minimum (at
10H = - 59.3 mAl over the recommended
ranges of supply voltage (4.5 V to 5.95 V) and
temperature. Driver outputs use a fault-detection
current-limit circuit to allow high drive current
but still minimize power dissipation when the
output is shorted to ground. The SN55ALS126
and SN75ALS126 are compatible with standard
TTL logic and supply voltages.

2

1 20 19

lA
1,2G

4

18

5

17

NC

6

16

2A
21'

7
8

14

15

3,4G
3A

9 1011 1213

NC-No internal connection

The SN55ALS126 and SN75ALS126 employ
the IMPACT'" process to achieve fast switching
speeds and low power dissipation. Fault-flag
circuitry is designed to sense and signal a line
short on any Y line. Upon detecting an output
fault condition, the fault-flag circuit forces the
driver output into a low state and signals a fault
condition by causing the fault-flag output to go
low.

FUNCTION TABLE
INPUTS

OUTPUTS

G

A

y

~

L

X
H
H

L

H

H
H

5

L

H
H

H = high level, L = low level,
X = irrelevant, 5 = shorted to
ground

The SN55ALS126 and SN75ALS126 can drive a 50-D load as required in the IBM GA22-6974-3
specification or a 90-D load as used in many 1/0 systems. Optimum performance can be achieved when
the devices are used with either the SN75125, SN75127, SN75128, or SN75129 line receivers.
The SN55ALS126 is characterized for operation from -55°C to 125°C, and the SN75ALS126 is
characterized for operation from OOC to 70°C.

_I.

IMPACT is a trademark of Texas Instruments Incorporated

PRODUCTIO. DATA dac.m....
inl.nnatlo.
••rnat I. of pUliCllli•• date. Prad.......Iann to
of T.... IlIIIrum....

:r.ocifiolli....... the _

n..=~;.I:.:re

=-:: =~~ not

Copyright @ 1989, Texas Instruments Incorporated

TEXAS " ,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

2-251

SN55ALS126. SN75ALS126
QUADRUPLE LINE DRIVERS
logic symbol t

logic diagram (positive logicl
&.t>

lA (3)

(21

lEN2

(2) lF

lA

(31

1.2G -,(",,41. . .-*~

(1)

1Y

(6)

2F

(7)

2Y

(10)

3F

(61

&.t>
3EN4
2A

(11

2A

(51

(7J

lF
1Y

21'
2Y

G3
(5)

3A (11)

(9) 3Y

(101

3A (111

(91

3AG ..:.;(1:.:;21,........;

31'

3Y

(14) 4F
(141

4A (13)

(15) 4Y

4A (131

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.
Pin numbsrs shown are for D, J, and N packages.

1151

4i'
4Y

schematics of inputs and outputs

EQUIVALENT OF EACH INPUT
VCC----------~-----

Req

TYPICAL OF ALL V OUTPUTS
--~~------.....~-VCC

20 kll NOM

,----+-- Y OUTPUT
INPUT-.....__..........

GND--__~~--~-----

------e-~~-e---GND

A Inputs: Req - 20 kll NOM
G Inputs: Req - 10 kll NOM

TEXAS . "
INSTRUMENTS
2-252

POST OFFice" BOX 665303 • DALLAS, TEXAS 75285

TYPICAL OF F OUTPUTS

SN55ALS126, SN75ALS126
QUADRUPLE LINE DRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC ......................................................... 7 V
Input voltage .............................................................. 7 V
Continuous total dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN55ALS126. . . . . . . . . . . . . . . . . . . . . .. - 55 DC to 125 DC
SN75ALS126 .......................... ODC to 70 DC
Storage temperature range ......................................... - 65 DC to 150 DC
Case temperature for 60 seconds: FK package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260 DC
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package ........ 260 DC
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............ 300 DC
DISSIPATION RATING TABLE
PACKAGE
D
FK

J (SN55ALS1261
J (SN75ALS1261
N

TA s 25 G C
POWER RATING
950mW
1375 mW
1375 mW
1025 mW
1150mW

DERATING FACTOR

TA - 70°C
POWER RATING
608mW
880mW
880mW
656mW
736mW

ABOVE TA - 25°C
7.6 mW/oe
11.0 mW/oe
11.0mW/oe
8.2 mW/oe
9.2 mW/oe

TA - 125 G C
POWER RATING
N/A
275 mW
275 mW
N/A
N/A

recommended operating conditions

Supply voltage, Vee
High-level input voltage, VIH
Low-level input voltage, VIL
High-level output current, IOH
Operating free-air temperature, TA

SN55ALS126
MIN NOM MAX
4.5
5
5.95
2

O.B
-55

-59.3
125

SN75ALS126
MIN NOM MAX
4.5
5 5.95
2
0.8
-59.3
0
70

UNIT
V
V
V
mA

°C

. TEXAS..If
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 .

2-253

SN55ALS12"6, SN75ALS126
QUADRUPLE LINE DRIVERS
electrical characteristics over recommended operating free-air temperature range
PARAMETER

VIK

Input clamp voltage

TEST CONDmONS

A,G
Y

VOH

High·level output voltage

Y

F
Y
VOL

Low-level output voltage

y

J!
Y
Y
A

=
=

10L = 8 mA,
VI
0,
VI = 0,

=

10(Off)
II

Input current

r--a

Vee = 4.5 V,

VI = 5.5 V

IIH

High-level input cLJrrent

~
G

Vee = 4.5 V,

VI'= 2.7 V

IlL

Low-level Input current

~
G

Vee = 5.95 V, VI = 0.4 V

lOS

Short-circuit output

F
Y

F
leeH
leeL

Supply current, an
outputs high
Supply current,
Y outputs low

Vee
Vee
Vee
Vee
Vee
Vee
Vee
Vee

=
=
=
-

5.5 V,
5.5 V,
6.96 V,
5.95 V,
5.5 V,
= 5.95 V,
- 5.5 V,
= 6.95 V,

Va = 0,
Va
0
Va = 0,
Va - 0
No load,
No load,
No load,
No load,

V

2.5
0.15

=
=

UNIT

v

3.9

=
=

VIL = 0.8 V
Vee = 4.5 V,
Vee
4.5 V,
Vee = 0,

MAX
-1.5

3.11

=

Vee
5.25 V, 10H = -41 mA
VIH = 2 V
Vee
4.5 V, 10H = -400,.A
VIH
2V
Vee = 6.5 V, 10L = -240 ,.A,
VIL = 0.8 V
Vee
5.95 V, 10L = -1 mA,

Off-stete c!utput current

Y

MIN

II - -18mA
10H = - 59.3 mA

Vee
4.5 V,
Vee
4.6 V,
VIH .; 2 V

0.15
Y at 0 V
Va = 3.11 V
Va = 3.11 V

VIH - 2.7 V

=

-15
VIH = 2.7 V
-15
VIH = 2.7 V
VIH = 2.7 V
VIL - 0.4 V
VIL = 0.4 V

0.5
100
200
100
400
20
80
-250
-1000
-5
-100
-5
-110
26
27
45
47

V

,.A
,.A
,.A
,.A

mA

mA
mA

switching characteristics over recommended operating free-air temperature range
PARAMETER

tPLH
tPHL
tPLH
tpHL
tPLH
tPHL
tPLH
tPHL

Propagation delay time,
IOVv-to-hl~h-level output
Propagatlor. delay time,
hlgh~O-low-level output
Railo of propagation
del~y times
Propagation delay time,
low-to-hlgh-Ievel output
Propagai:ion delay time,
high-to'16w-level output
Propagation delay time,
low-tO-high-level output
Pro~agation delay time,
, . high-to-Iow-Ievel output

FROM

A

A

A

TO

Y

Y

F

TEST CONDITIONS

Vee = 4.5 V to 5.5 V,
RL = 50O,
eL
VH(re!) = 3.11 vt,
See Figures 1 and 2

= 50 pF,
0.3

Vee = 5.25 V to 5.95 V,
eL = 50 pF,
RL = 900,
VH(ref) = 3.9 V
See Figures 1 and 2
Vee = 5 V,
eL=15pF,
See Figures 1 and 2

RL

t For SN55ALS 126 at T A = - 5J5 ·e, VH(,e!) = 2.5 V.

TEXAS ."

INSTRUMENTS
2-254

MIN

POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

= 2 kO,

MAX

UNIT

30

ns

28

ns

3
34

ns

34

ns

45

ns

75

ns

SN55ALS126, SN75ALS126
QUADRUPLE LINE DRIVERS
PARAMETER MEASUREMENT INFORMATION

r---4V

A INPUT ,,-_ _ _ _oIl
tPLH ~

I

1"""""'------'
f4- tpHL

I+-

NORMAL
OPERATION

..,

1

1

l/VH(~f)l\

Y OUTPUT _ _ _ ___II'J.

1 _ 0.5 V

I

I

I

I

I-

tpHL

-t

1.3 V

~ tpLH

U

F OUTPUT - - - - - - - - ' " " ' \

I

1

r-------

]
VOH

ORIVER

~~l~~ION

1._3
V _
-

-VOL

NOTE: The input pulse is supplied by a generator having the following characteristics: PRR
tf S 6 ns, Zout ~ 50 O.

s , MHz, duty cycle s 50%, tr s 6 ns,

FIGURE 1. INPUT AND OUTPUT VOLTAGE WAVEFORMS
5V

Y OUTPUT

---41....---41....------.
F OUTPUT - . - -____-

-41___--.

__

NOTE A: CL includes probe and stray capacitance.

FIGURE 2. SWITCHING CHARACTERISTICS LOAD CIRCUITS

TEXAS . "

INSTRUMENTS
POST OFFICE BOX

656~

• DALLAS. TEXAS 16266

2-255

2-256

SN55ALS130, SN75ALS130
QUADRUPLE LINE DRIVERS
02299, FEBRUARY 1986-REVISEO AUGUST 1989

•

•

SN55ALS130 ... J PACKAGE
SN75ALS130 ... D. J. OR N PACKAGE

Meets IBM 360/370 I/O Interface
Specification GA22-6974-3 (Also see
SN55ALS126 and SN75ALS1261

(TOPVIEWI

lY
lW
lA
G
2A
2W
2Y
GND

Minimum Output Voltage of 3.11 V at
10H - -60 mA

•

Fault-Flag Circuit Output Signals Driver
Output Fault

•

Fault-Detection Current Limit Circuit
Minimizes Power Dissipation During a Fault
Condition

•

Advanced Low-Power Schottky Circuitry

•

Common Enable and Common Fault Flag

•

Designed to be an Improved Replacement
for the MC3485

VCC
4Y
4W
4A

F
3A
3W
3Y

SN55ALS130 ... FK PACKAGE
(TOPVIEWI

s:>-u
~>~~z> ....
3

description
The SN55ALS130 and SN75ALS130 quadruple
line drivers are designed to meet the
IBM 360/370 I/O specification GA22-6974-3.
The output voltage is 3.11 V minimum (at
10H = - 59.3 mAl over the recommended
ranges of supply voltage (4.5 V to 5.95 VI and
temperature. Driver outputs use a fault-detection
current-limit circuit to allow high drive current
but still minimize power dissipation when the
output is shorted to ground. The SN55ALS130
and SN75ALS 130 are compatible with standard
TIL logic and supply voltages.
The SN55ALS130 and SN75ALS130 employ
the IMPACT'" process to achieve fast switching
speeds and low power dissipation. Fault-flag
circuitry is designed to sense and signal a line
short on any Y line. Upon detecting an output
fault condition, the fault-flag circuit forces the
driver output into a low state and signals a fault
condition by causing the fault-flag output to go
low.
The SN55ALS 130 and SN75ALS 130 can drive
a 50-Dload as required in the IBM GA22-6974-3
specification or a 90-Dload as used in many I/O
systems. Optimum performance can be achieved
when the devices are used with either the
SN75125, SN75127, SN75128, orSN75129
line receivers.

2

1 20 19

lA

4

18

G

5

17

NC
2A
2W

6

16

7

15

8

14
9 10 11 12 13

NC - No internal connection
FUNCTION TABLE
INPUTS
Gt
A

V

OUTPUTS
F
W

L

X

L

H

H

X

L

L

H

H

H

H

H

H

L

H

H

S

L

H

H

X

= high level,
= irrelevant,

L

=

low level,

S = shorted to

ground
t G and F are common to the four
drivers. If any of the four Y
outputs is shorted, the Fault-Flag
will respond.

The SN 55ALS 130 is characterized for operation
from -55°C to 125°C. The SN75ALS130 is
characterized for operation from 0 °C to 70°C.
IMPACT is a trademark of Texas Instruments Incorporated

PRODUCTlO. DATA d......nts ..ntsl. ioformotlon
•• rnot II .1 p.bli..ti•• data. Pr.d.......I.rm to
.pno"icoti... por til. IInns of T.... Inltrumlnts

=~:;"[:~~1i =~l:r =..\':t~ lot

Copyright @ 1989, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DAUAS. TEXAS 75266

2-257

SN55ALS130. SN75ALS130
QUADRUPLE LINE DRIVERS
logic symbol t

logic diagram (positive logic)
G (4)

1A (3)

(12) j!
..--_.(:.;;.1.;.:6)

vee

_ _ _+..!.(1.:.,:) 1Y

1-_-+++-+-_---'

1">>-+..::(2~) lW

2A ..!.:(5:.!.)-I-~"-t.....,
_ _ _+..!.(7:.!) 2Y

'--_I':)O---1f---!:(6~) 2W
3A (11)

_____-+-""(9,,,,) 3Y
;.o._+,-,(l~O) 3W
4A (13)
(15) 4Y

'--_1':>0-_....:(..:..14.:.,:) 4W
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.
Pin numbers shoWn are for D. J. and N packages.

TEXAS . "

INSTRUMENTS
2-258

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN55ALS130, SN75ALS130
QUADRUPLE LINE DRIVERS
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL Y OUTPUTS
--~~-------e~-VCC

VCC·----------+--Req

20 kll NOM

...---+-- Y OUTPUT
INPUT -_e_>-I

GND---4~

-+----

__

-----e-~~-e---GND

A Inputs: Req - 20 kll NOM
G Inputs: Req - 10 kll NOM
TYPICAL OF ALL W OUTPUTS

TYPICAL OF F OUTPUT

.....~-~-VCC

---4~---- VCC

FOUTPUT

WOUTPUT

----~~~~-GNO

-41H~"'-GND

TEXAS •
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TeXAS 75266

2-259

SN55ALS130, SN75ALS130
QUADRUPLE LINE DRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC ........................................................ , 7 V
Input voltage ............................•................................. 7 V
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN55ALS 130. . . . . . . . . . . . . . . . . . . . . .. - 55 DC to 125 DC
SN75ALS130 ........... ; .............. ODC to 70 DC
Storage temperature range ......................................... - 65 DC to 150 DC
Case temperature for 60 seconds: FK package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260 DC
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package ........ 260 DC
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............ 300 DC
DISSIPATION RATING TABLE
PACKAGE
D

FK

J (SN55ALS 130)
J (SN75ALS130)
N

TA :s 26°C
POWER RATING
950mW
1375 mW
1375 mW
1025 mW
1150mW

DERATING FACTOR
ABOVE TA - 26°C
7.6 mW/oC

11.0 mW/oe
. 11.0mW/oe
8.2 mW/oe
9.2 mW/oe

TA - 70°C
POWER RATING
608mW
880mW
880mW
656mW
736mW

TA - 126°C
POWER RATING
N/A
275 mW
275 mW
N/A
N/A

recommended operating conditions

Supply voltage, Vee
High-level input voltage, VIH
Low-level input voltage, VIL
High-level output current, IOH
Operating free-air temperature, TA

SN65ALS130
MIN NOM MAX
4.5
5
5.95
2
0.8
-59.3
-55
125

TEXAS . "
INSTRUMENTS
2-260

POST OFFICE BOX 855303 • DAL4\S. TEXAS 75266

SN75ALS130
MIN NOM MAX
4.5
6 5.95
2
0.8
-59.3
0
70

UNIT
V
V
V
mA
°e

SN55ALS130, SN75ALS130
QUADRUPLE LINE DRIVERS

electrical characteristics over recommended operating free-air temperature range
TEST CONDITIONS

PARAMETER
VIK
VOH

VOL

Input clamp voltage
High-level output voltage

Low-level output voltage

10(0111

Off-state output current

10H

High-level output current

II

Input current

IIH

High-level input current

IlL

lOS

leeH
leCL

Low-level input current

Short-circuit output

A,G

Vee = 4.5 V,

Y

Vee = 4.5 V,

MIN

11= -18 rnA
10H = -59.3 rnA, VIH = 2 V

MAX

UNIT

-1.5

V

3.11

Y

Vee = 5.25 V, 10H = -41 rnA,

VIH = 2 V

3.9

W

Vee = 4.5 V,

10H = -400 ~A,

VIH = 2 V

2.5

y

Vee = 5.5 V,

IOL = - 240 ~A,

VIL = 0.8 V

0.15

Y

Vee = 5.95 V, 10L = -1 rnA,

VIL = 0.8 V

0.15

F

Vee = 4.5 V,

10L = 8 rnA,

Y at

W

Vee = 4.5 V,

10L = 8 rnA

Y

Vee = 4.5 V,

VIL = 0,

Va = 3.11 V

100

Y

Vee = 0,

VIL = 0,

Vo=3.11V

200

F

Vec = 5.95 V, VOH = 5.95 V

~
G
A

~
A

~

Vee = 4.5 V,

VIH = 5.5 V

Vee = 4.5 V,

VIH = 2.7 V

aV

0.5

Y

Vce = 5.5 V,

Vo = 0,

Vee = 5.5 V,

Va =

W

Vee = 5.95 V, Va =

V

0.5

100
100
400
20
80
250

Vee = 5.95 V, VIL = 0.4 V

W
Y

V

-1000

Vee = 5.95 V, Va = 0,

-15

-100

-15

~110

-5

VIH = 2.7 V

a

~A
~A
~A

~A

-5

VIH = 2.7 V

a

~A

30

Supply current, all

Vee = 5.5 V,

No load,

VIH = 2.7 V

outputs high

Vec = 5.95 V, No load,

VIH - 2.7 V

32

Supply current,

Vec = 5.5 V,

No load,

VIL = 0.4 V

45

Y outputs low

Vee = 5.95 V, No load,

VIL = 0.4 V

47

rnA

rnA
rnA

switching characteristics over recommended operating free-air temperature range
PARAMETER

FROM

TO

TEST CONDITIONS

MIN

Propagation delay time,
tpLH

low-to-high-Ievel output
Propagation delay time,

tPHL

high-to-Iow-Ievel output

tpLH

Ratio 01 propagation

tpHL

delay times

Vee = 4.5 V to 5.5 V,
A

Y

low-to-high-Ievel output

Propagation delay time,
tPHL

Y

high-to-Iow-Ievel output
low-to-high-Ievel output
Propagation delay time,

tpHL
tpLH
tpHL

RL = 90 n,

CL = 50 pF,

VH(ref) = 3.9 V,

Input f = 5 MHz,

Vee = 5 V,
A

W

RL = 2 kll,

Vee = 5 V,
A

F

ns

28

ns

3
34

ns

34

ns

34

ns

21

ns

RL = 2 kll,

45

ns

75

ns

eL = 15 pF,
See Figures 1 and 2

high-to-Iow-Ievel output

UNIT

30

eL = 15 pF,
See Figures 1 and 2

Propagation delay time,

Propagation delay time,

0.3

See Figures 1 and 2

high-to-Iow-Ievel output
low-to-high-Ievel output

eL = 50 pF,

vt, Input I = 1 MHz,

Vec = 5.25 V to 5.95 V,
A

Propagation delay time,
tpLH

VH(ref) = 3.11

See Figures 1 and 2

Propagation delay time,
tpLH

RL = 50 Il,

MAX

t For SN55ALS130 at TA = -55"e, VH(ref) = 2.5 V.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-261

SN55ALS13D, SN75ALS13D
QUADRUPLE LINE DRIVERS
PARAMETER MEASUREMENT INFORMATION
f4-tf

I
I
A INPUT
(See Note Al

I

10%

I

14---+1-- tpHL

:1!VH1refl

Y OUTPUT
________

~.~.

I

r__.

.

__- J

,..--_ _ _---,

I'
I
I
I

VOH
VOL .

14---*-tPLH

]

I

---------I-.3.....,'U,..~-3-~-·-_-_-_-_-_--::

NOTE A: The input pulse is supplied by a generator having the following characteristics: PRR
tf s 6 ns, Zout '" 50 II.

s

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 76265

EfL

1 MHz, duty cycle

FIGURE 1. INPUT AND OUTPUT VOLTAGE WAVEFORMS

2-262

NORMAL
OPERATION

VvOoHL

w\! l" \-

I+--tpHL~I

F OUTPUT

\!~~0~.5~V.

I4-tPLH~
I
I

!.-tPHL-+j

,
,
,
I

I:
:

_______--:-'__"-"'\ I

i

10%

I

tPLH-t--+/

W OUTPUT

,----4.0V

I
I

s

50%, tr S 6 ns,

SN55ALS130. SN75ALS130
QUADRUPLE LINE DRIVERS

PARAMETER MEASUREMENT INFORMATION
5V

2 kll

r

W OUTPUT --<....--1...-

......- . .HM-__h

CL - 15 pF

ISee Note

Y OUTPUT

Al

--<....- - - - - + - - - - - - - ,
CLOSE FOR
TESTING F

5V

'O"'~, ----i~""

r

CL - 15 pF
ISee Note Al

NOTE A: CL includes probe and stray capacitance.

FIGURE 2. SWITCHING CHARACTERISTICS LOAD CIRCUITS

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303

a

DALLAS. TEXAS 76265

2-263

2-264

SN55ALS160
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
03276, APRil 1989

SUITABLE FOR IEEE STANDARD 488-1978 (GPIB)t
J OR W PACKAGE
ITOP VIEW)

•

8-Channel Bidirectional Transceiver

•

High-Speed Advanced Low-Power Schottky
Circuitry

•

Low Power Dissipation, , , 56 mW Max per
Channel

•

Fast Propagation Times , . , 20 ns Max

•

High-Impedance P-N-P Inputs

•

Receiver Hysteresis. , . 550 mV Typ

•

Open-Collector Driver Output Option

•

No Loading of Bus When Device Is Powered
Down (VCC = 0)

•

Power-Up/Power-Down Protection
(Glitch-Free)

TE

Vee
D1
D2

B1
B2
GPIB
I/O
PORTS

B3

D3

B4

D4

TERMINAL

B5

D5

liD PORTS

B6

D6

B7
B8

D7
D8

GND

PE

FK PACKAGE
ITOP VIEW)
U

N

ttl

description

w u~
Ci.i 1 - > 0
2

The SN55ALS 160 eight-channel generalpurpose interface bus transceiver is a monolithic,
high-speed, Advanced Low-Power Schottky
device
designed
for
two-way
data
communications over single-ended transmission
lines. The transceiver features driver outputs
that can be operated in either the passive-pull up
or three-state mode. If Talk Enable (TEl is high,
these ports have the characteristics of passivepullup outputs when Pullup Enable (PEl is low
and of three-state outputs when PE is high.
Taking TE low places these ports in the highimpedance state. The driver outputs are
designed to handle loads up to 48 mA of sink
current.
An active turn-off feature has been incorporated
into the bus-terminating resistors so that the
device exhibits a high impedance to the bus
when VCC = O. When combined with the
SN55ALS161 management bus transceiver, the
device provides the complete 16-wire interface
for the IEEE 488 bus.
The SN55ALS1 60 is characterized for operation
from - 55 ac to 125 ac.

B3

1 20 19
18

4

17

B4

16

B5

6

B6

7

15

B7

8

14
9 1011 12 13
000

woo ....

ttlZ 0..00
(!)

FUNCTION TABLES
EACH DRIVER

EACH RECEIVER

INPUTS

OUTPUT

INPUTS

D

TE

PE

B

B

TE

PE

OUTPUT

H

H

H

H

L

L

X

L

l

H

X

l

H

l

X

H

H

X

L

Zl

X

H

X

Z

X

L

X

Zl

D

H = high level, L = low level, X = irrelevant,
Z = high-impedance state.
t This is the high-impedance state of a normal 3-state
output modified by the internal resistors to Vee and
ground.

tThe transceivers are suitable for IEEE Standard 896 applications to the extent of the operating conditions and characteristics specified
in this data sheet. Certain limits contained in the IEEE specification are not met or cannot be tested over the entire military temperature range.

PRODUCTION DATA d••umants ••nt.i. information
.urrant .s of pallli..ti•• date. Preducts •• nform IG
.pacifi._s par the term. of T.... Instrumants

=~;·:~:I:t

=::i:r :.r:~.:~:~as not

TEXAS

~

Copyright © 1989, Texas Instruments Incorporated

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-265

SN55ALS160
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
logic diagram (positive logic)

logic symbol t

02 (181

61
62

03 (171

63
84
85

04 (161

86
TERMINAL

87

88

05 ...:(,,-15::.;1_-+..-1

>-__-,

06 (141

08 (121

schematics of inputs and outputs
EQUIVALENT OF ALL INPUT/OUTPUT PORTS

VCC-------~--------

10 k!l
NOM

9kll
NOM

INPUT

GNO - -......----4.....- - -......-

L ___ _

INPUT/OUTPUT
PORT
Driver output Req ~ 30 !l NOM
Receiver output Req ~ 110!l NOM
Circuit inside dashed lines is on the driver outputs only.

TEXAS •

INSTRUMENTS
2·266

I/O
PORTS

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.'

EQUIVALENT OF ALL CONTROL INPUTS

GPI6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55ALS160
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Low-level driver output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 100 mA
Low-level output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 2): ...... 1375 mW
Operating free-air temperature range .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from the case for 60 seconds: J or W package ..... 300°C
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
NOTES: 1. All voltage values are with respect to network ground terminal.

2. For operation above 25°C free-air temperature, derate to 275 mW at 125°C at the rate of 11.0 mW/oC.

recommended operating conditions
Supply voltage. Vee
TE and PE at TA
High-level input voltage, VIH

=

-55°e to 125°e

Bus and terminal at T A
Bus and terminal at T A
TE and PE at TA

Low-level input voltage, VIL

=

Low-level output current, 10L

NOM

MAX

UNIT

5

5.25

V

2

25 DC or 125°C

2

=
=

V

2.1

-55°e

-55°e to 125°e

Bus and terminal' at T A
Bus and terminal at T A

High-level output current, 10H

=
=

MIN
4.75

0.8

25°e or - 55 °e

0.8

125°e

0.7

Bus ports with pullups active (Vee

=

-5.2

5 V)

Terminal ports

-800
48

Bus ports

16

Terminal ports

Operating free-air temperature, T A

-55

125

V
mA
~A

mA
°e

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-267

SN55ALS160
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
PARAMETER
VIK

TEST CONDITIONS

Input clamp voltage
Hysteresis

Vhys

Bus

IVT+ - VT-)

Terminal

High-level
VOH

output voltage

Bus

II

IlL

Terminal

maximum input

input current

Terminal,

Low-level

PE, or TE

input current

TA

~

25°e

Vee
Vee

=

5 V,
5 V,

TA

=

125°e

5 V,

10H

~

Vee

~

Vee

=
=
=
=

0.4

4.75 V, 10H
4.75 V,' 10L

= - 5.2
= -5.2

V

0.55
V

0.4
2.7

3.5

2.5

3.3

mA, PE and TE at 2 V

2.2

TE at 0.8 V

48 mA,
25°e or 125°e

V

0.3

0.5

0.35

0.5

0.35

0.55

V

bus port

Short-circuit

Terminal

output current

Bus

= 5.25 V, VI = 5.5 V

0.2

100

~A

Vee

=

5.25 V, VI

= 2.7 V

0.1

20

~A

Vee

~

5.25 V, VI

= 0.5 V

-30

-100

~A

3.0

3.7

Vee

= 0,

Vee
Vee
5 V, TA

Vllbus)

=

Vllbusl

=

VII bus)
Vllbus)

=

=

=

=

-1.5
-3.2

0

2.5
-3.2

3.7 V to 5 V

2.5

= 5 V to 5.5 V

0.7

2.5

0 to 2.5 V

0 to 2 V,

f

= 1 MHz

25°e.

TEXAS "'-

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

V

-1.3

0

Bus outputs low and enabled
5 V to 0, VIIO

2.5

2.5 V to 3.7 V

= 5.25 V, Terminal outputs low and enabled

No load

=

=0
= -12 mA
Vllbus) = -1.5 V to 0.4 V
Vllbus) = 0.4 V to 2.5 V
Ilibus)
Iljbus)

Vee = 5.25 V

Supply current

tAli typical values are at Vee

Vee

Vee = 5 V,
Driver disabled

Power on

ei!olbus) Bus-port capacitance

2-268

UNIT

-1.5

mA, PE and TE at 2 V

= 16 mA,

=

MAX

-0.8
0.25

TA = -55°e
4.75 V, 10H = - 800 ~A, TE at 0.8 V

Vee = 5 V,
Driver disabled

Power off

lee

5 V,

Typt

Input current at

Current into

lOS

~

=
Vee ~ 4.75 V, 10L = 48 mA,
TE at 2 V,
TA = -55°e

Bus

VIOlbus) Voltage at bus port

11101bus)

Vee

MIN

-18 mA

~

Vee
4.75 V, 10L
TE at 2 V,
TA

voltage
High-level
IIH

4.75 V, II

Vee

Low~level

output voltage

~

Vee

Terminal
VOL

Vee

-15

-35

-25

-50

40

~A

-75
-125

mA

42

56

52

85

30

mA

mA

pF

SN55ALS160
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
switching characteristics at Vcc
PARAMETER

= 4.75 V. 5 V. and 5.25 V and CL =

FROM
(INPUT)

TO
(OUTPUT)

TEST CONDITIONS

Terminal

Bus

See Figure 1

tpHL
tpLH
tpHL
tpZH

low- to high-level output
Propagation delay time,

tpZH
tpHZ
tpZL
tpLZ
ten

10

Full range
25°C

MAX

10

14

8

15

25°C
Full range

8

15

24

3b

Propagation delay time,

Bus

Terminal

See Figure 2

high- to low-level output

25°C

Output enable time

to high level

Output enable time

1B

TE

Bus

See Figure 3

to low level

41
9

14

16

28

16

Full range

25°C
Full range
25°C

Output disable time

12

Full range

Output enable time

25°C
Full range

24

25°C

10

Output disable time

from high level
Output enable time

TE

Terminal

See Figure 4

to low level

25°C

from low level

Full range

Output pullup

25°C

enable time

PE

Bus

See Figure 5

Full range

disable time

18
23

15

26

15

30
24

ns

31
16

Full range
25°C

36
50

Full range

Output disable time

19
24

Full range
25°C

ns

34

from low level

to high level

ns

18

Full range
25°C

ns

16

25°C
Full range

low- to high-level output

UNIT

17
20

Full range

Output pullup
tdis

TYP*

Propagation delay time,

tpHZ from high level

tpLZ

MIN

high· to low· level output

Output disable time

tpZL

TAt
25°C

Propagation delay time,

tPLH

50 pF (unless otherwise noted)

24
25

9

16

ns

20

tFull range is - 55°C to 125°C.
tAli typical values are at VCC = 5 V.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-269

SN55ALS16D
OCTAL G.ENERAL·PURPOSE .INTERFACE BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION

~.~V---::

D::j.5V

tPLH~
B OUTPUT

/1

tPHL-l+-+j

,..2-.2-V-----...,~-:
- - -VOH
1.0V
VOL

3V

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 1. TERMINAL·TO·BUS PROPAGATION DELAY TIMES

B INPUT

f.5

~

\.~V- -

V

.

-3 V

I

tPLH~

OV

• tPHL-l+-+!

I ,-_ _ _ _ _ _"""".J - I
I

D OUTPUT

1.5 V

-VOH

1.5 V
VOL

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 2. BUS·TO·TERMINAL PROPAGATION DELAY TIMES

3V

S2
S1

T~.5V
tPZH~

'EL -

500.1l

50 pF
~see Note BI

,.-

B OUTPUT

I :

r------+~90%

S1 to 3 V
S2 OPEN

I

2 V

I

-

-VOH

0.8 V

tpZL~

B ~O~U=:TP=:'U=T"--" :
S1 to GND
S2 CLOSED

TEST

~.::---::
tPHZ~

__

3V

1.0 V

VOLTAGE WAVEFORMS

~IRCUIT

FIGURE 3. TE·TO·BUS ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
tf S 5 ns, Zo = 50 Il.
B. CL includes probe and. jig capacitance.

.
2·270

TEXAS'"

IN STRUM ENlS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

s

MHz, 50% duty cycle, tr S 6 ns,

SN55ALS160
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER

PARAMETER MEASUREMENT INFORMATION
7V
'" S2

5000

\..
TE INPUT}'\.1._5_V_ _ _ _ _

tPZH~
D OUTPUT I

j4:

tpHZ~

1.5V

tpLZ~

1.0 V

-VOH

OV

~
I
I

I

S2 CLOSED

3V
-0 V

~

:
I

~

D OUTPUT
S1 to GND

:__

-90% -

I

S1t03VI
S20PENI

tpZL~

~t ~

3V

I

'-______.J"._O.:!.:! _ -VOL
VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 4. TE·TO·TERMINAL ENABLE AND DISABLE TIMES

~------",-

-

-

-

-3 V

1.5 V

>-.....:..:...---<_-_>--'OUTPUT

I '----0 V

I

tdis-+!

ten~

RL =

500

n

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 5. PE·TO·BUS PULLUP ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
tf s 5 ns, Zo = 50 n.
B. CL includes probe and jig capacitance.

s MHz. 50% duty cycle. tr

S

6 ns,

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2·271

SN55ALS160
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
TERMINAL HIGH-LEVEL OUTPUT VOLTAGE

4.0

>I

3.5

l!

3.0

8.

."

0

>

""'"

2.5

S-

"

0
OJ

2.0

-l

1.5

.

vs

HIGH-LEVEL OUTPUT CURRENT

LOW-LEVEL OUTPUT CURRENT

:E'"
I

:I:

0

>

VCC=5V
TA=25°C-

8.

o

-5

I

I

VCC - 5 V
0.5 _TA - 25°C

l!

.."

>

S:::J

0
OJ

0.4

0.3

..
>

-l

~

-10 -15 -20

~

0.2

0

-l

i\."'1\

0.5

o

>I
0

'"

1.0

0.6

T J

,
"' '\

>

~

TERMINAL LOW-LEVEL OUTPUT VOLTAGE

vs

I

-l

0

>

i\.

V

o

IOH-High-Level Output Current-mA

10

20

FIGURE 7
TERMINAL OUTPUT VOLTAGE

vs
BUS INPUT VOLTAGE
4.0

>

Vce = 5 V
No load
TA = 25°e

3.0

I

!

2.5

:::

2.0

o

&

VT-

9

1.5

~

1.0

VT+

0.5

o
o

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VI-Input Voltage-V

FIGURE 8

2-272

30

40

50

IOL -Low-Level Output Current-mA

FIGURE 6

3.5

V

0.1

o

-25 -30 - 35 -40

/

/

V

/

V

/

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

60

SN55ALS160
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
BUS HIGH-LEVEL OUTPUT VOLTAGE

vs

BUS HIGH-LEVEL OUTPUT CURRENT

BUS LOW-LEVEL OUTPUT CURRENT

4

3

'0

2

..J

...

.i::.

J:

J

I
Cc =15V

_ TA = 25°C

0.5

!

I
0.4
0.3

~

0.2

..J

I

"'""

-20

V

..J

0

>
-10

"
..,.

0
Ii

'\

0

-30

..J

0

>

""

-40

-50

/'

FIGURE 9

o

10

20 30

40

50 60

70 80 90 100

BUS CURRENT

vs

vs

TERMINAL INPUT VOLTAGE

BUS VOLTAGE
2

No load

TA = 25°C
3r--+--~--~--~-+--~--+-~

&
:I
1;;

II

FIGURE 10

VCC= 5V

~

/"

IOL -Low· Level Output Current-rnA

BUS OUTPUT VOLTAGE

I

/"

V

V

o

-60

/'

/

0.1

IOH-High-Level Output Current-rnA

>

/'

e-"

r'\..

I

o

.

>...

:t:

0

>I
'0

""

e-"

"
..,.

VCC = 5 V
TA=25°C

~

>
...

0
Ii

0.6

I

>I

&
:I

BUS LOW-LEVEL OUTPUT VOLTAGE

vs

«
E
.!.c
~

!i

2 I--~---+----+---++--+-----'I---+---j

-1

u

:;

So

CD

>

g

.L

9"o

:;

.Q

OL--J__-L__~__L - - J__-L__~-..J

0.9

1.0

1.1

1.2

1.3

1.4

1.5 1.6

1.7

VI/O(busl-Bus Voltage-V

VI-Input Voltage-V
FIGURE 11

FIGURE 12

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2·273

2-274

SN55ALS161
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
03277, APRIL 1989

SUITABLE FOR IEEE STANDARD 488·1978 (GPIB) APPLICATIONSt
J OR W PACKAGE
(TOP VIEW)

•

a·Channel Bidirectional Transceiver

•

Designed to Implement Control Bus
Interface

•

Designed for Single Controller

•

High·Speed Advanced Low Power Schottky
Circuitry

•

Low Power Dissipation. , . 59 mW Max per
Channel

•

Fast Propagation Times , .. 25 ns Max

•

High·lmpedance P-N·P Inputs

•

Receiver Hysteresis ... 550 mV Typ

•

Bus-Terminating Resistors Provided on
Driver Outputs

•

No Loading of Bus When Device Is Powered
Down (VCC = 0)

TE

Vee
REN

REN
IFe
NDAC

GPIB
I/O
PORTS

IFe
NDAC

NRFD

NRFD

TERMINAL

DAV

DAV

I/O PORTS

EOI

EOI

ATN

ATN

SRQ

SRQ

GND

De
FK PACKAGE
(TOP VIEW)

U zw w Uz
Uw
!: a:1->a:
3

•

Power-Up/Power-Down Protection
(Glitch-Free)

description
The SN55ALS161 eight-channel generalpurpose interface bus transceiver is a monolithic,
high-speed, Advanced Low-Power Schottky
process device designed to provide the busmanagement and data-transfer signals between
operating units of a single controller
instrumentation system, When combined with
the SN55ALS 160 octal bus transceiver, the
SN55ALS161 provides the complete 16-wire
interface for the IEEE 488 bus, t
The SN55ALS161 features eight driver-receiver
pairs connected in a front-to-back configuration
to form input/output (I/O) ports at both the bus
and terminal sides, The direction of data through
these driver-receiver pairs is determined by the
De and TE enable signals,

2

I 2019
18

IFe

NRFD

4
5

17

NDAC

DAV

6

16

NRFD

EOI

7

15

ATN

8

DAV
EOI

NDAC

14

9 10 II 1213

OOuoz
a:zoa:1OO(!l

00«

CHANNEL IDENTIFICATION TABLE
NAME

IDENTITY

DC

Direct,ion Control

TE

Talk Enable

ATN

Attention

SRO

Service Request

REN

Remote Enable

IFC

Interface Clear

EDI

End or Identify

DAV

Data Valid

NDAC

Not Data Accepted

NRFD

Not Ready for Data

CLASS
Control

Bus
Management

Data
Transfer

The driver outputs (GPIB I/O ports) feature active
bus-terminating resistor circuits designed to
provide a high impedance to the bus when
Vee = O. The drivers are designed to handle loads up to 48-mA sink current. Each receiver features p-n-p
transistor inputs for high input impedance and a hysteresis of 250 mV minimum for increased noise
immunity. All receivers have 3-state outputs to present a high impedance to the terminal when disabled,
The SN55ALS161 is characterized for operation from -55°e to 125°e.
t The transceivers are suitable for IEEE Standard 488 applications to the extent of the operating conditions and characteristics specified
in this data sheet. Certain limits contained in the IEEE specification are not met or cannot be tested over the entire military temperature range.

PRODUCTION DATA d......... oontoin information
••rraet n of pablicati... dati. Prod.... cant.... to
IpacHiaati.n pur tho torms of TI181 I.stru ...n"

=~I:I'~ ~=:~:l' :.=::." not

Copyright @ 1989, Texas Instruments Incorporated

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 76265

2-275

SN55ALS161
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER

logic diagram (positive logic)

logic symbol t
DC (11 )
TEll)

EN1/G4
EN2/G5
>1

ATNI13

EOll141

[>

SRQ(12)

[>

REN (19 )

[>

IFC (18 )

[>

DAV(15 )

[>

NDACI171

[>

ATN

(13)

(8) ATN

(14)

(7) EOI

EOI

SRO (12)

(9)

REN (19)

(2)

SRO

REN

1
NRFDI161

[>

(3) IFC

IFC (18)
tThis symbol is in accordance with ANSI!IE~E Std 91-1984 and
lEG Publication 617-12.

'V Designates

3~state

(15)

(6)

DAV

DAV

outputs.

e Designates passive-pull up outputs.

NDAC

NRFD

(17)

(4) NDAC

(16)

(5) NRFD

RECEIVE/TRANSMIT FUNCTION TABLE
CONTROLS

BUS·MANAGEMENT CHANNELS

DC

TE

ATNt

H

H

H

H

H

L

L

L

H

L

L

L

H

L

L

H

X
X

ATNt

SRQ

R

T

IFC
REN
(Controlled by DC)
R

R

DATA·TRANSFER CHANNELS
EOI
T

~
R

NRFD
DAV
NDAC
(Controlled by TEl

T

R

R

,

T

R

T

T

-r

R

T

T

R

T
R

R

R

R

R

T

T

T

T

T

T

R

R

T

H = high level, L = low level, R = receive, T = transmit, X = irrelevant
Direction of data transmission is from the terminal side to the bus side,. and the direction of data reception is from the bus side to the
terminal side. Data transfer is non inverting in both directions.
t ATN is a normal transceiver channel that functions additionally as an internal direction control or talk enable for EOI whenever the DC
and TE inputs are in the sa.me state. When DC and TE are in opposite states, the ATN channel functions as an independent transceiver only.

TEXAS •

2-276

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 752'66

SN55ALS161
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
schematics of inputs and outputs
EOUIVALENT OF ALL
CONTROL INPUTS

TYPICAL OF SRO, NDAC, and NRFD
GPIB I/O PORT
-t------~--~rr----~~----~vcc

vcc------.------9kn

17 k!/

10ldl

NOM

NOM

NOM

INPUT

GNO-4____

~

____

~

~---~~~~_~_-_-_.~+-~--~--------GND
INPUT/OUTPUT
PORT

Circuit inside dashed lines is on the driver outputs only.

TYPICAL OF ALL I/O PORTS
EXCEPT SRO, NDAC, and NRFD GPIB I/O PORTS
~~--~-------r'---~r-----'------'---'Vcc

INPUT/OUTPUT
PORT

Driver output Req = 30 !l NOM
Receiver output Req = 110!l NOM
Circuit inside dashed lines is on the driver outputs only.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc(see Note 1) __________ . _ . __ . __ . __ . ______ .... _ . _ .... _ . . . . . .. 7 V
Input voltage _ .. _ .. _ ................. _ . _ ............................. _ . _ .. 5.5 V
Low-level driver output current .............. _ ......................... _ . . . .. 100 rnA
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 2) . . . . . .. 1375 mW
Operating free-air temperature range .......... _ . _ .-. . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
Storage temperature range . _ .. _ ............ _ ..... _ .... _ . . . . . . . . . . .. - 65°C to 150°C
Case temperature for 60 seconds: FK package .................... _ ............ _. 260°C
Lead temperature 1,6 mm (1/16 inch) from the case for 60 seconds ............... _ . _. 300°C
NOTES: 1. All voltage values are with respect to network ground terminal.
2. For operation above 25°C free-air temperature, derate to 275 mW at 125°C at the rate of 11.0 mW/oC.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-277

SN55ALS161
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
recommended operating conditions
Supply voltage, Vee
TE and De at TA = -55°e to 125°e
Bus and terminal at TA = 25°e or 125 °e

High-level input 'Voltage, VIH

Bus and terminal at T A = - 55 °e

MIN
4.75
2

NOM

MAX

UNIT

5

5.25

V

2
2.1

V
0.8
0.8
0.7
-5.2

TE and De at TA = -55°e to 125°e
Bus and terminal at T A - 25°e or - 55 °e
Bus and terminal at T A = 125°e
Bus ports with pullups active (Vee = 5 V)

Low-level input voltage, VIL

High-level output current, 10H

-800

Terminal ports

Bus ports.

Low-level output current, 10L

48
16
125

Terminal ports
-55

Operating free-air temperature, T A

V
mA
~A

mA
°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
TEST CONDITIONS

MIN TYpt

Vee = 4.75 V,

11= -18 mA

-0.8

Vee = 5 V,

TA = 25°e

Vee = 5 V,

TA = 125°e
TA = -55 oe

PARAMETER

VIK
Vhys

Input clamp voltage
Hysteresis (VT +

- VT _ ) Bus
Terminal

VOH;

High-level output voltage

Bus
Terminal

VOL

Low-level output voltage

Bus

Vee = 5 V,
Vee = 4.75 V,

0.4

IIH
IlL
VI/O(bus)

11/0(bus)

Input current at
maximum input voltage

Terminal

High-level

Terminal

input current

and

Low-level
input current

control

inputs

2.7
2.5

10H = -5.2 mA
10L = 16 mA
Vee = 4.75 V,
10L = 48 mA,
TA = 25°e or 125°e

2.2

Current into bus port

Power on

Power off
lOS;

Terminal

output current

Bus

lee

SupplV; current

eilo(bus)

Bus-port capacitance

V

0.3

0.5

0.35

0.5

0.35

0.55

V

0.2

100

~

Vee = 5.25 V,

VI = 2.7 V

0.1

20

~A

Vee = 5.25 V,

VI = 0.5 V

-30 -100

~A

Vee = 5 V,
Driver disabled

2.5

Illbusl = 0
II(J>usL = - 12 mA
Vl(bus) = -1.5 V to 0.4 V -1.3
0
Vllbusl = 0.4 V to 2.5 V

Vee = 0

3.0

2.5
-3.2
0
0.7

2.5
2.5

-15
-25

40
-35 -75
-50 -125

VUbus) = 0 to 2.5 V

Vee = 5.25 V
No load, TE and De low
Vee = 5.25 V,
Vee = 5 V to 0,
VI/O = 0 to 2 V, f = 1 MHz

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 76286

3.7
-1.5

V

-3.2

Vl(bus) = 2.5 V to 3.7 V

t All typical values are at Vee = 5 V, TA = 25°e.
;VOH and lOS apply for three-state outputs only.

2-278

3.5
3.3

VI = 5.5 V

VII bus I = 3.7 V to 5 V
Vllbusl = 5 V to 5.5 V
Short-circuit

V

Vee = 5.25 V,

Vee = 5 V,
Driver disabled

Voltage at bus port

V

0.4

Vee = 4.75 V, 110 = 48 mA, TA = -55°e
II

UNIT

0.55

0.25

10H = -800 ~
10H = -5.2 mA

Vee = 5 V,
Vee = 4.75 V,
Vee = 4.75 V,

MAX
-1.5

55
30

90

mA

~A

mA
mA
pF

SN55ALS161
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER

switching characteristics at Vcc
PARAMETER

tpLH
tpHL

= 4.75 V, 5 V, and 5.25 V and CL = 50 pF (unless otherwise noted)

FROM

TO

IINPUTI

IOUTPUT!

low- to high-level output
Propagation delay time,

Terminal

tpHL
tpLH
tpHL
tpZH
tpHZ
tpZL
tpLZ
tpZH
tpHZ

low- to high-level output

tpLZ
tpZH
tpHZ
tpZL
tpLZ

See Figure 1

MIN

TYP*

MAX

10

17

Full range
25°C

20
10

NRFD, SRO,

See Figure 2

25°C

25

Full range

30
10

Propagation delay time,

25°C

10

low- to high-level output

Full range

NDAC

Propagation delay time.

Bus

See Figure 2

Terminal

high- to low-level output
Output enable time

25°C

Output enable time

TE

Bus
(ATN, REN,

or DC

IFC, and

25°C
See Figure 3

DAVI

to low level

20

25°C

16

28

16

10

25°C
Full range

24

25°C

13

TE
or DC

Bus
(EOI)

See Figure .3

Output disable time

Output disable time
TE
or DC

Terminal

See Figure 4

24

36
50

25°C
Full range

12

25°C

20

to low level

Full range

Output disable time

25°C
Full range

from low level

35

ns

43

25°C
Full range

Output enable time

Output enable time

21

20

Full range

from high level

19
25

13

25°C

from low level
to high level

30
48

Full range
25°C

19
24

Full range

to low level

ns

34

Output enable time

Output disable time

ns

30
14

Full range

from high level

15

41

from low level
to high level

15

8

Full range

Output disable time

ns

18

Full range
25°C

14

18
10

Full range

Output disable time
from high level

25°C

ns

16

Full range

to high level

14

UNIT

16

Full range

25°C
Full range

Propagation delay time,

high- to low-level output

Output enable time
tpZL

(Except
SRO, NDAC,

Bus
Terminal

TAt

25°C

and NRFDI

high- to low-level output
Propagation delay time

tpLH

TEST CONDITIONS

Bus

Propagation delay time,

27

20
33
34

ns

41
13

24
35

tFull range is - 55°C to 125°C.
tAli typical values are at VCC = 5 V.

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-279

SN55ALS161
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER

PARAMETER MEASUREMENT INFORMATION
7V

7V

5000

5000
FROM (BUS)
OUTPUT UNDER
TEST

FROM (TERMINAL)
OUTPUT UNDER
--~-------e~~--TESTPOINT
TEST

TEST POINT

'1'

CL-50pF
(S•• Note A)

'1'

5000
....

LOAD CIRCUIT
TERMINAL
INPUT

BUS
INPUT

---0 V
tPHL~

BUS
OUTPUT

~""-----"'-I2.2V

-

-VOH
OUTPUT

VOLTAGE WAVEFORMS

VOLTAGE WAVEFORMS

FIGURE 1. TERMINAL·TO·BUS
PROPAGATION DELAY TIMES

FIGURE 2. BUS· TO· TERMINAL
PROPAGATION DELAY TIMES

NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR
tf S 6 ns, Zo = 50 0.

TEXAS . .
INSTRUMENTS
2·280

5000
....

LOAD CIRCUIT

_ - - - - - " " ' - - - --3V
1.5V
1.5V
(S•• Note B)

CL-50pF
(SOO Note A)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

s

1 MHz, 50% duty cycle, tr S 6 ns,

SN55ALS161
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION
51

FROM (BUS)
OUTPUT UNDER-....TEST

51

~7V

5000
FROM (TERMINAL)
OUTPUT
-<...UNDER TEST

..... . - -...- TEST POINT

CL-50pF
J(SeeNotoA)

CL-50pF
(See Note A)

tPZH-+I
BUS
I
OUTPUT
I
51 OPEN
I

f+I

t+-

2V

I

I

~II
0.5 V
- - -

"3.5 V
VOL

TERMINAL
OUTPUT
51 CLOSED

VOL TAGE WAVEFORMS

1.5V

t+-

tpHZ-+(

r--

------

I

I

VOH

90%

I
tPLZ-i

OV

I
1.0 V

VOLTAGE WAVEFORMS

FIGURE 4. TERMINAL ENABLE
AND DISABLE TIMES

FIGURE 3. BUS ENABLE AND
DISABLE TIMES
NOTES:

r--

I

I

tPZL......j

\!1.0V
\

Jl'

51 OPEN

OV

tPLZ--l..j

3V

CONTROL
¥1.5 V
~1.5 V
INPUT __ J 1"1.
(See_____
Note B) .J I L _____ OV
I ~ ___
tPZH-I
TERMINAL
I
OUTPUT
I

I

tpZL~
BUS
OUTPUT
51 CLOSED

tPHZ-.I

r-------h

I

5000

--, ,--------, r-----

,-----3V

V l .5V
1\

'I'~-------JI~----OV
__ J
(Soe Note B)

5000

LOAD CIRCUIT

--"'\ , - - - - - - - ,
Yl.5V

7 V

....I---~- TEST POINT

J

5000

LOAD CIRCUIT

CONTROL
I NPUT

r:r-

A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR ::::; 1 MHz, 50% duty cycle, tr ::;; 6 n5,
tf " 6 ns, Zo = 50 0.

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2·281

SN55ALS161
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER

TYPICAL CHARACTERISTICS

>I

TERMINAL HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
4.0
VCC - 5 V
TA - 25°C
3.5

.........

"'"
:l

3.0

>...

2.5

I\.

:::J

S:::J

0

a;

J:

1.0

0>

I
J:
0

>

0.5

o
o

0.4

:::J
Co

0.3

0

a;
>

"

--'

'" "

~
0
--'

I
--'
0

>

"I\.

-5

/

5

'\

>

1.5

0

>...

~

2.0

'"
J:

--'

"'"
:l

'\

(5

>I

TERMINAL LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
0.6
/
VCC = 5 V
TA = 25°C
0.5

0.2

/

V

/

/

V

0.1

o

-10 -15 -20 -25 -30 -35 -40

o

IOH-High-Leve' Output Current-rnA

40
10
20
30
50
IOL -Low·Level Output Current-rnA

FIGURE 5

FIGURE 6

TERMINAL OUTPUT VOLTAGE
vs
BUS INPUT VOLTAGE
4.0
VCC = 5 V
No load
TA = 25°C

3.5

>I

3.0

:l

2.5

"'"

~...

2.0

:::J

S:::J

0
I
0

>

VT_

VT+

1.5
1.0
0.5

o
o

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VI-Input Voltage-V
FIGURE 7

TEXAS •

INSTRUMENTS
2-282

/

POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

60

SN55ALS161
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER

TYPICAL CHARACTERISTICS
BUS HIGH·LEVEL OUTPUT VOLTAGE
vs
HIGH·LEVEL OUTPUT CURRENT

BUS·LOW LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT

4

>I

.
'"

:l
"0

0.6
Vcc = 5 V
TA = 25°C

3~

>
...

e-"
0"
a;

2

>I

..

"0

>
...

"\

..
>

..J

..

>
..J

~

i:

.2'
J:

0

>

o
o

0.3

>

0.1

o

~'" 'C'c; - 5' V~~~ ~)~~
~~'-;~""~~~
T A = 25°C~?Si
~~'<:
« ~::>~ .~
«
~~~
~
..
E
0
.L
V
"~ -1 ~ ~~ ~
:;

:l
"0

~,

2

--

.

u

"

0
I
0

" -3 ~

..,:;

g

>

-4
-5
-6

1.0

1.1 1.2 1.3 1.4 1.5
VI-Input Voltage-V

1.6

1.7

"

-2 ~

CD
I

0.9

I

~r

'S -0l

-

2

3

o

I

,

"'-.",'

VCC= 5 V
No load
TA=25,oC

e-"

i

BUS CURRENT
vs
BUS VOLTAGE

4

>...

I

FIGURE 9

BUS OUTPUT VOLTAGE
vs
TERMINAL INPUT VOLTAGE

..'"

I

..

--

10 20 30 40 50 60 70 80 90 100'
10L - Low· Level Output Current-mA

FIGURE 8

>I

Y

I

I

-btf
~r--+--~-

~

o

-10
-20
- 30
-40
-50 -60
10H-High-Level Output Current-mA

V

.

/

I

0

-

VV

0.2

..J

- - r"

-

/'

..J

"\

I

.

~f-'

0

"" ~

J:

0.4

e-"
0"
a;

"-

r--

-f]-

0.5

:l'"

I~

!

Vcc = 5 V
TA = 25°C

L

V

.

"

"Z~~

~;",~, ~~~
-',,'

~ ~\~ ,:~~~ ..

~~

~

.:, :'~>;

IV

~

~

<:: :~,,<::
.. ,

THE UNSHADED
"AREA CONFORMS TO
"PARAGRAPH 3.5.3 OF
~I!,EE ~IANDARD 488.197~

~

~

-7
-2

i"""'

-1

FIGURE 10

0
2
3
4
VI/O(bus)-Bus Voltage-V

5

:
6

FIGURE 11

.

TEXAS'"

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-283

2-284

SN55ALS192. SN75ALS192
QUADRUPLE DIFFERENTIAL LINE DRIVERS
D2904, JULY 1985-REVISED JUNE 1986

SN55ALS192 •.. J PACKAGE
SN75ALS192 ... D, J, OR N PACKAGE

•

Meets EIA Standard RS-422-A

•

High-Speed, Low-Power ALS Design

•

3-State TTL Compatible

•

Single 5-V Supply Operation

•

High Output Impedance in Power-Off
Condition

•

Complementary Output Enable Inputs

•

Improved Replacement for the AM26LS31

(TOP VIEWI

1A

VCC
4A
4Y
4Z
ENABLE G
3Z
3Y
3A

1Y

1Z
ENABLE G
2Z
2Y
2A
GND

description
These quadruple complementary-output line
drivers are designed for data transmission over
twisted-pair or parallel-wire transmission lines.
They meet the requirements of EIA Standard
RS-422-A and are compatible with 3-state TTL
circuits. Advanced Low-Power Schottky
technology provides high speed without the
usual power penalties. Standby supply current
is typically only 26 mA, while typical
propagation delay time is less than 10 ns.
High-impedance inputs maintain input currents
low, less than 1 p.A for a high level and less than
100 p.A for a low level. Complementary control
inputs, G and G, allow these devices to be
enabled at either a high input level or low input
level. The SN75ALS192 is capable of data rates
in excess of 20 megabits per second and is
designed to operate with the SN75ALS193
quadruple line receiver. The SN55ALS192 is also
capable of data rates in excess of 20 megabits
per second and designed to operate with the
SN55ALS193; however, it may be limited to a
lower bit rate based on the temperature.
Reference should be made to the Dissipation
Rating Table and Figure 15.

SN55ASL 192 ... FK PACKAGE
(TOP VIEWI
U
>-<1'

1 2019

8

The SN55ALS192 is characterized for operation
over the full military temperature range of
- 55°C to 125°C. The SN75ALS 192 is
characterized for operation from DoC to 70°C.

information current as of publicatioR date.
Products conform to specifications the tarms

2

Copyright © 1986, Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-285

SN55ALS192. SN75ALS192
QUADRUPLE DIFFERENTIAL LINE DRIVERS
logic diagram (positive logic)

logic symbol t
2:1
G

G 1:....;4"'-1..r_....

(4)

(i1121

EN

G

>-....--.

lA ;..;Il"-I_ _ _ _+--i
[>

IV

lA 111

lZ

2A

171

3A

191

2A :..:17.:...1_ _ _ _

+--1

2V
2Z

1141
4A

1151'

3A .:..:19,,-1~_ _ _+--I

3V
1111

1131

3Z
4V
4A 1151

4Z

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for 0, J, and N packages.

schematics of inputs and outputs

EQUIVALENT OF EACH

EQUIVALENT OF EACH

OATA (AI INPUT

ENABLE INPUT

EQUIVALENT OF EACH
OUTPUT
~~---,--'VCC

INPUT~~"'"

I NPUT-
TA - 12Soe
I 3.5

sy-

Vee- 4 .5 V - .

.,
'"o

~::J

2.5

,/TA - 25°e
·1

2.5

S 2.0

0

o

>

>

b 1.5

"lII

b1.5

1.0

o

0.5

1.0

2.0

1.5

3.5

o

3.0

o

0.5

2.0

2.S

FIGURE 4

Y OUTPUT VOLTAGE
vs
ENABLE G INPUT VOLTAGE

y OUTPUT VOLTAGE
vs
ENABLE G INPUT VOLTAGE

Vee - 5 V
4.S VI - 2 V
RL - 47011 to Ground
> 4.0
See Nfte 3
3.5
TA = 12~Oe
:!
3.0

Vee - 5 V

I

3.0

!
;g'"

Vee = 4.5 V

I
~

:! 2.5

~

':i 2.0

).

~ 2.5 -

;

a

9 1.5
1.0

2.0
I
~ 1.5

VI = 2V
RL = 470 n to Ground
See Note 3
TA = 25°C

0.5
o.S

1.0

1.5

2.0

2.5

TA = 25°C

1-

TA - 70°C

'"

1.0

)j

~

/

TA - ooe

/

TA - -5Soe

rt', tI'

O.S

3.0

o

o

VI-Enable G Input Voltage-V

0.5

1.0

1.5

2.0

2.5

3.0

VI-Enable G Input Voltage-V

FIGURE 5

NOTE 3: The A input is connected to

3.0

5.0

3.5

FIGURE 6

Vee

during the testing of the Y outputs and to ground during the testing of the Z outputs_

TEXAS . "
INSTRUMENTS
2-290

1.5

FIGURE 3

vee-r 5V

o

1.0

VI-Data Input VOltage-V

4.0

o

-55°e

1.0

VI-Data Input Voltage-V

o
>

VTA -

(l.S

0.5

>

I

:,...--TA - ooe

TA = 70°C

0.

2::J 2.0

o

""'lI

~ 3.0

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN55ALS192, SN75ALS192
QUADRUPLE DIFFERENTIAL LINE DRIVERS

TYPICAL CHARACTERISTICS
Z OUTPUT VOLTAGE

Z OUTPUT VOLTAGE

vs

vs

ENABLE G INPUT VOLTAGE

ENABLE G INPUT VOLTAGE

6

5

>I

..'"

1.1

Vee

~

5.5 V

RL~470ntoVee

vee

~

5.V

See Note 3
TA~25°e

Vee~

4.5 V

-

~

a-"

90"

Vcc = 5 V
RL = 470 n

5

to VCC
See NTe 4

>
I

CD

4

4

!9'"

:l
0

>

6

0

>

3

/

3

~

"
5

V 1..1'

0

I

2

2

0

o

o

0.5

1.0

1.5

2.0

2.5

o
o

3.0

1.0

0.5

HIGH-LEVEL OUTPUT VOLTAGE

4.0

>

3.5

5

a- 3.0

vs

FREE-AIR TEMPERATURE

OUTPUT CURRENT
See Note 3
TA ~ 25°C

1 4.5

--

..

~ 4.0

'\.
--. '\. \.\.~ .....
'\.
\.

g 3.5

-

~

a. 3.0

oq;"

q; 2.5

~

i,';

2.5

-t 2.0

...J

:f 1.5

5 1.0

:i 1.5
I
5 1.0

0.5

0.5

.<:

\.\.
'\.

2.0

~

I

>

o
-75 -50 -25

0

3.0

5.0

Vec = 5 V
IOH - -20 rnA
See Note 3

o"

>

2.5

HIGH·LEVEL OUTPUT VOLTAGE

vs

~

o

2.0

1.5

FIGURE 8

FIGURE 7

5.0

125°C
70°C
25°CooC
-55°C

V,-Enab'e G Input Voltage-V

V,-Enab'e G Input Voltage-V

~ 4.5

-

,t ~

>

>

.g>

~

V

Co

/ TA
TA
/TA
/TA
/TA

25

50

75

100 125

o

r...
.>
'\.

o

T A - Free-Air Ternperature- °e

Vce~5.5V_

I

.---Vec

I

~

I

-

5 V_-

1

1

' \ Vce~ 4.5 V -

''\J" ."'"'"'---i"-

"- ~

-100
-80
-20
-40
-60
'OH-High·Level Output Current-rnA

FIGURE 10

FIGURE 9

NOTES: 3. The A input is connected to Vee during the testing of the Y outputs and to ground during the testing of the Z outputs.
4. The A input is connected to ground during the testing of the Y outputs and to Vee during the testing of the Z outputs.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-291

SN55ALS192, SN75ALS192
QUADRUPLE DIFFERENTIAL LINE DRIVERS

TYPICAL CHARACTERISTICS
LOW·LEVEL OUTPUT VOLTAGE

LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
0.5

vs
OUTPUT CURRENT
1.0

Vee - 5 V
fOL - 20 rnA
See Note 4

>
I

CD

~ 0.4

~

1"
~

S 0.3
o
~

~ 0.2

~I
5 0 .1

Vec= 5 V.., --<
0.6

r-- r--

>

~ 0.4

.......

;:

.s

0.3

I

c5 0.2
>
0.1

o
-75 -50 -25
0
25
50 75
T A - Free-Air Ternperature- °e

::

SUPPLY CURRENT

vs

vs

SUPPLY VOLTAGE

SUPPLY VOLTAGE

E

1I:

50

~

U

>
ii

"I
U
::
(I)

A

~

I:::::~

10

3

4

5

6

7

8

20

/

15

/

10

o

V

I

- -f - -

/

V

/
o

/
2

3.

4

5

6

7

vee-Supply Voltage-V

VCC-Supply Voltage-V

FIGURE 14

FIGURE 13

NOTE 4: The A input is connected to ground during the testing of the Y outputs and to

TEXAS •
INSTRUMENTS
2-292

tt

I

5

~
2

Gro~nded

i

25

Q.

INPUTS OPEN

20

30

:;

INPUTS GROUNDED

40

o

A I nlputs tipen ~r
Outputs Disabled
No Load
TA = 25°C

35

«

30

10 20 30 40 50 60 70 80 90 100
fOL -Low-Level Output Current-rnA

SUPPLY CURRENT

60

o

1/

40

Q.

'1"u

V

FIGURE 12

Outputs Enabled
70 No Load
TA = 25°C

ii

~

~~

FIGURE 11

80

"~
u"
>

~

o
o

100 125

~?
~~
Vee=5.5V/'

005
Q;
•

>

«
E
1-

/

0.7

~

S.
"

I

Vee = 4.5 V

~ 0.8

---

:;

l- I

See Note 4
0.9 -TA=25°e

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

Vee during the. testing

of the Z outputs.

8

SN55ALS192. SN75ALS192
QUADRUPLE DIFFERENTIAL LINE DRIVERS

TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
FREQUENCY

60

50

0.
c.

'1"u

..... /

20

u

10

o
10 k

100 k

1M

10 M

100 M

f-Frequency-Hz

FIGURE 15

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-293

2-294

SN55ALS194, SN75ALS194
QUADRUPLE DIFFERENTIAL LINE DRIVERS
WITH 3·STATE OUTPUTS
02917. OCTOBER 1985-REVISEO OCTOBER 1988
SN55ALS194 .•. J PACKAGE
SN75ALS194 •.• D, J, OR N PACKAGE

•

Meets EIA Standard RS-422-A

•

High-Speed ALS Design

•

3-State TTL-Compatible

•

Single 5-V Supply Operation

•

High Output Impedance in Power-Off
Condition

(TOP VIEW)

•

Two Pairs of Drivers Independently Enabled

•

Designed as a Replacement for the MC3487
with Improvements: ICC 50% Lower.
Switching Speed 30% Faster. FullTemperature-Range Version

Vcc

lA
lY
lZ
l,2EN
2Z
2Y
2A
GNf)

4A
4Y
4Z
3,4EN
3Z
3Y
3A

SN55ALS194 ... FK PACKAGE
(TOP VIEW)

U
>«UU«

description

~~Z>'--~

INPUT-4>--.-l

OUTPUT

TEXAS

~

INSTRUMENTS
2-296

POST OFFICE BOX 655303 • DALLAS, TEXAS 75266

SN55ALS194, SN75ALS194
QUADRUPLE DIFFERENTIAL LINE DRIVERS
WITH 3-STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage, VI ........................................' ....... _ . . . . . . . . .. 5.5 V
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN55ALS194 ...................... -55°C to 125°C
SN75ALS194 .......................... ooC to 70°C
Storage temperature range ......................................... - 65°C to 1 50°C
Case temperature for 60 seconds: FK package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package ........ 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............ 300°C
NOTE 1; All voltage values are with respect to network ground terminal.

DISSIPATION RATING TABLE
TA :5 25 C
POWER RATING
D

PACKAGE

DERATING FACTOR

TA - 70 D C
POWER RATING

ABOVE TA - 25 D C
7.6 mW/oC

TA - 125 D C
POWER RATING

D

950 mW

608 mW

N/A

FK

1375 mW

11.0·mW/oC

880 mW

275 mW

J (SN55ALS194)
J (SN75ALS 194)

1375 mW

11.0 mW/oC
8.2 mW/oC

880 mW
656 mW

275 mW

1025 mW

N

1150 mW

9.2 mW/oC

736 mW

N/A

N/A

recommended operating conditions
SN55ALS194
MIN
Supply voltage, VCC
High-level input voltage, VIH

MAX

MIN

NOM

MAX

5

5.5

4.75

5

5.25

4.5

I All inputs, TA = 25°C
I A inputs, T A = Full range
I EN inputs, T A = Full range

2

2

2

2

2.1

2

Low-level input voltage, VIL

Operating free-air temperature, T A

UNIT
V
V

0.8

0.8

V

-20

-20

mA

I TA = 25°C

48

48

I TA = Full

20

High-level output current, IOH
Low-level output current, IOL

SN75ALS194

NOM

range
-55

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

125

48
0

70

mA
°C

2-297

SN55ALS194. SN75ALS194
QUADRUPLE DIFFERENTIAL LINE DRIVERS
WITH 3·STATE OUTPUTS
electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
range (unless otherwise noted)
PARAMETER

TEST CONDITIONS

Input clamp voltage

VIK

MIN

II = -18 mA
SN55ALS194

Vee = MIN.
Vee = MIN.

I
I SN75ALS194

Typt

MAX

UNIT

-1.5

V

2A

VOH

High-level output voltage

VOL
va

Low-level output voltage
Output voltage

10 = 0

0

6

V

I V OD11

Differential output voltage

10 = 0

2

6

.V

I V OD21

Differential output voltage

IOH = -20 mA
Vee - MIN.

V

2.5
0.5

10L - MAX

% VOD1
2

V

Change in magnitude of
alVODI

differential output voltage t

Voe

Common-mode output voltage

RL = 100 II.

See Figure 1

Change in magnitude of

±0.4

V

±3

V

±0.4

V

100
-100

~A

alVoel

common-mode output voltage t

10

Output current with power off

Vee = 0

Va = 6 V
Va = -0.25 V
Vo = 2.7 V

100

High-impedance state output current

Vee = MAX.
Output enables
at 0.8 V

Vo = 0.5 V

-100

10Z

V

~

II

Input current at maximum input voltage

Vee = MAX.

VI = 5.5 V

100

~

IIH

High-level input current

VI = 2.7 V

50

~A

IlL

Low-level input current

V:ee = MAX.
Vee - MAX.

VI - 0.5 V

-200

~A

lOS

Short-circuit output current 9
Supply current (all drivers)

Vee = MAX.

VI = 2 V
All outputs disabled

-140

mA

45

mA

ICC

Vee = MAX.

-40
26

t All typical values are at Vee = 5 V. T A = 25 DC.
taivODI and alVoel are the changes in magnitude of VOD and Voe. respectively. that occur when the input is changed from a high

level to a low level.
§ Not more than one output should be shorted at a time. and duration of the short-circuit should not exceed one second.

switching characteristics. Vee = 5 V. TA - 25°e
TEST

PARAMETER

CONDITIONS

tpLH Propagation delay time. low-to-high-Ievel output
tpHL Propagation delay time. high-to-Iow-Ievel output
Output-to-output skew
lTD

Differential-output transition time

tpZH Output enable time to high level
tPZL Output enable time to low level
tpHZ Output disable time from high level
tpLZ Output disable time from low level

TYP

See Figure 2

MAX

MIN

TYP

MAX

UNIT

6

13

6

13

ns

9

14

9

14

ns

3.5

6

3.5

6

ns

8

14

B

14

ns

9
12

12

9

12

ns

20

12

20

ns

9

15

9

14

ns

12

15

12

15

ns

eL = 15 pF.

eL=15pF.
See Figure 3
eL=15pF.
See Figure 4

-If

TEXAS
INSTRUMENTS
2-298

SN75ALS194

SN55ALS194
MIN

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55ALS194, SN15ALS194
QUADRUPLE DIFFERENTIAL LINE DRIVERS
WITH ]-STATE OUTPUTS
SYMBOL EQUIVALENTS
DATA SHEET PARAMETER

RS-422-A

Va

Voa. Vob

VO

I V ODll
I V OD21

Vt IRL

AIVODI

=

I IVtl -

100

m

Voc

*

IVtl I

Voc

IVosl

AlYocl

I Vos - Vos I

lOS

Iisal. Ilsbl

10

Ilxal. Ilxbl

FIGURE 1. DRIVER VOD AND VOC

PARAMETER MEASUREMENT INFORMATION

INPUT~l.SV
5V

V OUTPUT

I.'PLH --I
I
..
1

GENERATOR
ISee Not. Al

I
I

ISee No'e Cl

1.SV'i-------::

I.

y,.SV

I

I
I

Skew-i-1

Z OUTPUT

tPHL

- -

1.SV~

:

I

j.-tPHL""

-=

.1

r---!I-~~ -

I

'----VOL

Skew-i-l

....

'PlH~
VOH
1.sr

\l.SV

-

TEST CI RCUIT

VOH

-

-VOL

VOLTAGE WAVEFORM

FIGURE 2. PROPAGATION DELAY TIMES
INPUT

r-\---3V

~
GENERATOR
(Se.
Al

Not.

son
3V

OUTPUT
IL. _ _ _ _ _ ..I

CL = 15 pF
(See Note Bl

L-ov

tTO ...........
I I
OUTPUT

TEST CIRCUIT

-

J":\L
I

90%

I

I

'TO

I

I

10%

VOLTAGE WAVEFORMS

FIGURE 3. DIFFERENTIAL-OUTPUT TRANSITION TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: tr '" 5 ns. tf '" 5 ns. PRR '" 1 MHz. duty
cycle '" 50%. Zo = 50 0.
B. CL includes probe and stray capacitance.
C. All diodes are 1N916 or lN3064.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-299

SN55ALS194. SN75ALS194
QUADRUPLE DIFFERENTIAL LINE DRIVERS
WITH 3-STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION

J
SV

OUTPUT

"o_~"'-illt-.....<:rS'

Oor 3V

, kn
GENERATOR
ISee Note A)

-:-:'\---- 3 V
loS V
,\...- - - 0 V
tpHZ .... ~
V
V
OH

OUTPUT
ENABLE
INPUT

1\

R.s

OUTPUT
S, CLOSEO
I
S2 CLOSED:
OUTPUT

ISee Note C)

son

TEST CIRCUIT
OUTPUT
ENABLE
INPUT

200 .11

-''''---~

.. , S V

tpLZ~ ~

~1

S, CLOSED'
S2CLOSED ~~J~

..

,:S v

VOL

y.'.S V

0 V
tpZL

=tl /4-

~

OUTPUT
S, CLOSED
S2 OPEN
OUTPUT
S, OPEN
S2 CLOSED

3V

I

:
I

loS V

VOL

tPZ~H~:-- VOH
'.S. V

VOLTAGE WAVEFORMS

NOTES: A. The input pulse is supplied by a generator having the following characteristics: tr S 5 ns. tf S 5 ns. PAA S 1 MHz, duty
cycle S 50%, Zo .. 50 Il.
B. CL includes probe and stray capacitance.
C. All diodes are 1 N916 or 1 N3064.

FIGURE 4. DRIVER ENABLE AND DISABLE TIMES

TEXAS •
INSTRUMENTS
2-300

POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

SN55ALS194, SN75ALS194
QUADRUPLE DIFFERENTIAL LINE DRIVERS
WITH 3-STATE OUTPUTS
TYPICAL CHARACTERISTICS t
Y OUTPUT VOLTAGE

y OUTPUT VOLTAGE

vs

vs

DATA INPUT VOLTAGE

DATA INPUT VOLTAGE
5.0
Vee - 5 V
4.5 Outputs Enabled
No Load
4.0
TA - 125°C
>
~ 3.5

5.0

No Load
4.5 r-Outputs Enabled
TA - 25°e
4.0

Vee

5.5 V -

3.5

Vee

5V-

'" 3.0
:!
"0

Vee

4.5V-

>I

.

>
~

'"
S'"

0
I
0

>

i

I

"'-

'"o

~ 3.0

>

2.5

;

"

2.5

0.

2.0

~ 2.0

1.5

61.5
>

.-

1.0

VTA -

a

0.5

1.0

1.5

FIGURE

2.0

3.5

o

3.0

o

0.5

2.5

3.0

Y OUTPUT VOLTAGE
vs

ENABLE G INPUT VOLTAGE

ENABLE G INPUT VOLTAGE
5.0

Vee = 5.5 V

I

Vee -

i

V

>

3.0

8.

Vee - 5 V
4.5 VI - 2 V
RL - 470 !l to Ground
4.0
See Nite 2

I 3.5

Vee- 4.5 V

I

"

0>

:! 2.5
"0

TA - 125°C
'-.

~ 3.0
o

~:::J

2.0

S-

....

TA - 25°C

2.5

V

0.

~ 2.0

9'" 1.5
VI - 2 V
~
RL - 470 {l to GROUND.
See Note 2
TA - 25°C

1.0
0.5

a

2.0

vs

3.5

o
>

1.5

FIGURE 6

5

4.0

;

1.0

VI-Data Input Voltage-V

Y OUTPUT VOLTAGE

>

-55°C

·0.5

VI-Data Input Voltage-V

>

~

25°C
I

VTA - ooe

1.0

0.5

a

V.TA'1 -

TA - 70°C

a

I

0.5

1.0

1.5

2.0

2.5'

3.0

61.5

>

TA - 70°C
"-

">

1.0

V

I
TA -

-55°C

V

0.5

o
o

TA .Iooe_

V

0.5

1.0

1.5

2.0

2.5

3.0

VI-Enable G Input Voltage-V

V,-Enable G Input Voltage-V
FIGURE 7

FIGURE 8

tOata for temperatures below DOC and above 7D oC are applicable to SN55ALS194 circuits only.
NOTE 2: The A input is connected to

Vee

during the testing of the Y outputs and to ground during the testing' of the Z outputs.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-301

SN55ALS194, SN75ALS194
QUADRUPLE DIFFERENTIAL LINE DRIVERS
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICSt
Z OUTPUT VOLTAGE
vs
ENABLE G INPUT VOLTAGE
6
Vcc = 5.5 V
Vcc = 5 V

5

VCC=4.5V

>I

.,
l!'"

Rl - 1470 11
See Note 2
TA - 25°C

Z OUTPUT VOLTAGE
vs
ENABLE G INPUT VOLTAGE
6

io Vec

Vee - 5 V
Rl - 470 n
to Vee
See Note 3

5

>

..
I

4

I

4

'"
"0

/

:l

"0

>
::l

5
0

~

::l

5
0

2

i
0

I
0

>

o

0.5

1.0

1.5

2.0

2.5

V
o
o

3.0

I

!l, 4.0
:l

I

-55°C

J
3.0

HIGH·LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT
5.0

Vee = 5 V
IOH - -20 mA
See Note 2

See Note 2
TA - 25°e

1 4.5
,

~ 3.5

i

I

L!A -

FIGURE 10

HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

4.5

TA - ooe

1.5
2.5
0.5
1.0
2.0
VI-Enable G Input Voltage-V

FIGURE 9

5.0

V TA - 70°C
V /1fA - 2~Oe
.
V/

VI-Enable G Input Voltage-V

>

V

/

2

>

o

I

r

> 3

3

~

TA - 125°e-

--

.!l, 40

l!

.

~

3.5

e
~

3.0

=
a;

3.0

::l

02.5

oQj

....~

1:.

>

j

2.0

~ 1.5

25
•
2.0

~ 1.0

o
> 0.5

>

o

Vee=5.5V._ -

'\. "\.

.--Vee = 5 V_ -

I

~

I

" ~ (\1lvc~

I

=

d.5 V -

'\. '\ ."\

'\ ."\I"\.

0.5

o

-75 -50 -25 0
25 50
75 100 125
TA-Free-Air Temperature- °e

'\. '\.
'\

:E 1.5
I
6 1.0

:I:

'\.

o

"\I"\. I"\.

-100
-80
-20
-40
-60
IOH-High-level Output Current-mA

FIGURE 11

FIGURE 12

toata for temperatures below o·e and above 70·e are applicable to the SN55ALS194 circuits only.
NOTES: 2. The A input is connected to Vee during the testing of the Y outputs and to ground during the testing of the Z outputs.
3. The A input is connected to ground during the testing of the Y outputs and to Vee during the testing of the Z outputs.

..tf

TEXAS
INSTRUMENTS
2-302

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55AlS194, SN75AlS194
QUADRUPLE DiFFERENTIAL LINE DRIVERS
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS t
LOW·LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
0.5

>
I

1°·4
1°·3

1.0

Vee - 5 V
IOL - 20 rnA
See Note 3

=t

.

~ 0.8

:g

--- -

-----

>

e.
oa;

r-- r-.

r-- r--

...

~0.2

>

~

.3

~0.1

c5
>

-75 -50 -25
25 50
75 100 125
TA-Free-Air Ternperature- °e

50

~

!:?

:I

~

~

P'"

4

5

~

~

'"c.JI

--

!:?

3

15

_.

/

6

7

8

/

V

1/

I

10

o

/

//

20

/

5

~
2

--

25

0-

INPUTS OPEN

o

30

Q.

20

o

c.J

>

10

~r Gro~nded

:;

INPUTS GROUNDED

40
30

I~puts

A
6pen
Outputs Disabled
No Load
TA; 25°C

35

«
E
.!.c

0-

10 20 30 40 50 60 70 80 90 100
IOL -Low· Level Output Current-rnA

SUPPLY CURRENT
vs
SUPPLY VOLTAGE

:;
:I

1/

40

Q.

k::::: ~
Vee;5.5V-

SUPPLY CURRENT
vs
SUPPLY VOLTAGE

60

V

V

FIGURE 14

Outputs Enabled
70 No Load
TA;25°e

'1c.J

0.1

~~

~~

FIGURE 13

80

>

0.2

o
o

°

°

c.J

r--

0.3

I

o
>

~

l/, ?

05
.

1;

J

I
/

Vee; 5 V"1 ----i IJ

0.6

~ 0.4

.......

I

x-t

.--

0.7

~

0;,

«
E
.!.c

See Note 3 I
f--TA c 25°C - - f Vec; 4.5 V
--- --

0.9

o

/

vee-Supply Voltage-V

2

3

4

5

6

8

7

vee-Supply Voltage-V

FIGURE 15

FIGURE 16

t Data for temperatures below ooe and above 70°C are applicable to the SN55ALS194 circuits only.
NOTE 3: The A input is connected to ground during the testing of the Y outputs and to Vee during the testing of the Z outputs.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-303

SN55ALS194,SN75ALS194
QUADRUPLE DIFFERENTIAl' LINE DRIVERS
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs

FREQUENCY

60

50

_+__3 1y

1
1B---{]/

2B

13 4Y

4B
12
3.4EN----I

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the J package.

10
3A--'----t

11 3y

9

3B---{]/
14
4A----I
4B 15

FUNCTION TABLE lEACH RECEIVER)
DIFFERENTIAL INPUTS
A-B
VID ;" 0.2 V
-0.2 V
V,D

<
:$

V,D < 0.2 V
-0.2 V
X

ENABLE
H
H
H
L

OUTPUT

Y
H
7
L
Z

H ;. high level. L = loW level. X = irrelevant.
7 = indeterminate. and Z = high impedance loff)

TEXAS ~

INSTRUMENTS
2-306

POST OFFICE BOX 665303 • DALLAS. TEXAS 75266

13 4y

SN55ALS195, SN75ALS195
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
WITH 3·STATE OUTPUTS
schematics of inputs and outputs
EQUIVALENT OF EACH A OR B INPUT

EQUIVALENT OF G OR

G INPUTS

VCC---~""-"'"

VCC - - - - - . , - - -. .-

TYPICAL OF ALL OUTPUTS
- - - - - - . - VCC
50 n
NOM

3 kn
NOM

1B kn
NOM
INPUT ~""o/V'w

...""-I

OUTPUT
INPUT

300 kn
NOM

Vcc

GND - ' - -. .- -. .- - -

(A)

or
GND (B)
-------e~~._-GND
GND------4~. .- -__- -

absolute maximum ratings over operating free-air temperature range (unless otherwise noted) t
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage, A or B inputs, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 15 V
Differential input voltage (see Note 2) ......................................... ± 15 V
Enable input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Low-level output current ................................................... 50 mA
Continuous total dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN55ALS195 ....................... -55°C to 125°C
SN75ALS195 . . . . . . . . . . . . . . . . . . . . . . . . OOCto 70°C
Storage temperature range ......................................... - 65°C to 150°C
Case temperature for 60 seconds: FK package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package.. . .. . .... .. 300°C
tStresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditons'l
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. Differential-input voltage is measured at the non inverting input with respect to the corresponding inverting input.
DISSIPATION RATING TABLE
DERATING FACTOR

PACKAGE

TA'" 25°C
POWER RATING

FK

1375 mW

ABOVE TA - 25°C
11.0 mW/oC

TA - 70°C
POWER RATING

TA - 125°C
POWER RATING

880mW

275 mW

J (SN55ALS195)
J (SN75ALS195)

1375 mW

11.0 mW/oC

880 mW

275 mW

1025 mW

8.2 mW/oC

656 mW

N/A

TEXAS ."

INSTRUMENlS
POST OFFICE BOX 66&303 • DALLAS, TEXAS 75265

2-307

SN55ALS195, SN75ALS195
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
WITH 3-STATE OUTPUTS
recommended operating conditions
SN55ALS195
Supply voltage, VCC

SN75ALS195

MIN

NOM

MAX

MIN

NOM

MAX

UNIT

4.5

5

5.5

4.75

5

5.25

V

±7

±7

V

±12

±12

V

Common-mode input voltage, VIC
Differential input voltage, VIO
High-level input voltage, VIH

2

Low-level input voltage, VIL
High-level output current, 10H

2

V

0.8

0.8

-400

-400

16

Low-level output current. 10L
Operating free-air temperature, T A

-55

125

0

V

16

~
rnA

70

°C

electrical characteristics over recommended ranges of common-mode input voltage, supply voltage,
and operating free-air temperature (unless otherwise noted)
TEST CONOITIONSt

PARAMETER
VT+

Positive-going threshold voltage

VT-

Negative-going threshold voltage

Vhvs
VIK

Hysteresis'
Enable-input clamp voltage

VOH

High-level output voltage

VO,L

Low-level output voltage

10Z

High-impedance state output current

II = -18mA

Vce MIN,

VID = 200 mV,

10H = -400

~A,

See Figure 1

See Figure 1

10L = 16 rnA

0.5

Vee = MAX,
VIO=-3V,

VIL = 0.8 V,
Vo = 2.7 V

20

Vee = MAX,

VIL = 0.8 V,

VIO = 3 V,
Other input at 0 V,

Vo = 0.5 V

See Note 3

Vee - MAX, VI -

IlL

Low-level enable-input current

Vee = MAX,

0.45
V

~A

-20

Vee = MIN, VI = 15 V
-15 \i

0.7

1.2

-1.0

-1.7
20

VIH = 2.7 V

100

VIH = 5.25 V
VIL = 0.4 V

Input resistance

Vee = MAX,

V
V

10L = 8 rnA

Vee = MAX

Supply current

3.6

Vee = MIN
VID = -200 mV,

High-level enable-input current

mV

mV
-1.5

2.5

UNIT
mV

120
VCC = MIN,

IIH

ICC

MAX

-200§

Line input current

Short-circuit output current

TYP*

200

II

lOS

MIN

Vo = 0,

VIO = 3 V,
See Note 4

Vee = MAX,

Outputs disabled

rnA
~

-100

~A

kO

12

18

-15

-78

-130

rnA

22

35

rnA

tFor conditions shown as MIN or MAX, use the appropriate values specified under recommended operating conditions .
. *AII typical values are at Vee = 5 V, TA = 25°C.
§The algebraic convention, in which the less positive limit is designated minimum, is used in this data sheet for threshold voltage levels only.
, HysWresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going input threshold voltage, VT _.
NOTES: 3. Refer to EIA Standard RS-422-A and RS-423-A for exact conditions.
4. Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.

TEXAS •

2-308

INSfRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN55ALS195, SN75ALS195
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
WITH 3·STATE OUTPUTS
switching characteristics, Vee - 5 V, TA
PARAMETER

TEST CONOITIONS

tpLH

Propagation delay time, low- to high-level output

VIC - 0 V to 3 V,

tpHL

Propagation delay time, high- to low-level output

See Figure 2

tpZH

Output enable time to high level

tpZL

Output enable time to low level

tpHZ

Output disable time from high level

tpLZ

Output disable time from low level

MIN

CL = 15 pF,

See Figure 3

CL = 15 pF,

See Figure 3

CL = 15pF,

TYP

MAX

15

22

15

22

13

25

10

25

19

25

17

22

UNIT
ns
ns
ns
ns

PARAMETER MEASUREMENT INFORMATION

I IOH
.. I-I
2V---...J

FIGURE 1. VOH. VOL

~
I .
I

--3V

INPUT

GENERATOR
Isee Note Al

50

n

1.5 V

1.5 V.

riOV
~ tpLH

j4-

I
I

1.5 V

--.I tpHL j4-

-1-

-VOH

I

OUTPUT
2 V---------....I

TEST CIRCUIT
NOTES:

VOLTAGE WAVEFORMS

A. The input pulse is supplied by a generator having the following characteristics: PRR !5 1 MHz, duty cycle :5 50%, Zout ==
50 n.tr .$; 6 ns, tf .::5 6 ns.
B. CL includes probe and jig capacitance.

FIGURE 2. PROPAGATION DELAY TIMES

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 76285

2-309

SN55ALS195, SN75ALS195
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
WITH 3·STATE OUTPUTS
.PARAMETER MEASUREMENT INFORMATION
SWl
+2.5 V

OUTPUT
SW2

-2.5V--o

2 k!l

0-5 V

(see Note CI

Cl - 15 pF
~ (see Note BI

GENERATOR
(see Note Al

51 !l

TEST CIRCUIT

tpZl
tpZH

INPUT

~
I -

3V

SWl to 2.5 V
-1.5 V SW2 open

. + __ 0 V

tPZH~

OUTPUT

tPZl--..,

~

INPUT

~
I

tPHZ~

OUTPUT

SWl to -2.5 V
SW2 closed
SW3 open

~

Ll.5V
VOL

tplZ
SWl to 2.5 V
SW2 closed
SW3 closed

--OV

14-I

f
__
~
0.5 V_ _

OUTPUT

3V

1.5 V

I

14--

-OV

tPHZ

V

.~--4.5V

VOH

-1.5 V

-'- -

__ 1'5V

I
-1-0
I

SW3 closed

j4I
-

IN:U:~

I

3V~!~ltO_2'5V
I 1.5 V

INPUT

I

I
tpLZ -+I

SW2 closed

_

0 V

SW3 closed

l+I

VOH

~--1.4V

OUTPUT ~0.5 V

L

VOL

-1.4V

VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR " 1 MHz. duty cycle" 50%, Zout
50 (l,tr " 6·ns, tf " 6 ns.
B. CL includes probe and jig capacitance.
C. A'II diodes are 1 N3064 or equivalent .

. FIGURE 3. ENABLE AND DISABLE T!MES

TEXAS ."

2-310

INSlRUMENTS
POST OFFICE BOX 65.5303 • DALLAS, TEXAS 76266

=

SN55ALS195, SN75ALS195
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICSt
OUTPUT VOLTAGE

OUTPUT VOLTAGE

vs

vs

ENABLE VOLTAGE

ENABLE VOLTAGE

5

>

4

.'"

4
VIO - 200 mV
VIC - 0
RL - 8 kll to GNO
TA - 25°C

TA - 125°C
TA - 70°C
TA - ,25 O C-

VCC - 5.5 V

> 3

VCC - 5 V

1

~~

'"
S-

2

a

2

1

o

VCC - 5 V
VIO - 200 mV
VIC - 0
RL - 8 kll to GNO

> 1

0.5

1.5

2
Enable Voltage-V

2.5

o
o

3

I
0.5

FIGURE 4

6
5

vs

ENABLE VOLTAGE

ENABLE VOLTAGE

VIO I. _ 20h mV

VCC - 5 V

VIC - 0
RL - 1 kll to VCC
TA - 25°C

f4

5

+- TA

- -55°C
/"" TA - ooC
~ /"" TA - 25°C........ /"" TA - 70°C

>
1
&4

!

3

~3
:::J

5

o
12
o
>

2

0.5

1.5

2

2.5

3

o
o

~

........
....... TA - r50C
if' ........
........
VCC - 5 V
VIO - - 200 mV
VIC - 0
RL - 1 kll to VCC

0.5

Enable Voltage-V

1.5

2

2.5

3

Enable Voltage-V

FIGURE 6

toata for temperatures below

3

6

VCC - 5.5 V

1

o
1
o
>

I
2.5

OUTPUT VOLTAGE

vs

VCC - 4.5 V

>

2
Enable Voltage-V
1.5

FIGURE 5

OUTPUT VOLTAGE

S0S

-55°C

8,
J!

VCC - 4.5 V

>
S0-

>

TA -

1

~ 3
o

S
o
1
o
>

- ...

TA - ooC

FIGURE 7

ooe and above 70 oe,

and below 4.75 Y and above 5.25 Y, are applicable to SN55ALS196 circuits ~nly.

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 75285

2-311

SN55ALS19i SN75ALS195'
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
WITH 3-STATE OUTPUTS
TYPICAL CHARACTERISTICSt
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
'I

HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
,4

VCC _ 5 V
VIC -

10H 1= 0

>

- 12 V to 12 V

.,I
l!!'"
'0

10 - 0
TA = 25°C

~

3

V

>
S

~

0
Gi
>
III

VT-

~

....d::::

f"

I
.I
-400,.A

1

10H -

2

....

VT+

1:
:f

'"

I
::t:
0

VCC - 5 V
-VID = 200 mV
VIC = 0

>

o
-200

-100

o

o

200

100

-75 -50 -25 0
25 50 75 100 125
TA -Free-Air Temperature- °C

VID-Differentiallnput Voltage-mV

FIGURE 8

FIGURE 9
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT

HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5

5
VID - 200 mV
VIC = 0
TA = 25°C

. . . i'-.........
. . . i'-- .........
.........

'"

I I I
rV~c
/.

~
''"-""~
~ '\

15.Jv

I-- VCC - 5 V •

rVcc - 4.5 V

"- '\ ,,\
'\ ,,\
\.

'\ ,'\. I\.

>
I

i!l,

4

~

~ 3.5

S

&

3

"

02.5
Gi

~

2

~

1.5

~

1

::t:

-~-

....

~~
TA = 70°C , )

~

TA '= 125°C ' \

o

I I
-55°C
TA = ooC
TA

= 25°C

~,...

~~

\' ~ ~

o
> 0.5

-40,
-60
-80
-100
-20
10H-High-Level Output Current-mA

VCC = 5 V
VID - 200 mV
VIC = 0

4.5

o

~\ ~

-20

-40

-60

-80

-100'

10H-High-Level Output Current-mA

FIGURE 10

FIGURE 11

tDat~ for temperatures below COC and above 7CoC, and below 4.75 V and above 5.25 V, are applicable to SN55ALS195 circuits only.

TEXAS . "

2-312

INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS, TEXAS 76265

SN55ALS195, SN75ALS195
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICSt
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
0.40

VCC = 5 V
VIO - -200 mV
VIC - 0

> 0.35
I

f!" 0.30

'"

"0

>
;

0.25

r-.... '"'-

Co

~

0.20

>

!l

10 = SmA

... ......

a;

0.15

10=~ r--.....

~

oS 0.10

--- r--

I

~

0.05

t--

o
-75 -50 -25 0

25

50

75

100125

TA-Free-Air Temperature-·C

FIGURE 12
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
O.S

JVCC -I

"'"
0

>
;

0,5

Co

;

o

a;
>

.3

"I~

IA ~

0.3

0.2

-'

~

~

0.4

,I

-'

4.5 V-....
> 0.7 "---VCC - 5 V--....
I
Vec - 5.5 v-....
~ 0.6

J

>

tl J II
II:~

I

>
;

~

0.4

1---4-\-+~~~~~--I----I--I

0.3

~---+---7~p;,4----4.-----+-+--I--I

a;
>

!l

-~~

I

VIO = -200 mV
VIC - 0
TA - 25°C
20

~---+--I--.p,...+l-+'M--+-"'(">"-I--I

~
oS 0.2~~~+-+----1-~--+---1---I

[7
10

0.5

Co

~~

o

0.7

" 0.6 1---1-~-.l----1-1-I-H~-hL--I---I
E
o

~

0.1

o

LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT

30

40

50

60

70

~ 0.1~-4-+-+----1-~-+--1-OL--J_~_~~_~_~_L-~

SO

10L -Low-Level Output Current-mA

o

10

FIGURE 13

tOata for temperatures below

20

30, 40

50

60 70

SO

IOL -Low-Level Output Current-mA

FIGURE 14

ooe and above 70°C, and below 4.75 V and above 5.25 V, are applicable to SN55ALS195 circuits only.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS, TEXAS 75265

2-313

SN55ALS195, SN75ALS195
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS t
SUPPLY CURRENT
vs
SUPPLY VOLTAGE

c(

SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE

50
VIO ~ -200 mV
45 VIC = 0
10 = 0
40 TA - 25 DC

30

;.

1

~

//

35

c

! 30

:;

DISABLED

U 25
?Q,
go 20

,I

1.c

/

~ 15

/

u

- 10

Vee = 5 V

"6.
c.

"I. 10

if

III

u

};

'1

VIO = -200 mV
Outputs Enabled

5

/"

00

Vce - 4.5 V

~

./'

5

I

-

20

c;." 15

f'ENABLEO

III

ve~ ~.5 J

25

10 - 0

o

2
4
5
6
3
VCC-Supply Voltage-V

7

-75 -50 -25 0

8

SUPPLY CURRENT
vs
FREOUENCY

1.c

40

I=i

~

35

VCC
5.5 V
I
I
VCC - 5 V

~ 30

VCC - 4.5 V

~

I

20

~

" 15

25

'1"U 10

Jl

/

:,--

15

I

~

10 - 0
Outputs Enabled

VIC - 0
TA - 25 DC

-200

10

5

o
100
-100
VID-Oifferentiallnput Voltage-mV

200

o

10 k

FIQURE 17

to ata for temperatures

1M
10 M
f- Frequency- Hz

100 k

100 M

FIGURE 18

below O°C and above 70 o e, and below 4.75 V and above 5.25 V, are applicable to SN55ALS195 circuits only.

TEXAS •

2-314

II

"6.
c.

Q,

o

I I

c;. 20

?Q,

5

111111

VCC ':'''5 V
VI = ± 1.5 V Square Wave
CL = 15 pF
Four Channels Driven
TA = 25 DC

:;

U

};

75 100 125

FIGURE 16

SUPPLY CURRENT
vs
DIFFERENTIAL INPUT VOLTAGE

25

50

TA-Free:Air Temperature- DC

FIGURE 15

30

25

INSTRUMENTS
POST OFFICE BOX 655303 • OALLAS. TEXAS 76265

SN55ALS195, SN75ALS195
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICSt
INPUT RESISTANCE
vs
FREE-AIR TEMPERATURE
30

3

25

2

TA 1=

c:

'"~
"

---

20

C

IV

1ii

.~

INPUT CURRENT
vs
INPUT VOLTAGE

15

II:

V

./

25~e

"'E
I

.-'

E
2?

8

0

~

::J
C.

S

V

c

£10

1- 1

5

-2

o

-3

I

-75 -50 -25 0
25 50 75 100 125
TA-Free-Air Temperature- °e

~

....-

........ ~

V

-20 -15 -10 -5
0
5
10
15
VI-Input Voltage to GNO-V

FIGURE 19

20

FIGURE 20

SWITCHING CHARACTERISTICS
vs
FREE-AIR TEMPERATURE

PHOPAGATION DELAY TIME
vs
SUPPLY VOLTAGE
20

.
c

.,I

!

>-

18
16

12

c

10

o

: - - 1---

14

~

c

eL = 15 pF
TA = 25°e

tP~L_
tpLH-

.~

'"
:g,

e

Q.

I

5 ~-+--+--+--+--+--1-~--~

'0
~c.

8

6

4
2

o

~-L

__~-L~~~__~~__~

-75-50-250
25 50 75 100125
TA-Free-Air Temperature- °e

o

4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5
Vee-Supply Voltage-V

FIGURE 21

FIGURE 22

tOata for temperatures below OOC and above 70°C, and below 4.75 V and above 5.25 V, are applicable to SN55ALS195 circuits only.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-315

2-316

SN65076B, SN75076B
DIFFERENTIAL BUS TRANSCEIVERS
D3407, JANUARY 1990

•

Bidirectional Transceiver

•

Designed for Multipoint Transmission in
Noisy Environments Such as Automotive
Applications

•

Individual Driver and Receiver Enables

•

Wide Positive and Negative Input/Output
Bus Voltage Ranges
Driver Output Capability ...

± 10 mA

Thermal Shutdown Protection

•

Driver Positive and Negative Current
Limiting

•

Receiver Input Impedance . . . 12 kg Min

•

Receiver Input Sensitivity ... ± 200 mV

•

Receiver Input Hysteresis ... 50 mV Typ

•

Operates from Single 5-V Supply

2
3
4

Vee

7
6
5

A
B
GND

FUNCTION TABLE
(DRIVER)
INPUT

Max

•

•

ROB

RE
D
GND

3-State Driver and Receiver Outputs

•

•

D OR P PACKAGE
(TOP VIEW)

OUTPUTS

D

A

B

H

H
Lt

L
Ht

L

tThese levels assume that the
open'collector outputs (A) and
the open-emitter outputs (B) are
connected to a pullup and pull·
down resistor, respectively.
FUNCTION TABLE (RECEIVER)
DIFFERENTIAL INPUTS

ENABLE

OUTPUT

A-B

RE

R

VIC 2: 0.2 V

L

L

Low Power Requirements

< VID < 0.2 V
VIO s -0.2 V

-0.2 V

description
The SN65076B and SN75076B differential bus
transceivers are monolithic integrated circuits
designed for bidirectional data communication
on multipoint bus transmission lines. They are
designed for noisy environments. where a lowimpedance termination to ground is required.
The SN65076B and SN75076B combine a
differential line driver and a differential input line
receiver. both of which operate from a single 5-V
power supply. The receiver has an active-low
enable. The driver differential outputs and the
receiver differential inputs are connected
internally to form differential input/output (110)
bus ports that are designed to offer minimum
loading to the bus whenever the driver is disabled
or Vee = O. These ports feature wide positive
and negative common-mode voltage ranges
making the device suitable for party-line
applications.

X
H
X

=
=

high level, L
irrelevant, Z

L

7

L

H

H

Z

= low level, 7 = indeterminate,
= high impedance (off)

logic symbol t

1-_4>--_ _7- A

1-"'----I~~_6-

B

tThis symbol is in accordance with ANSI/IEEE Std 91-19B4 and
lEG Publication 617-12.

logic diagram (positive logic)

o
RE"";;;--..,
R

PRODUCTION DATA d••umonts c.nt.in inf.rmation

currant 8S of publication date. Products conform to
spacifications per the tarms of Texl. Instrumants

::=~~i;a{;:I~tzi ~!=::i:r 1,~O:::::~::'s

not

TEXAS

~

Copyright © 1990, Texas Instruments Incorporated

INSTRUMENTS
POST OFFICE BOX 655303 • DAUAS, TEXAS 75265

2-317

SN65D76B, SN75D76B
DIFFERENTIAL BUS TRANSCEIVERS
description (continued)
The driver is designed to handle loads up to 10 rnA of sink and source current. The driver features positiveand negative-current limiting and thermal shutdown for protection from line fault conditions. Thermal
shutdown is designed to occur at a junction temperature of approximately 150°C in the P package and
170°C in the 0 package. The receiver features a minimum input impedance of 12 kO, an input sensitivity
of ± 200 m V, and a typical input hysteresis of 50 m V.
The SN65076B is characterized for operation from - 40 DC to 105 DC and the SN75076B is characterized
for operation from OOC to 70°C.
EaUlvALENT OF EACH INPUT

TYPICAL OF A I/O PORT

vcc-----_t-

- - vcc

INPUT

--+_+-+__-....... -- GNO
Driver Input: Req

= 3 kn

PORT

NOM

TYPICAL OF B I/O PORT

TYPICAL OF RECEIVER OUTPUT

- - VCC

-------vcc
85f!

.,,---. NOM

OUTPUT

- -.......+-......._-+--- GNO

TEXAS ."

2-318

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76286

SN65076B, SN75076B
DIFFERENTIAL BUS TRANSCEIVERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7,V
Voltage at any bus terminal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 10 V to 15 V
Enable input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . '. . . . . . . . . . . . . . . .. 5.5 V
Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN65076B.. . . . . . . . . . . . . . . . . . . . . . .. - 40 DC to 105 DC
SN75076B ............................ ODC to 70 DC
Storage temperature range ............................. .'........... - 65 DC to 150 DC
Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds. . . . . . . . . . . . . . . . . .. 260 DC
NOTES: 1. All voltage values, except differential input/output bus voltage, are with respect to network ground terminal.

DISSIPATION RATING TABLE
PACKAGE

TA ,,; 25°C
POWER RATING

DERATING FACTOR

TA = 70°C

ABOVE TA = 25°C

POWER RATING

D

725 mW

5.8 mW/oC

464 mW

P

1100 mW

8.8 mW/oC

702 mW

TA - 105°C
POWER RATING
261 mW
396 mW

recommended operating conditions
Supply voltage, VCC

MIN

TYP

MAX

UNIT

4.75

5

5.25

V

12

Voltage at any bus terminal (separately or common model, VI or VIC
High·level input voltage, VIH

D and RE

Low-level input voltage, VIL

D and RE

-7
2

Driver (AI

High-level output current, IOH

Driver (BI

Operating free-air temperature, TA

V

-10

mA

10
8

Receiver

I

V

±12
-400

Receiver

Low-level output current, IOl

V
0.8

Differential input voltage, VID (see Note 21

V

SN65076B

-40

105

I SN75076B

0

70

~A

mA
°C

NOTE 2: Differential-input/output bus voltage is measured at the non inverting terminal A with respect to the inverting terminal B.

TEXAS ."

INSTRUMENTS
POST OFFtCE ElOX 855303 • DALLAS. TeXAS 75285

2-319

SN650768, SN750768
DIFFERENTIAL 8US TRANSCEIVERS

DRIVER SECTION
driver electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER

TEST CONDITIONS

VIK
Va

Input clamp voltage

11=-18mA

Output voltage

VI = 2 V,

VODl

Differential output voltage

VOD2

Differential output voltage

10 = 0
See Figure 1

10

Output current

VI = 0.8 V

IIH

High-level input current

VI = 2.4 V

IlL

Low-level input cur.rent

VI = 0.4 V
Va = -7 V

lOS

Short-circuit output current

ICC

Supply current (total package)

10 = 0

MIN

Typt

0
1.5
1.5

I VO-12V
I Va = -7 V

Va = 0
Va = Vcc
Va = 12 V
No load

MAX

UNIT

-1.5

V

6
6
5
1
-0.8
20
-400
-250
-150
250
250
30

V
V

t All typical values are at VCC = 5 V and T A = 25°C.

driver switching characteristics, VCC
PARAMETER

Differential-output turn-on time

toff

Differential-output turn-off time

TEST CONDITIONS

See Figure 3

TEXAS .."

INSlRUMENlS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75286

MIN

TYP

MAX

60

90

75

110

V
rnA
~A

~

rnA

rnA

SN65076B, SN75076B
DIFFERENTIAL BUS TRANSCEIVERS

RECEIVER SECTION
receiver electrical characteristics over recommended ranges of common-mode input voltage. supply
voltage. and operating free-air temperature (unless otherwise noted)
PARAMETER

TEST CONDITIONS

VTH

Differential-input high-threshold voltage

Va = 2.7 V,

10 = -0.4 mA

VTL

Differential-input low-threshold voltage

Va = 0.5 V,

10 = 8 mA

Vbys

Hysteresis §

VIK

Enable-input clamp voltage

VOH

MIN

TVpt

MAX
0.2

-0.2:1:

V

High-level output voltage

VOL

Low-level output voltage

-1.5

11= -18mA
10H = -400 ~A,

See Figure 2
VID = -200 mY,

V
mV

50
VID = -200 mY,

UNIT

2.7

V
V

10L = 8 mA,

0.45

See Figure 2
Va = 0.4 V to 2.4 V

±20

V
~A

10Z

High-impedance-state output current

II

Line input current

IIH

High-level enable-input current

VIH = 2.7 V

20

~A

IlL

Low-level enable-input current

VIL = 0.4 V

-100

~A

r;

Input resistance

lOS

Short-circuit output current

-85

mA

ICC

Supply current (total package)

30

mA

Other input = 0 V,

VI = 12 V

See Note 3

VI = -7 V

1
-0.8

12

mA

kO

-15
No load

t All typical values are at VCC = 5 V, T A = 25°C.
:t:The algebraic convention, in which the less-positive (more-negativellimit is designated minimum, is used in this data sheet for threshold,

voltage levels only.
§ Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going input threshold voltage, VT _ .
NOTE 3: This applies for both power on and power off.

receiver switching characteristics. VCC

=

PARAMETER

5 V. TA
TEST CONDITIONS

tplH

Propagation delay time, low-to-high-Ievel output

VID = 0 to 3 V,

tpHl

Propagation delay time, high-to-Iow-Ievel output

Cl = 15 pF,

See Figure 4

Cl=15pF,

See Figure 5

Cl = 15 pF,

See Figure 5

tpZH

Output enable time to high level

tpZl

Output enable time to low level

tpHZ

Output disable time from high level

tplZ

Output disable time from low level

MIN

UNIT

TVP

MAX

21

35

ns

23

35

ns

10

20

ns

12

20

ns

20

35

ns

17

25

ns

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 856303 • DALlAS. TEXAS 75285

2-321

SN650768, SN750768
DIFFERENTIAL 8US TRANSCEIVERS
PARAMETER MEASUREMENT INFORMATION
5V
9100

4500
~~~~~----+--B

9100

FIGURE 1. DRIVER VOD2

FIGURE 2. RECEIVER VOH AND VOL
5V

~
1.5V
1.5V

--3V

INPUT

I

GENERATOR
(See Note AI

OV

:

:
ton ~

I

I4-tt- toff

:

500
9100

"1' _'T'

T

1:._

=3.5 V

OUTP~='_1V

CL - 50 pF
(See Note BI

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 3. DRIVER DIFFERENTIAL-OUTPUT DELAY TIMES

INPUT
GENERATOR
(See Note AI

~~'~V-3V

:Ji"~'

51 {}
1.5V

~OV

I

~'"!I

OV--_.J

OUTPUT

1.3 V

~t

~~'
I

1.3 V

Voo
VOL

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 4. RECEIVER PROPAGATION DELAY TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
tf s 6 ns, Zout = 50 0.
B. CL includes probe and jig capacitance.

TEXAS ."

2-322

INSTRUMENTS
POST OFFICE BOX 855303 • DAllAS.

TEXAs 75285

s

500 kHz, 50% duty cycle, tr S 6 ns,

SN65076B, SN75076B
DIFFERENTIAL BUS TRANSCEIVERS
PARAMETER MEASUREMENT INFORMATION
1.SV

Sl
S2

2kH

-l.SV---O

0 - - SV

lN916 OR EQUIVALENT

GENERATOR
(See Note AI

50 n

TEST CIRCUIT

INPUT

---~--~-~-~:.:V

INPUTJ'tC--~==:.:V

/ \ .

L

--.I.

I

tpZH

-+I 14-

INPUT~l'SV

----3V

S3 closed

~

:_-~4'SV
1.SV

---11-F'--. -.

VOL

3 V Sl to -1.5 V
S2 closed
"--OV S3 closed

INPUT

I

:
~
0.5 V

OUTPUT

I

OUTPUT

~~:7o~~V

OV

Slto-l.SV

0 V S2 closed
S3 open

I

tPZL-*+!

O"~"'~::"
I
tPHZ~

I

S1tol.5V
OV S2 open
S3 closed

tPLZ
VOH

l"--

----

-k---+I

~

I

OUTPUT

---~1.3V

0.5 V

~1.3V

VOL

VOL TAGE WAVEFORMS

FIGURE 5. RECEIVER OUTPUT ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR.s 500 kHz, 50% duty cycle, tr S 6 ns,
tf S 6 ns, Zout = 50 D.
B. CL includes probe and jig capacitance.

TEXAS ."

INSlRUMENlS
POST OFFICE BOX 656303 • DALLAS. TEXAS 76285

2-323

SN65076B. SN75076B
DIFFERENTIAL BUS TRANSCEIVERS

TYPICAL CHARACTERISTICS
RECEIVER HIGH-LEVEL OUTPUT VOLTAGE

RECEIVER HIGH-LEVEL OUTPUT
vs
FREE-AIR TEMPERATURE

vs
HIGH-LEVEL OUTPUT CURRENT

5

5
VID = 0_2 V
TA = 25°C

>I

&
l!!
"6

..

4

::J

~
::J
0
;;

3

"
:r:""'"I

2

>
..J

I
~4

t-.....

>

~

~~

>

Vee = 5_25 V
~ ~ ,./
~ .... v~e';5V'- r-~
Vee = 4_75 V

o

-

'[3

1,,\~

=

;;
~ 2
..J

J:.
:i:

"\:: ~

'"

~~

J:

0

>

o
o

Vee ~ 5 V
VIO - 200 mV
IOH - -440/LA

>

~1

o
>

~~

o

-20
-40
-50
-10
-30
IOH-High-Level Output Current-mA

-40 -20 o
20 40 60 80 100 120
TA-Free-Air Temperature- °c

FIGURE 6

FIGURE 7
RECEIVER LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

RECEIVER LOW-LEVEL OUTPUT VOLTAGE

vs

>I

&
l!!
"6

.

>

. RECEIVER LOW-LEVEL OUTPUT CURRENT
0.6
Vee = 5 V
TA = 25°C
0.5

./

0.4

~
::J

0.3

0;

>

"

..J

~

0.2

0
..J

I

..J

0

I'

/

0.6

Vce - 5 V
VID - -200 mV
I 0.5 IOL = 8 mA

>

.,
'"
~
co

..

> 0.4

//

::J

0

~

/

/

::J

~

.::J

/'

00.3
;;

~
~

-

0.2

.3

0_1

I
00.1

..J

>

o

>

o

5

10

15

20

25

30

IOL -Low Level Output eurrent-mA

o

-40 -20

o 20 40 60 80 100 120
TA-Free-Air Tamparature- °e

FIGURE 8

FIGURE 9

TEXAS .."

2-324

INSlRUMENTS
POST OFFICE BOX 6&'6303 • DALLAS, TEXAS 7628&

SN65076B, SN75076B
DIFFERENTIAL BUS TRANSCEIVERS

TYPICAL CHARACTERISTICS
RECEIVER OUTPUT VOLTAGE

RECEIVER OUTPUT VOLTAGE

vs

vs

ENABLE VOLTAGE

ENABLE VOLTAGE

5
VID = 0.2 V
Load = 8 kn to ground
4 ~ TA = 25°e

>I

I

8.

~

0

Vee = 5 V

6

-J

>I

....
Vee = 4.75 V -

"'-.

3

0
I
0

2

I

Vee = 5 V

4

."

>

S

90"

'"'"
~

WI.

Vee = 4.75 V

.!
I
VID = -0.2 V
Load = 1 kn to Vee
TA=25°e

r--

0

>
&

5

1
ee = 5. 25 V-

3

11

Vee = 5.25 V

&

2

"

>

>

o

o

0.5

1.5

2

2.5

3

o
o

0.5

VI-Enable Voltage-V

1.5
2
VI-Enable Voltage-V

2.5

3

FIGURE 11

FIGURE 10

TYPICAL APPLICATION

Vee

Vee

FIGURE 12. TYPICAL APPLICATION CIRCUIT

TEXAS ."

INSTRUMENTS
POST OFFICE

sox 866303. DALLAS. TEXAS 75285

2-325

2-326

SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
02619. JULY 1985-REVISEO SEPTEMBER 1989

D, JG, OR P PACKAGE

•

Bidirectional Transceiver

•

Meets EIA Standards RS-422-A and RS-485
and CCITI Recommendations V.11 and
X.27

(TOP VIEW)

•

Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments

•

3-State Driver and Receiver Outputs

•

Individual Driver and Receiver Enables

•

Wide Positive and Negative Input/Output
8us Voltage Ranges

~ ~cc

R:D1
DE
D

3
4

6
5

A
GND

FUNCTION TABLE (DRIVER)

•

Driver Output Capability ... ± 60 rnA Max

•

Thermal Shutdown Protection

•

Driver Positive and Negative Current
Limiting

OUTPUTS

INPUT

ENABLE

D

DE

A

H

H

H

L

L

H

L

H

X

L

Z

Z

B

FUNCTION TABLE (RECEIVER)

•

Receiver Input Impedance . . . 12 kG Min

•

Receiver Input Sensitivity ...

•

Receiver Input Hysteresis ... 50 mV Typ

± 200

•

Operates from Single 5-V Supply

•

Low Power Requirements

DIFFERENTIAL INPUTS

ENABLE

A-B

RE

R

VID;;' 0.2 V

L

H

L

?

-0.2 V

mV

<

VID

<

0.2 V

VID" -0.2 V
X

H
X

OUTPUT

L

L

H

Z

= high level. L = low level, ? = indeterminate,
= irrelevant, Z = high impedance (off)

logic symbol t

description
The SN65l76B and SN75l76B differential bus
transceivers are monolithic integrated circuits
designed for bidirectional data communication
on multipoint bus transmission lines. They are
designed for balanced transmission lines and
meet EIA Standard RS-422-A and RS-485 and
eelTT Recommendations V.l1 and X.27.
The SN65176B and SN75176B combine a
3-state differential line driver and a differential
input line receiver both of which operate from
a single 5-V power supply. The driver and
receiver have active-high and active-low
enables. respectively. that can be externally
connected together to function as a direction
control. The driver differential outputs and the
receiver differential inputs are connected
internally to form different!al input/output (I/O)
bus ports that are designed to offer minimum
loading to the bus whenever the driver is disabled
or Vee = O. These ports feature wide positive
and negative common-mode voltage ranges
making the device suitable for party-line
applications.

PRODUCTIOI DATA docu....llooatain i.formation
•• rnl1 I I of publication dote. Predacts .onfo... to
,plOllIeI110...... the I8nII of T.... IlIIIramllllS

=~;ai= =:~i: :.r;:~ not

(6) A
(7) B

tThis symbol is in accordance with ANSI/IEEE SId
lEG Publication 617-12.

91-1984

and

logic diagram (positive logic)
DE

.!.::.:--.,

D

RE ...:.::.:......--,
(6)

R

}

A

b-_ _.........."'(7...)_ B

BUS

Copyright © 1989, Texas Instruments Incorporated

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 76265

2-327

SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
The driver is designed to handle loads up to 60 mA of sink or source current. The driver features positiveand negative-current lir(1iting and thermal shutdown for protection from line fault conditions .. Thermal
shutdown is designed to occur at a junction temperature of approximately 150 °e. The receiver features
a minimum input impedance of 12 kO, an input sensitivity of ± 200 mV, and a typical input hysteresis
of 50 mV.
The SN65176B and SN75176B can be used in transmission line applications employing the SN75172 and
SN75174 quadruple differential line drivers and SN75173 and SN75175 quadruple differential line receivers.
The SN65176B is characterized for operation from -40 o e to 105 °e and the SN75176B is characterized
,for operation from ooe to 70 oe.

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

Vcc

TYPICAL OF A AND B 1/0 PORTS

-----

- - VCC

Req

TYPICAL OF RECEIVER OUTPUT

8sn

VCC

NOM

INPUT
OUTPUT

- -.....-+-....~~-4>--- GND
Driver Input: Req = 3 kn NOM
Enable Inpu,s: Req ~ 8 kn NOM

2-328

TEXAS

..If

INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS, TEXAS 75265

SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Voltage at any bus terminal .......................................... , -10 V to 15 V
Enable input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN65176B. . . . . . . . . . . . . . . . . . . . . . . .. - 40 °c to 105 °c
SN75176B ............. , " ......... '"
O°C to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds: D or P package. . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package ........... 300°C
NOTES:

1. All voltage values, except differential input/output bus voltage, are with respect to network ground terminal.
2. In the JG package, the chips are glass mounted.

DISSIPATION RATING TABLE
PACKAGE

TA - 25°C
POWER RATING

DERATING FACTOR

TA - 70°C
POWER RATING

TA = 105°C
POWER RATING

D

725 mW

ABOVE TA = 25°C
5.8 mW/oC

464 mW

261 mW

JG

825 mW

6.6 mW/oC

528 mW

297 mW

P

1100mW

8.8 mW/oC

702 mW

396 mW

recommended operating conditions
Supply voltage, VCC

MIN

TYP

MAX

UNIT

4.75

5

5.25

V

12
-7

V

Voltage at any bus terminal (separately or common mode), VI or VIC
High·level input voltage, VIH

D, DE, and

Low·level input voltage, VIL

D, DE, and

RE
RE

2

Differential input voltage, VID (see Note 3)
Driver

High·level output current, IOH

Operating free-air temperature, TA

V

-60

mA

60

Driver

B

Receiver

I SN65176B
I SN75176B

V

±12
-400

Receiver

low-level output current, tOl

V

O.B

-40

105

0

70

~A

mA
DC

NOTE 3: Differential·input/output bus voltage is measured at the non inverting terminal A with respect to the inverting terminal B.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-329

SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
DRIVER SECTION
driver electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
TEST CONDITIONSt

PARAMETER

VIK

Input clamp voltage

11=-18mA

Va

Output voltage

10 - 0

I V ODll

Differential output voltage

10 = 0

I V OD21
VOD3

RL = 100O,

See Figure 1

RL = 54O,
See Note 4

See Figure 1

Differential output voltage
Differential output voltage

MIN

TYP*

Voe

6

V
V

1.5

6

V

5

V

II VOD1

2
1.5

V
2.5

1.5

.:l!Voe

differential output voltage §
Common-mode output vol.tage

UNIT

0

Change in magnitude of

.:lIVOD!

MAX

-1.5

RL = 54

°or 100 0,

See Figure 1

Change in magnitude of
common-mode output voltage §

Output disabled,

IVo - 12 V
IVo - -7 V

5

V

±0.2

V

+3
-1

V

±0.2

V

1
-0.8

mA

10

Output current

IIH

High-level input current

VI = 2.4 V

20

~A

IlL

low-level input current

VI - 0.4 V

-400

~A

Vo -

-250

lOS

ICC

Short-circuit output current

Supply current (total package)

See Note 5

-7 V

-150

Vo = 0

250

Va - Vee
Vo - 12 V
No load

mA

250
10utputs enabled

42

55

10utputs disabled

26

35

mA

t The power-off measurement in EIA Standard RS-422-A applies to disabled outputs only and is not applied to combined inputs and outputs.
t All typical values are at Vee = 5 V and TA = 25°C.
§.:l.!VoDI and .:l.IVoel are the changes in magnitude of VOD and Voe respectively, that occur when the input is changed from a high
level to a low level.

NOTES: 4. See EIA Standard RS-485 Figure 3.5, Test Termination Measurement 2.
5. This applies for both power on afld off; refer to EIA Standard RS-485 for exact conditions. The RS-422-A limit does not apply
for a combined driver and receiver terminal.

driver switching characteristics. VCC = 5 V. TA = 25°C
too

PARAMETER
Differential-output delay time

TEST CONDITIONS

RL = 54O,

See Figure 3

MIN

TYP

MAX

15

22

UNIT

ns

20

30

ns

trD
tpZH

Differential-output transition time

Output enable time to high level

RL - 110O,

See Figure 4

85

120

ns

tpZL

Output enabla time to low level

RL - 110O,

See Figure 5'

40

60

ns

tpHZ

Output disable time from high level

RL - 1100,

See Figure 4

150

250

ns

tpLZ

Output disable time from low level

RL - 110O,

See Figure 5

20

30

ns

TEXAS ."

INSTRUMENTS
2-330

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
SYMBOL EQUIVALENTS
DATA SHEET PARAMETER

RS-422-A

RS-4BS

Va

Voa , Vob

V oa , Vob

I V ODll
I V OD21

Va
V t (RL - 100!l)

VA
V t (RL - 54!l)
V t (Test Termination

I V OD31

Measurement 2)

alvODI

IIVtl -

IIVt -

IVtl1

IVtl1

VOC

IVosl

IVosl

alvocl

I Vas - Vas I

I Vas - Vas I

lOS

Iisal, IIsbl

10

Ilxal, Ilxbl

lia, lib

RECEIVER SECTION
receiver electrical characteristics over recommended ranges of common-mode input voltage, supply
voltage, and operating free-air temperature (unless otherwise noted)
PARAMETER

TEST CONDITIONS

MIN

VTH

Differential-input high-threshold voltage

Va = 2_7 V,

10 = -0.4 rnA

VTL

Differential-input low-threshold voltage

Vo = 0.5 V,

10 = 8 rnA

Vhys

Hysteresis §

VIK

Enable-input ciamp voltage

VOH

High-level output voltage

Typt

MAX
0.2

-0.2;

mV
1.5

10H = -400

~A,

V
V

50
18 rnA
Ii 200 mV,
ViD See Figure 2

UNIT

2.7

V
V

VOL

Low-level output voltage

ViD = -200 mV,
See Figure 2

10Z

High-impedance-state output current

Vo - 0.4 V to 2.4 V

II

Line input current

IIH

High-level enable-input current

VIH - 2.7 V

20

~A

IlL
ri

Low-level enable-input current

VIL - 0.4 V

100

~A

lOS

Short-circuit output current

-85

rnA

ICC

Supply current (total package)

Other input = 0 V,
See Note 6

10L = 8 rnA,

0.45
±20

VI = 12 V
VI = -7 V

1
-0.8

12

Input resistance

I Outputs enabled
I Outputs disabled

~A

rnA

k[l

-15
No load

V

42

55

26

35

rnA

t All typical values are at Vce =.5 V, T A = 25°C.

t The algebraic convention, in which the less-positive (more-negative) limit is designated minimum, is used in this data sheet for commonmode input voltage and threshold voltage levels only.
§ Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going input threshold voltage,

VT _. See Figure 4.
NOTE 6: This applies for both power on and power off. Refer to EIA Standard RS-485 for exact conditions.

receiver switching characteristics, VCC .. 5 V, TA .. 25°C
PARAMETER

TEST CONDITIONS

tpLH

Propagation delay time, low-to-high-Ievel output

tpHL

Propagation delay time, high-to-Iow-Ievel output

tpZH

Output enable time to high level

tpZL

Output enable time to low level

tpHZ

Output disable time from high level

tpLZ

Output disable time from low level

VIO = 0 to 3 V,
See Figure 6
CL = 15 pF,
CL = 15 pF,

See Figure 7

CL = 15 pF,

See Figure 7

MIN

TYP

MAX

21

35

UNIT
ns

23

35

ns

10

20

ns

12
20

20
35

ns
ns

17

25

ns

TEXAS ...If

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

2-331

SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
PARAMETER MEASUREMENT INFORMATION

$=t>-{l1

t

VOC

+IOLV10H

+-IOH

VOL

*

-=1:FIGURE 1. DRIVER VOD AND VOC

=

=

=

FIGURE 2. RECEIVER VOH AND VOL

.r,;;--\ ~~

INPUT

~'.u.

l

I

I4-tt- too

too -l4-+f

GENERATOR

50 !l

I

1

T-~2.5V

I

(Se. Not. AI .
OUTPUT

50%

50%

I

_ _..zl

3V

tTO

3V

~OV

~-2.5

~tTD

-.I :.

V

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 3. DRIVER DIFFERENTIAL-OUTPUT DELAY AND TRANSITION TIMES
OUTPUT

~
l.5V
1.5V

----3V'

INPUT

I

I

~tPZH

GENERATOR

=

(See Not. AI

=

OV

I

0.5 V

--*-VOH
I
1~
I

2.3 V

OUTPUT

I

,...

tPHZ~

Votf"'OV

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 4. DRIVER ENABLE AND DISABLE TIMES
5V
RL=110!l

3 V.o, 0 V

'/'.5

INPUT

....Ii,

OUTPUT

V

I

tpz L --14---+1

----I

I

I

_ _""\1
GENERATOR

50 !l

\2.3 V

OUTPUT

(S•• No'" AI

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 5. DRIVER ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
tf :s 6 ns, Zout = 50 0.
B. CL includes probe and jig capacitance.

TEXAS ."

INSTRUMENTS
2-332

POST OFFICE BOX 656303 • DALLAS, TeXAS 75265

s 1

MHz. 50% duty cycle, tr S 6 ns,

SN65176B. SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
PARAMETER MEASUREMENT INFORMATION
--3V

~

INPUT
GENERATOR

51

(5e. Note Al

n
1.5V

1.5 V

I 1.5 V

I

I

I

I.o--"'-t

~'"fI

OV----'

OUTPUT

OV

\~'
I

1.3 V

VO'

1.3 V

VOL
VOLTAGE WAVEFORM5

TE5T CIRCUIT

FIGURE 6. RECEIVER PROPAGATION DELAY TIMES
1.5V

51
S2

2kn

-1.5V--o

0 - - 5V

lN916 OR EQUIVALENT

GENERATOR

50n

(See Note Al

TE5T CIRCUIT

.

~-----3V

INPUT

.

tp2H ~

~.

I
I

51tol.5V
OV 52 open

I

14-

~VOH
O.V

51 to -1.5V
OV 52closed
S30pen

I
tP2L~

53 closed

I

"---I.... ~ ~ _

OUTPUT

INPUT~--~==:':V

----1.5V

I

I1--"'4'5V

OUTPUT

~

1.5V
VOL

---3V

~
I 1.5 V

INPUT

I

51tol.5V
52 closed
53 closed

:
~
0.5V

"'" -

INPUT

51 to -1.5 V
52 closed
53 closed

1.5 V

I
I

OV

tPH2-k----+!

OUTPUT

~
I

--3V

OV

tPLZ~
VOH

-

- - - - "'1.3V
VOLTAGE WAVEFORMS

FIGURE 7. RECEIVER OUTPUT ENABLE AND DISABLE TIMES
NOTES:

A. The input pulse is supplied by a generator having the following characteristics: PRR '" 1 MHz, 50% duty cycle, tr '" 6 ns,

tf '" 6 ns, Zout = 50!l.
B. CL includes p.robe and jig capacitance.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-333

SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
TYPICAL CHARACTERISTICS
DRIVER HIGH-LEVEL OUTPUT VOLTAGE

DRIVER LOW·LEVEL OUTPUT VOLTAGE

vs

vs

DRIVER HIGH-LEVEL OUTPUT CURRENT

5

DRIVER LOW-LEVEL OUTPUT CURRENT

5

I

VCC=5V
TA = 25°C

~

3

o

2.5

]

~

,

r---...

2

~

3

0
"ii

2.5

>
CD

2

~

1.5

....

0.5
-20

-40

-60

-80

~ Vccl =5oV
TA=25C

I

3.5

:;

....0
....I
0
>

I

o
o

4

i>'"

1:.
'" 1.5
:f

:r
~

CD

I

~ r-.. .

I':::::

>

4.5

I

11
IT

,..

-~

0.5

o

-100 -120

o

10H-High-Level Output Current-mA

20
40
60
80
100
120
10L -Low-Level Output Current-mA

FIGURE 8

FIGURE 9
DRIVER DIFFERENTIAL OUTPUT VOLTAGE

vs
DRIVER OUTPUT CURRENT

4

t

>

..
!

~

o"

ii

3.5

,

3
2.5

I

i'-..

........

r-....
f'...

2

f

;

1.5

"

~
\\

Q

I

§

>

l

VCC=5V
f-TA = 25°C

.~

1\

0.5

o

\

o

10 20 30 40 50 60 70 80 90 100
10 - Output Current-rnA

FIGURE 10

-II

TEXAS
INSTRUMENlS
2-334

I---""

POST OFFICE BOX '655303 • DALLAS. TEXAS 76265

SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
TYPICAL CHARACTERISTICS
RECEIVER HIGH· LEVEL OUTPUT VOLTAGE

RECEIVER HIGH-LEVEL OUTPUT
vs
FREE-AIR TEMPERATURE

vs
HIGH-LEVEL OUTPUT CURRENT
5

5

=r
'"

...
>
.."
GO

VID = 0.2 V
TA=25°C -

5-

b..
3

"
"ii
0

..
GO

..J

I

&4

4

"6

2

'"'

>

[3

"\ ~
= 5.25 V
1,,\~ /VCC
~/V~C":5V'- -

VCC = 4.75 V

I
J:

:;
o

"ii

~~
~~

>

....~

2

~

1

1:.Ol
:f

"\ ~

0

o
o

-

~
o

~

I~

..:

J:'"

Vcc - 5 V
VIO - 200 rnV
IOH - -440/loA

>

o
>

-10
-20
-30
-40
-50
IOH-High-level Output Current-rnA

o

-40 -20 o
20 40 60 .80 100 120
TA-Free-Air Ternperature- °c
FIGURE 12

FIGURE 11
RECEIVER LOW·LEVEL OUTPUT VOLTAGE

RECEIVER LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

vs

>I

S,

RECEIVER LOW·LEVEL OUTPUT CURRENT
0.6
Vcc= 5V
TA = 25°C
0.5

~

.."

0.4

0
"ii

..

0.3

~

0.2

"6

>

V

5-

"

....
GO

0
..J

I
..J
0 0.1

V

/

/

V

/

V

Vcc - 5 V
VIO - -200 rnV
I 0.5 IOl = 8 rnA

>

j
~ 0.4

:;

S
00.3

V

"ii

!

~

--

0.2

.3

I
50.1

>

o

0.6

>

o

5

10
15
20
25
30
IOl -low level Output Current-rnA

o

-40 -20

o 20 40 60 80 100 120
TA-Free-Air Ternperature- °C

FIGURE 13

FIGURE 14

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 75265

2-335

SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
TYPICAL CHARACTERISTICS
RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE
5
VIO = 0.2 V
Load = 8 kn to ground
TA = 25°e

4

1

>I

..'"

Vee=5V

l!l
'0

3

>

...
=
;

0
I
0
'>

6

-J

J

.

5

1
ee = 5. 25 V-

>I

--

I

Vee = 5.25 V

8.

Vee - 4.75 v -

Vee = 4.75 V

.!

I

VID= -0.2 V
Load = 1 kn to Vee
TA = 25°e
"'-.

I

Vee=5V

4

t--

l!l
'0

>
2

=
So

3

0
I
0

2

:0

>

o

o

0.5

1.5

2

2.5

o
o

3

0.5

VI-Enable Voltage-V

2.5
1.5
2
VI-Enable Voltage-V

FIGURE 15

3

FIGURE 16

TYPICAL APPLICATION
SN65176B.
SN75176B

SN65176B.
SN75176B

UPTO 32

...

TRANSCEIVERS

FIGURE 17. TYPICAL APPLICATION CIRCUIT
NOTE: The line should be terminated at both ends in its characteristic impedance. Stub lengths off the main line should be kept as short
as possible.

TEXAS . "

INSTRUMENTS
2-336

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN65ALS176,SN75ALS176,SN75ALS176A,SN75ALS176B
DIFFERENTIAL BUS TRANSCEIVERS
AUGUST 1987-REVISEO MAY 1990

•

Meets EIA Standards RS-422A and RS-485,
CCITT Recommendations V.11 and X.27,
and ISO 8482:1987(E)

•

Designed and Tested for Data Rates up to
35 MBaud

•

SN65ALS176 Operating Temperature-40°C
to 85°C

•

Three Skew limits Available:
'ALS176 ... 10 ns
'ALS176A ... 7.5 ns
'ALS176B ... 5 ns

(TOP VIEW)

~·D8
RE
DE
D

2
3
4

7
6
5

Vee
B

A
GND

FUNCTION TABLE (DRIVER)
INPUT
D
H
L

•

Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments

•

Low Supply Current Requirements
30 mAMax

•

Wide Positive and Negative Input/Output
Bus Voltage Ranges

ENABLE
DE
H
H
L

X

OUTPUTS
A
B
H
L
L
H
Z
Z

FUNCTION TABLE (RECEIVER)

•

Thermal Shutdown Protection

•

Driver Positive and Negative Current
Limiting

•
•

Receiver Input Hysteresis

•

o OR P PACKAGE

DIFFERENTIAL INPUTS
A-B
VIO" 0.2 V
-0.2V 

.,I
S'"
"'6

.............

>

4

"

3

>
CD

2

...~I
...
0

1.5

0-

....

..........

I

3.5

~

..........

VCC I =5V
i-TA = 25°C

4.5

I
I

S
0 2.5

"

--

0

I
:t

~ 0.5

o
o

....-

> 0.5 t---20

-40

-60

-80

o

-100 -120

o

IOH-High-Level Output Current-rnA

20

40

J--'""

60

FIGURE 10
DRIVER DIFFERENTIAL OUTPUT VOLTAGE

vs
DRIVER OUTPUT CURRENT
4
~.

t
o

>

e.

I

3.5

.......

3

i'-

~

o"

ii

2.5

2

.~~

l!! 1.5

L

VCC = 5 V
TA=25°C

.......

" '"

r---

i'-...

;;

'" \
\

o
I

g 0.5

\

>

o

o

10 20 30 40 50 60 70 80 90 100
10 - Output Current-rnA

FIGURE 11

.

80

100

IOL -Low·Level Output Current-rnA

FIGURE 9

TEXAS'"

INSTRUMENTS

2-346

II

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

120

SN65ALS176,SN75ALS176,SN75ALS176A,SN75ALS176B
DIFFERENTIAL BUS TRANSCEIVERS
TYPICAL CHARACTERISTICS
RECEIVER HIGH·LEVEL OUTPUT VOLTAGE

RECEIVER HIGH-LEVEL OUTPUT

vs

vs

FREE-AIR TEMPERATURE

HIGH·LEVEL OUTPUT CURRENT

5

5
VID = 0.2 V
TA = 25°C

>I

..

'"
l!

4

3

S
~

=

~

.£:

'"
~

Vec = 4.75 V

I
X
0

>

o

u

...J:.~ 2

~~
~~

co

~

~
>

o

~~

o

3

o

5.25 V
I'\: ~ /Vee
~J... . V~e~5V'- -

2

-

>

1,\~

"

.....

l!

"0

~~

0

u>

I

~4

r-...

"0

>
:;
5-

Vec - 5 V
VIO - 200 rnV
IOH - -44OI'A

>

1

o

-10
-20
-30
-40
-50
IOH-High·Level Output Current-rnA

-40 -20 0
20 40
60 80 100 120
T A - Free-Air Temperature - °e

FIGURE 13

FIGURE 12

RECEIVER LOW-LEVEL OUTPUT VOLTAGE

RECEIVER LOW·LEVEL OUTPUT VOLTAGE

vs

vs

>I

&
l!

RECEIVER LOW·LEVEL OUTPUT CURRENT
0.6
Vee ~ 5 V
VID - -200 rnV
0.5 f- TA _ 25 0 e

"0

>
...

0.4

/

"
5-

"

0
U

....
~
...I
...0

0.3

>

0.2

0

V

/

/" "

/

/"

0.6

VCC = 5 V
VIO - -200 rnV
I 0.5 IOL = 8 rnA
~

>

B

~

0.4

Sa.
S

/'

00.3

....
~

--

~ 0.2

!l

0.1

I
50.1

>

o

FREE-AIR TEMPERATURE

>

o

5
10
15
20
25
30
IOL -Low Level Output Current-rnA

o

-40 -20

o 20 40 60 80 100 120
TA-Free-Air Ternperature- °e

FIGURE 14

FIGURE 15

TEXAS ..,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-347

SN65ALS176, SN75ALS176, SN75ALS176A, SN75A.LS176B
DIFFERENTIAL BUS TRANSCEIVERS

TYPICAL CHARACTERISTICS
RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE
6

5

>

VIO = 0.2 V
Load - 8 kll to ground
TA = 25 D e
4 r=--Jvee = 5.25 V

'"
l!!

5

TA = 25°e

I

I

J

Vee = 5.25 V

.,.
Vee = 4.75 V

>
I

I
co

o

VID = -0.2 V
Load = 1 k!! to Vee

lit

~

l!!

3 I---Vee - 4.75 V

Vee =15

o

"-Vee = 5V

>

4

>

~

~

::J

::J

vi

3

C.

C.

S

~ 2
I
o

o
I

o
>

>

o

o

2

o
0.5

1.5

2.5

2

3

o

1.5

0.5

2

2.5

3

VI- Enable Voltage- V

VI-Enable Voltage-V

FIGURE 17

FIGURE 16

APPLICATION INFORMATION

UP

TO 53

TRANSCEIVERS

•••

FIGURE 18. TYPICAL APPLICATION CIRCUIT
NOTE: The line should be terminated at both ends in its characteristic impedance. Stub lengths off the main line should be kept as short as
possible.

TEXAS .If

2-348

INSIRUMENlS
POST OFFICE BOX 655303 • DALlAS. TEXAS 75265

SN65ALS180, SN75ALS180
DIFFERENTIAL DRIVER AND RECEIVER PAIRS
03043, AUGUST 1987 - REVISED DECEMBER 1989

•

Meets EIA Standards RS-422-A and RS-485
and CCITT Recommendations V.11 and X.27

•

High-Speed Advanced Low-Power Schottky
Circuitry

•

Designed for 25-MBaud Operation in Both
Serial and Parallel Applications

•

Low Skew between Devices ... 6 ns Max

•

Low Supply Current Requirements
30 mA Max

•
•

D OR N PACKAGE
ITOP VIEW}

NC
R
RE
DE
D
GND
GND

VCC
VCC
A
B
Z
y

NC

NC-No internal connection

Individual Driver and Receiver I/O pins with
Dual VCC and Dual GND

FUNCTION TABLE (DRIVER)
INPUT

ENABLE

OUTPUTS

Wide Positive and Negative Input/Output
Bus Voltage Ranges

D

DE

Y

H

H

L

•

Driver Output Capacity ... ±SO mA

L

H
H

L

X

L

•

Thermal Shutdown Protection

Z

H
Z

•

Driver Positive and Negative Current
Limiting

•
•

FUNCT}ON TABLE (RECEIVER)
DIFFERENTIAL INPUTS

ENABLE

A-B

RE

R

VID '" 0.2 V
-0.2 V < VID < 0,2 V

L

H
?

Receiver Input Impedances ... 12 kQ Min
Receiver Input Sensitivity ... ±200 mV
Max

•

Receiver Input Hysteresis ... SO mV Typ

•

Operates from a Single 5-V Supply

•

Glitch-Free Power-Up and Power-Down
Protection

DE

The SN65ALS180 and SN75ALS180 combine a
3-state differential line driver and a differential
input line receiver both of which operate from a
single 5-V power supply. The driver and receiver
have active-high and active-low enables,
respectively, which can be externally connected
together to function as a direction control. The
driver differential outputs and the receiver
differential inputs are connected to separate pins
for greater flexibility and are designed to offer

:~~:~:~~i~8i~:1~1~ ~!:~~~ti:r ~~O:::~:t:~~S not

L

VID';; -0.2 V

L

L

X

H

Z

logic symbol t

The SN65ALS180 and SN75ALS180 Differential
Driver and Receiver Pairs are monolithic
integrated circuits designed for bidirectional data
communication on multipOint bus transmission
lines, They are designed for balanced
transmission lines and meet EIAStandards
RS-422-A
and
RS-485
and
GGID
recommendations V.11 and X.27.

PRODUCTION DATA documents contain information
current as of publication date. Products conform to

OUTPUT

H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)

description

specifications per the terms of Texas Instruments

Z

14}

19}

EN1

1 'V

y

o
RE

A

R

B

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

logic diagram (positive logic)

DE!-'J

~y

D~Z

RE..:.13:.:}_ _~
12}

R

112}

A

111 }
'-lr--- B

Copyright

© 1989, Texas Instruments Incorporated

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-349

SN65ALS180, SN75ALS180
DIFFERENTIAL DRIVER AND RECEIVER PAIRS
minimum loading to the bus when the driver is disabled or Vcc = O. These ports feature wide positive and
negative common-mode voltage ranges making the device suitable for party-line applications.
The SN65ALS180 is characterized for operation from - 40·C to 85·C and the SN75ALS180 is characterized
for operation from O·C to 70·C.

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

RECEIVER A INPUT

VCC - - - ~- - - - Req

3 kO
NOM

3 kO
NOM

~--

.....
~~

----

~,

u ....

VCC

1800
NOM

~

INPUT-*

MIN

See Figure I

RL= 1000.

See Figure I
RL-54O.
Vtest = -7Vto 12 V. See Figure 2

RL=54OorIOOO.

Output disabled.
See Note 3

See Figure I

No load

UNIT

-1.5
6

V
V
V

5
5

V
V
V

±0.2

V

+3
-I

V

±0.2

V

I
-0.8
20
-400

SN75ALSI80
SN65ALSIBO
All
All
SN65ALSIBO
SN75ALSIBO
Outputs enabled
Outputs disabled

VO=O
Vo -Vcc
Vo =BV
Vo = 12V

Supply current

2.5

Vo -12V
Vo = -7V

VI = 2.4V
VI- 0.4 V
Vo = -7V
Vo - -BV

Short-circuit output current'

1/2VODI
2
1.5
1.5

MAX

6

0
1.5

10 -0
10 = 0

Differential output voltage

VOD3

lOS

TEST CONDITIONSt
11= -18 rnA

Input clamp voltage
Output voltage
Differential output voltage

rnA

lolA
lolA

-250
-ISO

rnA

250
23
19

30
26

rnA

t The power-off measurement in EIA Standard RS-422-A applies to disabled outputs only and is not applied to combined Inputs and outputs.
§ a I VOD I and a I Voc I are the changes in magnitude of VOD and VOC respectively. that occur when the input is changed from a high level
to a low level.
~ Duration of the short circuit should not exceed one second.
NOTE 3: This applies for both power on and off; refer to EIA Standard R5-485 for exact conditions. The RS-422-A limit does not apply for a
combined driver and receiver terminal.

driver switching characteristics over recommended ranges of supply voltage and operating freeair temperature
PARAMETER
tDD

Differential-output delay time

lTD
tpZH
tpZL
tpHZ
tpLZ

Skew (I tDDH-tDDL I)
Differential output transition time
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level

*

TEST CONDITIONS
RL = 540.
See Figure 3

CL = 50 pF.

RL-IIOO.
RL= 1100.
RL=IIOO.
RL= 1100.

See Figure 4
See Figure 5
See Figure 4
See Figure 5

TVP*

MAX

3

8
I
B

13

3

All typical values are at VCC = 5 V and TA = 25'C.

TEXAS •

INSTRUMENTS
2-352

MIN

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

23
19

8
8

6
13
50
24
13
13

UNIT
ns
ns
ns
ns
ns
ns
ns

SN65ALS180, SN75ALS180
DIFFERENTIAL DRIVER AND RECEIVER PAIRS
SYMBOL EQUIVALENTS
DATA SHEET PARAMETER

RS-422-A

R5-485

Va

Voa, Vob

Voa, Vob

I VODll

Vo
Vt{RL-l000)

Vo
Vt (RL - 540)

I VOD2 I

Vt (Test Termination
Measurement 2)

I VOD31

Vtst

Vtest

IIVtl-IVtll

IIVtl-IVtll

dlVODI
Voe

IVos I

IVosl

dlVoel

I Vos - Vos I

I Vos - Vos I

lOS
10

Iisal, Ilsb I
lia, lib

Ilxal, Ilxb I

RECEIVER SECTION

receiver electrical characteristics over recommended ranges of common-mode input voltage,
supply voltage, and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS

PARAMETER
VTH

Differential-input high-threshold voltage

Va - 2.7 V,

VTL

Differential-input low-threshold voltage

Va

Vhvs
VIK

Hysteresis§
Enable-input clamp voltage

11-

VOH

High-level output voltage

VID = 200 mY,
See Figure 6

10H

= -400 (.lA,

VOL

Low-level output voltage

VID = -200 mY,
See Figure 6

10L

= 8mA,

10Z

High-Impedance-state output current

Va

II

Line input current

IIH

High-level enable-input current

VIH

IlL

Low-level enable-input current

VIL

ri

Input resistance

lOS

Short-circuit output current

ICC

Supply current

= 0.5 V,

MIN

TYpt

10 - -0.4 mA
10

= 8 mA

MAX

V

1.5

mV
V

V

-0.2*
60

18mA
2.7

V

= 0.4 Vto 2.4 V

0.45

V

±20

(.1A

Other input - 0 V.

IVI-12V

1

See Note 4

IVI- -7V

-0.8

= 2.7V
= 0.4 V
= 200 mY,

No load

Va = 0
I Outputs enabled

20

(.1A

(.lA
kO
mA

I Outputs disabled

-85

-15

mA

100
12

VID

UNIT

0.2

23

30

19

26

rnA

t All typical values are at Vee = 5 V, TA = 25°C.
* The algebraic convention, in which the less-positive (more-negative) limit is designated minimum, is used in this data sheet for common-mode
input voltage and threshold voltage levels only.
§ Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going Input threshold voltage, VT _.
See Figure 4.
NOTE 4: This applies for both power on and power off. Refer to EIA Standard RS-485 for exact conditions.

TEXAS •
INSTRUMENTS
POST OFFICe. BOX 655303 • DALLAS, TEXAS 75265

2-353

SN65ALS180, SN75ALS180
DIFFERENTIAL DRIVER AND RECEIVER PAIRS
receiver switching characteristics over recommended ranges of supply voltage and operating
free-air temperature
PARAMETER

TEST CONI:/J!JIONS

tpLH

Propagation delay lime, low-to-high-Ievel output

tpHL

Propagation delay time, high-to-Iow-Ievel output

tpZH

Skew ( ItPLH - tpHL I )
Output enable time to high level

tpZL.
tpHZ
tpLZ

Output enable time to low level

VID = -1.5 Vto 1.5 V,
CL= 15pF

TYpt

MAX

9

14

19

ns

9

14
2
7

19

ns
ns
ns

See Figure 7,

See Figure 8

CL=15pF,

Output disable time from high level

MIN

6
1.4

7

14

ns

20

35
17

ns
ns

8

Output disable time from low level

UNIT

t All typical values are alVcc = 5 V, TA = 25°C.

PARAMETER MEASUREMENT INFORMATION

VOC

-:1:
FIGURE 1. DRIVER VOD AND Voe
375 n

60n

375n

FIGURE 2. DRIVER VOD3

INPUT

GENERATOR
(Seo Note AI

/1.5V

1

:

I

tDDH~

50 !!

OUTPUT

' ; 5 - : - 3V

I

:

~tDDL

+- ~2.5V

I

_ _...zlI

3V

tTD"" :..
TEST CIRCUIT

OV

50%

I
I

~-2.5

...t Ie--

V

tTD

VOL TAGE WAVEFORMS

FIGURE 3. DRIVER DIFFERENTIAL·OUTPUT DELAY AND TRANSITION TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
lout = son.
B. CL includes probe and jig capacitance.

TEXAS . . ,
INSTRUMENTS
2-354

POST OFFICE BOX 656303 • DALLAS, TEXAS 75266

s

1 MHz, 50% duty cycle, tr

s 6 ns, tf S 6 ns,

SN65ALS180, SN75ALS180
DIFFERENTIAL DRIVER AND RECEIVER PAIRS
PARAMETER MEASUREMENT INFORMATION
OUTPUT

INP~1.5V

o V or 3 V - - - - I

I

RL =
110 !Z

.. _

(Se. Not. BI

GENERATOR
50 !Z

(See Note AI

, . 5 V \ - - - 3V

.

~tPZH

I
I

OV
0.5V

V--h--=!-

OUTP0

TEST CI RCUIT

2.3.~ _lJ~
-Je--I
..
tpHZ

VOH
VOff '" 0 V

VOL TAGE WAVEFORMS

FIGURE 4. DRIVER ENABLE AND DISABLE TIMES
5V
RL=110n

INPUTJ".5V

OUTPUT

I

tPZL~

3VorOV----i

I

__
GENERATOR

50 !l

I
~I

OUTPUT

(Se. Note AI

\2.3 V

VOL TAGE WAVEFORMS

TEST CIRCUIT

FIGURE 5. DRIVER ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characte,istics: PRR :s; 1 MHz, 50% duty cycle, t, :s; 6 ns,
tf :s; 6 ns, Zout ~ 50 O.
B. CL includes probe and jig capacitance.

$=t>-{

f f.-oJ ~

+-'0"

FIGURE 6. RECEIVER VOH AND VOL

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-355

SN65ALS180,SN75ALS180
DIFFERENTIAL DRIVER AND RECEIVER PAIRS
PARAMETER MEASUREMENT INFORMATION

~

--3V

INPUT
GENERATOR

51 !1

(Se. Not. Al

I 1.5V

I

I

I

...

'''"1

1.5V

=

1.5V

~~'

I

OV--_....l

OUTPUT

0 V
--.L t

I

1.3 V

1.3 V

V,"
VOL

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 7. RECEIVER PROPAGATION DELAY TIMES
1.5 V

Sl
S2

2kS!

-1.5V--

2

"

-'

~

J:

L

3

&
::l

'"""" \

a;
>

:;

.........

I

3.5

>,

...............

~

:;

DRIVER LOW-LEVEL OUTPUT VOLTAGE
vs
DRIVER LOW-LEVEL OUTPUT CURRENT
5
VCC = 5 V
4.5
>
-TA = 25°C
I
4

DRIVER HIGH-LEVEL OUTPUT VOLTAGE
vs
DRIVER HIGH-LEVEL OUTPUT CURRENT
5
I
_VCC = 5 V
4.5
TA=25°C

1.5

0

-'

I

I

:I:

./

-'

~ 0.5

0
> 0.5

o

o

-20

-40

-60

-80

o

-100 -120

o

10H-High-Level Output Current-rnA

--

--

~
~

80
100
120
40
60
20
10l -low·level Output Current - rnA

FIGURE 10

FIGURE 9
DRIVER DIFFERENTIAL OUTPUT VOLTAGE
vs
DRIVER OUTPUT CURRENT
4

>I

I

.,en

3.5

"0

3

f!

>

.......

::l

&
::l

..,
0

.

c

~

'-

.........

""" . . . .1'--

~

2.5
2

......

1'\

1.5

1\

C
I
0

0

>

I

VCC = 5 V
TA = 25°C

\

0.5

o

\

o

10 20 30 40 50 60 70 80 90 100
10 - Output Current-rnA

FIGURE 11

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-357

SN65ALS180,SN75ALS180
DIFFERENTIAL DRIVER AND RECEIVER PAIRS
TYPICAL CHARACTERISTICS,
RECEIVER HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT

RECEIVER HIGH-LEVEL OUTPUT
vs
FREE-AIR TEMPERATURE

5
VID = 0.2 V
TA = 25°e

:;-

!

4

i

3

~

t

N~
= 5.25 V
N ~ VVee
~VVCC=5V·- f-I

2

:r:'"I

I

J:

o
o

I

8-

~

J:

~1~~-~-4--~-+-~-~-­

o
>

-10
-20
-30
-40
-50
IOH-High·Level Output Current-mA

RECEIVER LOW-LEVEL OUTPUT VOLTAGE
vs
RECEIVER LOW-LEVEL OUTPUT CURRENT

RECEIVER LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

0.5

~

Vce - 5 V
VIO - -200 mV
TA - 25°C

V

"

0.3

>

..J

~

0.2

..J

I

..J

0

/

V

/'

0.6

,/'

VCC - 5 V
VIO - -200 mV
I 0.5 IOL - 8 mA

>

f

1/

0.4

"
So

..

OL-~_-L_~~_-L_~~L-~

-40 - 20 0
20 40
60 80 100 120
TA - Free·Air Temperature - °e

FIGURE 13

"0

0
"ii

~ 2~~-~-4--~-+-~-~--

FIGURE 12

:l

>
...

a;

....I

0.6

>I

[3~~-~-+--~-+-4--t-~

~~
~~

>

-+--+--+-+--1

:;

N~

o

-440 "A

o

~

Vec = 4.75 V

IOH -

J4~=l~~~+-~r--f==lr-t--l

~~

"ii

..J
.<:

I

~

o"

Vce - 5 V
VIO - 200 mV

>

>
:;

"V

~ 0.3 r-- '-1
~

V

~

0.2

.3

0.1

I
50.1

>

o

0.4

CI.

>

o

5

10

15

20

25

30

IOL -Low Level Output Current-mA

o

-40 -20

0
20 40
60
80 100 120
TA-Free·Air Temperature- °C

FIGURE 15

FIGURE 14

TEXAs ~.
INSTRUMENTS
2-358

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN65ALS180, SN75ALS180
DIFFERENTIAL DRIVER AND RECEIVER PAIRS
TYPICAL CHARACTERISTICS
RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE
5

4

>

.,I
:s'"
o

~vee

a

5

= 5.2SV

VID = -0.2 V
Load = 1 kll to Vee

TA

=

I

25°e

l

vee = 5 2J V

,.

>

Vee

=

4.75 V

I

~

~

:s

3 - V e e - 4.75-V

4
Vee

o

'-Vee = sv

>
S

~

6

VIO = 0.2 V
Load = 8 kll to ground
TA = 25°e

>

S

=

5 V/

3

Co

S

2

o
I
o

I

o

2

>

>

o

o

o
0.5

2

1.5

2.5

3

o

0.5

1.5

2

2.5

3

VI-Enable Voltage-V

VI-Enable Voltage-V

FIGURE 16

FIGURE 17
APPLICATION INFORMATION

SN65ALS180
SN75ALS180

SN65ALS180
SN75ALS180

UP TO 32
TRANSCEIVERS

NOTE: The line should be terminated at both ends in its characteristic impedance. Stub lengths off the main line should be kept as short as
possible.

FIGURE 18. TYPICAL APPLICATION CIRCUIT

TEXAS . "

INSTRUMENTS
POST OFF1CE BOX 655303 • DALLAS, TEXAS 75265

2-359

2-360

SN65C185,SN75C185
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS
03325, AUGUST 1989- REVISED JULY 1990

•

Meets Standard EIA-232-D (Revision of
RS-232-C)

•

Single Chip With Easy Interface Between
UART and Serial Port Connector

•
•

•
•
•
•
•

OW OR N PACKAGE
(TOP VIEW)
Vee
RY1
RY2

Less than 8-mW Power Consumption
Wide Driver Supply Voltage •.• 4.5 V to
13.2V

RY3
DA1
DA2
RY4
DA3
RY5
GND

DY1
DY2
RA4
DY3

Driver Output Slew Rate limited to
30V/Jls Max
Receiver Input Hysteresis •.. 800 mV Typ
Push-Pull Receiver Outputs

logic diagram (positive logic)

On-Chip Receiver 1-Jls Noise Filter
ESD Protection Exceeds 1000 V
Per MIL-STD-883C, Method 3015

RAl

description

RA2

The SN65C185 and SN75C185 are low-power
BIMOS devices containing three independent
drivers and five receivers that are used to
interface data terminal equipment (OTE) with
data circuit-terminating equipment (OCE), The
SN65C185 and SN75C185 will typically replace
one SN75188 and two SN75189 devices. These
devices have been designed to conform to
Standards ANSIIEIA-232-0-1986, which
supersedes RS-232-C. The three drivers and five
receivers of the SN65C185 and SN75C185 are
similar to those of the SN75C188 quadruple
drivers and SN75C 189A quadruple receivers,
respectively. The drivers have a controlled output
slew rate that is limited to a maximum of 30 V/IlS
and the receivers have filters that reject input
noise pulses that are shorter than 1 Ils. Both
these features eliminate the need for external
components.
The 8N65C185 and SN75CHi5 have been
designed using low-power techniques in a
BI-MOS technology. In most applications the
receivers contained in these devices will interface
to single inputs of peripheral devices such as
ACEs, UARTs, or microprocessors. By using
sampling, such peripheral devices are usually
insensitive to the transition times of the input
signals. If this is not the case, or for other uses,
. it is recommended that the SN65C185 and
SN75C185 receiver outputs be buffered by single
Schmitt input gates or single gates of the
HCMOS, ALS, or 74F logic families.
PRODUCTION DATA documents contain information
current as 01 publication date. Products conlorm to
:r:ClflcaHons per the terms 01 Te..s Instruments
n.c~~~I1v"~ru~i ~~1~~~~nacr:::.~:r.~:." not

RA3
OVl

-{g>o-{g>o-{g>o-0«]-

RVl

RV2

RV3
OAl

OV2 -o«]-OA2

RA4

OV3

RAS

-{g>o-0«]-{g>o-

RV4

OA3

RV5

logic symbol t
RAl

RVl

RA2

RV2

RA3

RV3

OVl

OAl

OV2

OA2

RA4

RV4

OV3

OA3

RA5

RV5

tThis symbol in accordance with ANSIIIEEE
Sid 91-1984 and lEe Publication 617·122.

TEXAS ~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright © 1990, Texas Instruments Incorporated

2-361

SN65C185,SN75C185
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS

description (continued)
The SN65C185 is characterized for operation from -40°C to 85°C. The SN75C185 is characterized for
operation from DoC to 70°C.

equivalent schematics of inputs and outputs
EQUIVALENT DRIVER INPUT

EQUIVALENT DRIVER OUTPUT

- - - - - . . - - - - - - - VDD

Internal
1.4 V ref.

Input --._.....--1
DA

e-"VV\~"""",'Vv-"'" Output

DY

r

GND

GND

-::.....- - - - - - - - - - - VDD

- .....------<_--.....- - - -.....-

vss

EQUIVALENT RECEIVER OUTPUT

EQUIVALENT RECEIVER INPUT

- - - - - - - -.....-

Input

VCC

RA

3.4 kO

Output

RY

1.5 kO

5300

-::-

GND

All resistor values are nominal.

TEXAS . .

INSTRUMENTS
2-362

POST OFFICE BOX 655303' DALLAS, TEXAS 75265

GND

SN65C185,SN75C185
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD (see Note 1) .................................................... 13.5 V
Supply voltage, VSS .............................................................. -13.5 V
Supply voltage, VCC ................................................................. 7 V
Input voltage range, Driver ...................................................... VSS to VDO
Receiver .................................................. -30 V to 30 V
Output voltage range, Driver .......................................... VSS - 6 V to VDD + 6 V
Receiver ......................................... -0.3 V to VCC + 0.3 V
Continuous total dissipation ........................................ See Dissipation Rating Table
Operating free-air temperature range, T A: SN65C185 ............................... -40°C to 85°C
SN75C185 ................................. O°C to 70°C
Storage temperature range ................................................... -65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ............................. 260°C
NOTE 1: All voltages are with respect to the network ground termiaal.
DISSIPATION RATING TABLE
PACKAGE

TA'; 25°C

DERATING FACTOR

POWER RATING

ABOVE T A = 25°C
9.0 mW/oC

DW

1125mW

N

1150mW

9.2 mW/oC

TA

= 85°C

POWER RATING
585 mW
598 mW

recommended operating conditions
Supply voltage, VDD

MIN
4.5

Supply voltage, vSS
Supply voltage, VCC
Input voltage, VI (see Note 2)
High-level input voltage, VIH
Low-level input voltage, VIL
High-level output current, IOH
Low-level output current, IOL
Operating free-air temperature, TA

Driver

-4.5

NOM
12
-12

MAX
13.2
-13.2

4.5

5

6

V

VDD
25

V

VSS+2
25

Receiver

2

Driver
Receiver
SN65C185
SN75C185

..

..

UNIT
V
V

V

0.8
-1

rnA

3.2

rnA

-40

85

0

70

°C

NOTE 2: The algebraic convention, where the more positive (less negative) limit IS deSignated as mru(lmum, IS used In thiS data sheet for logiC
levels only, e.g., if -10 V is a maximum, the typical value is a more negative voltage.

TEXAS

~

INSTRUMENTS .
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-363

SN65C185,SN75C185
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS

SUPPLY CURRENTS
PARAMETER

100

Supply current from V00

ISS

Supply current from VSS

ICC

Supply current from VCC

TEST CONDITIONS
No load,
VOO = 5 V,
All inputs at 2 V or 0.8 V VOO=12V,
No load,
VOO = 5V,
All inputs at 2 V or 0.8 V VOO - 12V,
No load,
VOO = 5V,
All inputs at 0 or 5 V
VOO = 12V,

MIN

VSS=-5V
VSS = -12V
VSS=-5V
VSS - -12V
VSS=-5V
VSS = -12V

TYP
115

MAX
200

115
200
-115 • -200
-115
-200
750
750

UNIT

/-I A

!-IA
/-I A

DRIVER SECTION

driver electrical characteristics over operating free-air temperature range, VDD = 12 V,
VSS
-12V, VCC
5 V ± 10% (unless otherwise noted)

=

=

PARAMETER

High-level output voltage

VOH
VOL
IIH
IlL
IOS(H)
IOS(L)

Low-level output voltage
(see Note 2)
High-level input current
Low-level input current
High-level short circuit
VI = 0.8 V,
output current (see Note 3) . See Figure 1
Low-level short circuit
VI = 2V,
output current (see Note 3)
See Figure 1
Output resistance

ro

TEST CONDITIONS
VIL = 0.8 V, RL = 3 kQ, VOO = 5V, VSS=-5V
See Figure 1
VOO = 12V, VSS = -1'2V
VIH = 0.8 V, RL = 3 kn, VOO = 5V, VSS=-5V
See Figure 1
VOO = 12V, VSS=-12V
See Figure 2
VI = 5V,
See Figure 2
VI = 0,

Va = OorVO = VSS'
Va = OorVO = VOO,

VOO = VSS = VCC = 0,
See Note 4

Va = -2Vt02V,

MIN
4

10

Typt

4.5
10.8
-4.4
-10.7

MAX

UNIT

V
-4
-10
1
-1

V

!-IA
/-I A

-4.5

-12

-19.5

mA

4.5

12

19.5

mA

300

400

Q

tAli typical values are at TA = 25°C.
NOTES: 2. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for
logic levels only, e.g., if -10 V is a maximum, the typical value is a more negative voltage.
3. Not more than one output should be shorted at one time.
4. Test conditions are those specified by EIA-232-0.

driver switching characteristics, VDD

= 12 V, VSS

PARAMETER
Propagation delay time,

tpLH

t-rLH
t-rHL
t-rLH
t-rHL

low-to-high-Ievel output (see Note 5)
Propagation delay time,
high-to-Iow-Ievel output (see Note 5) .
Transition time, low-to-high-Ievel output
Transition time, high-to-Iow-Ievel output
Transition time, low-to-high-Ievel output (see Note 6)
Transition time, high-to-Iow-Ievel output (see Note 6)

SR

Output slew rate (see Note 6)

tpHL

= -12V, VCC

= 5 V ±. 10%, TA = 25°C

TEST CONDITIONS

..
additional time

MIN

RL = 3knt07kn,CL = 15pF,
See Figure 3
0.53
0.53
RL = 3knt07kn,CL - 2500pF,
See Figure 3
RL = 3kQt07kn,CL = 15pF,
See Figure 3

4

TYP

MAX

1.2

3

/-Is

2.5

3.5

/-Is

2
2
1.0
1.0

3.2
3.2
3
3

/-Is
/-Is

10

30

V//-IS

UNIT

/-IS
/-IS

NOTES: 5. tpHL and tpLH Include the
due to on-chip slew rate and IS measured at the 50% pOints .
6. Measured between 3-V and -3-V points of output waveform (EIA-232-0 conditions), all unused inputs tied either high or low.

TEXAS ."

INSTRUMENTS
;2-364

POST OFFICE BOX 655303 • DAlu\S, TEX-!'oS 75265

SN65C185,SN75C185
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS
RECEIVER SECTION
receiver electrical characteristics over operating free-air temperature range, Voo = 12 V,
Vss = -12V, VCC = 5 V ± 10% (unless otherwise noted)

VT+
VT_
Vhys

VOH

PARAMETER
Positive-going threshold
voltage
Negative-going threshold

voltage
Input hysteresis (see Note 7)

High-level output voltage

VOL

Low-level output voltage

IIH

High-level input current

IlL

Low-level input current
Short-circuit output current

IOS(H)
IOS(L)

at high-level
Short-circuit output current
at low-level

MIN

Typt

MAX

UNIT

See Figure 5

1.6

2.1

2.55

V

See Figure 5

0.65

1

1.25

1000

= 4.5V

600
3.5
2.8

I Vee = 5V
I Vee = 5.5V

3.8
4.3

4.9
5.4
0.17

0.43
3.6

0.55
4.6

- 0.43
-3.6

-0.55
-5.0

-8.3

See Figure 4

-8

-15

rnA

Vee, See Figure 4

13

25

~A

TEST CONDITIONS

VI
VI

=
=

0.75 V, IOH
0.75 V,

=-

IOL

VI

= 3V,
= 3V
= 25 V
= -3 V
= -25V

VI

= 0.75,

Vo

= 0,

VI

=

Vo

=

VI
VI
VI

Vee,

~A,

See Figure 5 and Note 8

l Vce

IOH = -1 rnA,
See Figure 5
VI

20

= 3.2 rnA,

See Figure 5

V
mV

4.4

V

0.4
1
8.3
-1

V
rnA
rnA

tAli typical values are at TA = 25'C.
NOTES: 7. Hysteresis is the difference between the positive-going input threshold voltage, VT+, and the negative-going input threshold
voltage, VT-'
8. If the inputs are left unconnected, the receiver interprets this as an input low, and the receiver outputs will remain in the high state.

receiver switching characteristics, VOO
(unless otherwise noted)
PARAMETER
tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output

trLH Transition time, low-to-high-Ievel output
trHL Transition time, high-to-Iow-Ievel output
Pulse duration of longest pulse rejected as noise
tw(N)
(see Note 9)
NOTE 9:

= 12 V, VSS = -12V, VCC = 5 V ± 10%, TA = 25°C
TEST CONDITIONS

RL = 5 kQ,
See Figure 6
RL = 5kO,
See Figure 6

MIN

eL ,: 50 pF,

TYP
3

MAX
4

3

4
450

300
100
eL

= 50 pF,

1

UNIT
~s
~s

300

ns
ns

4

~s

..
The Intent of thiS specification IS that any Input pulse of less than
greater than 4

~s

1 ~s Will have no effect on the output, and any pulse· duration of
will cause the output to change state twice. Reaction to a pulse duration between 1 ~s and 4 ~ is uncertain.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-365

SN65C185,SN75C185
LOW-POWER MULTIPLE DRIVERS ANO RECEIVERS
PARAMETER MEASUREMENT INFORMATION
IOS(L)

+-

t

-{l)-

VDD

VI

VDD OR GND

-IOS(H)

1

--CiS-

ee

1

--

--

VDD

VSS OR GND

+

RL= 31ill

--

Vss

VSS

Figure 2. Driver Test Circuit for IIH and IlL

Figure 1. Driver Test Circuit
for VOH. VOL. IOS(H). and IOS(L)

Input

j1.5V

1.5V'i- -

1
~tpHL -+I

-

CL
(See Note B)

Output

i\:
1

50%

1

_10%

ti:

50%

1

-1- -

10%

1
-+I

Zo

= 50 Q. tr = tf < 50 ns.

VDD

VI

LrtVss

-IOS(H)

~
IOS(L)

+-

-
1101>

2A~

28 {51

2B~

3A 191

38 {101

2V

3A~{91
(B)

4A {121
4B {131

(10)

3V

3B

4A~12)
(II)
(13)

tThis symbol is in accordance with ANSIIIEEE Std. 91-1984 and
IEC Publication 617-12.

4V

48
positive logic

y ~ A {driver 11
y ~ AB or A + B {drivers 2 thru 41

PRODUCTION DATA do.umonts oontlln inta.mation
currant I I of pull'ication II.... Products conform to
spacifications per the tarms of Ta••• Instruments

:':==i~'i~~~ ~!.'t~~ti:: :.r;::::::~!~~1 not

Copyright © 1990, Texas Instruments Incorporated'

TEXAS ",

INSTRUMENTS
POST OFFICE BOX 65&303 • DALLAS, TEXAS 75266

2-369

SN65C188, SN75C188
QUADRUPLE LOW·POWER LINE DRIVER

schematics of inputs and outputs
EACH OUTPUT'

EACH INPUT

vcc+-------------e__-------

~~---------4~----~----------vcc+

INTERNAL
1.4 V REF
TO GND

INPUT A

INPUTB- - - (drivers

2.3 and
40nlyl

.........,.,.........""'"" OUTPUT
160 \I

Idriver 1 only)

. - - - 1 - -__

GND'd,.
,;:;GND

vcc-------~------------~

--~----------------~----_'----vcc-

t All resistor values shown are nominal.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, Vcc + (see Note 1) .... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
Supply voltage, VCC - (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 15 V
Input voltage range, VI ........................................... " VCC - to VCC +
Output voltage range, Vo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. VCC _ - 6 V to VCC + + 6 V
Continuous total power dissipation ........................... , See Dissipation Rating Table
Operating free-air temperature range, TA: SN65C188 ...................... -40°C to 85°C
SN75C188 ......................... ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 in.) from case for 10 seconds ...................... 260°C
NOTE 1: All voltage values are with respect to the network ground terminal.
DISSIPATION RATING TABLE
PACKAGE

D
DB
N

TA s 25°C
POWER RATING

ABOVE TA - 25°C

TA - 85°C
POWER RATING

950 mW
525 mW
1150mW

7.6 mW/oC
4.2 mW/oC
9.2 mW/oC

494mW
273 mW
598 mW

DERATING FACTOR

TEXAS .."

INSTRUMENTS
2-370

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN65C188, SN75C188
QUADRUPLE LOW·POWER LINE DRIVER

recommended operating conditions
Supply voltage, Vcc +
Supply voltage, VCCInput voltage, VI
High-level input voltage, VIH

MIN

NOM

MAX

UNIT

4.5
-4.5

12
-12

15
-15

V
V
V

VCC- +2
2

VCC+

-40

0.8
85

0

70

Low-level input voltage, VIL
Operating free-air temperature, T A

I SN65C188
I SN75C188

electrical characteristics over operating free-air temperature range. VCC+ = 12 V. VCC- (unless otherwise noted)
PARAMETER

VOH

VOL

High-level output voltage

Low-level output voltage
(see Note 2)

TEST CONDITIONS

= 0.8

VIL

VIH

=

V, RL

2 V,

RL

=

=

Vcc+
Vcc-

3 kll

VCC+
VCCVCC+
VCCVCC+
VCC-

3 kll

VI
VI

=5
=0

*
at low level *

VI

= 0.8

VI

=

ro

Output resistance, power off

ICC+

Supply current from VCC +

VCC+ = 0, VCC- = 0, Va =
VCC+ = 5 V, VCC- = -5 V,
No load

IIH
IlL

High-level Input current
Low-level input current

Short-circuit output current

IOS(H)
IOS(L)

ICC-

at high level
Short-circuit output current

Supply current from VCC-

MIN

=
=
=
=
=
=
=
=

5 V,
-5 V
12 V,
-12 V

Tvpt

2 V, Va

Va

=

=

-4
V
-10

5.5

VCC+ C' 12V,VCCNo load
VCC+ = 5 V, VCCNo load
VCC+ = 12 V, VCCNo load

=
=

-12V

-5V,

=

-12 V

-2Vt02V
All inputs at 2 V
or 0.8 V
All inputs at 2 V
or 0.8 V
All inputs at 2 V
or 0.8 V
All inputs at 2 V
or 0.8 V

UNIT

V

-5.5

0 or VCC+

-12 V

10

5 V,
-5 V
12 V,
-12 V

0 or VCC-

°c

4

10
-10

~A

-10 -19.5

mA

19.5

mA

V

V,

MAX

V
V

10

~

Il

300
90

160

95

160

-90

-160

-95

-160

~

~A

t All typical values are at T A = 25°C.
+Not more than one output should be shorted at one time.
NOTE 2: The algebraic convention, in which the more positive (less negative) limit is designated as maximum, is used in this data sheet
for logic levels only, e.g., if a - 4 V is a maximum, the typical value is a more negative voltage.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 76285

2-371

SN65C188, SN75C188
QUADRUPLE LOW-POWER LINE DRIVER
switching characteristics. Vee +

12 V. VeeTEST CONDITIONS

PARAMETER

=

=

MIN

TYP

MAX

UNIT

tPLH

Propagation delay time, low-to-high level output t

tpHL

Propagation delay time, high-to-Iow level output t

tTLH

Transition time, low-to-high-Ievel output+

0.53

3.2

~s

tTHL

Transition time, high-to-Iow-Ievel output:!:

0.53

3.2

.us.

1.5

3

~s

1.5

3

15

30

tTLH

Transition time, low-to-high-Ievel output§

tTHL

Transition time, high-to-Iow-Ievel output§

SR

Output slew rate §

RL

3 kn, CL

1 5 pF,

See Figure 1

RL

=

3 kn to 7 kn, CL

=

2500 pF,

See Figure 1
RL

=

=

3 kn to 7 kn, CL

6

15 pF

3

~s

3.5

~s

~s

Vf~s

t Measured at the 50% level.
tMeasured between the 10% and 90% points on the output waveform.
§Measured between the 3 Vand - 3 V points on the output waveform (EIA-232-D conditions), all unused inputs tied either high or low.

PARAMETER MEASUREMENT INFORMAnON

INPUT

~--~--~---OUTPUT

Jr-----VOH
OUTPUT

VOLTAGE WAVEFORMS

TEST CIRCUIT
NOTES: A. The pulse generator has the following characteristics: tw
B. CL includes probe and jig capacitance.

=

25 ~s, PRR

=

20 kHz, Zo

FIGURE 1, PROPAGATION AND TRANSITION TIMES

TEXAS

~

INSTRUMENTS
2-372

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

=

50 n, tr

= tf

S 50 ns.

SN65C188, SN75C188
QUADRUPLE LOW·POWER LINE DRIVER

TYPICAL CHARACTERISTICS
OUTPUT CURRENT
vs
OUTPUT VOLTAGE

VOLTAGE TRANSFER CHARACTERISTICS
15

Vcc± 12 r - VCC+ -

.,
'"

r-~CC~

I

6

i'!

3

"5

>
~

12

+9 V

E
I

E

........

.l

8

~

4

()

0

/
11- -

:;

0

~

:::J

-3

±5 V

VCC± -

-6

±9 V

VCC± -

>

-9
-12
-15

r-- RL

- 3 kll
TA - 25°C

o

Co

:;

-4

0
I

-8

P

VCC± - + 12 V

-12

VCC±-±5V

-16

)

I

I

C
~

:::J
()

:;
So
:::J
0

10

5

r-

-8

-r--

Vo = 0 or VCC+

~

2(; -5
IOS(H)
'" -10 _VI = 0.8 V ....J:

I

'"

P

Vo
1
-15
- 40 - 20

=

OorVCC-

--

=
=

12 V
··12 V

VOH vcc+

>

r---~

4

8

12

16

= 12 V. Vcc- -

-12 V. VI - 0.8 V

8

I

'"

Cl

i'!

"5

4

VOH Vcc+ _ 5 V. VCC-

= -5 V. VI - 0.8 V

>
:;
So
:::J
o

----

I

o

>

-8r--~---+--~--+---+-~r---+--~

VOL vcc+ - 12 V. Vcc- - -12 V. VI

j

0

0

OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

0

·3

-4

FIGURE 3

Vcc+
VCC-

IOS(L)
VI = 2 V

/

-t'I\I£ -L
I I..l

YO-Output Voltage-V

SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
15

f.- IrO i040

.!

FIGURE 2

E

2

VOH (VI - 0.8 V)

VI-Input Voltage-V



20

±15 V

= 2 V

__~__~__- L__- L_ _- L_ _~~
-40 - 20
0
20 40
60
80 100 120

-12L-~

20

40

60

80

100

120

TA - Free-Air Temperature - °C

TA - Free-Ai,r Temperature - °C

FIGURE 4

FIGURE 5

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-373

SN65C188, SN75C188
QUADRUPLE LOW-POWER LINE DRIVER
TYPICAL CHARACTERISTICS
POWER-OFF OUTPUT RESISTANCE
vs
FREE-AIR TEMPERATURE

INPUT CURRENT
vs
FREE-AIR TEMPERATURE
120
100

1\

VCC+
VCC-

'

80

i

30

-1~V

I

RL -

40

, r..... ~L

00

1

!to

20

IX

.

~

"
"1

Q.

-40

0

VCC+ - 5 V. VCC- - -5 V

=

=

- 3k1l 1

r

RL - 3 kO'RL - 7 kll-

SLEW RATE
10 (NEGATIVE
TRANSITION)

IX

II)

-80 _ICC

I

I

+1

VCC~

-40 -20

0

20

-":/2 V. VCC- - -12 V
40

60

80

100 120

o

-40

-20

T A - Free-Air Temperature - DC

0

20

40

60

80

T A - Free-Air Temperature -

FIGURE 8

FIGURE 9

TEXAS

~

INSTRUMENTS
2-374

I

"'i

J

iii

-g

tl - 120

II"

!:

0

I

I
~~~kl

>

Z

-

RAT~

~,

I

VI - 0.8 V or 2 V

.~
'iii

100 120

VCC+-12V
VCC-12V
SLE1
:EITIVE TRANSITION) - C l
15 pF

..

vcc+ - 5 V. VCC- - -5 V

~

&.

80

OUTPUT SLEW RATE
vs
FREE-AIR TEMPERATURE

.~

:

60

SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE

Q.

g>

40

FIGURE 7

Q.

Jl

20

FIGURE 6

Vcc+ - 12V'~fCICC+

0

TA - Free-Air Temperature - DC

TA - Free-Air Temperature - °C

()

2V

a

-40
-40-20

C

~I:

s

o
-20

1.I

--

....

~

20

1

=

450

I

~

Q.

VCC+ ; VCC- ; 0

c::

()

"
.E

500

12 V
-12 V

;

POST OFFICE BOX 655303 • DALLAS. TeXAS 75266

°c

100 120

SN65C188, SN75C188
QUADRUPLE LOW-POWER LINE DRIVER
TYPICAL CHARACTERISTICS
OUTPUT TRANSITION TIME
vs
FREE-AIR TEMPERATURE

PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
2

:t.
I

I
1.5

E
i=
>

;;'"
C

./.RL - 3 kll

f - - tPLH

r:

.2

...
''""

wo......

U)

1.5

.,

---

E
i=
r:

I
RL - 7 kll

·iii
r:

.J$

.Y~ CL

:t.
I

.g

CL -

~ ..

tTLH

- 2500 pF
tTHL-

I

I

15 pF

tTLH-

f!

lI

Co

£

~VCC- -

,RL-3kll

VCC+ - 12 V
VCC- - -12V
CL-15pF

tT~L

VCC+-12V
-12 V
RL - 3kOto7kO

I

1-":;;:-,..

U)

.,

2

-I-RL - 7 kll
tpHL

0.5

.':" 0.5

I

"C

.9-

o

- 40 - 20

0

20

40

60

80

T A - Free-Air Temperature -

0

100 1 20

o

-40 -20

0

20

40

60

80

T A - Free-Air Temperature -

C

FIGURE 10

100 120
0

C

FIGURE 11

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-375

SN65C1BL SN75C1BB
QUADRUPLE LOW·POWER LINE DRIVER
APPLICATION INFORMATION

=Qn__

.

0UTPUTTO RTL
-0.7VT03.7V

1/4 'C188

3V

....

=Qry
__

INPUT FROM
TTL.DTL.
OR CMOS

.
=Q-y-

oUTPUT TO DTL
-0.7VtoS.7V

1/4 'C188

5 V

....

.

-1/4 'C188

OUTPUT TO HNIL OR
10 V CMOS
-0.7 V TO 10 V

D---4"'W'-4_ _ 0UTPUT TO MOS
-10 V TO 0 V
10 kll
VCC+ - 12 V
VCC- - -12 V

FIGURE 12. LOGIC TRANSLATOR APPLICATIONS

TEXAS •

INSTRUMENTS
2-376

POST OFFICE -I
DA

160 !l
""VI...4~VI...4_- OUTPUT

L--~-~-~~-Vss

DY

-------~~~~~--~~--VSS

EQUIVALENT RECEIVER INPUT

EQUIVALENT RECEIVER OUTPUT

INPUT--....-.::J"v;;:.-~----.
RA

VCC

OUTPUT
RY
GND--~----~--~~~--

- -__--~- GND
All resistor values shown are nominal.

TEXAS . "

INSTRUMENTS
2-380

POST OFFICE BOX 866303 • DAllAS. TEXAS 75285

SN65C1154, SN75C1154
QUADRUPLE LOW·POWER DRIVERS/RECEIVERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD
Supply voltage, VSS
Supply voltage, VCC
Input voltage range:

(see Note 1) .......... ,. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1 5 V
...................................................... - 1 5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. VSS to VDD
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 V to 30 V
Output voltage range: Driver............................... (VSS - 6 V) to (VDD + 6 V)
Receiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.3 V to (Vce + 0.3 V)
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN65C1154 ........................ -40°C to 85°C
SN75C1154 ........................... 00Ct070oC
Storage temperature range ......................................... - 65 °e to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260°C

NOTE 1: All voltages are with respect to the network ground terminal.
DISSIPATION RATING TABLE

s 25°C

DERATING FACTOR

TA - B5°C

POWER RATING

ABOVE TA - 25°C

POWER RATING

OW

1125 mW

9.0 mW,DC

585 mW

N

1150mW

9.2 mW,DC

598 mW

PACKAGE

TA

recommended operating conditions
MIN

NOM

MAX

Supply voltage, VDD

4.5

12

15

V

Supply voltage, VSS

-4.5

-12

-15

V

Supply voltage, VCC

4.5

5

6

V

VDO
±25

V

Input voltage, VI
High-level input voltage. VIH
Low-level input voltage, VIL
High-level output current, IOH
Low-level output current, IOL ,
Operating free-air temperature, T A

Driver

VSS+2

Receiver

2

Driver
Receiver

UNIT

V

0.8
-1

mA

3.2

mA

SN65C1154

-40

85

SN75C1154

0

70

DC

TEXAS ~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-381

SN65C1154, SN75C1154
QUADRUPLE LOW·POWER DRIVERS/RECEIVERS
'driver section
electrical characteristics over operating free-air temperature range. Voo - 12 V. VSS Vee = 5 V ± 10% (unless otherwise noted)
PARAMETER

TEST CONOITIONS

High-level output voltage

VIL - 0.8 V, RL = 3 kll,
See Figure 1

Low-level output voltage

VIH = 2 V, RL = 3 kll,

(See Note 2)

See Figure 1

IIH

High-level input current

VI = 5 V, See Figure 2

IlL

Low-level input current

VI = 0, See Figure 2

laSH

output currenfl:

VOH
VOL

High-level short circuit
Low-level short circuit

IOSL
100

output current:l:

Supply current from VOO

ISS

Supply current from VSS

ro

Output resistance

VOO - 5 V,

VSS -

-5 V

VOO = 12 V, VSS = -12 V
VOO = 5 V, VSS = -5 V
VOO -12V,VSS- -12 V

-12 V.

MIN

TYpt

4

4.5

10

10.8
-4.4

-4

-10.7

-10

MAX

UNIT
V
V

1

-7.5

VI = 0.8 V, Va = 0 or VSS, See Figure 1

7.5

VI = 2 V, Va = 0 or VOO, See Figure 1
No load,

VOO = 5 V,

All inputs at 2 V or 0.8 V

VOO = 12V,VSS = -12V

No load,

VOO = 5 V,

All inputs at 2 V or 0.8 V

VOO=12V,VSS= -12V

VOO - VSS = VCC - 0, Va -

VSS = -5V
VSS= -5V

-2 V to 2 V, See Note 3

300

-1

p.A
p.A

-12 -19.5

mA

12

19.5

115

250

115

250

-115

-250

-115

-250

mA
"A
p.A

II

400

t All typical values are at T A = 25°C.
:l:Not more than one output should be shorted at one time.
NOTES: 2. The algebraic convention, where the more positive (less negative) limit is designated as maximum. is used in this data sheet
for logic levels only.
3. Test conditions are those specified by EIA-232-0.

switching characteristics at TA .. 25°e. VOO .. 12 V. VSS .. -12 V. Vee
PARAMETER

TEST CONDITIONS

tpLH

Propagation delay time, low-to-high level outputS

tpHL

Propagation delay time, high-to-Iow level outputS

trLH

Transition time, low-to-high level output~

trHL

Transition time, high-ta-Iow level output'

tTLH

Transition time, low-ta-high level output#

MAX

1.2

3

2.5

3.5

0.53

2

3.2

0.53

2

3.2

1

2

1

2

10

30

RL = 3 to 7 kll,
CL=15pF,
See F.igure 3

5 V ±10%
TYP

MIN

RL = 3 to 7 kll,

UNIT
p.S

".
".
p..

p..

CL = 2500 pF,
tTHL

Transition time, high-to-Iow level output#

See Figure 3

p.S

RL = 3 to 7 kll,
SR

Output slew rate

CL = 150 pF,

4

V/p.S

See Figure 3
§tPHL and tPLH include the additional time due to on-chip slew rate and are measured at the 50% points.
, Measured between 10% and 90% pOints of output waveform.
#Measured between 3 V and - 3 V points of output waveform (EIA-232-0 conditions) with all unused inputs tied either high or low.

TEXAS ."

2-382

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TEXAS 75265

SN65C1154, SN15C1154
QUADRUPLE LOW-POWER DRIVERS/RECEIVERS
receiver section
electrical characteristics over operating free-air temperature range. Voo '"' 12 V. VSS '"' -12 V.
Vee - 5 V ± 10% (unless otherwise noted)
MIN

Typt

MAX

UNIT

See Figure 5

1.7

2.1

2.55

V

See Figure 5

0.65

1

1.25

600

1000

PARAMETER
Positive-going
VT+

threshold voltage
Negative-going

VT-

threshold voltage

Vhvs

Input hysteresis +

VOH

High-level output voltage

TesT CONDITIONS

VI

= 0.75

V, 10H

=

- 20

VI

= 0.75

V, IOH

=

-1 mA,

Low-level output voltage

IIH

High-level input current

IlL

Low-level input current
Short-circuit output

IOSH

at high level

VI

=
=
=
=
=

VI

= 0.75

VI

=

VI
VI
VI
VI

Short-circuit output

IOSL
lee

current at low level
Supply current from Vee

See Figure 5 and Note 4

I Vee = 4.5 V
'I Vee = 5 V
I Vee = 5.5 V

See Figure 5
VOL

~A,

= 3.2

3.5
2.8

4.4

3.8

4.9

4.3

5.4

V

0.17

0.4

3.6

4.6

8.3

3 V

0.43

0.55

1

-25V

-3.6

-5

-8.3

3 V, IOL

mA, See Figure 5

25 V

-3 V
V, Vo

Vee, Vo

=

=

I VDD = 5 V, VSS =
I VDD = 12 V, VSS =

mA

-1

-8

-15

mA

13

25

mA

400
400

600
600

~A

Vee, See Figure 4

No load,

V

-0.43 -0.55
0, See Figure 4

All inputs at 0 or 5 V

V
mV

-5 V
-12 V

t All typical values are at T A = 25°e.
~Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going input threshold voltage, VT _ .
NOTE 4: If the inputs are left unconnected, the receiver interprets this as an input low and the receiver outputs will remain in the high state.

switching characteristics at TA - 25°e. VOO = 12 V. VSS '"' -12 V. Vee - 5 V ± 10% (unless
otherwise noted)
PARAMETER

TEST CONDITIONS

tpLH

Propagation delay time, low-ta-high level output

tpHL

Propagation delay time, high-to-Iow level OUtput

eL

tTLH

Transition time, low-ta-high level output§

See Figure 6

trHL
tw(NI

Transition time, high-ta-Iow level output§
Duration of longest pulse rejected as noise'

eL

=

=

50 pF, RL

50 pF, RL

=

=

MIN

5 kll,

5 kll

1

UNIT

TYP

MAX

3

4

3

4

~

300

450

ns

100

300

ns

4

~s

~s

§Measured between 10% and 90% points of output waveforms.
'The receiver ignores any positive- or negative-going pulse that is less than the minimum value of tw(N) and accepts any positive- or negativegoing pulse greater than the maximum of tw(NI'

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 655303 •

O~LlAS.

TEXAS 75265

2-383

SN65C1154, SN75C1154
QUADRUPLE LOW·POWER DRIVERS/RECEIVERS
PARAMETER MEASUREMENT INFORMATION
.. IOSL

--

{nr V~

"T. VI

III ISOL

VCC

lL

VSS ":'

VSS '::'

FIGURE 4. RECEIVER TEST CIRCUIT. laSH. IOSL

":,IOLl

IOH

'::'

FIGURE 5. RECEIVER TEST CIRCUIT. VT. VOL. VOH

TEXAS . . ,
INSTRUMENTS
2-384

i-

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN65C1154, SN75C1154
QUADRUPLE LOW·POWER DRIVERS/RECEIVERS

PARAMETER MEASUREMENT INFORMATION

INPUT~50%

Vee

50~------:~

I

tpHL

I

I+---+f- tpLH

-1+---+1

L'

_ _ _ _.".1
OUTPUT
VSS

I

90%T\;1
I
50%
50%
I
10%
10%
I I\o".;.;~_ _ _---'';;';';'~

-= -=

tTHL......

TEST CIRCUIT

I

90%

L - -+I i+ tTLH

i+-

V

OH
VOL

VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: tw
B. CL includes probe and jig capacitance.

=

25

~s,

PRR

=

20 kHz, 20

=

50

n,

tr

= tf <

50 ns.

FIGURE 6. RECEIVER PROPAGATION AND TRANSITION TIMES

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-385

2-386

SN65C1406, SN75C1406
TRIPLE LOW-POWER DRIVERS/RECEIVERS
03425. MAY 1990

•

Meets Standard EIA-232-D (Revision of
RS-232-C)

•

Very Low Power Consumption ... 5 mW
Typ

•

Wide Driver Supply Voltage ... ±4.5 V to
±15 V

•

Driver Output Slew Rate Limited to 30 Vlp.s
Max

•

Receiver Input Hysteresis ... 1000 mV Typ

•

Push-Pull Receiver Outputs

•

On-Chip Receiver 1-p.s Noise Filter

•

Functionally Interchangeable with Motorola
MC145406

o OR N PACKAGE
(TOP VIEWI
VOO
lRA
lOY
2RA
20Y
3RA
30Y

Vee
lRY
lOA
2RY
20A
3RY
30A
GNO

VSS

logic symbol t
1RA
2RA
3RA

•

ESD Protection Exceeds 2000 V Per MILStd-883C Method 3015
description

10Y
20Y
30Y

The SN65C1406 and SN75C1406 are lowpower BI-MOS devices containing three
independent drivers and receivers that are used
to interface data terminal equipment (DTE) with
data circuit-terminating equipment (DCE). This
device is designed to conform to Standards
ANSI/EIA-232-D-1986 (which supersedes
RS-232-C). The drivers and receivers of the
SN65C1406 and SN75C1406 are similar to
those of the SN75C 188 quadruple driver and
SN75C189A quadruple receiver, respectively.
The drivers have a controlled output slew rate
that is limited to a maximum of 30 V/p.s and the
receivers have filters that reject input noise
pulses of shorter than 1p.s. Both these features
eliminate the need for external components.

2

15

.II

4

13
11

6
3

14

c>------- RY

typical of each driver
(31. (51, (71
DY-----OC

(141, (121. (101

I-------DA

The SN65C1406 and SN75C1406 have been
designed using low-power techniques in a BIMOS technology. In most applications, the
receivers contained in these devices interface to
single inputs of peripheral devices such as ACEs,
UARTs, or microprocessors. By using sampling,
such peripheral devices are usually insensitive to
the transition times of the input signals. If this
is not the case, or for other uses, it is
recommended that the SN65C1406 and
SN75C1406 receiver outputs be bufferlld by
single Schmitt input gates or single gates of the
HCMOS, ALS, or 74F logic families.
The SN65C 1406 is characterized for operation
from -40°C to 85°C. The SN75C1406 is
characterized for operation from OOC to 70°C.
PRODUCTIOI DATA d.cu...nll c.ntain in'.rmallon
c.".nl H of publication dlte. Products conform 10
spacHicatlo.. par tho term. of T.... Instrum.nts

=~~i~"i:l:.7i ~=:~:r :rlo:::~:I:::'~

nDt

Copyright © 1990, Texas Instruments Incorporated

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 15266

2-387

SN65C1406, SN75C1406
TRIPLE LOW·POWER DRIVERS/RECEIVERS
schematics of inputs and outputs
EQUIVALENT ORIVER INPUT

EQUIVALENT DRIVER OUTPUT
----.-------~--~------~---VDD

--------.--------VDD

INTERNAL

INPUT--,.......,j
DA

160 n
.-v~~~_- OUTPUT

DY

--------~--~~~~~-----4~--Vss

EQUIVALENT RECEIVER INPUT
3.4 kll
INPUT---._--......I V \ , - - _ _ 4 t _ - - - - .
RA

EQUIVALENT RECEIVER OUTPUT

Vee

OUTPUT
RY

GND---~--------~----_4~~--

- - -...- - - -....- - GND
All resistor values shown are nominal.

TEXAS ."

2·388

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN65C1406, SN75C14D6
TRIPLE LOW-POWER DRIVERS/RECEIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD
Supply voltage, VSS
Supply voltage, VCC
Input voltage range:

(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 15 V
. . . . . . . . . . ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. VSS to VDD
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 V to 30 V
Output voltage range: Driver.....
.. .. . .. ... .
.. (VSS - 6 V) to (VDD + 6 V)
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.3 V to (VCC + 0.3 V)
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN65C1406 . . . . . . . . . . . . . . . . . . . . . . . . - 40°C to 85 °C
SN75C1406 . . . . . . . . . . . . . . . . . . . . . . . . . . . O°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . .. 260°C
NOTE 1: All voltages are with respect to the network ground terminaL

DISSIPATION RATING TABLE
PACKAGE

TA '" 25°C
POWER RATING

D

950 mW

N

1150 mW

DERATING FACTOR
ABOVE TA - 25°C
7.6 mW/oC
9.2 mW/oC

TA = 85°C
POWER RATING
494 mW
598 mW

recommended operating conditions
MIN

NOM

MAX

Supply voltage, VDD

4.5

12

15

Supply voltage, VSS

-4.5

-12

-15

V

Supply voltage, VCC

4.5

5

6

V

VDD
±25

V

Input voltage, VI
High-level input voltage, VIH
Low-level input voltage, VIL
High-level output current, IOH
Low-level output current, IOL

Operating free-air temperature, T A

Driver

VSS+2

Receiver

2

Driver

0.8

Receiver

UNIT
V

V

-1

mA

3.2

mA

SN65C1406

-40

85

SN75C1406

0

70

°c

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-389

SN65C1406, SN75C1406
TRIPLE LOW-POWER DRIVERS/RECEIVERS
driver section
electrical characteristics over operating free-air temperature range,
Vee = 5 V ± 10% (unless otherwise noted)
PARAMETER

TEST CONOITIONS

VOH

High-level output voltage

VIL = 0.8 V, RL
See Figure 1

VOL

Low-level output vOltage
(See Note 2)

VIH = 2 V, RL - 3 kll,
See Figure 1

High-level input current

VI

Low-level input current

VI

IIH
IlL

High-level short circuit
IOSH

output current*
Low-level short circuit

IOSL

output current:f:

=

3 kll,

VOO
VOO
VOO
VOO

VI

= 5 V, See Figure 2
= 0, See Figure 2
= 0.8 V, Vo = 0 or VSS,

VI

=

2 V, Vo

=0

Supply current from VOO

ISS

Supply current from VSS

No load,
All inputs at 2 V or 0.8 V

ro

Output resistance

VOO

=
=
=
=

VSS
12V,VSS
5 V, VSS

=

12V,VSS

=

5 V,

=
=

-5 V
-12 V
-5 V
-12 V

= VSS = VCC = 0,

Vo

VOO

= 5 V,

VOO
VOO
VOO

=

=
=

12 V,

=
=
=
=

TYpt

4
10

4.5
10.8
-4.4
-10.7

-5 V
-12 V
-5 V
-12V

See Note 3

vss

MIN

7.5

VSS
12 V, VSS
5 V, VSS
12 V, VSS

= - 2 V to 2 V,

=

-7.5

See Figure 1

or VOO, See Figure 1

No load,
All inputs at 2 V or 0.8 V

100

Voo

300

-12 V,

MAX

UNIT
V

~4

V

-10
1
-1

~A

-12 -19.5

mA

12

19.5

115
115
-116
-115

250
250
-250
-250

~

mA
~
~A

Il

400

t All typical values are at T A = 25°C.
~Not more than one output should be shorted at one time.
NOTES: 2. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet
for logic levels only.
3. Test conditions are those specified by EIA-232-0.

switching characteristics at T A

=

25°e, VOO

tpLH

PARAMETER
Propagation delay time, low-to-high level output §

tpHL

Propagation delay time, high-to-Iow level output 9

tTLH

Transition time, low-to-high level output'

tTHL

Transition time, high-to-Iow level output'

tTLH

Transition time, low-to~high level output#

tTHL

Transition time, high-to-Iow level Qutput#

SR

Output slew rate

12 V, VSS -

-12 V, Vee -= 5 V ±10%

TEST CONDITIONS

MIN

CL

= 15 pF,

See Figure 3

MAX

UNIT
~

2.5
0.53

2

3.2

~

0.53

2

3.2

~

1

2

~s

1

2

~s

10

30

RL = 3 to 7 kll,
CL = 2500 pF,
See Figure 3
RL = 3 to 7 kll,
CL = 150 pF,
See Figure 3

TYP
1.2

3
3.5

RL = 3 to 7 kll,

4

~s

V/~s

§tPHL and tpLH include the additional time due to on-chip slew rate and are measured at the 50% points.
'Measured between 10% and 90% points of output waveform.
#Measured between 3 V and - 3 V points of output waveform (EIA-232-0 conditions) with all unused inputs tied either high or low.

TEXAS ..".

2-390

IN~UMENTS

POST OFFICE BOX 656303 • DALlAS, TEXAS 15286

SN65C1406, SN75C1406
TRIPLE LOW-POWER DRIVERS/RECEIVERS

receiver section
electrical characteristics over operating free-air temperature range. Voo = 12 V. Vss
Vee = 5 V ± 10% (unless otherwise noted)
MIN

Typt

MAX

UNIT

See Figure 5

1.7

2.1

2.55

V

See Figure 5

0.65

1

1.25

600

1000

PARAMETER
Positive-going
VT+

threshold voltage
Negative-going

VTVhvs

threshold voltage

TEST CONDITIONS

Input hysteresis.:I:

VI = 0.75 V, IOH = - 20
VOH

High-level output voltage

VI = 0.75 V, IOH = -1
See Figure 5

VOL

Low-level output voltage

IIH

High-level input current

IlL

Low-level input current

Short-circuit output
IOSH

at high level

Short-circuit output
IOSL
ICC

current at low level
Supply current from Vee

-12 V.

~A,

I
mA

See Figure 5 and Note 4

'I Vee
I Vee

3.5
2.8

4.4

= 5 V

3.8

4.9

= 5.5 V

4.3

5.4

Vee - 4.5 V

V
mV

V

0.17

0.4

3.6

4.6

8.3

VI = 3 V

0.43

0.55

1

VI = -25 V

-3.6

-5

-8.3

-0.43 -0.55

-1

-8

-15

mA
mA

VI = 3 V, IOL = 3.2 mA, See Figure 5
VI = 25 V

VI = -3 V
VI = 0.75 V, Vo = 0, See Figure 4
VI = Vee, Vo = Vee, See Figure 4
No load,
All inputs at 0 or 5 V

I
I

VOO = 5 V, VSS = -5 V
VOO = 12 V, VSS = -12 V

13

25

320

450

320

450

V

mA

~A

t All typical values are at T A = 25°C.
'Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going input threshold voltage, VT _.
NOTE 4: If the inputs are left unconnected, the receiver interprets this as an input low and the receiver outputs will remain in the high state.

switching characteristics at TA = 25°e. VOO = 12 V. VSS = -12 V. Vee'" 5 V ± 10% (unless
otherwise noted)
PARAMETER

TEST CONDITIONS

tpLH

Propagation delay time, low-ta-high level output

tpHL

Propagation delay time, high-to-Iow level output

eL = 50 pF, RL = 5 k[J,

tTLH

Transition time, low-ta-high level output§

See Figure 6

tTHL

Transition time, high-ta-Iow level output§

twlNI

Duration of longest pulse rejected as noise ~I

eL = 50 pF, RL = 5 kll

MIN

1

UNIT

TYP

MAX

3

4

3

4

~s

300

450

ns

100

300

ns

4

~s

~s

§Measured between 10% and 90% paints of output waveforms.
'The receiver ignores any positive- or negative-going pulse that is less than the minimum value of tw(N) and accepts any positive- or negativegoing pulse greater than the maximum of tw(N)'

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

2-391

SN65C1406, SN75C1406
TRIPLE LOW-POWER DRIVERS/RECEIVERS
PARAMETER MEASUREMENT INFORMATION
,.IOSL

------....

(3) INVERTING
DRIVER OUTPUT,
DRO-

~

+ _________c{""..........

DRIVER DATA.:..(1;.:5"')_ _ _
ENABLE, DATEN

}-_____....__.J

DRIVER DELAY (13)
ENABLE, OLEN

DRIVER DELAY
ADJUST, DRDLAJ

~CT

NON INVERTING
RECEIVER (5)
INPUT, RXI+ ..:..:.;'--.-""'......--1--1.......

RECEIVER
+ ....WY+__....~/ >------------------------Ir........ (12) MAIN
OUTPUT, RXO

INVERTING .;.(6:.;)__
RECEIVER INPUT, RXI-

):>______.:..(1:..;1"-) SQUELCH
OUTPUT, SQO

SQUELCH RECEIVER (7)
THRESHOLD ":':"'4---.;vv-"
ADJUST, SOTHAJ

(9)

SQUELCH
RECEIVER
OUTPUT,
SQRX,O

(101
SQUELCH
DELAY
INPUT,
SQDU

SQUELCH
DELAY
ADJUST,
SQDLAJ

TEXAS •
INSTRUMENTS
2-396

POST OFFICE BOX 865303 • DALLAS, TEXAS 75265

SN75061
DRIVER/RECEIVER PAIR WITH SQUELCH

logic symbol t
ORI

13
OROLAJ

RXI-

L
I'...

1
15

RXI+

I>

14

JL

SQRXO

EN

",r--.

1

r-....

Z1

2

Z2

1

1

J

I>

J

I>

ORO-

3

12

RXO

[AOJTHRES]
./

,,1

10

CI>
SQOLAJ

3

ORO+

1

.IT
SQOll

'"

.f'-...

7
9

2

>

-

2
SQTHAJ

",1

[ADJOEl]

5

6

&

4

JL

11
V3

SQO

[AOJOEl]

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and lEG Publication 617-12.

description
The SN75061 is a single-channel driver/receiver pair designed for use in IEEE 802.3, 1BASE5 applications
as well as other general data communications circuits. The SN75061 offers the system deSigner both a
driver and a receiver that are easily configured for use with a variety of controllers and data
encoder/decoders.
The receiver features a full analog squelch circuit with an adjustable threshold and a programmable squelch
delay. Internal nodes of the squelch circuitry are brought out to external connections to allow for the insertion
of noise filtering circuitry of the designer's choice.
As with the receiver, the driver offers the user a variety of implementation options. Driver enabling may
be controlled directly by an external logic input, or by use of an on-chip one-shot that is retriggered as
long as data is being sent to the driver. The driver will then automatically go to the high-impedance state
when end-of-packet occurs. The driver features internal slew-rate control for optimal matching of rise and
fall times allowing for reduction of driver-induced jitter.
receiver
The SN75061 receiver implements full analog squelch functions by integrating both a separate, parallel
squelch receiver with an externally programmable threshold, and a programmable one-shot. The output
of the squelch receiver and the input to the high-level dc-triggered one-shot are brought out to external
connections. These pins can be shorted for direct implementation, or used for the insertion of noise-filtering

. TEXAS'"
INSIRUMENlS
POST OFFICE BOX 866303 • DAUAS. TEXAS 76285

2-397

SN75061
DRIVER/RECEIVER PAIR WITH SQUELCH
circuitry of the implementer's design. The receiver one-shot can be effectively bypassed by applying a
high logic level to Squelch Delay In. The squelch threshold may be set externally by applying an external
voltage set to a level that is - 2 times the desired threshold voltage. If Squelch Threshold Adjust is left
open, the squelch receiver" will default to its internal preset value of - 600 mV. The receiver also outputs
a high logic "squelch" signal when there is no active data present at the receiver inputs. When no data
is present on the transmission line, the receiver output assumes a high level. The "unsquelch" duration
is set externally with an R-C combination at Squelch Delay Adjust.
driver
The driver offers the user a variety of implementation options. Driver enabling may be controlled directly
by an active-low external logic input on Data Enable, or by use of another on-chip one-shot that retriggers
with positive-going transitions on the driver input line. If no positive transition occurs within the pulse
duration set by an external R-C combination, the one-shot times out and the driver is automatically put
into a high-impedance state. When operating in the deray-enable mode, the 2-bit-time high-level start-ofidle pulse prescribed by IEEE 802.3 1 BASE5 causes the one-shot to time out and automatically place the
driver outputs in the high-impedance state. This delay time is also adjustable for use in other applications.
The driver implements an output slew-rate control that is internally set for nominally 40 mV/ns. (This is
roughly a 100-ns peak-to-peak differential transition time.) The driver outputs are capable of driving a 50-0
differential load with a minimum output level of 2 V. Short-circuit output current is greater than 100 mAo

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage (any logic input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Receiver differential input voltage .......... ~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 25 V
Receiver input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 1 5 V
Driver output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.5 V to 1 5 V
Continuous total dissipation at (or below) 25 °c free-air temperature (see Note 1). . . . . .. 11 50 mW
Operating free-air temperature range ...................................... ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260°C
NOTE 1: For operation above 25°C free-air temperature. derate to 736 mW at 70°C at the rate of 9.2 mW/oC.

recommended operating conditions
Supply voltage. VCC
Driver high-level input voltage, VIH

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

2

Driver low-level input voltage, VIL

V
0.8

Driver high-level output current. IOH
Driver low-level output current, tOl
Receiver common-mode input voltage. VIC (see Note 2)

External tim.ing resistance, Rext

External timing capacitance, Cext

V

-150

mA

150

mA

-2.5

5

5

260

V
kll

No restriction

Operating free-air temperature, TA

0

70

°c

NOTE 2: The algebraic convention, in which the less positive (more negative) limit is designated as minimum. is used in this data sheet
for common-mode input voltage VIC and threshold levels VTH and VTL.

TEXAS . "

2-398

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 76266

SN75061
DRIVER/RECEIVER PAIR WITH SQUELCH
electrical characteristics over recommended operating free-air and supply voltage range (unless
otherwise noted)
driver
PARAMETER
V,K
VOD

MIN

TEST CONDITIONS
" ~ -18mA
RL ~ 500

Input clamp voltage

Differential-output voltage

2

Typt
2.4

UNIT
V

3.3
3.65

V

RL

~

50

mV

~

2.4 V

20

~A

~

0.5 V

-35

~A

±300

rnA

1150

Change in differential-output voltage

"VOD

MAX
-1.5

for a change in logic input state

"H
',L
lOS

High-level input current

V,

Low-level input current

V,

Short-circuit output current

Va

10Z

High-impedance output current

Vee

~

0 or 6 V,
~

5.25 V

V,

0.8 V or 2.5 V

~

I Voe
I Voe

±100

~ 10 V

100

~ 0

-100

~A

receiver
PARAMETER

TEST CONDITIONS

V,K

Input clamp voltage, squelch delay

VTH

Differential-input high-threshold voltage
Differential-input low-threshold

Vn
Vhvs
Vie

Va

voltage Isee Note 21

High-level output voltage

Low-level output voltage

Vee ~ 4.75 V,
SODLAJ at 0.8 V

sao

sao
SORXO

High-level input current
Low-level input current

SODU

~

VTLlsql

~

-0.4 rnA

'0

~

16 rnA

50
-50

Short-circuit output current

sao

10H

~

-400

~A,

4.75 V,

VIDIRXI) ~ 50 mV
V, ~ 2.4 V
V, ~ 0.5 V
Vee

SORXO

'I

'0

10H ~ -20 ~A,
V,DIRXII ~ -0.7 V, SODLAJ open
10L ~ 8 rnA
Vee ~ 4.75 V,
10L ~. 16 rnA
SODLAJ at 2 V
10L ~ 8 rnA
Vee - 4.75 V,
'OL - 8 rnA
Vee

RXO
lOS

MAX
-1.5

~

5.25 V,

Vee - 5 V,

10L

Va

~

~

2.7

3.5

2.7

4.65

mV

V

0.5
0.35

0.5

threshold voltage

SOTHAJ OPEN,

5 V,

V

0.45
0.5

-15

20

~A

-35

~A

-85

-15

-100
-1.2

rnA

-675

mV

Vie ~ -2.5 V to 1.5 V
-500
or 3.5 V to 5 V

-700

mV

-1.9

-2.1

Va - 0

-0.8

-1

Vie ~ 1.5 V to 3.5 V

-525

-600

kO

10
~

Vee

V

0.45

Input resistance
Squelch preset

V
mV

2.7

16 rnA

0

UNIT

mV

5

RXO

"H
',L

0.5 V,

Typt

50

SORXO

VOL

~

MIN

Hysteresis IVTH - Vnl
Common-mode input voltage
RXO

VOH

" ~ -18mA
Va ~ 2.7 V,

Ratio of Squelch Threshold Adjust
input voltage to actual squelch

SOTHAJ at 200 mV to 4 V

threshold voltage

I

driver and receiver
lee

Supply current

Vee

~

5.25 V,

Driver outputs disabled,

No loads

70

t All typical values are at Vee ~ 5 V, TA ~25°e.
NOTE 2: The algebraic convention, in which the less-positive (more negative) limit is designated as minimum, is used in this data sheet
for common-mode. input voltage Vie and threshold levels VTH and Vn.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-399

SN75061

DRIVER/RECEIVER PAIR WITH SQUELCH
switching characteristics, Vee '. 5 V, TA - 25°e
driver
PARAMETER
SR

TEST CONDITIONS

Differential-output slew rate
Differential-output delay time

too

(too + and too -)
Differential-output delay time

tDD+ -tDD-

..!e!:!L
tpLZ

~
tpZL

= -2Vto2V,
= 1000 (differential),

See Figure 1

Cl - 15 pF,
RL = 100 0 (differential),

Sea Figure 2

Vo
RL

RL

difference

=

100 0 (differential),

MIN

TYP

MAX

UNIT

28

40

52

mV!ns

160

ns

5

ns

See Figure 2

Disable time from DATEN
See Figures 3, 4, and 5

Enable time from DATEN
Enable time from OLEN

tpZH

Enable duration time
tw(en)

Cext

(with is[EN lowl

=

100 pF,

Rext

=

62 kO,

See Figure 6

220

ns

300

.ns

220

ns

290

ns

250

ns
p.S

2

2.5

3

MIN

TYP

MAX

receiver
PARAMETER

TEST CONDITIONS

UNIT

ten(RX)
tpLH

Receiver enable time

Squelch off,

See Figure 7

117

Propagation delay time, low-to-high-Ievel output

Squelch off,

See Figure 8

20

35

ns

tpHL

Propagation delay time, high-to-Iow-Ievel output

Squelch off,

See Figure 8

22

35

ns

Cext = 50 pF,
See Figure 9

Rext

=

51 kO,

1.2

1.45

/Ls

Cext = 15 pF,
See Figure 9

Rext

=

6.8 kO,

180

ns

t unsq

Unsquelch duration time

1

ns

PARAMETER MEASUREMENT INFORMATION
5V
Rext - 62 kO
DRDLAJ

--3V

~

~Cext - 100 pF

OLEN at 3 V - - - - - ,

INPUT

OV
t-"'-~r-DRO+

OUTPUT
r>--+--"'--DRO -

OUTPUT- _ _

J- ____~2::"

Ir-+!
DATEN at 0.5 V

--0 V

~~I

I

-

--2V

14-S R -4 -V- -+I If- If
tr or tf

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 1. DRIVER SLEW RATE MEASUREMENTS
NOTE A: The input pulse is supplied by a generator having the following characteristics: PRR s 1 MHz, Duty Cycle s 50%, tr s6 ns,
tfs 6 ns, Zout = 50 O.

TEXAS ."

INSTRUMENTS
2-400

POST OFFICE BOX 656303 .. DALLAS. TEXAS 75265

SN75061
DRIVER/RECEIVER PAIR WITH SQUELCH

PARAMETER MEASUREMENT INFORMATION
5V

DLEN at 3 V

____D,"I 1-=R::~t__

6:0:apF

...J...

Sl

2

~;5~3V

INPUT

4

~ ._-

f=:=--"'---<"":"'~2"'o)q~o~~'M

tDD + t..+j

~

CL - 15 pF
(See Note B)
TEST CIRCUIT

14- tDD _ t

~

+--VO+

~

DUTPUT
DATEN at 0.5 V

I+-

~ov

50%

VO-

PE-64352
OR EQUIVALENT
(See Note D)

tSl and S2 open
VOLTAGE WAVEFORMS

FIGURE 2. DRIVER DIFFERENTIAL DELAY TIMES
5V

Rext - 62 kQ
DRDLAJ

OLEN at

3 V-----,

~
I
+---OV

3V

INPUT
DRI at 0 V or 3 V

1.5 V

tpzHH

RL 100 Q

OUTPUT

1.5 V

tPHZ~

0.5 V

.:t-VOH

-f
~
2.3 V

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 3. DRIVER ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR :5 1 MHz, Duty Cycle .s:: 50%,
tr .s:: 6 n5, tf ::= 6 n5, Zout = 50 n.
B. CL includes probe and jig capacitance.
C. The input pulse is supplied by a generator having the following characteristics: PRR ::s: 500 kHz, Duty Cycle :s:: 50%,
tr :::; 6 n5, tf ::s:: 6ns, Zout = 50 n.
D. When measuring differential-output delay time difference. switches 51 and S2 are closed. (Isolation transformer from Pulse
Engineering PIN PE·64352).

TEXAS .."
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-401

SN75061
DRIVER/RECEIVER PAIR WITH SQUELCH
PARAMETER MEASUREMENT INFORMATION
5V
Rext

=

62 k!l

DRDLAJ

~

DLEN at 3 V - - - - ,

1.5V

INPUT

~---OV

I

oV

DRI at
or 3 V

I

~~~~~-OUTPUT

tPZL~

I+-

I

If-

tPLZ~

I

OUTPUT

3V

1.5V

I
I

~
i.

=5V

2.3 V

-";f

-VOL

0.5 V

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 4. DRIVER ENABLE AND DISABLE TIMES
5V
Rext - 62 k!l

DLEN at 0.5 V - - - . . ,

\

:J.

DRDLAJ

I

INPUT

~ Cext - 100 pF

1.5 V

!+-

'---OV
tPZH

"'O-'--4I~OUTPUT

RL =
100 !l

---3V

\

1
---VOH

OUTPUT

~
2.3 V

"
--=OV

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 5. ENABLE TIMES FROM DELAY ENABLE
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR :5 200 kHz, Duty Cycle :5 50%,
tr ;$; 6 ns, tf :s 6 ns, Zout = 50 O.
B. CL includes probe and jig capacitance.
C. The input pulse is supplied by a generator having the following characteristics: PRR :5 1 MHz, Duty Cycle :5 50%, tr ::;;6 ns,
t!" 6 ns, Zout = 50 n.

~

TEXAS
INSTRUMENTS
2-402

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN75061
DRIVER/RECEIVER PAIR WITH SQUELCH
PARAMETER MEASUREMENT INFORMATION
5V
Rext - 62

kn

DRDLAJ
OLEN at 0.5 V - - - . . ,

RL =
100 n

DATEN at 3 V
TEST CIRCUIT

I4'--tw(en)~

0.5 V

Li_VOH

~
'f

OUTPUT

2.3 V

.

ov
VOLTAGE WAVEFORMS

FIGURE 6. ENABLE DURATION TIME WITH DELAY ENABLE LOW
5V
Rext - 51

kn

SODLAJ

INPU~1.5V 1.5V~3V

~Cext - 50 pF

,

~---OV

~
1.5 V_-",R",XI;..--a

~~~e--IOUTPUT

OUTPUT

if-ten(RX)

~
1.3 V

VOH

1.3 V

-

OPEN---~/

-

-VOL

SOTHAJ

SORXO

SODLI
VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 7. RECEIVER ENABLE (UNSQUELCHI TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR S 500 kHz, Duty Cycle s 50%,
tr S 6 ns, tf S 6 ns, Zout = 50 II.
B. CL includes probe and jig capacitance.
C. The input pulse is supplied by a generator having the following characteristics: PRR s 200 kHz, Duty Cycle s 50%, tr s6 ns,
tfs 6 ns, Zout = 50 II.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 866303 • DALLAS. TeXAS 75285

2-403

SN75061
DRIVER/RECEIVER PAIR WITH SQUELCH
PARAMETER MEASUREMENT INFORMATION
.
5 V
SODLAJ
Rext - 51 kll

--3V

~
1.5 V
1.5 V
.

INPUT

I

~C8xt - 50 pF

tPLH--I

I
~

OV

~

tPHL-+!

+--VOH

1.5 V,_......:R.:,:X::,I:;-d

"">"':':'::~

__-OUT~UT

OUTPUT

~
1.3V

1.3V

VOL

OPEN SOTHAJ

3V
TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 8. RECEIVER PROPAGATION DELAY TIMES
5V
Rext - 51 kll
SODLAJ

1.5 V
1.5 V
.
~

3V

INPUT

~Cext - 50 pF

~--OV

~

t unsq -+!
RXO

1.5 V----!;:!!!.::.cI
OPEN -

OUTPUT

~
1.3V

___.,..,...,,......~

VOH

1.3V

- - -VOL
L-_-=S:::O=.O_OUTPUT

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 9. UNsaUELCH DURATION TIME
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR s 1 MHz. Duty Cycle s 50%. tr S 6 ns,
tf s 6 ns, Zout = 50 D.
B. CL includes probe and jig capacitance.
C. The input pulse is supplied by a generator having the following characteristics: PRR s 100 kHz, Duty Cycle s 50%,
tr S 6 ns, tf s 6 ns, Zout = 50 D.

TEXAS .."

INSTRUMENTS
2-404

POST OFFICE BOX 655303 • DALLAS, TI:XAS 75265

SN75123

DUAL LINE DRIVER
01322. SEPTEMBER 1973-REVISEO SEPTEMBER 19B6

•

Meets IBM System 360 Input/Output
Interface Specifications

O. J. OR N PACKAGE
(TOP VIEW)

•

Operates from Single 5-V Supply

•

TTL Compatible

1A
18
1C
1D
1E
1F

•

3.11-V Output at IOH -

•

Uncommitted Emitter-Follower Output
Structure for Party-Line Operation

- 59.3 mA

•

Short-Circuit Protection

•

AND-OR Logic Configuration

•

Designed for Use With Triple Line Receiver
SN75124

1Y

GND

FUNCTION TABLE
INPUTS

OUTPUT

0 E F
H H H H X X
X X X X H H
All other input

V

A

•

VCC
2F
2E
2D
2C
28
2A
2Y

Designed to Be Interchangeable With
Signetics N8T23

description

B

C

combinations

The SN75123 dual line driver is specifically
designed to meet the input/output interface
specifications for IBM System 360. It is also
compatible with standard TTL logic and supply
voltage levels.
The low-impedance emitter-follower outputs of
the SN75123 will drive terminated lines such as
coaxial cable or twisted pair. Having the outputs
uncommitted allows wired-OR logic to be
performed in party-line applications. Output
short-circuit protection is provided by an internal
clamping network that turns on when the output
voltage drops below approximately 1.5 V. All the
inputs are in conventional TTL configuration and
the gating can be used during power-up and
power-down sequences to ensure that no noise
is introduced to the line.

H
H

L

H = high level
L = low level
X = irrelevant

logic symbol t
&
lA (1)
lB (2)
(3)
lC
lD (4)

'" 1 C>

(7) IV

IE (5)

&

IF' (6)
2A (10)
2B (11)
2C
20
2E

The SN7 5123 is characterized for operation from
ooe to 70 oe.

2F

(12)

(9) 2V

(13)
(14)
(15)

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 ano
IEC Publication 617-12.

logic diagram. each driver (positive logic)
A_--.JI--.....

B
C
O--'L...
__
V

E
F---'L.. __~

PRODUCTION DATA d...mlHllJ .ontain information
current as at publication data. Products conform to
specifications par the terms of Taxas Instruments

:'~':!:~~i~8{:1~1i ~!:~~:~r :.~o:::~:.::.~ not

Copyright © 1986, Texas Instruments Incorporated

TEXAS ",
INSTRUMENTS
POST OFFICE BOX 655303 • DAU.AS. TEXAS 75266

2-405

SN75123

DUAL LINE DRIVER
schematic (each driver)
. vee~(~16~)~~____- .______~____~~____________. -____. -____-.~______~__,
TO OTHER
LINE DRIVER

A

B
e
D
E
F

4 kO

4 kO

3600

150

(1.10)
(2.11)
(3.12)
(4.13)
(7.9) y

(5.14)
(6.15)
(B)

GND~--~~~~~----------------~~~-.~~~~e---e-e-~~~------~

TO OTHER
LINE DRIVER
Resistor 'values shown are nominal.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V CC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 2):
D package ..........................•.............................. 950 mW
J package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1025 mW
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1150 mW
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package ......... 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package .. '........... 300°C
NOTES: 1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. For operation above 25°C free-air temperature, derate the D package to 608 mW at 70°C at the rate of 7.6 mw/oe, the
J package to 656 mW at 70°C at the rate of 8.2 mw/oe, and the N package to 736 mW at 70°C at the rate of 9.2 mw/oe.
In the J package. SN75123 chips are glass mounted.

recommended operating conditions
Supply voltage, Vee
High-level input voltage, VIH

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

0.8
-100

V
'mA

70

°e

Low-level input voltage, VIL
High-level output current, IOH
Operating free-air temperature. T A

0

TEXAS •
INSTRUMENTS
2-406

V

2

POST OFFICE BOX 656303 • DALLAS, TEXAS 75265

SN75123

DUAL LINE DRIVER
electrical characteristics,

Vee

4.75 V to 5.25 V, TA =

PARAMETER
VIK

Input clamp voltage

VOH

High-level output voltage

10H

High-level output current

VOL

Low-level output voltage

MIN

II = 10 mA
5 V,
Vce - 5 V,
VIH - 2 V,
ITA - 25°C
10H = - 59.3 mA, See Note 3,
ITA = ooe to 70°C
VCC - 5 V,
VIH - 4.5 V,
VOH - 2 V,
See Note 3
TA = 25°C,
VIL = 0.8 V,
10L = - 240 ~A, See Note 3
Vce = 0,
Va = 3 V
VI - 4.5 V
VCC

10(offi Off-state output current
High-level input current
IIH

=

IlL

Low-level input current

VI

lOS

Short-circuit output current t

Vee

leCL

70 0 e (unless otherwise noted)

11- -12 mA

Vee - 5 V,

V(BR)I Input breakdown voltage

leCH

ooe to

TEST CONDITIONS

Supply current, outputs high
Supply current, outputs low

Vee

=

5 V,
5.25 V,

UNIT
V

5.5
3.11

V
V

2.9

0.4 V

=
=

MAX

-1.5

-100

-250

-0.1

0.15
40
40
- 1.6

mA

-30

mA

28

mA

60

mA

TA = 25°C
All inputs at 2 V,

Outputs open

Vee

=

5.25 V,

All inputs at 0.8 V,

Outputs open

mA
V
~A
~A

tNot more than one output should be shorted at a time.
NOTE 3: The output voltage and current limits are valid for any appropriate combination of high and low inputs specified by the function
table for the desired output.

switching characteristics,

Vee

PARAMETER

TEST CONDITIONS

tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output

RL - 50!l,

MIN

eL - 15 pF,

See Figure 1
RL

=

50!l,

eL

=

100 pF,

See Figure 1

TYP

MAX

12
12
20
15

20
20
35
25

UNIT
ns
ns

PARAMETER MEASUREMENT INFORMATION
3 V

VCC

r---- L -,

INPUT

I
I

~

"K;.;.10;,.%;.;.._ _ 0 V

~~_--_-OUTPUT
I

L - - -

-1- J

tPLH-fI....-

....

I

~tpHL

~:l;.._ ·:"~,____Jl,.1-.5-v---1-.-5..,~ :::

TEST CIRCUIT

VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: Zo ~ 50 0; tw = 200 ns, duty cycle = 50%.
B. CL Includes probe and jig capacitance.

FIGURE 1. SN75123 SWITCHING TIMES

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-407

I

h'
I

SN75123
DUAL LINE DRIVER
TYPICAL CHARACTERISTICS
OUTPUT CURRENT
vs

OUTPUT VOLTAGE
-300
Vee = 5 V
All inputs at 2 V
TA = 25°e

-250
~

E

.!.c:

-200

'\

!!!

:;

()

'\.

-150

~

Ol

"\

SOl
0

-100

I

\
\

9
-50

o

o

2

3

5

4

Va-Output Voltage-V
FIGUR~

2

APPLICATION INFORMATION

r------,
:==~:r~
C
E

r--------,

95 0 COAXIAL CABLE

o
--i----f-'"

L ___

I

I

.!,;N":5~3 ..I

I
950

950

I
I

Y
A - - 4 " -....

I B-"'""'1.._"
L ____

.!'~N~~4..1

FIGURE 3. UNBALANCED LINE COMMUNICATION USING '123 AND '124

TEXAS . .
INSTRUMENTS
2-408

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN75124
TRIPLE LINE RECEIVER
01322, SEPTEMBER 1973-REVISEO SEPTEMBER 1989

Meets IBM System 360 Input/Output
Interfece Specifications

D. J. OR N PACKAGE
(TOP VIEW)

•

Operates from Single 5-V Supply

•

TTL Compatible

1A
18
2R
25
2A
28
2Y

•

•

Built-In Input Threshold Hysteresis

•

High Speed ... Typical Propegation Delay
Time - 20 ns

•

Independent Channel Strobes

•

Input Gating Increases Application Flexibility

•

Designed for Use with Dual Line Driver
SN75123

•

Designed to Be Interchangeable with
Signetics N8T24

Vee
15
1R
1Y
3A
35
3R
3Y

GND

logic symbol t
1R
1S
1A
1B

description

2R

The SN75124 triple line receiver is specifically
designed to meet the input/output interface
specifications for IBM System 360, It is also
compatible with standard TTL logic and supply
voltage levels.
The SN75124 has receiver inputs with built-in
hysteresis to provide increased noise margin for
single-ended systems. An open line will affect
the· receiver input as would a low-level input
voltage and the receiver input can withstand a
level of - 0, 15 V with power on or off. The other
inputs are in TTL configuration. The S input must
be high to enable tj"le receiver input, Two of the
line receivers have A and B inputs that, if both
are high, will hold the output low. The third
receiver has only an A input that, if high, will hold
the output low.

2S
2A
2B
3R

3S
3A
tThis symbol is in accordance with ANSI/IEEE Std 91·1984 and
IEC Publication 617-12.
FUNCTION TABLE
INPUTS
A
H

X
L
L

The SN75124 is characterized for operation from
ODe to 70 De.

X
X

B*
H

OUTPUT

R

S

y

X

X

L

L

H

L

H

X

H

X
X
X

X

L

H

L

·H

X

L

X

L

H
H

*B input and last two lines 01 the
function table are applicable to
receivers 1 and 2 only.
AVAILABLE OPTIONS
PACKAGE
TA

SMALL OUTLINE
(D)

CERAMIC DIP

PLASTIC DIP

IJ)

IN)

SN75124D

SN75124J

SN75124N

OOC
to
70°C
The D package is available taped and reeled. Add the suffix R to the
device type li.e., SN75124DR).
Copyright @ 1989, Texas Instruments Incorporated

PRODUCTION DATA doe.mants eontai. information

currant 8S of publication data. Products conform to
specifications par th. terms of TaXI. Instruments

=~~:=i~ai~:1~1~ ~=::i:; ~~o::;::::Nt::'s~

not

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-409

SN75124
TRIPLE LINE RECEIVER
logic diagram (positive logic)
1 R -'-'-'-'-'.... rr "l_.r--..

1A

-'-'------ir-"""

18

-==--------IL-../

2R
2S -'-'-------IL-../
2A ~:..-----ir-"""

3R

3S -'--'------IL-../

3A

------t

schematic (each receiver)
Vcc

_(1_6_).-__~__- . _ - .___- .__~__________~__________- .__~____________-,
4 kll

TO OTHER
RECEIVERS

800 Il

581l

R (14.3.10)
(13.7.9) Y

5 (15. 4.11)

(8)

GND -'-'--.....__.-.4t-.......

A

(1.5.12)

(2.6I t
TO OTHER
RECEIVERS

w...

Vee

B ------

bus

t B input is provided on receivers 1 and 2 only.
Resistor values shown are nominal.

TEXAS •

2-410

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 76285

SN75124
TRIPLE LINE RECEIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage: R input with. VCC applied. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
R input with VCC not applied. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6 V
A, S, or S input ............................................... 5.5 V
Output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 100 mA
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range ...................................... ooC to 70°C
Storage temperature range ............... ,......................... - 65°C to 1 50°C
lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............ 300°C
lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package ........ 260°C
NOTE 1: Voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
DERATING F.ACTOR

PACKAGE

TA'" 25·C
POWER RATING

0
J
N

950 mW

ABOVE TA - 25·C
7.6 mW/oC

TA - 70·C
POWER RATING

1025 mW

S.2 mW/oC

656 mW

1150mW

9.2 mW/oC

736 mW

60SmW

recommended operating conditions
Supply voltage, Vee
High·level input voltage, VIH
Low-level input voltage, VIL

A, B, or S

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

2

R

V

1.7

A, B, or S

O.B

R

0.7

High-level output current, IOH
Low-level output current, IOL
Operating free-air temperature. T A

0

V

-BOO

~A

16

mA

70

°e

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 866303 • DALLAS. TEXAS 75286

2-411

5N75124

TRIPLE LINE RECEIVER
electrical characteristics. Vee - 4.75 V to 5.25 V. TA - ooe to 70 0 e (unless otherwise noted)
PARAMETER
Vhys

Hysteresis IVT +

-

VIK

Input clamp voltage

TEST CONDITIONS

VT _ )

Input breakdown
VIBR)!
VOH
VOL
II

voltage
Hig~-Ievel

MIN

TYP

0.2

0.5

=

25°e
-12 mA

=

10 mA

5.5

V

2.6

V

5 V,

TA

Vee

=
=

5 V,

II

Vee

=

5 V,

II

R

Vee

A,B, or S
A,B, or S

=

= VIH min, VIL = VIL max,
= - BOO p.A, See Note 2
VIH = VIH min, VIL = VIL max,
See Note 2
IOL = 16 mA,
VI = 7 V
VI = 6V,
Vee = 0
VI = 4.5 V
VI = 3.11 V
VI = 0.4 V,
VIR = O.B V
Vee = 5 V,
TA = 25°e
All inputs = O.B V
All inputs = 2 V
VIH
10H

output voltage

Low-lever output voltage
Input current at

R

maximum input voltage

A,B, or S

IIH

High-level input current

IlL

Low-level input current

lOS

Short-circuit output current t

lee

Supply current

R

A,B, or S

MAX

UNIT

-1.5

V

V

0.4
5
5
.40
1.70

V
rnA
p.A

-0.1

-1.6

rnA

-50

-100

rnA

72
100

rnA

tTypical value is at Vee = 5 V, TA = 25°e.
t Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second.
NOTE 2: The output voltage and current limits are characterized for any appropriate combination of high and low inputs specified by the
function table for the desired output.

switching characteristics. Vee = 5 V. TA

-= 25°e

PARAMETER

TEST CONDITIONS

tpLH Propagation delay time. low-to-high-Ievel output from R input

MIN

See Figure 1

tpHL Propagation delay time, high-to-Iow-Ievel output from R input

TYP

MAX

20

30

20

30

PARAMETER MEASUREMENT INFORMATION
Vcc

I4-s 5ns

2.6 V

90%

84.50

i4-s 5ns
1_+ _____ 2.6 V
I

-+!

I
90%

I

I

I
I

I
I

lN3064

~tPLH
.
I

OUTPUT

I

I

5 kO
OUTPUT

I

10%

tPHL~
\:VOH

f·5V
VOL

.".

VOLTAGE WAVEFORMS

TEST CIRCUIT
NOTES: A. The pulse generator has the following characteristics: Zout
B. eL includes probe and jig capacitance.

~

500, PRR " 5 MHz, duty cycle = 50%.

FIGURE 1. SN75124 SWITCHING TIMES

TEXAS .."

INSTRUMENTS
2-412

OV

I
I

POST OFFICE BOX 866303 • DALLAS. TEXAS 75285

SN75124
TRIPLE LINE RECEIVER
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
RECEIVER INPUT VOLTAGE
4.0
VCC = 5 V
No load
TA = 25°C

3.5

>
I

3.0

"is

2.5

CD
Cl
III

..50

>

2.0

:::I
:::I

VT-

VT+

1.5

0
I
0

1.0

>

0.5

o

o

0.20.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
VI-Input Voltage-V
FIGURE 2

TYPICAL APPLICATION DATA

r------,

: =:.':~:::r1

c-r,;;::;:;;;;;;;a._,/

o

I.

I

E-...;....-#'-...

I

F -"T"""_ _' "

I

L ____ Y,_S~52:3.J

r--------,

95-!l COAXIAL CABLE

I
95 U

95U

I
I

Y

A---f"'-'
B -_ _"

I
L ____ .:' ':N~1':'4.J
FIGURE 3. UNBALANCED LINE COMMUNICATION USING SN75123 AND SN75124

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-413

2-414

SN75125, SN75127
SEVEN-CHANNEL LINE RECEIVERS
D2239, JANUARY 1977-REVISED SEPTEMBER 1986

•

Meets IBM 360/370 I/O Specification

•

Input Resistance . . . 7 kQ to 20 kU

•

Output Compatible with TTL

•

Schottky-Clamped Transistors

SN75125.

.0, J, OR N PACKAGE
(TOP VIEWI

•

Operates from Single 5-V Supply

•

High Speed ... low Propagation Delay

•

Ratio Specification for Propagation Delay
Time, low-to-High/High-to-low

•

Seven Channels in One 16-Pin Package

•

Standard VCC and Ground Positioning on
SN75127

1A
2A
3A
4A
5A
6A
7A

1Y

Vee
3Y
4Y
5Y
6Y
7Y
2Y

GND

SN75127 ... 0, J, OR N PACKAGE
(TOP VIEWI

Vee

1A
2A
3A
4A
5A
6A
7A

description
The SN75125 and SN75127 are monolithic
seven-channel line receivers designed to satisfy
the requirements of the IBM System 360/370
input/output interface specifications. Special
low-power design and Schottky-clamped
transistors allow for low supply-current
requirements while maintaining fast switching
speeds and high-current TTL outputs,

1Y
2Y
3Y
4Y
5Y
6Y
7Y

GND

The SN75125 and SN75127 are characterized
for operation from 0 DC to 70 DC,

logic symbols t
SN75127

SN75125
lA
2A
3A
4A
SA
6A
7A

111
121

I>

131
141
151
161
171

111

lY

t>

lA
121
2A
131
3A
141
4A
151
SA
(61
6A
171
7A

2Y
3Y
4Y
5Y
6Y
7Y

lY
2Y
3Y
4Y
5Y
6Y
7Y

t These symbols are in accordance with ANSIIIEEE Std 91-1984 and lEG Publicaiton 617-12.

PRODUCTION DATA documents contain information
current as of publication date. Products conform to

specifications per the terms of Texas Instruments

:~aC~~:~~i~ai~:I~~e ~!:~~~ti:r !,~O::i:~:t:is~S not

Copyright © 1986, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-415

SN75125. SN75127
SEVEN-CHANNEL LINE RECEIVERS

schematic (each receiver)
COMMON CIRCUITRY

r - - - -

VCC
150 !l
NOM

---,

TO OTHER
CHANNELS

A ---........__-1

INPUT

Y
OUTPUT

12 k!l
NOM

GND~---t--~~--+-4-----~~_~_ _ _~-*~

__ __
~

~~_~

L-_ _ _ _ _ _ _ _ _ _ _ _ _~~--------~4_-~TOOTHER

L------------------L~------+-+-_+

CHANNELS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage range: SN75125 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.15 V to 7 V
SN75127 .......................................... -2Vto7V
Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range ...................................... ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm(1/16 inch) from case for 60 seconds: J package ............ 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package ........ 260°C
NOTES: 1. All voltage values are with respect to network ground terminal.

2. In the J package, SN75125 and SN751;!7 chips are glass mounted.
DISSIPATION RATING TABLE
TA s 25·C
DERATING FACTOR
TA - 70·C
PACKAGE
POWER RATING ABOVE TA - 25·C POWER RATING
7.6 mW/oC
D
950mW
60BmW
1025 mW
B.2 mW/·C
J
656mW
N
1150mW
9.2 mW/·C
736 mW

TEXAS ..,
INSfRUMENTS
2-416

POST OFFICE BOX 666303 • DALLAS, TEXAS 75265

SN75125. SN75127
SEVEN-CHANNEL LINE RECEIVERS
recommended operating conditions
MIN

NOM

MAX

Supply voltage, Vee

4.5

5

5.5

High-level input voltage, VIH

1.7

V
V

0.7

Low-level input voltage, VIL
High-level output current, IOH
Low-level output current, IOL

0

Operating free-air temperature. T A

UNIT

V

-0.4

rnA

16

rnA

70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
PARAMETER

TEST CONDITIONS

VOH

High~level

VOL

Low-level output voltage

Vee ~ 4.5 V,

IIH

High-level input current

output voltage

~

Vee

IlL

Low-level input current

5.5 V,
Vee
Vee ~ 5.5 V,

lOS

Short-circuit output current+:

Vee

ri

Input resistance

lee

Supply current

~

Vee
Ll.VI

~

Vee

~

0.7 V,

VIH ~ 1.7 V,
VI ~ 3.11 V

~

~

~

VIL

4.5 V,

VI

5.5 V,

~

Vo

10H .- -0.4 rnA
10L ~ 16 rnA

MIN

Typt

2.4

3.1

0

4.5 V, 0 V, or open,
0.15 V to 4.15 V

~

5.5 V,

10L

0.3

0.42

~

V
rnA

30

~A

-60

rnA

7

20

k!1

15

25

rnA

28

47

rnA

MIN

TYP

MAX

7

14

25

ns

10

18

30

ns

0.5

0.8

1.3

1

7

12

ns

1

3

12

ns

All inputs at 0.7 V
Vee

0.5

-18

10H ~ -0.4 rnA,

5.5 V,

UNIT
V

0.4

0.15 V

~

MAX

16 rnA,

All inputs at 4 V

t All typical values are at Vee ~ 5 V, T A ~ 25°e.
tNat more than one output should be shorted at a time.

switching characteristics,

Vee

=5 V, T A

PARAMETER

TEST CONDITIONS

tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
tpLH

RL

Ratio of propagation delay times

~

400

n,

eL

~

See Figure 1

tpHL
tTLH Transition time, low-to-high-Ievel output
tTHL Transition time, high-to-low-Ievel output

50 pF,

UNIT

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-417

SN75125. SN75127
SEVEN·CHANNEL LINE RECEIVERS
PARAMETER MEASUREMENT INFORMATION
VCC

TEST CIRCUIT

I ..,1~,----100 ns
-+j I ~10 ns
I

I
10%

_ _=';';;...J

'+-III

90%~;r1
1.7V
I

1190%
;
I '
0.7V

INPUT

_I~II

10 n s _

II

II

I

I

k- ~P:L~i

OUTPUT

I

I

-I

10%

0 V

J4"tPLHlfi-2-V--'- - - VOH

:.5 V
._ O.BV

~

- - - - - - - 3V

1.2 V
O.BV

I
1_ _ _ _ _ VOL

-1 \.--

tTHL

tTLH

VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: Zo
B. CL includes probe and jig capacitance.
C. All diodes are 1N3064 or equivalent.

~

50 11. PRR '" 5 MHz.

FIGURE 1

TEXAS . "
INSTRUMENTS
2-418

POST OFFICE BOX 855303 • DALLAS. TEXAS 76285

SN75125. SN75127
SEVEN·CHANNEL LINE RECEIVERS

TYPICAL CHARACTERISTICS
VOLTAGE TRANSFER CHARACTERISTICS

5

r

VOLTAGE TRANSFER CHARACTERISTICS

5

TA = 70 0 e

Vcc = 5.5 V
Vce = 5 V

~

4

4

= 4.5

VCC

>

>

I

CD

CD

CI
l!! 3

'0

TA = 25°C- -

2
So
:::I

TA = ooc-

>
:;
0

~ 3
.::
o

>

I

f-t

0

>

VCC ~ 5
No Load

o

I

J

I
I

2

:::I

o
I
o
>

I

~

No Load
TA = 25°C

i

o

I

o

I

o

2

2

VI-Input Voltage-V

VI-Input Voltage-V
FIGURE 3

FIGURE 2

LOW·LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

INPUT CURRENT
vs
INPUT VOLTAGE

0.4

Jcc 1= ~ V
f-- No Load

/

TA = 25°C

 0.4

/

c:

!!!
u 0.2

:::I

So
:::I

/

0
Gi

/

:::I
Co

.5

/

o

o

0.3

>
CD

......

~

/

0.1

I

>

/

E

=

V

I

I

0.2

0

V

/

/

~

~

~

......

I

/

...... 0.1
0

>

o
2

4

3

5

o

5

10

15

20

IO-Output Current-rnA

VI-Input Voltage-V

FIGURE 5

FIGURE 4

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TeXAS 75265

2·419

SN75125, SN75127
SEVEN·CHANNEL LINE RECEIVERS

TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
SUPPLY VOLTAGE

30

I

.1

1

V

All seven channels
25 -No Load

is.
c.
:::I
/
III 10
I
All inputs
u
at 0.7 V
};}
5
/

/

..

~

0

o

-/

2

~ )/ ~
V

3

4

5

vee-Supply Voltage-V
FIGURE 6

TEXAS ."

INSTRUMENTS
2·420

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

6

SN75126
QUADRUPLE LINE DRIVER
D3405, FEBRUARY 1990

•

•
•
•

D, J, OR N PACKAGE

Meets IBM 360/370 I/O Interface
Specification GA22-6974-3 (Also See
SN55ALS126 and SN75ALS126)

(TOP VIEW)

IF

4Y

lA

4F

1,2G

4A

Minimum Output Voltage of 3,11 V at
10H = -60 mA
Fault-Flag Circuit Output Signals Driver Output
Fault
Fault-Detection Current-Limit Circuit Minimizes
Power Dissipation During a Fault Condition

•

Dual Common Enable

•

Individual Fault Flags

Vee

lY

2A

3,4G

2F

3A

2Y

3F

GND

3Y

FUNCTION TABLE
INPUTS

•

Designed to Replace the MC3481

description
The SN75126 quadruple line driver is designed
to meet the IBM 360/370 I/O specification
GA22-6974-3. The output voltage is 3.11 V
minimum (at 10H = - 59,3 mAl over the
recommended ranges of supply voltage (4.5 V
to 5,95 V) and temperature. Driver outputs use
a fault-detection current-limit circuit to allow
high drive current but still minimize power
dissipation when the output is shorted to ground,
The SN75126 is compatible with standard TTL
logic and supply voltages.

OUTPUTS

G

A

Y

F

L

X

L

H

H

H

H

H

H

H

S

L

H = high level, L = low level,
X = irrelevant, S = shorted

to ground

Fault-flag circuitry is designed to sense and
signal a line short on any Y line. Upon detecting
an output fault condition, the fault-flag circuit
forces the driver output into a low state and
signals a fault condition by causing the fault-flag
output to go low,
The SN75126 can drive a 50-0 load as required in the IBM GA22-6974-3 specification or a 90-0 load as
used in many I/O systems. Optimum performance can be achieved when the device is used with either
the SN75125, SN75127, SN75128, or SN75129 line receivers.
The SN75126 is characterized for operation from

PRODUCTION DATA documenls contain information
current 8S of publication date. Products conform to

specifications per the terms of Taxas Instruments
:::~::i;I{::1~7i ~:\~~ti:; :1~O::::~::.s not

Doe

TEXAS

to 70 D e.

~

INSTRUMENlS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

Copyright © 1990, Texas Instruments Incorporated

2-421

SN75126
QUADRUPLE LINE DRIVER
logic symbol t

logic diagram (positive logic)
&1>

lA (3)

121

lEN2

(2)

IF

lA 131
1.2G _1:;:4!.j1_

Gl
(1)

....-1

111

IF
1V

lY
161

&1>
3EN4

(6)

2A

2F

151

171

G3

2A IS)

(7)
(10)

(9)

3,4G

(14)

4A 113)

(15)

2~

2Y

2Y
1101

3F
3A 1111

3,40 ~ll~2~1. -....-1

3Y

191

3F

3Y

4F
1141

4F

4Y
4A 1131

1151

t This

symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

4Y

schematics of inputs and outputs

EQUIVALENT OF EACH INPUT

Vee-----------Req

TYPICAL OF ALL Y OUTPUTS

- _ _-----41---

Vee

TYPICAL OF F OUTPUTS
~~--"'-VCC

20 kll NOM

.----f--

Y OUTPUT

INPUT"-- _........J

F OUTPUT
GND--~~-4~_e~--

- - -....- ...- ....-- GND

A Inputs: Req - 20 kll NOM
G Inputs: Req - 10 kll NOM

TEXAS ."

2-422

INSTRUMENTS
POST OFFICE BOX 856303 • DALlAS, TEXAS 1&28&

5N75126
QUADRUPLE LINE DRIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc .......... , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage .............................................................. 7 V
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range, T A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case .for 10 seconds: D or N package ........ 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............ 300°C
DISSIPATION RATING TABLE
PACKAGE

TA s 25 DC
POWER RATING

DERATING FACTOR

TA - 70 DC
POWER RATING

0

960 mW

ABOVE TA - 25 DC
7.6 mw/oe

J

1025 mW

B.2 mw/oe

656 mW

N

1150mW

9.2 mw/oe

736 mW

60BmW

recommended operating conditions
Supply voltage. Vee
High-level input voltage, VIH

MIN

NOM

MAX

4.5

5

5.95

2

Low-level input voltage, VIL

V
O.B

High-level output current, IOH
0

Operating free-air temperature, T A

UNIT
V
V

-59.3

mA

70

°e

TEXAS ."

INSTRUMENTS
POST OFFfCE BOX 856303 • DALLAS. TEXAS 75285

2-423

8N75126
QUADRUPLE LINE DRIVER

electrical characteristics over recommended operating free-air temperature range
PARAMETER
VIK

TEST CONDITIONS

Input clamp voltage
High-level output

VOH

voltage

Vee

y
y

Vee

F

Vee
Vee
Vee
Vee - 4.5 V,

y
Low~level

VOL

output

Y

voltage

F
y
y

Off-state output
IOloft)
II
IIH

current

A

10H
10L
10L
10L

Vee

= 0,

VI

= 0,
= 0,

VI

VI

=

5.5 V

High-level input

~
G

Vee

= 4.5 V,

VI

=

2.7·V

=

VI

= 0.4 V

current
input

current

A

r-c;. Vee

Short-circuit output

F

current

Y

all outputs high
Supply current,
Y outputs low

5.95 V,

=

5.5 V,
Vee - 5.5 V,
Vee = 5.95 V,
Vee = 5.95 V,
Vee = 5.5 V,
Vee = 5.95 V,
Vee = 5.5 V,
Vee = 5.95 V,
Vee

MIN

VIH - 2 V

= 0.8 V

VIL

Vo = 0,
Vo - 0
Vo = 0,

=

2.7 V

VIH

=

2.7 V

-15

VIH

No load,
No load,

VIL
VIL

-15
VIH

V

V

V

0.5

V
V

VIH

Vo = 0
No load,
No load,

UNIT

0.15
0.15

VIL = 0.8 V
Y at 0 V,

= 3.11
= 3.11

MAX

-1.5
3.11
3.9
2.5

VIH '" 2 V
VIH = 2 V

Vo
Vo

= 4.5 V,

F

leeL

10H
10H

-18 rnA
= -59.3 rnA,
= -41 rnA,
= -400 ~A,
= - 240 ~A,
= -1 rnA,
- 8 rnA,

Vee

Supply current,
leeH

VIH = 2 V
Vee = 4.5 V,

=

~

y
lOS

Vee

II

Input current

Low~level

IlL

= 4.5 V,
= 4.5 V,
= 5.25 V,
= 4.5 V,
= 5.5 V,
= 5.95 V,

A,G

=2V
=2V
= 0.8 V
= 0.8 V

100
200
100
200
20
40
-250
-500
-5
-100
-5
-110
70
80
55
70 .

p.A
p.A

p.A
~A

rnA

rnA
rnA

switching characteristics at T A
PARAMETER

FROM

TEST CONDITIONS

TO

MIN.

Propagation delay time,
tpLH
tpHL
tpLH
tpHL

low-to-high-Ievel output
Propagation delay time,
high-to-Iow-Ievel output

A

y

Ratio of propagation

tpHL

low-to-high-Ievel output
Propagation delay time,

A

y

high-to-Iow-ievel output
low-to-high-Ievel output
Propagation delay time,

tpHL

0.3

high-to-Iow-Ievel output

A

F

=

5.25 V to 5.95 V,
eL
RL = 900,
VHlrefl = 3.9 V
See Figures 1 and 2

Vee = 5 V,
eL = 15 pF,
See Figures 1 and 2

RL

TEXAS ."

2-424

50 pF,

VHlrefl = 3.11 V,
See Figures 1 and 2

Vee

Propagation delay time,
tpLH

=

delay times
Propagation delay time,

tPLH

Vee = 4.5 V to 5.5 V,
RL = 500,
eL

INSTRUMENTS
POST OFFICE BOX 866303 • DALLAS. TEXAS 75285

=

=

50 pF,

2 kO,

MAX

UNIT

40

ns

37

ns

3

45

ns

45

ns

60

ns

100

ns

8N75126
QUADRUPLE LINE DRIVER
PARAMETER MEASUREMENT INFORMATION

4V

A INPUT - - - - NORMAL
OPERATION

I

I

I-

tpHL

-l

1-1--

tpLH

l

F OUTPUT - - - - - - - - , - . 3 - V " ' u
I '.3 V

VOH

l

~~R~~:

OPERATION
-- -

-

-VOL

NOTE: The input pulse is supplied by a generator having the following characteristics: PRR '" 1 MHz, duty cycle", 50%, tr '" 6 ns,
tf '" 6 ns, Zout ~ 50 0.

FIGURE 1. INPUT AND OUTPUT VOLTAGE WAVEFORMS
5V

y OUTPUT

--~~-~",,------,

F OUTPUT -",--.-4'--11-'--111--,

NOTE A: CL includes probe and stray capacitance.

FIGURE 2. SWITCHING CHARACTERISTICS LOAD CIRCUITS

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 666303. DALLAS. TEXAS 75285

2-425

2-426

SN75128, SN75129
EIGHT-CHANNEL LINE RECEIVERS
02305. JANUARY 1977 -REVISED SEPTEMBER 1986

•

Meets IBM 360/370 I/O Specification

OW. J. OR N PACKAGE

•

Input Resistance . . . 7 kO to 20 kO

(TOP VIEW)

•

Output Compatible With TTL

•

Schottky-Clamped Transistors

•

Operates From a Single 5-Volt Supply

•

High Speed . . . Low Propagation Delay

•

Ratio Specification . . . tPLH/tTHL

•

Common Strobe for Each Group of Four
Receivers

•

SN75128
SN75129

Active-High Strobes
Active-Low Strobes

Vee

15/18·
1A
2A
3A
4A
5A
6A
7A
8A
GND
·S and

5

1Y
2Y
3Y
4Y
5Y
6Y
7Y
8Y
25/28·

for SN75128 and SN75129. respectively

description
The SN75128 and SN75129 are eight-channel line receivers designed to satisfy the requirements of the
input-output interface specification for IBM 360/370. Both devices feature common strobes for each group
of four devices. The SN75128 has active-high strobes; the SN75129 has active-low strobes. Special lowpower design and Schottky-diode-clamped transistors allow low supply-current requirements while
maintaining fast switching speeds and high-current TTL outputs.
The SN75128 and SN75129 are characterized for operation from

ooe to

70 oe.

logic symbols t
SN75129

SN7512B
1S
2S

28

1A

1Y

1A

2A

2Y

2A

2Y

3A

3Y

4A

4Y

3A
4A

1Y

5A

5Y

5A

5Y

6A

6Y

6A

6Y

7A

7Y

7A

7Y

BA

BY

BA

BY

tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and lEe Publication 617-12.

Copyright @ 1986, Texas Instruments Incorporated

PRODUCTION DATA documants contain information

currant as of publication date. Products cDnform to
specifications per the terms of Texas Instruments

::::~~~a{::1~18 ~:g:~ti:fn :.~o::::::.:~~s

not

TEXAS . . ,
INSTRUMENTS
POST OFFICE BOX 665303 • OALLAS, TeXAS 76265

2-427

SN75128, SN75129
EIGHT·CHANNEL LINE RECEIVERS
logic diagrams (positive' logic)
SN75128

SN75129

schematic (each driver)'
r-----.------------1------~~.__1--VCC

IN~UT--.-r_-.-----------~.----.----.----.----._--.-_--.-_--._-+I--;__~_.--~
v
12 kG

NOM

.J

TO THREE \ " ' - - -.....v~-----'/
OTHER
TO SEVEN
CHANNELS
OTHER CHANNELS

TEXAS ."

INSTRUMENTS
2-428

POST OFFICE

BO~

655303 • DALLAS. TEXAS 75265

SN75128, SN75129
EIGHT-CHANNEL LINE RECEIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
A input voltage range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.15 V to 7 V
Strobe input voltage ........................................................ , 7 V
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range ..................................... , OoC to 70 0 C
Storage temperature range ......................................... - 65 °c to 150 0 C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: OW or N package ....... 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J packag.e ............ 30Q oC
NOTE 1: All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
PACKAGE
OW

DERATING FACTOR
TA s 25°C
TA - 70°C
POWER RATING ABOVE TA - 25°C POWER RATING
9.0 mw/oe
1125 mW
720mW

J

1025 mW

8.2 mw/oe

656 mW

N

1150mW

9.2 mw/oe

736 mW

recommended operating conditions
Supply voltage, Vee
High-level input voltage, VIH
Low-level input voltage, VIL

MIN

NOM

MAX

4.5

5

5.5

A

1.7

S
A

2

V
V

0.7
0.7

S

High-level output current. 10H
Low-level output current, IOL
Operating free-air temperature, T A

UNIT

0

V

-0.4

mA

16

mA

70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
PARAMET~R

TEST CONDITIONS

VOH

High-level output voltage

Vee

VOL

Low-level output voltage

Vee

VIK

Input clamp voltage

IIH

High-level input current

IlL

Low-level input current

lOS

Short-circuit output currentf:

'i

Input resistance

lee

Supply current

S
A

Vee
Vee

S

Vee

A

Vee

S

Vee
Vee

= 4.5
= 4.5
= 4.5
= 5.5
= 5.5
= 5.5
= 5.5
= 5.5

V, VIL
V, VIH

= 0.7 V,
= 1.7 V,

10H
10L

= -0.4 mA
= 16 mA

2.4

MAX

3.1
0.4

V, II = -18mA
V, VI = 3.11 V

UNIT
V

0.5
-1.5

V

0.42

V
rnA

V, VI

20

pA

V. VI

30
-0.4

mA

-18

-60

mA

7

20

kll

V,

= 2.7V
= 0.15 V
VI = 0.4 V
Vo = 0

SN75128

V,
AVI - 0.15Vt04.15V
Vee - 4.5 V, 0, or open;
Vee = 5.5 V. Strobe at 2.4 V, All A inputs at 0.7 V

SN75129

Vee

SN75128

Vee

SN75129

Vee

=
=
=

MIN Typt

0.3

5.5 V, Strobe at 0.4 V, All A inputs at 0.7 V
5.5 V, Strobe at 2.4 V, All A inputs at 4 V

19
19

31
31

32

53

5.5 V, Strobe at 0.4 V, All A inputs at 4 V

32

53

~A

mA

tAli typical values are at Vee = 5 V, TA = 25°e.
tNot more than one output should be shorted at a time.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-429

SN15128, SN15129
EIGHT-CHANNEL LINE RECEIVERS
switching characteristics,

Vee -

5 V, TA - 25°C

PARAMETER

FROM

tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
tpLH

Ratio of propagation delay times

tpHL
tTLH Transition time, low-to-high-Ievel output
tTHL Transition time, high-to-Iow-Ievel output

SN75128

TEST CONDITIONS

MIN

A
S

RL = 400 D,

A

CL = 50 pF,
See Figure 1

SN75129

TYP MAX

MIN

TYP MAX

UNIT

7

14

25

7

14

25

ns

10

18

30

10

1B

30

ns

26

40

20

35

ns

22

35

16

30

ns

0.5

O.B

1.3

0.5

O.B

1.3

1

7

12

1

7

12

ns

1

3

12

1

3

12

ns

PARAMETER MEASUREMENT INFORMATION

INPUT
OUTPUT

VCC
=':r----OV

400 D

FROMOUTPUT_~__~~~-e~~~~~It-,

2V

2V

UNDER TEST

I
OUTPUT

I
I

I
I

0.8 V

~tTHL
LOAD CIRCUIT
NOTES: A.
B.
C.
D.
E.

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

I
I
I
I
--!---VOL

tTLH~

VOLTAGE WAVEFORMS

TEXAS •
INSTRUMENTS
2-430

0.8 V

Input pulses are supplied by a generator having the following characteristics: Zo = 50 D, PRR ~'5 MHz.
Includes probe and jig capacitance.
All diodes are.1·N3064 or equivalent.
The strobe inputs of SN75129 are in-phase with the output.
V re fl = 0.7 V and V re f2 = 1.7 V for testing data IA) inputs, V re f1 = V re f2
1.3 V for strobe inputs.

FIGURE 1

VOH

I

SN75128. SN75129
EIGHT·CHANNEL LINE RECEIVERS
TYPICAL CHARACTERISTICS
VOLTAGE TRANSFER CHARACTERISTICS
FROM A INPUTS

VOLTAGE TRANSFER CHARACTERISTICS
5

I

I

5

I

{

VCC - 5 V

4

4

..

..

I

I

'"

!!

3

'0

;

I I

2

0

0

I

0

TA - ooC_ ......

0

VCC

o

~

5

N~ LO~d

2

I

-

>

3

>
:;

TA - 25°C I--

:;

;

VCC - 4.5 V

>

>

i>'"

VCC - 5.5 V

TA - 70 oC-

>

J
I

o

o

2

No Load
TA - 25°C
I I
I

o

2

VI-Input Voltage-V

VI-Input Voltage-V

FIGURE 3

FIGURE 2

LOW-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

INPUT CURRENT
vs
INPUT VOLTAGE
0.4

V~C ~ 5 ~

- No Load

I

.

f

/

E
~

::I
(,)

:;Q.

0.6
/

i

/

0.2

o

]

/

.5
I

~

/

0.1

...

I
~

/
o

0.4

0.3

~

0.2

./'

/"

~

~

j

/
o

1

VCC - 5 V
0.5 I- VI - 5 V
TA - 25°C

0.1

o
2

4

3

5

o

VI-Input Voltage-V

5

10

15

20

IO-Output Currant-rnA

FIGURE 5

FIGURE 4

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 75265

2-431

2-432

SN75130
QUADRUPLE LINE DRIVER
D3406, FEBRUARY 1990

•

D, J, OR N PACKAGE

Meets IBM 360/370 1/0 Interface
Specification GA22-6974-3 (Also see
SN75ALS130)

(TOP VIEWI

•

Minimum Output Voltage of 3.11 V at
10H = -60 rnA

•

Fault-Flag Circuit Output Signals Driver
Output Fault

•

Fault-Detection Current-Limit Circuit
Minimizes Power Dissipation During a Fault
Condition

•

Common Enable and Common Fault Flag

•

Designed to Be an Improved Replacement
for the MC3485

Vee

1Y
1W
1A
G
2A
2W
2Y
GND

4Y
4W
4A
F
3A
3W
3Y

FUNCTION TABLE
INPUTS
Gt
A

description
The SN75130 quadruple line driver is designed
to meet the IBM 360/370 1/0 specification
GA22-6974-3. The output voltage is 3.11 V
minimum (at 10H = - 59.3 mAl over the
. recommended ranges of supply voltage (4.5 V
to 5.5 V) and temperature (0 °e to 70°C). Driver
outputs use a fault-detection current-limit circuit
to allow high drive current but still minimize
power dissipation when the output is shorted to
ground, The SN75130 is compatible with
standard TTL logic and supply voltages.

OUTPUTS

Y

F

W

L

X

L

H

H

X

L

L

H

H

H

H

H

H

L

H

H

S

L

H

H = high level, L = low level,
X = irrelevant, S = shorted to
ground
t G and F are common to the four
drivers. If any of the four Y
outputs is shorted, the Fault-Flag
will respond.

Fault-flag circuitry is deSigned to sense and signal a line short on any Y line. Upon detecting an output
fault condition, the fault-flag circuit forces the driver output into the off (low) state and signals a fault
condition by causing the fault-flag output to go low.
The SN75130 can drive a 50-0 load as required in the IBM GA22-6974-3 specification or a 90-0 load as
used in many I/O systems. Optimum performance can be achieved when the device is used with either
the SN75125, SN75127, SN75128, or SN75129 line receivers,
The SN75130 is characterized for operation from ooe to 70°C.

IMPACT is a trademark of Texas Instruments Incorporated

PRODUCTION DATA documents contain information
current as of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~~~:~~i~at::1~1e ~!:~~~ti:; :1~O::::~:t:~~S not

TEXAS

~

INSTRUMENlS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright © 1990, Texas Instruments Incorporated

2-433

SN75130
QUADRUPLE LINE DRIVER
logic symbol t

logic diagram (positive logic)
13

G (4)

;,,1

G (4)

(12)

lA .;.;(3;.:.)-+-_ _>-,

F

~_.-'-'(1.;:,:6) vee
",_-+-..:.(l;,,:)w

L.....-t:>o--t--"(2~)lW
lA (3)

2A .;.;(5:':)-I--r''''..t>-'

",_-+-..:.(7:..:) 2Y
2A

(5)

3A (11)

3A (11)

............+..:.:(9:.:)3Y
..............._ _ _ _...... L....._-I:>o-_\-,(,,-10;:.:) 3W

4A (13)
4A

(13)
(15) 4Y

(14)4W

t This symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

TEXAS

2-434

,If

INSTRUMENlS
POST OFFICE BOX 866303 • DALLAS. TEXAS 7528&

8N75130
QUADRUPLE LINE DRIVER
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL Y OUTPUTS

Vcc-----+---

--~~-------.~-VCC

Req

20 kll NOM

....---+-- Y OUTPUT
INPUT--e.....~

- - -__~~-e~-GND

GNO--~~-.-~-----

A Inputs: Req - 20 kll NOM
G Inputs: Req - 10 kll NOM

TYPICAL OF ALL W OUTPUTS

TYPICAL OF

-4~--....-VCC

F OUTPUT

---1~------- VCC

F OUTPUT

W OUTPUT

----~~....~- GND

......H~_-GND

TEXAS ."

INSIRUMENTS
POST OFFICE BOX 8&6303 • OAUAS. TEXAS 75285

2-435

SN75130
QUADRUPLE LINE DRIVER
absolute maximum ratings ovef operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage ................................................... '........... 7 V
Continuous total dissipation at (or below): 0 package . . . . . . . . . . . . . . . . . . . . . . . . . . .. 950 mW
J package ........................... 1025 mW
N package ....................... ' .... 1150 mW
Operating free-air temperature range, T A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 0 DC to 70 DC
Storage temperature range ......................................... - 65 DC to 150 DC
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package .. ,..... 260 DC
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ....... ' ..... 300 DC
NOTE 1: For operation above 15°e free-air temperature, derate D package to 60B mW at 70 0 e at the rate of 7.6 mW/oe, the J package
to 656 mW at 70 0 e at the rate of B.2 mW/oe, and the III package to,736 mW at 70 0 e at the rate of 9.2 mW/oe.

recommended operating conditions
MIN
4.5

Supply voltage, Vee
High-level input voltage. VIH
Low-level input voltage, VIL
High-level output current, IOH
Operating free-air temperature, T A

NOM
5

MAX
5.95
O.B
-69.3

V
V
V
mA

70

°e

2

0

UNIT

electrical characteristics over recommended operating free-air temperature range
VIK

VOH

PARAMETER
Input clamp voltage
High-level output voltage

VOL

Low-level output voltage

IOloff)

Off-state output current

IOH

High-level output current

II

Input current

IIH

High-level input current

IlL

Low-level input current

lOS

Short-circuit output

TEST CONDITIONS
A,G
y
y
W
y
y
F
W
Y
Y

F
A

leeL

Vee = 5.5 V,
Vee = 5.95 V,
Vee - 4.5 V,
Vee = 4.5 V,
Vee = 4.5 V,
Vee = 0, '
Vee = 5.95 V,

=
=

-240~,

-1 mA,

IOL - B mA,
IOL = B mA
VIL = 0,
VIL = 0,
VOH = 5.95 V

r-c;

= 4.5 V,

VIH

=

5.5 V

~
G

Vee

= 4.5 V,

VIH

=

2.7 V

Vee

=

5.95 V, VIL

= 0,4 V

Vee

=

5.5 V,

=0

Vee

=

6.96 V, Vo

A

'<3

r-w
Y

rwSupply current, ali

Vee - 5.5 V,

outputs, high
Supply current,

Vee

Y outputs low

IOL
IOL

Vee

Y

leeH

II - -lBmA
Vee = 4.5 v,
IOH = -59.3 mA,
Vee = 5.25 V, IOH '" -41 mA,
Vee - 4.5 V,
IOH - -400 ~A,

Vee
Vee

=
=
=

Vo

VIH = 2 V
VIH = 2 V
VIH - 2 V
VIL = O.B V

Vo
Vo

= 3.11
= 3.11

MAX
-1.5

V
V

0.15
0.15
0.5
0.5

V

100
200

~A

100
100
400
20
BO
250
-1000
-5

-15

-100
-5
-110
75

VI - 2 V
=2V
= O.B V
5.95 V, VI = O.B V

B5
55
70

..If

INSTRUMENTS
POST OFFICE BOX.866303 • DALLAS. TEXAS 76286

V
V

3.9
2.5

-15

5.95 V, VI
VI
5.5 V,

UNIT

3.11

VIL = O.B V
Y at 0 V

= OV

TEXAS

2-436

MIN

~

~
~
~A

mA

mA
mA

SN75130
QUADRUPLE LINE DRIVER
switching characteristics over recommended operating free-air temperature range
PARAMETER

FROM

TO

TEST CONDITIONS

MIN

Propagation delay time.
tpLH
tpHL

low-to-high-Ievel output

VCC = 4.5 V to 5.5

V.

Propagation delay time.

RL = 50 O.

CL = 50 pF.

tpLH

Ratio of propagation

tPHL

delay times

tPLH

Propal/ation delay time.
low-to-high-Ievel output

tpHL
tpLH

tpLH
tpHL

Input f = 1 MHz.
VH(refi = 3.11 V.
See Figures 1 and 2

0.3

VCC = 5.25 V to 5.95 V.

Propagation delay time.

RL = 90 O.

y

A

VH(refi = 3.9 V.
See Figures 1 and 2

high-to-Iow-Ievel output
Propagation delay time.

VCC = 5 V.

low-to-high-Ievel output

W

A

Propagation delay time.
tpHL

y

A

high-to-Iow-Ievel output

high-to-Iow-Ievel output

VCC = 5 V.

F

A

Propagation delay time,

RL

=

2 kO.

CL = 15 pF.
'See Figures 1 and 2

Propagation delay time.
low-to-high-Ievel output

CL = 50 pF.
Input f = 5 MHz.

RL = 2 kO.

CL = 15 pF.
See Figures 1 and 2

high-to-Iow-Ievel output

MAX

UNIT

40

rts

37

ns

3
45

ns

45

ns

45

ns

28

ns

60

ns

100

ns

PARAMETER MEASUREMENT INFORMATION

4.0 V
A INPUT

{Sea Note A)

11'0%

10%

1 \.:.:..:.:..-_---J

I
tPLH~

I
~.J.
1
:1

Y OUTPUT

________

1
!+-*-tPHL

1,.-_-....
vHf,ell 1
1...\

_ _ _--:1----... 1

VyOoHL

NORMAL
OPERATION

I+- tPLH .....
1
I , - -_ _'"\

i

13V\! 1'3Y

1

. .

1

:

1
1

1
1

l4--- t PHL-...II

F OUTPUT

r___

! ~~0~.5~y~-J

I.- tpHL~

W OUTPUT

I:

~tpLH
I

\--VOH
VOL

l

---------,-3....,,"ur,_-3-~-_-_-_-_-_-_:: !§1;~

NOTE A: The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz. duty cycle
tf s 6 ns. Zout = 50 O.

= 50%.

tr S 6 ns,'

FIGURE 1. INPUT AND OUTPUT VOLTAGE WAVEFORMS

TEXAS ""
INSTRUMENTS
POST OFFICE

aox 865303 •

DALLAS, TEXAS 76285

2-437

SN75130
QUADRUPLE LINE DRIVER
PARAMETER MEASUREMENT INFORMATION
5V

2 kll
W OUTPUT ~.---t.-""-"-IM-"'h

J

Cl - 15 pF

(See Note AI

y OUTPUT

~'-------'-------,

I

Cl-50pF
(See Note AI

1

CLOSE FOR
TESTING F

5V

'O"'~, ~,~

--iI

Cl- 15pF
(See Note AI

NOTE A: Cl includes probe and stray capacitance.

FIGURE 2. SWITCHING CHARACTERISTICS LOAD CIRCUITS

TEXAS ."

2-438

INSTRUMENTS
~

OFFICE BOX 855303 • DAUAS.

T~XAS

7628&

SN15136
QUADRUPLE BUS TRANSCEIVER
WITH 3·STATE OUTPUTS
02291, JANUARY 1977-REVISED SEPTEMBER 1986

•

P·N-P Inputs for Minimal Input Loading
(200 ,..A Maximum)

•

High-Speed Schottky Circuitry

•

3-State Outputs for Driver and Receiver

•

Party-Line (Data-Bus) Operation

•

Single 5-V Supply

•

Driver Has 40-mA Current Sink Capability

•

D. J, OR N PACKAGE
(TOP VIEW)

Designed to Be Functionally Interchangeable
with Signetics N8T26. also Called 8T26

FiE

Vee

1R
16
10
2R
26

DE
4R
46
40
3R

20

36

GNO ~'-----'o.>-' 3D

logic symbol t

description
DE
RE

The SN75136 is a quadruple transceiver utilizing
Schottky-diode-clamped transistors. Both the
driver and receiver have 3-state outputs. With
p-n-p inputs.
the
input loading is
reduced to a maximum input current of
200,..A.

(3) lB

10
lR
20

p-41~(::6,-) 2B

2R

The SN75136 is characterized for operation from
ooe to 70 oe.

(10) 3B
(13) 4B

FUNCTION TABLE (DRIVER)
INPUTS

OUTPUT

0

DE

B

L
H

H

H

H

X

L

L
Z

tThis symbol is in accordance with ANSIIIEEE Std 91-1984 and
IEC Publication 617-12.

logic diagram (positive logic)

FUNCTION TABLE (RECEIVER)
INPUTS

OUTPUT

(2)

B

RE

R

L

L

H

H

L

L

(5)

X

H

Z

(6)

H = high level
L = low level
X = irrelevant
Z = high impedance

(3)

3D

10)

13)

Copyright © 1986. Texas

PRUDUCTION DATA documenls conlain

information curraat

8S

of publication data.

Products conform to specifications per the terms
of TaxBs Instruments standard warranty.

Production processing does not necessarily

include tasting of all parameters.

~nstruments

lR
lB
2R
2B
3R

3B
4R
4B

Incorporated

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

2-439

SN75136
QUADRUPLE BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS

VCC------~--------

VCC

5kll NOM

INPUT
OUTPUT

Drivers:
Receivers:

absolute maximum ratings over operating free"air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............. 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package .......•. 260°C
NOTE 1: Voltage values are with respect to network ground terminal.

DISSIPATION RATING TABLE
PACKAGE

TA';; 25°C
POWER RATING

DERATING FACTOR
TA - 70°C
ABOVE TA - 25°C POWER RATING
7.6 mW/oC
60B mW

D

950 mW

J

1025 mW

B.2 mW/oC

656 mW

N

1150mW

9.2 mw/oe

736mW

recommended operating conditions
Supply voltage, Vee

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

2

V

High-level input voltage, VIH

B, D, DE. RE

Low-level input voltage. VIL

B, D. DE. RE

0.B5

Driver. B

-10

High-level output current, IOH
Low-level output current. IOL

Receiver, R

-2

Driver, B

40
16

Receiver, R

0

Operating free-air temperature, TA

TEXAS •
INSTRUMENTS
2-440

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

70

V
mA
mA
°e

SN75136
QUADRUPLE BUS TRANSCEIVER
WITH 3·STATE OUTPUTS
electrical characteristics over recommended operating free-air temperature and supply voltage range
(unless otherwise noted)
PARAMETER

TEST CONDITIONS

Input clamp voltage

~

MIN

B,D,DE,m:

II

B

VIH ~ 2 V,

VIL ~ 0.B5 V, 10H

R

VIL ~ 0.85 V,

IOH ~ -2 mA

B

VIH ~ 2 V.

IOL ~ 40 mA

R

VIH ~ 2 V,

VIL ~ 0.85 V, 10L ~ 16 mA

Off-state (high-impedance

B,R

DE at 0.85 V,

RE at 2 V,

state) output current

R

RE at 2 V,

Vo ~ 0.5 V

IIH

High-level input current

D,DE,RE

VI

~

5.25 V

IlL

Low-level input current

B,D,DE,RE

VI

~

0.4 V

lOS

Short-circuit output current*'

ICC

Supply current

VIK

VOH High-level output voltage
VOL
10Z

Low-level output voltage

switching characteristics,

B
R

Typt

MAX

-5 mA

-1
~

-10 mA

2.6

3.1

2.6

3.1

V
V

0.5

Vo

~

0.5

2.6 V

100
-100
25
-200

VCC ~ 5.25 V

UNIT

-50

-150

-30

-75

VCC ~ 5.25 V, No load

V
~A

~
~A

mA

87

mA

TYP

MAX

UNIT

8

18

7

14

Vee

PARAMETER
tPLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
tpLZ Output disable time from low level
tpZL Output enable time to low level
tpLZ Output disable time from low level
tpZL Output enable time to low level

FROM

TO

TEST CONDITIONS .

8

R

CL ~ 30 pF, See Figure 1

D

B

CL

~

300 pF, See Figure 2

RE

R

CL

~

30 pF, See Figure 3

DE

B

CL

~

300 pF, See Figure 4

MIN

11

20

16

24

16

24

15

30

9

24

31

38

ns
ns
ns
ns

t All typical values are at TA ~ 25 DC and VCC ~ 5 V.
+Only one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 865303 • DALLAS. TEXAS 75265

2-441

SN75136
QUADRUPLE BUS TRANSCEIVER
WITH 3·STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
2.6 V

VCC
TEST
POINT
CIRCUIT
UNDER
TEST
(See Note BI

B
DE

RE

92

n

R

D (alii
OPEN

CL-30pF
(See Note CI

GND

TEST CIRCUIT

~

~

..5 ns

i

2.6 V

:_10%

~tPHL

OUTPUT

j!""..,....~n~ __

"

90%~
1.5V I

I
I N P U T J 90%
I 1.5V
10%

OV

tpLH~

V--

---~\L.
.
~Ll._5_V_______________l._5~V;r
VOLTAGE WAVEFORMS

VOH

- - - VOL

FIGURE 1. PROPAGATION DELAY TIMES FROM BUS TO RECEIVER OUTPUT
2.6V

2.6 V

VCC
TEST
POINT
CIRCUIT
UNDER
TEST
(See Note BI

DE
RE

30n

B

CL - 300 pi:
(See Note CI

R hilll
OPEN

TEST CIRCUIT

14-- ..5 ns

~

iL90%

INPUT

~
10%

14- ..
r
-- - I.5V~
~

5 ns

90%"\

1.5V

4tPHL

tPLHC

~.5 V
I

OUTPUT

1.5

OV

vr,V--

.....______' - -________....J

2.6V

-

-

VOH
VOL

VOLTAGE WAVEFORMS

FIGURE 2. PROPAGA nON DELAY TIMES FROM DRIVER INPUT TO BUS
NOTES: A. The pulse generator in Figures 1 and '2 has the following characteristics: PRR :;; 10 MHz, duty cycle = 50%. Zo ~ 5011.
8. All inputs and outputs not shown are open.

C. CL includes probe and jig capacitance.
D. All diodes are 1 N916 or 1 N3064.

2·442

TEXAS . "
, INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

SN75136
QUADRUPLE BUS TRANSCEIVER
WITH 3·STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
2.6 V

VCC
SV
TEST
POINT

WE
o (alii
DE

CIRCUIT
UNDER
TEST
(See Note BJ

2.4 kn

240 n

R

(See Note DJ

GND

CL-30pF
(See Note CJ

TEST CIRCUIT

It-*- O<;S ns

: ...'=:::-__=~

2.6 V

INPUT

I
.... tPL;;z'--_ _....;:."\
OUTPUT

:

~

___~Y,O%

VOLTAGE WAVEFORMS

FIGURE 3. RECEIVER ENABLE AND DISABLE TIMES

(See Note DJ

TEST CIRCUIT

INPUT

:

:~1~0%~~

_ _ _ _'_.~~
OUTPUT

tpZL

\.SV

__

10%V
~tPLZ

VOLTAGE WAVEFORMS

FIGURE 4. DRIVER ENABLE AND DISABLE TIMES
NOTES: A.
B.
C.
D.

The pulse generator in Figures 3 and 4 has the following characteristics: PRR S 5 MHz, duty cycle = 50%, Zo ~ 50 Il.
All inputs and outputs now shown are open.
CL includes probe and jig capacitance.
All diodes are 1 N916 or 1 N3064.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-443

2-444

SN75140, SN75141
DUAL LINE RECEIVERS
02155, JANUARY 1977-REVISED OCTOBER 1986

•

Single 5-V Supply

•

± 100 mV

•

For Application As:
Single-Ended Line Receiver
Gated Oscillator
Level Comparator

D, JG. OR P PACKAGE
(TOP VIEW)

Sensitivity

•

Adjustable Reference Voltage

•

TTL Outputs

•

TTL-Compatible Strobe

•

Designed for Party-Line
(Data-Bus! Applications

•

Common Reference Pin

•

Common Strobe

•

'141 Has Diode-Protected
Input Stage for Power-Off
Condition

10UT[]8
eOMSTRB 2
7
1 LINE
3
6
GND 4
5

Vee
20UT
eOMREF
2L1NE

logic symbol t
COMSTRB~(2~)--~r--------'

t This symbol is in accordance with ANSI/IEEE Std 91·1984 and
lEe Publication 617-12,

logic diagram (positive logic)
description
(2)

Each of these devices consists of a dual
single-ended line receiver with TTL-compatible
strobes and outputs. The reference voltage
(switching threshold) is applied externally and
can be adjusted from 1.5 V to 3,5 V,
making it possible to optimiie noise immunity for
a given system design. Due to th'eir low input
current (less than 100 JLA!, they are ideally suited
for party-line (bus-organized! systems,

COMSTRB
lLiNE ..;.(3.;.;)____~....
COM REF

The '140 has a common reference voltage pin
and a common strobe, The '141 is the same as
the '140 except that the input stage is diode
protected,
The SN75140 and SN75141 are characterized
for operation from ooe to 70°C,

-L.-r--"--

2L1NE ~(5::!)____

FUNCTION TABLE
(EACH RECEIVER)
LINE INPUT
oS V re!
2:

- 100 mV
V re! + 100 mV
X

spacifications par the terms of Texas Instruments

::=~~~Bi~:I~'~ =::i~n :'~O=::9t~1

not

STROBE
L

OUTPUT
H

X

L

H'

L

H=high level. L=low level. X = irrelevant

Copyright © 1986. Texas Instruments Incorporated

PRODUCTION DATA d••uments •• ntoin information

currant 8S of publication date. Products confarm to

....._-'-'-- lOUT

(6)

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 16265

2-445

SN75140, SN75141
DUAL LINE RECEIVERS.

schematic (each receiver)
~~~~------~r-----'-----~--~~-----1~'--------'~~--VCC

4000

750

TO OTHER
LIN E RECEIVER

4000

1500

LINE
INPUT ILl
COM REF _-'V'>N--f----'
470

......---OUTPUT

TO OTHER
LINE RECEIVER

~---~~~-~~---"""---~--.---~~-+.-~

__---GNO

~ TO OTHER LINE RECEIVER

LEGEND:

'--_,
_ _ _ _ COMMON
STROBE

1111111111 '140 device only
Resistor values shown are nominal and in ohms.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Reference input voltage, Vref . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Line input voltage range with respect.to ground. . . . . . . . . . . . . . . . . . . . . . . . . . .. - 2 V to 5.5 V
Line input voltage with respect to Vref. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 5 V
Strobe input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . .. 0 DC to 70°C
Storage temperature range .......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package ........... 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package. . . . . . . .. 260°C
NOTE 1: Unless otherwise specified, voltage values are with respect to network terminal.

DISSIPATION RATING TABLE
PACKAGE

TA s 25°C
POWER RATING

DERATING FACTOR

TA - 70°C
POWER RATING

D

725mW

ABOVE TA - 25°C
5.8 mW/oe

JG

1050 mW

8.4 mW/oe

464 mW
672 mW

P

1000 mW

B.O mW/oe

640 mW

recommended operating conditions
UNIT

MIN

NOM

MAX

Supply voltage, Vee

4.5

5

5.5

V

Reference input voltage, Vref

1.5

3.5

V

Vref+ O.1
0

V
V

High-level strobe input voltage, VIHIS)

2

Vee- 1
Vre f- O.1
5.5

Low-level strobe input voltage, VILIS)

0

O.B

High-level line input voltage, VIH(L)
Low-level line input voltage, VILIL)

. TEXAS""
INSTRUMENTS
2-446

POST OFFICE BOX 656303 • DALLAS. TEXAS 75265

V
V

SN75140, SN75141
DUAL LINE RECEIVERS

electrical characteristics over recommended operating free-air temperature range. Vee
Vref - 1.5 V to 3.5 V (unless otherwise noted)

VOH

Strobe input clamp voltage

=

10H

Strobe input current

11(5)

10L

Low-level output voltage

at maximum
input voltage

Strobe
Com strb

input current

Reference

5.5 V

VI(S)

=

2.4 V

VI(L)

=

3.5 V, Vrel

Com strb

line input

IlL
input current

Reference

Com rei

V

2 V,

0.4

2

80

= 0,

V re !

=

VI(L)

= 0,

VI(LI

=

= 5.5 V
= 0, VI(L) =
= 0, VI(L) =

Short-circuit output current t

VCC

Supply current, output high

VI(S)

ICCL

Supply current, output low

VI(S)

=

1.5 V

3.5 V

35

100

35

100

70

V

Vre !

~A

200
-1.6

= 0.4

lOS

mA

40

VI(S)

ICCH

V

0.4

1

=

Strobe
Low-level

=

UNIT

V

16 mA

VI(S)

VI(L)

Com ref

MAX

2.4

+ 100 mY, VIL(S) = 0.8 V,

Com strb
Line input

IIH

=

V re !

VIL(L) = Vrel - 100 mY, VIH(S)
10L = 16 mA

Strobe
High-level

-400 ~A

=

5 V ± 10%.

1.5

VIL(L) - V re! - 100 mY, VIL(S) - 0.8 V,

High-level output voltage

TVpt

12 mA

11(5) -

VIH(L)
VOL

MIN

TEST CONDITIONS

PARAMETER

VIK(S)

=

-3.2

=

1.5 V

1.5 V, V re!

mA

-10
-10

=0

~

-20
-55

mA

Vrel - 100 mV

-18
18

30

mA

+ 100 mV

20

35

mA

TVP

MAX

22

35

22

30

12

22

8

15

Vrel

t All typical values are at VCC = 5 V, TA = 25°C.
; Only one output should be shorted at a time.

switching characteristics. Vee

=

5 V. Vref .. 2.5 V. TA
TEST CONDITIONS

PARAMETER

Propagation delay time, low-totpLH(L)

high-level output from line input
low-level output from line input

CL

Propagation delay time, low-to-

tpLH(S)

=

15 pF, RL

=

400 n, See Figure 1

high-level output from strobe input

ns

Propagation delay time, high-totpHL(S)

UNIT

ns

Propagation delay time, high-totpHL(L)

MIN

low-level output from strobe input

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DAl:LAS, TeXAS 75265

2-447

SN75140, SN75141
DUAL LINE RECEIVERS

PARAMETER MEASUREMENT INFORMATION
,,10
2.5 V

Vcc

LINE

I-- -+I

0t

2.5 V

-'--~

~~~--Wl--

__
STROBE
INPUT

-~-----------2.3

I

I

I

II

II

I

I

,,10

i -+I 14--"
Jt'9.0% ~--

ns~
1.5V

--.j

tPHL(LI-I+--+!'

~tPLH(ll

_ _--..1
TEST CIRCUIT

OUTPUT

- - -2.7V

90%2.5 V

I

INPUT

j4-"10 ns

10% 10%

INPUT

---ti--t,__~

LINE
INPUT
STROBE

ns~

OUTPUT

V

10 ns

10%

10%

1.5V

3.5V
OV

!--tPHL(SI'

1

~

if-tPlH(S)
,
VOH

1.5 V

VOLTAGE WAVEFORMS
NOTES: A. Input pulses are supplied by generators having the following characteristics: PRR " 1 MHz. duty cycle ,,50%. Zo = 50 0.

B. Unused strobes are to be grounded.
C. CL includes probe and jig capacitance.
D. All diodes are 1 N3064.

FIGURE 1

TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
LINE INPUT VOLTAGE
4

>

.'"

V~C ~

J

5
Vref - 2.5 VVI(S) - 0
TA = 25°C -

3

I

~
0

>
;
;

...

2

0

I

0

>

o
o

2

3

4

VI(L1-Line Input Voltage-V

FIGURE 2

TEXAS

~

INSTRUMENTS
2-448

POST OFFICE BOX 655303 • DAlLAS. TEXAS 75285

5

SN75140, SN75141
DUAL LINE RECEIVERS

APPLICATION INFORMATION
line receiver
5 V

STROBE

----,

DATA _-'---_.r--,
INPUT

I
I

OUTPUT

I

STROBE

I
I

I

Vref

I

% SN75361A

% SN75140/% SN75141

high fan-out from standard TTL gate
STROBE
ANY
SERIES 54/74
LOGIC

N=l

----;--+-"

N =2 ...

SN75140/SN75141

t Although most Series 54/74 circuits have a 2.4-V output at 400 ~A, they are typically capable of maintaining a 2.4-V output level under
a load of 7.5 mAo

dual bus transceiver

+5V
RT 150 to 100 II depending

Vcc = 5 V

r

-,,--,
__-:-..._....;;;D.:.A;.;;T.:.A;...B:;.U.:.S"---4~

...L -

DATA IN
I
DATA IN
STROBE --:-""L_'

vcc

=

I

I

.J

5V

r..J. -----,
DATA OUT

I
...:-I-........I-Vref

I
I

+5V

I

I

I
DATA OUT
STROBE

on line impedancel

I

I

I

=

1.5 V

to 3.5 V

L __ ~_~.J
% SN75140/% SN75141
Using this arrangement, as many as 100 transceivers can be connected to a single data bus. The adjustable reference voltage
feature allows the noise margin to be optimized for a given system. The complete dual bus transceiver (SN75453B driver and
SN75140 receiver) can be assembled in approximately the same space required by a single 16-pin package and only one power
supply is required (+ 5 V). Data In and Data Out terminals are TTL compatible.

TEXAS •
INSTRUMENTS
POST OFI=ICE BOX 655303 • DALLAS, TEXAS 75265

2-449

SN75140, SN75141

DUAL LINE RECEIVERS
APPLICATION INFORMATION

schmitt trigger

vee

Rl

= 5V

STROBE

----,

SIGNAL
INPUT

I

I

':'

I

L---Ir--..J
_ 'A. SN751401
-

'A. SN75141

EXAMPLES OF TRANSFER CHARACTERISTICS
4

4

3.5

3.5

>

..

R1 - 6.2 kll'
RT = 3.9 kll
RF
16 kll
TA = 25°C

3

'"

>
:;

2

~
0

;

0

R1
RT
RF
TA

3

>

g

I

2.5

TTL

)O-I~t--OUTPUT

.

'"

2.5

~

>
:;

2

;

1.5

I

~

1.5

=
-

5.9 kll
3.9 kll
5 kll
25°C

0
I
0

I

0

>

>
0.5

0.5

o

o

o
0.5

1.5

2

2.5

3

o

0.5

1.5

2

2.5

VI-Input Voltage-V

VI-Input Voltage-V

Slowly changing input levels from data lines, optical detectors, and other types of transducers may be converted to standard TTL
signals with this Schmitt trigger circuit. Rl, RF, and RT may be adjusted for the desired hysteresis and trigger levels.

TEXAS •
INSTRUMENTS
2-450

POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

3

SN75140, SN75141
DUAL LINE RECEIVERS

APPLICATION INFORMATION
gated oscillator
Vee

STROBE
STROBE

OUTPUT~

JO--+--+--.... OUTPUT

...jtwk-

V,e!

R

OSCILLATOR FREQUENCY
vs

RC TIME CONSTANT
40

20
N

::J:

::E

10

>
c

7

I

.."cr

"
!!

...

~ 1"--_
r-.,.

l.rVref = 1.5V

r'-- Vref - 2.5 V

4

RF = 15 kG

..!.

0.6

tw = -

2

f
VCC - 5 V
TA - 25°C

1

0.1

0.2

0.4 0.7 1

2

4

7 10

RC Time Constant-,..s

.

TEXAS'"

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-451

2-452

SN75146

DUAL DIFFERENTIAL LINE RECEIVER
02609. FEBRUARY 1986

•

Meets EIA Standards RS-422-A and
RS-423-A

D. JG. OR P PACKAGE

(TOP VIEW)

•

Meets EIA Standards RS-232 and
CCITT V.28 with External Components

•

Meets Federal Standards 1020 and 1030

•

Built-in 5-MHz Low-Pass Filter

•

Operates from Single 5-V Power Supply

•

Wide Common-Mode Voltage Range

•

High Input Impedance

•

TTL-Compatible Outputs

•

8-Pin Dual-In-Line Package

•

Pinout Compatible with the I'A9637 and
I'A9639

VCC[]8
lOUT
2
7
20UT
3
6
GND
4
5

l1N+
liN
21N+
21N-

logic symbol t

1IN +
11N21N+
21N-

(81

]

(7)

.D'I>
(21

"il

10UT

(6)

(3)

(5)

20UT

t This symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

description
The SN75146 is a dual differential line receiver
designed to meet EIA standards RS-422-A and
RS-423-A. The receiver is designed to have a
constant impedance with input voltages of
± 3 volts to ± 25 volts allowing it to meet the
requirements of EIA standard RS-232-C and
CCITT recommendation V.2B with the addition
of an external bias resistor. This receiver is
designed for low-speed operation below
355 kilohertz. and has a built-in 5-megahertz
low-pass filter to attenuate high-frequency
noise. The inputs are compatible with either a
single-ended or a differential line system and the
outputs are TTL compatible. This device
operates from a single 5-volt power supply and
is supplied in both the 8-pin dual-in-line and small
outline packages.

logic diagram

lIN+~8)
.D'
(2) lOUT
llN- (7)

2IN+~6)
.D'

(3) 20UT

21N- (5)

The SN75146 is characterized for operation from
OOC to 70°C.

PRODUCTION DATA documonb contain information
currant .. of publication data. P,oduCb conform to
'paclficatio.. PO' tho to,... of To.a. In.lrumonb

:'=~I~a[::I'::l,; ~::I~~:r :'l"=~:':::'~ not

Copyright © 1986, Texas Instruments Incorporated

TEXAS " ,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-453

SN75146

DUAL DIFFERENTIAL LINE RECEIVER
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS

Vcc--------~~~~---

- - - - - - - - -.....- - VCC

R1

50

740

(I

NOM

NOM

7.4 R1
OUTPUT

7.4 k(l NOM

INPUT

(I

-----'\Jvv---..
740

(I

NOM

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) ...................................... -0.5 V to 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 25 V.
Differential input voltage (see Note 2) ......................................... ± 25 V
Output voltage (see Note 1) ......................................... -0.5 V to 5.5 V
low-level output current ................................................... 50 mA
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 3):
.
D package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 725 mW'
JG package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 825 mW
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1000 mW
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . .. ooC to 70°C
Storage temperature range ......................................... -65°C to 150°C
lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package ........... 300°C
lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D and P package ....... 260°C
NOTES:

1. All voltage values, except differential input voltage, are with respect to the network ground terminal.
2. Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.
3. For operation above 25°C free·air temperature, derate the JG package to 528 mW at 70°C at the rate of 6.6 mW/oC, the
o package to 464 mW at 70°C at the rate of 5.8 mW/oC, and the P package to 640 mW at 70°C at the rate of 8 rOW/oC.
The SN75146 chips are glass mounted in the JG package.

recommended operating conditions
Supply voltage, V CC

...

Common-mode input voltage, VIC
Operating free~air temperature, T A

NOM

MAX

UNIT

5

5.25

V

0

TEXAS ..,
INSTRUMENTS
2-454

MIN
4.75

POSTJOFACE BOX 656303 • DALLAS. TEXAS 75265

25

±7

V

70

°c

8N75146

DUAL DIFFERENTIAL LINE RECEIVER
electrical characteristics over recommended ranges of supply voltage. common-mode input voltage.
and operating free-air temperature (unless otherwise noted)
PARAMETER

TEST CONDITIONS

VT

Threshold voltage IVT + and VT _ )

Vhys
VIB

Input bias voltage

VOH

High·level output voltage

VOL

Low-level output voltage

Hysteresis IVT +

See Note 4

- VT _ )

TYpt

MAX
0.2
0.4

70
0
II
VIO = 0.2 V,
0.2 V,
VIO -

10

=

VI - 3 V to 25 V or

II

Input current

Vee = 0 to 5.5 V, IVI
See Note 6
I VI

lOS

Short-circuit output current §

lee

Supply current

= -3 V to
= 10 V
= -10 V
VIO = 0.2 V
VI

Vo = 0,
VID - -0.5 V,

3.5

-25 V

6

V

0.5

V

7.8

9.5

kO

1.1

3.25

-1.6 -3.25
-40

V

V

0.35

10 - 20 mA

See Note 5,

2.4

2.5

-1 mA

UNIT

mV

2

Input resistance

ri

MIN

-0.2t
-O.4 t

mA

-75

-100

mA

35

50

mA

No load

t All typical values are et Vee = 5 V, T A = 25°C.
*The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for
threshold levels only.
§ Only one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
NOTES: 4. The expanded threshold parameter is tested with a 500-0 resisto, in series with each input.
S. ri is defined by aVl/ali.
6. The input not under test is grounded.

switching characteristics. Vee = 5 V. TA = 25°e
TEST CONDITION

PARAMETER
tpLH

Propagation delay time, low-to-high-Ievel output

tpHL

Propagation delay time, high-to-Iow-Ievel output

CL = 30 pF,

See Figure 1

MIN

TVP

MAX

100

150

300

100

150

300

PARAMETER MEASUREMENT INFORMATION
VCC+

39211.

INPUT
51

VCC+

OUTPUT

I::~~~--,.5-0%------50-%.,~:
lsee Note B)

-0.5 V

n

.~

I

I

~ tpLH

'----I4--f
tPHL

Ir---------~

lsee Note A)

3.92k!!

OUTPUT

"..

V

, , , ' - - - - 0'

______-J,

~.------VOL

VOLTAGE WAVEFORM

TEST CIRCUIT

NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: tr '" 5 ns, tf '" 5 ns, PRR '" 300 kHz,
duty cycle = 50%.

FIGURE 1. TRANSITION TIMES

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

2-455

SI75146
DUAL DIFFERENTIAL LINE RECEIVER
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE

4

OUTPUT VOLTAGE

vs

vs

DIFFERENTIAL INPUT VOLTAGE

DIFFERENTIAL INPUT VOLTAGE

4

VC~ = 4.~5 V

VCC= 5.25 V
TA = 25°C

-TA = 25°C

>I

.,
:I'"
Ci
>
...

"
S-

i

3

I
I

V,C= 0

I
I

2

"

0
I
0

V'C = ±7 VI

I
I

~IC=~

I

o
-100

-50

I

I
I V'C= 0

:VIC=±7V

I
I
I

:

I

>

:
I

I
I

I

L

I

I

o

I

I
I

I

I
I
I
I

V'C = ±7 V:

I

I

V'C = ±7 V

I
I

:

V'C=O

:
50

o

100

o

-50

-100

V/D-Differentiallnput Voltage-mV

Ii

50

100

V/D-Differential Input Voltage-mV

FIGURE 2

FIGURE 3

TYPICAL APPLICATION DATA
+12 V

>---JL

V
NOTE A: In order to meet the input-impedance and open-circuit-input voltage requirements of RS-232-C and CCITT V.2B and guarantee
open-circuit-input failsafe operation, R and V are selected to satisfy the following equations:
R
V = -1.1 - 3.3 -

r;

3 kll"

R(r;)

R + q

volts

,,7 kll

FIGURE 4. RS-232-C SYSTEM APPLICATIONS

TEXAS . . ,
2-456

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS, TEXAS 75266

SN75146

DUAL DIFFERENTIAL LINE RECEIVER
TYPICAL APPLICATION DATA
+5V

lWlSTED PAIR

+5V

+5 V

FIGURE 5. RS-422-A SYSTEM APPLICATIONS

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-457

2-458

SN75150

DUAL LINE DRIVER
0951. JANUARY 1971-REVISEO MAY 1990

•

Satisfies Requirement of EIA Standard
RS-232-C

•

Withstands Sustained Output Short-Circuit
to any Low-Impedance Voltage Between
-25 V and 25 V

•

•

D. JG. OR P PACKAGE
(TOP VIEW)

S[]B VCC+

lA
2A
GND

2-,.s Max Transition Time Through the 3 V
to - 3 V Transition Region Under Full
2500-pF Load

2
3
4

7
6
5

1Y
2Y
Vcc-

logic symbol t

Inputs Compatible With Most TTL Families

•

Common Strobe Input

•

Inverting Output

•

Slew Rate Can Be Controlled With an
External Capacitor at the Output

•

Standard Supply Voltages ... ± 12 V

t This symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe publication 617-12.

logic diagram (positive logic)

description
The SN75150 is a monolithic dual line driver
designed to satisify the requirements of the
standard interface between data terminal
equipment and data communication equipment
as defined by EIA standard RS-232-C. A rate of
20,000 bits per second can be transmitted with
a full 2500-pF load. Other applications are in
data-transmission systems using relatively short
single lines, in level translators, and for driving
MaS devices. The logic input is compatible with
most TTL families. Operation is from 12-V and
-12-V power supplies.

STR08E (1)
1 A .:;12:':)_+--L_~
2A .:.;13:;":')_ _-L_/

The SN75150 is characterized for operation from
OOC to 70°C.

PRODUCTION DATA daoum••ts contain information
c.rrant .s of pu.li..tion data. P....ucts conform to
Ipacificatio•• plr thl II.... of TI••• IlIIIrumants

=~i~·I~':.'li =:~I: :.r=~':~~ not

Copyright © 1990, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-459

8N75150
DUAL LINE DRIVER
schematic leach line driver)

vcc+ __

~~

__

~

______________.-____________________________
15 kll

11 kll

~

10 kll

INPUT ----~I-.
A

STROBE __~~__~____~~-4~

S
TO OTHER
LINE ORIVER

OUTPUT

15 kll

Y

GND---.-----4~--_.

TO OTHER
LINE DRIVER

10 kll

1 kll

47 II

TO OTHER
LINE DRIVER

VCC---~--------------------------~--------~----~~~
Resistor values shown are nominal.

TEXAS ."

INSTRUMENTS
2-460

.

POSl OFFICE BOX 666303 • DALLAS. TEXAS 75286

5N75150
DUAL LINE DRIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee + (see Note 1) ............................................ 15 V
Supply voltage, Vee _ .................................................... -15 V
Input voltage ............................................................. 1 5 V
Applied output voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 25 V
eontinuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range ...................................... oDe to 70 0 e
Storage temperature range ......................................... - 65 °e to 150 De
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package ........ , 260 0 e
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package ............ 300 0 e
NOTE 1: Voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
DERATING FACTOR
ABOVE TA -2SoC

D

TA :s 2S·C
POWER RATING
725mW

JG
P

825 mW
1000 mW

6.6 mW'oC

TA - 70·C
POWER RATING
464mW
528 mW

8.0 mW'oC

640mW

PACKAGE

5.8 mW'oC

recommended operating conditions
NOM

. MAX

UNIT

12
-12

13.2
-13.2

V
V

2
0

5.5
0.8
±15

V
V

0

70

MIN
10.8
-10.8

Supply voltage. V CC +
Supply voltage. V~CHigh-level input voltage. VIH
Low-level input voltage. VIL
Applied output voltage. Vo
Operating free~air temperature, T A

V
·C

TEXAS ."

INSTRUMENlS
POST OFFICE BOX 866303 • DALLAS. TEXAS 76285

2-461

SN75150
DUAL LINE DRIVER
electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
PARAMETER

TEST CONDITIONS

VOH

High-level output voltage

VCC+ = 10.8 V,
VIL = 0.8 V,

VCC- = -13.2 V,
RL=3kOto7kO

VOL

Low-level output voltage (see Note 2)

VCC+ = 10.8 V,
VIH = 2 V,

VCC- = -10.8 V,
RL=3kOt07kO

IIH

IlL

lOS

ICCH+
ICCH-

High-level input current

Low-level input current

ICCL-

*

tTHL
tpLH
tpHL

10

VI = 2.4 V

20

VCC+ = 13.2 V,
VCC- = -13.2 V,
VI = 0.4 V

Data input

-1

-1.6

Strobe input

-2

-3.2

2
-3

8
-8

15
-15

30
-30

10

22

-1

-10

8

17

-g

-20

V

p.A

mA
Vo = 25 V
VO= -25V

VCC- = -13.2 V,

VCC+ = 13.2 V,
VI = 3 V,

VCC- = -13.2 V,
RL = 3 kO,

Vo = 0, VI = 3 V
Vo = 0, VI = 0

10
-10

mA

mA

RL = 3 kO,

mA

TA = 25°C

12 V, VCC- = -12 V, TA = 25°C.
be shorted at a time.
in which the less positive (more negative) limit is designated as minimum, is used in this data sheet
when - 5 V is the maximum, the typical value is a more neg:ative voltage.

12 V. VCC- -

-12 V. TA - 25°C (see Figure 1)
TEST CONDITIONS
CL = 2500 pF,

Transition time, low-to-high-Ievel output
Transition time, high-to-Iow-Ievel output

RL = 3 kO to 7 kO

Transition time, low-to-high-Ievel output
Transition time, high-to-Iow-Ievel output

CL - 15 pF,

Propagation delay time, low-to-high-Ievel output
Propagation delay time, high-to-Iow-Ievel output

RL = 7 kO
CL=15pF,
RL = 7 kO

TEXAS ."

2-462

-5

1

PARAMETER

trHL
tTLH

UNIT

V

2

VCC+ = 13.2 V,
VI = 0,
TA = 25°C

switching characteristics. VCC+ tTLH

-8

MAX

Data input

Supply current from VCC +,
high-level output
Supply current from VCC _,
high-level output

t All typical values are at VCC+ =
Not more than one output should
NOTE 2: The algebraic convention,
for logic levels only. e.g.,

8

Strobe input

VCC+ = 13.2 V,
VCC- = -13.2 V

low-level output
Supply current from VCC _,
low-level output

TYpt

5

VCC+ = 13.2 V,
VCC- = -13.2 V,

Short-circuit output current f

Supply current from VCC +,
ICCL+

MIN

INSTRUMENTS
POST OFFICE BOX 866303 • DALLAS. TEXAS 76285

MIN

TYP

MAX

0.2
0.2

1.4

2

1.5
40

2

20
60
45

UNIT

""
~s

ns
ns
ns
ns

SN75150

DUAL LINE DRIVER
PARAMETER MEASUREMENT INFORMATION
3V

~*""--4""'--41~ OUTPUT

TEST CIRCUIT

S 10 ns-*-~
It
~I
s 10 ns
~=,.,-_ _=,...,;I::,_..J... - - - - - 3 V
INPUT
90%
90%
I
I 1.5 V
1.5 V
,1""'1,;,0%.;.;.-_ _ __
10%
~50"S _ _...,~~1 .
OV

14- tPHL

-+I

1+ tPLH-+!

-------~~3V

! ~-3

OUTPUT
tTHL

--t.--.I

:
V

~VVOH

-3 V € _ L _
tTLH

4-+1

VOL

VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: duty cycle S 50%. Zo = 50 II.
B. CL includes probe and jig capacitance.

FIGURE 1. SWITCHING CHARACTERISTICS

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 762~5

2-463

8N75150
DUAL LINE DRIVER
TYPICAL CHARACTERISTICS
OUTPUT CURRENT
vs
APPLIED OUTPUT VOLTAGE

20
15

Vcc+ - 12 V VI _ 2.4 V
Vcc- - -12 V
TA - 25°C

r

c:c 10
E,

E

5

8

°

~

i

o,

,

~
~ I--

- "-

:::.:::.
"

"

-,

-5

9- 10
-15

F'=

_I-- I--RL-7kll
'RL-3kll

lJ

yl -,0.4,V

-20
-25-20-15-10-5

°

5

10 15 20 25

Vo-Applied Output Vo'tage-V

FIGURE 2

APPLICATION INFORMATION

STROBE

CHANNEL 2
DATA INPUT

I
I
~f-o,.----,

I

L ~~~O_-1

ALL DIODES ARE'N752A
MIL·STD·' aac
INTERFACES
CHANNEL 2 STROBE

--,

I

CHANNEL 2
DATA OUTPUT

I

HVSTERESIS"";"'_ _ _-4t
CONTROL

CHANNEL , STROBE

FIGURE 3. DUAL-CHANNEL SINGLE-ENDED INTERFACE CIRCUIT MEETING MIL-STD-188C. PARAGRAPH 7.2.

TEXAS

-II

INSTRUMENTS
2-464

POST OFFICE BOX 666303 • DALLAS, TEXAS 75265

SN75151, SN75153
QUAD DIFFERENTIAL LINE DRIVERS WITH 3-STATE OUTPUTS
02453, DECEMBER 197B-REVISED OCTOBER 1986

SN75151
OW, J, OR N PACKAGE

•

Meets F.!A Standard RS-422-A

•

High-Impedance Output State for Party-Line
Operation

•

High Output Impedance in Power-Off
Condition

•

Low Input Current to Minimize Loading

•

Single 5-V Supply

•

40-mA Sink- and Source-Current Capability

•

High-Speed Schottky Circuitry

•

Low Power Requirements

ITOP VIEW)

1A
1Y
1Z
1C
CC
2C
2Z
2Y
2A

VCC
4A
4Y
4Z
4C
S

3C
3Z
3Y
3A

GND

description
These line drivers are designed to provide
differential signals with high current capability
on balanced lines, These circuits provide strobe
and enable inputs to control all four drivers, and
the SN75151 provides an additional enable input
for each driver. The output circuits have active
pull-up and pull-down and are capable of sinking
or sourcing 40 milliamperes.

SN75153
J OR N DUAL·IN·LlNE PACKAGE
ITOP VIEW)

1A
1Y
1Z
CC
2Z
2Y
2A

The SN75151 and SN75153 meet all
requirements of EIA Standard RS-422-A and
Federal Standard 1020. They are characterized
for operation from OOC to 70°C.

VCC
4A
4Y
4Z
S
3Z
3Y
3A

GND

FUNCTION TABLES
SN75153

SN75151

STROBE

DATA

ENABLE

CC

C

S

A

L

X

X

X

X

L
H

X

H

L

H

H

H

H

DATA

CC

S

A

L

X

X

H
H

L

H

X

L

H

H

H

H

L

Z

X

Z
Z

Z
Z

X

L

X

L

H

H

PRODUCTION DATA documants .ontain information
current as of publication data. Products conform to
specifications per the terms of Texas Instruments

Dot

ENABLE

OUTPUTS

STROBE

y

~~~~~:~~i~ai~:1~1e ~:~:~ti:fn fI~o::~:::t::-S:S

INPUTS

OUTPUTS

INPUTS
ENABLE

y

Z

Z

Z

X

L

L

L

H
H

H

H

L

Copyright © 1978, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS, 75265

2-465

SN75151, SN75153
QUAD DIFFERENTIAL LINE DRIVERS WITH 3·STATE OUTPUTS
logic symbols t
SN76151

SN76153

1C (4)

1Y

1A (1)

1Z

2C (8)
2A (9)
3C (14)
3A

3A (11)
4C (16)

4A

4A (19)

tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and lEe Publication 617-12.

logic diagrams (positive logic)
SN75153

SN75151
S
CC
1C
1A

ZC
ZA

3C
3A

4C
4A

(15)

S

(5)
CC

(4)
(Z)
(1)

(3)

(12)
(4)
(Z)

1Y
1Z

1A

(1)

(31

(7)

(5)

(9)

(11)

1Y
1Z

(6)
(8)
(9)

(7)

(6)

ZY
ZZ

2A

ZY
ZZ

(14)
(1Z)
(11)

(13)

(10)

3Y
3Z

3A

3Y
3Z

(16)
(18)
(19)

(17)

(14)

4Y
4Z

4A

(15)

TEXAS •
INSTRUMENTS
2·466

POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

(13)

4Y
4Z

SN75151. SN75153
QUAD DIFFERENTIAL LINE DRIVERS WITH 3-STATE OUTPUTS
schematic
STROBE S
TO THREE
OTHER DRIVERS
INPUT A

COMMON TO ONE
OTHER CHANNEL

VCC~~~~----~----~-----4-4----~--~--~r~-~'----~~--~----~-,

gil
OUTPUT Z

OUTPUT Y

ENABLE
CC

OTHER DRIVERS

All resistor values shown are nominal.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 2):
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1125 mW
J package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1025 mW
N package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 11 50 mW
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. O°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............ 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DW or N package ....... 260°C
NOTES:

1. All voltage values, except differential output voltage VOD, are with respect to network ground terminal.

2. For operation above 25°C free-air temperature, derate the OW package at the rate of 9 mW/oC, the J package at the rate
of B.2 mW/oC, and the N package at the rate of 9.2 mW/oC. In the J package, the chips are glass mounted.

TEXAS . . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-467

SN75151,SN75153
QUAD DIFFERENTIAL LINE DRIVERS WITH 3·STATE OUTPUTS
recommended operating conditions
MIN
4.75

Supply voltage, Vee
High-level input voltage, VIH
Low-level input voltage, VIL

NOM

MAX

5

5.25

UNIT
V

0.8

V
V

2

Common-mode output voltage, Voe
High-level output current, 10H
Low-level output current, 10L
Operating free-air temperature, T A

-0.25

8
-40
40
70

0

V
mA
mA
°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
PARAMETER
VIK

VOH

VOL

Input clamp voltage

High-level output voltage

Low-level output voltage

TEST eONDITIONSt
Vee - MIN,
II = -12 mA

ee, S
All others

Vee - MIN,
VIL = MAX,

10H

VIH = 2 V
Vee -MIN,
Vee - MAX,

IV OD21 Oifferential output voltage
Change in magnitude of
alVODI
differential output voltage §

Vee

= MIN

Vee

= MIN

alVoel

10Z

10

II

Common-mode output voltage'
Change in magnitude of
common-mode output voltage §
Off-state (high-impedancestate) output current

Output current with power off
Input current at
maximum input voltage

Vee
Vee

= MAX
= MIN

Vee

=

Vee

2.5

-40 mA

2.4

IlL

Low-level input current

Vee - MAX,
VI = 0.4 V

lOS

Short-circuit output current #

Vee = MAX

ICC

Supply current (both drivers)

Vee - MAX,
No load

-0.9

-1.5

RL

=

1000,

See Figure 1

V
V

2.8

V

±0.01

±0.4

V

1.8
1.6

3
3

V

±0.02

±0.4

V

=

-20

Vee
6 V
-0.25 V
-0.25 V to 6 V

0.1
-0.1

20

~

20
100
-100

~

±100

5.5 V

0.1

e('151), A
ee,s
e('151),A

20
80
-0.36
-1.6

VI

V

0.5

Vo = 0.5 V
Vo - 2.5 V
Vo =
Vo Vo Vo =

UNIT

3.4 2VOD2

= 40 mA
2

MAX,

High-level input current

MAX
-2

V

10 - 0

=0
=

-20 mA

MIN or MAX

Vee = MAX,
VI = 2.4 V

IIH

10L

Vee = MAX,
Enable at 0.8 V

Vee

=
=

TYP*

VIL - MAX,

= 2 V,

VIH

I V ODll Differential output voltage

Voe

10H

MIN

ee,s
-50

I

Outputs disabled
I Outputs enabled

-90

-150

30

60

60

80

mA
~

mA
mA
mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
= 25°C and Vee = 5 V except for Voe, for which Vee is as stated under test conditions.
§aIVOD I and alVoel are the changes in magnitudes of VOD and Voe, respectively, that occur when the input is changed from a high
level to a low level.
, In EIA Standard RS-422-A, Voe, which is the average of the two output lIoltages with resPactto ground, is called output offset voltage, VOS.
#Only one output should be shorted at a time, and duration of the short-circuit should not exceed one second.

*All typical values are at TA

TEXAS ..,
2-468

INSTRUMENTS
POST OFFICE BOX 655303 • DAlLAS, TEXAS 76266

SN75151, SN75153
QUAD DIFFERENTIAL LINE DRIVERS WITH 3·STATE OUTPUTS
switching characteristics,

Vee -

5 V, TA =

ooe to

PARAMETER

tplH
tpHl
tplH
tpHl
tTlH
tTHl
tpZH
tpZl
tpHZ
tPLZ

Propagation
Propagation
Propagation
Propagation

delay
delay
delay
delay

time,
time,
time,
time,

70 0 e (unless otherwise noted)

TEST CONDITIONS

low-to-high-Ievel
high-to-Iow-Ievel
low-to-high-Ievel
high-to-Iow-Ievel

output
output
output
output

MIN

MAX

15
15
13
13
12
12
18
20
19
13

30
30
25
25
20
20
35
35
30
30
10

Termination A

Cl = 30 pF, See Figure 2, Termination B

Transition time, low-to-high-Ievel output

Cl - 30 pF, Rl - 100O, See Figure 2,

Transition time, high-to-Iow-Ievel output
Outut enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level

Termination A

Overshoot factor

Typt

Cl = 30 pF, Rl = 100 0, See Figure 2,

Cl
Cl
Cl
Cl
Rl

=
-

30 pF,
30 pF,
30 pF,
30 pF,
100O,

Rl=600,
Rl - 111O,
Rl = 60O,
Rl = 111O,
See Figure 2,

See Figure 3
See Figure 4
See Figure 3
See Figure 4
Termination C

UNIT

ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%

t All typical values are at TA = 25°C.

PARAMETER MEASUREMENT INFORMATION

50

°

50

°

.,.
VOC

*

FIGURE 1. DIFFERENTIAL AND COMMON·MODE OUTPUT VOLTAGES

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75286

2-469

SN75151, SN75153
QUAD DIFFERENTIAL LINE DRIVERS WITH 3-STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
1 kll
-----'VV'
....

5 V

L-+----f-"""'III-+-'- Y OUTPUT

1-......---:----i_Ji~_:_- Z OUTPUT

Y

Y
RL - 100 Il

Z

Z

TERMINATION A

TERMINATION B
TEST CIRCUITS

25ns~

,..

-+f I 14-- '"

I'

-...r "14-- s

5 ns

1'1

~PUT

5 ns

I I

90%

90%

I

;:Ti--- 3V
I

tpLH
90%
Y OUTPUT

I

VOL

I

I -+t
14

I4-tTLH

90%1

90%
Z OUTPUT

I+-ITHL

~I

tpHL

1.5 V
10%

I

1.5 V
10%

I
I+-tTHL
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: Zout = 50 Il. PRR '" 10 MHz.
B. Cl includes probe and jig capacitance.

FIGURE 2. tPLH. tPHL. tTLH. tTHL. AND OVERSHOOT FACTOR

2-470

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS, TEXAS 75265

TERMINATION C

SN75151, SN75153
QUAD DIFFERENTIAL LINE DRIVERS WITH 3·STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION

,-----,

r-~~--~I~
I

*'

I

I

I

CL-30pF
(See Note 81

I

I
I
I
I
L

I
I
I
I
___ J

~I~--~--OUTPUT

I
I
CL-30pF

I
-::I:' (See
Note 81
L ____________
____
~

I

I

~

1 kO

5V
TEST CIRCUIT

:s 5

~

ns..-!

iI-::~_--:=.,..I~
90%
90%
I
1.5V

I

- -

-3 V

I

1.5 V

I

~100 ns-----+! ,,1.;,;0;';'%;;""_0 V
~tpZH

I

1/
OUTPUT

I

/1.5 V

_ _ _. J '

I

I

I

I

~--;- VOH
I

0.5 V

tPHZ-\.--.J

Voff = 0 V

VOLTAGE WAVEFORMS

FIGURE 3. tPZH AND tPHZ
NOTES: A. The pulse generators have the following characteristics: Zout = 50 0, PRR
B. CL includes probe and jig capacitance.

:s

500 kHz.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75285

2-471

SN75151, SN75153
QUAD DIFFERENTIAL LINE DRIVERS WITH 3·STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION

T....

CL-30pF
(see Note BI
SV
RL-1110

1 kO

~I:-O---""'--'OUTPUT

I
I
I

I

T

CL-30pF
(see Note BI

I

I

lL-------------~-----~
TEST CIRCUIT

1.SV

1.SV

I

I 10%
,.--100 ns~ -....;.;;.;.;;"..--- 0 V

I

j4-tpZL-.I
I

I
I
I
If- tPLZ-.t

I
I

I

OUTPUT

Xz5

:r-q.

V

.

-

5V

,-VOL

VOLTAGE WAVEFORMS

FIGURE 4. tPZL AND tPLZ
NOTES: A. The pulse generators have the following characteristics: Zout
B. CL includes probe and jig capacitance.

=

50 0, PRR

TEXAS . "
INSTRUMENTS
2-472

POST OFFICE BOX 665303 • DALLAS, TEXAS 15266

s 500 kHz.

SN75151, SN75153
QUAD DIFFERENTIAL LINE DRIVERS WITH 3-STATE OUTPUTS
TYPICAL CHARACTERISTICS
y OUTPUT VOLTAGE
vs
DATA INPUT VOLTAGE

5

No LO~d
TA - 25°e

Vee - 5.5 V

4

>

Vee - 5 V

.
I

i>'"
;
CI.
;

0

Vee - 4.5 V

3

2

I

0

>

o

o

3

2
VI-Data Input Voltage-V

FIGURE 5
Y OR Z OUTPUT VOLTAGE
vs
ENABLE INPUT VOLTAGE

Y OR Z OUTPUT VOLTAGE
vs
ENABLE INPUT VOLTAGE

4

6

Load -470!l
to Ground
See Note 3
3 -TA = 25°e

-

>

.
I

>
;

Vee - 5 V

5

Vee = 5 V

.,I
.
:a'"
>
;

2

S-

Load - 470 !l to Vee
TA - 25°e
See Note 4

Vee - 4.5 V

>

Vee - 4.5 V

i'"

Vee - 5.5 V

Vee - 5.5 V

4

3

5

"I

'I

>

>

0

0

0

0

o

2

o

o

3

2

o

3

FIGURE 7

FIGURE 6
NOTES:

2
VI-Enable Input Voltage-V

VI-Enable Input Voltage-V

3. The A input is connected to Vee during the testing of the Y outputs and to ground during testing of the Z outputs.
4. The A input is connected to ground during the testing of the Y outputs and to Vee during the testing of the Z outputs.

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DAlLAS, TEXAS 75265

2-473

SN75151, SN75153
QUAD DIFFERENTIAL LINE DRIVERS WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

>

..
I

i'"

3

~

..'"

IOH - -20 mA
IOH -

>

.c

..
I

-i>'"

0

~

>

See Note 3

4

;;

Vcc - 5 V

5

>
;

~

0

40mA

1..

3

.'11
:c
I
:c

>

>

0

o

.~ .........
-...,1\
r- ~:r:iCC" 45
-~.~
-...,\
........ "CC .. 5 "

2

__

10

~

__

20

~

__

30

~

__

40

~

__

50

~

__

60

L-~

70

o

80

o

-20

TA - Free-Air Temperature- °C

-40

FIGURE 9

LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

LOW-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

0.6r--'1---'-1~---.---r--~--.-~

I

~
;

~

o

~
~I
...o

>

VCC - 5'V
IOl - 40 mA
See Note 4 -t----t--+---t---1f--I

0.5

0.4 f--I---+---r---j----I----j---+---I
0.3 f--I---+---r---j----I----j---+---I
0.2 f--I---+---r---j----i----t---+---I

>

.
I

!'"0
>
;

~

0

1
-t
~

...I
...
0
0

0.1f---1---+---+---l----i----t---+---I
OL-~

o

__- L__

10

20

~-J

30

__

40

-100

-80

-60

IOH-High-level Output Current-mA

FIGURE 8

:8.
!

TA - 25°C
See Note 3

0

O~~

>

~Cc '.. sl~

~

2

:c
I
:c

.2'

----

-r- r--

4

6

~

__

50

~

60

__

L-~

70

80

>

1.0
TA - 25°C
0.9 See Note 4
0.8

J

0.7
0.6
0.5
'liCe
0.4

0.1

o

1l.~'11

~ ~Cc"

0.3
0.2

..

.dI'
o

~

V/

tz, 'II
tz,.

~

20

40

60

80

100

120

IOl -low-Level Output Current-mA

TA - Free-Air Temperature
FIGURE 10

FIGURE 11

NOTES: 3. The A input is connected to Vee during the testing \If the Y output. and to ground during testing of the Z outputs.
4. The A input is connected to ground during the testing of the Y outputs and to Vee during the testing of the Z inputs.

2-474

TEXAS •
INSTRUMENTS
POST OFFIc;e BOX 656303 • DALLAS, TEXAS 75265

SN75151, SN75153
QUAD DIFFERENTIAL LINE DRIVERS WITH 3·STATE OUTPUTS

TYPICAL CHARACTERISTICS
SUPPLY CURRENT

vs

SUPPLY VOLTAGE

SUPPLY VOLTAGE

80

E 60
I
c 50

$

~::I

CI.
::I

70

A Inputs Grounde0V

..

>
ii

80

~

70

oct

CJ

SUPPLY CURRENT

vs

;;

40

60

E

50

::I

()

~
Q.

::I
III

,

(I)

I

()

CJ 20

J"

9

10

o
o

,

~

I' A Inputs Open

~, f

30

IY---1-....-l

I
I

2.7 k!1

L __________________

I

~

Component values shown are nominal.
Substrate

th ...

NOTE 1: When VCel is used, VCC2 may be left open or shorted to VCCI. When VCC2 is used, VCCI must be left open or connected
to the threshold control pins.

2-478

TEXAS..If

INSTRUMENTS
POST OFFICE SOX 655303 • DAL1.AS. TEXAS 75285

SN75154
QUADRUPLE LINE RECEIVER

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Normal supply voltage, VCCl (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Alternate supply voltage, VCC2 ................................................ 14 V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 25 V
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range ...................................... OOC to 70°C
Storage temperature range ......................................... - 65 °C to 1 50°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............ 300°C
Lead temperature 1,6 mm (1/16 inch) from case 'for 10 seconds: D or N package ........ 260°C
DISSIPATION RATING TABLE
PACKAGE

TA"; 25·C

DERATING FACTOR

POWER RATING

ABOVE TA - 25·C
7.6 mW/oC

D
N

950mW

TA - 70·C
POWER RATING
608 mW

1025 mW

8.2 mW/oC

656 mW

1150mW

9.2 mW/·C

736 mW

recommended operating conditions
Normal supply voltage, VCCl
Alternate supply voltage, VCC2
High-level input voltage, VIH (see Note 3)
Low-level input voltage. VIL (see Note 3)

MIN

NOM

MAX

4.5

5

5.5

UNIT

v

10.8

12

13.2

V

3

15

V

-15

-3

V

High-level output current, IOH

-400

p.A

loW-level output current. IOL

16

mA

70

·C

Operating free-air temperature. T A

0

NOTES: 2. Voltage values are with respect to network ground terminal.
3. The algebraic convention, where the less positive (more negative) limit is designated as minimum. is used in this data sheet
for logic and threshold levels only, e.g., when 0 V is the maximum, the minimum limit is a more negative voltage.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 75285

2-479

SN75154
QUADRUPLE LINE RECEIVER
electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
TEST

PARAMETER
VT+
VT-

Positive-going

Normal operation

threshold voltage

Fail-safe operation

Negative-going

Normal operation
Fail-safe operation

threshold voltage

1
1

Normal operation

Vhys

Hysteresis (VT + - VT _)

VOH

High-level output voltage

1

10H = -400 pA

VOL

Low-level output voltage

1

10L - 16 mA
AVI = -25Vto -14V
AVI = -14Vto -3V

ri

1

Fail-safe operation

Input resistance

2

Short-circuit output current t

ICCl

Supply current from VCCl

ICC2

Supply current from VCC2

MAX UNIT

0.8

2.2

3

0.8

2.2

3

-3

-1.1

0

0.8

1.4

3

0.8

3.3

6

0

0.8

2.2

2.4

3.5
0.4

3

5

3

5

7
7

AVI- -3Vt03V

3

6

8

AVI = 3 V to 14 V

3

5

7
7

AVI = 14Vt025V

3

5

11- 0

0

0.2

2

4

VCCl = 5.5 V, VI = -5V

-10

-20

-40

5

V
V
V
V

0.29

3

Vl(open) Open-circuit input voltage
lOS

MIN TYP*

TEST CONDITIONS

~IGURE

VCCl = 5.5 V, TA = 25°C

20

35

VCC2 - 13.2 V,TA - 25°C

23

40

TYP

MAX

V

kll

V
mA
mA

tNot more than one output should be shorted at a time.
;AII typical values are at VCCl = 5 V, TA = 25°C.

switching characteristics. VCC1 = 5 V. TA

=

25°C. N

10

TEST

PARAMETER

TEST CONDITIONS

FIGURE

MIN

UNIT

tpLH

Propagation delay time, low-to-high-Ievel output

11

ns

tpHL

Propagation delay time, high-to-Iow-Ievel output

8

ns

tTLH

Transition time, low-to-high-Ievel output

7

ns

lJHL

Transition time, high-to-Iow-Ievel output

2.2

ns

6

CL = 50 pF,

RL=3901l

TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE vs INPUT VOLTAGE

if---

4

>I

i!I.

VCCl =5V
TA=25"C

3

~
5

if---

NORMAL , __

~

FAILSAFE:,
OPERATIOj

O,ERATI,ON-

if---

2

~

See Note 4

VT_

VT_

VT+

rf---

0
I
0

>
If--0

-25

-4

-3

-2

-1

0

1

2

3

4

r~25

VI-Input VQltage-V
NOTE 4: For normal operation, the threshold controls are connectd to VCC1. For fail-safe operation, the threshold controls are open.

TEXAS . "

2-480

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN75154
QUADRUPLE LINE RECEIVER

PARAMETER MEASUREMENT INFORMATION

d-c test circuits t
TEST TABLE
MEASURE

A

T

Y

VCCl
(PIN 15)

Open-circuit input

VOH

Open

Open

IOH

4.5 V

Open

(fail safe)

VOH

Open

Open

IOH

Open

10.8 V

VT+ min,
VT _ min (fail safe)

VOH

0.8 V

Open

IOH

5.5 V

Open

VOH

0.8 V

Open

IOH

Open

13.2 V

VOH

Note A

Pin 15

IOH

5.5 V and T

Open

VOH

Pin 15

IOH

T

13.2 V

Pin 15

IOH

5.5 V and T

Open

Pin 15

IOH

T

13.2 V

TEST

VT + min (normal)

VCC2
(PIN 16)

VIL max,
VT _ min (normal)

VOH

Note A
-3 V

VOH

3V

VIH min, VT + max,
VT _ max (fail safel

VOL

3V

Open

IOL

4.5 V

Open

VOL

3V

Open

IOL

Open

10.8 V

VIH min, VT + max
(normal)

VOL

3V

Pin 15

IOL

4.5 V and T

Open

VOL

3V

IOL
IOL

T
5.5 V and T

10.8 V
Open

IOL

T

13.2 V

VT _ max (normal)

VOL

Note B

Pin 15
Pin 15

VOL

Note B

Pin 15

NOTES: A. Momentarily apply -5 V, then 0.8 V.
B. Momentarily apply 5 V, then ground.

FIGURE 1, VIH. VIL. VT +. VT -. VOH. VOL
t Arrows indicate actual direction of current flow. Current into a terminal is a positive value.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 75266

2-481

SN75154
QUADRUPLE LINE RECEIVER

PARAMETER MEASUREMENT INFORMATION

d-c test circuits t (continued)

TEST TABLE

VCCl

VCC2

(PIN 15)

(PIN. 16)

Open

5V

Open

Open

Open

Open

GND
Open

Pin 15

T and 5 V

Open

GND

GND

Open

Open

Open

12 V

Open

Open

GND

Pin 15

T

12 V

Pin 15

T

GND

Pin 15

T

Open

T

.»----'-41-- OPEN

FIGURE 2.

5.5 V

do---ro--

rj

13.2 V

TEST TABLE
T

OPEN

r- T - -VCC1- _..l.,
VCC2
R1 I

lA

y

_--t~.D'

VUopon)

~

Open
Pin 15
Open

OPEN

VCCl

VCC2

(PIN 15)

(PIN 16)

5.5 V
5.5 V

Open

I
I
L..----.r----

Open

Open

Pin 15

13.2 V
13.2 V

T

GND

j

FIGURE 3. Vl(openl

5.5 V

3
CC1

OPEN

r
5V

-5V

I
L._ -

-~.f

I

IA
IL..

----...I

T

I

} : : - 13.2 V

0

•

OPEN

- -VCCI- -VCC2

_J..,
Rl

lJ
____
~D

~

FIGURE 4. lOS

FIGURE 5. ICC

t Arrows indicate actual direction of current flow. Current into a terminal is a positive value.

TEXAS

.Jf

INSTRUMENTSi
POST OFFICE BOX 866303 • DAUAS. TEXAS 752815

yl
I

_ _ _ _ .J

All four line receivers .,. tested simultaneously.

Each output is tested separately.

2-482

Open

OPEN

5N75154
QUADRUPLE LINE RECEIVER
PARAMETER MEASUREMENT INFORMATION
INPUT

OUTPUT

5V

(Sea Nota C)

PULSE
GENERATOR
(Sea Note A)

*

I

I

GND

L-----r-----..J

'J'

CL=50pF
(S•• Not. B)

TEST CIRCUIT

J..........I.- 10 ±2 ns

Ie--.j- 10 ±2 ns
I

I

I

bf~'=90:::%~-----~90::::%~, - : INPUT
10%

!/

--......;.;~.y.

II

-

-

-

-

-

-

tPHL

j+-

I

0

~ tPLH

I 1.5 V

0.8 V _ _ _ _ _~0.8:;;";';V
~1.;.;.;...;..

I

I

I

:

_ _I _ _ _ _ _ _ VOL
I

~

~2V'----VOH

1

1.5 V

I
tTHL--.j

14I

2V~1
:

5V

OV
-5 V

(

I

OUTPUT

-

410%

I

---I

-

I

---.j

I
I
)4-tTLH

VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: Zo = 50 fl. tw '" 200 ns, duty cycle", 20%.
B. CL includes probe and jig capacitance.
C. All diodes are 1 N3064.

FIGURE 6. SWITCHING TIMES

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-483

2-484

5N75155

LINE DRIVER AND RECEIVER
02951, JULY 1986-REVISED AUGUST 1989

•

Meets EIA Standard RS-232-C

•

10-mA Current Limited Output

•

Wide Range of Supply
Voltage ... VCC - 4.5 V to 15 V

•

Low Power ... 130 mW

•

Built-In 5-V Regulator

•

Response Control Provides:
Input Threshold Shifting
Input Noise Filtering

DB

0, JG, OR P PACKAGE
(TOP VIEW)

Vee-

DA
RY
GND

2
3
4

7
6
5

Vee+
DY
RTe
RA

logic symbol t
I>
DA (2)

•

Power-Off Output Resistance •.. 300 0 Typ

•

Driver Input TTL Compatible
RA (5)

description
The SN75155 is a monolithic line driver and
receiver that is designed to satisfy the
requirements of the standard interface between
data
terminal
equipment
and
data
communication equipment as defined by EIA
standard RS-232-C. A Response Control input
is provided for the receiver. A resistor or a
resistor and a bias voltage can be connected
between the response control input and ground
to provide noise filtering. The driver used is
similar to the SN75188. The receiver used is
similar to the SN75189A.

I>
II

RTC
tThis symbol is in accordance with ANSI/IEEE SId 91-1984 and
·IEC Publication 617-12

logic diagram

VCC_~(~1)~--------~
VCC+~~----~--'

DA

....:.;:;~----t--I

The SN75155 is characterized for operation from
OOC to 70°C.
.

RA...;.;;.;-----f

RTC-'-"'----....

PRDDUCTIDII DATA documents contoln information
current I. af publication datI. Products canform to
specifications par tbe terms of TaXI. Instruments

::~:~riI~·t.':I':!1.i ~::I:~i:; :'l":o"::~~ not

Copyright © 1989, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

2-485

SN75155
LINE DRIVER AND RECEIVER
schematic
__________________________________________,

OA~I~21

vcc+~18~1~----~~~~----------------------------1-----~--~--~

RA~15~1_+----_r3~.5~kD--._~~
GND~14~1__----~----_+-f-4~-4~~~~~--~~-{

+---'

RTC ..,:.16"'-____________

VCC_~ll~I------------~--------~----_+----------~~~--~-----4~
All resistor values shown are nominal.

absolute maximum ratings Qver operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC + (see Note 1) ............................................ 15 V
Supply voltage, VCC _ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -15 V
Input voltage range:
Driver.......................................... - 15 V to 15 V
Receiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 V to 30 V
Output voltage range (Driver) ......................................... -15 V to 15 V
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. OoC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package. . . . . . . . . . .. 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package . . . . . . . .. 260°C
OTE:

1. AU voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE

D
JG

TA s 25·C
POWER RATING
726 mW
825 mW

ABOVE TA - 25·C
5.8 mW/oC
6.6 mW/oC

TA - 70·C
POWER RATING
464mW
528 mW

P

1000mW

8.0 mW/oC

640mW

PACKAGEt

DERATING FACTOR

t In the JG package, SN75155 chips are glass mounted.

TEXAS . .
2-486

INSTRUMENTS
POST OFFICE BOX 655303 • DAlLA$. TEXAS 75285

SN75155
LINE DRIVER AND RECEIVER

recommended operating conditions
MIN

NOM

MAX

Supply voltage, Vcc +

4,5

12

15

Supply voltage, VCC-

-4,5

-12

-15

V

±15

V

25

V

Input voltage, driver, VII D)
-25

Input voltage, receiver, VI(R)

V

V

2

High-level input voltage, driver, VIH

UNIT

0,8

Low-level input voltage, driver, VIL

V

Output current, receiver, IO(R)

24

rnA
rnA

Operating free-air temperature, T A

70

°c

± 5,5

Response control current

°

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
total device
PARAMETERS

ICCH+

High-level supply current

TEST CONDITIONS
~

5 V,

VCC-

~

-5 V,

VII D)

VCC+

~

9 V,

VCC-

~

VCC+ - 12 V,
VCC+ = 5 V,
ICCL+

Low-level supply current

VCC+

ICCH-

Supply current

High-level supply current

Low-level supply current

14

0,8 V,

2,5

3.4

VIIRI ~ 0,6 V,

3,7

5,1

4,1

5,6

4,8

6.4

~

6,7

9,1
-3,1

VCC-

~

-5 V,

VIID)

~

-9 V,

~

-12 V,

12 V,

VCC-

~

VCC+

~

5 V,

VCC-

~

0,

~

9 V,

VCC-

~

0,

VIID)

VCC+

~

5 V,

VCC-

VCC+

~

9 V,

VCC-

~

12 V,

VCC-

VCC+

~

5 V,

VCC-

VCC+

~

9 V,

VCC-

~

12 V,

VCC-

VCC+

8,1
11,9

Output open

~

MAX

6,3
9,1

VIIR) ~ 2,3 V,

-12 V,

VCC-

Typt

10.4

-9 V,

VCC+

VCC+
ICCL-

2 V,

VCC- -

9 V,

~

~

Output open
VIIR) ~ 2,3 V,

VCC+
ICC+

MIN

VCC+

°

~

-5 V,

~

-9 V,

VIID)
VIIR) ~ 2,3 V,

-2.4
-3,9

-4,9

~

-12 V,

Output open

-4,8

-6,1

~

-5 V,

ViID) ~ 0,8 V,

~

-9 V,

VIIR) ~ 0,6 V,

-0,25

~

-12 V,

Output open

-0.27 -0.45

~

2 V,

UNIT

rnA

rnA
rnA
rnA

-0,2 -0,35
-0.4

rnA

t All typical values are at T A ~ 25°C,

TEXAS ."
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, HXAS 75265

2-487

SN75155

LINE DRIVER AND RECEIVER
electrical characteristics over recommended operating free-air temperature range, Vcc+ - 12 V,

Vcc- = -12 V (unless otherwise noted)
driver section
PARAMETER

TEST CONDITIONS

vcc+ = 5 V,

VOH High-level output voltage VIL

VOL

Low-Level output voltage

= 0.8 V,

VIH = 2 V,

(see Note 2)

IIH

High-level input current

VI - 7 V

IlL

Low-level input current

VI - 0

High-level short-circuit

laSH

output current

Low-level short-circuit
10SL
RO

output current

Output resistance
with power off

RL

=

3 kll

RL

=

3 kll

Vcc- = -5 V
VCC+ - 9 V, VCC- - :"'9·V
VCC+ - 12 V, VCC- = -12 V
5V
VCC+ - 5 V, VCC- VCC+ - 9 V, VCC- - -9 V
VCC+ = 12 V, VCC- = -12 V

MIN

Typt

3.2
6.5
8.9

3.7
7.2
9.B
3.6
-7.1
-9.7
-0.73

VI

= O.B

VI

=

V,

2 V,

MAX

UNIT

V
3.2
-6.4
-B.B
5
-1.2

mA

V
p.A

Va

=

0

-7

-12 -14.5

mA

Va

=

0

6.5

11.5

mA

15

Va

=

-2Vt02V

II

300

receiver section (see Figure 1)
PARAMETER

VT+
VT':

TEST CONDITIONS

Positive-going
threshold voltage
Negative-going
threshold voltage

Vhys Hysteresis
VCC+ = 5 V,
10H = 10 p.A
VCC+ - 12 V,
VI - 0.6 V,
VCC+ - 5 V,
10H = 0.4 mA
VCC+ = 12 V,
VI - 2.3 V,
10L - 24 mA
VI = 25 V
VI = 3 V
VI = -25 V
VI = -3 V
VI = 0.6 V
VI = 0.6 V,

VOH High-level output voltage

VOL

Low-level output voltage

IIH

High-level input current

IlL

Low-level input current

lOS

Short-circuit output current

VCC- = -5 V
VCC- - -12 V
VCC- - -5 V
VCC- = -12 V

MIN

Typt

MAX

1.2

1.9

2.3

V

0.6

0.95

1.2

V

4.1
4.7
3.4
4
0.2
6.7
0.67
-6.7
-0.67
-2.8

4.5
5.2
3.B
4.5
0.3
10
1
-10
-1
-3.7

0.6
3.7
4.4
3.1
3.6
3.6
0.43
-3.6
-0.43

UNIT

V

V

V
mA
mA
mA
mA
mA

t All typical values are at T A = 25 ·C.
NOTE 2: The algebraic limit system, in which the more po.sitive (less negative) limit is designated as maximum, is used in this data sheet
for logic voltage levels only, e.g., if - B.B V is the maximum, the typical value is a more negative value.

TEXAS •
2-488

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TEXAS 76266

SN75155

LINE DRIVER AND RECEIVER
switching characteristics over recommended operating free-air temperature range.
VCC"': - -5 V. CL - 50 pF (unless otherwise noted)

Vcc+ -

5

V.

driver section (see Figure 2)
PARAMETER

TEST CONDITIONS

tpLH Propagation delay time, low-to-high-Ievel output
tPHL Propagation delay time high-to-Iow-Ievel output
tr

Output rise time

tf

Output fall time

RL

=

RL
RL

=
=
=
=

RL
RL

MIN

3 kll
3 kll
3 kll to 7 kll,

=

CL

2500 pF

3 kll
3 kll to 7 kll,

=

CL

2500 pF

Typt

MAX

250

480

80

150

67

180

ns

2.4

3

ps

48

160

ns

1.9

3

ps

UNIT
ns

receiver section (see Figure 3)
PARAMETER

TEST CONDITIONS

tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output

RL

MIN

Typt

MAX

175

245

UNIT

= 40011
= 40011

37

100

255

360

ns

23

50

ns

tr

Output rise time

RL

tf

Output fall time

RL-40011

ns

t All typical values are at TA = 25°C.

PARAMETER MEASUREMENT INFORMATION
vcc

VT, VI

j+IOL

RESPONSE
CONTROL

1

OPEN
UNLESS
OTHERWISE I C C
SPECIFIED

"

VOH

it-

\

iRC

RC
vc

i

+vC

VOL

11
"::"

"::"

FIGURE 1. RECEIVER SECTION TEST CIRCUIT (VT +, VT -. VOH. VoLl

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-489

SN75155

LINE DRIVER AND RECEIVER
PARAMETER MEASUREMENT INFORMATION

INPUT

~H~-""'-- OUTPUT

CL-50pF
(See Note AI

. ---1:'

INPUT

\~5~---3V

'/'.5 V

I

(See Note BI

t4I

tPHL-+I

0 V

~

--:9:-:0~%"':!I...1

OUTPUT

VOLTAGE WAVEFORMS

TEST CIRCUIT

NOTES: A. CL includes probe and jig capacitance.
B. The input waveform is supplied by a generator with the following characteristics: Zout = 500, tw = 1 ,..., tr oS IOns, tf oS IOns.

FIGURE 2. DRIVER SECTION SWITCHING TEST CIRCUIT AND VOLTAGE WAVEFORMS

OUTPUT

5V
,-----"",

RESPONSE
CONTROL

INPUT

12 V

-.-II .

INPUT

I
tPHL-+I

(See Note BI

------4V

~I 2' V

l'\\..______

0 V

I
14f---.....
...
1-

VOLTAGE WAVEFORMS

TEST CIRCUIT

NOTES: A. CL includes probe and jig capacitance.
B. The input waveform is supplied by a generator with the following characteristics: Zout = 500, tw = 1 ,..., tr oS IOns, tf oS IOns.

FIGURE 3. RECEIVER SECTION SWITCHING TEST CIRCUIT AND VOLTAGE WAVEFORMS

TEXAS . "

INSTRUMENTS
2-490

POST OFFICE BOX 856303. DALLAS, TEXAS 75285

SN75155

LINE DRIVER AND RECEIVER
TYPICAL CHARACTERISTICS
(DRIVER)
OUTPUT CURRENT
vs
OUTPUT VOLTAGE

VOLTAGE TRANSFER CHARACTERISTICS

20r--r--~-r--r--r--r--r~r-~~

10
TA - 25°C
RL = 3 k!l-

Vcc± - ±12 V
8

6

>
I

4

!!

2

>
:;

o

&

'0

~

o

I

o
>

f...- Vr C ±\ -

ti

16

9

~
I

VCC± = ±5V

C
~

"

()

~
'$
o
I
o

-2
-4

12~+-+-~4=~~~~~~
81----+--I--lI--+-A-+_
41----+-~_.d_+_-+1-i­

Ol----+-~~+-~~~~~~L-+_~

-4
-8

- - 12 f...--Ir---I--M-=-+=.""""''''--I----+---I--+---l

-6

-16

-8

H~q-l-+-

_20UL-L-J_L--L~_L--L~_L-~

-10
1

1.2

1.4
1.6
1.8
VI-Input Voltage-V

-12

-20

2

FIGURE 4

10

VI = H

VCC+ = 12 V
VCC- - -12 V
Vo - 0

~

i:=FALL

5

e"

t:

20

f...-RIS~
~ 100

>
I

~

0

a:

-5

iii

.1::

C3

12 16

VCC+ = 12 V
12 V
VCC- =
TA - 25°C

,

400

~

&

o"

8

1000
IOSL

C

:;

4

SLEW RATE
vs
LOAD CAPACITANCE

15

8

0

FIGURE 5

SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE

~I

-4

YO-Output Voltage-V

40

.,~

.,g

10
4

III

~ -10

IOSH

9

VI - L
-15
o

10
20
30
40
50
60
TA - Free-Air Temperature - °c

70

1
10

100
1000
CL -Load Capacitance-pF

10000

FJGURE 7
FIGURE 6

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-491

5N75155

LINE DRIVER AND RECEIVER
TYPICAL CHARACTERISTICS
(RECEIVER)
OUTPUT VOLTAGE
vs
INPUT VOLTAGE
RC

5

> 4
I

.

II>
CD

-5

>

~

3.9 k!l
RC

Vc - 5V

1-

O~EN- r--

RC- 2Ok!l
Vc - -5 V

VCC+ = 12 V
VCC- - -12 V
TA - 25°C

3

~

VT+

VT+

'$ 2

VT+

o
I

o

VT-

VT-

>

o

-5

-4

-3

VT-

-1
o
VI-Input Voltage-V

-2

2

3

5

4

FIGURE 8
OUTPUT VOLTAGE
vs
INPUT VOLTAGE
RC = 10 k!l
V = 12 V

5

> 4

.
I

Rc l

~ O~EN

RC - 20 kllJ.

I - - -VC - -12V

VCC+ _ 12 V
VCC- _ -12 V
TA - 25°C

CD

~

~ ;3
'$
CI.
'$ 2

VT+

VT+

o
I
o
>

VT-

VT-

o

-5

-4

-3

-2

-1
o
VI-Input Voltage-V

FIGURE 9

TEXAS •
INSTRUMENTS
2-492

POST OFFICE BOX 655303 • DALLAS. TEXt'S 75266

VT+

VT-

2

3

4

5

SN75155
LINE DRIVER AND RECEIVER

TYPICAL CHARACTERISTICS
(RECEIVER)
INPUT CURRENT
vs
INPUT VOLTAGE

INPUT THRESHOLD VOLTAGE
vs
FREE-AIR TEMPERATURE

10

3
Vcc+ .. 12 V
VCC- = -12 V
2.5

-

I

'""

2

0

>

".s:"0
.,


~

TA = 25°C

8 VCC+ = 12 V

V
V

-8
-10

o

10

20

30

40

50

60

-25-20-15-10 -5

70

0

5

10

15

20 25

VI-Input Voltage-V

TA -Free-Air Temperature- °C

FIGURE 11

FIGURE 10
NOISE REJECTION

9

1\
\
\
\

\ \
\
\

VCC+ = 12 V
VCC_=-12V
JTA = 25°C

IY

iCc
'CC
UC C
L!CC
Cc

'- .......

......

\
\
\

"

t-"

- 1000 pF
= 500 pF
= 300 pF
= 100 pF
= 10 pF

¥'

o

10

'-

1000
100
tw - Pulse Duration - ns

10000

FIGURE 12

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-493

2-494

SN75159
DUAL DIFFERENTIAL LINE DRIVER
WITH 3-STATE OUTPUTS
02325, JANUARY 1977-REVISEO SEPTEMBER 1986

•

D, J, OR N PACKAGE
(TOP VIEW)

Meets EIA Standard RS-422-A

•

Single 5-V Supply

•

Balanced Line Operation

•

TTL-Compatible

•

High-Impedance Output State for Party-Line
Applications

•

High-Current Active-Pull-Up Outputs

NC
lZ
lY
lA
18
lEN
GND

•

Short-Circuit Protection

NC ~ No internal connection

•

Dual Channels

•

Clamp Diodes at Inputs

VCC
2Z
2Y
28
2A
2EN
NC

description
The SN75159 dual differential line driver with three-state outputs is designed to provide all the features
of the SN75158 line driver with the added feature of driver output controls, There is an individual control
for each driver. When the output control is low, the associated outputs are in a high-impedance state and
the outputs can neither drive nor load the bus, This permits many devices to be connected together on
the same transmission line for party-line applications,
The SN75159 is characterized for operation from

logic symbol t

(6)

lEN
(4)
lA
18
ZEN
ZA
28

(5)

ooe

to 70 oe,

logic diagram (positive logic)
&C>
EN

lEN
'Q
'Q

(3)

1Y

lA

12

lB

(9)

(10)
(11)

Z2

lY
12

ZEN
ZA
ZB

(1Z)
(13)

ZY
Z2

Copyright © 1986. Texas Instruments Incorporated

PRODUCTION DATA documents contain information

=~~~~:~~i~ar::I~~e ~!:ti~~ti:; ~~O::;::::t:~~S not

(Z)

ZY

t This symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEG Publication 617-12.

current as of publication datB. Products conform to
specifications per the terms of Tens Instruments

(3)

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-495

SN75159
DUAL DIFFERENTIAL LINE DRIVER
WITH 3·STATEOUTPUTS
schematic (each driver)
INPUT B
1141
VCC-e~-'--~--4--,

15, 111

INPUT A
14, 101 ~-.--_ _~-I--I-----_---4----"'--,

4 kll

911

911

13,121

12.131

OUTPUT

OUTPUT
Z

Y

'v
4 kll

OUTPUT
CONTROL

16,91

GND~17~1____~______~-.~

w...

VCC bus

Resistor values shown are nominal.

TEXAS .."
2-496

INSTRUMENlS
POST OFFICE BOX 855303 • DALLAS,· TEXAS 75286

SN75159
DUAL DIFFERENTIAL LINE DRIVER
WITH 3-STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Off-state voltage applied to open-collector outputs .................................. 12 V
Continuous total dissipation at (or below) 25°C free-air. temperature (see Note 2):
D package ......................................................... 950 mW
J package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1025 mW
N package ........................................................ 1150 mW
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . .. O°C to 70°C
Storage temperature range ......................................... - 65°C to 1 50°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............ 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package ........ 260°C
NOTES:

1. All voltage values except differential output voltage VOD are with respect to the network ground terminal. VOD is at the Y
output with respect to the Z output.
2. For operation above 25°C free-air temperature, derate the D package to 608 mW at 70°C at the rate of 7.6 mw/oe. the
J package to 656 mW at 70°C at the rate of 8.2 mw/oe, and the N package to 736 mW at 70°C at the rate of 9.2 mw/oe.
In the J package, SN75159 chips are glass mounted.

recommended operating conditions
Supply voltage, Vee

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

2

High-level input voltage, VIH
Low-level input voltage, VIL
High-level output voltage, IOH
Low-level output current, IOL
Operating free-air temperature. TA

0

V
0.8

V

-40

mA

40

mA

70

°e

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303· DALLAS. TEXAS 75265

2-497

SN75.159
DUAL DIFFERENTIAL LINE DRIVER
WITH 3·STATE OUTPUTS
electrical characteristics over operating free-ai.r temperature range (unless otherwise noted)
PARAMETER
VIK
VOH

TEST CONDITIONS

Input clamp voltage
High-level output voltage

VOL

Low-level output voltage

VOK

Output clamp voltage

~- Output voltage

*

Common-mode output voltage §
ehange in magnitude of

alVoel

10

11= -12 mA

Vee - 4.75 V,

VIL - 0.8 V,

VIH = 2 V,

10H = -40 mA

Vee - 4.75 V,

VIL - 0.8 V,

VIH = 2 V,
Vee = 5.25 V,

10L = 40 mA
10 = -40 mA

Vee = 4.75 V to 5.25 V,

I V ODll Differential output voltage
I V OD21 Differential output voltage
Change in magnitude of
alVODI
differential output voltage
Voe

Vee = 4.75 V,

common-mode output voltage:t:
Output current with power off

Vee - 5.25 V,

MIN

2.4

10 = 0

RL = 100O,

V

0.25

0.4

V

-1.1

V
V
V

2

3.5 2VOD2
3.0
±0.02

±Oo4

V

1.8

3

1.5

3

±0.01

±Oo4

0.1

100

See Figure 1

Vee = 4.75 V
to 5.25 V
Va = 6 V
Va = -0.25 V

-0.1

Va = -0.25Vt06V
TA - 25°e,
Off-state (high impedance10Z

state) output current

Vee = 5.25 V,
Output controls
at 0.8 V

TA = 70 e
0

maximum input voltage

IIH

High-level input current

IlL

Low-level input current

lOS

Short-circuit output current'

lee

Supply Current (both driversl

Vee = 5.25 V,

VI = 5.5 V

Vee = 5.25 V,
Vee _. 5.25 V,

VI = 204 V

Vee - 5.25 V
vee = 5.25 V,

Va '= 0 to Vee

±10

Va = 0
Va - 004 V

-20

Vo - 204 V

±20

±20

1

-40
No load,

TA = 25°e

V
V

pA

pA

20

VI - 004 V
Inputs grounded,.

-100

V

±100

Va = Vee
Input current at

II

V

3.0

6

Vee - 4.75 V

Vee = 0

UNIT

-1.5

-1.5

Vee = 4.75 V
Vee = 5.25 V

MAX

-0.9

0

10 - 0

Vee = 4.75 V

Typt

mA

40

pA

1

-1.6

mA

-90

-150

mA

47

65

mA

t All typical values are at Vee = 5 V and T A = 25°e except for Voe, for which Vee is as stated under test conditions .

.*aivool and alVoe I are the changes in magnitudes of VOO and Voe, respectively, that occur when the input is changed from a high
level to a low level.
EIA Standard RS-422-A, Voe, which is the average of the two output voltages with respect to ground, is called output offset voltage, Vas.
, Only one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
§ In

TEXAS . "

INSTRUMENTS
2-498

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN75159
DUAL DIFFERENTIAL LINE DRIVER
WITH 3·STATE OUTPUTS
switching characteristics over operating free-air temperature range.
PARAMETER

Vee -

5

V (unless otherwise notedl

TEST CONDITIONS

tpLH Propagation delay time, low-to-high-Ievel output CL ~ 30 pF, RL
tpHL Propagation delay time, high-to-Iow-Ievel output Termination A
tpLH Propagation delay time, low-to-high-Ievel output
CL
tpHL Propagation delay time, high-to-Iow-Ievel output
tTLH Transition time. low-to-high-Ievel output
tTHL Transition time, high-to-Iow-Ievel output

CL

~

MIN

TYpt

MAX

16

25

ns

11

20

ns

13

20

ns

9

15

ns

4

20

ns

100 0, See Figure 2,

~

15 pF,

See Figure 2, Termination B

~

30 pF,

RL

~

100O, See Figure 2,

4

20

ns

RL

~

180O, See Figure 3

7

20

ns

RL ~ 250O, See Figure 4

ns

Termination A

tpZH Output enable time to high level
tpZL Output enable time to low level

CL

tPHZ Output disable time from high level
tpLZ Output disable time from low level

CL

~

30 pF,

CL ~ 30 pF,

Overshoot factor

UNIT

14

40

180O, See Figure 3

10

30

ns

CL ~ 30 pF,

RL ~ 250O, See Figure 4

17

35

ns

RL

See Figure 2. Termination C

10

%

~

~

30 pF,
100 [J,

RL

~

t All typical values are at T A ~ 25°C.

SYMBOL EQUIVALENTS
DATA SHEET PARAMETER

RS-422-A

Vo

Voa, Vob

I V OD11
I V OD21

VO
Vt
I IVtl -

dlVODI

IVtl I

VOC

IVosl

dlVocl

I Vos - Vos I

lOS

lisa I, Ilsbl

10

IIxal, Ilxbl

. PARAMETER MEASUREMENT INFORMATION

~

i

VOD2

~O[J

....____1___-'

50 [J

1

Voc

FIGURE 1. DIFFERENTIAL AND COMMON·MODE OUTPUT VOLTAGES

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2·499

SN75159
DUAL DIFFERENTIAL LINE DRIVER
WITH 3-STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
1 kO

r----,

5V----~r---,

I

,

,
I

~-:----V OUTPUT

PULSE

GENERATOR I -....- . - - . ; . - - - L _ A : ) . - ' - - - - Z OUTPUT
(See Note Al

v

V-------l., CL

RL - 1000

z

Z

'*

;1::-

/T">

_ _ _ _ _---'

TERMINATION C

TERMINATION B

TERMINATION A

RL - 100 0

Z

CLa15PFl
(See Note BI

f

V

- 15 pF

(See Note BI

TEST CIRCUITS

~25ns~

~

'1+-"5 ns

II

I

90%

I

10%

tPLH~1
V

OUTPUT

I,.sv

11O'Yo

I
I

.",""..,..._ _~tPHL
90%
15V
I
I
·10%

1:g(j%t:1- - - - -

90%

VOH

I

I

I

I++tTLH

~tPHL
Z

0 V

I

I

I

OVERSHOOT

..;~~~\

"

)

~tTHL

141"-~1-

~90:-:%~-VOH

OUTPUT

VOLTAGE WAVEFORMS
NOTES:

A. The pulse generator has the following characteristics: Zout ::::: 50 fl, PRR :s 10 MHz.
B. CL includes probe and jig capacitance.

FIGURE 2. tPLH, tPHL, tTLH, tTHL. AND OVERSHOOT FACTOR

. TEXAS . .
INSTRUMENTS
2-500

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

O%t=~
,--

OVERSHOOT

SN75159
DUAL DIFFERENTIAL LINE DRIVER
WITH 3·STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
INPUT
PULSE
GENERATORI--.....>---~~-....:....j
ISee Note Al

T
-=

CL 30 PF
(See
Note Bl

It>--.....--OUTPUT

I
I

RL - 180 II

I
L..----4I>--CL-.----J I
30PF
I
I
(See
I
-= Note Bl
L __________

1

1kll

~

SV
TEST CIRCUIT

INPUT

1.SV

I

1.5V

~100 n s - - + ! "'.:.;10~%:..-_
~tPZH

fsv

1'-

I

OUTPUT

_ _ _- J

I

OV
-i...VOH

i ~-Iv

tPHZ~ ~VOff~OV

VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: Zout
B. Cl includes probe and jig capacitance.

=

50 II, PRR '" 500 kHz.

FIGURE 3. tpZH AND tpHZ

TEXAS . . ,
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

2-501

SI75159
DUAL DIFFERENTIAL LINE DRIVER
WITH 3-STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
INPUT
PULSE
GENERATOR
(See Note A)

5V

T
-=

CL 30PF
(See
Note B)

0--_-I

5V

1 k!l

I

L..----4II----'

T-=

II

30pF
(see
Note B)

lL - -- - --- -- __ I
I

J

TEST CIRCUIT

INPUT

I

I

14------100 ns~ 1\,.;.10,;;,;%;;...._ _ _ 0 V

!+-tpZL

-+I

I

I
I

I
I

I

I

I

I

I4-tPLZ:L
\.5 V t_O~~
i

OUTPUT

.

- l-

5V

VOL

VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: Zout = 50 !l, PRR s 500 kHz.
C. CL includes probe and jig capacitance.

FIGURE 4. tpZL AND tPLZ

TEXAS •

.

INSTRUMENTS
2-502

POST OFFICE BOX 656303 • DALLAS. TEXAS 75265

OUTPUT

SN75159
DUAL DIFFERENTIAL LINE DRIVER
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
DATA INPUT VOLTAGE

OUTPUT VOLTAGE
vs
DATA INPUT VOLTAGE
6

6
No load
TA - 25°C

Vee - 5 V
No load

5

5

>
~

4

.ll!

~
;

o

\

2

~

o

·1

2

~

II

.'\ "\
3

\ I~TA

o

~

2

o

4

o

2

4.0

>

3.0

C>

2.5

.,
I

.ll!0

>
;
0.
;

0

I

l-20

VOH 1I0H -

>

TA = 25°e

mAl_
40 mAl

>

4

r---~---+----r---~---+-~

I

t

~ 3

2.0

~

~2r---+----+----r---->/\\----+----I

1.5

I

I

0

4

HIGH-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT
5 ,---,----,----,---,---,---,

OUTPUT VOLTAGE
vs
FREE·AIR TEMPERATURE

VOH 1I0H

3

FIGURE 6

FIGURE 5

3.5

I

VI-Data Input Voltage-V

VI-Data Input Voltage-V

Vee - 5 V

- 25°e

\..TA _Iooe

>

4.75 V

3

4

5

\..vee - 5 V

~veel-

>

o

.

-5
~

't

\

' r T A - 70 0 e

I

-'

3

5
o
I

>

jvee ~ 5.25 V

I

l:

o
>

1.0
0.5

o

VOL 1I0L - 40 mAl

o

o
25

50

75

~-~-~---~--~~~--~

o

-20

-40

-60

-80 -100 -120

IOH-Output eurrent-mA

TA-Free-Air Temperature- °e

FIGURE 7

FIGURE 8

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-503

5N75159

DUAL DIFFERENTIAL LINE DRIVER
WITH3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
(BOTH DRIVERS)
vs
SUPPLY VOLTAGE

LOW-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT
0.6

80

I
TA = 25°e

0.5

>

.

Vee = 4.75 ~

I

C>

0.4

~

>
...
::J

0.3

Q,

"

0

....I
0
>

0.2

0.1

V

o
o

/

V

No load
70 I- TA - 25°e

~

~

V

V

Y

b

15.
Q,

Vee = 5.25 V

::J

til

.:>('
~~o
",('
,$-"
oq

50

~
::J

40

,(,q
,$-"
~ ,(,q

30

~

I

u
E 20
10

20

40

60

80

100

o

120

o

IOL-Output Current-rnA

../

2345678

FIGURE 10
SUPPLY CURRENT
(BOTH DRIVERS)
vs
FREQUENCY

SUPPLY CURRENT
(BOTH DRIVERS)
vs
FREE-AIR TEMPERATURE
56

100
Vee - 5 V
Inputs grounded
No load

54

E
~

52

>15.
Q,

::J

80

E

50

- :---

48
46

U

I

E

---

44

til

I

Vee = 5 V
RL = 00
eL - 30 pF
Inputs: 3-volt square wave
TA = 25°C

15.
Q,

:s

./

40

til

I

u

E

E 40

20

38
36

o

25

75

50

o

0.1

TA-Free-Air Temperature- °e

4

10

f-Frequency-MHz

FIGURE 11

FIGURE 12

TEXAS . "
2-504

0.4

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75286

40

100

SN75159
DUAL DIFFERENTIAL LINE DRIVER
WITH 3-STATE OUTPUTS
TYPICAL CHARACTERISTICS

.
<:

I

~a.

PROPAGATION DELAY TIMES
FROM DATA INPUTS
vs
FREE-AIR TEMPERATURE

i

E

tPLH

.

8

j::

>

4

tpZL

~ 10

tpHZ

<:

0

tpZH

w

S

~

Vee - 5 V
eL-30pF
RL - 1000

g> 2

a.
2
a..

tPL~ ~

<:

tpHL

6

20

15

..

'tI

6

~

..,.!!
~

10

li

Q

:

~

14

....
E

Vee - 5 V
See Figures 3 and 4

~
I 25

-

18

12

~

30

20

.5 16
Q

OUTPUT ENABLE AND DISABLE TIMES
vs
FREE-AIR TEMPERATURE

o

25

5

o

o

75

50

25

50

75

T A - Free-Air Temperature- °e

TA-Free-Air Temperature- °e

FIGURE 14

FIGURE 13

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • OALLAS, TEXAS 75265

2-505

2-506

SN75160B
OCTAL GENERAL-PURPOSE
INTERFACE BUS TRANSCEIVER
D2525, OCTOBER 1985

MEETS IEEE STANDARD 488-1978 (GPIB)
•

8-Channel Bidirectional Transceiver

ow, J,

DR N PACKAGE

(TOP VIEW)

•

Power-Up/Power-Down Protection
(Glitch-Free)

•

High-Speed. Low-Power Schottl ...-:-=-.....- -...-OUTPUT

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 5. PE· TO· BUS PULLUP ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR s 1 MHz, 50% duty cycle, tr :::s; 6 n5,

1f '" ns, Zo ~ 50 !I.
B. CL includes' probe and jig capacitance.

TEXAS

~

INSTRUMENTS
2·512

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN75160B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
TERMINAL HIGH·LEVEL OUTPUT VOLTAGE

TERMINAL LOW-LEVEL OUTPUT VOLTAGE

vs

vs

HIGH-LEVEL OUTPUT CURRENT

LOW-LEVEL OUTPUT CURRENT
0.6

4.0

..'",

>

3.5

:l
"6

3.0

e-'"

2.5

0

'"
a;

2.0

oJ

1.5

>...

..
:f'",

.........

Vdc=5 1V
TA=25°c-

J:
0

>

8.

:l
"6

"r\.

""-

>

.i:.

1.0

-5

0.4

0

0.3

.
3:
,

0.2

0

0.1

V

>

~

/

""

>

o

-10 -15 -20 -25 -30 -35 -40

V

/

0

oJ

oJ

/

L

/

./

oJ

'\

o

>...

e-'"
'"
a;

0.5

o

,

>

r\.

tC=)V
0.5 - T A = 25°C

o

10

20

30

40

50

60

IOL -Low-Level Output Current-rnA

'OH-High-Leve' Output Current-rnA

FIGURE 7

FIGURE 6
TERMINAL OUTPUT VOLTAGE

vs
BUS INPUT VOLTAGE
4.0
3.5

>

3.0

!

2.5

,

~...

Vcc=5V
No load
TA - 25°C

2.0

&

VT-

9

1.5

~

1.0

VT+

0.5

o
o

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
V,-Input Voltage-V
FIGURE 8

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-513

SN75160B
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
BUS HIGH-LEVEL OUTPUT VOLTAGE

vs

BUS HIGH-LEVEL OUTPUT CURRENT

BUS LOW-LEVEL OUTPUT CURRENT

4

~

3

"0

>
...
:J

S:J

0

0.6

I

>I

.,
'"
~

BUS LOW-LEVEL OUTPUT VOLTAGE

vs

VCC = 5 V
TA = 25°C

~

2

'ii

.,>

>I
>
...

0.4

/'

"-

S:J

0

"\

i'"
I

'ii

0.3

;i:

I"\.

0

-30

0.2

...J

I

...J

0

1"\

-40

>

/

/

./

V

0.1

o

-50

V

/

/V

...J

>

-20

/

.,>

'\

:t:
0

-10

0.5

:J

i;

o

.,
'"
~

"0

...J

o

VCC= 5 V
TA = 25°C

-60

o

IOH-High-Level Output Current-mA

10

20

30

40

50 60

70 80

90 100

IOL -Low-Level Output Current-mA
FIGURE 10

FIGURE 9

BUS CURRENT

BUS OUTPUT VOLTAGE

vs

vs

TERMINAL INPUT VOLTAGE

BUS VOLTAGE

4
VCC= 5V
No load
TA = 25°C

>I

.,
'"
ll!

2

...
:J

-1

u

2

0

:J

S:J

m

0

I

-k

0

..c

:J

g

>

THE UNSHADED

~H-f-+-N' AREA CONFORMS TO
~H-f-+-+'-< PARAGRAPH 3.5.3 OF
OL-~

0.9

IEEE STANDARD 488-1978.

__- L__J -_ _L-~__- L__~~

1.0

1.1

1.2

1.3

1.4

1.5

1.6

-1

1.7

2

3

4

VI/O(bus)-Bus Voltage-V

VI-Input Voltage-V

FIGURE 12

FIGURE 11

~

TEXAS
INSTRUMENTS
2-514

o

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

5

6

SN75161B. SN75162B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVERS
D2618, OCT08ER 1980-REVISED OCT08ER 1985

MEETS IEEE STANDARD 488-1978 (GPIB)
•

8·Channel Bidirectional Transceiver

•

Power-Up/Power-Down Protection
(Glitch-Free)

•

Designed to Implement Control Bus
Interface

•

SN75161 B Designed for Single Controller

•

SN75162B Designed for Multi-Controllers

SN75161B ... OW, J, OR N PACKAGE
(TOP VIEW)

GPIB
I/O
PORTS

•

High-Speed, Low-Power Schottky Circuitry

•

Low-Power Dissipation, , , 72 mW Max Per
Channel

•

Fast Propagation Times , , . 22 ns Max

•

High-Impedance P-N-P Inputs

•

Receiver Hysteresis ... 650 mV Typ

•

Bus-Terminating Resistors Provided on
Driver Outputs

•

No Loading of Bus When Device Is Powered
Down (VCC = 0)

TE
REN
IFC
NDAC
NRFD
DAV
EOI
ATN
SRO
GND ......._ _...r-

The SN75161 8 and SN751628 eight-channel
general-purpose interface bus transceivers are
monolithic, high-speed, low-power Schottky
devices designed to meet the requirements of
IEEE Standard 488-1978. Each transceiver is
designed to provide the bus-management and
data-transfer signals between operating units of
a single- or multiple-controller instrumentation
system, When combined with the SN751608
octal bus transceiver, the SN751618 or
SN751628 provides the complete 16-wire
interface for the IEEE 488 bus.
The SN75161 8 and SN751628 each features
eight driver-receiver pairs connected in a frontto-back configuration to form input/output (I/O)
ports at both the bus and terminal sides. A power
up/down disable circuit is included on all bus and
receiver outputs. This provides glitch-free
operation during VCC power-up and powerdown, The direction of data through these driverreceiver pairs is determined by the DC, TE, and
SC (on SN7 51628) enable signals. The SC input
on the SN751628 allows the REN and IFC
transceivers to be controlled independently.

GPIB
I/O
PORTS

SC
TE
REN
IFC
NDAC
NRFD
DAV
EOI
ATN
SRO
NC
GND

:~~~~:~~i~ai~:1~1e ~!:~~~ti:i lI,o::~:~:t:~~S

not

......._ _ J-'

VCC
NC
REN
IFC
NDAC
NRFD
DAV
EOI
ATN
SRO
NC
DC

TERMINAL
I/O PORTS

SN75162B , .. N PACKAGE
(TOP VIEW)

GPIB
I/O
PORTS

SC
TE
REN
IFC
NDAC
NRFD
DAV
EOI
ATN
SRO
GND

VCC
NC
REN
IFC
NDAC
NRFD
DAV
EOI
ATN
SRO
DC

6

TERMINAL
I/O PORTS

NC-No internal connection

PRODUCTION DATA documents contain information

current as of publication date. Products conform to

TERMINAL
I/O PORTS

SN75162B, .. OW PACKAGE
(TOP VIEWI

description

specifications per the terms of Texas Instruments

VCC
REN
IFC
NDAC
NRFD
DAV
EOI
ATN
SRO
DC

Copyright

© 1985, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-515

S.75161B, SN76162B
OtTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVERS.
description (continued)
The driver outputs (GPIB 1/0 ports) feature active bus-terminating resistor circuits designed to provide a
high impedance to the bus when supply voltage Vee is o. The drivers are designed to handle loads up
to 48 mA of sink current. Each receiver features p-n-p transistor inputs for high input impedance and
hysteresis of 400 mV for increased noise immunity. All receivers have 3-state outputs to present a high
impedance to the terminal when disabled.
The SN75161B and SN75162B are characterized for operation from ooe to 70 oe.
CHANNEL IDENTIFICATION TABLE
NAME
DC
TE
SC
ATN
SRO
REN
IFC
EOI
DAV
NDAC
NRFD

IDENTITY
Direction Control
Talk Enable
System ControllSN75162e only)

CLASS
Control

Attention

Service Request
Remote Enable
Interface Clear
End or Identify
Data Valid
Not Data Accepted
Not Ready for Data

,

Bus
Management

Data
Transfer

TEXAS.
INSTRUMENTS

2-511)

POST OFFICE BOX 666303 • DALLAS, TEXAS 76266

SN75161B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
SN75161B logic symbol t
OC I11I
TE 111

SN75161B logic diagram (positive logic)

EN1/G4
EN2/G5
EN3

ATNI13

E01114)

ATN

I>

1131

181 ATN

1141

171 EOI

1
SROl12

I>

REN I191

I>

IFCIl81

I>

OAV(15 )

I>

NOACI171

I>

1

EOI

SRO (121

191

REN 1191

121

SRO

REN

1
NRFOI16 )

I>
IFC 1181

t This symbol is in accordance with IEEE Std 91-1984 and lEe
publication 617-12.
Q--_~_

INPUT/OUTPUT

PORT

Circuit inside dashed lines is on the driver outputs only.

TYPICAL OF ALL 1/0 PORTS
EXCEPT SRQ, NDAC, and NRFD GPIB 1/0 PORTS
~r-

__ ___
~

+r~-_-_-~~;-

___ __
~

1.7kO

NOM

~_V~

10kn
NOM

I
I

I
I

I

I
I
IL ____ .J

QND

INPUT IOUTPUT
PORT
= 30 {I NOM

Driver output Req
Receiver output Req = 110 {I NOM
Circuit inside dashed lines is on the .driver outputs only.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage. VCC (see Note 1) , .................................. , . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Low-level driver output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 100 mA
Continuous total power dissipation (see Note 2) ................ " See Dissipation Rating Table
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. O°C to 70°C
Storage temperature range ......................................... -65°C to 150°C
Lead temperature 1.6 mm (1/16) inch from the case for 60 seconds: J package .......... 300°C
Lead temperature 1.6 mm (1/16) inch from the case for 10 seconds: OW or N package .... 260°C
NOTES 1. All voltage values are with respect to network ground terminal.
2. In the J package, SN751618 chips are alloy mounted.

TEXAS ."

2-520

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75266

SN75161B. SN75162B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
DISSIPATION RATING TABLE
PACKAGE

TA :s 25°C
POWER RATING

OW (20 Pin)
OW (24 Pin)

1125 mW
-1350 mW

J

1375 mW
1150mW
1700 mW

N (20 Pin)
N (22 Pin)

DERATING FACTOR
ABOVE TA - 25°C
9.0 mW/oC

TA - 70°C
POWER RATING
720mW

10.8 mW/oC

864mW

11.0 mW/oC
9.2 mW/oC
13.6 mW/oC

880mW
736 mW
1088 mW

recommended operating conditions
MIN
4.75
2

Supply voltage, VCC
High-level input voltage, VIH

NOM
5

low-level input voltage, Vil
High-level output current, 10H

Bus ports with 3-state outputs
Terminal ports

low-level output current, 10l

Bus ports
Terminal ports

MAX
5.25
0.8
-5.2
-800
48

Operating free-air temperature, T A

16
70

0

UNIT
V
V
V
mA
p.A
mA
°c

electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted)
TEST CONDITIONS
11= -18 mA

PARAMETER
VIK
Vh s
VOH t
VOL
II

Input clamp voltage
Hysteresis NT + - VT-)
High-level
output voltage
low-level
output voltage
Input current at
maximum input voltage

High-level
IIH
III

input current

3.5
3.3

V

0.3.
0.35

0.5

Terminal

VI = 5.5 V

0.2

100

p.A

VI = 2.7 V

0.1

20

p.A

-10

-100

p.A

3.0

3.7
-1.5

V

VI

=

0.5 V

2.5
IUbusl = 0
Driver disabled
Il(bus) = -12 mA
Vl(busl = -1.5 V to 0.4 V -1.3
0
VUbusl - 0.4 V to 2.5 V
Power on

Power off

lOS

2.5

0.66

Terminal
and
control

IIIO(bus)

0.4
2.7

-800fLA
-5.2 mA

UNIT
V
V

Bus

inputs

Current into bus port

=
=

MAX
-1.5

10l - 16 mA
10l = 48 mA

low-level

Voltage at bus port

10H
10H

TYpt
-0.8

Bus
Terminal
Bus
Terminal

input current

VIIO(bus)

MIN

Short-circuit

Terminal

output current

Bus

Driver disabled Vl(busl

VCC = 0,

=

Supply current

No load,

Ci/o(bus)

Bus-port capacitance

VCC
VIIO

VUbusl - 3.7 V to 5 V

0

2.5

Vl(bus) = 5 V to 5.5 V
Vl(busl = 0 to 2.5 V

0.7

2.5
-40
-35
-50

TE, DC, and SC low

= 5 V to 0,
= 0 to 2 V, f =

1 MHz

V

-3.2
+2.5
-3.2

2.5 V to 3.7 V

-15
-25

ICC

0.5

30

mA

p.A

-75
-125

mA

110

mA
pF

t All typical values are at VCC = 5 V, T A = 25 ·C.
'VOH applies for 3-state outputs only.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 76285

2-521

SN75161B, SN75162B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVERS
switching characteristics. Vee - 5'V. eL - 15 pF. TA - 25°e (unless otherwise noted)
PARAMETER
tpLH
tpHL

tpLH
tpHL

TO

Terminal

Bus

TEST

MIN

CONDITIONS

TVP

MAX

14

20

14

20

29

35

10

20

15

22

UNIT

Propagation delay time,
low-to-high-Ievel output
Propagation delay time,

CL = 30 pF,
See Figure 1

high-to-Iow-Ievel output
Bus

Propagation delay time,
tPLH

FROM

Terminal

low-to-high-Ievel output

CL = 30 pF,
See Figure 1

(SRQ, NDAC
NRFD)

Propagation delay time,
low-to-high-Ievel output
Propagation delay time,

CL = 30 pF,
See Figure 2

Terminal

Bus

Output enable time to high level

tpHZ

Output disable time from high level

tpZL

Output enable time to low level

tPLZ

Output disable time from low level

tpZH

Output enable time to high level

tpHZ

Output disable time from high level

tpZL

Output enable time to low level

tpLZ

Output disable time from low level

TE, DC,
or

BUS
(ATTN, EOI,

60
45

See Figure 3

REN,IFC,

SC

ns

60

and DAV)

55
55

TE, DC,

50

See Figure 4

Terminal

or

ns

ns

high-to-Iow-Ievel output

tpZH

ns

ns

45

SC

55

PARAMETER MEASUREMENT INFORMATION
4.3V

5V

240n

200n
FROM (BUS)
OUTPUT UNDER--4I.-----4.....--4I--TEST POINT
TEST

FROM (TERMINAL)
- ...- - - -....-4t-TEST POINT
OUTPUT UNDER
TEST

J

480n

_-----..,.- -

-

--3V

1.5 V

1.5V

(See Noto B)

BUS
INPUT

~--OV

.,..-----""'-1-- VOH
2.2 V

.L..5V

.-Il '

I

TERMINAL
OUTPUT

\1:~ -

(So. Noto B)

tPLH~

tpH L--If-+i

BUS
OUTPUT

3kn
....

LOAD CIRCUIT

LOAD CIRCUIT

INPUT

CL = 30pF
(Sao Note A)

•

-3 V
0v

tPHL-jf-+j

------"':1' --1.5 V

VOH

1.5V

VOH
VOLTAGE WAVEFORMS

VOLTAGE WAVEFORMS

FIGURE 2. BUS·TO-TERMINAL
PROPAGATION DELAY TIMES

FIGURE 1. TERMINAL-TO-BUS
PROPAGATION DELAY TIMES

NOTES: A. CL includes probe and jig capacitance,
B. The input pulse is supplied by a generator having the following characteristics: PRR :s 1 MHz, 50% duty cycle, tr :S 6 ns,
tf :s6 ns, Zo = 500.

~

TEXAS
INSTRUMENTS
2-522

POST OFFICE BOX 855303 • DALLAS. TEXAS 76265

SN75161B. SN75162B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVERS

PARAMETER MEASUREMENT INFORMATION
SI

FROM (BUSI
OUTPUT UNDER-....TEST

J

SI

0--5V

20011
.....---4...-TEST POINT

CL = 15 pF
(See Note AI

FROM (TERMINAL}
OUTPUT
--<....UNDER Tl;ST

J

480 11

LOAD CIRCUIT

},\

JI~

tPZH-I
BUS
OUTPUT
S10PEN

(S•• Note BI
_______

I+-

I :
I
I

l 5V

JI~

tPHZ--'

____ OV

I+-

VOH

I

ov

I

tPZL---+----I
BUS
OUTPUT
SI CLOSED

11\

-90%- 2V

24011

....--4p-- TEST POINT

CL = 15 pF
(S•• Not.AI

3kll

LOAD CIRCUIT

3V
--"'~1.5V
r-------"""\V r---.

CONTROL
INPUT __

0--4.3 V

tPLZ~

I

\!

~II

·1.0V
'\
0.5 V
'--------' - - -

--"'V r--------"\ r-----

CONTROL
INPUT __ J

tpZH-t
TERMINAL
I
OUTPUT
I

VOL

~

tpHZ-.j

I

I

I.5V

SI OPEN________I
tPZL...j

"3.5 V

~1.5V

l .5V

3V

i\I '- ___
(See_____
Note B} J I\'
1'-_____ ov

TERMINAL
OUTPUT
SI CLOSED

VOLTAGE WAVEFORMS

t--

r--

-- - ---

I

I
I

VOH

90%

tPLZ-.j

OV
.. 4V

I
1.0V

VOLTAGE WAVEFORMS

FIGURE 3. BUS ENABLE AND
DISABLE TIMES

FIGURE 4. TERMINAL ENABLE
AND DISABLE TIMES

NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR
tf s 6 ns, Zo = 50 O.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 85nQ~ • DALLAS. TEXAS 75265

s 1

MHz, 50% duty cycle, tr S 6 ns,

2-52'3

SN75161B, SN75162B
)OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVERS
TYPICAL CHARACTERISTICS

:r'"

!'
"0

..a

>
:J

TERMINAL HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
4.0
CC =15V
3.5
TA=25°C

J

..........

'-

3.0

0
Oi

2.0

....'"
.i:.
X'"

1.5

I

:J:
0

>

.......
..

0.3

~

0.2

....'"

'\

oS
I

....
0

>

'\~

-5

0.4

:J

\.
o

0.5

0
Oi

0.5

o

VCC=5V
TA = 25°C

:J

'\

1.0

:r8.
~

'\

>

0.6

:I

'r-,.

2.5

TERMINAL LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT

/

/

/"

-10 -15 -20 -25 -30 -35 -40

/

/

10
20
30
40
50
IOL -Low-Level Output Current-mA

FIGURE 5

FIGURE 6
TERMINAL OUTPUT VOLTAGE
vs
BUS INPUT VOLTAGE
4.0
VCC=5V
No load
TA = 25°C

3.5

>I

3.0

~

2.5

8.

~ 2.0
5

~

1.5

>

1.0

0
I
0

VT-

VT+

0.5

o
o

V

0.1

IOH-High-Level Output Current-mA

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VI-Input Voltage-V

FIGURE 7

/ TEXAS.

INSTRUMENTS
2-524

/

/'

POST OFFICE BOX 865303 • DALLAS. TEXAS 76266

60

SN75161B, SN75162B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVERS
TYPICAL CHARACTERISTICS
BUS HIGH· LEVEL OUTPUT VOLTAGE

BUS·LOW LEVEL OUTPUT VOLTAGE

vs

vs

HIGH·LEVEL OUTPUT CURRENT

LOW·LEVEL OUTPUT CURRENT

4

>I

t

3

0.6

r--....

>I

..

VCC=5V
TA=25°C

/'

0.5

l!

""

>
...

2

>

j

1:
co
:i:

'\

o
o

-10

-20

0.3

0
Gi

..

V

>

..J

'" ~

~

-40

-30

0.2

0
..J

'\

~

"

9"

~

I
:I:

>...

0.4

I

..J

0

>

-50

/

V

1/

V

V

0.1

o

-60

V

V

en

(5

(5

9"
0"
Gi

VCC=5V
TA = 25°C

o

IOH-High-Level Output Current-rnA

10

20 30 40

50 60 70 80 90 100

IOL - Low-Level Output Current-rnA

FIGURE 8

FIGURE 9
BUS CURRENT

BUS OUTPUT VOLTAGE
vs
TERMINAL INPUT VOLTAGE

vs
BUS VOLTAGE

4
VCC=5V
No load
TA = 25°C

>I

3

1

&
l!

I

(5

>...

~"

.!.c

1

~
u

!

2

..""
'?..

0
I
0

g"
.0

>

o

0.9

1.0

1.1

1.2

1.3

1.4

1.5

1.6

1.7

-1

VI-Input Voltage-V

FIGURE 10

2
3
4
0
VI/O(bus)-Bus Voltage-V

5

6

FIGURE 11

TEXAS . "

INSTRUMENTS
PO~T

OFFICE BOX 866303. DALLAS. TEXAS 76265

2-525

2-526

SN751638
OCTAL GENERAL-PURPOSE INTERFACE 8US TRANSCEIVER
02611. OCTOBER 1985

DW. J. OR N PACKAGE
(TOP VIEW)

•

B-Channel Bidirectional Transceivers

•

Power-Up/Power-Down Protection
(Glitch-Free)

•

High-Speed Low-Power Schottky Circuitry

•

Low Power Dissipation . . . 66 mW Max Per
Channel

Vee

TE

01

B1
B2

•

High-Impedance P-N-P Inputs

•

Receiver Hysteresis ... 650 mV Typ

•

Open-Collector Driver Output Option

•

No Loading of Bus When Device Is Powered
Down (VCC-O)

B3
B4

BUS
I/O PORTS

B5
B6
B7

05
06
07

B8
GNO

08
PE

TERMINAL
I/O PORTS

FUNCTION TABLES

description
The SN75163B octal general-purpose interface
bus transceiver is a monolithic, high-speed,
low-power Schottky device. It is designed for
two-way data communications over single-ended
transmission lines. The transceiver features
driver outputs that can be operated in either the
open-collector or 3-state modes. If Talk Enable
(TEl is high, these outputs have the
characteristics of open-collector outputs when
Pullup Enable (PEl is low and of 3-state
outputs when PE is high. Taking TE low places
the outputs in the high-impedance state. The
driver outputs are designed to handle loads of
up to 48 mA of sink current. Each receiver
features p-n-p transistor inputs for high input
impedance and 400 mV of hysteresis for
increased noise immunity.

02
03
D4

EACH RECEIVER
OUTPUT

EACH DRIVER
INPUTS
OUTPUT
PE'
D
TE
B
H
H
H
H
L
H
H
L
X
L
Z
H

H

L

H

L

L

X

L

X

Z

~

high level. L

~

low level. X

INPUTS
TE
PE
B
L
H

X

~

L
L
H

irrelevant. Z

X
X
X

~

D
L
H

Z

high-impedance

state.

Output glitches during power-up and powerdown are eliminated by an internal circuit that
disables both the bus and receiver outputs. The
outputs do not load the bus when Vee = O.
The SN75163B is characterized for operation
from ooe to 70°C.

PRODUCTIOI DATA do.umants .ontain information
.u,rant as of publication data. P,oducts .onfo,m to
.pacification. pa, the ta,ms of Texas Inat,umants
standard wa,ranty. P,oduction p,o.lIIlng doa. not
nlaBSlarily include tasting of all parameters.

Copyright © 1985, Texas Instruments Incorporated

TEXAS ..,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75286

2-527

SN75163B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
logic symbol t

logic diagram (positive logic)

TE

(21 B1
02 «181
(31 B2
03 (171

B3
B4

(41 B3

B5
04 (161

B6
B7
TERMINAL

B8

(51 B4
05 (151

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.
'" Designates 3-state outputs.
Q Designates open-collector outputs.

BUS
(61 B5

06 (141
(71 B6
(131
07 --'--+-'-1 "'::>-----,
(8) B7
08 (121
(9)

BB

schematics of inputs and outputs
eQUIVALENT OF ALL CONTROL INPUTS

eQUIVALENT OF ALL INPUT/OUTPUT PO.RTS
---.------.------------------.------~t__VCC

VCC---~~-------

10kONOM

Raq

9kONOM

INPUT

GND-~----~----~---

------~--~--~~-+--~----~----------GND

INPUT/OUTPUT
PORT
Driver output Rsq

= 30 11 NOM

Receiver output Req "" 110

n

NOM

TEXAS •

2-528

INSTRUMENTS
POST OFfiCE BOX

6~5303

• DALLAS. TEXAS 75265

SN75163B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise notedl
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Low-level driver output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 100 mA
Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range ...................................... O°C to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16) inch from the case for 60 seconds: J package .......... 300°C
Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds: OW or N package .. .. 260°C
NOTES: 1. All voltage values are with respect to network ground terminal.
2. In the J package. SN75163B chips are alloy mounted.
DISSIPATION RATING TABLE
DERATING FACTOR

OW

TA - 25·C
POWER RATING
1125 mW

ABOVE TA - 25·C
9.0 mw/oe

J

1375 mW

11.0 mw/oe

720mW
880 mW

N

1150mW

9.2 mw/oe

736 mW

PACKAGE

TA - 70·C
POWER RATING

recommended operating conditions
MIN
4.75

Supply voltage. Vee
High-level input voltage. VIH

Low-level output current. IOL

5

MAX
5.25

2

Low-level input voltage. VIL
High-level output current. IOH

NOM

0.8
-10
-800

Bus ports with pullups active
Terminal ports

Bus ports

48

Terminal ports

0

Operating free-air temperature range, TA

16
70

UNIT
V
V
V
mA
~A

mA
°e

TEXAS . .

INSTRUMENTS
POST OFFICE BOX 856303. DALLAS. TEXAS 76285

2-529

SN75163B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER

electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted)
PARAMETER
VIK

Input clamp voltage

Vhys

Hysteresis (VT +

- VT _ ) *

High level
VOH
VOL

10Z
II

output voltage

Bus

(3-state mode)
Input current at

maximum input voltage
input current
Low-level

IlL
lOS
ICC

10H = - 800 pA,

Bus

High-level
IIH

Terminal
Terminal

(open-collector mode)

input current

TYpt

MAX

UNIT

-1.5

V

0.4 0.65

output voltage

Off-state output current

MIN

-0.8

Bus

Low-level
High-level output current
10H

TEST CONDITIONS
11= -18 mA

2.7

3.5

10H = -10 mA,

PEandTEat2V

2.5

3.3

10L = 16 mA,

TE at 0.8 V

0.3

0.5

= 48 mA,
= 5.5 V,

PE and TE at 2 V

0.4

0.5

PE at 0.8 V,

10L
Vo

Bus

DandTEat2V
PE at 2 V,

Bus

V

TE at 0.8 V

=

100

I

20

Vo - 2.7 V
Vo = 0.4 V

TE at 0.8 V

V

-20

V
pA
pA

Terminal

VI

5.5 V

0.2

100

~A

Terminal

VI = 2.7 V

0.1

20

~A

Terminal

VI

-10

-100

~A

35
-50

75

Short-circuit

Terminal

output current

Bus

= 0.5

V
15
-25

Supply currant

Receivers low and enabled

No load

Ci/o(bus) Bus-port capacitance

80

Drivers low and enabled

VCC - 5 V orO,
f = 1 MHz

-125
100

VI/O - 0 to 2 V,

mA
mA
pF

30

tAli typical values are at VCC = 5, TA = 25°C.
*Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going input threshold voltage, VT _.

switching characteristics. Vee" 5 V. eL - 15 pF. TA .. 25°e (unless otherwise noted)
PARAMETER
tpLH
tpHL

FROM

TO

TEST CONDITIONS

TYP

MAX

CL = 30 pF,
See Figure 1

14

20

14

20

CL = 30 pF,
See Figure 2

10

20

15

22
35

Propagation delay time,
low-to-high-Ievel output
Propagation delay time,

Terminal

Bus

high-to-Iow-Ievel output
Propagation delay time,

tpLH
tpHL

low-to-high-Ievel output
Propagation delay time,

Bus

Terminal

high-to-Iow-Ievel output

MIN

ns

ns

tpZH

Output enable time to high level

25

tpHZ

Output disable time from high level

13

22

tpZL

Output enable time to low level

22

35

tpLZ

Output disable time from low level

22

32

tPZH
tPHZ

Output enable time to high level

20

30

Output disable time from high level

12

20

tpZL

Output enable time to low level

23

32

tpLZ

Output disable time from low level

19

30

ten
tdis

Output pull-up enable time

15

22

13

20

Output pull-up disable time

TE

TE

PE

Bus

Terminal

Terminal

See Figure 3

See Figure 4

See Figure 5

TEXAS . "

2-530

INsTRUMENTS
POST OFFICE BOX 855303 • DALLAS, TEXAS 75265

UNIT

ns

ns

ns

SN75163B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION

f.5V
---I'!
.
tpLH~

200n

X5:---3V
\.
tPHL~
'"2.-2-V-----""'"""'\: - - -V

DINPUT

----0 V

I'

BDUTPUT

480n

OH

~VOH

.

3V
VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 1. TERMINAL-TO-BUS PROPAGATION DELAY TIMES

\:-_-3V

BIN::1., 5V

, •
tpHL

1,5

o OUTPUT

OV

---+----I

tpLH~

~~.~

-VOH

~

V

VOL

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 2_ BUS-TO-TERMINAL PROPAGATION DELAY TIMES

52

=i.5V

\5~----3V

tpZH~......
tpHZ---.I
I I, ,..------+-o~

0V

5lto3V 1
B OUTPUT

480n

520PEN

,

tpZL

,_

0.8 V

.1

3.5V

~......._",\I
BOUTPUT
51 toGND

,

1.0V

S2 CLOSED

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 3. TE-TO-BUS ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the fol!owing characteristics: PRFI :;;; 1 MHz, 50% duty cycle, tr :s; 6 ns,
If S ns, Zo = 50 O.
B. CL includes probe and jig capacitance.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS, TEXAS 75286

2-531

SN75163B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION
~_
TE

INPUT~",U_V

______

tPZH--,
DOUTPUTI

Slto3V
S20PEN
tpZL

I
I

~

I

~t~~

tpHZ~

___

3V

-ov

r--

-90%-- -VOH

1.5V

:

I

-.f

OV

tPLZ--t

4V

o OUTPUT
S1 toGND

S2CLOSED

_ _ _ _ _ _ _J._0.7
_ V-

-

-VOL

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 4. TE·TO·TERMINAL ENABLE AND DISABLE TIMES

> .....

~-.--~~-OUTPUT

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 5. PE-TO-BUS PULLUP ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR '" 1 MHz, 50% duty cycle, tr '" 6 ns,
tt s ns, Zo = 50 0.
B. CL includes probe and jig capacitance.

TEXAS . . ,
INSTRUMENTS
2-532

POST OFFICE BOX 655303 • DALLAS. TEXAS 76285

SN75163B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER

TYPICAL CHARACTERISTICS
TERMINAL HIGH·LEVEL OUTPUT VOLTAGE

TERMINAL LOW·LEVEL OUTPUT VOLTAGE

vs

vs

HIGH·LEVEL OUTPUT CURRENT

LOW·LEVEL OUTPUT CURRENT
0.6

4.0

>I

3.5

l!

3.0

i!l.

..e-

15

>

::I

..........

VdC=5 IV
TA = 25°C-

~

2.5
2.0

...I

1.5

:rI

1.0

.,>

...

.l:

i!l.

'\~

..e-

>

>

::I

'\

0

..
>

-5

/

~

-10 -15 -20

/

...I

;i:

0.2

....0
I

"

...I

0

>

'\~

o

0.3

a;

0.5

o

0.4

/'

::I

J:

0

LC=5'V
0.5 I---TA = 25°C

l!

15

'\

::I

0
a;

>I

V

0.1

o

-25 -30 -35 -40

/

/

/ "

o

IOH-High·Level Output Current-mA

10

20

30

40

50

60

IOL -Low· Level Output Current-mA

FIGURE 6

FIGURE 7
TERMINAL OUTPUT VOLTAGE

vs
BUS INPUT VOLTAGE
4.0
3.5

l'.,
...
l!

..e-

VCC=5V
No load
TA = 25°C

3.0
2.5

15

>
::I
::I

90
>

2.0
VT1.5

VT+

1.0
0.5

o
o

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VI-Input Voltage-V
FIGURE 8

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-533

SN751638
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
BUS LOW-LEVEL OUTPUT VOLTAGE

BUS HIGH·LEVEL OUTPUT VOLTAGE

vs

vs

BUS HIGH-LEVEL OUTPUT CURRENT

BUS LOW-LEVEL OUTPUT CURRENT

4

>I

'"

'"
:l

~...

3

~

;:"

0

2

'"
E

.S!'
::J:
I
::J:

>...

>
-10

-20

/'

0.5

V
:/
:/

0.4

"

&

"

0

0;

-30

0.3

'"

..J

g

0.2

..J

I

..J

~

~

-40

-60

/'

V
o

IOH-High-Level Output Current-mA

10

20 30

vs
TERMINAL INPUT VOLTAGE

VCC= 5V
No load
TA = 25°C
3~-+--~--+-~H--+--4---+--4

I

t

...

~
9

2

I---+---+---+----H---+--l---+--~

~

OL-~

0.9

__- L__~__L-~__~__L--...I

1.0

1.1

1.2

1.3

1.4

1.5 1.6

VI-Input Voltage-V
FIGURE 11

TEXAS . "

INSTRUMENTS
2-534

50 60

FIGURE 10
BUS OUTPUT VOLTAGE

~

40

70 80 90 100

IOL -Low-Level Output Current-mA

FIGURE 9

>

./'

0.1

o

-50

/

:/V

>

"-

0

VCC=5V
TA = 25°C

'0

'"'"

t
..J
.1:.

o

>I

~ i\.

0;

o

0.6

I

VCC=5V
TA = 25°C

POST OFFICE BOX 655303 • DALLAS, TEXAS 76265

1.7

SN15164B
OCTAL GENERAL·PURPOSEINTERFACE BUS TRANSCEIVER
02908, OCTOBER 1985

•

8-Channel Bidirectional Transceiver

•

Power-Up/Power-Down Protection
(Glitch-Free)

OW SMALL OUTLINE PACKAGE
(TOP V(EWI
SC
TE

•

ATN+EOI (OR Function) Output to Simplify
Board Layout

,

Designed to Implement Control Bus
Interface for Multi-Controllers

•

•

REN
IFC
NDAC
NRFD

GPIB
I/O
PORTS

Fast Propagation Times . . . 22 ns Max

•

Hillh-Impedance P-N-P Inputs
Receiver Hysteresis, .. 650 mV Typ

•

Bus-Terminating Resistors Provided on
Driver Outputs

•

No Loading of Bus When Device is Powered
Down (VCC = 0)

The SN75164B eight-chann~1 general-purpose
interface bus transceiver is a monolithic, highspeed, low-power Schottky device designed to
meet the requirements of IEEE Standard
488-1978. Each transceiver is designed to
provide the bus-management and data-transfer
signals between operating units of a multiplecontroller instrumentation system, When
combined with the SN75160B octal bus
transceiver, the SN75164B provides the
complete 16-wire interface for the IEEE 488 bus.
The SN75164B features eight driver-receiver
pairs connected in a front-to-back configuration
to form input/output (I/O) ports at both the bus
and terminal sides. All outputs are disabled (at
a high-impedance state) during Vee power-up
and power-down transitions for glitch-free
operation. The direction of data flow through
these driver-receiver pairs is determined by the
De, TE, and se enable signals. The SN75164B
is identical to the SN75162B with the addition
of an OR gate to help simplify board layouts in
several popular applications. The ATN al7ld EOI
signals are ORed to pin 21, which is a standard
totem-pole output,

0'

=:I::

0'

TERMINAL
I/O PORTS

DAV

SRO

EOI
ATN
SRO

NC
GND

NC
DC

N DUAL-IN-LiNE PACKAGE

description

PRODUCTIOI DATA documants contain in'ormation
currant .s publication d~.• Products conform to
.pacification. par th.,tarm. Taxa. Inltrg.ants
i:; ru·:::~~:'.~ not
::=~~~a{'::I':.'li

NDAC
NRFD

DAV
EOI
ATN

Low-Power Dissipation, . , 72 mW Max Per
Channel

•

VCC
'ATN+EOI
REN

(TOP VIEWI
SC
TE
REN

VCC
ATN+EO(
REN
IFC

IFC
GPIB
I/O
PORTS

NDAC

NDAC
NRFD

NRFD

TERMINAL

DAV
EOI
ATN

DAV
EOI
ATN

I/O PORTS

SRO
GND

DC

SRO

NC-No internal connection.
CHANNEL IDENTIFICATION TABLE
NAME
DC
TE
SC
ATN
SRQ
REN
IFC
EOI
ATN+EOI
DAV
NDAC
NRFD

IDENTITY

CLASS

Direction Control

Talk Enable
System Control

Control

Attention
Service Request
Remote Enable
Interface Clear
End or Identify

Management

A TN logical OR EOI

Logic

Data Valid
Not Data Accepted
Not Ready for Data

Bus

Data
Transfer

Copyright © 1985, Texas Instruments Incorporated

TEXAS " "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-535

SN75164B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
The driver outputs (GPIB I/O ports) feature active bus·terminating resistor circuits designed to provide a
high impedance to the bus when supply voltage Vee is O. The drivers are designed to handle loads up
to 48 milliamperes of sink current. Each receiver features p-n-p transistor inputs for high input impedance
and a guaranteed hysteresis of 400 millivolts for increased noise immunity. All receivers have 3-state outputs
to present a high impedance to the terminal when disabled.
The SN75164B is manufactured in a 22-pin dual-in-line and 24-pih Small Outline package. The SN75164B
is characterized for operation from ooe to 70 oe.

logic symbol t

logic diagram (positive logic)

DC [131(12) ~E~N-1/~G-4---"
TE [2] (2)

EN2/G5

SC [1](1)

EN3
F~..,

[9]

.:...:.;:O!.!..:=1H-I--4....>-t >-4.-_-j-l:(9::.) ATN

[23]

>-__......,.(2=..1"" ATN+EOI
[17]
EOI (151

[8]

>--.___-+-..:;(8;.:.1 EOI

[15]

SRQ~(1~3~)__~~r-

[22]

[10]
(10) SRQ

[3]

REN~(2~0~)__~+.tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

__'-;

[21]
IFC (19)

____.-; ;~~______~(3~)REN
[4]

>_.-----~(4~)IFC

m

[~

DAV~1~6~'____+-____.-~ ;~~_____~(7~)DAV

[20]
[5]
NDAC~1~8~)____+-____.-~ ;~~______~(5::')NDAC

[m

I ] Denotes pin numbers for OW package.
( I Denotes pin numbers for N package.

2-536

~

----t-----.....; ~---~------.:.:;(6;;..) NRFD

7!-)
NRFD,-,(1c:.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

SN75164B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
RECEIVE/TRANSMIT FUNCTION TABLE

H = high level. L = low level, R = receive, T = transmit. X = irrelevant
Direction of data transmission is from the terminal side to the bus side, and the direction of data receiving is from the
bus side to the terminal side. Data transfer is noninverting in both directions.
t A TN is a normal transceiver channel that functions additionally as an internal direction control or talk enable for EOI whenever the DC
and TE inputs are in the same state. When DC and TE are in opposite states, the ATN channel functions as an independent transceiver only.

ATN+EOI FUNCTION TABLE
INPUTS
ATN EOI
H

X

X

H
L

L

OUTPUT
ATN+EOI
H
H
L

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 865303 • DALLAS. TEXAS 75266

2-537

SN75164B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
schematics of inputs and outputs
TYPICAL OF SRO;NDAC, and NRFD
GPIB 110 PORT

EOUIVALENT OFALL
CONTROL INPUTS

~----;r~-r--_-~~r-----~---~-Vcc

Vce ---.....----

1.7 kO
NOM

9kn

NOM

10 kU

NOM

INPUT

GND

-+_......>--_-+__ _
INPUT/OUTPUT
PORT

Circuit inside dashed lines is on GPIB 1/0 ports only.
TYPICAL OF ALL 1/0 PORTS
EXCEPT SRO, NDAC, and NRFD GPIB 1/0 PORTS

ATN+EOIOUTPUT

---TEST POINT
TEST

l'

CL=30pF
(See Note A)

FROM (TERMINAL)
OUTPUT UNDER
--.-----<.--4t--TEST POINT
TEST

l'

48011
.,..

LOAD CIRCUIT

-

-

--3V

1.5 V

1.5 V
(S •• Not. B)

BUS
INPUT

~---OV

1,.5 V

-..J: '

(S •• Not. B)

tPLH~

tPHL-1f-+!

',...-----....... -I--- VOH

BUS
OUTPUT

3kl1

LOAD CIRCUIT

,..-----~-

INPUT

CL=30pF
(Se. Note A)

2.2 V

\-1;5: - 0V
-3

v

_

tPHL--I4-+!

I , - - - - - - " " ' ; - - - - VOH

TERMINAL
OUTPUT

1.5 V

1.5 V
VOL

VOLTAGE WAVEFORMS

VOLTAGE WAVEFORMS

FIGURE 1. TERMINAL-TO-BUS
PROPAGATION DELAY TIMES
TEST
POINT

FIGURE 2. BUS-TO-TERMINAL
PROPAGATION DELAY TIMES

VCC

2 kl1

FROM
ATN+EOI
VOLTAGE WAVEFORMS

(S •• Not. CI

LOAD CIRCUIT

FIGURE 3. ATN+EOI PROPAGATION DELAY TIMES
NOTES:

A. CL includes probe and jig capacitance.

S. The input pulse is supplied by a generator having the following characteristics: PRR ::s; 1 MHz, 50% duty cycle, tr

S

6 ns,

tf :56 ns, Zout = 500.
C. All diodes are 1 N916 or 1 N3064.

TEXAS •

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

2-541

SN16164B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION
S1

C>--5V

20011

FROM (BUS)
OUTPUT UNDER ~""'-"-~~TESTPOINT
TEST

FROM (TERMINAL)
OUTPUT
UNDER TEST

CL = 15 pF
48011
Ils.eNotoA',::"

--~~----t---~--­

CL = 15 pF
(Soe Note AI

I

3kl1

.".

LOAD CIRCUIT

LOAD CIRCUIT

r----

--""\ r--------'\

--""\ r--------..,

3V

iI'

tpZH-..I
BUS
I
OUTPUT
I
S10PEN

I

~
I
1
2V

tpZL--+ot-+t
BUS
OUTPUT
51 CLOSED

tpHZ-.i

Ii'

r--

- - - 1 90%

-

I

VOH

\!,.0 V

~II

\",. _ _ _ _ _ _OJ

0': ~ . :.

tPZH-.j
TERMINAL
I
OUTPUT
I
tPZL......j

.. 3.5 V
VOL

r+-

TERMINAL
OUTPUT
SlCLOSED

VOLTAGE WAVEFORMS

tpHZ-+I

I

I

51 OPEN

0V

tPLZ~

1

r-----

3V
CONTROL
V 1.5 V
~ 1.5 V
INPUT ---'jl\
(S.e
Note
Bj
I \.. __ "_ _____ J 1\.. _____ OV

CONTROL
'll1.5 V
V 1.5 V
INPUT __ -' "- _______
(Se. Note B) -'1"11\ ____ OV

1.5 V

,...

-----I

I

VOH

90%

I

J--

tpLZ--!

OV

"'4V

1

1.0 V

VOLTAGE WAVEFORMS

FIGURE 4. BUS ENABLE AND
DISABLE TIMES

FIGURE 5. TERMINAL ENABLE
AND DISABLE TIMES

NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR " 1 MHz, 50% duty cycle, tr ,,6 ns,
tf ,,6 ns, Zout = 50 O.

TEXAS . "

2·542

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN75164B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
TERMINAL HIGH·LEVEL OUTPUT VOLTAGE

TERMINAL LOW·LEVEL OUTPUT VOLTAGE

vs

vs

HIGH·LEVEL OUTPUT CURRENT

LOW·LEVEL OUTPUT CURRENT
0.6

4.0

>I

3.5

l!l
15

3.0

i!l.

..5-"

>

2.0

...I

1.5

.,..

r\.

2.5

"

0

.........

VCIC=5 IV
TA=25°C-

E

'\~

.."
"

15

>

'\

i:.en
:i: 1.0
I

o

-5

~

0.2

Qj

...I

~

-10 -15 -20

/

...I

I

'""

0.5

o

...,

0.3

0

J:

>

0.4

V

a.

'\.

Qj

0

:r.,

I

tC=5 V
0.5 -TA=25°C

...I

0

>

V

~

0.1

o

-25 -30 -35 -40

/

/

V

/

o

IOH-High.Level Output Current-mA

10

20

30

40

50

60

IOL -Low·Level Output Current-mA

FIGURE 6

FIGURE 7
TERMINAL OUTPUT VOLTAGE

vs
BUS INPUT VOLTAGE
4.0
3.5

>

VCC=5V
No load
TA = 25°C

3.0

I

t

2.5

~..

2.0

9

1.5

~

1.0

g

VT-

VT+

0.5

o
o

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VI-Input Voltage-V

FIGURE 8

TEXAS .."

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

2-543

SN75164B
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
BUS HIGH·LEVEL OUTPUT VOLTAGE

BUS LOW·LEVEL OUTPUT VOLTAGE
vs
LOW·LEVEL OUTPUT CURRENT

vs
HIGH·LEVEL OUTPUT CURRENT

4

>"
I
&

~..

t"
0

....

0.6

I

3~

2

VCC=5 V
TA = 25°C

.i:

.2'

::t

I

-20

0

0.3

."

/"

....I

g 0.2

'\.

....I

-30

I

....I

~

~

-50

-40

/'

V

/

/"

V

0.1

o

-60

/'

V

;'

>

II

>
-10

.."

0.4

/'

-

So

0

o

0.5

'0

'\

::t

..

>

"\

....I

VCC= 5V
TA = 25°C

!

~I\.

II

o

>I

o

IOH-High·Level Output Current-mA

10

70 80 90 100

20 30 40 50 60

IOL -Low·Level Output Current-mA

FIGURE 9

FIGURE 10

BUS OUTPUT VOLTAGE

BUS CURRENT

vs

vs

TERMINAL INPUT VOLTAGE

BUS VOLTAGE

VCC=5V
No load
TA = 25°C

2
c(

E

...c:I
f

~

."

-1

(,)

III

I
-:;

..."
~
OL-~

0.9

__~__L-~__~__~~~

1.0

1.1

1.2

1.3

1.4

1.5 1.6

-1

1.7

3

4

VI/O(busl-Bus Voltage-V

VI-Input Voltage-V
FIGURE 11

FIGURE 12

TEXAS

2·544

2

~

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 75265

5

6

SN75172
QUADRUPLE DIFFERENTIAL LINE DRIVER
02596. OCTOBER 1980-REVISEO APRIL 1988

•

Meets EIA Standards RS-422-A and RS-485

•

Meets CCITT Recommendations V. 11 and
X.27

•

Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments

•

3-State Outputs

•

Common-Mode Output Voltage Range of
-7Vt012V

•

Active-High and Active-Low Enables

•

Thermal Shutdown Protection

•

Positive- and Negative-Current Limiting

•

Operates from Single 5-V Supply

J

OR N PACKAGE
ITOPVIEWI

lA
lY
lZ
ENABLE G
2Z
2Y
2A
GND

VCC
4A
4Y
4Z
ENABLE G
3Z
3Y
3A

OW PACKAGE
ITOPVIEWI

•

Low Power Requirements

•

Functionally Interchangeable with
AM26LS31

lA
lY
NC
lZ
ENABLE G
2Z
NC
2Y
2A
GND

description
The SN75172 is a monolithic quadruple
differential line driver with three-state outputs.
It is designed to meet the requirements of EIA
Standards RS-422-A and RS-485 and CCITT
Recommendations V.11 and X.27. The device
is optimized for balanced multipoint bus
transmission at rates of up to 4 megabaud. Each
driver features wide positive and negative
common-mode output voltage ranges making it
suitable for party-line applications in noisy
environments.

VCC
4A
4Y
NC
4Z
ENABLE G
3Z
NC
3Y
3A

NC-No internal connection

The SN75172 provides positive- and negative-current limiting and thermal shutdown for protection from
line fault conditions on the transmission bus line. Shutdown occurs at a junction temperature of
approximately 150°C. This device offers optimum performance when used with the SN75173 or SN75175
quadruple differential line receivers.
The SN75172 is characterized for operation from OOC to 70°C.

Copyright @ 1980, Texas Instruments Incorporated

PRODUCTION DATA d..........."ain i.farm.ti••

.urrant as of publi...i•• d.... Prod.......I.rm ••
.....111...1... par .h. IIr... of Tox•• I.strum....

:;,~:~l;"[::I':.'li ~!."=:~I~n ~r:.":::~:~~ .ot

TEXAS

,If

INSTRUMENTS
POST OFFICE BOX 655303 • bAllAS. TEXAS 76285

2-545

SN75172
QUADRUPLE DIFFERENTIAL LINE DRIVER
logic symbol t

FUNCTION TABLE
lEACH DRIVERI
INPUT ENABLES
A

G

G

Y

G

H

H

X

H

L

L

H

X

L

H

lY

H

X

L

H

L

lZ

L

X

L

L

H

X

L

H

Z

Z

2Y

2A

H
L
X
Z

2Z
3Y

3A

3Z

= high level
= low level
= irrelevant
= high impedance

4A

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEG Publication 617-12.
Pin numbers shown are for J and N packages.

logic diagram (positive logic)
G -'-14"'}_ _ _ _-'\~.....

G

112}
(2)

lA .....:.Il;,,:}_ _ _ _-I

(3)

(6)

2A -..:..:17..:.}_ _ _- t

3A .....:.(9;,,:}_ _ _ _-I

(5)

(10)
(11 )

(14)
4A .....:.(1;",;5;,;,}___,---t

(13)

lY
lZ

2Y
2Z

3Y
3Z

4Y
4Z

TEXAS.
INSTRUMENTS
2-546

QUTPUTS

G

POST OFFICE BOX ·655303 • DALLAS, TeXAS 75265

(off)

Z

SN75172
QUADRUPLE DIFFERENTIAL LINE DRIVER
schematics of inputs and outputs
TYPICAL OF ALL OUTPUTS

EQUIVALENT OF EACH INPUT
VCC ------~~--- -

INPUT - -....-

-------4.--- VCC

-

....-1

OUTPUT

-

Data inputs: Req - 3 kl! NOM
Enable inputs: Req = 8 kl! NOM

-

-

- - . . _ - -....- - - GND

absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, Vec ......................................................... 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. OoC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package .. " ........ 300 0 e
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DW or N package. . . . . .. 260°C
NOTE 1: All voltage values are with respect to the network ground terminal.

DISSIPATION RATING TABLE
PACKAGE

TA " 25°C
POWER RATING

DERATING FACTOR
ABOVE TA .;. 25°C

TA - 70 D C
POWER RATING

OW

1125mW

9.0 mW/DC

720mW

1025 mW

8.2 mW/DC

656 mW

1150mW

9.2 mW/DC

736 mW

N

recommended operating conditions
Supply voltage, V CC
High-level input voltage, V,H

MIN

NOM

MAX

4.75

5

5.25

Low-level input voltage, V,L
High-level output current, IOH
Low·level output current, IOL
0

Operating free· air temperature, T A

.

V

V

2

Common-mode output voltage, VOC

UNIT

V

0.8
-7 to 12

V

-60

rnA

60

rnA
DC

70

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-547

SN75172
QUADRUPLE DIFFERENTIAL LINE DRIVER
electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted)
VIK
Vo
IV ODll
IV OD21
VOD3
alVODI
VOC
alvocl
10

PARAMETER
Input clamp voltage

11= -18 mA

Output voltage
Differential output voltage

10 - 0
10 = 0

TEST CONDITIONS.

Differential output voltage
Differential output voltage
Change in magnitude of
differential output voltage

Typt

0
1.5

RL = 10011.

See Figure 1

RL = 5411.
See Note 2

See Figure 1

2
1.5
1.5

Change in magnitude of

*

common-mode output voltage
Output current with power off

High-impedance-state output current

High-level input current

lOS

Short-circuit output current

VCC = o.
Vo VO=-7Vto12V

-7Vto12V

VI = 2.7 V
VI = 0.5 V
Vo = -7 V

Low-level input current

Supply current (all drivers)

Vo = VCC
Vo = 12 V
No load

UNIT

6

V
V

6

V
V

2.5

RL = 54 II or 100 II. See Figure 1

Common-mode output voltage §

MAX
-1.5

l'2 VODl

*

102
IIH
IlL

ICC

MIN

I Outputs enabled
I Outputs disabled

38
18

5
5

V
V

±0.2

V

+3
-1

V

±0.2

V

±100
±100

~A

20
-360
-180

~A

180

mA

500
60
40

~A

~A

mA

t All typical values are at VCC = 5 V and T A = 25 ·C.

*alvODI and alvocl are the changes in magnitude of VOD and VOC. respectively. that occur when the input is changed from a high
level to a low level.
§ In EIA Standard RS-422-A. VOC. which is the average of the two output voltages with respect to ground, is called output offset voltage. VOS.

NOTE 2: See EIA Standard RS-485 Figure 3-5. Test Termination Measurement 2.
SYMBOL EQUIVALENTS
DATA SHEET PARAMETER

RS-422-A

RS-485

Vo

Voa, Vob

I V ODll
I V OD21

Vo
Vt (RL - 100 II)

Voa. Vob
VO
Vt (RL - 5411)
Vt (Test Termination)
Measurement 2)

I V OD31
alVODI
VOC
alvocl
lOS
10

IIVtl-IVtll

IIVtl-IVtll

IVosl
I Vos-Vos I

IVosl
I Vos-Vos I

Ilsal,llsbl
Ilxal.llxbl

lia. lib

TEXAS •

INSTRUMENTS
2-548

POST OFFICE BOX 655303· DALLAS. TEXAS 75285

SN75172

QUADRUPLE DIFFERENTIAL LINE DRIVER
switching characteristics.

vee" 5 V.

TA ..

25°e

PARAMETER

TEST CONDITIONS

TYP

MAX

45

65

ns

80

120

ns

See Figure 3

80

120

ns

RL - 110!l.

See Figure 4

45

80

ns

RL - 110

See Figure 3

ns

See Figure 4

78
18

115

i'lL -

n.
110 n.

30

ns

too

Differential~output

delay time

tTD

Differential~output

transition time

tpZH

Output enable time to high level

RL - 110!l.

tpZL

Output enable time to low level

tpHZ

Output disable time from high level

tpLZ

Output disable time from low level

RL

~

54!l.

MIN

See Figure 2

UNIT

PARAMETER MEASUREMENT INFORMATION

FIGURE 1. DIFFERENTIAL AND COMMON-MODE OUTPUT VOLTAGES
--3V

~
1.5
1.5

INPUT

V

I
I

I

:

GENERATOR

(See Not. AI

IDO~
50

:

n
OUTPUT

_ _.....r

3V

ITO""

V

I

OV

~IOO

+-

~2.5V

50%

I
l

~-2.5

I.

V

Ie- ITO

VOL TAGE WAVEFORMS

TEST CIRCUIT

FIGURE 2. DRIVER DIFFERENTIAL-OUTPUT DELAY AND TRANSITION TIMES
NOTES:

A. The input pulse is supplied by a generator having the following characteristics: tr
cycle ~ 50%. Zo ~ 50!l.
B. CL includes probe and stray capacitance.

$.

5 n5, tf :5: 5 ns, PAR

:s

1 MHz. duty

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DAllAS, TeXAS 75265

2-549

SN75172

.QUADRUPLE DIFFERENTIAL LINE DRIVER
PARAMETER MEASUREMENT INFORMATION

~~S:-

INPUT

Jt .. ~ .

o V or 3 v-I---"'"

~tPZH
I

- - 0 - -. . .--4.. OUTPUT

OUTPUT
GENERATOR
ISEE NOTE AI

I

SO 0

---- J

-=

i\.:..:.....

,O.S V

I 2.3 V

:. I

I
I

RL-1100

SOP~

3V
0 V

I -~-VOH
1'~

S1

I
I

--..-I

CL ISEE NOTE BI

V

off

~ OV

I4-tPHZ

3V
ISEE NOTE CI
TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 3. tpZH AND tPHZ
SV
RL - 1100

I

S1

o V or 3 V ' - - - - - I

~-:: -; -

INPUJf.S V

~~--~a__4~OUTPUT

I

~tPZL

I

GENERATOR
(SEE NOTE AI

500

I

I
L -

-=

_ _--.1

.

CL -NOTE
SOPl
- - - J1SEE
BI

3V
(SEE NOTE CI

OUTPUT

-

)L2.3 V
\;

3 V
0 V

:

I+----+t- tpLZ
~SV

:

_

r-_ O.S V

~_

f-

VOL

.,..

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 4. tPZL AND tPLZ
NOTES: A. The input pulse is supplied by a generator having the following characteristics: tf S 5 ns, tf S 5 ns, PRR S 1 MHz, duty
cycle = 50%, Zout = 500.
B. CL include probe and jig capacitance.
C. To test the active-low enable G, ground G and apply an inverted waveform to G.

TEXAS ."

INSTRUMENTS
2-550

POST OFFICE

BO~

655303 • DAllAS, TexAS 75285

SN75112
QUADRUPLE DIFFERENTIAL LINE DRIVER
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLT AGE
vs
LOW-LEVEL OUTPUT CURRENT

HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5

>
I

8,

4

I-- r-..

~

~ 3.5

:;

3

~

5

I
Vec = 5 V
TA = 25°C

4.5

> 4.5
I

..

g>

I----

............

...........

02.5
'iii

\

.

= 5 V
I-TA = 25°C

15

3.5

'[

3

~

2.5

>

....6; 2

.!1' 1.5

....

~.
o

>

1

:..

II
..- f.-----

1

o
> 0.5

0.5

o

o

o
o

-20 -40 -60 -80 -100 -120
IOH-High-level Output Current-rnA

i

20
40
60
80
100
IOl -low-Level Output Current-rnA

OUTPUT CURRENT
vs
OUTPUT VOLTAGE
50
Ou~put 'Disabled
40 TA = 25°C

4

I

8,

Q

3

............

:; 2.5
Q.

2

I'-- ........

.~

!! 1.5

~

~0.5

10

10 20 30 40 50 60 70 80 90 100
IO-Output Current-rnA

'\ VCe

0

- -30

=

,"(Vec

-10

o"
I -20
o

\\

I

Q

20

:;
So

1\

is

f

E
..
§

()

1'\

'iii

00

30



:;
o

1_

Vec = 5 V
i-TA = 25°e

........

120

FIGURE 6

DIFFERENTIAL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

f!

1--

----

FIGURE 5

~ 3.5

f
f

_.

o~ 1.5

:I:

I

a;

....6; 2
J:

I

4 _ Vec

0 V
1_

5 V

U

~

-40
-50
-25-20-15-10-5 0 5 10 15 20 25
YO-Output Voltage-V

FIGURE 8

FIGURE 7

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-551

5N75172
QUADRUPLE DIFFERENTIAL LINE DRIVER
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
100

I

I

SUPPLY CURRENT
vs
SUPPLY VOLTAGE
30

I

90 f-No Load
f- Outputs Enabled
« 80 TA - 25°e
E
I 70

~

/I

C

~ 60
u· 50
::l

INPUTS

>-

0.
Q.
::l

)
)1"

I
u 30
20
10

o
o

.-&

~

I

I

/

=

J

~::l

~

u 15

/

>-

OPEN\

40

UJ

9

~c

.1

No Load.
25 f- Inputs Open
Output Disabled
TA
25°e
20

.0.

,./;'NPUTS
i"O- GROUNDED

Q.
::l

~

u

10

9

5

V

2
3
4
5
6
vee-SupplV Voltage-V

7

o
o

8

V

/

V

/

V

V

/

/

./

FIGURE 9

2
3
4
5
6
Vee - SupplV Voltage - V

7

8

FIGURE 10

TYPICAL APPLICATION
1/4 SN75173

1/4 SN75174

1/4 SN75173

1/4 SN75175

1/4 SN75172

1/4 SN75173

114 SN75173

1/4 SN75174

NOTE A: The line length should be terminated at both ends in its characteristic impedance. Stub lengths off the main line should be kept
as short as possible.
.

FIGURE 11

TEXAS . "

2-552

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 75265

SN75173
QUADRUPLE DIFFERENTIAL LINE RECEIVER
02600. OCTOBER 1980-REVISEO JULY 1990

•

Meets EIA Standards RS-422-A. RS-423-A.
and RS-485

•

Meets CCITT Recommendations V.l0.
V.ll. X.26. and X.27

D. J. OR N PACKAGE
ITOPVIEW}

•

Designed for Multipoint Bus Transmission on
Long Bus Lines in Noisy Environments

•

3-State Outputs

•

Common-Mode Input Voltage
Range ... -12 to 12 V

•

Input Sensitivity ...

•

Input Hysteresis ... 50 mV Typ

•

High Input Impedance ... 12 kO Min

± 200

1B

Vee

1A
1Y

4B
4A

G
2Y

4Y

2A
2B

3Y
3A

G

GND ~'-----';.J-' 3B

logic symbol t

mV

G

G

•

Operates from Single 5-V Supply

•

Low Power Requirements

lA

•

Plug-In Replacement for AM26LS32

18

13} 1Y

2A

description

15} 2Y

28

The SN75173 is a monolithic quadruple
differential line receiver with 3-state outputs. It
is designed to meet the requirements of EIA
Standards RS-422-A, RS-423-A, and RS-485
and several eelTT recommendations. The
device is optimized for balanced multipoint bus
transmission at rates up to 10 megabits per
second. The four receivers share two ORed
enable inputs. one active when high, the other
active when low. The device features high input
impedance. input hysteresis for increased noise
immunity. and input sensitivity of ±200 mV
over a common-mode input voltage range of
- 1 2 to 12 V. Fail safe design ensures that if the
inputs are open circuited. the outputs will always
be high. The SN75173 is designed for optimum
performance when used with the SN75172 or
SN75174 quadruple differential line drivers.

3A

Ill} 3Y

38

4A
48

113} 4Y

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

logic diagram (positive logic)

The SN75173 is characterized for operation from
70 De.

ODe to

Ill} 3Y

113} 4Y

PRODUCTION DATA do.. ments contain information
.......t IS of p.blication dota. P..d.cts conform to
spaclfications por the term. of Tu.. Instruments
otandanl w.rnonty. P..d.ction p......ing do.. nDt
....... rlly i••luda tasting of an p.r. mota...

Copyright © 199p. Texas Instruments Incorporated

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 75265

2-553

SN75173
QUADRUPLE DIFFERENTIAL LINE RECEIVER
FUNCTION TABLE (EACH RECEIVER)
DIFFERENTIAL
A-B
VID '" 0.2 V

-0.2 V < VID < 0.2 V
VID

:s -0.2 V
X

ENABLES

OUTPUT

G

G

Y

H

X

H

X

L

H

H

X

X

L

7
7
L

H

X

X

L

L

L

H

Z

H = high level
L = low level

X = irrelevant
7 = indeterminate
Z

=

high impedance (off)

schematics of inputs and outputs
EQUIVALENT OF A OR B INPUT

EQUIVALENT OF G OR

G INPUT

VCC~------__------~--

100 kO

VCC----------.-----

NOM

8.3 kll
NOM

16.8 kO
NOM
INPUT-.....""""I~-I

100 kll
NOM

TEXAS •
INSTRUMENTS
2-554

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL OF ALL OUTPUTS

SN75173

QUADRUPLE DIFFERENTIAL LINE RECEIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) ........................................... ~ . .. 7 V
Input voltage, A or B inputs ..... , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 25 V
Differential input voltage (see Note 2) ......................................... ± 25 V
Enable input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Low-level output current ................................................... 50 mA
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 3):
D package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 950 mW
J package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1025 mW
N package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1150 mW
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. O°C to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ............ 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package ........ 260°C
NOTES: 1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. Differential-input voltage is measured at the noninverting input with respect to the corresponding inverting input.
3. For operation above 25 DC free-air temperature, derate the 0 package to 608 mW at 70 DC at the rate of 7.6 mW/'C, the
J package to 656 mW at 70'C at the rate of 8.2 mW/'C, and the N package to 736 mW at 70'C at the rate of 9.2 mW/ DC.
In the J package, SN75173 chips are glass mounted.

recommended operating conditions
MIN
4.75

Supply voltage, VCC
Common-mode input voltage, VIC
Differential input voltage, VID
High-level input voltage, VIH

NOM
5

MAX
5.25
±12

0.8
-400

V
V
V
V
p.A

16
70

mA
·C

±12
2

Low-level input voltage, VIL
High-level output current, IOH
Low-level output current, IOL
Operating free-air temperature, T A

0

UNIT
V

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DAUAS. TEXAS 76265

2-555

SN75173

QUADRUPLE DIFFERENTIAL LINE RECEIVER
electrical characteristics over recommended ranges of common-mode input voltage, supply
voltage, and operating free-air temperature (unless otherwise noted)
PARAMETER

TEST CONDITIONS

MIN

Typt

-0.4 mA

MAX

UNIT

VTH

Differential-input high-threshold voltage

Vo - 2.7 V,

10 -

VTL

Differential-input low-threshold voltage

Vo = 0.5 V,

10 = 16 mA

Vhys

Hysteresis §

VIK

Enable-input clamp voltage

11= -18mA

VOH

High-level output voltage

VID- 200 mY,

VOL

Low-level output voltage

VID = -200 mY,

10Z

High-impedance-state output current

II

Line input current

IIH

High-level enable-input current

VIH - 2.7 V

20

pA

IlL

Low-level enable-input current

VIL - 0.4 V

-100

pA

r;

Input resistance

lOS

Short-circuit output current'

-85

mA

ICC

Supply current

70

mA

0.2
-0.2;

V
mV

50
-1.5
10H -

-400 pA

2.7

See Note 4

V
V

0.45

IIOL - 8 mA

0.5

IIOL - 16 mA

Vo - 0.4 V to 2.4 V
Other input at 0 V.

V

±20
1

I VI - 12 V
7V
I VI -

0.8

12

V
pA
mA

kll

-15
Outputs disabled

tAli typical values are at VCC = 5 V, TA = 25°C.
*The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for threshold
voltage levels only.
§Hysteresis is the difference between the positive-going input threshold voltage, VT +. and the negative-going input threshold voltage,
VT _. See Figure 4.
, Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
NOTE 4: Refer to EIA Standard RS-422-A and RS-423-A for exact conditions.

switching characteristics, Vee = 5 V, TA .. 25°e
TEST CONDITIONS

UNIT

TYP

MAX

20

35

ns

Propagation delay time, high-to-Iow-Ievel output

VID = -1.5 V to 1.5 V, CL = 15 pF,
See Figure 1

22

35

ns

tpZH

Output enable time to high level

CL=15pF,

See Figure 2

17

22

ns

tPZL

Output enable time to low level

CL-15pF,

See Figure 3

20

25

ns

tPHZ
tpLZ

Output disable time from high level

5 pF,
CL
CL - 5 pF,

See Figure 2

21

30

ns

See Figure 3

30

40

ns

tpLH

PARAMETER
Propagation delay time, low-to-high-Ievel output

tpHL

Output disable time from low level

TEXAS •
INSTRUMENTS
2-556

POST OFFICE BOX 655303· DALLAS. TeXAS 75266

MIN

SN75173
QUADRUPLE DIFFERENTIAL LINE RECEIVER
PARAMETER MEASUREMENT INFORMATION

~
I I
I
-l.S V
-+/If.- -.I lot----1.5V

INPUT
>--1~""-OUTPUT

tpLH

0 V

0 V

tPHL

I
I

~

OUTPUT

II----VOH

I

1.3 V

1.3 V

,
VOL

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 1. tPLH, tPHL
VCC
1

OUTPUT

>-'--..--<....-

so

. . .HI..-'O

~

S~ 2 kO

0

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 2. tPHZ, tPZH
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ::::; 1 MHz, duty cycle
tr ::s 6 n5 , tf ::'5 6 n5, Zout = 50 n.
B. CL includes probe and jig capacitance.
C. All diodes are ,lN916 or equivalent.
D. To test the active-low enable G, ground G and apply an inverted input waveform to G.

50%,

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-557

SN75173

QUADRUPLE DIFFERENTIAL LINE RECEIVER
PARAMETER MEASUREMENT INFORMATION
VCC

IN=£'V

S2

:!~ -.I ~

~

(See Note C)

OUTPUT

~

-::

-.:

1.3V

If-; tpLZ

I S2 closed
~~1.4V

-T-~:

VOL

0.5 V

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 3. tPZL. tpLZ
NOTES: A. The input pulse is supplied by a "generator having the following characteristics: PRR :S 1 MHz, duty cycle
tr :S 6 ns, tf :S 6 ns, Zout = 50 O.
B. CL includes probe and jig capacitance.
C, All diodes are lN916 or equivalent.
D. To test the active-low enable G, ground G and apply an inverted input waveform to G.

50%,

TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE

5
VCC

HIGH-LEVEL OUTPUT VOLTAGE

vs

vs

DIFFERENTIAL INPUT VOLTAGE

HIGH-LEVEL OUTPUT CURRENT

=

5 V

TA

10 = 0

=

5

25°C

V:D .IO.2 I V
TA - 25°C -

>

.
I

>

.
I

D>

!0
>

=
~

0
I
0

D>

4

VIC 12 V I--

!0
>

VT-- I--

'5

3

VT+ r---

0
"ii
>

2

4

3

VIC -12 V
VTI__
VT+

VIC 0

;--

V~--t '-VT+

I

~

.
1:.

2

....

:---..

~~
~~

I,,\: ~ VVCC -

I~ ~ VCC ~~
~~

D>

:f

>

I

%:

>
-125

~~

o
-75

-25 0

25 50 75 100 125

o

VID-Dlfferentiallnput Voltage-mV

-10

-20

-30

-40

10H-High-Level Output Current-mA

FIGURE 4

FIGURE 5

TEXAS . "

INSTRUMENTS
2-558

5 V

VCC - 4.75 V

0

o

5.25 V

POST OFFICE BOX 855303 • DALLAS. TEXAS 75265

-50

SN75173
QUADRUPLE DIFFERENTIAL LINE RECEIVER

TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
0.6

5.0

>

4.5

I

CD
til

4.0

0

3.5

=
S

3.0

:I

>

>

r

1.5

~

>

0

2.5

L

0.3

....

....I

Vee - 5 V
. VIO a 0.2 V
0.5 IOH - -440/LA

i

o

1

10

20

0

>

o
40

50

60

70

80

o

5

10

5

VIO - 0.2 V
Load - 8 kG to ground
TA - 25°C

>
0.4

i

~

-'

"

CD
tD

0.3

Vee

3

~

5 V

/'

Vee - 4.75 V_

>

=
S

0.2

0

2

I

0

....

....

30

Vee - 5.25 V-

I

0

I
0

4

>

>

~0

25

OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE

0.5

~CD

20

FIGURE 7

LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

=
S

15

IOL -Low-Level Output eurrent-mA

FIGURE 6

I

i/

/

TA-Free-Air Temperature- °e

CD
til

V

0.1

'1

30

V

/

/'

/

0.2

....0

1.0

o

0.4

=
S-

2.0

I
J:
0

/'

1!0

!l
J:.

0.5

CD
til

'"
1.

0
"ii
>

Vee - 5 V
TA - 25°C

>

I

>
0.1

Vee - 5 V
VIO - -0.2 V
IOL-8mA

>
0

o

I

I

10

20

30

o
40

50

60

70

80

o

0.5

1.5

2

2.5

3

VI-Enable G Voltage-V

TA-Free-Air Temperature- °e

FIGURE 9

FIGURE 8

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-559

SN75173
QUADRUPLE DIFFERENTIAL LINE RECEIVER
TYPICAL CHARAcTERISTICS
INPUT CURRENT
vs
INPUT VOLTAGE

OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE

6

IL

VIO - -0.2 V
Load - 1 kO to Vee
TA - 25°e

Vee - 5.25 V

5

>

...

Vee - 4.75 V

I

'"

"I

f'

4

0.75

I

Vee - 5 V

.t:
0

>
5

3

5-

"

0
I
0

'5

~ - 0.25 1--+-+-""""'--h"'il-"<-'''''''''',-lI--'r'lr'.-'II:-'t-'i

"j

2

= - 0.5 h4--+-,.-'l'<-''rI'r

>

o
o

0.5

1.5

2

2:5

3

- 1 .0 .......-A....>....Jl.....,...J>....."-fi....>.J..L..l..L>.....ll..J.......>.LL..>.U.....lI
-8 -6 -4 -2 0
2
4
6
8 10 12

VI-Enable G Voltage-V

VI-Input Voltage-V
FIG~RE

FIGURE 10

11

TYPICAL APPLICATION
1/4 SN75172

'/4 SN75175

UP TO 32
DRIVER/RECEIVER PAIRS

1/4 SN75173

1/4 SN75172

'/4 SN75173

1/4 SN75174

1/4 SN75173

1/4 SN75174

NOTE: The line should be terminated at both ends in its characteristic impedance. Stub lengths off the main line should be kept as short
as possible.

~

2-560

TEXAS
INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 76286

SN75174

QUADRUPLE DIFFERENTIAL LINE DRIVER
02601. OCTOBER 1980-REVISEO MAY 1988

•

•

J OR N PACKAGE

Meets EIA Standards RS-422-A and RS-485
and CCITT Recommendations V.11 and
X.27

(TOP VIEW)

1A
1Y
lZ
1.2EN
2Z
2Y
2A
GND

Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments

•

3-State Outputs

•

Common-Mode Output Voltage Range of
-7Vt012V

•

Active-High Enable

•

Thermal Shutdown Protection

•

Positive- and Negative-Current Limiting

•

Operates from Single 5-V Supply

•

Low Power Requirements

•

Functionally Interchangeable with MC3487

VCC
4A
4Y
4Z
3,4EN
3Z
3Y
3A
OW PACKAGE
(TOP VIEW)

lA
1Y
NC
1Z
1,2 EN

description

2Z

The SN75174 is a monolithic quadruple
differential line driver with three-state outputs.
It is designed to meet the requirements of EIA
Standards RS-422-A and RS-485 and CCITT
Recommendations V.11 and X.27. The device
is optimized for balanced multipoint bus
transmission at rates up to 4 megabaud. Each
driver features wide positive and negative
common-mode output voltage ranges making it
suitable for party-line applications in noisy
environments.

NC
2Y
2A
GND

VCC
4A
4Y
NC
4Z
3,4 EN
3Z
NC
3Y
3A

NC-No internal connection

logic symbol t

The SN75174 provides positive- and negativecurrent limiting and thermal shutdown for
protection from line fault conditions on the
transmission bus line. Shutdown occurs at a
junction temperature of approximately 150°C.
This device offers optimum performance when
used with the SN75173 or SN75175 quadruple
differential line receivers.
The SN75174 is characterized for operation from
ooe to 70 oe.
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

FUNCTION TABLE (EACH DRIVER)
INPUT

ENABLE

H

H

L
X
H = TTL high level.
L = TTL low level.

OUTPUTS

H

Y
H
L

H

L

Z

Z

Z

L

X' = irrelevant,
Z = High impedance (off)

PRODUCTION DATA doc.mants cORllin information
c.rrant as of p.blication dOli. Pr.d.... conform to
opa.ificatl••• par tho II.... of T.... Inatr.menll

:=~i~·I~:I~'li =:~':l' ~l·:'~::':~· n.t

Copyright © 1986, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-561

SN75174
QUADRUPLE DIFFERENTIAL LINE DRIVER

logic diagram. each driver (positive logic)

schematics of inputs and outputs

EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS

vcc--------------~------

-------4~------VCC

Req

INPUT

--.---e----I
....----OUTPUT

~----~__-------GND

Data Inputs: Req = 3 kll NOM
Enable Inputs: Req = 8 kll NOM

absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage. Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range ...................................... O°C to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1.6 mm (1/16 inch) from case for 60 seconds: J package. . . . . . . . . . .. 300°C
Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds: OW or N package . . . . .. 260°C
NOTE 1: All voltage values are with respect to the network ground terminal.

DISSIPATION RATING TABLE
DERATING FACTOR

J

TA s 25°C
POWER RATING
1125mW
1025 mW

ABOVE TA - 25°C
9.0 mW/oC
8.2 mW/oC

TA - 70°C
POWER RATING
720mW
656 mW

N

1150mW

9.2 mW/oC

736mW

PACKAGE
OW

TEXAS

~

INSTRUMENTS
2-562

POST OFFICE BOX 655303 • DALLAS. TEXAS· 75266

SN75174
QUADRUPLE DIFFERENTIAL LINE DRIVER
recommended operating conditions
MIN
4.75

Supply voltage, Vcc '
High·level input voltage, VIH
Low-Level input voltage, VIL
Common-mode output voltage, VOC
High-level output curent, 10H

NOM

MAX

UNIT

5

5,25

V
V

0.8
-7 to 12
-60

V
V
mA
mA
DC

2

Low-level output current, 10L

60
0

Operating free-air temperature, T A

70

electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted!
VIK

PARAMETER
Input clamp voltage

VOH

High-level output voltage

VOL

Low-level output voltage

Vo

Output voltage
Differential output voltage

1V0Dli
IVOD21
VOD3
alVODI
VOC
alVocl

TEST CONDITIONS

MIN

TYpt

11= -18 rnA
VIH
fOH
VIH
10L

=
=
=

2 V,
-33 rnA
2 V,
33 rnA

VIL = 0.8 V,

Differential output voltage
Differential output voltage
Change in magnitude of

1.1

RL = 100O,

See Figure 1

RL = 540,
See Note 2

See Figure 1

6

*

VODl
2
1.5
2.5
1.5

differential output voltage;
Common mode output voltage

RL=5400rl000,

See Figure 1

VO- -7Vto12V

Change in magnitude of
common mode output voltage;

10

Output current with power off

102

High-impedance-state output current

VCC = 0,
Vo - -7Vto 12V

IIH
IlL

High-level input current

VI = 2.7 V

Low-level input current

VI = 0.5 V
Vo = -7 V

lOS

Short-circuit output current

Vo = VCC
Vo - 12 V

ICC

Supply current lall drivers)

No load

I Outputs enabled
I Oututs disabled

38
18

V

V

6

0
1.5

UNIT

V

3.7

VIL - 0.8 V,

10 - 0
10 = 0

MAX
-1.5

V
V
V

5
5

V
V

±0.2

V

+3
-1

V

±0.2

V

±100

~A

±100

~A

20
360
-250

~A

180
500
60
40

rnA

~

rnA

t All typical values are at VCC = 5 V and TA = 25 DC.

t a I VOD I and a I VOC I are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high
level to a low level,
NOTE 2: See EIA Standard RS-485 Figure 3.5, Test Termination Measurement 2.

TEXAS ."

INSTRUMENTS
POST OFFICE

aox 855303 • DALLAS. TEXAS 76266

2-563

SN75174
QUADRUPLE DIFFERENTIAL LINE DRIVER
switching characteristics, Vee == 5 V, TA tDD
tTO
tpZH
tpZL
tpHZ
tpLZ

25°e
TEST CONDITIONS

PARAMETER
Differential-output delay time
Differential-output transition time
Output enable time to high level
Output enable time to low level
Outut disable time from high level
Output disable time from low level

MIN

RL = 541l,

Sea Figure 2

RL = 110 Il,

See Figure 3

RL-ll01l,
RL - 110 Il,
RL - 110 Il,

See Figure 4
See Figure 3
See Figure 4

TYP

MAX

45

65

80

120
120

80
55
75
18

80
115
30

UNIT
ns
ns
ns
ns
ns
ns

SYMBOL EQUIVALENTS
DATA SHEET PARAMETER

RS-422-A

RS-485

Vo

Voa, Vob
Vo
Vt (RL - 100 III

Voa , Vob

IVODll
IVOD21
IVOD31

VO
Vt (RL = 54 III
Vt (Test Termination
Measurement 2)
IIVtl -

IVtl1

AIVODI

IIVtl - IVtl1

Voe

IVosl

IVosl

AIVoel
lOS

I Vos - Vos I
Iisal, Ilsbl

I Vos - Vos I

10

I1xal, Ilxbl

lia' lib

PARAMETER· MEASUREMENT INFORMATION

FIGURE 1. DIFFERENTIAL AND COMMON-MODE OUTpUT VOLTAGES

~

---3V

INPUT
RL _
54 Il

GENERATOR
(Sea Note A)

....___..r-.,.

1.5 V

I

OUTPUT

....\.+I

tDD
CL-50pF
(See Note B)

3V

I

1.5 V

.

I
OV
I+-*- tDD

+ --2.5V

OUTPUT
-2.5V

~tTD

TEST CIRCUIT

VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: tr :S 5 ns, tf :S 5 ns, PRR :S 1 MHz,
duty cycle = 50%, Zo = 50 Il.
B. CL includes probe and stray capacitance.

FIGURE 2. DIFFERENTIAL.-OUTPUT DELAY AND TRANSITION TIMES

TEXAS ..,
2-564

INSTRUMENTS
POST OFFICE BOX 656303 • DAUAS. TEXAS 75266

5N75174

QUADRUPLE DIFFERENTIAL LINE DRIVER
PARAMETER MEASUREMENT INFORMATION

INPUT

~~.5~ - - 3 V

--11 . _.

" ' ( ) - -........_ - OUTPUT

3 V or 0 V-+--I

~OV

I

~tpZH

0.5V

I
f~
I I

GENERATOR
(See Note Al

-j-VOH

I

OUTPUT

2.3 V

... ~
tpHZ~

TEST CIRCUIT

Voff ~ 0 V

VOLTAGE WAVEFORMS

FIGURE 3. tpZH AND tPHZ
5V

\~5~

RL- 11011

o V to 3 V --+---1
GENERATOR
(See Note Al

50 II

I
L _ _ _ .-l

~o--~~~OUTPUT

INPuY,1.5V

FI

CL - 50 P
(See Note BI

tpZL

~

I.

-=

\

-::

I

~trtPLZ 5V

I
OUTPUT

-

2.3 V

I

O}V_

~

f- VOL

=
TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 4. tpZL AND tPLZ
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
tf S 5 ns, 20 = 50 II.
B. CL includes probe and stray capacitance.

s

1 MHz, duty cycle = 50%, tr S 5 ns,

TEXAS •
INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TEXAS 75285

2-565

SN75174
QUADRUPLE DIFFERENTIAL LINE DRIVER

TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT

5

>
I

&

!

~

4
3.5

3

;
o

2.5

]

2

J::

~

5

I

----

4.5

LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT

Vee 0 5 V
TA - 25°C

>

..
I

i>'"

............. ~
............

r--..

\

2.5

~

.3
....I

I

::I:

o
>

3

......

I

3.5

0

a;
>

1.5

4

;

~

I
Vee - 5 V
TA - 25°C

4.5

/
/

2
1.5
"....

0

>

0.5

o

o

-20

-40

-60

-80

o

-100 -120

o

20

IOH-High.-Level Output Current-rnA

4
3.5

i'"

3

..

>
;

~

0
ii

~
!

'" , ,

I'...

r'\

1.5

10 20 30 40

~

10

0

,Vee - OV

)"""

-10

"""'Vee - 5 V

I -20

o
-

-30

.1

-40

\

o

O~tPu~ diS~bledl

20

<3

o'"

i\

0.5

o

50 60 70 80 90 100

-50
-25-20-15-10-5

IO-Output Current-rnA

0

5

10 15 20 25

VO-Output Voltage-V

FIGURE 8

FIGURE 7

TEXAS .".
INSTRUMENTS
2-566

120

30

;
2-

\

Q

>

100

TA - 25°C

"1I

.......

2

40 _

Vee - 5 V_
TA - 25°C

~I

0

50

.........

2.5

80

OUTPUT CURRENT
vs
OUTPUT VOLTAGE

! II.

........

60

FIGURE 6

DIFFERENTIAL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

I

40

IOL -Low-Level Output Current-rnA

FIGURE 5

>

-- ---

L

POST OFFICE BOX 656303 • DALLAS. TEXAS 75286

SN75174
QUADRUPLE DIFFERENTIAL LINE DRIVER

TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
SUPPLY VOLTAGE

SUPPLY CURRENT
vs
SUPPLY VOLTAGE
100

«

E
I

E
!!
:;
()

>
is.
Q.

1

30

1

.1

1

90 _ No Load
Outputs Enabled
80 ~ TA = 25°e

«

I

70

#

60
INPUTS OPEN " "

50

:l

40

I

30

E
~

~

:l

()

>

10

...,..,. ~
o

2

(I)

I

10

5

o
4

5

7

6

8

V

/

V

/

V

L

I

I

/

()

5}

~

3

/

:l

~

20

15

is.
Q.

# ~INPUTS
GROUNDED

5}

o

I

f

(I)

()

E

II

No Load,
25 _ Input Open
Output Disabled
TA - 25°e
20

o

vee-Supply Voltage-V

/

V
2

3

4

5

6

7

8

vee-Supply Voltage-V

FIGURE 10

FIGURE 9

TYPICAL APPLICATION

1/4 SN75173

1/4 SN75175

UP TO 32
DRIVER/RECEIVER PAIRS

• • •

1/4 SN75172

1/4 SN75173

1/4 SN75173

1/4 SN75174

NOTE: The line length should be terminated at both ends in its characteristic impedance. Stub lengths off the main line should be kept
as short as possible.

FIGURE 11

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 75265

2-567

2-568

SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVER
02602, OCTOBER 19BO-REVISED SEPTEMBER 1989

•
•
•

D, J, OR N PACKAGE

Meets EIA Standards RS-422-A. RS-423-A.
and RS-485

(TOP VIEW}

Meets CCITT Recommendations V.10.
V.11. X.26. and X.27
Designed for Multipoint Bus Transmission on
Long Bus Lines in Noisy Environments

•

3-State Outputs

•

Common· Mode Input Voltage Range
-12Vt012V

•

Input Sensitivity ... ± 200 mV

•

Input Hysteresis ... 50 mV Typ

•

High Input Impedance . . . 12 kD Min

16

Vee

lA
lY

46
4A

1,2EN'
2Y
2A
26

4Y
3,4EN
3Y
3A

GN D '-C=-------:::.r' 36

logic symbol t

•

Operates from Single 5-V Supply

•

Low Power Requirements

131 IV

•

Plug-in Replacement for MC3486

151 2V

description
The SN75175 is a monolithic quadruple
differential line receiver with 3-state outputs, It
is designed to meet the requirements of EIA
Standards RS-422-A. RS-423-A. and RS-485
and several eelTT recommendations. The
device is optimized for balanced multipoint bus
transmission at rates up to 10 megabits per
second. Each of the two pairs of receivers has
a common active-high enable.

1111 3V
1131 4V

tThis symbol is in accordance with ANSI/IEEE Std 91·1984 and
lEe Publication 617-12,

logic diagram (positive logic)

The receivers feature high input impedance,
input hysteresis for increased noise immunity.
and input sensitivity of ± 200 mV over a
common-mode input voltage range of ±'12 V,
The SN75175 is designed for optimum
performance when used with the SN75172 or
SN75174 quadruple differential line drivers,
The SN7517 5 is characterized for operation from
to 70 oe,

ooe

FUNCTION TABLE (EACH RECEIVER}
DIFFERENTIAL INPUTS
A-B
VIO"" 0,2

<

v
< 0.2 v

ENABLE

OUTPUT

Y
H

H
H

?

VIO> -0.2 V

H

L

X

L

Z

-0.2 V

VIO

(Ill 3Y

H = high level, L = low level, ? = indeterminate,
X ~ irrelevant, Z ~ high impedance loffl

4A
48

PRODUCTIOI DATA docullln" contai. iDformatio.
currant II Df publlcati•• date. Prod.... co.form to
....cHicatio•• par tbo ianni of T.... I.struma."

=:'":;~·i~:~t,yi ~~:~i:; :.r'=~":.::'~ .0'

Copyright @ 1989, Texas Instruments Incorporated

TEXAS . . ,
INSTRUMENTS
POST OFFICE BOX 655303 • DAUAS, TEXAS 76266

2-569

SN75175

QUADRUPLE DIFFERENTIAL LINE RECEIVER
schematics of inputs and outputs
EQUIVALENT OF EACH A OR B INPUT

EQUIVALENT OF EACH ENABLE INPUT

TYPICAL OF ALL OUTPUTS

VCC----~~---.--

VCC----------e----8.3kll
NOM

16.8kll
NOM

INPUT'_I\I\r-""1~:::"-+-_

INPUT--......-.~

OUTPUT

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage, A or B inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 25 V
Differential input voltage (see Note 2) ......................................... ± 25 V
Enable input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Low-level output current ................................................... 50 mA
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 3):
D package .................................................... '.' . .. 950 mW
J package ................................. : ...................... 1025 mW
N Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1150 mW
Operating free-air temperature range ...................................... OoC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package ........... -300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package ....... -260°C
NOTES:

2-570

1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. Differential-input voltage is measured at the noninverting input with respect to the corresponding inverting input.
3. For operation above 25°e free-air temperature. derate the D package to 60B mW at 70 0 e at the rate of 7.6 mw/oe, the
J package to 656 mW at 70 0 e at the rate of B.2 mw/oe, and the N package to 736 mW at 70 0 e at the rate of 9.2 mw/oe.
In the J package, SN75175 chips are glass mounted.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 76265

SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVER

recommended operating conditions
MIN

NOM

MAX

UNIT

4.75

5

5.25

V

Common-mode input voltage, VIC

±12

V

Differential input voltage, VID

±12

V

Supply voltage, V CC

High-level enable input voltage, VIH

2

V

Low-level enable input voltage, VIL

0.8

V

High-level output current, 10H

400

~A

16

mA
DC

Low-level output current, tOl
0

Operating free-sir temperature, T A

70

electrical characteristics over recommended ranges of common-mode input voltage. supply voltage.
and operating free-air temperature (unless otherwise notedl
PARAMETER

VTL

10 = -0.4 mA

VO=2.7V,

voltage
Differential-input low-threshold

= 0.5

Vo

voltage

V,

10

Vhys

Hysteresis §

VIK

Enable-input clamp voltage

II

18 mA

VOH

High-level output voltage

VID

200 mY,

VOL

II

=

MAX
0.2

-0.2~

16 mA

Low-level output voltage

VID

=

400 ~A, See Figure

-200 mY, See Figure 1

J 10L IIOL

1.

2.7
0.5

16 mA

Vo = 0.4 V to 2.4 V

output current
Line input current

±20

=

Other input at 0 V,

I VI

See Note 4

I VI -

V
V

0.45

8 mA

=

V
V

1.5
10H -

UNIT

mV

50

High-impedance-state
10Z

MIN TYpt

TEST CONDITIONS

Differential-input high-threshold
VTH

12 V

1

7V

0.8

V
~A

mA

IIH

High-level enable-input current

VIH - 2.7 V

20

~A

IlL

Low-level enable-input current

VIL - 0.4 V

100

~A

r;

Input resistance

lOS

Short-circuit output current1
Supply current

-85

mA

70

mA

ICC

kll

12
-15
Outputs disabled

t All typical values are at VCC = 5 V, TA = 25 DC.
:t: The algebraic convention, in which the less postitive (more negative) limit is designated as minimum, is used in this data sheet for threshold
voltage levels only.

,

§ Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going input threshold voltage,

VT _. See Figure 4.
, Not mora than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
NOTE 4: Refer to ~IA standards RS-422-A, RS-423-A, and RS-485 for exact conditions.

switching characteristics.

Vee

= 5

V.

TA

=

25 °e

PARAMETER

TEST CONDITIONS

tpLH

Propagation delay time, low-to-high-Ievel output

tpHL

Propagation delay time, high-to-Iow-Ievel output

tpZH

Output enable time to high level

tpZL

Output enable time to low level

tpHZ

Output disable time from high level

tpLZ

Output disable time from low level

CL

=

15 pF,

CL = 15 pF,
CL

=

15 pF,

See Figure 2
See Figure 3 .
See Figure 3

MIN

TVP

MAX

22

35

UNIT
ns

25

35

ns

13

30

ns

.19

30

ns

26

35

ns

25

35

ns

TEXAS •
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

2-571

SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVER

PARAMETER MEASUREMENT INFORMATION

FIGURE 1. VOH, VOL

GENERATOR
(see Note Al

INPUT

I

I

OV

1+--+1- tPH L
1.5 V

__--~-I---VOH
I

2V---------'

OUTPUT

TEST CIRCUIT·

VOLTAGE WAVEFORMS

FIGURE 2. PROPAGATION DELAY TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR '" 1 MHz, duty cycle
tf '" 6 ns, Zout = 50 U.
B. CL includes probe and stray capacitance.

TEXAS~

2-572

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

= 50%, tr

'" 6 ns,

SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVER
PARAMETER MEASUREMENT INFORMATION
1.5V

SW2
2 kll
o-5V

Isee Note C)

GENERATOR
lsee Note A)

5111

TEST CIRCUIT
3V

.

tpZH

INPU~

tpZL

INPU:;---\

.

C . 5 V SWl to 1.5 V

L-A==~v
- - ' M-tpZH

SW20pen
SW3 closed

"----..nI =- =~V
~

I

OUTPUT

OUTPUT

-1.5 V VOH

~
I

tPHZ

- - -

3V

.

--1.5V

3V

SWltol.5V
SW2 closed
0 V SW3 closed

~
-f0.5 V

~

VOL

tpLZ

INPUT~.5V
I

3V

SWlto-l.5V
SW2 closed
- - -OV SW3 closed

I

If--*-tPHZ

I

SWl to -1.5 V
SW2 closed

~ tpZL SW3 open

--OV

INPUT 1.5V

V

--4.5V

'----E
-

-

OUTPUT

C.5

3V

!f-*-tpLZ

~
_ - 0.5 V
•

---1.4V

VOH

OUTPUT

- - -1.4 V

VOL
VOLTAGE WAVEFORMS

FIGURE 3. ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
tr s 6 ns, Zout = 50 O.
B. CL includes probe and stray capacitance.
C. All diodes are 1 N916 or equivalent.

s

1 MHz, duty cycle

= 50%, tf s

6 ns,

TEXAS . . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 76265

2-573

SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVER
TYPICAL CHARACTERISTICS
HIGH·LEVEL OUTPUT VOLTAGE
vs
HIGH·LEVEL OUTPUT CURRENT

OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE

5
VCC=5V

4
VIC -12 V
VT-1

VT-

iL

VIO= 0.2 V
TA=25°C -

:r.,

I
c-- VIC 12 V

VIC °1

I

5

TA = 25°C

10=0

4

I

..

--,--

0

>

I

:I

3

Q.

VT-

VT+ F- VT+ r - f - VT + -

0

.,..
..J
Qi

2

.i:

:E'"

I
:I:

0

>

o

25

'\: ~ /'VCC = 5.25 V
I,\: ~
I
I

:I

I

"':125-100-75-50-25 0

t:-....
~~

o

59 75 100 125

~~
VCC = 4.75 V
~~
~~

/VCC=5V

~~

o

-5 -10 -15 -20-25-30-35-40-45-50

Vlo-Oifferentiallnput Voltage-mV

IOH-High·Level Output Current-mA

FIGURE 5

FIGURE 4
HIGH·LEVEL OUTPUT VOLTAGE
vs
FREE·AIR TEMPERATURE

LOW·LEVEL OUTPUT VOLTAGE
vs
LOW·LEVEL OUTPUT CURRENT

5

>I

.,

!'"

..&.

0.6

:r

4

t

.

~

~

3

0.5
0.4

:I

~

:I

:I

o

0

Qi

~ 0.2

:E'"

I

o

o

10

20

30

/

/

1]

f'"

,/

,/

0.1

o
40

50

60

70

80

o

5

10

15

20

25

IOL -Low·Level Output Current-mA

T A-Free·Air Temperature-·C

FIGURE 7

FIGURE 6

~

2-574

/

/

/

..J

VCC= 5V
_ VIO 0.2 V
IOH = -440 IlA

=

>

L

0.3

:5

t 2
.i:

..J

I
:I:
0

VCC=5V
TA = 25°C

TEXAS
INSTRUMENTS
POST· OfFICE BOX 655303 • DALLAS. 'tEXAS 76265

30

SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVER
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE

LOW-LEVEL OUTPUT VOLTAGE

0.5

~..

en

0.4

v,

v,

FREE-AIR TEMPERATURE

ENABLE VOLTAGE

.----.-~-.,...-,--r--,--;---,

5

Vee = 5 V
VID = - 0.2 V +----I----t--+--t----t

t-1~O~L_=r_8-m~A-+_-t_-t____I-___t-_1

4

J!l
"0

>I

~ 0.3 I==F~"""'....,.--+--I--_I_-..j----I

J!l"" 3
"0

..

>

Vee=5 V

J

ee =5.k5 V -

I

I-JII

I

Vee = 4.75 V -

>
...

:l

o

:l

0;

j
~
..J

VIO=0.2V
Load = 8 kn to ground
I--- TA =25°e

0.2

1--1---1--+--+-+-+-+-----1

S:l
0
I
0

2

>

I

~ 0.1

o

i

o

~-...I-~-~-~~--~--~~

o

10

20

30

40

50

60

70

80

o

0.5

v,

v,

ENABLE VOLTAGE

5

SUPPLY VOLTAGE

I
!
VIO = -0.2 V
Load = 1 kn to Vee
TA = 25°e

~

Vee = 4.75 V

"

100

E

No load
90 - I nputs open
TA = 25°
80
IOUTPUTS DISABLED
70

~

60

«

Vee I= 5 V

.!.c

:;

'1"u

//

//

40

~OUTPUTSENABLED

30

5:

;,

20

0.5

1.5

2

2.5

VI-Enable Voltage-V

3

o

'I

f

10

o

/

//

/. /'

u 50
>-

ii
Q.

o

3

SUPPLY CURRENT
(ALL RECEIVERS)

OUTPUT VOLTAGE

ve6 = 5.2J V

2.5

FIGURE 9

FIGURE 8

6

2

1.5

VI-Enable Voltage-V

TA-Free-Air Temperature-Oe

o

/
2

3

4

5

6

7

8

vee-Supply Voltage-V
FIGURE 10

FIGURE 11

TEXAS . .
INSTRUMENTS
POST OFFICE BOX $55303 • DALLAS, TEXAS 75265

2-575

SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVER

TYPICAL CHARACTERISTICS
INPUT CURRENT
vs
INPUT VOLTAGE

-6 -4 -2

0

2

4

6

8

10 12

VI-Input Voltage-V
FIGURE 12

TYPICAL APPLICATION
1/4 SN75172

1/4 SN75174

UP TO 32
DRIVER/RECEIVER PAIRS

1/4 SN75173

•
1/4 SN75172

•

1/4 SN75173

1/4 SN75175

•
1/4 SN75173

1/4 SN75174

FIGURE 13
NOTE: The line should be terminated at both ends in its characteristic impedance. Stub lengths off the main line should be kept as short
as possible.

..If

TEXAS
INSTRUMENTS
2-576

POST OFFICE BOX 655303 • DAUAS. TEXAS 75286

SN75116A
DIFFERENTIAL BUS TRANSCEIVER
02619, JUNE 1984-REVISEO AUGUST 1989

•

Bidirectional Transceiver

•

Meets EIA Standards RS-422A and CCITT
Recommendations V.11 and X.27

•

Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments

•

3-State Driver and Receiver Outputs

•

Individual Driver and Receiver Enables

•

Wide Positive and Negative Input/Output
Bus Voltage Ranges

D OR P
DUAL·IN-LiNE PACKAGE
ITOP VIEWI

R:D'~ ~cc
DE
D

3
4

6
5

A
GND

FUNCTION TABLE IDRIVERI

± 60

•

Driver Output Capability ...

mA Max

•

Thermal Shutdown Protection

•

Driver Positive and Negative Current
Limiting

•

Receiver Input Impedance .. , 12 kfl Min

•

Receiver Input Sensitivity ...

•

Receiver Input Hysteresis ... 50 mV Typ

•

Operates from Single 5-V Supply

•

Low Power Requirements

± 200

OUTPUTS

D

ENABLE
DE

A

H

H

H

L

H

L

H

X

L

Z

Z

INPUT

FUNCTION TABLE IRECEIVERI
DIFFERENTIAL INPUTS
A-B

mV

vID;;'0.2V
-0.2 V

< VID < 0.2 V

VID'; -0.2 V

ENABLE

H
X

description
The SN75176A differential bus transceiver is a
monolithic integrated circuit designed for
bidirectional data communication on multipoint
bus transmission lines. It is designed for
balanced transmission lines and meets
EIA
Standard
RS-422A
and
eelTT
Recommendations V.11 and X,27.
The SN75176A combines a 3-state differential
line driver and a differential-input line receiver
both of which operate from a single 5-V power
supply. The driver and receiver have active-high
and active-low enables, respectively, that can be
externally connected together to function as
direction control. The driver differential outputs
and the receiver differential inputs are connected
internally to form differential input/output (I/O
bus ports that are designed to offer minimum
loading to the bus whenever the driver is disabled
or Vee = O. These ports feature wide positive
and negative common-mode voltage ranges
making the device suitable for party-line
applications.

H

7
L
Z

H

= high level, L = low level, 7 = indeterminate,
= irrelevant, Z = high impedance loffl

logic symbol

161. A
171 B

logic diagram (positive logic)
DE-""---,

D

RE ":::"""--,

1&1
R--~..

b-....._ _1:.:,7:,.1:

}
BUS

Copyright @ 1989, Texas Instruments Incorporated

PRODUCTIOM DATA docum..ts contain information

:,'=~i~·fn':I':.1.i ~::I~~i:; lil"::::A:~~ not

OUTPUT
R

RE
L
L
L

X

currant as of publication datI. Products conf.rm to
specifications par the 'arms of raxas Instruments

B
L

TEXAS . "
INSTRUMENlS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-577

SN75176A
DIFFERENTIAL BUS TRANSCEIVER
description (continued)
The driver is designed to handle loads up to 60 mA of sink or source current. The driver features positiveand negative-current limiting and thermal shutdown for protection from line fault conditions. Thermal
shutdown is designed to occur at a junction temperature of approximately 150
The" receiver features
a minimum input impedance of 12 kD, input sensitivity of ± 200 mV, and a typical input hysteresis of 50 mV.

ae.

The SN75176A can be used in transmission line applications employing the SN75172 and SN75174
quadruple differential line drivers and the SN75173 and SN75175 quadruple differential line receivers.

"schematics of inputs and outputs
EaUIVALENT OF EACH INPUT

Vcc

TYPICAL OF A AND B 110 PORTS

-----

TYPICAL OF RECEIVER OUTPUT

- - Vce

Req

~--.

85 !l
NOM

Vee

INPUT
OUTPUT

- -....+-....-.-...... -- GND
Dri.... Input: Req = 3 k!l NOM
Enable Inputs: Req = 8 kSl NOM

TEXAS •

INSTRUMENTS
2-578

POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

SN75116A
DIFFERENTIAL BUS TRANSCEIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vec (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Voltage at any bus terminal. . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . .. - 10 V to 15 V
Enable input voltage ................................. ; . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 2):
D package ......................................................... 725 mW
P package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1000 mW
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260°C
NOTES: 1. All voltage values. except differential input/output bus voltage, are with respect to netwcir~ ground terminal.
2. For operation above 25°e free-air temperature, derate the D package to 464 mW at 70 0 e at the rate of 5.8 mW/oe and
derate the P package to 640 mW at 70 0 e at the rate of 8.0 mW/oe.

recommended operating conditions
Supply voltage, Vee
Voltage at any bus terminal (separately or common-mode), VI or Vie
High-level input voltage, VIH
D. DE. and RE
Low-level input voltage, VIL
D, DE. and RE
!;lifferential input voltage, VID (see Note 3)

MIN
4.75
-7

Low-level output current. IOL

5.25
12
0.8
±12
-60
-400

Driver
Receiver

Driver
Receiver

Operating free-air temperature, T A

MAX

2

I

High-level output current. IOH

NOM
5

60
0

8
70

UNIT
V
V
V
V
V
mA
~A

mA
°e

NOTE 3: Differential-input/output bus voltage is measured at the noninverting terminal A with respect to the inverting terminal B.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TeXAS 75266

2-579

SN75176A
DIFFERENTIAL BUS TRANSCEIVER

DRIVER SECTION
driver electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted).
PARAMETER
VIK

Input clamp voltage

VOH

High-level output voltage

VOL

low-level output voltage

!VOD1!

Differential output voltage

!VOD2!
a!VOO!
VOC
a!Voci

Differential outpUt voltage
Change in magnitude of
differential output voltage ~
Common-mode output voltage §

TEST CONDITIONS
11= -18mA
VIH - 2 V,
10H = -33 mA

Vil - 0.8 V,

VIH - 2 V,
10l = 33 mA
10 = 0
Rl - 1000,
Rl - 540,

Vil - 0.8 V,

Rl - 54

MIN

TYpt

3.7

Output current

IIH

High-level input current

III

Low-level input current

lOS

ICC

V
2 VOO2

°or 1000,

See Figure 1

2

See Figure 1

1.5

2.7
2.4

See Figure 1

I Vo
I Vo

Output disabled,
See Note 4

= 12 V
= -7 V

±0.2

V

3

V

±0.2

V

1
-0.8

mA

20
-400·
-250

Short-circuit output current

Vo = VCC
Vo - 12 V

250
500

Supply current (total package) .

No load

I

35
26

Outputs disabled

V
V

VI = 2.4 V
VI - 0.4 V
Vo = -7 V

I Outputs enabled

UNIT
V
V

.1.1

Change in magnitude of
common-mode output voltage ~

10

MAX
-1.5

50
40

~A

~

mA

mA

t All typical values are at VCC = 5 V and T A = 25°C.
~alvool and alVoc! are the changes in magnitude of VOD and VOC respectively, that occur when the input is changed from a high
level to a low level.
§In EIA Standard RS-422A, VOC, which is the average of the two output voltages with respect to ground, is called output offsat voltage, VOS.
NOTE 4: This applies for both power on and power off. Refer to EIA Standard RS-422A for exact conditions.

driver switching characteristics, VCC ... 5 V, TA .. 25°C
too
ITo
tpZH
tpZL
tpHZ
tplZ

PARAMETER
Differential-output delay time
Differential-output transition time
Output enable time to high level
Output enable time to low level
Output disable time from high level

Output disable time from low level

TEST CONDITIONS

TYP

Rl = 600,

See Figure 3

40
65

Rl - 1100,

See Figure 4

55

RL - 1100,
RL = 1100,

See Figure 5
See Figure 4

Rl - 1100,

See Figure 5

30
85
20

TEXAS . "

INSTRUMENTS
2-580

MIN

POST OFFICE BOX 855303 • DALLAS. TEXAS 75265

MAX
60
95
90
50
130
40

UNIT
ns
ns
ns
ns
ns
ns

SN75176A
DIFFERENTIAL BUS TRANSCEIVER
RECEIVER SECTION
receiver electrical characteristics over recommended ranges of common-mode input voltage. supply
voltage. and operating free-air temperature (unless otherwise noted)
PARAMETER

TEST CONDITIONS

VTH
VTL

Differential-input high-threshold voltage

Vo = 2.7 V,

Differential-input low-threshold voltage

Vo = 0.5 V,

VT+ - VT-

Hysteresis §

MIN

10 = -0.4 mA
10 = 8 mA

Typt

MAX
0.2

-0.2;

UNIT
V
V

50

mV

VIK

Enable-input clamp voltage

11- -18 mA

VOH

High-level output voltage

VID = -200 mY,
See Figure 2

10H = -400/LA,

VOL

Low-level output voltage

VID - -200 mY,
See Figure 2

10L = 8 mA.

10Z

High-impedance-state output current

Vo = 0.4 V to 2.4 V

II

Line input current

Other input - 0 V,
See Note 4

IIH

High-level enable-input current

VIH = 2.7 V

20

/LA

IlL

Low-level enable-input current

VIL - 0.4 V

-100

/LA
kll

-85

mA

ri

Input resistance

lOS

Short-circuit output current

ICC

-1.5

I VI
I VI

2.7

V

- 12 V
= -7 V

0.45

V

±20

p.A

1
-0.8

mA

12
-15

Supply current (total package)

No load

I Outputs enabled
I Outputs disabled

V

35

50

26

40

mA

t All typical values are at VCC = 5 V, T A = 25°C.
:l:The algebraic convention, where the less-positive (more-negative) limit is designated minimum, is used in this data sheet for cornmonmode input voltage and threshold voltage levels only.
§Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going input threshold voltage,
VT _. See Figure 4.
NOTE 4: This applies for both power on and power off. Refer to EIA Standard RS-422A for exact conditions.

receiver switching characteristics. VCC - 5 V. TA - 25°C
PARAMETER
tPLH
tpHL
tpZH
tpZL
tpHZ
tpLZ

Propagation delay time, low-to-high-Ievel output

Propagation delay time. high-to-Iow-Ievel output
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level

TEST CONDITIONS
1.5 V to 1.5 V,
VID See Figure 6
CL = 15 pF,
CL=15pF,

See Figure 7

CL = 15 pF,

See Figure 7

MIN

TYP

MAX

21

35

23

35

ns
ns

10

30

ns

12

30

ns

20
17

35
35

ns
ns

UNIT

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75285

2-581

SN75176A
DIFFERENTIAL BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION

VOC

.J.,
FIGURE 1. DRIVER VOD AND VOC
FIGURE 2. RECEIVER VOH AND VOL

f

INPUT
GENERATOR
IS.. Not. AI

\~5:

1.5V

I

i

:

I

too~

50n

I
T-

I

=

OUTPUT

lSee Not. BI

50%

ov

~too

I
CL = 15 pF

3V

I

I

i

:
tTO..l..

....t

"2.5 V

50%
"-2.5 V

~tTO

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 3. DRIVER DIFFERENTIAL-OUTPUT DELAY AND TRANSITION TIMES
OUTPUT
INPu:..JU;V
OVor3V---t

1 . 5 V \ - - - 3V

I

I

~tPZH

l

GENERATOR
IS•• Not. AI

=

50n

=

OUTPUT

OV

I

0.5 V

I

-*-VOH

I~

1.3 V

tPHZ~

Voff" OV

VOLTAGE WAVEfORMS

TEST CIRCUIT

FIGURE 4. DRIVER ENABLE AND DISABLE TIMES
5V
RL=110n

INPUTJ1.5V

OUTPUT

1

I

3VorOV----I

tpZL

I

_ _....,1

CL=50pf
lSee Not. BI _
GENERATOR
(So. Not. AI

50n

--N----+j

\2.3 V

OUTPUT

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 5. DRIVER ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, 50% duty cycle, tr S 6 ns,
tf s6 ns, Zout = 50 D.
B. CL includes probe and jig capacitance.

TEXAS ,.,
INSTRUMENTS
2-582

POST OFFICE BOX 855303 • DALLAS, TEXAS 75285

SN75116A
DI-FFERENTIAL BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION
--3V

~

INPUT

GENERATOR
(Sae Note AI

1.5 V

51 11
1.5V

I 1.5 V

I

I

I

"'"-""- t

~'"f.I

OV----'

OUTPUT

OV

~~'
I

1.3V

1.3V

Voo
VOL

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 6. RECEIVER PROPAGATION DELAY TIMES
1.5 V

SI

S2

2kll

>--...--"""'".--..- ....--¥lIY--<1'

-1.5V~

0--- 5 V

lN916 OR EQUIVALENT

GENERATOR
(See Note AI

CL - 15 pF
(See Note BI

5011

TEST CIRCUIT

~

-----3V

INPUTJk~~==:;V

I ----1.5V

INPUT

I
tpZH

~
OUTPUT

-.t

I
I

OV

I
tPZL~

~

I
~~_~"4.5V

r,VOH

~ ~~ _

Slto-l.5V
0 V S2 closed
S30pon

O.V

OUTPUT

L

--.J

VOL

~

--3V

INPUT

1.5 V

I
I
tPHZ~

OU>NT

~!

Sltol.5V
S2 closed
S3 closed

OV

~--3V

INPUT

---I: . _.

"-

51 to -1.5 V
S2 closed
0 V S3closed

I

tPLZ~

r-

-i--'-----L. ___

I

~

V.,

OUTPUT

"'1.3V

---"'1.3V

0.5 V

VOL

VOLTAGE WAVEFORMS

FIGURE 7. RECEIVER OUTPUT ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, 50% duty cycle, tr S 6 ns,
tf s6 ns, Zout = 50 O.
B. CL includes probe and jig capacitance.

TEXAS ."

INSTRUMENTS
POST OFFICE

sox 666303

• DALLAS, TeXAS 76265

2·583

SN75176A
DIFFERENTIAL BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
DRIVER LOW·LEVEL OUTPUT VOLTAGE

DRIVER HIGH·LEVEL OUTPUT VOLTAGE

vs

vs

DRIVER LOW·LEVEL OUTPUT CURRENT

DRIVER HIGH·LEVEL OUTPUT CURRENT

5

l'

J

~

--

4.5

4
3.5

i

3

::I

~

2.5

.§

2

:r-a,

1.5

VCC~5V
TA=25"C

r-

r---......

..........

..

'"
:I

4

>

3.5

::I

3

...

Q.

b-...

::I

..
.!l

2.5

...~I

1.5

>

0.5

0
"ii

...0

l:

0.5

o
o

>I
"0

I

~

5
4.5

-40
-60 -80 -100 -120
IOH-High Level Output Current-rnA

I

I

1

--

2

-

".

o

-20

VCCI =5V
-TA = 25°C

o

FIGURE 9

DRIVER DIFFERENTIAL OUTPUT VOLTAGE

RECEIVER LOW·LEVEL OUTPUT VOLTAGE

vs

vs

DRIVER OUTPUT CURRENT

V~C=~V
TA=25"C

.......

~

.!l!0
>

0.4

..

..........

/

/

::I

i'-.

Q.

'"

::I

0
"ii

......;i:
...I

"\

0.3
0.2

0

\

...0

/

/

/ '"

V

0.1

10 20 30 40 50 60 70 80 90100
10 - Output Current-rnA

o

o

5
10
15
20
25
30
IOL -Low Level Output Current-rnA

FIGURE 10

FIGURE 11

TEXAS ."

INSTRUMENTS
2-584

/'

>

\

00

l'

RECEIVER LOW·LEVEL OUTPUT CURRENT
0.6
VCC=5V
TA = 25°C
0.5

&

..........

"

!---

20
40
60
80
100
120
10L - Low Level Output Current-rnA

FIGURE 8

4

I

POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

SN75176A
DIFFERENTIAL BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
RECEIVER LOW·LEVEL OUTPUT VOLTAGE
vs
FREE·AIR TEMPERATURE

RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

5
Vee=5V
VID = -0.2 V
.. 04 f-.IOL = 8 rnA ~-+_-+-_~-+_--I

V,O = 0.2 V
Load = 8 kG to ground
fTA
= 25°e
4

:r

!' .

I

>I

~

! 0.3~~~~--+--4--~~+-~-~

80

B
is

o"

>
:;

..J

9"0

1 0.2 f---+---I--+--+---I---+-~--~
~

.9-

Vee=5V

-

I

,I.

Vee = 5.25 V-

L.JI
Vee=4.75V -

3

2

>

~ 0.1 ~-+---l----l--+---+----l--l----j

~

OL-~

o

__-L__

10

20

~~

30

__-L__

40

50

~~

60

__

70

~

o

80

TA-Free·Air Ternperature-Oe

o

0.5

1.5

2

2.5

3

V,-Enable Voltage-V

FIGURE 13

FIGURE 12
RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

6

I

I

Vee = 5.25 V

5

>,
&

,

,

VID = -0.2 V
Load = 1 kG to Vee
TA = 25°V

Vee = 4.75 V
"'vee'= 5 V I---

4

B
is

.."

>

3

.9-

9"0

2

>

o
o

0.5

1.5
2.5
2
V,-Enab'e Voltage-V

3

FIGURE 14

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-585

SN75176A
DIFFERENTIAL BUS TRANSCEIVER
TYPICAL APPLICATION
SN75176A

SN75176A

UP TO 32
TRANSCEIVERS

NOTE: The line should be terminated at both ends in its characteristic impedance. Stub lengths off the main line should be kept as short
as possible.

TEXAS . "
INSTRUMENTS
2-586

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN75177B, SN75178B
DIFFERENTIAL BUS REPEATERS
02606, JULY 1985-REVISEO JANUARY 1990

•

•

SN75177B .•. D. JG. OR P PACKAGE

Meets EIA Standards RS-422-A and RS-485
and CCITT Recommendations V. 11 and
X.27

(TOPVIEWI

VCC[JjB A

Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments

•

3-State Outputs

•

Bus Voltage Range ... -7 V to 12 V

•

Positive and Negative Current Limiting

•

Driver Output Capability ... 60 mA Max

•

Driver Thermal Shutdown Protection

•

Receiver Input Impedance ... 12 kO Min

•

Receiver Input Sensitivity ... ± 200 mV

T
EN
GND

2

3
4

7
6
5

B
Z
Y

SN7517BB ••. JG OR P PACKAGE
ITOPVIEWI

•

Receiver Input Hysteresis ... 50 mV Typ

•

Operates from Single 5-V Supply

•

Low Power Requirements

VCC[]B A

T
EN
GND

2
3
4

7
6
5

B
Z
Y

SN75177B FUNCTION TABLE
DIFFERENTIAL INPUTS

ENABLE

A-B

EN

T

Y

Z

VID '" 0.2 V
-0.2 V < VIO < 0.2 V

H

H

H

L

H

?

?

?

H

L

L

H

L

Z

Z

Z

VIO

s 0.2

V

X

description
The SN75177B and SN75178B differential bus
repeaters are monolithic integrated devices each
designed for one-way data communication on
multipoint bus transmission lines, These devices
are designed for balanced transmission bus line
applications and meet EIA Standard RS-422-A
and RS-485 and CCITT Recommendations V.ll
and X.27. Each device is designed to improve
the performance of the data communication over
long bus lines. The SN75177B and SN75178B
are identical except for the complementary
enable inputs, which allow the devices to be
used in pairs for bidirectional communication.

OUTPUTS

SN7517BB FUNCTION TABLE
DIFFERENTIAL INPUTS

ENABLE

A-B

EN

T

Y

Z

VIO '" 0.2 V
-0.2 V < VID < 0.2 V

L

H

H

L

L

?
L
Z

?

?

L

H

Z

Z

VID

s 0.2 V
X

L
H

OUTPUTS

H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = impedance (offl

The SN75177B and SN75178B feature positive- and negative-current limiting 3-state outputs for the
receiver and driver. The receiver features high input impedance, input hysteresis for increased noise
immunity, and input sensitivity of ± 200 mV over a common-mode input voltage range of -7 V to 12 V.
The driver features thermal shutdown for protection from line fault conditions. Thermal shutdown is designed
to occur at a junction temperature of approximately 150 DC. The driver is designed to drive current loads
up to 60 mA maximum.
The SN75177B and SN75178B are designed for optimum performance when used on transmission buses
employing the SN75172 and SN75174 differential line drivers, SN75173 and SN75175 differential line
receivers, or SN75176B bus transceiver.

Copyright © 1990, Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX

655~03

• DALLAS, TEXAS 75265

2-587

SN75177B, SN75178B
DIFFERENtiAL BUS REPEATERS

logic symbols t

logic diagrams (positive logic)
SN75177B

SN75177B

EN -'-"''---.....- - - - - ,

A

Y

B

z

SN75178B

SN75178B

Eiii....;.;;;;'---.....- - - - - ,
(5)

y

y

A

(6) Z

z

B

RECEIVER
T

DRIVER

(2)

tThese symbols are in accordance with ANSIIIEEE Std 91-1984
and lEe Publication 617-12.

scnematics of inputs and outputs
EQUIVALENT OF DRIVER OR ENABLE INPUT
VCC - - - - - - - -

INPUT

TYPICAL OF ALL DRIVER OUTPUTS
VCC

---<~_--I

OUTPUT

.......- - 4 - - - GND

Driver input: Req = 3 k,o NOM
Enable input: Raq = 8 kn NOM

TYPICAL OF ALL RECEI"ER OUTPUTS
- - - - - < p - - VCC

EQUIVALENT OF EACH RECEIVER INPUT
VCC

960 n
NOM
OUTPUT

TEXAS •

INSTRUMENTS
2-588

POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

SN75177B, SN75178B
DIFFERENTIAL BUS REPEATERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Voltage range at any bus terminal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -10 V to 15 V
Differential input voltage (see Note 2) ......................................... ± 25 V
Enable input voltage. . . . . . . . . . . . . . . ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 3):
D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 725 mW
JG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 825 mW
. P package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1000 mW
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooC to 70°C
Storage temperature range ......................................... - 65°C to 1 50°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from' case for 60 seconds: JG package. . . . . . . . . . .. 300°C
NOTES:

1. All voltage values, except differential input voltage, are with respect to network ground terminal.
~t the non inverting input with respect to the corresponding inverting input.
3. For operation above 25·e free-air temperature, derate the 0 package to 464 mW at 70·e at the rate of 5.8 mW/·e, the
JG package to 528 mW at 70·e atthe rate of 6.6 mW/·e and the P package to 640 mW at 70·e at the rate of B.O mW/·e.
In the JG package, SN75177B and SN7517BB chips are glass mounted.
2. Differential input voltage is measured

recommended operating conditions
Supply voltage, Vee
High-level input voltage, VIH
low-level linput voltage, Vil

I

EN or EN

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

2

EN or EN
_7t

Common-mode input voltage, VIC

Differential input voltage, VID
High-level output current, IOH
low-level output current, IOl

Driver

Receiver

12

V

-60

rnA

60
8

Receiver

0

V
V

±12
-400

Driver

Operating free-air temperature, T A

V
O.B

70

p.A
rnA
·e

tThe algebraic convention, where the less-positive (more-negative) limit is designated minimum, is used in this data sheet for common-

mode input voltage and threshold voltage.

TEXAS . "
INSTROMENTS
POST OFFICE BOX 855303 .. DALLAS. TEXAS 76265

2-589

SN75177B, SN75178B
DIFFERENTIAL BUS REPEATERS
DRIVER SECTION
driver electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER

TEST CONDITIONS

MIN

VIK
Vo

Input clamp voltage

11= -18 mA

Output voltage

10 = 0

0

I V OD11

Differential output voltage

10 = 0

1.5

IV OD21

Differential output voltage

I V OD31

Differential output voltage

RL = 100
RL = 54

n,

n,

See Figure 1

See Figure 1

See Note 4

Typt

VOC

differential output voltage ~
Common-mode output voltage

RL = 54

100

1.5

2.5

n,

See Figure 1

Change in magnitude of
AIVocl

common-mode output voltage ~

10

Output current

High-impedance-stage

V

6
6

V
V
V

1.5

n or

UNIT

IIVOD1
2

Change in magnitude of

AIVODI

MAX
-1.5

5
5

V

±0.2

V

3
-1

V

V

±0.2

V

Vce = 0, Vo = -7 V to 12 V

±100

pA

VO= -7Vt012V

±100

p.A

IIH

High-level input current

VI = 2.4 V

20

p.A

IlL

Low-level input current

VI - 0.4 V

-400

pA

Vo = -7 V

-250

10Z

output current

lOS

Short-circuit output current

Vo = Vee
Vo - 12 V

lee

Supply current (total package)

No load

250
250

I Outputs enabled
I Outputs disabled

57

70

26

35

mA

mA

t All typical values are at Vee = 5 V and T A = 25 ·e.
~AIVODI and AIVoci are the changes in magnitude of VOD and Voe, respectively, that occur when the input is changed from a high
level to a low level.
NOTE 4: See EIA Standard RS-485 from Figure 3.5, Test Termination Measurement 2.

driver switching characteristics. VCC .. 5 V. TA - 25°C
PARAMETER

TEST CONDITIONS

tDD

Differential-output delay time

tTO
tpZH

Differential-output transition time
Output enable time to high level

RL - 110

tPZL

Output enable time to low level

RL =

tpHZ
tpLZ

Output disable time from high level

RL =

Output disable time from low level

RL =

RL = 54

n,

n,
110 n,
110 n,
110 n,

TYP

MAX

15

22

ns

30
120

ns

See Figure 4

20
85

See Figure 5

40

60

ns

See Figure 4

150

250

ns

See Figure 5

20

30

ns

See Figure 3

TEXAS . "

INSTRUMENTS
2-590

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MIN

UNIT

ns

SN75177B, SN75178B
DIFFERENTIAL BUS REPEATERS
SYMBOL EQUIVALENTS
DATA SHEET PARAMETER

RS-422-A

RS-485

Va

Voa. Vob

Voa. Vob

IVODII
I V OD21

VO
V t IRL - 100 III

VO
V t IRL - 54

v t tT est

I V OD31

m

termination

Measurement 21

AIVODI

I IVtl-IVtl I

I IVtl-IVtl I

VOC
AIVocl

IVosl
I Vos - Vos I

IVosl
I Vos - Vos I

lOS
10

lisal. lisbl
lia. lib

lixal. lixbl

RECEIVER SECTION
receiver electrical characteristics over recommended ranges of common-mode input voltage. supply
voltage. and operating free-air temperature (unless otherwise noted)
PARAMETER

TEST CONDITIONS

VTH

Differential-input high-threshold voltage

Va - 2.7 V,

10 -

VTL

Differential-input low-threshold voltage

Va = 0.5 V,

10 = 8mA

Vhvs

Hysteresis §

VIK

Enable-input clamp voltage

11- -18 rnA

VOH

High-level output voltage

VID = 200 mY,
See Figure 2

10H = -400 ~A,

VOL

Low-level output voltage

VID -

10L - 8 rnA.

10Z

MIN

TVpt

MAX
0.2

-0.4 rnA
-0.2'

High-impedance-state output current

mV
-1.5

2.7
0.45
20

Vo = 0.4 V to 2.4 V

II

Line input current

IIH

High-level enable-input current

VIH = 2.7 V

IlL

Low-level enable-input current

VIL = 0.4 V

r;

Input resistance

lOS

Short-circuit output current

ICC

Supply current Itotal package)

See Note 5

I VI
I VI

-400
1

= 12 V
= -7 V

-0.8

-15

I Outputs enabled
1 Outputs disabled

V
~

rnA

20
-200

~A

-85

rnA

12

No load

V
V

See Figure 2

Other input at 0 V,

V
V

50

-200 mY.

UNIT

57

70

26

35

~
kll

rnA

t All typical values are at VCC = 5 V, T A = 25°C.
:t:The algebraic convention, where the less-positive (more-negative) limit is designated minimum, ;s used in this data sheet for commonmode input voltage and threshold voltage lavels only.
§Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going input threshold voltage,
VT _. See Figure 12.
NOTE 5: Refer to EIA Standard RS-422 for exact conditions.

receiver switching characteristics. VCC - 5 V. TA - 25°C
PARAMETER

TEST CONDITIONS

tpLH

Propagation delay time, low-to-high-Ievel output

VID -

tpHL

Propagation delay time, high-to-Iow-Ievel output

CL = 15 pF,

tpZH

Output enable time to high level

tpZL

Output enable time to low level

tpHZ

Output disable time from high level

tPLZ

Output disable time from low level

-1.5 V to 1.5 V,
See Figure 6

CL=15pF,

See Figure 7

CL=15pF,

See Figure 8

MIN

TVP

MAX

19

35

UNIT
ns

30

40

ns

10

20

ns

12

20

ns

25

35

ns

17

25

ns

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

2-591

SN75177B, SN75178B
DIFFERENTIAL BUS REPEATERS

PARAMETER MEASUREMENT INFORMATION

VOC

~
FIGURE 2. RECEIVER VOH AND VOL

FIGURE 1. DRIVER VOD AND VOC

INPUT
GENERATOR
(See Note A)

\~S~

!.,.SV

I

I

I

SO 11

3V

ov

I

tDD~

~tDD

+-

i
OUTPUT

I
I
I

"'2.SV
SO%
"'-2.5 V

-.t I.- tTO
TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 3. DRIVER DIFFERENTIAL-OUTPUT DELAY AND TRANSITION TIMES
OUTPUT

(SN75178A)

-:::v.

V--

INP:.A'.5 V
(SN7S177A)
I

OVor3V----t

14-+1- tpZH
I
GENERATOR
(S.o Note A)

5011

OUTPUT

Enable is

'.I

j-2.3V
_ _ _01
tpHZ

active low

TEST CIRCUIT

3V

'.S V A - -

I
I

I

0V
O.S V
-*-VOH

R'"

I
-*+I
I

I

Voff ... 0 V

VOLTAGE WAVEFORMS

FIGURE 4. DRIVER ENABLE AND DISABLE TIMES (tPZH. tPHZ)
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ,;; 1 MHz, 50% duty cycle, tr ,;;6 ns,
tf ,;;6 ns, Zout = 50 II.
B. CL includes probe and jig capacitance.

TEXAS •

2-592

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN75177B. SN75178B
DIFFERENTIAL BUS REPEATERS
PARAMETER MEASUREMENT INFORMATION
5V

(SN75178AI~

RL 1100
OUTPUT

(SN75177AI

3VorOV----t

X

r----3V
1 .5V

INPUT-1t\I.5V
: ....._ _J

I

I

1 tsl
\2.3
_£~.5V
I

GENERATOR
(See Nota AI

50 n

SN751788

~tpLZ

1

CL - 15PFI
(See Note BI

-=

5V

OUTPUT

Enable is
active low

0V

I

tpZL --l4----.t

V

:

-

, . - V~L

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 5. DRIVER ENABLE AND DISABLE TIMES (tPZL. tPLZ)
--3V

~

INPUT
GENERATOR
(S.a Nota A)

>----+-OUTPUT

50n
I.SV

1.5V

I 1.5V

I

I

I

"'"---"-'---t

I
."/
OUTPUT

1.3 V

OV

~~'
I

Voo

1.3 V

VOL
VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 6. RECEIVER PROPAGATION DELAY TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR "" 1 MHz, 50% duty cycle, tr "" 6 ns,
tf ,,"6 ns, Zout = 50 O.
B. CL includes probe and jig capacitance.

TEXAS " ,
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 76265

2-593

SN75177~ SN75178B
DIFFERENTIAL BUS REPEATERS

PARAMETER MEASUREMENT INFORMATION
1.5 V

OUTPUT
S2

2 kn

-1.5V--o

0 - - 5V

(See Note C)

GENERATOR
(See Note A)

(SN75177B)

50n

=

=x

INPUT

CL - 15 pF (See Note B)

TEST CIRCUIT

L

1.5 V

I

(SN75178B)

----......
tpZH

~

I

-+I

Sltol.~V

3V

S2 open
S3 closed
0V

O.V

(SN75177B)=X
INPUT
1.5 V

I
I

(SN75178B)
tPHZ

==x

INPUT

' / : . . 3 V Sltol.5V
S2 closed
S3 closed
---0V

(SN75178B)

---.....

I

I

tPZL~

I

~.~_~"'4.5V

OUTPUT

L

---1

=x

(SN75177B)
INPUT

VOL

~o

><=:1
-1.5 V
S2 closed
S3 closed
'----0V

1.5 V

I
I
I

(SN75178B)
tPLZ

--k--+t
I

Va"

S2 closed
S'3 open
0V

I

--l4--+I

'"~"' ~!
ri--'------L. ___

X=~lVto -1.5 V

1.5 V

l+I
~VOH

'-----I.. ~ ~ _

OUTPUT

(SN75177B)

---"'1'3V

~

OUTPUT

0.5 V

.

.

"'1.3V

VOL

VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR :S 1 MHz, duty cvcle '" 50%, tr
Zo = 50 n.
B. CL includes probe and jig capacitance.
C. All diodes are 1 N9 16 or equivalent.

FIGURE 7. RECEIVER ENABLE AND DISABLE TIMES

~

2-594

TEXAS
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

= tf = 6 ns,

SN75177B, SN75178B
DIFFERENTIAL BUS REPEATERS
TYPICAL CHARACTERISTICS
DR IVER HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT

5

~

t

"0

>
...

a.:J

~
>

j

:r-a.

5

1

VCC = 5 V
TA=25°C

4.5

4

~

3.5

'--

3

F':

.....-;;::

2.5

,

r--.....

2

>I

.,
l!!'"
"0
>
...:J

.

4

0
a;

I

3.5

I
II

3

"-

:J

_ VCC'= 50 V
TA = 25 C

4.5

2.5

.,>

II

2

~

;: 1.5
0

1.5

I

I-- I-----"'

.....

~

0

0.5

o
o

-

~

I

:r
~

DRIVER LOW-LEVEL OUTPUT VOLTAGE
vs
LOW· LEVEL OUTPUT CURRENT

>
-20

-40

-60

-80

0.5

o

-100 -120

o

IOH-High Level Output Current-mA

20

40

FIGURE 8

~.,

'"
l!!

3

:J

2.5

>
...

a-

t--.....

2

:

1.5

0.5

o

..a-

\

VIC=
-12V

,
VT-,

1\

:J

0
I
0

JIC = f--

VI~=

f--

121V
°IV I
VTVT_
VT+ f-VT+ f-- f-VT+ f - -

:J

I

2

>

\

o

120

TA = 25°C

10=0

4

>

~

I

>

VCC=5V

'"
l!!
"0 3

\\

C
0
0

5

.,

t--.....

.~

100

RECEIVER OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE

>I

r....... "-

:J

0

iii

......

80

FIGURE 9

DRIVER DIFFERENTIAL OUTPUT VOLTAGE
vs
DRIVER OUTPUT CURRENT
4
\
\
VCC=5V
3.5
f--TA = 25°C
.......

"0

60

10L - Low Level Output Current-mA

10 20 30 40 50 60 70 80 90 100
10 - Output Current-mA

o
-125

-75

-25

0

25 50 75 100 125

VID - Differential Input Voltage-mV

FIGURE 10

FIGURE 11

TEXAS . . ,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75285

2-595

SN75177B, SN75178B
DIFFERENTIAL BUS REPEATERS
TYPICAL CHARACTERISTICS
RECEIVER HIGH·LEVEL OUTPUT VOLTAGE

RECEIVER HIGH·LEVEL OUTPUT VOLTAGE

vs

vs

HIGH·LEVEL OUTPUT CURRENT

FREE·AIR TEMPERATURE

5

5

,

VID = O} V _
TA = 25 C

>

&
19
15

~~
~~
0
V
g!
~ ~ VVCC=I 5.25
I
!_
.. 2
..J
~VVCC=5V
.c
~
VCC = 4.75 V
:f'"
~~
I
:I:
0
~~
>
3

15

>...

e-=
=

...

3

0

>
..J

~

2

.r.

:f'"
I

VCC = 5 V
VID = 0.2 V
IOH = -440/JA

:I:
0

>

~~

o
o

4

19

'"'

>...

...==...

.'",

>

4

o

-20
-10
-30
-40
--50
IOH-High·Level Output Current-rnA

o

10

vs
FREE·AIR TEMPERATURE

15

0.4

>

0
..J

,

..J

0

!

/"'"

~

;;

0.4

VCC=5V
VID = -0.2 V
IOL =SmA

O.3~~~=+--~--~--~~~~--4

Q;

j
~
..J

/

V

0.2 I-~I---I---+--+---+--j---+---I

~ 0.11--j---+---I---+---1--+---r~

~

>

o

25
30
15
20
5
10
IOL -Low Level Output Current-rnA

00

10

20

30

40

FIGURE 15

TEXAS

50

60

TA-Free·Air Temperature-OC

FIGURE 14

~

INSTRUMENTS
2-596

SO

o

0.1

o

70

..---r-"'--'--"""'-~--'--""---'

~

[7

Q;

;i: 0.2

/'

0.5

V

.,V

...=
0= 0.3
a.

..

60

LOW·LEVEL OUTPUT CURRENT
VCC - 5 V
TA - 25°C
VIO D -0.2V

..J

50

vs
0.6

>
...

40

RECEIVER LOW·LEVEL OUTPUT VOLTAGE

RECEIVER LOW·LEVEL OUTPUT VOLTAGE

& 0.5
19

30

FIGURE 13

FIGURE 12

~

20

T A-Free·Air 'Temperature-OC

POST OFFICE BOX 656303 • DALLAS. TEXAS 75265

70

SO

SN75177B. SN75178B
DIFFERENTIAL BUS REPEATERS
APPLICATION INFORMATION
SN75177B
SN75176B

SN75176B

SN75178B

SN75176B
NOTE: The line should be terminated at both ends in its characteristic impedance. Stub lengths off the main line should be kept as short
as possible.

FIGURE 16. TYPICAL APPLICATION CIRCUIT

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

2-597

2-598

5N751798

DIFFERENTIAL DRIVER AND RECEIVER PAIR
02845, OCTOBER 19S5-REVISED AUGUST 1989

•

Meets EIA Standards RS·422·A and RS·485
and CCITT Recommendations V.11 and
X.27

•

Bus Voltage Range .. , -7 V to 12 V

•

Positive and Negative Current Limiting

•

Driver Output Capability , , . 60 mA Max

•

Driver Thermal Shutdown Protection

•

Receiver Input Impedance , , . 12 kO Min

•

Receiver Input Sensitivity ... ± 200 mV

•

Receiver Input Hysteresis , . , 50 mV Typ

•

Operates from Single 5·V Supply

•

Low Power Requirements

D. JG. OR P PACKAGE
(TOPVIEWI

VCC[l]8 A

R

2

7

B

D
GND

3
4

6
5

Z
Y

FUNCTION TABLE (DRIVER)
INPUT

OUTPUTS

0
H

V
H
L

L

Z
L
H

FUNCTION TABLE (RECEIVER)
DIFFERENTIAL INPUTS

R

VIO ;;, 0.2 V

H

-0.2 V< VIO< 0.2 V
VIO '" -0.2 V

L

description
The SN751 79B driver and bus receiver circuit is
a monolithic integrated device designed for
balanced transmission line applications and
meets EIA Standards RS·422·A and RS·485 and
CCITT Recommendations V.11 and X,27. It is
designed to improve the performance of full·
duplex data communications over long bus lines,
The SN75179B driver outputs provide limiting
for both positive and negative currents, The
receiver features high input impedance, input
hysteresis for increased noise immunity, and
input sensitivity of ± 200 mV over a common·
mode input voltage range of - 12 V to 12 V.
The driver provides thermal shutdown for
protection from line fault conditions. Thermal
shutdown is designed to occur at a junction
temperature of approximately 150°C, The
device is designed to drive current loads of up
to 60 mA maximum.

H

OUTPUT

A-B

= high level,

L

?

= low level, ? = indeterminate

logic symbol t

I>

0(31

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

logic diagram
81A

R

The SN75179B is characterized for operation
from OOC to 70°C,

.IT
~
B
(21

(71

612

o~
(31

(51

PRODUCTION DATA documents contlin information
currant •• of publication dato. Products conform to
.,lOifications por thl tarms of Ta.a. Instrumants
:::=~~i~"i~:I~'l.; ~:~::i:; :'l"::;~~~. not

y

Copyright @ 1989, Texas Instruments Incorporated

TEXAS ...,
INSTRUMENTS
POST OFFICE .BOX 656303 • DALLAS, TEXAS

75~66

2-599

SN75179B

DIFFERENTIAL DRIVER AND RECEIVER PAIR
schematics of inputs and outputs
EQUIVALENT OF DRIVER INPUT

TYPICAL OF ALL DRIVER OUTPUTS
--~-- VCC

VCC - - - - - . . - - -

INPUT

- t -....- - j
OUTPUT

-+----GND

Driver input: Req - 3 k!l NOM
EQUIVALENT OF EACH RECEIVER INPUT

TYPICAL OF ALL RECEIVER OUTPUTS
----~~-

VCC

Vce

960n
NOM

INPUT

------L_L

1~~~n

OUTPUT

960 n
NOM

absolute maximum ratings over operating free-air temperature range (unless otherwise notedl
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Voltage at any bus terminal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -10 V to 15 V
Differential input voltage (see Note 2) ......................................... ±25 V
Continuous total dissipation at (or below 25°C free-air temperature (see Note 3):
D package ......................................................... 725 mW
JG package ........................................................ 825 mW
P package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1000 mW
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. OOC to 70°C
Storage temperature range .......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package ......... 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package ............ 300°C
NOTES: 1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. Differential-input voltage is measured at the noninverting input with respect to the corresponding inverting input.

3. For operation above 25°C free-air temperature, derate the D package to 464 mW at 70°C at the rate of 5.8 mW/oC ,the
JG package to 528 mW at 70°C at the rate of 6.6 mW/oC and the P package to 640 mW at 70°C at the rate of 8.0 mW/oC ..
In the JG package SN75179B, chips are glass mounted.

TEXAS •
INSTRUMENTS
2-600

POST OFFICE BOX 665303 • DAllAS. TEXAS 762.85

SN75179B

DIFFERENTIAL DRIVER AND RECEIVER PAIR
recommended

~perating

conditions

Supply voltage, Vee
High~level

I

input voltage, VIH

Driver

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

2

V

T Driver

Low-level input voltage, VIL

-7 1

Common-mode input voltage, VIC
Differential input voltage, VID
Driver

High-level output current, IOH

Receiver

V

12

V

±12

V

-60

mA

-400

Driver

Low-level output current, IOL

0.8

60

Receiver

8

Operating free-air temperature, T A

0

70

MA
mA
°e

t The algebraic convention, where the less-positive (more-negative) limit is designated minimum, is used in this data sheet for comlT1on~
mode input voltage and threshold voltage.

DRIVER SECTION
driver electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER

TEST CONDITIONS

MIN

VIK

Input clamp voltage

II

Vo

Output voltage

10 ~ 0

IV OD1!

Differential output voltage

10

~

RL

~

100O,

See Figure 1

RL

~

54O,

See Figure 1

!VOD2!

Differential output voltage

!VOD3!

Differential output voltage

Ll.!VOD!

Voe

1--Ll.!Voe!

TYP~

MAX

UNIT

-1.5

V

0

6

V

1.5

6

V

-18 mA

~

0

See Note 4

Y, VODl

V

2
1.5

2.5

1.5

Change in magnitude of
differential output voltage §
Common-mode output voltage

~

RL

54!l or 100O,

See Figure 1

Vee

IIH

High-level input current

VI

~

IlL

Low-level input current

VI

~

lOS

Short-circuit output current

lee

Supply current Itotal packagel

Vo

~

V

±0.2

V

-1

V

±O.2

V

±100

MA

2.4 V

20

MA

0.4 V

-200

common-mode output voltage §
Output current

V

5

+3

Change in magnitude of

10

5

~

0,

Vo

~

-7 V to 12 V

-7 V

-250

Vo ~ Vee or 12 V

250

No load

57

70

MA
mA
mA

typical values are at V ee ~ 5 V and T A = 25°e.
§Ll.!VOD! and Ll.IVoci are the changes in magnitude of VOD and Voe, respectively, that occur when the input is changed from a high
level to a low level.
NOTE 4: See EIA Standard RS-485, Figure 3,5, Test Termination Measurement 2.

t All

driver switching characteristics. VCC
PARAMETER
tDO

=

5 V, TA

=

25°C

TEST CONDITIONS

Differential-output delay time

See Figure 3

Differential-output tra nsition time

MIN

TYP

MAX

15

22

20

30

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-601

8N751798

DIFFERENTIAL DRIVER AND RECEIVER PAIR
SYMBOL EQUIVALENTS
RS-486

RS-422-A

DATA SHEET PARAMETER

Voa, Vob
Vo
Vt IRL - 100

Vo
IV ODll
IV oD21

v oa, Vob
Vo
Vt IRL - 54
Vt ITest termination
Measurement 2)

m

m

IV oD31

I IVtl-IVtl I
IVosl
IVos - Vosl

IIVIi-IVtll
IVosl
IVos - Vosl
Iisal. Ilsbl
Iixal,llxbl

AIVODI
Voe
AIVocl
lOS
10

lia, lib

RECEIVER SECTION
receiver electrical characteristics over recommended ranges of common-mode input voltage. supply
voltage. and operating free-air temperature (unless otherwise noted)

Vhys

PARAMETER
Differential-input high-threshold voltage
Differential-input low-threshold voltage
Hysteresis §

VOH

High-level output voltage

VOL

Low-level output voltage

VTH
VTL

II

line input current

ri
los
ICC

Input resistance

TEST CONDITIONS

MIN

Vo = 2.7 V,
Vo = 0.5 V,

10 = -0.4 mA
10=BmA

VID = 200 mV,
See Figure 2
VID = - 200 mV,
See Figure 2
Other input at 0 V,
See Note 5

10H = - 400

Typt

0.2
-0.2+
50

ILA,

2.7

L VI
I VI

= 12 V
= -7 V
12
-15

No load

UNIT

V
V
mV
V

10L = 8 mA,

Short-circuit output current

Supply current (total package)

MAX

57

0.45

V

1
-0.8

mA

-85
70

kll
mA
mA

t All typical values are at VCC = 5 V, T A = 25 ·C.
:t:The algebraic convention, where the less-positive (more-negative) limit is designated minimum, is used in this data sheet for cornmon-

mode input voltage and threshold voltage levels only.
§Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negatilfe-going input threshold voltage, VT _.
NOTE 5: Refer to EIA Standard RS-422-A for exact conditions.

receiver switching characteristics. Vee - 5 V. TA = 25°e
tpLH
tpHL

PARAMETER
Propagation delay time, low-to-high-Ievel output
Propagation delay time, high-to-Iow-Ievel output

TEST CONDITIONS
VID = -1.5 V to 1.5 V,
CL = 15 pF,
See Figure 4

TEXAS ."

INSTRUMENTS
2-602

POST OFFICE BOX 656303 • DALLAS. TEXAS 75285

MIN

TYP

MAX

19
30

35
40

SN751798
DIFFERENTIAL DRIVER AND RECEIVER PAIR
PARAMETER MEASUREMENT INFORMATION

VOC

.J"
FIGURE 2. RECEIVER VOH AND VOL

FIGURE 1. DRIVER VOD AND VOC

CL = 60 pF
(Sea NotaBI
GENERATOR
(S. .

Nota AI

·'1.5V

INPUT

son

';5V

I

~tDD
I

T-

I

OUTPUT

_ _.....r
TEST CIRCUIT

OV

I

tDD~
I

tTO

3V

:

I

OUTPUT

-+I

I

I

I

l

I

i.

...,

"'Z.5V

50%
"'-Z.5V

'--tTD

VOL TAGE WAVEFORMS

FIGURE 3. DRIVER DIFFERENTIAL-OUTPUT DELAY AND TRANSITION TIMES
--3V

GENERATOR
(Sea Nota AI

>---...-OUTPUT

son

~

INPUT

1.5 V

I

I
I

1.5 V

1.5 V

I

""-~t

tPLH~

OV

........,- PHL

-:--

~

OUTPUT

1.3 V

VOH

1.3 V

VOL
TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 4. RECEIVER PROPAGATION DELAY TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR S 1 MHz, 50% duty cycle, tr S 6 ns,
tt S 6 ns, Zo = 50
B. CL includes probe and jig capacitance.

n.

TEXAS •

INSTRUMENTS
POST OFFICE BOX 855303 • OALLAS. TEXAS 75285

2·603

SN751798

DIFFERENTIAL DRIVER AND RECEIVER PAIR
TYPICAL CHARACTERISTICS
DRIVER LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT

DRIVER HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT

,

5
4.5

>
I

~

-i>

VCC - 5 V
TA - 25°C

4

S

3

11'"0

"'" r-.....

3

0
'ii
>

2.5

~
.....0

.2' 1.5
l:

I

I
I

2

!l

i:.

1.5

.....

-'

0

>

0.5

o

o

-20

-40

-60

-80

3.5

CD

11'"0

o

-100 -120

o

SQ.
S

2.5

0
ii

2

~

1.5

..c

I

120

RECEIVER OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE

5

I

VCC = 5 V

10 = 0

VCC = 5 V I TA = 25°C

>
I

CD

~'"

t'-..... .......

3

>

;
0

I
VIC _

VIC ..
-12 V

VIC IOV

VTVT+

VT- I- VT- I-VT+
VT+
l - fF-

S

f'\

TA - 25°C

I

4

t-........

;E

12 V

I--

2

I

0

0

I

0.5

o

>

1\

0

0

100

FIGURE 6

~

>

80

60

FIGURE 5

"'" r-.......

>

40

20

10L -Low-Level Output Current-rnA

,

3

!---

10H-High-Level Output Current-rnA

4
I

~

0.5

DRIVER DIFFERENTIAL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

>

--

I

l:

~

S
So

"

2

I

3.5

>

2.5

j
!l

I

4

CD

.............

,

vcc - 5 V
TA = 25°C

I

t--- t---

3.5

;
o

>

5
4.5 f-

\

o

10 20 30 40 50 60

70 80 90 100

o
-125

-75

0

25

50 75 100125

liD-Differential Input Voltage-rnA

FIGURE 7

FIGURE 8

TEXAS . "

2-604

-25

10-Output Current-rnA

INSTRUMENTS
POST OFFICE BO);C 855303 • DAUAS. TEXAS 75265

5N751798

DIFFERENTIAL DRIVER AND RECEIVER PAIR
TYPICAL CHARACTERISTICS
RECEIVER HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

RECEIVER HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5

5
VIO = 0.2 V
TA = 25°C

>

.,I

'"

~

.,I
'"
~

~

0

>

>
SCo
S

l'\ ~ V VCC - 5.25 V - f-l'\ ~ ~V VCC 5V- f--

::J

0
Qi

2

~

1:.
:i:

'"I

VCC = 4.75 V

J:
0

>

o

o

4

0

S~

s :3
So

....,>

>

4

3

0

Qi

....,>
1:.

=

2

'"

:i:

~~
~~
~~

I
J:
0

r

>

r-

o

-10
-30
-20
-40
-50
10H-High-level Output Current-rnA.

VCC = 5 V
VIO = 0.2 V
10H = - 440 I'A
I

o

10

20
30
40 50 60
70
T A - Free-Air Temperature °C

FIGURE 9

FIGURE 10
RECEIVER LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

RECEIVER LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT

0.5r--,---.------,---r--,--~--,

0.6
I

V
./

VCC = 5 V
TA = 25°C

>
III

0.5

0

SCo
S

0

0.4
0.3

~
0

...I

...
0

>

0.2

V

/

I

5V

l!!

~

S
0.3 F===t==t-+~~_+_=t==+_---1
So
::J
o

/

Qi

.5

0.21----t--I1---I1---+--+-+-+--I

~

.3

I
... 0.1t--I1----j---j--t--r-+--t----t

~

0.1

o

=

VID = - 0.2 V
10l = 8 rnA

~ 0.4

//

Qi

....,>

VCC

>

/ "

'"

~

>

80

o

5

10

15

20

25

30

0'---'----'----'---'---'----'---"'----'

o

10

10l -low-level Output Current-rnA
FIGURE 11

20

30

40

50

60

70

80

TA -Free-Air Temperature- °C
FIGURE 12

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76266

2-605

2-606

SN75186
QUADRUPLE DRIVER/RECEIVER WITH LOOPBACK

•
•
•

FNPACKAGE

Meets Standards RS-232-C, EIA-232-D, and
CCITTV.28

(TOP VIEW)

Four Independent Drivers and Receivers
Loopback Mode Functionally Self-Tests
Drivers and Receivers Without
Disconnection From Line

1LB

•

Driver Slew Rate Limited to 30 V/v.s Max

2A
2Z

•

Built-in Receiver 1-J.lS Noise Filter

•

Internal Thermal Overload Protection

5432128272625
6
7
8
9

2LB

•

EIA-232-D Inputs and Outputs Withstand
±30V

•
•

Low Supply Current ••• 2.5 mA Typ

3A
3Z

21

10

20
11
19
12131415161718

3LB

ESD Protection Exceeds 2000 V Per
MIL-STD-833C Method 3015

24
23
22

NC - No internal connection

description

FUNCTION TABLE (EACH RECEIVER)

The SN75186 Is a low-power bipolar device
containing four driver/receiver pairs designed to
interface data terminal equipment (DTE) with data
Circuit-terminating equipment (DCE). Additionally,
the SN75186 has a loopback mode that may be
used by a data communication system to perform
a functional self test on each driver/receiver pair,
removing the need to locally disconnect cables
and install a loopback connector. Flexibility of
control is ensured by each driver/receiver pair
having its own loopback control input. The
SN75186 is designed to conform to standards
RS-232-C, its revision ANSI/EIA-232-D-1986,
and CCITT V.28.
The maximum slew rate is limited to 30 V/J.lS atthe
driver outputs and drives a capacitive load of
2500 pF at 20 kBaud. The receivers have input
filters that disregard input noise pulses shorter
than 1 J.IS. The SN75186 is a robust device capable
of withstanding :t 30 V at driver outputs and at
receiver inputs whether powered or unpowered.
This device has an internal ESD protection rated
at 2 kV to prevent functional failures.

INPUTS

LOOPBACK

r:a
H

H
L
L

OUTPUT

A

Bt

z

X
X
L
H

H

L
H
L
H

L
X
X

FUNCTION TABLE (EACH DRIVER)
LOOPBACK
LB

INPUT
A

OUTPUT
yt

H
H
L
H
L
H
L
X
L
t VoHages are RS·232-C, EIA-232-D, and
V.28 levels
H = high level, L = low level, X = irrelevant

The SN75186 Is characterizea tor operation from
O°C to 70°C. \

PRODUCTION DATA documents contain Information current

:.=~I~i:~:r.:=:·,==:=~o:J:
processing does not neceSearily Includ. testing of all
p....meters.

TEXAS ~

Copyright © 1990. Texas Instruments Incorporated

INSTRUMENTS
POST OFACE BOX 855303 • DALLAS. TEXAS 7528S

2-607

SN75186
QUADRUPLE DRIVER/RECEIVER WITH LOOPBACK
logic symbol t
5

G1

8

G2

11

G3

,

14

1A
1Z
2A

2Z
3A
3Z

4A
4Z

3

G4

....

4
6

5

"

7
9

6

12



2
2V6



....

13

1
'iV5

I>

"

10

1'"
I>

4

20
19

3B

4Y

iva
8



..
I

'"
>
..,c

3
2

~

15

"e -1

CI

b

~
I

Sc-

.5

a

2

3

Input-B-to-Ground Voltage-V

2-620

TEXAS .."
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

SN75207, SN752078
DUAL SENSE AMPLIFIERS FOR MOS MEMORIES
OR DUAL HIGH·SENSITIVITY LINE RECEIVERS
electrical characteristics over recommended free-air temperature range (unless otherwise noted)
PARAMETER
High-level
IIH

=

±5.25 V

VCC±

=

±5.25 V

High-level input current

VCC±

into lG or 2G

VCC±

=
=

±5.25 V, VIH(S)
±5.25 V, VIH(S)

=
=

input current

IIH

~
'207

input current

~

Low-level input current

IlL
IIH

VOH

±5.25 V, VIL(S)

= 0.4 V

VCC±

=
=

2.4 V

current into S

±5.25 V, VIHIS)
±5.25 V, VIHLst

VCC±

=

±5.25 V, VIL(S)

=

0.4 V

High-level output current

=

±4.75 V, VIH(S) = 2 V,
VCC±
VIC = -3Vt03V
10L = 16 mA,
VCC± = ±4.75 V, VOH = ±5.25 V

Short-circuit

output currenti

VCC±

=

±5.25 V

VCC±

=

±5.25 V, TA

=

25°C

VCC±

=

± 5.25 V, TA

=

25°C

Supply current from

ICCH-

V CC +, outputs high
Supply current from
VCC _, outputs high

TVpt MAX
30

75

30

75

-5 V

-10

5 V

-10

± 5.25 V

VCC± - ±4.75 V, VIL(S) - 0.8 V,
High-level output voltage
VIC = -3 V to 3 V
10H = -400 pA,

10H

5V
-5 V

± 5.25 V

=
=

current into S

=
=
=
=

2.4 V

=

Low-level output voltage

ICCH+

VIO

VCC±

VOL

lOS

VID

VCC±

Low-level input

IlL

VIO

High-level input

into lG or 2G

MIN
VIO

VCC±

Low-level
IlL

TEST CONDITIONS
'207

VIDH

=

10 mY,

VIOL

=

-10 mY,

UNIT
pA
pA

40

~A

1

mA

-1.6

mA

80

pA

2

mA

-3.2

mA

2.4

V
0.4

V
~A

-18

-70

mA

18

30

mA

-8.4

-15

mA

MAX

UNIT

tAli typical values are at VCC+ = 5 V, VCC- = -5 V, TA = 25°C.
*Not more than one output should be shorted at a time.

switching characteristics. VCC+ - 5 V. VCC- = -5 V. TA
PARAMETER

TEST CONDITIONS

Propagation delay time, low-to-high-Ievel

35

ns

RL = 470O,

20

ns

CL = 50 pF,
See Figure 1

17

ns

17

n.

tpLH(D) output, from differential inputs A and B
Propagation delay time, high-to-Iow-Ievel
tPHL(D) output, from differential inputs A and B
Propagation delay time, low-to-high-Ievel
tPLH(S)

output, from strobe input G or S

Propagation delay time, high-to-Iow-Ievel
tPHL(S)

MIN

output, from strobe input G or S

TEXAS .."

INSTRUMENTS
POST OFFICE BOX 856303 • DALLAS. TEXAS 76286

2-621

SN75207, SN752078
DUAL SENSE AMPLIFIERS FOR MOS MEMORIES
OR DUAL HIGH·SENSITIVITY LINE RECEIVERS
PARAMETER MEASUREMENT INFORMATION
DIFFERENTIAL
INPUT

VCC-

r----- 1 -----..;..,
1A I
I
~~----~~I~'
11y

OUTPUT

.... (See Note 01

1G

S

vcc+

2G

470 Il

STROBE
INPUT
(See Note BI

TEST CIRCUIT

ff----------------------------40mV
INPUT
B

10 mV
OV

10 mV

I

I

I t - tW 1---..1
3V
STROBE
INPUT
G DrS

I
I
I

I
I
I

I

---t

tpHL(DI~

VOH

~-----tw2------~

3V
1.5V

1.5V

I'--------'1- - tPLH(SI-.j

0 V

tPHl(SI-.t
~
_----------~- - - VOH

I

OUTPUT

Y
VOL
. VOLTAGE WAVEFORMS
NOTES: A. The pulse generators have the following characteristics: Zout = 50 Il, tr s 5ns,tf s 5ns,tw 1 = 500 ns with PRR = 1 MHz,
tw2 = 1 "s with PRR = 500 kHz.
B. Strobe input pulse is applied to Strobe 1G when inputs 1 A-1 B are being tested, to Strobe S when inputs 1 A·1 B or 2A-2B
are being tested, and to Strobe 2G when inputs 2A-2B are being tested.
C. CL includes probe and jig capacitance.
D. All diodes are 1N916.

FIGURE 1. PROPAGATION DELAY TIMES

2-622

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 76265

SN75207, SN752078
DUAL SENSE AMPLIFIERS FOR MOS MEMORIES
OR DUAL HIGH·SENSITIVITY LINE RECEIVERS
TYPICAL APPLICATION DATA
STROBES

r---- ----,
100!l
INPUT
FROM
TTL

I
I

r-----~~~I--f'~~~'

SN75361A
MOS MEMORY

0'

I
I
I

TO
DUMMY
LINE

SN75452B

OUTPUT
TO
TTL

100 !l

V's!

I
1/2 '207 OR '207B
I
IL ________ .JI

ADJUSTMENT

\~---------~V~----------JI

'---v---' '---v----'
DRIVE

SENSE

MEMORY

FIGURE 2, MOS MEMORY SENSE AMPLIFIER
RECEIVER 1

RECEIVER 4

RECEIVER 2

y

y

y
STROBES
TRANSMISSION LINE HAVING
CHARACTERISTIC IMPEOANCE Zo

STROBES

STROBES
RT

LOCATION 2
ORIVER 1

DRIVER 3

A
OATA INPUT B

A

C

C

ORIVER 4

B

INHIBIT D

D
LOCATION 1

LOCATION 3

LOCATION 4

Receivers are '207 or '2078; drivers are SN55109A, SN75109A, SN55110A, SN75110A, or SN75112.

FIGURE 3, DATA-BUS OR PARTY-LINE SYSTEM
PRECAUTIONS:

When only one receiver in a package is being
used, at least one of the differential inputs of the
unused receiver should be terminated at some
voltage between - 3 V and 3 V. preferably at
ground. Failure to do so will cause improper
operation of the. unit being used because of
common bias circuitry for the current sources of
the two receivers. Strobe G of the unused
channel should be grounded.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-623

2-624

SN751177,SN751178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
03381, MARCH 1990

SN751177
NPACKAGE
(TOP VIEW)

•

Meets EIA Standards RS-422-A, RS485

•

Meets
Recommendations V.10,
V.11, X.26, X.27

•

Designed for Multipoint Bus Transmission
on Long Bus Lines In Noisy Environments

•

ccm

Driver Common-Mode Output Voltage
Range of -7 V to 12 V

•

Driver Positive- and Negative-Current
Limiting

•

Thermal Shutdown Protection

•

Driver 3-State Outputs Active-High Enable

•

Receiver Common-Mode Input Voltage
Range of -12 V to 12 V

•

Receiver Input Sensitivity ••• :I: 200 mV

•

Receiver Hysteresis ••• 50 mV Typ

•

Receiver Hlgh-Input-Impedance •••
12 kn Min

•

Receiver 30State Outputs Active-Low
Enable for SN751177 Only

•

Operates from Single 5-V Supply

lB
lA
lR
RE
2R

vee
15

10

3

14

1Y

4

13

lZ

5

12

DE

2A

6

11

2Z

2B

7

2Y
20

SN751178
N PACKAGE
(TOP VIEW)

Vee
10

1Y
lZ

lR

1DE
2R

2DE

2A

2Z

2B

SN751177, SN751178

description

FUNCTION TABLE OF EACH DRIVER

The SN751177 and SN751178 dual differential
drivers and receivers are monolithic integrated
circuits that are designed for balanced multipoint
bus transmission at rates up to 10 M bits per
second, They are designed to improve the
performance of full-duplex data communications
over long bus lines and meet EIA standards
RS-422-A, RS-485 and several CCITT
recommendations,

INPUT ENABLE
D
DE

OUTPUT

Y

Z

H

H

H

L

L

H

L

H

L

Z

Z

X

SN751177
FUNCTION TABLE OF EACH RECEIVER

The SN751177 and SN751178 driver outputs
provide limiting for both positive and negative
currents and thermal shutdown protection from
line fault conditions on the transmission bus line,

DIFFERENTIAL INPUTS
A-B

ENABLE

OUTPUT

1fE

R

VIO ~ 0,2 V

H

Vio $ -0.2V

L
L
L

X

H

-0.2V 1990, Texas Instruments Incorporated

TEXAS . "

INsrRUMENTS
POST OFFICE BOX 655303' DALlAS, TEXAS 75265

2-625

SN751177,SN751178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
logic symbolst

logic diagrams (positive logic)
SN751177

SN751177
DE

R1!'
1Y
1Z

1D

1D
1R

2 1A
1R

'1 1B

2Y

2D

2Z

2D

2R
2R

2B
SN751178
1DE

SN751178
1DE

1Y
1Z

1D

lD

1A

1R

1R
2DE

2DE

2Y

2D

2Z

2D

2A

2R

2B

4

~lY
13 1Z

::-~

15

001

012 12

13

002

013 10

11

011

003

RECEIVER
Rll

2

RI2

4

R02

RI3

6

R03

[>

ROl

tThese symbols are in accordance with ANSI/IEEE
Std. 91-1984 and IEC Publication 617-12.

PRODUCTION DATA documenls contain Information
currant as of publication data. Producls conform to
spacifications per the tarms of Texas Instruments
standard warranty. Production processing does not
necessarily include tesling Dr all parameters.

Copyright © 1990, Texas Instruments Incorporated

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303· DALLAS. TEXAS 75265

2-633

SN751730
TRIPLE LINE DRIVERS/RECEIVE,RS
logic diagrams (positive logic)
RECEIVER

DRIVER

DE1 1
DI1 14 ""'----s-__..

001

R11~R01

DI2 12

D02

RI2~R02

DI3 10

003

RI3~R03

DE2

9

equivalent schematics of driver and receiver
DRIVER

Vee
2.50

15kn

DO
DI
DE1
DE2-1-t-.

1000

RECEIVER

Vee
600
6k.Q

RO

RI

14kn,

TEXAS ~

2-634

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

SN751730
TRIPLE LINE DRIVERS/RECEIVERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) ....................................................... 7 V
Input voltage range,Vr Driver .................................................. -0.5 V to 7 V
Receiver ................................................ -0.5 V to 7 V
Output voltage range, Vo Driver ................................................ -0.5 V to 7 V
Enable input voltage range ..................................................... -0.5 V to 7 V
Continuous total power dissipation .................................. See Dissipation Rating Table
Operating free-air temperature range, T A ........................................... O°C to 70°C
Storage temperature range ................................................... -65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ............................. 260°C
NOTE 1: All voltage values are with respect to the network ground terminal.
DISSIPATION RATING TABLE
PACKAGE

TA';; 2S·C
POWER RATING

DERATING FACTOR

0

950mW

ABOVE TA = 2S·C
7.SmW/oC

N

1150mW

9.2mWI"C

TA=70·C
POWER RATING
S08mW
736mW

recommended operating conditions
Supply voltage, VCC
High-level input voltage, VIH
Low-level input voltage, VIL

Driver, Enable
Receiver
Driver, Enable

MIN
4.75
2

5

MAX
5.25

O.B
1.15
0

UNIT
V
V

1.55

Receiver

Operating free-air temperature, T A

NOM

70

V
°C

TEXAS ~

INSTRUMENTS
POST OFFICE BOX 6SS303 • DALLAS, TEXAS 75265

2-635

SN751730
TRIPLE LINE DRIVERS/RECEIVERS
driver electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
TEST CONDITIONS

PARAMETER
VIK

VOH

VODH
VOL

IIH
IlL

IlL = -18mA
= 4.75 V,
Vee = 4.75 V,
VIH = 2 V,
TA = 25"e
10H = 59.3 mA,
Vee = 5.25 V,
VIH = 2V,
10H = 78.1 mA
Vee = 4.75 V,
VIH = 2V,
RL = 51.40
Vee = 5.25 V,
VIH = 2V,
RL = 56.90
RL = 46.3 0 or 56.9 0
VCC = 5.25 V,
10L = - 0.24 mA
VIL = 0.8 V,
RL = 56.9 n
VIH = 4.5 V

Input clamp voltage

High-level output voltage

Differential high-level output voltage
Low-level output voltage

High-level input current
Low-level input current

10H

High-level output current

lOS

Short-circuit output current

DI

r----oE
DI

r-----oE

= 5.25 V,

VCC

VIH

VCC

= 5.25 V,

VIL

VCC

= 4.75 V,
=5V
= 5.25 V,

VIL

VOH
VCC

ICCH

ICCL

driver switching characteristics,

Vee =

5

Propagation delay time, high to low level output

~tpD

Differential propagation delay timeT

tr

Output rise time

tf

Output fall time
Slew rate

RL

= 47.50,

See Figure 1
Va
CL

= 0.15 to 3.05 V,
= 10.2pF,

See Figure 1
CL

UNIT
V

4.10
V
3.05
4.20
0.50

V

0.15
V
0.5
20
60
-400
-1200
100
100
-30

flA
flA
I1A
mA

47
mA
80

TA = 25°C

Vce = 5V,
RL = 47.5 n,
Va

MAX
- 1.5

3.11

= 0.4 V

= 1 to 3 V average, RL = 47.5 n,
= 10.2 pF, See Figure 1

TEXAS

~

INSTRUMENTS
2-636

TYP

2.7V

TEST CONDITIONS

PARAMETER
Propagation delay time, low to high level output

tpLH
tpHL

V ± 5%,

=

=0
VIH = 4.5 V
VIH = 4.5 V
VI(D) = 4.5 V,
VI(R) = 0
VI(D) = 0,
VHR) = 4.5 V

VCC = 5.25 V,
No load

Supply current (total package)

SR

MIN

Vee

POST OFFICE BOX 655303· DALLAS, TEXAS 75265

MIN

TYP

MAX

UNIT

6.5

12

18.5

ns

6.5

12

18.5

ns

10

ns

5

10

ns

5

13

ns
0.65

V/ns

SN75173D
TRIPLE LINE DRIVERS/RECEIVERS
receiver electrical characteristics over recommended ranges of supply voltage and operating
free-air temperature (unless otherwise noted)
PARAMETER

VOH

-

High-Iewl output voltage

VOL

Low-level output voltage

r,

Input resistance
High-level input current
Low-level input current
Short-circuit output current, See Note 2

IIH
IlL
lOS

TEST CONDITIONS

VCC = 4.75 V,

VI = 1.15 V,

10H = - 400 IlA
VCC = 4.75 V, IIOL = SmA
VIH = 1.55 V
IIOL=4mA
VI = 0.15 to 3.9 V
VCC = 0,
VCC = 4.75 V,
VCC = 5.25 V,
VCC = 5.25 V,

ICCH

VCC = 5.25 V,
No load

Supply current (total package)
ICCL

VIH = 3.11 V
VIL = 0.15 V
VIL = 0
VI(D) = 4.5 V,
VIIR) = 0
VI(D) = 0,
VI(FIL = 4.5 V

MIN

TYP

MAX

2.7

UNIT

V
0.5
0.4
20
0.42
0.04
-100

7.4
-0.24
-20

V
kO
rnA
rnA
rnA

47
rnA
SO

NOTE 2: Only one output should be shorted at a Ume, and duratIon of the short-<:lrcUlt should not exceed one second.

receiver switching characteristics, Vee
tPLH
tpHL
AtpD

= 5 V ±5%, TA = 25°e
TEST CONDITIONS

PARAMETER

Propagation delay time, low to high level output
Propagation delay time, high to low level output
Differential propagation delay timet

RL = 2 kn,
See Figure 2

CL = 15 pF

MIN

TYP

MAX

UNIT

7.5
7.5

12
12

19.5
19.5
10

ns
ns
ns

TEXAS ",

INSTRUMENTS
POST OFFICE BOX 655303· DALLAS, TEXAS 75265

2-637

SN751730
TRIPLE LINE DRIVERS/RECEIVERS
PARAMETER MEASUREMENT INFORMATION

Vee

=

~.3V

Input
5V

\vJ:;-- ::

tpLH~

I

I

~tpHL

I

I

1.4
I
I 1.4
~
I
I

Output

Pulse
Generator
(See Note A)

I

Output

13.05V-VOH

V

RL
47.5'1

(a) TEST CIRCUIT

~

~

tr

tf

V
0.15 V V
OL

(b) VOLTAGE WAVEFORMS

NOTE A: The pulse generator has Ihe following characteristics: Zo - 50 '1,

Iw s 500

ns, PRR " 1 MHz, If S 6 ns, I r " 15 ns

Figure 1. Driver Switching Times
Vcc

=

5V
RL

Pulse
Generator
(See Note A)

= 2k'1

Output
Input

.

-1~:;

;;:;---\

-'"~\V---+l~

1N3064X2

tpHL ~

I\!.
Output

\.3V

(a) TEST CIRCUIT

~ tPLH

I

!r

'-1~~

3V

OV
V
OH
VOL

(b) VOLTAGE WAVEFORMS

NOTES: A. The pulse generalor has Ihe following characteristics: Zo ~ 50 '1,
B. CL includes probe and jig capacitance.

Iw "

500 ns, PRR S 1 MHz, If " 10 ns, Ir " f 0 ns.

Figure 2. Receiver Switching Times

TEXAS ."

INstRUMENTS
2·638

--

POST OFFICE BOX 655303' DALLAS. TEXAS 75265

SN75ALSD53
QUAD FUTUREBUS TRANSCEIVER
03077. JANUARY 1988-REVISED SEPTEMBER 1989

N PACKAGE
(TOPVIEWI

•

High-Speed Quad Transceiver

•

Fully Compatible with IEEE
Std 896.1-1987 Futurebus Requirements

BG GNO
BUS GNO
B1
B2
BUS GNO
B3
B4
BUS GNO
RE
TE

VCC
01

•

Drives Load Impedances as Low as 10 (}

•

High-Speed Advanced Low-Power Schottky
Circuits

•

Low Power Dissipation ... 81 mW Max per
Channel

•

High-Impedance P-N-P Inputs

•

BTL'" Logic Level 1-V Bus Swing Reduces
Power Consumption

•

Low Bus-Port Capacitance

•

Power-UpIPower-Down Protection
(Glitch-Free)

R2
LOGIC GNO
03
R3
04
R4

FN CHIP CARRIER PACKAGE
(TOPVIEWI
C

Cz

•

Open-Collector Driver Outputs Allows
Wired-OR Connections

•

Multiple Bus Channel Ground Returns to
Reduce Channel Noise Interference

•

Designed to Be a Faster. Lower Power
Functional Equivalent of National DS3893

_

-

3

2

Z(!l
u(!l mm
02
R2
LOGIC GNO
03
R3

1 2019

4

18

5

17

6

16

7

15
14

8

description

B1
B2
BUS GNO
B3
B4

9 1011 1213

The SN75ALS053 is a four-channel. monolithic.
high-speed. advanced low-power Schottky
device
designed
for two-way data
communication in a densely populated
backplane. The SN75ALS053 has independent
driver input (On) and receiver output (Rn) pins
and separate driver and receiver disables. This
transceiver is designed for use in high-speed bus systems and is similar to the SN75ALS057 transceiver
except that the trapezoidal feature has been eliminated to speed up the propagation delays.
These transceivers feature open-collector driver outputs. each with a series Schottky diode to reduce
capacitive loading to the bus. By using a 2-V pullup on the bus. the output signal swing will be approximately
1 V. which reduces the power necessary to drive the bus load capacitance. The driver outputs are capable
of driving an equivalent dc load of as low as 10 0.
The receivers have a precision threshold set by an internal bandgap reference to give accurate input
thresholds over Vee and temperature variations.
These transceivers are compatible with Backplane Transceiver Logic (BTL"') technology at significantly
reduced power dissipation per channel.
The SN75ALS053 is characterized for operation from ooe to 70 oe.

BTL is a trademark of National Semiconductor Corporation.
Copyright @ 1989, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-639

SN15ALS053
QUAD FUTUREBUS TRANSCEIVER
logic diagram (positive logic)

FUNCTION TABLE
TRANSMIT/RECEIVE
CONTROLS

TE

~

D-B

B-R

L

L
H

D

0

R
0

L
H

T
T

R
0

L
H
H

TE

CHANNELS

iiE

(11)
(12)

XMIT-'
(2)

H = high level. L = low level. R = receive. T = transmit.
o = disable
Direction of data transmission is from On to Bn, direction of data
reception is from Bn to Rn.

(18)

01

81

(3)

R1

logic symbol t

+-REC
2 IDENTICAL CHANNELS NOT SHOWN

(9)
(18) 81

04

(17) 82

R4

(10)

(15) 83

(14) 84

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

TEXAS . "
INSTRUMENTS
2-640

POST OFFICE BOX 655303 • DALLAS. TeXAS 76265

(14)

B4

SN75ALS053
QUAD FUTUREBUS TRANSCEIVER

schematics of inputs and outputs
DRIVER OUTPUT

RECEIVER INPUT

vcc------~~----------~--~--------._--------

lIE INPUT
vcc------------~-----

lIE
INPUT

-'---.---.-1

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6 V
Control input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Driver input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Driver output voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2.5 V
Receiver input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2.5 V
Receiver output voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 0 DC to 70 DC
Storage temperature range ......................................... - 65°C to 150°C
Case temperature for 10 seconds: FN package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260 DC
Lead temperature 1,6 mm (1/16 in) from case for 10 seconds: N package .............. 260 DC
NOTE 1: Voltage values are with respect to network ground terminal.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-641

SN75ALS053
QUAD FUTUREBUS TRANSCEIVER
DISSIPATION RATING TABLE
PACKAGE
FN
N

TA s 25°C
POWER RATING
1400 mW
1150mW

DERATING FACTOR
ABOVE TA - 25·C
11.2 mW'·C
9.2 mW'·C

TA - 70·C
POWER RATING
B96mW
736mW

recommended operating conditions
MIN
4.75

Supply voltage, VCC
High-level driver and control input voltage, VIH

NOM
5

MAX
5.25

2

Low-level driver and control input voltage, VIL
Bus termination voltage
Operating free-air temperature, T A

1.9
0

UNIT
V

0.8

V
V

2.1
70

V
·C

electrical characteristics over recommended ranges of operating free-air temperature and supply voltage
(unless otherwise noted)
PARAMETER

TEST CONDITIONS

VIK
VT

Input clamp voltage at On, DE, or RE

VOH

High-level output voltage at Rn

II

Bn at 1.2 V,
10H

Bn

VL = 2 V,
See Figure 1

On, TE or RE

VI = VCC
VI = 2 V,
On at 0.8 V,

IlL

Low-level input current at On, TE or "FIE

lOS

Supply current

CoIB!

Driver output capacitance

flE:

at O.B V,

-1 mA

Bn

VI = 0.4 V
Rn at 0 V,
flE: at 0.8 V

= 10 n,

V
V
V

0.5
V
0.75

1.2
40

VCC = 0 or 5.25 V,
TE at O.B V,
Bnatl.2V,

VCC - 5V,TA - 25·C

TEXAS . "

INSTRUMENTS
2-642

UNIT

2.5

RE at O.B V,

RL

MAX
-1.5
1.674

10L = 20 mA
On at 2.4 V, TE at 2.4 V,

High-level input current

ICC

=

Bn at 2 V,

IIH

Short-circuit output current at Rn

TYP

1.426

Low-level output voltage

,

MIN

-18 mA

Receiver input threshold at Bn

Rn
VOL

=

POST OFFICE BOX 656303 • DALLAS, TEXAS 75265

100

-70

6.5

p.A

-400

p.A

-200

mA

65

mA
pF

SN15ALS053
QUAD FUTURE BUS TRANSCEIVER
switching characteristics over recommended ranges of operating free-air temperature and Vee (unless
otherwise noted)
driver
PARAMETER

FROM

TO

(lNPUTI

IOUTPUTI

On

Bn

TEST CONDITIONS

Propagation delay time,
tpLH

low-to-high-Ievel output
Propagation delay time

tPHL

TE at 3 V,

VL

=

2 V,

See Figure 2

high-to-Iow-Ievel output
Propagation delay time,

tpLH

low-to-high-Ievel output
Propagation delay time,

tpHL

On

On at 3 V,

Bn

VL

=

2 V,

See Figure 2

high-to-Iow-Ieval output

Transition time,
tTLH

low-to-high-Ievel output
Transition time,

tTHL

On

TE at 3 V,

Bn

VL

=

2 V,

See Figure 2

high-to-Iow-Ievel output
Skew between driver
channels t

On

TE at 3 V,

Bn

VL

=

MIN

MAX

2

7

2

7

2

7

2

7

0.5

5

0.5

5

UNIT

ns

ns

ns

1

2 V

ns

receiver
PARAMETER
tpLH
tpHL

low-to-high-Ievel output

tpHZ

tpZH

TO

Bn

Rn

Propagation delay time,
high-to-Iow-Ievel output

from low level

Output enable time
tpZL

IOUTPUTI

TEST CONDITIONS

Propagation delay time,

Output disable time
tPL2

FROM
(lNPUTI

to low level
Output disable time
from high level
Output enable time

to high level
Skew between receiver
channels t

HE at 0.3 V, TE at 0.3 V,

MIN

MAX

2

8

2

8

See Figure 3

UNIT

ns

Bn at 2 V, TE at 0.3 V, VL - 5 V,

FiE

Rn

CL = 5 pF, RL1
See Figure 4

FiE

Rn

CL = 5 pF, RL1
See Figure 4

FiE

Rn

CL = 5pF, RLI
See Figure 4

FiE

Rn

CL = 5 pF, RL1
See Figure 4

Bn

Rn

FiE at 0.3

=

500 11,

Bn at 2 V, TE at 0.3 V, VL

=

6

ns

12

ns

6

ns

12

ns

1

ns

5 V,

= 50011,

Bn at 1 V, TE at 0.3 V. VL - 0,

=

50011,

Bn at 1 V. TE at 0.3 V. VL

=

50011,

V. TE at 0.3 V

= O.

t Skew is the difference between the propagation delay time ItpLH or tpHLl of one receiver channel and that same propagation delay time
of any other receiver channel. It applies for both tpLH and tpHL.

TEXAS.

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

2-643

SN75ALS053
QUAD FUTUREBUS TRANSCEIVER .
PARAMETER MEASUREMENT INFORMATION

t--:"(B-nl.....-

VO

FIGURE 1. DRIVER LOW-LEVEL-OUTPUT-VOL TAGE TEST CIRCUIT

10 II

t

VIIDn, TEl

I--_._
......-VO
(Bn)
30 pF (INCLUDES JIG CAPACITANCEI

TEST CIRCUIT
3V

,--_ _ __

1.5 V \

VIIDn,TE)

o V--- -

tPLH-+!
VO(Bn)

VOH -

-

VOL

-

1.5 V i

-r"-----------J I

t+-

r--

tPHL....

-1~5;;-V~90%
10%/1
-+I I+-tTLH

90%

"t.:.55 V
1\;10%
I+-

tTHL~

VOLTAGE WAVEFORMS
NOTE: tr

~

tf '" 5 ns from 10% to 90%

FIGURE 2. DRIVER PROPAGATION DELAY TIMES

TEXAS •
INSTRUMENTS
2-644

POST OFfiCE BOX 655303 • DALLAS, TEXAS 75265

SN75ALS053
QUAD FUTUREBUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION

~L

~________

~I (Rn}!

l'

Vo
so pF

(INCLUDES JIG CAPACITANCE}

TEST CIRCUIT

2V
VUBn} 1 V _ _

~~~\!i.
tPLH

VOH -

-

-

-

VO(Rn}

-+I
-

-

__________________

1._5_5..JVt

r+-

---+I r+-- tPHL
- t . 1

1.5V!.

1.5V\

VOL'

'-.- - - - - - VOLTAGE WAVEFORMS

NOTE: tr = tf S 10 ns from 10% to 90%

FIGURE 3. RECEIVER PROPAGATION DELAY TIMES

!LRL1

V~~

________

~-(R-n-}~l~J['----vo

J

CL (INCLUDES JIG CAPACITANCE}

TEST CIRCUIT

\1.5

VU~--- --:;;'~l

°V

VO(Rn}

1
tPH2~ I+-

*

------il""./... - - I ~-f
I
tpLZ ~ I+IV-- rO. 5

7' ___ I

VO(Rn} ____________J _ -

V

I ~--------r O. S V ~ ~tpZH

I

1,.-----

...l;/1.SV

I

-+t
V

~tpZL

----oJ,1.SV

- - '"

~---------

VOLTAGE WAVEVORMS
NOTE: tr

= tf.

S 5 ns from 10% to 90%

FIGURE 4. PROPAGATION DELAY FROM RE TO Rn

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DAUAS. TEXAS 15265

2-645

SN75ALS056 r SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
03025, AUGUST 1987 - REVISED JUNE 1990

•

SN75ALS056 Is an Octal Transceiver

•

SN75ALS057 Is a Quad Transceiver

•

High-Speed Advanced Low-Power Schottky
Circuitry

•

Low Power Dissipation ...
52.5 mW/Channel Max

SN75ALS056
OW OR N PACKAGE
(TOP VIEW)

A1
A2
A3
A4
Vee
A5
A6

B1
B2
B3
B4
GNO
B5
B6

•

High-Impedance P-N-P Inputs

•

Logic Level '-V Bus Swing Reduces Power
Consumption

•

Trapezoidal Bus Output Waveform Reduces
Noise Coupling to Adjacent Lines

A7

B7

A8

B8

•

Power-Up/Down Protection (Glitch Freel

eS--...._ _...r- T/R

•

Open-Collector Driver Outputs Allow
Wired-OR Connections

•

SN75ALS057
OW OR N PACKAGE
(TOP VIEW)

Designed to Be a Faster, Lower Power
Functional Equivalent of National OS3896,
DS3897

01
R1
02

description

B1
E1
B2

R2

The SN75ALS056 is an 8-channel, monolithic,
high-speed, advanced low-power Schottky
device designed for 2-way data communication
in a densely populated backplane. The
SN75ALS057 is a 4-channel version with
independent driver input (On) and receiver output
(Rn) pins and a separate driver disable for each
driver (En).

E2

Vee
03
R3
04
R4

GNO
B3
E3
B4
E4

TE--...._ _..r--RE

These transceivers feature open-collector driver outputs with a series Schottky diode to reduce capacitive
loading to the bus. By using a 2-V pull-up termination on the bus, the output signal swing will be
approximately 1 V, which reduces the power necessary to drive the bus load capacitance. The driver outputs
generate trapezoidal waveforms that reduce crosstalk between channels. The drivers are capable of driving
an equivalent dc load as low as 18.5 0.
The receivers have internal low-pass filters to further improve noise immunity.
The SN75ALS056 and SN75ALS057 are characterized for operation from

PRODUCTION DATA documants contain information
currant as of publication data. Products conform to
spacifications par the terms of Taxas Instruments

=ri;ai~~~1~ =:\:~ti:r :.~-::::::~!~~ not

ooe to 70 oe.

Copyright © 1990, Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TeXAS 75265

2-647

SN75ALS056, SN75ALS057
TRAPEZOIDAL·WAVEFORM INTERFACE BUS TRANSCEIVERS
logic symbols t

logic diagrams (positive logic)
SN75ALS056

SN76ALS056
T/R (11)
~(10)

Al

(1)

(20)

(2)

(19)

(3)

(lB)

A2
A3
A4

XMIT-+

Bl
B2

Al~(l~)------~---+--L-~

(20) Bl

B3
(4)

B4
+-REC

A5
A6
A7
A8

(6)

(15)

(7)

(14)

(8)

(13)

(9)

(12)

B5

6 IDENTICAL CHANNELS NOT SHOWN

B6
B7

A8~(9~)------~------L-~

B8

SN75ALS057

SN76ALS067

TE

TE

iiE

iiE
01

(12) B8

(10)
(11)

(20) Bl

El

XMIT-.

Rl
02

(18) B2

E2

El

R2
03

01

(15) B3

E3

Rl

(1)

(20)

(2)

R3
04

Bl

(19)

+--REC
(13) B4

E4

2 IDENTICAL CHANNELS NOT SHOWN

R4
(8)
04
E4

R4

(12)

(9)

tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

TEXAS •

INSTRUMENTS
2-648

POST OFFICE BOX 656303 • DALLAS, TEXAS 75265

(13)

B4

SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS

SN76ALS066
FUNCTION TABLE

SN75ALS057
FUNCTION TABLE

TRANSMIT/RECEIVE

TRANSMIT/RECEIVE

CONTROLS

CS

T/R

l

H
l
X

l

H

H

= high level,

CHANNELS

CONTROLS

A-B
T (A- B)
R (B -A)

TE
l
L

0

l

RE
l
L
H

L

=

low level, R

=

receive, T

= transmit,

0

CHANNELS
En
l
H

D-B

B-R

0

R

T

R

l

0

0

l

H

H

T

D

H

L

X

H

H

X

0
0

0

= disable,

X

=

R

irrelevant

Direction of data transmission is from An to Bn for the SN75ALS056 and from Dn to Bn for the
SN75ALS057. Direction of data reception is from Bn to An for the SN75ALS056 and from Bn to Rn for
the SN75ALS057. Data transfer is inverting in both directions.

schematics of inputs and outputs
DRIVER OUTPUT

r-

CDNTROL INPUTS

RECEIVER INPUT

VCC------~----------~~,.-----~~------

VCC------------~-----

TElAE ____- .__.-1
INPUT

GND------_4~_4~_4~~~--~--------_4~----

GND-----4~----~--_e-

_..J
RECEIVER OUTPUT

---,

DRIVER INPUT

Vcc--------------~~------~--~------~~--------_.---

48 {)

I
I

20 k{)

SN75ALS057
ONLY

r - - - - --,

I

r---~--_7I__

I

f -......-O:.~

I

__ I
I
I

I

I
I

1
1
I
I

L ______ .J

GND

All resistor values shown are nominal.
t Additional ESD protection is on the SN75ALS057 only, which has separate receiver output and driver input pins.

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-649

SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6 V
Control input voltage. . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Driver input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5.v
Driver output voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2.5 V
Receiver input voltage ...................................................... 2.5 V
Receiver output voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. OoC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . .. 260°C
NOTE 1: Voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE

OW

TA:S 25'C
POWER RATING
1025 mW

N

1150mW

PACKAGE

DERATING FACTOR
TA - 70'C
ABOVE TA - 25'C POWER RATING
8.2·mW/oC
656 mW
9.2 mW/oC
736 mW

recommended operating conditions
MIN
4.75

Supply voltage, VCC
High-level driver and control input voltage, VIH
Low-level driver and control input voltage, VIL
Bus termination voltage

MAX
5.25

2
1.9

Operating free-air temperature, T A

0

TEXAS . "

IN STRUM ENlS
2-650

NOM
5

POST OFFICE BOX 666303 • DALLAS, TEXAS 76265

UNIT
V

0.8

V
V

2.1
70

V
·C

SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SN75ALS056 electrical characteristics over recommended ranges of operating free-air temperature
and supply voltage (unless otherwise noted)
PARAMETER

TEST CONDITIONS

VIK
VT

Input clamp voltage at An, TIR, or es

VOH

High-level output voltage at An

Receiver input threshold at Bn

Low-level output voltage
Bn
An, TIR, or es

IIH

High-level input current

Bn

IlL

Low-level input current at An, T IR, or es

lOS

Short-circuit output current at An

lee

Supply current

eo(BI

Driver output capacitance

Typt

1.426

An
VOL

MIN

II = -18 rnA
Bn at 1.2 V,

~atO.8V,

T/R at 0.8 V,

10H = -400 p.A

Bn at 2 V,

'C§' at 0.8 V,

TtR at 0.8 V,

10L = 16 rnA

An at 2 V,

es at 0.8 V,

T/R at 2 V,

VL = 2 V,

RL = 18.50,

See Figure 1

VI = Vee
VI = 2 V,

Vee = 0 or 5.25 V,

An at 0.8 V,

T/R at 0.8 V

VI = 0.4 V
An atO V,

Bnatl.2V,

'C§' at 0.8 V,

T/R at 0.8 V

MAX

UNIT

-1.5

V

1.674

mV

2.4

V
0.5
V

0.75

1.2
40
p.A
100

-40

-400

p.A

-120

rnA

75

rnA
pF

4.5

SN75ALS057 electrical characteristics over recommended ranges of operating free-air temperature
and supply voltage (unless otherwise noted)
.
PARAMETER
VIK
VT
VOH

TEST CONDITIONS

Input clamp voltage at On, En, TE, or RE
' Receiver input threshold at Bn

Bnatl.2V,

High-level output voltage at Rn

Bn at 2 V,

On, En, TE, or RE
Bn

En at 2 V,

'fE at

RL = 18.50,

VL = 2 V,
See Figure 1

VI = Vee
VI = 2 V,

Vee = 0 or 5.25 V,

0.8 V,

On at 0.8 V,
0.8 V

UNIT
V

1674

mV
V

RE at 0.8 V,

On at 2 V,

MAX
-1.5

2.4
0.5

10L = 16 rnA

Bn

IIH

RE at 0.8 V,

10H = -400 p.A

Low-level output voltage

High-level input current

Typt

1426

Rn
VOL

MIN

II = -18 rnA

0.75

1.2

V

40
En at 0.8 V,

100

p.A

'fE at
IlL

Low-level input current at On, En, TE, or RE

lOS

Short-circuit output current at Rn

lee

Supply current

eolBI

Driver output capacitance

t All typical values are at Vee

=

5 V, T A

VI = 0.4 V
Rn at 0,

FiE at

Bn at 1.2 V,

0.8 V

-40

4.5

=

-400

p.A

-120

rnA

40

rnA
pF

25 ·e.

TEXAS ..,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

2-651

SN75ALS056
TRAPEZOIDAL·WAVEFORM INTERFACE BUS TRANSCEIVER
switching characteristics over recommended ranges of operating free-air temperature and
otherwise noted)

Vee (unless

driver
PARAMETER

Propagation delay time,
tpLH
low-to-high-Ievel output
Propagation delay time,
tpHL
high-to-Iow-Ievel output
Propagation delay time,
tpLH
low-to-high-Ievel output
Propagation delay time,
tpHL
high-to-Iow-Ievel output
tpLH

Propagation delay time,
low-to-high-Ievel output

Propagation delay time,
tpHL
.high-to-Iow-Ievel output

FROM

TO

(INPUT}

(OUTPUT}

An

Bn

CS

Bn

TIR

Bn

TEST CONDITIONS

CS at 0.8 V,
VL

=

2 V,

MIN

An and TIR at 2 V, VL
See Figure 2

=

low-to-high-Ievel output
Transition time,

tTHL

An

Bn

VL

=

2 V,

high-to-Iow-Ievel output

t All typical values are at VCC

= 5 V, T A = 25 ·C.

TEXAS . "
INSTRUMENTS
2-652

ns

24

2 V,

TIR at 2 V,
See Figure 2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75286

UNIT

18

ns
20

VIIAn, Bnl = 5 V, CS at 0.8 V,
RL2 not connected, CL = 30 pF,
See Figure 3
RL1 = 18 n,

CS at 0.8 V,

MAX

19

TIR at 2 V,
See Figure 2

Transition time,

tTLH

TVpt

25
ns
35
1

3

11

1

3

6

ns

SN75ALSD56

TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVER
switching characteristics over recommended ranges of operating free-air temperature and Vee (unless
otherwise noted)
receiver
PARAMETER

FROM

TO

(INPUT)

10UTPUT)

Bn

An

MIN

TEST CONDITIONS

Propagation delay time,
tpLH
tpHL

tpLZ

low-to-high-Ievel output

Propagation delay time,

Output disable time

Output enable time
tPZL

tpHZ

tpZH

tpLZ

tpZL

tpHZ

tpZH

to low level
Output disable time
from high level
Output enable time

to high level
Output disable time
from low level
Output enable time
to low level
Output disable time
from high level
Output enable time
to high level
Receiver noise rejection

twlNRI pulse duration

UNIT

18

CS at 0.8

V, T/R at 0.8 V, See Figure 4

ns
18

high-to-Iow-Ievel output

from low level

MAX

Bn at 2 V,

T/R at 0.8 V, CL

CS

An

VL = 5 V, RL 1
See Figure 5

CS

An

VL = 5 V, RL1
See Figure 5

CS

An

VL

Bn at 2 V,

=

ns

15

ns

390 Il, RL2 not connected,

8

ns

= 30 pF,
= 1.6 kll,

17

ns

20

ns

40

ns

17

ns

15

ns

T/R at 0.8 V, CL

0, RL 1

=

5 pF,
18

=

390 11, RL2

Bn at 0.8 V, T/R at 0.8 V, CL

=

=

390 11, RL2 not connected,

= 30 pF,
= 1.6 kll,
=

5 pF,

See Figure 5
Bn at O.B V, T/R at O.B V, CL

CS

An

T/R

An

T/R

An

T/R

An

T/R

An

Bn

An or Rn

VL = 0, RL 1 not connected, RL2
See Figure 5

CS at 0.8 V, VUAn,Bnl = 2 V, VL = 5
RL 1 = 390 Il, RL2 not connected,
CL = 5 pF, See Figure 3
CS at 0.8 V, VIIAn,Bn) = 2 V, VL = 5
RL1 = 390 Il, RL2 = 1.6 kll,
CL = 30 pF, See Figure 3
CS at 0.8 V, VUAn,Bn) = 0, VL = 0,
RL 1 = 390 Il, RL2 not connected,
CL = 5 pF, See Figure 3
CS at 0.1i V, VUAn,Bnl = 0, VL = 0,
RL 1 not connected, RL2 = 1.6 kll,
CL = 30 pF, See Figure 3
CS at 0.8 V, T/R at 0.8 V,
See Figure 6

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 865303. DALLAS, TEXAS 75266

V,

V,

3

ns

2-653

SN75ALS057
TRAPEZOIDAL·WAVEFORM INTERFACE BUS TRANSCEIVER
switching characteristics over recommended ranges of operating free-air temperature and Vee (unless
otherwise noted)
driver
PARAMETER
Propagation' delay time,
tPLH
low-to-high-Ievel output
Propagation delay time,
tpHL
high-to-Iow-Ievel output

FROM
(INPUT!

TO
(OUTPUT)

On or En

Bn

Propagation delay time,
low-to-high-Ievel output
Propagatipn delay time,
tpHL
high-to-Iow-Ievel output

TEST CONDITIONS

tPLH

TE

=

On, En,

Bn

=

RLl

2 V,
See Figure 2

2 V,

FiE at

2 V,

18 II,

tTHL

low-to-high-Ievel output
Transition time,
high-to-Iow-Ievel output

FiE at

Bn

On or En

2 V,

TE at O.B V,

VL = 2 V,
See Figure 2

UNIT

ns
18
24

VL = 2 V,
See Figure 2

Transition time,
tTLH

MAX
19

FiE at

TE at 0.8 V,
VL

TYpt

MIN

ns
20
1

3

'11

1

3

6

ns

receiver
PARAMETER
tpLH
tpHL

tPL2

Propagation delay time,
low-to-high-Ievel output
Propagation delay time,
high-to-Iow-Ievel output
Output disable time
from low level

FROM
(INPUT)

TO
IOUTPUT)

Bn

Rn

V, TE at 2 V,

Bn at 2 V,

FiE

TE at 2 V,

CL = 5 pF, RL1 = 390 II,
RL2 not connected,
Bn at 2 V, TE at 2 V,

Rn

FiE

Rn

tpHZ

Output disable time
from high level

CL = 30 pF, RL1 = 390 II,
See Figure 5
Bn at 0.8 V, TE at 2 V,

FiE

Rn

CL = 5 pF, RL1 = 390 II,
RL2 not conhected,
Bn at 0.8 V, TE at 2 V,

Output enable time

Receiver noise rejection
twINR)'pulse duration

UNIT

See Figure 4

ns
18

Output enable time
to low level

to high level

MAX
18

FiE at 0.8

tpZL

tPZH

MIN

TEST CONDITIONS

FiE

Rn

Bn

Cn

FROM
(INPUT)

TO
IOUTPUT)

On

Rn

CL

VL

=

5 V,
18

n.

15

ns

17

ns

17

n.

See 'Figure 5
VL - 5 V,
RL2 1.6 kll,
VL - 0,
See Figure 5
VL - 0,

=

30 pF, RL 1 not connected,
See Figure 5
RL2 = 1.6 kll,
TE at 2.0 V, FiE at 0.8 V,
See Figure 6

3

ns

driver plus receiver
PARAMETER
tpLH
tpHL

TEST CONDITIONS

Propagation delay time,
low-to-high-Ievel output
Propagation delay time,
high-to-Iow-Ievel output

MAX

UNIT

40

tAli typical values are at VCC = 5 V, TA

FiE at 0.8

V, TE at O.B V, See Figure 7

ns
40

=

25°C.

TEXAS •
INSTRUMENlS
2-654

MIN

POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
PARAMETER MEASUREMENT INFORMATION

SN75ALS056
OR
SN75ALS057

Vo
IBn)

FIGURE 1. DRIVER LOW-LEVEL-OUTPUT-VOL TAGE TEST CIRCUIT

18 !l
VIICS.TE.An.Dn,En)------I

SN75ALS056
OR
SN75ALS057

1--_._.....-

Vo

IBn)

1 3 0 pF (INCLUDES JIG CAPACITANCE)

TEST CIRCUIT

{

3V----

ICS,TE)

..

ov

t

1 . 5V

I

tpLH-+/

IAn. On, En) : : _ _ _

~~~

I+-

VOH VOL

-

-

-

-+I

I+-

i

I

I
I

I

I
I

1. 5V

--1:~

1.55 V
10%

I

tPHL-+I

I

tPLH-+i

VOIBn)

1.5V\

I
l+-

I

tPHL-+t

90 %

I
I
~tTLH

I

90%~.55V
I

tTHL~

10%

~

VOLTAGE WAVEFORMS
NOTE: t,

= tf

'" 5 ns from 10% to 90%

FIGURE 2. DRIVER PROPAGATION DELAY TIMES

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75285

2-655

SN75ALS056, SN75ALS057
TRAPEZOIDAL·WAVEFORM INTERFACE BUS TRANSCEIVERS
PARAMETER MEASUREMENT INFORMATION

VUTlR)----r----,
t=~~-4--- 50ns
318 mVto 1315 mV, tw < 130 ns
318 mV to 1315 mV, tw > 175 ns

PREVIOUS RXEN
L
X
H
X

OUTPUTS
RXEN
RXO
L
H
H
L
H
H
L
H

DRIVER FUNCTION TABLE

LOOJi TXI
L
H
~

L
H < 200ns
H>8,..
L
H < 200 ns
H < 200ns
H>8,..
L

TXEN
L
L
H
H
H
H
L> 8 ~s
L>8,..
L<200ns
L<200ns
L<200ns

H

PREVIOUS TXO
IDLE
IDLE
IDLE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE

OUTPUTTXO
IDLE
IDLE
L
L
H
IDLE
IDLE
IDLE
H
IDLE
L

H = VI '" VT max, L = VI s VT min

TEXAS ."

2-660

INSTRUMENlS
POST OFFICE BOX 855303 • DALLAS, TeXAS 75265

SN75ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER
logic diagram (positive logic)

RXll

--.~{y----r,

~1~~-Y~~~~./

RXOl

f--.""::":-TXOl

TXll

r--------4--~ b~~=-TXDl

RX02

RXI2-:1",7~-"II{y-_ _-I

RXEN2

~2~1~64-~~~~~/
+

225 mV
f - _ - e....1:...:4_ TXD2

~1D-~~~13~TX02

TEXAS ~

INSTRUMENlS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-661

SN75ALS085
LAN ACCESS UNIT INTER~ACE DUAL DRIVER/IIECEIVER
LOOP FUNCTION TABLE
INPUTS

OUTPUTS

mms1

amJ52

TXI1

TXEN1

RXI1

RXI2

RX01

RX02

RXEN1

RXEN2

TX01

L

L

L

X

L

L

L

L

H
H
H
L
L
L
H

H
X
L
H
X
L
H
X
NORMAL

H
H
L

H
H
NORMAL
NORMAL
NORMAL
L
H
H
NORMAL

H
H
L
H
H
L
NORMAL
NORMAL
NORMAL
NORMAL

H
H
L
NORMAL
NORMAL
NORMAL
H
H
L
NORMAL

IDLE

L

X
X
X
NORMAL
NORMAL
NORMAL
X
X
X
NORMAL

L

L

H
H

L
L

H
H
H
H

L

H
H
L
H
H
L
NORMAL

X
X
X
X
X
NORMAL
NORMAL
NORMAL
NORMAL

H
H
NORMAL
NORMAL
NORMAL
NORMAL

H = high level, L = low level, X = don't care

schematics of inputs and outputs
RXI AND RXI INPUTS

LOOP AND TXEN INPUTS

Vee

Vee
20 kll

LOOP
AND--'~H

TXEN

TXIINPUTS

RXO AND RXEN OUTPUTS

Vee

Vee
50 II

RXO

....--.1--- RXEN
AND

TEXAS ."

INSTRUMENTS
2-662

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

IDLE
IDLE
IDLE
IDLE
IDLE
IDLE
IDLE
IDLE
NORMAL

SN75ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVERIRECEIVER

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6 V
TXI and LOOP input voltage .................................................. 5.5 V
TXO and TXO output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 16 V
RXI and RXI input voltage ................................................... , 16 V
RXO and RXEN output voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ...... 5.5 V
Continuous total power dissipation at (or below) 25°C (see Note 2) . . . . . . . . . . . . . . . .. 1250 mW
Operating free-air temperature range .................................... " ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . .. 260°C
NOTES: 1. Voltage values are with respect to network ground terminal.
2. For operation above 25·C free-air temperature, derate linearly to 800 mW at 70·C at the rate of 10 mW/·C.

recommended operating conditions
MIN
4.75

Supply voltage, VCC
Common-mode voltage at RXI inputs, VIC
Differential voltage between RXI inputs, VID
High-level input voltage, rnl5P and TXEN, VIH

1
±318
2

NOM
5

MAX
5.25
4.2
±1315
0.8
-0.4

Low-level input voltage, [(j(jp and TXEN. VIL
High-level output current, RXO and RXEN, IOH
Low-level output voltage. RXO aM RXEN. IOL
Setup time, Driver mode, TXEN high before TXIJ., tsul Isee Figure 8)
Setup time, Loop mode, LOOP low before TXENt. tsu2 (see Figure 10)
Setup time, Loop mode, TXEN high before TXIJ., tsu3 (see Figure 10)
Hold time. Loop mode, TXEN high after TXlt, th 1 (see Figure 9)
Hold time, Loop mode, LOOP low after TXENJ., th2 (see Figure 9)
Operating free-air temperature, T A

16
10
15
10
;0
15
0

70

UNIT
V
V
mV
V
V
mA
mA
ns
ns
ns
ns
ns
·C

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-663

SN75ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER
electrical characteristics over recommended ranges of operating free-air temperature and supply voltage
(unless otherwise noted)
VIK

VT

PARAMETER
Clamp voltage at all inputs

TEST CONDITIONS
MIN
11= -18 mA
VCC = 4.75 V 3.202
TA = ooC
3.389
VCC = 5 V
VCC = 5.25 V 3.577
VCC = 4.75 V 3.213
3.400
TA = 25°C
VCC = 5 V
VCC = 5.25 V 3.588

Driver input (TXIl threshold voltage

TA = 70°C
VIDT

VCC - 4.75 V 3.239
3.426
VCC = 5 V
VCC = 5.25 V 3.614

Receiver differential input threshold voltage

TXEN at 0.8 V. WOPI at 2 V.
WOP2 at 2 V. See Figure 1

Idle

MAX

UNIT

-1.5

V

3.752
3.998
4.244
3.797
4.043

V

V

4.289
3.849
4.095
4.341
-275

1

4.2

V
mV

TXEN at 2 V. IQOl51 at 2 V.
VOC

Driver output (TXO) common-mode

Active

LOOP2 at 2 V. TXI at 3.2 V.
See Figure 1
TXEN at 2 V. LOOPI at 2 V.

1

4.2

Active

LOOP2 at 2 V. TXI at 4.4 V.
See Figure 1
TXEN at 0.8 V. LOOPI at 2 V.

1

4.2

voltage

Idle

VOO

Driver output (TXO) differential
voltage

VOH

High-level output voltage

VOL

Low-level output voltage

IIH

High-level input current

WOP2 at 2 V. See Figure 1
TXEN at 2 V. LOOPI at 2 V.
WOP2 at 2 V. TXI at 3.2 V.

Active

IlL

Low-level input current

±40

-600

-1315

1315

See Figure 1
TXEN at 2 V. LOOPI at 2 V.
Active

LOOP2 at 2 V. TXI at 4.4 V.
See Figure 1

600

RXO. RXEN
RXO. RXEN
TXEN. WOP
TXI

IOH - -0.4 mA
10L = 16 mA
VI = 2 V

2.4

RXI. RXI
TXEN.WOP
TXI

RXi.

RXI

100

Driver differential output current

Idle

lOS

Short-circuit output current t

RXO. RXEN

ICC

Supply current

Vo at 0 V. RXi at 3 V. RXI at 2 V
LOOP at 2 V. TXEN at 2 V.
TXI at 4_5 V. Outputs open

400
1000
-200

TEXAS ."

2-664

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

V

!IA

4

100
10
1000
±4

mA

-40

-150

mA

225

mA

tNot more than one output should be shorted at a time. and the duration of the test should not exceed 1 second.

INSTRUMENTS

mV

V
0.5
20

VI - 4.5 V
VIO = -0.5 V. VIC = 1 V to 4.2 V
VI = 0.8 V
VI - 3.1 V
VI = 0.3 V
VID = 0.5 V. VIC = 1 V to 4.2 V
TXEN at 0.8 V. "COOPI at 2 V.
LOOP2 at 2 V. See Figure 2

V

!IA

SN75ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVERIRECEIVER
electrical characteristics over recommended ranges of operating free-air temperature and supply voltage
(unless otherwise noted) (continued)
TEST CONDITIONSt

PARAMETER

TXO shorted to

MIN

'i'XO,

Current measured in short

150
150

Current measured at 'i'XO
TXO at 0 V, Tlrn at 0 V,
Current measured at TXO and
TXO at 16 V, 'i'XO is open,

'i'XO

'i'XO

Current measured in short
RXI at 0 V, RXI is open,

150
10

3

Current measured at RXI
RXI is open, RXI at 0 V,

3

Current measured at RXI
RXI at 0 V, RXT at 0 V,
Current measured at RXI and RXI
RXI at 16 V, RXI at open,
Current measured at RXI
RXI at open,
at 16 V,

mu

3

mA

10
10

Current measured at RXI
RXI at 16 V, RXI at 16 V,
Current measured at RXI and

mA

150

Current measured at TXO
TXO at 16 V, 11m at 16 V,
Current measured at TXO and
RXI shorted to

Receiver fault condition current

150
150

Current measured at TXO
TXO is open, Tl(Q at 16 V,

mu,

UNIT

150

TXO at 0 V, 'i'XO is open,
Current measured at TXO
TXO is open, 'i'XO at 0,

Driver fault condition current

MAX

RXT

10

tFault conditions should be measured on only one channel at a time.

TEXAS ."

INSlRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-665

SN75ALS085
LAN ACCESS UNIT INTERFACE· DUAL DRIVER/RECEIVER
switching characteristics over recommended ranges of operating free-air temperature and Vee (unless
otherwise noted)
driver
PARAMETER
tpLH

FROM
(INPUT)

(OUTPUT)

TXI

TXo,TlW

TXEN at 2 V, See Figure 3

15

ns

TXI

TXO, "i'XO

TXEN at 2 V, See Figure 3

15

ns

25

ns

25

ns

Propagation delay time,
low-to-high level output
Propagation delay time,

tPHL
tplL
tPIL

high-to-Iow level output

Vu

idle-ta-Iow level output
Propagation delay time,
idle-to-Iow level output

Propagation delay time,
high-to-idle output
Driver output
differential undershoot

Driver caused signal skew
tskew (tpLH - tpHL)
tr

Rise time, TXO,

tf

Fall time, TXO,

TEST CONDITIONS

MIN

MAX

UNIT

,

Propagation delay time,

Propagation delay time,
tpH70 high-to-70% level output
tpHI

TO

TXI

TXO,"i'XO

TXEN at 2 V, See Figure 4

TXEN

TXO,"i'XO

TXI at 3.2 V, See Figure 5

TXI

TXo,TlW

TXEN at 2 V, See Figure 6

200

TXEN

TXO,"i'XO

TXI at 4.4 V, See Figure 7

200

ns

TXI

TXO,Tlrn"

TXEN at 2 V, See Figure 6

200

8000

TXEN

TXO,"i'XO

TXI at 4.4 V, See Figure 7

200

8000

TXI

TXO,"i'XO

TXEN at 2 V, See Figure 6

TXI

TXO,"i'XO

TXEN at 2 V, See Figure 3

TlW
'nrn"

-100

ns
mV

±3

ns

TXEN at 2 V, See Figure 3

1

5

ns

TXEN at 2 V, See Figure 3

1

5

ns

MIN

MAX

receiver
PARAMETER
Propagation delay time,
tPLH
tpHL
tpLH
tpHL

low-to-high level output
Progagation delay time,
Start-up delay time,
low-to-high level output
Shutdown delay time,
high-to-Iow level output

Receiver caused signal
tskew skew (tPLH - tpHLi
tw
tw

RXi and

TO
(OUTPUT)

iiXI, RXI

RXO

RXi,

high-to-Iow level output

Pulse duration at

FROM
(INPUT)

RXI

RXO

iiXI, RXI

RXEN

iiXI, RXI

RXEN

RXi,

RXO

RXI

TEST CONDITIONS
VIC - 1 V to 4.2 V,
See Figure 11
VIC
VIC
VID
VID
VIC
VID

Pulse duration at RXI and RXI

VID
VIC

trl

Rise time, RXO

tr2

Rise time, RXEN

til

Fall time, RXO

tf2

Fall time, RXEN

tvaiid RXO valid after RXEN high

=
=

1 V to 4.2 V,
-500 mV, See Figure 13

VIC - 1 V to 4.2 V,

VIC

(to activate squelch)

1 V to 4.2 V,

See Figure 11

RXI

(to not activate squelch)

=

VID

= 500 mV, See Figure 13
= 1 V to 4.2 V,
= 500 mV, See Figure 11
= 1 V to 4.2 V,
= -175 mV, See Figure 12
= 1 V to 4.2 V,
= - 275 mV, See Figure 12

VIC - 1 V to 4.2 V,
VIO
VIC
VID
VIC
VIO

=
=
=
=
=
=

± 500 mV, See Figure 11
1 V to 4.2 V,
±600 mV, See Figure 13
1 V to 4.2 V,
± 500 mV, See Figure 11

VIC
2.5 V, VIO
See Figure 1 3

=

See Figure 11

TEXAS . "

INSfRUMENTS
2-666

POST OFFICE BOX 655303 • DAl.LAS, TEXAS 75265

±500 mV,

130

UNIT

15

ns

15

ns

50

ns

175

ns

±3

ns

25

ns
50

ns

1

8

ns

1

8

ns

1

8

ns

1

8

ns

-10

15

ns

SN15ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER
switching characteristics over recommended ranges of operating free-air temperature and
otherwise noted)

Vee (unless

loop
PARAMETER

Propagation delay time.
tPLH
tpHL

low·to-high level output
Propagation delay time.
high-to-Iow level output
Propagation delay time.

tPLH
tpHL

low-to-high level output
Propagation delay time.
high-to-Iow level output

FROM

TO

(INPUT)

(OUTPUT)

TXI

RXO

TXI

RXO

TXEN

RXEN

TXEN

RXEN

TEST CONDITIONS

MIN

LOOP at O.B V. TXEN at 2 V.
See Figure 14

MAX

UNIT

30

n.

30

ns

LOOP at O.S V. See Figure 15

50

ns

LOOP at O.S V. See Figure 15

50

ns

LOOP at O.B V. TXEN at 2 V.
See Figure 14

PARAMETER MEASUREMENT INFORMATION

TXI

=

~l
lf~'OO
FIGURE 2

FIGURE 1

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS, TEXAS 76265

2-667

SN75ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER
PARAMETER MEASUREMENT INFORMATION

11{l3kO
L--.______------~ ~ 3kO

TXI

~25PF

TEST CIRCUIT

_TX_I_ _ _

.J~50%
M-

tPLH-.j

i-----:.:

50%

/4- tpHL

-.!

t:-90,..,%.,....-:9,."0.,,,%"K~-" -

TXO

)10 V

10%

-----1 I
~

~tr

0 V

I 1

---+f

-

- VOD +

10%

J4-tf

VOLTAGE WAVEFORMS
TRANSFORMER SPECIFICATIONS
Turns Ratio
Magnetizing Inductance
Winding Resistance
Rise Time 10% to 90%
Interwinding Capacitance
Leakage Inductance

26 to 30 pH
0.60 Max
5 ns Max
25 pF
0.25 pH Max

1:1

Inductive Q

1250 Min

FIGURE 3

TEXAS ."

INSTRUMENTS
2-668

V

POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

VOD-

SN75ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER
PARAMETER MEASUREMENT INFORMATION

IIfl
'---..--4It----~-' I

3kO

TXI

3kO

TEST CIRCUIT

t See Figure 3

.

TXI _ _ _""

45V

\-;O~---

I·

~tPIL

3 V

TXO~~--IDLE

90%~VOD_
VOLTAGE WAVEFORMS
NOTE: Input tr :S 5 ns from 10% to 90%; tf :S 5 ns from 90% to 10%

FIGURE 4
TXEN

IIfl
~~-~~--~~ I
390

TXI

VOD

0.01 p.F

3kO

~

390

3kO

-::;r 25 pF

TEST CIRCUIT
tSee Figure 3
2V

TXEN

(~~ _ _ _ 0.8V
~tPIL

TXO~~--

IDLE

9 0 % ' " - - VOD-

VOLTAGE WAVEFORMS

FIGURE 5

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-669

SN75ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER
. PARAMETER MEASUREMENT INFORMATION

11[13kO

TXI

L--e--~~----~~ ~3kO
tSee Figure 3

TEST CIRCUIT

~_9~ _ _ ~ _ _ _ _ _ _ _ : :V

Ie- tPH70---.j
~

TXO

tt

tpHI :

_-L--~--VOH

70%
_ ~VU
- - - - - - - - - - - - VOL
VOLTAGE WAVEFORMS

NOTE: Input tr :S 5 ns from 10% to 90%; tf :S 5 ns from 90% to 10%

FIGURE 6
TXEN

TXI

TEST CIRCUIT

t See Figure 3

TXEN~O%--

----------2 V

I

O.BV

~tpH70 ---tI

14

:

tpHI~

~-------...!.--VOD+

/
T X O - - - J.

'

1--70%1

------ -

VOLTAGE WAVEFORMS

FIGURE 7

TEXAS

~

INSTRUMENTS
2-670

POST OFFICE BOX 655303 • eALlAS. TeXAS 75265

~

---VOD-

SN75ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER
PARAMETER MEASUREMENT INFORMATION

____..It50~ _____

TXEN

TXI

,..------ 2 V
0.8V

~tsu1

------....,VO;;- - - -

4.5 V

.....
·----3V
NOTE: Input tr S 5 ns from 10% to 90%; tf S 5 ns from 90% to 10%

FIGURE 8

TXI
TXEN

---t.:::.-:.. _______

~5V

3 V

~th1
___
--..+ _______ 2V
\50%

I

0.8 V

j4-th2~

I

r
---------'

y::::--I 2 V
50 %
-

-

-

0.8 V

NOTE: Input tr S 5 ns from 10% to 90%; tf S 5 ns from 90% to 10%

FIGURE 9
- - -....

--------2V

\50%

I

0.8 V

J+-III- tsu2

1

1, . . - - - - - - 2 V

____-J+ 50%
_ - - -,...... TXEN

0.8 V

I4--tsu3~

I
- - - - - - - -......{-5;%

T~

4.5 V

~3V

NOTE: Input tr S 5 ns from 10% to 90%; tf S 5 ns from 90% to 10%

FIGURE 10

TEXAS ~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-671

SN75ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER
PARAMETER MEASUREMENT INFORMATION
, - - - . . - -.......-

RXEN

20 pF

6 kll

>--..--.......-

RXO

RXI
20 pF

TEST CIRCUIT

-I. - - - - - - -\- - - -

----1V
0 V
1V

RXI-----~\- _
- - _ _J·I
~,

RXEN _ _ _ _ _ _

..JI:~O~

Ivalid

-to!

;+-

I,

+_-___ --:-___
..;...r
I

-

I

;..I- IpLH

---! I ~ Ir

RXO-------_~I
1.3 V

1.3 V

90%

--II ..... If

90%

VOLTAGE WAVEFORMS
NOTE: Inpullr s 5 ns from 10% 10 90%; If s 5 ns from 90% 10 10%

TEXAS .."

2-672

INSTRUMENTS
POST OFFice BOX 655303 • DALLAS. TEXAS 75265

VIL

IpHL

10%

FIGURE 11

VOH

~;:I-.f.- VOH

10%.

I 1.3 V

VOL

SN75ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER
PARAMETER MEASUREMENT INFORMATION

,---......----<.-6kll

RXEN

20pF

-=-

RXI

RXO
RXI

TEST CIRCUIT
RXI

,If

~40mv

-40mV

OV

i - - - VIO

I

~tw~

c=::~

RXEN

VOLTAGE WAVEFORMS

FIGURE 12
RXEN
20 pF

6 kll

-=-

RXI

RXO
RXI

TEST CIRCUIT

1V

RXI~ -40 mV

/,0 V

I'
I*- tpLH --.I

'T - - - - - -

I

AII

10%
RXEN----~I

--.t

-

-1 V

.J

I _

tPHL ---.,

90%

~ tr2

VOH
90%~1
I-10%
I I
VOL
-.I I+- tfz

VOLTAGE WAVEFORMS
NOTE: Input tr S 5 ns from 10% to 90%; tf S 5 ns from 90% to 10%

FIGURE 13

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-673

SN75ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER
PARAMETER MEASUREMENT INFORMATION

1.

TXI~.

{ ,lr---

,50%

4.5V

7:50%

1'---.--_-'~------3V

toI----*- tpLH

tpHL --!f---+I
RXO

,1.3 V

1.3 V.

VOH

----VOL

NOTE: Input tr :S 5 ns from 10% to 90%; tf :S 5 ns from 90% to 10%

FIGURE 14

II

'"5-0%----5-0.....
%\

I

tpLH

-

-

-

2 V

I ' - - - - 0.8 V

TXEN _ _ _..J.

I

~
~ t.-tPHL
1 ,..----;.:....,.+_ - -

!1.3V
RXEN - - - - - - - ' .

1.3V

VOH

~
~VOL

NOTE: Input tr :S 5 ns from 10% to 90%; tf :S 5 ns from 90% to 10%

FIGURE 15

TEXAS ."

INSTRUMENTS
2-674

POST OFFice BOX 655303 • DALLAS. TeXAS 75265

SN75ALS121
DUAL LINE DRIVER
D1334, SEPTEMBER 19B7-REVISED AUGUST 1989

•

Permits Digital Data Transmission over
Coaxial Cable, Strip Line, or Twisted Pair

•

Operates with 50-0 to 500-0 Transmission
Lines

•

TTL-Compatible with 5-V Supply

•

2,4-V Output at IOH -

•

Uncommitted Emitter-Follower Output
Structure for Party-Line Operation

D OR N PACKAGE
(TOPVIEWI

1A
1B
1C
10

1E
1F
1Y
GND

- 75 mA

•

IMPACT'" Low-Power Schottky Technology

•

Improved Replacement for the SN75121
and Signetics 8T13

•

Glitchless Power-Up/Power-Down

•

Short-Circuit Protection

•
•

VCC
2F
2E
2D
2C
2B
2A
2Y

FUNCTION TABLE
INPUTS
A

B

C

H

H

H

X

X

X

D
H
X

OUTPUT
E

F

Y

X

X

H

H

H

H

All other input combinations

AND-OR Logic Configuration

L

H = high level
L = low level
X = irrelevant

High Speed ... Maximum Propagation
Delay Time of 14 ns at CL - 15 pF

description
The SN75ALS'121 dual line driver is designed for digital data transmission over lines having impedances
from 50 to 500 O. It is compatible with standard TTL logic and supply voltage levels.
The low-impedance emitter-follower outputs drive terminated lines such as coaxial cable, strip line, or twisted
pair, Having the outputs uncommitted allows wired-OR logic to be performed in party-line applications.
Output short-circuit protection is provided by an internal clamping network that turns on when the output
voltage drops below approximately 1.5 volts. All inputs are in conventional TTL configuration. Gating can
be used during power-up and power-down sequences to ensure that no noise is introduced on the line.
The SN75ALS 121 employs the IMPACT'" process to achieve fast switching speeds, low power dissipation,
and reduced input current requirements.
The SN75ALS121 is characterized for operation from O°C to 70°C.

IMPACT is a trademark of Texas Instruments Incorporated

PRODUCTION DATA doc.mants contain information
curralt IS of publication data, Prod.cts conform to
opacification. par die terms .f T..a. Instrumants

:=~;·r::1~7i =~:~Ii:: :.r:::~":t:~~ nol

Copyr,ight @ 1989. Texas Instruments Incorporated

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303. DALLAS. TEXAS 75265

2-675

SN75ALS121
DUAL LINE DRIVER
logic diagram (positive logic)

logic symbol t
&

1A
1C
10
1E

::~
~~=

;,,1t>

2

1B

3

~

4

5

7 1Y

7

&

1F 6
10
2A
11
2B
12
2C
13
20
14
2E
15
2F

1E

5

1F

6

2A....;.;~

_ _...

28
2C

9 2Y

20......!li!.-~-'

2E
2F

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and lEe Publication 617-12.

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF All OUTPUTS

vcc---------------e-----

-1~--.-----------VCC

INPUT--...- -.....-----i

---........- - - - - Y OUTPUT

GNO--~----~~--~~-----

---~--~~--GNO

.

"'/~

TEXAS ~
INSTRUMENTS
2-676

POST OFFICE BOX 665303 • DALLAS, rexAS 752615

tv

SN75ALS121
DUAL LINE DRIVER

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6 V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6 V
Continuous total dissipation at (or below) 25°C free air temperature (see Note 2):
D package ......................... ;............................... 950 mW
N package ........................................................ 11 50 mW
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260°C
NOTES:

1. All voltage values are with respect to network ground terminal.

2. For operation above 25°C free-air temperature, derate the 0 package linearly to 608 mW at 70°C at the rate of 7.6 mW/oC
and the N package to 736 mW at 70 0 e at the rate of 9.2 mW/oe.

recommended operating conditions
Supply voltage, Vee
High-level input voltage, VIH

MIN

NOM

MAX

UNIT

4.75

5

5.25

V
V

2

Low-level input voltage, VIL

High-level output current, 10H
Operating free-air temperature range, T A

0

0.8

V

-75

rnA

70

°e

electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted)
PARAMETER

TEST CONDITIONS

MIN

VIK

Input clamp voltage

Vee = 5 V,

11= -12 rnA

VIBRII

Input breakdown voltage

Vee = 5 V,

11= 10 rnA

VOH

High-level output voltage

VIH = 2 V,

10H = -75 rnA,

See Note 3

10H

High-level output current

Vee = 5 V,

VIH = 4.5 V,

VOH = 2 V,

TA = 25°e,

See Note 3

10L

Low-level output current

VIL = 0.8 V,

VOL = 0.4 V,

10loffi

Off-state output current

Vee - 3 V,

Va - 3 V

IIH

High-level input current

IlL

Typt

MAX

UNIT

-1.5

V

5.5

V

2.4

3.2

-100

-200

V
-250

rnA

-800

~A

500

~A

VI = 4.5 V

40

~A

Low-level input current

VI = 0.4 V

-250

~A

lOS

Short-circuit output current

Vee - 5 V

-30

rnA

leeH

Supply current, outputs high

Vee = 5.25 V,

All inputs at 2 V,

No load

9

14

rnA

leeL

Supply current, outputs low

Vee = 5.25 V,

All inputs at 0.8 V,

No load

13

30

rnA

See Note 3

-5

t All typical values are at Vee = 5 V and T A = 25°e.
NOTE 3: The output voltage and current limits are ensured for any appropriate combination of high and low inputs specified by the function
table for the desired output.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 15265

2-677

SN76ALS121
DUAL LINE DRIVER
switching characteristics over recommended ranges of supply voltage and operating free-air temperature

tPLH
tpHL
tpLH
tpHL

PARAMETER
Propagation delay time,
low-to-high-Ieval output
Propagation delay time,
high-to-Iow-Ievel output
Propagation delay time,
low-to-high-Ievel output
Propagation delay time,
high-to-Iow-Ieveloutput

t All typical values are at VCC

TEST CONOITIONS

RL

RL

= 37O,

CL

= 37 (I,

CL

= 15 pF,

MIN

TVP

MAX

6

14

ns

4

14

ns'

18

30

ns

29

50

ns

See Figure 1

= 1000 pF,

See Figure 1

= 5 V and TA = 2SoC.
PARAMET~R M~ASUREMENT
3V

INFORMATION

Vcc

.-:- ___ 1_,

PULSE
GENERATOR r--.."...,,""--,-_
(See Note A)

I
~~e_--~---OUTPUT

CL
(See Note B)

TEST CIRCUIT

--.: I-- s
I
:

INPUT
10%

-+I

5 ns

90%

90%
1.5 V

-,...-3V

I

:

I~1~O.:;%;,.-

__O V

I

tPLH"'I4If--"'~"

tPHL~

I

y.S

OUTPU_T_ _ _ _

I4-s 5 ns

I_L_

1.5 V

:
I

I

1.5X---

VOH

V
-LVOL

VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: Zo
B. CL includes probe and jig capacitance.

= 50 0, tw = 200 ns, duty cycle = 50%.

FIGURE 1, SWITCHING CHARACTERISTICS

TEXAS •

2-678

UNIT

INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 15265

SN75ALS121
DUAL LINE DRIVER
TYPICAL CHARACTERISTICS
OUTPUT CURRENT
vs
OUTPUT VOLTAGE
-300

Vee - 5 V
All inputs at 2 V
-250 TA - 25°e

~

~

I -200

~

<3

-150

I~

\

~ -100

o
I

9
-50

o
o

1
2

3

4

5

YO-Output Voltage-V

FIGURE 2

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

.2-679

2-680

SN75ALS123
DUAL LINE DRIVER
01332. SEPTEMBER 1987-REVISEO AUGUST 1989

•

o OR N PACKAGE

Meets IBM 360 Input Interface
Specifications

(TOP VIEW)

•

Permits Digital Data Transmission over
Coaxial Cable. Strip Line. or Twisted Pair

•

TTL-Compatible with 5-V Supply

1A
18
1C
10
1E

•

3.11-VOutputatIOH -

•

Uncommitted Emitter-Follower Output
Structure for Party-Line Operation

•

IMPACT'" Low-Power Schottky Technology

•

Improved Replacement for the SN75123
and Signetics 8T13

-59.3mA

•

Glitchless Power-Up/Power-Down

•

Short-Circuit Protection

•

AND-OR Logic Configuration

•

High Speed ... Maximum Propagation
Delay Time of 14 ns at CL - 15 pF

2E
20
2C
28
2A
2Y

IF
1Y

GNO

FUNCTION TABLE
INPUTS

OUTPUT

A

B

C

0

E

F

Y

H

H

H

H

X

X

H

X

X

X

H

H

H

X

All other input combinations

= high level

H

L

= low level

L

X = irrelevant

logic symbol t

description
&

The SN75ALS123 dual line driver is specifically
designed to meet the input interface
specifications for the IBM System 360. It is
compatible with standard TTL logic and supply
voltage levels. The low-impedance. emitterfollower outputs drive terminated lines such as
coaxial cable. strip line. or twisted pair. The
uncommitted output allows wired-OR logic to be
performed in party-line applications. Output
short-circuit protection is provided by an internal
clamping network that turns on when the output
voltage drops below approximately 1.5 V. All
inputs are in conventional TTL configuration.
Gating can be used during power-up and powerdown sequences to ensure that no noise is
introduced on the line.
The SN75ALS123 employs the IMPACT'"
process to achieve fast switching speeds. low
power dissipation. and reduced input current
requirements.
The SN75ALS123 is characterized for operation
from OOC to 70°C.

;", t>

lA
18

2

lC 3

~

10 4
IE 5

2E
2F

lY

9

2Y

&

IF 6
2A 10
11
2B
2C 12
20

7

13
14
15

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617·12.

logic diagram. each driver (positive logic)
A_~--...

B
C
0--,,--_,
Y
E

F

IMPACT is a trademark of Texas Instruments Incorporated.

PRODucnON DATA doc.m......ntain information
DU,not I I of p...lcatloo date. P"""'......farm to
spooifi.llio.1 p. th. terms of Tax.. Instrumants

=::i~a[.':t':.1a ~=:~:: 1Ir:::.:1t.~

••

t

Copyright @ 1989, Texas Instruments Incorporated

TEXAS " ,
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75266

2-681

SN75ALS123
DUAL LINE DRIVER
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS

VCC----.......,.-

~~--1~----VCC

17 !l
25 k!l

INPUT-.......--I

- - - 4 - - . ; f - - - - Y OUTPUT

GND-...-e---. .

--------~_e~-GND

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6 V
Continuous total dissipation at (or below) 25°C free air temperature (see Note 2):
D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 950 mW
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 50 mW
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. OOC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . .. 260°C
NOTES:

1. All voltage values are with respect to network ground terminal.
2. For operation above 25°e free-air temperature, derate the 0 package to 608 mW at 70 0 e at the rate of 7.6 mW/oC and
the N package to 736 mW at 70 0 e at the rate of 9.2 mW/oe.

recommended operating conditions
Supply voltage, Vee

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

2

High-level input voltage, VIH
Low-level input voltage, VIL
High·level output current, IOH

0

Operating free-air temperature range, T A

TEXAS •
2-682

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

V

0.8
-100
70

V

rnA
°e

SN75ALS123
DUAL LINE DRIVER
electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted)
V,K

PARAMETER
Input clamp voltage

VlBf!I!

Input breakdown voltage

VOH

MIN

TEST CONDITiONS

VOL

Low-level output voltage
High-level output current

10loffi

Off-state output current
High-level input current

VCC = 5 V,
TA = 25°C,
V,L = 0.8 V,

= 5 V,
= 25°C,

VCC
TA

Low-level input current
Short-circuit output current

ICCH
ICCL

Supply current, outputs high
Supply current, outputs low

=

-59.3 rnA,

V,H = 2 V,
See Note 3

10H

=

-59.3 mA,

10L = - 240 pA,
V,H = 4.5 V,
See Note 3

See Note 2
VOH

= 2 V,

All inputs at 2 V,

UNIT
V
V

5.5
10H

2.9
V
3.11

3.3

-100

-200

0.15

V

-250

rnA

40

pA
pA

40
-250

=5V
= 5.25 V,
= 5.25 V,

VCC
VCC
VCC

MAX
-1.5

Vo - 3 V

VCC - 0,
V, = 4.5 V
V, = 0.4 V

'IH
',L
lOS

TYpt

II

VCC
See Note 3

High-level output voltage

10H

= -12 rnA
" = 10 rnA
V,H = 2 V,

= 5 V,
= 5 V,
= 5 V,

VCC
VCC

No load

All inputs at 0.8 V, No load

-5

-30

pA
mA

9
13

14
30

rnA
rnA

NOTE 3. The output voltage and current limits are ensured for any appropriate combination of high and low inputs specified by the function

table for the desired output.

switching characteristics over recommended ranges of supply voltage and operating free-air temperature
PARAMETER
tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
tPLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output

TEST CONDITIONS
RL
RL

MIN

TYpt

= 600, CL = 15 pF, See Figure 1

4
5

= 500, CL = 100 pF, See Figure

8
8

1

MAX
14
14
20
20

UNIT
ns
ns
ns
ns

tAli typical values are at VCC = 5 V and TA = 25°C.

PARAMETER MEASUREMENT INFORMATION
3V

VCC

r---- L -,,

INPUT

,

-,.;.,;;'0;;'%;;;"'_ _ 0 V

")-I,~t---_-OUTPUT

L ___

-=

-1- J

~Lee

RL

-=

Note

tPLH~-"""~

B~UTPUT

-=

,t

Ie----*-tPHL

1,.,-.5-V---,-.-5....

---~

'0'
VOL

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 1, SWITCHING TIMES
NOTES: A. The pulse generator has the following characteristics: Zo
B. CL includes probe and jig capacitance.

= 50 0, tw = 200 ns, duty cycle = 50%.

TEXAS •

INSTRUMENTS
POST OFfiCE· BOX 856303 • DALLAS, TEXAS 76265

2-683

.SN15ALS123
DUAL LINE DRIVER
TYPICAL CHARACTERISTICS
OUTPUT CURRENT

vs
OUTPUT VOLTAGE
-300

Vee = 5 V
All inputs at 2 V
-250 TA - 25°e

~

1I -200

~

8

1

c5

-150

~

\

-100

I

9
-50

o

o

2

3

4

YO-Output Voltage-V

FIGURE 2

TEXAS •

2-684

INSTRUMENTS
POST OFFICE BOX 666303. DALLAS. TeXAS 75286

5

SN75ALS125, SN75ALS127
SEVEN-CHANNEL LINE RECEIVERS
D2239, APRIL 1987-REVISED AUGUST 1989

•

Meets IBM 360/370 I/O Specification

•

Input Resistance , . , 7 kO to 20 kO

•

Output Compatible with TTL

•

IMPACT'" Low-Power Schottky Technology

•

Operates from Single 5-V Supply

•

High Speed , , , Low Propagation Delay

•

Ratio Specification for Propagation Delay
Time. LOIN-to-High/High-to-Low

•

Glitch-Free Power-Up and Power-Down

•

Seven Channels in One 1 6-Pin Package

•

SN75ALS125, , , D, J, OR N PACKAGE

(TOP VIEWI

lA
2A
3A
4A
5A
6A
7A

lY

Vee
3Y
4Y
5Y
6Y
7Y
2Y

GND

SN75ALS127. , . D, J. OR N PACKAGE

(TOP VIEW)

Vee

lA
2A
3A
4A
5A
6A
7A

Standard VCC and Ground Positioning on
SN75ALS127

description
The SN75ALS 125 and SN75ALS 127 are
monolithic seven-channel line receivers designed
to satisfy the requirements of the IBM System
360/370 input/output interface specifications,
Employing the IMPACT'" process allows low
supply-current requirements while maintaining
fast switching speeds and high-current TTL
outputs,

lY
2Y
3Y
4Y
5Y
6Y
7Y

GND

The SN75ALS125 and SN75ALS127 are
characterized for operation from OOC to 70°C,
logic symbols t
SN75ALS127

SN75ALS125

1
1A
2
2A
3
3A
4
4A
5
5A
6
6A
7
7A

t>

16 1Y
9 2Y
14 3Y
13 4Y
12 5Y
11
6Y
10
7Y

1A
2A
3A

1
2
3

t>

4A 4
5
5A
6
6A
7
7A

-

15
14
13

1Y

2Y
3Y
4Y
5Y
6Y
7Y

tThese symbols are in accordance with ANSI/IEEE Std 91 - 1984 and IEC Publication 617- 12.

IMPACT is a trademark of Texas Instruments Incorporated

PRODUCTION DATA documonts contain information
current 8S of publication data. Products conform to
specifications per the terms of Texas Instruments
:~~~~:~~i~8{::1~1e ~~:~~~i:r :'IO::~:~:t:~~S not

Copyright © 1989, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-685

SN75ALS125, SN75ALS127
SEVEN·CHANNEL LINE RECEIVERS
schematic (each receiver)
COMMON CIRCUITRY

Vcc----------.---~----------_.----------~~----~r-----._.-----------_.-1L+TOOTHER

I

150 Il

NOM

CHANNELS

I

I
I
I

-..-...JIN...--j

INPUT
A

I

12 kll

OU~UT:

I

I

I

NOM

I

I

I

I
I

I

GND~~----~~~--4-~----------~~--~~--~I4-~~----~~ TO OTHER

L-----------------------------~~----------+-~CHANNELS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage range .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - O. 1 5 V to 7 V
Continuous total dissipation at (or below) 25 DC free~air temperature (see Note 2):
D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 950 mW
J package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1025 mW
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 11 50 mW
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ODC to 70 DC
Storage temperature range ......................................... -65 DC to 150 DC
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package. . . . . . . . . . . .. 300 DC
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package. . . . . . . .. 260 DC
NOTES:

1. ~II voltage values are With respect to network ground terminal.

2. For operation above 26·e free·air temperature, derate the 0 package to 608 mW at 70·e at the rate of 7.6 mW/·e, the
J package to 656 mW/·e at 70·e at the rate of 8.2 mW/·e, and the N package to 736 mW at 70·e atthe rate of 9.2 mW/·e.

TEXAS ..,
2-686

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 76266

SN75ALS125, SN75ALS127
SEVEN·CHANNEL LINE RECEIVERS
recommended operating conditions
Supply voltage. Vee
High-level input voltage. VIH
Low-level input voltage. VIL
High-level output current. IOH
Low-level output current, IOl

MIN

NOM

MAX

4.5
1.7

5

5.5
0.7
-0.4

Operating free-air temperature. T A

16
70

0

UNIT

V
V
V
V
mA
·e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
VOH

PARAMETER
High-level output voltage

VOL
IIH

Low-level output voltage
High-level input current

IlL
lOS

Low-level input current

ri

Input resistance

ICC

Supply current

Short-circuit output current:t:

TEST CONDITIONS

= 4.5 V. VIL = 0.7 V.
= 4.5 V. VIH = 1.7 V.
Vee = 5.5 V. VI = 3.11 V
Vee = 5.5 V. VI = 0.15 V
Vee = 5.5 V. Vo = 0
Vee = 4.5 V. O. or open.
Jl.VI = 0.15 V to 4.15 V
Vee = 5.5 V. IOH = -0.4 rnA.
Vee
Vee

10H
10L

= -0.4 mA
= 16 mA

MIN

Typt

2.4

3.1

MAX

UNIT

0.5
0.42

V
mA

-18

30
-60

,.A
mA

7

20

kll

15

25

rnA

28

47

rnA

0.4
0.3

All inputs at 0.7 V
Vee = 5.5 V. IOL
All inputs at 4 V

=

16 rnA.

V

switching characteristics over recommended operating temperature range (unless otherwise noted),

Vee = 5 V
tpLH
tpHL

PARAMETER
Propagation delay time. low-to-high-Ievel output

TEST CONDITIONS

Propagation delay time. high-to-Iow-Ievel output
RL

tpLH
tpHL

Ratio of propagation delay times

tTLH

Transition time, low-to-high-Ievel output

tTHL

Transition time. high-to-Iow-Ievel output

= 400 II.

eL

= 50 pF.

See Figure 1

MIN

TYpt

MAX

7
10

14
18

25
30

0.5

0.8

1.3

1
1

7

12

ns

3

12

ns

UNIT

ns
ns

t All typical values are at Vee = 5 V. TA = 25°C.

*Not more than one output should be shorted at a time.

TEXAS •

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75266

2-687

SN75ALS125, SN75ALS127
SEVEN·CHANNEL LINE RECEIVERS

PARAMETER MEASUREMENT INFORMATION
VCC
RL - 400 II

TEST CIRCUIT

I ~
-+j I '---10 ns
INPUT

II ''~-If
P90%
0.7 V

I

____"' ' '

100 ns ---~--:I>II I
10 ns --+I
'+-90%i[J"1
1.7 V
I

_ _...;1~0.:;;%~ I

I

I
I

I

I

~~P:L!\~

OUTPUT

I

:.5 V

~

10%

0 V

i4"tPLHlf.i- 2 - V - - - - - VOH
1.2 V

I ._ O.BV

-I

- - - - - - - 3V

O.BV

I
1_ _ _ _ _ VOL

-4 \.-

tTHL

tTLH

VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: Zout ~ 50 II, PRR S' 5 MHz.
B. CL includes probe and jig capacitance.
C. All diodes are 1N3064 or equivalent.

FIGURE 1

-If

TEXAS
INSTRUMENTS
2-688

POST OFFICE BOX 855303 • OAUAS. TEXAS 75285

SN75ALS160
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
02525. JUNE 19B6-REVISED AUGUST 1989

MEETS IEEE STANDARD 488-1978 (GPIB)
•

8-Channel Bidirectional Transceiver

•

High-Speed Advanced Low-Power Schottky
Circuitry

•

Low Power Dissipation ... 46 mW Max per
Channel

•

Fast Propagation Times ... 20 ns Max

•

High-Impedance P-N-P Inputs
Receiver Hysteresis ... 650 mV Typ

•

Open-Collector Driver Output Option

•

No Loading of Bus When Device Is Powered
Down (VCC = 0)
Power-Up/Power-Down Protection (GlitchFree)

Vee

TE

01

B1
B2
B3
GPIB
I/O
PORTS

•

•

OW. J. OR N PACKAGE
(TOPVIEWI

B4

02
03
04

B5
B6

05
06

B7
B8
GNO

07
08
PE

FUNCTION TABLES
EACH DRIVER
INPUTS
0 TE PE
H
H H

description
The SN75ALS 160 eight-channel generalpurpose interface bus transceiver is a monolithic,
high-speed, Advanced Low-Power Schottky
device
designed
for
two-way data
communications over single-ended transmission
lines. It is designed to meet the requirements of
IEEE Standard 488-1978. The transceiver
features driver outputs that can be operated in
either the passive-pullup or three-state mode. If
Talk Enable (TEl is high, these ports have the
characteristics of passive-pull up outputs when
Pullup Enable (PEl is low, and of three-state
outputs when PE is high. Taking TE low places
these ports in the high-impedance state. The
driver outputs are designed to handle loads up
to 48 milliamperes of sink current.

TERMINAL

110 PORTS

OUTPUT
B

EACH RECEIVER
INPUTS
B TE PE

OUTPUT
0

H

L

L

X

L

X

L

H

L

X

H

X

L

H

X

Z

X

zt
zt

X

L

L

H

H
X

H = high level, L = low fevel, X = irrelevant,
Z = high-impedance state.
t This is the high-impedance state of a normal 3-state
output modified by the internal resistors to Vee and
ground.

An active turn-off feature has been incorporated
into the bus-terminating resistors so that the
device exhibits a high impedance to the bus
when Vee = O. When combined with the
SN75ALS161 or SN75ALS162 management
bus transceiver, the pair provides the complete
l6-wire interface for the IEEE 488 bus.
The SN 7 5ALS 160 is manufactured in a 20-pin
package and is characterlzed for operation from
ooe to 70 oe.

PRODUCTION DATA ...._
cellllli. i......IIl••
••rrent II " p.bHcetJ•• deta. Prod.oto ••nfonn to

spaoifioationl , . tile _
" Till. 1l1li.......II1II
staadlrd WI.nnty. Prad.ctian ~ing .... l1li
........11' ,...... tlllini of In p.........

Copyright @ 1989, Texas Instruments Incorporated

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 76265

2-689

SN75ALS160
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
logic diagram (positive logic)

logic symbol t

TE

01 119)

02 118)

~==l-~~B3
~
B4

03 117)

B5
B6

04 116)

B7
TERMINAL

B8

GPIB
I/O
PORTS

05 115)
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.
'\l Designates 3-state outputs.
~ Designates passive-pullup outputs.

06 114)

07 113)

08 112)

schematics of inputs and outputs
EQUIVALENT OF ALL CONTROL INPUTS

EQUIVALENT OF ALL INPUT/OUTPUT PORTS

r---..,

Vcc--------~--------

9kn
NOM

Roq

1.7kn
NOM

10kn
NOM

INPUT

------<_

GNO - -....- - - -.....

Driver output Req = 30 Il NOM
Receiver output Req = 11 0 Il NOM
Circuit inside dashed lines is on the driver outputs only.

TEXAS ."

2-690

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76266

SN75ALS160
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCE1VER

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Low·level driver output current ............................................ "
100 mA
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 2):
DW package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1025 mW
J package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1025 mW
N package ......................................................... 1150 mW
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. O°C to 70°C
Storage temperature range ......................................... - 65°C to 1 50°C
Lead temperature 1,6 mm (1/16 inch) from the case for 60 seconds: J package. . . . . . . . .. 300°C
Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds: DW or N package. . .. 260°C
NOTES: 1. All voltage values are with respect to network ground terminal.
2. For operation above 25 °C free~air temperature, derate the OW and J packages to 656 mW at 70°C at the rate of 8.2 mW/oC
and derate the N package to 736 rnW at 70 0 e at the rate of 9.2 rnw/oe.

recommended operating conditions
Supply voltage, Vee

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

2

High-level input voltage, VIH
Low-level input voltage. VIL
High-level output current, IOH
Low~level

output current, IOL

V

O.B
Bus ports with pullups active

-5.2

T ermina1 ports

-BOO
4B

Bus ports

16

Terminal ports

Operating free-air temperature, T A

0

70

V
rnA
~A

rnA
°e

TEXAS . "
INSTRUMENTS
POST OFFiCe BOX 655303 • DALLAS, TEXAS 75265

2-691

SN75ALS160
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted)
PARAMETER

VIK

Hysteresis

Vhys
VOH'
VOL
II

Bus

IVT+ - VT-)
High-level

Terminal

output voltage

Bus

IOH - - 800 p.A,
IOH ~ -5.2 mA,

Low-level

Terminal

IOL

~

16 mA,

TE at 0.8 V

output voltage

Bus

IOL

~

48 mA,

TE at 2 V

Terminal

VI

Input current at
maximum input voltage

IIH

High~level

IlL

Low-level input current

VI/Olbus)

TEST CONDITIONS

input current Terminal,

VI

PE, or TE

VI

Voltage at bus port

~

~

~

TE at 0.8 V
PE and TE at 2 V

Power off

lOS

Short-circuit

Terminal

output current

Bus

0.65

2.7

3.5

2.5

V
V

3.3

5.5 V

0.2

100

p.A

2.7 V
0.5 V

0.1

p.A

-10

20
-100

3.0

3.7

~

Ilibus) ~ 0
Ilibusl ~ -12 mA
~

0.4 V to 2.5 V

2.5

-1.5
0

lee
ei/olbus)

Bus-port capacitance

Vee ~ 5 V to 0,
f ~ 1 MHz

0

2.5

Vllbusl ~ 5 V to 5.5 V

0.7

2.5

~

0 to 2 V,

t All typical values are at Vee ~ 5 V, T A ~ 25°e.
t VOH applies to 3-state outputs only.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

V

2.5
-3.2

VII bus) ~ 3.7 V to 5 V

VI/O

p.A

-3.2

Vllbus) ~ 2.5 V to 3.7 V

ITerminal outputs low and enabled
IBus outputs low and enabled

No load

V

-1.3

Vllbus) ~ 0 to 2.5 V

0,

Supply current

2-692

V

0.4

0.5

Driver disabled

Vee

UNIT

-1.5

0.35

Driver disabled

Power on

MAX

-0.8

0.5

Vllbusl
Current into bus port

TYpt

0.3

Vllbus) ~ -1.5 V to 0.4 V

II/Olbus)

MIN

II ~ -18 mA

Input clamp voltage

40
-15

-35

-75

-25

-50

-125

42

65

52

80

30

mA

p.A
mA
mA
pF

SN75ALS160
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
switching characteristics over recommended range of operating free-air temperature (unless otherwise
noted), Vee - 5 V

tpLH

PARAMETER
Propagation delay time,
low-to-high-Ievel output

tpHL

Propagation delay time,
high-to-Iow-Ievel output

tpLH

Propagation delay time,
low-to-high-Ievel output

tpHL

Propagation delay time,
high-to-Iow-Ievel output

tpZH
tpHZ
tpZL
tPLZ
tpZH
tpHZ
tPZL
tpLZ
ten
!dis

Output enable time to high level
Output disable time from high level
Output enable time to low level
Output disable time from low level
Output enable time to high level
Output disable time from high level
Output
Output
Output
Output

enable time to low level
disable time from low level
pull-up enable time
pull-up disable time

tTypical values are at T A

=

FROM

Terminal

Bus

TE

TO

TEST CONDITIONS

Bus

Terminal

Bus

CL = 30 pF,
See Figure 1

CL = 30 pF,
See Figure 2

CL = 15pF,
See Figure 3

TE

Terminal

CL = 15 pF,
See Figure 4

PE

Bus

CL = 15 pF,
See Figure 5

MIN

TYpt

MAX

7

20

8

20

7

14

9

14

19
5
16

30
12
35

9
13
12

20
30
20

12
11
11

20
20
22
12

UNIT

ns

ns

6

ns

ns

ns

25 ·C.

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-693

SN75ALS160
'OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION

2000

DINPUT f.sv

X.s:---

- - - " ..

3V

\..- - - o v

tpLH~

tpHL~

BOU~UT !1~22--V----------~,\:---VOH

~VOH

.

4800

VOLTAGE WAVEFORMS

TEST CIRCUIT

i"IGURE 1. TERMINAL·TO-BUS PROPAGATION DELAY TIMES

BINPUT fSV

\.:---3V

--Ii"

I'

tpLH~

DOU~UT

OV

tpHL~

Y.-~i~.~-VOH
;1.5
L
V

VOL
VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 2. BUS·TO·TERMINAL PROPAGATION DELAY TIMES

~.sV

'i.s~_---3V

52

480"

tpZH--..j

14-

BOUTPUTI
Slto3V I
SZOPEN I

:

tpHZ-.i

_-------+-w-

0V

O.BV
3.5 V

BOU~UT

51 toGND

I.OV

S2CLOSED

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 3. TE·TO·BUS ENABLE AND DISABLE TIMES
NOTES: A. The Input pulse is supplied by a generator having the following characteristics: PRR s 1 MHz. 50% duty cycle. tr S 6 ns.
tf s6 ns. Zout = 50 O.
B. CL includes probe and jig capacitance.

TEXAS . "

2-694

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 76265

SN75ALS160
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION
~_

J.t·s:___

TE INPUTl''''.5_V_ _ _ _ _ _

DtpZH~,

OUTPUT
SIIo3V

I

SZDPEN

I

tpZL

r'.:

I

tpHZ-t

3V

-0 V

r': __ -VOH
90%

1.5V

---t

I

I
IpLZ~

OV
4V

o OUTPUT
51 to GND

I.OV

S2CLOSED

'_______..I!_0.2':.. _ -VOL

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 4. TE-TO-TERMINAL ENABLE AND DISABLE TIMES

> ........;=.-....----<~-DUTPUT

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 5. PE-TO-BUS PULLUP ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the' following characteristics: PRR :s 1 MHz, 50% duty cycle, tr :S 6 ns,
tf :S 6 ns, Zout = 50 n.
B. CL includes probe and jig capacitance.

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-695

SN75ALS160
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
TERMINAL HIGH· LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
4.0

>I

..

!'
"0
>
...
::J

I

3.5

.........

3.0

t\.

2.0

..J

1.5

.

'\

>

J:.

'"

~

I

::t
0

>

1.0
0.5

o

-5

.

0.4

V

::J

&
::J
0
;;

""'- '"

..

-10 -15 -20

0.3

>

..J

~

0.2

I
0

0.1

0
..J
..J

>

't\.

o

l'!l,
>

o

-25 -30 -35 -40

V

/

o

IOH-High-Level Output Current-rnA

V

./

20

10

4.0
VCC=5V
No load
TA = 25°C

3.5
3.0

I

~

2.5

~...

2.0

9

1.5

~

1.0

i

VT-

VT+

0.5

o
o

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VI-Input Voltage-V
FIGURE 8

TEXAS . .
INSTRUMENTS
2·696

30

FIGURE 7
TERMINAL OUTPUT VOLTAGE
vs
BUS INPUT VOLTAGE

~,

V

./

40

50

IOL -Low· Level Output Current-rnA

FIGURE 6

>

V

J J

VCC=5V
0.5 i---TA = 25°C

l!
"0

,~

&
::J
0
;;

0.6

I

VCC=5V
TA = 25°C -

2.5

TERMINAL LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT

POST OFFIce BOX 655303 • DALLAS. 'tEXAS 76265

60

SN75ALS160
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
BUS HIGH-LEVEL OUTPUT VOLTAGE

vs

BUS HIGH-LEVEL OUTPUT CURRENT

BUS LOW-LEVEL OUTPUT CURRENT

4

~

.."

0.6

I

>I

8.

BUS LOW-LEVEL OUTPUT VOLTAGE

vs

3

VCC=SV
TA=25°C

r--..

>I

""

So

"

0
Ii

...

2

-'

i:

.2'
:I:
I
:I:
0

o

O_S

>

.."

0.4

0

0_3

/V

-10

"\

-20

V
'/

So

"

'\.

...

Ii

~

>

o

..
!

'0

0

>

VCC=SV
TA = 2SoC

-30

-'
~ 0.2
0
-'
I
-'
~ 0.1

~""

-40

/V

V

L

O~-L~~~~

-50

o

-60

V

V

IOH-High-Level Output Current-mA

10

20

30

__~-L__~-L__L-~

40

SO 60

70 80 90 100

IOL -Low-Level Output Current-mA

FIGURE 9

FIGURE 10
BUS CURRENT

BUS OUTPUT VOLTAGE

vs

vs

TERMINAL INPUT VOLTAGE

BUS VOLTAGE

4
VCC= SV'
No load
TA = 2SoC

>I

2

3

8.

J!

.."

'0

>

2

So

90"
>

THE UNSHADED
~I--t-t-t--t'-<' AREA CONFORMS TO
-6
PARAGRAPH 3.S.3 OF
~H-+-+* IEEE STANDARD 488-1978
OL--L__~__L--L__~__L-~~

0.9

1.0

1.1

1.2

1.3

1.4

1.S

1.6

1.7

-1

0

234

S

6

VI/O(bus)-Bus Voltage-V

VI-Input Voltage-V

FIGURE 12

FIGURE 11

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

2-697

2-698

SN75ALS161
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
02618. JUNE 1986-REVISED AUGUST 1989

MEETS IEEE STANDARD 488-1978 (GPIB)
ow. J, OR N PACKAGE

•

8-Channel Bidirectional Transceiver

•

Designed to Implement Control Bus
Interface

•

Designed for Single Controller

•

High-Speed Advanced Low-Power Schottky
Circuitry

•
•

(TOP VIEWl
TE
REN
lFC

Low-Power Dissipation . . . 46 mW Max per
Channel

High-Impedance P-N-P Inputs

•

Receiver Hysteresis ... 650 mV Typ

•

Bus-Terminating Resistors Provided on
Driver Outputs

•

I/O
PORTS

Fast Propagation Times ... 20 ns Max

•

•

NDAC

GPIB

VCC
REN
lFC
NDAC

NRFD

NRFD

TERMINAL

DAV

DAV

1/0 PORTS

EOI

EOI

ATN

ATN

SRO

SRO

GND

DC

CHANNEL IDENTIFICATION TABLE
NAME
DC

No Loading of Bus When Device Is Powered
Down (VCC a 01
Power-Up/Power-Down Protection
(Glitch-Free)

description
The SN75ALS161 eight-channel generalpurpose interface bus transceiver is a monolithic,
high-speed, Advanced Low-Power Schottky
process device designed to provide the busmanagement and data-transfer signals between
operating units of a single controller
instrumentation system. When combined with
the SN75ALS160 octal bus transceiver, the
SN75ALS161 provides the complete 16-wire
interface for the IEEE 488 bus.

IDENTITY
Direction Control

CLASS
Control

TE
ATN

Talk Enable

SRQ

Service Request

Bus

REN

Remote Enable

Management

IFC

Interface Clear

EOI

End or Identify

DAV

Data Valid

Attention

NDAC

Not Data Accepted

NRFD

Not Ready for Data

Data
Transfer

The SN75ALS 161 features eight driver-receiver
pairs connected in a front-to-back configuration
to form input/output (I/O) ports at both the bus
and terminal sides. The direction of data through
these driver-receiver pairs is determined by the
De and TE enable signals.
The driver outputs (GPIS I/O ports) feature active bus-terminating resistor circuits designed to provide a
high impedance to the bus when Vee = O. The drivers are designed to handle loads up to 48 mA of sink
current. Each receiver features p-n-p transistor inputs for high input impedance and hysteresis of 400 mV
minimum for increased noise immunity. All receivers have 3-state outputs to present a high impedance
to the terminal when disabled.
The SN75ALS161 is manufactured in a 20-pin package and is characterized for operation from ooe to 70 oe.

PRODUCTION DATA documontuontain information
curront as of publication dato. Prad••ts conform to
.pecifications per tho torm. of Toxa. Instruments
::'=~~I~ai~:I':.'l.; =:~i:r !JI"::::~£::'. not

Copyright © 1989, Texas Instruments Incorporated

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 15266

2-699

SN75ALS161
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
logic symbol t

logic diagram (positive logic)

DC(lll

EN1JG4

TE(ll

EN2/G5

EN3

(13)

(81 ATN

ATN

.IT
1

sz

.IT

EOI

(141

(71 EOI

17

.IT
17

SRO (12)

(9)

REN (19)

(2)

IFC (18)

(31

(151

(61

SRO

.IT
27

.IT
2"

sz
.IT

t This symbol is in accordance with ANSI/IEEE Std 91 1984 and
lEe Publication 617-12.

\} Designates 3-state outputs.

DAV

REN

IFC

DAV

~ Designates passive-pullup outputs.

NDAC

NRFD

(17)

(4) NOAC

(16)

(51 NRFD

RECEIVE/TRANSMIT FUNCTION TABLE
CONTROLS
DC

TE

BUS-MANAGEMENT CHANNELS
ATN*

ATN*

SRO

REN

IFC

DATA-TRANSFER CHANNELS
EOI

DAV

(Controlled by DC)

H

H

H

H

L

L

L

H

L

L

L

H

L

L

H

X
X

H

NDAC

NRFD

(Controlled by TE)

R

T

R

R

r-lR

T

R

T

T

....!L

R

T

R

R

T

R

T

T

T

R

R

R

T

T

R

R

T

T

T

T

R

R

T

H ::= high level, L = low level, R = receive, T ::= transmit, X = irrelevant
Direction of data transmission is from the terminal side to the bus side, and the direction of data receiving is from the bus side to the terminal
side. Data transfer is noninverting in both directions.
:t: ATN is a normal transceiver channel that functions additionally as an internal direction control or talk enable for EOI whenever the DC
and TE inputs are in the same state. When DC and TE are in opposite states, the ATN channel functions as an independent transceiver only.

~

TEXAS
INSTRUMENTS
2-700

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN75ALS161
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER

schematics of inputs and outputs
EOUIVALENT OF ALL
CONTROL INPUTS

TYPICAL OF SRO, NDAC, and NRFD
GPIB 1/0 PORT
~------r~------~~~----_.------.__vcc

vcc------.-------

1.7 kU
NOM

9kn

10 k~l
NOM

NOM

INPUT

GND _4-----"'--___4~--~~~~_'--_-_-_.~+-4---~--------GND
INPUT IOUTPUT
PORT

Circuit inside dashed lines is on the driver outputs only_
TYPICAL OF ALL 1/0 PORTS
EXCEPT SRO, NDAC, and NRFD GPIB 1/0 PORTS

----~~'__--~~~---4+_4---~--------GND
INPUT/OUTPUT

PORT

Driver output Req = 30!l NOM
Receiver output Req = 110!l NOM
Circuit inside dashed lines is on the driver outputs only.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) .... , ......................................... , 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Low-level driver output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1 00 rnA
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 2):
OW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1025 mW
J package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1025 mW
N package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1150 mW
Operating free-air temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooC to 70°C
Storage temperature range ......................................... - 65°C to 1 50°C
Lead temperature 1,6 mm (1/16 inch) from the case for 60 seconds: J package .......... 300°C
Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds: OW or N package .... 260°C
NOTES:

1. All voltage values are with respect to network ground terminal.
2. For operation above 25°e free-air temperature, derate the DW and J packages to 656 mW at 70 0 e althe rate of B.2 mw/oe,
and derate the N package to 736 mW at 70 0 e at the rate of 9.2 mw/oe.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-701

SN75ALS161
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
recommended operating conditions
Supply voltage, Vec
High-level input voltage, VIH

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

2

V

Low-level input voltage, VIL

0.8
Bus ports with pull ups active

High.level output current, IOH

-5.2
-800

Terminal ports
Bus ports

Low-level output current, IOL

48

Terminal ports

16

Operating free-air temperature, T A

0

70

V
mA
~A

mA
°C

electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted)
TEST CONDITIONS

PARAMETER
VIK

Input clamp voltage

Vhys

Hysteresis IVT+ - VT
High-level

VOH*
VOL
II
IIH
IlL
VIIOlbus)

output voltage
Low-level
output voltage
Input current at

maximum input voltage

)

Bus

2.5

0.3

0.5

10L = 48 mA

0.35

0.5

Terminal

VI = 5.5 V

0.2

100

~A

VI = 2.7 V

0.1

20

~A

-10 -100

~

and

control

input current

inputs

Voltage at bus port

VI = 0.5 V
Driver disabled

Illbus) = 0
Illbus) = -12 mA

Power on

Driver disabled

VII bus) = 5 V to 5.5 V
Power off
Short-circuit

Terminal

output current

Bus

VCC - 0,

VIIO = 0 to 2 V, f = 1 MHz.

t All typical values are at VCC = 5 V, TA = 25°C.
* VOH applies to 3-state outputs only.

~

INSTRUMENTS
2-702

3.0

POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

3.7
-1.5

V

V

-1.3
-3.2

0

+2.5
-3.2

mA

2.5

0
0.7

2.5
40

VI(busl - 0 to 2.5 V

TE and DC low
No load,
Vec - 5 V to 0,

TEXAS

2.5

V

3.3

VII bus) = 2.5 V to 3.7 V
VII bus) = 3,7 V to 5 V

Cilalbus)

V

IOL - 16 mA

input current

Bus-port capacitance

3.5

IOH = -5.2 mA

Low-Ieval

Supply current

0.65

Bus
Terminal
Bus

Terminal

ICC

V

0.4
2.7

Vllbus) - 0.4 V to 2.5 V

lOS

UNIT

-1.5

10H = -800 ~A

High-level

Current into bus port

MAX

-0.8

Termin"al

VII bus) = -1.5 V to 0.4 V

IIIOlbus)

MIN Typt

11= -18 mA

-15

-35

-25

-50 -125
55
30

-75
75

~

mA
mA
pF

SN75AlS161
OCTAL GENERAl·PURPOSE INTERFACE BUS TRANSCEIVER
switching characteristics over recommended range of operating free-air temperature (unless otherwise
noted), Vee - 5 V
PARAMETER

FROM

TO

Terminal

Bus

TEST
CONDITIONS

MIN TYpt

MAX

10

20

12

20

5

10

7

14

Propagation delay time,
tPLH
tpHL

low-to-high-Ievel output
Pr~pagation

delay time,
high-to-Iow-Ievel output

CL = 30 pF,
See Figure 1

Propagation delay time,
tPLH
tpHL

low-to-high-Ievel output

CL = 30 pF,
See Figure 2

Terminal

Bus

Propagation delay time,
Output enable time to high level

tPHZ

Output disable time from high level

tPZL
tpLZ

Output enable time to low level

tpZH

Output enable time to high level

tpHZ

Output disable time from high level

tPZL
tpLZ

Output enable time to low level

BUS
(ATTN, EOI,

TE or DC

30
20

CL=15pF,
See Figure 3

REN,IFC,

45

and DAV)

Output disable time from low level

ns

ns

high-to-Iow-Ievel output

tpZH

UNIT

ns

20
30

TE or DC

25

CL = 15 pF,
See Figure 4

Terminal

30
25

Output disable time from low level

ns

t All typical values are at T A = 25°C.

PARAMETER MEASUREMENT INFORMATION
5V

4.lV

240 11

200n
FROM (BUS)
OUTPUT UNDER-~.....--~t-"""~TEST POINT
TEST

l'

CL = 30 pF
(See Note A)

FROM (TERMINAL)
OUTPUT UNDER
TEST

l'

480 n
....

LOAD CIRCUIT

BUS
OUTPUT

-

--3V

BUS
INPUT

1.5V

1.5V
(See Note B)

I

OV

tPH L--If-+l
!r2- . 2 - V - - - - - - I - - -VOH

= lOpF

lkn

(See Note A)

L..5V

----It .

TERMINAL
OUTPUT

\-1:S~ - -loVv

(S•• Note B)

•

tPLH-f4+!
tPHL~
I_-----"":t---VOH
1.5V

VOLTAGE WAVEFORMS

I.6V

VOLTAGE WAVEFORMS

FIGURE 1. TERMINAL-TO-BUS
PROPAGATION DELAY TIMES
NOTES:

CL

LOAD CIRCUIT

,..-----_- INPUT

...- - - -. .~.-TEST POINT

FIGURE 2. BUS-TO-TERMINAL
PROPAGATION DELAY TIMES

A. CL includes probe and jig capacitance.

B. The input pulse is supplied by a generator having the following characteristics: PRR s 1 MHz, 50% duty cycle, tr s6 ns,
tf s6 ns, Zout = 50 II.

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TEXAS 75265

2-703

SN75ALS161
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION
SI

FROM (BUSI
OUTPUT UNDER-....TEST

J

SI

0--5V

zoon

240n

FROM (TERMINAL)
OUTPUT
~""-""---4P- TEST POINT
UNDER TEST

...-~~TEST POINT

480 n

CL = 15 pF
(See Nota A)

CL = 15 pF
J(S"NotaAI

LOAD CIRCUIT

-- . . . r---------.

--.. . ,..---------, r-----

CONTROL
" 15 V
~
INPUT __ J i\
. ___
(S.._____
Nota BI J
I '-

'l'

tPZH-I

14-

I :
I

2V

I

tpHZ-+I

t--

I
, !I

r-

I

I

tPZL--I
.,3.5V

\!1.0
V
10.5
\\.. _ _ _ _ _ _
0': ~V _ VOL
..J

I

TERMINAL
OUTPUT

I
SI OPEN_ _- J

OV

I

OUTPUT
SI CLOSED

tPZH-!,.-

I
tPLZ-l...j

3V

5V

1i'1.
1'-_____ OV

-9~- - - VOH

tpZL-+--+I
BUS

3kn

LOAD CIRCUIT

,..---,--3V
CONTROL
~1.5 V
\il.5 V
INPUT __ J
(S•• Not. BI JI''lI\ ____ OV
'- _______
BUS
OUTPUT
S10PEN

0--4.3 V

TERMINAL
OUTPUT
SI CLOSED

1.5V

14-

tpHZ-ooI

r--

------

I

I

VOH

90%

I

tPLZ~

OV

I

1.0V

VOLTAGE WAVEFORMS

VOLTAGE WAVEFORMS

FIGURE 4. TERMINAL ENABLE
AND DISABLE TIMES

FIGURE 3. BUS ENABLE AND
DISABLE TIMES

NOTES: A, CL includes probe and jig capacitance,
B. The input pulse is supplied by a generator having the following characteristics: PRR " 1 MHz, 50% duty cycle, tr ,,6 ns,
tf ,,6 ns, Zout = 50 II,

.

2-704

TEXAS'"

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75266

SN75ALS161
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
TERMINAL LOW-LEVEL OUTPUT VOLTAGE

TERMINAL HIGH-LEVEL OUTPUT VOLTAGE
vs

vs

HIGH-LEVEL OUTPUT CURRENT

LOW-LEVEL OUTPUT CURRENT

4.0

l'..

!
,.
...,....

3.5
3.0

"6

>
...

2.5

0

2.0

....i:...>

.........

TA = 25°C

I\.
'\

I

:I:
0

>

1.0

-5

>...

,.

0.4

0

0_3

.....>
:i:
...I
...0
Qi

~

0

r'\."\

0.5

o
o

0.5

S,.

'"

1.5

VCC=5V
TA = 25°C

l'..

'"
l!
"6

'\

Qi

J:'"

0_6

JCC =15V

>

0.2

/

/

V

-

/'

V

V

/

7

0.1

\.
30
40
10
20
50
IOL -Low-Level Output Current-mA

-10 -15 -20 -25 -30 -35 -40

IOH-High·Level Output Current-mA

FIGURE 5

60

FIGURE 6
TERMINAL OUTPUT VOLTAGE
vs

BUS INPUT VOLTAGE
4.0
3.5

>I

..'"

VCC=5V
No load
TA = 25°C

3.0

l!! 2.5

~...

,.

2.0

0
I
0

1.5

S,.

>

VT-

VT+

1.0
0.5

o
o

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VI-Input Voltage-V

FIGURE 7

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-705

SN75ALS161
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
BUS HIGH·LEVEL OUTPUT VOLTAGE
vs
HIGH·LEVEL OUTPUT CURRENT

BUS·LOW LEVEL OUTPUT VOLTAGE
vs
LOW·LEVEL OUTPUT CURRENT

4

>I

..

!'
~...
:::I
......:::I
0

...

0.6
VCC=SV
TA = 2SOC

3

>I

.,
'"
:I

~

""

2

Q;

...I

.i:

.2'

J:
I
J:

~...

0.4

:::I

~

:::I

'\

0

V

0.3

V
/'

Q;

t
...I

'" ~

~

0.2

0
...I

I

...I

~

V

V

V

OL-~~

o

-10
-20 -30
-40
-50 -60
IOH-High-Level Output Current-mA

__

L--L~

__~-L~__~~

10 20 30 40 SO 60 70 80 90 100
IOL - Low·level Output Current-mA

FIGURE 9

BUS OUTPUT VOLTAGE

BUS CURRENT
vs
BUS VOLTAGE

vs
TERMINAL INPUT VOLTAGE
VCC=SV
No load
TA =2SoC

2

>I

~
.!.c:

t

i
9

V

V

0.1

FIGURE 8

~

//

O.S

......

r\.

'\

o
o

VCC=SV
TA = 2SoC

~

2r--+--+-~~-H--+--+---+-~

a

-2~~---+~~--+---~~~~~

o
>

~H-I--+-~ AREA CON FORMS TO

~-+-i.-+-f.?" PARAGRAPH 3.S.3 OF

OL-~

0.9

__- L__

1.0

L-~

"IEEE STANDARD 488·1978

__- L__~~__~

1.1 1.2 1.3 1.4 1.S
VI-Input Voltage-V

1.6

1.7

-1

FIGURE 10

2-706

0

2
3
4
VI/O(bus)-Bus Voltage-V

FIGURE 11

TEXAS . "
INSTRUMENlS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

S

6

SN75ALS162
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
0261

JUNE 1986-REVISEO AUGUST 1989

MEETS IEEE STANDARD 488·1978 (GPIB)

•
•
•
•
•
•
•
•
•
•
•

ow PACKAGE

8-Channel Bidirectional Transceiver

(TOP VIEW)

Designed to Implement Control Bus
Interface
Designed for Multicontrollers
High-Speed Advanced Low-Power Schottky
Circuitry
Low Power Dissipation ... 46 mW Max per
Channel

GPIB
I/O
PORTS

Fast Propagation Times ... 20 ns Max
High-Impedance P-N-P Inputs
Receiver Hysteresis ... 650 mV Typ

SC
TE
REN
IFC
NDAC
NRFD
DAV
EOI
ATN
SRQ
NC
GND

Bus-Terminating Resistors Provided on
Driver Outputs

Power-Up/Power-Down Protection
(Glitch-Free)

The SN75ALS162 eight-channel generalpurpose interface bus transceiver is a monolithic,
high-speed, Advanced Low-Power Schottky
process device designed to provide the busmanagement and data-transfer signals between
operating units of a multiple-controller
instrumentation system. When combined with
the SN75ALS160 octal bus transceiver, the
SN75ALS 162 provides the complete 16-wire
interface for the IEEE 488 bus.

TERMINAL
I/O PORTS

N PACKAGE
(TOP VIEW)

No Loading of Bus When Device Is Powered
Down (VCC = 0)

description

VCC
NC
REN
IFC
NDAC
NRFD
DAV
EOI
ATN
SRQ
NC
DC

GPIB
I/O
PORTS

SC
TE
REN
IFC
NDAC
NRFD
DAV
EOI
ATN
SRQ
GND

VCC
NC
REN
IFC
NDAC
NRFD
DAV
EOI
ATN
SRQ
DC

TERMINAL
I/O PORTS

NC-No internal connection.

The SN75ALS 162 features eight driver-receiver
pairs connected in a front-to-back configuration
to form input/output (110) ports at both the bus and terminal sides. The direction of data through these
driver-receiver pairs is determined by the DC, TE, and SC enable signals. The SC input allows the REN
and IFC transceivers to be controlled independently.
The driver outputs (GPIB I/O ports) feature active bus-terminating resistor circuits designed to provide a
high impedance to the bus when VCC = O. The drivers are designed to handle loads up to 48 rnA of sink
current. Each receiver features p-n-p transistor inputs for high input impedance and hysteresis of 400 mV
minimum for increased noise immunity. All receivers have 3-state outputs to present a high impedance
to the terminal when disabled.
The SN75ALS 162 is manufactured in a 22-pin dual-in-line N package and in 24-pin OW package, and is
characterized for operation from OOC to 70°C.

PRODUCTION DATA documants contain information
currenl IS of publication date. Products conform 10
speeHications par the terms of Texas Instruments

::=~i~·[n':I':.1~ ==:~r lIIO:=:~:t!':.s nol

Copyright © 1989, Texas Instruments Incorporated

TEXAS . . ,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75266

2-707

SN75ALS162
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER

CHANNEL IDENTIFICATION TABLE
NAME

IDENTITY

DC

Direction Control

TE

Talk Enable

SC

System Control

ATN

CLASS

Control

Attention

SRQ

Service Request

Bus

REN

Remote Enable

Management

IFC

Interface Clear

EOI

End or Identify

DAV

Data Valid

NDAC

Not Data Accepted

NRFD

Not Ready for Data

logic symbol t

Data
Transfer

logic diagram (positive logic)

DC [13J (121 r-E-N -1! G - 4 - - - "
TE [2J (21
EN2!G5
SC [lJ (11

EN3

1---,-..,
TE

[9J

ATN

~'--'-'--"++t--+---H >-~_--+-,(.:.:.91

ATN

EOI
[17]

EOI -,-(1.:..5.:...1-14+--.--(
REN

[15J

SRO
IFC

[10J

-,(_13--')_+-t-+_~>-t r~___(_1_0) SRO
[2~

DAV

[sJ

~__..-_--+-,(c.:.81 EOI

REN -'-(2-'--0-'-1_+-1_ _---.-1

[~

)..-..-___(3_) REN

NDAC
[21J

[4J

IFC _(1_9.:...1_14_ _-,--( .:::...--_--(4-) IFC

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.

V Designates

3~state

[~

m

DAV -..:(.:..16:.,:)_--+_ _-.-, :::__.,----(7-'-1 DAV

outputs.

~ Designates passive~pullup outputs.

[20J

[5J

NDAC_(~18-,--)_--+_ _-.-, .:::..-.,-_ _ _(5_1 NDAC
[6J
[19J
(6)
(17)
NRFD - - - - j - - -....-( ) - - . , - - - - NRFD

[ I Denotes pin numbers for OW package.
( ~ Denotes pin numbers for N package.

TEXAS . "
INSTRUMENTS
2-708

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN75ALS162
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
RECEIVE/TRANSMIT FUNCTION TABLE

H = high level, L = low level, R = receive, T = transmit, X = irrelevant
Direction of data transmission is from the terminal side to the bus side, and the direction of data receiving is from the bus side to the
terminal side. Data transfer is noninverting in both directions.
t ATN is a normal transceiver channel that functions additionally as an internal direction control or talk enable for EOI whenever the DC
and TE inputs are in the same state. When DC and TE are in opposite states, the ATN channel functions as an independent transceiver only.

schematics of inputs and outputs
EOUIVALENT OF ALL
CONTROL INPUTS

TYPICAL OF SRO, NDAC, and NRFD
GPIB I/O PORT

-t---~r~-~---~'-r--~~--~-Vcc
1.7 kH
NOM

Vee - - -......- - - -

•• n

10 kil

NOM

NOM

INPUT

GND-4___

~_~~-

~-~1-T~·_-_-_-_~~--~-----GND
INPUT/OUTPUT

PORT

Circuit inside dashed lines ;s on the driver outputs only.

TYPICAL OF ALL I/O PORTS
EXCEPT SRQ, NDAC, and NRFD GPIB I/O PORTS
~t-----t-------rt--~~------t-----~--Vcc

-----4--4_--~~~----~-4----4---------GND

INPUT lOUT PUT
PORT

Driver output Req ~ 30!l NOM
Receiver output Req ~ 110!l NOM
Circuit inside dashed lines is on the driver outputs only.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS, TEXAS 75266

2-709

SN75ALS162
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) ... ,........................................... 7 V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Low-level driver output current .............................................. 100 rnA
Continuous total dissipation at (or below) 25 DC free-air temperature (see Note 2):
OW package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1350 mW
N package .................... , ................................... 1700 mW
Operating free-air temperature range ...................................... ODC to 70DC
Storage temperature range .......................................... -65 DC to 150 DC
Lead temperature 1,6 mm (1116 inch) from the case for 10 seconds: OW or N package. . . . .. 260 DC
NOTES:

1. All voltage values are with respect to network ground terminal.
2. For operation above 25°e free-air temperature. derate the OW package to 864 mW at 70 0 e at the rate of 10.8 mW/oe. and
derate the N package to 1088 mW at 70 0 e at the rate of 13.6 mW/oe.

recommended operating conditions
Supply voltage, Vee

MIN

NOM

4.75

5

-800

Terminal ports

48

Bus ports

16

Terminal ports

0

Operating free-air temperature, T A

TEXAS •

INSTRUMENTS
2-710

-5.2

Bus ports with 3-state outputs

POST OFFICE BOX 655303 • DALlAS. TEXAS 75265

V
V

0.8

Low-level input voltage, VIL

Low·level output current, IOL

5.25

2

High-level input voltage, VIH

High·level output current, IOH

MAX UNIT

70

V
rnA

pA
rnA
°e

SN75ALS162
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted)
PARAMETER
V,K

Input clamp voltage

Vhys

Hysteresis (VT + - VT

VOHt
VOL

TEST CONDITIONS

)

IIH
IlL
VI/Olbus)

II/Olbus)

Bus

lee
ei/o(bus)

UNIT

-1.5

V

0.4

0.65
3.5

V

10H = -800 ~A

2.7

output voltage

Bus

10H = -5.2 mA

2.5

Low-level

Terminal

10L = 16 mA

0.3

0.5

output voltage

Bus

10L - 48 mA

0.35

0.5

Terminal

VI = 5.5 V

0.2

100

~A

VI = 2.7 V

0.1

20

~A

-10 -100

~A

maximum input voltage
High-level

Terminal

input current

and

Low-level

control

input current

inputs

Voltage at bus port

Current into bus port

VI = 0.5 V
Driver disabled

Power on

Power off
lOS

MAX

-0.8

Terminal

High-level

Input current at
II

MIN Typt

11= -18 mA

Short-circuit

Terminal

output current

Bus

Supply current

Driver disabled

Vee = O.

No load.

VI/O = 0 to 2 V,

=

-12 mA
1.5 V to 0.4 V
Vl(bus) Vl(bus) = 0.4 V to 2.5 V

3.0

V

V

1.3
-3.2

0

+2 ..5

Vl(bus) = 2.5 V to 3.7 V

-3.2

Vl(bus) = 3.7 V to 5 V

0

Vllbusl - 5 V to 5.5 V

0.7

mA

2.5
2.5
-40

Vl(bus) = 0 to 2.5 V

TE. De, and se low

3.7
-1.5

1l(bus) -

Vee = 5 V to 0,

Bus-port capacitance

t All typical values are at Vee
5 V, T A
tVOH applies lor 3-state outputs only.

1l(bus) = 0

2.5

V

3.3

-15

-35

-25

-50 -125
55
30

-75
75

~A

rnA
mA
pF

1= 1 MHz

= 25°e.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-711

SN75ALS162
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER

switching characteristics over recommended range of operating free-air temperature (unless otherwise
noted). Vee = 5 V
PARAMETER

FROM

TO

Terminal

Bus

TEST
CONDITIONS

MIN Typt

MAX

10

20

12

20

5

10

7

14

Propagation delay time,
tplH
tpHl
tplH
tpHl

low-to-high-Ievel output
Propagation delay time,
high-to-Iow-Ievel output

Cl = 30 pF,
See Figure 1

Propagation delay time,
low-to-high-Ievel output
Propagation delay time,

Cl = 30 pF,
See Figure 2

Terminal

Bus

Output enable time to high level

tpHZ

Output disable time from high level

tpZl
tpLZ

Output enable time to low level

tpZH

Output enable time to high level

tpHZ

Output disable time from high level

tpZl

Output enable time to low level

tPlZ

Output disable time from low level

BUS
IATTN, EOI,

TE, DC,
or

REN,IFC,

SC

Output disable time from low level

15 pF,

30
20

See Figure 3

45

Cl

=

ns

ns

high-to-Iow-Ievel output

tpZH

UNIT

and DAV)

ns

20
30

TE, DC,

CL = 15 pF,
See Figure 4

Terminal

or
SC

25
30

ns

25

t All typical values are at T A = 25°C.

PARAMETER MEASUREMENT INFORMATION
5V

4.3V

240 n.

200 n.
FROM !TERMINALI
OUTPUT UNDER
TEST

FROM IBUS)
OUTPUT UNDER-~"'---"-"'-TEST POINT
TEST

liS..

CL = 30 pF
Note AI

J

480 n.
....

LOAD CIRCUIT
TERMINAL
INPUT

CL = 30 pF
ISee Not. AI

3kn.

LOAD CIRCUIT

, _ - - - - - " ' - - ---3V
1.5V
1.5V

BUS
INPUT

.L,.5V
- - - " . IS•• Not. BI

'----0 V

, , . . . - - - - -.... -1-- -VOH

\-1:: - - 30V
v
_

tPLH---j4+I
tPH L-jf--+/
Ir_------.::t---VOH

tPHL-l4-+j
BUS
OUTPUT

...-----<...-4It-TEST POINT

TERMINAL
OUTPUT

1.5V

1.5V

VOH

VOL

VOLTAGE WAVEFORMS

VOLTAGE WAVEFORMS

FIGURE 1. TERMINAL-TO-BUS
PROPAGATiON DELAY TIMES

FIGURE 2. BUS-TO-TERMINAL
PROPAGATION DELAY TIMES

NOTES: A. Cl includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR .s 1 MHz, 50% duty cycle. tr :::=;;6 ns,
tf 56 ns, Zout = 500.

T~~

INSTRUMENTS
2-712

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN75ALS162
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION
51

51

o-5V

lO0f!

FROM (BUS)
OUTPUT UNDER-...- ..... . - -...-TEST POINT
TEST
CL = 15 pF
480 f!
(5•• Not. A)

FROM (TERMINAL)
OUTPUT
--<.....UNDER TEST

J

J

LOAD CIRCUIT

r----

"tt l .5
\il.5
__ J 'I''- _______ J '1'' - - - - V

BUS
OUTPUT
51 OPEN

t--

BUS
OUTPUT
51 CLOSED

tPHZ--.l

3kf!

~----------~

I

2V

Ii'

OV
VOH

I

)
\!1.0V
"\

tpZH-+I
TERMINAL
I
OUTPUT
I
51 OPEN

I

I

OV

tPLZ~

r---

I

1.5V

tpZL --l

VOL

tpHZ-+I

r--

- - - ---

I
:
tPLZ--i

VOH

90%
OV

~

I

I

t : - ' , "'3.5 V

0.5 V
- - -

3V

CONTROL
1.5 V
~ 1.5 V
INPUT __ .JI~
(5••_____
Not. B) J ) ' - _____ OV
I '- ___

t+-

I I
I)

tPZL~

CL = 15 pF
(5•• Not. A)

--,¥,--------, r-----

3V

V

(5•• Note B)

tPZH--I

240 f!
___~-....- TEST POINT

LOAD CIRCUIT

--, r-------,

CONTROL
INPUT

cr-4.3V

OUTPUT
51 CLOSED

VOLTAGE WAVEFORMS

1.0V

)

!

' -_ _ _ _ _ _.J._O ~

__

VOL

VOLTAGE WAVEFORMS

FIGURE 3. BUS ENABLE AND
DISABLE TIMES

FIGURE 4. TERMINAL ENABLE
AND DISABLE TIMES

NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR :5 1 MHz, 50% duty cycle, tr :56 ns,
tf :5 6 ns, Zout = 50 D.

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-713

SN75ALS162
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
TERMINAL HIGH-LEVEL OUTPUT VOLTAGE

vs

HIGH-LEVEL OUTPUT CURRENT

LOW-LEVEL OUTPUT CURRENT

4.0

:r.,

!'

..
e"

"
"ii
.,...I>
0

3.5

.........

3.0

TA = 25·C

:I:
0

>

'\

2.5

1.0

0.4

/

a.

':i

0.3

"ii
>

.,

...I

'\

0.5
-5

>
0

~

0

0.2

...I

~
o

0.5

.."

'\

1.5

VCC=5V
TA=25·C

.,
'"
l!

15

'\

2.0

o

>I

~

i.:

:z:'"I

0.6

JCC : 15V

15

>

TERMINAL LOW-LEVEL OUTPUTVOLTAGE

vs

I

...I

0

>

"I~

/

V

/

/

0.1

-10 -15 -20 -25 -30 -35 -40

20
40
10
30
50
IOL -Low-Level Output Current-mA

IOH-High-Level Output Current-mA

FIGURE 5

FIGURE 6
TERMINAL OUTPUT VOLTAGE

vs
BUS INPUT VOLTAGE
4.0
VCC=5V
No load
TA = 25°C

3.5

>I

3..0

'"
~

2.5

.,

.."

~ 2.0
a.

':i

0
I
0

>

VT-

VT+

1.5
1.0
0.5

o
o

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VI-Input Voltage-V

FIGURE 7

TEXAS . "

INSTRUMENTS
2-714

V

/

/

POST OFFICE BOX 655303. DAUAS, TEXAS 76265

60

SN75ALS162
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
BUS HIGH·LEVEL OUTPUT VOLTAGE

BUS·LOW LEVEL OUTPUT VOLTAGE

vs

vs

HIGH·LEVEL OUTPUT CUR RENT

LOW·LEVEL OUTPUT CURRENT

0.6

4

VCc=5V
TA=25°c

>I

.,
'"
:I

..e-

3

I'----..

"'0

>
:::I

:::I

0

2

>I

~

..e-

"'0

>
:::I

.i!

:i:'"

0

-;;

.,>
....

0

>
-10

-20

0.4

l/

'" ~

3:

-30

-40

0.3
0.2

....0

'\

I

:J:

o
o

1---.- f---.

:::I

"'\

.,>
....

0.5

:I

~I\.

-;;

VcC=5V
TA = 25°C

I

....
0
>

-50

-60

V
./

V

V

V

1/V

V

V

0.1

o

o

'OH-High.Level Output Current-mA

10

20 30 40

50 60 70 80 90 100

IOL - Low·Level Output Current-mA

FIGURE 8

FIGURE 9
BUS CURRENT

BUS OUTPUT VOLTAGE

vs

vs

TERMINAL INPUT VOLTAGE

BUS VOLTAGE

VCC=5V
No load
TA = 25°C

>I

J

..e-

~

:::I
:::I

9o
>

OL-~

0.9

__- l__- L__

1.0

1.1

1.2

~

__L-~__-L___

1.3

1.4

1.5

1.6

1.7

-1

0

2

3

4

5

6

V,/O(bus)-Bus Voltage-V

V'-'nput Voltage-V

FIGURE 10

FIGURE 11

TEXAS •
INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS, TEXAS 75265

2-715

2-716

SN75ALS163
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
02611. JUNE 19S6-REVISED SEPTEMBER 19S9

•

8·Channel Bidirectional Transceivers

•

High.Speed Advanced Low·Power Schottky
Circuitry

•

Low Power Dissipation ... 46 mW Max per
Channel

•

Fast Propagation Times ... 20 ns Max

OW. J. OR N PACKAGE
ITOPVIEWI

GPIB
(f0 PORTS

•

High·lmpedance P-N-P Inputs

•

Receiver Hysteresis ... 650 mV Typ

•

Open-Collector Driver Output Option

•

No Loading of Bus When Device Is Powered
Down (VCC-O)

•

Power-Up/Power-Down Protection
(Glitch-Free)

Vee

TE
B1

01

B2

02

B3

03

B4

04

TERMINAL

B5

05

I/O PORTS

B6

06

B7

07

B8

08

GNO

PE

FUNCTION TABLES
EACH RECEIVER

EACH DRIVER
INPUTS

description
The SN75ALS 163 octal general-purpose
interface bus transceiver is a monolithic, highspeed, Advanced Low-Power Schottky device.
It is designed for two-way data communications
over single-ended transmission lines. The
transceiver features driver outputs that can be
operated in either the open-collector or 3-state
mode. If Talk Enable (TEl is high, these outputs
have the characteristics of open-collector
outputs when Pullup Enable (PEl is low and of
3-state outputs when PE is high. Taking TE low
places the outputs in the high-impedance state.
The driver outputs are designed to handle loads
of up to 48 mA of sink current. Each receiver
features p-n-p transistor inputs for high input
impedance and 400 mV minimum of hysteresis
for increased noise immunity.

OUTPUT

INPUTS

OUTPUT

0
H
L
H

TE

PE

B

B

TE

PE

H

H

L

X

H

L
L

X

H

H
L

X

0
L
H

X

L

X

H

X

Z

X

L

X

H = high level. L

Z
Z

= low level, X = irrelevant, Z = High-impedance

state.

Output glitches during power-up and powerdown are eliminated by an internal circuit that
disables both the bus and receiver outputs. The
outputs do not load the bus when Vee = O.
The SN75ALS163 is characterized for operation
from ooe to 70 oe.

PRODUCTlOII DATA documents co.tei. i.lormation
curre.t .. 01 publicellon dote. P..ducts c••farm 10

spacifications plF the tarms of Taxas InstrulDents

:=i~8i~r:I:ri ~=::i:r :"D::::::':r~ not

Copyright © 1989, Texas Instruments Incorporated

TEXAS •

INSTRUMENTS
POST OFFICE BOX 656303. DALLAS. TEXAS 75265

2-717

SN75ALS163
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
logic symbol t

logic diagram (positive logic)

TE

121 Bl
02 118)
82

13) B2

83
03 117)

84

B5
86

14) B3
04 116)

87
88

15)

TERMINAL

BUS
16)

'V Designates 3·state outputs.

Q Designates

B4

05 115)

tThis symbol is in accordance withANSlIlEEE Std 91-1984 and
IEC Publication 617-12.
open-collector outputs.

B5

D6 114)
17)

07

113)

-'--'--h-l

B6

:)~----.

18) B7

08 112)
19)

B8

schematics of inputs and outputs
EQUIVALENT OF ALL CQNTROL INPUTS

EQUIVALENT OF ALL INPUT/OUTPUT PORTS
--~----'----------~---~~VCC

Vee

---~r-----

10 k!1 NOM

Req

9 k!1 NOM

INPUT

GNO--~--~---'--

-----~~~-~~-+--.---~----------GNO

INPUT/OUTPUT
PORT
Driver output Req == 30 n NOM
Receiver output Req = 110 n NOM

TEXAS . "
INSTRUMENTS
2-718

POST.OFFICE BOX 656303 • DALlAS, TEXAS 76266

SN75ALS163
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage ....... '.' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Low-level driver output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 100 rnA
Continuous total dissipation ................... : . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range ...................................... ooC to 70°C
Storage temperature range ......................................... - 65°C to 1 50°C
Lead temperature 1,6 mm (1/16) inch from the case for 60 seconds: J package .......... 300°C
Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds: OW or N package .... 260°C
NOTE: 1. All voltage values are with respect to network ground terminal.

DISSIPATION RATING TABLE
PACKAGE

TA s 25·C

DERATING

TA - 70·C
POWER RATING

OW

1125mW

FACTOR
9.0 mw/oe

J

1025 mW

8.2 mw/oe

656 mW

N

1150mW

9.2 mw/oe

736mW

POWER RATING

720mW

recommended operating conditions
Supply voltage, Vee
High-level input voltage, VIH

MIN

NOM

MAX

4.75

5

5.25

2

Low-level input voltage, VIL
High-level output current, IOH

Low-level output current, IOL

UNIT
V
V

0.8

V

Bus ports with pullups active

-5.2

mA

Terminal ports

-800

~A

Bus ports

48

Terminal ports

Operating free-air temperature range, T A

16
0

70

mA
·e

TEXAS . "

INSTRUMENTS
POST OFFICE BO?, 655303 • DALLAS. TEXAS 75286

2-719

SN75ALS163
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted)
PARAMETER

TEST CONDITIONS

Vhvs

Hysteresis (VT + - VT-) Bus
High-level
Terminal

IOH = - 800 ~A,

output voltage

Bus

Low-level
output voltage

VOL

High-level output current
IOH
10Z
II

(open-collector mode)

Off-state output current
(3-state mode)
Input current at

maximum input voltage

Typt
-0.8

Input clamp voltage

VOH*

MIN

11= -18 rnA

VIK

MAX
-1.5

0.4

0.65

TE at 0.8 V

2.7

3.5

IOH = - 5.2 rnA,

PE and TE at 2 V

2.5

Terminal

IOL = 16 rnA,

TE at 0.8 V

3.3
0.3

0.5

Bus

IOL = 48 rnA,

TE at 2 V

0.35

0.5

Vo = 5.5 V,

PE at 0.8 V,

Bus

I Vo
I Vo

PE at 2 V,

Bus

TE at 0.8 V

Terminal

VI = 5.5 V

V

= 2.7 V

20

= 0.5 V

-100
0.2

Terminal,

VI = 2.7 V

0.1

20

PE, or TE

VI = 0.5 V

-10

-100

Short-circuit

Terminal

-15

-35

-75

output current

Bus

-25

-50

-125

Supply current

Ci/o(bus) Bus-port capacitance

No load

Terminal outputs low and enabled

42

65

Bus outputs low and enabled

52

80

VCC = 5 VorO,

VI/O = 0 to 2 V,

30

f = 1 MHz

~

~

High-level input current
Low-level input current

ICC

~

~A

IlL

I
I

V

100

IIH

lOS

V
V

100

D and TE at 2 V

UNIT

~A

rnA
rnA
pF

t All typical values are at VCC = 5 V, T A = 25°C.
*Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going input threshold voltage, VT _.

switching characteristics over recommended range of operating free-air temperature (unless otherwise
noted). Vee'" 5 V
PARAMETER
tpLH
tpHL
tpLH
tpHL
tPZH
tpHZ
tpZL
tpLZ
tpZH
tpHZ
tpZL
tpLZ
ten
tdis

FROM

TO

TEST CONDITIONS

Terminal

Bus

CL = 30 pF,
See Figure 1

Propagation delay time,
low-to-high-Ievel output

Propag8tion delay time,
high-to-Iow-Ievel output
Propagation delay time,
low-to-high-Ievel output
Propagation delay time,
high-to-Iow-Ievel output
Output enable time to high level
Output disable time from high level
Output enable time to low level
Output disable time from low level
Output enable time to high level
Output disable time from high level
Output enable time to low level
Output disable time from low level
Output pull-up enable time
Output pull-up disable time

Bus

TE

TE

PE

Terminal

Bus

Terminal

Bus

CL = 30 pF,
See Figure 2

TYP§

MAX

7

20

8

20

7

14

9

14

19

30

ns

5

12

See Figure 3

16

35

9

20

13

30

CL=15pF,

12

20

See Figure 4

12

20

11

20

CL = 15 pF,

11

22

See Figure 5

6

12

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

UNIT

ns

CL = 15 pF,

§AII typical values are at TA = 25°C.

2-720

MIN

ns

ns

ns

SN75ALS163
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION

200n

DINPUT

i5v

~t5~---3V

----Ii .

!\\....- - - o v

tplH~
IpHl~
I,.-----..~II- -V DH

I

B OUTPUT

2.2 V

•

1.0V
VOH

3V

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 1. TERMINAL·TO-BUS PROPAGATION DELAY TIMES

X·:---3V

B=J5V

4.3V

I .

1

240 n

tplH~

tpHl~

1 ,-______""""\:-1_
1
I

o OUTPUT

3kn

OV

--V
OH

1.5V

TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 2. BUS-TO-TERMINAL PROPAGATION DELAY TIMES

~'5V

'i5~----3V

52

tpZH~

14-

BOUTPUTI

I

51 to 3 V

I

52 OPEN

1

48011

tpHz~
-------+...,.;.

0V

2V

tpZl
I" ...,.1
~I
_
__
BOUTPUT
1
51 to GND

a.BV
3.5 V
1.0V

52 CLOSED

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 3. TE-TO-BUS ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
tf S 6 ns, Zout ~ 50 Il.
B. CL includes probe and jig capacitance.

s

1 MHz. 50% duty cycle, tr S 6 ns,

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-721

SN75ALS163
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION

INPUT~".5_V
r-:
I I

\.._
S2

TE

3V

....Jt·":.___

______

tpZH-+J

tpHZ-.ot

S20PEN
3kn

tpZL

I
I

,....

-90%-- -VOH

o OUTPUT
Slto3V

1.5V

:

I
OV

----i

tpLZ-..j

4V

o OUTPUT
51 to GND
S2ClOSED

-0 V

'-_ _ _ _ _ _-J._0,2 ~ -

-VOL

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 4. TE·TO·TERMINAL ENABLE AND DISABLE TIMES

">-1,..!.::...-....---1-0UTPUT

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 5. PE-TO-BUS PULLUP ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
tf s 6 ns, Zout = 50 O.
B. CL includes probe and jig capacitance.

TEXAS ."

INSTRUMENTS
2-722

POST OFFICE BOX 666303 • OALLAS, TEXAS 75265

s

1 MHz. 50% duty cycle, tr S 6 ns,

SN75ALS163
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER

TYPICAL CHARACTERISTICS
TERMINAL HIGH·LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
4.0

>I

3.5

'"
!l
"0

3.0

::I

2.5

..

..

>

........

.

,.

.i:.

:I:'"
I

:r
0

>

0.5

-5

0.4

/

::I

&
::I

-10 -15 -20

/

0.3

0

..,.
:t0

0.2

....I

I

I\.

....I

V

V

/

V

/

OJ

....I

/

0.1

0

>

't\.
o

>

.

~

1.0

.'"

tC=)V
0.5 I - - - TA = 25°C

!l
"0

"

1.5

o

,

>I

'\

2.0

OJ

....I

0.6

J

T

VCC=5V
TA=25°C-

~

&
::I
0

TERMINAL LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT

o

-25 -30 -35 -40

o

IOH-High·Level Output Current-mA

10

20

30

40

50

60

IOL -Low-Level Output Current-mA

FIGURE 6

FIGURE 7
TERMINAL OUTPUT VOLTAGE
vs
BUS INPUT VOLTAGE
4.0
VCC = 5 V
No load
TA = 25°C

3.5

>I

.'"

3.0

!l 2.5
"0

.

>

I

2.0

::I

&
::I

0
I
0

>

i

,

,

1.5

VT-

VT+

1.0
0.5

o

o

02

OA Q6 O.

1~ 12 1A 1. 1.
VI-Input Voltage-V

2~

FIGURE 8

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS., TEXAS 75266

2-723

SN75ALS163
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
BUS HIGH-LEVEL OUTPUT VOLTAGE

BUS LOW-LEVEL OUTPUT VOLTAGE

vs

vs

BUS HIGH-LEVEL OUTPUT CURRENT

BUS LOW-LEVEL OUTPUT CURRENT

4

~

8.

:l
"6

..a-"

3

0.6

~

>

"

0

U

VCC'=5V
TA=25°C

CD

...J:>
CD

:i:'"

/V

0

0_3

'\

"

U
>
CD

...

",,-.

>
-20

-30

~

0_2

>

0.1

...I
...0
0

"
-10

0.4

~

~

I
J:

o

.."

>

0

o

VCC=5V
TA = 25°C
0.5

'"
l!
"6

""

2

>I

""

-40

--50

o

-60

/
/'

/

V
o

10

20 30

vs
4

VCC= 5V
No load
TA = 25°C

t~

E

3

2

\

~

9
~

o
0.9

1.0

1.1

1.2

1.3

1.4

1.5 1.6

VI-Input Voltage-V
FIGURE 11

2-724

50 60

FIGURE 10

TERMINAL INPUT VOLTAGE

I

40

70 80 90 100

IOL -Low-Level Output Current-rnA

BUS OUTPUT VOLTAGE

>

/

,/

IOH-High-Level Output Current-rnA
FIGURE 9

/

/

TEXAS •
INSTRUMENlS
POST OFFICE BOX 855303 • DALLAS, TEXAS 75285

1.7

SN75ALS164
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
02908, JUNE 1986-REVISEO AUGUST 1989

•

a·Channel Bidirectional Transceiver

•

Designed to Implement Control Bus
Interface

•
•

•

DW PACKAGE
(TOP VIEW)
SC
TE
REN

Designed for Multicontrollers
High-Speed Advanced Low-Power Schottky
Circuitry
Low Power Dissipation . . . 46 mW Max per
Channel

•

Fast Propagation Times . . . 20 ns Max

•

High-Impedance P-N-P Inputs

•

Receiver Hysteresis ..• 650 mV Typ

•

Bus-Terminating Resistors Provided on
Driver Outputs

•
•

VCC
ATN+EOI
REN
IFC
NDAC

IFC
NDAC
NRFD

GPIB

1/0

NRFD
DAV

DAV
EOI

PORTS

ATN
SRO

EOI
ATN
SRO

NC
GND

NC
DC

TERMINAL

1/0 PORTS

N DUAL·IN·LlNE PACKAGE
(TOP VIEW)
SC
TE
REN

No Loading of Bus When Device Is Powered
Down (VCC ~ 0)

IFC
NDAC
NRFD

GPIB

Power-Up/Power-Down Protection
(Glitch-Free)

I/O
PORTS

NDAC
NRFD
DAV

DAV
EOI
ATN

description
The SN75ALS164 eight-channel generalpurpose interface bus transceiver is a monolithic,
high-speed, Advanced Low-Power Schottky
device designed to meet the requirements of
IEEE Standard 488-1978. Each transceiver is
designed to provide the bus-management and
data-transfer signals between operating units of
a multiple-controlier instrumentation system.
When combined with the SN75ALS160 octal
bus transceiver, the SN75ALS 164 provides the
complete 16-wire interface for the IEEE 488 bus.

VCC
ATN+EOI
REN
IFC
TERMINAL
1/0 PORTS

EOI
ATN

SRO

SRO

GND

DC

NC - No internal connection.

The SN75ALS164 features eight driver-receiver
pairs connected in a front-to-back configuration
to form input/output (I/O) ports at both the bus
and terminal sides. All outputs are disabled (at
a high-impedance state) during VCC power-up
and power-down transitions for glitch-free
operation. The direction of data flow through
these driver-receiver pairs is determined by the
DC, TE, and SC enable signals. The
SN75ALS 164 is identical to the SN75ALS 162
with the addition of an OR gate to help simplify
board layouts in several popular applications.
The ATN and EOI signals are ORed to pin 21,
which is a standard totem-pole output.

CHANNEL IDENTIFICATION TABLE
NAME

IDENTITY

DC
TE
SC

CLASS

Direction Control

Talk Enable

Control

System Control

ATN
SRQ
REN
IFC
EOI

Attention
Service Request
Remote Enable
Interface Clear

Bus
Management

End or Identify

ATN+EOI
DAV
NDAC
NRFD

A TN logical OR EOI
Data Valid
Not Data Accepted
Not Ready for Data

Logic
Data
Transfer

Copyright © 1989, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-725

SN75ALS164
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
The driver outpu~s (GPIB I/O ports) feature active bus-terminating resistor circuits designed to provide a
high impedance to the bus when supply voltage Vee is O. The drivers are designed to handle loads up
to 48 mA of sink current. Each receiver features p-n-p transistor inputs for high input impedance and
hysteresis of 400 mV minimum for increased noise immunity. All receivers have 3-state outputs to present
a high impedance to the terminal when disabled.
The SN75ALS164 is manufactured in a 22-pin dual-in-Iine N package and in 24-pin OW package, and is
characterized for operation from ooe to 70 oe.

logic symbol t

logic diagram (positive logic)

DC [13)(121 r:::E~N":"1/~G":"4---"
TE [2)(21
se [1](11

EN2/G5
EN3
F~..,

[9]

.>..:.:::.:..:.::..:.<...H-I--....>-I

>_~----1f-!19::!.1 ATN

[23]

>-__-+-'1.::.21"'1 ATN+EO(
[17]
EOI (151

[15]

[B]

>--.__-I-""IB="-I EO!
[10]

SRQ~ll~3~1_~~~_.-~ J~~__~1~10~ISRQ

[22]

[3]

REN~12~0~1_~+-_ _.-~ ~~.-_ _ _~13~1 REN
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.
V Designates 3-state outputs.

i: Designates passive-pullup outputs.

[21]
(Fe 1191

[4]

>---.>--__--.!:14"'IIFC

[lB]
[7]
DAV~ll~6~1_ _+-_ _. - , ;~~_ _ _~17~IDAV

[20]
[5]
NDAe~ll~8~1_ _+-_ _. - , ;~~_ _ _~15~INDAe

[m

~

NRFD~ll~7LI-_+-_ _. - , ;~~_ _ _~(6~1 NRFD
[ ] Denotes pin numbers for OW package.

( I Denotes pin numbers for N package.

TEXAS . .
INSTRUMENTS
2-726

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN75ALS164
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER

RECEIVE/TRANSMIT FUNCTION TABLE

H = high level, L = low level, R = receive. T = transmit, X = irrelevant
Direction of 'data transmission is from the terminal side to the bus side, and the direction of data receiving is from the
bus side to the terminal side. Oats transfer is noninverting in both directions.
t ATN is a normal transceiver channel that functions additionally as an internal direction control or talk enable for EOI
whenever the DC and TE inputs are in the same state. When DC and TE are in opposite states, the ATN channel functions
as an independent transceiver only.
ATN+EOI FUNCTION TABLE
INPUTS
ATN

EOI

OUTPUT
ATN+EOI

H

X

H

X

H

H

L

L

L

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • OALLAS. TEXAS 75266

2-727

SN75ALS164
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
schematics of inputs and outputs
TYPICAL OF SRQ; NDAC, and NRFD
GPIB 1/0 PORT

EQUIVALENT OF ALL
CONTROL INPUTS

~---rr~-----~'r---~--_.--vcc

Vee --9::-k,--n-,.---NOM

1.7 kl1

10 k11

NOM

NOM

INPUT

GND~

___

~_~~

~-~~~~_~_-_-_~~---~----GNO
INPUT/OUTPUT
PORT

Circuit inside dashed lines is on GPIB I/O ports only.
TYPICAL OF ALL 1/0 PORTS
EXCEPT SRQ, NDAC, and NRFD GPIB 1/0 PORTS

ATN+EOIOUTPUT
--~-----~vcc

~~-~---_r~-~r_--~--_.-vcc

OUTPUT

--~~~-~~~-~+_~-~----GNO

INPUT/OUTPUT
PORT

Driver output Req = 30 n NOM
Receiver output Req = 110 n NOM

---~--__~GNO

Circuit inside dashed lines is on GPIB 110 ports only.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vec (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Low-level driver output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 100 inA
Continuous total dissipation at (or below) 25 DC free-air temperature (see Note 2):
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1350 mW
N package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1700 mW
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooC to 70 DC
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65 DC to 1 50 DC
Lead temperature 1,6 mm (1/16) inch from the case for 10 seconds: DWor N package .... 260°C
NOTES:

1. All voltage values are with respect to network ground terminal.
2. For operation above 25°e free-air temperature, derate the OW packagll to 864 mW at 70 0 e at the rate of 10.8 mw/oe,
and derate the N package to 1088 mW at 70 0 e at the rate of 13.6 mw/oe.

TEXAS . "
INSTRUMENTS
2-728

POST OFFICE BOX 855303 • DALLAS. TEXAS 75285

SN75ALS164
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
recommended operating conditions
Supply voltage, Vee
High'level input voltage, VIH

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

2

V

_.•. __ ...

low·level input voltage. Vil

0.8
Bus ports with 3-state outputs

High-level output current. IOH

Low-level output current, IOL

-5.2

Terminal ports

-800

ATN+EOI

-400

Bus ports

._-_.-

48

Terminai ports

16

ATN+EOI

V
mA
MA

mA

4

Operating fre.e-air temperature, T A

0

70

°e

electrical characteristics over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted)
PARAMETER

TEST CONDITIONS

VIK

Input clamp voltage

Vhys

Hysteresis IVT + - VT. .I.J Bus

---

Val

II

V

2.7
2.5

3.5
3.3

V

16 mA

0.3

0.5

10l - 48 mA

0.35

0.5

ATN + EOI

IOl

Input current at

-Termmal§

VI

maximum input voltage

ATN, EOI

VI - 5.5 V

High-level input current

Low-level input current

2.7

~

VI

~

~
~

~

4 mA
5.5 V

0.2

Voltage at bus port

2.7 V

0.1

VI - 2.7 V

= 0.5

V

-10 -100
-500

VI

2.5

Il(busl - 0

Power on

Driver disabled

- 1.5 V to 0.4 V

Vl(busl

~

2.5 V to 3.7 V

Vl(busl

~

3.7 V to 5 V

Vl(busl - 5 V to 5.5 V

Short-circuit output current

Ice

Supply current

Ci/o(busl

Bus-port capacitance

Power off

Vec - 0,

3.0

12 mA

Vl(busl - 0.4 V to 2.5 V

.---

20

3.7

MA

1.5

+2.5
-3.2
2.5
-40
-35

Bus
ATN+EOI

-25
-10

-50 -125

TE, DC, and SC low
5 V to 0,

Vila

~

0 to 2 V, f

~

1 MHz

mA

2.5

0
0.7
-15

~

V

-3.2

0

Vl(busl - 0 to 2.5 V

Vec

p.A

-1.3

Terminal

No load.

MA

40

.VI - 0.5 V
Driver disabled

Current into bus pon

100
200

control

control

V

0.4

Il(busl Vl(busl -

lOS

0.65

10l

ATN, EOI

1li0Ibusi

V

0.4

Bus

Terminal

VI/Olbusl

UNIT

- 1.5

Terminal

Low-level output voltage

-Sus

ATN. EOI
III

MAX

-0.8

ATN+EOI

High-level output voltage

Terminal

IIH

MIN Typt

-18mA

10H _. -800 MA
10H - -5.2 mA
···400 MA
10H

Terminal

VOH;

~_

MA

-75
mA

- 100
55
30

75

mA
pF

t All typical values are at Vee ~ 5 V, TA ~ 25°C.
'VOH applies for 3-state outputs only.
§ Except ATN and EOI terminal pins.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-729

SN75ALS164
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
switching characteristics over recommended range of operating free·air temperature (unless otherwise
noted). Vee - 5 V
PARAMETER

FROM

TO

Terminal

Bus

TEST
CONDITIONS

Propagation delay time,
tpLH

low-to-high-Ievel output
Propagation delay time,

tPHL

CL = 30 pF,
See Figure 1

high-to-Iow-Ievel output
Propagation delay time

tpLH
tpHL

tpLH

low-to-high-Ievel output
Propagation delay time,

Terminal

CL = 30 pF,
See Figure 2

high-to-Iow-Ievel output
Propagation delay time,
low-to-high-Ievel output
Propagation delay time,

tPHL

Bus

high-to-Iow-Ievel output

tpZH

Output enable time to high level

tpHZ

Output disable time from high level

tpZL

Output enable time to low level

tpLZ

Output disable time from loW level

tpZH

Output enable time to high level

tpHZ

Output disable time from high level

tPZL

Output enable time to low level

tpLZ

Output disable time from low level

Terminal ATN
or

SC

12

20

5

10

7

14

ns

ns

ns

ATN+EOI

CL=15pF,
See Figure 3

7

15

ns

BUS

30

(ATTN, EOI,

CL = 15 pF,

20

REN,IFC,

See Figure 4

45

and DAV)

ns

20
30

Terminal

CL = 15 pF,

25

See Figure 5

30

SC

TEXAS , . ,
INSTRUMENTS
2-730

20

10

TE, DC,
or

10

UNIT

3.5

Terminal EOI

or

MAX

CL = 15 pF,
See Figure 3

Terminal ATN

TE, DC,

TYP

ATN+EOI

Terminal EOI
or

MIN

POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

25

ns

SN75ALS164
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION
5V

4.3V

240 f!

200f!
FROM (BUS)
OUTPUT UNDER--4'-'---4~-4~TEST POINT
TEST

J

CL = 30 pF
(See Note A)

FROM (TERMINAL)
OUTPUT UNDER
--e~---~~t--TESTPOINT
TEST

J

480 f!
":"

LOAD CIRCUIT

= 30pF

3kf!

(See Note A)

LOAD CIRCUIT

~-----_- -

TERMINAL
INPUT

CL

-

--3V

1.5V

1.5V

BUS
INPUT

(See Note B)

L,.5V

--I: .

(S.e Note B)

\-1~: - -30v
V

•

tPLH-j4+I
tPHL~
I_-----...,.:t---VOH

BUS
OUTPUT

TERMINAL.
OUTPUT

2.2V

1.5V

VOLTAGE WAVEFORMS

VOLTAGE WAVEFORMS

FIGURE 1. TERMINAL-TO-BUS
PROPAGATION DELAY TIMES
TEST
POINT

1.5V

FIGURE 2. BUS-TO-TERMINAL
PROPAGATION DELAY TIMES

VCC

2kf!

FROM
ATN+EOI
VOLTAGE WAVEFORMS

(See Note C)

LOAD CIRCUIT

FIGURE 3. ATN+EOI PROPAGATION DELAY TIMES
NOTES:

A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR :5 1 MHz, 50% duty cycle, tr :S 6 n5 ,
tf s6 ns, Zout = 50 O.
C. All diodes are 1 N916 or 1 N3064.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

2-731

SN75ALS164
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION
Sl

FROM (BUSI
OUTPUT UNDER .........TEST

Sl

0--5 V

200n

240n

FROM (TERMINALI
OUTPUT
- - 1....--~~--. .-TEST POINT
UNDER TEST

....~-...- TEST POINT

J(see
CL

= 15 pF

480 n

CL = 15 pF

Note AI '::'

(See Note AI

J

LOAD CIRCUIT

3V

'I'' - _______ J "f' - - - - -

OV

V

1.5 V

tpHZ-+!

t--

"1.5 V

__ J

tPZH....j

(See Note BI

~

I I r------h;
I I
I
2V
I
I
OPEN';;'-'_"":"J
tpz L --\4---+1

BUS
OUTPUT
SI CLOSED

tp LZ

--""'\¥,--------" r-----

3V
CONTROL
15
~
INPUT __ J ' "
V (See
Note BI J 1'1.5_____
V
I '-• __
._ _____
OV

Ii'

VOH

BUS
OUTPUT
Sl

---l..t

tpZH-+(
TERMINAL
I
OUTPUT
I
S10PEN

0V

1
~I, .. 3.5 V
\!1.0V
' \......_ _ _ _ _....J 0.5V
- - VOL

I

tPHZ-+j

I

(4-

-- - ---

1.5V

1

I

VOH

90%

I

tPLZ~

OV

VOLTAGE WAVEFORMS

FIGURE 5. TERMINAL ENABLE
AND DISABLE TIMES

FIGURE 4. BUS ENABLE AND
DISABLE TIMES

A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR
tf ,,6 ns. Zout = 500.

TEXAS . "

INSTRUMENTS
2-732

r--

tPZL--!

VOLTAGE WAVEFORMS

NOTES:

3kn

LOAD CIRCUIT

---. ,-------"""'\ r----CONTROL
INPUT

0--4.3 V

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

:s

1 MHz, 50% duty cycle, tr .:s; 6 n5 ,

SN75ALS164
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
TERMINAL HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
4.0

>I

.,

3.5

..e-

..........

2.5

0

2.0

"0

::J

t\.
"\~

i:.

J:'"
I

J:
0

>

&

1.0

Qj

.,:-

'\.

~

0
.J

I

\.

.J

-5

-10 -15 -20

/

>

o

-25 -30 -35 -40

IOH-High-Level Output Current-rnA

V

/

/'

~
,

0.1

0

"It\.
o

/

.J

0.2

/

/

0.3

0

0.5

o

0.4

e-::J

'\

1.5

lcc=5 lv
0.5 f----·
TA = 25°C

:l

.."

"0

>

'\

::J

.,>

>I

TA=25°C-

Qj

.J

0.6

VC~=5IV

:l'" 3.0

>

TERMINAL LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT

o

10

20

30

40

50

60

IOL -Low-Level Output Current-rnA

FIGURE 6

FIGURE 7
TERMINAL OUTPUT VOLTAGE
vs
BUS INPUT VOLTAGE
4.0
3.5

>I

.,
'"
~

..e-

~

3.0
2.5
2.0

::J

I
I

::J

1.5

>

1.0

0
I
0

VCC=5V
No load
TA = 25°C

I

VT-

VT+

+-- _. 1-- I--

0.5

o
o

i
0.2 0_4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VI-Input Voltage-V

FIGURE 8

TEXAS·.
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 76265

2-733

SN75ALS164
OCTAL GENERAL·PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
BUS HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT

4

&

~

3

..e-,.

~

,.

0
a;

2

.....

0.6

I

>I

.£!

BUS LOW-LEVEL OUTPUT VOLTAGE
vs
LOW·LEVEL OUTPUT CURRENT

VCC=5V
TA = 25°C

~

'"

J:'"

I
::J:
0

0.5

>

..e-,.

0.4

0
a;

0.3

~

0.2

>

0.1

-20

....

~

...I
...0
0

~~

-30

-40

-50

o

-60

o

10

70 80 90 100

FIGURE 10
BUS CURRENT
vs
BUS VOLTAGE

VCC= 5V
No load
TA = 25°C

2

3r-~---+---r--~--+---~-+--~

I

c:(

E

.!.c

t

~

2r-~---+--~--~--+---r--+--~

~

9

:;
;
III
1.
;

-1

u

...

g

~

OL-~

0.9

__

1.0

~

__- L_ _

1.1

1.2

~_ _~_ _L-~__~

1.3

1.4

1.5 1.6

1.7
VI/O(bus)-Bus Voltage-V

VI-Input Voltage-V

FIGURE 11

FIGURE 12

TEXAS . "

INSTRUMENTS
2-734

20 30 40 50 60

IOL -Low-Level Output Current-mA

BUS OUTPUT VOLTAGE
vs
TERMINAL INPUT VOLTAGE

;

/

V

/

/

FIGURE 9

~

V

/

/'

IOH-High·Level Output Current-mA

>

./

VV

>

>

-10

..
E
,.

~

.i:.

o

VCC=5V
TA = 25°C

'0

>

o

>I

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN75ALS165
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
03011 JUNE 19B6-REVISED AUGUST 19B9

MEETS IEEE STANDARD 488-1978 (GPIB)
ow OR N PACKAGE

• 8-Channel Bidirectional Transceiver

(TOP VIEW)

• High-Speed Advanced Low-Power Schottky
Circuitry
• Low Power Dissipation ... 46 mW Max per
Channel
• Fast Propagation Times ... 20 ns Max
• High-Impedance P-N-P Inputs

Vee

TE
81
82
83
84
85
86
B7
B8
GNO

BUS
I/O PORTS

• Receiver Hysteresis ... 650 mV Typ
• No Loading of Bus When Device Is
Powered Down 0Jcc =0)

01
02
03
04
05
06
07
08
PE

TERMINAL
I/O PORTS

• Power-Up/Power-Down Protection
(Glitch-Free)
FUNCTION TABLES

• Driver and Receiver Can Be Disabled
Simultaneously

EACH DRIVER

EACH RECEIVER

INPUTS

description

0
H
L
H
X

TE
H
H

OUTPUT
PE
B
H
H

INPUTS

OUTPUT

B

TE

L

L

0
L

PE
H
H

The SN75ALS165 eight-channel general-purpose
X
L
H
L
H
interface bus transceiver is a monolithic,
zt
X
L
X
H
Z
X
zt
high-speed, Advanced Low-Power Schottky
X
L
x X L
Z
device
designed
for
two-way
data
H = high level, L = low level, X = irrelevant,
communications over single-ended transmission
Z = high impedance state
t This is the high impedance state of a normal3·state output
lines. It is designed to meet the requirements of
modified by the internal resistors to Vee and ground.
IEEE Standard 488-1978. The transceiver
features driver outputs that can be operated in
either the passive-pullup or 3-state mode. If Talk
Enable (TE) is high, these ports have the characteristics of passive-pullup outputs when Pullup Enable (PE) is
low and of 3-state outputs when PE is high. Taking TE low places these ports in the high-impedance state. Taking
TE and PE low places both the drivers and receivers in the high-impedance state. The driver outputs are
designed to handle loads up to 48 mA of sink current.
An active turn-off feature is incorporated into the bus-terminating resistors so that the device exhibits a high
impedance to the bus when Vee =0, When combined with the SN75ALS161 or SN75ALS162 management bus
transceiver, the pair provides the complete 16-wire interface for the IEEE 488 bus.
The SN75ALS165 is manufactured in a 20-pin package and is characterized for operation from O°C to 70°C,

PRODUCTION DATA documents. contain
information current as of publication date.
Products conform to specifications perthe terms
of Texas Instruments standard warranty.
Production processing does not necessarily
Include testing of all parameters.

Copyright © 1989. Texas Instruments Incorporated

TEXAS ."

INSTRUMENlS

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-735

SN75ALS165
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
logic symbol t

logic diagram (positive logic)
PE 1111

"-

TE

v-

~

~~

1191

rI..,

01 - - - - - -

Bl

I
B2

02

r-t'f -~

1181

r-L

B3

~--

~I

l--t-5

B4
B5

03

B6

1171

~l

['1'

B8

04

Publication 617-12.
'V Designates 3-state outputs
~ Designates passive-pull up outputs

141

1151

),;11

r-L
"(

(141

(51

""

"

['1'

Ai
'"

161

),;11

(7)

'---

L------

-<&1
08

81

"(

I
06

131

'...

"
So

"
Oi
.,,.

vdc= 5 1V
TA=25°C-

0

2_0

-'

1_5

>

o

l!
"6

.."

>

'\

0_5

o

-5

0_5 -TA=25°C

&

'\

.i:.
:i:'" 1_0
I
X
0

l'

~

2_5

tC=5 IV

0.4

So

"

.,,.

""

-10 -15 -20

V

Oi

-'

~

'"

V

0_1

>

"~

/

0_2

-'
I
-'
0

/

/

0_3

0

o

-25 -30 -35 -40

o

IOH-High-Level Output Current-mA

10

20

FIGURE 7
TERMINAL OUTPUT VOLTAGE

vs
BUS INPUT VOLTAGE
4_0
VCC=5V
No load
TA = 25°C

3_5

.,
'"
l!

."

-

3_0

I

2_5

"6

>

~

0
I
0

>

I

2_0
I

1_5

!

1_

VT_

I

VT+
i

1_0
0_5

oo

0_2 0_4 0_6 0_8 1_0 1_2 1_4 1_6 1_8 2_0
VI-Input Voltage-V

FIGURE 8

TEXAS ~

2-742

30

40

50

IOL -Low-Level Output Current-mA

FIGURE 6

>I

V

/

/

IN~UMEN1S
pOST OFFICE BOX 666303 • DALLAS, TEXAS 75265

60

SN75ALS165
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
BUS LOW·LEVEL OUTPUT VOLTAGE

BUS H IGH·LEVEL OUTPUT VOLTAGE

vs

vs

BUS HIGH·LEVEL OUTPUT CURRENT

BUS LOW·LEVEL OUTPUT CURRENT

4

>I

&
l!

.."

-0

3

>

S-

"
-;;

0

..

"

2

>

..J

J::

.2'
:I:
I
:I:
0

o

Vcc = 5 V
TA = 25°C

>I

..'"

0.5

>

."

0.4

0

0.3

/'

l!
-0

""

S-

\.

'\

"
-;;

..

-10

-20

/

~'\

-30

..J

~
..J

0.2

I

..J

~

~

-40

-50

/

V

V

,/

/V

>

>

o

0.6

vcc l= 5 V
TA=25°C

I

/

/

0.1

I

o

-60

o

10

IOH-High·Level Output Current-mA

20 30

40

50 60

70 80 90 100

IOL -Low· Level Output Current-mA

FIGURE 10

FIGURE 9
BUS OUTPUT VOLTAGE

vs
TERMINAL INPUT VOLTAGE

VCC= 5V
No load

TA = 25°C

>

3r--1---+--~--~--+-~~-+--~

I

&

l!
-0

>

;

;

2r--1---+---r--~--+---r--+--4

9o
>

O~~

0.9

__

1.0

~

__

1.1

~

__

1.2

~

__

1.3

~

__

1.4

~~

__

1.5 1.6

~

1.7

VI-Input Voltage-V

FIGURE 11

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-743

2-744

SN75ALS170
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
03040. AUGUST 1987-REVISEO MAY 1990

J PACKAGE

•

Three Bidirectional Transceivers

•

Driver Meets EIA Standards RS-422A and
RS-485 and CCITT Recommendations V.11
and X.27 and ANSI Standard X3.131-1986

(TOP VIEW)

•

High-Speed Advanced Low-Power Schottky
Circuitry

•

Designed for 25-MBaud Operation in Both
Serial and Parallel Applications

•
•

Low Skew ... 6 ns Max

•

Low Supply Current Requirements
90 rnA Max
Wide Positive and Negative Input/Output
Bus Voltage Ranges

•
•
•

Driver Output Capacity •••

±

19
1A
Vee

29
2A

39
3A

Function Table
(each driver)

Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments

•

•
•
•
•
•

1D
1DIR 2
GND 3
2D 4
2DIR 5
3D 6
3DIR 7

OUTPUTS

INPUT
D

DIR

H

H

H

L

L

H

L

H

X

L

Z

Z

A

B

60mA
Function Table
(each receiver)

Thermal Shutdown Protection
Driver Positive and Negative Current
Limiting

DIFFERENTIAL INPUTS
A-B

DIR

OUTPUT
R

VID "O.3V

L

H

-O.3V -{I1t+lo:10H
1*-=l
L

-=-=

+-IOH

FIGURE 8. RECEIVER VOH AND VOL

TEXAS ."

INSTRUMENTS
2-754

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN75ALS170
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION

~

--3V

INPUT
GENERATOR

51 n

(See Note A)

1.5 V

.

1.5V-~.. ~~

I 1.5 V

I

I

I

~tPHL

tPLH~

0 V

~

oV----'

OUTPUT

-:--

1.3 V

VOH

1.3 V

VOL
TEST CIRCUIT

VOL TAGE WAVEFORMS

FIGURE 9. RECEIVER PROPAGATION DELAY TIMES
1.5V
S2

2kS!

-1.5V--o

>---"'--~"""'--1.-"'-"""'IIr--<:r 0 - -

5V

lN916 OR EOUIVALENT

GENERATOR

50 S!

ISee Note Al

TEST CIRCUIT
-----3V

~

INPUT

-

I

Sltol.5V
___ 1.5VS20pen
S3 closed

I
tpZH

-+f

I
I

OV

Slto-l.5V
0 V S2 closed
S3 open

I
tPZL~

~

I

OUTPUT

INPUTJt--~==:.:V

~

VOH

I1--~4'5V

1.5 V

OUTPUT

----OV

~
1.5 V

VOL

---3V

~

INPUT

1.5 V

I
I

~

--3V

Sltol.5V
S2 closed
S3 closed

OUTPUT

I

~
:

VOH

----

.

:

0 V

---~1.3V

~

OUTPUT

'" - -

Sl to -1.5 V
S2 closed
S3 closed

1.5 V

I
I
tPLZ~

0 V

tPHZ~

'5V

I

INPUT

O.5V

~1.3V

VOL

VOL TAGE WAVEFORMS

FIGURE 10. RECEIVER OUTPUT ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteriStics: PRR" 1 MHz, 50% duty cycle, t r " 6 ns, If" 6 ns,
Zo = 50 C.
B. CL includes probe and jig capacitance.

TEXAS ."
INSTRUMENTS
POST OFFICE BOX 656303 • DAUAS, TeXAS 75265

2-755

SN75ALS170
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
DRIVER HIGH-LEVEL OUTPUT VOLTAGE
vs
DRIVER HIGH-LEVEL OUTPUT CURRENT

5

!

4

~

3_5

i

3

o

2_5

~
~

2

-§,

1.5

=

5

I
VCC=5V
TA = 25°C

~ 4_5
II

DRIVER LOW-LEVEL OUTPUT VOLTAGE
vs
DRIVER LOW-LEVEL OUTPUT CURRENT

r--

4_5

>
I

II
CD

-i>

.............

~

.........

4

0

...>

J

I

2_5

----

2

II

J:

I

3

"-

"\

I

3_5

=
=
a;

I'-....

VCC=5V
-TA = 25°C

1_5

3

I

...

I
0

J:

~ 0_5

o
o

>
-20

-40

-60

-80

".

0_5

o

-100 -120

o

IOH-High-Level Output Current-mA

80
100
120
20
40
60
IOL - Low-Level Output Current - mA

FIGURE 12

FIGURE 11

DRIVER DIFFERENTIAL OUTPUT VOLTAGE
vs
DRIVER OUTPUT CURRENT

4

=t

t

..S.

(5

>

o"
OJ

I

3_5

......

3

2.5

......

. . . 1"-

2

......

'\

1_5

=

1\

is

\

I

g 0_5

\

>

o

o

10 20 30 40 50 60 70 80 90 100
10 - Output Current-mA

FIGURE 13

TEXAS •
INSTRUMENTS
2-756

-

:-.......

.~

~

I

VCC=5V
TA = 25°C

:-.......

II

POST OFFICE BOX 655303 • DALLAS, TEXAS 76265

SN75ALS170
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
TYPICAL CHARACTERISTICS

>I

..-a.'"

.."

3

~

"
>

....I
.z:;

S-

o"

~VCC

= 5.25 V
'\: ~ ~'/V~C';5V'-

2

:t'"

:; 3

~~

0;

~

Vee = 4_75 V

I

J:

0

>

o
o

-

;!;

~~

0

..

~4

r-....

>

S-

RECEIVER HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
5
VCC = 5 V
VIO = 300 mV
>
I
IOH = -440/LA

RECEIVER HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5
VID = 0.3 V
TA = 25 DC
4

a;

~ 2
~

'\: ~
'\: ~

f

~1

o

~~

>

o

-10
-20
-30
-40
-50
IOH-High-Level Output Current-mA

-40 -20 o
20 40
60 80 100 120
T A - Free-Air Temperature - DC

FIGURE 14

>I

8.

l!

RECEIVER LOW-LEVEL OUTPUT VOLTAGE
vs
RECEIVER LOW-LEVEL OUTPUT CURRENT
0.6
Vec - 5 V
TA = 25 DC
0.5
VIO = -300 mV

/
./

.."

0.4

0

0.3

/

is

>

0;

li

....I

~

0.2

0

....I

I
....I
0 0.1

"

V

/

RECEIVER LOW-LEVEL OUTPUT VOLT AGE
vs
FREE-AIR TEMPERATURE

0.6

>

I 0.5

"'"

~
o

> 0.4
:;
Q.
:;

//

S-

"

FIGURE 15

/'

00_3

a;

.
>

Vec = 5 V
VIO = -300 mV
IOL = 8 mA

--

....I

~

o

0.2

....I

I

....I

>

~0.1

o

o

5

10

15

20

25

30

IOL -Low Level Output Current-mA

o

-40 -20

o 20 40 60 80 100 120
TA-Free-Air Temperature- De

FIGURE 16

FIGURE 17

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-757

TYPICAL CHARACTERISTICS
RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE
5

VIO = 0.3 V
Load ~ 8 kO to ground
TA - 25°e

-~~-fvee

4

>
1
8,
!!

o

= 5.25 V
tl

3 ,..--Vee - 4.75 V
"-Vee = 5 V

>

:;

c.

c3

2

1

o

>

o

o

0.5

2

1.5

3

2.5

VI-Enable Voltage-V

FIGURE 18
RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE
6

5

VIO - -0.3 V
Load = 1 kO to Vee
TA - 25°e

>

Vee =15

o

>

:;

Vee = 4.75 V

I

1

8, 4
!!

vee' = 5.2J V

vi

3

S

o
1
o
>

2

o

o

0.5

1.5

2

2.5

VI-Enable Voltage-V

FIGURE 19

TEXAS ."

INSTRUMENlS
2-758

POST OFFICE BOX 666303 • DALLAS. TEXAS 15265

3

SN75ALS170
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
APPLICATION INFORMATION
113 SN75ALS170

1/3 SN75ALS170

b---~~----~------·----~f~-----------.----~~---a
(See

Note A)

UPTO 32
TRANSCEIVERS

...

FIGURE 20. TYPICAL APPLICATION CIRCUIT
NOTE A:

The line should be terminated at both ends in ns characteriStic impedance. Stub lengths off the main line should be kept as short as
possible.

4 V TO 5.25 V

4 V TO 5.25 V

330 !l

330 !l

150 !l

150 !l

330 !l

330 !l
UP TO 8

TRANSCEIVERS

•••

FIGURE 21.

TYPICAL DIFFERENTIAL SCSI APPLICATION CIRCUIT

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-759

SN75ALS170
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
APPLICATION INFORMATION

FE

'DO

'"'

'02

l~

r-;-

,
9

!
6
8

~;r-- ~~~

SN76ALS170

~

~

,

1308111

I>

:~-DBlll

I>

:~

~;N 'JT[i:iJ

4

EN

, ~!N

,.
DBIOI

.~-DB(OI

'JT[~

8

'"

SB6
SB5

".

'"

SB2

'"

S8'

SBP

'Nrr
TO SC$IBUS

CONTftOLlER

MSG

ACK
ATN

TARGET
MSG
CID

0/0

-c/o

REO
BSYOUT

BSVIN
SElOUT
SELIN
SBEN
AR8

5N75AL5170

~

~'
rr==
,. ....,
SEo.
SEN2

.j..

" ~
..!;~
,
.r[ ~ ,.
~
~"
, ;
8

'-'-'9

TO RESET 'OGOC {

·

. · iJ
. ·, ; ~
V

1

.r[

.r[

-SEL

"

~

SN75ALSl71

FIGURE 22. TYPICAL DIFFERENTIAL SCSI BUS INTERFACE IMPLEMENTATION

TEXAS ."

2-760

INsTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
03041,

• Three Bidirectional Transceivers

1987-REVISEO MAY 1990

J PACKAGE
(fop VIEW)

• Driver Meets EIA Standards RS-422A and
RS-485 and CCITT Recommendations V.11
and X.27 and ANSI Standard X3.131-1986
• High-Speed Advanced Low-Power Schottky
Circuitry

1R
10E
10

1B
1A
RE

GNO
GNO

vee

COE

2R
20E

• Designed for 25-MBaud Operation in Both
Serial and Parallel Applications

2B

• Low Skew ... 6 ns Max
30E

• Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments

......_.......r

2A
3B
3A
30

FUNCTION TABLE (EACH DRIVER)

• Features Independent Driver Enables and
Combined Receiver Enables

ENABLE

INPUT

OUTPUTS

D

DE

CDE

A

B

• Wide Positive and Negative Input/Output
Bus Voltages Ranges

H

H

H

H

L

H

H

L

• Driver Output Capacity ... ± 60 mA

X

x

L
X

X
L

Z
Z

L
H
Z
Z

• Thermal Shutdown Protection
FUNCTION TABLE (EACH RECEIVER)

• Driver Positive and Negative Current
Limiting

DIFFERENTIAL INPUTS

ENABLE

A-B

Ai:

R

L

H

-0.3 V < VIO < 0.3 V

L

VIO:S -0.3 V
X

L

?
L
Z

VIO

• Receiver Input Impedances ... 12 kQ Min
• Receiver Input Sensitivity •.•

±

300 mV Max

• Receiver Input Hysteresis ... 60 mV Typ

2:

0.3 V

H

OUTPUT

H ~ high level, L ~ low level, ? ~ indeterminate,
X ~ irrelevant, Z ~ high impedance (off)

• Operates from a Single 5-V Supply
• Glitch-Free Power-Up and Power-Down
Protection
• Low Supply Current Requirements
90 mA Max
description

The SN75ALS171 triple differential bus transceiver is a monolithic integrated circuit designed for bidirectional
data communication on multipoint bus transmission lines, It is designed for balanced transmission lines and
the driver meets EIA Standards RS-422-A and RS-485 and eelD recommendations V, 11 and X,27 and ANSI
Standard X3,131-1986.
The SN75ALS171 operates from a single 5-V power supply, The drivers and receivers have individual activehigh and active-low enables, respectively, which can be externally connected together to function as a
direction control. The driver differential output and the receiver differential input pairs are connected internally
to form differential input/output (I/O) bus ports that are deSigned to offer minimum loading to the bus when the
driver is disabled or Vee is at a v. These ports feature wide positive and negative common-mode voltage
ranges making the device suitable for party-line applications,
The SN75ALS171 is characterized for operation from aoe to 7aoe,
PRODUCTION DATA documents contain information
current 8S of publication date. Products conform to
specifications per the terms of Taxas Instruments

=~~~~:~~i~8r::'~~e ~!:~~~i:; :,~O::i:::::t:;s~s not

Copyright © 1990, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-761

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
, logic symbolt

logic diagram (positive logic)

COE 17

G5

10E 2

5EN1

20E 7

5EN2

17
COE-2--~'-~~______'
10E--r-..._--,
10 .-:..3-+_ _ _ _ _ _--1

RE

5EN3

18

19

lR~~--______-+~~r-~~2~011A}8US
....r:>-e----- 1B

r ....._ .....-:1:=-9 1A
20 18

7

20E--r-""_~

8

20---+---------+~

142A
15 28

2R

14
15

.-:..6-+__________t---e----2B
10
30E ----"""'---__,
12 3A
13 38

3D

11
--------------/--1

3R ...;._9_ _ _ _ _ _ _--<::.0

12
13, 3A} BUS

....r:>-e----- 3B
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

schematics of Inputs and outputs
EOUIVALENT OF EACH INPUT
VCC

-----

TYPICAL OF RECEIVER OUTPUT

TYPICAL OF A AND 8 1/0 PORTS
VCC~~'-------.

85 n
NOM

Req

INPUT
A OR B

3 kll
NOM
OUTPUT

18 kll
NOM

Driver Input: Req - 12 kll NOM
Enable Inputs: Req - 8 kll NOM

1.1 kO
NOM

TEXAS •
INSTRUMENTS
2-762

VCC

POST OFFICE BOX 656303 • DALLAS, TEXAS 75265

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vec (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Voltage at any bus terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -10 V to 15 V
Enable input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ooe to 70°C
Storage temperature range ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds ............. <. • • • • • • • • • • • • • • • •• 300·e
NOTE 1: All voltage values, except differential I/O bus voltage, are with respect to network ground terminal.

DISSPATION RATING TABLE
PACKAGE

J

TA,,2S·C

DERATING FACTOR

TA=70·C

POWER RATING

ABOVE TA = 2S·C

POWER RATING

1025mW

8.2mW/"C

656mW

recommended operating conditions
Supply voltage, VCC

MIN

TYP

MAX

4.75

5

5.25

V

12

V

-7

Voltage at any bus terminal (separately or common mode), VI or VIC
High-level input voltage, VIH

D, CDE, DE, and RE

Low-level input voltage, VIL

D, CDE, DE, and RE

V

2
0.8

V

",12

V

-60

rnA

-400

!lA

Differential input voltage, VID (see Note 2)
High-level output current, 10H
Low-level output current, 10L

Driver
Receiver
Driver

60

Receiver

Operating free"air temperature, TA

UNIT

8
0

70

rnA
·C

NOTE 2: Differential-input/output bus voltage IS measured at the nomnvertlng terminal A With respect to the Inverting terminal B.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-763

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
DRIVER SECTION

driver electrical characteristics over recommended ranges of supply voltage and operating freeair temperature (unless otherwise noted)
TEST CONDITIONSt

PARAMETER

VIK
Vo

Input clamp volta(le
Output voltage

VOH

High-level output voltage

MIN

TVP;

II = -18mA
10 =0
VCC - 4.75 V,
VIH = 2V,

0
10H = -55mA

MAX

UNIT

-1.5

V

6

V

2.7

V

VIL = 0.8 V
VOL

Low-level output voltage

VCC - 4.75 V,
VIL = 0.8 V,

I VODll

Differential output voltage

10 - 0

I VOD21

RL= lOOn,

Differential output voltage

VOD3

Differential output voltage

AIVODI

Change in magnitude of
differential output voltage§

VOC

Common-mode output voltage

AIVocl

Change in magnitude of
common-mode output voltage§

10

Output current

IIH

High-level enable-input current

VIH - 2V,
10L = 55mA
1.5
See Figure 1

See Figure 1
RL - 54 .11,
Vtest = -7 V to 12 V, See Figure 2

RL = 54.11 or 100 .11,

1.7

V

6

V

1/2VODI
2
1.5
1.5

V
2.5

5
5

V
V

±0.2

V

+3

See Figure 1

-I
±0.2

Output disabled,
See Note 3
Dand DE
CDE
Dand DE
CDE

1
-0.8
20

Va - 12V
Va = -7V
VIH=2.7V

60
-100

IlL

Low-level enable-input current

Va - -7V

900
-250

lOS

Short-circuit output current~

Va = 0

-150

IcC

Supply current

No load

VIL = 0.4 V

250
250

Va - VCC
Va -12V

IOutputs enabled
IOutputs disabled

69
57

90
78

V
V

rnA

!lA

rnA

rnA

t The power-off measurement In EIA Standard RS-422-A applies to disabled outputs only and is not applied to combined inputs and outputs.

*

All typical values are at VCC = 5 V and TA = 25°C.

§ A I VOD I and A I VOC I are the changes in magnitude of VOD and VOC respectively, that occur when the Input is changed from a high level
\0 a low level.
.

~ Duration of the short-circuit current should not exceed one second.
NOTE 3: This applies for both power on and off; refer to EIA Standard RS-485 for exact conditions. The RS-422-A limit does not apply for a
combined driver and receiver terminal.

TEXAS •
INSTRUMENTS
2-764

POST OFFICE BOX 655303 • DALLAS, TEXAS 75266

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
driver switching characteristics over recommended ranges of supply voltage and operating freeair temperature (unless otherwise noted)
PARAMETER

TEST CONDITIONS
RL = 54n.
See Figure 3

too

Differential-output delay time

Skew (I tDDH-tDDL I )

CL

tTO

Differential-output transition time

RL2 - 75

CL = 60 pF.
See Figure 6

VTERM = 5 V.

RL - 54 n.
See Figure 3

CL - 50 pF.

RU - RL3 - 165 n.

RL2 - 75
See Figure 6

RU

= RL3

TYpt

MAX

3

8

13

3

8

13

1

6

1

6

3

8

13

3

8

13

n.

RU - RL3 - 165 n.

CL = 60 pF.
RL = 54n.
See Figure 3

MIN

= 50 pF.

ns

ns

n.

CL = 50 pF.

= 165 n.

RL2 - 75

n.

CL = 60 pF.
See Figure 6

VTERM = 5 V.

ns

tpZH

Output enable time to high level

RL = lIon.

See Figure 4

30

50

tpZL
tpHZ
tpLZ

Output enable time to low level
Output disable time from high level
Output disable time from low level

RL - lIOn.
RL - 110 n.
RL = lIOn.

See Figure 5
See Figure 4
See Figure 5

3

30
8
8

50
13
13

tpDE

Differential-output enable time
Differential-output disable time

RU - RL3 - 165 n.
CL = 60 pF.

RL2 - 75
See Figure 7

8
5

30
10

45
15

tpDZ

t All typical values are at VCC = 5 V and TA

UNIT

3

n.

ns
ns
ns
ns
ns
ns ---'

= 25°C.

SYMBOL EQUIVALENTS
DATA SHEET PARAMETER

RS-422·A

RS·485

Vo

Voa. Vob
Vo
Vt (RL - lOOn)

Voa. Vob
VO
Vt (RL - 54n)

I VODll
I VOD21

Vt (Test Termination

I VOD31

Measurement 2)

Vtest
AIVODI
Voe
AIVoel
lOS

10

--

Vtst

'it

II Vt I-I II
I Vos I

II VtI - I Vt II

I Vos - Vos I

I Vos - Vos I

Iisal.llsb I
Ilxal.llxbl

lia.lib

IVos I

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-765

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
RECEIVER SECTION
receiver electrical characteristics over recommended ranges of common-mode input voltage,
supply voltage, and operating free-air temperature (unless otherwise noted)
PARAMETER

TEST CONDITIONS

VTH

Differential:input high-threshold voltage

Va - 2.7 V,

10 - -0.4 rnA

VTl

Differential-input low-threshold voltage

Va = 0.5 V,

10=8mA

Vhvs
VIK

Hysteresis§
Enable-input clamp voltage

11= -18 rnA

VOH

High-level output voltage

Val

low-level output voltage

10Z

High-impedance-state output current

II

Line input current

IIH
IlL

High-level enable-input current
Low-level enable-input current

MIN

TYpt

MAX
0.3

-1.5
10H = -400 (.lA,

VID = - 300 mY,
See Figure 8
Va = 0.4 Vto 2.4 V
Other input = 0 V,
See Note 4

10L = 8 rnA,

2.7

fj

Input resistance
Short-circuit output current

VID = 300 mV,

IVI = 12V
IVI = -7V

ICC

Supply current

No load

Va = 0
I Outputs enabled

12
-15

0.45

V

±20
1
-0.8

(.lA

rnA

60
-300

(.lA
(.lA

-85

rnA

90
78

rnA

kG
69
57

I Outputs disabled

mV
V
V

VIH - 2.7V
VIL = 0.4 V

lOS

V
V

-0.3*
60

VID = 300 mV,
See Figure 8

UNIT

t All typical values are at VCC = 5 V, TA = 25°C.
* The algebraic convention, in which the less-positive (more-negative) limit is designated minimum, is used in this data sheet for common-mode
Input voltage and threshold voltage levels only.
.
§ Hysteresis is the difference between the positive-going inputthreshold voltage, VT +, and the negative-going Input threshold voltage, VT-.
NOTE 4: This applies for both power on and power off. Refer to EIA Standard RS-485 for exact conditions.
receiver switching characteristics over recommended ranges of supply voltage and operating
free-air temperature
TEST CONDITIONS

PARAMETER
tplH
tpHL
tpZH
tpZL
tpHZ
tpLZ

Propagation delay time, low-to-high-Ievel output
Propagation delay time, high-to-Iow-Ievel output
Skew ( I tplH - tpHL I )
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level

t All typical values are at VCC =

ViD = -1.5 Vto 1.5 V,
See Figure 9

Cl = 15 pF,

CL = 15 pF,

See Figure 10

Cl=15pF,

See Figure 10

5 V, TA = 25°C.

.

TEXAS""

INSTRUMENTS
2-766

POST OFFICE BOX 665303 • DAUAS, TeXAS 75265

MIN

TYpt

MAX

9
9

14

19

ns

14
2
7
7

19
6
14
14

ns
ns

20

35

ns
ns
ns

8

17

ns

UNIT

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION

VOC

*

FIGURE 1. DRIVER VOD AND Voe
375 !l

60 !l

375 !l

FIGURE 2. DRIVER VOD3

~

--3V

INPUT

,

1.5 V

IOOH

GENERATOR

:

OUTPUT

3V

I
I

~,

50 !l

(See Note A)

__

1.5 V

'

I
I

I

OV

It-tt- IDOL
~2.5V

+-

50%

~I

~

tTO-.l :..
TEST CIRCUIT

-2,5 V

It- tTO

VOLTAGE WAVEF'ORMS

FIGURE 3. DRIVER DIFFERENTIAL-OUTPUT DELAY AND TRANSITION TIMES
NOTES: A. The input pulse is supplied by a generalor having Ihe following characteristics: PRR" 1 MHz, 50% duty cycle, Ir " 6 ns, If " 6 ns,

Zo ~50g.
B. CL includes probe and jig capacitance.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-767

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION
OUTPUT

INP~1.5V

o V or 3 V

1 . 5 V \ - - - 3V

I

j.-.I.- tpZH

RL ..
11011

GENERATOR

I

OV

I

0.5 V

--*-VOH
I-r~
I

OUTPUT

(S.e Note AI

I

2.3 V

'PH Z

I

T

--je-.I

Voff '" 0 V

VOL TAGE WAVEFORMS

TEST CI RCUIT

FIGURE 4. DRIVER ENABLE AND DISABLE TIMES
5V

RL-1101l

INPUTJ1.5V

OUTPUT

I
tpZl--M---+I

3Vo,OV---~

I

I

_ _-"'"\ I
GENERATOR
ISee Note AI

5011

OUTPUT

\2.3 V

VOL TAGE WAVEFORMS

TEST CIRCUIT

FIGURE 5. DRIVER ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR,. 1 MHz, 50% duty cycle, tr " 6 ns, tf ,. 6 ns,
Zo =5012.
B. CL includes probe and jig capacHance.

,If

TEXAS
INSTRUMENTS
2·768

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION
5 V

Sl

ovo
RL1 = 165

n

GENERATOR
(See Note Al

TEST CIRCUIT

1I

1 .5 V

INPUT

tOOH -.j

14-

~
1.5 V
1.5 V
--

~.5;3 V ~~:~ ~ ~
I

OV

-.j

N- tOOL

I

tOOH

I

10%

tTD -.!

I

14-

I

-.j

0 V

I4- t OOL

-.j

N-

SltoOV
S2 to 5 V

;:t---=2.3V

OV 190%90% I OV
~
10%

;:t---=2.9V

0 V I 90% 90% I 0 V
~

OUTPUT

3V

INPUT

OUTPUT 10

10:!" -2.3 V

.... ~tTO

I

tTD-.!

I

= -2.9 V

.... ~tTD

14-

VOLTAGE WAVEFORMS

VOLTAGE WAVEFORMS

FIGURE 6. DRIVER DELAY AND TRANSITION TIMES WITH
DOUBLE-DIFFERENTIAL-SCSI TERMINATION FOR THE LOAD
5V

S2

OVo

o
(See Note BI

GENERATOR
(See Note Al

oV
--3V

~
1.5V
1.5V
I

INPUT
'POE

-.j

I

/4-

-.j

0 V

Slt03V
S2toOV
S3 to 5 V

/4-- 'POZ

J

0 V

0 V ~ = -1 V

Sl to 0 V
S2 to 5 V
S3 to 0 V

--3V

~
1.5 V
1.5 V
INPUT

I

'POE -.j

I~T=2.3V
OUTPUT

S3

I

14-

OUTPUT - { 0 V

-.j
0 V

0 V

__ 'POZ

j:- =

1V

"----I... _= -

2.3 V

FIGURE 7. DRIVER DIFFERENTIAL-ENABLE AND DISABLE TIMES WITH A DOUBLE-SCSI TERMINATION
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR" 1 MHz, 50% duty cycle, tr " 6 ns, tf" 6 ns,
Zo=50 O.
B. CL includes probe and jig capachance.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-769

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION

+-IOH

FIGURE 8. RECEIVER VOH AND VOL

~

--3V

INPUT·
GENERATOR

(Se. No •• AI

51 Il

1.5 V

I

1.5V

I 1.5 V

.

I
'PLH~

I

OV

""----""---.

.,......,.,- PHL

~

OV-_.......J

OUTPUT

.

-:--

1.3 V

VOH

1.3 V

VOL
TEST CIRCUIT

VOLTAGE WAVEFORMS

FIGURE 9. RECEIVER PROPAGATION DELAY TIMES
NOTES: A. The InpUt pulse is supplied by a generalor having Ihe following characteristics: PRR" 1 MHz, 50% duty cycle, Ir " 6 ns, If " 6 ns,
Zo=50fJ.

B. CL includes probe and jig capacitance.

TEXAS . . ,
INSlRUMENTS
2-770

POST OFFICE BOX 656303 • DALLAS. TexAS 75265

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
PARAMETER MEASUREMENT INFORMATION
1.5 V
S2

2 k!l

-1.5V--o

0--- 5V

lN916 OR EQUIVALENT

GENERATOR
(S••

50 Il

Note AI

----Jt

TEST CIRCUIT
3V

Sl to 1.5 V

----1.5V S2 open

INPUT

,

.
IPZH

OUTPUT

,

--.I

S3 closed

I

~

'
~

~

---3V

1.5 V

,
,

S3 open

OUTPUT

~
1.5 V

VOL

£'(

--3V

Sl101.5V
S2 closed
S3 closed

I

INPUT

SIlo -1.5 V
S2 closed
S3 closed

1.5 V

,

OV

0 V

I
IPLZ~

IPHZ~
I

'5V
l" - ~
:

SIlo -1.5V
0 V 52 closed

I

:--~4'5V

VOH

1.5V

INPUT

I

IPZL~

----OV

O.UTPUT

INPUTJ'tC--~==:.:V

OV

VOH

~

'

OUTPUT

---~1.3V

0.5 V

- - - - >1.3V

VOL

VOL TAGE WAVEFORMS

FIGURE 10. RECEIVER OUTPUT ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR '" 1 MHz, 50% duty cycle, tr '" 6 ns, tf " 6 ns,
Zo=500.
B. CL includes probe and jig capacitance.

TEXAS ~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

2-771

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
DRIVER HIGH-LEVEL OUTPUT VOLTAGE

DRIVER LOW-LEVEL OUTPUT VOLTAGE

vs

vs

DRIVER HIGH-LEVEL OUTPUT CURRENT

5

~ 4.5

& 4
~
~ 3.5

&.

3

o

2.5

:;

1
!l

2

-§,

1.5

J:

--

DRIVER LOW-LEVEL OUTPUT CURRENT

5

VCC~5V

>

..

TA = 25°C

r-

I

3.5

...........

0

2.5

>
:;
co.
:;

I'--.

I

I

3

a;
>

..

2

~

1.5

-'

VCC I = 5 V

r- TA = 25°C

4

'"
"0
l!!

~

-4.5

0

-'

I

:r

~ 0.5

o
o

.....

I
-'
0 0.5
>

-20

-40

-60

-80

o

-100 -120

o

20

--40

~

60

FIGURE 12

FIGURE 11

DRIVER DIFFERENTIAL OUTPUT VOLTAGE

vs
DRIVER OUTPUT CURRENT

4

t

vdc=~v -

>
"0

g.

>

3.5

2.5

TA

=25°C

i'..............

o'"
!

2

c
f

1.5

:EC

" i'-... "-

3

1'\
1\

\

I

g 0.5

\

>

00

80

100

IOL -Low-Level Output Current-mA

'OH-High-Level Output Current-mA

10 20 30 40 50 60 70 80 90 100
10 - Output Current-mA

FIGURE 13

TEXAS .."
INSTRUMENTS
2-772

I
II

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

120

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
RECEIVER HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
5
VCC - 5 V
VIO - 300 mV
IOH - -440 p.A

RECEIVER HIGH-LEVEL OUTPUT VOLTAGE
vs

HIGH-LEVEL OUTPUT CURRENT

5
VIO - 0.3 V
TA - 25 D C

>I

!§,

l!

.So"

4

~

0

>

3

"

0
"ii

.

....

V
!~ ~ VVCC I= 5.25
, , ' _-

2

~

.r;

J:'"

-

~~
I~ ~

VCC = 4.75 V

I
J:
0

>

o
o

~""VCC=5V

'\:: ~
'\:: ~
'\:: ~
o

-10
-20
-30
-40
-50
IOH-High-level Output Current-mA

-40 -20 o
20 40 60 80 100 120
TA -Free-Air Temperature- DC

FIGURE 14

FIGURE

RECEIVER LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

RECEIVER LOW-LEVEL OUTPUT VOLTAGE
vs

>I

8.

l!

RECEIVER LOW-LEVEL OUTPUT CURRENT
0.6
VCC - 5 V
TA - 25 D C
0.5
VID=-100mV
V

/'

.So"

0.4

0
"ii

"

0.3

~

0.2

0

>

..
....
....
0

....I
0

/
/

V

1/

0.6
VCC - 5 V
V,O - -300 mV
IOLcSmA

>

I 0.5

CD
Cl

!!

~

0.4

S

;

V

00.3

r--

~

~

....CD

/

~ 0.2

.9

0.1

....I
00.1
>

>

o

15

o

5
10
15
20
25
30
IOl -low level Output Current-mA

o

-40 -20

o 20 40 60 SO 100 120
TA-Free-Air Temperature- DC

FIGURE 16

FIGURE 17

TEXAS

-If

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-773

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE
6

5

>

.,I
'"
~

VIO a 0.3 V
Load - 8 kll to ground
TA a 25°e
4 r - f v e e ~ 5.25 V

5 TA - 25 0 t

3 f--- Vee - 4.75 V

0

.,I
'"
l'!
(5

'-Vee = 5 V

>
~

"
S-

c.

~

I

vee l = 5.2J V

,.

>

'I.

>
;

VIO - -0.3 V
Load = 1 itO to Vee

"

2

0
I
0

I
0

Vee
4
Vet

=

5

= 4.75

V

vi

3

2

>

>

il

o

o
0.5

1.5

2.5

2

3

o

0.5

1.5

2

2.5

3

VI-Enable Voltage-V

VI-Enable Voltage-V

FIGURE 19

FIGURE 18

APPLICATION INFORMATION
1/3 SN75ALS171

1/3 SN75ALS171

(See
NOleA)

UP TO 32
TRANSCEIVERS,

•••
NOTE A: The line should be terminated at both ends in its characteristic impedance. Stub lengths off the main line should be kept as short
as possible.

FIGURE 20. TYPICAL APPLICATION CIRCUIT

TEXAS . "
INSTRUMENTS
2-774

POST OFFICE BOX 855303 • DALLAS, TeXAS 75266

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
APPLICATION INFORMATION
5V

330

5V

330 !l

[!

150 !l

150

[!

330

330

[!

[!

UP TO 8
TRANSCEIVERS

•••

FIGURE 21.

TYPICAL DIFFERENTIAL SCSI APPLICATION CIRCUIT

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2·775

SN75ALS171
TRIPLE DIFFERENTIAL BUS TRANSCEIVER
APPLICATION INFORMATION

Vee

,

Jat~

~,

ra.NiOCT~~
14

3

2

~"
&1

8

-

F

SN74LS138

1 .

SN74LSOO

~

"

8

9

~

~

rTa

~
SN'14i:SOO

00''"'

'DO

l',

,

9"

r-;-

-

EN

'"

5

V

·

4

1f~~rT
7
r-;- - - ~
5
~
_

13

-

'-l.-

.r:tJ
~
, x[ :tJ

t:: E" ,

.,

7

4

V

6

EN

t::;N

8

,
,

~

5

:

~9

08(61
-DB161

DBI51

-08(51

D8141
-OB141

OB(3)

-DBtJ}

08(21
-08(2)

SN75A1.S170

Err;:-v~

Lt;'" , r[:2J
EN

4

.Lt!N
, Lt!N

EN

",

t>

DB(71
-DBm

10

iNl>:~

:

~~r--~

OB(ll
-08111

10

:;:::t::::::!!
'S[~ •
t>
: ;:t:.::!:
x[~
to

DB(OI
-0810)

DBIPI
-DBIPI

~

,

r=-~!
'::t: ~
EN ,

S"
S8S

S84

··
-±l:= .

r[:tJ
,t::
~
, ;~-"
, tEN x[

S8'
S8'

>---i-t- EN

",
,ao

SBP

1::'" · :~

ACK
ATN

INIT

TO SCSI BUS
CONTROLLER

:~

Lt EN , .rrltJ
EN :~
,
Lt:N
, EN Z[ltJ •
&>:~
•
t::!N , S[t2J
, ~
, ~
EN '" : :1-=::-,4"
t::;" , x[ :tJ

10

12~

"

.

EN

, r[r+-

TARGET

MSG

MSG
-MSG

:u;::: ~ ~

CIO

,

".

g

EN

t>

:

~EN

I>

:;:::t::::::!!

[ 5~;N 'r[~

REa

BSYOUT
8$YON

SElOUT

SREN
ARB

SELIN

,t:: !'"EN

--.-t"

1

·

r(:rJ

,.
8

• :::t:::=".

veet EN, ~iJ

·
+-f'05
,

,.

.j,

~
SENI
SEN2

SEN'

" ~
~
; ~,.
,
s[ ~ ,.
~
":t-:::,,
,
, x[:
V

·

· :tJ
1

. ·· ·, :b2J

L!2.-

r[

TO RESET LOGIC {

"

~

SN15ALS171

FIGURE 22. TYPICAL DIFFERENTIAL SCSI BUS INTERFACE IMPLEMENTATION

TEXAS •

,2-776

INSTRUMENTS
POST OFFICE BOX 666303

6

DAlLAS. TEXAS 75266

SN75ALS191
DUAL DIFFERENTIAL LINE DRIVER
03068, DECEMBER 1987-REVISED AUGUST 1989

o OR P PACKAGE

•

Meets EIA Standard RS-422-A

•

High Speed, Low-Power ALS Design

•

TTL-and CMOS-Input Compatibility

•

Single 5-V Supply Operation

(TOP VIEW)

VCC[]81Y
lA 2
7 lZ
2A 3
6 2Y
GND 4
5 2Z

•

Output Short-Circuit Protection

•

Improved Replacement for the UA9638

FUNCTION TABLE lEACH DRIVER)
INPUT

description
The SN75ALS191 is a dual high-speed
differential line driver designed to meet EIA
Standard RS-422-A. The inputs are TTL- and
CMOS-compatible and have input clamp diodes.
Schottky-diode-clamped transistors are used to
minimize propagation delay time. This device
operates from a single 5-volt power supply and
is supplied in 8-pin packages,

OUTPUTS

Z

A

Y

H

H

L

L

L

H

logic diagram (positive logic)

The SN75ALS191 is characterized for operation
from ooe to 70 oe.

(8)n

(7)
~
lZ

lA (2)

~2Y

2A~2Z

logic symbol t
lA

(2)

I>

2A (3)

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

PRODUCTION DATA documants contain information
currant as of publication data. Products conform to
.pacifications par the terms of Tlxas Instruments

=:~:~i~li~:I~'i ~!:g::i:f :.~O::::~:~~ not

Copyright @) 1989, Texas Instruments Incorporated

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-777

SN75ALS191
DUAL DIFFERENTIAL LINE DRIVER
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TVPICAL OF ALL OUTPUTS
--------~----_.----VCC

Vcc---------------1-----1-40 kONOM

INPUT--~~~--~--_+--~
~------~--~---OUTPUT

t-----GND

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Continuous total dissipation ................................. See Dissipation Rating Table
Operating free-air temperature range ...................................... ooe to 70 0 e
Storage temperature range .......................................... - 65 °e to 150 0 e
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260 0 e
NOTES: 1. All voltage values except differential output voltage

voo are with respect to network ground terminal.

DISSIPATION RATING TABLE
PACKAGE

0
p

TA s 25°C
POWER RATING
725 mW
1000 mW

DERATING FACTOR
ABOVE TA - 25°C
5.8 mW/oC
8.0 mW/oC

TA - 70°C
POWER RATING

TEXAS . "
INSTRUMENTS
2-778

POST OFfiCE BOX 665303 • DALLAS. TeXAS 75266

464mW
640mW

SN75ALS191
DUAL DIFFERENTIAL LINE DRIVER
recommended operating conditions
Supply voltage, Vee
High-level input voltage, VIH

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

2

V

Low-level input voltage, VIL
High-level output current, 10H
Low-level output current, 10L
Operating free-air temperature, T A

0

0.8

V

-50

rnA

50
70

rnA
·e

electrical characteristics over operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONS

VIK

Input clamp voltage

Vee = 4.75 V, 11=-18mA

VOH

High-level output voltage

Vee = 4.75 V, VIH = 2 V, I 10H = -10 rnA
IIOH = -40 rnA
VIL = 0.8 V

VOL

Low-level output voltage

I VOOl I
I V002 I

Differential output voltage

al VOO

I

al Voe

10

I

=

4.75 V, VIH

=

VIL

2 V,

MAX

-1

-1.2

2.5

3.3

=

5.25 V, 10

0.5

=0

2VOO2
2

Vee = 4.75 V to 5.25 V, RL

=

100

I),

See Figure 1

Change in magnitude of t
common-mode output voltage
Output current with power off

Vee

=

I Vo
I Vo

0

II

Input current

Vee

IIH

High-level input current

Vee

IlL

Low-level input current

Vee

lOS

Short-circuit output current'
Supply current (all drivers)

Vee
Vee

=
=
=
=
=

= 5.5
= 2.7
VI = 0.5
Vo = 0

=
=
=

0.1

6 V
-0.25 V
-0.25 V to 6 V

V

V
V
V

Change in magnitude oft
differential output voltage

UNIT

V

2

V,

10L = 40 rnA
Vee

I Vo

ICC

= 0.8

Oifferential output voltage

Common-mode output voltage §

Voe

Vee

MIN Typt

±0.4

V

3

V

±0.4

V

100

-0.1 -100

~A

±100

5.25 V, VI

V

50

~A

5.25 V, VI

V

~A

5.25 V,

V

25
-200
-150

rnA

40

rnA

5.25 V,

5.25 V, No load,

-50
All inputs at 0 V

32

~

t All typical values are at Vee = 5 V and T A = 25 ·e.
tal VOO I and al Voe I are the changes in magnitude of VOO and Voe, respectively, that occur when the input is changed from a
high level to a low level.
§In EIA Standard RS-422-A, Voe, which is the average of the two output voltages with respect to ground, is called output offset voltage, VOS·
,Only one output at a time should be shorted and duration of the short-circuit should not exceed one second.

switching characteristics over recommended range of operating free-air temperature (unless otherwise
noted), Vee .. 5 V
PARAMETER

too

Differential-output delay time

tTD

Differential-output transition time

Skew

TEST CONDITION

eL

= 15 pF,

RL

See Figure 2

= 100 II

MIN

TYP# MAX

UNIT

3.5

7

3.5

7

ns
ns

1.5

4

ns

# Typical values are at T A = 25 ·e.

TEXAS . . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75266

2-779

SN75ALS191

DUAL DIFFERENTIAL LINE DRIVER
PARAMETER MEASUREMENT INFORMATION

i

INPUT

son

V002

I

SOn

l

RL

=

1000

VOC

FIGURE 1. DIFFERENTIAL AND COMMON-MODE OUTPUT VOLTAGES
-3V
INPUT

I
V OUTPUT

RL

= 100 n

CL

= 15 pF

DIFFERENTIAL
OUTPUT

I
I

10%

GENERATOR
(See Note A)

'--:----0 V

tDD-4--.I

I

Z OUTPUT

(Se. Note B)

-----..1.

V OUTPUT

~

ZOUTPUT
TEST CIRCUITS
NOTES:

SO%~

I.-Skew

- - -VOH

'VOL
Skew-+! ....

50%C:::

,SO%

VOLTAGE WAVEFORMS

A. The input pulse generator has the following characteristics: ZOUT
B. CL includes probe and jig capacitance.

=

50 0. PRR $ 500 kHz, tw

FIGURE 2. SWITCHING TIMES

TEXAS •
INSTRUMENTS
2-780

, . - - - - - -.... -

/ - 50%

POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

=

100 ns. tr

=

$

5 ns.

SN75ALS193
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3-STATE OUTPUTS
D2931, JUNE 1986-REVISED AUGUST 1989

•
•

Meets EIA Standards RS-422-A and
RS-423-A

J PACKAGE
(TOP VIEW)

Meets CCITT Recommendations V.l O.
V.ll, X.26, and X.27

•

Designed for Multipoint Bus Transmission on
Long Bus Lines in Noisy Environments

•

3-State Outputs

•

18

Vee

lA
lY

48

G
2Y
2A
28
GND

Common-Mode Input Voltage
Range ... -7Vt07V

•

Input Sensitivity ... ± 200 mV

•

Input Hysteresis ... 120 mV Typ

•

High Input Impedance ... 12 kO Min

4A
4Y

13
3Y
3A
38

logic symbol t

•

Operates from Single 5-V Supply

•

Low ICC Requirements:
ICC ... 35 mA Max

(3) 1Y

lA
18

•

Improved Speed and Power Consumption
Compared to AM26LS32A

2A

(5)

28

3A

description
The SN75ALS 193 is a monolithic quadruple line
receiver with 3-state outputs designed using
Advanced Low-Power Schottky technology.
This
technology
provides
combined
improvements in bar design, tooling production,
and wafer fabrication. This, in turn, provides
significantly less power requirements and
permits much higher data throughput than other
designs. The device meets the specifications of
EIA Standards RS-422-A and RS-423-A. It
features 3-state outputs that permit direct
connection to a bus-organized system with a
Fail-Safe design that ensures the outputs will
always be high if the inputs are open.

(11)

38
(13)

4A
48

2Y
3Y
4Y

tThis symbol is in accordance with ANSI/lEEE Std 91-1984 and
lEe Publication 617-12.

logic diagram (positive logic)

The device is optimized for balanced multipoint
bus transmission at rates up to 20 megabits per
second. The input features high input
impedance, input hysteresis for increased noise
immunity, and an input sensitivity of ± 200 m V
over a common-mode input voltage range of - 7
to 7 V. It also features active-high and activelow enable functions that are common to the
four channels. The SN75ALS193 is designed for
optimum performance when used with the
SN75ALS192 quadruple differential line driver.

(3)

IV

(5)

2V

(11) 3V

(13) 4V

The SN75ALS 193 is characterized for operation
from oDe to 70 oC.
PRODUCTIOI DATA d......nls ".lIin i.formation

curronl H of ,.blicllll. data. P,oducts con""'" to

.poclflcations "'" tho IIrma of TI..I lnatruments

=~I;·i:''' ~:r::t ~=~ not

TEXAS

~

Copyright © 1989, Texas Instruments Incorporated

INSTRUMENTS
POST OFFICE BOX 655303 • DALlAS. TeXAS 75266

2-781

SN75ALS193
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3-STATE OUTPUTS
FUNCTION TABLE (EACH RECEIVER)
ENABLES

OIFFERENTIAL
A-B
VIO .. 0.2 V

-0.2 V

<

VID

< 0.2

V

VIO'" -0.2 V

X

OUTPUT

G

G

Y

H

X

H

X

L

H

H

X

?

X

L

?
L

H

X

X

L

L

L

H

Z

H = high level
L = low level
X = irrelevant
? = indeterminate
Z = high impedance (off)

schematics of inputs and outputs
EQUIVALENT OF EACH A OR B INPUT
VCC--------~--~~--

EQUIVALENT OF G OR

G INPUTS

vCC-------.--~~

3 kO
NOM

TYPICAL OF ALL OUTPUTS
----------~--VCC

500
NOM

18 kO
NOM
INPUT

OUTPUT
INPUT
300 kO
NOM
VCC (A)
or
GNO (B)

GNO

GNO
GNO

TEXAS . "
INSTRUMENTS
2-782

POST OFFICE BOX 656"303 • DALLAS, TeXAS 15265

SN75ALS193
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3-STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage, A or B inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 15 V
Differential input voltage (see Note 2) ......................................... ± 15 V
Enable input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Low-level output current ................................................... 50 mA
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 3) . . . . . .. 1025 mW
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. OoC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds. . . . . . . . . . . . . . . . . . . . .. 300°C
NOTES: 1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. Differential-input voltage is measured at the noninvertlng input with respect to the corresponding inverting input.
3. For operation above 25·C free-air temperature, derate the J package to 656 mW at 70·C at the rate of 8.2 mW/·C.

recommended operating conditions
Supply voltage, Vce

MIN

NOM

MAX

UNIT

4.75

5

5.25
±7
±12

V
V
V
V

Common-mode input voltage, Vie
Differential input voltage, VID

High-level input voltage, VIH

•

2
0.8
-400

Low-level input voltage, VIL
High-level output current, IOH
Low-level output current, IOL

16
0

Operating free-air temperature, T A

70

V
~A

mA
·e

TEXAS .."

INSTRUMENTS
POST OFFICE BOX·655303 • DALLAS. TeXAS 75265

2-783

SN75ALS193
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3-STATE OUTPUTS
electrical characteristics over recommended range of common-mode input voltage, supply voltage,
and operating free-air temperature (unless otherwise noted)
PARAMETER
VT+

Positive-going threshold voltage

VT-

Negative-going threshold voltage

Vhvs

Hysteresis §

VIK

Enable-input clamp voltage

VOH

High-level output voltage

VOL

Low-level output voltage

TEST CONDITIONS

MIN

TYPt

High-impedance-state output current

II

Line input current

mV

-200t

mV

II

VID

~

10H ~ -400

200 mV,

~A,

See Figure 1
VID ~ -200 mV,

10L ~ 8 mA

See Figure 1

IOL~16mA

VCC

~

5.25 V

2.7

3.6
0.45
0.5

~

2.4 V

20

Va

~

0.4 V

-20

VI

~

15 V

See Note 4

VI

~

-15 V

0.7

1.2

:"1.0

-1.7
20

2.7 V
VIH
VIH ~ 5.25 V

100

lOS

Short-circuit output current

ICC

Supply current

Va - 0,

VID - 3 V,
See Note 5

~A

mA
~A
~A

-78

-130

mA

22

35

mA

12

18

-15

Outputs disabled

V

-100

VIL ~ 0.4 V

Input resistance

V
V

Va

Other input at 0 V,

High-level enable-input current
Low-level enable-input current

mV
-1.5

-lBmA

~

~

IlL

UNIT

200

120

10Z

IIH

MAX

kO

t All typical values are at VCC ~ 5 V, TA ~ 25°C.
+The algebraic convention, in which the less positive limit is designated minimum, is used in this data sheet for threshold voltage levels only.
§ Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going input threshold voltage,
VT _. See Figure 4.
NOTES: 4. Refer to EIA Standard RS-422-A and RS-423-A for exact conditions.
5. Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.

switching characteristics, Vee = 5 V, TA = 25°e
PARAMETER

TEST CONDITIONS

TYP

MAX

15

22

ns

15

22

ns

See Figure 3

13

25

ns

See Figure 3

11

25

ns

See Figure 3

13

25

ns

See Figure 3

15

22

ns

tpLH

Propagation delay time, low-to-high-Ievel output

VID ~ -2.5 V to 2.5 V, Cl

tpHL

Propagation delay time, high-to-Iow-Ievel output

See Figure 2

tpZH

Output enable time to high level

CL

~

15 pF,

tpZL

OutPl,lt enable time to low level

CL

~

15 pF,

tpHZ

Output disable time from high level

CL ~ 5 pF,

tpLZ

Output disable time from low level

CL

~

5 pF,

TEXAS

~

INSTRUMENTS
2-784

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MIN
~

15 pF,

UNIT

SN75ALS193
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION

I

IOH

+ (-I

FIGURE 1. VOH. VOL

INPUT

~~V---2.5V

::.J.~ v

>-+-..... OUTPUT

tPLH-+!

~

I

~ -2.5 V

-.llf-tPHL

~

II----VOH

I

OUTPUT

I

1.3V

1.3V

VOL

VOLTAGE WAVEFORMS

TEST CIRCUIT
NOTES:

A. The input pulse is supplied by a generator having the following characteristics: PRR :s; 1 MHz, duty cycle s 50%, Zout
500,t r === 6 ns, tf ::= 6 ns.
B. Cl includes probe and jig capacitance.

=

FIGURE 2. tpLH. tpHL

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

2-785

SN75ALS193
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION

,

Iot-:s 5

ENABLE

G

-+I

ns

14-:s 5

I

,

(4-:s 5

ns

I

90% I

1.3 VI

I:

90%

10%

OV
(See Note C)

90%

I

1.3 V I

G

,I

......

(4-:s

5 ns

'-I----3V

ENABLE

,

II
(See Note C)

ns

I

-'----3V

3V

+_

II
I I
:I

I
I

.

10%

90%

I 1.3 V

10%

---OV

h-=-~VOH
OUTPUT

1.3 V

!..

!,!-0.5 V
= 1.4 V
S1 closed
S2 closed

OUTPUT

tpHZ--l+--+i

VOLTAGE WAVEFORMS FOR tpHZ, tpZH

VOLTAGE WAVEFORMS FOR tpLZ. tpZL
TEST
POINT

S1
FROM OUTPUT UNDER TEST

CL
(See Note A)

.....- -....-illlt-....
(See Note B)

T

5 kll

....

LOAD CIRCUIT
NOTES: A. CL includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Enable G is tested with 13 high; G is tested with Glow.

FIGURE 3. tPHZ, tpZH, tPLZ, tpZL

TEXAS . "

INSTRUMENTS
2·786

POST OFFICE BOX 655303. DALLAS. TEXAS 75266

OV

3V

SN75ALS193
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3-STATE OUTPUTS
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

5
VID

>

4

E

4

200 mV

Vie - 0
RL = 8 kQ to GND
TA = 25°e

.,

Vee - 5.5 V
Vee

=

>

5 V

1

.,

TA = 125°e
TA = 70 0 e
TA - ,25°e- J-~
3 TA = ooe

Vee - 4.5 V

C>

~ 3
o

g>
{5

..

>

>
.. 2
::l

::l
C.

e-::l

S 2

o
1
o
>

o
1
o
>

0.5

1.5
2
Enable Voltage-V

2.5

Vee = 5 V
VID - 200 mV
Vie = 0
RL = 8 kQ to GND

1

o

o

3

I
0.5

FIGURE 4

6

5

Vee

= 5.5 V

Vee

= 5V

Vee - 4.5 V

>

1

6

_I

VID = -200 mV
Vie
0
RL = 1 kQ to Vee
TA = 25°e

I

E

5
1

{5
>3
Sc.

3

C.

S

o

1M'

12

2.5

3

.....::(A -

V

o
>

1.5
2
Enable Voltage-V

=

V

IV V

S

2

1

-55°e
VTA - ooe
~ VTA = 25°eV VTA - 70 0 e

.,~4

'0

I

1

14- TA

>

1

0.5

3

2.5

OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

~4
~

o
1
o
>

I

1.5
2
Enable Voltage-V

FIGURE 5

OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

~::l

TA - -55°e

1

r

5oe

-

Vee - 5 V
VID - - 200 mV
Vie - 0
RL - 1 kQ to Vee

o

o

0.5

FIGURE 6

1.5
2
Enable Voltage-V

2.5

3

FIGURE 7

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-787

SN75ALS193
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE

HIGH-LEVEL OUTPUT VOLTAGE

vs

vs

DIFFERENTIAL INPUT VOLTAGE

FREE-AIR TEMPERATURE

4

5

4

>
I
8-

10H = 0

VCC - 5 V
VIC - - 7 V to 7 V
10 = 0
TA - 25°C

-IOH = -400 p.A

~3

~

=

o~2

VT-

I

VT+

~
1

o
-200

-100
100
o
Vlo-Oifferentiallnput Voltage-mV

VCC - 5 V
VIO - 200 mV
VIC - 0
I
I
I
10
20 30
40
50
60 70
TA - Free-Air Temperature- °C

200

FIGURE 8

FIGURE 9

HIGH-LEVEL OUTPUT VOLTAGE

HIGH-LEVEL OUTPUT VOLTAGE

vs

vs

HIGH-LEVEL OUTPUT CURRENT

HIGH-LEVEL OUTPUT CURRENT

5

5
I

~

I

>
~3
o

=

"i

~2

.c...

:f

~1
o
>

......

......

VCC - 5 V
VIO - 200 mV
VIC - 0

VIO - 200 mV
VIC = 0
TA - 25°C

>
"4

" "-

, ,

"

~

..... ~

I I J

" "- '"
"'-..

V

"- ~ ~

"- ff< '\

"'

'\
"\

_ VCC - 5.5 V

~

-VCC - 5 V
-VCC - 4.5 V

/"'

~~~
~~

TA - OOC
TA - 25°CTA - 700~_

\.~~
'\~

'\
.'\ ,,\

'\ l~

'\ ,,\ '\

-20
-40
-60
-80
-100
10H-High·Level Output Current-mA

-60
-80
-100
-20
-40
10H-High-Level Output Current-mA

FIGURE 11

FIGURE 10

TEXAS . "

. INSTRUMENTS
2-788

80

POST OFFICE BOX 665303 • OALLAS. TEXAS 75265

SN75ALS193
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
0.4

VCC = 5 V
VIO - -200 mV
VIC = 0

>
I

"

·~0.3

~
;

;
00.2

'0 - 8 mA

]
~

I
10 = 0

i--

i' 0.1
....
o

>

o

o

10

20 30
40
50
60 70
T A - Free-Air Temperature- ·C

80

FIGURE 12
LOW-LEVEL OUTPUT VOLT AGE
vs
LOW-LEVEL OUTPUT CURRENT

LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
0.8

tcc ~

4.5 fV_
> 0.7 I--VCC - 5 V = .
I
VCC = 5.5 V_
g' 0.6

"

=:
o

>
;

0.5

aS-

0.4

j
!l

0.3

~

I~ ~

....
o

N: J V

~

~

o

o

0.5

;
00.4
j

~ 0.3
~
o
0.2

>

0.1

....
o

VIO = -200 mV
VIC - 0
TA - 25·C
10 20
30
40
50
60
70
'OL -Low-Level Output Current-mA

i'

80

/I
haif

! tf
~V

~

S

_1 70 ./"

TA - 25.C~
TA = o·C "'

:! 0.6

I:~

V

0.1

fA

~ 0.7

~~

~

i' 0.2
>

J

0.8

I }

'r

00

V

l~ ~

VCC = 5 V
VID = -200 mVVIC = 0

10 20
30
40 50
60
70
10L - Low-Level Output Current- mA

80

FIGURE 14

FIGURE 13

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75266

2-789

SN75ALS193
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE

SUPPLY CURRENT
vs
SUPPLY VOLTAGE
50

30

VID = -200 mV

45 VIC - 0
10 - 0
",40 TA - 25°C

~

.!.
~:s

V

! 30

!i

DISABLED)

u 25

§' 20

II)

I 15

./

10

'110

u

!:}

VID - -200 mV
Outputs Enabled

5

..,./

00

Vee -4.5 V

8::s

/

./~

5

20

U 15
>-

~ENABLED

~

.'.
I
I
Vee - 5 V

1

/~

35

E

~

J.Vee -I 5.5I.V

25

o
o

2345678
Vee-Supply Voltage-V

10 - 0
10

20

FIGURE 15

1
.!.

40
35

I
I
Vee - 5 V

1 30

Vee - 4.5 V

E 25

I

20

~
u 15

i

(J

...

~

t

§'

o

~

10 - 0
Outputs Enabled
VIC - 0
TA - 25°C

-200

'"

Vee - 5 V
VI - ± 1.5 V Square Wave
eL-15pF
Four Channels Driven

80

II

V

TA - 25°C

i""'"

20

10

5

o

-100
100
VID-Differentiallnput Voltage-mV

200

o

10 k

FIGURE 17

100 k
1 M
10 M
f- Frequency- Hz

FIGURE 18

TEXAS . "

2-790

70

I

u

5

60

~ 15

'110
!:}

50

SUPPLY CURRENT
vs
FREQUENCY

v1. Lv

25

40

FIGURE 16

SUPPLY CURRENT
vs
DIFFERENTIAL INPUT VOLTAGE
30

30

TA-Free-Air Temperature- °e

INSTRUMENTS
POST OFFICE BOX 6&5303 • DALLAS. TEXAS 75265

100 M

SN75ALS193
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
INPUT RESISTANCE
vs
FREE-AIR TEMPERATURE

INPUT CURRENT
vs
INPUT VOLTAGE

3

30

25~e

TA 2

25

<

-

E
I

f--

~

3

0

i

1- 1

V V

o
o

10

20 30 40 50 60 70
TA- Free-Air Temperature- °e

-3

SO

-20 -15 -10 -5
0
5
10 15
VI-Input Voltage to GND-V

FIGURE 19

PROPAGATION DELAY TIME
vs
SUPPLY VOLTAGE

20

30
Vee - 5 V
eL-15pF

25

tlLH\
t PLZ ",

c

I 20

tpHZ .....

II

II

E

\tPZH

i= 15

"~

co

I

.
.t=

~

10

20

FIGURE 20

SWITCHING CHARACTERISTICS
vs
FREE-AIR TEMPERATURE

c

V V

-2

5

:c'"

...-

L"

r--

1"1)

-.j

tPHZ

--

~ -;H-J

tpZL

c
I 16
E 14
i=
>
12
II

\

~~

l.,....oo= FtPZH

eL - 15 pF
1S t-TA - 25°e

tP~L_
tPLH-

-IQ

c 10

/

i.

'"co.

e
Do.
I

"0

5

.9-

S
6
4
2

o
o

10

20
30 40 50 60 70
TA-Free-Air Temperature- °e

SO

o

4.54.6 4.7 4.S 4.9 5.0 5.1 5.2 5.3 5.4 5.5
Vee-Supply Voltage-V
FIGURE 22

FIGURE 21

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

2-791

2-792

SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
03203. JANUARY 1989

•

Meets CCITT Recommendations V.10,
V.11, X.26, and X.27

•

Designed for Multipoint Bus Transmission on
Long Bus Lines in Noisy Environments

•

3·State Outputs

•

Common·Mode Input Voltage
Range ... -7Vt07V

•

Input Sensitivity ... ± 300 mV

•

Input Hysteresis ... 120 mV Typ

•

High Input Impedance ... 12 kO Min

o OR

N PACKAGE
ITOPVIEW)

18
lA
lY

4A

G

4Y

2Y
2A
28

G

GND

•

Operates from Single 5-V Supply

•

Low ICC Requirements:
ICC ... 35 mA Max

•

Improved Speed and Power Consumption
Compared to AM26LS32A

Vee
48

3Y
3A
'-C_--"'I-'

38

logic symbol t
G

Ii
13) lY

lA

lB

description

2A

The SN75ALS197 is a monolithic quadruple line
receiver with three-state outputs designed using
Advanced Low-Power Schottky technology.
This
technology
provides
combined
improvements in bar design, tooling production,
and wafer fabrication. This, in turn, provides
significantly less power requirements and
permits much higher data throughput than other
designs. The device meets the specifications of
CCITT Recommendations V.10, V.11, X.26, and
X. 27. It features three-state outputs that permit
direct connection to a bus-organized system
with a Fail-Safe design that ensures the outputs
will always be high if the inputs are open.

3A
4A

not

113) 4Y

48
tThis symbol is in accordance with ANSI/IEEE Std 91'-1984 and
IEC Publication 617-12.

logic diagram (positive logic)

The SN75ALS 197 is characterized for operation
from OOC to 70°C.

:=i;lr::I:la ~=:~:; :lr:::~9t:~~

111) 3Y

3B

The device is optimized for balanced multipoint
bus transmission at rates up to 10 megabits per
second. The input features high input
impedance, input hysteresis for increased noise
immunity, and an input sensitivity of ± 300 mV
over a common-mode input voltage range of
-7 V to 7 V. It also features active-high and
active-low enable functions that are common to
the four channels. The SN75ALS197 is designed
for optimum performance when used with the
SN75ALS192 quadruple differential line driver.

PRODUCTION DATA d.cuments oontain infarmalion
• urrant as of publi..lion data. Produ ..... nl.rm I•
• pa.III••t1onl par tha terms of Ta.a. I.strumants

I~ 2Y

2B

13),y

15) 2Y

111)3Y

113) 4Y

Copyright © 1989. Texas Instruments Incorporated.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-793

SN76ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
FUNCTION TABLE (EACH RECEIVER)
OIFFERENTIAL

ENABLES
G
G
X
H

A-B
VIO '" 0.3 V

-0.3 V

<

VIO

< 0.3

V

VIO ,. -0.3 V

X
H
X
H
X
L

X

OUTPUT

L
X
L
X
L
H

Y
H
H
1

1
L
L
Z

H = high level
L = low level
X = irrelevant

7 = indeterminate
Z = high-impedance (offl

schematics of inputs and outputs
EQUIVALENT OF EACH A OR B INPUT
VCC--------~--~~--

EQUIVALENT OF G OR

G INPUTS

VCC------~~--~

3 kll

TYPICAL OF ALL OUTPUTS

--------t--

VCC

5011
NOM

NOM

18 kll
NOM
INPUT

OUTPUT
INPUT

300 kll
NOM
VCC(A)
or
GNO (B)

GNO

GNO
GNO

TEXAS . "

2-794

INSTRUMENTS
POST OFFICE BOX 655303 • PALLAS. TEXAS 75285

SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage, A or B inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 15 V
Differential input voltage (see Note 2) ......................................... ± 15 V
Enable input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Low-level output current ................................................... 50 rnA
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range ...................................... ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package ........ 260°C
NOTES: 1. All voltage values, axcept differential input voltage, are with respect to network ground terminal.
2. Differential-input voltage is measured at the noninverting input with respect to the corresponding inverting input.
DISSIPATION RATING TABLE
PACKAGE

D
N

TA :s 25°C
POWER RATING
950mW
1150mW

DERATING
FACTOR
7.6 mW/oC
9.2 mW/oC

TA - 70'C
POWER RATING
608mW
736 mW

recommended operating conditions
MIN
4.75

Supply voltage, VCC
Common-mode input voltage, VIC
Differential input voltage, VID
High-level input voltage, VIH

NOM

5

MAX
5.25

UNIT
V

±7
±12

V
V
V
V

2

Low-level input voltage, VIL
High-level output current, IOH
Low-level output current. IOL
Operating free-air temperature, T A

0

0.8
-400

~A

16

mA

70

°c

TEXAS •
INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TEXAS 75265

2-795

SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
electrical characteristics over racommended range of common-mode input voltage, supply voltage,
and operating free-air temperature (unless otherwise noted)
VT+

PARAMETER
Positive-going threshold voltage

VT-

Negative-going threshold voltage

Vhvs
VIK
VOH

Hysteresis §

TEST CONDITIONS

VIO = 300 mY,

VOL

Low-level output voltage

VIO = -300 mV

10Z

High-impedance-state output current

VCC = 5.25 V

High-level enable-input current

IlL

Low-level enable-input current

-1.5
IOH = -400 p.A

lOS

Short-circuit output current

Supply current

3.6

Other input at 0 V,
See Note 3

0.5

Vo = 0.4 V
VI = 15 V
VI = -15 V

0.7
-1.0

VIL - 0.4 V
VIO = 3 V,
See Note 4
Outputs disabled

Vo = 0,

V

20
-20

p.A

1.2
-1.7

mA

20
100
-100

VIH = 2.7 V
VIH = 5.25 V

mV
V
V

0.45

IOL - 8 mA
IOL = 16 mA
Vo = 2.4 V

Input resistance

ICC

2.7

UNIT
mV
mV

120

High-level output voltage

IIH

MAX

-300*
11= -18mA

Une input current

Typt

300

Enable-input clamp voltage

II

MIN

p.A

pA

12

18

-15

-78

-130

mA

22

35

mA

kll

t All typical values are at VCC = 5 V, TA = 25°C.
* The algebraic convention, in which the less positive limit is designated minimum, is used in this data sheet for threshold voltage levels only.
§ Hysteresis is the difference between the positive-going input threshold voltage, VT +, and the negative-going input threshold voltage, VT _ .
NOTES: 3. Refer to CCITT Recommendation V.l 0 and V.l1 for exact conditions.
4. Not more than one output should be shorted at 8 time and the duration of the short-circuit should not exceed one second.

switching characteristics, Vee - 5 V, TA - 25°e
PARAMETER
Propagation delay time, low-to-high-Ievel output

tpLH
tpHL
tpZH
tpZL

Propagation delay time, high-to-Iow-Ievel output
Output enable time to high level
Output enable time to low level

tpHZ
tpLZ

Output disable time from high level
Output disable time from low level

TYP

MAX

VIO = -2.5 V to 2.5 V, CL = 15 pF,
See Figure 2

TEST CONDITIONS

15
15

22

CL = 15 pF,

See Figure 3

13
11

See Figure 3

13
15

CL=15pF,

TEXAS •

2-796

INSTRUMENTS
POST OFFICE BOX 655303. DALLAS. TEXAS 75265

MIN

22
25
25
25
22

UNIT
ns
ns
ns
ns

SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION

I

IOH

+ (-I
2V----'

FIGURE 1. VOH. VOL

INPUT

~~V---2.5V

::J."~ v

'">-+-.-OUTPUT

tPLH~ ~
I
I

iC-

-2.5V

~ ~tPHL

~

OUTPUT

1.3 V

II----VOH

I

1.3 V

VOL

VOLTAGE WAVEFORMS

TEST CIRCUIT

NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR '" 1 MHz. duty cycle s 50%. Zout = 50 O.
tr :s 6 ns, tf S 6 ns.
B. CL includes probe and jig capacitance.

FIGURE 2. tPLH. tPHL

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2·797

SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION

I4-s 5
I
ENABLE

G

..-t

ns

I

90%

1.3

II

10%
14--~tpZH

1.3 V

I+-s
I

ns

G

I
10%

1.3 V
See Note C

3V

90%

j+-s 5n• .

1-1---_3V

OV

,I

I:I

.....

5 ns

90%

ENABLE

I

VII

Sa. lIiote C

OUTPUT

I4-s 5
I

-1----3V

i

I I
'I
:I

I
I

10%

90%

1.3 V

I
OV
r---I

.L

-r--\-=-!: VOH

!.. !~0.5

tPHZ~

V

OUTPUT

=1.4V

51 closed
52 closed
VOLTAGE WAVEFORMS FOR tpHZ. tpZH

VOLTAGE WAVEFORMS FOR tpLZ. tpZL
TEST
POINT

FROM OUTPUT UNDER TEST

CL

See Note A

...........--fI...- .

I
LOAD CIRCUIT

NOTES: A. CL includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Enable G is tested with ~ high; ~ is tested with Glow.

FIGURE 3. tPHZ. tpZH. tPLZ. tpZL

TEXAS . "
INSTRUMENTS
2-798

post OI=FICE BOX

856303 • DALLAS, TEXAS 76265

OV

3V

SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

5

>

..

VIO - 300 mV
VIC - 0
RL - 8 kO to GNO
4
TA - 25·C

I

'"

~

4
TA
TA
TA
TA

VCC - 5.5 V
VCC - 5 V

-

125·C
70·C
,25·CO·C

f-fot

TA - -55·C

VCC - 4.5 V

3

:;

...

~ 2
I

~

VCC - 5 V
VIO - 300 mV
VIC - 0
RL
8 kO Ito GNO

i

0.5

2.5

1.5
2
Enable Voltage-V

3

o

o

0.5

FIGURE 4

5

>

VCC - 5.5 V
VCC - 5 V
VCC - 4.5 V

2.5

3

FIGURE 5
OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

OUTPUT VOLTAGE
vs
ENABLE VOLTAGE
6

1.5
2
Enable Voltaga-V

,-

J

6

VIO - -300 mV
VIC - 0
RL - 1 kO to Vce
TA - 25·e

5

I+- TA -

I
I

-55·C
TA - O·C
V-TA - 25·eV-TA - 70·C

L.---

I

~4

IW

~

'.. 3

!

I-"

I 2

V
V
I*' V
V

~

...... TA - r5.e

Vee - 5 V
VIO - -300 mV
VIC - 0
RL - 1 kO to Vce
0.5

1.5
2
Enable Voltage-V

2.5

3

o
o

0.5

FIGURE 6

1.5
2
Enable Voltage-V

2.5

3

FIGURE 7

TEXAS . "
INSTRUMENTS
POST QFACE BOX 666303 • DALLAS, TEXAS 75265

2-799

SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH ,3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE

HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
4

5

10H = 0

VCC - 5 V
VIC - -12 V to 12 V

4

>

>
1
t-- IOH
&

10 - 0
TA - 25°C

-

-400 p.A

S 3

~

1

II

'" 3
~

i;

~

02

;

~

Q.

~2
1

VT-

.!l
1:.

VT+

'"

o
>

:f 1
1

::t:

o

>

o
-200

o

-100

o

200

100

o

VCC = 5 V
VIO - 300 mV
VIC - 0
-I
1
1
10

Vlo-Oifferentiallnput Voltage-mV

FIGURE 8

'"

~1
o
>

VCC - 5 V
VIO = 300 mV

VIO - 300 mV
VIC = 0
TA = 25°C

>
1
&4

1:.
:f

HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT

5

5

. . . r-....
~
r-.... I'
&3
;
r-....
o
a;
""'~2

I I I

,

VIC - 0

~

IT 1

~

"' "C5V~
'~
, "\ '\

I- Vcc - 5.5 V

J-Vcc - 5 V
I- Vcc - 4.5 V

'\
"\.

~~
V TA
TA ~ ~ V- r TA ~~
I\.'\: ~

ooC
25°C70o~_

'\~

,'\ l\

\ l~

'\ l"\ f\.

-20
-40
-60
-80
-100
10H-High-Level Output Current-mA

-80
-100
-40
-60
-20
10H-High-Level Output Current-mA

FIGURE 11

FIGURE 10

TEXAS . "

INSTRUMENTS
2-800

80

FIGURE 9

HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT

.

20 30
40
50
60 70
TA-Free-Air Temperature- °C

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
0.4
VCC = 5 V
VIO - -300 mV
VIC - 0

>
I

CD

~0.3

~
;

c.

10 - SmA

,g 0.2
"ii

~

~
o

"1

I
10

f--

=

0

0 .1

..J

o
>

o
o

10

20 30 40
50 60 70
TA-Free-Air Temperature- °C

SO

FIGURE 12
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT

LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
O.S

~CC ~

4.5'V ____
> 0.7 I--VCC = 5V~
I
VCC - 5.5 V ____
CD

~0.6

~

; 0.5
c.
0.4

~

,g
~

!l

0.3

"1

0 .2

~~
~~

~.
..J

o

>

0.1

o

I

t

O.S

}

~ 0.7

N /V
fV

"0

>
;

~

0.6

!

0.5

&
:>

~

00.4
"ii
>

~ 0.3
~

o

"1

0 .2

..J

o
>

VIO - -300 mV
VIC = 0
TA - 25°C
10 20
30 40
50 60
70
10L -Low-Level Output Current-mA

0.1

SO

II

_170 0 CI,

TA - 25 0 C::j
TA - OOC .........

CD

~

r:

/
o

)

~

V

10

~

~

V

~J
~

VCC - 5 V
VIO - -300 mVVIC - 0
20

30

10L~Low-Level

40 50 60 70
Output Current-mA

SO

FIGURE 14

FIGURE 13

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TeXAS 75265

2-801

SN76ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
.
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
50
45
c(

40

~

35

~

30

(J

25

~

~

SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
30

VID - -300 mV
VIC - 0
10 - 0
TA - 25'C

.!.
~::I

;/
DISABLED/ '

g. 20
I 15

./

- 10

V

00

!

VCC - 4.5 V

15

>-

/

~

10

(J

S;
VID - -300 mV
Outputs Enabled

5

o
o

2345678
VcC-Supply Voltage-V

10 - 0

10

20 30
40 50 60 70
TA-Free-Air Temperature-'C

FIGURE 15

SUPPLY CURRENT
vs
FREQUENCY

30

40

I

25

.!.c:

15.5 V

35

Vcc I
I
Vcc - 5 V

~ 30

Vcc - 4.5 V

~ 25

I

20

~

15

(J

1

o

~

10 - 0
Outputs Enabled

VIC - 0
TA - 25'C

-200

10

5

o
-100
100
VID-Differentiallnput VOltage-mV

200

o

10 k

FIGURE 17

100 k
1M
10 M
f- Frequency- Hz

FIGURE 18

TEXAS . "

INSTRUMENTS
2-802

V

20

I

(J

5

V

icil 15

~ 10
S;

-"li'v

Vcc
VI - ± 1.5 V Square Wave
CL-15pF
Four Channels Driven
TA - 25'C

§

::I
(J

80

FIGURE 16

SUPPLY CURRENT
vs
DIFFERENTIAL INPUT VOLTAGE

~

5 Vi

8:::I

./

5

20

(J

~ENABLED

III

~cc

~

h

g

t c i5.5 1v

25

POST OFFICE BOX 666303 • DALLAS. TEXAS 752&5

100

M

SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
INPUT RESISTANCE
vs
FREE-AIR TEMPERATURE

INPUT CURRENT
vs
INPUT VOLTAGE
3

30

TA = 25°e

2

25

--

:ii

~ 20

~
·iIl

15

«

E

1I:

~

<3

a:

S
~

0

~I:

10

1- 1

5

-2

I

o

o

10

20 30
40 50
60
70
TA-Free-Air Temperature- °e

.........V
..........

..........V

-3

80

-20 -15 -10 -5
0
5
10 15
VI-Input' Voltage to GNO-V

FIGURE 19

PROPAGATION DELAY TIME
vs
SUPPLY VOLTAGE
20

30
Vee - 5 V
eL - 15 pF

25
I:

I 20

tpHZ ....
\ t PZH

15

~

I:

10

16

tP~L_
tpLH-

fo---

..

tPHZ

j

~~

I--

.

~ (/

'-f" -;H~
~

tpZL --'

.,I

\

tPZH

eL-15pF
TA - 25°e

E
j:: 14

In

I:

tP'LZ,,-

'"..E

·i"
CIl

18

tJLH\

.,

:c'"

20

FIGURE 20

SWITCHING CHARACTERISTICS
vs
FREE-AIR TEMPERATURE

j::

..........

>
12
"ii
Q

I:
0

/

10

.~

..'"

8

0.

2

6

..,I

4

0..

5

~o.

2

o
o

10

20
30 40
50
60
70
TA-Free-Air Temperature- °e

80

o

4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5
Vee-Supply Voltage-V

FIGURE 22

FIGURE 21

TEXAS . . ,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75285

2-803

2-804

SN15AlS199
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
03204. JANUARY 1989

•

Meets CCITT Recommendations V.10.
V.11. X.26. and X.27

•

- 7 V to 7 V Common·Mode Range with
300-mV Sensitivity

•

3-State TTL-Compatible Outputs

•

High Input Impedance ... 12 kO Min

•

Input Hysteresis ... 120 mV Typ

•

Single 5-V Supply Operation

•

Low Supply Current
Requirement ..• 35 mA Max

•

Improved Speed and Power Consumption
Compared to MC3486

D OR N PACKAGE
(TOPVIEWI

16
1A

1Y
1.2EN
2Y

Vee
46

4A
4Y
3,4EN

2A

3Y

26

3A

GND '-C:_....::...... 36

logic symbol t

(3)

description
The SN75ALS199 is a monolithic quadruple line
receiver with three-state outputs designed using
Advanced Low-Power Schottky technology.
This
technology
provides
combined
improvements in bar design, tooling production,
and wafer fabrication. providing significantly less
power consumption and permitting much higher
data throughput than other designs. The
device meets the specifications of CCITT
Recommendations V.10. V.11. X.26 and X.27.
The SN75ALS 199 features three-state outputs
that permit direct connection to a bus-organized
system with a fail-safe design that ensures the
outputs will always be high if the inputs are
open. The device is optimized for balanced
multipoint bus transmission at rates up to
10 megabits per second. The input features high
input impedance. input hysteresis for increased
noise immunity. and an input sensitivity of
± 300 mV over a common-mode input voltage
range of ± 7 V. It also features' an active-high
enable function for each of two receiver pairs.
The SN75ALS 199 is designed for optimum
performance when used with the SN75ALS 194
quadruple differential line driver.

lY

(5) 2Y

(11) 3Y

(13) 4Y

tThis symbol is in accordance with ANSI/IEEE Std 91·1984 and
lEe Publication 617·12.

logic diagram

The SN75ALS199[s characterized for operation
from OOC to 70°C.

1.2EN

lA

(3)

lV

(5)

2Y

(11)

3Y

(13)

4Y

lB--",,~,

2A --'-"''----'"''''
2B~"""'~"

3.4EN

3A
3B--""~'

4A
4B~~""""

PRODUCTIOI DATA .......n1I ...tai. i.formation

curro.t u of p.blilltio. doto. Pnduo:to ...form to
.....ifillti... p. the tann. T.... InstrumlRll

~~f.:.:r,;

0'

=-::r .ll'1':"':~

not

Copyright @ 1986, Texas Instruments Incorporated

TEXAS . . ,
INSTRUMENTS
POST OFFICE BOX 655303. DALLAS, TEXAS 75265

2-805

SN75ALS199
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3-STATE OUTPUTS
FUNCTION TABLE (EACH RECEIVER}
DIFFERENTIAL
A-B
VIO;;'; 0.3 V

-0.3 V < VIO < 0.3 V
VIO"; -0.3 V
X

H
L
X
?
Z

ENABLES
G
G
H
X
X
L
X
H
X
L
H
X
X
L
H
L

OUTPUT
Y
H
H

7
7
L
L
Z

= high level
= low level
= irrelevant
= indeterminate
= high·impedance (om

schematics of inputs and outputs
EQUIVALENT OF EACH A or B INPUT
VCC--------~--~~--

3 kll

EQUIVALENT OF EACH ENABLE INPUT
VCC------~~--~

TYPICAL OF ALL OUTPUTS
----------~--VCC

5011

3 kll
5 kll

INPUT -

1B kll
....

w..,.......--t

OUTPUT
INPUT

VCC(A}
or
GND (B}
5011

TEXAS . "

INSTRUMENTS
2-806

POST OFFICE BOX 856303 • DALLAS. TEXAS 75285

SN76ALS199
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage, A or B inputs, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 15 V
Differential input voltage (see Note 2) .......................................... ± 15 V
Enable input voltage .............................................. , . . . . . . . . .. 7 V
Low-level output current ................................................... 50 mA
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260°C
NOTES: 1. All voltage values. except differential input voltage, are with respect to network ground terminal.
2. Differential-input voltage is measured at the noninverting input with respect to the corresponding inverting input.
DISSIPATION RATING TABLE
PACKAGE

TA s 25·C
POWER RATING

D

950mW
1150mW

N

DERATING
FACTOR
7.6 mW/oC
9.2 mW/·C

TA - 70·C
POWER RATING
60BmW
736 mW

recommended operating conditions
MIN
4.75

SupplV voltage, VCC
Common-mode input voltage, VIC
Differential input voltage, VID
High-level input voltage, VIH

NOM

MAX

UNIT

5

5.25
±7

v

±12

V
V
V

O.B
-400

V
p.A

16

mA

70

°c

2

Low-level input voltage, VIL
High-level output current, IOH
Low-level output current, IOL
Operating free-air temperature, T A

0

TEXAS . "

INSTRUMENTS
POST OFfiCE BOX 655303 • DALLAS, TEXAS 75266

2-807

SN75ALS199
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
electrical characteristics over recommended ranges of common-mode input voltage. supply voltage.
and operating free-air temperature (unless otherwise noted)

VT+

PARAMETER
Positive-going threshold voltage

TEST CONDITIONS

VT-

Negative-going threshold voltage

Vhvs
VIK

Hysteresis §
Enable-input clamp voltage

11= -18 rnA

VOH

High-level output voltage

VID = 300 mV,

VOL

Low-level output voltage

VID = -300 mV

10Z

High-impedance state output current

High-level enable-input current

IlL

Low-level enable-input current

MAX

UNIT

300

mV
mV

120
-1.5
10H = -400"A
10L = 8 rnA

2.7

3.6
0.45
0.5

10L = 16 rnA
VID = -3 V,

Vo = 2.7 V
VIL = 0.8 V,
Vo = 0.5 V
Other input at 0 V,

Line input current

IIH

TVPt

-300*

VIL = 0.8 V,

II

MIN

"A
-20
0.7
-1.0

VI -.15 V
VI = -15 V

VIL = 0.4 V

lOS

Short-circuit output current

VID = 3 V,
See Note 4

ICC

Supply current

Outputs disabled

Vo - 0,

1.2
-1.7
20
100
-100

VIH = 2.7 V
VIH -" 5.25 V

Input resistance

V

20

VIO = 3 V,

See Note 3

mV
V
V

rnA
"A
"A
kll

12

18

-15

-78

-130

rnA

22

35

rnA

t All typical values are at VCC = 5 V, TA = 25 ·C.
* The algebraic convention, in which the less positive limit is designated minimum, is used in this data sheet for threshold voltage levels only.
§ Hysteresis is the difference between the positive-going input threshold voltage, VT + ' and the negative-going input threshold voltage, VT _.
NOTES: 3. Refer to CCITT Recommendations V.l 0 and V.l1 for exact conditions.
4. Not more tha~ one output should be shorted at a time and the duration of the short-circuit should not exceed one second.

switching characteristics. Vee - 5 V. TA "" 25°e
tpLH
tpHL
tPZH
tpZL
tpHZ
tpLZ

PARAMETER
Propagation delay time, low-to-high-Ievel output

Propagation delay time, high-to-Iow-Ievel output
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level

TEST CONDITIONS

VID = 0 V to 3 V,
See Figure 2

CL=15pF,

CL=15pF,

See Figure 3

CL=15pF,

See Figure 3

TEXAS ...,
2-808

INSTRUMENTS
POST OFFICE BOX 655303 • OALlAS. TEXAS 75265

MIN

TVP

MAX

15

22
22

ns
ns

25
25

ns

25
22

ns

15
13
11
13
15

UNIT

SN75ALS199
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3-STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION

I

IOH

+ I-I
2V---.J

FIGURE 1. VOH. VOL

GENERATOR
, ••• Note Al

INPUT
50 11

1.5 V

I

I

0 V

~tPHL~

_--_~--VOH

I

1.5 V - - - - '
OUTPUT
2V--------~

TEST CIRCUIT

VOLTAGE WAVEFORMS

NOTES: A. The input pulse is supplied by 8 generator having the following characteristics: PRR '" 1 MHz. duty cycle", 50%, Zout = 50 D,
tr :s; 6 ns, tf S 6 os.
B. CL includes probe and jig capacitance.

FIGURE 2, PROPAGATION DELAY TIMES

TEXAS ."

INSTRUMENTS
POST OFfiCE BOX 666303 • DALlAS. TeXAS 75285

2-809

SN75ALS199
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
SWI
+2.5 V

OUTPUT
SW2

-2.5V--o

2 kn

0-5 V

(see Note C)

CL - 15 pF
~ (see Note B)

GENERATOR
(see Note A)

51

n
TEST CIRCUIT

tpZL
tpZH

INPUT

~
I -

3V

SWI to 2.5 V
-1.5 V SW2 open

+ __ 0 V

tpZH

I
-r-OV
I

.

--+t l*-

tPZL~

~
\

__ 1'5V

SW3 closed

I

OUTPUT

IN:U:~

-

OUTPUT

~

"\:.:1.5 V

---OV

INPUT

~
I

I

tPHZ.........

OUTPUT

--

tpLZ
SWI to 2.5 V
SW2 closed

0 V

~

I

.

I

_

I

tpLZ

I

I

3V~5V ~~lto-2.5V

INPUT

SW3 closed

~
f
-_
0.5 V__

VOL

3V

1.5 V

.

SW2 closed

j+-SW3 open

~--4.5V

VOH

-1.5 V

tPHZ

SWI to -2.5 V

-.r

SW2 closed

°V

SW3 closed

14"I

~--1.4V

VOH

OUTPUT - - - - " , 0 . 5 V

'--VOL

-1.4V

VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
tr s 6 ns, tf S 6 ns.
B. CL includes probe and jig capacitance.
C. All diodes are 1N3064 or equivalent.

s 1 MHz, duty cycle

FIGURE 3. ENABLE AND DISABLE TIMES

TEXAS . "

INSTRUMENTS
2-810

POST OFFICE BOX 855303 • DALLAS. TEXAS 75265

s 50%, lout = 50 n,

SN75ALS199
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

OUTPUT VOLTAGE
vs
ENABLE VOLTAGE
4

5

4

VIO -300 mV
Vie - 0
RL - 8 kO to GNO
TA - 2soe

TA
TA
TA
3 TA

VCC - 5.5 V

>

Vec - 5 V

I

-

r

125°e
70 0 e .a
,25 oe- --+
ooe

TA -

-55°C

&

Vcc - 4.5 V

~
o

~2

I

o

I

o

>

0.5

1.S
2
Enable Voltage-V

2.5

o
o

3

Vcc - 5 V
VIO - 300 mV
VIC - 0
RL - 8 kO to GNO

1

- I
0.5

OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

5

Vec - 5.5 V
VCC - 5 V
VCC - 4.5 V

>

6

I
I
VIO - -300 mV
VIC - 0
RL - 1 kO to VCC
TA - 25°C

5

I

~TA -

I

14

&4

>

~ TA - -55°C

>

I

i

,.;- ~TA
,.;If'

!

I 2

0111

12

,.;-

,.;-

o

o
>

2.5

3

- 70°C

-TA - rsoc

Vec - S V
VIO - -300 mV
VIC - 0
RL - 1 kO to Vce

>

1.5
2
Enable Voltage-V

ooC

~TA - 2SoC-

~3

3

0.5

3

FIGURE 5

FIGURE 4

6

I
2.S

1.5
2
Enable Voltage-V

o
o

0.5

FIGURE 6

1.5
2
Enable Voltage- V

2.5

3

FIGURE 7

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 666303. DALLAS. TEXAS 75286

2-811

SN75ALS199
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE

HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

4

5

4

>
I
&

IqH - 0

Vcc - 5 V
VIC - -12 V to 12 V
10 - 0
TA - 25°C

"-" 10H -

-400 p.A

l!3
o

>
:;

...

~2

VT-

I

VT+

o
>

o

VCC - 5 V
VIO - 300 mV
VIC - 0
I
o
o 10 20 30 40 50 60 70
TA - Free-Air Temperature- °c

-,

-200

-100
o
100
Vlo-Oifferentlallnput Voltage-mV

200

,

FIGURE 8

FIGURE 9

HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT

HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT' CURRENT
5

5

VCC - 5 V
VIO - 300 mV
VIC - 0

VIO - 300 mV
VIC - 0
TA - 25°C

,

"

""'" t'-....

t'-....
t'-....

"'" V
"'" "~ ~
"'" ""-I?< '\

1 .1

,

iii..

..... ~

1

~

... VCC - 5.5 V
l-VCC - 5 V
"'VCC - 4.5 V

" '\"\ '\

V

~~~
~~

TA - OoC
TA - 25°CTA - 700~_

I\."\:r-,.
\,~

.'\ l'\

'\

:'\ L\ r\.

-60
-80
-100
-20
-40
10H-High-Level Output Current-mA

l"

-60
-80
-100
-20
-40
10H-High·Level Output Current-mA

FIGURE 11

FIGURE 10

TEXAS . "

2-812

80

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 15265

SN75ALS199
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLT AGE
vs
FREE-AIR TEMPERATURE

0.4

>
I
8.

!

VCC - 5 V
VIO - -300 mV
VIC - 0
0.3

~
'S

;

10 - SmA

00.2

!

I

~

I' 0.1

10 - 0

to-

...

~

oo

10

20 30 40 50 60 70
TA-Free-Air Tempereture-·C

SO

FIGURE 12
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT

LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT

O.S

J

II

VCC - 4.5V_
> 0.7 I---VCC - 5 V---...
I
VCC - 5.5 v-..,

1• 0 .6
~

i

0.5

~

00.4

1
.!I

0.3

I'~ 0.2

6 0.1 V

~

I~ ~

I I

o

fA _170.d .....

~ 0.7

./ V
If: rY

~

TA - 25.e~
TA - o·c .....

8.

:l 0.6

'S 0.5

;

00.4

1-! 0.3

iii'"

J
o

I' 0.2
VIO - - 300 mV
VIC - 0
TA - 25°C

10 20 30 40
50 60 70
10l -Low-level Output Current-mA

...
o

>

0.1

SO

U

WI

7~

~

~

>

o

O.S

}

~

~

1.#

~
~

~

Vee - 5 V
VIO - -300 mV
VIC - 0

10 20
30 40 50 60 70
10l -low-level Output Current-mA

SO

FIGURE 14

FIGURE 13

TEXAS ...,
INSTRUMENTS
POST OFFICE

eox 655303 • DALLAS. TEXAS 76285

2-813

SN75ALS199
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE

SUPPLY CURRENT
vs
SUPPLY VOLTAGE

30

50

c(

VID - "';300 mV
45 VIe - 0
10 - 0
40 TA - 25 0 e

T 35

j

1

h

/

30

!i

.!.

.~,.

DISABLED)

c; 25
§' 20

III

~ 15

/

(.)

- 10

20

I

Vce - 4.5 V

'f 10
~

VID - -300 mV
Outputs Enabled

5

234

I

t

1/

/

00

I

Vce - 5 V

~

5

I I

(.) 15

'ENABLED

Q.

J.

Vce - 5.5 V

25

5

6

7

10 - 0

oo

8

10

20

30

30

I

i

I

I

Vee - 5.5 V

40

Vee _I~IV

35

VI - ± 1.5 V Square Wave
CL - 15 pf
four Channels Driven
TA - 25°C

Vee - 5 V

I 20

i

60

70

80

SUPPLY CURRENT
vs
FREQUENCY

SUPPLY CURRENT
vs
DIFFERENTIAL INPUT VOLTAGE

1

50

FIGURE 16

FIGURE 15

25

40

TA-free-Air Temperature- °e

Vee-Supply Voltage-V

1111

7

,.,.

Vcc - 4.5 V

(.) 15

t

'f 10
~

5

o

10 - 0
Outputs Enabled
VIe - 0
TA - 25 0 e

-200

-100

o

100

5

I
200

o

10 k

VID-Differentiallnput Voltage-mV

FIGURE 17

1M
10 M
f-frequency-Hz

FIGURE 18

TEXAS •

INSTRUMENTS
2-814

100 k

POST OFFICE BOX 855303 • DAUAS. TEXAS 75285

100 M

SN75ALS199
QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH 3·STATE OUTPUTS
TYPICAL CHARACTERISTICS
INPUT CURRENT
vs
INPUT VOLTAGE

INPUT RESISTANCE
vs
FREE-AIR TEMPERATURE

30

3

25

2

TA - 25°e

1I

-,..-

C
~

a
1.i

0

./""

V

o

o

-1

10

20 30 40 50 60 70
TA-Free-Air Temperature- °e

-3

-20 -15 -10 -5
05
10 15
VI-Input Voltage to GNO-V

SO

FIGURE 19

PROPAGATION DELAY TIME
vs
SUPPLY VOLTAGE

30
Vee - 5 V
CL - 15 pF

c

1:11

!

.~ 10
~

(II

tPHZ .....
, tPZH

-- -

rt ...

rr

tPZL.....I

tPHZ..1

tpZH

16

tP~L_

i= 14

tpLH-

•E

~~

~ F"""""
I---;HtJ

20
eL - 15 pF
. 1S rTA _.25 oe

c
I

t~LZ" l\

..

E
i= 15

.

t!LH\

I 20

20

FIGURE 20

SWITCHING CHARACTERISTICS
vs
FREE-AIR TEMPERATURE

..•

V

-2

5

25

....-

........ ./""

>

.;

12

c

10

i1:11

.

S

!!

6

Q

0

/

0-

IL

..,I

~O-

5

4
2

10

20
30 40 50 60 70
TA - Free-Air Temperature-'- °e

SO

o

4.5 4.6 4.7 4.S 4.9 5.0 5.1 5.2 5.3 5.4 5.5
Vee-Supply Voltage-V
FIGURE 22

FIGURE 21

TEXAS •

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TeXAS 76265

2-815

2-816

SN65C189, SN65C189A, SN75Ct89, SN75C189A
QUADRUPLE LOW·POWER LINE RECEIVERS
03144. OCTOBER 1988-REVISEO JULY 1990

•

Meets Standard EIA-232-D (Revision of
RS-232-C)

•

Low Supply Current ... 420 p.A Typ

•

Preset On-Chip Input Noise Filter

•

Built-in Input Hysteresis

•

Response and Threshold Control Inputs

•

Push-Pull Outputs

•

ESD Protection Exceeds 1000 V Per
MIL-STD-883C, Method 3015

•

D. DB. OR N PACKAGE
(TOPVIEWI

lA
1 CONT

lY
2A
2 CONT
2Y
GND

--..--~

VCC
4A
4 CONT
4Y
3A
3 CO NT
3Y

logic symbol t

Functionally Interchangeable and Pin
Compatible with Texas Instruments
SN75189/SN75189A. Motorola
MC1489/MC489A. and National
Semiconductor OS 14C88A
2

description
The SN65C189, SN65C189A, SN75C189, and
SN75C189A are low-power bipolar quadruple
line receivers that are used to interface data
terminal equipment (DTE) with data circuitterminating equipment (DCE). These devices
have been designed to conform with Standard
ANSI/EIA-232-D-1986, which supersedes
RS-232-C.
The SN65C189 and SN75C189 have a 0.25 V
typical hysteresis compared with 1 V for the
SN65C189A and SN75C189A. Each receiver
has provision for adjustment of the overall input
threshold levels. This is achieved by choosing
external series resistors and voltages to provide
bias levels for the response control pins. The
output is in the high logic state if the input is left
open circuited or shorted to ground.

3
4
tThis symbol is in accordance with ANSI/IEEE Std 91- 1984 and
lEe Publication 617-12.

logic diagram (each receiver)

A~Y
RESPONSE
CONTROL

--.::r

These devices have an on-chip filter that rejects input pulses of shorter than 1-p.s minimum duration. An
external capacitor may be connected from the control pins to ground to provide further input noise filtering
for each receiver.
The SN65C189, SN75C189, SN65C189A, and SN75C189A have been designed using low-power
techniques in a bipolar technology. In most applications, these receivers will interface to single inputs of
peripheral devices such as UARTs, ACEs, or microprocessors. By using sampling, such peripheral devices
are usually insensitive to the transition times of the input signals. If this is not the case, or for other uses,
it is recommended that the SN65C189, SN75C189, SN65C189A, and SN75C189A outputs be buffered
by single Schmitt input gates or single gates of the HCMOS, ALS or 74F logic families.
The SN65C189 and SN65C189A are characterized for operation from -40°C to 85°C. The SN75C189
and SN75C189A are characterized for operation from OOC to 70°C.

Copyright © 1990, Texas Instruments Incorporated

PRODUCTION DATA documents contain information

currant IS of publication date. Products conform to
specifications par the terms of Texas Instruments

:~~~~:~~i~ai~:1~1e ~::\~:i:r lIr::;:::.:~~s not

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-817

SN65C189, SN65C189A, SN75C189, SN75C189A
QUADRUPLE LOW-POWER LINE RECEIVERS
schematic of inputs and outputs
EQUIVALENT OF EACH OUTPUT

EQUIVALENT OF EACH INPUTt

------------------.------VCC

INPUT----.---------------------~

3.4 kll

RESPONSE ______.----r.::JE~S~O~:J--._--~
CONTROL

PROTECTION

. -......-OUTPUT

1.5 kll

530 II

t All resistor values shown are nominal.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 V to 30 V
Output voltage range ............................ : . . . . . . . . . .. -0.3 V to VCC + 0.3 V
Continuous total dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN65C189, SN65C189A ............... -40°C to 85°C
SN75C189, SN75C189A ................. OOCto 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260°C
NOTE 1: All voltages are with respect to the

ne~work

ground terminal.

DISSIPATION RATING TABLE
PACKAGE

TA - 25°C
POWER RATING

DERATING FACTOR

D
DB

950 mW
525 mW

ABOVE TA - 25°C
7.6 mW/oC
4.2 mW/oC

N

1150mW

9.2 mW/oC

TA - B5°C
POWER RATING

494mW
273 mW
598 mW

recommended operating conditions
MIN
4.5

Supply voltage, VCC
Input voltage, VI (see Note 21
High-level output current, IOH

-25

Low-level output current, IOL

MAX

UNIT

5

6
25
-3.2

V
V
rnA
rnA

3.2
±1

Response control current

Operating free-air temperature, TA

NOM

I SN65C189, SN65C189A
I SN75C189, 5N75C189A

,

-40
0

85
70

rnA

°c

NOTE 2: The algebraic convention, where the more positive (less negative) limit is designated as maximum. is used in this data sheet

for logic levels only, e.g .. if -10 V is a maximum, the typical value is a more negative voltage.

TEXAS ."

2-818

INSTRUMENlS
POST OFFICE

eox 666303 •

DALLAS. TEXAS 75266

SN65C189, SN65C189A, SN75C189, SN75C189A
QUADRUPLE LOW·POWER LINE RECEIVERS
electrical characteristics over recommended free·air temperature range, Vee'" 5 V ± 10% (unless
otherwise noted) (See Note 3)
PARAMETERS
VT+
VTVhys

TEST CONDITIONS

Positive-going

SN75C189

threshold level

SN75C189A

Negative-going

SN75C189

threshold level

SN75C189A

Input hysteresis

SN75C189
SN75C189A

See Figure 1
See Figure 1
See Figure 1
VCC - 4.5 V to 6 V,

VOH

High-Ievol output voltage

= -20 p.A
= 0.75 V,
VCC = 4.5 V to
10L = 3.2 mA

VI

Low-level output voltage

=

0.75 V,

IIH

High-level input current

See Figure 2

IlL

Low-level input current

See Figure 2

lOS

Short-circuit output current

See Figure 3

ICC

Supply current

VI

=

= -3.2
= 3 V,

10H
6 V,

VI
VI
VI

=
=
=

VI
VI -

25 V
3 V
-25 V
-3 V

Typt

MAX

1

1.5

1.6

2.25

0.75

1.25

0.75

1

0.15

0.33

0.65

0.97

1.25

rnA

UNIT
V
V
V

3.5

10H

VI
VOL

MIN

V

2.5
0.4
3.6

8.3

0.43

1

-3.6

-8.3

-0.43

-1
-35

5 V, No load, See Figure 2

V
mA
rnA

420

700

rnA
p.A

TYP

MAX

UNIT

tAli typical values are at TA = 25°C.
NOTE 3: All characteristics are measured with response control terminal open.

switching characteristics at TA ... 25°e, Vee - 5 V ± 10%
PARAMETERS
tpLH
tpHL

Propagation delay time,
low-to-high-Ievel output
Propagation delay time
high-to-Iow-Ievel output

TEST CONDITIONS

MIN

CL

=

50 pF,

See Figure 4

6

p.s

CL

=

50 pF,

See Figure 4

6

p's

tTLH

Transition time, high-to-Iow-Ievel
output;

CL

=

50 pF,

See Figure 4

500

ns

tTHL

Transition time, high-to-Iow-Ievel
output;

CL

=

50 pF,

See Figure 4

300

ns

CL

=

50 pF,

See Figure 4

6

p.s

Duration of longest pulse

twIN)

rejected as noise §

1

;Measured between 10% and 90% points of output waveform.
§The intent of this specification is that any input pulse of less than 1 p'S will have no effect on the output, and any pulse duration of greater
than 6 p.S will cause the output to change state twice. Reaction to a pulse duration between 1 p.S and 6 p's is uncertain.

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 76285

2-819

SN65C189, SN65C189A, SN75C189, SN75C189A
QUADRUPLE LOW·POWER LINE RECEIVERS

. ~+-{

PARAMETER MEASUREMENT INFORMATIONt

~

/-------'
OPEN

UNLESS
OTHERWISE
SPECIFIED

1I
-=-

~

Cc

Vott

l1t~l

"

RC

-=-

-=-

-=--=-

~RC

1 _Vc ..L
=-=- + Vc
T
~

FIGURE 1. VT+. VT-. VOH. VOL

OPEN

RESPONSE
CONTROL
OPEN
ICC is tested for all four

receivers simultaneously

FIGURE 2. IIH. IlL. ICC

~-IoS

RESPONSE
CONTROL
OPEN

FIGURE 3. lOS

t Arrows indicate actual direction of current flow. Current into a terminal is a positive value.

TEXAS

+

INSIRUMENlS
2-820

POST OFFICE BOX

655~

• DALLAS. TEXAS 75285

+-....

SN65C189, SN65C189A, SN75C189, SN75C189A
QUADRUPLE LOW·POWER LINE RECEIVERS
PARAMETER MEASUREMENT INFORMATION
VCC

~r-----~~----- OUTPUT

RESPONSE
CONTROL
OPEN

TEST CIRCUIT

INPUT

- - - - - - - - - 3V

~I

\uv

1 ' - - - - - - - - OV

tPHL~
OUTPUT

~ tPLH

uv ~~O%

1;r~:-1-~-~-------- :::

trHL -.! t4-

~

I+- 'Tut

VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: 20
B. CL includes probe and jig capacitances.

= 50

(l,

tw

= 25

~s.

FIGURE 4. SWITCHING TIMES

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 865303 • DALLAS. TEXAS 75285

2-821

SN65C189. SN65C189A. SN75C189. SN75C189A
QUADRUPLE LOW·POWER LINE RECEIVERS
TYPICAL CHARACTERISTICS
SN75C189A
POSrTlVE-GOING THRESHOLD VOLTAGE
va
FREE-AIR TEMPERATURE

SN75C189
POSrTIVE-GOING THRESHOLD VOLTAGE
va
FREE-AIR TEMPERATURE
1.5

2.4

vcd J

1

=5.5

!.

VCC .. S•5V

2.2

>

1.4

I

>

•

I

f
J

1.3

+

1.2

31
0

-

f

...... i-""""

31

r1.8

0

J

l-

1.6

I

~

1.4

1.2

1.1
-40

-20

0
20
40
60
80
TA - Free-Air T.... perature _·c

-40

100

-20

0
20
40
60
80
TA - Free-A" T....perature _·C

SN75C189
NEGATIVE-GOING THRESHOLD VOLTAGE
vs
FREE-AIR TEMPERATURE

1

100

FIGURE 6

FIGURES

1.2

r-... . .

z:

I

!;

2

SN75C189A
NEGATIVE-GOING THRESHOLD VOLTAGE
va
FREE-AIR TEMPERATURE
1.15

.1.

.I

!.

VCC=5V

VCC=5.5V

1.1

1.1

>
I

8.

>
I

"

t

J

J
I

~

~

_f--

--

i

1.os

~

t-'"

J
J 0.18 -

L---

lI

0.1

~
0
20
40
60 80
TA - Free-Air Temperature _·C

100

-40

-20

20
40
60
80
0
TA - Free-A.- T.............. _·C

FIGURE 8

FIGURE 7

TEXAS ."

2-822

..

0.1

0.18

0.8
-80 -40 -20

--

~ i-""""

INSTRUMENTS
POST OFFICE BOX 655303. DALLAS, TEXAS 75265

100

SN65C189, SN65C189A, SN75C189, SN75C189A
QUADRUPLE LOW·POWER LINE RECEIVERS

TYPICAL CHARACTERISTICS
SN75C189

SN75C189A

INPUT HYSTERESIS

INPUT HYSTERESIS

VB

VB

FREE-AIR TEMPERATURE

FREE-AIR TEMPERATURE
1.2

0.40
0.38 -

]
VCC=5V
'-

I
.'
Vcc=5V

1.1

-

0.36

>

-

0.34

II

~

r-...... ,

I

0.32

....

,

0.30
0.28
0.26
0.6
0.24
0.5

0.22

0.20
-60 -40

0

-IZO

20

40

60

80

0.4

100 120

-40

-IZO

TA ........ AlrT_perature-·C

0
20
40
60
60
TA - F...AIr T_perature-·C

FIGURE 9

FIGURE 10

HIGH-LEVEL OUTPUT VOLTAGE

LOW-LEVEL OUTPUT VOLTAGE

VB

VB

FREE-AIR TEMPERATURE

FREE-AIR TEMPERATURE

3.8

>

3.6 _

•...

3.4

I

t

J]

3

J:
J1.'
I

2.6

::c

~

0.24
VdC=4.5I V
IOH=-3·2mA
VI =0.75 V

VCC =4.5 V

..-

0.22 :-

r•

0.2

I--

-

~

l

---

0

]
...!
I

~

2.4
2.2
-40 -IZO

>

20
40
60
80
TA - Fre.Alr T_perature _·C
0

100

IoL = -3.2 mA
VI=3V

I

3.2

2.8

100

0.18
0.16

--

0.14

r-0.12

.......V

....... ..".....

....

0.1
0.08
-40

-IZO

FIGURE 11

20
40
60
80
0
TA - F...Alr T_perature _·C

100

FIGURE 12

TEXAS

~

INSlRUMENTS
POST OFFICE BOX 866303 • DALLAS. TEXAS 75265

2-823

SN65C189. SN65C189A. SN75C189. SN75C189A
QUADRUPLE LOW·POWER LINE RECEIVERS
. TYPICAL CHARACTERISTICS

0.7

I

I
0

!
J:
g
::c

va

va

FREE·AIR TEMPERATURE

FREE·AlR TEMPERATURE
0.65

VI=3V

0.6

0.55

E
I

- -.....i'..

0.5

I

~

0.45
0.4
-40

-20

J

'"

........

1
~
l

r-- ...

20
40
60
80
TA - Fre.AIr Tempera"'ra -·e

0.6

0.55

I--.

~

0.5

0.4

0.35
-40 -20

100

0
20
40
60
80
TA - Fre.Alr Temperatura -·e

SN75C189

SN75C189A

LOW·LEVEL INPUT CURRENT

LOW-LEVEL,INPUT CURRENT

va

va

FREE-AIR TEMPERATURE

FREE-AIR TEMPERATURE

i

I
..e

!

...t

C

-4.3

E

Vee" 4.5 V
VI=-3V

-0.3

I

1:

a

-4.4

---

-4.5

-4.6

I

~

100

-0.2
Vee = 4.5 V
VI=-3V

I

0

'"

FIGURE 14

-4.2

E

............

0.45

FIGURE 13

C

............ r-.....

I

.J

0

V~=4.5V
VI=3V

c

0.65

I

.Ii

SN75C189A
HIGH·LEVEL INPUT CURRENT

Ve~=4.5V

C

E

SN75C189
HIGH·LEVEL INPUT CURRENT

V

i--""'"

1
!

---

!

-0.5

r-0.6

I

,!A

-4.7

-4.8
-40

-OA

------

f--~

-0.7

-20

0
60'
80
20
40
TA - Fre.Alr Temperature -·e

100

-0.8
-40 -20

FIGURE 15

0
20
40
60
80
TA - F....AIr Temperatura - OC

FIGURE 16

TEXAS·.Jf .
2·824

.-""

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 75265

100

SN65C189, SN65C189A, SN75C189, SN75C189A
QUADRUPLE LOW·POWER LINE RECEIVERS

TYPICAL CHARACTERISTICS
HIGH-LEVEL SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TENPERATURE

~

o

I

j

-2 -

I

_ -10

I

~

VCC =5.5 V
V,=O

I

-

I

1
l

<

E

-'_

VCC=5.5V
VO=O

I.

LOW-LEVEL SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE

10r---r-~r-~--~---+---+---;

-12
-14

-16
-40

-20

o

80
20
40
60
TA - F......AIr Tamperatura - OC

o~--~---~-----~--~--~---J

100

0
20
40
60
80
TA - Fr...AIr T.... peratu.. _·C

-40 -20

FIGURE 17

FIGURE 18
PROPAGATION DELAY TIME,
LOW-TO-HIGH-LEVEL OUTPUT
vs
FREE-AIR TENPERATURE

SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
800
700 -

•::L

V,=5V

600

I

500

a

-r--

J:
I

- --

1=

f
c

-

.2

3.5

3

I

a.

100

-40

4

I:s - -

200

o

=

Vee 4.5 V
CL=50pF

4.5

E

I

8

5

VC~=5.5IV

I

<::L

100

-20

0
20
40
60
80
TA - F......Alr T.......r""'.. _·C

100

~

2.5

2
-40 -20

FIGURE 19

0
20
40
60
80
TA - F......A.. Temperatura - OC

100

FIGURE 20

TEXAS ."

INSTRUMENTS
POST OFFICE BO)( 855303 • DALLAS. TEXAS 75286

2-825

SN65C189, SN65C189A, SN75C189, SN75C189A
QUADRUPLE LOW·POWER LINE RECEIVERS
TYPICAL CHARACTERISTICS
PROPAGATION DELAY TIME.
HIGH·TO-LOW·LEVEL OUTPUT

4

•
•
:I.
I

~

f

3.8 -

va

FREE-AIR TEMPERATURE

•

]
...
l

Vcc_ 4.5V
CL=50pF
350

J:

3.8

1..

3.7

J-

--

3A

r-

I

..

t

f

I

f

3.3
3
-40

400

:I.
I

CL,,60pF

3.5

-

va

FREE-AIR TEMPERATURE

VC~=4.s'V

3.6

I
..I

TRANSITION TIME,
LOW·To-HIGH-LEVEL

--20

0
20
40
60
80
TA - Fre.AIr Temper""'r. _·C

100

300

V"

./

250

200

,.,..

".

/

160
100
-40 --20

20
40
60
80
0
TA - Fre.AIr Temperat...... - ·C

FIGURE 22

FIGURE 21

TRANsmON TIME.
HIOH-To-LOW·LEVEL

va
FREE-AIR TEMPERATURE
200

VC~ .. 4.5IV
180 f- CL=50pF
I!

~
j

180
140
120

!

100

~

80

I

V

..-

~I-

80
40
-40

--20

0
20
40
eo
eo
TA - F....AIr Temperature _·C

FIGURE 23

TEXAS .."

2-826

V

. INSTRUMENTS
POST QPFlCE BOX 866303 • DALLAS. TEXAS 762&5

100

100

SN65C198, SN75C198
QUADRUPLE LOW·POWER LINE DRIVER
03472, JULY 1990

•

Meets EIA·232·D (Revision of RS·232-C)

0, DB, OR N PACKAGE
(TOPVIEWI

.. Very Low Supply Current ... 115 pA Typ
•

Sleep Mode:
3·State Outputs in High·lmpedance State
Ultra Low Supply Current . . . 17 pA Typ

•

Improved Functional Replacement for:
SN75188
Motorola MC 1488
National Semiconductor OS 14C88 and
DS1488

•

CMOS- and TTL-Compatible Data Inputs

•

On-Chip Slew-Rate Limit ... 30 VIps

•

Output Current Limit . . . 10 mA Typ

•

Wide Supply Voltage Range ... ±4.5 V to
±15 V

•

ESD-Protection Exceeds 2000 V Per
MIL-STD-883C. Method 3015.2

Vcc1A
1Y
2A
2B
2Y
GND

VCC+

--"" _ _..1""

SM
4A
4Y
3B
3A
3Y

logic symbol t

1Y

1A
2A

2Y

2B

3A

description

3Y

3B

The SN65C198 and SN75C198 are monolithic
low-power BI-MOS quadruple line drivers
designed to interface data terminal equipment
(DTE) with data circuit-terminating equipment
(DCE) in conformance with the specifications of
ANSIIEIA-232-D-1986.
The Sleep Mode input SM can be used to switch
the outputs to high impedance. which avoids the
transmission of corrupted data during power up
and allows significant system power savings
during data-off periods.

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

logic diagram (positive logic)

The SN65C198 is characterized for operation
from -40 o C to 85°C. The SN75C198 is
characterized for operation from O°C to 70 o C.
FUNCTION TABLE
INPUTS
A

B

V

H

H

H

H

L

X

L
H

H

X

L

H

L

X

X

Z

13

1A

2A
2B

3A

OUTPUT

8M

4Y

4A

3B

4A

2

1Y

4

2Y

5
8

10
12

3Y
11

4Y

H = high level, L = low level,
X = irrelevant,
Z = high-impedance

PRODUCTION DATA documenls contain information
currant IS of pullli.ltion data. Products .onform 10
.pacilicall... por tho tor..s of To••• I.strumanls

:'~::~~1;81~r:1~1i ~~:~:r :'~D=~~::.s not

Copyright @ 1990, Texas Instruments Incorporated

TEXAS " ,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-827

SN65C198, SN75C198
QUADRUPLE LOW·POWER LINE DRIVER
schematics of inputs and outputs
EQUIVALENT OF A AND B INPUTS

EQUIVALENT OF SLEEP MODE INPUT
Vcc+ ---e------~~------

Vcc+

INPUT A

Internal
1.4V
reference to

SM
INPUTS

Internal
1.4V
reference to

GND

GND
INPUTB
(Driver 2 and
3 only)

Vcc-

---..----i__--

Vce- - -...- -.....

TYPICAL OF Y OUTPUTS
Vcc+

1600
OUTPUT

720
Vce-

All resistor values shown are nominal.

TEXAS ."

2·828

INSlRUMENlS
POST OFFICe sox 8$5303 • DALlAS, TeXAS 76265

SN65C198. 8N75C198
QUADRUPLE LOW·POWER LINE DRIVER

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc + (see Note 1) .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
Supply voltage, VCC _ .................................................... -15 V
Input voltage range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -15 V to 15 V
Output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. VCC - - 6 V to VCC + + 6 V
Continuous total power dissipation ............................ See Dissipation Rating Table
Operating free-air temperature range: SN65C 198 ......................... - 40°C to 85 °C
SN75C198 ............................ OOC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . .. 260 °c
NOTE 1: All voltages are with respect to the network ground terminal.
DISSIPATION RATING TABLE
PACKAGE

TA - 25°C
POWER RATING

DERATING FACTOR

D

950mW

ABOVE TA - 25°C
7.6 mWfoC

DB

525 mW

4.2 mWfoC

N

1150mW

9.2 mWfoC

TA - 85°C
POWER RATING
494mW
273 mW
598'mW

recommended operating conditions
UNIT

MIN

NOM

MAX

Supply voltage, VCC +

4.5

12

15

V

Supply voltage, V CC-

-4.5

-12

-15

V

VCC+

V

Input voltage, VI (see Note 2)

VCC- +2
2

High-level input voltage, VIH

LA and B inputs
Low-level input voltage, VIL 18M'
M Input.
..
I SN65C198
Operating free-air temperature, T A . I SN75C198

V
0.8
0.6

-40

85

0

70

V
°c

NOTE 2: The algebraiC convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet
for logic levels only, e.g., if -10 V is a o:naximum, the typical value is a more negative voltage .

. TEXAS .."
INSTRUMENTS
POST OFFICE

Box 865303

• DALLAS. TEXAS 7&285

2-829

SN65C198. SN75C198
QUADRUPLE LOW-POWER LINE DRIVER
± 12 V, SM at 2 V

electrical characteristics over recommended free-air temperature range, Vee ±
(unless otherwise noted)
PARAMETER
VOH

TEST CONDITIONS
VIL = 0.8 v,
RL = 3 KII

High-level output voltage

VOL

Low-level output voltage (see Note 21

IIH

High~level

IlL

Low-level input current

input current

VCC± = ±5 V
VCC± = ±12 V
VCC± = ±5V
VCC± = ±12V

VIH = 2 V,
RL = 3 kll
VI = 5 V
VI = 0

MIN
4

Typt

IOSH
IOSL
ro

SNI at 0.6

High-impedance state output current

-4
-10

VCC± = ±12 V
Vo - 0 or VCC-

High-level short-circuit output current*
Low-level short-circuit output current t

VI = 0.8 V,

Output resistance with power off

VCC± = 0,
A and B inputs at 0.8 V
or 2 V, no load
A and B inputs at 0.8 V or

ICC+ Supply current from VCC +
,

ICC- Supply current from V CC _

VI = 2 V,

Vo = 0 or VCC+
Vo = -2 V to 2 V

2 V, RL = 3 kll,

SNI

p.A

~10

p.A

p.A
-100
-4.5

-10 -19.5

4.5

10

19.5

90
95

160

300

mA
mA
II

VCC± - ±5 V
VCC± = ±12 V
VCC± = ±5 V

2 V, RL = 3 kll, SNI at 0.6 V VCC±
A and B inputs at 0.8 V
VCC±
or 2 V, no load
VCC±
A and B inputs at 0.8 V or
VCC±

V

10

100

VCC± = ±12 V
Vo = -12V,

V

UNIT
V

10

Vo = 12 V,
IOZ

MAX

17

17

= ±12 V
= ±5 V
= ±12 V

= ±5 V
at 0.6 V VCC± = ±12 V

160
40

-90
-95
-17

40
-160
-160
-40

-17

-40

p.A

p.A

t All typical values are at T A = 25 ·C.
tNot more than one output should be shorted at a time.
NOTE 2: The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet
for logic levels only, e.g., if -10 V is a maximum, the typical value is a more negative voltage.

switching characteristics over recommended operating free-air temperature range,
(unless otherwise noted)
PARAMETER
tpLH Propagation delay time, low-to-high-Ievel output 9
tpHL Propagation delay time, high-to-Iow-Ievel output §
tTLH Transition time, low-to-high-Ievel output'
tTHL Transition time, high-to-Iow-Ievel output'
tTLH Transition time, low-to-high-Ievel output#

TEST CONDITIONS
RL = 3 kll to 7 kll,
See Figure 1
RL = 3 kll to 7 kll,
See Figure 2
RL = 3 kll to 7 kll,
See Figure 3

tTHL Transition time, high-to-Iow-Ievel output"
tpZH Output enable time to high level
tpHZ Output disable time from high level
tpZL Output enable time to low level
tPLZ Output disable time from low level
Output slew rate#
SR

MIN

0.53
0.53
CL - 2500 pF,

1
1

MAX
3
3.5
3.2
3.2

1.5
1.5

UNIT
p.s

p.s
flS
p's
flS
flS

CL=15pF,

50

p.s
p.s

RL=3kllt07kll,
See Figure 4

CL=15pF,

10
15
10

RL = 3 kll to 7 kll,

CL = 15 pF

TEXAS . "

INSTRUMENTS
POST OfFICE

Typt

CL = 15 pF,

6

t All typical values are at T A = 25 ·C.
§tPHL and tpLH include the additional time due to on-chip slew rate and are measured at the 50% points.
, Measured between 10% and 90% points of output waveform.
#Measured between 3-V and - 3-V points of output waveform.

2-830

Vee ± - ± 12 V

eox 8&5303 •

DALLAS. TEXAS 76285

15

30

p.s
flS
V/flS

SN65C198. SN75C198
QUADRUPLE LOW·POWER LINE DRIVER

PARAMETER MEASUREMENT INFORMATION
INPUT
1.5V
~-;.;;--------

J.

INPUT

..::.J!!\
j...J...
~

---.,.:

~----_1~~~--OUWUT

ll•...",.,---

tPHL

90% \.50%

OUlPUT

:

10% 10%

-+I

TEST CIRCUIT

tpLH

L-------VOl
I

t+--

VOH

90%

50% I

I

I

trHL

3V

ov

I

*-trLH

-..

VOLTAGE WAVEFORMS

FIGURE 1. PROPAGATION AND TRANSITION TIMES
INPUT

~----~-------------3V

I

INPUT

\

--'
)O---~~~--

OUTPUT
OUTPUT

' - - - - - - OV

3 V \ ; k 3V
~-3V -3V

VOH

I!

:I+:\----4
t--------.:
l

I+-

trHL .-.

VOL

trLH

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 2. PROPAGATION AND TRANSITION TIMES
NOTE: A. The pulse generator has the following characteristics: tw
B. CL includes probe and jig capacitance.

=

25

~s.

PRR

=

20 kHz. Zo

=

50 0, tr

= If

S 50 ns.

INPUT
PULSE
GENERATOR
(SoeNoleAl

~
1.SV
1.SV

----3V

INPUT

Ii. _I
ov

-------I

~tpzH

1>-------....- .....- - OUWUT

I

O.SV

I

1
~
t

I

tL
"=' (Soe Note Bl

OUTPUT

VOH/.

ov

I
--'L.VOH
1I

tPHZ~

V",,~OV

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 3. DRIVER ENABLE AND DISABLE TIMES
INPUT

../1.5V \1::---::
1

I

tpZL~

II-Not.

I

I---t-tptz

I

)O-------<~--.--- OUTPUT

I

~
-1-

CL

OUWUT

Bl

I

I

VOl/.

V""~OV

_!:.!.5V
VOL

VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 4. DRIVER ENABLE AND DISABLE TIMES
NOTE: A. The pulse generator has the following characteristics: tw
B. CL includes probe and jig capacitance.

=

25

#5,

PRR

=

20 kHz, Zo

=

50 0, tr

= tf

S

50 ns.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 8&&303 • DALLAS. TEXAS 7&266

2-831

SN65C198, SN75C198
QUADRUPLE LOW·POWER LINE DRIVER
TYPICAL CHARACTERISTICS
OUTPUT CURRENT
vs
OUTPUT VOLTAGE

VOLTAGE TRANSFER CHARACTERISTICS
15

20

VCC:I: - :1:15 V
12 ~VCC:!: - :1:12 V

16
12

9 r---vCC:I: .. :1:9 V

>
I

6

~

3

.'"

II

>

r-tcc~

_I :!:SIV

"

a.

"'

-3

0
I
0

-6

>

"'E

8

C
~

4

U

"

0

0
I

-8

I

0

~

5

VCC± - :1:12 V
TA - 25"C

-9

VCC:I:-:l:5V

5a.
5 -4

VCC:l:-:!:9V

9

VCC:I: - :1:12 V

/
7-

I

J

.1

VI-Input Voltage-V

-8

I VCC:I:

---

r---

10 I- 10SL
VI - 2V
I - Vo - 0 or VCC+
5

E
!!

;;

u

~

"
5

4

8

12

16

OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE

-

~

:l:12V

VOH (Vee:!: - :!:12 V, VI - 0.8 VI

...

>

8

RL - 3 kll

I

8,
I'G

~

4

>

Q.

a

~

0

0

:;
o

'3
~

~

-5

~

.r:.


VOL (Vee:!: - :!:12 V. VI - 2,VI

= 0 or VCCI

Of---+--+-+-+----\--f---+--/

-12L-~_~_-L_J-_~_L-~_-J

80

TA - Free-Air Temperature -

100
0

120

-40 -20

20

40

60

80 100 120

T A - Free-,Air Temperature -

C

FIGURE 5

FIGURE 4

TEXAS

~

INSIRUMENTS
2-832

0

POST OFFICE BOX 665303 • DALLAS. TEXAS 75266

°c

SN65C198, SN75C198
QUADRUPLE LOW-POWER LINE DRIVER

TYPICAL CHARACTERISTICS
POWER-OFF OUTPUT RESISTANCE
vs
FREE-AIR TEMPERATURE

INPUT CURRENT
vs
FREE-AIR TEMPERATURE

120
100

«

"
I

E
!!
;;
u
'5Q.

\ '\

VCC± = 0

"-

"",-

80
60

500

VCC± = ±12 V

-

~
I

S"

"

-~

40

a:

~

'5

o
I

0

350

~o

IlL (VI = 01

/'

-40
- 40 - 20

0

20

40

60

80

300
- 40 - 20

100 120

0

FIGURE 6

VCC±-±5V

30
SLE1

;:;'""-

"

I

80

100 1 20

I

1.1'

~

"

I

iii

:;

c.
0

-40

"
I

VCC+ - ±5 V
A
I

VCC± = ±12 V
CL-15pF

I
"'~~~r

1;

o

+1
~ - 120
-40 -20

I

;-....? ~

20

a:

-80 -ICC

RAT~

~ITIVE TRANSITION)

I

RL - No load
VI - 0_8 V or 2 V

40

60

OUTPUT SLEW RATE
vs
FREE-AIR TEMPERATURE

Vcc± - ~112 V I
ICC+

40

FIGURE 7

SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE

120

20

T A - Free-Air Temperature - °C

T A - Free-Air Temperature - ° C

80

2V

Vo

400

~

20

I

-20

---:::: b::====~

Vo '\ -2 V

""

IIH (VI = 5 VI

E
.:

450

3 kG;

RL - 3 kG'RL - 7 kG

SLEW RATE
10 (NEGATIVE
TRANSITION)

a:

VI

~

VCC± - ±12 V
0
20
40 60

80

100 120

o

- 40 - 20

0

20

40

60

80

100 1 20

T A - Free-Air Temperature - °C

TA - Free-Air Temperature - °C

FIGURE 8

FIGURE 9

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DAllAS. TEXAS 75265

2-833

SN65C198, SN75C198
QUADRUPLE LOW-POWER LINE DRIVER
TYPICAL CHARACTERISTICS
OUTPUT TRANSITION TIME
vs
FREE-AIR TEMPERATURE

PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE

2

..

,'''' .,..

I

1.5

E

i=

.

..

I

.5
l-

Qj

C

.g

........

'g>"

.
I

I

I

CL

~ ;..

-in

.
e:

tTLH

V
c

CL - 2500 pF
tTHL15pF
I

I

tTLH--

-

.g

RL - 7 kll

~

-

e:

~

Q,

!:

~

1.5

"-

./.RL - 3 kll

I--- tpLH

e:

Il.

r- RL - 3t07 kll

VCC± - ±12 V.
CL - 16 pF

>-

tT~L

VCC± - ±12 V

I

'jRL-.3kll

"-

.,

2

.-I-RL - 7 kO
tPHL

I

t" 0.5

0.5

I

J'
o

- 40 - 20

0

20

40

60

80

100 120

o

- 40 - 20

0

20

FIGURE 10

100 120

OUTPUT DISABLE TIME FROM HIGH LEVEL
vs
FREE-AIR TEMPERATURE
0.8

I

2°lrtj:=+:::t==r~1

0.6

15r-~---r--~--+-~'--+--~--1

0.5

j

VCC'" = ",12 V
RL=3kr.!
CL = 15 pF

0.7

--1---

10~~---+---+--~--4---+---+--4

0.4

0.3

o~~--~--~--~~~~--~~

0
40
60
80
100
20
TA - Free-Air Temperature - ·C

120

--

~

0.2
-40

-20

FIGURE 12

.....,.

V V"

o 20 40 60 80 100
TA - free-Air Temperature - ·C
FIGURE 13

TEXAS . "

2-834

80

FIGURE 11

OUTPUT ENABLE TIME TO HIGH LEVEL
vs
FREE-AIR TEMPERATURE

-20

60

TA - Free-Air Temperatu,e - °C

T A - Free-Air Temperature - °C

-40

40

INSTRUMENlS
POST OFFICE BOX 6&5303 • DAlLAS. TEXAS 76286

120

SN65C198. SN75C198
QUADRUPLE LOW·POWER LINE DRIVER
TYPICAL CHARACTERISTICS

.

"I

'il

~

!g

..

E
i=

8

I

I

VCC±=±12V
"RL=3kQ
CL= 15 pF

2.5

2

5

111

3

'5
'5

2

0

Vcc±= ±12V
RL=3kQ
CL = 15 pF

6

4

...

3

7 _

~II
C

OUTPUT DISABLE TIME FROM LOW LEVEL
vs
FREE·AIR TEMPERATURE

OUTPUT ENABLE TIME TO LOW LEVEL
vs
FREE·AIR TEMPERATURE

-

1.5

r--

10-

I

0.5

..J

~

o

o
-40 -20

- - - --

0
40
80 100
60
20
TA - Free·Alr Temperature - 'C

120

-40

-20

o 20 40 60 80 100
TA - Free·Alr Temperature - 'C

120

FIGURE 15

FIGURE 14

TEXAS"'"

INSlRUMENlS
POST OFFICE BOX 855303 • DALlAS. TEXAS 7528&

2-835

2-836

SN95176B
DIFFERENTIAL BUS TRANSCEIVER
MARCH 1989

•

Bidirectional Transceiver

•

Suitable for Most EIA Standards RS-422-A
and RS-4B5 Applications

•

Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments

•

JG PACKAGE
(TOP VIEW)

~[]8
VCC
2
7
B

RE
DE
D

3

6
5

4

A
GND

3-State Driver and Receiver Outputs

•

Individual Driver and Receiver Enables

•

Wide Positive and Negative Input/Output
Bus Voltage Ranges

± 60 rnA

•

Driver Output Capability . . .

•

Thermal Shutdown Protection
Driver Positive and Negative Current
Limiting

•

Receiver Input Sensitivity ...

•

Receiver Input Hysteresis ... 50 mV Typ

•

Operates from Single 5-V Supply

•

Low Power Requirements

R
NC
RE
NC
DE
NC
D

Max

•

± 200

W PACKAGE
(TOP VIEW)

VCC
NC
B

NC
A

NC
GND

mV
FK PACKAGE
(TOP VIEW)
U

U

U
UU

za: z>z

'3

description

NC
RE
NC
DE
NC

The SN95176B differential bus transceiver is a
monolithic integrated circuit designed for
bidirectional data communication on multipoint
bus transmission lines. These transceivers are
suitable for most RS-422-A and RS-485
applications to the extent of the specified data
sheet characteristics and operating conditions.
The SN95176B combines a 3-state differential
line driver and a differential input line receiver
both of which operate from a single 5-V power
supply. The driver and receiver have active-high
and active-low enables, respectively, that can be
externally connected together to function as a
direction control. The driver differential outputs
and the receiver differential inputs are connected
internally to form differential input/output 11/0)
bus ports that are designed to offer minimum
loading to the bus whenever the driver is disabled
or Vee =.0. These ports feature wide positive
and negative common-mode voltage ranges
making the device suitable for party-line
applications.

1 2019

2

4

18

NC

5

17

B

6

16

NC

15

A

14

NC

8

9 1011 1213
UO UOU
Z

zzz
(!)

NC - No internal connection

FUNCTION TABLE (DRIVER)
INPUT

ENABLE

D
H

DE
H

L
X

OUTPUTS
A
H

B
L

H

L

H

L

Z

Z

FUNCTION TABLE (RECEIVER)
DIFFERENTIAL INPUTS

ENABLE

A-B

liE

VID,,0.2 V

L

-0.2 V-{l1

t

VOC

.J:

+IOLVIOH

.. -IO H

VOL

.J: -=

FIGURE 1. DRIVER VOD AND VOC

-=-=

FIGURE 2. RECEIVER VOH AND VOL

~
1.5V
1.5V

--3V

INPUT

GENERATOR
IS •• No•• A)

f

f

I

:

I

'OO~

50 l!

I

I
T-

I

OUTPUT

_ _......r

3V

OV

~'OO
~2.5V

SO%

I
l

~-2.S

'TO-+! ~

V

"'TO

VOL TAGE WAVEFORMS

TEST CIRCUIT

FIGURE 3. DRIVER DIFFERENTIAL-OUTPUT DELAY AND TRANSITION TIMES
OUTPUT

~
1.SV
1.5V

----3V

INPUT
OVor3V---t

I

j4--.I- tpz H

GENERATOR
IS.. Not. AI

I
I

OV

O.S V

--*-VOH
I
1~
2.3
I ,

OUTPUT

son

I

V

tPHZ~

Voff"'OV

"::"

VOL TAGE WAVEFORMS

TEST CIRCUIT

FIGURE 4. DRIVER ENABLE AND DISABLE TIMES
SV

INPUTJ,l.S V

3VorOV----f

GENERATOR
IS•• Not. A)

I

tpz L --14---+1

T

I

I

CL=50pF
ISeeNot.B) _

son

_ _~I
OUTPUT

'\2.3 V

VOL TAGE WAVEFORMS

TEST CIRCUIT

FIGURE 5. DRIVER ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the foUowing characteristics: PRR :s MHz, 50% duty cycle, tr :s 6 ns,
tf :s 5 ns, Zo = 50 O.
B. CL includes probe and jig capacitance.'
C. Equivalent test circuits may be substituted for actual testing.

TEXAS~

INSTRUMENTS
2-842

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN95176B
DIFFERENTIAL BUS TRANSCEIVER

PARAMETER MEASUREMENT INFORMATION
-3V

~

INPUT
GENERATOR

1.5V

51 11

(See Note AI

. I 1.SV

I
ov
I4-tI- tPHL

I

1.5V

I

tpLH

-l4-+t

:---VOH

~

OV--_J

OUTPUT

1.3 V

1.3 V

VOL
VOLTAGE WAVEFORMS

TEST CIRCUIT

FIGURE 6. RECEIVER PROPAGATION DELAY TIMES
1.5V

51

S2

2kH

-1.5V----O

0 - - 5V

lN916 OR EQUIVALENT

GENERATOR

50 H

(See Note Al

=

TEST CIRCUIT
_----3V

INPUT~--~~=:':V

~

I ----1.5V

INPUT.

I
tpZH

~

Slto-l.5V

0 V S2 closed

I
tPZl~

-+I 14I

OUTPUT

I
I

OV

VOH

1.5 V

----O.V

S3 open

0",""' ~ ••., "
VOL

,~"'

~---"

--I: .

~y

L

OV

Sl to 1.5 V

82 closed
S3 closed

. --I: ._tp LZ --I+-+j

I

OUTPUT

'" -

-

~OV

51 to -1.5 V

52 closed
53 closed

I

tPHZ~

~i

~--3V

INPUT

r-

'------L. __ _

.

I

~--~1.3V

O U T P U T - - - " , 0.5 V

~1.3V

'--VOL

VOL TAGE WAVEFORMS

FIGURE 7. RECEIVER OUTPUT ENABLE AND DISABLE TIMES
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR S MHz, 50% duty cycle, 'r s 6 ns,
tf s 5 ns, Zo = 50 Il.
B. CL includes probe and jig capacitance.
C. Equivalent test circuits may be substituted for actual testing .

. TEXAS.
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-843

SN95176B
DIFFERENTIAL BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
DRIVER HIGH-LEVEL OUTPUT VOLTAGE
vs
DRIVER HIGH-LEVEL OUTPUT CURRENT
5
VCC I= 5V
0'~ 4.5
TA=25 C
4

f

> 3.5
;
a.
3
;

o

2.5

~
.!l

2

-§,

1.5

:f

r--- .........

r---.

.........

r-.....

DRIVER LOW-LEVEL OUTPUT VOLTAGE
vs
DRIVER LOW-LEVEL OUTPUT CURRENT
5
VCC'= 5 V
> 4.5 -TA=25°C
I
& 4
~
I
0
3.5

>
;
3
a.
; 2.5
0

,

'ii

>

CD

""~
0
""I
""0
>

I
J:

~ 0.5

o
o

-20

-40

-60

-80

J
IL

2
1.5

.,.
0.5

o

-100 -120

o

10H-High-Level Output Current-rnA

- --

20

I--

40

FIGURE 9
DRIVER DIFFERENTIAL OUTPUT VOLTAGE
vs
, DRIVER OUTPUT CURRENT
4

3.5

t

3

~...

.....

e. 2.5

c3

ii

e

;o

v~c=b

~

V ,..-TA=25°C

........

I'-.....

""

2

.~

1.5

1'\

\

I

g 0.5

>

o

\

o

10 20 30 '40 50 60 70 80 90 100
10 - Output Current-rnA

FIGURE 10

TEXAS •
INSTRUMENTS
2-844

60

80

100

'OL -Low·Leve' Output Current-rnA

FIGURE 8

>.,

II

POST OFFICE BOX 655303 • DAl.LAS, TEXAS 75265

120

SN951768
DIFFERENTIAL 8US TRANSCEIVER
TYPICAL CHARACTERISTICS
RECEIVER HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5
VID = 0.2 V
>I
TA = 25°C
'" 4
~
~
"0

RECEIVER HIGH-LEVEL OUTPUT
vs
FREE-AIR TEMPERATURE

..

..e"

o

"0

>
S 3 f---1--+--+-+-+--+--f--I

5

1,1_

o
~

Qj

....a;

2

"---l---t--+--+--+--4--+--I

..:.2'

:J:

k 1 "---l---t--+--+--+--4--+--I
o

~~

o

>

-40
-20
-10
-30
-50
IOH-High·Level Output Current-rnA

OL-~

__- L__

.

.."

V

"0

>

e
0"

,.
......

0.4

)7

0.3

Qj

~

0.2

0

.....
.....I 0.1
0

/

RECEIVER LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
0.6
VCC = 5 V
VIO = -200 mV
>
I 0.5 IOl = 8 rnA

V

VCC =5V
TA = 25°C

0.5
&
to

./

Q)

i/

'"
15'"

>

0.4

S0.

~
a;
....

l7

0.3

r-

i--

Qj

V

~

0.2

.3
I

c5 0.1

>

o

__- L__~__L-~

FIGURE 12

RECEIVER LOW-LEVEL OUTPUT VOLTAGE
vs
RECEIVER LOW-LEVEL OUTPUT CURRENT

>I

~~

-40 -20 o
20 40 60 80 100 120
TA - Free-Air Temperature - °c

FIGURE 11

0.6

-+--t---1f---+---1

~

3

I

VIO - 200 rnV
IOH - - 440 /LA

I
~4

>

~~
~~
0"
~
~ ~ ~VCC=5.25V
2
......
..c::
~ ~~VCC=5V
VCC = 4.75 V
:f'"
~~
I
:J:
0
~~
>

VCC _ 5T V

5

>

>

o

5
15
20
10
25
30
IOl -Low level Output Current-rnA

o

-40 -20

FIGURE 13

o 20 40 60 80 100 120
TA- Free·Air Temperature- DC
FIGURE 14

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-845

SN95176B
DIFFERENTIAL BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

5
VID = 0.2 V
Load = 8 kn to ground
TA = 25°e

4

I

>I

i!j,

:l

0

Vee=5V

3

6

I

5

.I.
Vee = 5.25 V-

-

>I

=--

i!j,

Vee = 4.75 V_

';>

Vee = 4.75 V

4

I
.!
VID = -0.2 V
Load = 1 kn to Vee
TA=25°e

+ ___
" Vee=5V
I

!l
0

>
;

;-

II

Vee = 5.25 V

>
...

3

0

2

"::J
S-

2

I

0

0

>

>

o

o

0.5

1.5

2

2.5

o
o

3

0.5

VI-Enable Voltage-V

FIGURE 15

2.5
1.5
2
VI-Enable Voltage-V

3

FIGURE 16

APPLICATION INFORMATION
SN95176B

SN95176B

UP TO 32

TRANSCEIVERS

NOTE: The line should be terminated at both ends in its characteristic. impedance. Stub lengths off the main line should be kept as short
as possible.

FIGURE 17. TYPICAL APPLICATION CIRCUIT

TEXAS •

. INSTRUMENTS
2-846

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

TCM78808
OCTAL ASYNCHRONOUS RECEIVER/TRANSMITTER
02941. APRil 19S6-REVISED JULY 1990

•
•

•

•
•
•
•
•

•
•
•

FN. HA. OR HB PACKAGE
(TOP VIEW-UD UP FOR HA OR HBI

Eight Independent Full-Duplex Serial Data
Lines
Programmable Baud Rates Individually
Selectable for the Transmitter/Receiver of
Each Line (50 to 19.200 Baud)
Summary Registers Allow a Single Read to
Detect a Data Set Change or to Determine
the Cause of an Interrupt on Any Line
Triple Buffers for Each Receiver
Device Scanner Mechanism Reports
Interrupt Requests Due to
Transmitter/Receiver Interrupts
Independently Programmable Lines for
Interrupt-Driven Operation

o~r~~~rr~~r~~~r~~
xxu cx

cc~coco~oo~ocac
ox~uxxuwxxw
>~o
~~oc~~o
~~c

98765432

~

1 6867666564 63 62 61

Dl7 10
Dl6 11
Ol5 12
Ol4 13
ROY 14

60
59
58
57

15
16
17
18
19
20
21

55
54

56

53
52
51

50
49
48
47
46
45

22
23
24

Modem Status Change Detection for Data
Set Ready (DSR) and Data Carrier Detect
(DCD) Signals

25
28
V~~~~~~~~$D~~®~~~

.

NC
VSSI
ClK
MRESET
A5
A4
A3
OS2
A2
AI
AD
iRQ
IROTXRX
IROlN2
IROlNl
IROlNO
VOO2

Programmable Interrupts for Modem Status
Changes
Synchronizes Critical Read-Only Registers

NC - No internal connection

Replaces Eight Signetics 2661 UARTs

PACKAGE DESIGNATIONS

Direct Second Source to DEC DC349
(78808)

description

DESCRIPTION
Cerquad Gull-Wing

TI

'DEC

HA

GA

Cerquad Straight
Plastic PLCC

HB
FN

FA

The TCM78808 octal asynchronous receiver/transmitter is designed for the new generations of
asynchronous serial communications and for microcomputer systems. The device performs the basic
operations necessary for simultaneous reception and transmission of asynchronous messages on eight
independent lines.
On-chip baud rate generation allows the designer to select and program anyone of 16 rates between 50
and 19,200 baud. Baud rates are selectable for each receiver and transmitter. A built-in scanning mechanism'
provides an alternative to the customary polling of status registers.
The TCM78808 functions as a serial-to-parallel, parallel-to-serial converter/controller. It can be programmed
by a microprocessor to provide different characteristics for each of its eight serial data lines (stop bits.
parity, character length, baud rates, etc.). Each individual serial line functions as a one-line UART-type device.
An integral interrupt scanner checks for device interrupt conditions on the eight lines of the TCM78808.
Its scanning algorithm is designed to give priority to receivers over transmitters. The scanner can also be
programmed to check for interrupts due to changes in modem control signals (DSR and DCD).
The TCM78808 contains two types of programmable registers: line specific and summary. The six linespecific registers provide independent control of each of the eight serial lines. Two summary registers
consolidate information about the current state of all eight lines and allow programs to service device
interrupts quickly and efficiently.

PRODUCTIOI DATA d....llIts c.nt.i. infa,motio.
comat .1 01 pu~lIcotio. dII•• P"",,,eII confann to
specilicotiln. par t.1 tar... of T.... In.tr....nts
lllidani wa,,"lIy. P,od.ction pr.....i•• dOlI nil
....... rlly i••lod. IIlIi•• of .11 p..lmlllrs.

Copyright © 1990. Texas Instruments Incorporated

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

2-847

TCM78808
OCTAL ASYNCHRONOUS RECEIVER/TRANSMITTER
Each of the eight serial data lines in the TCM78808 has.a set of line-specific registers for buffering data
into and out of the line and for external control of line characteristics. The receiver buffer register comprises
a character assembly register plus a two-entry, first-in first-out (FIFO) buffer. The transmitter holding register
provides similar functions on the output side. Information about the current state of the given line. is contained
in the (read-only) status register. Two mode registers control communications parameters. One mode register
handles stop bits, parity, character length, and modem control interrupt enable (MCIE). The second mode
register sets the incoming and outgoing baud rates. The command register controls various other functions
of the given line.
The TCM78808 has a pair of summary registers that provide the current status of all eight serial data
lines. This makes it possible to determine that line status has changed with a single read operation. The
(read-only) interrupt summary register indicates that an interrupt has occurred and contains both the line
number that generated the interrupt and the corresponding direction of flow (transmitter or receiver). With
both MCIEs set and receiver interrupt enabled, the interrupt summary register will respond to changes
in DSR or DCD. The data-set-change summary register monitors changes in DSR or DCD on a line-by-line
basis and indicates whether a modem status change has occurred on each data line subsequent to the
last time the corresponding bit was cleared.
The TCM78808 is characterized for operation from O°C to 70°C.

SIGNAL
AO THRU A5
ClK

DESCRIPTION
Address bits 0 through 5 select the internal registers in the TCM78808.
Clock input for timing

CS
i5a5O THRU JJa>'i

Data·Set Carrier Detect inputs monitor data-set carrier detect signals from modems.

Chip Select. When low, activates the TCM78808 to receive and transmit data over data line. DlO through Dl7.

DlO THRU Dl7

Data lines 0 through 7 receive and transmit the paralle.1 data.

l5ST, lm'

Data Strobes 1 and 2 receive timing information for data transfers. The liST and ~ inputs must be connected
together.

~THRU DSR7

Data Set Ready inputs monitor data-set-ready signals from modems.

iRQ

Interrupt Request output requests a processor interrupt.

IROLNO THRU IROlN2

Interrupt Request Line number outputs indicate the line number of the originating interrupt request.

IROTXRX

Interrupt Request Transmit/Receive output indicates vvhether an interrupt request is for transmitting or receiving
data.

MRESET

Manufacturing Reset. For manufacturing use

imV

Ready output indicates when the TCM78808 is ready to participate in data-transfer cycles.

~
RXOO THRU RXD7

Reset input initializes the internal logic.

TXOO THRU TXD7

Transmit Oats output 'provides asynchronous bit-serial data output streams.

VOOO THRU VOD2
VSSO THRU VSS2

Ground reference

WR

Write input specifies direction of data transfer· on the OlO through Dl7 lines.

Receive Data inputs accept asynchronous bit-serial data input streams.

5-V nominal power supply

TEXAS . "
INSTRUMENTS
2-848

POST OFFICE BOX 665303 • DALLAS. TEXAS 75266

TCM78808
OCTAL ASYNCHRONOUS RECEIVER/TRANSMITTER
functional block diagram

lilW---+-lr--,

TXOO

DS1-_--i

RXDO

Wii--+--I

INTERRUPT
SUMMARY
REGISTER

L7c....>...-r-l
OLO•.;:O.;:
CS-~_-I

DSiW

DCOO
TXOI
RXOI

RESET--~~-L________~~~l

OSRI
DCDI

nm--+--r--.,

TXD2
RXD2
DSR2

-.J

DATA SET
CHANGE
SUMMARY

IRQTXRX----

4

;

3
2.5

;

"ii
>

2

~

1.5

.!l

:z:
I
:z:

..

r--- .........

3.5

o

DRIVER LOW-LEVEL OUTPUT VOLTAGE
vs
DRIVER LOW-LEVEL OUTPUT CURRENT
5
VCC=5V
> 4.5 r- TA = 25°C
I
4


2.5

>
;
Q.
;

r-........,

3

..

2

~

1.5

-'

I

I

I

I

-

,..--

0

-'

....

I
-'
0 0.5
>

~ 0.5

o

o

-20

-40

-SO

-60

o

-100 -120

o

20

40

~

60

SO

100

120

10L -Low·Level Output Current-rnA

10H-High-Level Output Current-mA

FIGURE 10

FIGURE 9

DRIVER DIFFERENTIAL OUTPUT VOLTAGE
vs
DRIVER OUTPUT CURRENT
4

l'

t
o

..e.

>

L

VCC = 5 V
TA = 25°C

..........

3

-

,
...........

2.5

~ .......

::I

o
~

2

c
f

1.S

~
i5

I

,

3.5

~
1\

I

1\

8 0.5

\

>

o

o

10 20 30 40 SO 60 70 .SO 90 100
10 - Output Current-mA

FIGURE 11

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-875

TL3695
DIFFERENTIAL BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
RECEIVER HIGH-LEVEL OUTPUT
vs
FREE-AIR TEMPERATURE

RECEIVER HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5

..
I

~

5
Vcc - 5 V
VIO - 200 mV
IOH - -440,.A

VID =0.2 V
TA =25°C

>

4

~

t--.....

-

~

:;

~

3

]

2

"""" "\ ~

=5.25 V
1,,\~ /,VCC
~"'-V~C='5V'-

J:.

~

VCC

~

=4.75 V

I

:r
o
>

o

o

~

~~
~~
~~

-10
-20
-30
-40
-50
IOH-High-Level Output Current-mA

o

-40 -20 0
20 40 60 80 100 120
TA-Free-Air Temperature- °c
FIGURE 13

FIGURE 12
RECEIVER LOW-LEVEL OUTPUT VOLTAGE
vs
RECEIVER LOW-LEVEL OUTPUT CURRENT
0.6
VCC = 5 V
>I
TA = 25°e
!i. 0.5
~
..."0
> 0.4

V

./

.

/

...,.

//

S,.

0
"ii

.

0.3

>

..J

i

0.2

0
..J

I

..J

0

/

RECEIVER LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
0.6
Vce - 5 V
VIO - -200 mV
>
I 0.5 IOL - 8 mA

"'"

:l

~ 0.4
:;Q.

~

,/

0.3

]

/

~

-

0.2

.9

0.1

I

>

60.1

o

>

o

5
10
15
20
25
30
IOL -Low Level Output Current-mA

o

-40 -20

o 20 40 60 80 100 120
TA-Free-Air Temperature- °c

FIGURE 14

FIGURE 15

TEXAS . "
INSTRUMENTS
2-876

POST OFFICE BOX 66&303 • DALLAS. TEXAS 75265

TL3695
DIFFERENTIAL BUS TRANSCEIVER
TYPICAL CHARACTERISTICS
RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE

RECEIVER OUTPUT VOLTAGE
vs
ENABLE VOLTAGE
6

5

>

.,I
l!!'"
"0

VIO = 0.2 V
Load = 8 k!! to ground
TA = 25°e
4 ~Vee = 5.25V

5

VID = -0.2 V
Load = 1 k{! to Vee

TA

=

I

25°e

vee

>

l=

Vee

5.2J V

=

4.75 V

I

~

~

l!!

3 ---,-Vee - 4.75 V
"-Vee

>
Sc.'
S 2
0

4

=

Vee

"0

5 V

>

S

c.

=

5V/

3

S

o
I
o

I

0

2

>

>

o

o

o
0.5

2.5

2

1.5

3

o

1.5

0.5

2

2.5

3

VI-Enable Voltage-V

VI-Enable Voltage-V

FIGURE 17

FIGURE 16

APPLICATION INFORMATION
TL3695

TL3695

UP TO 32
TRANSCEIVERS

•••
NOTE: The line should be terminated at both ends in its characteristic impedance. Stub lengths off the main line should be kept as short as
possible.

FIGURE 18. TYPICAL APPLICATION CIRCUIT

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALlAS, TEXAS 76265

2-877

2-878

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
03096, MARCH 19S5-REVISED APRIL 1989

N DUAL·IN·LlNE PACKAGE

• Programmable Baud Rate Generator Allows
Division of Any Input Reference Clock by 1
to (2 16 -1) and Generates an Internal 16 X
Clock

(TOP VIEW)

DO
D1
D2
D3
D4
D5
D6
D7
RCLK
SIN
SOUT
CSO
CS1
CS2
BAUDOUT
XTAL1
XTAL2
DOSTR
DOSTR

• Full Double Buffering Eliminates the Need
for Precise Synchronization
• Adds or Deletes Standard Asynchronous
Communication Bits (Start, Stop, and
Parity) to or from the Serial Data Stream
• Independent Receiver Clock Input
• Independently Controlled Transmit,
Receive, Line Status, and Data Set
Interrupts
• Fully Programmable Serial Interface
Characteristics:
5-, 6-, 7-, or 8-Bit Characters
Even-, Odd-, or No-Parity Bit
Generation and Detection
1-, 1 1/2-, or 2-Stop Bit Generation
Baud Generation (DC to 256 Klloblts
per Second)

VCC

Ai
DCD
DSR
CTS
MR
OUT 1
DTR
RTS
OUT2
INTRPT
NC
AO
A1

A2
ADS
CSOUT
DDIS
DISTR
DISTR

VSS

• False Start Bit Detection

FN PACKAGE
(TOP VIEW)

• Complete Status Reporting Capabilities

-18/ffi

a:cco

• Three-State TTL Drive Capabilities for
Bidirectional Data Bus and Control Bus

1

6 5 4 3 2 1 44 43 42 4 140

• Line Break Generation and Detection
• Internal Diagnostic Capabilities:
Loopback Controls for
Communications Link Fault Isolation
Break, Parity, Overrun, Framing Error
Simulation
• Full Prioritized Interrupt System Controls
• Modem Control Functions (CTS, RTS, DSR,
DTR, RI, and DCD)
• Easily Interfaces to Most Popular
Microprocessors

D5
D6
D7
RCLK
SIN
NC
SOUT
CSO
CS1
CS2
BAUDOUT

7
8
9
10
11
12
13
14
15
16
17

39
38
37
36
35
34
33
32
31
30
29

NC
INTRPT

1819202122232425262728

:;
~ Ia: a: (l)zl-l-i5:::lC
(I) 0 Ia: a: (I) 1-/(1)
..;..;1-1I-I-~~>
~~cg..;
xXcc
cc 0

• Faster Plug-In Replacement for National
Semiconductor NS16C450

NC - No internal connection

description

The TL16C450 is a CMOS version of an Asynchronous Communications Element (ACE), It typically functions
in a microcomputer system as a serial input/output interface,
The TL16C450 performs serial-to-parallel conversion on data received from a peripheral device or modem
and parallel-to-serial conversion on data received from its CPU, The CPU can read and report on the status of

PRODUCTION DATA d......nts cont.in i.formatio.
c.rra.t I. of p.blicatio. data, Prod.cts conform to
,plOi6..tio•• p. tha IIr... of T.... I.stru ...nts

=~~:~~i~ai:I~1~ =~::i:;

:'i::::A::.." not

Copyright@ 1988, Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-879

TL16C450

ASYNCHRONOUS COMMUNICATIONS ELEMENT
the ACE at any pOint in the ACE's operation. Reported status information includes: the type of transfer
operation in progress, the status of the operation, and any error conditions encountered.
The TL16C450 ACE includes a programmable, on-board, baud rate generator. This generator is capable of
dividing a reference clock input by divisors from 1 to (2 16 -1) and producing a 16 X clock for driving the
internal transmitter logic. Provisions are also included to use this 16 X clock to drive the receiver logic. Also
included in the ACE is a complete modem control capability and a processor interrupt system that may be
software tailored to the user's requirements to minimize the computing required to handle the
communications link.

block diagram
INTERNAl
DATA BUS

DIVISOR
LATCH (LS)

r-r-____~--~(1_5~).BAUDOUT

DIVISOR
LATCH (MS)

AO
Al
A2

'-------------11+1

CSO
CSI

TRANSMITTER
TIMING &
CONTROL

CS2
ADS

SELECT
&
CONTROL
LOGIC

MR
DISTR
DISTR
DOSTR
DOSTR

RTS

rn

DDIS
CSOUT

XTAL2

D'fii

MODEM
CONTROL
LOGIC

XTALI
(17)

D5R

(34)
(31)
(40)
}
Vcc - - - V55 -(20)
---

POWER
SUPPLY

(30)

Pin numbers shown are for the N package.

TEXAS .."

INSTRUMENTS
2-880

POST OFFICE BOX 655012 • DALLAS, TEXAS 75265

DCD
iii
OUT 1
OUT2

INTRPT

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PIN
NAME

NO.t

I/O

DESCRIPTION

Register Select. Three inputs used during read and write operations to select the ACE register to read
from or write to. Refer to Table 1 for register addresses, also refer to the Address StroQe (ADS) signal
description.

AO
AI
A2

28 (31)
27 (30)
26 [29J

I

ADS

25 [28J

I

Address Strobe. When ADS is active (low), the Register Select signals (AO, AI, and A2) and Chip Select
signals (CSO, CS1, CS2) drive the internal select logic directly; when high, the Register Select and Chip
Select signals are held in the state they were in when the low-to-high transition of ADS occurred.

BAUDOUT

15 [17J

0

Baud Out. 16 X clock signal for the transmitter section of the ACE. The clock rate is established by the
reference oscillator frequency divided by a divisor specified by the Baud Generator Divisor Latches.
BAUDOUT may also be used for the receiver section by tying this output to the RCLK input.

CSO
CSI
CS2

12 [14J
13 [15)
14 [16J

I

Chip Select. When active (high and low, respectively), these three inputs select the ACE. Refer to the
ADS (Address Strobe) signal description.

CSOUT

24 [27J

0

Chip Select Out. When CSOUT is high, it indicates that the ACE has been selected by the Chip Select
inputs (CSO, CS1, and CS2). CSOUT is low when the chip is deselected.

CTS

36 [40J

I

Clear To Send. CTS is a modem status signal whose condition can be checked by reading bit 4 (CTS)
of the Modem Status Register. Bit 0 (DCTS), of the Modem Status Register indicates that this signal has
changed state since the last read from the Modem Status Register. If the Modem Status Interrupt is
enabled when CTS changes state, an interrupt is generated.

1 [2J
2 [3J
3 [4J
4 [5J
5 [6J
6 [7J
7 [8J
8 [9J

I/O

DCD

38 [42J

I

Data Carrier Detect. DCD is a modem status signal whose condition can be checked by reading bit 7
(DCD) of the Modem Status Register. Bit 3 (DDCD) of the Modem Status Register indicates that this
Signal has changed stete since the last read from the Modem Status Register. If the Modem Status
Interrupt is enabled when the DCiJ changes state, an interrupt is generated.

DDIS

23 [26J

0

Driver Disable. This output is active (high) when the CPU is not reading data. When active, this output
can be used to disable an external transceiver.

DISTR
DISTR

22 [25J
21 [24J

I

Data Input Strobes. When either input is active (high or low, respectively) while the ACE is selected, the
CPU is allowed to read stetus information or data from a selected ACE register. Only one of these inputs
is required for the transfer of data during a read operation; the other input should be tied in its inactive
state (i.e., DISTR tied low or DISTR tied high).

DOSTR
DOSTR

19 [21J
18 [20J

I

Data Output Strobes. When either input is active (high or low, respectively), while the ACE is selected,
the CPU is allowed to write control words or data Into a selected ACE register. Only one of these inputs is
required to transfer data during a write operation; the other inPut should be tied in its inactive state (i.e.,
DOSTR tied low or DOSTR tied high).

DSR

37 [41J

I

Data Set Ready. DSR is a modem status signal whose condition can be checked by reading bit 5 (DSR)
of the Modem Status Register. Bit 1 (DDSR) of the Modem Status Register indicates that this signal has
changed state since the last read from the Modem Status Register. If the modem status interrupt is
enabled when the DSR changes state, an interrupt is generated.

DTR

33 [37J

0

Data Terminal Ready. When active (low), i5'fR informs a modem or data set that the ACE is ready to
establish communication. DTR is placed in the active state by setting the DTR bit of the Modem Control
Register to a high level. DTR is placed in the inactive state either as a result of a Master Reset or during
loop mode operation or resetting bit 0 (DTR) of the Modem Control Register.

INTRPT

30 [33J

0

Interrupt. When active (high), INTRPT informs the CPU that the ACE has an interrupt to be serviced.
Four conditions that cause an interrupt to be issued are; a receiver error, received data is available, the
transmitter holding register is empty, and an enabled modem status interrupt. The INTRPT output is
reset (inactivated) either when the interrupt is serviced or as a resutt of a Master Reset.

DO
01
02
03
04
05
06
07

Data Bus. Eight 3-state data lines provide a bidirectional path for data, control, and status information
between the ACE and the CPU.

t Pin numbers shown In brackets are for the FN package.

TEXAS " ,
INSTRUMENTS
POST OFFICE BOX 655303 • DALlAS. TEXAS 75265

2-881

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT

PIN
NO.t

NAME

I/O

DESCRIPTION

MR

35 [39J

I

Master Reset. When active (high), MR clears most ACE registers and sets the state of various output
signals. Refer to Table 2, ACE Reset Functions.

OUT 1
OUT 2

34 [38J
31 [35J

0

Outputs 1 and 2. User-designated output pins that are set to their active states by setting their
respective Modem Control Register bits (OUT 1 and OUT 2) high. OUT 1 and OUT 2 are set to their
inactive (high) states as a result of Master Reset or during loop mode operations or by resetting bit 2
(OUT 1) or bit 3 (OUT 2) of the MCR.

RCLK

9 [10J

I

Receiver Clock. The 16 X baud rate clock for the receiver section of the ACE.

RI

39 [43J

I

Ring Indicator. RI is a modem status signal whose condition can be checked by reading bit 6 (RI) of the
Modem Status Register. Bit 2 (TERI) of the Modem Status Register indicates that the Rf input has
transitioned from a low to a high state since the last read from the Modem Status Register. If the Modem
Status Interrupt is enabled when this transition occurs, an interrupt is generated.

RTS

32 [36J

0

Request to Send. When active, informs the modem or data set that the ACE is ready to transmit data.
RTS is set to its active state by setting the RTS Modem Control Register bit and is set to its inactive (high)
state either as a result of a Master Reset or during loop mode operations or by resetting bit 1 (RTS) of the
MCR.

SIN

10 [11J

I

Serial Input. Serial data input from a connected communications device.

SOUT

11 [13J

0

Serial Output. Composite serial data output to a connected communication device. SOUT is set to the
Marking (logic 1) state as a result of Master Reset.

f=--

VCC

40 [44J

VSS

20 [22J

XTAL1
XTAL2

16 [18J
17 [19J

5-V Supply Voltage
Supply Common
I/O

External Clock. Connects the ACE to the main timing reference (clock or crystal).

t Pin numbers shown in brackets are for the FN package.

absolute maximum ratings over free-air temperature range (unless otherwise noted)
-0.5 V to 7 V
Supply voltage, VCC (see Note 1)
-0.5 Vto 7 V
Input voltage range at any input, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
-0.5 V to 7 V
Output voltage range, Vo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation at (or below) 70°C free-air temperature:
FN package. . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1100 mW
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 800 mW
O°C to 70°C
Operating free-air temperature range .......... .
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C
260°C
Case temperature for 10 seconds: FN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package ........ .
NOTE 1: All voltage values are with respect to VSS.

recommended operating conditions
Supply voltage, VCC

NOM

MAX

UNIT

4.75

5

5.25

V
V

-0.5

VCC
0.8

0

70

2

High-level input voltage, VIH
Low-level input Voltage. VIL
Operating free-air temperature. TA

TEXAS . "

INSTRUMENTS
2-882

MIN

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

V
·C

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER

TEST CONDITIONS

VOH:!:

High-level output voltage

IOH = -1 rnA

VOL:!:

Low-level output voltage

IOL= 1.6mA

Ilkg

Input leakage current

VCC - 5.25 V,
VI = 0 to 5.25 V,

MIN

TYpt

MAX

2.4

UNIT
V

0.4

V

:tl0

j.LA

:t20

j.LA

10

rnA

VSS - 0,

All other pins floating

IOZ

High-impedance output current

VCC = 5.25 V,
Vo = 0 V to 5.25 V,

VSS = 0,

chip selected, write mode
or, chip deselected
VCC - 5.25 V,
SIN, DSR, DCD,

ICC

TA - 25'C,

CfS, and Ai at 2 V,

All other inputs at o.a V,

Supply current

XTALI at 4 MHz,
No load on outputs.
Baud rate = 50 kilobits per second

CXTALI

Clock input capacitance

CXTAL2
Ci

Clock output capacitance

Co

Output capacitance

Input capacitance

VCC = 0,
f= 1 MHz,
All other pins grounded

VSS = 0,
TA = 25'C,

15

20

pF

20

30

pF

S

10

pF

10

20

pF

t All typical values are at VCC =

5 V, TA = 25'C.
:!: These parameters apply for all outputs except XTAL2.

system timing requirements over recommended ranges of supply voltage and operating free-air
temperature
PARAMETER

FIGURE

MIN

MAX

UNIT

tcR

Cycle time, read (tw7 + tda + td9)

175

tcw

Cycle time, write (twa + id5 + ids)

175

ns

tW5
twa

Pulse duration, address strobe low
Pulse duration, write strobe

2,3

15

ns

2

80

ns

tw7

Pulse duration, read strobe

3

ao

ns

twMR

Pulse duration, master reset

1000

ns

ns

tsul

Setup time, address

2,3

15

ns

tsu2

Setup time, chip select

2,3

15

ns

tsu3
thl

Setup time, data

2

15

ns

Hold lime, address

2,3

0

ns

2,3

th2

Hold time, chip select

0

ns

th3

Hold time, write to chip select

2

20

ns

th4

Hold time, write to address

2

20

ns

th5

Hold time, data

2

15

ns

thS

Hold time, read to chip select
Hold time, read to address

3

20

ns

th7

3

20

ns

td4§

Delay time, select to write

2

15

ns
ns

id5§

Delay time, address to write

2

15

tdS

Delay time, write cycle

2

ao

ns

id7§

Delay time, chip select to read

3
3

15

ns

15

ns

3

ao

ns

Delay time, address to read
ida§
Delay time, read cycle
id9
§ Only applies when ADS is low.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TEXAS 75266

2-883

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
system switching characteristics over recommended ranges of supply voltage and operating freeair temperature
PARAMETER

FIGURE

TEST CONDITIONS

MIN

twl

Pulse duration, clock high

1

f = 9 MHz maximum

50

tw2

Pulse duration, clock low

1

f = 9 MHz maximum

50

td3

Delay time, select to CS output

tdl0

MAX

UNIT
ns
ns

2,3

CL= 100pF

70

ns

Delay time, read to data

3

60.

ns

tdll

Delay time, read to floating data

60

ns

tdis(R)

Read to driver disable

3
3

CL=100pF
CL-l00pF

60

ns

0

CL = 100 pF

baud generator switching requirements over recommended ranges of supply voltage and
operating free-air temperature
PARAMETER

FIGURE

TEST CONDITIONS

f = 6.25 MHz, CLK + 1,

MIN

MAX

UNIT

tw3

Pulse duration, BAUDOUT low

1

tw4

Pulse duration, BAUbOUT high

1

tdl

Delay time, BAUDOUT low to high

1

CL = loopF

125

ns

1d2

Delay time, BAUbOUT high to low

1

CL = 100 pF

125

ns

CL=100pF

f = 6.25 MHz,
CL= 100pF

CLK+ 1,

80

ns

80

ns

receiver switching characteristics over recommended ranges of supply voltage and operating
free-air temperature
PARAMETER

FIGURE

1d12

Delay time, RCLK to sample

4

1d13

Delay time, stop to set interrupt

4

td14

Delay time, read RBR/LSR to reset Interrupt

4

TEST CONDITIONS

MIN

MAX
100

1

1
140

CL= 100pF

UNIT
ns
RCLK
cycles
ns

transmitter switching characteristics over recommended ranges of supply voltage and operating
free-air temperature
MIN

MAX

td15

Delay time, initial write THR to transmit start

PARAMETER

5

8

24

baudout
cycles

1d16

Delay time, stop to interrupt

5

8

8

baudout
cycles

1d17

Delay time, write THR to reset interrupt

5

FIGURE

1d18

Delay time, initial write to interrupt (THRE)

5

1d19

Delay time, read IIR to reset interrupt (THRE)

5

TEST CONDITIONS

CL=100pF
16
CL=100pF

UNIT

140

ns

32

baudout
cycles

140

ns

modem control switching characteristics over recommended ranges of supply voltage and
operating free-air temperature
PARAMETER

TEST CONDITIONS

Delay time, write MCR to output

6

CL= 100pF

100

ns

1d21
td22

Delay time, modem input to set interrupt

6

CL= 100pF

170

ns

Delay time, read MSR to reset interrupt

6

CL = 100 pF

140

ns

TEXAS

.Jf

INSTRUMENTS
2-884

POST OFFICE BOX 656303 • DALLAS, TeXAS 75265

MIN

MAX

FIGURE

1d20

UNIT

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PARAMETER MEASUREMENT INFORMATION
~tWl
XTALI

I

r-

I

~2V

OR

'---.:I
0.8 V
I
I

RCLK..J
(9 MHz MAX)

~tw2

:~~------------- N ------------~~

SlllSLfL ___ JLS
I

XTALI

I

,

,
tdl--r
I

,

~

"
: -.: :+-td2
I
I

BAUDOUT

(III)

BAUDOUT
(1/2)

BAUDOUT
(1/3)

BAUDOUT
(liN)
(N > 3)

~---~
I

I

: . - 2XTALI ~
I
CYCLES
I

I
I

(N-2) XTALI

: - - - - CYCLES

:

~

FIGURE 1. BAUD GENERATOR TIMING

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-885

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PARAMETER MEASUREMENT INFORMATION

I+-tws-+
I

I

14-- tSU1---:,
Ao-A2

-+

=>¢

I

VALID
i

: :'-tsu2--':
::

CSO,CS1,CS2

=j¢

*
I

)4-th1

·x

-.!
VALID

I

+th2

I

VALlOt

X":---

th3 .........

!.......J

I

~td3

:/'

CSOUT

x=

VAllOt

I

I
I

I

~td3

~,--':

I

I

I

I

,+-tw 6-to!
I
~td4t --:
l+-th4t ~

- -......-",
I
I

I

I

X

ACTIVE

---------~

X
,

~--------

,

,

... tsu3¥-thS ....

-«

00-07 - - - -_ _ _

VALID

DATA } - -

t Applicable only when ADS is tied low.

FIGURE 2. WRITE CYCLE TIMING

TEXAS .".
INSTRUMENTS
2-886

I

,:'--td6~

i4- tdst ---:,
OOSTR,
OOSTR

I

I

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PARAMETER MEASUREMENT INFORMATION
..... lws-tM

,,

l4--tSU1~ ,
AO·A2

-+,

~

VALID

><

VALlOt

~------,J,

: j.- tsu2---":

I

::

+-lh2

~

==I¢
,

CSO, CS1, CS2

i+- I h1

VALID

,
X

~ld3t

-,-IW7-+!: :
'

:

j4- l h7 t

:

:'-ld7t "":

,&4-- IdSt _____,
'
,

X

~II~~~'

:

~ld3t

:

' : , - - :'
:

CSO
UT:
_ _ _ _oJ

,

VALlOt

Ih6~

,

:/'

,:.'--X\:-__
_

,.---,"\

'

~

'
,
~ld9~

ACTIVE

-------'

X

I "------

IdIS(A)"":"";

~ldiS(A)

[, \\,,_-;.:+-_Jl

ODiS

Id11----+'
+ld10" ,
:
~~'_ _ _ _~'

I

00·07

----------<\

VALID

DATA

r-

t Applicable only when ADS is tied low.

FIGURE 3. READ CYCLE TIMING

TEXAS

"'I

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2·887

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PARAMETER MEASUREMENT INFORMATION

RCLK

-.Il___---'n'--____ ~
,
,,

!41'1------8 CLKS-----~~

;+-tdl2

,
SAMPLE
CLOCK

--------------~
ro:r~~:S~
7 '--J

SIN \ . START

PARITY

STOP

SAMPLE
CLOCK

,

,
I

I
,

~tdl3
INTRPT
IRDRllSI}

lrL
.

------------------------~------~I
,

.'

tdl4~

DISTR, DISTR
(RD RBR/LSR)

.

---------------------------------~
FIGURE 4. RECEIVER TIMING

\

SOUT

START

r-:----::::--v

~A~~~I~ PARITY

)

/

\..,~

S
STTAARRTT /

STOP

,:."'-~":L...ldI6

~~~~~

"'\I:. .--+---'1
1-

Id17 -I>i--i*I J

DOSTR (WR THR)

I

~.td18

I

\ . .-------------------------~
I-

-.:

I

:+- Id17
I

f \ ______--'/\"'_________________________-;.,-__
, I+-

Id19 -..:
DISTR (RD IIR)

-

r-'\

_ _ _ _ _----<1
FIGURE 5. TRANSMITTER TIMING

TEXAS . "
INSTRUMENTS
2-888

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

'---

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PARAMETER MEASUREMENT INFORMATION

DOSTR (WR MCR)

CTS, DSR,

DCD _ _ _ _ _--JX~

,

_____________

I

,

td21~

--J

INTRPT
(MODEM) _ _ _ _ _ _

DISTR (RD MSR)

/'

/

-------I

\'-----'-,- I

~td21

\'--_---1
FIGURE 6. MODEM CONTROL TIMING

TEXAS

4f

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS; TEXAS 75265

2-889

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
TYPICAL APPLICATION DATA

~
07-00
SOUT

07-00
MEMROR I/OR
MEMWORI/ON

RESET
AO
A1

B
U
S

INTRPT

DSR
DCD

AO

qrs

A2

EIA
232-0
DRIVERS
AND
RECEIVERS

DTR

MR

A1

A2

;

RTS

DOSTR

INTR

C
P
U

SIN

OISTR

Rf
Tl16C450
(ACE)

; - - ADS

XTAL1

r
Lon

~ DOSTR

L ...... ~ DlSTR
CS

HL

MHz

CS2

XTAL2

CS1

BAUDOUT

CSO

RCLK

FIGURE 7_ BASIC TL16C450 CONFIGURATION
RECEIVER
~W~R______. -__-.~D_IS_AB_L_E______~DOSTR

TL16C450
(ACE)
DATA BUS

DATA BUS
MICROCOMPUTER ~===h>l
SYSTEM I'

1<=:t===~D7-DO

8-BIT
BUS TRANSCEIVER

L----.--------J DDIS
DRIVER
DISABLE

FIGURE 8_ TYPICAL INTERFACE FOR A HIGH-CAPACITY DATA BUS

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TeXAS 76265

t

± ~

tJ

l.c

2-890

f::::::>

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
TYPICAL APPLICATION DATA
TL16C450
XTALl
A16·A23

t=======::::;--;::::::::::>

ALTERNATE
XTAL CONTROL

(16)

A16·A23
XTAL2
(12)
(13)

ADDRESS
DECODER

(14)

CPU

CSO

BAUDOUT

CSl

RCLK

(17)
(15)
(9)

CS2
DTR

(25)

RTS

ADS~-'--------------------~~ ADS

OUT 1
(35)
MR

OUT2

Rf

ADO·AD15 K::::::=~::::>I BUFFER

DCD
PHil

PHI2

DSR
CTS

PHil

PHI2

ADS RSTO
RO 1-----------1
TCU

(21)

DISTR

SOUT

(18)

WR 1-----------1

DOSTR
SIN

ADO·AD15

INTRPT
(22)

CSOUT
DISTR
0015

DOSTR

NC

-::-

GND
(VSS)

(40)

"::'

EIA·232·D
CONNECTOR

5V
(VCC)

FIGURE 9. TYPICAL TL16C450 CONNECTION TO A CPU

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2-891

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION
TABLE 1. REGISTER SELECTION
DLABt

A2

A1

AO

0
0
X
X
X
X
X
X
1
1

L
L
L
L
H
H
H
H
L
L

L
L
H
H
L
L
H
H
L
L

L
H
L
H
L
H
L
H
L
H

REGISTER

Receiver buffer (read), transmitter holding register (write)
Interrupt enable
Interrupt identification (read only)
Line control
Modem control
Line status
Modem status
Scratch
Divisor latch (LSB)
Divisor Latch (MSB)

t The Divisor Latch Access Bit (DLAB) is the most significant bit of the Line Control Register. The DLAB
signal is controiled by writing to this bit location (see Table 3).

TABLE 2. ACE RESET FUNCTIONS
REGISTERISIGNAL

RESET
CONTROL

RESET STATE

Interrupt Enable Register

Master Reset

Interrupt Identification Register

Master Reset

Line Control Register
Modem Control Register
Line Status Register
Modem Status Register
SOUT
INTRPT (Receiver Error Flag)
INTRPT (Received Data Available)

Master Reset
Master Reset
Master Reset
Master Reset
Master Reset
Read LSR/MR
Read RBR/MR

INTRPT (Transmitter Holding Register Empty)

Read IIR/Write
THR/MR
Read MSR/MR

Low

OUT 2

Master Reset

High

RTS
DTR

Master Reset
Master Reset

High
High

OUT 1
Scratch Register
Divisor Latch (LSB and MSB) Registers
Receiver Buffer Register
Transmitter Holding Register

Master Reset
Master Reset
Master Reset
Master Reset
Master Reset

High
No effect
No effect
No effect
No effect

INTRPT (Modem Status Changes)

2-892

All bits low (0-3 forced and 4-7 permanent)
B~ a is high, bits 1 and 2 are low, and bits 3-7 are
permanently low
All bits low
All bits low
Bits 5 and 6 are high, all other bits are low
Bits 0-3 are low, bits 4-7 are input signals
High
Low
Low

Low

TEXAS . "
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TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION

accessible registers
The system programmer, via the CPU, has access to and control over any of the ACE registers that are
summarized in Table 3. These registers are used to control ACE operations, receive data, and transmit data.
Descriptions of these registers follow Table 3.

TABLE 3. SUMMARY OF ACCESSIBLE REGISTERS
REGISTER ADDRESS

Bft
No.

ODLAB=O

ODLAB=O

Receiver
Buffer

Transmitter
Holding

R;w!:r
Only)
RBR

0

Data Sit 0*

R~:~:r

lDLAB=O
Interrupt
Enable
Reglater

Only)

2
Interrupt
Ident.

R~!:~r

3

4

5

6

Line
Control
Register

MODEM
Control
Register

Line
Stetus
Register

MODEM
Stetus
Register

Scratch
Reglater

LCR

MCR

LSR

MSR

Word
Length
Select
Bit 0
'(WLSO)

Oala

Date
Ready
(OR)

Della

7

o DLAB=1

Divisor

lDLAB=1

Latch
(LSB)

Lalch
(MSB)

SCR

DLL

DLM

BilO

Bit 0

BI18

Bit1

Bit1

Bit 9

Bit 2

Bit 2

Bit 10

Bit 3

Bit 3

Bit11

Bit 4

81t12

Bit 5

Bit 5

Bit 13

Bit 6

Bit 6

Bit 14

Bit 7

Bit 7

Bit 15

nly)

THR

IER

Date BII 0

Enable
Received
Data
Available
interrupt
(ERBFI)

IIR
"0" If

Interrupt
Pending

Terminal

~6~~r

Clear
to Send
(OCTS)

Enable

Transmitter
Interrupt
iO
Bit (0)

Word
Length
Select
Bit 1
(WLS1)

ro,~~~

Overrun
Error

(RTS)

(OE)

Interrupt
10

Number of
Stop Bits
(STB)

Out 1

Bit (1)

Enable
MODEM
Status
Interrupt
(EOSSI)

0

:n~gre

0

Parity
Select
(EPS)

Loop

0

Stick
Parity

Holding
1

Data Bit 1

Data Bit 1

Register
Empty
Interrupt
(ETBEI)
Enable

Receiver
2

3

Data Bit 2

Date Bit 3

Data Bit 2

~ata

Bit 3

Une Stetus

'nterruf
(ELSI

Data Bit 4

5

Data Bit 5

0

Error
(PE)

Out 2

(PEN)

Even
Data
Bit 4

Parity

Framing
Error
(FE)

Break
Interrupt
(BI)

Clear
to
Send
(CTS)

Transmitter
Data Bit 5

0

0

Holding

Register
(THRE)

6

Data Bit 6

Data Bit 6

0

0

Set

Break
Divisor
latch

7

Data Bit 7

Data Bit 7

0

0

Access
Bit
(OLAB)

0

Della
Data
Set
Rea%
(ODS

Trailing
Edge Ring
Indicator
(TERI)
Delta
Data

Carrier
Detect
(OOCO)
Bit 4
Cata
Set

~8~~r

Transmitter

Ring

Em~

Indicator

(TEM

(RI)
Data

a

0

Carrier
Detect
(OCO)

• Bit 0 i. the least significant bit. It Is the first bit serially transmitted or received,

TEXAS •
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2-893

TL16C450

ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION
receiver buffer register (RBR)
The ACE's receiver section consists of a Receiver Shift Register and a Receiver Buffer Register. Timing is
supplied by the 16 X Receiver Clock (RCLK). Receiver section control is a function of the ACE's Line Control
Register.
The ACE's Receiver Shift Register receives serial data from the Serial Input (SIN) pin. The Receiver Shift
Register then converts the data to a parallel form and loads it into the Receiver Buffer Register. When a
character is placed in the Receiver Buffer Register and the Received Data Available interrupt is enabled, an
interrupt is generated. This interrupt is cleared when the data is read out of the Receiver Buffer Register.

transmitter holding register (THR)
The ACE's transmitter section consists of a Transmitter Holding Register and a Transmitter Shift Register.
Timing is supplied by the Baud Out (BAUDOUT) clock signal. Transmitter section control is a function of the
ACE's Line Control Register.
The ACE Transmitter Holding Register receives data off the Internal Data Bus and, when the shift register is
idle, moves it into the Transmitter Shift Register. The Transmitter Shift Register serializes the data and outputs
it at the Serial Output (SOUT). If the Transmitter Holding Register Is empty and the Transmitter Holding
Register Empty (THRE) interrupt is enabled, an interrupt is generated. This interrupt Is cleared when a
character is loaded into the register.

Interrupt enable register (IER)
The Interrupt Enable Register enables each of the four types of interrupts (refer to Table 4) and the INTRPT
output signal in response to an interrupt generation. The Interrupt Enable Register can also be used to disable
the interrupt system by setting bits 0 through 3 to logic O. The contents of this register are summarized in
Table 3 and are described below.
Bit O. This bit, when set to logic 1, enables the Received Data Available interrupt.
Bit 1. This bit, when set to logic 1, enables the Transmitter Holding Register Empty interrupt.
Bit 2. This bit, when set to logic 1, enables the Receiver Line Status interrupt.
Bit 3. This bit, when set to logic 1, enables the Modem Status interrupt.
Bits 4 thru 7. Bits 4 through 7 in the Interrupt Enable Register are not used and are always set to logic O.

TEXAS •

INSTRUMENTS
2-894

POST OFFICE BOX 666303 • DAJ.LAS, TEXAS 75265

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION

Interrupt Identification register (IIR)
The ACE has an on-chip interrupt generation and prioritization capability that permits a flexible interface with
most microprocessors.
The ACE provides four prioritized levels of interrupts:
Priority 1
Priority 2
Priority 3
Priority 4

-

Receiver line status (highest priority)
Receiver data ready
Transmitter holding register empty
Modem status (lowest priority)

When an interrupt is generated, the Interrupt Identification Register indicates that an interrupt is pending and
the type of that interrupt in its three least significant bits (bits 0, 1, and 2). The contents of this register are
summarized in Table 3 and described in Table 4.
Bit O. This bit can be used either in a hardwire-prioritized, or polled interrupt system. If this bit is a logic 0, an
interrupt is pending. When bit 0 is a logic 1, no interrupt is pending.
Bits 1 and 2. These two bits are used to identify the highest priority interrupt pending, as indicated in Table 4.
Bits 3 thru 7. Bits 3 through 7 in the Interrupt Identification Register are not used and are always set at logic O.
TABLE 4. INTERRUPT CONTROL FUNCTIONS
INTERRUPT
IDENTIFICATION
REGISTER

PRIORITY

LEVEL

INTERRUPT TYPE

INTERRUPT SOURCE

INTERRUPT RESET
METHOD

BIT2

BIT 1

0

0

1

None

1

1

0

1

Receiver line status

Overrun error, parity error,
framing error or break
interrupt

Reading the Line Status
register

1

0

0

2

Received data available

Receiver data available

Reading the Receiver buffer
Buffer register

0

1

0

3

Transmitter Holding register
empty

Transmitter Holding register
empty

Reading the Interrupt
Identijication register (if
source of interrupt) or writing
into the
Transmitter Holding register

0

0

0

4

Modem status

Clear to Send, Data Set
Reading the Modem Status
Ready, Ring Indicator, or Data register
Carrier Detect

BIT 0
None

None

-

TEXAS •
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POST OFFICE BOX 665303 • DALLAS, TEl.C.AS 75265

2-895

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION
line control register (LCR)
The system programmer controls the format of the asynchronous data communication exchange through the
Line Control register. In addition, the programmer is able to retrieve, inspect, and modify the contents of the
Line Control register; this eliminates the need for separate storage of the line characteristics in system
memory. The contents of this register are summarized in Table 3 and are described below.
Bits 0 and 1. These two bits specify the number of bits in each transmitted or received serial character. These
bits are encoded as follows:
Bit 1

61tO

Word Length

0
0
1
1

0

5 Bits
6 B~s
7 Bits

1

0
1

8 Bits

Bit 2. This bit SPecifies either one, one and one-halt,' or two Stop bits in each transmitted character. If bit 2 is a
logic 0, one Stop bit is generated in the data. If bit 2 is a logic 1, the number of Stop bits generated is
dependent on the word length selected with bits 0 and 1. The Receiver checks the first Stop bit only,
regardless of the number of Stop bits selected. The number of Stop bits generated, in relation to word length
and bit 2, is shown in the following.
Bit 2

0
1
1
1
1

Word Length Selected

Number of Stop

by Bits 1 and 2

Bits Generated

Any word length

1
11/2
2
2
2

5 bits
6 bits

7Ms
8 bits

Bit 3. This bit is the Parity Enable bit. When bit 3 is a logic 1, a Parity bit Is generated in transmitted data
betweEln the last data word bit and the first stop bit. In received data, if bit 3 is a logic 1, parity is checked.
When bit 3 Is a logic 0, no parity is generated or checked.
Bit 4. Bit 4 is the Even Parity Select bit. When parity is enabled by bit 3: a logic 1 in bit 4 produces Even Parity
(an even number of logic is in the data and parity bits) and a logic 0 in bit 4 produces Odd Parity (an odd
number of logic1s).
Bit 5. This is the Stick parity bit. When bits 3, 4, and 5 are logic 1s, the Parity bit is transmitted and
checked as a logic O. When bits 3 and 5 are logic 1s and bit 4 is a logic 0, the Parity bit is transmitted and
checked as a logic 1.
Bit 6. This bit is the Break Control bit. Bit 6 is set to a logic 1 to force a break condition, i.e, a condition where
the Serial Output (SOUn pin is forced to the spacing (logic 0) state. When bit 6 is set to a logic 0, the break
condition is disabled. The break condition has no effect on the transmitter logic, It only effects the serial
output.
Bit 7. This bit is the Divisor Latch Access bit (DLAB). Bit 7 must be set to a logic 1 to access the Divisor
Latches of the Baud Generator during a read or write. Bit 7 must be set to a logic 0 during a read or write to
access the Receiver Buffer, the Transmitter Holding register, or the Interrupt Enable register.

TEXAS ."

INSTRUMENTS
2-896

POST OFFICE BOX 666303

e

DAI.LAS. TEXAS 75265

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
modem control register (MeR)
The Modem Control register is an 8-bit register that controls an interface with a modem, data set, or peripheral
device that is emulating a modem. The contents of this register are summarized in Table 3 and are described
below.
Bit O. Bit 0 (DTR) controls the Data Terminal Ready (DTR) output. Setting this bit to a logic 1 forces the DTR
output to its active state (low). When bit 0 is set to a logic 0, DTR goes high.
Bit 1. Bit 1 (RTS) controls the Request to Send (RTS) output in a manner identical to Bit O's control over the
DTR output.
Bit 2. Bit 2 (OUT 1) controls the Output 1 (OUT 1) signal, a user designated output signal, in a manner
identical to Bit O's control over the DTR output.
Bit 3. Bit 3 (OUT 2) controls the Output 2 (OUT 2) signal, a user designated output signal, in a manner
identical to Bit O's control over the DTR output.
Bit 4. Bit 4 provides a local loop back feature for diagnostic testing of the ACE. When this bit is set to a logic
high, the following occurs:
1.
2.
3.
. 4.
5.

The transmitter Serial Output (SOUT) is set high.
The receiver Serial Input (SIN) is disconnected.
The output of the Transmitter Shift register is looped back into the Receiver Shift register input.
The four modem control inputs (CTS, DSR, DCD, and Ai) are disconnected.
The four modem control outputs (DTR, RTS, OUT 1, and OUT 2) are internally connected to the four
modem control inputs.
6. The four modem control output pins are forced to their inactive states (high).

In the diagnostic mode, data that is transmitted is immediately received. This allows the processor to verify the
transmit- and receive-data paths to the ACE. The receiver and transmitter interrupts are fully operational. The
modem control interrupts are also operational but the modem control interrupt's sources are now the lower
four bits of the Modem Control register instead of the four modem control inputs. All interrupts are still
controlled by the Interrupt Enable register.
Bit 5 through 7. These bits are set to logic O.

line status register (LSR)t
The Line Status Register provides information to the CPU concerning the status of data transfers. The
contents of this register are summarized in Table 3 and are described below.
Bit O. Bit 0 is the Data Ready (DR) indicator for the receiver. This bit is set to a logic 1 condition whenever a
complete incoming character has been received and transferred into the Receiver Buffer register and is reset
to logic 0 by reading the Receiver Buffer Register.
Bit fl:. Bit 1 is the Overrun Error (OE) indicator. When this bit is set to logic 1, it indicates that before the
character in the Receiver Buffer register was read, it was overwritten by the next character transferred into the
register. The OE indicator is reset every time the CPU reads the contents of the Line Status register.
Bit 2:1:. Bit 2 is the Parity Error (PE) indicator. When this bit is set to logic 1, it indicates that the parity of the
received data character does not match the parity selected in the Line Control Register (bit 4). The PE bit is
reset every time the CPU reads the contents of the Line Status register.
Bit 3:1=. Bit 3 is the Framing Error (FE) indicator. When this bit is set to logic 1, it indicates that the received
character did not have a valid (logic 1) Stop bit. The FE bit is reset every time the CPU reads the contents of
the Line Status register.

t The

Line Status register is intended for read operations only; writing to this register is not recommended outside of a factory testing
environment.
Bits 1 through 4 are the error conditions that produce a Receiver Line Status interrupt.

*

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2-897

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
Bit 4:1:. Bit 4 is the Break Interrupt (BI) indicator. When this bit is set to logic 1 , it indicates that the received data
input was held in the logic 0 state for longer than a full-word transmission time. A "full-word transmission time"
is defined as the total time of the Start, Data, Parity, and Stop bits. The BI bit is reset every time the CPU reads
the contents of the Line Status register.
Bit 5. Bit 5 is the Transmitter Holding Register Empty (THRE) indicator. This bit is set to a logic 1 condition
when the Transmitter Holding Register is empty, indicating that the ACE is ready to accept a new character. If
the THRE interrupt is enabled when the THRE bit is a logic 1, then an interrupt is generated. THRE is set to a
logic 1 when the contents of the Transmitter Holding Register are transferred to the transmitted Shift Register.
This bit is reset to logic 0 concurrent with the loading of the Transmitter Holding Register by the CPU.
Bit 6. Bit 6 is the Transmitter Empty (TEMT) indicator. This bit is set to a logic 1 when the Transmitter Holding
register and the Transmitter Shift register are both empty. When either the TransmitterHolding register or the
Transmitter Shift register contains a data character, the TEMT bit is reset to logic o.
Bit 7. This bit is always reset to logic O.

*

Bits 1 through 4 are the error conditions that produce a Receiver Line Status interrupt.

modem status register (MSR)
The Modem Status register is an 8-bit register that provides information about the current state of the control
lines from the modem, data set, or peripheral device to the CPU. Additionally, four bits of this register provides
change information; when a control input from the modem changes state the appropriate bit is set to logic 1.
All four bits are reset to logic 0 when the CPU reads the Modem Status register. The contents of this register
are summarized in Table 3 and are described below.
Bit O. Bit 0 is the Delta Clear to Send (DCTS) indicator. This bit indicates that the CTS input has changed state
since the last time it was read by the CPU. When this bit is a logic 1 and the Modem Status Interrrupt is
enabled, a Modem Status Interrupt is generated.
Bit 1. Bit 1 is the Delta Data Set Ready (DDSR) indicator. This bit indicates that the DSR input has changed
state since the last time it was read by the CPU. When this bit is a logic 1 and the Modem Status Interrrupt is
enabled, a Modem Status Interrupt is generated.
Bit 2. Bit 2 is the Trailing Edge of Ring Indicator (TERI) detector. This bit indicates that the Ri input to the chip
has changed from a low to a high state. When this bit is a logic 1 and the Modem Status Interrrupt is enabled, a
Modem Status Interrupt is generated.
Bit 3. Bit 3 is the Delta Data Carrier Detect (DDCD) indicator. This bit indicates that the DCD input to the chip
has changed state since the last time it was read by the CPU. When this bit is a logic 1 and the Modem Status
Interrrupt is enabled, a Modem Status Interrupt is generated.
Bit 4. Bit 4 is the complement of the Clear to Send (CTS) input. If Bit 4 (loop) of the Modem Control register is
set to a logic 1, this bit is equivalent to the Modem Control register bit 1 (RTS).
Bit 5. Bit 5 Is the complement of the Data Set Ready (DSR) input. If Bit 4 (loop) of the Modem Control register
is set to a logic 1, this bit is equivalent to the Modem Control register bit 0 (DTR).
Bit 6. Bit 6 is the complement of the Ring Indicator (Ri) input. If Bit 4 (loop) of the Modem Control register is set
to a logic 1, this bit is equivalent to the Modem Control registers bit 2 (OUT 1).
Bit 7. Bit 7 is the complement of the Data Carrier Detect (DCD) input. If Bit 4 (loop) of the Modem Control
register is set to a logic 1, this bit is equivalent to the Modem Control registers bit 3 (OUT 2).

TEXAS . "
INSTRUMENTS
2-898

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TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
scratch register (SeR)
The Scratch register is an 8-bit register that is intended for the programmer's use as a "scratch pad, " in the
sense that it will temporarily hold the programmer's data without affecting any other ACE operation.

programmable baud generator
The ACE contains a programmable Baud Generator that takes a clock input in the range between DC and 9
MHz and divides it by a divisor in the range between 1 and 2 16 -1. The output frequency of the Baud
Generator is .sixteen times (16 X) the baud rate. The formula for the divisor is:
divisor # = XTAL 1 frequency input -;- (desired baud rate X 16)
Two 8-bit registers, called Divisor Latches, are used to store the divisor in a 16-bit binary format. These Divisor
Latches must be loaded during initialization of the ACE in order to ensure desired operation of the Baud
Generator. When either of the Divisor Latches is loaded, a 16-bit baud counter is also loaded to prevent long
counts on initial load.
Tables 5 and 6, which follow, illustrate the use of the Baud Generator with crystal frequencies of 1.8432 MHz
and 3.072 MHz, respectively. For baud rates of 38.4 kilobits per second and below, the error obtained is very
small. The accuracy of the selected baud rate is dependent on the selected crystal frequency.
Refer to Figure 10 for examples of typical clock circuits.

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INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-899

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION
TABLE 5. BAUD RATES USING A 1.8432-MHz CRYSTAL
DESIRED
BAUD RATE

DIVISOR USED
TO GENERATE
16XCLOCK

50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
19200
38400
56000

2304
1536
1047
857
768
384
192
96
64
58
48
32
24
16
12
6
3
2

PERCENT ERROR
DIFFERENCE BETWEEN
DESIRED AND ACTUAL

0,026
0.058

0.69

2.86

TABLE 6. BAUD RATES USING A 3.072-MHz CRYSTAL
DESIRED
BAUD RATE

DIVISOR USED
TO GENERATE
16 X CLOCK

50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
19200
38400

3840
2560
1745
1428
1280
640
320
160
107
96
80
53
40
27
20
10
5

TEXAS . "
INSTRUMENTS
2-900

POST OFFICE BOX 656303 • DALLAS. TeXAS 75266

PERCENT ERROR
DIFFERENCE BETWEEN
DESIRED AND ACTUAL

0.026
0.034

0.312

0.628
1.23

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION

TL16C450

DRIVER
EXTERNAL
CLOCK

OPTIONAL
CLOCK
OUTPUT

XTALl

OPTIONAL
DRIVER

XTA~~

OSCILLATOR CLOCK
TO BAUD
GENERATOR
______________________________
LOGIC

~

XTALl

CRYSTAL

=

OSCILLATOR CLOCK
TO BAUD
GENERATOR
LOGIC

RX2
XTAL2

TYPICAL CRYSTAL OSCILLATOR NETWORK
CRYSTAL

Rp

3.1 MHz

1 Mil
1 Mil

1.8 MHz

1.Skn
1.5 kn

10-30 pF
10-30 pF

40-60 pF
40-60 pF

FIGURE 10. TYPICAL CLOCK CIRCUITS

TEXAS

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POST OFFICE BOX 855303 • DAUAS, TEXAS 75265

2-901

2-902

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
MAY 1989- REVISED JANUARY 1990

• Integrates Most Communications Card
Functions From the IBM PC/AT or
Compatibles with Single-/ or Dual-Channel
Serial Ports

TL 16C451 .•. FN PACKAGE

ITOPVIEWI

• TL16C451 Consists of One TL16C450 Plus
Centronlx Printer Interface

987654321~~~~~~~~

~

NC
NC
GNO
DBO

• TL16C452 Consists of Two TL16C450s Plus
Centronix Printer Interface
• Fully Programmable Serial Interface
Characteristics:
5-, 6-, 7-, or 8-Bit Characters
Even-, Odd-, or No-Parity Bit
Generation and Detection
1-,1 1/2-, or 2 Stop-Bit Generation
Programmable Baud Rate
(DC to 256 Kilobits per Second)

w
59

14

56

58
57

~

INT2
SUN
INIT
AFD

~1

~

~

nB

OB2
DB3
DB4
OBS
OB6
OB7
GND

16
17
18
19

54

20

50

GNO
POD
POl
PD2
PD3
PD4
POS
PD6
PD7
INTO
BOO

vcc
RTSO
DTRO
SOUTO

• Fully Double Buffered for Reliable
Asynchronous Operation

m
11
12
13

53
52
51

21

49

22
23

48

24

46
45
44

47

25
26

V~~~~~~M~~D~~~~G~

description
The TL16C451 and TL16C452 provide singleand dual-channel (respectively) serial interfaces
along with a Single Centronix parallel-port
interface. The serial interfaces provide a serial-toparallel conversion for data received from a
peripheral device or modem and a parallel-toserial conversion for data transmitted by a
computer CPU. The parallel interface provides a
bidirectional parallel data port that fully conforms
to the requirements for a Centronix-type printer.
A computer CPU can read the status of the
asynchronous-communications-element (ACE)
interfaces at any point in the operation. The
status includes the state of the modem signals
(CTS, DSR, RLSD, and Ri) and any changes to
these signals that have occurred since the last
time they were read, the state of the transmitter
and receiver including errors detected on
received data, and printer status. The TL16C451
and TL16C452 provide control for modem
Signals (RTS and DTR), interrupt enables, baudrate programming, and parallel-port control
signals.

PRODUCTrol DATA docum.nts •••llln inl.....ti.n
.urnonl I. 01 p.blicllion dill. Products conform 10
....ili••llo.. p. tit. I"'. 01 r.... 1••trum••11

=~:~~·i~:I~I~ ~=:~:; :.r::;:~A::'1 nDt

NC - No internal connection
TL 16C452 ... FN PACKAGE
ITOPVIEW)

987 6 54 3216867666564636261

soun

10

60

INn

OTRl
RTSl
CTSl
DBO
DBl
DB2
DB3
DB4
DBS
DBS
DB7
GND

11

59

12
13
14
15
16
17
18
19
20
21

58
57

INT2
SUN
INIT
AFD

vcc
RTSO

22
23
24

i'ifRo 25
SOUTO

TEXAS ~
,~

54
53

52
51

50
49

48
47

46
45
44

26
27282930~3233343~~~~~~~~~

INSTRUMENTS
POST OFFICE BOX 665303

56
55

DALLAS, TEXAS 75265

SfB
GND
POO
POl
PD2
PD3
PD4
PDS
PD6
PD7
INTO
BOO

Copyright © 1990, Texas Instruments Incorporated

2-903

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
functional block diagrams
TL16C451
~O

rno

ACE
1

DSiio

i5TRo
SOUTO
INTO

RlSOO

Rio
SINO
~O

B

OBO-OB7

8

4- SELECT
AND
---=-- CONTROL
-- lOGIC

AO-A2

iOW
lOR
RESET
ClK

BOO

8
'--

ERROR
SlCT
BUSY
PE

8

,

POO-P07

iNiT
iWD

PARAllEL
PORT

m

SUN

AeK

INT2

lPTOE
~2

TL16C452

.---

rno

R'i'So

ACE
1

DSiio
RLm50

OTRO
SOUTO
INTO

Rio

SINO
CSO
OBO-OB7

8

L.......-

8

....--

CTS1

Ri1
CS1

RTS1

ACE
2

DSii1
RIm1

i5Ti{1
SOUT1
INT1

SIN1
AO-A2
lOW

~

~ ClK iO'Ii

miOii
SlCT
BUSY
PE

SELECT
AND
CONTROl
lOGIC

"L.......-

BOO

8
8,

POO-P07
ARAllEl
PORT

miii

AeK
LPTOE

INT2

CS2

TEXAS ."

INSTRUMENTS
2-904

iNiT
iWD

m

POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
PIN
NAMEt

NO.

AO
Al
A2

35
34
33

ACI(

68

AFJ)

56

BDO

44

BUSY

66

ClK

I/O

DESCRIPTION

I

Register Select. Three Inputs used during read and write operations to select the register to read from
orwrtteto. Relerto Table 1 ,for register addresses, also refer to the chip select signals (GSO, GSl, GS2).

I

Line Printer Acknowledge. This Input goes low to indicate a successful data transfer has taken place. It
generates a printer-port interrupt during ns posftive transftion.

I/O

Line Printer Autofeed. This open-drain line provides the line printer with a low signal when contlnuousform paper is to be autofed to the printer. An Internal pullup Is provided.

0

Bus Buffer Output. This output is active (high) when the CPU Is reading data. When active, this output
can be used to disable an external transceiver.

I

Line Printer Busy. This Is an input line from the line printer that goes high when the line printer is not
ready to accept data.

4

i/O

GSO
GSl [VCC)
GS2

32
3
38

I

CTSO
CTSl [GND]

28
13

DBO
DBl
DB2
DB3
DB4
DB5
DB6
DB7

14
15
16
17
18
19
20
21

i5SR0
liSRl [GND]

31
5

I

Data Set Ready. i5SR is an active-low modem status signal whose state can be checked by reading bit
5 (DSR) of the Modem Status Register. Btt 1 (DDSR) of the Modem Status Register Indicates that this
signal has changed state since the last read from the Modem Status Register. If the modem status
interrupt Is enabled when the i5SR changes state, an interrupt is generated.

DiR'0
I5'fRl [NC]

25
11

0

Data Terminal Ready. When active Oow), DiR informs a modem or data set that the ACE is ready to
establish communication. I5'fR is placed in ihe active state by setting the DTR btt of the Modem Control
Register to a high level. DTR is placed in the Inactive state either as a result of a reset or during loop
mode operation or resetting bit 0 (DTR) of the Modem Control Register.

~

63

iNli

57

INTO
INTl [NC)

45
60

INT2

59

iOR

37

lOW

36

I

i/O

External Clock. Connects the ACE to the main timing reference.
Chip Selects. Each chip selact enables read and wr~e operations to ns respective channel. GSO and
GSl select serial channels 0 and 1, respectively, and GS2 selects the parallel port.
Clear To Send. CTS is an active-low modem status signal whose state can be checked by reading bH 4
(CTS) of the Modem Status Register. Bft 0 (DCTS) of the Modem Status Register Indicates that this
signal has changed state since the last read from the Modem Status Register. If the Modem Status
Interrupt is enabled when 'C'fS changes state, an Interrupt Is generated.

Data Bus. Eight 3-state data lines provide a bidirectional path for data, control, and status Information
between the Tl16C451/Tl16C452 and the CPU. DBO is the least significant bit (LSB).

I

Line Printer Error. This is an Input line from the line printer. The line printer reports an error by holding
this line low during the error condtton.

i/O

Line Printer InHialize. This open-drain line provides the line printer wtth a signal that allows the line
printer InHiallzatlon routine to be started. An Internal pullup Is provided.

0

Interrupt. INTn Is an active-high 3-state output that Is enabled by bH 3 of the MCR. When active, INTn
informs the CPU that the ACE has an interrupt to be serviced. Four conditions that cause an interrupt to
be Issued are; a receiver error, received data is available, the transmitter holding register is empty, and
an enabled modem status interrupt. The INTn output is reset (low) eHher when the Interrupt is serviced
or as a resuH of a reset.

0

ACR. It Is enabled by bit 4 of the Write Control Register.

Printer Port Interrupt. This signal Is an active-high 3-.state output generated by the positive transition of

I

Data Read Strobe. When iOR Input is active Oow) while the ACE Is selected, the CPU is allowed to read
status information or data from a selected ACE register.

I

Data WrHe Strobe. When R>W Input Is active Qow) while the ACE Is, selected, the CPU is allowed to wrHe
control words or data Into a selected ACE register.

t Names shown in brackets are for the Tl16C451.

TEXAS ..,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-905

TL16C451, TL16C452

ASYNCHRONOUS COMMUNICATIONS ELEMENTS
PIN
NAMEt

NO.

iJ5i'OE

1

PDO-PD7

53-46

PE

67

~

VO

DESCRIPTION

I

Parallel Data Output Enable. When low. this signal enables the Write Data Register to the PDO-PD7
lines. A high puts the PDO-PD7Iines,in the high-impedance state allowing them to be used as Inputs.
l:P'fOl: is usually tied low for line printer operation.
Parallel Data Bits (0-7). These eight lines provide a byte-wide Input or output port to the system. The

VO eight lines are held in a high-Impedance state when l:P'fOl: is high.
I

Une Printer Paper Empty. This is an input line from the line printer that goes high when the printer runs
out of paper.

39

I

Reset. When active (low), ~ clears most ACE registers and sets the state ofvarlous output Signals.
Refer to Table 2, ACE Reset Functions.

Rio

30
6

I

Ring Indicator. Ri Is an active-low modem status signal whose state can be checked by reading btt 6
(RI) of the Modem Status Register. Bn 2 (TERI) of the Modem Status Register Indicates that the Ai Input
has transitloned from a low to a high state since the last read from the Modem Status Register. If the
Modem Status Interrupt is enabled when this transition occurs, an interrupt Is generated.

m:srio

29
8

I

RLSDI [GND]

Receive Une Signal Detect. fi[SDo is an active-low modem status signal whose state can be checked
by reading bit 7 of the Modem Status Register. Bit 3 (DRLSD) of the Modem Status Register Indicates
that this signal has changed state since the last read from the Modem Status Register. If the Modem
Status Interruj)t is enabled when m:srio changes state, an interrupt is generated. This bit is low when a
data carrier is detected.

RTSO
RTSI [NC]

24
12

0

Request To Send. When active Qow), this signal informs the modem or data set that the ACE Is ready to
transmit data. RTS is set to its active state by setting the RTS MOdem Control Register bit and Is set to its
Inactive (high) state either as a result of a reset or during loop mode operations or by resetting bit 1
(RTS) olthe modem control register.

SINO
SINI [GND]
SLCT

41
62
65

I

Serial Input. Serial data Input from a connected communications device.

I

Une Printer Selected. This Is an Input line from the line printer that goes high when the line printer has
been selected.

SIiR

58

1/0

Line Printer Select. This open-drain line selects the printer when It Is active (low). An Internal pullup Is
provided.

SOUTO
SOUTI [NC]

26
10

0

Serlai Output. Composite serial data output to a connected communication device. sour Is sat to the
Marking (logic 1) state as a result of reset.

S'i'ii

55

VO Line Printer Strobe. This open-draln line provides communication synchronization between the
TL16C451 tTL16C452 and the line printer. When ills active Qow), it provides the line printer with a Signal

VCC

23,40,
64

5-V Supply Voltage

GND

2,7,9,
22,27,
42,43,
54,61

Supply Common

m, [GND]

to latch the data currently on the parallel port. An Internal pullup Is provided.

,

t Names shown in brackets are for the TL16C451.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC (see Note 1) ......•...................•........ -0.5 V to 7 V
Input voltage range at any input, VI .........•.....•............• , . . . • • . . .. -0.5 V to 7 V
Output voltage range, Vo ..•..., ........•..........................••.. _-0.5 V to 7 V
Continuous total power dissipation , . . . . . . . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1100 mW
Operating free-air temperature range .........•.....................•. ,.... O·C to 70·C
Storage temperature range ....•.•.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . .• -65·C to 150·C
Case temperature for 10 seconds ....•...••...........••.... '.' . . . . . . . . . . . . . • .. 260·C
NOTE 1: All voltage values are with respect to GND.

TEXAS ."

INSTRUMENTS
2-906

POST OFFICE BOX 655303 • DALLAS, TeXAS 76265

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
recommended operating conditions
MIN
4.75
2
0.5
0

Supply voltage, VCC
High-level Input voltage, VIH
low-level Input voltage, VIL
Operating free-air temperature, TA

NOM
5

MAX
5.25
VCC
0.8
70

UNIT
V
V
V

'c

electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER

VOH

High-level output voltage

VOL

Low-level output voltage

Ilkg

Input leakage current

IOZ

High-Impedance output current

ICC

Supply current

CXTALI
CXTAL2
CI
Co

Clock input capacitance
Clock output capacitance
Input capacitance
Output capacitance

TEST CONDITIONS
IOH - -0.4 mA on DBO-DB7
IOH = -2 mA to 4 mA on PDQ-PD7
IOH = -0.2 mA on INIT, AFD, STB, and SLiN
IOH - -0.2 mA on all other outputs
IOL - 4 rnA on DBO-DB7
IOL = 12 rnA on PDO-PD7
IOL = 10 mA on iNlf, AFD, S'fB, and SON
(see Note 2)
IOL - 2 rnA on all other outputs
VCC = 5.25 V,
VSS= 0,
VI = Ot05.25V,
All other pins floating
VCC = 5.25 V,
VSS - 0,
VO;" 010 5.25 V,
Chip selected end write mode,
or chip deselected
TA = 25'C,
VCC = 5.25 V,
SIN, l5SR, m:sJJ, ~, and at2 V,
All other Inputs at 0.8 V,
XTALI at4 MHz,
No load on outputs.
Baud rate = 50 klloblts per second

MIN

TYpt

MAX

2.4

UNIT

V

0.4

V

:1:10

I1A

:1:20

I1A

10

rnA

20
30
10
20

pF
pF
pF
pF

m

VCC = 0,
f= 1 MHz,
All other pins grounded

VSS =0,
TA = 25'C,

15
20
6
10

t All typical values are at VCC = 5 V, TA = 25'C.

m, m,

NOTE 2: iNlf,
and SOI\I are ope":collector output pins that each have en Internal pullup 10 VCC. this wUi generate a maximum of
2 rnA of internal IOL per pin. In addition to this Internal current, each pin will sink at least 10 rnA while maintaining the VOL specification of
0.4VMax.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DAllAS, TEXAS 75265

2-907

TL16C451, TL16C452 .
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
system timing requirements over recommended ranges of supply voltage and operating free-air
temperature
PARAMETER
tcR
tcw
twl
tw2
tws
twa

Cycle time, read (tw7 + tdS + td9)
Cycle time, write (twa + tdS + .ldal
Pulse duration, clock high
Pulse duration, clock· low
Pulse duration, write strobe
Pulse duration, read strobe

twAST
tsul
tsu2
tsU3
thl
th2
th3
td3
1d4

Pulse duration, reset
Setup time, address
Setup time, chip select
Setup time, data
Hold time, address
Hold time, chip select
Hold time, data
Delay time, wrtte cycle
Delay time, read cycle

FIGURE

1
1
2
3
2,3
2,3
2
2,3
2,3
2
2
3

MIN
175
175
SO
SO
80
80
1000
1S
15
15
20
20
IS
80
80

MAX

UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

system switching characteristics over recommended ranges of supply voltage and operating freeair temperature
Ids
tdS
tdis(R)

PARAMETER
Delay time, read to data
Delay time, read to Iloating data
Read to driver disable

FIGURE
3
3
3

TEST CONDITIONS
CL=100pF
CL=100pF
CL= 100pF

MIN
0

MAX
60
60
60

UNIT
ns
ns
ns

receiver switching characteristics over recommended ranges of supply voltage and operating
free-air temperature
FI~URE

1d7

PARAMETER
Delay time, ACLI< to sample

tdS

Delay time, stop to set interrupt

4

td9

Delay time, read RBRlLSR to reset Interrupt

4

TEST CONDITIONS

MIN

MAX
100

UNIT
ns

1

1

RCLK
cycles
ns

4

140

CL - 100 pF

transmitter switching characteristics over recommended ranges of supply voltage and operating
free-air temperature
PARAMETER

Idl1

MIN

MAX

5

8

24

S

S

S baudout
cycles
140
ns

16

baudout
cycles
140
ns

FIGURE

td10 Delay time, InKial wrtte THR to transmtt start
Delay time, stop to interrupt

1d12 Delay time, wrHe THA to reset Interrupt

S

1d13 Delay time, initial write to interrupt (THAE)

5

1d14 Delay time, read IIA to reset interrupt (THAE)

S

TEST CONDITIONS

CL-100pF

CL-100pF

TEXAS ~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

32

UNIT
baudout
cycles

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
modem control switching characteristics over recommended ranges of supply voltage and
operating free-air temperature
-PARAMETER

!dIS Delay time, write MCR to output
tdl6
tdl7

Delay time, modem input to set interrupt
Delay time, read MSR to reset interrupt

FIGURE

TEST CONDITIONS

6
6
6

CL - 100 pF
CL = 100 pF
CL-l00pF

MIN

MAX

100
170
140

UNIT

ns
ns
ns

parallel port switching characteristics over recommended ranges of supply voltage and operating
free-air temperature
PARAMETER

FIGURE

TEST CONDITIONS

!dIS Delay time, write parallel port control to output

7

CL = 100 pF
CL = 100pF

60
60

CL

60

ns
ns

100

ns

tdl9

Delay time, write parallel port data to output

td20

Delay time, output enable to data

7
7

td21

Delay time, ACK to INT2

7

= 100 pF
CL = 100pF

MIN

MAX

UNIT

ns

TEXAS .".

INSTRUMENTS

POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

2-909

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIO~S ELEMENTS
PARAMETER MEASUREMENT INFORMATION
~IWl

r-

~2V
\....-t'0.8 V
I
I

ClK

---./

19 MHz MAXI

~IW2

,~'.~------------- N

BAUDDUT
11/11

ISee Note AI

BAUDOUT
11/21

BAUDOUT
(1/31

BAU"DffiiT
(l/NI
(N

>

3)

~---~
I

I

:.-2ClOCK~
I
CYCLES
I

~

I

(N-21 CLOCK
CYCLES

:

---+:

NOTE A: BAUDOUT is an internally generated signal used in the receiver and transmitter circuits to synchronize date.

FIGURE 1. BAUD GENERATOR TIMING

TEXAS ."

INSTRUMENTS
2-910

POST OFFICE BOX 656303 • DALLAS. TEXAS 75265

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
PARAMETER MEASUREMENT INFORMATION

AO-A2

=::>¢

:x== :
i

VALID

,----------------~,

,I

=:x:
,
I

~O.

CS1. CS2

I

X:

VALID

1---------th-2-1~.~~ ~,----­
I

I

I

I

'

I

I

,

I

•

I

'4-twS-t!

I

;... th1 ~

t4- t su2....

:'-tsu 1 -..:,

iOW

I

,

Y

"f---t,j3~

----------'""\1

~

---~,

I4-tsu3¥-th3 ....

-«

00-07 __________

I

I

VALID

DATA ) - -

FIGURE 2. WRITE CYCLE TIMING

TEXAS . "

INSTRUMENTS
POST OFFice BOX 656303 • DALLAS, TEXAS 75265

2-911

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
PARAMETER MEASUREMENT INFORMATION

AO-A2

.....;X==
'

~_ _ _ _ _ _VA_L_ID_ _ _
,,
I
:

I

CSO.CS1.CS2~

,

X,.:---

VALID

------~-2-1~4~~ ~,--­
I,

I 'I

,

I

I

I

•

'+-- tw6 --ti

I
I

SU

lOR

I

I

I
I

j4-- h1 ~

J4--tsu 2 --:

:'-t

I

I

t

1-':

I

:'--tcI4--.l

Y

---~"J

'-

"ff--~I.

tcllslR)
BOO

~

~tdiSIR)

I

y

I

0+- td6

~\,-._..,.;_J.

+'td5'"

I

DO-D7

>-:

---------C(

VALID DATA

FIGURE 3. READ CYCLE TIMING

TEXAS . "

2-912

---+'

I

io-'_ _ _ _' "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
PARAMETER MEASUREMENT INFORMATION
RCLK
(INTERNAL
SIGNAL ONLY
SAME AS
BAUOOUTI

,,

;+-

~:41------ B CLKs ------...,~

Id7

rL
,

SAMPLE
CLOCK

(INTERNAL - - - - - - - - - - - - - - - - - - '
SIGNAL ONLYI
SIN \

START

ro;;~ ~~S~

PARITY /

STOP

'--f

SAMPLE
CLOCK
I
I

I

,

....--.- IdB
I

INTRPT
IROR/LSII

'

!~
,

--------~------------;II

td9~
,

,

.

"--1

iOR
IRD RBR/LSRI

I

FIGURE 4. RECEIVER TIMING

SOUT

"~I--I~~:-ld11

I

INTRPT
ITHREI

~L
+-....I!;'
~,.
"

1d12~
lOW IWR THRI.·'

I

1~
~

I "'_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

~,td13

~

-

\

__

.,,

I

-.: :+-1d12
I

'LI

,
I

I

I

1d14 -.: ;.I

'--T

lOR IRD URI

FIGURE 5. TRANSMITTER TIMING

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-913

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
PARAMETER MEASUREMENT INFORMATION

lOW (WR MeR)

,
~td15

td15~

-----\~----------~)'
~.DSR.RLSD

____________J><~

____________________________

,

,

td16-J4+
I
I

L/

INTRPT
/'
(MODEM) ______________.J

,

'

~td17

\ ______11,.---_---;.-----

lOR (RD MSR)

I
:";-td16
,

\'--__---I/r-----FIGURE 6. MODEM CONTROL TIMING

\~--Jt

\10....-____/
td18~

SLlN.AFD.STB.INIT

I

-------------------J){~----------------~l----------------1414--..~rl td19

PDO.PD7

.(,---------------------------,\11&',-____
- - - -__
11o....-____________________________

-JI\~

i4--M- t d20

• ________________________________________________
L~OE ~~

\!I"---_--Jt

td21~

INT2 - - - - - - - - - - - - - - - - - - - - - - - - . \

FIGURE 7. PARALLEL PORT TIMING

TEXAS •

INSTRUMENlS
2-914

POST OFFICE BOX 655303 • DAllAS. TEXAS 75265

~td21

1'"---------

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
APPLICATION INFORMATION
9-PIN
"0"
CONN

DATA -----,~~----I
BUS
ADOR----~--~

BUS

CTL
BUS

ACE AND
PRINTER
PORT

=~==:):==j
25-PIN
"0"
CONN

FIGURE 8. TL16C451

9·PIN

DATA
BUS
ADOR
BUS

"0"
CONN

DUAL
ACE AND
PRINTER
PORT

9·PIN

"0"

CTL
BUS

CONN

PARALLEL
PORT
RIC NET

25-PIN

"0"
CONN

FIGURE 9. TL16C452

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-915

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
PRINCIPLES OF OPERATION
TABLE 1. REGISTER SELECTION
DLABt

A2

0
0
X
X
X
X
X
X
1
1

L
L
L
L
H
H
H
H
L
L

Al
L
L
H
H
L
L
H
H
L
L

AO
L
H
L
H
L
H
L
H
L
H

REGISTER
Receiver buffer (read), transmitter holding register (write)
Interrupt enable
Interrupt identification (read only)
Une control
Modem control
Une status
Modem status
Scratch
Divisor latch (LSB)
Divisor Letch (MSB)

t The Divisor Letch Access Bit (DLAB) is the most significant btt of the Une Control Register. The DLAB
signal is controlled by writing to this bit location (see Table 3).

TABLE 2. ACE RESET FUNCTIONS
REGISTER/SIGNAL

RESET
CONTROL

RESET STATE

Interrupt Enable Register

Reset

All bits low (0-3 forced and 4-7 permanent)

Interrupt Identification Register

Reset

Une Control Register
Modem Control Register

Reset
Reset

Une Status Register

Reset

Btt 0 is high, bits 1 and 2 are low, and btts 3-7 are
permanently low
All btts low
All bits low
Btts 5 and 6 are high, all other bits are low

Modem Status Register

Reset
Reset

Btts 0-3 are low, bits 4-7 are input signals
High

SOUT
INTRPT (Receiver Error Flag)
INTRPT (Received Data Available)
INTRPT (Transmitter Holding Register Empty)
INTRPT (Modem Status Changes)

Read LSRlReset Low
Read RBRlReSet Low
Read IIR/Write
THR/Reset

Low

Read MSR/Reset

Low

OUT 2 (interrupt enable)

Reset

High

RTS

Reset

High

DTR
QUTl
Scratch Register

Reset
Reset

High
High
No effect

Divisor Letch (LSB and MSB) Registers

Reset
Reset

Receiver Buffer Registers

Reset

No effect

Transmitter Holding Registers

Reset

No effect

No effect

TEXAS ."

INSTRUMENTS
2-916

POST OFFICE BOX 655303 • DALLAS. TeXAS 75265

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
PRINCIPLES OF OPERATION

accessible registers
The system programmer, via the CPU, has access to and control over any of the ACE registers that are
summarized in Table 3. These registers are used to control ACE operations, receive data, and transmit data.
Descriptions of these registers follow Table 3.
TABLE 3. SUMMARY OF ACCESSIBLE REGISTERS
REGISTER ADDRESS

BH
No.

o DLAB=O

ODLAB=O

Recalver

Transmitter
Holding

Bullar
Register
(Read
Only)
RBR

0

1

2

Data BIIO'

Data Bit 1

Data Bit 2

lDLAB=O

2

3

4

5

6

7

o DLAB=1

lDLAB=1

Interrupt
Enable
Reglater

Interrupt
Ident
Register
(Read
Only)

Line
Control
Raglater

Modem
Control
Register

Une
Status
Reglater

Modem
Status
Register

Scratch
Register

Divisor
Latch
(LSB)

Latch
(MSB)

THR

IER

IIR

LCR

MCR

LSR

MSR

SCR

DLL

DLM

Data BII 0

Enabl3
Received
Data
Available
Interrupt
(ERBFI)

"0" ff
Interrupt
Pending

Word
Length
Select
Bit 0
(WLSO)

Data
Terminal

Data
Ready
(DR)

Delta
Clear
to Send
(DCTS)

BIIO

Bit 0

Bit 8

Data Bit 1

Enable
Transmitter
Holding
Register
Empty
Interrupt
(ETBEI)

Intenupt
ID
BII(O)

Word
Length
Select
Bill
(WLS1)

~~g~~~

Overrun
Error
(DE)

Bill

Bill

Bit 9

Data Bit 2

Enable
Receiver
Line Status
Interrupt
(ELSI)

Interrupt
ID
BII(I)

Number of
Stop Bits
(STB)

Out 1

Parity
Error
(PE)

Trailing
Edge Ring
Indicator
(TERI)

Bit 2

8it2

Bit 10

0

:~~m'e

Out 2
(Interrupt
Enable)

Framing
Error
(FE)

Delta
Receive
Line
Signal
Detect
(DRLSD)

BII3

Bit 3

Bltl1

Break
Interrupt
(BI)

Bit 4

Bit 4

BII12

BII5

BII5

Bit 13

BIIS

BII6

BII14

Bit 7

Bit 7

Bit 15

R(W~:-r
Only)

~~~~r

(RTS)

3

Data Bit 3

Data Bit 3

Enable
MODEM
Status
Interrupt
(EDSSI)

4

Data Bit 4

DataBII4

0

0

Even
Parity
Select
(EPS)

[.oop

5

Data Bit 5

Data Bit 5

0

0

Stick
Parity

a

6

Data Bit 6

Data Bit 6

a

a

Set
Break

0

~Wlt~

7

Data Bit 7

Data Bit 7

0

0

Access

a

a

(PEN)

Divisor
Latch
Bit
(DLAB)

Transmitter
Holding
Register
(THRE)
Transmitter

Delta
Data
Set

(~;a~A)

Clear
to
Send
(CTS)
Data
Set
Read~
(DSR
Ring
Indicator
(RI)
Receive
Line
Signal
Detect
(RLSD)

• BII 0 is the least signlffcant bll. It Is the first bit senally transmitted or received.

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-917

TL16C451, TL16C452

ASYNCHRONOUS COMMUNICATIONS ELEMENTS
PRINCIPLES OF OPERATION
receiver buffer register (RBR)
The ACE's receiver section consists of a Receiver Shift Register and a Receiver Buffer Register.' Timing is
supplied by the 16 X Receiver Clock (RCLK). Receiver section control is a function of the ACE's Line Control
Register.
The ACE's Receiver Shift Register receives serial data from the Serial Input (SIN) pin. The Receiver Shift
Register then converts the data to a parallel form and loads it into the Receiver Buffer Register. When a
character is placed in the Receiver Buffer Register and the Received Data Available interrupt Is enabled, an
interrupt is generated. This interrupt is cleared when the data is read out of the Receiver Buffer Register.

transmitter holding register (THR)
The ACE's transmitter section consists of a Transmitter Holding Register and a Transmitter Shift Register.
Timing is supplied by the Baud Out (BAUDOUT) clock signal. Transmitter section control is a function of the
ACE's Line Control Register.
The ACE Transmitter Holding Register receives data off the Internal Data Bus and, when the shift register is
idle" moves it into the Transmitter Shift Register. The Transmitter Shift Register serializes the data and outputs
it at the Serial Output (SOUT). If the Transmitter Holding Register is empty and the Transmitter Holding
Register Empty (THRE) interrupt Is enabled, an interrupt is generated. This interrupt is cleared when a
character is loaded into the register.

interrupt enable register (IER)
The Interrupt Enable Regist~r enables each of the four types of interrupts (refer to Table 4) and the INTRPT
output signal in response to an interrupt generation. The Interrupt Enable Register can also be used to disable
the interrupt system by setting bits 0 through 3 to logic O. The contents of this register are summarized in
Table 3 and are described below.
Bit O. This bit, when set to logic 1, enables the Received Data Available interrupt.
Bit 1. This bit, when set to logic 1, enables the Transmitter Holding Register Empty interrupt.
Bit 2. This bit, when set to logic 1, enables the Receiver Line Status interrupt.
Bit 3. This bit, when set to logic 1, enables the Modem Status interrupt.
Bits 4 thru 7. Bits 4 through 7 in the Interrupt Enable Register are not used and are always set to logic O.

TEXAS ~

INSTRUMENTS
2-918

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
PRINCIPLES OF OPERATION

interrupt identification register o:ooo

6

5 4 3 2

1 4443424140

37

• Complete Status Reporting Capabilities

CS1

• 3-State TTL Drive Capabilities for
Bidirectional Data Bus and Control Bus

14

32

15

31

16

30
29

17

• Line Break Generation and Detection

1819202122232425262728

• Internal Diagnostic Capabilities:
Loopback Controls for
Communications Link Fault Isolation
Break, Parity, Overrun, Framing Error
Simulation

C\I 000 ~
Ig; g; >00 z 100:

Z I- ~

-x

:J

~.»

C\I

00:

00
1>-100
Ci ° °
o~<

NC - No ·inlernal connection

• Full Prioritized Interrupt System Controls
• Modem Control Functions (CTS, RTS, DSR,
DTR, RI, and DCD)
• Faster Plug-In Replacement for National
Semiconductor NS16550A
PRODUCTION DATA ....um.nts contain information
current as of publication date. Products conform to
specifications per the terms of TUBS Instruments

:=:~~ir,a[::1~18 =:~i:r :'~D::::::':'0S~ not

Copyright © 1990, Texas Instruments Incorporated

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-925

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
ctescription
The TL16C550A is a functional upgrade of the TL16C450 Asynchronous Communications Element (ACE).
Functionally Identical to the TL16C450 on powerup (Character Modet), the TL16C550A can be placed in an
alternate mode (FIFO) to relieve the CPU of excessive software overhead.
In this mode, internal FIFOs are activated allowing 16 bytes (piuS 3 bits or error data per byte in the receiver
FIFO) to be stored In both receive and transmit modes. To minimize system overhead and maximize system
efficiency, all logic is on the chip. Two of the TL16C450 pin functions (pins 24 and 29 on the N package and
pins 27 and 32 on the FN package) have been changed to allow signalling of DMA transfers.
The TL16C550A performs serial-to-parallel conversion on data received from a peripheral device or modem
and parallel-to-serial conversion on data received from its CPU. The CPU can read and report on the status of
the ACE at any point in the ACE's operation. Reported status information includes: the type of transfer
operation in progress, the status of the operation, and any error conditions encountered.
The TL16C550A ACE includes a programmable, on-board, baud rate generator. This generator Is capable of
dividing a reference clock Input by divisors from 1 to (2 16 -1) and producing a 16 X clock for driving the
Internal transmitter logic. Provisions are also included to use this 16 X clock to drive the receiver logic. Also
included in the ACE Is a complete modem control capability and a processor Interrupt system that may be
software tailored to the user's requirements to minimize the computing required to handle the
communications link.
tThe TL16C550A can also be reset to the TL16C450 mode under software control.

TEXAS ."

INSTRUMENTS
2-926

POST OFFICE SOX 655~3 • DALLAS. TEXAS 76265

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
block diagram

07-00

DIVISOR
LATCH (LS)

~+-

__~________.-__~(1~5)~

BAUDOUT

DIVISOR
LATCH (MS)

AO
Al
A2

'-------------+--t--~ TRANSMIITER

CSO

TIMING &
CONTROL

CSl
CS2
SELECT
&
CONTROL
LOGIC

ADS
MR
RDl
RD2
WIll

SOUT

WR2
DDIS
TXRDY
RTS

XIN
XOUT
RXRDY

CTS

(17)

(29)

DSR
DCD

iii

VCC~}POWER
VSS~

DTR

MODEM
CONTROL
LOGIC

OUTl
(31)

SUPPLY

(30)

OUT 2

INTRPT

Pin numbers shown are for the N package.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-927

TL16C550A

ASYNCH~ONOUS

COMMUNICATIONS ELEMENT

PIN
NAME
AO
Al
A2
ADS

NO.t
28(31)
27[30)
26[29)
25 [28)

BAUDOUT

15 (17)

CSO
CSI
CS2
CTS

12(14)
13[15]
14[16]
36[40]

DO
01
02
03
04
D5
06
D7
DCD

1 [2]
2[3]
3 [4]
4 [5]
5[6]
6[7]
7[8]
8 [9]
38[42)

110 ACE and the CPU.

DDIS

23[26]

0

DSR

37[41]

I

DTR

33 (37)

0

INTRPT

30[33]

0

MR

35[39]

I

OUTI
OUT2

34 [38]
31 [35]

0

RCLK
RDI
RD2

9 [10]
21 [24]
22[25]

I
I

1/0

I
I

0

I
I

DESCRIPTION
Register Select. Three inputs used during read and write operations to select the ACE register to read from orwrne
to. Refer to Table 1 for register addresses, also refer to the Address Strobe (ADS) signal description.
Address Strobe. When ADS Is active Qow), the Register Select signals (AO, AI, and A2) and Chip Select signals
(CSO, CS1, CS2) drive the internal select logic directly; when high, the Register Select and Chip Select Signals are
held in the state they were in when the low-Io-high transnlon of ADS occurred.
Baud Out. 16 X clock signal for the transmitter section of the ACE. The clock rate is established by the reference
oscillator frequency divided by a divisor specified by the Baud Generator Divisor Latches. BAUDOUT may also be
used for the receiver section by tying this output to the RCLK input.
Chip Select. When active (high, high, and low, respectively) ,these three Inputs select the ACE. If any oflhese inputs
are inactive, the ACE remains inactive. Refer to the ADS (Address Strobe) signal description.
ClearTo Send. CTS is a modem status signal whose condition can be checked by reading bn 4 (CTS) olthe Modem
Status Register. Bit 0 (DCTS) olthe Modem Status Register Indicates that this signal has changed state since the
last read from the Modem Status Register. If the Modem Status Interrupt is enabled when CTS changes state, an
interrupt is generated.

Data Bus. Eight 3-state data lines provide a bidirectional path for data, control, and status information between the

I

Data Carrier Detect. DCD is a modem status signal whose condnion can be checked by reading bit 7 (DCD) of the
Modem Status Register. Bit 3 (DDCD) of the Modem Status Register indicates that this signal has changed state
since the last read from the Modem status Register. If the Modem Status Interrupt is enabled when the DCD
changes state, and interrupt is generated.
Driver Disable. This output is active (high) when the CPU is not reading data. When active, this output can be used
to disable an external transceiver.
Data Set Ready. DSR Is a modem status signal whose condnion can be cheCked by reading bit 5 (DSR) of the
Modem Status Register. Bit 1 (DDSR) of the Modem Status Register Indicates that this signal has changed state
since the last read from the Modem Status Register. If the modem status interrupt is enabled when the DSR changes
state, an interrupt is generated.
Data Terminal Ready. When active (low), DTR informs a modem or data set that the ACE Is ready to establish
communication. DTR is placed in the active state by setting the DTR bit of the Modem Control Register to a high
level. DTR Is placed in the inactive state either as a resu~ of a Master Reset or during loop mode opeiation or
resetting bn 0 (DTR) of the Modem Control Register.
Interrupt. When active (high), INTRPT informs the CPU thatthe ACE has a interruptto be serviced. Four condnions
that cause an interrupt to be issued are; a receiver error, received data is available or timeout (FIFO mode only),
the transmitter holding register is empty, and an enabled modem status interrupt. The INTRPT output is reset
(deactivated) either when the interrupt is serviced or as a result of a Master Reset.
Master Reset. When active (high), MR clears most ACE registers and sets the state of various output signals. Refer
to Table 2, ACE Reset Functions.
Outputs 1 and 2. User-designated output pins that are set to their active states by setting their respective Modem
Control Register bns (OUT 1 and OUT 2) high. OUT 1 and OUT 2 are set to their inactive (high) states as a result
of Master Reset or during loop mode operations or by resetting M 2 (OUT 1) or bit 3 (OUT 2) of the MCR.
Receiver Clock. The 16 X baud rate clock for the receiver section of the ACE.
Read inputs. When either input is active (high or low, respectively) while the ACE is selected, the CPU is allowed
to read status Information or data from a selected ACE register. Only one of these inputs is required for the transfer
of data during a read operation; the other input should be tied in its inactive state (i.e., RD2 tied low or RDI tied
high).

t Pin numbers shown in brackets are for the FN package.

TEXAS ."

INSTRUMENlS
2-928

POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PIN
NAME
NO.t
RI
39 [43)

DESCRIPTION

I/O
I

Ring indicator. RI is a modem status signal whose condftion can be checked by reading btt 6 (RI) of the Modem
Status Register. Bft 2 (TERI) of the Modem Status Register indicates that the Ai input has transitioned from a low
to a high state since the last read from the Modem Status Register. If the Modem Status Interrupt is enabled when
this transftion occurs, an interrupt is generated.

RTS

32 [36)

0

Request to Send. When active, informs the modem or data set that the ACE is ready to transmft data. RTS is set
to tts active state by setting the RTS Modem Control Register btt and is set to its inactive (high) state either as a
result of a Master Reset or during loop-mode operations or by resetting bit 1 (RTS) of the MCR.

RXRDY

29[32)

0

SIN
SOUT

10[11)
11 [13]

0

TXRDY

24 [27]

0

Receiver Ready Output. Receiver DMA signalling is available with this pin. When operating in the FI FO mode, one
of two types of DMA signalling can be selected via FCR3. When operating in the TL16V450 mode, only DMA Mode
o is allowed. Mode 0 supports single-transfer DMA in which a transfer is made between CPU bus cycles. Mode 1
supports muHitransfer DMA in which multiple transfers are made continuously until the receiver FIFO has been
emptied. In DMA Mode 0 (FCRO = 0 or FCRO = 1, FCR3 = 0), if there is at least 1 character in the receiver FIFO
or receiver holding register, RXRDY will be active Qow). When RXRDY has been active but there are no characters
in the FIFO or holding register, RXRDY will go inactive (high). In DMA Mode 1 (FCRO = 1, FCR3 = 1), when the
trigger level or the timeout has been reached, RXRDY will go active Oow); when ft has been active but there are
no more characters in the FIFO or holding register, it will go inactive (high).
Serial Input. Serial data input from a connected communications device.
Serial Output. Composfte serial data output to a connected communication device. SOUT is setto the Marking (logic
1) state as a result of Master Reset.
Transmitter Ready Output. Transmitter DMA signalling is available with this pin. When operating in the FIFO mode,
one of two types of DMA signalling can be selected via FCR3. When operating in the TL16C450 mode, only DMA
mode 0 is allowed. Mode 0 supports single-transfer DMA in which a transfer is made between CPU bus cycles. Mode
1 supports multitransfer DMA in which muHiple transfers are mede continuously until the transmft FIFO has been
filled.

VCC
VSS
WRl
WR2

40[44)
20[22]
18 [20)
19[21)

XIN
XOUT

16[18)
17[19)

I

I

I/O

5-V Supply VoHage
Supply Common
Write Inputs. When either input is active (high or low, respectively), while the ACE is selected, the CPU is allowed
to wrfte control words or data into a selected ACE register. Only one of these inputs if required to transfer data during
a write operation; the other Input should be tied in fts inactive state (i.e., WR2 tied low or WRl tied high).
External Clock. Connects the ACE to the main timing reference (clock or crystal).

t Pin numbers shown in brackets are for the FN package.

absolute maximum ratings over free-air temperature range (unless otherwise noted)
Supply voltage range, Vee (see Note 1) .............................................. - 0.5 V to 7 V
Input voltage range at any input, VI ................................................... - 0.5 V to 7 V
Output voltlage range, Va .......................................................... - 0.5 V to 7 V
Operating free-airtemperature range, T A .............................................. O°C to 70°C
Storage temperature range ........................................................ - 65°C to 150°C
Case temperature for 10 seconds: FN package .............................................. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package .,................... 260°C
NOTE 1: All voltage values are wfth respect to VSS.

recommended operating conditions
MIN
4.75
2
",,0.5

Supply voltage, vCC
High-level input voltage, VIH
LOW-level input voltage, VIL
Operating free-air temperature, TA

0

.

NOM
5

MAX
5.25

UNIT
V

VCC
0.8
70

V
V
·C

TEXAS.

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-929

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER

TEST CONOmONS

VOH*

High-level output voltage

IOH= -1 rnA

VOL:/:

loW-level output voltage

IOl = 1.6 rnA
VCC = 5.25 V,
VI = 0 to 5.25 V,
All other pins floating

Ilkg

Input leakage current

IOZ

High-Impedance output current

MIN

TVPt

MAX

2.4

UNIT
V

0.4

V

±10

IlA

±20

IlA

10

rnA

15
20

20
30

6
10

10

pF
pF
pF

20

pF

VSS = 0,

VCC -5.25V,
VSS =0,
Vo = 0105.25 V,
Chip selected in Write mode or
Chip deselected
VCC -5.25V,
TA - 25"C,
SIN, DSR, liCD, CiS, and
al 2 V,
All other Inputs at O.S V,
XTAll at4MHz,

m

ICC

Supply current

No load on outputs,
Baud rate = 50 kllobits per secon~
CXIN
CXOUT
CI
Co

Clock input capacitance
Clock output capacitance
Input capacitance
Oulput capacitance

VCC =0,
VSS = 0,
·AII other pins grounded,
TA = 25"C
f= 1 MHz,

t All typical values are af VCC =

5 V, TA = 25"C.
:/: These parameters apply for all outputs except XOUT.

system timing requirements over recommended ranges of supply voltage and operating free-air
temperature
PARAMETER
leR
lew
tW5
tw6

ALT. SYMBOL

(lw7 + Ids + td9)
Cycle time, write (twe + 1d5 + Ids)

RC
WC

Pulse duralion, address strobe low
Pulse duration, write strobe

lADS

Cycle time, read

twR
tRO

FIGURE

MIN
175
175

2,3
2
3

IW7

Pulse duration, read strobe

tw8
tsul
tsu2

Pulse duration, master reset
Setup time, address

tAS
ICS

2,3

Setup time, chip select

tsu3
thl

Setup time, data
Hold time, address

lOS
IAH

th2

Hold time, chip select

2
2,3
2,3

th3
tM

Hold time, write to chip select

tMR
2,3

15
80
80
1
15
15
15
0

MAX

UNIT
ns
ns
ns
ns
ns

JlS
ns
ns
ns
ns
ns

2

0
20

Hold time, write to address
Hold time, data

twcs
twA
tOH

2
2

20
15

ns
ns

th6
th7
td4§

Hold time, read 10 chip select
Hold time, read to address

tRCS
tRA

3
3

20

ns

20

ns

Delay time, select to write

ICSW

2

15

ns

td5§

Delay time, address to write
Delay time, write cycle

tAW
twc

2
2

15
80

ns
ns

Delay time, chip select 10 read

leSR

3

15

ns

tAR
IRC

3
3

15

ns
ns

th5

tdS
td7§
Ids§
1d9

Delay time, address to read
Delay lime, read cycle

tCH

§ Only applies when ADS Is low.

TEXAS ."

INSTRUMENlS
2-930

POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

80

ns

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
system switching characteristics over recommended ranges of supply voltage and operating freeair temperature (see Note 2)
twl
tw2
Idl0
tdl1
tdis(Rl

PARAMETER
Pulse duration, clock high
Pulse duration, clock low
Delay time, read to data
Delay time, read to floating data
Read to driver disable

ALT. SYMBOL FIGURE
1
txH
1
txL
3
tRVD
3
tHZ
3
tROD

TEST CONDITIONS
1 = 9 MHz maximum
1 - 9 MHz maximum
CL = 100pF
CL= 100pF
CL=100pF

MIN
50
50
0

MAX

60
60
60

UNIT
ns
ns
ns
ns
ns

baud generator switching characteristics over recommended ranges of supply voltage and
operating free-air temperature
PARAMETER

ALT. SYMBOL FIGURE

TEST CONDITIONS
f = 9 MHz,

CLK + 2,

MIN

MAX

UNIT

tW3

Pulse durallon, SAUDOOT low

tLW

1

tw4

Pulse duration, BAUDOUT high

tHW

1

1= 9 MHz, CLK+ 2,
CL= 100pF

tdl

Delay time, "8AiJl5OOT low to high

CL = 100 pF

125

ns

1d2

Delay time, BADl50DT high to low

tBLD
tBHD

1
1

CL= 100pF

125

ns

CL=100pF

80

ns

100

ns

receiver switching characteristics over recommended ranges of supply voltage and operating
free-air temperature (see Note 3)
PARAMETER
td12 Delay time, RCLK to sample
Delay time, stop to set interrupt or
td13 read ABA to LSI interrupt
td14 Delay time, read ABR/LSR to reset interrupt

ALT. SYMBOL FIGURE
4
tSCD
tSINT

4,5,6,7,8

tAINT

4,5,6,7,8

TEST CONDITIONS

MIN

MAX
100
1
150

CL=100pF

UNIT
ns
RCLK
cycles
ns

transmitter switching characteristics over recommended ranges of supply voltage and operating
free-air temperature
PARAMETEA
td15

ALT. SYMBOL FIGURE

Delay lime, in Rial write to transmn start

tlAS

Id16 Delay time, stop to interrupt

TEST CONDITIONS

9

MIN

MAX

8

24

8

8

IsTI

9

1d17 Delay time, wrRe THA to reset interrupt

tHR

9

td18 Delay time, inRial write to interrupt (fHRE)

tSI

9

tlA
twxl

9
10,11

CL - 100 pF
CL-l00pF

140
195

IsXA

10,11

CL = 100 pF

8

1d19 Delay time. read flA to reset Interrupt (fHRE)
1d20 Delay time, write to TXRDY Inactive
td21

Delay time, start to TXADY active

140

CL=100pF
16

32

UNIT
baudout
cycles
baudout
cycles
ns
baudout
cycles
ns
ns
baudout
cycles

modem control switching characteristics over recommended ranges of supply voltage and
operating free-air temperature
PARAMETER
td22 Delay time, wrRe MCA to output
td23 Delay time, modem interrupt to set interrupt
t(l24 Delay time, read MSR to reset interrupt

ALT. SYMBOL FIGURE
12
tMDO
12
IsIM
12
tRIM

TEST CONDITIONS
CL-l00pF
CL-l00pF
CL= 100pF

MIN

MAX
100
170
140

UNIT
ns
ns
ns

NOTES: 2. Charge and discharge time Is determined by VOL, VOH, and extemalloading.
3.ln FIFO mode RC = 425 ns (minimum) between reads 01 the receiver FIFO and the status registers (interrupt IdentHication register
or line status register).

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-931

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PARAMETER MEASUREMENT INFORMATION
~lw1

r-

XIN
:;
2 .4V
OR
~2V
RCLK
~
(9 MHz MAX)
,,---O.4V

'--I!:!J...:
~1w2

:.4-------------N
,

XIN

,

JLJlSlJL
___ JlS
.
"

BAUDOUT
(1/1)

BAuDciUT
(1/2)

BAUDOUT
(1/3)

r-----,L -

BAUDOUT - - ,

L---J

(1/N)
(N > 3 ) "

'+,

,

2 XIN - . :

CYCLES,

'
(N.2) XlN

FIGURE 1. BAUD GENERATOR TIMING

TEXAS ."

INSTRUMENTS
2·932

:

~CYCLES~

POST OFFICE BOX 656303 • DALLAS, TEXAS 75265

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PARAMETER MEASUREMENT INFORMATION

f4--tSU1~

,

--+:

:4-lhl

AO-A2 =x,---V-A-Ll-O-....Xr-V-AL-ID-t-x=

,
~tSU2------:

cso, CS1, CS2

==x
,

I

I

I

I

-.: 4-lh2

' , . -_ _-..

VALID

X

VAllOt

,;.'_ __

X~

t h3 -4111---1al

'4-lwS-.!
,;""ld4 t "';
;4--th4 t
:'--ld5t --.:
,
VlRl, WR2

~
,

___

I

:

-to:

~ldS--+f

X X
ACTIVE

I

"'------

*t
, su3¥-lhS ....,
00-07

(VALID DATA ) - -

t Applicable only when ADS is tied low.

FIGURE 2. WRITE CYCLE TIMING

TEXAS . ,
INSTRUMENTS
PqST OFFICE BOX 656303 • DALLAS, TEXAS 75265

2-933

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PARAMETER MEASUREMENT INFORMATION

.

I4- l ws--'

.

i+--tSU1--+

AO-A2

.

.....

=x:

;'-th1

*L_V_AL_IO_t~X=:

VALID

----~
~tSU2--': ,

-

I

~ 4-th2

X

eso, eS1, CS2 ===x:,...-V-A-LI-O--.iX,.-V-A-L-IO-t....
I

I

th6~ ~---

•

'4-- tw7 --..;
•

:'--td9----";

•

I

X X
ACTIVE

-----~
tdiS(R)~
ODiS

I

~-----

:.--.:-tdls(R)

:\~-J/
;4-td10~

00-07

,

i4-t h7 t --:

+-td7 t ....:

:'-ldSt - - :
RD1, RD2

---------«

4--td11~
I

VALID

>-:

DATA

t Applicable only when ADS is tied low.

FIGURE 3. READ CYCLE TIMING

TEXAS~

2-934

:

.INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PARAMETER MEASUREMENT INFORMATION
RClK

-Il""'---_--'n. . .____ ~
I

I

,'

i4-~----- 8 ClKs - - - - - -..
~: ~'d12
SAMPLE
CLOCK

rL

--------

Tl16C450 MODE:
SIN \

START

~~~~

PARITY

I

\...J

STOP

SAMPLE _ _...._ _......_
CLOCK
INTRPT
(DATA READY) _ _ _ _ _ _ _ _ _ _ _ _ _ _

/
....;.~

,

I

+-+-'d13
I

I

I

INTRPT
I"--~\.
(RCV ERROR) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _J, , - "-

I

:,~'d14
I

RDl, RD2 (READ RBR)

--------------------------------~
>E9C
I

'd14~
I

RD1, RD2 (READ lSR) ___________________________

FIGURE 4. RECEIVER TIMING

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2-935

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PARAMETER MEASUREMENT INFORMATION

SIN \ . , , _..
COAi;....
__
DA
...T,\oA_(S_.8_)_J

SAMPLE
CLOCK
I

~
I

l

TRIGGER LEVEL
___________
INTERRUPT
0, 0)
(FCR6, 7

=

,
-a. 14~I

LSI INTERRUPT

(FIFO AT OR ABOVE
TRIGGER LEVEL)
~ ' - - - (FIFO BELOW TRIGGER
,
L)
i4-- td14
LEVE

' : \

---.I

td13

I (See Note A)

/
_ _ _ _ _ _ _-J

,I

i

\..

td14.,....-.l~

lUJ1

,
,

\

(ROLSR)

ACTIVE.vr-

~

JiIl1
(RORBR)

FIGURE 5. RECEIVER FIFO FIRST BYTE (SETS DR BIT)
SIN

SAMPLE
CLOCK

I I I I I I

r'l ______
~"

TIME OUT OR
TRIGGER LEVEL
_ _ _ _ _--J
INTERRUPT

""'f"'_ _ (FIFOATORABOVE

......! ~(Seet~~~eA)

td14-.1

~6s~~: ==========:::~:,

:::XACTIVE-

I

lUJ1, R02
(RORBR)

-

TOP BYTE OF FIFO\

td14

TRIGGER LEVEL)
BELOW TRIGGER

~ (FIFO

.if
-------~+------td13~
H

LSI INTERRUPT - - - - - - - \

"'

~

LEVEL)

:1

X"::~~:====~
I

--V--:.iV
\f;'-->e
----1\ ACTIVE A,,______--'A
ACTIVE
PREVIOUS BYTE
READ FROM FIFO

FIGURE 6. RECEIVER FIFO BYTES OTHER THAN THE FIRST BYTE (DR INTERNAL BIT ALREADY SET)
NOTE A: For a timeout interrupt, td13 = 8 RCLKs.

. TEXAS"
INSTRUMENTS
2·936

POST OFFICE BOX 656303 • DAUAS, TEXAS 75266

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PARAMETER MEASUREMENT INFORMATION
'liD

\'•

(RORBR)

\ACTIVEr

--v--\

SIN
(FIRST BYTE)..J

STOP

I (See Note A)

"--

1
SAMPLE
CLOCK

'RXRDY

1

---'-_........-

1
1
1

~,~\-----~:I;

~fcl14

I

1

1 1
td13
~ (See Note B)
NOTES: A. This is the reading of the last byte in the FIFO.
B. For a timeout interrupt,ld13 = 8 RCLKs.

FIGURE 7. RECEIVER READY (PIN 29), FCRO

= 0 OR FCRO = 1 AND FCR3 = 0 (MODE 0)

\~
ACTIVE

(RDRO
RBR)

--v--\" - -

SIN
(FIRST BYTE THAT..J
REACHES THE
TRIGGER LEVEL)

I

I

SAMPLE
CLOCK.

1

I

1

RXRDY

(See Note A)

1
1

I

~\
I

:1;

~td14

I

1 I
td13
~ (See Note B)
NOTES: A.This is the reading of the last byte in the FIFO.
B. For a timeout interrupt, td13 ~ 8 RCLKs.

FIGURE 8. RECEIVER READY (PIN 29) FCR

= 1 AND FCR3 = 1 (MODE 1)

TEXAS . . .
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 76265

2-937

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PARAMETER MEASUREMENT INFORMATION
START ~ - -

SOUT

--:::--v

~~~~I~

\

PARITY

I

\... S
STTAARRTT /
~

STOP

I

....-.~o-'d15
INTRPT
(THRE)
II

~td18

I

I

'd17~
WRTHR

I

I

-..!I 14- 'd17

•

~~____J~~___________________________________~~___
I

'd19~

I

\4-

1.r-\."----

RDIIR _ _ _ _ _ _-----0

FIGURE 9. TRANSMITTER TIMING
WR
(WRTHR)

SOUT

\

BYTE #1

/
I

i X

DATA

~
I

PARITY

I

fiI

TXRDY

I

I

~'d20

I

~'d21

FIGURE 10. TRANSMITTER READY (PIN 24), FCRO
WR
°(WRTHR)

\

=

0 OR FCRO

=

1 AND FCR3

=

0 (MODE 0)

\\
\

BYTE#16/

I
SOUT

DATA

~

~
I

PARITY

-------+I-J!:

FIFO FULL

~'d20

FIGURE 11. TRANSMITTER READY (PIN 24) FCRO

I

Xoo_ __

I

~'d21

=

1 AND FRCR3

TEXAS . "

INSTRUMENTS
2-938

:\

POST OFFJCE BOX 665303. DALLAS. TEXAS 75265

=

1 (MODE 1)

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PARAMETER MEASUREMENT INFORMATION
WR (WRMCR)

,
\.~------I

td23~
INTRPT
/'
(MODEM) _ _ _ _ _ _......J

\'---_......, - \'--__-......Jj~--

RD2 (RD MSR) _ _ _- - J/

I

:";-td23

FIGURE 12, MODEM CONTROL TIMING

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-939

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
APPLICATION INFORMATION

~
07-00
07-00
MEMR OR IIOR
MEMWORi7QN

RESET
AO
A1

CS

INTRPT

DSR
OCD

AO

CTS

A2

,£

EIA
232-0
DRIVERS
AND
RECEIVERS

DTR

MR

A1

A2
B
U
S

SIN
RTS

WA"1

INTR

C
P
U

SOUT

AD1

Rf
TL16C550A
(ACE)

ADS

XIN

WR2
13.072

T

R02
CS2

XOUT

CS1

BAUDOUT

H L CSO

RCLK

.

tJ

MHz

±

Lc
FIGURE 13_ BASIC TL16C550A CONFIGURATION
RECEIVER
I-W_R_ _ _~_-.~DI_SA_B_L_E_ _ _-I WR1

TL16C550A
(ACE)
DATA BUS
MICROCOMPUTER L-::===h~
SYSTEM ,..

DATA BUS

K:::t===:::>1 07-00
'---....- - - - 1

DDiS

DRIVER
DISABLE

FIGURE 14_ TYPICAL INTERFACE FOR A HIGH-CAPACITY DATA BUS

2-940

f::=:>

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 76265

t

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
APPLICATION INFORMATION
TL16C550A

ALTERNATE
XTAL CONTROL

(16)
XIN
A16·A23

A16·A23

(17)
(12)
(13)

ADDRESS
DECODER

(14)

CPU

XOUT
(15)

CSO

BAUDOuT

CSl

RCLK

J

(9)

CS2

DTR
(25)

RTS
ADS

ADS

OUT 1
(35)
OUT2

MR

RSI/ABT

RT

BUFFER

ADO·AD15

DCD
PHil

PHI2

DSR
CTS

PHil

PHI2

ADS RSTO

(21)
RDl

RD

SOUT

(18)

TCU

WIll

WR

SIN

(10)

3

(30)

ADO·AD15

INTRPT
(24)
TXRDY

(22)

(23)

RD2

7

DDIS
WR2

RXRfj'(

(29)

-=-

-=GND
(VSS)

(40)

-=-

EIA·232·D
CONNECTOR

5V
(VCC)

FIGURE 15. TYPICAL TL16C550A CONNECTION TO A CPU

TEXAS . "

INSTRUMENTS
POST OFfiCE BOX 655303 • DALLAS. TEXAS 75265

2·941

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION
TABLE 1. REGISTER SELECTION

DLABt

A2

0
0
X
X
X
X
X
X
X
1
1

L
L
L
L
L
H
H
H
H
L
L

Al
L
L
H
H
H
L
L
H
H
L
L

AO
L
H
L
L
H
L
H
L
H
L
H

REGISTER
Receiver buffer (read), transmitter holding register (write)
Interrupt enable
Interrupt identification (read only)
FIFO control (write)
Une control
Modem control
Line status
Modem status
Scratch
Divisor latch (LSB)
Divisor Latch (MSB)

t The Divisor Latch Access Bit (DLAB) is the most significant bit of the Line Control Register. The DLAB
signal is controlled by writing to this bit location (see Table 3).

TABLE 2. ACE RESET FUNCTIONS

Interrupt Enable Register

RESET
CONTROL
Master Reset

Interrupt Identification Register

Master Reset

FIFO Control Register
Line Control Register
Modem Control Register
Line Status Register
Modem Status Register
SOUT
INTRPT (Receiver Error Flag)
INTRPT (Received Data Available)

Master Reset
Master Reset
Master Reset
Master Reset
Master Reset
Master Reset
Read LSR/MR
Read RBR/MR

INTRPT (Transmitter Holding Register Empty)

Read lIR/WrHe
THR/MR
Read MSR/MR
Master Reset

High

lJi'J:i

Master Reset
Master Reset

High
High

00'i"1
Scratch Register
Divisor Latch (LSB and MSB) Registers
Receiver Buffer Registers
Transmitter Holding Registers

Master Reset
Master Reset
Master Reset
Master Reset
Master Reset

High
No effect
No effect
No effect
No effect

REGISTER/SIGNAL

INTRPT (Modem Status Changes)
00'i"2
Rl'§

RESET STATE
All bits low (0-3 forced and 4·1 permanent)
Bn 0 is high, bHs 1·3 are low, and bits 4-7 are
permanently low
All bits low
All bHs low
All bits low (5-7 permanent)
Bits 5 and 6 are high, all other bits are low
Bits 0-3 are low, bits 4·7 are input signals
High
Low
Low
Low

Low

RCVRFIFO

MR/FCR1·FCROI All bits low
AFCRO

XMITFIFO

MR/FCR2-FCROI All btts low
AFCRO

TEXAS ~

2·942

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION

accessible registers
The system programmer, via the CPU, has access to and control over any of the ACE registers that are
summarized in Table 3. These registers are used to control ACE operations, receive data, and transmit data.
Descriptions of these registers follow Table 3.
TABLE 3. SUMMARY Q,F ACCESSIBLE REGISTERS
REGISTER ADDRESS
3

4

5

6

7

Interrupt

FIFO

Interrupt
Enable
Register

Ident.
Register
(Read
Only)

Control

Line

Line

Register
(Write
Only)

Status

MODEM
Sialus

Register

MODEM
Control
Register

Register

Register

Scratch
Reglsler

IIR

FCR

lCR

MeR

LSR'

MSR

Word
Length

Data

o DLAB=O o DLAB=O 1 DLAB=O
Receiver
BH
No.

0

Register
(Read
Only)

Transmitter
Holding
Register
(Write
Only)

RBR

THR

IER

Data Bit 0

Enable
Aecelved
Data

Buffer

Data Bit ot

Available

1(~Rr~,~1

2

2

"0" il
Interrupt
Pending

FIFO
Enable

Control

Select

Data
Aeady
(DA)

Terminal

BiiO
(WLSO)

78~~r

Word
Length
Select
Bill
(WLS1)

Aequest
10 Send
(ATS)

o DLAB=1 1 DLAB=1

Divisor
Lalch
(LSB)

Latch
(MSB)

SCR

DLL

DlM

BIIO

BIIO

BiiS

Bill

Bit 1

BII9

Bit 2

Bit 2

Blll0

Bit 3

BII3

Blill

BII4

BII4

BII12

BII5

BII5

BII13

BII6

BII6

BII14

BII7

BI17

BillS

Delta

Clear
to Send
(t.CTS)

Enable

Transmitter
1

Data Bit 1

Data Bit t

Holding
Register
Empty

Interrupt
ID
BII(O)

Interrupt

Rece/ver
FIFO

Reset

Overrun
Error
(OE)

(ETBEI)
Enable
2

3

Data Bit 2

Data Bit 3

Dala Bit 2

Data Bn3

Receiver

Interrupt

Line Status
Interrupt
(ELSI)

10
Bit (1)

Enable
MODEM
Status
Interrupt
(EDSSI)

Transmitter NUmber of
FIFO

Parity

Stop Bits
(STB)

Oul1

Reset

I.nterrupt
10
BII(2)
(Note 4)

DMA
Mode
Select

::.:I,7e
(PEN)

Oul2

Error
(PE)

4

Data BII4

Data BII4

0

0

Reserved

Even
Parity
Select
(EPS)

Loop

5

Data BII5

Data BII 5

0

0

Reserved

Slick
Parity

0

0

FIFOs
Enabled
(Note 4)

Receiver

Data Bit 6

Latch

Dala Bil7

Data Bit 7

0

FIFO.
Enabled
(Note 4)

Receiver

7

1~~~r

Access

T[~~~r

Set

Break

Della
Data

(FE)

Detect
(t.DCD)

Break

Clear
to
Send
(CTS)

Holding

Data
Sel

Register

Rea~

Transmitter

Divisor

~W~'f,
Error in

0

BII
(DLAB)

Trailing
Edge Ring
Indicator
(TEAl)

Carrier

Interrupt
(BI)

0

Sel

(~D"S%

Error

(THAE)
Data Bil6

Data

Framing

Transmitter

6

Della

ACVR
FIFO
(Nole 4)

(DSR

Ring
Indicator
(AI)
Data

Carrier
Detect
(DCD)

t Bit a Is the least significant bit. It Is the first bit serially transmitted or received.
NOTE 4: These bils are always 0 in Ihe TL 16C450 mode,

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

2-943

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION
receiver buffer register (RBR)
The ACE's receiver section consists of a Receiver Shift Register (RSR) and a Receiver Buffer Register (RBR).
The RBR is actually a 16-byte FIFO. Timing is supplied by the 16 X Receiver Clock (RCLK). Receiver section
'
control is a function of the ACE's Line Control Register.
The ACE's RSR receives serial data from the Serial Irwut (SIN) pin. The RSR then deserializes the data and
moves it into the RBR FIFO. In the TL16C450 mode, when a character is placed in the Receiver Buffer Register
and the Received Data Available Interrupt Is enabled, an interrupt is generated. This Interrupt Is cleared when
the data is read out of the Receiver Buffer Register. In the FIFO mode, the interrupts are genereted based on
the control setup in the FIFO Control Register.

transmitter holding register (THR)
The ACE's transmitter section consists of a Transmitter Holding Register (THR) and a Transmitter Shift
Register (TSR). The THR is actually a 16-byte FIFO. Timing is supplied by the Baud Out (BAUDOUT) clock
signal. Transmitter section control is a function of the ACE's Line Control Register.
The ACE THR receives data off the Internal Data Bus and, when the shift register is idle, moves it into the TSR.
The TSR serializes the data and outputs it at ,he Serial Output (SOUT). In the TL16C450 mode, if the THR is
empty and the Transmitter Holding Register Empty (THRE) interrupt is enabled, an interrupt is generated. This
interrupt is cleared when a character is loaded into the register. In the FIFO mode, the interrupts are
generated based on the control setup in the FIFO control register.

interrupt enable register (IER)
The Interrupt Enable Register enables each of the five types of Interrupts (refer to Table 4) and the INTRPT
output signal in response to an interrupt generation. The Interrupt Enable Register can also be used to disable
the interrupt system by setting bits 0 through 3 to logic O. The contents of this register are summarized in
Table 3 and are described below.
Bit O. This bit, when set to logiC 1, enables the Received Data Available interrupt.
Bit 1. This bit, when set to logic 1, enables the Transmitter Holding Register Empty interrupt.
Bit 2. This bit, when set to logic 1, enables the Receiver Line Status interrupt.
Bit 3. This bit, when set to logic 1, enables the Modem Status interrupt.
Bits 4 thru 7. Bits 4 through 7 in the Interrupt Enable Register are not used and are always set to logic O.

FIFO control register
The FIFO control register (FCR) is a write-only register at the same location as the IIR, which Is a read-only
register. The FCR is used to enable the FIFOs, clear the FIFOs, set the receiver FIFO trigger level, and select
the type of DMA signalling.
Bit O. FCRO, when set to logic 1, enables the transmit and receive FIFOs. This bit must be a 1 when other FCR
bits are written to or they will not be programmed. Changing this bit clears the FIFOs.
Bit 1. FCR1, when set to logic 1, clears all bytes in the receiver FIFO and resets its counter logic
to O. The shift register is not cleared. The 1 that is written to this bit position is self clearing.
Bit 2. FCR2, when set to logic 1, clears all bytes in the transmit FIFO and resets its counter to O. The shift
register is not cleared. The 1 that is written to this bit position is self clearing.
Bit 3. If FCRO is a 1, setting FCR3 to a 1 causes the RXRDY and TXRDY to change from mode 0 to mode 1.

TEXAS ."

2-944

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXA.S 75265

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION
Bits 4 and 5. FCR4 and FCR5 are reserved for future use.
Bits 6 and 7. FCR6 and FCR7 are used to set the trigger level for the receiver FIFO interrupt.
BIT7

BIT 6

0
0
1
1

0
1
0
1

RECEIVER FIFO
TRIGGER LEVEL (BYTES)

01
04
08
14

interrupt identification register (IIR)
The ACE has an on-chip interrupt generation and prioritization capability that permits a flexible interface with
most popular microprocessors.
.
The ACE provides four prioritized levels of interrupts:
Priority 1
Priority 2
Priority 3
Priority 4

-

Receiver line status (highest priority)
Receiver data ready or Receiver character timeout
Transmitter holding register empty
Modem status (lowest priority)

When an interrupt is generated, the Interrupt Identification Register indicates that an interrupt is pending and
the type of that interrupt in its three least significant bits (bits 0, 1, and 2). The contents of this register are
summarized in Table 3 and described in Table 4. Detail on each bit are as follows:
Bit O. This bit can be used either in a hardwire-prioritized, or polled interrupt system. If this bit is a logic 0, an
interrupt is pending. When bit 0 is a logic 1, no interrupt is pending.
Bits 1 and 2. These two bits are used to iaentify the highest priority interrupt pending, as indicated in Table 4.
Bit 3. This bit is always 0 in the TL16C450 mode. In FIFO mode, this bit is set with bit 2 to indicate that a
timeout interrupt is pending.
Bits 4 thru 5. These two bits are not used and are always set at logic O.
Bits 6 and 7. These two bits are always 0 in the TL16C450 mode. They are set when bit 0 of the FIFO Control
Register is equal to 1.

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-945

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION
TABLE 4. INTERRUPT CONTROL FUNCTIONS
INTERRUPT
IDENTIFICATION
REGISTER
BIT 3 BIT 2 BIT 1 BIT 0
1
0
0
0

PRIORITY
LEVEL
None

INTERRUPT TYPE
None

INTERRUPT SOURCE
None
Overrun error, pari1y error,
framing error,or,break Interrrupt
Receiver data available in the
TL16C450 mode or 1rigger level
reached in the FIFO mode.
No characters have been
removed from or input to the
receiver FIFO during the last
four character times and there
is at least one character In it
during this time

INTERRUPT RESET
METHOD

Reading the Una Status
register

0

1

1

0

1

Receiver line status

1

1

0

0

2

Received data available

1

1

0

0

2

Character timeout
indication

0

0

1

0

3

Transmitter Holding
register empty

Transmitter Holding register
empty

Reading the Interrupt
Identffication register (if source
of interrupt) or wrtting Into the
Transmitter Holding register

0

0

0

0

4

Modem status

Clear to Send, Data Set Ready,
Ring Indicator, or Data Carrier
Detect

Reading the Modem Status
register

TEXAS . . ,
INSTRUMENTS
2-946

POST OFl'ICE'BOX 655303 • DALLAS. TEXAS 75285

Reading the Receiver buffer
Buffer register

Reading the Receiver
Buffer Register

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION
line control register (LCR)
The system programmer controls the format of the asynchronous data communication exchange through the
Line Control register. In addition, the programmer is able to retrieve, inspect, and modify the contents of the
Line Control register; this eliminates the need for separate storage of the line characteristics in system
memory. The contents of this register are summarized in Table 3 and are described below.

°

Bits and 1. These two bits specify the number of bits in each transmitted or received serial character. These
bits are encoded as follows:
Bit 1

BIIO

Word Length

0
0
1
1

0
1
0
1

5 Bits
6 Bits
7 Bits

a Bits

Bit 2. This bit specifies either one, one and one-half, or two Stop bits in each transmitted character. If bit 2 is a
logic 0, one Stop bit is generated in the data. If bit 2 is a logic 1, the number of Stop bits generated is
dependent on the word length selected with bits and 1. The receive clocks the first stop bit only, regardless
of the number of stop bits selected. The number of Stop bits generated, in relation to word length and bit 2, is
shown in the following.

°

Bit 2

0
1
1
1
1

Word Length Selected

Number 01 Stop

by Bits 1 and 2
Any word length
5 bits
6 bits
7 bits
8 bits

Bits Generated
1

11/2
2
2
2

Bit 3. This bit is the Parity Enable bit. When bit 3 is a logic 1, a Parity bit is generated in transmitted data
between the last data word bit and the first stop bit. In received data, if bit 3 is a logic 1, parity is checked.
When bit 3 is a logic 0, no parity is generated or checked.
Bit 4. Bit 4 is the Even Parity Select bit. When parity is enabled by bit 3: a logic 1 in bit 4 produces Even Parity
(an even number of logic 1s in the data and parity bits) and a logic in bit 4 produces Odd Parity (an odd
number of logic 1s).

°

Bit 5. This is the Stick parity bit. When bits 3, 4, and 5 are logic 1s, the Parity bit is transmitted and checked as
a logic 0. When bits 3 and 5 are logic 1s and bit 4 is a logic 0, the Parity bit is transmitted and checked as a
logic 1. If bit 5 is a logic 0, stick parity is disabled.
Bit 6. This bit is the Break Control bit. Bit 6 is set to a logic 1 to force a break condition, i.e, a condition where
the Serial Output (SOUT) pin is forced to the spacing (logic 0) state. When bit 6 is set to a logic 0, the break
condition is disabled. The break condition has no effect on the transmitter logic; it only effects the serial
output.

°

Bit 7. This bit is the Divisor latch Access bit (DLAB). Bit 7 must be set to a logic 1 to access the Divisor
latches of the Baud Generator during a read or write. Bit 7 must be set to a logic during a read or write to
access the Receiver Buffer, the Transmitter Holding register, or the Interrupt Enable register.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALl.AS, TEXAS 75265

2-947

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
modem control register (MeR),
The Modem Control register Is an 8-bit register that controls an interface with a modem, data set, or peripheral
device that is emulating a modem. The contents of this register are summarized in Table 3 and are described
below.
Bit O. Bit 0 (DTR) controls the Data Terminal Ready (DTR) output. Setting this bit to a logic 1 forces the DTR
output to its low state. When bit 0 is set to a logic 0, DTR goes high.
Bit 1. Bit 1 (RTS) controls the Request to Send (RTS) output in a mariner identical to Bit O's control over the
DTR output.
Bit 2. Bit 2 (OUT 1) controls the Output 1 (OUT 1) signal, a user-designated output signal, in a manner
identical to Bit O's control over the DTR output.
Bit 3. Bit 3 (OUT 2) controls the Output 2 (OUT 2) signal, a user-designated output signal, in a manner
identical to Bit O's control over the DTR output.
Bit 4. Bit 4 provides a localloopback feature for diagnostic testing of the ACE. When this bit is set to a logic
high, the following occurs:
1. The transmitter Serial Output (SOUT) is set high.
2. The receiver Serial Input (SIN) is disconnected.
3. The output of the Transmitter Shift register is looped back into the Receiver Shift register input.
4. The four modem control inputs (CTS, DSR, DCD, and 'Ri) are disconnected.
5. The four modem control outputs (DTR, RTS, OUT 1, and OUT 2) are internally connected to the four
modem control inputs.
6. The four modem control output pins are forced to their inactive states (high).
In the diagnostic mode, data that is transmitted is immediately received. This allows the processor to verify the
transmit- and receive-data paths to the ACE. The receiver and transmitter interrupts are fully operational. The
modem control interrupts are also operational but the modem control interrupt's soUrces are now the lower
four bits of the Modem Control register instead of the four modem control inputs. All interrupts are still
controlled by the Interrupt Enable register.
Bit 5 through 7. These bits are permanently set to logic O.

line status register (LSR)t
The Une Status Register provides information to the CPU concerning the status of data transfers. The
contents of this register are described below and summarized in Table 3.
Bit o. Bit 0 is the Data Ready (DR) indicator for the receiver. This bit is set to a logic 1 condition whenever a
complete incoming character has been received and transferred into the Receiver Buffer register or the FIFO
and is reset to logic 0 by reading all of the data In the Receiver Buffer Register or the FIFO.
Bit 1:1=. Bit 1 is the Overrun Error (OE) indicator. When this bit is set to logic 1, it indicates that before the
character in the Receiver Buffer register was read, it was overwritten by the next character transferred into the
register. The OE indicator is reset every time the CPU reads the contents of the Line Status register. If the FIFO
mode data continues to fill the FIFO beyond the trigger level, an overrun error will occuronly after the FIFO is
full and the next character has been completely received in the shift register. OE is indicated to the CPU as
soon as it happens. The character in the shift register is overwritten, but is not transferred to the FIFO.
Bit 2:1=. Bit 2 is the Parity Error (PE) indicator. When this bit is set to logic 1, it indicates that the parity of the
received data character does not match the parity selected in the Line Control Register (bit 4). The PE bit is
reset every time the CPU reads the contents of the Line Status register. In the FIFO mode, this error is

t The Line Status register Is intended for read operations only; wrHing to this register Is ·not recommended outside of a factory testing
environment.
Btts 1 through 4 are the error condttlons that produce a Receiver Line Status interrupt.

*

TEXAS ...,
2-948

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
associated with the particular character in the FIFO to which it applies. This error is revealed to the CPU when
its aSSOCiated character is at the top of the FIFO.
Bit 3:1:. Bit 3 is the Framing Error (FE) indicator. When this bit is set to logiC 1, it indicates that the received
character did not have a valid (logic 1) Stop bit. The FE bit is reset every time the CPU reads the contents of
the Line Status register. In the FIFO mode, this error is associated with the particular character in the FIFO to
which it applies. This error is revealed to the CPU when its associated character is at the top of the FIFO. The
ACE will try to resynchronize after a framing error. To accomplish this, it is assumed that the framing error is
due to the next start bit. The ACE then samples this start bit twice and then accepts the input data.
Bit 4:1:. Bit 4 is the Break Interrupt (BI) indicator. When this bit is set to logic 1, it indicates that the received data
input was held in the logic 0 state for longer than a full-word transmission time. A "full-word transmission time"
.is defined as the total time of the Start, Data, Parity, and Stop bits. The BI bit is reset every time the CPU reads
the contents ofthe Line Status register. In the FIFO mode, this error is associated with the particular character
in the FIFO to which it applies. This error is revealed to the CPU when its associated character is at the top of
the FIFO. When break occurs, only one 0 character is loaded into the FIFO. The next character transfer is
enabled after SIN goes to the marking state and receives the next valid start bit.
Bit 5. Bit 5 is the Transmitter Holding Register Empty (THRE) indicator. This bit is set to logic 1 when the
Transmitter Holding Register is empty, indicating thatthe ACE is ready to accept a new character. If the THRE
interrupt is enabled when the THRE bit is a logic 1, then an interrupt is generated. THRE is set to a logic 1
when the contents of the Transmitter Holding Register are transferred to the transmitted Shift Register. This bit
is reset to logic 0 concurrent with the loading of the Transmitter Holding Register by the CPU. In the FIFO
mode, this bit is set when the transmit FIFO is empty; it is cleared when at least 1 byte is written to the transmit
FIFO.
Bit 6. Bit 6 is the Transmitter Empty (TEMT) indicator. This bit is set to a logic 1 when the Transmitter Holding
register and the Transmitter Shift register are both empty. When either the Transmitter Holding register or the
Transmitter Shift register contains a data character, the TEMT bit is reset to logic O. In the FIFO mode, this bit is
set to a 1 when the transmitter FIFO and shift register are both empty.
Bit 7. In the TL16C550A, this bit is always reset to logic O. In the TL16C450 mode, this bit is always a O. In the
FIFO mode, LSR7 is set when there is at least one parity, framing, or break error in the FIFO. It is cleared when
the microprocessor reads the LSR and there are no subsequent errors in the FIFO.

*

Bits 1 through 4 are the error conditions that produce a Receiver Line Status interrupt.

modem status register (MSR)
The Modem Status register is an 8-bit register that provides information about the current state of the control
lines from the modem, data set, or peripheral device to the CPU. Additionally, four bits of this register provides
change information; when a control input from the modem changes state, the appropriate bit is set to logic 1.
All four bits are reset to logic 0 when the CPU reads the Modem Status register. The contents of this register
are summarized in Table 3 and are described below.
Bit O. Bit 0 is the change in Clear to' Send (DCTS) indicator. This bit indicates that the CTS input has changed
state since the last time it was read by the CPU. When this bit is a logic 1 and the Modem Status Interrupt is
enabled, a Modem Status Interrupt is generated.
Bit 1. Bit 1 is the change in Data Set Ready (DDSR) indicator. This bit indicates that the DSR input has
changed state since the last time it was read by the CPU. When this bit is a logic 1 and the Modem Status
Interrupt is enabled, a Modem Status Interrupt is generated.
Bit 2. Bit 2 is the Trailing Edge of Ring Indicator (TERI) detector. This bit indicates that the AI input to the chip
has changed from a low to a high state. When this bit is a logic 1 and the Modem Status Interrupt is enabled, a
Modem Status Interrupt is generated.

TEXAS •

INSTRUMENlS
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2-949

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
Bit 3. Bit 3 is the change in Data Carrier Detect (DDCD) indicator. This bit indicates that the DCD input to the
chip has changed state since the last time it was read by the CPU. When this bit is a logic 1 and the Modem
Status Interrupt is enabled, a Modem Status Interrupt is generated.
Bit 4. Bit 4 is the compliment of the Clear to Send (CTS) input. If Bit 4 (loop) of the Modem Control register Is
set to a logic 1, this bit is equivalent to the Modem Control register bit 1 (RTS).
Bit'5. Bit 5 is the compliment ofthe Data Set Ready (DSR) Input. If Bit 4 (loop) ofthe Modem Control register is
set to a logic 1, this bit is equivalent to the Modem Control register bit 0 (DTR).
Bit 6. Bit 6 is the compliment ofthe Ring Indicator (Fii) input. If Bit 4 (loop) ofthe Modem Control register is set
to a logic 1, this bit Is equivalent to the Modem Control registers bit 2 (OUT 1).
Bit 7. Bit 7 is the compliment of the Data Carrier Detect (DCD) input. If Bit 4 (loop) of the Modem Control
register is set to a logic 1, this bit is equivalent to the Modem Control registers bit 3 (OUT 2).

scratch register (SCR)
The Scratch register is an 8-bit register that is intended for the programmer's use as a "scratchpad," in the
sense that it will temporarily hold the programmer's data without affecting any other ACE operation.

programmable baud generator
The ACE contains a programmable baud generator that takes a clock Input in the range between dc an9
8 MHz and divides it by,a divisor in the range between 1 and 2 16 _1. The output frequency of the baud
generator is sixteen times (16 X) the baud rate. The formula for the divisor is:
divisor # = XIN frequency input + (desired baud rate X 16)
Two 8-bit registers, called divisor latches, are used to store the divisor in a 16-bit binary format. These divisor
latches must be loaded during initialization of the ACE in order to ensure desired operation of the baud
generator. When either of the divisor latches is loaded, a 16-bit baud counter is also loaded to prevent long
counts on initial load.
Tables 5 and 6, which follow, illustrate the use of the baud generator with crystal frequencies of 1.8432 MHz
and 3.072 MHz, respectively. For baud rates of 38.4 kllobits per second and below, the error obtained is very
small. The accuracy of the selected baud rate is dependent on the selected crystal frequency.
Refer to Figure 10 for examples of typical clock circuits.

FIFO interrupt-mode operation
When the receiver FIFO and receiver interrupts are enabled (FCRO = 1, IERO = 1) receiver interrupts will
occur as follows:
1. The Receive Data Available interrupt will be issued to the microprocessor when the FIFO has
reached its programmed trigger level. It will be cleared as soon as the FIFO drops below its
programmed trigger level.
2. The IIR Receive Data Available indication also occurs when the FIFO trigger level is reached, and, like
the interrupt, it is cleared when the FIFO drops below the trigger level.
3. The Receiver Line Status interrupt (IIR = 06), as before, has higher priority than the Received Data
Available (IIR = 04) interrupt.
4. The data ready bit (LSRO) is set as soon as a character is transferred from the shift register to the
receiver FIFO. It is reset when the FIFO is empty.
When receiver FIFO and receiver interrupts are enabled, receiver FIFO timeout interrupts will occur as follows:
1. FIFO timeout interrupt will occur if the following conditions exist:
a. At least one character is in the FIFO.
.
b. The most recent serial character received was longer than 4 continuous character times ago (if
2 stop bits are programmed, the second one is included in this time delay).

TEXAS ."

INSTRUMENlS
2-950

POST OFFICE BOX 655303 • DALLAS, TeXAS 75266

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
c. The most recent microprocessor read of the FIFO was longer than 4 continuous character
times ago.
This will cause a maximum character received to interrupt issued delay of 160 ms at 300 baud with a
12-bit character.
2. Character times are calculated by using the RCLK input for a clock signal (this makes the delay
proportional to the baud rate).
3. When a timeout interrupt has occurred, it is cleared and the timer reset when the microprocessor
reads one character from the receiver FIFO.
4. When a timeout interrupt has not occurred, the timeout timer is reset after a new character is received
or after the microprocessor reads the receiver FIFO.
When the transmit FIFO and transmitter interrupts are enabled (FCRO = 1, IER1 = 1), transmit interrupts will
occur as follows:
1. The Transmitter Holding Register interrupt (02) occurs when the transmit FIFO is empty. It is cleared
as soon as the Transmitter Holding Register is written to (1 to 16 characters may be written to the
transmit FIFO while servicing this interrupt) or the IIR is read.
2. The Transmit FIFO Empty indications will be delayed 1 character time minus the last stop bit time
when the following occurs: THRE = 1 and there have not been at least two bytes at the same time in
the transmit FIFO since the last THRE = 1. The first transmitter interrupt after changing FCRO will be
immediate, if it is enabled.
Character timeout and receiver FIFO trigger level interrupts have the same priority as the current Received
Data Available interrupt; Transmit FIFO Empty has the same priority as the current Transmitter Holding
Register Empty interrupt.

FIFO polled-mode operation
With FCRO = 1, resetting IERO, IER1, IER2, IER3, or all four to 0 puts the ACE in the FIFO Polled Mode of
operation. Since the receiver and transmitter are controlled separately, either one or both can be in the polled
mode of operation.
In this mode, the user program will check receiver and transmitter status via the LSR. As stated previously:
1. LSRO will be set as long as there is one byte in the receiver FIFO.
2. LSR1 through LSR4 will specify which error(s) have occurred. Character error status is handled the
same way as when in the interrupt mode, the IIR is not affected since IER2 = O.
3. LSR5 will indicate when the transmit FIFO is empty.
4. LSR6 will indicate that both the transmit FIFO and shift registers are empty.
5. LSR7 will indicate whether there are any errors in the receiver FIFO.
There is no trigger level reached or timeout conditions indicated in the FIFO Polled Mode. However. the
receiver and transmit FIFOs are still fully capable of holding characters.

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2-951

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION
TABLE 5. BAUD RATES USING A 1.8432·MHz CRYSTAL
DESIRED
BAUD RATE

DIVISOR USED
TO GENERATE
16 X CLOCK

50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
19200
38400
56000

2304
1536
1047
857
768
384
192
96
64
58
48
32
24
16
12
6
3
2

PERCENT ERROR
DIFFERENCE BETWEEN
DESIRED AND ACTUAL

0.026
0.058

0.69

2.86

TABLE 6. BAUD RATES USING A 3.072·MHz CRYSTAL
DESIRED
BAUD RATE

DIVISOR USED
TO GENERATE
16XCLOCK

50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
19200
38400

3840
2560
1745
1428
1280
640
320
160
107
96
80
53
40
27
20
10
5

TEXAS •
INSTRUMENTS
2-952

POST OFFICE'SOX 666303 • DALLAS. TEXAS 75265

PERCENT ERROR
DIFFERENCE BETWEEN
DESIRED AND ACTUAL

0.026
0.034

0.312

0.628
1.23

TL16C550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
PRINCIPLES OF OPERATION

DRIVER
EXTERNAL
CLOCK

OPTIONAL
CLOCK
OUTPUT

XIN

OPTIONAL
DRIVER

OSCILLATOR CLOCK
TO BAUD
GENERATOR
XOUTL-_____________________
LO_G_IC______~

VCC

n~

X1N

J

lC1
Rp

~

CRYSTAL

C::::!

RX2

l.C2

ur9

OSCILLATOR CLOCK
TO BAUD
GENERATOR
LOGIC

XOUT

I

TYPICAL CRYSTAL OSCILLATOR NETWORK
CRYSTAL

Rp

RX2

C1

C2

3.1 MHz
1.8 MHz

1 M!l
1 M!l

1.5 k!l
1.5 k!l

10-30 pF
10-30 pF

40-60 pF
40-60 pF

FIGURE 16. TYPICAL CLOCK CIRCUITS

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2-953

2-954

uA9636AC
DUAL LINE DRIVERS WITH ADJUSTABLE SLEW RATE
02608. OCT08ER 19BO-REVISED SEPTEMBER 1986

•

Meets EIA Standards RS-423-A and
RS-232-C and Federal Standard 1030

•

Slew Rate Control

•

Output Short-Circuit-Current Limiting

•

Wide Supply Voltage Range

•

8-Pin Package

•

Designed to Be Interchangeable With
Fairchild 9636A

D. JG. OR P PACKAGE
ITOPVIEWI

W-S[JB

1A
2A
GND

2
3
4

7
6
5

VCC+

1Y
2Y

VCC-

logic symbol t
W-S

description
The uA9636AC is a dual single-ended line driver
designed to meet EIA Standards RS-423-A and
RS-232-C and Federal Standard 1030. The slew
rates of both amplifiers are controlled by a single
external resistor, RWS, connected between the
wave-shape-control terminal and ground. Output
current limiting is provided. Inputs are
compatible with TTL and CMOS and are diodeprotected against negative transients. This
device operates from ± 12 V and is supplied in
an 8-pin package.

lY

lA
2A

2Y

t This symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

logic diagram

The uA9636AC is characterized for operation
from OOC to 70°C.

lA (2)

WAVE·SHAPE .:..(1:.:.)____....
CONTROL

2A (3)

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS

----....---f--- VCC +

VCC+--------e---------~--

CURRENT
SOURCE

INPUT
OUTPUT

--~"""""---VCC-

VCC-------~~-----------

Copyright © 1986, Texas Instruments Incorporated

PRODUCTION DATA documants contain information

~=nt :.:ttI!~~!~~tiO:.~8~h:r~~: c:rf0f:x!:
Instrumants staodarll warranty. Production
processing dus not RacesBaril, include testing of all

paramatars.

TEXAS •
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POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

2-955

uA9636AC
DUAL LINE DRIVERS WITH ADJUSTABLE SLEW RATE
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Positive supply voltage range, Vcc + (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . .. Vcc _ to 15 V
Negative supply voltage range, Vcc _ ......... " . . . . . . . . . . . . . . . . . . . . . . .. 0.5 V to -15 V
Output voltage., . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 1 5 V
Output current .... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 150 mA
Continuous total power dissipation (see Note 2) . , ......... '. . . . . .. See Dissipation Rating Table
Operating free-air temperature range ...................................... ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package ........... 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D and P packages ....... 260°C
NOTES: 1, All voltage values are with respect to the network ground terminal.
2. In the JG package, uA9636AC chips are glass mounted,
DISSIPATION RATING TABLE
PACKAGE

0
JG
P

TA - 25·C
POWER RATING
725 mW
825 mW
1000 mW

DERATING FACTOR
ABOVE TA - 2S·C
5.8 mW/·C
6,6 mW/oC

TA - 70·C
POWER RATING
464mW
528 mW

8.0 mW/oC

640mW

recommended operating conditions
MIN
10.8

Positive supply voltage, VCC +
Negatille supply voltage, VCCHigh-level input voltage, VIH
Low-level input voltage, VIL
Wave-shaping resistor.

-10.8
2

MAX
13.2
12
-12 -13.2

Rws

10
0

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

UNIT
V
V
V

0.8

Operating free-air temperature, TA

2-956

NOM

1000
70

V
kG

°c

uA9636AC
DUAL LINE DRIVERS WITH ADJUSTABLE SLEW RATE

electrical characteristics over recommended range of free-air temperature. supply voltage. and waveshaping resistance (unless otherwise noted)
PARAMETER
VIK
VOH

Input clamp voltage

High-level output voltage

Ii

=

VI

= 0.8

RL
RL

V

Low-level output voltage

VI

=

= 00
= 3 kfl to ground
= 450 fI to ground
= 00

RL
RL - 3 kfl to ground

2 V

RL

= 2.4 V
= 5.5 V
VI = 0.4 V
VCC± = 0,

= 450·fI to

-1.5

5

5.6

6
6
6
-5
-5
-4

ground

5

5.6

4

5.4

-6
-6
-6

-5.6

-5.7
-5.4

10
100

IlL

10

Low-level input current
Output current (power off)

lOS

Short-circuit output current+

ro

Output resistance

RL = 450 fI

Positive supply current

VCC = ±12 V,
RWS = 100 kfl,

VI = 0,
Output open

VCC = ±12V,

VI = 0,
Output open

Negative supply current

-1.1

VI

High-level input current

ICC-

MAX

VI

IIH

ICC+

Typt

(See Note 3)

-15 mA

RL
VOL

MIN

TEST CONDITIONS

-20
Vo

=

15
-15

VI = 0

RWS = 100 kll,

V
V

V

p.A
~A

±100

p.A

-40

150
-150

mA

25

50

Il

13

18

rnA

-13

-18

rnA

±6 V

VI = 2 V

-80

UNIT

25

tAli typical values are at VCC ±12 V, TA = 25°C.
tNot more than one output should be shorted to ground at a time.
NOTE 3: The algebraic convention, in which the less-positive (more-negative) limit is designated as minimum, is used in this data sheet
for logic voltage levels, e.g., when - 5 V is the maximum, the minimum is a more-negative Voltage.

switching characteristics. VCC± = 12 V. TA .. 25°C. see Figure 1
PARAMETER

TEST CONDITIONS
RWS = 10 kfl

tTLH

tTHL

Transition time. low-to-high-Ievel output

Transition time, high-to-Iow-Ievel output

RL = 450 fI,
CL = 30 pF

RWS = 100 kfl
RWS - 500 kfl

MIN

TYP

MAX

0.8

1.1

1.4

8
40·

11

14

55

70

RWS=lMIl

80

110

140

RWS = 10kfl

0.8

1.1

1.4

RL = 450 fI,

RWS - 100 kfl

8

11

14

CL=30pF

RWS = 500 kfl

40

55

70

Rws=lmfl

80

110

140

UNIT

p.s

~s

TEXAS . "

INSTRUMENlS
POST OFFICE BOX 855303 • DALLAS, TEXAS 75265

2-957

uA9636AC
DUAL LINE DRIVERS WITH ADJUSTABLE SLEW RATE
PARAMETER MEASUREMENT INFORMATION
VCC+
--3V

~

INPUT
Xl~--4t---4,--0UTPUT

INPUT-+--I

(See Note BI

OV
CL-30pF
(See Note AI

O%

OUTPUT

I
~
90%

I ' .10%

tTHL ~

VCC-

- - - VOH

1

I

_1- __ - - VOL

10%

-+I

~
I

I

~ tTLH
1

VOLTAGE WAVEFORMS

TEST CIRCUIT

NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: tr S 10 ns, tf S 10 ns, Zo = 50 0,
PRR S 1 kHz, duty cycle = 50%.

FIGURE 1. TRANSITION TIMES

TYPICAL CHARACTERISTICS
INPUT CURRENT
vs
INPUT VOLTAGE

OUTPUT VOLTAGE
vs
INPUT VOLTAGE
12

250
V6C±1 = '±d V
RWS - 100 kll
RL - 450 Il

10

>
I

QI

CI

-S'"

>

'5
S:::J
0

8

I

6

..
:;
..

150

:l

I

VCC±=±12V
RWS = 100 kll TA - ooC~
I
TA = 25°C-

100

TA

I:

!!!

4
TA - 70°C

2

u
TA

O
TA

I -2

0

>

200

=

25°C

-

= ooC

/"

0 r--r-'.

c.
..5 -50
.J,.-100
-150
-200

0.4

0.8
1.2
1.6
VI-Input Voltage-V

2

-250
-2 -1

-TA

= ooC

-TA

= 25°C
= 70°C

I
,./'TA

0

I

2345678
VI-Input Voltage-V

FIGURE 3

FIGURE 2

TEXAS . "

2-958

~

:::J

-6

o

~

70°C ,----.

50

-4

-8

=

INSTRUMENlS
POST OFFICE BOX 665303 • DALLAS, TEXAS 75265

uA9636AC
DUAL LINE DRIVERS WITH ADJUSTABLE SLEW RATE

TYPICAL CHARACTERISTICS
OUTPUT CURRENT
vs
OUTPUT VOLTAGE
(POWER OFF)

OUTPUT CURRENT
vs
OUTPUT VOLTAGE
(POWER ON)

50
40

«

30

...cI

20

E

~

100
V6C±I.I±1iv
RWS = 100 kn
TA = 25°C

1

1"<

"-

10

=

VI

...cI

2 V

~

:::I

:::I
(.)

... o
S. -10

(.)

...

20

0

So
-20
:::I

9 -20

r

9-30

=

VI

I
I

J

r

:::I

:::I

-40

T ., -'

80 VCC± = 0
VI = 0
60
TA = 25°C
40

oI -40
o

0

- -60

J

1

-80

-50
-10-8-6-4-20246810
VO-Output Voltage-V

I

-100
-10-8-6-420246810
VO-Output Voltage-V
FIGURE 5

FIGURE 4
TRANSITION TIMES
vs
WAVESHAPING RESISTANCE

1000
700
'"'I. 400

.,I
II>

E

TA

200

~

;.: 100
c
0

70

:e.,

40

f!

20

c

l-

I

....I

:t:

t"
:i:
....I
t"

1

70 0 (

/

/

10
7
4
2

= OOC//

/

/

0.01

0.04 0.1
0.4
4
10
RWS - Waveshaping Resistance- Mn
FIGURE 6

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. l'EXAS 75266,

2-959

uA9636AC
DUAL LINE DRIVERS WITH ADJUSTABLE SLEW RATE
APPLICATION INFORMAtiON
TWISTED PAIR

12 V

OR

FLAT CABLE

RWS

-12 V

FIGURE 7. RS-423-A SYSTEM APPLICATION

TEXAS . "

2-960

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75285

5V

uA9637AM, uA9637AC
DUAL DIFFERENTIAL LINE RECEIVER
02609, SEPTEMBER 1980-REVISED NOVEMBER 1986

uA9637M , , , JG PACKAGE
uA9637C , , , D, JG, OR P PACKAGE

•

Meets EIA Standards RS-422-A and
RS-423-A

•

Meets Federal Standards 1020 and 1030

•

Operates from Single 5-V Power Supply

•

Wide Common-Mode Voltage Range

•

High Input Impedance

•

TTL-Compatible Outputs

(TOP VIEW)

High-Speed Schottky Circuitry

•

a-Pin Dual-In-Line and "Small Outline"
Packages

•

2
3
4

7
6
6

llN21N+
21N-

logic symbol t

•

•

V C C [ ] 8 llN+

lOUT
20UT
GND

liN +
11N -

Similar to SN75157 except for Corner VCC
and Ground Pin Positions

21N+
21N-

Designed to Be Interchangeable with
Fairchild "A9637A

(8)
(7)

]

.01>
(2)

10UT

(6)
(3)

(5)

20UT

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12,

description

logic diagram

The uA9637 AC is a dual differential line receiver
designed to meet EIA standards RS-422-A and
RS-423-A and Federal Standards 1020 and
1030, It utilizes Schottky circuitry and has TTLcompatible outputs, The inputs are compatible
with either a single-ended or a differential-line
system, This device operates from a single 5-volt
power supply and is supplied in an 8-pin dual-inline package and small outline package,

1IN+~8)

.a

12) 10UT

11N- (7)

2IN+~6)
.a
(3) 20UT
21N- (5)

The uA9637AM is characterized over the full
military temperature range of - 55°C to 1 25°C,
The uA9637 AC is characterized for operation
from OOC to 70 oe,

schematics of inputs and outputs
TYPICAL OF ALL OUTPUTS

EQUIVALENT OF EACH INPUT

VCC

VCC

50n NOM

INPUT-. .-

_ _. . . .- - - I

OUTPUT

CURRENT
SOURCE

Copyright @ 1980, Texas Instruments Incorporated

PRODUCTION DATA documents contain

information current

88

of publication dat8.

Products conform to spacifications par the tarms
of Texas Instruments standard warrIng-.
Production processing does not Rec_Irily
include tasting of all p.rametars.

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TEXAS 75265

2-961

uA9637AM, uA9637AC
DUAL DIFFERENTIAL LINE RECEIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) ........................... :.......... -0.5 V to 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 15 V
Differential input voltage (see Note 2) ......................................... ± 1,5 V
Output voltage (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 5.5 V
Low-level output current ................................................... 50 mA
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 3):
D package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 725 mW
JG package: uA9637 AM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1050 mW
uA9637 AC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 825 mW
P package .............................................. : . . . . . . . .. 1000 mW
Operating free-air temperature range: uA9637 AM . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
uA9637 AC . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooC to 70°C
Storage temperature range ......................................... - 65°C to 150 DC
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package ........... 300 DC
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package. . . . . .. .. 260°C
NOTES: 1. All voltage values, except differential input voltage, are with respect to the network ground terminal.
2. Differential input voltage is measured at the noninverting input wit~ respect to the corresponding inverting input.
3. For operation above 25°C free-air temperature, derate linearly at the following rates: 5.8 mW/ °C for the D package, 8.4 mW/oC
for uA9637AM in the JG package, 6.6 mW/oC for uA9637AC in the JG package, and 8.0 mW/oC for the P package.

recommended operating conditions
uA9637AC

uA9637AM
Supply voltage, VCC

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25
±7

Common-mode input voltage, VIC

±7
-55

Operating free-air temperature, TA

125

70

0

UNIT
V
V
°c

electrical characteristics over recommended ranges of supply voltage. common-mode input voltage.
and operating free-air temperature (unless otherwise noted)
PARAMETER
VT

Threshold voltage (VT + and VT _ )

Vhys Hysteresis (VT + - VT _)
-VOH r1,gn:!eveT output voltage
Low-level output voltage
VOL
II

Input current

lOS

Short-circuit output current:l:

ICC

Supply current

TEST CONDITIONS

MIN Typt

MAX
See Note 4

-0.2
See Note 5

0.2

-0.4

0.4
70

lo--1mA
= 0.2 V,
= -0.2 V,
lo-20mA
VCC = 0 to 5.5 V, I VI = 10 V
See Note 6
IVI = -10V
Vo = 0,
VID = 0.2 V
No load
VID = -0.5 V,

VID

2.5

VID

V
0.5
3.25

-1.6-3.25
-40

-75 -100
35

V
mV

3.5
0.35
1.1

UNIT

50

V
rnA
rnA
rnA

tAli typical values are at VCC = 5 V, T A = 25 PC.
*Only one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
NOTES: 4. The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet
for threshold levels only.
5. The expanded threshold parameter is tested with a 500-1J resistor in series with each input.
.
6. The input not under test is grounded.

TEXAS ~

INSTRUMENTS
2-962

POSi OFFICE BOX 655303 • DAllAS. TEXAS 75265

uA9637AM, uA9637AC
DUAL DIFFERENTIAL LINE RECEIVER
switching characteristics. VCC - 5 V. TA "" 25°C

I

PARAMETER

I tpLH

I tpHL

Propagation delay time. low-to-high-Ievel output
Propagation delay time. high-to-Iow-Ievel output

I
I

I MIN
L

TEST CONDITION
CL = 30 pF.

See Figure 1

TYP

MAX

15
13

25
25

I

UNIT
ns
ns

I
I
I

PARAMETER MEASUREMENT INFORMATION
VCC+

OUTPUT

VCC+

+0.5 V- - - , . - - - - - _

INP~T
(so.
BI

392!l

Note
-O.SV

(see Nato Al

SO%

SO%t

I

.

I

.

14----! tpHL

~ tPLH

...Jl.

3.92 k!l

~I"'_ _ __

OUTP_U_T_ _

V

, . .\ \ ._ _ _ __

VOLTAGE WAVEFORM

TEST CIRCUIT

NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: tr
duty cycle = 50%.

~

5 ns, tf

~

5 ns, PRR .:5 5 MHz,

FIGURE 1. TRANSITION TIMES

TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE

OUTPUT VOLTAGE

vs

vs

DIFFERENTIAL INPUT VOLTAGE

DIFFERENTIAL INPUT VOLTAGE

4

4
Vc6=4J5 V
f-TA = 25°C

>I

.'"

3
VIC= 0

I

I

I

i

I

I

VIC= 0

I
I

I
I
I
I

VIC= ±7 V

0

:>

I

I
I

~

>
...

VCC= 5.25 V
TA = 25°C

2

S:>

: VIC = ±7 V
I
I
I

VIC= ±7 V:

:

0

J

VIC= ±7 V

~

I

VIC=O
I'
I

I
I

o
-100

-50

o

I

VIC=O I

I
I

!

I
I
I
I

I

!

I
50

100

o

-50

-100

o

50

100

VID-Differentiallnput Voltage-mV

VID-Differential Input Voltage-mV

FIGURE 3

FIGURE 2

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 75265

2-963

uA9637 AM. uA9637 AC
DUAL DIFFERENTIAL LINE RECEIVER

TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE

vs

HIGH-LEVEL OUTPUT CURRENT

LOW·LEVEL OUTPUT CURRENT

5.0

VCC = 5 V
VID = 0.2 VTA = 25°C

4.5

=j

..:g,
~
i

4.0
3.5

........

3.0

:I:

o
>

~

"-

'" "" I'\.

1.5

1.0

VID = -0.2 V
-TA=25°C

-10

/"

0.4

V
./

0.3

:;

!

..J

0.2

/

/

..J

00.1

o
o

-80

5

10

15

FIGURE 4

FIGURE 5
SUPPLY CURRENT

vs
SUPPLY VOLTAGE
100
Nolload I
90 r- I nputs open
80 r- TA = 25°C
~

E 70
I

'C

~ 60
u" 50

L

~

!:

L"/

40

V

30

/

20

V

10

o

,../V

o

2

3

4

5

6

VcC-Supply Voltage-V

FIGURE 6

TEXAS . . ,
INSTRUMENTS
2-964

20

25

30

35

IOl -low-level Output Current-rnA

IOH-High-Level Output Current-rnA

'f"u

V

>

'\.

-20 -30 -40 -50 -60 -70

Q.
Q.

/""

I

'\
o

VC~=5~

0.5

a;

'\

0.5

o

...
a-"
d

r-...

2.5
a;
>
j 2.0
.i:
I

=j

0.6

i

o"

i

LOW-LEVEL OUTPUT VOLTAGE

vs

POST OFFICE BOX 656303 • DALLAS. TEXAS 76266

7

8

40

uA9631AM, uA9631AC
DUAL DIFFERENTIAL LINE RECEIVER
TYPICAL APPLICATION DATA
+5V

TWISTED PAIR

+5 V

+5V

FIGURE 7. RS-422-A SYSTEM APPLICATIONS

TEXAS ."

INSTRUMENlS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-965

2-966

uA9638e

DUAL HIGH-SPEED DIFFERENTIAL LINE DRIVER
0261

•

OCTOBER 19BO-REVISED SEPTEMBER 1986

D. JG. OR P PACKAGE
(TOPVIEWI

Meets EIA Standard RS-422-A

VCC[]8

•

Operates From a Single S-V Supply

•

TTL-and CMOS-Input Compatibility

•

Output Short-Circuit Protection

•

Schottky Circuitry

•

Designed to Be interchangeable With
Fairchild 9638

1A
2A
GND

2
3
4

7
6
5

1Y
1Z
2Y
2Z

logic symbol t

description

f>

The uA9638C is a dual high-speed differential
line driver designed to meet EIA Standard
RS-422-A. The inputs are TTL- and CMOScompatible and have input clamp diodes.
Schottky-diode-clamped transistors are used to
minimize propagation delay time. This device
operates from a single S-V power supply and is
supplied in an 8-pin package.

(8) 1Y

1A (2)

1Z
2Y

2A (3)

2Z

logic diagram
8)1Y

~

The uA9638C is characterized for operation'
from ODC to 70 DC.

lA (2)

(7) 1Z

~

6)2V

2A (3)

(5) 2Z

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TVPICAL OF ALL OUTPUTS
--------~-----.----vcc

vcc--------------~----.-4kSlNOM

INPUT--~~Mr--~---t--_i

9.611 NOM
L -______- .__~----OUTPUT

t-------GND

PRODUCTION DATA d._ ... antl ••• t.i.
i.iannati.. ..rrant " .f publi_atl.. dall.
P...._ ..aflm IIlp1C1ficatillll por tile ....
of T._ IlIIIra..11111 IIIn'.nI warrllty.
P""'acti.. p......."" doN nat ......'lIy
incl••• taoti.g of 011 p.....-.s.

Copyright @ 1986. Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TeXAS 76266

2-967

uA963BC

DUAL HIGH·SPEED DIFFERENTIAL LINE DRIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC (see Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. OoC to 70°C
Storage temperature range .......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package ............ 300°C
Lead temperature 1,6 mm (1/16 inch) from 10 seconds: D and P package .............. 260°C
NOTES: 1. Voltage values except differential output voltages are with respect to network ground terminal.
2. In the JG package, uA9638C chips are glass mounted.
DISSIPATION RATING TABLE
PACKAGE
0
JG

P

TA - 25 D C
POWER RATING
725mW
825 mW
1000 mW

DERATING FACTOR
ABOVE TA - 25 D C
5.8 mW/oC
6.6 mw/oe
8.0 mw/"e

TA - 70'C
POWER RATING
464mW
528 mW
640mW

recommended operating conditions
MIN
4.75
2

Supply voltage, Vee
High-level input voltage, VIH
Low-level input voltage, VIL
High-level output current, IOH
Low-level output current, IOL
Operating free-air temperature, T A

0

TEXAS ~

2-968

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TEXAS 76285

NOM
5

MAX
5.25
0.8
-50
60
70

UNIT
V
V
V
mA
mA
"e

uA9638C
DUAL HIGH-SPEED DIFFERENTIAL LINE DRIVER
electrical characteristics over operating free-air temperature range (unless otherwise noted)

VOH

High-level output voltage

VOL

Low-level output voltage

I VODl I
I VOD21

Differential output voltage
Differential output voltage
Change in magnitude of*
differential output voltage
Common-mode output voltage 9
Change in magnitude of;
common-mode output voltage

AI

VOD

I

VOC

AI

VOC

I

VCC = 4.75 V,
VCC = 4.75 V,
VIL = 0.8 V
VCC = 4.75 V,
10L = 40 mA
Vec = 5.25 V,

II = -18mA
VIH = 2 V, IIOH = -10 mA
IIOH = -40mA
VIH = 2 V, VIL = 0.8 V,

2.5
2

MAX
-1.2

3.5

10 = 0

Vec = 4.15 V to 5.25 V, RL = 100

Output current with power off

VCC = 0,

II

Input current
High-level input current
Low-level input current
Short-circuit output current'
Supply current (all drivers)

VCC
VCC
Vec
VCC
Vec

=
=
=
-

n,

0.5

V

2VOD2

V
V

±0.4

V

3

V

±0.4

V

See Figure 1

I Va = 6 V
I Va = -:0.25 V
IVa = -0.25 V to 6 V

5.25
5.25
5.25
5.25
5.26

V,
V,
V,
V,
V,

VI = 5.5 V
VI - 2.7 V
VI = 0.5 V
Va = 0
No load,

All inputs at 0 V

UNIT
V
V

2

10

IIH
IlL
lOS
ICC

MIN TYpt
-1

TEST CONDITIONS

PARAMETER
Input clamp voltage

VIK

100
0.1
-0.1 -100
±loo
50
25
-200
-50
-150
46
65

pA
pA
pA
pA
mA
mA

tAli typical values are at Vce = 5 V and TA = 25 ·C.
*AI VOD I and AI VOC I are the changes in magnitude of VOD and Voe, respectively, that occur when the input is changed from a
high level to a low level.
§In EIA Standard R5-422-A, Vac, which is the average of the two output voltages with respect to ground, is called output offset voltage, Vas.
,Only one output at a time should be shorted and duration of the short circuit should not exceed one second.

switching characteristics,
too
lTD

Vee -

PARAMETER
Differential-output delay time
Differential-output transition time

Skew

5

V, TA -

25 0 e
TEST CONDITION

CL=15pF,
See Figure 2

RL = 100

MIN

n,

TYP
10
10
1

MAX
15
15

UNIT
ns
ns
ns

TEXAS ."

INSTRUMENTS
POST OFACE BOX 666303 • DAlLAS. TEXAS 76266

2-969

uA9638C

DUAL HIGH·SPEED DIFFERENTIAL LINE DRIVER
PARAMETER MEASUREMENT INFORMATION

t

INPUT

50n

VOO2

I

}oc

50n

FIGURE 1. DIFFERENTIAL AND COMMON·MODE OUTPUT VOLTAGES

INPUT

I
V OUTPUT

I
I

DIFFERENTIAL
OUTPUT

I

10%

GENERATOR
(See Note A)

ZOUTPUT
CL = 1S pF
(See Note B)

IsO%
=-t
,SO%

V OUTPUT
-----.
ZOUTPUT

TEST CIRCUITS

, . - - - - - " ' " ' \ - - - -VOH

it-Skew

50%1
',VOL

Skew...j

16-

sO%C:::

VOLTAGE WAVEFORMS

NOTES: A. The input pulse generator has the following characteristics: Zo
B. CL includes probe and jig capacitance.

= 50 0, PRR

FIGURE 2. SWITCHING TIMES

\ TEXAS'"

2-970

-~---OV

tDD....J..-.I

INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 15265

,,; 500 kHz, tw

= 100 ns, tr = ,,;

5 ns.

uA9639C
DUAL DIFFERENTIAL LINE RECEIVER
03009. OCTOBER 1986

•

D, JG, OR P PACKAGE

Meets EIA Standards RS-422-A and
RS-423-A

(TOP VIEW)

•

Meets Federal Standards 1020 and 1030

•

Operates from Single 5-V Power Supply

•

Wide Common-Mode Voltage Range

•

High Input Impedance

•

TTL-Compatible Outputs

•

High-Speed Schottky Circuitry

•

S-Pin Dual-In-Line and "Small Outline"
Packages

•

VCC[]B
10UT
2
7
20UT
3
6
GND
4
5

11N+
11N21N+
21N-

logic symbol t

lIN +
lIN21N+

Designed to be Interchangeable with
Fairchild f'A9639AC

21N-

(8)

]

(7)

lJ'C>
(2)

(6)

(3)

(5)

lOUT

20UT

t This symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEG Publication 617-12.

description
The uA9639C is a dual differential line receiver
designed to meet I;:IA standards RS.422-A and
RS-423-A and Federal Standards 1020 and
1030. It utilizes Schottky circuitry and has TTLcompatible outputs. The inputs are compatible
with either a single-ended or a differential-line
system. This device operates from a single 5-volt
power supply and is supplied in an 8-pin dual-inline package and "small outline" package.

logic diagram

The uA9639C is characterized for operation
from OOC to 70°C.

lIN+~8)
lJ'
12) 10UT
11N- 171

2IN+~6)
lJ'

13) 20LiT

21N- 15)

schematics of inputs and outputs
EOUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS

vcc

------------~----VCC

son NOM

8kn

INPUT ______~~--~~----~
OUTPUT

CURRENT
SOURCE

PRODUCTION DATA dooumonts oontoin information
currant IS of publication data. Praducts conform to

specifications plr the terms of TUI. Instruments

standard werreRtv. Production pracessing doal not
nacnsarily include testing of .11 parameters.

Copyright @ 1986, Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

2-971

uA9639C
DUAL DIFFERENTIAL LINE RECEIVER
absolute maximum ratings ·over operating free-air temperature range (unless otherwise noted)
Supply voitage, VCC (see Note 1) ...................................... - 0.5 V to 7 V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 15 V
Differential input voltage (see Note 2) ......................................... ± 15 V
Output voltage (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.5 V to 5.5 V
Low-level output current ................................................... 50 rnA
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 3):
D package. . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 725 mW
JG package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 825 mW
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1000 mW
Operating free-air temperature range ...................................... OOC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package . . . . . . . . . .. 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D and P package ....... 260°C
NOTES: 1. All voltage values, except differential input voltage, are with respect to the network ground terminal.
2. Differential input voltage is measured at the noninverting input with resp~ct to the corresponding inverting input.
3. For operation above 25·C free-air temperature, derate the D package to 464 mW at 70·C at the rate of 5.8 mW/·C, the
JG package to 528 mW at 70·C atthe rate of 6.6 mW/oC, and the P package to 640 mW at 70·C atthe rate of 8.0 mW/oC.

recommended operating conditions
Supply voltage, V CC

MIN

NOM

MAX

4.75

5

5.25

V

±7

v

70

·C

Common-mode input voltage, VIC
Operating free~air temperature

0

A

UNIT

electrical characteristics over recommended ranges of supply voltage. common-mode input voltage,
and operating free-air temperature (unless othewise noted)
PARAMETER

MIN TYP

TEST CONDITIONS

MAX

See Note 4

VT

Threshold voltage (VT + and VT _)

Vhys
VOH

Hysteresis (VT + - VT _)
High-level output voltage

VID - 0.2 V,

10 -

-1 mA

VOL

Low-level output voltage

VID -

10 -

20 mA

II

Input current

lOS

Short~circuit output current:t:

Vo = O.

ICC

Supply current

VID -

See Note 5

-0.2

0.2

-0.4

0.4
70

-0.2 V,

Vce - 0 to 5.5 V,

I VI

- 10 V

See Note 6

I VI

-

-0.5 V,

2.5

-40

V

0.35

0.5

1.1

3.25

-75 -100
35

V
mV

3.5

-1.6 -3.25

-10 V

VID = 0.2 V
No load

UNIT

50

V
mA
mA
mA

t All typical values are at VCC = 5 V, T A = 25 ·C.
::t:Onl y one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
NOTES: 4. The algebraiC convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet
for threshold levels only.
5. The expanded threshold parameter is tested with a 500-0 resistor in series with each input.
6. The input not under test is grounded.

switching characteristics. Vee .. 5 V. T A .. 0 °c to 70°C
PARAMETER

TEST CONDITION

tpLH

Propagation delay time, low-to-high-Ievel output

tpHL

Propagation delay time, high-to-Iow-Ievel output

CL = 30 pF,

See Figure 1

TEXAS . "
INSTRUMENTS
2-972

POST OFACE BOX 665303 • DALLAS. TeXAS 75265

MIN

MAX

UNIT

85

ns

85

ns

uA9639C
DUAL DIFFERENTIAL LINE RECEIVER
PARAMETER MEASUREMENT INFORMATION
Vcc+

Vcc+

OUTPUT

392

INPUT
51

I:O~~U~---5D%
50%

n

(S88 Note BI
-0.5 V

n

I

:
~tPLH

:
--~tpHL

I

(.... Not8 AI

I

---'r.. '",. .____

3.92 kn

OUTP_U_T_ _

VOL TAGE WAVEFORM

TEST CIRCUIT
NOTES: A. CL includes probe and jig capacitance.

B. The i!1put pulse is supplied by a generator having the folio wing characteristics: tr :::; 5 n5, tf ~ 5 n5, PAR

:$

5 MHz,

duty cycle = 50%.

FIGURE 1. TRANSITION TIMES

TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE.
vs
DIFFERENTIAL INPUT VOLTAGE

OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE

4

4

VC~ = 4J5 V

VCC= 5.25 V
TA=25·C
I
I

r-TA = 25·C

>I

.'"

I
I

~

.'"
S'"

0
I
0

>

I
I

I
VIC =±7 VI

I

.'"

I

~IC=~

I

I

:

o

0

I
I

VIC = ±7 V

I

2

!

~

VIC= ±7 V:

>

I
I
I

:
I

I

VIC=O

:

I

I
-50

I VIC=

0
I
0

I

I
I

I

"0

>

I

I

3

~

:VIC=±7V
I

I

o
-100

..'"

l

I

2

>I

I

VIC=O

I

"0

>

I

I

3

100

50

o

-50

-100

o

50

100

VID-Oifferentiallnput Voltage-mV

Vlo-Oifferential Input Voltage-mV

FIGURE 3

FIGURE 2

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 865303 • DALLAS. TEXAS 75286

2-973

uA9639C
DUAL DIFFERENTIAL LINE RECEIVER

TYPICAL CHARACTERISTICS
. LOW-LEVEL OUTPUT VOLTAGE

HIGH-LEVEL OUTPUT VQL TAGE

vs

vs

HIGH-LEVEL OUTPUT CURRENT

LOW-LEVEL OUTPUT CURRENT

5_0
4.5

=t:8.

0.6

VCC= 5 V
VID =0.2VTA=25°C

=t

4.0

f

:l

~ 3.5

!

3.0

o"

2.5

'"'" I'-.

Qj

>
~

2.0

.i:.

:i

1.5

I

~ 1.0
0.5

o

o

-10

~

...

'"

vdc= 5 1V
0.5 _ V,O = -~.2V
TA = 25 C

./'

0.4

V

::I

;
o

""

'"

"

..I

~ 0.2

'\.

./'

0.3

~

/"

V

I

..I

'\

-20 -30 -40 -50 -60 -70

o
o

-80

5

10

15

FIGURE 4

FIGURE 5
SUPPLY CURRENT

vs
SUPPLY VOLTAGE
100

I.

1

~~:~:~pen

90 c80 _ TA = 25°C
c:(

E 70

.!.c

~ 60

/

50

A/

ii

a. 40

::I

'1(J
!:i

/

30

/

20

/

10

o
o

.......-

/'

2

3

4

5

6

Vcc-Supply Voltage-V

FIGURE 6

. TEXAS •
INSTRUMENTS
2-974

20

25

30

35

IOL -Low-Level Output Current-rnA

'OH-High-Level Output Current-rnA

">-

,/'

~ 0.1

'\.

(J

~

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

78

40

uA9639C
DUAL DIFFERENTIAL LINE RECEIVER
TYPICAL APPLICATION DATA
+5V

+5V

TWISTED PAIR

+5V

FIGURE 7. RS-422-A SYSTEM APPLICATIONS

TEXAS

-If

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

2-975

2-976

Display Drivers

3-1

3-2

SN!i!i!iOOE
AC PLASMA DISPLAY DRIVER
02471, DECEMBER 19B4-REVISED MAY 1990

•
•

•

JD PACKAGE

Controls 32 Electrodes

(TOP VIEW)

100-V Totem-Pole Outputs

•

All Outputs Contain Sink and Source Clamp
Diodes

•
•
•
•

15 mA Steady-State Output Current

•

SO
DATA
ClK
101
102
103
104
105
106
107
108
201
202
203
204
205
206
207
208
GND

Low Stand-by Power Consumption

Rugged DMOS Outputs
CMOS Inputs
Dependable Texas Instruments Quality and
Reliability
Direct Replacement for SN55500D

description
The SN55500E is a monolithic BIDFETt
integrated circuit designed to perform the line
select operation of a matrix-addressable display.
The device inputs are diode-clamped CMOS
inputs.
The outputs of the driver are normally low and
can be selectively switched high when the strobe
input is low. Selection of the outputs is achieved
through the data, SO, and 51 inputs. The 8-bit
data stored internally in the serial register is
inverted and sent to one of four output sections
by the 2-line to 4-line decoder. All other outputs
remain low. Internal circuits provide a highcurrent pulse to the level-shifting circuit during
positive output transitions. When the output
transition is complete, the low steady-state
current reduces the circuits standby power
consumption. All outputs contain clamp diodes
to the VCC2 and GND supply inputs.
The SN55500E is characterized for operation
over the full military temperature range of
-55°C to 125°C.

VCC1
S1
STRB
401
402
403
404
405
406
407
408
301
302
303
304
305
306
307
308
VCC2
FD PACKAGE
(TOP VIEW)

~

><:;::

U

~

~

OU--'<{oUU~f--UO
~ZUOCJ)Z>CJ)CJ)Z-------~_f~

CMOS/PLASMA OISP

o

108
2-LlNE TO
4-LlNE
DECODER

SELECT {

(41 101

SI

1111 108
(121 20 \

DATA

101

201

208
301

Z5
Z6
Z7
Z8

Rl

(191 208
(291 301

1.13·

C>

8.13
1.14

C>
C>

(221 308
(371 401

8.14

C>

(301 408

ClK

R2
R3
8-BIT
R4
SHIFT
R5
REGISTER R6

308
401

R7
RB

40B

tThis symbol is in accordance with ANSIIIEEE Std 91-1984 and
lEe Publication 617-12.
Pin numbers shown are for the JD package.
FUNCTION TABLE

FUNCTION

LOAD

STROBE

H

=

DATA
H
L
X
X
X
X
X

high level, L

INPUTS
SELECT
CLK
81 80
X
X
t
X
X
t
X
X
X
H
L
L
H
L
H
H
H
L
H

= low level,

H
X

H

=

OUTPUTS
STRB

Rl
L
H

SHIFT REGISTER
R2
R3 ... R8

H
H
H
L
L
L

R1n
R1n
R1n
R1n

R1n
R1n
R2n
R2n
R2n
R2n

L

R1n

R2n

irrelevant, t

lQl ...
L ...
L ...
L ...
Rl ...
L ...
L ...
R3 n .. · R8 n
R3 n ... R8 n
L ...

R2h'" R7n
R2n ... R7 n
R3 n ... R8 n
R3 n · .. R8 n
R3n ... RBn

lQ8 2Ql ... 2Q8 3Ql ... 3Q8 4Ql ... 4Q8
L
L ... L
L ... L
L ... L
L
L ... L
L ... L
L ... L
L
L ... L
L ... L
L ... L
R8
L ... L
L ... L
L ... L
L ... L
L ... L
L
Rl ... R8
Rl ... R8
L
L ... L
L ... L
L
L ... L
L ... L
Rl ... R8

= low-to-high transition.

Rl •.. RS = levels currently at internal outputs of shift registers one through eight, respectively.

R1n ... R8 n = levels at outputs Rl through R8 respectively, before the most recent t transition of the clock.

typical operating sequence
STRB

-U

ClK
ANY OUTPUT IN

B ~~!~~E~IBY

R

R

--.I.--.L....------------tH~I.--'--....,.

TEXAS •
INSTRUMENTS
3-4

POST OFFICE BOX 656303 • DALlAS. TEXAS 75285

SN55500E
AC PLASMA DISPLAY DRIVER
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS

VCC1--------~----~_e---

INPUT ~'-'VVIr-'''''.

GND

GND ............- - - - - - - - - -.......---

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC1 (see Note 1) ........................................... 13.8 V
Supply voltage, VCC2 ...................................................... 100 V
Input voltage ....................................................... VCC1 +0.3 V
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 2) . . . . . .. 1825 mW
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
Storage temperature range ......................................... - 65°C to 150°C
Cas!;! temperature for 60 seconds: FD package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JD package ........... 300°C
NOTES: 1. Voltage values are with respect to network ground terminal.
2. For operation above 25°C free-air temperature, see Dissipation Rating Table.
DISSIPATION RATING TABLE
PACKAGE
FD
JD

POWER
RATING
1825 mW
1825 mW

DERATING

ABOVE

FACTOR
14.6 mW/oC
22 mW/oC

TA
25°C
67°C

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 855303. DALLAS. TEXAS 75285

3-5

SN55500E
AC PLASMA DISPLAY DRIVER
recommended operating conditions
MIN

NOM

MAX

UNIT

Supply voltage, VCCI

10.8

12

13.2

V

Supply voltage, VCC2

0

100

V

75%

High-level input voltage, VIH, as a percentage of VCCI
Low-level input voltage, VIL, as a percentage of VCel

25%

High-level output clamp current

20
-20

mA

8

MHz

. Low-level output clamp current
Clock frequency, fclock (see Figure 2)

0

Duration of high or low clock pulse, tw
Setup time, tsu

Hold time, th

ns

62

Data inputs before clockt

20

Select inputs before strobe.

50

Data inputs after clockt (see Note 3)

50

Strobe input high after clocki

50

Select inputs after strobet

50

ns

ns

-55

Operating free-air temperature, T A

mA

°c
125

Operating case temperature, T C

°c

NOTE 3: For operation above 25°C junction temperature, refer to Figure 2.

electrical characteristics over recommended operating temperature range (unless otherwise noted)
PARAMETER

VIK
VOH

VOL

TEST CONDITIONS

Input clamp voltage

VCCI = 12 V,

High-level output voltage

VCCI = 13.2 V,
VCC2 = 100 V

Low-level output voltage

VCCI = 13.2 V,
VCC2 = 100 V

MIN

92

94.5

10H = -15 mA
10L = 1 mA

90

93.5
0.85

2

2

4

IOL=15mA

2.75

5

10 = 20 mA

1
-1.2

-2.5

IIH

High-level input current

VI = VIH min
VCC2 = 100 V

Low-level input current

VCCI = 13.2 V,

ICC2

Supply current

VCC2 = 100 V

V

10L - 10.mA

10 = -20 mA

Supply current

V

10H = -10 mA

VCC2 = 0

ICCI

UNIT

-1.5

97.5

Output clamp voltage

IlL

MAX

-1
94

VOK

VCCI = 13.2 V,
VCCI - 13.2 V,

TYPt

II = -12 mA
10H = -1 mA

2.5
1

V

V
~A

-1

~A

0.05

1

mA

1

5

mA

VI - VIL max

t All typical values are at VCC = 12 V, TA = 25°C.

switching characteristics, VCC1 .. 12 V, VCC2
PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

250

ns

tDHL

Delay time, high-to-Iow-Ievel output from strobe input

tDLH

Delay time, low-to-high-Ievel output from strobe input

CL = 30 pF,

450

ns

tTHL

Transition time, high-to-Iow-Ievel output

See Figure 1

200

ns

tTLH

Transition time, Jow-to-high-Ievel output

300

ns

TEXAS

~

INSTRUMENTS
3-6

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN55500E
AC PLASMA DISPLAY DRIVER
PARAMETER MEASUREMENT INFORMATION
OUTPUT
UNDER
TEST

----1. . ---l'

TEST
POINT

CL (See Note AI

LOAD TEST CIRCUIT

CLK

\---------i --------- --------~~~%
1

• , - - - - - - - - - - - - - - - - - - - - VIL

~

.1

tw

~

tau

-+I+--

DATA --IR-RE-LE-V-A-N-T-----X

th

: VALID

---+:X~--I-RR-E-L-EV-A-N-T---

VIH

~-------- VIL

.
j..-th-t1

I~--VIH

'\

STRB

I~-----'I_th ~I

I+- tsu "'1

....

X

:
1

SELECT _ _ _ _ _ _ _ _ _ _.....J

-..j tDLH I+-

--.j

- - VIL

-pi

t=VIH
VIL

tDHL

I+-

9%0%'1
VALID 90% ~--- VOH
10
'--______
10% VOL

OUT

tTLH

-to! I+-

-.j

I+- tTHL

VOLTAGE WAVEFORMS
NOTE A. CL includes probe and jig capacitance.

FIGURE 1. SWITCHING CHARACTERISTICS

,If

TEXAS
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TeXAS 75266

3-7

SN55500E
AC PLASMA DISPLAY DRIVER
TYPICAL CHARACTERISTICS
MAXIMUM CLOCK FREQUENCY
vs
VIRTUAL JUNCTION TEMPERATURE
9

---

I'--r-..

Vee1 - 12 V
VIH - 12 V
VIL - 0
(See Note 4)

--I'--r---

3

25

45

65

85

105

T J-Junction Temperature-

125

De

NOTE 4: This curve assumes a symmetrical clock pulse.

FIGURE 2

. THERMAL INFORMATION
junction temperature formula
TJ = TA
TJ = IC

+
+

POR/JJA
POR/JJC

where
TJ = virtual junction temperature
T A = free-air temperature
Po = average device power dissipation
R/J = thermal resistance (junction-to-air, R/JJA, or junction-to-case, ROJC)

PACKAGE TYPE
FD 44-pin ceramic

R8JA
68 ·C/w

R8JC
20 ·C/w

JD 40-pin ceramic

45 ·C/W

12 ·e/W

TEXAS

3-8

'If

INSTRUMENlS
POST OFFICE BOX 665303 • DAllAS. TEXAS 715265

SN55501E
AC PLASMA DISPLAY DRIVER
02472, APRIL 1986-REVISED DECEM8ER 1989

J PACKAGE

•

Controls 32 Electrodes

•

100-V Totem-Pole Outputs

•

Low Stand-by Power Consumption

•

All Outputs Contain Sink and Source Clamp
Diodes

•

15-mA Steady-State Output Current

ITOPVIEWI

•

Rugged DMOS Outputs

•

CMOS Inputs

•

Direct Replacement for SN55501 C.
SN55501D

CLOCK
SUSTAIN
STROBE
01
02
03
04
05
06
07
OB
09
010
011
012
013
014
015
016
GND

description
The SN55501 E is a monolithic BIDFETt
integrated circuit designed to provide the serialto-parallel conversion and level translation of
data in a matrix-addressable display. This device
has diode-clamped CMOS inputs.
The Q outputs of these drivers are normally high
and can be switched either selectively or
together. Any output whose associated register
bit (in the internal 32-bit serial register) contains
switch low when STROBE is low if
a low
SUSTAIN is high. All other outputs remain high.
When SUSTAIN is switched low. all outputs
switch low independently of the data or strobe
inputs. This feature can be used to generate a
portion of the SUSTAIN pulse required in the
operation of an ac plasma display. The internal
level-shift circuits provide additional drive during
the times that the outputs switch high to
facilitate fast rise times while maintaining low
stand-by power consumption. All outputs
contain clamp diodes to the VCC2 and GND
supply inputs.

VCC1
DATA IN
SERIAL OUT
032
031
030
029
02B
027
026
025
024
023
022
021
020
019
018
017
VCC2

FD OR FJ PACKAGE

will

ITOPVIEWI

8

The SN55501 E is characterized for operation
over the full military temperature range of
-55°C to 125°C.

9

37

10

36

11

35

12

34

13

33

14

32

15

31

16

30

17

29
1819202122 232425262728

NC-No internal connection

tBIDFET -Bipolar. double·diffused. N·channel and P·channel MOS
transistors on same chip - patented process.

PRODUCTION DATA do.umenls contain information
currant a. of publication date. Products .onform to
speclficotions per the tarlll of T.III I••trum.nts

:=~i~·i~:I:ri

=::':r ~r=::~~~1

not

Copyright © 1989, Texas Instruments Incorporated

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75285

3-9

SN55501E
AC PLASMA DISPLAY DRIVER
functional block diagram (positive logic)

logic symbol t
CMOS!
PLASMA DISP

SUSTAIN

STROBE

-41>>------,

CLOCK

R'

a'

DATA IN

CLOCK (1)
DATA IN (39)

t>
t>

3
3

.

2
2

t>
t>

3
3

(19) 016
(22) 017

2
2

R2

(4) 01
IS) 02

2
2

02

R3

03

32·81T
STATIC
SHIFT
REGISTER

(36) 031
(37) 032
(38) SERIAL OUT

t> 3
t> 3

R30

R3'

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.
Pin numbers shown are for the J package.

031

"32

032

'------D--- SERIAL OUT

FUNCTION TABLE
INPUTS
FUNCTION

LOAD
STROBE
SUSTAIN

DATA

CLOCK

STROBE

SUSTAIN

H
L

1
1

H
H

X

X

X

H

H
L

X

X

X

SHIFT REGISTER

OUTPUTS
SERIAL

R1

R2

R3 ... R32

DATA

H
H

H
L

R1n
R1n

R2n···R31 n
R2n···R31 n

R32 n
R32 n

H
H
L

R1n
R1n
R1n

R2n
R2n

R3n···R32n
R3n···R32n
R3 n ···R32n

R32n
R32 n
R32 n

R2n

Q1

02

03 ..•. 032

H
H
H
R1

H
H
H
R2
L

H .... H
H .... H
H .... H
R3 .... R32
L .... L

L

H = high level, L = low level, X = irrelevant, 1 = low-to-high-Ievel transition.
R1 ... R32 = levels currently at internal outputs of shift registers one through thirty-two, respectively.
R1 n ... R32n = levels at shift-register outputs R1.through R32 respectively, before the most recent t transition at the CLOCK input.

TEXAS .."

3-10

INSTRUMENTS
POST OFFICE BOX 865303 • DALLAS. TEXAS 75285

SN55501E
AC PLASMA DISPLAY DRIVER
typical operating sequence
SUSTAIN

STROBE

I-----UILfUlJ
r' B

U

U

CLOCK

1L......-'RRElE----,VANT

B I

ANY Q OUTPUT

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL Q OUTPUTS

VCC1--------~----~-e---

-----_.~----_.--~--VCC2

TYPICAL SERIAL OUTPUT
------~--~.--VCC1

OUTPUT
INPUT -

OUTPUT

...-"11/1,-.......

------e-e~~----~-GND
GND~--------~--~

__---

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCCl (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
Supply voltage, VCC2 ...................................................... 100 V
Input voltage ....................................................... VCCl +0.3 V
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 55 DC to 125 DC
Storage temperature range ......................................... - 65 DC to 150 DC
Case temperature for 60 seconds: FD or FJ package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260 DC
Lead temperature 1,6 mm (1/16 inch) from case f9r 60 seconds: J package .. '.......... 300 DC
NOTE 1: All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
DERATING

DERATE
ABOVE TA

TA - 125°C
POWER RATING

1825 mW

FACTOR
14,6 mW/oC

25°C

365 mW

1825 mW

22,0 mW/oC

67°C

550 mW

PACKAGE

TA s 25°C
POWER RATING

FD or FJ
J

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 7528&

3-11

SN55501E
AC PLASMA DISPLAY DRIVER
recommended operating conditions
MIN

NOM

MAX

UNIT

Supply voltage, VCCl

10.8

12

13.2

V

Supply voltage, V CC2

0

100

V

High-level input voltage, VIH

0.75 VCel

Low-level input voltage, VIL

0.25 Veel
-20

Peak high-level Q output current, 10H

mA

Peak low-level Q output current, 10L

20

mA

High-level Q output clamp current, 10KH

20

mA

Low-level Q output clamp current, 10KL

-20

mA

8

MHz

Clock frequency, fclock, at or below, 25°C junction temperature (see Note 21

0

Duration of high or low clock pulse, tw

Setup time, tsu
Hold time, th

62

ns

Data inputs before CLOCKt

20

ns

Data hold time after ClOCKt

50

STROBE high after CLOCKt

150

STROBE high after SUSTAINt

250
-55

Operating free-air temperature, T A

ns
125

Operating case temperature, T C

°C

125

NOTE 2: See Figure 3 for maximum clock frequency when devices are operated in cascade or for operation above TJ

=

25 DC.

electrical characteristics over recommended operating temperature range
PARAMETER

VIK

High-level
VOH

IIH
IlL

VCCl

=

12 V,

VCCl

=
=

13.2 V,

VCC2

100V

SERIAL OUT

VCCl - 10.8 V,

Q outputs

VCCl
VCC2

=
=

100 V

SERIAL OUT

VeCl

=

10.8 V,

Q outputs

VCC2

=0

High-level

VCCl

input current

VCC2

Low-level

VCCl

input current

=
=
=
=

VCC2
100 V
VCCl - 13.2 V,

output voltage
Output clamp

VOK

Q outputs

output voltage

Low-level
VOL

TEST CONDITIONS

Input clamp voltage

voltage

ICCl

Supply current from VCCl

ICC2

Supply current from V CC2

VCCl
VCC2

=
=

13.2 V,

13.2 V,

II

MIN

=

12 mA
IIOH = -1 mA
IIOH = -10 mA

IIOL
10L

= -15 mA
= -100 p.A
= 1 mA
= 10 mA
= 15 mA
= 100 p.A

I 10K

- 20 mA

I 10K
VIH

=
=

VIHmin,

VIL

=

VILmax,

IIOH
IOH
IIOL
IIOL

-20 mA

-1
94

97.5

92
90

94.5

9

10

13.2 V,

VCC2 - 100 V~

13.2 V,

I Outputs low

100 V

I Outputs high

. TEXAS-II
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

MAX
-1.5

0.85

2

2

4

2.75

5

0.1
1

1
2.5

-1.2

-2.5

0.05

,

0.1

UNIT

V

V

93.5

100 V

tTypical values are at VCC' = 12 V, TA = 25°C.
tMeasure with inputs at VCCl and again with inputs at GND .

3-1.2

Typt

V

V

1

p.A

-1

p.A

,
1

5

mA
mA

SN55501E
AC PLASMA DISPLAY DRIVER
switching characteristics, VCC1

12 V, VCC2 '" 100 V, TA - 25°C

PARAMETER
Delay time,
tDHL

tDLH

TEST CONDITIONS

MIN

TYP

MAX

UNIT

STROBE to Q outputs

CL - 30 pF

high-to-Iow-

SUSTAIN to a outputs

CL

=

30 pF

-~
250

level outputs

CLOCK to SERIAL OUT

CL

=

20 pF

147

Delay time,

STROBE to a outputs

CL

450

SUSTAIN to a outputs

CL

30 pF

450

level outputs

CLOCK to SERIAL OUT

CL

=
=
=
=

30 pF

low-to-high-

20 pF

147

CL
30 pF
CL = 30 pF

200

ns

300

ns

tTHL

Transition time, high-to-Iow-Ievel Q output

tTLH

Transition time, low-to-high-Ievel Q output

ns

ns

PARAMETER MEASUREMENT INFORMATION
OUTPUT
UNDER
TEST

--:1--'--~ CL

TEST
POINT

ISee Note AI

LOAD TEST CIRCUIT

DATA _____
'R_R_E_LE_V_A_N_T____

--'~

- - - - - - V,H
)1(, . . -IRRELEVANT

VALID

~~

Isu ~

..

Ih---~~I

V,L

1~~---------------- V,H
-,-50%
'1..1
VIL
~I"
IDHL~
-------------~----~
VOH
~
WAVEFORM 1 ISee Note BI
SERIAL
I
I VOL
OUT
~tDLH-----+I _ _ _ _ _ _ _ _ _ _ __
~
VOH
WAVEFORM 2 ISee Note CI
/50%
VOL
CLOCK

I
It---- Ih----..l

,I

V,H

~O%

STROBE

/,50%

I.---Ih----+l'-----J I
I
I
I

7

50 %
-----ID-LJH.J..--.i

SUSTAIN

an WAVEFORM

1-~(s':"e-e-:N':"o-te-:'D!.1~=>L-

V,L
V,H

I

I
IDHL1t---+!

IDLH*----+I

I ~"'90"'%""'-

I

"1"o=:::"'---~10%

V,L
VOH
VOL

~ /4-ITLH

an WAVEFORM 2 ISee Nole EI

~~--------------~-VOH

VOL
NOTES: A.
B.
C.
D.
E.

CL includes probe and jig capacitance.
Serial out waveform for internal conditions such that a low is registered in R32.
Serial out waveform for internal conditions such that a high is registered in R32.
On output with a low stored in associated register Rn.
Q n output with a high stored in associated register Rn.
VOLTAGE WAVEFORMS

FIGURE 1. SWITCHING CHARACTERISTICS

TEXAS ",

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

3-13

SN55501E
AC PLASMA DISPLAY DRIVER
RECOMMENDED OPERATING CONDITIONS
MAXIMUM CLOCK FREQUENCY
vs
JUNCTION TEMPERATURE

10
9

I
>
u
c

8

:E

".,.:::J

7

......

6

.2

5

!

u

()

E
E

:::J

3

...Iu

2

:E

I---

-

S/NGL

'j'

~

E OEVICE

.........- ~\,,(\\\"

8

1---1--

>

7

"

6

I

I---~

Ol

CASCAOEOO~

-- ---

9

~II

4

..

'j(

-.;;;

10

VCC1-12V
VIH = VCC1
VIL - 0
(SYMMETRICAL CLOCK PULSE)

N

l:

INPUT VOLTAGE LOGIC LEVEL LIMITS
vs
VCC1 SUPPLY VOLTAGE

.ll!0

>
:;Q.

I--- I--

..5

5
4

3

-

VILma"

2

0

~

o
25

50

75

o

10

125

100

11

12

TJ-Junction Temperature- °C

FIGURE 3

FIGURE 2

THERMAL CHARACTERISTICS
junction temperature formula
TJ = TA

+

PORO

where
TJ = virtual junction temperature
T A = free-air temperature
Po = average device power dissipation
RO = thermal resistance (junction-to-air, ROJA, or junction-to-case, ROJCI

PACKAGE
FD or FJ
J

RaJA
68°C/W
45°C/W

R9JC
20°C/W
12°C/W

TEXAS ."

3-,14

13

VCC1-Supply Voltage-V

INSTRUMENTS
POST OFFICE BOX 866303 • DALLAS. TEXAS 75285

14

SN55551. SN55552
ELECTROLUMINESCENT ROW DRIVER
02743, APRIL 1986

SN55551 ..• FD PACKAGE
(TOP VIEW)

•

Each Device Drives 32 Electrocles

•

High-Voltage Open-Drain DMOS Outputs

•

50-mA Output Current Capability

•

CMOS-Compatible Inputs

•

Very Low Steady-State Power Consumption

~omOO"'tCL!)"d"MN"""

NN ................. ,......- ....................

00000000000
6 5 4 3 2 1 4443424140

Q22
Q23

39
38
37
10

description

36
35
34

11
12

The SN55551 and SN55552 are monolithic
BIDFETt integrated circuits designed to drive the
row electrodes of an electroluminescent display,
All inputs are CMOS-compatible and all outputs
are high-voltage open-drain DMOS transistors,
The SN55552 output sequence has been
reversed from the SN55551 for ease in printed
circuit board layout,

13
14
15
16
17

The devices consist of a 32-bit shift register, 32
AND gates, and 32 output OR gates. Typically,
a composite row drive signal is externally
generated by a high-voltage switching circuit and
applied to the Substrate Common terminal. Serial
data is entered into the shift register on the highto-low transition of the clock input. A high Enable
input allows those outputs with a high in their
associated register to be turned on causing the
corresponding row to be connected to the
composite row drive signal. When the Strobe
input is low, all output transistors are turned on.
The Serial Data output from the shift register
may be used to cascade additional devices. This
output is not affected by the Enable or Strobe
inputs.

Q6

The SN55551 and SN55552 are characterized
for operation over the full military temperature
range of - 55 DC to 125 DC.

33
32
31
30
29
1819202122232425262728

Q5
Q4
Q3
Q2
Ql

NC

SN55552 ... FD PACKAGE
(TOP VIEW)
NMoe:tLOCO 1'00

mo .....

N

....................................... NNN

00000000000
6 5 4 3 2 14443424140
39
38
37
10
1.1
12

36
35
34

Q5
Q4
Q3
Q2

13
14

33
32

15
16

30

Q·l

17

Q7

31
29
1819202122232425262728

NC - No internal connection

t BIDFET

-

Bipolar, double-diffused, N-channel and P-channel MOS transistors on same chip -

PRODUCTION DATA documonls eont.in inlorm.tion
• urront •• 01 publication d.to. Produ.1s conform to
.pacilleatlons par tho torm. 01 T•••• In.trumont.
=~~.I~:I~li ~!."ll:;ti:; :rlo::~:~~:::,~. not

patented process.

Copyright © 1986, Texas Instruments Incorporated

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 76266

3-15

SN55551, SN55552
ELECTROLUMINESCENT ROW DRIVER
logic symbols t
SN55551

SN55552

CMOS/EL DISP

CMOSIEL DISP

IQ SOURCE SUPPLY]

DATA IN 1281

lD

2.3
2.3

2.3
2.3

2.3
2.3

IQ SOURCE SUPPLYI

I>
I>

Q
Q

1301 Ql

I>
I>

Q
Q

1441

I>
I>

Q
Q

1161

DATA IN 1281

lD

2.3

1311 Q2

2.3

Q~5

2.3

111 Q16

2.3

Q~l

2.3

1171 032
(181 SERIAL OUT

2.3

I>
I>

Q
Q

I>
I>

Q
Q

I>
I>

~

Q

1171 Ql
1161 Q2

111Q~7
144I Q18

.

1311Q~1
1301 Q32
1181 SERIAL OUT

tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and lEe Publication 617-12. The symbol
open-drain output.

0

here indicates an n-channel

logic diagram (positive logic)
SUBSTRATE __________________________________________--,
COMMON
STROBE--------------------~

ENABLE-----------------,

1---+--01

DATA IN-------1
CLOCK ---------- SERIAL OUT

TEXAS •
INSTRUMENTS
3-16

POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

SN55551, SN55552
ELECTROL.UMINESCENT ROW DRIVER

FUNCTION TABLE
CONTROL INPUTS
FUNCTION
CLOCK ENABLE
LOAD
ENABLE
STROBE

OUTPUTS

SHIFT REGISTERS
R1 THRU R32

STROBE

Q1 THRU Q32

SERIAL

Load and Shift t

R32

Determined by Enable and Strobe

X

No Change

H

As determined above

R32
R32

All Q outputs off

H

H

Determined by R1 through R32

L

As determined above
As determined above

R32

X

R32

All Q outputs on

!

X

X

No. !

X

X

L

X
X

Determined by Enable and Strobe

H = high level, L = low level, X = irrelevant, ! = high-to-Iow transition.
tRegister R32 takes on the state of R31. R3l takes on the state of R30, ... R2 takes on the state of Rl, and Rl takes on the state of
the data input.

typical operating sequence

U U_____________ _
..In---- ----- --- ----- -.

VIH

CLOCK

SUBSTRATE COMMON
VIH

DATA IN _ _ _ _

--'n. ___.n ----------

SN55551 ENABLE _ _ _ _ _

....In..__-.ln -------

SN55552 ENABLE _ _ _ _ _ _ _ _

STROBE

l ..__--'

I

COMPOSITE ROW

SUBSTRATE COMMON
VIH
SUBSTRATE COMMON
VIH
SUBSTRATE COMMON
+HV

... IL
-1[-- =

DRIVE APPLIED TO
SUBSTRATE COMMON

OV

OUTPUT

SN55551
Q1 OUTPUT

I

SUBSTRATE COMMON
VIH

~
~

:~~

- -

FLOATS

14

OUTPUT FLOATS

_:

------------------~

+HV

SN55552

OUTPUT FLOATS

Q10UTPUT

SN55551
Q2 OUTPUT

SN55552

::

11
11

~U:::Tvoltage

---- OUTPUT FLOATS

-- -

- - - - - - - -HV
rI--+HV

U______-_I ____L

L!f4~~~~~~:::!-~1

OUTPUT FLOATS

OUTPUT

OUTPUT FLOATS

~
_________

.!14~=~~~~~===~-t!..,

-HV

--+HV

FLOATS

-HV

NOTE: During operation Clock, Data In, Enable, and Strobe are referenced to the Composite Row Drive signal received at the Substrate
Common pin of the device.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 75285

3-17

SN55551, SN55552
ELECTROLUMINESCENT ROW DRIVER
schematic of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF All Q OUTPUTS

TYPICAL OF SERIAL OUTPUT

.------<11-- OUTPUT

VCC-------.-----.-.--

VCC

...--+- OUTPUT

INPUT_.....vv.........

SUBSTRATE~~_ _ _~~~. .

_ _ _.-~..._ ..._SUBSTRATE
COMMON

COMMON

~_---

TEXAS . "

INSTRUMENTS
3-24

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55553, SN55554
ELECTROLUMINESCENT COLUMN DRIVERS
FUNCTION TABLE
CONTROL INPUTS
FUNCTION

lOAP
LATCH
OUTPUT
ENABLE

LATCH

OUTPUT

CLOCK

ENABLE

ENABLE

i
Noi

X
X

X
X
X
X

l

X
X
X
X

H

X
X

SHIFT REGISTER

LATCHES

R1 THRU R32

LC1 THRU LC32

SERIAL

OUTPUTS

load and shift t

Determined by

R32

Determined by

No change
As determined above

latch Enable
Stored data

R32
R32

Determined by

*

Q1 THRU Q32

Output Enable

As determined above

New data

R32

Output Enable

l

As determined above

Determined by

R32

All l

H

As determined above

latch Enable

R32

LC 1 thru lC32, respectively

*

H = high level, l = low level, X = irrelevant, t = low-to-high-Ievel transition.
tR32 and the serial output take on the state of R31, R31 takes on the state of R30, ... R2 takes on the state of R1, and R1 takes
on the state of the data input.
*New data enter the latches while Latch Enable is high. These data are stored while latch Enable is low.

typical operating sequence

unununUnL •••

CLOCK - - ,

muuuu
IRRELEVANT

VALID

DATA IN

L -__________________
__
INVALID
VALID
SR CONTENTS ______________________

-----'_____....-

GND

t _ - -....-

OUTPUT

---~....-e~-'t--GND

TEXAS •
INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TeXAS 75285

3-25

SN55553. SN55554
ELECTROLUMINESCENT COLUMN DRIVERS
absolute maximum ratings over operating temperature range (unless otherwise noted)
Supply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 18 V
Supply voltage, VCC2 .............................. ;........................ 70 V
Input voltage ..................................................... VCC1 + 0.3 V
Ground current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 700 mA
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 2) . . . . . .. 1825 mW
Minimum operating free-air temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 55°C
Operating case temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 125°C
Storage temperature range ......................................... - 65°C to 150°C
Case temperature for 60 seconds. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
NOTES: 1. Voltage values are with respect to network ground terminal.
2. For operation above 25°C free-air temperature, derate linearly at the rate of 14.6 mW/oC.

recommended operating conditions
VCC1

Supply voltage

VCC2
VIH
Vil
10H

Supply voltage

10l
10K

MIN
10.8

NOM

MAX

UNIT

12

13.2

V
V

0

High-level input voltage

60

O. 75VCC
-0.3

Low-level input voltage

High·level output current

-15

Low-level output current

15

VCC+O.3
O.25VCC

rnA
rnA

Peak output clamp diode current

=

fclock
twlClKI
twlLEI
tsu
th

Clock frequency, TA

TA
TC

Ope;rating free-air temperature

±20
6.25

25°C

Clock pulse duration, high or low; TA = 25°C
Latch enable pulse duration, TA = 25°C
Setup time, data valid before clockt, TA
Hold time. data valid after clock t, TA

=

=

rnA
MHz
ns

80
80
20

25°C

25°C

V

ns
ns

110
-55

Operating case temperature

125

electrical characteristics over recommended operating temperature range, VCC1 - 12 V.
VCC2 - 60 V
TEST CONDITIONS

PARAMETER

10

Serial output
Q outputs

10
10

Serial output

10 - 100"Po
VI = 12 V

High-level output voltage

Val

Low-level output voltage

IIH
III

High-level input current (see Note 3)
low-level input current (see Note 3)

ICC1

Supply current, VCC1

ICC2

Supply current, VCC2

=
=
=

Q outputs

VOH

VI

=

-15mA
-100"Po
15 rnA

MIN
55
10

0

Outputs low

TEXAS •
INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 75265

UNIT
V

10
1.5
5
-5

7
Outputs high

NOTE 3: IIH and IlL parameter performances are independent .of VCC2 and need not be 60 V for this test.

3-26

MAX

20
2

V
"Po
"Po
rnA
rnA

SN55553, SN55554
ELECTROLUMINESCENT COLUMN DRIVERS
switching characteristics. VCC1 - 12 V. VCC2 - 60 V. TC .. 25°C
PARAMETER

TEST CONDITIONS

tdLH

Delay time. clockt to serialt

tdHL

Delay time. clockt to

tdLH

Delay time. LE to Q outputt

tdHL

Delay time. LE to Q

CL

serial~

MIN

= 45 pF to ground.

See Figures 1 and 2
CL

output~

= 45 pF to ground.

See Figures 1 and 3

MAX

UNIT

200
200
1000
500

ns
ns
ns
ns

PARAMETER MEASUREMENT INFORMATION
OUTPUT

---::t
...---

TEST POINT

~CL - 45pF

FIGURE 1. OUTPUT LOAD CIRCUIT
1f1·----twcLKl---......

CLOCK~

50%1

kjf===~tw:;I~CL~K;;_1==:::;.~I.I---th____!
/4-t.u~
I

-----'""""'j({:,...--~----""\'Vr------VIH

..J"",- - - - - - - V I L

50% "IK\._ _ _-+'_V_A_Ll_D_ _ _ _

DATA IN

I
\f---tdHL--"'~
:JL,.- - - - - - - V O H

SERIAL OUT WAVEFORM 1
ISee Not. Al

SERIAL OUT WAVEFORM 2

~~~

'\.90%
\....----VOL
t . - - - t d L H - -.....
~

I

---------------------..,.;/1.:.~~-

VOH
-----VOL

FIGURE 2. VOLTAGE WAVEFORMS FOR SERIAL OUTPUT
,...._ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ VIH

...JI ____________________

OUTPUT ENABLE _ _ _ _ _

LATCH ENABLE

~
.1'

_ _ _ _ _ _ _ _ _ _ _ _ _ _-..J.

If

..

-

-

-

VIL

- - VIH
VIL

twlLEI

I+--IdLH-----I

VOH

a OUTPUT IS•• Not. CI ________________-:-___
I
.....'1/
*...!o~ ___ VOL

,
I

Q

OUTPUT IS•• Not. 01

~O%---VOH

/

-------'

j4--tdHL----.!

VOL

FIGURE 3. VOLTAGE WAVEFORMS FOR Q OUTPUTS
NOTES: A.
B.
C.
D.

Waveform 1 is for internal conditions such that a low is clocked into R32.
Waveform 2 is for internal conditions such that a high is clocked into R32.
To measure 'dLH. initially a low is stored in the latch and a high is stored in the shift register.
To measure 'dHL. initially a high is stored In the latch and a low is stored in the shift register.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TeXAS 75285

3-27

3-28

SN55563A, SN55564A
ELECTROLUMINESCENT ROW DRIVERS
03313, OCTOBER 1989

SN55563A ... FJ PACKAGE

•

Each Device Drives 34 Electrodes

•

Selectable Open-Source or Open-Drain
Output

tTOP VIEW)
~O

.......... CJ)CX)f"'.COInq-MN_

00000000000

•

Outputs Rated at 225 V

•

Output Current Capability:
-90 mA to 150 mA

•

CMOS-Compatible Inputs

•

Very Low Steady-State Power Consumption

6

description
The SN55563A and SN55564A are monolithic
BIDFETt integrated circuits designed to drive the
row electrodes of an electroluminescent display.
All inputs are CMOS compatible. If the Positive
Write input is high, the Q outputs act like opensource outputs and output data is not inverted
with respect to input data. If the Positive Write
input is low, the Q outputs act like open-drain
outputs and output data is inverted with respect
to input data. The SN55564A output sequence
has been reversed from the SN55563A for ease
in printed circuit board layout.

012
013
014
015
016
017
01B
019
021
022

5 4 3 2

39
38
37
36
35
34
33
32
31
30
29

VCC3
VCC2
DATA IN
POSITIVE WRITE

39
38
37
36
35
34
33
32

VCC3
VCC2
DATA IN
POSITIVE WRITE

11

12
13
14
15
16
17

VCC1
N/C
VSS
CLOCK
ENABLE
SERIAL OUT
034

1819202122 232425262728
Mq-I.O

10

2.3~

2.30

t>

···

t>

2,3Q

···

2.30
2.3~

t>

n

t>

2.30
2.3Q

2.30

(40)

(41)

::l

111)

::l
2.3Q

···

DATA

n

2.30

t>

···

[0 DRAIN SUPPLY]

VCC2

[Q SOURCE SUPPLY]

(31)

(32)

CMOS/EL OISP

CMOS/EL DISP
[0 DRAIN SUPPLY]

:::-J

::l
2.3Q

01

IN

137)

[Q SOURCE SUPPLY]

"

EN310UTPUT ENABLEl
EN210UTPUT SELECT]
SRG34
ClI-

.,

r-

t>

10

t>

02

···
(12)

016
017

033

*These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

3-30

···
t>
t>

1291 Q34
(30) SERIAL
OUT

TEXAS

t>
t>

···
(28)

···

..If

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 75285

2.30

::::1

129)

:::-1
2.3Q

128)

2.30
2.30

2.30

::l

112)

::::1
2.30

111)

2,30
2.30

tl
tl
2,30
2,30
2.3Q

2.30

141)
140)

01
02

018
019

033

034

130) SERIAL
OUT

SN55563A, SN55564A
ELECTROLUMINESCENT ROW DRIVERS
logic diagram (positive logic)
VcC2----------------------------------------------------~
PO~~:~~

__________________....______...:...______--,

r--I-+--oL...I

.....+-------- 01

ENABLE

OATA IN

--------------1

CLOCK

.....4-------- 02

·•• .••

••
•

·•• .••

••

31 STAGES
103 THRU 0331
NOT SHOWN

VSS~

'-------------------1

":>------------------ SERIAL OUT

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL Q OUTPUTS

SERIAL OUTPUT

,..------------- V CC3
~CC1--------~-----e--~--

~--VCC2

........+-OUTPUT
INPUT - -.....JV."'-.........

_--_----.J--;U*"-4-----

VCC1

}--OO~m
--~~

Vss--~--------...~-4~--

--e-~~------~~-Vss

-----~-e-~~~--------VSS

TEXAS ."

INSTRUMENlS
POST OFFICE BOX 655303 • OALLAS, TEXAS 75265

3-31

SN55563A, SN55564A
ELECTROLUMINESCENT ROW DRIVERS
typical operating sequence

u. .------U - - - - - - - - - - - Vss
VIH

CLOCK
DATA IN

---11- - - - - - - - - - - - - - - - - - - - -

-VIH

Vss
-----VIH

ENABLE

~-----Vss

POSITIVE WRITE CYCLE-

PO~~II~~
and

.-1 ________________________

~~~~

/

\

/

\

-

-

-

-

::S

- - - ::S::M GND

VSS----------------------------------------------SYSTEMGND
FIRST
OUTPUT

/

\

- - - - - - - - - - - - - - - :Y:::MGND

------I
SECOND
OUTPUT

/

_ _- - - - - - J

NEGATIVE WRITE CYCLE
POSITIVE.,--- WRITE

-

-- -

- - - - - - - - - - -----VIH

•

VSS

VCC2

~~

VSS

FIRST
OUTPUT

SECOND
OUTPUT

~

\ /
\ /

\

/

SYSTEM GND
_ _ _ _ _ _ -HVt
SYSTEM GND

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ -HVt

\ /

SYSTEM GND
_ _ _ _ _ _ -HVt

t HV

= high voltage
tVselect is a voltage level between VCC2 of the column driver and VSS.

TEXAS .."

INSTRUMENlS
3-32

~

POST OFFICE BOX 655303 • DALLAS. TEXAS 76285

SN55563A. SN55564A
ELECTROLUMINESCENT ROW DRIVERS
absolute maximum ratings over operating free-air temperture range (unless otherwise noted)
Supply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
Supply voltage, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 230 V
Supply voltage, VCC3 ...................................................... 230 V
Supply voltage, VSS ..................................................... - 230 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.3 V to VCC1 + 0.3 V
Continuous total power dissipation at (or below) 25°C free-air temperature
(see Note 2) ....................................................... " 1825 mW
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
Storage temperature range ......................................... - 65°C to 150°C
Case temperature for 10 seconds. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
NOTES: 1. Voltage values are with respect to VSS.
2. For operation above 25°C free-air temperature. derate 365 mW at 125°C at the rate of 14.6 mW/oC.

recommended operating conditions (see Figure 1 and Figure 2)
MIN

NOM

MAX

UNIT

Supply voltage, VCCI

10.8

12

13.2

V

Supply voltage. VCC2

VCC3-15
0

VCC3
225

V

-225

V

VCCI +0.3

V

0.25VCCI
-90

mA

Supply voltage. VCC3
Supply voltage, VSS

0

High-level input voltage, VIH

0.75VCCI
-0.3

Low-level input voltage, VIL t
High-level output current, IOH
Low-level output current, IOL

150

Output clamp current, 10K

Clock frequency. fclock

V

V
mA

±150

mA

1

MHz

Pulse duration, Clock high or low, twCLK

125

ns

Setup time. data high or low before clock., tsu 1

100

ns

Setup time, Clock low before VCC2t or VSSL tsu2

300~

ns

Setup time. Enable high before VCC2t or VSS •• tsu3

300~

ns

'Setup time, Positive Write high or low before VCC2t or VssL tsu4

300~

ns

Hold time, data high or low after clock •• th 1

100

ns

Hold time. Clock high after VCC2. or vsst, th2

300*

ns

Hold tima, Enable high after VCC2. or vsst, th3

0*

ns

Hold time, Positive Write after VCC2. or vsst, th4

O~

ns

12*

~s

Hold time, Enable low between successive VCC2t, th5
Hold time. Enable low between successive VSS •• th6

300*
-55

Operating free-air temperature, T A

ns
125

°C

trhe algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for logic

voltage levels only.
:t:These minimum recommendations are not tested during manufacturing. Performance is dependent on application voltage and temperature

and must be validated by the user.

TEXAS .."

INSTRUMENlS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

3-33

SN55563A, SN55564A
ELECTROLUMINESCENT ROW DRIVERS
electrical characteristics over recommended operating ranges of VCC1 and free-air temperature range.
VCC2 "" 225 V. VCC3 = 225 V. VSS = 0 (unless otherwise noted)
PARAMETER

10(off)

High-level
VOH

VOL

TEST CONDITIONS

Off-state Q output current

output voltage

Q outputs

Va = 0
10 = -70 rnA.
10 = -90 mAo
10 = -100~.

Low-level

Serial Out
Q outputs

10 = 150 rnA

output voltage

Serial Out

10=100~A

IIH

High-level input current

IlL

Low-level input current

ICCl

Supply current from

Veel

MIN

Va = 225 V
VCCl = 12 V
VCCl = 12 V
VCCl = 12 V

Supply current from VCC3;

UNIT

150
-150

~A

VCC2- 4O
VCC2- 45
10.5

V
30
1
100

VIH = VCCl
VIL = 0
One Q output high

-100
4

All Q outputs low or high impedance

2

One Q output high. VCCl = 12 V
ICC3

MAX

All Q outputs low or high impedance.
VCCl = 12 V

V
~A
~A

rnA

10

rnA

200

~A

MAX

UNIT

400

ns

400

ns

switching characteristics over recommended operating range of V CC 1. T A = 25°C
PARAMETER

TEST CONDITIONS

Propagation delay time. low-to-high
tPLH
tpHL

level serial output from clock

CL = 50 pF to VSS.
See Figures 3 and 4

Propagation delay time. high-to-Iow
level serial output from clock

;ICC3 is measured with VCC2 and VCC3 shorted together.

PARAMETER MEASUREMENT INFORMATION

FIGURE 1. INPUT TIMING VOLTAGE WAVEFORMS

TEXAS .."

3-34

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 76265

MIN

SN55563A, SN55564A
ELECTROLUMINESCENT ROW DRIVERS
PARAMETER MEASUREMENT INFORMATION

tTiming waveforms are with respect to VCC2 or VSS. as iilPpropriate.

FIGURE 2. CONTROL INPUT TIMING VOLTAGE WAVEFORMS

- - - --- VIH

---f7~--""

\0%

CLOCK

I'------J

I

\,,·----Vll
I+-tpHL ....

I4-lplH-.I

I

,----------iH

.....11'0%

DATA OUT _ _ _ _

~

...
VOL

FIGURE 3. VOLTAGE WAVEFORMS FOR PROPAGATION DELAY TIMES. CLOCK TO DATA OUT
OUTPUT
UNDER
TEST

-----r. .
."'-1'"

TEST
------POINT

tel includes probe and jig capacitance.

FIGURE 4. LOAD CIRCUIT

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 865303 • DALLAS. TEXAS 7&286

3·35

3-36

SN65500E, SN15500E
AC PLASMA DISPLAY DRIVERS
02471, DECEMBER 1985-REVISED JULY 1989

•

Controls 32 Electrodes

•

100-V Totem-Pole Outputs

•

Low Stand-by Power Consumption

•

All Outputs Contain Sink end Source Clamp
Diodes

N PACKAGE
(TOP VIEW)

•

15-mA Steady-State Output Current

•

Rugged DMOS Outputs

•

CMOS Inputs

•

Direct Replacement for SN75500A

50
DATA
ClK
101
102
103
104
105
106
107
lOB
201
202
203
204
205
206
207
208
GND

description
The SN65500E and SN75500E are monolithic
BIDFETt integrated circuits designed to perform
the line select operation of a matrix-addressable
display. The device inputs are diode-clamped
CMOS inputs.
The outputs of these drivers are normally low
and can be selectively switched high when the
strobe input is low. Selection of the outputs is
achieved through the data, SO, and S1 inputs.
The 8-bit data stored internally in the serial
register is inverted and sent to one of four output
sections by the 2-line to 4-line decoder. All other
outputs remain low. Internal circuits provide a
high-current pulse to the level-shifting circuit
during positive output transitions. When the
output transition is complete, the low steadystate current reduces the circuit's standby power
consumption. All outputs contain clamp diodes
to the VCC2 and GND supply inputs.
The SN65500E is characterized for operation
from -40°C to 85°C. The SN75500E is
characterized for operation from OOC to 70°C.

VeCl
51
5TRB
401
402
403
404
405
406
407
408
301
302
303
304
305
306
307,
308
VeC2
FN PACKAGE
(TOP VIEW)
<{

III

dU:l~oU
t3~:=Ud
~ZUO(J)z>(J)(J)Z-------~~r_,

CMOS/PLASMA DISP

r

SELECT
(4) 101

Z2
Z3
Z4
Z5
Z6
Z7
Z8

8.111.12

8.12
1.13

201

208

DATA

112) 201

301
(19) 208

t>
t>

ClK

129) 301

1.14

t>
t>

(22) 308

8.14

t>

130) 408

8.13

108
2-LlNE TO
4-LlNE
DECODER

Sl

(11) 108

t>
t>

101

Rl
R2
R3
R4
8-BIT
SHIFT
R5
REGISTER R6

308

401

R7
R8

137) 401

408

tThis symbol is in accordance with ANSI/IEEE Std 91-19S4 and
lEG Publication 617-12.
Pin numbers shown are for the N package.
FUNCTION TABLE
INPUTS
FUNCTION

LOAO

STROSE

OUTPUTS

SELECT

STRB

SHIFT REGISTER

DATA

CLK

Sl

SO

Rl

R2

R3 ... R8

H

X

X

H

L

R1n

R2n ... R7 n

L ... L

L ... L

L ... L

L

t
t

X

X

H

H

R1n

L ... L

L ... L

L ... L

X

X

X

X

H

R1n

R2n

L ... L

L ... L

L ... L

L ... L

X

H

L

L

L

R1n

R2n

R2n ... R7 n
R3n .. · RS n
R3 n ... RS n

Rl ... RS

L ... L

L ... L

L ... L

X

H

L

H

L

R1n

R2n

R3 n ... RS n

L ... L

R1 ... RS

L ... L

L ... L

X

H

H

L

L

R1n

R2n

L ... L

L ... L

X

H

H

H

L

R1n

R2n

R3 n ... RS n
R3 n ... RS n

L ... L

L ... L

R1 ... RS
L ... L

R1 ... RS

lQl ... 1Q8 2Ql ... 2Q8 3Ql ... 3Q8 4Ql ._. 4Q8
L ... L
L ... L

L ... L

H = high level. L = low level. X = irrelevant. t = low-to-high transition.
R1 ... RS = levels currently at internal outputs of shift registers one through eight, respectively.
R1 n ... RS n = levels at shift-register outouts R1 through RS. respectively. before the most recent t transition of the clock.

TEXAS , . ,
INSTRUMENTS
3-38

POST OFFICE BOX 855303 • DALLAS, TEXAS 75285

SN65500E, SN75500E
AC PLASMA DISPLAY DRIVFRS
typical operating sequence

STRB

-U

ClK

RVAlID

RVALID

ANY OUTPUT IN
8 SELECTED BY - -...
-......
SO AND 51

------------tH)-.....--......- -

schematics of inputs and outputs
EaUIVAlENT OF EACH INPUT

TYPICAL OF All OUTPUTS

VCC1--------~----~_e-

INPUT -

...J\I\,..............

GND~~----------

__4--

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
Supply voltage, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 100 V
Input voltage ....................................................... VCC1 +0.3 V
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN65500E.......................... - 40°C to 85 °C
SN75500E ............................ OOC to 70°C
Storage temperature ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package ............ 260°C
Case temperature for 10 seconds: FN package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
NOTE 1: Voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
PACKAGE

TA :s 2S·C

DERATING FACTOR

POWER RATING

FN

1775 mW

ABOVE TA - 2S·C
14.2 mW/oC

N

1275 mW

10.2 mW/oC

TA - 70·C
POWER RATING

TA - 8S·C
POWER RATING

1136mW

923 mW

816mW

663 mW

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

3-39

SN655DDE, SN755DDE
AC PLASMA DISPLAY DRIVERS
recommended operating conditions
MIN
Supply voltage, VCC1

10.8

Supply voltage, VCC2

0
75%

High-level input voltage, VIH, as a percentage of VCC1
Low-level input voltage, VIL, as a percentage of VCC1
High-level output clamp current

SN65500E
NOM MAX
12

100

Clock frequency, fclock (see Figure 2)
Duration of high or low clock pulse, tw

Hold time, th

0
62
20

Data inputs before clockt
Select inputs before strobe.
Data inputs after clockt (see Note 2)
Strobe input high after clockt
Select inputs after strobet

-

Operating free-air temperature, T A

0
75%

25%
20
-20

Low-level output clamp current

Setup time, tsu

13.2

SN75500E
MIN NOM MAX
10.8
12
13.2

8

0
62
20

50
50
50

50
50
50

50
-40

50
85

UNIT
V

100

V

25%
20
-20

mA
mA

8

MHz
ns
ns

ns
70

0

°C

NOTE 2: For operation above 25°C junction temperature, refer to Figure 2.

electrical characteristics over recommended operating free-air temperature range
PARAMETER
VIK

TEST CONDITIONS

Input clamp voltage

VOH High-level output voltage

VCC1

=

12 V,

VCC1

=
=

13.2 V,
100 V

VCC2

=
=

100 V

VCC2

=0

VeC2

VOL

Low-level output voltage

VOK Output clamp voltage
IIH

High-level input current

IlL

Low-level input current

ICC1 Supply current
ICC2 Supply current
tAli typical values are at VeC1

VCC1

13.2 V,

MIN

II = -12 mA
10H - -1 mA
10H = -10 mA
10H = -15 mA
10L - 1 mA

SN65500E
TYpt MAX
-1

94
92
90

= 10mA
10L = 15 mA
10 = 20 mA
10 = -20 mA

97.5
94.5
93.5
0.85
2
2.75
1
-1.2

10L

VCC1 - 13.2 V,
VCC1 = 13.2 V,

VI - VIH min

VCC1 = 13.2 V,
VCC2 - 100 V

VCC2

VI

=

95
93
91
2

97.5
94.5
93.5
0.85

2

4

2

4

5
2.5
-2.5

2.75
1
-1.2

5
2.5
-2.5

1
-1

VIL max

=

-1.5

SN75500E
TYpt MAX
-1
-1.5

MIN

0.05

100 V

1

0.05
1

V
V

1
-1

1
5

UNIT

1
3

V

V

p,A
p,A
mA
mA

= 12 V, TA = 25°C.

switching characteristics, VCC1 - 12 V, VCC2 - 100 V, TA ... 25°C
PARAMETER
tDHL Delay time, high-to-Iow-Ievel output from strobe input
tDLH Delay time, low·to-high-Ievel output from strobe input
tTHL Transition time, high-to-Iow-Ievel output

TEST CONDITIONS
CL = 30 pF,
See Figure 1

tTLH Transition time, low-to-high-Ievel output

TEXAS

3-40

..If

INSlRUMENlS
POST OFFtCE BOX 856303 • DALLAS. TEXAS 75265

MIN

MAX
250
450
200
300

UNIT
ns
ns
ns
ns

SN65500t SN15500E
AC PLASMA DISPLAY DRIVERS

----rJ. .

PARAMETER MEASUREMENT INFORMATION
OUTPUT
UNDER
TEST

TEST

----POINT
CL (see Note AI

LOAD TEST CIRCUIT

CLK

\ _________ j ____ _____________

·1--------- ------ ----- VIL

I

I.-I

.1

tw

t+-

tsu

--.I+-

DATA --IR-RE-L-EV-A-N-T-----j(

th - - - . :

: VALID

j4-th
STRB

X"'--IR-R-E-LE-V-AN-T--- VIH
' - - - - - - - - - - VIL

--.l

~'---------J,( ____ ::
~ th +I

I+- tsu -+!

SELECT

V~~%

--------------X

:

-.j tDLH I+-

-.j

t=VIH

tDHL

I+-

VIL

VALID 90% ~---- VOH
'--______
10% VOL

9%0%'1
10

OUT

trLH

--I

~

~ ~ trHL

VOLTAGE WAVEFORMS
NOTE A. CL includes probe and jig capacitance.

FIGURE 1. SWITCHING CHARACTERISTICS

TEXAS •
INSTRUMENTS
POST OFFICE SOX 856303 • DALLAS, TeXAS 75265

3-41

SN65500E, SN75500E
AC PLASMA DISPLAY DRIVERS
TYPICAL CHARACTERISTICS
MAXIMUM CLOCK FREQUENCY
vs
VIRTUAL JUNCTION TEMPERATURE
9

-..............

r--

--

VCC1 - 12 V
VIH - 12 V
VIL - 0

(Seo Note Al

I--.I--.-

3
25

65

45

85

105

125

TJ-Junction Temperaturo- °C
NOTE A: This curve assumes a symmetrical clock pulse.

FIGURE 2

THERMAL INFORMATION
junction temperature formula
TJ = TA
TJ

+ PDROJA

= TC +

PDROJC

where
TJ = virtual junction temperature
T A = free-air temperature
PD = average device power dissipation
RO = thermal resistance (junction-to-air, ROJA, or junction-to-case, ROJCI

PACKAGE TYPE
FN 44-pin plastic

ReJA
70 0 CfW

ReJC
22°C/W

N 40-pin plastic

97°C/W

27°C/W

TEXAS •
3-42

INSTRUMENTS
POST OFFICE SOX 655303 • DALLAS. TEXAS 75265

SN65501t SN75501E
AC PLASMA DISPLAY DRIVERS
02472, MARCH 1983-REVISEO OCTOBER 1989

•

N PACKAGE
(TOP VIEW)

Controls 32 Electrodes

•

100-V Totem-Pole Outputs

•

Low Standby Power Consumption

•

All Outputs Contain Sink and Source Clamp
Diodes

•

15-mA Steady-State Output Current

•

Rugged DMOS Outputs

•

CMOS Inputs

•

Direct Replacement for SN75501 C

CLOCK
SUSTAIN
STROBE
Ql
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Ql0
Ql1
Q12
Q13
Q14
015
Q16

description
The SN65501 E and SN75501 E are monolithic
BIDFETt integrated circuits designed to provide
the serial-to-parallel conversion and level
translation of data in a matrix-addressable
display. The device inputs are diode-clamped
CMOS inputs,
The Q outputs of these drivers are normally high
and can be switched either selectively or
together. Any output whose associated register
bit (in the internal 32-bit serial register) contains
a low will switch low when STROBE is low if
SUSTAIN is high. All other outputs remain high.
When SUSTAIN is low, all outputs switch low
independently of the data or strobe inputs. This
feature can be used to generate a portion of the
sustain pulse required in the operation of an ac
plasma display. The internal level-shift circuits
provide additional drive during the times that the
outputs switch high to facilitate fast rise times
while maintaining low standby power
consumption. All outputs contain clamp diodes
to the VCC2 and GND supply inputs,
The SN65501 E is characterized for operation
over the temperature range of - 40°C to 85 °C.
The SN75501 E is characterized for operation
over the temperature range of O°C to 70°C.

VCCl
DATA IN
SERIAL OUT
Q32
Q31
Q30
Q29
Q28
Q27
Q26
Q25
Q24
Q23
Q22
Q21
Q20
Q19
Q18
Q17

GND~_ _..r- VCC2

FN PACKAGE
(TOP VIEW)

6 5 432 1 4443424140

Qll

7
8
9
10
11
12
13
14
15
16
17

39
38
37
36
35
34
33
32
31
30
29
1819202122232425262728
C"').q-Ln<.OOU

NI"COmo

CiCiCiCi13

t3CiCiCieJ

Z

Q3l
Q30
Q29
Q28
Q27
Q26
025
Q24
Q23
Q22
Q2l

>

NC-No internal connection

t B(OFET _ Bipolar, double-diffused, N-channel and P-channel MOS transistors on same chip - patented process

PRODUCTION DATA do.uments .ontein informetion
•urrant as of publi.atlon dal!l. Praducte .o.form to
specification. par tha term. of Ta.e. Instruma...
=~I~·r.':t'::li =~~i:; :rl.:::~:;~~ .ot

Copyright © 1989. Texas Instruments Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 851)303 • DALLAS. TEXAS 75265

3-43

SN65501~

SN75501E

AC PLASMA DISPLAY DRIVERS
logic symbol t

functional block diagram (positive logic)
CMOSI
PLASMA DISP

SUSTAIN (2)
STROBE (3)

SUSTAIN

-11>---------,

STROBE

EN3
V2

CLOCK
DATA IN

CLOCK (1)
DATA IN (39)

··•

2
2

2
2

2
2

(4) 01
(5) 02

I>
I>

3
3

I>
I>

3
3

(19) 016
(22) 017

I>
I>

3
3

(36) 031
(37) 032
(38) SERIAL OUT

··•
. ·

32·BIT
STATIC
SHIFT
REGISTER

t This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the N package.

1-------1:>-- SERIAL OUT
FUNCTION TABLE
INPUTS
FUNCTION

LOAD
STROBE
SUSTAIN

OUTPUTS
R2

R3 ••• R32

DATA

Q1

Q2

H

H

R1n

R2n ... R31 n

R32 n

H

H

H

H

L

R1n

R32 n

H

H

H .•. H

H

H

R1n

R2n

R32 n

H

H

H ... H

H

L

H

R1n

R2n

R2n· .. R31 n
R3 n ... R32 n
R3 n ... R32 n

R32 n

R1

R2

R3 ... R32

X

X

L

R1n

R2n

R3 n .•. R32 n

R32 n

L

L

CLOCK

STROBE

SUSTAIN

H

t
t

H

X

X
X
X

SERIAL

R1

DATA

L

SHIFT REGISTER

Q3 ••• Q32
H ... H

L ..• L

H = high level, L = low level, X = irrelevant, t = low-to-high-Ievel transition.
R1 ... R32 = levels currently at internal outputs of shift registers one through thirty-two, respectively.
R1n ... R32 n = levels at shift-register outputs R1 through R32 respectively, before the most recent t transition at the CLOCK input.

TEXAS . . ,
INSTRUMENTS
3-44

POST OFFICE BOX 866303 • DALlAS, TEXAS 75265

SN65501t SN75501E
AC PLASMA DISPLAY DRIVERS

typical operating sequence
SUSTAIN

I~

STROBEU

CLOCK

ANY Q OUTPUT

UI'---- ILJUlJ
B I
r
B
IRRELE----IVANT

J

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL Q OUTPUTS

TYPICAL SERIAL OUTPUT

VCC1--------~----~_e~

INPUT_....'W............

GND~__----------~~--

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
Supply voltage, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 100 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. VCC1 to 0.3 V
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range, T A: SN65501 E ...................... - 40°C to 85 °C
SN75501E ......................... OOCto 70°C
Storage temperature range ......................................... - 65°C to 150°C
Case temperature for 10 seconds: FN package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package ............ 260°C
NOTE 1: All voltage values are with respect to network ground terminal.

DISSIPATION RATING TABLE
DERATING FACTOR

PACKAGE

TA s 25°C
POWER RATING

FN

1775 mW

ABOVE TA - 25°C
14.2 mW/oC

N

1275 mW

10.2 mW/oC

TA - 70°C
POWER RATING

TA - B50C
POWER RATING

1136 mW

923 mW

816 mW

663 mW

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3-45

SN65501E. SN75501E
AC PLASMA DISPLAY DRIVERS
recommended operating conditions
MIN

NOM

MAX

UNIT

Supply voltage, VCCl

10.8

12

13.2

V

Supply voltage, VCC2

0

100

V

High-level input voltage, VIH

V

0.75 Veel

Low-level input voltage, VIL

a output clamp current, IOKH
Low-level a output clamp current, IOKL

High-level

0

Clock frequency, fclock' at or below, 25°C junction temperature (see Note 2)

Hold time, th

Data inputs before CLOCK!

20

Data inputs after CLOCK!

50

STROBE high after CLOCK!

150

STROBE high after SUSTAIN!

250

Operating free-air temperature, T A

I

8

mA
mA
MHz

62

Duration of high or low clock pulse, tw
Setup time, tsu

V

0.25 Veel
20
-20

ns
ns
ns

SN65501E

-40

85

I SN75501E

0

70

NOTE 2: See Figure 3 for maximum clock frequency when devices are operated in cascade or for operation above T J = 25

°C

ac.

electrical characteristics over recommended operating free-air temperature range
PARAMETER
VIK

Input clamp voltage
High-level

VOH

Low-level
VOL

a outputs

output voltage

IIH
IlL

voltage

VCCl = 13.2

v,lI

VCC2=100V

SN65501E
Typt
MAX
-1

11-12 mA

-1.5

SN75501E
Typt
MAX
-1

IOH=-l mA

94

97.5

95

97.5

IOH=-10mA

92

94.5

93

94.5

IOH- -15 mA

90

93.5

91

93.5

IOH= -100~

9

10

9

10

-1.5

I IOL=l mA
VCC1=13.2V'IIOL=10mA

0.85

2

0.85

2

2

4

2

4

VCC2=100 V

I IOL=15 mA

2.75

5

2.75

5

IOL=100 ~A

0.1

1

0.1

1

I

IOK-20 mA

I

IOK= -20 mA

1
-1.2

2.5
-2.5

1
-1.2

2.5
-2.5

a output

,VCCl = 10.8 V,
VCC2=0

High-level

VCCl =13.2 V,

VIH=VIHmin,

input current

Low-level

VCC2=100V
VCCl = 13.2 V,

VIL = VILmax,

input current

VCC2=100V

ICC2 Supply current from VCC2

VCCl =13.2 V,
VCC2=100 V

UNIT
V

V

a outputs

ICCl Supply current from VCC1

V

V

1

1

~A

-1

-1

~A

0.05

1

0.05

1

mA

1

5

1

3

rnA

VCC2=100 V

tTypical values are at VCCl =12 V, TA=2~oC.

TEXAS . "

INSTRUMENTS
3-46

MIN

VCCl =10.8 V,

output voltage
Output clamp

VCCl-12 V,

MIN

SERIAL OUT

SERIAL OUT
VOK

TEST CONDITIONS

POST OFRCE BOX 666303 • DALLAS, TEXAS 75285

SN65501E, SN75501E
AC PLASMA DISPLAY DRIVERS

switching characteristics, VCC1

12 V, VCC2

100 V, TA

PARAMETER

CL

level outputs
Delay time,

CLOCK to SERIAL OUT

CL

low-to-high-

SUSTAIN to

CL

level outputs

CLOCK to SERIAL OUT

CL

STROBE to

high-to-Iow-

tOHL

tDLH

TEST CONDITIONS

a outputs
SUSTAIN to a outputs

Delay time,

STROBE to

CL

a outputs
a outputs

=
=
=

CL =

=
=

tTHL

Transition time, high-to-Iow-Ievel Q output

CL =

tTLH

Transition time, low-to-high-Ievel Q output

CL

=

30
30
20
30
30
20
30
30

MIN

TYP

MAX

250
250
147
450
450
147
200
300

pF
pF
pF
pF
pF
pF
pF
pF

UNIT
ns

ns
ns
ns

PARAMETER MEASUREMENT INFORMATION
OUTPUT
UNDER
TEST

I

TEST
POINT

'::t'
CL
"::' (See Note AI

LOAD TEST CIRCUIT

DATA

=v,.-------

V

VIH
IRRELEVANT
/1\...._---,_ _
VALID
A.
IRRELEVANT
_ _ _ _ _ _ _ _. J
_ _ _ _. J ....- - - - - - - - - VIL

tsu-il~I---.~M~---th---+l~1

50 %
1r.=,.....-----------------

CLOCK

.

~~

t DHL _

_I

-------------------------.------~,,50%
I
I -----------------------~~~

I
/50%
. .
It--- th ---.I

WAVEFORM 2 (See Note CI

STROBE

.J£,------

~

~-

- -

-

. I
tOLH-jof----+!

Q n WAVEFORM 1 (See Note DJ

~:- -

--+I :"tTHL
---------;,j",.~

On WAVEFORM 2 (See Note EI
NOTES:

A.
B.
C.
D.
E.

~- -

0

----

-.: I.tTLH

VIL

I

~H

I..
~I
tDLH,.....-----"

tDHL~

- - - - ;-prc-10 Vu
c

..

8

"

7

...u

6

r:r

!
IL
.5!
u

5

E

4

"E
co
:e
I
oj(

...u

----

vs

-- --

VCC1 SUPPLY VOLTAGE

10

VCC1 = 12 V
VIH - VCC1
VIL - 0
ISYMMEjRICAL CLOCK PULSEI

9

_f-- ~\"",\(\

8

------sr

>

~
CASCAD

.ll!'"
0

'IVG~E~ _ _

..
I

EDD~ _ _

>
~

0.

.E

3

7
6
5
4

-

3
2

2

"ILmalt

-

.2

.u

o
25

o
50

75

100

10

125

11

12

TJ-Junction Temperature- °C

FIGURE 3

FIGURE 2

THERMAL CHARACTERISTICS

junction temperature formula

where
TJ = virtual junction temperature
T A = free-air temperature
Po = average device power dissipation
RO = thermal resistance (junction-to-air, ROJA, or junction-to-case, ROJC)

PACKAGE

RaJA

RaJC

FN

70 0 C/W

22°C/W

N

100 0 C/W

27°C/W

TEXAS . . ,
INSTRUMENTS
3-48

13

VCC1 -Supply Voltage-V

POST OFFICE BOX 655303 • DAllAS. TEXAS 715265

14

SN65512B. SN75512B
VACUUM FLUORESCENT DISPLAY DRIVERS
02654, DECEMBER 1985-REVISED OCTOBER 1989

OW OR N PACKAGE

•

Each Device Drives 12 Lines

•

60-V Output Voltage Swing Capability

•

25-mA Output Source Current Capability

•

High-Speed Serially-Shifted Data Input

•

TTL-Compatible Inputs

•

Latches on All Driver Outputs

(TOP VIEW)

011
012

010
09

STROBE
SERIAL OUT

08
07

DATA IN
VCCl
CLOCK
LATCH ENABLE

description
The SN65512B and SN75512B are monolithic
BIDFETt integrated circuits designed to drive a
dot matrix or segmented vacuum fluorescent
display,
All device inputs are diode-clamped p-n-p inputs
and will assume a high logic level when opencircuited, The nominal input threshold is 1,5 V,
Outputs are totem-pole structures formed by an
n-p-n emitter follower and double-diffused MOS
(DMOS) transistors,
The device consists of a 12-bit shift register, 12
latches, and 12 output AND gates, Serial data
is entered into the shift register on the low-tohigh transition of CLOCK, When high, LATCH
ENABLE transfers the shift register contents to
the outputs of the 12 latches, The active-low
STROBE input enables all Q outputs, Serial data
output from the shift register may be used to
cascade shift registers, This output is not
affected by LATCH ENABLE or STROBE,

VCC2
GND
06
05

01
04
02-....._ _...r-03

logic symbol:!:
TTL/VAC
LATCH ENABLE (8)
STROBE (3

(9)

DATA IN (5)
3

The SN65512B is characterized for operation
from -40°C to 85°C, The SN75512B is
characterized for operation from 0 °C to 70°C,

2D l>

3

2D l>

3

2D l>

3

2D l>

3

2D l>

3

2D l>

3

2D l>

3

2D l>

3

2D l>

3

2D l>

3

(10)
(11)
(12)
(13)
(14)
(17)
(181
(19)
(20)
(1)
(2)
(4)

01
02
03
04
05
06
Q7

08
09
010
011
012
SERIAL OUT

t This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.

t BIDFET -Bipolar, double-diffused, N-channel and P-channel MOS transistors on same chip -

PRODUCTION DATA documents contain information
current as of publication datB. Products conform to
specifications per the terms of Texas Instruments

~~~~::~~i~ai~:1~1e ~!::i~~ti:; :1~O::~:~:t:~~S not

patented process.

Copyright

© 1989, Texas Instruments Incorporated

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3-49

SN655128. SN755128
VACUUM FLUORESCENT DISPLAY DRIVERS
logic diagram (positive logic)
STROBE
LATCH - - - - - - ,
ENABLE
LATCHES
DATA IN
CLOCK--i-----I>

FUNCTION TABLE
CONTROL INPUTS
FUNCTION

LATCH
CLOCK

LOAD
LATCH
STROBE

=

ENABLE STROBE

SHIFT REGISTER

LATCHES

R1 THRU R12

LC1 THRU LC12

OUTPUTS
Q1 THRU Q12

SERIAL

i

X

X

Load and shift t

Determined by LATCH ENABLE *

R12

Determined by STROBE

Not

X

X

No change

Determined by LATCH ENABLE*

R12

Determined by STROBE

X

L

X

Stored data

R12

Determined by STROBE

X

H

X

New data

R12

Determined by STROBE

X

X

H

Determined by LATCH ENABLE*

R12

All L

X

X

L

Determined by LATCH ENABLE*

R12

LCI thru LC12, respectively

=

=

As determined above
As determined above

=

high level, L
low level, X
irrelevant, t
low-to-high-Ievel transition.
H
t R1 2 takes on the state of RII, R11 takes on the state of RIO, . . . R2 takes on the state of R1 , and R1 takes on the state of the data input.
*New data enter the latches while LATCH ENABLE is high. These data are stored while LATCH ENABLE is low.

TEXAS •

3-50

INSTRUMENTS
POST OFFiCI: BOX 855303. DALLAS. TEXAS 7528&

SN65512B, SN75512B
VACUUM FLUORESCENT DISPLAY DRIVERS
typical operating sequence
CLOCK

DATA
IN

VALID

IRRELEVANT

SR
__________~___________V_A_L_ID___________
CoNTENTS ____________N_vA_L_D
LATCH
ENABLE

______________________

_______________

PREVIOUSLY STORED DATA

LATCH
CONTENTS
STROBE

~rl~

NEW DATA VALID

--------------------------------~

"---~

Q OUTPUTS

VALID

schematics of inputs and outputs
TYPICAL OF ALL OUTPUTS

EQUIVALENT OF EACH INPUT
VCC1--------~--------

OUT

------<--~~-----VCC2FOR
_ _

Q OUTPUTS
VCC1 FOR
SERIAL OUTPUT

...----OUTPUT

INPUT --~""'-I
GND

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 76266

3-51

SN65512B, SN75512B
VACUUM FLUORESCENT DISPLAY DRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
Supply voltage, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 70 V
Input voltage .................................. : . . . . . . . . . . . . . . . . . . . . . . . . .. VCC1
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN655128 . . . . . . . . . . . . . . . . . . . . . . . . .. - 40 DC to 85 DC
SN755128 ............................. ODCt070 DC
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . .. 260 DC
NOTE 1: Voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
PACKAGE

TA s 25°C

DERATING FACTOR

POWER RATING

ow

1125 mW

ABOVE TA - 25°C
9.0 mW/oC

N

1150mW

9.2 mW/oC

TA - 70°C
POWER RATING

TA - B5°C
POWER RATING

720mW

585 mW

736 mW

598 mW

recommended operating conditions
SN65512B
MIN

SN75512B

MAX

MIN

MAX

UNIT

Supply voltage. V CC 1

5

15

5

15

V

Supply voltage. VCC2

0

60

0

60

V

High-level input voltage. VIH

2

Low-level input voltage. VIL
High-level output current. IOH
Low-level output current. IOL

VCCI = 10V
VCCI = 15 V. TA = 25°C
VCCI = 5 V. TA = 25°C

Clock frequency. f clock
Pulse duration. CLOCK high or low. tw
Setup time. DATA IN before CLOCK!.
tsu (see Figure 11
Hold time. DATA IN after CLOCK!. th
(see Figure 11

VCCI = 15 V. TA = 25°C
VCCI = 5 V. TA = 25°C

0.8

0.8

V

-25

-25

mA

5
0

4

0

1

5
0

4

0

1

100

100

500

500

VCCI = 15 V. TA = 25°C
VCCI - 5 V. TA - 25°C

100

100

250

250

VCCI = 15 V. TA = 25°C
VCCI = 5 V. TA = 25°C

50

50

250

250

-40

Operating free-air temperature, T A

V

2

85

mA
MHz
ns
ns
ns

0

70

°C

electrical characteristics over recommended operating free-air temperature range, VCC2 - 60 V (unless
otherwise noted)
PARAMETER
VIK
VOH
VOL

TEST CONDITIONS

Input clamp voltage
High-level output

Q outputs

IOH = -25 mA

voltage

Serial output

Low-level output

Q outputs

IOH = - 200 pA. VCCI = 10 V
IOL = 5 mAo
VCCI = 10 V

voltage

Serial outpu

IOL - 200 pA.

IIH

High-level input current

IlL

Low-level input current

VCCI = 15 V.
VCCI = 15 V.

ICCI

Supply current from V CC 1

VCCI = 15 V

ICC2

Supply current from V CC2

VCCI =.15 V

Typt

57.5

58

9

9.5

MAX

UNIT

-1.5

V
V

2.6

5

VCCI - 10 V
VI = 5 V

0.05

0.2

0.01

1

~A

VI = 0.8 V

-25

-150

pA

80

500

pA

2

6

mA

All outputs high

10

100

~A

. STROBE at 2 V

0.8

3

mA

VI = 5 V
VI = 0.8 V

tAli typical values are at VCCI = 10 V. TA = 25°C.

TEXAS ."

3-52

MIN

11= -12 mA

INSTRUMENTS
.POST OFFICE BOX 655303 • DALLAS, TEXAS 76286

V

SN65512~ SN755128
VACUUM FLUORESCENT DISPLAY DRIVERS

switching characteristics, VCC1 - 10 V, VCC2 - 60 V, TA
PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

300

ns

30 pF,

300

ns

See Figure 2

500

ns

500

ns

tDHL

Delay time, high-to-Iow-Ievel output

tDLH

Delay time, low-to-high-Ievel output

CL

tTHL

Transition time, high-to-Iow-Ievel output

tTLH

Transition time, low-to-high-Ievel output

~

PARAMETER MEASUREMENT INFORMATION
~-------tw--------~.I

1

_------~-+-

---

VIH

1
CLOCK

J+--------tw--------+J

FIGURE 1_ INPUT TIMING VOLTAGE WAVEFORMS
~"'30ns
I
I

I

I

I

I
t
1
1

1
I

STROBE

I
I
I
I

;,.1~~----3
90%

V

I

1.5 V

1 II

1

_ _ _ _ _ _.....
1...
0%-."._1 _ _ _ _ _ _ _ _ 0 V

1
I
OUTPUTS

I

1

14-tDLH-Iot
1

Q

I+---+t-'" 30 ns
1
I

1

1
I4-tDHL-+J

I

---------.!I- - 90%

--VOH

I

I
I

I

1

1

I

I
1

1

VOL

I4-+1-tTHL

FIGURE 2. SWITCHING-TIME VOLTAGE WAVEFORMS

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TEXAS 75265

3-53

3-54

SN65518, SN75518
VACUUM FLUORESCENT DISPLAY DRIVERS
D2720, MARCH 1983-AEVISED MAY 1990

•

Each Device Drives 32 Lines

•

60-V Output Voltage Swing Capability

•

25-mA Output Source Current Capability

•

High-Speed Serially Shifted Data Input

•

Latches on All Driver Outputs

N PACKAGE
(TOP VIEWI
VCC2
SERIAL OUT
032
031
030
Q29
Q28
Q27
Q26
Q25
Q24
Q23
Q22
Q21
Q20
Q19
Q18
Q17
STR08E
GND

description
The SN65518 and SN75518 are monolithic
BIDFETt integrated circuits designed to drive a
dot matrix or segmented vacuum fluorescent
display,
The devices each consist of a 32-bit shift
register, 32 latches, and 32 output AND gates.
Serial data is entered into the shift register on
the low-to-high transition of CLOCK. While
LATCH ENABLE is high, parallel data is
transferred to the output buffers through a 32-bit
latch. Data present in the latch during the highto-low transition of LATCH ENABLE is latched.
When STROBE is low, all Q outputs are enabled.
When STROBE is high, all Q outputs are low.

VCCI
DATA IN
01
02
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Ql0
Qll
Q12
Q13
014
Q15
Q16
LATCH ENABLE
CLOCK
FN PACKAGE

Serial data output from the shift register may be
used to cascade additional devices. This output
is not affected by LATCH ENABLE or STROBE.

(TOP VIEWI

The SN65518 is characterized for operation from
-40°C to 85°C and the SN75518 is
characterized for operation from OOC to 70°C.
6

Q27

5 4 3 2

1 4443424140

7
8
9
10
11
12
13
14
15
16
17

39
38
37
36
35
34
33
32
31
30
29
IS 19 2021222324252627 2S

uro ....

WQ:..:WCOLClVU

z ..... ""-cozU-J,.... .......... z
dd~C)g~ddO

tii

U1ij
J:

U
I-

::s

tBIDFET -Bipolar, double-diffused, N-channel and P-channel MOS
transistors on same chip-patented process.

PRODUCTION DATA documlnla .o.tai. information
currant a. of publi.ation data. Productl ...form to
aplOifiootlo.1 plr lb. tar..1 of T.... Instr....nts

:~:~ri;·{::I~'li =:~:; :'l""':~':lt:~ nD!

NC - No internal connection

Copyright © 1990, Texas Instruments Incorporated

TEXAS

..If

INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 75265

3-55

SN65518. SN75518
VACUUM FLUORESCENT DISPLAY DRIVERS

logic symbol t

CLOCK (21)
OATA IN (39)

••

20
20

I>
I>

·
·· ··

3
3

(38) 01
(37) 02

20
20

I>
I>

3
3

(23) 016
(18) 017

20
20

I>
I>

3
3

(4)031

••
•

(3) 032
(2) SERIAL
OUT

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and lEe Publication 617-12.
Pin numbers shown are for the N package.

logic diagram (positive logic)
STROBE
LATCH - - - - - - - - ,
ENABLE
SHIFT
REGISTER
OATAIN
CLOCK_--t>-

TEXAS ...,
INSTRUMENTs
3-56

POST OFFICE BOX 855303 • DALLAS. TEXAS 76286

SN65518, SN75518
VACUUM FLUORESCENT DISPLAY DRIVERS
FUNCTION TABLE
CONTROL INPUTS
FUNCTION

LOAD
LATCH
STROBE

CLOCK

LATCH
ENABLE

SHIFT REGISTERS

LATCHES

STROBE

R1 THRU R32

LC1 THRU LC32

Load and shift t

Determined by

t

X

X

Not

X

X

No change

LATCH ENABLEt

X

L

X

As determined

Stored data

X

H

X

X

H

above
As determined

New Data

X
X

X

L

above

LATCH ENABLEt

Determined by

OUTPUTS
SERIAL

Q1 THRU 032
Determined by STROBE

R32

Determined by STROBE

R32

All L

R32

LCl thru LC32, respectively

H = high level, L = low level, X = irrelevant, t = low-to-high-Ievel transition.
tR32 and the serial output take on the state of R31, R31 takes on the state of R30, ... R2 takes on the state of Rl, and Rl takes on
the state of the data input.
*New data enter the latches while LATCH ENABLE is high. These data are stored while LATCH ENABLE is low.

tvpical operating sequence

unununUnL ••• J1J1J1JlJlJ

CLOCK - - ,

DATA IN

SRCONTENTS

VALID

IRRELEVANT

INVALID

VALID

---'n'--__________

LATCH ENABLE _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

LATCH
CONTENTS _ _ _ _ _P_R_EV_'_O_U_S_LY_S_TO_R_E_D__
DA
__
TA
__________L-_______
N_E_W_D_A_T_A
__
V_A_LI_D________

STROBE

Q OUTPUTS

VALID

TEXAS •
INSTRUMENTS
POST OFACE BOX 666303 • DALLAS. TEXAS 75285

3-57

SN65518, SN75518
VACUUM FLUORESCENT DISPLAY DRIVERS

schematic of inputs and outputs
TYPICAL OF ALL Q OUTPUTS

EQUIVALENT OF EACH INPUT
vCC1--------~----~_.----

- - - - - - . - . , - - - VCC2

INPUT ____...WIr--<.....

TYPICAL OF SERIAL OUTPUT
--------~----_._.~VCCl

t-----~--OUTPUT

. . . . - - - OUTPUT

GND--__----------~_e----

- - - - -........~- GND

- - - - -____-----GND

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC1 (see Note 1) . . . . . . ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
Supply voltage, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 70 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. VCC1
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range, T A: SN65518 ... . . . . . . . . . . . . . . . . . . .. - 40°C to 85 °C
SN75518 .......................... OOC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Case temperature for 10 seconds: FN package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package ............ 260°C
NOTE 1: Voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
PACKAGE
FN
N

TA:5 25°C
POWER RATING
1700 mW
1250 mW

DERATING FACTOR
ABOVE TA - 25°C
13.6 mW/oC
10.0 mW/oC

TA - 70°C
POWER RATING
1088 mW
800mW

TEXAS • .

INSTRUMENTS
3-58

POST OFFICE BOX 655303 • DALLAS, TEXAS 76266

TA - B50C
POWER RATING
884mW
650mW

SN65518, SN75518
VACUUM FLUORESCENT DISPLAY DRIVERS
recommended operating conditions. TA - 25 °C (unless otherwise noted)
MIN

MAX

Supply voltage, VCC1

4.5

15

V

Supply voltage, VCC2

0

60

V

I VCCI
I VCCI

High-level input voltage, VIH (see Figure 1)

= 4.5 V

3.5

= 15V

12
-0.3

Low-level input voltage, VIL (see Figure 1)

V
0.8
-25

High-level output current, IOH

2
5
1

Low-level output current, IOL
Clock frequency, fclock (see Figure 2)
Pulse duration, CLOCK high, tw(CKH)
Pulse duration, CLOCK low, twCCKL)
Setup time, DATA IN before CLOCKt, tsu
Hold time, DATA IN after CLOCKt, th
Operating free-air temperature, T A

VCCI =10Vto15V
VCCI = 4.5 V

0

VCCI =10Vto15V
VCCI - 4.5V
VCCI =10Vto15V

100

0

100
500

VCCI = 4.5V
VCCI = 10 V to 15 V

150

VCCI - 4.5 V
SN65518

150

SN75518

V
mA
mA
MHz
ns

500

VCCI = 4.5 V
VCCI = 10Vto 15V

UNIT

ns

75

ns

75

ns

-40

85

0

70

·C

electrical characteristics over recommended ranges of operating free-air temperature and VCC1 (unless
otherwise noted). VCC2 - 60 V
PARAMETER
VIK
VOH

TEST CONDITIONS

Input clamp voltage
High-level output voltage

VOL

Low-level output voltage

IIH

High-level input current

IlL

Low-level input current

ICCI

Supply current

Q outputs

Supply current

IOH = -25 mA

SERIAL OUT

VCCI = 5 V,

Q outputs

IOL = 1 mA

SERIAL OUT

IOL = 20/loA
VCCI = 15 V,
VCCI = 15 V,

SN65518
ICC2

MIN

Typt

57.5

58

4.5

4.9

11= -12 mA

VCCI = 4.5 V
VCCI = 15 V
Outputs high,

SN65518,

. Outputs high,

SN75518

Outputs low

IOH = -20 p.A

MAX
-1.5
5
5

VI = 15 V

0.06
0.1

VI = OV

-0.1
1.8
2

TA = -40·C
TA = O·C to MAX

7
0.01

0.8
1
-1

4
5
12
10
0.6

UNIT
V
V
V
/loA
p.A
mA

mA

t All typical values are at T A = 25 ·C.

TEXAS . "

INSTRUMENlS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3-59

SN65518, SN75518
VACUUM FLUORESCENT DISPLAY DRIVERS
switching characteristics, VCC2

= 60 V, CL

- 50 pF, TA - 25°C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

Delay time, high-to·low·level

tDHL

Q output

Delay time, low-to-high-Ievel
Q output

tDLH

VCCl

= 4.5 V
= 15 V
= 4.5 V

VCCl

= 15 V

VCCl

= 4.5 V

VCCl

= 15 V
= 4.5 V
= 15 V

VCCl
VCCl

Delay time, CLOCK to DATA OUT

td

from LATCH ENABLE
from STROBE
from LATCH ENABLE
from STROBE
from LATCH ENABLE
from·'STROBE
from LATCH ENABLE
from STROBE

tTHL

Transition time. high-to-Iow-Ievel Q output

tTLH

Transition time, low-to-high-Ievel Q output

MIN

CL = 15 pF,
See Figure 4
See Figure 5
See Figure 6
See Figure 5
See Figure 6
See Figure 5
See Figure 6
See Figure 5
See Figure 6

VCCl
VCCl
VCCl - 4.5 V
VCCl = 15 V

See Figure 6

See Figure 6

MAX
600
150
1.5
1
0.6
0.5
1.5
1
0.25
0.25
3
1.5
2.5
0.75

UNIT
ns

p.s

p.s

p.s
p.s

RECOMMENDED OPERATING CONDITIONS
INPUT VOLTAGE LOGIC-LEVEL LIMITS
vs
SUPPLY VOLTAGE VCC1
12

--

10

>

...

8

>
;

6

I

/
~o/

'>

4

...
II-

/

4
3

0

2

/

.~

..

::!E

Maximum VIL

5

5

"

U
E
~

"
3

7

9

13

11

o

4

15

I
6

/

V

8

10

12

Supply Voltage VCC1-V

Supply Voltage VCC1-V

FIGURE 2

FIGURE 1

TEXAS

-II

INSTRUMENTS
3-60

I

~

2

o

N

:t
::!E

>

/V

Q,

c

I

T A - Full Range

"c..
!!!
'"

~

'"

6

I

~~

.=
0

I

~

I
I
T A - Full Range

MAXIMUM INPUT DATA RATE
vs
SUPPLY VOLTAGE VCC1

POST OFFICE BOX 666303 • DALLAS. TeXAS 15265

14

16

SN65518, SN75518
VACUUM FLUORESCENT DISPLAY DRIVERS
PARAMETER MEASUREMENT INFORMATIONt
i4-- tw(CKHI--+j
I

i , - - - - -.. . .
I

CLOCK
I

:

:

VIL

j...--tW(CKLI--+l
j4---t.u~th----.j
I
I

<> Z Z Z Z a l U o U lll -

>0«
oct-

«O::;>~«

o

a:~

1-«
(1)0

zd::;
w

w

0

W

(I)

I-W
«oc
I00

I-!;;:

(1)0

U

!;;:
OC
I(I)

III

III

(I)

(I)

:>

:>

NC - No internal connection

logic symbols t
SN65551, SN75551

SN65552,SN75552

CMOS/EL OISP
SUBSTRATE illL
I~ SOURCE SUPPL VI
CQMMON
STROBE ~ V3

CMOS/EL OISP
SUBSTRATE (21)
COMMON
STROBE (23)

[~

SOURCE SUPPLV)

ENABLE .!!!L G2
SRG 32
CLOCK B!!!.J::, !>C1/-

r

'1

(24)
DATA IN - 1 0

2.3
2.3

I>
I>

2.3

I>
I>

·· ···
··

2,3

··

2.3

2.3

I>
I>

Q~ 01
Q~ 02
Q~ 015

2.3

Q p:.-l!l. 016

2.3

Q~ 031

2.3

Q~ 032

~ SERIAL OUT

2.3

I>
I>

I>
I>

Q
Q

.

(27) 031
(26) 032
(18) SERIAL OUT

tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and lEG Publication 617-12. The symbol~ here indicates an n-channel
open-drain output.
Pin numbers shown are for the N package.

TEXAS . "

INSTRUMENTS
3-64

POST OFFICE BOX 655303.- DALLAS. TEXAS 75285

SN65551. SN6555t SN75551. SN75552
ELECTROLUMINESCENT ROW DRIVERS
logic diagram (positive logic)
SUBSTRATE ________________________________________--,
COMMON
STROBE

-----------d

ENABLE - - - - - - - - - - ,
DATA IN

-----I

CLOCK -

......o--~>

031

032

'----------------SERIAL

OUT

FUNCTION TABLE
FUNCTION5
LOAD
ENABLE
STROBE

CONTROL INPUTS
CLOCK ENABLE STROBE

SHIFT REGISTERS

OUTPUTS

+
+

X

X

Rl THRU R32
Load and Shift T

SERIAL

01 THRU 032

R32

Determined by ENABLE and STROBE

No
X

X

X

No Change

R32

Determined by ENABLE and STROBE

L

H

As determined above

R32

All Q outputs off

X

H

H

As determined above

R32

Determined by R1 through R32

X

X

L

As determined above

R32

All Q outputs on

H = high level, L = low level, X = irrelevant, + = high-to-Iow transition.
tRegister R32 takes on the state of R31, R31 takes on the state of R3D, ... R2 takes on the state of Rl, and Rl takes on the state of
the data input.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 855303. DALLAS. TEXAS 75265

3-65

SN65551, SN65552, SN15551, SN15552
ELECTROLUMINESCENT ROW DRIVERS

typical operating sequence

U

CLOCK

U_____________ _

-'n-----------.,. -----.. ,. .
-...InL.___-'n ---------.JnL.___..Jn ----- --

DATA IN _ _ _ _

SUBSTRATE COMMON
VIH

SUBSTRATE COMMON

SN75551 ENABLE _ _ _ _ _

VIH

SUBSTRATE COMMON
VIH

SN75552 ENABLE _ _ _ _ _ _ _ _ _

SUBSTRATE COMMON

STROBE

l . .___-'
r--l-... J
L

COMPOSITE ROW
DRIVE APPLIED TO
SUBSTRATE COMMON

SUBSTRATE COMMON
+HV
OV

- - - - - - - -HV

OUTPUT FLOATS

01 OUTPUT

---- SN75551
02 OUTPUT

SN75552
02 OUTPUT

HV

=

14

n

OUTPUT FLOATS

-

-

-

-- _

.1
-

-

-

-

-

-

UTPUT

14

-----HV

OUTPUT FLOATS

.1

-

-- -

- -HV
- - +HV

~
FLOATS

----------------~

-

high voltage

_ _ _ _ _ _ _ _ -HV

NOTE: During operation CLOCK, DATA IN, ENABLE, and STROBE are referenced to the Composite Row Drive signal received at the
SUBSTRATE COMMON pin of the device.

TEXAS •
INSTRUMENTS
3·66

POST OFF1CE BOX 655303 • DALLAS. TEXAS 75265

SN65551, SN65552, SN75551, SN75552
ELECTROLUMINESCENT ROW DRIVERS
schematic of inputs and outputs
TYPICAL OF SERIAL OUTPUT

TYPICAL OF ALL Q OUTPUTS

EQUIVALENT OF EACH INPUT
Vee - - -......~-_1H~-

r---~"-

OUTPUT

- - - - . - - - - - Vee

--~

INPUT _ ......""'..........

....- -....- OUTPUT

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 18 V
Off-state Q output voltage, VO(off) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 225 V
Input voltage ........................................................ VCC+0.3 V
Substrate common terminal current (see Note 2) .................................. 1.5 A
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN65551, SN65552 .................. -40°C to 85°C
SN75551, SN75552 ..................... ooC to 70°C
Storage temperature range ......................................... - 65°C to 1 50°C
Case temperature for 10 seconds: FN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package ............. 260°C
NOTES:

1. Voltage values are with respect to SUBSTRATE COMMON terminal.
2. Duty cycle is limited by package disSipation.
DISSIPATION RATING TABLE
PACKAGE

TA s 25'C
POWER RATING

DERATING FACTOR

FN

1700 mW

ABOVE TA - 25'C
13.6 mW/'C

N

1250 mW

10.0 mW/'C

TA - 70'C
POWER RATING

TA - 85'C
POWER RATING

1088 mW

B84mW

800mW

650 mW

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 8&5303 • DALLAS. TEXAS 75286

3-67

SN65551, SN65552, SN75551, SN75552
ELECTROLUMINESCENT ROW DRIVERS
recommended operating conditions
MIN
10.8

VCC

Supply voltage

VIH

High-level input voltage (see Figure 1)

VIL

Low-level input voltage (see Figure 1)

YO/off)

Oft-state Q output voltage

IO(on)

On-state output current, duty cycle
(see Figures 2, 3, and 4)

10K
fclock
tw
tsu
th
TA

VCC
VCC

=
=
=

NOM
12

8.1
11.25
-0.3

10.8 V
15V

VCC
10.8 V
VCC - 15 V

-0.3
0

s 1 %,

VCC

=

10.8 V, TA

VCC - 15V,

=

25°C

0
125

Pulse duration, CLOCK high or low
Setup time, OATA IN before CLOCK (see Figure 5)
Hold time, DATA IN after CLOCK Isee Figure 5)
SN65551, SN65552

50
100
-40

I SN75551, SN75552

0

I

Operating free-sir temperature

UNIT
V

11.1
15.3

V

2.7
3.75

V

200
50
80
-45

TA - 25°C

Output clamp current
Clock frequency

MAX
15

4

V
rnA
rnA
MHz
ns
ns
ns

85
70

°C

electrical characteristics over recommended operating free-air temperature range
IOloft)
VOH

PARAMETER
Off-state Q output current
High-level output voltage

VOL

Low-level output voltage

IIH
IlL
ICC

High-level input current

TEST CONDITIONS

= 200 V
10 = -100,..A
IOL = 50 rnA, See
IOL = 100 ~A

MIN

Vo

I
I
I

Serial outputs
Q outputs
Serial output

VCC-1.5
Figure 3

VI@VCC
VI = 0

Low-level input current

MAX
10

Supply current from VCC

UNIT
,..A
V

30
1

V

1
-1

,..A
,..A

250

~A

MAX

UNIT

200

ns

200

ns

500

ns

switching characteristics, Vee - 12 V, TA - 25°e

tpHL
tpLH

PARAMETER
Propagation delay time, high-to-Iow
level SERIAL OUTPUT from CLOCK
Propagation delay time, low-to-high
level SERIAL OUTPUT from CLOCK
Turn-on· delay time, Q outputs

td(on)

from ENABLE

TEST CONDITIONS

CL

=

20 pF to ground, See Figure 6

IOL = 50 rnA, STR08E at VCC,
RL = 1.4 kll to 100 V, See Figure 7

TEXAS ."

INSTRUMENTS
3-68

MIN

POST OFFtCE BOX 866303 • DALLAS. TEXAS 71285

SN65551, SN65552, SN75551, SN75552
ELECTROLUMINESCENT ROW DRIVERS
RECOMMENDED OPERATING CONDITIONS
MAXIMUM ON-STATE Q OUTPUT CURRENT
vs
SUPPLY VOLTAGE

INPUT VOLTAGE LOGIC-LEVEL LIMITS
vs
SUPPLY VOLTAGE
12

TA = Full Range
10

>I

.'"

J---

8

~

~
MinimumVIH

...."

0

->

75

5

."

u

70

/

&

0

"

65

~c

60

0

6

...

c

'T

7

Duty Cycle';;; 1 %
TA = 25°C

~

!'l

>

80

«E
.!.c

4

2

o
10

MaximumVIL

E

"E

.

';(

55

:!i
11

12

13

14

15

50
10

vee-Supply Voltage-V

/

/

0

-

V

/

V
11

/
12

13

14

15

vee-Supply Voltage-V
FIGURE 2

FIGURE 1

TEXAS ."

INSlRUMENTS
POST OfFICE BOX 855303 • DALLAS. TEXAS 76285

3-69

SN65551, SN65552, SN75551, SN75552
ELECTROLUMINESCENT ROW DRIVERS
TYPICAL CHARACTERISTICS
OUTPUT SATURATION CURRENT
vs
FREE-AIR TEMPERATUREt

ON-STATE Q OUTPUT CURRENT
vs
OUTPUT VOLTAGE
110

110
¢

E
I

1:
~
::J

S6A+--k

100

Vee'·1Jv"

90
80

/

;Q. 70
; 60

0

50

!

40

C

30

.......

I/-

I

C
0

§

20
10

II
II

00

(.)

80

t

"

+--->

::J

:i;

Duty Cycle s 1 %

...........

~

............

70

~

I'-- :----..Vee ...........

50
40
30

10
-40 -20

0

20

40

FIGURE 3
t Data for temperatures below ooe and above 70 0 e apply only for SN65551 and SN65552.

FIGURE 4

PARAMETER MEASUREMENT INFORMATION
j 4 - - -tw - - - - . j

CLOCK
I

I
I

@if.

.,

I4--tsu--+l+-th~
",UO

~C"'""""lI~r-"'A-

VIH

VIL

FIGURE 5. INPUT TIMING VOLTAGE WAVEFORMS

TEXAS •
INSTRUMENTS
3-70

60

80 100

TA -Free-Air Temperature- °e

SOA = Safe Operating Area

DATA IN

!"--

vee - 10.8 V t-

I

40 60
80 100 120 140
VO-Output Voltage-V

'I4--tw

15V

--r-

r--....

60

$'
o

i

,

:§ 20

Duty Cycle s 1 %
TA - 25°C
20

90

I:

vee - 10.8 V
SOA

II)

0

.!.I:
~
::J

I
I.
,
vee = 12 V

/

(.)

Cl

~ 100

POST OFFICE BOX 666303 • DALLAS, TEXAS 75265

SN65551, SN65552, SN75551, SN75552
ELECTROLUMINESCENT ROW DRIVERS
PARAMETER MEASUREMENT INFORMATION

CLOCK

"

P-r----ff
______ 5~l-L ________

.....

SERIAL OUT

~_

-+I

If-tPLH

J:=;-'

If- tPHL

f.f----------

50%

VIH
VIL

VOH

\50%
1...- - - - - -

VOL

FIGURE 6. VOLTAGE WAVEFORMS, SERIAL OUTPUT

ENABLE

______..J,-F\---------- VIH
VIL
I

QOUTPUT

:

1\90%---- 100V

I4--td(on)~

VOL

FIGURE 7. VOLTAGE WAVEFORMS, Q OUTPUT

TEXAS •
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75266

3·71

3-72

SN65553, SN65554, SN75553, SN75554
ELECTROLUMINESCENT COLUMN DRIVERS
02744, MARCH 1983-REVISED DECEMBER 1989

N PACKAGE
ITOPVIEW)

•

Each Device Drives 32 Electrodes

•

60-V Output Voltage Swing Capability

•

15-mA Output Source and Sink Current
Capability

•

High-Speed Serially-Shifted Data Input

•

Totem-Pole Outputs

•

Latches on All Driver Outputs

SN65553, SN75563

Q17
Q16
Q15
Q14
Q13
Q12
Qll
Ql0
Q9
Q8

description
The SN65553, SN65554, SN75553, and
SN75554 are monolithic BIDFETt integrated
circuits designed to drive the column electrodes
of an electroluminescent display, The SN65554
and SN75554 output sequence is reversed from
the SN65553 and SN75553 for ease in printed
circuit board layout.

Q7
Q6
Q5
Q4
Q3
Q2
Ql
SERIAL OUT
CLOCK
GND

The devices consist of a 32-bit shift register, 32
latches, and 32 output AND gates. Serial data
is entered into the shift register on the low-tohigh transition of CLOCK, When high, LATCH
ENABLE transfers the shift register contents to
the outputs of the 32 latches, When OUTPUT
ENABLE is high, all Q outputs are enabled. Serial
data output from the shift register may be used
to cascade shift registers. This output is not
affected by LATCH ENABLE or OUTPUT
ENABLE,
The SN65553 and SN65554 are characterized
for operation from - 40
to 85
The
SN75553 and SN75554 are characterized for
operation from O°C to 70

ac

ac.

Q18
Q19
Q20
Q21
Q22
Q23
Q24
Q25
Q26
Q27
Q28
Q29
Q30
Q31
Q32
OUTPUT ENA8LE
DATA IN
LATCH ENABLE
VCCl
VCC2
FN PACKAGE
ITOP VIEW)

SN65553,SN75553
NCt).qLOco,....ccmO_N
- _ _ _ _ _ _ NNN

a a a a a a a a a a'a
6

Qll

ac.

5

4 3 2

1 44 43 4241 40

7

39

8

38

9

37

10

36

11

35

12

34

13

33
32

14

Ql

15

31

16

30

17

29

Q23
Q24
Q25
Q26
Q27
Q28
Q29
Q30
Q31
Q32
NC

1819202122232425262728

NC- No internal connection

tBIDFET - Bipolar, double-diffused, N·channel and P-channel MOS transistors on same chip - patented process.

PRODUCTION DATA documonts contain information
c.rrant as of publication doh, Products c.nform to
.pacificatio.. per thater... of T.... Instrumants
=irv8i~:I~7e
:~a;::::£!s~ not

t.r:t::i:r

Copyright © 1989, Texas Instruments Incorporated

TEXAS .."

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TEXAS 75265

3-73

SN65553, SN65554, SN75553, SN75554
ELECTROLUMINESCENT COLUMN DRIVERS

FN PACKAGE
ITOPVIEW)

N PACKAGE
(TOP VIEW)

SN65554.SN75554

SN65554.SN75554
Q16
Q17
Q18

NN _ _ _ _ _ _ _ _ _
..... OOlCX)f""o.COLOV('f')N_

Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8

Q19
Q20
Q21
Q22
Q23
Q24

00000000000
6 5 4 3 2 1 4443424140

Q7
Q6
Q5
Q4
Q3

Q25
Q26
Q27
Q28
Q29
Q30
Q31
Q32
SERIAL OUT
CLOCK

Q2
Q1
OUTPUT ENABLE
DATA IN
LATCH ENABLE

Q31
Q32

•
•
37

10
11
12
13
14
15
16
17

36
35
34
33
.32

31
30
29
181920,2122232425262728
I-UUU~C
N_WWW
: : l Z Z Z U Z UUalalal
O(!) U U « « «
...J
»ZZZ

o

«
~
«
o

VCC1

GND

7
8

VCC2

U

www
J:«~

U~::l
~«o..

«O~

...J

::l

o

NC-No internal connection

logic symbols t
SN65553. SN75553

SN65554. SN75554

.CMOS/EL OISP

CMOS/EL OISP

OUTPUT ENABLE (25) EN3

OUTPUT ENABLE (25) EN3

LATCH ENABLE (23) C2

LATCH ENABLE (23) C2
CLOCK (19)

.......--'-,.--~~.,(26) Q1
1=--1;=-=----"-1(27) 02

1-"":"--,,---7-1>--:3-1(40) 015

1---1~-:---:3-1 (1) 016
1--=----,r=-:---:3-1'(16) 031
1-----'~....;..--,:3-1(17) 032
L-._ _ _--J (18) SERIAL OUT

tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for N packages.

..If

TEXAS
INSTRUMENTS
3-74

POST OFFICE BOX 656303 • DALLAS, TeXAS 75265.

SN65553, SN65554, SN75553, SN75554
ELECTROLUMINESCENT COLUMN DRIVERS
logic diagram (positive logic)
OUTPUTENABLE----------------------------~

LATCH ENABLE - - - - - - - - - - - - - ,
SHIFT
REGISTER
LATCHES
DATA IN

----i
.......--il>

CLOCK -

FUNCTION TABLE

FUNCTION

LOAD
LATCH
OUTPUT
ENABLE

CONTROL INPUTS
LATCH
OUTPUT
CLOCK
ENABLE
ENABLE

t
Not

X
X
X
X

X
X

SHIFT REGISTER
R1 THRU R32

LATCHES
LC1 THRU LC32

H

X
X
X
X

X
X

L

As determined

New data
Determined by

H

above

LATCH ENABLE *

L

OUTPUTS
Q1 THRU Q22

SERIAL

Load and shift T

Determined by

R32

Determined by

No change

LATCH ENABLE*

R32

OUTPUT ENABLE

As determined

Stored data

above

R32.
R32

OUTPUT ENABLE

R32

All L

R32

LC 1 thru LC32, respectively

Determined by

H = high level, L = low level, X = irrelevant, t = low-to-high-Ievel transition.
TR32 and the serial output take on the state of R31, R31 takes on the state of R30, ... R2 takes on the state of R1, and R1 takes on
the state of the data input.
*New data enter the latches while LATCH ENABLE is high. These data are stored while LATCH ENABLE is low.

TEXAS ..,
INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 7&285

3-75

SN65553, SN65554, SN75553, SN75554
ELECTROLUMINESCENT COLUMN DRIVERS
typical operating sequence
CLOCK

Inn
u u unUnL ••• JlJlJlJlflJ

DATA IN

SRCONTENTS

VALID

IRRELEVANT

INVALID

VALID

---Jn

LATCH ENABLE _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

L _ _ _ _ _ _ _ _ _ __

LATCH
CONTENTS _ _ _ _P_R_EV_I_OU_S_L_y_S_T_O_RE_D_D_A_T_A_ _ _ _........_ _ _ _
NE_W_D_A_TA_V_A_Ll_D_ __
OUTPUT
ENABLE _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

~

Q OUTPUTS

VALID

schematic of inputs and outputs
EQUIVALENT OF EACH INPUT
VCC1---~~-~~'---

OUTPUT

INPUT_~vv..............

GND~~---~~~

TYPICAL OF ALL Q OUTPUTS

__

---e--e-e~~~GND

TEXAS . "

3-76

TYPICAL OF SERIAL OUTPUT

---~~~~t-- VCC2

INSTRUMENTS
POST OFFICE BOX 655303· DALLAS, TEXAS 76265

VCC1

.....- -.....-

OUTPUT

---e-_._.-....- GND

SN65553, SN6555~ SN75553, SN75554
ELECTROLUMINESCENT COLUMN DRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 18 V
Supply voltage, VCC2 ...................................................... 70 V
Input voltage ..................................................... VeC1 + 0.3 V
Ground current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 700 mA
Continuous total power dissipation .......................... " See Dissipation Rating Table
Operating free-air temperature range: SN65553, SN65554 . . . . . . . . . . . . . . . . .. -40°C to 85°C
SN75553, SN75554 ..................... O°Cto 70°C
Storage temperature range ......................................... - 65 °C to 1 50°C
Case temperature for 10 seconds: FN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package ............. 260°C
NOTE 1: Voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
TA

s

DERATING FACTOR

POWER RATING

ABOVE TA - 25°C

TA - 70°C
POWER RATING

TA - 85°C
POWER RATING

FN

1700 mW

13.6 mW/oC

1088 mW

884 mW

N

1250 mW

10.0 mW/oC

800mW

650 mW

PACKAGE

25°C

recommended operating conditions
Supply voltage, V CC 1

MIN

NOM

MAX

10.8

12

15

V

60

V

0

Supply voltage, VCC2
High-level input voltage, VIH (see Figure 1)

VCCl = 10.8 V
VCCl - 15 V

8.1

11.1

11.25

15.3

=

-0.3

2.7

-0.3

3.75

VCCl

Low-level input voltage, VIL (see Figure 1)

10.8 V

VCCl = 15 V

High-level output current, IOH

-15

Low-level output current, IOL

15

Output clamp current, 10K
0

Clock frequency, fclock

UNIT

V
V
mA
rnA

20

mA

6.25

MHz

Pulse duration, CLOCK high or low, twlCLKI (see Figure 2)

80

ns

Pulse duration, LATCH ENABLE, tw(LEI (see Figure 4)

80

ns

Data setup time before CLOCK t, tsu (see Figure 2)

20

ns

Data hold time after CLOCK t, th (see Figure 2)

80

I

Operating free-air temperature, TA

ns

SN65553, SN65554

-40

85

I SN75553, SN75554

0

70

°c

electrical characteristics over recommended ranges of VCC1 and operating free-air temperature,
VCC2 - 60 V (unless otherwise noted)
PARAMETER
VOH

TEST CONDITIONS

High-level output voltage

=

Q outputs

10

SERIAL OUT

10 = -100 ~A

Q outputs

10L

SERIAL OUT

10L

-15 mA

=
=

MAX

57

15 mA
100 ~A

1

Low-level output voltage

IIH

High-level input current

VI - VCC1

IlL

Low-level input current

VI

ICCl

Supply current from VCCl

ICC2

Supply current from VCC2

=0

SN65553, SN65554

I SN75553, SN75554

UNIT
V

VCe1 -1.5
8

VOL

I

MIN

1

V
~A

-1

pA

5

mA

12
10

mA

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76285

3-77

SN65553, SN65554, SN75553, SN75554
ELECTROLUMINESCENT COLUMN DRIVERS

= 25°C

switching characteristics, VCC1 - 12 V, VCC2 .. 60 V, TA

tpHL
tpLH
tDHL
tDLH

PARAMETER
Propagation delay time. high-to-Iow-Ievel

TEST CONDITIONS

SERIAL OUT from CLOCK
Propagation delay time. low-to-high-Ievel

CL = 20 pF to ground.
See Figure 3

SERIAL OUT from CLOCK
Delay time. high-to-Iow-Ievel
Q output from LATCH ENABLE
Delay time. low-to-high-Ievel
Q output from LATCH ENABLE

MIN

n.

500

ns

CL = 20 pF to ground.
See Figure 4

1

pS

YS

SUPPLY VOLTAGE VCC1

....-It'
'
'
'
,t'lt~

F~II Range

10

>I

..

8

J

~

I

~ 6
...
:>

"c

"j

->

4
2

o

10

11

-

M8ltimUmVIL

12

13

14

vee-Supply Voltage-V

FIGURE 1

TEXAS . "

3-78

n.

140

INPUT VOLTAGE LOGIC-LEVEL LIMITS

TA =

UNIT

140

CL - 20 pF to ground.
See Figure 4

RECOMMENDED OPERATION CONDITIONS

12

MAX

INSTRUMENTS
POST OFFice aox 866303 • DALLAS. TeXAS 75286

15

SN65553, SN65554, SN75553, SN75554
ELECTROLUMINESCENT COLUMN DRIVERS
PARAMETER MEASUREMENT INFORMATION
f4-- t w(CLK) ---.j
I

I

I

-1----- V,H

I

CLOCK

50%

I

50%

I

)

:

:

V,L

j...--tW(CLK)--+i
I+--tsu~th----.j
I
I

:

DATA IN,

'1:IYYJ
:

~

VALID

V,H

"-----'''--'''----'''- V,L

FIGURE 2. INPUT TIMING VOLTAGE WAVEFORMS

CLOCK _ _ _ _ _ _/ 0 %

I
I

I

SERIAL OUT

r----------------

: jsO%

---tP-L-H--+!~

l*= - - - - - - - - - -

'~'"1 ~U_h

___

-

VOH

VOL

Voo

SERIAL OUT
.....- - - - - - - - - VOL

FIGURE 3. VOLTAGE WAVEFORMS FOR' PROPAGATION DELAY
CLOCK TO SERIAL OUTPUT

...J{50% tW(LE)~5:

LATCH ENABLE _ _ _

-

-

-

-

:':
1

I
,,"+tDLH
Q OUTPUT

-------01-:..JIJtr-~-_-_--_--_-_--_--_--_-_

VOH

VOL

I

If\%--------I

QOUTPUT

~tDHL

VOH

VOL

FIGURE 4. VOLTAGE WAVEFORMS FOR DELAY TIMES.
LATCH ENABLE TO Q OUTPUTS

TEXAS . . ,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265.

3-79

3-80

SN6555~

SN65556, SN7555~ SN75556
ELECTROLUMINESCENT COLUMN DRIVER
02744. APRIL 19S5-REVISED JULY 1990

SN65555.SN75555

• Each Device Drives 32 Electrodes

N PACKAGE

{TOP VIEW}

• 90-V Output Voltage Swing Capability
Using Ramped Supply

017
016
015
014
013
012
011
010
09
08
07
06
05
04
03
02
01
SERIAL OUT
CLOCK
GND

• 15-mA Output Source and Sink Current
Capability
• High-Speed Serially-Shifted Data Input
• Totem-Pole Outputs
• Latches on All Driver Outputs
description
The SN65555. SN75555. SN65556. and
SN75556 are monolithic BIDFETt integrated
circuits designed to drive the column electrodes
of an electro-luminescent display. The SN65556
and SN75556 output sequence is reversed from
the SN65555 and SN75555 for ease in printed
circuit board layout.
The devices consist of a 32-bit shift register. 32
latches. and 32 output AND gates. Serial data
is entered into the shift register on the low-tohigh transition of CLOCK. When high. LATCH
ENABLE transfers the shift register contents to
the outputs of the 32 latches. When OUTPUT
ENABLE is high. all Q outputs are enabled. Data
must be loaded into the latches and OUTPUT
ENABLE must be high before supply voltage
VCC2 is ramped up.
Serial data output from the shift register may be
used to cascade shift registers. This output is not
affected by LATCH ENABLE or OUTPUT
ENABLE.

018
019
020
021
022
023
024
025
026
027
028
029
030
031
032
OUTPUT ENABLE
DATA IN
LATCH ENABLE
VCCl
VCC2

SN65555.SN75555
FN PACKAGE

(TOP VIEW}
NM~&.()

20

I>

2D I>
I>

20

3

3
3

··
·

:

(1) 017

20

I>

(40)018

20

I>

(401 015

3

(1)016
,

(27) 031

20 I>
20 I>

(261 032

(18) SERIAL OUT

tThese symbols are in accordance with ANSIIIEEE Std 91-1984 and lEe Publication 617-12.
Pin number. shown are for N packages.

TEXAS . "

INSTRUMENTS
3-82

(27) 02

3

POST OFFICE BOX 6!i5303 • DALLAS. TEXAS 76266

3
3

:
(16) 031
(17) 032
(18) SERIAL OUT

SN65555, SN65556, SN75555, SN75556
ELECTROLUMINESCENT COLUMN DRIVER

logic diagram (positive logic)
VCC2----------------------------------------------------~

OUTPUT
ENABLE - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ,
LATCH
ENABLE

--------I

DATA IN
CLOCK

OUTPUT
BUFFERS

----.-----t>

I-+---Ql

t-+---Q2

2B STAGES
fQ3 THRU Q3DI
NOT SHOWN

1-+---Q31

1------Q32

> - - - - - - - - - - - - S E R I A L OUT

FUNCTION TABLE
CONTROL INPUTS
LATCH

FUNCTION

OUTPUT

CLOCK ENABLE ENABLE
LOAD
LATCH
OUTPUT
ENABLE

X
X

X
X
L
H

X
X
X
X

X
X

X
X

H

!
No!

L

SHIFT REGISTER

LATCHES

Rl THRU R32

LC 1 THRU LC32

Load and shift t
No change
As determined above

Determined by LATCH ENABLE'

OUTPUTS
SERIAL
R32
R32

Stored data

R32

New data

R32

As determined above Determined by LATCH ENABLE'

Ql THRU Q32
Determined by OUTPUT ENABLE
Oetermined by OUTPUT ENABLE

R32

All L

R32

LC1 thru LC32, respectively

H = high level, L = low level, X = irrelevant, I = low-to-high-Ievel transition.
tR32 and the serial output take on the state of R3l. R3l takes on the state of R30 .... R2 takes on the state of Rl, and Rl takes on
the state of the data input.
*New data enter the latches while LATCH ENABLE.is high. These data are stored while LATCH ENABLE is low.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3-83

SN65555. SN65556. SN75555. SN75556
ELECTROLUMINESCENT COLUMN DRIVER
typical operating sequence

unununUnL ••• IUU1J1JlJ

CLOCK - - - ,

DATA IN

SR CONTENTS

VALID

IRRELEVANT

INVALID

VALID

LATCH ENABLE _ _ _ _ _ _ _ _ _ _---Jnl...'_ _ _ _ _ __

CONTENTS
__________________________________
L-______________________
___
LATCH
PREVIOUSLY STORED DATA
NEW DATA VALID

OUTPUT
ENABLE __________________________________~

-J!

VCC2 ______________________________

\'------

___

QOUTPUTS ____________________________________~I'

V_A_L_ID
___
"~____________

schematic of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL Q OUTPUTS

VCC1------~~----. .~--

INPUT

VCC2

-"''VVI...-4H.

OUTPUT

....- -....-

OUTPUT

- - - -.......~---e~GND

GND --......- - - - - - - -............

TEXAS

3-84

TYPICAL OF SERIAL OUTPUT

-------~------ VCC1

.If

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TEXAS 762.86

SN65555. SN65556. SN75555. SN75556
ELECTROLUMINESCENT COLUMN DRIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 18 V
Supply voltage, VCC2 (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 90 V
Input voltage ..................................................... VCC1 + 0.3 V
Ground current ............................................ , . . . . . . . . . . . .. 700 rnA
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: SN65555, SN65556 ................ "
-40°C to 85°C
SN75555, SN75556 ..................... OOC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Case temperature for 10 seconds: FN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package ... , ....... " 260°C
NOTES: 1. Voltage values are with respect to network ground terminal.
2. These devices have been designed to be used in applications in which the high-voltage supply. VCC2. is switched to ground
before changing the state of the outputs.
DISSIPATION RATING TABLE
DERATING FACTOR

PACKAGE

TA :5 25°C
POWER RATING

FN

1700 mW

ABOVE TA - 25°C
13.6 mW/oC

N

1250 mW

10.0 mW/oC

TA - 70°C
POWER RATING

TA - 85°C
POWER RATING

10S8 mW

8S4mW

800 mW

650mW

recommended operating conditions
VCCl

Supply voltage

VCC2

Supply voltage

VIH

High-level input voltage (see Figure 11

VCCl
VCC1
VCCl

=
=
=
=

10.8 V
15 V
10.8 V

MIN

NOM

MAX

10.S

12

15

0

80

S.l

11.1

11.25

15.3

-0.3 t
-0.3 t

2.7

UNIT
V
V
V

VIL

Low-level input voltage (see Figure 11

IOH

High-level output current

IOL
10K
fclock

Clock frequency

tw(CLKI
tw(LEI

Pulse duration, CLOCK high or low (see Figure 21

SO

ns

Pulse duration, LATCH ENABLE

80

ns

tsu

Setup time

VCC1

15 V

3.75

V

-15

mA

Low-level output current

15

mA

Output clamp current

20

mA

6.25

MHz

0

DATA IN before CLOCKt (see Figure 21

500

OUTPUT ENA8LE after VCC2t (see Figure 4)

100

th

Hold time

dv/dt

Rate of rise for VCC2

TA

Operating free-air temperature

tThe algebraic convention, in

20

OUTPUT ENABLE before VCC2t (see Figure 41
DATA IN after CLOCKt (see Figure 21

ns

SO

ns
SO

I SN65555, SN65556
I

SN75555, SN75556

-40

85

0

70

V/~s

°C

~hich the least positive (most negative) value is designated minimum, is used in this data sheet for logic

voltage levels.

.

TEXAS"

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75266

3-85

SN65555, SN65~56, SN75555. SN75556
ELECTROLUMINESCENT COLUMN DRIVER
electrical characteristics over recommended operating free-air temperature range. VCC1 - 12 V.
VCC2 = 80 V
PARAMETER
VOH

High-level output voltage

VOL

Low-level output voltage

IIH

High-level input current

TEST CONDITIONS
10

SERIAL OUT
Q outputs
SERIAL OUT

IlL

Low-level input current

ICCl
ICC2

Supply current from VCCl
Supply current from VCC2

MIN
77
10.5

= -15 mA
10 = -100 ItA
10L = 15 mA
10L = 100 ~A
VI = 12 V
VI = 0

Q outputs

MAX

UNIT
V

8
1

V

1

~A

-1

~A

2

mA

5

mA

switching characteristics. VCC1

tpHL
tpLH
td

PARAMETER
Propagation delay time, high-to-Iow-Ievel

TEST CONDITIONS

MIN

CL = 20 pF to ground, VCC2
See Figure 3

SERIAL OUT from CLOCK
Propagation delay time, low-to-high-Ievel

= 0,

SERIAL OUT from CLOCK
Delay time, VCC2 to Q outputs

=

dv/dt

80

Vt~s,

See Figure 4

RECOMMENDED OPERATION CONDITIONS
INPUT VOLTAGE LOGIC-LEVEL LIMITS
vs

SUPPLY VOLTAGE VCe1
12
TA =

I

10

>I

..'"

!

~UII Rang~

I" ,,\~

tJ\~
~

8

,,-

----

1!

.."

~ 6
Q.

C

"T

>

4

-

2

o

10

11

Maximum VIL

12

13

14

vee-Supply Voltage-V

FIGURE 1

TEXAS ."

3-86

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

15

MAX

UNIT

140

ns

140

ns

100

ns

SN65555, SN65556, SN75555, SN75556
ELECTROLUMINESCENT COLUMN DRIVER
PARAMETER MEASUREMENT INFORMATION
M--tw(CLK)-----.I

..1 ___

I
I

VIH

I

CLOCK

1 - - - - - ' 1I
I4--tw(CLK)~

jf--tsu--*-th-+l

I

:

DATAIN~

VIH

~VIL

VALID

FIGURE 2. INPUT TIMING VOLTAGE WAVEFORMS

-It~

CLOCK _ _ _

-+I

j+-tpLH

If
I
I

SERIAL OUT

I

I

,...-------VOTI

5~

----+1..1~

-------vOL

!4-tPHL

~:-

SERIAL OUT - - - - . ; .....

-

-

-

-

-

-

VOH

"-.- - - - - - - - VOL

FIGURE 3. VOLTAGE WAVEFORMS FOR PROPAGATION DELAY
CLOCK TO SERIAL OUTPUT

----..IfI r-------""'"
5~
~5~

OUTPUT _ _ _
ENABLE

VIH

~

I "-----VIL
I

I

tsu_~_Y,~"---1'"'\~ ~ th ----::V

VCC2 _ _ _

I
td-tlJ

VIf-.--_--.
VALID \

QOUTPUT

&-

-

-

-

-

-

-

_

FIGURE 4. VOLTAGE WAVEFORMS FOR DELAY TIMES, VCC2 TO

TEXAS

Va ...
VOL

a

OUTPUTS

~

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS, TEXAS 76265

3-87

3-88

SN65557, SN65558, SN75557, SN75558
ELECTROLUMINESCENT ROW DRIVERS
02999. DECEMBER 1985-REVISED OCTOBER 1989
SN65557, SN75557 .. , FN PACKAGE

•

Each Device Drives 32 Electrodes

•

High-Voltage Open-Collector N-P-N Outputs
Using Ramped Supply

•

300-mA Output Current Capability

•

CMOS-Compatible Inputs

•

Very Low Steady-State Power Consumption

ITOPVIEW)
_OO'lCOr--.COl.Oo:::tMN

u
00000000002
NN..- ..................................

6 5 4 3 2 1 4443424140

description
These devices are monolithic BIDFETt integrated
circuits designed to drive the row electrodes of
an electroluminescent display. All inputs are
CMOS-compatible and all outputs are highvoltage open-collector n-p-n transistors. The
SN65558 and SN75558 output sequences are
reversed from the SN65557 and SN75557 for
ease in printed circuit board layout.
The devices consist of a 32-bit shift register, 32
AND gates, and 32 output OR gates. Typically,
a composite row drive signal is externally
generated by a high-voltage switching circuit and
applied to the SUBSTRATE COMMON terminal.
Serial data is entered into the shift register on
the high-to-Iow transition of the clock input. A
high ENABLE allows those outputs with a high
in their associated register to be turned on
causing the corresponding row to be connected
to the composite row drive signal. When
STROBE is low, all output transistors are turned
on. The Serial Data output (SERIAL OUT) from
the shift register may be used to cascade
additional devices. This output is not affected by
the ENA8LE or STROBE inputs.
The SN65557 and SN65558 are characterized
for operation from - 40°C to 85 DC. The
SN75557 and SN75558 are characterized for
operation from Doe to 70 oe.

NC
022
023
024
025
026
027
028

7
8
9
10
11
12
13
14
15
16
17

39
38
37
36
35
34
33
32
31
30
29
1819202122232425262728

SN65558, SN75558 . ' , FN PACKAGE
(TOP VIEW)
NMo:::tLDCOr--OOcnO..-

..- .................................. NC\lU

00000000002
6
NC
011
010
09
08
07

7
8
9
10
11
12
13
14
15
16
17

5 4 3 2 1 4443424140

39
38
37
36
35
34
33
32
31
30
29
1819202122232425262728

026
027
028
029
030
0'31

NC-No internal connection

t BIDFET

-

Bipolar, double-diffused, N-channel and P-channel MOS transistors on same chip -

documanls contoin informalion

PRODUCTION DATA
cumnt as of publication data. Products conform to
specificationl per the terms of Teus Instruments

=~ri~a{.':J~1.; =3:~i:r :.\o=~~:;.~. nol

TEXAS

..If

patented process

Copyright © 1989, Texas Instruments Incorporated

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 16265

3-89

SN65557, SN65558, SN75557, SN75558
ELECTROLUMINESCENT ROW DRIVERS

logic symbols t
SN65557.SN75557

SN65558.SN75558

CMOS/EL DISP

CMOS/EL DISP
SUBSTRATE ~
[~ EMITTER SUPPLY)
COMMON
STROBE ~ V3

SUBSTRATE ~
[~ EMITTER SUPPLY)
COMMON
STROBE ~ V3
ENABLE

.!!!L

G2

ENABLE
SRG 32

CLOCK

.!lli...t. >Cl/-

CLOCK

DATA IN ~ID

···
···

··
···

2.3
2.3

I>
I>

r
~p.....@!l 01
o~ 02

2.3

I>
I>

~~ 011
~~ 012

I>
I>

~~ 016

I>
I>

~~ 021
~J:>-.!!!l 022

I>
I>

~~ 031

···
···
···
··

2.3

2.3
2.3

2.3

2.3

2.3
2.3

DATA IN

.!!!L

G2

.,

SRG 32

.!lli...t. t>ClIr

~ID

~ 015

oj:>..J!!!l 032
~ SERIAL OUT

···
···
···
···

I>
I>

2.3

I>
I>

0 ~ 012

I>
I>

~~ 018

···
···

2.3

2.3

···
···

2.3

2.3
2.3

2.3

2.3

tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and lEe Publication 617-12.

logic diagram (positive logic)
SU~~~~~~

______________________________________-,

STROBE------------------~
ENABLE--------------~

DATA IN - - - - - I
CLOCK - -.....~i>

031

032

L--------------------------SERIAL OUT

3-90

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75266

~PO.J!!!l. 01

2.3
2.3

I>
I>

I>
I>

·6~ 02

~ 011

~~ 017

~~ 021

~~ 022

~~ 031

~~ 032

~ SERIAL OUT

SN65557. SN65558. SN75557. SN75558
ELECTROLUMINESCENT ROW DRIVERS
FUNCTION TABLE
FUNCTION
LOAD

CONTROL INPUTS
STROBE

~

X
X

X
X

Load and Shift

R32

No Change

R32

Determined by ENABLE and STROBE

L

H

As determined above

R32

All Q outputs off

ENABLE

H

H

As determined above

R32

X

L

As determined above

R32

Determined by R1 through R32
All Q outputs on

X
X
X

~

R1 THRU R32

SERIAL

OUTPUTS
Q1 THRU Q32

ENABLE

No

STROBE

SHIFT REGISTERS

CLOCK

Determined by ENABLE and STROBE

H = high level, L = low level, X = im;levant, ~ = high-to-Iow transition.
tRegister R32 takes on the state of R31, R31 takes on the state of R30, ... R2 takes on the state of Rl, and Rl takes on
the state of the data input.

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL Q OUTPUTS

VCC--------e-----e-.---

....---....-

OUTPUT

TYPICAL OF SERIAL OUTPUT

==r

~

VCC

)~'"'~

INPUT--e-JIIIoII.-_"

--~

~

SUBSTRATE
COMMON

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 76285

3-91

SN65557, SN65558, SN75557, SN75558
ELECTROLUMINESCENT ROW DRIVERS

typical operating sequence

Ur_----.......
u __________

CLOCK

.In - - - - - - - - - - - - -- -

OATA IN _ _ _

II

...,- - - - - - -

SN65557. SN75557
ENABLE - - - - - - '
SN6555B. SN7555B
ENABLE

-

- -

VIH
SUBSTRATE COMMON

:~BSTRATE COMMON
VIH
SUBSTRATl: COMMON
VIH
SUBSTRATE COMMON

RAMPEO COMPOSITE ROW
DRIVE APPLlEO TO
SUBSTRATE COMMON

SN65557. SN75557
01 OUTPUT

SN6555B. SN7555B
01 OUTPUT

SN65557.SN75557
02 OUTPUT

u~

_______ ~ ____ ~:V

V__________ ~:V
V_______ ~:V
~~:V

SN6555B. SN75558
02 OUTPUT
HV

=

High voltage

TEXAS

3-92

~

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 76285

SN65557. SN65558. SN75557. SN75558
ELECTROLUMINESCENT ROW DRIVERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 18 V
Off-state output voltage, VO(off) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 110 V
Input voltage ........................................................ VCC+0.3 V
Substrate common terminal current (see Note 3) ................................ 750 mA
Continuous total power dissipation at (or below)
25°C free-air temperature (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1700 mW
Operating free-air temperature range: SN65557, SN65558 .................. -40°C to 85°C
SN75557, SN75558 ..................... DoC to 70°C
Storage temperature range ......................................... - 65 °C to 150°C
Case temperature for 10 seconds. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260 DC
NOTES:

1. Voltage values are with respect to SUBSTRATE COMMON terminal.
2. Data must be clocked into the shift register and Q outputs enabled prior to ramping SUBSTRATE COMMON to - HV (see
typical ope"rating sequence).
3. Duty cycle is limited by package dissipation.
4. For operation above 25°C free-air temperature, derate linearly to 1088 mW at 70°C, and 884 mW at 85°C at the rate
of 13.6 mW/oC.

recommended operating conditions
Supply voltage, V CC
VCC = 10.8 V

High-level input voltage, VIH (see Figure 1)

Vec = 15V
VCC = 10.8 V

low-level input voltage, Vil (see Figure 1)

VCC = 15V

MIN

NOM

MAX

10.8

12

15

8.1

11.1

11.25
-0.3

15.3

-0.3

3.75
100

2.7

-0.3

Off-state Q output voltage, VO(off)
On·state Q output current, 10(on), duty cycle s 1 %, VCC = 15 V
Rate of rise for SUBSTRATE COMMON, dV/dt (see Figure 4)

Setup time, tsu

TEST

PARAMETER
Off-state Q output current

VOH

High-level output voltage

VVOl

low-level output voltage

MHz

CONDITIONS

Vo

I Serial outputs
II Q outputs
.
Serral output

ns
ns
ns

-40

85

0

70

electrical characteristics over recommended operating free-air temperature range,
otherwise noted)

10(off)

VIpS

100

Operating free-air temperature, T A

SN75557

SN65558

SN75558

= 100V

10 = -100 !LA

IIH

High-level input Current

III

Low-level input current

VI

ICC

Supply current from V CC

MAX

MIN

20
10.5

IOl = 300 mA
10l = 100 !LA
VI = 12 V

Vee -

SN65557
MIN

=0

V

4

500

I SN65557, SN65558
I SN75557, SN75558

V

100

50

Hold time, th, DATA IN after CLOCK. (see Figure 2)

V

rnA

125

I DATA IN before CLOCK, (see Figure 2)
I ENABLE before SUBSTRATE COMMON, (see Figure 4)

V

300
0

Clock frequency, fclock
Pulse duration, CLOCK high or low, tw

UNIT

12

°c

V (unless
UNIT

MAX
10

10.5

~A

V

20

10

1

1

1
-1

1
-1

~A

250

250

~

V

~

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 75265

3-93

SN65557, SN65558, SN75557, SN75558
ELECTROLUMINESCENT ROW DRIVERS
switching characteristics, VCC .. 12 V, TA - 25°C

tpHL

PARAMETER
Propagation delay time, high-to-Iow-

TEST CONDITIONS

level SERIAL OUTPUT from CLOCK

CL = 20 pF to SUBSTRATE COMMON
(see Figure 3)

tpLH

Propagation delay time, low-to-highlevel SERIAL OUTPUT from CLOCK

td(on)

Turn-on delay time, Q outputs
from ENABLE

MIN

dVldt = 100 VIp.S, STROBE at VCC,
RL = 2 kll to 60 V (see Figure 4)

RECOMMENDED OPERATING CONDITIONS
INPUT VOLTAGE LOGIC-LEVEL LIMITS

vs
SUPPLY VOLTAGE
12
TA -

6 e to 76
0

~

>

8

,.

6

"

e
~

10
I
en

0

~

~NIMUMVIH

~
0

>

0.

C

"j

'>

4

-

2

MAXIMUM VIL

o
10

11

12

13

14

Vee-Supply Voltage-V

FIGURE 1

TEXAS . .

3-94

INSTRUMENTS
POST OFFice BOX 655303 • DAUAS, TEXAS 75285

15

MAX

UNIT

200

n.

200

ns

500

ns

SN65557, SN65558, SN75557, SN75558
ELECTROLUMINESCENT ROW DRIVERS
PARAMETER MEASUREMENT INFORMATION

CLOCK

I

~tw

I

~I

j4-tsu.......M-th~

I

DATA IN

~

I

~

VALID

VIH
VIL

FIGURE 2. INPUT TIMING VOLTAGE WAVEFORMS

r---{""'--""'\\~%-

----VIH

CLOCK

1
1f--~~l-tpLH

~~

14

tpHL

--Jy.,..o-%----~n

VIL

.,
50.sl- - - VOH

SERIAL OUT _ _ _ _

"'LVOL

FIGURE 3. VOLTAGE WAVEFORMS FOR PROPAGATION DELAY TIMES. CLOCK TO DATA OUT

, . . - - - - - - - - - - VIH

ENABLE

1'0%- - - - - - - - - -

---------~-I-

VIL

I

k- t SU*-td---1
SUBSTRATE
COMMON

. ·\--r----"

~.-~-------60V

1

1

--------------":::90:::%~X_
QOUTPUT

.- - - - - 0V

\
~------VOL

FIGURE 4. VOLTAGE WAVEFORMS FOR TURN ON DELAY TIME.
SUBSTRATE COMMON TO Q OUTPUT

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

3-95

SN65551.

SN6555~

SN15551. SN75558

ELECTROLUM!NESCENT ROW DRIVERS

TYPICAL CHARACTERISTICS
ON-STATE Q OUTPUT CURRENT
vs
ON-STATE Q OUTPUT VOLTAGE
300

 2.3Q ::::=! (40) 01

10

2.3~

2.3Q ::::-J.

I>

···

I>

···

I>

···

2,3~

2.3Q
2.3~

2.3Q

···
I>
I>

2.3~

2.3Q
2.3~

h::J.

n
tl

2.3Q h::J.

(411

(11)
(12)

(28)

[~ DRAIN SUPPLY]

J

.....

(Q SOURCE SUPPLY
EN3(OUTPUT ENABLE)
EN2(OUTPUT SELECT)
SRG34
C1/-

,

r
C>

10

C>

02

···

C>

016

C>

017

···
033

(29)
Q34
(30) SERIAL
OUT

'IThese symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

TEXAS . "

INSTRUMENTS
3-98

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

···

···
C>
C>

2.3~

:::::-l

(29)

2.3Q ::::-J.

(28)

2,3Q
2.3~

2.3~

:::=l

(12)

:::J.

(11)

:::J.

(41)

:::J.
2.3Q

(40)

2.3Q
2.3~

2.3Q

2,3~

2.3Q
2.3~

01
Q2

018
019

033
034

(30) SERIAL
OUT

SN65563A, SN65564A, SN75563A, SN75564A
ELECTROLUMINESCENT ROW DRIVERS

logic diagram (positive logic)
vCC2--------------------------------------------------,

PO~~:~~ -----------------4'---------------,

n-+--------------------- SERIAL OUT

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL Q OUTPUTS

SERIAL OUTPUT

r-------------VCC3
VCC1--------.-----.-~---

INPUT --,-JV\jI\r-"'-"

.--~.-VCC2

t-..~·OUTPUT

_--_----.l--t[J
.......

- - - V CC1

}-oo~
--~~

------I17..-lJ~t------VSS

vss~~------~~e_...----

TEXAS " ,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

3-99

SN65563A, SN65564A, SN15563A, SN15564A
ELECTROLUMINESCENT ROW DRIVERS
typical operating sequence

---.., r-------..,
CLOCK
OATA IN

U

U --- --- -----

---fI- - - - - - - - - - - - - - - - - - - - -

VIH
VSS

-~~HS

-----VIH

ENABLE

'------VSS

POSITIVE WRITE CYCLE

VSS ______________________________________ SYSTEMGNO

FIRST
OUTPUT

/

\

- - - - - - - - - - - - - - - :Y:::MGNO

----'
SECOND
OUTPUT

/
- - - - - - - I

NEGATIVE WRITE CYCLE
POSITIVE - - , WRITE

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

•

VSS

V CC2
and VCC3
VSS

FIRST
OUTPUT

V select;

\'------11
\'--__oJI _______________ ~Y:::M GND

SECOND
OUTPUT
f HV = high voltage
'During the negative write cycle, the VCC2 and VCC3 supplies are in a high-impedance state.

TEXAS •
3-100

- VIH

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

SN65563A, SN65564A, SN75563A, SN75564A
ELECTROLUMINESCENT ROW DRIVERS

absolute maximum ratings over operating free-air temperture range (unless otherwise noted)
Supply voltage, VCC1 (see Note') ............................................ , 15 V
Supply voltage, VCC2 ............. '.' ....................................... 240 V
Supply voltage, VCC3 ...................................................... 240 V
Supply voltage, VSS ..................................................... - 240 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.3 V to VCC1 + 0.3 V
Continuous total power dissipation at (or below) 25°C free-air temperature
(see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1700 mW
Operating free-air temperature range: SN65563A, SN65564A . . . . . . . . . . . . . . .. -40°C to 85°C
SN75563A, SN75564A .................. OOC to 70°C
Storage temperature range ......................................... - 40°C to 125°C
Case temperature for 10 seconds ... '. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
NOTES: 1. Voltage values are with respect to VSS.
2. For operation above 25°C free-air temperature, derate to 1088 mW at 70°C or 884 mW at 85°C at the rate of 13.6 mW/oC.

recommended operating conditions (see Note 1, Figure 1, and Figure 2)
Supply voltage, VCCI
Supply voltage, V CC2
Supply voltage, VSS

MAX

12

13.2

V

VCC3
235

v

0

High-level input voltage, VIH

0.75VCCI
-0.3

Low-level input voltage, VIL t

Low~level

NOM

7.5
VCC3-15
0

Supply voltage, VCC3

High-level output current, IOH

MIN

I SN65563A,SN65564A
I

V

VCCI +0.3

V

0.25VCCI
-100
150

Output clamp current, 10K
Clock frequency, fclock

V

-235

-120

SN75563A,SN75564A

output current, IOL

UNIT

V
rnA
rnA

± 150

rnA

4

MHz

Pulse duration, CLOCK high or low, twCLK

125

ns

Setup time, OATA IN high or low before CLOCK+, tsu 1

100·

ns

Setup time, CLOCK low before VCC2t or VSS+, tsu2

300
300

ns

Setup time, ENABLE high before VCC2t or VSS+' tsu3
Setup time, POSITIVE WRITE high or low before VCC2t or VSS+' tsu4

300

ns

Hold time, DATA IN high or low after CLOCK+, th 1

100

ns

Hold time, CLOCK high after VCC2+ or vsst, th2

300

ns

0

ns

Hold time, POSITIVE WRITE after VCC2+ or vsst, th4
Hold time, ENABLE low between
I SN65563A, SN65564A

0
12

ns

I SN75563A, SN75564A
successive VCC2t, th5
Hold time, ENABLE low between successive VSSI, th6

10

Hold time, ENABLE high after VCC2+ or vsst, th3

Operating free-air temperature, T A

I SN65563A, SN65564A
I SN75563A, SN75564A

ns

p.s

ns

300
-40

85

0

70

°C

tThe algebraic convention, in which the less p~sjtjve (more negative) limit is designated as minimum, is used in this data sheet for logic

voltage levels only.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 856303 • DALLAS. TEXA.S.75286

3-'01

SN65563A, SN65564A, SN75563A, SN75564A
ELECTROLUMINESCENT ROW DRIVERS
electrical characteristics over recommended operating ranges of VCC1 and free-air temperature range.
VCC2 = 235 V. VCC3 = 235 V. VSS - 0 (unless otherwise noted)
PARAMETER

1010f!)
VOH
VOL

TEST CONDITIONS

Off-state Q output current

MIN

Va = 235 V

MAX

50

High-level

Q outputs

Va = 0
10 = -70 rnA

output voltage
Low-level

SERIAL OUT
Q outputs

10 - -100 ~A,
10 = 150 rnA

output voltage

SERIAL OUT

10=100~A

-50
VCC1 - 12 V

VCC2- 3O
10_5

High-level input current

VIH = VCC1

IlL

Low-Ievet input current

ICC1

Supply current from VCC1

VIL = 0
One Q output high

ICC3

Supply current from V CC3

30
100
-100
4

All Q outputs low or high impedance

2

One Q output high
All Q outputs low or high impedance

~A

V

1

IIH

UNIT

V
~A

~

rnA

10

rnA

200

~A

switching characteristics operating range of VCC1. T A .. 25°C
PARAMETER

tpLH
tpHL

TEST CONDITIONS

Propagation delay time, low-to-high
level serial output from clock
Propagation delay time, high-to-Iow

CL = 50 pF to VSS,
See Figures 3 and 4

level serial output from clock

PARAMETER MEASUREMENT INFORMATION

FIGURE 1_ INPUT TIMING VOLTAGE WAVEFORMS

TEXAS •

3-102

INSTRUMENTS
POST O~FICE BOX 665303. DALLAS. TEXAS 75285

MIN

MAX

UNIT

400

ns

400

ns

SN65563A, SN65564A,SN75563A, SN75564A
ELECTROLUMINESCENT ROW DRIVERS
PARAMETER MEASUREMENT INFORMATION

ENABLE

!

PO:~II~: -----'"\X~g~

~g~)(r-------- :IH

--------J~I~~-I~------------~i~I~~1

VCC2t
and VCC3

IL

k. oo:}t-------y::
__
,

14- tsu4""

,.

I

~I

th4

______________-J,

'\'-%_________1_0_:J!~ _______ \

::~~ '"

tTiming waveforms are with respect to VCC2 or VSS. as appropriate.

FIGURE 2. CONTROL INPUT TIMING VOLTAGE WAVEFORMS

CLOCK

i'----..J
I4-tpLH~

I

,..----------i; f

SERIAL OUT _ _ _ _ _.,,(0%

FIGURE 3. VOLTAGE WAVEFORMS FOR PROPAGATION DELAY TIMES. CLOCK TO DATA OUT
OUTPUT
UNDER
TEST

-----1. . ------

TEST
POINT

'"-i~'
FIGURE 4. LOAD CIRCUIT
teL includes probe and jig capacitance.

TEXAS .."

INSTRUMENTS
POST OFACE BOX 865303 • DALLAS. TEXAS 75265

3-103

3-104

SN751506, SN751516
DC PLASMA DISPLAY DRIVERS
03005, DECEMBER 1986-REVISED JULY 1989

•

Each Device Drives 32 Lines

•

180-V Open-Drain Parallel Outputs

•

220-mA Parallel Output Sink Current
Capability

•

CMOS-Compatible Inputs

•

Strobe Input Provided

SN751506 ... FT PACKAGE
(TOP VIEW)

•

Serial Data Output for Cascade Operation

•

Inputs Have Built-in Electrostatic Discharge
Protection

Q32
Q3l
Q30
Q29
Q28
Q27
Q26
Q25
Q24
Q23
Q22
Q2l
Q20
Q19
Q18
Q17

description
The SN751506 and the SN751516 are
monolithic integrated circuits designed to drive
the scan lines of a dc plasma panel display. The
SN751516 pin sequence is reversed from the
SN751506 for ease in printed circuit board
layout,

NC
GND
NC
NC
CLOCK

Each device consists of a 32-bit shift register and
32 OR gates. Serial data is entered into the shift
register on the high-to-Iow transition of the clock
input. When STROBE is low, all Q outputs are
in the off-state. Outputs are open-drain JFET
transistors with a breakdown voltage in
excess of 180 V. The outputs have a 220-mA
sink current capability in the on state. Only one
Q output should be allowed to be in the on state
at a time,

VCC
NC
SERIAL DUT

Ql
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Ql0
Qll
Q12
Q13
Q14
Q15
Q16
NC
GND
NC
STROBE
NC
VCC
NC
DATA IN

SN75l5l6 ... FT PACKAGE
(TOP VIEW)

Ql
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Ql0
Qll
Q12
Q13
Q14
Q15
Q16

Serial data output from the shift register may be
used to cascade shift registers. This output is not
affected by the strobe input. All inputs are
CMOS compatible with ESD protection built in.
The SN751506 and SN751516 are
characterized for operation from OOC to 70°C.

NC
GND
NC
STROBE
NC
VCC
NC
DATA IN

Q32
Q3l
Q30
Q29
Q28
Q27
Q26
Q25
Q24
Q23
Q22
Q2l
Q20
Q19
Q18
Q17
NC
GND
NC
NC
CLOCK
VCC
NC
SERIAL OUT

NC-No internal connection

PRODUCTION DATA do.umants contain information
camot as of publication date. Products conform to

specifications per the terms of Texas Instruments

:~~~:~~~ai~:1~7i =:~::i:r :,~o::::::.:~~ not

Copyright @ 1989. Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

3-105

SN751506. SN751516
DC PLASMA DISPLAY DRIVERS
logic symbols t
SN751506

SN751516

CMOS!
PLASMA DISP

CMOS!
PLASMA DISP

CLOCK

CLOCK

C>2~
C>2 ~

DATA IN

••
•

C>2~

•
••

[>2~

•
••

(48)
(47)

••
•

01

(1)

DATA IN

[>2Q

02

[>2Q

••
•

(33) 016
(16)
017

[>2 Q

•
••

•
••

(2) 031

[>2 Q

•
••
[>2 Q

(1) 032

[>2 Q

(24) SERIAL OUT
tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and lEe Publication 617-12.

logic diagram (positive logic)
STROBE
r----.,Rl

I---+---r-...........

CLK

>------01

32-BIT
STATIC
SHIFT
REGISTER

DATA IN

R2
>------02

•
•
•

•
•
•

28 OUTPUTS
(03 THRU 030)
NOT SHOWN
>------031

>------032

' - - - - - i . : _ - - - - - - SERIAL
OUT

FUNCTION TABLE
FUNCTION
LOAD
STROBE

CONTROL INPUTS
CLOCK

I STROBE

SHIFT REGISTERS
R1 THRU R32

SERIAL

l

X

Load and shift ~

R32

Nol

X

No change

R32

X

L

X

H

As determined above

H = high level, L' = low level, X = irrelevant,

~

OUTPUTS
01 THRU 032
Determined by STROBE

R32

All high impedance

R32

Rl thru R32

= high to low transition.

*R32 takes on the state of R31, R31 takes on the state of R30, ... R2 takes on the state of Rl,
and Rl takes on the state of the data input.

TEXAS ."

3-106

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

(2)

••
•

01
02

(16)
016
(33)
017

••
•
(47)
(48)

(25)

031
032
SERIAL OUT

SN751506, SN751516
DC PLASMA DISPLAY DRIVERS
typical operating sequence
CLOCK

OATA INt

JlJU1.Jl.f · · · 1JUlfUl~----------------------VALID

IRRELEVANT

--~------------------~----~~~~--------

SHIFTCONTENTS
R E G_
IS
T_
E_
R
-_
- ._
,-_
- -_
--_
- -_
--_
- -_
-.....
--_
-_
-_
-_
--------_~
_
_
_
_
L-_
___
VALID_ _ _ _ _ _ __
INVALID

STROBE

------------------------~

OUTPUTS

VALID

OFF STATE

OFF STATE

tOnly 1 bit in 32 should be low in the input data.

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL Q OUTPUTS

TYPICAL OF SERIAL OUTPUT
----~...e----------VCC

VCC----------e_----.-e-

e--4~~~"""'Ar-OUTPUT

INPUT -JVVY-....."""'Ar. . . .

-----4~----~~----GND

GND----~----------...~

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) ...................................... - 0.4 V to 7 V
On-state Q output voltage, Va. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.4 V to 125 V
Off-state Q output voltage, Va ...................................... -0.4 V to 180 V
Input voltage ............................................... -0.4 V to VCC +0.4 V
Serial output voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.4 V to VCC + 0.4 V
Q output on-state time duration (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 100 p's
Q output duty cycle (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1/200
Continuous total power dissipation at (or below) 25°C free-air
temperature (see Note 3) ............................................. 1025 mW
Operating free-air temperature range, TA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. O°C to 70°C
Storage temperature range ......................................... - 55 °C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260°C
NOTES:

1. Voltage values are with respect to GND.
2. Only one

a output should be on at a time.

3. For operation above 25°C free-air temperature, derate linearly to 656 mW at 70°C at the rate of 8.2 mW/oC.

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75286

3-107

SN751506, SN751516
DC PLASMA DISPLAY DRIVERS

recommended operating conditions
MIN

NOM

MAX

4

5

6

V

110

V

Supply voltage, VCC
Peak on-state

a output voltage,

High-level input voltage, V,H

VOlonl
VCC = 4 V

3.2

VCC = 6 V

4.8

V
0.8

VCC = 4 V
VCC = 6 V
Output current, 10 (TA = 25°C).

Low-level input voltage, V,L

1.2

Clock frequency, fclock

1.5 t
5
2
1
1.2
0

Pulse duration, CLOCK high or low, twCLK
Pulse duration, DATA, twD
Pulse duration, STROBE, twSTRB
Setup time, DATA IN before CLOCK+, tsu
Hold time, OATA IN after CLOCK+, th
Operating free-air temperature, T A

UNIT

V

220

rnA

200

kHz
p.S
p.S

p.s
p.s
p's

70

°c

t The minimum clock period is 5 p.s.

electrical characteristics, Vee - 5 V, TA - 25°e (unless otherwise noted)
PARAMETER

TEST CONDITIONS

MIN

SERIAL OUT

'OH = -0.1 rnA

4.5

a outputs

10L = 180 rnA

VOH

High-level output voltage

VOL

Low-level output voltage

SERIAL OUT

IOL = 0.1 rnA

'O(offl
IOL

Off-state output current

a outputs

VOH-ll0V

Low-level output current

Q outputs

VOL=16V

IIH

High-level input current

',L
Ci

Low-level input current

ICC

Supply current

All

UNIT
V

0.5
1
220

V

p.A
rnA

1
-1

a outputs off

1

One O' output on

p.A

p.A
pF
rnA

20

40

TYP

MAX

0.2

0.5

p.S

0.2 t
0.35 t

0.6
1

p.s

0.1

0.3

p's

0.35

1

p.s

5 V, TA
TEST CONDITIONS

Propagation delay time, CLOCK to SERIAL OUT

CL=15pF

tTHL
tTLH

Transition time, low-to-high·level Q output

Delay time, high-to-Iow-Ievel

CL = 150 pF,
RL = 470!l,
"See Figures 2 and 3

t Typical values are for clock inputs. Typical from strobe inputs will be less.

TEXAS •

INSTRUMENTS
3-108

10

15

a output from STROBE or CLOCK inputs
Delay time, low·to-high-Ievel a output from STROBE or CLOCK inputs
Transition time, high-to-Iow-Ievel a output

tDLH

6

V, = VCC
V, = 0

PARAMETER
tDHL

MAX

Input capacitance

switching characteristics, Vee
tpd

TYP

POST OFFICE BOX 656303 • DALLAS, TEXAS 75265

MIN

UNIT
p.s

SN751506. SN751516
DC PLASMA DISPLAY DRIVERS

CLOCK

~50%

\50%

/50%

It-twCLKL

~tsuO~thO ---.j

*".

.u.,.

14

4V

+- - - - - - -

~I

i.---twCLKH

-1 V

---+I

*,,.

::

~I

two

FIGURE 1. INPUT TIMING VOLTAGE WAVEFORMS
r--""""\

-------------------4v

LAST
PULSE

____________________ 1V

CLOCK~
INPUT

\..\ 1~·SO%

-------------I--~

r---------------------------------VOH

_-,~50%

SERIAL OUT _ _ _ _ _ _ _..;.:

~

STROBE

VOL

I4-twSTRB~

tPd-+rf-.....

-------..;.:-------S-O-%~

",..S-0%-------4 V

14- tOHL ~
tOLH -l+-+I
l1li
~I tOHL
1
xr----~I-r~~--~I~~----VOH
Q OUTPUT

I

90%
10%
-------~-......;.;...;.;;.~

I

I

$ 1 90%
10%

I

I+-tOLH~

tTLH

I

1\0%
110%

J4

~tTHL

I

~

I

-

VOL

I

FIGURE 2. SWITCHING CHARACTERISTICS

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3-109

SN751506, SN751516
DC PLASMA DISPLAY DRIVERS

PARAMETER MEASUREMENT INFORMATION
5V

VDD - 100 V

DATA IN
470 Il

••
•

ClK
031

032

470 Il

STROBE

GND

SERIAL
OUT

Cl - 15 pF
(Sea Note Bl

NOTES: A. Input pulses are supplied by generators having the following characteristics: tw = 1.25 ~s, PRR '" 200 kHz, tr '" 30 ns,
tf '" 30 ns, 20 = 50 Il.
B. CL includes probe and jig capacitance.

FIGURE 3. TEST CIRCUIT

TEXAS . . ,
INSTRUMENlS
3-110

POST OFFICE BOX 655303 • DALLAS, TEXAS 75285

SN751506, SN751516
DC PLASMA DISPLAY DRIVERS

TYPICAL CHARACTERISTICS
LOW-LEVEL Q OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
500

10
Vee - 5 V
IOL - 180 mA

>

I
~

.

;
o
~.,

....

6

E

--

~

Co

,....-

E
l!:!
:;
~::>
So
::>

~~

I--- I---

-

~I

2

....

100

9

o
o

o
10

20

30

40

50

60

70

80

o

10

20

30

40

50

60

70

80

TA-Free-Air Temperature- °e

TA-Free-Air Temperature- °e

FIGURE 5

FIGURE 4

PROPAGATION DELAY TIME.
CLOCK TO SERIAL OUTPUT
vs
FREE-AIR TEMPERATURE

SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
0.5

26
Vee = 5 V
One Q
Output low

- - --- I---

-- .. -

Vee - 5 V
eL - 15 pF

III

i

24

0.4

~

E
I

j::

E

i!? 22

:;

u

>
ii

g.

-

f-.-

.!l

>

c:(

-

~ 200

4

oS

!..

300

o

~

o

Vee - 5 V
VOL - 16 V

c:(

I 400

8

>
;

LOW-LEVEL Q OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE

20

Ul

I

u

J}

18

16

>

---- --o

10

20

30

40

50

CD

;!

0.3

-

c:

.2

~

0.2

~

e

Q.

JI 0.1
60

TA-Free-Air Temperature-

70

80

o
o

10

20

30

40

50

60

70

80

T A - Free-Air Temperature- °e

°e

FIGURE 7

FIGURE 6

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 75265

3-111

SN751506, SN751516
DC PLASMA DISPLAY DRIVERS
TYPICAL CHARACTERISTICS

0.5

DELAY TIME.
LOW-TO-HIGH-LEVEL Q OUTPUT
vs
FREE-AIR TEMPERATURE

DELAY TIME.
HIGH-TO-LOW-LEVEL Q OUTPUT
vs
FREE-AIR TEMPERATURE
r-----r---.,----,---.,.--r-----r---.,----,

Vee - 5 V
eL = 150 pF -+--+--+----1--+---1
RL - 470 {l

UI

i
E
j:: 0.4
.,

Q

m 0.3r-~-_+-_+_-+_-~~-_+-__1
~

b:=I==t-+-=-"p:=F==t==t----l

.3

0.2

1:.
:i:I

0.1~___1-_+--+--+--+-___1-_+-__1

....
:I:

£ 0.4
~'"

~

m 0.3

~

~

'"

Vee - 5 V
eL = 150 pF
RL - 470 {l

CD

>

>
.!!!

S

0.5
~
I

1:.
:i: 0.2

--

'"

$

!

I 0.1

:I:

£I

OL-~

o

___ L_ _

10

20

....
£I
~~L--L

30

40

__~__L_~

50

60

TA-Free-Air Temperature-

70

o

80

o

10

°e

20

TRANSITION TIME.
HIGH-TO-LOW-LEVEL Q OUTPUT
vs
FREE-AIR TEMPERATURE
UI

E

j::
c

UI

.,'"I

Vee - 5 V
eL=150pF
RL - 470 {l

60

70

80

°e

1.0

Vee - 5 V
eL = 150 pF
RL = 470 {l

E

j::
c

0.8

o

.!2
UI

:€UI

~ 0.3

~ 0.6

]

]

.1::

c

C

~ 0.2

-§,

----

....o

S

1:.

:f 0.1
....I

:;

20

30

40

50

60

TA-Free-Air Temperature-

........-

-

I

....

70

80

0
o

°e

10

20

30

40

50

60

TA-Free-Air Temperature-

FIGURE 10

FIGURE 11

TEXAS •
INSTRUMENTS
3-112

".

:I:

J:'
10

~

-

0.4

~

0
o

/

! 0.2

:I:

J:'

50

TRANSITION TIME.
LOW-TO-HIGH-LEVEL Q OUTPUT
vs
FREE-AIR TEMPERATURE

0.5

0.4

40

FIGURE 9

FIGURE 8

.,'"I

30

TA - Free-Air Temperature-

POST OFFICE BOX 655303 ,; DALLAS, TEXAS 75266

°e

70

80

SN751508. SN751518
DC PLASMA DISPLAY DRIVERS
02984,

•

Each Device Drives 32 Lines

•

- 120-V P-N-P Open-Collector Parallel
Outputs

•

High-Speed Serially Shifted Data Inputs

•

CMOS-Compatible Inputs

•

Strobe and Sustain Inputs Provided

•

Serial Data Output for Cascade Operation

1987-REVISEO NOVEMBER 19B9

SN751508 ..• FT PACKAGE
(TOP VIEW)
Q32
Q31
Q30
Q29
Q28
Q27
Q26
Q25
Q24
Q23
Q22
Q21
Q20
Q19
Q18
Q17
GND
NC
STR08E
NC
CLOCK

description
The SN751508 and SN751518 are monolithic
integrated circuits designed to drive the data
lines of a dc plasma panel display, The
SN751518 pin sequence is reversed from the
SN 7 51 508 for ease in printed circuit board
layout,
Each device consists of two 16-bit shift
registers, 32 latches, 32 OR gates, and 32 P-N-P
open-collector output AND gates, Typically, a
32-bit data string is split into two 16-bit data
strings externally and then entered in parallel into
the shift registers on the high-to-Iow transition
of the clock signal. A high LATCH ENABLE
transfers the data from the shift registers to the
inputs of 32 OR gates through the latches, Data
present in the latch during the high-to-Iow
transition of LATCH ENABLE is stored. When
STROBE is high, the latch is masked and a high
will be placed on the data input of the output
AND gates. When STROBE is low, and SUSTAIN
is high, data from the latches is reflected at the
outputs. When low, SUSTAIN will force all
outputs to their off state. Drivers may be
cascaded via the serial data outputs of the static
shift registers. These outputs are not affected
by LATCH ENABLE, STROBE, or SUSTAIN.
The SN751508 and the SN751518 are
characterized from O°C to 70°C.

Ql
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Ql0
Qll
Q12
Q13
Q14
015
Q16
GND
SUSTAIN
NC
LATCH ENA8LE
NC

VCC
SERIAL OUT2
SERIAL OUT1

VCC
DATAIN2
DATAINI

SN751518 ..• FT PACKAGE
(TOP VIEW)
Ql
02
03
Q4
Q5
06
Q7
Q8
Q9
Ql0
Qll
012
Q13
Q14
Q15
Q16
GND
SUSTAIN
NC
LATCH ENABLE
NC
VCC
DATAIN2
DATAINI

Q32
Q31
Q30
029
028
Q27
Q26
025
024
Q23
Q22
Q21
Q20
Q19
Q18
Q17
GND
NC
STROBE
NC
CLOCK
VCC
SERIAL OUT2
SERIAL OUTI

NC-No internal connection

PRODUCTION DATA d••umants ••ntain i.fu,mati••
current I. of publication data. Praduets confIrm to
specifications par the terms of Taxal Instruments

::=~ri~lt::I~'li ~=::i:; :Ir=::.::.~ nat

Copyright @ 1989, Texas Instruments Incorporated

TEXAS . . ,
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS, TeXAS 75265

3-113

SN7515D8, SN751518
DC PLASMA DISPLAY DRIVERS
logic symbols t
SN751508

,.!!!L EN44
STROBE,~ V43

CMOS/EL DISP

SUSTAIN

:llli-

LATCH ENABlE

C42

CLOCK:J!lli:". P.240
SRG16

.,40IC41/-1

~

r

DATA IN1,~4'D

Z1

23

···

1420 I> ".44
~cD1
2420 t> 43,44:O~;02
03
3420 I>

43.440~;

4420

I>

15420

t>

16420
17 420
18420

I> ".44
I> 43.44
I> 43.440

2942D
30420
31 420

t>

21.
217

··
·

22.
231

SRG16

40(C45/-1

,B!!- 450

r
22
24

DATA IN2

···
···

43.44

···

43.44

···

43,44

I> 43,44

I> ".44
32420 C> 43.44

216
218

1
31

230

32

~,Q4

r_J~!LU1.

r--J!!!.,D1.
D17
r----illl'D18
r----illl'

t----J!l U2.
f---l!! D30
~ 031

t----ill D32
124 SERIAL
OUT1

1
SERIAL
-B!! OUT2

232

SN751518
SUSTAIN ~

CMOS/El DISP

EN44
STROBE ~ V43
120)
C42
LATCH ENABLE
CLOCK
P.240

&

SHG1a

.,4OIC41/-1
DATA IN1 ~41D

21
23

···
···
SRB18

.,4OIC4.'-1
DATA INZ ~45D

22.
231

21.
218

~I02

I> ".44
I> 43,44

~I03
--.!1!.,Q4

16420
18420
17420
18420

I> 43.44
I> 43.44
I> ".44
t> 43.44

~ID1.
~,D1.

r
Z4

-----.!.!!cD1

3420
4420
215
217

22

···
··

1420 I> ".44
2420 I> 43.44

···
···

~,D17

~,D18

I> ...44<:; ~ 02.
I> ...44<; ~ Q30
I> 43.44~ ~ D31
32 42D I> 43.440 ~.032
29420
30 420
31420

1
31

SERIAL
r---ill!.OUT1

1
230
232

32

SERIAL
r---ill! OUT2

tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and lEe Publication 617-12.

TEXAS ."

3-114

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TEXAS 76266

SN75150B, SN75151B
DC PLASMA DISPLAY DRIVERS
logic diagram (positive logic)
SUSTAIN

STROBE
LATCH
ENABLE
CLOCK

01

DATA IN1

02

03

04

••
•

• ••••
• ••••
• ••••

•
•
•

•
•
•

DATAIN2

029

030

031

032

~----------------I

>--- SERIAL oun

1..--------------------1 >--- SERIAL OUT2

TEXAS . "

INSTRUMENTS
POST OFFtcE BOX 655303 • DALLAS. TEXAS 76265

3-115

SN751508, SN751518
DC PLASMA DISPLAY DRIVERS

FUNCTION

CONTROL INPUTS
LATCH
STROBE SUSTAIN
ENABLE

SHIFT REGISTERS

LATCHES
LCl THRU LC32

Rl THRU R32

I

X

X

X

Load and shift t

Determined by

No I

X

X

X

No change

LATCH ENABLE*

LATCH

X

L

X

X

As determined

Stored data

ENABLE

X

H

X

X

above

New data

X

X

L

H

As determined

Determined by

X

X

H

H

above

LATCH ENABLE*

X

X

X

L

LOAD

STROBE
SUSTAIN
H

CLOCK

As determined

Determined by

above

LATCH ENABLE *

OUTPUTS
SERIAL
SOl

S02

R31

R32

R31

R32

R31

R32

R31

R32

01 THRU 032
Determined by
SUSTAIN and STROBE
Determined by
SUSTAIN and STROBE
LC1 thru LC32
All on (high)
All off

= high

t Each

level, L = low level, X = irrelevant, I = high-to-Iow transition
even-numbered shift register stage takes on the state of the next-lower even-numbered stage, and likewise each odd-numbered

shift register stage takes on the state of the next-lower odd-numbered stage; i.e., R32 takes on the state of R30, R30 takes on the state
of R28, ... R4 takes on the state of R2, R2 takes on the state of Data In2, R31 takes on the state of R29, R29 takes on the state of
R27, ... R3 takes on the state of R1, and Rl takes on the state on Data In1.
* New data enters the hItches while LATCH ENABLE is high. This data is stored while LATCH ENABLE is low.

typical operating sequence
CLOCK

DATA IN
SHIFT
REGISTER
CONTENTS

JlJU "'lJl

~_______________________

IRRELEVANT

VALID

VALID

INVALID

LATCH ENABLE

LATCH CONTENTS

PREVIOUSLY STORED DATA

n
I

NEW DATA VALID

LJI

STROBE

I

SUSTAIN

o OUTPUTS

OFF·STATE

I I
VALID

TEXAS •
INSTRUMENTS
3-116

POST OFFICE BOX 855303 • DALLAS, TEXAS 75286

OFF STATE

SN751508. SN751518
DC PLASMA DISPLAY DRIVERS
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT
Vcc----------~----~~

INPUT -"VIIV-......JV\,.,.......

TYPICAL OF ALL Q OUTPUTS

~VCC2

TYPICAL OF SERIAL OUTPUTS
- - - -......~.----------VCC

'--LOUTPUT

GND----~----------....~

-----4~-----4~----GND

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) ........................................ -0.4 to 7 V
On-state Q output voltage, Va. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -120 V to Vcc + 0.4 V
Input voltage ............................................... -0.4 V to VCC+O.4 V
Serial output voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.4 V to VCC + 0.4 V
Continuous total power dissipation at (or below) 25°C free-air temperature
(see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1025 mW
Operating free-air temperature range, T A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooC to 70°C
Storage temperature range .......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . .. 260°C
NOTES: 1. Voltages values are with respect to GND.
2. For operation above 25°C free·air temperature, derate linearly to 656 mW at 70°C at the rate of 8.2 mW/oC.

TEXAS •

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

3-117

SN751508, SN751518
DC PLASMA DISPLAY DRIVERS
recommended operating conditions
MIN
4.5

Supply voltage, VCC

NOM
5

Output voltage, Vo
High-level input voltage, VIH

VCC - 4.6 V
VCC = 5.5 V

Low-level input voltage, VIL

VCC = 4.5 V
VCC = 5.5 V

3.6
4.4
1
-1.2

Clock frequency, f clock

5
CLOCK
DATA IN

Pulse duration, tw (see Figure 1)

75
160

LATCH ENABLE
STROBE
SUSTAIN
DATA IN before CLOCKI

Q outputs

VOH High-level output voltage

Serial
Outputs

Serial
Outputs

Low-level output voltage

ns

0
50
0

~s

70

TEST CONDITIONS
10H = -0.5 rnA
IOH = -100~
VCC = 5.5 V
IOH = -20 ~A
IOH = -100 ~A
VCC = 4.5 V
10H = -20 ~A
VCC = 5.5 V
VCC = 4.5 V

MIN
4

Typt

4.3
4.4
3.4

4.6
V

3.6
0.9

10L = 20 ~
IOL = 100.~

0.9

1.2
1.1
1.1

TA = 25°C,

Low-level Q output current

TA

Vo = -75V

-500

High-level input current

TA - 25°C,
VI - VCC
TA = 25°C,
VI = 0
All Q outputs high, VCC= 5.5 V
All Q outputs low

1
-1

Ci

Input capacitance

V

0.9

High-level Q output current

= 25°C,

UNIT

3.6

IOL = 100 ~A

10L = 20 ~A
Vo = 3 V

MAX

IOH

Low-level input current

°c

4.5

10L
IIH

Supply current

mA
MHz

Vee'" 5 V. TA - ooe to 70 0 e (unless otherwise noted)

PARAMETER

ICC

V

p.S

0
0

Operating free·air temperature, T A

IlL

V

20
50

LATCH ENABLE high before STROBEl
LATCH ENABLE high before SUSTAINt
Hold time, DATA IN after CLOCKI, th (see Figure 1)

VOL

V

ns

90
2
2

CLOCK low before LATCH ENABLEt
LATCH ENABLE low before CLOCKI

Setup time, tsu (see Figure 1)

UNIT

V
0.9

Output current, 10 (TA = 25°C)

electrical characteristics.

MAX
5.5
-75

-1.2

mA

17

25
3
15

p.A
p.A
p.A
mA
pF

t All typical values are at T A = 25°C.

switching characteristics

Vee"" 5 V. TA "" 25°e (unless otherwise noted)
TEST CONDITIONS

tpd

PARAMETER
Propagation delay time, 'CLOCK to Serial Outputs

tDLH

Delay time, low-to-high-Ievel Q output from SUSTAIN or STROBE

tDHL
tTLH
tTHL

Delay time, high-to-Iow-Ievel Q output from SUSTAIN or STROBE
Transition time, low-to-high-Ievel Q output

CL = 15 pF

Transition time, high-to-Iow-Ievel Q output

CL=15pF,
RL = 91 kO,
See Figures 1 and 2

*Typical values for delay times are measured from the SUSTAIN input.

TEXAS

-If

INSTRUMENTS
3-118

POST OFFICE BOX 656303·. DALLAS. TEXAS 75265

MIN

TYP
100

MAX
150

UNIT
ns

0.3*

1

~s

1*
2
11

2.5

p's

5
18

p.S
p's

SN7515D8, SN751518
DC PLASMA DISPLAY DRIVERS
PARAMETER MEASUREMENT INFORMATION
r----------------4V
CLOCK

I '--_oJ

J

~,. W

~_-.J_

-

-

-

-

-

_ -

-

-

__ -1 V

If--t w .1 tw---+l
j+-tsU+th-+j

! )K,.-----:"--~~O_%____________ ::
I+-tw~

I+-+!-t

SERIAL OUT

--------:..i.)(~----~
.
.~"o-%-----------.
---------.:..I.J

pd

.

~.- - - - - - - - - - - - - - V O L

•

n:%---------_________

j4-tSU-.j

VOH

• ~tsu~

r-tW--t

I

LATCH ENABLE

_ _ _ _ _ _ _J.

I

.

4V
1 V

I

It-tw~

j--tsu-..l

STROBE

--------------..:.i--.. .V1_0%______________..J/""_-_--::
~tsu1
r- -t- 4
I

. I--tw~

I

I

I

I

1:

SUSTAIN

---------"". I
I

I
tOLH.j

/4-

tOLH.j

l\...iT \

I+- I tOHL~ I+- I
-.I j4- tOHL I --t I-- tOLH

I

-4¥_"_I_}l
j.-

I L

tTLH-Joj

NOTE: Input tr and tf are less than or equal to I C'

tw

h-------

~

Q OUTPUTS _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

tTLrat

tw

:

4V
1V

K\ n,=---::.
I I

,... I
'THL-"

I

-+I

I
~

--t j. tTLH

I
jf-tTHL

~3.

FIGURE 1. INPUT TIMING AND SWITCHING TIME VOLTAGE WAVEFORMS

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

3-119

SN751508, SN751518
DC PLASMA DISPLAY DRIVERS
PARAMETER MEASUREMENT INFORMATION
-75 V

5V

91 k!l
CLOCK

STROBE

SUSTAIN

SERIAL OUT1 1-------<.....- SERIAL OUT2

1--11>----1----

CL

=

(S~e

15 pF
Note BI

TEST CIRCUIT
NOTES: A. Input pulses are supplied by generators having the following characteristics: tw

tf " 10 ns, 20 = 50 !l.
B. CL includes probe and jig capacitance.

FIGURE 2

3-120

TEXAS •
INSTRUMENTS
POST OFFICE BOX ·655303 • DALLAS. TEXAS 75265

=

100 n5 , PRR .:s; 5 MHz, tr :5 10 ns ,

SN7515Dl SN751518
DC PLASMA DISPLAY DRIVERS
TYPICAL CHARACTERISTICS
DELAY TIME, CLOCK TO SERIAL OUTPUT
vs
FREE-AIR TEMPERATURE

SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
20

...........

~ 125

i'--.

c(

I

i'--.

E 15

----

I'---

I

C
~

"

U

-a

10

o

iii

~

...2

5}

,;
E

Vee - 5.5 V
Q outputs low

o

o

.

>-

~

I
20

75

50

j::

vee = 5 V
- 15 pF
L1
1

25 i- e

I

J

I
10

30

40

50

60

70

o

80

o

10

20

FIGURE 3

:f'"
.2 0.4

Vee = 5 V
l-eL - 15 pF
I-RL = 91 kO

~

0.3

Q.

5

o
~
~

0.2

.!

0.1

...

9

60

70

80

DELAY TIME, SUSTAIN INPUT TO Q OUTPUT,
HIGH TO LOW
vs
FREE-AIR TEMPERATURE

2

-

..c:

1.5r-~---+~~--+---r-~--~--~

'"

~

I---

Vee - 5 V
eL = 15 pF
RL = 91 kO

:f

1
d

~

j::

j::

I
:t

50

0.5

I
..c:

~

40

FIGURE 4

DELAY TIME, SUSTAIN INPUT TO Q OUTPUT,
LOW TO HIGH
vs
FREE-AIR TEMPERATURE

S

30

TA-Free-Air Temperature-·e

TA-Free-Air Temperature-·e

~

f--- I---

u

5 I- All

N°ioad

-

£!

u

Q.

en"
I
·u

-

5
~ 100

~ 0.5

~

...I

o
o

9:t
10

20

30

40

50

60

70

80

OL-~

o

__- L_ _- L_ _~_ _L-~__-L~

10

20

30

40

50

60

70

80

TA-Free-Air Temperature-·e

T A -Free-Air Temperature-·e

FIGURE 6

FIGURE 5

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 76266

3-121

SN751508, SN751518
DC PLASMA DISPLAY DRIVERS
TYPICAL CHARACTERISTICS

~
I
.c

TRANSITION TIME, Q OUTPUT,
LOW TO HIGH
vs
FREE-AIR TEMPERATURE

5

I

S

4

S
~ 15~-4--~--+-~~-+--4---~-4

%

i

3

o

j.....--

I--

oo

.

j...---

.j::

c

:ic

5

I!!

I!!
lI

t"

10~-4--~--+-~~-+--4---~~

E

2 ~ I-"

~c

:5

Vee - 5 V
eL - 15 pF
RL - 91 kO

oS

o

§

20~~--~--~~~-T--~--r-~

~

Vee - 5 V
eL-15pF
RL - 91 kO

f

~
1
;

~
I

_I

TRANSITION TI~E, Q OUTPUT,
HIGH TO LOW
vs
FREE-AIR TEMPERATURE

l-

I

~

0
0

10

20

30

40

50

60

70

80

t"

0

L--L__-L__-L----l__- L__--1-__L---I

0

10

30

40

FIGURE 8

FIGURE 7

TEXAS ."

INSTRUMENTS
3-122

20

50

60

TA-Free-Air Temperature- °e

TA-Free-Alr Temperature- °e

POST OFFICE BOX 666303 • DALLAS, TEXAS 75285

70

80

TL4810BI, TL4810B
VACUUM FLUORESCENT DISPLAY DRIVERS
02715. OECEMBER 1984-REVISEO OCTOBER 1989

•

Each Device Drives 10 Lines

•

60-V Output Voltage Rating

•

40-mA Output Source Current

N PACKAGE
(TOP VIEW)

08
07

•

High-Speed Serially-Shifted Data Input

•

CMOS-Compatible Inputs

•

Latches on All Driver Outputs

•

Improved Direct Replacement for
UCN4810A and TL4810A

06
CLOCK
VSS
VDD
LATCH ENABLE (STROBE)

05
04

09
010
SERIAL DATA OUT
VBB
DATA IN
BLANKING

0,1
02
'-(;=---""':'::1-' 03

description
OW
SMALL OUTLINE PACKAGE
(TOP VIEW)

The TL481 OBI and TL4810B are monolithic
BIOFETt integrated circuits designed to drive a
dot matrix or segmented vacuum fluorescent
display (VFO). These devices feature a serial data
output to cascade additional devices for large
display arrays.
A 1O-bit data word is serially loaded into the shift
register on the positive-going transitions o,f the
clock. Parallel data is transferred to the output
buffers through a 10-bit Ootype latch while
LATCH ENABLE is high and is latched when
LATCH ENABLE is low. When BLANKING is high.
all outputs are low.
Outputs are totem-pole structures formed by
n-p-n emitter-follower and double-diffused MOS
(OM OS) transistors with output voltage ratings
of 70 V and 40 mA source-current capability. All
inputs are compatible with CMOS and TTL
levels. but each requires the addition of a pullup resistor to VOO when driven by TTL logic.

08
07

09
010

06
CLOCK

NC
SERIAL DATA OUT

VSS
NC
VDD
LATCH ENABLE (STROBE)

VBB
DATA IN
BLANKING

01
05
02
04 ................ 03

NC - No internal connection

The TL4810BI is characterized for operation
from - 40°C to 85 °C. The TL4810B is
characterized for operation from O°C to 70°C.

t BIDFET -Bipolar. Double-Diffused. N-Channel and P-Channel MOS transistors on same chip-patented process.

PRODUCTION DATA doc....nts contain information
••"ant II of publication dota. Prod.eta conform ta
.~ion. par the terms of Tous Instruments

=:;,,~r:.':.'li

=::a.r 1Ir=~:r::.s

not

Copyright

@

1989, Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 866303 • DALLAS, UXAS 76265

3-123

TL4810BI, TL4810B
VACUUM FLUORESCENT DISPLAY DRIVERS
logic symbol t

logic diagram (positive logic)
BLANKING-ce>----------.,
LATCH
ENABLE

LATCH ENABLE (7)
BLANKING (13)

SHIFT
REGISTER

LATCHES

OATAIN
CLOCK -<1--1>
(12)
20

I>

3

201> 3
201> 3
201> 3
201> 3
20

I> 3

201> 3
20 I> 3
20

I>

3

(11)
(10)
(9)

(B)
(3)
(2)
(11

(lB)
(17)
(161

01
Q2

03
Q4

Q6

06
07

OB

as
010

SERIAL DATA OUT

'-----..D----

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the N package.

SERIAL
OUT

FUNCTION TABLE

FUNCTION

LOAD
LATCH
BLANK

CONTROL INPUTS
LATCH BLANK ..

CLOCK

ENABLE

ING

t

X

X

Not

X

X

X

L

X

X

H

X

X

X

H

X

X

L

SHIFT REGISTERS
R1 THRU R10*
Load and shift
No change

*

As determined above
As determined above

OUTPUTS

LATCHES
LC1 THRU LC10

r--

Determined by
LATCH ENABLE§

R10

Determined by BLANKING

R10

Determined by BLANKING

R10

All L
LC 1 thru LC 10 respectively

Stored data
New data
Determined by
LATCH ENABLE§

SERIAL

01 THRU 010

H = high level, L = low level, X = irrelevant, t = low-to-high-Ievel transition.
Register R1 0 takes on the state of R9, R9 takes on the state of R8 ... R2 takes on the state of R1, and R1 takes on the state of the data input.
§New data enter the latches while LATCH ENABLE is high. These data are stored while LATCH ENABLE is low.

*

TEXAS

..II

INSTRUMENTS
3-124

POST OFFICE BOX 855303 • DALLAS, TEXAS 75265

TL481DBI, TL481 DB
VACUUM FLUORESCENT DISPLAY DRIVERS
tvpical operating sequence
CLOCK

DATA IN

VALID

INVALID

SR CONTENTS
LATCH
ENABLE
LATCH
CONTENTS

IRRELEVANT

VALID

____________________

~r1~

PREVIOUSLY STORED DATA

______________
NEW DATA VALID

BLANKING

VALID

Q OUTPUTS

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT
VDD-~--_ _ _ _'-~

TYPICAL OF ALL OUTPUTS
VBB IQ OUTPUTS)
- - - - . - - - VDD ISERIAL OUTPUT)

INPUT-~""'--4JI---"

OUTPUT

VSS--~-4~~--__~

TEXAS •

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS, TEXAS 75265

3-125

TL481 OBI,TL481 DB
VACUUM FLUORESCENT DISPLAY DRIVERS
absolute maximum ratings over operating free-air temperature range ,(unless otherwise noted)
Logic supply voltage, VDD (see Note 1) .......................................... 18 V
Driver supply voltage, VBB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 70 V
Output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . . . . . . . . . . . . . . . . . .. 70 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.3 V to VDD + 0.3 V
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range: TL481 OBI .......................... -40°C to 85°C
TL4810B ............................. O°C to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ............. , ........ 260°C
NOTE 1: Voltage values are with respect to VSS.
DISSIPATION RATING TABLE
PACKAGE

TA s 25°C
POWER RATING

DERATING FACTOR

OW

1125 mW

ABOVE TA - 25°C
9.0 mW/oC

N

1150 mW

9.2 mW/oC

TA - 70°C
POWER RATING

TA - 85°C
POWER RATING

720mW

585 mW

736mW

598 mW

recommended operating conditions
MIN

Supply voltage, VDD
Supply voltage, VBB

4.75

15.75

MIN
4,75

5

60

5

NOM

MAX

0

Supply voltage, VSS
High·level input voltage, VIH

TL4810B

TL4810BI

PARAMETER

I for VOO
I for VOt>

Low-level input voltage, VIL
Continuous high-level output current, IOH
,Operating free-air temperature, T A

= 5V
= 15 V

3.5
13.5
-0.3 t
-40

NOM

MAX
15.75
60

0
5.3
15.3
O.B
-25
B5

3.5
13.5
-0.3
0

5.3

UNIT
V
V
V
V

15.3
O.B
-25

mA

70

°C

V

t The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for logic
voltages only,

TEXAS ~

INSJRUMENTS
3-126

POST OFFICE BOX 6515303 • DALLAS. TEXAS 75265

TL481DBI, TL481 DB
VACUUM FLUORESCENT DISPLAY DRIVERS
electrical characteristics over recommended operating free-air temperature range. VDD - 5 V to 15 V.
Vaa = 60 V. VSS = 0 (unless otherwise noted)
PARAMETER
High-level
VOH

output

voltage
Low-level
VOL

output

voltage

TEST CONOITIONst

Q outputs

= -25 mA
= 5 V,
VOO = 15 V,
10H = 11'A,
10H

Serial output
Q outputs

Serial output

VOO

10L

-1001'A
-100 jtA

=
=

lOOI'A

10H
BLANKING at VOO

VOO = 5 V,

10L

= 15 V, 10L 100 jtA
= 60 V,
BLANKING at VOO,
= MIN to 70°C

VOO
Va

=
=

10H

Low-level Q output current TA
(pull-down currentl
Va - 60 V,

BLANKING at VOO,

= 85°C
Va = 0,
TA = MAX
VI = VOO

TA
101off) Off-state output current
IH

High-level input current

TL481 OBI
MIN

Supply current from VBS

All inputs at 0 V,

= DoC to MAX
= - 40°C
VOO = 5 V
VOO = 15 V
VOO = 5 V

All outputs low

VOO - 15 V

All outputs high, T A
All inputs at 0 V,
100

Supply current from VOO

One Q output high

TYP*

57.5

58

4

4.5

4

4.5

14

14.7

14

14.7

2.5

MAX

V

0.5

1

0.5

1

0.05

0.1

0.05

0.1

0.02

0.1

0.02

0.1

2.5

3.7

UNIT

V

3.7
mA

2

BLANKING at VOO,

All outputs high, T A

MIN

57.5

All outputs low
IBB

TL4810B
MAX

TYP*
58

-1

-15

-1

-15

I'A

30

50

30

50

I'A

0.5

1

0.5

1

2.7

4

2.7

4

mA

5
10

50

10

50

10

100

10

100

10

50

10

50

10

100

10

100

I'A

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
= 25°C, except for 10.

*All typical values are at TA

timing requirements over recommended operating free-air temperature range
VOO - 5 V
MIN
MAX

PARAMETER

VOO - 15 V
MIN
. MAX

UNIT

twICKH)

Pulse duration, CLOCK high

250

50

ns

twILEH)

Pulse duration, LATCH ENABLE high

250

50

ns

tsulD!

Setup time, DATA IN before CLOCKt

125

25

ns

thlO)

Hold time, DATA IN after CLOCKt

125

25

ns

tCKH-LEH

Delay time, CLOCKt to LATCH ENABLE high

125

26

ns

switching characteristics. Vaa = 60 V. TA - 25°C
PARAMETER

MIN

Propagation delay time, LATCH ENABLE to output

TYP

MAX

Voo = 5 V
Voo - 15V

0.5

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 76285

3-127

TL4810BI, TL481 DB
VACUUM FLUORESCENT DISPLAY DRIVERS
PARAMETER MEASUREMENT INFORMATION

CLOCK

----JI
I
lou(OI

~"'Jr'"""""lI''''
DATA

VIL

~~

14

~I

I

I

~O%

I
_ ----------VIH
LAST
•
CLOCK 50%
I PULSE
VIL
INPUT
I4-ICKH.LEH...r'
Iw(LEHI

.!

LATCH
50%1
ENASLE-----....;.;.;.JI

Ih(OI

VALID 5 0 % X X X X ' VIL

\;:50% -

-

VIH
VIL

I4-lpd~

VIH

OUTPUT _ _ _ _ _ _ _ _ _ _ _9_0~%}F~-V-A-Ll-O~~

FIGURE 1. INPUT TIMING

FIGURE 2. OUTPUT SWITCHING TIMES

THERMAL INFORMATION
N PACKAGE DUTY CYCLE
vs
FREE-AIR TEMPERATURE

OW PACKAGE DUTY CYCLE
vs
FREE-AIR TEMPERATURE

100
90

#.

.,

U

SO

\

\ 1\'

\

>

U

~

70

E
E

'"

..
:E

90

#.

1

f'(

.,

N=9 1

ti

N=10

Q

N-S

VSS - 60 V
VDD - 15 V
IOH = -25 mA
50 IOL-1"A
N - Number of outputs high
All other outputs low
I
40
~
~
%
~
~
H

N-1 to 4
N-5

N-7,

1\\ J

Q

.j(

100

N-1 to 6

u

~

SO

70

E

'E"

60

..

.j(

:E

~

T A - Free-Air Temperature -

~

60

Vss - ~O V
VDD - 15V
IOH - -25 mA

50 IOL - 1 "A
N - Number of outputs high
All other outputs low

100

DC

T A - Free-Air Temperature -

FIGURE 3

FIGURE 4

TEXAS"

INSTRUMENTS
3-128

POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

DC

TL58121, TL5812
VACUUM FLUORESCENT DISPLAY DRIVERS
D2914. DCTOBER 1985--REVISED OCTOBER 1989

•

Drives Up to 20 Lines

•

70-V Output Voltage Swing Capability

•

40-mA Output Source Current Capability

•

High-Speed Serially-Shifted Data Input

•

CMOS-Compatible Inputs

•

Direct Replacement for Sprague UCN5812A

N PACKAGE

ITOP VIEWI

description
The TLC58121 and TLC5812 are monolithic
BIOFETt integrated circuits designed to drive a
dot matrix or segmented vacuum fluorescent
display (VFO). Each device features a serial data
output to cascade additional devices for large
display arrays.

VBB
VDD
SERIAL DATA OUT
DATA IN
0.20
0.1
0.19
0.2
0.18
0.3
0.17
0.4
0.16
0.5
0.15
0.6
0.14
0.7
0.13
0.8
0.12
0.9
0.11
0.10
BLANKING
LA TCH ENABLE (STROBEl
VSS'-L._ _....... CLOCK

A 20-bit data word is serially loaded into the shift
register on the low-to-high transition of CLOCK.
Parallel data is transferred to the output buffers
through a 20-bit O-type latch while LATCH
ENABLE is high and is latched when LATCH
ENABLE is low. When BLANKING is high, all
outputs are low.
The outputs are totem-pole structures formed by
n-p-n emitter-follower and double-diffused MOS
(OMOS) transistors with output voltage ratings
of 70 V and a source-current capability of
40 mAo All inputs are CMOS com'patible.
The TLC58121 is characterized for operation
from - 40°C to 85 °C. The TLC5812 is
characterized for operation from OOC to 70°C.

FN PACKAGE

(TOP VIEWI
~

::::J

o
~
<{
c

4

0.18
017
016
015
014
013

3

2

1 2827 26

5

25

6

24

7

23

8

22

9
10

21

0.2
0.3
0.4
0.5

20
19
12 1314 15 1617 18

t BIDFET ~ Bipolar, double-diffused. N-channel and P-channel MOS transistors on the same chip - patented process.

PRODUCTION DATA do.umantsconllin informatian
curr...t as a' publi..tian date. Products c...'arm to
sp.cificatlon. par the term. of T.... Instrum.nts

:~~::~i~a{::1~1i ~=::i:r ~{o::::~~~ not

Copyright

@ 1989. Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TEXAS 75265

3-129

TL58121, TL5812
VACUUM FLUORESCENT DISPLAY DRIVERS
logic symbol t
CMOSIVAC
FLUOR OISP
BLANKING
LATCH
ENABLE
CLOCK
OATAIN

13
16

EN3
C2

15
27

26.
25

.

20 [>

3

20 [>

3

20 [>

3

20 [>

3

17
12

01
02

010
all

:

4
3,
2

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

logic diagram (positive logic)
BLANKING------

TEXAS . "
INSTRUMENTS
3-130

POST OFFICE BOX 655303 • DALLAS, TEXAS 75285

019
020
SERIAL
OUT

TL58121, TL5812
VACUUM FLUORESCENT DISPLAY DRIVERS
FUNCTION TABLE
CONTROL INPUTS
FUNCTION

CLOCK

LATCH
ENABLE

t

LOAD

Not

X
X
X
X

LATCH
BLANK

BLANKING

X
X
L
H

X
X

X
X
X
X
H
L

SHIFT REGISTER

LATCHES

R1 THRU R20

LC1 THRU LC20

Load and shift T
No change
As determined above
As determined above

OUTPUTS
Q1 THRU Q20

SERIAL

Determined by
LATCH ENABLE t

R20
R20

Stored data

R20

New data

R20

Determined by BLANKING
Determined by BLANKING

Determined by

R20

All L

LATCH ENABLE t

R20

LC1 thru LC20, respectively

H = high level, L = low level, X = irrelevant, t = low-to-high-Ievel transition.
t R20 takes on the state of R19, R19 takes on the state of R1B, . . . R2 takes on the state of R1, and R1 takes on the state olthe data input.
tNew data enter the latches while LATCH ENABLE is high. These data are stored while LATCH ENABLE is low.

typical operating sequence
CLOCK

DATA IN

SR
CONTENTS
LATCH
ENABLE

IRRELEVANT

VALID

I

INVALID

__________________________

LATCH
CONTENTS

PREVIOUSLY STORED DATA

VALID

~rl~

____

NEW DATA VALID

BLANKING

Q OUTPUTS

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

VCC1.----...- -.......... . - -

TYPICAL OF ALL Q OUTPUTS

- - - -.....- - - - VCC2

t----

INPUT --<.....JW"""".....

___ -.J
GND--4...- - - - -...~---

OUTPUT

TYPICAL OF SERIAL OUTPUT

- - - -......- -.....-4~

VCC1

....- -...-OUTPUT

TI

----...
~-- GND

-----~~-----GND

TEXAS . .

INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 75265 '

3-131

TL58121, TL!,812
VACUUM FLUORESCENT DISPLAY DRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
Supply voltage, Vee ..................................... : . . . . . . . . . . . . . . . . .. 70 V
Output voltage, Vo ......................' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 70 V
Input voltage, VI ............................. '. . . . . . . . . . . . . .. -0.3 V to VDD +0.3 V
Output current, 10 ...... _ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 40 mA
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temparature range: TL58121 ........................... - 40°C to 85 °C
TL5812 .............................. OOC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Case temperature for 10 seconds: FN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package. . . . . . . . . . . .. 260°C
NOTE 1, All voltage values are with respect to

vss.
DISSIPATION RATING TABLE

PACKAGE

TA

s

25·C

DERATING FACTOR

POWER RATING

FN

1400 mW

N

1150mW

ABOVE TA - 25·C
11.2 mW/oC

TA ~ 70·C
POWER RATING

TA - 8S·C
POWER RATING

896mW

72,8 mW

736 mW

598mW

9.2 mW/oC

recommended operating conditions.
MIN

NOM

MAX

UNIT

Supply voltage, VDD

4.5

15

V

Supply voltage, VB8

0

60

V
V

Supply voltage, V SS

0

High-level input voltage, VIH

VOO-l.5
-0.3 t

Low-level input voltage, VIL

V

-40

High-level output current, 10H
Operating free-air temperature, T A

V

VOO+0.3
0.8

'I

TL58121

-40

85

1 TL5812

0

70

rnA
·C

tThe algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for logic
voltage levels.

electrical characteristics over operating free-air temperature range, Voo .. 5 V to 15 V, VBB .. 60 V
(unless otherwise noted)
PARAMETER

TEST CONDITIONS
Q outputs

VOH

High-level output

10H

Serial outputs
Q outputs

VOL

Low-level output voltage

Serial outputs

IIH

High-level input current

IlL

Low-level input current

10L

Low-level output current Ipull down current)

IOloff)

Off-state output current

IBB
100

Supply current from VBB
Supply current from VOD

=

-25 rnA

=

VDD - 5 V,

10H

= 15 V,
IOL = 1 rnA,
VOO = 5 V,

IOH = -20 pA
8LANKING at VOO
10L

= 15V,

IOL

VOO

VOO

-20 pA

TYP*

4.5

58.2
4.9

14.5

14.9

= 20 pA
= 20 pA

VI - VOO
VI = a

= 60 V,
Va = 0,
Vo

BLANKING at VOO

2.5

MAX

0.7

1.5

0.06

0.3

0.03

0.3

0.3
-0.3

1
-1

3.2

Outputs high

3.5

8

Outputs low

0.02

0.5

VOO - 5 V

1.5

3
4

= 15 V

TEXAS . "
INSTRUMENlS
POST OFFICE BOX 655303 • DALLAS. TeXAS 76266

1.7

V
pA
pA
pA

-15

VOO

UNIT
V

<-1

, BLANKING at VOO

*All typical characteristics are at T A = 25 ·C.

3-132

MIN
57.5

p.A
rnA
rnA

TL58121. TL5812
VACUUM FLUORESCENT DISPLAY DRIVERS
timing requirements over operating free-air temperature range
PARAMETER
twCKH
twLEH

VOO = 5 V

Pulse duration, LATCH ENABLE high

tsuo

Setup time, data before CLOCKt

thO

Hold time, data after CLOCKt

tCKH-LEH

MIN
VOO - 5 V
VOO = 15 V

Pulse duration, CLOCK high

VOO - 15 V
VOO = 5 V
VOO = 15 V
VOO = 5 V
VOO = 15 V
VOO = 5 V

Oelay time, CLOCKt to LATCH ENABLE high

VOO = 15 V

MAX

500
100
500
100
150
75
150
75
150
75

UNIT
ns
ns
ns
ns
ns

switching characteristics. VBB = 60 V. TA .. 25°C
MIN

PARAMETER
Propagation delay time,
LATCH ENABLE to output

TYP

MAX

2.2
0.8

Voo - 5 V
Voo = 15 V

PARAMETER MEASUREMENT INFORMATION

CLOCK

I
I

It-tsuD~thD,.....j
I

I
I

_ _ __,.1

VIH

.JXSO%X..S_O_%____ VIL

DATA I_N_ _ _

FIGURE 1. INPUT TIMING

CLOCK

I

I
I+tCKH·LEH

+I
~twLEH-+\
I

LATCH
ENABLE _ _ _ _ _ _J

~
SO%
..SO_%_____
I·

I

:

I4--tpd--+l

I
QOUTPUT

FIGURE 2. OUTPUT SWITCHING TIMES

TEXAS ...,
INSTRUMENTS
POST OFFICE BOX 655303. DALLAS. TEXAS 76265

3-133

TL58121. TL5812
VACUUM FLUORESCENT DISPLAY DRIVERS
THERMAL INFORMATION
DUTY CYCLE
vs
FREE-AIR TEMPERATURE
100r--'~~~~~~.-~-'.-~~
90~~~~~~~~~~~~~~
80~~~~~~~~~~~~~~

'8

N = Number of outputs high end-N - 20
conducting IOH - - 25 mA
20 All other outputs low. IOL - 1 mA-+---I

10 VSS - 60 V
VOO - 15 V
OL-~_-L

W

~

~

__

~~

~

__- L _ J - _ L - - J

00

ro

00

00

TA-Free-Air Temperature- ·,C

FIGURE 3

TEXAS . . ,
INSTRUMENTS
3-134

POST OFFICE BOX 665303 • DALLAS. TEXAS 15266

100

Peripheral Drivers/Power Actuators

4-1

4-2

DS36801
QUAD TELEPHONE RELAY DRIVER
02758. MARCH 1986-REVISEO MARCH 1990

•

Designed for - 52-V Battery Operation

D OR N PACKAGE
(TOP VIEW)

•

50-mA Output Current Capability

•

Input Compatible with TTL and CMOS

AMPL #1

j IN+
liN -

BAT GND
OUTPUT AMPL # 1

•

High Common-Mode Input Voltage Range

AMPL # 2

•

Very Low Input Current

j IN liN +

OUTPUT AMPL # 2
OUTPUT AMPL # 3

•

Fail-Safe Disconnect Feature

•

Built-In Output Clamp Diode

•

Direct Replacement for National DS3680
and Fairchild ,.A3680

j IN +
OUTPUT AMPL # 4
llN- ______...r- BAT NEG
AMPL #4 IN IN + AMPL #4

AMPL # 3

description
The 0536801 telephone relay driver is a monolithic integrated circuit designed to interface -48-V relay
systems to TTL or other systems in telephone applications. It is capable of sourcing up to 50 mA from
standard - 52-V battery power. To reduce the effects of noise and IR drop between logic ground and battery
ground, these drivers are designed to operate with a common-mode input range of ± 20 V referenced to
battery ground. The common-mode input voltages for the four drivers can be different, so a wide range
of input elements can be accommodated. The high-impedance inputs are compatible with positive TTL
and CMOS levels or negative logic levels. A clamp network is included in the driver outputs to limit highvoltage transients generated by the relay coil during switching. The complementary inputs ensure that
the driver output will be "off" as a fail-safe condition when either output is open.
The 0536801 is characterized for operation from -40°C to 85°C.

schematic diagram (each driverl

symbol (each driverl
BATTERY GROUND

IN+

15 kO

NONINVERT*NG
INPUTIN+ .
+
INVERTING
INPUT IN-

OUTPUT

IN-

BATTERY NEGATIVE

..........-

'----

OUTPUT

'---_....--<~--+__-----~~;;cBA.c.;.T NEG

All resistor values shown are nominal.

PRODUCTION DATA d...mentl contain information
cum.. 81 af publication dlta. Products conform to
lpacificltions par til. tanns af TIXI. II.trumantl

==i;8{nr:I~7i ~~::i:r :'~O=':~~~B not

Copyright © 1990, Texas Instruments Incorporated

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

4-3

0536801
QUAD TELEPHONE RELAY DRIVER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range at BAT NEG, VB _ (see Note 11. . . . . . . . . . . . . . . . . . . . . .. - 70 V to 0.5 V
Input voltage range with respect to BAT GND . . . . . . . . . . . .. . . . . . . . . . . . . . . .. -70 Vto 20 V
Input voltage range with respect to BAT NEG. . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 70 V
Differential input voltage, VID (see Note 2) ..................................... ± 20 V
Output current: resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 100 mA
inductive load ............................................. - 50 mA
Inductive output load ........................................................ 5 H
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range, TA ................................ -40°C to 85°C
Storage temperature range ......................................... - 65°C to 150 DC
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260 DC
NOTES: 1. All voltages are with respect to the SAT GND terminal unless otherwise specified.
2. Differential input voltages are at the noninverting input terminal IN + with respect to the inverting input terminal IN -.
DISSIPATION RATING TABLE
PACKAGE
D
N

TA:S 25°C
POWER RATING
950mW
1150mW

TA - ·70 oC
POWER RATING
608 mW
736mW

DERATING FACTOR
ABOVE TA - 25°C
7.6 mW/oC
9.2 mW/·C

TA - 85°C
POWER RATING
494mW
598 mW

recommended operating conditions
MAX
-60

MIN
-10
-20t

Supply voltage, VBInput voltage, either input
High-level differential input voltage, VIDH
Low-level differential input voltage, VIDL
Operatmg free-air temperature, T A

2
-20t

20
20
0.8

-40

85

UNIT
V
V
V
V
°C

tThe algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for input voltage
levels.

electrical characteristics over recommended operating free-air temperature range, VB (unless otherwise noted)
.
PARAMETER

TEST CONDITIONS

VO(on) On-state output voltage

VID = 2 V
VID = 7 V
VID = 0.4 V
VID = -7 V
10 = -50 mA,

10(off) Off-state output current

Vo

IIH

High-level input current (into IN +)

IlL

Low-level input current (into IN +)

IR

Clamp diode reverse current

VOK

Output clamp voltage

IS(on)

On-state battery current

IS(oll) Off-state battery current

=

VS-

VID

I

r

MIN

=

2 V

VID - 0.8 V
Inputs open

Vo = 0
10-50mA
10 = -50 mAo
All drivers on

VS-

=0

All drivers off

tAli typical values are at T A = 25 ·C.

TEXAS ~

INSTRUME;NlS
4-4

POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

TVP*
40
375
0;01
-1

-

MAX
100

- 52 V
UNIT
~A

-1.6

1000
5
-100
-2.1

-2
-2

-100
-100

2
0.9
-0.9
-2

100
1.2
-1.2
-4.4

mA

-1

-100

~A

~A

V
~

~

V

0836801
QUAD TELEPHONE RELAY DRIVER

switching characteristics VBPARAMETER
ton

Turn-on time

toff

Turn-off time

TEST CONDITIONS
VID ~ 3-V pulse,
L ~ 1 H,

RL

MIN

TYP

1 kll,

~

MAX

10
10

See Figure 2

PARAMETER MEASUREMENT INFORMATION

BAT GND
VI-----t

-52 V

-52 V

FIGURE 1. GENERALIZED TEST CIRCUIT, EACH DRIVER

BAT GND
I NPUT----l
~---1~-OUTPUT

RL = 1 kQ
BAT NEG

L

=

1H

-52 V
TEST CIRCUIT

INPUT

~_ _ _ _ _ _ _ _ _ _ _ _ _"

,I
i
OUTPUT

~ ton

- - - - - - +3V

~ ....~-t-of-f-

I

I

:1- - ---

I

-25 V

0V

VO(on)

-25 V
'" -52V
VOLTAGE WAVEFORMS

FIGURE 2. SWITCHING CHARACTERISTICS, EACH DRIVER

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

4-5

0536801
QUAD TELEPHONE RELAY DRIVER

APPLICATION INFORMATION
52V BATTERY

+1 1-

*.----~ 1 ~----~~----------~
(9) OS36801
(1)

(2)

IN+
IN-

(4)
(3)

(5)

(6)

IN+
ININ+
IN-

(8)

I
I
L ___ .J

(7)

IN+
IN-

I
I
I
I

Klr

BAT NEG

AMPL

#1

AMPL

#2

AMPL

#3

---L
K26-:-

---L

AMPL #4

K36-:-

---L
K4r
---L

CONTROL
SIGNAL
SOURCE

Kl THRU K4
50-V RELAY COILS - 50 rnA MAX
BAT GNO
(14)

FIGURE 3. RELAY DRIVER

TEXAS •
INSTRUMENTS
4-6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

L293
QUADRUPLE HALF·H DRIVER
02942, SEPTEMBER 1986-REVISED MAY 1990

•
•
•
•
•
•
•
•
•

NE PACKAGE

1-A Output Current Capability Per Driver

(TOP VIEW)

Pulsed Current 2-A Driver
1,2EN
1A
1Y

Wide Supply Voltage Range:
4.5 V to 36 V

VCC1
4A
4Y

HEATSINK AND {
GROUND
2Y
2A

Separate Input-Logic Supply
NE Package Designed for Heat Sinking
Thermal Shutdown

} HEATSINK AND
GROUND
3Y
3A

VCC2 '-"''-----':.J-' 3,4EN

Internal ESD Protection

FUNCTION TABLE

High-Noise-Immunity Inputs

(EACH DRIVER)

Functional Replacement for SGS L293

INPUTst

description
The L293 is a quadruple high-current half-H
driver designed to provide bidirectional drive
currents of up to one ampere at voltages from
4.5 Vto 36 V. It is designed to drive inductive
loads such as relays, solenoids, dc and bipolar
stepping motors, as well as other highcurrent/high-voltage loads in positive-supply
applications.

OUTPUT

A

EN

Y

H

H

H

L

H

L

X

L

Z

H ~ high-level
L = lowAlevel
X = irrelevant
Z = high-impedance
(off)
tin the thermal shutdown mode, the output is in the high-impedance
state regardless of the input levels.

All inputs are TTL-compatible. Each output is a complete totem-pole drive circuit with a Darlington transistor
sink and a psuedo-Darlington source. Drivers are enabled in pairs with drivers 1 and 2 enabled by 1,2EN
and drivers 3 and 4 enabled by 3.4EN. When an enable input is high, the associated drivers are enabled
and their outputs are active and in phase with their inputs. When the enable input is low, those drivers
are disabled and their outputs are off and in a high-impedance state. With the proper data inputs, each
pair of drivers form a full-H lor bridge) reversible drive suitable for solenoid or motor applications.
External high-speed output clamp diodes should be used for inductive transient suppression. A VCC1
terminal, separate from VCC2, is provided for the logic inputs to minimize device power dissipation.
The L293 is designed for operation from OOC to 70°C.

logic symbol:l:

logic diagram
(3)

[>

'V

EN
EN

[>

161 2y

'V

(111

[>

'V

EN
EN

[>

'V

lY

3Y

1141 4y

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

PRODUCTION DATA documenls conlain informalion
current as of publication date. Products conform to
specifications per the terms of Texas Instruments
:~~~~:~~i~ai~:I~~e ~!~~~~ti:r :I~O::~:::~::S~S not

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright © 1990, Texas Instruments Incorporated

4-7

L293
QUADRUPLE HALF·H DRIVER
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS
- -__----~~------VCC2

VCC1------~~---

.------OUTPUT

INPUT

GND--~----~-----------4~-~~----GND

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Logic supply voltage, VCC1 (see Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 36 V
Output supply voltage, VCC2 ................................................. 36 V
Input voltage .............................................................. 7 V
Output voltage range ........................................... - 3 V to VCC2 + 3 V
Peak output current (nonrepetitive, t :5 5 ms) ..................................... ± 2 A
Continuous output current . . . . . . . . . . . . . . ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 1 A
Continuous total dissipation at (or below) 25°C free-air temperature
(see Notes 2 and 3) ................................................. 2075 mW.
Continuous total dissipation at 80°C case temperature (see Note 3) . . . . . . . . . . . . . . . .. 5000 mW
Operating case or virtual junction temperature range ...................... -40°C to 150°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . .. 260°C
NOTES: 1. All voltage values are with respect to the network ground terminal.
2. For operation above 25°C free-air temperature, derate linearly et the rate of 16.6 mW/oC.

3. For operation above 25°C case temperature, derate linearly at the rate of 71.4 mW/oC. Due to variations in individual device
electrical characteristics and thermal resistance, the built·in thermal overload protection may be activated at power levels slightly
above or below the rated dissipation.

recommended operating conditions
. Logic supply voltage. VCCl
Output supply voltage, VCC2
High-level input voltage, VIH

I

s7V
VCCl
VCCl 2<7V

MIN

MAX

4.5

7

V

36

V

2.3
2.3
-0.3 t

Low-level input voltage, VIL
Operating free-air temperature, T A

0

7

UNIT

V

1.5

V

70

°C

tThe algebraic convention, in which the least positive (most negative) designated minimum. is used in this data sheet for logic voltage levels.

TEXAS

4-8

..tf

INSTRUMENTS
POST OFFICE'BOX 855303. DALLAS. TEXAS 75265

L293
QUADRUPLE HALF·H DRIVER

electrical characteristics. VCC1

=5

V. VCC2

PARAMETER
VOH

High-level output voltage

10H

VOL

Low-level output voltage

10L

IIH

High-level input current

IlL

ICCl

24 V. TA

TEST CONDITIONS

A

= -1
= 1A

r--eN
A
Low-level input current
'EiiI

VI

=

VI

=0

Logic supply current

10;" 0

TYP

MIN

A

7 V

ICC2

Output supply current

10 = 0

V
1.B

0.2

100

0.2
-3

±10
-10

-2

-100

All outputs at high level

13

22

All outputs at low level

35

60

8

24

14

24

2

6
4

All outputs at high impedance
All outputs at high level
All outputs at low level
All outputs at high impeaance

UNIT

MAX

VCC2-1.8 VCC2-1.4
1.2

2

V
p.A
p.A

mA

mA

switching characteristics. VCC1 .. 5 V. VCC2 .. 24 V. TA - 25°C
PARAMETER

TEST CONDITIONS

tPLH
tpHL

Propagation delay time, low-to-high-Ievel output from A input
Propagation delay tirpe, high-to-Iow-Ievel output from A input

CL

tTLH

Transition time, low-to-high-Ievel output

tTHL

Transition time, high-to-Iow-Ievel output

MIN

TYP

MAX

UNIT

BOO

ns

30 pF,

400

ns

See Figure 1

300

ns

300

ns

=

PARAMETER MEASUREMENT INFORMATION
INPUT

PULSE
GENERATOR
{See Note Al

5 V

24 V

...r.9:-::0::::%~-- 3 V

VC;Cl VCC2
INPUT

A

I
Y

3V

1.5 V
I

OUTPUT

1
-1-----0

10%

I---tw---~"

EN

1

1
1
1

I

GND

I
I4---M-tPHL
90%

TEST CIRCUIT

~tPLH

I

1
1

90% VOH

I

OUTPUT

HtTHL
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: tr S 10 ns, tf S 10 ns, tw
B. CL includes probe and jig capacitance.

=

10"s, PRR

=

5 kHz, Zo

=

50!l.

FIGURE 1. SWITCHING TIMES

TEXAS ~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

4-9

L293
QUADRUPLE HALF·H DRIVER
APPLICATION INFORMATION
5V

24V

VCC1

10kQ

16

VCC2

3

1,2EN

-=
Control A

1A
2

1Y
3

0
Motor
2A

2Y

7

6

3,4EN

9

Control B

3A

3Y

10

11

4A

4Y
14

15

Figure 2. Two·Phase Motor Driver

TEXAS ~

INSTRUMENTS
4-10

<

POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

L293D
QUADRUPLE HALF-H DRIVER
03511, SEPTEMBER 19S6-REVISED MAY 1990

NE PACKAGE
(TOP VIEW)

•

600-mA Output Current Capability Per
Driver

•

Pulsed Current 1.2-A Per Driver

•

Output Clamp Diodes for Inductive Transient
Suppression

•

Wide Supply Voltage Range:
4.5 V to 36 V

•

Separate Input-Logic Supply

•

Thermal Shutdown

•

Internal ESD Protection

1,2EN
1A

VCC1
4A

1Y

4Y

HEATSINK AND {

} HEATSINK AND

GROUND
2Y

GROUND
3Y

2A
VCC2

3A
,,"",",'----':.J-'

3,4EN

FUNCTION TABLE
(EACH DRIVER)

•

High-Noise-Immunity Inputs

•

Functional Replacement for SGS L293D

INPUTst
A
H
L
X

description

The L293D is a quadruple high-current half-H
driver designed to provide bidirectional drive
currents of up to 600 mA at voltages from 4.5 V
to 36 V. It is designed to drive inductive loads
such as relays, solenoids, dc and bipolar stepping
motors, as well as other high-current/highvoltage loads in positive-supply applications,

H
L
X
Z

EN
H
H
L

OUTPUT

V
H
L
Z

= high-level
= low-level
= irrelevant
= high-impedance
(off)

tin the thermal shutdown mode, the output is in the high-impedance
state regardless of the input levels.

All inputs are TIL-compatible, Each output is a complete totem-pole drive circuit with a Darlington transistor
sink and a psuedo-Darlington source. Drivers are enabled in pairs with drivers 1 and 2 enabled by 1,2EN
and drivers 3 and 4 enabled by 3AEN. When an enable input is high,the associated drivers are enabled
and their outputs are active and in phase with their inputs, When the enable input is low, those drivers
are disabled and their outputs are off and in a high-impedance state. With the proper data inputs, each
pair of drivers form a flJlI-H (or bridg'e) reversible drive suitable for solenoid or motor applications.
A VCC1 terminal, separate from VCC2, is provided for the logic inputs to minimize device power dissipation.
The L293D is designed for operation from OOC to 70°C.
logic diagram

logic symbol*
1A (21

C>
EN
EN

C>
C>

EN
EN
4A(15)

C>

'i)

(31 1Y

'i)

(6)2Y

'i)

(111 3y

'i)

(141 4y

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

PRODUCTION DATA documents .ontai. information
currant .s 01 publication date, Products confarm to
spaclfi••tio.. par the terms of Tex•• Instruments

:=~~·i:::I~7a ~=::r 1I1°:::I:~~· not

Copyright @ , 990, Texas Instruments Incorporated

,TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 16266

4-11

L293D
QUADRUPLE HALF·H DRIVER
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS
-------~~----VCC2·

VCc1------~~---

CURRENT
SOURCE

............--OUTPUT

INPUT

GNO--~--~~--------

--4~--~~--~--GND

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Logic supply voltage, VCC1 (see Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 36 V
Output supply voltage, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 36 V
Input voltage .............................................................. 7 V
Output voltage range ..........................•................ - 3 V to V CC2 + 3 V
Peak output current (nonrepetitive, t :S 100 /Ls) . . . • . • . . . • . . • . . . . • . . . • • . . • . . . • . . . ± 1.2 A
Continuous output current. ............................... .'. . . . . . . . . . . . . .. ± 600 mA
Continuous total dissipation at (or below) 25°C free-air temperature
(see Notes 2 and 3) ................................................. 2075 mW
Continuous total dissipation at 80°C case temperature (see Note 3) ..... ' .......... " 5000 mW
Operating case or virtual junction temperature range ...................... - 40°C to 150°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260°C
NOTES: 1. All voltage values are with respect to the network ground terminal.
2. For operation above 25°C free·air temperature. derate linearly atthe rate of 16.6 mW/oC.
3. F.or operation above 25°C case temperature, derate linearly at the rate of 71.4 mW/oC. Due to variations in individual device
electrical characteristics and thermal r&sistance. the built-in thermal overload protection may be activated at power levels slightly
above or below the rated dissipation.

recommended operating conditions
MIN
4.5

logic supply voltage, VCC1
Output .supply voltage, VCC2

VeC1
2.3

:s7V
High-level input voltage, VIH : VeC1
VCe1 .. 7V
low-level input voltage, Vll

2.3
~0.3t

Operating free-air temperature, T A

0

MAX
7
36

UNIT
V
V

VCe1
7

V

1.5
70

V
°c

tThe algebraic convention, in which the least positive (most negative) designated minimum, is used in this data sheet for logic voltage levels.

TEXAS

4-12

.Jf

INSTRUMENTS
POST OFFICE BOX 656303 • DAlLAS. TEXAS 7&285

L293D
QUADRUPLE HALF·H DRIVER
electrical characteristics. VCC1 .. 5 V. VCC2 - 24 V. T~ - 25°C
PARAMETER

TEST CONDITIONS

VCC2+1.3
1.3

Low-level output voltage

VOKH

High-level output clamp voltage

10K

VOKL

Low-level output clamp voltage

10K

High-level input current

IlL

Low-level input current

ICCI

Logic supply current

EN
A

EN

VI

=

7 V

VI

=0

10

=0

Output supply current

10

=0

UNIT
V

1.8

V
V
V

0.2

100

0.2
-3

±10
-10

-2

-100

All outputs at high level

13

22

All outputs at low level

35

60

8

24

All outputs at high level

14

24

All outputs at low level

2

6

All outputs at high impedance

2

4

All outputs at high impedance
ICC2

MAX

= 0.6 A
= -0.6 A

VOL

IIH

TYP

VCC2-1.8 VCC2-1.4
1.2

High-level output voltage

A

MIN

IOH = -0.6 A
10L - 0.6 A

VOH

pA
pA

mA

mA

switching characteristics. VCC1 .. 5 V. VCC2 - 24 V. TA - 25°C
PARAMETER

TEST CONDITIONS

tpLH

Propagation delay time, low-to-high-Ievel output from A input

tPHL

Propagation delay time, high-to-Iow-Ievel output from A input

CL

tTLH

Transition time, low-to-high-Ievel output

tTHL

Transition time, high-to-Iow-Ievel output

MIN

TYP

MAX

UNIT

800

ns

30 pF,

400

ns

See Figure 1

300

ns

300

ns

=

PARAMETER MEASUREMENT INFORMATION
INPUT

5 V

24 V

.r:9:':0~%--- 3 V
PULSE
GENERATOR
(See Note Al

INPUT

A

I
Y

3V

1.5 V

I

OUTPUT

l(see Note

1

BI

I

GND

TEST CIRCUIT

-1-----0

~tw--~~I

CL-30pF

EN

1
10%

I

~tPHL
---:::90::::%~ 1

1
1
1

~tPLH

I

1

90% VOH

I

OUTPUT

VOLTAGE WAVEFORMS
NOTES:

A. The pulse generator has the following characteristics: tr S IOns, tf S IOns, tw
B. CL includes probe and jig capacitance.

=

10 I's, PRR

=

5 kHz, Zo

=

50 O.

FIGURE 1. SWITCHING TIMES

TEXAS ",

INSTRUMENTS
POST OFFICE BOX 656303 • DAUAS. TEXAS 75265

4·13

L293D
QUADRUPLE HALF·H DRIVER

APPLICATION INFORMATION
5V

24V

10kC
16

3

1,2EN

Control A

1A

1Y

2

3

o
Motor

2A

2Y

7

6

3,4EN

9

Control B

3A

3Y

10

11

4A

4Y

15

14

Figure 2. Two-Phase Motor Driver

.

4-14

TEXAS'"

INSTRUMENTS
POST OFFICE BOX 655303 .. DALLAS. TEXAS 76266

L298

DUAL FULL·H DRIVER
02942. OCTOBER 1986-REVISED JUNE 1990

•

2-A Output Current Capability per Full-H
Driver

•

Wide Range of Output Supply
Voltage •.. 5 V to 46 V

KV PACKAGE
(TOP VIEWI

~'5

2E
2Y2
2Yl
2A2
2EN
2Al
VCCl
GND
lA2
lEN
lAl
VCC2
lY2
lYl
lE

14
13

•

Separate Input-Logic Supply Voltage

•

Thermal Shutdown

•

Internal Electrostatic Discharge Protection

•

High Noise Immunity

•

Functional Replacement for SGS L29S

12

11
10

9
8

0

7

6
5

description

4

The L298 is a dual high-current fuli-H driver
designed to provide bidirectional drive currents
of up to two amperes at voltages from 5 V to
46 V. It is designed to drive inductive loads such
as relays, solenoids, dc motors, stepping motors,
and other high-current or high-voltage loads in
positive-supply applications. Ali inputs are TTL
compatible. Each output (V) is a complete totempole drive with a Darlington transistor sink and
a psuedo-Darlington source. Each fuli-H driver is
enabled separately. Outputs 1V1 and 1V2 are
enabled by 1 EN and outputs 2V1 and 2V2 are
enabled by 2EN. When an EN input is high, the
associated channels are active. When an EN
input is low, the associated channels are off (i.e.,
in the high-impedance state).
Each half of the device forms a fuli-H reversible
driver suitable for solenoid or motor applications.
The current in each fuli-H driver can be
monitored by connecting a resistor between the
sense output terminal 1E and ground and another
resistor between sense output terminal 2E and
ground.

3
2

~
The tab is electrically connected to pin 8.

logic symbol t
I>

2A2",,(1;.::2,-1_ ;

121 1Y1

Q 1-_-.,;.(1_4..;.1 2Y2

t This

symbol is in accordance with ANSIIIEEE Std 91-1984 and
lEe Publication 617-12.

External high-speed output-clamp diodes should
be used for inductive transient suppression. To
minimize device power dissipation, a VCC1
supply voltage, separate from VCC2, is provided
for the logic inputs.

FUNCTION TABLE
(EACH CHANNELl
INPUTS*
A EN

OUTPUT
V

H

H

The L298 is designed for operation from ODC to

L

H

H
L

70 D C.

X

L

Z

*In the thermal shutdown
mode, the outputs are in
the high-impedance state
regardless of. the input
levels.
H = high-level
L = low-level
X = irrelevant
Z = high-impedance (offl
PRODUCTION DATA do.amanll.ontain information
.arrant II of pablis.tion data. Prodacts conform to
spaelflcatio.. par thalarm. of T.... Instr"mants

::'=~I~·i~:I~i ~.::l:~:; :'l":a":~~!":" not

Copyright © 1990, Texas Instruments Incorporated

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 656303. DALLAS. TEXAS 75285

4-15

L29B
DUAL FULL·H DRIVER
logic diagram (positive logic)
VCC1_{9_1_ _

1Yl
{Zl

VCC2

1Y2

ZYZ

2Yl

{41

{31

{131

{141

{lZI ZA2

lAl.;..{5"-1-4......,I-d,",,",,,

t-____________~

lAZ.{7~1_ _~_ _ _ _ _ _ _

{101 2Al

t-__________~

lEN~{6~1__-4......,____________

{111 zEN

I{SI

{11

lE

{151
ZE

GND

absolute maximum ratings over operating temperature range (unless otherwise noted)
Logic supply voltage, VCC1, (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Output supply voltage, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 50 V
Input voltage range at A or EN, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.3 to 7 V
Output voltage range, Vo ........................................ -2 V to VCC2+2 V
Emitter terminal (11: and 2E) voltage range ................................ -0.5 to 2.3 V
Emitter terminal (1 E and 2E) voltage (nonrepetitive, tw :S 50 I's) ................. . . . .. - 1 V
Peak output current, 10M, (nonrepetitive, tw :S 0.1 ms). . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 3 A
(repetitive, tw :S 10 ms, duty cycle :S 80%) ............... ±2.5 A
Continuous output current, 10 ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 2 A
Peak combined output current for each full-H driver (see Note 2)
(non repetitive, tw :S 0.1 ms) . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 3 A
(repetitive, tw :S 10 ms, duty cycle :S 80%) .............. ±2.5 A
Continuous combined output current for each full-H driver (see Note 2) . . . . . . . . . . . . . .. 3.575 W
Continuous dissipation at (or below) 25°C free,air temperature (see Note 3) ........... 3.575 W
Continuous dissipation at (or below) 75°C case temperature (see Note 3) ................ 25 W
Operating free-air, case, or virtual junction temperature range ................ -40°C to 150°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1;6 mm (1/16 inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . .. 260°C
NOTES: 1. All voltage values are with respect to the network ground terminal, unless otherwise noted.
2: Combined output current applies to each of the two full-H drivers individually. This current is the sum of the currents at outputs
IYl and lY2 for full-H driver 1 and the sum of the currents at outputs 2Yl and 2Y2 for full-H driver 2. The full-H drivers
may carry the rated combined current simultaneously.

3. For operation above 25°C free-air temperature, derate linearly at the rate of 28.6 mW/oC. For operation above 75°C case
temperature, derate linearly at the rate of 333 mW/oC. Due to variations in individual device electrical characteristics and
thermal resistance, the built-in thermal overload protection may be activated at power levels slightly above or below the rated
dissipation.

.."

1iEXAS
.
INSTRUMENTS
4-16

POST OFFICE BOX 655303 • DALLAS, TEXAS 75285

L298

DUAL FULL·H DRIVER
recommended operating conditions
Logic supply voltage, V CC 1

MIN

MAX

4.5

7

V

5

46

V

-0.5 t

2

Output supply voltage, V CC2
Emitter terminal (1 E or 2EI voltage, VE (see Note 41

VCC1- 3.5

UNIT

V

VCC2 -4
2.3

A
High-level input voltage, V,H (see Note 41
EN

VCC1
VCC2- 2.5
7

2.3

V

VCC1
-0.3 t

Low-level input voltage at A or EN, VIL

1.5

V

Output current, 10

±2

A

Commutation frequency, fe

40

kHz

70

°c

Operating free-air temperature, T A

0

tThe algebraic convention, in which the least positive (most negative) designated minimum. is used in this data sheet for emitter terminal

voltage and logic voltage levels.
NOTE 4: For optimum device performance, the maximum recommended voltage at any A input is 2.5 V lower then VCC2, the maximum
recommended voltage at any EN input is VCC1, and the maximum recommended voltage at any emitter terminal is 3.5 V lower
than VCC1 and 4 V lower than VCC2.

electrical characteristics, VCC1 ... 5 V, VCC2
PARAMETER

VOH

High-level output voltage

VOL

Low-level output voltage

TEST CONDITIONS

High-level input current

I,L

Low-level input current

Ve+ 1.2

Ve+ 1.8

Ve+ 1.7

Ve+ 2.6
3.4

= -1 A, 10L = 1 A
10H = -2 A, 10L = 2 A
VI = V,H
VI = V,H S VCC1-0.6 V
VI = 0 to 1.5 V

: See Note 5

2.4
3.5

5.2

30

100

30

Logic supply current

10

=0

7

12

24

32

4

6

All outputs at high level

38

50

All outputs at low level

13

20

All outputs at high impedance
ICC2

Output supply current

10

=0

100
-10

All outputs at low level

All outputs at high impedance

UNIT

V

1 A

All outputs at high level
ICC1

MAX

VCC2-2.8 VCC2- 1.8

10H

r:N

TYP

VCC2-1.8 VCC2-1.2

10L - 2 A

10L

output voltage drop

"H

=

25 °C (unless otherwise noted)
MIN

10H - -1 A
10H = -2 A

Total source plus sink
Vdrop

42V, VE - 0, TJ

V
V
~A
~A

rnA

rnA

2

NOTE 5. The Vdrop specification applies for 10H and 10L applied simultaneously to different output channels.
Vdrop = VCC2 - VOH + VOL - VE

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 75265

4-17

L29B
DUAL FULL·H DRIVER
switching characteristics. VCC1 - 5 V. VCC2 - 42 V. VE - O. TA - 25°C
PARAMETER

TEST CONDITIONS

tdlonl Source current turn-on delay time from A input
td(offl Source current turn-off delay time from A input
tr
tf
td(onl

CL = 30 pF.
See Figure 1

Source current rise time (turning on)

Source current fall time (turning off)
Source current turn-on delay time from EN input
Idloffl Source current turn-off delay time from EN input
tdlonl Sink current turn-on delay time from A input
td(offl Sink current turn-off delay time from A input
Sink current rise time (turning on)
tr
Sink current fall time (turning off)
tf
Idlonl Sink current turn-on delay time from EN input
td(offl Sink current turn-off delay time from EN input

CL = 30 pF.
See Figure 2

TEXAS

~

INSTRUMENTS
4-18

POST OFFICE BOX 856303 • DALLAS. TeXAS 7&286

MIN

TYP
2.5
1.7
0.4
0.2
2.5
1.7
1.5
0.7
0.2
0.2
1.5
0.7

MAX

UNIT
p.s
p.s
"s

p.s
p.s

".
".
"s

".p.s
"Sp.s

L29B
DUAL FULL·H DRIVER
PARAMETER MEASUREMENT INFORMATION
5V

42 V

CIRCUIT
UNDER
TEST

~
Y~~~----~~~--OUTPUT

4 V --:-=--::-~:"i
(See Note BIIo,,;;~_ _ _T-"

CL-30pF
(See Note CI

TEST CIRCUIT

1+--+1-'"

90%

I

INPUT VOLTAGE
WAVEFORM
(See Note BI

~'" 10 ns

10 ns

:,I-=~_ _ _~~I _ _ I _ _ _ _ _ _ 4V

I

I

90%

I

I

I
I
I

I
I
I

10%

10%

"-----0 V
~-------20~s----~~

OUTPUT CURRENT
WAVEFORM

!+-td(on)

I4- t d(off)

I

I

i

I

I

I

I
I
I

I

I
90%

I
I
I
I

OUTPUT VOLTAGE
WAVEFORM

I

90%'

~I=';~---';';'~I·--I----IOH ~ -2A

i+--+I--

I+--M- tr
I
I

-10-%-- IOL ~ 0 A

1
90%

90%

tf
' - - , I - - - - VOH

~

40V

I
I
I
I
10%

10%

-~--VOL ~ 0

VOLTAGE AND CURRENT WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR = 2 kHz, Zo = 50 0.
B. EN is at 4 V if A is used as the switching input. A is at 4 V if EN is the switching input.
C. CL includes probe and jig capacitance.

FIGURE 1. SOURCE CURRENT SWITCHING TIMES FROM DATA AND ENABLE INPUTS

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

4·19

L298

DUAL FULL·H DRIVER
PAR.AMETER MEASUREMENT INFORMATION
5 V

4 V[EN)

42 V

CIRCUIT
UNDER
TEST

EN/A

Y 1-41--....-0UTPUT
CL-30pF
(See Note CI

OV[A)

TEST CIRCUIT

I4-+s
_"",,-::,:~I

~s 10ns

10ns

I

I
I

90%
INPUT VOLTAGE
WAVEFORM
AT A
(See Note BI

I

I
I
I

I
I
I

I
10%

10%

~90~%~--- 4 V

I

~";';"'---=.I'·-I------ OV

~s 10ns

I I
I I
I

INPUT VOLTAGE
WAVEFORM
AT EN
(See Note BI

~s 10ns

;,19~0~%:----~9~0~%,\!1_:-1- -

-

-

4 V

I

I
10%

-

I I

I
~------20~s------~

90%

_10;..%;..;.._ _ _

°V
IOL = 2 A

90%

I
I

OUTPUT CURRENT
WAVEFORM
10%

I

I
I

~tr
I
I

---9-0%~

...'_0..;,;%___ IOH =

°A

I
If--tI-tf

I

1~9==0~%:---

VOH = 42 V

I
OUTPUT VOLTAGE
WAVEFORM

I
I
"-10_%
_______1...
0..;.%JO _

_ _ _ _ _ VOL

= 2V

VOLTAGE AND CURRENT WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR = 2 kHz, Zo = 50 II.
B. EN is at 4 V if A is used as the switching input. A is at 0 V if EN is the switching input.
C. CL includes probe and jig capacitance.

FIGURE 2. SINK CURRENT SWITCHING TIMES FROM DATA AND ENABLE INPUTS

TEXAS . . ,
INSTRUMENTS
4-20

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

L298
DUAL FULL·H DRIVER
APPLICATION INFORMATION
This circuit shows one half of an L298 used to provide full-H bridge drive for a 24-V 2-A dc motor. Speed control
is achieved with a TLC555 timer. This provides variable duty cycle pulses to the EN input of the L298. In this
configuration, the operating frequency is approximately 1.2 kHz. The duty cycle is adjustable from 10% to 90%
to provide a wide range of motor speeds. The motor direction is determined by the logic level at the direction
control input. The circuit may be enabled or disabled by the logic level at the EN input. A 5-V supply .for the
logic and timer circuit is provided by a TL431 shunt regulator. For circuit operation, refer to the function table.
FUNCTION TABLE
ENABLE

X

DIRECTION
CONTROL

1Y1

1Y2

H

H

H

L

source
sink

sink
source

L

X

disabled

disabled

= don't care

=

H

high level

L

=

1.kll

low level
820 G

r---~~--~--------~--------'-'---~~--'--Y~~-----------'---------1~24V

2.7
kO

SPEED
10 kG
CONTROL

TL431
2.7
kO

2.7 kO
1/2 L298

1Yl

DIRECTION
CONTROL

1Y2

1A1

.---------1 VCCl

2.7 kO....

ENABLE
2.7 kG

t Diodes are 1N4934 or equivalent.

FIGURE 3. L298 AS BIDIRECTIONAL DC MOTOR DRIVER

TEXAS ."
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75285

4-21

4-22

SN55451B THRU SN55454B
SN75451 B THRU SN75454B
DUAL PERIPHERAL DRIVERS
02217, DECEMBER 1976-REVISED MAY 1990
SN65451B, SN55452B,
SN55453B, SN55454B , , . JG PACKAGE
SN75451B, SN75452B,
SN75453B, SN75454B ... D OR P PACKAGE

PERIPHERAL DRIVERS FOR
HIGH-CURRENT SWITCHING
AT VERY HIGH SPEEDS

(TOP VIEW)

•

Characterized for Use to 300 mA

•

High-Voltage Outputs

•

No Output Latch-Up at 20 V (After
Conducting 300 mAl

•

High-Speed Switching

•

Circuit Flexibility for Varied Applications

•

TTL-Compatible Diode-Clamped Inputs

•

Standard Supply Voltages

•

Plastic DIP (P) with Copper Lead Frame
Provides Cooler Operation and Improved
Reliability

•

l A D 8 VCC
1B
2
7
2B

3
4

lY
GND

6
5

2A
2Y

SN55451 B, SN55452B,
SN55453B, SN55454B, ... FK PACKAGE
(TOP VIEW)
U

U « U UU
Z~Z>Z

Package Options Include Plastic "Small
Outline" Packages, Ceramic Chip Carriers.
and Standard Plastic and Ceramic 300-mil
DIPs

3
NC

2 1 2019
18

lB

4
5

17

2B

NC

6

16

NC

lY

7

15

NC

8

14

NC

9 1011 1213
UOU>U

SUMMARY OF SERIES 55451B/75451B

ZZZNZ
(!)

DEVICE

LOGIC OF
COMPLETE CIRCUIT

SN554518

ANDt

FK,JG

SN554528

NAND

FK,JG

PACKAGES

SN55453B

OR

FK,JG

SN554548

NOR

FK,JG

SN75451B

AND

D,P

SN754528

NAND

D,P

SN754538

OR

D,P

SN754548

NOR

D,P

NC~No

internal connection

tWith output transistor base connected externally to output
of gate.

description
Series SN55451B/75451B dual peripheral drivers are a family of versatile devices designed for use in
systems that employ TTL logic, This family is functionally interchangeable with and replaces the SN75450
family and the SN75450A family devices manufactured previously, The speed of the SN55451 B/SN75451 B
family is equal to that of the SN75450 family, and the parts are designed to ensure freedom from latchup. Diode-clamped inputs simplify circuit design, Typical applications include high-speed logic buffers, power
drivers, relay drivers, lamp drivers, MOS drivers, line drivers, and memory drivers,
The SN55451 B/SN75451 B, SN55452B/SN75452B, SN55453B/SN75453B, and SN55454B/SN75454B
are dual peripheral AND, NAND, OR, and NOR drivers, respectively, (assuming positive logic), with the
output of the logic gates internally connected to the bases of the n-p-n output transistors,
Series SN55451 B drivers are characterized for operation over the full military range of - 55°C to 125°C,
Series SN75451 B drivers are characterized for operation from OOC to 70°C,

PRODUCTIO. DATA dueu....II ••nI.in i.fa....ti••
o.mnt u 01 publlollio. dl\D. Produo:ta co.form II
.....Hiclti••• por th. tarma .f T.... 1.lIru_ .

:=~Il;"[:I":.1.i =:~:; :.o::-~.ot

Copyright @ 1990, Texas Instrume!1ts Incorporated

TEXAS •
INSTRUMENTS
POST OFFICE BOX 866303 • DALLAS. TEXAS 76266

4-23

8N554518 THRU 8N554548,
8N754518 THRU 8N754548
DUAL PERIPHERAL DRIVER8
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
SN55451B
SN55452B
S1\I55453B
SN55454B
Supply voltage, VCC (see Note 1)
Input voltage
Interemitter voltage (see Note 2)
Off-state output voltage
Continuous collector or output current (see- Note 4)
Peak collector or output current
(tw :s 10 ms, duty cycle :s 50%, see Note 4)
Continuous total power dissipation
Operating free-air temperature range, T A

7

UNIT

7
5.5
6.5

5.5
5.5

V

30
400

30
400

V
V
V
mA

500

500

mA

See Dissipation Rating Table
-55to125
o to 70
°c
-65 to 150 -65 to 150
°c

Storage temperature range
Case temperature for 60 seconds
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds
Lead temperature 1,6 mm (1,1.6 inch) from case for 10 seconds
NOTES: 1.
2.
3.
4.

SN75451B
SN75452B
SN75453B
SN75454B

I FK package
I JG package
I

260

°C

300

°c
°c

D or P package

260

Voltage values are with respect to the network ground terminal unless otherwise specified.
This is the voltage between two emitters of a multiple-emitter transistor.
This value applies when the base-emitter resistance (RBE) is equal to or less than 500 O.
Both halves of these dual circuits may conduct rated current simultaneously; however, power dissipation averaged over a
short time interval mllst fall within the continuous dissipation rating.
DISSIPATION RATING TABLE
PACKAGE

TA:S 25°C
POWER RATING

D
FK

725mW
1375 mW

JG

1050 mW
1000 mW

P

DERATING FACTOR
ABOVE TA - 25°C
5.B mW/oC

TA - 70°C
POWER RATING
464mW

TA - 125°C
POWER RATING

BSOmW
672mW

275 mW

11.0 mW/oC
S.4 mW/oC
B.O mW/oC

210mW

640mW

recommended operating conditions
SERIES 55451 B
Supply voltage, VCC
High-level input voltage, VIH
Low-level input voltage, VIL
Operating free-air temperature, T A

MIN

NOM

4.5
2

5

-55

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 855303 • DAllAS. TEXAS 75285

MAX
5.5

SERIES 76451B
MIN
4.75

NOM
5

MAX
5.25

V

O.S

V
V

70

°c

2
O.S
125

0

UNIT

SN55451B, SN75451B
DUAL PERIPHERAL POSITIVE·AND DRIVERS
logic symbol t
1A
1B
2A
2B

logic diagram (positive logic)

(1)

SoC>

(3) 1Y

~

(2)
(6)

(5) 2Y

(7)

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
FUNCTION TABLE
(EACH DRIVER I

schematic leach driver)

A

B

Y

L

L

L (on statel

L

H

L (on state I

r-----~----.--------VCC

H

L

L (on state I

H

H

H (off state I

4kl1

positive logic:_ _
Y = AB or A+B

Y

A
B

L....4__------~----+4__~~- GND

Pin numbers shown are for 0, JG, and P packages.

Resistor values shown are nominal.

electrical characteristics over recommended operating free-air temperature range
PARAMETER
VIK
IOH

Input clamp voltage

=

VCC

MIN,

VCC - MIN,

High-level output current

VOH

=

10L

Low-level output voltage

=
=

=

VIH

MAX

-1.2

-1.5

-12 mA

=

MIN,

300 mA

Input current at maximum input voltage

VCC - MAX,

IIH

High-level input current

VCC

IlL

Low-level input current

VCC - MAX,

VI - 0.4 V

ICCH Supply current, outputs high
ICCL Supply current, outputs low

VCC - MAX,

VI - 5 V

VCC - MAX,

VI

=

MAX,

=

-1.5
100

0.25

0.5

0.25

0.4

0.5

0.8

0.5

0.7

VI - 5.5 V
VI

-1.2

UNIT
V
~A

V

VIL - 0.8 V,

II

SN75451B
MIN TYP§ MAX

300

VIL - 0.8 V,

100 mA

VCC - MIN,
10L

II

MIN TYP§

30 V

VCC - MIN,
VOL

SN55451B

TEST CONDITIONS*

2.4 V
1

=0

1

1

mA

40

40
1.6

"A
mA

1.6

1

7

11

7

11

mA

52

65

52

65

mA

:t: For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
§AII typical values are at VCC

=

5 V, TA

=

25°C.

switching characteristics, Vee" 5 V, TA = 25°e
PARAMETER

TYP

MAX

18

25

ns

= 15 pF,

18

25

ns

See Figure 1

5

8

ns

7

12

TEST CONDITIONS

tPLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
ITLH Transition time, low-to-high-Ievel output
tTHL Transition time, high-to-Iow-Ievel output
VOH High-level output voltage after switching

10 ~ 200 mA, CL
RL;" 50

l SN55451B
I SN75451B

n,

Vs = 20 V,

10

See Figure 2

MIN

= 300 mA,

VS-6.5
VS-6.5

UNIT

ns
mV

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

4-25

SN554528. SN754528
DUAL PERIPHERAL POSITIVE·NAND DRIVERS
logic symbol t
lA
lB
2A
2B

logic diagram (positive logic)

(1)

&£>

(2)
(6)

m

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.
FUNCTION TABLE
lEACH DRIVER)
B
L
H

A
L
L
H

L
H

H

schematic (each driver)

V
H (off state)
H (off state I
H (off statel
L (on statel

positive logic:

y ~

i'iB or A+B

B

Pin numbers shown are for D, JG, and P packages.

Resistor values shown are nominal.

electrical characteristics over recommended operating free-air temperature range
TEST CONDITIONS;

PARAMETER
VIK
10H

VOL

Input clamp voltage
High-level output current

Low-level output voltage

Vee - MIN,
Vce = MIN,
VOH

Input current at maximum

=

IIH
IlL

input voltage
High-level input current
Low-level input current

ICCH
ICCL

Supply current, outputs high
Supply current, outputs low

VIL

=

0.8 V

VIH

=

MIN

VIH

=

MIN,

-1.2

=

Vee
Vec
VCC

=
=
=
=

MIN

SN75452B
TVP§ MAX

-1.5

-1.2

-1.5

300

100

0.25

0.5

0.25

0.4

0.5

0.8

0.5

0.7

-1.1

UNIT
V

p.A

V

300 rnA

Vee

VCC

11--12mA

SN55452B
TVpl MAX

30 V

Vee = MIN,
10L = 100 rnA
Vee = MIN,
10L

II

=

MIN

VI

=

5.5 V

1

1

rnA

MAX,
MAX,
MAX,

VI
VI

= 2.4 V
= 0.4 V

40
-1.6

-1.1

40
-1.6

/LA
rnA

MAX,

VI

14
71

11
56

14
71

rnA
rnA

MAX,

VI = 0

11

=

56

5V

; For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
§ All typical values are at VCC = 5 V, TA = 25°C.

switching characteristics. Vee - 5 V. TA = 25°e
PARAMETER
tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output

TEST CONDITIONS

tTLH Transition time, low-to-high-Ievel output
tTHL Transition time, high-to-Iow-Ievel output
VOH High-level output voltage after switching

I

SN55452B

I SN75452B

200 rnA, CL = 15.pF,
See Figure 1

10

~

RL

= 5011,

Vs - 20 V,
See Figure 2

10

~

TEXAS . "

INSTRUMENTS
4-26

MIN

POST OFFICE BOX 655303. DALlAS. TEXAS 75265

TVP

MAX

26
24

35
35

5

8
12

7
VS-6.S

300 rnA,
VS-6.5

UNIT
ns
ns
ns
ns
mV

SN55453B. SN75453B
DUAL PERIPHERAL POSITIVE-OR DRIVERS
logic symbol t
1A
1B
2A
2B

logic diagram (positive logic)

(1)

2:11>

(3) 1Y

~

(2)

1A (1)
1B (2)

(6)

(5) 2Y

(7)

2A (6)
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.

2B _(7_)......_ "

FUNCTION TABLE
(EACH DRIVER)
A

B

schematic (each driver)

L

L

Y
L (on state)

L

H

H (off statel

H

L

H (off state)

H

H

H (off state)

A

positive logic:
Y = A+B or

B

AB

Pin numbers shown are for D, JG, and P packages.

Resistor values shown are nominal.

electrical characteristics over recommended operating free-air temperature range
PARAMETER
VIK

Input clamp voltage

10H

High-level output current

VOL

Low~level

II

output voltage

Input current at maximum

TEST CONDITIONS*

= MIN,
= MIN,
VOH = 30 V
VCC = MIN,
10L = 100 mA
Vec = MIN,
10L = 300 mA

=

MIN

Vee

II

Vce

VIH

=

VIL

= 0.8

V,

VIL

= 0.8

V,

SN55453B
TYP§
MAX
-1.2

-12 mA

=

MIN,

MIN

SN75453B
TYP§ MAX

-1.5

-1.2

-1.5
100

300
0.25

0.5

0.25

0.4

0.5

0.8

0.5

0.7

-1

UNIT
V
~A

V

VCC

=

MAX,

VI

5.5 V

1

1

mA

Low-level input current

VCC
Vec

MAX,
MAX,

VI = 2.4 V
VI - 0.4 V

-1

40
-1.6

40
-1.6

mA

ICCH

Supply current, outputs high

Vec

MAX,

VI

11

8

11

mA

Supply current, outputs low

VCC

MAX,

VI

=5V
=0

8

ICCL

=
=
=
=

54

68

54

68

mA

TYP

MAX

UNIT

18

25

ns

16

25

ns

5

8

ns

7

12

input voltage
IIH

High-level input current

IlL

~A

:t: For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
§AII typical values are at VCC = 5 V, TA = 25°C.

switching characteristics. Vee - 5 V. TA = 25°e
TEST CONDITIONS

PARAMETER
tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
tTLH Transition time, low-to-high-Ievel output
trHL Transition time, high-to-Iow-Ievel output
VOH High-level output voltage after switching

MIN

10 = 200 mA, eL = 15 pF,
See Figure 1
RL = 5011,

I SN554538
I SN754538

Vs = 20 V,
See Figure 2

10

= 300 mA,

VS-6.5
VS-6.5

ns
mV

TEXAS .."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

4-27

SN554548, SN754548
DUAL PERIPHERAL POSITIVE-NOR DRIVERS

logic symbol t
1A
1B
2A
2B

logic diagram (positive logic)

(1)

.,,1[>

(2)
(6)

(7)

tThis symbol is in accordance with ANSI/IEEE Std 91 -1984 and
IEC Publication 617-12.

FUNCTION TABLE
lEACH DRIVER)

schematic (each driver)
A
L

B
L

Y
H (off state)

L

H

L (on statel
L Ion state)
L Ion state)

H

L

H

H

Vcc

A

positive logic:

Y ~

A+li

or

B

AB

1 kfl
Pin numbers shown are for D, JG, and P packages.

Resistor values shown are nominal.

electrical characteristics over recommended operating free-air temperature range
PARAMETER
VIK
10H

Input clamp voltage
High-level output current

VCC ~ MIN,

II

VCC - MIN,

VIL - 0.8 V

Low-level output voltage

10L

~

Input current at maximum
input voltage

~

MIN,

-12mA

-1.2

~

VCC

VIH

~

MIN

VIH

~

MIN,

~

VI

~

SN75454B
TVP§
MAX

-1.5

-1.2

UNIT

-1.5

V

100

p.A

0.25

0.5

0.25

0.4

0.5

0.8

0.5

0.7

V

300 mA
MAX,

MIN

300

100 rnA

VCC ~ MIN,
IOL

II

~

VOH ~ 30 V
VCC

VOL

SN55454B
MIN, TVP§
MAX

TEST CONDITIONS*

5.5 V

1

IIH

High-level input current

VCC - MAX,

IlL

Low-level input current

VCC

~

MAX,

VI - 2.4 V
VI ~ 0.4 V

ICCH

Supply current, outputs high

VCC

~

MAX,

VI

~

0

13

17

ICCL

Supply current, outputs low

VCC ~ MAX,

VI

~

5 V

61

79

1

40
-1

-1.6

mA

40

p.A

-1.6

mA

13

17

mA

61

79

mA

TYP

MAX

UNIT

27

35

ns

-1

~ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
§Alltypical values are atVcc ~ 5V,TA ~ 25°C.

switching characteristics. Vee = 5 V. TA ... 25°e
PARAMETER

TEST CONDITIONS

tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
tTLH Transition time, low-to-high-Ievel output
tTHL Transition time, high-to-Iow-Ievel output
VOH High-level output voltage after switching

I SN554548
I SN75454B

10

= 200 mA,

CL

= 15 pF,

24

35

ns

RL

~

See Figure 1

5

8

ns

7

12

Vs

~

50O,
20 V,

10

= 300 mA,

See Figure 2

TEXAS •
INSTRUMENTS
4-28

MIN

POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

VS-6.5
VS-6.5

ns
mV

SN554518 THRU SN554548
SN754518 THRU SN754548
DUAL PERIPHERAL DRIVERS
PARAMETER MEASUREMENT INFORMATION

-.!
INPUT 2.4 V

~

'4538

OUTPUT

II-jl---~~ciRc:urr-::::7)

GND

:

I

--.!

:,.190=%:----- 3 V
1.5 V

1

I

'4528

PULSE
GENERATOR
(See Note AI

I

INPUT 90%
'4518 1.5 V

10V

,14-,,;10 n.

~

I

10% I I
""'-':.:.:...--If-....:..:=--·-I- - - - - - - OV

J

:'---0.51'5

I I4-s5 ns
-.I I .. ,,; 10 ns
I I ;"=::---f:~-,:-::.,.,..,:'-I-I-------3V
INPUT
I I
90%
90%
I
'4528
I
1.5 V
I
'4548 10% I
I 1 10%
OV
I

I

I4-tPLH~

:SU8

I

I
I
I

90%

*

VOH
90%

I

50%
I
10%
10%
I
~"-------'!I- -I - - VOL

OUTPUT

:'-1

tTLH~

'--tTHL
TEST CIRCUIT

14-

VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: PRR
B. CL includes probe and jig capacitance.

s 1 MHz, Zo

~.

50 0.

FIGURE 1. SWITCHING TIMES OF COMPLETE DRIVERS
~

GENERATOR~I---~~~rrRlCITI~-:::~
(Soe Note AI

INPUT
'4528
'4548

:r.::90:::%:----- 3 V
1.5 V

10% I I

"""~-_If-....:..:c:.:J\-I-------

--.!
OUTPUT

:

1
I
I

'4518
'4538

PULSE

14-,,;10n.

I

VS=20V

:'---4O!'5
I 14-,,;5 ns

OV

J
-.I I "s10 n.

I I ...'c.:90
:::%:::----f'f---;::::;o:lc'-I-I-- - - - --3 V
I
90%
I
1
1.5 V
:
10%
1\..;.;10%:':':"'_ _ _ 0 V

I

~

.,..
TEST CIRCUIT

_____J~:::

VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: PRR
B. CL includes probe and jig capacitance.

s 12.5 kHz, Zo = 50 0.

FIGURE 2. LATCH-UP TEST OF COMPLETE DRIVERS

TEXAS •
INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TEXAS 75285

4-29

SN554518 THRU SN554548,
SN754518 THRU SN754548
DUAL PERIPHERAL DRIVERS
TYpICAL CHARACTERISTICS
TRANSISTOR
COLLECTOR·EMITTER SATURATION VOLTAGE

vs
COLLECTOR CURRENT

l'

t

~

0.6
0.5

.~

0.4

~

0.3

~

0.2

·sw
.!!

'0

'i'

0.1

!~

0

>

J

10

18

VI

See Note 5

IS

..
en

I

I

~ =

TA=7~~

V

I--

--10

TA=OoC

V~~~

~~

°

rl=n II

20

40
70 100
200
Ic-Collector Current-mA

NOTE 5: These parameters must be measured using pulse techniques. tw = 300

~s.

duty cycle

FIGURE 3

TEXAS . "
INSTRUMENTS
4-30

400

POST OFFiCe BOX 665303 • DALLAS. TEXAS 75265

s 2%.

SN55461 THRU SN55464
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
02218, DECEMBER 1976-REVISED MAY 1990

PERIPHERAL DRIVERS FOR HIGH-VOLTAGE.
HIGH-CURRENT DRIVER APPLICATIONS
•

Characterized for Use to 300 mA

•

High-Voltage Outputs

•

No Output Latch-Up at 30 V (After
Conducting 300 mAl

•

Medium-Speed Switching

•

Circuit Flexibility for Varied Applications and
Choice of Logic Function

•

TTL-Compatible Diode-Clamped Inputs

•

Standard Supply Voltages

•

Plastic DIP (PI with Copper Lead Frame for
Cooler Operation and Improved Reliability

SN55461, SN55462,
SN55463, SN55464 , , • JG PACKAGE
SN75461. SN75462.
SN75463 ... D OR P PACKAGE
(TOP VIEWI
1 A U 8 vcc
lB 2
7 2B
1Y 3
6
2A
GND'
5
2Y

SN55461. SN65462.
SN55463. SN55464 •... FK PACKAGE
ITOP VIEWI

•

u

u

«

3

2 1 2019

u uu

z~z>z

Package Options Include Plastic "Small
Outline" Packages. Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs

18

1B
NC
1Y
NC

5

17

6
7
8

16
15
9 10111213

l'

NC
2B
NC
2A
NC

uou>u
ZZZNZ
Cl

SUMMARY OF SERIES 55461/75461
DEVICE
SN55461

LOGIC
AND

PACKAGES
FK.JG

SN55462
SN55463
SN55464

NAND

FK.JG

OR
NOR

FK.JG
FK.JG

SN75461

AND

D.P

SN75462
SN75463

NAND
OR

D.P
D.P

NC - No internal connection

description
These dual peripheral drivers are functionally interchangeable with SN55451 B through SN55454B and
SN75451. B through SN75453B peripheral drivers, but are designed for use in systems that require higher
breakdown voltages than those devices can provide at the expense of slightly slower switching speeds.
Typical applications include logic buffers, power drivers, relay drivers, lamp drivers, MOS drivers, line drOers,
and memory drivers.
The SN55461/SN75461, SN55462/SN75462, SN55463/SN75463, and SN55464 are dual peripheral
AND, NAND, OR, and NOR drivers; respectively, (assuming positive logic), with the output of the gates
internally connected to the bases of the n-p-n output transistors.
Series SN55461 drivers are characterized for operation over the full military temperature range of - 55°C
to 125°C; Series SN75461 drivers are characterized for operation from OOC to 70°C.

PRODUCTION DATA documants contsln informotlo.
cu......t al publication datil. 'roducts conlonn to
.paCiflcatlo.. par tha terms ., Tax•• Instrumants

0'

:=~~'I:I~1; =:~i:r l!lo=~::.

not

Copyright © 1990, Texas Instruments Incorporated

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 866303 • DALLAS, TEXAS 75285

4-31

SN55461 THRU SN55464
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
SN55461

SN75461
SN75462

SN55462
SN55463
SN55464
Supply voltage, Vee (see Note 1)
Input voltage
Interemitter voltage (see Note 2)
Off-state output voltage
Continuous collector or output current (see Note 3)
Peak collector or output current
(t'" s 10 ms, duty cycle s 50%, see Note 3)
Continuous total power dissipation
Operating free-air temperature range, T A

Storage temperature range
FK package

Case temperature for 60 seconds

Lead temperature 1,6 mm

JG package

(1/16 inch) from case for 60 seconds
Lead temperature 1,6 mm

V
V

7

7
5.5
5.5

5.5
5.5

35
400

35
400

rnA

500

500

rnA

V
V

See Dissipation Rating Table
-55 to 125
o to 70
°e
-65 to 150
-65 to 150
°e
260
°e
300

°e

D or P package

(1/16 inch) from case for 10 seconds

UNIT

SN75463

260

°e

NOTES: 1. Voltage values are with respect to network ground terminal unless otherwise specified.
2. This is the voltage between two emitters of a multiple-em,itter transistor.
.
3. Both halves of these dual circuits may conduct rated current simultaneously; however, power dissipation averaged over a
short time interval must fall within the continuous dissipation rating.
DISSIPATION RATING TABLE

D

TA '" 25°C
POWER RATING
725 mW

FK
JG
P

1375 mW
1050 mW
1000 mW

PACKAGE

DERATING FACTOR
ABOVE TA - 25°C
5.8 mW/oe
11.0 mW/oe
8.4 mW/oe

TA - 70°C
POWER RATING
464mW
880mW

TA - 125°C
POWER RATING

672 mW
640mW

210mW

8.0 mW/oe

275 mW

recommended operating conditions

Supply voltage, Vee
High-level input voltage, VIH
Low-level input voltage, VIL
Operating free-air temperature, T A

SN55461
THRU SN55464
MIN NOM MAX
4.5
5
5.5
2
-55

TEXAS . "
INSTRUMENTS
4-32

POST OFFICE BOX 855303 • DALLAS. TeXAS 75285

0.8
125

SN75461
THRU SN75463
MIN NOM MAX
4.75
5
5.25
2
0

0.8
70

UNIT
V
V
V
°e

SN55461. SN75461
DUAL PERIPHERAL POSITIVE·AND DRIVERS
logic diagram (positive logic)

logic symbol t
1A
18
2A
2B

t1}

&C>

t3} 1Y

~

(2)
(6)

(5) 2Y

(7)

. / - r - - 2Y

t This symbol is In accordance with ANSI/IEEE STD 91-1984 and
lEe Publication 617-12.
Pin numbers shown are for 0, JG, and P packages.

FUNCTlo.N TABLE

schematic (each driver)
r------.-----.-------vcc

(EACH DRIVER)
A

B

Y

L

L

L (on statel
L (on statel

4kr!

L

H

H

L

L (on state)

H

H

H (off state)

Y

A

positive logic: _ _

B

Y~ABorA+B

~~------~----~~--~~GND

Resistor values shown are nominal.

electrical characteristics over recommended operating free-air temperature range
PARAMETER
VIK
lo.H

VOL

Input clamp voltage
High-level output current

Low-level output voltage

SN55461

TEST Co.NDITIONSt
~

Vee

MIN,

Vee ~ MIN,

II

~

MIN

-12mA

VIH

~

MIN,

Vee ~ MIN,
lo.L ~ 100 mA

VIL

~

0.8 V,

Vee ~ MIN,

VIL - 0.8 V,

TYP*
-1.2

Input current at maximum

~

Vee

MAX,

VI

~

5.5 V

~

2.4 V

IIH

input voltage
High-level input current

Vee ~ MAX,

VI

IlL

Low-level input current

Vee - MAX,

VI - 0.4 V

leeH

Supply current, outputs high

Vee ~ MAX,

VI

~

5 V

leeL

Supply current, outputs low

Vee

VI

~

0

~

MAX,

MIN

-1.5

TYP*
-1.2

300

Vo.H ~ 35 V

MAX

UNIT

-1.5

V

100

p.A

0.25

0.5

0.25

0.4

0.5

0.8

0.5

0.7

V

lo.L ~ 300 mA
II

SN75461
MAX

1

-1

40
-1.6

-1

1

mA

40
-1.6

mA

p.A

8

11

8

11

mA

56

76

56

76

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditons.
*AII typical values are at Vee ~ 5 V, TA ~ 25°e.

switching characteristics, Vee

=

5 V, TA ... 25°e

PARAMETER
tpLH

TEST Co.NDITlo.NS

tpHL Propagation delay time, high-to-Iow-Ievel output
lTLH Transition time, low-to-high-Ievel output
tTHL Transition time, high-to-Iow-Ievel output
Vo.H

MIN

Propagation delay time, low-to-high-Ievel output

ISN55461
High-level output voltage after switching I SN75461

10. = 200 rnA,
RL = 50O,
Vs = 30 V,
See Figure 2

eL = 15 pF,
See Figure 1

10

= 300 rnA,

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75286

TYP

MAX

30

55

ns

25

40

ns

8

20

ns

10

20

ns

VS-l0
VS-l0

UNIT

mV

4-33

SN55462, SN75462
DUAL PERIPHERAL POSITIVE·NAND DRIVERS
logic diagram (positive logic)

logic symbol t
lA
lB
2A
2B

(1)

&1>
lY

(2)
(6)

2Y

m

tThis symbol is in accordance with ANSI/IEEE STD 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for 0, JG, and P packages.

schematic (each driver)

FUNCTION TABLE
(EACH DRIVER)
A

B

V

L

L

H (off state)

L

H

H (off state)

H

L

H (off state)

H

H

L (on state)

A

positive logic:

B

Y=ABorA+B

Resistor values shown are nominal.

electrical characteristics over recommended operating free-air temperature range
PARAMETER
VIK
10H

Input clamp voltage
High-level output current

Low-level output voltage

MIN

VCC = MIN,

II = -12 rnA

VCC = MIN,

VIL = 0.8 V,

10L = 100 rnA
VCC = MIN,

Input current at maximum
input voltage

VI = 5.5 V

MIN

-1.5

TYP'
-1.2

MAX
,-1.6
100

0.25

0.6

0.25

0.4

0.5

0.8

0.5

0.7

UNIT
V

p.A

V

VIH = MIN,

VCC = MAX,

SN75462
MAX

300

VIH - MIN,

10L = 300 rnA
II

TYP'
-1.2

VOH = 35 V
VCC - MIN,

VOL

SN55462

TEST CONDITIONSt

1

1

40

p.A

-1.6

rnA

13

17

rnA

61

76

rnA

40

IIH

High-level input current

VCC = MAX,

VI - 2.4 V

IlL

Low-level input current

VCC = MAX,

VI = 0.4 V

ICCH

Supply current, outputs high

VCC = MAX,

VI = 0

13

17

ICCL

Supply current, outputs low

VCC - MAX,

VI - 6V

61

76

-1.1

-1.6

rnA

-1.1

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
tAli typical values are at VCC = 5 V, TA = 25"C.

switching characteristics. Vee - 5 V. TA - 25°e
PARAMETER

TEST CONDITIONS

tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output

~

200 rnA,

RL = 50!l,

tTLH Transition time, low-to-high-Ievel output
tTHL Transition time, high-to-Iow-Ievel output
VOH

10

.
. .
IsN55462
High-level output voltage after sWitching IsN75462

Vs = 30 V,
See Figure 2

TYP

MAX

45

65

ns

= 15 pF,

30

50

ns

See Figure 1

13

26

ns

10

20

CL

VS-l0

10'" 300 rnA,

TEXAS ."

INSTRUMENTS
4-34

MIN

POST OFFICE BOX 866303 • DALLAS. TEXAS 75286

VS-l0

UNIT

ns
mV

SN55463. SN75463
DUAL PERIPHERAL POSITIVE·OR DRIVERS
logic symbol t
1A
18
2A
28

logic diagram (positive logic)

(1)

2:1C>

(3) 1Y

~

(2)

1A (1)
18 (2)

(6)
(5) 2Y

(7)

2A.:.:(6::.)..r-....
tThis symbol is in accordance with ANSI/IEEE STD 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for D, JG, and P packages.

28_(7_),._,

FUNCTION TABLE
(EACH DRIVER)

schematic (each driver)

A
l

8
l

Y
l (on state)

l

H

H (off state)

H
H

l
H

H (off state)
H (off state)

A
B

positive logic:

Y

A + 8

or

AS

Resistor values shown are nominal.

electrical characteristics over recommended operating free-air temperature range

VIK
10H

Val

II
IIH
III
ICCH
ICCl

Input clamp voltage
High-level output current

low-level output voltage

Input current at maximum
input voltage
High-level input current
Low-level input current
Supply current, outputs high
Supply current, outputs low

SN55463

TEST CONDITIONS t

PARAMETER

= MIN,
VCC = MIN,
VOH = 35 V
VCC = MIN,
10l = 100 mA
VCC = MIN,
10l = 300 mA
VCC = MAX,
VCC = MAX,
VCC

VCC = MAX,
VCC
VCC

= MAX,
= MAX,

II

=

MIN

-12 mA

VIH

= MIN,

Vil

= 0.8 V,

Vil

= 0.8 V,

VI

TVP'
-1.2

MAX
-1.5

MIN

SN75463
TVp: MAX
-1.2

300

100

0.25

0.5

0.25

0.4

0.5

0.8

0.5

0.7

= 5.5 V
= 2.4 V

V
~A

1

mA

40
-1.6

~
mA

11
76

mA
mA

1

-1

40
-1.6

=5V
=0

8
58

11

8

76

58

VI

UNIT

V

VI
VI = 0.4 V
VI

-1.5

-1

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended oparating conditions.
*AII typical values are at Vec = 5 V, TA = 25°C.

switching characteristics. Vee - 5 V. TA - 25°e
tplH

PARAMETER
Propagation delay time, low-to-high-Ievel output

tPHl Propagation delay time, high-to-Iow-Ievel output
tTlH Transition time, low-to-high-Ievel output
tTHl Transition time, high-to-Iow-Ievel output
VOH

ISN55463
High-level output voltage after switching ISN75463

TEST CONDITIONS

= 200 mA,
Rl = 50O,

10

Vs = 30 V,
See Figure 2

MIN , TVP
30

MAX
55

25

40
25

Cl = 15 pF,
See Figure 1

8
10

10 = 300 mA,

VS-l0
VS-l0

25

UNIT
ns
ns
ns
ns
mV

TEXAS . "

. INSTRUMENTS
POST OFFICE BOX 866303 • DALLAS, TeXAS 75265

4-35

SN55464
DUAL PERIPHERAL POSITIVE-NOR DRIVER
logic symbol t
1A
1B
2A
2B

logic diagram (positive logic)

(1)

;,:1C>

(2)
(6)

(7)

t This symbol is in accordance with ANSI/IEEE STD 91-1984 and
lEe Publication 617-12.
Pin numbers shown are for the JG package.

FUNCTION TABLE
(EACH DRIVER)
A
L
L
H
H

B
L
H
l
H

schematic (each driver)

Y
H (off state)
L (on state)
l (on state)
l (on state)

A
B

positive logic;
Y=A+BorAB

Resistor values shown are nominal.

electrical characteristics over recommended operating free-air temperature range

VIK
IOH

VOL

SN55464

TEST CONDITIONSt

PARAMETER
Input clamp voltage

VCC = MIN,
VCC = MIN,

High-level output current

VOH = 35 V
VCC = MIN,
10l = 100 mA

low-level output voltage

MIN

II = -12 mA

II

Input current at maximum input voltage
High-level input current

Vce = MAX,

~urrent

VCC = MAX,
VCC = MAX,

VI - 2.4 V
VI = 0.4 V
VI = 0

Vce = MAX,

VI - 5 V

Supply current, outputs high
Supply current, outputs low

300

VIH = MIN,

IIH
IlL
ICCH
ICCl

MAX
-1.5

Vil = 0.8 V,

Vee - MIN,
10l = 300 mA
VCC = MAX,

Low-level input

TYP*
-1.2

0.25

0.5

0.5

0.8

-1

UNIT
V
p.A

V

VIH - MIN,
VI = 5.5 V

1
40
-1.6
19

14
67

85

mA
~A

mA
mA
mA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
*AII typical values are at VCC = 5 V, TA = 25°C.

switching characteristics. Vee - 5 V. T A - 25°e
PARAMETER
tpLH Propagation delay time, low-to-high-Ievel output
tPHl Propagation delay time, high-to-Iow-Ievel output
tTlH Transition time, low-to-high-Ievel output

TEST CONDITIONS
10

~

200 mA,

Rl = 5011,

MIN

Cl = 15 pF,
See Figure 1

ISN55464
High-level output voltage after switching I SN75464

Vs = 30 V,
See Figure 2

10

~

TEXAS . "

INSTRUMENTS
4-36

POST OFFICE BOX

65530~

• DAllAS. TEXAS 75265

MAX
65

30

50
20
20

8
10

mil Transition time, high-to-Iow-Ievel output
VOH

TYP
40

300 mA,

VS-l0
VS-l0

UNIT
ns
ns
ns
ns
mV

SN55461 THRU SN55464
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
PARAMETER MEASUREMENT INFORMATION

""1

~<10ns

::r::90==%-:------ 3 V

(

I

I

INPUT 2.4 V

10V

r:;;,-.

I

'461
'463

-1-------

J
...., I if.< 10 ns

'462
OUTPUT

I~~--!---f(ITRcu~~:;"

PULSE
GENERATOR
I(See Not. AI

1.SV

10% I 1

:,---------I~----~I-I-I

INPUT

- - - - - - -3 V

: I
lSV
I

90%

90%

'462
'464

OV

1 1 1 0%

•

I ~::':::"-----OV
GND

If-tpLH~

:SUB

I

(

I

90%

,J;.

1

SO%

OUTPUT

I

....,I
TEST CIRCUIT

I
~I-IJ'--------------1I - -1- - VOL

10%

10%

~tTHL

tTLH~

14-

VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: PRR s 1 MHZ, Zout ~ 50 O.
B. CL includes probe and jig capacitance.

FIGURE 1. SWITCHING TIMES

""1

~<10 ns

:,.:=,..-_____ 3 V

I
I
I
I

VS= 30V

90%

1.S V

10% I 1

-1-------

OV

..I
...., I if. <10 ns

PULSE
GENERATOR
(See Note AI

L1.__.J--.JLcm:mrr-:-:::fl

:.--------I~----.....!I-I -I

OUTPUT

90%

90%

- - - - - - -3 V

I 1
I

I

'464

I
~10:.:%=--_ _ _ 0

TEST CIRCUIT

V

.O"~11------------~~:::
VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: PRR
B. CL includes probe and jig capacitance.

s

12.5 kHz, Zo = 50 II.

FIGURE 2, LATCH-UP TEST

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 75265

4-37

4-38

SN75372
DUAL MOSFET DRIVER
JULY 1986

•

Dual Circuits Capable of Driving HighCapacitance Loads at High Speeds

•

Output Supply Voltage Range Up to 24 V

•

Low Standby Power Dissipation

D OR P PACKAGE
(TOP VIEWI

1 A D 8 VCC1

description
The SN75372 is a dual NAND gate interface
circuit designed to drive power MOSFETs from
TTL inputs. It provides high current and voltage
levels necessary to drive large capacitive loads
at high speeds. The device operates from a
VCC1 of 5 V and a VCC2 of up to 24 V.
The SN75372 is characterized for operation from
OOC to 70°C.

E
2A

2
3

7
6

1Y
2Y

GND

4

5

VCC2

logic symbol t
E (21

(11

(7)

1Y

2A (31

(61

2Y

lA

tThis symbol is in accordance with ANSI/lEEE Std 91-1984 and
lEe Publication 617-12.

logic diagram (positive logic)
E (21

1A (11

2A ..:.13::.:1_ _L~

schematic (each driver)

TO OTHER {
DRIVER

INPUT A

------41-__......---1
OUTPUT Y

ENABLE E -

-.--+-l'I......

.......

t--4------~-----~~--~~-GND

'--__+

PRODUCTIOI DATA d.cumanll contain informltion
current .s of publiution dll8. Preductl conform 10
spocific01ions por Ib tar.." of TIlIII In01.....nta

::.~~::~i;·i~:I~li =~~~r fll":'':~'::.s n01

}

TOOTHER
DRIVER

Copyright © 1986, Texas Instruments Incorporated

TEXAS " ,
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75285

4-39

SN75372

DUAL MOSFET DRIVER
absolute maximum tatings over operating free-air temperature range (unless otherwise notedl
Supply voltage range of VCC1 (see Note 1) ............................... -0.5 V to 7 V
Supply voltage range of VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 25 V
Input voltage ................ : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Peak output current (tw < 10 ms, duty cycle < 50%): Sink ......... ".............. 500 mA
Source. . . . . . . . . . . . . . . . . . . .. 500 mA
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range, T A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. O°C to 70°C
Storage temperat·ure range ......................................... "- 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds .............. '........ 260°C
NOTE 1: Voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
PACKAGE

o
p

TA - 25·C
POWER RATING
725 mW
1000 mW

DERATING FACTOR
ABOVE TA - 25·C
5.8 mW/oC
8.0 mW/oC

TA - 70·C
POWER RATING
464mW
640mW

recommended operating conditions
MIN
4.75
4.75
2

Supply voltage, VCCI
Supply voltage, VCC2
High-level input voltage, V,H
Low-level input voltage, V,L
High-level output current, 'OH
Low-level output current, IOL
Operating free-air temperature, TA

0

" TEXAS'"
4-40

INSTRUMENTS
POST OFFICe BOX 656303 • DALLAS, TEXAS 75266

NOM
5
20

MAX
5.25
24
0.8
-10
40
70

UNIT
V
V
V
V
rnA
rnA
°C

SN75372
DUAL MOSFET DRIVER

electrical characteristics over recommended ranges of VCC1. VCC2. and operating free-air temperature
(unless otherwise noted)
TEST CONDITIONS

PARAMETER

VIK
VOH

VOL

Input clamp voltage
High-level output voltage

Low-level output voltage

II

Output clamp diode
forward voltage
Input current at maximum
input voltage

I Any A
Any E

IIH

High-level input current

IlL

IAny A
Low-level input current
Any E

ICC1(H)

Supply current from VCC1,
both outputs high

Supply current from V CC2,
ICC2(H)
both outputs high
ICC1(L)

Supply current from VCC1,
both outputs low

ICC2(L)

Supply current from VCC2,
both outputs low

ICC2(S)

Supply current from VCC2,
standby condition

tAli typical values are at VCCl

=

5 V, VCC2

IOH -

-50 pA

VIL = O.B V,
IOH = -10 mA
IOL = 10 mA
VIH = 2 V,
VCC2 - 15 V to 24 V, VIH - 2 V,
IOL

VF

MIN

=

= 0,

VI

=

5.5 V

VI

=

2.4 V

VCC2-2.5 VCC2-1.8
0.15

IF

=

1.5

40
BO

= 0.4 V

VCC2 = 24 V,
No load

VCCl - 0,
All inputs at 5 V,

VCC2 = 24 V,
No load

20 V, and TA

V
0.3

1

VCCl = 5.25 V,
All inputs at 5 V,

=

V

V

20 mA

VCC2 = 24 V,
No load

UNIT

0.5

0.25

VCCl = 5.25 V,
All inputs at 0 V,

=

MAX

VCC2- 1.3 VCC2- 0.B

40 mA

VI

VI

TYpt

1.5

12 mA
11VIL - O.B V,

V
mA
~A

-1

1.6

-2

-3.2

2

4

mA

0.5

mA

16

24

mA

7

13

mA

0.5

mA

TYP

MAX

UNIT

20

35

ns

10

20

ns

20

30

ns

20

30

ns

40

65
50

ns

mA

25°C.

switching characteristics. VCC1 - 5 V. VCC2 ... 20 V. TA - 25°C
PARAMETER

TEST CONDITIONS

tDLH Delay time, low-to-high-Ievel output
tDHL Delay time, high-to-Iow-Ievel output

CL

tTLH Transition time, low-to-high-Ievel output
tTHL Transition time, high-to-Iow-Ievel output
tPLH Propagation delay time, low-to-high-Ievel output

MIN

= 390 pF,

RD = 10 Il,
See Figure 1

tpHL Propagation delay time, high-to-Iow-Ievel output

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 16265

10
10

30

ns

4-41

·SN75372
DUAL MOSFET DRIVER
PARAMETER MEASUREMENT INFORMATION
S10ns~

5V

INPUT
PULSE
GENERATOR
(See Note AI

,...1 __ 1,
I VCC1

Vccz

I

~S10n.

...r.9:::0::::%,.......---:::9::::0%~~

I

zov

I

3V

I

I

INPUT

I

I

I

I

-t----I I

14---0.5 ,.._ _ _~
..I

10%

I

I

D-.........,.tIV-...-OUTPUT
..--.f.--L-I

I

I

~trLH
I

I

tOLH --i+-toI

VCCZ-3 V

I
I

OUTPUT

TEST CIRCUIT

OV

~tPLH~

I

Z.4V

10%

I

VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR = 1 MHz. Zout = .50 II.
B. CL includes probe and jig capacitance,

FIGURE 1. SWITCHING TIMES. EACH DRIVER

TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

LOW-LEVI:L OUTPUT VOLTAGE
vs
OUTPUT CURRENT

0.5 , - - - - - , - - - - - , - - - , - - - r - - - ,
VCC1 - 5 V

VCC2
VCC1 - 5 V
VCC2 - 20 V
VI - 0.8 V

;;;;;;

~Il!

11'11111 I I II Iii
N.l1I

TA /

.....

2~1~IC

I IJJ1~

TA _ 700C

::--.

~~

TA - OOC

I-'

>

VCC2 - 20 V

1
I

VI -

04
.

2 V

j

1

03
.

1.. 0.2

...

I---t-:,..~-t----t-----t------l

~

oS
.... 0.1 1j1<---I----I----I----I-----I

~
-10
-100
-0.1
-1
IOH-Hlgh-Level Output Current-mA

o

~--~--~--~--~-~

o

80
20
40
60
IOL -Low-Level Output Current-mA

FIGURE 2

FIGURE 3

TEXAS . "

4-42

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 76265

100

SN75372

DUAL MOSFET DRIVER
TYPICAL CHARACTERISTICS
POWER DISSIPATION (BOTH DRIVERS)
vs
FREQUENCY

VOLTAGE TRANSFER CHARACTERISTICS
1200

24

20

>
I
&

\

16

i>

VCC1 - 5 V
VCC2 - 20 V
No load
TA - 25°C

1000

~I

800

o

I

I

-

200

o

0.5

1.5
VI-Input Voltage-V

2

o

2.5

I

I

.....

--- -

10

20

~ ~
j::

.L

li ~
8... ~
i.e

.....

100

e:f

80

~

60

$

3 ...~
!-

180

~ ~ 160

160

120

V~
b::: ~
\

Allowable In P DaCk8Q80nlv

100 200 400
40
f- Frequency- kHz

1000

PROPAGATION DELAY TIME,
HIGH-TO-LOW-LEVEL OUTPUT
vs
FREE-AIR TEMPERATURE

pF -

CL -

~ 6,140

V

200

·11
4000

VCC1 - 5 V
VCC2 - 20 V
RO - 100
See Figure 1

c:

1I

FIGURE 5

PROPAGATION DELAY TIME,
LOW-TO-HIGH-LEVEL OUTPUT
vs
FREE-AIR TEMPERATURE

180

~

~

I

CL - 400 pF-

FIGURE 4

200

I

l\V1\

CL - 2000 pF

t

4

I

IC~~,~OOPF\ I
Jr\.

I 400

8

I
0

I

-'
CL - 1000 pF

CL - 4000 pF

>

I

I
I

TA - 25°C

j600

1; 12

t
0

I

VCC1 - 5 V
VCC2 - 20 V
INPUT: 3 V Square wave
50% duty cycle)

j::

.L

}" !

.! c5
.g" ...a;~

CL - 2000 pF

..

\lCC1 - 5 V
VCC2 - 20 V
RO - 100
See Figure 1

CL - 4000 pF

140

120
100

CL - 2000 pF

80

I
I
CL - 1000 pF

-

01'

CL - 200 pF-~

..

40
20

o

!0

CL - 1000 pF

~

...

A: 0

I <;'
... .e
:r.~

II
CL - 390 pF

!-:r

10

I

40 CL - 200 pF""""\

1

CL - 390 pF.l(

20
CL-50pF

o

60

20 30 40
50
60 70
T A -Free-Air Temperature - °C

80

o

---

CL-50pF

o

w

~

~

40

~

~

ro

~

TA-Free·Air Temperature- °C

FIGURE 6

FIGURE 7

TEXAS •
INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 75266

4-43

SN75372
DUAL MOSHT DRIVER
TYPICAL CHARACTERISTICS
PROPAGATION DELAY TIME,
HIGH-TO-LOW-LEVEL OUTPUT

PROPAGATION DELAY TIME,
LOW-TO-HIGH-LEVEL OUTPUT
vs

vs

VCC2 SUPPLY VOLTAGE

VCC2 SUPPLY VOLTAGE
200

200
VCC1 = 5 V
RO = 10 {l
TA = 25°C
See Figure 1

180
oj '"

.s T

I-

~

160

~

S. 140

e :f'
I ~
::t: ~

~.3

'"
.Soj T
160

i-"""""

I-

~

§

CL = 2000 pF

.., ~ 100

o

I

~
g.,3~ 80

CL = 1000 pF

0:I ';'6

I

CL

=

I

25

20
10
15
VCC2-Supply Voltage-V

5

o

oj

~

~ 160
I

S. 140

00120 Q)

"

§

Q;

RO

'"~"§,'
0·-

o::!i=

I ~

80
60

/

::t:~

~S

40

PROPAGATION DELAY TIME,
HIGH-TO-LOW-LEVEL OUTPUT
vs

I
= 24 {l

200

/
/
/
/'
/'

/

/'
RO

V

/'

oj

.S

/'

I-

~

~ 160
I

~

S. 140

=

10

§ a;

{l

·iii ~

"',

~ ....~
0: 6
0

I ';'

~~

RO
100

2000

80

4000

o

24y

/'

/

.//RO

=

o

1000

2000

CL -Load Capacitance-pF

CL -Load Capacitance-pF

FIGURE 10

FIGURE 11

TEXAS

,/

10

{l

--

.~

NOTE: For RD = 0, operation with CL > 2000 pF violates absolute maximum current rating.

~

INSTRUMENTS
4-44

/'

./

/'

/ ,//
/:,;.;;--/ --Ao = b

60

.... .s:
::t:.!? 40
E-::t:

3000

=

/'

20
1000

./

/

" "

00120

20

o

VCC1 = 5 V
VCC2 = 20 V
TA = 25°C
See Figur~ 1

180

/
/ / /Ao = 0

~ /'
V
o

25

20

15

10

-

= 50 pF

LOAD CAPACITANCE

/

to ....

CL

vs

/'/

.., ~ 100

1000 p~

LOAD CAPACITANCE
VCC1 = 5 V
VCC2 = 20 V
TA = 25°C
See Figure 1

~

=

CL

FIGURE 9

200

.S

CL = ~OO pF_

VCC2-Supply Voltage-V

PROPAGATION DELAY TIME,
LOW-TO-HIGH-LEVEL OUTPUT

I-

/'

5

FIGURE 8

180

V

--

20

o

I
= 400

CL=~_
V~
CL = 200 pF1===i

40

CL = 50 pF

1

CL

/'

60

.... .s:
::t:.!?
E-::t:

390 pF


I

4

>

3

...""'"0
i
Cl
I

....I

o
>

1

I
:J:

0

~

m

2

/
0

/

./

V

1.5

0.5

2

2.5

3

Time-p.s

(bl

(al

FIGURE 12. POWER MOSFET DRIVE USING SN75447

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

4-45

SN75372
DUAL MOSFET DRIVER
APPLICATIONS INFORMATION
A faster, more efficient drive circuit uses an active pull-up as well as an active pull-down output
configuration, referred to as a totem-pole output. The SN75372 driver provides the high speed, totempole drive desired in an application of this type, see Figure 13(a). The resulting faster switching speeds
are shown in Figure 13(b).
.
41

5V--__

--------~

(4)

(8)

(7)
(3)

TlC555P

(5)

(8)

(2)

v

~

__--__----_,

Yo

SN75372

~~

(1)

>
I

•

III

i>

.

4
3

!

CI

2

J

5

>

a 00

>

0.5

1.5

2

2.5

3

Time-I's
(b)

(a)

FIGURE 13. POWER MOSFET DRIVE USING SN75372
Power MOSFET drivers must be capable of supplying high peak currents to achieve fast switching speeds
as shown by the equation
Ipk

VC

where C is the capacitive load, and tr is the desired rise time. V is the voltage that the capacitance is
charged to. In the circuit shown in Figure 13(a), V is found by the equation
V = VOH - VOL
Peak current required to maintain a rise time of 100 ns in the circuit of Figure 13(a) is
IpK = (3-0)4(10- 9 ) = 120 mA
100(10- 9)
Circuit capacitance can be ignored because it is very small compared to the input capacitance of the IRF151.
With a VCC of 5 V, and assuming worst-cast conditio~s, the gate drive voltage is 3 V.
For applications in which the full voltage of VCC2 must be supplied to the MOSFET gate, the SN75374
QUAD MOSFET driver should be used.

TEXAS

..II

INSTRUMENTS
4-46

POST OFFICE BOX 666303 • DALLAS. TEXAS 76286

SN75372
DUAL MOSFET DRIVER
THERMAL INFORMATION
power dissipation precautions
Significant power may be dissipated in the SN75372 driver when charging and discharging high-capacitance
loads over a wide voltage range at high frequencies. Figure 5 shows the power dissipated in a typical
SN75372 as a function of load capacitance and frequency. Average power dissipated by this driver is
derived from the equation
PT(AV) = POC(AV)

+ PC(AV) + PS(AV)

where POC(AV) is the steady-state power dissipation with the output high or low, PC(AV) is the power
level during charging or discharging of the load capacitance, and PS(AV) is the power dissipation during
switching between the low and high levels. None of these include energy transferred to the load and all
are averaged over a full cycle.
The power components per driver channel are
POC(AV)
PC(AV) '" C

PHtH + PLtL

T

V~

I

f

I
I
I

~tH--+f

I

PS(AV)

1 4 - - - - ' T - 1/1 ---~~

FIGURE 14. OUTPUT VOLTAGE WAVEFORM
where the times are as defined in Figure 14.
PL, PH, PLH, and PHL are the respective instantaneous levels of power dissipation, C is the load capacitance.
Vc is the voltage across the load capacitance during the charge cycle shown by the equation
Vc = VOH - VOL
PS(AV) may be ignored for power calculations at low frequencies.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

4-47

8N75372
DUAL M08FET DRIVER
THERMAL INFORMATION
In the following power calculation, both channels are operating under identical conditions:
VOH = 19.2 V and VOL = 0.15 V with VCC1 = 5 V, VCC2 = 20 V, Vc = 19.05 V, C = 1000 pF,
and the duty cycle = 60%. At 0.5 MHz, PS(AV) is negligible and can be ignored. When the output voltage
is high, ICC2 is negligible and can be ignored.
On a per-channel basis using data sheet values
22
rnA)
rnA)]
(1
rnA)
rnA)]
PDC(AV) = [ (5 V) ( - + (20 V) (0
-2
(0.6) + [(5
V) 6
-2
- + (20 V) (7
-2-·
. (0.4)
PDC(AV = 47 mW per channel
Power during the charging time of the load capacitance is
PC(AV) = (1000 pF) (19.05 V)2 (0.5 MHz) = 182 mW per channel
Total power for each driver is
PT(AV)

= 47 mW +

182 mW

= 229 mW

and total package power is
PT(AV) = (229) (2) = 458 mW.

TEXAS ..,
INSTRUMENlS
4-48

POST OFFICE BOX 655303 • OALl!

lJ1ffilTIm

VCC1 - 5 V
VCC2 - VCC3 - 20 V

I

G>

~ VCC2- 0 . 5

II~

~

~:I -

~

0.8 V 1111111

:; VCC2- 1.O

TlTl,

TA - OOC

5 VCC2- 1. 5

/

o

111111

11111

TA _ 700C

~A~

.

'ii
>

1 VCC2-2.0
s:

VCC1 - 5 V
VCC2 - 20 V
VCC3 - 24 V

1Jl]

TA - 25°C

CD

~ VCC2-2.5

o

VI -,~:,? V
-1

-10
-100
IOH-High-Level Output Current-rnA

>

VCC2- 3.O
-0.01
-0.1
-1
-10
-100
IOH-High-Level Output Current-rnA

FIGURE 2

FIGURE 3

LOW-LEVEL OUTPUT VOLTAGE
vs
OUTPUT CURRENT

VOLTAGE TRANSFER CHARACTERISTICS

0.5~--------~----~----~--~

24

VCC1 - 5 V
VCC2 - 20 V
I
VCC3 - 24 V
~ 0.4
VI - 2 V
j!l

>

20
I

~

..

8, 16

~ 0.3 I-----I----+---~~---l-----I

~ 12
c.
:;"

:;

o

~

'ii

~ 0.2 1----~~-I---_+_-.---I--___1

....

!!..

"

>

o
I

o
>

0.1 1PC----;~--I----_+_----I--___1

4

~
____~__~____~
20
40
60
80
100
IOL -Low-Level Output Current-rnA

0L--~----_L

o

8

o

VCC1 - 5 V
VCC2 - 20 V
VCC3 - 24 V
TA - 25°C
No load

o

FIGURE 4

0.5

1.5
VI-Input Voltage-V

2

2.5

FIGURE 5

TEXAS .."

INSTRUMENTS
POST OFFICE; BOX 655303 • DALLAS, TEXAS 75265

4-53

SN75374
QUADRUPLE MOSFET DRIVER
TYPICAL CHARACTERISTICS
PROPAGATION DELAY TIME,
HIGH-TO-LOW-LEVEL OUTPUT
vs
T kFREE-AIR TEMPERATURE

PROPAGATION DELAY TIME,
LOW-TO-HIGH-LEVEL OUTPUT
vs
FREE-AIR TEMPERATURE
250

250

225 VCCl - 5 V - CL - 4000 pFi
VCC2 - 20 V
~ 200 VCC3 - 24 V
j:1
> S 1,75 RO - 24 I}
.. Q.
See Figure 1
150
CL - 2000 pF
~ 'is
I
., ~ 125

225

t

t

200 VCCl - 5 V
j: ~
> S. 175 VCC2 - 20 V
VCC3 - 24 V
-m !i
C0150 RO - 241}
See Figure 1
'il ~ 125

;! c3

......
"',

C~ -

~ ~100

ct~

I ~ 75

:5 ....~
!!-

C~

50

11000

ali

~F

"',

!0 ....~

100

I ~

75

j::f

50

It 0
-

CL - 4000 pF

~

.... .e

doo PJ

25

CL - 1000 pF

CL - 200 pF

25
CL - 50 pF

o
o

10

'0

20 30 40 50 SO 70
TA -Free-A;r Temperature- °C

80

CL - 50 pF

o

10

t~

200

';..
S
.. Q.

175

;! c3

150

/

., ~ 125

......

100

~

75

:5 ....l
!!-

50

£;
I

25

o

250
VCCl - 5 V
225 VCC3 - VCC2+4 V - CL RO-241}
~ 200
ITA - 25°C
j: ~
~
> S. 175 Saa Figure 1 /

V

§"i

!"','i

PROPAGATION DELAY TIME,
HIGH-TO-LOW-LEVEL OUTPUT
vs
VCC2 SUPPLY VOLTAGE

,/
VCCl - I) V
./"
VCC3 - VCC2+4 V
RO - 24 I}
TA - 25°C
V C L - 4000 pF
See Figure / "

225

/

~

/"

---

I

o

5

t

----+---

/

ga;

.~ ~ 125

",-:'

- 2000pF

! l
~6
I ~

.... .e

j::f

CL - 200 pF

I

100

/

f..---

50

-

CL - 2000 pF

~

e--

CL - 1000 pF

--- ..

75

~

CL - 50 p F - f"\.

I

CL - 200 pF-

~

I

10
20
15
VCC2-Supply Voltage-V

25

5

20
10
15
VCC2-Supply Voltage-V

FIGURE 9

FIGURE 8

TEXAS . . ,
INSTRUMENTS
4-54

dooo pF-

-m ~

CO 150

j...--" CL - 1000 pF

CL - 50pF- t\.

80

FIGURE 7

PROPAGATION DELAY TIME,
LOW-TO-HIGH-LEVEL OUTPUT
vs
VCC2 SUPPLY VOLTAGE
250

I

20 30 40 50 60 70
TA-Free-Air Temperature- °C

FIGURE 6

.- I

CL - 2000 pF

POST OFFICE BOX 866303. DALLAS. TEXAS 16285

25

SN75374
QUADRUPLE MOSFET DRIVER
TYPICAL CHARACTERISTICS
PROPAGATION DELAY TIME,
LOW-TO-HIGH-LEVEL OUTPUT

PROPAGATION DELAY TIME,
HIGH-TO-LOW-LEVEL OUTPUT

vs

vs

LOAD CAPACITANCE

LOAD CAPACITANCE

250

250

VCC1 - 5 V
225 VCC2 - 20 V
VCC3 - 24 V
TA - 25°C
I- ..
See Figure 1
175
I
I
00150 RO - 240-

/

/V

.t POO

!.,
i

/

~

S ..

~ 125

CI-

.e-3~. . .

.5

/

~

./

50

~~

25

o

I

e.

;! c5

a 'i
... :;
~-t

a.

/V\. V

1/ V

:!

I- ..

~/ JA.- V

75

o

V

RO - 10~ ............. j-,V
/"
RO = 0=

a. ],100

S!:c
~ ~

ai

V

/

e.

VCC1 - 5 V
225 VCC2 - 20 V
VCC3 - 24 V
200 TA = 25°C
See Figure 1
175
I
I
RO - 240150
RO - 10 O 125
RO - 0
'\

75

f. ~

50

..... .e

~-

25

1000
2000
3000
CL -Load Capacitance-pF

~

/'

V
V

~ K"

----

ZV

o
o

4000

r----...

r-... LY
V -=sV

~ 100

~b
I ';'

/'

V

~

1000
2000
3000
CL -Load Capacitance-pF

4000

FIGURE 11

FIGURE 10

POWER DISSIPATION (ALL DRIVERS)

vs
FREQUENCY
VCC1 - 5 V
VCC2 - 20 V
VCC3 - 24 V
2000 INPUT: 3-Volt Square wave
150% duty cyclel -l--I--1-...j....j...j...j...j.,
1800
==E 1600 TA - 25°C
I
c
1400
I
I
I
1200
'0;

oj

...

is
I
.t

1000
800
600
400

20

40

70 100

200

400

1000

f-Frequency-kHz
NOTE: For RO

=

O. operation with CL

FIGURE 12
> 2000 pF violates absolute maximum current rating.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75285

4-55

SN75374
QUADRUPLE MOSFET DRIVER
APPLICATIONS INFORMATION
driving power MOSFETs
The drive requirements of power MOSFETs are much lower than comparable bipolar power transistors.
The input impedance of a FET consists of a reverse biased PN junction that can be described as a large
capacitance in parallel with a very high resistance. For this reason, the commonly used open-collector driver
with a pull-up resistor is not satisfactory for high-speed applications. In Figure 13(a), an IRF151 power
MOSFET switching an inductive load is driven by an open-collector transistor driver with a 470-0 pull-up
resistor. The input capacitance (Ciss) specification for an IRF151 is 4000 pF maximum. The resulting long
turn-on time due to the product of input capacitance and the pull-up resistor is shown in Figure 13(b).
48V

5V-.--------~~~~--~.;------e_~

141

181

(71
TLC555

131

~
IRFSi

>

4

~

3

;

2

CI

....I
~

(51

(SI

I

f

I

~

% SN75447

121

.,/

'v

V"

/

0

0

1.5

0.5

2

2.5

3

1'lIIIe-ps

Ibl

lei

FIGURE 13. POWER MOSFET DRIVE USING SN75447
A faster, more efficient drive circuit uses an active pull-up as well as an active pull-down output
configuration, referred to as a totem-pole output. The SN75374 driver provides the high-speed totempole drive desired in an application of this type, see Figure 14(a). The resulting faster switching speeds
are shown in Figure 14(b).
48 V
5V

(41
(7)

TLC555
(61

181
(31
(51

% SN75374

~
IRF~

..
.

>
I

a

>

3

CI

2

0

1

I
%

0

!

....I

>

(21

4

J!

~

0

1.5

0.5

TIma-p.1

Ibl

101

FIGURE 14. POWER MOSFET DRIVE USING SN75374

TEXAS . "

INsTRUMENTS
4-56

~T

OFFICE BOX 656303 • DALLAS. TEXAS 75285

2

2.6

3

SN75374
QUADRUPLE MOSFET DRIVER
APPLICATIONS INFORMATION
Power MOSFET drivers must be capable of supplying high peak currents to achieve fast switching speeds
as shown by the equation
Ipk

VC

where C is the capacitive load, and tr is the desired rise time. V is the voltage that the capacitance is
charged to. In the circuit shown in Figure 14(a). V is found by the equation
V = VOH - VOL
Peak current required to maintain a rise time of 100 ns in the circuit of Figure 14(a) is
I
PK

=

(3-0)4(10- 9 )
100(10- 9)

=

120 mA

Circuit capacitance can be ignored because it is very small compared to the input capacitance of the IRF151.
With a VCC of 5 V, and assuming worst-case conditions, the gate drive voltage is 3 V.
For applications in which the full voltage of VCC2 must be supplied to the MOSFET gate, VCC3 should
be at least 3 V higher than VCC2.

THERMAL INFORMATION

power dissipation precautions
Significant power may be dissipated in the SN75374 driver when charging and discharging high-capacitance
loads over a wide voltage range at high frequencies. Figure 12 shows the power dissipated in a typical
SN75374 as a function of frequency and load capacitance. Average power dissipated by this driver is
derived from the equation
PT(AV) = PDC(AV)

+

PC(AV)

+

PS(AV)

where PDC(AV) is the steady-state power dissipation with the output high or low, PC(AV) is the power
level during charging or discharging of the load capacitance, and PS(AV) is the power dissipation during
switching between the low and high levels. None of these include energy transferred to the load and all
are averaged over a full cycle.
The power components per driver channel are

PC(AV) "" C V 2 C f
PS(AV)

=

I

PLHtLH + PHLtHL
----=:T=-...:....:.::::...:....:.::::

~tL~

~1IIIf----T - 1/f----..-t~

FIGURE 15. OUTPUT VOLTAGE WAVEFORM
where the times are as defined in Figure 15.

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75265

4-57

8N75374
QUADRUPLE M08FET DRIVER
THERMAL INFORMATION
PL, PH, PLH, and PHL are the respective instantaneous levels of power dissipation, C is the load capacitance.
Vc is the voltage across the load capacitance during the charge cycle shown by the equation
Vc = VOH - VOL
PS(AV) may be ignored for power calculations at low frequencies.
In the following power calculation, all four channels are operating under identical conditions: f = 0.2 MHz,
VOH = 19.9 V and VOL = 0.15 V with VCC1 = 5 V, VCC2 = 20 V, VCC3 = 24 V, Vc = 19.75 V,
C = 1000 pF, and the duty cycle = 60%. At 0.2 MHz for CL < 2000 pF, PS(AV) is negligible and can
be ignored. When the output voltage is low, ICC2 is negligible and can be ignored.
On a per-channel basis using data sheet values
PDC(AV) =[(5V)e;A)+ (20 V) (-2.!mA) + (24 V) (2. 24mA)}0. 6) +

[(5 V{3\mA) + (20

v{o

:A)+ (24 V)(16 ;A) }0.4)

PDC(AV = 58.2 mW per channel
Power during the charging time of the load capacitance is
PC(AV) = (1000 pF) (19.75 V)2 (0.2 MHz) = 78 mW per channel
Total power for each driver is
PT(AV) = 58.2 mW + 78 mW

136.2 mW

The total package power is
PT(AV) = (136.2) (4) = 544.8 mW

. TEXAS"'·
INSTRUMENTS
4-58

POST OFFICE BOX 665303 • DALLAS, TEXAS 75265

SN75435
QUADRUPLE PERIPHERAL DRIVER
WITH OUTPUT FAULT PROTECTION
02848, FEBRUARY 1985-REVISEO NOVEMBER 1989

•

Saturating Outputs With Low On Resistance

•

Very Low Standby Power, .. 53 mW Max

•

High-Impedance MOS- or TTL-Compatible
Inputs

•

Standard 5-V Supply Voltage

•

No Output Glitch During Power-Up or
Power-Down

•

NE DUAL·IN·LINE PACKAGE
(TOP VIEW)

1Y
1,2 CLAMP
2Y

2-W Power Package, . , 60 oC/W R/IJA

•

600-mA Output Current

•

35-V Switching Voltage

The SN75435 is characterized for operation from

OUTPUT

A

G

V

L

X

X

L

H
H

H

H

H = high level, L
X = irrelevant

L

= low

level

logic symbol t

(1)

IV

p-_+-",(3:.:.) 2V

L-__________~~~~(!l2) 1,2 CLAMP

I

Applications include relay drivers, lamp drivers,
solenoid drivers, motor drivers, LED drivers, line
drivers, logic buffers, hammer drivers, and
memory drivers.

:~~~::i~.r::I~li ~::I:~i:; :I\O:::::A:~~ .ot

VCC
3A
4A

INPUTS

The SN75435 quadruple peripheral driver is
designed for use in systems requiring high
current, high voltage, and high load power, It
features four inverting open-collector drivers
with a common en/ible input that, when taken
low, disables all four outputs, Each driver is
protected against load shorts with its own
latching over-current shutdown circuitry, which
will turn the output off when a load short is
detected. A short on one load will not affect
operation of the other three drivers, The latch for
the shutdown will hold the output off until the
input or enable pin is taken low and then high
again, A delay circuit is incorporated in the overcurrent shutdown to allow load capacitance of
up to 5 nF at 35 V,

PRODUCTION DATA do.uments.ontein info,metion
current IS of publication data. Products conform to
specifications per the terms of Texas Instruments

HEATSINK
AND GND

FUNCTION TABLE
(EACH NAND DRIVER)

description

ooe to 70 oe.

1

HEATSINK[
AND GND
3Y
3,4 CLAMP
4Y

Output Clamp Diodes for Transient
Suppression

•

1A
2A
G

(6) 3V

r-----------~~~-1(!t8) 4V

L-__________Jr~-4~(~7) 3,4 CLAMP
tThis symbol is in acco,dance with ANSI/IEEE Std 91·1984 and
lEG Publication 617·12.

Copyright © 1989, Texas Instruments Incorporated

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TEXAS 75266

4-59

8N75435
QUADRUPLE PERIPHERAL DRIVER
WITH OUTPUT FAULT PROTECTION
logic diagram (positive logic)

schematic of inputs
EQUIVALENT OF EACH INPUT

YOUTPUT

r------

V C C - - - -...-

...

.-~I*-

-CLAMP

INPUT

G
r---~~--~--~'------GNO

TO THREE
OTHER ORIVERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range of VCC (see Note 1) ....................................... " 7 V
Input voltage ........................................ : . . . . . . . . . . . . . . . . . . .. 5.5 V
Output supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 70 V
Output diode clamp current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1 A
Continuous total power dissipation
at (or below) 25°C free-air temperature (see Note 2) .......................... 2075 mW
Operating free-air temperature range, TA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooC to 70°C
Storage temperature range .......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260°C
NOTES: 1. All voltage values are with respect to network ground terminal.
2. For operation above 25°e free-air temperature, derate linearly at the rate of 16.6 mw/oe.

recommended operating conditions
MIN
4.75

Supply voltage, Vee
High-level input voltage, VIH

NOM
5

MAX
5.25

2

V
0.8

low-level input voltage, Vil
Output voltage
Output current

load capacitance ISee Figure 3)
Operating free-air temperature. T A

UNIT
V

0

V
V

35
600

mA

35

nF

70

°e

electrical characteristics over recommended operating free-air temperature range
VIK

PARAMETER
Input clamp voltage

IOH

High-level output current

VOL

low-level output voltage

VR
VF

Output clamp diode reverse voltage
Output clamp diode forward voltage

IIH

High-level input current
Low-level input current

III
leeH
leel

TEST CONOITIONS
11- -12 mA

Vee - 4.75 V,
Vee = 4.75 V,

llOl - 300 mA.
IIOl = 600 mA
IR = 100~A

VIH = 2 V
Vee = 4.75 V,
IF = 600 mA

= 5.25 V.
= 5.25 V,
= 4.75 V to
= 5.25 V,

Over-current shutdown current

Supply current, outputs high
Supply current, outputs low

Vee
Vee - 5.25 V,

VI
VI

-0.9

,

70

650

5.25 V
VI = 0
VI - 5V

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

MAX
-1.5
100

= 5.25 V
= 0.8 V

tAli typical values are at Vee = 5 V, TA = 25°e.

4-60

Typt

VIH = 2 V,
VOH = 70 V

Vil = 0.8 V,
Vee - 4.75 V,

Vee
Vee
Vee

MIN

0.25
0.55
100

0.5

1.2
0.01
-0.5

1.6
10
-10

1

~A

V
V

850
6
55

UNIT
V

10
75

V
~

~
mA

mA
mA

SN75435
QUADRUPLE PERIPHERAL DRIVER
WITH OUTPUT FAULT PROTECTION
switching characteristics. Vee -= 5 V. TA - 25°e
tpLH
tpHL
I'fLH
tTHL
VOH

PARAMETER
Propogation delay time. low-to-high-Ievel output

TEST CONDITIONS

Propagation delay time. high-to-Iow-Ievel output
Transition time. low-to-high-Ievel output
Transition time. high-to-Iow-Ievel output

CL = 30 pF. RL
See Figure 1

High-level output voltage .fter switching

See Figure 2

MIN

= 60 n.

TYP
750

MAX

UNIT
ns

750
200

ns
ns

200
Vs

ns

10

mV

PARAMETER MEASUREMENT INFORMATION
INPUT

VCC

30V

~--~

2T

CIRCUIT
UNDER
TEST

.,

~5~.---+t

~

I

I 1+-<5 n.

II

I

. - - e - .. .-e-OUTPUT

INPUT
0.7 V

I

I

< 10 11.-+11

90%

90%

50%
10%

~tPHL

OUTPUT

90*'1\:
I 50%
I
10%

I I

~

-

50%
10%1

If-I'fHL

--3.0 V

I
OV

I

!+=

tPLH+t

rl
90%VOH
50%
10% "-'_-V

II

--+I

OL
j4-tTLH

""OPEN

VOLTAGE WAVEFORMS

TEST CIRCUIT

NOTES: A. The pulse generator has the following characteristics: PRR = 100 kHz, Zout = 50
B. CL includes probe and jig capacitance.

n.

FIGURE 1. SWITCHING CHARACTERISTICS

TEXAS •

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 75266

4-61

SN75435
QUADRUPLE PERIPHERAL DRIVER
WITH OUTPUT FAULT PROTECTION
PARAMETER MEASUREMENT INFORMATION
INPut

~

---t I ~"5 ns
I

~I

·40,..
.. 10

ns~ I ,..-

I
~

INPUT
10%

90%
1.5 V

90%
1.5 V

IT-

3V

I

10%

OV
VOH

' _ _ _ _ _ _ _ _J

VOLTAGE WAVEFORMS

TEST CIRCUIT
NOTES: A. The pulse generator has the following characteristics: PRR
B. CL include probe and jig capacitance.

= 12.5 kHz,

Zout

= 50 O.

FIGURE 2. LATCH-UP TEST

RECOMMENDED OPERATING CONDITIONS
MAXIMUM OUTPUT SUPPLY VOLTAGE
vs.
LOAD CAPACITANCE

100
TA=0·Cto70·C

> 40
I
'"
~
> 20
Ia....>

.

~

cil 10

...

1:i
1:i

0

E
~
E

4

:;

2

.~

l-

1
1

I

2

4

10

20

40

C L - Load Capacitance - nF

FIGURE 3

TEXAS . "

INSTRUMENTS
4-62

POST OFF1CE BOX 866303 • DALLAS, TEXAS 75286

100

_ _ -VOL

SN75435
QUADRUPLE PERIPHERAL DRIVER
WITH OUTPUT FAULT PROTECTION
APPLICATION INFORMATION
0.01

+5V

~F

i

P \I

1

1 kn
SN74lS194t

....

&Ii

ccw*

L

STEPC OMMANO

+r

"1"

......

Sl

+Vs

R

....J!!..
CW/

Tvcc

SRG4

4-~' T·~

Ml [SHIFT[

,

M2 [lOAD]

ClK

EN

1~/C3

r

SR SER 1,30
A
a

C

,--lL
~~
(OPENI

I>

QA

2,30

~

t*l

CLAMP
Qa

2,30

2,30

r-

va

I
I

1

:-*l

Qo

? ..

I

vo :

1

~NO

-,

NU

I
I

I
I

.1
vc

Qc

2,30

VA

"""-<

I
I
I
I
I

:0
L __ .J

+~I~cc

[2131 SN7427

........

'"

.:::L

....,

=d...~
..ll'ND
4·WINOING STEPPER MOTOR CONTROL CIRCUIT

STEP COMMAND

CW/CCW*

----------------------~

va
OUTPUTS
VC

VO

LJ
LJ

LJ

LJ
LJ

L

TIMING DIAGRAM FOR MOTOR CONTROL CIRCUIT

tThe 5N74L5194 is a universal shift register with both shift-right and shift-left capability. In this application 50 (pin 91 is wired high
and only the shift-right and parallel-load modes are utilized. The logic symbol shown above has been simplified to show only the
utilized modes.

iThis signal is CW/CCW or Cw/CCW depending on motor winding.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALlAS. TEXAS 75285

4-63

4-64

SN75436. SN75437A. SN75438
QUADRUPLE PERIPHERAL DRIVERS
02806, DECEMBER 1986

•
•

•
•
•
•
•
•

Saturating Outputs With Low On-State
Resistance

NE PACKAGE
(TOPVIEWI

High-Impedance Inputs Compatible With
CMOS, MOS, and TTL Levels

1A
2A
G

1Y
1,2 D
2Y

Very Low Standby Power ... 21 mW
Maximum

}HEATSINK
AND GND

HEATSINKi
AND GND
3
3,4 D
4Y

High-Voltage Outputs ... 70 V Min
No Output Glitch During Power Up or Power
Down
No Latch-Up Within Recommended
Operating Conditions

Vee
3A
4A

FUNCTION TABLE
(each NAND driverl

Output Clamp Diodes for Transient
Suppression

OUTPUT
y
L
H
H

INPUTS
A G
H H
X
L
X L

2-W Power Package

description
The SN75436, SN75437A, and SN75438
quadruple peripheral drivers are designed for use
in systems requiring high current, high voltage,
and high load power. Each device features four
inverting open-collector outputs with a common
enable input that, when taken low, disables all
four outputs. The envelope of I-V characteristics
exceeds the specifications sufficiently to avoid
high-current latch-up. Applications include
driving relays, lamps, solenoids, motors, LEOs,
transmission lines, hammers, and other highpower-demand devices.
logic symbol t

H = high level,
L = low level.
X = irrelevant

equivalent schematic of each input

logic diagram (positive logic. each driver)

.------y OUTPUT
...--.-...--D OUTPUT
ENABLE

G

--~'--

.---4--~-1~--GND

TO THREE
OTHER DRIVERS
t This symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

SELECTION GUIDE
FEATURE
Maximum recommended output current

Maximum VOL at maximum IOL
Maximum recommended output supply

voltage in an inductive switching circuit,

.1

PRODUCTION DATA documOftts ..ntal. loformation
.urrenl of· publication data. Product••ooform to
specifications per Ih. tarm. of T.... Instruments
standard wlrrl.I,. Production ~",c...ing do.. not
.......ril' includa taBling of .11 pe.. motars.

Vs

SN75436
0.5
0.5

SN75437A
0.5
0.5

SN7543B
1
1

UNIT
A
V

50

35

35

V

Copynght @ 1986, Texas Instruments Incorporated

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

4-65

SN75436. SN75437A. SN75438
QUADRUPLE PERIPHERAL DRIVERS
absolute maximum ratings over operating temperature range (unless otherwise noted)
Supply voltage, Vcc ......................................... ". . . . . . . . . . . . . . .. 7 V
Input voltage ............' .................................................. 30 V
Output current: SN75436, SN75437 A (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 0.75 A
SN75438 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1.25 A
Output clamp diode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1.25 A
Output voltage (off-state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 70 V
Continuous total power dissipation at (or below) 25°C free-air temperature
(see Note 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2075 mW
Operating free-air temperature range, TA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16-inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . .. 260°C
NOTES: 1. All four sections of these circuits may conduct rated current simultaneously; however, power dissipation average over a short
time interval must fall within the continuous dissipation ratings.
2. For operation above 25 °C free-air temperature, derate linearly to 1328 mW at 70 0 e at the rate of 16.6 mW/oe.

recommended operating conditions
SN75436

PARAMETER

MIN
4.75

Supply voltage, Vee

SN75437A
MAX

MIN

NOM

MAX

MIN

NOM

MAX

5

5.25

4.75

5

5.25

4.75

5

5.25

Output current, IOL

1

A

50

35

35

V

2

2

0

70

V

2

0.8

Operating free-air temperature, T A

V

0.5

circuit (see Figure 2), Vs
Low-level input voltage, VIL

UNIT

0.5

Output supply voltage in inductive switching
High-level input voltage, VIH

SN75438

NOM

0.8
70

0

0

0.8

V

70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN75436
PARAMETER
VIK
IOH

VOL

Input clamp
High-level output current

Low-level output voltage

TEST CONDITIONS
Vee = 4.75 V,

11= -12 rnA

Vee = 4.75 V,

VIH = 2 V,

VIL = 0.8 V,

VOH = 70 V

SN75437A
MIN TYpt
MAX
-0.9

SN75438
MIN

-1.5

VF(K)

reverse voltage

100

1

100

0.25

0.14

0.25

Vee = 4.75 V,

IOL = 500 rnA

0.28

0.5

VIH = 2 V

IOL = 750 rnA

0.28
0.42

0.5
0.75

0.60

1

IR = 100 ~A

Vee = 4.75 V,

Output clamp diode

IF = 500 rnA
IF = 1 A

High-level input current

Vee - 5.25 V.

VI - 5.25 V

IlL

Low-level input current

Vee = 5.25 V,

VI = 0.8 V

Vee = 5.25 V,

VI = 0

Vee = 5.25 V,

VI = 5 V

Supply current,
outputs high
Supply current,
outputs low

t All typical values are at Vee = 5

v,

70

70

100

100

V
~A

V

V

1

1.6

1
1.2

2

0.1

10

0.1

10

~A

-0.25

-10

-0.25

-10

~A

1

4

1

4

rnA

45

65

45

65

rnA

TA = 25"e.

"

..1/.-

TEXAS "V

INSTRUMENTS
4-66

-1.5

1

forward voltage

leeL

-0.9

0.14

IIH

leeH

MAX

IOL - 250 rnA

IOL = 1 A
Output clamp diode
VR(K)

UNIT

TYpt

POST OFFICE BOX 855303 • "DALLAS. TEXAS 76265

1.6

SN75436, SN75437A, SN75438
QUADRUPLE PERIPHERAL DRIVERS
switching characteristics.

Vee"

V.

5

TA ... 25 0 e

PARAMETER

TEST Co.NDITlo.NS

tpLH

Propagation delay time, low-to-high-Ievel output

tpHL

Propagation delay time, high-to-Iow-Ievel output

CL = 3D pF,

tTLH

Transition time, low-to-high-Ievel output

See Figure 1

tTHL

Transition time, high-to-Iow-Ievel output

VOH

after switching

TYP
1950.

RL '= 60. II,

150.

MAX

UNIT

50.0.0.
500

ns

40.
36

Vs = 50. V,

SN75436
High-level output voltage,

MIN

RL = 100 II,
Vs = 35 V,

SN75437A

RL = 70. II,
Vs - 35 V,

SN7543B

RL = 35 II,

r("'- ----

ns
ns
ns

10. '" 500 mA,
See Figure 2

VS-1D

mV

10'" 500 mA,
See Figure 2

VS-1D

mV

10'" 1 A,
See Figure 2

VS-l0

mV

PARAMETER MEASUREMENT INFORMATION

w~,
~_ _ _....,
PULSE
GENERATo.R
(See Note Al

i "':, -."
I

A/G

I

.-.----i
G/A

CIRCUIT
UNDER
TEST

,

~5

--.t I

~s5

n.

1'5----1"

INPUT
II 90%
10.% I, 1.5 V

OUTPUT

OV

I

I
I

I

I

o.UTPUT

L..----- .J
...

-o.PEN

TEST CIRCUIT

Vo.LTAGE WAVEFo.RMS

NOTES: A. The pulse generator has the following characteristics: PRR = 100. kHz, Zo = 50 II.
B. CL includes probe and jig capacitance.

FIGURE 1. SWITCHING CHARACTERISTICS
Vs

INPUT

2 mH
,.
4o.l'.---~~~'
--..1-"s5n.
.......I.--slo.n.

PULSE
A
GENERATo.R ~~---~
(See Note Al
G
2.4V

n'

o.UTPUT

INPUT
10.%

o.UTPUT

90.%
1.5 V

90.% I : + - - - - 3 V
1.5 V I
10.%
o.V

~~

TEST CIRCUIT

_________J.~.:::

Vo.LTAGE WAVEFo.RMS

NOTES: A. The pulse generator has the following characteristics: PRR
B. CL includes probe and jig capacitance.

= 12.5 kHz,

Zo

= 50 II.

FIGURE 2. LATCH-UP TEST

TEXAS . "

INSTRUMENTS
POST OFFice BOX 655303 • DALLAS, TeXAS 75266

4-67

SN75436, SN75437A, SN75438
QUADRUPLE PERIPHERAL DRIVERS
PARAMETER MEASUREMENT INFORMATION
MAXIMUM COLLECTOR CURRENT
vs
DUTY CYCLE

1.4

«

1.3

~

1.2

SN7543S

I

N - 1

1\

(J

!
t

E

0.9

::I

~

::IE
I
S;

J

O.S

~

.

~.1S

"

StulterlY

C-

"

r--

~- ~
I--

I

o

'\

I\.

..

~r-...

'\

SN75436. SN75437A

0.7
0.6

,,~

1\

TA - 25°C
N - Number
of Outputs
Conducting

(J

I

'\.

\

\

::I

1.1

\

I~

..........

10 20 30 40 50 60 70 SO 90 100
Duty Cycle-%
FIGURE 3
MAXIMUM COLLECTOR CURRENT
vs
DUTY CYCLE

1.4

SNJ543~
C
~
1\ i\
1.1
\ \
!
1\

«
I

1.3

1.2

::I

1,\

\

(J

~

0.9

E

O.S SN75436

.~

0.7

::IE
I
S;

0.6

(J

::I

..

i

I"
I\..

"

N - 1

.""'~

SNi 543 A

~.. ~
ot l . . . t"....
.........

.~

~"~

........

........... .....

TA - 70°C
...........
0.5 N - Number of Outputs
Condlicting Simultaneously
0.4
o 10 20 30 40 50 60 70 SO 90 100
Duty Cycle-%
FIGURE 4

TEXAS . "

INSTRUMENTS
4-68

~

POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

SN75436, SN75437A, SN75438
QUADRUPLE PERIPHERAL DRIVERS
APPLICATION INFORMATION
001 F

',/

r'

-15 V

1

1 kG

SN741941 vee
SRG4
..... R

~

CUi

~
S1

ewlCew

elK
srEPCO MMANO

e

2,30

0
2,30
SlSER

~

1

I

~~

..... M1 [SHIFT)

L

M2 [lOAD)
,1_/e3 r
SR SER 1,30
A
2,30
B
2,30

+Vs

+5V

G

Vee

EN

r--

~

ClA

A

t>

OB

A

elAMP~
1

ac

A

00

1 I

y

1

y

2

0
y

3

Mv

A

4

10

-l,.GNO

1
1
1
11 _____

----I1

0:

I

I
1

I
1___ - ____1

-l,.GNO

+5V
(2/3) SN74271 v ee

~

&

A

~
.A

lGNo

FIGURE 5. 4-WINDING STEPPER MOTOR CONTROL CIRCUIT

STEP COMMAND
CW/CCW

V1

OUTPUTS

{

V2
V3
V4

LJ
LJ

LJ

u

LJ

L

FIGURE 6. TIMING DIAGRAM

TEXAS .."

INSTRUMENlS
POST OFFICE BOX 855303. DALlAS. TEXAS 75286

4-69

4-70

SN75439
QUADRUPLE PERIPHERAL DRIVER
031

MAY 1988 - REVISED NOVEMBER 1989

NEPACKAGE

• 1.3-A Current Capability Each Channel

(TOP VIEW)

• Saturating Outputs With Low On-State
Resistance

1A
2A

1Y
1,2D
2Y

• Two Inverting and Two Noninverting Driver
Channels With Common Active-Low Enable
Input

G
} HEATSINK
AND GND

HEATSINK {
AND GND

• Key Application Is as a Complete Full-Step
4-Phase DC Stepper Motor Driver USing
Only Three Directly Connected Logic
Control Signal Lines From Standard
Microprocessors

Vee

3Y
3, 4D
4Y

3A
4A

FUNCTION TABLES
(Each Channell or
Channel 4 Driver)

• High-Impedance Inputs Compatible With
TTL or CMOS Levels

INPUTS

• Very Low Standby Power ..• 10 mW Typ

A

• 50-V Noninductive Switching Voltage
Capability

H
L

G
L
X

• 40-V Inductive Switching Voltage Capability

X

H

• Output Clamp Diodes for Inductive
Transient Protection

OUTPUT
Y
L
H
H

(Each Channel 2 or
Channel 3 Driver)

• 2-W Power Package

INPUTS

description
The SN75439 quadruple peripheral driver is
designed for use in systems requiring high current,
high voltage, and high load power. The device
features two inverting and two noninverting
open-collector outputs with a common-enable
input that, when taken high, disables all four
outputs. By pairing each inverting channel with a
corresponding non inverting channel (such as
channel 1 paired with channel 2 and channel 3
paired with channel 4) , the device may be used as
a complete full-step 4-phase dc stepper motor
driver using only two input logic control signals
plus the enable signal, as shown in Figure 3. Other
applications include driving relays, lamps,
solenoids, motors, LEDs, transmission lines,
hammers, and other high-power-demand loads.

OUTPUT

A

G

L

L

L

H

X
H

H

X

V

H

H = high level
L = low level
X = irrelevant

logic symbolt

The SN75439 is characterized for operation from
O°C to 70°C.
t This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.

PRODUCTION DATA documents contain information
current as of publication date. Products conform to
specifications psr the terms of Texas Instruments

:~~~~:~~i~at::1~1~ ~!:~:~ti:r :'~O::~:::::t::s~S not

-1!1
INSTRUMENTS

Copyright © 1989, Texas Instruments Incorporated

TEXAS

POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

4-71

SN75439
QUADUPLE PERIPHERAL DRIVER
logic diagram (positive logic)
It

schematics of Inputs and outputs

(141

lA 1161

l'l,y

EQUIVALENT

TYPICAL

OF EACH INPUT

OF ALL OUTPUTS

~CLAMP

121 1.20

vcct?<==
2A 1161

OUTPUT

(3) 2Y

INPUT
GNO

3A (101

181 3Y

171

4A ..;,19;.;.,1-1-_ _

3.40

181 4Y

14.5.12.131 GND

absolute maximum ratings over operating temperature range (unless otherwise noted)
Supply voltage range, VCC (see Note 1) .....................•............. -0.3 V to 7 V
Input voltage, VI • . . . . . . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Output voltage range, Vo ..•.....................................•... -0.3 V to 52 V
Output voltage. Vo (inductive load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 43 V
Output clamp-diode terminal voltage range, VOK ............................ -0.3 V to 52 V
Input current, II ..•..........................................•........... -15 rnA
Peak sink output current, 10M (nonrepetitive, tw s 0.1 ms) (see Note 2) .........•......... 1.5 A
(repetitive, tw s 10 ms, duty cycle s 50%) . . . . . . . . . . . . . . . . .• 1.4 A
Continuous sink output current, 10 (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1.3 A
Peak output clamp diode current, 10KM (nonrepetitlve, tw s 0.1 ms) (see Note 2) ............ 1.5 A
(repetitive, tw s 10 ms, duty cycle s 50%) ........... 1.3 A
Continuous total dissipation at (or below) 25·C free-air temperature (see Note 3) . . . . . . . . . .. 2075 mW
Continuous total dissipation at (or below) 65·C case temperature (see Note 3) ............ 5000 mW
Operating case or virtual junction temperature range ........................ , -55·C to 150·C
Storage temperature range ....................... , . . . . . . . . . . . . . . . . .. -65·C to 150·C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . .. 260·C
NOTES: 1. All voltage values are wtth respect to the network ground tennlnal (unless otherwise specified).
2.AlI four channels of this device may conduct rated current simultaneously; however. power diSSipation average over a short time
Interval must fall wtthin ·the continuous dissipation range.
3. For operation above 25°C free·alr temperature, derate linea~y at the rate of 16.6 mW/"C. For operation above 65°C case
temperature. derate IineMY at the rate of 59 mW/"C. To avoid exceeding the design maximum virtual junction temperature, these
ratings should not be exceeded.

recommended operating conditions
Supply voltage, vee
Output supply iIoltage In Inductive switching circuit, Vs (see Figure 2)
High-level input voltage, VIH
Low-level Input voltage, VIL
Low-level output cutrent, IOL
Operating free-alr temperature, TA

MIN

NOM

MAX

UNIT

4.75

5

5.25
40
5.25
0.8
1.3
70

V
V
V
V
A
OC

2
-O.3t
0

25

t The algebraIC convention, In which the least posttlve (most negative) value Is designated minimum, Is used In this data sheet for logic voltage
levels.

TEXAS ~

4-72

INSTRUMENTS
POST OFFICE BOX 865303 • DALLAS. TEXAS 75265

SN75439
QUADRUPLE PERIPHERAL DRIVER
electrical characteristics over recommended ranges of operating free-air temperature and supply
voltages (unless otherwise noted)
PARAMETER

VIK

Input clamp voltage

MIN

TEST CONDITIONS

11= -12mA
IOL = O.SA

VOL

Low-level output voltage

See Note 4

IOL-l A
IOL - 1.3A
IF = O.S A

VF(K)

Output clamp diode forward voltage

IF - 1.3A
IOH

High-level output current

VOH = SOY,

IIH

High-level input current

IlL

Low-level input current

VI- VIH
VI - 0 to 0.8 V

IR(K)

Output clamp-diode reverse current
(at Y output)

ICC

Supply current

MAX

UNIT

-0.9

-1.S

V

0.2

0.3S

0.4
0.5

0.7

1.1
1.3
1.4

See Note 4

IF = 1 A

TYpt

VOK = SOV

VR = SOY,

Vo = 0

All outputs at high level (off)
All outputs at low level (on)
Two outputs at high level (off) and
two outputs at low level (on)

= S V, TA = 2S'C.
NOTE 4: These parameters must be measured using pulse techniques, tw

V

0.9
1.9
2.2

V

2.4
100

J.lA

10

J.lA

-10

J.lA

100

).lA

2

8

140

200

70

110

TYP

MAX

mA

t All typical values are at VCC

= 1 ms, duty cycle s

10%.

switching characteristics, Vee = 5 V, TA = 25°e
PARAMETER

tpLH

Propagation delay time,
low-to-high-Ievel output

tpHL

Propagation delay time,
high-to-Iow-Ievel output

tTLH

Transition time,
low-to-high-Ievel output

trHL

Transition time,
high-to-Iow-Ievel output

VOH

TEST CONDITIONS

IOL=1 A,
RL = 30 D.,

MIN

CL = 30 pF,
See Figure 1

High-level output voltage

Vs = 40 V,

IO=I.3A,

(after switching inductive load)

RL = 31 D.,

See Figure 2

VS-l00

UNIT

IS00

ns

100

ns

170

ns

SO

ns
mV

TEXAS ."
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

4-73

SN75439
QUADRUPLE PERIPHERAL DRIVER
PARAMETER MEASUREMENT INFORMATION
INPUT

PULSE
GENERATOR
(See Note AI

OPEN

30 V

r--"'-';';;'--+':;".....,

INPUT
UNDER
TEST

....-...f--!y-....- ....-OUTPUT

OTHER INPUT
(See Note BI

CL-30pF
(See Note CI

'='
TEST CIRCUIT

~"'10ns

~"'10n.

I

I
90%

I

I

I

INPUT
(2A, 3A, GI

I

I I
I

I
I

~"'10ns

I
~s 10n.

90%

90%

3V
'-'-I----I

I

I
I

10%

I II

I

I

I

I

14

I
~tPHL

I

I
OUTPUT

I

I

I
10%

~I

5 !'.

90%

OV

I.-+i-tPLH

I

I
I
I
I

I
I I
I

VOH

I

I
I

I

I

I

I

3V

10%

I

INPUT
(lA,4AI

90%

I
10%

: I I
I I
I I

I

I
I
I
I

10%

I

10%

I

~tTHL

I--I----VOL
i+--.I--tTlH

VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: duty cycle" 1%, Zo = 50 Q.
B. Enable input G Is at 0 V if Input A is used as the switching input. When G is used as the switching input, the corresponding A input
is at 0 V if testing channel 2 or channel :3 or at 3 V if testing channel 1 or channel 4.
C. CL includes probe and jig capacitance.

FIGURE 1. SWITCHING CHARACTERISTICS

TEXAS •
INSTRUMENTS
4-74

POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

SN75439
QUADRUPLE PERIPHERAL DRIVER
PARAMETER MEASUREMENT INFORMATION
5 V

INPUT

Vs - 40 V
2 mH

PULSE

A

GENERATOR

RL - 31 !l
e---~--e---~-----OUTPUT

(See Note AI

0.4 V

G

TEST CIRCUIT

14--+t-"
_~~I
:

•
J4---+1-"

10 ns

1
1
1

1
1
1

90%
INPUT
(2A.3A)

1 0 ns

1:.-____

I

1
1
1
1 1I
10%
10%
1
"'------.1'.-1-- - - - I

....-----400

~"10ns
I

INPUT

I

1

0 V

~

ps

~"10ns

: I :,.1_ _ _ _ _-.lLI_I _____

(1A.4A)

3 V

90%

90%

90%

: 1
1

I

1

1

II

1

I

3V

I
1

I

-----0 V
_---VOH

OUTPUT

'------~- -

-

-

-

VOL

VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: duty cycle s 1%,
B. CL includes probe and jig capacitance.

Zo = 50 0.

.

FIGURE 2. OUTPUT LATCH-UP TEST

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TeXAS 75285

4-75

SN75439
QUADRUPLE PERIPHERAL DRIVER
APPLICATION INFORMATION
Vs

r-------,
SN75439

DM---t-'-.:....;.;.,

-;;u;-,

DN --4'""""'''-:-'-~I--f-,

PHASE
STEPPER

II 1141

MOTOR

I
I

I

DATA
LINES
FROM
MICROPROCESSOR

I
I
I
I

I

I
I
L ___ --1
IL

______

....J

WAVEFORMS

DN~
DK~
FIGURE 3. FULL-STEP FOUR-PHASE STEPPER MOTOR DRIVER

TEXAS . "

INSTRUMENTS
4-76

POST OFFICE BOX 666~03 • DALLAS. TEXAS 75265

SN75446 THRU SN75449
DUAL PERIPHERAL DRIVERS
02481. DECEMBER 1978-REVISED DECEMBER 1989

•
•
•
•
•
•
•
•
•

Very Low Power Requirements

D OR P PACKAGE
(TOP VIEW)

SOB

Very Low Input Current
Characterized for Use to 350 mA

1A
1Y
GND

No Output Latch-Up at 50 V (After
Conducting 300 mAl

1
6
5

2
3
4

VCC
2A
2Y
CLAMP

High-Voltage Outputs (70 V Min)
FUNCTION TABLES

Output Clamp Diodes for Transient
SUPPression (350 mA, 70 V)

SN75446
(EACH AND DRIVER)

TTL- or MOS-Compatlble Dloda-Clampad
Inputs

INPUTS

Standard Supply Voltage
Suitable for Hammer-Driver Applications

OUTPUT

A

S

Y

H

H

H

L

X

L

X

L

L

description
SN75447

Series SN75446 dual peripheral drivers are
designed for use in systems that require high
current, high voltage, and fast switching times.
The SN75446, SN75447, SN75448, and
SN75449 provide AND, NAND, OR, and NOR
drivers, respectively. These devices have diodeclamped inputs as well as high-current, highvoltage inductive-clamp diodes on the outputs.

(EACH NAND DRIVER)
INPUTS
S

H

Y
L

L

X

X

L

H
H

SN75446

Series SN75446 drivers are characterized for
operation from OOC to 70°C.

(EACH OR DRIVER)
INPUTS

schematics of inputs and outputs
EQUIVALENT
OF EACH INPUT

OUTPUT

A
H

TYPICAL
OF ALL OUTPUTS

OUTPUT

A

S

Y

H

X

H

X

H

H

L

L

L

SN75449

CLAMP

(EACH NOR DRIVER)

VCC--~-

INPUTS
OUTPUT
INPUT

S

H

X

L

X

H
L

L

L

GND

OUTPUT

A

Y

H

H = high level
L = low level
X = irrelevant

PRODUCTION DATA dacu....11 contain informatian
c.,...t IS of pubncllio. dill. P,otIoell conform to
.,lelfiCltl••• PO' tba tarms of TIJUII Inltramlnts

=~rll;"{n':1~7i ~1":i:r rn=~~ oat

Copyright © 1989, Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
post OFFICE lOX 866303

• DALLAS. TEXAS.75285

4-77

SN75446 THRU SN75449
DUAL PERIPHERAL DRIVERS
logic diagrams (positive logic)

logic symbols t

SN75446

SN75446

13.

16.
15)
14)

positive logic: V = AS or
SN75447

1V

2Y
CLAMP
GND

A+1

SN75447

13)

S

16)

2A

15)

1V

2Y
CLAMP

14) GND

positive logic: V = AS or
SN75448

A +S

SN7544S

13)

1Y

16) 2Y

15) CLAMP
14) GND

=-=

positive logic: Y = A + S or A S

SN75449

SN75449

13) 1Y

16) 2Y

15) CLAMP
t These symbols are in accordance with ANSIIIEEE Std 91-1984
and lEe Publication 617-12.

14)

positive logic: V m

. TEXAS ..,
4-78

INSTRUMENTS
POST OFFICE BOX 655303 • DALlAS. TeXAS 75285

A+S or A S

GND

SN75446 THRU SN75449
DUAL PERIPHERAL DRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Output current (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 400 mA
Output clamp diode current .... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 400 mA
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range, T A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. OoC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260°C
NOTES: 1. Voltage values are with respect to network ground terminal.
2. Both halves of this dual circuit may conduct rated current simultaneously; however, power dissipation averaged over a short
time interval must fall within the continuous dissipation ratings.

OISSIPATION RATING TABLE
PACKAGE

TA

s

25'C

DERATING FACTOR

o

POWER RATING
725 mW

ABOVE TA - 25 DC
5.8 mW/De

P

1000 mW

8.0 mW/De

TA - 70'C
POWER RATING
464mW
640mW

recommended operating conditions
Supply voltage, Vee
High-level input voltage, VIH

MIN

NOM

4.75

5

MAX
5'.25

V
V

2
0.8

low-level input voltage, Vil
Operating free-air temperature, T A

UNIT

0

70

V
De

electrical characteristics over recommended operating free-air temperature range
PARAMETER
VIK

InpJt clamp voltage

IOH

High-level output current

VOL

TEST CONDITIONS
11- -12 mA
Vee = 4.75 V,
VIH = 2 V,
Vil = 0.8 V,
VOH = 70 V
IOl = 100 mA
Vee = 4.75 V,
IOL = 200 mA
VIH = 2 V,
IOl = 300 mA
Vil = 0.8 V
IOl = 350 mA
Vee = 4.75 V,
IOH = 100 ~A
Vee = 4.75 V,
IR=100~
IF = 350 mA
Vee - 4.75 V,
Vee = 5.25 V,
VI = 5.25 V

Low-level output voltage

V (BRIO Output breakdown voltage
VR(KI Output clamp diode reverse voltage
VFIKI

Output clamp diode forward voltage

IIH

High-level input current

III

Low-level input current

A input
Strobe S

Vee = 5.25 V,

SN75446
leeH

leel

Supply current, outputs high

Supply current, outputs low

SN75447
SN75448

VI = 0.8 V
VI

Vee

=

5.25 V

=

5 V

MIN

Typt

MAX

-0.9

-1.5

1

100

0.10

0.3

0.22

0.45

0.45

0.65

0.55

0.75

0.6

1.2

1.6

V

0.01

10

~A

-0.5

-10

-1

-20

11

18

V

100

V

VI = 0

11

18

VI = 5 V

18

25

VI = 0

18

25

VI = 0

11

18

VI = 5 V

11

18

VI = 0

18

25

VI = 5 V

18

25

SN75448
SN75449

V

100

SN75446
Vee = 5.25 V

V
~A

70
70

SN75449
SN75447

UNIT

~A

mA

mA

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

4-79

SN75446 THRU SN75449
DUAL PERIPHERAL DRIVERS
switching characteristics,
tpLH

vee" 5 V, TA

tpHL

Propagatiol1 delay tim~. high-to-Iow-Ievel output

lTLH
tTHL

Trlln~ilion

VOH

25°e

..

PARAMETER
Propegation delay time. low-to-high-I~vel output

TEST CONOITIONS

MIN

TYP
300

CL

=

time. low-to-high-Ievel output
Transition time. hlgh-to-Iow-Ievel output

15 pF. RL = 100
See Figure 1

n.

200
50
50

Vs - 55 V. 10 ~300 mAo
See Figure 2

High-level output voltage after switching

VS-O.OIS

PARAMETER III!I=ASUREMENT INFORMATION
INPUT

J~

2.4 V

j

I

SN75.J&

r

i

I SN75447 I

I
I

A~S

PULSE
GENERATOR
ISee Note Al

I

I

S/A

I

I

I

SN75448
SN75449

____

l:jOV
RL=l00n

I
_-~"--+-4-""'- OUTPUT

CIRCUIT
UNOER
TEST

I

0.4V
TEST CIRCUIT
I.+I-S.5 ns
~

__- 3 V

2V1I 7
:

SN7544& INPUT 1.1$ V
SN75448

~

-./

~I4'=S5 ns

II

SN75447
SN75449

.

11~._=0.=7V~==~;===~~~
51'S

2.7 V

-----0 V
0.7 V

I

I

II

to!

tpHL

tPLH

--~9~0%~.~I50%
OUTPUT

-J...-.--,.I

iLl
I

90% VOH

50%

I Ll...;o_%_ _ _ _ _ _ _lo_%~ JI ,I-I -VOL
~tTLH

M-lTHL
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR
B. CL includes probe and jig capacitance.
FI~URE

= 100 kHz. Zout = 50 n.

1_ SWITCHING CHARACTERISTICS

TEXAS . "

INSTRUMEN1S
4-80

POST qFFICE BOX 655303 • DAIJ.AS, TEXAS 76205

MAX
750

UNIT
ns

500
100

ns
ns

100

ns
V

SN75446 THRU SN75449
DUAL PERIPHERAL DRIVERS
PARAMETER MEASUREMENT INFORMATION
VS=55 V
INPUT

rl

5V

2AV

~

2mH

SN75446

LSN76447 I
PULSE
GENERATOR
(Sea Not. AI

A

~

I 80.n

CIRCUIT
UNDER
TEST

CL = 15 pF
See Not. BI

• SN76448
SN75449

I

0.4V

~ OUTPUT

1

GND

-

TEST CIRCUIT

~.:S5ns

4:S10ns

I I

SN75446
INPUT
SN75448

Jtl
I

~J
..-.

:

~~I~_:I:O:%===~;;;;::===I:O:%:~' _____ 0V
40jIS
--.tl N--sIOns

-J ~I r.--s5ns

SN75447
INPUT
SN76449

OUTPUT

3V

0
1.: :

I I.:':
~

91~V~
I :

10%

1--.----3V

10%

'----OV

~~

________________-J~:::

VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: PRR = 12.5 kHz, Zout = 50 O.
B. CL includes probe and jig capacitance.

FIGURE 2. LATCH-UP TEST

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

4-81

4-82

SN75465 THRU SN75469
DARLINGTON TRANSISTOR ARRAYS
02625. DECEMBER 1976-REVISED SEPTEMBER 1986

HIGH-VOLTAGE HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
•

o OR N PACKAGE

500-mA Rated Collector Current
(Single Output)

(TOP VIEW)

•

High-Voltage Outputs ... 100 V

1B

•

Output Clamp Diodes

2B
3B

•

Inputs Compatible with Various Types of
Logic

4B
5B

•

Relay Driver Applications

•

Higher-Voltage Versions of ULN2005A.
ULN2001A. ULN2002A. ULN2003A. and
ULN2004A. Respectively. for Commercial
Temperature Range

6B
7B

E

1C
2C
3C
4C
5C
6C
7C
COM

description
The SN75465. SN75466. SN75467. SN75468. and SN75469 are monolithic high-voltage. high-current
Darlington transistor arrays. Each consists of seven n-p-n Darlington pairs that feature high-voltage outputs
with common~cathode clamp diodes for switching inductive loads. The collector-current rating of each
Darlington pair is 500 mAo The Darlington pairs may be paralleled for higher current capability. Applications
include relay drivers. hammer drivers. lamp drivers. display drivers (LED and gas discharge). line drivers.
and logic buffers.
The SN75465 has a 1050-0 series base resistor and is especially designed for use with TTL where higher
current is required and loading of the driving source is not a concern. The SN75466 is a general-purpose
array and may be used with TTL. P-MOS. CMOS. and other MOS technologies. The SN75467 is specifically
designed for use with 14- to 25-V P-MOS devices and each input has a zener diode and resistor in series
to limit the input current to a safe limit. The SN75468 has a 2700-0 series base resistor for each Darlington
pair for operation directly with TTL or 5-V CMOS. The SN75469 has a 10.5-kO series base resistor to
allow its operation directly from CMOS or P-MOS that use supply voltages of 6 to 15 V. The required input
current is below that of the SN75468 and the required voltage is less than that required by the SN75467.

logic symbol t

logic diagram
(9)

COM
18
28
38
48
58
68
78

(1)
(2)
(3)
(4)
(5)
(6)
(7)

COM

(16)

lC

(15)

2C

(14)

3C

lC
2C
3C

4C
5C

6C

:>0_-+-_-+_.:.;(1:.::3:,.) 4C

7C

tThis symbol is in accordance with ANSIIIEEE Std 91-1984 and
IEC Publication 617-12.

(12)

5C

(111 6C

78

I' of publication date. Products conform to

:=i:;"I~:I~li =:~i:; :llo::~:~~~~ .01

7C

Copyright © 1986. Texas Instruments Incorporated

PRODUCTION DATA do•• mlnls .ont.in inform.tion

currant

spaclficatlons par Ihl Ilrm. of T.... 1••lrum.nta

(10)

:>O>--+---";";":'~

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

4-83

SN75465 THRU SN75469
DARLINGTON TRANSISTOR ARRAYS
schematics (each Darlington pair)
COM

INPUT 8

INPUT B

~4-E

SN75467

SN75466

COM

RB
INPUT B
SN75465: RB - 1.05 kO
SN75468: RB - 2.7 kO
SN75469: RB - 10.5 kO

...-

....- E

SN75465.SN75468.SN75469
All resistor values shown are nominal.

absolute maximum ratings at 25°C free-air temperatl;lre (unless otherwise noted)
Collector-emitter voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 100 V
Input voltage (see Note 1): SN75465 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
SN75467. SN75468. SN75469 .......................... 30V
Peak collector current (see Figures 14 and 15) ....' . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 500 mA
Output clamp diode current ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 500 mA
Total emitter-terminal current ............................... '........... ',' . .. -2.5 A
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range, T A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. OOC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds .............. " . . . . . .. 260°C
NOTE 1: All voltage values are with respect to the emitter/substrate terminal. E. unless otherwise noted.
DISSIPATION RATING TABLE
PACKAGE

TA s 25°C
POWER RATING

D

950 mW

N

1150mW

DERATING FACTOR
ABOVE TA - 25°C
7.S mW/oC

TA - 70°C
POWER RATING

9.2 mW/oC

TEXAS

-II

INSTRUMENTS
4-84

POST OFFICE BOX 655303 • DALLAS. TEXAS 76285

S08mW
736 mW

SN75465, SN75466, SN75467
DARLINGTON TRANSISTOR ARRAYS
electrical characteristics at 25 °C free-air temperature (unless otherwise noted)
PARAMETER

TEST
FIGURE

TEST CONOITIONS

ICEX

Collector cutoff current

II(0ffi

Off-state input current

3

VCE-100 V,
VCE=100 V,
VCE=100 V,

II

Input current

4

VI-3 V

Vl(onl

On-state input voltage

5

VCE=2 V,

6

11=250
11=350

1

Collector-emitter
VCE(satl

IR
VF
Ci

saturation voltage
Clamp diode reverse
current

Clamp diode forwarq
voltage

11- 0
11=0,
IC=500

~A,

SN75465
TYP MAX
50
100

TA=70 oC
TA=70 oC

50

IC=100 mA

~,

11-500~,

IC=200 mA
IC-350 mA

7

VR=100 V
VR=100V,

TA=70 oC

B

IF=350 mA

2.4
2.4

0.9
1

1.1
1.3

1.2

1.6
50
100

1.7
f=l MHz

VI=O,

15

UNIT
~A
~A

65
1.5

IC=350 mA

~,

Input capacitance

MIN

mA
V
V

~

2

V

25

pF

electrical characteriltics at 25 °C free-air temperature (unless otherwise noted)
PARAMETER

ICEX

Collector cutoff current

TEST
FIGURE
1
2

TEST CONDITIONS
VCE= 100 V,

Off-state input current

3

II

Input current

4

VI=17 V

6

VCE=2 V,

hFE
Vl(onl

Static forward current
transfer ratio

On-state input voltage

Collector-emitter
VCE(satl saturation voltage
IR
VF
Ci

Clamp diode
forward voltage
Clamp diode
forward voltage
Input capacitance

VCE-2 V,

IC-300 mA

6

11-250/loA,
11=350 p.A,

Ic-l00mA
IC=200 mA
IC=350 rnA

7

8

VR=100 V,

SN75467
TYP MAX

50
100

50

UNIT

50
100
500

~A

0.B2

1.25

mA

13

V

1.1
1.3

0.9
1

1.1
1.3

V

1.6

1.2

1.6

65

50

-

0.9
1
1.2

~A

65

50

50
100

TA=70 oC

IF=350 mA
VI=O,

MIN

IC=350 mA 1000

5

11=500/loA,
VR-l00 V

SN75466
TYP MAX

11=0

VCE=100v,III=0
TA=70 oC
I VI=6 V
VCE=50 V,
IC=500~,
TA=70 oC

Il(0ff)

MIN

100

~A

1.7

2

1.7

2

V

15

25

15

25

pF

f=l MHz

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 75285

4-85

SN75468, SN75469
DARLINGTON TRANSISTOR ARRAYS
electrical characteristics at 25°C free-air temperature (unless otherwise noted)
TEST

PARAMETER

ICEX

Collector cutoff current

1
2

Ilioft)

TEST CONDITIONS

FIGURE

Off-state input current

3

VCE=l00 V,

11=0

VCE= 100 V,
TA=70 oC

11- 0
VI=l V

VCE=50 V,

IC=500 ~,

TA=70 oC

SN75468
MIN

Input current

4

SN75469
MAX

MIN

TYP

50

50

100

100

50

65
0.93

50

VI=5 V

0.35

0.5

1

1.45

VCE=2 V

IC=250 mA

6
7

IC=275 mA
IC=300 mA

6

8

11=250~,

IC=100 mA

11-350~,

IC-200 mA

1

~A,

IC=350 mA

1.2

II =500
IR
VF
Ci

Clamp diode
reverse current

Clamp diode
forward voltage

Input capacitance

7
8

0.9

VR=100V
VR=100 V,

TA=70°C

IF=350 mA
VI=O,

V

3

IC=350 mA
Collector-emitter
VCE(sat) saturation voltage

mA

5
2.4
2.7

IC=200 mA
5

~A

~A

65

IC=125 mA

On-state input voltage

UNIT

1.35

VI=12 V

Vl(on)

MAX

500

VI=3.85 V
II

TYP

1.1

0.9

1.1

1.3

1

1.3

1.6

1.2

1.6

50

50

100

100

V

~

1.7

2

1.7

2

V

15

25

15

25

pF

f=l MHz

switching characteristics at 25°C free-air temperature
TYP

MAX

tpLH

Propagation delay time, low-to-high-Ievel output

VS=50 V,

TEST CONDITIONS
RL = 16311,

0.25

1

tpHL

Propagation delay time, high-to-Iow-Ievel output

CL=15 pF,

See Figure 9

0.25

1

VOH

High-level output voltage after switching

VS=50 V,
See Figure 10

10 = 300 mA,

PARAMETER

TEXAS . . ,
INSTRUMENTS
4-86

POST OFFICE BOX 655303 • DALLAS, TEXAS 75285

MIN

VS-20

UNIT
~s
~s

mV

SN75465 THRU SN75469
DARLINGTON TRANSISTOR ARRAYS
PARAMETER MEASUREMENT INFORMATION
OPEN

OPEN

VCE

ICE X

OPEN

+--

VI

"::"

FIGURE 1. ICEX

FIGURE 2. ICEX

OPEN

VCE

OPEN

IlIonl
VI

---+

OPEN

"::"

FIGURE 4.11

FIGURE 3. I J(off)

OPEN

OPEN

IC

hFE

=

II

llc

111
"::"

"::"

"::"

NOTE: II is fixed for measuring VCE(sat). variable for measuring hFE'

FIGURE 5. Vl(on)

FIGURE 6. hFE. VCE(sat)

OPEN

FIGURE 8. VF

FIGURE 7.IR

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

4-87

SN75465 THRU SN75469
DARLINGTON TRANSISTOR ARRAYS
PARAMETER MEASUREMENT INFORMATION
Vs - 50 V

OPEN

INPUT

'488 only
2.7 kO

Rl - 1630

-~-l

:»...+-.........___-

'465
'467
'466
'469

_

0:

~

T.,..
IOns

~,;;

~1_l__________ VIH

~

90%
50%

50%

I

--....I

OUTPUT

Cl-15pF
IS.. Note BI

TEST CIRCUIT

jt-" 5n.

190~

INPUT

I

10%:'

--"':"::::::.:1 I
:..

I
I
,1 10%

ISee Not. CI

11(,,;.;.;;;..-----_0 V

0.5..

~

_ _____
- __
tP_H_L~""\

I4-tPlH~

I

I,----VOH

OUTPut

50

\0%

7_____

VOL

VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR = 12.5 kHz, Zo = 50 II.
B. CL includes probe and jig capacitance.
C. For testing the '465, '466, and '46B, VIH = 3 V; for the '467, VIH = 13 V; for the '469, VIH

=

8 V.

FIGURE 9. PROPAGATION DELAY TIMES
Vs
OPEN

INPUT

2mH

'468 only
lN3064

2.7 kD

--J>,Nt,--..,

I

'465
'467
'488
'469

:>cl............+-...._ ....-

2000

...._--OUTPUT

TEST CIRCUIT

--,.l

t
I
l

INPUT

:
____
10;.;;%...
_

14-,;; 5 n.
I

--.t 1+-" 10 ns
I

I

1r~90::':%~-----~90::':%~ii,'- 1.5V

1.5V

i
:
"'~----40 pS-~--toI~

-- - - - ---

IJ~.

Not. CI

:
10%

---------.
OUTPUT

V

\'---,_---'f_____

0 V

VOH

VOL

VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following char.acteristics: PRR = 12.5 kHz, Zo = 50 II.
B. CL includes probe and jig capacitance.
C. For testing the '465, '466, and '468, VIH = 3 V; for the '467, VIH = 13 V; for the '469, VIH

FIGURE 10. LATCH-UP TEST

TEXAS . "

INSTRUMENTS
4-88

POST OFFICE BOX 855303 • DALLAS. TEXAS 75285

= 8 V.

SN75465 THRU SN75469
DARLINGTON TRANSISTOR ARRAYS
TYPICAL CHARACTERISTICS
CDLLECTOR-EMITIEA

COLLECTOR-EMITTER
SATURATION VOLTAGE

SATURATION VOLTAGE

"

COLLECTOR CURRENT

>

>

0

!

~

j

1

1.0

~~

/..
~

350pA

.~

11",5001£.6."

~

l

~

Y.

5

II

250PAj

400

V >:: a~

~

~ i:="'""

~ f"'"

~

II - 500IlA

=10n

250
200

5?

150

~

10 V

//

v

/ l/vs=BV
II
I
I

300

;3
I

Rl

TA= 2SoC

Vs

I

V...-1::::/

1.0

460

350

11=350~"

1. 5

..

E

2.0

j

0.5

I

-T1 = 25 C

~

~

0.5

!

W

~

500

is

"= 250pA

INPUT CURRENT

2.5

1

rTAI= 25·k

h

"

(TWO DARLINGTONS PARALLELED)

5

5

COLLECTOR CURRENT

"

COLLECTOR CURRENT
(ONE DARLINGTON)

00

100 200 300 400 500 600 700 800

~

00

100 200 300 400 500 600 700 800

Ie-Collector Current-mA

ICltot)-Total Collector Current-mA

FIGURE 11

FIGURE 12

25

50

75

100 125 150 175 200

It-Input Current-l"A

FIGURE 13

THERMAL INFORMATION
D PACKAGE
MAXIMUM COLLECTOR CURRENT
vs
DUTY CYCLE

~

.,

'ii
(J

E
~

.

300

f-+---'~-"d--"<-+""'-'+---+"~

N-6
I

N - 7::j==I=i~~';'!!

200

.j(

~

N PACKAGE
MAXIMUM COLLECTOR CURRENT
vs
DUTY CYCLE

I

T A - 70·C -+-----I--r:::~:;;;::j:::;;;;t:;:~
N - Numbe. of Outputs
Conducting Simultaneously

100

9

OL-~~

o

10

__

L--L~

__~-L__L-~~

20 30 40 50

60 70 80 90 100

- Numbe. of Outputs
Conducting Simultaneously
OL-~~

o

__

L--L~

__~~__L-~-J

10 20 30 40 50 60 70 80 90 100
Duty Cycle - %

Duty Cycle - %

FIGURE 14

FIGURE 15

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

4-89

SN75465 THRU SN15469
DARLINGTON TRANSISTOR ARRAYS
TYPICAL APPLICATION DATA
SN75465

Vss

SN75467

VCC

+V

SN75466.SN7546B

+V

OUTPUT
P-MOS TO LOAD

TTL TO LOAD

SN75465
VDD

SN75469

+V

Vee

BUFFER FOR
HIGHER CURRENT LOADS

USE OF PULL·UP RESISTORS
TO INCREASE DRIVE CURRENT

TEXAS . "
INSTRUMENTS
4-90

SN75468

POST OFFICE BOX 655303 • DALLAS. TEXAS 76266

+V

SN75471 THRU SN75473
DUAL PERIPHERAL DRIVER
02130, DECEMBER 1976-REVISED MAY 1990

o DR P PACKAGE

PERIPHERAL DRIVERS FOR HIGH-VOLTAGE,
. HIGH-CURRENT DRIVER APPLICATIONS

(TOP VIEWI

Vee

•

Characterized for Use to 300 mA

lAuS

1B

2

7

2B

•

High-Voltage Outputs

lY

3

6

2A

•

No Output Latch-Up at 55 V (After
Conducting 300 mAl

GND

4

5

2Y

•

Medium-Speed Switching

•

Circuit Flexibility for Varied Applications and
Choice of Logic Function

SUMMARY OF SERIES SN75471

•

TTL-Compatible Diode-Clamped Inputs

•

Standard Supply Voltages

•

Plastic DIP (PI with Copper Lead Frame
Provides Cooler Operation and Improved
Reliability
.

DEVICE
SN75471
SN75472
SN75473

LOGIC OF
COMPLETE CIRCUIT
AND
NAND
OR

PACKAGES
D,P
D,P
D,P

description
Series SN75471 dual peripheral drivers are functionally interchangeable with Series SN75451 B and Series
SN75461 peripheral drivers, but are designed for use in systems that require higher breakdown voltages
than either of those series can provide at the expense of slightly slower switching speeds than Series 75451 B
(limits are the same as Series SN75461), Typical applications include logic buffers, power drivers, relay
drivers, lamp drivers, MOS drivers, line drivers, and memory drivers,
The SN75471, SN75472, and SN75473 are dual peripheral AND, NAND, and OR drivers, respectively,
(assuming positive logic) with the output of the logic gates internally connected to the bases of the n-p-n
output transistors.
Series SN75471 drivers are characterized for operation from

PRODUCTION DATA docum.nta contain Inlormation
current •• of publi.atio. data. Produeta .onform to
spacification. par the terms 01 T•••• Inltrum..ta

::'~=:~~i;ai~:I~'la

=::i:r :~'::~:.:~~

Rot

ooe to 70 oe.

Copyright © 1990, Texas Instruments Incorporated

TEXAS ."

INSTRUMENlS
POST OFFICE BOX 855303 • DALLAS. TEXAS 76285

4-91

SN75471 THRU SN75473
DUAL PERIPHERAL DRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) ................. : . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Interemitter voltage (see Note 2) .............................................. 5.5 V
Off-state output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 70 V
Continuous collector or output current (see Note 3) .............................. 400 mA
Peak collector or output current (t w s 10 ms, duty cycle s 50%, see Note 3) . • . . . . . . . 500 mA
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range, T A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. O°C to 70°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260°C
NOTES: 1. Voltage values are with respect to the network ground terminal unless otherwise specified.
2. This is the voltage between two emitters of a multiple-emitter transistor.
3. Both halves of these dual circuits may conduct rated current simultaneously; however, power dissipation averaged over a
short time interval must fall within the continuous dissipation rating.

DISSIPATION RATING TABLE
PACKAGE

0
p

TA s 25·C
POWER RATING
725 mW
1000 mW

DERATING FACTOR
ABOVE TA - 25·C
5.8 mW'·C
8.0 mW'·C

TA - 70·C
POWER RATING
464mW
640mW

recommended operating conditions
MIN
4.75

Supply voltage, Vce
High-level input voltage, VIH

MAX
5.25

2
0.8

Low-level input voltage, VIL
0

Operating free-air temperature, T A

TEXAS ."

4-92

NOM
5

INSlRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 76286

70

UNIT
V
V
V
·C

SN75471
DUAL PERIPHERAL POSITIVE·AND DRIVER
logic symbol t
lA
18
2A
28

logic diagram (positive logic)

(1)

&t>

(3)

~

(2)
(6)

lY

(5)

2Y

(7)

tThis symbol Is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
FUNCTION TA8LE
lEACH DRIVER)
A
L
L

B
L
H

schematic leach driver)
r-----~----._-------VCC

Y
L (on state)

4kll

L Ion state)

H

L

L Ion state)

H

H

H loff state)

positive logic:_ _
Y = AB or A+B

y

A
B

~~------~----~~~~-GND

ResistOr values shown are nominal.

electrical characteristics over recommended operating free-air temperature range
PARAMETER

TEST CONDITIONS

VIK

Input clamp voltage

10H

High-level output current

VOL

= 4.75 V,
VCC = 4.75 V,
VOH = 70 V
VCC = 4.75 V,
10L = 100 mA
VCC = 4.75 V,
VCC

Low-level output voltage

IOL
II

Input current at maximum
input voltage

IIH

High-level input current

VCC

IlL

Low-level input current

VCC

ICCH Supply current, outputs high
ICCL Supply current, outputs low

VCC

*AII typical values are at VCC

= 5 V,

=

VCC

VCC

TA

II

=

VIH

MIN

-12mA

= 2 V,
0.25

0.4

0.5

0.7

UNIT
V
~A

V

= 0.8 V

300 mA

= 5.25 V,
= 5.25 V,
= 5.25 V,
= 5.25 V,
= 5.25 V,

MAX
-1.5
100

VIL = 0.8 V,
VIL

TYP*
-1.2

VI = 5.5 V

1

= 2.4 V
= 0.4 V

40

iJA

-1.6

mA

VI
VI

-1
8

11

mA

56

76

mA

TYP

MAX

30

55

ns

CL=15pF,

25

40

ns

See Figure 1

8

20

ns

10

20

ns

VI - 5 V
VI

=

mA

0

= 25°C.

switching characteristics. Vee - 5 V. TA .. 25°e
PARAMETER

TEST CONDITIONS

tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
tTLH Transition time, low-to-high-Ievel output
tTHL Transition time, high-to-Iow-Ievel output
VOH High-level output voltage after switching

10 = 200 mA,
RL

=

500,

Vs - 55 V,
See Figure 2

10 = 300 mA,

MIN

VS-IS

UNIT

mV

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 86~303 • DALLAS. TEXAS 75265

4-93

SN75472
DUAL PERIPHERAL POSITIVE·NAND DRIVER
logic symbol t
lA
lB
2A
2B

logic diagram (positive logic)

(1)

&t>

(2)
(6)
(7)

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
FUNCTION TABLE
(EACH DRIVER)
A
L
L
H

B
L

Y

Vee

H (off state)

H
L
H

H

schematic leach driver)

H (off statel
H (off state)
L (on state I

Y

positive logic:

Y ~

Aii

or

A+B
GND
Resistor values shown are nominal.

electrical characteristics over recommended operating free-air temperature range
PARAMETER

VIK

Input clamp voltage

IOH

High-level output current

VOL

Low-level output voltage

II

Input current at maximum
input voltage
High-level input current

IIH
Low-level input current
IlL
ICCH Supply current, outputs high
ICCl Supply current, outputs low

TEST CONDITIONS

MIN

VCC - 4_75 V, 11--12mA
VCC ~ 4_75 V, VIH = 2 V,
VOH = 70 V
VCC - 4_75 V, VIL = 0.8 V,
10L = 100 rnA
VCC = 4.75 V, VIL
10L = 300 rnA
VCC

=

VCC

=

= 0.8

5.25 V, VI

=

5.25 V, VI

= 2.4

TYP*

MAX

UNIT

-1.2

-1.5

V

100

pA

0.25

0.4

0.5

0.7

V

V

1

rnA

40
-1.6

rnA

61

17
76

rnA

TYP

MAX

45

ns

30
13

65
50
25

10

20

ns

5.5 V
V

VCC = 5.25 V, VI = 0.4 V
VCC - 5.25 V, VI - 5 V
VCC = 5.25 V, VI = 0

-1
13

~A

rnA

tAli typical values are at VCC = 5 V, TA = 25°C.

switching characteristics. Vee - 5 V. TA = 25°e
PARAMETER

TEST CONDITIONS

tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
tTLH Transition time, low-to-high-Ievel output

10

~

200 rnA,

Rl

=

50 II,

MIN

Cl = 15 pF,
See Figure 1

tTHL Transition time, high-to-Iow-Ievel output
VOH High-level output voltage after switching

Vs = 55 V,
See Figure 2

10

~

300 rnA,

TEXAS ."

4-94

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

VS-IS

UNIT

ns
ns

mV

SN75473
DUAL PERIPHERAL POSITIVE·OR DRIVER
logic symbol t
lA
lB
2A
2B

logic diagram (positive logic)

(1)

(3) 1Y

",11>

(3) lY

~

(2)
(6)

(5) 2Y

(7)

2A (6)
tThis symbol is in accordance with ANSI/IEEE Std 91 -1984 and
IEC Publication 617-12.

2B (7)
(4)GND

FUNCTION TABLE
(EACH DRIVER)

schematic (each driver)

Y

A
L

B
L

L (on state)

L

H

H (off state)

H

L

H (off state)

H

H

H (off state)

positive logic:

B

y ~ A+BorAB

Resistor values shown are nominal.

electrical characteristics over recommended operating free-air temperature range
VIK
10H

PARAMETER
Input clamp voltage
High-level output current

TEST CONDITIONS
VCC

=

4.75 V, II

II

Low-level output voltage

Input -current at maximum

input voltage
High-level input current
IIH
Low-level input current
IlL
ICCH Supply current, outputs high
ICCl Supply current, outputs low

MIN

-12 mA

TYpt

MAX

UNIT

-1.2

-1.5

V

VCC - 4.75 V, VIH - 2 V,

= 70 V
= 4.75 V,
10l = 100 mA
VCC = 4.75 V,
10l = 300 mA

100

VOH
VCC

VOL

=

Vil

= 0.8

V,

Vil

= 0.8

V

VCC

=

5.25 V, VI

=

VCC

=
=
=
=

5.25 V, VI

= 2.4 V
= 0.4 V
=5V
=0

VCC
VCC
VCC

5.25 V, VI
5.25 V, VI
5.25 V, VI

0.25

0.4

0.5

0.7

~A

V

5.5 V

1

-1

mA

40

~A

-1.6

mA

8

11

mA

58

76

mA

TYP

MAX

30

55

ns

25

40

ns

8

25

ns

10

25

tAli typical values are at VCC = 5 V, TA = 25°C.

switching characteristics, Vee" 5 V, TA .. 25°e
PARAMETER

TEST CONDITIONS

tpLH Propagation delay time, low-to-high-Ievel output
tpHL Propagation delay time, high-to-Iow-Ievel output
ITLH Transition time, low-to-high-Ievel output
ITHL Transition time, high-to-Iow-Ievel output
10H

High-level output voltage after switching

10

~

200 mA,

RL

=

SOli,

Vs

=

55 V,

MIN

CL = 15 pF,
See Figure 1
10

~

300 mA,

See Figure 2

VS-1S

UNIT

ns
mV

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

4-95

SN75471 THRU SN75473
DUAL PERIPHERAL DRIVERS
PARAMETER MEASUREMENT INFORMATION

-+I

t.,,; 10 n8
I

I
INPUT 2.4V

1.5V

10 V

~
'472

.~'':;90::::%;:---- 3 V
1.SV
I

OUTPUT

I~__-~~~:;~~~"

-.I

I
1~ I-------OV
:'--O,SjJS---~~

I i4-,,;s ns

I I

PULSE
GENERATOR
I(See Note A)

I

.... I 14-,,;10 ns
1-1-1--.,.----3V
90%
1.SV I

I

II

90%

11
:

INPUT
'472

I

10%

r--t

GND

'473

T-"

I 10%
I 1\,.;;:':':"---0 V
If-tPLH"'-+I

:SUB

I

*

0.4 V

I
I

90%

I
SO%

OUTPUT

I

10%
I
~,.------'!I--I- -VOL

10%
:--1

if-tTHL

tTLH-tot

I+-

VOLTAGE WAVEFORMS

TEST CIRCUIT

NOTES: A. The pulse generator has the following characteristics: PRR ,,; 1 MHz, Zo ~ 50 II.
B. CL includes probe and jig capacitance.

FIGURE 1, SWITCHING TIMES
t.,,;10ns

-+I

I

I

SV

1.SV

10% I I

I "-'-'''''---f:F-''':''::'':::..I!-I- - - - - - - 0 V

¢,I

:'--40IJS
I i4-,,;6 ns

PULSE

(See Nota A)

~

.... I 14-,,;10 ns

I :,..'=--.,S----,=-...:'-I-I-------3V

OUTPUT

GENERATOR~---~~~;;'~;-7;"

INPUT

190%

'472

90%

1.SV

II

I I
I
""1.:..:~,,,,-_ _ _

'473

GND

T-"
0.4 V

TEST CIRCUIT

ov

J~:::

:SUB

I

*

I--_ _ _ _ _
VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: PRR ,,; 12.5 kHz, Zo ... 50 II.
B. CL includes probe and jig capacitance.

FIGURE 2. LATCH-UP TEST

TEXAS . "

INSTRUMENTS
4-96

1~9=:0::::%;-----3 V

I
I

1.SV
INPUT 2.4 V

I

I

VS=66V

POST OFFICE BO~ 655303 • DALLAS. TEXAS 75265

SN75476 THRU SN75479
DUAL PERIPHERAL DRIVERS
02284, DECEMBER 1976-REVISEO DECEMBER 1989

D OR P PACKAGE

•

Characterized for Use to 300 rnA

•

No Output Latch-Up at 55 V (After
Conducting 300 mAl

•

High-Voltage Outputs (100 V Typical)

•

Output Clamp Diodes for Transient
Suppression (300 rnA. 70 VI

•

TTL- or MOS-Compatible Diode-Clamped
Inputs

•

P-N-P Inputs Reduce Input Current

•

Standard Supply Voltage

SUB
(TOP VIEW)

lA
lY
GND

2
3

7
6

4

5

VCC
2A

2Y
CLAMP

FUNCTION TABLES
SN75476
(EACH AND DRIVER)
INPUTS

OUTPUT

A

S

Y

•

Suitable for Hammer-Driver Applications

H

H

H

•

Plastic DIP (PI with Copper Lead Frame
Provides Cooler Operation and Improved
Reliability

L

X

L

X

L

L

SN75477
(EACH NAND DRIVER)

description
Series SN75476 dual peripheral drivers are
designed for use in systems that require high
current, high voltage, and fast switching times,
The SN75476, SN75477, SN75478, and
SN75479 provide AND, NAND, OR. and NOR
drivers, respectively. These devices have diodeclamped inputs as well as high-current, highvoltage clamp diodes on the outputs for
inductive transient protection.
The SN75476. SN75477. SN75478. and
SN75479 drivers are characterized for operation
from O°C to 70°C.

INPUTS

OUTPUT

A

S

H

H

L

L

X

H

X

L

H

Y

SN7547B
(EACH OR DRIVER)
INPUTS

OUTPUT

A

S

Y

H

X

H

X

H

H

L

L

L

SN75479
(EACH NOR DRIVER)
EQUIVALENT
OF EACH INPUT

VCC--_-

TYPICAL
OF ALL OUTPUTS
CLAMP

OUTPUT

INPUTS

OUTPUT

A

S

Y

H

X

L

X

H

L

L

L

H

H = high level
L = low level
X = irrelevant

GND

Copyright © 1989, Texas Instruments Incorporated

PRODUCTION DATA documents conti in

information £U"8nt 8S of public.tian data.
Products conform to specifications gar the terms
of Texas Instrumants standar wlrrant,.
Production procllsing dDes net R8C8II.rily
include lO$Iing

0' all p.rametalS.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75266

4-97

SN75476 THRU SN75479
DUAL PERIPHERAL DRIVERS

logic symbols t

logic diagrams (positive logic)
SN75476

(31 1Y

(61 2Y
'--_---'(:;;.51:... CLAMP
~.-_______(~4~1 GND

positive logic: Y = AS or

A+1

SN75477

(31

~--~'-----~1Y

S
2A-"-''---L~

,--__-;.;;;(5.:-1 CLAMP
~.-_____--,-(4,,-1 GND

positive logic: V :II

AI or A + S

SN75478

(31 1Y

.,,--+-+_+-.-:.:(6,,-1 2Y
1 CLAMP
'--...._-=.;(50:..

1 GND
'---.-.____......:.(4.0:..
positive logic: Y = A + S or
SN75479

AS

~_--1I~_ _.;...(3",-1 1Y

.,,-+-+_-.----'(~61 2Y
'--_-..:.(5'-'-1 CLAMP

~r.-___-=-(4;.;.1 GND
positive logic: V ,.

t These symbols are in accordance with ANSI/IEEE Std 91-1984
and lEe Publication 617-12.

TEXAS . "

INSTRUMENTS
4-98

POST OFFICE BOX 656303 • DALLAS, TEXAS 76265

A+s or AS

SN75476 THRU SN75479
DUAL PERIPHERAL DRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vec (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Continuous output current (see Note 2) ....................................... 400 mA
Peak output current: tw :s 10 ms, duty cycle :s 50% . . . . . . . . . . . . . . . . . . . . . . . . . . .. 500 mA
tw :s 30 ns, duty cycle :s 0.002% .... . . . . . . . . . . . . . . . . . . . . . . . .. 3 A
Output clamp diode current ................................................ 400 mA
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range, T A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. OoC to 70°C
Storage temperature range ......................................... - 65°C to 150 DC
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . .. 260°C
NOTES: 1. Voltage values are with respect to network ground terminal.
2. Both halves of this dual circuit may conduct rated current simultaneously; however, power dissipation averaged over a short
time interval must fall within the continuous dissipation ratings.

DISSIPATION RATING TABLE
PAeKAGE

TA s 25 0 e

DERATING FACTOR

POWER RATING

ABOVE T A - 25°C

TA - 70 DC
POWER RATING

725 mW
1000 mW

5.8 mw/oe
8.0 mw/oe

464mW
640 mW

o
p

recommended operating conditions
Supply voltage, Vee

MIN

NOM

MAX

4.5

5

5.5

low-level ,input voltage, V,l
0

Operating free-air temperature, T A

V
V

2

High-level input voltage, ViH

UNIT

0.8

V

70

°e

electrical characteristics over recommended operating free-air temperature range
V,K

PARAMETER
Input clamp voltage

IOH

High-level output current

VOL

TEST CONDITIONS

MIN

" = -12 mA

Vee = 4.5 V,

V,H = 2 V,

V,l = 0.8 V,

low-level output voltage

TYPt
-0.95

MAX
-1.5

UNIT
V

p.A

1

100

0.16

0.3

= 175 mA

0.22

0.5
0.6

VOH = 70 V

Vee = 4.5 V,

l'Ol = 100 mA

V,H = 2 V,

I IOl

V,l = 0.8 V
VIBRIO

Output

Vee = 4.5 V,

IIOL - 300 mA
IOH = 100 p.A

70

0.33
100

VRIKI

Output clamp dio~e reverse voltage

Vee = 4.5 V,

'R = 100 p.A

70

100

VFIKI

Output clamp diode forward vbltage

Vee - 4.5 V,

0.8

1.15

1.6

I'H

High-level input current

Vee = 5.5 V,

'F - 300 mA
V, = 5.5 V

0.01

10

III

Low-level input current

Vee = 5.5 V,

V, = 0.8 V

br~akdown

voltage

A input
Strobe S
SN75476

leeH

leel

Supply current, outputs high

Supply current, outputs low

V, = 5 V

SN75477

Vee = 5.5 V

SN75478

-110
-220

10

17

10

17

17

10

17

54

75

a
a

V, =

SN75477

V, = 5 V
V, =

SN75479

-80
-160

10

SN75476
Vee = 5.5 V

V

V, = 5 V
V, =

SN75478

V

V, = 0

SN75479

a

V, - 5 V

V

54

75

54

75

54

75

V
p.A

p.A

mA

mA

tAli typical values .reat Vee = 5 V, TA = 25°e.

.

.

TEXAS

~//A

'V

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

4-99

8N75476 THRU 8N75479
DUAL PERIPHERAL DRIVERS
switching characteristics.

Vee -

5

V.

TA

PARAMETER

TEST CONDITIONS

tpLH

Propagation delay time, low-to-high-Ievel output

tPHL

Propagation delay time, high-to-Iow-Ievel output

tTLH

Transition time, low-to-high-Ievel output

tTHL

Transition time,

VOH

High-level output voltage after switching

high·to~low·level

MIN

CL = 15 pF, RL = 1000,

TYP

MAX

UNIT

200

350

ns

200

ns

50

350
125

90

125

See Figure 1

output
Vs = 55 V. 10 =300 rnA.
See Figure 2

J~

2.4V

I

I

r

SN75476 I
I SN75477 .I

S/A

I
I

I

I

I

SN75478
SN75479

130V
RL=I00n

I

AIS
PULSE
GENERATOR
ISso Noto AI

____
____

I

.....o--.....-

-~,..-.+

OUTPUT

CIRCUIT
UNDER
TEST

0.4 V
TEST CIRCUIT

!+-.I-- ::s 5 ns

2~7vlI

~~-3V

:

SN75476 INPUT 1.5V
SN75478

I~~._=Oj=V=='==~;=====~~
0.5,.s

~~140="'5n.
SN75477 INPUT'
SN75479

II

2.7 V

-----0 V
0.7 V

I

14

I

~I tpHL

--~90~%~1
OUTPUT

50%

I 10%
I I
j+tI-tTHL
VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: PRR = 1 MHz, Zout = 50 O.
B. CL includes probe and jig capacitance.

FIGURE 1. SWITCHING CHARACTERISTICS

TEXAS •
INSTRUMENTS
4-100

POST OFFICE BOX 656303 • DALLAS, TEXAS 75265

ns
mV

VS-IS

PARAMETER MEASUREMENT INFORMATION
INPUT

ns

SN75476 THRU SN75479
DUAL PERIPHERAL DRIVERS
PARAMETER MEASUREMENT INFORMATION
VS=55V
INPUT

rl

5V

2.4V

.-L,

2mH

SN75476

I
PULSE
GENERATOR
(Saa Nota A)

SN75477.

A

~

1

0.4 V

CL = 15 pF
(Saa Nota B)

I

GND

-

TEST CIRCUIT

~S5ns
SN75476
INPUT
SN7547B

I II

OUTPUT

Jtll
I
90%
I 1.5 V

1.5 V

J

11-!_:1:0:%===:-:u;;;;===:1:0%~~1

I ~

---.I

SN75477
INPUT
SN75479

4S10ns

~
90%

10%

I

I- OUTPUT

!to

CIRCUIT
UNDER
TEST

• SN7547B
SN75479

I

1Bon

I j;:::,;; 5 ns

90%

1.5 V

40""

.1

3V

______ 0V

-..I I 14-- ,;;10 ns 3V
90%~1
:-----1.5 V

I

10%

"__ _ _ OV

\'--____--.J~::
VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: PRR = 12.5 kHz, Zout = 50 O.
B. CL includes probe and jig capacitance.

FIGURE 2. LATCH-UP TEST

TEXAS , . ,
INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS. TEXAS 75265

4-101

4-102

SN754410
QUADRUPLE HALF·H DRIVER
D2942, NDVEMBER 1986-REVISED MAY 1990

•

1-A Output Current Capability Per Driver

•

Output Clamp Diodes for Inductive Transient
Suppression

•

Applications Include Half-H and Full-H
Solenoid Drivers and Motor Drivers

•

Designed for Positive-Supply Applications

•

Wide Supply Voltage Range:
4.5 V to 36 V

1,2EN
1A
1Y

VCC1
4A
4Y

HEATSINK AND {
GROUND

} HEATSINK AND
GROUND

2Y

3Y

2A
VCC2

•

TTL- and CMOS-Compatible High-Impedance
Diode-Clamped Inputs

•

Separate Input-Logic Supply

•

Thermal Shutdown

•

Internal ESD Protection

•

Input Hysteresis Improves Noise Immunity

3A

Three-State Outputs

•

Minimized Power Dissipation

•

Sink/Source Interlock Circuitry Prevents
Simultaneous Conduction

•

No Output "Glitch" During Power-Up or
Power-Down

3,4EN

'""t..:'----':;.r'

FUNCTION TABLE
(EACH DRIVER)
INPUTst

•

•

NE PACKAGE
(TOP VIEW)

OUTPUT

A

EN

y

H

H

H

L

H

L

X

L

Z

H = high-level
L = low-level
X = irrelevant
Z = high-impedance (affl
t In the thermal shutdown
mode, the output is in highimpedance state regardless

of the input levels,

Improved Functional Replacement for the
SGS L293D

description
The SN75441 0 is a quadruple high-current half-H driver designed to provide bidirectional drive currents
of up to one ampere at voltages from 4.5 V to 36 V. It is designed to drive inductive loads such as relays,
solenoids, dc and bipolar stepping motors, as well as other high-current/high-voltage loads in positive-supply
applications.
All inputs are compatible with TTL and low-level CMOS logic. Each output (V) is a complete totem-pole
driver with a Darlington transistor sink and a psuedo-Darlington source. Drivers are enabled in pairs with
drivers 1 and 2 enabled by 1,2EN and drivers 3 and 4 enabled by 3,4EN. When an enable input is high,
the associated drivers are enabled and their outputs become active and in phase with their inputs. When
the enable input is low, those drivers are disabled and their outputs are off and in a high-impedance state.
With the proper data inputs, each pair of drivers form a full-H (or bridge) reversible drive suitable for solenoid
or motor applications.
A separate supply voltage (VCC1) is provided for the logic input circuits to minimize device power dissipation.
Supply voltage (VCC2) is used for the output circuits.
The SN754410 is designed for operation from -40°C to 85°C.

PRODUCTION DATA d••• mants ••ntain information
currant as of publication date. Products conform to
specifications per the terms of Texas Instruments

=~:~~i~B{::1~1e ~:g::i:r l!~U::;:::':~~ not

Copyright

© 1990, Texas Instruments Incorporated

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75285

4-103

SN754410
QUADRUPLE HALF·H DRIVER
logic symbol t

logic diagram

1A (2)

C>

(3)1Y

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS
---e----~.-.-----VCC2

Vcc1------~~---

............--OUTPUT
INPUT

GND--~--~~---------~~--~~--"'--GND

TEXAS " ,
INSTRUMENTS
4·104

POST OFFICE BOX 856303 , DALLAS. TEXAS 75266

SN754410
QUADRUPLE HALF·H DRIVER
absolute maximum ratings over ope;ating free·air temperature range (unless otherwise noted)
Logic supply voltage range, VCC1 (see Note 1) .......•................... -0.5 V to 36 V
Output supply voltage range, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 36 V
Input voltage ............................................................. 36 V
Output voltage range, Vo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 3 V to VCC2 + 3 V
Peak output current (nonrepetitive, tw :s; 5 ms), IPK ............................... ±2 A
Continuous output current, 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 1.1 A
Continuous total dissipation at (or below) 25 DC free-air temperature (see Note 2) ....... 2075 mW
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 40 DC to 85 DC
Operating case or virtual junction temperature range ...................... - 40 DC to 150 DC
Storage temperature range ......................................... - 65 DC to 1 50 DC
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260 DC
NOTES:

1. All voltage values are with respect to the network ground terminal.

2. For operation above 25°C free-air temperature, derate linearly at the rate of 16.6 mw/oe. To avoid exceeding the design
maximum virtual junction temperature, these ratings should not be exceeded. Due to variations in individual device electrical
characteristics and thermal resistance, the built-in thermal overload protection may be activated at power levels slightly above
or below the rated dissipation.

recommended operating conditions
MIN

MAX

Logic supply voltage, Vee1

4.5

5.5

UNIT
V

Output supply voltage, Vee2

4.5

36

V

High-level input voltage, VIH

2

5.5

V

Low-level input voltage, VIL

-0.3 t

0,8

V

Operating virtual junction temperature, T J

-40

125

°e

Operating free-air temperature, T A

-40

85

°e

t The algebraic convention, in which the least positive (most negative) limit is designated as minimum, is used in this data sheet for logic
voltage levels.

TEXAS ."

INSTRUMENTS
POST OFFICE SOX 655303 • DALLAS. TEXAS 75265

4-105

SN754410
QUADRUPLE HALF-H DRIVER
electrical characteristics over recommended ranges of VCC1. VCC2. and operating virtual junction
temperature (unless otherwise noted)
VIK

PARAMETER
Input clamp voltage

VOH

High-level output voltage

TEST CONDITIONS

MIN

VOL

Low-level output voltage

VOKH High-level output clamp voltage
VOKL

Low-level output clamp voltage
Off-state (high-impedance state)

10L = 1 A.
10K = 0.5 A

1.4
2

High-level input current
Low-level input current

VI - 0

ICCl

Logic supply current

10 = 0

ICC2

Output supply current

10 = 0

500
-500
-10

All
All
All
All

outputs
outputs
outputs
outputs
All outputs
All outputs

at
at
at
at
at
at

V

1.8

VCC2+1.4 VCC2+ 2
VCC2+ 1.9 VCC2+ 2.5
-1.1
-2
-1.3
-2.5

10K = -1 A

UNIT
V
V

1.2

TJ - 25°C

10K = 1 A
10K = -0.5 A

IIH
IlL

output current

TJ - 25°C

10L = 1 A

Vo = VCC2 '
Vo = 0
VI = 5.5 V

10Z

MAX
-1.5

VCC2- 1.5 VCC2- 1.1
VCC2- 2
VCC2-1.8 VCC2- 1.4
1

10H = -0.5 A
10H=-lA
10H = -1 A.
10L = 0.5 A

Typt
-0.9

11- -12 mA

high level
low level
high impedance
high level

38
70
25
33
20

low level
high impedance

V
p.A
p.A
p.A
mA

mA

5

tAli typical values are at VCCl = 5V.VCC2 = 24V.TA = 25°C.

switching characteristics. VCC1 .. 5 V. VCC2 - 24 V. TA - 25°C
tDLH
tDHL
tTLH
tTHL
tpZH
tpZL
tpHZ
tpLZ

PARAMETER
Delay time. low-to-high-Ievel output from A input
Delay time. high-to-Iow-Ievel output from A input
Transition time. low-to-high-Ievel output
Transition time. high-to-Iow-Ievel output

TEST CONDITIONS

CL = 30 pF.

See Figure 1

Enable time to the high level
Enable time to the low level
Disable time from the high level

CL = 30 pF.

See Figure 2

Disable time from the low level

TEXAS ..,
4-106

INSTRUMENTS
POST OFFICE BOX 666303 • DAUAS. TEXAS 762615

MIN

TYP
800
400
300
300'

MAX

UNIT
ns
ns
ns
ns

700
400

ns
ns

900
600

ns
ns

SN754410
QUADRUPLE HALF·H DRIVER
PARAMETER MEASUREMENT INFORMATION
INPUT

5V

24 V

ir"90~%~- 3 V

VCC1 VCC2

PULSE
GENERATOR
(See Note AI

A

.

0 V

I

OUTPUT

V

I+--tw

-.!

CL-30pF

EN

3V

I
I
I 1\,.;.;.;,;.-....;..;;.;.;.-4".+ - - - - -

INPUT
CIRCUIT
UNDER
TEST

r(see Note BI

...-j

I+-tDHL

j4-tDLH

I

GND

I

I
I

-=OUTPUT

TEST CIRCUIT

I

-t" - -

p...;.;';';'--~",",.-

~tyHL

VOL

l+---1li-- tTLH

VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: tr
B. CL includes probe and jig capacitance.

:S

10 ns, tf

:S

10 ns, tw

=

10

~s,

PRR

=

5 kHz, Zo

=

50 II.

FIGURE 1. SWITCHING TIMES FROM DATA INPUTS
INPUT

5V

24V

12V

I4-*- tf
~~-~~-I----3V

PULSE
GENERATOR
(See Note AI

I

INPUT
CIRCUIT
UNDER
TEST

V t-.........-OUTPUT

I
I

CL-30pF

A

I

I+--tw---·~I

r(see Note BI

~tPZL

~tPLZ

--~ I

To 3 V for tpZH and tpHZ
To 0 V for tpZL and tpLZ

I
I

OUTPUT

TEST CIRCUIT

(\..;,1.;;,0%';';"_0 V

I

=12 V

I

I
~-----y.--- --VOL

~tPZH

~tPHZ

:-t -

I

--VOH

I

OUTPUT

~12

V

VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: tr
B. CL includes probe and jig capacitance.

:S

10 ns, tf

:S

·,0 ns, tw

=

10~,

PRR

=

5 kHz. Zo

=

50 II.

FIGURE 2. SWITCHING TIMES FROM ENABLE INPUTS

TEXAS •
INSTRUMENTS
POST OFFICE BOX 865303 • DALLAS. TEXAS 7&265

4-107

SN154410
QUADRUPLE HALF·H DRIVER
APPLICATION INFORMATION
5V

24V

10 kll
CONTROL A

"iJ

13)

EN

I>
"iJ 15)

I>
110)

';1

"iJ 111)
EN

19)
EN
CONTROL B

.;2

I>
"iJ 114)

115)

GND

14.5.12.13)
':'

FIGURE 3. TWO·PHASE MOTOR DRIVER

TEXAS ..,
INSTRUMENTS
4·108

POST OFFICE BOX 655303 • DALLAS, TEXAS 76266

0

MOTOR

8N754411
QUADRUPLE HALF-H DRIVER
02942. NOVEMBER 19S6-REVISED MAY 1990

•

'-A Output Current Capability Per Driver

•

Applications Include Half-H and Full-H
Solenoid Drivers and Motor Drivers

NE PACKAGE
(TOP VIEW)

1.2EN

•

Designed for Positive-Supply Applications

•

Wide Supply Voltage Range:
4.5 V to 36 V

•

TTL· and CMOS-Compatible High-Impedance
Diode-Clamped Inputs

•

Separate Input-Logic Supply

•

Thermal Shutdown

•

Internal ESD Protection

VCCl

lA
lY

4A
4Y

HEATSINK AND. {
GROUND

} HEATSINK AND
GROUND

2Y

3Y

2A
VCC2

3A
<-C=----=:.J-'

3,4EN

FUNCTION TABLE
(EACH DRIVER)
INPUTst

•
•

OUTPUT

Input Hysteresis Improves Noise Immunity

A

EN

y

Three-State Outputs

H

H

H

L

H

L

X

L

Z

•

Minimized Power Dissipation

•

Sink/Source Interlock Circuitry Prevents
Simultaneous Conduction

•

No Output "Glitch" During Power-Up or
Power-Down

•

Improved Functional Replacement for the
SGS L293

H = high·level
L = low·level
X = irrelevant
Z = high·impedance (off)
t In the thermal shutdown
mode, the output is in the
high· impedance
state
regardless of the input levels.

description
The SN754411 is a quadruple high-current half-H driver designed to provide bidirectional drive currents
of up to one ampere at voltages from 4.5 V to 36 V. It is designed to drive inductive loads such as relays,
solenoids, dc and bipolar stepping motors, as well as other high-current/high-voltage loads in positive-supply
applications.
All inputs are compatible with TTL and low-level CMOS logic. Each output (V) is a complete totem-pole
driver with a Darlington transistor sink and a psuedo-Darlington source. Drivers are enabled in pairs with
drivers 1 and 2 enabled by 1 ,2EN and drivers 3 and 4 enabled by 3,4EN. When an enable input is high,
the associated drivers are eriabled and their outputs become active and in phase with their inputs. When
the enable input is low, those drivers are disabled and their outputs are off and in a high-impedance state.
With the proper data inputs, each pair of drivers form a full-H (or bridge) reversible drive suitable for solenoid
or motor applications.
External high-speed output clamp diodes should be used for inductive-transient suppression. A separate
supply voltage (VCC1) is provided for the logic input circuits to minimize device power dissipation. Supply
voltage (VCC2) is used for the output circuits.
The SN754411 is designed for operation from -40°C to 85°C.

PRODUCTION DATA d.cumonts ..ntain inf.rmati.n
current as of publiCltio. data. Praducts .onfarll ta
:r.OCi'icotio•• par the term. 0' TI..I Instruments

n"=~;;"i:I" =;":; :'I~=::£::'- not

Copyright © 1990. Texas Instruments Incorporated

TEXAS ."

INSlRUMENlS
POST OFFICE BOX 865303 • DALLAS. TEXAS 76285

4-109

S,.754411
QUADRUPLE HALF·H DRIVER
logic symbol t

logic diagram
I>

EN
EN

I>
I>

EN
EN
4A /151

I>

Q

/311Y

Q

/61 2y

Q

/111 3y

Q

/141 4y

tThis symbol is in accordance with ANSI/IEEE SId 91-1984 and
lEe Publication 617-12.

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS
---.----~.-------VCC2

Vcc1------~.----

.__------OUTPUT

INPUT

GND--~--~~--------

---4~--~~------GND

TEXAS •
INSTRUMENTS
4-110

POST OFF1CE BOX 665303 • DALLAS. TEXAS 16266

SN154411
QUADRUPLE HALF·H DRIVER

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Logic supply voltage range, VCC1 (see Note 1) ........................... -0.5 V to 36 V
Output supply voltage range, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 36 V
Input voltage ............................................................. 36 V
Output voltage range, Vo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 3 V to VCC2 + 3 V
Peak output current (nonrepetitive, tw :s; 5 ms), IPK ............................... ± 2 A
Continuous output current, 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 1.1 A
Continuous total dissipation at (or below) 25°C free-air temperature (see Note 2) . . . . . .. 2075 mW
Operating free-air temperature range ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 40°C to 85 °C
Operating case or virtual junction temperature range ...................... - 40°C to 1 50°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ...................... 260°C
NOTES:

1. All voltage values are with respect to the network ground terminal.
2. For operation above 25°C free-air temperature, derate linearly at the rate of 16.6 mW/oC. To avoid exceeding the design
maximum virtual junction temperature, these ratings should not be exceeded. Due to variations in individual device electrical
characteristics and thermal resistance, the built-in thermal overload protection may be activated at power levels slightly above

or below the rated dissipation.

recommended operating conditions
MIN
4.5
4.5
2
-0.3 t
-40
-40

Logic supply voltage. VCC1
Output supply voltage, VCC2
High-level input voltage. VIH
Low-level input voltage. VIL
Operating virtual junction temperature. T J
Operating free-air temperature. T A

MAX
5.5
36
5.5
0.8
125
85

UNIT
V
V
V
V
DC
DC

t The algebraic convention. in which the least positive (most negative) limit is designated as minimum. is used in this data sheet for logic
voltage levels.

INSlRUMENTS
TEXAS ""
POST OFFICE BOX 666303 • DALLAS. TEXAS 76286

4-111

SN754411
QUADRUPLE HALF·H DRIVER
electrical characteristics over recommended ranges of VCC1, VCC2, and operating virtual junction
temperature (unless otherwise noted)
TEST CONDITIONS

PARAMETER

VIK
VOH

VOL

Input clamp voltage
High-level output voltage

Low-level output voltage
Off-state (high-impedance state)

II = -12 mA
10H = -0.5 A
10H=-IA
10H=-IA,
10L = 0.5 A
10L - 1 A
10L = 1 A,

= VCC2
=0
= 5.5 V
=0
=0

IIH
IlL

High-level input current
Low-level input current

Vo
Vo
VI
VI

ICC1

Logic supply current

10

ICC2

Output supply current

10 = 0

10Z

output current

All
All
All
All
All
All

MIN

outputs
outputs
outputs
outputs
outputs
outputs

= 25°C

at
at
at
at
at
at

MAX

UNIT

-0.9

-1.5

V

VCC2- 1.5 VCC2- 1.1
VCC2- 2
VCC2- 1.8 VCC2- 1.4
1

TJ = 25°C

TJ

TYpt

1.2

high level
low level
high impedance
high level
low level
high impedance

V
1.4
2
1.8
500
-500
10
-10
38
70
25
33
20
5

V

p.A
p.A
p.A
mA

mA

t All typical values are at VCC1 = 5 V, VCC2 = 24 V, TA = 25°C.

switching characteristics, VCC1 - 5 V, VCC2 - 24 V, TA - 25°C
PARAMETER

tDLH
tDHL
tTLH
tTHL
tpZH
tpZL
tPHZ
tPLZ

TEST CONDITIONS

Deloy time, low-to-high-Ievel output from A input
Delay time, high-to-Iow-Ievel output from A input
Transition time, low-to-high-Ievel output
Transition time, high-to-Iow-Ievel output
Enable time to the high level
Enable time to the low level
Disable time from the high level
Disable time from the low level

CL = .30 pF,

See Figure 1

CL = 30 pF,

See Figure 2

TEXAS .."

4-112

INSTRUMENTS
POST OFACE BOX 865303 • DALLAS. TeXAS 76286

MIN

TYP

800
400
300
300
700
400
900
600

MAX

UNIT

ns
ns
ns
ns
ns
ns
ns
ns

SN754411
QUADRUPLE HALF·H DRIVER
PARAMETER MEASUREMENT INFORMATION
INPUT

5V

24V

~90~%~-3V

VCC1 VCC2

PULSE
GENERATOR
ISee Note Al

A
CIRCUIT
UNDER
TEST

.....-----'!.+ - -- - -0 V
I

I . - - t w - -......
~I

CL-30pF

EN

3V

I

INPUT

OUTPUT

V

Jisee Note BI

-..Ij4- t OLH

_II _

-.r .... tOHL

GND

..,.

I
I

I

TEST CIRCUIT

I

OUTPUT

VOL.TAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: tr '" 10 ns, tf '" 1 0 ns, tw
B. CL includes probe and jig capacitance.

=

10 ~s, PRR

=

=

5 kHz, Zo

50 Il.

FIGURE 1. SWITCHING TIMES FROM DATA INPUTS
5V

INPUT

PULSE
GENERATOR
(S.. Note Al

24V

12 V

VCC1 VCC2
EN

INPUT
CIRCUIT
UNDER
TEST

(\.;1.;,0%';';"_0 V
CL-30pF
J(see Note BI

A

To 3 V for tpZH and tpHZ
To 0 V for tpZL and tPLZ

V ~"'-1II--OUTPUT

..,.

TEST CIRCUIT

OUTPUT

'-----~---

~tPZH
I

~tPHZ

:-+ -

--VOL

--VOH

I

OUTPUT

=12 V
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: tr '" 1 0 ns, tf '" 1 0 ns, tw = 10
B. CL includes probe and jig capacitance.

~,

PRR = 5 kHz, Zo = 50 Il_

FIGURE 2. SWITCHING TIMES FROM ENABLE INPUTS

TEXAS ."

INSTRUMENTS
POST Of ACE BOX 655303 • DALLAS. TEXAS 75266

4-113

8N754411
QUADRUPLE HALF·H DRIVER

APPLICATION INFORMATION
5V

24V

16

10kC

CONTROL A

8 SN754411

VCC11> VCC2

3

2

"11-:------,
I>
6

7

" 11-:----,
I>

10

11

~1

" 1--->---'
EN
EN
CONTROLB

I>

15

14

.>:>--+------1

,,1-----.
GND
(4,5,12,13)

FIGURE 3. TWO·PHASE MOTOR DRIVER

TEXAS ."

4-114

INSTRUMENTS
POST OFFICE BOX 866303 • DALLAS. TEXAS 76285

o

MOTOR

ALL DIODES: 1N4935

TPIC0298
DUAL FULL·H DRIVER
D2942. JUNE 1987-REVISED JANUARY 1990

•

Formerly TLP298

•

2·A Output Current Capability per Full·H
Driver

•

Applications Include Half-H and Full-H
Solenoid Drivers and Motor Drivers

•

Wide Range of Output Supply
Voltage ... 5 V to 46 V

•

Separate Input-Logic Supply Voltage

•

Thermal Shutdown

•

Internal Electrostatic Discharge Protection

•

High Noise Immunity

•

Three-State Outputs

•

Minimized Power Dissipation

•

Sink/Source Interlock Circuitry Prevents
Simultaneous Conduction

•

KV PACKAGE
(TOP VIEW)

~15
"---lr~~~~~~~~~~2E

2Y2

14
13

12 § § 2 Y 1
2A2
11 1
2EN
10
2A1

o

9
8
7
6
5
4

1
I§ § V C CGND
1A2
1EN

1A1
VCC2
1Y2
1Y1
1E

3
2

~
The tab is electrically connected to pin 8.

logic symbol t

Improved Functional Replacement for the
SGS L298

C>

description
The TPIC0298 is a dual high-current full-H driver
designed to provide bidirectional drive currents
of up to two amperes at voltages from 5 V to
46 V. It is designed to drive inductive loads such
as relays, solenoids, dc motors, stepping motors,
and other high-current or high-voltage loads in
positive-supply applications. All inputs are TTL
compatible. Each output (YI is a complete totempole drive with a Darlington transistor sink and
a psuedo-Darlington source. Each full-H driver is
enabled separately. Outputs 1Y1 and 1Y2 are
enabled by 1EN and outputs 2Y1 and 2Y2 are
enabled by 2EN. When an EN input is high, the
associated channels are active. When an EN
input is low, the associated channels are off (Le.,
in the high-impedance state).

2A2 (12)

'i} 1-_---"(1_4..;.)

t This symbol

is 'in accordance with ANSI/IEEE Std 91·1984 and
lEe Publication 617-12.
FUNCTION TABLE
(EACH CHANNEL)
INPUTS

Each half of the device forms a full-H reversible
driver suitable for solenoid or motor applications.
The current in each full-H driver can be
monitored by connecting a resistor between the
sense output terminal 1E and ground and another
resistor between sense output terminal 2E and
ground.

PRODUCTION DATA documonts conloin information
CDnent 8S of publication date. Products conform to
specifications par the terms of TaxIs Instruments

:~~::=i~ai~r:1~78

=::i:r :.r::::::t:~~ not

2Y2

OUTPUT

A

EN

Y

H

H

H

L

H
L

Z

X

L

H = high-level
L = low-level
X = irrelevant
Z = high-impedance (off)

Copyright © 1990, Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TEXAS 75265

4-115

TPIC0298
DUAL FULL-H DRIVER
description (continued)
External high-speed output-clamp diodes should be used for inductive transient suppression. To minimize
device power dissipation, a VCCl supply voltage, separate from VCC2, is provided for the logic inputs.
The TPIC0298 is designed for operation from OOC to 70°C.

logic diagram (positive logic)
lYl

VCC2

lY2

(2)

(4)

(3)

2Yl
(13)

2Y2
(14)

lA 1.:.:(5:.!.)~~kl'-""",
lA2~(7~1~

r-'I)-H~(.;.;12::.:.) 2A2

+-____________-+______________

__

~

(10)2Al

+-__________~

lEN~(6~)__~~____________

(1)

lE

(11) 2EN

1(8)
GND

(15)
2E

absolute maximum ratings over operating temperature range (unless otherwise noted)
Logic supply voltage range, VCC1, (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.3 V to 7 V
Output supply voltage range, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.3 V to 50 V
Input voltage range at A or EN, VI (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.6 V to 7 V
Output voltage range, Vo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 2 V to V CC2 + 2 V
Emitter terminal (lE and 2E) voltage range, VE ........................... -0.5 V to 2.3 V
Emitter terminal (1 E and 2E) voltage (nonrepetitive, tw s 50 I's) . . . . . . . . . . . . . . . . . . . . .. - 1 V
Input current at A or EN, II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 15 mA
Peak output current, 10M, (nonrepetitive, tw S 0.1 ms). . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 3 A
(repetitive, tw S 10 ms, duty cycle s 80%) ............... ±2.5 A
Continuous output current, 10 ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 2 A
Peak combined output current for each full-H driver (see Note 3)
(nonrepetitive, tw s 0.1 ms) ....................... '. . . . . . . . . . . . . . . . . . . . . .. ± 3 A
(repetitive, tw S 10 ms, duty cycle s 80%) ................................ ±2.5 A
Continuous combined output current for each full-H driver (see Note 3) ................. ± 2 A
Continuous dissipation at (or below) 25°C free-air temperature (see Note 4) ........... 3.575 W
Continuous dissipation at (or below) 75°C case temperature (see Note 4) . . . . . . . . . . . . . . .. 25 W
Operating free-air, case, or virtual junction temperature range. . . . . . . . . . . . . . .. -40°C to 150°C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . .. 260°C
NOTES: 1. All voltage values are with respect to the network ground terminal, unless otherwise noted.
2. The maximum current limitation at this terminal generally occurs at a voltage of lower magnitude than the voltage limit, Neither
the maximum current nor the maximum voltage for this terminal should be exceeded.
3. Combined output current applies to each of the two full-H drivers individually. This current is the sum of the currents at outputs
lYl and lY2 for full-H driver 1 and the sum of the currents at outputs 2Y1 and 2Y2 for full-H driver 2. The full-H drivers
may carry the rated combined current simultaneously.
4. For operation above 25°C free-air temperature, derate linearly at the rate of 28.6 mW/oC. For operation above 75°C case
temperature, derate linearly at the rate of 333 mW/oC. Due to variations in individual device electrical characteristics and
thermal resistance, the built-in thermal overload protection may be activated at power levels slightly above or below the rated
dissipation.

TEXAS .."

4-116

INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS, TEXAS 15265

TPIC029a
DUAL FULL-H DRIVER
recommended operating conditions
Logic supply voltage, VCC1
Output supply voltage, VCC2

MIN

MAX

4.5

7

V

5

46

V

-0.5 t

2

Emitter terminal (1 E or 2EI voltage, VE (see Note 51

VCC1- 3.5
Vee2- 4
A

High-level input voltage, VIH (see Nole 51
EN

2.3
2.3

VCC1
VeC2-2.5
7

UNIT

V

V

Vee1
-0.3 t

Low-level input voltage at A or EN, VIL

1.5

V

Output current, 10

±2

A

Commutation frequency, fc

40

kHz
·C

Operating free-air temperature, T A

0

70

t The algebraic convention, in which the least positive (most negative) designated minimum, is used in this data sheet for emitter terminal
voltage and logic voltage levels.
NOTE 5: For optimum device performance, the maximum recommended voltage at any A input is 2.5 V lower than VCC2. the maximum
recommended voltage at any EN input is VCC1, and the maximum recommended voltage at any emitter terminal is 3.5 V lower

than V CC 1 and 4 V lower than V CC2.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

4-117

TPIC0298
DUAL FULL·H DRIVER
25 DC (unless

electrical characteristics over recommended ranges of VCC1, VCC2, and VE, T J
otherwise noted)
PARAMETER
VIK
VOH
VOL
Vdrop

MIN

TEST CONDITIONS
11= -12 mA

Input clamp voltage

UNIT

-1.5

V

VCC2-1.8 VCC2- 1.2

10H = -2 A

VCC2-2.8 VCC2-1.8
VE+l.2

10l = 1 A

Low-level output voltage

MAX

-0.9

-1 A

10H -

High-level output voltage

TYpt

10l = 2 A

Total source plus sink

10H = -1 A-

output voltage drop

10H = -2 A,

10l = 1 AI See Note 6
10l = 2 AI

V
VE+1.8
VE+2.6

VE+l.7
2.4

3.4

3.5

5.2

V
V

Off-state (high-impedance state)
10ZH

output current, high-level

=

Vo

VCC2

500

~A

-500

~A

voltage applied
Off-state (high-impedance state)
10Zl

output current, low-level

Vo = 0 V,

VE = 0 V

voltage applied
IIH
III
ICCl

High-level input current

II

A
EN

Low-level input current

logic supply current

VI

=

I EN = H

VIH

20

100

6

100

10

I EN = l

VI - VIH :S VCC1-0.6 V
VI = 0 V to 1.5 V
10

=

0

-10

All outputs at high level

7

12

All outputs at low level

20

32

4

6

All outputs at high impedance
ICC2

Output supply current

10

=0

All outputs at high level

25

50

All outputs at low level

6

20

All outputs at high impedance

~A
~A

mA

mA

2

t All typical values are at VCCl = 5 V, VCC2 = 42 V, VE = 0 V, T J = 25°C (unless otherwise noted).
NOTE 6: The V drop specification applies for 10H and 10l applied simultaneously to different output channels.
Vdrop = VCC2 - VOH + VOL - VE·

switching characteristics, VCC1

=

5 V, VCC2

PARAMETER

42V,VE

= Q,TA

TEST CONDITIONS

= 25°C
MIN

TYP

MAX

UNIT

tdlon)

Source current turn-on delay time from A input

0.6

~s

tdloffl
tr

Source current turn-off delay time from A input

0.8

~

tf

Source current rise time (turning on)
Source current fall time (turning off)

td(on)

Source current turn-on delay time from EN input

0.5

p.s

td(off)

Source current turn-off delay time from EN input

2.5

~s

tdlonl
td(off)

Sink current turn-on delay time from A input

1.3

~s

Sink current turn-off delay time from A input

0.5

~s

tr

Sink current rise time (turning on)

CL = 30 pF.

0.2

~s

tf

Sink current fall time (turning off)

See Figure 2

0.2

~s

td(on)

Sink current turn-on delay time from EN input

0.3

~

idloffl

Sink current turn-off delay time from EN input

1

~s

CL = 30 pF.

0.8

~s

See Figure 1

0.2

~

TEXAS •

INSTRUMENTS
4-118

POST OFFICE' BOX 66'5303 • DALLAS. TEXAS 7&286

TPIC0298

DUAL FULL·H DRIVER
PARAMETER MEASUREMENT INFORMATION
5 V

42 V

CIRCUIT
UNDER
TEST
4V

~
y 1--4I~--"':":'~""'-OUTPUT

CL-30pF
(See Note C)

(See Note B)L...;;~_ _ _";;-""

TEST CIRCUIT
~'" 10ns

~'" 10ns

, ':r-------"'\!,- -1-I -

'90%

90%

I

INPUT VOLTAGE
WAVEFORM
(See Note B)

- - - -

4 V

I

I
I

1
,

I

I

10%

10%

"------0 V
~----20ps---~~

,

,I4-

i

I

1

i'

I*-td(on)

OUTPUT CURRENT
WAVEFORM

I
I
I

,1""---

IOL = 0 A

I

90%
90%
I
I"',.;..;.;.;......--......;;.;..;..;;""I--I----IOH ~ -2A

~ tr

i+--+I-- tf

I'

' - - I I - - - - VOH

I
,
I
I

OUTPUT VOLTAGE
WAVEFORM

I

t d(oif)

,
90%

90%

~

40V

I
I
I

1
10%
- - - - V O L = OV

10%
VOLTAGE AND CURRENT WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: PRR ~ 2 kHz, Zo = 50 O.
B. EN is at 4 V if A is used as the switching input. A is at 4 V if EN is the switching input.
C. CL includes probe and jig capacitance.

FIGURE 1. SOURCE CURRENT SWITCHING TIMES FROM DATA AND ENABLE INPUTS

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 666303 • DALLAS. TEXAS 75265

4·119

TPIC0298
DUAL FULL·H DRIVER
PARAMETER MEASUREMENT INFORMATION
5V

42 V

1-_. .A~/=EN:.:.j VCCl
4V[EN)

VCC2
CIRCUIT
UNDER
TEST

EN/A

yI-4.--....Cl-30pF
(See Note Cl

OV[A)

TEST CIRCUIT

~'" 10ns

~s 10ns
I

1

90%

I

INPUT VOLTAGE
WAVEFORM
AT A
(See Note Bl

I

1
1 I

I

1

1

11_.,....._ __

I
1
I

.1'90%

I
10%

10%

I

"-...;...---..;..;~·-I-

~"'10ns

- --- -

OV

~"'10ns

I
I I .,...-----9-0-%~1-:-190%
I I
1 I
I
I

INPUT VOLTAGE
WAVEFORM
AT EN
(See Note Bl

4 V

1

-

-

-

-

4 V

I

10%

20,.8

1\,;.;10;,;%.;..._ _ _ 0 V

1fI
90%

IOl

90%

~

2A

I
I

OUTPUT CURRENT
WAVEFORM

I

10%

I

,,1:.::0~%:...._ IOH ~ 0 A

I

~tr
_ _ _ _~I
II

I
It---*-tf
VOH

~

42 V

'\,.;.;10;,;%.;;.... _ _ _~1.::.0%:::.t' _ _ _ _ _ _ VOL

~

2 V

1"...-90%

90%

I

I
I

OUTPUT VOLTAGE
WAVEFORM

VOLTAGE AND CURRENT WAVEFORMS
NQTES: A. The pulse generator has the following characteristics: PRR = 2 kHz, Zo = 50 D.
B. EN is at 4 V if A is used as the switching input. A is at 0 V if EN is the switching input.
C. Cl includes probe and jig capacitance.

FIGURE 2. SINK CI,JRRENT SWITCHING TIMES FROM DATA AND ENABLE INPUTS

.

4-120

T~'"

INSTRUMENTS
POST OFFICE

eox 655303 • DALLAS. TEXAS 75265

TPIC0298
DUAL FULL·H DRIVER
TYPICAL APPLICATION DATA
This circuit shows one half 'of a TPIC0298 used to provide full-H bridge drive for a 24-V 2-A dc motor. Speed
control is achieved with a TLC555 timer. This provides variable duty cycle pulses to the EN input of the TPIC0298.
In this configuration, the operating frequency is approximately 1.2 kHz. The duty cycle is adjustable from 10%
to 90% to provide a wide range of motor speeds. The motor direction is determined by the logic level at the
direction control input. The circuit may be enabled or disabled by the logic level at the EN input. A 5-V supply
for the logic and timer circuit is provided by a TL431 short regulator. For circuit operation, refer to the function
table.
FUNCTION TABLE
DIRECTION

ENABLE

X = don't care

lY2

lYl

CONTROL

H
H

H
L

source

sink

sink

source

X

disabled

disabled

H = high level

L = low level

1~

SPEEO
CONTROL

~on

10 kO

2.7
kO

kO

2.7 kO

1/2
TPIC0298
1Y1

OIRECTION
CONTROL

1Y2

1A1
2.7 k O . - - + - - - - - I VCC1
~--~--~~---+~~

ENABLE
2.7 kO

to;ade. are 1 N4934 or equivalent.

FIGURE 3. TPIC0298 AS BIDIRECTIONAL DC MOTOR DRIVER

TEXAS •

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 76265

4-121

4-122

TPIC2404
INTELLIGENT-POWER QUAD LOW-SIDE SWITCH
03299. AUGUST 1989 - REVISED NOVEMBER 1

KN SINGLE-iN-LINE PACKAGE

• 1-A Current Capability Per Channel

ITOPViEW)

• 45-V Inductive Switching Voltage Capability
• Current Sink Inputs Compatible with TTL or
CMOS Devices

o

• Output Clamp Diodes for Inductive
Transient Protection
• Independent Thermal Shutdown Protection

o

• Overvoltage Shutdown Protection
• Independent Channel Current Limit
• Error Sensing
• Extended Temperature Range of -40'C to
125'C

o

description
The TPIC2404 is a monolithic high-voltage highcurrent quadruple low-side switch especially
designed for driving from low-level logic to
peripheral loads such as relays, solenoids,
motors, lamps, and other high-voltage highcurrent loads. The high-efficiency power switch is
optimized for applications where a very rugged
power switch is required. The device will tolerate
power supply transients and reverse battery
conditions up to 13 V.

15
14
13
12
11
10
9
8
7
6
5
4
3
2

GND
4A
4Y
3,4 CLAMP
3Y
3A
ENABLE
GND
VCC
2A
2Y
1,2CLAMP
1Y
1A
FAULT

The tab is electrically connected to the GND pins.

The TPIC2404 features four inverting open-collector outputs controlled by a common-enable input. When
ENABLE is low, the outputs are disabled. An error senSing circuit monitors load and device faults. When an
error is sensed, the FAULT output goes to a low state. In addition, the device features on-board VCC
overvoltage and thermal overload protection Circuits, and the outputs are current-limit protected.
FUNCTION TABLE

Normal operation
Open load
Short to GND
Overvoltage shutdown
Thermal shutdown
Short to

Vee

ENABLE

A

Y

H
H
L

H
L

X

L
H
H

H

L

L

L

H

X

H

L

H

H

H

L

PRODUCTION DATA documenls contain information

current as of publication data. Products conform to

spacifications per the terms of Texas Instruments

::!~:~~i~a{::,~~~ ~:~:~ti:r fI~O::;:::::t:~S not

TEXAS

~

FAULT
-~

H
H

Copyright © 1989, Texas Instruments Incorporated

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 'Z5265

4-123

TPIC2404
INTELLIGENT-POWER QUAD LOW-SIDE SWITCH
logic symbolt
OVERVOLTAGE.
SHUTDOWN

ENABLE

&

EN
OVERTEMPERATURE
SHUTDOWN

1A

~A~

1Y

________________________~

2Y
2A
1.2 CLAMP

3Y
3A

4Y
4A

3.4 CLAMP

t This symbol is in accordance w~h ANSI/IEEE Std 91-1984 and lEe
Publication 617-12.

logic diagram (positive logic)

ENABLE

.:'~o--...J

'A 2
OVERTEMPERATURE
SHUTDOWN

OVERTEMPERATURE
SHUTDOWN

OVERTEMPEAATUR£
SHUTDOWN

OVERTEMPERATURE
SHUTDOWN

TEXAS •

INSTRUMENTS
4-124

POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

TPIC2404
INTELLIGENT-POWER QUAD LOW-SIDE SWITCH
schematics of inputs and outputs
EQUIVALENT OF EACH A INPUT

Vee

EQUIVALENT OF EACH Y OUTPUT

Vee

----------~

CLAMP

.-_~

INPUT

OUTPUT

----....----1
__----~~-- GND

INPUT -~.---~~-

EQUIVALENT OF ENABLE INPUT

Vee

----------~-

GND

--~------~-

EQUIVALENT OF FAULT OUTPUT

TEXAS . "

INSlRUMENlS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

4-125

TPIC2404
INTELLIGENT-POWER QUAD LOW-SIDE SWITCH
absolute maximum ratings over operating temperature range (unless otherwise noted)
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -13 V to 24 V
Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6 V to 7 V
Output voltage range, Vo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6 V to 45 V
Output sustaining voltage, VO(sust) ......•.................... ; . . . . . . . . . . . . . . . . . . . 45 V
Continuous output sink current (repetitive, tw < 8 ms), IOL (see Note 2) ................ , , .. , 1.5 A
Output clamp-diode voltage, VOK ." ... , . , . , " " , .. , ' , . , . , ' , . " ... , ... " . , . , ... ,' 45 V
Continuous total dissipation at (or below) 25°C case temperature (see Note 3) , , .. , ... , ... , , .. , 50 W
Operating case or virtual junction temperature range , .... , ........ , ... ,....... -55°C to 150·C
Storage temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -65·C to 150·C
Lead temperature 1,6 mm (1/16 inch) from case for 10 s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 260·C
NOTES: 1. All voltage values are w~h respect to the network ground terminal.
2. Output sink current is IimHed by the overcurrent IimH.
3. For operation above 25°C free-air or case temperature refer to Figures 1 and 2. To avoid exceeding the design maximum virtual
iunction temperature, these ratings should not be exceeded. Due to variations in individual device electrical characteristics and
thermal resistance, the built-in thermal overload protection may be activated at power levels slightly above or below ratad
disSipation.

FREE-AIR TEMPERATURE
DISSIPATION DERATING CURVE

CASE TEMPERATURE
DISSIPATION DERATING CURVE

3.0
~

c

..

~

.
i5

R8JA = 50°C/W I

2.0

II>

::l

0

::l

1.5

c

'+1

c
0

..

0

1.0

iii
0

l-

50

2.5

t:I.

'iii

60

Derating factor = 20 mW/oC

""""

0.5

C

t:I.

o

25

50

c
o

""""

'+1

~

40

.

30

':
i5

::l

o

""I""

75

100

::l
C
.~

o

20

o

~

""

125

150

10 Derating factor - 0.4 W/·C
RSJC - 2.5·C/W
TJ - 150·C

o

o

25

T A - Free-Air Temperature - °c
FIGURE 1

50

75

I~

100

FIGURE 2

TEXAS ."

POST OFFICE BOX 6,55303 • DALLAS, TEXAS 75285

""

125

TC - Case Temperature - °c

INSTRUMENTS
4-126

~

150

TPIC2404
INTELLIGENT-POWER QUAD LOW-SIDE SWITCH
recommended operating conditions
MIN

NOM

MAX

Supply voltage, VCC

9

12

16

V

High-level input voltage, VIH

2

5.5

V

-0.3t

O.B

V

45

V

Low-level input voltage, VIL
Peak output vo~age from external inductive kickback
Continuous output sink current

1

Fault output sink current
Operating free-air temperature, TA

..

-40

UNIT

A

75

I1A

125

·C

t The algebraic convention In which the least pOSitive (most negative) value IS designated minimum IS used In thiS data sheet for logic voltage
levels.

electrical characteristics over recommended ranges of operating free-air temperature and
supply voltages (unless otherwise noted)
TVP:!:

MAX

Vo = 12 V, ENABLE low

15

100

I1A

0.6

2

rnA

I1A
I1A

PARAMETER

TEST CONDITIONS

MIN

IO(off)

Off-state output current

Vo = 45 V, ENABLE high
Vo = 12 V, ENABLE high

200

400

600

IlL

Low-level input current

VI=OtoO.8V

-10

25

40

IIH

High-level input current

10

IA inputs
I ENABLE

25

60

j.JA

0.2

1

rnA

IOL = 100 rnA

0.1

0.15

IOL= 500 rnA

0.3

0.55

IOL= 1 A

O.B

1.3

VOL

Low-level output voltage

IOL

LOW-level output current

!=AlJ['f output, VOL = 1 V to 5.5 V

IR(K)

Clamp diode reverse current

Vr = 50 V, Vo = 0

VF(K)

Clamp diode forward voltage

ICC

Supply current

FAULT output, IOL = 30 jlA
50

UNIT

0.2

0.4

90

125
100
2

If= 1 A
If = 1.5 A

2.5

Outputs off, ENABLE low

0.25

Outputs on, TA = -40·C

120

Outputs on, TA = 25· C to 125·C

100

V

I1A
I1A
V

rnA

operating characteristics over recommended operating free-air temperature and supply voltages
(unless otherwise noted)
PARAMETER

TEST CONDITIONS

MIN

TVP:!:

High-level output sense voltage threshold

7

Low-level output sense voltage threshold

3
TA = -40"e
TA - 25·e to 125·e

Overcurrent limiting

1.2
0.25
155

Turn-on time
Turn-off time

UNIT
V
V

25.5

Vee Overvoltage shutdown
Overvoltages shutdown hysteresis
Vhvs
Thermal shutdown
Thermal shutdown hysteresis

:I: All typICal values are at Vee

MAX

1.85
1.5
31

A
V

15

V
·e
·e

8
8

jls
jls

= 12 V, TA = 25 ·e.

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TeXAS 75265

4-127

4-128

TPIC2406
INTELUGENT·POWER QUAD MOSFET LATCH
NEPACKAGE
(TOP VIEW)

• Output Voltage up to 60 V
• 4 Output Channels of 700-rnA Nominal

Current Per Channel

1,4 CLAMP
ENBL
11N
1 DRAIN

• Pulsed Current 3 A Per Channel
• Low rOS(on) ••• 0.5 g Typ

HEATSINK{
ANDGND
2 DRAIN
21N

• Avalanche Energy ••• 50 mJ
• Thermal Shutdown Protection with Fault
(Overtemperature) Output

ern
} HEATSINK
ANDGND
3 DRAIN
31N

7

VDD

Vee
F

• NE Package Designed for Heat Sinking

LGND
41N
4 DRAIN

3

11

2,3 CLAMP

• Integral Output Clamp Diodes
• Input Transparent Latches for Data Storage
• Asynchronous Clear to Turn Off All Outputs
• Output Parallel Capability for Increased
Current Drive up to 12-A Total Pulsed Load
Current

description

FUNCTION
NORMAL
OPERATION

FUNCTION TABLE
(each channel
INPUTS
OUTPUT
y
ENBL CLR IN

FAULT

F

X
L
L

L
H
H

X
L
H

H
L

H
H
H

H

H

X

Qo

H

H

L

THERMAL
X
X
X
SHUTDOWN
H = hIgh-level. L = low-level, X = Irrelevant

H

The TPIC2406 is a monolithic, high-voltage,
high-current, quadruple power driver designed for
use in systems that require high load power. The
device contains built-in high-speed output clamp diodes for inductive transient protection. Power driver
applications include lamps, relays, solenoids, and dc stepping motors.
Each device features four inverting open-drain outputs each controlled by an input storage latch with common
clear and enable controls. All inputs accept standard TTL- and CMOS· logic levels. The CLR function is
asynchronous and turns all four outputs off regardless of data inputs. Taking ENBL low puts the input latch into
a transparent mode, allowing the data inputs to affectthe output. In this state, ali four outputs will be held off while
CLR is low, but will return to the stages on the data inputs when CLR goes high. When EfiiB[ is taken high, ,the
latch is put into a storage mode and the last state of the data inputs is held In the latches. Ifthe CLR input is taken
low, the data in the latches is cleared, turning all outputs off. ,If CLR is taken high again, ENBL must be cycled
low to read new data into the latch.

PRODUCTION DATAdocumenta contain Information
current .. of publication date. Products conform to
epeclDcations par the terme of Texae Instruments

='=~rl;::ru':='~:'g,"af.':::':==:~ not

.Jf
INSlRUMENtS

COpyrighllC> 1990. Texas Instruments Incorporated

TEXAS

POST OFFICE BOX 85S303 • DALLAS. TEXAS 75286

4-129

TPIC2406
INTELLIGENT-POWER QUAD MOSFET LATCH
logic symbol t
20
2

... R

.,

liN

41N

3

10

[TEMP

..... Cl SHUTDOWN)

I"

4

I>
10

18

CLAMP

tl

1

17
1
7

21N

31N

8

tl

13

1

t This symbol is in accordance with ANSI/IEEE Std 91-1984

14
11

1 DRAIN

4 DRAIN
1,4 CLAMP
2 DRAIN

3 DRAIN
2,3 CLAMP

and lEe Publication 617-12.

logic diagram (positive logic)
VDD _1_2_--1

9

Vcc-~H

4

1 DRAIN

1,4 CLAMP
CLR

7

ENBL
liN
21N
31N

11
3
14

8

2,3 CLAMP
3 DRAIN

13
17

41N
19

5,6,15,18

LGND

10

TEXAS -If

4-130

2 DRAIN

INSIRUMENTS

POST OFFICE aox 65S303 • OALLAs. TEXAS 75265

4 DRAIN

GND

F

TPIC2406
INTELLIGENT-POWER QUAD MOSFET LATCH
schematics of Inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL DRAIN OUTPUTS

V C C - - - -.....

CLAMP

. - -.....- - - - DRAIN

INPUT

GND

---- VX r--.....

ir-- N = 3 - f - -

.~

........

-

N=1

..........
~ K r-....
I ' r::.-.... I"..... ..........
r- ..::: ::::-- I--

I

1:

2

:s
u

~

1.75

c

1.50

0

1.25

'i!

\\\

"\

\\I'
\l\,.

0.75

0.25

0.25
20

30

40 50 60 70
d - Duty Cycle - %

80

90 100

o

10

3

c(

I

1:

~
:s
u

1.75

\\ ,\

20

30

l'!

1.25

.e

vs

DUTY CYCLE

PULSE DURATION

I

, "'

\\ "
\\. 'v< /"0. V

\\\

I

I

~

"- ~

-......: ~

0.75

I

I

I I
I

N= 2
N= 3 -

'" -..... -

0
I
_0

40 50 60 70
d - Duty Cycle - %

SO

90 100

MAXIMUM DRAIN CURRENT

100

-

TA =25 °c
N = Number of Outputs
Conducting Simultaneously See Note 8
-'

\\\ \.

1.50

V

I'-....

vs
I

1\\\\

2

N=2

f- N= 3

FIGURE 6

MAXIMUM DRAIN CURRENT

2.25

./ -

o
10

FIGURES

2.50

~M

N=4
0.50

2.75

"'

" ........ ~
><
I' :::...... r-.... ... ~

'"

I

_0

N=4

o

\\\ r\.

2.25

0.50

o

TA=50°C
N = Number of Outputs
Conducting Simultaneously
See Note 8

2.75

c(

\\."\

1.75
1.50

DUTY CYCLE

\\ \ "\
'\\ \ "-

2.25

.~

vs

DUTY CYCLE

\\ !\ \
\\\ \

2.75

c(

vs

--

...........

N=1

........

-+--

70

TA=25°C
Nonrepetltlve Pulse Operation

40
c(

I

20

1:
~

-:

:s

10

e

7

(,)

li!
0

I

_0

4

N=4

0.50

2

0.25
0

o

10

20

30

40 50 60 70
d - Duty Cycle - %

80

90 100

1
0.1

0.4

1

10

40 100
me

4001000

FIGURES

FIGURE 7
NOTE 8: For Figures 5, 6, and 7, d

4

tw _ Pulse Duration -

=i;;' =lotcms

. Where tw and tc are defined by the following:

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

4-137

TPIC2406
INTELLIGENT-POWER QUAD MOSFET LATCH
MAXIMUM RATINGS
MAXIMUM CONTINUOUS
DRAIN CURRENT
FREE·AIR TEMPERATURE
DISSIPATION DERATING CURVE

vs
FREE·AIR TEMPERATURE

1.4
1.3
1.2
1.1

«I

N=1 _

~

3c

.j!
0
I

_0

N=2

c

.

i
.:

...... ....... I"-

N=3

-

N=4

--

"-

I'..
~r-...
!'....... ~

"

'\.

1.5

1l

-.........: ~ 1\

8

iii

~

~,

I
0

~~
~

,

o

~

2

is
VI
::s
0
::s
c

~ ~\.

20

2.5

I

0.1

o

~

..........

0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2

1:
~

3

IN = N~mber ~f Out~uts I
_
Conducting Simultaneously _

-

40
60
60 100 120 140
TA - Free-Air Temperature - ·C

0.5

IL

o

160

o

IDeratln~ factor ~ 20 mw,lc
RaJA = SO·C/W

'"'"
'"

25

The single-pulse curve In Figure 11 represents
measured data. The curves for various pulse
durations are based on the following equation:

va
ON TIME
100
d=50%

::

d~I~O,J,

ZsJA

I

....8-c

10

+

~

d=10%

.!ii

.
~

~

1:

~c

.

~

~

P"

~

N

0.1
0.001

= the single-pulse thermal impedance

for t =

to seconds

for t = tw + to seconds

d =
100

1000

FIGURE 11

TEXAS

4-138

Zs(I,v) - Zs(lcl

Zs(lw + Ie)

JIIIIUlillilllt
0.1
10
t-OnTlme-e

Zs(I,v+IC>

Zs(tc>

~

-::;'Ingl~ ~~~se
0.01

~JA + 1 1 - ~ 1

= the single-pulse thermal impedance
for t = tw seconds
= the single-pulse thermal impedance

Zs(I,v)

rmrrllill

~

1

Where:

d=5%

iii

=1 ~

~

1111111

150

FIGURE 10

TRANSIENT THERMAL IMPEDANCE

~

~

50
75
100
125
TA - Free-Air Temperature - ·C

FIGURE 9

P

I~

.Jf

INSlRUMENlS

POST OFFICE BOX 655303 • OALLAS. TEXAS 75265

tw!tc

TPIC2406
INTELLIGENT·POWER QUAD MOSFET LATCH
TYPICAL CHARACTERISTICS
STATIC DRAIN·SOURCE
ON·RESISTANCE

STATIC DRAIN·SOURCE
ON·RESISTANCE

vs

vs

POWER MOSFET DRIVER SUPPLY VOLTAGE

DRAIN CURRENT
0.9

JSeeOONoteS
='20J

"--

0.8

....... ....... ""

1.2 -

~

1.1

~

o
~

0.6

-.......

TC= 2S'C
0.5

TI

0.4

"

0.6

I

0.7

0.5

0.3

1.5

2.5

2

3

~

10= SOOmA
See NoteS

'"'~

r-....

~

-

TC= 125'C

'\.I '

TC= 2S'C

i'-~

C' 0.4
,g,

III

0.5

~

!

TC= -'lO'C

0.9
0.8

~

I

~C

§

::

0.7

I

1.3

I

TC = 125 'c

!

a

TC= -'lO'C

0.3
8

12

16

20

24

28

VOO - Power MOSFET Driver Supply Voltage - V

10 - Drain Current-A

FIGURE 13

FIGURE 12
NOTE 5: Technique should limitTj - TC to 10'C maximum.

TEXAS -If

INSIRUMENTS
POST OFFICE BOX Il5S303 • DALlAS. TEXAS 75265

4-139

4-140

TPIC2801
OCTAL INTELLIGENT-POWER SWITCH
WITH SERIAL INPUT

03282. AUGUST 1989 - REVISED JUNE 1990

• 8-Blt Serial-In Parallel-Out Driver

KV PLASTIC PACKAGE
(TOP VIEW)

• 1-A Output Current Capability per Channel
or 8-A Total Current

~15

+
~

• Over-Current Limiting and Out-of-Saturatlon
Voltage Protection on Driver Outputs
• Contains Eight Open-Collector Saturating
Sink Outputs with Low On-State Voltage

Y5

13

Y6

12

Y7

11

RST

10

VCC
SO
GND

9

• High-Impedance Inputs with tlysteresls are
Compatible with TTL or CMOS Levels

8
7
6
5

• Very Low Standby Power ••• 20 mW "TYpical
• Status of Output Drivers May Be Monitored
at Serial Output

51
SCLK
SlOE

YO
Yl
Y2

• 3-State Serial Output Permits Serial
Cascading or Wire-AND Device Connections
• 2S-V Transient Clamping with Inductive
Switching on Outputs, 40-mJ Rating per
Driver Output

Y4

14

~1

Y3

The tab is electrically connected to pin 8.

description

The TPIC2801 is a monolithic BIDFETt integrated circuit that is designed to sink currents up to 1 A at 30 V
simultaneously at each of eight driver outputs under serial input data control. Status of the individual driver
outputs is available in serial data format. The driver outputs have overcurrent limiting and out-of-saturation
voltage protection features. Applications include driving solenoids, relays, dc motors, lamps, and other
medium-current or high-voltage loads.
The device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit parallel latch, which
independently controls each of the eight V-output drivers.
Data is entered into the device serially via the serial input (51) and goes directly into the lowest bit (0) of the shift
register. USing proper timing signals, the input data is passed to the corresponding output latch and output driver.
A logic high bit at Sin turns the corresponding output driver (Yn) off. A logic low bit at 51 turns the corresponding
output driver on. Serial data is transferred into 51 on the high-to-Iow transition of serial clock (SCll<) input in 8-bit
bytes with data for V7 output (MSB) first and data for VO output (lSB) last. Both 51 and SClK are active when
serial input-output enable (SlOE) input is low and are disabled when SlOE is high.
Each driver output is monitored by a voltage comparator that compares the V-output voltage level with an internal
out-of-saturation threshold voltage reference level. The logic state ofthe comparator output is dependent upon
whether the V output is greater or smaller than the reference voltage level. An activated driver output will be
unlatched and turned off when the output voltage exceeds the out-of-saturation threshold voltage level except
when the internal unlatch enable is low and disabled. The high-to-Iow transition of SlOE transfers the logic state
of the comparator output to the shift register.

t BI DFET - Bipol~rdouble-dlffused. N-channel and P-channel MOS transistors on same chip - patented process.
PRODUCTION DATA documents ..nt.in in"',mation
c.,renl .s of publication data. ProduclS .on"',m to
.pacifications pa' Ih. tarms T.... InstrumanlS
::=~ri~·i:I':.'1.i =~~~I:: :.r:::::.?t:~ not

0'

..

TEXAS ~

INSIRUMENTS
POST OFFICE BOX 856303 • DALLAS. TEXAS 75265

Copyright © 1990, Texas Instruments Incorporated

4-141

TPIC2801
OCTAL INTELLIGENT-POWER SWITCH
WITH SERIAL INPUT
logic symbolt

C5

5CLK

8,10
10,20
11,20

17,20

6
10

40

6
11

40

6

40

17
6

55
3D

55

55

(I.S VI

11.S VI

(I.SVI

tThis symbol is in accordance with ANSI/IEEE Std. 91-1984 and lEe Publication 617-12.

. TEXAS""

4-142

INSTRUMENTS
'p.Q$T OFFICE BOX 655303 • DALLAS, TeXAS 76265

TPIC2801
OCTAL INTELLIGENT-POWER SWITCH
WITH SERIAL INPUT
logic diagram (positive logic)

~
S

..--/

V
'--- s

SRG8
~s

SClK

6

~

., C2

7
SI

~~

C1l-

=:J)- f - - rV-

CS

R

r

.,

10

40

20

~SS

20

V-V--

~

I--

~

r-

V--

~

V-

v------

4

~

3

V--

YO
Yl

2
Y2

1

r-

~

r--

LIMIT

I--

~

V--

CURR

r

Y3

-

15

-

14

-

13

-

12

Y4

YS

Y8

Y7

8
8

8

3D

8~
...,..

l

8f

r-.

;:a'V

8

-J,
9

GNO

so

C3

TEXAS ~

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXA!i 75265

4-143

TPIC2801
OOTAL INTELUG.ENT-POWER SWITCH
WITH SERIAL INPUT
PIN
NAME
NO.

1/0

GND

8

RST

11

I

SCLK

6

I

51

7

I

SlOE

5

I

SO

9

0

VCC
YO
Y1
Y2
Y3
Y4

10
4
3
2
1
15
14
13
12

Y5
Y6
Y7

0

DESCRIPTION
Ground. Common return for entire chip. The current out of this pin is potentially as high as 4 A if all outputs are
on. This ground Is used for both logic and power circuits
Reset. An asynchronous reset is provided for the shift register and the parallel latches. This pin is active when
low and has no Internal pull/up. When active, ncauses the power outputs to tum off. A power·on clear can be
implemented using an RC network to VCC.
Serial Clock. This pin clocks the shift register. The serial output (SO) will change state on the rising edge of this
clock and serial Input (SI) data will be accepted on the falling edge.
Serial Input. This pin is the serial ~ata input. A high on this pin will program a particular output to be off and a low
will tum it on.
Serial Input-Output Enable. Data is transferred from the shift registers to the power outputs on the rising edge of
this signal. The falling edge of this signal parallel loads the output vottage sense bits from the power output stages
into the shift register. The output driver forthe serial output (SO) pin is enabled when this pin is low, provided RST
is high.
Serial Output. This pin is the serial 3·state output from the shift register and is in a high· impedance state when
SlOE is high or RST is low. A high for a data bit on this pin indicates that the corresponding power output (Yn)
Is high. This CQuid mean that the output was programmed to be off the last time a byte was input to the device
or that the output fauHed and was latched off by the output vottege sense indicator..A low on this pin for a data
bit indicates that the corresponding power output (Yn) is low (an ·on" output stage or open·circuH condmon).
S·V supply voltage

Power Outputs. The outputs are provided with current limiting and voltage sense for fault indication and
protection. The nominal load current for these outputs is 500 mA, but the current limiting is set to a minimum of
1.2 A. The actlve·low outputs also have voltage clamps set at about 35 V for recirculation of inductive load current.
Internal 90·k.C pull·down resistors are provided at each output. These resistors hold the output low during an open·
circuit condHlon.

PRINCIPLES OF OPERATION
timing data transfer
Figure 1 shows the overall B·bit data·byte transfer to and from the TPIC2B01 interface bus. The logic state of
the eight output drivers, YO through Y7, is latched into the shift register at time to on the high·to·low transition
of SlOE. Therefore, the SO output data (OYO, OY1 ...) represents the conditions atthe Y·driver outputs at time
to. The data at SO output is updated on the 10W·to·high transition of SClK.
Input data present at the SI input is clocked into the shift register on the high·to·low transition of SClK. As
shown in Figure 1 on the SI input, input data 017 is clocked in at time t1, 016 Is clocked in at time t2, etc. Eight
SClK pulses are used to serially load the eight bits of new data Into the device. After all the new data is serially
loaded, the low·to·high transition of SlOE parallel loads the new data to the eight driver output latches, which
in turn directly control the eight V-driver outputs.
An unlimited amount of data can be shifted through the shift register (into the SI and out the SO) and this
allows other devices to be cascaded in a daisy chain with the TPIC2B01. Once the last data bit has been
shifted into the TPIC2801 , the SlOE input should be pulled high. The clock (SCll<) input should be low at both
transitions of the SlOE input to avoid any false clocking of the shift register. The SClK input is gated by the
SlOE input, so the SClK input is ignored whenever the SlOE is high. At the rising edge of the SlOE input, the
shift register data is latched .into the parallel latch and the output stages will be actuated by the new data. An
internal 100-f..Is delay timer is also sta.rted on this rising edge. During the time delay, the outputs will be
protected only by the analog current-limiting circuits, since the resetting of the parallel latches by fault
conditions will be inhibited during this time period. This allows the device to overcome any high switching
currents that can flow during turn-on. Once the delay has ended, the output voltages are sensed by the
comparators and any output voltages higher than nominally 1.8 V are latched off.

TEXAS ."

INSTRUMENTS
4-144

POST OFRCE BOX 865303 • DALLAS. TEXAS 76266

TPIC2801
OCTAL INTELLIGENT·POWER SWITCH
WITH SERIAL INPUT
PRINCIPLES OF OPERATION

fault-conditions check
Open-circuit conditions on any output can be monitored or checked by programming that output off. After a
short delay (microseconds), another control byte can be clocked into the the device. If the diagnostic bit for
that output comes back as a low, it indicates that the output is low and open circuited. A current overload
condition can be detected by programming an output on. After waiting an appropriate length of time, another
byte should be clocked into the TPIC2801. The diagnostic bit clocked back from the TPIC2801 in the
subsequent data transfer should indicate a low output. If a high returns, a current overload is indicated. A
quick overall check can be done by clocking in a test control byte. After a sufficient time delay, another control
byte (same byte can be used) is clocked in. The diagnostic data is exclusive ORed with the original control
byte. If a fault condition exists, a high will result.

to

TIME

SlOE

I

I
I
I

SCLK

I
I

111 111 12t 12. 13t 13. 14t 14. 1st 15. 16t 16.

I

I

I

I

I
I
I

I I I
I I I
I I I

I
I
I

I

I

I

I

I

I

17. 1st

I

I

I

I

I
I

I
I
I

I
I
I

I
I
I

I
I
I

I

I

I

I

I

I
I

19

I
I

I

H

L
H

Sl

DID
L

so
I

VO

--HI·Z
---L

I

H

I

L

~EW)-

PRIOR (OLD)

I

V1

~E~)

PRIOR (OLD)
-I
I

V7

PRIOR (OLD)

I

L

I

~E~)
L

FIGURE 1. DATA-BYTE TRANSFER TIMING

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75266

4-145

TPIC2801
OCTAL INTELLIGENT-POWER SWITCH
WITH SERIAL INPUT
schematics of inputs and outputs
EQUIVALENT OF All lOGIC INPUTS
151, SClK, SlOE, RSTl

EQUIVALENT OF SERIAL OUTPUT 1501
- -....- - . - - - VCC

--l

VCC

INPUT

GND
':'

EQUIVALENT OF Y OUTPUTS IVnl
....- - - - - - - - -

VCC

1-...- ...- -....-

----Q

OUTPUT

OUTPUT

90 kll

0,025 Il

All resistor and voHage values shown are nominal.

absolute maximum ratings over operating temperature range (unless otherwise noted)
Supply voltage range, VCC (see Note 1) , " ' , " " " " " " " " " " " " , , " , ' -0,3 V to 7 V
Input voltage, VI ' . , , , , , . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . . . . . . . . , .. , . , , . . . . •. 7 V
Output voltage range at SO . . . . . . . . . . . . . . . , ... , .... , . . . . . . . . . . . . . . . . . ,. -0.3 V to 7 V
Input current, II . . . . . . . . . . . . . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . , ...... , .. , ... -15 rnA
Peak output sink current at Y, 10 repetitive, tw = 10 ms, ...... ,., . . . . . . . . . . . . . Internally Limited
duty cycle = 50%, see Notes 2 and 3
Continuous output current at Y, 10 (see Note 3) ... , ........ , .... ,., . . . . . . . . . . . . . . , ,. 1 A
Peak current through GND terminal:
Nonrepetitive tw = 0.2 ms . . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . . .. - 8A
Repetitive, tw = 10 ms, duty cycle = 50% , . . . . . . . . . . . . . . . . . . . . . . .. -6 A
Continuous current through GND terminal , ..... , ....... , . . . . . . . . . . . . . , ... , . , . . .. -4.5 A
Output clamp energy, EOK (after turning off 10(on) = 0,5 A) , ..•.•. , . . . . .. . . . . . . . . • . . .. 40 mJ
Continuous dissipation at (or below) 25·C free-air temperature (see Note 4) .. , ..... , .. , . .. 3.575 W
Continuous dissipation at (or below) 75·C case temperature (see Note 4) .......... , .... ,.. 25 W
Operating case or virtual-junction temperature range, . . . . . . . . . . . . . . . . . . . . . . .. -55·C to 150·C
~ 65·C to 150·C
Storage temperature range .. , . . . . . • . . . . . . . . . . . , •......... , .. , .... ,"
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ....... , ......... , . . . . .. 260·C
NOTES: 1. All voltage values are wtth respect to network ground terminal.
2. Each Youtput is individually current limited with a typical over-current limn of about 1.4 A.
3. Multiple Y outputs of this device may conduct rated current simuttaneously; however, power dissipation (average) over a short
time interval must fall within the continuous dissipation range and the GND current must fall within the GND-terrnlnaJ current range.
4. For operation above 25'C free-air temperature, derate linearly at the rate of 28.6 mWfC. For operation above 75'C case
temperature, derate lineraly at the rate of 333 mWf'C. To avoid exceeding the maximum virtual-junction temperature, these ratings
must not be exceeded.

TEXAS ."

INSTRUMENTS
4-146

POST OFFICE BOX 656303 • DALLAS, TeXAS 75265

TPIC2801
OCTAL INTELLIGENT-POWER SWITCH
WITH SERIAL INPUT
recommended operating conditions
Supply vottage, VCC
High~evellnput vottage,

VIH

MIN

NOM

MAX

UNIT

4.75

5

5.25

V

0.7VCC

5.25

V

-0.3

0.2VCC

V

30

V

1
105

'c

MIN

MAX

UNIT

0

500

kHz

Low-level input vottage, Vil
Output voltage, VO(off)
Continuous output current, 10(on)

-40

Operating case temperature, TC

25

A

timing requirements (see Figure 2)
PARAMETER

FROM

TO

TEST CONDITIONS

fSCLK

Clock frequency

twSCLKH

Pulse duration, SCLK high

840

ns

IwSClKl

Pulse duralion, SCLK low

840

ns

IwRST

Pulse duralion,

1000

ns

Isul

Seluplime

STOE.

SClKf

1000

ns

Isu2

Seluplime

SClKt

SIOE"f

1000

ns

tsu3

Seluplime

SI

SCLKt

500

ns

thl

Hold lime

SClKt

SI

500

Ir

Rise lime (SClK, SI, IDOE)

2

liS

If

Fall lime (SClK, SI, IDOE)

2

lis

fiST low

ns

electrical characaterlstlcs over recommended ranges of supply voltage and operating case
temperature (unless otherwise noted)
driver array outputs (YO to Y7)
PARAMETER

TEST CONDITIONS

VOK

Outpul clamp voltage

10 = 0.5 A, output programmed off and current shunted
10 ground

IOloffl

Off-state output current

Vo = 24 V wRh output programmed off

IOICU

Outpul currenl limR

Vo = 3 V wRh output programmed on

MIN

TYP1

MAX

30

36

40

V

1

rnA

1.05

1.4
0.4

IOL=0.5A
VO(on)

VTOS

On-stale output voltage

Wilh output programmed on

10l= 0.75 A
10L = I A, During

Oul of saluration threshold voltage

unlatch disable
WRh output programmed on and an over-current fault
condilion

1.6

UNIT

A
0.5

V

0.6

1

V

0.8

1.5

V

1.8

2

V

shift register (Inputs SI, SlOE, SCLK, and RST)
PARAMETER
VT+
VT_

TEST CONDITIONS

MIN

Positive-going threshold voltage

MAX
0.7VcC

Negatlve-going threshold vottage

0.2VcC
0.85

Hysteresis voltage (VT+ - VT-->

UNIT
V
V

Vhvs
II

2.25

V

Input c,urrent

VI=OtoVCC

",10

!1A

Ci

Inpout capacitance

VI =OtoVcc

20

pF

t All typIcal values are at VCC = 5 V, TJ = 25'C.

TEXAS ."

INSTRUMENlS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

4-147

TPIC2801
OCTAL INTELLIGENT~POWER SWITCH
WITH SERIAL INPUT
electrical characteristics over, recommended ranges of supply voltage and operating case
temperature (unless otherwise noted)
shift register (output SO)
PARAMETER

TEST CONDITIONS

VOL

Low-level output voltage

10 = 1.6mA

VOH

High-level output voltege

10 = -0.8 rnA

10

Output current

Vo = 0 to VCC,

ICC

MAX

0.2

0.4

Supply current

All outputs off

Co

Output capacitance

Vo = 0 to VCC, ~ input high

UNIT
V
V

'SR5E Input high

ICC

t All typical values are at VCC =

TYpt

VCC -1.3

All outputs on, 10 = 0.5 A at all
outputs

Supply current

MIN

±10

TJ = 105'C

150

TJ = 25'C

200

TJ = -40'C

250

TJ = 25'C

4

J.IA
mA

10

mA

20

pF

5 V, TJ = 25'C.

thermal characteristics
PARAMETER
RaJC
RaJA

MIN

Thermal reSistance, junction-to-case temperature
Thermal reSistance, junction-to-ambient temperature

switching characteristics over recommended ranges of supply voltage and operating case
temperatures (unless otherwise noted)
PARAMETER

FROM

MAX

UNIT

SO

C,l = 20 pF,See RL = 2 k!l,
FIgure 3

1000

ns

1000

ns

TO

~~

TEST CONDITIONS

len

Enable time

Ielis

Disable time

SiUE't

SO

CL - 20 pF ,See RL = 2 kG,
Figure 3

1el1

Delay time, valid data

SCLKt

SO

CL = 200pF,

1el2

Delay time, unlatch disable

SiUE't

Yn

Cro = 20 pF,See RL=5G,
Fgure 5
'

MIN

See Figure 4
75

740

ns

250

I.IS

tr(so)

Rise time, SO

CL = 200 pF,

See Figure 4

150

ns

tl(so)

Fall time, SO

CL - 200 pF,

See Figure 4

150

ns

Iel(on)

Delay time, tum-on

SiUE't

Yn

10L = 500 rnA,
RL = 28 G,

C,l = 20 pF,See
FIgure 6

10

I.IS

Iel(off)

Delay time, turn-off

~t

Yn

10L = 500mA,
RL = 28 G,

C,l = 20 pF,See
FIgure 6

10

1.18

tv

Valid time, SO out~ut data remains
valid after SCLK h gh

SCLKt

SO

CL = 2oopF,

See Figure 4

TEXAS ."

4-148

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75266

0

n8

TPIC2801
OCTAL INTELLIGENT-POWER SWITCH
WITH SERIAL INPUT
PARAMETER MEASUREMENT INFORMATION

RO~!~

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ :::

_

SlOE

14

~

twIRST)
VIH
\

0.2vee

0.2 Vee

!"-------------------"!£
- - - - VIL
~
..I
. --tI 14-- t,
I

tsu1 ~

I

seLK

j4

.,

~w.,SeLKH I

0.7 Vee

·W

0.7 Vee

~~~~~~

~ 14
I

~

~

~ ts~

I

J~
i J'
_______....:;.;;;..-%
..
I L-.¥'
0.2 Vee

tsu3

SI

/

0.2 Vee

twseLKL

_ _ VIH

"N.l"-------0.2 Vee

~

i.-

VIL

tf

th1 0.7 Vee

~~~~~~~~~_-.~~~'U
FIGURE 2. INPUT TIMING WAVEFORMS

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

4·149

TPIC2801
OCTAL INTELLIGENT-POWER SWITCH
WITH SERIAL INPUT
PARAMETER MEASUREMENT INFORMATION
,2.5V

VCC - 5 V

tPIC2801
UNDER
TESt

SO

t-=-=-.....-OUTPUT

GNO

CL - 20pF
(See Note AI

TEST CIRCUIT FOR ENABLE AND DISABLE TIMES

jot--

10 ns...,

--.j

I

I

""90%\. j

SiO'E
INPUT VOLTAGE
WAVEFORM
SO
OUTPUT VOLTAGE
WAVEFORM 1
(See Note BI
SO
OUTPUT VOLTAGE
WAVEFORM 2
(See Note BI

~ 10

ns

I I ,

j1"

90%
2.5 V f,,'_1.;.;0;.;%;;..-_1.;.;0;.;%~Jf 22.5 V

-.I

14- ten

I I

tdls

5V

-.I I f I I
I

r - - - 2.6 V

50%

'----VOL

NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 Is for an output with Internal conditions such that the output Is low except when disabled by the output control when
SI15E Is high. Waveform 21s for an output with internal conditions such that the output is high except when disabled by the output
control when
Is high.

mm:

FIGURE 3.

VOLTAGE WAVEFORMS FOR ENABLE AND DISABLE TIMES

TEXAS ."

4-150

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TeXAS 76265

TPIC2801
OCTAL INTELLIGENT-POWER SWITCH
WITH SERIAL INPUT
PARAMETER MEASUREMENT INFORMATION
Vee - 5 V

TPIC2B01
UNDER
TEST

seLK

SO

1-_>--- OUTPUT
eL - 200 pF
(See Note A)

GND

TEST CIRCUIT FOR VALID DATA
DELAY TIME td1 AND VALID TIME tv
seLK
INPUT VOLTAGE
WAVEFORM
SO
OUTPUT VOLTAGE
WAVEFORM 1
(See Note B)
SO
OUTPUT VOLTAGE
WAVEFORM 2
(See Note B)

10ns~

-+I

~

~ 10ns

1 j:-I::-::-::-:----~::-:-:--oil 1- - - ;I 0.7 Vee
0.7 Vee "-I·
2.5 v"'ISL 0.2 Vee

O~ 2.5 V
tv~
0.2 Vee

5 V
0
VOH

I

I 0.7 Vce

_ _...,.._11:._1_ - - --.j
tr(SO)

I--

-

-

-

-

-

-

-

- VOL

~td1

t v 1 1 I _ _ _ _ _ _ _ _ _ _ _ _ VOH

eeN'

0. 7v

1
1

___

0.2 Vee
F--~-------------------VOL
~tflSO)

NOTES: A. CL includes probe and jig capacitance.

S. Waveform 1 is for an output with internal conditions such that the low-to-high transition of SCLK causes the SO output to switch
from low to high. Waveform 2 is for an output with internal conditions such that the low·to-high transition of SCLK causes the SO
output to switch from high to low.

FIGURE 4.

VOLTAGE WAVEFORMS FOR DELAY TIMES

TEXAS .."

INSfRUMENTS
POST OFFICE

BOX' 655303 •

DALLAS. TexAS 75265

4-151

TPIC2801
OCTAL INTELLIGENT·POWER SWITCH
WITH SERIAL INPUT
PARAMETER MEASUREMENT INFORMATION
VCC .'5V

Vs - 11 V

TPIC2801
V
UNDER
I -......+-OUTPUT
TEST CL·20pF
(See Note BI
GND

TEST CIRCUIT FOR UNLATCH DISABLE
DELAV TIME td2
(See Note A)
10 ns

SiOE
INPUT VOLTAGE
WAVEFORM
V-OUTPUT
VOLTAGE
WAVEFORM
(See NoteC}

-.j 14-

I

I

5V

90%
_ _1;,.;;0,.;;%;;..;rr-1 2.5 V

I \.

10%

5o%L

.

0

VoH· 11 V

I~_
- I - - - - - Von •

V-OUTPUT
CURRENT WAVEFORM
(See Note C)

5V

\ . - td2-.j

-1- - - - _____.J;;;'\50%

OIO(CL} • 1.2 A

NOTES: A. td2 = delay until V-output current goes off under fauR condition.
B. CL includes probe and jig capacitance.
C. Output voRage and current waveforms are for an output with Internal condttions such that the low-to-hlgh transition of'Sic:5E causes
the output to switch from being off to being on.
D. Load voltage Vs and load resistanca RL are selected such that on-state voltage at the Y output under test, Von is greater than the
maximum out-of-saturation threshold voRage, VTOS. Thus, VOL = Von> VTOS(max} = 1.98 V.

FIGURE 5.

VOLTAGE AND CURRENT WAVEFORMS FOR UNLATCH DISABLE DELAY

TEXAS . "

4-152

'INSfRUMENTS
POST OFFICE BOX 665303 • DALLAS. TeXAS 75265

TPIC2801
OCTAL INTELLIGENT-POWER SWITCH
WITH SERIAL INPUT
PARAMETER MEASUREMENT INFORMATION
14 V

Vcc - 5 V

RL - 28!l
TPIC2801
UNDER
TEST

SiOE

V

OUTPUT
CL-20pF
(Sea Nota B)

GND

TEST CIRCUIT FOR TURN-OFF ld(off)
AND TURN-ON td(on) DELAY TIMES
(Saa Nota A)
10 ns

SiOE

INPUT VOLTAGE

-.I 14-

--.! 14--

II

10 ns

IJ

~i---5V
2.5 V ~ 0

~ 2.5 V

WAVEFORM

I

V-OUTPUT
VOLTAGE WAVEFORM 1 tpd(off) III Z~
(Saa Nota C)
I
90%
10%
50%
V-OUTPUT
VOLTAGE WAVEFORM 2
(Saa Nota C)

---11-'"

- - - - - - -

14 V
VOL

tpd(on~

~50%

~-------14V

10%

VOL

NOTES: A. td(olf) = tpLH. td(on} = tpHL·

B. CL Includes probe and jig capacitance.
C. Waveform 1 is for an output wHh internal condHions such that the low-to-hlgh transition of moE causes the output to switch from on
to off. Waveform 2 is for an oulput with internal conditions such the low-to-high transition of~ causes the output to switch from
011 to on.
'

FIGURE 6.

VOLTAGE WAVEFORMS FOR TURN-OFF AND TURN-ON DELAY TIMES

TEXAS ."

INSTRUMENlS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

4-153

TPIC2801
OCTAL INTELLIGENT·POWER SWITCH
WITH SERIAL INPUT
TYPICAL APPLICATION DATA
YO

L

R

Vcc

14 ± 0.5 V

Y1

SIDE

,,,.

Y2
SI
MICRO·
CONTROLLER
WITH BUS

SO

TPIC2801

Y3
r----'
Y4

~

SCLK

~~

RS'f

Y6
GNO
Y7

J

-vvv-

VCC - 5 V ± 5% '
R - 30 Il ± 5%
.
L - 10 mH ± 10%
8 LOAOS UP TO 0.5 A EACH

FIGURE 7.

MICROCONTROLLER DRIVING EIGHT LOADS USING A TPIC2801 FOR LOAD INTERFACE

TEXAS

4·154

-II

INSTRUMENTS
POST OFFICE BOX 655303. • DALLAS, TeXAS 75265

ULN2001A THRU ULN2005A
DARLINGTON TRANSISTOR ARRAYS
02624, DECEMBER 1976- REVISED SEPTEMBER 1986

HIGH-VOLTAGE HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

•
•

•
•

•
•

o OR N PACKAGE

500-mA Rated Collector Current
(Single Output)

(TOP VIEWI

High-Voltage Outputs ... 50 V

1B
2B
3B
4B
58
6B
7B

Output Clamp Diodes
Inputs Compatible With Various Types of
Logic
Relay Driver Applications
Designed to Be Interchangeable With
Sprague ULN2001A Series

E

1C
2C
3C
4C
5C
6C
7C
COM

description
The ULN2001A, ULN2002A, ULN2003A, ULN2004A, and ULN2005A are monolithic high-voltage, highcurrent Darlington transistor arrays, Each consists of seven n-p-n Darlington pairs that feature high-voltage
outputs with common-cathode clamp diodes for switching inductive loads. The collector-current rating
of a single Darlington pair is 500 rnA. The Darlington pairs may be paralleled for higher current capability,
Applications include relay drivers, hammer drivers, lamp drivers, display drivers (LED and gas discharge),
line drivers, and logic buffers. For 100-V (otherwise interchangeable) versions, see the SN75465 through
SN75469.
The ULN2001A is a general-purpose array and may be used with TTL, P-MOS, CMOS, and other MOS
technologies, The ULN2002A is specifically designed for use with 14- to 25-V P-MOS devices. Each input
of this device has a zener diode and resistor in series to control the input current to a safe limit. The
ULN2003A has a 2.7-kO series base resistor for each Darlington pair for operation directly with TTL or
5-V CMOS devices. The ULN2004A has a 10.5-kO series base resistor to allow its operation directly from
CMOS or P-MOS devices that use supply voltages of 6 to 15 V, The required input current of the ULN2004A
is below that of the ULN2003A, and the required voltage is less than that required by the ULN2002A.
The ULN2005A has a 1050-0 series base resistor and is specifically designed for use with TTL devices
where higher output current is required and loading of the driving source is not a concern,
logic symbol t

logic diagram
(S)

COM
18
28
38
48
58
68
78

111
(2)
(31
(4)
(5)
(6)
(1)

(t6)

IC

IC
2C

28

(15)

2C

3C
4C
38

5C
6C

(14)

(t3)

7C

48

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12,

58

(12)

(11)

68
(IO)
78

PRODUCTION DATA documents contain Information
currant IS 01 publication data, Products conlogJI ta '
.peclfications par tha terms of T..a. Instruments
:=~i~ar;'~7~ ~::I~~i:; lIlo:::~:,:::,~ not

COM

3C

4C

5C

6C

7C

Copyright © 1986, Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75265

4-155

ULN2001A THRU ULN2005A
DARLINGTON TRANSISTOR ARRAYS
schematics (each Darlington pair)

INPUT B

INPUT B

ULN2002A

ULN2001A

COM

RB
INPUT B
ULN2003A: RB - 2.7 kG
ULN2004A: RB - 10.5 kG

....-

ULN2005A: RB - 1.05 kG

....- E

ULN2003A,ULN2004A,ULN2005A
All resistor values shown are nominal.

absolute maximum ratings at 25°C free-air temperature (unless otherwise noted)
Collector-emitter voltage . . . . . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 50 V
Input voltage (see Note 1): ULN2002A, ULN2003A, ULN2004A . . . . . . . . . . . . . . . . . . . . . .. 30 V
ULN2005A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
Peak collector current (see Figures 14 and 15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 500 rnA
Output clamp diode current ..... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 500 rnA
Total emitter-terminal current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -2.5 A
Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . .. See Dissipation Rating Table
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 20°C to 85 °C
Storage temperature range ......................................... - 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . .. 260°C
NOTE 1: All voltage values are with respect to the emitter/substrate terminal, E, unless otherwise noted.
DISSIPATION RATING TABLE
PACKAGE

TA - 25°C
POWER RATING

DERATING FACTOR

D

950mW

ABOVE TA - 25°C
7.6 mW/oC

N

1150mW

9.2 mW/oC

TEXAS ..,
INSTRUMENTS
4-156

POST OFFICE BOX 855303 .. DALlAS. TEXAS 7&266

TA - 85°C
POWER RATING
494mW
598mW

ULN2001A THRU ULN2005A
DARLINGTON TRANSISTOR ARRAYS
electrical characteristics at 25 DC free-air temperature (unless otherwise noted)
PARAMETER

TEST
FIGURE
1

TEST CONDITIONS

ULN2001A
TYP MAX

MIN

50
100

VCE - 50 V. II - 0
VCE = 50 v.111 = 0
T A = 70·C I VI = 6 V
VCE = 50 V. IC - 500 pA.
TA = 70·C

ICEX

Collector cutoff current

IUoff)

Off-state input current

3

II

Input current

4

VI - 17 V

5

VCE = 2 V.

IC = 350 mA 1000

6

VCE - 2 V.
II = 250 pA.
11= 350 pA.
II = 500 pA.

IC = 300 mA
Ic=100mA
IC = 200 mA

hFE
Vllon)

~

Static forward current
transfer ratio

On-state input voltage

Collector-emitter
VCE(sat) saturation voltage

5

IR

Clamp diode reverse current

7

VF
Ci

Clamp diode forward voltage

8

Input capacitance

=

IC

VR = 50 V
VR = 50 V. TA
IF - 350 mA
VI

= O.

pA

0.82

1.25

mA

1.1
1.3

0.9
1

13
1.1
1.3

1.6

1.2

50

1.7
15

1 MHz

2
25

pA

65

50
100

70·C

UNIT

100
500

65

0.9
1
1.2

350 mA

=

=

f

50

ULN2002A
MIN TVP MAX
50

1.6
50

1.7

100
2

15

25

V
V

~A

V
pF

electrical characteristics at 25 °C free-air temperature (unless otherwise noted)
PARAMETER

TEST
FIGURE

TEST CONDITIONS

=0
1
VCE = 50 v.111 = 0
~ TA = 70·C IVI = 1 V
VCE - 50 V. IC = 5(l0 pA.
3
TA = 70·C
VCE - 50 V. II

ICEX

Collector cutoff current

IUoff)

Off-state input current

ULN2003A
MIN TYP MAX
50

Input current

4

VI
VI

=
=

TVP MAX
50

100

50

VI = 3.85 V
II

ULN2004A
MIN

65
0.93

100
500
50

5V
12 V
IC

VII on)

Collector-emitter
VCE(sat) saturation voltage
IR

Clamp diode reverse current

VF
Ci

Clamp diode forward voltage
Input capacitance

6

VCE = 2 V

II - 250 p.A.
5

7
8

=
=

II
II

350 p.A.
500 p.A.

VR = 50 V
VR = 50 V.
IF
VI

= 350
= O.

IC
Ic
IC

=
=
=
=

200 mA

2.4

250 mA
275 mA
300 mA

2.7

IC = 350 mA
IC - 100 mA
IC - 200 mA
IC = 350 mA
TA

=

0.35

0.5

1

1.45
5

=

1 MHz

mA

6
V

3
0.9
1
1.2

1.1
1.3
1.6

0.9
1
1.2

50
100
1.7

f

pA

65

7

70·C

mA

pA

1.35

Ic - 125 mA

On-state input voltage

UNIT

15

2
25

1.7
15

8
1.1
1.3
1.6

V

50
100

pA

2
25

V
pF

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 866303 • DALLAS. TeXAS 76265

4-157

ULN2001A THRU ULN2005A
DARUNGTON TRANSISTOR ARRAYS
electrical characteristics at 25 °C free-air temperature (unless otherwise noted)
PARAMETER

TEST

ICEX

Collector cutoff current

1

IUoffl
II

Off-state input current
Input current
On-state input voltage

3
4
6

VUonl

Collector-emitter
VCE(satl saturation voltage

5

IR

Clamp diode reverse current

7

VF

Clamp diode forward
voltage

8

Ci

Input capacitance

ULN2006A

TEST CONDITIONS

FIGURE
VCE

= 50 V,
= 50 V,
= 50 V,

VCE
VCE
VI = 3V
VCE = 2 V,

II = 250".A,
II = 350".A,
II = 500 p.A,

=0
= 0,
Ic = 500".A,
II
II

IC

MIN
TA
TA

= 70·C
= 70·C

50

65
1.5
0.9

2.4
2.4
1.1

1
1.2

1.3
1.6

= 350 mA
= 350 mA

60
100

VR = 50V
VR

= 50 V,

TA = 70·C

IF = 350 mA
VI = 0,

f

MAX
50
100

IC - 100mA
IC = 200 mA
IC

TYP

= 1 MHz

UNIT
".A
".A
rnA
V
V

".A

1.7

2

V

15

25

pF

TYP
0.25

MAX
1
1

switching characteristics at 25 DC free-air temperature
tpLH
tpHL
VOH

PARAMETER
Propagation delay time, low-to-high-Ievel output
Propagation delay time, hlgh-to-Iow-Ievel output
High-level output voltage after switching

TEST CONOITIONS

Vs = 50 V,
10 = 300 mA,
See Figure 10

TEXAS . "

4-158

MIN

See Figure 9

INSTRUMENlS
P!JST OFFtcE BOX 655303 • DALLAS. TEXAS 75286

0.25
VS-20

UNIT

"..
"..
mV

ULN2001A THRU ULN2005A
DARLINGTON TRANSISTOR ARRAYS
PARAMETER MEASUREMENT INFORMATION
OPEN

OPEN

veE

VCE

leEX

+--

OPEN

FIGURE 1. ICEX

OPEN

FIGURE 2. ICEX

VCE

OPEN

FIGURE 3. Il(off)

FIGURE 4. II

OPEN

OPEN
Ie

hFE

NOTE: II

is fixedfor measuring

-II

VeE(..!). variable for measuring hFE.

FIGURE 5. hFE. VCE(sat)

FIGURE 6. Vl(on)

FIGURE 7.IR

FIGURE 8. VF

OPEN

TEXAS . .

INSTRUMENTS
POST OFFIC~ BOX 656S03 • DALLAS. TEXAS 75266

4-159

ULN2001A THRU ULN2005A
DARLINGTON TRANSISTOR ARRAYS

PARAMETER MEASUREMENT INFORMATION

INPUT
50%\
I \...- - - - - - -

I

11"----

~tPLH4,

~O%

OUTPUT

50

VOLTAGE WAVEFORMS

FIGURE 9. PROPAGATION DELAY TIMES
Vs
INPUT

r-----

2mH

I

163 n

ULN2001A only

2.7 kn

~~~~--1~-~----OUTPUT

TEST CIRCUIT

---.t I+- <10 nl

-.t I+- <5 nl

'96%
;;

INPUT

90%ii"----------

~I~~_________~~I

,

: 'I 1.5 V
1
_ _....;.;_;.;.;:.

1.5 V

,

:

I
~

I

.

10%

~Not8C)
0V

,

40,.1

.1

OUTPUT

VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR = 12.5 kHz, Zo = 50 11.
B. CL includes probe and jig capacitance.
C. For testing the ULN2001A, ULN2003A, and the ULN2005A, VIH = 3 V; for the ULN2002A, VIH
VIH = 8 V.

FIGURE 10. LATCH-UP TEST

TEXAS . "
INSTRUMENTS
4-160

POST OFFICE BOX 655303 • DALLAS. TEXAS 76265

= 13 V; for the ULN2004A,

ULN2001A THRU ULN2005A
DARLINGTON TRANSISTOR ARRAYS
TYPICAL CHARACTERISTICS
COLLECTOR·EMITTER

COLLECTOR-EMITTER

SATURATION VOLTAGE

SATURATION VOLTAGE

"

>I

t

~

.~

~
i!

ra

2. 6

f-TAI=25"~

h

1. 5

E

~

i

1.0

l'

t

~'¢IP

1#

h

~

""260pA

> 2.0
.§

'l z 350",A
II "500pA-

~

~

"

II" f"'P'V
,"

~

~ o.5

!w

100 200 300 400 500 600 700 800

~ ;:::::::::

0

!1

~

..
i

"

~
,"

500

E
I

350PA-...J

V

1.0

INPUT CURRENT

I

2Jc

~

0.5

00

f-Tl·

1.5

~

!w
!1

2.5

"0

.~

'I'

COLLECTOR CURRENT
(TWO DARLINGTONS PARALLELED)

I

2.0

COLLECTOR CURRENT

"

COLLECTOR CURRENT
(ONE DARLINGTON)

500pA

....,,;~ i""""

RL '101l
TA'" 25°C

//,,"
/

400

Vs = 10 V
350
300

j

250

8I

200

9

f"

460

II

/

/

VS= 8 V

/

J

150
100

0

100 200 300 400 500 600 700 800

Ie-Collector Current-mA

'Chotl-Total Collector Current-rnA

FIGURE 11

FIGURE 12

25

50

75

100 126 150 175 200

II-Input Current-llA

FIGURE 13

THERMAL INFORMATION
N PACKAGE
MAXIMUM COLLECTOR CURRENT

D PACKAGE
MAXIMUM COLLECTOR CURRENT
vs

vs

DUTY CYCLE

DUTY CYCLE

c(

I--M~I--.-+--+-..I--+-+_-+-!--I

T

500

a~

400 j----ft~;I_\c+~t-c+-+_~

E

N - 7

I

100

TA - 85°C
N - Number of Outputs
Conducting Simultaneously
O'---------="----_
_""""'"-----L---..l---l

o

10 20 30 40 50 60 70 80 90 100

N - Number of Outputs
Conducting Simultaneously

°0~-1-0-2-0-3-0~4-0-5-0-6-0-7~0-8~0-9~0-1~OO
Duty Cycle-%

Duty Cycle-%

FIGURE 14

FIGURE 15

TEXAS ..,
INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS, TEXAS 76266

4-161

ULN2001A THRU ULN2005A
DARLINGTON TRANSISTOR ARRAYS
APPLICATION INFORMATION

Vss

ULN2002A

ULN2003A
ULN2005A

+V

+V

OUTPUT
P-MOS TO LOAD

VDD

ULN2004A

TTL TO LOAD

+V

VCC

+V

USE OF PULL·UP RESISTORS
TO INCREASE DRIVE CURRENT

BUFFER FOR
HIGHER CURRENT LOADS

TEXAS ."

4-162

ULN2003A

INSTRUMENTS
POST OFFICE BOX 866303 • DALLAS. TEXAS 76286

ULN2064, ULN2065, ULN2066,. UlN2067
QUADRUPLE HIGH·CURRENT DARLINGTON SWITCHES
02528. DECEM8ER 1979-REVISED SEPTEMBER 1986

•

NE PACKAGE
ITOPVIEWI

Output Collector Current ••. 1.5 A Max

•

2·W Dissipation Rating

•

High Output·Voltage Capability

•

Outputs Diode·Clamped for Inductive Loads

•

Common·Emitter Circuit for Current Sink

•

ULN2064 and ULN2065 Heve TTL
Compatible Inputs

CLAMP
lC
1B
HEAT SINK. E,
AND SUBSTRATE)

J

4C
llC
4B
} HEAT SINK, E,
AND SUBSTRATE
3B

3

2B
2C

•

ULN2066 and ULN2067 Have CMOS· and
PMOS·Compatlble Inputs

•

Designed for Interchangeability With
Sprague ULN2064 thru ULN2067.
Respectively

NC-No internal connection

schematic (each darlington pairl
~"'-CLAMP

description
/'"-4.-+-0UTPUT C

The ULN2064. ULN2065. ULN2066. and
ULN2067 are monolithic high-voltage. highcurrent darlington transistor switches. Each
comprises four n-p-n darlington pairs. All units
feature high-voltage outputs with commoncathode clamp diodes for switching inductive
loads. Outputs and inputs may each be paralleled
for higher current capability. Applications include
relay drivers. hammer drivers. lamp drivers.
display drivers (LED and gas discharge). line
drivers. and logic buffers. These commonemitter circuits are designed to operate as
current sinks to the load.

INPUT 8 .....W'o....'"""'i
7.2 kO NOM

3 kO NOM

E

ULN2064, ULN2065: Rin - 350 0 NOM
ULN2066, ULN2067: Rin - 3 kO NOM

logic diagram

The ULN2064 and ULN2065 are intended for
use with TTL and 5-V MOS logic. The ULN2066
and ULN2067 are intended for use with PMOS
and higher-voltage CMOS logic.
The ULN2064. ULN2065. ULN2066. and
ULN2067 are characterized for operation from
-20°C to 85°C.

~e-+~--~11~ICLAMP
18) CLAMP

121 1C

171 2C

logic symbol t
19) 3C

18 (3)
28 (6)
38 (11)

48 (14)
tTnis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

PRODUCTION DATA .........nta

_tal.

Copyright © 1986, Texas Instruments Incorporated

ioformatio.

c.rrant .1 of p.blicatio. dota. Products c••for.. to
_i!leoti••s plr thl tor....f Tn.. I••tr....nta

=i~"{::I':!ri =:~ N=~~·ot

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 865303. DALLAS. TEXAS 7528S

4-163

ULN2064, ULN2065, ULN2066, ULN2067
QUADRUPLE HIGH-CURRENT DARLINGTON SWITCHES

absolute maximum ratings at 25 DC free-air temperature for each switch (unless otherwise notedl
ULN2064
50
15

Collector-emitter voltage
Input voltage (see Note 1)

ULN2065
80

Peak collector current (see Figures 12, 13, arid 14)

1.5

15
1.5

Input current

25

25

Total power dissipation at (or below) 25°C
free-air temperature (see Note 2)
Operating free'::air temperature range

Storage temperature range
Lead temperature 1,6 mm (1/16 inch)

ULN2066
50
30
1.5

ULN2067
80

UNIT
V
V

30
1.5

25

A

25

mA

2075

2075

2075

2075

mW

-20 to 85
-55 to 150

-20 to 85

-20 to 85

-20 to 85

-55 to 150

-55 to 150

-55 to 150

°C
°C

260

260

260

260

°C

from the case for 10 seconds

NOTES: 1. All voltage values (unless otherwise noted) are with respect to the emitter/substrate terminal E.
2. For operation above 25°C free-air temperature, derate total power linearly to 1079 mW at 85°C at the rate of 16.6 mW/oC.

electrical characteristics at 25 DC free-air temperature (unless otherwise notedl
PARAMETER

TEST
FIGURE

TEST CONDITIONS

ULN2064
MIN MAX

ULN2065
MIN MAX

ULN2066
MIN MAX

ULN2067
MIN MAX

UNIT

Collector
VCEX(sus) sustaining
voltage

ICEX

I1(0n)

Vl(on)

Collector output
cutoff current

On-state
input current

On-state
input voltage

Collector-emitter
VCE(sat)

saturation voltage

= 0.4 V.

1

VI

2

VCE = 50 V
VCE - 50 V,
VCE - 80 V
VCE - 80 V,

3

VI
VI

VF

Clamp-diode
reverse current

Clamp-diode
forward voltage

35

50

100
500

TA - 70°C
1.4

4.3

1.4

4.3

3.3

9.6

3.3

9.6

VCE
See Note 3

=1A
= 1.5 A,

II = 625 pA, IC - 500 mA
II = 935 pA, IC = 750 mA
II - 1.25 mA, IC - 1 A
5

II = 2 mA,
See Note 3

6

7

VR = 50 V
VR - 50 V,
VR
VR

= 80 V
= 80 V,

IF - 1 A
IF = 1.5 A,

100
500

0.6
1.7
IC
IC

IC - 1.25 A,

TA

1.8
5.2

0.6
1.7

1.8

2

2

6.5

5.2
6.5

2.5

2.5

10

10

1.1

1.1

1.2
1.3

1.2
1.3

1.1
1.2
1.3

1.1
1.2

1.4

= 1.5 A,

TA - 70°C

V

100
500

VI
VI - 12 V

= 2 V,
= 2 V,

50

35

100
500

TA - 70°C'

II = 2.25 mA, IC
See Note 3

IR

= 100mA

= 2.4 V
= 3.75 V
=5V

VCE
4

IC

1.5

1.5
50
100

1.75

1.75

50
100
1.75

2

2

2

2

See Note 3

NOTE 3: These parameters must be measured on one output at a time using pulse techniques, tw = 10 ms, duty cycle

TEXAS •

4-164

INSTRUMENTS
POST OFFICE BOX 655303 ' DALLAS. TEXAS 75265

V

V

50
100
1.75

= 70°C

mA

1.3

1.4

50
100

pA

~A

V

s 10%.

ULN2064, ULN2065, ULN2066, ULN2067
QUADRUPLE HIGH·CURRENT DARLINGTON SWITCHES
switching characteristics at 25°C free-air temperature.
PARAMETER

Vee - 5 V

TEST CONDITIONS

Propagation delay time, low-to-high-Ievel output
Propagation delay time, high-to-Iow-Ievel output

MIN

TYP

MAX

See Figure 8

1.5

PARAMETER MEASUREMENT INFORMATION
OPEN
OPEN

VCE

..-ICEX

OPEN

FIGURE 1. VCEXlsus)

FIGURE 2. ICEX
OPEN

OPEN

~~~-OPEN

FIGURE 3. I1(0n)

FIGURE 4. Vllon)

OPEN

OPEN

FIGURE 6. IR

FIGURE 5. VCElsat)

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 15265

4-165

ULN2064, ULN2065, 'ULN2066, ULN2061
QUADRUPLE HIGH·CURRENT DARLINGTON SWITCHES

PARAMETER MEASUREMENT INFORMATION

FIGURE 7. VF
--VIH

~

""--,,,,-35 V
CLAMP

:
tpHL ~

:>c>-e----1t-4t-- OUTPUT
GENERATOR
{See Note AI

(See Note CI
50%

50%

INPUT

6811,2W

.e-

:

....

OV

tt- tpLH

Ir

~

Cl = 15 pF
{See Note BI

OUTPUT

I

50%

VOH

50%

---VOL

NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 50 kHz, d~ty cycle
B. Cl includes all probe and stray capacitance.
C. VIH = 2.5 V for UlN2064 and UlN2065. VIH = 10 V for UlN2065 and UlN2067.

FIGURE 8. SWITCHING TIMES

ELECTRICAL CHARACTERISTICS
COLLECTOR CURRENT
vs
BASE CURRENT
1.5
VCE - VCE(sat)
TA - 25°C
Dutv Cvcle = 9O%
ct

.!.c
e
:;

1.0

CJ
~

~r

~

~
0

CJ

I

0.5 -

S;

I

ULN2~~ / '

ULN2067

/

~N2064,
ULN2066

I)
-~
'"/

/
o

II

o

0.5

1.5

2

IB-Base Current-mA

FIGURE 9

TEXAS . "

4-166

INSTRUMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 76265

2.5

= 10%, Zo = 50 II.

ULN206' ULN206L ULN206~ ULN2067
QUADRUPLE HIGH-CURRENT DARLINGTON SWITCHES

THERMAL INFORMATION
MAXIMUM COLLECTOR CURRENT
vs
DUTY CYCLE

MAXIMUM COLLECTOR CURRENT
vs
DUTY CYCLE
2.0

2.0

TA _ 250C
N - Number of Outputs
Conducting Simultaneously

TA - 50°C
N - Number of Outputs
Conducting Simultaneously

c(

I

E
~

1.5

1\\
\ .'\ "-

'"

'"'- "

u

~

;0:

....

~

~ 1.0

1.0

"-

u
E
E

E

r-...

'"

.~'"
~

:2

}}

}}

.

·iii

0.5

I

I

o
o

0'--...L.---L_-'---L---l_...L.--'-_'--..L..-......J

o

10

20 30

40

50

60 70 80 90 100

10

"

"~"......
~

-til'::) ........

~~-"'" ~

20 30 40 50 60 70 80

Duty Cycle-%

-""

90 100

Duty Cycle-%

FIGURE 11

FIGURE 10
MAXIMUM COLLECTOR CURRENT
vs
DUTY CYCLE
2.0

TA = 70°C
N - Number of Outputs
Conducting Simultaneously

c(

I

E

~
u'"

1.5

\\ \

~

..!!

"0
u
E
E

1.0

:2

0.5

\.

-ti",> '-

"
""-- -- ----

\\\.

"""-- ......... ;,;....,

'-:d '" ~

'"
·iii

.

"- ......

1\1
.?~
~

j"

I

}}

o

o

10 20 30

40

50 60 70 80 90 100

Duty Cycle-%

FIGURE 12

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 865303. DALLAS, TEXAS 75265

4-167

ULN2064. ULN206t ULN206L ULN2067
QUADRUPLE HIGH·CURRENT DARLINGTON SWITCHES
APPLICATION INFORMATION

Vee

\~
~

i.--

TMS1000

W
~

~

1

16

2

15

3
14 "4 ULN2066 13
ULN2067 12
5
11
6

~
-

7

10

8

9

FIGURE 13. RELAY DRIVER INTERFACE

TEXAS ."

4·168

INS1R.UMENTS
POST OFFICE BOX 665303 • DALLAS. TEXAS 75285

~

\,~

.~

~)

ULN2068, ULN2069
QUADRUPlE HIGH·CURRENT DARLINGTON SWITCHES
02579, MAY 1980-REVISEO SEF'TEIVlBI'R 1986

•

Output Collector Current ... 1.5 A Max

•

2-W Dissipation Rating

NE PACKAGE
ITOPVIEWI

CLAMP

J

4C

•

High Output-Voltage Capability

•

Preamp for High Current Gain

•

Outputs Diode-Clamped for Inductive Loads

•

Common-Emitter Circuit for Current Sink

2B

•

Inputs Compatible With TTL and 5-V CMOS

NC
3C
2C '-C:"'---"'::...-' CLAMP

•

Designed for Interchangeability With
Sprague ULN2068 and ULN2069

1C

4B

1B
HEAT SINK, E, J
AND SUBSTRATE)

VCC
} HEAT SINK, E,
AND SUBSTRATE

3B

NC - No internal connection

schematic (each switch)

description
The ULN2068 and ULN2069 are monolithic
integrated circuits each consisting of four highvoltage, high-current n-p-n cascaded transistor
switches. Each switch includes a first stage
compatible with both TTL and 5-V CMOS signal
levels. The second and third stages form
uncommitted-collector outputs with commoncathode clamp diodes for switching inductive
loads.
The ULN2068 and ULN2069 can sink up to
1.5 A per switch. Applications include logic
buffers, MOS drivers, memory drivers, line
drivers, relay drivers, hammer drivers, lamp
drivers, and display drivers (LED and gas
discharge).

Vcc
9001l

CLAMP
INPUT
2.5 kll
B --"11\"""---1

OUTPUT

~----~~------c

Resistor values shown are nominal.

logic diagram (positive logic)

The ULN2068 and ULN2069 are characterized
for operation from -20°C to 85°C.

r-e-~~--~11~)CLAMP
19) CLAMP
12) 1C

logic symbol 1

18)

~~~~+-+---~2C

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.

PRODUCTION DATA documa.1s contain Informatio.
currant 8. of publicatian data. Products conform to
specifications par the terms of Taxas Instrumants
::::~ri;8[':I~tzi
:1~D::S':!:\::.s not

=::i:;

Copyright @ 1986. Texas Instruments Incorporated

TEXAS . "

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TEXAS 75266

4-169

ULN2068, ULN2069
QUADRUPLE HIGH-CURRENT DARLINGTON SWITCHES
absolute maximum ratings at 25 0 e free-air temperature for each switch (unless otherwise noted)
ULN2068
50
10
15
1.5
2075
-20 to 85
-55 to 150
260

Collector-emitter voltage
. Supply voltage, VCC (see Note 1)
Input voltage
Peak collector current (see Figures 10, 11, and 12)
Total power dissipation at (or below) 25·C free-air temperature (see Note 2)
Operating free-air temperature range
Storage temperature range
Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds

ULN2069
80
10
15
1.5
2075
-20t085
-55 to 150

UNIT
V
V
V
A
mW
·C
·C
·C

260

NOTES: 1. All voltage values (unless otherwise noted) are with respect to the emitter/substrate terminal E.
2. For operation above 25·C free-air temperature, derate total power linearly to 1079 mW at 85·C at the rate of 16.6 mW/·C.

electrical characteristics at 25°e free-air temperature, Vee - 5 V (unless otherwise noted)
PARAMETER
VCEX(sus)

Collector sustaining voltage

TEST
FIGURE
1

ICEX

Collector output cutoff current

2

I1(0n)

On-state input current

3

On-state input voltage

Vl(on)

VCE(set)

Collector-emitter
saturation voltage

Clamp-diode reverse current

IR

4

5

6

VF

Clamp-diode forward voltage

7

ICC

Supply current
(only one switch conducting)

8

TEST. CONDITIONS
VI = 0.4 V,

IC = 100mA

VCE - 50 V
VCE = 50 V,
VCE - 80 V
VCE = 80 V,
VI = 2.4 V
VI = 3.75 V
VCE = 2 V,
See Note 3
VI = 2.4 V,
VI = 2.4 V,
VI = 2.4 V,
VI = 2.4 V,
See Note 3
VI = 2.4 V,
See Note 3
VR = 50 V
VR = 50 V,
VR = 80 V
VR = 80 V,
IF = 1 A
IF = 1.5 V,
VI = 2.4 V,

TA = 70·C

ULN2068
MIN MAX
35
100
500

ULN2069
MAX

MIN
50

V

100
250
1000

500
250
1000

2.4

2.4

1.1
1.2
1.3

1.1
1.2
1.3

TA = 70·C

IC = 1.5 A,
IC
IC
IC
IC

=
=
=
=

500 mA
750 mA
1A
1.25 A,

IC

=

1.5 A,

TA = 70·C

IC = 500 mA

tPLH
tPHL

1.75
2

50
100
1.75
2

6

6

TEST CONDITIONS
See Figure 9

TEXAS . . ,
INSTRUMENlS
4-170

POST OFFICE BOX 855303 • DALLAS. TEXAS 75286

V

MIN

TYP

p.A

V
mA

s 10%.

characteristics at 25°e free-air temperature, Vee - 5 V

PARAMETER
Propagation delay time, low-to-high-Ievel output
Propagation delay time, high-to-Iow-Ievel output

p.A

1.5
50
100

NOTE 3: These parameters must be measured on one output at a time using pulse techniques, tw = 10 ms, duty cycle

s~itching

p.A

V

1.4

TA = 70·C
See Note 3

UNIT

MAX
1.5

ULN2068. ULN2069
QUADRUPLE HIGH-CURRENT DARLINGTON SWITCHES

PARAMETER MEASUREMENT INFORMATION
Vee

OPEN

veE

..leEX

OPEN

FIGURE 2. ICEX

FIGURE 1. VCEXlsus)
Vee

OPEN

Vee

OPEN

~1--04"""- OPEN

FIGURE 4. Vllon)

FIGURE 3. 11100')
Vee

OPEN

OPEN

FIGURE 6. IR
lee

OPEN

FIGURE 5. VCElsat)

FIGURE 7. VF

FIGURE 8. ICC

TEXAS •

INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS. TEXAS 76265

4-171

ULN2068, ULN2069
QUADRUPLE HIGH·CURRENT DARLINGTON SWITCHES
PARAMETER MEASUREMENT INFORMATION

._

,---",,-35 V
CLAMP

L\-~~2.4V

68.n,2W

:

)0<>-...GENERATOR
(See Note AI

......-

L

INPU~I.2V
tpHL ~

OUTPUT'

:

14-

ov

~ tPLH

....

Ir

~

CL = 15 pF
(See Note B)

OUTPUT

I

50%

VOH

50%

---VOL

TEST CIRCUIT

VOLTAGE WAVEFORMS

NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 50 kHz, duty cycle = 10%, Zo = 500.
B. CL includes all probe and stray capacitance.

FIGURE 9. SWITCHING TIMES

THERMAL INFORMATION
MAXIMUM COLLECTOR CURRENT

MAXIMUM COLLECTOR CORRENT

"

DUTY CYCLE

DUTY CYCLE
2.0

~'!. ~~~;r ~f oltpuL

'"
I

¥

2.0

TA=50oe

1.0

\~

il

I

!•

1.0

j

0."

I\, f'1""-

.€

" I'

",

N~

~

,,~

I 1.'

""" rt---- --r-

I
};

¥

:3
.~
~

JJ

,\
\i""-

S

f-

DUTY CYCLE

2.0

1.0

""-

,

~, .....
".>-~

I

};

o
o

10 20 30 40

50 60

70 SO 90 100

o

-

Conducting Simultaneously

1.5

I-h-+-+-+-+--k-+-+-+-l

1.0

I-I-f-->l:+",\

il

:3~

I\,

\

~

'"

r--... ....... ~

~

~

f'-

"'r-...

.?l'-<±:--t--!

0.'

H-+-+-t-r--.-W'N-:-O:·)--:\d""f-.--..J:::I'-:-I

or r-_f::

o '--'--'--'--"-"--'--'--'--'--'
10 20 30 40 50 60 70 80 90 100

Duty Cycle-%

Duty Cycle _.%

FIGURE 10

FIGURE 11

TEXAS . "

INSTRUMENTS
4·172

~

JJ

N = Number of Outputs-+-+-+-+-l

I

~
"0. ~ r-

0."

,--y--y--,-,-,.-,.-,.-,.-,..-,

TA=,ooe.l

'"

N = Number of Outputs
Conducting Simultaneously

'"

Conducting Simultaneously

MAXIMUM COLLECTOR CURRENT

POST OFFICE BOX 656303. DALLAS. TEXAS 76285

a

10

~

~

~

00 00

ro

Duty Cycle - %

FIGURE 12

00 00100

ULN2068, ULN2069
QUADRUPLE HIGH-CURRENT DARLINGTON SWITCHES
APPLICATION INFORMATION
v+
vee = 5 V

T

))

I

«

W
TMS 1000

i

L::

16
15
14

3
ULN2068

~:

ULN2069

13
12

6

11

7

10

8

9

~

-

il
FIGURE 13. RELAY DRIVER INTERFACE

TEXAS "
INSTRUMENTS
POST OFFICE BOX 656303 • DALLAS, TEXAS 75266

4-173

4-174

ULN2074, ULN2075
QUADRUPLE HIGH·CURRENT DARLINGTON SWITCHES
02580, MAY 1980- REVISED SEPTEMBER 1986

NE PACKAGE
/TOPVIEWI

•

Output Collector Current •.. 1.5 A Max

•

2·W Dissipation Rating

•

High Output·Voltage Capability

•

Output Sink· or Source· Current Capabilities

•

Input Compatible with TTL or 5·V CMOS

•

Designed for Interchangeability with
Sprague ULN2074 and ULN2075

lC

4C

lE

4E

HEATSINK l{B
AND

}4B HEATSINK
AND '

SUBSTRATE 2B

3B SUBSTRATE

2E
2C

3E
""1.::""'--::.1-'

3C

description
The ULN2074 and ULN2075 are monolithic,
quadruple, high-voltage, high-current n-p-n
darlington-transistor amplifier devices. They
feature high-voltage outputs with collectorcurrent ratings of 1 .5 A for each Darlington pair.
The ULN2074 and ULN2075 are unique generalpurpose devices, each featuring uncommitted
collectors and emitters to allow for either sinking
or sourcing the output current, These devices
offer the system designer the flexibility of
tailoring the circuit to the application, Typical
applications include logic buffers, relay drivers,
lamp drivers, and hammer drivers,

schematic (each switch)
350 Il

,..--_--OuTPuT C

NOM
INPUT B .....

""'---,...--1

7.2 kll NOM

3 kll NOM
L....-----i~-E
~SUBSTRATE

For proper operation. the substrate must be
connected to the most negative voltage.
The ULN2074 and ULN2075 are characterized
for operation from - 20 DC to 85 DC,

logic symbol t

I>
18(3)

(1) lC

-C

(2) 1E
(S)2C

28(6)

(7)

2E
(9)3C

(11)
38

(10)3E
(16) 4C

(14)
48

(1S14E

*This symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

PRODUCTION DATA d•• um •• ts .o.toi.
in'o.lIIIIlon .u,,101 II ., ....Iitlll.. dltl.
Prod.eta •••fI,., to ....1icatIa.. per tile ....
•, T.... ,..IrUII_ 1I""'"nI wlrn~.
P""'"otI.. ...-1...... not
inolude tull.1 0' III pI..IIIIII...

_.1Iy

Copyright @ 1986. Texas Instruments Incorporated

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 865303 • DALLAS, TeXAS 75285

4-175

ULN2074, ULN2075
QUADRUPLE HIGH-CURRENT DARLINGTON SWITCHES
absolute maximum ratings at 25°e free-air temperature for each switch (unless otherwise noted)
Collector-emitter voltage
Input voltage with respect to substrate
Peak collector current (see Figures 9, 10, and 11)
Input current
Total power dissipation at (or below) 25°C free-air temperature (see Note 1)

Operating free-air temperature range
Storage temperature range
Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds

ULN2074
50
30
1.5

ULN2075
80

UNIT
V
V

25
2075
-20 to 85

25
2075
-20 to 85
-55 to 150

60
1.5

-55 to 150
260

A
mA
mW
°C
°C
°C

260

NOTE 1: For operation above 25°C free-air temperature, derate total power linearly to 1079 mW at 85°C at the rate of 16.6 mW/oC.

electrical characteristics at 25°e free-air temperature (unless otherwise noted)
PARAMETER
VCEX(sus)

Collector sustaining voltage

TEST
FIGURE
1

TEST CONDITIONS
VI = 0.4 V,

IC = 100 mA

ULN2074
MIN MAX
35

Collector output cutoff current

2

Ilion)

On-state input current

3

Vllon)

On-state input voltage

4

VCE(sat)

Collector-emitter
saturation voltage

5

VCE
VCE
VCE
VI =
VI =

= 50 V,
- 80 V
= 80 V,
2.4 V
3.75 V

TA = 70°C

2
4.5

II = 625 pA,

IC = 500 mA

II = 935 ~A,
II = 1.25 mA,

Ic = 750 mA

11= 2 mA,
See Note 2
11= 2.25 mA,
See Note 2

IC - 1 A
IC = 1.25 A,

4.3
9.6
2

2
4.5

500
4.3

9.6

2.5

1.1
1.2
1.3

1.1

TEXAS .."
4-176

INSTRUMENTS
POST OFFICE BOX 655303 • DALLAS. TEXAS 75285

V

V

1.4
1.5

s 10%.

switching characteristics at 25 0 e free-air temperature. Vee = 5 V

See Figure 6

mA

1.2
1.3

Ie = 1.5 A,

TEST CONDITIONS

pA

2

2.5

NOTE 2: These parameters must be measured on one output at a time using pulse techniques, tw = 10 ms, duty cycle

PARAMETER
Propagation delay time, low-to-high-Ievel output
Propagation delay time, high-to-Iow-Ievel output

UNIT
V

100

TA = 70°C

IC = 1 A
IC = 1.5 A,

VCE = 2 V,
VCE = 2 V,
See Note 2

50
100
500

VCE = 50 V
ICEX

ULN2075
MIN MAX

MIN

TYP

MAX
1.5

ULN2074, ULN2075
QUADRUPLE HIGH·CURRENT DARLINGTON SWITCHES
PARAMETER MEASUREMENT: INFORMATION
VCE

OPEN

FIGURE 2. ICEX

FIGURE 1. VCEX(sus)

vI

I~.

1"

.

OPEN

FIGURE 4. Vl(on)

FIGURE 3. I1(0n)

II

FIGURE 5. VCE(sat)

35V

J-k

2.4V

1.2 V

680,2W
~)---_'-'-OUTPUT

GENERATOR
(See Note AI

CL - 15 pF
(See Note 81

INPUT

I
tpHL....
I

~
I

1.2 V

I
I
.....

0 V
....tpLH

I" -

OUT~T
I
I
50%

V
OH

50%

-

--VOL

VOLTAGE WAVEFORMS

TEST CIRCUITS

NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 50 kHz, duty cycle = 10%, Zo = 50 O.
8. CL includes all probe and stray capacitance.

FIGURE 6. SWITCHING CHARACTERISTICS

TEXAS ."

INSTRUMENlS
POST OFFICE BOX 865303 • DALLAS. TeXAS 75265

4-177

ULN2074, ULN2075
QUADRUPLE HIGH·CURRENT DARLINGTON SWITCHES
ELECTRICAL CHARACTERISTICS
INPUT CURRENT
vs
INPUT VOLTAGE
14
TA = '25°C
12 rNo Load

V

See Figure 3

<10
E
I

C
~

~~

~~

8

~A

'"

u

~ 6

"
].4

V

/

~~~/

V

/'

~~

IP'

2

o

/

.~ V
o

2
3
4
V,-Input Voltage-V

5

FIGURE 7

COLLECTOR CURRENT
vs
BASE -CURRENT
1.5
VCE - VCE(satl
TA - 25°C
Duty Cycle - 90%

<

/V
-1

/

I

C
2! 1 .0
:;

j-

u

"6

J



8

INDEX CORNER~

39)
40414243441

2

3

• • .

'1'

MIN

MAX

9
MAX

MIN

MAX

9.89
(0.3421
11.23
(0.4221
18.28
(0.6401
19.79
(0.7391

9.09
(0.3581
11.63
(0.4681
16.76
(0.8601
19.33
(0.7811
24.43
10.9821
29.69
11.1861

9.09
(0.3581
11.83
(0.4581
14.22
(0.51101
14.22
(0.6601
21.89
(0.8621
27.06
(1.0851

1.63
(0.0641
1.83
(0.0841
1.76
10.0891
2.08
(0.0821
2.08
(0.0821
2.08
10.0821

2.03
10.0601
2.03
(0.0601
3.05
(0.1201
3.05
(0.1201
3.06
(0.1201
3.05
(0.1201

A

29.93
(0.9381
28.83
(1.1351

C

• All dimensions and notes for the specified JEDEC outline apply to the
FK package.

0.635 (0.0251 TVP
[

K\HHH11~Hnj~;;;;;r

Ell fll ~Hnl !fill
rrn] IEHHUH11

f~

fj

0,835 x 1.27
10.026 )( 0.0601
TYPICAL
35 PlACES
(See Note AI

11 ~ ~ I?HB'j

i'HHUaUii

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
NOTE A: The checkerboard panern is aligned vertically with the contact. pads and is symmetrical horizontally as shown; it is applicable
to some 44-terminal packages only.

TEXAS

II

INSIRUMENIS
POST OFFICE BOX 855303 • DAlLAS. TEXAS 76285

MECHANICAL DATA

FN020. FN028. FN044. FN068. and FN084 plastic chip carrier packages
Each of these chip carrier packages consists of a circuit mounted on a lead frame and encapsulated within
an electrically nonconductive plastic compound. The compound withstands soldering temperatures with
no deformation. and circuit performance characteristics remain stable when the devices are operated in
high-humidity conditions. The packages are intended for surface mounting on solder lands on 1.27 (0.050)
centers. Leads require no additional cleaning or processing when used in soldered assembly.

FN020. FN028. FN044. FN068. and FN084
128-terminal package used for Illustratloni

12210048)
- - ' -1.0710.042)
'
.
X45°

0

/
4

3

2

1

28

27

26

25

h

6

24

D

7

23

5

~~:

22
21

I.

20

12

13

14

15

16

17

18

I

.r~1' 0.25 10.010)

1.

8
1
\+;_ _ _ _ _ _ A_IS_e_e_N_o_'e_A_)_-->i..

A

NO. OF
TERMINALS

20
28
44

68
84

MIN
9.78
10.3851
12,32
10.485)
17.40
10.685)
25.02
10.985)
30.10
11.185)

3 PLACES

RM X
A

C

B

30,35

MIN
8.89
10.350)
11.43
10.450)
16.51
10.650)
24.13
10.950)
29.21

11.195)

11.1501

MAX
10.03
10.395)
12.57
iO.495)
17,65
10.695)
25,27
10.996)

I

SEATING PLANE
ISee Note C)

MAX
9.04
10.356)
11.58

10.456)
16.66
10.656)
24.33
10.956)
29.41
11.158)

MIN
7.87
10.310)
10.41
10.410)
15.49
10.610)
23.11
10.910)
27.69
11.090)

MAX
8.38
10.330)
10.92
10.430)
16,00
10.630)
23.62
10.930)
28.70
11.130)

0.81 10.032) ~
0.66 10.026)

~T
1.52 10.060) MIN

i--...l
I ;;;64 10.025) MIN

0.51 10.020) ~ I ~
0.3610.014)
LEAD DETAIL

I

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Centerline of center pin each side is within 0.10 10.004) of package centerline as determined by dimension B.
B. Location of each pin is within 0.127 10.0051 of true position with respect to center pin on each side.
C. The lead contact points are planar within 0.1010.0041.

TEXAS

-II

INSlRUMENlS
POST OFFtCE BOX 655303 • DAlLAS. TEXAS 76265

5-9

MECHANICAL DATA

FT048
This package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound.
The compound will withstand soldering temperature with no deformation. and circuit performance
characteristics will remain stable when operated in high-humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.

rnmu

FT048

r:;;..
~.

20.2 (0.795)
19.8 (0.780)

--------- "+---r
14.2 (0.5591

~

INDEX MARKS t

16.0 ( 0 . & 3 0 1 = = j
15.& (0.&14)

l~:::J~E::::::::::::::::::::3~
»6_SEATING_!!IJ.ibW~~~IHJ-IJ.bl4J.l~~j.y.ibj.y.j,j.l,AAIdI.!----.-

2.10 (0.083)

lli'·90(0.075)

PLANE

I

0.310.0121
0.1 (0.004)
2,30 10.091) MAX

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

t There are two versions of the 48-lead FT package that differ in the position of the index mark in the top view. In one version. the mark
is near laad 3. in the other version. it is near lead 46. Consult the individual data sheet to see which applies for a particular device type.

TEXAS ~

5-10

INSIRUMENTS
POST OFFJCI!

sox 85&303 •

DAlLAS. TEXAS 71528& I

MECHANICAL DATA

HA06S quadriform flat package
The 58-pin HA package is housed in a quadriform flat package. It is hermetically sealed with O.05-inchlead spacing configured with gull-wing bent leads for surface mounting capability.
HA068

--T
1,27 (0.050) TYP

MINIMUM CLEAR
LEADFRAME ZONE
22.861 10.900)

3'05(~'120IMAX 4.32
~
10.1 70}

~~=.~
I

I

1.08 10.040) ~
0,76 (0.030)

1,24 (0.0491
0,99 (0.('1391

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

TEXAS

..If

INSTRUMENTS
POST OfFICE lOX 85N03 • DALLAS. TEXAS 75285

5-11

MECHANICAL DATA

HB068 quadriform flat package
The 68-pin HB package is housed in a quadriform flat package. It is hermetically sealed with O.05-inchlead spacing configured with straight leads for surface mounting capability.
HB06S

--~'.270 10.051 TVP

[,.0710.0421 MAX

M 4 , 3 9 10,'731 MIN

T~t ... ·····.··.
~

i(O)i •

.;

~

4.

0,2010.0081

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

TEXAS ."

5-12

INSTRUMENTS
POST OFFICE BOX 865303 • DALLAS. TEXAS 76266

MECHANICAL DATA

J014 ceramic dual-in-line package
This hermetically sealed dual-in-line package consists of a ceramic base, ceramic cap, and a lead frame.
Hermetic sealing is accomplished with glass. The package is intended for insertion in mounting-hole rows
on 7,62 (0.300) centers. Once the leads are compressed and inserted, sufficient tension is provided to
secure the package in the board during soldering. Tin-plated ("bright-dipped") leads require no additional
cleaning or processing when used in soldered assembly.

J014

t--~::~:~:~::

--j

i:::::::
1@@@@@CV9(i

0.6310.025) R NOM

_---l

~
-1 H

7.8710.310)
7.3710.290)
7.1110.280)
6,22 (0.245)

m
-~

1.27

lO

'~~:

I

050) NOM

,--l'~
.....

~.~~ ~~.~~:
14 PLACES

f4 1,78 (0.070) MAX 14 PLACES

8-11

5.08

~.200) I .~'~~~;;~;~~~~;;;.;~~;;~~!S~~~!~T

MAX

-SEATING PLANE

14 PLACES

_

0.51 10.020) MINl

.t~ ~

~ H H ).J

I.

_U

3,30M(I~130)

--1 r-

I- I

2,54 (0.100)

1--0.6~41~~~~k~IN

~

05810023)
0:38 10:015) 14 PLACES
(Sea Not •• 8 8. CI

1,78 (0.070)

PIN SPACING 2,54 (0.100) T.P.

4 PLACES

(See Note Al

Falls Within JEDEC TO-116 and EIA MO·001AA Dimensions
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
B. This dimension does not apply for solder·dipped leads.
C. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 (0,020) above the
seating plane.

TEXAS ."

INSlRUMENlS
POST OFFICE BOX 85&303 • DALLAS, TEXAS 7628&

5-13

MECHANICAL DATA

J016 ceramic'dual-in-line package
This hermetically sealed dual-in-line package consists of a ceramic base, ceramic cap, and a lead frame.
Hermetic sealing is accomplished with glass. The package is intended for insertion in mounting-hole rows
on 7.62 (0.300) centers. Once the leads are compressed and inserted, sufficient tension is provided to
secure the package in the board during soldering. Tin-plated ("bright-dipped") leads require no additional
cleaning or processing when used in soldered assembly.

J016

Ii.

Ii.

1.7810,0701 MAX 16 PLACES

SEALANT

1~~:

- SEATING PLANE - - - , - ' - - - - - - - , . - -

16 PLACES

I\..-

--00\

Ir--tl-tt---ttt 0'S;21~~~k~IN

j-Iii,
~

0,3610,0141
0,2010,0081
16 PLACES

L g,~ 10'g23!
0, 15
16 PLACES
IS•• Not••••nd Cf

~:~~ :~:~~~: 4 PLACES
• For memories of 64 bits and UP. a few MSIILSI products in Series 54174 and Series 545/745 that are
derived from memory circuit bars, and complex HCMOS parts. this maximum is 7.6210,3001, All other
dimensions apply without modification.

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0.25 (0.010) of its true lon~itudinal position.
B. This dimension does not apply for solder·dipped leads.
C. When solder-dipped leads are specified. dipped area of the lead extends from the lead tip to at least 0.51 (0.020) above the
seating plane.

TEXAS

5-14

..If

INSIRUMENlS
POST OFFICE BOX 865303 • DALLAS. TEXAS 7528&

MECHANICAL DATA

J020 ceramic dual-In-line package
This hermetically sealed dual-in-line package consists of a ceramic base, ceramic cap, and a lead frame.
Hermetic sealing is accomplished with glas5. The package is intended for insertion in mounting:hole rows
on 7,62 (0.300) centers. Once the leads are compressed and inserted, sufficient tension is provided to
secure the package in the board during soldering. Tin-plated ("bright-dipped") leads require no additional
cleaning or processing when used in soldered assembly.

J020

6

Ii

Ii

-,

~:~~:~:~~~:
7.62 (0 3OO)
6.22 (0246)

-;;or

-

20 PLACES

1.78 (0.070) MAX 20 PLACES

1.27 (0.050) NOM

~ S:~;~~G
105"

0000®®0®®@
GLASS
SEAI...ANT

(!

MAX

-\\.-~:a :~:~::
20 PLACES

~

4

3.30 130) ,
MIN

,.-_ _ _ _ _ _ y

f

0.305 (0.012) MIN
4 PLACES

J

'1

I~I

0,58 (0.023)
0.38 (0.015)
20 PLACES
(See Notes B &. C)

PIN SPACING 2.54 (0.100) T. P.
(See Note A)

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0,25 10.010) of its true longitudinal position.
B. This dimension does not apply for solder-dipped leads.
C. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 10.020) above the
seating plane.

TEXAS ",

INSTRUMENTS
POST OFFICE BOX 65&303 • DALLAS, TEXAS 71265

5-15

MECHANICAL DATA

JD ceramic side-braze dual-in-line packages
This is a hermetically sealed ceramic package with a metal cap and side-brazed tin-plated leads.

JD CERAMIC-SIDE·BRAZE

b

10----_.
-=-BMAX~~'I

,~~=~nD[]I
l
OR N U M B E R l b J

G)------------------~

If..
If..
Io--A--...t
1_ _I

wt
~:

II

0.3810.0151

-+110-- 0.20 10.0081

1.7810.0701
0.76 10.03.0Id

0.51 10.0201 MIN
_SEATING
PLANE

::J

*

3.1810.;251 MIN

j

0.5310.0211
0.38 10.0151

PIN SPACING
(See Note Al

~NI
DIM
A + 0.51 (+ 0.0201

-0.251-0.0101
B (MAXI
C INOMI

~NI
-0.25 (-0.0101
B IMAXI

c (NOMI

,

1-mvmmm5.0810.200IMAX

1.9141~Lo;~~SMAX.oj 1'-1
-.j 1+-:-2.5410.1001 NOM

DIM
A +0.51 (+0.0201

!o!:

16

18

20

22

24

7.62
10.3001
20,57

7.62
(0.3001
23,11

7,62

10,16

7,62

(0.3001
25,65

(0.8101

(0.9101

(1.0101

(0.4001
27.94
(1.1001

(0.3001
30,86
(1.2151

7,37
10.2901

7.37
(0.2901

7.37
(0.2901

9.91
(0.3901

10.2901

24

7.37

28

40

48

52

64

15.24
10.6001
52,1

15,24
(0.6001
62,2

15.24
10.6001

(2.0501

(2.4501

67.3
(2.6501

22.86
(0.9001
82,6

15.0
10.5901

15,0
(0.5901

15.0
10.5901

15,24

15,24

10,6001
31,8
(1.2501
15,0

10.6001
36.8
(1.4501
15,0

(0.5901

(0.5901

13.2501
22,6
(0.8901

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTE A: Each pin centerline is located within 0,25 (0.0101 of its true longitudinal position.

TEXAS ."

5-16

INSTRUMENlS
POST OFFICE BOX 655303 • DALLAS, TEXAS 76265

MECHANICAL DATA

JG008 ceramic dual-in-line package
This hermetically sealed dual-in-line package consists of a ceramic base, ceramic cap, and an 8-pin lead
frame. The package is intended for insertion in mounting-hole rows 7,62 (0.300) centers (see Note M.
Once the leads are compressed and inserted, sufficient tension is provided to secure the package in the
board during soldering.

JG008

0,63 (0.025) R NOM

10--_ _ _--1+-_ 7,87(0.310)
7,37 (0.290)

0008

7,11 (0.280)
6,22 (0.245)

....J_,

Er\

1,27 (0.050) NOM

1.78 (0.070) MAX 8 PLACES1
GLASS

I

5.08 (t.200)
MAX

--SEATING PLANE---.,-1--

105'

90'

8 PLACES

JI.-- 0.3610.014)
~\-

0,2010.008)
8 PLACES

I I
l I
I

I

PIN SPACING
F1-2,54 (0.100) T.P.
(See Note A)

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTE A: Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.

TEXAS ."

INSlRUMENTS
POST OFFICE BOX 866303 • DALLAS, TEXAS 75285

5-17

MECHANICAL DATA

KN015 plastic flange-mount package
This package comprises a circuit mounted on a lead frame and encapsulated within a plastic compound.
The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when the package is operated under high-humidity conditions.

KN015

~-------~::~~:~:~~:
9.83 10.3791

il7To3i9i
3.88 10.1451
3.4310.135)

::~~ :~: ~

!::

~---l

DtA

2 PLCS

~::~ :~:~:::

".
13,08 (O.S'5J~
12.32iiJ.4i5j

OIA

1,65 10.065)

1,2510.049)

!!
1.40 10.0651

1,1410.0461
-

0,7910.0311

~

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

TEXAS .."

5-18

INSTRUMENTS
POST OffiCE SOX 865303 • DALLAS. TEXAS 7&286

~::!~ :~:::::

MECHANICAL DATA

KV015 plastic package
This package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound,
The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when the package is operated under high-humidity conditions,
KV015

~

2.54101001
20_310 _08:..l-L

rr

W=~

~:~:~ ~!:: --

20.14 (0793)
' 9.89 (O 7831

~;::==+

___

4.62 (0.182)
3--,~!~ . ~_5~1 DIA.
3,75 (0.148)

4.37 -(0.112)

1,02 10.040)
ITVPI

.----.----.
~~.=.~=-~

17,62 10.6941

18,03 (0,710)

~:~~~

17,37 10.684}

17.63 (0.6901

ITYPI

10,82 {0.4261

10,57- iO.41SI
1.2710.0501
0,7610.030)

3.:.~~J.~~~1 DIA.

3,53 10.139)

4,52(0.1781

r-I-- I

2.7910.1101
2,2910.090)

3.76 to,148) ~'

ptN SPACING

1.27 (0.060) ISee Note AI

'

11
1-4 .•• 10.17'1
,
4.0410.1591
~ 5,33 {0.2101
•

0,66 {0.026}
0.51 {0.0201

4.83 10.1901

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTE A: Leads are within 0,36 (0.014) radius of true position (T.P.) at maximum material conditions.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 855303 • DALLAS, TEXAS 75285

5-19

MECHANICAL DATA

N014 plastic dual-In-line package
This dual-in-line packaga consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit
performance characteristics will remain stable when operated in high-humidity conditions. The package
is intended for insertion in mounting-hole rows on 7,62 (0.300) centers (see Note A). Once the leads are
compressed and inserted, sufficient tension is provided to secure the package in the board during soldering.
Leads require no additional cleaning or processing when used in soldered assembly.

N014

'i. 7.62. 0,25
1+----~(0.300. 0.Ol0}
6,35 ± 0,25

(0.250 ± 0.010)

(See Notes B and C)

Falls Within JEDEC TO-116 and EIA MO-001AA Dimensions
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0.25 (0.010) of its true longitudinal position.
B. This dimension does not apply for solder-dipped leads.
C. Whim solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 (0.020) above seating
plane.

TEXAS ."

5-20

INSTRUMENlS
POST OFFICE BOX 8&5303 • DALLAS. TEXAS 71288

MECHANICAL DATA

N016 plastic dual-in-line package
This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within an electrically
non conductive plastic compound. The compound will withstand soldering temperature with no deformation,
and circuit performance characteristics will remain stable when operated in high-humidity conditions. The
package is intended for insertion in mounting-hole rows on 7,62 (0.300) centers. Once the leads are
compressed and inserted. sufficient tension is provided to secure the package in the board during soldering.
Leads require no additional cleaning or processing when used in soldered assembly.

r-

N016

19.8 10.780) MAX

-1

~@@®@@@)0

7,62::t 0,25
10.300 ± 0.010)

6,35 ± 0,25
(0.250 ± 0.010)

v~:.:;::i:::::J

00000000

2,010.080) NOM

---1

. -L

'-,
- (D.01D) NOM
't.O,25

art'
16PLACES

11- g:~~:g:g~~:
--11'"""
16 PLACES
(See Notes Bend C)

L.

with the alternate side view at the

-.I
.,

3.1710.125) MIN

U~

t\~

~

UUU

0.84 ;0.033) MIN
12 PLACES

_IL ~3310.0211
--I J-" 0,38f1i[015i

1,65 (0.065)
0,38 (0.015)

4 PLACES
Parts may be supplied in accordance

~1,78 (0.070) MAX 16 PLACES

iO'020i~1

•I
0.51 MIN
5.0810.200) MAX
--SEATING PlANE--L..--,.-.--

16 PLACES
(See Notes Band CI

PIN SPACING 2,5410.100) T. P.
(See Note Al
ALTERNATE SIDE VIEW

option of TI plants located in EUrope.

In this case, the overall length of the
package is 22.1 (0.870) max.

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0.25 (0.010) of its true longitudinal position.
B. This dimension does not apply for solder-dipped leads.
C. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 (0.020) above seating
piane.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 85&303 • DALLAS. TEXAS 7&28&

5-21

MECHANICAL DATA

N01'8 'plastic dual-in-line package
This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within an electrically
nonconductive plastic compound. The compound will withstand soldering temperature with no deformation,
and circuit performance characteristics will rem'ain stable when operated in high-humidity conditions. The
package is intended for insertion in mounting-hole rows on 7,62 (0.300) centers. Once the leads are
compressed and inserted, sufficient tension is provided to secure the package in the board during soldering.
Leads require no additional cleaning or processing when used in soldered assembly.

N018
23.4 (0.920) MAX

7,82 t 0,25
(0.300 ± 0.010)

1----<"'""-.... (0.215) MAX

::::==i::!:!!:I
000000000

--t

-.i.. 2,0310.0801 NOM
--r
II- 0.25 (O.01D) NOM
-SEATING PLANE

~

'.09 (OJ)

t--"'.7810 070) MAX 18 PLACES

0'.'(0'020)~1
MIN

t
MAX

--*'!-J-

3,17 10.125) MIN

-

1,91 (0.076)
0,23 (0.009)
4 PLACES

...j

L

~

---..j

f-- 0.0' (D.035)

MIN
18 PLACES

I---(0,018
0,457< 0.076
± O.OO3)
18 PLACES
(See NOUtS B and C)

PIN SPACING 2,54(0 100) T.P.
(See Note AI

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
B. This dimension does not apply for solder-dipped leads.
C. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 (0.020) above seating
plane.

TEXAS ."

5-22

INSIRUMENlS
POST OFFICE 80X 666303 • DALlAS, TEXAS 76266

MECHANICAL DATA

N020 plastic dual-in-line package
This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within an electrically
nonconductive plastic compound. The compound will withstand soldering temperature with no deformation,
and circuit performance characteristics will remain stable when operated in high-humidity conditions. The
package is intended for insertion in mounting-hole rows on 7,62 (0.300) centers. Once the leads are
compressed and inserted, sufficient tension is provided to secure the package in the board during soldering.
Leads require no additional cleaning or processing when used in soldered assembly.

N020

'i.

'i.
7,62! 0,25
(0.300:t 0.010)

I<-----~~:~~ :~::~::-----ot

(See Notes B and C)

J~ ~
L
r-1,02 fO.0401
4 PLACeS

VIEWA

Parts may be supplied in accordance
with the alternate side view at the
option of TI. European-manufactured
parts may have pin 1 as shown in
viaw A. Alternate-aide-view parts

20 PLACES
(See Notes Band C\

{See Note AI

manufactured outside of the USA

may have a maximum package length
of 26.7 (1.0501.

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0,25 10.010) of its true longitudinal position.
B. This dimension does not apply for solder-dipped leads.

C. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 10.0201 above seating
plane.

TEXAS

-II

INSTRUMENTS
POST OfFICE BOX 855303 • DALLAS. TEXAS 76266

5-23

MECHANICAL DATA

N022 plastic dual-in-line package
This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within an electrically
nonconductive plastic compound. The compound' will withstand soldering temperature with no deformation,
and circuit performance characteristics will remain stable when operated in high-humidity conditions. The
package is intended for insertion in mounting-hole rows on 10,16 (0.400) centers. Once the leads are
compressed and inserted, sufficient tension is provided to secure the package in the board during soldering.
Leads require no additional cleaning or processing when used in soldered assembly.

N022
~------28.5 (1.1201 M A x - - - - - o o I

I@@@®@@@@G@®

.f-E.

~::::::::]
0000000008@

'i.

10.1., 0,2 •
...._ _ _-.+_10.400 lI: 0.0101
ISe8 NOle 81

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0,25 (0.0101 of its true longitudinal position.
B. This dimension does not apply for solder-dipped leads.
.
C. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 (0.020) above seating
plane.

TEXAS ~

5-24

INSTRUMENTS
POST OFFICE BOX 8&&303 • DAlLAS. _AS 7&28&

MECHANICAL DATA

N02S plastic dual-in-line package
This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within an electrically
nonconductive plastic compound. The compound will withstand soldering temperature with no deformation,
and circuit performance characteristics will remain stable when operated in high-humidity conditions. The
package is intended for insertion in mounting-hole rows on 15,24 (0.600) centers. Once the leads are
compressed and inserted, sufficient tension is provided to secure the package in the board during soldering.
Leads require no additional cleaning or processing when used in soldered assembly.

N028
10------36.611.4401 M A X - - - - - - 0 1

Ii

~

K

15,24 ± 0,25

'i

10'600 ± 0'0101~

:x

0.51 10.0201

0,28±0,08----\\4""
(0.011 ± 0.003)
28 PLACES

(See Notes 8 and C)

lr

MIN~'----------'-r

L1~~ . ~_S~t;~~G~--i\..
0,46±0,08
(0.018 ± 0.003)

PIN SPACING 2.54 (0.100) T.P.
(See Notes B and C)
{See Note AI

II I

j

28 PLACES

1,40 ± 0,18

:,:::':::I:~:
0,84 10.0331 MIN
1,21 + 0 51
(0 050 ~ 0'0201
'4 PLACES

10.055 ± 0.00701

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
B. This dimension does not apply for solder-dipped leads.
C. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 (0.020) above seating
plane.

TEXAS ~

INSTRUMENTS
POST OFFICE BOX 856303 • DALLAS. TEXAS 76266

MECHANICAL DATA

N040 plastic dual-in-line package
This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within an electrically
nonconductive plastic compound. The compound will withstand soldering temperature with no deformation.
and circuit performance characteristics will remain stable when operated in high-humidity conditions. The
package is intended for insertion in mounting-hole rows on 15.24 (0.600) centers. Once the leads are
compressed and inserted. sufficient tension is provided to secure the package in 'the board during soldering.
Leads require no additional cleaning or processing when used in soldered assembly.

N040

I'

'I

53.112.0901 MAX

·~~~~~t::::::::::::::::I]o

,@

0,61 (O.020J

~h=~~~:;~;:~~~:;~~~~~:;=rl'
,000
90'"

-SEATING PLANE.,--

0,28 :1:.0,08
(0.011 • 0.0031,,\\0-

0,14 (0.033) MIN

40 PLACES
1\
(Sa. Nohl' B and Ct

2,41 10.016)
1,40 (O.066)

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0.25 (0.010) of its true longitudinal position.
B. This dimension does not apply for solder-dipped leads.
C. When solder-dipped leads are specified. dipped area of the lead extends from the lead tip to at least 0.51 (0.020) above seating
plane.

TEXAS

5-26

..If

INSTRUMENlS
I'OIlT OFFICE BOX 816303 • DALLAS. TEXAS

naee

MECHANICAL DATA

NE016 plastic dual-in-line package
This dual-in-line package consists of a circuit mounted on a 16-pin lead frame and encapsulated within
an electrically nonconductive plastic compound. The compound will withstand soldering temperature with
no deformation, and circuit performance characteristics will remain stable when operated in high-humidity
conditions. For better heat dissipation there are internal tabs connecting the two central leads on each
side of the 16-pin package. The package is intended for insertion in mounting-hole rows on 7,62 (0.300)
centers. Once the leads are compressed and inserted, sufficient tension is provided to secure the package
in the board during soldering. Leads require no additional cleaning or processing when used in soldered
assembly.

NE016

r

19.8 10.7801 MAX

--1

~@)@®@@@)®

7,62:t 0,25
10.300' 0.0101

6,35

t

0,25

(0.250:1: 0.0101

2.010.0801 NOM

'~~:~={:::::J

00000000

.--*-

~."--r't.O,25 (0.010) NOM

--l

•I

5.08 10.2001 MAX

--L

--SEATING PlANE--'"----.....r--i

:9if
16 PLACES

--\1- g:~~ ig:g~~l
16 PLACES

1-"-1.78 10.0701 MAX 16 PLACES

0'5110'020)~1
MIN
-I

~

U~

f\ f\

~

UUU
_I
.....,

L

0.84 iO.0331 MIN
12 PLACES

0.533 10.0211

J-" ~

(Se. Notes B and C)

16 PLACES
IS.8 Note. 8 and C)
PIN SPACING 2.54 10.1001 T. P.
(See

Peru may be supplied in accordance
with the alternate side v;ew at the
option of TI plants located in Europe.
In this case, the overall length of the
package is 22,1 (0.870) max.

Note Al

ALTERNATE SIDE VIEW

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES:

A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
B. This dimension does not apply for solder-dipped leads.
C. When solder-dipped leads are specified. dipped area of the lead extends from the lead tip to at least 0.51 10.020) above seating
plane.

TEXAS ."

INSTRUMENTS
POST OFFICE BOX 866303 • DALLAS. TEXAS 7528&

5-27

MECHANI~AL

DATA

.NEQ20 plastic dual-in-line package
this dual-In-line package consists of a circuit mounted on a lead frame and encapsulated within an electrically
nonconductive plastic compound. The compound win withstand soldering temperature with no deformation, and
circuH performance characteristics will remain stable when oPerated In high-humidity conditions. For better heat
dissipation there are Intemal tabs connecting the two central leads on each side of the 2Q-pln package. The
package is intended for Insertion In mounting-hole rows on 7,~2 (0.300) centers. Once the leads are compressed
and Inserted, sufficient tension Is provided to secure the package in the board during soldering. Leads require
no additional cleaning or processing when used in soldered assembly.
NE020

2,4 10.093) R NOM
2,8 (0.1101 NOM -

Ii.

~Pi=i=in=:;:;:::y;t=i=t=7T=r;t=i=r=iT~

Ii.
1,62%0,25
10.300 t 0.0101

CASE TEMPERATUIIE
MEAIUAEMENTPONr

10--__+1+7,'1 (0.280)

i.ii«i.2iOi

Io---------~~~:~:~::----~

(S88 Notes Band Cl

J~ ~
L
r-'.02 (O.040)
4'f'lACeS

VIEWA

Parts may b. tupplied in accordance
with the .Itemate side view at the
option of TI. European-manufactured
p.rts may hav. pin 1 as shown In
view A. Alt.rnate·slde-view parts
manufactured outskl. of the USA
mav have a maximum package length
of 26.7 (1.0501.

(See Now AI

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A.Each pin centerHne Is located within 0,25 (0.010) 01 lib! true longitudinal posftiion .
.B. This dimenSion doss not apply for sotder- or --

Logic negation at output. Internal' produces external 0.

~

Active-low input. Equivalent to ~ in positive logic

I:::----

Active-low output. Equivalent to

~

Active-low input in the case of right-to-Ieft signal flow

--....::I

Active-low output in the case of right-to-Ieft signal flow

--4-

Signal flow from right to left. If not otherwise indicated. signal flow is from left to right.

...........

Bidirectional signal flow

F"'m' {
inputs
active
on
indicated
transition

3.3

°

~

produces internal ,.

P-- in positive logic

POSITIVE
LOGIC

NEGATIVE
LOGIC

POLARITY
INDICATION

'Lo

,5°

not used

not used

not used

H~L

oS'

°L,

L~H

~

Nonlogic connection. A label inside the symbol will usually define the nature of this pin.

~

Input for analog signals (on a digital symbol) (see Figure ,,)

--1L.J
-~

Input for digital signals (on an analog symbol) (see Figure ,')

Symbols Inside the Outline
Table 3 shows some symbols used inside the outline. Note particularly that open-collector (open-drain),
open-emitter (open-source), and three-state outputs have distinctive symbols. Also note that an EN input
affects all of the outputs of the element and has no effect on inputs. An EN input affects all the external
outputs of the element in which it is placed, plus the external outputs of any elements shown to be
influenced by that element. It has no effect on inputs. When an enable input affects only certain outputs, '
affects outputs located outside the indicated influence of the element in which the enable input is placed,
and/or affects one or more inputs, a form of dependency notation will indicate this (see 4.9). The. effects
of the EN input on the various types of outputs are shown.
It is particularly important to note that a D input is always the data input of a storage element. At its
internal 1 state, the D input sets the storage element to its 1 state, and at its internal 0 state it resets
the storage element to its 0 state.
The binary grouping symbol will be explained more fully in Section 6.11. Binary-weighted inputs are
arranged in order and the binary weights of the least significant and the most significant lines are indicated
by numbers. In this document weights of input and output lines will be represented by powers of two
usually only when the binary grouping symbol is used, otherwise decimal numbers will be used. The
grouped inputs generate an internal number on which a mathematical function can be performed or that
can be an identifying number for dependency notation. This number is the sum of the weights
(1, 2, 4 ... 2n) of those input standing at their 1 states. A frequent use is in addresses for memories.
Reversed in direction, the binary grouping symbol can be used with outputs. The concept is analogous
to that for the inputs and the weighted outputs will indicate the internal number assumed to be developed
within the circuit.

6-7

Table 3. Symbols Inside the Outline

-/.cr
~1--

Bithreshold input (input with hysteresisl
N-P-N open-collector or similar output that can supply a relatively lowimpedance L level when not turned off. Requires external
pull-up. Capable of positive-logic wired-AND connection.
Passive-pull-up output is similar to N-P-N open-collector output but is
supplemented with a built-in passive pull-up.
N-P-N open-emitter or similar output that can supply a relatively lowimpedance H level when not turned off. Requires external pull-down.·
Capable of positive-logic wired-OR connection.
Passive-pull-down output is similar to N-P-N open-emitter output but is
supplemented with a built-in passive pull-down.
3-state output
Output with more than usual output capability (symbol is oriented in the direction of signal flow).
Enable input
When at Its internal 1-state, all outputs are enabled.
When at its internal O-state, open-collector, open-emitter outputs, and three-state outputs at
external high-impedance state, and all other outputs (i.e .• totem-poles) are at the internal O-state.

J, K, R, S, T

Usual meanings associated with flip-flops (e.g., R = reset, T = toggle)

Data input to a storage element eql,Jivalent to:

.,-jSR
Lq

Shift right (left) inputs, m = 1, 2. 3, etc. If m = 1, it is usually not shown.

Binary grouping. m is highest power of 2. Produces a number equal to the sum of the weights
of the active inputs
Input line grouping ... indicates two or more terminals used to implement a Single logic input.
e.g., differential inputs.

3.4

Combinations of Outlines and Internal Connections
When a circuit has one or more inputs that are common to more than one element of the circuit. the
common-control block may be used. This is the only distinctively shaped outline used in the lEG system.
Figure 2 shows that unless otherwise qualified by dependency notation. an input to the common-control
block is an input to each of the elements below the common-control block.
COMMON·CONTROL BLOCK

b--f--f
b

c
d

d----i
Figure 2. Common-Control Block

6-8

The outlines of elements may be embedded within one another or abuttea to form complex elements,
in which case the following rules apply. There is no logic connection between elements when the line
common to their outlines is in the direction of signal flow. There is at least one logic connection when
the line common to two outlines is perpendicular to the direction of signal flow. If no indications are
shown on either side of the common line, it is assumed that there is only one logic connection. If more
than one internal connection exists between adjacent elements, the number of connections will be clarified
by the use of one or more of the internal connection symbols from Table 4 and/or appropriate qualifying
.
symbols or dependency notation.
Table 4. Symbols for Internal Connections
--~-E--

Internal connection. 1 state on left produces 1 state on right.

---2---

Negated internal connection. 1 state on left produces 0 state on right.

---E':--~-

Dynamic internal connection. Transition from 0 to 1 on left produces transitory 1 state on
right.
Dynamic internal connection. Transition from 1 to 0 on left produces transitory 1 state on
right.

Table 4 shows symbols that are used to represent internal connection with specific characteristics. The
first is a simple non inverting connection, the second is inverting, the third is dynamic. As with this symbol
and an external input line, the transition from 0 to 1 on the left produces a momentary l-state on the
right. The fourth symbol is similar except that the active transition on the left is from 1 to O.
Only logic states, not levels, exist inside symbols. The negation symbol (
) is used externally.
direct polarity indication (

) is used ini:ernally even when

In an array of elements, if the same general qualifying symbol and the same qualifying symbols associated
with inputs and outputs would appear inside each of the elements of the array, these qualifying symbols
are usually shown only in the first element. This is done to reduce clutter and tel save time in recognition.
Similarly, large identical elements that are subdivided into smaller elements may each be represented
by an unsubdivided outline. The SN75163B symbol (see 6.5) illustrates this principle.

4

Dependency Notation
Some readers will find it more to their liking to skip this section and proceed to the explanation of the
symbols for a few actual devices in 6.0. Reference will be made there to various parts of this section
as it is needed. If this procedure is followed, it is recommended that 5.0 be read after 6.0 and then
all of 4.0 be reread.

4.1

General Explanation
Dependency notation is the powerful tool that sets the lEG symbols apart from previous systems and
makes compact, meaningful, symbols possible. It provides the means of denoting the relationship
between inputs, outputs, or inputs and outputs without actually showing all the elements and
interconnections involved. The information provided by dependency notation supplements that provided
by the qualifying symbols for an element's function.
In the convention for the dependency notation, use will be made of the terms "affecting" and "affected."
In cases where it is not evident which inputs must be considered as being the affecting or the affected
ones (e.g., if they stand in an AND relationship), the choice may be made in any convenient way.

6-9

So far, eleven types of dependency have been defined but only the eight used in this book are explained.
They are listed below in the order in which they are presented and are summarized in Table 5 following

4.10.2.
Section

4.2
4.3
4.4

4.5
4.6

4.7
4.8
4.9
4.10

4.2

Dependency Type or Other Subject
G,AND
General Rules for Dependency Notation
V, OR
N, Negate (Exclusive-OR)
Z, Interconnection
X, Transmission
C, Control
EN, Enable
M, Mode

G (AND) Dependency
A common relationship between two signals is to have them ANDed together. This has traditionally
been shown by explicitly drawing an AND gate with the signals connected to the inputs of the gate.
The 1972 IEC publication and the 1973 IEEE/ANSI standard showed several ways to show this AND
relationship using dependency notation. While ten other forms of dependency have since been defined,
the ways to invoke AND dependency are now reduced to one.
In Figure 3 input b is ANDed with input a and the complement of b is ANDed with c. The letter G has
been chosen to indicate AND relationships and is placed at input b, inside the symbol. A number
considered appropriate by the symbol designer (1 has been used here) is placed after the letter G and
also at each affected input. Note the bar over the 1 at input c.

•

b

c

~

--

1

~1
1

=~--­

c~
Figure 3. G Dependency Between Inputs

In Figure 4, output b affects input a with an AND relationship. The lower example shows that it is the
internal logic state of b, unaffected by the negation sign, that is ANDed. Figure 5 shows input a to be
ANDed with a dynamic input b.

·E[~r-b

Figure 4. G Dependency Between Outputs and Inputs

Figure 5. G Dependency with a Dynamic Input

6-10

The rules for G dependency can be summarized thus:
When a Gm input or output (m is a number) stands at its internal 1 state, all inputs and outputs affected
by Gm stand at their normally defined internal logic states. When the Gm input or output stands at
its 0 state, all inputs and outputs affected by Gm stand at their internal 0 states.

4.3

Conventions for the Application of Dependency Notation in General
The rules for applying dependency relationships in general follow the same pattern as was illustrated
for G dependency.
Application of dependency notation is accomplished by:
1.

2.

Labeling the input (or output) affecting other inputs or outputs with the letter symbol indicating
the relationship involved (e.g., G for AND) followed by an identifying number, appropriately
chosen, and
Labeling each input or output affected by that affecting input (or output) with that same number.

If it is the complement of the internal logic state of the affecting input or output that does the affecting,
then a bar is placed over the identifying numbers at the affected inputs or outputs (Figure 3).
If two affecting inputs or outputs have the same letter and same identifying number, they stand in an
OR relationship to each other (Figure 6).

8=[G1-

b

G1

c

1

&
.~1

b

c

Figure 6. ORed Affecting Inputs
If the affected input or output requires a label to denote its function (e.g., "D"), this label will be prefixed
by the identifying number of the affecting input (Figure 12).
If an input or output is affected by more than one affecting input, the identifying numbers of each of
the affecting inputs will appear in the label of the affected one, separated by commas. The normal reading
order of these numbers is the same as the sequence of the affecting relationships (Figure 12).

4.4

V (OR) Dependency
The symbol denoting OR dependency is the letter V (Figure 7).
When a Vm input or output stands at its internal 1 state, all inputs and outputs affected by Vm stand
at their internal 1 states. When the Vm input or output stands 3t its internal 0 state, all inputs and outputs
affected by Vm stand at their normally defined internal logic states.

1=: - =ro: -~:
Figure 7. V (OR) Dependency

6-11

4.5

N (Negate) (Exclusive-OR) Dependency
The symbol denoting negate dependency is the letter N (Figure 8). Each input or output affected by
an Nm input or output stands in an Exclusive-OR relationship with the Nm input or output.
When an Nm input or output stands at its internal 1 state, the internal logic state of each input and
each output affected by Nm is the complement of what it would otherwise be. When an Nm input or
output stands at its internal 0 state, all inputs and outputs affected by Nm stand at their normally defined
internal logic states.

If. = D. then c = b
If a = 1, then c = b

Figure 8. N (Negate) (Exciusive-ORI Dependency

4.6

Z (Interconnection) Dependency
The symbol denoting interconnection dependency is the letter Z.
Interconnection dependency is used to indicate the existence of internal logic connections between inputs,
outputs; internal inputs, and/or internal outputs.
The internal logic state of an input or output affected by a Zm input or output will be the same as the
internal logic state of the Zm input or output, unless modified by additional dependency notation (Figure 9).

'W'

a-f~]-b

-

f=zj>-.

-

t~zj>-.

-

a=tlj-c

--

b

lZ~

~.

where

---0- =-1>-

where

--CJ-=-
Ml

b

EN

Figure 15. Type of Output
Determined by Mode

6-15

Table 6. Summary of Dependency Notation
TYPE OF

LETTER

AFFECTING INPUT

DEPENDENCY

SYMBOL"

AT ITS 1·STATE

Control

Permits action

C

AFFECTING INPUT
AT ITS C·STATE

Prevents action
Prevents action of inputs

Enable

EN

AND

Permits action

Permits action

o outputs turned off
\l outputs

at external high impedance

Other outputs at internal 0 state
Imposes 0 state

Mode

G
M

Permits action fmode selected)

Prevents action (mode not selected)

Negate (Ex-NOR)

N

Complements state

No effect

OR

V
X
Z

Imposes 1 state

Permits action

Bidirectional connection exists

Bidirectional connection does not exist
Imposes 0 state

Transmission

Interconnection

Imposes 1 state

• These letter symbols appear at the AFFECTING input (or output) and are followed by a number. Each input (or output)
AFFECTED by that input is labeled with that same number.

5

Bistable Elements
The dynamic input symbol and dependency notation provide the tools to identify different types of bistable
elements and make synchronous and asynchronous inputs easily recognizable (Figure 16).

C~

D-U-

C~

0-U-

Ri}Rf}C

C1

o

10

S

S

C1

C

o
S

Transparent latch with true and complement outputs

Edge·triggered flip-flop, 0 input enabled momentarily
as C goes from 1 to 0

Edge-triggered flip-flop, D input enabled momentarily
as C goes from low to high. Asynchronous active-low
set and reset inputs. Active-low output

Same flip-flop shown in positive logic

10

S

Figure. 16. Latches and Flip-Flops
Transparent latches have a level-operated control input. The 0 input is active as long as the C input
is at its internal 1 state. The outputs respond immediately. Edge-triggered elements accept data from
.0, J, K, R, or S inputs on the active transition of C.
Notice that synchronous inputs can be readily recognized by their dependency labels (a number preceding
the functional label, ·1 D in these examples) compared to the asynchronous inputs (S and R), which are
not dependent on the C inputs. Of course if the set and reset inputs were dependent on the C inputs,
their labels would be similarly modified (e.g., 1S, 1R).

6-16

6

Examples of Actual Device Symbols
The symbols explained in this section include some of the most complex in this book. These were chosen,
not to discourage the reader, but to illustrate the amount of information that can be conveyed. It is
likely that if one reads these explanations and follows them reasonably well, most of the other symbols
will seem simple indeed. The explanations are intended to be independent of each other so they may
seem somewhat repetitious. However each illustrates new principles. They are arranged more or less
in the order of complexity.

6.1

SN75437A Quadruple Peripheral Driver
There are four identical sections. The symbology is
complete for the first element; the absence of any
symbology for the other elements indicates they are
identical. The top two elements share a common
output clamp, pin 2. This is shown to be a nonlogic
connection by the superimposed X on the line. the
function for this type of connection is indicated
briefly and not necessarily exactly by a small amount
of text within the symbol. The bottom two elements
likewise share a common clamp.
.
Each element is shown to be an inverter with
amplification (indicated by [». Taking TTL as a
reference, this means that either the input is
sensitive to lower level signals, or the output has
greater drive capability than usual. The latter applies
in this case. The output is shown by Q to be open
collector.
All the outputs share a common EN input, pin 14. See Figure 2 for an explanation of the common control
block. When EN = 0 (pin 14 is low), the outputs, being open-collector types, are turned off and would
be pulled high by an external pullup resistor.

6.2

SN75128 8-Channel Line Receiver

1S
25

1A
2A

3A
4A
SA

6A
7A
SA

There are eight identical sections. the symbology is
complete for the first element; the absence of any
symbology for the next three elements indicates they
are identical. Likewise the symbology is complete for
the fifth element; the absence of any syrtlbology for
the next three elements indicatSs they are identical
to the fifth.
Each element is shown to be an inverter with
amplification (indicated by [». Taking TTL as a
reference, this meims that either the input is
sensitive to lower level signals, or the output has
greater drive capability than usual. The former
applies in this case. Since neither the symbol for
open-collector ( Q ) or 3-state ( \l ) outputs is
shown, the outputs are of tHe totem-pole type.

The top four outputs are shown to be affected by affecting input number 1, which is EN 1, meaning
they will be enabled if EN1 = 1 (pin 1 is high). See 4.9 for an explanation of EN dependency. If pin
1 Is low, EN1 = 0 and the affected outputs will go to their inactive (high) levels. Similarly, the lower
four outputs are controlled by pin 11.

6-17

6.3

SN75122 Triple Line Receivers
There are two identical sections. The symbology is
complete for the first section; the absence of any
symbology for the next section indicates it is
identical. Likewise the symbology is complete for the
third section, which is similar, but not identical, to
the first and second.
The top section may be considered to be an OR
element (~1) with two embedded ANDs (&1. one of
which has an active-low amplified input ( I> ) with
hysteresis (.J:T ), pin 14. This is ANDed with pin 15
and the result is ORed with the AND of pins 1 and
2. The output of the OR, pin 13, is active-low.

18

2R

2S
2A
28

3R

The third section is identical to the first except that
pin 12 has no input ANDed with it. Since neither the
symbol for open-collector ( Q ) or 3-state ( 'il )
outputs is shown, the outputs are of the totem-pole
type.

3S
3A

6.4

SN75113 Differential Line Drivers with Split 3-State Outputs
There are two similar elements in the array. The first
is a 2-input AND element (indicated by &); the
second has only a single input. Both elements are
shown to have special amplification (indicated
by 1». Taking TTL as a reference, this means that
either the input is sensitive to lower level signals, or
the output has greater drive capability than usual.
The latter applies in this case.

lC (7)
EN 1

cc
EN 2
2C

(4) lYP

Each element has four outputs. Pins 4 and 3 are a
pair consisting of one open-emitter output ( ~ ) and
lZP
one open-collector output ( Q ). Relative to the AND
18 161
lZS
function, both are active high. Pins 1 and 2 are a
I>
similar pair but relative to the AND function, both are
2YP
2YS
active low. All outputs of a single, unsubdivided
2A .(11)
2ZP
element always have identical internal logic states
2ZS
determined by the function of the element except
when otherwise indicated by an associated symbol
or label inside the element. Here there is no such
contrary indication. All four outputs are shown to be
affected by affecting input number 1 , which is EN 1,
meaning they will all be enabled if EN1
1. See 4.9 for an explanation of EN dependency. If EN1 = 0,
all the affected outputs will be turned off. EN1 is the output of an AND gate (indicated by &) whose
active-high inputs are pins 7 and 9. Both pins 7 and 9 must be high to enable the outputs of the top
element. Assuming they are enabled and that pins 5 and 6 are both high, the internal state of all four
outputs will be a 1. Pins 4 and 3 will both be high, pins 1 and 2 will both be low. The part is designed
so that pins 3 and 4 may be connected together creating an active-high 3-state output. Likewise pins
1 and 2 may be connected together to create an active-low 3-state output.
lA (5)

lYS

All that has been said about the first element regarding its outputs and their enable inputs also applies
to the second element. Pins 9 and 10 are the enable inputs in this case.

6-18

6.5

SN75163B Octal General-Purpose Interface Bus Transceiver
There are eight 110 ports on each side. pins 2 through
9 and 12 through 19. There are eight identical
channels. The symboiogy is complete for the first
channel; the absence of any symbology for the other
channels indicates they are identical. The eight
bidirectional channels each have amplification from
left to right. that is. the outputs on the right have
increased drive capability (indicated by C». and the
inputs on the right all have hysteresis (indicated
by..rr).
The outputs on the left are shown to be 3-state
outputs by the ~. They are also shown to be
affected by affecting input number 4. which is EN4.
meaning they will be enabled if EN4 = 1 (pin 1 is
low). See 4.9 for an explanation of EN dependency.
If EN4 = 0 (pin 1 is high). the affected outputs will
go to their high-impedance (off) states.
The labeling at pin 2. which applies to all the outputs on the right. is unusual because the outputs
themselves have an unusual feature. The label includes both the symbol for a 3-state output ( ~) and
for an open-collector output (Q ). separated by a slash indicating that these are alternatives.
The symbol for the 3-state output is shown to be affected by affecting input number 1. which is M 1.
meaning the ~ label is valid when M1 = 1 (pin 11 is high). but is to be. ignored when M1 = 0 (pin
11 is low). See 4.10 for an explanation of M (mode) dependency. Likewise the symbol for the opencollector output is shown to be affected by affecting input number 2. which is M2. meaning the ~
label is valid when M2 = 1 {pin 11 is low). but is to be ignored when M2 = 0 (pin 11 is high). These
labels are enclosed in parentheses (used as in algebra); the numeral 3 indicates that in either case the
output is affected by EN3. Thus the right-hand outputs will be off if pin 1 is low. It can now be seen
that pin 1 is the direction control and pin 11 is used to determine whether the outputs are of the 3-state
or open-collector variety.

6-19

6.6

SN75161B Octal IEEE Std 488 Interfllce Bus Transceiver
DC (11)

EN1/c:'l4

TE

EN2/G5

(1)

ATN

EDI

REN

There are eight I/O ports on each side, pins 2 through
9 and 12 through 19. Pin 13 is not only an I/O port;
the line running into the common-control block (see
Figure 2) indicates that it also has control functions.
Pins 1 and 11 are also controls. The eight
bidirectional channels each have amplification from
left to right, that is, the outputs on the right have
increased drive capability (indicated by [», l:Ind the
inputs on the right all have hysteresis (indicated
byD'l. All of the outputs are shown to be of the
3-state type by the'i7 symbol except for the outputs
at pins 9, 4, and 5, which are shown to have passive
pullups by the ~ symbol.

IFC

Starting with a typical 1/0 port, pin 18, the output
portion is identified by an arrow indicating right-toleft signal flow and the three-state output symbol
NOAC
( 'i7). This output is shown to be affected by
affecting input number 1, which is EN 1, meaning it
will be enabled as an output if EN' = , (pin" is
high). See 4.9 for an explanation of EN dependency.
If pin 11 is low, EN' = 0 and the output at pin 18
will be in its high-impedance (off) state. This also applies to the 3-state outputs at pins' 3 and 19 and
to the passive-pull up outPl,lt at pin 9. On the other hand, the outputs at pins 8, 2, 3, and , 2 all are
affected by the complement of EN 1. This is indicated by the bar over the , at each of those outputs.
They are enabled only when pin l ' is low. Thus one function of pin , 1 is to serve as direction control
for the first, third, fourth, and fifth channels.
DAV

Similarly it can be seen that pin' serves as direction control for the Sixth, seventh, and eighth chanl'lels.
If pin 1 is high, transmission will be from left to right in the sixth channel, right to left in the seventh
and eighth. These tranI/missions are reversed if pin' is low.
The qirection control for the second channel, EN3, is more complex. EN3 is the output of an OR (O!: ')
function. One of the inputs to this OR is the active-high signal on pin 13. This signal is shown to be
affected at the input to the OR gate by affecting input number 5, which is G5, meaning that pin 13
is ANDed with pin' before entering the OR gate. See 4.2 for an explanation of G (AND) dependency.
The other input to the g~ is the active-low signal on pin , 3. This signal is ANDed with the complement
of pin' 1 before entering the OR gate. This is indicated by the G4 at pin 1 and the 4 with a bar over
it at pin' 3. Thus for EN3 to stand at the 1 state, which would enable transmission from pin 14 to pin 7,
both pins 13 and , must be high or both pins 13 and' .11 must be low.

6-20

6.7

SN75500EAC Plasma Display Driver with CMOS-Compatible Inputs
CMOS/PLASMA DISP

14) 101

22
23
24
25
Z6
Z7

8.11
1.12

8.12
1.13

8.13
1.14

I>
I>
I>
I>
I>
I>

111) 108
112) 201

119) 208
129) 301

122) 308
137) 401

The heart of this device and its symbol is an 8-bit
shift register. It has a single D input, pin 2, which
is shown to be affected by affecting input number 9,
which is C9, meaning it will be enabled if C9 = 1.
See 4.8 for an explanation of C dependency and 5.0
for a discussion of bistable elements. Since the C
input is dynamic, the storage elements are edgetriggered flip-flops. While C9 = 1, which in this case
will occur on the transition of pin 3 from low to high,
the state of the D input will be stored. Pin 2 is shown
to be active low so to store a 1, pin 2 must be low.
In addition to controlling the D input, pin 3 is shown
by 1- to have an additional function. As pin 3 goes
from low to high, data stored in the shift 'register is
shifted one pOSition. The right-pointing arrow means
that the data is shifted away from the control block
(down) ..

On the right side of the symbol an abbrevia~ion
technique has been used that is practical only when
the internal labels and the pin numbers are both consecutive. Thus it should be clear that the input of
the element whose output is pin 5 is affected by affecting input number 2, just as the input of the element
whose output is pin 4 is affected by affecting input number 1. Affecting inputs 1 through 8 are Z inputs
(Zl through Z8), which means their signals are tranferred directly to the output elements. See 4.6 for
an explanation of Z dependency.
28

8.14

I>

130) 408

The inputs of the 32 implicitly shown output elements are also shown to be affected by affecting inputs
numbers 11, 12, 13, and 14 in four blocks of eight each. These inputs will be found in the "common
control block preceded by a letter G and a brace. The brace is called the binary grouping symbol. It
is equivalent to a decoder with outputs in this case driving four G inputs (G 11, G12, G13, and G 14).
The weights of the inputs to the coder are shown to be 2 0 and 21 for pins 1 and 39, respectively. The
decoder has four outputs corresponding to the four possible sums of the weights of the activated decoder
inputs. If pins 1 and 39 are both low, the sum of the weights = 0 and G11 = 1. If pin 1 is low while
pin 39 is high, the sum = 2 and G13 = 1 and so forth. G indicates AND dependency, see 4.2. Only
one of the four affecting G inputs at a time can take on the 1 state. The block of eight output elements
affected by that G input are enabled; the 0 state is imposed on the other 24 output elements and externally
those output pins are low.
Because of their high-current, high-voltage characteristics, the outputs are labeled with the amplification
symbol!> . All the outputs share a common EN input, pin 38. See Figure 2 for an explanation of the
common control block. When EN = 0 (pin 38 is high), the outputs take on their internal 0 states. Being
active high, that means they are forced low.

6-21

6:8

SN75551 Electroluminescent Row Driver with CMOS-Compatible Inputs
CMOS/EL OISP
SUBSTRATE (21)
'COMMON
STROBE (23)

[Q SOURCE SUPPLY)

2.3
2.3

C>
C>

Q

2.3

C>

2.3

C>

Q
Q

Q

(26) 01
(27)02

···

(40)

Q15

(1)

016

·

The heart of this device and its symbol is a
32-bit shift register. It has a single D input,
pin 24, which is shown to be affected by
affecting input number 1, which is C1,
meaning it will be enabled if C1 = 1. See 4.8
for an explanation of C dependency and 5.0
for a discussion of bistable elements. Since
the C input is dynamic, the storage elements
are edge-triggered flip-flops. While C 1 = 1,
which in this case will occur on the transition
of pin 20 from high to low, the state of the
D input will be stored. Pin 24 is shown to be
active high so to store a 1, pin 24' must be
high.

2.3 C>
Q (16) 031
r..------+"'2."'3-=C>'---:::Q;:I.. (17) 032

In addition to controlling the D input, pin 20
is shown by 1- to have an additional function.
As pin 20 goes from high to low, data stored
in the shift register is shifted one position. The
right-pointing arrow means that the data is shifted away from the control block (down). The internal
inputs of the output buffers are all shown to be affected by affecting inputs 2 and 3. Affecting input
2 is G2, meaning that pin 19 is ANDed with each of the internal register outputs, which are the buffer
inputs. If pin 19 is high, the affected buffer inputs are enabled . .If pin 19 is low, the 0 state is imposed
on the affected buffer inputs. See 4.2 for an explanation of G(AND) dependency. Affecting input 3
is V3, meaning that pin 23 (active 'low) is ORed with each of the internal register outputs. If pin 23
is high, V3 = 0 and the affected buffer inputs are enabled. If pin 23 is low, V3 = 1 and the 1 state
is imposed on the affected buffer inputs. See 4.4 for an explanation of V (OR) dependency. The effect
of V3 is taken into account after that of G2 because of the order in which the labels appear. This means
that the imposition' of the 1 state on the internal buffer inputs by pin 23 would take precedence over
the imposition of the 0 state by pin 19 in case both inputs were active. Pin 18 is shown to be an output
directly from the thirty-second stage of the shift register. Pins 19 and 23 do not affect this output.
(18) SERIAL OUT

An abbreviation technique has been used for the shift register elements and associated the output lines.
This technique is practical only when the pin numbers and pin names are both consecutive.
The symbol Q designates 'an n-p-n open-collector or similar output. In this device, the outputs are actually
open-drain n-channel field-effect transistors. Instead of being grounded, the sources of these transistors
are all connected to pin 21. This pin is used as an input to control the output voltage.

6-22

NOTES

NOTES

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