1993_Macronix_Memory_Data_Book 1993 Macronix Memory Data Book
User Manual: 1993_Macronix_Memory_Data_Book
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: :. Y
..
'
. . ATM
MACRONIX. INC.
MACRONIX INC.
MEMORY DATA BOOK
The Company
Macronix Inc., a leader in high density non-volatile memory technology, designs, manufactures, and markets high
performance ROMs, EPROMs and FLASH memory components for the world's most sophisticated computers, data
communication devices and electronics products.
Dedicated to providing a wide range of advanced communication solutions, the company's innovative product line includes
integrated FAX modems, LAN controllers and UARTs, as well as high resolution graphic and PC chip sets.
History
Macronix Inc., operational since 1987 was founded by former members of the VLSI Technology Inc. start-up group. The
dynamic Macronix management team has more than eighty years combined experience in the semiconductor field and is
committed to providing the most advanced VLSI solutions for the worldwitle electronics industry. Headquartered in San
Jose, the company has grown Significantly and will continue to expand to serve the rapidly evolving global electronics
market.
Dedicated to innovative deSign, superior quality products and responsive customer service, Macronix is one of the major
U.S. semiconductor suppliers providing total turnkey solutions and a fully compatible product line for ROM, EPROM and
FLASH memory.
Macronix International was established December, 1989 in Taiwan to provide a world class semiconductor fabrication
facility to meet the industry's needs on a more global scale. A member of the Semiconductor Industry Association (SIA)
since 1990, Macronix has formed significant alliances around the world.
Quality Assurance
Dedicated to the highest level of quality assurance, Macronix has invested significant capital in the most advanced
manufacturing and testing equipment to insure the superior quality and reliability that is so critical in large volume production.
Quality and reliability are built into products throughout the development and manufacturing stages, then verified through
rigorous testing, characterization and qualification phases before shipping.
3
----
IYI.ATM
MACRONIX, INC.
TABLE OF CONTENTS
PAGE
I. GENERAL INFORMATION
1.
2.
3.
4.
5.
ALPHANUMERIC INDEX .................................................................................................................. 1-1
PRODUCT INTRODUCTION ............................................................................................................2-1
PRODUCT SELECTION GUIDE ....................................................................................................... 3-1
CROSS REFERENCE GUIDE ......................................................................................................... 4-1
ORDERING INFORMATION ............................................................................................................. 5-1
II. EPROMs (ERASABLE PROGRAMMABLE READ ONLY MEMORIES)
DATA SHEETS
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
MX27C256
MX27C512
MX27C1 000/1 001
MX27C1100
MX27C1024
MX27C2000
MX27C2100
MX27C2048
MX27C4000
MX27C4100
MX27C4096
256K
512K
1M
1M
1M
2M
2M
2M
4M
4M
4M
(32K x 8)
(64K x 8)
(128K x 8)
(128K x 8/64K x 16)
(64K x 16)
(256K x 8)
(256K x 8/128K x16)
(128K x 16)
(512K,x 8)
(512K x 8/256K x 16)
(256K x 16)
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
EPROM ........................................... 6-1
EPROM ........................................... 7-1
EPROM ........................................... 8-1
EPROM ........................................... 9-1
EPROM ......................................... 10-1
EPROM ......................................... 11-1
EPROM ......................................... 11-1
EPROM ......................................... 12-1
EPROM ......................................... 12-1
EPROM ......................................... 13-1
EPROM ......................................... 13-1
III . MASK ROMs (MASK PROGRAMMABLE READ ONLY MEMORIES)
DATA SHEETS
1.
2.
3.
4.
5.
6.
7.
8.
MX23C1 000/1 01 0
MX23C2000
MX23C2100
MX23C4000
MX23C4100
MX23C8000
MX23C8100
MX23C1610
1M
2M .
2M
4M
4M
8M
8M
16M
(128K x 8)
(256Kx 8)
(256K x 8/128K x 16)
(512K x 8)
(512K x 8/256K x 16)
(1M x8)
(1M x 8/512K x 16)
(2M x 8/1M x 16)
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
MASK
MASK
MASK
MASK
MASK
MASK
MASK
MASK
ROM ................................. 14-1
ROM .................................. 15-1
ROM ................................. 16-1
ROM ................................. 17-1
ROM ................................. 18-1
ROM ................................. 19-1
ROM ................................. 20-1
ROM ................................. 21-1
1M
4M
(128Kx8)
(512Kx 8)
CMOS
CMOS
FLASH MEMORY ......................... 22-1
FLASH MEMORY ......................... 23-1
IV. FLASH MEMORY
1. MX28F1000
2. MX28F4000
V. PACKAGE INFORMATION
VI. DISTRIBUTION CHANNEL
4
IYIATM
MACRONIX. INC.
GENERAL INFORMATION
EPROM DATA SHEETS
II
MASK ROM DATA SHEETS
III
FLASH MEMORY
IV
PACKAGE INFORMATION
V
DISTRIBUTION CHANNEL
VI
5
I..~
.
IYIATM
MACRONIX, INC.
I. GENERAL INFORMATION
IVIATM
MACRONIX, INC.
1. ALPHANUMERIC INDEX
MX23C1000/1010
1M
(128K x 8)
CMOS MASK ROM .................................... 14-1
MX23C2000
2M
(256Kx 8)
CMOS MASK ROM .................................... 15-1
MX23C2100
2M
(256K x 8/128K x 16)
CMOS MASK ROM .................................... 16-1
MX23C4000
4M
(512K x 8)
CMOS MASK ROM .................................... 17-1
MX23C4100
4M
(512K x 8/256K x 16)
CMOS MASK ROM .................................... 18-1
MX23C8000
8M
(1M x 8)
CMOS MASK ROM .................................... 19-1
MX23C8100
8M
(1M x 8/512K x 16)
CMOS MASK ROM .................................... 20-1
MX23C1610
16M
(2M x 8/1 M x 16 )
MX27C256
256K (32K x 8)
CMOS EPROM ............................................. 6-1
MX27C512
512K (64K x 8)
CMOS EPROM ............................................. 7-1
MX27C1000/1001
1M
(128K x 8)
CMOS EPROM ............................................. 8-1
MX27C1024
1M
(128K x 8)
CMOS EPROM ............................................. 9-1
MX27C1100
1M
(128K x 8/64K x 16)
CMOS EPROM ............................................. 9-1
MX27C2000
2M
(256K x 8)
CMOS EPROM ........................................... 10-1
MX27C2048
2M
(128K x 16 )
CMOS EPROM ........................................... 11-1
MX27C2100
2M
(256K x 8/128K x 16)
CMOS EPROM ........................................... 11-1
CMOS EPROM ........................................... 12-1
CMOS MASK ROM ................................... :21-1
MX27C4000
4M
(512K x 8)
MX27C4096
4M
(256K x 16)
CMOS EPROM ........................................... 13-1
MX27C4100
4M
(512K x 8/256K x 16)
CMOS EPROM ........................................... 13-1
MX28F1000
1M
(128K x 8)
CMOS FLASH MEMORy ............................ 22-1
MX28F4000
4M
(512K x 8)
CMOS FLASH MEMORy ............................ 23-1
IYIATM
MACRONIX. INC.
2. PRODUCT INTRODUCTION
2-1. EPROM
CAPACITY
PROCESS
CMOS
CMOS
H
H
CONFIGURATION
PART NO.
32Kx8
MX27C256I
64Kx8
MX27C512I
REMARKS
MX27C1000
JEDEC PIN OUT
MX27C1001
MASK ROM PIN OUT
MX27C1024
JEDEC PIN OUT
MX27C1100
MASK ROM PIN OUT
MX27C2000
MX27C2048
JEDEC PIN OUT
MX27C2100
MASK ROM PIN OUT
MX27C4000
512K x 8/256K x 16
2-1
MX27C4096
JEDEC PIN OUT
MX27C4100
MASK ROM PIN OUT
IYIAm
MACRONIX, INC.
2-2. MASK ROM
CAPACITY
PROCESS
CONFIGURATION
REMARKS
PART NO.
f - - - - - - - I MX23C1000
1------11
MX23C1010
I
L - -_ _..J
32 PIN EPROM
COMPATIBLE
1 - - - - - - - 1 MX23C2000
MX23C2100
256Kx8/128Kx16
x8/x16 SWITCHABLE
1 - - - - - - - 1 MX23C4000
x8/x16 SWITCHABLE
MX23C4100
1 - - - - - - - 1 MX23C8000
---lH
L...-_ _ _ _ _
2M x 811M x 16
2-2
MX23C8100
MX23C1610
I
x8/x16 SWITCHABLE
x8/x16 SWITCHABLE
IYIATM
MACRONIX. INC.
2-3. FLASH MEMORY
CAPACITY
PROCESS
CONFIGURATION
REMARKS
PART NO.
MX28F1000
MX28F4000
2-3
I
IYIATM
MACRONIX. INC.
3. PRODUCT SELECTION GUIDE
3.1 EPROM
CONFIGURATION
SPEED (NS)
TECHNOLOGY
PACKAGE
MX27C256DC
32Kx8
55170/90/100/120/150
CMOS
28 PIN CERAMIC DIP
MX27C256PC
32Kx8
55170/90/100/120/150
CMOS
28 PIN PLASTIC DIP
MX27C256MC
32K x 8
55170/90/1 001120/150
CMOS
28 PIN PLASTIC SOP
MX27C256QC
32Kx8
55170/90/100/120/150
CMOS
32 PIN PLCC
MX27C512DC
64Kx8
55170/90/100/120/150
CMOS
28 PIN CERAMIC DIP
MX27C512PC
64K x 8
55170/90/100/120/150
CMOS
28 PIN PLASTIC DIP
MX27C512MC
64Kx8
55170/90/1 00/1201150
CMOS
28 PIN PLASTIC SOP
MX27C512QC
64Kx8
55170/90/100/120/150
CMOS
32 PIN PLCC
MX27C1000DC
128K x 8
55170/90/120/150
CMOS
32 PIN CERAMIC DIP
MX27C1000PC
128K x 8
55170/90/120/150
CMOS
32 PIN PLASTIC DIP
MX27C1000QC
128K x 8
55/70/90/120/150
CMOS
32 PIN PLCC
MX27C1000MC
128K x 8
55170/901120/150
CMOS
32 PIN PLASTIC SOP
MX27C1001DC
128K x 8
70/90/1201150
CMOS
32 PIN CERAMIC DIP
MX27C1024DC
64K x 16
90/120/150
CMOS
40 PIN CERAMIC DIP
MX27C1024PC
64K x 16
90/120/150
CMOS
40 PIN PLASTIC DIP
MX27C1024QC
64K x 16
90/120/150
CMOS
44 PIN PLCC
MX27C1100DC
128K x 8/64K x 16
90/120/150
CMOS
40 PIN CERAMIC DIP
MX27C1100PC
128K x 8/64K x 16
90/120/150
CMOS
40 PIN PLASTIC DIP
MX27C2000DC
256Kx 8
90/120/150
CMOS
32 PIN CERAMIC DIP
MX27C2000PC
256K x 8
90/120/150
CMOS
32 PIN PLASTIC DIP
MX27C2048DC
128K x 16
90/120/150
CMOS
40 PIN CERAMIC DIP
MX27C2048PC
128K x 16
90/120/150
CMOS
40 PIN PLASTIC DIP
MX27C2048QC
128Kx16
90/120/150
CMOS
44 PIN PLCC
CAPACITY
PART NUMBER
256K
512K
1M
2M
4M
MX27C2100DC
256K x 8/128K x16
90/120/150
CMOS
40 PIN CERAMIC DIP
MX27C2100PC
256K x B/12BK x16
90/120/150
CMOS
40 PIN PLASTIC DIP
MX27C4000DC
512K x B
120/150
CMOS
32 PIN CERAMIC DIP
MX27C4000PC
512K x B
120/150
CMOS
32 PIN PLASTIC DIP
MX27C4096DC
256K
x 16
120/150
CMOS
40 PIN CERAMIC DIP
MX27C4096PC
256K x 16
120/150
CMOS
40 PIN PLASTIC DIP
MX27C4096QC
256K x 16
120/150
CMOS
44 PIN PLCC
MX27C4100DC
512K x B/256K
x 16
120/150
CMOS
40 PIN CERAMIC DIP
MX27C4100PC
512K x B/256K x 16
120/150
CMOS
40 PIN PLASTIC DIP
3-1
IlViA~
MACRONtlC, INC.
3.2 MASK ROM
CAPACITY
PART NUMBER
CONFIGURATION
SPEED (NS)
TECHNOLOGY
PACKAGE
1M
MX23C1000PC
128K x 8
150/200
CMOS
28 PIN PLASTIC DIP
MX23C1000MC
128K x 8
150/200
CMOS
28 PIN PLASTIC SOP
MX23C1010PC
128K x 8
150/200
CMOS
32 PIN PLASTIC DIP
MX23C1010MC
128K x 8
150/200
CMOS
32 PIN PLASTIC SOP
MX23C2000PC
256K x 8
150/200
CMOS
32 PIN PLASTIC DIP
MX23C2000MC
256K x 8
150/200
CMOS
32 PIN PLASTIC SOP
MX23C2100PC
256K x 8/128K x16
150/200
CMOS
40 PIN PLASTIC DIP
32 PIN PLASTIC DIP
2M
4M
8M
16M
MX23C4000PC
512K x 8
120/150/200
CMOS
MX23C4000MC
512K x 8
120/150/200
CMOS
32 PIN PLASTIC SOP
MX23C4100PC
512K x 8/256K x16
120/150/200
CMOS
40 PIN PLASTIC DIP
MX23C8000PC
1Mx8
120/150/200
CMOS
32 PIN PLASTIC DIP
MX23C8000MC
1Mx8
120/150/200
CMOS
32 PIN PLASTIC SOP
MX23C8100PC
1M x 8/512K x16
120/150/200
CMOS
42 PIN PLASTIC DIP
MX23C8100MC
1M x 8/512K x16
1201150/200
CMOS
44 PIN PLASTIC SOP
MX23C1610PC
2M x 8/1M x 16
120/150/200
CMOS
42 PIN PLASTIC DIP
MX23C1610MC
2Mx8/1Mx16
120/150/200
CMOS
44 PIN PLASTIC SOP
3-2
IVIArM
MACRONIX. INC.
3.3 FLASH MEMORY
CAPACITY
PART NUMBER
CONFIGURATION
1M
MX2BF1000PC
MX2BF1000MC
4M
SPEED (NS)
TECHNOLOGY
PACKAGE
12BK x B
120/150/200
CMOS
32 PIN PLASTIC DIP
12BK x B
120/1 50/200
CMOS
32 PIN PLASTIC SOP
MX2BF1000QC
12BK x B
120/150/200
CMOS
32 PIN PLCC
MX2BF1000TC
12BK x B
120/150/200
CMOS
32 PIN PLASTIC TSOP
MX2BF4000PC
512KxB
120/150/200
CMOS
32 PIN PLASTIC DIP
MX2BF4000MC
512K x B
120/150/200
CMOS
32 PIN PLASTIC SOP
MX2BF4000TC
512K x B
120/150/200
CMOS
32 PIN PLASTIC TSOP
3-3
. . ATM
MACRONIX. INC.
4. CROSS-REFERENCE GUIDE
4.1 EPROM
CAPACITY CONFIGRUATION MACRONIX
INTEL
AMD
N.S.
S.G.S.
NEC
TOSHIBA
HITACHI
FUJITSU
MITSUBISHI
TI
256K
32Kx8
MX27C256
i27C256
Am27C256
NMC27C256
M27C256
I1PD27C256
TC57256
HN27C256
MB27C256
M5M27C256
TMS27C256
512K
64Kx8
MX27C512
i27C512
Am27C512
NMC27C512
M27C512
I1PD27C512
TC57512
HN27C512
MB27C512
M5M27C512
TMS27C512
1M
128K x 8
MX27C1000
i27C010
Am27C010
NMC27C010
M27C1001
I1PD27C1001
TC571 000
HN27C101
MB27C1001
M5M27C101
TMS27C010
i27C210
Am27C1024
NMC27C1024
M27C1024
I1PD27C1024
i27C020
Am27C020
NMC27C020
M27C2001
I1PD27C2001
Am27C2048
NMC27C2048
t
2M
4M
128K x 8
MX27C1001
64K x 16
MX27C1024
64K x 16/128Kx 8
MX27C1100
M27C1000
TC571 001
HN27C301
MB27C1000
TC571024
HN27C1024
MB27C1024 M5M27C102
256K x 8
MX27C2000
64K x 16
MX27C2048
64K x 16/256K x8
MX27C2100
512K x 8
MX27C4000
i27C040
Am27C040
M27C4001
IlPD27C4001
TC574000
HN27C4001
MB27C4000 M5M27C401
TMS27C040
256K x 16
MX27C4096
i27C240
Am27C4096
M27C4002
I1PD27C4096
TC574096
HN27C4096
MB27C4096 M5M27C402
TMS27C240
256K x 16/512Kx8
MX27C4100
i27C400
I1PD27C4000
TC574200
M5M27C201
TMS27C020
M5M27C202
IYIATM
MACRONIX. INC.
4.2 MASK ROM
CAPACITY
CONFIGURATION
MACRONIX
SHARP
NEC
TOSHIBA
HITACHI
FUJITSU
1M
128K x 8
MX23C1000
LH531 000
IlPD23C1000
TC531 000
HN62321
MB831 000
128K x 8
MX23C1010
LH530800
IlPD23C1001
TC531 001
IlPD23C2001
TC532000
MITSUBISHI
SAMSUNG
KM23C1000
KM23C1010
LH530900
2M
f'
N
4M
8M
16M
256Kx 8
MX23C2000
LH532100
256K x 8/128Kx16
MX23C2100
LH532000
HN62302
512K x 8
MX23C4000
LH534300
IlPD23C4000
TC534000
HN62314
MB834000
M5M23401
KM23C4000
512K x 81256Kx16
MX23C4100
LH534000
IlPD23C4001
TC534200
HN62414
MB834100
M5M23400
KM23C4100
1M x8
MX23C8000
LH538100
IlPD23C8001
TC538000
HN62328
MB838000
M5M23801
KM23C8000
1M x 8/512Kx16
MX23C8100
LH538000
IlPD23C8000
TC538200
HN62428
MB838200
M5M23800
KM23C8100
2M x 811 Mx16
MX23C1610
LH5316000
IlPD23C16000 TC5316200
M5M23160
KM23C1610
MB832000
KM23C2000
KM23C2100
HN624017
----
IVIATM
MACRONIX. INC.
5. ORDERING INFORMATION
MX
xx
c
x
XXXX
X
X-
XX
IpEED
DEVICE TYPE
*27: EPROM
* 23: MASK ROM
*55:
*90:
* 10:
* 12:
* 15:
*20:
50 ns
90ns
100 ns
120 ns
150 ns
200 ns
PROCESS
*C : CMOS
TEMPERATURE RANGE
CAPACITY & MODE
PACKAGE
*C:
0-70" C
* I : -40-85° C
* M : -55-125° C
*P
*M
*Q
*0
*F
*T
:
:
:
:
:
:
PLASTIC DIP
PLASTIC SOP
PLASTIC PLCC
CERAMIC DIP
PLASTIC QFP
PLASTIC TSOP
(Normal type)
*R : PLASTIC TSOP
(Reverse type)
REVERSION
* BLANK: NONE
* A : FIRST
*B : SECOND
5-1
IYIATM
MACRONIX, INC.
II. EPROM
(ERASABLE PROGRAMMABLE READ ONLY
MEMORY)
. . ATM
MX27C256
MACRONIX, INC.
25BK-BIT(32K x B) CMOS EPROM
FEATURES
•
•
•
•
•
•
•
•
•
32K x 8 organization
Single +5V power supply
+ 12.5V programming voltage
Fast access time: 55170/90/100/120/150 ns
Totally static operation
Completely TTL compatible
Operating current: 40mA
Standby current: 100JlA
Package type:
- 28 pin ceramic DIP, plastic DIP
- 32 pin PLCC
GENERAL DESCRIPTION
from outside the system, existing EPROM programmers
may be used. The MX27C256 supports intelligent quick
pulse programming algorithm which can result in programming times of less than ten seconds.
The MX27C256 is a 5V only, 256K-bit, ultraviolet Erasable Programmable Read Only Memory. It is organized
as 32K by 8 bits, operates from a single + 5volt supply,
has a static standby mode, and features fast single
address location programming. All programming signals
are TTL levels, requiring a single pulse. For programming
This EPROM is packaged in industry standard 28 pin,
dual-in-line packages or 32 lead, PLCC packages.
PIN CONFIGURATIONS
BLOCK DIAGRAM
CDIP/PDIP
vee
28
J
27
.J A14
A7
26
1
A6
25
J A8
A5
24
1 A9
CD
III
...
.......><
A4
A3
9
22
::;;
20
10
19
11
18
01
12
17
02
13
14
16
GND
A11
23
U
15
A13
-~-----1
AO-A14
ADDRESS
INPUTS
J
---.--.
-----
03
VCC_
VP~
GND---+
PIN DESCRIPTION
PLCC
AS
5
1
4
32
PIN NAME
AO-A14
Address Input
A8
A5
A4
A11
NC
A3
MX27C256
A2
SYMBOL
6E
00-07
Data InpuVOutput
CE
Chip Enable Input
OE
Output Enable Input
A1
A10
VPP
Program Supply Voltage
AO
CE
NC
No Internal Connection
vce
Power Supply Pin (+5V)
GND
Ground Pin
07
13
14
17
06
L••,
0 a'" (!lz0 0z a'" 0 C3
PIN: PM0153
REV. 4.0, APR. 09, 1993
6-1
MX27C258
FUNCTIONAL DESCRIPTION
have sufficient margin. After the final address is
completed, the entire EPROM memory is verified at VCC
=5V±10%.
THE ERASURE OF THE MX27C256
The MX27C256 is erased by exposing the chip to an
ultraviolet light source. A dosage of 15 W seconds/cm2
is required to completely erase a MX27C256. This
dosage can be obtained by exposure to an ultraviolet
lamp - wavelength of 2537 Angstroms (A) - with
intensity of 12,000 IlW/cm2 for 15 to 20 minutes. The
MX27C256 should be directly under and about one inch
from the source and all filters should be removed from the
UV light source prior to erasure.
FAST PROGRAMMING
The device is set up in the fast programming mode when
the programming voltage VPP = 12.75V is applied, with
VCC = 6.25 V and OE = VIH (Algorithm is shown in Figure
2). The programming is achieved by applying a single TIL
low level 1OOIlS pulse to the CE input after addresses and
data line are stable. If the data is not verified, an additional
pulse is applied for a maximum of 25 pulses. This process
is repeated while sequencing through each address of
the device. When the programming mode is completed,
the data in all address is verified at VCC = VPP = 5V ±
10%.
It is important to note that the MX27C256, and similar
devices, will be cleared for all bits of their programmed
states with light sources having wavelengths shorter than
4000 A. Although erasure times will be much longer than
that with UV sources at 2537A, nevertheless the
exposure to fluorescent light and sunlight will eventually
erase the MX27C256 and exposure to them should be
prevented to realize maximum system reliability. If used
in such an environment, the package window should be
covered by an opaque label or substance.
PROGRAM INHIBIT MODE
Programming of multiple MX27C256s in parallel with
different data is also easily accomRlished bY..!Jsing the
Program Inhibit Mode. Except for CE and OE, all like
inputs ofthe parallel MX27C256 may be common. A TTL
low-level program pulse applied.!Q.. an MX27C256 CE
input with VPP = 12.5 ± 0.5 V and OE HIGH will program
that MX27C256. A high-level CE input inhibits the other
MX27C256s from being programmed.
THE PROGRAMMING OF THE MX27C256
When the MX27C256 is delivered, or it is erased, the
chip has all 256K bits in the "ONE", or HIGH state.
"ZEROs" are loaded into the MX27C256 through the
procedure of programming.
PROGRAM VERIFY MODE
Verification should be performed on the programmed bits
to determine that they were correctly p.!Q9rammecLJhe
verification should be performed with CE at VIH, OE at
VIL and VPP at its programming voltage.
The programming mode is entered when 12.5 ± 0.5 V is
applied to the Vpp pin, OE is at VIH, and CE is at VIL.
For programming, the data to be programmed is applied
with 8 bits in parallel to the data pins.
AUTO IDENTIFY MODE
The flowchart in Figure 1 shows MXIC's interactive
algorithm. Interactive algorithm reduces programming
time by using short programming pulses and giving each
address only as many pulses as is necessary in order to
reliably program the data. After each pulse is applied to
a given address, the data .in that address is verified. If the
data is not verified, additional pulses are given until it is
verified or the maximum is reached. This process is
repeated while sequencing through each address of the
MX27C256. This part of the algorithm is done at VCC=
6.0V to assure that each EPROM bit is programmed to a
sufficiently high threshold voltage. After the interactive
programming is completed, an overprogram pulse is
given to each memory location; this ensures that all bits
The auto identify mode allows the reading out of a binary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programming equipment for the purpose of automatically
matching the device to be programmed with its
corresponding programming algorithm. This mode is
functional in the 25°C ± 5°C ambient temperature range
that is required when programming the MX27C256.
To activate this mode, the programming equipment must
force 12.0 ± 0.5 (VH) on address line A9 of the device.
Two identifier bytes may then be sequenced from the
device outputs by toggling address line AO from VIL to
VIH. All other address lines must be held at VIL during
6-2
MX27C256
auto identify mode.
TWO-LINE OUTPUT CONTROL FUNCTION
Byte 0 (AD =VIL) represents the manufacturer code, and
byte 1 (AD = VIH), the device identifier code. For the
MX27C256, these two identifier bytes are given in the
Mode Select Table. All identifiers for manufacturer and
device codes will possess odd parity, with the MSB (DQ7)
defined as the parity bit.
To accommodate multiple memory connections, a twoline control function is provided to allow for:
1. Low memory power dissipation,
2. Assurance that output bus contention will not occur.
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
READ MODE
The MX27C256 has two control functions, both of which
must be logically satisfied in order to obtain data at the
outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable (OE)
is the output control and should be used to gate data to the
output pins, independent of device selection. Assuming
that addresses are stable, address access time (tACC) is
equal to the delay from CE to output (tCE). Dat!!ls
available at the outputs tOE after the falling edge of OE,
assuming that CE has been LOW and addresses have
been stable for at least tACC - tOE.
SYSTEM CONSIDERATIONS
During the switch between active and standby conditions,
transient current peaks are produced on the rising and
falling edges of Chip Enable. The magnitude of these
transient current peaks is dependent on the output
capacitance loading of the device. At a minimum, a 0.1
~F ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
VCC and GND to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4. 7 ~F bulk electrolytic capacitor should be used
between Vcc and GND for each eight devices. The
location of the capacitor should be close to where the
power supply is connected to the array.
STANDBY MODE
The MX27C256 has a CMOS standby mode which
reduces the maximum Vcc current to 100 ~A. It is placed
in CMOS standby when CE is at.VCC ± 0.3 V. The
MX27C256 also has a TTL-standby mode which reduces
the maximum VCC current to 1.5 mA. It is placed in TTLstandby when CE is at VIH. When in standby mode, the
outputs are in a high-impedance state, independent ofthe
OE input.
MODE SELECT TABLE
PINS
MODE
CE
OE
AD
A9
VPP
OUTPUTS
Read
VIL
VIL
X
X
VCC
DOUT
Output Disable
VIL
VIH
X
X
VCC
HighZ
Standby (TTL)
VIH
X
X
X
VCC
HighZ
Standby (CMOS)
VCC±O.3V
X
X
X
VCC
HighZ
Program
VIL
VIH
X
X
VPP
DIN
Program Verify
VIH
VIL
X
X
VPP
DOUT
Program Inhibit
VIH
VIH
X
X
VPP
HighZ
VIL
VIL
VIL
VH
VCC
C2H
VIL
VIL
VIH
VH
VCC
10H
. Manufacturer Code
Device Code
NOTES: 1. X can be either VIL or VIH
2. VH = 12.0 V ± 0.5 V
3. AI - AS = AID - A12 = VIL(For auto select)
4. A 13 and A 14 = X (For auto select)
5. See DC Programming characteristics for VPP voltage during
programming.
6-3
IVIATM
MX27C25S
MACRONIX. INC.
FIGURE 1. INTERACTIVE PROGRAMMING FLOW CHART
INTERACTIVE
SECTION
NO
FAIL
VERIFY BYTE
NO
PASS
LAST ADDRESS
INCREMENT ADDRESS
VERIFY BYTE
FAIL
OVERPROGRAM
SECTION
INCREMENT ADDRESS
VERIFY SECTION
VERIFY ALL BYTES ) __
6-4
~FA~I~L__~~~~~~~~
DEVICE FAILED
IYIATM
MX27C2·56
MACRONIl<, INC.
FIGURE 2. FAST PROGRAMMING FLOW CHART
INTERACTIVE
SECTION
YES
x = 25?
FAIL
PASS
NO
LAST ADDRESS
INCREMENT ADDRESS
FAIL
I
,>-1F~A~IL~.[==~~~~~~
DEVICE FAILED
VERIFY ALL ByTES....
6-5
----
. . ATM
MX27C256
MACRONlX. INC.
SWITCHING TEST CIRCUITS
DEVICE
UNDER
1.8KQ
i - - - - . - - -.....- - K
f--~t----~W'v----o
+5V
TEST
}
DIODES = IN3064
OR EQUIVALENT
CL
=100 pF including jig capacitance(30pF for 55/70 ns parts)
SWITCHING TEST WAVEFORMS
2AV
OAV
------X ~_0._8V
-
- - ,2.0V
_ _ _-'- - -
__
TEST POINTS
_______
X
-,0-,:8,-,V~~- -~
l' - -
2 OV
INPUT
-
- -
OUTPUT
_ __
AC TESTING: Inputs are driven at 2.4V for a logic "1" and OAV fora logic "0".
Input pulse rise ani fall times are ,,10ns.
:w
--1-.5-V--X_ _ _ _ _ _T_E_S_T_P_O_IN_T_S_ _ _
,,,
OUTPUT
INPUT
AC TESTING:
~X
(1) Inputs are driven at 3.0V for a logic "1" and OV for a logic "0".
Input pulse rise and fall times are ,,10ns.
(2) For MX27C256-55, MX27C256-70 only
6-6
MX27C256
ABSOLUTE MAXIMUM RATINGS
RATING
VALUE
Ambient Operating Temperature
O'Cto 70'C
Storage Temperature
-65'C to 125'C
Applied Input Voltage
-0.5V to 7.0V
Applied Output Voltage
-0.5V to VCC + O.5V
VCC to Ground Potential
-0.5V to 7.0V
A9 & Vpp
-0.5V to 13.5V
NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the davice. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended period may affect reliability.
NOTICE:
Specifications contained within the following tables are subject to
change.
DC CHARACTERISTICS TA = ooe to 70oe, vee = sv ± 10%
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
MAX.
UNIT
CONDITIONS
V
IOH = -0.4mA
IOL=2.1mA
------------------------------------------------------------------------------
VOL
Output Low Voltage
VIH
Input High Voltage
--------------
---
0.4
V
2.0
VCC + 0.5
V
VIL
Input Low Voltage
-0.3
0.8
V
III
Input Leakage Current
-10
10
J.lA
VIN = 0 to 5.5V
ILO
Output Leakage Current
-10
10
J.lA
VOUT = 0 to 5.5V
ICC3
VCC Power-Down Current
100
J.lA
ICC2
VCC Standby Current
ICC1
VCC Active Current
40
mA
CE = VIL, f=5MHz, lout = OmA
IPP
VPP Supply Current Read
100
J.lA
CE = 6E = VIL, VPP = 5.5V
----1-.5-------~A
±
-------cr = VIH---·---------CE = VCC
0.3V
CAPACITANCE TA = 2Soe, f = 1.0 MHz (Sampled only)
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
CONDITIONS
CIN
Input Capacitance
8
12
pF
VIN = OV
COUT
Output Capacitance
8
12
pF
"-_.. _-"-- --_.-
VPP
- -
VPP Capacitance
------ .--
18
25
6-7
VOUT=OV
-- VPP = OV
--.-----
pF
-"-
- ---- - - " - - - - -
IVIATM
MX27C256
MACRONtX, INC.
AC CHARACTERISTICS T A = ooe to 70oe, vee = 5V± 10%
2Z!:;251i~:i
27~2:i!!-Z!!
27~2:i6-9!!
SYMBOL
PARAMETER
MAX.
UNIT
CONDITIONS
tACC
Address to Output Delay
55
70
90
ns
CE = OE = VIL
tCE
Chip Enable to Output Delay
55
70
90
ns
OE= VIL
tOE
Output Enable to Output
Delay
30
35
40
ns
CE = VIL
tDF
(jJ: J::!igh to Output Float,
or CE High to Output Float
0
25
ns
Output Hold from Address,
0
tOH
MIN.
MAX.
20
MIN.
MAX.
20
0
0
MIN.
0
ns
0
CE or OE which ever occurred
first
27~256-12
2Z!:;25!!-11!
MIN.
PARAMETER
MAX.
UNIT
CONDITIONS
IACC
Address to Output Delay
100
120
150
ns
CE = OE =VIL
tCE
Chip Enable to Output Delay
100
120
150
ns
OE =VIL
tOE
Output Enable to Output
Delay
45
50
55
ns
CE=VIL
tDF
DE J::!.igh to Output Float,
50
ns
0
MAX.
30
MIN.
MAX.
27!:;2!i1i-1!i
SYMBOL
35
0
MIN.
0
or CE High to Output Float
tOH
Output Hold from Address,
0
0
ns
0
CE or OE which ever occurred
first
DC PROGRAMMING CHARACTERISTICS TA = 25°e ± 5°C
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
VOL
Output Low Voltage
VIH
Input High Voltage
VIL
III
MAX.
0.4
UNIT
CONDITIONS
V
IOH = -0.40mA
V
IOL= 2.1mA
--------------------------------------------------------2.0
VCC +0.5
V
Input Low Voltage
-0.3
0.8
V
Input Leakage Current
-10
10
I1A
VH
A9 Auto Select Voltage
11.5
12.5
V
ICC3
VCC Supply Current(Program & Verify)
40
mA
IPP2
VPP Supply Current(Program)
30
mA
VCCl
Interactive Supply Voltage
6.25
V
VPPl
Interactive Programming Voltage
12.0
13.0
VCC2
Fast Programming Supply Voltage
6.00
6.50
VPP2
Fast Programming Voltage
12.5
13.0
5.75
6-8
VIN = 0 to 5.5V
CE = VIL, DE = VIH
V
- - , - , - - - - - - - _ .._-----_.V
V
IYIATM
MX27C2SS
MACRONIX. INC.
AC PROGRAMMING CHARACTERISTICS TA = 25°C ± 5°C
MAX.
SYMBOL
PARAMETER
MIN.
tAS
Address Setup Time
2.0
I'S
tOES
OE Setup Time
2.0
I'S
tDS
Data Setup Time
2.0
I'S
tAH
Address Hold Time
0
I'S
tDH
Data Hold Time
2.0
I'S
tDFP
CE to Output Float Delay
0
tVPS
VPP Setup Time
2.0
tVCS
VCC Setup Time
2.0
tOE
Data Valid from OE
tPW
CE Initial Program Pulse Width
tOPW
50
UNIT
nS
I'S
I'S
150
nS
Fast
95
105
I'S
Interactive
0.95
1.05
mS
1.95
2.05
mS
CE Over program Pulse Width (Interactive)
250
tDV
Data Valid from CE
tOEH
OE Hold Time
2.0
I'S
tVR
OE Recovery Time
2.0
I'S
6-9
nS
CONDITIONS
----
IftATM
MX27C2SS
MACRONIlC, INC.
WVEFORMS
READCYCtE~______________________________________________________~
ADDRESS
INPUTS
~~
~
VALID ADDRESS
/
Lree~
eE
'"
OE
'"
.,
DATA
OUT
V
~eE-
~'"
/~--tDF->
X
)<
VALID DATA
+-tOH-
.
I--toH-
INTERACTIVE PROGRAMMING ALGORITHM WAVEFORMS
4-------ADDRESS
INPUTS
VIH
~D<:'-
PROGRAM-----~ ....---PROGRAM VERIFY--~
KrV_A_L_ID_A_D_D_R_E_S_S____t_------------------------fr~
______________
-tAS-DATA
OUT
~
VPP
VPP
DATA IN STABLE
DATA OUl VALID
~~------+-----------~~
_tDS__
--
!l---
-tDFp......
~tDH
--~------~---------+-4--------t_------~------_1-----------
vee/
1
_tVPS_
vee
Vee+1~k_------~----------~~--------r_--------i_------_t------------
v.EJ
VIH
-tVeS--
!I:" - - - - - ~-T-----1/
~tPW-
~tOEs._1
_ t O E_ _
:1
~~~I~~_--_--_--_-_--_--_t~-_~tO=~~W~~-t_-_--_-_--_--_~_'\_~~____________~
VIH
6-10
----
IVIArM
MX27C256
MACRONIX, INC.
ORDERING INFORMATION
CERAMIC PACKAGE
PART NO.
ACCESS TIME(ns)
OPERATING CURRENT MAX.(mA)
STANDBY CURRENT MAX.(fl A)
PACKAGE
MX27C256DC-55
55
40
100
28 Pin DIP
MX27C256DC-70
70
40
100
28 Pin DIP
MX27C256DC-90
90
40
100
28 Pin DIP
MX27C256DC-10
100
40
100
28 Pin DIP
MX27C256DC-12
120
40
100
28 Pin DIP
MX27C256DC-15
150
40
100
28 Pin DIP
PLASTIC PACKAGE
PART NO.
ACCESS TIME(ns)
OPERATING CURRENT MAX.(mA)
STANDBY CURRENT MAX.(/l A)
PACKAGE
MX27C256PC-55
55
40
100
28 Pin DIP
100
32 Pin PLCC
MX27C256QC-55
55
40
MX27C256PC-70
70
40
MX27C256QC-70
70
40
MX27C256PC-90
90
40
MX27C256QC-90
90
40
MX27C256PC-12
100
------------------- - - - - 100
100
28 Pin DIP
32 Pin PLCC
28 Pin DIP
-------------- ----------------------------- - - - - -
100
32 Pin PLCC
281"in DIP
---32 Pin PLCC
120
40
100
MX27C256QC-12
120
40
100
MX27C256PC-15
150
40
100
28 Pin DIP
MX27C256QC-15
150
40
100
32 Pin PLCC
-----"--------
6-11
IYI.ATM
MX27C5~2
MACRONIX, INC.
51 2K-SIT(B4K x B) CMOS EPROM
FEATURES
•
•
•
•
•
•
•
•
•
64K x 8 organization
Single +5V power supply
+ 12.5V programming voltage
Fast access time: 55/70/90/100/120/150ns
Totally static operation
Completely TTL compatible
Operating current: 40mA
Standby current: 100llA
Package type:
- 28 pin ceramic DIP, plastic DIP
- 32 pin PLCC
GENERAL DESCRIPTION
programming outside from the system, existing EPROM
programmers may be used. The MX27C512 supports
intelligent quick pulse programming algorithm which can
result in programming times of less than fifteen seconds.
The MX27C512 is a 5V only, 512K-bit, ultraviolet Erasable Programmable Read Only Memory. It is organized
as 64K words by 8 bits per word, operates from a single
+5volt supply, has a static standby mode, and features
fast single address location programming. All programming Signals are TTL levels, requiring a single pulse. For
This EPROM is packaged in industry standard 28 pin,
dual-in-line packages or 32 lead, PLCC packages.
BLOCK DIAGRAM
PIN CONFIGURATIONS
CDIP/PDIP
CE
;}-OO-07
DE
vcc
A15
A12
A7
A6
A5
A4
A3
A2
Al
AD
00
01
02
27
26
25
24
23
22
21
20
19
18
17
16
15
.
."'"
1;;
6
7
(J
><
::::E
10
11
12
13
14
GND
PLCC
N
< :;:
"' ()z
:;:
4
1
()
()
>
A14
A13
A8
A9
All
OENPP
Al0
AO-A15
ADDRESS
INPUTS
BE
07
06
05
VCC _ _
GND ___
VPP--
PIN DESCRIPTION
...:;: :;:'"
-
32
SYMBOL
PIN NAME
Address Input
A8
AO-A15
A5
A9
00-07
Data InpuVOutput
A4
All
CE
Chip Enable Input
OE
Output Enable Input
VPP
Program Supply Voltage
AS
5
A3
NC
MX27C512
OENPP
Al
Al0
AD
CE
NC
07
NC
No Internal Connection
06
VCC
Power Supply Pin (+5V)
GND
Ground Pin
00
13
14
17
U
L
0 ~ z ()z 8
C!l
0
L
... 0"'
0
REV. 3.0, APR. 09, 1993
PIN: PM0154
7·1
IYIArM
MX27CS.,2
MACRONIX. INC.
FUNCTIONAL DESCRIPTION
completed, the entire EPROM memory is verified at VCC
= 5V ± 10%.
THE ERASURE OF THE MX27C512
FAST PROGRAMMING
The MX27C512 is erased by exposing the chip to an
ultraviolet light source. A dosage of 15 W seconds/cm2
is required to completely erase a MX27C512. This
dosage can be obtained by exposure to an ultraviolet
lamp - wavelength of 2537 Angstroms (A) - with
intensity of 12,000~W/cm2 for 15 to 20 minutes. The
MX27C512 should be directly under and about one inch
from the source and all filters should be removed from the
UV light source prior to erasure.
The device is set up in the fast programming mode when
the programming voltage OENPP = 12.75V is applied,
with VCC =6.25 V, (Algorithm is shown in Figure 2). The
programming is achieved...b.y appling a single TTL low
level 100llS pulse to the CE input after addresses and
data line are stable. If the data is not verified, an
additional pulse is applied for a maximum of 25 pulses.
This process is repeated while sequencing through each
address of the device. When the programming mode is
completed, the data in all address is verified at VCC = 5V
± 10%.
It is important to note that the MX27C512, and similar
devices, will be cleared for all bits of their programmed
states with light sources having wavelengths shorter than
4000 A. Although erasure times will be much longer than
that with UV sources at 2537 A, nevertheless the
exposure to fluorescent light and sunlight will eventually
erase the MX27C512 and exposure to them should be
prevented to realize maximum system reliability. If used
in such an environment, the package window should be
covered by an opaque label or substance.
PROGRAM INHIBIT MODE
Programming of multiple MX27C512s in parallel with
different data is also easily accomplished b~sing the
Program Inhibit Mode. Except for CE and OE, all like
inputs of the parallel MX27C512 maybe common. A TTL
low-level prQgram pulse applied to an MX27C512 CE
input with OENPP = 12.5 ± O.5V will program that
MX27C512. A high-level CE input inhibits the other
MX27C512s from being programmed.
THE PROGRAMMING OF THE MX27C512
When the MX27C512 is delivered, or it is erased, the
chip has all 512K bits in the "ONE", or HIGH state.
"ZEROs" are loaded into the MX27C512 through the
procedure of programming.
PROGRAM VERIFY MODE
Verification should be oerformed on the orogrilmmed bits
to determine that they were correctlY,QLogrammecLJhe
verification should be performed with OENPP and CE, at
VIL. Data should be verified tDV after the falling edge of
The programml!}9 mode is entered when 12.5 ± 0.5 V is
applied to the OENPP pin and CE is at VIL.
CEo
For programming, the data to be programmed is applied
with 8 bits in parallel to the data pins.
AUTO IDENTIFY MODE
The flowchart in Figure 1 shows MXIC's interactive
algorithm. Interactive algorithm reduces programming
time by using short programming pulses and giving each
address only as many pulses as is necessary in order to
reliably program the data. After each pulse is applied to
a given address, the data in that address is verified. If the
data is not verified, additional pulses are given until it is
verified or the maximum is reached. This process is
repeated while sequencing through each address of the
MX27C512. This part of the algorithm is done at VCC =
6.0V to assure that each EPROM bit is programmed to a
sufficiently high threshold voltage. After the interactive
programming is completed, an overprogram pulse is
given to each memory location; this ensures that all bits
have sufficient margin. After the final address is
The auto identify mode allows the reading out of a binary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programming equipment for the purpose of automatically
matching the device to be programmed with its
corresponding programming algorithm. This mode is
functional in the 25°C ± 5°C ambient temperature range
that is required when programming the MX27C512.
To activate this mode, the programming equipment must
force 12,0 ± 0.5(VH) on address line A9 of the device.
Two identifier bytes may then be sequenced from the
device outputs by toggling address line AO from VIL to
VIH. All other address lines must be held at VIL during
auto identify mode.
7-2
. . ATM
MX27CS'12
MACRONIX, INC.
Byte 0 (AO = VIL) represents the manufacturer code, and
byte 1 (AO = VIH), the device identifier code. For the
MX27C512, these two identifier bytes are given in the
Mode Select Table. All identifiers for manufacturer and
device codes will possess odd parity, with the MSB (DQ7)
defined as the parity bit.
TWO-LINE OUTPUT CONTROL FUNCTION
To accommodate multiple memory connections, a twoline control function is provided to allow for:
1. Low memory power dissipation,
2. Assurance that output bus contention will not occur.
READ MODE
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
The MX27C512 has two control functions, both of which
must be logically satisfieclin order to obtain data at the
outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable (OE)
is the output control and should be used to gate data to the
output pins, independent of device selection. Assuming
that addresses are stable, address access time (tACC) is
equal to the delay from CE to output (tCE). Dattis
available at the outputs tOE after the falling edge of OE,
assuming that CE has been LOW and addresses have
been stable for at least tACC - tOE.
SYSTEM CONSIDERATIONS
During the switch between active and standby conditions,
transient current peaks are produced on the rising and
falling edges of Chip Enable. The magnitude of these
transient current peaks is dependent on the output
capacitance loading of the device. At a minimum, a 0.1
~F ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
VCC and GND to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4. 7 ~F bulk electrolytic capaCitor should be used
between VCC and GND for each eight devices. The
location of the capacitor should be close to where the
power supply is connected to the array.
STANDBY MODE
The MX27C512 has a CMOS standby mode which
reduces the maximum VCC current to 100!lA. It is placed
in CMOS standby when CE is at VCC ± 0.3 V. The
MX27C512 also has a TTL-standby mode which reduces
the maximum VCC current to 1.5 mA. It is placed in TTLstandby when CE is at VIH. When in standby mode, the
Qillputs are in a high-impedance state, independent of the
OE input.
MODE SELECT TABLE
PINS
MODE
CE
OENPP
AO
A9
OUTPUTS
Read
VIL
VIL
X
X
DOUT
Output Disable
VIL
VIH
X
X
HighZ
Standby (TTL)
VIH
X
X
X
HighZ
Standby (CMOS)
VCC±O.3V
X
X
X
HighZ
DIN
Program
VIL
VPP
X
X
Program Verify
VIL
VIL
X
X
DOUT
Program Inhibit
VIH
VPP
X
X
HighZ
Manufacturer Code
VIL
VIL
VIL
VH
C2H
Device Code
VIL
VIL
VIH
VH
91H
=
= 12.0 V ± 0.5 V
= Either VIH or VIL(For auto select)
=
3. A1 - AB
A10 - A15
VIL(For auto select)
4. See DC Programming Characteristics for VPP voltage during
programming.
NOTES: 1. VH
2. X
7-3
----
IVIAm
MX27CS"12
MACRONIX. INC.
FIGURE 1. INTERACTIVE PROGRAMMING FLOW CHART
INTERACTIVE
SECTION
X=25?
NO
FAIL
VERIFY BYTE
PASS
NO
PASS
LAST ADDRESS
INCREMENT ADDRESS
YES
VERIFY BYTE
FAIL
OVERPROGRAM
SECTION
NO
INCREMENT ADDRESS
LAST ADDRESS
VERIFY SECTION
VERIFY ALL
7-4
BYTES/---,-F"A~IL~L_~DE~V~I~CE!:..':.FA~I~LE:!D:!........J
IYIATM
MX27C5~2
MACRONIX, INC.
FIGURE 2. FAST PROGRAMMING FLOW CHART
INTERACTIVE
SECTION
YES
x = 25?
NO
FAIL
VERIFY BYTE
PASS
NO
LAST ADDRESS
INCREMENT ADDRESS
FAIL
FAIL
VERIFY ALL BYTES>-'-=c....,""l_ED~EV~I~C~E~FA~I~LE':!D~..J
7·5
----
IYIATM
MACRONIlC,
MX27CS.,2
INC.
SWITCHING TEST CIRCUITS
DEVICE
UNDER
i---.----.---K
1.BKQ
f-----1I----~W\r_--_{)
+5V
TEST
DIODES = IN3064
6.2KQ
OR EQUIVALENT
CL = 100 pF including jig capacitance(30pF for 55/70 ns parts)
SWITCHING TEST WAVEFORMS
X
2.4V--~X
- - ~2.0V
O.4V
_ _ _~- - -
20V{- .
TEST POINTS
_~_O_.B_V_ _ _ _ _ _ _---,O_.B,-V_- - "
-
-~_ __
_
OUTPUT
INPUT
AC TESTING: Inputs are driven at 2.4V for a logic "1" and O.4V for a logic "0".
Input pulse rise and fall times are" 1Ons.
X '"
:v --1-'5-V~X
_____
T_E_ST_P_O_IN_T_S_ _ _ _
OUTPUT
INPUT
AC TESTING:
(1) Inputs are driven at 3.0V for a logic "1" and OV for a logic "0".
Input pulse rise and fall times are ,,1 Ons.
(2) For MX27C512-55, MX27C512-70 only
7-6
IVIArM
MX27C512
MACRONtX. INC.
ABSOLUTE MAXIMUM RATINGS
_...
RATING
VALUE
Ambient Operating Temperature
O'C to 70'C
Storage Temperature
-65'C to 125'C
Applied Output Voltage
-0.5V to 7.0V
-_ ... _..... ------- -- ... _--_._.... ----0.5V to VCC + 0.5V
VCC to Ground Potential
-0.5V to 7.0V
A9 & Vpp
-0.5V to 13.5V
Applied Input Voltage
- ----,--------------- ....
.-
"'
DC CHARACTERISTICS T A
SYMBOL
NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended period may affect reliability.
NOTICE:
Specifications contained within the following tables are subject to
change.
= ooe to 70°C, vee = 5V ± 10%
PARAMETER
MIN.
UNIT
MAX.
VOH
Output High Voltage
2A
- - ----_._-VOL
Output Low Voltage
_._--_._----- .. _ . _ - - - - - - - - - - - - - - - - - - _ . _ VIH
Input High Voltage
2.0
V
CONDITIONS
IOH =-OAmA
. _ - - - _ . _ - -_ _ _ _ _ _ 0 _ _ _ _ _ -
OA
V
VCC+0.5
V
IOL = 2.1mA
Input Low Voltage
-0.2
0.8
V
III
Input Leakage Current
-10
10
~
VIN = 0 to 5.5V
ILO
Output Leakage Current
-10
10
~
VOUT = 0 to 5.5V
ICC3
VCC Power-Down Current
100
I-1A
CE = VCC ± 0.3V
ICC2
VCC Standby Current
1.5
rnA
CE=VIH
ICC1
VCC Active Current
40
mA
CE = VIL, f=5MHz, lout = OrnA
IPP
VPP Supply Current Read
100
I-1A
CE = VIL, VPP = 5.5V
VIL
CAPACITANCE TA = 25°C, f = 1.0 MHz (Sampled only)
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
CONDITIONS
CIN
Input Capacitance
8
12
pF
VIN =OV
COUT
Output Capacitance
8
12
pF
Vpp
VPP Capacitance
18
25
pF
VOUT=OV
-------VPP=OV
7-7
IYIATM
MX27C5~2
MACRONIX, INC.
AC CHARACTERISTICS TA = ooe to 70oe,
vee = 5V±
27~!i12:li!i
SYMBOL . PARAMETER
MIN.
MAX.
10%
27C512-90
21C512-70
MIN.
MAX.
MIN.
MAX.
UNIT
CONDITIONS
CE = OE = VIL
IACC
Address 10 Outpul Delay
55
70
90
ns
ICE
Chip Enable 10 Outpul Delay
55
70
90
ns
OE =VIL
tOE
Output Enable to Output
Delay
30
35
40
ns
CE= VIL
tDF
OE J:!igh to Output Float,
or CE High to Output Float
0
25
ns
tOH
Q!!tpuU:!old from Address,
CE or OE which ever occurred
first
0
SYMBOL
PARAMETER
MIN.
tACC
Address to Output Delay
tCE
Chip Enable to Output Delay
tOE
Output Enable to Output
Delay
tDF
OE J:!igh to Output Float,
or CE High to Output Float
0
tOH
Q!!tputJ::!old from Address,
CE or OE which ever occurred
first
0
20
0
20
MAX.
ns
0
0
27C!i12-H!
0
27C512-15
21C512-12
MAX.
UNIT
100
120
150
ns
CE = OE = VIL
100
120
150
ns
OE =VIL
45
50
65
ns
CE =VIL
50
ns
30
MIN.
0
MAX.
35
MIN.
0
ns
0
0
CONDITIONS
DC PROGRAMMING CHARACTERISTICS TA = 25°e ± 5°e
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
VOL
Output Low Voltage
VIH
Input High Voltage
VIL
Input Low Voltage
2.0
MAX.
UNIT
IOH = -0.40mA
0.4
V
IOL=2.1mA
VCC+0.5
V
0.8
V
III
Input Leakage Current
-10
10
jlA
VH
A9 Auto Select Voltage
11.5
12.5
V
ICC3
VCC Supply Current(Program & Verify)
40
mA
IPP2
VPP Supply Current(Program)
30
mA
VCC1
Interactive Supply Voltage
6.25
V
VPP1
Interactive Programming Voltage
12.0
13.0
V
VCC2
Fast Programming Supply Voltage
6.00
6.50
V
VPP2
Fast Programming Voltage
12.5
13.0
V
5.75
7-8
CONDITIONS
V
VIN = 0 to 5.5V
CE=VIL
----
IYIATM
MX27C5'12
MACRONIX. INC.
AC PROGRAMMING CHARACTERISTICS TA = 25°C ± 5°C
SYMBOL
PARAMETER
MIN.
tAS
Address Setup Time
2.0
tOES
OENPP Setup Time
2.0
liS
tDS
Data Setup Time
2.0
liS
tAH
Address Hold Time
0
liS
tDH
Data Hold Time
2.0
tDFP
CE to Output Float Delay
0
tVPS
VPP Setup Time
tPW
CE Initial Program Pulse Width
MAX.
UNIT
liS
liS
60
2.0
nS
liS
Fast
95
105
liS
Interactive
0.95
1.05
mS
2.05
mS
tOPW
CE Overprogram Pulse Width(lnteractive)
1.95
tVCS
VCC Setup Time
2.0
tDV
Data Valid from CE
tOEH
OENPP Hold Time
2.0
liS
tVR
OENPP Recovery Time
2.0
liS
liS
250
7-9
nS
CONDITIONS
----
IVIATM
MX27C541J2
MACRONIX, INC.
WAVEFORMS
READ CYCLE
ADDRESS
INPUTS
VALID ADDRESS
eE
OE
DATA
OUT
VALID DATA
INTERACTIVE PROGRAMMING ALGORITHM WAVEFORMS
VIH
ADDRESSES
PROGRAM
VERIFY - -
•
PROGRAM
~
_tAS_
DATA
_tDS_
VPP
OENpp
VIL
V
tPRT-I
VIH
-
~tDH-'
-tVPS--
VIL
_tOEH~
--tOPW-tPW-
1\
V
tDV
~
~tVR~
'\
_tVeS4
vee
6V
vee
NOTES:
1. The input timing reference level is O.BV for VIL and 2V for VIH.
2. tOE and tDFP are characteristics of the device, but must be accomodated by the programmer.
7-10
~
tDFP
,-
tAH 1...-
>C
-
IYIATM
MX27C5~2
MACRONIX. INC.
ORDERING INFORMATION
CERAMIC PACKAGE
PART NO.
ACCESS TIME(ns)
OPERATING CURRENT MAX.(mA)
STANDBYCURRENTMAX.(I! A)
PACKAGE
MX27C512DC-55
55
40
100
28 Pin DIP
MX27C512DC-70
70
40
100
28 Pin DIP
MX27C512DC-90
90
40
100
28 Pin DIP
MX27C512DC-10
100
40
100
28Pin DIP
MX27C512DC-12
120
40
100
28Pin DIP
MX27C512DC-15
150
40
100
28 Pin DIP
PLASTIC PACKAGE
PART NO.
ACCESS TIME(ns)
OPERATING CURRENT MAX.(mA)
STANDBY CURRENT MAX.(I! A)
PACKAGE
MX27C512PC-55
55
40
100
28 Pin DIP
MX27C5120C-55
55
40
100
32 Pin PLCC
MX27C512PC-70
70
40
100
28 Pin DIP
MX27C5120C-70
70
40
100
32 Pin PLCC
MX27C512PC-90
90
40
100
28 Pin DIP
MX27C5120C-90
90
40
100
32 Pin PLCC
MX27C512PC-12
120
40
100
28Pin DIP
MX27C5120C-12
120
40
100
32 Pin PLCC
MX27C512PC-15
150
40
100
28 Pin DIP
MX27C5120C-15
150
40
100
32 Pin PLCC
7-11
. . ArM
MX27C1000/27C1001
MACRONIX. INC.
1M-BIT[12BKx BJ CMOS EPROM
FEATURES
•
•
•
•
•
•
128K X 8 organization
Single +5V power supply
+ 12.5V programming voltage
Fast access time: 55/70/90/120/150 ns
Totally static operation
Completely TTL compatible
• Operating current: 60mA
• Standby current: 100iJA
• Package type:
32 pin ceramic DIP, plastic DIP
32 pin SOP
32 pin PLCC
GENERAL DESCRIPTION
The MX27C1 000/27C1 001 is a 5V only, 1M-bit, ultraviolet Erasable Programmable Read Only Memory. It is organized as 128K words by 8 bits per word, operates from
a single + 5 volt supply, has a static standby mode, and
features fast single address location programming. All
programming signals are TTL levels, requiring a single
pulse. For programming outside from the system, existing
EPROM programmers may be used. The MX27C1 0001
27C1001 supports a intelligent quick pulse programming
algorithm which can result in programming times of less
than thirty seconds.
This EPROM is packaged in industry standard 32 pin
dual-in-line packages or 32 lead, PLCC packages.
PIN CONFIGURATIONS
SOP(MX27C1000)
CDIP/PDIP(MX27C1000)
vpp
32
31
A15
A12
[~
g
0
AS
8
A3
A2
A1
AO
9
10
11
12
00
13
14
15
16
01
02
GND
vpp I
PGM
30 1 NC
29 j A14
28 J A13
27 ~l A8
1 A9
26
25 :J A11
24 JOE
23 -J Al0
22 ~I CE
21 .1 07
20 J 06
19
I 05
18 ~ 04
17 103
4
A7
A6
] vcc
U
...
><
'"
::;;
A16 ;
A15 I
A12 [
A7 I
A6 [
AS r
M[
A7
[
[
00
!
l
[
01 I
02 [
GND'
3
4
5
6
7
8
9
10
11
12
13
14
15
16
0
·0
0
(;
...
N
><
::!!
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
J.?
i
vee
-I PGM
INC
I A14
I A13
1 A8
I A9
.)~
lOE
Al0
"I
.1
CE
107
J 06
.I 05
J Q4
, 03
CDIP(MX27C1 001)
PLCC(MX27C1000)
N
A3
A2
A1
AO
:02
"' <
'"
<<
I
5"
"">
1
(.l
"
>
1:2CJ
"-
(.l
Z
A15
A12
A7
A6
32
A14
A6
A5
A14
A13
AS
M
MX27C1000
A3
00 [
A16
A2
JOE
A2
13
14
J A10
.I CE
J 07
QO
01
03
PIN: PM0155
REV. 3.0, APR. 09,1993
B-1
nlA~
MX27C1000/27C~001
MACRONIlC, INC.
BLOCK DIAGRAM
PIN DESCRIPTION
J-
PGM
DE
00-07
AO-A16
ADDRESS
SYMBOL
PIN NAME
AO-A16
Address Input
00-07
Data InpuVOutput
CE
Chip Enable Input
OE
Output Enable Input
PGM
Programmable Enable Input
VPP
Program Supply Voltage
NC
No Internal Connection
INPUTS
vcc ___
VCC
Power Supply Pin (+5V)
GND
Ground Pin
VP~
GN~
FUNCTIONAL DESCRIPTION
PGM at VIL.
THE ERASURE OF THE MX27C1000/27C1001
For programming, the data to be programmed is applied
with 8 bits in parallel to the data pins.
The MX27C1000/27C1001 is erased by exposing the
chip to an ultraviolet light source. A dosage of 15 W
seconds/cm 2 is required to completely erase a
MX27C 1000/27C 1001. This dosage can be obtained by
exposure to an ultraviolet lamp - wavelength of 2537
Angstroms (A) - with intensity of 12,000 I-IW/cm 2 for 15
to 20 minutes. The MX27C1000/27C1001 should be
directly under and about one inch from the source al')d
all filters should be removed from the UV light source
prior to erasure.
The flowchart in Figure 1 shows MXIC's interactive
algorithm. Interactive algorithm reduces programming
time by using short programming pulses and giving each
address only as many pulses as is necessary in order
to reliably program the data. After each pulse is applied
to a given address, the data in that address is verified.
If the data is not verified, additional pulses are given until
it is verified or the maximum is reached. This process
is repeated while sequencing through each address of
the MX27C1 00027C 1001. This part of the algorithm is
done at VCC = 6.0V to assure that each EPROM bit is
programmed to a sufficiently high threshold voltage.
After the interactive programming is completed, an
overprogram pulse is given to each memory location; this
ensu res that all bits have sufficient margin. After the final
address is completed, the entire EPROM memory is
verified at VCC = 5V ± 10%.
It is important to note thatthe MX27C 1000/27C 1001 , and
similar devices, will be cleared for all bits of their
programmed states with light sources having
wavelengths shorter than 4000 A. Although erasure
times will be much longer than that with UV sources at
2537A, nevertheless the exposure to fluorescent light
and sunlight will eventually erase the MX27C1000/
27C1001 and exposure to them should be prevented to
realize maximum system reliability. If used in such an
environment, the package window should be covered by
an opaque label or substance.
FAST PROGRAMMING
The device is set up in the fast programming mode when
the programming VOltage VPP = 12.75V is applied, with
VCC = 6.25 V and PGM = VIH (Algorithm is shown in
Figure 2). The programming is achieved by applying a
single TTL low level 1OOI-iS pulse to the PGM input after
addresses and data line are stable. If the data is not
verified, an additional pulse is applied for a maximum
of 25 pulses. This process is repeated while sequencing
through each address of the device.
When the
programming mode is completed, the data in all address
is verified at VCC = VPP = 5V ± 10%.
THE PROGRAMMING OF THE MX27C1000/27C1001
When the MX27C1000 is delivered, or it is erased,
the chip has all 1M bits in the "ONE", or HIGH state.
"ZEROs" are loaded into the MX27C1000/27C1001
through the procedure of programming.
The programming mode is entered when 12.5 ± 0.5 V
is applied to the VPP pin, OE is at VIH, and CE and
8-2
IYIIATM
MACRONIX. INC.
MX27C1 000/27C1 001
PROGRAM INHIBIT MODE
data to the output pins, independent of device selection.
Assuming that addresses are stable, address access
time (tACC) is equal to the delay from CE to output (tCE).
Data is available at the outputs tOE after the falling edge
of OE, assuming that CE has been LOW and addresses
have been stable for at least tACC - tOE.
Programming of multiple MX27C1 000/27C1 001 s in
parallel with different data is also easily accom~shed
~using the Program Inhibit Mode. Except for CE and
OE, all like inputs of the parallel MX27C1000/27C1001
may be common. A TTL low-level program pulse applied
to an MX27C1000/27C1001 CE input with VPP = 12.5
± 0.5 V and PGM LOW w!!!"program that MX27C1000/
27C1001. A high-level CE input inhibits the other
MX27C1000/27C1001s from being programmed.
STANDBY MODE
The MX27C1 000/27C1 001 has a CMOS standby mode
which reduces the maximum VCC current to 100 ~A.
It is placed in CMOS standby when CE is at VCC ± 0.3
V. The MX27C 1000 also has a TTL -standby mode which
reduces the maximum VCC current to 1.S mAo It is placed
in TTL-standby when CE is at VIH. When in standby
mode, the outputs ~e in a high-impedance state,
independent of the OE input.
PROGRAM VERIFY MODE
Verificatioh should be performed on the programmed bits
to determine that they were correctly Q!:Qgrammed. The
verification should be performed with OE and CE, at VIL,
PGM at VIH, and VPP at its programming voltage.
TWO-LINE OUTPUT CONTROL FUNCTION
AUTO IDENTIFY MODE
To accommodate multiple memory connections, a twoline control function is provided to allow for:
The auto identify mode allows the reading out of a binary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programming equipment forthe purpose of automatically
matching the device to be programmed with its
corresponding programming algorithm. This mode is
functional in the 25°C ± SoC ambient temperature range
that is required when programming the MX27C10001
27C1001.
1. Low memory power dissipation,
2. Assu rance that output bus contention will not occu r.
It is recommendec;:l that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connected to the READ lirie from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
To activate this mode, the programming equipment must
force 12.0 ± 0.5 V on address line A9 of the device. Two
identifier bytes may then be sequenced from the device
outputs by toggling address line AO from VIL to VIH. All
other address lines must be held at VIL during auto
identify mode.
SYSTEM CONSIDERATIONS
During the switch between active and standby conditions,
transient current peaks are produced on the rising and
falling edges of Chip Enable. The magnitude of these
transient current peaks is dependent on the output
capacitance loading of the device. At a minimum, a 0.1
~F ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
VCC and GND to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4. 7 ~F bulk electrolytic capacitor should be used
between VCC and GND for each eight devices. The
location of the capacitor should be close to where the
power supply is connected to the array.
Byte 0 ( AO = VIL) represents the manufacturer code,
and byte 1 (AO = VIH), the device identifier code. For
the MX27C1 000/1 001, these two identifier bytes are
given in the Mode Select Table. All identifiers for
manufacturer and device codes will possess odd parity,
with the MSB (D07) defined as the parity bit.
READ MODE
The MX27C1000/27C1001 has two control functions,
both of which must be logically satisfied in order to obtain
data atthe outputs. Chip Enable (CEl is the power control
and should be used for device selection. Output Enable
(OE) is the output control and should be used to gate
8-3
_ATM
MX27C~OOO/27C~OO~
MACRONIlC, INC.
MODE SELECT TABLE
PINS
MODE
CE
OE
PGM
AO
A9
VPP
Read
VIL
VIL
X
X
X
VCC
DOUT
Output Disable
VIL
VIH
X
X
X
VCC
HighZ
Standby (TIL)
VIH
X
X
X
X
VCC
HighZ
Standby (CMOS)
VCC±0.3V
X
X
X
X
VCC
HighZ
Program
VIL
VIH
VIL
X
X
VPP
DIN
OUTPUTS
Program Verify
VIL
VIL
VIH
X
X
VPP
DOUT
Program Inhibit
VIH
X
X
X
X
VPP
HighZ
Manufacturer Code
VIL
VIL
X
VIL
VH
VCC
C2H
Device Code(27C1 000)
VIL
VIL
X
VIH
VH
VCC
OEH
Device Code(27C1 001)
VIL
VIL
X
VIH
VH
VCC
OFH
NOTES: 1. VH = 12.0V ±0.5V
2. X = Either VIH or VIL(For auto select)
3. A1-A8 =A10-A16 = VIL(Forautoselect)
4. See DC Programming Characteristic:. for VPP voltage during
programming.
8-4
IYIATM
MX27C~OOO/27C~OO~
MACRONIX, INC.
FIGURE 1. INTERACTIVE PROGRAMMING FLOW CHART
INTERACTIVE
SECTION
VERIFY BYTE
INCREMENT ADDRESS
FAIL
OVERPRQGRAM
SECTION
INCREMENT ADDRESS
VERIFY SECTION
FAIL
VERIFY ALL BYTES;>---L_~D=EV~I~C=E~FA~I~LE~D~.J
8-5
----
IVIATM
MX27C'1000/27C'100'1
MACRONIX. INC.
FIGURE 2. FAST PROGRAMMING FLOW CHART
INTERACTIVE
SECTION
YES
x = 25?
NO
FAIL
VERIFY BYTE
PASS
NO
LAST ADDRESS
INCREMENT ADDRESS
FAIL
I
VERIFY ALL
?
8-6
BYTES>----"FA"I=-L-O~-'D~E~V~IC::'E:.:F~A~IL~E:':D'_J
IYIATM
MX27C~OOO/27C~OO~
MACRONIX. INC.
SWITCHING TEST CIRCUITS
DEVICE
UNDER
1.8K!l
1 - - - - _ - - - . - - - 1 < f---.>------'"INv--v---o +5V
TEST
CL
J
DIODES = IN3064
~ 6.2K!l
OR EQUIVALENT
CL = 100 pF including jig capacitance(30pF for 55170 ns parts)
SWITCHING TEST WAVEFORMS
2.4V
------x--~.2.0V
O.4V _ _ _- - -
20V_O_.8_V_ _ _ _ _ _ _ _0_.8_V_- - - -~_ __
OUTPUT
INPUT
AC TESTING: Inputs are driven at 2.4V for a logic "I" and O.4V for a logic "0".
Input pulse rise and fall times are :;10ns.
::'
--I-.5-V~X-----T-E-ST-P-O-IN-T-S---~X
OUTPUT
INPUT
AC TESTING:
'"
(I) Inputs are driven at 3.0V for a logic "I" and OV for a logic "0".
Input pulse rise and fall times are :;1 Ons.
(2) For MX27CIOOO/IOOI-55. MX27CIOOO/IOOI-70 only
8-7
IYIATM
MX27C~OOO/27C~OO~
MACRONIX. INC.
ABSOLUTE MAXIMUM RATINGS
RATING
NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended period may affect reliability.
NOTICE:
Specifications contained within the following tables are subject to
change.
VALUE
Ambient Operating Temperature
Storage Temperature
-65°C to 125°C
Applied Input Voltage
-0.5V to 7.0V
Applied Output Voltage
-0.5V to VCC + 0.5V
VCC to Ground Potential
-0.5V to 7.0V
V9&Vpp
-0.5V to 13.5V
DC CHARACTERISTICS TA =ooe to 70oe, vee
=5V ± 10%
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
VOL
Output Low Voltage
VIH
Input High Voltage
2.0
VIL
Input Low Voltage
III
Input Leakage Current
-10
ILO
Output Leakage Current
ICC3
VCC Power-Down Current
MAX.
UNIT
CONDITIONS
V
IOH=-0.4mA
0.4
V
IOL=2.1mA
VCC+0.5
V
-0.3
0.8
V
-10
10
nA
VIN = 0 to 5.5V
10
nA
VOUT = 0 to 5.5V
100
nA
CE = VCC ± 0.3V
ICC2
VCC Standby Current
1.5
rnA
CE=VIH
ICCl
VCC Active Current
60
rnA
ct = VIL, f=5MHz, lout = OmA
IPP
VPP Supply Current Read
100
nA
CE = DE = VIL, VPP = 5.5V
CAPACITANCE TA = 25°e, f = 1.0 MHz (Sampled only)
SYMBOL
PARAMETER
TYP.
MAX.
UNIT
CIN
Input Capacitance
8
12
pF
VIN=OV
COUT
Output Capacitance
8
12
pF
VOUT=OV
CVPP
VPP Capacitance
18
25
pF
VPP=OV
8-8
CONDITIONS
IVIATM
MX27C~OOO/27C~OO~
MACRONIX, INC.
AC CHARACTERISTICS TA = ooe to 70oe, vee = 5V± 10%
SYMBOL
PARAMETER
IACC
Address to Output Delay
27Cl 0001 001
27Cl 00011 001
-55
-70
MIN.
MAX.
MIN.
27Cl 00011 001
-90
MAX.
55
70
MIN.
MAX.
UNIT
CONDITIONS
90
ns
CE~OE~VIL
tCE
Chip Enable to Output Delay
55
70
90
ns
OE~VIL
tOE
Output Enable to Output Delay
30
35
40
ns
CE~VIL
tDF
DE High to Output Float,
or CE High to Output Float
25
ns
tOH
Output Hold from Address,
20
0
---------_.
0
0
20
0
0
0
ns
CE or OE which ever occurred first
27Cl 0001 001
27Cl 00011 001
-12
-15
SYMBOL
PARAMETER
MAX.
UNIT
CONDITIONS
tACC
Address to Output Delay
MIN.
120
150
ns
CE~OE~VIL
tCE
Chip Enable to Output Delay
120
150
ns
OE~VIL
65
ns
CE~VIL
50
ns
tOE
Output Enable to Output Delay
tDF
DE High to Output Float,
or CE High to Output Float
tOH
Output Hold from Address,
0
CE or DE which ever occurred first
MAX.
MIN.
50
0
35
0
0
ns
DC PROGRAMMING CHARACTERISTICS TA = 25°e ± 5°e
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
VOL
Output Low Voltage
VIH
Input High Voltage
MAX.
UNIT
CONDITIONS
V
IOH ~ -0.40mA
IOL~2.1mA
0.4
V
2.0
VCC+0.5
V
VIL
Input Low Voltage
-0.3
0.8
V
III
Input Leakage Current
-10
10
iJA
VH
A9 Auto Select Voltage
11.5
12.5
V
ICC3
VCC Supply Current (Program & Verify)
50
mA
IPP2
VPP SupplyCurrent(Program)
30
mA
VIN
~
0 to 5.5V
CE ~ PGM
OE~VIH
VCCl
Interactive Supply Voltage
5.75
6.25
V
VPP1
Interactive Programming Voltage
12.0
13.0
V
VCC2
Fast Programming Supply Voltage
6.00
6.50
V
VPP2
Fast Programming Voltage
12.5
13.0
V
8-9
~
VIL,
\
MX27C1 000/27C1 001
AC PROGRAMMING CHARACTERISTICS TA = 2S0C ± SOC
SYMBOL
PARAMETER
MIN.
tAS
Address Setup Time
2.0
MAX.
UNIT
nS
tOES
BE Setup Time
2.0
nS
IDS
Data Setup Time
2.0
nS
tAH
Address Hold Time
0
nS
tDH
Data Hold Time
2.0
tDFP
CE to Output Float Delay
0
tVPS
VPP Setup Time
2.0
tPW
PGM Program Pulse Width
nS
130
nS
nS
Fast
95
105
nS
Interactive
0.95
1.05
mS
2.05
mS
250
nS
150
nS
tOPW
PGMOverprogram Pulse(lnteractive)
1.95
tVCS
VCC Setup Time
2.0
tDV
Data Valid from CE
tCES
CE Setup Time
tOE
Data valid from OE
nS
nS
2.0
8-10
CONDITIONS
IYIATM
MACRONIl(,
MX27C1 000/27C1 001
INC.
WAVEFORMS
READ CYCLE
ADDRESS
INPUTS
~?
~
VALID ADDRESS
--~CC---
CE
""
OE
DATA
OUT
"
/"
+--- -tCE'
"
.. -
........
/~---tDF----Io
""
X ':'-c, ",:,,-
VALID DATA
-.oH-
-
----.OH-
INTERACTIVE PROGRAMMING ALGORITHM WAVEFORMS(NOTE1 & 2)
I.~------- PROGRAM-----~~~---PROGRAM VERIFY--~
VIH
ADDRESS
INPUTS
v-:
~X
VALID ADDRESS
'------------------------~---------------------_fr~
----J
-tAS--
DATA
OUT
~
VPP
--~----4_----+_~---~----~--_+--------
VCC
DATA IN STABLE
DATAOU VALID
--0
VPP
'!::::/
t.-
'F-------1___~'f-
~----~----------~
-tDFP--
~tDH
_tVPS_
VCC+~1~------~----------~~--------~--------4_------~------------
v.V
-tVCS-
VIH
--,.
VIL
---
~
~------~--------_r_+-------r_------_+-----_r-----------
-tCES---..
VIH
~I-'=- _____ -~~---......,/
VIH
VIL
4-tPW_
_tOPW~
'-
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ ........
~
_ _ _ _ _ _ _ _ _ _ _ _ _ __ J
8-11
IYIATM
MX27C1000/27C1001
MACRONIX. INC.
ORDERING INFORMATION
CERAMIC PACKAGE
PART NO.
ACCESS TIME(ns)
OPERATING CURRENTMAX.(mA)
STANDBYCURRENTMAX.(mA)
PACKAGE
MX27C1000DC-55
55
60
100
32 Pin DIP
MX27C10ooDC-70
70
60
100
32 Pin DIP
MX27C1oo0DC-90
90
60
100
32 Pin DIP
32 Pin DIP
MX27C1000DC-12
120
60
100
MX27C1000DC-15
150
60
100
32 Pin DIP
MX27C1 001 DC-55
55
60
100
32 Pin DIP
MX27C1oo1DC-70
70
60
100
32 Pin DIP
MX27C1001DC-90
90
60
100
32 Pin DIP
MX27C1001DC-12
120
60
100
32 Pin DIP
MX27C1001DC-15
150
60
100
32 Pin DIP
PLASTIC PACKAGE
PART NO.
ACCESSTIME(ns)
OPERATING CURRENT MAX.(mA)
STANDBYCURRENTMAX.(mA)
PACKAGE
MX27C1000PC-55
55
60
100
32 Pin DIP
MX27C1oo0MC-55
55
60
100
32 Pin SOP
32PinPLCC
MX27C1000QC-55
55
60
100
MX27C10ooPC-70
70
60
100
32 Pin DIP
MX27C1000MC-70
70
60
100
32 Pin SOP
MX27C1000QC-70
70
60
100
32 Pin PLCC
MX27C1000PC-90
90
60
100
32 Pin DIP
MX27C10ooMC-90
90
60
100
32 Pin SOP
MX27C1000QC-90
90
60
100
32 Pin PLCC
MX27C1OO0PC-12
120
60
100
32 Pin DIP
MX27C10ooMC-12
120
60
100
32 Pin SOP
MX27C1000QC-12
120
60
100
32 Pin PLCC
MX27C1OO0PC-15
150
60
100
32 Pin DIP
MX27C1000MC-15
150
60
100
32 Pin SOP
MX27C1000QC-15
150
60
100
32PinPLCC
8-12
----
~fRl ~ [LD li¥il D
lNJ&JRlW
IYIArM
MX27C1100/27C1024
MACRONIX. INC.
'1 M-BIT['1 2SK X S/S4K X '1 S) CMOS EPROM
FEATURES
• 64K x 16 organization(MX27C1024, JEDEC pin out)
• 128K x 8 or 64K x 16 organization(MX27C 1100,
ROM pin out compatible)
• +12.5V programming voltage
• Fast access time: 90/120/150 ns
• Totally static operation
•
•
•
•
Completely TTL compatible
Operating current: 60mA
Standby current: 100llA
Package type:
- 40 pin ceramic DIP
- 40 pin plastic DIP
-44 pin PLCC
GENERAL DESCRIPTION
The MX27C1 024 is a 5Vonly, 1M-bit, ultraviolet Erasable
Programmable Read Only Memory. It is organized as 64K
words by 16 bits per word(MX27C1 024), 128K x 8 or 64K
x 16(MX27C11 00), operates from a single + 5 volt supply, has a static standby mode, and features fast single
address location programming. All programming signals
are TTL levels, requiring a single pulse. For programming
outside from the system, existing EPROM programmers
may be used. The MX27C 11 00/1 024 supports a intelligent quick pulse programming algorithm which can result
in programming times of less than thirty seconds.
This EPROM is packaged in industry standard 40 pin
dual-in-line ceramic packages or 40 pin plastic packages.
BLOCK DIAGRAM (MX27C11 00)
PIN CONFIGURATIONS
CDIP/PDIP(MX27C1100)
NC
A7
A6
A5
A4
A3
A2
Al
AD
CE
GND
OE
00
08
01
09
02
010
03
011
10
11
12
13
14
15
16
17
18
19
20
~
U
...
CE
OE
BYTENPP
015/A·l
A8
A9
Al0
All
A12
A13
A14
A15
NC
BYTENPP
GND
015/A·l
07
014
06
013
05
012
31
N
><
::E
~
00-014
AO-A15
ADDRESS
INPUTS
VCC _____
GND_ _
Q4
21
1
vee
PIN: PM0156
REV. 2.0, FEB. 4,1993
9-1
IWlATM
MX27C~~OO/27C~024
MACRONIX. INC.
PIN CONFIGURATIONS
CDIP/PDIP(MX27C1024)
PLCC(MX27C1024)
vpp
Ci=r
015
014 ~~
013
012
011
010 L
09
08
GND
07
06 ~
05
Q4[
03 [
4
10
11
12
13
14
15
16
Q2 I. 17
01 [" 18
00 r 19
QeC 20
....
.
Q
U
po.
X
:::;;
40
39
38
37
36
35
34
1 VCC
PGM
~
NC
~
A15
CE
Qe
40
39
C
:J
A13
011 [
-] A12
I A12
010 [
09 c
J A10
33 1 A11
32 ' A10
31
30 ~ GND
29 ~: A8
28 J A7
27
A6
A5
26
A4
25
24 o A3
A2
23
22 , A1
AO
21
08
,~
GND
r-
A11
J A9
MX27C1024
12
34
Q7
r
, A8
A7
05
A6
__ "
~
8 8
00-015
AO-A15
ADDRESS
INPUTS
9-2
GND
06 L
04 I 1iB
J-
J
INC
NC
BLOCK DIAGRAM (MX27C1024)
PGM
1 44
012 [ 7 6
A13
,_.1
a 81~
A5
23
~ ~
,_J
<~
~
~ ~
IYIAlM
MX27C~~OO/27C~024
MACRONIX. INC.
PIN DESCRIPTION(MX27C1100)
SYMBOL
PIN NAME
PIN DESCRIPTION(MX27C1024)
SYMBOL
PIN NAME
AO-A15
Address Input
AO-A15
00-014
Data Input/Output
00-015
Data Input/Output
CE
Chip Enable Input
CE
Chip Enable Input
OE
Output Enable Input
OE
Output Enable Input
BYTENPP
Word/Byte Selection
/Program Supply Voltage
PGM
Program Enable Input
VPP
Program Supply Voltage
VCC
Power Supply Pin (+5V)
GND
Ground Pin
015/A-1
015(Word mode)/LS8 addr. (8y1e mode)
VCC
Power Supply Pin (+5V)
GND
Ground Pin
.Address Input
TRUTH TABLE OF BYTE FUNCTION(MX27C1100)
BYTE MODE(BYTE
=GND)
CE
OEIOE
0151A-1
MODE
00-07
SUPPLY CURRENT
H
x
Non selected
HighZ
Standby(ICC2)
L
UH
x
x
Non selected
HighZ
Operating(ICC1 )
L
H/L
A-1 input
Selected
DOUT
Operating(ICC1)
WORD MODE(BYTE
NOTE
=VCC)
CE
OEIOE
0151A-1
MODE
00-014
SUPPLY CURRENT
H
X
HighZ
Non selected
HighZ
Standby(ICC2)
L
UH
HighZ
Non selected
HighZ
Operating(ICC1 )
L
H/L
DOUT
Selected
DOUT
Operating(ICC1 )
NOTE1: X=HorL
9-3
NOTE
_ATM
MACRONIX. INC.
MX27C~~OO/27C~024
FUNCTIONAL DESCRIPTION
MX27C11 00/1 024. This part of the algorithm is done at
VCC = 6.0V to· assure that each EPROM bit is
programmed to a sufficiently high threshold Voltage.
After the interactive programming is completed, an
overprogram pulse is given to each memory location; this
ensures that all bits have sufficient margin. After the final
address is completed, the entire EPROM memory is
verified at VCC = 5V ± 10%.
THE ERASURE OF THE MX27C110011024
The MX27C11 00/1 024 is erased by exposing the chip to
an ultraviolet light source. A dosage of 15 W seconds/cm 2
is required to completely erase a MX27C11 00/1 024. This
dosage can be obtained by exposure to an ultraviolet
lamp - wavelength of 2537 Angstroms (A) - with
intensity of 12,000 IlW/cm2 for 15 to 20 minutes. The
MX27C11 00/1 024 should be directly under and about
one inch from the source and all filters should be removed
from the UV light source prior to erasure.
FAST PROGRAMMING
The device is set up in the fast programming mode when
the programming voltage VPP = 12.75V is applied, with
VCC = 6.25 V and PGM = VIH (Algorithm is shown in
Figure 2). The programming is achieved by applying a
single TIL low level 100lls pulse to the PGM input after
addresses and data line are stable. If the data is not
verified, an additional pulse is applied for a maximum of
25 pulses. This process is repeated while sequencing
through each address of the device.
When the
programming mode is completed, the data in all address
is verified at VCC = VPP = 5V ± 10%.
It is important to note that the MX27C11 00/1 024, and
similar devices, will be cleared for all bits of their
programmed states with light sources having
wavelengths shorter than 4000 A. Although erasure
times will be much. longer than that with UV sources at
2537A, nevertheless the exposure to fluorescent light
and sunlight will eventually erase the MX27C11 00/1 024
and exposure to them should be prevented to realize
maximum system reliability.
If used in such an
environment, the package window should be covered by
an opaque label or substance.
PROGRAM INHIBIT MODE
Programming of multiple MX27C11 00/1 024's in parallel
with different data is also easily accol!lPlisheJLby using
the Program Inhibit Mode. Except for CE and OE, all like
inputs ofthe parallel MX27C11 00/1 024 may be common.
A TTL 10w-levelJrogram pulse applied to an
MX27C1100/1024 CE input with VPP = 12.5 ± 0.5 V will
program the MX27C11 00/1 024. A high-level CE input
inhibits the other MX27C1100/1024s from being
programmed.
THE PROGRAMMING OF THE MX27C1100/1024
When the MX27C11 00/1 024 is delivered, or it is erased,
the chip has all 1M bits in the "ONE", or HIGH state.
"ZEROs" are loaded into the MX27C11 00/1 024 through
the procedure of programming.
The programming mode is entered when 12.5 ± 0.5V is
applied to the VPP pin, OE is at VIH and PGM is at VIL
(MX27C1024) and programming mode entered when
.1S5 ± 5V is applied to the BYTENPP pin, OE at VIH and
CE at VIL (MX27C1100).
PROGRAM VERIFY MODE
Verification should be performed on the programmed bits
to determine that they were correctly programmed. The
verification should be performed with OE and CE, at VIL,
and VPP at its programming voltage.
For programming, the data to be programmed is applied
with 16 bits in parallel to the data pins.
The flowchart in Figure 1 shows MXIC's interactive
algorithm. Interactive algorithm reduces programming
time by using short programming pulses and giving each
address only as many pulses as is necessary in order to
reliably program the data. After each pulse is applied to
a given address, the data in that address is verified. If the
data is not verified, additional pulses are given until it is
verified or the maximum is reached. This process is
repeated while sequencing through each address of the
AUTO IDENTIFY MODE
The auto identify mode allows the reading out of a binary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programming equipment for the purpose of automatically
matching the device to be programmed with its
9-4
IYIATM
MACRONIX, INC.
MX27C1100/27C1024
corresponding programming algorithm. This mode is
functional in the 25°C ± 5°C ambient temperature range
that is required when programming the MX27C11001
1024.
STANDBY MODE
The MX27C 1100/1024 has a CMOS standby mode which
reduces the maximum VCC current to 100 IlA. It is placed
in CMOS standby when CE is at VCC ± 0.3 V. The
MX27C1100/1024 also has a TTL-standby mode which
reduces the maximum VCC current to 1.5 mAo It is placed
in TTL-standby when CE is at VIH. When in standby
mode, the outputLare in a high-impedance state,
independent of the OE input.
To activate this mode, the programming equipment must
force 12.0 ± 0.5 V on address line A9 of the device. Two
identifier bytes may then be sequenced from the device
outputs by toggling address line AO from VIL to VIH. All
other address lines must be held at VIL during auto
identify mode.
Byte 0 (AO =VIL) represents the manufacturer code, and
byte 1 (AO = VIH), the device identifier code. For the
MX27C11 00/1 024, these two identifier bytes are given in
the Mode Select Table. All identifiers for manufacturer
and device codes will possess odd parity, with the MSB
(0015) defined as the parity bit.
TWO-LINE OUTPUT CONTROL FUNCTION
READ MODE
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
To accommodate multiple memory connections, a twoline control function is provided to allow for:
1. Low memory power dissipation,
2. Assurance that output bus contention will not occur.
The MX27C11 00/1 024 has two control functions, both of
which must be logically satisfied in order to obtain data at
the outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable (OE)
is the output control and should be used to gate data to the
output pins, independent of device selection. Assuming
that addresses are stable, address access time (tACC) is
equal to the delay from CE to output (tCE). Data is
available at the outputs tOE after the falling edge of OE's,
assuming that CE has been LOW and addresses have
been stable for at least tACC - t OE.
SYSTEM CONSIDERATIONS
During the switch between active and standby conditions,
transient current peaks are produced on the rising and
falling edges of Chip Enable. The magnitude of these
transient current peaks is dependent on the output
capacitance loading of the device. At a minimum, a 0.1
IlF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between Vcc
and GNO to minimize transient effects. In addition, to
overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4.7 IlF bulk electrolytic capacitor should be used
between VCC and GNO for each eight devices. The
location of the capacitor should be close to where the
power supply is connected to the array.
WORD-WIDE MODE
With BYTElVPP at VCC ± 0.2V outpLits 00-7 present data
00-7 and outputs 08-15 present data 08-15, after CE and
OE are appropriately enabled.
BYTE-WIDE MODE
With BYTENPP at GNO ± 0.2V, outputs 08-15 are tristated. If 015/A-1 = VIH, outputs 00-7 present data bits
08-15. If 015/A-1 = VIL, outputs 00-7 present data bits
00-7.
9-5
_ATM
----
MX27C.,.,OO/27C.,024
MACRONIX. INC.
MODE SELECT TABLE (MX27C1024)
PINS
MODE
CE
OE
PGM
AO
A9
VPP
OUTPUTS
Read
VIL
VIL
X
X
X
VCC
DOUT
Output Disable
VIL
VIH
X
X
X
VCC
HighZ
Standby (TTL)
VIH
X
X
X
X
VCC
HighZ
Standby (CMOS)
VCC±O.3V
X
X
X
X
VCC
HighZ
Program
VIL
VIH
VIL
X
X
VPP
DIN
Program Verify
VIL
VIL
VIH
X
X
VPP
DOUT
Program Inhibit
VIH
X
X
X
X
VPP
HighZ
Manufacturer Code
VIL
VIL
X
VIL
VH
VCC
OOC2H
Device Code
VIL
VIL
X
VIH
VH
VCC
0111H
NOTES: 1. VH = 12.0V ±O.5V
2. X = Either VIH or VIL(For auto select)
3. Al-A8 =Al0-A16 = VIL(For auto select)
4. See DC Programming Characteristics for VPP voltage during
programming.
MODE SELECT TABLE (MX27C11 00)
CE
OE
A9
AO
Q151A-1
BYTEI
VPP(4)
Q8-14
QO-7
Read (Word)
VIL
VIL
X
X
D150ut
VCC
DS-14 Out
DO-70ut
Read (Upper Byte)
VIL
VIL
X
X
VIH
GND
HighZ
DS-15 Out
HighZ
DO-70ut
MODE
NOTES
Read (Lower Byte)
VIL
VIL
X
X
VIL
GND
Output Disable
VIL
VIH
X
X
HighZ
X
HighZ
HighZ
Standby
VIH
X
X
X
HighZ
X
HighZ
High Z
VIL
VIH
X
X
D151n
VPP
DS-14In
DO-7In
Program Verify
VIH
VIL
X
X
D150ut
VPP
DS-14 Out
DO-70ut
Program Inhibit
VIH
VIH
X
X
HighZ
VPP
HighZ
HighZ
VIL
VIL
VH
VIL
OB
VCC
OOH
C2H
VIL
VIL
VH
VIH
OB
VCC
01H
12H
~gram
Manufacturer Code
Device Code
2
2,3
3. Al - AS, Al0 - A15 = VIL, A9 = VH = 12.0V ± 0.5V
4. BYTENPP is intended for operation under DC Voltage conditions
only.
NOTES: 1. X can be VIL or VIH.
2. See DC Programming Characteristics for VPP voltages.
9-6
------
IYIATM
MX27C~~OO/27C~024
MACRONIX. INC.
FIGURE 1. INTERACTIVE PROGRAMMING FLOW CHART
T
l
START
INTERACTIVE
SECTION
YES
X= 25?
NO
FAIL
VERIFY BYTE
PASS
NO
PASS
LAST ADDRESS
INCREMENT ADDRESS
VERIFY BYTE
FAIL
OVERPROGRAM
SECTION
I
NO
INCREMENT ADDRESS
LAST ADDRESS
?
I
VERIFY SECTION
L_l
FAIL
VERIFY ALL BYTES r---L~D~E~V~IC~E~F"!.A~IL=E::D~
9-7
_Am
MX27C~~OO/27C~024
w.cRONIlC, INC.
FIGURE 2. FAST PROGRAMMING FLOW CHART
INTERACTIVE
SECTION
YES
x = 25?
NO
FAIL
VERIFY BYTE
PASS
NO
LAST ADDRESS
INCREMENT ADDRESS
FAIL
I~
~~F~A~IL~~==~~~~~~
DEVICE FAILED
VERIFY ALL BYTES....
9·8
IYIATM
MX27C~~OO/27C~024
MACRONIX, INC.
SWITCHING TEST CIRCUITS
DEVICE
UNDER
TEST
1.8KQ
~--~~--~~--~~--~----~VVv-----O+5V
CL
6.2KQ
DIODES =IN3064
OR EQUIVALENT
CL = 100 pF Including jig capacitance
SWITCHING TEST WAVEFORMS
2.4v----~X
_
_ _ ~~2.0V
O.4V _____
_ _ _ _J> 0.8V
TEST POINTS
2 . 0 V l- ' X -0.8V"- ___~_____
OUTPUT
INPUT
AC TESTING: Inputs are driven at 2.4V for a logic "1" and O.4V for a logic "0:'.
Input pulse rise and fall times are <20ns.
9-9
MX27C~~OO/27C~024
ABSOLUTE MAXIMUM RATINGS
RATING
NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended period may affect reliability.
NOTICE:
Specifications contained within the following tables are subject to
change.
VALUE
Ambient Operating Temperature
Storage Temperature
-65'C to 125'C
Applied Input Voltage
-0.5V to 7.0V
Applied Output Voltage
-0.5V to VCC + 0.5V
VCC to Ground Potential
-0.5V to 7.0V
A9& Vpp
-0.5V to 13.5V
DC CHARACTERISTICS TA =ooe to 70oe, vee
=5V ± 10%
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
VOL
Output Low Voltage
VIH
Input High Voltage
VIL
Input Low Voltage
III
ILO
ICC3
MAX.
UNIT
CONDITIONS
V
IOH = -O.4mA
0.4
V
IOL= 2.1mA
2.0
VCC +0.5
V
-0.3
0.8
V
Input Leakage Current
-10
10
IlA
VIN = 0 to 5.5V
Output Leakage Current
-10
10
IlA
VOUT = 0 to 5.5V
VCC Power-Down Current
100
I!A
CE = VCC ± 0.3V
ICC2
VCC Standby Current
1.5
mA
CE=VIH
ICCl
VCC Active Current
60
mA
CE = VIL, f=5MHz, lout = OmA
IPP
VPPSupply Current Read
100
IlA
CE = OE = VIL, VPP = 5.5V
CAPACITANCE TA =25°e, f
=1.0 MHz (Sampled only)
SYMBOL
PARAMETER
TYP.
MAX.
UNIT
CONDITIONS
CIN
Input Capacitance
8
12
pF
VIN =OV
COUT
Output CapaCitance
8
12
pF
VOUT=OV
CVPP
VPP CapaCitance
18
25
pF
VPP=OV
AC CHARACTERISTICS TA = ooe to 70oe, vee = 5V± 10%
27Cl1l!!!l:I1124-911
SYMBOL
PARAMETER
MIN.
tACC
Address to Output Delay
90
teE
Chip Enable to Output Delay
90
tOE
Output Enable to Output Delay
40
tDF
OE J::!igh to Output Float,
or CE High to Output Float
0
tOH
Q!!tput Hold from Address,
CE or OE which ever occurred first
0
27Cl111I1l11!2~-12
MAX.
MIN.
MAX.
2ZCll 0011 1124-15
MIN.
MAX.
UNIT
CONDITIONS
150
ns
CE = OE=VIL
120
150
ns
OE =VIL
50
65
ns
CE =VIL
50
ns
120
25
0
0
9-10
35
0
0
ns
. . ArM
MX27C1100/27C1024
MACRONIX, INC.
AC CHARACTERISTICS(Continued)
27!:!110!!::9!!
SYMBOL
PARAMETER
tBHA
BYTE Access Time
tOHB
BYTE Output Hold Time
tBHZ
BYTE Output Delay Time
IBLl
ByTE Output Set Time
MIN.
21!:!11!H1-j2
MAX.
MIN.
90
MAX.
27!:!lj!l!l-Hi
MIN.
120
0
0
70
UNIT
150
ns
0
70
10
MAX.
ns
70
10
CONDITIONS
10
ns
ns
DC PROGRAMMING CHARACTERISTICS TA =25°C ± 5°C
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
VOL
Output Low Voltage
VIH
Input High Voltage
VIL
III
MAX.
UNIT
CONDITIONS
V
IOH = -0.40mA
0.4
V
IOL=2.1mA
2.0
VCC+0.5
V
Input Low Voltage
-0.3
0.8
V
Input Leakage Current
-10
10
J,tA
VH
A9 Auto Select Voltage
11.5
12.5
V
ICC3
VCC Supply Current (Program & Verify)
50
mA
IPP2
VPP Supply Current(Program)
30
mA
VCCl
Interactive Supply Voltage
5.75
6.25
V
VPPl
Interactive ProgrB;mming Voltage
12.0
13.0
V
VCC2
Fast Programming Supply Voltage
6.00
6.50
V
VPP2
Fast Programming Voltage
12.5
13.0
V
MAX.
UNIT
VIN = 0 to 5.5V
CE = VIL, OE = VIH
AC PROGRAMMING CHARACTERISTICS TA =25°C ± 5°C
SYMBOL
PARAMETER
MIN.
tAS
Address Setup Time
2.0
itS
tOES
6E Setup Time
2.0
itS
IDS
Data Setup Time
2.0
itS
tAH
Address Hold Time
0
itS
IDH
Data Hold Time
2.0
IDFP
CE to Output Float Delay
0
tVPS
VPP Setup Time
tPW
CE Program Pulse Width
itS
130
2.0
nS
itS
Fast
95
105
itS
Interactive
0.95
1.05
mS
tOPW
CE Overprogram Pulse(lnteractive)
1.95
2.05
tVCS
vcc Setup Time
2.0
tDV
Data Valid from CE
teES
CE Setup Time
tOE
Data valid from OE
250
nS
150
'nS
2.0
9-11
mS
itS
itS
CONDITIONS
----
. . ArM
MX27C~~OO/27C~024
MACRONIX. INC.
WAVEFORMS(MX27C1024)
READ CYCLE
ADDRESS
INPUTS
~~
~
VALIDADDRESS
~CC-
CE
'"
OE
DATA
OUT
~""2.2E~:~}
.
.
i/
!---tCE-
--
'"
/~DF---t
·······;;X
X
VALID DATA
",
~OH-
-K>H-
INTERACTIVE PROGRAMMING ALGORITHM WAVEFORMS
,~.>------- PROGRAM----_~ ...___--PROGRAM
ADDRESS
INPUTS
VERIFY--_
~
VIH
~~'-______________V_AL_'D__AD_D_R_E_S_S____r_----------------------I~
-tAS--
DATA
OUT
-----<
VPP
VPP
VCC
DATA OU I VALlD~
1)---
DATA IN STABLE
_tDS__
---0
-tDFP ....
~tDH
--~--~----~+----+----~--_r-----
~ _ _ tVPS_
VCC+~1~------~--------+_~------_+--------_r------t_---------
vV -tVCSVIH
--.,.
VIL ~
-tCESVIH
~I:'" - - - - - -~+-------rV
VIH
VIL
~
_tOPW-.
-------------------....!>....-------'
9·12
. . ATM
MX27C1100/27C1024
MACRONIX, INC.
WAVEFORMS(MX27C1100)
PROPAGATION DELAY FROM CHIP ENABLE(ADDRESS VALID)
HIGH Z
A-1
HIGH-Z
IOH
- - - tAA ----_
BVTENPP
~
r\
00-07
-
/
/K
tOHB
)1\..
VALID DATA
I-
'\
/
015-08
/ ( VALID DATA
I-tBHA
'\I
-
/
~tBHZ
L
I"
<
VALID DATA
tBU
INTERACTIVE PROGRAMMING ALGORITHM WAVEFORMS
1••- - - - - - - PROGRAM----_" ...---PROGRAM VERIFY_
VIH
ADDRESS
INPUTS
~K
VALID ADDRESS
V~ _tAS
~----------------------------~------------------------~~.
__
l~tAH4
DATA
OUT
~
VPP
BVTENPP
DATA IN STABLE
~
DATA OUT VALID
>----
~------~------------~
_tDS ___
-tDH
--~------+_--------+_-r-------r--------r_----_+----------
~
_tVPS_
VCC+ 1
--~------~--------+--r-------r--------r_----_+----------
VCC
v::U
VIH
CE
VIL
I\.
I
-------I~-----~_tOES_I _ t O E ___
VIH
--
.I
----------------+---~~------~
OE
~~ _ _ _ _ _ _ _ _ ~t~~_ _ _ _ _ _"I\...lll<->--______________/ /
9-13
-----
. . ATM
MX27C~~OO/27C~024
MACRONIX, INC.
ORDERING INFORMATION
CERAMIC PACKAGE
PART NO.
ACCESSTIME
OPERATING CURRENT
MAX.(mA)
STANDBY CURRENT
(ns)
MX27C1100DC-90
90
60
100
40 Pin DIP(ROM pin out)
MX27C1100DC-12
120
60
100
40 Pin D1P(ROM pin out)
40 Pin DIP(ROM pin out)
PACKAGE
MAX.(mA)
MX27C1100DC-15
150
60
100
MX27C1024DC-90
90
60
100
40 Pin DIP(JEDEC pin out)
MX27C1024DC-12
120
60
100
40 Pin DIP(JEDEC pin out)
MX27C1024DC-15
150
60
100
40 Pin DIP(JEDEC pin out)
OPERATING CURRENT
MAX.(mA)
STANDBY CURRENT
PACKAGE
PLASTIC PACKAGE
PART NO.
ACCESS TIME
(ns)
MAX.(mA)
MX27C1100PC-90
90
60
100
40 Pin DIP(ROM pin out)
MX27C1100PC-12·
120
60
100
40 Pin DIP(ROM pin out)
MX27C1100PC-15
150
60
100
40 Pin DIP(ROM pin out)
MX27C1024PC-90
90
60
100
40 Pin DIP(JEDEC pin out)
MX27C1024PC-12
120
60
100
40 Pin DIP(JEDEC pin out)
MX27C1024PC-15
150
60
100.
40 Pin DIP(JEDEC pin out)
MX27C1024QC-90
90
60
100
44 Pin PLCC
MX27C1024QC-12
120
60
100
44PinPLCC
MX27C1024QC-15
150
60
100
44 Pin PLCC
9-14
~[ffi~[LJ[fuIA]D~&.l[ffiW
IYIATM
MX27C2000
MACRONIX, INC.
2M-BIT[25BK x B) CMOS EPROM
FEATURES
•
•
•
•
•
256Kx 8 organization
Single +5V power supply
+ 12.5V programming voltage
Fast access time: 90/120/150 ns
Totally static operation
•
•
•
•
Completely TTL compatible
Operating current: 60mA
Standby current: 100ilA
Package type:
- 32 pin ceramic DIP, plastic DIP
- 32 pin SOP
GENERAL DESCRIPTION
programming outside from the system, existing EPROM
programmers may be used. The MX27C2000 supports a
intelligent quick pulse programming algorithm which can
result in programming times of less than one minute.
The MX27C2000 is a 5V only, 2M-bit, ultraviolet Erasable
Programmable Read Only Memory. It is organized as
256K words by 8 bits per word, operates from a single +
5 volt supply, has a static standby mode, and features
fast single address location programming. All programming signals are TTL levels, requiring a single pulse. For
This EPROM is packaged in industry standard 32 pin
dual-in-line packages or 32 lead, SOP packages.
PIN CONFIGURATIONS
BLOCK DIAGRAM
32 CDIP/PDIP
CE
; ] - 00-07
PGM
vcc
OE
PGM
A17
A8
AO-A17
ADDRESS
INPUTS
A11
A2
A1
01
02
GND
VCC _ _ _
05
VP~
GND------.-
32 SOP
PIN DESCRIPTION
VPP
A16
A1S
A12
A7
A6
AS
A4
A3
A2
A1
AO
00
01
02
GND
SYMBOL
PIN NAME
__
A_O-_A_1_7_ _ _ _
A_ddress I-cnp_u_t_ _ _ _ _ _ _ _ __
00-07
Data Input/Output
CE
Chip Enable Input
OE
Output Enable Input
PGM
Programmable Enable Input
07
__V_P_P_ _ _ _ _P_rogram Supply Voitage
NC
No Internal Connection
VCC
Power Supply Pin (+5V)
GND
Ground Pin
REV. 2.0, FEB. 4,1993
PIN: PM0157
10-1
IYIATM
MX27C2000
MACRONIX. INC.
FUNCTIONAL DESCRIPTION
have sufficient margin. After the final address is
completed, the entire EPROM memory is verified at VCC
= 5V± 10%.
THE ERASURE OF THE MX27C2000
The MX27C2000 is erased by exposing the chip to an
ultraviolet light source. A dosage of 15 W seconds/cm2 is
required to completely erase a MX27C2000. This
dosage can be obtained by exposure to an ultraviolet
lamp - wavelength of 2537 Angstroms (A) - with
intensity of 12,000 IlW/cm2 for 15 to 20 minutes. The
MX27C2000 should be directly under and about one inch
from the source and all filters should be removed from the
UV light source prior to erasure.
FAST PROGRAMMING
The device is set up in the fast programming mode when
the programming voltage VPP = 12.75V is applied, with
VCC = 6.25 V and PGM = VIH (Algorithm is shown in
Figure 2). The programming is achieved by applying a
single TTL low level 100llS pulse to the PGM input after
addresses and data line are stable. If the data is not
verified, an additional pulse is applied for a maximum of
25 pulses. This process is repeated while sequencing
through each address of the device.
When the
programming mode is completed, the data in all address
is verified at VCC = VPP = 5V ± 10%.
It is important to note that the MX27C2000, and similar
devices, will be cleared for all bits of their programmed
states with light sources having wavelengths shorter than
4000 A. Although erasure times will be much longer than
that with UV sources at 2537A, nevertheless the
exposure to fluorescent light and sunlight will eventually
erase the MX27C2000 and exposure to them should be
prevented to realize maximum system reliability. If used
in such an environment, the package window should be
covered by an opaque label or substance.
PROGRAM INHIBIT MODE
Programming of multiple MX27C2000s in parallel with
different data is also easily accomplished bYJ:!sing the
Program Inhibit Mode. Except for CE and OE, all like
inputs of the parallel MX27C2000 may be common. A
TTL low-level program pulse applied to an MX27C2000
CE input with VPP = 12.5 ± 0.5 V and.J:GM LOW will
program that MX27C2000. A high-level CE input inhibits
the other MX27C2000s from being programmed.
THE PROGRAMMING OF THE MX27C2000
When the MX27C2000 is delivered, or it is erased, the
chip has all 2M bits in the "ONE", or HIGH state. "ZEROs"
are loaded into the MX27C2000 through the procedu re of
programming.
PROGRAM VERIFY MODE
Verification should be performed on the programmed bits
to determine that they were correctly programmed. The
verification should be performed with OE and CE, at VIL,
PGM at VIH, and VPP at its programming voltage.
The programming mode is entered when 12.5 ± 0.5 V is
applied to the VPP pin, OE is at VIH, and CE and PGM
are at VIL.
For programming, the data to be programmed is applied
with 8 bits in parallel to the data pins.
AUTO IDENTIFY MODE
The auto identify mode allows the reading out of a binary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programming equipment for the purpose of automatically
matching the device to be programmed with its
corresponding programming algorithm. This mode is
functional in the 25°C ± 5°C ambient temperature range
that is required when programming the MX27C2000.
The flowchart in Figure 1 shows MXIC's interactive
algorithm. Interactive algorithm reduces programming
time by using short programming pulses and giving each
address only as many pulses as is necessary in order to
reliably program the data. After each pulse is applied to
a given address, the data in that address is verified. If the
data is not verified, additional pulses are given until it is
verified or the maximum is reached. This process is
repeated while sequencing through each address of the
MX27C2000. This part of the algorithm is done at VCC=
6.0V to assure that each EPROM bit is programmed to
a sufficiently high threshold voltage. After the interactive
programming is completed, an overprogram pulse is
given to each memory location; this ensures that all bits
To activate this mode, the programming equipment must
force 12.0 ± 0.5 V on address line A9 of the device. Two
identifier bytes may then be sequenced from the device
outputs by toggling address line AO from VIL to VIH. All
other address lines must be held at VIL during auto
identify mode.
10-2
MX27C2000
MACRONIX, INC.
Byte 0 (AO = VIL) represents the manufacturer code, and
byte 1 (AO = VIH), the device identifier code. For the
MX27C2000, these two identifier bytes are given in the
Mode Select Table. All identifiers for manufacturer and
device codes will possess odd parity, with the MSB (D07)
defined as the parity bit.
TWO-LINE OUTPUT CONTROL FUNCTION
To accommodate multiple memory connections, a twoline control function is provided to allow for:
1. Low memory power dissipation,
2. Assurance that output bus contention will not occur.
READ MODE
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
The MX27C2000 has two control functions, both of which
must be logically satisfiecljn order to obtain data at the
outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable (OE)
is the output control and should be used to gate data to the
output pins, independent of device selection. Assuming
that addresses are stable, address access time (tACC) is
equal to the delay from CE to output (tCE). DatC!Js
available at the ~tputs tOE after the falling edge of OE,
assuming that CE has been LOW and addresses have
been stable for at least tACC - tOE.
SYSTEM CONSIDERATIONS
During the switch between active and standby conditions,
transient current peaks are produced on the rising and
falling edges of Chip Enable. The magnitude of these
transient current peaks is dependent on the output
capacitance loading of the device. At a minimum, a 0.1
IlF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between Vcc
and GND to minimize transient effects. In addition, to
overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4. 71lF bulk electrolytic capacitor should be used
between VCC and GND for each eight devices. The
location of the capacitor should be close to where the
power supply is connected to the array.
STANDBY MODE
The MX27C2000 has a CMOS standby mode which
reduces the maximum VCC current to 100 1lA. It is placed
in CMOS standby when CE is at VCC ± 0.3 V. The
MX27C2000 also has a TTL-standby mode which
reduces the maximum VCC current to 1.5 mA. It is placed
in TTL-standby when CE is at VIH. When in standby
mode, the outputs~re in a high-impedance state,
independent of the OE input.
MODE SELECT TABLE
PINS
MODE
CE
OE
PGM
AO
A9
VPP
Read
VIL
VIL
X
X
X
VCC
DOUT
Outpul Disable
VIL
VIH
X
X
X
VCC
High Z
Siandby (TTL)
VIH
X
X
X
X
VCC
High Z
OUTPUTS
------
----
Standby (CMOS)
VCC±0.3V
X
X
X
X
VCC
High Z
Program
VIL
VIH
VIL
X
X
VPP
DIN
Program Verify
VIL
VIL
VIH
X
X
VPP
DOUT
Program Inhibit
VIH
X
VPP
High Z
VIL
Vil.
x
x
X
Manufacturer Code
Device Code
VIL
VIL
X
VIH
-----_.
X
------- -
VIL
----
VH
VCC
----------
NOTES: 1. VH = 12.0 V ± 0.5 V
2. X = Either VIH or VIL(For auto select)
VH
C2H
--------
VCC
20H
3. AI - AS = Ala - A16 = VIL(For auto select)
4. See DC Programming Characteristics for VPP voltage during
programming.
10-3
IVIArM
MX27C2000
MACRONIX, INC.
FIGURE 1. INTERACTIVE PROGRAMMING FLOW CHART
INTERACTIVE
SECTION
VERIFY BYTE
INCREMENT ADDRESS
FAIL
OVERPROGRAM
SECTION
NO
INCREMENT ADDRESS
LAST ADDRESS
VERIFY SECTION
1
VERIFY ALL
BYTES;>~F~A~IL~L~!?D'::EV~IC':'.E~FA~I~LIE=D'-J
L _ _ _ _ _ _ _ _ _~-------------.-.-~----.-----~I
10·4
IYIATM
MX27C2000
MACRONIX. INC.
FIGURE 2. FAST PROGRAMMING FLOW CHART
INTERACTIVE
SECTION
x = 25?
FAIL
YES
VERIFY BYTE
NO
INCREMENT ADDRESS
FAIL
I
FAIL
10-5
DEVICE FAILED
----
IYIATM
MX27C2000
MACRONIX, INC.
SWITCHING TEST CIRCUITS
1.BKQ
DEVICE
UNDER
TEST
}
DIODES = IN3064
J
6.2KQ
CL
OR EQUIVALENT
CL = 100 pF Including jig capacitance
SWITCHING TEST WAVEFORMS
2.4V--~X
_
_ _ ~2.0V
O.4V _ __
____ JiO.BV
INPUT
AC TESTING: Inputs are driven at 2.4V for a logic "1" and O.4V for a logic "0".
Input pulse rise and fall times are $1 Ons.
10-6
IVIATM
MX27C2000
MACRONIX, INC.
ABSOLUTE MAXIMUM RATINGS
RATING
NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended period may affect reliability.
NOTICE:
Specifications contained within the following tables are subject to
change.
VALUE
Ambient Operating Temperature
Storage Temperature
-65'C to 125'C
Applied Input Voltage
-0.5V to 7.0V
Applied Output Voltage
-0.5V to VCC + 0.5V
VCC to Ground Potential
-0.5V to 7.0V
V9 & VPP
-0.5V to 13.5V
DC CHARACTERISTICS TA
= ooe to 70oe, vee = sv ±
10%
PARAMETER
MIN.
UNIT
CONDITIONS
VOH
---_.
VOL
Output High Voltage
2.4
V
IOH = -O.4mA
Output Low Voltage
V
IOL = 2.1mA
VIH
Input High Voltage
0.4
------2.0
VCC+ 0.5
Input Low Voltage
SYMBOL
-_. -_._-------------------
VIL
-----III
MAX.
V
-0.3
0.8
V
Input Leakage Current
-10
10
~
VIN =
ILO
Output Leakage Current
-10
10
~A
VOUT =
ICC3
VCC Power-Down Current
100
~A
CE = vcc ± 0.3V
ICC2
VCC Standby Current
1.5
rnA
CE=VIH
---.-----.--~--.-
a to 5.5V
a to 5.5V
-~---------
ICCI
- - - - _..__ .IPP
VCC Active Current
--~
CAPACITANCE T A
60
rnA
CEO = VIL, f=5MHz, lout = OmA
100
~A
eE = ~ = VIL, VPP = 5.5V
... - - - .
VPP Supply Current Read
= 2Soe, f = 1.0 MHz (Sampled only)
SYMBOL
PARAMETER
TYP.
MAX.
UNIT
CONDITIONS
CIN
Input Capacitance
8
12
pF
VIN=OV
COUT
Output Capacitance
8
12
pF
VOUT= OV
CVPP
VPP Capacitance
18
25
pF
VPP =OV
AC CHARACTERISTICS TA = ooe to 70 oe, vee
= sv±
10%
27C2000-90
27C2g00-12
27C200g-15
MIN.
MIN.
MIN.
SYMBOL
PARAMETER
MAX.
UNIT
IACC
Address to Output Delay
90
120
150
ns
CE = OE = VIL
tCE
Chip Enable to Output Delay
90
120
150
ns
OE =VIL
tOE
Output Enable to Output Delay
65
ns
CE=VIL
tDF
OE High to Output Float.
or CE High to Output Float
a
50
ns
tOH
Q.tJtputJ::I0ld from Address.
CE or OE which ever occurred first
a
MAX.
40
MAX.
50
a
25
a
10-7
35
a
a
ns
CONDITIONS
. . ATM
MX27C2000
MACRONIX. INC.
DC PROGRAMMING CHARACTERISTICS TA = 2SOC ± SOC
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
MAX.
UNIT
CONDITIONS
V
IOH = -0.40mA
IOL = 2.1mA
VOL
Output Low Voltage
0.4
V
VIH
Input High Voltage
2.0
VCC + 0.5
V
VIL
Input Low Voltage
-0.3
0.8
V
III
Input Leakage Current
-10
10
).IA
VH
A9 Auto Select Voltage
11.5
12.5
V
mA
ICC3
VCC Supply Current (Program & Verify)
50
IPP2
VPP Supply Current(Program)
30
mA
VCCI
Interactive Supply Voltage
6.25
V
VPPI
Interactive Programmir;g Voltage
12.0
13.0
V
VCC2
Fast Programming Supply Voltage
6.00
6.50
V
VPP2
Fast Programming Voltage
12.5
13.0
V
5.75
VIN = 0 to 5.5V
CE=PGM =VIL,OE=VIH
AC PROGRAMMING CHARACTERISTICS TA = 25°C ± SoC
SYMBOL
PARAMETER
MIN.
lAS
Address Setup Time
2.0
MAX.
UNIT
).IS
tOES
Of: Setup Time
2.0
).IS
IDS
Data Setup Time
2.0
).IS
tAH
Address Hold Time
0
).IS
tDH
Data Hold Time
2.0
tDFP
CE to Output Float Delay
0
tVPS
VPP Setup Time
2.0
tPW
PGII1I Program Pulse Width
tOPW
PGII1I Overprogram Pulse(lnteractive)
tVCS
VCC Setup Time
2.0
tDV
Data Valid from CE
tCES
CE Setup Time
tOE
Data valid from DE
).IS
130
nS
mS
105
mS
Fast
95
Interactive
0.95
1.05
mS
1.95
2.05
mS
mS
250
2.0
).IS
150
10-8
nS
nS
CONDITIONS
IYIAru
MX27C2000
MACRONIX, INC.
WAVEFORMS
READ CYCLE
ADDRESS
INPUTS
'/ ~
~
VAliD ADDRESS
~CC-
CE
""
V
~CE--
OE
""
DATA
OUT
/--tDF----
X
VAUDDATA
><
',:~'i';<·:yt;('
~H-
-,oH-
INTERACTIVE PROGRAMMING ALGORITHM WAVEFORMS(NOTE1 & 2)
I.~------ PROGRAM------I~ ••I----PROGRAM VERIFY--~
ADDRESS
INPUTS
DATA
OUT
~
VIL
K
~
DATA IN STABLE
~
_tDS __
VPP
VPP
--
'!:Y _tVPS_
VCC
VALID ADDRESS
---
DATA OU VALID
-tDFp....
~tDH
VCC+1
v.V --tVCSVIH
----".
VIL
---
'"
~tOES_
-tCES--
VIH
V
VIL
-------VIH
pc
~------------------------~----------------------_fI
~tPW_
10-9
_ _ tOE _ _
}---
IftAlM
MX27C2000
MACRONIX. INC.
ORDERING INFORMATION
CERAMIC PACKAGE
PART NO.
ACCESS TIME(ns)
OPERATING CURRENT MAX.(mA)
STANDBY CURRENT MAX.(/l A)
PACKAGE
MX27C2000DC·90
90
60
100
32 Pin DIP
MX27C2000DC·12
120
60
100
32 Pin DIP
MX27C2000DC·15
150
60
100
32 Pin DIP
PLASTIC PACKAGE
PART NO.
ACCESS TIME(ns)
OPERATING CURRENT MAX.(mA)
STANDBYCURRENTMAX.{Jl A)
PACKAGE
MX27C2000PC-90
90
60
100
32 Pin DIP
MX27C2000MC-90
90
60
100
32 Pin SOP
MX27C2000PC-12
120
60
100
32 Pin DIP
MX27C2000MC-12
120
60
100
32 Pin SOP
MX27C2000PC-15
150
60
100
32 Pin DIP
MX27C2000MC-15
150
60
100
32 Pin SOP
10-10
[,§l [Rl ~ [LJ ffivAl 0[Mffi\[RlW
IYIATM
MX27C2100/27C204B
MACRONIX. INC.
2M-BIT(2S5K x B/4J 2BK x 4J 5) CMOS EPROM
FEATURES
• 128K x 16 organization(MX27C2048, JEDEC pin out)
• 256K x 8 or 128K x 16 organization(MX27C21 00,
ROM pin out compatible)
• + 12.5V programming voltage
• Fast access time: 90/120/150 ns
• Totally static operation
•
•
•
•
Completely TTL compatible
Operating current: 60mA
Standby current: 1OO~A
Package type:
- 40 pin ceramic DIP
- 40 pin plastic DIP
- 44 pin PLCC (MX27C2048)
GENERAL DESCRIPTION
The MX27C2100/2048 is a 5V only, 2M-bit, ultraviolet
Erasable Programmable Read Only Memory. It is organized as 128K words by 16 bits per word(MX27C2048),
256K x 8 or 128K x 16(MX27C2100), operates from a
single + 5 volt supply, has a static standby mode, and
features fast single address location programming. All
programming signals are TTL levels, requiring a single
pulse. For programming outside from the system, existing
EPROM programmers may be used. The MX27C21 001
2048 supports a intelligent quick pulse programming algorithm which can result in programming times of less
than one minute.
This EPROM is packaged in industry standard 40 pin
dual-in-line ceramic packages or 40 pin plastic packages.
PIN CONFIGURATIONS
BLOCK DIAGRAM (MX27C2100)
CDlP/PDIP(MX27C21 00)
CE
NC
A7'
A6
A5
2
~
A4 '
A3
Al,
AO [
CE
GND
DE
00
08
01
09
02
010
03
011
r-
40 J A8
39 J A9
38 J Al0
All
"I A12
A13
OE
BYTElVPP
; ] - 00-014
0151A-l
J A15
9
10
11
)2
13
14
15
16
17
18
19
20
A16
31
30
29
28
27
26
25
24
23
22
AO-A16
BYTElVPP
J GND
ADDRESS
INPUTS
_ 015/A-l
07
014
" 06
"J 013
05
J 012
04
21 -:i
VCa--GN~
vee
PIN: PM158
REV. 2"0, FEB" 4,1993
11-1
IYIATM
MX27C2~OO/27C204B
MACRONIX, INC.
PIN CONFIGURATIONS
PIN CONFIGURATIONS
CDIP/PDIP(MX27C2048)
PLCC(MX27C2048)
vpp
CE
015
014
013
012
011
010
09
9
GND
11
as
07
as
05
Q4
Q3
Q2
01
00'
OE
VCC
PGM
A16
A15
A14
A13
A12
All
Al0
A9
GND
AS
012
~
Al0
Q9
as
GND
A7
A13
A12
All
010
MX27C2048
A9
34
GND
NC
NC
A6
AS
A4
07
AS
as
A7
A3
Q4
05
A2
Al
AO
BLOCK DIAGRAM (MX27C2048)
; } 00-015
AO-A16
ADDRESS
INPUTS
1 44
011
2M BIT
CELL
MATRIX
11-2
AS
29
AS
----
IVIATM
MX27C2~OO/27C204B
MACRONIX. INC.
PIN DESCRIPTION(MX27C2048)
PIN DESCRIPTION(MX27C21 00)
SYMBOL
PIN NAME
SYMBOL
PIN NAME
AO-A16
Address Input
AO-A16
Address Input
00-014
Data Input/Output
00-015
Data Input/Output
CE
Chip Enable Input
CE
Chip Enable Input
OE
Output Enable Input
OE
Output Enable Input
BYTENPP
Word/Byte Selection
/Program Supply Voltage
PGM
Program Enable Input
VPP
Program Supply Voltage
015/A-1
015(Word mode)/LSB addr. (Byte mode)
VCC
Power Supply Pin (+5V)
GND
Ground Pin
VCC
Power Supply Pin (+5V)
GND
Ground Pin
TRUTH TABLE OF BYTE FUNCTION(MX27C2100)
BYTE MODE(BYTE
=GND)
CE
OE
015/A-1
MODE
00-07
H
x
x
Non selected
HighZ
Standby(ICC2)
L
UH
X
Non selected
HighZ
Operating(ICC1 )
L
H/L
A-1 input
Selected
DOUT
Operating(ICC1 )
WORD MODE(BYTE
SUPPLY CURRENT
NOTE
= VCC)
CE
OE
0151A-1
MODE
00-014
SUPPLY CURRENT
H
X
HighZ
Non selected
High Z
Standby(ICC2)
L
UH
HighZ
Non selected
HighZ
Operating(ICC1 )
L
H/L
DOUT
Selected
DOUT
Operating(ICC1 )
NOTE1: X=HorL
11-3
NOTE
MX27C2~OO/27C204B
FUNCTIONAL DESCRIPTION
MX27C21 00/2048. This part of the algorithm is done at
VCC = 6.0V to assure that each EPROM bit is
programmed to a sufficiently high threshold voltage.
After the interactive programming is completed, an
overprogram pulse is given to each memory location; this
ensures that all bits have sufficient margin. After the final
address is completed, the entire EPROM memory is
verified at VCC = 5V ± 10%.
THE ERASURE OF THE MX27C2100/2048
The MX27C21 00/2048 is erased by exposing the chip to
an ultraviolet light source. A dosage of 15 W seconds/cm 2
is required to completely erase a MX27C21 00/2048. This
dosage can be obtained by exposure to an ultraviolet
lamp - wavelength of 2537 Angstroms (A) - with
intensity of 12,000 ~W/cm2 for 15 to 20 minutes. The
MX27C21 00/2048 should be directly under and about
one inch from the source and all filters should be removed
from the UV light source prior to erasure.
FAST PROGRAMMING
The device is set up in the fast programming mode when
the programming voltage VPP = 12.75V is applied, with
VCC = 6.25 V and PGM = VIH (Algorithm is shown in
Figure 2). The programming is achieve~ applying a
single TTL low level 1OO~s pulse to the PGM input after
addresses and data line are stable. If the data is not
verified, an additional pulse is applied for a maximum of
25 pulses. This process is repeated while sequencing
through each address of the device.
When the
programming mode is completed, the data in all address
is verified at VCC = VPP = 5V ± 10%.
It is important to note that the MX27C21 00/2048, and
similar devices, will be cleared for all bits of their
programmed states with light sources having
wavelengths shorter than 4000 A. Although erasure
times will be much longer than that with UV sources at
2537A, nevertheless the exposure to fluorescent light
and sunlight will eventually erase the MX27C21 00/2048
and exposure to them should be prevented to realize
maximum system reliability.
If used in such an
environment, the package window should be covered by
an opaque label or substance.
PROGRAM INHIBIT MODE
Programming of multiple MX27C2100/2048's in parallel
with different data is also easily accomplishe9J?y using
the Program Inhibit Mode. Except for CE and OE, all like
inputs ofthe parallel MX27C21 00/2048 may be common.
A TTL 10w-levelJrogram pulse applied to an
MX27C21 00/2048 CE input with VPP = 12.5 ± 0.5 V will
program the MX27C21 00/2048. A high-level CE input
inhibits the other MX27C2100/2048s from being
programmed.
THE PROGRAMMING OF THE MX27C21 00/2048
When the MX27C21 00/2048 is delivered, or it is erased,
the chip has all 2M bits in the "ONE", or HIGH state.
"ZEROs" are loaded into the MX27C21 00/2048 through
the procedure of programming.
The programming mode is entered when 12.5 ± 0.5V is
applied to the VPP pin, OE is at VIH and PGM is at VIL
(MX27C2048) and programming mode entered when
12.5 ± 5V is applied to the BYTEIVPP pin, OE at VIH and
CE at VIL (MX27C21 00).
PROGRAM VERIFY MODE
Verification should be performed on the programmed bits
to determine that they were correctly programmed. The
verification should be performed with OE and CE, at VIL,
and VPP at its programming voltage.
For programming, the data to be programmed is applied
with 16 bits in parallel to the data pins.
The flowchart in Figure 1 shows MXIC's interactive
algorithm. Interactive algorithm reduces programming
time by using short programming pulses and giving each
address only as many pulses as is necessary in order to
reliably program the data. After each pulse is applied to
a given address, the data in that address is verified. If the
data is not verified, additional pulses are given until it is
verified or the maximum is reached. This process is
repeated while sequencing through each address of the
AUTO IDENTIFY MODE
The auto identify mode allows the reading out of a binary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programming equipment for the purpose of automatically
matching the device to be programmed with its
11_4
----
IYIATM
MACRONIX. INC.
MX27C2100/27C204B
corresponding programming algorithm. This mode is
functional in the 25°C ± 5°C ambient temperature range
that is required when programming the MX27C21 001
2048.
The MX27C21 00/2048 has a CMOS standby mode which
reduces the maximum VCC current to 100 JlA. It is placed
in CMOS standby when CE is at VCC ± 0.3 V. The
MX27C21 00/2048 also has a TTL-standby mode which
reduces the maximum VCC currentto 1.5 mAo It is placed
in TTL-standby when CE is at VIH. When in standby
mode, the outputs are in a high-impedance state,
independent of the OE input.
To activate this mode, the programming equipment must
force 12.0 ± 0.5 V on address line A9 of the device. Two
identifier bytes may then be sequenced from the device
outputs by toggling address line AO from VIL to VIH. All
other address lines must be held at VIL during auto
identify mode.
TWO-LINE OUTPUT CONTROL FUNCTION
Byte 0 (AO = VIL) represents the manufacturer code, and
byte 1 (AO = VIH), the device identifier code. For the
MX27C21 00/2048, these two identifier bytes are given in
the Mode Select Table. All identifiers for manufacturer
and device codes will possess odd parity, with the MSB
(DQ15) defined as the parity bit.
To accommodate multiple memory connections, a twoline control function is provided to allow for:
1. Low memory power diSSipation,
2. Assurance that output bus contention will not occur.
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
READ MODE
The MX27C21 00/2048 has two control functions, both of
which must be logically satisfied in order to obtain data at
the outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable (OE)
is the output control and should be used to gate data to the
output pins, independent of device selection. Assuming
that addresses are stable, address access time (tACC) is
equal to the delay from CE to output (tCE). Data is
available at the outputs tOE after the falling edge of OE's,
assuming that CE has been LOW and addresses have
been stable for at least tACC - t OE.
SYSTEM CONSIDERATIONS
During the switch between active and standby conditions,
transient current peaks are produced on the rising and
falling edges of Chip Enable. The magnitude of these
transient current peaks is dependent on the output
capacitance loading of the device. At a minimum, a 0.1
JlF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between Vcc
and GND to minimize transient effects. In addition, to
overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4.7 JlF bulk electrolytic capacitor should be used
between VCC and GND for each eight devices. The
location of the capacitor should be close to where the
power supply is connected to the array.
WORD-WIDE MODE
With BYTENPP at VCC ± 0.2V outputs QO-7 present data
DO-7 and outputsQ8-15 present data D8-15, afterCE and
OE are appropriately enabled.
BYTE-WIDE MODE
With BYTENPP at GND ± 0.2V, outputs Q8-15 are tristated. If Q15/A-1 = VIH, outputs QO-7 present data bits
D8-15. If Q15/A-1 = VIL, outputs QO-7 present data bits
DO-7.
STANDBY MODE
11-5
----
lYI.Am
MX27C2~OO/27C204B
MACRONIX, INC.
MODE SELECT TABLE (MX27C2048)
PINS
MODE
CE
OE
PGM
AO
A9
VPP
OUTPUTS
Read
VIL
VIL
VIH
X
X
VCC
DOUT
Output Disable
VIL
VIH
VIH
X
X
VCC
HighZ
Standby (TTL)
VIH
X
X
X
X
VCC
HighZ
Standby (CMOS)
VCC±O.3V
X
X
X
X
VCC
HighZ
Program
VIL
VIH
VIL
X
X
VPP
DIN
Program Verify
VIL
VIL
VIH
X
X
VPP
DOUT
Program Inhibit
VIH
X
X
X
X
VPP
HighZ
Manufacturer Code
VIL
VIL
X
VIL
VH
VCC
OOC2H
Device Code
VIL
VIL
X
VIH
VH
VCC
0122H
=
= 12.0V ±O.5V
= Either VIH or VIL(For auto select)
=
3. A1 - AB
A10 - A16
VIL(For auto select)
4. See DC Programming Characteristics for VPP voltage during
programming.
NOTES: 1. VH
2. X
MODE SELECT TABLE (MX27C2100)
CE
OE
A9
AO
Q1S/A-1
BYTE!
VPP(4)
Q8-14
QQ-7
Read (Word)
VIL
VIL
X
X
D150ut
VCC
DB-14 Out
DO-70ut
Read (Upper Byte)
VIL
VIL
X
X
VIH
GND
HighZ
DB-15 Out
Read (Lower Byte)
VIL
VIL
X
X
VIL
GND
HighZ
DO-70ut
Output Disable
VIL
VIH
X
X
HighZ
X
HighZ
High Z
VIH
X
X
X
HighZ
X
HighZ
High Z
VIL
VIH
X
X
D151n
VPP
DB-14In
DO-7In
Program Verify
VIH
VIL
X
X
D150ut
VPP
DB-14 Out
DO-70ut
Program Inhibit
VIH
VIH
X
X
HighZ
VPP
HighZ
High Z
VIL
VIL
VH
VIL
OB
VCC
OOH
C2H
VIH
OB
VCC
OOH
BAH
MODE
NOTES
Standby
$!rogram
Manufacturer Code
Device Code
2
2,3
VIL
VIL
VH
3. A1 - AB, A10 - A15 = VIL, A9 = VH = 12.0V ± 0.5V
4. BYTENPP is intended for operation under DC Voltage conditions
only.
NOTES: 1. X can be VIL or VIH.
2. See DC Programming Characteristics for VPP voltages.
11-6
-- --
IYIATM
MX27C2100/27C204B
MACRONIX. INC.
FIGURE 1. INTERACTIVE PROGRAMMING FLOW CHART
INTERACTIVE
SECTION
x = 257
NO
FAIL
VERIFY BYTE
PASS
NO
LAST ADDRESS
INCREMENT ADDRESS
PASS
VERIFY BYTE
?
FAIL
OVERPROGRAM
SECTION
NO
INCREMENT ADDRESS
LAST ADDRESS
VERIFY SECTION
VERIFY ALL BYTES >---,-,FA",I=-L_-L---.!D~E~V~IC~E~F~A~IL:!:E:!:D'-J
1_ _ _ _ -
11-7
-----
IYIATM
MACRONtx.
MX27C2~OO/27C204B
INC.
FIGURE 2. FAST PROGRAMMING FLOW CHART
START
PROGRAM ONE
100~s
PULSE
INTERACTIVE
SECTION
YES
X =251
NO
FAIL
VERIFY BYTE
PASS
NO
LAST ADDRESS
INCREMENT ADDRESS
FAIL
VERIFY SECTION
FAIL
VERIFY ALL BYTES >--'-'=--IO"L~D'.:E~V:!:IC,!:E:..!F'!.A~IL=E~D~
?
~
')'PAss
DEVICE PASSED
11-8
. . ArM
MX27C2~OO/27C204B
MACRONIX, INC.
SWITCHING TEST CIRCUITS
1.BKQ
DEVICE
~+5V
UNDER
TEST
-
f-
CL
DIODES
~
IN3064
OR EQUIVALENT
; 6.2Kl1
-
CL
=100 pF Including jig capacitance
SWITCHING TEST WAVEFORMS
2AV--~X
_
_ _ ~2.0V
_ _ _
OAV _ _~
_
O.BV
TEST POINTS
2.0V;tXO.BV"- __ _
'-----
OUTPUT
INPUT
AC TESTING: Inputs are driven at 2AV for a logic "1" and OAV for a logic "0".
Input pulse rise and fall times are <20ns.
11-9
MX27C2~OO/27C204B
ABSOLUTE MAXIMUM RATINGS
RATING
VALUE
Ambient Operating Temperature
O'Cto 70'C
Storage Temperature
-65'C to 125'C
Applied Input Voltage
-0.5V to 7.0V
Applied Output Voltage
-0.5V to VCC + 0.5V
VCC to Ground Potential
-0.5V to 7.0V
A9& Vpp
-0.5V to 13.5V
NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended period may affect reliability.
NOTICE:
Specifications contained within the following tables are subject to
change.
DC CHARACTERISTICS TA = ooe to 70oe, vee = 5V ± 10%
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
204
VOL
Output Low Voltage
VIH
Input High Voltage
VIL
III
MAX.
CONDITIONS
UNIT
V
IOH = -Oo4mA
0.4
V
IOL=2.1mA
2.0
VCC+0.5
V
Input Low Voltage
-0.3
0.8
V
Input Leakage Current
-10
10
fLA
VIN =
ILO
Output Leakage Current
-10
10
fLA
VOUT = 0 to 5.5V
ICC3
VCC Power-Down Current
100
fLA
CE =
ICC2
VCC Standby Current
1.5
mA
CE =VIH
ICCI
VCC Active Current
60
mA
CE = VIL, f=5MHz, lout = OmA
IPP
VPP Supply Current Read
100
fLA
CE = BE = VIL, VPP = 5.5V
a to 5.5V
vcc ± 0.3V
CAPACITANCE TA = 25°e, f = 1.0 MHz (Sampled only)
SYMBOL
PARAMETER
TYP
MAX.
UNIT
CONDITIONS
CIN
Input Capacitance
8
12
pF
VIN =OV
COUT
Output Capacitance
8
12
pF
VOUT=OV
CVPP
VPP Capacitance
18
25
pF
VPP=OV
AC CHARACTERISTICS TA =ooe to 70oe, vee =5V± 10%
27C2100L2!!~!H!l!
SYMBOL
PARAMETER
MIN.
27C21!!OL2~!!-12
MAX.
MIN.
MAX.
27C21 1101211411-15
MIN.
MAX.
UNIT
CONDITIONS
tACC
Address to Output Delay
90
120
150
ns
CE = OE = VIL
tCE
Chip Enable to Output Delay
90
120
150
ns
OE=VIL
tOE
Output Enable to Output Delay
40
50
65
ns
CE =VIL
tDF
OE ..!:!igh to Output Float,
or CE High to Output Float
0
50
ns
tOH
Q!!tputJ::!.0ld from Address,
CE or OE which ever occurred first
0
25
0
0
11-10
35
0
0
ns
. . ATM
MX27C2~OO/27C204B
MACRONIX. INC.
AC CHARACTERISTICS(Continued)
27C210!!-90
SYMBOL
PARAMETER
tBHA
BYTE Access Time
tOHB
BYTE Output Hold Time
tBHZ
BYTE Output Delay Time
tBlZ
BYTE Output Set Time
MIN.
27C210!!:12
MAX.
MIN.
MAX.
27C21!!O-Hi
MIN.
120
90
0
0
70
UNIT
150
ns
0
70
10
MAX.
ns
70
10
10
CONDITIONS
ns
ns
DC PROGRAMMING CHARACTERISTICS TA = 25°C ± 5°C
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
204
VOL
Output low Voltage
VIH
Input High Voltage
Vil
III
MAX.
UNIT
CONDITIONS
V
IOH
004
V
IOl
=-OAOmA
=2.1mA
2.0
VCC+0.5
V
Input low Voltage
-0.3
0.8
V
Input leakage Current
-10
10
~A
VIN
=0 to 5.5V
VH
A9 Auto Select Voltage
11.5
12.5
V
ICC3
VCC Supply Current (Program & Verify)
50
mA
CE
=Vil. OE =VIH
IPP2
VPP Supply Current(Program)
30
mA
VCCI
Interactive Supply Voltage
5.75
6.25
V
VPPl
Interactive Programming Voltage
12.0
13.0
V
VCC2
Fast Programming Supply Voltage
6.00
6.50
V
VPP2
Fast Programming Voltage
12.5
13.0
V
AC PROGRAMMING CHARACTERISTICS TA
=25°C ± 5°C
SYMBOL
PARAMETER
MIN.
tAS
Address Setup Time
2.0
~S
tOES
BE Setup Time
2.0
~S
tDS
Data Setup Time
2.0
~S
tAH
Address Hold Time
0
llS
tDH
Data Hold Time
2.0
tDFP
CE to Output Float Delay
0
tVPS
VPP Setup Time
tPW
CE Program Pulse Width
tOpw
CE Overprogram Pulse(lnteractive)
tVCS
vcc Setup Time
2.0
tDV
Data Valid from CE
tCES
CE Setup Time
tOE
Data valid from OE
MAX.
UNIT
~S
130
nS
105
~S
~S
2.0
Fast
95
Interactive
0.95
1.05
mS
1.95
2.05
mS
~S
250
~S
2.0
150
11-11
nS
lis
CONDITIONS
----
IYIATM
MX27C2~OO/27C204B
MACRONIX. INC.
WAVEFORMS(MX27C2048}
READ CYCLE
ADDRESS
INPUTS
VALID ADDRESS
i4---tACC-----
CE
OE
DATA
OUT
VALID DATA
"";,,,
INTERACTIVE PROGFIAMMING ALGORITHM WAVEFORMS
+.------
ADDRESS
INPUTS
~K
VIL
~
PROGRAM-----~ ••---PROGRAM VERIFY--~
VALID ADDRESS
K
~------------------------~----------------------_fl
-tASDATA
OUT
VPP
DATA IN STABLE
_tDS_
VPP
DATA OU VALJD)----tDFP-OO
~tDH
----~------~--------+-~------~--------r_----_+-----------
vec /
.:....::...::./
VCC
_tVPS_
VCe+~1~---1___----~~---~~------+_---1_-------
vV
-tVCS-
VIH
---".
VIL
~
~----+-----~-+----~----~----+-------
_tOES_
_tOE _ _
VIH
~I:" ________ -
___+:!.~~________ - ____,,""1.""'--_______,/
11-12
IYIATM
MX27C2~OO/27C204B
MACRONIX, INC.
WAVEFORMS(MX27C21 00)
PROPAGATION DELAY FROM CHIP ENABLE(ADDRESS VALID)
HIGH-Z
A-I
~
HIGH-Z
~"-J~-tAA
BYTENPP
DO-D7
VALID DATA
D15-D8
VALID DATA
tBLZ
INTERACTIVE PROGRAMMING ALGORITHM WAVEFORMS
ADDRESS
INPUTS
.
PROGRAM
~
VIH
---:
VIL
- K
~
PROGRAM VERIFY _ _
C
VALID ADDRESS
_tAS_
DATA
OUT
BYTENPP
DATA IN STABLE
~
VPP
-
!!Y
l-tAH4
_tDS_
-
~
DATA OUT VALID
fL-
-tDFP.
-tDH
_tVPS_
VCC+ 1
--
~
VCC V
-tVCSVIH
VIL
-
10'
-
- - - - _[\-----..L - - - - - - _tOES_I
VIH
OE
VIL
1\
4-tOPW.,
-------------------
11-13
-
-
I-
_tOE_
/
-
- - -
.. ArM
MX27C2~OO/27C204B
MACRONIX, INC.
ORDERING INFORMATION
CERAMIC PACKAGE
PART NO.
ACCESS TIME
(ns)
OPERATING CURRENT
MAX.(mA)
STANDBY CURRENT
MAX.(I1A)
PACKAGE
MX27C2100DC·90
90
60
100
40 Pin DIP(ROM pin out)
MX27C2100DC·12
120
60
100
40 Pin DIP(ROM pin out)
MX27C2100DC·15
150
60
100
40 Pin DIP(ROM pin out)
MX27C204SDC·90
90
60
100
40 Pin DIP(JEDEC pin out)
MX27C204SDC·12
120
60
100
40 Pin DIP(JEDEC pin out)
MX27C204SDC·15
150
60
100
40 Pin DIP(JEDEC pin out)
ACCESS TIME
(ns)
OPERATING CURRENT
MAX.(mA)
STANDBY CURRENT
PACKAGE
PLASTIC PACKAGE
PART NO.
MAX.(I1 A)
MX27C2100PC·90
90
60
100
40 Pin DIP(ROM pin out)
MX27C2100PC·12'
120
60
100
40 Pin DIP(ROM pin out)
MX27C2100PC·15
150
60
100
40 Pin DIP(ROM pin out)
MX27C204SPC·90
90
60
100
40 Pin DIP(JEDEC pin out)
MX27C204SPC·12
120
60
100
40 Pin DIP(JEDEC pin out)
MX27C2048PC·15
150
60
10Q
40 Pin DIP(JEDEC pin out)
MX27C204SQC·90
90
60
100
44 Pin PLCC
MX27C240SQC·12
120
60
100
44 Pin PLCC
MX27C240SQC·15
150
60
100
44 Pin PLCC
11·14
IVIATM
MX27'C4000
MACRONIX, INC.
4M-BIT[S'12Kx B) CMOS EPROM
FEATURES
•
•
•
•
•
512K x 8 organization
Single +5V power supply
+ 12.5V programming voltage
Fast access time: 120/150 ns
Totally static operation
•
•
•
•
Completely TTL compatible
Operating current: 60mA
Standby current: 1OO~A
Package type:
- 32 pin ceramic DIP, plastic DIP
GENERAL DESCRIPTION
programming outside from the system, existing EPROM
programmers may be used. The MX27C4000 supports a
intelligent quick pulse programming algorithm which can
result in programming times of less than two minutes.
The MX27C4000 is a 5V only, 4M-bit, ultraviolet Erasable
Programmable Read Only Memory. It is organized as
512K words by 8 bits per word, operates from a single +5
volt supply, has a static standby mode, and features fast
single address location programming. All programming
signals are TTL levels, requiring a single pulse. For
This EPROM is packaged in industry standard 32 pin
dual-in-line packages.
PIN CONFIGURATIONS
BLOCK DIAGRAM
32 CDIP/PDIP
CE
vpp
vcc
A16
A18
A17
A14
A15
A12
OE
A13
A6
A5
A4
~
c'
A3
A2
A1
AO
00
01
02
GND,
A8
A9
A11
OE
AO-A18
ADDRESS
INPUTS
A10
CE
07
06
05
VCC _ _ _
~Q4
VPP--
GND_
Q3
PIN DESCRIPTION
SYMBOL
PIN NAME
AD-AlB
Address Input
00-07
Data InpuVOutput
CE
Chip Enable Input
OE
Output Enable Input
VPP
Program Supply Voltage
vce
Power Supply Pin (+5V)
GND
Ground Pin
REV. 2.0. FEB. 4,1993
PIN: PMOO159
12-1
----
IYIATM
MX27C4000
MACRONJJ(, INC.
FUNCTIONAL DESCRIPTION
completed, the entire EPROM memory is verified at VCC
= 5V± 10%.
THE ERASURE OF THE MX27C4000
FAST PROGRAMMING
The MX27C4000 is erased by exposing the chip to an
ultraviolet light source. A dosage of 15 W seconds/cm 2 is
required to completely erase a MX27C4000. This
dosage can be obtained by exposure to an ultraviolet
lamp - wavelength of 2537 Angstroms (A) - with
intensity of 12,000 IlW/cm2 for 15 to 20 minutes. The
MX27C4000 should be directly under and about one inch
from the source and all filters should be removed from the
UV light source prior to erasure.
The device is set up in the fast programming mode when
the programming volta~ VPP = 12.75V is applied, with
VCC = 6.25 V and OE = VIH (Algorithm is shown in
Figure 2). The programming is achieved by applying a
single TTL low level 100llS pulse to the CE input after
addresses and data line are stable. If the data is not
verified, an additional pulse is applied for a maximum of
25 pulses. This process is repeated while sequencing
through each address' of the device.
When the
programming mode is completed, the data in all address
is verified at VCC = VPP = 5V ± 10%,
It is important to note that the MX27C4000, and similar
devices, will be cleared for all bits of their programmed
states with light sources having wavelengths shorter than
4000 A. Although erasure times will be much longer than
that with UV sources at 2537 A, nevertheless the
exposure to fluorescent light and sunlight will eventually
erase the MX27C4000 and exposure to them should be
prevented to realize maximum system reliability. If used
in such an environment, the package window should be
covered by an opaque label or substance.
PROGRAM INHIBIT MODE
Programming of multiple MX27C4000s in parallel with
different data is also easily accomplished bYJ:!sing the
Program Inhibit Mode, Except for CE and OE, all like
inputs of the parallel MX27C4000 may be common. A
TIL low-level program pulse applied to an MX27C4000
CE input with VPP = 12.5 ± 0.5 V and CE LOW will
program that MX27C4000. A high-level CE input inhibits
the other MX27C4000s from being programmed.
THE PROGRAMMING OF THE MX27C4000
When the MX27C4000 is delivered, or it is erased, tlie
chip has all4M bits in the "ONE", or HIGH state. "ZEROs"
are loaded into the MX27C4000 through the procedure of
programming.
PROGRAM VERIFY MODE
Verification should be performed on the programmed bits
to determine that they were correctly programmed. The
verification should be performed with OE at VI Land CE,
at VIH, and VPP at its programming voltage.
The programming mode~ entered when 12.5 ± 0.5 V is
applied to the VPP pin, OE is at VIH, and CE is at VIL.
For programming, the data to be programmed is applied
with 8 bits in parallel to the data pins.
AUTO IDENTIFY MODE
The auto identify mode allows the reading out of a binary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programming equipment for the purpose of automatically
matching the device to be programmed with its
corresponding programming algorithm. This mode is
functional in the 25°C ± 5°C ambient temperature range
that is required when programming the MX27C4000.
The flowchart in Figure 1 shows MXIC's interactive
algorithm. Interactive algorithm reduces programming
time by using short programming pulses and giving each
address only as many pulses as is necessary in order to
reliably program the data. After each pulse is applied to
a given address, the data in that address is verified. If the
data is not verified, additional pulses are given until it is
verified or the maximum is reached. This process is
repeated while sequencing through each address of the
MX27C4000. This part of the algorithm is done at VCC
= 6.0V to assure that each EPROM bit is programmed to
a sufficiently high threshold voltage. After the interactive
programming is completed, an overprogram pulse is
given to each memory location; this ensures that all bits
have sufficient margin. After the final address is
To activate this mode, the programming equipment must
force 12.0 ± 0.5 V on address line Ag of the device. Two
identifier bytes may then be sequenced from the device
outputs by toggling address line AO from VIL to VIH. All
other address lines must be held at VIL during auto
identify mode.
Byte 0 (AO = VIL) represents the manufacturer code, and
12-2
IVIATM
MX27C4000
MACRONIX, INC.
byte 1 (AO = VIH), the device identifier code. For the
MX27C4000, these two identifier bytes are given in the
Mode Select Table. All identifiers for manufacturer and
device codes will possess odd parity, with the MSB (DQ7)
defined as the parity bit.
To accommodate multiple memory connections, a twoline control function is provided to allow for:
1. Low memory power dissipation,
2. Assurance that output bus contention will not occur.
READ MODE
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
The MX27C4000 has two control functions, both of which
must be logically satisfied in order to obtain data at the
outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable (OE)
is the output control and should be used to gate data to the
output pins, independent of device selection. Assuming
that addresses are stable, address access time (tACC) is
equal to the delay from CE to output (tCE). Data is
available at the outputs tOE after the falling edge of OE's,
assuming that CE has been LOW and addresses have
been stable for at least tACC - tOE.
SYSTEM CONSIDERATIONS
During the switch between active and standby conditions,
transient current peaks are produced on the rising and
falling edges of Chip Enable. The magnitude of these
transient current peaks is dependent on the output
capacitance loading of the device. At a minimum, a 0.1
!lF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
VCC and GND to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4.7!lF bulk electrolytic capacitor should be used
between VCC and GND for each eight devices. The
location of the capacitor should be close to where the
power supply is connected to the array.
STANDBY MODE
The MX27C4000 has a CMOS standby mode which
reduces the maximum VCC current to 100!lA. It is placed
in CMOS standby when CE is at VCC ± 0.3 V. The
MX27C4000 also. has a TTL-standby mode which
reduces the maximum VCC current to 1.5 mA. It is placed
in TTL-standby when CE is at VIH. When in standby
mode, the outputs~rein a high-impedance state,
independent of the OE input.
TWO-LINE OUTPUT CONTROL FUNCTION
MODE SELECT TABLE
PINS
MODE
CE
OE
AD
A9
vpp
Read
VIL
VIL
X
X
VCC
DOUT
OUlpul Disable
VIL
VIH
X
X
VCC
HighZ
Standby (TTL)
VIH
X
X
X
VCC
HighZ
Standby (CMOS)
VCC±0.3V
X
X
X
VCC
HighZ
Program
VIL
VIH
X
X
VPP
DIN
Program Verify
VIH
VIL
X
X
VPP
DOUT
Program Inhibil
VIH
X
X
X
VPP
HighZ
Manufaclurer Code
VIL
VIL
VIL
VH
VCC
C2H
Device Code
VIL
VIL
VIH
VH
VCC
40H
= 12.0 V ± 0.5 V
= Either VIH or VIL(For auto select)
=
OUTPUTS
=
3. Al - AS Al0 - A16
VIL(For auto select)
4. See DC Programming Characteristics for VPP voltage during
programming.
NOTES: 1. VH
2. X
12-3
_.ATM
MX27C4000
MACRONIX. INC.
FIGURE 1. INTERACTIVE PROGRAMMING FLOW CHART
INTERACTIVE
SECTION
x = 257
YES
FAIL
VERIFY BYTE
PASS
r----~::::::~~::~--~4-~N~O~~
INCREMENT ADDRESS
LAST ADDRESS
PASS
>4_-----<
VERIFY BYTE
7
FAIL
OVERPROGRAM
SECTION
NO
INCREMENT ADDRESS
LAST ADDRESS
7
VERIFY SECTION
FAIL
12-4
DEVICE FAILED
.".ATM
MX27C4000
MACRONIX. INC.
FIGURE 2. FAST PROGRAMMING FLOW CHART
INTERACTIVE
SECTION
FAIL
PASS
LAST ADDRESS
INCREMENT ADDRESS
FAIL
I
,>~F~A~IL~.[==~~~~~~
DEVICE FAILED
VERIFY ALL BYTES;
?
12-5
MATM
MX27C4000
MACRONIX. INC.
SWITCHING TEST CIRCUITS
1.8KQ
DEVICE
UNDER
TEST
}
DIODES: IN3064
OR EQUIVALENT
CL: 100 pF Including jig capacitance
SWITCHING TEST WAVEFORMS
2.4V
0.4V
--~X_;_2_0·0_8:_.
--~
:_.:_~<~X,--___
_ _T_E_S_T_P_O_IN_T_S__
INPUT
OUTPUT
AC TESTING: Inputs are driven at 2.4V for a logic "1" and O.4V for a logic "0".
Input pulse rise and fall times are,,; 10ns.
12-6
IYIArM
MX27C4000
MACRONIX, INC.
ABSOLUTE MAXIMUM RATINGS
NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended period may affect reliability.
NOTICE:
Specifications contained within the following tables are subject to
change.
VALUE
RATING
Ambient Operating Temperature
Storage Temperature
-65'C to 125'C
Applied Input Voltage
-O.SV to 7.0V
Applied Output Voltage
-O.SV to VCC + O.SV
VCC to Ground Potential
-O.SV to 7.0V
V9& VPP
-O.SV to 13.SV
DC CHARACTERISTICS TA = ooe to 70oe,
vee = 5V ± 10%
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
MAX.
---------VOL
UNIT
CONDITIONS
V
IOH =-O.4mA
-----
-------------~-
Output Low Voltage
0.4
V
IOL=2.1mA
VCC +O.S
V
10
IlA
-------------VIH
VIL
III
ILO
Input High Voltage
2.0
Input Low Voltage
-0.3
-----------0.8
V
-10
Input Leakage Current
--------------------Output Leakage Current
-10
----~---
VIN = 0 to S.5V
-~--------------
10
IlA
VOUT
100
IlA
VCC Standby Current
I.S
mA
CE = vcc ± 0.3V
----CE =VIH
VCC Active Current
60
mA
CE = VIL, f=5MHz, lout = OmA
100
IlA
CE = BE = VIL, VPP = S.5V
SO
mA
ICC3
VCC Power-Down Current
ICC2
ICCI
IPP
VPP Supply Current Read
IPP2
VPP Supply Current (Program)
- - - - - ------------------------------
--"--_ .. _- ----------_._----
=;
0 to S.SV
CAPACITANCE TA = 25°e, f = 1.0 MHz (Sampled only)
SYMBOL
PARAMETER
TYP.
CIN
Input Capacitance
8
COUT
Output Capacitance
CVPP
VPP Capacitance
MAX.
-------.-----.-~--.--.
8
--- ---------
AC CHARACTERISTICS TA = ooe to 70 oe,
12
.._--------_._---_. --12
- - - - - - - - - --
18
25
vee = 5V±
SYMBOL
PARAMETER
IACC
Address to Output Delay
tCE
Chip Enable to Output Delay
---------- -Output Enable to Output Delay
tOE
-------~~
CONDITIONS
pF
VIN=OV
pF
VOUT=OV
pF
VPP =OV
10%
27C4000-12
27C4000-15
MIN.
MIN.
MAX.
120
-----------~--------
------~
UNIT
MAX.
UNIT
CONDITIONS
150
ns
CE = OE =VIL
-----------~~--------------
120
ISO
ns
OE=VIL
---------~--------------------
SO
tDF
OE High to Output Float,
or CE High to Output Float
o
tOH
Q],itput Hold from Address,
CE or OE which ever occurred first
o
35
o
o
12-7
65
ns
SO
ns
ns
CE =VIL
IWIAm
MX27C4000
MACRONIX, INC.
DC PROGRAMMING CHARACTERISTICS TA =25°C ± 5°C
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
VOL
Output Low Voltage
VIH
Input High Voltage
VIL
III
MAX.
UNIT
CONDITIONS
V
IOH = ·0.40mA
0.4
V
IOL= 2.1mA
2.0
VCC+0.5
V
Input Low Voltage
-0.3
0.8
V
Input Leakage Current
-10
10
~A
VH
A9 Auto Select Voltage
11.5
12.5
V
ICC3
VCC Supply Current (Program & Verity)
50
mA
IPP2
VPP Supply Current(Program)
30
mA
VCC1
Interactive Supply Voltage
5.75
6.25
V
VPP1
Interactive Programming Voltage
12.0
13.0
V
VCC2
Fast Programming Supply Voltage
6.00
6.50
V
VPP2
Fast Programming Voltage
12.5
13.0
V
MAX.
UNIT
VIN = 0 to 5.5V
CE = VIL, OE = VIH
AC PROGRAMMING CHARACTERISTICS TA = 25°C ± 5°C
SYMBOL
PARAMETER
MIN.
tAS
Address Setup Time
2.0
~S
tOES
5E Setup Time
2.0
~S
tDS
Data Setup Time
2.0
~S
tAH
Address Hold Time
0
~S
tDH
Data Hold Time
2.0
tDFP
CE to Output Float Delay
0
tVPS
VPP Setup Time
tPW
CE Program Pulse Width
~S
130
nS
~S
2.0
Fast
95
105
~S
Interactive
0.95
1.05
mS
2.05
mS
tOPW
CE Overprogram Pulse(lnteractive)
1.95
tVCS
VCC Setup Time
2.0
tDV
Data Valid from CE
tCES
CE Setup Time
tOE
Data valid from OE
~S
250
~S
2.0
150
12-8
nS
n5
CONDITIONS
. . ArM
MX27C4000
MACRONIX, INC.
WAVEFORMS
READ CYCLE
j~
ADDRESS
INPUTS
~
VALID ADDRESS
v-CC-
CE
V
'"
OE
<
:!!
01S/A-l
00-014
A12
A13
, A14
A15
I
A16
31 1 BYTENPP
30 " GND
, 015/A-l
'107
014
,06
013
24
05
23 J 012
22 .] 04
21 Jvee
AO-A17
ADDRESS
INPUTS
ve~
GND-----.
PIN: PM0160
REV. 2,0, FEB. 4, 1993
13-1
IYIATM
MX27C4~OO/27C4096
MACRONIX. INC.
PIN CONFIGURATIONS
PIN CONFIGURATIONS
PLCC(MX27C4096)
CDIP/PDIP(MX27C4096)
vpp
CE
144
o
012
011
010
09
08
GND
~
015
014
013
A13
A12
All
Al0
MX27C4096
A9
34
NC
07
06
05
GND
NC
A8
A5
A6
29
03
02
01
A5
QO
OE
BLOCK DIAGRAM (MX27C4096)
~
CE
OE
AO-A17
~
00-015
:
ADDRESSl
:
INPUTS
--
VCC
A17
A18
A15
A14
·A13
A12
All
Al0
A9
GND
A8
A7
AS
A7
Q4
3
4MBIT
CELL
MATRIX
vpp_ _
13-2
A4
A3
A2
Al
. . ATM
MX27C4~OO/27C40ge
MACRONIX, INC.
PIN DESCRIPTION(MX27C41 00)
PIN DESCRIPTION(MX27C4096)
SYMBOL
PIN NAME
SYMBOL
PIN NAME
AD-A17
Address Input
AO-A17
Address Input
00-014
Data Input/Output
00-015
Data Input/Output
CE
Chip Enable Input
CE
Chip Enable Input
OE
Output Enable Input
OE
Output Enable Input
BYTENPP
Word/Byte Selection
/Program Supply Voltage
VPP
Program Supply Voltage
VCC
Power Supply Pin (+5V)
015/A-l
015(Word mode)/LSB addr. (Byte mode)
GND
Ground Pin
VCC
Power Supply Pin (+5V)
GND
Ground Pin
TRUTH TABLE OF BYTE FUNCTION(MX27C4100)
BYTE MODE(BYTE
= GND)
CE
OE/OE
015JA-l
MODE
00-07
SUPPLY CURRENT
H
x
Non selected
HighZ
Standby(ICC2)
L
UH
x
x
Non selected
HighZ
Operating(ICCl )
L
H/L
A-l input
Selected
DOUT
Operating(ICCl )
015/A-1
MODE
00-014
SUPPLY CURRENT
Standby(ICC2)
NOTE
WORD MODE(BVTE = VCC)
CE
OE/OE
H
X
HighZ
Non selected
HighZ
L
UH
HighZ
Non selected
HighZ
Operating(ICCl )
L
H/L
DOUT
Selected
DOUT
Operating(ICCl )
NOTE1: X = H or L
13-3
NOTE
IYIATM
MACRONllC, INC.
MX27C4~OO/27C409S
FUNCTIONAL DESCRIPTION
MX27C41 00/4096. This part of the algorithm is done at
VCC = 6.0V to assure that each EPROM bit is
programmed to a sufficiently high threshold voltage.
After the interactive programming is completed, an
overprogram pulse is given to each memory location; this
ensures that all bits have sufficient margin. After the final
address is completed, the entire EPROM memory is
verified at VCC = 5V ± 10%.
THE ERASURE OF THE MX27C41 00/4096
The MX27C41 00/4096 is erased by exposing the chip to
an ultraviolet light source. A dosage of 15 W seconds/cm2
is required to completely erase a MX27C41 00/4096. This
dosage can be obtained by exposure to an ultraviolet
lamp - wavelength of 2537 Angstroms (A) .,- with
intensity of 12,000 IlW/cm2 for 15 to 20 minutes. The
MX27C41 00/4096 should be directly under and about
one inch from the source and all filters should be removed
from the UVlight source prior to erasure.
FAST PROGRAMMING
The device is set up in the fast programming mode when
the programming voltage VPP = 12.75V is applied, with
VCC = 6.25 V and OE = VIH (Algorithm is shown in Figure
2). The programming is achieved by applying a single
TTL low level 1OOlls pulse to the CE input after addresses
and data line are stable. If the data is not verified, an
additional pulse is applied for a maximum of 25 pulses.
This process is repeated while sequencing through each
address of the device. When the programming mode is
completed, the data in all address is verified at VCC =
VPP = 5V ± 10%.
It is important to note that the MX27C41 00/4096, and
similar devices, will be cleared for all bits of their
programmed states with light sources having
wavelengths shorter than 4000 A. Although erasure
times will be much longer than that with UV sources at
2537 A, nevertheless the exposure to fluorescent light
and sunlight will eventually erase the MX27C41 00/4096
and exposure to them should be prevented to realize
maximum system reliability.
If used in such an
environment, the package window should be covered by
an opaque label or substance.
PROGRAM INHIBIT MODE
Programming of multiple MX27C4100/4096's in parallel
with different data is also easily acco'!!!plishe9...Qy using
the Program Inhibit Mode. Except for CE and OE, all like
inputs of the parallel MX27C41 00/4096 may be common.
A TTL low-Ievel-program pulse applied to an
MX27C41 00/4996 CE input with VPP = 12.5 ± 0.5 V will
program the MX27C41 00/4096. A high-level CE input
inhibits the other MX27C4100/4096s from being
programmed.
THE PROGRAMMING OF THE MX27C4100/4096
When the MX27C41 00/4096 is delivered, or it is erased,
the chip has all 4M bits in the "ONE", or HIGH state.
"ZEROs" are loaded into the MX27C41 00/4096 through
the procedure of programming.
The programming mode~ entered when ~5 ± 5V is
applied to the VPP pin, OE is at VIH and CE is at VIL
(MX27C4096) and programming mode entered when
12.5 ± 5V is applied to the BYTENPP pin, OE at VIH and
CE at VIL (MX27C41 00).
PROGRAM VERIFY MODE
Verification should be performed on the programmed bits
to determine that they were correctly ~grammed. The
verification should be performed with OE and CE, at VIL,
and VPP at its programming voltage.
For programming, the data to be programmed is applied
with 16 bits in parallel to the data pins.
The flowchart in Figure 1 shows MXIC's interactive
algorithm. Interactive algorithm reduces programming
time by using short programming pulses and giving each
address only as many pulses as is necessary in order to
reliably program the data. After each pulse is applied to
a given address, the data in that address is verified. If the
data is not verified, additional pulses are given until it is
verified or the maximum is reached. This process is
repeated while sequencing through each address of the
AUTO IDENTIFY MODE
The auto identify mode allows the reading out of a binary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programming equipment for the purpose of automatically
matching the device to be programmed with its
13-4
IYIAm
MACRONIl(, INC.
MX27C4~OO/27C4096
corresponding programming algorithm. This mode is
functional in the 25°C ± 5°C ambient temperature range
that is required when programming the MX27C41 (JOI
4096.
To activate this mode, the programming equipment must
force 12.0 ± 0.5 V on address line A9 of the device. Two
identifier bytes may then be sequenced from the device
outputs by toggling address line AO from VIL to VIH. All
other address lines must be held at VIL during auto
identify mode.
Byte 0 (AO =VIL) represents the manufacturer code, and
byte 1 (AD = VIH), the device identifier code. For the
MX27C41 00/4096, these two identifier bytes are given in
the Mode Select Table. All identifiers for manufacturer
and device codes will possess odd parity, with the MSB
(DQ15) defined as the parity bit.
READ MODE
STANDBY MODE
The MX27C41 00/4096 has a CMOS standby mode which
reduces the maximum VCC current to 1OO~.A. It is placed
in CMOS standby when CE is at VCC ± 0.3 V. The
MX27C41 00/4096 also has a TTL-standby mode which
reduces the maximum VCC current to 1.5 mA. It is placed
in TTL-standby when CE is at VIH. When in standby
mode, the outputs~re in a high-impedance state,
independent of the OE input.
TWO-LINE OUTPUT CONTROL FUNCTION
To accommodate multiple memory connections, a twoline control function is provided to allow for:
1. Low memory power dissipation,
2. Assurance that output bus contention will not occur.
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made'a
common connection to all devices in the array and
connected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
The MX27C41 00/4096 has two control functions, both of
which must be logically satisfied in order to obtain data at
the outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable (OE)
is the output control and should be used to gate data to the
output pins, independent of device selection. Assuming
that addresses are stable, address access time (tACC) is
equal to the delay from CE to output (tCE). Data is
available at the outputs tOE after the falling edge of OE's,.
assuming that CE has been LOW and addresses have
been stable for at least tACC - t OE.
SYSTEM CONSIDERATIONS
During the switch between active and standby conditions,
transient current peaks are produced on the rising and
falling edges of Chip Enable. The magnitude of these
transient current peaks is dependent on the output
capacitance loading of the device. At a minimum, a 0.1
f.lF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between Vcc
and GND to minimize transient effects. In addition, to
overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4.7 f.lF bulk electrolytic capacitor should be used
between VCC and GND for each eight devices. The
location of the capacitor should be close to where the
power supply is connected to the array.
WORD-WIDE MODE
With BYTENPP at VCC ±0.2V outputs QO-7 present data
00-7 and outputsQ8-15 present data 08-15, afterCE and
OE are appropriately enabled.
BYTE-WIDE MODE
With BYTENPP at GND ± 0.2V, outputs Q8-15 are tristated. If Q15/A-1 = VIH, outputs QO-7 present data bits
08-15. If Q15/A-1 VIL, outputs QO-7 present data bits
00-7.
=
13-5
IwlATM
MX27C4~OO/27C4096
MACRONIX; INC.
MODE SELECT TABLE (MX27C4096)
PINS
MODE
CE
OE
AO
A9
VPP
OUTPUTS
Read
VIL
VIL
X
X
VCC
DOUT
Output Disable
VIL
VIH
X
X
vec
HighZ
Standby (TTL)
VIH
X
X
X
VCC
HighZ
Standby (CMOS)
VCCiO.3V
X
X
X
VCC
HighZ
Program
VIL
VIH
X
X.
VPP
DIN
Program Verify
VIH
VIL
X
X
VPP
DOUT
Program Inhibit
VIH
X
X
X
VPP
HighZ
Manufacturer Code
VIL
VIL
VIL
VH
VCC
00C2H
Device Code
VIL
VIL
VIH
VH
VCC
0151H
3. A1-A8 =A10-A16 = VIL(Forautoselect)
4. See DC Programming Characteristics for VPP voHage during
programming.
.
NOTES: 1. VH = 12.0 V ± 0.5 V
2. X = Either VIH or VIL(For auto select)
MODE SELECT TABLE (MX27C41 00)
BYTE!
CE
OE
A9
AO
Q151A-1
VPP(4)
Q8-14
Read (Word)
VIL
VIL
X
X
D150ut
VCC
DS-14 Out
00-7 Out
Read (Upper Byte)
VIL
VIL
X
X
VIH
GNO
HighZ
OS-15 Out
MODE
NOTES
QO-7
Read (Lower Byte)
VIL
VIL
X
X
VIL
GNO
HighZ
00-7 Out
Output Disable
VIL
VIH
X
X
HighZ
X
HighZ
HighZ
Standby
VIH
X
X
X
HighZ
X
HighZ
HighZ
Program
VIL
VIH
X
X
D151n
VPP
OS-14In
00-7 In
Program Verify
VIH
VIL
X
X
D150ut
VPP
OS-14 Out
DO-70ut
Program Inhibit
VIH
VIH
X
X
HighZ
VPP
HighZ
HighZ
VIL
VIL
VH
VIL
OB
VCC
OOH
C2H
VIL
VIL
VH
VIH
OB
VCC
9SH
BSOOH
Manufacturer Code
Device Code
2
2,3
3. Al - AS, Al0 - A15 = VIL, A9 = VH = 12.0V ± 0.5V
4. BYTENPP is intended for operation under DC Voltage conditions
only.
NOTES: 1. X can be VIL or VIH.
2. See DC Programming Characteristics for VPP voltages.
13-6
-----
IYIATM
MX27C4100/27C4096
MACRONIlC, INC.
FIGURE 1. INTERACTIVE PROGRAMMING FLOW CHART
INTERACTIVE
SECTION
VERIFY BYTE
INCREMENT ADDRESS
?
FAIL
OVERPROGRAM
SECTION
NO
INCREMENT ADDRESS
LAST ADDRESS
VERIFY SECTION
1
VERIFY ALL
L._
13-7
BYTES>-,-F:::AI",L_-L_D~E~V~IC~E~~FA~I~LE:!D~J
•• ATM
MX27C4~OO/27C409S
MACRONIX, INC.
FIGURE 2. FAST PROGRAMMING FLOW CHART
INTERACTIVE
SECTION
YES
X =25?
FAIL
VERIFY BYTE
PASS
NO
INCREMENT ADDRESS
1-----<::.
LAST ADDRESS
FAIL
I
DEVICE FAILED
13-8
MX27C4~OO/27C409a
SWITCHING TEST CIRCUITS
DEVICE
UNDER
1.BKQ
I------.---.----j~
f---.-----'V'J'v----Q +5V
TEST
=r
CL
6.2KQ
1
CL
}
DIODES = IN3064
OR EQUIVALENT
=100 pF Including jig capacitance
SWITCHING TEST WAVEFORMS
2'4V--~X
_
_ _ ,2.0V
_ _ _ _ JiO.BV
0.4V _ _~
>EST""""
:::<
::;
DEiOE
Al0
J
21
CEiCE
07
20
Q6
19 .J 05
18 ::J 04
17 --; 03
'-----------'
PIN FUNCTIONS
32 SOP
vcc
N.C.
A16
A15
A12
A7
A6
A5
N.C.
N.C.
A14
A13
A8
A9
A11
DE/DE
A10
CE/CE
07
06
05
A4
A3
A2
A1
AO
00
01
02
vss
SYMBOL
PIN NAME
AO-A16
Address Input
00-07
Data Output
CE/CE
Chip E.nable Input
OEiOE
Output Enable Input
VCC
Power Supply Pin(+5V)
VSS
Ground Pin
Q4
c
03
REV. 3.0, NOV. 26, 1992
PIN: PM0131
14-1
----
. . ATM
MX23C., 000/MX23C., 0.,0
MACRONIX. INC.
BLOCK DIAGRAM
J-ao-a7
rU- :_-
V·DECODER
AO-A16
-1----1
ADDRESS
.'"ffi
~
,.~
VCC_
VSS-_
ABSOLUTE MAXIMUM RATINGS*
RATING
"NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability.
VALUE
Ambient Operating T_e~m-,-p_er_a_tu_re_ _ _0_'C_tO_7_0_'C
_ _ _ __
Storage Temperature
-65'C to 125'C
Applied Input Voltage
-0.5V to VCC + 0.5V
Applied Output Voltage
-0.5V to VCC + 0.5V
VCC to Ground Potential
-0.5V to 7.0V
Power Dissipation
0.5W
DC CHARACTERISTICS T A = ooe TO 70 oe, vee = 5V ± 10%
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
VOL
Output Low Voltage
VIH
Input High Voltage
2.2
VIL
Input Low Voltage
-0.3
MAX.
UNIT
CONDITIONS
V
IOH =-1.0mA
0.4
V
IOL= 2.1mA
VCC +0.3
V
0.8
V
III
Input Leakage Current
10
IlA
VIN = 0 to 5.5V
ILO
Output Leakage Current
10
I!A
VOUT = 0 to 5.5V
ICC3
Power-Down Supply Current
100
IlA
CE > VCC - 0.2V
ICC2
Standby Supply Current
mA
CE=VIH
ICCI
Operating Supply Current
40
mA
Note 1
MAX.
UNIT
CONTITIONS
pF
VIN=OV
pF
VOUT=OV
CAPACITANCE TA= 25°e, f = 1.0 MHz (Note 2)
SYMBOL
PARAMETER
MIN.
CIN
Input Capacitance
10
COUT
Output Capacitance
10
14-2
-
----
. . ATM
MX23C1 OOO/MX23C101 0
MACRONIX. INC.
AC CHARACTERISTICS TA
=ooe to 70oe, vee =5V ± 10%
23C1 00011 01 0-15
SYMBOL
PARAMETER
MIN.
tCYC
Cycle Time
150
tAA
Address Access Time
MAX.
23C1 000/1 01 0-20
MIN.
MAX.
150
200
tOH
Output Hold Time Alter Address Change
Chip Enable Access Time
150
10
200
ns
tAOE
Output Enable/Chip Select Access Time
80
100
ns
tLZ
Output Low Z Delay
ns
tHZ
Output High Z Delay
0
0
70
=
5 MHz and output unloaded.
2. This parameter is periodically sampled and is not 100% tested.
3. Output low-impedance delay (tLl) is measured Irom CE going
low.
CONDITIONS
ns
tACE
NOTE:
1. Measured with device selected at I
10
UNIT
ns
200
70
ns
Note 3
ns
Note 4
4. Output high-impedance delay (tHZ) is measured Irom
high.
AC TEST CONDITIONS
Input Pulse Levels
OAV to 2AV
Input Rise and Fall Times
IOns
Input Timing Level
1.5V
Output Timing Level
0.8V and 2.0V
Output Load
FIGURE 1. OUTPUT LOAD CIRCUIT
+5V
DOUT
See Figure 1
~
i12500
-------.----1
7750
• Including scope and jig.
14-3
100 pF'
CE
going
----
IVIATM
MX23C~OOO/MX23C~O~O
MACRONIX. INC.
WAVEFORMS
PROPAGATION DELAY FROM ADDRESS (CEIOE
=ACTIVE)
ADDRESS
INPUTS
DATA OUT
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
lACE
CE
~
7~
~
I.
IAOE
~
OE
/
1HZ
ILZ
<[~~
DATA OUT
ORDERING INFORMATION
PART NO.
ACCESS TIME(ns)
OPERATING CUF'lENT MAX.(mA)
STANDBY CURRENT MAX.{!J.A)
PACKAGE
MX23Cl000PC·15
150
40
100
28 Pin DIP
MX23Cl0l0PC·15
150
40
100
32 Pin DIP
MX23Cl000MC·15
150
40
100
28 Pin SOP
MX23Cl0l0MC·15
150
40
100
32 Pin SOP
MX23Cl000PC·20
200
40
100
28 Pin DIP
MX23Cl 01 OPC·20
200
40
100
MX23Cl000MC·20
200
40
100
28 Pin SOP
MX23Cl 01 OMC·20
200
40
100
32 Pin SOP
14·4
.-------32 Pin DIP
IYIArM
MX23C2000
MACRONIX, INC.
2M-BIT(25BK
X
SJ CMOS MASK ROM
FEATURES
•
•
•
•
•
• Operating current: 40mA
• Standby current: 100~ A
• Package type:
- 32 pin plastic DIP
- 32 pin plastic SOP
256K x 8 organization
Single +5V power supply
Fast access time: 150/200ns (max)
Totally static operation
Completely TTL compatible
GENERAL DESCRIPTION
The MX23C2000 is a 5V only, 2M-bit, Read Only Memory. It is organized as 256K words by 8 bit, operates from
a single +5 volt supply, has a static standby mode, and
has an access time of 150/200ns. It is designed to be
compatible with all microprocessors and similar applications in which high performance, large bit storage and
simple interfacing are important design considerations.
The MX23C2000 offers automatic power-down, with
power-down controlled by the chip enable(CE) Input.
When CE goes high, the device automatically powers
down and remains in a low-power standby mode as long
as CE remains high.
PIN CONFIGURATIONS
32 PDIP
BLOCK DIAGRAM
MX23C2000 pin 24 may also be programmed either
active HIGH or LOW in order to eliminate bus contention
in multiple-bus microprocessor systems.
CEiCE
NC ["
1
A16 [- 2
A15 _ 3
A7
A6
AS
A4
A3 [
0
0
0
N
..,
0
N
10
11
01
02
VSS
r:
l
14
15
16
X
:E
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
J VCC
NC
OEiOE
AI3
A8
A9
All
----
~00-07
~
AO-A17
ADDRESS
INPUTS
OE/OE
Al0
CEiCE
07
06
05
04
03
-
VCC_
VSS_
32 SOP
NC
A16
A15
A12
A7
A6
A5
VCC
NC
PIN DESCRIPTION:
A17
A14
A13
SYMBOL
AO-A1~7______~A~d~dr~e~ss~l~np~u~t___________________
A4
AS
A2
Al
AO
00
01
02
VSS
PIN NAME
07
Q6
05
00-07
Data Output
CE/CE
Chip Enable Input
OEIOE
Output Enable Input
VCC
Power Supply Pin (+5V)
VSS
Ground Pin
REV. 3.0, NOV. 26, 1992
PIN: PM0133
15-1
----
. . ATM
MX23C2000
MACRONIlC, INC.
ABSOLUTE MAXIMUM RATINGS·
RATING
VALUE
Ambient Operating Temperature
O'Cto 70'C
Storage Temperature
-65'C to 125'C
Applied Input Voltage
-0.5V to VCC + 0.5V
Applied Output Voltage
-0.5V to VCC + 0.5V
VCC to Ground Potential
-0.5V to 7.0V
Power Dissipation
1.0W
"NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating cond~ions lor extended period may affect reliability.
DC CHARACTERISTICS TA = ooe TO 70oe, vee = 5V ± 10%
SYMBOL
PARAMETER
VOH
Output High
VOL
Output Low Voltage
VIH
Input High Voltage
VIL
Input Low
Vo~age
Vo~age
MIN.
MAX.
UNIT
CONDITIONS
V
IOH=-1.0mA
0.4
V
IOL=2.1mA
2.2
VCC + 0.3
V
-0.3
0.8
V
2.4
III
Input Leakage Current
10
!LA
VIN = 0 to 5.5V
ILO
Output Leakage Current
10
!LA
VOUT = 0 to 5.5V
ICC3
Power~Down Supply Current
100
!LA
CE > VCC - 0.2V
ICC2
Standby Supply Current
1.0
rnA
CE=VIH
ICe1
Operating Supply Current
40
rnA
Note 1
CAPACITANCE TA = 25°e, f = 1.0 MHz (Note 2)
SYMBOL
PARAMETER
MAX.
UNIT
CONDITIONS
CIN
Input Capacitance
MIN.
10
pF
VIN=OV
COUT
Output Capacitance
10
pF
VOUT=OV
AC CHARACTERISTICS TA = ooe to 70oe, vee = 5V ± 10%
23C2000-15
SYMBOL
PARAMETER
MIN.
tCYC
Cycle Time
150
MAX.
23C2000-20
MIN.
MAX.
UNIT
tAA
Address Access Time
tOH
Output Hold Time After Address Change
tACE
Chip Enable Access Time
150
200
ns
tAOE
Output Enable/Chip Select Access Time
80
100
ns
tLZ
Output Low Z Delay
tHZ
Output High Z Delay
150
10
ns
ns
0
70
NOTE:
1. Measured with device selected at I = 5 MHz and output unloaded.
2. This parameter is periodically sampled and is not 100% tested.
3. Output low-impedance delay (tLZ) is measured from BE going
low.
200
10
0
CONDITIONS
ns
200
70
ns
Note 3
ns
Note 4
4. Output high-impedance delay (tHZ) is measured Irom
high.
15-2
BE
going
lYI.ArM
MX23C2000
MACRON/X. INC.
AC TEST CONDITIONS
FIG 1. OUTPUT LOAD CIRCUIT
Input Pulse Levels
O.4V to 2.4V
Input Rise and Fall Times
10ns
Input Timing Level
1.5V
Output Timing Level
O.BV and 2.0V
Output Load
See Figure 1
+5V
DOUT
l00pP
775Q
• Including scope and jig.
WAVEFORMS
PROPAGATION DELAY FROM ADDRESS (CE/OE
= ACTIVE)
ADDRESS
INPUTS
DATA OUT
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
lACE
CE
~
"7 iL-
~
l.
IAOE
~
OE
/V
tHZ
tLZ
/
DATA OUT
"-
-'l
E
ORDERING INFORMATION
PART NO.
ACCESS TIME(ns)
OPERATING CURRENT MAX.(mA)
STANDBY CURRENT MAX.(!1A)
PACKAGE
MX23C2000PC-15
150
40
100
32 Pin DIP
MX23C2000MC-15
150
40
100
32 Pin SOP
MX23C2000PC-20
200
40
100
32 Pin DIP
MX23C2000MC-20
200
40
100
32 Pin SOP
15-3
IYIATM
MX23C2.,OO
MACRONlX, INC.
2M-B1T(25BK x S/'12SK x ... BJ
CMOS MASK ROM
FEATURES
•
•
•
•
• Switchable organization
- 256K x 8(byte mode)
- 128K x 16(word mode)
• Single +5V power supply
• Fast access time: 150/200ns
• Totally static operation
Completely TTL compatible
Operating current: 60mA
Standby current: 10011 A
Package
- 40 pin DIP(600 mil)
GENERAL DESCRIPTION
MX23C2100 offers automatic power-down, with powerdown controlled by the chip enable(CE/CE) Input. When
CE/CE is not selected, the device automatically powers
down and remains in a low-power standby mode as long
as CE/CE stays in the unselected mode.
The MX23C21 00 is a 5V only, 2M-bit, Read Only Memory. It is organized as 256Kx 8 bits (byte mode) or as
128Kx16 bit (word mode) depending on BYTE (pin 31)
voltage level. MX23C2100 has a static standby mode,
and has an access time of 150/200ns. It is designed to be
compatible with all microprocessors and similar applications in which high performance, large bit storage and
simple interfacing are important design considerations.
The OE/OE inputs as well as CE/CE input may be programmed either active High or Low.
PIN CONFIGURATIONS
BLOCK DIAGRAM
NC [
A7 -
A6,
AS [
A4 "
A3
A2
A1
'CEICE
VSS
OEiOE
00
010
03
011
1
40
AS
A9
'I A10
-_
-_
BYTE
A13
A14
A15
A16
BYTE
; } - 00-014
-
------L--t-_...J
015/A-1
A11
'J A12
]
CEICE
OEiOE
AO-A16
ADDRESS
INPUTS
VSS
0151A-1
07
014
06
-
J 013
I 05
012
VCC _ _
VSS-
04
VCC
PIN DESCRIPTION:
SYMBOL
PIN NAME
AO-A16
Address Input
00-014
Data Output
CE/CE
Chip Enable Input
OE/OE
Output Enable Input
015/A-1
015(Word mode)/LSB addr. (Byte mode)
vee
Power Supply Pin (+5V)
VSS
Ground Pin
Word/Byte Selection
-------
REV. 2.0, NOV. 26,1992
PIN: PM0134
16-1
IYIATM
MX23C2'100
MACRONIX, INC.
TRUTH TABLE OF BYTE FUNCTION
BYTE MOOE(BYTE
=VSS)
CE
OEIOE
Dl51A-1
MODE
00-07
SUPPLY CURRENT
H
X
X
Non selected
HighZ
Standby(ICC2)
L
UH
X
Non selected
HighZ
Operating(ICCl )
L
H/L
A-l input
Selected
DOUT
Operating(ICCl )
NOTE
WORD MODE(BYTE = VCC)
CE
OEIOE
Dl51A-1
MODE
00-014
SUPPLY CURRENT
H
X
HighZ
Non selected
HighZ
Standby(ICC2)
L
UH
HighZ
Non selected
HighZ
Operating(ICCl )
L
H/L
DOUT
Selected
DOUT
Operating(ICCl )
NOTE
NOTE1: X = H or L
ABSOLUTE MAXIMUM RATINGS*
RATING
"NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended period may affect reliability .
VALUE
Ambient Operating Temperature
Storage Temperature
-65'C to 125°C
Applied Input Voltage
-0.5V to 7.0V
. Applied Output Voltage
-0.5V to 7.0V
VCC to Ground Potential
·0.5V to 7.0V
Power Dissipation
1.0W
DC CHARACTERISTICS TA = ooe TO 70oe,
vee = 5V ±
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
VOL
Output Low Voltage
VIH
Input High Voltage
VIL
Input Low Voltage
10%
UNIT
CONDITIONS
V
IOH =-1.0mA
0.4
V
IOL=2.1mA
2.2
VCC+0.3
V
-0.3
0.8
V
MAX.
III
Input Leakage Current
10
IlA
VIN = 0 to 5.5V
ILO
Output Leakage Current
10
IlA
VOUT = 0 to 5.5V
ICC3
Power-Down Supply Current
100
ICC2
Standby Supply Current
1.0
IlA
mA
CE=VIH
ICCl
Operating Supply Current
60
mA
Note 1
CE > VCC - 0.2V
CAPACITANCE TA = 25°C, f = 1.0 MHz (Note 2)
SYMBOL
PARAMETER
MAX.
UNIT
CONDITIONS
CIN
Input Capacitance
MIN.
10
pF
VIN =OV
COUT
Output Capacitance
10
pF
VOUT=OV
16-2
----
IYIATM
MX23C2100
MACRONIX, INC.
AC CHARACTERISTICS: TA = ooe to 70oe,
vee = 5V ± 10%
23C21 00-15
SYMBOL
PARAMETER
MIN.
tCYC
Cycle Time
150
tAA
Address Access Time
tOH
Output Hold Time After
Address Change
23C21 00-20
MAX.
MIN.
MAX.
200
150
10
UNIT
10
ns
ns
lACE
Chip Enable Access Time
150
200
ns
tAOE
Output Enable/Chip Select
Access Time
BO
90
ns
a
CONDITIONS
ns
200
a
tLZ
Output Low Z Delay
ns
Note 3
tHZ
Output High Z Delay
70
70
ns
Note 4
tBHA
BYTE Access Time
150
200
ns
tOHB
BYTE Output Hold Time
tBHZ
BYTE Output Delay Time
tBLZ
BYTE Output Set Time
a
a
ns
70
70
10
10
ns
ns
NOTE:
1. Measured with device selected at f 5 MHz and output unloaded.
2. Tnis parameter is periodically sampled and is not 100% tested.
3. Output low-impedance delay (tLZ) is measured from CE going low.
4. Output high-impedance delay (tHZ) is measured from CE going high.
=
FIG. 1 OUTPUT LOAD CIRCUIT
AC TEST CONDITIONS
Input Pulse Levels
O.4V to 2.4V
Input Rise and Fall Times
10ns
Input Timing Level
1.5V
Output Timing Level
O.BV and 2.0V
+5V
12500
DOUT
Output Load
See Figure 1
7750
- Including scope and jig.
16-3
100 pF-
IYIATM
MX23C2'100
MACRONIX, INC.
WAVEFORMS
PROPAGATION DELAY FROM ADDRESS (CEIOE
= ACTIVE)
ADDRESS
INPUTS
DATA OUT
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
~------~--~CE ----------~
CE
1+------
~OE
--c--.-j
~--IHZ
/ 4 - - - - - - tl2 - - - - - -
DATA OUT
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
A-l
--~H~IG~H~-Z~~~
HIGH-Z
__tAA_·_ _ _ _ _ _ _ __
BYTE
Do-D7
Dl5-D8
IBl2
ORDERING INFORMATION
PART NO.
ACCESS TIME(ns)
OPERATING CURRENT MAX.(mA)
STANDBY CURRENT MAX.(IlA)
PACKAGE
MX23C2100PC-15
150
60
100
40 Pin DIP
MX23C2100PC-20
200
60
100
40 Pin DIP
16-4
IVIATM
MX23C4000
MACRONIX. INC.
4M-BIT(S'1 2K x B) CMOS MASK ROM
FEATURES
•
•
•
•
•
• Operating current: 40mA
• Standby current: 10011 A
• Package type:
32 pin plastic DIP
- 32 pin plastic SOP
512K x 8 organization
Single +5V power supply
Fast access time: 120/150/200ns (max)
Totally static operation
Completely TTL compatible
GENERAL DESCRIPTION
The MX23C4000 is a 5V only, 4M-bit, Read Only Memory. It is organized as 512K words by 8 bit, operates from
a single +5 volt supply, has a static standby mode, and
has an access time of 120/150/200ns. It is designed to be
compatible with all microprocessors and similar applications in which high performance, large bit storage and
simple interfacing are important design considerations.
The MX23C4000 offers automatic power-down, with
power-down controlled by the chip enable(CE) Input.
When CE goes high, the device automatically powers
down and remains in a low-power standby mode as long
as CE remains high.
PIN CONFIGURATIONS
BLOCK DIAGRAM
MX23C4000 pin 24 may also be programmed either
active HIGH or LOW in order to eliminate bus contention
in multiple-bus microprocessor systems.
32 POOP
I
NC
A16
OEiOE
A15
J A17
A12
_ A14
A7
A13
A6
AB
A5
A9
A4
Al1
A3
OEiOE
A2
AO-A1B
ADDRESS
INPUTS
J A10
AO
CE/CE
07
00 l
06
01
05
A1
-
CEiCE
vcc
I
02
Q4
VSS
03
; : } 00-07
----1-----1
-----+
----
VCC ____
VSS ____
PIN DESCRIPTION:
32 PSOP
NC
A16
A15
A12
A7
A6
A4
A3
A2
A1
AO
vcc
AlB
A17
A14
A13
A9
A11
OEiOE
A10
..., CEICE
_ 07
co
Q6
01
02
VSS
05
04
03
SYMBOL
PIN NAME
AD-AlB
Address Input
00-07
Data Output
CEiCE
Chip Enable Input
OE/OE
Output Enable Input
VCC
Power Suppiy Pin (+5V)
VSS
Ground Pin
REV. 3.0. NOV. 26.1992
PIN: PM0135
17-1
. . ATM
MX23C4000
MACRONIX. INC.
ABSOLUTE MAXIMUM RATINGS·
RATING
VALUE
Ambient Operating Temperature
O'Cto 70'C
Storage Temperature
-65'C to 125'C
Applied Input Voltage
-0.5V to VCC + 0.5
Applied Output Voltage
-0.5V to VCC+ 0.5
VCC to Ground Potential
-0.5V to 7.0V
Power Dissipation
1.0W
DC CHARACTERISTICS TA
SYMBOL
-NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability.
= ooe TO 70oe, vee = 5V ± 10%
PARAMETER
MIN.
2.4
MAX.
UNIT
CONDITIONS
V
IOH=-1.0mA
0.4
V
IOL = 2.1mA
VOH
Output High Voltage
VOL
Output Low Voltage
VIH
Input High Voltage
2.2
VCC+0.3
V
VIL
Input Low Voltage
-0.3
0.8
V
III
Input Leakage Current
10
~A
VIN = 0 to 5.5V
ILO
Output Leakage Current
10
~A
VOUT = 0 to 5.5V
ICC3
Power-Down Supply Current
100
ICC2
Standby Supply Current
1.0
~
mA
CE=VIH
ICC1
Operating Supply Current
40
mA
Note 1
CAPACITANCE TA
CE > VCC - 0.2V
= 25°e, f = 1.0 MHz (Note 2)
SYMBOL
PARAMETER
MAX.
UNIT
CONDITIONS
CIN
Input Capacitance
MIN.
10
pF
VIN =OV
COUT
Output Capacitance
10
pF
VOUT=OV
AC CHARACTERISTICS TA = ooe to 70oe, vee = 5V ± 10%
23C4000-12
SYMBOL
PARAMETER
MIN.
tCYC
Cycle Time
120
tAA
Address Access Time
tOH
Output Hold Time After Address Change
tACE
Chip Enable Access Time
tAOE
Output Enable/Chip Select Access Time
tLZ
Output Low Z Delay
tHZ
Output High Z Delay
MAX.
23C4000-15
23C4000-20
MIN.
MIN.
MAX.
150
120
10
150
10
0
70
NOTE:
1. Measured with device selected at f = 5 MHz and output unloaded.
2. This parameter is periodically sampled and is not 100% tested.
3. Output low-impedance delay (tLZ) is measured from CE going
low.
200
80
80
0
CONDITIONS
ns
ns
200
ns
100
ns
0
70
UNIT
ns
10
150
120
MAX.
200
70
ns
Note 3
ns
Note 4
4. Output high-impedance delay (tHZ) is measured from
high.
17-2
CE
going
IYIATM
MX23C4000
MACRONIX, INC.
AC TEST CONDITIONS
FIG 1. OUTPUT LOAD CIRCUIT
Input Pulse Levels,
O.4V to 2.4V
Input Rise and Fall Times
10ns
Input Timing Level
1.5V
Output Timing Level
O.BV and 2.0V
+5V
1250n
DOUT
Output Load
See Figure 1
100 pF'
775!l
• Including scope and jig,
WAVEFORMS
PROPAGATION DELAY FROM ADDRESS (CE/OE = ADDRESS)
~----------------~tCYC---
~
ADDRESS
INPUTS
VALID ADDRESS
3
DATA OUT
VALID DATA
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
lACE
CE
~
K:
7
L
IAOE
~
OE
,L
/
tLZ
tHZ3-
DATA OUT
"
:) ~
ORDERING INFORMATION
PART NO.
ACCESS TIME(ns)
OPERATING CURRENT MAX.(mA)
STANDBY CURRENT MAX.(IlA)
PACKAGE
MX23C4000PC-12
120
40
100
32 Pin DIP
MX23C4000MC-12
120
40
100
32 Pin SOP
MX23C4000PC-15
150
40
100
32 Pin DIP
MX23C4000MC-15
150
40
100
32 Pin SOP
MX23C4000PC-20
200
40
100
32 Pin DIP
MX23C4000MC-20
200
40
100
32 Pin SOP
17-3
IYIAlM
MX23C4~OO
MACRONIX, INC.
4M-BIT(S'1 2K x B/2S6K x '16)
CMOS MASK ROM
FEATURES
•
•
•
•
• Switch able configuration
- 512K x 8(byte mode)
- 256K x 16(word mode)
• Single +5V power supply
• Fast access time: 120/150/200ns
• Totally static operation
Completely TTL compatible
Operating current: 60mA
Standby current: 10011 A
Package
- 40 pin DIP(600 mil)
GENERAL DESCRIPTION
The MX23C4100 is a 5V only, 4M-bit, Read Only Memory. It is organized as 512K x 8 bits (byte mode) or as
256K x16 bit (word mode) depending on BYTE (pin 31)
voltage level. MX23C4100 has a static standby mode,
and has an access time of 12t1l/150/200ns. It is designed
to be compatible with all microprocessors and similar applications in which high performance, large bit storage
and simple interfacing are important design considerations.
MX23C4100 offers automatic power-down, with powerdown controlled by the chip enable(CE/CE) Input. When
CE/CE is not selected, the device automatically powers
down and remains in a low-power standby mode as long
as CE/CE stays in the unselected mode.
PIN CONFIGURATIONS
BLOCK DIAGRAM
The OEIOE inputs as well as CE/CE input may be programmed either active High or Low.
CEiCE
A17 l
A7 -
40
39
36
37
36
35
34
A6 '
AS:
A4 [.
A3
A2
A1
AO
CEiCE
VSS
OEIOE
OOl
08
01
09 [
02 [
010,
03
011 l-
5
co
co
10
11
12
13
14
15
16
17
16
19
20
:;:
0
'"
N
><
:;
33
32
31
30
29
28
27
26
25
24
23
22
21
~
OEiOE
BYTE
0151A-1
A6
1 A9
J A10
J A11
_J
J
--
00-014
------:+
A12
A13
A14
A15
~ A16
BYTE
VSS
0151A-1
07
014
~ 06
013
05
' 012
AO-A17
ADDRESS
INPUTS
-
---...:..
-
VCC _ _
vss-
Q4
'
----------
PIN DESCRIPTION:
VCC
SYMBOL
PIN NAME
AO-A17
Address Input
00-014
Data Output
CE/CE
Chip Enable Input
OE/OE
Output Enable Input
015/A-1
015(Word mode)iLSB addr. (Byte mode)
Word/Byte Selection
VCC
Power Supply Pin (+5V..:.)_ _ _ _ __
VSS
Ground Pin
REV. 3.0, NOV. 26, 1992
PIN: PM0136
18-1
IYIATM
MX23C4~OO
MACRONIX. INC.
TRUTH TABLE OF BYTE FUNCTION
BYTE MOOE(BYTE = VSS)
CE
OEIOE
D151A-1
MODE
00-07
SUPPLY CURRENT
H
X
X
Non selected
HighZ
Standby(ICC2)
L
UH
X
Non selected
HighZ
Operating(ICC1)
L
H/L
A-1 input
Selected
DOUT
Operating(ICC1 )
NOTE
WORD MODE(BYTE = VCC)
CE
OEIOE
D151A-1
MODE
00-014
SUPPLY CURRENT
H
X
High Z
Non selected
HighZ
StanClby(ICC2)
L
UH
High Z
Non selected
HighZ
Operating(ICC1 )
L
H/L
DOUT
Operating(ICC1 )
DOUT
Selected
NOTE
NOTE1: X=HorL
ABSOLUTE MAXIMUM RATINGS·
RATING
VALUE
Ambient Operating Temperature
O'Ct070'C
Storage Temperature
-65'C to 125'C
Applied Input Voltage
-0.5V to 7.0V
Applied Output Voltage
-0.5V to 7.0V
VCC to Ground Potential
-0.5V to 7.0V
Power Dissipation
1.0W
*NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended period may affect reliability.
DC CHARACTERISTICS TA = Doe TO 70oe, vee = 5V ± 10%
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
VOL
Output Low Voltage
VIH
Input High Voltage
VIL
Input Low Voltage
MAX.
UNIT
CONDITIONS
V
IOH=-1.0mA
0.4
V
IOL=2.1mA
2.2
VCC+0.3
V
-0.3
0.8
V
III
Input Leakage Current
10
~
VIN = 0 to 5.5V
ILO
Output
Leakag~
10
~.
VOUT = 0 to 5.5V
ICC3
Power-Down Supply Current
100
ICC2
Standby Supply Current
1.0
IlA
mA
CE=VIH
ICC1
Operating Supply Current
60
mA
Note 1
Current
CE > VCC - 0.2V
CAPACITANCE TA = 25°C, f = 1.0 MHz (Note 2)
SYMBOL
PARAMETER
MAX.
UNIT
CONDITIONS
CIN
Inpui Capacitance
MIN.
10
pF
VIN =OV
COUT
Output CapaCitance
10
pF
VOUT= OV
18-2
. . ArM
MX23C4100
MACRONIX. INC.
AC CHARACTERISTICS: TA = Doe to 7Doe, vee = 5V ± 1D%
23C41 00-12
SYMBOL
PARAMETER
MIN.
120
tCYC
Cycle Time
tAA
Address Access Time
tOH
Output Hold Time After Address Change
tACE
Chip Enable Access Time
MAX.
23C4100-15
MIN.
MAX.
tAOE
Output Enable/Chip Select Access Time
tLZ
Output Low Z Delay
tHZ
Output High Z Delay
tBHA
BYTE Access Time
tOHB
BYTE Output Hold Time
tBHZ
BYTE Output Delay Time
tBLZ
BYTE Output Set Time
150
10
150
SO
70
70
70
120
0
150
70
10
ns
90
ns
ns
Note 3
70
ns
Note 4
200
ns
ns
70
10
ns
200
0
0
CONDITIONS
ns
0
0
UNIT
ns
200
10
120
0
MAX.
200
150
120
10
23C41 00-20
MIN.
70
10
ns
ns
NOTE:
1. Measured with device selected at f = 5 MHz and output unloaded.
2. This parameter is periodically sampled and is not 100% tested.
3. Output low-impedance delay (tLZ) is measured from CE going low.
4. Output high-impedance delay (tHZ) is measured from CE going high.
FIG. 1 OUTPUT LOAD CIRCUIT
AC TEST CONDITIONS
Input Pulse Levels
OAV to 2AV
Input Rise and Fall Times
10ns
Input Timing Level
1.5V
Output Timing Level
O.SV and 2.0V
+5V
J
1
~
Dour
Output Load
See Figure 1
7750}
-<
L
//
, Including scope and jig.
lS-3
12500
100pF'
MX23C4~OO
WAVEFORMS
PROPAGATION DELAY FROM ADDRESS (CEIOE
=ACTIVE)
----------------~~YC----------------t
~
ADDRESS
INPUTS
VALID ADDRESS
.'
.'
DATA OUT
~-~-.-------V.-~-L1-D-D-AT.-A--..
~ ~". :i,.,.,\: 7":·~I~":!'t~i;: '"C:t
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
lACE
CE
~
- ,L
"
tAOE
~
OE
/
1HZ
1L2
/
DATA OUT
"
..
~~
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
A-1
--~H~IG~HW-Z~~~_tAA
HIGH-Z
_ _ _ ___
BYTE
DO-D7
VALID DATA
VALID DATA
D15-D8
IBL2
ORDERING INFORMATION
MAX.(~A)
PART NO.
ACCESS TIME(ns)
OPERATING CURRENT MAX.(mA)
STANDBY CURRENT
MX23C4100PC-12
120
60
100
40 Pin DIP
PACKAGE
MX23C4100PC-15
150
60
100
40 Pin DIP
MX23C4100PC-20
200
60
100
40 Pin DIP
18-4
. . .ArM
MX23CBOOO
MACIIONIX, INC.
BM-BIT('1 M
X
B) CMOS MASK ROM
FEATURES
•
•
•
•
•
• Operating current: 40mA
• Standby current: 100ll A
• Package type:
32 pin plastic DIP
- 32 pin plastic SOP
1M X 8 organization
Single +5V power supply
Fast access time: 120/150/200ns (max)
Totally static operation
Completely TTL compatible
GENERAL DESCRIPTION
The MX23C8000 is a 5V only, 8M-bit, Read Only Memory. It is organized as 1M words by 8 bit, operates from
a single +5 volt supply, has a static standby mode, and
has an access time of 120/150/200ns. It is designed to be
compatible with all microprocessors and similar applications in which high performance, large bit storage and
simple interfacing are important design considerations.
The MX23C8000 offers automatic power-down, with
power-down controlled by the chip enable(CE) Input.
When CE goes high, the device automatically powers
down and remains in a low-power standby mode as long
as CE remains high.
MX23C8000 pin 24 may also be programmed either
active HIGH or LOW in order to eliminate bus contention
in multiple-bus microprocessor systems.
PIN CONFIGURATIONS
BLOCK DIAGRAM
---------
32 PDIP
CE/CE
A19
VCC
A16
A15
A12
A18
A17
A14
A7
A6
A13
A8
AS
A4
A3
A2
A1
AO
A9
A11
OEiOE
--------
AO-A19
ADDRESS
INPUTS
OEiOE
A10
CEiCE
07
00
01
02
06
vss
Q3
; } - 00-07
05
VCC _ _
04
VSS-
32 SOP
A19
A16
A15
A12
A7
A6
AS
A4
A3
A2
A1
AD
00
01
02
VSS
PIN DESCRIPTION:
vcc
A18
A17
A14
A13
A8
A9
A11
DEiDE
A1D
CEiCE
07
06
05
SYMBOL
PIN NAME
AO-A 19
Address Input
_-=Q:.:O'-----=Q.:..7_ _ _-"D:..:-a::=ta Output
eE/eE _ _ _ _e_h~ip_E_n_a_b_le_ln~p_ut_ _ _ _ _ _ _ __
04
Q3
PIN: PM0137
OEIOE
Output Enable Input
vee
Power Supply Pin (+5V)
VSS
Ground Pin
REV. 3.0, NOV. 26,1992
19-1
----
_ArM
MX23CBOOO
MACRONIX, tNC.
ABSOLUTE MAXIMUM RATINGS·
RATING
VALUE
Ambient Operating Temperature
O'Cto 70'C
Storage Temperature
-65'C to 125'C
Applied Input Voltage
-0.5V to VCC + 0.5
Applied Output Voltage
-0.5V to VCC + 0.5
VCC to Ground Potential
-0.5V to 7.0V
Power Dissipation
1.0W
DC CHARACTERISTICS
TA = ooe TO 70oe,
'NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended period may affect reliability.
vee = 5V ±
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
VOL
Output low Voltage
VIH
Input High Voltage
2.2
Vil
Input low Voltage
-0.3
10%
UNIT
CONDITIONS
V
IOH = -1.0mA
0.4
v
IOl = 2.1mA
VCC+0.3
V
0.8
V
MAX.
III
Input leakage Current
10
VIN = 0 to 5.5V
IlO
Output leakage Current
10
VOUT = 0 to 5.5V
ICC3
Power-Down Supply Current
100
ICC2
Standby Supply' Current
1.0
itA
rnA
CE=VIH
ICC1
Operating Supply Current
40
rnA
Note 1
MAX.
UNIT
CONDITIONS
CAPACITANCE TA
SYMBOL
CE ;> VCC - 0.2V
=25°C, f = 1.0 MHz (Note 2)
PARAMETER
MIN.
CIN
Input Capacitance
10
pF
VIN =OV
COUT
Output Capacitance
10
pF
VOUT=OV
AC CHARACTERISTICS TA = ooe to 70oe,
vee = 5V ± 10%
23CaooO-12
23C8000-15
MIN.
SYMBOL
PARAMETER
MIN.
tCYC
Cycle Time
120
';AA
Address Access Time
MAX.
MAX.
150
120
23C8000-20
MIN.
MAX.
200
ns
tOH
Output Hold Time After Address Change
lACE
Chip Enable Access Time
120
150
200
ns
IAOE
Output Enable/Chip Select Access Time
80
80
100
ns
tLZ
Output low Z Delay
tHZ
Output High Z Delay
10
10
0
10
0
70
NOTE:
1. Measured with device selected at f = 5 MHz and output unloaded.
2. This parameter is periodically sampled and is not 100% tested.
.3. Output low-impedance delay (tLZ) is measured from CE going
ns
0
70
CONDITIONS
ns
200
150
UNIT
70
ns
Note 3
ns
Note 4
4. Output high-impedance delay (tHZ) is measured from
high .
low.
19-2
CE
going
. . ArM
MX23CBOOO
MACRONIX, INC.
AC TEST CONDITIONS
FIG 1. OUTPUT LOAD CIRCUIT
Input Pulse Levels
O.4V to 2.4V
Input Rise and Fall Times
IOns
Input Timing Level
1.5V
Output Timing Level
O.BV and 2.0V
Output Load
See Figure 1
+sv
12500
DOUT
100pF"
775n
" Including scope and jig.
WAVEFORMS
PROPAGATION DELAY FROM ADDRESS (CEIOE = ACTIVE)
~YC------------------t~
ADDRESS
INPUTS
VAliD ADDRESS
DATA OUT
.
"":1-
VAUD DATA
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
lACE
CE
~
-; ~
K"
IAOE
~
OE
/
V
tHZ--
tLZ
/'
DATA OUT
-l
~
ORDERING INFORMATION
PART NO.
ACCESS TIME(ns)
OPERATING CURRENT MAX.(mA)
STANDBY CURRENT MAX.(liA)
PACKAGE
MX23CBOOOPC-12
120
40
100
32 Pin DIP
MX23CBOOOMC-12
120
40
100
32 Pin SOP
MX23CBOOOPC-·15
150
40
100
32 Pin DIP
MX23CBOOOMC-15
150
40
100
32 Pin SOP
40
100
32 Pin DIP
40
100
32 Pin SOP
MX23C8000PC-20
200
----------------MX23C8000MC-20 200
19-3
IYIATU
MX23CB100
MACRON/X, INC.
8M-B1T('" M X 8/5'" 2K X ... 5)
CMOS MASK ROM
FEATURES
•
•
•
•
• Switchable configuration
- 1M x 8(byte mode)
- 512K X 16(word mode)
• Single +5V power supply
• Fast access time: 120/150/200ns (max)
• Totally static operation
Completely TTL compatible
Operating current: 60mA
Standby current: 100)1 A
Package
- 42 pin DIP(600 mil)
- 44 pin SOP(500 mil)
GENERAL DESCRIPTION
MX23C8100 offers automatic power-down, with powerdown controlled by the chip enable(CE/CE) Input. When
CE/CE is not selected, the device automatically powers
down and remains in a low-power standby mode as long
as CEiCE stays in the unselected mode.
The MX23C8100 is a 5V only, 8M-bit, Read Only Memory. It is organized as 1M x 8 bits (byte mode) or as 512K
x16 bit (word mode) depending on BYTE (pin 32) voltage
level. MX23C81 00 has a static standby mode, and has an
access time of 120/150/200ns. It is designed to be compatible with all microprocessors and similar applications
in which high performance, large bit storage and simple
interfacing are important design considerations.
The OE/OE inputs as well as CEiCE input may be programmed either active High or Low.
PIN CONFIGURATIONS
42 PDIP
44 SOP
A1S
A17
A7
A6
AS
A4
A3
A2
A1
AO
CE/CE
V55
DEICE
A4
vss
A3
A2
A1
AO
CEICE
0151A·1
07
014
DE/DE
00
~
BYTE
QO
OB
01
09[
02
010
03
011
NC
A1S
A17
A7
A6
AS
NC
AS
A9
A10
. A11
A12
A13
A14
A15
L
vss
06
OB
013
01
as
09
02
010
012
04
VCC
03
011
NC
NC
AS
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
vss
0151A·1
07
014
OB
013
as
012
Q4
vee
REV. 3.0, NOV. 26, 1992
PIN: PM0138
20-1
IVIATM
MX23ca~oo
MACRONIX, INC.
BLOCK DIAGRAM
PIN DESCRIPTION:
CElg'
OEiOE
BYTE
; } - 00-014
015/A·1
AO-A18
ADDRESS
INPUTS
vcc-"
vss-
SYMBOL
PIN NAME
AO-A1B
Address Input
00-014
Data Output
CE/CE
Chip Enable Input
OE/OE
Output Enable Input
BYTE
Word/Byte Selection
015/A·l
015(Word mode)/LSB addr. (Byte mode)
VCC
Power Supply Pin (+5V)
VSS
Ground Pin
TRUTH TABLE OF BYTE FUNCTION
BYTE MODE(BYTE
=VSS)
CE
OE/OE
015JA-1
MODE
00-07
SUPPLY CURRENT
H
X
X
Non selected
HighZ
Standby(ICC2)
L
UH
X
Non selected
High Z
Operating(ICCl )
L
H/L
A-l input
Selected
DOUT
Operating(ICC1)
SUPPLY CURRENT
WORD MODE(BYTE
NOTE
=VCC)
CE
OE/OE
015JA-1
MODE
00-014
H
X
HighZ
Non selected
HighZ
Standby(ICC2)
L
UH
HighZ
Non selected
HighZ
Operating(ICCl )
L
H/L
DOUT
Selected
DOUT
Operating(ICCl )
NOTE1: X=HorL
20-2
NOTE
------
IYIATM
MX23CB'IOO
MACRONl)(' INC.
ABSOLUTE MAXIMUM RATINGS·
RATING
VALUE
Ambient .operating Temperature
O'C10 70'C
Storage Temperature
-65'C to 125'C
Applied Input Voltage
-0.5V to 7.0V
Applied .output Voltage
-0.5V to 7.0V
VCC to Ground Potential
-0.5V 10 7,OV
Power Dissipation
1.0W
·NOTICE:
Stresses greater than those listed under ABSQLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended period may affect reliability.
----
DC CHARACTERISTICS TA = ooe TO 70oe,
vee = 5V ±
SYMBOL
PARAMETER
MIN.
VQH
.output High Voltage
2.4
VQL
.output Low Voltage
VIH
Input High Voltage
VIL
Input Low Voltage
10%
MAX.
UNIT
CONDITIONS
V
IQH = -1.0mA
0.4
V
IQL =2.1mA
2.2
VCC+ 0.3
V
-0.3
0.8
V
III
Input Leakage Current
10
itA
VIN = 0 to 5.5V
ILQ
.output Leakage Current
10
I!A
VQUT = 0 to 5.5V
ICC3
Power-Down Supply Current
100
ICC2
Standby Supply Current
ICCl
.operating Supply Current
itA
CE > VCC - 0.2V
rnA
CE =VIH
60
rnA
Note 1
CAPACITANCE TA = 25°C, f = 1.0 MHz (Note 2)
SYMBOL
PARAMETER
MAX.
UNIT
CONDITIONS
CIN
Input Capacitance
10
pF
VIN=OV
CQUT
.output Capacitance
10
pF
VQUT= OV
MIN.
20-3
IYIATM
MX23CS.,OO
MACRONIX, INC.
AC CHARACTERISTICS: TA = ooe to 70oe, vee = 5V ± 10%
23C81 00-12
SYMBOL
PARAMETER
MIN.
tCYC
Cycle Time
120
tAA
Address Access Time
tOH
Output Hold Time After Address Change
MAX.
23C81 00-15
23C81 00-20
MIN.
MIN.
MAX.
150
120
10
MAX.
200
150
10
UNIT
ns
200
10
ns
ns
tACE
Chip Enable Access Time
120
150
200
ns
IAOE
Output Enable/Chip Select Access Time
70
BO
90
ns
tLZ
Output Low Z Delay
tHZ
Output High Z Delay
0
tBHA
BYTE Access Time
tOHB
BYTE Output Hold Time
tBHZ
BYTE Output Delay Time
tBLZ
BYTE Output Set Time
0
0
70
70
150
120
0
0
10
ns
Note 3
70
ns
Note 4
200
ns
0
70
70
10
ns
70
10
CONDITIONS
ns
ns
NOTE:
1. Measured with device selected at f 5 MHz and output unloaded.
2. This parameter is periodically sampled and is not 100% tested.
3. Output low-impedance delay (tLZ) is measured from CE going low.
4. Output high-impedance delay (tHZ) is measured from CE going high.
=
AC TEST CONDITIONS
FIG. 1 OUTPUT LOAD CIRCUIT
Input Pulse Levels
OAV to 2AV
Input Rise and Fall Times
10ns
Input Timing Level
1.5V
Output Timing Level
O.BV and 2.0V
Output Load
See Figure 1
+5V
12500
DOUT
7750
• Including scope and jig.
20-4
100 pF'
IYIATM
MX23CB~OO
MACRONIX. INC.
WAVEFORMS
PROPAGATION DELAY FROM ADDRESS (CE/OE
=ACTIVE)
tCyC--------t
ADDRESS
INPUTS
VALID ADDRESS
DATA OUT
~Jc~
VALID DATA
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
lACE
CE
-'
7 IL
~
IAOE
-{
OE
/v
tHZ
tLZ
/
DATA OUT
......
~~
I
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
A-1
HIGH-Z
HIGH-Z
BYTE
DO-D7
VALID DATA
VALID DATA
D15-D8
tBLZ
ORDERING INFORMATION
PART NO.
ACCESS TIME(ns)
OPERATING CURRENT MAX.(mA)
STANDBY CURRENT MAX.(IJA)
PACKAGE
MX23C8100PC-12
120
60
100
42 Pin DIP
MX23CB100MC-12
120
60
100
44 Pin SOP
MX23CB100PC-15
150
60
100
42 Pin DIP
MX23C8100MC-15
150
60
100
44 Pin SOP
MX23C8100PC-20
200
60
100
42 Pin DIP
MX23C8100MC-20
200
60
100
44 Pin SOP
20-5
IVIATM
MX23C1610
MACRONIX, INC.
'I BM-BIT(2M x S/'I M x 'I Bl
CMOS MASK ROM
FEATURES
•
•
•
•
• Switchable configuration
- 2M x 8(byte mode)
- 1M x 16(word mode)
• Single +5V power supply
• Fast access time: 120/150/200ns (max)
• Totally static operation
Completely TTL compatible
Operating current: 60mA
Standby current: 10011 A
Package
- 42 pin DIP (600 mil)
- 44 pin SOP (500 mil)
GENERAL DESCRIPTION
MX23C1610 offers automatic power-down, with powerdown controlled by the chip enable(CE/CE) Input. When
CE/CE is not selected, the device automatically powers
down and remains in a low-power standby mode as long
as CE/CE stays in the unselected mode.
The MX23C 1610 is a 5V only, 16M-bit, Read Only Memory. It is organized as 2,097,152 x 8 bits (~ode) or
as 1M x 16 bit (word mode) depending on BYTE (pin 32)
voltage level. MX23C1610 has a static standby mode,
and has an access time of 120/150/200ns. It is designed
to be compatible with all microprocessors and similar applications in which high performance, large bit storage
and simple interfacing are important design considerations.
The OE/OE inputs as well as CE/CE input may be programmed either active High or Low.
PIN CONFIGURATIONS
42 PDIP
44 SOP
A18
A17
A7
A6
A5
A4
A3
A2
A1
AO
CE/CE
vss
OEiOe
00
Q8
01
NC
A19
A8
A9
A10
A11
A12
A13
A14
A15
A3
A2
~
BYTE
A1
AO
vss
CE/CE
vss
015/A·1
07
014
06
OEiOE
00
08
01
09
Q2
010
03
011
Q8
02
010
03
011
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
vss
0151A·1
07
' 014
Q8
013
05
012
J 04
VCC
REV. 2.0. NOV. 26, 1992
PIN: PM0139
21-1
IYIATM
MX23C., S., 0
MACRONIX, INC.
BLOCK DIAGRAM
CEiCE
OEiOE
BYTE
01s/A-1
PIN DESCRIPTION:
-----.
-----.
-----.
; : } 00-014
-~
----..AO-A19
ADDRESS
INPUTS
----------
vcc _ _
SYMBOL
PIN NAME
AO-A19
Address Input
00-014
Data Output
CEICE
Chip Enable Input
OEIOE
Output Enable Input
BYTE
WordiByte Selection
0151A-l
015(Word mode)/LSB addr_ (Byte mode)
VCC
Power Supply Pin (+5V)
VSS
Ground Pin
vss--
TRUTH TABLE OF BYTE FUNCTION
BYTE MODE(BYTE
=VSS)
CE
OEIOE
D1S/A-1
MODE
00-07
SUPPLY CURRENT
H
X
X
Non selected
HighZ
Standby(ICC2)
L
UH
X
Non selected
HighZ
Operating(ICCl )
L
H/L
A-I input
Selected
DOUT
Operating(ICC1 )
WORD MODE(BYTE
=VCC)
CE
OEIOE
D1s/A-l
MODE
00-014
SUPPLY CURRENT
H
X
HighZ
Non selected
HighZ
Standby(ICC2)
L
UH
HighZ
Non selected
HighZ
Operating(ICCl )
H/L
DOUT
Selected
DOUT
Operating(ICCl )
L
NOTE1: X
NOTE
=H or L
21-2
NOTE
. . ATM
MX23C1610
MACRONIX, INC.
ABSOLUTE MAXIMUM RATINGS·
-NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended period may affect reliability.
VALUE
RATING
Ambient Operating Temperature
O'Cto 70'C
_ __
Storage Tempe_ra_tu_re
-65'C to 125'C
Applied Input Voltage
Applied Output Voltage
-0.5V to 7.0V
----0.5V to 7.0V
VCC to Ground Potential
-0.5V to 7.0V
Power Dissipation
1.0W
DC CHARACTERISTICS TA = ooe TO 70oe,
vee = 5V ±
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
VOL
Output low Voltage
10%
CONDITIONS
MAX.
UNIT
V
IOH=-1.0mA
----
0.4
V
IOl= 2.1mA
VIH
Input High Voltage
2.2
VCC +0.3
V
Vil
Input low Voltage
-0.3
0.8
V
III
Input leakage Current
10
iJA
VIN = 0 to 5.5V
IlO
Output leakage Current
10
~A
VOUT = 0 to 5.5V
ICC3
Power-Down Supply Current
100
~A
CE > VCC - 0.2V
ICC2
Standby Supply Current
mA
CE=VIH
ICCl
Operating Supply Current
mA
Note 1
60
CAPACITANCE TA = 25°C, f = 1.0 MHz (Note 2)
SYMBOL
PARAMETER
MAX.
UNIT
CONDITIONS
CIN
Input Capacitance
10
pF
VIN =OV
COUT
Output Capacitance
10
pF
VOUT=OV
MIN.
21-3
IVIAlM
MX23C., S., 0
MACRONIX, INC.
AC CHARACTERISTICS: TA = Doe to7Doe, vee = 5V ± 1D%
23C161Cl-12
SYMBOL
PARAMETER
MIN.
tCYC
Cycle Time
120
!AA.
Address Access Time
tOH
Output Hold Time
After Address Change
23C161Cl-15
MAX.
MIN.
MAX.
150
120
23C161 0-20
MIN.
MAX.
200
10
200
10
ns
ns
tACE
Chip Enable Access Time
120
150
200
ns
tAOE
Output Enable/Chip
Select Access Time
70
80
90
ns
tLZ
Output Low Z Delay
tHZ
Output High Z Delay
70
70
tBHA
BYTE Access Time
120
150
tOHB
BYTE Output Hold Time
tBHZ
BYTE Output Delay Time
tBLZ
BYTE Output Set Time
0
0
0
0
ns
Note 3
70
ns
Note 4
200
ns
0
70
ns
70
10
CONDITIONS
ns
150
10
UNIT
10
70
10
ns
ns
NOTE:
1. Measured with device selected at f = 5 MHz and output unloaded.
2. This parameter is periodically sampled and is not 100% tested.
3. Output low-impedance delay (tLZ) is measured from CE going low.
4. Output high-impedance delay (tHZ) is measured from CE going high.
AC TEST CONDITIONS
FIG. 1 OUTPUT LOAD CIRCUIT
Input Pulse Levels
O.4V to 2.4V
Input Rise and Fall Times
10ns
+5V
J
Input Timing Level
1.5V
~
Output Timing Level
0.8V and 2.0V
1
Output Load
See Figure 1
Dour
J
7150~
1
I
//7
• Including scope and jig.
21-4
12500
100pF'
IYIATM
MX23C"'I S"'I 0
MACRONIX. INC.
WAVEFORMS
PROPAGATION DELDELAY FROM ADDRESS (CEIOE
= ACTIVE)
~YC----------------t~
ADDRESS
INPUTS
VALID ADDRESS
.~1<-
VALID DATA
DATA OUT
PN DELAY FROM CHIP ENABLE CHIP (ADDRESS VALID)
lACE
CE
~
7 IL
K:
IAOE - - - _ . -
~
OE
/v
tLZ
tHZ===1
/
DATA OUT
"
~~
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
A-1
HIGH·Z
~
HIGH-Z
~'-/~-tAA
BYTE
00-07
VALID DATA
VALID DATA
015-08
tBLZ
ORDERING INFORMATION
PART NO.
ACCESS TIME(ns)
OPERATING CURRENT MAX.(mA)
STANDBY CURRENT MAX.(!tA)
PACKAGE
MX23C1610PC-12
120
60
100
42 Pin DIP
MX23C1610MC-12
120
60
100
44 Pin SOP
MX23C1610PC-15
150
60
100
42 Pin DIP
MX23C1610MC-15
150
60
100
44 Pin SOP
MX23C1610PC-20
200
60
100
42 Pin DIP
MX23C1610MC-20
200
60
100
44 Pin SOP
21-5
IYIATM
MACRONIX, INC.
IV. FLASH MEMORY
----
IYIArM
MX2BF'IOOO
MACRONIX. INC.
'1 M-BIT ['1 2BK
X
B) CMOS FLASH MEMORY
FEATURES
• 131,072 bytes by 8-bit organization
• Fast access time: 90/120/150 ns
• Low power consumption
- 50mA maximum active current
- 10011 A maximum standby current
• Programming and erasing voltage 12V ± 0.6V
• Command register architecture
- Byte Programming (1011 s typical)
- Chip Erase (1 sec typical)
- Block Erase (16384 bytes by 8 blocks)
• Auto Erase (chip & block) and Auto Program
- DATA polling
- Toggle bit
•
•
•
•
10,000 minimum erase/program cycles
Latch-up protected to 100mA from -1 to VCC+1V
Advanced CMOS Flash memory technology
Compatible with JEDEC-standard byte-wide 32-pin
EPROM pinouts
• Package type:
- 32-pin plastic DIP
- 32-pin PLCC
- 32-pin SOP
- 32-pin TSOP (Type 1)
GENERAL DESCRIPTION
Reliability Erase and High Reliability Program algorithms.
The MX28F1000 is a 1-mega bit Flash memory organized as 128K bytes of 8 bits each. MXIC's Flash
memories offer the most cost-effective and reliable
read/write non-volatile random access memory. The
MX28F1000 is packaged in 32-pin PDIP, PLCC, SOP
and TSOP. It is designed to be reprogrammed and
erased in-system or in-standard EPROM programmers.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up
protection is proved for stresses up to 100 milliamps
on address and data pin from -1V to VCC + 1V.
The standard MX28F1000 offers access times as fast
as 120 ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX28F10QQ..has separate chip enable (CE)
and output enable (OE ) controls.
MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming.
The MX28F1000 uses a command register to manage
this functionality, while maintaining a standard 32-pin
pinout. The command register allows for 100% TTL
level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility.
MXIC Flash technology reliably stores memory contents even after 10,000 erase and program cycles.
The MXIC cell is designed to optimize the erase and
programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low
internal electric fields for erase and programming operations produces reliable cycling. The MX28F1000
uses a 12.0V + 5% VPP supply to perform the High
PIN: PM0146
REV. 1.0. DEC. 30,1992
22-1
----
IYIATM
MX2BF1000
MACRONIX. INC.
PIN CONFIGURATIONS
32 PDIP
TSOP (TYPE 1)
vpp
A16
A15
A12
A7
A6
A5
A4
A3
32
VQC
31 • WE
NC
30
29 -J A14
A13
28
A8
27
26 J A9
25 ' All
6E
24
23 ~ Al0
22
CE
21 .J 07
20 . 06
19 ~ 05
18 _~ 04
17 .. , 03
81;:
CO
'"><
10
Al
11
AD
12
00 [ 13
01 "_ 14
02 [ 15
GND L 16
:!i
,-
A3
c::::
A2 ~
Al
AD r-~~
00 [~
~~ ~
GND
03
c::
=
Q4 C.
05 C
06 C
07
CE
Al0
OE
~
.
,--"
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
16
15
14
o
1-"
A4
-:::1 AS
~
A6
13
-=:J A7
12
11
10
9
_:, A12
b A15
-=:J A16
-=-J VPP
8~~~
7 CJ WE
6 _-:J NC
5 =:::J A14
4 "_~ A13
.J A8
2 ~-::J A9
... 1 All
(NORMAL TYPE)
32 SOP
A4
-
VPP [
A16 I
A15
A12
A7
A6
A5
A4
A3
A2
Al
AD
00
01
02
--
'32 [ :] y£c
31 ::J WE
30 -] NC
~ A14
A13
A8
A9
All
r.··
A5 r
A6 ::A7
16
15
14
13
20
A12 ;-=-_
12
21
-'-'-J
A15 ,_
A16 ::::
11
10
22
23
_"J 01
=
VPP
r=-
24
25
26
27
V~ =-
WE ,. __
6E
NC
Al0
CE
A13
07
06
05
04
03
GND
17
lB
19
M~
0
2B
29
W
A9 C
2
31
All c-Ll_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
32~
(REVERSE TYPE)
PIN DESCRIPTION:
32 PLCC
~ ~ ~ ~ ~I~ ~
A7 r
n ,.. ,"
r-
4
13230
29
5
--
I' -;
A14
A6 [
_ A13
A5[
'AB
Me
A9
MX28F1000
A3 L 9
A2
A1
c
l.
AD :
QO
13
14
17
25 -' All
j
OE
~
Al0
PIN NAME
Address Input
00-07
Data Input/Output
CE
Chip Enable Input
OE
Output Enable Input
WE
Write enable Pin
VPP
Program Supply Voltage
iCE
VCC
Power Supply Pin (+5V)
21 ~ 07
20
GND
Ground Pin
L.
5 2J
SYMBOL
AO-A16
~
>
22-2
'--::'-j
A3
A2
:::1 A2
.--=_J AO
_~
QO
Q2
GND
03
~
Q4
05
06
07
CE
Al0
OE
IYIATM
MX2BF.,OOO
MACRONIX. INC.
BLOCK DIAGRAM
00-Q7
.STATE
CONTROL
COMMANO
REGISTER
CE~~----+--------------'----~~I
OE------~~----------~------·I
CHIP
ENABLE
OUTPUT
ENABLE
LOGIC
WE-------~------------li-----.-L---_r~
STa
AD-AlB
22-3
[p~~~~~~[0I]ffi\G23W
. . ArM
MX2BF4000
MACRONIX, INC.
4M-BIT [S'12Kx S) CMOS FLASH MEMORY
FEATURES
• 524,288 bytes by 8-bit organization
• Fast access time: 120/150/200 ns
• Low power consumption
- 50mA maximum active current
- 10011 A maximum standby current
• Programming and erasing voltage 12V ± 0.6V
• Command register architecture
- Byte Programming (1011 stypical)
- Chip Erase (1 sec typical)
- Block Erase (16384 bytes by 32 blocks)
• Auto Erase (chip & block) and Auto Program
- DATA polling
- Toggle bit
•
•
•
•
10,000 minimum erase/program cycles
Latch-Up protected to 100mA from -1 to VCC+1V
Advanced CMOS Flash memory technology
Compatible with JEDEC-standard byte-wide 32-pin
EPROM pinouts
• Package type:
- 32-pin plastic DIP
- 32-pin SOP
- 32-pin TSOP (Type 1)
GENERAL DESCRIPTION
The MX28F4000 is a 4-mega bit Flash memory organized as 512K bytes of 8 bits each. MXIC's Flash
memories offer the most cost-effective and reliable
read/write non-volatile random access memory. The
MX28F4000 is packaged in 32-pin PDIP, SOP and
TSOP. It is designed to be reprogrammed and
erased in-system or in-standard EPROM programmers.
Reliability Erase and High Reliability Program algorithms.
The highest degree of latch-l;Jp protection is achieved
with MXIC's proprietary non-epi process. Latch-up
protection is proved for stresses up to 100 milliamps
on address and data pin from -1V to VCC + 1V.
The standard MX28F4000 offers access times as fast
as 120 ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX28F40QQ...has separate chip enable (CE)
and output enable (OE ) controls.
MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming.
The MX28F4000 uses a command register to manage
this functionality, while maintaining a standard 32-pin
pinout. The command register allows for 100% TTL
level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility.
MXIC Flash technology reliably stores memory contents even after 10,000 erase and program cycles.
The MXIC cell is designed to optimize the erase and
programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low
internal electric fields for erase and programming operations produces reliable cycling. The MX28F4000
uses a 12.0V + 5% VPP supply to perform the High
REV. 1.0, JAN. 15,1993
PIN: PM0104
23-1
----
IVIArM
MX2BF4000
MACRONIX, INC..
PIN CONFIGURATIONS
32 PDIP
TSOP (TYPE 1)
vpp
vee
A16
A15
A12
A7
A6
AS
A4
A3
A2
Al
AO
00
01
02
A18
A17
A14
A13
AB
A9
All
GND
03
co
01
Q2
GND
OE
03
Al0
Q4
CE
05
07
06
05
Q6
07
CE
A10
Q4
16
15
14
13
12
11
10
17
18
19
20
21
22
23
24
25
26
27
2B
29
30
31
32
A3
A2
Al
AO
~
A4
AS
A6
A7
A12
A1S
A16
VPP
vee
0
4
AlB
A17
A14
A13
AS
A9
All
(NORMAL TYPE)
32 SOP
vpp
vee
A16
A15
A12
A18
A17
A14
M3
AB
A9
All
~
A6
AS
A4
A3
A2
Al
AO
00
01
02
GND
A4
A5
A6
A7
A12
A15
A16
VPP
vee
AlB
A17
A14
A13
OE
MO
ce
07
0
AS
Q6
,,===-===='.1'
17
lB
19
20
21
22
23
24
25
26
27
2B
29
30
31
32
16
15
14
13
12
11
10
9
A9
All
05
04
(REVERSE TYPE)
03
BLOCK DIAGRAM
PIN DESCRIPTION:
00-07
vccOND-----+-
vpp
cE~-----r-----------t----~1
OE-·--I----I---+L~~
ST.
AO-A18
==========~)I
23-2
SYMBOL
PIN NAME
AO-A18
Address Input
00-07
Data Input/Output
CE
Chip Enable Input
OE
Output Enable Input
VPP
Program Supply Voltage
VCC
Power Supply Pin (+5V)
GND
Ground Pin
A3
A2
A2
AO
00
01
Q2
GND
03
Q4
05
06
QL
eE
@l
OE
IYIATM
MACRONIX. INC.
v.
PACKAGE INFORMATION
----
IVIArM
MACRONIX, INC.
28-PIN CERDIP(MSI) WITH WINDOW (600 mil)
28
ITEM
MILLIMETERS
INCHES
A
37.69 max
1.485 max
.073 ± .012
B
1.85 ± .30
C
2.54 [TP]
.100 [TP]
D
.46 ± .05
.018 ± .002
E
33.02
1.300
F
1.40±.05
.055 ± .002
G
3.43 ± .38
.135 ± .015
H
.96 ± .43
.038± .017
4.87
.198
15.48±.13
.610 ± .005
K
13.38 ±.38
.527± .015
L
.25± .13
.010± .005
M
0_15"
0-15"
N
07.11
0.280
NOTE: Each lead centerline is located within
.25
maximum material condition.
28-PIN PLASTIC DIP (600 mil)
ITEM
MILLIMETERS
37.34 max
B
2.03 [REF]
.080 [REF]
C
2.54 [TP]
.100 [TP]
INCHES
.018 [Typ.]
'1.470 max
D
.46 [Typ.]
E
32.99
1.300
F
1.52 [Typ.]
.060 [Typ.]
G
3.30± .25
.130 ± .010
H
.51 [REF]
.020 [REF]
K
M
NOTE:
3.94 ± .25
.155 ± .010
5.33 max.
.210 max.
15.22 ± .25
.600 ± .010
13.84 ± .25
.545 ± .010
.25 [Typ.]
.010 [Typ.]
[:::~:::I
~
.
Each lead centerline is located within .25
mm[.01 inch] of its true position [TP1 at a
maximum material condition.
A
1:1
)l"
~MKIW~~
l- ~~~E ~ C~=1B
----i
mm[.01 inchJ of its true position (TP] at a
A
15
-~__
!1
--....1 \. . . . .
M
28-PIN PLASnC SOP (450 mil)
ITEM
MILUMETERS
INCHES
A
18.42 max.
.725 max.
B
.71 [REF]
.028 [REF]
C
1.27 [TP)
.050 [TP]
D
.41 [Typ.)
.016 [Typ.)
E
.10 min.
.004 min.
F
2.79 max.
.110 max.
G
2.36± .13
.093±.005
H
10.30± .25
.406±.010
I
7.49 ± .13
.295± .005
J
1.42
.056
K
.25 [Typ.)
.010 [Typ.)
L
.76
.030
NOTE:
Each lead cente~lno Is located wiIhIn .25
mm[.01 Inch! 0/ Ita truo poeitton [TPJ at 0
maxtmum material condition.
15
28
1[0: : : : : :: : : : :
~
~~
0
C
INCHES
ITEM
MILUMETERS
42.26 max
1.665 max
B
1.90± .38
.075± .015
C
2.54[TP)
.100[TP)
D
.46 [REF]
.018 [REF]
E
36.07
1.500
F
1.42 [REF]
.056 [REF]
G
3.43± .38
.135±.015
H
.98±.43
.036± .017
I
4.08
.160
J
5.00
.203
K
15.58± .13
.614± .005
L
13.20± .36
.520± .015
M
.25 [REF)
.010 [REF]
N
88.12
8.320
NOTE:
1~1
~,g
32·PIN CERDIP (MSI) WITH WINDOW (600 mil)
A
]I
Each lead centeliine is located within .25
mm[.01 inch! of Ita true posilloo [TP! at •
maximum material condition.
2
B
E
~~
L
ITK
----
IUAn.
MACRONIX, INC.
32-PIN PLASTIC DIP (600 mil)
ITEM
MILLIMETERS
A
42.13 max.
1.660 max.
B
1.90 [REF]
.075 [REF]
C
2.54[TP]
.100 [TP]
D
.46 [Typ.]
.Q18 [Typ.]
E
38.07
1.500
INCHES
F
1.27 [Typ.]
.050 [Typ.]
G
3.30± .25
.130± .010
H
.51 [REF]
.020 [REF]
3.94± .25
.155± .010
J
5.33 max.
.210 max.
K
15.22 ± .25
.6oo± .010
L
13.97± .25
.550 ± .010
M
.25 [Typ.]
.010 [Typ.]
NOTE:
Each lead centerline is located within .25
mm[.01 inch] of its true position [TP] at a
maximum material condition.
32-PIN PLASTIC SOP (450 mil)
ITEM
MILLIMETERS
INCHES
A
20.95 max.
.825 max.
B
1.00 [REF]
.039 [REF]
C
1.27 [TP]
.050[TP]
D
.40 [Typ.]
.016 [Typ.]
E
.05 min.
.002 min .
F
3.05 max.
.120 max.
G
2.69±.13
.1OS± .005
H
14.12± .25
.SS6± .Q10
11.30±.13
.445± .005
1.42
.056
.20 [Typ.]
.008 [Typ.]
.79
.031
K
L
NOTE:
Each lead centerline is located within .25
mm[.Ol inch) of its true position [TP) at a
maximum material condition.
17
32
11:0: : : : : : : :: : : : : : :11
1.1
1:1
H
~
~t91lJf- 'gtIT
,
---1 ~
0
r-
B
C
3
E
-j
K
32-PIN PLASTIC LEADED CHIP CARRIER (PLCC)
r----~
ITEM
MILLIMETERS
INCHES
A
12.44 ± .13
.490 ± .005
B
11.50±.13
.453 ± .005
c
14.04±.13
.553 ± .005
0
E
14.98 ± .13
.590± .005
1.93
.076
F
3.30± .25
.130 ± .010
G
2.03± .13
.080 ± .005
-jl
i L - - _ B__
:14
132
30'
I'n"nch-"r·
'~
1
n
~---T
9~f--~-+~--~25
[
H
.51 ±.13
.020± .005
I
1.27 [Typ.]
.050 [Typ.]
[C
J
.71[REF]
.028[REF]
13[
K
.46 [REF]
.018 [REF]
L
10.40112.94
(W) (L)
.4101.510
(W) (L)
M
.89 R
.035 R
N
.25 (TYP.)
.010 (TYP.)
NOTE:
__A_ _· _ _ I
I
J
,::J
::J21
~ 1.-,
U
14
U
I
Ie
I
ID
I
J
I
u ~~ __:......L
17
20
'I'L{~t"
I
- J[ J
Each lead centerline ;s located within .25
I~I~J-.
mm[.Ol inch] of its true position (TP] at a
maximum material condition.
.
M
J--
L
32-PIN PLASTIC TSOP
ITEM
MILLIMETERS
INCHES
A
20.0± .20
.078± .006
B
18.40± .10
.724 ± .004
C
8.20 max.
.323 max.
0
0.15 [Typ.]
.006 [Typ.]
E
.80 [Typ.]
.031 [Typ.]
F
:20±.10
.008± .004
G
.30±.10
.012± .004
H
.50 [Typ.]
.020 [Typ.]
I
.45 max.
.018 max .
J
0- .20
0-.008
K
1.00± .10
.039 ± .004
L
1.27 max.
.050 max.
M
.50
.020
N
19.00
.748
0
0-5
.500
NOTE:
A
B
I I
-.
I
I
JII
II"
~
o.Lc#(
T
Each lead centerline I::> located within .25
mm[.01 inch] of its true position [TP] at a
maximum material condition.
4
E
I
I to
M
N
(~DDDDDDD~eDD~P;J
-1,--- .--li--F
G
I--J.j
I
J
IYIATM
MACRONIX, INC.
4G-PIN CERDIP (MSI) WITH WINDOW (600 mil)
ITEM
MILLIMETERS
INCHES
A
53.34 max.
2.100 max.
B
1.85± .30
.073± .012
C
2.54 [TP]
.100 [TP]
D
.46 ± .05
.Q18 ± .002
E
48.22
1.900
F
1.40±.05
.055± .002
G
3.43 ± .38
.135±.015
H
.94 ±.41
.037± .016
5.00
.197
K
15.51 ± .08
.611 + .003
14.82± .38
.584 ± .015
L
.25 ± .13
.010± .005
M
0-15"
0-15"
<1>9.64
~.380
N
NOTE:
Each lead centerline is located within .25
mm[.01 inch] of its true position [TP] at a
maximum material condition.
40-PIN PLASTIC DIP (600 mil)
ITEM
MILLIMETERS
INCHES
A
52.54 max.
2.070 max.
B
2.03 [REF]
.080 [REF]
C
2.54 [TP]
.100 [TP]
D
.46 [Typ.]
.018 [Typ.]
E
48.22
1.900
F
1.52 [Typ.]
.060 [Typ.]
G
3.30± .25
.130± .010
H
.51 [REF]
.020 [REF]
3.94 ± .25
.155± .010
5.33 max.
.210 max.
K
15.22 ± .25
.600± .010
L
13.97 ± .25
.550± .010
M
.25 [Typ.]
.010 [Typ.]
NOTE:
Each lead centerlne is located within .25
mm[.D1 inchJ of its true position [TP] at a
maximum material condition.
5
_ATM
MACRONIX. INC.
42-PIN PLASTIC DIP (600 mil)
ITEM
MILLIMETERS
INCHES
A
52.54 max.
2.070 max.
.030 [REF]
B
0.76 [REF]
C
2.54 [TP]
.100 [TP]
D
.46 [Typ.]
.018 [Typ.]
E
50.76
2.000
F
1.27 [Typ.]
.050 [Typ.]
G
3.30±.25
.130 ± .010
H
.51 [REF]
.020 [REF]
3.94±.25
.155 ± .010
5.33 max.
.210 max.
K
15.22± .25
.SOO± .010
L
13.97± .25
.550± .010
M
.25 [Typ.]
.010 [Typ.]
t: "";:::u::;;;:;;~
I1
·
21
A
C
E
NOTE:
Each lead centerline is located within .25
mm[.01 ioch] of its true position [TP] at a
maximum material condition.
44-PIN PLASTIC SOP
ITEM
MILLIMETERS
INCHES
A
28.70 max.
1.130 max.
B
1.10 [REF]
.043 [REF]
c
1.27 [TP]
.050 [TP]
D
.40 ± .10 [Typ.]
.016±.004[Typ.J
E
.010miri.
.004 min.
F
3.00 max.
.118 max.
G
2.80 ± .13
.110± .005
H
16.04± .30
.631 ± .012
12.60
0.496
1.72
.068
K
.15±.10[Typ.]
.006 ± .004 [Typ.]
L
.BO± .20
.031 ± .008
NOTE:
c
Each lead centerline is located within .25 mm[.01
inch] of its true position [TP] at a maximum material
condition.
6
B
M
------
IYIATM
MACRONIX. INC.
44·PIN PLASTIC LEADED CHIP CARRIER (PLCC)
ITEM
MILLIMETERS
INCHES
A
17.53±.12
.690± .005
B
16.59±.12
.653± .005
C
16.59 ± .12
.653± .005
D
17.53 ± .12
.690±·.005
E
1.95
.077
F
4.70 max.
.185 max
G
2.55± .25
.100 ± .010
H
.51 min.
.020 min.
1.27 [Typ.]
.050 [Typ.]
.71 ±.10
.028± .004
K
.46±.10
.018± .004
L
15.50 ± .51
.610± .020
M
.63 R
.025 R
N
.25 [Typ.]
.010 [Typ.]
NOTE:
18
Each lead centerline is located within .25
mm[.01 inch] of its true position [TP] at a
maximum material condition.
7
23
28
IYIArM
MACRONIX, INC.
VI. DISTRIBUTION CHANNEL
--
---
IYIATM
MACRONIX, INC,
Domestic Representatives
ALABAMA
COLORADO
KANSAS
OHIO
Concord Components
Lange Sales Inc.
AEM
Midwest Marketing
1500 West Canal Court
8843 Long So.
Lenexa, KS 66215
Ph: (913) 888-0022
Fx: (913) 888-4848
5001 Mayfield Road, Suite 212 Lyodhurst,OH
44124
Ph: (216) 381-8575
Fx: (216) 381-8857
190 Limc Quany Road,Ste. 102
Madison, AL 35758
Ph: (205) 772-8883
Fx: (205) 772-8262
CALIFORNIA
Building A - Suite 100
Littleton, CO 80120
Ph: (303) 795-3600
Fx: (303) 795-0378
FLORIDA
MARYLAND
Midwest Marketing
BAE Sales Inc.
Beacon North
2001 Galeway Pilla: Suite 315W
San Jose, CA 95110
Ph: (408) 452-8133
Fx: (408)452-8139
VGSal..
100 I NW 62nd Street
Suite 205
Fe. Laudenlale, FL 33309
Ph: (305) 938-4333
Fx: (305) 938-4331
(BOO) 654-8287
8513 Loceme Road
Randallstown,MD 21133
Ph: (703) 478-2480
Fx: (703) 435 -7115
30 Marco Lane
Daytoo, OH 45458
Ph: (513) 433-2511
Fx: (513)433-6853
BAE Sales Inc.
9119 Eden Oak Circle
Loomis, CA 956SO
Ph: (916) 652-6m
Fx: (916) 652-5678
Littlefield & Smith Assoc.
11230 Sorrento Valley Road, Ste. 115
San Diego, CA 92121
Ph: (619) 455-0055
Fx: (619)455-1218
VG Sales
407 Whooping Loop
Suite 1655
Altamonte Springs, FL 32701
Ph: (407) 831-8688
Fx: (407) 831-0305
(BOO) 228-8088
VG Sales
Spectrum Rep. Co.
31368 Via Co1inas, Suite \01
Wesdake Village, CA 91362
'Ph: (818) 706-2919
Fx: (818) 706-2978
7901 4th Street North
Suite 202
St. Petersburg, FL 33702
Ph: (813) 576-0020
Fx: (813) 579-9905
Spectrum Rep. Co.
VGSaies
25 Maucbly, Suite 311
Irvine, CA 92718
Ph: (714) 453- 1525
Fx: (714) 453- 1925
POBOX 3431
CANADA
Kayronics Inc.
5BOO ThimeJlll Blvd.
Ville St-Laweot, Quebec
H4SIS5
Ph: (514) 745-5BOO
Fx: (514) 745-5858
Kaytronics Inc.
40S Britannia Rd. E. #206
Mississauga. Ontario
L4Z3E6
Ph: (416) 507-6400
Fx: (416) 507-6444
CONNECTICUT
1570 McDaniel Drive
West Chester, PA 19380
Ph: (215) 692-6853
Fx: (215) 692-6873
41100 Bridge St.
Novi,MI 480375-1300
Ph: (810) 615-4000
TEXAS
4445 Alpha Road, Ste. 109
Dallas, 17t 75244
Ph: (214) 233-5744
Fx: (214) 702-0993
Marlna Staaon
MISSOURI
Thorson Co.
Mataguez, PR 00681
Ph: (809) 831-40SO
Fx: (809) 831-4250
Mendez Vigo So. #69, S 601
Mayaguez, PR 00680
AEM
14515 Briarhills Pkwy., Ste. 116
Houston, TX 77077
Ph: (713) 558-8205
Fx: (713) 558-7359
11520 Chas Rock Road
So. Louis. MO 63044
Ph: (314) 298-9900
Fx: (314) 298-8660
Thorson Co.
GEORGIA
NEW JERSEY
Concord Components
Metro Logic
271 Route 46 West
SuiteD-202
Fairfield, NJ 07006
Ph: (201) 575-5585
Fx: (201) 575-8023
Quest Marketing
NEW YORK
301 Southwest GradyWy.
Renton, WA 98055
Ph: (206) 228-2660
Fx: (206) 228-2916
Metro Logic
INDIANA
271 Route 46 West
SuiteD-202
Fairfield, NJ 07006
Ph: (201) 575-5585
Fx: (201) 575-8023
Arete Sales Inc.
2260 Lake Ave., Ste 250
Fe. Wayne, IN 46805
Ph: (219) 423-1478
Fx: (219) 4:zo..144O
ILLINOIS
Reagan/Compar
3301 Countly Club Rd, Ste. 2211
Boowell, NY 13760
Ph: (607) 754-2171
Fx: (607) 754-4270
8711 BumetRoao,Ste.A-12
Austin, TX 78758
Ph: (512) 467-2737
Fx: (512)467-0605
UTAH
Lange Sales
772 E. 3300 South Street, Ste. 205
Salt Lake City, UT 84106
Ph: (801)487-0843
Fx: (810) 484-5408
VIRGINIA
Beacon North
103-F Calpenter Drive
Sterling, VA 22170
Ph: (703) 478-2480
Fx: (703)435-7115
WASHINGTON
Quest Marketing
301 Southwest Grady Way Suite A-3
MartanInc.
N & S CAROLINA
1930 Thoreau Dr., Ste 167
Schaomburg, IL 60173
Ph: (708) 303-5660
Fx: (708) 303-5745
Quantum
4600 Parlt Road, Ste 300
Rentoo, WA 98055
Ph: (206) 228-2660
Fx: (206) 228-2916
Charlote, NC 28209
Ph: (704) 523-8822
Fx: (704) 527-5817
Martanlnc.
Datamark
2514 Boston Post Road
Guilford, cr 06437
Ph: (203) 453-0575
Fx: (203)453-5935
TCAlnc.
Thorson Co.
IDAHO
K2K2E2
Ph: (613) 564-0080
Fx: (613) 592-0373
PENNSYLVANIA
MICHIGAN
Rathsburg Assoc.
8030 Cedar Ave .. Suite 114
Minneapolis, MN 55425
Ph: (612) 854-1166
Fx: (612) 854-6799
Kaytronics Inc.
Kaytronics Inc.
300 March Road, #303
Kanata, Ontario
22 Green So.
Waltham. MA 02154
Ph: (617) 890-6790
Fx: (617) 899-0619
MINNESOTA
6815-8th Street NE 1179
caIgary, A1ber1a
Fx: (604) 294-4585
Quest Marketing
6700 SW 105 Street, Ste. 206
Beavcnon. OR 97005
Ph: (503) 641-7377
Fx: (S03) 641-2899
George Russell & Associates
6048 Tracy Valley Drive
Norcross, GA 30093
Ph: (404) 416-9597
Fx: (404) 441-0790
T2E7H7
Ph: (604) 294-2000
OREGON
MASSACHUSETTS
Eastern Micro
IOWA
AEM
4001 Shady Oak
Marion,lA 52302
Ph: (319)377-1129
Fx: toAEM (319) 377-1539
Quantum
6604 Six Furks Road, Ste 102
Raleigh, NC 27615
Ph: (919) 846-5728
Fx: (9191 847-8271
WISCONSIN
11431 N. Port Washington, Ste. 201 Mequin,
WI 53092
Ph: (414) 241-4955
Fx: (414) 241-8365
-----
IYIATM
MACRONIX. INC.
Domestic Distributors
ALABAMA
NU Horizons
4801 University Sq.. SIC.
Huntsville, AL 35816
Ph: (205) 722·9330
Fx: (205) 722-9348
CALIFORNIA
AVED
1582 Parkway Loop, Unit G
Thstln, CA 92680
Ph: (714) 259·8258
Fx: (714) 259·0828
AVED
5752 Oberlin Drive, Ste. lOS
San Diego, CA 92121
Ph: (619) 558·8890
Fx: (619) 558·3018
Western Micro Technology
6837 Nancy Ridge Drive
San Diego, CA 92121
Ph: (619)453-8430
Fx: (619) 453-1465
Milgray/Los Angeles
912 Pancho Road Ste. C
Camarillo, CA 93012-3508
Ph: (805) 484-4055/(800) 635-7812
Fx: (805) 388-8169
MilgraylNo. California
2860 Zanker Road Ste 209
San Jose, CA 95134
(408) 456-0900/(800) 442·0946
Fx: (408) 456·0300
I.E.C.
420 E. 58th Ave.
Denver, CO 80216
Ph: (303) 292-5537
Fx: (303) 292-0114
FLORIDA
All American
16085 NW 52nd Ave.
Miami, FL 33014
Ph: (305) 621·8282
Fx: (305) 62()..~831
All American
MARYLAND
Vantage Components
Sunrise, FL 33351
Ph: (305) 572·7999
Fx: (305) 749·9229
6925 R. Oakland Mills Road
Columbia, MD 21045
Ph: (301) 72()'5100
NU Horizons
3421 N. West 55 Street
Fe. Lauderdale, FL 33309
Ph: (305) 735·2555
Fx: (305) 735·2880
NUHorizons
8975 Guilford Road
Suhe 120
Columbia, MD 21046
Ph: (301) 995·6330
MilgraylWashington
6460 Dobbin Rd. Ste. 0
Columbia, MD 21045·5813
Ph: (410) 730-61191(800) 638·6656
Fx: (410) 730·8940
Milgray/Orange County
16 Technology Odve Ste. 206
Irvine, CA 92718·~329
Ph: (714) 753·12821(800) 562·3118
Fx: (714) 753·1682
Pacific Coast Electronics
lACO Electronics
lACO Electronics
2282 Towngate Road, Ste. 100
564 Hillside Ave.
B.C. Canada
Westlake Village, CA 91361
Ph: (805) 495·9998
Fx: (805) 494-3864
V8T IY9
Ph: (604) 385·5111
Fx: (604) 382·6243
9900 W. Sample Rd.
Suite 404
Coral Spring, FL 33065
Ph: (305) 341·8280
Fx: (305) 341·7848
lACO Electronics
MilgraylMontreal
6600 Trans Canada Hwy Ste 209
Merit Electronics
CANADA
Pointe Claire, QUE
H9R4S2
Ph: (514) 426-5900·
Fx: (514) 426 5836
Milgraylforonto
2783 Thamesgate Drive
Mississauga, ONT
lAT IG5
Bell Micro
18350 Mt. Langley
Fountain Valley, CA 92708
Ph: (714) 963·0667
Ph: (416) 678·0953
Fx: (416) 678·1213
lACO Electronics
Milford Plains Office Park
326 W. Main Street
CONNECTICUT
Milgray/Connecticut
2880 Zanker Rd. Sle. 102
San Jose, CA 95143
Ph: 432·9290
Fx: 432-9298
MilgraylFlorida
735 Rinehart Rd Ste. 100
Lake Mary, FL 32746
Ph: (407) 321·2555/(800) 367·0780
Fx: (407) 322·4225
GEORGIA
2070 Ringwood Ave.
San Jose, CA 95131
Ph: (408) 434·0800
Fx: (408) 434·0935
KANSAS
Milgray/Kansas City
6400 Glenwood Ste 313
Overland Park, KS 66202
Ph: (913) 236·88001(800) 255-6576
Fx: (913) 384-6825
5009 Hiatus Road
Bell Micro
t941 Ringwood Avenue
San Jose, CA 95131
Ph: (408) 451·9400
Fx: (408) 451·1699
1541 Parkway Loop, Unit A
Thstin, CA 92608
Ph: (714) 258-9003
INDIANA
RMlnc.
1329 W. 96th So., Ste. #1
Indianapolis, IN 46260
Ph: (317) 580-9999
Milford, CT 06460-0418
Ph: (203) 878·55381(800) 922·6911
Fx: (203) 878-6970
Western Micro Technology
COLORADO
12900 Saratoga Ave
AVED
Saratoga, CA 95070
Ph: (408) 725·1660
Fx: (408) 255-6491
4090 Younfield Street
Wheat Ridge. CO 80033
Ph: (303) 422·1701
Fx: (303) 422·2529
Western Micro Technology
1637 North Brian Street
lACO Electronics
Oranee. CA 92667
Ph: (714) 637·0200
Fx: (714) 998·1883
695 Pierce SI., Ste. I IO
Eric, CO 80516
Ph: (303) 828·3074
Fx: (303) 828·3080
NUHorizons
5555 Oakbrook Pkwy. #340
Norcross. GA 30093
Ph: (404) 416·8666
Fx: (404) 416·9060
Milgray/Atlanta
3000 Northwoods Pkwy Ste. 115
Norcross, GA 30071·1545
Ph: (404) 446·97771(800) 241-5523
Fx: (404) 446·1186
ILLINOIS
QPS Electronics
14291 E. Founh Ave.
Ph: (818) 707·0731
Fx: (818) 706·7651
Suite 208
Aurora. CO 800 11
Ph: (303) 343 ·9260
Cronin Electronics
77 4th Avenue
Needham, MA 02194
Ph: (617)449-5000
Fx: (617)444-8395
NU Horizons
107 Audubon Road
Wakefield, MA 01880
Ph: (617) 246·4442
Vantage
17A Sterling Road
Billerica. MA 01862
Ph: I (800) 552-4305
QPS Electronics
101 E. Conmmerce Drive
Schaumburg, IL 60173
Ph: (708) 884·6620
Fx: (708) 884·7573
Western Micro Technology
20 Blanchard Road
Burlington. MAOl803
Ph: (617) 273·2800
Fx: (617) 229·2815
I.E.C.
220 N. Stoning Ave.
Hoffman Estates, IL 60 195
Ph: (708) 843·2040
Fx: (708) 843·2320
Milgray/Chicago
Kennedy Corporale Ctr. ISle. 3 IO
1530 E. Dundee Road
Western Micro Technology
28720 Roadsie Drive Sle. 175
Agouf'd Hills. Ca 91301
MASSACHUSETTS
Bell Micro
16 Upton Drive
Willington, MA 01887
Ph: (617) 658-0222
Palaline, IL 60067·8319
Ph: (708) 202·19001(800) 322·6217
Fx: (708) 202·1985
MilgraylNew England
Ballardva1e Park
187 Ballardvale St.
Wilminglon. MA 01887-1064
Ph: (5U8) 657 -6900/(8(XJ) 648· 3595
Fx: (508)658·7989
MICHIGAN
RM Electronics
43 IO Roger B. Chance BlVd.
Grand Rapids. MI 49548
Ph: (616) 531·9300
Fx: (616) 531-2990
IVIATM
MACRONIX, INC.
MISSOURI
Vantage
Bell Micro
NU Horizons
1056 W. Jerico Thmpike
26 Bald Eagle Drive
KendelJ, MO 14476
Ph: (716) 292·0777
Smithtown, NY 11787
100 N. Central Expressway, Ste. 502
Richardson. TX 75080·5300
Ph: (214) 783·4191
Fx: (214) 234-2123
Ph: (516) 543-2000
Fx: (516) 543-2030
NEW JERSEY
MilgraylNew York
JACO Electronics
Vantalge Components
77 Schmin Blvd.
Farmingdale, NY 11735-1410
Ph: (516) 391-3IXXII(800) M1LGRAY
Fx: (516) 420-0685
1209 N. OJenviUe Drive
Richardson, TX 75081
Ph: (214) 234-5565
Fx: (214) 238·7008
MilgraylUpstate NY
OMNI Pro Electronics
59 Manchester Road
SewelJ, NJ 08080
Ph: (410) 995·6620
Fx: (410) 995·6032
One Corporate Place Ste. 200
1170 Pinsford Victor Rd.
Pittsford, NY 14534-3807
Ph: (716) 381-97001
Fx: (716) 381-9493
3220 Commander Drive
Carroltoil, TX 75006
Ph: (214) 713·9000
NUHorizons
N & S CAROLINA
1056 W. Jerieho Thrnpike
Smithtown, NJ 07013
Ph: (201) m·4100
Fx: (201) 777·6194
JACOPAINJ
39 U.S. Route 46
Pine Brook. NJ 07058
Ph: (201) 882-8300
NU Horizons
2002 C. Green Tree
Exec. Campus
Marllon, NJ 08053
Ph: (609) 596-1833
Gel
245-0 Clinon Ave.
West Berlin, NJ 08091
Ph: (609) 768-6767
Fx: (609) 768-3649
Western Micro Technology
4 A Eves Drive
Marllon, NJ 08053
Ph: (609) 596-7775
Fx: (609) 985-2797
MilgraylDelaware Valley
3001 Greentree Exec. Campus Ste. C
Marlton, NJ 08053-1551
Ph: (609) 983-50101(800) 257-7111
Fx: (609) 985-1607
Milgray/Raleigh
2925 Hunllelgh Drive Ste. 101
Raleigh, NC 27604-3374
Ph: (919) 790-80941(800) 5652-3118
Fx: (919) 872-8851
OHIO
CAMRPC
749 Miner Road
Cleveland, OH 44143
Ph: (216)461-4700
Fx: (216)461-4329
NUHorizons
6200 Som Center Road, Ste. A 15
Solon, OH 44139
Ph: (216) 349-2008
Fe: (216) 349-2080
Milgray/Cleveland
6155 Rockside Rd Ste. 206
Clevelaad OH 44131-2289
Ph: (216) 447-15201(800) 321-0006 OS
(800) 362-2808 OHIO
Fx: (216) 447-1761
OREGON
MilgraylHouston
12919 SW Freeway Ste. 130
Stafford, TX 77477-4113
Ph: (713) 240-53601(800) 962-1849
Fx: (713) 240-5404
MilgraylDaUas
16610N. Dallas Pkwy. Ste. 1300
DaUas, TX 75248-2617
Ph: (214) 248-16031(800) 637-7227
Fx: (214) 248-0218
UTAH
A.V.E.D.
942 E. 7145 S. Ste. A-101
West VaUey, UT 84119
Ph: (801) 975-9500
.Fx: (801) 977-0245
MilgraylUtah
310 E4500s Ste. 110
Murray, UT 84107
Ph: (801) 261-2999/(800) 837-9739
Fx: (801) 261-ll880
WASHINGTON
I.E.C.
1750-124th Ave., NE
BeUevue, WA 98005
Ph: (206) 455-2727
I.E.C.
MilgraylNew Jersey
1055l'l1rsippany Blvd. Ste. 102
Parsippany, NJ 07054-1273
Ph: (201) 335-1766/(800) 622-0291
Fx: (201) 335-2110
NEW YORK
JACO
145 Oser Avenue
Hauppauge, NY 11788
Ph: (516) 273-5500
Fx: (516) 273-5528
NUHorizons
6OCX) New Horizons
Blvd.
Amityville, NY 11701
Ph: (516) 226-6000
Fx: (516) 226-5886
NU Horizons
100 Bluff Drive
East Rochester, NY 14445
Ph: (716) 248-5980
6850 SW 100th Ave., Ste. 8
Beaverton, OR 97005
Ph: (503) 641-1690
Western Micro Technology
1800 NW 169th Place Suite B-300
Beavenon, OR 97006
Ph: (503) 629-2082
Fx: (503) 629-8645
PENNSYLVANIA
CAMRPC
620 Alpha Drive
Pinsburgh, PA 15238
Ph: (412) 782-3770
Fx: (412) 963-6210
TEXAS
AU American
1819 Finnan Drive. Ste. 127
Richardson, TX 75081
Ph: (214) 231-5300
Fx: (214)437-0353
Radar Electronics
168 Western Ave. West
Seanle, WA 98119
Ph: (206) 282-2511
Fx: (206) 282-1598
Western Micro Technology
Continental Plaza Building
550 Kirkland, Way Ste. 100
Kirkland, Wa 98033
Ph: (206) 828-2741
Fx: (206) 828-2719
IYIAlM
MACRONtX. INC.
International Distributors
JAPAN
NKK Corporation
2-6-3 HitOlSUbashi. a1iyoda-Ko
Tokyo 101. Japan
Ph: (03) 3217-3127
Fx: (03) 3217-3148
SINGAPORE
Valour Marketing Ph: (PIll) LTD.
BLK 300S. UBIAVENUE3. #03-88
Singapore 1440
Ph: (65) 7489879
Fx: (65) 7432931
THE NETHERLANDS
Force Technologies Ltd.
Uni118. Campbell Court. Bramley
Basingstoke. Hants.
RG26 5 EG United Kingdom
Ph: 2568-80788
Fx: 2568-80307
HY Associates Coo. Ltd_
DENMARK
1-10. Seklmacl1i-Kita 3 Olome.
Nerima-Ko Tokyo 177. Japan
Ph: (03) 3929-7111
Fx: (03) 928-0301
Ditz Schweitzer A-S.
Alcorn Electronics BV
Vallensbalvej 41. 2605 - Brondby
Singel3
2S50 Kootich
Belgium
Ph: (03) 458-3033
Fx: (03) 458-3126
HONG KONG
Denmark
Ph: (45) 4245-3044
Fx: (45) 4245-9206
UNITED KINGDOM
Alcorn Electronics BV
Essebaan 1. 2908 LJ Capelle NO ljssel
Holland
Ph: (010) 451-9533
Fx: (010) 458-6482
BELGIUM
Silicon Concepts Ltd.
ltee Lyochborongh Road. Pas,field
Hampshire
GU30 7SB. United Kingdom
Ph: 4287-51617
Fx: 4287-51603
RTI Industries Coo. Ltd_
ITALY
Room 402. Nan Fang Commercial Centre
No. 19. Lam Lok Street
Kowloon Bay, Kowloon,
Hong Kong
Ph: (852) 795-7421
Fx: (852) 795-7839
ESCO Italian. S.P_A
SWEDEN
ISRAEL
Viale F.1li Casiraghi. 355
20099 Sesto S. Giovanni
Milan, Italy
Ph: (02) 240-9241
Fx: (02) 240-92S5
Titan Electronics AB.
EL-GEV Electronics
P.O. Box 92047. S-12007 Stockholm
Sweden
Ph: (46)8-644-7260
Fx: (46)8-642-2939
Building 101 P.O.B. SO
Tim Ychuda
73175 Israel
Ph: 972-3-971-2056
Fx: 972-3-971-2407
KOREA
E-ONE Corporation
#1618. Korea Busi.... Center
1338-21. Sencho-Dong. Sencho-Ku.
Seoul. 137-070. Korea
Ph: (02) 569-3789
GERMANY
Beck GMBH & CO_
Electronik Bauelemente KG
Eltersdorfer Stree~ 7. D-85oo
Nurenberg. Germany
Ph: (49) 911-3-4050
Fx: (49) 911-3-40528
Miko Komponent AB.
P.O_ Box 2001. S-14S02 Norsborg
Sweden
Ph: 7538-9080
Fx: 7537-5340
The information that appears in this document has been checked and is believed to be reliable. Macronix, however,
will not be responsible for any loss or damage which will result from the use of the information contained herein.
Macronix makes no representation or warranty concerning the accuracy of sale_ Macronix will not extend its warranty on any product beyond that set forth in its standard terms, patent, or other licence implied hereby. Macronix reserves
the right to make changes in its products without notification which may make the information contained in this document obsolete or inaccurate. Contact Macronix for the latest information regarding these products_
I
fM
MACRONIX INC.
1348 Ridder Park Drive
San Jose, CA 95131 USA
TEL:(408) 453-8088
FAX:(408) 453-8488
MACRONIX INTERNATIONAL CO ., LTD
3F, 4 Creation Road IV
Hsin-Chu Science-Based Industrial Park
Hsin-Chu city, Taiwan , R.O.C.
TEL:(035) 783-333 FAX:(035) 778-689
TAIPEI OFFICE
Room 223 , 2F , 144, Sec. 3, Min-Chuan E. Rd .,
Taipei, Taiwan, R.O.C.
TEL:(02) 719-1977
FAX:(02) 712-7359
MACRON IX JAPAN K.K.
2-6-3 Hitotsubashi, Ch iyoda-Ku
Tokyo 101 , Japan
TEL: (03) 3217-3127
FAX:(03) 3217-3147
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