1993_Motorola_Linear_Interface_ICs_Vol_1 1993 Motorola Linear Interface ICs Vol 1

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Volumes
II
I

Index and Cross Reference

I

Amplifiers and Comparators

I

Power Supply Circuits

I

Power/Motor Control Circuits

II

Voltage References

II

Data Conversion

II

Interface Circuits

II

•
•..

Communication Circuits •

II
Automotive Electronic Circuits III
Other Linear Circuits III

II

Consumer Electronic Circuits

II
II
II

I

Surface Mount Technology

II

I

Packaging Information
I

II
II

mil
AppJications and Product Literature III
)Quality and Reliability Assurance

What's Different
New Additions '
CHAPTER 2
MC33076
MC33201/2/4
MC33304
MC33102
ADDENDUM

CHAPTER 3
LP2950/51
MC33267
MC33269
MC34023
MC34025
MC34065-H,-L
MC34067
MC34152
MC34161
MC34165
MC34167
MC34261
MC34268
MC34360
MC34361
UC38428,43B
UC38448,458
HB206 MANUAL
CHAPTER 4
UAA2016

CHAPTERS
TL431,A,8
CHAPTER 6
MC10322
MC10324

CHAPTER 7
MC14C888
MC14C898,A8
MC34055
MC34142
MC751728/1748

CHAPTERS
MC13135/136
MC13155
MC13156
MC13173
MC13175
MC3371/72
* MC33110
* MC33121
* MC33218
ADDENDUM

'See Telecommunications Device Data (DL 136)

.
CHAPTER 9
MC1388
MC13007
MC13017
MC13025
MC13077
MC44001
MC44011
MC44144
MC44145
MC44301
MC44302
MC44615A
MC44802A
MC44807/817B
CHAPTER 10
MC3392
MC33091
MC33092
MC33192
MC33293
MC33295
MC33298
MCCF33093
MCCF33094
MCCF33096
MCCF79076

Deletions
LF355,B
LM 108,Al208,Al308,A
LM 109/209/309
LM148
LM193,A
MC1382
MC1383
MC1384
MC1414/1514
MC 1439/1539
MC 1454G/1554G
MC1456/1556
MC 14588115588
MC1466L
MC1590G

MC1709,A,C
MC17418,8C
MC3357
MC3397T
MC3440A/41 A
MC3446A
MC10318P
MC 10320/20-1
MC13010
MC13023
MC13041
MC33034
MC33153/34153
MC34013A
MC34063/33063/35063

MC35181/182/184
MC44802
MC75125/127
MC75128/129
MC8T28
MC8T95
MC8T96
NE592/8E592
OP-27
8G1525A127 A;2525A127 A
TDA1524A
TDA3330
TDA4601
TL061
ULN2074B

New Product Literature (Referenced)
AN1046
ANi 077

AN1122
AN1203

AN1510

MOTOROLA

LINEAR/INTERFACE
ICs DEVICE DATA
This publication presents technical information for the broad line of Linear and Interface Integrated Circuit
products. Complete device speCifications are provided in the form of Data Sheets which are categorized by product
type into ten chapters for easy reference. Selector Guides by product family are provided in the beginning of each
Chapter to enable quick comparisons of performance characteristics. A Cross Reference chapter lists Motorola
nearest replacement and functional equivalent part numbers for other industry products.
A chapter is provided to illustrate Package Outline and includes information on Surface Mount Devices (SMD).
Additionally, chapters are provided with information on Quality program concepts, high-reliability processing,
and abstracts of available Technical Literature.
The information in this book has been carefully checked and is believed to be accurate; however, no responsibility
is assumed for inaccuracies.
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no
warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does
Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims
any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and
do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer
application by customer's technical experts. Motorola does not coovey any license under its patent rights nor the
rights of others. Motorola products are not designed, intended, or authorized for use as components in systems
intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other
application in which the failure of the Motorola product could create a situation where personal injury or death may
occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer
shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges
that Motorola was negligent regarding the design or manufacture of the part. Motorola and @ are registered
trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

Series H
First Printing
© MOTOROLA INC., 1993
Previous Edition © 1990
"All Rights Reserved"
Printed in U.S.A.

New Product Literature
Chapter 2 has an addendum providing applications information on operational
amplifiers.
The applications information which formerly appeared in the Motorola
LinearlSwitchmode Voltage Regulator Handbook (HB206) is now included as an
addendum to Chapter 3.
An addendum covering RF applications information has been added to Chapter 8.
The Surface Mount Technology in Chapter 12 has been expanded to include
Multiple Package Quantity (MPQ) information for surface mount and TO-92
packages shipped in Tape and Reel or Ammo Pack Styles. Mechanical Polarization
drawings for the TO-92 (TO-226AA) in tape and reel plus the ammo pack styles
have also been added to Chapter 12.

Data Classification
Product Preview
This heading on a data sheet indicates that the device is in the formative stages or
in design (under development). The disclaimer at the bottom of the first page reads:
"This document contains information on a product under development. Motorola
reserves the right to change or discontinue this product without notice."

Advance Information
This heading on a data sheet indicates that the device is in sampling,
pre-production, or first production stages. The disclaimer at the bottom of the first
page reads: "This document contains information on a new product. Specifications
and information herein are subject to change without notice."

Fully Released
A fully released data sheet contains neither a classification heading nor a disclaimer
at the bottom of the first page. This document contains information on a product in
full production. Guaranteed limits will not be changed without written notice to your
local Motorola Semiconductor Sales Office.

C-QUAM®, DeSigner's, MDTL, MECL, MECL 10,000, MONOMAX, MOSAIC®, MRTL,
MTIL, MOSFET, SENSEFET, SLEEP-MODE, SMARTMOS, Switchmode, and
ZIP-R-TRIM® are trademarks of Motorola Inc.

ii

Index and Cross Reference

In Brief . ..
Motorola linear and interface integrated circuits cover a
much broader range of products than the traditional op
amps, regulators and consumer-image associated with
linear suppliers. Linear circuit technology currently
influences the design and architecture of equipment for all
major markets. As with other integrated circuit technologies,
linear circuit design techniques and processes have been
continually refined and updated to meet the needs of these
diversified markets.
Operational amplifiers have utilized JFET inputs for
improved performance, plus innovative design and trimming
concepts have evolved for improved high performance and
precision characteristics. In linear power ICs, basic voltage
regulators have been refined to include higher current levels
and more precise three-terminal fixed and adjustable
voltages. The power area continues to expand into switching
regulators, power supply control and supervisory circuits,
and motor controllers.
Linear designs also offer a wide array of line drivers,
receivers and transceivers for many of the EIA, European,
IEEE and IBM interface standards. Periphfiral drivers for a
variety of devices are also offered. In addition to these key
interface functions, a variety of magnetic and semiconductor
memory read, write, sense and RAM control circuits are also
available.
In data conversion, the original A-O and O-A converters
have been augmented with high performance video speed
and multiplying designs. Linear circuit technology has also
provided precision low voltage references for use in data
conversion and other low temperature drift applications.
A host of special purpose linear devices have also been
developed. These circuits find applications in telecommications, radio, televiSion, automotive, RF communications,
and data transmission. These products have reduced the
cost of RF communications, and have provided capabilities
in telecommunications which make the telephone line
convenient for both voice and data communications. Linear
developments have also reduced the many discrete
components formerly required for consumer functions to a
few IC packages, and have made significant contributions
to the rapidly growing market for electronics iii automotive
applications.
The table of contents provides a perspective of the many
markets served by linear/interface ICs and of Motorola's
involvement in these areas.

Alphanumeric Index
AM26LS30
AM26LS31
AM26LS32
CA3054
CA3059
CA3079
CA3146
DAe-OB

LMlll
LM124
LMI39,A
LM158
LM201A
LM211
LM224

LM323,A
LM324,A
LM337
LM337M
LM339,A
LM340,A
LM348

Dual Differential/Quad Single-Ended Une Drivers
Quad Une Driver with NAND Enabled
Three-State Outputs
Quad EIA-422/423 Une Receiver
Dual Differential Amplifier
Zero Voltage Sw~ches
Zero Voltage Switches
l-Dlfferentially Connected and 3-lsolated
Transistor Arrays
High Speed 8-B~ Multiplying
D-!o-A Converter

High Performance VoRage Comparator
Quad, Low Power OperatiOnal Amplifiers
Quad, Single-Supply Comparators
Dual Low Power Operational Amplifiers
Operational Amplifier
High Performance VoRage Comparator
Quad Power Operational Amplifiers
Quad, Single-Supply Comparators
Quad MC1741

3-Terminal
Voltage Regulator
Positive Voltage Regulators
Quad, Low Power Operational Amplifiers
3-Terminal Adjustable Output Negative
Voltage Regulator
3-Terminal Adjustable Output Negative
VoHage Regulator
Quad, Single-Supply Comparators
3-Terminal Positive Voltage Regulator
Quad MC1741 Operational Amplifier

7-11
7-22
7-25
9-27
4-10
4-10
9-28
6-6
Micropower VoHage Regulators
Quad Single Supply Operational AmplHier
Quad Three-State Bus Transceiver
Hex Three-State Buffer/Inverter
Hex Three-State Buffer/Inverter
Low-Level VideO Detector
IF Amplifier
IF Amplifier and Quadrature Detector
TV Video Modulator Circuit

2-50
2-56
2-60
2-40
2-41
2-50

3-36
2-50
3-42
3-81
2-56
3-49
2-66

MC1558
MC1568
MC1594
MC1595
MC1596
MC1723,C
MC1733CB
MC1741,C
MC1747,C

Peripheral Driver Arrays
High VoHage, Intemally Compensated
Operational Amplifiers
Wideband Amplifiers
Timing Circuit
Dual Operational Amplifiers
Dual ± 15 Volt Tracking Regulator
Dual Peripheral Posiiive NAND Driver
Quad MDTL Une Driver
Quad Low Power Une Driver

2-95
11-5
2-101
3-99
7-41
7-44
7-55

Wideband Amplifier
Dual Operational Amplifier
Dual ± 15 VoR Regulator
Four-Quadrant MuHiplier
Four-Quadrant Multiplier
Balanced Modulator/Demodulator
Voltage Regulators
Dlfferential Video Wideband Amplifiers
High Pertormance Operational Amplifiers
Dual MC1741 Operational Amplifiers

2-101
3-99
11-12
11-26
3-32
3-105
2-114
2-122
2-127

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

1-2

7-28
7-33
7-33
9-30
9-36

2-91

anumeric Index
MCI748C
MC1776,C
MC26SI0
MC2830
MC2831A
MC2833
MC3301
MC3302
MC3303
MC3325
MC3334
MC3335
MC3340
MC3346
MC3356
:MC3357
MC3358
,MC3359
MC3361B
MC3362
MC3363
MC3367
MC3371
MC3372
MC3373
MC3391
MC3392

MC3432
MC3433

(continued)

Function

Page

High Performance Operational Amplifiers
Micropower Programmable Operational Amplifiers
Quad Open-Collector Bus Transceiver
Voice Activated Switch
Low Power FM Transmitter System
Low Power FM Transmitter System
Quad Operational Amplifier
Quad, Single-Supply Comparator
Quad low Power Operational Amplifiers
Automotive Voltage Regulator
High Energy Ignition Circuit
low Power Narrowband FM Receiver
Electronic Attenuator
General-Purpose Transistor Array
Wideband FSK Receiver
low Power FM IF
Dual, Low Power Operational Amplifier
Low Power Narrowband FM IF
low Voltage Narrowband FM IF
Low Power Dual Conversion FM Receiver
low Power Dual Conversion FM Receiver
Low Voltage Single Conversion FM Receiver
Low Power FM IF
Low Power FM IF
Remote Control Amplifier/Detector
Low Side Protected Switch
Low Side Protected Switch
Automotive High Side DriverSwitch
Quad Operational Amplifier
Quad low Power Operational Amplifiers "
Dual Operational Amplifier plus Dual Comparator
Continuously-Variable-Slope Delta
Modulator/Demodulator
Continuously-Variable-Slope Delta:"
Modulator/Demodulator
Telephone Une-Feed Circ~H "; i i d
Overvoltage Crowbar Sensing Gir,cuit
Power Supply Supervisory/Over, ,Undervoltage Pro!ectionCircuit ' , '"
High Speed Quad Comparator,
High Speed Quad Comparator
High Speed Quad Comparator
High Speed Quad Comparator
Hex Unified Bus Receiver
Bidirectional Instrumentation Bus Transceiver
Quad Three-State Bus Transceiver
Quad Une Receiver
Quad Une Receiver

2-131
2-135
7-66
8-42
8-46
8-49
2-144
2-56

Device
Number
MC3484S2
MC3484S4
MC3485
MC3486
MC3487
MC3488A
MC3503
MC3505
MC3517
MC3518
MC3523
MC3558
MC4558,AC,C
MC4741,C
MC6875,A
MC7800
Series
MC78l00A
Series
MC78MOO
Series
MC7900
MC79LOO,A
Series
MC79MOO
Series
MCI0319
MCI0321
MCI0322
MCI0324
MCI300lXP
MCI3007XP
MC13017

8-82
8-89
8-97
8-106
8-106
9-106
10-15
10-24
10-33
2-144
2-154
2-159

3-111
3-117

MCI3020
MCI3022
MCI3024

2-167
2-167
2-167
2-167
7-69
7-72
7-78
7-83
7-83

Function

10-36
10-36
7-134
7-139
7-142

Three-Terminal Low Current Positive
Voltage Regulators
Three-Terminal Medium Current Positive
Voltage Regulators
Three-Terminal
Three-Terminal ,Low
Voltage Regulators
Three-Terminal Negative

3-137

NTSCtpAl Chroma i 0Color TB and
Timebase Processor
C-QUAM® AM Stereo Decoder
Advanced Medium Voltage AM Stereo Decoder
Low Voltage Motorola C-QUAM®
AM Stereo Receiver
Electronically Tuned Radio Front End
Three-Ampere Positive Voltage Regulators
Wideband FSK Receiver
Mini-Watt Audio Output

Closed-Loop Brushless Motor Adapter
'See Telecommunication Device Data (OL 136)

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA
1-3

Page

Integrated Solenoid Driver
Integrated Solenoid Driver
Quad, Single-Ended Une Driver
Quad EIA-422/3 Une Receiver
Quad EIA-422 Une Driver With Three-State
Output
Dual EIA-423/EIA 2320 Driver
Quad low Poer Operational Amplifiers
Dual Operational Amplifier plus Dual
Comparator
Continuously-Variable-Slope DeHa
Modulator/Demodulator
Continuously-Variable;Slope Delta
Modulator/Demodulator
Overvoltageg;f!JWb~! ,§~n~ing Circuit
Dual, Low Power Operational Amplifier
Dual Wide Bandwidth Operalional Amplifiers
Quad MCI741 Operational Amplifiers
MC6800 Clock Generator
Three-Terminal Positive Voltage Regulators

7-146
2-154
2-159

2-185
2-189
7-150
3-125

3-144

9-121
9-126
9-130
9-134
3-152
8-123
9-137

Alphanumeric Index

(continued)

Device
Number
MC33060A
MC33063A
MC33064
MC33065-H, L
MC33066
MC33067
MC33071
MC33072
MC33074
MC33076
MC330n
MC33078
MC33079
MC33091
MC33092
MC33102
MC33120
MC3.3129
MC33151
MC33152
MC33160
MC33161
MC33163
MC33184
MC33166
MC33167
MC33171
MC33172
MC33174
MC33178
MC33179
MC33181
MC33182
MC33184
MC33192
MC3320t
MC33202
MC33204
MC33261
MC33262
MC33267
MC33269
MC33272
MC33274
MC33282

Function
Precision Switch mode Pulse Width
Modulation Control CircuH
DC-ta-DC Converter Control CircuH
Undervoltage Sensing Circuit
High Performance Dual Channel Current
Mode Controller
High Performance Resonant Mode Controller
High Performance Resonant Mode Controller
High Performance Single-Supply
Operational Amplifier
Dual, High Performance Single-Supply
Operational Amplifier
Quad, High Performance Single-Supply
Operational Amplifier
Dual High Output Current, Low Power,
Operational Amplifier
Dual, Low Noise Operational Amplifier
Dual/Quad Low Noise Operational Amplifier
Dual/Quad Low Noise Operational Amplifier
High Side TMOS Driver
Alternator Voltage Regulator
Sleep Mode Two-Stale Micropower
Operational Amplifier
Sutiscriber Loop Interface Circuit
High Performance Current Mode Controller
High speedDuai MOSFET Driver
High Speed Dual MOsFET Driver
Microprocessor Voltage Regulator and
Supervisory Circuit
Universal Voltage Monitor
Power Switching Regulator
Micropower Undervoltage Sensing Circuit
Power Swnching Regulator
Power Switching Regulator
Low Power, Single Supply Operational Amplifier
Low Power, Single Supply Operational Amplifier
Low Power, Single Supply Operational Amplifier
High Output CUttent, Low POWet;
Operational Amplifier
High Output Currenl, Low Power,
Operational Amplifier
Low Power JFETinput Operational Amprlfier
Dual, loW Power JFET Input Operational
Amplifier
Quad, Low Power JFET Input Operational
Amplifier
Mi-Bus Interface Stepper Motor Controller
Rail-la-Rail Operational Amplifiers
Rai~ta-Rail Operational Amplifiers
Rail-ill-Rail Operational Amplifiers
PoWer Factor Controller
Power Factor Controller
Lowe Dropout Regulator
Low Dropout Postive Voltage Regulator Series
Low Power, Single Supply Operational
Amplifiers
low Power, Single Supply Operational
Amplifiers
JFET Operational Amplifier

3-231
3-243
3-252
3-257
3-270
3-278
2-284
2-284
2-284
2-194
2-202
2-213
2-213
10-41
10-54
2-222

MC33284
MC33293
MC33295
MC33298
MC33304
MC34OO1
MC34002
MC34004
MC34010
MC34011A
MC34012
Series
MC34013A
MC34014
MC34017
MC34018
MC34023
MC34025
MC34050
MC34051
MC34055
MC34060

3-293
3-306
3-314
3-307
3-329
3-343
3-342
3-362
3-375
2-234
2-234
3-234
2-241

MC3406QA
MC34063A
MC34064
MC34065-H, L
MC34066
MC34067
MC34071
MC34072
MC34074
MC34080

2-241
MC34085
2-311
Z-311
2-311
10-72
2-251
2-251
2·251
3-388
3-399
3-187
3-182
2-259
2-259
2-268

MC34114
MC34115
MC34117
MC34t18
MC34119
MC34129
MC341.42
MC34151
MC34152
MC34160
MC34161
MC34163
MC34164
MC34166
MC34167

JFET Operational AmplHier
Quad Low Side Driver
Quad Low Side Driver
Octal Output Driver
RaU-ta-Rail, Sleepmode liva-State
Operational Arnplifier
JFET-Input Operational Amplifier
JFET-Input Operational Amplifier
JFET-Input Operational Arnplifier
8ectronic TelePhone Circuit
Electronic TelephoneCircuH
Telephone Tone Ringer
Speech Network and Tone Dialer
Telephone Speech Network wHh Dialer
Interface
Telephone Tone Ringer
Voice Switched Speakerphone Circuit
High Speed Single-Ended PWM Controller
High Speed Double-Ended PWM Controller
Dual EIA-422/423 Transceiver
Dual EIA-422/423 Transceiver
ISO 88-2-3[IEEE 802_3]108ase-T Transceiver
Switchmode Pulse Width ModuJaiion
Control Circuit
Preceision swilcl1mode PulSe Width
Modulation Control CircuH
DC-la-DC Converter Control Circuit
Undervoltage Sensing CircuH
High Performance Dual Channel CUrrent
Mode Controller
High Performance ResonantMode Controller
High Performance Resonant Mode Controller
High Performance Single-Supply
Operational Amplifier
Dual, High Performance Single-Supply
Operational Amplifier
Quad, High Performance Single-Supply
Operational Amplifier
High Speed Decompensated (AVCL ~ 2)
JFET Input Operational Amplifier
Quad, High Speed Decompensated
(AVCl ~ 2) JFET Input Operational Amplifier
Telephone Speech Network with Dialer Interface
Continuously Variable Slope Delta
Modulator/Demodulator
Telephone Tone Ringer
Voice Switched Speakerphone Circuit
low Power Audio Amprlfier
High Performance Current Mode Controller
High Performance DecoderiSink Driver
High Speed Dual MOsFETDriver
High Speed Dllal. MOsFET Driver
Microprocessor Voltage Regulator and
Supervisory Circuit
Universal Voltage Monitor
Power SWItching Regulator. ....••. . ...
Micropower UndervoHage Sensing Circuit
Power Switching Regulator
Power SwHching Monitor

·See Teleccmmunication Device Data (OL 136)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
1-4

2-268
10-76
10-n
10-78

3-187
3-203
7-161
7-161
8-1n
3-219

3-243
3-252
3-257
3-270
3-218
2-284
2-284
2-284
2-300
2-300

.
9'153

~

7-168
3-306
3-314
3-307
3-329
S-S43
3-342
3-362
3-375

Device
Number

Page

Function
Low Power JFET Input Operational Amplifier
Dual, Low Power JFET Input Operational
Amplifier
Quad, Low Power JFET Input Operational
Amplifier
Power Factor Controllers

SN75174

2-3tt
2-311

SN75175
TCA0372
TCA5600

2-311

TCF5600

MC35085
MC35171
MC35172
MC35174
MC44001
MC44011
MC44144
MC44145

SCSI-2 Three-Terminal VoHage Regulator
High Voltage SwHching Integrated Conteroller
High Voltage SwHching Integrated Conteroller
SwHchmode Pulse Width Modulation
Control Circuit
DC-to-DC Converter Control CircuH
High Performance Single-Supply
Operational Amplifier
Dual, High Performance Single-Supply
Operational Amplifier
High Performance Single-Supply
Operational Amplifier
High Speed Decompensated
(AVCL ~ 2) JFET Input Operational Amplifier
Quad, High Speed Decompensated
(AVCL ~ 2) JFEr Input Operational Amplifier
Low Power, Single Supply Operational Amplifier
Low Power, Single Supply Operational Amplifier
Low Power, Single Supply Operational Amplifier
Chroma 4 Multistandard Video Processor
Buss Controlled Multistandard Video Processor
Subcarrier Reference
Sync Separator/Pixel Clock Generator
Color TV IF
TV Video/Sound IF
Mode Controller
Generator IC for '

TCF6000
TDA1085A
TDA1085C
TDA1185A
TDA3190

2-234
2-234
2-234
9-166
9-182
9-230
9-234
9-237
9-255
3-419
9-258

Series
TL494
TL594
TL780
UAA1016B
UAA1041
UAA2016
UC2842A

7~172

0::,::

MC75174B
MCC3334
MCCF3334
MCCF33093
MCCF33094
MCCF33095
MCCF33096

Outputs
Quad EIA485 Une Drivers with Three-State
Outputs
High Energy Ignition Circuit
High Energy Ignition Circuit
Ignition Control Chip
IgnHion Control Chip
Integral Alternator Regulator
Darlington Drive Flip-Chip
Ignition Control Chip
Motor Driver
Modulator

7-193
2-320
3449
3-449
1()"100
4-89
4-96
4-106
9-297

2-300

:;~:;,

Three-State

Page
7-193

2-300

9-275 ..
9-282
9-289
Ii

Function
Quad EIA-485 Une Driver with Three-State
Output
Quad EIA-485 Une Receivers
Dual Power Operational Amplifier
Universal Microprocessor Power Supply/
Controller
Universal Microprocessor Power Supply/
Controller
Peripheral Clamping Array
Universal Motor Speed Controller
Universal Motor Speed Controller
Triac Phase Angle Controller
TV Sound System

Switch mode Pulse Width Modulation
Control Circuit
Precision Switchmode Pulse Width
Modulation Control CircuH
Three-Terminal Positive VoHage Regulator
Zero VoHage Controller
Automotive Direction Indicator
Zero VoHage Controller
High Performance Current Mode Controller
High Performance Current Mode Controller
Performance Current Mode Controller

3-460
3-471
3-482
4-115
10-104
4-121
3-488

7-172
7·177
7-182
7·182
10-11
10-11
10-62
10-63
10·64
10-73
10-99

UC3845B
ULN2068B
ULN2801
ULN2802
ULN2803
ULN2804
j.iA78S40

Quad 1.5 A Darlington Switch
Octal Peripheral Driver Array
Octal Peripheral Driver Array
Octal Peripheral Driver Array
Octal Peripheral Driver Array
Universal Switching Regulator Subsystem

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

1·5

7-198
7-202
7·202
7·202
7·202
3-508

Cross Reference
The following table represents a cross reference guide for all of Analog devices which are manufactured by Motorola. Where
the Motorola part number differs from the industry part number, the Motorola device is a "form, fit and function" replacement for
the industry part number. However, some differences in characteristics and/or specifications may exist.

55110DM
75107ADC
75107APC
75107BDC
75107BPC
75108ADC
75108APC
75108BDC
75108BPC
75110DC
75110PC
75207DC
75207PC
75208DC
75208PC
8216
9614DC
9614DM
9615DC
9616CDC
9616DM
90616EDC
9617DC
9620DC
9620DM
9621 DC
9627DC
9627DM
9636AT
9637T
9638T
9640DC
9640PC
9665DC
9665PC
9666DC
9666PC
9667DC
9667PC
9668DC
9668PC
AD1403AN
AD1508-8D
AD530
AD531
AD532L
AD580J
AD580K
AD580M
AD580S
AD580T
AD589J
AD589K
AD589L
AD589M
ADDAC-08CQ
ADDAC-08ED

MC75S110L

ADDAC-08HD
AM107
AM201AD
AM201D
AM26LS30D
AM26LS30L
AM26ALS30P
AM26LS31CJ
AM26LS31CN
AM26LS31DS
AM26LS31P
AM26LS32ACJ
AM26LS32ACN
AM26LS32PC
AM26LS32P
AM26LS33DC
AM26LS33PC
AM26S10DC
AM301AD
AM301D
AM311D
AM723DC
AM723DM
AM723P
AM741DC
AM741DM
AM747DC
AM747DM
AN5150
AN5151
CA081AE
CA081AS
CA081CS
CA081E
CA081S
CA082AE
CA082AS
CA082CS
CA082E
CA082S
CA084AE
CA084E
CA084S
CA1391E
CA139AG
CA139G
CA1458S
CA1558S
CA239AE
CA239AG
CA239E
CA239G
CA3026
CA3045F
CA3045
CA3046
CA3048

MC75107L
MC75107P
MC75107L
MC75107P
MC75108L
MC75108P
MC75108L
MC75108P
MC75S110L
MC75S110P
MC75107L
MC75108P
MC75108L
MC75108P
MC8T26AL
MC75S110L
MC75S110L
MC75108L
MCl488L
MCl488L
MC1488L
MC1489AL.
MC75S110L
MC75S110L
MC75108L
MCl489AL
MC1489AL
MC3488AP
MC3486P
MC3487P
MC26S10L
MC26S10P
MC1411L
MC1411P
MC1412L
MC1412P
MC1413L
MC1413P
MC1416L
MC1416P
MC1403AU
MC1508L8
MC1595L
MC1595L
MC1595L
MC1403U
MCl403P1
MC1403AP1
MC1503U
MC1503AU
LM385Z-1.2
LM385Z-1.2
LM385Z-1.2
LM385BZ-1.2
DAC-08CQ
DAC-08EQ

DAC-08HQ
LM111J
LM201AN
LM201AN
AM26LS3OD
AM26LS30L
AM26LS30P
AM26LS31PC
AM26LS31PC
AM26t:S31DS
AM26LS31P
AM26LS32D
AM26LS32APC
AM26LS32PC
AM26LS32PC
MC3486L
MC3486P
MC26S10L
LM301AJ
LM301AJ
LM311J-8
MC1723CL
MC1723L
MC1723CP
MC1741CU
MC1741U
MC1747CL
MC1747L
MC34129P
MC13001P
TL081ACP
TL081ACJG
TL081CJG
TL081CP
TL081MJG
TL082ACP
TL082ACJG
TL082CJG
TL082CP
TL082MJG
TL084ACN
TL084CN
TL084MJ
MC1391P
LM139AJ
LM139J
MC1458CP1
MC1558U
LM239AN
LM239AJ
LM239N
LM239J
CA3054
MC3346P
MC3346P
MC3346P

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
1-6

MC3301P

Cross Reference (continued)
Motorola
liilrliiPi : Indust~
Nearest
Part Num

r

CA3052
CA3054
CA305B
CA3059
CA3079
CA30B5AF
CA30B6F
CA30BAS
CA3091D
CA3136A
CA3146D
CA3146
CA3201E
CA3210E
CA3217E
CA3302E
CA339AE
CA339AG
CA339E
CA339G
CA3401E
CA723CE
CA723E
CA741CS
CA741S
CA747CE
CA747CF
CA747E
CA747F
CA748CS
CS2842AD
CS2843AD
CS2844D
CS2845D
CS3471
CS3B42AD
CS3843AD
CS3B44D
CS3B45D
DB216
DB226
DAC-OBCD
DAC-OBCN
DAC-OBCP
DACOBCa
DAC-OBED
DAC-OBEN
DAC-OBEP
DAC-OBEa
DAC-OBHN
DAC-OBHP
DAC-OBHa
DACOBOOLCJ
DACOBOOLCN
DACOB01LCJ
DACOB01LCN
DACOB02LCJ
DACOB02LCN
DACOBOBLCJ
DACOBOBLCN
DACOBOBLD

Replacement

~~~1~~~1'1

Replaet!~!!Ht
MC3301P

DM7B22J
DM7B37J
DMBB22J
DMBB22N
DMBB37N
DSl48BJ
DS14BBN
DSl489AJ
DS14B9AN
DS14B9J
DSl489N
DS26LS31N
DS26LS32N
DS26S10CJ
DS26S10CN
DS34B6J
DS3486N
DS34B7J
DS3487N
DS3612H
DS3612N
DS3632H
DS3632J
DS3632N
DS3650J
DS3650N
DS3651J
DS3651N
DS3652J
DS3652N
DS3653J
DS3653N
DS55107W
DS5511OJ
DS75107J
DS75107N
DS7510BJ
DS7510BN
DS7511OJ
DS7511ON
DS75207J
DS75207N
DS7520BJ
DS7520BN
DS7B37J
DS7837W
DSBB34J
DSBB34N
DSBB35J
DSBB35N
DSBB37J
DSBB37N
DSB922A
DSB923A
DS9636ACN
ICL741CLNPA
ICL741CLNTY
ICLBOO1CTZ
ICLBOO1MTZ
ICLBOOBCPA
ICLBBOBCTY

CA3054
CA3059
CA3059
CA3079
MC1723L
MC3346P
LM30BN
MC1594L
MC3346P
CA31460
MC3346P
TDA3301B
MC13001P
TDA3301B
MC3302N
LM339AN
LM339AJ
LM339N
LM339J
MC3401P
MC1723CP
MC1723L
MC1741CP1
MC1741U
MC1747CL
MC1747CL
MC1747L
MC1747L
MC174BCPl
UC2B42BD1
UC2B43BD1
UC2B44BD1
UC2B45BD1
MC3471P
UC3B42BD1
UC3B43DB1
UC3B44BD1
UC3B45BD1
MCBT26AL
MCBT26L
DAC-OBCD
DAC-OBCP
DAC-OBCP
DAC-OBCa
DAC-OBED
DAC-OBEP
DAC-OBEP
DAC-OBEa
DAC-OBHP
DAC-OBHP
DAC-OBHa
DAC-OBEa
DAC-OBEP
DAC-OBCa
DAC-OBCP
DAC-OBHa
DAC-OBHP
MC140BLB
MC140BPB
MC150BLB

MCl489AL
MC3437L
MCl489AL
MC14B9AP
MC3437P
MC14BBL
MC14BBP
MC14B9AL
MC14B9AP
MC14B9L
MC14B9P
AM26LS31P
AM26LS32P
MC26S10L
MC26S10P
MC3486L
MC3486P
MC34B7L
MC3487P
MC1472U
MC1472Pl
MC1472U
MC1472U
MC1472Pl
MC3450L
MC3450P
MC3430L
MC3430P
MC3452L
MC3452P
MC3432L
MC3432P
MC75107L
MC75S110L
MC75107L
MC75107P
MC7510BL
MC7510BP
MC75S110L
MC75S110P
MC75107L
MC75107P
MC7510BL
MC7410BP
MC3437L
MC3437L
MCBT26AL
MCBT26AP
MCBT26AL
MCBT26AP
MC3437L
MC3437P
MC34051P
MC34050P
MC348BAP1

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

1-7

MC1741CPl
MC1741CPl
LMll1J
LM111J
LM301AN
LM301AN

Cross Reference (continued)
ICL8013A
ICL8013B
ICL8013C
ICL8017CTW
ICL8017MTW
ICL8069CCZR
ICL80690CZR
IP33063N
IP34060AN
IP34063N
IP35063J
IP3525AJ
IP3525AN
IP3526J
IP3526N
IP3527AJ
IP3527AN
IP494ACJ
IP494ACN
IP494AJ
ITT371 0
ITT652
ITT654
ITT656
L144AP
L201
L202
L203
L387
L583
LF347BN
LF347N
LF351AN
LF351BN
LF351N
LF3520
LF353AN
LF353BN
LF3530
LF353N
LF356BJ
LF356BN
LF356JG
LF356J
LF356N
LF356P
LF357BJ
L0357BN
L0357JG
LF357J
LF357N
LF357P
LF411CO
LF411CH
LF412CO
LF412CH
LF441CO
LF441CN
LF442CO
LF442CN

"

MC1594L
MC1594L
MC1594L
LM301AN
LM301AN
LM384BZ-l.2
LM385BZ-l,2

LF444CO
LF444CN
LF351AN
LM101AJ-14
LMl01AJG
LM101AJ
LMl0l0
LM101J-14
LM1035
LM107L
LMlllJ-8
LMlllJG
LMllCLN
LMllCN
LM124AO
LM124AJ
LM124J
LM124N
LM139AJ
LM139J
LM139N
LMl408J8
LM1408N8
LMl489AN
LMl489J
LMl489N
LM1496J
LM1496N
LM149J
LM158JG
LM158J
LM1558J
LM1596J
LM163J
LM1849A
LM1889
LM19000
LM1981
LM201AO
LM201AJ-14
LM201AJG
LM201AJ
LM201AN
LM201AP
LM201J-14
LM201J
LM211 0
LM211J-8
LM211JG
LM211M
LM212H
LM224AF
LM224AJ
LM2240
LM224J
LM224M"
LM224N
LM239AJ
LM239AN
LM2390

MC33063APl
MC34060AP
MC34063APl
MC35063AU
SG3525AJ
SG3525AN
SG3526J
SG3526N
SG3527AJ
SG3527AN
TL5941N
TL594CN
TL594MJ
MC1391P
MC1411P
MC1412P
MC1413P
LM324N
~C1411P

MC1412P
MC1413P
MC33267
MC3484S2
LF347BN
LF347N
MC34001AP
MC34001BP
LF351N
LF355J
MC34002AP
MC34002BP
LF3530
LF353N
LF356BJ
LF356J
LF356J
LF356J
LF356J
LF356J
LF357BJ
LF357BJ
LF357J
LF357J
LF357J
LF357J
LF411CO
MC34001AG
LF411CO
MC34002AG
LF441 CO
LF441CN
LF442CO
LF442CN

LF444CO
LF444CN
MC34001AP
LM101AJ
LM101AJ
LM101AJ
LM101AJ
LM101AJ
TCA5550
MC1741L
LMlllJ-8
LMlllJ-8
LMllCLN
LMllCN
LM124J
LM124J
LM124J
LM124N
LM139AJ
LM139J
MC1391P
MC1408L8
MC1408P8
MCl489AP
MCl489L
MCl489P
MC1496L
MC1496P
MC4741L
LMl58J
LMl58J
MC1558U
MC1596L
MC3450L
MC3484S2
MC1374P
MC3301P
MC13020P
LM201AO"~

LM201AJ
LM201AJ
LM201AJ
LM201 AN
LM201AN
LM201AJ
LM201AJ
LM211 0
LM211J-8
LM211J-8
LM2110
MC1456U
LM224J
LM224J
LM2240
LM224J
LM2240
LM224N
LM239AJ
LM239AN
"
LM2390

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
(

1-8
<",-

Cross Reference (continued)
.tlldust~

.ParfNum

r

LM239J
LM239M
LM239N
LM240LAZ-12
LM240LAZ-15
LM240LAZ-18
LM240LAZ-24
LM240LAZ-5.0
LM204LAZ-6.0
LM240LAZ-8.0
LM248J
LM248N
LM249J
LM249N
LM258D
LM258J
LM258M
LM258N
LM285Z-1.2
LM285Z-2.5
LM2900N
LM2901D
LM2901M
LM2901N
LM2902D
LM2902J
LM2902M
LM2902N
LM2903D
LM2903M
LM2903N
LM2903P
LM2904J
LM2904M
LM2904N
LM2905N
LM2931 ACT
LM2931AD-5.0
LM2931AT-5.0
LM2931 AZ-5.0
LM2931CD
LM2931CM
LM2931CT
LM2931 D-5.0
LM2931D
LM2931T-5.0
LM2931Z-5.0
LM2935T
LM293D
LM301AD
LM301AJG
LM301AJ
LM301AM
LM301AN
LM301AP
LM3026
LM3045
LM3046N
LM3054
LM307N
LM307fc

Motorola
Nearest
Replacement

Indust~
.. '.
Part
Num r,

Motoria
SImilar
Replacement

LM3089
LM311D
LM311J-8
LM331JG
LM311M
LM311N-14
LM311N
LM311P
LM3146A
LM3146
LM317KC
LM317KD
LM317LD
LM317LZ
LM317MP
LM317P
LM317T
LM3189
LM320LZ-12
LM320LZ-15
LM320LZ-5.0
LM320MP-12
LM320MP-15
LM320MP-1B
LM320MP-24
LM320MP-5.0
LM320MP-5.2
LM320MP-6.0
LM320MP-8.0
LM320T-12
LM320T-15
LM320T-5.0
LM320T-5.2
LM322N
LM323AT
LM323T
LM324AD
LM324AJ
LM324AN
LM324D
LM324J
LM324M
LM324N
LM325AN
LM325N
LM326N
LM328AN
LM328N
LM3301N
LM3302J
LM3302N
LM337MP
LM337MT
LM337T
LM339AD
LM339AJ
LM339AM
LM339AN
LM339D
LM339J
LM339N

LM239J
LM239D
LM239N
MC78L12ACP
MC78L15ACP
MC78L18ACP
MC78L24ACP
MC78L05ACP
MC7BL05ACP
MC78L08ACP
LM248J
LM248N
MC4741L
MC4741P
LM258D
LM258J
LM258D
LM258N
LM258Z-1.2
LM258Z-2.5
LM2900N
LM2901D
LM2901D
LM2901N
LM2902D
LM2902J
LM2902D
LM2902N
LM2903D
LM2903D
LM2903N
LM2903N
LM2904J
LM2904D
LM2904N
MC1455P1
LM2931 ACT
LM2931AD-5.0
LM2931AT-5.0
LM2931AZ-5.0
LM2931CD
LM2931CD
LM2931CT
LM2931 D-5.0
LM2931D
LM2931 T-5.0
LM2931Z-5.0
MC2935T
LM293D
LM301AD
LM301AJ
LM301AJ
LM301AD
LM301AN
LM301AN
CA3054
MC3346P
MC3346P
CA3054
LM307N
LM307N

Motorola
Nearest
Replacement

MC3356P
LM311 D
LM311J-8
LM311J-8
LM311D
LM311J-B
LM311N
LM311N
MC3346P
MC3346P
LM317T
LM317T
LM317LD
LM317LZ
LM317MT
LM317T
LM317T
MC3356P
MC79L12ACP
MC79L15ACP
MC79L05ACP
MC7912CT
MC7915CT
MC7918CT
MC7924CT
MC7905CT
MC7905.2CT
MC7906CT
MC790BCT
MC7912CT
MC7915CT
MC7905CT
MC7905.2CT
MC1455P1
LM323AT \I
.,
LM323T
LM324AD I.
LM324J
LM324AN
LM324D
LM324J
LM324D
LM324N
MC1468L
MC1468L
MC1468L
MC1468L
MC1468L
MC3301L
MC3302L
MC3302P
LM337MT
LM337MT
LM337T
LM339AD
LM339AJ
LM339AD
LM339AN
LM339D
LM339J
LM339N

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

1-9

MotorIa
SImilar
Replacement

I,'·"'

Cross Reference (continued)
LM339P
LM3401N
LM340AT-12
LM340AT-15
LM340AT-5.0
LM340KC-12
LM340KC-15
LM340LAZ-12
LM340LAZ-1S
LM340LAZ-24
LM340LAZ-5.0
LM340LAZ-S.O
LM340T-12
LM340T-15
LM340T-18
LM340T-24
LM340T-5.0
LM340T-6.0
LM340T-8.0
LM341P-12
LM341P-15
LM341P-18
LM341P-24
LM341P-5.0
LM341P-6.0
LM341P-8.0
LM342P-12
LM342P-15
LM342P-18
LM342P-24
LM342P-5.0
LM342P-6.0
LM342P-8.0
LM348D
LM34BJ
LM348M
LM348N
LM349J
LM349N
LM350T
LM358AN
LM358D
LM358JG
LM358J
LM358M
LM358N
LM363AJ
LM363AN
LM363J
LM363N
LM385BZ-1.2
LM385BZ-2.5
LM385D-1.2
LM385D-2.5
LM385M-1.2
LM385M-2.5
LM385Z-1.2
LM385Z-2.5
LM386N
LM3900D
LM3900J

LM339N

LM3900N
LM3905N
LM393AN
LM393D
LM393JG
LM393M
LM393N
LM4250CN
LM55109J
LM5511OJ
LM555CN
LM556CD
LM556CJ
LM556CN
LM556L
LM703LN
LM723CD
LM723CJ
LM723CN
LM723J
LM741CD
LM741CJ-14
LM741EJ
LM741EN
LM747CD
LM748CN
LM75107AN
LM75108AJ
LM75108AN
LM7511OJ
LM75110N
LM75207L
LM75207N
LM7520BJ
LM75208N
LM7805CT
LM7812CT
LM7815CT
LM78L05ACZ
LM78L05CZ
LM78LOSACZ
LM78L08CZ
LM78L12ACZ
LM78L12CZ
LM7SL15ACZ
LM78L15CZ
LM78L18ACZ
LM78L18CZ
LM78L24ACZ
LM78L24CZ
LM78M06CP
LM78M12CP
LM78M15CP
LM7905CT
LM7912CT
LM7915CT
LM79L05ACZ
LM79L12ACZ
LM79L15ACZ
LM79M05CP

MC3401P
LM340AT-12
LM340AT-15
LM340AT-5.0
LM340T-12
LM340T-15
MC7SL12ACP
MC7SL1SACP
MC7SL24ACP
MC7SL05ACP
MC7SLOSACP
LM340T-12
LM340T-15
LM340T-18
LM340T-24
LM340T-5.0
LM340T-6.0
LM340T-S.O
MC78M12CT
MC78M15CT
MC78M18CT
MC78M24CT
MC78M05CT
MC78M06CT
MC78M08CT
MC78M12CT
MC78M15CT
MC18M18CT
MC78M24CT
MC78M05CT
MC78M06CT
MC78M08CT
LM348D
LM348J
LM348D
LM348N
MC4741CL
MC4741CP
LM350T
LM358N
LM358D
LM358J
LM35BJ
LM358D
LM358N
MC3450L
MC3450P
MC3450L
MC3450P
LM385BZ-1.2
LM385BZ-2.5
LM385D-1.2
LM385D-2.5
LM385D-1.2
LM385D-2.5
LM385Z-1.2
LM385Z-2.5
MC34119P
LM3900D
LM3900J

LM3900N
MC1455P1
LM393AN
LM393D
LM393N
LM393D
LM393N
MC1776CP1
MC75S110L
MC75S110L
MC1455P1
MC3456L
MC3456L
MC3456P
MC3456L
MC1350P
MC1723CL
MC1723CL
MC1723CP
MC1723L
MC1741CL
MC1741CL
MC1741CU
MC1741CP1
MC1747CL
MC1748CP1
MC75107P
MC75108L
MC75108P
MC75S110L
MC75S110P
MC75107L
MC75107P
MC75108L
MC75108P
MC7S05CT
MC7812CT
MC7S15CT
MC78L05ACP
MC7SL05CP
MC78L08ACP
MC78L08CP
MC78L12ACP
MC78L12CP
MC78L15ACP
MC78L15CP
MC78L18ACP
MC78L18CP
MC7SL24ACP
MC78L24CP
MC7SM05CT
MC78M12CT
MC78M15CT
MC7905CT
MC7912CT
MC7915CT
MC79L05ACP
MC79L12ACP
MC78L15ACP

LM79M12CP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
1-10

MC79M05CT
MC79M12CT

Cross Reference (continued)
Motorola
Nearest
Replacement
LM79M15CP
LM833D
LM833N
LM833P
LM837N
LMC6482D
LMC6482P
LMC6484D
LMC6484P
LT1083
MB3759
MP5531CP
MP55310P
MP5532CP
MP5532DP
N5558F
N5558V
N5595A
N5595F
N5596A
N5723A
N5741A
N5741 V
N5747A
N5747F
N8T15A
N8T15F
N8T16A
N8T26AB
N8T26AE
N8T26AJ
N8T26AN
N8T26B
N8T26J
N8T26N
N8T37A
N8T97B
N8T97F
N8T97N
N8T98B
N8T98F
N8T98N
NE550A
NE555JG
NE555D
NE555V
NE556D
NE556F
NE5561FE
NE5561N
NE5234D
NE5234P
OP-01P
PWM125CK
RC1458DN
RC1488DC
RC1489ADC
RCl489DC
RC3302DB
RC4136DP
RC4136D

Indust~

Part Num er
MC79M15CT

RC4136J
RC4136N
RC4194DC
RC4195NB
RC4558DN
RC4558JG
RC4458P
RC723DB
RC723DC
RC723D
RC741DN
RC747D
RC75107ADP
RC75107AD
RC75108ADP
RC75108AD
RC75109DP
RC75109D
RC75110DP
RC75110D
REF-01CJ
REF-01CP
REF-01CZ
REF-OlOJ
REF-OlOP
REF-OlOZ
REF-02CJ
REF-02CP
REF-02CZ,
REF-02DJ
REF-02DP
REF-02DZ
RM4136D
RM4136J
RM4194DC
RM4558D
RM4558JG
RM723DC
RM723D
RM7410P
RM747D
RV3301DB
S5558E
S5596F
SA555N
SM1042A
SM1042
SG107J
SG107T
SGlllO
SG124J
SG1402N
SG1402T
SG1436M
SG1458M
SG1468J
SG1468N
SG1495D
SG1495N
SG1496D
SG1496N

LM833D
LM833N
LM833N
MC33079P
MC33202D
MC33202P
MC33204D
MC33204P
MC34268
TL494CN
MCl404U5
MC1404U5
MC1404Ul0
MC1404Ul0
MC1458U
MC1458Pl
MC1495L
MC1495L
MC1496L
MC1723CP
MC1741CPl
MC1741CPl
MC1747CL
MC1747CL
MC1488L
MC1488L
MCl489L
MC8T26AP
MC8T26AL
MC8T26AL
MC8T26AP
MC8T26AP
MC8T26AL
MC8T26AP
MC3437P
MC8T97P
MC8T97L
MC8T97P
MC8T98P
MC8T98L
MC8T98P
MC1723CP
MC1455U
MC1455D
MC1455Pl
NE556D
MC3456L
MC34060AL
MC34060P
MC33204D
MC33204P
MC1436Pl
SG3525AJ
MC1458Pl
MC1488L
MC1489AL
MC1489L
MC3302P
MC3403P
MC3403L

Motorola
Nearest
Replacement

MC3403L
MC3403P
MC1468L
MC1468L
MC4558CPl
MC4558CU
MC4558CPl
MC1723CP
MC1723CL
MC1723CL
MC1741CPl
MC1747CL
MC75107P
MC75107L
MC75108P
MC75108L
MC75S110P
MC75S110L
MC75S110P
MC75S110L
MC1404Ul0
MC1404Ul0
MC1404Ul0
MC1404Ul0
MC1404Ul0
MC1404Ul0
MC1404U5
MC1404U5
MC1404U5
MCl404U5
MC1404U5
MC1404U5
MC3503L
MC3503L
MC1568L
MC4558U
MC4558U
MC1723L
MC1723L
MC1741L
MC1747L
MC3301P
MC1558U
MC1596L
MC1455BPl
SM1042AV
SAA1042V
MC1741L
MC1741L
LMlllJ
LM124J
MC1594L
MC1594L
MC1436U
MCl458Pl
MC1468L
MC1468L
MC1495L
MC1495L
MC1496L
MC1496P

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
1-11

Motoria
Similar
Replacement

Cross Reference (continued)

SG1501AD
SG1501AJ
SG1501AJ
SG1502D
SG1502J
SG1502N
SG1503T
SG1503Y
SG1524J
SG1568J
SG1595D
SG1596D
SG201AM
SG201AN
SG201M
SG201N
SG211D
SG211M
SG224J
SG224N
SG2402N
SG2402T
SG2501AD
SG2501D
SG2501J
SG2501N
SG2502J
SG2502N
SG2503M
SG2503T
SG2503Y
SG300N
SG301AM
SG301AN
SG307J
SG307M
SG307N
SG308AM
SG311D
SG311M
SG317P
SG317R
SG324J
SG324N
SG337P
SG337R
SG3402N
SG3402T
SG3423M
SG3423Y
SG3501AD
SG3501AJ
SG3501AN
SG3501D
SG3501J
SG3501N
SG3502D
SG3502J
SG3502N
SG3503M
SG3503T

MC1568L
MC1568L

SG3503Y
SG3523Y
SG3524J
SG3525AJ
SG3525AN
SG3526J
SG3526N
SG3527AJ
SG3527AN
SG3561
SG4194CJ
SG4194J
SG4250CM
SG4501D
SG4501J
SG4501N
SG555CM
SG556CJ
SG556CN
SG556J
SG723CD
SG723CJ
SG723CN
SG723D
SG723J
SG741CM
SG747CJ
SG747CN
SG747J
SG748CD
SG748CM
SG748CN
SG777CN
SG7805ACP
SG7805ACR
SG7805ACT
SG7805CP
SG7806ACP
SG7806ACR
SG7806ACT
SG7806CP
SG7806CR
SG7808ACP
SG7808ACT
SG7808CP
SG7808CR
SG7812ACP
SG7812ACR
SG7812ACT
SG7812CP
SG7812CR
SG7815ACP
SG7815ACR
SG7815ACT
SG7815CP
SG7815CR
SG7815CT
SG7818ACP
SG7818ACR
SG7818ACT
SG7818CP

MC1568L
MC1568L
MC1568L
MC1568L
MC1503U
MC1503U
TL494MJ
MC1568L
MC1595L
MC1596L
LM201AN
LM201AN
LM201AN
LM201AN
LM211J-8
LM211J-8
LM224J
LM224N
MC1494L
MC1494L
MC1468L
MC1468L
MC1468L
MC1468L
MC1468L
MC1468L
MC1403AU
MC1403AU
MC1403AU
MC1723CP
LM301AN
LM301AN
LM307N
LM307N
LM307N
LM308AN
LM311J
LM311N
LM317T
LM317T
LM324J
LM324N
LM337T
LM337T
MC1494L
MC1494L
MC3423P1
MC3423U
MC1488L
MC1468L
MC1468L
MC1468L
MC1468L
MC1468L
MC1468L
MC1468L
MC1468L
MC1403U
MC1403U

MC1403U
MC3523U
TL494CJ
SG3525AJ
SG3525AN
SG3526J
SG3526N
SG3527AJ
SG3527AN
MC34261
MC1468L
MC1568L
MC1775CP1
MC1468L
MC1468L
MC1468L
MC1455P1
MC3456L
MC3456P
MC3456L
MC1723CL
MC1723CL
MC1723CP
MC1723L
MC1723L
MC1741CP1
MC1747CL
MC1747CP2
MC1747L
MC1748CP1
MC1748CP1
MC1748CP1
LM308AN
MC7805ACT
MC7805ACT
MC7805ACT
MC7805CT
MC7806ACT
MC7806ACT
MC7806ACT
MC7806CT
MC7806CT
MC7808ACT
MC7808ACT
MC7808CT
MC7808CT
MC7812ACT
MC7812ACT
MC7812ACT
MC7812CT
MC7812CT
MC7815ACT
MC7815ACT
MC7815ACT
MC7815CT
MC7815CT
MC7815CT
MC7818ACT
MC7818ACT
MC7818ACT
MC7818CT

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
1-12

Cross Reference
Indust~

Part Num

r

SG7818CR
SG7824ACP
SG7824ACR
SG7824ACT
SG7824CP
SG7824CR
SG7905.2CP
SG7905.2CR
SG7905.2CT
SG7905ACP
SG7905ACR
SG7905ACT
SG7905CP
SG7905CR
SG7905CT
SG7908CP
SG7908CR
SG7908CT
SG7912ACP
SG7912ACR
SG7912ACT
SG7912CP
SG7912CR
SG7912CT
SG7915ACP
SG7915ACR
SG7915ACT
SG7915CP
SG7915CR
SG7915CT
SG7918CP
SH8090FM
SN75107AJ
SN75107AN
SN75107BJ
SN75107BN
SN75108AJ
SN75108AN
SN75108BJ
SN75108BN
SN75110AJ
SN75110AN
SN75121J
SN75121N
SN75125N
SN75126J
SN75126N
SN75150J
SN75150N
SN75154J
SN75154N
SN75160J
SN75160N
SN75172N
SN75173J
SN75173N
SN75174N
SN75175J
SN75175N
SN75188J
SN75188N

(continued)

Motorola
Nearest
Replacement

Motoria
Similar
Replacement

Indust~

Part Num er

MC7818CT

SN75189AJ
SN75189AN
SN75189J
SN75189N
SN75207J
SN75207N
SN75208J
SN75208N
SN75251N
SN75466J
SN75466N
SN75467J
SN75467N
SN75468J
SN75468N
SN75475JG
SN75475P
SN76514N
SN76591P
SN76600P
SSS140BA-8Z
SSS150BA-8Z
SSS201AP
SSS301AP
SSS747BP
SSS747CP
SSS747GP
SSS747P
TA7179P
TA7504P
TA7506P
TA75071P
TA75072P
TA75074F
TA75339F
TA75339P
TA75358CF
TA75358CP
TA75393F
TA75393P
TA75458F
TA75458P
TA75558P
TA7555F
TA7555P
TA75902F
TA76494P
TA78005AP
TA78006AP
TA78008AP
TA78012AP
TA78015AP
TA78018AP
TA78024AP
TA78LOO5AP
TA78LOO5P
TA78LOO8AP
TA78LOO8P
TA78L012AP
TA78L012P
TA78L015AP

MC7824ACT
MC7824ACT
MC7824ACT
MC7824CT
MC7824CT
MC7905.2CT
MC7905.2CT
MC7905.2CT
MC7905ACT
MC7905ACT
MC7905ACT
MC7905CT
MC7905CT
MC7905CT
MC7908CT
MC7908CT
MC7908CT
MC7912ACT
MC7912ACT
MC7912ACT
MC7912CT
MC7912CT
MC7912CT
MC7915ACT
MC7915ACT
MC7915ACT
MC7915CT
MC7915CT
MC7915CT
MC7918CT
MC1508L8
MC75107L
MC75107P
MC75107L
MC75107P
MC75108L
MC75108P
MC75108L
MC75108P
MC75S110L
MC75S110P
MC3481/5L
MC3481/5P
MC3481/5L
MC3481/5L
MC3481/5P
MC1488L
MC1488P
MC1489L
MC1489P
MC3447L
MC3447P/P3
MC75172BP
SN75173J
SN75173N
MC75174BP
SN75175J
SN75175N
MC1488L
MC1488P

Motorola
Nearest
Replacement
MC1489AL
MC1489AP
MC1489L
MC1489P

MC75107L
MC75107P
MC75108L
MC75108P
MC3471P
MC1411L
MC1411P
MC1412L
MC1412P
MC1413L
MC1413P
MC1472U
MC1472P1
MC1496P
MC1391P
MC1350P
MC1408L8
MC1508L8
LM201AN
LM301AN
MC1747L
MC1747CL
MC1747L
MC1747L
MC1468L
MC1741CP1
LM301AN
MC34001P
MC34002P
MC34004P
LM339D
LM339N
LM358D
LM358N
LM393D
LM393N
MC1458D
MC1458CP1
MC4558CP1
MC1455D
MC1455P1
LM324D
TL4941N
MC7805CT
MC7806CT
MC7808CT
MC7812CT
MC7815CT
MC7818CT
MC7824CT

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

1-13

Motoria
Similar
Replacement

MC78L05ACP
MC78L05CP
MC78L08ACP
MC78L08CP
MC78L12ACP
MC78L12CP
MC78L15ACP

Cross Reference (continued)
Industry
Part Number
TA78L015P
TA78L018AP
TA78L018P
TA78L024AP
TA78L024P
TA78M05P
TA78M06P
TA78M08P
TA78M12P
TA78M18P
TA78M20P
TA78M24P
TA79005P
TA79006P
TA79008P
TA79012P
TA79015P
TA79018P
TA79024P
TA79L005P
TA79L012P
TA79L015P
TA79L018P
TA79L024P
T8920
T8A920S
TCA5600
TCF5600
TD62001 PIAP
TD62002PIAP
TD62003PIAP
TD62477P
TD62479P
TDA1085A
TDA1085C
TDA1085
TDA1185A
TDA33018
TDA4817
TDC1048
TLC2272D
TLC2272P
TLC2274D
TLC2274P
TL022CJG
TL022CP
TL022MJG
TL044CJ
TL044MJ
TL062ACP
TL062CD
TL062CP
TL062MJG
TL062VP
TL064ACD
TL064ACN
TL064CD
TL064CN
TL064MJ
TL064VN
TL071ACD

Motorola
Nearest
Replacement

MotorIa
Similar
Replacement

Industry
Part Number

MC78L15CP
MC78L18ACP
MC78L18CP
MC78L24ACP
MC78L24CP

TL071 ACJG
TL071ACP
TL071CD
TL071CJG
TL071CP
TL071MJG
TL072ACD
TL072ACJG
TL072ACP
TL072CD
TL072CJG
TL072CP
TL072MJG
TL074ACJ
TL074ACN
TL074CJ
TL074CN
TL074MJ
TL081ACD
TL081ACJG
TL081ACP
TL081CD
TL081CJG
TL081CP
TL081MJG
TL082ACJG
TL082ACP
TL082CD
TL082CJG
TL082CP
TL082MJG
TL084ACJ
TL084ACN
TL084CJ
TL084CN
TL084MJ
TL1431
TL431CD
TL431CJG
TL431CLP
TL431CP
TL4311JG
TL4311LP
TL4311P
TL431MJG
TL494CJ
TL494CN
TL4941J
TL4941N
TL494MJ
TL497CJ
TL497CN
TL497MJ
TL594CN
TL5941N
TL594MJ
TL780-05CKC
TL780-12CKC
TL780-15CKC
TL7805ACKC
j.lA0802DC-1

MC78M05CT
MC78M06CT
MC78M08CT
MC78M12CT
MC78M18CT
MC78M20CT
MC78M24CT
MC7905CT
MC7906CT
MC7908CT
MC7912CT
MC7915CT
MC7918CT
MC7924CT
MC79L05CP
MC79L12P
MC79L15P
MC79L18P
MC79L24P
MC1391P
MC1391P
TCA5600
TCF5600
MC1411P
MC1412P
MC1413P
MC1472P
MC1374P
TDA1085A
TDA1085C
TDA1085C
TDA1185A
TDA33018
MC34261
MC10319P
MC33202D
MC33202P
MC33204D
MC33204P
LM358J
LM358N
LM158J
LM324N
LM124J
TL062ACP
TL062CD
TL062CP
TL062MJG
TL062VP
TL064ACD
TL064ACN
TL064CD
TL064CN
TL064MJ
TL064VN
TL071ACD

Motorola
Nearest
Replacement
TL071 ACJG
TL071ACP
TL071CD
TL071CJG
TL071CP
TL071MJG
TL072ACD
TL072ACJG
TL072ACP
TL072CD
TL072CJG
TL072CP
TL072MJG
TL074ACJ
TL074ACN
TL074CJ
TL074CN
TL074MJ
TL081ACD
TL081 ACJG
TL081ACP
TL081CD
TL081CJG
TL081CP
TL081MJG
TL082ACJG
TL082ACP
TL082CD
TL082CJG
TL082CP
TL082MJG
TL084ACJ
TL084ACN
TL084CJ
TL084CN
TL084MJ

TL431
TL431CD
TL431CJG
TL431CLP
TL431CP
TL4311JG
TL4311LP
TL4311P
TL431MJG
TL494CJ
TL494CN
TL4941J
TL4941N
TL494MJ
MC34063AU
MC34063AP1
MC35063AU
TL594CN
TL5941N
TL594MJ
TL780-05CKC
TL780-12CKC
TL780-15CKC
MC7805ACT
MC1408L8

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

1-14

Motoria
Similar
Replacement

Cross Reference

,...-.

Industry
. Pari Nnal
amplifiers to me·et a wide range of applications. From low-cost
industry-standard types tei high precision circuits, the span
encompasses a large range of performance capabilities.
These linear integrated ci~cuits are available as single, dual

Temperature Flange (O°C to +70°C)
LM301A
LM308A
MCI748C

0.25
7.0
0.5

10
5.0
15

7.5
0.5
6.0

25
80
20

1.0
1.0
1.0

10

50

1.0

0.5

10

50

1.0

0.5

25
50
50
50
50
25

4.0
2.0
5.0
3.0
20
8.0

13
15
12
75
50
25

50
1.0
200

I 0.075 I

2.0

10
I
I
Military Temperature Range (-55°C to +125°C)

ILM101A

I 0.075 I

2.0

I

10

I

N/626, J/693
N/626
PI

I

±3.0 1±221

General. Purpose

N/626, J/693

1±3.°1±22I

General Purpose

J/693

JFETlnput
JFET Input
JFET Input
Wideband FET Input
JFET Input
JFET Input, Low Offset,
LowOrift

N/626
J/693
J/693
J/693
J/693
N/626,01751

Low Power JFET Input
Precision
Precision

N1626
N/626
N/626

±18
±18
±18

J

Industrial Temperature Range (-:25°C to +85°C)
I LM201A

General Purpose
Precision
General Purpose

±3.0
±3.0
±3.0

0.5
0.3
0.5

Internally Compensated
Commercial Temperature Range (O°C to +70°C)
LF351
LF356
LF356B
LF357
LF357B
LF411C

200pA
200pA
100pA
200pA
100pA
200pA

10
10
5.0
10
5.0
2.0

10
5.0
5.0
5.0
5.0
10

100pA
50pA
20pA
50pA
20pA
100pA

±5.0
±5.0
±5.0
±5.0
±5.0
+5.0

±18
±18
±22
±18
±22
±22

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-2

lifiers (continued)
SR
110
(nA)

(Av = 1)
(V/J.UI)

Suffix!

Max

Typ

Package

Internally Compensated
Commercial Temperature Range (D'C to +7DOC)
LM;JOf
O.~b
f.b
1U
bU
MC1436
0.04
10
12
10
MC1741C
0.5
6.0
15
200
3.0
MC1776C
0.003
6.0
15
MC3476
0.05
6.0
15
25

l.U
1.0
1.0
1.0
1.0

U.b

70
20
100
50

2.0
0.5
0.2
0.2

±;J.U
±15
±3.0
± 1.2
± 1.5

±Hl
±34
±18
±18
±18

MC34001
MC34001B
MC34071
MC34071A
MC34080
MC34081
MC34181
TL071AC
TL071C
TL081AC
TL081C

25
50
25
50
25
25
25
50
25
50
25

4.0
4.0
4.5
4.5
16
8.0
4.0
4.0
4.0
4.0
4.0

13
13
10
10
55
30
10
13
13
13
13

±5.0
±5.0
+ 3.0
+3.0
±5.0
±5.0
±2.5
±5.0
±5.0
±5.0
±5.0

±18
±18
+44
+44
±22
±22
±18
±18
±18
±18
±18

200 pA
200 pA
0.5
500 nA
200 pA
200 pA
0.1 nA
200pA
200pA
200 pA
400 pA

10
5.0
5.0
3.0
1.0
1.0
2.0
6.0
10
6.0
15

10
10
10
10
10
10
10
10
10
10
10

~b

100 pA
100 pA
75
50
100 pA
100 pA
0.05
50 pA
50 pA
100 pA
200 pA

l:ieneral t'urpose
High Voltage
General Purpose
!1Power, Programmable
Low Cost
!1Power, Programmable
JFET Input
JFET Input
High Performance,
Single Supply
Decompensated
High Speed JFET Input
Low Power JFET Input
Low Noise JFET Input
Low Noise JFET Input
JFET Input
JFET Input

N/b~b

U
P1, U
P1, U
P1, U
P/626, U
P/626, U
P/626, U
P/626, U
P/626, U
P/626, U
P/626
P/626, JG
P/626, JG
P/626, JG
P/626, JG

Automotive Temperature Range (-4D'C to +85'C)
MC33071
MC33071A
MC33171

0.5
500 nA
0.1

5.0
3.0
4.5

10
10
10

75
50
20

25
50
50

4.5
4.5
1.8

10
10
2.1

+ 3.0
+ 3.0
+ 3.0

+44
+44
+44

MC33181

0.1 nA

2.0

10

0.05

25

4.0

10

±2.5

±18

2.2

1.0

1.0
1.0
1.0
4.0
4.5
4.5
16
. 8.0
1.8

2.0
0.5
0.2
13
10
10
55
30
2.1

±15
±3.0
± 1.2
±5.0
+ 3.0
+ 3.0
±5.0
±5.0
+ 3.0

±40
±22
±18
±22
+44
+44
±22
±22
+44

4.0

13

±5.0

±18

High Performance,
Single Supply
Low Power Single
Supply
Low Power JFET Input

P/626, U
P/626, U
P/626

Low V Rail-to-RailTM

P/626, 0/751

High Voltage
General Purpose
!1Power, Programmable
JFET Input
High Performance,
Single Supply
Decompensated
High Speed JFET Input
Low Power Single
Supply
JFET Input

U
U
L
U
U
U
U
U
U

P/626

Extended Automotive Temperature Range (-4DoC to +1 05'C)

-I MC33201

1200 nA

1

6.0

1

2.0

1

50

1

50

1

1+1.8 1 +12 1

Military Temperature Range (-55°C to +125'C)
MC1536
MC1741
MC1776
MC35001B
MC35071
MC35071A
MC35080
MC35081
MC35171

0.02
0.5
0.0075
100 pA
0.5
500 nA
200pA
200pA
0.1

5.0
5.0
5.0
5.0
5.0
3.0
1.0
1.0
4.5

10
15
15
10
10
10
10
10
10

3.0
200
3.0
50pA
75
50
100 pA
100 pA
20

100
50
200
50
25
50
25
25
50

TL081M

200pA

6.0

10

100 pA

25

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-3

JG

Internally Compensated
Commercial Temperature Range (O°C to +70°C)
LF353
LF412C

200pA
200pA

10
3.0

10
10

100pA
100 pA

25
25

4.0
4.0

13
13

±5.0
+5.0

±18
±18

LF442C
LM358

100pA
0.25

5.0
6.0

10
7.0

50pA
50

25
25

2.0
1.0

6.0
0.6

1.0
0.5
0.7
0.5
0.5

5.0
6.0
10
6.0
10

2.0
10
10
10
7.0

200
200
300
200
50

31.6
20
20
25
20

15
1.1
1.1
1.0
1.0

7.0
0.8
0.8
0.5
0.6

±5.0
±1.5
+3.0
±2.5
±3.0
±3.0
±3.0
±1.5
+3.0

±18
±18
+36
±18
±18
±18
±18
±18
+ 36

0.5
0.5
100pA
100pA
0.5
500nA
200pA
200pA
0.1 nA
200pA
200pA
200pA
200pA
200pA
400pA

5.0
6.0
10
5.0
5.0
3.0
3.0
3.0
3.0
6.0
15
6.0
10
6.0
15

10
10
10
10
10
10
10
10
10
10
10
10
10
10
10

200
200
100pA
70pA
75
50
100pA
100pA
0.05
100pA
200pA
50pA
50pA
100pA
200pA

50
20
25
25
25
50
25
25
25
4.0
4.0
50
25
50
25

2.8
2.8
4.0
4.0
4.5
4.5
8.0
16
4.0
2.0
2.0
4.0
4.0
4.0
4.0

1.6
1.6
13
13
10
10
30
55
10
6.0
6.0
13
13
13
13

±3.0
±3.0
±5.0
±5.0
+3.0
+3.0
±5.0
±5.0
±2.5
±2.5
±2.5
±5.0
±5.0
±5.0
±5.0

±22
±18
±18
±18
+44
+44
±22
±22
±18
±18
±18
±18
±18
±18
±18

LM833
MCI458
MCI458C
MC1747C
MC3458

MC455BAC
MC4558C
MC34002
MC340028
MC34072
MC34072A
MC340B2
MC34083
MC34182
TL062AC
TL062C
TL072AC
TL072C
TL082AC
TL082C

JFET Input
JFET Input, Low Offset,
Low Drift
Low Power JFET Input
Single Supply,
Low Power Consumption
Low Noise, Audio
Dual MCI741
General Purpose
Dual MC1741
Split Supplies
Single Supply
Low Crossover Distortion
High Frequency
High Frequency
JFET Input
JFET Input
High Performance,
Single Supply
High Speed JFET Input
Decompensated
Low Power JFET Input
Low Power JFET Input
Low Power JFET Input
Low Noise JFET Input
Low Noise JFET Input
JFET Input
JFET Input

N/626
N/626, D/751
N/626
N/626, J/693
N/626
PI, U
PI
L,P2
PI, U

PI
PI,U
P/626
P/626
P/626, U
P/626, U
P/626
P/626
P/626
P/626
P/626
P/626, JG/693
P/626, JG/693
P/626, JG/693
P/626, JG/693

Split or Single
Supply Op Amp
Automotive Temperature Range (-40°C to +85°C)
1.0

0.6

75

100
typ
20

1.0

0.6

10
10
2.0

75
50
70

25
50
25

4.5
4.5
7.4

1.0
2.0

2.0
2.0

180
150

150
31.6

500nA
50 nA
0.10

2.0
2.0
4.5

1.0
1.0
10

6.0
6.0
20

0.5
0.1 nA
650 nA
100pA
200pA

3.0
3.0
1.0

2.0
10
0.56
5.0
10

50
0.05
25nA
50pA
100pA

LM2904

0.25

7.0

7.0

50

MC3358

5.0

8.0

10

MC33072
MC33072A
MC33076

0.50
500 nA
0.5

5.0
3.0
4.0

MC33077
MC33078
MC33102
(Awake)
(Sleep)
MC33172

1.0
750nA

MC33178
MC33182
MC33272
MC33282
TL062V

200~V

6.0

10
10
2.6

±1.5
+3.0
±1.5
+3.0
+3.0
+3.0
±2.0

±13
+26
±18
+ 36
+44
+44
±18

Split Supplies
Single Supply
Split Supplies
Single Supply
High Performance,
Single Supply
High Output Current

37
16

II
7.0

±2.5
±5.0

±18
±18

Low Noise
Low Noise

50
25
50

4.0
0.3
1.8

1.0
0.1
2.1

±2.5
±2.5
+3.0

±18
±18
+44

50
25
31.6
50
4.0

5.0
4.0
5.5
30
2.0

2.0
10
11.5
12
6.0

±2.0
±2.5
±1.5
±2.5
±2.5

±18
±18
±18
±18
±18

Sleepmode™
Micropower
Low Power Single
Supply
High Output Current
Low Power JFET Input
High Performance
Low Input Offset JFET
Low Power JFET Input

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-4

N/626, J/693
PI/626
P/626, U
P/626, U
PI/626
P2I648C
P/626
N/626
P/626,
D/751
P/626
P/626
P/626
P/626
P/646
P/626

Dual Operational Amplifiers

Device

liB
(fiA)
Max

VIO
(mV)
Max

TCVIO
(fiVPC)
Typ

(continued)

110
(nA)
Max

Avol
(V/mV)
Min

BW
(Av = 1)
(MHz)
Typ

SR
(Av = 1)

(V/J.tS)
Typ

Supply
Voltage
(V)
Min

Description

Max

Suffix!
Package

Low V Rail-to-RailT "

Power Op Amp
Single Supply
Military Temperature Range (-55°C to +125°C)
LM158

0.15

5.0

10

30

50

1.0

0.6

± 1.5
+3.0

±18
+ 36

MC1558
MC1747
MC3558

0.5
0.5
0.5

5.0
5.0
5.0

10
10
10

200
200
50

50
50
50

1.1
1.0
1.0

0.8
0.5
0.6

MC4558
MC35002
MC35002B
MC35072
MC35072A
MC35172

0.5
100 pA
100 pA
0.5
500 nA
0.1

5.0
10
5.0
5.0
3.0
4.5

10
10
10
10
10
10

200
100pA
50pA
75
50
20

50
25
50
25
50
50

2.8
4.0
4.0
4.5
4.5
1.8

1.6
13
13
10
10
2.1

±3.0
±3.0
±1.5
+ 3.0
±3.0
±5.0
±5.0
+ 3.0
+ 3.0
+ 3.0

±22
±22
±18
+ 36
±22
±22
±22
+44
+44
+44

TL062M
TL072M
TL082M

200 pA
200 pA
200 pA

6.0
6.0
6.0

10
10
10

100 pA
50 pA
100pA

4.0
35
25

2.0
4.0
4.0

6.0
13
13

±2.5
±5.0
±5.0

±18
±18
±18

Avol
(V/mV)
Min

BW
(Ave: 1)
(MHz)
Typ

SR
(Av=1)
(V/fiS)
Typ

100 pA
100pA
50 pA
50

25
50
25
25

4.0
4.0
2.0
1.0

13
13
6.0
0.6

50

, Split Supplies
Single Supply
Low Power Consumption
Dual MC1741
Dual MC1741
Split Supplies
Single Supply
High Frequency
JFET Input
JFET Input
High Performance,
Single Supply
Low Power Single
Supply
Low Power JFET Input
Low Noise JFET Input
JFET Input

J/693

JFET Input
JFET Input
Low Power JFET Input
Low Power
Consumption
Quad MC1741
Norton Input

N/646
N/646
N/646
J/632, N/646

No Crossover
Distortion
Quad MC1741
JFET Input
JFET Input
High Performance,
Single Supply
High Speed JFET Input
Decompensated
Low Power JFET Input
Low Power JFET Input
Low Power JFET Input

L, P/646

U
L
U
U
U
U
U
U
U
JG
JG
JG

Quad Operational Amplifiers

Device

liB
(fiA)
Max

VIO
(mV)
Max

TCVIO
(fiV/OC)
Typ

110
(nA)
Max

Supply
Voltage
(V)
Min

l\IIax.

±5.0
± 5.0
±5.0
± 1.5
+ 3.0
±3.0
±1.5
+ 3.0
± 1.5
+ 3.0
±3.0
±5.0
±5.0
+ 3.0
+ 3.0
±5.0
±5.0
±2.5
±2.5
±2.5

±18
±18
±18
±16
+32
±18
±18
+36
±18
+ 36
±18
±18
±18
+44
+44
±22
±22
±18
±18
±18

Internally. Compensated
Commercial Temperature Range (O°C to +70°C)
LF347
LF347B
LF444C
LM324

200 pA
200 pA
100 pA
0.25

10
5.0
10
6.0

10
10
10
7.0

LM348
MC34011
LM3900
MC3403

0.2
0.3

6.0

-

-

-

25
1.0

1.0
5.0

0.5
0.6

0.5

10

7.0

50

20

1.0

0.6

0.5
200 pA
200 pA
0.5
500 nA
200pA
200 pA
0.1 nA
200pA
200 pA

6.0
10
5.0
5.0
3.0
12
12
10
6.0
15

15
10
10
10
10
10
10
10
10
10

200
100 pA
100 pA
75
50
100 pA
100 pA
0.05
100 pA
200 pA

20
25
50
25
50
25
25
25
4.0
4.0

1.0
4.0
4.0
4.5
4.5
8.0
16
4.0
2.0
2.0

0.5
13
13
10
10
30
55
10
6.0
6.0

MC4741C
MC34004
MC34004B
MC34074
MC34074A
MC34084
MC34085
MC34184
TL064AC
TL064C

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-5

J/632, N/646
J/632, N/646

L, P/646
L, P/646
L, P/646
L, P/646
L, P/646
P/646
P/646
P/646
N/646
N/646

Quad Operational Amplifiers

(continued)

$~ ..
v "'}
«A(V/Ils)
....

',"< '

•."Tyjj .... .Mln

TL074AC
TL074C
TL084AC
TL084C

200pA
200 pA
200 pA
400pA

6.0
10
6.0
15

10
10
10
10

50pA
50pA
100 pA
200 pA

50
25
50
25

4.0
4.0
4.0
4.0

13
13
13
13

±5.0
±5.0
±5.0
±5.0

±18
±18
±18
±18

Low Noise JFET Input
Low Noise JFET Input
JFET Input
JFET Input

± 1.5
+ 3.0
±3.0

±16
+ 32
±18

Split Supplies
Single Supply
Quad MC1741

±15
+ 28
±13
+ 26
±18
+ 36
+ 44

Norton Input

J/632,
J/632,
J/632,
J/632,

N/646
N/646
N/646
N/646

Industrial Temperature Range (-2S0C to +8S°C)
LM224

0.15

5.0

7.0

30

50

1.0

0.6

LM248

0.2

6.0

-

50

25

1.0

0.5

J/632, N/646
J/632, N/646

Automotive Temperature Range (-40'C to +8S0C)
MC3301/
LM2900
LM2902

0.3

-

-

-

1.0

4.0

0.6

0.5

10

-

50

-

1.0

0.6

MC3303

0.5

8.0

10

75

20

1.0

0.6

MC33074

0.5

4.5

10

75

25

4.5

10

±2.0
+ 4.0
± 1.5
+ 3.0
± 1.5
+ 3.0
+ 3.0

MC33074A
MC33079
MC33174

500 nA
750 nA
0.1

3.0
2.5
4.5

10
2.0
10

50
150
20

50
31.6
50

4.5
9.0
1.8

10
7.0
2.1

+ 3.0
±5.0
+ 3.0

+44
±18
+ 44

MC33179
MC33184
MC33274
MC33284
TL064V

0.5
0.1 nA
650 nA
100pA
200 pA

3.0
10
1.0
2.0
9.0

2.0
10
0.56
5.0
10

50
0.05
25nA
50pA
100pA

50
25
31.6
50
4.0

5.0
4.0
5.5
30
2.0

2.0
10
11.5
12
6.0

±2.0
±2.5
±1.5
±2.5
±2.5

±18
±18
±18
±18
±18

2.2

1.0

Differential Low Power
Differential
General Purpose
High Performance,
Single Supply
High Performance
Low Noise
Low Power Single
Supply
High Output Current
Low Power JFET Input
High Performance
Low Input Offset JFET
Low PowerJFET Input

P/646
N/646
J/632, N/646
P/646
L, P/646
L, P/646
N/646
P/646
P/646
P/646
P/646
P/646
N/646

Extended Automotive Temperature Range (-40'C to + 1OSOC)

1MC33204

1200 nA 1 6.0

1

2.0

1

50

1 50

1

1 +1.8 1 +12 1

Low V Rail-to-RaiI™

1 P/646, D/751 A 1

CMOS Low Power,
Drives Low-Impedance
Loads
CMOS Very Low Power

L, P/646

Low Power
Consumption
General Purpose,
Low Power
Quad MC1741
JFET Input
JFET Input
High Performance,
Single Supply
High Performance
High Speed JFET Input
Decompensated
Low Power, Single
Supply
Low Power JFET Input
Low Noise JFET Input
JFET Input

J/632, N/646

Telecommunications Temperature Range (-40°C to +8S0C)
MC143403

1.0 nA

30

-

200pA

45 dB

0.8

1.5

4.75

12.6

MC143404

1.0 nA

30

-

200pA

60 dB

0.8

1.0

4.75

12.6

±16
+32
±18
+36
±22
±22
±22
+ 44

L, P/646

Military Temperature Range (-55°C to + 125°C)
LM124

0.15

5.0

7.0

30

50

1.0

0.6

MC3503

0.5

5.0

7.0

50

50

1.0

0.6

MC4741
MC35004
MC35004B
MC35074

0.5
100pA
100 pA
0.5

5.0
10
5.0
5.0

15
10
10
10

200
100 pA
50 pA
75

50
25
50
25

1.0
4.0
4.0
4.5

0.5
13
13
10

±1.5
+ 3.0
±1.5
+ 3.0
±3.0
±5.0
±5.0
+ 3.0

MC35074A
MC35084
MC35085
MC35174

500 nA
200 pA
200 pA
0.1

3.0
12
12
4.5

10
10
10
10

50
100pA
100pA
20

50
25
25
50

4.5
8.0
16
1.8

10
30
55
2.1

+ 3.0
±5.0
±5.0
+ 3.0

+44
±22
±22
+ 44

TL064M
TL074M
TL084M

200 pA
200pA
200 pA

9.0
9.0
9.0

10
10
10

100pA
50pA
100 pA

4.0
35
25

2.0
4.0
4.0

6.0
13
13

±2.5
±5.0
±5.0

±18
±18
±18

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-6

L, P/646
L
L
L
L
L
L
L
L
J/632
J/632
J/632

CASE 626
PLASTIC
PSUFFIX

High Frequency Amplifiers
A variety of high frequency circuits with features ranging
from low cost simplicity to multi-function versatility marks
Motorol~s line of integrated amplifiers. Devices described
here are intended for industrial and communications

applications. For devices especially dedicated to consumer
products, I.e., TV and entertainment radio. (See the
Consumer Electronics Circuits section.)

MC1490

50
50

45
45

+ 6.0

+18

50

10
60
100

+6.0

+18

45
35

P/626,

D/751
P/626

AGe Amplifiers
MC1490/1350 Family Wideband General Purpose Amplifiers
and instrumentation amplifiers, IF (Intermediate Frequency)
amplifiers for radio and TV receivers, and transmitter power
output control. Many uses will be found in medical instrumentation, remote monitoring, video/graphics processing, and a
variety of communications equipment. The family of parts
using the same basic die (identical circuit with slightly different
test parameters) is listed in the following table.

The MC1490 and MC1350 family are basic building
blocks - AGC (Automatic Gain Controlled) RFNideo amplifiers. These parts are recommended for applications up
through 70 MHz. The best high frequency performance may
be obtained by using the physically smaller SOIC version
(shorter leads) - MC1350D. There are currentiy no other
.RF ICs like these, because other manufacturers have
dropped their copies. Applications include variable gain video

MC1545/1445 Gated 2-Channel Input
Differential input and output amplifier with gated 2-channel
input provides for a wide variety of switching purposes. Typical
50 MH? bandwidth makes it suitable for high frequency

applications such as video switching, FSK circuits,
multiplexers, etc. Gating circuit is useful for AGC control.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-7

Miscellaneous Amplifiers
Motorola provides several Bipolar and CMOS special
purpose amplifiers which fill specific needs. These devices
range from low power CMOS programmable amplifiers and
comparators to variable-gain bipolar power amplifiers.

Output I

Inputs I {
MC3405/MC3505 Dual Operational Amplifier and
Dual Voltage Comparator
This device contains two differential input operational
amplifiers and two comparators; each set capable of single
supply operation. This operational amplifier/comparator
circuit will find its applications as a general purpose product for
automotive circuits and as an industrial "building block."

Vee
Inputs 2 {
output 2

CMOS
MC14573 Quad Programmable Operational Amplifier
MC14576B/MC14577B Dual Video Amplifiers
MC14575 Dual Prn,nr~'mnn" ...,t .. O'Der'aticmal AlTlDlifler

Video Amplifiers
Operational Amplifiers
and Comparators

2
2 and 2

3.0t015V

± 1.5 to ± 7.5 V

Upto 10 MHz

MC145768
MC145778

DC to 1.0 MHz

MC14575

(1)5.0 to 10V for surface mount package
(2)± 2.5 to ± 5 V for surface mount package

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-8

P/626, F/904
D/7518, P/648

CASE 646
PLASTIC
N, PSUFFIX

Comparators

Bipolar
LM111
LM211
LM311

0.1
0.1
0.25

3.0
3.0
7.5

0.01
0.01
0.05

200 k
200 k
200 k

8.0
8.0
8.0

200
200
200

+ 15,-15
+ 15,-15
+ 15,-15

With strobe, will operate
from single supply

-55to+ 125
-25to+85
Oto + 70

J-8
J-8
N/626, J-8

o to + 70
Oto + 70
-40to+85

N/626
N/626
N/626

Requires only 10 I1A from
single-ended supply

Dual

Bipolar
LM393
LM393A
LM2903

0.25
0.25
0.25

5.0
2.0
7.0

0.05
0.05
0.05

200 k
200 k
200 k

6.0
6.0
6.0

1300
1300
1500

±1.5to±18
or
3.0 to 36

MC3405
MC3505

0.5
0.5

10
5.0

0.05
0.05

200 k
200 k

6.0
6.0

1300
1300

± 1.5 to ±7.5 This device contains 2 op
or
amps and 2 comparators in
a single package
3.0 to 15

Oto + 70
-55to+125

L, P/646
L

0.001

30

0.0001

2k

3.0

1000

± 1.5 to ±7.5 This device contains 2 op
amps and 2 comparators in
or
a single package
3.0 to 15

-40to+85

P/648
017518

Designed for single or split
supply operation, input
common mode includes
ground (negative supply)

CMOS
MC14575

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-9

Comparators

(continued)

Quad

Bipolar
LM139
LM139A
LM239
LM239A
LM339
LM339A
LM2901
MC3302

0.1
0.1
0.25
0.25
0.25
0.25
0.25
0.5

5.0
2.0
5.0
2.0
5.0
2.0
7.0
20

0.025
0.025
0.05
0.05
0.05
0.05
0.05
0.5

200 k
200k
200 k
200 k
200 k
200 k
100 k
30k

6.0
6.0
6.0
6.0
6.0
6.0
6.0
6.0

1300
1300
1300
1300
1300
1300
1300
1300

MC3430
MC3431
MC3432
MC3433

40
40
40
40

6.0
10
6.0
10

1.0Typ
1.0Typ
1.0Typ
1.0Typ

1.2 k
1.2 k
1.2 k
1.2 k

16
16
16
16

33
33
40
40

0.001

30

0.0001

2.0k

3.0

1000

±1.5to±18 Designed for single or split
supply operation, input
or
common mode includes
3.01036
ground (negative supply)

+5.0,-5.0
+5.0,-5.0
+5.0,-5.0
+5.0,-5.0

High speed comparatorl
sense-amplifier

-55 to + 125
-55to+125
-25to+85
-25to+85
Oto + 70
Oto + 70
-40to+85
-40to+85
Oto+70
Oto+70
o to+ 70
o to+ 70

J
J
J, N/646
J, N/646
J, N/646
J, N/646
N/646
P/646
L,
L,
L,
L,

P/648
P/648
P/648
P/648

CMOS
MC14574

±1.5to±7.5 Externally programmable
or
power dissipation with 1 or 2
3.0 to 15
resistors

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-10

-40to+85

P/648
017518

Amplifiers
Device

Function

LF347,LF351,LF353
LF356, LF356B,
LF357B,LF357
LF411C, LF412C
LF441C,LF442C,LF444C
LM11C, LM11CL
LM101A, LM201A, LM301A
LM124, LM224,
LM324, LM324A
LM158, LM258, LM358
LM248, LM348
LM307
LM308A
LM833
LM2900
LM2902
LM2904
LM3900
MC1436, MC1436C, MC1536
MC1445, MC1545
MC1458, MC1458C, MC1558

JFET Input Operational Amplifiers ................................. 2-13
Monolithic JFET Input Operational Amplifiers ........................ 2-15

MC1490P
MC1733CB
MC1741, MC1741C
MC1747, MC1747C
MC1748C
MC1776, MC1776C
MC3401, MC3301
MC3403, MC3503, MC3303
MC3405, MC3505
MC3458, MC3558, MC3358
MC3476
MC4558, AC, C
MC4741, MC4741C
MC33076
MC33077
MC33078, MC33079
MC33102
MC33171, MC35171,
MC33172, MC35172,
MC33174, MC35174
MC33178, MC33179
MC33201, MC33202,
MC33204
MC33272, MC33274

Page

Low Offset, Low Drift JFET Input Operational Amplifiers ..............
Low Power JFET Input Operational Amplifiers . . . . . . . . . . . . . . . . . . . . . ..
Precision Operational Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Operational Amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Quad Low Power Operational Amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . . ..

2-24
2-27
2-34
2-40
2-50

Dual Low Power Operational Amplifiers ............................
Quad MC1741 Operational Amplifiers ..............................
Internally Compensated Monolithic Operational Amplifier .............
Precision Operational Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Dual Low Noise, Audio Operational Amplifier. . . . . . . . . . . . . . . . . . . . . . ..
Quad Single Supply Operational Amplifier ..........................
Quad Low Power Operational Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Dual Low Power Operational Amplifier .............................
Quad Single Supply Operational Amplifier ..........................
High Voltage, Internally Compensated Operational Amplifiers .........
Gate Controlled Two Channel Input Wideband Amplifiers .............
Dual MC1741 Internally Compensated, High Performance Dual
Operational Amplifiers .........................................
RF/IF/Audio Amplifier ............................................
Differential Video Wideband Amplifier ..............................
Internally Compensated, High Performance Operational Amplifiers .....
Dual MC1741 Internally Compensated, High Performance
Operational Amplifiers .........................................
High Performance Operational Amplifier ............................
Micropower Programmable Operational Amplifiers ...................
Quad Single Supply Operational Amplifiers .........................
Quad Low Power Operational Amplifiers ............................
Dual Operational Amplifier and Dual Comparator ....................
Dual, Low Power Operational Amplifiers ............................
Low Cost Programmable Operational Amplifier ......................
Dual Wide Bandwidth Operational Amplifiers ........................
Quad MC1741 Operational Amplifiers ..............................
Dual High Output Current, Low Power, Operational Amplifier ..........
Dual, Low Noise Operational Amplifier .............................
Dual/Quad Low Noise Operational Amplifiers .......................
Sleep-ModeTt" Two-State Micropower Operational Amplifier ...........
Low Power, Single Supply Operational Amplifiers ....................

2-60
2-66
2-77
2-80
2-85
2-144
2-50
2-60
2-144
2-91
2-95
2-101
2-106
2-114
2-122
2-127
2-131
2-135
2-144
2-154
2-159
2-175
2-181
2-185
2-189
2-194
2-202
2-213
2-222
2-234

High Output Current, Low Power, Operational Amplifiers .............. 2-241
Rail-to-RaiiTt" Operational Amplifiers ............................... 2-251
Single Supply, High Slew Rate Low Input Offset Voltage Amplifiers ..... 2-259

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-11

Amplifiers
Device

Function

MC33282, MC33284

Low Input Offset, High Slew Rate, Wide Bandwidth, JFET Input
Operational Amplifiers ......................................... 2-268
Rail-to-Rail™, Sleepmode™ Two-State Operational Amplifier .......... 2-276
JFET Input Operational Amplifiers ................................. 2-277

MC33304
MC34001, MC35001,
MC34002, MC35002,
MC34004, MC35004
MC34071,2,4, MC35071,2,4,
MC33071,2,4

Page

High Slew Rate, Wide Bandwidth, Single Supply
Operational Amplifiers ......................................... 2-284

MC34080/MC35080
thru
MC34085/MC35085

High Slew Rate, Wide Bandwidth,
JFET Input Operational Amplifiers ............................... 2-300

MC34181,2,4, MC33181,2,4,

Low Power, High Slew Rate, Wide Bandwidth, JFET Input
Operational Amplifiers .........................................
Dual Power Operational Amplifier ..................................
Low Power JFET Input Operational Amplifier ........................
Low Noise, JFET Input Operational Amplifiers .......................
JFET Input Operational Amplifiers .................................

TCA0372
TL062, TL064
TL071,TL072,TL074
TL081, TL082,TL084

2-311
2-320
2-324
2-331
2-337

Comparators
LM111, LM211, LM311
LM139,A, LM239,A
LM339,A
LM293,
LM2903, LM393,A
LM2901
LM2903
MC3302
MC3405, MC3505
MC3430 thru MC3433

Highly Flexible Voltage Comparators .. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-44
Quad Single Supply Comparators ................................. 2-56
Single Supply, Low Power, Low Offset Voltage Dual Comparators ...... 2-72
Quad Single Supply Comparators .................................
Single Supply, Low Power, Low Offset Voltage Dual Comparators ......
Quad Single Supply Comparators .................................
Dual Operational Amplifier and Dual Comparator ....................
Quad, Differential Voltage Comparator/Sense Amplifiers ..............

2-56
2-72
2-56
2-159
2-167

ADDENDUM
Operational Amplifier Application Information ................................................. 2-343

RELATED APPLICATION NOTES
App Note

Title

AN926, AR115

Techniques for Improving the Settling of a DAC and Op
LF357, MC34084,
Amp Combination. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. MC34085, MC34087

AN587

Analysis and Design of the Op Amp Current Source ............... MC1741

Related Device

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-12

LF347
LF351
LF353

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

JFET Input Operational Amplifiers

FAMILY OF JFET
OPERATIONAL AMPLIFIERS

These low cost JFET input operational amplifiers combine two state-of-the-art
linear technologies on a single monolithic integrated circuit. Each internally
compensated operational amplifier has well matched high voltage JFET input
devices for low input offset voltage. The JFET technology provides wide
bandwidths and fast slew rates with low input bias currents, input offset currents,
and supply currents.
These devices are available in single, dual and quad operational amplifiers
which are pin-compatible with the industry standard MC1741, MC1458, and the
MC3403/LM324 bipolar devices.

NSUFFIX
PLASTIC PACKAGE
CASE 626
DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

• Input Offset Voltage of 5.0 mV Max (LF347B)

PIN CONNECTIONS

• Low Input Bias Current: 50 pA
Offset Null 1

• Low Input Noise Voltage: 16 nV/v'Hz
Noninvt Input 3

• Wide Gain Bandwidth: 4.0 MHz

VEE 4

LF351
(Top View)

+
5 Offset Null

• High Slew Rate: 13V/IlS
OutputA 1

• Low Supply Current: 1.8 mA per Amplifier

7 Output B

• High Input Impedance: 1012 n

LF353
(Top View)

• High Common Mode and Supply Voltage Rejection Ratios: 100 dB

".

NSUFFIX
PLASTIC PACKAGE
CASE 646

1

PIN CONNECTIONS

MAXIMUM RATINGS
Rating

Symbol

Value

Unit

Supply Voltage

VCC
VEE

+18
-18

V

Differentiallnpul Voltage

VID

±30

V

VIDR

±15

V

tsc

Continuous

Input Voltage Range (Note 1)
Output Short Circuit Duration (Note 2)
Power Dissipation at TA = +25DC
Derate above TA =+25 DC
Operating Ambient Temperature Range
Operating Junction Temperature Range
Storage Temperature Range

PD

900

mW

1/0JA

10

mW/DC

TA

010 +70

DC

TJ

115

DC

Tstg

-65 to +150

DC

NOTES: 1. Unless otherwise specified, the absolute maximum negative input voltage
is limited to the negative power supply.
2. Any amplifier output can be shorted to ground indefinitely. However, if more
than one amplifier output is shorted simultaneously, maximum junction
temperature rating may be exceeded.

ORDERING INFORMATION
Function

Package

LF351D
LF351N

Single
Single

SO-8
Plastic DIP

LF353D
LF353N

Dual
Dual

SO-8
Plastic DIP

LF347BN
LF347N

Quad
Quad

Plastic DIP
Plastic DIP

Device

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-13

LF347,LF351,LF353
ELECTRICAL CHARACTERISTICS (VCC

=+ 15 V, VEE = -15 V, TA =25°C, unless otherwise noted.)
LF347B
Symbol

Characteristics
Input Offset Voltage (RS" 10 k, VCM

= O)

VIO

TA = +25°C
O°C "TA" +70°C
Avg. Temperature Coefficient 01 Input Offset Voltage
RS" 10 k, O°C" TA" +70°C
Input Offset Current (VCM

= 0, Note 3)
TA = +25°C
O°C" TA" +70°C

Input Bias Current (VCM

= 0, Note 3)

Max

Min

Typ

Max

-

1.0

-

5.0

-

5.0
8.0

-

10
13

Input Resistance
Common Mode Input Voltage Range

= ±10 V, RL = 2.0 k)

-

10

-

-

10

-

25

100
4.0

-

25

-

100
4.0

pA
nA

-

50

200
8.0

pA
nA

-

n

I1V/oC

-

-

-

-

50

200
8.0

-

-

q

-

1012

-

-

10 12

VICR

±11

+15
-12

-

±11

+15
-12

50
25

100

-

100

-

-

25
15

-

-

V
V/mV

AVOL

TA = +25°C
O°C" TA" +70°C

Unit
mV

liB

TA = +25°C
O°C" TA" +70°C

Large-Signal Voltage Gain (VO

Typ

~VloJ~T

110

LF347,LF351,LF353

Min

Vo

±12

±14

-

±12

±14

-

V

Common Mode Rejection (RS" 10 k)

CMR

80

100

-

70

100

-

dB

Supply Voltage Rejection (RS " 10k)

PSRR

80

100

-

70

100

-

Output Voltage Swing (RL

= 10k)

Supply Current

ID
LF347
LF351
LF353

Slew Rate (AV

=+ 1)

Gain-Bandwidth Product
Equivalent Input Noise Voltage
(RS =100
I = 1000 Hz)

n.

Equivalent Input Noise Current (I

= 1000 Hz)

Channel Separation (LF347, LF353)
1.0 Hz" I" 20 kHz (Input Referred)

-

dB
mA

-

7.2

11

-

-

-

-

-

7.2
1.8
3.6

11
3.4
6.5

SR

-

13

-

-

13

-

V/I1S

BWp

-

4.0

-

4.0

-

24

-

-

MHz

en

-

nV/{RZ

in

-

0.01

-

0.01

-

pA/{RZ

-

-

-120

-

-

-120

-

dB

24

For Typical Characteristic Performance Curves, reler to MC34001, 34002, 34004 data sheet.
NOTES: 3. Input bias currents of JFET input op amps approximately double lor every 10°C rise in junction temperature. To maintain junction
temperatures as close to ambient as is possible, pulse techniques are utilized during test.

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA

2-14

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

LF356, LF356B,
LF357*, LF357B*

MONOLITHIC JFET
OPERATIONAL AMPLIFIERS

Monolithic JFET Input
Operational Amplifiers
These internally compensated operational amplifiers incorporate highly
matched JFET devices on the same chip with standard bipolar transistors. The
JFET devices enhance the input characteristics ofthese operational amplifiers by
more than an order of magnitude over conventional amplifiers.
This series of op amps combines the low current characteristics typical of FET
amplifiers with the low initial offset voltage and offset voltage stability of bipolar
amplifiers. Also, nulling the offset voltage does not degrade the drift or common
mode rejection.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

};~
1

JSUFFIX
CERAMIC PACKAGE
CASE 693

• Low Input Bias Current: 30 pA
• Low Input Offset Current: 3.0 pA
• Low Input Offset Voltage: 1.0 mV
• Temperature Compensation of Input Offset Voltage: 3.0 !lV/DC
• Low Input Noise Current: 0.01 pAl {HZ

PIN CONNECTIONS

• High Input Impedance: 10120
• High Common Mode Rejection: 100 dB
• High DC Voltage Gain: 106 dB

Offset Null

1

Invt Input

2

7

Vee

Noninvllnput

3

6

Output

VEE

4

5

Offset Null

[fop View)

SERIES FEATURES
• LF356/356B: Wide Bandwidth
• LF357/357B: Wider Bandwidth Decompensated (AVmin = 5)

Fast Setting Time to O.ot 0/0

LF356/356B

LF357/357B

APPLICATIONS

1.5115

1.5115

50 V/I15

The LF series is suggested for all general
purpose FET input amplifier requirements where
precision and frequency response flexibility are
of prime importance.

Fast Slew Rate

12 VlI15

Wide Gain Bandwidth

5.0"MHz

20 MHz

Low Input Noise Voltage

12nV/..fHz

12nV/..fHz

ORDERING INFORMATION
Device
LF356BJ,J
LF357BJ,J

Temperature Range
0° to +70°C

Package

Specific applications include:
• Sample and Hold Circuits
• High Impedance Buffers
• Fast D/A and AID Converters
• Precision High Speed Integrators
• Wideband, Low Noise, Low Drift Amplifiers

'NOTE: The LF357/357B are designed for wider
bandwidth applications. They are decompensated (AV(min) = 5).

Ceramic DIP
Ceramic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-15

LF356,LF357,LF356B,LF357B
MAXIMUM RATINGS
Rating

Symbol

LF356B/357B

LF3561357

Unit

Supply Voltage

VCC
VEE

+22
-22

+18
-18

V

Differential Input Voltage

±30

V

±16

V

VID

±40

Input Voltage Range (Note 1)

VIDR

±20

Output Short Circuit Duration

TSC

Continuous

Operating Ambient Temperature Range

TA

Oto +70

Operating Junction Temperature

TJ

150

DC

Tstg

--65 to +150

DC

Storage Temperature Range

..

DC

NOTE: 1. Unless otherwise specified. the absolute maximum negative Input voltage IS equal to
the negative power supply voltage.

Circuit Schematic
Offset Null

r-~----~----~--------~--------~------~----------~V~
7

Inverting Input
2 0-------1-----,

-+__

L-~--__

J7

~-;Q4

CL

+-~

H

__+-.,,25___t-<> Out

+-~~C

Rl

Noninverting
Input

Qll

R8
50

·Cl = 5.0pF on lF357
**C2 = 2.0pF on LF357

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-16

6

LF356,LF357,LF356B,LF357B
DC ELECTRICAL CHARACTERISTICS (VCC = +15 Vto 20 V, VEE =-15 Vto-20 VlorlF356B/357B; VCC = +15 V,
VEE = -15 V lor lF356/357; TA = 0° to +70°C, unless otherwise noted.)
LF356B/357B
Characteristics
Input Offset Voltage (RS = 50 n, VCM = 0)
(TA = 25°C)
(Over Temperature)
Avg. Temperature Coefficient 01 Input Offset Voltage
(RS = 50 n)

Symbol

1YP

Max

-

3.0

5.0
6.5

-

3.0

-

10
13

-

5.0

-

0.5

-

-

Input Offset Current (VCM = OJ (Note 3)
(TJ = 25°C)
(TJ ,;;lO°C)

110

Input Bias Current (VCM = 0) (Note 3)
(TJ = 25°C)
(TJ ,;;70°C)

liB

-

q

Output Voltage Swing
(VCC = 15 V, VEE =-15 V, Rl = 10 ill)
(VCC = 15 V, VEE = -15 V, Rl = 2 ill)

Min

-

aVloIaT
aTC/aVIO

Input Resistance (TJ = 25°C)

Max

-

5.0

-

-

0.5

-

3.0

2.0
1.0

-

-

3.0

50
2.0

pA
nA

30

100
5.0

-

30

-

-

200
8.0

pA
nA

-

-

1012

-

1012

-

-

IlV/ 0 C
permV

n
V/mV

AVOl
50
25

200

±12
±10

±13
±12

±11

+15.1
-12.0

-

Va

-

25
15

200

±12
±10

±13
±12

±10

+15.1
-12.0

-

-

-

Common Mode Rejection

CMR

85

100

-

80

100

-

Supply Voltage Rejection (Note 4)

PSR

85

100

-

80

100

-

-

5.0

-

7.0

-

-

-

5.0

V

V

VICR

10

IlV/ 0 C

-

Input Common Mode Voltage Range
(VCC = 15 V, VEE =-15 V)

Supply Current (TA = 25°C, VCC = 15 V, VEE =-15 V)
lF356B/357B
lF356/357

Unit
mV

Via

Change in Average TC with Via Adjust
(RS = 50 n) (Note 2)

large Signal Voltage Gain
(Va = ±10 V, Rl = 2.0 k, VCC = 15 V, VEE =-15 V)
(TA=25°C)
(O°C';; TA';; +70°C)

LF356/357

1YP

Min

-

dB
dB
rnA

10

AC ELECTRICAL CHARACTERISTICS (VCC = 15 V, VEE = -15 V, TA = 25°C, unless otherwise noted.)
lF356B1356
Characteristic
Slew Rate (Note 5)
(Av = 1) lF356
(Av = 5) lF357

Symbol

Min

1YP

SR
7.5

12

-

20
1.5

-

5.0

ts

-

1.5

-

Equivalent Input Noise Voltage
(RS = 100 I = 100 Hz)
(RS = 100 I = 1000 Hz)

en

Equivalent Input Noise Current
(I = 100 Hz)
(I = 1000 Hz)

in

Input Capacitance

Ci

-

-

-

-

GBW

-

1YP

-

Settling Time to 0.01% (Note 6)

n.
n.

-

Min

-

-

Gain Bandwidth Product

-

LF357B/357
Max

30

50

15
12

-

-

15
12

0.01
0.01

-

-

0.01
0.01

-

3.0

3.0 .

Max

-

-

-

Unit
V/IlS

MHz
Ils
nV/{HZ

-

-

-

pN{HZ

pF

NOTES, 1. Unless otherwise specified, the absolute maximum negative input voltage is equal to the negative power supply.
2. The temperature coefficient of the adjusted input offset voltage changes only a small amount (0.5 jJ.vrc typically) for each mV of adjustment from its original
unadjusted value. Common mode rejection and open·loop voltage gain are also unaffected by offset adjustment.
3. The input bias currents approximately double for every 1aoc rise injunction temperature, TJ. Due to limited tesltime, the input bias currents are correlated
10 junction temperature. Use of a heat sink is recommended if input bias current Is to be kept 10 a minimum.
4. Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common practice.
5. The minimum slew rate limits apply for the LF356B and the LF357B, but do not apply for the LF356 or LF357.
6. Settling time is defined here, for a unity gain inverter connection using 2.0 k resistors for the LF356. It is the time required for the error voltage (the voltage
althe inverting input pin on the amplifier) to sellie to within 0.01 % of its final value from the time a 10 V step input is applied to the inverter. For the LF357,
AV = -5.0, the feedback resistor from output to input is 2.0 k and the output step is 10 V (see settling time test circuit).

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-17

LF356,LF357,LF356B,LF357B
Figure 2. Input Bias Current
versus Input Common Mode Voltage

Figure 1. Input Bias Current
versus Case Temperature
80

cc-

~

oS

;:- lOOk

i

10k

o

lk

:::>

~
5

-'. ~ dI!Ii
VCC= 15 V, V~E~

100

5'"

'-- VCC=10V.VEE=-10V

D..

~

~
a:
a~

Vee = 20 V, VEE = -20 V

1.0

VCC = 5 V, VEE = -5 V

-

0.1
-55

-25

60
50

r-r-r--

30

.J.

.1

Vee=+15V
VEE=-15V
TA=25°C
RL=50k

40

~ 20
~ 10

10

~

70

V'

....- ,.-

~

...,.,

".

V

~

p

Wrth Heat Sink

~

o

5.0
35
65
70
TC. CASE TEMPERATURE (OC)

,........,

Free Air

~

-5.0
0
5.0
VIC. COMMON MODE INPUT VOLTAGE (V)

-10

10

Figure 4. Supply Current
versus Supply Voltage

Figure 3. Output Voltage Swing
versus Supply Voltage
40

1
C!l

z

~

30

~

RL= 2.0 k
TA=25°C

-

w

V

C!l

i:§

g
5D..
50

20

/"

V

."

7.0

a:
a:

:::>
0

~

a..
a..
:::>
en

. / V"

.P

~

o
o

8.0

w

IZ

,//

10

I

4.0

~

o

5.0

Figure 5. Negative Current Limit
~ -20

z

~
t!l

-15

i:§

g
I-

~

-10

--

I

0

-10

15

i:§

-15

-20

-25

5

10

~

5.0

\

~
-30

-35

1\
5.0

-40

10

15

20

25

30

ISink. OUTPUT SINK CURRENT (mA)

ISink. OUTPUT SINK CURRENT (mA)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-18

I

",

~

"

-5.0

25

VCC=+15V VEE=-15V
TC=25°C
-

g

z

>0

~
t!l

"""" ,

~w

I

~

-

........

~ -5.0

TC = 25°C

10
15
20
Vee. VEE. SUPPLY VOLTAGE (±V)

~ 20

VEE=-15V
TC=25°C
-

,

~

Figure 6. Positive Current Limit

~CCJ5V

C!l

....- ....-1"'"

3.0
2.0

20

5.0
10
15
VCC. VEE. SUPPLY VOLTAGE (±V)

6.0
5.0

35

40

LF356,LF357,LF356B,LF357B
Figure 7. Positive Common Mode
Input Voltage Limit

a
~

!:i

~ -20

25

!:J

g
~

V

~
W

::;;

z
o
::;;

~
o

~
~

g
~

O°C ~ TA ~ 70°C
20

V

Q

o

15

10

V

~

,/

~ -10

/'

o
::;;

::;;

V

o
~ -5.0

V

2:

~

o

ro
15
~
Vcc, POSITIVE SUPPLY VOLTAGE M

0
-5.0

:>

Figure 10. Output Voltage Swing
versus Load Resistance

~ 10M

32

=
-

z

~
w

,t28

CJ
Z

~ 100M

~
w

g

f5

9
~100 k

CJ

TA=25°C

i"'""

!:i

0

>

t-

~

:::>
D..

7.0

8.0

a
~

~

"

~

LF356 ..........

z 5.0

~
;;:

4.0
-35

15

::;

LF357 Curve Identical,
but Multiplied by 4.

r"\..

~ 6.0

-55

J
)

V

~

I
.~
VCC= 10V, VEE=-10V - I--1VCC=15V,VEE=-15V _ I - -

........

....

w

-15 5.0 25
45
65
85
TA, AMBIENT TEMPERATURE (0C)

10

I II
I II

TA = 25°C
Vee=+15V
VEE=-15V
I

10mv/1

I

r/1.0mV

lF356, AV = -1
5.0 LF357, Av =-5

CJ

!:i

~

j'--....

0
1.0mV

!:i

!5 -5.0

r-105

100

Figure 12. Inverter Settling TIme
(LF356 and LF357 Series)

>
C>

"\.

~

ffi

12

1.0
10
Rt.. OUTPUT LOAD RESISTANCE (ItO)

~ 8.5
::;;

8a:

-

I

16

10
15
20
Vee, VEE, SUPPLY VOLTAGE (tV)

"\.

k-'"

20

:::>

?

Figure 11. Gain Bandwidth Product
(LF356 and LF357 Series)
8.0

24

!:i
0

D..

o
..::.

10 k5.0

VCC=+15V
VEE=-15V
TA=25°C

-a.

RL=2.0k
Rs=50

!:J

t5

-30

-10
-15
-20
VEE, NEGATIVE SUPPLY VOLTAGE M

I

Figure 9. Open-Loop Voltage Gain
Z.

,/

TC=25°C

w

Z

+

./

-15

8

w

5.0

o

/'

V

5.0 V

:>

Figure 8. Negative Common Mode
Input Voltage Limit

aw

10mV

o

125 145

>0 -10

I II
0.1

0.2

0.5

"\.\1

1.0
2.0
Is, SETTUNG TIME ~)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-19

~\.
5.0

10

LF356,LF357,LF3568,LF3578
Figure 13. Normalized Slew Rate
o

fQ

1.8

~

1.6
1.4

c

I

'\...

11.2
lii1 1.0
~
II:

~

'"

Figure 14. Open-Loop Frequency Response

2.0

~~~=~~:~
r--....

lF356n

...............

0.8
0.6

-

--

w

C!J

!:§ 90

-15

-35

o

50 30

i

10

..::.

0.2
-55

70

~

0.4

o

~
c..

5.0 25
45
65
85 105
TA, AMBIENT TEMPERATURE (OC)

125

r-.....

iii' 5.0

f--

Phase

.....

Gain

....
"'f,

I

C!J

-

-35

':'1

1.0

I-

""""-

I

~

,
................

100 1.0k 10k lOOk 1.0M 10M
t, FREQUENCY (HZ)

C§

W

II:

W

c..

O!!
I-

::>

c..

'"c..

1'1

I-

::>
0

0.1

.:;

-100

N

-150
100

10k

IWh 1ase._

i'-o..

25

.......

Gain

~~
4

_2pF

"-

.....

~

VCC=15V
VEE=-15V

""'
.........

-5.0 r.

r\"-'

-15 f-",:,'I
1.0

+

I':' I
2.0

1.0 M

10M

Figure 18. Output Impedance
(LF357 Series)
150

l'f.J
r

lOOk

t, FREQUENCY (Hz)

100

35

5.0

................

w

-50~

10
20
t, FREQUENCY (mHz)

III
III

15

l.......

z

e.
w

I I III

45

iii'

~

,

........

0

en
w

Figure 17. Bode Plot
(LF357 Series)

z

LF356

aSl

'"

2.0

100

~

@

-25

VCC=+15V
VEE=-15V

50

::--.

2.0k

-15

s

LF357

'

......... ........
.......

200
150

~ -5.0

r-r--

Figure 16. Output Impedance
(LF356 Series)

25

S

I

,~

o

Figure 15. Bode Plot
(LF356 Series)

15

VCC=+15V VEE=-15V -

1i" ~

-10
10

145

I

L

~ 110 ~

I I I I
10
20
t, FREQUENCY (mHz)

a75

w

en
w
w

"
"

I\,

25 II:
C!J
0
w
-25 e.
w
-75 ~
c..

I\,

-125

0

10

TA= +25°C
VCC=+15V
VEE=-15V

AV = 100

z

C§

w
c..

O!!

2.0k

1.0

~

!5
c..

I-

::>
0

~

0.1

':'

0.01
1.0k

-175
100

10 k

lOOk
100M
t, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-20

':'

~
10M

LF356,LF357,LF3568,LF3578
Figure 19. Common Mode Rejection Ratio

Figure 20. Undistorted Output Voltage Swing
28

o

~

~

RL =2.0k
TA = 25°C
VcC=+15V
VEE=-15V

z

o

~

100

~
c

80

,-

jjj

~
z
~

::;;

8

-

LF356

"'-

40

..........

"

20

o

10

100

LOk

10k

r.....

12

=>
0-

8.0

f-

~

...........

lOOk

~

lF356

,

\

I I I

LF357 1.1
Av=5

f-

LF357

........

16

C!)

"'- ....."'- .....

60

,

20

'"w
!:i

TA = 25°C
VCC=+15V
VEE=-15V
RJ=2.0k
Av= 1
<1% Dis!.

1\
\

24

G
C!)
z
'§

=>
0

~

........

100M

I'

"""- i"

4.0

o

10M

lOOk

10k

1M

10M

t, FREQUENCY (Hz)

t, FREQUENCY (Hz)

Figure 21. Power Supply Voltage Rejection Ratio

o

~ 120

a:
~ 100

~jjj

80

-...

~

""-

a:

llj

60

!:i~

40

~

It
=>

'"a:'"
0-

"

"-

V

lF35~

"-

"-

Neg~tive Supply

H
o

20

TA = 25°C
VCc=+15V
VEE=-15V

..........

lF3~6

100 1.0k

(,

PosHive SuppJy

140

w

120

~

I

"" LF~6/7
" ."-'"
IV

11'..

10k lOOk 1.0M 10M 100M
t, FREQUENCY (Hz)

Figure 23. Equivalent Noise Voltage
(Expanded Scale)

!:3

100

~

80

~

60

~

~
;;!;

~

:;;
5

@

40

III

TA = 25°C
Vcc=+15V
VEE=-15V

C!)

-

i

Figure 22. Equivalent Noise Voltage

I¥
--,.

-

w

C!)

!:3
0
>

w

60

f-

40

'"az

r-... ......

80

=>
0;;!;
fZ
W

....J

:;;

20

20

\

\.
~

.......

5

0
10

w.. o10

0

100
LOk
t, FREQUENCY (Hz)

10k

0:::

CD

500

1.0k

t, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-21

50k

100 k

LF356,LF357,LF356B,LF357B
Figure 25. Large Power Bandwidth Amplifier

Figure 24. Driving Capacitive Loads

10k

5.0k
*lF356 R = 5.0k
lF357 R = 1.25k

Vee

VCC

6

1.0k

r--.,
I
I I I CL
I = I 0.01 !IF

>--6_-0 Vout

L _ _ .J

VEE
Oue to a unique output stage design these amplifiers have the
ability to drive large capacitive loads and still maintain stability.
• Cl(max) S! 0.01!1F
• Overshoot s 20%
• SetUing time (lsi S! 5.0 !IS

+1.0V,..."
"
-I.OV ,~\

+IOV
-IOV

C\

V

A

For distortion < 1% and a 20 Vp·p Vout
swing, power bandwidth is 500 kHz.

Figure 27. Settling Time Test Circuit

Figure 26. Input Offset Voltage Adjustment

2.0k,0.1%

VCC
10Vr
0.....J

+15V
2k,0.1%
*400,0.1%

5.0k,0.1%
*1.Ok,O.I%
VEE
• VIO is adjusted wilh a 25 k potentiometer
• The potentiometer wiper is connected to VCC
• For potentiometers wiIh temperature coefficient of 100 pprn/"C or less
the addftional drill wfth adjust is = 0.5!1V/"C/mVo! adjustment.
• Typical 01lerall drill: 5.0 !lV/"C ±(0.5!1V/"C/mV of adjustmenL)

Summing ~--=7W~----'
Node
_I-::::-:-:-:c:-::-O +15V
• SetUing time Is tested wiIh the LF356 connected
as unity gain inverter and lF357 connected
for Av = -5.0.
'
• FET used to isolate the probe capacitance.
• Output = 10 V Slap
• Av = -5.0 for LF357

Figure 28. Noninverting Unity Gain Operation
Figure 29. Inverting Unity Gain
R2
RIC ..

R2

(21t)(5~ MHz)

~

RI = R2+RS "
4

AV(OC) = I
'-3dB = 5.0 MHz

=

=S'

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-22

RIC> (21t)

(5~0 MHz)

R1=~
4

Av(ocl

=-1
!-3dB = 5.0 MHz

LF356,LF357,LF356B,LF357B
Figure 31. Isolating Large
Capacitive Loads

Figure 30. Wide BW, Low Noise,
Low Drift Amplifier

R2
,-----_--'lAtv---..,...-O Vout
5.tk

C2

I

Cc

R2

20pF

VCC

f(max) '" 240 kHz

R3
10

+IOV""
C
./ "'"'""
-IOV

-lout

RL
5.lk

+2.0V:F
-2.0V

Sr
• Power BW: f(max) = 2" Vp '" 240 kHz

• Overshoot 6%
• ts=IOIiS
• When driving large CL. the Vout slew rate is determined by
CL and lout(maxr

• Parasitic input capacitance (Cl '" 3.0 pF for LF356 and LF357 plus
any additional tayout capacitance) interacts with feedback elements
and creates undesirable high frequency pole. To compensate add C2
such that: R2C2 '" RICI.

tNout lout
0.02
- - ='" -0
5 VIliS = 0.04 ViliS (with CL shown)
Ll.t
CL
.

Figure 32. 8-Bit DIA with Output Current
to Voltage Conversion

Vref

MSB
AI
A2
A3
A4
A5
A6
A7
A8

Vref = 2.0 Vdc
RI4=RI5", 1.0kQ
RO =5.0 kQ
RO

LSB
16

1\
15pF

3
VEE

Theoretical Vo
Vref
[AI
A2
A3 A4
A5
A6 A7 AS]
VO=R14(RO) 2"" +4"+8+16 +"32 + 64 + 128+256
Adjust Vref. RI4 or RO so that Vo with all digital inputs at high level
is equal to 9.961 V.
2.0V
[1
I
I
Vo =1.iJi( (5.0k) "2+"4 + 8

I
1
I
1
I]
+ 16 +"32 +64" + 128 + 256

= 10V [255] =9961 V
256
.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-23

LF411C
LF412C

MOTOROLA

SEMICONDUCTOR----TECHNICAL DATA

SINGLE/DUAL JFET
OPERATIONAL
AMPLIFIER

Low Offset, Low Drift JFET
Input Operational Amplifier

SILICON MONOLITHIC
INTEGRATED CIRCUIT

Through innovative design concepts and precision matching this monolithic
high speed JFET input operational amplifier family offers very low input offset
voltage as well as low temperature coefficient of input offset voltage. The
amplifier requires less than 3.4 mA per amplifier of supply current yet exhibits
greater than 2.7 MHz of gain bandwidth product and more than 8.q V/Jls slew
rate. Through the use of JFET inputs the amplifier has very low input bias
currents and low input offset currents. The amplifier utilizes industry standard
pinouts which afford the user the opportunity to directly upgrade circuit
performance without the need for redesign.
The LF411 C and LF412C are available in the industry standard plastic 8-pin
DIP and SO-8 surface mount packages, and specified over the commercial
temperature range.

.~
1

N SUFFIX
PLASTIC PACKAGE
CASE 626

8~

• Low Input Offset Voltage: 2.0 mV Max (Single)
3.0 mV Max (Dual)
• Low T.C. of Input Offset Voltage: 10 JlV/oC

o SUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

• Low Input Offset Current: 20 pA
• Low Input Bias Current 60 pA
• Low Input Noise Voltage: 18 nVI {Hz
• Low Input Noise Current: 0.01 pAl {Hz
• Low Total Harmonic Distortion: 0.05%
• Low Supply CurrElnt: 2.5 mA
• High Input Resistanc~: 10 12 n

PIN CONNECTIONS

LF411C

• Wide Gain Bandwidth: 8.0 MHz
• High Slew Rale: 25 V/Jls (Typ)

Offset Null

• Fast Settling Time: 1.6 JlS (to within 0.01 %)

1

Invt Input

2

7

Vee

Noninvt Input

3

6

Output

VEE

4

5

Offset Null

7

Output2

(Single, Top View)

LF412C
ORDERING INFORMATION
Device

Function

LF411CD
LF411CN

Single

LF412CD
LF412CN

Dual

Test Temperature
Range

Package

Output 1

1

Inputs 1 {

2

6

0° to +70°C

SO-8
Plastic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-24

VEE

4

(Dual, Top View)

}

Inputs 2

LF411C, LF412C
MAXIMUM RATINGS
Rating
Supply Voltages
Input Differential Voltage Range (Note 1)
Input Voltage Range (Note 1)

Symbol

Value

VCC,IVEEI

+18

Unit
V

VIDR

±30

V

VIR

±15

V

Output Short Circuit Duration (Note 2)

tsc

Indefinite

sec

Maximum Junction Temperature

TJ

+150

°c

Operating Ambient Temperature Range

TA

Oto 70

°C

RaJA

100
180

°CIW

Storage Temperature

Tstg

-60 to +150

°C

Maximum Power Dissipation

PD

(Note 2)

mW

Thermal Resistance
(Junction-to-Ambient)

LF411CN/412CN
LF411 CD/412CD

NOTES: 1. Input voltages should not exceed VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature
(TJ) is not exceeded.
3. Measured with VCC and VEE simultaneously varied.

Representative Circuit Schematic
(Each Amplifier)

Output

t

Inputs +O----j-----t-----'
r---+--~~_+--+-~

Offset

Null
lF411C
Only
Bias Circuitry

Common 10 All
Amplifiers

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-25

LF411C, LF412C

DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE =-15 V, TA = 0' to 70'C, unless otherwise noted.)
Symbol

Min

Typ

Max

Input Offset Voltage (RS = 10 k Q, VCM = 0 V, Va = 0 V)
LF411
LF412

Characteristics

IVlol

-

0.5
1.0

2.0
3.0

Average Temperature Coefficient 01 Input Offset Voltage
(RS = 10 kQ, VCM =0 V, VO=OV)

AVIOAT

-

10

-

-

20

-

100
2.0
100
2.0

pA
nA
pA
nA
pA
nA
pA
nA

Input Offset Current (VCM = 0 V, Va = 0 V)
LF411 TA = 25'C
TA = 0' to 70'C
LF412 TA = 25°C
TA = 0' to 70'C

110

Input Bias Current (VCM = 0 V)
LF411 TA = 25'C
TA = 0' to 70'C
LF412 TA = 25°C
TA = 0' to 70'C

liB

Large Signal Voltage Gain (Va = ±1 0 V, RL = 2.0 k Q)
LF411 TA=25°C
TA = 0° to 70°C
LF412 TA = 25°C
TA = 0° to 70°C

Unit
mV

25

-

-

-

0.6

-

-

200
4.0
200
4.0

25
15
25
15

80

-

150

-

-

0.5

AVOL

-

IlVI'C

VlmV

V

Output Voltage Swing (VID = ±1.0 V, RL = 10 kQ)
LF411

VO+
VOVO+
VO-

LF412
Common Mode Input Voltage Range (Va = 0 V)
LF411

+12

-

+12

-

+13.9
-14.7
+14.0
-14.0

-12

-12
V

VICR
-11

-

+14
-14
+15
-12

70
70

90
100

-

70
70

86
100

-

-

2.5
2.8

3.4
6.8

Typ

Max

+ 11

-

LF412

+11

Common Mode Rejection (VCM = ±11 V, RS ,;; 10k Q)
LF411
LF412

CMR

Power Supply Rejection (Note 3)
(VCC VEE = +15 V, -15 V to +5.0 V, -5.0 V)
LF411
LF412

PSR

Power Supply Current (Va = 0 V)
LF411
LF412

ID

-

-11

dB

dB
~

mA

-

AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE =-15 V, TA = 25°C, unless otherwise noted.)
Characteristics

Symbol

Min

SR

Slew Rate (\lin = -10 V to +10 V, RL = 2.0 kQ, AV = +1.0)
LF411
LF412
Gain Bandwidth Product
LF411
LF412

CS

Differential Input Resistance (VCM = 0 V)

Rin

Equivalent Input Voltage Noise (RS = 100 Q, f = 1.0 kHz)
LF411
LF412

en

Equivalent Input Noise Current (I = 1.0 kHz)
LF411
LF412

in

25
13

2.7
2.7

8.0
4.0

-

-

-120

-

10 12

-

-

30
25

-

0.01
0.01

-

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-26

-

8.0
8.0
GBW

Channel Separation (I = 1.0 Hz to 20 kHz, LF412)

Unit
VIIlS

MHz

-

-

dB
kQ
nVI{Hz

'-

-

pA/1RZ

LF441C
LF442C
LF444C

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Low Power JFET Input
Operational Amplifier
These JFET input operational amplifiers are designed for low power
applications. They feature high input impedance, low input bias current and low
input offset current. Advanced design techniques allow for higher slew rates, gain
bandwidth products and output swing. The LF441 C device provides for the
external null adjustment of input offset voltage.
These devices are specified over the commercial temperature range. All are
available in plastic dual in-line and SOIC packages.
• Low Supply Current: 200 J,tAIAmplifier
• Low Input Bias Current: 5.0 pA
• High Gain Bandwidth: 2.0 MHz
• High Slew Rate: 6.0 V/IlS

LOW POWER
JFETINPUT
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT

J.
1

• High Input Impedance: 1012 n

NSUFFIX
PLASTIC PACKAGE
CASE 626

• Large Output Voltage Swing: ±14 V
• Output Short Circuit Protection

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

PIN CONNECTIONS
EQUIVALENT CIRCUIT SCHEMATIC (EACH AMPLIFIER)
- - - - - - _ - - - - - - -.......-----<1>----0

Ohset Null

VCC

Inputs {:
VEE

Inputs

{:o---+----+--'

8

1

4

:

7
8
5

NC
VCC
Output
Offset Null

(Single, Top View)
R4

~-'Vvv---I-'\IV\,--o

Output 1

Output

VEE

1

4

(Dual, Top View)

,.-

Rl

1

NSUFFIX
PLASTIC PACKAGE
CASE 646

"Null adjusbnent pins for l.F441 only.
l.F441C input offset vohage
null adjust circuH

DSUFFIX
PLASTIC PACKAGE
CASE 751 A
(SO·14)

PIN CONNECTIONS

ORDERING INFORMATION
Device

Function

Tested
Temperature Range

Package

LF441 CD
LF441CN

Single

SO-8
Plastic DIP

LF442CD
LF442CN

Dual

SO-8
Plastic DIP

LF444CD
LF444CN

Quad

SO-14
Plastic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-27

(Quad, Top View)

LF441C, LF442C, LF444C
MAXIMUM RATINGS
Rating

Symbol

Value

Unit

Vs

+36

V

VIDR

±30

V

Input Voltage Range (Notes 1 and 2)

VIR

±15

V

Output Short Circuit Duration (Note 3)

tsc

Indelinite

sec

TJ

+150

°C

Tstg

-60 to +150

°C

Supply Voltage (Irom VCC to VEE)
Input Differential Voltage Range (Note 1)

Operating Junction Temperature (Note 3)
Storage Temperature Range

NOTES: 1. Differential voltages are at the noninverting inputterminal with respect to the inverting
input terminal.
2. The magnitude 01 the input voltage must never exceed the magnitude 01 the supply
or 15 V, whichever is less.
3. Power dissipation must be considered to ensure maximum junction temperature (TJ)
is not exceeded. (See Figure 1.)

DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE =-15 V, TA = OOto 70°C, unless otherwise noted.)
Characteristics

Symbol

Input Offset Voltage (RS = 10 k.Q, Va = 0 V)
Single: TA = +25°C
TA = 0° to +70°C
Dual: TA = +25°C
TA = 0° to +70°C
Quad: TA = +25°C
TA = 0° to +70°C

Typ

Max

-

3.0

-

3.0

-

5.0
7.5
5.0
7.5
10
12

Input Offset Current (VCM = 0 V, Va = 0 V)
TA = +25°C
TA = 0° to +70°C

aVloIaT

10

-

JlV/oC

-

0.5

50
1.5

pA
nA

-

3.0

100
3.0

pA
nA

+14.5
-12

+11

V

60

-

3.0

110

= 0 V)

-

liB

Common Mode Input Voltage Range (TA = +25°C)

VICR

-11
Large Signal Voltage Gain (VO
TA = +25°C
TA = 0° to +70°C

= ±1 0 V, RL = 10 k.Q)

-

V/mV

AVOL
25
15

Output Voltage Swing (RL = 10 k.Q)

-

VO+
VO-

+12

-

+14
-14

Common Mode Rejection (RS ~ 10 kn, VCM = VICR, Va

CMR

70

86

Power Supply Rejection (RS = 100 n, VCM

PSR

70

84

-

200
400
800

Power Supply Current (No Load, Va
Single
Dual
Quad

Unit
mV

-

Average Temperature Coefficient 01 Offset Voltage (RS = 10 kg, Va = 0 V)

Input Bias Current (VCM = 0 V, Va
TA = +25°C
TA = 0° to +70°C

Min

Via

= 0 V)
= 0 V, Va = 0 V)

= 0 V)

-

V

-12

-

ID

dB
dB
JlA

-

250
500
1000

AC ELECTRICAL CHARACTERISTICS (VCC = + 15 V, VEE = -15 V, TA = +25°C, unless otherwise noted.)
Characteristics
Slew Rate (Vin = -10 V to +10 V, RL = 10 k.Q, CL = 10 pF, AV = +1.0)
Settling Time
(AV=-1.0, RL = 10 kg, Va = 0 Vt0+10 V)
Gain Bandwidth Product (I

To within 10 mV
To within 1.0 mV

= 200 kHz)

Equivalent Input Noise Voltage (RS = 100 g, 1 = 1.0 kHz)

Symbol

Min

Typ

SR

0.6

6.0

ts

-

1.6
2.2

GBW

0.6

2.0

en

-

47

Max

Unit

-

VI JlS
JlS

-

nV/fHz

MHz

Equivalent Input Noise Current (I = 1.0 kHz)

in

-

0.01

-

pA/fHz

Input Resistance

Ri

1012

Channel Separation (I = 1.0 Hz to 20 kHz)

CS

-

-

dB

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-28

120

n

LF441C, LF442C, LF444C
Figure 1. Maximum Power Dissipation versus
Temperature for Package Variations

Figure 2. Input Bias Current versus
Input Common Mode Voltage

§'" 2400
g

z

0

~

20

1 II 1 1

2000

en
6

i'~O.14

a:
w

~
c..

1200

::>
::;:

800

::;:

~

::;:

~

.....

l""'\-...

~

I"
....

~

::>
c..
;5;

I'

j!
ill!!

0 20 40 60 80 100 120 140
TA •AMBIENT TEMPERATURE (0C)

::>

~

ffi
u::

'"~

,

o. 1

;5;

_rJi

0.01
0.001
-55

- -----25

---

....-

,,

c..

w

..

,,

~2: 15

~~

;5;(!l
w~

5.0

125

-55°e

o

5.0

10
15
20
Vee. 1VEE I. SUPPLY VOLTAGE (V)

25

Figure 6. Negative Input Common Mode Voltage
Range versus Negative Supply Voltage

..
.
.
..

-55°e $TA

$

125°e

~
~

~

~

~

~

./

,/

,/

./

V
./

./'

r£

o
o

140

9100
100

U

~

~

c..

25°C

./

10

~6

i3c.. >

180

-,

125°e

CJ)

-55°e $ TA $ 125°e

~!!l

10

::>

0
25
50
75
TA • AMBIENT TEMPERATURE (0C)

Uz

5.0

260

!z
w
12

a

",/

20

z

0

300

~
~ 220

Figure 5. Positive Input Common Mode Voltage
Range versus Positive Supply Voltage

8::;:

-5.0

Figure 4. Supply Current versus Supply Voltage

::I

1.0

J

VICR. INPUT COMMON MODE VOLTAGE (V)

I

U

-

/

V

-10

~

VCC=+15V
100 f- VEE=-15V
VeM=OV
10

I

5.0

o

160

Figure 3. Input Bias Current versus Temperature
1

/
II

10

'"I-

I"

1-====

-55 -40 -20

~

.1.

U

I'r-.;t:--

o

1000

15 -

1

Vee=+15V
VEE=-15V
TA=25°e

::>

.....

f-lio}-

-

a:
a:

.....

400

ci
c..

<.s
!z
w

!&114Ipi~ Pllas~c ~ac~a~e

1600

CJ)

1

5.0
10
15
Vee. POSITIVE SUPPLY VOLTAGE (V)

20

-5.0
-10
-15
VEE. NEGATIVE SUPPLY VOLTAGE (V)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-29

-20

LF441C,LF442C,LF444C
Figure 8. Output Voltage versus
Output Sink Current

Figure 7. Output Voltage versus Output
Source Current
-20

20

r-~
w

VCC=+15V
VEE=-15V

t§

...c..

...
::>

.......

\

-55°C

0

>

~

-....

15

C!l

10

::>

°~

5.0

.......

\ \
\ \

\
\

-10

""'

-

5 -5.0
~

~

7.0

o
o

8.0

2.0

40
I
I
I
RL=10kQ
35
i- -550C S TA S 125°C
~
30

'"w

25

t§

20

3::

°...>
::>

...

°~

,

10

...

5.0

o

o

1.4

a..

1.3

a?

~

~ 1.2

~ 1.1
z
~

1.0

~

0.9

~
~

'"

...a.~

./
14

1.0 k

16

OJ

VCC = +15 V
VEE= -15 V
RL = 10 kQ
CL = 100 pF

~
~

-25

0

25

w

C!l

t§

-....... - ...
.

50

100

'"

10

-"

.....

~
a.
o

........

'3
:2:

~ -10

°..::.

75

2.0 k
3.0 k 4.0 k
6.0 k
RL, LOAO RESISTANCE (Q)

~:::..

20

J-20
-50

r- - r- - r- - 8.0 k 10k

Figure 12. Open-Loop Voltage Gain and
Phase versus Frequency

0.7
-75

/

/
~ 16

0.8

Sf 0.6

'"C!l

VCC=+15V
VEE=-15V
TA =125°~

/

18

o.

a:

~

-

/

::>

--

20

/
1/

20

...
::>

. .
-.. r-.......

18

/

22

t§

,/

4.0
6.0
8.0
10
12
VCC, 1VEE I, SUPPLY VOLTAGE M

16

/

24

w

Figure 11. Normalized Gain Bandwidth
Product versus Temperature

t3

::>

2.0

./

/"

z

3::

C!l

./

./

26

C!l

/'

15

o

-i:

,/

a.

::>

28

-a

C!l

4.0 6.0
8.0
10 12
14
-10, OUTPUT SINK CURRENT (rnA)

Figure 10. Output Voltage Swing
versus Load Resistance

c.

z

25°C

r- li5°C

Figure 9. Output Voltage Swing
versus Supply Voltage

C!l

-

........

::>

1\

2.0
3.0
4.0
5.0
6.0
10, OUTPUT SOURCE CURRENT (rnA)

I

_5!OC - -

t§

...~

1

-15

C!l

\

25°C \

1

VCC=+15V
VEE = -15 V

w

125°C

\
1.0

.1.

_

125

_
-

VCC=+15V
VEE=-15V
RL=10kQ
CL=100pF
TA=25°C

r.....

90

1'\
1\

.....

180

'"[3
225 ~

.e:
270

1.0

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

'"~

(.)

r-.

f, FREQUENCY (MHz)

2-30

C!l

135 ~
w

i"

Gain

0.1

TA, AMBIENT TEMPERATURE (0C)

a:

Phase

..........

ill"
w

10

LF441C,LF442C,LF444C
Figure 14. Total Output Distortion
versus Frequency

Figure 13. Slew Rate versus Temperature
8.0

~

2.5

-

......

7.0

w

~

~

~ 6.0

~
o

:z 2.0

"\

en

a:
en

5.0

~
~ 1.5

,,
,

VCC=+15V
VEE=-15V
RL = 10 kQ
AV = +1.0

4.0
-75

-50

I

VCC=+15V
VEE=-15V
TA = 25°C

C

~
~ 1.0

,,

AV= 100 ~

o
ci

i=

"'L
·l~

AV= 10

o
-25
0
25
50
75
TA, AMBIENTTEMPERATURE (0G)

100

125

V

I

0.5

10

1.0 k
t, FREQUENCY (Hz)

100

...,.

10 k

lOOk

Figure 16. Open-Loop Voltage
Gain versus Frequency

Figure 15. Output Voltage Swing
versus Frequency
10 100

1:

s

=>
c>=>

'-

:z

30

o

0

>

1\

VCC = +15V
VEE=-15V
RL=10kQ
AV=+1.0
1% THO
TA = 25°C

g

\

:Z
w
c-

1.0M

lOOk

~

"\.

VCC=+15V
VEE = -15 V
RL=10kQ
TA = 25°C

20
-"
0

«>
10k

"\.

40

o

~

1.0 k

60

c-

o

o

1.0

0.1

"_"\.
10

100

t, FREQUENCY (Hz)

Figure 17. Common Mode Rejection
versus Frequency
140

I1III

:z
2100

~

~

80

g

60

w

:;;

-

1"-"

VCC=+15V
VEE=-15V
VCM= OV
20 AVCM=±1.5V
a:
TA=25'C
:;;
<..> 0100
1.0k
:z
~ 40

I I1I1III1

CMR = 20Log

I II11I

140

!rl

(A:~; xAOM )

- ... ~SR

,., 80 I-~

r--..
........
10k

lOOk

1.0M

1~111_111~It\VC~ I

VCC=+15V

~ 120 VEE = -15 V 1I--+-++++tttt----1:z
TA = 25°C
Ql00~~++~~-4~LU~--+-

~

8

10k

10M

Figure 18. Power Supply Rejection
versus Frequency

t\VCM~t\VO

~120

1.0k

t, FREQUENCY (Hz)

lOOk

1.0M

I Il'HoIL

111111111111 ...... 10-1

""""""-!... (~\.lEE=±1.5 V)"

R:

60

$c::

40

0..

20

a:
~

0

~

PSR

ADM

~

I

+PSR = 20Log
-PSR = 20Log

(A~QV'AOM
EE

" ' ....
r--- ....

)
I·"

'----'-J..J..J..J.!.L.IL.---'---'-L.l.J.J..L11._ _.L...J....J....<..l.U.IL........J.....J..J...1..J.J.UJ

100

1.0 k

t, FREQUENCY (Hz)

10k

t, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-31

1111

(AVCC = ±1.5 V)

-1f-1"'!-I.!:I-Ht---H~t+ttl

AVCC

'-'

t\VO
t\VEE

l"r;.iill

(~ :---...) r...

III"

III

lOOk

1.0M

LF441C, LF442C, LF444C
Figure 20. Open-Loop Voltage
Gain versus Supply Voltage

Figure 19. Input Noise Voltage versus Frequency

~:>

:>

70

w

~

40

~

w

(!)

(!)

0

~

g
c..

>

w

en

30

f-

20

az

=>
c..
~

'"

RL = 10ka

z

I"-

<:

50

I.OM

~

60

10

IIII I II

CD

o

10

100

1.Ok
t, FREQUENCY (Hz)

10k

lOOk

o

25°C

9

VCC=+15V
VEE=-15V
VCM =OV
TA=25°C

:Z
~
o
.::I
o
~

lOOk

:aw

300 f--

t:l

<3
w

200

z

c..
~

f-

150

50

100

=>
c..

10k

0

5.0

rfi

>
0

ex:

"c..
w

100

I

I

.1.

w

(!)

~

.......y
1.0k

.........

10'~V j

~

:/

~

10k
t, FREQUENCY (Hz)

",
lOOk

V

1.0mV

0

0

AV=IO /AV=I.O

"

25

JI

10 I- Vcc= +15V
I- VEE=-15V
TA = 25°C
5.0

!i;

50

o

10
15
20
VCC, I VEE I , SUPPLY VOLTAGE M

Figure 22. Inverter Settling Time

::;;
0

AV=IOV

-

-55°C

~V

2:

V~~ ~ I ~III~ V

VEE=-15V
250 f-- TA = 25°C

125°C -

V

Figure 21. Output Impedance versus Frequency
350

,..

>

5c..

~

-5.0

f-

=>
0

~

-10

' \ 1.0mV
10m
VI'\.\.

JI 1

0.1

1.0M

1.0

Is, SETILING TIME (f.1s)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-32

10

LF441C,LF442C,LF444C
SMALL SIGNAL RESPONSE

Figure 23. Inverting

Figure 24. Noninverting

t, TIME (O.511S/DIV)

t, TIME (0.5 flS/DIV)

2'
c

:>
E
0

!2.
w
~

t!i

0

§;
I-

::>

1=
::>
0

~

LARGE SIGNAL RESPONSE

,....-......

Figure 25. Inverting

Figure 26. Noninverting
~-~

t, TIME (2.0 flS/DIV)

t, TIME (2.0 flS/DIV)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-33

LM11C
LM11CL

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Precision Operational Amplifiers
PRECISION
OPERATIONAL AMPLIFIERS

The LM11C is a precision,low drift operational amplifier providing the best
features of existing FET and Bipolar op amps. Implementation of super gain
transistors allows reduction of input bias currents by an order of magnitude over
earlier devices such as the LM308A. Offset voltage and drift have also been
reduced. Although bandwidth and slew rate are not as great as FET devices,
input offset voltage, drift and bias current are inherently lower, particularly over
temperature. Power consumption is also much lower, eliminating warm-up
stabilization time in critical applications.
Offset balancing is provided, with the range determined by an external
low resistance potentiometer. Compensation is provided internally, but
external compensation can be added for improved stability when driving
capacitive loads.
The preciSion characteristics of the LM11 C make this device ideal for
applications such as charge integrators, analog memories, electrometers,
active filters, light meters and logarithmic amplifiers.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

• Low Input Offset Voltage: 100 (.tV

NSUFFIX

• Low Input Bias Current: 17 pA

PLASTIC PACKAGE
CASE 626

• Low Input Offset Current: 0.5 pA
• Low Input Offset Voltage Drift: 1.0 (.tVfOC
• Long-Term Stability: 10 (.tV/year
• High Common Mode Rejection: 130 dB
Schematic Diagram
Balance

Compensation

r-4_+-~~----------~----~~--4_~------r-~vcc

PIN CONNECTIONS
17.4k

17.4k
7.0k

018

Balance

1

Inputs {

2

3.0pF

VEE

4

8

Balance

7

Vcc

6

Output

5

Compensation

[Top View)

Oulpul

ORDERING INFORMATION

L----------+-----____--~___+-'---~>__--___-o VEE

Device

LMllCLN, CN

MOTOROLA LlNEARIiNTERFACE ICs DEVICE DATA

2-34

Operating
Temperature Range

Package
Plastic DIP

LM11C, LM11CL
MAXIMUM RATINGS
Rating

Symbol

Power Supply Voltage

Value

Unit

VCCto VEE

40

Vdc

Differential Input Current (Note 1)

110

±10

mA

Output Short Circuit Duration (Note 2)

tsc

Indefinite

Power Dissipation (Note 3)

Po

500

mW

TJ

85

'c

Tstg

-55 to +125

'C

Operating Junction Temperature
Storage Temperature Range

ELECTRICAL CHARACTERISTICS (TJ = 25'C, unless otherwise noted [Note 4 J.)
LMllC
Characteristics

Symbol

Input Offset Voltage
Tlow to Thigh

VIO

Input Offset Current
Tlow to Thigh

110

Input Bias Current
Tlow to Thigh

liB

LMllCL

Min

Typ

Max

Typ

Max

Unit

-

0.2

0.6
0.8

-

0.5

mV

-

-

5.0
6.0

-

1.0

-

25
50

pA

-

10
20

4.0

-

100
150

-

-

200
300

pA

-

-

17

Min

17

ri

-

1011

-

-

1011

-

Q

Input Offset Voltage Drift
Tlow to Thigh

""VIOI""T

-

2.0

5.0

-

3.0

-

~V/'C

Input Offset Current Drift
Tlow to Thigh

""IIOI""T

-

10

-

-

50

-

fAloC

Input Bias Current Drift
Tlow to Thigh

""IIB/""T

-

0.8

3.0

-

1.4

-

pAl'C

100
50
250
100

300

-

25
15
50
30

300
800

-

-

-

-

96
90

110

-

-

-

-

84
80

100

-

0.8
1.0

-

0.3

-

-

±10

Input Resistance

Large Signal Voltage Gain
Vs = ±15 V, Vout = ±12 V, lout = ±2.0 mA
Tlow to Thigh (Note 5)
Vs = ±15 V, Vout = ±12 V, lout = ±0.5 mA
Tlow to Thigh

AVOL

Common Mode Rejection
Vs =±15V,-13 V"VCM" 14 V
Vs =±15 V, -12.5 V" VCM" 14 V,
Tlow to Thigh

CMR

Power Supply Rejection
±2.5V"VS,,±20V
Tlow to Thigh

PSR

Power Supply Current
Tlow to Thigh

1200

-

-

dB
110
100

130

100
96

118

-

0.3

-

±10

-

dB

10

Output Short Circuit Current
TJ = 150'C, Output Shorted to Ground

V/mV

ISC

-

-

0.8
1.0

mA

-

mA

NOTES: 1. The inputs are shunted by back-to-back diodes for over-voltage protection. Excessive current will flow if the input differential voltage
is in excess of 1.0 V if no limiting resistance is used. Additionally, a 2.0 kQ resistance in each input is suggested to prevent possible
latch-up initiated by supply reversals.
2. The output is current limited when shorted to ground or any voltages less than the supplies. Continuous overloads will require package
dissipation to be considered and heatsinking should be provided when necessary.
3. Devices must be derated based on package thermal resistance (see package outline dimensions).
4. These specifications apply for VEE +2.0 V" VCM" VCC -1.0 V (VEE +2.5 V" VCM" VCC -1.0 V for Tlow to Thigh) and ±2.5 V
"VS" ±20 V Tlow to Thigh: O'C "TJ ,,+70°C for LMllC and LM11CL
5. Vout = ±11.5 V, all other conditions unchanged.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-35

LM11C, LM11CL
Figure 2. Input Offset Current
versus Case Temperature

Figure 1. Input Bias Current
versus Case Temperature
50

<
.e

40

40

I20

30

a:
a:

20

0

10
0

W

::>

~

0

~

-10

~

~
!z
w

20
I-

'"

.1.
.1.
VCcJVEE=±15V AV=10
As= 100kO

-

80

::>

a.
~

./

40

1/

:;;- -24

-6.0

-4.0
-2.0
0
2.0
4.0
VIa. INPUT OFFSET VOLTAGE (mY) @ 25°C

0

6.0

10

100

1.0k
f. FREQUENCY (Hz)

10 k

lOOk

Figure 6. Common Mode Rejection and
Slew Limit versus Frequency

~14O

r--....

o

~12O

~loo

~

l!l

20

0
:::;;
0

~

0

0
-50

60

~ 40
:::;;

1.0

'" "
"

8 20
o

50
1; TEMPERATURE (0C)

100

150

a:
~

0
1.0

10

:::;;

::J

~

1.0",
W

'"

100
1.0k
10k
f. FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-36

1:

~~

a:

:;;

CMS~\.

I

CMR

;:a 80
2.0

I

VCcJVEE=±15V _ 10 ~
dVIO= IOOflV
!:::

~

20

'\1'
\.

"'

lOOk

0.1 ~

8
..I

0.Q1~
100M 0

LM11C, LM11CL
Figure 7. Open-Loop Voltage Gain
versus Supply Voltage
iIi'

140

w

120

9

0..

0

I

-

r-

/'~

0

zw

T

RL~2VS(kQ)

130

!:§
0..

VCC .,H

Vsat= 1.5 V

t!)

g

o

t~ri.1 Hz I

::5!..

:z

«t!)

Figure 8. Output Saturation
versus Load Current

-

-55°C

40

I

~
"""
~

""" """

<"
..:!-

""
VCC

20

o

a:

~

-20
10

100

1.0k

ffi~
~EE

=>
u

~

0..

~ 280

~

--

10k

1
320

100k

1il
.p

~.

2

.."......,

L

3
1. TC = 25°C
2. TC = 125°C
3. TC=-55°C

240

200

100M

I

10M

i
o

Figure 11. Open-Loop Voltage Gain and
Phase versus Frequency

4.0

~ 80

:z
w

, ::"..

g

'""""".......
""

AVOL

,""",,"' 1
2"" .........
,""",,"'

40

"

1. Cc=O
2. Cc=1000pF
VCcNEE=±15V
RL=30kQ
1.0

30

...........

60

...:> 2Or
o
r
~
Or
r
-20
0.1

J

8.0
12
16
VCcNEE, SUPPLY VOLTAGE (±V)

I--

20

0

t!)

!:§

J

r-r--

Figure 12. Slew Rate versus
External Compensation Capacitor

~

100

~

4.0

360

t, FREQUENCY (Hz)

12

2.0
3.0
1[., LOAD CURRENT (±mA)

400

0..
0..
Cf.)

'lit.

Figure 10. Supply Current versus
Supply Voltage

120
100

L...---..

I

g

<

---

10

""

2

' l'~
.........

.........

'"""""

r'\.

..........

'"""""
100
1.0k
10k
t, FREQUENCY (Hz)

,

en
w

w
60 a:
t!)

w

120 :2

~ 150

100k

±20V

0..

..:

..........
..........

=VCcNE~=

90 e.
w
Cf.)

180

gj

10

-

=

=
=

20k

+

20k

",'

TCC

3.0 L----,---,-,-.u..u.I..LL..
1I_-,-.L-I...LJ..u.J,"-_'--L-I....L.J..I.IOU
10
100
1.0 k
10k
CC, EXTERNAL COMPENSATION CAPACITOR (pF)

1.0M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-37

LM11C, LM11CL
Figure 13. Closed-Loop Output Impedance
versus Frequency
1.0k

g
w

~

./

..",..

100

0

z

i!§

...w

10

!5

1.0

V.;1000

~

!5

/

0

~

0.1

./"

V

/

V'

/
VcdVEE = ±15 V
lout =±1.0 mA

/AV=1.0

0.01
10

100

1.Ok

10k

lOOk

1.0M

10M

f. FREQUENCY (Hz)

APPLICATIONS INFORMATION
Due to the extremely low input bias currents of this device,
it may be tempting to remove the bias current compensation
resistor normally associated with a summing amplifier
configuration. Direct connection of the inputs to a low
impedance source or ground should be avoided when supply
voltages greater than approximately 3.0 V are used. The
potential problem involves reversal of one supply which can
cause excessive current to flow in the second supply. Possible
destruction of the IC could result if the second supply is not
current limited to approximately 100 rnA or if bypass
capacitors greater than 1.0 I1F are used in the supply bus.
Disconnecting one supply will geQerally cau!lereversal due
to loading of the other supply within the IC and in external
circuitry. Although the problem can usually be avoided by
placing clamp diodes across the power supplies of each
printed circuit board, a careful design will include sufficient
resistance in the input leads to limit the current to 10 mA if the
input leads are pulled to either supply by internal cur~ents. This
.
precaution is not limited to only the LM11 C.
The LM11C is capable of resolving picoampere level
signals. Leakage currents external to the IC can severely
impair the performance of the device. It is important that high
quality insulating materials such as teflon be employed.
Proper cleaning to remove fluxes and other residues from

printed circuit boards, sockets and the device package are
necessary to minimize surface leakage.
When operating in high humidity environments or
temperatures near O·C, a surface coating is suggested to set
up a moisture barrier.
Leakage effects on printed circuit boards can be reduced by
encircling the inputs (both sides of pc board) with a conductive
guard ring connected to a low impedance potential nearly.the
same as that of the inputs.
Guard ring electrical connections for common operational
amplifier configurations are illustrated in Figure 14.
Electrostatic shielding is suggested in high impedance
circuits.
Error voltages in external circuitry can be generated by
thermocouple effects. Dissimilar metals along with
temperature gradients can set up an error voltage ranging in
the hundreds of microvolts. Some of the best thermocouples
are junctions of dissimilar metals made up of IC package pins
and printed circuit boards. Problems can be avoided by
keeping low level circuitry away from heat generating
elements.
The LM11C is internally compensated, but external
compensation can be added to improve stability, particularly
when driving capacitive loads.

Figure 14. Guard Ring Electrical Connections for Common Amplifier Configurations
Summing Amp (Inverting)

Rl

Noninverting

R2

Input D--'IIIIIr_---'w\r--,

Output

Voltage Follower

~til- £tt>l
Input

R3

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-38

+

Output

LM11C, LM11CL

Figure 15. Input Protection for
Summing (Inverting) Amplifier

Figure 16. Input Protection for
a Voltage Follower

R3
Input o-~~--'V\JIv---.

Rl
Output

R3

Output

Rl
Input

n--'Vvv--t

10k

10k

Input current is limited by Rl when the input exceeds
supply voltage, power supply is turned 011, or output is
shorted.

Currentis limtted by Rl in the eventthe input is connected
to a low impedance source outside the common mode
range 01 the device. Current is controlled by R2 ff one
supply reverses. Rl and R2 do not allect normal
operation.

Figure 17. Cable Boot Strapping and Input Shields
C
Rl
Output

Input o--ff=::::::Jr--~--1

Inputo--tr::==r--...--;

Output

An input shield boot strapped in a voltage follower
In a summing amplifier the input is at virtual ground.
ThereIQle the shield can be grounded. Asmall feedback
capacttor will Insure stability.

reduces input capacttance, leakage, and spurious
voltages from cable flexing. A small capacttor from
the input to ground will prevent any instabiltty.

Figure 18. Adjusting Input Offset Voltage with Balance Potentiometer
VCC

Output

Minimum
Adjustment Range
(mV)

R
(n)

±O.4
±1.0
±2.0
±5.0

1.0 k
3.0 k
10 k
lOOk

Input offset voltage adjustment range Is a function 01 the Balance Potentiometer
Resistance es indicated by the table above. The potentiometer is connected between the
two "Balance" pins.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-39

LM101A
LM201A
LM301A

MOTOROLA

SEMICONDUCTOR----TECHNICAL DATA

OPERATIONAL AMPLIFIER

Operational Amplifier

SILICON MONOLITHIC
INTEGRATED CIRCUIT

A general purpose operational amplifier that allows the user to choose the
compensation capacitor best suited to his needs. With proper compensation,
summing amplifier slew rates to 10 VIllS can be obtained.
• Low Input Offset Current: 20 nA Maximum OverTemperature Range
• External Frequency Compensation for Flexibility
• Class AB Output Provides Excellent Linearity
• Output Short Circuit Protection
• Guaranteed Drift Characteristics

NSUFFIX
PLASTIC PACKAGE
CASE 626
(LM201A and LM301A)

JSUFFIX

Figure 1. Standard Compensation
and Offset Balancing Circuit

Figure 2. Double-Ended
Limit Detctor

CERAMIC PACKAGE
CASE 693

Vee
VUT..---o-l
Inverting
Input
Output

DSUFFIX
PLASTIC PACKAGE
CASE 751
(50-8)

Vo
20k

(Pins Not Shown Are Not Connected)

PIN CONNECTIONS
Figure 3. Representative Circuit Schematic
Balance 1

8

Inputs {

7 VCC
sOutput

23

VEE 4

5

Compensation

Balance

'-="--:-::--:-'
1-+"'IIYoo-<~

Output

ORDERING INFORMATION

250

Balance

Device

Temperature
Range

Package

LM101AJ

-55° to + 125°C

Ceramic DIP

LM201AD
LM201AN
LM201AJ

-25° to +85°C

50-8
Plastic DIP
Ceramic DIP

LM301AD
LM301AN
LM301AJ

0° to +70°C

50-8
Plastic DIP
Ceramic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-40

LM101A, LM201A, LM301A
MAXIMUM RATINGS
VALUE
Rating
Power Supply Voltage
Input Differential Voltage
Input Common Mode Range (Note 1)

Symbol

LM101A

I

LM201A

I

LM301A

VCC, VEE

±22

I

±22

I

±18

Vdc

VID

+30

~

V

VICR

+15

~

V

Output Short Circuit Duration

tsc

Power Dissipation (Package Limitation)
Plastic Dual-In-Line Package
(LM201A1
301 A)
Derate above TA = +25°C
Ceramic Package
(LM101A)
Derate above 25°C

PD

Operating Ambient Temperature Range

TA

Storage Temperature Range

Unit

Continuous

-

625
5.0

-

-55 to
+125

~

625
5.0

750

~

6.6

~

1-25to +85 1 Oto +70

mW
mW/oC
°c

~

-65 to +150

Tstg

mW
mW/OC

°C

Note: 1. For supply voltages less than ±15 V, the absolute maximum input voltage is equal to Ihe supply voltage.
ELECTRICAL CHARACTERISTICS (TA = +25°C, unless otherwise noted.) Unless otherwise specified, these specifications apply for
supply voltages from +5
- .0 V to ±20 V for the LMI 01 A and LM201 A , and from ±5 0 V to +15
- V for the LM301 A
LM101A
LM201A
Characteristics

Symbol

LM301A

Min

Typ

Max

Min

Typ

Max

Unit

0.7

2.Q

-

2.0

7.5

mV

1.5

10

-

3.0

50

nA

30

75

-

70

250

nA
Mil

Input Offset Voltage (RS ,;; 50 kn)

VIO

Input Offset Current

110

Input Bias Current

liB

-

q

1.5

4.0

-

0.5

2.0

-

-

1.8

3.0

-

-

1.8

-

3.0

50

160

-

25

160

-

Input Resistance
Supply Current
VCCNEE = ±20 V
VCCNEE = ±15 V

ICC,IEE

-

Large Signal Voltage Gain
(VCCNEE = ±15 V, Vo = ±10 V, RL> 2.0 kn)

AV

-

-

rnA

V/mV

The following specifications apply over the operating temperature range.
Input Offset Voltage (RS ,;; 50 kn)

VIO

Input Offset Current

110

Avg Temperature Coefficient of Input Offset Voltage
TA(min),;; TA';; TA (max)

I'NloIl!o.T

Avg Temperature Coefficient of Input Offset Current
+25°C ,;; TA';; TA (max)
TA(min) ,;; TA ,;; 25°C

I!o.IIoIl!o.T

Input Bias Current

-

liB

-

3.0

10

20

-

-

-

-

70

nA

3.0

15

-

6.0

30

flV/oC

0.01
0.02

0.1
0.2

-

0.01
0.02

0.3
0.6

-

-

100

-

25

-

-

15

-15

-

+15

-

Large Signal Voltage Gain
(VCcNEE = ±15 V, Vo = ±IOV, RL> 2.0 kn)

AVOL

Input Voltage Range
VCCNEE = ±20 V
VCCNEE = ±15 V

VICR

-

-

Common Mode Rejection (RS ,;; 50 kn)

CMR

80

96

Supply Voltage Rejection (RS ,;; 50 kn)

PSR

80

96

Output Voltage Swing
(VCCNEE = ±15 V, RL = ±10 kn, RL > 2.0 kn)

Vo

±12
±10

±14
±13

ICC,IEE

-

1.2

Supply Currents (TA = TA(max), VCcNEE = ±20 V)

-

-

mV

nAloC

300

-

nA
V/mV
V

-

+12

70

90

-

-12

-

dB

70

96

-

dB

-

-

±12
±10

±14
±13

-

V

2.5

-

-

-

rnA

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-41

-

-

LM1 01 A, LM201 A, LM301 A
Figure 4. Minimum Input Voltage Range

Figure 5. Minimum Output Voltage Swing

20
~

w

16

t!I

~

w

t!I

1'3

§!

~
;;!;

Ii::

->

S.O l---t---t--T-:::I~-t7"o..-r-4.01---!---t---.,.""I---t--=-.,--O~--~--~~~~--~---

o

5.0

10

15

20

5.0

VCC. ( -VEE). SUPPLY VOLTAGE M

10

15

20

VCC. ( -VE8. SUPPLY VOLTAGE M

Figure 6. Minimum Voltage Gain

Figure 7. Typical Supply Currents

l00r--~--r--r--r--r--

2.5r--~--'--r--r--r--

94

1
~ 2.01--+--+-+-+--+--

SSI---t---t--~--t--+-~

5

~ 1.5 t===!==~~~~~t:::~:::
~

~

S21---!---t--~~-t---+--

en

I--+--+-+-+--+-~II

1.01----!---f---f---t---+---l.

ttl

-_ 0.51---!-...:..:..-,--t---t---+--

~I---!---t---t---t---+--

~
roL---~--~--~--~--~--­

o

5.0

10

O~--~--~--~--~--~---

o

20

15

VCC. ( -VE8. SUPPLY VOLTAGE M

Figure 8. Open-Loop Frequency Response
lS0
single-Pole

160

a;:Eo

z

;;;:

t!I

w

t!I

~
'-'

§!

:>
«

I

140
120
100
SO
60
40

bompen~on

270

Cl =30Pf'.,.

~

20
0

Phase

\

Gain ...::::::...: ~

-20
1.0

10

100

loOk

10k

/

lOOk

"-

z
~
w

C!)

1'3

45

....

C!)

1SO
9o

1.0M

20

w

225

135

./'

>-..

15

Single-Pole C~mpensalion

~ 15
315

"' ............1'-.. r--...

10

Figure 9. Large Signal Frequency Response

:::

I

.......... Cl=3.0pF

5.0

VCC. ( -VE8. SUPPLY VOLTAGE M

5

Cl =30 pF

Ii:

4

o

1.0 k

10M

\

5.0

0

?

\

~

§!

I!:
::::>

\

10

Cl =3.0 pF

i\

f\

I IIII

r-......

10k

lOOk
f. FREQUENCY (Hz)

f. FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-42

1.0M

10M

LM101A, LM201A, LM301A
Figure 10. Voltage Follower Pulse Response

d

10

S-

~

6.0
4.0

C2

2.0

!30

C!l

0
-2.0

a:
0

-4.0

w

z

w

>

>
ci:

:>

IS'mglip
I. I
e· 0Ie ompensatlon

8.0

C!l

Figure 11. Open-Loop Frequency Response
140

--....

1\

Input "

,

\.
f--

-6.0

a;- 100 I---

r-'

'\.
.-

z
;;:

(,
V Output

80

w

60

!3

40

C!l

0

>

«>-

30

40
50
t, TIME (liS)

60

70

80

90

~
w

C!l

~

w

C!l

16
12

....
=>
0

4.0

r-...

I

10

100

w

6,0

~
w

-- -- --+ -- --

2,0

0

§;

-2.0

>

1,OM

I

4.0

!3

~

f-.

100 k

-4.0
-6.0

I /

Input

-,

~

~

o

0-

\

~

f
f
f
II

-- -- -- --

-10
1.0

2.0

3.0

4.0

5,0

6.0

7.0

8.0

Figure 15. Feedforward Compensation

R2

VCC

VCC

Rl
6
Va

>----c6rl~-e Va

3

8
Frequency
Compensation
Cl

45

'output l _

t, TIME (liS)

R3

S

s5

C2

+V,

c::

90

R2

-V,

ffi
e.

-8.0

10M

Figure 14. Single-Pole Compensation

7

135

w

,.,.

~

f, FREQUENCY (Hz)

Rl

l±l

10k 100 k 1.0M 10M 100M"
t, FREQUENCY (Hz)

Feedforward Compensation

§

-

o

1.0 k

/

~V

8,0 -

~

r-..

Phase

"-

~

C!l

Er::

-?

,

C!l

"

0-

S

"

en

180

Figure 13. Inverter Pulse Response

\.

8.0

225

10

"
"
Feedforward
Compensation

,

!3

§;

, ""

t

G~~

Figure 12. Large Signal Frequency Response
18

I
I

II

20

-20
20

I'-...

C!l

-8.0
-10
10

.........

:s.

/

,l

I

Feedforward Compensation

120

R3

Rl Cs
Cl2!-Rl +R2

Cl
150pF

Cs ;30pF

Balance

1
C2; 27tfoR2
fo;3.0MHz

MOTOROLA LlNEARIiNTERFACE ICs DEVICE DATA
2-43

9.0

a:

LM111
LM211
LM311

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Highly Flexible Voltage
Comparators

HIGH PERFORMANCE
VOLTAGE COMPARATORS
SILICON MONOLITHIC
INTEGRATED CIRCUIT

The ability to operate from a single power supply of 5.0 V to 30 V or ±15 V
split supplies, as commonly used with operational amplifiers, makes the
LM111/LM2111LM311 a truly versatile comparator. Moreover, the inputs of the
device can be isolated from system ground while the output can drive loads
referenced either to ground, the Vee or the VEE supply. This flexibility makes
it possible to drive DTL, RTL, TTL, or MOS logic. The output can also switch
voltages to 50 V at currents to 50 mAo Thus the LM111/LM211/LM311 can be
used to drive relays, lamps or solenoids.

N SUFFIX
PLASTIC PACKAGE
CASE 626

.~
1

Typical Comparator Design Configurations

J·8SUFFIX
CERAMIC PACKAGE
CASE 693

Split Power Supply with Offset Balance

Vee

>--6--<___

.1~rn

Output

8 7
Output

o SUFFIX
PLASTIC PACKAGE
CASE 751
(SO-S)
Ground·Referred Load

•

Load Referred to Negative Supply

Vee

0---"

1

0---'"

Output

Output

PIN CONNECTIONS
VEE

VEE
Input polarity is reversed when
Gnd pin is used as an output.

Input polarity is reversed when
Gnd pin is used as an output.

Load Referred to Positive Supply

Gnd
Inputs {

Strobe Capability

Device
H - - _ TIL Strobe

Balance/Strobe

5

Balance

Temperature Range

Package

LMlllJ-S

-55° to + 125°C

Ceramic DIP

LM211 D
LM211J-S

-25° to +S5°C

SO-S
Ceramic DIP

LM311D
LM311J-S
LM311N

0° to +70°C

SO-S
Ceramic DIP
Plastic DIP

MOTOROLA LINEAR/INTERFACE les DEVICE DATA

2-44

4

ORDERING INFORMATION

.,ru---0--+-....

7

:

VEE

Vee

Vee

1

LM111, LM211, LM311
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Symbol

LM111/LM211

LM311

Unit

VCC + IVEE I

36

36

Vdc

Output to Negative Supply Voltage

YO-VEE

50.

40.

Vdc

Ground to Negative Supply Voltage

VEE

3D

3D

Vdc

Input Differential Voltage

VID

±3D

±3D

Vdc

Input Voltage (Note 2)

Yin

±15

±15

Vdc

Voltage at Strobe Pin

-

VCC to VCC-5

VCC to VCC-5

Vdc

Rating
Total Supply Voltage

Power Dissipation and Thermal Characteristics
Plastic and Ceramic Dual-In-Line Packages
Derate Above TA = +25°C
Operating Ambient Temperature Range

mW

625
5.0

PD
1/8JA

mW/oC
°C

TA

-

-55 to +125
-25 to +85

-

-

Operating Junction Temperature
Storage Temperature Range

0. to +70.

TJ(max)

+150.

+150.

°c

Tstg

-6510+150.

-65 to +150.

°c

ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25°C, unless otherwise noted [Note 1].)
LM111/LM211
Characteristics

LM311

Symbol

Min

Typ

Max

Input Offset Voltage (Note 3)
RS" 50. kO, TA = +25°C
RS < 50. kO, Tlow" TA" Thioh'

VIO

0..7

3.0.
4.0.

Input Offset Current (Note 3) TA = +25°C
Tlow"TA"Thigh'

110

-

1.7

10.
20.

Input Bias Current TA = +25°C
Tlow" TA" Thigh'

liB

Voltage Gain

AV

Response TIme (Note 4)
Saturation Voltage
VID" -5.0 mV, 10 = 50 mA, TA = 25°C
VID ::;-10. mV, 10 = 50. mA, TA = 25°C
VCC  5.0. mV, VO= 35 V, Tlow" TA" Thigh'

Min

-

0..1

0.5

-14.7 to
13.8

+13.0.

-14.5

-

0..75

-

ns
V

1.5

-

0.23

0..4

3.0.

-

mA

-

50

-

nA
nA
j.lA

+13.0.

V

0..2

-14.7 to
13.8

Positive Supply Current

ICC

-

+2.4

+6.0

+2.4

+7.5

mA

lEE

-

-

Negative Supply Current

-1.3

-5.0

-

-1.3

-5.0

mA

'Tlow =-55°CforLM111
Thigh =+125°CforLMll1
= -25°C for LM211
= +85°C for LM211
= DOC for LM311
= +70°C for LM311
NOTES: 1. Offset voltage, offset current and bias current speCifications apply for a supply voltage range from a single 5.0. V supply up to ±15 V
supplies.
2. This rating applies for ±15 V supplies. The positive input voltage limit is 3D V above the negative supply. The negative input voltage
limit is equal to the negative supply voltage or 30 V below the positive supply, whichever is less.
3. The Offset voltages and offset currants given are the maximum values required to drive the output within a volt of either supply with
a 1.0 mA load. Thus, these parameters define an error band and take into account the "worst case" effects of voltage gain and input
impedance.
4. The response time specified is for a 1DO mV input step with 5.0. mV overdrive.
5. Do not short the strobe pin to ground; it should be current driven at 3.0. mA to 5.0. mAo

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-45

LM111, LM211, LM311
Figure 1. Circuit Schematic
8

,-----~~~----.-.---r---------.-------~----------~~--~Vee

800

800

Balance 5
300
Balance/Strobe o-~Vv-t------+
6
300

1

'------------~ Gnd

4

3

L---------~----~~~----~~-----------------------oVEE

Figure 2. Input Bias Current
versus Temperature

Figure 3. Input Offset Current
versus Temperature
5.0

140

«
.s.
I-

:z
w
a:
a:

::>

<.>

120
100

~

'"::>
I-

80

---

Vee = +15 V
VEE=-15V
~

~

7" I'-..

Pins 5 & Tied
toVee
Normal

D..

"-

-

"-

;;!;

o
-25

o

25
50
75
TA, TEMPERATURE (0C)

I-

4.0

::>

3.0

:z
w
a:
a:

"

<.>

.......

;;!;

Ii:;
CIl

u..
u..

0

2.0

~

I

I-

:z
w 100
a:
a:
::>

<.>

/

1.0

Normal

-55

-25

o

I

I

I

-

:E

-

;;!;

40

§5

-0.5

w

-1.5

c

20
-12

--:::::: ::::--

-=--~~

Iv::FI?FITI

I--

!!l

~16

-8.0
-4.0
0
4.0
8.0
DIFFERENTIAL INPUT VOLTAGE (V)

125

~ -1.0

o

60

100

I
I
Referred to Supply VoHages

Vee

80

'"::>

25
50
75
TA, TEMPERATURE (Oe)

Figure 5. Common Mode Limits
versus Temperature

:!!;
D..

-~

--..

Q

125

CIl

I-

--

::>

o

100

Vee=+15V
VEE=-15V
TA = +25°e

120

Pins 5 &6 ned
tOV~e

I-

Figure 4. Input Bias Current versus
Differential Input Voltage
140

I

Vee = +15 V
VEE=-15V

D..

r-....

!!l 40

-55

.........

~

12

-55

16

-25

o

25
50
75
TA, TEMPERATURE (0C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-46

R
100

125

LM111, LM211, LM311
Figure 6. Response Time for
Various Input Overdrives

2:
w

Figure 7. Response Time for
Various Input Overdrives

2:

(!)

E§
~

I-

=>
0..
l-

=>
0

?
$"
.§.

I
5.0
4.0
3.0
2.0
1.0

H-

5.0mV

1\ ~~ -

Ih:?'"

20 mV

(!)

I
I

I-

I
I

E§

I I I
I +~.ov'-

0

>

=>
0..

.~~+
Va
_-

./.~

,n

''1'#
/"

I

w

I I I I I

2.0mV _

'-

-

l-

=>

-

7

0

?

_

:[

w

(!)

Vee=+15V
VEE=-15V
TA = +25°e

E§

100
0
> 50
I0
=>
0..

I

;;!;-

o

">5

0.1

I

0.2
0.3
0.4
0.5
trLH, RESPONSE TIME (1lS)

-

7

20mV

I

0.6

0.1

;;!;

Vee= +15V
VEE=-15V
TA=+25°e

-

I

I

0.2
0.3
0.4
0.5
trHL, RESPONSE TIME (~s)

>-C

_

0.6

Figure 9. Response Time for
Various Input Overdrives

2:
(!)

I
Ir

15
10

I

20m~ l~ ~

,

5.0

!3

0
~ -5.0
-10
$" -15
.§.

J1.

""

V'

E§

I I I

5.0mV

/

J/

:9

lli
E§

2.0mV

~~
~
500~O

w

w

(!)

~

Vin

16

A

0
E§ -50
~ -100
l=>
0..

2:
~

1

w

Figure 8. Response Time for
Various Input Overdrives

E§

5.0 mv I-

......

(!)

-

I

5.0
4.0
3.0
2.0 1.0
0

1/

v

....

I~
Vin

va

+

. / r'\t.

VEE

2.0mV

I

0

I

(!)

E§

!3
~

1.0
trLH, RESPONSE TIME (~s)

0

:>5

~

I-

=>
0..

100
50
0

o

C

+

va

2.0k

_lIVE~

_L

1_ - -

V6e=I+15IV
VEE=-15V
TA= +25°e

I

- -

I

1.0
trHL" RESPONSE TIME (1lS)

;>

Figure 10. Output Short Circuit Current
Characteristics and Power Dissipation

~
_

7

I

;;!;

2.0

Vin

_

w

I

Vec= +15V _
VEE=-15V
TA =+25°e
-

-50

o
> -100

I

?

2.0k

7

I

-

15
I
I
I
h5.0mV I
1
10
l=>
00..
5.0
l'"
V 2.0mV
W
=>
0
0
\' "<:
-5.0
......,
~ ,\.
-10
I,
$" -15 - ' 20mV I\,
.§.
0

>

I

2.0

Figure 11. Output Saturation Voltage
versus Output Current

~

.§. 150
z
w
a: 125
a:
=>
<..>
!::: 100
=>
<..>

II
TA= +25°C

I-

a:

i5

5:
0

:L

rn

75
50

l-

=>
0..
l-

=>

0

25

I

1\
~

Power Dissipation

'\.
, V
I
~
........
I
V
I /'
II
III

r-- -

--

~

.......

..

0.90

0.90

0.75 ~

z

0

0.60 ~
c;;
0.45 ~

a:

Short Circuit Current -

w

0.30

i5

0.15

,p

0..

V

2:
w

....

0.75

~~

(!)

E§
~
z

0.60

~
;:;

0.45

0

k::::! ~
f-

./

A'P"
/
/ ' A ~ TA= +25°e
::...
fo' Q ~
>0 0.15
TA = +125°e I
1#
i I I
I
o
~

0.30

8.0

16

24
32
40
10, OUTPUT CURRENT (rnA)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-47

::,..

1- ~ ;t'

o

5.0
10
YO, OUTPUT VOLTAGE M

~ :;;.00

TA=-55°C

48

56

LM111, LM211, LM311
Figure 12. Output Leakage Current
versus Temperature

Figure 13. Power Supply Current
versus Supply Voltage
3.6

1 100 f-- Vee = +15 V
~

aw
~

i

«
.s
....
z

10

w

a:
a:

I

r--

I

I
I

TA = +25°e

3.0

Oulput Vo = +50 V (LMll/211 only) ~

1.0

~

1.8

::::>

'"

1.2

0

0.6

a:
w
;;:

0.1

c..

0.01
25

45

65
85
TA, TEMPERATURE (0G)

105

I
I

Positive and Negative Power Supply - Output High . _

o .J
o

125

I

I

I
f-- _

c..
c..

I
I

JOSi1iV~ SUP~IY _loutP~ Lo~

2.4

::::>

()

I
I

5.0

10
15
20
25
Vee-VEE, POWER SUPPLY VOLTAGE M

Figure 14. Power Supply Current
versus Temperature
3.0

I

/

1 2.6
~

a:
a:

Postive Supply - Output Low

2.2

::::>

~ 1.8

I-""

!l::
::::>

I

-r--.

""" "

-

...........

"-

~

-...........
Poshive and Negative Supply - Output High

'" 1.4
1.0
-55

I

Vee=+15V
VEE=-15V

.............

"'

.............
-25

o

25
50
75
TA, TEMPERATURE (0G)

100

125

APPLICATIONS INFORMATION
Figure 15. Improved Method of Adding
Hysteresis Without Applying Positive
Feedback to the Inputs

Figure 16. Conventional Technique
for Adding Hysteresis

..-_e_--_--{) +15V
3.0k

. - . . . . - - - - - - { ) +15V
3.0k

82

4.7k

33k
O.lIlF

J

5.0k

0.11lF

J

4.7k

)0---

2

Input

5

Output

100

3
+

Rl -L
e2--r
100
R2

LMlll
2

4

1.0M
-15V 510k

-15V

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-48

")0-+---0 Output
7

*,O.l IlF

30

LM111, LM211, LM311
TECHNIQUES FOR AVOIDING OSCILLATIONS IN COMPARATOR APPLICATIONS
When a high speed comparator such as the LM 111 is used
with high speed input signals and low source impedances, the
output response will normally be fast and stable, providing the
power supplies have been bypassed (with 0.1 I1F disc
capacitors), and thatthe output signal is routed well away from
the inputs (Pins 2 and 3) and also away from Pins 5 and 6.
However, when the input signal is a voltage ramp or a slow
sine wave, or if the signal source impedance is high (1.0 kO
to 100 kO), the comparator may burst into oscillation near the
crossing-point. This is due to the high gain and wide bandwidth
of comparators like the LMlll series. To avoid oscillation or
instability in such a usage, several precautions are
recommended, as shown in Figure 15.
The trim pins (Pins 5 and 6) act as unwanted auxiliary
inputs. If these pins are not connected to a trim-pot, they
should be shorted together. If they are connected to a trim-pot,
a 0.01 I1F capacitor (Cl) between Pins 5 and 6 will minimize
the susceptibility to ac coupling. A smaller capacitor is used if
Pin 5 is used for positive feedback as in Figure 15.
Certain sources will produce a cleaner comparator output
waveform if a 100 pF to 1000 pF capacitor (C2) is connected
directly across the input pins. When the signal source is
applied through a resistive network, Rl, it is usually
advantageous to choose R2 of the same value, both for dc and
for dynamic (AC) considerations. Carbon, tin-oxide, and
metal-film resistors have all been used with good results in
comparator input circuitry, but inductive wirewound resistors
should be avoided.
When comparator circuits use input resistors (e.g.,
summing resistors), their value and placement are particularly
important. In all cases the body of the resistor should be close
to the device or socket. In other words, there should be a very
short lead length or printed-circuit foil run between comparator
and resistor to radiate or pick up signals. The same applies to
capacitors, pots, etc. For example, if Rl = 10 kO, as little as
5 inches of lead between the resistors and the input pins can
result in oscillations that are very hard to dampen, Twisting
these input leads tightly is the best alternative to placing
resistors close to the comparator.
Figure 17. Zero-Crossing Detector
Driving CMOS logic

Since feedback to almost any pin of a comparator can result
in oscillation, the printed-circuit layout should be engineered
thoughtfully. Preferably there should be a ground plane under
the LMlll circuitry (e.g., one side of a double layer printed
circuit board). Ground, positive supply or negative supply foil
should extend between the output and the inputs, to act as a
guard. The foil connections for the inputs should be as small
and compact as possible, and should be essentially
surrounded by ground foil on all sides, to guard against
capacitive coupling from any fast high-level Signals (such as
the output). If Pins 5 and 6 are not used, they should be
shorted together. If they are connected to a trim-pot, the
trim-pot should be located no more than a few inches away
from the LMlll, and a 0.01 I1F capacitor should be installed
across Pins 5 and 6. If this capacitor cannot be used, a
shielding printed-circuit foil may be advisable between Pins 6
and 7. The power supply bypass capacitors should be located
within a couple inches of the LM111.
A standard procedure is to add hysteresis to a comparator
to prevent oscillation, and to avoid excessive noise on the
output. In the circuit of Figure 16, the feedback resistor of
510 kO from the output to the positive input will cause about
3.0 mV of hysteresis. However, if R2 is larger than 1000, such
as 50 kO, it would not be practical to simply increase the value
of the positive feedback resistor proportionally above 510 kO
to maintain the same amount of hysteresis.
When both inputs of the LM 111 are connected to active
signals, or if a high-impedance signal is driving the positive
input of the LMlll so that positive feedback would be
disruptive, the circuit of Figure 15 is ideal. The positive
feedback is applied to Pin 5 (one ofthe offset adjustment pins).
This will be sufficient to cause 1.0 mV to 2.0 mV hysteresis and
sharp transitions with input triangle waves from a few Hz to
hundreds of kHz. The positive-feedback signal across the
820 resistor swings 240 mV below the positive supply. This
signal is centered around the nominal voltage at Pin 5, so this
feedback does not add to the offset voltage of the comparator.
As much as 8.0 mVof offset voltage can be trimmed out, using
the 5.0 kO pot and 3.0 kO resistor as shown.

Figure 18. Relay Driver with Strobe Capability

if]

VCC1

VCC = +t5V
3.0k

Balance
Adjust

tOk

Input _---
r

Z

m

»

~
~

~

Z

-t
m

:0

~

Symbol

on

Average Temperature Coefficient 01 Input Offset Voltage
TA = Thioh to Tlow (Note 1)

1!,vldI!.T

Input Offset Current
TA = Thigh to Tlow (Note 1)
Average Temperature Coefficient of Input Offset Current
TA = Thigh to Tlow (Note 1)
Input Bias Current
TA = Thigh to Tlow (Note 1)
Input Common Mode Voltage Range (Note 2)
VCC = 30 V (26 V lor LM2902)
VCC = 30 V (26 V lor LM2902), TA = Thioh to Tlow

110

VIDR
AVOL

Min

Typ

Max

Common Mode Rejection
RSS 10 kD

ISC

Power Supply Current (TA = T h~ to Tlow) (Note 1)
VCC = 30 V (26 V lor LM29 ), Vo = 0 V, RL = 00
VCC = 5.0 V, Vo = 0 V, RL = 00

ICC

Thigh

+ 125"C lor LM124
+85"C lor LM224
+70"C for LM324,A
+105"C lor LM2902

7.0

-

-

5.0

50
150

50
200

300

-

10

-

-

5.0

-

-100
-200

-

-

-90

-

~o

-

7.0

30

-

3.0

30
100

30
75

10

-

-

5.0

-

-

10

~o

-150

-

-45

-

-

~oo

Unit

-

-

2.0

-

-250
-500

-

-

10

-

-250
-500

jlVFC
nA
pAl"C
nA
V

-

0
0

28.3
28

-

VCC

-

100

-

-

28.3
28
VCC

-

-

-120

-

-

-

-

-

65

70

-

65

100
3.5

-

-

-

28.3
28

-

VCC

100

-

0
0

25
15

-

-

24.3
24

-

VCC

100

-

-

V
VlmV

-

-

-120

-

dB

65

70

-

50

70

-

dB

-

65

100

50

100

-

dB

3.3
26
27

3.5

3.3
22
23

3.5

28

-

28

-

-

5.0

20

-

5.0

20

20
10

40
20

-

20
10

40
20

-

-

-

-

-

28

-

-

5.0

20

20
10

40
20

-

-

V

24

-

-

5.0

100

20
10

40
20

-

-

20
8.0
50

-

40

-----

-

---

-

10
5.0
12

20
8.0
50

10
5.0
12

20
8.0
50

60

-

-

40

60

-

40

3.0
1.2

-

1.4
0.7

3.0
1.2

-

-

-

-

--- -

2.
3.

-

-

-

mA

10
5.0

60

-

3.0
1.2

-

-

-

I1A

40

60

mA

-

3.0
1.2

20
8.0

mA

-

:s::
......

I\)

r

:s::

I\)
I\)

~,fIIa

r
:s::
w
I\)
,fila

}>
r

mV

mA
10
5.0
12

r

~,fIIa

-120

3.3
26
27

-

25
15

-120

-

0
0

-

100

25
15

3.5

Output Short Circuit to Ground (Note 3)

-

-

3.3
26
27

10-

-

7.0

100

Output Sink Current
(VID =-1.0 V, VCC= 15V)
TA = 25"C
TA = Thit to Tlow (Note 1)
(VID=-1.0 ,Vo=200mV,TA=25"C)

7.0

-

65

10+

7.0
10

-

85

Output Source Current (VIO = +1.0 V, VCC = 15 V)
TA=25"C
TA = Thigh to Tlow (Note 1)

-

3.0
5.0

70

VOL

2.0

-

CMR

Output Voltage
Low Limit
VCC = 5.0 V, RL = 10 kD, TA = Thiah to Tlow(Notel)

--

2.0

50
25
CS

Channel Separation
10kHz S f S 20 kHz, Input Referenced

-55"C for LM124
-25"C for LM224
O"C lor LM324, A
-40"C lor LM2902

Max

7.0
9.0

-

0
0

Differential Input Voltage Range

1. Tlow

Typ

-

-

VICR

Large Signal Open-Loop Voltage Gain
RL = 2.0 kD, VCC = 15 V, lor Large Vo Swing,
TA = Thigh to Tlow (Note 1)

NOTES:

Min

5.0
7.0

-

o
o
~
»

LM2902

LM324
Max

-

liB

PSR

om

Typ

2.0

-

VOH

o
<

Min

-

I!.IIdl!.T

Power Supply Rejection

m

LM324A
Max

mV

-

Output Voltage High Limit (TA = T hW!' to Tlow) (Note 1)
VCC = 5.0 V, RL = 2.0 kD, TA = 2 C
VCC = 30 V (26 V lor LM2902), RL = 2.0 kD
VCC = 30 V (26 V for LM2902), RL = 10 kD

UJ

Typ

VIO

(')

m

Min

The input common mode voltage or either input signal voltage should not be allowed to go negative
by more than 0.3 V. The upper end of the common mode voltage range is VCC-l.7 V.
Short circuits lrom the output to V CC can cause excessive heating and eventual destruction.
Destructive dissipation can result from simultaneous shorts on all amplifiers.

:s::

I\)

CO

o
I\)

LM124, LM224, LM324,A, LM2902
Representative Circuit Schematic
(One-Fourth of Circuit Shown)

Bias Circuitry
Common to Four
Amplifiers

Output

r------.-----~~-----~-----+--~~~~~-oVCC

Q16>-::::---,

Inputs

CIRCUIT DESCRIPTION
The LM124 series is made using four internally
compensated, two-stage operational amplifiers. The first
stage of each consists of differential input devices 020 and
018 with input buffer transistors 021 and 017 and the
differential to single ended converter 03 and 04. The first
stage performs not only the first stage gain function but also
performs the level shifting and transconductance reduction
functions. By reducing the transconductance a smaller
compensation capacitor (only 5.0 pF) can be employed, thus
saving chip area. The transconductance reduction is
accomplished by splitting the collectors of 020 and 018.
Another feature of this input stage is that the input common
mode range can include the negative supply or ground, in
single supply operation, without saturating either the input
devices or the differential to single-ended converter. The
second stage consists of a standard current source load
amplifier stage.

Large Signal Voltage Follower Response
VCC = 15Vdc
RL =2.0 kQ
TA = 25°C
,~~

"

/

~

7

\

5.011S/DIV

Each amplifier is biased from an internal-voltage regulator
which has a low temperature coefficient thus giving each
amplifier good temperature characteristics as well as
excellent power supply rejection.

Single Supply

Split Supplies

r~ro,~~
=-

MOTOROLA LlNEARIiNTERFACE ICs DEVICE DATA

2-52

1.5V to VEE(max)

LM124, LM224, LM324,A, LM2902
Figure 1. Input Voltage Range

Figure 2. Open-Loop Frequency

20

120

18
~
LU

C!l

~
§?

12
10
8.0

-

;>

v:.-

14

~

+1

..J~

16

I-

=>
e..

CD
."

i-'
I/'

Z
e..
=>

I-

c:
II:

:9

8.0

\

6.0

II

>"

Input

..§. 450
LU

~

C!l

~ 400

§?
~

j\

350

1\

I-

1.8

II:

1.5

~

=>

""

10

:

100
f. FREQUENCY (kHz)

1000

o

0

+A =J5°C
RL= 00

I

1.0

2.0

3.0

1.2

e..

4.0
5.0
t. TIME (Ils)

6.0

7.0

8.0

Figure 6. Input Bias Current versus
Power Supply Voltage
I

........

(.')

~

-

VCC=30V
VEE = Gnd
'[f.=25°C
L=50pF

V

200

"-

2.4

2.1

1

V

IA ,.

\

Figure 5. Power Supply Current versus
Power Supply Voltage

1

~

>0 250

2.0

I"'-

OU!J!ut

~ 300
o

4.0

o1.0

100M

500

VCC=15V
VEE = Gnd
Gain = -100
Rt=1.0kn
RF= 100kn

10

100k

550

!l1~L=2.J~

12

1.0k
10k
f. FREQUENCY (Hz)

Figure 4. Small-Signal Voltage Follower
Pulse Response (Noninverting)

Figure 3. Large-Signal Frequency Response

c:..

t'.....

± VCcNEE. POWER SUPPLY VOLTAGES M

Q.

VEE= Gnd
TA=25°C

e..

V V

2.0

80

~~ 60
S§?
.oJe..
§?O 40

~. V . . . V

6.0
4.0

Jc~~lL' I

r-- ......

wC!l

V/"

Negative

100

-O.....

CO= 10C

R2

Wave
Output

RI
Rl +RC
1= 4CRIRl

!1

H R3 = R2Rl
R2+Rl

1
Vref="2 VCC
Given:

10 = center Irequency
A(lo) = gain at center frequency

Choose value 10, C
Then:

o

R3= llloC
R3
Rl = 2A(lo)
R2=

Rl R3
402 Rl -R3

For less than 10% error from operational amplifier,

0 0 10
Bw
< 0.1

where 10 and BW are expressed in Hz.

If source impedance varies, fiHer may be preceded with voltage
follower buffer to stabilize fiHer parameters.
.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-55

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

LM139,A
LM239,A, LM2901,
LM339,A, MC3302

Quad Single Supply Comparators

QUAD COMPARATORS

These comparators are designed for use in level detection, low-level sensing
and memory applications in consumer automotive and industrial electronic
applications.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

• Single or Split Supply Operation
• Low Input Bias Current: 25 nA (Typ)
• Low Input Offset Current: ±5.0 nA (Typ)

N, PSUFFIX
PLASTIC PACKAGE
CASE 646

• Low Input Offset Voltage: ±1.0 mV (Typ) LM139A Series
• Input Common Mode Voltage Range to Gnd
• Low Output Saturation Voltage: 130 mV (Typ) @ 4.0 mA
• TTL and CMOS Compatible
• ESD Clamps on the Inputs Increase Reliability without Affecting Device
Operation

J, LSUFFIX
CERAMIC PACKAGE
CASE 632

MAXIMUM RATINGS
Rating

Symbol

Power Supply Voltage
LM139, NLM239, NLM339NLM2901
MC3302

VCC

Input Differential Voltage Range
LM139, NLM239, NLM339, NLM2901
MC3302

VI DR

Input Common Mode Voltage Range

Valbe

Vdc
+36 or±18
+300r±15
Vdc
36
30
Vdc

VICMR

-0.3 to VCC

ISC

Continuous

Input Current (Vin < - 0.3 Vdc) (Note 2)

lin

50

rnA

Power Dissipation @ TA ~ 25°C
Ceramic Plastic Package
Derate above 25°C

Po
1.0
8.0

W
mW/oC

Junction Temperature
Ceramic & Metal Package
Plastic Package

TJ

Operating Ambient Temperature Range
LM139, A
LM239,A
MC3302
LM2901
LM339,A

TA

Output Short Circuit to Ground (Note 1)

DSUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)

Unit

PIN CONNECTIONS

Output 3
Output 4

°c

Gnd

175
150

Storage Temperature Range

°c
-55 to +125
-25 to +85
-40 to +85
-40 to +105
to +70

o

Tstg

-65 to +150

°c

(Top View)

Figure 1. Circuit Schematic
VCC

+ Input

-Input

Output

ORDERING INFORMATION
Device

NOTE: Diagram shown is for 1 comparator.

Package

LMI39J, AJ

Ceramic DIP

LM239D, AD
LM239J, AJ
LM239N,AN

SO-14
Ceramic DIP
Plastic DIP

LM339D,AD
LM339J, AJ
LM339N,AN

SO-14
Ceramic DIP
Plastic DIP

LM2901D
LM2901N

SO-14
Plastic DIP

MC3302L
MC3302P

Ceramic DIP
Plastic DIP

MOTOROLA LINEAR/INTERFACE DEVICES

2-56

Temperature
Range

ELECTRICAL CHARACTERISTICS (Vee = +5.0 Vde, TA = +25°e, unless otherwise noted)
LM139A
Characteristics

Symbol

Input Offset Voltage (Note 4)

VIO

r

Z
~

~
I\)

z

-l

. m

±2.0

±1.0

±2.0

Min

-

LM139
Typ
Max
±2.0

LM239/339
Min

±5.0

Typ

Max

±2.0

±5.0

Min

LM2901
Typ
Max
±2.0

MC3302
Min

±7.0

Typ

Max

Unit

±3.0

±20

mVdc

liB

-

25

100

-

25

250

-

25

100

-

25

250

-

25

250

-

25

500

nA

-

±a.o

±25

-

±S.O

±50

-

±a.o

±25

-

±5.0

±SO

-

±5.0

±50

-

±3.0

±1oa

nA

VleMR

0

Vee
-1.5

0

Vee
-1.5

0

-

Vee
-1.5

0

Vee
-1.5

0

Vee
-1.5

0

Vee
-1.5

V

rnA

ICC

-

0.8
1.0

2.0
2.5

-

0.8
1.0

2.0
2.5

-

0.8
1.0

2.0
2.5

AVOL

50

200

-

50

200

-

-

200

-

-

300

-

-

300

-

-

300

DO

::D

±1.0

LM239A1339A
Typ
Max

Min

110

RL,-.Vee·30Vdc

o
s;:

Max

Input Bias Current (Notes 4. 5)

Supply Current
RL :::: (For All Comparators)

§

Typ

(Output in Linear Range)
Input Oftset Current (Note 4)
Input Common Mode Voltage Range

s::

Min

Voltage Gain
RL> 15 kn. Vee ·15 Vdc
Large Signal Response lime
VI = TTL Logic Swing.
Vref' 1.4 Vdc, VRL • 5.0 Vdc,
RL.5.1 kn

Saturation Voltage
VI(-) > +1.0 Vdc, V I(+)· 0, Isink S 4.0 rnA
VI(+) >+1.0 Vdc,VI(-)'O, VO' +5.0 Vdc

2.0
2.5

-

0.8
1.0

2.0
2.5

-

-

0.8
1.0

2.0
2.5

-

200

-

25

100

-

2

30

-

V/mV

-

-

300

-

-

300

-

-

300

-

ns

-

1.3

-

-

1.3

-

-

1.3

-

-

1.3

-

-

1.3

-

-

1.3

-

~s

ISink

6.0

16

-

6.0

16

-

6.0

16

-

6.0

16

-

6.0

16

-

6.0

16

-

rnA

V sat

-

130

400

-

130

400

-

130

400

-

130

400

-

130

400

~

130

500

rnV

10L

-

0.1

-

-

0.1

-

-

-

-

-

-

0.1

-

-

0.1

-

nA

-

_

--

-

---

0.1
'----

-----

-

----

0.1

'----

-

m

§

Characteristic

Symbol

Min

Typ

Max

Min

Typ

Max

Min

Typ

±4.0

±9.0

-

-

±9.0

400

-

-

300

-

±4.0

liB

-

-

300

-

-

110

-

-

±100

-

-

±150

-

-

±100

-

-

Vee
-2.0

0

Vee
-2.0

0

Vee
-2.0

0

Input Bias Current (Notes 4, 5)
(Output in linear Range)

m

Input Offset Current (Note 4)

(5

CJ

~

»

Input Common Mode Voltage Range

VleMR

0

Saturation Voltage
VI(-) > +1.0 Vdc, VI(+) • 0, Isink < 4.0 rnA

Vsat

700

700

Output Leakage Current
VI(+) > +1.0 Vdc, VI(-) • 0, Vo • 30 Vdc

10L

1.0

1.0

Differential Input Voltage

VID

Vee

AIIVI~OVdc

NOTES:

1.
2.

3.

4.
5.
6.

LM239/339

Max

~

Typ

LM139

-

VIO

Min

LM239A1339A

-

Input Offset Voltage (Note 4)

CJ

Vee
--

.-s::
N
W
CD

~
w

PERFORMANCE CHARACTERISTICS (Vee = +5.0 Vde, TA = Tlow to Thiah [Note 3])
LM139A

~

.-s::

~ ::D

~
(')

.s::
......
w

Output Leakage Current
.-

0.8
1.0

-

-

CD

Response Time (Note 6)
VRL • 5.0 Vdc, RL • 5.1 kn
Output Sink Current
VI (-) > +1.0 Vdc, VI(+)' 0, Vo S 1.5 Vdc

-

-

Max

LM2901
Typ
Min
Max

400

-

±150

-

Vee
-2.0

0

w

MC3302
Min

±15

-

-

500

-

-

±200

-

Vee
-2.0

0

Typ

Max

Unit

±40

mVdc

-

1000

nA

-

±300

nA

Vee
-2.0

V

700

700

700

700

rnV

1.0

1.0

1.0

1.0

~A

Vee

Vee

Vee

Vdc

Vee
'------

- --

The maximum output current may be as high as 20 rnA. independent of the magnitude of Vee. Output short circuits to Vee can cause excessive heating and eventual destruction.
This magnitude of input current will only occur if the leads are driven more negative than ground or the negative supply voltage. This is due to the input PNP collectorbase junction becoming fOlWard biased. acting as an input clamp
diode. There is also a lateral PNP parasitic transistor action which can cause the output voltage of the comparators to go to the Vee voltage level (or ground if overdrive is large) during the time that an input is driven negative. This
will not destroy the device when limited to the max rating and normal output states will recover when the inputs become 2: ground or negative supply.
(LM139/139A) Tlow .-55°e, Thigh' +125°e
(LM339/339A) Tlow' ooe, Thigh' +70oe
(LM239/239A) Tlow' -25°e, Thigh' +85°e
(Me3302) Tlow .-40oe, Thigh' +85°e
(LM2901) Tlow' -40 oe, Thigh' +105°e
At the output switch point. Vo """ 1.4 Vdc. RS 5100.Q 5.0 VdC5 Vee:S 30 Vdc. with the inputs over the full common mode range (0 Vdcto Vee -1.5 Vdc).
The bias current flows out of the inputs due to the PNP input stage. This current is virtually constant. independent of the output state.
The response time specified is for a 100 mV input step with 5.0 mVoverdrive. For larger signals. 300 ns is typical.

CD

~

s::

o
w
w
o
N

LM139,A, LM239,A, LM339,A, LM2901, MC3302

Figure 3. Noninvertlng Comparator
with Hysteresis

Figure 2. Inverting Comparator with Hystersis
+ Vee

+Vcc

R3
10k
Vln

Rrel

10k

o---'VIlIr----1

10k

Rrel
+ VCC o---'VIlIr-....-t
Vref .--AJVIr--'
1.0M
V Rl
10k
V "'~
ref Rrel+ Rl
1.0M

R3 = R1/I Rrefll R2

VCC RI
Vrel=-Rref+ Rl
R2 '" RIll Rrel

V R1/IRrel
V .
H - RlIl Rrel + R2 (VO(max) - O(mln)]

R2

Amount of Hysteresis VH
R2
VH = R2 + R3 I(VO(max) - VO(min)]

J> RrefllR1

Typical Characteristics
(Vee = 1.5 Vdc. TA = +25°e (each comparator) unless otherwise noted.)

Figure 5. Input Bias Current

Figure 4. Normalized Input Offset Voltage
w

1.40

48

~
!:l

~ 1.20

I

./

c 1.00

~
:Ii.
!5
0.80
z
0.60

V
./

10'

.. v

~ 42

./

36

~
a:

30

a~
III

~
~

V'

z

""
-so

!z

so

100

-25
0
25
75
TA. AMBIENT TEMPERATURE (OC)

24
18

12

-------- -I

TA=-55°C

~25°C:-

;--

o
o

125

4.0

8.0
12
16
20
24
Vee. POWER SUPPLY VOLTAGE (Vdc)

8.0
7.0

!z
~
a:

:::>

t:>

!5
a..
!5
0

6.0

TA = +25°C

I /
V
II / TA = +125°C

TA = -55°C

5.0
4.0
3.0

Q 2.0
1.0
0

I/

/

1// /
~ V/

~V

100
200
300
400
Vsat. OUTPUT SATURATION VOLTAGE (mV)

500

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA
2-58

~-TA= +125°C

--

6.0

Figure 6. Output Sink Current versus
Output Saturation Voltage

i

I-I--

28

32

LM139,A, LM239,A, LM339,A, LM2901, MC3302
Figure 7. Driving Logic

Figure 8. Squarewave Oscillator

VCC

VCC~4.0V

10k

lOOk

RS

Yin Ij--VVV--j
Vref Ij--VVV--j
Rl

>--+---0
R2

VCCo-~0N--~~-J~--~

330k

RS = Source Resistance
Rl = RS
Vee
(V)

RL
kQ

1/4 MC14001

+15

100

1/4 MC7400

+5.0

10

Logic

Device

CMOS

TIL

~

330k
R4

Vo

V~

330k

T2
T1 = T2 = 0.69 RC
7.2
f=C(J.lF)
R2=R3=R4
Rl = R2//R3//R4

APPLICATIONS INFORMATION
These quad comparators feature high gain, wide bandwidth
characteristics. This gives the device oscillation tendencies if
the outputs are capacitively coupled to the inputs via stray
capacitance. This oscillation manifests itself during output
transitions (VOL to VOH). To alleviate this situation input
resistors < 10 kQ should be used. The addition of positive

Figure 9. Zero Crossing Detector
(Single Supply)

feedback « 10 mV) is also recommended. It is good design
practice to ground all unused input pins.
Differential input voltages may be larger than supply
voltages without damaging the comparator's inputs. Voltages
more negative than -300 mV should not be used.

Figure 10. Zero Crossing Detector
(Split Supplies)
Vin(min) ~ 0.4 V peak for 1% phase distortion (dE».

+15V

Vo

Vo
15k
R3

10M

VCCfftl
Vo
E>

Dl prevents input from going negative by more than 0.6 V.

VEE

Rl + R2 = R3
.
R3:;; R5 for small error .In zero crossing

10

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-59

I

dE>

MOTOROLA

SEMICONDUCTOR------

LM158, LM258,
LM358, LM2904

TECHNICAL DATA

Dual Low Power Operational
Amplifiers

DUAL DIFFERENTIAL
INPUT
OPERATIONAL AMPLIFIERS

Utilizing the circuit designs perfected for recently introduced Quad
Operational Amplifiers. these dual operational amplifiers feature 1) low power
drain. 2) a common mode input voltage range extending to groundNEE. 3)
Single Supply or Split Supply operation and 4) pin outs compatible with the
popular MC1558 dual operational amplifier. The LM158 Series is equivalent to
one-half of an LM 124.
These amplifiers have several distinct advantages over standard operational
amplifier types in single supply applications. They can operate at supply
voltages as low as 3.0 V or as high as 32 V with quiescent currents about
one-fifth of those associated with the MC1741 (on a per amplifier basis). the
common mode input range includes the negative supply. thereby eliminating
the necessity for external biasing components in many applications. The
Output voltage range also includes the negative power supply voltage.
• Short Circuit Protected Outputs
• True Differential Input Stage
• Single Supply Operation: 3.0 V to 32 V
• Low Input Bias Currents
• Internally Compensated
• Common Mode Range Extends to Negative Supply

SILICON MONOLITHIC
INTEGRATED CIRCUIT

JSUFFIX
CERAMIC PACKAGE
I
CASE 693

NSUFFIX
PLASTIC PACKAGE
CASE 626

8~
1

• Single and Split Supply Operation
• Similar Performance to the Popular MC1558
• ESD Clamps on the Inputs Increase Ruggedness of the Device without
Affecting Operation

PIN CONNECTIONS
OutputA

1

8

Vee

Inputs A { :

7

Output B

MAXIMUM RATINGS (TA = +25°e. unless otherwise noted.)
Rating
Power Supply Voltages
Single Supply
Split Supplies
Input Differential Voltage Range (I)
Input Common Mode Voltage Range (2)

Symbol

LMl58
LM258
LM358

Vee
VCC.VEE
VIDR

32
±16
±32

26
±13
±26

Vdc

VICR

-

z

8.0

:>

6.0

-

Negative

'x /.
I/':

2.0

oL
o

4.0

~

6.0

8.0

......

80

:...J

1'0

0

>
Do

V-

9

:2:

......

40

...... i"'-

20

t'--

...J

0

<"
10

12

14

16

18

0
-20
1.0

20

10

100

w

550

12
10

C!l

8.0

\

0

I:::J
DI:::J

6.0

"

4.0

0_
0:

0

>

2.0

o
1.0

10

2.4

!z
w
0:
0:
:::J
t.)

~

DD:::J

en

0:

~

D-

V

w

C!l

t§

400

~

.......!:l

~ 350

~

o

/

~

Output

I\~

300

II

F\.

0250

""

>

200

r-..

100
f, FREQUENCY (kHz)

T1 = 2~'C

2.1

Input

.§. 450

o

1000

1.0

2.0

3.0

4.0
5.0
t, TIME (ms)

6.0

7.0

8.0

Figure 6. Input Bias Current versus
Supply Voltage

Figure 5. Power Supply Current versus
Power Supply Voltage

1

1.0M

VCC=30V
VEE = Gnd
TA = 25'C
CL =50 pF

I

>500

VCC=15V
VEE = Gnd
GAIN = -100
RI=1.0k!l
RF= 100 k!l

~

w

>

100 k

Ilk=2.Jk6 II

1:2

t§

10 k

Figure 4. Small Signal Voltage Follower
Pulse Response (Non inverting)

14

C!l

z

1.0 k

t, FREQUENCY (Hz)

Figure 3. Large-Signal Frequency Response
Q.

t'--

60

VCcNEE, POWER SUPPLY VOLTAGES (V)

~

VEE = Gnd
TA = 25'C

w

D-

0_

Positive

.....-: V
2.0

C!l

~

"

V . . . . V-

4.0

V....

0

-

-c>-*-...
Va
VOL

V

RI
VinL = RI +R2 (VOL -Vref)+ Vrel
e2

R

reI

RI
VinH = RI +R2 (VOH -Vrel) +Vrel

eo = C (1 +a +b) (e2 -el)

RI
H = RI +R2 (VOH -VOU

Figure 11. Bi-Quad Filter
I
10 = 2 rr RC

R

R
Cl
R2
C
e:-------j 1-----.1--'I./V'v--4--o--1 1/2

lOOk

Rl = QR

Vin

R2=~

R

TBP

lOOk

LM35

R3=TNR2
Cl = 10C

1/2
LM35

For: 10
Bandpass
Output

Vrel
R2

R3

Vrel

Q

= 1.0 kHz
= 10

TBP = I
TN = I

RI
CI

>--o-4t----1 E---- Notch Output
Vrel

Where: TBP = center frequency gain
TN = passband motch gain

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-64

R
C
RI
R2
R3

= 160 kQ

= O.OOIIlF
= 1.6MQ
= 1.6 MQ
= 1.6 MQ

LM158,LM258,LM358,LM2904
Figure 12. Function Generator
Vref={ Vcc,

Triangle Wave
Output

Figure 13. Multiple Feedback Bandpass Filter

R2
300k

Vref
Vin
Squar

e

>-O..........---lE--- Vo

Co

R2

CO=IOC

Wave
Output

RI
I = RI + RC
4 CRf RI

!-

VCC

Cc

I

'I R3 = R2 RI
R2+RI

1

Vrel=2 VCC
Given:

I,

10 = center frequency
A(fo) = gain at center Irequency

Choose value 10, C
Then:
Q

R3= !tloC
R3
RI = 2A~ol

R2-~

- 4Q2RI-R3

For less than 10% error from operational amplifier.

¥W

< 0.1

Where 10 and BW are expressed in Hz.

II source impedance varies, finer may be preceded with voltage
follower buffer to stabilize finer parameters.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-65

LM348
LM248

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

DIFFERENTIAL INPUT
OPERATIONAL AMPLIFIERS

(Quad MC1741)

SILICON MONOLITHIC
INTEGRATED CIRCUIT

Operational Amplifiers
The LM348 series is a true quad MC1741. Integrated on a single monolithic
chip are four independent, low power operational amplifiers which have been
designed to provide operating characteristics identical to those of the industry
standard MC1741, and can be applied with no change in circuit performance.
In addition, the total supply current for all four amplifiers is comparable to the
supply current of a single MC1741. Other features include input offset currents
and input bias currents which are much less than the MC1741 industry
standard.
The LM348 can be used in applications where amplifier matching or high
packing density is important. Other applications include high impedance buffer
amplifiers and active filter amplifiers.

JSUFFIX
CERAMIC PACKAGE
CASE 632

NSUFFIX
PLASTIC PACKAGE
CASE 646

• Each Amplifier is Functionally Equivalent to the MC 1741

DSUFFIX

• Low Input Offset and Input Bias Currents

PLASTIC PACKAGE
CASE 751A
(SO-14)

• Class AB Output Stage Eliminates Crossover Distortion
• Pin Compatible with MC3403 and LM324
• True Differential Inputs
• Internally Frequency Compensated
• Short Circuit Protection

PIN CONNECTIONS

• Low Power Supply Current (0.6 mA/Amplifier)
Out 1 1

Equivalent Circuit Schematic

Inputs 1 {

2

Inputs 2 {

5

Out2

7

Out 4
13

}

10

}

Inputs 4

Inputs 3

(1/4 of Circuit Shown)

.-._------~--~--------._--------~vcc

(Top View)

25
Inverting
Input o----1--H--+--'

Output

t==L--U~-r1

50

ORDERING INFORMATION
Temperature Range

Package

lM248J
lM248N

-25° to +85°C

Ceramic DIP
Plastic DIP

lM348D
l:.M348J
lM348N

0° to +70°C

50-14
Ceramic DIP
Plastic DIP

Device

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-66

LM348, LM248
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Symbol

Rating
Power Supply Voltage

VCC
VEE

Input Differential Voltage
Input Common Mode Voltage
Output Short Circuit Duration
Operating Ambient Temperature Range
Storage Temperature Range
Ceramic Package
Plastic Package
Junction Temperature
Ceramic Package
Plastic Package

VID
VICM
tsc
TA
Tstg
TJ

Value
+18
-18

Unit
Vdc
V
V

±36
±18
Continuous
to +70
-25 to +85

1 o

°c
°C

-65 to +150
-55 to +125
°C
175
150

ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25°C, unless otherwise noted.)
Characteristics
Input Offset Voltage

Symbol
Via

(RS~10k)

Input Offset Current
Input Bias Current
Input Resistance
Common Mode Input Voltage Range
Lar~e Signal Voltage Gain
RL~2.0 k, Va =±10 V)

110
liB
rj

VICR
AVOL

-

Channel Separation
(f = 1.0 Hz to 20 kHz)

Min

Typ

-

1.0

0.8
±12
25

-

Max
6.0

Unit
mV

4.0
30
2.5

50
200

nA

-

-

-

Mn
V

160

-

V/mV

-120

-

dB
dB

CMR

70

90

-

Supply Volta~e Rejection
(RS~10 )

PSR

77

96

-

out~ut Volta~e Swing
RL~10 )

Va

±12
±10

±13
±12

Output Short Circuit Current
Supply Current (All Amplifiers)
Small Signal Bandwidth (AV = 1)
Phase Margin (AV = 1)
Slew Rate (AV = 1)

ISC

-

-

25
2.4
1.0
60
0.5

Common Mode Rejection
(RS~10k)

RL~2k)

BW

-

c!lm
SR

-

10

-

4.5

-

-

I ss ath erw'se
ELECTRICAL CHARACTERISTICS (VCC=+ 15V VEE=-15 II, TA= *Thi h ta Tlow, une
I
noted)
Symbol
Min
Typ
Max
Characteristics
7.5
Input Offset Voltage
Via
(RS~10 kCl)

-

Input Offset Current
LM248
LM348
Input Bias Current
LM248
LM348
Common Mode Input Voltage Range
Large Signal Voltage Gain
(RL~ 2 k, Va = ±10 V)
Common Mode Rejection

110
liB

-

rnA
rnA
MHz
Degrees

V/IlS

Unit
mV
nA

-

125
100

-

500
400

-

-

V/mV

-

dB

VICR
AVOL

±12
15

CMR

70

90

Supply VOlta~e Rejection
(RS~10 )

PSR

77

96

-

out8ut Voltage Swing
RL~ 10 k)
(RL~ 2 k)

Va

±12
±10

±13
±12

-

-

(RS~10k)

V

,

V

V

• Thigh =85'e for LM24B, and 70'e for LM348. Tlow =-25'C for LM248, and o'e for LM348.
NOTE: Any of the amplifier outputs can be shorted to ground indefinitely; however, more than one should not be simultaneously shorted or the maximum junction
temperature will be exceeded.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-67

LM348, LM248
Figure 1. Power Bandwidth
(Large Signal Swing versus Frequency)

Figure 2. Open-Loop Frequency Response

28

120

~

24

100

w

20

~

C!l

!:3

g

Iil

\
\

16

I-

~

D..

50

-?

12
Voltage Follower
THD<5%
I 11111111

8.0
4.0

:Eo

80

~

60

:z
w

\

!:3
g

40

~

20

10

100

-a
Q.
~

w

C!l

!:3
g
5D..
I~

0

-?

1.0k
f, FREQUENCY (Hz)

10k

-20
1.0

lOOk

10

±12V
±9.0V

/.
f/
//
p-

±B.OV

IJ

AY
200

500 7001.0 k

2.0 k

100

5.0 k 7.0 k 10 k

-15
-14
-a. -13
Q. -12

~

10M

±15 VSupplies

:a! -10
!:l -9.0
g -8.0
5 -7.0
~ -B.O
o -5.0
6 -4.0
:> -3.0
-2.0
-1.0

12V

1/
±9.0V

~

1/
/

±B.OV
I I I

~

100

200

500 700 1.0 k
2.0 k
Rt.. LOAD RESISTANCE (0)

Figure 5. Output Voltage Swing versus
Load Resistance (Single Supply Operation)
30V
27V
24V
21V
18V
15V
12V

~

D..
D..

::>

'"

9.0V
B.OV
5.0V
2.0

1.0M

-11

Rt.. LOAD RESISTANCE (0)

1.0

'""

I.Ok
10k
lOOk
f, FREQUENCY (Hz)

Figure 4. Negative Output Voltage Swing
versus Load Resistance

±15 VSupplies
I I

1.0 100

""-

0

Figure 3. Positive Output Voltage Swing
versus Load Resistance
15
14
13
12
11
10
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0

~

<

IIIIIII

0

'"""-

C!l

3.0 4.0 5.0 6.0 7.0
Rt.. LOAD RESISTANCE (kW)

8.0

9.0

10

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-68

5.0 k 7.0 k 10 k

LM348, LM248
Figure 7. Open-Loop Voltage Gain
versus Supply Voltage

Figure 6. Noninverting Pulse Response
105
100

'\.

I

>
Ci
::;o

<0

~

J
J

z

"-'\



>

-{l.3 V of ground or negative supply.
3. AI oulput swilch point, VO~ 1.4 Vdc, RS = 0 Q wilh Vee from
5.0 Vdc 10 30 Vdc, and over Ihe full inpul common mode range
(0 Vlo Vee =-1.5 V).

4. Due 10 the PNP transistor inputs, bias current will flow out of the inputs.
This current is essentially constant, independent of the output state.
therefore. no loading changes will exist on the input lines.
5. Input common mode of either input should not be permitted to go more
than 0.3 V negative of ground or minus supply. The upper limit of
common mode range is Vee -1.5 V.
6. Response time is specified wHh a 100 mV step and 5.0 mV of overdrive.
With larger magnitudes 01 overdrive faster response times are
obtainable.
7. The comparator will exhibit proper output state if one of the inputs
becomes greater than Vee. the other input must remain within the
common mode range. The low input state must not be less than -{l.3 V
of ground or minus supply.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-74

LM393,A, LM293, LM2903
LM293/393,A

LM2903

Figure 2. Input Bias Current versus
Power Supply Voltage

Figure 5. Input Bias Current versus
Power Supply Voltage

so

~

70

zw

60

::::>

50

I-

so

:[
IZ

TA = _55' e

a:
a:
Q

40

'"~
~

50
40

TA = +70' e

'"::::>

30

I-

a.
~

20

~

::::>

Q

~

0.6

a.
a.

::::>



I
TA = +70' e

~

I

O.S

::::>

TA = +125°e



rY:V

-

10
15
20
25
Vee, SUPPLY VOLTAGE (Vde)

'-'

~ -?'
V . . . . Y" TA= _55' e

-- ---

I
5.0

~
w

VlI

./

I

10

rill

!;-

-

Figure 6. Output Saturation Voltage
versus Output Sink Current

Figure 4. Power Supply Current versus
Power Supply Voltage

«.§.

+25' e

TA - +S5'

-

Figure 3. Output Saturation Voltage
versus Output Sink Current
10

I

Lo,d
TA

20

a

40

I

I

Q

TA = A' e

 2.0 kn, TA = +25'C
Vs = ±15 V, Va = ±10 V, RL > 2.0 kn, TA = Tlow
Average Temperature Coefficient of Input Offset Voltage, Tlow';; TA';; Thillh
Average Temperature Coefficient of Input Offset Current
+25'C,;; TA';; ThiBh
Tlow';; TA';; +25'

-

AVOL

TCVIO

25
15

160

-

-

-

6.0

30

-

0.01
0.02

0.3
0.6

±12
±10

±14
±13

-

TCIIO

Mn
mA
V/mV

IlVl'C
nAl'C

V

Output Voltage Swing (TA = Tlow to Thigh)
VS=±15 V, RL = 10 kn
RL=2.0kn

Va

Input Voltage Range (TA = Tlow to Thigh)
VS=±15V

VICR

±12

-

Common Mode Rejection (TA = Tlow to Thigh) RS';; 50 kn
Supply Voltage Rejection (TA = Tlow to T hioh) RS ,;; 50 kn

CMR
PSR

70
70

90

-

96

-

V
dB
dB

NOTES: 1. For supply voltages less than ±15 V, the absolute maximum input voltage is equal to the supply voltage.
2. For operating at elevated temperatures, the device must be derated based on a maximum junction temperature of 100'C.
3. Unless otherwise noted, these specifications apply for: ±5.0 V,;; VCCNEE';; ±15 V, Tlow = O'C, Thigh = +70'C.

Figure 1. Minimum Input Voltage Range
20
Applies over specified
Operating Temperature
~
w
Range
(!)
:z 16

20

>

±!.

(!)

w

~
a

>
....
:::>
c..

./

8.0

Positive../'

/

10'

w

~

V

(!)

./

Applies over specified
Operating Temperature
Range

12

:::>

V

VV
RL= 10kn
V":: V Minimum

r-- I- Minimum

c..
....
:::>

~ r--

a 4.0

/Negative

o

16

~
§? 8.0
....

V

4.0

o

3:
en

/'

12

~

j

:z

./

~

(!)

Figure 2. Minimum Output Voltage Swing

RL = 2.0kn

~

o
5.0
10
15
Vee, (-VEB, SUPPLY VOLTAGE M

20

o

5.0
10
15
Vee, (-VEE), SUPPLY VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-78

20

LM307
Figure 3. Minimum Voltage Gain
100

iii"

94

Figure 4. Typical Supply Currents

Applies over specified
Operating Temperature
Ranoa

1 2.5 f--+---+--+--+---+--+--+---I
~ 2.0 1 - - + - + - - + - - + - - 1 - - + - - + - - 1
w

~ t==!=!=~;;~===l~=t=!=~

~

z

i§

.,.........

88

w

CJ

!:§
0

82

~

>

g

<

........

1.5

~

o..
o..

I-"""

~

76
70

1.0 1 - - + - + - - + - - + - - 1 - - + - - + - - 1

uJ
!!J
~ 0.51--+-+--+--+--1--+--+--1

<
C,)
.9

a

5.0

10

15

Vcc, (-VE8, SUPPLY VOLTAGE

5.0

20

Figure 5. Open-Loop Frequency Response

iii"

~

z

;;:
CJ
w
CJ

!:§
0

>

i

<

180
160
140
120
100
80

10

15

20

Vcc, (-VEE), SUPPLY VOLTAGE M

M

Figure 6. Large Signal Frequency Response

>
.:t!.

15

CJ

---

z
§:


f'.....

t--

::::l

o.. 5.0
t--

~

20

0

~

.........

-20
10

100

1.0k

10k

~

::::l

...........

a
1.0

10

CJ

!:§

lOOk

1.0M

10M 100M

I"

10k

1.0 k

lOOk

t, FREQUENCY (Hz)

t, FREQUENCY (Hz)

Figure 7. Voltage Follower Pulse Response

2:
CJ

10
8.0



t--

::::l

o..
t--

\

a
-4.0
-6.0

-?

-8.0
-10

_.

f

Input

\

/ Output

/

-2.0

~

::::l

r-

'\.
~.

" a

10

20

30

40

50

60

70

80

90

t, TIMEllts)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-79

1.0M

10M

MOTOROLA

LM308A

SEMICONDUCTOR----TECHNICAL DATA

SUPER GAIN
OPERATIONAL AMPLIFIER

Precision Operational Amplifier

SILICON MONOLITHIC
INTEGRATED CIRCUIT

The LM308A operational amplifier provides high input impedance, low input
offset and temperature drift, and low noise. These characteristics are made
possible by use of a special Super Beta processing technology. This amplifier
is particularly useful for applications where high accuracy and low drift
performance are essential. In addition high speed performance may be
improved by employing feedforward compensation techniques to maximize
sl.ew rate without compromising other performance criteria.
The LM308A offers extremely low input offset voltage and drift specifications
allowing usage in even the most critical applications without external offset
nUlling.
•
•
•
•

N SUFFIX
PLASTIC PACKAGE
CASE 626

.~

Operation from a Wide Range of Power Supply Voltages
Low Input Bias and Offset Currents
Low Input Offset Voltage and Guaranteed Offset Voltage Drift Performance
High Input Impedance

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

'.

Frequency Compensation

1

Standard Compensation

Modllied Compensation

R2

R2

Inverting ..-vR""I+<:>-l

Inpul

Noninverting ...,.R",,3--<>-l

Input

Inverting ..-vR""I""","-<>-I

Output

Input

Output

Noninverting ItJIIR",,3--<>-I

PIN CONNECTIONS

Input

Com pen A
Inputs

,

Compen B

7

VCC

6

Output

4

5

NC

{

VEE

Standard Feedlorward
Compensation

1

2

'------'
(Top View)

Feedlorward Compensations lor
Oecoupllng Load Capacitance

10k
Input e-'\Nv-_-----ll---.
500

> 5XI05 pF
R2

ORDERING INFORMATION

Device
LM308AN
LM308AD

MOTOROLA LlNEARIiNTERFACE ICs DEVICE DATA
2-80

Temperature
Range
0° to +70°C

Package
Plastic DIP
SO-8

LM308A
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Symbol

Value

Unit

VCC,VEE

±1B

Vdc

Input Voltage (See Note 1)

VI

±15

V

Input Differential Current ( See Note 2)

liD

±10

rnA

Output Short Circuit Duration

tsc

Operating Ambient Temperature Range

TA

o to +70

°C

Tstg

-65 to +150

°C

TJ

+150

°C

Rating
Power Supply Voltage

Storage Temperature Range
Junction Temperature

Indefinite

Notes: 1. For supply voltages less than ±15 V, the maximum input voltage is equal to the supply voltage.
2. The inputs are shunted with back-to-back diodes for overvoltage protection. Therefore,
excessive current will flow if a differential input voltage in excess of 1.0 V is applied
between the inputs, unless some limiting resistance is used.

ELECTRICAL CHARACTERISTICS (Unless otherwise noted these specifications apply for supply voltages of +5.0V 5 VCC 5 + 15 V
and -5.0 V ~ VEE ~-15 V, TA = +25°C.)
Symbol

Characteristics
Input Offset Voltage

Via

Input Offset Current

110

Input Bias Current

liB

q

Input Resistance
Power Supply Currents
(VCC = +15 V, VEE =-15 V)

ICC,IEE

Large Signal Voltage Gain
(VCC = +15 V, VEE = -15 V, Va = ±10 V, RL ~ 10 kil)

AVOL

Typ

Max

Unit

-

0.3

0.5

mV

0.2

1.0

nA

1.5

7.0

nA

10

40

-

Mil

Min

-

±0.3

BO

300

±D.B

-

rnA
V/mV

The following specifications apply over the operating temperature range.
Input Offset Voltage

Via

Input Offset Current

110

Average Temperature Coefficient of
Input Offset Voltage
TA (min) 5 TA 5 TA (max)

dVIO/dT

Average Temperature Coefficient of Input Offset Current

dllO/dT

-

-

-

0.73

mV

1.5

1.0

5.0

nA
(.lV/oC

2.0

10

pAloC

10

nA

-

V/mV

Large Signal Voltage Gain
(VCC +15 V, VEE = -15 V, Va = ±10 V, RL ~ 10 kil)

AVOL

60

-

Input Voltage Range
(VCC = +15 V, VEE =-15 V)

VICR

±14

-

-

V

Common Mode Rejection
(RS550 kil)

CMR

96

110

-

dB

Supply Voltage Rejection
(RS550 kil)

PSR

96

110

-

dB

Output Voltage Range
(VCC = +15 V, VEE = -15 V, RL = 10 kil)

VOR

±13

±14

-

V

Input Bias Current

liB

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-81

LM308A

,

Figure 2. Maximum Equivalent Input Offset
Voltage Error versus Input Resistance

Figure 1. Input Bias and Input Offset Currents

~

~
~

u

~

2.0
1.B

III

1.2
1.0

D..

O.B

~
~

\..

1.6
1.4

>"

0.25

.§.
w

~

"-

'"

""'" ...........

:-....

~

0.20 !z
~
a:
=>
0.15U

,
110
I
liB

~

tu

~~

!z
~
:;
:;
fil

0.05:g

0.2
-60 -40

-20

o

20 40 60 BO
1, TEMPERATURE (0C)

100

,

LL

~

o

10

o

z

0.4

""

13

~

It
0.100

i9 0.6

100

o

120 140

1.0

0.1
lOOk

1.0M
10M
Ii, INPUT RESISTANCE (Q)

Figure 4. Power Supply Currents versus
Power Supply Voltages

Figure 3. Voltage Gain versus Supply Voltages
130

.100 r--- +125°C
--'

TA"

13

o
~

",

z

=>
u
~

r-

300

~

=>
en

5.0
10
15
VCC" I VEE I, SUPPLY VOLTAGES (V)

"uu

200 I - - '+70 0C
100

BO

w

~

13

60

~ 40
...:;

0

~

20

..... V

--- -

-I"'"

5.0
10
15
VCC" IVEE I, SUPPLY VOLTAGES (V)

20

1~

""" ................ 1"-..r-... ......... I"-..
""" 1"-..'
I"-...
"'" , 1"-..."

~w

CF"30pF_

CF"l00PF~ ,
100

\

12

loOk 10k lOOk loOM
f, FREQUENCY (Hz)

\
~

B.O

\
CF " 3.0 pF

"\
4.0

Ii:

~
10M

\
\

~

~

" ~I

10

II

~

13~
.........

20

VCC"+15V
VEE"-15V
TA"+25°C

16

w

CF " 3.0 pF

0
-20
1.0

+l25°C

f--I

,

Figure 6. Large Signal Frequency Response

120

~

00C

o
o

20

140

100

U

w

~

Figure 5. Open-Loop Frequency Response

~

TA" -55°C

I - - +25 0C

D..
D..

CF"O
f"100Hz

o

400

w
a:
a:

-

.....-:::

90
BO

z

100M

100M

r-

0
1.0k

CF"30pF

I I II

.........

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-82

-

!'.....

10k
lOOk
f, FREQUENCY (Hz)

1.0M

LM308A
SUGGESTED DESIGN APPLICATIONS

INPUT GUARDING

alcohol and blown dry with compressed air. After cleaning, the
boards should be coated with epoxy or silicone rubber to
prevent contamination.
Even with properly cleaned and coated boards, leakage
currents may cause trouble at + 125°C, particularly since the
input pins are adjacent to pins that are at supply potentials.
This leakage can be significantly reduced by using guarding
to lower the voltage difference between the inputs and
adjacent metal runs. The guard, which is a conductive ring
surrounding the inputs, is connected to a low-impedance point
that is at approximately the same voltage as the inputs.
Leakage currents from high voltage pins are then absorbed by
the guard.

Special care must be taken in the assembly of printed circuit
boards to take full advantage of the low input currents of the
LM308A amplifier. Boards must be thoroughly cleaned with

Figure 7. Fast (1) Summing Amplifier with
Low Input Current
C5 (2)
RS
Input ....,VV'.,.....~------_--j
R4

Figure 8. Sample and Hold
Output

VCC
Input

(1) Power Bandwidth: 250 kHz
Small Signal Bandwidth:
3.5 MHz
Slew Rate: 10 V/~s
(2) C5;

/"i.r-e_

(3) In addition to increasing speed,
the LM101A raises high and low
frequency gain, increases output
drive capability and eliminates
thermal feedback.

6 X 10-8
Rl

30pF

(1) Teflon, Polyethylene or Polycarbonate
Dielectric Capacitor

Figure 9. Connection of Input Guards
Inverting Amplifier
Rl

Follower

Noninverting Amplifier

R2

R2

Input ._'VVv-JWIr+o Output

+o---~----+-~--~

L-~----------------~----------~----+-----~+---~----~---oVEE

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-84

MOTOROLA

LM833

SEMICONDUCTOR-----TECHNICAL DATA

Dual Low Noise, Audio Amplifier

DUAL OPERATIONAL
AMPLIFIER

The LM833 is a standard low-cost monolithic dual general-purpose operational
amplifier employing Bipolar technology with innovative high- performance
concepts for audio systems applications. With high frequency PNP transistors,
the LM833 offers low voltage noise (4.5 nV//Ffz ), 15 MHz gain bandwidth
product, 7.0 V/v.s slew rate, 0.3 mV input offset voltage with 2.0 v.V/oC
temperature coefficient of input offset voltage. The LM833 output stage exhibits
no deadband crossover distortion, large output voltage swing, excellent phase
and gain margins, low open-loop high frequency output impedance and
symmetrical source/sink AC frequency response.
The LM833 is specified overthe automotive temperature range and is available
in the plastic DIP and SO-8 packages (P and D suffixes). For an improved
performance dual/quad version, see the MC33079 family.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

N SUFFIX
PLASTIC PACKAGE
CASE 626

• Low Voltage Noise: 4.5 nV/{HZ
• High Gain Bandwidth Product: 15 MHz
• High Slew Rate: 7.0 V/v.s
• Low Input Offset Voltage: 0.3 mV
• Low T.C. of Input Offset Voltage: 2.0 v.V/oC
• Low Distortion: 0.002%
• Excellent Frequency Stability

DSUFFIX
PLASTIC PACKAGE
eASE 751
(SO-8)

• Dual Supply Operation

PIN CONNECTIONS
Output 1 1

MAXIMUM RATINGS
Rating

Symbol

Value

Unit

Vs

+36

V

VIDR

30(1)

V

Input Voltage Range

VIR

±15(1)

V

Output Short Circuit Duration (Note 2)

tsc

Indefinite

Operating Ambient Temperature Range

TA

-40 to +85

Operating Junction Temperature

TJ

+150

°C

Storage Temperature

Tstg

-60 to +150

°c

Maximum Power Dissipation (Note 2)

PD

500(3)

mW

Supply Voltage (VCC to VEE)
Input Differential Voltage Range

7

Inputs 1 {

(Top View)

ORDERING INFORMATION
Device
LM833N
LM833D

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-85

Output 2

2

6 } Inputs 2

°c

NOTES: 1. Either or both input voltages must not exceed the magnitude of VCC or
VEE·
2. Power dissipation must be considered to ensure maximum junction
temperature (TJ) is not exceeded (See power dissipation performance
characteristic).
3. Maximum value at TA:S; 85°C.

1------,

Temperature
Range
-40° to +85°C

Package
Plastic DIP
SO-8

LM833
DC ELECTRICAL CHARACTERISTICS (VCC = + 15 V, VEE = -15 V, TA = 25°C, unless otherwise noted.)
Symbol

Min

Typ

Max

VIO

-

0.3

5.0

AVlotAT

-

2.0

-

Input Offset Current (VCM = 0 V, Vo = 0 V)

110

-

10

200

nA

Input Bias Current (VCM = 0 V, Vo = 0 V)

liB

-

300

1000

nA

VICR

-

+14
-14

+12

V

Characteristics
Input Offset Voltage (RS = 100, Vo = 0 V)
Average Temperature Coefficient 01 Input Offset Voltage
RS = 10!l, Vo = 0 V, TA = Tlowto Thigh

Common Mode Input Voltage Range

-12

Unit
mV
IlV/oC

-

dB

-

V

Large Signal Voltage Gain (RL = 2.0 k!l, Vo = ±10 V

AVOL

90

110

Output Voltage Swing: RL = 2.0 kil, VIO = 1.0 V
RL = 2.0 kil, VIO = 1.0 V
RL = 10 kil, VID = 1.0 V
RL = 10 k!l, VID = 1.0 V

VO+
VaVO+
Va-

10

-

13.7
-14.1
13.9
-14.7

Common Mode Rejection (Vin = ±12 V)

CMR

80

100

-

dB

Power Supply Rejection (VS = 15 V to 5.0 V, -15 Vto -5.0 V)

PSR

80

115

-

dB

-

4.0

8.0

rnA

Power Supply Current (VO = 0 V, Both Ampliliers)

12

10

-10

-12

AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE =-15 V, TA = 25°C, unless otherwise noted.)
Characteristics
Slew Rate (Vin = -10 Vto +10 V, RL = 2.0 k!l, AV = +1.0)
Gain Bandwidth Product (I = 100 kHz)

Symbol

Min

Typ

Max

Unit

SR

5.0

7.0

-

V/IlS

GBW

10

15

-

MHz

Unity Gain Frequency (Open-Loop)

IU

-

9.0

-

MHz

Unity Gain Phase Margin (Open-Loop)

em

-

60

-

Oeg

Equivalent Input Noise Voltage (RS = 100 !l, 1 = 1.0 kHz)

en

-

4.5

-

Equivalent Input Noise Current (I = 1.0 kHz)

in

-

0.5

Power Bandwidth (VO = 27 V p_p, RL = 2.0 kil, THO:s; 1.0%)

BWP

120

Oistortion (RL = 2.0 k!l, 1 = 20 Hz to 20 kHz, Vo = 3.0 Vrms , AV = +1.0)

THO

-

-

0.002

-

%

Cs

-

-120

-

dB

Channel Separation (I = 20 Hz to 20 kHz)

Figure 1. Maximum Power Dissipation
versus Temperature

Iz

800

1000

~

~ 600

~

en
!!2

a::

G

Q

~\

~c..

400

:;;;
:::>
:;;;

i
rf:

.,
"

200

o

-50

kHz

Figure 2. Input Bias Current versus Temperature

Q

a::

nV/j¥Z
pNjtiZ

o
50
100
TA, AMBIENT TEMPERATURE (DC)

~
co
I-

~

80

VCC=+15V
VEE=-15V
VCM=OV

0

600

400

~

j

~,

"

200

r0-

O
-55

150

--

-25

0
25
50
75
TA, AMBIENT TEMPERATURE (DC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-86

100

125

LM833
Figure 3. Input Bias Current versus
Supply Voltage

Figure 4. Supply Current versus
Supply Voltage

800

~
I-

i

10

l8.0

TA=25°C
600

=>
<..>
~ 400

5a.

-

i

6.0

=>

~

a.
=>
en

~ 200

.iJ

!!l

10
15
VCC.IVEEI. SUPPLY VOLTAGE M

~
:

4.0

/

2.0

20

5.0

ar

110

<
(!l
w

100

>

<..>

0

..::. 95
a
~

/'

,/
0
25
50
75
TA. AMBIENT TEMPERATURE (OC)

100

125

10
15
VCC.IVEEI. SUPPLY VOLTAGE M

Figure. 7. Open-Loop Voltage Gain and
Phase versus Frequency
ar 120

<
(!l

100

w

c:J

1:3
a

80

a

a.

60

zw

40

>

o

-,

,~

1',

.........

VCC= +15V
VEE=-15V
0
20 RL=2.0 kn
TA= 25°C
~
I
o
100
1.0
10
a.

..::.

~

- -......,

-

'"

1.Ok
10k
lOOk
I.FREQUENCY (Hz)

ffi
w

......
-

~

45 a:

t5
is

e.

a.

ffi

90 a.
~

"-

tOM

"N" 20

:!:

w

Phase _

Gain~

20

Figure 8. Gain Bandwldht Product
versus Tmperature

....,

9
0

~

/'

-25

:2z

20

I
RL = 2.0kQ
TA = 25°C
-

~

1---

(!l

1:3
a

10
15
VCC.IVEEI. SUPPLY VOLTAGE M

Figure 6. DC Voltage Gain versus
Supply Voltage
Vcc= +15V
VEE=-15V
RL=2.0kn

:2z 105

Vo

V

Figure 5. DC Voltage Gain
versus Temperature
110

-

Vee

~

<..>

RL=oo
TA=25°C

IS

~

135 ~
ISl

180
10M

r--

15

~

~
~
~

...

10

~ 5.0

s:
!!l

---- -- _---

Vee = +15V
VEE=-15V
1=100kHz

0
-55

I
-25

0
25
50
75
TA. AMBIENT TEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-87

...

100

125

LM833
Figure 9. Gain Bandwidth Product versus
Supply Voltage

¥

Figure 10. Slew Rate versus Temperature
10

30

~

f= 10JkHZ
TA = 25°C

~ 8.0
~

.-

/'

..l

-

~

~

....
:::>
f=
:::>

n~vo

2.0

;t

15 -

10
15
Vee, IVEEI, SUPPLY VOLTAGE M

10

w

~ 5.0

~

RL=10kn
TA=25°e

0

§!5 -5.0

- -10

~

---

- -r--...

-15
-20
5.0

-

10

125

Vee=+15V
VEE=-15V
RL=2.0kn
THO,; 1.0%
TA = 25°C

15
10
5.0
010

20

111111111111111111
100

1.Ok
10k
1.0M
f, FREQUENCY (Hz)

;E
w

+Vsat

~

~

!;c
a:

~

-Vsat

14

-

~

f.

-a 30

- r-- Fall!ng

~

I

-25

n

35

I

...-

I

-

Figure 12. Output Voltage versus Frequency

Figure 11. Slew Rate versus Supply Voltage
10

--:= ---

Rising

18

20

>

Vee, IVEEI, SUPPLY VOLTAGE M

13
-55

-25

Vee=+15V
VEE=-15V
RL=10kn
I
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (0C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-88

LM833
Figure 16. Common Mode Rejection
versus Frequency

Figure 15. Power Supply Rejection
versus Frequency
1D

140

a

z

120

Lil
a:

100

:s
~
w
~

......

80

a..
a..
en

:::J

- -1-1"...... 1'-

.....

-PSR
III

60

a:
w
;;:
aa..

-PSR= 20Log

o

100

~I'
r-.....

I II

20

a..

.......

......

40 +PSR = 20Log

a:
en

VCC=+15V
VEE=-15V
TA = 25°C

1.0k

( aVO/ADM) ....
aVCC

"oM
.~
+

z 140
I;:::
~ 120

a

Il.vD

~

........

1D 160

:s

.l.VEE

Lil
~ 100

III

.....

.......

( aVo/ADM)
aVEE
10 k
100 k
f, FREQUENCY (Hz)

a

'r-... r-

...... 1'-

1.0M

10M

~

1.0

z

~

~

O.

i5

<->

I

Z

a

1>f.~"
'V

~

~
--'

Ilf·1

ci

0.001
10

Vo = 3.0 Vrms
1.0k

100

1111

I

fTL

III

10k

W

1.0
10

100 k

100

lnllilll

tOk
f, FREQUENCY (Hz)

10k

lOOk

Figure 20. Input Referred Noise Voltage
versus Source Resistance

loo~~=-.
~
j
HtltlH-t-+i:MfilI++-ttHttl
~

w

" ........ ............

2.0

~

VCC=+15V
VEE=-15V
TA = 25°C

~

z>- 1.0
w
a:
a:
:::J
0.7
<->

10M

VCC= +15V
VEE=-15V
RS=looa

w

Figure 19. Input Referred Noise Current
versus Frequency

~

I.OM

5.0

en

o
z
~

f, FREQUENCY (Hz)

2.0

x ADM)

........

~

I~II_IU II:

~

i=

~

:>
~
C!I
!:§

5
mlr °1111

0.01

~

II

I III

10

VEE=-15V
RL = 2.0 ka

::;;

(a~~OM

I

Figure la.lnput Referred Noise Voltage
versus Frequency

I~~~= +~5~11

RL

CMR = 20Log

aVO

::;; 80 I-- VCC = +15 V
z
a
VEE=-15V
~ 60 I-- VCM=OV
a
<->
a: 40 I-- aVCM=±1.5V
::;;
I TA I= ~~oIC I I I I
<->
20
1.0k
100
10k
lOOk
f, FREQUENCY (Hz)

Figure 17. Total Harmonic Distortion
versus Frequency

a

~D

I IIII I III

o

I"-- I'- +PSR

aV~

VCC=+15V
VEE=-15V
Vn(lolal) = (inRS)2 +en2 + 4KTRS
TA=25°C

C!I

!:§

mlll

~IOI
••••
~

en
0
z
>:::J

0.5
0.4

~

0.3

~

0.2
10

., 1.0 I-U...u.J.WIj...u...u.WIIL..u..J..U.wIL........u.J.WIL..u..u.u.llll..JU-L..L.UJWI
1.0
10
100
1.0k
10k
lOOk
tOM

a..

-

--....

!ll
~

c

;:

100

1.0 k
f, FREQUENCY (Hz)

10 k

lOOk

RS, SOURCE RESISTANCE (a)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-89

LM833
Figure 22. Noninverting Amplifier Slew Rate

Figure 21. Inverting Amplifier

t, TIME (2.0 ~/DIV)

t, TIME (2.0 !1s/DIV)

Figure 23. Noninverting Amplifier Overshoot

t, TIME (200 ns/DIV)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-90

MC1436,C
MC1536

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

High Voltage, Internally
Compensated Operational
Amplifier

OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT

The MC1436, C was designed for use as a summing amplifier, integrator, or
amplifier with operating characteristics as a function of the external feedback
components.
• Maximum Supply Voltage: ±40 Vdc (MC1536)
• Output Voltage Swing:
±30 Vpk(min) (VCC =+36 V, VEE =-36 V) (MC1536)
±22 Vpk(min) (VCC = +28 V, VEE =-28 V)
• Input Bias Current: 20 nA max (MC1536)
• Input Offset Current: 3.0 nA max (MC1536)
• Fast Slew Rate: 2.0 V/IlS typ
• Internally Compensated
• Offset Voltage Null Capability
• Input Overvoltage Protection
• AVOL: 500,000 typ
• Characteristics Independent of Power Supply Voltages:
(±5.0 Vdc to ±36 Vdc)

Pl SUFFIX
PLASTIC PACKAGE
CASE 626

U SUFFIX
CERAMIC PACKAGE
CASE 693

Figure 1. Differential Amplifier with ±20 V
Common Mode Input Voltage Range
R2
lOOk

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

B~

Rl
10k

1

2

VA
MC1536
MC1436, C

R3
470

Vo = 10 (VB -VAl

3
+

VB

-2BV

R4
4.7k

PIN CONNECTIONS

Figure 2. Typical Noninverting X10 Voltage Amplifier
7
VI = 4.4 Vp-p

Offset Null

1

Noninv. Input

3

VEE

4

7 VCC

+2BV

3
6

MC1536
MCl436 , C

+
L-._--'

6

Output

5

Offset Null

VO= 44Vp.p

ORDERING INFORMATION

2

4

-2BV
Device
MC1436CD,D

9.0k

Ml;14361"'1,l;~

loOk

Temperature
Range

Package

0° to +70°C

Plastic DIP

80-8
1

MC1436CU,U
MC1536U

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-91

Ceramic DIP
55° to +125°C

Ceramic DIP

MC1436,C, MC1536
MAXIMUM RATINGS (TA = +25°e, unless otherwise noted.)
Symbol

MC1536

MC1436

MC1436C

Unit

Power Supply Voltage

Rating

Vec
VEE

+40
-40

+34
-34

+30
-30

Vdc

Input Differential Voltage Range

VI DR

Note 3

Input Common Mode Voltage Range

VICR

Note 3

V

tsc

5.0

sec

Po

680
4.6

mW
mW/OC

Output Short Circuit Duration
(VCC = VEE = 28 Vdc, Vo

= 0)

Power Dissipation (Package Limitation)
Derate above TA = +25°C
Operating Ambient Temperature Range

TA

Storage Temperature Range

-55 to +125

V

o to +70

°c

-65 to +150

Tstg

°C

ELECTRICAL CHARACTERISTICS (Vce = +28 V, VEE = -28 V, TA = 25°e, unless otherwise noted.)
MC1436

MC1536

Symbol

Characteristics
Input Bias CUrrent
TA =+25°C
TA = T,ow to Thigh (See Note 1)

liB

Input Offset Current

110

TA =+25 C
Q

TA = +25°C to Thl~h
TA = Trow to +25
Input Offset Voltage
TA'" +25°C
TA = Trow to Thigh

Differential Input Impedance (Open-loop, f

Via

:0:;;

Min

-

Typ

Max

Min

Typ

MC1436C
Max

Min

Typ

Max

8.0

-

-

-

1.0

-

40
55

-

-

10
14
14

-

-

10

25

-

-

-

-

5.0

-

10
14

-

-

10
2.0

-

-

10
2.0

-

Mil
pF

Vpk

20
35

-

-

15

3.0
4.5
7.0

-

5.0

-

5.0

-

-

25

90

-

nAdc

-

-

-

mVdc

-

-

5.0
7.0

rp
Cp

-

10
2.0

-

zic

-

250

-

-

250

-

-

250

-

±25

-

±22

±25

-

±1S

±20

-

-

50

-

-

50

-

-

50

-

80

110

-

70

110

-

50

90

-

2.0

12

S.O Hz)

Parallel Input Resistance
Parallellnpul Capacitance
Common Mode Input Impedance (f =.:.;; 5.0 Hz)
Input Common Mode Voltage Range

VICR

Equivalent Input Noise Voltage
(AV= 100, RS= 10kQ 1= 1.0 kHz, BW= 1.0 Hz)

en

Common Mode Rejection (de)

CMR

Large Signal DC Open-Loop Voltage Gain

AVOL

{TA = +25"C
TA = Tlow to Thigh
(Va = ±10 V. RL" 10 kn, TA = +25"C)

(VA =±10 V, RL ~ 100 kil)

Power Bandwidth (Voltage Follower)
(AV= 1. RL =5.0 kil. THO<5%, VO= 40 Vp _p)

Unit

nAdc

±24

Mil

nV/(Hz) 1/2
dB
V/V
100,000

500,000

50,000

-

-

-

200,000

-

-

200,000

-

-

23

-

-

23

70.000

500,000

50,000

-

50.000

-

500,000

-

-

-

200.000

-

-

-

23

-

BWp

kHz

Ie

-

1.0

-

-

1.0

-

-

1.0

-

MHz

Phase Margin (Open-loop, Unity Gain)

$m

-

50

-

-

50

-

-

50

-

Degrees

Gain Margin

AM

-

18

-

-

18

-

-

18

-

dB

Slew Rate (Unity Gain)

SR

-

2.0

-

-

2.0

-

-

2.0

-

VlIlS

Unity Gain Crossover Frequency (Open-loop)

Output Impedance (f:5 5.0 Hz)

Zo

-

1.0

-

-

1.0

-

-

1.0

-

kn

Short Circuit Output Current

ISC

-

±17

-

-

±17

-

-

±19

-

mAdc

Output Voltage Range (RL = 5.0 kQ)
VCC '" +28 Vdc, VEE = -28 Vdc
VCC'" +36 Vdc, VEE = -36 Vdc

Va
±22
±30

±23
±32

-

±22

-

±20

±22

-

-

-

-

50
50

-

-

2.6
2.6

5.0
5.0

-

146

280

Power Supply Rejection
VEE == Constant, Rs :5 10 kQ
VCC = Constant, Rs :510 kQ
Power Supply Current (See Note 2)

DC Quiescent Power Consumption
(VO=O)
NOTES:

1.
2.

3.

±20

-

-

-

-

-

Vpk

-

~V/V

PSR +
PSR-

-

15
15

100
100

-

35
35

200
200

ICC
lEE

-

2.2
2.2

4.0
4.0

-

2.6
2.6

5.0
5.0

-

124

224

-

146

280

Pc

+7DOC for MC1436,C
'"
DOC for MC1436,C
Thigh
-55"C lor MC1536
+125"C for MC1536
VCC=VEE=5.0Vdel036VdelorMC1536
VCC = VEE = 5.0 Vde 10 30 Vde lor MC1436
Vee = VEE = 5.0 Vdc to 28 Vdc for MC1436C
Either or both input voltages must not exceed the magnitude of Vee or VEE +3.0 V.

TJow

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-92

-

mAdc

mW

MC1436,C, MC1536
Figure 4. Power Bandwidth

Figure 3. Low-Drift Sample and Hold
70

.~

C. 60

2

6.

~

w

,

C!l

'e o

"""'""

!:3
a

40

I-

30

a

20

~

10

>

ei

::>
a..
I::>

'Drift due to bias current
is typically 8.0 mV s

Sample
Command

7

6

50

'"

"-

~VO

4

-26V

10k

"'="

"' "'

....

r--..
1"-1-0..

o

4.0

20

6.0 8.010

40

60 80100

200

400

f. FREQUENCY (kHz)

Figure 5. Peak Output Voltage Swing versus
Power Supply Voltage
35

l

C!l

z

~w
C!l
!:3

I

r-- TA= 25° C

30

,

I

20

5.0

~

0

s

100

«C!l

80

z

w

/'

C!l

!:3

~
:.,

V

~

§

120
1il

/'

RL =5.0 kQ

15
10

140

/'

25

~

Figure 6. Open-Loop Frequency Response

a

,/

.£

/'
o

10

20

30

I-

60
40

~

20

-20
1.0

40

"

100

10

VCcNEE. POWER SUPPLY VOLTAGE (Vdc)

~

i'-....

~

1.0k
10k 100k
f. FREQUENCY (kHz)

I"

1.0M

10M 100M

Figure 8. Input Bias Current
versus Temperature

Figure 7. Output Short Circuit Current
versus Temperature
"U

1

32

!z
w

28

~

24

a:

(;)

5
~

20

(3

16

b:
a

12

:I:

en
~

8.0

~

4.0

a

~

o

-75

r--. ............
t:-..... .......... r-....

b.......
Sink

-50

~

2.8

gs

2.4

!z

2.0

~

1.6

- r-- r.:::::

~

1.2

w

~

-25
0
25
50
75
TA. AMBIENT TEMPERATURE (OC)

3.2

;g,

Source

............

C
F!:l

B

~

100

'"~

0.8

~

0.4

o-75

125

"-

"'"
-50

...........

-25
0
25
50
75
TA. AMBIENT TEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-93

....

"""" ""'"
100

125

MC1436,C, MC1536
Figure 9. Inverting Feedback Model

Figure 10. Noninverting Feedback Model

1 tZ2JZl
Zo=ze Ao(ro)
II:Ao(ro)10
~

~

Z2

Vo

Vj=-Z;II:R3

~

Zl

zi "'" Zl

ze = ze

1 tZ2JZl
Ao (ro )

Ze- O

110 (ro)-~

Figure 11. Audio Amplifier
lOOk
Current Drain,
10"" 100 mAde@
Rl =51 Q
01 .02.03 = lN4oo1

Figure 12. Voltage Controlled Current Source
or Transconductance Amplifier with
V to 40 V Compliance

o

Common
Heal Sink

R2
lOOk

10k
0.5~F

MC1536
Vo = 48 Vp-p
PO= 72W(rms)@RL=4.0Q
PO= 36W (rms)@RL=8.0Q

~

t

I

o.l~F

RTC
510

4.7

r---41-+--+----e----'--'
.'

R4
lOOk

VEE = -30 Vde

Figure 13. Representative Circuit Schematic
Rl Arc (R3 +R4)

Zo - Rl (RTC +R3) - R2 R4

Figure 14. Equivalent Circuit

Vee
Input
....-~~Output
6

Input

Inverting

2

22

Offset AdjuSi

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-94

7

MC1445
MC1545

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Gate Controlled Two Channel
Input Wideband Amplifier
The MC1445/1545 was designed for use as a general purpose gated wideband
amplifier, video switch, sense amplifier, multiplexer, modulator, FSK circuit,
limiter, AGC circuit, or pulse amplifier.

GATE CONTROLLED
TWO CHANNEL INPUT
WIDEBAND AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT

• Large Bandwidth; 50 MHz Typical
• Channel Select Time of 20 ns Typical
• Differential Inputs and Differential Output

Typical Applications
Video Switch or
Differential Amplifier with AGe

Multiplex or FSK

VEE
LSUFFIX
CERAMIC PACKAGE
CASE 632

Signal
Input

Gate or
AGClnput

Channel Select
Input

Amplitude Modulator

Pulse Width Modulator

RF e-J
Input

PIN CONNECTIONS

Output 1 1 - - - - - - ,

NC
NC
NC

Noninv.{ 3
InputB
Inv.
Noninv.{ 5
Input A
Inv.

Open

Output
Balanced Modulator

71-------'
(fop View)

Analog Switch

e-J
'V

Signal
Input

carrie~
Input

ORDERING INFORMATION

Bias Adjust

Device

Temperature Range

Package

LM1445L

0° to +75°C

Ceramic DIP

LM1545L

-55° to + 125°C

Ceramic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-95

MC1445, MC1545
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Rating

Symbol

Value

Unit

Power Supply Voltage

VCC
VEE

+12
-12

Vdc

Input Differential Voltage Range

VIDR

±S.O

V

Load Current

IL

25

rnA

Power Dissipation (Package Limitation)
Ceramic Dual In-Line Package
Derate above TA = +25°C

PD
625
5.0

mW
mW/OC

TA

Oto+75
-55 to +125

°c

Tstg

-65 to +150

°c

Operating Ambient Temperature Range

MC1445
MC1545

Storage Temperature Range
ELECTRICAL CHARACTERISTICS

(VCC = +5.0 Vdc, VEE = -5.0 Vdc, @ TA = +25°C, specifications apply to both input channels,
unless otherwise noted.)
MC1545
Fig. No_

Characteristics

MC1445

Symbol

Min

Typ

Max

Min

Typ

Max

19

21

16

19.5

23

Single-Ended Voltage Gain

1,12

AVS

16

Bandwidth

1,12

BW

40

50

-

Input Impedance
(f= 50 kHz)

5,14

zi

4.0

10

-

Output Impedance
(f = 50 kHz)

6,15

Zo

-

25

Output Differential Voltage Range
(RL = 1.0 kO, f = 50 kHz)

4,13

VODR

1.5

liB

Unit
dB

-

50

-

MHz

3.0

10

-

kn

-

-

25

-

0

2.5

-

1.5

2.5

-

Vp_p

-

15

25

-

15

30

!lAdc

2.0

-

-

2.0

-

!lAdc

1.0

5.0

-

-

7.5

mVdc

Input Bias Current

16

Input Offset Current

16

110

-

Input Offset Voltage

17

VIO

-

Quiescent Output dc Level

17

Vo

-

0.1

-

-

0.1

-

Vdc

Output dc Level Change
(Gate Input Voltage Change: +5.0 V to 0 V)

17

INO

-

±15

-

-

±15

-

mV

9,18

CMR

-

85

-

-

85

-

dB

Input Common Mode Voltage Range

18

VICR

-

±2.5

-

-

±2.5

-

Vpk

Gate Characteristics
Gate Input Voltage - Low Logic State (Note 1)
Gate Input Voltage - High Logic State (Note 2)

8
0.40

0.70
1.5

-

0.2

-

3.0

Gate Input Current - Low Logic State
(VIL(G) = 0 V)

18

Gate Input Current - High Logic State
(VIH(G) = +5.0 V)
Step Response
(ein=20 mY)

Common Mode Rejection
(f = 50 kHz)

Vdc

2.2

-

0.4
1.3

IIL(G)

-

-

2.5

-

-

4.0

rnA

18

IIH(G)

-

-

2.0

-

-

4.0

IlA

19

tPLH
tPHL
ITLH
ITHL

-

6.5
6.3
6.5
7.0

10
10
15
15

-

6.5
6.3
6.5
7.0

-

-

ns

-

VIL(G)
VIH(G)

-

-

Wideband Input Noise
(5.0 Hz -10 MHz, RS = 50 0)

10,20

en

-

25

-

-

25

-

DC Power Consumption

11,20

Pc

-

70

110

-

70

150

NOTES: 1. VIL(G) is the gate voltage which results in channel A gain of unity or less and channel B gain of 16 dB or greater.
2. VIH(G) is the gate voltage which results in channel B gain of unity or less and channel A gain of 16 dB or greater.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-96

IlV(rms)
mW

MC1445, MC1545
Figure 2. Single-Ended Voltage Gain
versus Temperature

Figure 1. Single-Ended Voltage Gain
versus Frequency
1il
:8-

25

1il

(!J

w

2

;;;:

20

(!J

w

(!J

13
0
>

13

15

§;
o

w
w

~

u;

2

W

~

1\

5.0

(!J

o
0.01

0.1

1.0
10
t, FREQUENCY (kHz)

10~---r----r----r--~-----r--~r---~

2

\

en

.?"

15~--~----~--~--~----~--~~--~

w

o

10

(!J

2

20~--~----~--~--~----~--~~--~

(!J

0
0
2

25

:8-

2

;;;:

u;

en

.?"

100

1000

5.0 L-_--'-_ _-I...._---'_ _--'-_ _. L - _ - L_ _-"
125
-55
-25
0
25
50
75
100
TA, AMBIENTTEMPERATURE (0G)

Figure 4. Output Voltage Swing
versus Load Resistance

Figure 3. Voltage Gain versus
Power Supply Voltages
1il 25
:82

~

-

V
~

W

(!J

13

20

~

§;
o
w
o

----

~

5.0

~

w

(!J

13

/

~~ 3.0

V

w,

ffi~

~ lli

W

O 2
>-..:
:::>a:

15

(!J

"-

U;

>:::>

:;

a:

2

10
4.0

5.0

6.0

7.0

8.0

9.0

10

i-"
t =50 kHz

8

11111

0

>

12

11

2.0
1.0

o

0.1

0.2

0.5

Figure 5. Input Cp and Rp versus Frequency
(Both Channels)
14

w

12

<.)

2

~

10

ffia:

8.0

cc

a:

2

5.0 ;:0;
C3

.......

4.0

'1'0.

~

"-..Rp

4. 0
2. o-

o

VI(rms) = 30 mV

T

I I I

1.0

t,

ct

..:
<.)

>:::>
3.0 "-

6.0

...J

~
ct

<.)

.......

I;
~

6.0 w

-..........

""

5.0
10
FREQUENCY (kHz)

...J

2.0

r-.....

'::l
...J

..:

...........
50

5.0

200

~

Cp

..........

2.0

10

20

Figure 6. Output Impedance versus Frequency
7.0

-

1.0

RL, LOAD RESISTANCE (kQ)

VCC, VEE, POWER SUPPLY VOLTAGE (± Vdc)

C

v

V

...J

..:

2

~

4.0

§;

1.0

a:

ct

ci:

0
100

<.)

II IIII II

180

g,
w

VO(rms = 20 mV

160

<.)

2
140
..:
0

w
"-

120

~

100

:::>
">:::>

80

>0

;:

60
40

10"

20

o
0.01

0.1

1.0
t, FREQUENCY (kHz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-97

10

100

MC1445, MC1545
Figure 7. Channel Separation versus Frequency

Figure 8. Gate Characteristics

Channel Sepration

~ 120 HH-I+I-I-++t+~-.d-++t---+ ~ 20 log Av - 20 log

:z

-

'1l
Vi

a 100 J---,H-I+I-I-++t+-+-+++t---"io.+-Ht--+---t-i-tt---t-+-t+l
~
a:

i'E

80

ul

60

~

'·'40

w
en

:z

'-'

(f

20

104

105

0.5

107

106

1.0
1.5
VG, GATE VOLTAGE M

fin, INPUT FREQUENCY (Hz)

~

100

~

90

a:
:z

a

t5w

33

r-...

70

Bandwidth = 5.0 Hz to 10 MHz

E

~ 31

f'.

w

30
20

~ 10
~ 0

0.Q1

a

29

>

w

~

40

~

!:§

........

50

B
::;;

~I""

C!1

Lil 60
a:
w
c
~

I I II.I! III I I I Illl!!.1

'iF
~

80

2.5

Figure 10. Input Wideband Noise
versus Source Resistance

Figure 9. Common Mode Rejection Ratio
versus Frequency

a

2.0

........

",..

a

27

~

25

:z
l=>
a..

....

i-'"

.:

'"
0.1

1.0

10

23

100

100
1.0 k
10 k
RS, SOURCE RESISTANCE (n)

10

t, FREQUENCY (MHz)

lOOk

Figure 12. Single-Ended Voltage Gain
and Bandwidth Test Circuit

Figure 11. Circuit Schematic
VCC

A
Input

t--+-o Output

B
Input

+
5.0k

5.0k

Gate

Signal
Generator

Vi = 20 mV(rms)
500

L -_ _ _

~----~--~~~-~~VEE

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-98

CL = 15 pF and includes jig
and vonmeter capacitance.
Boonton RF Vonmeter
or Equivalent

MC1445, MC1545
Figure 13. Output Voltage Swing Test Circuit

Figure 14. Input Impedance Test Circuit

f= SO kHz
Vi = SO mV(rms)

To AC
Voltmeter

"",-<::-----C:>---+--o +

Vo

..r'---o-....--o

Voltmeter

Figure 16. Input Bias Current and Input
Offset Current Test Circuit

Figure 15. Output Impedance Test Circuit

f=50kHz
Vi = 50 mV(rms)

110 is the difference
in current reading
when either SI Dr 52
is switched.

Open

~ +S.OV

Figure 18. Gate Current (High and Low),
Common Mode Rejection and
Common Mode Input Range Test Circuit

Figure 17. Input Offset Voltage and Quiescent
Output Level Test Circuit
-S.OV

Adjust Rl until VI
reads OV then

+s.OV

Rl
lOOk
IOTurns

SI (1%)

f=SOkHz
'V
Vi = 1.0 mV(rms

-S.OV

I

SIB

d Vo = change in reading
switch SI and readjust Rl for VI = 0

I
I
I
I

L ____ _

-t

+S.OV

+S.OV

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-99

CMR = 20Log

[~J

MC1445, MC1545
Figure 20. Power Dissipation and Wideband
Input Noise Test Circuit

Figure 19. Propagation Delay, Rise
and Fall Times Test Circuit
To ' PI.' Channel
of Scope

Pulse
Gen.

+5.0V -5.0V
Scope -

Tektronix 567
or equivalent

True rms vo~meter
with bandwidth of
5.0 Hz to 10 MHz.

51

J1.

1:.
-=

CL
To "8" channel

/~'---{)CL of scope

~

Vi =20mV
trLH = trHL < 5.0 ns

Open

15 pF including probe and
jig capacitance

Figure 21. Limiting Characteristic

I

5.0

w

C!J

13
0

4.0

./

f-

::>

a.
f-

trLH

3.0

/

::>
0
...J

~

:z
w
a:
w
u..
u..
i5

C

~

/

2.0

/

/

1.0
0

/

Vi

@

'"
50kHz

lOkVO

/
o

100
200
300
400
Vi, SINGLE ENDED INPUT VOLTAGE (mVp_p)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-100

-

:---

>

500

MC1458,C
MC1558

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

(DUAL MC1741)

DUAL
OPERATIONAL AMPLIFIERS

(Dual MC1741)

Internally Compensated, High
Performance Dual Operational
Amplifiers

SILICON MONOLITHIC
INTEGRATED CIRCUIT

P1 SUFFIX
PLASTIC PACKAGE
CASE 626

The MC1458/1558 was designed for use as a summing amplifier, integrator, or
amplifier with operating characteristics as a function of the external feedback
components.
• No Frequency Compensation Required
• Short Circuit Protection
• Wide Common Mode and Differential Voltage Ranges
• Low Power Consumption
• No Latch-Up

U SUFFIX
CERAMIC PACKAGE
CASE 693

MAXIMUM RATINGS (TA = +25"C, unless otherwise noted.)
Rating
Power Supply Voltage
Input Differential Voltage
Input Common Mode Voltage (Note 1)
Output Short Circuit Duration (Note 2)
Operating Ambient Temperature Range
Storage Temperature Range
Ceramic Package
Plastic Package
Junction Temperature
Ceramic Package
Plastic Package

Symbol

MC1458

MC1558

Unit

VCC
VEE

+18
-18

+22
-22

Vdc

VID

±30

V

VICM

±15

V

tsc

Continuous

TA

oto +70

-55 to +125

D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

"C

B~

°C

Tstg
-65 to +150
-55 to +125

1

°C

TJ
175
150

PIN CONNETIONS

NOTES: 1. For supply voltages less than ±15 V, the absolute maximum input voltage
is equal to the supply voltage.
2. Supply voltage equal to or less than 15 V.

Output A

In~ts

EQUIVALENT CIRCUIT SCHEMATIC
,-.-------~--~--------.-------~rovcc

{

VEE

1

7

Output B

6

}

2

In~uts

4

(Top View)
Noninverting
Input

25
Inverting
Inpul

'--1==+-__--l---/.--t:-=-.::::~f::~~H4---~1-()

0--+-+-+--+--'

50

Output

ORDERING INFORMATION
Device
MC1458CD D
MC1458CP1,P1
MC1458CU,U
MC1558U

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-101

Temperature
Range
0" to +70"C
-55" to + 125"C

Package
80-8
Plastic DIP
Ceramic DIP
Ceramic DIP

•

I

MC1458,C, MC1558
ELECTRICAL CHARACTERISTICS -

Note 1. (VCC = +15 V, VEE = -15 V, TA = 25°C, unless otherwise noted.)
MC155B

Characteristics
Input Offset Voltage
(RS'; 10 k)

Symbol
VIO

Input Offset Current
Input Bias Current

110
liB
ri
Ci
VIOR
VICR
AVOL

Input Resistance
Input Capacitance
Offset Voltage Adjustment Range
Common Mode Input Voltage Range
Large Signal Voltage Gain
(VO = ±10 V, RL = 2.0 k)
(VO = ±10 V, RL = 10 k)
Output Resistance

ro
CMR

Common Mode Rejection
(RS'; 10 k)
Supply Voltage Rejection
(RS'; 10 k)

PSR

Output Voltage Swing
(RS'; 10 k)
(RS'; 2.0 k)
Output Short Circuit Current

Vo

Supply Currents (Both Amplifiers)
Power Consumption
Transient Response (Unity Gain)
(VI = 20 mV, RL;o, 2.0 kfl, CL'; 100 pF) Rise Time
(VI = 20 mV, RL;o, 2.0 kfl, CL ,; 100 pF) Overshoot
(VI = 10 V, RL ;0, 2.0 kQ, CL ,; 100 pF) Slew Rate

ELECTRICAL CHARACTERISTICS -

ISC
10
Pc
tTLH
os
SR

Max

Min

5.0

-

-

20

-

80

200
500

-

0.3

-

0.3

2.0
1.4
±15

±12

±13

50

200
-

Typ
2.0

Max
6.0

Min
-

-

20

-

80

200
500

-

Unit

20

300
700
-

nA
nA
MQ

80

-

2.0
1.4
±15

±13

±11

±13

-

200
-

-

-

200

-

-

2.0
1.4
±15

±12
20
-

-

-

70

90

-

30

150

-

30

150

±12
±10

±14
±13

±12
±10

±14
±13

-

20

-

2.3
70

5.6
170

-

0.3
15
0.5

-

-

-

-

75

Max
1.0

-

-

-

-

Typ
2.0

-

mV

pF
mV
V
V/mV

75

-

Q

60

90

-

dB

-

30

-

JlV/V

±14
±13

-

-

75

-

20
-

70

90

-

V

-

20

-

2.3
70

5.0
150

0.3
15
0.5

-

-

±11
±9.0
-

20
2.3
70

-

0.3
15
0.5

-

8.0
240

-

mA
mA
mW
JlS

-

%

-

V/Jls

Note 1. (VCC = +15 V, VEE = -15 V, TA = Thigh to Tlow, unless otherwise noted.)'
MC145B

MC155B
Symbol

Min

Typ

Max

Input Offset Voltage
(Rs'; 10 kfl)

VIO

-

1.0

6.0

-

Typ
-

Input Offset Current
(TA = 125°C)
(TA=-55°C)
(TA = 0° to +70°C)
Input Bias Current
(TA = 125°C)
(TA=-SSOC)
(TA = 0° to +70°C)
Common Mode Input Voltage Range

110

-

7.0
85

200
500

-

-

-

-

-

30
300

-

-

Characteristics

Min

MC1458C
Max

Max

Unit

7.5

-

-

12

mV

-

-

-

-

-

-

-

-

300

Min

Typ

nA

VICR
CMR

Supply Voltage Rejection
(Rs'; 10 k)

PSR

Output Voltage Swing
(Rs'; 10 k)
(Rs';2 k)

Vo

±12
70
-

±12
±10

Large Signal Voltage Gain
(VO = ±1 0 V, RL = 2 k)
(VO =±10V, RL = 10 k)
Supply Currents (Both Amplifiers)
(TA=125°C)
(TA =-55°C)
(TA=125°C)
(TA = -55°C)

Pc

500
1500

±13

-

90

-

-

-

-

-

30

150

±14
±13

-

±12
±10

±14
±13

800
-

-

-

-

-

-

-

1000

-

V
dB

-

-

JlV/V

-

-

V
±9.0

±13

-

V/mV

AVOL

10

400
nA

liB

Common Mode Rejection
(Rs'; 10 k)

Power Consumption

MC145BC

MC145B

Typ
1.0

Min

25

-

-

15

-

-

-

-

-

-

-

-

-

-

4.5
6.0

-

-

-

15

-

-

-

-

-

-

-

mA

135
180

-

mW

'Tlow = -55°C for MC1558
Thigh = +125°C for MC155B
O°C for MC1458
+70°C for MC1458
NOTE: 1. Input pins of an unused amplifier must be grounded for split supply operation or biased at least 3.0 V above VEE for single
supply operation.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-102

MC1458,C, MC1558
Figure 2. RMS Noise versus Source Resistance

Figure 1. Burst Noise versus Source Resistance

100

1000

w.=.

:;-

~~

"'"

.:!,
:;;;
OJ

10

'"
So

"'"

'"

~i

w

en

5

•

z

5c..

.:

'"

1111

o

1.0

2!::

1111

10

100

0.1

1.0k

10k

lOOk

100

10

100M

As, SOURCE RESISTANCE (n)

10

111111

120

1.0

c:

1

~

!ll 80

g

o 0.1

\,

60

r--

5

1.0

~

i

II

Av=10,R~=100kn

~ 100 \

AV = 1000

g

M

lOOk

140

~

en

10k

Figure 4. Spectral Noise Density

Figure 3. Output Noise versus Source Resistance

iw

1.0

RS, SOURCE RESISTANCE (n)

40

.:
'" 20

o 10

100

1.0k

10k

lOOk

o

100M

10

100

1.0k

10k

lOOk

f, FREQUENCY (Hz)

RS, SOURCE RESISTANCE (n)

Figure 5. Burst Noise Test Circuit
lOOk

To Pass/Fail
Indicator

lOOk
1.0k

lOOk

Operational Amplifier
Under Test

Low Pass Fi~er
1.0 Hz to 1.0 kHz
Negative
Threshold
Vo~ge

Unlike conventional peak reading or RMS maters, this system was especially
designed to provide the quick response time essential to burst (popcorn) noise
testing.

The test time employed is 10 sec and the 20 I1V peak limR refers to the
operational amplifier input thus eliminating errors in the closed~oop gain factor
of the operational amplifier.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-103

MC1458,C, MC1558
Figure 6. Power Bandwidth
(Large Signal Swing versus Frequency)

Figure 7. Open-Loop Freuqency Response

28

120

0.

i'il

<::. 20
w

:Eo

!:§

16

0

?

«C!l

\

.....
:::> 12

1=
:::>

:z

11

C!l

~

......

100

-;;, 24

w

60

!:§

40

>

(Voltage Follower)

4.0

o

IIIII
10

..::.
0
...:>

1\

11111{HDirlll

II

100

:z

~

10 k

0
10

100 k

w

~

5

-?

10k

100k

2:
C!l

I I

-13

:z

§:
en

11

C!l

1/

7.0

±9.0V-

~
~

5.0

/.. V

3.0

5007001.0k

2.0k

-7.0

-

-?

I I
200

-9.0

~

0

.AfY
100

±15

I I
/

-5.0
-3.0
-1.0

5.0k 7.0k 10k

/'
./

"

f6·n

~

100

200

500 700 1.0 k

1OOl1F

.t 24 I-- +27 V

5
"5

8.0

+24V

VCC

+18V
2

7

+15V

-

6> 4.0 o

10k

1.0k

200k
12

5.0 k 7.0 k 10 k

I - - +21 V

!:§

~

2.0 k

Figure 11. Single Supply Inverting Amplifier

28 +30 VSuppl

~ 16

±9.0V

Rl., LOAD RESISTANCE (0)

Figure 10. Output Voltage Swing versus
Load Resistance (Single Supply Operation)

:z
~ 20

Vsl I" 1
uppiles

+12V

)

Rl., LOAD RESISTANCE (0)

C!l

I

-11

!:§
.....
:::>
".....
:::>

=f6.?VI-

A po

10M

w

±1n
9.0

"

100M

-15

3

1.0

-a.

1.0k

~

Figure 9. Negative Output Voltage Swing
versus Load Resistance

±15 ~ s~pplies

"-

§

100

10

'"

f, FREQUENCY (Hz)

C!l

!:§

~

-20

1.0 k
f, FREQUENCY (Hz)

5
C!l

~

20

Figure 8. Positive Output Voltage Swing
versus Load Resistance

2:

"-

C!l

0

8.0

80

o

+12V
+9.0
+6.0 V
+5.0 V
1.0 2.0

200k

3.0 4.0
5.0 6.0 7.0
Rl., LOAD RESISTANCE (kO)

8.0

9.0

10

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-104

MC1558
4

1OOl1F

T~

MC1458,C, MC1558
Figure 12. Noninverting Pulse Response

I

III
I\. I\..

J

I

I

Output -

'\

I\.
Input

10 flS/DIV

Figure 13. Transient Response Test Circuit

To Scope

>--o--.--~>-_ (Output)

Figure 14. Open-Loop Voltage Gain
versus Supply Voltage
105
100
lC

:s

95

~

90

!:3
0

85

i

80

:z

w
c:>

>

........

,/

f-"

./
./
L

,/

75
70

o

2.0

4.0

6.0

8.0

10

12

14

16

18

20

Vee. IVEEI. SUPPLY VOLTAGES M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-105

MOTOROLA

MC1490P

SEMICONDUCTOR-----TECHNICAL DATA

WIDEBAND AMPLIFIER
WITHAGC

RF/IFIAudio Amplifier

SILICON MONOLITHIC
INTEGRATED CIRCUIT

The MC1490P is an integrated circuit featuring wide-range AGC for use in
RF/IF amplifiers and audio amplifiers over the temperature range, -40° to
+85°C. See Motorola Applications Note AN513 for design details.
• High Power Gain: 50 dB Typ at 10 MHz
45 dB Typ at 60 MHz
35 dB Typ at 100 MHz

~

• Wide Range AGC: 60 dB Min, DC to 60 MHz
• 6.0 V to 15 V Operation, Single Polarity Supply
• See MC1350D for Surface Mount

1

PSUFFIX
PLASTIC PACKAGE
CASE 626

MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Rating
Power Supply Voltage
AGCSupply

Symbol

Value

Unit

VCC

+18

Vdc

V2(AGC)

VCC

Vdc

Input Differential Voltage

VID

5.0

Vdc

Operating Temperature Range

TA

-40 to +85

°C

Tstg

-65 to +150

°C

TJ

+150

°C

Storage Temperature Range
Junction Temperature

PIN CONNECTIONS

Vee

Substrate
Ground

GND

Noninverting
Input

Inverting 4
Inpul

Representative Circuit Schematic

Output
(+)

Output
(-)

.-______---.....--2.. Vee

AGe
L -_ _ _---1

Input

(Top View)

1.5k
5.5k

12.1k
8 (+)

SCATIERING PARAMETERS
(VCC = +12 Vdc, TA = +25'C, Zc = 50 0)

r - - - - - O Outputs

L--H--"~-l-~-11-III+:=t:==:I=;-l"i1 (-)

f=MHz
Typ
Symbol

30

60

Input
Reflection
Coefficient

15 111
911

0.95
-7.3

0.93
-16

-

Output
Reflection
Coefficient

15 221
922

0.99
-3.0

0.98
-5.5

-

15 211
921

16.8
128

14.7
64.3

-

512
912

0.00048
84.9

0.00092
79.2

Parameter

1.4k

5.6k
1.1k

1.1k

8.4k

Forward

Transmission
Coefficient
Reverse

Transmission

Pins 3 and 7 should both be connected to circuit ground.

Coefficient

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-106

Unit

'c
'c
'c

-

·C

MC1490P
I

ELECTRICAL CHARACTERISTICS (VCC = 12 Vdc, 1= 60 MHz, BW = 1.0 MHz, TA= 25°C)
Characteristics

Figure

Symbol

Min

Max

Unit

ICC

-

-

17

rnA

MAGC

-60

-

dB

-

10

4.0

7.5

rnA

19

Gp

40

-

-

dB

19

NF

-

6.0

-

dB

-

Po

-

168

204

mW

Power Supply Current Drain

-

AGe Range (AGC) 5.0 V Min to 7.0 V Max

19

Output Stage Current (Sum 01 Pins 1 and 8)
Single-Ended Power Gain RS = RL = 50 n
Noise Figure RS = 50 Ohms
Power Dissipation

Typ

SO

70
in

:E.F="
z::>

SO

Wo
N W
::lo

40

~z
o-'-\'
::>w
w--'
zC!:l
ZZ

::J§.

c:.
C!:I

RL = Ion

Vcc = 12 Vdc

60

<~

C!:I::>
00

~ 40
W

r-....

C!:I

!:3

30

fil
o
iii

20

~

""

30
20

"'

10
10

20

SO
I,FREQUENCY (MHZ)

100

200

RL=I.on

\
\\

~

~ 10

en

1£ o

I IIII
0.1

so

W

!:3

O.S

a:

0

0
>

0.1

t!!
!:3

/

L

0.01
0.1

40

1000

II IIII

.1__I

VCC = 6.3 Vdc

............
30
lOon

~ 20
C!:I

i

Ion
L
20

SO 100

10

o

0.3

O.S

1.0

3.0 S.O

10

30

I, FREQUENCY (MHZ)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-107

",

~

Z

en

O.S 1.0
2.0
S.O
10
en, INPUT VOLTAGE (mVRMS)

\\

100

RL = 1.0n

~

v

J-n'1

0.2

III
III

Z

loon

O.OS

'\.

10
I,FREQUENCY (MHZ)

~

::>
D-

1.0

Figure 4. Voltage Gain versus Frequency
(Video Amplifier, See Figure 21)

10
S.O ~ VCC= 12Vdc
V2(AG~ = 0 V
r--- 1=1.0 Hz
1.0

\'
\

RL = loon

Figure 3. Dynamic Range: Output Voltage versus
Input Voltage (Video Amplifier, See Figure 21)

en

VCC = 12 Vdc

......

Z

o

::;;;

I

Figure 2. Voltage Gain versus Frequency
(Video Amplifier, See Figure 21)

Figure 1. Un neutralized Power Gain versus
Frequency (Tuned Amplifier, See Figure 19)

r--

III

50

100

300

MC1490P
Figure 6. Typical Gain Reduction
versus AGC Voltage

Figure 5. Voltage Gain and Supply Current versus
Supply Voltage (Video Amplifier, See Figure 21)
i'C

45

:z

40

w

35

13

30

:Eo

«
Cl

I
_ 1=1.0MHz
RI=1.0n

0

>
0

w
:z

25

V
./

:z

en
j

20
15

21

AV

I

0

~
Cl

/

/

Cl

--- /

./

18
15

/'
ICC

6.0

8.0

I-

:z
w

~
9.0 D..
D..

=>
6.0 en

5.0
4.0

c(

§.

0

3.0
2.0

..,

-U

a:
12 a:
=>

10
o

...,

24

10

12

14

16

10

~

:Eo

:z

20

t5=>

30

w
a:
:z

40

0

«Cl

0

:z

t5=>

30

w
:z

40

0

~

r---.....

o

I

I

'" , . . . 1"\..

50

50

o

3.0

6.0

:Eo

:z

«

20

a:
w

10

Cl

~
D.._
CI.

Cl

20

40

60

80

100

120

r--- VCC = 12Vdc
r--- 1=60MHz
-10 r--- RAGC=5.6 kn

u

~

10

C.

Cl

a:

=>

6.0

w

5.0

~

~

20
10

1.0

o

2.0

4.0

30

6.0

8.0

10

-

O°C

-

,'\.~ / +25°C
+75°C " ,'\.~ ~
'\.'\ ~'\.
..A ~'\.~

-

-

+12~OC

u

~

~

M

U

I'\.'\.'\
~

U

M

M

n

/

I'

..- ..."

en
5 4.0

:z
u:
:z 3.0
2.0

o

27

-55°C -

i'C 8.0
:Eo 7.0
w

:Eo

30

24

Figure 10. Noise Figure versus Frequency

1= 60 MHz

~
D..

21

VR(AGC), AGC VOLTAGE (Vdc)

9.0

40

18

I

-20

140 160

80

a:
w

15

0

70

50

12

~~
~~~
X'\ ~

Figure 9. Power Gain versus Supply Voltage
(See Test Circuit, Figure19)

~

9.0

i'C 30

IAGC AGC CURRENT (mA)

:z

RAGC= 5.6k(

~ ~ ~ ::s::s ~

40

80

60

'\

\
RAGC=on

80

I

"- '-.

70

i'C

RAGC=l00kO

~

Figure 8. Fixed Tuned Power Gain Reduction versus
Temperature (See Test Circuit, Figure 19)

100 < RAGC <100 k -

ci: 60
Cl

0

MC1490P

VR(AGC), AGC VOLTAGE (Vdc)

'\

-40 -20

'»

'"

RAGC

50

0

a:

V'

70

-l"- t--

i'C

20

~-

~

~

ci: 60
Cl

Figure 7. Typical Gain Reduction
versus AGC Current

:Eo

.......

0

VCC, SUPPLY VOLTAGE M

10

..........

i'C

12

14

i-""

Rs°ptimized _
lor minimum NF

o

16

15

VCC, POWER SUPPLY VOLTAGE M

20

25

30 35 40

50

60 70 80 90 100

I, FREQUENCY (MHz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-108

150

MC1490P
Figure 12. Noise Figure versus
AGC Gain Reduction

Figure 11. Noise Figure versus
Source Resistance
20

40

18

ar

:Eo
w

a:

::J
(!J

u::

14
1= 105 MHz
H""

12
10

1=60MH~

1,.00

W

tn

aZ

8.0

V

....

u: 6.0
Z
4.0

'"

V
.... 1-"

ar
:Eo

I"
./

.... '"

1=30~HZ

35

.I'

VCC = 12 Vdc

16

w

a:

~

BW= 1.0 MHz

30
25

(!J

u:: 20
w

tn

aZ

1- 30 MHz

f-

15

5

o

o
200

400 600

1.0 k

2.0 k

4.0 k

/

/

10

2.0
100

/

::J

10k

Test circuit has tuned input
providing a source resistance optimized lor best noise figure.

/
o

-10

-20

RS, SOURCE RESISTANCE (Q)

-30

40

1= 10.7 MHz
Modulation: 90 % AM, 1m = 1.0k Hz
Load at Pin 5 = 2.0 kW
I:i:i
30 EO = peak-to-peak envelope 01
c modulated
10.7 MHz carrier at pin 5
z~
ZZ 25
35

b
w

~5
_0

C::E
t.'>

Z

20
15
10

I

0

::E

a:

""

:I:

5.0

o

760 mVp-p

I

I

I / I
EO = 2400 mVp-p
II / /24Omvp-p

cQ

~5

-40

-50

GR, GAIN REDUCTION (dB)

Figure 13. Harmonic Distortion versus AGC Gain
Reduction for AM Carrier (For Test Circuit, See Figure 14)
c
w

L

/'

o

10

20

/

I

30

J

/

40

/

I
./

50

60

70

80

GR, GAIN REDUCTION (dB)

Figure 14.10.7 MHz Amplifier Gain
0.002

=

55 dB, BW

=

100 kHz

7

J

36pF
.---6--+--1

f---o

5.6k

500 Load

VR(AGC) n--'VV'Ir--+---()--{,
10.7MHz o--jl---I--6--i
(50Q Source)
82pF

+12Vdc

50-I50pF

L1 = 24 turns, 1122 AWG wire
on a T12-44 micro metal
Toroid cora (-124 pF)

L2 = 20 turns, 1122 AWG wire
on a T12-44 micro metal
Toroid core (-100 pF)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-109

-60

-70

-80

MC1490P
Figure 16. 511 and 522, Input and Output
Reflection Coefficient

Figure 15. 511 and 522, Input and Output
Reflection Coefficient

Figure 18. 512, Reverse Transmission
Coefficient (Feedback)

Figure 17. 521, Forward Transmission
Coefficient (Gain)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-110

MC1490P
Figure 19. 60 MHz Power Gain Test Circuit

Figure 20. Procedure for Setup
Using Figure 19
Test

.----+..".tf=__. Output
(50Q)

Input ""~---4--~f--o-l
(50Q)

/-+----_-...

+12Vdc

ein

V2(AGC)

RAGc(kQ)

MAGe 2.23 mV (-40 dBm) 5.0 Vtc 7.0 v
1.0 mV (-47 dBm)
Gp
S5.0

NF

1.0 mV (-47 dBm)

L1 = 7 turns, #20 AWG wire, 5/16" Dia.,
5/8" long
12 = 6 turns, #14 AWG wire, 9/16" Dia.,
3/4" long

S 5.0

5.6

Cl,C2,C3 = (1-30) pF
C4 = (1-10) pF

VR(AGC)

Figure 22. 30 MHz Amplifier
(Power Gain = 50 dB, BW = 1.0 MHz)

Figure 21. Video Amplifier

(1 - 30) pF
Input e-j I-*-.......+-":'O---'l
(50Q) 38pF

L1 = 12 turns, #22 AWG wire on a Toroid core,
(T37·6 micro metal or equiv)
Tl: Primary = 17 turns, #20 AWG wire on aToroid core,
(T44-6)
Secondary = 2 turns, #20 AWG wire

Figure 23. 100 MHz Mixer

Inputfrom
local oscillator
(70MHz) e--:wv::-::--"'--o--l
Signal Input

_....,\1'=-__---0-------1
+12V

R3
15k

+12V

-=- -=-

220

+12V

2.2k

Q1
MPS6517
Rx

01
6.0k

-=-

Vr
33k
R1
100k

-=-

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA
2-113

•

I

MOTOROLA

MC1733CB

SEMICONDUCTOR-----TECHNICAL DATA

DIFFERENTIAL VIDEO
WIDEBAND AMPLIFIER

Differential Video Amplifier

SILICON MONOLITHIC
INTEGRATED CIRCUIT

The MC1733CB is a wideband amplifier with differential input and differential
output. Gain is fixed at 10 V, 100 V, or 400 V without external components. With
the addition of one external resistor, gain becomes adjustable from 10 V
to 400 V.
• Bandwidth: 120 MHz Typical @ AVd = 10

DSUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)

• Rise Time: 2.5 ns Typical @ AVd = 10
• Propagation Delay Time: 3.6 ns Typical @ AVd = 10

,#
,
LSUFFIX
CERAMIC PACKAGE
CASE 632

,.-

Figure 2. Voltage Gain
Adjust Circuit

Figure 1. Basic Circuit
GainSelecl

Radj

Input 1

,

0.2~F

Output 1

E-----t-

Inputt

Output t

PSUFFIX
PLASTIC PACKAGE
CASE 646

Itk
Output 2

Input 2

r

Input 2

TOUtput2
0.2~F
tk

Gain Select

Gain Select

Figure 3. Equivalent Circuit Schematic
PIN CONNECTIONS

Vee

Input2 1
2.4k

2.4k

12 G2A Gain

Gain
Select

Input2o---t-----II----,

11

G1A

Select

Output 1

I
I

Inputt

Gain
Select

Gain

~d

G1A

Output2 7

50

G2A

Output 2

7k

~B o - - - t -590
- - - ' f -5-90- '

(Top View)

--~==+===~F=:j

G1B t>-

ORDERING INFORMATION
400

Device

Temperature
Range

Package

0° to.+70°C

Plastic DIP

SO-14

MC1733CBD
MC1733CBL
MC1733CBP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-114

Ceramic DIP

MC1733CB
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Rating
Power Supply Voltage
Differential Input Voltage
Common Mode Input Voltage
Output Current

Symbol

Value

Unit

VCC
VEE

+8.0
-8.0

V

Vin

±5.0

V

VICM

±6.0

V

10

10

rnA

Internal Power Dissipation

PD

500

mW

Operating Temperature Range

TA

o to +70

°c

Tstg

-85 to +150

°c

Storage Temperature Range

ELECTRICAL CHARACTERISTICS (VCC = +6.0 Vdc, VEE = -8.0 Vdc, @ +25°C, unless otherwise noted.)
Characteristics

Symbol

Differential Voltage Gain
Gain 1 (Note 2)
Gain 2 (Note 3)
Gain 3 (Note 4)

Min

Typ

Max

250
80
8.0

400
100
10

600
120
12

Bandwidth (RS
Gain 1
Gain 2
Gain 3

= 50 n)

Rise Time (RS
Gain 1
Gain 2
Gain 3

= 50 n, Vo = 1.0 Vp_p)

BW

-

Propagation Delay (RS
Gain 1
Gain 2
Gain 3

tTLH
trHL

= 50 n, Vo = 1.0 Vp_p)

tPLH
tPHL

Input Resistance
Gain 1
Gain 2
Gain 3

Rin

-

40
90
120

-

ns

-

10.5
4.5
2.5

-

7.5
6.0
3.6

10
-

4.0
30
250

-

-

kn

-

Cin

-

2.0

-

-

11101

0.4

5.0

= 50 n, BW = 1.0 kHz to 10 MHz)

Input Voltage Range (Gain 2)

liB

-

9.0

30

Vn

-

12

Vin

±1.0

-

Common Mode Rejection
Gain 2 (VCM = ±1.0 V, f ,;; 100 kHz)
Gain 2 (VCM = ±1.0 V, f = 5.0 MHz)

CMR

Supply Voltage Rejection
Gain 2 (A Vs = ±D.5 V)

PSR

Output Offset Voltage
Gain 1
Gain 2 and Gain 3

VOO

ns

-

Input Offset Current (Gain 3)
Input Noise Voltage (RS

MHz

-

Input Capacitance (Gain 2)
Input Bias Current (Gain 3)

Unit
VN

AVd

-

-

pF

!1A
!1A
I1V(rms)
V
dB

-

60

86
60

50

70

-

-

-

0.6
0.35

2.0
1.5

VCMO

2.4

2.9

3.4

Vo

3.0

4.0

-

V
V p _p

Output Sink Current (Gain 2)

ISink

2.5

3.6

rnA

Rout

-

-

Output Resistance

20

-

ID

-

18

24

Output Common Mode Voltage (Gain 3)
Output Voltage Swing (Gain 2)

Power Supply Current (Gain 2)

dB
V

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-115

-

n
rnA

MC1733CB
ELECTRICAL CHARACTERISTICS (VCC =+ 60
. Vdc VEE= -6 0 Vdc @TA= T high to Tlow, unless otherwise noted )*
Characteristics

Symbol

Differential Voltage Gain
Gain 1 (Note 2)
Gain 2 (Note 3)
Gain 3 (Note 4)
Input Resistance
Gain 2

AVD

Input Offset Current (Gain 3)
Input Bias Current (Gain 3)
Input Voltage Range (Gain 2)

1101

Rin

liB
Vin
CMR

Supply Voltage Rejection
Gain 2 (Ll Vs = ±0.5 V)

PSR

Output Offset Voltage
Gain 1
Gain 2 and Gain 3

VOO

Common Mode Rejection
Gain 2 (VCM = ±1.0 V, l s I 00 kHz)

Min

Typ

250
80
8.0
8.0

-

Max

Unit
VN

600
120
12

-

-

kn

-

-

-

-

6.0
40

±1.0

-

!LA
!LA

50

-

-

V
dB

50

-

-

dB

-

-

1.5
1.5

-

V

-

-

Output Voltage Swing (Gain 2)

Vo

2.5

Output Sink Current (Gain 2)
Power Supply Current (Gain 2)

10

2.5

ID

-

-

Vp _p
mA
mA

27

*Tlow = O°C lor MC1733. Thigh = +70°C for MC1733C.
NOTES: 1. Derate dual-in-fine package at 9.0 mW/oC for operation at ambient temperatures above 100°C (see Figure 4). If operation
at high ambient temperatures is required a heatsink may be necessary to limit maximum junction temperature at 150°C.
2. Gain Select pins GIA and GIB connected together.
3. Gain Select pins G2A and G2B connected together.
4. All Gain Select pins open.
Figure

4. Maximum Allowable Power Dissipation

Figure

800

!

elramiC o!al In-Une Package
9.0mV/oe
-

600

Q

If

~

<"

§.

!z
w
:::>

"~

:::>

\

.£l
50

100

.£>

\

.............

;'

17

16
-60

200

150

v

18

DD-

~

200

19

a:
a:

1\
\

iZ

15 400
a:
D-_

5. Supply Current versus Temperature

20

-20

TA, AMBIENT TEMPERATURE (0C)
Figure

6.

Supply Current versus Supply Voltage

<"
§. 24
a:
a:

:::>

./

20

./

"~
DD-

:::>

8.0 . /
3.0

'"

""

./

16

en_
.£> 12

,,/

. . . .V
/"
4.0

5.0
6.0
7.0
Vee, IVEEI, SUPPLY VOLTAGES M

8.0

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-116

"

20
60
100
TA, AMBIENT TEMPERATURE (0C)

28

!z
w

,

140

MC1733CB
Figure 8. Gain versus Frequency

Figure 7. Gain versus Temperature
1.15

"'

:z 1.10
:;;:
C!l
1.05
UJ
C!l

t3

0

a:

0.90

~

0.85

:z 50
:;;:
C!l
40
UJ

"'
" '"

"'
-20

Gain 2

C!l

t3

Gain3 _

'\.

0.80
-60

I III
RL = 1.0 kQ
Gain 1

i'D

:s
"' Gain 1

-

1.0

>
UJ
;:: 0.95

~
UJ

60

20
60
1, TEMPERATURE (0C)

30

0

0

20

UJ

0

..........

UJ

~ 10

\,

C!l

:z

en

"'"

j

100

140

1.0

Figure 10. Gain versus Radjust
1000

1.2

C!l

t3

1.0 k

:z
:;;:

UJ

0

100

10

f. FREQUENCY (MHz)

1.4
C!l

r\~

Gainl

:z

Figure 9. Gain versus Supply Voltage

:z
:;;:

1\

>

.........-IGainJ -

1.0 -

>

UJ

;::
!;;: 0.8
...J
UJ

......

Gain 3
f-"'"

a:

1---1'"""

V

-

C!l

UJ

i-"""

C!l

>
...J

.."

~

V

0.4
3.0

r-.

100

UJ

a:

UJ
LL.
LL.

./

./

'"

t30

/''''

::: Gain 2

> 0.6
<

i-"":

.----

i5
C.

Gain 1

............ ......

<
10

4.0

5.0
6.0
7.0
VCC.IVEEI. SUPPLY VOLTAGES M

8.0

10

100

10 k

Radj.(Q)

Figure 12. Gain versus Frequency
and Temperature

Figure 11. Gain versus Frequency and
Supply Voltage
i'D

:s
:z
~

UJ

C!l

t3~

60

II

GaJ
RL=1.0kQ

50
40
30

\.

o

~

:z

20

\

UJ

~

10

C!l

~

0

~-10
10
100
f. FREQUENCY (MHz)

r-.i'-

1.0k

1.0k

1.0

10
100
f. FREQUENCY (MHz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-117

25°C
~ 75°C
II
1.0 k

MC1733CB
Figure 13. Pulse Response versus Gain

Figure 14. Pulse Response versus Supply Voltage

1.6

1.6
RLJoknl-

~ 1.2

Gain 3

w

(!)

13
0
>

I

0.8

Gain 2

I-

OJ

0..
I-

OJ

0.4

0

~

"

-0.4
-15

-10

-5.0

0

Ji

o

10

15

20

25

30

-0.4
-15

35

-10

-5.0

5.0

OJ
0..

IOJ

§?

~

0.4

0

~

w

J

0

Gain 2
120

~

!z

+75°C

~

J

80

~

/"

/
/'

...J

+25°C
"

35

V

13

,

30

..."..V'

(!)

'Vb

0.8

25

./

:i 160

O~

>

20

200

Gain 2
RL = 10 kn

I-

15

Figure 16. Differential Overdrive Recovery Time

1.6

130

10

t, TIME (ns)

Figure 15. Pulse Response versus Temperature

(!)

I
±3.0V

JI/

0.4

t, TIME (ns)

~ 1.2
w

1-

±6.0V

'/

0.8

Gain 1

5.0

H

!I

",

-I- -I V
L /L
/1 I

V

0

~

V~c1V~E=±~'OV

Gain 2
1.2 ;- RL=10kn

/'

C

.5

40

>

o
o

-0.4
-15

-10

-5.0

0

5.0

10

15

20

25

30

35

Figure 17. Phase Shift versus Frequency

o
..........

en
-5.0
w
t;:
:;:
en -15

ttl-lOO
a:

Gain 2

50

60

70

80

-"
I'~

4.0
6.0
t, FREQUENCY (MHz)

\ Gain 3

t;:
en

:;: -200

..........

.......

......

~ -250

\

-300

.'\

-25

2.0

40

~ -150

-20

o

30

(!)

t'-......

""'"

w

0..

en

......
r--....

~ -10

~

-50

.......

w

a:

20

Figure 18. Phase Shift versus Frequency

~

(!)

10

OVERDRIVE RECOVERY TIME (ns)

t, TIME (ns)

8.0

-350
1.0

10

\

10

100

t, FREQUENCY (MHz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-118

'~ajn 2
" 1
Gain
1.0 k

MC1733CB
Figure 19. Input Resistance versus Temperature

Figure 20. Input Noise Voltage

70

a

70

60

~

w

<:>

z

~

50

'"enw

40

....
::::>

30

~

20

a:
a.

/"
Gain 2

.§.

.,

"- 50
w
40

/"

C!:l

t:i

./

II

0

>

30

'"az

20

w

..",.

.....

10

60

>

./

.5

a:

./'

~

...

Gain 2
BW= 10MHz

1/

!:;
a.

~

10

o
-20

-60

20
60
100
TA, AMBIENTTEMPERATURE (0C)

1.0

140

Figure 21. Output Voltage Swing and
Sink Current versus Supply Voltage

~§.

C!:l ....
zz
6.0

~~
"'a:
w::::>
C!:l<:>

!:§~ 4.0
>'"
0-

~~

p--

k::;::: ~

...- ~
~ -----

--

Voltage

Currenl

-------

~

z

~

'"C!:lw
t:i
0
>
....
::::>
a.
....
::::>

-

0

>

o
3.0

4.0

5.0

6.0

7.0

6.0

C!:l

0

6..9

>

5.0
4.0
3.0

1/

2.0
1.0

V

100
1.0 k
RL, LOAD RESISTANCE (0)

10

Figure 23. Output Voltage Swing versus Frequency

Figure 24. Common Mode Rejection Ratio

"C:

~ 6.0

O

C!:l

z

w
C!:l

t:i

5.0

~
a:

90

0

80

;:::

..........

<:>

w

4.0

....... j'.

~ 3.0
!:;
~

RL=1.0kO

Lil
a:

70

Cl

60

z

50

w

Gain 2

...............

0
:::0

2.0

0
:;;
:;;
0

o
~ 1.0

<:>

a:

o
1.0

10 k

iD 100
:E-

7.0

ifi

/

o

8.0

VCC, SUPPLY VOLTAGE M

z

10k

7.0

8.0

6..

r........
~

40
30
10k

lOOk

1.0M
t, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2·119

10M

100M

MC1733CB
Figure 26. Oscillator Frequency for
Various Capacitor Values

Figure 25. Voltage Controlled Oscillator
107

Vcc
C

R2

106
~

I"-

105

.e
; - - - _ - 0 Output

w
<.>

z

........

104

~
C3 103
~

«<.> 102

620"

Control
Vo~age

10

Vc

By changing the voltage Vc the gain will vary over a range of 10 V to
400 V. This will give a frequency variation about the value set by the
capac~or and shown in Figure 26.

Tape, Drum or Disc Memory Read Amplifiers
The first of several methods to be discussed is shown in
Figure 27. This block diagram describes a simple Read circuit
with no threshold circuitry. Each block represents a basic
function that must be performed by the Read circuit. The first
block, referred to as "amplification", increases the level of the
signal available from the Read head to a level adequate to
drive the Peak Detector. Obviously, these signal levels will
vary depending on factors such as tape speed, whether the
system used is disc or tape, and the type of head and the
circuitry used. For a representative tape system, levels of
7.0 mV to 25 n'lV for the signal from the Read head and 2.0 V
for the signal to the Peak Detector are typical. These signal
levels are "peak-to~peak" unless otherwise specified. On the
basis of the signal levels mentioned above, the overall
amplification required is 38 dB to 49 dB.
How the overall gain requirement is implemented will
depend somewhat on the system used. For instance, a tape
cassette system with variable tape speed may utilize a first
stage for gain and a second stage primarily for gain control.
Thus, a typical circuit would utilize 35 dB in the first stage and
10 dB to 15 dB in the second stage.
Devices suitable for use as amplifiers fall into one of two
categories, operational amplifiers or wide band video
amplifiers. Lower speed equipment with low transfer rates
commonly uses low cost operational amplifiers. Examples of
these are the MC1741, MC1458, and MLM301. Equipment
requiring higher transfer rates, such as disk systems normally
use wideband amplifiers such as the MC1733CB. The actual
crossover point where wide band amplifiers are used
exclusively varies with equipment design. For purposes of
comparison, the MLM301 has slightly less than a 40 dB
open-loop gain at 100 kHz; the MC1741, a compensated op
amp, has approximatley 20 dB open-loop gain at 100 kHz; the
MC1733CB has approximately 33 dB of gain out to 100 MHZ!
(depending on a gain option and loading).
There are a number of ways to implement the Peak
Detector function. However, the simplest and most widely
used method is a passive differentiator that generates "zero
crossing" for each of the data peaks in the Read signal.

........

vcc

MC1733CB

=

1.0
100

VEE

r:'E@o
r-o-

........
Out

""

VEE

10 k

100 k

1.0M

10 M

f, FREQUENCY (Hz)

Figure 27. Typical Read Circuit (Method 1)
Output

The actual circuitry used to differentiate the Read signal
varies from a differential LC type in disc systems to a simple
RC type in reel and cassette systems. Either type, of course,
attenuates the signal by an amount depending on the circuit
used and system specifications. A good approximation of
attenuation using the RC type is 30 dB. Thus, the 2.0 V signal
going into the differentiator is reduced to 200 mY.
The next block in Figure 27 to be discussed is the Zero
Crossing Detector. In most cases detection of the zero
crossings is combined with the limiter. These functions seNe
to generate a TTL compatible pulse waveform with "edges"
corresponding to zero crossings. For low transfer rates, the
circuit often used consists of an operational amplifier with
series or shunt limiting. For higher transfer rates (greater than
100k B/S) comparators are used.
The method described above is often modified to include
threshold sensing. In Figure 28, the function called Double
Ended Limit Detector enables the output NAND gate when
either the negative or positive data peaks of the Read signal
exceed a predetermined threshold. This function can be
implemented in either of two ways. One method first rectifies
the Signal before it is applied to a comparator with a set
threshold. The other method utilizes two comparators, one
comparator for positive-going peaks and the other for
negative-going peaks. These comparator outputs are then
combined in the output logic gates.
Figure 28. Read Circuit (Method 2)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-120

MC1733CB
Another common technique is shown in Figure 29. The
branch labeled rectifiers, Peak Detector, etc., provides a clock
transition of the D flip-flop that corresponds to the peak of both
the positive and negative-going data peaks. This branch may
include threshold circuitry prior to the Peak Detector. The
detector in the lower path detects whether the signal peaks are
positive or negative and feeds this data to the flip-flop. This
detector can be implemented using a comparator with preset
threshold.
Figure 29. Read Circuit (Method 3)

Each of the methods shown offer certain intrinsic
advantages or disadvantages. The overall decision as to
which method to use however often involves other important
considerations. These could include cost and system
requirements or circuitry other than simply the Read circuitry.
For instance, if cost is the predominate overall factor, then
Method 1 may be the only feasible alternative.
Method 4 was included as a design example because it
illustrates several unique advantages. First, it uses threshold
sensing to reduce noise peak errors. Second, it may be
implemented using only integrated circuits. Third, it offers
separate, direct threshold sensing for both positive and
negative peaks.
Figure 30. Read Circuit (Method 4)

The technique shown in Figure 30 uses separate circuits
with threshold provisions for both negative and positive peaks.
The peak detectors and threshold detectors may be
implemented with two comparators and two passive
differentiators.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-121

MC1741
MC1741C

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Internally Compensated, High
Performance Operational Amplifiers
The MC1741 and MC1741C were designed for use as summing amplifiers,
integrators, or amplifiers with operating characteristics as a function of the
extemal feedback components.
• No Frequency Compensation Required
• Short Circuit Protection
• Offset Voltage Null Capability
• Wide Common Mode and Differential Voltage Ranges
• Low Power Consumption
• No Latch Up
MAXIMUM RATINGS (TA = +25°C. unless otherwise noted.)
Rating

Symbol

Power Supply Voltage

MC1741C 1 MC1741

VCC. VEE

Input Differential VoHage

±18

VID

Input Common Mode Voltage (Note 1)

±22
1
±30

VICM

±15

Output Short Circuit Duration (Note 2)

tsc

Continuous

Operating Ambient Temperature Range

TA

Storage Temperature Range
Ceramic Package
Plastic Package

Tstg

oto +70

Unit
Vdc

OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT

~

PI SUFFIX
PLASTIC PACKAGE
CASE 626

1

,.

USUFFIX
CERAMIC PACKAGE
CASE 693

1

V
V

1-55 to +125

°C
°C

-65 to +150
-55 to +125

••

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

1

NOTES: 1. For supply voltages less than +15 V. the absolute maximum input voltage
is equal to the supply voltage.
2. Supply voltage equal to or less than 15 V.
PIN CONNECTIONS

Offset Null

1

tnv. tnput

2

7

Vcc

Noninv. Input

3

6

Output

5

Offset Null

Equivalent Circuit Schematic
(1/4 of Circuit Shown)
.-~----~~~~-------.--------~VCC

G
Nonlnverting
Input
Inverting
Input

[Top View)

25

o-1~t=t~:±--lJ~~::t==iH+--1""O Output
50

Offset
Null

ORDERING INFORMATION
Device

MC1741CD

-

MC1741CPl

LM741CN.
1lA741TC

MC1741CU
MC1741U

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-122

AlIBmate

-

Tamc,ratura
ange

Package

SO-8
O· 10 +70·C

Plastic DIP
CsramlcDIP

-55"10
+125°C

Ceramic DIP

MC1741, MC1741C
ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25'C, unless otherwise noted.)
MC1741
Characteristics

MC1741C

Symbol

Min

Typ

Max

Typ

Max

Unit

Input Offset Voltage
(RS S 10 k)

VIO

-

1.0

5.0

-

2.0

6.0

mV

Input Offset Current

110

200

nA

liB

-

20

Input Bias Current

80

500

nA

0.3

2.0

MQ

-

±15

Input Resistance
Input Capacitance
Offset Voltage Adjustment Range

-

20

200

80

500

rj

0.3

2.0

Ci

-

1.4

VIOR

-

±15

Common Mode Input Voltage Range

VICR

±12

±13

Large Signal Voltage Gain
(VO = ±1 0 V, RL 2! 2.0 k)

AVOL

50

200

-

Min

±12

±13

20

200

-

1.4

pF
mV
V
V/mV

ro

-

75

75

-

Q

CMR

70

90

-

-

Common Mode Rejection
(RSS 10 k)

70

90

-

dB

Supply Voltage Rejection
(RS S 10 k)

PSR

75

-

-

75

-

-

dB

-

±12
±10

Output Resistance

Output Voltage Swing
(RL2! 10 k)
(RL 2! 2.0 k)

Vo

Output Short Circuit Current

ISC

V

20

-

-

20

1.7

2.8

-

1.7

2.8

rnA

Pc

-

-

50

85

-

50

85

mW

trLH
as
SR

-

0.3
15
0.5

-

-

0.3
15
0.5

-

±12
±10

Supply Current

ID

Power Consumption
Transient Response (Unity Gain, Noninverting)
(VI = 20 mV, RL 2! 2.0 k, CL S 100 pF) Rise Time
(VI = 20 mV, RL 2! 2.0 k, CL S 100 pF) Overshoot
(VI = 10 V, RL 2! 2.0 k, CL S 100 pF) Slew Rate

±14
±13

-

-

±14
±13

rnA

~s

%
V/~s

ELECTRICAL CHARACTERISTICS (VCC = + 15 V, VEE = -15 V, TA = Tlow to Thigh, unless otherwise noted.)'
MC1741

MC1741C

Symbol

Min

Typ

Max

Max

Unit

Input Offset Voltage
(RSS 10kQ)

VIO

-

1.0

6.0

-

-

7.5

mV

Input Offset Current
(TA = +125'C)
(TA =-55'C)
(TA = 0' to +70'C)

110

-

7.0
85

200
500

-

-

-

-

300

Input Bias Current
(TA = + 125'C)
(TA=-55'C)
(TA = 0' to +70'C)

liB

-

-

30
300

-

-

VICR
CMR

±12

±13

70

Supply Voltage Rejection
(RS S 10 k)

PSR

75

Output Voltage Swing
(RL2! 10 k)
(RL 2! 2.0 k)

Vo

Characteristics

Common Mode Rejection
(RSS10k)

ID

Power Consumption (TA = +125°C)
(TA=-55'C)

Pc

Thigh =

125'C for MC1741
70°C for MC1741C

-

90

-

-

-

-

75

±10

-

500
1500

-

-

800

-

dB

-

-

dB

-

-

V

V

AVOL

Supply Currents
(TA = +125'C)
(TA = -55'C)

-

-

nA

25

-

-

-

-

1.5
2.0

2.5
3.3

-

45
60

75
100

±12
±10

Large Signal Voltage Gain
(RL 2! 2.0 k, Vo = ±10 V)

Typ

nA

-

Common Mode Input Voltage Range

Min

±14
±13

-

±13

15

-

-

-

V/mV
rnA

• Tlow = -55°C for MC1741
O'C for MC1741C

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-123

-

mW

MC1741, MC1741C
Figure 1. Burst Noise versus Source Resistance

~

~
w

en

1000

Figure 2. RMS Noise versus Source Resistance

'alllll~al!~!!!!~1
~
BW = 1.0 Hz to 1.0 kHz

100

is

:2
f-

:::J

c..
~

.:

'"

10

100

!.Ok
10k
RS. SOURCE RESISTANCE (0)

lOOk

0.1 '":-.'-.l-.J-.L.UI'":-:"'u...Ju..LJWJJ..:"-'-.........~:-:'-L...J...~".':'7...J....l...LU"JJJ
10
100
1.0
10 k
100 k
1.0 M
RS. SOURCE RESISTANCE (0)

1.0 M

Figure 3. Output Noise versus Source Resistance

Figure 4. Spectral Noise Density

10

14.0

f

~ 10.0

AV -1000

§.
w 1.0

I-+-t'

:>

en

is

:2
f-

2£.2

c..

10

:::J

f-

C

w

.:

~
~

0.1

c..
~

'"

c

1.0
0.01

10

100

B.O

'"

1.0 k

10k

100 k

\
1\1'

6.0

r-

4.0
2.0

o

1.0M

II

AV=10.R"=100kO

en

:::J

a

II I I

12.0

:>

10

RS. SOURCE RESISTANCE (0)

100

1.0k

10 k

100 k

f. FREQUENCY (Hz)

Figure 5. Burst Noise Test Circuit
Positive
Threshold
Voltage

lOOk

To Pass I Fail
Indicator

lOOk
1.0k
lOOk

Operational Amplifier
Under Test

Low Pass
Filter
1.0Hz to 1.0kHz

o

Negative
Threshold
Voltage

Unlike conventional peak reading or RMS meters. this system was especially
designed to provide the quick response time essential to burst (popcorn) noise
testing.

The test time employed is 10 sec and the 20 mV peak limit refers to the
operational amplifier input thus eliminating errors in the closed-loop gain
factor of the operational amplifier.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-124

MC1741, MC1741C
Figure 6. Power Bandwidth
(Large Signal Swing versus Frequency)

Figure 7. Open-Loop Freuqncy Response

28

120
100

C. 24

~
w

20

0

r:i

16

....
:::>
a.
....
:::>

12


0

8.0

w

60

r:i0

40

~

1\

I 11111111

4.0

"'"

II1111I
100

10

80

0
-20

1.0 k
t, FREQUENCY (Hz)

100k

10 k

1.0

>
....
:::>

....:::>
0

~

10k

100k

c.

±15 V Supplies

<':. -11

11

 2.0 5.0V
o
o 1.0 2.0

+12V

)

5o -5.0
t 16.01V

A P"
AJf?

100

r:i

~

+9.0 V

h
V
/.. V

IJ

w

±112~

9.0

1.0

10M

-13

6.

3.0

'"

100M

-15

6.

a.

1.0k

Figure 9. Negative Output Voltage Swing
versus Load Resistance

±15 ~ S~pplies

C. 13

r:i0

100

10

" ""

t, FREQUENCY (Hz)

15

w

~

20

Figure 8. Positive Output Voltage Swing
versus Load Resistance



(Voltage Follower)
THD < 5%

o

<':.

~

10

Figure 11. Single Supply Inverting Amplifier
1OO11F

"2:

1.0k

10k
VCC

r:i

3.0 4.0
5.0 6.0 7.0
Rl, lOAD RESISTANCE (kQ)

8.0

9.0

200k

7

200k

MC1741
4

10

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-125

1OO11F

r'

MC1741, MC1741C
Figure 12. Noninverting Pulse Response

~

J

' " Output

J

-

"-

I

Input

"-

IOIls/D1V

Figure 13. Transient Response Test Circuit

>--o-.......----1Ir--_

To Scope
(Output)

Figure 14. Open-Loop Voltage Gain
versus Supply Voltage
105
100

~

95

~
w

90

13

85

~

80

:z

./'

~

./
./

C!l

g

........

./

75
70

o

2.0

4.0

6.0 8.0 10
12 14
16
Vee, IVEEI, SUPPLY VOLTAGES M

18

20

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-126

MC1747
MC1747C

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

(Dual MC1741)

Internally Compensated, High
Performance Operational Amplifiers

(DUAL MC1741)
DUAL
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT

The MC1747 and MC1747C were designed for use as summing amplifiers,
integrators, or amplifiers with operating characteristics as a function of the
external feedback components. The MC1747L and MC1747CL are functionally
and electrically equivalent to the I!A747 and I!A747C respectively.
•

No Frequency Compensation Required

•

Short Circuit Protection

•

Wide Common Mode and Differential Voltage Ranges

•

Low-Power Consumption

•

No Latch Up

•

Offset Voltage Null Capability

"#
1

DSUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)

P2SUFFIX
PLASTIC PACKAGE
CASE 646

Figure 1. High-Impedance, High-Gain Inverting Amplifier
Vec

Vee

LSUFFIX
CERAMIC PACKAGE
CASE 632

+

O.lJ.lF

+

Eo = 100 Ein

1/2

MC1747,C

lk

PIN CONNECTIONS

~
VEE

lOOk
Inv Input 1
Terminals not shown are not connected

Figure 2. Circuit Schematic
Vee
G
Noninverting
Input

AdjA

Noninv Input 2

Vee A

OffsetAdjA 3

Output A

OffsetAdj B 5

Output B

Noninv Input 6
Inv Input 7

B Offset Adj B
'-------'

VCCA and VCCB are not connected internally
25

Inverting
Input o--+-+-I--+-..J

Output
50

Offset
Null

50
VEE

ORDERING INFORMATION
Device
MC1747L
MC1747CD
MC1747CL
MC1747CP2

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-127

Temperature
Range
-55° to + 125°C
0° to +70°C

Package
Ceramic DIP
SO-14
Ceramic DIP
Plastic DIP

MC1747, MC1747C
MAXIMUM RATINGS (TA = +25°e, unless otherwise noted.)
Rating
Power Supply Voltages
Differential Input Signal Voltages (Note 1)
Common Mode Input Swing Voltage (Note 2)
Output Short Circuit Duration

Symbol

MC1747

VCC
VEE

+22
-22

I

MC1747C

Unit

+18
-18

Vdc

I

VID

±30

V

VICR

±15

V

tsc

Continuous

Voltage (Measurement between Offset Null and VEE)

±0.5

Operating Ambient Temperature Range
Storage Temperature Range
Junction Temperature
Ceramic Package
Plastic Package

TA

-55 to +125

Tstg

-65 to +150

V

I o to +70
I -65 to +150

°c
°c
°C

TJ
175
150

ELECTRICAL CHARACTERISTICS (Vee = +15 V, VEE = -15 V, TA = +25°e, unless otherwise noted.)
MC1747
Characteristics

Symbol

Input Bias Current
TA = +25°C
TA = Thigh (Note 3)
TA = Tlow (Note 3)

liB

Input Offset Current
TA = +25°C
TA = Thigh
TA=Tlow
Input Offset Current
TA = +25°C
TA = Tlow to TA = Thigh
Offset Voltage Adjustment Range

110

Min

Typ

MC1747C
Max

Min

Typ

Max

-

-

-

80
30
300

500
500
1500

-

80
30
30

500
800
800

-

20
7.0
85

200
200
500

-

20
7.0
7.0

200
300
300

-

1.0
1.0

5.0
6.0

-

-

1.0
1.0

6.0
7.5

±15

-

-

±15

-

mV

2.0
1.4

-

0.3

-

-

2.0
1.4

-

MQ
pF

±12

±13

-

±12

±13

-

70

90

-

70

90

-

50,000
25,000

200,000

-

25,000
15,000

200,000

-

nAdc

mVdc

VIO

-

Differential Input Impedance (Open-loop, f = 20 Hz)
Parallel Input Resistance
Parallel Input Capacitance

r;
VICR

Common Mode Rejection (RS = 10 kQl
Tlow,;TA,;Thigh

CMR

Open-Loop Voltage Gain
TA = +25°C
~
TA = Tlowto TA = Thi h (VO = ±10 V, RL = 2.0 kil)

AVOL

Transient Response (Unity Gain)
(Vin = 20 mV RL = 2.0 kQ, CL ,; 100 pF)
RiseTIme ' .
Overshoot Percentage

0.3

Ci

Common Mode Input Voltage Swing
Tlow,;TA,;Thigh

Unit
nAdc

V
dB
V

-

SR

Output Impedance

Zo

-

75

-

-

75

-

Q

Short Circuit Output Current

ISC

-

25

-

25

-

mAdc

-

120

-

-

120

-

Slew Rate (Unity Gain)

Channel Separation
Output Voltage Swing (Tlow,; TA,; Thigh)
RL= 10kQ
RL = 2.0 kQ

0.5

0.3
5.0

±12
±10

±14
±13

-

±12
±10

-

75
75

-

-

-

2.8
3.3
3.3
85
100
100

±14
±13

75
75

-

dB

-

-

-

1.7
2.0
1.5

2.8
3.3
2.5

-

-

1.7
2.0
2.0

-

50
60
45

85
100
75

-

50
60
60

mAdc

ICC,IEE

mW

Pc

1. For supply voltages of less than ±15 V, the maximum differential input voltage is equal to ±(VCC +IVEEI).
2. For supply voltages of less than ±15 V, the maximum input voltage is equal to the supply voltage (+VCC, -IVEEI).

~~~}~rf~CJ6i;~iL

%

VIIlS

dB
PSR+
PSR-

Power Supply Current (each amplifier)
TA = +25°C
TA=Tlow
TA = Thigh
DC Power Consumption (each amplifier)
TA = +25°C
TA=Tlow
TA = Thigh

3. Tlow =

0.5

Ils

Vpk

VOR

Power Supply Rejection (Tlow to Thigh)
VEE = Constant, RS ,; 10 kQ
VCC = Constant, RS'; 10 kQ

NOTES:

0.3
5.0

-

-

-

tpLH

-

-

Thigh =

:i~~~d~~~~g~~~c

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-128

MC1747, MC1747C
Figure 3. Typical Frequency Shift Keyer Tone Generator Test Circuit
. -_______________________
V~ee~------_.

Vee

15V

6.2k
10k
15k

Vee
+15V
9.1

-15V

+15V

9.1

Logic
Input

1k

1N914
or Equiv.

Terminals not shown are not connected.

Figure 4. Typical Frequency Shift Keyer
Tone Generator

>

is

>1~~~~~m++H~~~~+H~~~H+MH~

o

.,;

0.5 ms/DIV

Figure 5. Open-Loop Voltage Gain
versus Power-Supply Voltage

Figure 6. Open-Loop Frequency Response

120
iii"
:!?-

115

~

110

z

120

w

(!l

;:§

105

~

100

D-

o

9

:2:
~

o

:}

95

.........

V

100

--

iii"

:!?-

80

(!l

60

z
;;;:
w

"

(!l

;:§

40

~

0

><5
>

90

20



::::>

DI-

70

z
a

40

S


0_ 8.0

a

> 4.0

III~

o
10

100

ii:
::;;
::::>
en

,

10

aD-

7.0

;;

.p-

IllJI
10k

2.0

~

16

/

12

4.0

o

6.0
10
14
18
VCC, VEE, POWER SUPPLY VOLTAGE (V)

22

Figure 10. Output Noise versus Source Resistance

./
100

6

±12 V ~UPPliis

V

200

g

1.0

w
0
z

0.8

UJ....-"

en

I

V

THD <5.0%

1L,'r = lOdo -+-J-,J,.I~ RS = R3R2=

'iF 1.2 1---+--Hf-H+11
E

I


cr::
w

Figure 9. Output Voltage Swing
versus Load Resistance

~

..I'

V

f=

I lOOk

.~

91K
1.0kHz -= . -=
'V

500
1.0k
2.0k
RL, LOAD RESISTANCE (0)

+

,

I-

::::>

DI-

~

a_

Vo

c:::

0

RL-=

5.0k

0.6

::::>

'"
10k

~.
1~
VI

DA

-=1

I I I I I II I

AV=RJ

t-H-++t+t+-+-+-l--j,.j!'I+l1
f-

AV =

1~-j;,"'9-++-tH-H

t-t-t+~t-"""-+-l-+++tttl

""""'",""".r..r.I~I~III~11~~:t=+mf.l.t---+- = 10
0.2
1-""1
~
0.1 L-....L...L..J...I..I.u"u,_.............o.Y.,!"Id::::::::L..L.J,.o.I::t:CJ
100
1.0 k
10 k
100 k
RS, SOURCE RESISTANCE (0)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-130

Rl +R2 .

Ay

MOTOROLA

MC1748C

SEMICONDUCTOR-----TECHNICAL DATA

OPERATIONAL AMPLIFIER

High Performance
Operational Amplifier

SILICON MONOLITHIC
INTEGRATED CIRCUIT

The MC1748 is designed for use as a summing amplifier, intergrator, or
amplifier with operating characteristics as a function of the external feedback
components.

"~

• Noncompensated MC1741
• Single 30 pF Capacitor Compensation Requried For Unity Gain
• Short Circuit Protection

1

• Offset Voltage Null Capability

P1 SUFFIX

• Wide Common Mode and Differential Voltage Ranges

PLASTIC PACKAGE
CASE 626

• Low Power Consumption
• No Latch Up

Figure 1. Circuit Schematic
PIN CONNECTIONS
Noninverting
Input
3

Balance 1

B

Compensation

7

VCC

25

Inverting
Input

5 Balance

2:j~H:~~;:=~_~-.,...~=-:::t:~~f---ffi6 Output
50

VEE

ORDERING INFORMATION

L-~-~-~-~-4-~-~----~4

Temperature Range
0° to +70°C

Typical Compensation Circuits
Figure 2. Offset Adjust and
Frequency Compensation

Figure 4. Feedforward
Compensation

Figure 3. Single-Pole
Compensation

C2

R2
R1
-VI

+ VI

_.JVVIr-~0-l

Vo

R3
_.JVVIr----O~"VO

R3
C1

C1:2:

R1 Cs
R1 + R2

Cs =30pF

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-131

1
150pF

C2 = 21tfoR2

fo

=3.0 MHz

MC1748C
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Rating
Power Supply Voltage
Differential Input Signal

Symbol

Value

Unit

VCC
VEE

+18
-18

Vdc

Vin

±30

V

VICR

±15

V

Output Short Circuit Duration

tsc

Continuous

Power Dissipation (Package limitation)
Derate above TA = +25°C

PD

680
4.6

Common Mode Input Swing (Note 1)

mW
mW/oC

Operating Temperature Range

TA

Oto+70

°C

Storage Temperature Range

Tstg

-65 to +150

°c

ELECTRICAL CHARACTERISTICS (VCC = +15 Vdc, VEE = -15 V, TA = +25°C, unless otherwise noted.)
Characteristics

Symbol

Input Bias Current
TA = +25°C
TA = Tlow to Thigh ~Note 2)

liB

Input 'Offset Current
TA=+25°C
TA = Tlow to Thigh

11101

Input Offset Voltage (RS S 10k ill
TA = +25°C
TA = Tlow to Thigh

IVlol

Differential Input Impedance (Open-Loop, f = 20 Hz)
Parallel Input Resistance
Parallel Input Capacitance

Rp
Cp

Common Mode Input Impedance (f 20 Hz)

Min

-

Typ

Max

0.08

0.5
0.8

-

0.02

-

-

0.2
0.3

-

1.0

-

6:0
7.5

0.3

2.0
1.4

-

-

IlAdc

mVdc

zin

-

200

Common Mode Input Voltage Swing

VICR

±12

±13

Common Mod~ Rejection (f = 100 Hz)

CMR

70

90

Open-Loop Voltage Gain, (VO = ±10 V, RL = 2.0 kn)
TA = +25°C
TA = Tlow to Thigh

Avol

-

dVoutidt

-

0.3
5.0
0.8

Output Impedance (f = 20 Hz)

Zo

-

75

Short Circuit Output Current

Isc

-

25

Output Voltage Swing (RL = 10 kn)
RL = 2 kn (TA = Tlow to Thigh)

Vo

±12
±10

±14
±13

-

PSR+
PSR-

75
75

-

-

Power Supply Current

ID+
ID-

-

1.67
1.67

2.83
2.83

DC Quiescent Power Dissipation
(VO= 0)

PD

-

50

85

-

/lS
%

VI/lS
il
mAdc
Vpk
dB

mAdc
mW

NOTES: 1. For supply voltages of less than ±15 V, the Maximum Input Voltage Is equal to the Supply Voltage.
2. Tlow: O°C for MC1748C
Thigh: +70°C for MC1748C

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-132

dB

-

-

Power Supply Sensitivity
VEE = constant, RS S 10 kn
VCC = constant, RS S 10 kn

Vpk

VN
200,000

tr

Mil
pF
Mil

20,000
15,000

Step Response (Vin = 20 mV, C c = 30 pF, RL = 2.0 kil, CL = 100 pF)
Rise Time
Overshoot
Slew Rate

Unit
IlAdc

MC1748C
Figure 6. Minimum Output Voltage Swing

Figure 5. Minimum Input Voltage Range
20
~
w



>-

:::>

12

Po~itive

B.O

~
w

 1.5

w

BB

~

w

.

20

5.0
10
15
VCC AND ( -VEE), SUPPLY VOLTAGE M

2.5

Applicable to the Specified
Operaling Temperature
Ranges

~

0

\

Minimum
RL =2.0 k

Figure 8. Typical Supply Currents

z

;=;
'-'

./ ./

/'" / '

~

4.0

Figure 7. Minimum Voltage Gain

10

V

V /'"

\ ..../.. ~

a..

>-

:::>
0

5.0
10
15
VCC AND (-VEE), SUPPLY VOLTAGE M

100

Applicable to the Specified
Operating Temperature
Ranges

RL =10 k

> B.O
>:::>

V

:>

_

130

.Y
K'\
V Negative

a..

o

20

Applicable to the Specified
Operating Temperature
Ranges

:::>

"'.w

«> 76

TA = +25°C

w

- 0.5
0

E
70

o

5.0
10
15
VCC AND (-VEE), SUPPLY VOLTAGE M

o

o

20

Figure 9. Open-Loop Frequency Response
lBO

t

S'Ingle·
.1 Pole ompensatlon
I.

160

I

10 140

>
±l-

«.

«>

ill

120

100
w

>:::>

:: o

i"-..
1.0M

«
a:

:sw

90 ~
45 a..

C ~ l"-

z

;=;
'-'

--.

20

Figure 10. Large-Signal Frequency Response

::

I

5.0
10
15
VCCAND (-VEE), SUPPLY VOLTAGE M

10

\

a..

>- 5.0

:::>
0

a:
-?

~

~

0

Cl =30pF

o

1.0 k

10M

1\

w



120

r- i-'

~

C!l

-?

140

I Single~pole c!ompe~sation I

8.0

C!l

Figure 12. Open-Loop Frequency Response

"

Input

"

10

60

1:3
~
3«

"

-8.0
-10 -II

80

w

C!l

Output

r- .-

-6.0

z

~

V,

/

100

~

/

1",,1

i'iJ

-

Feedtorward Compensation

-........ I'-,.

'~

40

G~

20

30

40

50

60

70

80

"'-

-20
10

90

100

1.0k

t, TIME (llS)

C!l

~w

C!l

~ I .1 1 In
I I.
Feedtorward CompensallOn

12

~

o

1i::

8. 0

4.0
~

I\.

1:3
~

l\..
i'o..

.....

100 k

1.0M
t, FREQUENCY (Hz)

a

10M

.u

100M

.- .-

Output

I

...+.-IrIInput/

o
-2.0

~

-4.0
-6.0

,..

\

I
I
I
I

.-

1'0.

.-

'---

.- .-

? -8.0

-I-.

o

~

2.0

~

o

4. 0

-?

lOOk
1.0M
t, FREQUENCY (Hz)

10
8.0 I--- r- Feedforward Compensation
6.0

1:3
~
~

~

16

\

10k

Figure 14. Inverter Pulse Response

Figure 13. Large-Signal Frequency Response

w

~

"""'-- '"

0

20

18

Phase

......

-10

10M

o

1.0

2.0

3.0

4.0

5.0

t, TIME (llS)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-134

6.0

7.0

8.0

9.0

MC1776
MC1776C

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

PROGRAMMABLE
OPERATIONAL AMPLIFIER

Micropower Programmable
Operational Amplifier

SILICON MONOLITHIC
INTEGRATED CIRCUIT

This extremely versatile operational amplifier features low power consumption
and high input impedance. In addition, the quiescent currents within the device
may be programmed by the choice of an external resistor value or current source
applied to the Iset input. This allows the amplifier's characteristics to be optimized
for input current and power consumption despite wide variations in operating
power supply voltages.
• ±1.2 V to ±18 V Operation
• Wide Programming Range
• Offset Null Capability
• No Frequency Compensation Required
• Low Input Bias Currents
• Short Circuit Protection

PI SUFFIX
PLASTIC PACKAGE
CASE 626
(MC1776C Only)

USUFFIX
CERAMIC PACKAGE
CASE69~

Resistive Programming
(See Figure 1)
DSUFFIX
PLASTIC PACKAGE
CASE 751

Rset to Negative Supply

Rset to Ground

(Recommended for supply voltage
less than ±6.0 V)

Rset

Rset

VCC-O.6
ISel=-Rsel

--'-V"'CC"----=-O.:.:.6_-V"-,E,,,-E
lset= -

3.6Mn
6.2Mn
7.5Mn
10Mn

PIN CONNECTIONS

Rset

Typical Raet Values

±6.0V
±10V
±12V
±15V

(50-8)

Typical Rset Values

360 kn
620 kn
750 kn
1.0 Mn

±1.5V
±3.0V
±6.0V
±15V

1.6Ma
3.6Mn
7.5Mn
20Mn

160 kn
360 kn
750 kn
2.0 Mn

Input

[Top View)

Active Programming
FET Current Source

Bipolar Current Source

ORDERING INFORMATION
Device

VB

MC1776U

Temperature Range

Package

-55° 10 + 125°C

Ceramic DIP

0° to +70°C

PlaslicDIP

50-8

MC1776CD
MC1776CP1
Pins not shown are not connected.

MC1776CU

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-135

Ceramic DIP

MC1776, MC1776C
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Rating
Power Supply Voltages
Differential Input Voltage
Common Mode Input Voltage
VCC and IVEEI < 15 V
VCC and IVEEI ~ 15 V

Symbol

Value

Unit

VCC,vEE

±18

Vdc

VID

±30

Vdc

VCCVEE
±i5

Vdc
Vdc

VICM

VotrVEE

±D.5

Programming Current

Iset

500

~

Programming Voltage
(Voltage from Iset Terminal to Ground)

Vset

(VCC-2.0V)
toVCC

Vdc

Indefinite

sec

Offset Null to VEE Voltage

Output Short Circuit Duration (Note 1)

tsc

Operating Temperature Range
MCI776
MCI776C

TA

Storage Temperature Range
Ceramic Package
Plastic Package

Tstg

°c
-55 to +125
to +70

o

°C
-65 to +150
-55 to +125

Junction Temperature
Ceramic Package
Plastic Package

°C

TJ
175
150

NOTE 1. May be to ground or either Supply Voltage. Rating applies up to a case temperature
of + 125°C or ambient temperature of +70°C and Iset!> 30 !lA.

Equivalent Schematic Diagram
7

r---------~----~~~+_-4r---~------~----oVCC

50

100

6
Output

50

Offset Null

5O----+----~

10k

10k

4

L-----~--~----~----~--~----~-------+----oVEE

Transient Response Test Circuit

Voltage Offset Null Circuit

3

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-136

MC1776, MC1776C
ELECTRICAL CHARACTERISTICS (VCC = +3.0 V. VEE =-3.0 V. Iset = 1.5 /lA. TA = +25°C. unless otherwise noted.)
MC1776
Characteristics

Symbol

Input Offset Voltage (RS S 10 kil)
TA = +25°C
Tlow" STA SThigh"

VIO

Offset Voltage Adjustment Range

VIOR

Max

Min

Typ

Max

-

2.0

-

5.0
6.0

2.0

-

6.0
7.5

-

9.0

-

-

9.0

-

-

0.7

3.0
5.0
10

-

0.7

-

-

6.0
6.0
10

-

2.0

7.5
7.5
20

-

2.0

-

10
10
20

-

50

-

MQ

-

2.0

-

pF

-

-

-

Input Offset Current
TA = +25°C
TA = Thigh
TA=Tlow

110

Input Bias Current
TA = +25°C
TA = Thigh
TA=Tlow

liB

M1776C

Typ

Min

-

-

-

-

Input Resistance

ri

-

50

Input Capacitance

ci

-

2.0

-

+1.0

-

-

+1.0

Input Voltage Range
Tlow S TA S Thigh

VID

Large Signal Voltage Gain
RL ~ 75 kn, Vo = ±1.0 V. TA = +25°C
RL ~ 75 kn, Vo = ±1.0 V. Tlow S TA S Thigh
Output Voltage Swing
RL ~ 75 kn, Tlow S TA S Thigh

AVOL

. ro

Output Short Circuit Current

ISC

Common Mode Rejection
RS S 10 kn, Tlow STA SThigh

CMR

Supply Voltage Rejection Ratio
RSS10kn, TlowSTASThigh

PSRR

Supply Current
TA=+25°C
TlowSTASThigh

ICC. lEE

Power Dissipation
TA=+25°C
TlowSTASThigh

PD

Transient Response (Unity Gain)
Vin = 20 mV. RL ~ 5.0 kn, CL = 100 pF
Rise Time
Overshoot
Slew Rate (RL ~ 5.0 kil)
"Tlow = -55°C for MCI776
O°C for MCI776C

mV
nA

nA

V
VN

200 k

-

25 k
25 k

200 k

-

±2.0

±2.4

±2.0

±2.4

-

5.0

-

5.0

kil

3.0

-

-

-

3.0

-

rnA

70

86

-

70

86

-

-

25

150

-

25

200

-

13

-

20
25

-

13

-

20
25

-

78

120
150

-

-

-

-

-

-

-

trLH
OS

-

-

3.0
0

SR

-

0.03

Thigh = +125°CforMCI776
+70°C for MC1776C

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-137

mV

50k
25k
Vo

Output Resistance

Unit

-

-

V

dB

'tlVN

/lA
'tlW

78

120
150

3.0
0

-

'tlS
%

0.03

-

V/IlS

MC1776, MC1776C
ELECTRICAL CHARACTERISTICS-continued (VCC = +3.0 V, VEE = -3.0 V, Iset = 15 J.lA, TA = +25°C, unless otherwise noted.)
MC1776
Characteristics

Symbol

Input Offset Voltage (RS $ 10 kQ)
TA = +25°C
Tlow' $ TA $ Thigh'

VIO

Offset Voltage Adjustment Range

VIOR

Input Offset Current
TA = +25°C
TA = Thigh
TA =Tlow

110

Input Bias Current
TA = +25°C
TA = Thigh
TA =Tlow

liB

MC1776C

Min

Typ

Max

Min

Typ

Max

-

2.0

-

6.0
7.5

mV

-

-

5.0
6.0

-

2.0
-

-

18

-

-

18

-

-

2.0
-

15
15
40

-

2.0

25
25
40

15

50
50
120

-

15

-

-

5.0

-

2.0

-

-

-

-

-

nA
-

-

-

50
50
100

Input Resistance

q

-

5.0

Input Capacitance

ci

-

2.0

-

-

-

±1.0

-

200 k
-

-

±2.1

-

±1.0

Output Voltage Swing
RL ~ 5.0 kQ, Tlow $ TA $ Thigh

AVOL

Output Resistance

200 k

-

-

25 k
25 k

±1.9

±2.1

-

±2.0

-

1.0

-

-

1.0

-

5.0

-

-

5.0

-

70

86

-

70

86

-

-

25

150

-

25

200

-

130

-

130
-

170
180

-

780

1020
1080

Supply Voltage Rejection Ratio
RS $ 10 kQ, Tlow $ TA $ Thigh

PSRR

Supply Current
TA = +25°C
Tlow $TA $ Thigh

ICC, lEE

Power Dissipation
TA = +25°C
Tlow $TA $ Thigh

PD

kQ
mA
dB
J.lVIV
J.lA

-

-

160
180

-

780
-

960
1080

J.lW

-

Transient Response (Unity Gain)
Yin = 20 mY, RL ~ 5.0 kQ, CL = 100 pF
Rise Time
Overshoot

VIV

V

ro

CMR

pF

-

ISC

Common Mode Rejection
RS $ 10 kQ, Tlow $ TA $ Thigh

Slew Rate (RL ~ 5.0 kQ)

50 k
25 k
Vo

Output Short Circuit Current

MQ

V

VID

Large Signal Voltage Gain
RL ~ 5.0 kQ, Vo = ±1.0 V, TA = +25°C
RL ~ 5.0 kQ, Vo = ±1.0 V, Tlow $TA $ Thigh

mV
nA

-

Input Voltage Range
Tlow$TA$Thigh

Unit

-

-

tTLH
OS

-

0.6
5.0

-

-

0.6
5.0

-

-

-

J.ls
%

SR

-

0.35

-

-

0.35

-

V/J.ls

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-138

MC1776, MC1776C
ELECTRICAL CHARACTERISTlCS-continued (VCC = +15 V, VEE = -15 V, Iset = 1.5 !lA, TA = +25°C, unless otherwise noted.)
MC1776
Characteristics

Symbol
VIO

Offset Voltage Adjustment Range

VIOR

110

Input Bias Current
TA = +25°C
TA = Thigh
TA=Tlow

liB

Input Resistance

q

Input Capacitance

ci

Input Voltage Range
Tlow"TA"Thigh

Min

Typ

Max

-

2.0

-

2.0

-

5.0
6.0

-

6.0
7.5

-

9.0

-

-

9.0

-

-

0.7

3.0
5.0
10

-

0.7

6.0
6.0
10

-

2.0

7.5
7.5
20

2.0

-

2.0

-

-

-

Output Voltage Swing
RL ~ 75 kQ, TA = +25°C
RL ~ 75 kQ, Tlow" TA" Thigh

-

Output Short Circuit Current

mV

nA

-

50

-

2.0

-

-

±10

-

-

±10

-

50 k
50 k

400 k

-

-

50

10
10
20
MQ
pF
V
VIV

AVOL

-

200 k
100 k

400 k

±12
±10

±14

-

±12
±10

±14

ro

-

5.0

-

-

5.0

-

kQ

ISC

-

3.0

-

-

3.0

-

mA

70

90

-

70

90

-

-

25

150

-

25

200

20

25
30

-

20

-

-

30
35

0.75
0.9

-

780

-

1.6
0

-

!IS
%

0.1

-

V/jJ.S

-

V

Common Mode Rejection
RS" 10kQ, Tlow"TA"Thigh

CMR

Supply Voltage Rejection Ratio
RS" 10 kQ, Tlow" TA" Thigh

PSRR

Supply Current
TA = +25°C
Tlow"TA"Thigh

ICC,IEE

Power Dissipation
TA = +25°C
Tlow" TA" Thigh

Po

Transient Response (Unity Gain)
Yin = 20 mY, RL ;, 5.0 kQ, CL = 100 pF
Rise Time
Overshoot

-

-

-

Vo

Output Resistance

Unit

nA

VID

Large Signal Voltage Gain
RL ~ 75 kQ, Vo = ±10 V, TA = +25°C
RL ~ 75 kQ, Vo = ±10 V, Tlow "TA" Thigh

Slew Rate (RL ~ 5.0 kQ)

Max

-

Input Offset Current
TA = +25°C
TA = Thigh
TA=Tlow

MCI776C

Typ

mV

Input Offset Voltage (RS " 10 kQ)
TA = +25°C
Tlow'" TA" Thigh'

'Tlow = -55°C for MCI776
O°C for MCI776C

Min

-

-

dB
jJ.VIV

-

-

-

-

-

1.6
0

-

0.1

-

!lA

mW

trLH
OS
SR

-

Thigh = +125°C for MCI776
+70°C for MCI776C

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-139

-

0.9
1.05

MC1776, MC1776C
ELECTRICAL CHARACTERISTICS-continued (VCC = +15 V, VEE

= -15 V, Iset = 151lA, TA = +25°C, unless otherwise noted.)

MC1776
Characteristics

Symbol

Input Offset Voltage (RS ;; 10 kQ)
TA = +25°C
Tlow' ;; TA;; Thigh'

VIO

Offset Voltage Adjustment Range

VIOR

Input Offset Current
TA = +25°C
TA = Thigh
TA = Tlow

110

Input Bias Current
TA = +25°C
TA = Thigh
TA = Tlow

liB

MC1776C

Min

Typ

Max

Min

Typ

Max

-

2.0

-

2.0

Unit
mV

-

-

5.0
6.0

-

-

18

-

-

6.0
7.5

18

-

-

2.0
-

-

-

15
15
40

-

2.0

-

25
25
40

-

15

-

15

-

50
50
120

-

50
50
100

mV
nA

-

nA

Input Resistance

r;

-

5.0

-

-

5.0

-

MQ

Input Capacitance

ci

-

2.0

-

-

2.0

-

pF

-

-

±10

-

-

-

50 k
50 k

400 k

Input Voltage Range
Tlow;;TA;;Thigh

VID
±10

Large Signal Voltage Gain
RL" 5.0 kQ, Vo = ±10 V, TA = +25°C
RL" 75 kQ, Vo = ±10 V, Tlow ;;TA;; Thigh

AVOL

V
VN

-

100 k
75 k

400 k

±10
±10

±13
-

-

±10
±10

±13
-

-

-

-

Output Voltage Swing
RL" 5.0 kQ, TA = +25°C
RL" 75 kQ, Tlow;; TA;; Thigh

Vo

Output Resistance

ro

-

1.0

1.0

-

kQ

-

12

-

-

ISC

-

12

-

mA

70

90

-

70

90

-

-

25

150

-

25

200

-

160

-

180
200

-

-

160

-

190
200

-

-

5.4
6.0

-

Output Short Circuit Current
Common Mode Rejection
RS;; 10 kQ, Tlow ;;TA;; Thigh

CMR

Supply Voltage Rejection Ratio
RS;; 10 kQ, Tlow;; TA ;;Thigh

PSRR

Supply Current
TA = +25°C
Tlow;; TA;; Thigh

ICC, lEE

Power Dissipation
TA = +25°C
Tlow;; TA;; Thigh

PD

Transient Response (Unity Gain)
Vin = 20 mV, RL ,,5.0 kQ, CL = 100 pF
Rise lime
Overshoot
Slew Rate (RL ,,5.0 kQ)

V

dB
IlVN

-

-

IlA
IlW

5.7
6.0

tTLH
OS

-

0.35
10

-

-

-

0.35
10

-

IlS

SR

-

0.8

-

-

0.8

-

V/IlS

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-140

%

MC1776, MC1776C
Figure 1. Set Current versus Set Resistor

Figure 2. Positive Standby Supply Current
versus Set Current
~ 1000

100M

9a:

en

u;
w

tii

1'0.

r--vCc - +3.0 V

t-

a:

......

10M

0

Vcc +15V
VEE - -15 V
Rset to VEE

loOM

......

VEE = -3.0 V
Rsetto VEE

Z

W

a:

!5

VCC = +15 V
VEE = -15 V
Rsetto GND

~

I'-.

::>

0.
0.

en

./

10

1;;
Cl

VCC- +3.0 V
VEE = -3.0 V
RsettoGND

a: 100 k

./

100

<.>

en

~

+3.0 V VEE> 18V

t-

Z

~
en
w
>

i'-

1.0

>=
u;

10 k
0.1

1.0

10

100

o0.

0.10.01

0.1

Figure 3. Open-Loop Gain versus Set Current
Vcc - +15 V
VEE - -15 V

RL 75 k

z

C!l
0.

.....-

JA"I

106

10

0

9

Vcc- +3.0 V
VEE = -3.0 V

zW

0.

0

100

100

~

<;:

10

Figure 4. Input Bias Current versus Set Current

107

~

1.0
'set, SET CURRENT (!lA)

'set, SET CURRENT (!lA)

105

~~
I--

,/
+3.0 V < Vce < +18 V
-3.0 V > VEE> 18 V

V

1.0

..::.

0

..:>

I-'
104
0.1

1.0

100

10

0.1
0.01

0.1

'set, SET CURRENT (!lA)

Figure 5. Input Bias Current
versus Ambient Temperature
30

I

ztw
a:
a:

::>

<.>

24

.........

10M

I

i'......

18

...........

12

~

-

6.0 I - -

-60

VCC - +15 V
VEE 15V

.......

k

100 k

.........

Vce=+3.0V VEE = -3.0 V

=

'set = 1.5!lA

r--......

0.

o

f-"""

1.0 M

~

!E

100

Figure 6. Gain Bandwidth Product
versus Set Current

~

en

'"::>t-

10

+3.0 V $ Vcc $ +18 V
-3.0V 2: VEE >18 V

< w

/

V

USC!:! 12
c.. ~

- '-'

9=~
.s

6.0

0

>

<" 120
2-

VCC;+15V
VEE; -15V
'sel d.5llA

,/

/

""~
USC!:!
c.. z 18

-

150

30
f-

:::J

Figure 8. Supply Current
versus Ambient Temperature

fZ

w

a:
a:

IIII

:::J

1111
Vcc; +3.0 V
VEE; -3.0 V
1.5llA ~ 'sel ~ 15llA

c..
c..
:::J
en

1.0k

10 k

ci>

II II

1111

o

c.>
~

lOOk

/

'set; 15llA
VCC;+3.0V
VEE ;-3.0V

'.

'set; 1.5 llA
VCC; +15V
VEE; -15 V

90
60

r----

'set; 1.5llA
VCC;+15V

30 f--

VEE-~5V

o

-60 -40

1.0 M

-20

0

36
32

"in

w

C!:!

28
24 -

1:3
g

20

r- 1.5llA ~ 'set~ 15 rnA

16
~ 12
o B.O

H

4.0

o. /
o

b

./.

. / . "/

RL;75k

~

g

60

80

100

120 140

RL;5.0k

_

1.0

w

I

~ ~-'set; 1.5llA I -

~

i

, / 'set; 15llA
RL; 5.0 k

~

0.1

r:r
en

0.01

~
en

-

~~

VCC;+15V
VEE--15V
,/

l/

2.0

4.0

6.0

8.0

10

12

14

16

18

20

VCC, (VEE), SUPPLY VOLTAGES M

0.001
0.01

0.1

VCC; +3.0 V
VEE; -3.0 V

1.0

10

100

'set, SET CURRENT (llA)

Figure 12. Optimum Source Resistance for
Minimum Noise versus Set Current

Figure 11. Input Noise Voltage
versus Set Current

;;.

40

10

40

~

I I I

Figure 10. Slew Rate
versus Set Current

Figure 9. Output Voltage Swing
versus Supply Voltage

~

20

I

T, AMB'ENTTEMPERATURE (0C)

RL, LOAD RES'STANCE (Q)

~

'set; 1.5llA
Vcc; +3.0 V
r - VEE; -3.0 V

-

10- 13

lOOlllmBflJllll

~

~

10-14

1:3

g
w

a:

:5
o

10-15

en

~

::;;

l-l.0kHz
AI-Hz
+3.0VVEE>-18V

10- 16

ci
::;;

~

10-17
0.01

OJ

1~

10

100

'set, SET CURRENT (llA)

0.1 L-L....1...JL...L.Ju.u.II.-I....I......L...I..J.J.I.UJ................J....u.u.w.......L...I.-J...UOLWI
0,01
0.1
1.0
10
100
'set, SET CURRENT (llA)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-142

MC1776, MC1776C
Figure 13. Wien Bridge Oscillator

Figure 15. Multiple Feedback Bandpass Filter
(1.0 kHz)

22k

+ISV
Input
10k

2
MC1776.C
Vo
Rset

i

RS
2
C
MCI776.C
Output
R2
2M
Rl; 160k
R2; 820
RS;300k
C; 0.01 ~F

for a 1.0 kHz filter
with 0; 10
and A (fo); 1

1
fo; 2" RC

(for fo ; 1.0 kHz)

-15V

Figure 16. Gated Amplifier

R;16kQ
C;O.OI ~F

MC1776.C>--o....... Output

Figure 14. Multiple Feedback Bandpass Filter

Input-----~)--j

-ISV
Ij_--'\f\/'v--

30

w

a

a.

g 20

Z
w

500

a.

10
0

1000

a
100

1.0k

10 k
100 k
FREQUENCY (Hz)

1.0M

o

10M

o

3.0

6.0

10

~

.s.
...
zw

9.
w

a:

~

j$

~ 1.0 k

::>

()

lOG

6.0

.....- :,....-,..

~

a:

~

"
100
0.5k 1.0k

21

24

27

30

--

~

..... V

.-- ~
100

(Noninverting Inputs Open)

5.0k 10k

50k 100k
FREQUENCY

cil
6 2.0

E

r--

E
500k 100M

o

5.0M

o

3.0

Figure 5. Linear Source Current
versus Supply Voltage
20

9.0 12
15
18
21
SUPPLY VOLTAGE (Vdc)

24

27

30

27

30

1000

16

zw

12

..........

()

w

~ f""

()

a:
::> 8.0
aen

~

...z

..... V

,.. V

w

a:
a:

VOH =0.4 Vdc

>C
Z

u;

...

V

600

VOL =0.4 Vdc

400

::>

1=
::>

4.0

a

::>

200

o
6.0

",

::>

...... V

3.0

I--

800

()

a

o
o

6.0

Figure 6. Linear Sink Current
versus Supply Voltage

u
'0
«

::>

18

::>
en 4.0

a

...a.
...

V

..... ~ V

a.
a.

w

a:
a:

15

(NO~inverti~g InpJs GrO~nded)

~

8.0

a:

z

12

Figure 4. Supply Current versus
Supply Voltage
u

()

9.0

SUPPLY VOLTAGE (Vdc)

10 k

::>

r::--..

L

Figure 3. Output Resistance
versus Frequency

.s.
...

-

g

Z
w

a

~
a.
a

/'

/

~

a

a.

.L'

/'

9.0
12
15
18 21
SUPPLY VOLTAGE (Vdc)

24

27

30

o

3.0

6.0

9.0

12
15 18
21
SUPPLY VOLTAGE (Vdc)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-146

24

MC3301, MC3401, LM2900, LM3900
OPERATION AND APPLICATIONS
Basic Amplifier
The basic amplifier is the common emitter stage shown in
Figures 7 and 8. The active load 11 is buffered from the input
transistor by a PNP transistor, 04, and from the output by an
NPN transistor, 02. 02 is biased Class A by the current source
12. The magnitude of 12 (specified Isink) is a limiting factor in
capacitively coupled linear operation at the output. The sink of

the device can be forced to exceed the specified level by
keeping the output dc voltage above "" 1.0 V resulting in an
increase in the distortion appearing at the output. Closed-loop
stability is maintained by an on-the-chip 3-pF capacitor shown
in Figure lOon the following page. No external compensation
is required.

Figure 7. Block Diagram

Multiple emitter (8) transistor - one emitter connected to each input.

A non inverting input obtained by adding a current mirror as
shown in Figure 9. Essentially all current which enters the
noninverting input, lin+, flows through the diode CR1. The
voltage drop across CRl corresponds to this input current
magnitude and this same voltage is applied to a matched
device, 03. Thus 03 is biased to conduct an emitter current
equal to lin+. Since the alpha current gain of 03 "" 1, its

Figure 8. A Basic Gain Stage

collector current is approximately equal to lin+ also. In
operation this current flows through an external feedback
resistor which generates the output voltage signal. For
inverting applications, the noninverting input is often used to
set the dc quiescent level at the output. Techniques for doing
this are discussed in the "Normal Design Procedure" section.

Figure 9. Obtaining A Noninvertlng Input

J!!..:...
(-I

(-I

o Output

Inputs

Input
12

~

(+1
CRt

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-147

output

MC3301, MC3401, LM2900, LM3900
Biasing Circuitry
The circuitry common to all four. amplifiers is shown in
Figure 11. The purpose of this circuity is to provide biasing
voltage for the PNP and NPN current sources used in the
amplifiers.
The voltage drops across diodes CR2, CR3 and CR4 are
used as references. The voltage across resistor R 1 is the sum
of the drops across CR4 and CR3 minus the VBE of Q8. The
PNP current sources (Q5, ect.) are set to the magnitude
VBE/R1 by transistor Q6. Transistor Q7 reduces base current

loading. The voltage across resistor R2 is the sum of the voltage drops across CR2, CR3 and CR4, minus the VBE drops
of transistor Q9 and diode CR5 thus the current set is established by CR5 in all the NPN current sources (Q10, ect.). This
technique results in current source magnitudes which are relatively independent of the supply voltage. Q11 (Figure 7) provides circuit protection from signals that are negative with
respect to ground.

Figure 10. A Basic Operational Amplifier

Figure 11. Biasing Circuitry

10k

Output
I
I t VBE

CR2

R2
CR3
CR4

NORMAL DESIGN PROCEDURE
Choosing the feedback resistor (Rj) to be equal to 1/2 Rr
will now bias the amplifier output DC level to approximately VCC/2. This allows the maximum dynamic range
of the output voltage.

1. Output Q-Point Biasing
A. A number of techniques may be devised to bias the
quiescent output voltage to an acceptable level.
However, in terms of loop gain considerations it is
usually desirable to use the noninverting input to effect
the biasing, as shown in Figures 12 and 13. The high
impedance of the collector of the noninverting "current
mirror" transistor helps to achieve the maximum loop
gain for any particular configuration. It is desirable that
the non inverting input current be in the 10 ~ to 200 ~
range.

C. Reference Voltage other than VCC (see Figure 14)
The biasing resistor (Rr) may be returned to a voltage(Vr) other than VCC. By setting Rf= Rr, (still keeping
lin +between 10 I1A and 200 I1A) the output DC level will
be equal to Yr. The expression for determining VOdc is:
V

B. VCC Reference Voltage (see Figures 12 and 13)
The noninverting input is normally returned to the VCC
voltage (which should be well filtered) through a resistor
(Rr) allowing the input currerit, (lin+) to be within the
range of 10 ~ to 200 I1A.

- (AiHVrHRf) (1
Odc Rr
+

_Bi

Rr

A') '"
I

'I'

where cp is the VBE drop of the input transistors
(approximately 0.6 Vdc @ +25°C and assumed equal).
Ai is the current mirror gain.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-148

MC3301, MC3401, LM2900, LM3900
Figure 12. Inverting Amplifier
Rf
510k

AV = for

Figure 13. Noninverting Amplifier
Rf
Ai

-.l.«
roC

AV=~"'l

Rf
510k

R'+
I

R'

~

lin+(mA)

I

1.0JlF

,E
+15V

FVO
+15V

AV=10BW=150kHz

2. Gain Determination
A. Inverting Amplifier
The amplifier is normally used in the inverting mode.
The input may be capacitively coupled to avoid
upsetting the dc bias and the output is normally
capacitively coupled to eliminate the dc voltage across
the load. Note that when the output is capacitively
coupled to the load, the value of Isink becomes a
limitation with respect to the load driving capabilities of
the device is direct coupled. In this configuration, the ac
gain is determined by the ratio of Rf to Ri, in the same
manner as for a conventional operational amplifier:

The lower corner frequency is determined by the
coupling capacitors to the input and load resistors. The
upper corner frequency will usually be determined by
the amplifier internal compensation. The amplifier unity
gain bandwidth is typically be 400 kHz with 20 dB of
closed-loop gain or 40 kHz with 40 dB of closed-loop
gain. The exception to this occurs at low gains where the
input resistor selected is large. The pole formed by the
amplifier input capacitance, stray capacitance and the
input resistor may occur before the closed-loop gain
intercepts the open-loop response curve. The inverting
input capacity is typically 3.0 pF.

£!t

AV= Ri

Figure 14. Inverting Amplifier with
Arbitrary Reference

Figure 15. Inverting Amplifier with
AV 100 and Vr Vee

=

=

510k

Rf

Vcc

+15V

O.lJlF
Vin -.:; 1--'VVI~*--{)---1
5.1k

1.0M

fL = 300 Hz, fH = 50 kHz
Av= 100

Vr
'Select for low frequency response.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-149

MC3301, MC3401, LM2900, LM3900
B. Noninverting Amplifier
These devices may be used in the noninverting mode
(see Figure 13). The amplifier gain in this configuration
is subject to the current mirror gain. In addition, the
resistance of the input diode must be included in the
value of the input resistor. This resistance is
approximately

AV

(Rf)(Ai}
26
Ri+--lin +(mA)

The bandwidth of the noninverting configuration for a
given Rf value is essentially independent of the gain
chosen. For Rf = 51 0 kn the bandwidth will be in excess
of 200 kHz for noninverting of 1, 10, or 100. This is a
result of the loop gain remaining constant for these
gains since the the input resistor is effectively isolated
from the feedback loop.

~

n, where lin +is input current in
lin +
milliamperes. The noninverting AC gain expression is
given by:

Figure 16. Tachometer Circuit

VCC=+t2V
Magnetic Pickup
Hysterisis Amplifier

Monostable Multivibrator

Pulse Averaging
Ct

+ ____---.~_____________,

r -......'VtOvOkv-----1>--_ _ _ _--1>_ _ _ _ _

MSD6too
orequiv

6.tV

Power
Supply
(nonregulated)

O.tflF

Rt

tOOk

tOOk
4.7k

Output
Ct

O.OtflF
tOk
Hystensis Vollage for SWITching
Ai R2
VH= R1 (VCC-1.6)

liming Interval: t = 0.7 Rt Ct

Figure 18. Logic "OR" Gate

150k
+VCC=+15Vdc .---'l/Vv---Q-j
75k

+Vcc

R2

A

75k

B
75k

C

Vo = VZt+0.6 (t

R2

+R1 )-

(Vo -0.6). Ai. t

RyCt

Figure 17. Voltage Regulator

Zl

Vp_p '"

VBE at

Note: For positive TC zeners R2 and Rt can be
selected to give TC output.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-150

MC3301, MC3401, LM2900, LM3900
Figure 19. Logic "NAND" Gate (Large Fan-In)

Figure 20. Logic "NOR" Gate

+Vee = +15Vdc
A

A --fojl-..,

B ---i---0-'-" Vo
Reset Set

Figure 23. Positive-Edge Differentiator

Figure 24. Negative-Edge Differentiator

output Rise Tune = 0.22 ms
Input Change TIme Constant =1.0 ms

O.OOIIlF

lOOk
lOOk

'>-0-.......... Vo

>-O-+-"Vo
Vee = +15Vdc
VO(dc) = 7.0 Vdc
Output Rise TIme = 0.22 ms
Input Change TIme Constanl = 1.0 ms

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-151

MC3301, MC3401, LM2900, LM3900
Figure 25. Amplifier and Driver for a 50 Q Line
510k
+15V

Vin

2N4401

51k
e--1 f--'V\IV------l
O.IIlF
+

10
lN914
orequiv

1.2M

10

lN914
orequiv

AV=10
Vo = 6.0 V(pop)

·r"
20llF

2N4~3

50

or eqUiv

5.6k
+15V

Figure 26. Basic Bandpass and Notch Filter
R
_ - - ' V vRl
' v -_ _

C

BP

TBP = Center Frequency Gain
TN = Passband Notch Gain

1
wo= RC
Rl =QR
R2= !!L
TBP
R3=TNR2

Figure 27. Bandpass and Notch Filter
62k
0.0051lF
0.0051lF

lOOk

300k
6
4

Amp 1

8
lOOk

62k

9

BP

VCC (Pin 14) =+12V
Ground - Pin 7
Center Frequency 500 Hz
Q=5
Bandpass Gain = 1

300k
300k

T

OlIlF
.

Vin

11
10

300k
300k
VCC

12

Amp 4

Notch

Bandpass Output.... Pin 4
Notch Output Pin 10

+

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA
2-152

MC3301, MC3401, LM2900, LM3900
Figure 28. Voltage Regulator
I

lN3824
4.3V Vz or equiv
Vo = Vz +0.6 Vdc
NOTES: 1. R is used to bias the zener.
2. If the zener TC is positive. and equal in
magnitude to the negative TC of the input
to the operational amplifier (=2.0 mVI"C).
the output is zero·TC. A 7.0 V zener
will give approximately zero-TC.

VCC

10

R

orequiv

Vo
5.0Vat4.0A

Figure 29. Zero Crossing Detector
VCC=+15V

tOM
510k
Magnetic
Pickup 510k

1.0M
Input

510k

C\

=>

C\

V

n

OV

Output
510k

___"""V"~

Output

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA
2-153

OV

IJI

MC3403
MC3503
MC3303

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Quad Low Power
Operational Amplifiers
The MC3S03 is a low cost, quad operational amplifier with true differential
inputs. The device has electrical characteristics similar to the popular
MC1741. However, the MC3S03 has several distinct advantages over standard
operational amplifier types in single supply applications. The quad amplifier
can operate at supply voltages as low as 3.0 V or as high as 36 V with quiescent
currents about one third of those associated with the MC1741 (on a per
amplifier basis). The common mode input range includes the negative supply,
thereby eliminating the necessity for external biasing components in many
applications. The output voltage range also includes the negative power
supply voltage.
'
•
•
•
•
•
•
•
•
•
•
•

SILICON MONOLITH
INTEGRATED CIRCUIT

~

1:~~

Short Circuit Protected Outputs
Class AB Output Stage for Minimal Crossover Distortion
True Differential Input Stage
Single Supply Operation: 3.0 V to 36 V
Split Supply Operation: ±1.S V to ±18 V
Low Input Bias Currents: SOO nA Max
Four Amplifiers Per Package
Internally Compensated
Similar Performance to Popular MC1741
Industry Standard Pinouts
ESD Diodes Added for Increased Ruggedness

Single Supply

QUAD DIFFERENTIAL
INPUT
OPERATIONAL AMPLIFIERS

LSUFFIX
CERAMIC PACKAGE
CASE 632

1

DSUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)

PSUFFIX
PLASTIC PACKAGE
CASE 646
(MC3403 and MC3303 Only)

Split Supplies

3.0V to 36V II

.:.t:::=N:~

PIN CONNECTIONS
Out 4

Out I

Inputs 1 {

2

Vee
MAXIMUM RATINGS
Rating

Symbol

Power Supply Voltages
Single Supply
Split Supplies

Value

Unit

VCC
VCC,VEE

36
±18

5

Out3

Input Differential Voltage Range (Note I)

VIDR

±36

Vdc

Input Common Mode Voltage Range (Notes I , 2)

VICR

±18

Vdc

Storage Temperature Range
Ceramic Package
Plastic Package

Tstg

Operating Ambient Temperature Range
MC3303
MC3403
MC3503

TA

Junction Temperature
Ceramic Package
Plastic Package

TJ

NOTES:

Inputs 2 {

Vdc

°c
-65 to +150
-55 to +125

o to +70

°c

-40 to +85
-55 to +125
°c
175
150

1, Split power supplies,
2, For supply voltages less than ±18V, the absolute maximum input voltage is equal to
the supply voltage,

(Top View)

ORDERING INFORMATION
Device

Package

MC3303D
MC3303L
MC3303P

-40° to +85°C

SO-14
Ceramic DIP
Plastic DIP

MC3403D
MC3403L
MC3403P

0° to +70°C

SO-14
Ceramic DIP
Plastic DIP

MC3503L

-55° to +125°C

Ceramic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-154

Temperature Range

MC3403, MC3503, MC3303
ELECTRICAL CHARACTERISTICS

(VCC ~ +15 V, VEE ~ -15 V for MC3503, MC3403; VCC ~ +14 V, VEE ~ Gnd for MCC3303
TA ~ 25°C, unless otherwise noted.)
MC3503

Characteristics
Input Offset Voltage
TA = Thi h taTlaw (Na'.')
Input Offset Current
TA '" Thi htoTlow

Large Signal Open-Loop Voltage Gain

~~ : ±j~~ ~~~a~O kil

Symbol

Min

Max

Typ

Max

Min

Typ

Max

Unit

2.0

10
12

-

2.0

8.0
10

mV

30

-

75
250

nA

-

20
15

200

-

-200

500
-1000

-

2.0

5.0
6.0

110

-

30

50
200

-

30

-

-

50
200

50
25

200

-

20
15

200

-

-

500
-1500

-200

-500
-800

AVOL

-

Input Bias Current
TA '" Thiah to Tlow

liB

-

-200
-300

za

-

75

zi

0.3

1.0

±12

±13.5
±13

1=20Hz

Output Voltage Range
RL=10kil
RL = 2.0 kil
RL=2.0kn, TA '" Thi htoTlow
Input Cammon Mode Voltage Range

Min
-

Via

Output Impedance
Input Impedance
1=20Hz

MC3303

MC3403

Typ

Vo

±10

-

±10
VICR

Common Mode Rejection
RS<10kn
Power Supply Current (Va _ 0)
RL=Individual Output Short-Circuit Current (2)

CMR
ICC,IEE

Positive Power Supply Rejection Ratio

PSRR+

ISC

-

-

-

-

-

-

+13V
-VEE
70

+13.5V
-VEE
90
2.8

4.0

±10

±30

±45

-

30

150

1.0

±12
±10

±13.5
±13

±10

-

-

-

VlmV

nA
n

0.3

1.0

Mn

±12

±12.5
±12

-

+12V
-VEE
70

+12.5V
-VEE
90

-

±10

-

-

75

75
0.3

-

±10

-

V

-

V

+13V
-VEE
70

+13V
-VEE
90

2.8

7.0

2.8

7.0

±10

±20

±45

±10

±30

±45

mA

30

150

-

30

150

~VN

30

150

-

dB
mA

~VN

Negative Power Supply Rejection Ratio

PSRR

30

150

30

150

Average Temperature Coefficient of Input
Offset Current

~llo'~T

-

50

-

-

50

-

-

50

pAi'C

~Vlo'~T

-

10

-

-

10

-

-

10

~V/'C

BWp

-

9.0

-

-

9.0

-

9.0

kHz

1.0

MHz

TA

= Thigh to Tlow

Average Temperature Coefficient of Input
Offset Voltage
TA = T hi~h to Tlaw
Power Bandwidth

Av = 1, RL = 10 kil, Vo = 20 V(p,p),
THD=5%
Small-Signal Bandwidth

AV = 1, RL = 10kil, Vo =50 mV
Slew Rate
AV= 1, Vi =-10 Vto+10 V
Rise lime

Av= 1, RL = 10kil, VO=50mV
Fall lime

AV= 1, RL = 10kil, VO=50mV
Overshoot

BW

1.0

1.0

SR

-

0.6

-

0.6

0.6

V/JlS

IrLH

-

0.35

-

-

0.35

-

-

0.35

JlS

IrLH

-

0.35

-

-

0.35

-

-

0.35

OS

-

20

-

-

20

-

-

20

-

%

$m

-

60

-

-

60

-

-

60

-

Degrees

JlS

Av = " RL = 10kil, Vo =50 mV
Phase Margin

Av = 1, RL =2.0 kil, Vo = 200 pF
1.0

Crossover Distortion

1.0

1.0

%

(Vin = 30 mVp-p,Vaut= 2.0 Vp·p,
1=10kHz)
NOTE:

1.

Thigh = 125'C lor MC3503, 70'C for MC3403, 85'C lor MC3303
Tlaw = -55'C lor MC3503, O'C lor MC3403, -40'C lor MC3303

ELECTRICAL CHARACTERISTICS (VCC ~ 5.0 V, VEE ~ Gnd, TA ~ 25°C, unless otherwise noted.)
Symbol

Input Offset Voltage

VIO

Input Offset Current

110

Input Bias Current
Large Signal Open-Loop Voltage Gain

Min

MC3303

MC3403

MC3503
Characteristics

Typ

Max

2.0

5.0

30

50

liB

-

-200

-500

AVOL

10

200

PSRR

-

-

3.3
VCC-2.0

VCC-1.7

-

2.5

Min

Typ

Max

Max

Unit

2.0

10

10

mV

75

nA

-

30

50

-200

-500

10

200

Min

Typ

-

-

10

200

-500

nA
V/mV

RL =2.0kil
Power Supply Rejection Ratio

Oulput Voltage Range (3)
RL = 10kn VCC =5.0V
RL = 10 kn 5.0 S VCC S 30 V

VOR

Power Supply Current

ICC
CS

Channel Separation

3.5

150

-

-

3.3
VCC-2.0

-

4.0

-

3.5
VCC-1.7
2.5

-

-

7.0

120

120

1= 1.0 kHz to 20 kHz
(Input Referenced)
NOTES:

2.
3.

Not to exceed maximum package power dissipation.
Output will swing to ground with a 10 kO: pull down resistor.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-155

150

150
3.3
VCC-2.0

-

3.5
VCC-1.7

2.5
120

7.0

~VN

Vp·p

mA
dB

III

MC3403, MC3503, MC3303
Representative Circuit Schematic

Bias Circuitry
Common to Four

(1/4 of Circuit Shown)

III

r---------~----------~--~~----~----~~H+H+~~VCC

Inputs

VEE (Gnd)

CIRCUIT DESCRIPTION
Inverter Pulse Response

20IlS/DIV

The MC3503/3403/3303 is made using four internally
compensated, two-stage operational amplifiers. The first
stage of each consists of differential input device 024 and 022
with input buffer transistors 025 and 021 and the differential

to single ended converter 03 and 04. The first stage performs
not only the first stage gain function but also performs the level
shifting and transconductance reduction functions. By
reducing the transconductance a smaller compensation
capacitor (only 5.0 pF) can be employed, thus saving chip
area. The transconductance reduction is accomplished by
splitting the collectors of 024 an 022. Another feature of this
input stage is that the input common mode range can include
the negative supply or ground, in single supply operation,
without saturating either the input devices or the differential to
single-ended converter. The second stage consists of a
standard current source load amplifierstage.
The output stage is unique because it allows the output to
swing to ground in single supply operation and yet does not
exhibit any crossover distortion in split supply operation. This
is possible because Class AB operation is utilized.
Each amplifier is biased from an internal voltage regulator
which has a low temperature coefficient thus giving each
amplifier good temperature characte,ristics as well as
excellent power supply rejection.

Figure 1. Sine Wave Response

Figure 2. Open-Loop Frequency Response
, ,
VCC=15V
VEE=-15V
TA = 25°C

120

.... r--.

..... r-,
.........
.....i'o

r--.r-,
1

j '

j

•

t

*Note Class A B output stage
roduces distortion less smewa~

I

-20

50 IlS/DIV

1.0

10

100
1.Ok
10k
f, FREQUENCY (Hz)

MOTOROLA LlNEARIiNTERFACE ICs DEVICE DATA
2-156

lOOk

1.0M

MC3403, MC3503, MC3303
Figure 3. Power Bandwidth
30

I

25

w

20

~

I IIIIII

\

C!:I

E3
0
>
....
::>
"....
::>
0

Figure 4. Output Swing versus Supply Voltage

15
10

I

I I I III

~

~+

\

-15V

I

w

~VO

C!:I

z

~

-= 10k

w

-?

E3
0

TA=25°C

>
....
::>
"....
::>

1---","

10

/

10k
lOOk
I, FREQUENCY (Hz)

1.0M

"

10

12

L

o

2.0

4.0

6.0

8.0

14

16

18

20

18

20

VCC AND (VEEl, POWER SUPPLY VOLTAGES M

Figure 6. Input Bias Current
versus Supply Voltage

I.!.

Vee = 15V VEE=-15V _
TA = 25°C

300

~
....
z
w

<"
.s.
170

....
z

.......

w

a::
a:: 200
::>

-

-r-.

t)

~

"-

V

/'

./

o

Figure 5. Input Bias Current
versus Temperature

'"~

-

V

0

-?

-5.0
1.0 k

20

C!:I

I"r--.

5.0

TA = 25°C

30

~

100

.....

a::
a::

::>

"

t}

r-

'".....

:$

'"::>

160

"-

;!!;

;!!;

:P.

!!!

-75 -55

-35

-15

5.0

25

65

45

85

105 125

T, TEMPERATURE (OC)

150

o

2.0

4.0

6.0

8.0

10

12

14

16

Vce AND (VEE), POWER SUPPLY VOLTAGES M

Figure 7. Voltage Reference

Figure 8. Wien Bridge Oscillator

VCC

50k

10k
R2
10k
Vrel _--'VVv---o-l

Va

10k
Rl

Va
1
fo= 211RC
Rl
Va = Rl +R2

For:

1
Vo="2 VCC

R

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-157

fo = 1.0 kHz
R = 16kn
e=O.OII1F

MC3403, MC3503, MC3303
Figure 9. High Impedance Differential Amplifier

~R

el

C

Figure 10. Comparator with Hysteresis
Hyslerisls

R2

R

VOHL£}-

Rl
Vref ...-vv\r+-Q---j

I
I

Vo
Vo

Vin----Q---j

VOL
VinL I VinH

Rl
VinL = Rl +R2 (VOL -Vrel) +Vref

~R

Vref

C

Rl
VinH = Rl +R2 (VOH -Vrel) +Vref

e2

R

Rl

eo = C (1 +a +b) (e2-el)

Vh = Rl +R2 (VOH -YOU

Figure 11. BI-Quad Filter
1
10= 2ltRC

R

R

lOOk
Rl =QR
Rl
R2= TBP

lOOk

R3=TNR2
Cl =10C
Vref
Rl

Bandpass
Output

1
Vref=2VCC
R=160kD
C=O.ool I1F
Rl=1.6Mn
R2=1.6Mn
R3=1.6Mn

R3

R2

Cl
>ct4-----1
For. 10 = 1.0 kHz
Q =10
TBP =1
TN = 1

Where:

E--------e Notch Output

TBP = center frequency gain
TN = passband notch gain
Vre!

Figure 12. Function Generator

Figure 13. Multiple Feedback Bandpass Filter

R2

j.
l

Yin

300k
R3
Square Wave
Output

VCC

Cc

Co
>-C>-+---l

CO=10C

R2

1
Vref="2 VCC

Vrel
Given:

RI
Rl +RC
1= 4CRIRI

E-evo

R2Rl
ii, R3= R2+Rl

10 = center frequency
A(lo) = gain at center Irequency

Choose value 10' C
Q

Then:

R3= ItloC

R3
Rl = 2A(lol

Rl R5
R2 = 4Q2 Rl -R5

00 10
For less 1han 10% error lrom operational amplifier """""BW" < 0.1
where, 10 and BW are expressed in Hz.
II source impedance varies, filter may be preceded with
voltage lollower buller to stabilize fiRer parameters.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-158

MC3405
MC3505

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

I

Dual Operational Amplifier
and Dual Comparator

DUAL
OPERATIONAL AMPLIFIER/
DUAL VOLTAGE COMPARATOR

The MC340S/3S0S contains two differential-input operational amplifiers and
two comparators, each set capable of single supply operation. This operational
amplifier-comparator circuit fulfills its applications as a general purpose product
for automotive and consumer circuits as well as an industrial building block.
The MC340S is specified over the commercial operating temperature range of
0° to +70°C, while the MC3S0S is specified over the military operating range of
-Sso to + 12SoC.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

• Operational Amplifiers Equivalent in Performance to MC3403/3S03
• Comparators Similar in Performance to LM339/139
• Single Supply Operation: 3.0 V to 36 V
LSUFFIX

• Split Supply Operation: ±1.S V to ±18 V

CERAMIC PACKAGE
CASE 632

• Low Supply Current Drain
• Operational Amplifiers are Internally Frequency Compensated
• Comparators TTL and CMOS Compatible

PSUFFIX
PLASTIC PACKAGE
CASE 646

PIN CONNECTIONS

Out I

1

Inputs I {

2

11

Single Supply
3.0V to 36V

Split Supplies

II

10 }

Inputs 2 {
Out2

~:=N:~

VEE/Gnd

Inputs 3
7

(Top View)

ORDERING INFORMATION
Device

Temperature Range

Package

MC3405L

0° to+70°C

Ceramic DIP

MC3405P

0° to +70°C

Plastic DIP

MC3505L

-5So to + 125°C

Ceramic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-159

III

MC3405, MC3505
OPERATIONAL AMPLIFIER SECTION
MAXIMUM RATINGS
Power Supply Voltage -

Rating
Single Supply
Split Supplies

Symbol

Value

VCC
VCC, VEE

36
±18

VIDR
VICR
TA

±36
±18

Input Differential Voltage Range
Input Common Mode Voltage Range
Operating Ambient Temperature Range Storage Temperature Range -

MC3505
MC3405

Ceramic Package
Plastic Package

Operating Junction Temperature Range -

-55 to +125
oto +70

Unit
Vdc
Vdc
Vdc
DC

Tstg

--£5 to +150
-55 to +125

DC

TJ

175
150

DC

Ceramic Package
Plastic Package

ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = Gnd, TA = 25DC, unless otherwise noted.)
Characteristics

Symbol

Input Offset Voltage
Input Offset Current
Input Bias Current

VIO
110
liB

Lar~e-Signal,Open-LooP Voltage Gain

RL= 2.0 kQ)

AVOL

Power Supply Rejection

PSR

out3ut VOlta~e Range (Note 1)
RL=10 Q,V~~=5.0V)
(RL=10kQ,5.
" VCC" 30 V)
Power Supply Current (Notes 2 and 3)

VOR

Channel Se~aration
f = 1.0 k z to 20 kHz
(Input Referenced)

MC3505
Typ
2.0
30
-200

Min

-

-

Max
5.0
50
-500

Min

-

MC3405
Typ
2.0
30
-200
200

20

200

-

20

-

-

150

-

-

3.3
VCC-2.0

3.5
VCC-l.7
2.5
-120

3.3
VCC-2.0

ICC

-

-

-

-

3.5
VCC-l.7
2.5
-120

4.0

-

-

-

Max
10
50
-500

150

7.0

-

Unit
mV
nA
nA
V/mV
JlVN
Vp_p

mA
dB

ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25 DC, unless otherwise noted.)
Input Offset VOlt~e
(TA = Tlow + high){Note 4)
Average Temperature Coefficient of
Input Offset Voltage

VIO
~VIOiL\T

Input Offset Current
(TA = Tlow to Thigh) (Note 4)
Input Bias Current
(TA = Tlow to Thigh) (Note 4)

-

liB

-

VICR

Larfe Signal, ~en-LooP Voltage Gain
VO=±10 ,~=2.0kQ)
(TA = Tlow to high) (Note 4)
Common Mode Rejection
Power Supply Rejection Ratio

AVOL

Phase Margin
Small-Signal Bandwidth
(AV = I, RL = 10 kQ, Vo = 50 mY)
Power Bandwidth
{At¥! = I, Ry = 2.0 kQ, Vo = 20 Vp _p,
T D=5%
Rise TIme/Fail TIme
Overshoot (AV = 1, RL = 10 kQ,
VO=50 mY)
Slew Rate
NOTES:

CMR
PSRR

2.0

-

5.0
6.0

15

-

-

-

50
200

-200
-300

-500
-1500

-

-

-

110

Input Common Mode Voltage Range

out3ut VOlta~e
RL= 10 Q)
(RL= 2.0 kQ)
!RL = 2.0 kQ, TA = Tlow to Thigh)
Note 4)
Output Short Circuit Current
Power Supply Current (Notes 2 and 3)

-

-

+13-VEE

--

2.0

-

10
12

15

-

-

-

50
200

nA

-200

-500
-SOO

nA

-

+13-VEE

-

20
15

200
100

--

70

90
30

-

70

150

-

90
30

150

-

±12
±IO
±IO

±13.5
±13

±IO

±20
2.8
60
1.0

±13.5
±13

ISC
ICC, lEE
m
BW

±IO

45
4.0

-

±30
2.8
60
1.0

-

-

BWp

-

9.0

-

-

trLH, trHL
OS

-

0.35

-

-

20

-

SR

-

2.
3.

Not to exceed maximum package power dissipation.
For Operational Amplifier and Comparator.

Vdc
V/mV

-

-

-

-

-

0.6
4.

Tlow

=
=

-

-55°C for MC3505
O°C for MC3405

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-160

-

JlV/DC

-

200
100

±12
±10
±IO

Output will swmg to groung.

-

50
25

Vo

1.

-

mV

-

--

dB
JlVN
Vdc

-

mA
mA
Degrees
MHz

9.0

-

kHz

0.35
20

-

JlS
%

0.6

-

V/JlS

45
7.0

MC3405, MC3505
COMPARATOR SECTION
MAXIMUM RATINGS

I

Symbol

Value

Unit

VCC
VCC,VEE

36
±18

Vdc

Rating
Power Supply Voltage -

Single Supply
Split Supplies

Input Differential Voltage Range

VIDR

±36

Vdc

Input Common Mode Voltage Range

VICR

-0.3 to +36

Vdc

ISink

20

mA

TA

-55 to +125
a to +70

°C

Tstg

-65 to +150
-55 to +125

°C

TJ

175
150

°C

Sink Current
Operating Ambient Temperature Range Storage Temperature Range -

MC3505
MC3405

Ceramic Package
Plastic Package

Operating Junction Temperature Range -

Ceramic Package
Plastic Package

III

ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = Gnd, TA = 25°C, unless otherwise noted.)
MC34D5

MC35D5
Min

Typ

Max

Min

Typ

Max

Unit

VIO

-

2.0

-

2.0

-

10
12

mV

-

5.0
9.0

t.VIOlt.T

-

15

-

15

-

Input Offset Current
(TA = Tlow to Thigh) (Note 1)

110

-

50

75
150

50

100
200

nA

-

Input Bias Current
(TA = Tlow to Thigh) (Note 1)

liB

-

-500
-800

nA

VCC-l.7
VCC-2.0

Vp-p

Characteristics

Symbol

Input Offset Voltage
(TA = Tlow to Thigh) (Notes 1 and 2)
Average Temperature Coefficient of
Input Offset Voltage

Input Common Mode Voltage Range
(TA = Tlow to Thigh) (Note 1)

VICR

a
a

-125

VCC-l.5
VCC-1.7

-500
-1500
VCC-l.?
VCC-2.0

-

a
a

-125

VCC-l.5
VCC-l.7

IlV/oC

VID

-

-

36

-

-

36

V

Large-Signal, Open-Loop Voltage Gain
(RL= 15kn)

AVOL

-

200

-

-

200

-

V/mV

Output Sink Current
(-Vin ~ 1.0 Vdc, +Vin= 0,
VO"I.5V)

ISink

6.0

16

-

6.0

16

-

mA

Low Level Output Voltaqe
(+Vin= a V, -Vin= 1.0 V, ISink = 4.0 mAl
(TA = Tlow to Thigh) (Note 1)

VOL

Output leakage Current
(+Vin ~ 1.0 Vdc, -Vin= 0, Vo = 5.0 Vdc)
(TA = Tlow to Thigh) (Note 1)

IOl

large-Signal Response

-

Input Differential Voltage
(All Vin ~ a Vdc)

Response Time (Note 3)
(VRl = 5.0 Vdc, RL = 5.1 kn)

-

350

-

500
700

-

350

-

500
700

-

-

0.1
0.1

1.0
1.0

0.1
0.1

1.0
1.0

300
1.3

-

300

-

-

-

1.3

NOTES: 1. Tlow = -55°C for MC3505
Thigh = + 125°C for MC3505
= DoC for MC3405
= +70°C for MC3405
2. Vo '" 1.4 V, RS = a n with VCC from 5.0 Vdc to 30 Vdc, and over the input common mode range a to VCC -1.7 V.
3. The response time specified is for a 100 mV input step with 5.0 mV overdrive. For larger signals 300 ns is typical.

MOTOROLA LINEAR/INTERFACE les DEVICE DATA

2-161

!lA
!lA
ns
Ils

Circuit Schematic
(1/2 of Circuit Shown)

,

,

,

VCC
04

s:
0

0:II
0

~I
Z
r

9,13

:s::

oW

m

»

~

~
~

0>
I\:>

~I

I

.1:10

o

5.0pF

y.

m

:II

:s::

~

0

m

o
w

(5

o

U1

(J)

U1

CJ

m

<

(5

m
CJ

~
»
Operational Amplifier Side

700

2.0k
. •
Bias circuHry
Common to All
OpAmps .
and Comparators

•

••
Comparator Side

• • • 011
VEE/Gnd

MC3405, MC3505
OPERATIONAL AMPLIFIER SECTION

Figure 1. Sine Wave Response

iD 100

, ,
VCC=15V
VEE=-15V
TA=25°C

.........

::?
..... ;;!!;

:12Cli

80

~!'3
~!$
a..
~g
~i5

60

Slw
(fJ(!)

~

c

:>
E

a..

::il

0

+,

I

I

r-- ......

.... ~

40

..........

20

.... ~

0

•

*Note Class A B output stage
produces distortion less smeVlave

1

-20

1.0

100
1.0 k
10 k
f, FREQUENCY (Hz)

10

5011S/DIV

Figure 3. Power Bandwidth
30

~

a.

C!.
w

20

\

(!)

13

!$

I-

15

::>

10

::>
0

5.0

t=

-9

~+

\
I"\~

0
-5.0
loOk

-15V

TA=25°C

c: 30
a.
C!.
w

Va

/

(!)

~w

-= 10k

10'

20

~

(!)

130
>

-

TA = 25°C

100M

lOOk

Figure 4. Output Swing versus Supply Voltage
I

c: 25

•

Figure 2. Open-Loop Frequency Response
120

I-

::>

a..

1/

10

/

I-

::>
0

-9

10 k
100 k
f, FREQUENCY (Hz)

1.0M

V

/'

'"

0

2.0

4.0

6.0

8.0

10

12

14

16

18

20

18

20

VCC AND IVEEI, POWER SUPPLY VOLTAGES M

Figure 5. Input Bias Current
versus Temperature

Figure 6. Input Bias Current
versus Supply Voltage
II.

VCC=15V VEE=-15V
TA = 25°C
-

300

~

!z
w

---""-

a:
a: 200

::>

(.)

~

I-

~
!z
w
a:
a:

-

G
~

r--

::>

a.. 100

-

170

'"

5

.....
"'

160

a..

;;!!;

~

e3

!!!

-75 -55

-35

-15

5.0

25

45

65

85

105

125

150

o

2.0

4.0

6.0

8.0

10

12

14

16

VCC AND iVEEI, POWER SUPPLY VOLTAGES M

T, TEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-163

1

MC3405, MC3505
COMPARATOR SECTION
Figure 8. Input Bias Current

Figure 7. Normalized Input Offset Voltage
1.40

!!je..> 1.20
~~

200
VCC=+15V
VEE = Gnd

-

V"

§2~ 1.00
/"

!iiI:>

~~
u.:::J

-

-

,-


e..>

~

V

0:1i 0.80
5a:
,,-0
;!!;z
0.60

5'"
"-

V

,

0.40
-60

L

;!!;

-20 0
20 40
60 80
TA. AMBIENT TEMPERAlURE (DC)

100

TA=-55DC _

--

f- l- I-"

120

Figure 9. Normalized Input Offset Current

i I I

2.0

6.0

10
14
18
22
VCC. POSITIVE SUPPLY VOLTAGE M

1

ff~

5~
,,-0

.........

" .......

;!!;z

0.60

Slope Can Be Enher Polarity.

0.20
-60

-40

-20

a: 5.0
a:
=>
e..> 4.0

VCC=+15V
VEE=Gnd

.......

r-

'"z

en
....
=>
~
0

-

0
20
40
60
80 100
TA. AMBIENT TEMPERATURE (DC)

120

26

30

/ ~ ,/
//
V

'L
/
//

3.0
2.0

./

/.
'/ L
./

if I'

TA = +125 DC

./

h

VCC=+15V VEE = Gnd -

I//V

~ 1.0

./

.!!'

140

__ TA = +25DC

1
.1
TA =-55°C

!z
w

u.:::J
0 < 1.00

VEE = Gnd

Figure 10. Output Sink Current versus Output Voltage

I'...
.......

-

TA=+125 DC

1 6.0
......

-

~~

TA=+25 DC

7.0

§2~ 1.40
!iiI:>

I-

80

40

120 140

2.20

!!je..> 1.80
!:3~

- -

ei

Slope Can Be Enher Polarity.
-40

I I

160

o

o

",' 200

400
600
VOL. OUTPUT VOLTAGE (mV)

800

1000

Figure 11. Pulse Width Modulator Schematic and Waveforms

5.0k

~~ircroth
-I ! ! I I I I 1~e
VEE
v

':,
,
mM,(b) Triangle .Wave and Control Voltage ~.

t

VTH

:

-

"

___

Vc

VTL Lf--+-,--t--+--t---'---t-',

VSW
5.0k
VEE

V u1

~2

VTL =

~

VS(l + R2JR1) + VEE
'

I I

,

(c)

"

O~put P~lses

v~ILJUJ

R
VTH =

,

VEE

Vs =VCC - VEE

Pulse WicHh = (

VS(l - R2JR1) + VEE
2
Rl
Oscillator Frequency f = - 4RjCR2

I

I

-

lime

+) (v~~-_V~~L)

Duty Cycle in % = ( VVc - VVTL ) (100)
TH- TL

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-164

lime

when: VTL < Vc < VTH

MC3405, MC3505
Figure 12. Window Comparator

3k

14

10k
VCC

vO

10k
VcAdjust

Figure 13. Squelch Circuit for AM or FM
VCC
14
C4

R3

High Pass Filter

VCC

lOOk

High Pass Filter
Given: Ao, Q, roo = 21110

RI

Choose: C = Cl = C2, a convenient value
Calculate:

Squelch
Threshold Adj

R2 =---.!L (2Ao + 1)

VA'

moC

C3=

~
Ao

Rl =

I

R3C4> 5 Tin
Where: Tin is the period 01 Vin
Q = Quality Factor
Ao = High Frequency Gain
roo = Break Frequency

Ao
QrooC(2Ao + 1)

Switched Audio Stage

Gain 01 Audio Stage
RI
ACI=

Ai

Figure 14. High/Low Limit Alarm
VCC

10k

10k
R4
Oscillator

10k
R5

'~lcL
o

I

I

VIL

VIH

Vi

R3
VIL = VCC Rl + R2 + R3
2.0k

8

>--0--'"

VQ.Jl.....JL

R2+ R3
VIH = VCC Rl + R2 + R3
Oscillator

2.0k

IIR4=R5=R6
1= O.72/RIC

Vc
Hi/Low
Umn Detector

As shown, I = 2.2 kHz
Vo will oscillate il VIH < Vj, or VIL > Vi
Vo will be low il VIL < Vi < VIH

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-165

MC3405, MC3505
Figure 15. Zero Crossing Detector with Temperature Sensor
Vee
Zero Crossing Detector

R4+R5 )
Vt=(VSEoIQ1) ( ~

Vo
1.0M

13>

10k
10k

VEE

2VSE
R5

Rl and R2 control the switching voltage
01 the zero crossing detector
Rl +R2

+vs_~±VS=±VD
R2

-Is =
Temperature Sensor

Vo I
TA12mV
TA = 0° 10 70°C
DATABIT#2
-12mVsVID
s+12mV
DATABIT#1

TA = D° 10 70°C
VIO s-12 mV
TA = 0° 10 70°C

Only four devices are required for a
4k word by 4-bit memory system.

SIrobe
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H

llUtput
H

Z
Off
Off
I

Z
I
Off
L

Z
On
Off
H

Z
Off
Off
I

Z
I
Off
L

Z
On
Off

Device

MC343D
MC3432
MC343D
MC3432
MC3430
MC3432
MC3431
MC3433
MC3431
MC3433
MC3431
MC3433

L = Low Logic Slate
Z = Third (High Impedance)
H '" High Logic State
I "" Indeterminate State
RS<200n

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-167

MC3430 thru MC3433
MAXIMUM RATINGS (TA = 0° to +70°C, unless otherwise noted.)
Symbol

Value

VCC,VEE

±7.0

Vdc

Differential Mode Input Signal Voltage Range

VIDR

±6.0

Vdc

Common Mode Input Voltage Range

VICR

±5.0

Vdc

Strobe Input Voltage

VieS)

5.5

Vdc

Output Voltage (MC3432, MC3433)

Vo

±7.0

Vdc

Junction Temperature
Ceramic Package
Plastic Package

TJ

Rating
Power Supply Voltage

Unit

°C
175
150

Operating Temperature Range
Storage Temperature Range

TA

oto +70

°C

Tstg

-65 to +150

°C

RECOMMENDED OPERATING CONDITIONS (TA = 0° to +70°C, unless otherwise noted.)
Characteristics
Power Supply Voltages

Symbol

Min

Typ

Max

Unit

VCC
VEE

±4.75
-4.75

±5.0
-5.0

±5.25
-5.25

Vdc

-

16

rnA

Differential Mode Input Voltage Range

VIDR

-5.0

-

+5.0

Vdc

Common Mode Input Voltage Range

VICR

-3.0

Vdc

-5.0

-

+3.0

VIR

+3.0

Vdc

Output Load Current

-

10L

Input Voltage Range (any input to Ground)

ELECTRICAL CHARACTERISTICS (VCC = +5.0 Vdc, VEE =-5.0 Vdc, TA = 0° to +70°C, typical values are measured at TA = 25°C,
unless otherwise noted.)
MC3430, MC3431
Characteristics

Symbol

Input Sensitivity (See Discussion on Page 3)
(RS ~ 200 Q)
,.
(Common Mode Voltage Range = -3.0 V ~ Vin ~ 3.0 V)
4.75 ~ VCC ~ 5.25 V, TA = 25°C
MC3430, MC3432
-4.75 ~ VEE ~ -5.25 V, TA = 25°C
MC3431, MC3433
(Common Mode Voltage Range = -3.0 V ~ Vin ~ 3.0 V)
4.75 ~ VCC ~ 5.25 V, TA = 0° to 70°C
MC3430, MC3432
-4.75 ~ VEE ~ -5.25 V, TA = 0° to 70°C
MC3431, MC3433

VIS

Input Offset Voltage

VIO

(RS~200Q)

Input Bias Current
(VCC = 5.25 V, VEE = -5.25 V)

Typ

Max

MC3432, MC3433
Min

Typ

Max

Unit
mV

±6.0
±10

±S.O
±10

±7.0
±12

±7.0
±12

2.0

mV

2.0

IB
MC3430, MC3432
MC3431 , MC3433

Input Offset Current
Voltage Gain

20
20
1.0

1.0

IlA

AVOL

1200

VN

VIL(S)
VIH(S)

= 0.4 V)

Strobe Current (High State)
(VCC = 5.25 V, VEE =-5.25 V, Vin
(VCC = 5.25 V, VEE =-5.25 V, Vin

= 2.4 V)
= 5.25 V)

Output Voltage (High State)
(10 =-400 IlA, VCC =4.75 V, VEE

=-4.75 V)

=4.75 V)

Output Leakage Current
(VCC = 4.75 V, VEE =-4.75 V, Vo

= 5.25 V)

40
40

1200

Strobe Input Voltage (Low State)
Strobe Current (Low State)
(VCC = 5.25 V, VEE =-5.25 V, Vin

20
20

40
40

110

Strobe Input Voltage (High State)

Output Voltage (Low State)
(10 = 16 rnA, VCC = 4.75 V, VEE

Min

0.8

V
V

-1.6

-1.6

rnA

40
1.0

40
1.0

rnA

0.8
2.0

2.0

IIL(S)
IIH(S)

VOH

V

2.4

0.4

VOL

0.4

ISC

Output Disable Leakage Current
(VCC = 5.25 V, VEE = -5.25 V)

loff

High Logic Level Supply Currents
(VCC = 5.25 V, VEE = -5.25 V)

ICC
lEE

-18

-70

rnA

40
+45
-17

+60
-30

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-168

V

250

ICEX

Output Current Short Circuit
(VCC = 5.25 V, VEE = -5.25 V)

I!A

+45
-17

+60
-30

rnA
rnA

MC3430 thru MC3433
A UNIQUE FUNCTIONAL PARAMETER FOR COMPARATORS
A unique approach is used in specifying the MC3430 to
MC3433 quad comparators. Previously, comparators have
been specified as linear devices with common operational
amplifier type parameters such as voltage gain (AVOL), input
offset voltage (VIO), input offset current (110) and common
mode rejection (CMR). This is true despite the fact that most
comparators are seldom operated in their linear region
because it is difficult to hold a high gain comparator in this
narrow region. Comparators are normally used to "detect"
when an unknown voltage level exceeds a given
reference voltage.
The most desirable comparator parameter is what minimum
differential input voltage is required at the comparator's input
terminals to guarantee a given output logic state. This new and
important parameter has been called input sensitivity (VIS)
and is analogous to the input threshold voltage specification
on a core memory sense amplifier. The input sensitivity
specification includes the effects of voltage gain, input offset
voltage and input offset current and eliminates the need for
specifying these three parameters.
In order to make this parameter as inclusive as possible on
the MC3430 to MC3433 series quad comparators, the input
sensitivity is specified within the following conditions:
Commercial temperature range: 0° to 70°C
Power supply variations: ±5% (all conditions)
Input source resistance: ::; 200 Q
Common mode voltage range: -3.0 V to +3.0 V
Note: Typical values have been included on the omitted
parameters for applications where the offset voltages are
externally nulled.
Voltage gain is defined as the ratio of the resulting INO to
achange inthe VIDR using conditions at which the VIO and 110
are nulled. Thus, for worst case MTTL logic levels, the
required output voltage change is 2.0 V [VOH(min) -

VoL(max) = 2.4 V - 0.4 V]. If 2.0 mVare required at the input
terminals to induce this change in logic state, the voltage gain
would be 1000 VIV.
Gain, however, is not the only factor affecting the logic
transition. Normally, input offset voltages, that are not
externally nulled can add an appreciable error that drastically
overshadows the comparator gain. Therefore, the 2.0 mV for
example, required to cause the logic transition is often
masked. An input offset voltage of up to 7.5 mV might be
required to reach the linear region. A further consideration is
the input offset current of up to ±10 IlA flowing through the
matched 200 Q source resistors at the input terminals which
can create an additional error of ±2.0 mY. In order to determine
a worst case input sensitivity, it must be assumed that
minimum specified gain and maximum specified offset voltage
and current conditions exist. Also, it must be assumed that
these three factors are cumulative, requiring a worst case
input of:
Logic transition = 2.0 mV
VI0=7.5 mV
110 of ±1 0 IlA thru 200 Q resistor = 2.0 mV
Therefore, 2 +7.5 +2 = 11.5 mY.
The effects of power supply voltage variations, temperature
changes and common mode input voltage conditions have not
been considered, as they are not present in the gain and offset
specifications on most comparators.
Thus, the input sensitivity specification greatly reduces the
effort required in determining the worst case differential
voltage required by a given comparator type.
Table I compares the worst case input sensitivity of three
popular comparator types at both room temperature and over
the specified commercial temperature range (0° to 70°C). This
sensitivity was computed from the specified voltage gain,
offset voltage and offset current limits.

Table 1. Worst Case Comparisons
TA =

TA = 25'C

o· to 70'C

Error Voltage
Device

MC3430
MC3432
MC3431.
MC3433
MC1711C
LM311

110
RS=2000

Generated
Into

(~)

200 nSource

lYP

VIC
Required for
3.0 V Output
Chango

Max

Resistors

-

-

-

-

-

-

-

-

-

-

5.0
7.5

1500
200k

2.0mV
0.015 mV

15
6.0' •

3.0mV
0.0012 mV

VIO
(mV)
Max

AVOL'

VN

Error VoHage

Total
Sensitivity
(mY)

VIO
(mV)
Max

AVOL'

VN

lYP

~g~~

2.5

Iunce~inty I

g
!:;

2.0

~

o

~

Into

Total
Sensitivity
(mY)

-

-

-

-

7.0

10
10
7.516

-

-

-

-

-

12
13
10.04

5.0
10

1000
100 k

3.0mV
0.030 mV

25
70"

5.0mV
0.014mV

.. '10 measured In nA.

Figure 3. Guaranteed Output State versus
Input Voltage

Uncertainty
Region

3.0

w

~

Max

Generated
200 n Source
Resistors

6.0

Figure 2. Guaranteed Output State versus
Differential Input Voltage

2:

(~)

-

• Typical values given, as minimum gam not always specified.

3.5

110
RS=2000

VIC
Required for
3.0V Output
Change

~

++--fj--l--+

'"g
1:3

:~:1

MC3433
r-+--r~--~~~--r-+r-r~~

4.0

r---.,----.----.------.---r----,---~--___,

3.0

I---+__-+__-+__-

2.0

f-----+--t---t-

1.0

!:;
";;;

1.5

g -1.0 1---+---+----",,"'----+---.
!f- _2.0 I----j-....,.r'----t

1.0

-3.0 V < VICR < 3.0 V
O'C  VEE> -5.25 V
. R <2000
- 4.0 '----'----'----'----'----'----=="-----'
- 4.0
- 3.0
- 2.0
- 1.0
1.0
2.0
3.0
4.0

0.5
-35 -30 -25-20 -15 -10-5

0

5

10

15

20

25

30

35

Vin(A), INPUT VOLTAGE M

VID. DIFFERENTIAL INPUT VOLTAGE (mV)

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA

2-169

MC3430 thru MC3433
SWITCHING CHARACTERISTICS (VCC = +5.0 Vdc, VEE =-5.0 Vdc, TA = +25D C, unless otherwise noted.)
MC3430. MC3431
Symbol

Fig.

Min

Typ

Max

High to Low Logic Level Propagation Delay
Time (Differential Inputs) 5.0 mV +VIS

tPHL(D)

6,8-11

20

45

Low to High Logic Level Propagation Delay
Time (Differential Inputs) 5.0 mV +VIS

tPLH(D)

6,8-11

-

33

55

Open State to High Logic Level Propagation
Delay Time (Strobe)

tPZH(S)

4

-

35

High Logic Level to Open State Propagation
Delay Time (Strobe)

tpHZ(S)

Open State to Low Logic Level Propagation
Delay Time (Strobe)

tpZL(S)

4

-

-

Low Logic Level to Open State Propagation
Delay Time (Strobe)

tPLZ(S)

4

-

High Logic to Low Logic Level Propagation
Delay Time (Strobe)
Low Logic to High Logic Level Propagation
Delay Time (Strobe)

tpHL(S)

5

tPLH(S)

5

-

-

Characteristics

4

,

MC3432. MC3433
Min
Typ Max

Unit

-

27

50

ns

40

65

ns
ns

-

ns

40

-

-

ns

35

-

ns

-

-

-

-

35

-

-

40

ns

-

-

-

35

ns

Figure 4. Strobe Propagation Delay Times tPLZ(S). tPZL(S). tPHZ(S). and tPZH(S)

1N916
orequlv

Vl

V2

Sl

S2

tPLZ(S)

100mV

GND

Closed

Closed

CL
15pF
50pF

tpZl.(S)

100mV

GND

Closed

Open

tpHZ(S)

GND

100mV

Closed

Closed

15pF

tPZH(S)

GND

l00mV

Open

Closed

50pF

CL includes jig and probe capacitance.
Ein waveform characteristics.
trLH and trHL ,; 10 ns measured 10% to 90%.
PRR = 1.0 MHz
Duty Cycle = 50%

Output of Channel B shown under test, other channels are tested similarly.

{

Eln

!PLZ(S)

3.0V-J
0V

1.5 V

_

E;
tpLZ(S)

tPHZ(S)

'" 1.5 V

EO

-

-

0.5 V

VOH

~

tPZH(S){~ ~:d-}~~

OV--

5.0V-V01

Eo

~:=J:_j
~_ _t_"'1.5V

3'OV~
{
tPZL(S)·

~

-.::::VOL

E;n

{

!PZL(S)

Eo

1.5V
VOL---~---

1.5V

OV

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-170

MC3430 thru MC3433
Figure 5. Strobe Propagation Delay tPLH(S) and tPHL(S)
+S.OV

+100mV

_-_..--o--'-l
+3.0V~-

390

E;n

Fct+-+-----..... Eo

S~~~(S)
__
IPHL(S)

-S.OV

J

50%

OV

Eo

ISpF
(fotal)

I.SV

VOL
E;n wavefOllll characteristics.

trLH and IrHL S 10 ns measured 10% 1090%.
PRR=I.0MHz
Duty Cycle = 50%

Output of Channel B shown under test, other channels are tested similarly.

Figure 6. Differential Input Propagation Delay tPLH(D) and tPHL(D)
.S.OV
Vref

390

+s.omv-~

B

50

E;n

Vref

OV

~~@l~_~j-

E;n Jl

Eo

VOL

- - - ' l.SV

tPHL(D)

'--

E;n wavefonn characteristics.

trLH and IrHL S10 ns measured 10% to 90%.

Eo

PRR= 1.0 MHz
Duty Cycle = 50%

Output of Channel B shown under test, other channels are tested similarly.
51 at "A" for MC3430, MC3431
51 at"B" for MC3432, MC3433
CL = 50 pF total for MC3430, MC3431
CL = 15 pF total for MC3432, MC3433

Device
MC3430
MC3431

'l

~g=~

Figure 7. circuit Schematic
(1/4 Circuit Shown)
VCCo-~-~--4r--~--~---~--~--~-.

B50

tOO

850

4.0k

..-1------0 Output

Il.-+TI----;::~~=~.-r'

Gnd

'---<,...-r-o Strobe
4.Ok

'4.0k
loOther
ComparatOlS

VEE

Dashed components apply to the MC3430 and MC3431 circuits only.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-171

MC3430 thru MC3433
Response Time versus Overdrive - MC3430, MC3431
Figure 8. Output Low-to-High

Figure 9. Output High-to-Low

1 1
~

f-- VCC =+5.0 V

'"~

r--- TA =25'C

~ VEE

w

0
>

1

=-5.0V

w

100mV

VOH

l-

50my,

l-

=>

0

:i:
>0

""'

>0

'"~
V

0
>

/

I rr- L
1. ..1 fo/ 1/ I
10mV_
20mv,~
/ /
V/ */
5.0 mv- I-- -

=>
0..

/)

/

VOL
100mV
0

I

/

1

I-- r- VCC =+5.0 V
c-- r- VEE =-5.0 V
r- TA =25'C
I--

~

20mV

VOH

=>
0..

l-

=>

0

-'
0
>

50mV

-20

-10

10

20

30

40

50

X
\\, \ 1/10l mv
Jl(\ .V
1
\\\ 1\ 15.0mv
\\\'

100 mV \\'

~

'I

1

>0

tTLH 9 0.5 ns

I

~\

l-

VOL
200mV
100mV
-20

1
tTLH =0.5 ns

1
-10

10

t. TIME (ns)

20

30

40

50

t. TIME (ns)

Response Time versus Overdrive - MC3432, MC3433
Figure 10. Output Low-to-High

1
r--- Vcc =+5.0 V
r--- VEE =-5.0 V
r--- TA =25'C

5.0V
~

w

'"~

1
100 mV /)

!-- 50mV

I" h

§;

20mV

5
~
o

)I;

:x:

""'

5.0V

r/V

~

/ /

10mV

\r'

/5.0mv

-'
o
>

~

VOL
200mV
100mV
-20

>0

o

tTLH = 0.5 ns

-10

10

20
30
t. TIME (ns)

40

50

60

Figure 12. Average Input Offset Voltage
versus Temperature

3.0

:;;w

'"~
§;

t;;

2.5
2.0

'""-"50..

1.0

10
20
t, TIME (ns)

"\.

30

1

"' r--..

/'

r-- r--- tpLH
r-- r--- MG3432

25

L

r-..

'iii

.s

20

"">=

15

33

>-""

tpLH
MC3430-31
1

0

10

;;;;
5.0

0.5

o

-25

30

40

50

35

w

1.5

tTLH = 0.5 ns
-10

Figure 13. Response Time versus Temperature

3.5

§.

\ \
\\ \
\ 1\ V ~omy - r--10mV
\~ \
1\ \ X
I
50mV/ \ ,\
\
\ 1\ \
-'.
\ 5.0mV- I-100mV \ \
1\ \ .\ \

I-- -

/

VOL
100mV

\

I-- r- VCC =+5.0 V
I-- r- VEE =-5.0 V
!-- r- TA =25'C

//

1/ 1/
/ 1/

W /

// rY
/,
/
// /

:?
>0

Figure 11. Output High-to-Low

25
50
TA. AMBIENT TEMPERATURE ('C)

75

o

-20

100

~
"".

Mc~~k31-

tpHL
MC3432-33 _

VCC =+5.0 V
VEE =-5.0 V
Vref =100 mV
Overdrive =100 mV

1

1

20
40
60
TA. AMBIENTTEMPERATURE (0C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-172

.....

-

80

MC3430 thru MC3433
Figure 14. 4·81t Parallel AID Converter

22

[5i'W

lN914
..
or
equiv.
51

~

2N3904 or equiv.

I;k

~ O.II1F

10k

.".

Vref=3.0V

J

'. fO=60mA
R
R

5.0V

~

Each Comparator
1/4 of MC3432

~~li
+

R~~R

...-.LL

R
R!I-

~

R

~

R

hlC

R~ ~
hI-C
R
-

R

.L.

r-n
rn

Lc

.r

~

0

4

C

I I

~

B

LJ>MC3OO6

A

~

R

4:

E

~
fYLhtC
-

R

K

~

F

~

R

j

H

f--+lC
-

R

J=T~

L

J

~

R

N
M

-

R

~

p

'V"

l

I

R 3.00±5%

MC3004

.".

2"0 =(A +B) (I: +0) (I: +F) (H + J) (K +L) (M +N) (P +R) (8)

21 = (8 +0) (F +.I) (L +N) (R)

22 =(0 +.I)(N)
23=J
Conversion Time .. 50 ns

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-173

270

MC3430 thru MC3433

Figure 15. Level Detector with Hysteresis

Figure 16. Transfer Characteristics and
Equations for Figure 15
V,ef

I

3.0

RS

!
V'ow

i

f-----

I
I

2.0

:E

~~430 >---..--0 Vout

o

> 1.0

Vhlgh

~ '--

Vh

I

o

RI

o

1.0

2.0
VinM

3.0

4.0

R2
RS=

Rl +R2

RIR2
RI +R2

R2 lVO(min) -Vrefl

RI +R2
Hysteresis Loop (Vh):

Figure 17. Double-Ended limit Detector

Figure 18. Voltage Transfer Function
+s.OV

You!

I- 5.0 V
1.0k

I- 4.0V
I- 3.0V

"'--+--0

I- 2.0V

VoU!

I-I.OV
-Yin _ _ _ _ _ _--'-O_.O_V_ _ _ _ _ +Vin

V,efOow)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-174

V,el (high)

MC3458
MC3558
MC3358

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

DUAL DIFFERENTIAL
INPUT
OPERATIONAL AMPLIFIERS

Dual, Low Power
Operational Amplifiers
Utilizing the circuit designs perfected for recently introduced Quad Operational
Amplifiers, these dual operational amplifiers feature 1) low power drain, 2) a
common mode input voltage range extending to groundNEE, 3) Single Supply or
Split Supply operation and 4) pin outs compatible with the popular MC1558 dual
operational amplifier. The MC3558 Series is equivalent to one-half of a MC3505.
These amplifiers have several distinct advantages over standard operational
amplifier types in single supply applications. They can operate at supply voltages
as low as 3.0 V or as high as 36 V with quiescent currents about one-fifth of those
associated with the MC1741 (on a per amplifier basis). The common mode input
range includes the negative supply, thereby eliminating the necessity for external
biasing components in many applications. The output voltage range also includes
the negative power supply voltage.
• Short Circuit Protected Outputs
• True Differential Input Stage
• Single Supply Operation: 3.0 V to 36 V
• Low Input Bias Currents
• Internally Compensated
• Common Mode Range Extends to Negative Supply
• Class AB Output Stage for Minimum Crossover Distortion
• Single and Split Supply Operations Available
• Similar Performance to the Popular MC1458/1558

SILICON MONOLITHIC
INTEGRATED CIRCUIT

~

PI SUFFIX
PLASTIC PACKAGE
CASE 626

1

USUFFIX
CERAMIC PACKAGE
CASE 693

8~
1

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

PIN CONNECTIONS
MAXIMUM RATINGS
Rating

Symbol

Power Supply Voltages
Single Supply
Split Supplies

Value

Unit

VCC
VCC, VEE

36
±18

Input Differential Voltage Range (1)

VIDR

±30

Vdc

Input Common Mode Voltage Range (2)

VICR

±15

Vdc

Junction Temperature
Ceramic Package
Plastice Package

7

Inputs A

OutputS

{ :
: } Inputs S

VEe/Gnd

4

{Top View)

°c

TJ
175
150

Storage Temperature Range
Ceramic Package
Plastic Package

°C

Tstg
-65 to +150
-55 to +125

Operating Ambient Temperature Range
MC3458
MC3558
MC3358
NOTES:

OulputA,

Vdc

ORDERING INFORMATION
°C

TA
Oto+70
-55 to +125
-40 to +85

1. Split Power Supplies.
2. For supply voltages less than ±18 V. the absolute maximum input voltage
is equal to the supply voltage.

Device
MC3358Pl
MC3458D
MC3458Pl
MC3458U
MC3558U

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-175

Temperature Range

Package

-40° to +85°C

Plastic DIP
SO-8
Plastic DIP
Ceramic DIP
Ceramic DIP

0° to +70°C

-55° to + 125°C

MC3458, MC3558, MC3358
ELECTRICAL CHARACTERISTICS (For MC3558. MC3458. VCC = +15 V. VEE = -15 V. TA = 25°C. unless oiherwise noted.)
(For MC3358. VCC = +14 V. VEE = Gnd. TA = 25°C. unless otherwise noted.)
..,C3558

Characteristics

Input Offset Voltage

Symbol
Via

TA = Thi h to Tlow (Note 1)
Input Offse~ Current
TA = Thi h to Tlow
Large Signal Open-Loop Voltage Gain

110

Max

-

2.0

5.0
6.0

liB

200

zl

Min

--

'iYP

Max

'iYP

Max

Unit

2.0

10
12

-

2.0

-

mV

-

8.0
10

50
200

-

-

30

75
250

30

-

200
300

-

20
15

200

-

20
15

200

-

-500
-1500

-

-200

-500
-800

-

-

-200
-300

-200

-SOD

0.3

1.0

-

0.3

1.0

-

±12
±10
±10

±13.5
±13

-

12
10·
10

12.5
12

-

---

+13
-VEE

+13.5

+13
-VEE

+13.5

-

V

mA

75

-

1.0

-

±12
±10
±10

±13.S

--

Input Common Mode Voltage Range

Common Mode Rejection Ratio

VICR

+13
-VEE

+13.5

CMR

±13

-

-

-VEE

70

90

-

1.6

2.2

±10

-

-

-

-VEE

nA

-1000

75

75

0.3

VOR

RL=10kO
RL = 2.0 kO
RL = 2.0 kO. TA = Thigh 10 Tlow

nA
V/mV

50
25

1=20Hz

Output Voltage Range

Min

-

Zo

Input Impedance

SO

30

-

AVOL

Va = ±10 V. RL = 2.0 kO.
TA = Thi h to Tlow

Input Bias Current
TA=Thi htoTlow
Output Impedance
f",20Hz

Typ

-

MC3358

"'03458

Min

n
Mn
V

-VEE

70

90

70

90

-

1.6

3.7

-

1.6

3.7

dB

RS<10kO
Power Supply Current (VO = 0)
RL=~

Individual Output Short Circuit Current (Note 2)

ICC. lEE

±30

±45

±10

±20

±45

±10

±30

±45

mA

PSRR+

30

150

-

30

150

-

30

150

~VN

Negative Power Supply Rejection Ratio

PSRR

30

150

30

150

Average Temperature Coefficient of Input

&llo'&T

50

Positive Power Supply Rejection Ratio

ISC

Offset Current
TA=Thi htoTlow
Average Temperature Coefficient of Input
Offset Current
TA=Thi htoTlow

&Vlo'&T

Power Bandwidth
AV = 1. RL =2.0 kO, VO= 20Vp -p.
THO=5%

BWp

Small Signal Bandwidth
AV = 1. RL = 10 kO, Va

-

-

10

Rise lime
AV= 1. RL = 10kO, VO=50mV

BW

1.0

SR

0.6

tTLH

-

9.0

-

10

50

-

-

9.0

-

=50 mV

Slew Rate
AV = 1, VI =-10Vto +10V

~VN

SO

1.0

-

-

0.6

-

0.35

-

0.35

0.35

10

pN"C

-

9.0

kHz

1.0

MHz

0.6

-

-

0.35

~vrc

0.35

VI""

-

0.35

~s

Fall lime
AV·l. RL = 10kO, VO=50mV

trHL

Overshoot
AV= 1. RL= 10kO, VO·50mV

as

-

20

-

-

20

-

-

20

-

%

Phase Margin
AV= 1. RL =2.0kO, CL = 200 pF

~m

-

60

-

-

60

-

-

60

-

Oegrees

Crossover Distortion
(Vin = 30 mVp·p. Vout = 2.0 Vp·P.
1= 10kHz)

-

-

1.0

-

1.0

-

1.0

-

%

~s

Tlow = -55°C lor MC3558. O'C lor MC3458. -40°C lor MC3358

ELECTRICAL CHARACTERISTICS (VCC

=5.0 V. VEE =Gnd. TA = 25°C. unless otherwise noted.)
MC3558

Characteristics

Symbol

Input Offset Voltage

Via

Input Offset Current

110

Input Bias Current

liB

Large Signal Open-Loop Voltage Gain
RL = 2.0 kO.

AVOL

Power Supply Rejection Ratio

PSRR

Output Voltage Range (Note 3)

VOR

=t: ~~~: ~~«,~t~~

Min

20

3.3
<30V

Power Supply Current

ICC

Channel Separation
f = 1.0 kHz to 20 kHz (Input Referenced)

CS

-

MC3458

'iYP

Max

2.0

5.0

30

50

-200

-500

200

-

-

150

Min

'iYP

MC3358

'iYP

Max

Unit

2.0

10

mV

-

-

75

nA

20

200

Min

2.0

"'ax
5.0

30

50

-

-200

-500

20

200

-

-

150

2.5

4.0

mA

-

-120

-

dB

-

2.5

4.0

-

-

2.5

7.0

-

-120

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-176

~VN

Vp-p

3.5
VCC-l.7

3.3

-

NOTES: 3. Output will swing to ground with a 10 k!l pull down resistor.

150

--

3.3

-

V/mV

3.5
VCC-1.7

-

nA

-

-

3.5
VCC-1.7
-120

-500

MC3458, MC3558, MC3358
Representative Circuit Schematic
(1/4 of Circuit Shown)

Bias Circuitry

Common to Both
Amplifiers

,-----------~------------~--~~~----~~~~~--~~~.-~VCC

020

f':--------,

030

2.4k

L---*_+_----_lo_-+---~t----_+__+_--~~--+_------_+_--*____+---------L_lo_--~_+____+L__o

VEE (Gnd)

Inverter Pulse Response

CIRCUIT DESCRIPTION

20 ~s/DIV

The MC3558 Series is made using two internally
compensated, two-stage operational amplifiers. The first
stage of each consists of differential input devices 024 and
022 with input buffer transistors 025 and 021 and the
differential to single ended converter 03 and 04. The first
stage performs not only the first stage gain function but also
performs the level shifting and transconductance reduction
functions. By reducing the transconductance a smaller
compensation capacitor (only 5.0 pF) can be employed, thus
saving chip area. The transconductance reduction is
accomplished by splitting the collectors of 024 and 022.
Another feature of this input stage is that the input Common
Mode range can include the negative supply or ground, in
single supply operation, without saturating either the input
devices or the differential to single-ended converter. The
second stage consists of a standard current source load
amplifier stage.
The output stage is unique because it allows the output to
swing to ground in single supply operation and yet does not
exhibit any crossover distortion in split supply operation. This
is possible because Class AB operation is utilized.
Each amplifier is biased from an internal voltage regulator
which has a low temperature coefficient thus giving each
amplifier good temperature characteristics as well as
excellent power supply rejection.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-177

MC3458, MC3558, MC3358
Figure 2. Open-Loop Frequency Response

Figure 1. Sine Wave Response

..

120

>

~ 100

i5

>ci
'"

Z

«
«
Z(!l
(!lw
(!l

en

VCC = +15V
VEE=-15V
TA = 25'C

...... r-.

80

. . . . r---.

60

~t§
a:0
« > 40
...J a.

1' . . . .

r-.I'

- 0

~~

>
i5

« ifi
a.
o

>-E
o

!.

+

'"

J

20

r"-r-.

•

*Note Class A B output stage
produces distortion less Sinewave

-20

1.0

10

100
1.0k
10k
f. FREQUENCY (Hz)

50 J.1s/DIV

CL

C.

~
w
(!l

t§
0

I IIIIII

20

\

15

>

I-

=>

"-

10

0

I I I III

CL

~VO

~+

\

C.

w
(!l

./

/'

t§
>
=>
a.

I-

10

/

l-

TA = 25'C

=>

~

10 k
lOOk
f. FREQUENCY (Hz)

1.Ok

1.0M

o

;I

o

2.0

I

«

--- -

IZ
W

a:
a: 200
=>
c..>

....

'":$
II)

l-

=>
a. 100

6.0

8.0

10

12

14

16

18

20

M

Figure 6. Input Bias Current
versus Supply Voltage
.~

VCC=+15V VEE = -15 V
TA=25'C
-

.s.

4.0

VCC AND (VEE). POWER SUPPLY VOLTAGES

Figure 5. Input Bias Current
versus Temperature

300

/

/"

L

0

~

-5.0

-

",

20

0

5.0

~

w
(!l
Z

«a:

-= 10k

-15V

TA=25'C

30

~

'\

I-

=>

I

~

25

1.0M

Figure 4. Output Swing versus Supply Voltage

Figure 3. Power Bandwidth
30

lOOk

:[

-

170

!z
w
a:
a:
=>

"'

c..>

r--

~
II)

~
a.

.......

160

~

~

~

fQ

-75

-55

-35

-15

5.0

25

45

65

85

150

105 125

T, TEMPERATURE ('C)

o

2.0

4.0

6.0

8.0

10

12

14

16

VCCAND (VEE). POWER SUPPLY VOLTAGES M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-178

18

20

MC3458, MC3558, MC3358
Figure 7. Voltage Reference

Figure 8. Wien Bridge Oscillator

VCC
VCC
10k
R2

1/2
MC3458

VCC

10k
Vret ...--.'\'VV_..-U-I

Vo

1/2

Vo
1 __
1_
0- 2nRC

MC3458
10k
Rl

1

Rl
Vo = Rl +R2
Vo =

J.2

Vrel=

2" VCC

For:

Figure 9. High Impedance Differential Amplifier

Figure 10. Comparator with Hysteresis

1

-R

el

C

R = 16 kQ
C =0.01 ~F

R

VCC

Hysterisis

H

R2

R

VOH

~

Rl
Vret e--'VVlre--U---t + 1/2

Vo

MC3458
Vin----O---I

1/2

10 = 1.0 kHz

Vo

VOL-W
VinL I VinH

MC3458

Rl
VinL = Rl +R2 (VOL - Vrell +Vrel

1

-R

Vrel

C

Rl
VinH = Rl +R2 (VOH - Vrell +Vrel

e2

R

V __R_l _(V
h - Rl +R2

eo

= C (1

VLl

OH - 0

+a +b) (e2 -el)

Figure 11. Bi-Quad Filter
R

R
Cl

Vin

lOOk

C

R2

--l f--_._---'\'Vv-O'-tJ-l

Rl =QR

1/2

MC3458

R2=

lOOk

Vrel
Rl

Bandpass
Output

R3

~

TBP
1/2
MC3458

R2

1 __
1_
0- 2nRC

R3 = TN R2
Cl = 10C
For: 10 = 1.0 kHz
Q= 10
TBP= 1
TN=l

Vrel

Cl
>C_--j

t--------e Notch Output

Where:

TBP = center Irequency gain
TN = passband notch gain

Vrel

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-179

1
Vrel= 2VCC
R= 160 kQ
C = 0.001 ~F
Rl =1.6MQ
R2 = 1.6MQ
R3=1.6MQ

MC3458, MC3558, MC3358
Figure 12. Function Generator

R2
300k

R3
Square Wave
Output

75k
Rl
lOOk
Vre!

Rl +RC
1= 4CRIRl

H,

R2Rl
R3= R2+Rl

Figure 13. Multiple Feedback Bandpass Filter

il

Vin

Vee

Cc

>-c........----if-. Vo

Co

R2

Given:

CO=10C

10 = center lrequency
A~ol

= gain at center frequency

Choose value 10 , C.
Then:

o

R3=!tloC

Rl =

-.!!L

2A(fol

Rl R5
R2 = -40-=2-R-l--R-3

For less than 10% error from operational amprdier

0 0 10

fm < 0.1

where, 10 and BW are expressed in Hz.
Hsource impedance varies, filter may be preceded with
voltage follower buffer to stabilize finer parameters.

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA
2-180

MOTOROLA

MC3476

SEMICONDUCTOR-----TECHNICAL DATA

Low Cost Programmable
Operational Amplifier
The MC3476 is a low cost selection of the popular, industry standard MCt 776
programmable operational amplifier. This extremely versatile operational
amplifier features low power consumption and high input impedance. In addition,
the quiescent currents within the device may be programmed by the choice of an
external resistor value or current source applied to the Iset input. This allows the
amplifier's characteristics to be optimized for input current and power
consumption despite wide variations in operating power supply voltages.

LOW COST
PROGRAMMABLE
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT

~

• ±6.0 V to ±18 V Operation
• Wide Programming Range
• Offset Null Capability

1

• No Frequency Compensation Required

PI SUFFIX
PLASTIC PACKAGE
CASE 626

• Low Input Bias Currents
• Short Circuit Protection
Resistive Programming
(See Figure 1)
Rset to Ground

Rset to Negative Supply
(ReComr:;sdt~~~O~~'!fW voltage
U SUFFIX
CERAMIC PACKAGE
CASE 693

S

8
Rset

Rset
VCC -0.6
Iset= - R - set

Vc
,,,,C,--...::O.,,-S-_V,-"E,=.E

Iset= -

Rset

Typicat Rsel Values

±6.0V
±10V
±12V
±15V

3.6 Mil
6.2 Mn
7.5 Mn
10Mn

Typlcat Rsel Values

360 kil
620 kn
750 kn
1.0 Mn

PIN CONNECTIONS

Vee. VEE

Iset = 1.5!!A

Iset = 15 !!A

±1.5V
±3.0 V
±6.0 V
±15 V

1.6 Mil
3.6 Mil
7.5 Mil
20 Mil

160 k11
360 k11
750 k11
2.0 Mil

Input

Active Programming
FET Current Source

(Top View)

Bipolar Current Source

ORDERING INFORMATION
Device
MC3476P1
MC3476U

Pins not shown are not connected.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-181

Temperature Range

Package

0° to +70°C

Plastic DIP
Ceramic DIP

MC3476
MAXIMUM RATINGS (TA = +25°C. unless otherwise noted.)
Rating
Power Supply Voltages
Input Differential Voltage Range
Input Common Mode Voltage Range

Symbol

Value

Unit

VCC.VEE

±18

Vdc

VIDR

±30

Vdc

VICR

VCC. VEE

Vdc

Voff-VEE

±D.5

Vdc

Programming Current

Iset

200

IJ.A

Programming Voltage
(Voltage from Iset Terminal to Ground)

Vset

(VCC-0.6V)
toVce

Vdc

Output Short Circuit Duration (Note 1)

tsc

Indefinite

sec

Operating Ambient Temperature Range

TA

Oto +70

°C

Offset Null to VEE Voltage

Storage Temperature Range
Metal and Ceramic Packages
Plastic Package

°C

Tstg
-65to+150
-550t+125

Junction Temperature
Ceramic Package
Plastic Package

°C

TJ
175
150

NOTE: 1. Short circuit to ground with Iset s 151lA. Rating applies up to ambient temperature of +70°C.
Equivalent Schematic Diagram
r---------~------~--~~--~----~------~r_--~v~

50

2
Inputs

3 +
100
100 6
_'W';;.--o Output

100

..

lo-----+
Offset Null

50

5o-----t---------+
10k

10k

Voltage Offset Null Circuit

Transient Response Test Circuit

2
3
Pins not shown are
not connected.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-182

MC3476
ELECTRICAL CHARACTERISTICS (VCC = +15 V. VEE = -15 V.lset = 15 /lA. TA = +25°C. unless otherwise noted).
Characteristics

Symbol

Input Offset voltage (RS :s; 10 1Ul)
TA = +25°C
0°C:S;TA:S;+70°C

VIO

Offset Voltage Adjustment Range

VIOR

Input Offset Current
TA = +25°C
TA = +70°C
TA=O°C

110

Input Bias Current
TA = +25°C
TA = +70°C
TA = O°C

liB

Min

Typ

Max

-

2.0

-

6.0
7.5

18

-

-

20

25
25
40

-

15

-

Input Resistance

11

Input Capacitance

Ci

-

VICR

Large Signal Voltage Gain
RL<: 10 kO, Vo = ±10 V. TA = +25°C
RL <: 10 kO, Vo = ±10 V. O°C :S;TA:S; +70°C

AVOL

Output Voltage Range
RL <: 10 kO, TA = +25°C
RL <: 10 kO, O°C:s; TA:S; +70°C

VOR

Output Resistance

mV

mV
nA

-

Input Common Mode Voltage Gain
O°C:s; TA:S; +70°C

Unit

±10

-

nA

-

50
50
100

5.0

-

MO

2.0

-

pF

-

-

V
VIV

-

50 k
25 k

400 k

±12
±12

±13

ro

-

1.0

-

kO

-

rnA
dB

-

V

-

-

ISC

-

12

Common Mode Rejection
RS:S; 10 kO, O°C:s; TA:S; +70°C

CMR

70

90

-

Supply Voltage Rejection Ratio
RS:S; 10 kO, O°C:s; TA:S; +70°C

PSRR

-

25

200

-

160

200
225

-

4.8

-

0.35
10

-

jlS

0.8

-

V/jlS

Output Short Circuit Current

Supply Current
TA=+25°C
O°C:s; TA:S; +70°C

ICC. lEE

Power Dissipation
TA=+25°C
O°C:s; TA:S; +70°C

PD

Transient Response (Unity Gain)
Vin = 20 mV. RL 2: 10 kO, CL = 100 pF
Rise lime
Overshoot

trLH
OS

Slew Rate (RL <: 10 1Ul)

SR

-

IlVIV

/lA
mW

-

6.0
6.75

%

Figure 2. Positive Standby Supply Current
versus Set Current

Figure 1. Set Current versus Set Resistor
100M

9.
a:

.......

10M

~

ffl

VCC=+15V
VEE=-15V
RsetlO VEE

......

~ 1.0M

VCC=+15V
VEE=-15V
RsettoGND

r-....

'"1D

~look

10k
0.1

1.0

10

100

Iset. SET CURRENT (jIA)

0.1

1.0
Iset. SET CURRENT (1lA)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-183

10

100

MC3476
Figure 3. Open-Loop versus Set Current

Figure 4. Input Bias Current versus Set Current
100

~

Vec - +15 V
VEE- 15V

RL = 10 k

z

«
C!:l

f=

+B.OV
..:

104
0.1

1~

10

0.1
0.01

100

0.1

1.0
Iset. SET CURRENT !itA)

Iset. SET CURRENT (~)

Figure 5. Slew Rate
versus Set Current

~

~ 10M

1.0

It3
I=>
8 1.OM C=

I-'"'"

a..

~

0.1

~

VCC= +15 V
VEE= -15 V

a:

Vcc - +15 V
VEE - -15 V

~

100

Figure 6. Gain Bandwidth Product
versus Set Current

10

UJ

10

';: 100k
o
z

ii3

00

a::

z

0.01

00

~

10k

;;;
en
C!:l

0.001
0.01

0.1

1.0

10

1.0k
0.1

100

1.0

Iset. SET CURRENT (~)

Figure 7. Output Voltage Swing
versus Load Resistance

=>

24

0

"'~

~C!:l
a..z
6';:

18

40
~
C!:l
z

II

';:

00
UJ

/

'rL§2
~

oS
0

>

o
1.Ok

0

10k

100k

12

0

8.0

~

r- r- _

Iset=1.5~

V

RL=5.0k

16

.....
=>

VCC=+15V
VEE = -15 V
I t=15~
,I lise
I I I

28
20

=>
a..

6.0

32

24

>
.....

12

36

C!:l

!:§

1-;'00
"'UJ

~C!:l
a..;:!i

100

Figure 8. Output Voltage Swing
versus Supply Voltage

....-

30

.....
=>
a..
.....

10

Iset. SET CURRENT !ItA)

. /V

".

V

./

./

4.0

o./

1.0M

o

2.0

4.0

B.O

8.0

10

12

14

VCC. IVEEI. SUPPLY VOLTAGES M

Rt.. LOAD RESISTANCE (n)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-184

16

18

20

MC4558,
MC4558AC
MC4558C

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Dual Wide Bandwidth
Operational Amplifier

DUAL WIDE BANDWIDTH
OPERATIONAL AMPLIFIER

The MC4558, AC, and C combine all the outstanding features of the MC1458
and, in addition, possess three times the unity gain bandwidth of the industry
standard.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

• 2.5 MHz Unity Gain Bandwidth Guaranteed (MC4558 and MC4558AC)
• 2.0 MHz Unity Gain Bandwidth Guaranteed (MC4558C)

•

• Internally Compensated
• Short Circuit Protection
• Gain and Phase Match between Amplifiers

1

• Low Power Consumption

PI SUFFIX
MAXIMUM RATINGS (TA = +25"C, unless otherwise noted.)

PLASTIC PACKAGE
CASE 626

Symbol

MC4558
MC4558AC

Power Supply Voltage

VCC
VEE

+22
-22

Input Differential Voltage

VID

±30

V

Input Common Mode Voltage (Note I)

VICM

±15

V

Output Short Circuit Duration (Note 2)

tsc

Continuous

Ambient Temperature Range

TA

-55 to +125
to +70

Storage Temperature Range
Ceramic Package
Plastic Package

Tstg

Rating

Junction Temperature
Ceramic Package
Plastic Package
NOTES:

1.
2.

MC4558C

Unit

+18
-18

Vdc

!~ff
1

USUFFIX
CERAMIC PACKAGE
CASE 693

o

"C
-€5to+150
-55 to +125

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

"C

TJ
175
150

For supply voltages less than ±t 5 V, the absolute maximum input voltage is
equal to the supply voltage
Short circuit may be to ground or either supply.

PIN CONNECTIONS
Equivalent Circuit Schematic
(1/2 of Circuit Shown)

OutputA

1

2

Inputs A

7

3

}
6

Inverting
Input-

Output B

{

VEE

4

Inputs B

L-_ _-'

(Top View}
25

..--+n Output

ORDERING INFORMATION

25

Device

20k
L-~~----4--4----~--~------~--~--4_-O~E

MC4558U
MC4558CD
MC4558ACP1,
CPl
MC4558CU

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-185

Temperature
Range
-55" to + 125"C
0" to +70"C

Package
Ceramic DIP
SO-8
Plastic DIP
Ceramic DIP

Ell

MC4558, MC4558AC, MC4558C
FREQUENCY CHARACTERISTICS (VCC = +15 V, VEE =-15 V, TA = 25°C)

I

Characteristics

I Unity Gain Bandwidth

I

Symbol

I

BW

I MC4558, MC4558AC
I Min I Typ I Max

Min

I

2.0

2.5

I

2.8

I -

I

I
I

Unit

I -

I

MHz

MC4558C
Typ
Max

I
I

2.8

ELECTRICAL CHARACTERISTICS (VCC = 15 V, VEE = -15 V, TA = 25°C, unless otherwise noted.)
Input Offset Voltage
(RS S; 10 kll)

Via

Input Offset Current

110

-

20

200

-

Input Bias Current (Note 1)

liB

-

80

500

-

0.3

2.0

-

0.3

2.0

1.0

5.0

2.0

6.0

mV

20

200

nA

80

500

nA
MQ

-

1.4

Common Mode Input Voltage Range

VICR

±12

±13

-

-

±12

±13

-

V

Large Signal Voltage Gain
(Va = ±10 V, RL = 2.0 kQ)

AVOL

50

200

-

20

200

-

V/mV

Output Resistance

ro
CMR

-

75

75

-

Q

90

-

-

70

70

90

-

dB

PSRR

-

30

150

-

30

150

IlVN

-

V
rnA

q

Input Resistance
Input Capacitance

Ci

Common Mode Rejection
(RS S; 10 kll)
Supply Voltage Rejection Ratio
(RSS; 10 kll)
OUtput Voltage Swing
(RL;" 10 kll)
(RL;" 2.0 kll)

Va

Output Short Circuit Current

ISC

-

±12
±10

Supply Currents (Both Amplifiers)

10

Power Consumption (Both Amplifiers)

Pc

Transient Response (Unity Gain)
(VI = 20 mV, RL ;" 2.0 kO, CL S; 100 pF) Rise Time
(VI = 20 mV, RL;" 2.0 kO, CL S; 100 pF) Overshoot
(VI = 10 V, RL;" 2.0 kO, CLS; 100 pF) Slew Rate

tTLH
as
SR

10

-

1.5

1.4

±14
±13

-

±12
±10

±14
±13

pF

-

20

40

10

20

40

2.3

5.0

-

2.3

5.6

rnA

70

150

-

70

170

mW

0.3
15
1.6

-

-

-

0.3
15
1.6

-

-

1.0

-

f!S
%

-

V/IlS

ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE =-15 V, TA = Thigh toTlow, unless otherwise noted. See Note 2.)
Input Offset Voltage
(RS S; 10 kll)

Via

Input Offset Current
(TA = Thigh)
(TA= Tlow)
(TA = 0° to +70°C)

110

Input Bias Current
(TA = Thigh)
(TA= Tlow)
(TA = 0° to +70°C)
Common Mode Input Voltage Range

liB

-

1.0

6.0

7.0
85

200
500

30
300

500
1500

VICR

±12

±13

Large Signal Voltage Gain
(Va = ±10 V, RL = 2.0 kll)

AVOL

25

-

Common Mode Rejection
(RS S; 10 kll)

CMR

70

90

-

Supply Voltage Rejection Ratio
(RS oS 10 kll)

PSRR

-

30

Output Voltage Swing
(RL;" 10 kll)
(RL ;" 2.0 kll)

Va

Supply Currents (Both Amplifiers)
(TA = Thigh)
(TA= Tlow)
Power Consumption (Both Amplifiers)
(TA = Thigh)
(TA=Tlow)

10

Pc

NOTES: 1. liB is out of the amplifier due to PNP input transistors.
Tlow=
2. Thigh = +125°C for MC4558
+70°C for MC4558C and MC4558AC

-

±12
±10

±14
±13

-

-

-

-

7.5

-

-

-

-

-

15

300

-

-

-

150

-

-

±12
±10

±14
±13

-

nA

800

-

-

-

-

5.0
6.7

135
180

-

-

150
200

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

V
V/mV
dB
IlVN
V

rnA

4.5
6.0

-55°C for MC4558
O°C for MC4558C and MC4558AC.

2-186

nA

-

-

mV

mW

I
I

MC4558, MC4558AC, MC4558C

~
:;;;e:'"

Figure 1. Burst Noise versus Source Resistance

Figure 2. RMS Noise versus Source Resistance

1000

100~~11111~~11111~~11

~f

I,!,,=

11111

11111

100

w

CI)

5
z

....
::>
"~

10

C:

CD

o

0.1
10

100

1.0k

10k

lOOk

L..1..L..J...J..J.IJWl-u-u.J.WIl....L.L...I..I.J.UJlL..I..L..I..l.JJ.LJll...Ju..Ju.J.LWJ

100M

100

10

1.0

10 k

10

140

II I"'I

120

A, f='ru

J¥

I-I-t"

..".

100

c:

80

:>
w

\

~

C:

CD

~

40

.ff-

20

0.01
1.0 k

10 k

100 k

r\

60

5

o

I.OM

II

AV=IO,R =IOOkO

r\

!Q

100

100M

Figure 4. Spectral Noise Density

Figure 3. Output Noise versus Source Resistance

10

100 k

RS, SOURCE RESISTANCE (0)

RS, SOURCE RESISTANCE (0)

.......

10

RS, SOURCE RESISTANCE (0)

100

1.0k

10k

lOOk

f, FREQUENCY (Hz)

Figure 5. Burst Noise Test Circuit
Positive
Threshold
Voltage

lOOk

To Pass/Fail
Indicator

lOOk
1.0k

lOOk

Operational Amplifier
Under Test

Low Pass Filter
1.0 Hz to 1.0 kHz
Negative
Threshold
VoHage

Unlike conventional peak reading or RMS meters, this system was especially
designed to provide the quick response time essential to burst (popcorn) noise
testing.

The test time employed is 10 sec and the 20 IlV peak IimH refers to the
operational amplifier input thus eliminating errors in the closed-loop gain
factor of the operational amplifier.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-187

•

MC4558, MC4558AC, MC4558C
Figure 7. Phase Margin versus Frequency

Figure 6. Open-Loop Frequency Response
180
!il 140
:Eo
z 120
;;;:
i-(!1
100
w

(!1

13
~

80

-

U)

i'..

60

120
100

~
:;

......

w

'"

a..

::::l

I

1
20k SOk

0

5.0

~

3.0
1.0

±15 VSup lies
±12V

/-

-

-~

V
./

100

lOOk

,-

V""

I-

±6.0V

/ ~~

"..

13

(!1

±9.0V
I

~

1.0
100

100 1.0k 10k lOOk 100M 10M
f. FREQUENCY (Hz)

1

±12V

w

10

Figure 9. Negative Output Voltage Swing
versus Load Resistance

±15V SU plies

/ ' i-"'"

-

'\

o

Figure 8. Positive Output Voltage Swing
versus Load Resistance
15

-

\

20

100 loOk 10k lOOk 100M 10M
f. FREQUENCY (Hz)

Unity
Gain

y

~ ...

i±9.0V
±6.0V

L·.OV
500

loOk 2.0k
10k
Rlo LOAD RESISTANCE (n)

20k

50k lOOk

Figure 10. Power Bandwidth
Figure 11. Transient Response Test Circuit

(Large Signal Swing versus Frequency)

28

-a 24

.t
w

20

13

16

>-~o---

~

I-

::::l

~

::::l

0

~

12
Volta~e Follower
T 0<5%
111111 II 11111111 I

8.0
4.0
0

_ _ To Scope
(Output)

(!1

10

1111111111111111
loOk
100

r-.

10k
f. FREQUENCY (Hz)

lOOk

1.0M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-188

MC4741
MC4741C

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

(QUAD MC1741)
DIFFERENTIAL INPUT
OPERATIONAL AMPLIFIERS

(Quad MC1741)
Operational Amplifiers
The MC4741,C is a true quad MC1741. Integrated on a single monolithic chip
are four independent, low power operational amplifiers which have been
designed to provide operating characteristics identical to those of the industry
standard MC1741 , and can be applied with no change in circuit performance.
The MC4741,C can be used in applications where amplifier matching or high
packing density is important. Other applications include high impedance buffer
amplifiers and active filter amplifiers.
• Each Amplifier is Functionally Equivalent to the MC1741
• Class AS Output Stage Eliminates Crossover Distortion
• True Differential Inputs
• Internally Frequency Compensated

SILICON MONOLITHIC
INTEGRATED CIRCUIT

LSUFFIX

....

14

• Short Circuit Protection

CERAMIC PACKAGE
CASE 632

PSUFFIX

'mn ll

PLASTIC PACKAGE
CASE 646

1t#

PLASTIC PACKAGE
CASE 751A
(SO-14)

1

1

• Low Power Supply Current (0.6 rnA/Amplifier)

o SUFFIX
1

PIN CONNECTIONS
Out 1 1
Inputs 1 { 2

Inputs 2 { 5

EQUIVALENT CIRCUIT SCHEMATIC
(1/4 of Circuit Shown)

Out2

7

r-.-------~~~-------.--------~vcc

G

(Top View)

Noninverting
Input
Inverting
Input

25

O--C:r-t:E~l__Ll-r=:~=~

L-M;~-*"e--+o

50

Output

ORDERING INFORMATION
Device

Offset
Null

MC4741L
MC4741CD
MC4741CL
MC4741CP

MOTOROLA L1NEARIINTERFACE ICs DEVICE DATA
2-189

Temperature Range

Package

-55° to + 125°C

Ceramic DIP

0° to +70°C

SO-14
Ceramic DIP
Plastic DIP

MC4741, MC4741 C
MAXIMUM RATINGS (TA = +25'C, unless otherwise noted.)
Rating
Power Supply Voltage

Symbol

MC4741

MC4741C

Unit

VCC
VEE

+22
-22

+18
-18

Vdc

VID

±44

±36

V

Input Common Mode Voltage

VICM

±22

±18

V

Output Short Circuit Duration

tsc

010 +70

'c

Input Differential Voltage

Operating Ambient Temperature Range

Continuous
-5510 +125

TA

Storage Temperature Range
Ceramic Package
Plastic Package

'c

TSlg
-65 to +150
-55 to +125

Junction Temperature
Ceramic Package
Plaslic Package

'c

TJ
175
150

High Impedance Instrumentation Buffer/Filter

1/4
MC4741

R4

Cl

Rt

+ 1/4
MC474t

R2

R3

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-190

MC4741, MC4741 C
ELECTRICAL CHARACTERISTICS (VCC = +15 V. VEE = -15 V. TA = 25'C. unless otherwise noted.)
Characteristics

Symbol

Min

Input Offset Voltage
(RS ~ 10 k)

Via

-

Input Offset Currenl

110
liB

-

Input Bias Currenl
Input Resistance
Input Capacitance
Offset Voltage Adjustment Range
Common Mode Input Voltage Range
Large Signal Voltage Gain
(Va = ±10 V. RL ~ 2.0 k)

MC4741
Typ
1.0

50

20
80
2.0
1.4
±15
±13
200

rj

0.3

Ci

-

VIOR
VICR
Av

±12

Max
5.0

Min

-

200

-

500

-

-

-

MC4741C
Typ
Max
2.0
6.0
20

200
500

-

80
2.0
1.4
±15

-

pF
mV

±12
20

±13
200

-

V
V/mV

dB

0.3

-

Output Resistance
Common Mode Rejection
(RSS; 10k)

ro
CMR

-

75
90

-

-

70

70

75
90

-

Supply Voltage Rejection Ralio
(RSS; 10k)

PSRR

-

30

150

-

30

150

±12
±10

±14
±13

±12
±10

±14
±13

-

20
2.4
72

-

-

-

Output Voltage Swing
(RL~ 10 k)
(RL~ 2 k)
Output Short Circuit Current
Supply Current - (All Amplifiers)
Power Consumption (All Amplifiers)
Transient Response (Unity Gain - Non-Inverting)
(VI = 20 mV. RL ~ 2 kn. CL ~ 100 pF) Rise Time
(VI = 20 mV. RL ~ 2 kn. CL ~ 100 pF) Overshoot
(VI = 10 V. RL ~ 2 kn. CL S; 100 pF) Slew Rate

Va

ISC
ID
Pc
trLH
os
SR

-

-

0.3
15
0.5

4.0

-

120

-

20
3.5
105

-

-

0.3
15
0.5

-

Unit
mV
nA
nA
MQ

Q

jlVN
V

7.0

mA
mA

210

mW

-

jls

-

%
V/jls

Max
7.5

Unit
mV

ELECTRICAL CHARACTERISTICS (VCC = +15 V VEE =-15 V TA = * Th'191h to TI ow· unless otherwise noted)
MC4741
Characteristics

Symbol

Input Offset Voltage
(RS~ 10 kQ)

Via

Input Offset Current
(TA= 125'C)
(TA=-55'C)
(TA = 0' to + 70'C)
Input Bias Current
(TA = 125'C)
(TA=-55'C)
(TA = 0' to + 70'C)
Common Mode Input Voltage Range
Large Signal Voltage Gain
(RL ~ 2k. VOUT = ±1 0 V)

110

liB

Min

-

-

Max
6.0

Min

-

-

7.0
85

200
500

-

-

-

-

-

-

dB

-

30

150

-

-

-

jlVN

±12
±10

±14
±13

-

-

-

-

2.4
3.6
72
108

3.4
5.0
102
150

-

70

Supply Voltage Rejection Ratio
(RSS;10 k)

PSRR

-

500
1500

* Thigh = 125'C for MC4741 and 70'C for MC4741C.

Tlow =-55'C for MC4741 and O'C for MC4741C.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-191

nA

90

CMR

Pc

300

15

Common Mode Rejection
(RS ~ 10 k)

ID

-

nA

-

±13

Supply Currents - (All Amplifiers)
(TA= 125'C)
(TA=-55'C)
Power Consumption (TA = +125'C)
(TA=-55'C)

-

-

-

-

±12
25

Va

-

Typ

-

30
300

VICR
AV

Output Voltage Swing
(RL~ 10 k)
(RL ~ 2 k)

MC4741C

Typ
1.0

±10

-

-

800

-

V
V/mV

±13

-

-

-

-

V

mA

mW

III

MC4741, MC4741C
Figure 1. Power Bandwidth
(Large Signal Swing versus Frequency)

Figure 2. Open-Loop Frequency Response

28

120

-a 24

100

6.

~

w

(!l

20

0

16

~

>

ii5'

1\

=>
c..
=>

0

~

~

\

ll-

:s.
z

12

11jH? 1<1 ~~I

0

1111111
10

\
1.0 k
f. FREQUENCY (Hz)

100

!:§
§Z

40

..:.

20

§Z

«

10 k

-a
~

Tl~VI

(!l

~

§Z

5
1=

±9fOY

/..
'V
/1/
IP""

5

±6fOY

6
:>

.AfIY

500 700 1.0 k

10

100

'" """

1.0k

10k

~

lOOk

2.0 k

'"

1.0M

5.0k7.0kl0k

-15
-14
-13
-12
-11
-10
-9.0
-8.0
-7.0
-6.0
-5.0
./
-4.0
./
-3.0 " , .
-2.0
-1.0
100
200

RI,. LOAD RESISTANCE (n)

Figure 5. Output Voltage Swing versus
Load Resistance (Single Supply Operation)

J I
±15 VSupplies

JJ
+12V

"j=9py

"

±6.0V

500 700 1.0 k
2.0 k 5.0 k 7.0 k 10 k
RL. LOAD RESISTANCE (n)

Figure 6. Noninverting Pulse Response

28 30V Supply

-a 26
6. 24

'r-- 27V

!;!! 20

24V

~ 22

~ 18 r-~

~

§Z

5
c..
5

C!.

~

r'\.

I

~IV

16
lBV
14
I
12
15V
10
B.O 'r-- 112 V
6.0
9.0V
4.0
2.0 1--6.0V
o 5.0V
1.0 2.0

.I
I

r\.

B.O

9.0

10

10 I!s/DIV

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-192

Output

"' '\.

Input

3.0 4.0 5.0 6.0 7.0
RI,. LOAD RESISTANCE (kW)

10M

Figure 4. Negative Output Voltage Swing
versus Load Resistance

6.

200

0
-20
1.0

lOOk

±15 VSupplies

1.0 100

~

f. FREQUENCY (Hz)

9.0

8.0
5 7.0
~ 6.0
o 5.0
~ 4.0
3.0
2.0

60

~

Figure 3. Positive Output Voltage Swing
versus Load Resistance
15
14
-a 13
6. 12
~ 11
~ 10

~

(!l

§Z

8.0 f- Voltage Follower
4.0

w

80

MC4741, MC4741C
Figure 7. Bi-Quad Filter
10=_12nRC

R

R

lOOk

RI =QR

C
1/4
MC4741

R2 = B!..
TBP
R3 = TNR2
CI = 10C

lOOk
1/4
MC4741
Vrel
Bandpass
Output

Vrel
RI

R2

R3

1
Vrel=2'VCC
R = 160kn
C=O.OOl r.tF
RI =1.6Mn
R2=1.6Mn
R3=1.6Mn

Vrel

CI

For: 10 = 1.0 kHz
Q=10
TBP= 1
TN = 1

x}


....

...-

....

Figure 9. Transient Response Test Circuit

80
75
70

o

2.0

4.0

6.0

8.0

10

12

14

16

18

20

VCC, IVEEI, SUPPLY VOLTAGES M

Figure 10. Absolute Value DVM Front End
0.5r.tF

2 MCI505
900k
+ 1/4
MC4741
lOOk

VCC

Common Mode Adjust
1/4
MC4741
+

lk

MC4741 Quad Op Amp

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-193

Polarity

MC33076

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Advance Information

Dual High Output Current
Low Power, Low Noise
Bipolar Operational Amplifier
The MC33076 operational amplifier employs bipolar technology with
innovative high performance concepts for audio and industrial applications.
This device uses high frequency PNP input transistors to improve frequency
response. In addition, the amplifier provides high output current drive
capability while minimizing the drain current. The all NPN output stage exhibits
no deadband crossover distortion, large output voltage swing, excellent phase
and gain margins, low open-loop high frequency output impedance and
symmetrical source and sink AC frequency performance.
The MC33076 is tested over the automotive temperature range and is
available in an 8 pin SOIC package (0 suffix) and in both the standard 8 pin DIP
and 16 pin DIP packages for high power applications.

DUAL HIGH OUTPUT
CURRENT OPERATIONAL
AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

P1 SUFFIX
PLASTIC PACKAGE
CASE 626

PIN CONNECTIONS

• 100 Q Output Drive Capability
O~p~1

• Large Output Voltage Swing
• Low Total Harmonic Distortion

1

8

Vee

2

7

O~~2

6

}

Inputs 1 {

• High Gain Bandwidth: 7.4 MHz
• High Slew Rate: 2.6 V/l!s

VEE

Inputs 2

4

'----'

• Dual Supply Operation: ±2.0 V to ±18 V

(8 Pin Pkg, Top View)

• High Output Current: ISC = 250 mA typ
• Similar Performance to MC33178

P2SUFFIX
PLASTIC PACKAGE
CASE648C
DIP (12+2+2)

Equivalent Circuit Schematic
(Each Amplifier)
VCCo-~--~----~----~~--~r_--+-~

PIN CONNECTIONS

Inputs 1 {

NC

1

3

VEE {

4

Inputs 2 {

7

Vin- O---.----l
9

O~ut2

(16 Pin Pkg, Top View)

ORDERING INFORMATION
Device

Temperature Range

Package

MC33076D
MC33076Pl
MC33076P2

-40° 10 85°C

SO-8
Plastic DIP
Power Plastic

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-194

MC33076
MAXIMUM RATINGS
Symbol

Value

Unit

Power Supply Voltage (Note 2)

Rating

VCCtoVEE

+36

V

Input Differential Voltage Range

VIDR

(Note 1)

V

Input Voltage Range

VIR

(Note 1)

V

Output Short Circuit Duration (Note 2)

tsc

5.0

sec

Maximum Junction Temperature

TJ

+150

'c

Storage Temperature

Tstg

-60 to +150

'C

Maximum Power Dissipation

Po

(Note 2)

mW

NOTES:

•

1. Either or both Input voltages should not exceed Vee or VEE.
2. Power dissipation must be considered to ensure maximum Junction temperature (TJ)
Is not exceeded (see power dissipation performance characteristic, Figure 1.
See applications section for further information.

DC ELECTRICAL CHARACTERICISTICS (VCC = +15 V, VEE =-15 V, TA = 25'C, unless otherwise noted.)
Characteristics
Input Offset Voltage (RS = 50 Q, VCM = 0 V)
(VS = ±2.5 V to ±15 V)
TA = +25'C
TA = -40' to +85'C

Figure

Symbol

2

IVlol

Min

Max

0.5
0.5

4.0
5.0

AVIO/AT

Input Bias Current (VCM = 0 V)
TA = +25'C
TA = -40' to +85'C

3,4

Input Offset Current (VCM = 0 V)
TA = +25'C
TA = -40' to +85'C

liB

11101

!!V/'C

-

2.0

-

-

100

500
600

-

5.0

-13

-14
+14

nA

5

Large Signal Voltage Gain (VO =-10 V to +10 V)
(TA= +25'C)
RL= 100 Q
RL= 600 Q
(TA = -40' to +85'C)
RL= 600 Q

6

Output Voltage Swing (VID = ±1.0 V)
(VCC = +15 V, VEE = -15 V)
RL= 100Q
RL= 100Q
RL = 600 Q
RL = 600 Q
(Vce = +2.5 V, VEE = -2.5 V)
RL= 100 Q
RL= 100 Q

VICR

-

nA

-

Common Mode Input Voltage Range

-

70
100
V
13
kVN

AVOL

-

-

25
50

200

-

25

-

-

7,8,9

V
VO+
VoVO+
Vo-

10

13

-

+11.7
-11.7
+13.8
-13.8

-10

-13

-

VO+
Vo-

1.2

-

+1.66
-1.74

80

116

-

80

120

-

Common Mode Rejection (Vin = ±13 V)

10

CMR

Power Supply Rejection
(VCCNEE = +15 V/-15 V, +5.0 V/-15 V, +15 V/-5.0 V)

11

PSR

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-195

Unit
mV

-

Input Offset Voltage Temperature Coefficient
(RS = 50 Q, VCM = 0 V)
TA = -40' to +85'C

Typ

-1.2
dB
dB

I

MC33076
DC ELECTRICAL CHARACTERICISTICS (VCC = + 15, VEE = -15 V, TA = 25"C, unless otherwise noted,)
Characteristics
Output Short Circuit Current (VID
(VCC = +15 V, VEE = -15 V)
Source
Sink
(VCC = +2.5 V, VEE = -2.5 V)
Source
Sink

= ±1.0 V Output to Gnd)

Figure

Symbol

12,13

ISC

Min

Typ

63

-

= 0 V)

14

Unit
mA

190

Power Supply Current per Amplifier (VO
(VS = ±2.5 V to ±15 V)
TA = +25"C
TA = -40" to +85"C

Max

-

+250
-280

-215

+94
-80

-46

mA

ID

-

2.2

-

2.8
3.3

AC ELECTRICAL CHARACTERICISTICS (VCC = +15 V, VEE = -15 V, TA = 25"C, unless otherwise noted.)
Characteristics
Slew Rate (Vin = -10 V to +10 V, RL
CL = 100 pF, AV = + 1)
Gain Bandwidth Product (f

= 100 D,

= 20 kHz)

= 600 D,

CL

Symbol

15

SR

= 0 pF)

1.2

2.6

-

Max

Unit

VI/ls
7.4

-

MHz

-

3.5

-

MHz

Am

-

15

-

dB

19,20

52

-

Deg

19,20

= 600 D, CL = 0 pF)

Typ

4.0

-

= 600 D, CL = 0 pF)

Min

fU

16

Unity Gain Frequency (Open-Loop) (RL
Gain Margin (RL

Figure

GBW

Om

-

Channel Separation (f

= 100 Hz to 20 kHz)

21

CS

-120

-

dB

Power Bandwidth (VO

= 20 Vp_p , RL = 600 D, THD ~ 1%)

-

BWp

-

32

-

kHz

22

THD
-

-

0.0027
0.011
0.022

-

Ilol

-

75

-

D
kQ

Phase Margin (RL

Total Harmonic Distortion (RL
f = 1.0 kHz
f = 10 kHz
f = 20 kHz

= 600 D, Vo = 2.0 Vp_p , AV = + 1)

%

Open-Loop Output Impedance (VO

= 0 V, f = 2.5 MHz, AV = 10)

23

Differential Input Resistance (VCM

= 0 V)

-

Rin

-

200

-

-

Cin

-

10

-

24

en

Differential Input Capacitance (VCM
Equivalent Input Noise Voltage (RS
f= 10 Hz
f = 1.0 kHz

= 0 V)
= 100 D)

-

Equivalent Input Noise Current
f= 10 Hz
f = 1.0 kHz

-

7.5
5.0

-

0.33
0.15

-

in

pNNz

-

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-196

pF
nV/Nz

-

MC33076
Figure 1. Maximum Power Dissipation
versus Temperature
{

4000

i!5

3500

~
gj

3000

15

25.--.---r---r--'---.---r--'---.--~

"- ~

See Application Section
for Further Information

2000

~

1500

::l

:;;

1000

~~

~
~ 20 1---1---+---+---1-w

u::

~ MC33076P2

::J
0..

2500

~

Figure 2. Distribution of Input
Offset Voltage

"b... .........

i"'---..

~MC33076Pl

............

I--.

~

500

I

o-60

-30

i'"'"---..

--

~ 15r-~---+--~.
u.

o
~ 101---1---+---

""-

"'""
...............

-

~

1'00.-..............

0
30
60
90
TA. AMBIENTTEMPERATURE (0C)

120

5 r--i---t---

0..

~~ ~

~2.0

150

-1.5

2.5

Figure 3. Input Bias Current versus
Common Mode Voltage
250

<"
.s
a:
a:

225

\.

200

U

150

!9

125

a;

!z

~112

...........

'"I-~ 100

...............

a;

.............

-15

-10

./

a
............

100

./

~ 125

1'00..

175

5'"
0..

:[ 137

\..

::l

~

150

1

VCC=+15V VEE =-15V TA = 25°C -

I-

z
w

Figure 4. Input Bias Current
versus Temperature

-5.0

0

5.0

~

r-10

./
./

V

88
75

-55

15

-25

VCM. COMMON MODE VOLTAGE (V)

Figure 5. Input Common Mode Voltage
Range versus Temperature
VCC

VCC I=+5.0Vtol+18V _
VEE =-5.0Vto-18V

VCC-0.50

~VIO=5.0mV

-

_120

'"

:Eo

~ 115

r--.... .....
.......

c:J

w

~ 110
!:j

VCC-0.75

o

;;: 105

VCC-l.0

-...

~~
-25

5.0
35
65
TA. TEMPERATURE (0C)

95125

9

ffi 100
0..

o

..:I

~

95

-

"""-

o

VEE+O·I25

VEE_55

VCC =+15V VEE =-15V VCM =OV I
5.0
35
65
95
125
TA. AMBIENT TEMPERATURE (OC)

Figure 6. Open-Loop Voltage Gain
versus Temperature

VCC-O.25

~

V

--

VCC=+15V
VEE=-15V
f=10Hz

~VO=-1010+10V

90

-55

-25

.....

---

RL =2.0 kO

RL=IOO0

~

I ............

I

5.0
35
65
TA. AMBIENT TEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-197

"-

I
I

--.......

--

95

125

MC33076
Figure 7. Output Voltage Swing
versus Supply Voltage
40

c:,

35

~

30

'"
!:3

25

f-

TA = 25"C

20

/

~

0.
f-

15

:3

10
5.0

V

5.0

TA

~25

'"~ 20

~~=1000

'"!:3 15
~

~ 10

0.
f-

~

lO

o

10
15
20
Vcc, IVEE!. SUPPLY VOLTAGE (V)

71r(1111

o

25

10

20

'"
!:3
0

15

......

2

QSO

t;
w

w

>

10

~

0

>0 5.0

Lil

or: 60
w

f"'."

:;;

VCC = +15 V
VEE=-15 V
VCM = OV
L\.VCM=±1.5V

240

o:;;

:;;

o

C>

\r--,

TfLI]IUI
100
1.0k

t,

10k
FREQUENCY (Hz)

tOOk

20

0:

:;;

C>

1.0M

o

10

r-.
SO

.§loo
!z
w

60

~

0.
0.

~

or:

III
40
VCC = +15 V
VEE = -15 V
L\.VCC=±1.5V

w

s:
0
0.

20

0:
en
0.

o

10

?lllllr

IIIII

.....

"

w

en

I
1.0 k

10 k

1.0M

100 k

~

C>

Lil
or:

Tif

Figure 12. Output Short Circuit Current
versus Output Voltage

100
1C
B
2

Tn 1IIIIIr
100

' ...
t, FREQUENCY (Hz)

Figure 11. Power Supply Rejection
versus Frequency Over Temperature

0

"

'"o

VCC= +15 V
VEE=-15V
RL=1000
AV= +1.0
THD =,;; 1.0%

o

;:::

10 k

100

1C
B

.....

c:,
~

~

100
1.0 k
RL, LOAD RESISTANCE TO GROUND (0)

Figure 10. Common Mode Rejection
versus Frequency Over Temperature

25

f-

...... ~~V

/

w

Figure 9. Output Voltage
versus Frequency

0.
f-

~ 25lCI

t = 1.0 kHz

2

£. V

o
o

30

l
/
RL=I0/i' . /

/./

~

0

c:,

/

w

~

Figure 8. Maximum Peak-to-Peak Output
Voltage Swing versus Load Resistance

1.0 k

r-..

~

C>

5200

r--."

\

-PSR

"

tl i111111~

100

-

G§250

;p~~111

10 k
100 k
t, FREQUENCY (Hz)

Source

C>

a:

°150

............

...........

-"'" Sink

"'""-

~

Ii:
o

1)5100
f-

~

0.

~ 50

~l'I'
1.0M

o
~O

=

10M

,\'\.

I- VCC=+15V
I- VEE = -15 V
I- VID = ±1.0 V

'"

~

I

0

3.0

6.0
9.0
IVol, OUTPUT VOLTAGE (V)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-198

12

"\
15

MC33076
Figure 13. Output Short Circuit Current
versus Temperature

1

320

~

300

!z
a:

:::>

280

U

to

-...........

:::>

~

260

"otx:

240

:I:

en

5

!3o

............ r-.,

VCC =+15V
220 r-VEE=-15V
VID = ±1.0 V
200 r- RL<10(

"0 180
en
-55

-25

1

~

r---.......

Figure 14. Supply Current versus
Supply Voltage With No Load

Sink 1 _

""

5.0

~ 4.0
u..

::J
0..

.....

::;;
~ 3.0

............

I

z
w
a:

~u;:

~

~
en
Ci

..........

5.0
35
65
TA, AMBIENT TEMPERATURE (0G)

95

en
~

~

2.5

....-

2.0

--

125

3.0

-

- VCC=+15V
0.5 - VEE = -15 V
_ AVin = 20 Vp-p

I

o-55

-25

N

:I:

~
U

:::> 8.0

e
0
a:

0..

:I:

r------

i,

I--I--I---

~ =
+

loon

I

_ 100pF

1

5.0
35
65
TA, AMBIENT TEMPERATURE (0G)

-

30

~

~

10

w

.....

...... ~

2A

95

;;:

C!:I

125

...........

~ 1~

1:§ -10
lA) Phase, Vs = ±18 V
~
- 2A) Phase, Vs = ±1.5 V

I""'r::

"

- lB) Gain, Vs = ±18 V
-30 _ 2B) Gain, Vs = ±1.5 V

"'1"""

""-.~

1.0M
I, FREQUENCY (Hz)

10M

\

I"

...........

6.0 :-- RL = 1000
'-- CL=OpF

I

5.5
-55

50

en
ttl

200

_ 30

a:
C!:I
w
e

'":Eo
z

~
:I:

w

C!:I

en
en

1:§
o- 10
>

160 W"

~\
~

.f

-50
lOOk

120

I'~

2B"""o:::~

...........

-25

5.0
35
65
TA, AMBIENT TEMPERATURE (OC)

"

.........

95

125

Figure 18. Voltage Gain and Phase
versus Frequency

11A

I""-

18

~

7.0

'"

C!:I

80

I":~

III

C!:I

....... r-...

e
z
I-- VCC=+15V
..:
z 6.5 I-- VEE = -15 V
;;:
I-- I=100Hz

'"

-

J

I

:;;:

Figure 17. Voltage Gain and Phase
versus Frequency
50

r--......

7.5

e

'.\Vin

15

8.5

I-

l-

1.0

a:
en

6.0
9.0
12
VCC IVEE!. SUPPLY VOLTAGE M

Figure 16. Gain Bandwidth Product
versus Temperature

i""""

1.5

~
en

TA = -55°C

/
II

1.0

Figure 15. Slew Rate
versus Temperature
3.0

TA= +25°C

Y

0..

........

-

/ / ,.....

§ 2.0

u

.............

/

III

Tl = +1250C I

0..

w

~

240 w.

is)

280
30M

.........

1'"
....... r-.

-

~ 10

.f:-30

80

en

120 ttl

~

..............

a:

~

160W"

...

1A) Phase, (R = 100 a)
2A) Phase, (R = 100 D, C = 300 pF)
lB) Gain, (R = 100 a)
2B) Gain, (R = 100 D, C = 300 pF)

-50
100 k

"

, """1.0M r,
I, FREQEUNCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2·199

~

~A_

200 en

1~2B'\ t---\.

u
240i:Ll•

~~

'k'if ~

III
10M

0..

280
30M

ffl

is)

MC33076
Figure 19. Phase Margin and Gain Margin
versus Differential Source Resistance
50

20

1D

16

:E.

z

aa:

«
::;;

VCC=+15V
VEE = -15 V
Rr= R1 + R2
Vo=OV
TA = 25°C

\
,\

"'-

12

z


0_

0

2.0 «E

0
2000

1600

1.5

~ 0.5
ci

""-

60
40

~

z
w
4.0 a.

VEE=-15V
VCM=OV
VO=OV

;;§
::>

0

I

JCCI=I+WU '
2.5 _ VEE=-15V
RL=100Q
Vo = 2.0 Vp·p
2.0 - TA=25°C

...J

;:;

Figure 23. Output Impedance
versus Frequency

9:
w

a.

::;;

90 -

100

1200

<'J

Figure 22. Total Harmonic Distortion
versus Frequency

en

...J

800

6.0

;;;:

CL, OUTPUT LOAD CAPACITANCE (pF)

Figure 21. Channel Separation
versus Frequency

1D 130
:E.

«
::;;
10 z

~40r-~~~-----r----~--~--T-----~

20 ~

--- -

a

12 a:

z

aa:

~

z

VEE= -15 V
VO=OV

<'J

ill
~

1D
14 :E.

50 ~-----t-------t-----_t- VCC = +15 V

a:

«

P ase Margin

4.0

40

16

6or-----.------,-----,------,-----~

~Ok

AV= 10

1-- .....

-'" f'

~1.0

100k
1.0M
t, FREQUENCY (Hz)

10M

100

1.0k
t, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-200

10k

100k

MC33076
Figure 26. PC Board Heatsink Example

Figure 25. Percent Overshoot
versus Load Capacitance
100

~ 80
afa

r-

,

Vc6=tlJJ
VEE=-15V
TA= 25°C

I

J:

en
a:
w

60

!z
w

40

>
a

/'

a:
w

0..

en
a

20

I

/

RL = 2.0 kQ

u

I

~

,/"" ..... ~i-"

R = 100Q

I II
100
1000
CL, LOAD CAPACITANCE (pF)

10 k

APPLICATIONS INFORMATION
The MC33076 dual operational amplifier is available in the
standard 8 pin plastic dual-in-line (DIP) and surface mount
packages, and also in a 16 pin batwing power package. To
enhance the power dissipation capability of the power
package, Pins 4, 5, 12, and 13 are tied together on the
leadframe, giving it an ambient thermal resistance of 52°CIW

typically, in still air. The junction to ambient thermal resistance
(RaJA) can be decreased further by using a copper pad on
the printed circuit board (as shown in Figure 26) to draw the
heat away from the package. Care must be taken not to
exceed the maximum junction temperature or damage to the
device may occur.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-201

MOTOROLA

MC33077

SEMICONDUCTOR-----TECHNICAL DATA

Dual, Low Noise
Operational Amplifier
The MC33077 is a precision high quality, high frequency,low noise monolithic
dual operational amplifier employing innovative bipolar design techniques.
Precision matching coupled with a unique analog resistor trim technique is used
~o obtain low input offset voltages. Dual-doublet frequency compensation
techniques are used to enhance the gain bandwidth product of the amplifier. In
addition, the MC33077 offers low input noise voltage, low temperature
coefficient of input offset voltage, high slew rate, high AC and DC open-loop
voltage gain and low supply current drain. The all NPN transistor output stage
exhibits no deadband cross-over distortion, large output voltage swing,
excellent phase and gain margins, low open-loop output impedance and
symmetrical source and sink AC frequency performance.
The MC33077 is tested over the automotive temperature range and is
available in plastic DIP and SO-8 packages (P and 0 suffixes).
•
•
•
•
•
•
•
•
•
•

DUAL, LOW NOISE
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT

PSUFFIX
PLASTIC PACKAGE
CASE 626

Low Voltage Noise: 4.4 nV/-.fHZ @ 1.0 kHz
Low Input Offset Voltage: 0.2 mV
Low TC of Input Offset voltage: 2.0 jlV/oC
High gain Bandwidth Product: 37 MHz @ 100 kHz
High AC Voltage Gain: 370@ 100 kHz
18S0@20 kHz
Unity Gain Stable: with Capacitance Loads to SOO pF
High Slew Rate: 11 V/jlS
Low Total Harmonic Distortion: 0.007%
Large Output Voltage Swing: +14 V to -14.7 V
High DC Open-Loop Voltage Gain: 400 k (112 dB)

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-S)

• High Common Mode Rejection: 107 dB
• Low Power Supply Drain Current: 3.S mA
• Dual Supply Operation: ±2.S V to ±18 V
PIN CONNECTIONS
Equivalent Circuit Schematic (Each Amplifier)

Vcp

Output 1 1 1 - - - - ,

Vee
7 Output2

R18

Vout

(Dual, Top View)

R19
Q22

ORDERING INFORMATION
RIO

R20

05

VEE

Device

Ambient Test
Temperature Range

MC33077D
MC33077P

-40° to +S5°C

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-202

Package
SO·S
Plastic DIP

MC33077
MAXIMUM RATINGS
Rating

Symbol

Value

Unit

Vs

+36

V

Supply Voltage (Vee to VEE)
Input Differential Voltage Range

VIDR

(Note 1)

V

Input Voltage Range

VIR

(Note 1)

V

Output Short Circuit Duration (Note 2)

tse

Indefinite

sec

Maximum Junction Temperature

TJ

+150

°e

Storage Temperature

Tstg

-60 to + 150

°e

Maximum Power Dissipation

PD

(Note 2)

mW

DC ELECTRICAL CHARACTERISTICS (Vee

= +15 V,

VEE

= -15 V, TA = 25°C, unless otherwise noted.)

Characteristics
Input Offset Voltage (RS
TA = +25°C
TA = -40° to +85°e

Symbol

= 10 n, VeM = 0 V, Vo = 0 V)

L\.VIOIL\.T

= 0 V,

liB

Input Offset Current (VCM
TA = +25'C
TA = -40° to +85°C

Vo

= 0 V)

= 0 V, Vo = 0 V)

Large Signal Voltage Gain (VO
TA = +25°e
TA = -40° to +85°C
Output voltage Swing (VID
RL = 2.0 kQ
RL = 2.0 kn
RL = 10 kQ
RL = 10 kQ

= ±1.0 V,

RL

0.13

-

-

-

2.0

-

-

280

-

1000
1200

-

15
-

180
240

mV, Vo

= 0 V)

VICR

= 2.0 kn)

±13.5

±14

-

V
VIV

AVOL
-

150 k
125 k

400 k

VO+
VaVO+
Va-

+13.0

+13.6
-14.1
+14.0
-14.7

CMR

85

107

-

dB

PSR

80

90

-

dB

+10
-20

+26
-33

+60
+60

3.5

4.5
4.8

-

V

= ±13 V)

Power Supply Rejection (Note 3)
VCCIVEE = +15 VI -15 V to +5.0 VI -5.0 V
Output Short circuit current (VID
Source
Sink

IlV/ o C

nA

110

,= 5.0

Unit

nA

= ±1.0 V)

Common Mode Rejection (Vin

Power Supply Current (Va
TA = +25°C
TA = -40° to +85°e

Max
1.0
1.5

-

Common Mode Input Voltage Range (L\.VIO

Typ

mV

-

Average Temperature Coefficient of Input Offset Voltage
RS = 10 n, VeM = 0 V, Va = 0 V, TA = -40' to +85°e
Input Bias Current (VCM
TA = +25°C
TA = -40° to +85°C

Min

IVlol

= ±1.0 V, Output to Ground)

+13.4

-

-13.5

-14.3

rnA

ISC

= 0 V, All Amplifiers)

rnA

ID

-

NOTES: 1. Either or both input voltages should not exceed Vee or VEE (See Applications Information).
2. Power dissipation must be considred to ensure maximum junction temperature (TJ) is not exceeded
(See power dissipation performance characteristic, Figure 1).
3. Measured with VCC and VEE simultaneously varied.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-203

-

MC33077

AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25°C, unless otherwise noted.)
Symbol

Min

Typ

Max

Unit

SR

B.O

11

-

V/I1S

Gain Bandwidth Product (I = 100 kHz)

GBW

25

37

-

MHz

AC Voltage Gain (RL = 2.0 kn, Vo = 0 V)
f=100kHz
1=20 kHz

AVO

-

370
1850

-

Characteristics
Slew Rate (Vin = -10 V to +10 V, RL = 2.0 kn, CL = 100 pF, AV = +1.0)

VN

Unity Gain Frequency (Open-Loop)

IU

-

7.5

-

MHz

Gain Margin (RL = 2.0 kn, CL = 10 pF)

Am

-

10

Phase Margin (RL = 2.0 kn, CL = 10 pF)

0m

-

55

-

Degrees

dB

CS

-

-120

-

dB

Power Bandwidth (VO = 27p- p, RL = 2.0 kn, THD ~ 1%)

BWp

-

200

-

kHz

Distortion (RL = 2.0 kn)
AV = +1.0, f = 20 Hz to 20 kHz
VO=3.0Vrms
AV = 2000, f = 20 kHz
VO=2.0Vp_p
VO= 10Vp_p
AV = 4000, f = 100 kHz
VO=2.0Vp _p
VO= 10Vp_p

THD

Open-Loop Output Impedance (VO = 0 V, f = fU)

IZol

Channel Separation (I = 20 Hz to 20 kHz, RL = 2.0 kn, Vo = 10 Vp _p)

Differential Input Resistance (VCM = 0 V)

RIN

Differential Input Capacitance (VCM = 0 V)

CIN

Equivalent Input Noise Voltage (RS = 100 Q)
1= 10 Hz
1= 1.0 kHz

en

Equivalent Input Noise Current (F = 1.0 kHz)
1= 10 Hz
1= 1.0 kHz

in

Figure 1. Maximum Power Dissipation
versus Temperature

%

-

0.007

-

-

0.215
0.242

-

-

0.3.19
0.316

-

-

36
270

-

15

-

-

6.7
4.4

-

-

1.3
0.6

-

Q

kn
pF
nV/fHz

pA/fHz

Figure 2. Input Bias Current
versus Supply Voltage

)

§" 2400

800

..§.
z

o 2000

~
en

........

l5 1600

~

a:

~

:;;
:::>
:;;

~

i

c

"-

........

N

~
w 600
a:
a:

......... r-.., r!!C3307b ........
800
.... r-..,
400

-40 -20

1

f--VCM=OV
TA = 25°C

:::>

C3307P

(.")

~
co

1200

o-60

.1.

~

"r-....

400

I-

:::>

t'-.

r"- ~

r--- -.....

"iii!: 200

!!!

~

0 20 40 60 80 100 120 140 160 180
TA, AMBIENT TEMPERATURE (OC)

o
o

2.5

5.0
7.5
10
12.5
15
VCC, IVEEI, SUPPLY VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-204

17.5

20

MC33077
Figure 3. Input Bias Current
versus Temperature
1000

~
....
z

800

Figure 4. Input Offset Voltage
versus Temperature

::>

:>

.s
w
C!l

VCM = OV

!:3
>

600

tu

(/J

u..
u..

(/J

....'"
::>

400

a.

~

E!i

0.5

0

()

~

200

~

o

-55

0

....
::>

-

a.
~

0

:>

-25

25

50

75

100

I---- VCC = +15 V
VEE = -15 V
-0.5 I---- RS = 10 Q
VCM = OV
r--- Ay= +1.0 I
-1.0
-55

125

-25

o

a:
a:

400

r-

()
(/J

300

-

a.

200

~

E!i

•I

g VCC -1.0
~ VCC-1.5
c

o
:;;

~

z

0

:;;
:;; VEE +1.5
0

()

....
::>

100

-15

125

•

-5.0

5.0

10

.;:, VEE +0.0
S2
-55

15

Figure 7. Output Saturation Voltage versus
Load Resistance to Ground

I
I

~

-55'C

Il I

/I 1~25'C
r--

25'C

,125'C

25'C\\

I"

-55'C

I
0.5

-1.0

50

75

100

1....

50

a
....

40

()

a:

C3

t;:

30

--- -.......
,/'

o

. - ....

Sourc?

-.......

(/J

~

VCC=+15V
VEE=-15V
VID =±1.0V
RL < 100Q

~k

:J:

----r--r--r-

I---.

~

20

o
1.5

2.0

2.5

3.0

RL, LOAD RESISTANCE TO GROUND (kQ)

~

10
-55

-25

0

25

50

75

TA, AMBIENT TEMPERATURE ('C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-205

125

Figure S. Output Short Circuit Current
versus Temperature

:5

VCC = +15 V I - VEE = -15 V I--

25

TA, AMBIENT TEMPERATURE ('C)

z
w
a:
a:

......

-VCM

o

-25

>

VCM, COMMON MODE VOLTAGE M

~

I

VEE +1.0

a. VEE +0.5

-10

VCC = +3.0 Vl0 +15 V
VEE = -3.0 Vto -15 V
Ll VtO = 5.0 mV
Vo =OV

Input
Voltage
Range

~

o

100

+VCM

w

C!l

--

I--

1i5

....
::>

~
a: VCC -0.5

I
II
VCC=+15V VEE = -15 V TA = 25'C -

::>

«

75

~ VCC 0.0

600
500

50

Figure 6. Input Common Mode Voltage Range
versus Temperature

Figure 5. Input Bias Current versus
Common Mode Voltage

~
....
z

25

TA, AMBIENT TEMPERATURE ('G)

TA, AMBIENT TEMPERATURE ('G)

w

III

1.0

I

f- VCC=+15V
f- VEE = -15 V

w

a:
a:

I

I---.

r--

100

125

MC33077
Figure 9. Supply Current
versus Temperature

Figure 10. Common Mode Rejection
versus Frequency
_ 120

5.0

""

llVCM~llVO

:Eo

:z

~>O
!z
w

g§ 3.0

a
~

8::

~

±5.0V

~

100

~ii3

±15V

80

a:

c

:;

~

VCM=OV -

~1.0

VO=OV

0

RL=~

:;
:;

40

a:
:;

20

8

-

u

-25

0
25
50
75
TA. AMBIENT TEMPERATURE (OC)

100

XADM)

60

0

:z

-55

CMR = 20Log (ll VCM
........
llVO

w

2.0

o

~

T~=12il~1II I

o

125

r"-..

VCC= +15V
VEE=-15V
VCM=OV
&VCM=±1.5V

100

Figure 11. Power Supply Rejection
versus Frequency

1.0 k

10k
lOOk
t. FREQUENCY (Hz)

1.0M

10M

Figure 12. Gain Bandwidth Product
versus Supply Voltage
"N
::t:

48

RL=10kn
CL=OpF
t=lookHz
TA=25°C

~

t) 44

is
~

40

i=
e

36

;a

32

C!l

28

C!l

24

~
:z

/

:z
;;:

~

1.0k

10k
t. FREQUENCY (Hz)

lOOk

100M

o

Figure 13. Gain Bandwidth Product
versus Temperature
"N
::t:
~

50

is

~

""c::t:

42

20

I

..........

r-....

38

~
~34

.........
...............

::;

~

Vp+

10

w

--............

~ 5.0
g 0

I!:

..........-

m 26

-55

~

~ ~L= 2.0kn

t::-..... ~F..............

C!. -10
~

~

....

-

-5.0

:::>

30

RL= 10kn ~

TA=25°C
15

5

~

:z

~

-15
RL=

-25

0
25
50
75
TA. AMBIENTTEMPERATURE (OC)

100

20

Figure 14. Maximum Output Voltage
versus Supply Voltage

VCC= +15VVEE=-15V t=lookHz _
RL=10kn
CL=O pF
-

t)46

5
10
15
VCC. IVEEI. SUPPLY VOLTAGE M

-20

125

o

10kn~

5.0
10
15
Vee. /VEEI. SUPPLY VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-206

~L= 2.0kn

20

MC33077
Figure 15. Output Voltage
versus Frequency

Figure 16. Open-Loop Voltage Gain
versus Supply Voltage

~
'"
'"
'"
~
z
«
C!J

30

-a. 25
0-

~

w

C!J

!:i0
>

\

20

:::>

!:i

15
10
5.0

o

100

600

0

VCC = +15 V
VEE = -15 V
RL =2.0kQ
AV = +1.0
THD~ 1.0%
TA = 25'C

0

~

800

w

:::>

I-

RL =2.0 kQ
1= 10 Hz
l>. Vo = 2/3 (VCC -VEE)
TA = 25'C

1000

C!J

I-

c.

1200

".

>

c.
0

400

zw

200

9

c.
Q

....I

0

1.0k

10k
I, FREQUENCY (Hz)

lOOk

1.0 M

o

~

o

5.0
10
15
VCC, IVEEI, SUPPLY VOLTAGE (V)

Figure 18. Output Impedance
versus Frequency

Figure 17. Open-Loop Voltage Gain
versus Temperature

~
'"
'"
'"

~
z

«

(,!)

w

600

I

i""'-..
550
500

'"

i""'-..

C!J

!:i
0

I'....

450

>

c.
0

9

80

I

VCC=+15V
VEE = -15 V
RL =2.0kQ
1= 10 Hz
l>.VO=-10Vl0+l0V-

...........

400

S.
w
C,,)

z
<
c

w

c.

........

--....

40
30

:::>
0

............

c. 350

..:.

N

§;

<

300
-55

-25

0
25
50
75
TA, AMBIENT TEMPERATURE ('C)

100

AV-l0

10

~

z

150

0

~

140

(J)

130

ZE
w

....I

~"o
./

Dri~~ Cha~n~1

l"I'H4I.
111111
IIIII1

z 120

<
:z:

(.)

110
100
10

....

CS = 20 Log
100

1.0 k
I, FREQUENCY (Hz)

'"
10 k

UI

100

1.0 k

VAv = 1.0

10 k
100 k
I, FREQUENCY (Hz)

1.0 M

10M

Figure 20. Total Harmonic Distortion
versus Frequency

~

1.0

VCC - +15 VVO - 2.0 Vp-p
VEE = -15 VTA = 25'C

z

VCC=+15V
VEE = -15 V
RL =2.0 kQ
l>.VOD = 20Vp•p
TA=25'C

= Measurement Channel

W
Z

en
(.)

I

I Ii

1_ .u.tH1I11

Figure 19. Channel Separation
versus Frequency
160

I

11·1111111/ Av=I?Y

o

125

r-..
Av=1000

20

0

0

I

VEE = -15V
60 I - VO=OV
TA = 25'C
50

c.

I-

..........

I-IJ661~1~15J

70

~
I-

:::>

zw

20

0

~

~
(J)
15

r-

±'

(.)

AV-+l0

Z

0

I IIII

::;;

I II1I
I 11II

c:r:
<
:z:

(~~~D)

~

!QQkl'!

0.Q1

~J,.

....I

Va

0.001

AV-+l.0

1111

10

100

1.0k
I, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-207

~

1111

d'
:z:

100 k

2.0kQ

RAl>L' .~

VinD- +

~

I-

AV=+1000

AV-+l00

0.1

10k

100 k

MC33077
Figure 21. Total Harmonic Distortion
versus Frequency
~

Figure 22. Total harmonic Distortion
versus Output Voltage

1.0
VCC - +15V
VEE- -15V
VO--l0Vp-p
TA = 25°C

:z

0

;::
a:

0

Ii; 0.1
C

100kO

2.0kO

~
V'In

+

~
z

1.0

;::
a:

0.5

CIl

0.1

0

Vo

g

<.:>

AV=+1000

C

0

::;;

AV = +100

0

<
:I:

AV = +10

-'

0.01

Z

::;;

.....

<

:I:

-'

0.05
0.01

1.0 k
I, FREQUENCY (Hz)

10k

lOOk

I

I

12

::t

~

/" ~

w

8.0

/

;;:

~

I

o

o

CD 180
~

:z
~ 140
w

~
0..

o

100

.. ,

2.5

AV= +100
AV= +10

r-.....

~in

TI

~

-

..

::t

~

Gaiii""

~F'

2.0kO _ I100PF

I

I-

I

-

60

-,

1"-..'-

..........

20

!;;:
a:

20

~
ffi

10

o

-55

20

10k

lOOk

1.0M

-25

I

+

2.0kn =

0
25
50
75
TA, AMBIENTTEMPERATURE (OC)

160

1\

14

z 12

aa:

<
::;; 10
z
~ 8.0

120 ~

10M

12

~ Tin
I~
r

~

w

--,

0..

0

:I:
0..
CIl

9

<.:>

~ 4.0

z

f:l

xw
200 .,;

I

1.0k

CD

e.

-60

10

Vo

100pF -

100

Figure 26. Open-Loop Gain Margin and Phase
Margin versus Output Load Capacitance

'1'100

I

VEE=-15V
n~'
30 I- AVin=20V
I---

I
17.5

...........

0..

o
~ -20
<
10

4.0
6.0
8.0
Vo, OUTPUT VOLTAGE (Vp-p)

CIl

-

VCC=+15V VEE = -15 V _ 40 fii
w
RL=2.0kQ _
w
a:
TA = 25°C
C!l
80 w

-- "

- ---

1

w

+

Phase

'

2.0

I- VCC=+15V

Figure 25. Voltage Gain and Phase
versus Frequency

'--

1

1 AV-+l.0

o

1

5.0
7.5
10
12.5
15
Vcc, IVEEI, SUPPLY VOLTAGE M

9

iii

--

-

n

en
c:C 4.0
en

~

40

I

r Vin = 2/3 (VCC -VEE)
TA = 25°C

2.0kO

Figure 24. Slew Rate versus Temperature

Figure 23. Slew Rate versus Supply Voltage
16

100kO

AV=+10001
I' 1 1

,

0.005

>- 0.001
100

VCC = +15 V
VEE = -15 V
1=20kHz
TA = 25°C

......

:I:

10

i:§

........

C

j!: 0.001

C!l

'"

~

g

AV-+l.0

c

~

'" ....... .........
"

a:

~

g

.

.'\

<.:>

Z

a:

\.

6.0

':2.0

240
100M

I, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-208

125

MC33077
Figure 27. Phase Margin versus
Output Voltage

Figure 28. Overshoot versus
Output Load Capacitance

70

en
w

100

60

CL=Op

e.

SO

CL= 100 pF

w

a:

(!)

w

z

aa:

40
30 t - - VEE=-ISV

:I:

t-20

w
~

D-

E

-e-

VCC=+ISV

10

-10

13

g

-S.O

----

~=SOODF
~:
,n

0
VO, OUTPUT VOLTAGE M

30
20

III

~

W

tb

3.0
2.0
10

100
1.0k
t, FREQUENCY (Hz)

% ~1 000
I>S
Z

3.0
2.0

a
!Jl

az
Q

w

~

~.

10k

0.1.5
lOOk

Figure 31. Phase Margin and Gain Margin
versus Differential Source Resistance
14

IIIIIII

12

a;z 10
aa: 8.0

s

«

I I ~1"1111

II I

I I 1111

z

6.0

1

4.0
2.0

o

1.0

"'1\
,

Vin~vo

:;;

~

Gai~

l00pF

~

I)

1

w
0.3 ::
0.2 iC

111111

1.0

':"

t-

-SSOC

w

(!)

130

t=1.0kHz
VCC=+ISV
TA=2SoC
VEE=-ISV
Vn (lolal) = -,J VnRsl2 +en2 +4KTRS

>

w
en

az
Q

w

a:
a:
w

10

u..

w

a:

...J

i$

g

,;; 1.010

>

100

1.0k
10k
lOOk
RS, SOURCE RESISTANCE (U)

Figure 32. Inverting Amplifer Slew Rate

o

VCC=+ISV
VEE=-ISV
Rr=Rl +R2
VO=OV
TA=25°C
70
10k

t, TIME (2.0 IlsJDlV)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-209

1000

Figure 30. Total Input Referred Noise Voltage
versus Source Resistant

I'

10
100
1.0k
Rr. DIFFERENTIAL SOURCE RESISTANCE (U)

~

10
100
Cl,. OUTPUT LOAD CAPACITANCE (pF)

Phase

.. V

VEE=-ISV

I

o

a:

I I III

Z

I

2.0ka

Vo

m~Caqd~SOC

S.O ~

1.0

Vottage

-.1.0

:

20

10

O.S

D-

c

40

T

CL

Currenl

Q

CD

S.O

II"

~ 10

~

~

VCC=+ISV
VEE=-ISV
TA=2SOC

!Jl

w

a:
w
>
0
Vo

2.0ka

50

S.O

:I:

en
0

'J'
~

10

~

I-

60 I-

in

~ VCC=+ISV

f- i\.Vin = 100 mV

en

CL = 300 pF

Figure 29. Input Referred Noise Voltage
and Current versus Frequency

~100
>
lM

TA=2SoC

t--

o

.s

I-

0
0

:;;

«

~

~""~'"
.i:w

80 I- JL.

1.0M

MC33077

Figure 33. Noninverting Amplifier Slew Rate

Figure 34. Noninverting Amplifier Overshoot

t, TIME (2.0 !is/DlV)

t, TIME (200 ns/DlV)

Figure 35. Low Frequency Noise Voltage
versus Time

w

(!:J

r:i

§;
w

rJ)

oz
5
c..
~

t, TIME (1.0 seelDlV)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-210

MC33077
APPLICATIONS INFORMATION
The MC33077 is designed primarily for its low noise, low
offset voltage, high gain bandwidth product and large output
swing characteristics. Its outstanding high frequency
gain/phase performance make it a very attractive amplifier for
high quality preamps, instrumentation amps, active filters and
other applications requiring precision quality characteristics.
The MC33077 utilizes high frequency lateral PNP input
transistors in a low noise bipolar differential stage driving a
compensated Miller integration amplifier. Dual-doublet
frequency compensation techniques are used to enhance the
gain bandwidth product. The output stage uses an all NPN
transistor design which provides greater output voltage swing
and improved frequency performance over more conventional
stages by using both PNP and NPN transistors (Class AB).
This combination produces an amplifier with superior
characteristics.
Through precision component matching and innovative
current mirror design, a lower than normal temperature
coefficient of input offset voltage (2.0 IlV/oC as opposed to 10
IlV/oC), as well as low input offset voltage, is accomplished.
The minimum common mode input range is from 1.5 V
below the positive rail (VCC) to 1.5 V above the negative rail
(VEE). The inputs will typically common mode to within 1.0 V
of both negative and positive rails though degradation in offset
voltage and gain will be experienced as the common mode
voltage nears either supply rail. In practice, though not
recommended, the input voltage may exceed VCC by
approximately 30 V and decrease below the VEE by
approximately 0.6 V without causing permanent damage to
the device. If the input voltage on either or both inputs is less
than approximately 0.6 V, excessive current may flow, if not
limited, causing permanent damage to the device.
The amplifier will not latch with input source currents up to
20 mA, though in practice, source currents should be limited
to 5.0 mA so as to avoid any parametric damage to the device.
If both inputs exceed VCC, the output will be in the high state
and phase reversal may occur. No phase reversal will occur
if the voltage on one input is within the common mode range
and the voltage on the other input exceeds VCC. Phase
reversal may occur if the input voltage on either or both inputs
is less than 1.0 V above the negative rail. Phase reversal will
be experienced if the voltage on either or both inputs is less
than VEE.
Through the use of dual-doublet frequency compensation
techniques, the gain bandwidth product has been greatly
enhanced over other amplifiers using the conventional single
pole compensation. The phase an gain error of the amplifier
remains low to higher frequencies for fixed amplifier gain
configurations.

With the all NPN output stage, there is minimal swing loss
to the supply rails, producing superior output swing, no
crossover distortion and improved output phase symmetry
with output voltage excursions. Output phase symmetry being
the amplifiers ability to maintain a constant phase relation
independent of its output voltage swing. Output phase
symmetry degradation in the more conventional PNP and
NPN transistor output stage was primarily due to the inherent
cut-off frequency mismatch of the PNP and NPN transistors
(typically 10 MHz and 300 MHz, respectively) used, causing
considerable phase change to occur as the output voltage
changes. By eliminating the PNP in the output, such phase
change has been avoided and a very significant improvement
in output phase symmetry as well as output swing has been
accomplished.
The output swing improvement is most noticeable when
operation is with lower supply voltages (typically 30% with
± 5.0 V supplies). With a 10k load, the output of the amplifier
can typically swing to within 1.0 Vofthe positive rail (VCC). and
to within 0.3 V ofthe negative rail (VEE), producing a 28.7 Vp _p
signal from ±15 V supplies. Output voltage swing can be
further improved by using an output pull-up resistor
referenced to the VCC. Where output signals are referenced
to the positive supply rail, the pull-up resistor will pull the output
to VCC during the positive swing and during the negative
swing, the NPN output transistor collector will pull the output
very near VEE. This configuration will produce the maximum
attainable output Signal from given supply voltages. The value
of load resistance used should be much less than any
feedback resistance so as to avoid excess loading and allow
easy pull-up of the output.
Output impedance of the amplifier is typically less than 50 n
at frequencies less than the unity gain crossover frequency
(see Figure 18). The amplifier is unity gain stable with output
capacitance loads up to 500 pF at full output swing over the
-55° to + 125°C temperature range. Output phase symmetry
is excellent with typically 4°C total phase change over a 20 V
output excursion at 25°C with a 2.0 kn and 100 pF load. With
a 2.0 kg resistive load and no capacitance loading the total
phase change is approximately one degree for the same 20 V
output excursion. With a 2.0 kQ and 500 pF load at 125°C the
total phase change is typically only 10°C for a 20 V output
excursion (see Figure 27).
As with all amplifiers, care should be exercised so as to
insure that one does not create a pole at the input of the
amplifier which is near the closed-loop corner frequency. This
becomes a greater concern when using high frequency
amplifiers since it is very easy to create such a pole with
relatively small values of resistance on the inputs. If this does

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-211

MC33077
occur, the amplifier's phase will degrade severely causing the
amplifier to become unstable. Effective source resistances,
acting in conjunction with the input capacitance of the
amplifier, should be kept to a minimum so as to avoid creating
such a pole atthe input (see Figure 31). There is minimal effect
on stability where the created input pole is much greater than
the closed-loop corner frequency. Where amplifier stability is
affected as a result of a negative feedback resistor in
conjunction with the amplifier's input capacitance, creating a
pole near the closed-loop corner frequency, lead capacitor
compensation techniques (lead capacitor in parallel with the
feedback resistor) can be employed to improve stability. The
feedback resistor and lead capacitor RC time constant should
be larger than that of the uncompensated input pole
frequency. Having a high resistance connected to the
noninverting input of the amplifier can create a like instability
problem. Compensation for this condition can be
accomplished by adding a lead capacitor in parallel with the
non inverting input resistor of such a value as to make the RC
time constant larger than the RC time constant of the
uncompensated input resistor acting in conjunction with the
amplifiers input capacitance.
For optimum frequency performance and stability careful
component placement and printed circuit board layout should
be exercised. For example, long unshielded input or output
leads may result in unwanted input output coupling. In order
to reduce the input capacitance, the body of resistors
connected to the input pins should be physically close to the
input pins. This not only minimizes the input pole creation for
optimum frequency response, but also minimizes extraneous
signal "pickup" at this node. Power supplies should be

decoupled with adequate capacitance as close as possible to
the device supply pin.
In addition to amplifier stability considerations, input source
resistance values should be low so as to take full advantage
of the low noise characteristics of the amplifier. Thermal noise
(Johnson Noise) of a resistor is generated by
thermally-charged carriers randomly moving within the
resistor creating a Voltage. The rms thermal noise voltage in
a resistor can be calculated from:
Enr = " 4k TR. BW
where:
k = Boltzmann's Constant (1.38 • 10-23 joules/k)
T = Kelvin temperature
R = Resistance in ohms
BW = Upper and lower frequency limit in Hertz.
By way of reference, a 1.0 kn resistor at 25°C, will produce
a 4.0 nV/-JHz of rms noise voltage. If this resistor is
connected to the input of the amplifier, the noise voltage will
be gained-up in accordance to the amplifier's gain
configuration, For this reason the selection of input source
resistance for low noise circuit applications warrants serious
consideration. The total noise of the amplifier, as referred to its
inputs, is typically only 4.4 nV/-JHz at 1.0 kHz.
The output of anyone amplifier is current limited and thus
protected from a direct short to ground, However, under such
conditions, it is important to not allow the amplifier to exceed
the maximum junction temperature rating. Typically for ±15 V
supplies, anyone output can be shorted continuously to
ground without exceeding the temperature rating.

Figure 36. Voltage Noise Test Circuit
(0.1 Hz to 10 HZp_p)

10Q

100k.Q

D.U.T.

>-~A.2.",Ok.Q'\r-""'_ _ _ _ _- l +
1/2
MC33071

100kQ
24.3kQ

4.3kQ

2211F

~
"~I

Nole: All capacilors are non·polarized.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-212

Scope
xl
Rin = 1.0MQ

110kQ

MC33078
MC33079

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Dual/Quad Low Noise
Operational Amplifiers

DUAL/QUAD
LOW NOISE
OPERATIONAL AMPLIFIERS

The MC33078/9 series is a family of high quality monolithic amplifiers
employing Bipolar technology with innovative high performance concepts for
quality audio and data signal processing applications. This family incorporates
the use of high frequency PNP input transistors to produce amplifiers exhibiting
low input voltage noise with high gain bandwidth product and slew rate. The all
N PN output stage exhibits no dead band crossover distortion, large output voltage
swing, excellent phase and gain margins, low open-loop high frequency output
impedance and symmetrical source and sink AC frequency performance.
The MC33078/9 family offers both dual and quad amplifier versions, tested over
the automotive temperature range and available in the plastic DIP and SOIC
packages (P and D suffixes).

•

DUAL

1

PSUFFIX

DSUFFIX

PLASTIC PACKAGE
CASE 626

PLASTIC PACKAGE
CASE 751
(SO-8)

• Dual Supply Operation: ±18 V (Max)

PIN CONNECTIONS

• Low Voltage Noise: 4.5 nV/{Hz

Vee

Output 1

• Low Input Offset Voltage: 0.15 mV
• Low T.C. of Input Offset Voltage: 2.0 IlV/oC

Output 2

• Low Total Harmonic Distortion: 0.002%

Inputs 1 {

• High Gain Bandwidth Product: 16 MHz

} Inputs 2

• High Slew Rate: 7.0 V/IlS
• High Open-Loop AC Gain: 800 @ 20 kHz

(Dual, Top View)

• Excellent Frequency Stability
• Large Output Voltage Swing: + 14.1 VI -14.6 V
• ESD Diodes Provided on the Inputs

QUAD

14#
1

DSUFFIX

PSUFFIX

PLASTIC PACKAGE
CASE 751A
(SO-14)

PLASTIC PACKAGE
CASE 646

Equivalent Circuit Schematic
(Each Amplifier)

PIN CONNECTIONS
Output 1

1

Inputs 1 {

2

4

Output4

r---------.-------~--------~~--~~--oVee

Inputs 2 { 5

I-+--_-+-r 03

Output2

7

(Quad, Top View)
H.-t--+~~ Vout

ORDERING INFORMATION
Test

Device

Package

MC33078D
MC33078P

SO-8
Plastic DIP

MC33079D
MC33079P

SO-14
Plastic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-213

Temperature Range

MC33078, MC33079
MAXIMUM RATINGS
Rating

Symbol

Value

Unit

Vs

+36

V
V

Supply Voltage (Vcc to VEE)
Input Differential Voltage Range

VIDR

(Note 1)

Input Voltage Range

VIR

(Note 1)

V

Output Short Circuit Duration (Note 2)

tsc

Indefinite

sec

Maximum Junction Temperature

°C

TJ

+150

Storage Temperature

Tstg

-60 to +150

°C

Maximum Power Dissipation

Po

(Note 2)

mW

NOTES: 1. Either or both input voltages must not exceed the magnitude of VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature
(TJ) is not exceeded (see Figure 1).
3. Measured with VCC and VEE differentially varied simultaneously.
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25°C, unless otherwise noted.)
Characteristics

Symbol

Input Offset Voltage (RS = lOn, VCM = 0 V, Va = 0 V)
(MC3307S) TA = +25°C
TA = -40° to +S5°C
(MC33079) TA = +25°C
TA = -40° to +S5°C

IVlol

Average Temperature Coefficient of Input Offset Voltage
RS= IOn. VCM=OV, VO=OV, TA = Tlowto Thigh

4Vlot4T

Input Bias Current (VCM = 0 V, Va = 0 V)
TA = +25°C
TA = -40° to +S5°C

liB

Input Offset Current (VCM = 0 V, Va = 0 V)
TA = +25°C
TA = -40° to +S5°C

110

Common Mode Input Voltage Range (4V10 = 5.0 mV, Va = 0 V)

VICR

Large Signal Voltage Gain (Va = ±1 0 V, RL = 2.0 kn)
TA = +25°C
TA = -40° to +S5°C

Min

Typ

Max

-

0.15

-

-

2.0
3.0
2.5
3.5

-

2.0

-

-

300

750
SOO

mV

-

0.15

-

-

-

25

-

150
175

±13

±14

-

nA

90
S5

110

-

-

Output Voltage Swing (VIO = ±1.0V)
RL=600n
RL=600n
RL=2.0 kn
RL=2.0 kn
RL=10kn
RL= 10kn

VO+
VoVO+
VoVO+
Vo-

+13.2
+13.5
-

+10.7
-11.9
+13.S
-13.7
+14.1
-14.6

Common Mode Rejection (Vin = ±13V)

CMR

SO

100

Power Supply Rejection (Note 3)
VCCNEE = +15 V/-15 Vto +5.0 V/--5.0 V

PSR

SO

105

-

Output Short Circuit Current (VID = 1.0 V, Output to Ground)
Source
Sink

ISC
+15
-20

+29
--37

-

V
dB

V

-13.2

-14
dB
dB
rnA

rnA

10

-

-

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-214

IlV/oC
nA

AVOL

Power Supply Current (Va = 0 V, All Amplifiers)
(MC3307S) TA = +25°C
TA = -40° to +S5°C
(MC33079) TA = +25°C
TA = -40° to +S5°C

Unit

4.1

S.4

-

5.0
5.5
10
11

MC33078, MC33079
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE =-15 V, TA = 25°C, unless otherwise noted.)
Characteristics
Slew Rate (Vin = -10 V to +10 V, RL = 2.0 kn, CL = 100 pF AV = +1.0)
Gain Bandwidth Product (I = 100 kHz)
Unity Gain Frequency (Open-Loop)

Symbol

Min

Typ

SR

5.0

7.0

Max

-

V/JlS

Unit

GBW

10

16

-

MHz

IU

-

9.0

-

MHz

-11
-6.0

-

dB

-

Degrees

Gain Margin (RL = 2.0 kn)

CL = 0 pF
CL = 100 pF

Am

-

Phase Margin (RL = 2.0 kn)

CL = 0 pF
CL = 100 pF

~m

-

55
40

CS

-

-120

-

dB

Power Bandwidth (Va = 27 V p _p , RL = 2.0 kn, THD ,;; 1.0%)

BWp

120

-

kHz

Distortion (RL = 2.0 kn, 1 = 20 Hz to 20 kHz, Va = 3.0 VrmS ' AV = + 1.0)

THD

-

0.002

-

%

IZol

-

37

-

n

Differential Input Resistance (VCM = 0 V)

RIN

-

175

-

I(n

Differential Input Capacitance (VCM = 0 V)

Channel Separation (I = 20 Hz to 20 kHz)

Open-Loop Output Impedance (Va =

a V, 1 = 9.0 MHz)

CIN

-

12

-

pF

Equivalent Input Noise Voltage (RS = 100 n, 1 = 1.0 kHz)

en

-

4.5

-

nV/{HZ

Equivalenllnpul Noise Current (I = 1.0 kHz)

in

-

0.5

-

pAl{HZ

Figure

1. Maximum Power Dissipation
versus Temperature

§' 2400
.§.

z

Q 200o~

8:

gj

C
a:

~
oa.

I I I I

~8P &MC3307 P

~
!z

t600

-..... ........

o

-55-40

Figure
1000

w

::::l

0

~ t-...... ......~

o

~

5a.
~

~

~ .....

0
20 40
60 80 100 120 140
TA, AMBIENT TEMPERATURE (0C)

.!¥

200

o

10
15
VCC, I VEE I, SUPPLY VOLTAGE

5.0

3. Input Bias Current versus Temperature

Figure

~
~

-55

-

ti:i

[£

20

M

--

4. Input Offset Voltage versus Temperature

2.0

I

VCC=+15V
VEE=-15V
RS= Ion
1.0 VCM =OV

AV~-- r-

~

~

a

200

160

600

~

-.....

!!!

!:§

400

400

III

I---VCC=+15V
I - - - VEE=-15V
800
VCM=OV

...a.

::::l

-20

I

rn
:$
III

Tr
330 D

a.

a:
a:

600

::::l

400

...z

I

w

~

~

Input Bias Current versus Supply Voltage

_VCM= OV
TA = 25°C

a:
a:

"MC330 9D .........
......
120or-.....

~

.S-

2.

800

r---r-. ................ ...... i'80o

::;;

Figure

~~

-

Unil2

0

o

5

Unit 3

~ -1.0

6

->
-25

0
25
50
75
TJ, AMBIENTTEMPERATURE (0C)

100

125

-2.0
-55

-25

0
25
50
75
TJ, AMBIENTTEMPERATURE (0C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-215

too

125

MC33078, MC33079
Figure 5. Input Bias Current versus
Common Mode Voltage

z:

600
Vee=+15V _
VEE=-15V
TA=25°C
-

~ 500

;400
::>

o

~

......

-.. ~

Figure 6. Input Common Mode Voltage
Range versus Temperature

~

VCC-O

~w

VCC-0.5

~
:...0

-

.......

300

-

.......

5200
D..

r-

i!:
!!i!loo

Vcc-tO

-15

I

~
~

VCC-3.0

-10

-5.0
0
5.0
VCM, COMMON MODE VOLTAGE (V)

!:::[GJ fI Tl
o

-

t-

10

IS

15

I
-55°

I

C!I

z

~

VCC-5.0

~

->

VEE

+~55

-25

25°C

I
~
a:

.~

I

~t i

125 C

L

o

1.0
2.0
3.0
RL, LOAD RESISTANCE TO GROUND (kn)

4.0

I--

!:

-J~

<3
~

30

8.0

1

il5
~

~

8:

4.0

g

~

~

~

i!5

10
-55

-25

-55

C33078

i!5

80

8

60

:::;;
:::;;

Supply Voltages t - - -

-25

0
25
50
75
TA, AMBIENT TEMPERATURE (OC)

100

'"''

100

125

CMR

'ITj
20
100

liiillil
loOk

YO

( VCM

x ADM )

II
10k
lOOk
f, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-216

= 2OLog

VCC= +15V
VEE=-15V
VCM = OV
LlVCM = ±1.5 V

~ 40

125

'"''

I!.VCM~I!.VO

140

~ 120
a:
~ 100

o

o

0
25
50
75
TA, AMBIENT TEMPERATURE (OC)

G

+5.'

2.0

r-....

20

a;- 160

M~079-

±10V

......

o

:Eo

±5.0V

+15V

r--.....

I I .1.
VCC= +15V _
VEE=-15V
RL

~

t::[$ft=ftI~III~]II
°

50

B 40

I

1

0
25
50
75
TA, AMBIENT TEMPERATURE (OC)

Figure 8. Output Short Circuit Current
versus Temperature

Vee = +15V VEE=-15V T I

///

rw1

I

L...... _

Voltage
Rane-

Figure 7. Output Saturation Voltage versus
Load Resistance to Ground
VCc-1.0

VCC = +3.0Vlo+15V
VEE=-3.0Vlo-15V
LlVIO = 5.0 mV
VO=OIV

I I

o

z:
w

+

§; VCC-1.5
~

1

I

+VCM

tOM

10M

MC33078, MC33079
Figure 11. Power Supply Rejection
versus Frequency
140

iD

~ 120
o
a:
~

~
a:

-

tJ

5

o

40

~

VEE

~

z

100

V
10

a;;
z



c

0

15

a:

c..

J:
fC

~

10

-------

20

'-

-........ ..............

~

w

10

~

!:i

5.0

~

0

:::>

:=

z

~ -10

VCC=+15V
VEE=-15V
5.0
I
1=
100kHz


?

0
25
50
75
TA. AMBIENTTEMPERATURE (0C)

\

~~

C)

...:
CD

-55

100

-5.0

-15

-20
5.0

125

iD

30

z

~

:t
25
w

w

C)

!:i

C)

!3

15

5
o

10

~

100

~

6

> 5.0

o

10

VCC= +15V
VCc=-15V
RL = 2.0 kn
AV=+1.0
THO" 1.0%
T = 25°C
Itllllllllill
100
1.0k

Vot

RL =2.0 kO

~

RL= 10in

-...;;;:

::. Vo20

10
15
vCC IVEEI. SUPPLY VOLTAGE (V)

110

:s

20

~~
RL=2.0kn

....".: =-

Figure 16. Open-Loop Voltage Gain
versus Supply Voltage

35

!:i

p-

---r---....

Figure 15. Output Voltage versus Frequency

-a.

I.

TA= 25°<\
15

f-

o

20

Figure 14. Maximum Output Voltage
versus Supply Voltage

z

C)

15

VCC IVEEI. SUPPLY VOLTAGE (V)

I. FREQUENCY (Hz)

J:

I

RL=10kn CL =0 pF 1=100kHz _
TA = 25°C -

~

dVcc

~OM

!I

J:

---

~
_

"N 30

( dVO/AOM )

11111111

CJ)

Do

dVcc

Id~ff,R,

60

CJ)

a:
w

-PSR = 20Log

LI

80

Do

g;

---

I~~

§ 100
~

( dVoIAoM )

tPSR = 20Log

Figure 12. Gain Bandwidth Product
versus Supply Voltage

Do

9z
w
c..

90

RL= 2.0 kn
1,,10 Hz
t..Vo = 2/3 (VCC -VEE!
TA = 25°C

--

-

o

...J

~
...:

10k
100k
I. FREQUENCY (Hz)

100M

10M

80
5.0

10

15

VCC IVEEI. SUPPLY VOLTAGE (V)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-217

20

MC33078, MC33079
Figure 17. Open-Loop Voltage Gain
versus Temperature

Figure 18. Output Impedance versus Frequency

CD 110
E

:z

~

LU

C)

!:§
~

I
I
VCC = +15V
VEE=-15V
105 I- RL = 2.0 kn
t,;; 10 Hz
AVO=-IOVIO+IOV

2;100

g

~
o

95

V

/

c:

-

i

-

/

~
~

50

IV~C ~ I+II~I~"

40

VEE=-15V
VO=OV
TA = 25°C

30

...

~ 20

V

!5

o

..:.

010

~

N

90
-55

-25

a
25
50
75
TA, AMBIENT TEMPERATURE (0C)

lOa

a

125

1.0k

160

-IJb~~078
u;:
~Jl

o

~

140

b

~

LU

~ 130

LU

:z

:if
:I:

120

<..>

~ 110

~C~~~7;;"1'o.

Tm

/

100n

loon

Measurement Channel

lOa
10

lOa

~

a::

~
en

a
Z

0

:::;
a::

:f
...J

0.05

-

0.01

j$

~ 0.005
d'

~

~c

0.001 a

1.0

2.0

10M

~"

II'.

Vo

+

2.0kn

0.1

'V

~

:::;
a::

j$

~

I--( AVOA)
I--- I-CS =20 Log -V-

d'

~

A OM

0.001

lOOk

10k

U)

B.O

::t

+

Av =10

~
~

6.0

~

4.0

~

Vo
~2.0kn

en

I

10 k

3.0
4.0
5.0
6.0
7.0
Vo, OUTPUT VOLTAGE (Vrms)

2.0

lOa k

-

a5.0

9.0

Rising

~Vin:

Vo
2.0kll

T

=-

10
15
VCC IVEEI , SUPPLY VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-218

--

-4
-

B.O

Falling

-.JL

AV= 1.0

I

1.0k
f, FREQUENCY (Hz)

_ Vin = 2/3 (VCC -VEE!
TA = 25°C

I~RAn~.I
Vin

lOa

10

I

'.

'

10

Figure 22. Slew Rate versus Supply Voltage

Av= 100

--

IAVI =I\~

I.OM

<..>

AV = 1000

.;- r-

<..>

lOOk
t, FREQUENCY (Hz)

3 0.01

I

VCC = +15V
VEE=-15V
0.5 t=2.0kHz
TA = 25°
0.1

-Ht!r

W¥I

VCC=+15V
VEE=-15V
I-- Vo = 1.0 Vrms
TA = 25°C

~

........

1.0k
t, FREQUENCY (Hz)

1.0

AV = I IlL

Av= lOa......

I-I--

o

Figure 21. Total Harmonic Distortion
versus Output Voltage

:z
0
;:::

10k

1.0

:z

..........

tOkn

r-'~

~

Drive Channel
VCC=+15V
VEE = -15V
RL=2.0 !ill
AVOD = 20 Vp_p
TA = 25°C

.......

: I~V ill°DJ,
JJl,....I1"

Figure 20. Total Harmonic Distortion
versus Frequency

Figure 19. Channel Separation versus Frequency

CD
EISa
:z

I

20

MC33078, MC33079
Figure 24. Voltage Gain and Phase
versus Frequency

Figure 23. Slew Rate versus Temperature
10

~ 8.0

~
~

~ 6.0

~

rn

gj

4.0

iii 120

VCC=+15V
VEE=-15V
aVin=20V

:s.

- i~

2.0
-55

+

I1Vln

T

Rising

~

Vo

a..

j20

"'I
I
I
0
25
50
75
TA, AMBIENT TEMPERATURE (OC)

100

o

125

1.0

10

10

20

8.0 1--++++++tiF'.....:!!Iooo,.f!lok:lIlH1Ht--nY-H-H-l-HI30

ffi

i

<
40~

Z
Ie

4.0

50 a..

Q
1~

5:r:rn 00

oo~

a:
w

E5

en
0

e

20

1'.
~

"

~

1.0M

w

90~
:r:
a..

ffi

135~
4-

180
10M

1
1I25.'CJ
I
25°C
1
./ ,55°C

I

1.1

"

i-~

-""

VCC=+15V
VEE=-15V
~Vln =11010 ~IVI

IIII

I

100
1.0k
CL OUTPUT LOAD CAPACITANCE (pF)

1000

10k

Figure 28. Total Input Referred Noise Voltage
versus Source Reslstnce

I!

~30
~20
!!'J 10 1'0..

V

r-

Figure 27. Input Referred Noise Voltage and
Current versus Frequency

550

~~ f - - -

V

Vo
CL

40

O~l--~~~~--~~~~~~~~~ro

VCC=+15V
VEE=-15V
TA = 25°C

ffi

e.

1.0k 10k
lOOk
f, FREQUENCY (Hz)

+

Tin

~

~

~loo

![

"

i4

80 .rL I1V'

~

&
96.0

10
100
CL OUTPUT LOAD CAPACITANCE (PF)

100

10

-

VCC=+15V
VEE=-15V_
RL= 2.0 kQ
1: =25°C
- 45 a:

Figure 26. Overshoot versus Output
Load Capacitance

12

;;;60

~

40

100

~

..........

o

iii

!

."

"

Figure 25. Open-Loop Gain Margin and
Phase Margin versus Load Capacitance

~

o

&00

2.0lI0

I
-25

,

!!l
E§60
g

Falling

i-..rL

.....

z
~loo

1000
VCC=+15V
VEE=-15V
f= 1.0 kHz
TA=25°C
~Vn(total)= -,J QnRs)2 +8 2 +4KTR

;;;

.6.

li 8.0
c

~5.0
II! 3.0

•Vohage

~2.0

Curi

!5
!!! 1.0
-.
C
G>

10

100

1.0k
f. FREQUENCY (Hz)

.j: 1.0
10

10k

100

1.0k
10k
RS. SOURCE RESISTANCE (n)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-219

lOOk

tOM

•

I

MC33078, MC33079
Figure 29. Phase Margin and Gain Margin versus
Differential Source Resistance
14

70

11111111

12

is

:E..

z

a

!1f

::;;

10
8.0

~ 6.0
C!l

i

Gain

4.0
2.0

~
+

60

fff
w

SO

ffi

a:

Phase

B

40 ~

va

!1f

R2

30 ~

VCC=+ISV
VEE=-ISV
Rr= Rl +R2
AV=+100
Vo=OV
TA =2SoC

(J)

20

~
E

10 ....

o

lOOk

10
100
loOk
10k
RT. DIFFERENTIAL SOURCE RESISTANCE (a)

Figure 30. Inverting Amplifier Slew Rate

Figure 31. Noninverting Amplifier Slew Rate

•
.
•

,'
'

. ; - - - - - - - - - - - - - --.

I

I

II

I
I

"

/

:

.I

!

_\__ !i
_._~-y•

t, TIME (2.0 J.lS/DIV)

I
I

,,
I

t, TIME (2.0 J.lS/DIV)

Figure 33. Low Frequency Noise Voltage
versus Time

Figure 32. Noninverting Amplifier Overshoot

t, TIME (200 J.lS/DlV)

t, TIME (1.0 sec/DIV)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-220

MC33078, MC33079

..

Figure 34. Voltage Noise Test Circuit
(0.1 Hz to 10 HZp.p)

I

Ion

221l~F

Il
Voltage Gain = 5O,OO:·7 F

1_

2.21lF

24.3kn

Note: All capacRors are non-polarized.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-221

I

Scope
xl

Rin = 1.OMn

110kn

MOTOROLA

MC33102

SEMICONDUCTOR-----TECHNICAL DATA

Advance Information

DUAL SLEEP-MODETM
OPERATIONAL AMPLIFIERS

Sleep-Mode™ Two-State,
Micropower Operational Amplifier
The MC33102 dual operational amplifier is an innovative design concept
employing Sleep-ModeTM technology. Sleep-Mode amplifiers have two
separate states, a sleepmode and an awakemode. In sleepmode, the
amplifier is active and waiting for an input signal. When a signal is applied
causing the amplifier to source or sink 160 j.lA (typically) to the load, it will
automatically switch to the awakemode which offers higher slew rate, gain
bandwidth, and drive capability.
• Two States: "Sleepmode" (Micropower) and "Awakemode"
(High Performance)
• Switches from Sleepmode to Awakemode in 4.0 I1s when Output Current
Exceeds the Threshold Current (RL =600 0)
• Independent Sleepmode Function for Each Op Amp
• Standard Pinouts - No Additional Pins or Components Required
• Sleepmode State - Can Be Used in the Low Current Idle State as a Fully
Functional Micropower Amplifier
• Automatic Return to Sleepmode when Output Current Drops Below
Threshold
• No DeadbandiCrossover Distortion; as Low as 1.0 Hz in the Awakemode
• Drop-in Replacement for Many Other Dual Op Amps
• ESD Clamps on Inputs Increase Reliability without Affecting Device
Operation
TYPICAL SLEEPMODE/AWAKEMODE PERFORMANCE
Sleepmode
(Typical)

Awakemode
(Typical)

Unit

45

750

!LA

Low Input Offset Voltage

0.15

0.15

mV

High Output Current Capability

0.15

50

mA

Characteristic
Low Current Drain

Low T.C. of Input Offset Voltage

1.0

1.0

IlV/oC

High Gain Bandwidth (@20 kHz)

0.33

4.6

MHz

High Slew Rate

0.16

1.7

V/j.lS

28

9.0

nVNHz

Low Noise (@ 1.0 kHz)

SILICON MONOLITHIC
INTEGRATED CIRCUIT

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

8~
1

PSUFFIX
PLASTIC PACKAGE
CASE 626

PIN CONNECTIONS

Vee

Output I
Inputs I {

}

VEE

~nputs

(Dual Package,
Top View)

MAXIMUM RATINGS
Ratings

Symbol

Value

Unit

Vs

+36

V

VIDR
VIR

(Note 1)

Output Short Circuit Duration (Note 2)

tsc

(Note 2)

sec

Maximum Junction Temperature
Storage Temperature

TJ
Tstg

+150
-65 to +150

°C

PD

(Note 2)

mW

Supply Voltage (VCC to VEE)
Input Differential Voltage Range
Input Voltage Range

Maximum Power Dissipation

V

NOTES: 1. Ellher or both Input voltages should not exceed Vee or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not
exceeded (refer to Figure 1).

ORDERING INFORMATION
Device

Temperature Range

Package

MC33102D
MC33102P

-40° to +85°C

SO-8
Plastic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-222

MC33102
Simplified Block Diagram

Awake to
Sleepmode
Delay Circuit

Current
Threshold
Detector
Fractional
load Current
Detector

Op Amp

0--

% oilL

~'

0---

Vin

+

V ~ IBias

--

1, ,~

,,,",,g·t

Irel

i

>

IHysteresis

~ IEnable

Buffer

----

..

t=-o Vout

tRL
;>

rh

,

Sleepmode
Current
Regulator

Awakemode
Current
Regulator

Isleep

---

Enable

I··

DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE =-15 V, TA = 25°C, unless otherwise noted.)
Characteristics

Figure

Symbol

Input Offset Voltage (RS = 50 n, VCM = 0 V, Va = 0 V)
Sleepmode
TA = +25°C
TA = -40° to +85°C
Awakemode
TA = +25°C
TA = -40° to +85°C

2

IVlol

Input Offset Voltage Temperaiure Coefficient
(RS = 50 n, VCM = 0 V, Va = 0 V)
TA = -40° to +85°C (Sleepmode and Awakemode)

3

AVIO/AT

4,6

liB

Input Bias Current (VCM = 0 V, Va = 0 V)
Sleepmode
TA = +25°C
TA = -40° to +85°C
Awakemode
TA = +25°C
TA = -40° to +85°C
Input Offset Current (VCM = 0 V, Va = 0 V)
Sleepmode
TA = +25°C
TA = -40° to +85°C
Awakemode
TA = +25°C
TA = -40° to +85°C

Min

-

0.15

-

0.15

Unit

-

2.0
3.0
2.0
3.0
IJ.V/oC

-

1.0

nA

-

8.0

-

-

-

100

-

50
60
500
600

11101

nA

-

0.5

-

5.0

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-223

Max

mV

-

-

Typ

-

5.0
6.0
50
60

MC33102
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE =-15 V, TA = 25°C, unless otherwise noted.)
Characteristics
Common Mode Input Voltage Range
(",Via = 5.0 mY, Va = 0 V)
Sleepmode and Awakemode
Large Signal Voltage Gain
Sleepmode (RL = 1.0 Ma)
TA = +25°C
TA = -40° to +85°C
Awakemode (Va = ±1 0 V, RL = 600 a)
TA = +25°C
TA = -400 to +85°C
Output Voltage Swing (VID = ±1.0 V)
Sleepmode (VCC = +15 V, VEE = -15 V)
RL= 1.0 Ma
RL= 1.0 Ma
Awakemode (VCC = +15 V, VEE = -15 V)
RL= 600 a
RL = 600 a
RL = 2.0 ka
RL = 2.0 ka
Awakemode (VCC = +2.5 V, VEE = -2.5 V)
RL = 600 a
RL = 600 a

Figure

Symbol

5

VICR

-

7

Typ

Max

Unit
V

-13

-14.8
+14.2

+13
kVN

AVOL
25
15

200

50
25

700

-

-

8,9,10

V
VO+
Vo-

+13.5

Vo+
VoVo+
Vo-

+12.5

Vo+
Vo-

+1.1

-

+14.2
-14.2

-

-13.5
V

Common Mode Rejection (VCM = ±13 V)
Sleepmode and Awakemode

11

Power Supply Rejection (VCCNEE = +15 V/-15 V,
5.0 V/-15 V, +15 V/-5.0 V)
Sleepmode and Awakemode

12

Output Transition Current
Sleepmode to Awakemode (Source/Sink)
(VS=±15V)
(VS =±2.5V)
Awakemode to Sleep mode (Source/Sink)
(VS=±15V)
(VS =±2.5V)

13,14

Output Short Circuit Current (Awakemode)
(VID = ±1.0 V, Output to Ground)
Source
Sink

15,16

Power Supply Current (per Amplifier) (ACL = 1, Va = OV)
Sleepmode (VS = ±15 V)
TA = +25°C
TA = -40° to +85°C
Sleepmode (VS = ±2.5 V)
TA = +25°C
TA = -40° to +85°C
Awakemode (VS = ±15 V)
TA = +25°C
TA = -40° to +85°C

Min

-

+13.6
-13.6
+14
-14

-13.3

-

+1.6
-1.6

-1.1

80

90

-

-

+13.3

CMR

-12.5

-

-

PSR

dB
dB

80

100

-

200
250

160
200

-

-

142
180

90
140

J.LA
IITHll

IITH21

-

mA

Iisci
50
50

17

-

ID

J.LA

-

-

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-224

110
110

45
48

65
70

38
42

65

750
800

800
900

-

MC33102
AC ELECTRICAL CHARACTERISTICS (VCC = + 15 V, VEE = -15 V, TA = 25'C, unless otherwise noted.)
Characteristics

Figure

Symbol

Slew Rate (Vin = -5.0 V to +5.0 V, CL = 50 pF, AV = 1.0)
Sleepmode (RL = 1.0 Mil)
Awakemode (RL = 600 il)

18

SR

Gain Bandwidth Product
Sleepmode (I = 10kHz)
Awakemode (I = 20 kHz)

19

Sleepmode to Awakemode Transition Time
(ACL = 0.1, Vin = 0 V to +5.0 V)
RL = 600 il
RL= 10 kil

20,21

Awakemode to Sleepmode Transition Time

22

Unity Gain Frequency (Open-Loop)
Sleepmode (RL = 100 kil, CL = pF)
Awakemode (RL = 600 il, CL = 0 pF)
Gain Margin
Sleepmode (RL = 100 kil, CL = 0 pF)
Awakemode (RL = 600 il, CL = pF)

23,25

Phase Margin
Sleepmode (RL = 100 kil, CL =
Awakemode (RL = 600 n. CL =

24,26

DC Output Impedence (VO =
Sleepmode
Awakemode

a V, AV = 10, IQ = 10 IlA)

0.10
1.0

0.16
1.7

-

0.25
3.5

0.33
4.6

-

AM

29

0M

CS
BWp

30

-

4.0
15

-

-

1.5

-

-

200
2500

-

-

13
12

-

-

60
60

-

-

-

120

-

-

20

-

dB

-

a V)

Differential Input CapaCitance (VCM =
Sleepmode
Awakemode

0.005
0.016
0.031

-

1.0 k
96

-

-

-

1.3
0.17

-

-

0.4
4.0

-

-

28
9.0

-

-

0.01
0.05

-

-

pF

32

Equivalent Input Noise Current (I = 1.0 kHz)
Sleepmode
Awakemode

33

en

nV/fHz

-

pAl~z

in

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-225

il

Mil

Cin

Equivalent Input Noise Voltage (I = 1.0 kHz, RS = 100 il)
Sleepmode
Awakemode

kHz

-

Rin

a V)

dB

%

-

Differential Input Resistance (VCM =
Sleepmode
Awakemode

Degrees

THD

RO

sec
kHz

31

V/IlS

IlS

ttrl

ttr2

Unit

MHz

-

Power Bandwidth (Awakemode)
(VO = 10 Vp_p , RL = 100 kil, THD S; 1%)
Total Harmonic Distortion (VO = 2.0 Vp_p , AV = 1.0)
Awakemode (RL = 600 il)
1 = 1.0 kHz
1= 10kHz
1=20kHz

Max

GBW

a

Channel Separation (I = 100 Hz to 20 kHz)
Sleepmode and Awakemode

Typ

IU

a

a pF)
a pF)

Min

I

IBI

MC33102
Figure 1. Maximum Power Dissipation
versus Temperature

§'

Figure 2. Distribution of Input Offset Voltage

§. 2500

50

z

a
~

~

~ 2000

~

1000

i%

'"-

MC33102D

~

-I-- ~

500

CI

0

o

-55 -40 -25

c..

::;;

30


w

20

~

en
a:
w
u::

30
25

D

•

Percent Sleepmode
Percent Awakemode

::J

c..

::;;

a:
w

x

I'

10

c..

5
0

c..

10

~ 1.0

125

~5.0

I

~10.5
IZ
W

a:
a: 9.5
=>
c..>

~

'"=>

I-

w

w

~VCC-0.5
!:i

c.. 7.5
w

r---

~

~

z

a

::;;
::;;

VCC=+15V
SVEE+l.0 VEE=-15V
lAVIO =5.0 mV
=>
~VEE+0.5

-'---

a:
aM

~

".....

~

.---..

I'-"

~

'"5

~

c..

CI

I

Sleepmode

o

25
50
85
TA, AMBIENT TEMPERATURE (OC)

M

~

w

Awakemode

~

~

~

a:

-----

"-

Figure 6. Input Bias Current versus Temperature _

~M

'-..

~Ieepmode

"'~

zw

Awakemode

---=-- r---'I_'"'----"

1.0

-10
-5.0
5.0
10
VCM, COMMON MODE INPUT VOLTAGE M

~

~VCC-l.0

a
::;;

0.8

VCC=+15V
VEE=-15V
TA = 25°C

en

1Fl...

I
Sleepmode

-

I,r

Awakemode

a
::;;

Figure 5. Input Common Mode Voltage Range
versus Temperature
VCC

iii I: bI

" """

~

(!)

~

" i\.~"

c.. 8.5

-4.0 -3.0 -2.0 -1.0
0
1.0 2.0 3.0 4.0 5.0
TCVIO, INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT (lNloC)

~

I~

I'E

'\.

w

..

I!x,

n
-0.8 -0.6 -0.4 -0.2
0 0.2
0.4 0.6
VIO, INPUT OFFSET VOLTAGE (mV)

CI

",

u

In..

~

Figure 4. Input Bias Current versus
Common Mode Input Voltage

204 Amplifiers
Tested
From 3 Wafer lots
VCC = +15V
VEE=-15V
TA = _40° to 85°C
SOIC Package

" m:

1

~

.II Ii"

I."'.
I
I:

',,','

Ii

LL

I,;,

a:

204 Amplifiers Tested
From 3 Wafer Lots
VCC=+15V
VEE=-15V
TA = 25°C
I-- SOIC Package

r-

::J

Figure 3. Input Offset Voltage Temperature
Coefficient Distribution
35

•

Percent Sleepmode
Percent Awakemode

u::

MC33102P

§.
c..

40

w

'--...

~ 1500

ac..

en
a:

..............

en

is
a:

D

a

4.0

b---'"

--

Sleep~~

c..
w

~ 2.0

en

!E

125

VCC=+15V
VEE=-15V
VCM=OV

o

25
50
85
TA, AMBIENT TEMPERATURE (0G)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-226

a:

\
I

0_55 -40 -25

zw

::::::::- --Awakemode [\--...

::;;

-

®~

ooaa:
~

'"
005
c..
~

40 ~

\,

a

~

20 ~

o

125



c: 30

120

UJ

Awakemode (RL - 600



~

0

>

110

a.

Z
UJ

r---

Sleepmode (RL ; 1.0 M Q)

0

9

100

a.

0
...:l
0

/

TA; 25"C

:s!.

:z

90

6.

Q)--

-

~
UJ

25

~

20

~

Sleep mode (RL ; 1.0 M Q) A

(!l

0

>

I-

-......

=>
a.

V

15

l-

=>
0

10

-40 -25

0
25
50
85
TA, AMBIENTTEMPERATURE eC)

3.0

125

Awakemode (RL ; 600 Q)

6.0
9.0
12
VCC, I VEE I. SUPPLY VOLTAGE M

30

c:

6.

UJ



~

0

20

>
=>
a.

15 1---

=>

10

l-

I-

0

j

~


\

\

:z
~
en
UJ



Awakemode
(RL;600Q)

Sleepmode
(RL; 1.0 M Q)

~

25

I"

20
/

0

>

I-

1I11

=>
a.

VCC;+15V
VEE; -15 V
t; 1.0 kHz
TA; 25"C

=>
0

"" .....
1.0 k

10 k
t, FREQUENCY (Hz)

"r-..

100 k

j

10

500 k

100
1.0k
RL, LOAD RESISTANCE TO GROUND (Q)

Figure 11. Common Mode Rejection
versus Frequency
OJ 100
:s!.

~

:z
0

t3

80

UJ

ex:
UJ

'"0

.........

Ul
60

0

::0
::0

a

(,)

§
iil

Awakemode

~

i'.

~

a.

40

(,)

a:
::0

is

1111111

r--...

20

VCC;+15V
VEE; -15 V
VCM ;OV
LlVCM dl.5V
TA; 25"C
100

~
1.0 k

10 k

UJ

~

"lOOk

10 k

Figure 12. Power Supply Rejection
versus Frequency
OJ
:s!.

Sleepmo~ .....

::0

:z

Awakemode

15

l-

VCC; +15 V
VEE; -15 V
5. AV; +1.0
0 TA; 25"C

18

-

30

6.

c: 25

15

Figure 10. Maximum Peak-to-Peak Output
Voltage Swing versus Load Resistance

Figure 9. Output Voltage versus Frequency

~

~

,~

j

:
u
a: 120
C3
~ 110

~ ~

"

12

1.2

60

u:: 55
a.

..:

a: 50
w

a.
:z
w

a:
a:
=>
u
~

45
40

a.
a.
=> 35

-

r0-

I-

I-'""""

V

1/

t."...-""

Kee

en

ci
30_55 -40 -25

mode(~)

-

1.0
0.8

§

a.

~

ffi

a.

Awakemode (rnA)

I-

0.6
0.4

'-

,

~

..........

80

.......

o

25
50
85
TA. AMBIENT TEMPERATURE eC)

125

Figure 18. Slew Rate versus Temperature

«
§.
w

::;;

Sink

70_55 -40 -25

a:

::J

~

~

-=

Vee=+15V
VEE=-15V
VID=±1.0V
RL<10Q
Awakemode

Source

~ 90
o

15

a:
w

" f'-

J:

Figure 17. Power Supply Current Per Amplifier
versus Temperature

«
.:;!.

Figure 16. Output Short Ciruit Current
versus Temperature

en 100

~

\

6.0
9.0
I Vo I. OUTPUT VOLTAGE M

140

!:: 130

I\.

en
~

=

~

18

ffi

a:
a:

a
~

a.
ee=+15V 0.2 ~
VEE=-15V
ci
No Load
o
o 25
50
85
125
TA. AMBIENT TEMPERATURE (0C)

0.20 ..---,-----,----.----,----~-------,-------, 2.0
Vee=+15V
VEE=-15V
'in 0.18 ilVin = -5.0 V 10 +5.0 V -+----1-.,-=--1--------1 1.8

~ti! 0.16

~

1.6 w

~

a:

~

0.141-+--::.,4--+:::;;;;;00-1-=+---+----1 1.4

~

en

~-;'---il----I----I-----+------f_----.--J

o 25
50
85
TA. AMBIENT TEMPERATURE (0C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-228

~

~
en

1.2

MC33102
Figure 19. Gain Bandwidth Product
versus Temperature

--

N

g
Cl

o

CC


Figure 20. Sleepmode to Awakemode
Transition Time

VCbJ5V
VEE = -15 V
f=20kHz

200
-55 -40 -25

¥~
>
Ci

f-

4.5

§5

'>

Cl

~

0

cc

~

4.0 ~
f-

UJ
(!)

~
z
«

0

Cl

3.5

--

0
25
50
85
TA, AMBIENT TEMPERATURE CC)

!:i
>

""LiS

z'"


c:.

(!)

'"

(!)

125

I, TIME (5.0 ~s/DIV)

Figure 21. Sleepmode to Awakemode
Transition Time

Figure 22. Awakemode to Sleepmode Transition Time
versus Supply Voltage
2.0,----,-----,----,----,-----,
(3'
UJ

~ 1.5r----T---~---r---~c---~
::;;

>=
z
o
>=

en

1.0r----T----b"""'"--r----T---~

~
]l 0.5r-----:;;;"""'"--+---+----:=-r-=----+-==---t

f-

6.0

I, TIME (2.0 ~s/DIV)

Figure 23. Gain Margin versus
Differential Source Resistance
70

ffi

SILpU

a;- 13

z

acc
«

Awakemode

II

z

 DIFFERENTIAL SOURCE RESISTANCE (0)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-229

lOOk

MC33102

lEI

Figure 26. Phase Margin versus
Output Load Capacitance

Figure 25. Open-Loop Gain Margin versus
Output Load Capacitance
14
1D
~
z 12

a

~

10

70

'-.....

-

r-- r-r-.

z
~ 8.0

9 6.0
:Z

~

~ 4.0

i

a:



"

~~

fi::

10

i

-10

2ii" r:::::::... 16

26 r-:::~

TA = 25°C
RL = 1.0Mn
CL<10pF
Sleepmode

~

\

l'o

100
1.0M
k t, FREQUENCY (Hz)

"

70

~
:z

120

-

1D 50

~

~

:z

120~

~

J:
0..



240
10M

30
10

1--_

100
~
a:

rE
w

rn

80

..J

w

:z
:z

«J:

(,)

en

(,)

60

-

1A

~
a:
~

VCC =+15 V
VEE = -15 V
10 RL =600n

~

~ ..... -.

200

III I I

o

AV=+100

::;;

~

0.1

./

AV= +10

F

0.001

100

1.0k

10k
t, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-230

V

~"'"

"..... AV=+1.0

ci
100 k

~
tSi

240
10M

1.0

~0.Q1

10 k
t, FREQUENCY (Hz)

rn
160 [B

Vo =2.0Vp-p
TA = 25°C
Awakemode

~

1.0 k

~

"-

AV-+1000

2i

..J

40 VCC= +15 V
VEE = -15 V
20 RL=600n
Awakemode

w

120 ~

2A......... ~ ......
i""'~

~

e.

.....

""'" .....

f3

.s

III

5
a

~

Vce = +ISV
VEE=-ISV
VCM=OV
Vo=OV
TA =2S0C
Awakemode

lOOk

30
20
10

VCC= +IS V
VEE=-15V
TA = 25°C

~

y

Sleepmode
(RL= 1.0 M Q)

/

V

-

---~

.,./

II~

V

/

V Awakemode
(RL= 600 Q)

I

I I I

t, FREQUENCY (Hz)

100
CL, LOAD CAPACITANCE (pF)

Figure 35. Sleepmode Large Signal
Transient Response

Figure 36. Awakemode Large Signal
Transient Response

t, TIME (50 ~s/DIV)

t, TIME (S.O ~s/DIV)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-231

1.0k

MC33102
Figure 38. Awakemode Small Signal
Transient Response

Figure 37. Sleepmode Small Signal
Transient Response

t, TIME (50 ~s/DIV)

t, TIME (50 ~s/DIV)

CIRCUIT INFORMATION
The MC33102 was designed primarily for applications
where high performance (which requires higher current drain)
is required only part of the time. The two-state feature of this
op amp enables it to conserve power during idle times, yet
to be powered up and ready for an input signal. Possible
applications include laptop computers, automotive, cordless
phones, baby monitors, and battery operated test equipment.
Although most applications will require low power
consumption, this device can be used in any application
where better efficiency and higher performance is needed.
The Sleep-Mode™ amplifier has two states; a sleepmode
and an awakemode. In the sleepmode state the amplifier is
active and functions as a typical micropower op amp. When
a signal is applied to the amplifier causing it to source or sink
sufficient current (see Figure 13), the amplifier will
automatically switch to the awakemode. See Figures 20 and
21 for transition times with 600 Q and 10 kQ loads.

The awakemode uses higher drain current to provide a
high slew rate, gain bandwidth, and output current capability.
In the awakemode, this amplifier can drive 27 Vp-p into a
600 Q load with Vs = ±15 V.
An internal delay circuit is used to prevent the amplifier
frorn returning to the sleepmode at every zero crossing. This
delay circuit also eliminates the crossover distortion
commonly found in micropower amplifiers. This amplifier can
process frequencies as low as 1.0 Hz without the amplifier
returning to sleepmode, depending on the load.
The first stage PNP differential amplifier provides low noise
performance in both the sleep and awake modes, and an
all NPN output stage provides symmetrical source and sink
AC frequency response.

APPLICATIONS INFORMATION
The MC33102 will begin to function at power supply
voltages as low as Vs = ±1.0 V at room temperature. (At this
voltage, the output voltage swing will be limited to a few
hundred millivolts). The input voltages must range between
VCC and VEE supply voltages as shown in the maximum
rating table. Specifically, allowing the input to go more
negative than 0.3 V below VEE may cause product
damage. Also, exceeding the input common mode voltage
range on either input may cause phase reversal, even if the
inputs are between Vce and VEE.
When power is initially applied, the part may start to
operate in the awakemode. This is because of the currents
generated due to charging of internal capacitors. When this
occurs and the sleepmode state is desired, the user will have
to wait approximately 1.5 seconds before the device will
switch back to the sleepmode. To prevent this from occurring,
ramp the power supplies from 1.0 V to full supply. Notice that
the device is more prone to switch into the awake mode when
VEE is adjusted than with a similar change in Vec·
The amplifier is designed to switch from sleepmode to
awake mode whenever the output current exceeds a preset

current threshold (lTH) of approximately 160 (lA. As a result,
the output switching threshold voltage (VST) is controlled by
the output loading resistance (RLJ. This loading can be a load
resistor, feedback resistors, or both. Then:
VST = (160 ~A) * RL
Large valued load resistors require a large output voltage
to switch, but reduce unwanted transitions to the
awakemode. For instance, in cases where the amplifier is
connected with a large closed-loop gain (ACLJ, the input offset
voltage (VIO) is multiplied by the gain at the output and could
produce an output voltage exceeding VST with no input
signal applied.
Small values of RL allow rapid transition to the awakemode
because most of the transition time is consumed slewing in
the sleepmode until VST is reached (see Figures 20, 21).
The output switching threshold voltage VST is higher for
larger values of RL, requiring the amplifier to slew longer in
the slower sleepmode state before switching to the
awakemode.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-232

MC33102
The transition time (ttr1) required to switch from sleep to
awake mode is:
ttr1 = tD + ITH (RL!SRsleepmode)
where: tD = Amplifier delay «1.0 !ls)
ITH = Output threshold current for mode
transition (160 !lA)
RL = Load resistance
SRsleepmode = Sleepmode slew rate (0.16 V/!ls)
Although typically 160 !lA, ITH varies with supply voltage
and temperature. In general, any current loading on the
output which causes a current greater than ITH to flow will
switch the amplifier into the awakemode. This includes
transition currents such as that generated by charging load
capacitances. In fact, the maximum capacitance that can be
driven while attempting to remain in the sleepmode is
approximately 1000 pF.

To minimize this problem, a resistor may be added in series
with the output of the device (inserted as close to the device
as possible) to isolate the op amp from both parasitic and
load capacitance.
The awakemode to sleepmode transition time is controlled
by an internal delay circuit, which is necessary to prevent
the amplifier from going to sleep during every zero crossing.
This time is a function of supply voltage and temperature as
shown in Figure 22.
Gain bandwidth product (GBW) in both modes is an
important system design consideration when using a
sleep mode amplifier. The amplifier has been designed to
obtain the maximum GBW in both modes. "Smooth" AC
transitions between modes with no noticeable change in the
amplitude of the output voltage waveform will occur as long
as the closed-loop gains (AcLl in both modes are
substantially equal at the frequency of operation. For smooth
AC transitions:
(ACLsleepmode) (BW) < GBWsleepmo

CL(max) = ITH/SRsleepmode
= 160 !lA/(0.16 V/!ls)
= 1000 pF
Any electrical noise seen at the output of the MC33102
may also cause the device to transition to the awakemode.

where: ACLsleepmode = Closed-loop gain in
the sleep mode
BW = The required system bandwidth
or operating frequency

TESTING INFORMATION
To determine if the MC33102 is in the awakemode or the
sleepmode, the power supply currents (ID+ and ID-) must be
measured. When the magnitude of either power supply
current exceeds 400 !lA the device is in the awakemode.
When the magnitudes of both supply currents are less than
400 !lA, the device is in the sleepmode. Since the total supply
current is typically ten times higher in the awakemode than
the sleepmode, the two states are easily distinguishable.
The measured value of ID+ equals the ID of both devices
(for a dual op amp) plus the output source current of device
A and the output source current of device B. Similarly, the
measured value of ID- is equal to the ID- of both devices plus
the output sink current of each device. lout is the sum

of the currents caused by both the feedback loop and load
resistance. The total lout needs to be subtracted from the
measured ID to obtain the correct ID of the dual op amp.
An accurate way to measure the awakemode lout current
on automatic test equipment is to remove the lout current on
both Channel A and B. Then measure the ID values before
the device goes back to the sleepmode state. The transition
will take typically 1.5 seconds with ±15 V power supplies.
The large signal sleep mode testing in the characterization
was accomplished with a 1.0 MQ load resistor which ensured
the device would remain in sleep mode despite large
voltage swings.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-233

I

III

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

III

MC33171, MC35171
MC33172, MC35172
MC33174, MC35174

Low Power, Single Supply
Operational Amplifiers

DUAL

Quality bipolar fabrication with innovative design concepts are employed for
the MC33171/72/74, MC35171172/74 series of monolithic operational
amplifiers. These devices operate at 180 IlA per amplifier and offer 1.8 MHz of
gain bandwidth product and 2.1 V/IlS slew rate without the use of JFET device
technology. Although this series can be operated from split supplies, it is
particularly suited for single supply operation, since the common mode input
voltage includes ground potential (VEE). With a Darlington input stage, these
devices exhibit high input resistance, low input offset voltage and high gain. The
all NPN output stage, characterized by no deadband crossover distortion and
large output voltage swing, provides high capacitance drive capability,
excellent phase and gain margins, low open-loop high frequency output
impedance and symmetrical source/sink AC frequency response.
The MC33171/72/74, MC35171/72/74 are specified over the industrial!
automotive or military temperature ranges. The complete series of single, dual
and quad operational amplifiers are available in the plastic and ceramic DIP as
well as the SOIC surface mount packages.

PSUFFIX
PLASTIC PACKAGE
CASE 626

USUFFtX
CERAMIC PACKAGE
CASE 693
DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-S)

PIN CONNECTIONS
Offset Null

1

Inv. Input

2

Noninv. Input

3

VEE

4

L--_ _- '

6

Output

5

Offset Null

(Single, Top View)

• Low Supply Current: 180 IlA (Per Amplifier)
• Wide Supply Operating Range: 3.0 V to 44 V or ±1.5 V to ±22 V

• Vee

• Wide Input Common Mode Range, Including Ground (VEE)

7

Output 2

• Wide Bandwidth: 1.8 MHz
• High Slew Rate: 2.1 V/IlS
(Top View)

• Low Input Offset Voltage: 2.0 mV
• Large Output Voltage Swing: -14.2 V to +14.2 V (with ±15 V Supplies)
• Large Capacitance Drive Capability: 0 pF to 500 pF

14_
'.
•

• Low Total Harmonic Distortion: 0.03%
• Excellent Phase Margin: 60°C

QUAD

14

• Excellent Gain Margin: 15 dB

1

• Output Short Circuit Protection

1

PSUFFIX
PLASTIC PACKAGE
CASE 646

• ESD Diodes Provide Input Protection for Dual and Quad

U SUFFIX
CERAMIC PACKAGE
CASE 632

D SUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)

PIN CONNECTIONS

ORDERING INFORMATION
OpAmp
Function

Device

Temperature
Range

Package

Single

MC33171D
MC35171U
MC33171P

-40' to +S5'C
-55' to +125'C
-40' to +S5'C

SO-S
Ceramic DIP
Plastic DIP

Dual

MC33172D
MC35172U
MC33172P

-40' to +S5'C
-55' to + 125'C
-40' to +S5'C

SO-S
Ceramic DIP
Plastic DIP

Quad

MC33174D
MC35174L
MC33174P

-40' to +S5'C
-55' to + 125'C
-40' to +S5'C

SO-S
Ceramic DIP
Plastic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-234

(Top View)

MC33171, MC33172, MC33174, MC35171, MC35172, MC35174
MAXIMUM RATINGS
Rating

Value

Symbol

Supply Voltage

VCCIVEE

±22

V

VIDR

(Note 1)

V

Input Voltage Range

VIR

(Note 1)

V

Output Short Circuit Duration (Note 2)

tsc

Indefinite

sec

Operating Ambient Temperature Range
MC35171/MC35172/MC35174
MC33171/MC33172/MC33174

TA

Input Differential Voltage Range

•

Unit

°C
-55 to +125
-40 to +85

Operating Junction Temperature

+150

TJ

Storage Temperature Range
Ceramic Package
Plastic Package

°C
°C

Tstg
--

a

VEE

"-

cr:

' V to ,±22 V
= ±5.0
=25'C

Source

--

1.0

~

0.1

::l

(.)

-1.0

~

:;;

~

VCcfVEE
TA

::l

-2.4

:;;

I--

-'.

Vcc Y

w

(!:J

o

-55

-25

"""

0
25
50
75
TA, AMBIENT TEMPERATURE ('C)

100

125

/

o
o

.L

--

Sink
VEE '1.0

2.0
3.0
IL, LOAD CURRENT (±mA)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-237

III
,

V/flS

4.0

MC33171, MC33172, MC33174, MC35171, MC35172, MC35174
Figure 3. Open-Loop Voltage Gain and
Phase versus Frequency

.. .

i'D 30
:!2.

z

~

"f·

.............

20

i"oo..

w

t!)

!:3

10

§;
@;

0

I ,

,...,

o

~-20
>
«

-30
lOOk

70

I II
I II

.

120

en
w

Gain
Phase ~ I- Margin

~ r':,

Margin
~o 2 ,

VCcNEE; ±15 V
RL; 10 k
Voul; 0 V
TA; 25°C
1-Phase
2 - Phase. CL; 100 pF
3-Gain
4-Gain. CL; 100pF

~ -10

Figure 4. Phase Margin and Percent Overshoot
versus Load Capacitance

140~

t!)

Sl

CI.>

a:

w
160;;

; 15dB

,

:J:

f"': ~

4
3r-..:

180 if

,

,,

fIT" 60

w
a:

CI.>
CI.>

w

200~

e.
~

1.0M
f. FREQUENCY (Hz)

50

il:

20

Ii

.e.

-e- 10

%

i[ 1.2
~

::;: 1.1
a:

~
;C 1.0
CI.>

c

~ 0.9

~
t!)

I

--

--:: ~

~

"'"

0
25
50
75
TA. AMBIENTTEMPERATURE (0C)

<§

w 80
0..
~

I- 60
=>
0..
l=> 40
0
0
N
20

o
200

V~

1/

50
100
200
CL. LOAD CAPACITANCE (pF)

20

o

1.0 k

500

to--

.

'"

i

V

/

If

t1I.

20 k
f. FREQUENCY (Hz)

!z
~

a:
=>

1. TA; -55°C
2. TA; 25°C
0.9 3. TA; 125°C

~ 0.7
0..
=>
CI.>
a: 0.5

~c3 0.3

i-AV;1.

'\...r

C,)

V
200 k

g

2.0M

c
- 0.1 0

--

~

/.~

C,)

~

/

.

-L

Figure 8. Supply Current versus Supply Voltage

~

AV; 100

iJ~

_

.

5.0IlS/DIV


«

w

220

m

70

II JJ 60

/

/

r'"

to-

--

-

1
2
3

123_

Dual

l,....-: I-:::

~~

Single

1-

2
3-

....
5.0

10
15
VCcNEE. SUPPLY VOLTAGE (±V)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-238

,I

r-Quad

I---

20

25

MC33171, MC33172, MC33174, MC35171, MC35172, MC35174
APPLICATIONS INFORMATION
CIRCUIT DESCRIPTION/PERFORMANCE FEATURES

Although the bandwidth, slew rate, and settling time of the
MC33171 /72/74 amplifier family is similarto low power op amp
products utilizing JFET input devices, these amplifiers offer
additional advantages as a result of the PNP transistor
differential inputs and an all NPN transistor output stage.
Because the input common mode voltage range of this input
stage includes the VEE potential, single supply operation is
feasible to as low as 3.0 V with the common mode input
voltage at ground potential.
The input stage also allows differential input voltages up to
±44 V, provided the maximum input voltage range is not
exceeded. Specifically, the input voltages must range
between VCC and VEE supply voltages as shown by the
maximum rating table. In practice, although not
recommended, the input voltages can exceed the VCC voltage
by approximately 3.0 V and decrease below the VEE voltage
by 0.3 V without causing product damage, although output
phase reversal may occur. It is also possible to source up to
5.0 mA of current from VEE through either inputs' clamping
diode without damage or latching, but phase reversal may
again occur. If at least one input is within the common mode
input voltage range and the other input is within the maximum
input voltage range, no phase reversal will occur. If both inputs
exceed the upper common mode input voltage limit, the output
will be forced to its lowest voltage state.
Since the input capacitance associated with the small
geometry input device is substantially lower (0.8 pF) than that
of a typical JFET (3.0 pF). the frequency response for a given
input source resistance is greatly enhanced. This becomes
evident in D-to-A current to voltage conversion applications
where the feedback resistance can form a pole with the input
capacitance of the op amp. This input pole creates a 2nd Order
system with the single pole op amp and is therefore
detrimental to its settling time. In this context, lower input
capacitance is desirable especially for higher values of
feedback resistances (lower current DAC's). This input pole
can be compensated for by creating a feedback zero with a
capacitance across the feedback resistance, if necessary, to
reduce overshoot. For 10 kQ of feedback resistance, the
MC33171/72/74 family can typically settle to within 1/2 LSB of
8 bits in 4.21-1s, and within 1/2 LSB of 12 bits in 4.81-1s for a 10 V
step. In a standard inverting unity gain fast settling
configuration, the symmetrical slew rate is typically ±2.1 V/l-1s.
In the classic non inverting unity gain configuration the typical
output positive slew rate is also 2.1 V/l-1s, and the
corresponding negative slew rate will usually exceed the
positive slew rate as a function of the fall time of the
input waveform.
The all NPN output stage, shown in its basic form on the
equivalent circuit schematic, offers unique advantages over
the more conventional NPN/PNP transistor Class AB output
stage. A 10 kQ load resistance can typically swing within 0.8 V
of the positive rail (VCC) and negative rail (VEE). providing a
28.4 Vp-p swing from ±15 V supplies. This large output swing
becomes most noticeable at lower supply voltages.
The positive swing is limited by the saturation voltage of the
current source transistor 07, the VBE of the NPN pull-up
transistor 017, and the voltage drop associated with the short
circuit resistance, R5. For sink currents less than 0.4 mA, the
negative swing is limited by the saturation voltage of the
pull-down transistor 015, and the voltage drop across R4 and
R5. For small valued sink currents, the above voltage drops
are negligible, allowing the negative swing voltage to

approach within millivolts of VEE. For sink currents (> 0.4 mA).
diode D3 clamps the voltage across R4. Thus the negative
swing is limited by the saturation voltage of 015, plus the
forward diode drop of D3 (~VEE +1.0 V). Therefore an
unprecedented peak-to-peak output voltage swing is possible
for a given supply voltage as indicated by the output
swing specifications.
lithe load resistance is referenced to VCC instead of ground
for single supply applications, the maximum possible output
swing can be achieved for a given supply voltage. For light
load currents, the load resistance will pull the output to VCC
during the positive swing and the output will pull the load
resistance near ground during the negative swing. The load
resistance value should be much less than that of the
feedback resistance to maximize pull-up capability.
Because the PNP output emitter-follower transistor has
been eliminated, the MC33171172/74 family offers a 15 mA
minimum current sink capability, typically to an output voltage
of (VEE + 1.8 V). In single supply applications the output can
directly source or sink base current from a common emitter
NPN transistor for current switching applications.
In addition, the all NPN transistor output stage is inherently
faster than PNP types, contributing to the bipolar amplifier's
improved gain bandwidth product. The associated high
frequency low output impedance (200 Q typ @ 1.0 MHz)
allows capacitive drive capability from 0 pF to 400 pF without
oscillation in the noninverting unity gain configuration. The
60°C phase margin and 15 dB gain margin as well as the
general gain and phase characteristics are virtually independent of the source/sink output swing conditions. This allows
easier system phase compensation, since output swing will
not be a phase consideration. The AC characteristics of the
MC33171 /72/74 family also allow excellent active filter capability, especially for low voltage single supply applications.
Although the single supply specification is defined at 5.0 V,
these amplifiers are functional to at least 3.0 V @ 25°C.
However slight changes in parametrics such as bandwidth,
slew rate, and DC gain may occur.
If power to this integrated circuit is applied in reverse polarity
or if the IC is installed backwards in a socket, large unlimited
current surges will occur through the device that may result in
device destruction.
As usual with most high frequency amplifiers, proper lead
dress, component placement and PC board layout should
be exercised for optimum frequency performance. For
example, long unshielded input or output leads may result in
unwanted input/output coupling. In order to preserve the
relatively low input capacitance associated with these
amplifiers, resistors connected to the inputs should be
immediately adjacent to the input pin to minimize additional
stray input capacitance. This not only minimizes the input pole
for optimum frequency response, but also minimizes
extraneous "pick up" at this node. Supply decoupling with
adequate capacitance immediately adjacent to the supply pin
is also important, particularly over temperature, since many
types of decoupling capacitors exhibit great impedance
changes over temperature.
The output of anyone amplifier is current limited and thus
protected from a direct short to ground. However, under such
conditions, it is important not to allow the device to exceed the
maximum junction temperature rating. Typically for ±15 V
supplies, anyone output can be shorted continuously to
ground without exceeding the maximum temperature rating.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-239

MC33171, MC33172,MC33174, MC35171, MC35172, MC35174
Figure 9. AC Coupled Noninvertlng Amplifier
with Single +5.0 V Supply
2.2k

Vee

510k
Vee

!:in

Figure 10. AC Coupled Inverting Amplifier
with Single +5.0 V Supply

lOOk

1\

VOO

*

V

Vo 0......L.-+--,_-_3.....
aV_p_.p_

t

Co

..

r
"-

1\

lOOk

3.6Vp·p

V

.,

t
Vo

VO

AV= 101
BW ( -3.0 dB) = 20 kHz

AV=IO
BW ( -3.0 dB) = 200 kHz

Figure 11. DC Coupled Inverting Amplifier
Maximum Output Swing with Single
+5.0 V Supply

Figure 12. Offset Nulling Circuit
Vee

'V

V Vo 2.5V
in

1\
-L---lVt---.--

~=IO

4.2Vp-p
_.,.-_

t

0ffse1 Nulling range is approxima1eiy ±SO mV with
a 10 k potentiometer, MC33171/MC35171 only.

BW ( -3.0 dB) = 200 kHz

Figure 13. Active High.Q Notch Filter

Figure 14. Active Bandpass FlHer

Vin<:0.2Vdc
16k
Vin D--<.......VV\,.....~VV\-1--i
R
0.01

>-......-oVo

RI
I.lk

e
0.047

Vee
fo =30kHz
0=10
HO=I.O

R3
2.2k

>---+--OVO
R2
5.6k

2C
0.02

2R
32k

fo = 1.0 kHz
.
R3
Then: RI = 2 HO

I
fo= 4ltRe

Given fo = center frequency

Au = Gain at center frequency
Choose Value fo, 0, Au, e

R2RIR3
- 402RI-R3

~

GBW <0.1

For less than 10% error for operational amplifier, where fo and GBW are expressed in Hz.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-240

MOTOROLA

MC33178
MC33179

SEMICONDUCTOR-----TECHNICAL DATA

High Output Current Low Power,
Low Noise Bipolar Operational
Amplifiers
The MC33178/9 series is a family of high quality monolithic amplifiers
employing Bipolar technology with innovative high performance concepts for
quality audio and data signal processing applications. This device family
incorporates the use of high frequency PNP input transistors to produce
amplifiers exhibiting low input offset voltage, noise and distortion. In addition, the
amplifier provides high output current drive capability while consuming only
420 ~A of drain current per amplifier. The NPN output stage used, exhibits no
deadband crossover distortion, large output voltage swing, excellent phase and
gain margins, low open-loop high frequency output impedance, symmetrical
source and sink AC frequency performance.
The MC33178/9 family offers both dual and quad amplifier versions, tested over
the vehicular temperature range. These devices are available in DIP and SOIC
packages.

HIGH OUTPUT CURRENT
LOW POWER, LOW NOISE
OPERATIONAL AMPLIFIERS

DUAL

.AI

PSUFFIX
PLASTIC PACKAGE
CASE 626

1

D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

8~
1

• 600 Q Output Drive Capability
•

Large Output Voltage Swing

•

Low Offset Voltage: 0.15 mV (Mean)

•

Low T.C. of Input Offset Voltage: 2.0 ~V/oC

PIN CONNECTIONS
Output 1

• Low Total Harmonic Distortion: 0.0024%
(@ 1.0 kHz w/600 Q Load)

Inputs 1 {

1

8

Vee

2

7

Output2

3-

• High Gain Bandwidth: 5.0 MHz

: } Inputs 2
VEE 4"--_--'

• High Slew Rate: 2.0 V/~s
• Dual Supply Operation: ±2.0 V to ±18 V

(Top View)

• ESD Clamps on the Inputs Increase Ruggedness
without Affecting Device Performance
QUAD

Equivalent Circuit Schematic (Each Amplifier)

PSUFFIX
PLASTIC PACKAGE
CASE 646
DSUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)
PIN CONNECTIONS

VEE

ORDERING INFORMATION
OpAmp
Function

Fully
Compensated

Dual

MC33178D
MC33178P

Quad

MC33179D
MC33179P

Temperature
Range

-40" to +85°C

Package
SO-8
Plastic DIP
SO-14
Plastic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-241

MC33178, MC33179
MAXIMUM RATINGS
Ra,lng

Symbol

Value

Unit

Vs

+3S

V

VIDR

(Note 1)

V

Input Voltage Range

VIR

(Note 1)

V

Output Short Circuit Duration (Note 2)

tsc

Indefinite

sec

TJ

+150

°C

Storage Temperature Range

Tstg

-60 to +150

°C

Maximum Power Dissipation

PD

(Note 2)

mW

Supply Voltage (VCC to VEE)
Input Differential Voltage Range

Maximum Junction Temperature

DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25°C, unless otherwise noted.)
Figure

Symbol

Input Offset Voltage (RS = 50 Q, VCM = 0 V, Va = 0 V)
(VCC = +2.5 V, VEE = -2.5 V to VCC = +15 V, VEE = -15 V)
TA = +25°C
TA = -40° to +85°C

Characteristics

2

IVlol

Average Temperature Coefficient of Input Offset Voltage
(RS = 50n, VCM = 0 V, Vo = 0 V)
TA = -40° to +85°C

2

aVloIaT

3,4

liB

Input Bias Current (VCM = 0 V, Va = 0 V)
TA = +25°C
TA = -40° to +85°C
Input Offset Current (VCM = 0 V, Va = 0 V)
TA = +25°C
TA = -40° to +85°C

11101

Min

Typ

Max

-

0.15

3.0
4.0

mV

5

Large Signal Voltage Gain (Va = -10 V to +10 V, RL = SOO n)
TA = +25°C
TA = -40° to +85°C

S,7

VICR

-

2.0

-

-

100

500
SOO

-

5.0

-

50
SO

-13

-14
+14

+13

-

nA

-

nA

-

200 k

-

-

-

8,9,10

V
VO+
Vcr
Vo+
Vcr
Vo+
Vcr

+12
-

Vo+
Vcr

1.1

+13

-

+12
-12
+13.S
-13
+14
-13.8
1.S
-1.S

Common Mode Rejection (Vin = ±13 V)

11

CMR

80

110

Power Supply Rejection
VCcNEE = +15 VI -15 V, +5.0 VI -15 V, +15 V/-5.0 V

12

PSR

80

110

13,14

ISC
+50
-50

+80
-100

Output Short Circuit Current (VID = ±1.0 V, Output to Ground)
Source (VCC = 2.5 V to 15 V)
Sink (VEE =-2.5 V to -15, V)
Power Supply Current (VO = 0 V)
(VCC = 2.5 V, VEE = -2.5 V to VCC
MC33178 (Dual)
TA = +25°C
TA = -40' to +85°C
MC33179 (Quad)
TA=+25°C
TA = -40° to +85°C

15

= +15 V, VEE =-15 V)

V
VN

AVOL
50 k
25 k

Output Voltage Swing (VID = ±1.0 V)
(VCC = +15 V, VEE = -15 V)
RL = 300 n
RL =300 n
RL = soon
RL = soo n
RL = 2.0 kn
RL = 2.0 kn
(VCC = +2.5 V, VEE = -2.5 V)
RL = soon
RL= soon

-

JlV/oC

-

Common Mode Input Voltage Range
(aVIO = 5.0 mV, Va = 0 V)

Unit

-

-

-12

-

-13

-

-1.1

-

dB
dB
rnA

rnA

ID

-

-

-

1.7

-

1.4
1.S
2.4
2.S

NOTES: 1. Either or both input voltages should not exceed VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded. (See power dissipation
performance characteristic, Figure 1.)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-242

MC33178, MC33179
AC ELECTRICAL CHARACTERISTICS (VCC = + 15 V, VEE = -15 V, TA = 25°C, unless otherwise noted.)
Characteristics

Figure

Symbol

Min

Typ

Max

Unit

16,31

SR

1.2

2.0

-

V/iJS

17

GBW

2.5

5.0

-

MHz

18,19

AVO

-

50

-

dB

3.0

-

MHz

Slew Rate
(Vin =-10 V to +10 V, RL = 2.0 kn, CL = 100 pF, AV = +1.0 V)
Gain Bandwidth Product (I = 100 kHz)
AC Voltage Gain (RL = 600 0. Vo = 0 V, I = 20 kHz)
Unity Gain Frequency (Open-Loop) (RL = 600 0. CL = 0 pF)

-

IU

Gain Margin (RL = 600 0. CL = 0 pF)

20,22,23

Am

Phase Margin (RL = 600 0. CL = 0 pF)

21,22,23

cjlm

Channel Separation (I = 100 Hz to 20 kHz)

24

CS

Power Bandwidth (VO = 20 Vp _p , RL = 600 0. THD S 1.0%)

BWp

Distortion (AL = 600 0., Vo = 2.0 Vp _p , AV = + 1.0 V)
(I = 1.0 kHz)
(I = 10 kHz)
(1=20 kHz)

25

Open-Loop Output Impedance
(VO =0 V, 1= 3.0 MHz, AV= 10V)

26

THD

15
60
-120
32

-

IZoI

0.0024
0.014
0.024
150

-

RIN

-

200

-

Differential Input Capacitance (VCM = 0 V)

CIN

-

10

-

27

Equivalent Input Noise Current
1= 10 Hz
1= 1.0 kHz

28

Iz

o
~

2400

!a
Q

a: 1600

~

:::;; 1200

I

in

Figure 1. Maximum Power Dissipation
versus Temperature

e,; 2000

I

en

800

8.0
7.5

-

0.33
0.15

%

0

kG
pF

-

nV/..J"Hz

-

pAl..J"Hz

-

-

Figure 2. Input Offset Voltage versus
Temperature for 3 Typical Units
4.0

I

~
w

~C3alT8P/9

~
!:J
§!
I;j

I ""'-J..

~31'm;.. .........
·..·,...1

-

dB
kHz

-

Differential Input Resistance (VCM = 0 V)

Equivalent Input Noise Voltage (RS = 1000.)
1= 10 Hz
1= 1.0 kHz

dB
Degrees

.......

~

ff
u.

........
.......
MC3~ ~ .........
.......
1-... .........

......

0

5D..

...... ......

~

400
0-60 -40 -20

0

20

40

60

80

iIIIIi1IIII
tOO t20 t40 160 180

TA, AMBIENT TEMPERATURE (0C)

VCC=+15V
VEE=-15V AS= 100
VCM=OV

3.0
2.0

Unftl

1.0

Unft2
0

Unft3
-1.0

;5;

-2.0

~

-3.0
-4.0

-55

-25

0

25

50

75

TA, AMBIENT TEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-243

100

125

MC33178, MC33179
Figure 4. Input Bias Current
versus Temperature

Figure 3. Input Bias Current
versus Common Mode Voltage
120

160

:§ 140 1\

"-...

I-

zw 120
a:
a: 100
::>

...............

C,)

~ 80

'"::>a.

I-

;;!;

!!i

60 r-VCC=+15V
VEE=-15V
40
r-TA=TC

I
110 r- VCC=+15V
r- VEE=-15V
Iz
VCM = OV
w
a: 100
a:

:§

- r---- --

-15

-10

-5.0
0
5.0
VCM, COMMON MODE VOLTAGE M

10

en

90

'"::>
a.

80

!!i

70

I-

./

;;!;

~

60
-55

15

"

V
./

C,)

::;!;

20

o

./"
./

::>

./

/'

-25

0
25
50
75
TA, AMBIENT TEMPERATURE (OC)

100

125

Figure 6. Open·Loop Voltage Gain
versus Temperature

Figure 5. Input Common Mode Voltage
Range versus Temperature
w

~

VCC

I

w VCC-0.5V

~

a

VCC-l.0V

:g

VCC-l.5V

>

~

I

I

;;!;

C3

VCC = +5.0 V 10+ 18 V
VEE=-5.0Vto-18V
AVIOi5.0mv I

o
;: VCC-2.0V

-

~ :::;:Ef§
!j

~ 250

I

EE_55

0

25

I

50

100

t:i

150

40

C!I

30
20

~
w

t:i

~

@S

$z

10
0
-10

~ -20

~

........

-r-- -r-. "

1'-0.. .....

i"-".

........

I'--..

i'..

r...; ~

125

9

I-- VCC = +15 V
100
VEE=-15V
I-f=10Hz
Z
w
I - AVO=10Vto+l0V
@S 50
RL=6000
...::.

~ o
-55

[';

5

"\.

0

-25

25

50

75

..........

100

125

TA, AMBIENT TEMPERATURE (OC)

Figure 8. Output Voltage Swing
versus Supply Voltage

80
I
_
VCC=+15V- 100 en
VEE=-15V _
120 ~
vo=ov
TA=25°C - 140 S3
c
160 W
en
180 ~
a.
~A
200 ~
w
t--JB i'-.
220 ~

lA) Phase (RL = 600 0)
I' ~B
-30 2A) Phase (RL = 600 0, CL = 300 pF)
'-2A
1
B)
Gain
(RL
=
600
0)
~ -40
2B) Gain (RL = 600 n, CL = 300 pF)
-50
4
5
6 7 8 910
2

o

--

r----..

a.

Figure 7. Voltage Gain and Phase
versus Frequency

~

r-......

~

TA, AMBIENT TEMPERATURE (OC)

l'C 50

--

w

1 -

75

--..

C!I

In

~

-25

J

200

r--....."""""
20

240

w

40

~

35

~30

RL=10kO~

w

C!I

t:i

25

A

~ 20
~
a.

I-

::>
0

.e:

260
280

~

TA = 25°C

<;L

~
~ P'"

15
10

0

> 5.0

~

7

V-

RL =6000

po'"

P'"

~

5.0
10
15
VCC, IVEEI, SUPPLY VOLTAGE M

f, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-244

::;..'

20

MC33178, MC33179
Figure 9. Output Saturation Voltage
versus Load Current
VCC

w
~

-

I
TA = +125'C

~
z

-

TA=t 5'C

!j VCC-l.0V

28

Source

~

J

,

::::l

<:t
20
w
~

:::::..

rI

53 VEE +2.0 V -Sink
~

~

12 I - - VCC = +15 V
VEE=-15V
RV 600Q
is 8.0 II -- -- AV
= +1.0 V
THD = ,,1.0%
~ 4.0
I--- TA = 25'C

!3
~

I

VCC=+5.0Vlo+18V
VEE = -5.0 Vlo -18V

TA = +125'C

J
~O

\

16

!j

- - TA- 55'C

§ VEE +1.0V

"\

C. 24

~ VCC-2.0V

!3
"-

Figure 10. Output Voltage
versus Frequency

10
15
IL, LOAD CURRENT (±mA)

o

20

10 k

1.0 k

ill

120

.......

w

8
::;;

60

 -10

~ t-...:::::::: ~

-

............ .......

,

~

2B i'" ~~

!

120

~

;: -20 lA) Phase Vce =18 V, VEE = -18 V
-.....:
-30 2A) Phase Vce 1.5 V, VEE = -1.5 V
18) Gain Vee = 18 V, VEE = -18 V
-40
2B) Gain VCC = 1.5 V. VEE = -1.5 V
-50
100 k
1.0M
10M
f. FREQUENCY (Hz)

200

en

\ 1\

,

m
220~
x
240W_
~

\

II jill
1.0M

260
280
100M

10M

~

Cl

_ -20
>

r---- Vec=+15V

VEE = -15 V
I----- f = 100 kHz
z
Z!j 2.0 r---- RL = 600 Q
CL = 0 pF

'"

I
50

80

z

-

~ 6.0

C!J

30

:!'1- 20

a
a:

!

1100PF

600n

r--..

40

§:

I
25

+

Figure 18. Voltage Gain and Phase
versus Frequency

e
~

I
0

~f'O

TA. AMBIENT TEMPERATURE (0C)

Figure 17. Gain Bandwidth Product
versus Temperature
N

JL 1
T "'Vin

-25

VCe.IVEEI. SUPPLY VOLTAGE (V)

/'

/

V

/

,,--

100

125

MC33178, MC33179
Figure 21. Phase Margin
versus Temperature
60

tl:l

!!

12

I

U)

a:

Figure 22. Phase Margin and Gain Margin
versus Differential Source Resistance

CL= 10pF

50

10

40

~8.0

i:::;; 6.0

z

(lj

!1i
:::;;

30

k-""""

w

~

CL = 300 pF

z

20

4.0

E

VCC=+15V
VEE=-15V
RL=6000

0.

'£10

TA TiC

:;;:
(!l_

<

2.0

Vin

-55

-25

0
25
50
75
TA, AMBIENT TEMPERATURE (OC)

100

-

--

~ 15

~

~ 12

z

~

0 .90
.

-I-

""'"

.....

I_II I
.
Phase Margin

VEE=-15V
VO=OV

~
~inMargi
III ............

o

i 6.0 -'.~'O
+
~3.0 _
1
~

60Dn_

~cd=~I~~

"'- 'r'\
..........

1'1"-

CL

<

o

10

I

I I

11-1 III

100
Ct.. OUTPUT LOAD CAPACITANCE (pF)

20 ~

-,....

II

150

60
50

fff

101

100~

~

(!l

40~
z

III II II II

iii"

~ 140

o
b

ffi

0.
W

Drive Channel
VCC=+15V
CEE=-15V
RL=6000
TA= 25°C

i'

1/

130

en

30!
w

..J

!li!

20~

~
u

if:

120

I'

uS 110
u

o

100
100

1.0k

1.0k

10k
f, FREQUENCY (Hz)

lOOk

1.0M

Figure 26. Output Impedance
versus Frequency
500

VCC=+15V
VEE=-15V
VO=OV
TA = 25°C

I.Av=l:O'
2.AV= 10
3.AV= 100
4.AV= 1000

~ 300
~

...,

II II

II IIIII I

~400

AV= 1000

AV= 100

Oil
I-

~ 200

§
il. 100

AV=10

......,. AV=I.0L

i-"

IoI"r111'

100

if:

~hFeIMfr~i~
Va

Figure 24. Channel Separation
versus Frequency

Figure 25. Total Harmonic Distortion
versus Frequency
VCC=+15V VO=2.0Vp.p
VEE = -15 V TA = 25°C
RL=6000

(lj

30 ~

1.0k
10k
RT. DIFFERENTIAL SOURCE RESISTANCE (0)

10 E
-e-

E

ffi
e.
w

~

125

tl:l

a:
z

r\

....
+

Figure 23. Open-Loop Gain Margin and Phase
Margin versus Output Load Capacitance
18

40

,,~

II

U)

50

G·I MI 1.1
-.....::am argm

R2

o

iii"

II

r--

Vcc =:15r;
VEE=-15V
RT= Rl+R2
VO=OV
l

iii"

CL =100pF

D:ttt

60

1.0 k
f, FREQUENCY (Hz)

10 k

o1.0 k

lOOk

~4

P

~./

/

I
10k

lOOk
f, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-247

W
1.0M

10M

MC33178, MC33179

III

Figure 27. Input Referred Noise Voltage
versus Frequency

I~
-".

20

3>c:

Input Noise Voltage Test Circuit

18

iF

tg 16

t:§

14

~

12

rJ)

oz
fil
a:
ffi

10
8.0
6.0

~

4.0

::::J

2.0

,...
a..

10

<=

I!

0.5

!z
UJ

0.4

Vo

::::J

~ 0.3

oz
fil

!5
a..

100

1.0 k
f, FREQUENCY (Hz)

10 k

10 k

~

60

!!;!

50

,...

40

UJ

30

0

z

0

a:

w
a..

/

10

o

10

100

1.0k
f, FREQUENCY (Hz)

1/

~
RL = 2.0 kQ

lOOk

."•

I

.

V

/;

1.0k

/1

1,

. . . . :

/

j/'

~I'

100

10k

I

II.

./"

I-""

~A ~ 2t~?11I1

10

V'

V'

20

0

.

V

/

VCC=+15V
VEE= -15 V

0.1

•

V

RL =600 Q

(RS =10kQ)

Figure 30. Noninverling Amplifier Slew Rate

I I 1.1

,...

= =

r--.

w

90 t- VCC=+15V
80 t- VEE= -15 V
?t:TA = 25°C
70
0
0

0.2

a:
a:

Figure 29. Percent Overshoot versus
Load Capacitance

:c
rJ)
a:

r--.

rJ)

I I I IIIIIII I I IIIII
Input Noise Current Test Circuit

~'O

a:
a:

it
a:

'"

100

11111

i

VCC = +15 V
VEE = -15V
TA = 25°C

o

~

Figure 28. Input Referred Noise Current
versus Frequency

10k

1

I

,/1

:

'

I

1

t, TIME (2.0 j.Ls/DIV)

CL, LOAD CAPACITANCE (pF)

Figure 31. Small Signal Transient Response

Figure 32. Large Signal Transient Response

so

S

E

<>
!!l.
UJ
(!)

t:§

,...§?
~

!5
o
6

>

t, TIME (5.0 j.Ls/DIV)

t, TIME (2.0 ns/DIV)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-248

MC33178, MC33179
Figure 33. Telephone Line Interface Circuit
I

10k

To
Receiver

10k

~----+--<

10k

J

1.0JlF

200k
120k
From
Microphone

300

2.0k

_~VV\'--<"""'--j

820

1N4678

10k

APPLICATION INFORMATION
This unique device uses a boosted output stage to combine
a high output current with a drain current lower than similar
bipolar input op amps. Its 60° phase margin and 15 dB gain
margin ensure stability with up to 1000 pF of load capacitance
(see Figure 23). The ability to drive a minimum 600 Q load
makes it particularly suitable for telecom applications. Note
that in the sample circuit in Figure 33 both A2 and A3 are
driving equivalent loads of approximately 600 Q .
The low input offset voltage and moderately high slew rate
and gain bandwidth product make it attractive for a variety of
other applications. For example, although it is not single
supply (the common mode input range does not include
ground), it is specified at +5.0 V with a typical common mode
rejection, of 110 dB. This makes it an excellent choice for use
with digital circuits. The high common mode rejection, which
is stable over temperature, coupled with a low noise figure and
low distortion is an ideal op amp for audio circuits.
The output stage of the op amp is current limited and
therefore has a certain amount of protection in the event of a
short circuit. However. because of its high current output, it is
especially important not to allow the device to exceed the
maximum junction temperature, particularly with the
MC33179 (quad op amp). Shorting more than one amplifier

could easily exceed the junction temperature to the extent of
causing permanent damage.
Stability

As usual with most high frequency amplifiers, proper lead
dress, component placement, and PC board layout should be
exercised for optimum frequency performance. For example,
long unshielded input or output leads may result in unwanted
input/output coupling. In order to preserve the relatively
low input capacitance associated with these amplifiers,
resistors connected to the inputs should be immediately
adjacent to the input pin to minimize additional stray input
capacitance. This not only minimizes the input pole frequency
for optimum frequency response, but also minimizes
extraneous "pick up" at this node. Supplying decoupling with
adequate capaCitance immediately adjacent to the supply pin
is also important, particularly over temperature, since many
types of decoupling capacitors exhibit great impedance
changes over temperature.
Additional stability problems can be caused by high load
capacitances and/or a high source resistance. Simple
compensation schemes can be used to alleviate these effects.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-249

III

MC33178, MC33179
If a high source of resistance is used (Rl > 1.0 kQ), a
compensation capacitor equal to or greater than the input
capacitance olthe op amp (1 0 pF) placed across the feedback
resistor (see Figure 34) can be used to neutralize that pole and
prevent outer loop oscillation. Since the closed loop transient
response will be a function of that capacitance it is important
to choose the optimum value for that capacitor. This can be
determined by the following formula:

For moderately high capacitive loads (500 pF < Cl <
1500 pF) the addition of a compensation resistor on the order
of 20 Q between the output and the feedback loop will help to
decrease miller loop oscillation (see Figure 35). For high
capacitive loads (Cl > 1500 pF) a combined compensation
scheme should be used (see Figure 36). Both the
compensation resistor and the compensation capacitor affect
the transient response and can be calculated for optimum
performance. The value of Cc can be calculated using formula
(1). The formula to calculate RC is as follows:

Cc = (1 +[Rl/R2])2. Cl (ZO/R2)

(1)

where: Zo is the output impedance of the op amp.

(2)

RC = ZO. Rl/R2

Figure 34. Compensation for
High Source Impedance

Figure 35. Compensation Circuit for
Moderate Capacitve Loads

R2
R2

Cc
RC

Rt

+

Rt

Figure 36. Compensation Circuit for
High Capacitive Loads
R2

Cc

RC

Rt

+

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-250

MC33201
MC33202
MC33204

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Advance Information
Rail-to-RailTM Operational Amplifiers
The MC33201/2/4 family of operational amplifiers provide rail-to-rail operation
on both the input and output. The inputs can be driven as high as 200 mV beyond
the supply rails without phase reversal on the outputs, and the output can swing
within 50 mV of each rail. This rail-to-rail operation enables the user to make full
use of the supply voltage range available. It is designed to work at very low supply
voltages (± 0.9 V) yet can operate with a supply of up to + 12 V and ground. Output
current boosting techniques provide a high output current capability while keeping
the drain current of the amplifier to a minimum. Also, the combination of low noise
and distortion with a high slew rate and drive capability make this an ideal amplifier
for audio applications.
• Low Voltage, Single Supply Operation
(+ 1.8 V and Ground to +12 V and Ground)
• Input Voltage Range Includes both Supply Rails
• Output Voltage Swings within 50 mV of both Rails
• No Phase Reversal on the Output for Oven-driven Input Signals
•
•
•
•
•

High Output Current (Isc = 80 mA, Typ)
Low Supply Current (10 = 0.9 mA, Typ)
600 n Output Drive Capability
Extended Operating Temperature Range (- 40° to + 105°C)
Typical Gain Bandwidth Product = 2.2 MHz

LOW VOLTAGE
RAIL-TO-RAILTM
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT

PSUFFIX
PLASTIC PACKAGE
CASE 626

D

(Single, Top View)

8~

Output 1 1

SUF~IX

Inputs 1{ 2

7

Output2

PLASTIC PACKAGE
CASE 751
(SO-8)
(Dual, Top View)

•
1

PSUFFIX
PLASTIC PACKAGE
CASE 646

DSUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)

Output 1 1

DC ELECTRICAL CHARACTERISTICS (TA = 25°C)
Characteristic

VCC = 2.0 V

VCC = 3.3 V

VCC=5.0V

Unit

Input Offset Voltage
VIO(max)
MC33201
MC33202
MC33204
Output Voltage Swing
VOH (RL = 10 kn)
VOL (RL = 10 kn)
Power Supply Current
per Amplifier (ID)

Oulput2 7

mV
±8.0
±10
±12

±S.O
±10
±12

±6.0
±8.0
±10

ORDERING INFORMATION
Device

1.9
0.10

3.15
0.15

4.85
0.15

1.125

1.125

1.125

Outpul3

(Quad, Top View)

Vmin
Vmax
rnA

Specifications at Vce = 3.3 V are guaranteed by the 2.0 V and 5.0 V tests. VEE =Gnd.

MC33201P
MC33201D
MC33202P
MC33202D
MC33204P
MC33204D

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-251

Temperature
Range

-40' to +105°C

Package
Plastic DIP
SO-8
Plastic DIP
SO-8
Plastic DIP
SO-14

•

MC33201, MC33202, MC33204
MAXIMUM RATINGS
Rating

Symbol

Value

Unit

Vs

+13

V

Input Differential Voltage Range

VIDR

(Note 1)

V

Common Mode Input Voltage Range (Note 2)

VCM

VCC +0.5 Vto
VEE-0.5V

V

Output Short Circuit Duration

ts

(Note 3)

sec

Maximum Junction Temperature

TJ

+150

°c

Tstg

-65to+150

°C

Supply Voltage (Vcc to VEE)

Storage Temperature
Maximum Power Dissipation

(Note 3)
mW
PD
.. . . .
NOTES: t. The differenfiallnput voltage of each amplifier IS limited by two Internal parallel back-to-back diodes.
For additional differential input voltage range, use current IimHing resistors In series with the Input pins.
2. The input common mode voRage range Is IImHed by internal diodes connected from the inputs to both
supply rails. Therefore, the voltage on eHher input must not exceed either supply rail by more than 500 mV.
3. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded.
(See Figure 2)

DC ELECTRICAL CHARACTERISTICS (VCC = + 5.0 V, VEE = Ground, TA = 25°C, unless otherwise noted.)
Characteristic
Input Offset VoHage (VCM 0 V to 0.5 V, VCM 1.0 V to 5.0 V)
(MC33201): TA = + 25°C
TA =-40° to +105°C

Figure

Symbol

3

IVlol

Min

-

10
13

-

2.0

-

-

80
100

200
250

-

5.0
10

50
100

VEE

-

VCC

~Vlot~T

Input Bias Current (VCM = 0 V to 0.5 V, VCM = 1.0 V to 5.0 V)
TA = + 25°C
TA =-400 to +105°C

5,6

Input Offset Current (VCM = 0 V to 0.5 V, VCM = 1.0 V to 5.0 V)
TA=+25°C
TA=-400to+l05°C

-

Common Mode Input Voltage Range

-

VICR

Large Signal Voltage Gain (VCC = + 5.0 V, VEE = - 5.0 V)
RL= 10kn
RL=600n

7

AVOL

-

8.0
11

11101

nA

300
250

VOH
VOL
VOH
VOL

4.85

-

4.95
0.05
4.85
0.15

60

90

11

CMR

Power Supply Rejection Ratio
VCcNEE = 5.0 V/Gnd to 3.0 V/Gnd

12

PSRR

Output Short Circuit Current (Source and Sink)

13,14

ISC

Power Supply Current per Amplifier (Va = 0 V)
TA=-400to+l05°C

15

ID

V
kVN

50
25

Common Mode Rejection (Vin = 0 V to 5.0 V)

Ilvrc
nA

8,9,10

4.75

-

-

V

0.15

0.25

-

dB

IlVN
500

25

-

50

80

-

-

0.9·

1.125

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-252

6.0
9.0

IIIBI
~

Output Voltage Swing (VIO = ± 0.2 V)
RL=10kn
RL= 10kn
RL=600n
RL=600n

Unit
mV

-

(MC33204): TA = + 25°C
TA =-40° to +105°C
4

Max

-

(MC33202): TA = + 25°C
TA =-400 to +105°C

Input Offset Voltage Temperature Coefficient (RS = 50 n)
TA =-400 to +105°C

Typ

rnA
rnA

MC33201, MC33202, MC33204
AC ELECTRICAL CHARACTERISTICS (VCC = + 5.0 V, VEE = Ground, TA = 25°C, unless otherwise noted.)
Characteristic
Slew Rate
(VS = ± 2.5 V, Va = - 2.0 V to + 2.0 V, RL = 2.0 k,Q, AV = +1.0)

Figure

Symbol

16,26

SR

Min

Typ

Max

0.5

1.0

Unit
V/J.ls

Gain Bandwidth Product (I = 100 kHz)

17

GBW

-

2.2

Gain Margin (RL = 600 n, CL = 0 pF)

20,21,22

AM

-

12

Phase Margin (RL = 600 n, CL = 0 pF)

20,21,22

0M

-

65

-

cs

-

90

-

dB

BWp

-

28

-

kHz

-

-

0.002
0.008

-

-

100

-

-

200

-

k,Q

8.0

-

pF

-

25
20

-

-

1Hz

-

0.8
0.2

-

1Hz

Channel Separation (I = 1.0 Hz to 20 kHz, AV = 100)

23

Power Bandwidth (Va = 4.0 Vpp , RL = 600 n, THD S 1 %)
Total Harmonic Distortion (RL = 600 n, Va = 1.0 Vpp , AV = 1.0)
1 = 1.0 kHz
1=10kHz

24

THD

Differential Input Resistance (VCM = 0 V)

Rin

Differential Input Capacitance (VCM = 0 V)

Cin

Equivalent Input Noise Voltage (RS = 100 n)
1= 10 Hz
1 = 1.0 kHz

25

Equivalent Input Noise Current
1= 10 Hz
1=1.0kHz

25

en

in

1. Equivalent Circuit Schematic (Each Amplifier)
Vee

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-253

%

n

Figure

dB
Deg

-

IZol

Open-Loop Output Impedance
(Va = 0 V, 1 = 2.0 MHz, AV = 10)

MHz

nVI

pAl

MC33201, MC33202, MC33204
Figure 2. Maximum Power DIssipation
versus Temperature

§"

Figure 3. Input Offset Voltage Distribution
4O.-----.--,---,,---r-.--.---r--.---.--,

.§. 2500.----r---,,---....------.----,,----.-----,

~

£: 351--1---1--+--+
~
ll:! 301--+-+--+-+

~ 2ooo~dr~r_-~--+-~r_--+_--~

~

:::J

~

~

251--1---1--+--+

~

201--+-+--+-+

a:

w

1000 f-=""I-oo;;;;::jr_--"''''fooo=--+-....:::!OoIio;;:---+_--~

~

:;;

~ 151--1---1-+--1-

000~+-+---+-~~~~~~~-4

i

t
.§.

~

10

a..

5.01--+-+:::=I0&.-.......-....

O~~~----~--~--~----~----~

~

-55 -40 -25

0
25
50
TA. AMBIENT TEMPERATURE (0C)

85

125

-10 -8.0 -6.0 -4.0 -2.0
0
2.0 4.0 6.0
VIa. INPUT OFFSET VOLTAGE (mV)

Figure 4. Input Offset Voltage
Temperature Coefficient Distribution

~

w

401---+---+_--+---1--+

200

~
~

VCC=+5.0V
VEE = Gnd
TA=25°C
DIP

il:
:::J

~ 301---+---+_--+-+

10

Figure 5. Input Bias Current
versus Temperature

360 amplifiers lested from
3 (MC33204) wafer lots

£:

8.0

Ii3

160

120

~

u..

o

~ 201---+--+_--+-+

~

j$
w
~ 101---+--+_--+-+

80

~

:z

VCC=+5.0V
VEE =Gnd

/

VCM = OVID 0.5 V

-

J

VCM> 1.0 V

!!! 40

~

o

OL--..L.._~-'&'

-50 -40 -30 -20 -10
0
10
20 30 40
TCVIO ' VIO TEMPERATURE COEFFICIENT (mV)

00

-55 -40 -25

0

25

70

85

125

TA. AMBIENTTEMPERATURE (OC)

Figure 6. Input Bias Current
versus Common Mode Voltage

Figure 7. Open-Loop Voltage Gain
versus Temperature

150

~ 100
I-

50

f ia:a:
:::>

0

(.')

'"

~

-5
0

:z

~

I
I

~ 220
g
V

l/

~

r-- ..........

~

a..

9 180

~ -100
~_ -150

VCC=12VVEE=Gnd _
TAi25°C

'"

'=--200

-200

260

w

Cl

o

2.0

4.0

6.0

8.0

10

~o

j

12

VCM. INPUT COMMON MODE VOLTAGE M

VCC=+5.0V
140 I- VEE = Gnd
RL = 600 0
6'10 = 0i5 V 10 4.51V
100
-55 -40 -25
o

25

70

TA. AMBIENTTEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-254

85

105 125

MC33201, MC33202, MC33204
Figure 8. Output Voltage Swing
versus Supply Voltage
12
RL=600n
_ TA=25°C
10
-co.
~
w 8.0
~

1:3

~

6.0

~
~

4.0

/"

o

?

2.0

/"

/"

...

/

L

Figure 9. Output Saturation Voltage
versus Load Current
A! - ~5°
T = 125°C

o

I I
VCC=+5.0V
V~E 1-15.01 V

±~

±~
±U
±~
Vcc, IVEE I SUPPLY VOLTAGE (V)

5.0

w

iil
a:

~

~

w

6.0

3.0

\

TAi25iC I I I

......

1.0M

60
40

"r£
UJ
"-

20

~

~

o

10

Ia

R~I

PSI~

~

C3

~
~
o

~,

'"

Vcc=+ . V
VEE=-6.0V
TA = - 5~1~,l0 +125°C
100

Tn

o

1.0k
10k
I, FREQUENCY (Hz)

flil~nlill

10

1.0k

100

10k

lOOk

1.0M

Figure 13. Output Short Circuit Current
versus Output Voltage
100
Source
80

/

I:

........ ~~

UJ

"

"-

I, FREQUENCY (Hz)

I

P

CC=+6.0V
20 r- VEE=-6.0V

"::::;:r£

120

-I"-

40

0

\ r--. ....

10k
lOOk
I, FREQUENCY (Hz)

:2-

z

::::;:
::::;:

0

Figure 12. Power Supply Rejection
versus Frequency

a:
w

r--.

0

1.0k

""::>

r--.

60

::::;:

VCC =+6.0V
VEE = -6.0V
RL=600n
AV= +1.0

>

~

80

c

~

80
iil
a:

15

1-1"-

z

§w

10

iii" 100
0

z 100

'"

Figure 11. Common Mode Rejection
versus Frequency

~ 9.0

iii"

TL~5ob
Il,. LOAD CURRENT (rnA)

Q.

o

I

TA=-55°

o

±6.0

:2-

6

I

A= 125°C

12

~
0

VCC-0.4 V

I

Figure 10. Output Voltage
versus Frequency

1:3
~

VCC-0.2V
Trrr

~I"'"

±1.0

VCC

lOOk

60
40
20

g
1.0M

0

/1
II
If

o

1.0

Sink

VCC=+6.0V VEE =-6.0V
TA=25°C
2.0

3.0

4.0

IVout I, OUTPUT VOLTAGE (V)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-255

5.0

6.0

•

MC33201, MC33202, MC33204
Figure 14. Output Short Circuit Current
versus Temperature

1!z 150
'"~
::::>

vtc ~ ~

_ V

125

1a:

5.0V

'"u::~

E~Gnd

(.)

5
a?

100

(3

!i:
o
:J:
en

~

o~

1;l

75
50

Figure 15. Supply Current per Amplifier
versus Supply Voltage with No Load
2.0
1.6

~

~~

-

Sink

TA ~ 125°C

a:
~

:-- r::::::::

1.2

~

!z

'"~

:::::::::

::::>

(.)

~

&:
::::>

25

0.4

en

0

-55 -40 -25

025
7085
TA, AMBIENT TEMPERATURE (0G)

105

±O

±1.0

Figure 16. Slew Rate
versus Temperature
2.0

U)

1.5

'"~

1.0

N' 4.0

~

6

~

en
a:
en 0.5

-

.-- V
.--

~

t;

-

+Slew Rate

I---

± 2.0
± 3.0
H.O
± 5.0
VCC, IVEE I ,SUPPLY VOLTAGE M

±S.O

VCC ~ +2.5 V
VEE~ - 2.5 V
t ~ 100 kHz

:J:

+ 2.5 V
VEE ~ - 2.5 V
V ~ ± 2.0V

~

TA ~ -55°C

Figure 17. Gain Bandwidth Product
versus Temperature

VCC~

~

-

IY

o

125

TA ~ 25°C

/
/~::--

0.8

~

::::>
0

0
a:

3.0

a.

:I:
fo-

0

~

2.0

r-

0

z
ii§
:z 1.0
<

C!l

15
C!l

o

-55 -40 -25

25
70 85
TA, AMBIENT TEMPERATURE (0G)

105

o

-55 -40 -25

125

Figure 18. Voltage Gain and Phase
versus Frequency

m

70

~

:z

<
C!l

'"t§

50

C!l

0

30

>

--

i'

0

9
Z

'"0
a.

40

80

RL iSOOQI

"l

......... .......

a.

10

-

fil
2AI

.....

-lA-Phase,CL~OpF

-10 - 1B - Gain, CL ~ 0 pF
:....
_ 2A - Phase, CL ~ 300 pF
0
2B - Gain, C~ ~ 300 pF
«>
- 30
10 k
100 k
1.0M
t, FREQUENCY (Hz)

7085

105

125

Figure 19. Voltage Gain and Phase
versus Frequency

Vs ~ ±S.OV
TA ~ 25°C

--

.......

025

TA, AMBIENT TEMPERATURE (OC)

2B

J;:
liB I

II

I

120

70
cn~

'" «
"'C!l
a:",

ffi~

e.!j

50
30

"'0

11

en>

:2~

lS0 ~

9
fnz

.....

-

.....

~ ...,.,

240
10M

2A

"-

lB~

::-----. ....

2B ....... r-.,

I I
lA

- 30
10 k

100 k

1.0 M
f, FREQUENCY (Hz)

ttl
a:

C!l

120

'"e.
'"
~

lS0 ~

fB
200

~_

os

2B - Gain, y~ ~ ± 1.0 V

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-256

r-..... .......

....... r--.

10

ii)

80

R -SOlon

-~

f- lA - Phase, Vs ~ ± S.O V
~~
200 "'_ 0:....-10 f- lB -Gain, Vs ~±S.OV
os 0
t- 2A - Phase, Vs ~ ± 1.0 V

«>

40

CL ~ 0 pF
TA ~ 25°C

240
10M

MC33201, MC33202, MC33204
Figure 20. Gain and Phase Margin
versus Temperature

Figure 21. Gain and Phase Margin
versus Differential Source Resistance
70

70
00 so
w
w
a::
(!)
50
w

e.
z
aa::
-0:

::;;

w
en

~

75

60

40 I- VCC=+S.OV
VEE = -S.OV
30 I- RL=soon
C = 100 pF
20

'"

VCC = +6.0
VEE = - 6.0V
I- TA = 25'C

CD

~

45 z
aa::

-0:

::;;

30 z

:;;:

"I---

(!)

a.

:.

""

Gam Mar~m

10
Gain Margin

o

-55 -40 -25

0
25
70 B5
TA, AMBIENT TEMPERATURE ('C)

125

10

100
1.0k
10k
Rt DIFFERENTIAL SOURCE RESISTANCE (n)

16

-0:

-

Gain M1arQin

40

::;;

w
en

30

:I:

a.

20

""

10

~

"'I'---... \.

'"

-0:

:;

VCC = +6.0V
VEE = - S.OV
RL= 600 n
AV = 100
TA = 25°C

Phase Margin

o

10

~

10

~
~

~

z

\

"- \
..........

4.0
2.0

Z

~

0.1

a
en

30

1.0k
t, FREQUENCY (Hz)

10k

50

vcb =1+ \;~d~

w



I- Av, = 1000

a::
~

-'

o

I- Vo = 2.0 V

C

~

w
en

1.Ok

§ VCC - + 5.0 v VEE = 5.0 V

AV= 100

120

a

a ~

10 z
a::
B.O ~

1.0

'-'

~

12 CD z

6.0 ~

100
CL, CAPACITIVE LOAD (pF)

t= TA = 25'C

0
100 k

150

14

Figure 24. Total Harmonic Distortion
versus Frequency

z
a

:;
-0:

Figure 23. Channel Separation
versus Frequency

BO
00 70
w
w
a:: SO
(!)
w
e. 50
z

15

i-"

I

o

0

105

Figure 22. Gain and Phase Margin
versus Capacitive Load

aa::

a,

75

Phase Margin

Phase Margin

100-

1

10k

1.0 a::
~
a.

o

100 k

;;l;

MC33201, MC33202, MC33204
General Information

Circuit Information

The MC33201/2/4 family of operational amplifiers are
unique in their ability to swing rail-to-rail on both the input
and the output with a completely bipolar design. This offers
low noise, high output current capability and a wide
common mode input voltage range even with low supply
voltages. Operation is guaranteed over an extended
temperature range and at supply voltages of 2.0 V, 3.3 V
and 5.0 V and ground.
Since the common mode input voltage range extends from
VCC to VEE, it can be operated with either single or split
voltage supplies. The MC33201/2/4 are guaranteed not to
latch or phase reverse over the entire common mode range,
however, the inputs should not be allowed to exceed
maximum ratings.

Rail-to-rail performance is achieved at the input of the
amplifiers by using parallel NPN-PNP differential input
stages. When the inputs are within 800 mV of the negative
rail, the PNP stage is on. When the inputs are more than
800 mV greater than VEE, the NPN stage is on. This switching
of input pairs will cause a reversal of input bias currents (see
Figure 6). Also, slight differences in offset voltage may be
noted between the NPN and PNP pairs. Cross-coupling
techniques have been used to keep this change to a
minimum.
In addition to its rail-to-rail performance, the output stage
is current boosted to provide 80 mA of output current,
enabling the op amp to drive 600 Q loads. Because of this
high output current capability, care should be taken not to
exceed the 150°C maximum junction temperature.

Figure 26. Noninverting Amplifier Slew Rate

Figure 27. Small Signal Transient Response

t, TIME (5.0 Ils/DIV)

t, TIME (10 Ils/DlV)

Figure 28. Large Signal Transient Response

t, TIME (10 Ils/DIV)

MOTOROLA LlNEAR/INTERFACE ICs DEVICE DATA
2-258

MC33272
MC33274

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Single Supply, High Slew Rate
Low Input Offset Voltage, Bipolar
Operational Amplifiers
The MC33272174 series of monolithic operational amplifiers are quality
fabricated with innovative Bipolar design concepts. This dual and quad
operational amplifier series incorporates Bipolar inputs along with a patented
Zip-R-Trim element for input offset voltage reduction. The MC33272174 series of
operational amplifiers exhibits low input offset voltage and high gain bandwidth
product. Dual-doublet frequency compensation is used to increase the slew rate
while maintaining low input noise characteristics. Its all NPN output stage exhibits
no deadband crossover distortion, large output voltage swing, and an excellent
phase and gain margin. It also provides a low open-loop high frequency output
impedance with symmetrical source and sink AC frequency performance.
The MC33272174 series is specified over -40° to +85°C and is available in the
plastic DIP and SOIC surface mount packages (P and D suffixes).
• Input Offset Voltage Trimmed to 100 IlV (Typ)
• Low Input Bias Current: 300 nA
• Low Input Offset Current: 3.0 nA
• High Input Resistance: 16 MQ
• Low Noise: 18 nV/ -{'Hz @ 1.0 kHz
• High Gain Bandwidth Product: 24 MHz @ 100 kHz
•
•
•
•
•
•
•
•
•

HIGH PERFORMANCE
OPERATIONAL
AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT

DUAL

8~
1

PSUFFIX
PLASTIC PACKAGE
CASE 626

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-B)

PIN CONNECTIONS
Output 1 1
Inputs 1 { :

High Slew Rate: 10 V/IlS
Power Bandwidth: 160 kHz
Excellent Frequency Stability
Unity Gain Stable: w/Capacitance Loads to 500 pF
Large Output Voltage Swing: +14.1 V/-14.6V
Low Total Harmonic Distortion: 0.003%
Power Supply Drain Current: 2.15 rnA per Amplifier
Single or Split Supply Operation: +3.0 V to +36 V or ±1.5 V to ±18 V
ESD Diodes Provide Added Protection to the Inputs

VEE

41--_--'

(Top View)

QUAD

PSUFFIX
PLASTIC PACKAGE
CASE 646

DSUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)

PIN CONNECTIONS

ORDERING INFORMATION
OpAmp
Function

Device

Dual

MC33272D

SO-B

MC33272P

Plastic DIP

Quad

MC33274D
MC33274P

Specified Ambient
Temperature Range

-40° to +B5°C

Package

SO-14
Plastic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-259

•

I

MC33272, MC33274
MAXIMUM RATINGS
Rating

Symbol

Value

Unit

VCC to VEE

+36

V

VIDR

(Note 1)

V

Input Voltage Range

VIR

(Note 1)

V

Output Short Circuit Duration (Note 2)

tsc

Indefinite

sec

Maximum Junction Temperature

TJ

+150

°C

Storage Temperature

Tstg

--SO to + 150

°C

Maximum Power Dissipation

Po

(Note 2)

mW

Supply Voltage
Input Differential Voltage Range

NOTES: 1. Either or both input voltages should not exceed VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature
(TJ) is not exceeded (see Figure 2).
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25°C, unless otherwise noted.)
Figure

Symbol

Input Offset Voltage (RS = 10 0. VCM = 0 V, Vo = 0 V)
(VCC = +15 V, VEE =-15 V)
TA=+25°C
TA = -400 to +S5°C
(VCC = 5.0 V, VEE = 0)
TA = +25°C

Characteristics

3

IVlol

Average Temperature Coefficient of Input Offset Voltage
RS = 100. VCM = 0 V, Vo = 0 V, TA = --40° to +S5°C

3

Input Bias Current (VCM = 0 V, Vo = 0 V)
TA = +25°C
TA = --40° to +S5°C

4,5

Input Offset Current (VCM = 0 V, Vo = 0 V)
TA = +25°C
TA = --40° to +S5°C

liB

11101

Common Mode Input Voltage Range (.lVIO = 5.0 mV, Vo = 0 V)
TA=+25°C

6

Large Signal Voltage Gain (VO = 0 V to 10 V, RL = 2.0 kQ)
TA = +25°C
TA = --40° to +S5°C

7

Output Voltage Swing (VID = ±1.0 V)
(VCC = +15 V, VEE = -15 V)
RL = 2.0 kQ
RL=2.0kQ
RL= 10kQ
RL=10kQ
(VCC = 5.0 V, VEE = 0 V)
RL=2.0kQ
RL=2.0kQ

.lVlo'.lT

Min

Typ

Max

mV

-

0.1

-

1.0
1.S

-

2.0

-

2.0

-

-

300

-

-

650
SOO

-

3.0

65
SO

IlV/oC
nA

nA

-

V

VICR
VEE to (VCC-1.S)
AVOL
90
S6

100

-

-

V
VO+
VoVO+
Vo-

10,11

13.4

-

13.4

-

-

13.9
-13.9
14
-14.7

-13.5

-

-14.1

VOL
VOH

-

3.7

-

0.2
5.0

13

CMR

SO

100

-

14,15

PSR
SO

105

-

+25
-25

+37
-37

-

Common Mode Rejection (Vin = + 13.2 V to -15 V)

Output Short Circuit Current (VID = 1.0 V, Output to Ground)
Source
Sink

16

Power Supply Current Per Amplifier (VO = 0 V)
(VCC =+15 V, VEE =-15 V)
TA = +25°C
TA = --40° to +S5°C
(VCC = 5.0 V, VEE = 0 V)
TA = +25°C

17

dB
dB

ISC

rnA

rnA

ICC

-

-

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-260

dB

-

S,9,12

Power Supply Rejection
VCCNEE = +15 V/-15 V, +5.0 V/-15 V, +15 V/-5.0 V

Unit

2.15

-

2.75
3.0

-

2.75

MC33272, MC33274
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE =-15 V, TA = 25°C, unless otherwise noted.)
I

Characteristics

Figure

Symbol

Min

Typ

18,33

SR

8.0

10

-

V/flS

19

GBW

17

24

MHz

20,21,22

Ava

-

65

-

IU

-

5.5

-

MHz

Am

-

12

-

dB

23,25,26


D..
!!l;

:>

-5.0
-55

0 20 40 60 80 100 120 140 160 180
TA. AMBIENT TEMPERATURE (DC)

...........

-25

I-

:z
w
a: 400
a:

-

:::>

c..>

VCC=+15V
100 I - VEE=-15V
TA=25°C
!i!
50
-12

-8.0

300

~
III
5; 200
11.

150

-~

!!l;

-4.0

0

4.0

8.0

12

o

16

-55

Figure 6. Input Common Mode Voltage
Range versus Temperature

,

C!:J

~

VCC
VCC-0.5

..

~

Vcc

~

!!l;

-25

0
25
50
75
TA. AMBIENT TEMPERATURE (DC)

~

I-

ir

!!l;

ct
Q

>

VEE+0.5
VEE
-55

125

180

160

~
!:i14O

:z VCC-2.0

8 VEE+1.0

100

Figure 7. Open-Loop Voltage Gain
versus Temperature

VE\
-25

:::::.

-

I"-......

:/

C1i

VCC-1.5

§l

~

i!S.

5> Vcc-1.0
w

---

--

!i! 100

VCM. COMMON MODE VOLTAGE (V)

!ll
,«

125

-VCC=+15V

200

~

100

<" 500 _VEE=-15V
.s.
_ VCM=OV

I--i--

w

0
25
50
75
TA. AMBIENT TEMPERATURE (DC)

Figure 5. Input Bias Current versus Temperature

............ f,.,.

250

-16

1. VIO>O@25°C
2. VIO = O@25°C
3. VIO < O@25°C

600

300

o

1

3

5;
~ -3.0
6

~ r--....

:::>

c..>

?

Ito -1.0
""""'III

t::;::::;

1

ti:i

Figure 4. Input Bias Current versus
Common Mode Voltage
400

VCC=+15V
VEE=-15V
VCM=OV

3.0

C!:J

/

~
11.

~

VCC=+15V
VEE=-15V
RL= 2.0 kn
f= 10Hz

.:.

~VO=I-l0Vtorl0V

I
I
VCC=+5.0Vto+18V
VEE=-5.0Vlo-18V

8

~VIO=5.0mV

o

~ 120

vo=ov

0
25
50
75
TA. AMBIENT TEMPERATURE (DC)

100

125

~100
<
-55

-25

0
25
50
75
TA. AMBIENTTEMPERATURE (DC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-262

"'"

100

125

MC33272, MC33274
Figure 9. Split Supply Output Saturation
Voltage versus Load Current

Figure 8. Split Supply Output Voltage Swing
versus Supply Voltage
40

I

-c.

c----- TA = 25°C

6.
G 30
w

/

!30
....
=>
c..
5

c::0

./

20

!30

./

/

10

~

>

~

~

-

~
~

....
=>

~

c..

....=>

~

0_

o

VCC-2.0

-~nk-

VEE +2.0

15

~

TA J5°C

~
5.0

20

TA = 125° III
.l-1:
VCcr~~~~~~~~~~~~~~~

~

~III

I

1111111I1Vc.cT
VCC = +5.0 V 10 +18 V _

~

VCC -4.0 I--I-:HI

Q

VCC -8.0 I--j~
'tttttlt--I-++t+tH RL 10 Gnd

~

VCC-12

~
~

T"~ 550C

I I

111111

w

~
w

15

=>
~

.-l

~

5
~
o

5
~
o
iii

>
1.0M

24
20

!30
.....>=>

16

8.0 r-4.0 r--

o

r

~~:~:~5OC~
Tililir

I

I

I mT
TA = 125°C-

c

.-J~~

IllIf l I ITf
VCC = +15V
RLloVCC
VEE = Gnd
RFdbk = 100 kQ

WII
I I I II
1111
100
1.0k
10k
lOOk
RL. LOAD RESISTANCE TO VCC (Q)

Figure 13. Common Mode Rejection
versus Frequency
ml~r-rrnTIm-"onmr-'Tn~-'rnTmr-TTTITm

28

G
w

I IIII
TA = 125°C

III
I III

10

Figure 12. Output Voltage versus Frequency

-c.
6.

I

ll~1 =2~OC

14.2

~

I I

1.0k
10k
lOOk
RL. LOAD RESISTANCE TO GROUND (kQ)

20

'\.....1

f.l.lU.

IIIII

~ 14.6
'-J
§?

is

-

~=~

VCC=+5.0Vlo+18V
VEE = -5.0 Vlo -18 V

Figure 11. Single Supply Output Saturation
Voltage versus Load Resistance to VCC

Figure 10. Single Supply Output Saturation
Voltage versus Load Reslstnce to Ground

~

TA= -55°C

10
15
IL. LOAD CURRENT (±mA)

VCC. VEE SUPPLY VOLTAGE M

w

..--- ~~~

-~ ~

I
VEE +1.0 - TA = 125°C

-

TA = ~5°C..?f'-.....

I

iii

10

TA - -55°C

TA = 125°C
'1
I

>
5.0

I

I

VCC-l.0

=>

'P'

o

Source
:::::",..

>
z
0

RL=2.0 kQ

VCC

w

(!l

RL=10kQ /

(!l

>

~

./

:2.

\
\

(!l

c..

50
0

>

12 - VCC=+15V
_ VEE=-15V
8 _ RL=2.0kQ
_AV=+1.0
_ THD=:51.0%
4
T =25°C
_)AIIIIIIII

o

1.0 k

10k

i'..
lOOk
f. FREQUENCY (Hz)

1.0M

10M

100

1.0k
10k
f. FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-263

lOOk

1.0M

MC33272, MC33274

Figure 15. Negative Power Supply Rejection
versus Frequency

Figure 14. Positive Power Supply Rejection
versus Frequency
_

120

:z
0

§

w

.Ljl

a:



:s
100

~

80

~ 100

I "I
TA = -55°C

60

~

w
;;: 40

=

c..
r£

-

0

l£+

a:

r:::::

20

+ADM

I'

tiNo

+PSR = 20Log (

~VoIADM)

l£I

1.0 k
10 k
I, FREQUENCY (Hz)

100

~

~

=

c..
r£ 20

"'Vee

o

Is::

100 k

1.0M

+AoM

-

1 60
ffi

i3

Sink

!:: 40
=>

~

r---

Source

C3 30

Ii:

20

o

10

-55

0

25

50

"'~~:DM)
1.0 k

100

11

I.

VCC=+15V
VEE=-15V _
VID=±1.0V
RL<100Q

«
.§.
I-

10 k

I

10

:k;::: ::- ~

9.0

w

a: 8.0
a:
=>
(.)

Sink

S~

~

c..
c..
=>
en

75

100

f

7.0
6.0

TA = -55°C

o

2.0

4.0

6.0

8.0

10

12

14

16

18

20

VCC, IVEEI , SUPPLY VOLTAGE (V)

Figure 19. Gain Bandwidth Product
versus Temperature

1.15

N

50

:J:

VCC=+15V
VEE = -15V
1=100kHz
RL =2.0 kQ
CL = 0 pF

~

c(

go 40

a:

a:

VO-1----+---~--~

~

-

TA = +25°C

4.0
3.0

125

-

- -

V

III

5.0

Figure 18. Normalized Slew Rate
versus Temperature

w

1.0M

I

i--

TA, AMBIENT TEMPERATURE (0C)

5'

100 k

TA - +125°C

:z

.s?
-25

~

Figure 17. Supply Current versus
Supply Voltage

(.)

~ 10
o
(.) 0
en

--

TA = 125°C

I, FREQUENCY (Hz)

.1

a: 50
a:

-

"'Vo

VEE

-PSR = 20Log (

Figure 16. Output Short Circuit Current
versus Temperature

~

~

80

& 60
=>
en
a: 40

f\::

VEE

10

en
~

6VCC=±1.5V
1111111 I VCC=+15V
.1111111 I VEE=-15V
TA = -55°C

~

~

c..
c..
=>
en
a:

~Ljl

TIlf

lTTTl1f I

:s

VCC= +15 V
VEE=-15V
6VCC =±1.5V

T/ = 125°C

o

::;:
0
~

c.. 30

~

:1:
0

~

w

~
:z

~
en

i'ii

r£

en

_

-

~

20

10

Sf
II>
C!l

-25

0

25

50

75

100

o

-55

125

-25

0

25

50

75

TA, AMBIENTTEMPERATURE (0C)

TA, AMBIENT TEMPERATURE (0C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-264

100

125

MC33272, MC33274
Figure 20. Voltage Gain and Phase
versus Frequency
25

\

20

,Gain

15

~

10

mr

z

;;: 5.0
0

"

1111
~
~ -5.0 I - - Vee = +15V
o

l"-

> -10 I - - VEE=-15V
::>
RL=2.0kQ
« -15 I - -

20

00
120 ll:I

15

140 ffi

~

160~

~ 5.0

200 ~
en

220~

r--. . .

240
260

II 1111

-25
lOOk

25

100

180~
:I:

\

TA=25'e",

-20

80

a:

se

1111

(!l

UJ

Figure 21. Gain and Phase versus Frequency

UJ

.e.

«

:Eo

z

~
UJ

10

(!l

i:3

§;

0

-- --,...
""r-

......

12

120
140 [fl
UJ

ffiUJ
180 e.
UJ
160

I'.....

2A

I"-r-.

~

"

,

"

"\.

1\

10

12

:Eo

z
aa: 10

«
:0
0-

0

:2: 4.0
UJ
0-

0

E 2.0

«

o

220

~ r--.~

--

:Eo 10

z

~S.O
0a

::~F'
T

UJ
0-

CL

"'=~

0_2.0
E

«

11111111r-

o

1.0

20 ~
z

"V'

30

-- --

UJ

UJ

40~

/

:I:
0-

50

CL =,100 pF
40

z

aa:
«

30

:0
UJ

en

«

20

:I:
0-

E
-e- 10

VCC = +15V
VEE=-15V
1

a

25
50
75
TA, AMBIENT TEMPERATURE ('C)

100

125

o

CL = 300 pF

-

I.

--

-55

CL = 500 pF

J
1

VCC=+15V
VEE=-15V

I
-25

0
25
50
75
TA, AMBIENT TEMPERATURE ('C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-265

1000

J

50

(!l

UJ

.£

CL= 10 pF

a:

e.

i

Phase Margin

SO
00
UJ

[fl
UJ
(!l

+ 2.0kQ

;l4.0
z

10

a:

VCC=+15V
VEE=-15V

~8.0
:0
:z

o

I'-- ......Gain Margin

a

CL =500 pF

-25

.e.

100M

Figure 25. Phase Margin versus Temperature

--I

0-

240

Figure 24. Open-Loop Gain Margin
versus Temperature
_I
f- CL=10pF

-55

en

10
100
CL, OUTPUT LOAD CAPACITANCE (pF)

S.O t - CL=30~

9

180~

200~

f, FREQUENCY (MHz)

z 8.0 I-- CL = 100 p~
;;:
(!l

I IIIII

10

VCC = +15V
o
200~
VEE=-15V
:I:
~ lB
-10 Vout = aV
220~
UJ
TA=
25'C
~
0240~
o
lA- Phase (RL = 2.0 kQ)
i'..2B
2S0 1;S
..::. -20 2A - Phase (RL = 2.0 kQ, CL = 300 pF)
§;
-e1B - Gain (RL = 2.0 kQ)
280
«
2B - Gain (RL = 2.0 kQ, CL = 300 pF)
-30
3.0
4.0
6.0
8.0 10
20
30
0..

~

,

Figure 23. Open-Loop Gain Margin and Phase
Margin versus Output Load Capacitance
100

-............1 A

2";:-

a:

160 ffi

-15 2A- Phase Vee = 1.5 V, VEE = -1.5 V
lB-Gain VCC = 18 V, VEE = -18 V
-20 2B-Gain VCC = 1.5 V, VEE = -1.5 V
-25
100 k
1.0M
10M
f, FREQUENCY (Hz)

Figure 22. Open-Loop Voltage Gain and
Phase versus Frequency
10 20

,"1\

0

UJ

120_
en
140ll:l

,IA

'1,"\

~
~-5.0
a
> -10 lA- Phase Vee = 18 V, VEE = -18 V
::>

280
100M

1.0M
10M
f, FREQUENCY (Hz)

100

~

TA = 25'e
eL = 0 pF

10

z

80

I~

100

125

MC33272, MC33274
Figure 26. Phase Margin and Gain Margin versus
Differential Source Resistance
15
12

~

50

Phase Margin

m

\

VCC=+15V
VEE=-15V
z
RT=Rl+R2
~_ 3.0 VO=OV
TA = 25°C
6.0

E

<

o

r~vo
Vln

1.0

4O~
z
eli

30~

"

w

20~

il:

10

+

R2

10

....e

i"'

:2.150

-'
w

140

130

~

z

o

I
c

-

B 110
100
100

1.0k

10k

lOOk

tOM

t, FREQUENCY (Hz)

Figure 29. Output Impedance versus Frequency

~AV=+I000
AV=+100

0.1

o

FAII=+10

i

I III

-' 0.01

AV=+1.0

j$

12

VO=2.0Vp-p
TA=25°C

ci

i!=

"- ......

120

Figure 28. Total Harmonic Distortion
versus Frequency
1.0

.....

"

/

Z

At DIFFERENTIAL SOURCE RESISTANCE (n)

£:

D;;~er Channel
VCC=+15V
VEE=-15V
RL = 2.0 kn
dVOD = 20 Vp-p
TA=25°C

m

10~

1.0k

100

[g
a::
CI

9.0

eli

~

160

60

~ai~Margln

1"+-{T

1111

Figure 27. Channel Separation
versus Frequency

I III

0.001 10

100

1.0k

VCC=+15V
VEE=-15V
10k

lOOk

t, FREQUENCY (Hz)

Figure 30. Input Referred Noise Voltage
versus Frequency

~ 50

Input Noise Voltage Test CircuM

:>

{Fr"

"':40
~

!:§

g

Z~
c

30

1"--0 ...

20

w
a::

1

10

~

;;:;

..

c

Figure 31. Input Referred Noise Current
versus Frequency

0

r-

VCC=+15V
VEE=-15V

r--

~Alf~~TI

10

100

It:;;:
~ 2.0 ...-.,-,-n'TTT1rr-"'-T'Trm,.,--.,.-::7":'-:---c:-:::--::--,
Input Noise Current Cireun
1.8 1-t-++t1Httt---i:-+i-ItHtt
~

1
!z

1.6 1---I-1f-H-Hf1H--+-++++HfH-

RS:

Vo

~ 1.4 1---Hf-H-Itt1ft-+-+++tHftt~ 1.2 P-rl,+-Hi1Htt-l-+ttlftttt~
~

1.0 1---Nf-H-Hf1H--+-++++HfH0.8
- -

(Rg=10kCl)

~ 0.6 1---I-1f-H-tA'lI.r......
~-++f1fttti-H++I+H-f--+-+-++++Hl
~ 04

Vee = +15 V f-==H~F!#I+--I-+-I-~~-+-.j..I.~
VEE = -15 V 1---f.-I-H+I+H---I-++H#f+~-++f11+Hl
TA = 25°C

~.0.2
!5
~

1.Ok
t, FREQUENCY (Hz)

10 k

lOOk

-:.

OL-.,L....JL...J..J~U-.....I-.L..I.J.WW--I....1....L..LJ.Lw..-l......L..J...I.J..I.LlI

10

100

1.Ok

t, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-266

10k

lOOk

MC33272, MC33274
Figure 32. Percent Overshoot versus
Load Capacitance
60
VCC=+ISV

so I- VEE=-ISV
£:
RL = 2.0 k.Q
....

I.)"

TA=2SoC

0
0

:r:

40

~

30

en
a:
0

....
z
w

<..>
a:
w
"-

V

-

20
10

V

V

o
10

1.0 k

100
Cl,. LOAD CAPACITANCE (pF)

Figure 34. Noninverting Amplifier Overshoot
for the MC33274

Figure 33. Noninverting Amplifier Slew Rate
for the MC33274

II,~
I

I

I

I

am
I

I, TIME (2.0 nsJDIV)

1, TIME (2.0 IlsJDIV)

Figure 36. Large Signal Transient Response
for MC33274

Figure 35. Small Signal Transient Response
for MC33274

t, TIME (1.0 IlSJDIV)

1, TIME (2.0 1lSiD1V)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-267

MOTOROLA

MC33282
MC33284

SEMICONDUCTOR-----TECHNICAL DATA

Advance Information

Low Input Offset, High Slew Rate,
Wide Bandwidth, JFET Input
Operational Amplifiers
The MC33282/284 series of high performance operational amplifiers are
quality fabricated with innovative bipolar and JFET design concepts. This dual
and quad amplifier series incorporates JFET inputs along with a patented
Zip-R-Trim element for input offset voltage reduction. These devices exhibit low
input offset voltage, low input bias current, high gain bandwidth and high slew
rate. Dual-doublet frequency compensation is incorporated to produce high
quality phase/gain performance. In addition, the MC33282/284 series exhibit
low input noise characteristics for JFET input amplifiers. Its all N PN output stage
exhibits no deadband crossover distortion and a large output voltage swing.
They also provide a low open-loop high frequency output impedance with
symmetrical source and sink AC frequency performance.
The MC332821284 series are specified over -40° to +85°C and are available
in plastic DIP and SOIC surface mount packages (P and D suffixes).

HIGH PERFORMANCE
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT

DUAL
(MC33282)

8.

1
DSUFFIX
PLASTIC PACKAGE
CASE 751
(SOP-8)

PSUFFIX
PLASTIC PACKAGE
CASE 626

PIN CONNECTIONS

Vee

Output 1 1

• Low Input Offset Voltage: Trimmed to 200 IlV

7 Output2
Inputs 1 { 2

• Low Input Bias Current: 30 pA
• Low Input Offset Current: 6.0 pA
• High Input Resistance: 1012 n

6 } Inputs 2

• Low Noise: 18 nV "Hz @ 1.0 kHz

(Top View)

• High Gain Bandwidth Products: 35 MHz @ 100 kHz
• High Slew Rate: 15 V/IlS
• Power Bandwidth: 175 kHz

QUAD
(MC33284)

• Unity Gain Stable: w/Capacitance Loads to 300 pF
• Large Output Voltage Swing: +14.1 V/-14.6 V

".

• Low Total Harmonic Distortion: 0.003%
• Power Supply Drain Current: 2.15 rnA per Amplifier
• Dual Supply Operation: ±2.5 V to ±18 V (Max)

14#
1

1

PSUFFIX
PLASTIC PACKAGE
CASE 646

DSUFFIX
PLASTIC PACKAGE
CASE 751A
(80-14)

PIN CONNECTIONS
Output 1 1

ORDERING INFORMATION
OpAmp
Function

Device

Specified Ambient
Temperature Range

Inputs 1 {

2

Inputs 2 {

5

Package

MC33282D

SOP-8

MC33282P

Plastic DIP

Dual

-40° to +85°C
MC33284D

SO-14

MC33284P

Plastic DIP

Quad

Output 2 7

(Top View)

Zip-R-Trim is a registered trademark of Motorola Inc.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-268

MC33282, MC33284
MAXIMUM RATINGS
Rating
Supply Voltage (Vcc to VEE)
Input Differential Voltage Range

Symbol

Value

Unit

Vs

+36

V

VIDR

(Note 1)

V

Input Voltage Range

VIR

(Note 1)

V

Output Short Circuit Duration (Note 2)

tsc

Indefinite

sec
°c

Maximum Junction Temperature
Storage Temperature
Maximum Power Dissipation

TJ

+150

Tstg

-60 to +150

°C

PD

(Note 2)

mW

NOTES: 1. Either or both input voltages should not exceed VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature
(TJ) is not exceeded. (See power dissipation performance characteristic, Figure 2.)
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE =-15 V, TA = 25°C, unless otherwise noted.)
Symbol

Figure

Input Offset Voltage (RS = 100, VCM = 0 V, Vo = 0 V)
TA = +25°C
TA = -40° to +85°C

IVlol

3

Average Temperature Coefficient of Input Offset Voltage
RS = 10 Q, VCM = 0 V, Vo = 0 V, TA= Tlow to Thigh

ItNIOI/L\T

Characteristics

Input Bias Current (VCM = 0 V, Vo = 0 V)
TA = +25°C
TA = -40° to +85°C

liB

Input Offset Current (VCM = 0 V, Vo = 0 V)
TA = +25°C
TA = -40° to +85°C

110

Common Mode Input Voltage Range
(AVIO = 5.0 mV, Vo = 0 V)

VICR

Large Signal Voltage Gain (VO = ±1 0 V, RL = 2.0 kQ)
TA = +25°C
TA = -40° to +85°C

AVOL

3

Min

TYP

Max

-

0.2

-

2.0
4.0

-

15

-

-200
-2.0

-

30

200
2.0

nA

mV

/lVrC

4,5

6

VO+
VcrVO+
VO-

Common Mode Rejection (Vin = ±11 V)

CMR

11

Power Supply Rejection
VCcNEE = +15 VI-15 V, +5.0 VI-15 V, +15 V/-5.0 V

PSR

12

ISC

13,14

6.0

-

100
1.0

pA
nA

-11

-12
+14

-

V

+11

50
25

200

-

13.2

-

+13.7
-13.9
+14.1
-14.6

-

70

90

-

V/mV

-

V

8,9,10

13.7

ID

75

100

15

-

+21
-27

-

-14.3

-

dB

-

2.15

-

-

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA

rnA

-15
rnA

15

-

2-269

-13.2

dB
-'

Power Supply Current (VO= 0 V, per amplifier)
TA = +25°C
TA = -40° to +85°C

pA

-100
-1.0

7

Output Voltage Swing (VID = ±1.0 V)
RL = 2.0 k.Q
RL=2.0kQ
RL= 10kQ
RL= 10kQ

Output Short Circuil Current (VID = 1.0 V, outpullo ground)
Source
Sink

Unit

-

2.75
3.0

MC33282, MC33284
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25°C, unless otherwise noted.)
Characteristics

Symbol

Figure

Min

Typ

Unit

SR

16,28,29

8.0

15

ViliS

35

MHz

Slew Rate (Vin =-10 V to +10 V, RL = 2.0 kn, CL = 100 pF, AV = +1.0)
Gain Bandwidth Product (1 = 100 kHz)

GBW

17

AC Voltage Gain (RL = 2.0 kO, Va = 0 V, f = 20 kHz)

Ava

18,21

20
-

1750

V/V

-

5.5

MHz

Unity Gain Frequency (Open-Loop)

IU

Gain Margin (RL = 2.0 kO, CL = 0 pF)

Am

19,20

-

15

dB

Phase Margin (RL = 2.0 kO, CL = 0 pF)

m

19,20

-

40

Degrees

CS

22

-

-120

dB

-

175

kHz

Channel Separation (I = 20 Hz to 20 kHz)
Power Bandwidth (Va = 20 V p _p , RL = 2.0 kO, THO ~ 1.0%)

BWp

Distortion (RL = 2.0 kO, 1= 20 Hz to 20 kHz, Va = 3.0 VrmS ' AV = + 1.0)

THO

23

-

0.003

%

Open-Loop Output Impedance (Va = 0 V, 1 = 9.0 MHz)

IZol

24

-

37

Differential Input Resistance (V CM = 0 V)

RIN

-

10 12

°

Differential Input Capacitance (V CM = 0 V)

CIN

-

5.0

-

18

nV/m

-

0.Q1

pAlm

Equivalent Input Noise Voltage (RS = 1000, 1 = 1.0 kHz)

25

en

Equivalent Input Noise Current (I = 1.0 kHz)

in

Q

pF

Figure 1. Equivalent Circuit Schematic
(Each Amplifier)
r-~~------------~~--'----'--~~--~----------------~~--~-----oVCC

D3

D2

Q17

Cl

I
+
Vin

Vin
J5

J2

D4

-

R16

Q18

C5

+
A

B

C

Cs

R17

D
D5
Vo

'---------_*_-_*_--+---o VEE

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-270

MC33282, MC33284

MC33282D

":::::.

~ 3.0

!:1
§;
tu
f±

.....

"'r:::: :::::::::: ~ "'-

~Unitl

~nit3

6-3.0
:>

1~

1~

-5.0
-55

100

-25

400

600

I II

~ 350

a~ 250
~ 200
Dl

VCC. VEE = ±2.5 V

5 150

I

I /
/'

a.

~ 100

m 50

-55

-25

VCC

i:3

§;VCC-1.0V
w
§VCC-l.5V

0
25
50
75
TA. AMBIENT TEMPERATURE (OC)

-

100

o

125

iI
II

/
\

_J

0
25
50
75
TA. AMBIENT TEMPERATURE (OC)

..".

\..

-15

/

-12 -9.0 -6.0 -3.0
0 3.0 6.0 9.0
VCM. COMMON MODE VOLTAGE (V)

12

15

Figure 7. Open-Loop Voltage Gain
versus Temperature

.1_

II:

-25

-

til

=100

5VEE+1.0vt~=:t~1=j==t;1~~:~
~-VEE+O.5V
VE!s5

125

I

I
VCC=+15V
VEE=-15V
TA=25°C

~~ 200

--------!VEE+1.5V~
~

100

I

~ 300

iii" 150

'--

I

iii

VCC = +5.0 Vto +18 V
VEE = -5.0 Vto -18 V
,lVlo=5.0mV
VO=OV

:;

~~

to

Figure 6. Input Common Mode Voltage
Range versus Temperature

~VCC-0.5V

Unit 2

::>

I
I

l--""" ".../' VCC.VEE=±15V

o

Unit 3~

0
25
50
75
TA. AMBIENT TEMPERATURE (0C)

I

~500 ~ -~ 400

'I I

300

----

r--

Figure 5. Input Bias Current versus
Common Mode Voltage

Figure 4. Input Bias Current
versus Temperature

!z

f..--

~

~

VCC=+15V
VEE=-15V
RS = 10n
VCM = 0 V _

r--

Unit 2

a.

0 ~ ~ ~ 00 l00l~
TA. AMBIENT TEMPERATURE (0C)

~~~

r-----

1.0

~ -1.0

--== ~

o

5.0

l

....... ~328r & MC33284P

~d;~

•
---- --

Figure 3. Input Offset Voltage versus
Temperature for Typical Units

Figure 2. Maximum Power Dissipation
versus Temperature

100

125

:Eo

z

~

w

140

C!J

i::!i

~ 130

a.

o

9

~

120

~110
o
~

100
-55

VCC=+15V
VEE=-15V
RL =2.0 kn
f=10Hz
,lVO=10Vto+l0V

--~

-25

0
25
50
75
TA. AMBIENT TEMPERATURE (0C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-271

----

~

100

125

MC33282,· MC33284
Figure 8. Output Voltage Swing
versus Supply Voltage

Figure 9. Output Voltage
versus Frequency
30

40

9-

36

~

32 r---

~

28

!:3

24

5
a.
5

20
16

~

o

~

~

TA=125 oC

c.

~V

A V

RL=10k

A P'"

.."

8.0

./

4.0

~

21

!:3

18

\

\

5

15 I- VCC=+15V
12 r VEE=-15V
o 9.0 r RL= 2.0 kO
AV= +1.0
cS
> 6.0 r THO = $1.0%

~ ~ RL=2k

12

24

~

.....

27

-i:

!3

""

3.0 r

o
2.0

4.0

6.0 8.0
10
12
14 16
VCC, VEE SUPPLY VOLTAGE M

18

l.Ok

20

vCC

tA - -5~oC_

~VCC-4.0V -

VCC=+15V
- RLtoGnd
~
iSVCC-8.0V - VEE=-15V- , - -

~

T

I

.1

.J......

I

~ VCC-12V

en

"-

"
"

I

~VEE+4.0V

1...

- --

5

I

10

;;'

TA = -55°C
2.0

4.0

6.0

8.0

10

12

/

TA- +25°C

14

16

18

0

100

::;;

60
40

AVCM~AVO

20

CMR =20Log

z

0

::;;
::;;
0

u

a:

::;;

u

o

10

20

~
a.

t:

~

40 =

a:

~
+

20

a:
a:

........

I

:0
re.;

60

D..

i:E

PSR+

J

g;
en
a:

1

111111

U3
a: 80

~
AVO

Vee

+PSR = 2DLo9( AVoIAoM )
AVCC 11I1
100

35

r\.

~

30

~r-..

C3

25

o

i"o

$

20
15

100 k

100 k

1.0M

t;:

~

VID=±1.0V
RL < 1000

45
40

i3
t:::

10

r----- VCC, VEP ±15 V

r--

r-- io-

r--- Vce, VEE = ±2.5 V

o 5.0

TAI=12f~nlll

1.0 k
10k
f, FREQUENCY (Hz)

1.0k
10k
f, FREQUENCY (Hz)

50

PSR-

VCC=+15V
VEE=-15V
AVCC=±1.5V

"'"

" "

Figure 13. Output Short Circuit Source
Current versus Temperature

Figure 12. Positive Power Supply
Rejection versus Frequency

trl

( AVCM
)
AVO x ADM'

100

1[., LOAD CURRENT (rnA)

~ 120
z
Q 100

1.0M

VCC = +15V
VEE=-15V
VCM=OV
AVCM=±1.5V

r-

U3 80

a:
w
c
0

1 -L

~TAI=I~;I -

~VEE+2.0V

120

t5w

1,1 ..........

TAI=+25~

I

J.-

m
:s
z

.......'l~

TA= 125°C"\..
I
I\.

10 k
100 k
. f, FREQUENCY (Hz)

Figure 11. Common Mode Rejection
versus Frequency

Figure 10. Output Saturation Voltage
versus Load Current
~
w

\

I

I

TA =2n

o

1\

]
1.0M

0
-55

-25

0
25
50
75
TA, AMBIENT TEMPERATURE (0C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-272

100

125

MC33282, MC33284
Figure 14. Output Short Circuit Sink
Current versus Temperature

<"

t

~

50

-

45

~C~'VEEJ5V

§5 40

o
!:: 35
:::>

~ 30

t3

Ii:

§?

25
20

---

I--

Vcc, VEE = ±2.5 V

UJ

!:; 15

15

10
: ; 5.0
o
gz 0
-55

Figure 15. Power Supply Current
versus Supply Voltage
3.0

VID=±1.0V
RL <100Q -

I

---------

Vcc, VEE =±15 V

w

a:

§5 2.0

o

~

:t
:::>

1.5

1.0
0.5

o
-25

0
25
50
75
TA, AMBIENT TEMPERATURE (OC)

100

14

~

12

w

10

~
a:

6.0

!;;:
~ 8.0

(J)

Inverting

-

~mplifier

VCC=+15V_
VEE=-15V
dVin=20V CL=100pF
RL=2.0kO -

I

o
-25

-55

I

0
25
50
75
TA, AMBIENT TEMPERATURE (OC)

100

o
125

-55

Figure 18. Gain and Phase
versus Frequency
50

\

TA = 25°C
CL=OpF

40
1D 30

~

20

~ 10
~

0

'"~ -10
>

~

.,..
.......

JfB~

20 '---""'-rT1TTTTT

100

2B1

~

;>-20
1A) Phase VCC = 18 V, VEE - -18 V
..:
-30 2A) Phase VCC = 1.5 V, VEE = -1.5 V
-40 1B) GainVcc = 18V, VEE = -18V
2B) Gain VCC = 1.5 V, VEE = -1.5 V
-50
100 k
1.0M
10M
t, FREQUENCY (Hz)

r-\

"""T"""T"""T"TTTfl

16~9999P~hasie~Ma=rg~iniS±:l-tttvin~vo

50

en

40

i

180
w
200 ~

~ 8.0

240 .".

\

125

![
R2 11111I
~
~ 12~-+-+~H+~--+-+444~~-+-+~H+1~130~

220 11:_

i\.

100

140
w
160 a:

Ii

I\.

0
25
50
75
TA, AMBIENTTEMPERATURE (0C)

IIIIIII-'---rT"TTTTrr--R""T""1

80

ffi

~A
2A

-25

Figure 19. Phase Margin and Gain Margin
versus Differential Source Resistance

120
~

125

--

r--

II

2.0

100

Vcc = +15 V
VEE=-15V
t= 100 kHz
RL= 2kQ
CL = 0 pF

- ---

r--......

Noninverting AmPlifie\

4.0

0
25
50
75
TA, AMBIENT TEMPERATURE (0C)

Figure 17. Gain Bandwidth Product
versus Temperature

I

--=:~

-25

-55

125

Figure 16. Slew Rate
versus Temperature
16

-

I- Vcc, VEE - ±2.5 V

(J)

ffi
~
DE

I

--- --

l!z 2.5

260

~

c:J

E
..: 4.0

VCC=+15V
VEE=-15V
RT =R1 + R2
VO=OV
TA = 25° c

~~~in~~~:~ ~
20 ~

~\;j§

I\

a.

I\

~.'

10

I I I III
°1~0--~~-u~10~0--~~-u~1.~0~k~~~~1~0~

100M

RT> DIFFERENTIAL SOURCE RESISTANCE (0)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-273

j

MC33282, MC33284

III

Figure 20. Open-Loop Gain and Phase
Margin versus Output Load Capacitance

--....

12
!C
:8:z 10

~
~

S.O r---

§
::z
w

~

I I II

:;; 8.0

I III

I'

P~s:rlf

/

Vin~vo

0-

2.0kQ ~I CL

10

40

a:

C!J

!C 30

20 e.

:z 20

ttl
w

;> \.

\

~

10

30

!i
:;;

tll
...:

0

40

~

w

~

0-

~

SO

1

~

-10

>

>-20
«
-30

~ 1.0
:z

o
~

........

./



u:l

130

Drive Channel
VCC=+ISV
VEE=-ISV
RL= 2.0 kQ
,iVOD = 20 Vp-p
TA=2SoC

:z
:z

~ 120

<..>

rn

<..> 110

100
100

1.0k

:aw
<..>

80

~w

70

~

SO

0-

::l

0

10k
f, FREQUENCY (Hz)

AV= +1.0

0.001
10

~
:> SO

100

1.0 k
f, FREQUENCY (Hz)

~

:...J

Input Noise Vonage Test CircuR

AV = 1000

1.0M
f, FREQUENCY (Hz)

30

~

20

i'

200

r'-..

~
200

Vo

2.0k

~

w

I
/N
V

lOOk

!Q

~
o

"-

100 k

.. ,

40

~
w

10 k

Figure 25. Input Referred Noise Voltage
versus Frequency

w

/

~

I

AV = +10

i=

1.0M

/

10 k

III

III

.s

o

V

AV= +100

f:?
c

lOOk

...- It-

./

III

III U

0.0
~
1

AV = 101J...i--

30

~ 20
10

AV = +1000

VO= 2V8"p
TA=2SO

~

i-'

~ 40

100M

o

AV=10

I-

10M

Z

VCC=+ISV
VEE=-lSV
VO=OV
TA= 2SoC

0-

100M

..J

SO

220~
240

~II

<..>

Figure 24. Output Impedance
versus Frequency
100
90

200~

III I

I 11-111111

25 0.1

,

cr:

1\ \
r...: ~
\ 2B

E VCC=+lSV
1= VEE~-ISV

:=

~

w

lS0Sl
180e.
w

~

Figure 23. Total Harmonic Distortion
versus Frequency

ISO

o
i]!i 140

2A

a:

f, FREQUENCY (Hz)

!C

;::;

.....

VCC= lSV
VEE=-ISV
-lA) Phase, Vo = 10V
2A) Phase, Vo = -10V
-1 B) Gain, Vo = 10 V
-2B) Gain, Vo = -10V

en

140 ttl

~lA

.......

Figure 22. Channel Separation
versus Frequency

~ ISO

100
120

~

Gain

80

TA = 2SoC
CL = 0 pF

IIIPhase

-40
-SO
100 k

SO
1.0 k

SO
100
SOO
CL, OUTPUT LOAD CAPACITANCE (pF)

III

:8-

:z

a

VCC=+ISV
VEE = -IS v
VO=OV

o

SO

en

10

V

4.0

o
E 2.0
«

o

~

Gain Margin ,

:z
0-

:-H-U

Figure 21. Gain and Phase
versus Frequency

:: 10 VCC=+IS V~
::l
VEE=-lSV
0~
TA = 2SoC
c: 0
100
'"
10

I

AV= 1.0
10M

1.0 k

f, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-274

10 k

lOOk

MC33282, MC33284
Figure 27. Noninverting
Amplifier Overshoot

Figure 26. Percent Overshoot versus
Load Capacitance
100
~ 90

b

80

~

70

~

60

~
I-

50

I

I

VCC=+15V
VEE = -15 V
RL = 2.0 k
TA = 25° C

/
./

/'

ifi 40
'-'

ffi

0..

30
20
10
010

100
CL, LOAD CAPACITANCE (pF)

1.0 k

1, TIME (1.0 J.lS/DIV)

Figure 29. Inverting
Amplifier Slew Rate

Figure 28. Noninverting
Amplifier Slew Rate

2
c
:>
c
!!i.

2
c
:>
c
!!i.

(!l

(!l

w

w

~
§?

~
§?

50..

I-

:::>
0..

l-

I-

:::>
0

:::>
0

~

~
t, TIME (1.0 J.lS/DIV)

1, TIME (1.0 J.lS/DIV)

MOTOROLA LINEAR/INTERFACE les DEVICE DATA
2-275

I

Ell

MOTOROLA

MC33304

SEMICONDUCTOR-----TECHNICAL DATA

Product Preview

Rail-to-Rail, Sleep-Mode™
Two-State Operational Amplifier
The MC33304 quad operational amplifier provides rail-to-rail operation on
both the input and output while incorporating the Sleep-ModeT " technology of
the MC33102. In sleepmode, the amplifier is active and waiting for an input
signal. When a signal is sensed on the input, it will automatically switch to the
awakemode which offers higher slew rate, gain bandwidth, and drive capability.
The output rail-to-rail operation enables the user to make full use of the supply
voltage range available. It is designed to work at low supply voltages, yet can
operate with a supply of up to +15 V and ground. The sleepmode function
combined with a boosted output stage provide the highest possible output
current capability while keeping the drain current of the amplifier to a minimum.
Also, the combination of low noise and distortion with a high drive capability
make this an ideal amplifier for audio applications.
• Two States: "Sleepmode" (Micropower) and "Awakemode"
(High Performance)

QUAD SLEEP-MODETM
RAIL-TO-RAIL
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT

PSUFFIX
PLASTIC PACKAGE
CASE 646

• Automatically Changes Modes: No Additional Pins/Logic Required
• Independent Sleepmode Function for Each Op Amp

D SUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)

• Low Voltage, Single Supply Operation (+ 1.8 V, Ground to + 15 V, and
Ground)
• Input Voltage Range Includes Both Supply Rails
• Output Voltage Swings Within 50 mV of Both Rails
• No Phase Reversal on the Output for Overdriven Input Signals
• High Output Current
• Low Supply Current

PIN CONNECTIONS

• Low Noise
• 600

Q

Output Drive Capability

• ESD Clamps on Inputs Increase Reliability Without Affecting Device
Operation

Output 1

Output 4

Inputs 1 {

}

~nputs

VEE

Inputs 2 {

}

Output 2

Ratings

Input Differential Voltage Range

Output 3
(Top View)

MAXIMUM RATINGS

Supply Voltage (VCC to VEE)

~Puts

Symbol

Value

Unit

Vs

+16

V
V

VIDR

5.0

Input Voltage Range

VIR

(See Note)

V

Junction Temperature

TJ

+150

°c

Device

Storage Temperature

Tstg

-60 to +150

°C

MC33304D

ORDERING INFORMATION

MC33304P

NOTE: Either or both input voltages should not exceed VCC or VEE.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-276

Temperature Range
- 40° to + 85°C

Package
SO-14
Plastic DIP

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

MC34001, MC35001
MC34002, MC35002
MC34004, MC35004

I

1m
I

JFET Input Operational Amplifiers
These low cost JFET Input operational amplifiers combine two state-of-the-art
linear technologies on a single monolithic integrated circuit. Each internally
compensated operational amplifier has well matched high voltage JFET input
devices for low input offset voltage. The BIFET technology provides wide
bandwidths and fast slew rates with low input bias currents, input offset currents,
and supply currents.
The Motorola BIFET family offers single, dual and quad operational amplifiers
which are pin-compatible with the industry standard MC1741, MC1458, and the
MC3403/LM324 bipolar devices. The MC35001/35002/35004 series are
specified over the military operating temperature range of -55° to + 125°C and the
MC34001/34002/34004 series are specified from 0° to +70°C.

JFETINPUT
OPERATIONAL AMPLIFIERS

!~fn

~

1

1

U SUFFIX
CERAMIC PACKAGE
CASE 693

PSUFFIX
PLASTIC PACKAGE
CASE 626

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

• Input Offset Voltage Options of 5.0 mV and 10 mV Maximum
• Low Input Bias Current: 40 pA
• Low Input Offset Current: 10 pA
• Wide Gain Bandwidth: 4.0 MHz

PIN CONNECTIONS

• High Slew Rate: 13 V/f.!s
• Low Supply Current: 1.4 mA per Amplifier

Offset Null 1

• High Input Impedance: 10 12 Q

Inv. Input

• High Common Mode and Supply Voltage Rejection Ratios: 100 dB
• Industry Standard Pinouts

2

7

VCC

Noninv. Input 3

6

Output

5

Offset Null

VEE

4

Output A

1
7

Output B

InputsA{ : +
VEE

Device

Temperature
Range

Package

0' to+ 70'C

Plastic DIP

SO-8

MC34001BD, D
Single

MC34001 BP, P
MC34001BU, U
MC34002BD, D

Dual

MC34002BP, P
MC35002BU, U
MC34004BL, L

Quad

MC34004BP, P
MC35004BL, L

PSUFFIX
PLASTIC PACKAGE
CASE 646

PIN CONNECTIONS

ORDERING INFORMATION

Ceramic DIP
0' to +70'C
-55' to + 125'C
0' to +70'C
-55' to + 125'C

SO-8
Plastic DIP
Ceramic DIP
Ceramic DIP
Plastic DIP
Ceramic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-277

MC34002,
MC35002
(Top View)

4

LSUFFIX
CERAMIC PACKAGE
CASE 632

OpAmp
Function

MC34001,
MC35001
(Top View)

MC34004, MC35004 (Top View)

MC34001, MC35001, MC34002, MC35002, MC34004, MC35004
MAXIMUM RATINGS

•

Rating
Supply Voltage
Oifferentiallnput Voltage (Note 1)
Input Voltage Range

Symbol

MC35001
MC35002
MC35004

MC34001
MC34002
MC34004

Unit

VCC,VEE

±22

±18

V

VIO

±40

±30

V

VIDR

±20

±16

V

-55 to +125

Oto +70

°C

150

150
150

-65 to +150

-65 to +150
-55 to +125

Open Short Circuit Ouration

tsc

Operating Ambient
Temperature Range

TA

Operating Junction Temperature
Ceramic Package
Plastic Package

TJ

Storage Temperature Range
Ceramic Package
Plastic Package

Continuous

°C

-

°C

Tstg

-

NOTES: 1. Unless otherwise specified, the absolute maximum negative input voltage is equal to
the negative power supply.
ELECTRICAL CHARACTERISTICS (VCC

=+ 15 V, VEE =-15 V, TA =25°C, unless otherwise noted.)
MC35001135002I35004

MC34001134002134004

Min

Typ

Max

-

3.0
5.0

5.0
10

lNldt:..T

-

10

-

-

Input Offset Current (VCM = 0) (Note 3)
MC3500XB, MC3400XB
MC3500X, MC3400X

110

-

10
25

50
100

-

(VCM = 0) (Note 3)
MC3500XB, MC3400XB
MC3500X, MC3400X

liB

40
50

100
200

1012

Characteristics

Symbol

Input Offset Voltage (RS S 10k)
MC3500XB, MC3400XB
MC3500X, MC3400X
Average Temperature Coefficient of Input Offset Voltage
RS S 10 k, TA =Tlowto Thigh (Note 2)

Input Bias Current

VIO

Typ

Max

3.0
5.0

5.0
10

10

-

25
25

100
100

50
50

200
200

1012

-

n

±11

-

+15
-12

-

V

Min

Unit
mV

-

pA

pA

Ii

-

Common Mode Input Voltage Range

VICR

±11

-

+15
-12

-

Large Signal VoHage Gain (VO =±10 V, RL = 2.0 k)
MC3500XB, MC3400XB
MC3500X, MC3400X

AVOL
50
25

150
100

-

50
25

150
100

-

±12
±10

±14
±13

-

±12
±10

±14
±13

-

80

100

-

80
70

100
100

-

80
70

100
100

80
70

100
100

-

1.4
1.4

2.5
2.7

13

-

V/lJ.s

Input Resistance

Output Voltage Swing
(RL;;' 10k)
(RL;;,2.0 k)

Vo

Common Mode Rejection Ratio (RS S 10 k)
MC3500XB, MC3400XB
MC3500X, MC3400X

CMRR

Supply Voltage Rejection Ratio (RS S 10k) (Note 4)
MC3500XB, MC3400XB
MC3500X, MC3400X

PSRR

S4Pply Current (Each Amplifier)
MC3500XB, MC3400XB
MC3500X, MC3400X

-

10

Equivalent Input Noise Voltage
(RS = 100 n, f = 1000 Hz)

en

-

Equivalent Input Noise Current (f = 1000 Hz)

in

-

Slew Rate (AV = 1.0)

SR'

Gain-Bandwidth Product

GBW

-

-

-

-

IJ.V/oC

V

-

dB

dB

mA

13

-

-

4.0

-

-

4.0

25

-

-

25

-

nV/--n:iZ

O.ot

-

-

0.01

-

pAl--n:iZ

1.4
1.4

2.5
2.7

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-278

V/mV

MHz

MC34001, MC35001, MC34002, MC35002, MC34004, MC35004
ELECTRICAL CHARACTERISTICS (VCC;+ 15V VEE;-15VTA; Tlow tT
0 high [N 0 te 2])
MC35001/35002135004
Characteristics

Symbol

Input Offset Voltage (RS';; 10k)
MC3500XB, MC3400XB
MC3500X, MC3400X

Via

Input Offset Current (VCM; 0) (Note 3)
MC3500XB, MC3400XB
MC3500X, MC3400X

110

Input Bias Current

liB

(VCM ; 0) (Note 3)
MC3500XB, MC3400XB
MC3500X, MC3400X

VICR

Large Signal (Va; ±IO V, RL; 2.0 k)
MC3500XB, MC3400XB
MC3500X, MC3400X

AVOL

CMRR

Supply Voltage Rejection Ratio (RS ,;; 10k) (Note 4)
MC3500XB, MC3400XB
MC3500X, MC3400X

PSRR

Supply Current (Each Amplifier)
MC3500XB, MC3400XB
MC3500X, MC3400X
NOTES: 2. Tlow

ID

Max

MC34001134002/34004
Min

Typ

Max

7.0
14

-

-

7.0
13

-

-

-

-

40
40

-

-

4.0
4.0

-

-

50
50

-

8.0
8.0

-

±II

-

±II

Unit
mV

-

-

-

nA

nA

-

25
15

-

-

25
15

-

-

±12
±IO

-

-

-

±12
±IO

-

-

80
70

-

-

80
70

-

-

80
70

-

-

80
70

-

-

-

-

2.8
3.0

-

-

-

2.8
3.0

Va

Common Mode Rejection Ratio (RS ,;; 10k)
MC3500XB, MC3400XB
MC3500X, MC3400X

Typ

-

-

Common Mode Input Voltage Range

Output Voltage Swing
(R 2! 10 k)
(R2! 2.0 k)

Min

V
V/mV

V

-

dB

-

dB

mA

-55°C for

-

MC35001135001 B
Thigh; + 125°C for MC35001135001 B
MC35002J35002B
MC35002J35002B
MC35004/35004B
MC35004/35004B
; O°C for
MC34001134001 B
; +70°C for MC34001134001 B
MC34002J35002B
MC34002J35002B
MC34004/34004B
MC34004/34004B
3. The input bias currents approximately double for every 10°C rise in junction temperature, TJ. Due to limited test time, the input bias
currents are correlated to junction temperature. Use of a heatsink is recommended if input bias current is to be kept to a minimum.
4. Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with
common practice.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-279

MC34001, MC35001, MC34002, MC35002, MC34004, MC35004
Figure 2. Output Voltage Swing
versus Frequency

Figure 1. Input Bias Current
versus Temperature

1:
!z

f= VCcNEE - +15 V

:::J

~

1111111

~
~

TA=25°C

~ ~V~C~cN~E~Em=~±1~5~V~~~*OO~+I~~~2~Jkl

10

w

II:
II:
C,,)

~30 1111111111 I
i:i

1.0

25 t20

1111]1 . .1

H-+-HIttH-t-f-H-tItt'I\~+++ttt1f-H-t-l-++ttll

±10 V

r+rtrHm-rl-rH~+++t~r\

~ 15r+H-r~IIII~II_LH-rH~T++++ttt1~-H~*+r+++Hffi

1i'i

~

~

I ~51.0JV

o

111111

~ 10~~~~~~~++++~~~~~ttttmm

~ 0.1

~ 5.0 I-++-H-HtII-IIIIII++-+++tI
11If-+++++tttt-++-f+t11'H,d-f--tt+tfftj

!O!

0.01

O~~~~u-~~~~~~-w~~~~wu

-75

-50

-25

25

50

75

100

100

125

1.0k

10k

Figure 3. Output Voltage Swing
versus Load Resistance
40

z

I I
I I I
30 - VCcNEE = ±15 V
_ TA = 25°C

w

20

6.

<::.
C!l

~
en
C!l

>

10

>:::J

~

?

<::.

TA = 25°C

C!l

i:i'"
0

20

C!l

30

i3w

25

z

C!l

i:i

20

~

15

~
"-

>

>-

:::J

10

0

0.2

0.4
0.7 1.0
2.0
RL, LOAD RESISTANCE (kQ)

4.0

7.0

10

L

o
o

I

-

2.0

I

-VC;NEE=±15V

,/

5.0
10
15
VCcNEE, SUPPLY VOLTAGE (V)

20

Figure 6. Supply Current per Amplifier
versus Temperature
-

"-

g6 5.0
>

,/

:::J

Figure 5. Output Voltage Swing
versus Temperature

l35

,/

w

?

0.1

/ ' '"

30

~
en

/
5.0
o

t- RL=2.0k

z

./

/

>-

:::J

"-

10M

I

a.

6.

./

~

'-'
0

1.0M

Figure 4. Output Voltage Swing
versus Supply Voltage

40
Cl.

100k

t, FREQUENCY (Hz)

TA, AMBIENT TEMPERATURE (0G)

E
-50

-25
0
25
50
75
TA, AMBIENTTEMPERATURE (0G)

100

0.2

o

125

-50

-25
0
25
50
75
TA, AMBIENT TEMPERATURE (0G)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-280

100

125

MC34001, MC35001, MC34002, MC35002, MC34004, MC35004
Figure 7. Large-Signal Voltage Gain and
Phase Shift versus Frequency

Figure 8. Large-Signal Voltage Gain
versus Temperature
1000

I-- -...

--... '"
"-

C!l

w

e.

"

0° t;:

:;:
en
45 0 w

~ain

"'~

'" "-

Phase Shift

10

w

a:

t'-...

"-

1
1.0

en
w

VCcJVEE= ±15 V
RL=2.0k
- TA = 25°C

100

loOk 10k lOOk
t, FREQUENCY (Hz)

90

"\

1E

-

~

~100

C!l

w

C!l

~
:..J

==

-

0

>
...:J

10

§;

..:

1350

\

""'"

~

0

VCcJVEE = +15 V
VO-+l0V
RL=2.0k

:;-

1.0M LaM

180°
10M

1.0

-50

-25
0
25
50
75 100
TA, AMBIENT TEMPERATURE (0C)

125

Figure 10. Equivalent Input Noise Voltage
versus Frequency

Figure 9. Normalized Slew Rate
versus Temperature

~

:>

1.15
w

~ 1.10

~
fil

en

1.05
1.00

N

~

0.95

~

0.90

--

.=.
w

60

13

50

C!l

r---

- -r-- -

0

>
w
en 40
5
:z 30

f\.

-

~

....

~

I---

a.

~

....
:z

20

~ 10

0.85

~

:;
-50

-25

0

25

50

75

100

125

0

w

-

0
0.01

0.05 0.1

c:

TA, AMBIENT TEMPERATURE (OC)

'"

0.5 1.0
5.0 10
t, FREQUENCY (kHz)

Figure 11. Total Harmonic Distortion
versus Frequency
~

1.0

t5

0.5

~

0.1

~

25

o

~
::;;

~
~
..J

~

1=

VCcJVEE = ±15 Vdc
AV= 1.0
Vo = 6.0 V (RMS)
TA = 25°C

0.05
0.Q1

;$

~ 0.005

o
i=

0.0010.1

0.5

1.0
5.0 10
t, FREQUENCY (kHz)

50

100

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA

2-281

50 100

MC34001, MC35001, MC34002, MC35002, MC34004, MC35004
Representative Circuit Schematic
(Each Amplifier)
Bias Circuitry
Common to All
AmplHiers

Output

VCC

(M:~tt. {
MC35001
only)

1.5k

o--~==~==~==~~=-+-+----<>-------<----+--------++-+----'

Figure 12. Output Current to Voltage Transformation
for a D-to-A Converter

SeWing time to within 1/2 LSB (±19.5 mV) is approximately 4.0 lls
from the time all bits are swnched.
-

H:>-----'VVv--....- - _ Vref

"The value of C may be selected to minimize overshoot and ring·
ing(C=68pF)

VCC=15V

Theoretical Va
Vref
Va = AI (Ro)
Va

MC34001

VEE = -15V
RO

[At2 + A24 + A38 + A416

Adjust Vref. Rl or RO so that Va with all digitsl inputs at high level
is equal to 9.961 V.
Vref = 2.0 Vdc
RI=R2 = 1.0kQ
RO =5.0kQ
VO=

2.0V

l--:ilk

[1
1
1
1
1
1
1
1]
(5k) 2+4+8 +16 +"32 +"64 +128 +256

255]
=10V [ 256 =9.961V

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-282

A5
A6 A7 A8]
+ 32 + 64 + 128 + 256

MC34001, MC35001, MC34002, MC35002, MC34004, MC35004
Figure 13. Positive Peak Detector

L_B

VCC

;r_-ID~lf---"_*

2

__

Yin 0-------'3'-1

1.0
-4>-~

lN914 II/lF

Vo

1/2 MC34002

1/2 MC34002
Reset
Network
or Relay

*Polycarbonate capacitor
Dl ~ Hi·speed, low· reverse leakage diode

Figure 14. Long Interval RC Timer

Rl

Vl

Figure 15. Isolating Large Capacitive Loads

+15V
MC34001

R3

R4

+2.0~r

Clear

-2.0V

Run
R5

• Overshoot < 10%
• ts~10/ls
• When driving large Ct.. the Vo slew rate is determined by CL
and 10(max),

*Polycarbonale or
Polystyrene Capacitor

Time (I) ~ R4 Cn (VRNR-VI), R3 ~ R4, R5 ~ 0.1 R6
If Rl ~ R2: I ~ 0.693 R4C

I1VO
-I1t

~

10
CL

~

0.02
.
-05 VI/ls ~ 0.04 V//lS (with CL shown)
.

Design Example: 100 Second Timer
VR ~ 10 V C ~ 1.0 /IF R3 ~ R4 ~ 144 M
R6 ~ 20 k R5 ~ 2.0 k Rl ~ R2 ~ 1.0 k

Figure 16. Wide BW, Low Noise,
Low Drift Amplifier
C2
R2
fmax '" 240 kHz

1~

Rl

-10V
Cl =: =

MC34001

Sr
• Power BW: fmax ~ 2" Vp '" 240 kHz
• Parasitic inpul capacitance (Cl '" 3.0 pF plus any additional layout capacitance)
interacts with feedback elements and creates undesirable high-frequency pole.
To compensate add C2 such that: R2C2 '" R1Cl.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-283

•

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

High Slew Rate, Wide Bandwidth,
Single Supply Operational Amplifiers
Quality bipolar fabrication with innovative design concepts are employed for
the MC33071/72/74, MC34071/72/74, MC35071/72/74 series of monolithic
operational amplifiers. This series of operational amplifiers offer 4.5 MHz of gain
bandwidth product, 13 V/lJ.s slew rate and fast setting time without the use of
JFET device technology. Although this series can be operated from split supplies,
it is particularly suited for single supply operation, since the common mode input
voltage range includes ground potential (VEE). With A Darlington input stage, this
series exhibits high input resistance, low input offset voltage and high gain. The
all NPN output stage, characterized by no dead band crossover distortion and
large output voltage swing, provides high capacitance drive capability, excellent
phase and gain margins, low open-loop high frequency output impedance and
symmetrical source/sink AC frequency response.
The MC33071 172/74, MC34071 172173, MC35071/72/74 series of devices are
available in standard or prime performance (A Suffix) grades and are specified
over the commercial, industriallvehicular or military temperature ranges. The
complete series of single, dual and quad operational amplifiers are available in
the plastic, ceramic DIP and SOIC surface mount packages.
•
•
•
•
•
•
•
•
•
•
•
•
•

Wide Bandwidth: 4.5 MHz
High Slew Rate: 13 V/lJ.s
Fast Settling TIme: 1.1 IJ.s to 0.1 %
Wide Single Supply Operation: 3.0 V to 44 V
Wide Input Common Mode Voltage Range: Includes Ground (VEE)
Low Input Offset Voltage: 3.0 mV Maximum (A Suffix)
Large Output Voltage Swing: -14.7 V to +14 V (with ±15 V Supplies)
Large Capacitance Drive Capability: 0 pF to 10,000 pF
Low Total Harmonic Distortion: 0.02%
Excellent Phase Margin: 60°
Excellent Gain Margin: 12 dB
Output Short Circuit Protection
ESD Diodes/Clamps Provide Input Protection for Dual, and Quad

Dual

Quad

Device
MC34071 P, AP
MC34071 D, AD
MC34071 U, AU
MC33071 P, AP
MC33071 D, AD
MC33071 U, AU
MC35071U, AU
MC34072P, AP
MC34072D, AD
MC34072U, AU
MC33072P, AP
MC33072D, AD
MC33072U, AU
MC35072U, AU
MC34074P, AP
MC34074D, AD
MC34074L, AL
MC33074P, AP
MC33074D, AD
MC33074L, AL
MC35074L, AL

Temperature Range
A' to +70'C
-40' to +85'C
-55' to +125'C
A' to +70'C
-40° to +85'C
-55' to +125'C
0' to +70°C
-40° to +85°C
-55° to +125'C

!~~

~
1

1

PSUFFIX
PLASTIC PACKAGE
CASE 626

U SUFFIX
CERAMIC PACKAGE
CASE 693
DSUFFIX
PLASTIC PACKAGE
CASE 751
(50-8)

PIN CONNECTIONS
OlisetNull

1
7

6
L -_ _.....J

Package
Plastic DIP
SO-8
Ceramic DIP
Plastic DIP
50-8
Ceramic DIP
Ceramic DIP
Plastic DIP
50-8
Ceramic DIP
Plastic DIP
SO-8
Ceramic DIP
Ceramic DIP
Plastic DIP
SO-14
Ceramic DIP
Plastic DIP
SO-14
Ceramict:llP
Ceramic DIP

Outputl

1

Inputs 1 { :
VEE

7

Output 2

-.....J: } Inputs 2

4L-_ _

(Dual, Top View)

J_

14_
1

LSUFFIX
CERAMIC PACKAGE
CASE 632
DSUFFIX
PLASTIC PACKAG~
CASE 751A
(SO-14)

14#
1

PIN CONNECTIONS

1G;:
4

~

.,..,

[!~

{lI

Inputs 1 l@: :

~

Vee [I

Inputs2{~
Output2[L

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-284

5

Vee
Output
Offset Null

(Single, Top View)

PSUFFIX
PLASTIC PACKAGE
CASE 646

ORDERING INFORMATION
OpAmp
Function
Single

MC34071 ,2,4
MC35071 ,2,4
MC33071 ,2,4

0"••

"l
~}
g]

Inputs 4

!]VEE

(J~
(Quad, Top View)

~}
~
Inputs 3
~

Output 3

MC34071, 34072, 34074/MC35071 , 35072, 35074/MC33071 , 33072, 33074
MAXIMUM RATINGS
Rating

Symbol

Value

Unit

Vs

+44

V

VI DR

Note 1

V

Supply Voltage (from VEE to Vcc)
Input Differential Voltage Range
Input Voltage Range

VIR

Note 1

V

Output Short Circuit Duration (Note 2)

tsc

Indefinite

sec

Operating Junction Temperature
Ceramic Package
Plastic Package

TJ

Storage Temperature Range
Ceramic Package
Plastic Package

aI

I

°c
+160
+150
°C

Tstg
-65 to +160
-60 to +150

NOTES: 1. Either or both input voltages should not exceed the magnitude of VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ)
is not exceeded (see Figure 1).

Equivalent Circuit Schematic
(Each Amplifier)

Vee

.....V0.,..-VVl---'!>---o Output

RS

Inputs
+o---------~--------_r-+--+_----~--~

R5
R3

R4

Offset Null
(MC33071, MC34071,MC3~071 only)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-285

MC34071, 34072, 34074/MC35071 , 35072, 35074/MC33071 , 33072, 33074
ELECTRICAL CHARACTERISTICS

(VCC = +15 V, VEE = -15 V, RL = connected to ground, unless otherwise noted.
See [N oe
t 3lfor TA= T low toThigh )
A Suffix

Characteristics

Symbol

Input Offset Voltage (RS = 100 n, VCM = 0 V, Va = 0 V)
VCC = +15 V, VEE = -15 V, TA = +25°C
VCC = +5.0 V, VEE = 0 V, TA = +25°C
VCC = +15 V, VEE = -15 V, TA = Tlow to Thigh

Via

Average Temperature Coefficient of Input Offset Voltage
RS = 10 g, VCM = 0 V, Va = 0 V,
TA = Tlow to Thigh

tNlot6T

Max

Min

Typ

Max

0.5
0.5

-

3.0
3.0
5.0

-

1.0
1.5

-

5.0
5.0
7.0

-

10

-

-

10

-

-

100

-

500
700

-

100

-

-

-

500
700

-

6.0

-

6.0

-

-

Input Bias Current (VCM = 0 V, Va = 0 V)
TA = +25°C
TA = Tlow to Thigh

liB

Input Offset Current (VCM = 0 V, Va = OV)
TA = +25°C
TA = Tlow to Thigh

110

-

Input Common Mode Voltage Range
TA = +25°C
TA = Tlow to Thigh

VICR

Large Signal Voltage Gain (Va = ±1 0 V, RL = 2.0 kr.!)
TA = +25°C
TA = Tlow to Thigh

AVOL

Output Voltage Swing (VID = ±1.0 V)
VCC = +5.0 V, VEE = 0 V, RL = 2.0 kn, TA = +25°C
VCC=+15V, VEE=-15V, RL= 10kn, TA=+25°C
VCC=+15V, VEE=-15V, RL=2.0kr.!,
TA = Tlow to Thigh

VOH

VCC = +5.0 V, VEE = 0 V, RL = 2.0 kn, TA = +25°C
VCC = +15 V VEE = -15 V, RL = 10 kn, TA = +25°C
VCC = +151/, VEE =-15 V, RL= 2.0 kr.!,
TA = Tlow to Thigh

VOL

-

50
300

mV

nAi

-

75
300

VEE to (VCC -1.8)
VEE to (VCC -2.2)

100

-

-

25
20

100

-

3.7
13.6
13.4

4.0
14

-

3.7
13.6
13.4

4.0
14

-

-

0.1
-14.7

-

-

10
20

30
30

-

-

0.3
-14.3
-13.5

-

-

0.1
-14.7

0.3
-14.3
-13.5

V/mV

V

V

-

-

10
20

30
30

70

97

-

dB

-

70

97

-

dB

2.0
2.5
2.8

-

1.6
1.9

2.0
2.5
2.8

rnA

ISC

CMR

80

97

Power Supply Rejection (RS = 100 g)
VCcNEE = +16.5 V/-16.5 V to +13.5 V/-13.5 V,
TA = 25°C

PSR

80

97

-

1.6
1.9

ID

jlVrC

nA

50
25

Common Mode Rejection
RS = 100 kn, VCM = VICR, TA = 25°C

Power Supply Current (Per Amplifier, No Load)
VCC = +5.0 V, VEE = 0 V, Va = +2.5 V, TA = +25°C
VCC = +15 V, VEE =-15 V, Va = 0 V, TA = +25°C
VCC = +15 V, VEE =-15 V, Va = 0 V,
TA = Tlow to Thigh

Unit

V
VEE to (VCC -1.8)
VEE to (VCC -2.2)

Output Short Circuit Current (VID = 1.0 V, Va = 0 V,
TA=25°C)
Source
Sink

NOTES: 3. Tlow

Non-Suffix

Typ

Min

-

-

-

-

-55°C for MC35071 ,2,4, IA
-40°C for MC33071, 2, 4, IA
O°C for MC34071, 2, 4, IA
+ 125°C for MC35071, 2, 4, IA
+85°C for MC33071, 2, 4, IA
+70°C for MC34071, 2, 4, IA

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-286

-

mA

-

MC34071, 34072, 34074/MC35071, 35072, 35074/MC33071, 33072, 33074
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, RL = connected to ground TA = +25°C, unless otherwise noted.)
Non-Suffix

A Suffix
Characteristics

Symbol

Slew Rate (Vin = -10 V to +10 V, RL = 2.0 kn, CL = 500 pF)
Av=+1.0
AV=-1.0

SR

Setting Time (10 V Step, AV = -1.0)
To 0.1% (+1/2 LSB 01 9-Bits)
To 0.01% (+1/2 LSB 01 12-Bits)

ts

Min

-

GBW

Max

Min

Typ

Max

Unit
V/~s

8.0

Gain Bandwidth Product (I = 100 kHz)

Typ

-

10
13

-

8.0

10
13

-

-

-

-

-

-

~s

-

1.1
2.2

-

-

1.1
2.2

3.5

4.5

-

3.5

4.5

-

MHz

-

160

-

-

160

-

kHz

-

60
40

-

-

60
40

-

-

12
4.0

-

-

12
4.0

-

-

Power Bandwidth
AV = +1.0, RL = 2.0 kn, Vo = 20 V p _p , THD = 5.0%

BW

Phase margin
RL=2.0 kQ
RL = 2.0 kQ, CL = 300 pF


:::;

io
11.

2000

I

~S

8

I

:[ 4.0

f 1124 Pin eerami~ P~g
Il'o.

'~.14Pk9

........ t--

UJ

(!l

~

1200

Figure 4. Input Offset Voltage versus
Temperature for Representative Units

I
8 & 14 Pin Plastic Pkg

~~~

800

50-8 Pkg

400

I::::

"

"""

o

-55 -40 -20

0

20

40

60

80

llitt

0

o

t.....

I
I

2.0

~

.......

I"I=:::~

!:3

I-

~ -2.0

.......

;!!;

........ r-- t.....

>-4.0

6

-

Vee = +15 V VEE=-15V
VeM - 0
-

---

f'II
100 120 140 160

-55

-25

0
25
50
75
TA, AMBIENT TEMPERATURE (0C)

TA, AMBIENTTEMPERATURE (0C)

,

UJ

I
-'II
Vee- VectvEE = +1.5 VI -1.5 V to +22 VI -22 V

Vee- O•B
Vee -1.6

~

6" 1.3

~

~ 1.2

~

~1.1

~

~

I---- t3 ~

:5

,-

=>
u

:::;

~ 0.9

v"'' 'o I;rrrn~
25
50
75
TA, AMBIENT TEMPERATURE (Oe)

i'......
-.............. .......

ca

............... ........

5

~ 0.8
a;

=- 0.7-55

125!j

100

6"

UJ
N

1.4

..:
:::;
a:

I
I -'.
Vee=+15V_
VEE = -15 V
TA = 25°C
-

0
~
IZ

1.2

i'I'-

a:
a:
=>
u

1.0

~

ca
I=>
11.

0.8

RL Connected

r to Ground TA = 25°C

6-

~
(!l

40

z

UJ

>

r-- ........

20

=>

0_

o
o

12

A
~'"

R =2.0k

~

./

10

~
-8.0
-4.0
0
4.0
8.0
VIC, INPUT COMMON MODE VOLTAGE M

./

5

11.
l-

!f!
-12

RL=10k ~

!:3

0

;!!;

0.6

~

30

(!l

r-....

125

50

-a

rn

-......

100

Figure 8. Split Supply Output Voltage
Swing versus Supply Voltage

~

I'- ......

UJ

o
25
50
75
TA, AMBIENT TEMPERATURE (0C)

-25

Figure 7. Normalized Input Bias Current versus
Input Common Mode Voltage
::J

~

~ 1.0

z

o
:::;

-25

""'-

UJ

:::;

Vee-2.4

"-

I
Vee= +15V
VEE=-15V
VeM=O

!z

UJ

VEE_ 55

125

Figure 6. Normalized Input Bias Current
versus Temperature

Figure 5.. Input Common Mode Voltage
Range versus Temperature

Vec

100

./
./
5.0

10

15

Vee, IVEEI, SUPPLY VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-288

20

25

MC34071, 34072, 34074/MC35071, 35072, 35074/MC33071, 33072, 33074
Figure 9. Split Supply Output Saturation
versus Load Current

~
w
~

i:3

~

.,:+-

-

VCC

--

-

sOiree

~ VCC -2.0

~

VCCNEE = +5.0 V/-5.0 V 10 +22 VI -22 V
TA= 25°C

VCC-l.0

~
z

Figure 10. Single Supply Output Saturation
versus Load Resistance to Ground

I

-

VCC

,,-

w
~

VCC

I I IIIII

!::iVCC-2.0

VCC= +15 V
RL = Gnd
TA= 25°C

~
z

r-.

III

IIIIW

l'

~VCC -4.0

:....- -Ul

~~~l'~:'"?0
-en:~1i~ ~
~

02 1--I-+-H--I+t+i+-l--I--H-l++H1-l--I--H-H+++H

t;;:

VEE +2.0

0'.:

w

EEO

5.0

10
15
Il, LOAD CURRENT (±mA)

20

100

Figure 11. Single Supply Output Saturation
versus Load Resistance to VCC
~

0

-

w

~

<,50
.§.

~

~ r--..

I-

z

l'1i 40

~ -0.8

a:
a:

~
::l
t;;:

~) I

r;;;

en 2.0

!3

"-

1.0

-

-

u
:!?

Tf = 125;clll

-i.

i+dl
100

!3
a.
!3
o

1.0 k
10 k
RL, LOAD RESISTANCE TO VCC (Q)

I III

20

VCC=+15V
VEE=-15V
RL';;O.l Q
Li.Vin = 1.0V

10

o

lOOk

-55

.......

-r---'"r--...

Source

a 30

lID

VCC = +15 V
RLIOVCC

......

lOOk

60

VCC

!::i -0.4

5
o

1.0k
10k
RL, LOAD RESISTANCE TO GROUND (Q)

Figure 12. Output Short Circuit Current
versus Temperature

.......

1'1

Gnd

-25

0
25
50
75
TA, AMBIENT TEMPERATURE (0C)

100

125

Figure 14. Output Voltage Swing
versus Frequency
28

II 1111

Q.

;t

\
\

24

\

~ 20

~

~

16

i~:3

12

\

,

1\

VCC=+15V
VEE=-15V
AV = +1.0
RL=2.0k
THD,;;1.0%
TA = 25°C

-

-

I-

1[ 8.0

!3

o.

~

10k

100
f, FREQUENCY (Hz)

1.0M

10M

4.0

o

3.0k

.......
10k

30k

lOOk
300k
f, FREQUENCY (Hz)

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA
2-289

100M

-

3.0M

MC34071, 34072, 34074/MC35071, 35072, 35074/MC33071, 33072, 33074
Figure 16. Output Distortion versus
Output Voltage Swing

Figure 15. Output Distortion versus Frequency
0.4

4.0

I
AV -1000

~

~

~

~
C

0.2

!3

!3

0_

o
~

AV= 100-

~

C 2.0

!3
f=

I

I--

:::>

~

0.1

1.0

:J:

AV= 10

I-

AV= 1.0

o

10

100

AV = 1000

~

VCC= +15V _
VEE = -15 V
Vo = 2.0 Vp•p _
RL = 2.0 k
f-- TA = 25"C

10 k

1.0 k
t, FREQUENCY (Hz)

o

100

L
)I'

Z
w

a.

0100
...:l

J 96
-55

-25

::!.

/

z

«

(!)

---

~ 60

z
«
(!)

-- --

~::---

::!.

t'--..

zw

100

o

10

r-.. ' . . .

w

(!)

~

~ 0
~
a. -10
o
1. Phase RL = 2.0 k

9

2

.....

' ...

'\

~

'.

1.0k

10k

100k

1.0M

140~

~

w

en

~

'\..,
'\..
'\

'\

4. Gain RL = 2.0 k, CL = 300 pF
c5 -30 VCC=+15V
VEE = 15V
~
TA = 25°C
VO=OV

"
'\

3.0 5.0
7.0 10
t, FREQUENCY (MHz)

~

180

10M

<§.

100M

20

3
..........

160:i:
a.
en

180ffl

~

4

"

<§.

'\,
30

I



1.05

.......... r---..

0

0

a:
a.

:J:
I0

§

1.0

VCC=+15V
VEE = -15 V
RL=2.0k

........

~

0.95

z
 DIFFERENTIAL SOURCE RESISTANCE (n)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

e.

~
30~

R2

C!l

CL; 10,000 pF

ffi

40~

+

~ 4.0 I- VCc= +15V

1

-25

11~U'

10
iD

~a.o

--

I

0
25
50
75
TA, AMBIENTTEMPERATURE ('C)

Figure 26. Phase Margin and Gain Margin
versus Differential Source Resistance

CL -10pF

AV = +1.0
I-- RL = 2.0 kto=
~ VO=-10Vto+l0V

z

I
-25

-

VCC; +15V
VEE = -15 V
AV= +1.0
RL=2.0kto=
V\l=-IOVtO+l0V

CL = 10,000 pF

12

~151
:~:; a.o

CL = 1,000 pF

r-- r--

-55

II

~ 12 I-- VEE = -15V
z

---r---

r--- r--

Figure 25. Gain Margin versus Temperature
16

10k

-

~=10PF
CL = 100 pF r--

:--.....

o

10 k

100
1.0 k
CL, LOAD CAPACtTANCE (pF)

,I

r--

40

w

D:

10

100
1.0 k
CL, LOAD CAPACITANCE (pF)

z

':4.0

o

I-

Figure 24. Phase Margin versus Temperature

VEE= -15 V
AV= +1.0
RL=2.0kto=
VO=-10Vto+l0V
TA = 25°C

r--- .....

10

r-

Eo
.... 10

-~

o

~

"

a:
-0:
:::;; 30

a

~ +~5 ~ I III

VEE = -15 V
AV=+1.0
RL=2.0kto 00
VO=-10Vto+l0V
TA = 25'C

1-0..,.,

~ 40

>

iD

VCC

a:

(J)

a.

fIT
w

2011:
Eo
10 ....

o

100 k

MC34071, 34072, 34074/MC35071, 35072, 35074/MC33071, 33072, 33074
Figure 27. Normalized Slew Rate
versus Temperature

~

5!!

1.1

o

~

w

~

1.05

~

...........
..............

1.0

~ 0.95
0.9
0.85
-55

10

~

tOm'!,.

~ 5.0

~
13

~

5o

0
25
50
75
TA. AMBIENT TEMPERATURE (0C)

100

125



3.5

.,;

t3w

a:

3.0

2:

z

:;;
<.>

2.5

0

:2-

z

2.0

><:>

0

1.0 IlS/DIV

Figure 31. Common Mode Rejection
versus Frequency

0
:;;
:;;
0

~:l'!:"t
I' '"

1.5

2.0IlS/DIV

w

1 -'-

VCC=+15V
VEE=-15V
AV= -1.0
TA = 25°C

Figure 30. Large Signal Transient Reponse

<:>
on

0

--I

Is. SETTLING TIME ijIs)

2:

_

-

- - - co~pe~sated
Uncompensated

.'" ~ .....

...... r--..,

~ -5.0

............ ..........

0

cc

..-V

1.0mV

C!l

Figure 29. Small Signal Transient Response

>-E

,,'
V /~V

10mVJ

o
> -10
-25

/1 ." "'1:--

<:>

w

............ ~

en

gj

>

I
VCC= +15V
VEE=-15V AV = +1.0
RL = 2.0 k
CL=500pF -

is

...:

Figure 28. Output Settling Time
~

1.15

40

"

l

I

I

="

100
TA=125°C

CMR=20Log

VCC=+15V _
VEE=-15V
VCM=OV
tNCM = ±1.5 V _

I\..

...........

"-

t.VCM~t.VO

20

""-"-

(t.VCM
- - xAOM )
t.VO

o
0.1

1.0

10

Figure 32. Power Supply Rejection
versus Frequency

100
1.0k 10k
f. FREQUENCY (Hz)

05'

:2-

z

0

~

80

U3 60

a:
~

c..
c..
::>
en

40

a:

"" "-

100k

1.0M

~
~M

-=

w

~
c..
c..

10M

+PSR =20 Log

(t.VoIAOM )
t.VCC

-PSR =20 Log

(t.VoIAOM)
t.VEE

20

a:
en
0
0.1.

t.Vo

t.VEE

1.0

10

100
1.0k 10 k
f. FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-292

100k

100M 10M

MC34071, 34072, 34074/MC35071 , 35072, 35074/MC33071 , 33072, 33074
Figure 34. Power Supply Rejection
versus Temperature

Figure 33. Supply Current versus Supply Voltage
9.0
TA= -55°C

18.0

~

!z
w
:;E

a

7.0

it
::::J

6.0

"..'

/' ./
/ V
V V
V

~

rn

to)

!:? 5.0

",

-- -i.--

~C

~

-

~

I--

£€
VCc

TA = 125°C

~DM

'/

4.0

o

-PSR =20 Log

5.0

10

15

20

25

-55

Figure 35. Channel Separation versus Frequency

111 100 _

:2.

~
~

1f.
w
en

80

-25

-l-VCC= +15V
VEE=-15V
TA=25°C

-

0
25
50
75
TA. AMBIENT TEMPERATURE (0C)

V6~= ;IN I

~ 60

r-

VEE=-15V
VCM=O
1: =25°C

~

;u- 50

...........

I,\,
!::J40
~

"'"

60

u:l

~

r-..

~ 30

a

!3

cJrrJnJ

20

i'-r--

D..

~. 10

20

c

'" o

o
20

30
50
70
f, FREQUENCY (kHz)

100

200

125

300

10

2.8

2.4@"
20

:§,

'1-

:z
w

VOllape

:z

10

100

Figure 36. Input Noise versus Frequency
70

:z 40

~

~VEE

65~--~--~----~--~--~----~--~

VCC.IVEEI. SUPPLY VOLTAGE M

120

-=-

INO

1.6

:;E

a

1.2

!ll

0.8

~
!3
D..

0.4 ~.

o
100

1.0k
10k
f. FREQUENCY (kHz)

lOOk

APPLICATIONS INFORMATION
CIRCUIT DESCRIPTION/PERFORMANCE FEATURES
Although the bandwidth, slew rate, and settling time of the
MC34071 amplifier series are similar to op amp products
utilizing JFET input devices. these amplifiers offer other
additional distinct advantages as a result of the PN P transistor
differential input stage and an all NPN transistor output stage.
Since the input common mode voltage range of this input
stage includes the VEE potential, single supply operation is
feasible to as low as 3.0 V with the common mode input
voltage at ground potential.
The input stage also allows differential input voltages up to
±44 V. provided the maximum input voltage range is not
exceeded. Specifically, the input voltages must range
between VEE and VCC supply voltages as shown by the

maximum rating table. In practice, although not
recommended. the input voltages can exceed the VCC voltage
by approximately 3.0 V and decrease below the VEE voltage
by 0.3 V without causing product damage, although output
phase reversal may occur. It is also possible to source up to
approximately 5.0 mA of current from VEE through either
inputs clamping diode without damage or latching, although
phase reversal may again occur.
If one or both inputs exceed the upper common mode
voltage limit the amplifier output is readily predictable and may
be in a low or high state depending on the existing input
bias conditions.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-293

MC34071, 34072, 34074/MC35071 , 35072, 35074/MC33071 , 33072, 33074
Since the input capacitance associated with the small
geometry input device is substantially lower (2.5 pF) than the
typical JFET input gate capacitance (5.0 pF), better frequency
response for a given input source resistance can be achieved
using the MC34071 series of amplifiers. This performance
feature becomes evident, for example, in fast settling O-to-A
current to voltage conversion applications where the feedback
resistance can form an input pole with the input capacitance
of the op amp. This input pole creates a 2nd order system with
the single pole op amp and is therefore detrimental to its
settling time. In this context, lower input capacitance is
desirable especially for higher values of feedback resistances
(lower current OACs). This input pole can be compensated for
by creating a feedback zero with a capacitance across the
feedback resistance, if necessary, to reduce overshoot. For
2.0 kQ of feedback resistance, the MC34071 series can settle
to within 1/2 LSB of 8 bits in 1.0 Ils, and within 1/2 LSB of
12-bits in 2.2 Ils for a 10 V step. In a inverting unity gain fast
settling configuration, the symmetrical slew rate is ±13 V/Ils.
In the classic non inverting unity gain configuration the output
positive slew rate is + 10 V/JlS, and the corresponding negative
slew rate will exceed the positive slew rate as a function of the
fall time of the input waveform.
Since the bipolar input device matching characteristics are
superior to that of JFETs, a low untrimmed maximum offset
voltage of 3.0 mV prime and 5.0 mV downgrade can be
economically offered with high frequency performance
characteristics. This combination is ideal for low cost
precision, high speed quad op amp applications.
The all NPN output stage, shown in its basic form on the
equivalent circuit schematic, offers unique advantages over
the more conventional NPN/PNP transistor Class AB
output stage. A 10 kQ load resistance can swing within 1.0 V
of the positive rail (VCC), and within 0.3 V of the negative
rail (VEE), providing a 28.7 Vp _p swing from ±15 V supplies.
This large output swing becomes most noticeable at lower
supply voltages.
The positive swing is limited by the saturation voltage of the
current source transistor 07, and VBE of the NPN pull up
transistor 017, and the voltage drop associated with the short
circuit resistance, R7. The negative swing is limited by the
saturation voltage of the pull-down transistor 01S, the voltage
drop ILRS, and the voltage drop associated with resistance R7,
where IL is the sink load current. For small valued sink
currents, the above voltage drops are negligible, allowing the
negative swing voltage to approach within millivolts of VEE.
For large valued sink currents (>5.0 mAl, diode 03 clamps the
voltage across RS, thus limiting the negative swing to the
saturation voltage of 01S, plus the forward diode drop of 03
(~VEE +1.0 V). Thus for a given supply voltage,
unprecedented peak-to-peak output voltage swing is possible
as indicated by the output swing specifications.
If the load resistance is referenced to VCC instead of ground
for single supply applications, the maximum possible output
swing can be achieved for a given supply voltage. For light
load currents, the load resistance will pull the output to VCC

during the positive swing and the output will pull the load
resistance near ground during the negative swing. The load
resistance value should be much less than that of the
feedback resistance to maximize pull up capability.
Because the PNP output emitter-follower transistor has
been eliminated, the MC34071 series offers a 20 mA minimum
current sink capability, typically to an output voltage of (VEE
+ 1.8 V). In single supply applications the output can directly
source or sink base current from a common emitter NPN
transistor for fast high current switching applications.
In addition, the all NPN transistor output stage is inherently
fast, contributing to the bipolar amplifier's high gain bandwidth
product and fast settling capability. The associated high
frequency low output impedance (30 Q typ@ 1.0 MHz) allows
capacitive drive capability from 0 pF to 10,000 pF without
oscillation in the unity closed-loop gain configuration. The SOo
phase margin and 12 dB gain margin as well as the general
gain and phase characteristics are virtually independent ofthe
source/sink output swing conditions. This allows easier
system phase compensation, since output swing will not
be a phase consideration. The high frequency characteristics
of the MC34071 series also allow excellent high
frequency active filter capability, especially for low voltage
single supply applications.
Although the single supply specifications is defined at 5.0 V,
these amplifiers are functional to 3.0 V @ 25°C although slight
changes in parametrics such as bandwidth, slew rate, and DC
gain may occur.
If power to this integrated circuit is applied in reverse polarity
or if the IC is installed backwards in a socket, large unlimited
current surges will occur through the device that may result in
device destruction.
Special static precautions are not necessary for these
bipolar amplifiers since there are no MOS transistors on
the die.
As usual with most high frequency amplifiers, proper lead
dress, component placement, and PC board layout should
be exercised for optimum frequency performance. For
example, long unshielded input or output leads may result in
unwanted input-output coupling. In order to preserve the
relatively low input capacitance associated with these
amplifiers, resistors connected to the inputs should be
immediately adjacent to the input pin to minimize additional
stray input capacitance. This not only minimizes the input pole
for optimum frequency response, but also minimizes
extraneous "pick up" at this node. Supply decoupling with
adequate capacitance immediately adjacent to the supply pin
is also important, particularly over temperature, since many
types of decoupling capacitors exhibit great impedance
changes over temperature.
The output of anyone amplifier is current limited and thus
protected from a direct short to ground. However, under such
conditions, it is important not to allow the device to exceed the
maximum junction temperature rating. Typically for ±15 V
supplies, anyone output can be shorted continuously to
ground without exceeding the maximum temperature rating.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-294

MC34071, 34072, 34074/MC35071 , 35072, 35074/MC33071 , 33072, 33074
TYPICAL SINGLE SUPPLY APPLICATIONS VCC = 5.0 V
Figure 37. AC Coupled Noninverting Amplifer

Figure 38. AC Coupled Inverting Amplifier

t

VCC

UV.

5.1M

o

VCC

3.7 Vp.p

t

100k

loOM

20k

~
11 ~

MC34071

,~ ~.,,, ~ 1;

-= fs.smvp-p
vin 'V

Cin

•'00'

BW (-3.0dB) = 45 kHz

MC34071

vo

~RL

10k

Co
370mVp•p

10k

AV = 10BW (-3.0dB) = 450 kHz

-=

Figure 39. DC Coupled Inverting Amplifer
Maximum Output Swing

Figure 40. Unity Gain Buffer TTL Driver

_t

V~
2.63V

MC54/74XX

r------ Vref

Figure 47. ACIDC Ground Current Monitor

Figure 48. Photovoltaic Cell Amplifier

Iload

MC34071

MC34071
Icelll

Va
Ground Current
Sense Resistor

>---<1>---0 Va

RS
Rl
R2

t

I

1

1

1.0V

J

(R-2R) ladder Network

Va

Va; Iload RS (1+

:~ )

VCell; OV
Va; ICell RF
Va> 0.1V

For Va > O.lV
BW ( -3.0 dB) ; GBW ( R1R:R2 )

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-296

MC34071, 34072, 34074/MC35071, 35072, 35074/MC33071, 33072, 33074
Figure 49. Low Input Voltage Comparator
with Hysteresis

Figure 50. High Compliance Voltage to
Sink Current Converter

1

R2
Vrel

lout

MC34071

Rl

Yin
Rl
VinL = Rl+R2 (VOL-Vref}+Vrel

R

Vin±VIO
lout= - R -

Rl
VinH = Rl+R2 (VOH-Vrel)+Vrel
Rl
VH = Rl+R (VOH -VaLl

Figure 52. Bridge Current Amplifier

Figure 51. High Imput Impedance
Differential Amplifier
Rl

+Vrel

R2

Va

:~

=

:~

Va = 1 (+

(Critical to CMRR)

:~

) (V2-Vl

AR«R

:~ )

Rf»R

(Va" O.1V)

For (V2 "VI), V> 0

Figure 54. High Frequency Pulse
Width Modulation

Figure 53. Low Voltage Peak Detector

IOSC '" 0.85
RC

MC34071

- - ISC
+~B
+

o
-

I

t

..... Base Charge
Removal

+

Vp

10,OOOpF

lOOk

V+
lOOk

47k

OSC

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-297

Comparator

High Current
Output

MC34071, 34072, 34074/MC35071, 35072, 35074/MC33071, 33072, 33074
GENERAL ADDITIONAL APPLICATIONS INFORMATION Vs
Figure 55. Second Order Low-Pass Active Filter

Figure 56. Second Order High-Pass Active Filter

1
~~

Rl

R2
5.6K

R3
510

560

= ±15.0 V

o---j

Cl
1.0

Cl
1.0

R2
1.1k

10= 100Hz
Ho=20

10 = 1.0 kHz
Ho= 1.0
Choose: 10• Ho. Cl

Choose: 10• Ho. C2
Then: Cl = 2C2 (Ho+l)
..[2
R2= 4ltfoC2

R2
Rl= Ho

82

R3 = Ho+l

Figure 57. Fast Settling Inverter

Then: Rl =

Ho+0.5
ltfoCl..[2

R2=

..[2
2ltfoCl (1/Ho+2)

C2=

..2..
Ho

Figure 58. Basic Inverting Amplifier

Vo = 10V
Step
2.0k

Uncompensated {

Compensated

{

Vo
R2
[ Rl -J
Vin = AI BW (-3.0 dB) = GBW Rl +R2

Is = LOllS
to 1/2 LSB (a·Bits)
1s=2.2Ils
to 1/2 LSB (12·Bits)

SR = 13 V/IlS

SR = 13V/1lS

·Optional Compensation

Figure 60. Unity Gain Buffer (AV = +1.0)

Figure 59. Basic Noninverting Amplifier
MC34071

.-------1+

'>--.......-..._-0 Vo

[OVO

R2

Rl
Vo =
Vin

BWp = 200 kHz
Vo = 20 Vp•p
SR = 10V/1lS

(1 + ~)
Rl

BW (-3.0 dB) = GBW [ R1R:R2]

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-298

MC34071, 34072, 34074/MC35071 , 35072, 35074/MC33071 , 33072, 33074
Figure 61. High Impedance Differential Amplifier

MC34074

R

R

R

MC34074

>---_-0 Va
R
MC34074

R

R

Example:
Let:R=RE=12k
Then: AV = 3.0
BW = 1.5 MHz

Figure 62. Dual Voltage Doubler
+V a

r<

MC34074

f-2-

lOOk

I

MC34074

~
lOOk
MC34074

+Va

-Va

18.93

-18.78

10k

18

-18

5.0k

15.4

-15.4

RL

RL

10

r<

+10

220pF

+
~:'

0

+

~

1

10

RL

0

100k

r<
-Va

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-299

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

MC34080/MC35080
thru
MC34085/MC35085
HIGH PERFORMANCE
JFETINPUT
OPERATIONAL AMPLIFIERS

High Slew Rate, Wide Bandwidth,
JFET Input Operational Amplifiers
These devices are a new generation of high speed JFET input monolithic
operational amplifiers. Innovative design concepts along with JFETtechnology
provide wide gain bandwidth product and high slew rate. Well matched JFET
input devices and advanced trim techniques ensure low input offset errors and
bias currents. The all NPN output stage features large output voltage swing, no
dead band crossover distortion, high capacitive drive capability, excellent phase
and gain margins, low open-loop output impedance, and symmetrical
source/sink AC frequency response.
This series of devices are available in fully compensated or decompensated
(AVCL:>2) and are specified over commercial or Military temperature ranges.
They are pin compatible with existing Industry standard operational amplifiers,
and allow the designer to easily upgrade the performance of existing designs.
• Wide Gain Bandwidth:

8.0 MHz for Fully Compensated Devices
16 MHz for Decompensated Devices

• High Slew Rate:

25 V/IlS for Fully Compensated Devices
50 V/IlS for Decompensated Devices

• High Input Impedance: 1012g
• Input Offset Voltage: 0.5 mV Maximum (Single Amplifier)

•
1

PSUFFIX
PLASTIC PACKAGE
CASE 626
DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

8~
1

PIN CONNECTIONS
Offset Null

1

Inv. Input
Noninv. Input

2

7

3

6

Vee
Output

VEE

4

5

Offset Null

• Large Output Voltage Swing: -14.7 V to +14 V for
VCCNEE = ±15 V
• Low Open-Loop Output Impedance: 30 g @ 1.0 MHz
•

USUFFIX
CERAMIC PACKAGE
CASE 693

L-_----'

(Single, Top View)

Low THO Distortion: 0.01 %

Outputl

1

• Excellent Phase/Gain Margins: 55°17.6 dB for Fully Compensated Devices
Inputs 1 {: -

ORDERING INFORMATION
OpAmp
Function
Single
Dual
Quad

VEE

Fully
Compensated

AVCL;;:2
Compensated

Temperature
Range

MC35081BU

MC35080BU

- 55° to +125°C

MC34081BD
MC34081BP
MC34082P

Ceramic DIP
SO-8

0° to +70°C

Plastic DIP
Plastic DIP

MC35084L

MC34080BD
MC34080BP
MC34083P
MC35085L

- 55° to +125°C

Ceramic DIP

MC34084DW
MC34084P

MC34085DW
MC34085P

0° to +70°C

SO-16L
Plastic DIP

Package

4L-_---'

(Dual, Top View)

PSUFFIX
PLASTIC PACKAGE
CASE 646

PIN CONNECTIONS

DWSUFFIX
PLASTIC PACKAGE
CASE 751G
(SO-16L)
(Quad, Top View)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-300

-

LSUFFIX
CERAMIC PACKAGE
CASE 632

MC34080, MC35080 Series
MAXIMUM RATINGS
Rating

Symbol

Value

Unit

Vs

+44

V

VI DR

(Note 1)

V

Input Voltage Range

VIR

(Note 1)

V

Output Short Circuit Duration (Note 2)

tsc

Indefinite

sec

Operating Ambient Temperature Range
MC35XXX
MC34XXX

TA

Operating Junction Temperature
Ceramic Package
Plastic Package

TJ

Supply Voltage (from VCC to VEE)
Input Differential Voltage Range

°c
-55 to +125
o to +70
°C
+165
+125

Storage Temperature Range
Ceramic Package
Plastic Package

°C

Tstg
-65to+165
-55to+125

NOTES: 1. Either or both input voltages must not exceed the magnitude of VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature
(TJ) is not exceeded.

Equivalent Circuit Schematic
(Each Amplifier)
---------------4~----------------~----------~~------.-----------~VCC

200!J.A

Inputs {

: 0-------1--------------+------'

Cc
3.0
pF

500

300!J.A

Null Adjust
(MC34080, 081)*
*Pins 1 & 5 (MC34080,081) should not be directly grounded or connected to Vee.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-301

R7
66k

MC34080, MC35080 Series
DC ELECTRICAL CHARACTERISTICS (VCC = + 15 V, VEE = -15 V, TA = Tlow to Thigh [Note 3), unless otherwise noted.)
Characteristics

Symbol

Input Offset Voltage (Note 4)
Single
TA=+25'C
TA = 0° to +70°C (MC34080B, MC34081B)
TA = -55° to +125°C (MC35080B, MC35081B)
Dual
TA = +25°C
TA = 0° to +70°C (MC34082, MC34083)
Quad
TA = +25°C
TA = 0° to +70°C (MC34084, MC34085)
TA = - 55° to + 125°C (MC35084, MC35085)

Min

Typ

Max

-

Average Temperature Coefficient of Offset Voltage

8Vlot8T

Input Bias Current (VCM = 0 Note 5)
TA = +25'C
TA = 0° to +70°C
TA = - 55° to +125°C

liB

Input Offset Current (VCM = 0 Note 5)
TA = +25'C
TA = 0' to +70'C
TA = -55° to +125°C

110

0.5

AVOL

Output Voltage Swing
RL = 2.0 k, TA = +25°C
RL = 10 k, TA = +25'C
RL = 10 k, TA = Tlow to Thigh

VOH

RL = 2.0 k, TA = +25°C
RL = 10 k, TA = +25'C
RL = 10 k, TA = Tlow to Thigh

VOL

-

1.0

-

6.0

3.0
5.0

-

-

-

-

12
14
15

10

-

0.06

-

-

-

0.02

-

25
15

-

nA

0.1
2.0
25

nA

V

-

-

-14.1
-14.7

-

-

-13.5
-14.1
-14.0
rnA

ISC
20
20

31
28

-

V

(VEE +4.0) to
(VCC-2.0)

VICR

Common Mode Rejection Ratio (RS ~ 10k, TA = +25°C)

CMRR

70

90

-

PSRR

70

86

-

n. TA = 25°C)

Power Supply Current
Single
TA = +25°C
TA = Tlow to Thigh
Dual
TA = +25°C
TA = Tlow to Thigh
Quad
TA = +25°C
TA = Tlow to Thigh
NOTES: (continued)
3. Tlow =

-

2.5

3.4
4.2

-

4.9

6.0
7.5

9.7

11
13

-

MC350BOB
Tlow = O"C for MC340BOB
Thigh = + 125'C for MC350BOB
Thigh
MC350B1B
MC350B1B
MC340B1B
MC350B4
MC340B4
MC350B4
MC350B5
MC350B5
MC340B5
4. See application information for typical changes in input offset voltage due to solderability and temperature cycling.
5. Limits at TA = +25'C are guaranteed by high temperature (Thigh) testing.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-302

dB
dB

rnA

ID

- 55'C for

V/mV

-

13.7
13.9

Input Common Mode Voltage Range
TA = +25°C

Power Supply Rejection Ratio (RS = 100

IlV/'C

0.2
4.0
50

-

80

13.2
13.4
13.4

Output Short Circuit Current (TA = +25°C)
Input Overdrive = 1.0 V, Output to Ground
Source
Sink

2.0
4.0
4.0

-

-

Large Signal Voltage Gain (Va = ±10 V, RL = 2.0 k)
TA = +25'C
TA = Tlow to Thigh

Unit
mV

Via

-

-

+70°C for MC340BOB
MC34081B
MC34084
MC340B5

MC34080, MC35080 Series
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = - 15 V, TA = +25°C, unless otherwise noted.)
Characteristics
Slew Rate (Vin = -10 V to +10 V, RL = 2.0
Compensated AV=+1.0
AV =-1.0
Decompensated AV = +2.0
AV =-t.o

k.Q,

Symbol

CL = 100 pF)

Min

Typ

SR

-

-

25
30
50
50

-

0.72
1.6

-

6.0
12

8.0
16

-

-

400
800

-

-

55
39

-

-

7.6
4.5

-

20

40

Settling Time (10 V Step, AV = -1.0)
To 0.10% (±1/2 LSB of 9-Bits)
To 0.01 % (±1/2 LSB of 12-Bi15)

ts

Gain Bandwidth Product (f = 200 kHz)
Compensated
Decompensated

GBW

Power Bandwidth (RL = 2.0 k, Vo = 20 Vp _p, THD = 5.0%)
Compensated AV = +1.0
Decompensated AV = - 1.0

BWp

Max

Unit
V/l1S

-

l1s

MHz

kHz

Phase margin (Compensated)
RL = 2.0 k
RL = 2.0 k, CL = 100 pF

.pm

Gain Margin (Compensated)
RL= 2.0 k
RL = 2.0 k, CL = 100 pF

Am

Equivalent Input Noise Voltage
RS = 100 Q, f = 1.0 kHz

en

-

30

-

nV/-v'HZ

Equivalent Input Noise Current (f = 1.0 kHz)

In

-

0.Q1

-

pAl-v'HZ

Input Capacitance

Ci

-

5.0

-

pF

Input Resistance

fj

-

1012

-

Q

THD

-

0.05

-

%

-

-

120

-

dB

35

-

Q

Total Harmonic Distortion
AV = +10, RL = 2.0 k, 2.0 S Vo S 20 Vp _p, f = 10 kHz
Channel Separation (f = 10kHz)
Open-Loop Output Impedance (f = 1.0 MHz)

2:
w


VfE - .

o
-55

~/

ffi t.Ok

z

a:

VCcNEE=±15V
VCM=OV

~
:::>

3.0

§! 2.0

o

dB

Figure 2. Input Bias Current
versus Temperature

~v~c

J.

Degrees

-25

o
25
50
75
TA, AMBIENT TEMPERATURE (OC)

100

125

100
10

1.0
-55

--25

V
~

o
25
50
75
TA, AMBIENT TEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-303

/

/"

100

125

MC34080, MC35080 Series
Figure 3. Input Bias Current versus
Input Common Mode Voltage
140

~ 120 r--

Figure 4. Output Voltage Swing
versus Supply Voltage
50

I
VccJVEE d15 V
TA= 25°C

1:
c:.

!z

~ 100

I

a:

::::>

o
~

C!l

40

w

30

:z
~
en

I

C!l

80

'" 60
~

0

>

./

I-

~

D..

I-

::::>
0

!!l 40

20
-12

20

::::>

./

~
-8.0
-4.0
0
4.0
8.0
VIC, INPUT COMMON MODE VOLTAGE M

12

V~C)

w

~

g -1.0 .....
>
~

-

o
o

'<

±5.0

"'~

±10
±15
±20
VCC IVEEI, SUPPLY VOLTAGE M

o
VCC

,

~

/' ~

~ -2.0
!::J
~

r-.

::::>

RL = 2.0 k

./

w

Source

_ VCcNEE=+15Vto+22V
TA = 25°C

~ -2.0

r

±25

Figure 6. Output Saturation vesus
Load Resistance to Ground

:1!:

l

A

A P'"

/

10

Figure 5. Output Saturation versus
Load Current

:1!: 0

/.

r
RL=10k -'"

!:§

/

;;!;

RL Connected to Ground
TA= 25°C

"

:z
~ -4.0

IllWll

I

I 1111111

I

VCcNEE = ±15 V
TA= 25°C

== !~:lllllll.111111111 ~
.........

lJ 111111

I

[EEEEf
f
J oL3:i:f3E)=-+l--±±J+--+------i
Sink

o

4.0

8.0
It.. LOAD CURRENT (±mA)

12

16

300

Figure 7. Output Saturation versus
Load Resistance to VCC

3.0 k
30 k
RL, LOAD RESISTANCE TO GROUND (0)

300 k

Figure 8. Output Short Circuit Current
versus Temperature

1 40
!z
w
a:

1::WlIIII111111111Il1t1
::::>

'<
en

O~

2.0
1.0

o

300

i'
VfEi+

!:::

13
a:

V

/'" r--: c::-...
Sink"-

C3 20
en
~

~
1il

300k

-

r---::::: :--...

-55

-

r---::::: t--....

l

0

-25

0
25
50
75
TA, AMBIENT TEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-304

Source

VCcNEE=±15V RLSO.l0
AVin = 1.0 V

10

o

r-I--

3.0k
30k
Rt.. LOAD RESISTANCE TO VCC (0)

30

I;:
~

I I
IVI
C EE=+15
RLtoVCC
TA = 25°C

11111111
1v'~1111

['..

!5
o

I

100

125

MC34080, MC35080 Series
Figure 9. Output Impedance versus Frequency
80

Figure 10. Output Impedance versus Frequency
80.-.-rn~W--'TTTITm--'''~TIr-'-'rIT~

VdCN~~ ~ ~~5 V

VccNEE=~15V

VCM =0
vo=o
lilO = ±0.5 mA
TA = 25°C
Compensated
Units Only

c:

;;;- 60
o
z

C3
w

~ 40
f::::J

9LU

o
z

020
6

C3
0..

~

10 k

AVi:U

I

AV=100 ~
t~;;;> .J.U+V

1.0 k

'l
~20r--r+7~~~--~rr~M~~~-H~~-r~+H~
,.
/
o

/'

i,.....---~

lOOk
f, FREQUENCY (Hz)

'~lJ
1.0M

40

N

o

10M

Compensated
Units AV = +1.0

16

0.5

f-

VCcNEE=±15V
Vo = 2.0 Vp_p
~ 0.3 H4-t+HtItt-+++++H'ttt-+f-tfRL = 2.0 k
TA=25°C
f'Compensated

B
~

"\.

8.0

"\.
"\.

6> 4.0
o

1.0M
I, FREQUENCY (Hz)

~y, = 100

0.2

...J

o~~~~~~~~A~v_-~1.~O*-L~~llL~~~~
10M

10

100

1.0 k
I, FREQUENCY (Hz)

Figure 13. Open-Loop Voltage Gain
versus Temperature
z

~

LOB

t'--.

w
(!l

~ @ 1.04

~~

0..«

0::;;;

o a: 1.00

-:'0
ZZ

W'"

II

""'-

'""'"

VCcNEE=±15V VO=-10Vto+l0V _
RL = 10 k
1510Hz
-

-- --

-............

0..'C

O. -

0.96

..J

J

0.92
-55

-25

Units Only

g0.1 H~++t+tJfH-H--H...l-A,u~..u1I=.\...ll O++t-+Ht+t-++-H-t+1-tItI

"
"'

lOOk

;=~~::rTT1"Itt-'---+rTH--"--~~rrIJrm11116-00:1::~nn!IIItt-llllllrT;II~II-tT1I;I;

~

{'nits AV = -1.0

10 k

10M

o

~ 12

~

1.0M

~ 0.4 ~:t:t!:j:j:p~1:!:::!:I:mm:+~:j::I:t:m~t:l:tlm

~ Decompensated

!:3
ir

100 k

Figure 12. Output Distortion versus Frequency

VCcNEE +15V
RL = 2.0 k
THO = 1.0%
TA = 25°C

1\

~ 20

iJ5
lli

10 k

AV=2.0

I, FREQUENCY (Hz)

28

2:-

~ ~VI=ll~~P' I~.

1.0 k

Figure 11. Output Voltage Swing
versus Frequency

%:24

+4~~~4-~~~-r++~ffi

f::::J

.,..-,::;

o
1.0

10

100 1.0k

iJ)

w
w
a:

45

(!)

LJ.J

e.

10k

100k

~.

1.0M

VCcNEE = ±15 V
VO=OV
Phase
TA = 25°C
Margin
I I = 54°
. 1! I I
1 - Gain, RL = 2.0 k
2 -Gain, RL = 2.0 k, CL = 100 pF
3 - Phase, RL = 2.0 k
4- Phase, RL = 2.0 k, CL = 100 pF
Compensated Units Only

w

0

a. -10
0

Z -20
w
a.

"9-

180

li \

10M

.....

0

9

is -30
>

<1:

-40

1.0

100M

2.0

3.0

5.0

Figure 16. Open-Loop Voltage Gain and
Phase versus Frequency
iii' 20

~

I

rSi--....
I

z:

~ 10

VCcNEE = ±15 V ~
VO=OV
TA=25°C
Phase
I
I Margin
I I = 43°
I
I
I I
1 - Gain, RL = 2.0 k
2 - Gain, RL = 2.0 k, CL = 100 pF
3 - Phase, RL = 2.0 k
4 - Phase, RL = 2.0 k, CL = 100 pF
Decompensated Units Only

(!)

~

:-.

~

g; -10
9

. t5 -20
0..

o

5-30

>

<1:

-40

1.0

2.0

3.0

"'"""-l.

fIT
w

-

e.

140 ~

1\ ......

:J:

160

e;
(J)

w

o
180 (jJ

,~

\

\

200

1\

5.0 7.0 10
t, FREQUENCY (Hz)

f-

0
0

20

30

50

o

~

c..

~
~

z: 40
w
0
a:
w
a.
20

~

~

1.00

--

r-

...............

0.90

...............

o

10

I...............

';£ 0.80
-55

ffi

-25

0
25
50
75
TA, AMBIENT TEMPERATURE (OC)

w
w
a:

60

LJ.J

50

Compensated
UnitsAv=+1.0

I
~

125

w

<1:

:J:
0..

::ii;
"9-

rr-- r-

40
30
20

'""'-

Deco~pensated

"

"'- ..... r--.,

Unrts AV = +2.0

10
10

'\

111111
100
CL, LOAD CAPACITANCE (pF)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-306

g

r---

o

1.0k

I
RL = 2.0 k to 00
",VO = 100 mVp_
VO=-10Vto+1 V
TA = 25°C

~nitsAV=+1.0

<1:

:;

VCcNEE=±15V RL = 2.0 k
",VO = 100 mVp_~ VO=-10Vto+10V _
TA = 25°C

100
CL, LOAD CAPACITANCE (pF)

100

~C~EE~~1N

I I I

Compensated

(J)

~I--"

50

~

~

C!l

",

/'

..........

30

~
I
VCcNEE=±15V _
RL = 2.0 k

'"z:

e.
z
aa:

./
VI'"

<>-

Figure 19. Phase Margin versus
Load Capacitance

V

(J)

a: 60
LJ.J

180 (jJ
200

\
20

...............

~

c

oa:

iJ)

:J:

6f-

'\
3

4\

a:

70

V

80

-"

w

o

~

,~

o
~ 1.10 ...............

I I I 1111
Decompensated
Units AV = +2.0

0..

......

:;

Figure 18. Percent Overshoot versus
Load Capacitance
100

'"

:J:

160~

~ 1.20
~

Margin - 120 ffi
=5.5dB_
w

~

-,
\ \

\

~ 1

'.\ '\
10

w

Figure 17. Normalized Gain Bandwidth
Product versus Temperature

6'
100

Gai~

•I

......

I~~

LJ.J

7.0

...........:t..
\

\

LJ.J
LJ.J

120 ffi

-

Margin e.
-7.6dB- 140~

t

\

100_
en

t, FREQUENCY (Hz)

t, FREQUENCY (Hz)

:E.

I
I
G .1
aln

I~''''''

~

en
en

I

. :::1' ......

10

(!)

>

135~

,\

~,

z
;;;:
(!)
w

~
90 :J:
0..

[\

~~::::::.~
~"'

:E.

LJ.J

w
a.

<1:

0

Gain

~ ==....

a.

9

,

~

20

iii'

VCcNEE = ±15 V
Vo =OV
RL = 2.0 k
TA = 25°C

,

1.0k

MC34080, MC35080 Series

Figure 21. Phase Margin versus Temperature

Figure 20. Gain Margin versus Load Capacitance
10

~

I - .....
i'O 8.0
s

z

~ 6.0

r--

:Ii
z

~ 4.0

I II I I

Compensated
Units AV = +1.0

-

......... 1'-...

r--.

E

60r---,----,----,----r---,----,----,

I-- _ VCcNEE = ±15 V
RL = 2.0 kto =
I-- - !'J.VO = 100 mVp_

g

VO=-10Vto+l V
TA = 25°C

'~
.......

Decompensated .......
Units AV = +2.0



.,;

Cl

Cl

E

E

<:>

'"

0.2J.!s/Div

0.5J.!s/Div

MC34085 Transient Response
AV

= +2.0, RL = 2.0 k, VCCNEE =±15 V, TA = 25°C

Figure 26. Small-Signal

Figure 27. Large-Signal

.2:

.2:

:;-

:;-

<:>

.,;

Cl

Cl

0

E
<>

E

'"

0.2J.!S/Div

0.5 J.!S/Div

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-308

MC34080, MC35080 Series
Figure 28. Common Mode Rejection Ratio
versus Frequency
10

![ 100

~

~. TA=-55°C

o
TA = 25°C
~
~ 80 t-- TA - 125°C

~,

o

t3

'"
UJ

40

~'O

z

o

:2

20

c.J

rr:
§
c.J

0
0.1

10

1.0

&l

1.0k

10k

"-

80

U3

'""~

lOOk

60

~o,

"-

K,

=:J

Compensated Units AV = +1.0 ~
Decompensated Units AV = +2.0

100

1.0M

~

40

~"-

20

_

",-

en
en

"-

10M

= '=

o

0.1

10

1.0

t3

U3

~ 90

a.
"-

--

15"-

-

i )"

~CeNEE-1- +15 V

::i

«

-25

25

~

100

'"'"
~
""-

-

en

Compensated Units AV = +1.0
Decompensated Units AV = +2.0

I

0
c.J

75

I

±10
±15
VS, SUPPLY VOLTAGE (V)

±5.0

'":;.s.

III

80

UJ
(!J

80

!30

60

(5

40

>
UJ
en

60

...J
UJ

z 40
z
«
VCCNEE=±15V
:r:
c.J
20 TA = f5°? I I I 1111---+--+-+-i+t+t+---I-+-H-f-tHj

1\

:\

r-

Z
=:J

"-

~

20

co

'"
1.0M

ITT

VCeNEE = ±15 V
VCM =0
TA = 25°C

I-

II III
lOOk

±25

±20

IIIII

I~

I

10M

Figure 33. Spectral Noise Density

~

°10k

I

100

z

en

'"

~

1.0M

TA - -55°C

o

125

100

10 100

UJ

lOOk

00

0.80 -

=:J

Figure 32. Channel Separation versus Frequency

'"w"-

10k

TA ~ 25°C
Supply Current
Normalized to
VCCNEE = ±15 V, TA = 25°C
RL =
VO~O

0.90 -

=:J
c.J

120 '-"""",,!;::rTTnn--r-r-rrnn.---r-T1'TTITn

~

1.0k

I'\.

1.00

z

TA, AMBIENT TEMPERATURE (OC)

0

Negative "sUPPll Y

J- TA _ 125°C

UJ

I.
50

'\.

'"

I-

0.70

70_ 55

'" ,

0

0

Supply

- -

Positive _
Supply

1.10

:2

t.VS=3.0V
Vo =OV
t< 10 Hz

- I - - Positive

--

= = VEE ± ilVEE

N

-1--1---

Vo

+

80

rr:
en
~

-

~ee

=:J

en

ffi

-

UJ

UJ

I. _

I'\.

1.20

i5'

Negative
S I uppy

"'-'\

Figure 32. Normalized Supply Current
versus Supply Voltage

~110

'"0100

'-

t, FREQUENCY (Hz)

Figure 30. Power Supply Rejection Ratio
versus Temperature

o
~
z

.........
~

VEE ± ilVEE

t, FREQUENCY (Hz)

10

I
I
VCeNEE = ±15 V
t.VS = 3.0V
VO=OV
TA = 25°C

~ 100

o

~

__ VEE±ilVEE -

120

;:::

"",,"\

Vee ± ilVee

Cl

15

o
~

VCeNEE = ±15 V
t.VS=3.0V
Vo= OV

~

~ 60

§l

Figure 29. Power Supply Rejection Ratio
versus Frequency

10 M

o

10

100

1.0 k

t, FREQUENCY (Hz)

t, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-309

10 k

100 k

MC34080, MC35080 Series
APPLICATIONS INFORMATION

The bandwidth and slew rate of the MC340S0 series is
nearly double that of currently available general purpose JFET
op-amps. This improvement in AC performance is due to the
P-channel JFET differential input stage driving a
compensated miller integration amplifier in conjunction with
an all NPN output stage.
The all NPN output stage offers unique advantages over the
more conventional NPN/PNP transistor Class AB output
stage. With a 10k load resistance, the op amp can typically
swing within 1.0 V of the positive rail (VCC), and within 0.3 V
of the negative rail (VEE), providing a 2S.7 pop swing from
±15 V supplies. This large output swing becomes most
noticeable at lower supply voltages. If the load resistance is
referenced to VCC instead of ground, the maximum possible
output swing can be achieved for a given supply voltage. For
light load currents, the load resistance will pull the output to
VCC during the positive swing and the NPN output transistor
will pull the output very near VEE during the negative swing.
The load resistance value should be much less than that of the
feedback resistance to maximize pull-up capability.
The all NPN transistor output stage is also inherently
fast, contributing to the operation amplifier's high
gain-bandwidth product and fast settling time. The associated
high frequency output impedance is 50 n (typical) at s.o MHz.
This allows driving capacitive loads from 0 pF to 300 pF
without oscillations over the military temperature range, and
over the full range of output swing. The 55°C phase margin
and 7.6 dB gain margin as well as the general gain and phase
characteristics are virtually independent of the sink/source
output swing conditions. The high frequency characteristics of
the MC340S0 series is especially useful for active
filter applications.
The common mode input range is from 2.0 V below the
positive rail (Vec) to 4.0 V above the negative rail (VEE). The
amplifier remains active if the inputs are biased at the positive
rail. This may be useful for some applications in that single
supply operation is possible with a single negative supply.
However, a degradation of offset voltage and voltage gain
may result.
Phase reversal does not occur if either the inverting or
non inverting input (or both) exceeds the positive common
mode limit. If either input (or both) exceeds the negative
common mode limit, the output will be in the high state. The

input stage also allows a differential up to ±44 V, provided the
maximum input voltage range is not exceeded. The supply
voltage operating range is from ±5.0 V to ±22 V.
For optimum frequency performance and stability careful
component placement and printed circuit board layout should
be exercised. For example, long unshielded input or output
leads may result in unwanted input-output coupling. In order
to reduce the input capacitance, resistors connected to the
input pins should be physically close to these pins. This not
only minimizes the input pole for optimum frequency
response, but also minimizes extraneous "pickup" at
this node.
Supply decoupling with adequate capacitance close to the
supply pin is also important, particularly over temperature,
since many types of decoupling capacitors exhibit large
impedance changes over temperature.
Primarily due to the JFET inputs of the op amp, the input
offset voltage may change due to temperature cycling and
board soldering. After 20 temperature cycles (-55° to 165°C),
the typical standard deviation for input offset voltage is 5591.1V
and 4731.1V in the plastic and ceramic packages respectively.
With respect to board soldering (260°C, 10 seconds) the
typical standard deviation for input offset voltage is 5251.1V and
2271.1V in the plastic and ceramic package respectively.
Socketed plastic or ceramic packaged devices should be
used over a minimal temperature range for optimum input
offset voltage performance.
Figure 34. Offset Nulling Circuit

Vee
o-____3=-j

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-310

7

MOTOROLA

SEMICONDUCTOR------

MC34181,2,4
MC33181,2,4

TECHNICAL DATA

LOW POWER
JFETINPUT
OPERATIONAL AMPLIFIERS

Low Power, High Slew Rate,
Wide Bandwidth, JFET Input
Operational Amplifiers
Quality bipolar fabrication with innovative design concepts are employed forthe
MC3318112/4, MC34181/2/4 series of monolithic operational amplifiers. This
JFET input series of operational amplifiers operate at 210 IlA per amplifier and
offer 4.0 MHz of gain bandwidth product and 10 V/IlS slew rate. Precision
matching and an innovative trim technique of the single and dual versions provide
low input offset voltages. With a JFET input stage, this series exhibits high input
resistance, low input offset voltage and high gain. The all NPN output stage,
characterized by no dead band crossover distortion and large output voltage
swing, provides high capacitance drive capability, excellent phase and gain
margins, low open-loop high frequency output impedance and symmetrical
source/sink AC frequency response.
The MC33181/2/4, MC34181/2/4 series of devices are specified over the
commercial, or industrial/vehicular temperature ranges. The complete series of
single, dual and quad operational amplifiers are available in the plastic DIP as well
as the SOIC surface mount packages.

•
1

P SUFFIX
PLASTIC PACKAGE
CASE 626

o SUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

PIN CONNECTIONS
Offset Null

1

• Low Supply Current: 210 IlA (Per Amplifier)

L -_ _-"

7

Vee

6

Output

5 Offset Null

(Single, Top View)

• Wide Supply Operating Range: ±1.5 V to ±18 V
• Wide Bandwidth: 4.0 MHz

Output 1

1

• High Slew Rate: 10 V/IlS

8

Vee

7

Output 2

• Low Input Offset Voltage: 2.0 mV
• Large Output Voltage Swing: -14 V to +14 V (with ±15 V Supplies)
• Large Capacitance Drive Capability: 0 pF to 500 pF

(Dual, Top View)

• Low Total Harmonic Distortion: 0.04%
• Excellent Phase Margin: 67°
• Excellent Gain Margin: 6.7 dB
• Output Short Circuit Protection

P SUFFIX
PLASTIC PACKAGE
CASE 646

ORDERING INFORMATION
OpAmp
Function
Single

Dual

Quad

Device

Test Temperature
Range

Package

MC34181P
MC34181D

0° to +70°C

Plastic DIP
SO-8

MC33181P
MC33181D

-40° to +85°C

Plastic DIP
SO-8

MC34182P
MC34182D

0° to +70°C

Plastic DIP
SO-8

MC33182P
MC33182D

-40° to +85°C

Plastic DIP
SO-8

MC34184P
MC34184D

0° to +70°C

Plastic DIP
SO-14

MC33184P
MC33184D

-40° to +85°C

Plastic DIP
SO·14

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-311

o SUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)

PIN CONNECTIONS

(Quad, Top View)

MC34181,2,4, MC33181 ,2,4
MAXIMUM RATINGS
Rating
Supply Voltage (from Vee to VEE)
Input Differential Voltage Range

Symbol

Value

Unit

Vs

+36

V
V

VIDR

Note 1

Input Voltage Range

VIR

Note 1

V

Output Short eircuit Duration (Note 2)

tse

Indefinite

sec

Operating Junction Temperature

TJ

+150

°e

Tstg

--60 to +150

°e

Storage Temperature Range

NOTES: 1. Either or both input voltages should not exceed the magnitude of Vee or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature
(TJ) is not exceeded (see Figure 1).

Equivalent Circuit Schematic
(Each Amplifier)
VCC
09

°1

Cl

03
R

°2

R7

RS

Null Offsets
MC3X181 (Single) Only

~-----oVEE

25kQ

MC3X181 Input Offset
Voltage Null Circuit

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-312

Vo

MC34181,2,4, MC33181 ,2,4
DC ELECTRICAL CHARACTERISTICS (VCC

~ +15 V, VEE ~-15 V, TA ~ 25°C, unless otherwise noted.)

Characteristics

Symbol

Input Offset Voltage (RS ~ 50 n, Va ~ 0 V)
Single
TA ~ +25°C
TA ~ 0° to +70°C (MC34181)
TA ~-40° to +85°C (MC33181)
Dual
TA ~ +25°C
TA ~ 0° to +70°C (MC34182)
TA ~-40° to +85°C (MC33182)
Quad
TA ~ +25°C
TA ~ 0° to +70°C (MC34184)
TA ~-40° to +85°C (MC33184)

Min

Typ

Max

mV

Via

-

0.5

-

-

-

1.0

-

Average Temperature Coefficient of Via (Rs ~ 50 n, Va ~ OV)

tNIO/tl.T

Input Offset Current (VCM ~ 0 V, Va ~ OV)
TA ~ +25°C
TA ~ 0° to +70°C
TA ~ -40° to +85°C

110

Input Bias Current (VCM ~ 0 V, Va ~ OV)
TA ~ +25°C
TA ~ 0° to +70°C
TA ~ -40° to +85°C

liB

Input Common Mode Voltage Range

VICR

Large Signal Voltage Gain (RL ~ 10 kil, Va ~ ±10 V)
TA ~ +25°C
TA ~ Tlow to Thigh

AVOL

-

4.0

-

-

-

10

-

0.001

-

0.003

-

2.0
3.0
3.5
3.0
4.0
4.5
10
11
11.5

-

nA

-

-

nA

-

0.1
2.0
4.0

(VEE +4.0 V) to (VCC -2.0 V)
25
15

60

-

-

Common Mode Rejection (RS ~ 50 n, VCM ~ VICR, Va ~ 0 V)

CMR

70

86

-

Power Supply Rejection (RS ~ 50 n, VCM ~ 0 V, Va ~ 0 V)

PSR

70

84

-

+13.5

-

+14
-14

V

-13.5
dB
dB
rnA

ISC
3.0
8.0

8.0
11

-

-

210

250
250

-

420

-

840

JlA

ID

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-313

V
V/mV

VO+
Vo-

Power Supply Current (No Load, Va ~ 0 V)
Single
TA ~ +25°C
TA ~ Tlow to Thigh
Dual
TA ~ +25°C
TA ~ Tlow to Thigh
Quad
TA ~ +25°C
TA ~ Tlow to Thigh

/lV/DC

0.05
1.0
2.0

Output Voltage Swing (VID ~ 1.0 V, RL ~ 10 kn)
TA ~ +25°C

Output Short Circuit Current (VID ~ 1.0 V, Output to Ground)
Source
Sink

Unit

-

500
500
1000
1000

MC34181,2,4, MC33181 ,2,4
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25°C, unless otherwise noted.)
Characteristics

".

Symbol

Min

Typ

Max

7.0

-

10
to

-

1.1
1.5

Slew Rate (Vin =-10 V to +10 V, RL = 10 kn, CL = 100 pF)
AV = +1.0
Av=-1.0

SR

Settling lime (AV =-1.0, RL = 10 kn, Vo = 0 V to +10 V Step)
To Within 0.10%
To Within 0.01%

ts

-

Gain Bandwidth Product (I = 100 kHz)

GBW

3.0

4.0

Power Bandwidth (AV = +1.0, RL = 10 kn, Vo = 20 Vp-p, THD = 5.0%)

BWp

-

120

Phase Margin (-10 V < Vo < +10 V)
RL=10kn
RL= 10 kn, CL= 100pF

'ilm

Gain Margin (-10 V < Vo < +10 V)
RL=10kn
RL= 10 kn, CL= 100 pF

Am

Equivalent Input Noise Voltage
RS = 100 Q, f = 1.0 kHz

Unit
V/IlS

-

Ils

-

MHz
kHz
Degrees

-

67
34

-

6.7
3.4

-

en

-

38

-

nV/fHz

Equivalent Input Noise Current
1= 1.0 kHz

in

-

0.01

-

pNfHz

Diflerentiallnput Capacitance

Ci

3.0

-

pF

THD

-

Channel Separation (RL = 10 kn, -10 V < Vo < +10 V, 0 Hz < I < 10 kHz)

-

-

120

-

dB

Open-Loop Output Impedance
(I = 1.0 MHz)

llal

-

200

-

n

Diflerentiallnput Resistance

Ri

Total Harmonic Distortion
AV = 10, RL = 10 kn, 2.0 Vp_p < Vo < 20 Vp_p, I = 1.0 kHz

1012
0.04

dB

n
%

Figure 2. Input Common Mode Voltage Range
versus Temperature

Figure 1. Maximum Power Dissipation versus
Temperature for Package Variations
w

ell

13g

o

:;;:E

-2.0
3.0

~

2.0

I

VCC (VCM to Vcc)

I

-

Zw

!i!i

.l.Jf

I

IloVIO =~.O mV

w

8

I

VCC = +3.0 V to +15V
-1.0 I- VEE=-3·0Vto-15V

~

--...::

8~

400 I--+--+-+--+-+--.::p........~~~ol:--+-l-l

c

a..

o~~~~~~~--~~--~~~~~

-55 -40 -20

~

~
Q

>

0
20 40 60 80 100 120 140 160
TA, AMBIENT TEMPERATURE (OC)

1.0

o

-55

VEE""
-25

o
25
50
75
TA, AMBIENT TEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-314

100

125

MC34181,2,4, MC33181 ,2,4
Figure 3. Input Bias Current
versus Temperature
1000

Figure 4. Input Bias Current versus
Input Common Mode Voltage
20

I

VCC=+15V
100 !-VEE=-15V
fVCM=OV
:z
w
a: 10
a:
:::>
u
~ 1.0

<.s-

5'"
a.

<.sf-

,/

,,;

= 0.01

U

'":$

/

-25

10

f-

:::>

a.

:!!:
!E

0
25
50
75
TA. AMBIENT TEMPERATURE (0C)

/

In

I--- V"

0.001
-55

100

../

o

~
:z
C!l

~

I.

o

1

til

30

13
0

13~

./'

C!l

./

20

g
~

V

RL=10yi"'"

>

f-

:::>

.,/

a.
f-

:::>

0

lO

, ,/'

~

o
o

2.0

4.0

6.0

8.0

10

12

14

16

VCC. IVEEI. SUPPLY VOLTAGE M

~
w

0

13

-1.0

~
o

:z -2.0

VCC=+15V
VEE=-15V
TA=+25°C
~

Fa. .
loOk

10k
lOOk
Rlo LOAD RESISTANCE TO GROUND (OJ

...........

VCC=+15V
-2.0 -VEE=-15V
_
TA=
+25°C
-3.0

1

I

VCC)'

so~rce

"" -

J

J.

l~tmIftTR
1.0

2.0

3.0 4.0 5.0 6.0 7.0
IL. LOAD CURRENT (rnA)

8.0

9.0

10

Figure 8. Output Saturation Voltage versus
Load Resistance to VCC

v~y I 1111
~

I I

-1.0

Figure 7. Output Saturation Voltage versus
Load Resistance to Ground
C!l

10

Figure 6. Output Saturation Voltage
versus Load Current

_ RL Connected to Ground
TA=25°C

w

'"

-5.0
o
5.0
VICR. INPUT COMMON MODE VOLTAGE M

-10

125

!

L

/

5

Figure 5. Output Voltage Swing
versus Supply Voltage
40

I

:::>

./

0.1

:!!:

:z 15
w
a:
a:

Ell

I
VCC=+15V
VEE=-15V
TA = 25°C

loOM

I:~El]:::=II~:::::[
IIJ==='~
I
:::>

!;;: 3.0

5'"
a.
5

?-

2.0

o 1.0

o

1.0k

~

lTTTrTr-'

"r-.......
VEE

'>I..

IIIIIII

10k
lOOk
Rlo LOAD RESISTANCE (OJ

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-315

VCC=+15V
VEE=-15V
TA = +25°C

1.0M

MC34181,2,4, MC33181 ,2,4

III

Figure 9. Output Short Circuit Current
versus Temperature

~
!z

30

w

:::>

<..>

!:::

aa:

20

i5

b:
o

:I:

'" 10

5

VCC= +15';"
I - VEE=-15V
VCM = OV
I - Vo=ov
dlO = 10 llA
TA = 25'C

VCC=+15V
VEE=-15V
RL:;;O.1 n
VID=I.0V

_

a:
a:

-----------

~

Source

5o
g a

Figure 10. Output Impedance versus Frequency

-55

-25

-

r---

25
50
75
TA. AMBIENT TEMPERATURE ('C)

100

24

\

18

\

C!l

!:i

0

> 12

I-

:::>

:::>
0

~

\

I- VEE=-15V

~C

I- RL=10k

<..> 0.6
0

:;;
a:
..: 0.4

II

:I:
...J

10;,.

~

C

:I:
I-

a
10 k

109 k
f. FREQUENCY (Hz)

a
10

1.0M

!C

./

w

C!l

50

/

40
30

........

V

/

~

..:

20
-55

w

......

~

VCC=+15V _
VEE = -15 V
RL=10kn f:;;10Hz
TA=25'C

L
-25

a

25

50

75

lOOk

100

9

'\ Gain

\.

!:i 60

~
0..
o

Phase 1\

'\..

""-

"-

40

Z
w

~

TA. AMBIENTTEMPERATURE ('G)

'\

10

100 1.0k

10k

lOOk

f. FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-316

"
"

\

I'\.. 1\

a
1.0

ffl
w

a:

ffi

e.

45 w

~0..

"-

l5.:l 20
125

!

VCC=+15VVEE=-15V
VO=OV
RL=10kn TA=25°C _

'\..

-~

~ 80

"-'\

I

0..

0
.:l

......

10 k

.1

z

C!l

1.0 k
f. FREQUENCY (Hz)

100

:E..

z
;;: 60

W
0..

100

Figure 14. Open-Loop Voltage Gain and
Phase versus Frequency

E

z

~~

~ 0.2

5' 70

9

~

II
AV-1000

Z

~

~

1.0M

Vo = 2.0~_p

TA = 25'C

Figure 13. Open-Loop Voltage Gain
versus Temperature

0

10k
100 k
f. FREQUENCY (Hz)

I-IV~~=I;I~I~"

z

0

i= 0.8
a:

\.

1.0 k

!:i

~

../

Figure 12. Output Distortion versus Frequency

,

6

1.0k

100

~ 1.0

VEE = -15V
RL = 10kn
THO = 1.0%
TA=25'C

z

0..
I-

i-"

1.0

a

125

~cd=~IWI

§:

'"w

,.

I-'

>-

~
~

30

C!l

i-"

I- AV=1000 "

Figure 11. Output Voltage Swing
versus Frequency

1:

I--"

1-11111111

LaM

10M

90 '"

~

135..,::

100
100M

MC34181,2,4, MC33181 ,2,4
Figure 15. Normalized Gain Bandwidth
Product versus Temperature

11.3

I
VCC;+15V
VEP-15V I - RL;10k.Cl

a:

o;;E. 1.2

!3
~
c

"

1.1

~

c.. 1.0

~
is

'"' I'.........

w

C!)

1:3

......

""""

0.9

~

~

.........

~

0.7_55

-25

C!)

- VCC;+15V
VEE;-15V
- RL; 10 k.Cl
- /!NO; 100 mV~-8
-10V
en

20

~

ffi

&' 0
1.0 k
t, FREQUENCY (Hz)

10 k

90
Negative

SU~PIY

I

80

lOOk

-

AVCC, AVEE=3.0V _
t~IOIHZ

r£
en
c..

100

100M

mIlO

Il..
Il..

10

lOOk

Figure 24. Power Supply Rejection
versus Temperature

~

~

tNO

::;;

125

~ 60

!:§
§?

AOM
+

aVCM
)
CMR= 2010g ( - XAOM
aVo

o

100

c

aVCM

j"-....

;;: 60

Figure 23. Input Noise Voltage
versus Frequency

~>-

""'~''''

z 120 ""'VEE=-15V ~
aVCM=3.0V
&3 100 -TA=25°C -

-55

Figure 25. Power Supply Rejection
versus Frequency

-25

0
25
50
75
TA < AMBIENT TEMPERATURE (0C)

100

125

Figure 26. Normalized Supply Current
versus Supply Voltage
is 1.2
J;!::I

~c:

o

1.1

2;.

ffi

c:
c:
=>

TA=25°C

"-

1.0

125°C

V

~ 0.9

-55°C
VCC=+15V
VEE=-15V
TA= 25°C

c..
c..

=>
tn

0.8

RL=~

8

VO=OV

w 0.7

1.0k

10k
t, FREQUENCY (Hz)

lOOk

I.OM

dt!

0

5.0

10

15

VCC, IVEEI, SUPPLY VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-318

20

MC34181,2,4, MC33181 ,2,4
Figure 27. Channel Separation versus Frequency
140

m
~

120

:z

a

100

~

80

en

60

1t
w
...J
W

Z

:z

«:

.......
......

Vec = +15V
VEE=-15V
TA = +25'e

40

::J:

u

-

Figure 28. Transient Response

20

o
10k

lOOk
1.0M
f, FREQUENCY (Hz)

10M

Figure 29. Small Signal Transient Reponse
s;-

o

'>
E
o

~

w

C!l

13
~

I-

:::>

go

:::>

a
a
>

t, TIME (0.5 Ils/DIV)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-319

t, TIME (2.0 Ils/DIV)

MOTOROLA

TCA0372

SEMICONDUCTOR-----TeCHNICAL DATA

Advance Information
Dual Power Operational Amplifier
The TCA0372 is a monolithic circuit intended for use as a power operational
amplifier in a wide range of applications, including servo amplifiers and power
supplies. No deadband crossover distortion provides beller performance for
driving coils.
• Output Current to 1.0 A
• Slew Rate of 1.3 V/IJS
• Wide Bandwidth of 1.1 MHz
•
•
•
•

DWSUFFIX
PLASTIC PACKAGE
CASE 751G
SOP (12+2+2)L
DP2SUFFIX
PLASTIC PACKAGE
CASE 648
OP1 SUFFIX
PLASTIC PACKAGE
CASE 626

Internal Thermal Shutdown
Single or Split Supply Operation
Excellent Gain and Phase Margins
Common Mode Input Includes Ground

PIN CONNECTIONS

• Zero Deadband Crossover Distortion

TCA0372DP2
Gnd
Gnd
3

Gnd

VEE/Gnd 4

Gnd

OutputB

Gnd

Inputs 8 { 5

Simplified Block Diagram

Vcc

Inputs A { 7 1-_ _-'
(Top View)
TCA0372DW
Output A
NC
NC

Noninv.
Input
Input-A
Inputs +B
(Top View)
TCA0372DP1
Output A

ORDERING INFORMATION
Device
TCA0372DW
rCA0372DP1
TCA0372DP2

Operating Junction
Temperature Range

Package
SOP (12+2+2) L

TJ =-40° to +150°C

VCC

2

OutputB

3
} Inputs B

VEE/Gnd 4

Plastic DIP
Plastic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-320

} InputsA

(Top View)

TCA0372
MAXIMUM RATINGS
Rating

Symbol

Value

Unit

Vs

40

V

VIDR

(Note 1)

V

VIR

(Note 1)

V

Supply Voltage (Irom VCC to VEE)
Input Differential Voltage Range
Input Voltage Range
Operating Junction Temperalure (Note 2)

TJ

+125

°c

Tstg

-55 to +125

°c

10

1.0

A

I(max)

1.5

A

Storage Temperature Range
DC Output Current
Peak Output Currenl (Nonrepetitive)

I

III

DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, RL connected to ground, TJ =_40° to +125°C.)
Characteristics

Symbol

·Input Offset Voltage (VCM = 0)
TJ = +25°C
TJ, TlowtoThigh

Min

Average Temperature Coefficient 01 Offset Voltage

liB

Input Offset Current (VCM = 0)

110

Large Signal Voltage Gain
Vo = ±10 V, RL = 2.0 k

AVOL

Output Voltage Swing (lL = 100 rnA)
TJ = +25°C
TJ = Tlow to Thigh
TJ = +25°C
TJ = Tlow to Thigh

VOH

Output Voltage Swing (lL = 1.0 A)
VCC = +24 V, VEE = a V, TJ = +25°C
VCC = +24 V, VEE = a V, TJ = Tlow to Thigh
VCC = +24 V, VEE = a V, TJ = +25°C
VCC = +24 V, VEE = a V, TJ = Tlow to Thigh

VOH

Input Common Mode Voltage Range
TJ = +25°C
TJ = Tlow to Thigh

VICR

Max

1.0

15
20

-

AVIO/AT

Input Bias Current (VCM = 0)

Typ

Unit
mV

VIO

20

-

100

500

10

50

30

100

-

14.0
13.9

14.2

-

/J.V/oC
nA
nA
V/mV
V

-

-

VOL

-14.2

-14.0
-13.9

-

V
22.5
22.5

-

-

VOL

-

22.7
1.3

1.5
1.5

-

V
VEE to (VCC -1.0)
VEE to (Vee-1.3)

Common Mode Rejection Ratio (RS = 10k)

CMRR

70

90

Power Supply Rejection Ratio (RS = 100 n)

PSRR

70

90

Power Supply Current
TJ = +25°e
TJ = Tlow to Thigh

-

dB
dB
rnA

ID

-

5.0

-

10
14

-

NOTES: 1. Either or both input voltages should not exceed the magnitude 01 V CC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded.
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, RL connected to ground, TJ = +25°C, unless otherwise noted.)
Characteristics
Slew Rate (Vin = -10 V to +10 V, RL = 2.0 k, CL = 100 pF)
AV = -1.0, TJ = Tlowto Thigh
Gain Bandwidth Product (f = 100 kHz, CL = 100 pF, RL = 2.0 k)
TJ = 25°C
TJ = Tlow to Thigh

Symbol

Min

Typ

SR

1.0

1.4

Max

-

Unit

0.9
0.7

1.4

Degrees

V/Jl.S

GBW

MHz

Phase Margin T J = Tlow to Thigh
RL = 2.0 k, CL = 100 pF

m

-

65

-

Gain Margin
RL = 2.0 k, CL = 100 pF

Am

-

15

-

dB

Equivalent Input Noise Voltage
RS = 100 n, 1 = 1.0 to 100 kHz

en

-

22

-

nV/fflz

THD

-

0.02

-

%

Total Harmonic Distortion
AV = -1.0, RL = 50 n, Vo = 0.5 VRMS, f = 1.0 kHz
NOTE: In case VEE is disconnected before VCC, a diode between VEE and Ground

IS

recommended to avoid damaging the deVice.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-321

-

TCA0372
Figure 1. Supply Current versus Suppy
Voltage with No Load

Figure 2. Output Saturation Voltage
versus Load Current

6.5

,.

~

;::- 5.5
:z
w
a:
a:
=>
<..> 4.5
~

0..
0..

r

=>
rn

c:; 3.5

/

V

VCCI

~

VCC-2.0 I--I----t=--I---l--+--I---l--+--I----l

!:::[Q6~~f~lllllllg3:3§~~

/

.9

2.5

........

---

"..V

,.,. ~
tiH~~~~~tV
! VCC-I.°t=f=I~I=~========]tj=±=E3~l;;~
VEEL--L-~~------------------L-~~--L-~~-~

o

2.0

4.0

6.0

8.0

10

12

14

16

18

o

20

0.5
It.. LOAD CURRENT (A)

VCC.IVEEI. SUPPLY VOLTAGE M

Figure 3. Voltage Gain and Phase
versus Frequency

Figure 4. Phase Margin versus Output
Load Capacitance

80

80

60 r-.....
lD 40
:Eo
:z

...
r.....

...

10

100

70

90

w

~

1000

110

t!l

ffi
w
e.

:z 50
ffi
a:

~

~ 40

e.

w

 Vs
E1, E2 ~ Logic Inpuls
I, TIME (1 00 ~s/DIV)

Figure 9. Bidirectional Speed Control of DC Motors
For circuit stability, ensure that Rx >

2R3 • R1

RM

where, RM = internal resistance of motor.

The voltage available at the terminals of the motor is:

'!f) + IRol' 1M

VM = 2 (V1 -

2R3. R1
where, IRol =
and 1M is the motor current.
Rx
Vs

Yin

.I

R1

R7

10k

RS

10k

R3

10k

s.on
R6
10k

R2

RS

10k

10k

THERMAL INFORMATION
The maximum power consumption an integrated circuit can
tolerate at a given operating ambient temperature can be
found from the equaiton:
PO(TA) = TJ(max) -TA
RSJA (typ)
where, PO(TA) = power dissipation allowable at a given
operating ambient temperature.

This must be greater than the sum of the products of the
supply voltages and supply currents at the worst case
operating condition.
TJ(max)
Maximum operating junction temperature
as listed in the maximum ratings section.
TA
Maximum desired operating ambient
temperature.
RSJA(typ)= Typical thermal resistance junction-toambient.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-323

•

I

TL062
TL064

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Low Power JFET Input
Operational Amplifier

LOW POWER JFET INPUT
OPERATIONAL AMPLIFIERS

These JFET input operational amplifiers are designed for low power
applications. They feature high input impedance,low input bias current and low
input offset current. Advanced design techniques allow for higher slew rates,
gain bandwidth products and output swing.
These devices are specified over the commercial, vehicular and military
temperature ranges. The commercial and vehicular devices are available in
Plastic dual in-line and SOIC packages. The military devices are available in
Ceramic dual in-line packages.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

•

DUAL

1

• Low Supply Current: 200 IJA/Amplifier

PSUFFIX
PLASTIC PACKAGE
CASE 626

• Low Input Bias Current: 5.0 pA
• High Gain Bandwidth: 2.0 MHz
• High Slew Rate: 6.0 V/fJS

JGSUFFIX
CERAMIC PACKAGE
CASE 693
DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

• High Input Impedance: 10 12 n
• Large Output Voltage Swing: ±14 V
• Output Short Circuit Protection

PIN CONNECTIONS

Equivalent Circuit Schematic (Each Amplifier)
--~~--------------~------~----oVee

11

•

Vee

Inputs 1 { :

7

Outpm 2

Omput

+

Inpms { :

VEE • ' - - - - '
(Top View)

R4

0----+-------+----"

QUAD

6.} Inpms2

rr!!!!IIIIfi;
14'~U
1

NSUFFIX
PLASTIC PACKAGE
CASE 646

DSUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)

ORDERING INFORMATION
OpAmp
Function

Device
TL062CD, ACD
TL062CP, ACP

Dual

Package

0° to +70°C

SO-8
Plastic DIP

TL062VD
TL062VP

-40° to +85°C

SO-8
Plastic DIP

TL062MJG

-55° to +125°C

Ceramic DIP

0° to +70°C

SO-14
Plastic DIP

TL064VD
TL064VN

-40° to +85°C

SO-14
Plastic DIP

TL064MJ

-55° to + 125°C

Ceramic DIP

TL064CD, ACD
TL064CN, ACN
Quad

Tested Temperature
Range

JSUFFIX
CERAMIC PACKAGE
CASE 632

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-324

PIN CONNECTIONS

TL062,TL064
MAXIMUM RATINGS

I

Rating

Symbol

Value

Unit

Vs

+36

V

VI DR

±30

V

Supply Voltage (from VCC to VEE)
Input Differential Voltage Range (Note 1)

III

I

Input Voltage Range (Notes 1 and 2)

VIR

±15

V

Output Short Circuit Duration (Note 3)

tsc

Indefinite

sec

Operating Junction Temperature
Ceramic Package
Plastic Package

TJ

°C
+160
+150

Storage Temperature Range
Ceramic Package
Plastic Package

°C

Tstg
-65 to +160
-60 to +150

NOTES: 1. Differential voltages are at the noninverting input terminal with respect to the
inverting input terminal.
2. The magnitude of the input voltage must never exceed the magnitude of the supply
or 15 V, whichever is less.
3. Power dissipation must be considered to ensure maximum junction temperature
(TJ) is not exceeded. (See Figure 1.)

ELECTRICAL CHARACTERISTICS (VCC

=+ 15 V, VEE =-15 V, TA = 0° to +70°C, unless otherwise noted.)
TL062C
TL064C

TL062AC
TL064AC
Characteristics
Input Offset Voltage (RS
TA =25°C
TA = 0° to +70°C

= 50 Q, Va = OV)

Average Temperature Coefficient for Offset Voltage
(RS = 50 Q, Va = 0 V)
Input Offset Current (VCM
TA = 25°C
TA = 0° to +70°C
Input Bias Current (VCM
TA =25°C
TA = 0° to +70°C

= 0 V, Va = 0 V)

= 0 V, Va = 0 V)

Large Signal Voltage Gain (RL
TA = 25°C
TA = 0° to +70°C

TA

Min

Typ

Max

Via

-

3.0

-

-

6.0
7.5

-

10

-

0.5

£l.VIO/£l.T

110

liB

-

Input Common Mode Voltage Range
TA = 25°C

Output Voltage Swing (RL
TA = 25°C

Symbol

VICR

-11.5

= 10 kQ, Va =±1 0 V)

-

3.0

+14.5
-12.0
58

-

= 10 kQ, VID = 1.0 V)

= 0° to +70°C

Common Mode Rejection
(RS = 50 Q, VCM = VICR min, Va
Power Supply Rejection
(RS = 50 Q, VCM = 0 V, Va

Typ

Max

Unit

-

3.0

-

15
20

-

-

10

-

100
2.0

-

0.5

200
2.0

pA
nA

200
2.0

-

3.0

200
10

pA
nA

+14.5
-12.0

+11

V

58

-

3.0
3.0

-

-

+10

+14
-14

mV

AVOL
4.0
4.0

Min

+14
-14

+11.5

-

-

-

-11

-

-

jlV/oC

V/mV

-

V

-

VO+
VcrVO+
Vcr-

+10

CMR

80

84

-

70

84

-

dB

PSR

80

86

-

70

86

-

dB

-

+10

-

-

-10

-10

+10
-

-

-10

-10

= 0 V, TA = 25°C)

= 0, TA = 25°C)

Power Supply Current (each amplifier)
(No Load, Va = 0 V, TA = 25°C)

ID

-

200

250

-

200

250

(lA

Total Power Dissipation (each amplifier)
(No Load, Va = 0 V, TA = 25°C)

PD

-

6.0

7.5

-

6.0

7.5

mW

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-325

TL062,TL064
DC ELECTRICAL CHARACTERISTICS (VCC = + 15 V, VEE = -15 V, TA = Tlow to Thigh (Note 4), unless otherwise
TL062M,V
Characteristics

Symbol

Input Offset Voltage (RS = 50 n, Va = OV)
TA = 25°C
TA = Tlowto Thigh
Average Temperature Coefficient for Offset Voltage
(RS = 50 0, Va =0 V)

Via

AVlo'AT

Input Offset Current (VCM = 0 V, Va = 0 V)
TA = 25°C
TA = Tlow to Thigh

110

Input Bias Current (VCM = 0 V, Va = 0 V)
TA = 25°C
TA = Tlow to Thigh

liB

Input Common Mode Voltage Range (TA = 25°C)

Typ

Max

Min

Typ

Max

-

3.0

-

6.0
9.0

-

3.0

-

9.0
15

-

10

-

-

10

-

-

5.0

100
20

-

5.0

100
20

pA
nA

-

-

30

200
50

-

30

200
50

pA
nA

-

+14.5
-12.0

+11.5

+14.5
-12.0

+11.5

V

4.0
4.0

-11.5
Large Signal Voltage Gain (RL = 10 kO, Va = ±10 V)
TA=25°C
TA= TlowtoThigh
Output Voltage Swing (RL = 10 kO, VIO = 1.0 V)
TA = 25°C
TA = Tlow to Thigh
Common Mode Rejection
(RS = 50 n, VCM = VICR min, Va = 0, TA = 25°C)

CMR

Power Supply Rejection
(RS = 50 n, VCM = 0 V, Va = 0, TA = 25°C)

PSR

Power Supply Current (each amplifier)
(No Load, Va = 0 V, TA = 25°C)

10

Total Power Oissipation (each amplifier)
(No Load, Va = 0 V, TA = 25°C)

Po

NOTE:

4. TL06XM Tlow = -55°C
TL06XV Tlow = -40°C

-

+10

-

-

-

-11.5

58

-

-

4.0
4.0

+14
-14

-

+10

AVOL

VO+
Vcr
VO+
Vcr

TL064M,V

Min

-

VICR

n~ted.)

-

-

-10

mV

IlV/oC

-

58

-

+14
-14

-

-

80

84

-

80

84

-

80

86

-

80

86

-

-

200

250

-

200

250

-

6.0

7.5

-

6.0

7.5

-

-

+10

-10

V/mV

V

-10

-

+10

Unit

-

-10
dB
dB

IJ.A
mW

Thigh = +125°C
Thigh = +85°C

AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = +25°C, unless otherwise noted.)
Characteristics

Symbol

Min

Typ

Max

SR

2.0

6.0

Rise lime (Vin = 20 mY, RL = 10 kO, CL = 100 pF, AV = + 1.0)

Ir

-

0.1

-

Overshoot (Vin = 20 mY, RL = 10 kO, CL = 100 pF, AV = +1.0)

as

-

10

-

1.6
2.2

-

Slew Rate (Vin =-10 V to +10 V, RL = 10 kO, CL = 100 pF, AV = +1.0)

Settling lime
(Vec = +15 V, VEE =-15 V, AV=-1.0,
RL = 10 kO, Va = OVto+l0 V step)

ts

Unit

V/IlS

IlS
%

IlS

Equivalent Input Noise (RS = 100 n, f = 1.0 kHz)

en

-

Input Resistance

Ri

-

1012

-

0

Channel Separation (f-= 10kHz)

cs

-

120

-

dB

To within 10 mV
To within 1.0 mV

Gain Bandwidth Product (f = 200 kHz)

GBW

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-326

-

2.0

-

MHz

47

-

nV/.,[Hz

TL062, TL064
TYPICAL PERFORMANCE CURVES
Figure 1. Maximum Power Dissipation versus
Temperature for Package Variations

Figure 2. Output Voltage Swing
versus Supply Voltage

:i: 2400

40

.§.

~ 2000

~

gj

1600

is

a:

~ 1200

~
~

:;;

~
C
D-

SOO

"-

1
SI14Pin
Ceramic

~

rN.. .... I"SO-S

1:

I

"

~

8/14 Pin
Ceramic

....

30

~

20

g
5
!5o

I.....

.... 1-0.

400

!ill
~
w

-JL=10~
_

TA = 25°C

,/'

25

. /V

CJ

"

I"'- ~

35

i"~

.g

i'""'1::!!!

!IiIII~
o
-55 -40 -20 0
20 40 60 SO 100 120 140 160
TA, AMBIENT TEMPERATURE (OC)

/~

15
10
5.0

o
o

2.0

Figure 3. Output Voltage Swing
versus Temperature
40

1:

CJ

z

30

w

25

I

~

20

~ 24

w

CJ

~

5

!5

0

.g

CJ

rr-

o

-75

-50

,

~

~

o 6.0

.g

-25
0
25
50
75
TA, AMBIENT TEMPERATURE (OC)

100

".

o

125

z

25

~
CJ

~
w

CJ

!:§

c-IVC~~~~5J V~~~~5V

0.1

;e
z

~
w

~

~

~

1\

~

15

::::l

IDI-

10

-

r ~CC.= +5.0 V, VIiE. = -5.0

0

5.0

-

H

::::l

.g

~1OO

TA=25°C

20

o

100

~
w

0.2

0.3

0.5 0.7 1.0
2.0 3.0
Rlo LOAD RESISTANCE (k.Q)

5.0 7.0 10

VCC=+15V
VEE= -15V
RL=10k.Q

50
40

/'

~-

.........
.............

~

20

~..:.

.!

10k
100k
f, FREQUENCY (Hz)

70

~ 30

Vee = +2.5 V, ~I;E = -2.5 V

1.Ok

~

Figure 6. Large Signal Voltage Gain
versus Temperature

kL~10UI

Vec = +12 V, V E = -12V

./

/

Figure 5. Output Voltage Swing
versus Frequency

30

16

/

1S

g 12

15

35

VCC=+15V
VEE=-15V
TA=25°C

~

10 I-- VCC=+15V
VEE=-15V
5.0 I-- RL = 10 k.Q
-I
1

~

14

30

}
'-'

4.0
6.0
S.O
10
12
VCC, IVEEI, SUPPLY VOLTAGE M

Figure 4. Output Voltage Swing
versus Load Resistance

35

§:
en

V

... " ,

V

1.0M

10M

o
~ 10

-75

-50

-25
0
25
50
75
TA, AMBIENT TEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-327

100

125

lEI

TL062, TL064
Figure 8. Supply Current per Amplifier
versus Supply Voltage

Figure 7. Open-Loop Voltage Gain
and Phase versus Freqeucny
a;- 100

I

:Eo

:z

~

-"'\

80

W
C!l

13

~
Do

9

:Z
W

60

i,

....

,

..:.
0

20

'\

>

<

o
1.0

10

100

~

J:
D-

....

D-

O

....

" , "\

"-

40

en

Gain

Phase \.

250

I

VCC=+15VW
VEE=-15V _
W
0 a:
VO=OV
C!l
RL=10kn W
c
CL=OpF _
45 ;;;
TA=25°C

1.Ok

10k

lOOk

90 gj
W

~

135 w•
-e-

<-

~ 200

I-

:z
W
a: 150
a:
::l

U

~

DD::l

"'.u
E

I, 1\

1.0M

100

I-- TA = 25°C
50 I-- VO=OV
I-- RL =ooQ

o
o

180
10M 100M

'"
2.0

I
4.0

f. FREQUENCY (Hz)

§'
200

I-

:z
W
a:
a: 150

~

-

:z

0

~

en

'"

::l
DD::l

":
u

E

W

~
;:;

100

r-- VCC=+15V
VEE=-15V
50 r-- VO=OV
r-- RL=ooQ
o
-75

a;- 88
:z

§
W

Ul
a:

T

-50

~

I

D-

100

-25
0
25
50
75'
TA. AMBIENT TEMPERATURE (0C)

125

:;;

:z
0
:;;
:;;
0

u

a:-

:;;

u

.1

TL062

10
5.0

o
-75

a;- 140

.~

-50

120 I-- VEE=-15V ;::::
Ll.VCM=±1.5V
rrlloo I-- TA = 25°C Ul
a:

-,

82

W

g

a:-

u

50

75

125

100

t--.....

TA. AMBIENT TEMPERATURE (OC)

1"--"",

20

o

100

125

1k

10k
f. FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2·328

+

I!.VCM
)
CMR=20Log ( - XADM
I!.VD

r-....

~ 40

:;;

25

-

I!.VCM

~

8
0

80

:;; 60

81
-25

100

~ ~TTTI
ADM
I!.VD

~

I'-.-

-50

-25
25
50
75
TA. AMBIENT TEMPERATURE (OC)

V6CI=I+ll~IVI

:Eo

83

80
-75

20

Figure 12. Common Mode Rejection
versus Frequency

RL = 10 kn

84

18

C

r-- VCC=+15V
VEE=-15V
86 r-- VO=OV

W

c

0

16

D-

87

85

14

..J

Figure 11. Common Mode Rejection
versus Temperature
:Eo

12

TL064

I
I
20 -VCC=+15V
_ VEE=-15V
VO=OV
RL=ooQ
15 -

is
a:

U

~

10

25

250

~

8.0

Figure 10. Total Power Dissipation
versus Temperature

Figure 9. Supply Current per Amplifier
versus Temperature

<-

6.0

VCC.IVEEI. SUPPLY VOLTAGE (V)

lOOk

1M

TL062, TL064
Figure 14. Normalized Gain Bandwidth
Product, Slew Rate and Phase
Margin versus Temperature

Figure 13. Power Supply Rejection
versus Frequency
iIi

:s
z

0

!3
w
U3
cr:
~

""::::>

en
cr:
w

;;:
0

"-

cr:en

"-

140

1.4

11111111

120

+PSR= 20Log ( ilVoIAOM)
ilVCC

I

+PSR (il~%= ±1.~ V)

100

~~1.1

i'oo.

60

VCC=+15V
40 I- VEE = -15 V
T~ = ~~of",
20

o

100

IIIIIII

GBW

zen

I 1lTt1t .........

Slew Rate

~ §i;l1.0

............

r-.....

-~'
AoM

I:!:I t; 0.9
~5

............

I!.Vo

loOk

0.8

Z

0.7

~"-

+

~

:;; lE

VEE

10k

lOOk

loOM

-50

zw
cr:
cr:

Ii>"
"
iii"

""

1.0

I-

::::>

"-

0.1

~

..-l--'

!il 0.01
0.001
-55

-25

~

25

50

75

100

~

0.94 E

....

0.92
125

/

"

!:3

§?

r--- ....

40

VCC= +15V
VEE=-15V
RS=100n
~ 20 I TA=25°C
~ 10

6
Z

"

CD

100

125

Figure 17. Small Signal Response

~

50

~ 30 I -

/

0
25
50
75
TA. AMBIENTTEMPERATURE (OC)

60

C)

/

(;)

:$

fIl

N

...

70

I
VCC=+15V
100 -VEE=-15V
VCM=OV
10

::::>

en

~'

1.0

Figure 16. Input Noise Voltage
versus Frequency

1000

.s

0

1.02 ~

TA. AMBIENT TEMPERATURE (OC)

Figure 15. Input Bias Current
versus Temperature

I-

-25

~

w

0.98 ~
I": ~ 0.96

"

0.6
-75

1.06 ~
1.04

"-

........::::

; ' PiaseMatn

f. FREQUENCY (Hz)

;;c-

r- .....

.......- ".; , '

0<

1.08

I

VCC=+15V VEE=-15V
RL=10kn CL = 0 pF

1.3

~ ~ 1.2

-PSR= 20Log ( ilVoIAOM)
ilVEE

,!SR (ilVEE =·±1.5V)
80

::r:

bW

I

I

o

10

I 1111
100

1.0k
f, FREQUENCY (Hz)

10k

Figure 18. Large Signal Response

I, TIME (2.0 IJ.S/DIV)

TIME (0.51J.S/OIV)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-329

lOOk

III

TL062, TL064
Figure 19. AC Amplifier

Figure 20. High-Q Notch Filter

VCC
VCC
1.0Ma
Inputs

Output

Output

50n
10ill

CI =C2=

O.IIJ.F

~
2

= II0pF

fa = _ _1 _ = 1.0 kHz
21tRI CI

Figure 22. 0.5 Hz Square-Wave Oscillator

3.3ka

Figure 23. Audio Distribution Amplifier

+15V

Output A

1/2
TL062
1.0llF

1.0ka
Input

0--1 f---I--.-1
Output B

3.3ill

100ka
9.1 ill

100ill
e-~-"\N\r-o VCC

'100ill

lOOka
OutputC

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-330

TL071
TL072
TL074

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

I

LOW NOISE, JFET INPUT
OPERATIONAL AMPLIFIERS

Low Noise, JFET Input
Operational Amplifiers
These low noise JFET input operational amplifiers combine two state-of-the-art
linear technologies on a single monolithic integrated circuit. Each internally
compensated operational amplifier has well matched high voltage JFET input
devices for low input offset voltage. The BIFET technology provides wide
bandwidths and fast slew rates with low input bias currents, input offset currents,
and supply currents. Moreover, the devices exhibit low noise and low harmonic
distortion making them ideal for use in high fidelity audio amplifier applications.
These devices are available in single, dual and quad operational amplifiers
which are pin-compatible with the industry standard MC1741, MC1458, and the
MC3403/LM324 bipolar products.

SILICON MONOLITH
INTEGRATED CIRCUIT

~

!~fr
1

1

PSUFFIX
PLASTIC PACKAGE
CASE 626

JGSUFFIX
CERAMIC PACKAGE
CASE 693

DSUFFIX
PLASTIC PACKAGE
CASE 751
(50-8)

• Low Input Noise Voltage: 18 nV/fflz Typ
• Low Harmonic Distortion: 0.01 % Typ
• Low Input Bias and Offset Currents
• High Input Impedance: 1012 n Typ

PIN CONNECTIONS

• High Slew Rate: 13 V/IlS Typ
• Wide Gain Bandwidth: 4.0 MHz Typ

Offset Null

1

• Low Supply Current: 1.4 rnA per Amp

Inv + Input

2

7

Vee

Noninvt Input

3

6

Output

VEE

4

5

Offset Null

TL071 [fop View)
Output A

1

• Vee

OutputB

7

Inputs A { : VEE

4

TL072 [fop View)

14_ 14_
N SUFFIX
PLASTIC PACKAGE
CASE 646
(TL074 Only)

ORDERING INFORMATION
OpAmp
Function

Device

Temperature
Range

Single

TL071ACJG, CJG

0° to +70°C

TL071ACP, CP

TL072ACJG, CJG

50-8
0° to +70°C

TL074ACJ, CJ
TL074ACN, CN

Ceramic DIP

~

_'IT~
G~"''''
{~
~}

Inputs 1

Vee
Inputs

3 1412
t

Ceramic DIP
0° to +70°C

2{~

Output 2 [l

Plastic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-331

+

8:

Plastic DIP

TL072ACP, CP
Quad

Ceramic DIP
Plastic DIP

TL072ACD, CD
Dual

PIN CONNECTIONS
Package

50-8

TL071ACD, CD

J SUFFIX
CERAMIC PACKAGE
CASE 632
(TL074 Only)

Inputs4

iTIJVEE

t:=Jt:
TL074 [fop View)

~ } Inputs3
~ Output 3

III

TL071 , TL072, TL074
MAXIMUM RATINGS
Rating
Supply Voltage
Differential Input Voltage
Input Voltage Range (Note 1)
Output Short Circuit Duration (Note 2)
Power Dissipation
Plastic Package (N, P)
Derate above TA = +47°C
Ceramic Package (J, JG)
Derate above TA = +82°C
Operating Ambient Temperature Range
Storage Temperature Range

Symbol

TL07_C
TL07_AC

VCC
VEE

+18
-18

Unit
V

VID

±30

V

VIDR

±15

V

tsc

Continuous

PD
1/8JA
PD
1/8JA

680
10
680
10

mW
mW/,C
mW
mW/,C

TA

oto +70

°c

Tstg

-65 to + 150

°C

NOTES: 1, The magnitude of the input voltage must not exceed the magnitude of the supply
voltage or 15 V, whichever is less.
2. The output may be shorted to ground or either supply. Temperature and/or supply
voltages must be limited to ensure that power dissipation' ratings are not exceeded.
ELECTRICAL CHARACTERISTICS (VCC

= +15 V, VEE = -15 V,

TA

= Thigh to Tlow [Note 3])
TL07 C
TL07J!.C

Characteristics

Symbol

Input Offset Voltage (RS:;; 10k, VCM = 0)
TL071 , TL072
TL074
TL07_A
Input Offset Current (VCM

Input Bias Current (VCM

= 0)

= 0)

Large-Signal Voltage Gain (VO

VIO

(Note 4)
TL07
TL07:::A

110

(Note 4)
TL07
TL07:::A

liB

= ±1 0 V,

RL <: 2.0 k)

Min

Output Voltage Swing (Peak-to-Peak)
(RL<: 10 k)
(RL <: 2.0 k)

Max

Unit
mV

-

-

13
13
7.5

-

-

2.0
2.0

-

-

7.0
7.0

15
25

-

-

24
20

-

-

nA

nA

V/mV

AVOL

TL07
TL07:::A

Typ

V

Vo

-

NOTES: (continued)
3. Tlow =

O°C for TL071C, TL071AC
Thigh = +70°C for TL071C, TL071AC
TL072C,TL072AC
TL072C,TL072AC
TL074C,TL074AC
TL074C,TL074AC
4. Input Bias currents of JFET input op amps approximately double for every 10°C rise in Junction Temperature as shown in Figure 3.
To maintain Junction Temperature as close to Ambient Temperature as possible, pulse techniques must be used during testing.
TEST CIRCUITS

Figure 2. Inverting Gain of 10 Amplifier

Figure 1. Unity Gain Voltage Follower

10k
1.0k

RL = 2.0k

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-332

TL071 , TL072, TL074
ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25"C, unless otherwise noted.)
TL07 C
TL07_AC
Characteristics

Symbol

Input Offset Voltage (RS:O; 10 k, VCM = 0)
TL071 , TL072
TL074
TL07_A

VIO

Min

Typ

Max

Unit
mV

-

3.0
3.0
3.0

10
10
6.0

-

10

-

-

5.0
5.0

50
50

-

30
30

200
200

-

10 12

-

±10
±11

+15,
-12
+15,
-12

-

25
50

150
150

-

24

28

-

70
80

100
100

-

70
80

100
100

-

ID

-

1.4

2.5

BW

-

4.0

-

MHz

SR

-

13

-

v/~s

Rise Time (See Figure 1)

tr

-

0.1

-

~s

Overshoot Factor
Vin = 20 mV, RL

-

-

10

-

%

Equivalent Input Noise Voltage
RS = 100 Q, f = 1000 Hz

en

-

18

-

nV/{Hz

Equivalent Input Noise Current
RS = 100 Q, f = 1000 Hz

in

-

0.01

-

pA/{Hz

THD

-

0.01

-

%

-

120

-

dB

Average Temperature Coefficient of Input Offset Voltage
RS = 50 Q, TA = Tlow to Thigh (Note 3)
Input Offset Current (VCM

Input Bias Current (VCM

= 0)

LlVIOILlT

(Note 4)
TL07
TL07:::A

110

= 0) (Note 4)

q

Input Resistance
Common Mode Input Voltage Range
TL07
TL07_A

VICR

Large-Signal Voltage Gain
(VO = ±10 V, RL?: 2.0 k)

AVOL
TL07_
TL07_A

Output Voltage Swing (Peak-to-Peak)
(RL = 10 k)

Vo

Common Mode Rejection Ratio (RS :0; 10k)
TL07
TL07:::A

CMRR

Supply Voltage Rejection Ratio (RS :0; 10k)
TL07
TL07:::A

PSRR

Supply Current (Each Amplifier)
Unity Gain Bandwidth
Slew Rate (See Figure 1)
Vin = 10 V, RL = 2.0 k, CL

pA

pA

liB

TL07_
TL07_A

= 100 pF

~V/"C

Q

V
-

V/mV

V
dB

dB

-

rnA

= 2.0 k, CL = 100 pF

Total Harmonic Distortion
Vo (RMS) = 10 V, RS:O; 1.0 k
RL?: 2.0 k, f = 1000 Hz

-

Channel Separation
AV = 100

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-333

II

TL071,TL072, TL074
Figure 3. Input Bias Current
versus Temperature

11.1

Figure 4. Output Voltage Swing
versus Frequency

I 11111111

i== VCcJVEE - +15 V

I

11111111 II

10

1.0

0.1

0.01
-75

-50

-25

0

25

50

75

100

125

1.0k

10 k
100 k
f, FREQUENCY (Hz)

TA, AMBIENTTEMPERATURE (0G)

Figure 5. Output Voltage Swing
versus Load Resistance

6-

2:..
z

C!:>

~

en
w

C!:>

130
>

>=>
Q,.

>-

=>

o.

.g

RL = 2.0 k
-TA=25°C

6-

2:..
C!:>
z 30

/'" '"

~

en
w

C!:>

./

/'

I

-c.

II
I I I
30 -VCCNEE=±15V
TA = 25°C
- See Figure 2
20
10

130

/'

20

V

>

Q,.

>=>

10

. /V

0.

.g
o

o
0.2

0.4

0.7

1.0

2.0

4.0

7.0

o

10

5.0

Figure 7. Output Voltage Swing
versus Temperature

6-

2:..
z

C!:>

~
w

en
C!:>

13

0

I

15

>-

o.

5.0

=>

.g

~L = 10 J

1.B

>z

1.6

II:
II:

w

1.4

=>
(,)

1.2

z

20

10

~

§.

RL = 2.0 k

=>
Q,.

>-

2.0

25

>

15

20

Figure 8. Supply Current per Amplifier
versus Temperature

I

35 -VCcJVEE=±15V
Se Figure
30

10

VCC, IVEEI , SUPPLY VOLTAGE (±V)

RL, LOAD RESISTANCE (kQ)

-c.

V

V

>=>

./
5.0
0.1

10M

Figure 6. Output Voltage Swing
versus Supply Voltage
40

-c.

1.0 M

~

c

~

Q,.
Q,.

=>
en

.

C

VCcJVEE = ±15 V

r---

1.0
O.B

- --- - -

0.6
0.4
0.2
0

-50

-25
0
25
50
75
TA, AMBIENTTEMPERATURE (0G)

100

125

-50

-25
0
25
50
75
TA, AMBIENTTEMPERATURE (0G)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2·334

100

125

TL071, TL072,TL074
Figure 10. Large-Signal Voltage Gain
versus Temperature

Figure 9. Large-Signal Voltage Gain and
Phase Shift versus Frequency
1000

z

<;:

(!)

c-

o

9

:Z
w
c-

106

-

105 I - 104

o

...J

103

>
>

102

.......

-...... .......

........

0

VCcNEE =±15 V
RL =2.0 k
TA =25'C

w

cr:

(!)

w

0'

......... ~ain

........

.......

........

100

1.0k

10k

!!:;

(!)

135'

\

1
100k

1.0M

~
z
<;:

~

100

w

'" 130
'"« >.
:r:

"......... r'\

=

E

(!)

90' c-

VCCNEE - +15 V Va-+10V
RL = 2.0 k

;;-

e.
:r:
45' w

,

Phase Shift

10

-

r-....

10 1
1.0

en
w

10

...J

o
>
>

180'

1.0

-50

10M

-25

0

25

50

75

100

125

TA, AMBIENT TEMPERATURE eC)

t, FREQUENCY (Hz)

Figure 12. Equivalent Input Noise Voltage
versus Frequency

Figure 11. Normalized Slew Rate
versus Temperature

I¥
"?"

;;

1.15
w

!;;:
cr:
:;:
w

...J

1.10
1.05

'"Clw

1.00

::J

0.95

cr:
Cl
z

0.90

N

«
::;;

c:

--- ---

130

i--

r--

-25

0

25

50

75

100

125

TA, AMBIENT TEMPERATURE ('C)

50

>

40

0
z

30

w
en

0.85
-50

60

w

(!)

l\.
!'

f::;,

c-

20

~

10

~
fZ

~
::;
0
w
;:

0
0.01

0.05 0.1

0.5 1.0

t, FREQUENCY (Hz)

"

Figure 13. Total Harmonic Distortion
versus Frequency
1.0

z
o

~

~

is

f:: VCCNEE

+15V
f-Av-1.0
I- Va = 6.0 V (RMS)
0.1 :: TA = 25'C
0.5

<.)

Z

o

::;;

cr:
«

:r:
...J

;::;

::?

0.05
0.01
0.005

ci
:r:
f-

0.001
0.1

0.5

1.0

5.0

10

50

100

t, FREQUENCY (Hz)
MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2·335

5.0

10

50 100

TL071,TL072,TL074
Representative Circuit Schematic
(Each Amplifier)

lEI

Output

Bias Circuitry
Common to All
Amplifiers

Offset
Null
(TlO71
only)

Figure 14. Audio Tone Control Amplifier
10k
lOOk
10k
Input o-j 1-1>--'\N\,..-------<> Output
3.3k

68k
0.033I1F

O.033I1F

'-----I~

VEE
Turn-Over Frequency = 1.0 kHz
Bass Boost/Cut - ±20 dB at 20 Hz
Treble BooSt/Cut - ±19 dB at 20 kHz

Figure 15. High Q Notch Filter

R

10=_1 =350 Hz
21tRC
R=2Rl =1.5M

C

C

C=~
2

=300pF

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-336

TL081
TL082
TL084

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

JFET Input Operational Amplifiers
These low-cost JFET input operational amplifiers combine two state-of- the-art
linear technologies on a single monolithic integrated circuit. Each internally
compensated operational amplifier has well matched high voltage JFET input
devices for low input offset voltage. The BIFET technology provides wide
bandwidths and fast slew rates with low input bias currents, input offset currents,
and supply currents.
These devices are available in single, dual and quad operational amplifiers
which are pin-compatible with the industry standard MC1741, MC1458, and the
MC3403/LM324 bipolar products. Devices with an "M" suffix are specified over
the military operating temperature range of -55° to + 125°C and those with a "C"
suffix are specified from 0° to +70°C.
• Input Offset Voltage Options of 6.0 mV and 15 mV Max

JFETINPUT
OPERATIONAL AMPLIFIERS

~
1

JGSUFFIX
CERAMIC PACKAGE
CASE 693

PSUFFIX
PLASTIC PACKAGE
CASE 626

• Low Input Bias Current: 30 pA
DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

• Low Input Offset Current: 5.0 pA
• Wide Gain Bandwidth: 4.0 MHz
• High Slew Rate: 13 V/l1s
• Low Supply Current: 1.4 rnA per Amplifier
• High Input Impedance: 1012 n

PIN CONNECTIONS
Offset Null
Inv+ Input

Representative Circuit Schematic (Each Amplifier)
Output

~B Ne
1

Vee

Noninv Input

3

6

Output

VEE

4

5

Offset Null

2

-

TL08t [Top View)

Output A

1

8

7

Vee
Output B

InputsA{ :
VEE

4

: } Inputs B

14_

TL082 [Top View)

1

N SUFFIX
CERAMIC PACKAGE
CASE 632
(TL084 Only)

ORDERING INFORMATION
OpAmp
Function

Device

Temperature
Range

TL081 ACD, CD
Single

TL081ACJG, CJG
TL081ACP, CP
TL081MJG

Dual

0° to +70°C

Ceramic DIP

-55° to + 125°C

Plastic DIP
Ceramic DIP

0° to +70°C

Ceramic DIP

TL084ACJ, CJ
Quad

TL084ACN, CN
TL084MJ

PIN CONNECTIONS

-55° to + 125°C

Plastic DIP
Ceramic DIP

SO-8

TL082ACP, CP
TL082MJG

PLASTIC PACKAGE
CASE 646
(TL084 Only)

SO-8

TL082ACD, CD
TL082ACJG, CJG

Package

J SUFFIX

0° to +70°C

Ceramic DIP
Plastic DIP

-55° to +125°C

Ceramic DIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-337

TL084 [Top View)

•

I

TL081 , TL082, TL084
MAXIMUM RATINGS

lEI

Rating

Symbol

TLOB_M

TLOB C
TLOB_AC

VCC
VEE

+18
-18

+18
-18

VID

±30

±30

V

VIDR

±15

±15

V

680
10
680
10

mW
mW/oC
mW
mW/oC

Supply Voltage
Differential Input Voltage
Input Voltage Range (Note 1)
Output Short Circuit Duration (Note 2)
Power Dissipation
Plastic Package (N, P)
Derate above TA = +47°C
Ceramic Package (J, JG)
Derate above TA = +82°C

Unit
V

Continuous

tsc

-

PD
1/8JA
PD
1/8JA

680
10

TA

-55 to + 125

oto +70

°c

Tstg

-65 to +150

-65 to + 150

°c

Operating Ambient Temperature Range
Storage Temperature Range

NOTES: 1. The magnitude of the input voltage must not exceed the magnitude of the supply voltage
or 15 V, whichever is less.
2. The output may be shorted to ground or either supply. Temperature and/or supply voltages
must be limited to ensure that power dissipation ratings are not exceeded.
ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE =-15 V, TA = Tlowto Thigh [Note 3J.)
TLOB C
TLOB_AC

TLOB_M
Characteristics

Symbol

Input Offset Voltage (RS'; 10 k, VCM = 0)
TL081 , TL082
TL084
TL08_A

VIO

Input Offset Current (VCM = 0) (Note 4)
TL08
TL08:::A

110

(Note 4)
TL08
TLOS:::A

liB

Input Bias Current (VCM = 0)

Large-Signal Voltage Gain (VO= ±1 0 V,RL" 2.0 k)
TLOS
TLOS:::A
Output Voltage Swing (Peak-to-Peak)
(RL" 10 k)
(RL" 2.0 k)

Min

Typ

Max

Min

-

-

-

-

-

-

9.0
15

-

20
20
7.5

20

-

-

5.0
3.0

-

10
7.0

-

-

-

-

-

-

-

-

-

-

-

-

50

-

-

15

-

-

-

15
25

24
20

-

-

24
20

-

Max

Unit
mV

-

AVOL

Typ

nA

nA

-

V/mV

V

Vo

-

-

-

NOTES: (continued)
3. Tlow =

-55°CforTL081M,TL082M,TL084M
Thigh = +125°CforTLOS1M,TL082M,TL084M
O°C for TLOS1C, TL081AC
Thigh = +70°C for TLOS1C, TLOB1AC
TL082C,TLOS2AC
TL082C,TLOB2AC
TLOS4C,TL084AC
TLOS4C,TLOS4AC
4. Input Bias currents of JFET input op amps approximately double for every 10°C rise in Junction Temperature as shown in Figure 3.
To maintain junction temperature as close to ambient temperature as possible, pulse techniques must be used during testing.

Figure 1. Unity Gain Voltage Follower

Figure 2. Inverting Gain of 10 Amplifier
10k

1.0k

CL = 100pF

RL = 2.0k

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-338

TL081, TL082,TL084
ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = +25°C, unless otherwise noted.)
TLOB C
TLOB_AC

TLOB_M
Characteristics

Symbol
VIO

Average Temperature Coefficient of
Input Offset Voltage
RS = 50 n, TA = Tlow to Thigh (Note 3)

t.VloIt..T

110

(Note 4)
TlOB
TlOB:::A

liB

Input Resistance

1j

Common Mode Input Voltage Range
TlOB
TlOB:::A

VICR

large-Signal Voltage Gain
(VO = ±10 V, Rl ~ 2.0 k)

AVOl
TlOS
TlOS:::A

Output Voltage Swing (Peak-to-Peak)
(Rl = 10 k)

Max

-

-

5.0
5.0
3.0

15
15
6.0

-

10

-

-

-

5.0
5.0

200
100

200

-

30
30

400
200

-

-

1012

-

-

+15,
-12

-

±10
±11

+15,
-12
+15,
-12

-

25

150

-

-

25
50

150
150

-

24

2B

-

24

28

-

80

100

-

70
BO

100
100

-

100

-

-

70
BO

100
100

-

1.4

2.B

-

1.4

2.B

-

4.0

-

MHz

13

-

V/!1S

Typ

Max

-

3.0
3.0

6.0
9.0

-

10

-

-

5.0

100

-

-

-

30

-

1012

±11

-

Input Offset Current (VCM = 0) (Note 4)
TlOB
TlOB:::A
Input Bias Current (VCM = 0)

Typ

Min

Vo

Common Mode Rejection Ratio (RS :s; 10k)
TlOS
TlOS:::A

CMRR

Supply Voltage Rejection Ratio (RS:S; 10k)
TlOS
TlOS:::A

PSRR

-

SO

-

Unit

!lV/oC

pA

-

-

-

10

-

Unity Gain Bandwidth

BW

-

4.0

Slew Rate (See Figure 1)
Vin = 10 V, Rl = 2.0 k, Cl = 100 pF

SR

S.O

13

Supply Current (Each Amplifier)

Min

mV

Input Offset Voltage (RS:S; 10k, VCM = 0)
TlOB1, Tl082
TlOB4
TLOB_A

-

pA

n
V

V/mV

-

V
dB

-

dB

mA

Rise lime (See Figure 1)

tr

-

0.1

!ls

-

10

-

-

-

-

0.1

Overshoot Factor
Vin = 20 mV, Rl = 2.0 k, Cl = 100 pF

10

-

%

Equivalent Input Noise Voltage
RS = 100 n, f = 1000 Hz

en

-

25

-

-

25

-

nV/VHz

Channel Separation
AV= 100

-

-

120

-

-

120

-

dB

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-339

TL081,TL082,TL084
Figure 3. Input Bias Current
versus Temperature

~
I-

~
ex:

10

= VCcfVE

Figure 4. Output Voltage Swing
versus Frequency
"C.

= +15 V

CJ

~

I

25
20

Il!I~I)

!'3

~

15

11111 I

=>

10

IWtL

5.0

111111

l-

"-

0.1

=>

~

-75

~
w

CJ

-25
0
25 50
75 100
TA, AMBIENT TEMPERATURE (OC)

-50

100

125

II

>

l-

10

=>

o.
~

40

I I

0.1

_ RL=2.0k
TA=25°C

c:.

CJ

z

w

....... i'"

!'3

20

/'

0

>

,/

l-

,,/

=>

"l-

=>

10

//

0

~
0.7 1.0

0.4

2.0

4.0

7.0

o

o

10

5.0

I

-e: §E 30
~
w

CJ

I

2.0

I

1.8
<'
§.

I
I
RL = 10 k

I-

20

z

--- ---- -

VccfVEE = ±15 V

1.6

w 1.4
ex:
ex:

25

=>
u 1.2
z
«ex: 1.0
c 0.8

RL=2.0k
20

~

15

I-

10

"- 0.6
"=>
m. 0.4

~ 5.0

E 0.2

o

15

Figure 8. Supply Current per Amplifier
versus Temperature

!'3
~
5

10

VCC, IVEEI , SUPPLY VOLTAGE (±V)

Figure 7. Output Voltage Swing
versus Temperature
VCcfVEE = ±15 V
See Figure 2

10M

/'

CJ

/'

0.2

1.0M

/' "

30

3:

Rt.. LOAD RESISTANCE (kQ)

1?-35

10 k
100 k
f, FREQUENCY (Hz)

I

"C.
0-

5.0 V

o

1.0 k

m

20

=>

"I-

I

.....

Figure 6. Output Voltage Swing
versus Supply Voltage

r- VCcfVEE=±15V
30 I- TA=25°C
I- See Figure 2

!'3

0

i\

111111

o

Figure 5. Output Voltage Swing
versus Load Resistance

z

TA = 25°C
See Figure 2

I-

0.01

CJ

~LI=I~~~ kll

I

z

0

;t

111111

VCcfVEE = ±15 V

m
w

CJ

'"5
~

30

3:

=>
u 1.0

"-

~

~

-50

-25
0
25
50
75
TA, AMBIENTTEMPERATURE (0C)

100

125

-50

-25
25
50
75
TA, AMBIENT TEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-340

100

125

TL081,TL082,TL084
Figure 9. Large-Signal Voltage Gain and
Phase ShiH versus Frequency

Figure 10. Large-Signal Voltage Gain
versus Temperature

~

~

~
z

:;;:

(!)

c..

0

9

106
105 ~-

:Z
w

104

0

103

c..

..:.

§2

<

VCcJVEE = ±15 V
RL =2.0k
- TA= 25°C

-..... "-

........

a:

fa

e.

.......... ~

Phase Shift

..........
100

:;:
en

45° w

.......r-...

........

Ii:

0°

......... ,Gain

101
10

w
w

r-..

102

1
1.0

1i)

loOk 10k lOOk
t, FREQUENCY (Hz)

90°

'\.
\

52
il:

1000

-

:;;:

(!)

c..

0

100

9

:Z
w
c..

0

..:.

§2

10

<

135°
180°

100M 10M

1.0

-50

~:>

1.15

~

~

c:

1.10
1.05

en
c 1.00
w

r--

N

~ 0.95

:;;

a:
0

z

0.90

-- ---

60

w

(!)

13

§2
w

i--

50
40

125

IJ~~EE~11W

,

~

r--.

-25
0
25 50
75 100
TA, AMBIENT TEMPERATURE (OC)

Figure 12. Equivalent Input Noise Voltage
versus Frequency

Figure 11. Normalized Slew Rate
versus Temperature

w

=
=

VCcJVEE =+15 V
VO=+10V
RL=2.0k

~
z

~ 30

AV=10
RS=1000
T =25°C

.....

,..........,

~
~ 20

r---...

0.85

~

10

5

0

:§
-50

-25
0
25
50
75
TA, AMBIENT TEMPERATURE (OC)

100

125

fil

0.01

0.05 0.1

j

0.5 1.0
5.0 10
t, FREQUENCY (Hz)

Figure 13. Total Harmonic Distortion
versus Frequency
1.0

£:
is

0.5

!;;

0.1

~

0.05

~

i5
9

~

..J

j$

~

r- VCcJVEE = ±15 V

~~v= 1.0
I::
= 6.0 V (RMS)
I=TA = 25°C

yo

0.01
0.005

ci

i!:

0.001
0.1

0.5

1.0

5.0
10
t, FREQUENCY (Hz)

50

100

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-341

50 100

III

TL081,TL082,TL084
Figure 14. Output Current to Voltage Transformation
for a D-to-A Converter

VC=5.0V
13

Settling time to within 1/2lSB (+19.5 mV) is approximately 4.0 Ils
from the time all bits are switched.

14
MSB AI
A2
A3
A4

Vrel

*The value 01 C may be selected to minimize overshoot and
ringing (C = 68 pF)

15
R2

VCC= 15 V

A5
AS 10
A7 11
lSB A8 12

Theoretical Vo
Vo =
Vo

Vrel

AI (RO)

[AI
A2
A3 A4
A5
A6 A7 A8]
2 + 4 + 8 + 16 + 32 + 64 + 128 + 256

Adjust Vrel, R14 or RO so that Vo wtth all digital inputs at high level
is equal to 9.961 V.
Vref = 2.0 Vdc
Rp R2 = 1.0kQ
RO =5.0 kQ

VEE = -15 V

2.0V
[1
1
Vo =m (5.0 k) 2"+""4

RO

C·

=10V[

~~~]

1

+"8

1
+ 16

1

+32

1
1
1]
+64 + 128 + 256

=9.961 V

Figure 16. Voltage Controlled Current Source

Figure 15. Positive Peak Detector

R3

Yin

1/2
Tl082

1/2

Tl082
Yin 0----1+

o--"IV"v-e-j

+
TL081

R5

r-f---QVo

lN91411.01lF

R~~J-_ _ _ _ _ _ _ _ _~

R4
Yin
II Rlthrough R4 > > R5then lout = R5

·Polycarbonate or
Polystyrene Capacitor

Figure 18. Isolating Large Capacitive Loads

Figure 17. Long Interval RC Timer

Tl081

RS
Clear

+2.0~=f

C·

-2.0V
R5

• Overshoot < 10%

·Polycarbonate or
Polystyrene Capacitor

• Is = lOllS

• When driving large Clo the Vo slew rate is determined by Cl
and 10(maxr

lime (t) = R4 Cin (VRNR-VI), % = R4, R5 = 0.1 RS
II Rl = R2: t = 0.S93 R4C

-

I!.VO 10
0.02
='" -05 ViIlS = 0.04 V/lls (wtth Cl shown)
I!.t
Cl
.

Design Example: 100 Second limer
VR= 10V C = 1.0mF R3 = R4 = 144 M
RS = 20 k R5 = 2.0 k Rl = R2 = 1.0 k

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-342

Addendum
Operational Amplifier
Application Information

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-343

OPERATIONAL AMPLIFIER APPLICATION INFORMATION

The Ideal Operational Amplifier
An ideal op amp has infinite input impedance, infinite gain, and zero output impedance. Its output is proportional to the differential
voltage between the inputs. In reality, slight mismatches between the inputs create an error voltage and current, the input
impedance is finite, requiring a small bias current, and gain and operating frequency are limited.

Ideal Op Amp

Equivalent Circuit for Actual Op Amp

+
Vi

+

+
aVi

ISias

Vo

Vi

1-

-=-

Ro

zin

+
Vo

O---'--~-----r~

-=a-

co

zin --+
Zo = 0

00

ESC Protection
Newer Motorola devices are equipped with either electrostatic discharge (ESD) diodes or CEO clamps on the inputs to increase
their reliability. ESD diodes are connected with the anode attached to the input and the cathode to Vec. During normal operation,
the diode should be transparent to the user. However, if the input exceeds VCC by more than a diode drop, the ESD diode will be
forward biased and will provide a current path from the input to VCC. Unless the current is limited externally the device could be
damaged from overheating.
An alternate scheme uses a CEO transistor clamp with the collector connected to the input and the emitter and base connected
to VEE. This ESD protection method is totally transparent to the user. Although it is not recommended that the inputs be allowed to
exceed VCC, the CEO clamp will not affect device operation. The inputs should never exceed VEE, with or without ESD protection.
Single supply op amps are particularly sensitive to damage in a reverse bias condition.
If ESD protection is used on an amplifier, the ESD scheme used will be identified in the data sheet.

CEO Clamps

ESD Diodes

+Vcc

+Vcc

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA

2-344

JFET Inputs versus Bipolar Inputs
Although JFET input op amps are generally associated with high speed, there are now bipolar input op amps with comparable
slew rates. JFETS do offer higher input impedance and lower input bias current than a typical bipolar input. But for the lowest noise
and offset voltage a bipolar input op amp is a better choice. A bipolar input is also required for true single supply operation. Any op
amp can be operated with one supply. But the common mode input voltage range of a single supply op amp includes ground.

Phase Reversal
Most op amp data sheets describe both a maximum input
voltage and a minimum common mode input voltage range for
the device. The input voltage limit given in the Maximum
Ratings Table is considered to be the highest voltage that can
be applied without damaging the device. It does not guarantee
the device will function normally or within the given electrical
specifications. The input common mode voltage range (VICR),
on the other hand, provides the maximum input voltage (for the
conditions listed) for normal operation. Exceeding the input
common mode range may cause the device to exceed the
electrical specifications, latch or go into phase reversal. (As
shown in figure at right.)
In a latch condition, the op amp output goes to one of the
supply rails, and will remain in that state until the power is
removed and reapplied with the error condition corrected. In
phase reversal, a normal output low would be seen as an
output high, but phase reversal will self correct once the input drops below a certain level. The input voltage required for phase
reversal to occur varies, but it is usually seen if the input voltage approaches or exceeds the supply voltage. As you can see in the
figure the output is clipping on the negative peaks, and phase reversing on the positive peaks. But as the input drops on the negative
going part of the waveform, the output returns the the correct state without powering down the device.

Thermal Considerations
Thermal resistance (8JA) information is given on most packages in the back of the data book. Low power op amps can handle a
short circuit current condition indefinitely. Since some ofthe higher current drive op amps can deliver a hundred milliamps to an amp
in a short circuit condition, extra care is needed to ensure that the maximum junction temperature of the part is not exceeded.
TJ = TA + PDQJA
TJ = Junction Temperature (Should not exceed t50°C in a plastic package)
TA = Ambient Temperature
PD = Power Dissipation
QA = Package Thermal Impedance

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-345

Stability and Compensation
Most op amps are internally compensated, enabling them to be used in a unity gain configuration. UncompensC!ted or
decompensated amplifiers have a higher slew rate if no external compensation capacitor is used, but must either be used in a gain
of 2 or more or with positive feedback to ensure stable operation. When externally compensating an amplifier, use a capacitor equal
or greater than the value recommended in the data sheet. Since the external loop affects the stability of the op amp, the amplifier
needs to be evaluated in the circuit and over temperature to determine the minimum amount of compensation required.
Insufficient compensation will cause a high frequency oscillation - higher than the unity gain frequency of the device. This high
frequency oscillation is indicative of an instability in the Miller loop, internal to the device. Lower frequency oscillation (below the
unity gain frequency of the amplifier) is generally caused by an instability in the outer loop.
The two primary causes of low frequency oscillation are capacitive loading on the output and high differential source resistance.
Capacitive loading, which can be either distributed capacitance or an actual load capacitor, can be a problem with as little as 100 pF.
Sensitivity to load capacitance varies from op amp to op amp and is not always given in the data sheets. To compensate for
capacitive loading, add a small resistor in series with the output. Depending on the load and the external loop, 10 n to 100 n is
generally sufficient (see Figure A). For high capacitive loading, (CL>1500 pF) a capacitor in the feedback loop may also be
necessary (see Figure 8).
Keeping the differential source resistance low not only limits the noise generated in the circuit, but avoids stability problems as
well. Most op amps are stable with a source resistance of up to 2k n, but that varies from op amp to op amp. The differential source
resistance (which includes any feedback resistance) combines with the input capacitance of the op amp to create a low frequency
pole. The higher the resistance, the more likely you are to have an oscillation problem. Adding a small capacitor in parallel with the
feedback resistor may solve the problem (see Figure C). The capacitor should be greater than the input capacitance of the op amp
which is typically about 10 pF.

Figure A. Compensation Circuit
for Moderate Capacitive Loads

Figure B. Compensation Circuit
for High Capacitive Loads

R2

R2

RC
Rl

RC

+

Rl

Figure C. Compensation for
High Source Impedance
R2

Cc

Rl

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-346

Layout Considerations
Higher frequency op amps may require special attention to layout. Since most layout problems are not reflected in computer
simulations, it is worth it to follow proper layout rules consistently. Some suggestions:

• Always bypass the supply pins with at least 0.01 IlF to ground, whether or not it is a high frequency application.
Some amplifiers have a much lower power supply rejection with respect to the negative supply than to the
positive supply due to the internal compensation. A larger bypass capacitor from VEE to ground may be used
to prevent high frequency transients from appearing on the output. Generally 10 IlF to 20 IlF is sufficient.
• Make sure you have a good ground plane.
• Keep AC and DC grounds separate.
• Don't use proto boards or wire wrap for high frequency circuits.
• Use appropriate external components -

avoid electrolytics in high frequency paths.

• Keep high frequency paths short (including the leads on discrete components).
• Ground the inputs of unused op amps.

Test Information

A) Without Buffer Amplifier

The following circuit can be used to test V 10, 110, and II B.
Op Amp A is the device under test, and Op Amp B is a
buffer amplifier which reduces CMRR errors and improves
the accuracy of the measurement. The 30 nF capacitors
across the 10k Q source resistors are for stability and may
not be needed.

50kn

A

son

B) With Buffer Amplifier
50kn

1.6nF

A
100ka

son

B

>---+----0---0 Vo

+

son

VIO can be measured directly with SWI and SW2 closed.
To determine IIB-:

To determine IIB+:

• Measure VIO wHh both switches close,

• Close SWI and open SW2; Measure VI02

• Open SWI only; Measure VIOl

110 equals the difference between IIB+ and IIB-

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

2-347

Vo

1111

GLOSSARY
Input Offset Voltage (VIO) - The voltage which must be
applied between the inputs of an op amp to obtain a zero
output voltage. For an ideal op amp, VIO would be zero. Some
vendors abbreviate it VOS.

Power Supply Rejection Ratio (PSR or PSRR) - The ratio
of the change in VIO to the change in power supply voltage.
Measures the immunity of the amplifier to changes in power
supply voltage.

Input Bias Current (118) - Thecurrentflowing in orout of both
inputs of an op amp. JFET input op amps provide the lowest
input bias current; typically in the picoamp range. A bipolar
input op amp is typically in nanoamps. 118 is highly sensitive to
slight process variations and can vary an order
of magnitude.

Output Short Circuit Current (ISC) - The maximum current
an amplifier can deliver into a short circuit. Care must be
exercised to ensure the maximum junction temperature of the
device is not exceeded to prevent damage to the device.

Input Offset Current (110) -Ideally, the bias currents on the
two inputs are equal. The input offset current is the difference
between the two currents when the output is at zero volts.
Sometimes abbreviated lOS. This should not be confused with
the output short circuit current (lSC).
Input Common Mode Voltage Range (VICR) - The
maximum input voltage range for normal operation within
given specifications. Exceeding the input common mode
range generally will not damage the inputs if the maximum
ratings are not exceeded. However, VIO may not meet the
specification given in the data sheet and phase reversal may
occur as the input voltage approaches VCC or VEE.
Sometimes abbreviated VCM.
Common Mode Rejection Ratio (CMR or CMRR) - CMRR
is defined as the ratio of the common mode gain to the
differential mode gain. It is also equal to the ratio of the input
common mode voltage to the peak-to-peak change in VIO.
Measures the ability of an op amp to reject a signal present at
both inputs simultaneously. May be given in d8 or volts
per volt.

Supply Current (10 or ICC) - The operating current required
with no load and with the output at zero volts.
Slew Rate (SR) - The rate of change of the output voltage in
response to a large amplitude pulse applied to the input. The
slew rate determines the power bandwidth of the device.
Gain Bandwidth Product (G8W) - The product of the
closed loop gain times the frequency response at a given
frequency. For an op amp with a single pole roll-off, the gain
bandwidth product is equal to the unity gain frequency.
Phase Margin (I\lM) -180° minus the phase shift at the unity
gain frequency of the device. The phase margin must be
positive for unconditionally stable operation. Phase margin
(and stability) are affected by the external circuit, particularly
the capacitive loading on the output and the differential source
resistance on the input.
Channel Separation (CS) - A measurement of the immunity
of one op amp to a signal present on another amplifier in a dual
or quad.
Power Bandwidth (8WP) - The frequency at which the
output starts to clip or distort at maximum peak to peak
input voltage.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
2-348

Power Supply Circuits

In Brief ...
Page
In most electronic systems some form of voltage regulation is required. In the past, the task of voltage regulator design was tediously accomplished with discrete devices, and
the results were quite often complex and costly. Today, with
bipolar monolithic regulators, this task has been significantly
simplified. The designer now has a wide choice of fixed, low
Vdiff, adjustable, and tracking series-type voltage regulators.
These devices incorporate many built-in protection features,
making them virtually immune to the catastrophic failures
encountered in older discrete designs.
The Switching Power Supply continues to increase in
popularity and is one of the fastest growing markets in the
world of power conversion. They offer the designer several
important advantages over linear series-pass regulators.
These advantages include significant advancements in the
areas of size and weight reduction, improved efficiency, and
the ability to perform voltage step-up, step-down, and
voltage-inverting functions. Motorola offers a diverse
portfolio of full featured switching regulator control circuits
which meet the needs of today's modern compact electronic
equipment.
Power supplies, MPu/MCU-based systems, indust- rial
controls, computer systems and many other product
applications are requiring power supervisory functions
which monitor voltages to ensure proper system operation.
Motorola offers a wide range of power supervisory circuits
that fulfill these needs in a cost effective and efficient
manner. MOSFET drivers are also provided to enhance
the drive capabilities of first generation switching regulators
or systems deSigned with CMOSfTTL logic devices. These
drivers can also be used in DC-to-DC converters, motor
controllers or virtually any other application requiring high
speed operation of power MOSFETs.

Linear Voltage Regulators
Fixed Output .................................. 3-2
Adjustable Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-4
Special Regulators ............................... 3-5
Switching Regulator Control Circuits
Single-Ended ................................. 3-6
Double-Ended . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-9
Special Switching Regulator Controllers
Dual Channel Current Mode . . . . . . . . . . . . . . . . . . .. 3-10
Universal Microprocessor Power Supply ......... 3-10
Power Factor Controllers ...................... 3-11
Power Factor Controllers ......................... 3-12
Power Supervisory Circuits
Overvoltage Crowbar Sensing ..................
Over/Undervoltage Protection ..................
Undervoltage Sensing .........................
Microprocessor Voltage Regulator
and Supervisory ............................
Universal Voltage Monitor ......................

3-13
3-13
3-14
3-15
3-15

MOSFET Drivers
High Speed Dual Drivers. . . . . . . . . . . . . . . . . . . . . .. 3-16
Alphanumeric Listing. . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-17
Related Application Notes ........................ 3-19
Data Sheets .................................... 3-20
Linear and Switching Voltage Regulator
Applications Information ....................... 3-549

Linear Voltage Regulators
Fixed Output
These low cost monolithic circuits provide positive and/or
negative regulation at currents from 100 mA to 3.0 A. They are
ideal for on-card regulation employing current limiting and
thermal shutdown. Low Vdiff devices are offered for battery
powered systems.

Although designed primarily as fixed voltage regulators,
these devices can be used with external components to obtain
adjustable voltages and currents.

Fixed-Voltage, 3-Terminal Regulators for Positive or Negative Polarity
Power ~UI"''''IIC:;'

(1) ciutput Voltage Tolerance for Worst Case
(2) TJ = -40" to +125"C

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-2

Fixed-Voltage, 3-Terminal Regulators for Positive or Negative Polarity
Power Supplies (continued)
Vout
(V)

Tol,(1)
(V)

6.0

±0.3

10
(mA)
Max

Output Device
Positive
MC78M06C

-

8.0/35

100

MC7806S(2)

-

9.0/35

120

Suffix!
Package

1.0

T

0.7

8.0/35

-

8.6/35

11

100

±0.3

LM340-6

-

8.0/35

60

60

MC7BL08C

-

9.7/30

200

80

-

MC78LOBAC

-

160

1.0

±0.8

100

500

MC78M08C

-

10/35

100

MC7B08S(2)

-

11.5/35

160

MC790BC

T

MC7BOBAC

13

100

LM340-8

-

10.6/35

±0.4

10.5/35

BO

BO

3000

MC78T08C

-

10.4/35

35

30

0.16

1500

MC7B09C

-

11.5/35

50

50

1.0

-

±0.12

BOO

MC33269-12

± 1.2

100

MC78L12C

MC79L12C

MC78L12AC

MC79L 12AC, AS

500

MC78M12C

MC79M12C

1500

MC7812S(2)

MC7912C

DT, T

10.5/35

±0.3

± 0.39

P

175

1500

MC7B12C

13/20

0.3%

0.5%

-

13.7/35

250

100

-

14/35

100

240

15.5/35

240

T
D,DT
P, D

1.0

DT, T

1.5

T

0.15

KC

0.24

T

14.5/35

±0.5

MC7B12AC

-

14.B/35

18

100

±0.6

LM340-12

-

14.5/35

120

120

±0.5

LM340A-12

-

18

32

±0.24

TL780-12C

-

5.0

MC7BT12C

-

45

30

MC7BT12AC

-

1B

25

300

150

-

17/35

100

300

1.0

DT, T

1B.5/35

300

1.B

T

± 0.6

3000

± 0.5
± 1.5

100

MC7BL15C

MC79L15C

MC78L15AC

MC79L 15AC, AS

500

MC7BM15C

MC79M15C

1500

MC7815S(2)

±0.75

MC7B15C

MC7915C

16.7/35

±0.6

MC7815AC

-

17.9/35

22

100

LM340-15

-

17.5/35

150

150

±0.6

LM340A-15

22

35

±0.3

TL7BO-15C

-

3000

±0.6
± l.B
± 0.9

MC7BT15C
MC7BT15AC

100

17.5/40

MC7BL1BC

MC79L1BC

MC7BL18AC

MC79L1BAC

19.7/35

15

60

0.1B

KC

55

30

0.3

T

22

25

325

170

-

P

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-3

P,D

17.5/35

±0.75

±0.75

18

MC7906C

Typ

(mV/'C)

MC7B06AC

±0.6

15

120

500

MC7BOBC

12

Regload
(mV)

± 0.24

±0.4

9.0

Negative

Regline
(mV)

1500

MC7B06C

8.0

AVOI!1T
Vin
MiniMax

..

Fixed-Voltage, 3-Terminal Regulators for Positive or Negative Polarity
Power Supplies (continued)
;' . >

YaLII • .•.
IV) .•
18

·• ··.}~~r). ·.•
±0.9

10.·,·.• · .,i

(mAl·
Max

'. .

<

..Outp~Devic~·· .; . . . ••••.•. . >.

. . . >i .~r1.iU
I~MI~Jhax·.·." I··iL
• ··~(~%'e;

T<.~osltl~e>.~egative .> I·

p{~V)'a

••

500

MC78M18C

-

20/35

100

1500

MC7818S(2)

-

22/35

360

±0.7

MC7818C

±0.9

MC7918C

V

360

1.0

T

2.3

21/35

MC7818AC

-

31

LM340-18

-

180

180

-

22/40

10

400

1.1

T

25.7/40

350

200

-

P

480

1.2

T

20

±1.0

500

MC78M20C

24

±2.4

100

MC78L24C

MC79L24C

MC78L24AC

MC79L24AC

±1.2

Il ol"'t I• ·Suffix(
. i Multiplier

3L_~ _ _ _ _ _ _
Gnd

6

Compensation

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-11

I
I
I
I

..

Power Factor Controllers
MC34262D, PTA = 0° to + 85°C, Case 751, 626
MC33262D, PTA = -40° to +105°C, Case 751,626
The MC34262, MC33262 series are active power factor
controllers specifically designed for use as a preconverter in
electronic ballast and in off-line power convertor applications.
These integrated circuits feature an internal start-up timer for
stand alone applications, a one quadrant multiplier for near
unity power factor, zero current detector to ensure critical
conduction operation, transconductance error amplifier,
quickstart circuit for enhanced start-up, trimmed internal
bandgap reference, current sensing comparator, and a totem
pole output ideally suited for driving a power MOSFET.

Also included are protective features consisting of an
overvoltage comparator to eliminate runaway output voltage
due to load removal, input undervoltage lockout with
hysteresis, cycle-by-cycle current limiting, multiplier output
clamp that limits maximum peak switch current, an RS latch
for single pulse metering, and a drive output high state clamp
for MOSFET gate protection. These devices are available in
dual-in-line and surface mount plastic packages.

Vo
330 400V/O.44A

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-12

Power Supervisory Circuits
A variety of Power Supervisory Circuits are offered. Overvoltage sensing circuits which drive "Crowbar" SCRs are provided
in several configurations from a low cost three-terminal version to a-pin devices which provide pin-programmable trip voltages or
additional features, such as an indicator output drive and remote activation capability. An over/undervoltage protection circuit is
also offered.

Overvoltage Crowbar Sensing Circuit
MC3523U TA = -55° to +125°C, Case 693
MC3423P1, UTA = 0° to +70°C, Case 626,693

Vee

This device can protect sensitive
circuitry from power supply transients or
regulator failure when used with an external
"Crowbar" SCA. The device senses
voltage and compares it to an internal 2.6 V
reference. Overvoltage trip is adjustable by
means of an external resistive voltage
divider. A minimum duration before trip is
programmable with an external capacitor.
Other features include a 300 rnA high
current output for driving the gate of a
"Crowbar"
SCR,
an open-collector
indicator output and remote activation
capability.

r--------1

1
1
1
1

Sense 1

1

1
1
1
1

IL_.~.-'-'-"
.....•..•
VEE
Activation

Over/Undervoltage Protection Circuit
MC3425P1 TA = 0° to +70°C, Case 626
The MC3425 is a power supply
supervisory circuit containing all the
necessary functions required to monitor
over and undervoltage fault conditions.
This device features dedicated over and
undervoltage sensing channels with
independently programmable time delays.
The overvoltage channel has a high current
Drive Output for use in conjunction with an
external SCR "Crowbar" for shutdown. The
undervoltage channel input comparator
has hysteresis which is externally programmable, and an open-collector output for
fault indication.

Inpul Section

UV OV
DLY DLY

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-13

Output Section

Power Supervisory Circuits

(continued)

Undervoltage Sensing Circuit
MC34064P-5,
MC33064P-5,
MC34164P-3,
MC33164P-3,

0-5 TA =
0-5 TA =
P-5, 0-3,
P-5, 0-3,

0° to +70°C, Case 29, 751
-40° to +85°C, Case 29,751
0-5 TA = -00 to +70°C, Case 29,751
0-5 TA = -40° to +85°C, Case 29,751

The MC34064 and MC34164 are two families of
undervoltage sensing circuits specifically designed for use as
reset controllers in microprocessor-based systems. They
offer the designer an economical solution for low voltage
detection with a single external resistor. Both parts feature a
trimmed bandgap reference, and a comparator with precise
thresholds and built-in hysteresis to prevent erratic reset
operation.
The two families of undervoltage sensing circuits taken
together, cover the needs of the most commonly specified
power supplies used in MCUlMPU systems. Key parameter
specifications of the MC34164 family were chosen to
complement the MC34064 series. The table summarizes
critical parameters of both families. The MC34064 fulfills the
needs of a 5.0 V ± 5% system and features a tighter hysteresis
specification. The MC34164 series covers 5.0 V ± 10% and
3.0 V ± 5% power supplies with significantly lower power
consumption, making them ideal for applications where
extended battery life is required such as consumer products
or hand held equipment.

MC340641MC33064

MC34164/MC33164

Input
Reset
1(1)

Pin numbers
in parenthesis
are for Ihe
osuffix SO·8
package.

~

= Sink Only PosHive True Logic

Applications include direct monitoring of the 5.0 V MPUI
logic power supply used in appliance, automotive, consumer,
and industrial equipment.
The MC34164 is specifically designed for battery powered
applications where low bias current (1/25th ofthe MC34064's)
is an important characteristic.

4.6

0.02

10

1.01010

4.3

0.09

7.0

1.01012

20).LA
al
Vin=5.0V

1---+----+----1-----+----+----.......------+----1
3.0V±5%

2.7

0.06

6.0

1.01012

Note: MC34X64 devices are specified to operate from 0' to +70'C, and MC33X64 devices operate from -40' to +S5'C.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-14

15 ).LA
al
Yin ~3.0 V

Microprocessor Voltage Regulator and Supervisory Circuit
MC34160P TA = 0° to +70°C, Case 648C
MC33160P TA = -40° to +85°C, Case 648C
The MC34160 Series is a voltage regulator
and supervisory circuit containing many of the
necessary monitoring functions required in
microprocessor based systems. It is specifically
designed for appliance and industrial applications
offering the designer a cost effective solution with
minimal external components. These integrated
circuits feature a 5.0 V, 100 mA regulator with
short circuit current limiting, pinned out 2.6 V
bandgap reference, low voltage reset comparator, power warning comparator with programmable hysteresis, and an uncommitted comparator ideally suited for microprocessor line
synchronization.
Additional features include a chip disable input
for low standby current, and internal thermal
shutdown for over temperature protection.
These devices are contained in a 16 pin
dual-in-line heat tab plastic package for improved
thermal conduction.

r;~=::::;:Tr:;:C--Ir1, Regulator

VCC

c

11 Output

Chip
Disable

Reference
16 Output
Power
Warning

Power
Sense
Hysteresis
Adjust
Noninverting
Input

>'Sf7±7±---f-o Comparator

Inverting
Input

Output

Universal Voltage Monitor
MC34161P, D TA = 0° to +70°C, Case 626, 751
MC33161 P, D TA = -40° to +85°C, Case 626, 751
The MC34161 series of Universal Voltage
Monitor ICs are capable of being used in a wide
variety of voltage sensing applications. These
versatile deVices offer an economical solution for
implementing over, under, and window detection
of both positive and/or negative voltages.
The circuit consists of two comparator
channels each with hysteresis, a pinned out 2.54
V reference, two open collector outputs capable
of sinking in excess of 10 mA, and a "Mode
Select" input for programming the functions of the
two comparator channels. The devices are fully
functional from 2.0 V to 40 V for positive voltage
sensing and from 4.0 V to 40 V for negative
voltage sensing.

Mode Select
Output 1
Input 1

Input 2

o--ha

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-15

Output 2

MOSFET Drivers
High Speed Dual Drivers
Inverting
MC34151P, 0 TA = 0° to +70°C, Case 626, 751
MC33151P, 0 TA = -40° to +85°C, Case 626,751

Noninverting
MC34152P, D TA = 0° to +70°C, Case 626,751
MC33152P, D TA = -40° to +85°C, Case 626,751

These two series of High Speed Dual MOSFET Driver ICs
are specifically designed for applications requiring low current
digital circuitry to drive large capacitive loads at high slew
rates. Both series feature a unique undervoltage lockout
function which puts the outputs in a defined low state in an
undervoltage condition. In addition, the low on-state
resistance of these bipolar drivers allows significantly higher
output currents at lower supply voltages than with competing
drivers using CMOS technology.
The MC34151 series is pin-compatible with the MMH0026
and DS0026 dual MOS clock drivers, and can be used as
drop-in replacements to upgrade system performance. The
MC34152 noninverting series is a mirror image of the inverting
MC34151 series.
These devices can enhance the drive capabilities of first
generation switching regulators or systems designed with
CMOSfTTL logic devices. They can be used in DC-to-DC
converters, motor controllers, capacitor charge pump
converters, or virtually any other application requiring high
speed operation of power MOSFETs.

logic
InputA 2

logic
Input B 4

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-16

Drive
7 Output A

Drive
5 OutputB

Linear Voltage Regulators
Device

Function

Page

LM317*
LM317L
LM317M
LM323,323A
LM337*
LM337M
LM340,A Series
LM350
LM2931 Series#
LM2935#
LM2950, 2951
MC1468,1568
MC1723, 1723C
MC7800 Series*
MC78LOO,A Series
MC78MOO Series
MC78TOO Series
MC7900*
MC79LOO,A Series
MC79MOO Series
MC34160, 33160
TL780 Series

Three-Terminal Adjustable Output Positive Voltage Regulators
Three-Terminal Adjustable Output Voltage Regulator. . . . . . . . . . . . . . . ..
Three-Terminal Adjustable Output Positive Voltage Regulator .........
Positive Voltage Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Three-Terminal Adjustable Output Negative Voltage Regulator ........
Three-Terminal Adjustable Output Negative Voltage Regulator ........
Three-Terminal Positive Voltage Regulators .........................
Three-Terminal Adjustable Output Positive Voltage Regulator .........
Low Dropout Voltage Regulators ..................................
Low Dropout Dual Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Micropower Voltage Regulators ...................................
Dual ±15 Volt Tracking Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Voltage Regulators ..............................................
Three-Terminal Postive Voltage Regulators .........................
Three-Terminal Low Current Positive Voltage Regulators .............
Three-Terminal Medium Current Positive Voltage Regulators ..........
Three-Ampere Positive Voltage Regulators .........................
Three-Terminal Negative Voltage Regulators ........................
Three-Terminal Low Current Negative Voltage Regulators ............
Three-Terminal Negative Voltage Regulators ........................
Microprocessor Voltage Regulator and Supervisory Circuit ............
Three-Terminal Positive Voltage Regulators .........................

3-20
3-28
3-73
3-36
3-42
3-81
3-49
3-65
3-88
3-95
3-98
3-99
3-105
3-125
3-137
3-144
3-152
3-161
3-170
3-175
3-322
3-482

Switching Regulator Control
MC33262
MC33267#
MC33269
MC34023, 33023
MC34025, 33025
MC34060
MC34060A, 35060A, 33060A
MC34063A, 35063A, 33063A
MC34066, 33066
MC34067,33067
MC34129,33129
MC34161,33161
MC34163,33163
MC34164,33164
MC34166,33166*#
MC34167,33167*#
MC34261, 33261
MC34268
MC44602
SG3525A, 3527 A
SG3526

Power Factor Controller ..........................................
Low Dropout Regulator ...........................................
Low Dropout Positive Voltage Regulator Series ......................
High Speed Single-Ended PWM Controller ..........................
High Speed Double-Ended PWM Controller .........................
Switchmode Pulse Width Modulation Control Circuit .................
Precision Switch mode Pulse Width Modulator Control Circuits .........
DC-to-DC Converter Control Circuits ...............................
High Performance Resonant Mode Controller .......................
High Performance Resonant Mode Controller .......................
High Performance Current Mode Controller .........................
Universal Voltage Monitor ........................................
Power Switching Regulators ......................................
Micropower Undervoltage Sensing Circuits .........................
Power Switching Regulator .......................................
Power Switching Regulator .......................................
Power Factor Controllers .........................................
SCSI-2 Three-Terminal Voltage Regulator ..........................
High Performance Current Mode Controller .........................
Pulse Width Modulator Control Circuits .............................
Pulse Width Modulation Control Circuit .............................

'Selected voltages also available in D2PAK as case number 936 or 936A.
#Also available with lead formed packages as case numbers 314A and 3148.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-17

3-399
3-187
3-182
3-187
3-203
3-219
3-231
3-243
3-270
3-278
3-293
3-329
3-343
3-356
3-362
3-375
3-388
3-414
3-419
3-435
3-441

Switching Regulator Control

(Continued)

Device

Function

TL494
TL594
UC3842A, 43A,
UC2842A, 43A
UC3842B, 43B,
UC2842B, 43B
UC3844, 45, UC2844, 45
UC3844B, 45B
UC2844B,45B
JlA78S40

Switchmode Pulse Width Modulation Control Circuits ................ 3-460
Precision Switch mode Pulse Width Modulation Control Circuit ......... 3-471
High Performance Current Mode Controller ......................... 3-488

Page

High Performance Current Mode Controllers ........................ 3-501
High Performance Current Mode Controllers ........................ 3-515
High Performance Current Mode Controllers ........................ 3-528
Universal Switching Regulator Subsystem .......................... 3-508

Special Switching Regulator Controllers
MC34065-H,L,33065-H,L
MC34360
MC34361
TCA5600/5600

High Performance Dual Channel Current Mode Controller ............
High Voltage Switching Integrated Controller ........................
High Voltage Switching Integrated Controller ........................
Universal Microprocessor Power Supply/Controller ..................

3-257
3-417
3-418
3-449

Power Factor Correction Controllers
MC34261, 33261
MC34262, 33262

Power Factor Controllers ......................................... 3-388
Power Factor Controllers ......................................... 3-399

Power Drivers
MC34151, 33151
MC34152,33152

High Speed Dual MOSFET Drivers ................................ 3-306
High Speed Dual MOSFET Drivers ................................ 3-314

Power Supervisory
MC3423, 3523
MC3425
MC34064, 33064
MC34160, 33160
MC34164,33164

Overvoltage "Crowbar" Sensing Circuit ........... , ................
Power Supply Supervisoty/Over and Undervoltage Protection Circuit ...
Undervoltage Sensing Circuit .....................................
Microprocessor Voltage Regulator and Supervisory Circuit ............
Micropower Undervoltage Sensing Circuits .........................

3-111
3-117
3-252
3-307
3-342

ADDENDUM
Linear & Switching Voltage Regulator Applications Information ................................ 3-549

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-18

RELATED APPLICATION NOTES
Related Device

App Note

Title

AN703

Designing Digitally-Controlled Power Supplies .................... MC1466, MC1723

AN719

A New Approach to Switching Regulators ........................ General

AN1040

Mounting Techniques for Power Semiconductors .................. LM317, LM337,
MC7800, MC78MOO,
MC7900, MC78MOO

AN920

Theory and Applications of the MC34063 and J.lA78S40
Switching Regulator Control Circuits ........................... IlA78S40

AN976

A New High Performance Current-Mode Controller Teams
Up with Current Sensing Power MOSFETs ..................... MC34129

AN983

A Simplified Power Supply Design Using the TL494
Control Circuit .............................................. TL494

ANE424

50 W Current Mode Controlled Offline Switch mode Power
Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. UC3842A, UC2842A
UC3843A, UC2843A

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-19

I

..

I

I

MOTOROLA

LM317

SEMICONDUCTOR-----TECHNICAL DATA

Three..Terminal Adjustable Output
Positive Voltage Regulators
The LM317 is an adjustable 3-terminal positive voltage regulator capable of
supplying in excess of 1.5 A over an output voltage range of 1.2 V to 37 V. This
voltage regulator is exceptionally easy to use and requires only two external
resistors to set the output voltage. Further, it employs internal current limiting,
thermal shutdown and safe area compensation, making it essentially blow-out
proof.
The LM317 serves a wide variety of applications including local, on card
regulation. This device can also be used to make a programmable output
regulator, or by connecting a fixed resistor between the adjustment and output,
the LM317 can be used as a precision current regulator.

THREE-TERMINAL
ADJUSTABLE POSITIVE
VOLATGE REGULATOR
SILICON MONOLITHIC
INTEGRATED CIRCUIT

TSUFFIX
PLASTIC PACKAGE
CASE 221A

• Output Current in Excess of 1.5 A

Pin 1. Adjust
2. Vou!
3. Vin

• Output Adjustable between 1.2 V and 37 V
e Internal Thermal Overload Protection
• Internal Short Circuit Current Limiting Constant with Temperature

Heatsink surface connected
to Pin 2

• Output Transistor Safe-Area Compensation
• Floating Operation for High Voltage Applications
• Standard 3-Lead Transistor Package
• Eliminates Stocking Many Fixed Voltages

STANDARD APPLICATION

Vin
LM317

.

IAdj~

Rl
240
Adjust

.

+ Co
I!1F
'

Cin
O.I!1F
/0

Vout

~R2
ORDERING INFORMATION
Device

• = Cin is required if regulator is located an appreciable distance from power supply filler.
.. = Co is not needed for stability, however, it does improve transient response.

LM317T
LM317BT#

Since IAdj is controlled to less than 100 !lA. the error associated with this term is negligible
in most applications.

Package

TJ = 0' to +125'C

Plastic Power

TJ = -40' to +125'C

Plastic Power

# Automotive temperature range selections are
available with special test conditions and
additional tests.
Contact your local Motorola sales office
for information.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-20

Tested Opearting
Temperature Range

LM317
MAXIMUM RATINGS
Symbol

Value

Unit

VI-Va

40

Vdc

Power Dissipation

Po

Internally
Limited

W

Operating Junction Temperature Range
LM317

TJ

Rating
Input-Output Voltage Differential

°C
Oto+125

Storage Temperature Range

Tstg

-65 to +150

°C

ELECTRICAL CHARACTERICISTICS (VI-Va ~ 5.0 V; 10 ~ 0.5 A for K and T packages; TJ ~ Tlow to Thigh [see Note 1];
Imax and P max per Note 2; unless otherwise noted.)
LM317
Characteristics

Figure

Symbol

Line Regulation (Note 3)
TA ~ 25°C, 3.0 V" VI-Va" 40 V

1

Regline

Load Regulation (Note 3)
TA ~ 25°C, 10 mA" 10" Imax
Va" 5.0 V
VO<:5.0V

2

Regload

Thermal Regulation (TA
20 ms Pulse

~

-

+25°C)

Typ

Max

Unit

-

0.01

0.04

%IV

-

5.0
0.1

25
0.5

%IVO

-

0.03

0.07

%/W

Min

mV

3

IAdj

-

50

100

llA

Adjustment Pin Current Change
2.5 V" VI-Va" 40 V
10 mA" IL" Imax, PO" Pmax

1,2

illAdj

-

0.2

5.0

llA

Reference Voltage
3.0 V" VI-Va" 40 V
10 mA" 10" Imax , PO" Pmax

3

Vref

1.2

1.25

1.3

V

Line Regulation (Note 3)
3.0 V" VI-Va" 40 V

1

Regline

-

0.02

0.07

%IV

Load Regulation (Note 3)
10 mA" 10" Imax
VO,,5.0V
Va <: 5.0 V

2

Regload
-

20
0.3

70
1.5

Temperature Stability (Tlow "TJ" Thigh)

3

TS

-

0.7

-

Minimum Load Current to
Maintain Regulation (VI-Va

3

ILmin

-

3.5

10

Maximum Output Current
VI-Va" 15 V, Po" Pmax
T Package
VI-Va ~ 40 V, Po" Pmax , TA ~ 25°C
T Package

3

Imax
1.5

2.2

-

RMS Noise, % of Va
TA~ 25°C, 10 Hz"f,; 10 kHz

-

Adjustment Pin Current

Ripple Rejection, Va

~

~

10 V, f

mV

%IVO
%IVO
mA

40 V)

~

A

0.4

-

-

0.003

-

66

65
80

-

-

0.3

1.0

-

5.0

-

0.15

4

120 Hz (Note 4)

N
RR

WithoutCA~
CAdj ~ 10 II

Long-Term Stability, TJ ~ Thigh (Note 5)
TA~ 25°C for Endpoint Measurements

3

Thermal Resistance Junction to Case
T Package

-

S
RSJC

%IVO
dB

%/1.0 k
Hrs.
°C/W

NOTES: 1. TlowtoThigh~OOto+125°C
2. Imax ~ 1.5 A
Pmax ~ 20 W
3. Load and line regulation are specified at constant junction temperature. Changes in Va due to heating effects must be taken into
account separately. Pulse testing with low duty cycle is used.
4. CAdj, when used, is connected between the adjustment pin and ground.
5. Since Long-Term Stability cannot be measured on each device before shipment, this specification is an engineering estimate of
average stability from lot to lot.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-21

LM317
SCHEMATIC DIAGRAM
.-~----~------~r---~~~~--------------------~--'-------~---'~~Vin

6.3V

13K
6.3V

105
4

0.1
~*-~~--~--~~--~-*~--*-~~~--~------~~*-------------~--~~--o~rn

L----------------------------------o Adjust

Figure 1. Line Regulation and LlIAdjlLine Test Circuit

Vcc

Une Regulation (%N) = VOvH- VOL x 100
OL

~H

Vorn

VOL

~~--+-----~----------~~

Adjust

R1

240
1%

• Pulse Testing Required:
1% Duty Cycle
is suggested.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-22

LM317
Figure 2. Load Regulation and L\IAdj/Load Test Circuit
Load Regulation (mV) =Va (min Load) -Va (max Load)
Load Regulation (%NO) =

Va (min Load) - Va (max Load)
Va (min Load)

X 100
I

Vout

LM317

I
Va (min Load)
U Va (max Load)

RL
(max Load)

Adjust

RL
(min Load)

* Pulse Testing Required:
1% Duty Cycle is suggested.

Figure 3. Standard Test Circuit
Vout
LM317

240
1%
Va

To Calculate R2:
Vout = ISET R2 + 1.250 V
Assume ISET = 5.25 mA

*Pulse Testing Required:
1% Duty Cycle is suggested.

Figure 4. Ripple Rejection Test Circuit
24V-

CU

Vout

Vin

14V
f = 120 Hz

Vout = 10 V

LM317

¢J Adjust

240
1%

R1

D1 *
1N4002

RL

+
Cin

0.1~F

Co

1.65K
1%

R2

CAdj

1~F

-'-+
T
10~F

1
--L

* D1 Discharges CAdj if Output is Shorted to Ground.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-23

Va

LM317
Figure 6. Current Limit

Figure 5. Load Regulation
4

~

0.4

~



"f-

'1

So -O.B

>

-1.0
-75

<]

-50

11

::::>

o_

Vin = 15 V

!:; -0.6 I - - Vout= 10V
o

I--- TJ = 25'C
,..... ""'1'..'

::::>

:------

-0.2

tj

a:
a:

IL - 0.5A I - -

0

0

-25
0
25
50
75
100
TJ, JUNCTION TEMPERATURE ('C)

125

o



~
~

40
35
-75

~

::::>
0

..:

f-

I

............. V

'/

I-

::::>

-.....r--

2.5

...J

>=
Z
W

a:

I

0

25

50

75

100

125

1.0
-75

150

-50



3.0

f-

z

w
en
w
5

I:l:
w
a:_ 1.230

c

2.5
2.0
1.5

cl 1.0
0.5

~

>

-25

0
25
50
75
100 125
TJ, JUNCTION TEMPERATURE ('C)

/ / TJ = 25'C

(,)

(,)

-50

TJ = -55'C

4.0

z
w

a:
a:

a:

1.220
-75

-25

5.0

~

tj

:------ ~oomA

f.......

Figure 10. Minimum Operating Current

Figure 9. Temperature Stability
1.260

§Z

T

IL=500mA- =
....
r-:: r--:_
.....

TJ, JUNCTION TEMPERATURE ('C)

TJ, JUNCTION TEMPERATURE ('C)

w
~ 1.250

IL= LOA

IL = 20mA

>
-25

.-V

IL=1.5A

--- -. . r-.

1.5

=>

-;;'

-- --

r~--- r:::::- :-----r-

~

2.0

"- w
u..
~ u..
- is

V

- LlVout = 100 mV

<=

-50

---.....

T

I

-

::::>

"f-

50

~-

Figure 8. Dropout Voltage

0...

80

z

Without CAdi

10, OUTPUT CURRENT (A)

Figure 13. Ripple Rejection versus Frequency

~

CAdi = 10 IlF

I-

a

a

100
10

--

~
80
W

40

c..
c..

a:
a:a:

120

~

10-3

10M

10

100

1k

10 k

lOOk

1M

f, FREQUENCY (Hz)

W

C!I

;:!i

Figure 15. Line Transient Response

Figure 16. Load Transient Response

g2:

~~
~!;i

1.S
~ii:i 1.0
-0

.}

O.S



20
t, TIME (115)

30

II \
I{I-'"

40

a

CL = 0; W~hout CAdi

I~ IL

II
II

\
10

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-25

Vin=15V Vout=10V _
INL= SO rnA
TJ=2SoC -

I

0-

C3 !Z 1.0

~Iin
10

I

~d!j

~

IL=SO rnA
r-- TJ =2SoC

I

-CL = 11lF; CAdi = 10llF
'1

r--

II

r-- Vout=10V

I

20

30

40

LM317
APPLICATIONS INFORMATION
Basic Circuit Operation

External Capacitors

The LM317 is a 3-terminal floating regulator. In operation,
the LM317 develops and maintains a nominal 1.25 V
reference (Vref) between its output and adjustment terminals.
This reference voltage is converted to a programming current
(lPROG) by R1 (see Figure 17), and this constantcurrentflows
through R2 to ground. The regulated output voltage is given
by:
R2
Vout = Vref (1 + R1 ) + IAdj R2

A 0.1 /IF disc or 1 /IF tantalum input bypass capacitor (Cin)
is recommended to reduce the sensitivity to input line
impedance.
The adjustment terminal may be bypassed to ground to
improve ripple rejection. This capacitor (CAdj) prevents ripple
from being amplified as the output voltage is increased. A
10 /IF capacitor should improve ripple rejection about 15 dB at
120 Hz in a 10 V application.
Although the LM317 is stable with no output capacitance,
like any feedback circuit, certain values of external
capacitance can cause excessive ringing. An output
capacitance (CO) in the form of a 1.0 /IF tantalum or 25 /IF
aluminum electrolytic capacitor on the output swamps this
effect and insures stability.

Since the current from the adjustment terminal (lAdj) represents an error term in the equation, the LM317 was designed
to controllAdj to less than 100 /lA and keep it constant. To do
this, all quiescent operating current is returned to the output
terminal. This imposes the requirement for a minimum load
current. If the load current is less than this minimum, the output
voltage will rise.
Since the LM317 is a floating regulator, it is only the voltage
differential across the circuit which is important to
performance, and operation at high voltages with respect to
ground is possible.
Figure 17. Basic Circuit Configuration
Vin

l.M317

I
I

Adjust

Vout

1+

R1

Vref

\

Protection Diodes
When external capacitors are used with any IC regulator it
is sometimes necessary to add protection diodes to prevent
the capacitors from discharging through low current points into
the regulator.
Figure 18 shows the LM317 with the recommended
protection diodes for output voltages in excess of 25 V or high
, capacitance values (CO> 25 /IF, CAdj > 10 /IF). Diode D1
prevents Co from discharging thru the IC during an input short
circuit. Diode D2 protects against capacitor CAdj discharging
through the IC during an output short circuit. The combination
of diodes D1 and D2 prevents CAdj from discharging through
the IC during an input short circuit.

llPROG
Vout

Figure 18. Voltage Regulator with Protection Diodes

Vref = 1.25 V Typical

1N4002

+

Load Regulation
The LM317 is capable of providing extremely good load
regulation, but a few precautions are needed to obtain
maximum performance. For best performance, the
programming resistor (R1) should be connected as close to
the regulator as possible to minimize line drops which
effectively appear in series with the reference, thereby
degrading regulation. The ground end of R2 can be returned
near the load ground to provide remote ground sensing and
improve load regulation.

Adjust o-----<~~

D2T

CAdj

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-26

CQ

1N4002

LM317
Figure 19. "Laboratory" Power Supply with Adjustable Current Limit and Output Voltage
D6
1N4002
Vou11 RSC

Vin2

~

V0u12

1-~>-4I""'------4~_

Vin
32V1040V

240
D1
1N4001
Current
Umit
Adjust

1.0K

1N4001
D2

D5
IN4001

Adjust 2
5K

I

Vou1

+
111F

-=

Tantalum

Voltage
Adjust
1N4001
D3
D4

Ou1pu1 Range:
OSVOS25V
OSIOS1.5A

-10V
Diodes D1 and D2 and transistor 02 are added to allow adjustment
of outpu1 voltage to 0 V.
-10V

D6 protects both L.M317's during an input short circuH.

Figure 20. Adjustable Current Limiter

Figure 21. 5.0 V Electronic Shutdown Regulator
D1

V O - 10
1.25

Vout
D1
1N4001
100

* To provide current limiting of 10

+
120

D2
1N4001

to the system ground, the source of
the FEr must be tied to a negative
voltage below - 1.25 V.

1_ 1.0l1F

Adjust 0--_---'
MPS2222
720

f----vlIIr--< TTL

1.0K

2N5640
R2 S Vref
IDDS

Control

Minimum Vout = 1.25 V

Vref
R1 = lOmax + IDSS

D1 protects the device during an input short circuH

Vo < BVDSS + 1.25 V + VSS
IlInin -IDSS < 10 < 1.5A
As shown 0 < 10 < 1.0A

Figure 22. Slow Turn·On Regulator

Figure 23. Current Regulator

Vout
240
Adjust

1N4001

0----.

R2

10u1=

Vref

(Rj ) +IAdj

1.25V
R1
10mAs 10u1S 1.5 A
s

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3·27

MOTOROLA

LM317L

SEMICONDUCTOR-----TECHNICAL DATA

Three-Terminal Adjustable Output
Positive Voltage Regulator
The LM317L is an adjustable 3-terminal positive voltage regulator capable of
supplying in excess of 100 mA over an output voltage range of 1.2 V to 37 V. This
voltage regulator is exceptionally easy to use and requires only two external
resistors to set the output voltage. Further, it employs internal current limiting,
thermal shutdown and safe area compensation, making them essentially blow-out
proof.
The LM317L serves a wide variety of applications including local, on card
regulation. This device can also be used to make a programmable output regulator,
or by connecting a fixed resistor between the adjustment and output, the LM317L
can be used as a precision current regulator.
• Output Current in Excess of 100 mA
• Output Adjustable Between 1.2 V and 37 V
• Internal Thermal Overload Protection
• Internal Short Circuit Current Limiting
• Output Transistor Safe-Area Compensation
• Floating Operation for High Voltage Applications
• Standard 3-Lead Transistor Package
• Eliminates Stocking Many Fixed Voltages

Vout
LM317L

.
~~

Rl
240

IAdj~

Adjust

SILICON MONOLITHIC
INTEGRATED CIRCUIT

ZsUFFIX
PLASTIC PACKAGE
CASE 29
PIN 1. Adjust
2. Vout
3. Vin

o SUFFIX
PLASTIC PACKAGE
CASE 751
(SOP-S")

s.

PIN 1. Vin
2. Vout
3. Vout
4. Adjust
5. N.C.
6. Vout
7. Vout
B. N.C.

SOP-S is an internally modified SO-S Package.
Pins 2, 3, 6 and 7 are electrically common to the die
attach flag. This internal lead frame modification
decreases package thermal resistance and
increases power dissipation capability when
appropriately mounted on a printed circuit board.
SOP-S conforms to all external dimensions of the
standard SO-S Package.

Standard Application
Vin

LOW CURRENT
THREE-TERMINAL
ADJUSTABLE POSITIVE
VOLTAGE REGULATOR

.

+ Co
;; 1.011F

Cin

O.II1F

-": }"'R2

• = Cin is required if regulator is located an appreciable distance from power supply filter.
.. = Co is not needed for stability, however, Hdoes improve transient response.

Since IAdj is controlled to less than 100 1IA, the error associated wHh this term is negligible in most
applications.

ORDERING INFORMATION
Device
LM317LD
LM317LZ
LM317LBD
LM317LBZ

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-28

Tested Operating
Temperature Range
TJ = 00 to +125°C
TJ = -40 0 to +150°C

Package
SOP-S
Plastic
SOP-S
Plastic

LM317L
MAXIMUM RATINGS
Rating
Input-Output Voltage Differential

Symbol

Value

Unit

VI-VO

40

Vdc

PD

Internally Limited

W

TJ

Oto+125
-40 to +125

°C

Tstg

-65 to +150

°C

Power Dissipation
Operating Junction Temperature Range
Storage Temperature Range

ELECTRICAL CHARACTERICISTICS (VI-VO = 5.0 V; 10 = 40 rnA; TJ
unless otherwise noted.)

=Tlow to Thigh (see Note 1); Imax and PmaX per Note 2;
LM317L, LB
Figure

Symbol

Min

Typ

Max

Unit

Line Regulation (Note 3)
TA = 25°C, 3.0 V" VI- VO" 40 V

1

Regline

-

0.01

0.04

%N

Load Regulation (Note 3), TA = 25°C
10 rnA" 10" Imax -LM317L
VO,,5.0V

2

Regload

-

5.0
0.1

25
0.5

mV
%VO

Characteristics

VO~5.0V

3

IAdj

-

50

100

J.lA

Adjustment Pin Current Change
2.5 V"VI-VO ,,40 V, PD" Pmax
10 rnA" 10" Imax -LM317L

1,2



I I I-

0.4

t-Vin = 45 V
Vout=5.0V
_
f-IL=5.0mAt040mA

0.2
0
-0.2

I-

'§

I.L

I

I

I

I

I

m

~ 80

z

o

§

-0.6

cc.

a:
a:

I I I

0
> -0.8

I

 -0.4
"I:::>

0

Figure 6. Ripple Rejection

IL = 40 mA
f=120Hz
Vout= 10V
Vin = 14 Vt024 V

60 -

50
150

-50

-25

Figure 7. Current Limit
0.50

g

-

I

I-

z

I

§5 0.30

I-

~

..... t---..

u
I:::>
~ 0.20
:::>

~~

'" t---..

TJ = 150'C

a

::: 0.10

o

o

2.0

~

1.5

r-- r-

I-...J

1"'-

:::>«
0;::

~

i'...

""-

I'...

"-

'"

15

:::>a:
"-w
~tt
-is
~
1.0

0.5

w
::;
0

I

I

l-

..........

-

.........

-50

-25

0
25
50
75
100 125
TJ, JUNCTION TEMPERATURE ('C)

150

~

------

a 70

~

2.0
~

1.5

90

I

2.5

cii 1.0
0.5

........... r-.

Figure 10. Ripple Rejection versus Frequency

------

()

CJ)

r-- __

100

~

w

IL=100mA

I

"
>"

10
20
30
40
50
Vin - Vout, INPUT - OUTPUT VOLTAGE DIFFERENTIAL M

« 4.5
.§. 4.0 r- TJ 55'C '
ITJ = 25'C
z
w 3.5 r-TJ = 150'C
a:
a: 3.0
:::>
z

r--.....

lL = 5.0 mA

Figure 9. Minimum Operating Current

()

--

>

5.0

I-

150

I'\.

13'"

~

""'-

w
a:

0
25
50
75
100 125
TJ, JUNCTION TEMPERATURE ('C)

Figure 8. Dropout Voltage
2.5

w

TJ = 25'C
......;::

0.40

-

z

/'

...
..... v...

;::

/

\

()

w 60
~
a: 50

~ 40
""a: 30
0: 20
a:
10

I-"

I~

II """"
o

80

10
20
30
40
Vin - Vout, INPUT - OUTPUT VOLTAGE DIFFERENTIAL M

\

\
I\,

10

100

1.0 k

10 k
100 kIm
t, FREQUENCY (Hz)

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA
3-32

IL = 40 mA
Vin = 5.0V ± 1.0 VPP
Vout = 1.25 V

LM317L
Figure 11. Temperature Stability

Figure 12. Adjustment Pin Current

1.260

:;( 80

~
w
1.250



w
z 1.240

0

1/

W

0:

~

r-....

~
0:
=>

~

W

u.

W

0:

2i

>

Vin =4.2V
1.230 r-- r- Voul = Vrel
IL = 5.0 rnA
1.220

-50

-25

o
z

c::

"-

II
I
Vin = 6.25 V
70 I - - Vout = Vrel
65 I - - - - - IL=10rnA
- - IL=100rnA
60

....

55

::;;
~
=>

50

iii

~

45

~ 40

0
25
50
75
100 125
TJ, JUNCTION TEMPERATURE ('C)

35

150

,.~

.,

w
z

0.4

-

8-

0.2

-


D....
=>

II

-25

"S
0

>



-0.8



0>

s~

\ I
b,

IL=20 rnA
TJ = 25'C

~

...

0
25
50
75
100 125
TJ, JUNCTION TEMPERATURE ('C)

150

o

I

10

20
t, TIME(!1s)

30

a
-0.2

.'.

1

l.' \r-

Vin=15V Vout= 10V
INL=50rnA TJ=25'C -

CL=0.3 !iF;CAdj = 10 !iF _

I

I\+-

I

IL

\
10

<.:
~ G'i

6.0

4.0

150

./

8.0

w
en

-1.0
-50

Bandwidth 100 Hz to 10kHz

10

~
w

f-'"""

~ -0.6

0
25
50
75
100 125
TJ, JUNCTION TEMPERATURE ('C)

I

--

-0.4

-..;;;;

Figure 14. Output Noise

Vin = 4.25 V to 41.25 V
Vout = Vrel
IL = 5 rnA

-0.2

~.

V'
-50

Figure 13. Line Regulation

~

",/ ~

~ ~-

20
t, TIME (!is)

30

40

..
I

LM317L
APPLICATIONS INFORMATION
Basic Circuit Operation

External Capacitors

The LM317L is a 3-terminal floating regulator. In operation,
the LM317L develops and maintains a nominal 1.25 V
reference (Vref) between its output and adjustment terminals.
This reference voltage is converted to a programming current
(IPROG) by R1 (see Figure 13), and this constant currentflows
through R2 to ground. The regulated output voltage is given
by:

A 0.1 ~F disc or 1.0 ~F tantalum input bypass capacitor
(Cin) is recommended to reduce the sensitivity to input line
impedance.
The adjustment terminal may be bypassed to ground to
improve ripple rejection. This capacitor (CAdj) prevents ripple
from being amplified as the output voltage is increased. A
10 ~F capacitor should improve ripple rejection about 15 dB at
120 Hz in a 10 V application.
Although the LM317L is stable with no output capacitance,
like any feedback circuit, certain values of external
capacitance can cause excessive ringing. An output
capacitance (CO) in the form of a 1.0 ~F tantalum or 25 ~F
aluminum electrolytic capacitor on the output swamps this
effect and insures stability.

Vout

= Vref (1

R2
+R1 ) + IAdj R2

Since the current from the adjustment terminal (lAdj)
represents an error term in the equation, the LM317L was
designed to control IAdj to less than 100 ~A and keep it
constant. To do this, all quiescent operating current is returned
to the output terminal. This imposes the requirement for a
minimum load current. If the load current is less than this
minimum, the output voltage will rise.
Since the LM317L is a floating regulator, it is only the voltage
differential across the circuit which is important to
performance, and operation at high voltages with respect to
ground is possible.
Figure 17. Basic Circuit Configuration
Voul

Yin
LM317L

:

(+
Vref

Adjust

--

\

Rl

Protection Diodes
When external capacitors are used with any IC regulator it
is sometimes necessary to add protection diodes to prevent
the capacitors from discharging through low current points into
the regulator.
Figure 14 shows the LM317L with the recommended
protection diodes for output voltages in excess of 25 V or high
capacitance values (CO> 10 ~F, CAdj > 5.0 ~F). Diode D1
prevents Co from discharging thru the IC during an input short
circuit. Diode D2 protects against capacitor CAdj discharging
through the IC during an output short circuit. The combination
of diodes D1 and D2 prevents CAdj from discharging through
the IC during an input short circuit.

~ IpROG
Voul

Figure 18. Voltage Regulator with
Protection Diodes

IAdj

Vref = 1.25 V Typical

lN4002

Load Regulation
The LM317L is capable of providing extremely good load
regulation, but a few precautions are needed to obtain
maximum performance. For best performance, the
programming resistor (R1) should be connected as close to
the regulator as possible to minimize line drops which
effectively appear in series with the reference, thereby
degrading regulation. The ground end of R2 can be returned
near the load ground to provide remote ground sensing and
improve load regulation.

MOTOROLA LlNEARIiNTERFACE ICs DEVICE DATA

3-34

LM317L
Figure 19. Adjustable Current Limiter

Figure 20. 5 V Electronic Shutdown Regulator

VO-IO
1.25k
Vout
Ot
lN914
500

• To provide current limiting of 10
to the system ground, the source 01
the curreny limiting diode must be tied to
a negative voltage below - 7.25 V.
R2 <:

+
I1.0Il F

120

02
lN914

Adjust 0--_----'

MPS2222

TIL

720
1.0k

Control

-'.I!&
lOSS

Minimum Vout ; 1.25 V

Vref
Rl; lOmax + lOSS
01 protects the device during an input short circuit.
Vo < POV + 1.25 V + VSS
ILmin -Ip < 10 < 100 mA -Ip
As shown 0 < 10 < 95 mA

Figure 21. Slow Turn-On Regulator

Figure 22. Current Regulator

lout

Vout
240
Adjust

lN4002

0-----.

loutmax; (

Vref)
R1

Vrel )
loutmax ; ( Rl + R2

1.25 V

+ IAdj'"

1.25 V
+ IAdj '" Rl + R2

5.0 mA < lout < 100 rnA

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-35

R1

MOTOROLA

SEMICONDUCTOR------

lM323, lM323A

Positive Voltage Regulators

3-AMPERE, 5 VOLT
POSITIVE
VOLTAGE REGULATORS

TECHNICAL DATA

The LM323,A are monolithic integrated circuits which supply a fixed positive
5.0 V output with a load driving capability in excess of 3.0 A. These three-terminal
regulators employ internal current limiting, thermal shutdown, and safe-area
compensation. An improved device with superior electrical characteristics and a
2% output voltage tolerance is available with an A-suffix (LM323A). These
regulators are offered with a 0° to +125°C temperature range in a low cost plastic
power package.
Although designed primarily as a fixed voltage regulator, these devices can be
used with external components to obtain adjustable voltages and currents. These
devices can be used with a series pass transistor to supply up to 15 A at 5.0 V.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

TSUFFIX
PLASTIC PACKAGE
CASE 221A

• Output Current in Excess of 3.0 A
• Available with 2% Output Voltage Tolerance
• No external Cornponents Required
•

Internal Thermal Overload Protection

•

Internal Short Circuit Current Limiting

PIN 1. Input
2. Ground
3. Output
Heatsink surface connected
to Pin 2

• Output Transistor Safe-Area Compensation
• Thermal Regulation and Ripple Rejection Have Specified Limits

STANDARD APPLICATION

MAXIMUM RATINGS
Rating

Symbol

Value

Unit

Input Voltage

Vin

20

Vdc

Power Dissipation

Po

Internally Limited

W

Operating Junction Temperature Range

TJ

o to +125

°C

Tstg

-65 to +150

°C

Tsolder

300

°C

Storage Temperature Range
Lead Temperature (Soldering, 10 s)

In putIXJM323'A Output
Cin'

O.331lF

C **
0

A common ground is required between the input
and the output voltages. The input voltage must
remain typically 2.5 V above the output voltage
even during the lowpoint on the input ripple voltage.
- Cin is required if regulator is located an
appreciable distance from power supply filter.
(See Applications Information for details.)
Co is not needed forstability; however, it does
improve transient response.

ORDERING INFORMATION
Device

Output Voltage
Tolerance

LM323T

4%

LM323AT

2%

Tested Operating
Junction Temp. Range

Package

0° to +125°C

Plastic Power

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-36

LM323, LM323A
ELECTRICAL CHARACTERICISTICS (TJ~ T low to Thigh (see Note 1) unless otherwise noted)
LM323A
Characteristics

LM323

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

Output Voltage
(Vin ~ 7.5 V, 0" lout" 3.0 A, TJ = 25°C)

Vo

4.9

5.0

5.1

4.8

5.0

5.2

V

Output Voltage
(7.5 V" Vin" 15 V, 0" lout" 3.0 A,
P" Pmax [Note 2])

Vo

4.8

5.0

5.2

4.75

5.0

5.25

V

1.0

15

-

1.0

25

mV

Regline

-

Load Regulation
(Vin ~ 7.5 V, 0" lout" 3.0 A, TJ ~ 25°C)
(Note 3)

Re9l0ad

-

10

50

-

10

100

mV

Regtherm

-

0.001

0.01

-

0.002

0.03

%VOIW

Quiescent Current
(7.5 V "Vin " 15 V, 0 " lout" 3.0 A)

IS

-

3.5

10

-

3.5

20

rnA

Output Noise Voltage
(10 Hz" f" 100 kHz, TJ ~ 25°C)

VN

-

40

-

-

40

-

IlVrms

Ripple Rejection
(8.0 V "Vin " 18 V, lout ~ 2.0A,
f ~ 120 Hz, TJ ~ 25°C)

RR

66

75

-

62

75

-

dS

Short Circuit Current Limit
(Vin ~ 15 V, TJ = 25°C)
(Vin ~ 7.5 V, TJ ~ 25°C)

ISC

-

4.5
5.5

-

-

4.5
5.5

-

-

-

35

-

-

35

mV

2.0

-

-

2.0

-

°CIW

Thermal Regulation
(Pulse ~ 10 ms, P ~ 20 W, TA

~

25°C)

Long Term Stability

S

Thermal Resistance Junction to Case (Note 4)

..
I

Line Regulation
(7.5 V" Vin " 15 V, TJ ~ 25°C) (Note 3)

ReJC

A

NOTES: 1. Tlow to Thigh ~ 0° to +125°C
2. Although power dissipation is internally limited, specifications apply only for P " Pmax ~ 25 W.
3. Load and line regulation are specified at constant junction temperature. Pulse testing is required with a pulse width" 1.0 ms and a
duty cycle" 5%.
4. Without a heatsink, the termal resistance (RaJA is 65°CIW). With a heatsink, the effective thermal resistance can approach the
specified values of 2.0°CIW, depending on the efficiency of the heatsink.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-37

LM323, LM323A
Schematic Diagram
J.-----.---1~___._(J

Input

0.12

L - - - - - - - - - -......-----.>--OOutput

840

06

1.7k

L-~---~_+......-_~~---~--_---......-

......--------------__1~Gnd

VOLTAGE REGULATOR PERFORMANCE
The performance of a voltage regulator is specified by its
immunity to changes in load, input voltage, power dissipation,
and temperature. Line and load regulation are tested with a
pulse of short duration « 100 Jls) and are strictly a function of
electrical gain. However, pulse widths of longer duration
(> 1.0 ms) are sufficient to affecttemperature gradients across
the die. These temperature gradients can cause a change in
the output voltage, in addition to changes by line and load
regulation. Longer pulse widths and thermal gradients make
it desirable to specify thermal regulation.
Thermal regulation is defined as the change in output
voltage caused by a change in dissipated power for a specified
time, and is expressed as a percentage output voltage change
per watt. The change in dissipated power can be caused by a

change in either input voltage or the load current. Thermal
regulation is a function of Ie layout and die attach techniques,
and usually occurs within 10 ms of a change in power
dissipation. After 10 ms, additional changes in the output
voltage are due to the temperature coefficient of the device.
Figure 1 shows the line and thermal regulation response of
a typical LM323A to a 20 W input pulse. The variation of the
output voltage due to line regulation is labeled A and the
thermal regulation component is labeled A. Figure 2 shows the
load and thermal regulation response of a typical LM323A to
a 20 W load pulse. The output voltage variation due to load
regulation is labeled A and the thermal regulation component
is labeled A.

Figure 1. Line and Thermal Regulation

Figure 2. Load and Thermal Regulation

~
®

T

18V

8.0V

t, TIME (2.0 ms/DIV)
Vout= 5.0V
Vin = 8.0 V --718 V --7 8.0 V
lout = 2.0A

t, TIME (2.0 ms/DIV)

CD = Regline = 2.4 mV

® = Regtherm = 0.0015% VOIW

Vout = 5.0 V
Vin = 15 V
lout = 0 A --7 2.0 A --7 0 A

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-38

f1\

0; = Regline = 5.4 mV

® = Re9therm = 0.0015% VOIW

LM323, LM323A
Figure 4. Output Impedance

Figure 3. Temperature Stability
5.10
I
I
I
Yin = 10V
lout= 100 rnA

~
w
!3o

(!)

;:: 5.00

V
./

:::J

0..
I-

r-_

Vin=7.5V
lout = 1.0 A
_CO=O
TJ = 25°C

r---... .......

./
/

:::J

o

/

--

"S
o

>

4.90
-90

-50

-10
30
70
110
TJ. JUNCTION TEMPERATURE (0C)

150

lOA
1.0

190

Figure 5. Ripple Rejection versus Frequency
100
iD

~
o

80

iil

' - - - - -Vin=10V

0..

40

L---

-

CO=O
TJ = 25°C

iD

z 80

;:::
0
w

Ul
a:

::J 60

-

c:
r:r:
a:

-

0..
0..

\

1\

I

\

20
1.0

10

100

1.0k 10k lOOk
!. FREQUENCY (Hz)

1.0M

10M

40
30
0.01

100M

Figure 7. Quiescent Current versus
Input Voltage
4.0

!2
w
o

!2
w

2.0

TJ =

"

w

c 1.0

'"

I

~

TJ = 25°C

10

TJ = -55°C

zw

=TJ=25°C

a:
§i 3.0
o

TJ=150°C

T
TJ = 150°C

~ 2.0
w

lout = 2.0 A- ~

5

I

c
d, 1.0

I

I
5.0

0.1
1.0
lout. OUTPUT CURRENT (A)

!2
w

~TJ=55OC

5

II I

;::- 4.0

1500c)"

c.J

Cf)

I I II

~

'-. TJ = 25°C

1$

a:
a:

:::J

i

Figure 8. Quiescent Current versus
Output Current

.......

1/

3.0

Yin = 10V
CO=O
!=120Hz
TJ = 25°C

5.0

TJ = 55°C

I

10 M 100 M

0

\

I

1.0 M

:g.

r\

lout = 3.OA
60

::J
0..

c:
r:r:
a:

,

1/
t

1.0 k
10 k 100 k
!. FREQUENCY (Hz)

Figure 6. Ripple Rejection versus Output Current

I

t3w

100

100

lout = 50 rnA

r--

10

10
15
Yin. INPUT VOLTAGE (Vdc)

o

20

0.01

Vin=10V
1"1 I II

I
0.1
1.0
lout. OUTPUT CURRENT (A)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-39

10

LM323, LM323A
Figure 9. Dropout Voltage
2.5

f-"
:::>"0
"-<::'

5

...J

o:;'!;

--

2.0

off-15
f-a:
1[ ~ 1.5

t;;:

I- '-

"SUJ

OC!J

~

!'3

;;;=g

w

~
:::>«
0-

- r-.-

(5

5;:

lout ~ 3.0 A

I'"- l- I'"- l"- I-

zu..

-~

Figure 10. Short Circuit Current
8.0

~ ~

r-r-.
....... I'"-

r-- ~ t-r-- r--

-----

4.0

~ffi

gjN
~

t.Vout ~ 50 rnV

-50

~ :--

!:::~

~out~1.0A- I -

lout ~ 0.5A

1.0

6.0

2.0

(;

en

-10
30
70
110
TJ, JUNCTION TEMPERATURE ('C)

t50

o5.0

190

Figure 11. Line Transient Response
0.8

0

0.6

!'3
> ~
f-

:::> Z
"- 0
f-

:::>
0

~

~

lout ~ 150 rnA
CO~O
TJ ~ 25'C

0.4

1-

!'o3

1-

5

0.2

0

UJ

C!J

;:!;
'-'

~

f-

C!J
:::> Z
"- '"

z

o. 1

"- Q

0

ti:

"SO

-0. 2
-0. 0
5«1.5

~

~

125'C

20

25

I

Vin ~ lOV
CO~O
TJ ~ 25'C

1\

\

I'

V


• UJ -0. 1
-0.2
-0.4
-0.6

~

~

>

• UJ
"So

>

15
Vin, INPUT VOLTAGE (Vdc)

TJ

Figure 12. Load Transient Response

UJ

C!J

10

TJ~O~C TJ ~ 25'C

"~

-

!z

1.0

'::0

0

o~ ~
"5 ~ O. 5

0.5
10

20
t, TIME (1-15)

30

I

I

40

\

\

10

20
t, TIME (1-15)

30

40

--_< 10k

loOk

VO,8.0Vt020V
Vin - Vo <: 2.5 V

"IB '" 0.7 mA over line, load and temperature changes
IB '" 3.5 mA
For example, a 2 A current source would require R to be a 2.5 Q, 15
W resistor and the output voltage compliance would be the input
voltage less 7.5 V.

The addition of an operational amplifier allows adjustment to higher
or intermediate values while retaining regulation characteristics. The
minimum voltage obtainable w~h this arrangement is 3.0 V greater
than the regulator voltage.

Figure 16. Current Boost With
Short Circuit Protection

Figure 15. Current Boost Regulator

2N4398 or Equiv

2N4398
or Equiv.

Input

R
H:r---_---4------e.---+---t.......-----~-----."0v Vin

Figure 1. line Regulation and ~IAdj/line Test Circuit

R2

1%

+
Co
Rl
• Pulse Testing Required:
1% Duty Cycle
is suggested.

120
1%

1.0l!F
RL

Vou!

Vin

Une Regulation (%Nol =

""l r -U --IVOL-VOHI
IVOHI
x 100

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-44

VOH
VOL

LM337
Figure 2. Load Regulation and AIAdj/Load Test Circuit

R2

, Pulse Tes1ing required:
1% Duty Cycle is sugges1ed.

1%
Co +
1.01lF
120
RL
(max
Load)

5L

-Va (min Load)
Va (max Load)

Load Regulation (mV) = Va (min Load) - Va (max Load)

Load Regutation (%NO) =

Va (min Load) - Va (max Load)
Va (min Load)
x 100

Figure 3. Standard Test Circuit

R2

1%

Va

R1

120

To Calculate R2:
R2 =

(."!.sl
Vref

-1) R1
Pulse Testing Required, 1% Duty Cycle is suggested.

This assumes IAdj is neglible.

Figure 4. Ripple Rejection Test Circuit

J.

R2

1+

CAdjT 10llF

1%

Co

Cin 'T' 1.01lF
Adjust
Vin

I
I

14.3V

--7'""\

LM337

R1

I

120

01'

rr+
1.01lF

RL

1N4002

~

Vout

I

Vout = -1.25 V

.

4.3V--~-~

*01 Discharges CAdj HOutput is shorted to Ground

f=120Hz

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-45

LM337
Figure 5. load Regulation
0.2

~
w

0

t!J

~ -0.2

::r:
(,)
w

-.....

-0.4

t!J

1:3

-

g

IL=0.5A

..... 3
:z

w

~

\

=> -0.8
=>
-1.0

c...
.....

c:

'5 -1.2
0

-50

-25

0
25
50
75
100 125
TJ, JUNCTION TEMPERATURE (OC)

80
~

75

:z
w

70

....I

.....

a:
a:
=>
(,)

65

!z
w

60

::;;

Ii;
=>

f"-.. r-

---

~
w

...-

is
w
t!J

2.0

o~ 1.5
I

r-,..

7-

r-- iL = 20, rnA

5c...

45
-50

-25

0
25
50 75
100 125
TJ, JUNCTION TEMPERATURE (OC)

150

""-.

-50

I

-25

IL= 1.5A

r-

r- :::::::-- ........

...........

~ :::--..

IL=20rnA ....

:z
-- 1.0
'5
~

40

r-...

r- i"'-

5

50

I
I
VOU!= -5.0 V
AVo=100rnV

----- -------- ---............

~ 2.5

55

~
~

3.0

a:

1:3
§?

-

Figure 8. Dropout Voltage

U'

~

---

10
20
30
40
Yin - Vou! , INPUT - OUTPUT VOLTAGE DIFFERENTIAL (Vdc)

o

150

Figure 7. Adjustment Pin Current
«'

I

o

-1.4

TJ = 25°C

"-

'5
o

>


(,) 2

'I'-..

-0.6

§?
.....

Figure 6. Current limit
4

IL= LOA

!

~oornA

I"'t

0
25
50 75
100 125
TJ, JUNCTION TEMPERATURE (OC)

150

.5

>

Figure 10. Minimum Operating Current

Figure 9. Temperature Stability
1.270

«'1.8

~
w

~

~

1.260

§?
w

a:

i

S
!z
w

-

w
~ 1.250

0.8
::; 0.6

cD

TJ = 25°C

0.4
0.2

/'

,

1/

150

./""

""

I

o
o

1.230
0
25
50 75
100 125
TJ, JUNCTION TEMPERATURE (OC)

1.0

!l3
c

-25

./
/

(,)

_1.240

-50

1.6

~1.4
1.2

!:i

10
40
20
30
Yin - VOu! , INPUT - OUTPUT VOLTAGE DIFFERENTIAL (Vdc)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-46

LM337
Figure 12. Ripple Rejection versus Output Current

Figure 11. Ripple Rejection versus Output Voltage
100

CAdj = 10 I1F

05"
:2- 80

:z
a
Lil

--

I...........

i=
0
W

60

a:
~

a.
a.

c:
a:
a:

40

II

05"
:2- 80

CAdj = 10 I1F

r-o
o

:z

a
0

Wllhout CAdj

W

-5

60

Lil
a:

~
a.

40

a.

I- Vin=-15V
a:Vout= -IOV
a: 20 f-- f= 120 Hz

c:

1

1

..

WrthoutCAdj

i=

.1

Yin - Vout = 5.0 V
IL=500rnA
f= 120 Hz
TJ = 25'C

r-r--

20

100

I

o

- to
-15
-20
-25
Vout, OUTPUT VOLTAGE M

-30

-35

f-- rJ,= 2n

II

-40

10

0.1
1.0
10, OUTPUT CURRENT (A)

0.01

Figure 14. Output Impedance

Figure 13. Ripple Rejection versus Frequency
100
05"
:2- 80

:z
a
i=
0

W

Lil

-...,

V

60

.......... t-...

a:
W

....I

a. 40

c:
a:
a:

.......

Without CAdj

a.

20

o

10

Vin--15V
Vout=-IOV
IL = 500 rnA
CL=I.OI1F
TJ - 25'C

--

"-

~ Wnhout CAdj

r--.... -..., '\.

,'\.
........ ~
~

Vin=-15V
Vout=-tOV
IL = 500 rnA
TJ = 25'C
100

=
=
~

I
I
CAd' = 10l1F

1.0k

CAdi = 10 I1F

10k lOOk 1.0M
f, FREQUENCY (Hz)

10-3
10

10M

100

~
o. 6
f'!i
~ ~ o. 4

C!l

f'!i

~[Eio 2
"S

C

o

>



I

a.o

o

o. 2

0
§§
S ~ -0.21-~


30

1M

-0. 4
-0.6

0_1. 5

10

lOOk

Figure 16. Load Transient Reponse

Figure 15. Line Transient Response
W

~ ~ O. 8
~ ti o. 6
!5 ~ o. 4

1.0 k
10 k
f, FREQUENCY (Hz)

20
t, TIME (!1S)

7

J
30

40

LM337
APPLICATIONS INFORMATION
Basic Circuit Operation
The LM337 is a 3-terminal floating regulator. In operation,
the LM337 develops and maintains a nominal -1.25 V
reference (Vref) between its output and adjustment terminals.
This reference voltage is converted to a programming current
(I PROG) by R1 (see Figure 17), and this constant currentflows
through R2 from ground. The regulated output voltage is
given by:
R2
Vout = Vref (1 + R1 ) + IAdj R2
Since the current into the adjustment terminal (IAdj)
represents an error term in the equation, the LM337 was
designed to control IAdj to less than 100 J.1A and keep it
constant. To do this, all quiescent operating current is returned
to the output terminal. This imposes the requirement for a
minimum load current. If the load current is less than this
minimum, the output voltage will rise.
Since the LM337 is a floating regulator, it is only the voltage
differential across the circuit which is important to
performance, and operation at high voltages with respect to
ground is possible.
Figure 17. Basic Circuit Configuration

+

~

~

R2
IpROG

+

Jf
Vref
Vin

Co

R1

\t

\

j"

degrading regulation. The ground end of R2 can be returned
near the load ground to provide remote ground sensing and
improve load regulation.
External Capacitors
A 1.0 J.1F tantalum input bypass capacitor (Cin) is
recommended to reduce the sensitivity to input line
impedance.
The adjustment terminal may be bypassed to ground to
improve ripple rejection. This capacitor (CAdj) prevents ripple
from being amplified as the output voltage is increased. A
10 J.1F capacitor should improve ripple rejection about 15 dB at
120 Hz in a 10 V application.
An output capacitance (CO) in the form of a 1.0 J.1F tantalum
or 10 J.1F aluminum electrolytic capacitor is required for
stability.
Protection Diodes
When external capacitors are used with any IC regulator it
is sometimes necessary to add protection diodes to prevent
the capacitors from discharging through low current points into
the regulator.
Figure 18 shows the LM337 with the recommended
protection diodes for output voltages in excess of -25 V or high
capacitance values (CO> 25 J.1F, CAdj > 10 J.1F). Diode D1
prevents Co from discharging thru the IC during an input short
circuit. Diode D2 protects against capacitor CAdj discharging
through the IC during an output short circuit. The combination
of diodes D1 and D2 prevents CAdj from the discharging
through the IC during an input short Circuit.
Figure 18. Voltage Regulator with
Protection Diodes

Vout

r-~-------'----------~~---'-o+

Vref = -1.25 V Typically
Vout

Load Regulation
The LM337 is capable of providing extremely good load
regulation, but a few precautions are needed to obtain
maximum performance. For best performance, the
programming resistor (R1) should be connected as close to
the regulator as possible to minimize line drops which
effectively appear in series with the reference, thereby

01
1N4002

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA
3-48

MOTOROLA

LM340,A Series

SEMICONDUCTOR-----TECHNICAL DATA

Three-Terminal Positive Voltage
Regulators

THREE-TERMINAL
POSITIVE FIXED
VOLTAGE REGULATORS

This family offixed voltage regulators are monolithic integrated circuits capable
of driving loads in excess of 1.0 A. These three-terminal regulators employ
internal current limiting, thermal shutdown, and safe-area compensation. Devices
are available with improved specifications, including a 2% output voltage
tolerance, on A-suffix 5.0, 12 and 15 V device types.
Although designed primarily as a fixed voltage regulator, these devices can be
used with external components to obtain adjustable voltages and currents. This
series of devices can be used with a series-pass transistor to boost output current
capability at the nominal output voltage

I

SILICON MONOLITHIC
INTEGRATED CIRCUIT

TSUFFIX
PLASTIC PACKAGE
CASE 221A

• Output Current in Excess of 1.0 A
• No External Components Required
• Output Voltage Offered in 2% and 4% Tolerance"

PIN I. Input
2. Ground
3. Output

• Internal Thermal Overload Protection
• Internal Short Circuit Current Limiting
• Output Transistor Safe-Area Compensation

Heatsink surface connected
to Pin 2

STANDARD APPLICATION

Input

~340'XX Output

Cin>
0.33
J.lF

ORDERING INFORMATION
Device

ou:rut Voltage
an Tolerance

LM340T-5.0

5.0V±4%

LM340AT-5.0

5.0V±2%

LM340T-6.0

6.0V±4%

LM340T-8.0

8.0V±4%

LM340T-12

12V±4%

LM340AT-12

12V±2%

Tested Operating
Junction Temp. Range

Package
Plastic Power

LM340T-15

15V±4%

LM340AT-15

15V±2%

LM340T-18

IBV±4%

LM340T-24

24V±4%

CO"
':'

A common ground is required between the input
and the output voltages. The input voltage
must remain typically 1.7 V above the output
voltage even during the lowpoint on the input
ripple voltage.
XX = these two digits of the type number indicate
voltage.
-

Gin is required if regulator is located an
appreciable distance from power supply
filter.
GO is not needed for stability; however, it
does improve transient response. If needed,
use a 0.1 J.lF ceramic disc.

0° to +1 25°C

* 2% regulators are available In 5, 12 and 15 V devices.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-49

..

LM340, A
MAXIMUM RATINGS (TA = +25°C unless otherwise noted.)
Rating

Symbol

Value

Unit

Vin

35
40

Vdc

PD
1/0JA
°JA

Internally Limited
15.4
65

PD
1/0JA
°JC

Internally Limited
200
5.0

Tstg

-65 to +150

°c

TJ

o to +150

°c

Inpul Voltage (5.0 V -18 V)
(24 V)
Power Dissipation and Thermal Characteristics
Plastic Package
TA = +25°C
Derate above TA = +25°C
Thermal Resistance, Junction-to-Air
TC= +25°C
Derate above T C = +75°C (See Figure 1)
Thermal Resistance, Junction to Case
Storage Junction Temperature Range
Operating Junction Temperature Range

W

mW/oC
°CIW
W
mW;oC

°CIW

Equivalent Schematic Diagram

1.0k

Inp ut

1.0k
210)

/I

r-1

L

6.7V

C

Al'
16k

r' 100

f/

W~ \J

1.0k
~

MO

~

3.0k
5.6k

~

6.4kl--'

~

~

2.6k

~

~

l'

l'

2.0k

3.9k

~

I(

6.0k

11
"-!

40
TpF

'"

300
13

50

.~ 4::
6.0k

~

I..

r' 10pF '-l

520

~

Y

1 20~

f/

J.

0.12

200
Output

-f'

7

J

-f'
Gn

12.8k

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-50

LM340, A
LM340-S.0
ELECTRICAL CHARACTERICISTICS (V,In = 10 V 10 = 500 rnA TJ = TI ow to Th'Ig h (Note 1) unless otherwise noted)
Characteristics
Output Voltage (TJ = +25°C)
10 = 5.0 rnA to 1.0 A

Symbol

Min

Typ

Max

Unit

Vo

4.8

5.0

5.2

Vdc

-

-

50
50
25
50

-

50
50
25

-

5.25

-

8.5
8.0

Line Regulation (Note 2)
8.0 Vdc to 20 Vdc
7.0 Vdc to 25 Vdc (TJ = +25°C)
8.0 Vdc to 12 Vdc, 10 = 1.0 A
7.3 Vdc to 20 Vdc, 10 = 1.0 A (TJ = +25°C)

Regline

Load Regulation (Note 2)
5.0 mA~ 10~ 1.0A
5.0 rnA ~ 10 ~ 1.5 A (TJ = +25°C)
250 rnA ~ 10 ~ 750 rnA (TJ = +25°C)

Regload

Output Voltage
7.0 ~ Yin ~ 20 Vdc, 5.0 rnA ~ 10 ~ 1.0 A, PD

-

Vo
~

4.75

-

mV

mV

Vdc

15 W

Quiescent Current
10=1.0A
TJ = +25°C

IB

-

Quiescent Current Change
7.0 ~ Yin ~ 25 Vdc, 10 = 500 rnA
5.0 rnA ~ 10 ~ 1.0 A, Yin = 10 V
7.5 ~ Yin ~ 20 Vdc, 10 = 1.0 A

Il.IB

Ripple Rejection
10 = 1.0 A (TJ = +25°C)

RR

Dropout Voltage

VI-VO

-

-

1.0
0.5
1.0

62

80

-

dB

-

1.7

-

Vdc

-

2.0

-

mQ

2.0

rnA

Vn

40

-

TCVO

-

±O.6

-

mV/oC

-

2.4

-

A

7.3

-

-

Vdc

ro

Short Circuit Current Limit (TJ = +25°C)

ISC

Output Noise Voltage (TA = +25°C)
10 Hz ~I~ 100 kHz

Peak Output Current (TJ = +25°C)

rnA

-

-

Output Resistance (I = 1.0 kHz)

Average Temperature Coefficient 01 Output Voltage
10= 5.0 rnA

4.0

rnA

10

Input Voltage to Maintain Line Regulation (TJ = +25°C)
10= LOA

!!V

NOTES: 1. Tlow to Thigh = 0° to +125°C
2. Load and line regulation are specilied at constant junction temperature. Changes in Vo due to heating effects must be taken into
account separately. Pulse testing with low duty cycle is used.

DEFINITIONS
Line Regulation - The change in output voltage for a
change in the input voltage. The measurement is made
under conditions of low dissipation or by using pulse
techniques such that the average chip temperature is not
significantly affected.
Load Regulation - The change in output voltage for a
change in load current at constant chip temperature.

Maximum Power Dissipation - The maximum total
device dissipation for which the regulator will operate
within specifications.
Quiescent Current - That part of the input current that is
not delivered to the load.
Output Noise Voltage - The rms AC voltage at the output,
with constant load and no input ripple, measured over a
specified frequency range.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-51

LM340,A
LM340A-5.0
ELECTRICAL CHARACTERICISTICS (V in = 10 V,0=
I
1 0 A T J= T low to T hiQh (Note 1) unless otherwise noted)
Characteristics
Output Voltage (TJ = +25°C)
10 = 5.0 mA to 1.0 A

Symbol

Min

Typ

Max

Unit

Vo

4.9

5.0

5.1

Vdc

-

-

10
10
12
4.0

-

-

25
25
15

4.8

-

5.2

Vdc

-

6.5
6.0

mA

3.5

-

-

0.5
0.8
0.8

Line Regulation
7.5 Vdc to 20 Vdc, 10 = 500 mA
7.3 Vdc to 25 Vdc (TJ = +25°C)
8.0 Vdc to 12 Vdc
8.0 Vdc to 12 Vdc (TJ = +25°C)

Regline

Load Regulation
5.0 mAs; 10 s; 1.0A
5.0 mA s; 10 s; 1.5 A (TJ = +25°C)
250 mA s; 10 s; 750 mA (TJ = +25°C)

Regload

mV

-

mV

-

Output Voltage
7.5 s; Yin S; 20 Vdc, 5.0 mA S; 10 S; 1.0 A, PD S; 15 W

Vo

Quiescent Current
TJ = +25°C

IB

Quiescent Current Change
5.0 mA s; 10 S; 1.0 A, Yin = 10 V
8.0 s; Yin S; 25 Vdc, 10 = 500 mA
7.5 S; Yin S; 20 Vdc, 10 = 1.0 A (TJ = +25°C)

AlB

Ripple Rejection
8.0 S; Yin S; 18 Vdc, 1 = 120 Hz
10=500 mA
10 = 1.0 A (TJ = +25°C)

RR

3.0

-

mA

dB
68
68

-

-

80

-

VI-VO

-

1.7

-

Vdc

Output Resistance (I = 1.0 kHz)

rO

-

2.0

-

ma

Short Circuit Current Limit (TJ = +25°C)

ISC

-

2.0

-

mA

Output Noise Voltage (TA = +25°C)
10 Hzs;Is;100kHz

Vn

-

40

-

!LV

TCVO

-

±0.6

-

mV/oC

-

2.4

7.3

-

-

Vdc

Dropout Voltage

Average Temperature Coefficient of Output Voltage
10= 5.0 mA
Peak Output Current (TJ = +25°C)

10

Input Voltage to Maintain Line Regulation (TJ = +25°C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-52

A

LM340,A
LM340-S.0
ELECTRICALCHARACTERICISTlCS(V'In= 11

v 10 = 500 rnA

TJ = TI ow toTh'11£ h (Note 1) unlessotherwisenoted)

Characteristics
Output Voltage (TJ = +25°C)
10 = 5.0 rnA to 1.0 A
Line Regulation
9.0 Vdc to 21
B.O Vdc to 25
9.0 Vdc to 13
8.3 Vdc to 21

Symbol

Min

Typ

Max

Unit

Va

5.75

6.0

6.25

Vdc

-

-

-

-

Regline
Vdc
Vdc (TJ = +25°C)
Vdc, 10 = 1.0 A
Vdc, 10 = 1.0 A (TJ = +25°C)

-

Load Regulation
5.0 rnA ~ 10 ~ 1.0 A
5.0 rnA ~ 10 ~ 1.5 A (TJ = +25°C)
250 rnA ~ 10 ~ 750 rnA (TJ = +25°C)

mV

Regload

-

Output Voltage
B.O ~ Vin ~ 21 Vdc, 6.0 rnA ~ 10 ~ 1.0 A, PD ~ 15 W

Va

Quiescent Current
10= 1.0A
TJ = +25°C

-

mV
60
60
30
60

5.7

-

60
60
30
6.3

rnA

IB

Quiescent Current Change
B.O ~ Vin ~ 25 Vdc, 10 = 500 rnA
5.0 rnA ~ 10 ~ 1.0 A, Vin = 11 V
B.6 ~ Vin ~ 21 Vdc, 10 = 1.0 A

AlB

Ripple Rejection
10 = 1.0 A (TJ = +25°C)

RR

Vdc

-

4.0

B.5
B.O

-

-

1.0
0.5
1.0

59

78

-

dB

rnA

-

Vdc

ro

-

1.7

Output Resistance (I = 1.0 kHz)

2.0

mil

Short Circuit Current Limit (TJ = +25°C)

ISC

-

-

1.9

-

rnA

Output Noise Voltage (TA = +25°C)
10 Hz~l~ 100 kHz

Vn

-

45

-

IlV

TCVO

-

iO.7

-

mV/oC

-

2.4

-

A

B.3

-

-

Vdc

Dropout Voltage

VI-Va

Average Temperature Coefficient 01 Output Voltage
10= 5.0 rnA
Peak Output Current (TJ = +25°C)

10

Input Voltage to Maintain Line Regulation (TJ = +25°C)
10= 1.0A

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-53

LM340, A
LM340-S.0
ELECTRICAL CHARACTERICISTICS (Vin = 14 V, 10 = 500 mA, T J = Tlow to Thigh (Note 1), unless otherwise noted.)
Characteristics
Output Voltage (TJ = +25°C)
10 = 5.0 mA to 1.0 A

Symbol

Min

Typ

Max

Unit

Va

7.7

8.0

8.3

Vdc

-

-

-

80
80
40
80

-

-

80
80
40

7.6

-

8.4

Line Regulation
11 Vdc to 23 Vdc
10.5 Vdc to 25 Vdc (TJ = +25°C)
11 Vdc to 17 Vdc, 10 = 1.0 A
10.5 Vdc to 23 Vdc, 10 = 1.0 A (TJ = +25°C)

Regline

Load Regulation
5.0 mAslosl.0 A
5.0 mA SIO SI.5 A (TJ = +25°C)
250 mA S 10 S 750 mA (TJ = +25°C)

Regload

Output Voltage
10.5 S Yin S 23 Vdc, 5.0 mA S 10 S 1.0 A, Po S 15 W

Va

Quiescent Current
10=1.0A
TJ = +25°C

IB

mV

mV

mA

-

Quiescent Current Change
10.5 S Yin S 25 Vdc, 10 = 500 mA
5.0 mA S 10 S 1.0 A, Yin = 14 V
10.6 S Yin S23 Vdc, 10 = 1.0 A

alB

Ripple Rejection
10 = 1.0 A (TJ = +25°C)

RR

Vdc

4.0

8.5
8.0
mA

-

-

1.0
0.5
1.0

56

76

-

dB

-

Vdc

ro

-

1.7

Output Resistance (f = 1 .0 kHz)

2.0

ma

Short Circuit Current Limit (TJ = +25°C)

ISC

-

-

1.5

Output Noise Voltage (TA = +25°C)
10 Hz sf S100 kHz

Vn

-

TCVO

Dropout Voltage

VI-Va

Average Temperature Coefficient of Output Voltage
10 = 5.0 mA
Peak Output Current (TJ = +25°C)

10

Input Voltage to Maintain Line Regulation (TJ = +25°C)
10=1.0A

mA

52

-

-

±1.0

-

mY/DC

-

2.4

-

Vdc

10.5

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-54

-

I1V

A

LM340,A
LM340-12
ELECTRICAL CHARACTERICISTICS (V in = 19 V,0=
I
500 mA TJ= Tlow to T hl~
. h (Note 1) unless otherwise noted)
Characteristics
Output Voltage (TJ = +25°C)
10 = 5.0 mA to 1.0 A

Symbol

Min

Typ

Max

Unit

Vo

11.5

12

12.5

Vdc

-

120
120
60
120

Line Regulation (Note 2)
15 Vdc to 27 Vdc
14.6 Vdc to 30 Vdc (TJ = +25°C)
16 Vdc to 22 Vdc, 10 = 1.0 A
14.6 Vdc to 27 Vdc, 10 = 1.0 A (TJ = +25°C)

Regline

Load Regulation (Note 2)
5.0 mA,;; 10';; 1.0A
5.0 mA,;; 10';; 1.5 A (TJ = +25°C)
250 mA,;; 10';; 750 mA (TJ = +25°C)

Regload

-

-

-

-

Vo

Quiescent Current
10=1.0A
TJ = +25°C

11.4

-

AIS

Ripple Rejection
10 = 1.0 A (TJ = +25°C)

RR

-

120
120
60
12.6

Vdc
mA

IS

Quiescent Current Change
14.5';; Vin';; 30 Vdc, 10 = 500 mA
5.0 mA ,;; 10 ,;; 1.0 A, Vin = 19 V
14.8';; Vin';; 27 Vdc, 10 = 1.0 A

-

mV

-

Output Voltage
14.5';; Vin';; 27Vdc, 5.0 mA,;; 10';; 1.0 A, PD';; 15 W

mV

-

8.5
8.0

-

4.0

-

-

-

1.0
0.5
1.0

55

72

-

dS

1.7

Vdc

mA

Output Resistance (I = 1.0 kHz)

ro

-

2.0

Short Circuit Current Limit (TJ = +25°C)

ISC

-

1.1

Output Noise Voltage (TA = +25°C)
10 Hz,;;l,;; 100 kHz

Vn

-

75

-

TCVO

-

±1.5

-

mV/oC

-

2.4

-

Vdc

Dropout Voltage

VI-VO

Average Temperature Coefficient 01 Output Voltage
10=5.0 mA
Peak Output Current (TJ = +25°C)

10

14.6

Input Voltage to Maintain Line Regulation (TJ = +25°C)
10=1.0A

-

mQ
mA
ltV

A

NOTES: 1. TlowtoThigh=OOto+125°C
2. Load and line regulation are specified at constant junction temperature. Changes in Vo due to heating effects must be taken into
account separately. Pulse testing with low duty cycle is used.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-55

LM340,A
LM340A-12
ELECTRICAL CHARACTERICISTICS (Vin = 19 V, 10 = 1.0 mA, TJ = Tlow to Thigh (Note 1), unless otherwise noted.)
Characteristics
Output Voltage (TJ = +25°C)
10 = 5.0 mA to 1.0 A

Symbol

Min

Typ

Max

Unit

Vo

11.75

12

12.25

Vdc

Line Regulation
14.8 Vdc to 27 Vdc, 10 = 500 mA
14.5 Vdc to 30 Vdc (TJ = +25°C)
16 Vdc to 22 Vdc
16 Vdc to 22 Vdc (TJ = +25°C)

Regline

Load Regulation
5.0 mA S 10 S 1.0 A
5.0 mA SIO SI.5 A (TJ = +25°C)
250 mA S 10 S 750 mA (TJ = +25°C)

ReQload

-

Output Voltage
14.8 S Vin S 27 Vdc, 5.0 mA S 10 S 1.0 A, PD S 15 W

Vo

Quiescent Current
TJ=+25°C

IB

Quiescent Current Change
5.0 mA S 10 S 1.0 A, Vin = 19 V
15 S Vin S 30 Vdc, 10 = 500 mA
14.8 S Vin S 27 Vdc, 10 = 1.0 A(TJ = +25°C)

~IB

Ripple Rejection
15 S Vin S 25 Vdc, 1= 120 Hz
10=500 mA
10 = 1.0 A (TJ = +25°C)

RR

4.0

-

mV
18
18
30
9.0
mV

-

-

-

60
32
19

11.5

-

12.5

Vdc

6.5
6.0

mA

-

-

-

3.5

-

-

mA

-

-

0.5
0.8
0.8
dB

VI-VO

-

1.7

-

Output Resistance (I = 1.0 kHz)

rO

-

2.0

-

Short Circuit Current Limit (TJ = +25°C)

ISC

Output Noise Voltage (TA = +25°C)
10HzsIsl00kHz

61
61

Dropout Voltage

Average Temperature Coefficient 01 Output Voltage
10=5.0 mA
Peak Output Current (TJ = +25°C)

1.1

Vn

-

TCVO
10

ma
mA

75

-

±1.5

-

mV/oC

-

2.4

-

A

-

-

Vdc

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-56

Vdc

-

14.5

Input Voltage to Maintain Line Regulation (TJ = +25°C)

72

IlV

LM340,A
LM340-15
ELECTRICAL CHARACTERICISTICS (Vin = 23 V,0=
I
500 m,
A TJ= T low t0 T hi£h (N oe
t t) ,un ess 0th erwlse noted)
Characteristics
Output Voltage (TJ = +25°C)
10 = 5.0 mA to 1.0 A

Symbol

Min

Typ

Max

Unit

Vo

14.4

15

15.6

Vdc

-

-

150
150
75
150

-

-

Line Regulation (Note 2)
1B.5 Vdc to 30 Vdc
17.5 Vdc to 30 Vdc (TJ = +25°C)
20 Vdc to 26 Vdc, 10 = 1.0 A
17.7 Vdc to 30 Vdc, 10 = 1.0 A (TJ = +25°C)

Regline

Load Regulation (Note 2)
5.0 mA ~ 10 ~ 1.0 A
5.0 mA ~ 10 ~ 1.5 A (TJ = +25°C)
250 mA ~ 10 ~ 750 mA (TJ = +25°C)

Re9l0ad

Vo

mV
150
150
75

-

15.75

B.5

-

4.0

8.0

-

-

1.0
0.5
1.0

54

70

-

dB

1.7

Vdc

90

-

-

Output Voltage
17.5~Vin ~30

mV

14.25

Vdc

Vdc, 5.0 mA~ 10 ~ 1.0 A, PD ~ 15 W

Quiescent Current
10 = 1.0 A
TJ = +25°C

IB

Quiescent Current Change
17.5 ~ Vin ~30 Vdc, 10 = 500 mA
5.0 mA ~ 10 " 1.0 A, Vin = 23 V
17.9" Vin ,,30 Vdc, 10 = 1.0 A

dlB

Ripple Rejection
10 = 1.0 mA (TJ = +25°C)

RR

-

mA

mA

Output Resistance (f = 1.0 kHz)

ro

Short Circuit Current Limit (TJ = +25°C)

ISC

Output Noise Voltage (TA = +25°C)
10 Hz"f" 100 kHz

Vn

-

TCVO

-

±1.B

-

mV/oC

-

2.4

-

Vdc

Dropout Voltage

VI-VO

Average Temperature Coefficient of Output Voltage
10=5.0 mA
Peak Output Current (TJ = +25°C)

10

Input Voltage to Maintain Line Regulation (TJ = +25°C)
10 = 1.0 A

17.7

2.0

BOO

-

mQ
mA
I1V

A

NOTES: 1. Tlowto Thigh = 0° to +125°C
2. Load and line regulation are specified at constant junction temperature. Changes in Vo due to heating effects must be taken into
account separately. Pulse testing with low duty cycle is used.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-57

LM340,A
LM340A-15
ELECTRICAL CHARACTERICISTICS (V in= 23 V,0=
I
1 0 rnA TJ= Tlow to Thigh (Note 1) unless otherwise noted)
Characteristics
Output Voltage (TJ = +25°C)
10 = 5.0 rnA to 1.0 A

Symbol

Min

Typ

Max

Unit

Vo

14.7

15

15.3

Vdc

-

22
22
30
10

Line Regulation
17.9 Vdc to 30 Vdc, 10 = 500 rnA
17.5 Vdc to 30 Vdc (TJ = +25°C)
20 Vdc to 26 Vdc, 10 = 1.0 A
20 Vdc to 26 Vdc, 10 = 1.0 A (TJ = +25°C)

Regline

Load Regulation
5.0 rnA " 10 " 1.0 A
5.0 rnA" 10" 1.5 A (TJ = +25°C)
250 rnA :s: 10 :s: 750 rnA (TJ = +25°C)

Regload

-

4.0

-

-

-

Vo

Quiescent Current
TJ = +25°C

IB

Quiescent Current Change
5.0 rnA :s: 10 :s: 1.0 A, Vin = 23 V
17.9 :s: Vin :s: 30 Vdc, 10 = 500 rnA
17.9:S: Vin" 30 Vdc, 10 = 1.0 A (TJ = +25°C)

AlB

Ripple Rejection
1B.5:s: Vin :S:2B.5 Vdc, 1= 120 Hz
10=500 rnA
10 = 1.0 A (TJ = +25°C)

RR

rnV

-

-

-

75
35
21

14.4

-

15.6

Vdc

-

6.5
6.0

rnA

-

Output Voltage
17.9 " Vin:S: 30 Vdc, 5.0 rnA:s: 10:S: 1.0 A, PD:S: 15 W

mV

-

12

-

3.5

-

-

rnA

-

-

0.5
O.B
O.B
dB

60
60

-

70

-

-

VI-VO

-

1.7

Output Resistance (I = 1.0 kHz)

ro

-

2.0

Short Circuit Current Limit (TJ = +25°C)

ISC

-

BOO

-

Output Noise Voltage (TA = +25°C)
10 Hz:s:I:s: 100 kHz

Vn

-

90

-

!LV

TCVO

-

±1.B

-

rnVI"C

-

2.4

-

A

-

-

Vdc

Dropout Voltage

Average Temperature Coefficient 01 Output Voltage
10=5.0 rnA
Peak Output Current (TJ = +25°C)

10

17.5

Input Voltage to Maintain Line Regulation (TJ = +25°C)

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA

3-58

Vdc
mil
rnA

LM340, A
LM340-18

ELECTRICAL CHARACTERICISTICS (V,In = 27 V 10 = 500 mA TJ = TI ow to Th'IIg h (Note 1) unless otherwise noted)
Characteristics
Output Voltage (TJ = +25'C)
10 = 5.0 mA to 1.0 A

Symbol

Min

Typ

Max

Unit

Vo

17.3

18

18.7

Vdc

-

-

180
180
90
180

-

-

180
180
90

Line Regulation
21.5 Vdc to 33 Vdc
21 Vdc to 33 Vdc (TJ = +25°C)
24 Vdc to 30 Vdc, 10 = 1.0 A
21 Vdc to 33 Vdc, 10 = 1.0 A (TJ = +25°C)

Regline

Load Regulation
5.0 mA,,; 10"; 1.0 A
5.0 mA,,; 10"; 1.5 A (TJ = +25°C)
250 mA ,,; 10 ,,; 750 mA (TJ = +25°C)

Regload

mV

-

Output Voltage
21 ,,; Vin ,,; 33 Vdc, 5.0 mA,,; 10 ,,; 1.0 A, PD ,,; 15 W

Vo

Quiescent Current
10 = 1.0 A
TJ = +25°C

17.1

IB

-

Quiescent Current Change
21 ,,; Vin ,,; 33 Vdc, 10 = 500 mA
5.0 mA ,,; 10 ,,; 1.0 A, Vin = 27 V
21 ,,; Vin ,,; 33 Vdc, 10 = 1.0 A

AlB

Ripple Rejection
10 = 1.0 mA (TJ = +25°C)

RR

-

-

mV

18.9

Vdc
mA

4.0

8.5
8.0

-

-

-

1.0
0.5
1.0

53

69

-

dB
Vdc

500

-

110

-

!!V

-

mV/oC

mA

Output Resistance (I = 1.0 kHz)

ro

Short Circuit Current Limit (TJ = +25°C)

ISC

Output Noise Voltage (TA = +25°C)
10 Hz,,; I,,; 100 kHz

Vn

-

TCVO

-

±2.3

10

-

2.4

-

A

21

-

-

Vdc

Dropout Voltage

VI-VO

Average Temperature Coefficient of Output Voltage
10=5.0 mA
Peak Output Current (TJ = +25°C)
Input Voltage to Maintain Line Regulation (TJ = +25°C)
10=1.0A

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-59

1.7
2.0

mn
mA

LM340,A
LM340-24
ELECTRICAL CHARACTERICISTICS (V,In= 33 V 10 = 500 rnA TJ= T low to Th'II~ h (Note 1) unless otherwise noted)
Characteristics
Output Voltage (TJ = +25'C)
10 = 5.0 rnA to 1.0 A

Symbol

Min

Typ

Max

Unit

Vo

23

24

25

Vdc

-

-

240
240
120
240

Line Regulation
28 Vdc to 38 Vdc
27 Vdc to 38 Vdc (TJ = +25'C)
30 Vdc to 36 Vdc, 10 = 1 .0 A
27.1 Vdct038Vdc,10=1.0A (TJ=+25'C)

Regline

Load Regulation
5.0 rnA ,;; 10 ,;; 1.0 A
5.0 rnA,;; 10';; 1.5 A (TJ = +25'C)
250 rnA ,;; 10 ,;; 750 rnA (TJ = +25'C)

Re9l0ad

Output Voltage
27 ,;; Yin ,;; 38 Vdc, 5.0 rnA ,;; 10 ,;; 1.0 A, PD ,;; 15 W

Vo

Quiescent Current
10 = 1.0 A
TJ = +25'C

mV

-

-

-

-

22.8

18

-

Quiescent Current Change
27 ,;; Yin ,;; 38 Vdc, 10 = 500 rnA
5.0 rnA ,;; 10 ,;; 1.0 A, Yin = 33 V
27.3';; Yin ,;; 38 Vdc, 10 = 1.0 A

6. 18

Ripple Rejection
10 = 1.0 rnA (TJ = +25'C)

RR

-

4.0

50

66

VI-VO

-

1.7

Output Resistance (I = 1.0 kHz)

rO

-

2.0

Short Circuit Current Limit (TJ = +25'C)

ISC

Output Noise Voltage (TA = +25'C)
10 Hz,;;l,;; 100 kHz
Average Temperature Coefficient 01 Output Voltage
10= 5.0 rnA
Peak Output Current (TJ = +25'C)

Vdc
rnA

8.5
8.0
1.0
0.5
1.0

-

d8

-

Vdc
mQ

200

Vn

-

170

-

TCVO

-

±3.0

-

mV/'C

-

2.4

-

Vdc

10

27.1

Input Voltage to Maintain Line Regulation (TJ = +25'C)
10 = 1.0 A

25.2

rnA

-

Dropout Voltage

mV
240
240
120

-

rnA

IlV

A

NOTES: 1. Tlow to Thigh = 0° to + 125°C
2. Load and line regulation are specified at constant junction temperature. Changes in Vo due to heating effects must be taken into
account separately. Pulse testing with low duty cycle is used.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-60

LM340,A
VOLTAGE REGULATOR PERFORMANCE
The performance of a voltage regulator is specified by its
immunity to changes in load, input voltage, power dissipation,
and temperature. Line and load regulation are tested with a
pulse of short duration « 100 Jls) and are strictly a function of
electrical gain. However, pulse widths of longer duration
(> 1.0 ms) are sufficientto affecttemperaturegradients across
the die. These temperature gradients can cause a change in
the output voltage, in addition to changes caused by line and
load regulation. Longer pulse widths and thermal gradients
make it desirable to specify thermal regulation.
Thermal regulation is defined as the change in output
voltage caused by a change in dissipated power for a specified
time, and is expressed as a percentage output voltage change
per watt. The change in dissipated power can be caused by a

change in either input voltage or the load current. Thermal
regulation is a function of Ie layout and die attach techniques,
and usually occurs within 10 ms of a change in power
dissipation. After 10 ms, additional changes in the output
voltage are due to the temperature coefficient of the device.
Figure 1 shows the line and thermal regulation response of
a typical LM340AK-S.0 to a lOW input pulse. The variation of
the output voltage due to line regulation is labeled Aand the
thermal regulation component is labeled A. Figure 2 shows the
load and thermal regulation response of a typical
LM340AK-S.0 to a 15 W load pulse. The output voltage
variation due to load regulation is labeled A and the thermal
regulation component is labeled A.

Figure 1. Line and Thermal Regulation

Figure 2. Load and Thermal Regulation

t, TIME (2.0 ms/DIV)
LMI40AK·S.0
Vout= S.OV
= Regline = 4.4 mV
Vin = ISV
= Regtherm = 0.0020% VoIW
lout = OA -+ I.S A -) 0 A

t, TIME (2.0 ms/DIV)
LM340AK-S.0
Vout=5.0V
= Regline = 2.4 mV
Vin= 8.0V -+ 18V -+ 8.0V
= Regtherm = 0.0030% VOIW
lout=I.0A

CD

CD
®

®

Figure 3. Temperature Stability

Figure 4. Output Impedance
100

1.02
w

I
I
I
I
Vin- Vout=5.0V _
lout = 100 mA

~
~ 1.01
>
~
~

is 1.00
c

~
::;; 0.99

9.
w

t:>

z

C§

......
./

w
c..
~

......... i'...

f-

:::;)

c..
f-

10-1
I - Vout=S.OV
Vin=7.5V
to-2 I - lout=I.0A
CO=O
I-- T =25°C

:::;)

0_

a:
oz

to-3

/"
/

--

/

0

N

0.98
-90

-SO

-10
30
70
110
TJ, JUNCTION TEMPERATURE (0C)

150

190

10

100

1.0k

10k

lOOk

f, FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-61

1.0M

10M

100M

LM340, A

Figure 5. Ripple Rejection versus Frequency
100

I

80

0

lout=50rnA

-

1D
:E!.
:z

t

a:

lout = 1.5 A
Vout = 5.0V
Vin=10V
Co=o
TJ = 25°C

60

~
a.
a.

il:

a:
a:

1D

/

l3w

La

Figure 6. Ripple Rejection versus Output Current
100.--,--r"T'T"TTm--,-,...,-rrTn,--,--r"T'T"TTm

20
1.0

10

"'\ \

,

-,

40

:E!.

100

1.0k

l3w

La
a:

~ 60
a.
a.

\

il:

\
10k

-

:z 80

0

a:
a:
40

\

lOOk

1.0M

10M

100M
lout, OUTPUT CURRENT (A)

t, FREQUENCY (Hz)

Figure 7. Quiescent Current versus
Input Voltage

Figure 8. Quiescent Current versus
Output Current

4.0

5.0

<.§.
0-

:z
w

2.0

:z
w

/

(,)

rn

w
5

c:

~

z
w
a:

if

a:
a:
=>
(,)
0-

~

I

3.0

I

3 3.0

TJ = 25°C
Vout = 5.0 V
lout = 1.0 A

1.0

~ 2.0
w

5

o

I

o

TJ = 25°C
Vin - Vout = 5.0 V

!z
w

V

u..
o.u..
~a

- w 1.0

--

Figure 10. Peak Output Current
4.0

AVout = 100 rnV

t-.

r--r---

--- -

I

~ 3.0

10 = 1.0 A-

z
w
a:
a:
=>

I.
10 -500 rnA

(,) 2.0

r---.4-

"5C!l

~~

~

~

10 = lOrnA

o

10

->

-75

- 1.0

"5
o

c> 0.5

o

-50

-25

0

25

50

10

0.1
1.0
lout, OUTPUT CURRENT (A)

Vin, INPUT VOLTAGE (Vdc)

75

100

125

r
I
I
I

oI '
o

""

~

10

N = 25°C I

"'l.
20

30

Vin - Vout, INPUT-VOLTAGE DIFFERENTIAL (V)

TA, AMBIENT TEMPERATURE (0C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-62

40

LM340,A
Figure 12. Load Transient Response

Figure 11. Line Transient Response
w

~

O.B

~ ~

0.6

~

!5

Vout= 5.0V
lout = 150 rnA
CO=O
TJ = 25°C

g

0.4
~ 0.2
[Ei 0

c:so
o

>



0.2

11\

5
~

-0.2
-0.4
-0.6

g

1.5

!5 !z

1.0

~

1.0

V

-0.2
-0.3





Figure 9. Temperature Stability

Figure 10. Minimum Operating Current

1.260

5.0
<,4.5

~
t\j1.250

!"3
$!

,..,...

I-"""

~ 1.240

r-- r--.....

~

TJ = -55°C

4.0

,/' TJ = 25°C

~ 3.5

.......

",

~ 3.0

r-......

...

..;.:: ~

o

!z

2.5
.~ ~

ill

~

5 1.5

~ 1.230

1.220
-75

o

c5 1.0
0.5

-50

-25

0
25
50
75
100 125
TJ, JUNCTION TEMPERATURE (0C)

I '""'"

F-

II

o
o

150

10
20
30
40
Vin - Vout, INPUT - OUTPUT VOLTAGE DIFFERENTIAL (Vdc)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-69

I

TJ = 150°C-

/"

~ 2.0

iTI

a:

~

LM350

lD
:Eo

z

Figure 11. Ripple Rejection versus Output Voltage

Figure 12. Ripple Rejection versus Output Current

100

140

1

Q

II

b
w

-

.....

80

CAdj= 10 IlF

60

Lil
IX:

!:!l
40
D..

lD
z

§w

Wilhoul CAdj

I--

80

!:!l
D..

60

a:

40

D..

30

r- Vin-Vout =5V

--

CAdj= 10llF

-I

WrthoutCAdj

IL = 500 rnA
20 '- !=l20Hz
T =25°C
o J I I I I I 1111
0.01
0.1
1
lout, OUTPUT CURRENT (A)

r£
IX:

10
15
20
25
Vout, OUTPUT VOLTAGE M

5

100

Lil
IX:

Vin- Vou1=5V
D..
I - - IL= 500 mA
a:
r£
!=120Hz
IX: 20 I - TJ = 25°C

o
o

120

:Eo

35

Figure 13. Ripple Rejection versus Frequency

10

Figure 14. Output Impedance

100

r==
~

I
lD

:Eo 80

z

/

0

~

60

!:!l
D..

40

Lil
IX:
D..

a:

""

// -.......

1(/

r£
IX: 20

,I,

,
"""
I'...

"\, '\
I""

Wrthou1 CA1j

l

o

10

100

IL = 500 rnA
Vin=15V
VOu1=10V
TJ = 25°C

loOk

10k

"'"

lOOk

I

-

~

r---I--

S

1

I
CAWll0llF

Vin=15V
Vout= 10V
~ IL=500rnA
TJ = 25°C

'----

W~hout CAdj
CAdj = 10llF

I

I

1.0M

10-3

10M

10

100

loOk
10k
!, FREQUENCY (Hz)

!, FREQUENCY (Hz)

Figure 15. Line Transient Response

w

;:!;

w

g ~ 1.5
~ iri 0.5
SO 0

I\.

\.

w

~

g
....
~

;;!;_
.5

>

 25 IlF, CAdj > 10 IlF). Diode Dl
prevents Co from discharging thru the IC during an input short
circuit. Diode D2 protects against capacitor CAdj discharging
through the IC during an output short circuit. The combination
of diodes Dl and D2 prevents CAdj from discharging through
the IC during an input short circuit.
Figure 18. Voltage Regulator with
Protection Diodes

Vref = 1.25 V Typical
lN4002

Load Regulation
The LM350 is capable of providing extremely good load
regulation, but a few precautions are needed to obtain
maximum performance. For best performance, the
programming resistor (Rl) should be connected as close to
the regulator as possible to minimize line drops which
effectively appear in series with the reference, thereby
degrading regulation. The ground end of R2 can be returned
near the load ground to provide remote ground sensing and
improve load regulation.

Adjust

b----_--'

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-71

II
I

LM350
Figure 19. "Laboratory" Power Supply with Adjustable Current Limit and Output Voltage
06
)"

•

1N4002

Vout1 RSC

Vin2

~

Vout2

1----'0..................- -.........+
240

Vin"'--o--!
32V

05
IN4001

01
1N4001
Current
UmH
Adjust

1K

1N4001
02

Adjust 2
5.0K

Vo

1

1.o1lF
':" Tantalum

Voltage
Adjust
1N4001

01
2N3822

03
Output Range:
0,;;VO,;;25V
0,;;10,;;1.5A

04

-10V
Oiodes 01 and 02 and transistor 02 are added to allow adjustment
of output voltage to 0 V.
-10V

06 protects both LM350's during an input short circuit.

Figure 20. Adjustable Current Limiter

Figure 21. 5.0 V Electronic Shutdown Regulator
01

Vout- lout
620

Vout
01
1N4001
100

* To provide current limiting of 10
to the system ground, the source of
the FET must be tied to a negative
voltage below -1.25 V.

120

02
1N4001
720

i---"'VV'V---< TTL
Control
1.0k

2N5640

R2';; Vref
lOSS
Vref
R1 = lOmax + lOSS

Minimum Vout = 1.25 V
01 protects the device during an input short circuit.

Vo < V(BR)OSS + 1.25 V + VSS
IlInin - lOSS < 10 < 3.0 A
As shown 0 <10 < 1.0 A

Figure 22. Slow Turn-On Regulator

Figure 23. Current Regulator

Vout
240
Adjust

Vout

R1

1N4001

0-----.

R2

lout=

Vref
(AI
) + IAdj
1.25V

R1
10mA,;;lout';;3,OA

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-72

MOTOROLA

LM317M

SEMICONDUCTOR-----TECHNICAL DATA

Three-Terminal Adjustable Output
Positive Voltage Regulator
The LM317M is an adjustable three-terminal positive voltage regulator capable
of supplying in excess of 500 mA over an output voltage range of 1.2 V to 37 V.
This voltage regulator is exceptionally easy to use and requires only two external
resistors to set the output voltage. Further, it employs internal current limiting,
thermal shutdown and safe area compensation, making it essentially blow-out
proof.
The LM317M serves a wide variety of applications including local, on-card
regulation. This device also makes an especially simple adjustable switching
regulator, a programmable output regulator, or by connecting a fixed resistor
between the adjustment and output, the LM317M can be used as a precision
current regulator.

MEDIUM-CURRENT
THREE-TERMINAL
ADJUSTABLE POSITIVE
VOLTAGE REGULATOR
SILICON MONOLITHIC
INTEGRATED CIRCUIT

TSUFFIX
PLASTIC PACKAGE
CASE 221A

• Output Current in Excess of 500 mA
• Output Adjustable between 1.2 V and 37 V

(All 3 Packages)
PIN 1. Adjust
2. Vout
3. Vin

• Internal Thermal Overload Protection
• Internal Short Circuit Current Limiting
• Output Transistor Safe-Area Compensation
• Floating Operation for High Voltage Applications

Heatsink surface connected
to Pin2

• Standard 3-Lead Transistor Packages
• Eliminates Stocking Many Fixed Voltages

DT-1 SUFFIX
PLASTIC PACKAGE
CASE 369
(DPAK)

Standard Application
Vin

[M317

.

IAdj~

Vout
Vout
Rl
240

Adjust

DTSUFFIX
PLASTIC PACKAGE
CASE 369A
(DPAK)

.

+ Co
1.0j.LF

Cin
O.Ij.LF

/; }"'"R2
ORDERING INFORMATION
Device
• " Cin is required if regulator is located an appreciable distance from power supply fiher.
.. " Co is not needed for stability, however, it does improve transient response.

Since IAdj is controlled to less than 100 j.LA, the error associated with this term is negligible in most
applications.

LM317MT

Package

0° to +125°C

Plastic Power

LM317MBT#

-40° to +125°C

Plastic Power

LM317MDT
LM317MDT-l

0° to 125°C

DPAK

# Automotive temperature range selections are
available with special test conditions and
additional tests. Contact your local Motorola
sales office for information.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-73

Tested Opearting
Temperature Range

•

I

LM317M
MAXIMUM RATINGS
Rating

Symbol

Value

Unit

VI-VO

40

Vdc

Power Dissipation

Po

Internally Limited

W

Operating Junction Temperature Range

TJ

Oto+125

°C

Tstg

-65 to +150

°C

Input-Output Voltage Differential

lEI

Storage Temperature Range

ELECTRICAL CHARACTERICISTICS(VI-VO = 5.0 V; 10 = 0.1 A, TJ = Tlow to Thigh [see Note I]; P max per Note 2;
unless otherwise noted.)
Characteristics

Figure

Symbol

Min

Typ

Max

Unit

Line Regulation (Note 3)
TA = 25°C, 3.0 V S VI-VO S 40 V

1

Regline

-

0.01

0.04

%N

Load Regulation (Note 3)
TA= 25°C, 10 mAS IOSO.5A
VOS5.0V

2

Regload

-

5.0
0.1

25
0.5

%NO

VO~5.0V

mV

3

IAdj

-

50

100

Adjustment Pin Current Change
2.5 V S VI-VO S 40 V, 10 mA S IL S 0.5 A, Po S Pmax

1,2

dlAdj

-

0.2

5.0

ItA
ItA

Reference Voltage
3.0VSVI-VOS40 V, 10 mAS IOSO.5A, Po S Pmax

3

Vref

1.25

1.30

V

Line Regulation (Note 3)
3.0 V SVI-VO S40 V

1

Regline

-

0.02

0.07

%N

Load Regulation (Note 3)
10mASloSO.5A
VOS5.0V

2

Regload

-

20
0.3

70
1.5

Adjustment Pin Current

1.20

mV

Temperature Stability (Tlow S TJ S Thigh)

3

TS

-

0.7

-

%NO
%NO

Minimum Load Current to Maintain Regulation
(VI-VO = 40 V)

3

ILmin

-

3.5

10

mA

Maximum Output Current
VI-VO S 15 V, Po S Pmax
VI-VO = 40 V, Po S; Pmax , TA = 25°C

3

Imax
0.5
0.15

0.9
0.25

-

0.003

-

-

-

VO~5.0V

RMS Noise, % of Vo
TA= 25°C, 10 Hz sf S 10 kHz
Ripple Rejection, Vo = 10 V, f = 120 Hz (Note 4)

-

N

4

RR

W~houtCA~

A

%NO
dB

66

65
80

Long-Term Stability, TJ = Thigh (Note 5)
TA= 25°C for Endpoint Measurements

3

S

-

0.3

1.0

%/1.0 k
Hrs.

Thermal Resistance Junction to Case, T Suffix Package

-

ReJC

-

7.0

-

°CIW

CAdj= IO Il

NOTES: 1. Tlow to Thigh = 0° to + 125°C
2. Pmax =7.5W
3. Load and line regulation are specMied at constant junction temperature. Changes in Vo due to heating effects must be taken into
account separately. Pulse testing with low duty cycle is used.
4. CAdj' when used, is connected between the adjustment pin and ground.
5. Since Long-Term Stability cannot be measured on each device before shipment, this specification is an engineering estimate of
average stability from lot to lot.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-74

LM317M
SCHEMATIC DIAGRAM

300

,/I

)300

)300

t-..

r-...

. ~~.

J

3.0k

r-...

I

~" 6.8V
~

6.8V

350
18k

r-

V
r--

{

.mW

130

200k
6.3V
~v 180

"t-..
'I

"'I

".,

rY"

..-1

V
r-.

td

"'I

'I

1'0.

(1

V

r-.

500
'I

5.1k

r-..

180

~
2.0k

roo

::~ 10pF

6.0k

1

400

"..,

V

1.25

60

"'I
2.4k 12.8k

-

50
.r.

T

Figure 1. Line Regulation and ~Adj/Line Test Circuit

Vee
Une Regulation (%N) = VOVH-VOL
OL

~H

Vout

Adjust

VOL

Rl

240

1%

• Pulse Testing Required:
1% Duty Cycle
is suggested.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-75

x 100

Adjust

..
I

LM317M
Figure 2. Load Regulation and ~IAdj/Load Test Circuit
load Regulation (mV) = Vo (min load) -VO (max load)
load Regulation (%NO) =

lEI

VI

Vin

Vo (min load) - Vo (max load)
Vo (min load)

LM317M

VO(max load)
IL

RI

RL
(max load)

240
1%

JL

+
O.IIlF

~ Vo (min load)

Voul

Adjust
Cin

X 100

RL
(min load)

CO, ~ 1.0llF

IAdj

R2
1%
• Pulse Testing ReqUired:
1% Duly Cycle is suggested.

Figure 3. Standard Test Circuit
Vout

LM317M

240
1%
Vo

To calculate R2:
Vout = ISET R2 + 1.250 V
Assume ISET = 5.25 mA

'Pulse Testing Required:
1% Duly Cycle is suggested.

Figure 4. Ripple Rejection Test Circuit
24V-

14V~

VOul

Vin

VOul = 10 V

LM317M

f=120Hz

Adjust
Cin ;::

240
1%

RI

O.IIlF

01"

Ail' IN4002
Co

1.65K
1%

R2

.

RL

+

r:;

1.011F

..L+

CAdj

T

IOIlF

1
L..

• 01 Discharges CAdi HOutput is Shorted to Ground.
"CAdj provides an AC ground to the adjust pin.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-76

Vo

LM317M
Figure 5. Load Regulation

I I I-i -

~ 0.4

w

Yin =451/
Vout=5.0V
_
r--IL = 5.0 rnA to 40 rnA

(!)

:z

«
::t:
u

0.2

W

0

!:§

-0.2

(!)

0

>

I-

:::>

c..

I-

:::>
0

I

-0.6

-1.0
-50

-25

r--

0

I

La 70

a:

0
25
50
75
100 125
TJ. JUNCTION TEMPERATURE (OC)

--

~

c..
c..

a:
a:
a:

150

Without CAdj _ r--60 IL = 100 rnA
f=120Hz
I I
Vout=10V
Yin = 14 Vto 24 V
50
-50 -25
0
25
50
75
100 125 150
TJ. JUNCTION TEMPERATURE (OC)

Figure 7. Current Limit

Figure 8. Dropout Voltage

1.0

2.5

w

(!)

g

-r-......,

--

0.80

~
a

a: 0.60

5

§
-so

0.40

""

...... ........

........

!:§
~

~~
g:~

"

"'-

TJ = 125°C

I

o
o

10

I-

I

IL= 100 rnA

i:D 1.5

c..~

:z "--0

"'

30

40

I

~

0.5

50

-50

5.0

0

a5

ar

4.0

:z

2.5
2.0

0.5

0

,,/

3.0

1.0

150

90

;g. 80

3.5

1.5

0
25
50
75
100 125
TJ. JUNCTION TEMPERATURE (OC)

100

4.5
<'
§.

a:
a:
:::>
u
I:z
w
u
en
w
5

-25

Figure 10. Ripple Rejection versus Frequency

Figure 9. Minimum Operating Current

:z
w

r-..

1.0

)

Vin - Vou!. INPUT - OUTPUT VOLTAGE DIFFERENTIAL (V)

I-

-- --IL= 500 rnA

r-..

~a:

r--....

I

20

TJ=25°C-

.....

........

0.20

.. ::::::::r--

2.0

5;:::
"

Without CAdj = 10 I1F

f3w

I I I
I I I

>

..

ar

;g. 80

:z

I
I
I
Yin = to V
- r--Vout = 5.0V
IL = 5.0 rnA to 100 rnA

-0.4

"S -0.8
0



.:!. 70

~

~

~

!z
w

1.250

>

(,)

80

V

/

1.240

r-- r---.....

::::l

............

1/

1.230 -

65

~ 60

a:

I-......

!z
w

55

~ 50

Vin =4.2V
- Vaut= vref
IL = 5.0 rnA

::::l

d
«

i

/

45

-25

0

25

50

75

100

125

"

-50

150

-25

0

Figure 13. Line Regulation

~
w

Z

«
:J:
2-

I

>:::t

::::l

-0.4

::::l

o.

-0.6

'S

-0.8

0

>



U)

-1.0
-50

100

Bandwidlh 100 Hz to 10 kHz

10

(!l

~

DI-

50

w

(!l

I-

25

J I.

0.4 I - - t- Vin = 4.25 Vta 41.25 V
Vaut = Vref
0.2 t--- t-IL=5.0rnA

-0.2

r-~

1-'

Figure 14. Output Noise

w

13

~ i::"'-

TJ. JUNCTION TEMPERATURE (0C)

TJ. JUNCTION TEMPERATURE (0C)

(!l

~

...~ ~

40
35

1.220
-50

I
I
.1.
Vin = 6.25 V
Vaut = Vref
- - - IL=10rnA
- - IL=100rnA

150

Figure 16. Load Transient Response

(!l

13o

(!l

::::lz

> Z~

w

130

;:: ~ 1.5

:=

~ 1.0
0:>0.5
• w
~ CI
0

I-

::::l"<

>



w
• Cl -1

::::l

II
'I.,

D-

>

DI-

•

\.

r - - Vaut=10V
IL =50 rnA
-1.5 r - -TJ=25°C
10

::::l

CL = 1.0l1F

L

I

20
I. TIME(IlS)

30

40

-

LM317M
APPLICATIONS INFORMATION
Basic Circuit Operation

External Capacitors

The LM317M is a three-terminal floating regulator. In
operation, the LM317M develops and maintains a nominal
1.25 V reference (Vref) between its output and adjustment
terminals. This reference voltage is converted to a
programming current (lPROG) by Rl (see Figure 17), and this
constant current flows through R2 to ground. The regulated
output voltage is given by:

A 0.1 ~F disc or 1.0 ~F tantalum input bypass capacitor
(Cin) is recommended to reduce the sensitivity to input line
impedance.
The adjustment terminal may be bypassed to ground to
improve ripple rejection. This capacitor (CAdj) prevents ripple
from being amplified as the output voltage is increased. A
10 ~F capacitor should improve ripple rejection about 15 dB at
120 Hz in a 10 V application.
Although the LM317M is stable with no output capacitance,
like any feedback circuit, certain values of external
capacitance can cause excessive ringing. An output
capacitance (CO) in the form of a 1.0 ~F tantalum or 25 ~F
aluminum electrolytic capacitor on the output swamps this
effect and insures stability.

Vout

= Vref (1

R2
+Rl ) + IAdj R2

Since the current from the terminal (lAdj) represents an error
term in the equation, the LM317M was designed to controllAdj
to less than 100 ~A and keep it constant. To do this, all
quiescent operating current is returned to the output terminal.
This imposes the requirement for a minimum load current. If
the load current is less than this minimum, the output voltage
will rise.
Since the LM317M is a floating regulator, it is only the
voltage differential across the circuit which is important to
performance, and operation at high voltages with respect to
ground is possible.
Figure 17. Basic Circuit Configuration
Yin
LM317M

I

Vout

It

Vref

Adjust

-

\

Rl

~ IpROG

Protection Diodes
When external capacitors are used with any IC regulator it
is sometimes necessary to add protection diodes to prevent
the capacitors from discharging through low current points into
the regulator.
Figure 18 shows the LM317M with the recommended
protection diodes for output voltages in excess of 25 V or high
capacitance values (CO> 25 ~F, CAdj > 5.0 ~F). Diode Dl
prevents Co from discharging thru the IC during an input short
circuit. Diode D2 protects against capacitor CAdj discharging
through the IC during an output short circuit. The combination
of diodes Dl and D2 prevents CAdj from discharging through
the IC during an input short circuit.
Figure 18. Voltage Regulator with
Protection Diodes

Vout

IAdj

R2
lN4002

Vref = -1.25 V Typical

Vout

Load Regulation
The LM317M is capable of providing extremely good load
regulation, but a few precautions are needed to obtain
maximum performance. For best performance, the
programming resistor (Rl) should be connected as close to
the regulator as possible to minimize line drops which
effectively appear in series with the reference, thereby
degrading regulation. The ground end of R2 can be returned
near the load ground to provide remote ground sensing and
improve load regulation.

Adjust i:r------
<=>

10k

Vout

220

'"
u...

M( "'"' vf ""nJl-'"
u...

~

l....L

750

If1

60k

~

lOOk

[~

~

VI

<=>
<=>

18k

'"

2.0k

15pF

t;1

f/

t1

~

h.

I

>{

4.0k

f/
V
~--+---+-+_--~_+----_r----~--_+~----~f/
h.
r.
6.0k ~

~'~

'"

-;Q

~

Y
h..

~

rt

100F

k ~r-+----1--~~-t-~-.---+-'--r1

~r<

2'--2k
2===-18k"---'+I\I\,-j:

~

100pF;::r

'J~

I

f

5.0pF

240

pF

~

~1-*---'V'5.0VV--k-+--~*-11
t--< ~

lOOk

0.2
15

155
2.4k
500
15
500
O.
1 - -......- - - - - < - - - - - > - - - - - - - - - - - - - - - - - - o - + - - - - - - - - - - - - * - O V i n
600

Figure 1. Line Regulation and illAdj/Line Test Circuit

R2

1%

Co
Rl

* Pulse Testing Required:
1% Duty Cycle
is suggested.

Vin

+
1.01lF

120
1%

RL

Vout

Une Regulation

(%Nol =

VOH

U ---

VOL

IVOL-VOHI
IVOHI
x 100

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3·83

--, r --

LM337M
Figure 2. Load Regulation and

~IAdjiLoad

Test Circuit

, Pulse Testing required:
t% Duty Cycle is suggested.
Co +
t.O~F

RL
(max
Load)

JL

-VO (min Load)
Vo (max Load)

Load Regulation (mV) = Vo (min Load) - Vo (max Load)

Load Regulation (%NO) =

Vo (min Load) - Vo(max Load)
Vo (min Load)
x 100

Figure 3. Standard Test Circuit

R2

1%

+
Co

t.O~F

Rl

1.0~F

Vo

120

To Calculate R2:
R2=

(~
Vref

-1) Rl
Pulse Testing Required: 1% Duty Cycle is suggested.

This assumes IAdj is neglible.

Figure 4. Ripple Rejection Test Circuit

J-

1

-.L+

R2

Cin

r

CAdiT 10~F

1%

1.0~F

Co
Adjust

Vin

I
I

14.3V--T\

LM337M

Rl

i

120

01'

+

t.O~F

RL

lN4002

~

Vout
Vout = -1.25 V

.

4.3V--~-~

'01 Discharges CAdj ~ Output is shorted to Ground.

f=120Hz

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-84

LM337M
Figure 5. Load Regulation

~

0.2

-

w

'"«z

:I:

-0.2

w

-0.4

§!

-0.6

(;)

13'"

...=>
...=>
Q.

a

6

>

Figure 6. Current Limit
4
IL-0.5A

g

...

I--TJ=25°C

=>

,""'

...=>
...=>
(;)

Vin=-15V
Voul = -10 V
'1
I

-1.0
-1.2

.

f-- JTJ=150 0 C'

~

a


(;)

...zw

75
70
65
60

~

55

<..

50

'6"

45

=>

a

.:!-

r--..

~~

I-'"

C

13§!'"

II
Voul= -5.0 V
e.Voul = 100 mV

2.5

~

a~ 1.5 I

~

Q.

-50

-25

0

25

50

75

100

125

~ 1.0
a

150

-- -- -- -

r-- r--

2.0

~

40

'"i"-

-"'"'- r-....

iL=20rmA

-50

>

-25

I

TJ. JUNCTION TEMPERATURE (0C)

40

Figure 8. Dropout Voltage

w

0

:::::::- --. .......... I~OOrnA
r-.:::: ~
IL =20 rnA
r-.:::::t

25

50

75

100

125

150

TJ. JUNCTION TEMPERATURE (OC)

>

Figure 10. Minimum Operating Current

Figure 9. Temperature Stability
1.270
<,1.8
§. 1.6

2:
~ 1.260

ffi

13

0:

§!
w

~

-

1.250

w

a:

~
w

0:_

1.4

!z

1.0

~ 0.6

2!

>

0.2
0
25
50 75
100 125
TJ. JUNCTION TEMPERATURE (OC)

.~

150

··-r-=--

TJ = 150°C-

"....

Ir::;;;; F'P

II

o
o

1.230

~

.-'

~ 0.8
';; 0.4

-25

'"

~~

(;)

1.240

-50

TJ = -55°C
/ " TJ = 25°C

~ 1.2

10

20

30

40

VI- VO. INPUT - OUTPUT VOLTAGE DIFFERENTIAL (Vdc)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-85

..

I

T =55°C

10
20
30
VI - Vo. INPUT VOLTAGE DIFFERENTIAL (Vdc)

~ 3.0

- - -V

.......~ ~.

.... r-..::::
~- 1---

I

80

<'

--

t-....

!

TJ. JUNCTION TEMPERATURE (OC)

Figure 7. Adjustment Pin Current

.~

r-.~,

Q.

-0.8

-1.4

3

z
w
a:
a:

LM337M
Figure 11. Ripple Rejection versus Output Voltage
100
10

•

:E.

CAdj= 10 IlF

80

Z

w

Li3

I..........

60

a:
~

DD-

c:
a:
a:

100

I

0

;:.
u

Figure 12. Ripple Rejection versus Output Current

40

10
:E.

--

II
~A~ = ~OIlF

80

Z

0

.1

WrthoutCAdj

!3w

WtthoutCAdj

60

Li3
a:
~

40

c:
a:
a:

20

DD-

Yin - Vout = 5.0 V
IL = 500 rnA
20
t=120Hz
' - - TJ = 25°C
I
I
o
o -5 -10 -15
I -

-

-20

-25

-30

-35

r--- Vin=-15V

o

;-40

Vout = -10 V
~t=120Hz

I-ITy2n II

0.01

0.1
1.0
10, OUTPUT CURRENT (A)

YO, OUTPUT VOLTAGE M

10

Figure 14. Output Impedance

Figure 13. Ripple Rejection versus Frequency
100
:E.
Z

80

I
I
CAd' = 10 IlF

0

!3
w
Li3
a:
~

DD-

c:

a:'
a:

60 V""

...... i'..

..........
.......

40

WtthoutCAdj
I

20

o

10

.....

Vin=-15V
Vout=-10V
Il = 500 rnA
TJ = 25°C
100

1.0k

10-1 ~WithoutCAdj

~

" """'- ~,

10k

~

w
U

" "'\.

I'--,..

~

Vin=-15V
Vout = -10 V
100 ~ Il=500rnA
t:: Cl= 1.OIlF
TJ=25°C

9:

10

lOOk

~ 10-2

o

N

1.0M

10-3
10

10M

1.0 k

100

t, FREQUENCY (Hz)

Figure 15. Line Transient Response
~

~c

-9

0.6

 w

.... C!I

0.2
0
-0.2
-0.4

0

~ ~ -0.5

Z:J:
~ U

>

 Z
!5Q

10 k

t, FREQUENCY (Hz)

40

t,TIME(~)

o

10

20
t, TIME (!ls)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3,86

/

I

If

30

40

LM337M
APPLICATIONS INFORMATION
Basic Circuit Operation

degrading reg.I,lIation. The ground end of R2 can be returned
near the load ground to provide remote ground sensing and
improve load regulation.

The LM337M is a three-terminal floating regulator. In
operation, the LM337M develops and maintains a nominal
-1.25 V reference (Vref) between its output and adjustment
terminals. This reference voltage is converted to a
programming current (lPROG) by R1 (see Figure 17), and this
constant current flows through R2 to ground. The regulated
output voltage is given by:
Vout = Vref (1 +

=~

+ IAdj R2

Figure 17. Basic Circuit Configuration

+

~ R2

IpRONG

+

Jf
Vref
Vin

A 1.0 IlF tantalum input bypass capacitor (Cin) is
recommended to reduce the seJ;lsitivity to input line
impedance.
The adjustment terminal may be bypassed to ground to
improve ripple rejection. This capacitor (CAdj) prevents ripple
from being amplified as the output voltage is increased. A
10 IlF capacitor should improve ripple rejection about 15 dB at
120 Hz in a 10 V application.
An output capacitance (CO) in the form of a 1.0 IlF tantalum
or 10 IlF aluminum electrolytic capacitor is required for
stability.

)

Since the current into the adjustment terminal (lAdj)
represents an error term in the equation, the LM337M was
designed to control IAdj to less than 100 IlA and keep it
constant. To dothis, all quiescent operating current is returned
to the output terminal. This imposes the requirement for a
minimum load current. If the load current is less than this
minimum, the output voltage will rise.
Since the LM337M is a floating regulator, it is only the
voltage differential across the circuit which is important to
performance, and operation at high voltages with respect to
ground is possible.

~

External Capacitors

Rl

~

\

Col

Vout

Protection Diodes
When external capacitors are used with any IC regulator it
_ is sometimes necessary to add protection diodes to prevent
the capacitors from discharging through low current points into
the regulator.
Figure 18 shows the LM337M with the recommended
protection diodes for output voltages in excess of-25 Vor high
capacitance values (CO> 25 IlF, CAdj > 10 IlF). Diode 01
prevents Co from discharging thru the IC during an input short
circuit. Diode D2 protects against capacitor CAdj discharging
through the IC during an output short circuit. The combination
of diodes D1 and 02 prevents CAdj from discharging through
the IC during an input short circuit.
Figure 18. Voltage Regulator with
Protection Diodes

Vout
r--.-------.----------~~---.-o+

+

Vref = -1.25 V TypicaJly

Vout

Load Regulation
The LM337M is capable of providing extremely good load
regulation, but a few precautions are needed to obtain
maximum performance. For best performance, the
programming resistor (R1) should be connected as close to
the regulatqr as possible to minimize line drops which
effectively appear in series with the reference, thereby

Adjust

-Vin o-e-.P-Crl lM337M 1-0-+-.......---+---'---+--0
Vin
Vout
01

lN4002

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-87

LM2931
Series

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Low Dropout Voltage Regulators
The LM2931 series consists of positive fixed and adjustable output voltage
regulators that are specifically designed to maintain proper regulation with an
extremely low input-to-ouput voltage differential. These devices are capable of
supplying output currents in excess of 100 mA and feature a low bias current
of 0.4 mA at 10 mA output.
Designed primarily to survive in the harsh automotive environment, these
devices will protect all external load circuitry from input fault conditions caused
by reverse battery connection, two battery jump starts, and excessive line
transients during load dump. This series also includes internal current limiting,
thermal shutdown, and additionally, is able to withstand temporary power-up
with mirror-image insertion.
Due to the low dropout voltage and bias current specifications, the LM2931
series is ideally suited for battery powered industrial and consumer equipment
where an extension of useful battery life is desirable. The 'c' suffix adjustable
output regulators feature an output inhibit pin which is extremely useful in
microprocessor-based systems.
• Input-to-Output Voltage Differential of Less Than 0.6 V at 100 mA
• Output Current in Excess of 100 mA
• Low Bias Current
• 60 V Load Dump Protection
• -50 V Reverse Transient Protection
• Internal Current Limiting with Thermal Shutdown
• Temporary Mirror-Image Protection
• Ideally Suited for Battery Powered Equipment

ZSUFFIX
PLASTIC PACKAGE
CASE 29
PIN 1. Output
2. Ground
3. Input

"

3

TSUFFIX
PLASTIC PACKAGE
CASE 221A
Heatsink surface
connected to Pin 2
PIN 1. Input
2. Ground
3. Output

y

FIXED

N'C'

Gnd
Input

4

N.C.

Gnd
Output

8 1

04

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SOP-B)

[fop View)
ADJUSTABLE

~~~f~:
Gnd
Input

}

8 1

Adjust
Gnd
Output

[fop View)

Internal Schematic
Inputo-~----------~>--------,

Output

ADJUSTABLE
TSUFFIX
PLASTIC PACKAGE
CASE 314D
Heatsink surface
connected to Pin 2
PIN 1. Adjust
2. Output Inhibit
3. Ground
4. Input
5. Output

ORDERING INFORMATION

o-+-~----.,.+-t--,

Output
Voltage

Tolerance

Package

LM2931AO-S.O

S.OV

±3.8%

SO-8

LM2931AT-S.O

S.OV

±3.8%

221A

LM2931AZ-S.0

S.OV

±3.8%

29

LM2931 0-5.0

S.OV

±S.O%

SO-8

LM2931T-S.O

S.OV

±S.O%

221A

LM2931 Z-5.0

S.OV

±5.0%

29

LM2931CO

Adjustable

±S.O%

SO-8

LM2931CT

Adjustable

±S.O%

3140

Device

30k
,
Adjust o+--E'-Vlllr--[

,

92.8k

Ground ~-+----___-+-+--+--___----4-+--+-+--+--"""---'
'Deleted on Adjustable Regulators

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-88

LM2931 Series
MAXIMUM RATINGS
Rating

Symbol

Input Voltage Continuous
Transient Input Voltage (t" 100 ms)
Transient Reverse Polarity Input Voltage
100 ms
1.0% Duty Cycle,

t"

Value

Unit

VI

40

Vdc

VI(t)

60

Vpk

-VI(t)

-50

Vpk

PD
8JA
8JC

Internally Limited
178
83

W

Power Dissipation
Case 29 (TO-92)
TA = 25°C
Thermal Resistance Junction to Ambient
Thermal Resistance Junction to Case
Case 751 (SOP-8)
TA = 25°C
Thermal Resistance Junction to Ambient
Thermal Resistance Junction to Case
Case 221A and 314D (TO-220 Type)
TA = 25°C
Thermal Resistance Junction to Ambient
Thermal Resistance Junction to Case

PD
8JA
8JC

Internally Limited
180
45

°CIW

PD
8JA
8JC

Internally Limited
65
5.0

°CIW

Tested Operating Junction Temperature Range

TJ

-40 to +125

°C

Tstg

-65 to +150

°C

Storage Temperature Range

..
I

°CIW
°CIW
W
°CIW
W
°CIW

ELECTRICAL CHARACTERICISTICS (Vin = 14 V, 10 = lOrnA, Co = 100 I!F, CO(ESR) = 0.3 n. TJ = 25°C,
Note 1, unless otherwise noted.)

Characteristics

FIXED OUTPUT
Output Voltage
Yin = 14 V, 10 = 10 rnA, TJ = 25°C
Yin = 6.0 V to 26 V, 10" 100 rnA, TJ = -40° to 125°C

V

Vo
4.81
4.75

Line Regulation
Yin = 9.0 V to 16 V
Yin = 6.0 V to 26 V

Regline

Load Regulation (10 = 5.0 mA to 100 rnA)

Regload

Output Impedance
10 = 10 rnA, .1.10 = 1.0 rnA, f= 100 Hz to 10 kHz

Zo

Bias Current
Yin = 14 V, 10 = 100 rnA, TJ = 25°C
Yin = 6.0 V to 26 V, 10 = 10 rnA, TJ = -40° to 125°C

IB

Output Noise Voltage (f = 10Hz to 100 kHz)
Long-Term Stability

-

5.0

-

5.19
5.25

4.75
4.50

5.0

-

5.25
5.50

2.0
4.0

10
30

mV

-

2.0
4.0

10
30

-

14

50

-

14

-

200

-

-

200

-

5.8
0.4

30
1.0

-

5.8
0.4

30
1.0

Vn

-

700

-

-

700

-

S

-

20

-

-

20

-

-

50

,
,

mV
mQ

rnA

I!Vrms

mVI
kHR

Ripple Rejection (f = 120 Hz)

RR

Dropout Voltage
10= lOrnA
10= 100 rnA

60

90

-

VI-VO

Over-Voltage Shutdown Threshold
Output Voltage with Reverse Polarity Input (Vin = -15 V)

-

0.015
0.16

0.2
0.6

Vth(OV)

26

29.5

40

-yo

-D.3

0

-

60

-

90

-

V

-

0.015
0.16

0.2
0.6

26

29.5

40

V

-D.3

0

-

V

NOTES: 1. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
2. The reference voltage on the adjustable device is measured from the output to the adjust pin across Rl.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-89

dB

LM2931 Series
ELECTRICAL CHARACTERICISTICS (Vin = 14 V, Vo = 3.0 V,IO = 10 rnA, Rl = 27 k, Co = 100 IlF, CO(ESR) = 0.3 n, TJ = 25°C,
Note I, unless otherwise noted.)

Characteristics
ADJUSTABLE OUTPUT
,Reference Voltage (Note 2, Figure 18)
10 = 10 rnA, TJ = 25°C
10 s: 100 rnA, TJ = -40 to 125°C

V

Vref

Output Voltage Range

VOrange

1.14
1.08

1.20

3.0

2.71029.5

24

V

0.2

1.5

mVN

-

1.26
1.32

Line Regulation (Vin = Vo + 0.6 V to 26 V)

Regline

Load Regulation (10 = 5.0 rnA to 100 rnA)

Regload

-

0.3

1.0

%N

Output Impedance
10= 10 rnA, ~IO = 1.0 rnA, f = 10 Hz to 10 kHz

Zo

-

40

-

mDN

Bias Current
10=100mA
10=10mA
Output Inhibited (Vth(OI) = 2.5 V)

IB

-

6.0
0.4
0.2

-

0.2
140

S

-

RR

0.10

-

IlVrmslV

0.4
0.003

-

%N

-

0.015
0.16

0.2
0.6

Vth(OV)

26

29.5

40

V

-yo

-0.3

0

-

V

-

2.15

IAdj

Output Noise Voltage (f = 10Hz to 100 kHz)

Vn

Long·Term Stability

Dropout Voltage
10=10mA
10=100mA

1.0
1.0

-

Adjustment Pin Current

Ripple Rejection (f = 120 Hz)

rnA

IlA

V

VI-VO

Over-Voltage Shutdown Threshold
Output Voltage with Reverse Polarity Input (Vin = -15 V)
Output Inhibit Threshold Voltages
Output "On," TJ = 25°C
TJ = -40° to 125°C
Output "Off," TJ = 25°C
TJ = -40° to 125°C

Vth(OI)

%JkHR

2.50
3.25

V

2.26

-

1.90
1.20

-

-

30
Output Inhibit Threshold Current (Vth(OI) = 2.5 V)
50
Ith(OI)
NOTES: 1. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
2. The reference voltage on the adjustable device is measured from the output to the adjust pin across Rl.

IlA

DEFINITIONS
Dropout Voltage - The input/output voltage differential at
which the regulator output no longer maintains regulation
againstfurther reductions in input voltage. Measured when the
output decreases 100 mV from nominal value at 14 V input,
dropout voltage is affected by junction temperature and load
current.
Line Regulation - The change in output voltage for a
change in the input voltage. The measurement is made under
conditions of low dissipation or by using pulse techniques
such thElt the average chip temperature is not significantly
affected.
Load Regulation - The change in output voltage for a
change in load current at constant chip temperature.

Maximum Power Dissipation - The maximum total
device dissipation for which the regulator will operate within
specifications.
Bias Current - That part of the input current that is not
delivered to the load.
Output Noise Voltage - The rms AC voltage at the output,
with constant load and no input ripple, measured over a
specified frequency range.
Long-Term Stability - Output voltage stability under
accelerated life test conditions with the maximum rated
voltage listed in the devices electrical characteristics and
maximum power dissipation.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-90

LM2931 Series
Figure 2. Dropout Voltage versus
Junction Temperature

Figure 1. Dropout Voltage versus
Output Current
300

200

;;-

;;-

~

160 f---

C!l

r---

~

~

5
is
cr:

Vin = 14 V
L'>Vout = 100 mV
TJ = 25°C

V

120

13

0

>
>-

I

/'

Vin = 14 V
L'>Vout = 100 mV

...---

200

=>

0

a.

~100mA
~

cr:

/

C>

/

40

o

o

20

40

100

0

>I

./

c

10 = 50 mA...............

-r

c

>

60

80

10 10mA

o

o

100

25

10. OUTPUT CURRENT (mA)

6.0

TJ

--

-

-40°C

.... --:: ~

m
250
cr:

f~

cr:
=>

()

f/ "

5a.

§ 150
o
50

o

5.0

10

75

100

I

Vout = 5.0 V
5.0 t-- TA = 25°C
~

/

w

TJ - 25°C

.JI

'-" 4.0

13

TJ = 85°C

.4

0

>

>=>
a.
>=>

0

. I

A
A I"

3.0

r

2.0

0

Dashed lines below Vin = 5.0 V
are for Adjustable output
devices only.
I
I
I
15
20
25
30

>

10= 100 mA

RL = 500 /

1.0

o

o

I
I
1.0

I

I

)(
2.0

3.0

4.0

Figure 5. Output Voltage versus
Input Voltage

Figure 6. Load Dump Characteristics

6.0
5.0

I

w



>

~ 3.0

g:
=>
0.

2.0

Vout=5.0V _
RL = 5000
TA = 25°C
-

o

>

1.0

o
-20

-10

10
20
30
Vin. INPUT VOLTAGE M

5.0

Vin.INPUTVOLTAGE M

Vin. INPUT VOLTAGE M

~

125

Figure 4. Output Voltage versus
Input Voltage

350

1
>-

50

TJ. JUNCTION TEMPERATURE (0G)

Figure 3. Peak Output Current versus
Input Voltage

40

50

60

t. TIME (50ms/DIV)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-91

..
I

0

80

C>

>

/

r--

C!l

/

o

{2I

.s
w

6.0

LM2931 Series

Figure 7. Bias Current versus Input Voltage

Figure 8. Bias Current versus Output Current

12
10

<'
.5.

!z

8.0
Vout=5.0V
TJ = 25°C

8.0

:z
w

a

"

5.0

~

-

5.0

I-

~

III

l

4.0

~

~

u

/

4.0

,/

~
III

.!E

RL = 100Q

2.0

2.0
RL=500Q

o

-20

o

-10

-

_r-"

10
20
30
Vin, INPUT VOLTAGE M

40

o
o

so

50

Figure 9. Bias Current versus Junction Temperature
8.0

_

ls.O
~
a:
g; 4.0

--

/'

./

---

i""'"

20

V
so

40

80

100

10, OUTPUT CURRENT (rnA)

Figure 10. Output Impedance versus Frequency
2.0

I,

Vin = 14 V
Vout=5.0V

I,

/

a:
a:

RL=50 Q

.~

cO

Vin = 14 V
Vout=5.0V
TJ = 25°C

_ Vin=14V
Vout = 5.0 V
Cl. 1.5 - 10=10mA
w
_ 010= 1.0 rnA
Co = 100llF
w 1.2 - TJ=25°C

-

10= 100 rnA

~

a.
;:;!i

u

~ 0.8

~
III

5
o

10=50mA

~2.0

6 0.4
10 =10 mA

o

-55

-25

0
25
50
75
TJ, JUNCTION TEMPERATURE (OC)

100

o

125

-

10

CO(ESR) = 0.3 Q
Tantulum
I
1
100

CO(ES~=0.15Q
Ele ~lytiC

I
I
I

.r

..w

I

1"'1

1.0k
10k
100k
t, FREQUENCY (Hz)

100M

10M

Figure 12. Ripple Rejection versus
Output Current

Figure 11. Ripple Rejection versus Frequency
95

95
iil

.........

:E-

~

\'

Vin = 14 V
r-- Vout = 5.0 V
OVin= 100 mV
r-- RL =500Q
r-- Co = 100 IlF
TJ = 25°C

10

100

1.0 k

~
:z

CO(ESRI = 0.15 Q
Tan ulum

I

I

10 k

100 k

,

1.0M

85

0

\ f I'\.
\Vr ~

COWSR) = 0.3 Q \ /
lectrolytic

55

"""""-

o

~

i3w

Lil
a:
~

a.
a.

a:

......

"-

Vin = 14 V
75 I--- Vout = 5.0 V
t=120Hz
TJ = 25°C

"'"

...........

..........

I---

c:
a:
65

10M

t, FREQUENCY (Hz)

o

20

40
SO
10, OUTPUT CURRENT (mA)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-92

80

--100

LM2931 Series
z

o
~
~
o

Figure 13. Line Regulation

Figure 14. Load Regulation

w

t!l

!:§~

§;~

I-

:::J

E

0

r=~

:::J

o

o
>
<1

100

!z
w
II:
II:

13
~~
I- -

t, TIME (10 J!SIDIV)

0

t, TIME (10 J!SIDlV)

:::J

o

"S
o

>""
Figure 15. Reference Voltage versus
Output Voltage
1.240

!:i
~ 1.200
w

r-

V

./
/'

-

"

~

W

1.180

>
1.160 0

Vin = Vout + 1.0 V
TA = 25°C

r-

II:

II:_

2.6

r- LM2931 C Adjustable
r- 10= lOrnA

10 = 100 rnA
Vin = Vout + 1.0 V
TA= 25°C

w
~ 1.220

w

~

LM29~1 CAdju~table

~

§;

Figure 16. Output Inhibit-Thresholds
versus Output Voltage

3.0

6.0
9.0
12
15
VO, OUTPUT VOLTAGE (V)

18

21

24

3.0

6.0

-- -

L

l-(iutput 'Off'

Output'On'

9.0
12
15
18
VO, OUTPUT VOLTAGE (V)

---=:::
21

24

APPLICATIONS INFORMATION
The LM2931 series regulators are designed with many
protection features making them essentially blow-out proof.
These features include internal current limiting, thermal
shutdown, overvoltage and reverse polarity input protection,
and the capability to withstand temporary power-up with
mirror-image insertion. Typical application circuits forthe fixed
and adjustable output device are shown in Figures 17 and 18.
The input bypass capacitor Cin is recommended if the
regulator is located an appreciable distance (~ 4") from the
supply inputfilter. This will reduce the circuit's sensitivity to the
input line impedance at high frequencies.
This regulator series is not internally compensated and thus
requires an external output capacitor for stability. The
capacitance value required is dependent upon the load
current, output voltage for the adjustable regulator, and the
type of capacitor selected. The least-stable condition is
encountered at maximum load current and minimum output
voltage. Figure 22 shows that for operation in the "Stable"
region, under the conditons specified, the magnitude of the
output capacitor impedance IZo I must not exceed 0.4 Q.

This limit must be observed over the entire operating
temperature range of the regulator circuit.
With economical electrolytic capacitors, cold temperature
operation can pose a serious stability problem. As the
electrolyte freezes, around -30°C, the capacitance will
decrease and the equivalent series resistance (ESR) will
increase drastically, causing the circuit to oscillate. Quality
electrolytic capacitors with extended temperature ranges of
-40° to 85°C and -55° to 105°C are readily available. Solid
tantalum capacitors may be a better choice if small size is a
limit over
requirement, however, the maximum Zo
temperature must be observed.
Note that in the stable re9ion, the output noise voltage is
linearly proportional to IZo I . In effect, Co dictates the high
frequency roll-off point ofthecircuit. Operation in the area titled
"Marginally Stable" will cause the output of the regulator to
exhibit random bursts of oscillation that decay in an
under-damped fashion. Continuous oscillation occurs when
operating in the area titled "Unstable." It is suggested that oven
testing of the entire circuit be performed with maximum load,
minimum input voltage, and minimum ambient temperature.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-93

I I

LM2931 Series
Figure 17. Fixed Output Regulator

"

Figure 18. Adjustable Output Regulator
Input

LM2931·5.0
Fixed
Output

Input
Vin O-_--{>-i

Output
h:>----oVout
C.

O~~ ~:;

5lk!t
2

Output
InhibH
..{")--{)-

Output
LM2931C
Adjustable
Output

I

Vout
RI

-

Adjust

r~

Co

IAdj

IB

~

Gnd

R2

Switch Position I = Output "On," 2 = Output "Off"
Vout = Vrel

Figure 19. 5.0 A Low Differential
Voltage Regulator

~ + ~n

+ IAdj R2

22.5 k

~~

Figure 20. Current Boost Regulator with
Short Circuit Projection

v---.,.-----.D45V-;:.H7'----_ _ _ _ _ _ _-,

Input

Input O-.....-

~6.0V

68
R

.....-"V\,"v--..--,.

R

Output
5.0V@5.0A

1---i:J--It--o
+

+

1

100

100

1

The LM2931 series can be current boosted With a PNP transistor. The
D45VH7, on a heatsink, will provide an output current of 5.0 AwHh an input
to output voltage differential 01 approximately 1.0 V. Resistor Rin conjuction
wHh the VBE 01 the PNP determines when the pass transistor begins
conducting. This circuH is not short circuit proof.

The circuit 01 Rgure 19 can be modHied to provide supply protection
against short circuits by adding the current sense resistor RSC and an
additional PNP transistor. The current sensing PNP must be capable 01
handling the short circuit current 01 the LM2931. Sale operating area of
both transistors must be considered under worst case conditions.

Figure 22. Output Noise Voltage versus
Output Capacitor Impedance

Figure 21. Constant Intensity Lamp Flasher
Input
6.4Vt030V

LM2931C

2.0k

... 100 F.""""~"""""""'-===
:"EE_
Yin = 5.6 V
_
Vout=5.0V
ttl 10 10=100mA
~
Vnrms 10 Hz to 10 Mhz
0>'"'
IZoI@4OkHz
TA=25°C

+

~1.°11111

CM
#345

~

I!:

S

33k
6.2V-n

n

0-1 U

I

0.1

c:

>

0.01

losc = 2.2 Hz

10

100
1.0k
IZoI, MAGNITUDE OF CAPACITOR IMPEDANCE {mOl

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-94

10k

MOTOROLA

LM2935

SEMICONDUCTOR-----TECHNICAL DATA

Advance Information
Low Dropout Dual Regulator

LOW DROPOUT
DUAL REGULATOR

The LM2935 is a dual positive 5.0 V low dropout voltage regulator, designed for
standby power systems. The Main Output is capable of supplying 750 rnA for
microprocessor power, and can be turned on and off by the Switch/Reset input.
The other output is dedicated for standby operation of volatile memory, and is
capable of supplying up to lOrnA loads. The total device features a low quiescent
current of 3.0 rnA or less when supplying 10 rnA from the Standby Output.
This part was designed for harsh automotive environments and is therefore immune to many input supply voltage problems such as reverse battery (-12 V),
double battery (+24 V), and load dump transients (+60 V).
• Two Regulated 5.0 V Outputs
• Main Output Current in Excess of 750 rnA
• On/Off Control of Main Output
• Standby Output Current in Excess of lOrnA
• Low Input-Output Differential of Less Than 0.6 V at 500 rnA
• Short Circuit Current Limiting
• Internal Thermal Shutdown
• Low Voltage Indicator Output
• Designed for Automotive Environment Including
• Reverse Battery Protection
• Double Battery Protection
• Load Dump Protection
• Reverse Transient Protection
• Five Pin TO-220 Package

SILICON MONOLITHIC
INTEGRATED CIRCUIT

TSUFFIX
PLASTIC PACKAGE
CASE 314D
(5 LEAD TO-220 TYPE)

PIN CONNECTIONS

Typical Application Circuit

Vin
51"

~

20d

±

f-o-.......---o 5V/750mA

1

0.1

2
L.M2935

-

Swit~

1

10

Standby

4

/Reset

o

Main
Output

Input

f-o-~i""'--{)~ 5VJ10mA
5
+

'----,-------' I

't

PIN 1.
2.
3.
4.
5.

10

Input
Main Output
Ground
Switch/Reset
Standby output

Heatsink surface connected to Pin 2

"Note: The Main Output is "OFF" with switch 51 open.
An input bypass capacHor is recommended ilthe regulator is located more than 4" from the supply
input filter. The LM2935 is not internally compensated and thus requires an external output
capacHor for stability. A minimum capacitance of 10 !iF is recommended. The actual capacitance
value is dependent upon load current, temperature, and the capacitor's equivalent series
resistance (ESR). The least stable condition is encountered at maximum load current and
minimum ambient temperature.

ORDERING INFORMATION
Device

Operating Junction
Temperature Range

Package

LM2935

-40° to +125°C

Plastic Power

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-95

LM2935
MAXIMUM RATINGS
Rating

Symbol

Value

Unit

VI

60

Vdc

-VI(~)

-50

Vpk

lin

5.0

rnA

PD
8JA
8JC

Internally Limited
62.5
1.9

W
°CIW
°CIW

TJ

-40 to +150

°C

Tstg

-65 to +150

°C

Input Voltage Continuous
Transient Reverse Polarity Input Voltage
1.0% Duty Cycle, ~ s 100 ms
Switch/Reset Input Current
Power Dissipation and Thermal Characteristics
Case 314D (TO-220) T Suffix
Maximum Power Dissipation
Thermal Resistance Junction to Air
Thermal Resistance Junction to Case (Pin 3)
Operating Junction Temperature Range
Storage Temperature Range

ELECTRICAL CHARACTERICISTICS (Vin = 14 V, 10 = 500 rnA, Istby = 0 rnA, Co = 10 I1F, Cstby = 10 I1F, TJ = 25°C,
Note 1, unless otherwise noted.)
Characteristics

Symbol

Min

Typ

Max

Unit

Vo

4.75

5.0

5.25

V

-

4.0
10

25
50

-

10

50

mV

200

-

mO

100

-

mV/kHR

MAIN OUTPUT
Output Voltage
Yin = 6.0 V to 26 V, 10 = 5.0 rnA to 500 rnA, TJ = -40 to 125°C
Line Regulation
Yin = 9.0 Vto 16 V, 10 = 5.0 rnA
Yin = 6.0 V to 26 V, 10 = 5.0 rnA

Regline

Load Regulation (10 = 5.0 rnA to 500 rnA)

Regload

mV

Output Impedance
10 = 500 mAdc and 10 mArms, 1= 100 Hz to 10 kHz

Zo

Output Noise Voltage (I = 10Hz to 100 kHz)

Vn

Long Term Stability

S

-

RR

-

66

-

0.45
0.82

Ripple Rejection (I = 120 Hz)
Dropout Voltage
10=500 rnA
10=750 rnA

20

I1Vrms

Short Circuit Current Limit
Over-Voltage Shutdown Threshold

dB
V

VI-VO
0.6

-

ISC

0.75

1.2

-

A

Vth(OV)

26

31

-

V

-

5.0

-

rnA

4.5

0.9
5.0

1.2
6.0

-

20

30

kO

0

-

V

SWITCH/RESET
Output Sink Current (VOL = 1.2 V)

ISink

Output Voltage (ROn/Off = 20 kO)
Low State, Vin = 4.0 V
High State, Vin = 14 V

VOL
VOH

Output Pull-Up Resistor, On/Off (Note 2)

ROn/Off

Output Voltage with Reverse Polarity Input (Vin = -15 V, RL = 10 0)

-VO

-0.6

V

NOTES: 1. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
2. The maximum switch/reset current must not exceed 5.0 rnA.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-96

LM2935

ELECTRICAL CHARACTERICISTICS (Vin = 14 V, 10 = a mA, Istby = lamA, Co = 10 flF, Cstby = 10 flF, TJ = 25°C,
Note 1, unless otherwise noted.)
Characteristics

STANDBY OUTPUT
Output Voltage
Vin = 6.0 V to 26 V, Istby

= 1.0 mA to

lamA, T J

Tracking Voltage
Line Regulation (Vin

= 6.0 V to 26 V)

Load Regulation (lstby = 1.0 mA to lamA)
Output Impedance
I(stby) = 10 mAdc and 1.0 mArms, 1 = 100 Hz to 10kHz
Output Noise Voltage (I

VO(stby)

4.75

VO-VO(stby)

-200

= lamA)

Short Circuit Current Limit
Output Voltage with Reverse Polarity Input (Vin

V

a

200

mV

-

4.0

50

mV

Regload

-

10

50

mV

ZO(stby)

-

1.0

-

Vn

-

300

-

flVrms

S

-

20

-

mV/kHR

RR

-

66

-

dB

VI-VO(stby)

-

0.55

= 10Hz to 100 kHz)

= 120 Hz)

Dropout Voltage (lstby

5.25

Regline

Long Term Stability
Ripple Rejection (I

5.0

= -40 to 125°C

= -15 V,

RL

= 510 0)

Output Voltage with Maximum Positive Input
Vin = 60 V, RL = 510 0

0

0.7

V

.ISC

25

70

-

-VO

-0.3

a

-

V
V

VO(max)

-

5.0

6.0

-

3.0
40
90
2.0

-

mA

TOTAL DEVICE
Bias Current
10 = 10 mA, Istby = a mA
10 = 500 mA, Istby = 0 mA
10 = 750 mA, Istby = a mA
Main Output "Off", Istby = 10 mA

mA

IB

-

100

3.0

NOTES: 1. Low duty cycle pulse techniques are used dUring test to maintain lunctlOn temperature as close to ambient as possible.

TYPICAL CIRCUIT WAVEFORMS
60V

Sl, Onl Off Swilch

26V
14V

14V

Vin, Input Voltage
(Pin 1)

3.0V
Open

Open
5.0V

5.0V

VO, Main Output
Voltage (Pin 2)

Reset (Pin 4)
Vstby, Standby
Voltage (Pin 5)

5.0V
Main
Output
Turn-on

Low Input
Voltage
Load
Dump

Input
Voltage
Une Noise

Main
Output
Short
Circuit

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-97

Main
Output
Turn-Off
Thermal
Shutdown

LP2950
LP2951

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Product Preview

Micropower Voltage Regulators
Ihe LP2950 and LP2951 are micropower voltage regulators that are
specifically designed to maintain proper regulation with an extremely low
input-to-output voltage differential. These devices feature a very low quiescent
bias current of 75 itA and are capable of supplying output currents in excess of
100 mAo Internal current and thermal limiting protection is provided.
The LP2951 has three additional features. The first is the Error Output that can
be used to signal external circuitry of an out of regulation condition, or as a
microprocessor power-on reset. The second feature allows the output voltage to
be preset to 5.0 V or programmed from 1.23 V to 29 V. It consists of a pinned-out
resistor divider along with direct access to the Error Amplifier feedback input. The
third feature is a Shutdown input that allows a logic level signal to turn-off or
turn-on the regulator output.
Due to the low input-to-output voltage differential and bias current
specifications, these devices are ideally suited for battery powered computers,
consumer and industrial equipment where an extension of useful battery life is
desirable. The "A" suffix devices feature an initial output voltage tolerance ± 0.5%.
• Low Quiescent Bias Current of 75 itA
• Low Input-to-Output Voltage Differential: 50 mV @ 100 ItA,
380 mV@ 100 mA
• 5.0 V ± 0.5% Allows Use as a Regulator or Reference
• Extremely Tight Line and Load Regulation
• Require~ Only a 1.0 ItF Output Capacitor for Stability
• Internal Current and Thermal Limiting
LP2951 Additional Features:
• Error Output Signals an Out of Regulation Condition
• Output Programmable from 1.23 V to 29 V
• Logic Level Shutdown Input

LOW DROPOUT
MICROPOWER VOLTAGE
REGULATORS
SILICON MONOLITHIC
INTEGRATED CIRCUIT

ZSUFFIX

PLASTIC PACKAGE
CASE 29
(T0-92)

Pin 1. Output
2. Ground
3. Input

"3

DSUFFIX

PLASTIC PACKAGE
CASE 751

(50-8)

NSUFFIX

PLASTIC PACKAGE
CASE 626

Simplified Block Diagrams

r--------,

Input I

+

Battery or ~ 31
Unregulated DC ~
I

LP2950

I Output

r ¥

182k

11

~ I

~IError

d:: 1 OIlF

5.0V/t OOmA

_
II Amplifier
+ 60k I
1.23V~
':' I
I
.!!!l~e.!!!:e___ ...J

L::fL
Batteryor:;k!
Unregulated DC ~

~n~t
I

I
I
I
Shutdown_I
From

Output u 8 Input
Sense 2
7 Feedback
Shutdown 3

.

Giid~

PIN CONNECTIONS

X·

r-:-_-=-~--:-_~---.--o5.0V/
8___~~ 1_~~~~ 1.0IlF.;!;
100mA

~

182k

l LP2951
'"

I

~rprl~e~~~
I r-

3 1 60k 50kk ~

I

CMOSmL I

':'

60k

75mV/

+

Error....
Detection

5 Error Output
(Top View)

I 5.0V Tap -

~.
~ir I

ORDERING INFORMATION
330k

I Feedback
I

Device

60mV
I5
'--I~
To
.+ I JT>-t6---+-o

1.23V ~

6 5.0 V Tap

Gnd 4

I

L_::fL~~!:!!.~~~p~a~ _J

Error
Output

CMOS{TLL

Giid.i4

LP2950ACZ - 5.0
LP2950CZ - 5.0
LP2951 ACD - 5.0/ADJ
- 40° to +125°C
LP2951 CD - 5.0/ADJ
LP2951 ACN - 5.0/ADJ
LP2951 CN - 5.0/ADJ

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-98

Temperature
Range

Package
TO-92
TO-92

50-8
50-8
Plastic
Plastic

MC1468
MC1568

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Dual +15 Volt Tracking Regulator

DUAL ±15 VOLT
TRACKING REGULATOR

The MC1468/1568 is a dual polarity trac~ing regulator designed to provide
balanced positive and negative output voltages at currents to 100 mAo Internally,
the device is set for ±15 V outputs but an external adjustment can be used to
change both outputs simultaneously from 8.0 V to 20 V. Input voltages up to ±30 V
can be used and there is provision for adjustable current limiting.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

• Intern'ally Set to ±15 V Tracking Outputs
• Output Currents to 100 mA
• Outputs Balanced to within 1.0% (MC1568)

dI!IIIfI1

• Line and Load Regulation of 0.06%

1:~U

• 1.0% Max Output Variation Due to Temperature Changes
• Standby Current Drain of 3.0 mA
• Externally Adjustable Current Limit

LSUFFIX
CERAMIC PACKAGE
CASE 632

• Remote Sensing Provisions

ORDERING INFORMATION
Device

Temperature Range

Package

MC1468L

0° to + 70°C

Ceramic DIP

NlC1568L

-55° to + 125°C

Ceramic DIP

Circuit Schematic

Vcc
7

5
. - - - - - - - - - - - - { ) VO+

-;=::t-.l-l==::::--;::;::=;------r"?4 Sense (+)

4,Ok

Compen
(+)

2 Balance
Adjust

o-l-----f--+----,

}---+-{)

4.0k

11
r"f','\r-41-()

Sense (-)

t------1'-{)

Vo -

10

Voltage
Adjust 14

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-99

..

MC1468, MC1568
MAXIMUM RATINGS (TC = +25°C, unless otherwise noted,)
Symbol

Rating
Input Voltage
Peak Load Current
Power Dissipation and Thermal Characteristics
TA = + 25°C
Derate above TA = + 25°C
Thermal Resistance, Junction to Air
TC=+25°C
Derate above T C = + 25°C
Thermal Resistance, Junction to Case
Storage Junction to Temperature Range
Minimum Short Circuit Resistance
Ambient Temperature
MC1468
MC1568

Value

Unit

VCC,IVEEI

30

Vdc

Ipk

100

mA

Po
1/8JA
8JA
Po
1/8JC
8JC

1.25
10
100
2.5
20
50

W
mW/oC
°C/W
W
mW/oC
°C/W

TJ, Tstg

-65 to +150

°C

RSC(min)

4.0

Q

°c

TA

o

to +70
-55 to + 125

ELECTRICAL CHARACTERICISTICS(VCC = +20 V, VEE = -20 V, C1 = C2 = 1500 pF, C3 = C4 = 1.0 !,F, RSC+ = RSC- = 4.0

Q,

IL + = IL- = 0, TC = +25°C, unless otherwise noted, see Figure 1.)
MC156B

MC146B

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

Output Voltage

Vo

±14.5

±15

±15.5

±14.5

±15

±15.5

Vdc

Input Voltage

VI

±30

Vdc

Characteristics

Input-Output Voltage Differential

lVI-Vol

Output Voltage Balance (L package only)

VBal

Line Regulation Voltage
(Vin = 18 V to 30 V)
Tlow to Thigh (Note 1)

Regline

Load Regulation Voltage
(lL = 0 mA to 50 mA, T J = constant)
(TA = Tlow to Thigh)

Re9l0ad

-

-

2.0

-

-

±50

±30

-

-

-

2.0

-

-

±150

-

-

-

-

10
20

-

-

10
30

-

±20

±50

±300

Vdc
mV
mV

-

-

-

-

10
20

-

-

10
30

-

±20

mV

Vdc

Output Voltage Range
L Package (See Figure 4)

VOR

Ripple Rejection (I = 120 Hz)

RR

-

75

-

-

75

-

dB

ITSvol

-

0.3

1.0

-

0.3

1.0

%

Short Circuit Current Limit
(RSC = 10 Q)

ISC

-

60

-

-

60

-

mA

Output Noise Voltage
(BW = 100 Hz-10 kHz)

Vn

-

100

-

-

100

-

!,V(RMS)

Positive Standby Current
(Vin = +30 V)

IB+

-

2.4

4.0

-

2.4

4.0

mA

Negative Standby Current
(Vin =-30 V)

IB-

-

1.0

3.0

-

1.0

3.0

mA

I1VO/l1t

-

0.2

-

-

0.2

-

±B.O

Output Voltage Temperature Stability

±B.O

(Tlow to Thigh)

Long-Term Stability
NOTES: 1. TLow to THigh

0° to +70°C lor MC1468
-55° to + 125°C lor MC1568

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-100

%/k Hr.

MC1468, MC1568
APPLICATIONS INFORMATION
Compensation capacitors C1 and C2 must be located as
close to the device as possible to prevent instablity due to
noise pickup. Input bypass capacitors Cin are required if the
device is located more than four inches from the power source
filter capacitor. Output capacitor C4 is required for stability of
the negative regulator. Capacitor C3 is used to improve the
positive regulator load transient response. Low impedance
quality capacitors are required when operating the MC1568 at
its temperature extremes. Extended range ceramic, tantalum,
and electrolytic capacitors are readily available from several
manufacturers.
Capacitor values should be determined on a system by
system basis. Input lead length, output load, temperature
range, and printed circuit board layout are factors that will
influence circuit performance. Typical values for capacitors
Cin, C3, and C4 are 0.1 ~F to 10 ~F'while C1 and C2 are
1500 pF.

The presence of BalAdj, pin 2, on devices housed in the dual
in-line package (L suffix) allows the user to adjust the output
voltages down to ±B.O V. The required value of resistor R2 can
be calculated from
R1 Rint ( + Vz)
R2=~~~~~~-=
RindVO Vz) -  R1

<1>-

where: Rint

An Internal Resistor = R1 = 1.0 kn
0.68 V
6.6 V

 =

Vz =

Some common design values are listed below:
±Vo(V)

R2

TCVO(%/DC)

IS + (mA)

14
12
10
8.0

1.2 k
1.8 k
3.5 k

0.003
0.022
0.025
0.028

10
7.2
5.0
2.6

00

Figure 1. Basic 50 rnA Regulator

Figure 2. Voltage Adjust and
Balance Adjust Circuit
(14.5 V ~ Vout ~ 20 V)

4.7

+VO
Input (+)
+20V

7

39k

din
C.

-20V ~
Input (-)

Input (+)

I--C>---+-+.... GND

7

Gin

GND

8
10

Input (-)

1500pF
100k
10

RSC+

-yo

RSC-

Figure 3. ±1.5 A Regulator
(Short Circuit Protected, with Proper Heatsinking)

Balance adjust available in MC1568L, MC1468L ceramic dual·in·line
package only.

+VO

Figure 4. Output Voltage Adjustment for
B.O V ~ I±Vol ~ 14.5 V
(Ceramic·Packaged Devices Only)

~--...--v.A..--.r----r"" +15Vdc

0.330
2.0W

RSC+
c-----~>--~~~+VO

R1
1k

Input (+)

I _ 0.6V
SC- RSC

Cin

VEE
5

2
6

R3
15k
R2

+

7

Cin
Input (-)

RSC2N3055
OR Equiv

0.330
2.0W

-yo -

15Vdc

8
10

11

R4
15k

1.0~F

~Arl~---------~~-VO

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-101

MC1468, MC1568
Figure 5. Load Regulation

Figure 6. Regulator Dropout Voltage
w

4.0

(!)

1:5

s-

.§.
Z

f-

1.0

a.
f-

~ 2.0
[jj
w

(!)

4.0

>

5.0

0

f-

:::J

3.0

1:5
f-

~

0

,.,.

...J

:::J

==>

a. f2.0
~ z
w
::;; a:
:::J w
::;; u..
u..
Z i5 1.0

RSC= 4.00
TJ =TA

:::J

a.

3.0

:::J

0

c

~

6.0

:::J

0

7.0

20

0

40

60

80

100

IL, LOAD CURRENT (mA)

200

.§.

a:

\

Vin - Vout = 3.0 V
VCC= IVEEI

1\

160

Negative Rgulator

>I

o
o

<=
~

\

c 120

9
...J

~ 80

r-

1 - No Heatsink
2 - Infinite Heatsink

~

o

-55



60

:::J

C>

a:

80

MC1468

r---

"+
::,

MC1568
25

50

75

100

40

o

125

o

C3

a:

40

0

30

en

20

:J:

C>

o
o

4.0

4.0

6.0

8.0

10

12

14

16

IVin-Voutl, INPUT-OUTPUT VOLTAGE DIFFERENTIAL M

Figure 10. Current-Limiting Characteristics



Figure 9. ISC versus RSC
100

60

1\

fZ

TA, AMBIENT TEMPERATURE (OC)

!::

40

IL, LOAD CURRENT (mA)

\

\

-

40

zw

20

:::J

C>

.§.

~

-.:::::

Figure 8. Maximum Current Capability

:::J



0



w

a:
a:

:::J

--

8.0
12
16
20
24
RSC, SHORT CIRCUIT RESISTOR (0)

60

C>

(!)

z

-

-

t---

40

28

-55

-25

0
25
50
75
TJ, JUNCTION TEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-102

I---

20

o

32

.~

RSC-200

E
::;;

:::;

RSC = 100

100

125

MC1468, MC1568
Figure 11. Standby Current Drain
5.0

Figure 12. Standby Current Drain
10

I

9.0

VCC = IVEEI

1 8.0

<"
.§.. 4.0

!z

I-

:z
w

a:
a:

::::J
<.J
I::::J
D..

3.0

Positive Standby Current

-55'C

.AI
2.0

rD
_

Negative
1,//
Standby Current

16

18

20

22

24

26

28

30

4.0

--

-·3.0

-55'C
+25'C
+125'(

1.0

o

~

:z

'" 2.0

-

1.0

l---r

.--l-1'

i-""'"

1

15

Figure 13. Temperature Coefficient of
Output Voltage

16

~

Ii: 0.03

:;:
rn 0.02

~

0

20

II.!.

~

w

19

Figure 14. Load Transient Response

~ 0.04

0.01

.1

17
18
iVO. OUTPUT VOLTAGE (iV)

VCC = VEE = 30V
RSC=4Q

0.05

i

1

I.

Negative Standby Current

o

32

+Vin. INPUT VOLTAGE (+V)

0.06

-- --

Positive Standby Current

a 5.0

+25'C
+125'(

W

~

7.0

~ 6.0

IV

...-

~ I--

--- -

Posttive Re ulator

all= 0-10 rnA
RSC=10Q

-

~~

~

i:-- Thermal Shift =
I
15

1

16

Negativ~e

% Change in VQ
Change in Junction Regulator

-

1

17
18
iVO. OUTPUT VOLTAGE (iV)

19

20

TIME. 20 IJ.SiDIV

Figure 15. Line Transient Response

r--

1

J

1

T

Figure 16. Ripple Rejection

o

.1

aVCC=+20VtD+23V
I I

I I

r

ulator

Ne~ative

i'D -10

i"
-20 ro

Positive Regulator

RSC=10Q
Il= lOrnA

Regulator

V

~ -30

aVin = +120Vt~ + 23
RSC=10Q
I
I
I
I

J

aVEE = -20 Vto -23 V ' /

/'

ffi -40
~ -50
~ -60

Negtive Regulator I - -

V

/

~ -70

~

I II
I V

-100

TIME. 50 IJ.SJDIV

./

-80

~ -90

/

r-100

~i"'"
1.0k

10k
f. INPUT FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3·103

--

Posttive
Regulator

lOOk

1.0M

MC1468, MC1568
Figure 17. Output Impedance
10
RSC - 4.0Q
IL -10 rnA

c.
w

!i

1.0

(§
w

a.

:;;
~

~ 0.1
::::>

a

----

Negative Regulator
Positive Regulator

'111111 I I I I 111111 I I I I II r

0.01
100

1.0k

10k
lOOk
f, TEST FREQUENCY (Hz)

loOM

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-104

MC1723
MC1723C

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Voltage Regulator

..

VOLTAGE REGULATOR

The MC1723 is a positive or negative voltage regulator designed to deliver load
current to 150 mAdc. Output current capability can be increased to several
amperes through use of one or more external pass transistors. MC1723 is
specified for operation over the military temperature range (-55° to + 125°C) and
the MC1723C over the commercial temperature range (0 0 to +70°C)
• Output Voltage Adjustable from 2.0 Vdc to 37 Vdc
• Output Current to 150 mAdc Without External Pass Transistors
• 0.01 % Line and 0.03% Load Regulation
• Adjustable Short Circuit Protection

Vee

...

,

PSUFFIX
PLASTIC PACKAGE
CASE 646

LSUFFIX
CERAMIC PACKAGE
CASE 632

Figure 1. Circuit Schematic

.-~----~-4~~--~---4~----._--~1=_2

SILICON MONOLITHIC
INTEGRATED CIRCUIT

Ve
11

D SUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)
6.2V

ORDERING INFORMATION
Device

Alternate

Temperature
Range

Package
SO-14

MC1723CD

' - - - - - - 0 Current
3 Sense
Inverting
Input

MC1723CL

LM723CJ
~723DC

MC1723CP

Ceramic

DIP

O'to +70'C

Plastic
DIP

LM723CN
~723PC

MC1723L

Ceramic
DIP

-55' to + 125'C

Figure 2. Typical Circuit Connection
(7 -'\NI--'~ Vo

} , -......fVI.,._...

Rl

R3

Vo = +15Vdc
IL = 2Adc max

Vin = 20Vdc _4t--e--o--I

100pF
Ierel

Vo '" 7

12k

R2

10k

0.66
( Rl + R2) I _ Vsense
~
seRse = Rse atTJ=+25 oe

For best results 10 k < R2 < 100 k
For minimum drift R3 = Rl II R2

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-105

MC1723, MC1723C
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Symbol

Value

Unit

VI(p)

50

Vpk

VI

40

Vdc

VI-VO

40

Vdc

IL

150

mAdc

Iref

15

mAdc

Iz

25

mA

Volatge Between Noninverting Input and VEE

Vie

8.0

Vdc

Differential Input Voltage

Vid

±5.0

Vdc

PD
1/9JA
9JA
PD
1/9JA
9JA

1.25
10
100
1.5
10
100

TJ, Tstg

-£5 to +175

Rating
Pulse Voltage from VCC to VEE (50 ms)
Continuous Voltage from VCC to VEE
Input·Output Voltage Differential
Maximum Output Current
Current from Vref
Current from Vz

Power Dissipation and Thermal Characteristics
Plastic Package
TA = +25°C
Derate above TA = +25°C
Thermal Resistance, Junction to Air
Ceramic Package
Derate above TA = +25°C
Thermal Resistance, Junction to Air
Operating and Storage Junction Temperature Range
Plastic Package
Ceramic Package
Operating Ambient Temperature Range
MC1723C
MC1723

W

mW/oC
°C/W
W

mW/oC
°C/W
°C

,
TA

°C

oto +70
-55 to +125

ELECTRICAL CHARACTERICISTICS (TA = +25°C, Vin 12 Vdc, Vo = 5.0 Vdc, IL = 1.0 mAdc, RSC = 0, C1 = 100 pF, Cref = 0 and
divider impedance as seen by the error amplifier s; 10 kQ connected as shown in Figure 2,
unless otherwise noted.)
MC1723
Characteristics

Symbol

Min

Input Voltage Range

VI

9.5

Output Voltage Range

Vo

2.0

Input·Output Voltage Differential
Reference Voltage

liB

Average Temperatue Coefficient of Output
Voltage (Tlow A < TA < Thigh A)

TCVO

Line Regulation

Regline

12 V < Vin < 15 V
(TA = 25°C)
12 V < Vin < 40 V
(Tlow A < TA < Thigh A)
12 V < Vin < 15 V
{

Regload

Ripple Rejection (f = 50 Hz to 10kHz)
Cret= 0
Cref = 5.0 IlF

RR

Short Circuit Current Limit (RSC = 10 n, Vo = 0)

ISC

NOTES:

ATlow

0° for MC1723C
-55° for MC1723

37

2.0
3.0

-

2.3

3.5

-

20
2.5

-

-

0.002

-

0.01
0.02

Typ

-

Max

Unit

40

Vdc

37

Vdc

38

Vdc

7.15

7.50

Vdc

-

2.3

4.0

mAdc

-

20
2.5

-

0.015

-

0.003

0.015

0.1
0.2

-

0.01
0.1

0.1
0.5

0.3

-

-

0.3

0.15
0.6

-

IlV(RMS)

%/OC
%VO

-

%VO

-

0.03

-

A Thigh

-

-

0.2
0.6

-

74
86

-

-

74
86

65

-

-

65

-

mAdc

0.1

-

%/1000 Hr.

0.1
=
=

-

+70°C for MC1723C
+125°C tor MC1723

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-106

0.03

dB

-

AVO/At

Long Term Stability

9.5

6.80

-

Load Regulation (1.0 mA < IL < 50 mAl
TA = 25°C
Tlow A < TA < Thigh A

40

38

6.95

Vn

Min

7.35

3.0

Vref

Output Noise Voltage (f = 100 Hz to 10kHz)
Cref= 0
Cref = 5.0 IlF

-

MC1723C
Max

7.15

VI-VO

Standby Current Drain ( IL = 0, Vin = 30 V)

Typ

MC1723, MC1723C
Figure 4. Maximum Load Current as a Function
of Input-Output Voltage Differential
200

<'
.§.

....
z

a:
a:

::::>
0

rT""l

-g:

~

\ \",-TA = + 25°C
80

.§.
....I

~~

\ \

120

c

9

0.05

TJmax = 150°C
RTH = 150°C/W
PSTANDBY 60 mW
(No heat sink)

160

w

Figure 5. Load Regulation Characteristics
Without Current Limiting

40

t--.. TA=+25°C
r-...:: ................... r--. r----.... t:-:--

-

i'-

"\.1""'-

r-........
~A=+7fc' r--..::::- t---

o TA-+12~

o

10

20

~ -0.1

~=~25°C

30

-0.15

40

~
o

20

40

~

~

z

~

~

r:::::: I::-

;:::;

~ -0.05

r- l"- t--

.!.

~

-,-

-0. 1

RSC=10Q

~ -0.15
g>

lS:'= ~

" \.""'"

C!l

TA = + 25°C

w

a:
c -0.2
«:

TA=+~
'j
I
I

9

~

-0.1

::::>

-- r- :--N-

fB

0

0

TA = -55°C

r- ~ r- t-.

a:

9

'C

'"

.2

-0.3

'"
a:
o

5.0

10

15

20

30

o

20

10, OUTPUT CURRENT (rnA)

0.8

_II

~
w

RSC=10Q -

0.8

....
::::>
a.
....
::::>
0

w
2:

:5w
a:

0.7

~
en

0.4

!::
::;;
:::;

TA = +125°C

!z
~

TA=+25°C
0.2

0.6 r----

0.5

a:

::::>

o

TA =-55°C
20

40

60

80

100

10, OUTPUT CURRENT (rnA)

,

........... -.

>
w

0.6

o
o

r---...

C!l

13
o

C!l

§?

r-.,.

'"f\."

TA = -55°C

1\

.1
.1

~
~

!'I..

40
60
Io. OUTPUT CURRENT (rnA)

80

Figure 9. Current Limiting Characteristics
as a Function of Junction Temperature

Figure 8. Current Limiting Characteristics
1.2

~

, IA=+25~

TA = ~ 125°C
-0.4

25

\

I-- RSC = 10Q
j
.1

CD

a:

!:§

100

0.1

~

1.0

80

Figure 7. Load Regulation Characteristics
With Current Limiting

0.05

~
w

60

10, OUTPUT CURRENT (rnA)

Figure 6. Load Regulation Characteristics
With Current Limiting

-0.2

I--- to-. TA=.:wG-I'-.
.~

g>
a:

Vin-Vout' INPUT-OUTPUT VOLTAGE M

~

..........

200

1

.I.

~enseV01tage

UmitCurrent~

- ---

-50

o

50

"""""l1lI

a:
120 a:

a

~

'I"--..
~

3-107

r-. 80
~

r-- t--

100

TJ, JUNCTION TEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

1
!z
w

Umit Current RSC = 10 Q
0.4

160

40
150

C!l

z

E
§!!j

MC1723, MC1723C
Figure 10. Line Regulation as a Function
of Input-Output Voltage Differential
0.2

Figure 11. Load Regulation as a Function
of Input-Output Voltage Differential
0.1

I

AVin=+3V

~

ez

ez
0

S
=>

o

w
a:
w

z

-

S

0.1

C!l

::J

II
II
IL = 1.0to IL = 50 rnA

~

0

..'""

--

- r-

-

0

=>

-

fil
a:
~

9

..........

-0.1

~

........

.......

a:

-0.2

-0.1
5.0

15

35

25

o

10
20
30
40
Vin-Vout. INPUT-OUTPUT VOLTAGE M

Vin-Vout. INPUT-OUTPUT VOLTAGE M

Figure 12. Standby Current Drain as a
Function of Input Voltage
4.0
_

<-

§.
IZ
W

a:
a:

=>

4.0

0

z

is

~

1.0

o

Input Voltage

--

~
2.0

U)

---

I
TA= +25°C

~

J

w

0

~
13

~

!3

20

-8.0
-5.0

10

30

20

40

Figure 15. Output Impedance as
Function of Frequency
10

Load Current

\

f=

\ I

Output Voltage

\ I
~

CI=O

JA1l

w

CI= 1.01lF

§@ 1.0
C§

W

"~

z

IL=50rnA

w

0

~
:;;

./

I--

c::.

o <§.

~

45

10

IL= 40 rnA

1\

V

0

0

Figure 14. Load Transient Response

/'\

~
o

-2.0
-5.0

40

30

t. TIME (~s)

\
-4.0

'-

~

o

C!l

~

Output Voltage

'"-

TA = +125°C

V
2.0

\
,,- r....

Vin.INPUTVOLTAGE M

I

~

I

TA = -55°C
~

I"'"

10

:iz

Figure 13. Line Transient Response

I,

VO=Vref
IL = 0

3.0

~
e

50

e

l-

~

=>

~

1/

0.1

0

0

N

0.01
10

20
t. TIME (~s)

30

40

100

45

1.0k

10k
f. FREQUENCY (Hz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-108

lOOk

1M

MC1723, MC1723C
Figure 16. Typical Connection for 2 < Vo < 7
12

Figure 17. Foldback Connection
10

12
+Vin ...-o---1

10

11

R1

Cre!

R1

M1723
(MC1723C)

R3

10k

100pF

1

R2

7

vw~

LLi

0.66
I _ Vsense
SC - RSC '" RSC atTJ = + 25°C

ISC

For best results 10k < R1 +R2 < 100 k
For minimum drift R3 = R1 R2

R2

3
7

R
a 10kn where
A= 1-a

Iknee

a= Vsense
Vo

[Iknee -1J
ISC

ILR _ Vsense
SC - (1-a) ISC

Figure 18. +5.0 V, 1.0 A SWitching Regulator

Figure 19. +5.0 V, 1.0 A High Efficiency Regulator
Vin1
+6.5V-.....- - - - - - - - - - I .

T

Vin2 -=
+10V

11
12
Vin .....----+--0-1
+10V
6

2.2k

10

'OO~I

r

1000pF

Figure 21. -15 V Negative Regulator

0.33

Vin

13

5.1k

7

Figure 20. +15 V, 1.0 A Regulator with Remote Sense

+20V

2
M1723
(MC1723C)

+

1.0k
5.1k

10

2.0k

1.0M

+5.0V

12

+5V

M1723
(MC1723C)

0.33

°.1!1 F

Vout

10

Vout

10

12

12

e'-1f-..---o-l

4

12k

M1723
(MC1723C)

12k

+ Sense Vout
+15V

10k

Load
- Sense

Vin = -20 V

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-109

Vout=-15V
2N3055
or Equiv

MC1723, MC1723C
Figure 22. +12V, 1.0 A Regulator
(Using PNP Current Boost)
2N3791
or Equiv

Vin
+18V

0.33

Voul = +12 V

11
10

100
12
6

2
MC1723
(MCI723C)

3
4

10k
100pF

13

5

12k

7

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-110

MC3423
MC3523

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Overvoltage Crowbar Sensing
Circuit

OVERVOLTAGE
SENSING CIRCUIT

These overvoltage protection circuits (OVP) protect sensitive electronic
circuitry from overvoltage transients or regulator failures when used in
conjunction with an external "crowbar" SCA. They sense the overvoltage
condition and quickly "crowbar" or short circuit the supply, forcing the supply into
current limiting or opening the fuse or circuit breaker.
The protection voltage threshold is adjustable and the MC3423/3523 can be
programmed for minimum duration of bvervoltage condition before tripping, thus
supplying noise immunity.
The MC3423/3523 is essentially a "two terminal" system, therefore it can be
used with either positive or negative supplies.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

P1 SUFFIX
PLASTIC PACKAGE
CASE 626
(MC3423 only)

U SUFFIX
CERAMIC PACKAGE
CASE 693

MAXIMUM RATINGS
Rating

Symbol

Value

Unit

VCC-VEE

40

Vdc

Sense Voltage (1)

VSense1

6.5

Vdc

Sense Voltage (2)

VSense2

6.5

Vdc

Vact

7.0

Vdc

Output Current

10

300

rnA

Operating Ambient Temperature Range
MC3423
MC3523

TA

Operating Junction Temperature
Plastic Package
Ceramic Package

TJ

Differential Power Supply Voltage

Remote Activation Input Voltage

o

SUFFIX
PLASTIC PACKAGE
CASE 751
(SOP-8)

°c

oto +70

PIN CONNECTIONS

-55 to +125
°c

Drive
Output

VCC

125
150

Sense 1
Storage Temperature Range

Tstg

-65 to +150

°c
Sense 2

Indicator
Output

Current
Source

Remote
Activation
(Top View)

Typical Application

Vout
Current
Umited
DC
Power
Supply

ORDERING INFORMATION

Cout
Device

Temperature Range

MC3423D
MC3423P1

S0-8
0° to +70°C

MC3423U
MC3523U

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-111

Package

Plastic DIP
Ceramic DIP

-55° to + 125°C

Ceramic DIP

MC3423, MC3523
ELECTRICAL CHARACTERICISTICS (5 V <
h unless otherwise noted)
- VCC - VEE <
- 36 V TI ow< TA Th',lgl,
Symbol

Min

VCC-VEE

4.5

Vo

VCC-2.2

Characteristics
Supply Voltage Range
Output Voltage
(10 = 100 rnA)
Indicator Output Voltage
(IO(lnd) = 1.6 rnA)

Vodlnd)

Sense Trip Voltage
(TA = 25°C)

VSensel,
VSense2

Temperature Coefficient of VSensel
(Figure 2)
Remote Activation Input Current
(VIH = 2.0 V, VCC - VEE = 5.0 V)
(VIL = 0.8 V, VCC - VEE = 5.0 V)

Max

Unit

40

Vdc

-

Vdc

0.1

0.4

Vdc

2.6

2.75

Vdc

Typ

VCC-1.8

2.45

-

TCVSI

-

0.06

IIH
IlL

-

5.0
-120

40
-180

o/c/oe

IlA

-

ISource

0.1

0.2

0.3

Output Current Risetime
(TA = 25°C)

tr

-

400

-

mAillS

Propagation Delay Time
ITA = 25°C)

tpd

-

0.5

-

IlS

Supply Current
MC3423
MC3523

ID

-

6.0
5.0

10
7.0

Source Current

NOTES: Tlow to Thigh

rnA

rnA

-55° to +125°C for MC3523
0° to +70°C for MC3423
Figure 1. Block Diagram

H I - - - - - - - - - - - - j - - - j - - o Current
4 Source

Sense I o + - - ! - - - - I

' - - - * - - \ - { ) Output

8

3

Sense 2
Remote
Activation

Indicator
Output

Figure 2. Sense Voltage Test Circuit
VCC
Switch I
IA~./,-----------j

I

I
7

5

Switch I

Switch 2

VSense I

Position A

Closed

VSense 2

Position B

Open

Ramp VI until output goes high; this is
the VS ense threshold.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-112

MC3423, MC3523
Figure 3. Basic Circuit Configuration

F1

:

(t Sense
Lead)
R1

Power
Supply

~

C

R2

4

~
RG

MC3523

Vtrip; Vref(1

I
I
I
I
I

1

t

For minimum value of RG, see Figure 9

IS1

*See text for explanation

I

(- Sense Lead)

R1
R1
R2
)= 2.6 V (1 R2

R2 :;; 10 kQ for minimum drift

To
Load

"-

7,2J

t

I

Figure 4. Circuit Configuration for Supply Voltage Above 36 V

(t Sense
Lead)

RS

VS-10

RS;(~

R1
1

Power
Supply

IN4740
10V

/

B

>---

MC3523
MC3423

r
:!:.-<- 10llF

:~ ) ~ 2.6 V (1 t :~

Vtrip ; Vref (1 t

To
Load

~

*R2:;; 10 kQ
01: VS:;; 50 V; 2N6504 or equivalent
Vs $100 V; 2N6505 or equivalent
Vs :;; 200 V; 2N6506 or equivalent
Vs $ 400 V; 2N6507 or equivalent
Vs :;; 600 V; 2N650B or equivalent
Vs $ 800 V; 2N6509 or equivalent

3

]
*R2
7 ~ (-Sense
Lead)

-,15V

)kQ

01

Figure 5. Basic Configuration for Programmable Duration of
Overvoltage Condition Before Trip
Vee

VtriP~----tVee
R1

~

1

6

r

l

Indication ~
BOut /

I 'CO," I
41:.
R2

Ve

~

Li.

TC
1

Ve

b. V1O

I

2

Power
Supply

o

R3

7

Vref

~I--~---Z---Va

J

Va

Via

I - t d ....

I

If',

Vtrip

R3~10mA

Vref
td; -1-source

xe~112

3
x10 J e (See Figure 10)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-113

~

)

MC3423, MC3523
APPLICATION INFORMATION
Basic Circuit Configuration
The basic circuit configuration of the MC3423/3523 OVP is
shown in Figure 3 for supply voltages from 4.5 V to 36 V, and
in Figure 4 for trip voltages above 36 V. The threshold or trip
voltage at which the MC3423/3523 will trigger and supply gate
drive to the crowbar SCR, 01, is determined by the selection
of Rl and R2. Theirvalues can be determined by the equation
given in Figures 3 and 4, or by the graph shown in Figure 8.
The minimum value of the gate current limiting resistor, RG, is
given in Figure 9. Using this value of RG, the SCR, 01, will
receive the greatest gate current possible without damaging
the MC3423/3523. If lower output currents are required, RG
can be increased in value. The switch, SI, shown in Figure 3
may be used to reset the crowbar. Otherwise, the power
supply, across which the SCR is connected, must be shut
down to reset the crowbar. If a non current-limited supply is
used, a fuse or circuit breaker, Fl, should be used to protect
the SCR and/or the load.
The circuit configurations shown in Figures 3 and 4 will have
a typical propogation delay of 1.0 Ils. If faster operation is
desired, Pin 3 may be connected to Pin 2 with Pin 4 left floating.
This will result in decreasing the propagation delay to
approximately 0.5 Ils at the expense of a slightly increased TC
for the trip voltage value.

Figure 6. Configuration for Programmable
Duration of Overvoltage Condition Before
TripIWith Immediate Trip at
High Overvoltages
(+ Sense
Lead)

+

~

1

Rl

zq

I

Power
Supply

I

~
R2

MC3523

~

5

4~
lk

7

T

C
(- Sense Lead)

-

Additional Features
1. Activation Indication Output
An additional output for use as an indicator of OVP
activation is provided by the MC3423/3523. This output is
an open collector transistor which saturates when the OVP
is activated. In addition, it can be used to clock an edge
triggered flip-flop whose output inhibits or shuts down the
power supply when the OVP trips. This reduces or
eliminates the heatsinking requirements for the
crowbar SCR.

Configuration for Programmable Minimmum Duration
of Overvoltage Condition Before Tripping
In many instances, the MC3423/3523 OVP will be used in
a noise environment. To prevent false tripping of the OVP
circuit by noise which would not normally harm the load,
MC3423/3523 has a programmable delay feature. To
implement this feature, the circuit configuration of Figure 5 is
used. In this configuration, a capacitor is connected from Pin
3 to VEE. The value of this capacitor determines the minimum
duration of the overvoltage condition which is necessary to trip
the ~YP. The value of C can be found from Figure 10. The
circuit operates in the following manner: When VCC rises
above the trip point set by Rl and R2, an internal current
source (Pin 4) begins charging the capacitor, C, connected to
Pin 3. If the overvoltage condition disappears before this
occurs, the capacitor is discharged at a rate 10 times faster
than the charging rate, resetting the timing feature until the
next overvoltage condition occurs.
Occasionally, it is desired that immediate crowbarring of the
supply occur when a high overvoltage condition occurs, while
retaining the false tripping immunity of Figure 5. In this case,
the circuit of Figure 6 can be used. The circuit will operate as
previously described for small overvoltages, but will
immediately trip if the power supply voltage exceeds
VZl + 1.4 V.

2. Remote Activation Input
Another feature of the MC3423/3523 is its remote
activation input, Pin 5. If the voltage on this CMOSITTL
compatible input is held below 0.8 V, the MC3423/3523
operates normally. However, if it is raised to a voltage above
2.0 V, the OVP output is activated independent of whether
or not an overvoltage condition is present. It should be
noted that Pin 5 has an internal pull-up current source. This
feature can be used to accomplish an orderly and
sequenced shutdown of system power supplies during a
system fault condition. In addition, the activation indication
output of one MC3423/3523 can be used to activate another
MC3423/3523 if a single transistor inverter is used to
interface the former's indication output to the laUer's remote
activation input, as shown in Figure 7. In this circuit, the
indication output (pin 6) of the MC3423 on power supply 1
is used to activate the MC3423 associated with power
supply 2. 01 is any small PNP with adequate voltage rating.

=

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-114

MC3423, MC3523
Figure 8. Rl versus Trip Voltage

Figure 7. Circuit Configuration for
Activating One MC3523 from Another

30

+

I

a

Power
Supply
#1

~

w
u
z
~
!!!
rn
w

r-- r-

V
,/.. I..-'.:

",

V

~~

"" '"

Min

./ ~
~~

a:

10k

",

./

Max

R2=2.7k

20

a: 10

Rl

./

..... " , ~
V ./

I

jjIP"

+

o

o

10
15
20
Vr. TRIP VOLTAGE M

5.0

25

30

Figure 9. Minimum RG versus Supply Voltage
Note that both supplies have their negative output leads tied
together (i.e., both are positive supplies). Iftheir positive leads
are common (two negative supplies) the emitter of Q1 would
be moved to the positive lead of supply 1 and R1 would
therefore have to be resized to deliver the appropriate drive to
Ql.

35

./
/'

-----,-- RG(min) =0
~ 30
iIVCC<11 V
w

(!)

~
'-'
0

25

>

~

c..
c..

Crowbar SCR Considerations

:::::I

Referring to Figure 11 , it can be seen that the crowbar SCR,
when activated, is subject to a large current surge from the
output capacitance, Couto This capacitance consists of the
power supply output caps, the load's decoupling caps, and in
the case of Figure 11A, the supply's input filter caps. This
surge current is illustrated in Figure 12, and can cause SCR
failure or degradation by anyone of three mechanisms: di/dt,
absolute peak surge, or 12t. The interrelationship of these
failure methods and the breadth of the applications make
specification of the SCR by the semiconductor manufacturer
difficult and expensive. Therefore, the designer must empirically determine the SCR and circuit elements which result in
reliable and effective OVP operation. However, an understanding of the factors which influence the SCR's di/dt and
surge capabilities simplifies this task.

./

20

u

>

15
10

"

./

u:
U

V

./

./
o

"
10

./

20
30
40
50
60
70
RG, GATE CURRENT UMITING RESISTOR (n)

80

Figure 10. Capacitance versus
Minimum Overvoltage Duration
1.0

LL"

0.1

::!.

w

dl/dt
As the gate region of the SCR is driven on, its area of
conduction takes a finite amount of time to grow, starting as a
very small region and gradually spreading. Since the anode
current flows through this turned-on gate region, very high
current densities can occur in the gate region if high anode
currents appear quickly (di/dt). This can result in immediate
destruction of the SCR or gradual degradation of its forward
blocking voltage capabilities - depending on the severity of
the occasion.

u

ii:U

0.01

Cf

13

cS 0.001

0.0001
0.001

1

5
2
1
0.01

0.1

'd, DELAY TIME (ms)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-115

1.0

10

MC3423, MC3523
Figure 11. Typical Crowbar OVP Circuit
Configurations
Vout
DC
Power
o---I-a--I Supply I-.......---~-+-O

Vout

'Needed Hsupply not current limited

Figure 12. Crowbar SCR Surge Current
Waveform

Surge Due to
Output CapacHor

The Value of di/dt that an SCR can safely handle is
influenced by its construction and the characteristics of the
gate drive signal. A center-gate-fire SCR has more di/dt
capability than a corner-gate-fire type, and heavily overdriving
(3 to 5 times IGT) the SCR gate with a fast < 1.0 Ils rise time
signal will maximize its di/dt capability. A typical maximum
number in phase control SCRs of less than 50 A(RMS) rating
might be 200 Allls, assuming a gate current of five times IGT
and < 1.0 Ils rise time. If having done this, a di/dt problem is
seen to still exist, the designer can also decrease the di/dt of
the current waveform by adding inductance in series with the
SCR, as shown in Figure 13. Of course, this reduces the
circuit's ability to rapidly reduce the DC bus voltage and a
tradeoff must be made between speedy voltage reduction
and di/dt.

Surge Current
If the peak current and/or the duration of the surge is
excessive, immediate destruction due to device overheating
will result. The surge capability of the SCR is directly
proportional to its die area. If the surge current cannot be
reduced (by adding series resistance - see Figure 13) to a
safe level which is consistent with the systems requirements
for speedy bus voltage reduction, the designer must use a
higher current SCR. This may result in the average current
capability of the SCR exceeding the steady state current
requirements imposed by the DC power supply.
A WORD ABOUT FUSING

Figure 13. Circuit Elements Affecting
SCR Surge & di/dt

R

ESR

L

Before leaving the subject of the crowbar SCR, a few words
about fuse protection are in order. Referring back to Figure
11 A, it will be seen that a fuse is necessary if the power supply
to be protected is not output current limited. This fuse is not
meant to prevent SCR failure but rather to prevent a firel
In order to protect the SCR, the fuse would have to possess
an 12t rating less than that of the SCR and yet have a
high enough continuous current rating to survive normal
supply output currents. In addition, it must be capable of
successfully clearing the high short circuit currents from the
supply. Such a fuse as this is quite expensive, and may not
even be available.

CROWBAR SCR SELECTION GUIDE
As an aid in selecting an SCR for crowbar use, the following
selection guide is presented.
R & L EMPIRICALLY DETERMINED!

The usual design compromise then is to use a garden
variety fuse (3AG or 3AB style) which cannot be relied on to
blow before the thyristor does, and trust that if the SCR does
fail, it will fail short circuit. In the majority of the designs, this
will be the case, though this is difficult to guarantee. Of course,
a sufficiently high surge will cause an open. These comments
also apply to the fuse in Figure 11 B.
For a complete and detailed treatment of SCR and fuse
selection, refer to Motorola Application Note AN-789.

Device
2N6400 Series
2N6504 Series
2N1842 Series
2N2573 Series
2N681 Series
MCR3935-1 Series
MCR81-5 Series

IRMS

IFSM

Package

16A
25A
16A
25A
25A
35A
80A

160A
160A
125A
260A
200 A
350A
1000A

T0220 Plastic
T0220 Plastic
Metal Stud
Metal TO-3 Type
Metal Stud
Metal Stud
Metal Stud

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-116

MOTOROLA

MC3425

SEMICONDUCTOR-----TECHNICAL DATA

Power Supply Supervisory/Over and
Undervoltage Protection Circuit
The MC3425 is a power supply supervisory circuit containing all the necessary
functions required to monitor over and undervoltage fault conditions. These
integrated circuits contain dedicated over and undervoltage sensing channels
with independently programmable time delays. The overvoltage channel has a
high current Drive Output for use in conjunction with an external SCR "Crowbar"
for shutdown. The undervoltage channel input comparator has hysteresis which
is externally programmable, and an open-collector output for fault indication.

POWER SUPPLY SUPERVISORY/
OVER AND UNDERVOLTAGE
PROTECTION CIRCUIT
SILICON MONOLITHIC
INTEGRATED CIRCUIT

• Dedicated Over And Undervoltage Sensing
• Programmable Hysteresis Of Undervoltage Comparator
• Internal 2.5 V Reference
• 300 mA Overvoltage Drive Output
• 30 mA Undervoltage Indicator Output
• Programmable lime Delays
• 4.5 V to 40 V Operation
MAXIMUM RATINGS
Rating

Symbol

Value

Unit

Power Supply Voltage

VCC

40

Vdc

Comparator Input Voltage Range (Note 1)

VIR

-0.3 to +40

Vdc

IOS(DRV)

Internally
Limited

rnA

Indicator Output Voltage

VIND

o to 40

Vdc

Indicator Output Sink Current

liND

30

rnA

Power Dissipation and Thermal Characteristics
Maximum Power Dissipation @TA=70"C
Thermal Resistance Junction to Air

PD
RSJA

1000
80

mW
"CIW

Drive Output Short Circuit Current

Operating Junction Temperature

TJ

+150

"C

Operating Ambient Temperature Range

TA

o to +70

°c

Tstg

-55 to + 150

"C

Storage Temperature Range

NOTES: 1. The Input signal voltage should not be allowed to go negative by more than
300 mV or positive by more than 40 V, independent of VCC, without
device destruction.

P1 SUFFIX
PLASTIC PACKAGE
CASE 626

PIN CONNECTIONS

O.V.DRV
Output

VCC

O.v. DLY

Gnd

O.v. Sense

U.V.IND
Output

U.v. Sense

U.v. DLY

Typical Application

(Top View)

Overvoltage Crowbar Protection, Undervoltage Indication
I-----..-----------<~

DC
Power
Supply

Cout

Vout

Undervoltage
Indication

ORDERING INFORMATION
Temperature
Range
0" to +70"C

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-117

MC3425
ELECTRICAL CHARACTERICISTICS (4.5 V,;; VCC';; 40 V; TA = Tlow to Thigh [see Note 2], unless otherwise noted.)

I

Characteristics

I

Symbol

I

Min

I

Typ

I

Max

Unit

REFERENCE SECTION
Sense Trip Voltage (Referenced Voltage)
VCC=15V
TA= 25°C
Tlow to ThiQh (Note 2)

VSense

Line Regulation of V Sense
4.5 V ,;; VCC ,;; 40 V; TJ = 25°C

Regline

Vdc
2.5
2.5

2.6
2.63

-

7.0

15

mV

4.5

-

40

Vdc

ICC(off)

-

8.5

10

rnA

ICC(on)

-

16.5

19

rnA

liB

-

1.0

2.0

!iA

2.4
2.33

Power Supply Voltage Operating Range

VCC

Power Supply Current
VCC = 40 V; TA = 25°C; No Output Loads
O.V. Sense (Pin 3) = 0 V;
U.V. Sense (Pin 4) = VCC
O.V. Sense (Pin 3) = VCC;
U.V. Sense (Pin 4) = 0 V

INPUT SECTION
Input Bias Current, O.V. and U.V. Sense
Hysteresis Activation Voltage, U.V. Sense
VCC = 15 V; TA = 25°C;
IH = 10%
IH = 90%
Hysteresis Current, U.V. Sense
VCC = 15 V; TA = 25°C; U.V. Sense (Pin 4) = 2.5 V

IH

-

0.6
0.8

-

9.0

12.5

16

0.5
260

!iA
V

Delay Pin Voltage (IDLY = 0 rnA)
Low State
High State
Delay Pin Source Current
OV
VCC = 15 V; VDLY
Delay Pin Sink Current
VCC = 15 V; VDLY

V

VH(act)

-

VOL(DLY)
VOH(DLY)

VCC-0.5

0.2
VCC-0.15

IDLY(source)

140

200

IDLY(sink)

1.8

3.0

-

rnA

-

rnA

200

nA

!iA

2.5V

OUTPUT SECTION
Drive Output Peak Current (TA = 25°C)

IDRV(peak)

200

300

Drive Output Voltage
IDRV = 100 rnA; TA = 25° C

VOH(DRV)

VCC-2.5

VCC-2.0

Drive Output Leakage Current
VDRV =OV

IDRV(leak)

-

15

Drive Output Current Slew Rate (TA = 25°C)

di/dt

-

2.0

Drive Output VCC Transient Rejection
VCC = 0 V to 15 V at dV/dt = 200 V IlS;
O.V. Sense (Pin 3) = 0 V; TA = 25°C

IDRV(trans)

-

1.0

Indicator Output Saturation Voltage
liND = 30 rnA; TA = 25°C

VIND(sat)

-

560

800

mV

Indicator Output Leakage Current
VOH(IND) = 40 V

IIND(leak)

-

25

200

nA

2.5

2.63

V

Output Comparator Threshold Voltage
(Note 3)
Propagation Delay Time
(VCC = 15 V; TA = 25°C)
Input to Drive Output or Indicator Output
100 mV Overdrive, CDLY = o !iF
Input to Delay
2.5 V Overdrive (0 V to 5.0 V Step)

Vth(OC)

2.33

-

V

AiIlS
rnA
(Peak)

tPLH(IN/OUT)

-

1.7

-

!is

tPLH(INIIDLY)

-

700

-

ns

NOTES: 2. TLow to THigh = 0° to +70°C
3. The Vth(OC) limits are approximately the VS ense limits over the applicable temperature range.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-118

MC3425
Figure 1. Hysteresis Current versus
Hysteresis Activation Voltage
14
~

.a.

12

w

10

....z
a:
a:
u

::J

8.0

I I

-

f-

en
w

6.0

~

4.0

w
....

I

VCC=40V

I

I

§

/
/,



VCC-5.0V -

-25

./

C!l

./"

10.0
-55

VS ense* = 2.500 V

/

:r:
u -10
w

t---

i-'""""

VS ense* = 2.400 V

w

Z


o

200

100

300

I'

o

o

400

IDRV(peak). DRIVE OUTPUT PEAK CURRENT (rnA)

~
w

t!J

:5

:z 2.460

~

~

'"

2.420

VCC=15V
IDRV(peak) = 200 rnA
1.0% Duty Cycle @ 300 Hz

"

I-

~

D..

I-

2.380

~

0

w

~

'" '"

2.340

a
>

-25

0

25

J

50

a:
a:

28
24
20

~

16

40

~

12

'"a:w

;;= 8.0
a
D..

- 4.0

t.:>

100

.... - -

_....

D..
D..

.!:?
75

30

Curve OVSense UVSense
Gnd
A
VCC
A
B
Gnd
Vc

~

t.:>

/'"

-

c_

12.30~55

I

/

"- ............



VCC=15V_
TA=25°C

./

!;:

o

./

./

~

a
a: 0.1
a

a;;!!;

/

125

o
o

f-

B

5.0

,....

-I--

TA=25°C- -

I
10

15

20

25

30

VCC. POWER SUPPLY VOLTAGE M

TA. AMBIENT TEMPERATURE (0C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-120

35

40

MC3425
APPLICATIONS INFORMATION
Figure 11. Overvoltage Protection and
UndervoltaJe Fault Indication with
Programmable Delay

Figure 12. Overvoltage Protection of 5.0 V
Supply with Line Loss Detector
Va = 5.0V
VO(trip) = 6.25 V

+VO
~

1.0k
R1B

?R1A

G~~

8
VCC

t
Power
Supply
4.5Vto40V

-

~

-

U.v.
Sense

IH

3

.~

R2B
CDLYT

O.v.
Sense

U.V.
DLY

t

Gnd
7

CDLY

Gn
~

U.V.DLY ~ 2.5V
Pin 5

R1A
Va (trip) = 2.5 V (1 - R2A )

U.v. IND
Pin6

tDLY = 12500 CDLY

Figure 13. Overvoltage Audio Alarm Circuit

tVa
12k

O.V.
DRV

-------;1

Input Signal

---Yv-LV. pop

82k
6.8k

1

O.V.
Sense

1

f(input) < 25000 CDLY

O.v.
DRV

1.0k

MC3425
U.v.

UV.
Sense
U.v.
DLY

Output Pulse When

10k

MC3425
4

ON

12V
8
VCC

5.01lF

o--j

10k

2.7k

r-- OFF

LJ

Figure 14. Programmable Frequency Switch

Alarm On When
Vlo = 13.6V

VCC
O.v.
Sense

12V
Power
Supply

O.v. 1
DRV

O.V. 1
DRV

R1B R2B
Rl B + R2B

U.v. Hysteresis = IH (

MC3425

MC3425
O.V.
Sense
O.v.
DLY

R2A

U.v.
Sense

ACBII

U.v. Fault
6 Indicator

U.v.
IND

Une Loss
Output
U.V. r6~_---11--D
IND

O.V.
DLY

Gnd
7

O.lIlF

' - - - - - - - - - - - - " * - - - " * - - 0 Gnd
O.v. Sense
Pin3

f\ f\ (\

C\

V\/\J

25V

V'

O.V.DLY _ _ _ ...4_.-!L_ 25V
Pin 2
/L.A.-/ LJ ~ .

n

n

nV.DRY_~
Pin 1

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-121

ON
~OFF

MC3425
CIRCUIT DESCRIPTION
The MC3425 is a power supply supervisory circuit
containing all the necessary functions required to monitor over
and undervoltage fault conditions. The block diagram is
shown below in Figure 15. The Overvoltage (O.V.) and
Undervoltage (U.V.) Input Comparators are both referenced to
an internal 2.5 V regulator. The U.V. Input Comparator has a
feedback activated 12.5 j.tA current sink (lH) which is used for
programming the input hysteresis voltage (VH). The source
resistance feeding this input (RH) determines the amount of
hysteresis voltage by VH = IHRH = 12.5 x 10-6 RH ..
Separate Delay pins (O.V. DLY, U.V. DLY.) are provided for
each channel to independently delay the Drive and Indicator
outputs, thus providing greater input noise immunity..Th~ two
Delay pins are essentially the outputs of the respective Input
comparators, and provide a constant current source,
IDLY(source), of typically 20.0 j.tA ~he.n the noninverting input
voltage is greater than the Invertmg mput level. A capacitor
connected from these Delay pins to ground, will establish a
predictable delay time (tDLy) for the Drive and Indicator
outputs. The Delay pins are internally connected to the
noninverting inputs of the O.V. and U.V. Output Comparators,
which are referenced to the internal 2.5 V regulator. Therefore,
delay time (tDLY) is based on the constant current source,
IDLY(source), charging the external delay capacitor (CDLY)
to 2.5 V.

Vref CDLY
2.5 CDLY
tDLY - IDLY(source) 200llA

= 12500 CDLY

Figure 5 provides CDLY values for a wide range of ti~e
delays. The Delay pins are pulled low when the re.spect~ve
input comparator's noninverting input is le.~s than the mvert~ng
input. The sink current, IDLY(sink), capabilityofthe Delay pins
is ~ 1.8 mA and is much greater than the typical 200 IlA source
current, thus enabling a relatively fast delay capacitor
discharge time.
The Overvoltage Drive Output is a current-limited
emitter-follower capable of sourcing 300 mA at a turn-on slew
rate at 2.0 Allls, ideal for driving "Crowbar" SCR's. The
Undervoltage Indicator Output is an open-collector, NPN
transistor, capable of sinking 30 mA to provide sufficient drive
for LED's, small relays or shut-down circuitry. These current
capabilities apply to both channels operating simultaneously,
providing device power dissipation limits are not exceeded.
The MC3425 has an internal 2.5 V bandgap reference
regulator with an accuracy of ± 4.0% for the basic devices and
± 1.0% for the A-suffix device types at 25°C. The reference
has a typical temperature coefficient of 30 ppm/oC for
A-suffix devices.

Figure 15. Block Diagram

Vee
o.v.
Sense

3

L - -___!----o

O.v.
DRV

, ~-I----o U.v.
6
IND

~~VIr--l

U.v.
Sense
4

12.5!lA

Input Section

5

output Section

U.v.

DLY

Note: All voltages and currents are nominal.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-122

MC3425
CROWBAR SCR CONSIDERATIONS
Referring to Figure 16, it can be seen that the crowbar SCR,
when activated, is subject to a large current surge from the
output capacitance, Cout. This capacitance consists of the
power supply output capacitors, the load's decoupling
capacitors, and in the case of Figure 16A, the supply's input
filter capacitors. This surge current is illustrated in Figure 17,
and can cause SCR failure or degradation by anyone of three
mechanisms: di/dt, absolute peak surge, or 121. The
interrelationship of these failure methods and the breadth of
the applications make specification of the SCR by the
semiconductor manufacturer difficult and expensive.
Therefore, the designer must empirically determine the SCR
and circuit elements which result in reliable and effective OVP
operation. However, an understanding of the factors which
influence the SCR's di/dt and surge capabilities simplifies
this task.

1. di/dt
As the gate region of the SCR is driven on, its area of
conduction takes a finite amount of time to grow, starting as a
very small region and gradually spreading. Since the anode

current flows through this turned-on gate region, very high
current densities can occur in the gate region if high anode
currents appear quickly (di/dt). This can result in immediate
destruction of the SCR or gradual degradation of its forward
blocking voltage capabilities - depending on the severity of
the occasion.
The value of di/dt that an SCR can safely handle is
influenced by its construction and the characteristics of the
gate drive signal. A center-gate-fire SCR has more di/dt
capability than a corner-gate-fire type, and heavily overdriving
( 3 to 5 times IGT) the SCR gate with a fast < 1.0 Ils rise time
signal will maximize its di/dt capability. A typical maximum
number in phase control SCRs of less than 50 A(RMS) rating
might be 200 NILS, assuming a gate current of five times IGT
and < 1.0 Ils rise time. If having done this, a di/dt problem is
seen to still exist, the designer can also decrease the di/dt of
the current waveform by adding inductance in series with the
SCR, as shown in Figure 18. Of course, this reduces the
circuit's ability to rapidly reduce the dc bus voltage and a
tradeoff must be made between speedy voltage reduction
and di/dt.

Figure 16. Typical Crowbar Circuit Configurations

16A - SCR ACROSS INPUT OF REGULATOR

1-.....- - - _ - - - - - 0 Vout

16B - SCR ACROSS OUTPUT OF REGULATOR

1 - - - -..~'UI>------.....-oVout

-Needed Hsupply is not current limited.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-123

MC3425
Figure 17. Crowbar SCR Surge Current Waveform

Surge Due to
Output Capacitor

2. Surge Current
If the peak current and/or the duration of the surge is
excessive, immediate destruction due to device
overheating will result. The surge capability of the SCR is
directly proportional to its die area. If the surge current
cannot be reduced (by adding series resistance - see
Figure 18) to a safe level which is consistent with the
system's requirements for speedy bus voltage reduction,
the designer must use a higher current SCR. This may result
in the average current capability of the SCR exceeding the
steady state current requirements imposed by the DC
power supply.

A WORD ABOUT FUSING
Before leaving the subject of the crowbar SCR, a few words
about fuse protection are in order. Referring back to Figure
16A, it will be seen that a fuse is necessary if the power supply
to be protected is not output current limited. This fuse is not
meant to prevent SCR failure but rather to prevent a fire!
In order to protect the SCR, the fuse would have to possess
an 12t rating less than that of the SCR and yet have a high
enough continuous current rating to survive normal supply
output currents. In addition, it must be capable of successfully
clearing the high short circuit currents from the supply. Such
a fuse as this is quite expensive, and may not even be
available.
The usual design compromise then is to use a garden
variety fuse (3AG or 3AB style) which cannot be relied on to
blow before the thyristor does, and trust that if the SCR does
fail, it will fail short circuit. In the majority of the designs, this will
be the case, though this is difficult to guarantee. Of course, a
sufficiently high surge will cause an open. These comments
also apply to the fuse in Figure 11 B.

CROWBAR SCR SELECTION GUIDE
As an aid in selecting an SCR for crowbar use, the following
selection guide is presented.

Figure 18. Circuit Elements Affecting
SCR Surge & dl/dt

R
l

R & l EMPIRICALLY DETERMINED

Device

IRMS

IFSM

Package

MCR67 Series
MCR68 Series
2N1842 Series
2N6400 Series
2N6504 Series
2N681 Series
2N2573 Series
MCR69 Series
MCR70 Series
MCR71 Series

12A
12A
16A
16A
25A
25A
25A
25A
35A
55A

100A
100A
125A
160A
160A
200A
260 A
300A
350 A
550 A

Metal Stud
TO-220 Plastic
Metal Stud
TO-220 Plastic
TO-220 Plastic
Metal Stud
TO-3 Metal Can
TO-220 Plastic
Metal Stud
Metal Stud

For a complete and detailed treatment of SCR and fuse selection
refer to Motorola Application Note AN789.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-124

MOTOROLA

MC7800

SEMICONDUCTOR------

Series

TECHNICAL DATA

Three-Terminal Positive Voltage
Regulators

THREE-TERMINAL
POSITIVE FIXED
VOLTAGE REGULATORS

These voltage regulators are monolithic integrated circuits designed as
fixed-voltage regulators for a wide variety of applications including local, on-card
regulation. These regulators employ internal current limiting, thermal shutdown,
and safe-area compensation. With adequate heatsinking they can deliver output
currents in excess of 1.0 A. Although designed primarily as a fixed voltage
regulator, these devices can be used with external components to obtain
adjustable voltages and currents.

SILICON MONOLITHIC
INTEGRATED CIRCUITS

• Output Current in Excess of 1.0 A

TSUFFIX
PLASTIC PACKAGE
CASE 221A

• No External Components Required
• Internal Thermal Overload Protection
• Internal Short Circuit Current Limiting
• Output Transistor Safe-Area Compensation
• Output Voltage Offered in 2% and 4% Tolerance

PIN 1. Input
2. Ground
3. Output

Representative Schematic Diagram

Heatsink surface connected
to Pin 2

r--t--------..----___1I~-..____1I~--+--O

too

Input

500

STANDARD APPLICATION

I n p u t f f i C 7 8 X X Output
C **
0

Cin*
0.33J.lF

......- -......___1I>-----i.-o Output

~---+

3.3k

A common ground is required between the input
and the output voltages. The input voltage must
remain typically 2.0 V above the output voltage
even during the lowpointon the input ripple voltage.
2.7k

XX =these two digits of the type number indicate
voltage.

500
L--~~-~-~-~--e-~~---~---oGnd

•

Cin is required if regulator is located an
appreciable distance from power supply filter.

-

Co is not needed for stability; however, itdoes
improve transient response.
XX indicates nominal voltage

ORDERING INFORMATION
Device

Output Voltage
Tolerance

Tested Operating
Junction Temp. Range

MC78XXCT
MC78XXACT

4%
20/0

0° to +125°C

MC78XXBT

4%

-40° to +125°C

TYPE NO./VOLTAGE

Package
Plastic
Power

MC7805
MC7806
MC7808
MC7809

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-125

5.0 V
6.0V
8.0V
9.0 V

MC7812
MC7815
MC7818
MC7824

12V
15V
18V
24V

MC7800 Series
MAXIMUM RATINGS (TA = +25°C unless otherwise noted.)
Rating

Symbol

Value

Unit

VI

35
40

Vdc

Power Dissipation and Thermal Characteristics
Plastic Package
TA = +25°C
Derate above TA = +25°C
Thermal Resistance, Junction to Air
TC = + 25°C
Derate above TC = + 75°C (See Figure 1)
Thermal Resistance, Junction to Case

PD
1/0JA
°JA
PD
1/0JC
°JC

Internally Limited
15.4
65
Internally Limited
200
5.0

W
mW/oC
°CIW
W
mW/oC
°CIW

Storage Junction Temperature Range

Tstg

-65 to +150

°c

TJ

+150

°c

Input Voltage (5.0 -18 V)
(24 V)

Operating Junction Temperature

DEFINITIONS
Line Regulation - The change in output voltage for a change
in the input voltage. The measurement is made under
conditions of low dissipation or by using pulse techniques
such that the average chip temperature is not significantly
affected.
Load Regulation - The change in output voltage for a
change in load current at constant chip temperature.
Maximum Power Dissipation - The maximum total device
dissipation for which the regulator will operate within
specifications.

Quiescent Current - That part of the input current that is not
delivered to the load.
Output Noise Voltage - The rms AC voltage at the output,
with constant load and no input ripple, measured over a
specified frequency range.
Long Term Stability - Output voltage stability under
accelerated life test conditions with the maximum rated
voltage listed in the devices' electrical characteristics and
maximum power dissipation.

Figure 1. Worst Case Power Dissipation versus
Ambient Temperature (Case 221 A)

Figure 2. Input Output Differential as a Function
of Junction Temperature (MC78XXC, AC, B)
2.5

20

;[
z

I

16

°HS=O°C/W

CiS

en
6
a:

~

8.0

rf

4.0

.........

":

o

-50

~S = 5°C/W" \
~15O+~ i'.. ~
'""i--..
No Heat Sink

r--

I
-25

""

r--...

o 25 50
75
100
TA, AMBIENT TEMPERATURE (OC)

10=1.0A

~

10 = 500 rnA2.0

10 = 200 rnA

i::2:
=> .....

"

12

w

~

.......

Q

!;;:
a.:

0JC= 5°C/W
0JA= 65°C/W
TJ(rnax) = 150°C

§ ~ 1.5

10=20rnA

~~
~
1.0

10=OrnA

It

,

.'\.
150

o

-75

I--

-I

-50

I

I

-

I

-25
0
25
50
75
TJ, JUNCTION TEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-126

r-- I---

Ll.VO=2% ofVO
- - - Extended Curve for MC78XXB

.5

>

.::--

~

-6
:;
~
0.5

~

125

1--

-----

100

125

MC7800 Series
MC7805B, C
ELECTRICAL CHARACTERICISTICS (V in = 10V I0= 500 mA T J= T low toThiQh [Note 1] unless otherwise noted)
MC7805B

MC7805C

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

Output Voltage (TJ = +25'C)

Va

4.8

5.0

5.2

4.8

5.0

5.2

Vdc

Output Voltage
(5.0 mA';~'; t.OA, Po ,;t5 W)
7.0 Vdc,; in'; 20 Vdc
8.0 Vdc ,; Yin ,; 20 Vdc

Va

-

4.75
-

5.0

5.25

Line Regulation (TJ = +25'C, Note 2)
7.0 Vdc,; Vin ,; 25 Vdc
8.0 Vdc,; Vin'; 12 Vdc

Regline

Load Regulation (T~ = +25'C, Note 2)
5.0 mA ,; '(in'; .5 A
250 mA,; in'; 750 mA

Regload

Characteristics

Quiescent Current (TJ = +25'C)

IB

Vdc
4.75

5.0

-

5.25

-

7.0
2.0

100
50

-

7.0
2.0

100
50

-

40
15

100
50

-

40
15

100
50

4.3

8.0

-

4.3

8.0

-

-

-

-

1.3
0.5

-

-

-

-

1.3
0.5

-

-

-

mV

mV

mA
mA

Quiescent Current Change
7.0 Vdc,; Yin ,; 25 Vdc
8.0 Vdc,; Vin ,; 25 Vdc
5.0 mA,; 10'; 1.0 A

"'IB

Ripple Rejection
8.0 Vdc'; Vin ,; 18 Vdc, f = 120 Hz

RR

-

68

-

-

68

-

dB

VI-VO

-

2.0

2.0

-

10

-

-

Vn

-

10

-

IlVN O

Output Resistance f = 1.0 kHz

ro

-

17

-

-

17

-

mQ

Short Circuit Current Limit (TA = +25'C)
Yin = 35 Vdc

ISC

-

0.2

-

-

0.2

-

A

Imax

-

2.2

-

-

2.2

TCVO

-

-1.1

-

-

-1.1

-

mV/'C

Dropout Voltage (10 = 1.0 A, TJ = +25'C)
Output Noise Voltage (TA = +25'C)
10 Hz,; f,; tOO kHz

Peak Output Current (TJ = +25'C)
Average Temperature Coefficient of Output Voltage

-

Vdc

A

MC7805AC
ELECTRICAL CHARACTERICISTICS (Vin = 10 V, 10 = 1.0 A, TJ = Tlow to Thigh [Note 1], unless otherwise noted.)
Symbol

Min

Typ

Max

Unit

Output Voltage (TJ = +25'C)

Vo

4.9

5.0

5.1

Vdc

Output Voltage
(5.0 mA';~'; 1.0A, Po ,;15 W)
7.5 Vdc,; in'; 20 Vdc

Vo

4.8

5.0

5.2

-

7.0
10
2.0
7.0

50
50
25
50

25
25
8.0

100
100
50

4.3

6.0
6.0

-

-

-

-

0.8
0.8
0.5

Characteristics

Line Regulation (Note 2)
7.5 Vdc,; Yin ,; 25 Vdc, 10 = 500 mA
8.0 Vdc,; Vin'; 12 Vdc
8.0 Vdc,; Vin'; 12 Vdc, TJ = +25'C
7.3 Vdc,; Vin'; 20 Vdc, TJ = +25'C

Regline

Load Regulation (Note 2)
5.0 mA,; 10'; 1.5 A. TJ = +25'C
5.0 mA ,; 10 ,; 1.0 A
250 mA ,; 10 ,; 750 mA, TJ = +25'C
250 mA ,; 10 ,; 750 mA

Regload

Vdc

mV

-

-

-

Quiescent Current
(TJ = +25'C)

IB

Quiescent Current Change
8.0 Vdc,; Vin ,; 25 Vdc,
= 500 mA
7.5 Vdc,; Vin ,; 20 Vdc, J = +25'C
5.0 mA ,; 10 ,; 1.0 A

"'IB

Ripple Rejection
8.0 Vdc,; Vin'; 18 Vdc, f = 120 Hz, TJ = +25'C
8.0 Vdc,; Vin'; 18 Vdc, f = 120 Hz, 10 = 500 mA

RR

?,

-

-

mV

mA

-

dB

-

68

VI-Va

-

Vn

-

Oulput Resistance (f = 1.0 kHz)

rO

Short Circuit Current Limit (TA = +25'C)
Yin = 35 Vdc

ISC
Imax
TCVO

Dropout Voltage (10 = 1.0 A, TJ = +25'C)
Oulpul Noise Voltage (TA = +25'C)
10 Hz,; j,; 100 kHz

Peak Output Current (TJ = +25'C)
Average Temperature Coefficient of Output Voltage
NOTES:

mA

-

2.0

-

Vdc

10

-

IlVN O

-

17

-

mQ

-

0.2

-

A

-

2.2

-

A

-

-1.1

-

mV/'C

1. Tlow = O'C for MC78XXC, AC
T high= + 125'C for MC78XXC, AC, B
= -40'C for MC78XXB
2. Load and line regulation are specified at constant junction temperature. Changes in Vo due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-127

MC7800 Series
MC7806B, C
ELECTRICAL CHARACTERICISTICS (Vin = 11 V,0=
I
500 rnA T J= T low toThiQh [Note 1] unless otherwise noted)
MC7806B
Characteristics

MC7806C

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

Output Voltage (TJ = +25"C)

Vo

5.75

6.0

6.25

5.75

6.0

6.25

Vdc

Output Voltage
(5.0 mA
1.0 A, Po ",15 W)
8.0 Vdc '" in '" 21 Vdc
9.0 Vdc '" Yin '" 21 Vdc
Line Regulation (TJ = +25"C, Note 2)
8.0 Vdc '" Vin '" 25 Vdc
9.0 Vdc '" Vin '" 13 Vdc

Vo
5.7

6.0

-

6.3

"'w. '"

Vdc

-

Regline

Regload

250 mA '" i!?n '" 750 mA
Quiescent Current (TJ = +25"C)

IS

Quiescent Current Change
8.0 Vdc '" Vin '" 25 Vdc
9.0 Vdc '" Vin '" 25 Vdc
5.0 mA '" 10 '" 1.0 A

diS

Ripple R~ection
9.0 V c'" Vin '" 19 Vdc, I = 120 Hz

RR

Dropout Voltage (10 = 1.0 A, TJ = +25"C)
Output Noise Voltage (TA = +25"C)
10 Hz ",I '" 100 kHz

VI-VO
Vn

6.0

6.3

-

-

9.0
3.0

120
60

-

9.0
3.0

120
60

-

43
16

120
60

-

-

43
16

120
60

4.3

8.0

-

4.3

8.0

-

-

-

--

-

1.3

1.3
0.5

65

-

-

65

2.0

-

-

2.0

-

--

mV

mV

10

mA
mA

-

0.5

-

dS

-

flVIVO

Vdc

17

-

-

17

-

-

0.2

-

2.2

-

-

A

-0.8

-

-

2.2

-

-0.8

-

mV/"C

rO

Short Circuit Current Limit (TA = +25"C)
Yin = 35 Vdc

ISC

-

Imax
TCVO

Peak Output Current (TJ = +25"C)

10

-

-

0.2

Output Resistance I = 1.0 kHz

Average Temperature Coefficient 01 Output Voltage

-

5.7

-

Loag.~~~I~t~n ~T{S ;,25"C, Note 2)

-

-

mIl
A

MC7806AC
ELECTRICAL CHARACTERICISTICS (Vin = 11 V, 10 = 1.0A, TJ =Tlowto Thigh [Note 1], unless otherwise noted.)
Symbol

Min

Typ

Max

Unit

Output Voltage (TJ = +25"C)

Characteristics

Vo

5.88

6.0

6.12

Vdc

Output Voltage
~5.0 mA '"
1.0 A, Po ",15 W)
.6 Vdc '" in '" 21 Vdc
Line Regulation (Note 2)
8.6 Vdc :S Yin :S 25 Vdc, 10 = 500 mA
9.0 Vdc '" Yin '" 13 Vdc
9.0 Vdc '" Yin '" 13 Vdc, TJ = +25"C
8.3 Vdc :S Yin '" 21 Vdc, TJ = +25"C

Vo

5.76

6.0

6.24

-

9.0
11
3.0
9.0

60
60
30
60

-

43
43

100
100

W. '"

Regline

Load Regulation (Note 2)
5.0 mA", 10 '" 1.5 A, TJ = +25"C
5.0 mA '" Ie '" 1.0 A
250 mA '" 0 '" 750 rnA, TJ = +25"C
250 mA '" 10 '" 750 rnA

Regload

Vdc

--

mV

mV

-

16

-

50

-

-

4.3

6.0
6.0

--

-

0.8
0.8
0.5

-

VI-VO

-

2.0

-

Vdc

Vn

-

10

-

flVIVO

Output Resistance (I = 1.0 kHz)

rO

-

17

-

mIl

Short Circuit Current Limit (TA = +25"C)
Vin = 35 Vdc

ISC

-

0.2

-

A

Imax

-

2.2
-0.8

-

mV/"C

Quiescent Current
TJ = +25"C

IS

Quiescent Current Chanile
9.0 Vdc '" Yin '" 25 V c'!p, = 500 rnA
8.6 Vdc '" Yin '" 21 Vdc, J = +25"C
5.0 rnA '" 10 '" 1.0 A
Ripple Rejection
9.0 Vdc '" Yin '" 19 Vdc, I = 120 Hz, TJ = +25"C
9.0 Vdc '" Yin '" 19 Vdc, I = 120 Hz, 10 = 500 rnA

diS

-

RR

Dropout Voltage (10 = 1.0 A, TJ = +25"C)
Output Noise Voltage (TA = +25"C)
10 Hz '" 1 '" 100 kHz

Peak Output Current (TJ = +25"C)
Average Temperature Coefficient 01 Output Voltage
NOTES:

-

TCVO

65

rnA
rnA

dS

A

1. Tlow = O"C lor MC78XXC, AC
Thigh= +125"Clor MC78XXC, AC, S
= -40"C lor MC78XXS
2. Load and line regulation are specilied at constant junction temperature. Changes in Vo due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-128

MC7800 Series
MC7808B, C
ELECTRICAL CHARACTERICISTICS (V in = 14V I0= 500 m A TJ= T low t a T high [Note 1] ,u nless otherwise noted)
MC7808B

MC7808C

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

Output Voltage (TJ = +25°C)

Vo

7.7

B.O

8.3

7.7

8.0

8.3

Vdc

Output Voltage
(5.0mA:;; I
(.)

f-

::>

2.0

r~

/J'r

c..

9

1.0

o

o

r-.....

\

0

;::
(.)

w

Ul 60

.::--

-;:::
~ ...... r-.....
1 - __
~ ::::;: ~
r-.
TJ = 125'C
'I
1
r- -.....;;;

7Jf

0

..........

TJ=25'C

f-

::>

z

TJ = -40'C

70

a:

- --

6.0
12
18
24
Vin-Vout' INPUT-OUPUT VOLTAGE DIFFERENTIAL M

~
c..
c..

c:
a:- 50
a:
40
4.0

30

II lillill
~~,'l~f'

ill
:2-

z

0

a:

~
c..
a..

Vin = 8.0 Vdc to 18 Vdc
Vout= 5.0V
10= 1.0A

!:3
§Z

!3
c..
!3

40

0_

o

a:
a:

6.00
5.90

100

1.0 k
t, FREQUENCY (Hz)

10 k

500

w 300
z 200
C§
w
c..
~ 100

(.)

-

f-

::>

0

N

Vin=11V
Vout = 6.0 V
10 = 20 rnA

--- ---

-50

-25

......

0
25
50
75
100 125
TJ, JUNCTION TEMPERATURE ('C)

6.0

==
==;=

50
30
20
10
4.0

;: t~r120 Hz
'-- 10 = 500 rnA
CL=OIlF

-

MC78XXC, AC, B

:<

.§. 4.0
fZ

-

W

a:
a:

::>

3.0

-

''1
I

w

(.)
CI)

2.0

w

::;

'"

20

150

175

-50

-- --

-

I---

-25
0
25
50
75
TJ, JUNCTION TEMPERATURE ('c)

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA
3-135

Vin = 10V
Vout-5.0V
In =20 rnA

......

1.0

-75

24

r-- ,-

Vin = 10V
Vout =5.0V
10 =5.0rnA

fZ

c:

12
16
VO, OUTPUT VOLTAGE M

MC78XX,A

(.)

o
8.0

24

Figure 8. Quiescent Current as a Function of
Temperature (MC78XXC, AC, B)

1000

f-

22

!
i

-75

100k

Figure 7. Output Impedance as a Function of
Output Voltage (MC78XXC, AC)

~

20

5.80

10

::>

10
12
14
16
18
Vo, OUTPUT VOLTAGE M

>
20

c..

-

~ 6.10

c:

~

8.0

--

6.20
~

Vin = 10V
VO=5V
10=20rnA

Ul

6.0

r--

10V
11 V
14 V
19V
23V
27V
33V

-

Figure 6. Output Voltage as a Function of
Junction Temperature (MC78XXC, AC, B)

60

t;
w

""""--Vin

PART #
MC7805C
MC7806C
MC7808C
MC7812C
MC7815C
MC7818C
MC7824C

Figure 5. Ripple Rejection as a Function of
Frequency (MC78XXC, AC)
80

t= 120 Hz
10=20 rnA
!Win = 1.0 V(RMS)

100

125

..

MC7800 Series
APPLICATIONS INFORMATION
Design Considerations
The MC7800 Series of fixed voltage regulators are
designed with Thermal Overload Protection that shuts down
the circuit when subjected to an excessive power overload
condition, Internal Short Circuit Protection that limits the
maximum current the circuit will pass, and Output Transistor
Safe-Area Compensation that reduces the output short circuit
current as the voltage across the pass transistor is increased.
In many low current applications, compensation capacitors
are not required. However, it is recommended that the
regulator input be bypassed with a capacitor if the regulator is
connected to the power supply filter with long wire lengths, or

if the output load capacitance is large. An input bypass
capacitor should be selected to provide good high-frequency
characteristics to insure stable operation under all load
conditions. A 0.33 IlF or larger tantalum, mylar, or other
capacitor having low internal impedance at high frequencies
should be chosen. The bypass capacitor should be mounted
with the shortest possible leads directly across the regulators
input terminals. Normally good construction techniques
should be used to minimize ground loops and lead resistance
drops since the regulator has no external sense lead.

Figure 10. Adjustable Output Regulator

Figure 9. Current Regulator

Input

~

~

MC7805

---?r---'

0.33~F I

Output
R
•

-

It

Constant
Current to
Grounded Load

The MC7800 regulators can also be used as a current source
when connected as above. In order to minimize dissipation the
MC7805C is chosen in this application. Resistor R determines
the current as follows:

1-0---'< 10k
MCI741G

10 = §.Y + IQ
R

VO,7.0Vt020V
VIN V02:2.0V

IQ '" 1.5 mA over line and load changes.

The addition of an operational amplifier allows adjustment to higher
or intermediate values while retaining regulation characteristics.
The minimum voltage obtainable with this arrangement is 2.0 V
greater than the regulator Voltage.

For example, a I A current source would require R to be a 5 D,
lOW resistor and the output voltage compliance would be the in·
put voltage less 7 V.

Figure 12. Short Circuit Protection

Figure 11. Current Boost Regulator

Input~MJ29550rEqUiV
R

1.0~F

~
MC78XX

l'

£

MJ2955
or Equiv.

Input

Output

l' 1.0~F

R

2N6049
or Equiv.

xx = 2 digtts of type number indicating voltage.
xx = 2 digits of type number indicating voltage.

The MC7800 series can be current boosted with a PNP
transistor. The MJ2955 provides current to 5.0 A. Resistor Rin
conjunction with the VBE olthe PNP determines when the pass
transistor begins conducting; this circuit is not short circuit
proof. Input·output differential voltage minimum is increased by
VBE of the pass transistor.

The circuit of Figure II can be modified to provide supply
protection against short circuits by adding a short circuit sense
resistor, Rse , and an additional PNPtransistor. Thecurrentsensing
PNP must be able to handle the short circutt current of the
three-terminal regulator. Therefore, a four·ampere plastic power
transistor is specified.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-136

MC78LOO,A
Series

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Three-Terminal Low Current
Positive Voltage Regulators

PSUFFIX
CASE 29

The MC78LOO Series of positive voltage regulators are inexpensive,
easy-to-use devices suitable for a multitude of applications that require a
regulated supply of up to 100 mAo Like their higher powered MC7800 and
MC78MOO Series cousins, these regulators feature internal current limiting and
thermal shutdown making them remarkably rugged. No external components are
required with the MC78LOO devices in many applications.
These devices offer a substantial performance advantage over the traditional
zener diode-resistor combination, as output impedance and quiescent current are
substantially reduced.

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SOP-8)

• Wide Range of Available, Fixed Output Voltages
• Low Cost
• Internal Short Circuit Current Limiting
PIN 1. Vout
2. GNO
3. GNO
4. NC

• Internal Thermal Overload Protection
• No External Components Required
• Complementary Negative Regulators Offered (MC79LOO Series)
• Available in Either ±5% (AC) or ±1 0% (C) Selections

Representative Current Schematic
Input

3.0

a

PIN 1. Output
2. GNO
3. Input

5. NC

6. GNO
7. GNO

8. Yin

SOP-8 is an internally modified SO-8 Package Pins
2, 3, 6, and 7 are electrically common to the die
attach flag. This internal lead frame modification
decreases package thermal resistance and
increases power dissipation capability when
appropriately mounted on a printed circuit board.
SOP·8 conforms to all external dimensions of the
standard SO-8 Package.

Output

Standard Application

0-2Sk

Input

®C78L.XX

CI*

J

0.331lF

Ground

CI is required if regulator is located an
appreciable distance from power supply filter.
-

ORDERING INFORMATION
Junction Temperature Range

MC78LXXACP

TJ

= 0' to +125°C

MC78LXXABO*
TJ
MC78LXXABP*

Plastic Power
Plastic Power

MC78LXXCP

= -40° to + 125°C

Co is not needed for stability; however, it
does improve transient response.

Package
SOP-8

MC78LXXACO*

CO**

Acommon ground is required between the input
and the output voltages. The input voltage must
remain typically 2.0 V above the output voltage
evenduringthelowpointontheinputripplevoltage.

2.8Sk

Device

Output

SOP-8
Plastic Power

XX indicates nominal voltage
*Available in 5, 8, 9,12 and 15 V devices.

Device No.
10%
MC78L05C
MC78L08C
MC78L09C
MC78L12C
MC78l15C
MC78L18C
MC78L24C

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-137

Device No.
5%
MC78L05AC
MC78L08AC
MC78L09AC
MC78L12AC
MC78l15AC
MC78L18AC
MC78L24AC

Nominal
Voltage
5.0
8.0
9.0
12
15
18
24

MC78LOO,A Series
MAXIMUM RATINGS (TA ~ +125°C, unless otherwise noted.)
Symbol
Rating
Input Voltage (2.6 V-B.O V)
VI
(12 V-1B V)
(24 V)
Storage Junction Temperature Range
Tstg
Operating Junction Temperature Range

Unit
Vdc

Value

30
35
40
-65 to +150

°C

oto +150

TJ

°C

MC78L05C, MC78L05AC ELECTRICAL CHARACTERICISTICS (VI ~ 10 V, 10 ~ 40 rnA, CI ~ 0.33 llF, Co ~ 0.1 llF,
O°C < TJ < + 125°C, unless otherwise noted.)
MC78L05C
MC78L05AC
Max
Min
Typ
Max
Characteristics
Symbol
Min
Typ
4.B
5.0
5.2
4.6
5.0
5.4
Output Voltage (TJ ~ +25°C)
Va
Line Regulation
Regline
(TJ ~ +25°C, 10 ~ 40 rnA)
55
150
55
200
7.0 Vdc '" VI'" 20 Vdc
150
45
100
45
B.O Vdc '" VI '" 20 Vdc
Load Regulation
Re9/oad
1.1
11
60
60
(TJ ~ +25°C, 1.0 rnA '" 10 '" 100 rnA)
5.0
30
5.0
30
(TJ ~ +25°C, 1.0 rnA '" 10 '" 40 rnA)
Output Voltage
Va
4.75
5.25
4.5
5.5
(7.0 Vdc '" VI '" 20 Vdc, 1.0 rnA", 10 '" 40 rnA)
4.75
5.5
4.5
5.25
(VI ~ 10 V, 1.0 rnA'" 10'" 70 rnA)
Input Bias Current
(TJ ~ +25°C)
(TJ ~ + 125°C)
Input Bias Current Change
(8.0 Vdc '" VI '" 20 Vdc)
(1.0 rnA", 10 '" 40 rnA)
Output Noise Voltage (TA ~ +25°C, 10Hz", f '"
100 kHz)
Ripple Rejection (10 ~ 40 rnA, f ~ 120 Hz,
8.0 Vdc '" VI '" 18 V, TJ ~ +25°C)
DroRout Voltage
TJ ~ +25°C)

-

6.0
5.5

-

3.8
-

6.0
5.5

1.5
0.1

-

-

1.5
0.2

-

3.B

-

-

Ripple Rejection (/0 ~ 40 rnA, f - 120 Hz,
12 V '" VI '" 23 V, TJ ~ +25°C)
Dropout Voltage
(TJ ~ +25°C)

Vdc

rnA

-

-

Vn

-

40

-

-

40

-

llV

RR

41

49

-

40

49

-

dB

VI-Va

-

1.7

-

-

1.7

-

Vdc

MC78L08C, MC78L08AC ELECTRICAL CHARACTERICISTICS (VI ~ 14 V, 10 ~ 40 rnA, CI ~ 0.33 llF, Co ~ 0.1 llF,
O°C < TJ < + 125°C, unless otherwise noted.)
MC78L08AC
MC78L08C
Symbol
Min
Typ
Max
Min
Typ
Max
Characteristics
7.7
8.0
8.3
7.36
B.O
8.64
Output Voltage (TJ ~ +25°C)
Va
Line Regulation
Regline
(TJ ~ +25°C, 10 ~ 40 rnA)
175
20
200
20
10.5 Vdc '" VI '" 23 Vdc
150
12
125
12
11 Vdc '" VI '" 23 Vdc
Load Regulation
Re9/oad
15
80
15
80
(TJ ~ +25°C, 1.0 rnA", 10'" 100 rnA)
40
8.0
40
6.0
(TJ ~ +25°C, 1.0 rnA", 10'" 40 rnA)
Output Voltage
(10.5 Vdc '" VI '" 23 Vdc, 1.0 rnA '" 10 ",40 rnA)
(V I ~ 14 V, 1.0 rnA '" 10 '" 70 rnA)
Input Bias Current
(TJ ~ +25°C)
(TJ ~ +125°C)
Input Bias Current Change
(11 Vdc '" VI '" 23 Vdc)
(1.0 rnA", 10 '" 40 rnA)
Output Noise Voltage (TA ~ +25°C, 10Hz", f '"
100 kHz)

mV

rnA

liB

~IIB

Unit
Vdc
mV

mV

Vdc

Va
8.4
8.4

7.2
7.2

-

8.B
8.B

-

3.0

-

6.0
5.5

6.0
5.5

-

1.5
0.1

-

-

-

-

1.5
0.2

Vn

-

60

-

-

52

-

RR

37

57

-

36

55

-

1.7

-

-

1.7

7.6
7.6

-

-

3.0

-

rnA

liB

-

~IIB

VI-Va

Unit
Vdc
mV

rnA

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-138

llV

dB

-

Vdc

MC78LOO,A Series
MC78L09C, MC78L09AC ELECTRICAL CHARACTERICISTICS (VI ~ 15 V, 10 ~ 40 rnA, CI ~ 0.33 ~F, Co ~ 0.1 ~F,
O°C < TJ < +125°C, unless otherwise noted.)
MC78L09AC
Characteristics
Output Voltage (TJ

~

+25°C)

Min

Typ

Max

Min

Typ

Max

Unit

Vo

8.6

9.0

9.4

8.3

9.0

9.7

Vdc

Line Regulation
(TJ ~ +25°C, 10 ~ 40 rnA)
11.5 Vdc $ VI $ 24 Vdc
12Vdc$VI$24Vdc

Regline

Load Regulation
(TJ ~ +25°C, 1.0 rnA $10 $100 rnA)
(TJ ~ +25°C, 1.0 rnA $ 10 $ 40 rnA)

Regload

200
150
90
40

8.5
8.5

-

9.5
9.5

8.1
8.1

-

-

9.9
9.9

-

3.0

-

3.0

-

6.0
5.5

-

-

6.0
5.5

-

1.5
0.1

1.5
0.2

60

-

-

-

Vn

-

52

-

~V

RR

37

57

-

36

55

-

dB

-

1.7

-

-

1.7

-

Vdc

Vdc

rnA

rnA

VI-VO

~ 19 V, 10 ~ 40 rnA, CI ~ 0.33 ~F, Co ~ 0.1 ~F,
O°C < TJ < + 125°C, unless otherwise noted.)

MC78L12C, MC78L12AC ELECTRICAL CHARACTERICISTICS (VI

MC78L12AC

MC78L12C

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

Output Voltage (TJ ~ +25°C)

Vo

11.5

12

12.5

11.1

12

12.9

Vdc

Line Regulation
(TJ ~ +25°C, 10 ~ 40 rnA)
14.5 Vdc $ VI $ 27 Vdc
16 Vdc$ VI $ 27 Vdc

Regline

Load Regulation
(TJ ~ +25°C, 1.0 rnA $ 10 $ 100 rnA)
(TJ ~ +25°C, 1.0 rnA $10 $ 40 rnA)

Regload

Characteristics

Vo

Input Bias Current
(TJ ~ +25°C)
(TJ ~ +125°C)

liB

Input Bias Current Change
(16 Vdc $ VI $ 27 Vdc)
(1.0 mA $10 $40 rnA)
Output Noise Voltage (TA
100 kHz)

~

-

120
100

250
200

-

120
100

250
200

-

20
10

100
50

-

20
10

100
50

-

12.6
12.6

-

13.2
13.2

-

4.2

-

6.5
6.0

-

4.2
-

6.5
6.0

-

-

1.5
0.1

-

1.5
0.2

80

-

-

80

-

~V

rnV

Vdc
11.4
11.4

+25°C, 10Hz $ f $

10.8
10.8

rnA

rnA

"'lIB

Ripple Rejection (10 ~ 40 rnA, f ~ 120 Hz, 15 V $
VI $ 25 V, TJ ~ +25°C)
Dropout Voltage
(TJ ~ +25°C)

rnV

-

Output Voltage
(14.5 Vdc $ VI $ 27 Vdc, 1.0 rnA $ 10 $ 40 rnA)
(VI ~ 19 V, 1.0 rnA $ 10 $ 70 rnA)

Vn

-

RR

37

42

-

36

42

-

dB

-

1.7

-

-

1.7

-

Vdc

VI-VO

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-139

..
I

rnV
15
6.0

"'liB

Dropout Voltage
(TJ ~ +25°C)

20
12

-

liB

Ripple Rejection (10 ~ 40 rnA, f ~ 120 Hz,
13 V $VI $24 V, TJ ~ +25°C)

-

90
40

Input Bias Current
(TJ ~ +25°C)
(TJ ~+125°C)

+25°C,

175
125

15
8.0

Vo

~

20
12

-

Output Voltage
(11.5 Vdc $ VI $ 24 Vdc, 1.0 rnA $ 10 $ 40 rnA)
(VI ~ 15 V, 1.0 rnA $ 10 $ 70 rnA)

Output Noise Voltage (TA
10Hz $ f $ 100 kHz)

rnV

-

Input Bias Current Change
(11 Vdc $ VI $ 23 Vdc)
(1.0 rnA $10 $40 rnA)

MC78L09C

Symbol

MC78LOO,A Series
MC78L 15C, MC7BL 15AC ELECTRICAL CHARACTERICISTICS (VI = 23 V, 10 = 40 rnA, CI = 0.33 IiF, Co = 0.1 IiF,
O'C < TJ < + 125'C, unless otherwise noted.)
MC78L15C

MC78L15AC
Characteristics
Output Voltage (TJ

lEI

= +25'C)

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

Vo

14.4

15

15.6

13.8

15

16.2

Vdc

Line Regulation
(TJ = +25'C, 10 = 40 rnA)
17.5 Vdc,; VI'; 30 Vdc
20 Vdc ,; VI ,; 30 Vdc

Regline

Load Regulation
(TJ = +25'C, 1.0 rnA,; 10'; 100 rnA)
(TJ = +25'C, 1.0 rnA,; 10'; 40 rnA)

Regload

Output Voltage
(17.5 Vdc'; VI'; 30 Vdc, 1.0 rnA,; 10'; 40 rnA)
(VI = 23 V, 1.0 rnA ,; 10 ,; 70 rnA)

Vo

Input Bias Current
(TJ = +25'C)
(TJ = + 125'C)

liB

Input Bias Current Change
(20 Vdc'; VI ,; 30 Vdc)
(1.0 rnA,; 10 ,; 40 rnA)
Output Noise Voltage (TA
100 kHz)

-

130
110

300
250

-

130
110

300
250

-

25
12

150
75

-

25
12

150
75

-

16.5
16.5

rnV

Vdc
14.25
14.25

-

15.75
15.75

= 120 Hz,

18.5 V

Dropout Voltage
(TJ = +25'C)

4.4

-

Vn

-

RR
VI-VO

13.5
13.5

rnA

-

-

4.4

-

6.5
6.0

-

6.5
6.0

-

1.5
0.1

-

1.5
0.2

90

-

-

90

-

IiV

34

39

-

33

39

-

dB

-

1.7

-

-

1.7

-

Vdc

rnA

I'.IIB

= +25'C, 10Hz'; f,;

Ripple Rejection (10 = 40 rnA, f
,; VI ,; 28.5 V, TJ = +25'C)

rnV

MC7BL1 BC, MC7BL 1 BAC ELECTRICAL CHARACTERICISTICS (VI = 27 V, 10 = 40 rnA, CI = 0.33 IiF, Co = 0.1 IiF,
O'C < T J < + 125'C, unless otherwise noted.)
MC78L18C

MC78L18AC
Characteristics
Output Voltage (TJ

= +25'C)

Line Regulation
(TJ = +25'C, 10 = 40 rnA)
21.4 Vdc ,; VI ,; 33 Vdc
20.7 Vdc,; VI'; 33 Vdc
22 Vdc'; VI ,; 33 Vdc
21 Vdc'; VI ,; 33 Vdc

Max

Min

Typ

Max

Unit

Vo

17.3

18

18.7

16.6

18

19.4

Vdc

-

45

325

32

325

rnV

-

35

275

27

275

-

30
15

170
85

30
15

170
85

16.2

-

19.8

16.2

-

19.8

-

3.1

-

6.5
6.0

-

-

1.5

-

-

rnV

Regload

rnA,; 10'; 40 rnA)
rnA,; 10'; 40 rnA)
rnA)
rnA)

-

Vdc
17.1

-

18.9

17.1

-

18.9

-

3.1

6.5
6.0

rnA

liB

Input Bias Current Change
(22 Vdc'; VI ,; 33 Vdc)
(21 Vdc'; VI ,; 33 Vdc)
(1.0 rnA,; 10 ,;40 rnA)

= +25'C,

-

rnA

I'.IIB

10Hz'; f,;

Ripple Rejection (10 = 40 rnA, f = 120 Hz,
23 V ,;VI ,;33 V, TJ = +25'C)
Dropout Voltage
(TJ = +25'C)

Typ

Vo

Input Bias Current
(TJ = +25'C)
(TJ = +125'C)

Output Noise Voltage (TA
100 kHz)

Min

Regline

Load Regulation
(TJ = +25'C, 1.0 rnA,; 10'; 100 rnA)
(TJ = +25'C, 1.0 rnA,; 10'; 40 rnA)
Output Voltage
(21.4 Vdc,; VI ,; 33 Vdc, 1.0
(20.7 Vdc,; VI'; 33 Vdc, 1.0
(VI = 27 V, 1.0 rnA ,; 10 ,; 70
(VI = 27 V, 1.0 rnA,; 10'; 70

Symbol

-

1.5
0.1

0.2

150

-

-

-

Vn

-

150

-

IiV

RR

33

48

-

32

46

-

dB

-

1.7

-

-

1.7

-

Vdc

VI-VO

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-140

MC78LOO,A Series
MC78L24C, MC78L24AC ELECTRICAL CHARACTERICISTICS (VI = 33 V, 10 = 40 rnA, CI = 0.33 IiF, Co = 0.1 IiF,
O°C < TJ < + 125°C, unless otherwise noted.)
MC78L24C

MC78L24AC
Characteristics

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

Output Voltage (TJ = +25'C)

Vo

23

24

25

22.1

24

25.9

Vdc

Line Regulation
(TJ = +25'C, 10 = 40 rnA)
27.5 Vdc ~ VI ~ 38 Vdc
28 Vdc ~ VI ~80 Vdc
27 Vdc ~ VI ~ 38 Vdc

Regline

Load Regulation
(TJ = +25'C, 1.0 rnA ~ 10 ~ 100 rnA)
(TJ = +25'C, 1.0 rnA ~ 10 ~ 40 rnA)

Re9load

Output Voltage
(28 Vdc ~ VI ~ 38 Vdc, 1.0 rnA ~ 10 ~ 40
(27 Vdc ~ VI ~38 Vdc, 1.0 rnA ~ 10 ~40
(28 Vdc ~VI = 33 Vdc, 1.0 rnA ~ 10 ~ 70
(27 Vdc ~ VI ~ 33 Vdc, 1.0 rnA ~ 10 ~ 70

-

50
60

-

300
350

-

-

-

-

40
20

200
100

-

35
30

350
300

-

-

40
20

200
100

21.6

-

26.4

21.6

-

26.4

3.1
-

6.5
6.0

Vdc
22.8

-

25.2

22.8

-

25.2

-

3.1

-

-

6.5
6.0

-

-

1.5
0.1

-

-

-

1.5
0.2

Vn

-

200

-

-

200

-

IiV

RR

31

45

-

30

43

-

dB

VI-VO

-

1.7

-

-

1.7

-

Vdc

rnA

liB

Input Bias Current Change
(28 Vdc ~ VI ~ 38 Vdc)
(1.0 mA~ 10 ~40 rnA)

-

rnA

611B

Output Noise Voltage (TA = +25'C, 10Hz ~
f ~ 100 kHz)
Ripple Rejection (10 = 40 rnA, f = 120 Hz, 29 V
VI ~ 35 V, TJ = +25'C)

~

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-141

..
I

mV

Vo
rnA)
rnA)
rnA)
rnA)

Input Bias Current
(TJ = +25'C)
(TJ = +125'C)

Dropout Voltage
(TJ = +25'C)

mV

MC78l00,A Series
Figure 2. Dropout Voltage versus
Junction Temperature

Figure 1. Dropout Characteristics
~
w 2.5

B.O

~

MciBL05J
Vout= 5.0V
TJ = 25'C

~
w 6.0

C!J

0

> 2.0
-'
ex:

>=
z

~

~

5
15
o

I

C!J

10=1.0mA
4.0

A

~K

l'

10=40~

02.0

w
a: 1.5

~

I

>

o
o

I
2.0

4.0
6.0
VI, INPUT VOLTAGE M

I~
I-

'"\

w
u..
u..

10=100mA

8.0

10

5.0

~

j::' 4.0
z
w
a:
a:
:::> 3.0
(,)

r-

a 3.6
~

-~

..........
...........

5'" 34.

='" ::!';r3.0

o
o

5'"

..........

VO= 5.0V
10 = 40 rnA
25

If

...-

-- -I---

MC78L05C
Vout=5.0V
10=40rnA
TJ = 25'C

~

..........

f-- MC7BL05C
f-- VI=10V

50
75
100
TA, AMBIENT TEMPERATURE ('G)

r--.

2.0

D-

~

£ii

'"

1.0

o
o

125

5.0

10

15
20
25
VI, INPUT VOLTAGE M

Figure 5. Maximum Average Power Dissipation versus
Ambient Temperature - TO-92 Type Package
10,000

§'
§.

z

No Heat Sink

0

1000

~

u;

'"Ca:

r-...

w

;::

......

100

0

D-

o

D-

125

Figure 4. Input Bias Current
versus Input Voltage

4.2

~ 3.2

/

C
r- 1.0 I - 10=40 rnA
:::>
I
I
D10=1.0mA
r:::>
Dropout of Regulation is
0 0.5
;:=
defined as when
:::>
DVo =2% ofVO
~
I
I
I
I
o
0
25
50
75
100
~
0
TJ, JUNCTION TEMPERATURE ('C)
>

Figure 3. Input Bias Current versus
Ambient Temperature

~>O ~
r---...
aJ 3.8
a:
..........
a:

1

10 = 70 rnA

RaJA 200'C/W
PD(rnax) to 25'C = 625 mW
i
I
II
10
25
50
75
100
125
TA, AMBIENTTEMPERATURE ('G)

"

150

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-142

30

35

40

MC78LOO,A Series
APPLICATIONS INFORMATION
Design Considerations
The MC78LOO Series of fixed voltage regulators are
designed with Thermal Overload Protection that shuts down
the circuit when subjected to an excessive power overload
condition. Internal Short Circuit Protection limits the maximum
current the circuit will pass.
In many low current applications, compensation capacitors
are not required. However, it is recommended that the
regulator input be bypassed with a capacitor if the regulator is
connected to the power supply filter with long wire lengths, or
if the output load capacitance is large. The input bypass

Figure 7. ± 15 V Tracking Voltage Regulator

Figure 6. Current Regulator

Input

~

0.33i1F

capacitor should be selected to provide good high-frequency
characteristics to insure stable operation under all load
conditions. A 0.33 !!F or larger tantalum, mylar, or other
capacitor having low internal impedance at high frequencies
should be chosen.The bypass capacitor should be mounted
with the shortest possible leads directly across the regulators
input terminals. Good construction techniques should be used
to minimize ground loops and lead resistance drops since the
regular has no external sense lead. Bypassing the output is
also recommended.

1MC78t~~.---------~+Vo

~

MC78L05

r --'?--

10k

2
R

It

III

Constant
Currentto
Grounded load
10k

The MC78LOO regulators can also be used as a current source
when connected as above. In order to minimize dissipation the
MC78L05C is chosen in this application. Resistor Rdetermines
the current as follows:

20V

'-'VV'....-1~---___......-O

-VO

10 = ..§,!LV + IB

R

Figure 8. Positive and Negative Regulator

liB = 3.8 rnA over line and load changes

+VI o--.......-o-lliir.7iimkr---...._----o +VO
0.33i1F

For example, a 100 rnA current source would require R to be a
50 D, 1/2 W resistor and the output voltage compliance would be
the input voltage less 7 V.

r

O. l1lF

'-iI~--o

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-143

-Vo

..
I

MOTOROLA

MC78MOO
Series

SEMICONDUCTOR-----TECHNICAL DATA

Three-Terminal Medium Current
Positive Voltage Regulators

THREE·TERMINAL MEDIUM
CURRENT POSITIVE FIXED
VOLTAGE REGULATORS

The MC78MOO Series positive voltage regulators are identical to the popular
MC7800 Series devices, except that they are specified for only half the output
current. Like the MC7800 devices, the MC78MOO three-terminal regulators are
intended for local, on-card voltage regulation.
Internal current limiting, thermal shutdown circuitry and safe-area
compensation for the internal pass transistor combine to make these devices
remarkably rugged under most operating conditions. Maximum output current,
with adequate heatsinking is 500 mAo
• No External Components Required
• Internal Thermal Overload Protection
• Internal Short Circuit Current Limiting
• Output Transistor Safe-Area Compensation

TSUFFIX
PLASTIC PACKAGE
CASE 221A

(All 3 Plaslic Types)
Pin 1. Input
2. Ground
3. Output
Heatsink surface connected to Pin 2

Equivalent Schematic Diagram

1.0k

J

1.0k
210

~l
U~O ~

1.0k

~>6.4
k

-

5.6k

~

~~

10~

l20;

r--

3.6

H:::

,

Input

~~tl
6.7
V 16k
~

rC

J

6.0k

y

Q:
m
~FT

~

LL

r@"~

3

.....

DTSUFFIX
PLASTIC PACKAGE
CASE 369A
(DPAK)

300
13 0.24

50

200

Outpul
~~

ORDERING INFORMATION

'"

3.9k

2.0k

t::;-]

If P
6k

}'

12.~

Gnd

Device
MC78MXXCDT'
MC78MXXCDT-l'

MC78M12B,C 12V
MC78M15B,C 15 V
MC78M18B,C 18 V

MC78M20B,C 20 V
MC78M24B,C 24 V

TJ = 0° to +125°C
TJ = -40° to + 125°C

Package
DPAK
Plastic
Power

XX Indicates nominal voltage.
,
Available in 5, 8, 12 and 15 V devices.
# Automotivetemperature range selections are
available with special test conditions and
additional tests in 5, 8, 12 and 15 V devices.
Contact your local Motorola sales office for
information.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-144

Tested Operating
Junction
Temp. Range

MC78MXXCT
MC78MXXBT#

TYPE NO.NOLTAGE
MC78M05B,C 5.0 V
MC78M06B,C 6.0 V
MC78M08B,C 8.0 V

DT-1 SUFFIX
PLASTIC PACKAGE
CASE 369
(DPAK)

MC78MOO Series
MAXIMUM RATINGS (TA = +25'C, unless otherwise noted.)
Symbol

Value

Unit

VI

35
40

Vdc

Power Dissipation (Package Limitation)
Plastic Package, T Suffix
TA = 25'C
Derate above TA = 25'C
TC = 25'C
Derate above TC = 11 O'C

PD
8JA
PD
8JC

Internally Limited
70
Internally Limited
5.0

'C/W

Operating Junction Temperature Range

TJ

+150

Tstg

-65 to +150

'c
'c

Rating
Input Voltage

(5.0 V-18 V)
(20 V-24V)

Storage Temperature Range

MC78M05B,C ELECTRICAL CHARACTERICISTICS (VI

= 10 V, 10 = 350 rnA, O'C < TJ < + 125'C, PD '" 5.0 W, unless otherwise noted.)

Characteristics
Output Voltage (TJ

'C/W

= +25'C)

Symbol

Min

Typ

Max

Unit

Vo

4.8

5.0

5.2

Vdc

-

3.0

50

mV

-

20
10

100
50

-

5.25

3.2

6.0

Line Regulation
(TJ = +25'C, 7.0 Vdc '" VI'" 25 Vdc, 10 = 200 mAl

Regline

Load Regulation
(TJ = +25'C, 5.0 rnA '" 10 '" 500 rnA)
(TJ = +25'C, 5.0 rnA", 10 ,; 200 rnA)

Regload

Output Voltage
(7.0 Vdc '" VI'" 25 Vdc, 5.0 mA '" 10 '" 200 mAl
(7.0 Vdc '" VI'; 20 Vdc, 5.0 rnA", 10 '" 350 rnA)
Input Bias Current (TJ

Vo

= +25'C)

Quiescent Current Change
(8.0 Vdc '" VI '" 25 Vdc, 10
(5.0 rnA'" 10 ,; 350 rnA)
Output Noise Voltage (TA

liB

4.75

-

-

-

0.8
0.5

-

40

-

62
62

80

-

VI-Va

-

2.0

-

= 200 rnA)

= +25'C,

10Hz", 1'" 100 kHz)

Vn
RR

= 25'C)

Dropout Voltage
(TJ = +25'C)

= +25'C, VI = 35 V)

Average Temperature Coefficient 01 Output Voltage
(10 = 5.0 rnA)
Peak Output Current
(TJ = +25'C)

rnA

~V

dB

Vdc

lOS

-

50

-

mA

AVO/AT

-

±D.2

-

mV/'C

10

-

700

-

mA

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-145

Vdc

mA

AIIB

Ripple Rejection (T, DT and DT-1 suffixes only)
(10 = 100 rnA, 1= 120 Hz, 8.0V"'VI '" 18 V)
(10 = 300 rnA, 1= 120 Hz, 8.0'; VI '" 18 V, TJ

Short Circuit Current Limit (TJ

mV

MC78MOO Series
MC78M06C ELECTRICAL CHARACTERICISTICS (VI = 11 V, 10 = 350 rnA, O°C < TJ < +125°C, PD :s; 5.0 W, unless otherwise noted.)
Symbol

Min

Typ

Max

Unit

Vo

5.75

6.0

6.25

Vdc

-

5.0

50

mV

-

20
10

120
60

Vo

5.7

-

6.3

Vdc

liB

-

3.2

6.0

rnA

-

-

-

0.8
0.5

-

45

-

59
59

80

-

VI-VO

-

2.0

-

Vdc

Short Circuit Current Limit (TJ = +25°C, VI = 35 V)

lOS

-

50

Average Temperature Coefficient 01 Output Voltage
(10=5.0 rnA)

.iVoJ.iT

-

±0.2

-

mV/oC

10

-

700

-

rnA

Characteristics
Output Voltage (TJ = +25°C)
Line Regulation
(TJ = +25°C, 8.0 Vdc:S; VI:S; 25 Vdc, 10 = 200 rnA)

Regline

Load Regulation
(TJ = +25°C, 5.0 mA:s; 10:S; 500 rnA)
(TJ = +25°C, 5.0 mA:s; 10:S; 200 rnA)

Regload

Output Voltage
(8.0 Vdc:S; VI :s; 25 Vdc, 5.0 mA:s; 10:S; 200 rnA)
(8.0 Vdc:s; VI :s; 21 Vdc, 5.0 mA:s; 10 :s; 350 rnA)
Input Bias Current (TJ = +25°C)
Quiescent Current Change
(9.0 Vdc:S; VI :s; 25 Vdc, 10 = 200 rnA)
(5.0 rnA :s; 10 :s; 350 rnA)

mV

rnA

.iIIB

Output Noise Voltage (TA = +25°C, 10Hz:s; 1:s; 100 kHz)

Vn

Ripple Rejection (T suffix only)
(10 = 100 rnA, 1= 120 Hz, 9.0 V :s; VI :s; 19 V)
(10 = 300 rnA, 1= 120 Hz, 9.0 V :S;VI:S; 19 V, TJ = 25°C)

RR

Dropout Voltage
(TJ = +25°C)

Peak Output Current
(TJ = 25°C)

I1V
dB

rnA

MC78M08B,C ELECTRICAL CHARACTERICISTICS (VI = 14 V, 10 = 350 rnA, O°C < TJ < +125°C, PD :s; 5.0 W, unless otherwise noted.)
Characteristics

Symbol

Min

Typ

Max

Unit

Vo

7.7

8.0

8.3

Vdc

Line Regulation
(TJ = +25°C, 10.5 Vdc :s; VI :s; 25 Vdc, 10 = 200 rnA)

Regline

-

6.0

50

mV

Load Regulation
(TJ = +25°C, 5.0 rnA :s; 10 :s; 500 rnA)
(TJ = +25°C, 5.0 rnA :s; 10 :s; 200 rnA)

Regload

-

25
10

160
80

Vo

7.6

-

8.4

Vdc

liB

-

3.2

6.0

rnA

-

-

0.8
0.5

-

52

-

56
56

80

-

VI-VO

-

2.0

-

Short Circuit Current Limit (TJ = +25°C, VI = 35 V)

lOS

-

50

-

rnA

Average Temperature Coefficient 01 Output Voltage
(10=5.0 rnA)

.iVoJ.iT

-

±0.2

-

mV/oC

10

-

700

-

rnA

Output Voltage (TJ = +25°C)

Output Voltage
(10.5 Vdc :s; VI :s; 25 Vdc, 5.0 mA:s; 10 :s; 200 rnA)
(10.5 Vdc:s; VI :s; 23 Vdc, 5.0 mA:s; 10:S; 350 rnA)
Input Bias Current (TJ = +25°C)
Quiescent Current Change
(10.5 Vdc:S; VI :s; 25 Vdc, 10 = 200 rnA)
(5.0 rnA :s; 10 :s; 350 rnA)

mV

rnA

.iIIB

Output Noise Voltage (TA = +25°C, 10Hz:S; 1:s; 100 kHz)

Vn

Ripple Rejection (T suffix only)
(10 = 100 rnA, 1= 120 Hz, 11.5 V:5V1 :s; 21.5 V)
(10 = 300 rnA, 1= 120 Hz, 11.5 V :5V1 :s; 21.5 V, TJ = 25°C)

RR

Dropout Voltage
(TJ = +25°C)

Peak Output Current
(TJ = 25°C)

dB

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-146

I1V

Vdc

MC78MOO Series
MC78M12B,C ELECTRICAL CHARACTERICISTICS (VI = 19 V, 10 = 350 rnA, O°C < TJ < + 125°C, Po " 5.0 W, unless otherwise noted.)
Characteristics
Output Voltage (TJ = +25°C)

Symbol

Min

Typ

Max

Unit

Vo

11.5

12

12.5

Vdc

8.0

50

mV

25
10

240
120

-

12.6

Vdc
rnA

Line Regulation
(TJ = +25°C, 14.5 Vdc S VI ,,30 Vdc, 10 = 200 rnA)

Regline

Load Regulation
(TJ = +25°C, 5.0 rnA" 10" 500 rnA)
(TJ = +25°C, 5.0 rnA" 10" 200 rnA)

Re9l0ad

-

-

Output Voltage
(14.5 Vdc" VI" 27 Vdc, 5.0 rnA" 10" 350 rnA)
Input Bias Current (TJ = +25°C)
Quiescent Current Change
(14.5 Vdc " VI " 30 Vdc, 10 = 200 rnA)
(5.0 rnA " 10 " 350 rnA)

mV

Vo

11.4

liB

-

3.2

6.0

-

-

0.8
0.5

-

75

-

55
55

-

rnA

ailB

Output Noise Voltage (TA = +25°C, 10Hz" 1 " 100 kHz)

Vn

Ripple Rejection (T, DT and DT-1 suffixes only)
(IO = 100 rnA, 1 = 120 Hz, 15 V "VI ,,25 V)
(IO = 300 rnA, 1 = 120 Hz, 15 V "VI" 25 V, TJ = 25°C)

RR

Dropout Voltage
(TJ = +25°C)

VI-VO

j.LV
dB

80

-

-

2.0

-

Vdc

Short Circuit Current Limit (TJ = +25°C, VI = 35 V)

lOS

-

rnA

aVo/aT

-

50

Average Temperature Coefficient 01 Output Voltage
(10=5.0mA)

±O.3

-

mV/oC

10

-

700

-

rnA

Peak Output Current
(TJ = 25°C)

MC78M15B,C ELECTRICAL CHARACTERICISTICS (VI = 23 V, 10 = 350 rnA, O°C < TJ < + 125°C, PO" 5.0 W, unless otherwise noted.)
Characteristics
Output Voltage (TJ = +25°C)

Symbol

Min

Typ

Max

Unit

Vo

14.4

15

15.6

Vdc

-

10

50

mV

-

25
10

300
150

-

15.75

Vdc

-

3.2

6.0

rnA

-

-

0.8
0.5

-

90

-

Input Regulation
(TJ = +25°C, 17.5 Vdc" VI" 30 Vdc, 10 = 200 rnA)

Regline

Load Regulation
(TJ = +25°C, 5.0 rnA " 10 " 500 rnA)
(TJ = +25°C, 5.0 rnA " 10 " 200 rnA)

Regload

Output Voltage
(17.5 Vdc" VI ,,30 Vdc, 5.0 rnA" 10 ,,350 rnA)

Vo

Input Bias Current (TJ = +25°C)

liB

Quiescent Current Change
(17.5 Vdc" VI" 30 Vdc,IO = 200 rnA)
(5.0 rnA " 10 " 350 rnA)

ailB

Output Noise Voltage (TA = +25°C, 10Hz" 1 " 100 kHz)

Vn

Ripple Rejection (T, DT and DT-1 suffixes only)
(Io = 100 rnA, 1 = 120 Hz, 18.5 V "VI" 28.5 V)
(IO = 300 rnA, 1 = 120 Hz, 18.5 V "VI" 28.5 V, TJ = 25°C)

RR

mV

14.25

54
54

rnA

-

-

70

-

2.0

-

j.LV
dB

VI-VO

-

Short Circuit Current Limit (TJ = +25°C, VI = 35 V)

lOS

-

50

-

rnA

Average Temperature Coefficient 01 Output Voltage
(I0= 5.0 rnA)

aVo/aT

-

±0.3

-

mV/oC

10

-

700

-

rnA

Dropout Voltage
(TJ = +25°C)

Peak Output Current
(TJ = 25°C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-147

Vdc

..

MC78MOO Series
MC78M18C ELECTRICAL CHARACTERICISTICS (VI = 27 V, 10 = 350 rnA, O°C < TJ < +125°C, PD S 5.0 W, unless otherwise noted.)
Characteristics
Output Voltage (TJ = +25°C)

Symbol

Min

Typ

Max

Unit

Vo

17.3

18

18.7

Vdc

-

10

50

rnV

-

30
10

360
180

-

18.9

Vdc

-

3.2

6.5

rnA

-

-

-

-

0.8
0.5

-

100

-

53
53

-

70

-

-

2.0

-

Vdc

Line Regulation
(TJ = +25°C, 21 Vdc S VI S 33 Vdc, 10 = 200 rnA)

Regline

Load Regulation
(TJ = +25°C, 5.0 rnA S 10 S 500 rnA)
(TJ = +25°C, 5.0 rnA S 10 S 200 rnA)

ReQload

Output Voltage
(21 Vdc S VI S 33 Vdc, 5.0 rnA S 10 S 350 rnA)

Vo

Input Bias Current (TJ = +25°C)

liB

Quiescent Current Change
(21 Vdc S VI S 33 Vdc, 10 = 200 rnA)
(5.0 rnA S 10 S 350 rnA)

dilB

Output Noise Voltage (TA = +25°C, 10Hz sIS 100 kHz)

Vn

Ripple Rejection (T suffix only)
(10 = 100 rnA, 1 = 120 Hz, 22 V S VI S 32 V)
(10 = 300 rnA, 1 = 120 Hz, 22 V SVI S32 V, TJ = 25°C)

RR

Dropout Voltage
(TJ = +25°C)

VI-VO

rnV

17.1

rnA

I1V
dB

Short Circuit Current Limit (TJ = +25°C, VI = 35 V)

lOS

-

50

Average Temperature Coefficient 01 Output Voltage
(10=5.0 rnA)

dVO/dT

-

±O.3

-

rnVfOC

10

-

700

-

rnA

Peak Output Current
(TJ = 25°C)

rnA

MC78M20C ELECTRICAL CHARACTERICISTICS (VI = 29 V, 10 = 350 rnA, O°C < TJ < +125°C, PD S 5.0 W, unless otherwise noted.)
Symbol

Min

Typ

Max

Unit

Vo

19.2

20

20.8

Vdc

Line Regulation
(TJ = +25°C, 23 Vdc S VI S 35 Vdc, 10 = 200 rnA)

Regline

-

10

50

rnV

Load Regulation
(TJ = +25°C, 5.0 rnA S 10 S 500 rnA)
(TJ = +25°C, 5.0 rnA S 10 S 200 rnA)

Regload

-

30
10

400
200

Vo

19

-

21

liB

-

3.2

6.5

Characteristics
Output Voltage (TJ = +25°C)

Output Voltage
(23 Vdc S VI S 35 Vdc, 5.0 rnA S 10 S 350 rnA)
Input Bias Current (TJ = +25°C)
Quiescent Current Change
(23 Vdc S VI S 35 Vdc, 10 = 200 rnA)
(5.0 rnA S 10 S 350 rnA)

rnV

Vdc
rnA
rnA

dilB

-

-

-

0.8
0.5

-

110

-

52
52

-

-

70

-

VI-VO

-

2.0

-

Short Circuit Current Limit (TJ = +25°C, VI = 35 V)

lOS

-

50

-

rnA

Average Temperature Coefficient 01 Output Voltage
(10=5.0 rnA)

dVQldT

-

±0.5

-

rnV/oC

10

-

700

-

rnA

Output Noise Voltage (TA = +25°C, 10Hz sIs 100 kHz)

Vn

Ripple Rejection (T suffix only)
(10 = 100 rnA, 1 = 120 Hz, 24 V S VI S 34 V)
(10 = 300 rnA, f = 120 Hz, 24 V S VI S 34 V, TJ = 25°C)

RR

Dropout Voltage
(TJ = +25°C)

Peak Output Current
(TJ = 25°C)

dB

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-148

I1V

Vdc

MC78MOO Series
MC78M24C ELECTRICAL CHARACTERICISTICS (VI = 33 V, 10 = 3S0 rnA, O°C 

...... ~
35

o
o

40

:z

80

~

f

w

lout = 1.5 A
Vout = 5.0V
Vin = 10V
Co=O
TJ = 25'C

U3 60
a:

w
....J

0..
0..

40

I

25

_L
50
75
100
125
150
TJ, JUNCTION TEMPERATURE ('C)

Ol

:z

o

'""r\

\

hl
~

~o.. 60 I--__+___+_ Vout = 5.0 V -I--H-H+H-l-__+___+_+++H+H

10

100

!.Ok

10k

Vin = 10 V
CO=O
f=120Hz
TJ=25'C

a:
r:r

\

a:

1\

I

80r--+-+~~~--~~+t~--~~rrH+~

0..

lOOk

. ,. ,. ,.
II .,1IIIr---+-I-l--+-H-H+I-t--+++++++H

40 I----l--il-t--i-

\

20
1.0

30~~~~~~--~~~~--~~~~~

1.0M

10M

100M

0.01

0.1

0.5 1.0

10, OUTPUT CURRENT (A)

Figure 6. Bias Current versus
Input Voltage

Figure 7. Bias Current versus
Output Current
5.0

III

TJ = 25'C

I

<"

§. 3.0

<" 4.0
§.

I

!z
w

I

a:
a:

If

~

• Thermal Regulation is Specified
• Internal Thermal Overload Protection

Heatsink surface connected to Pin 2

• Internal Short Circuit Current Limiting
• Output Transistor Safe-Area Compensation
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Rating
Input Voltage (5.0 V - 12 V)
(15V)

Symbol

Value

Unit

VI

35
40

Vdc

ORDERING INFORMATION
Tested
Operating
Junction
Temp. Range Package

Device

Vo
Tal.

MC7BTXXCT
MC7BTXXACT

4%
20/0·

0° to
+125°C

Plastic
Power

MC7BTXXBT#
MC7BTXXABT#

4%
20/0*

-40° to
+125°C

Plastic
Power

Power Dissipation and Thermal Characteristics
Plastic Package (Note 1)
TA= +25°C
Thermal Resistance, Junction to Air
TC = +25°C
Thermal Resistance, Junction to Case

PD
RaJA
PD
ReJC

Storage Junction Temperature

Tstg

+150

°C

xx Indicates nominal Voltage.

TJ

Oto+150

°C

>

Operating Junction Temperature Range
MC7BTOOC, AC

Internally Limited
65
Internally Limited
2.5

°C/W
°C/W

NOTES: 1. Although power diSSipation is internally limited, specifications apply only
for Po ,;; Pmax , Pmax = 25 W.

rr

2% regulators available in 5, 12 and 15 V devices.

# Automotive temperature range selections are
available with special test conditions and
additional tests. Contact your local Motorola
sales office for information.

Standard Application

';:: oM .eM><
L I

O.33I-1F

T

0,",

Go"

Acommon ground is required between the input and the output voltages. The input voltage must remain
typically 2.2 V above the output voltage even during the low point on the input ripple voltage.
XX = these two digits of the type number indicate voltage.
> = Gin is required ~ regulator is located an appreciable distance from power supply filter. (See Applications
Information for details.)
.. = GO is not needed for stability; however, it does improve transient response.

TYPE NONc.iLTAGE
MC7BT05
MC7BTOB

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-152

!

5.0 V
B.O V

!

MC78T12
MC7BT15

!

12V
15V

MC78TOO Series
MC78T05AC,C
ELECTRICAL CHARACTERICISTICS (Vin = 10 V, 10 = 3.0 A, O'C ~ TJ <
- 125°C, Po ~ Pmax [Note 1], unless otherwise noted.)
MC78T05AC
Characteristics
Output Voltage
(5.0 rnA ~ 10 ~ 3.0 A, T J = +25°C)
(5.0 rnA ~ 10 ~ 3.0 A;
5.0 rnA ~ 10 ~ 2.0 A, 7.3 Vdc ~ Yin ~ 20Vdc)

Symbol

Max

Min

Typ

Max

4.9
4.8

5.0
5.0

5.1
5.2

4.8
4.75

5.0
5.0

5.2
5.25

-

3.0

25

-

3.0

25

-

10
15

30
80

-

10
15

30
80

-

0.001

0.01

-

0.002

0.03

-

5.0
6.0

5.0
6.0

Unit
Vdc

Regline

Load Regulation (Note 2)
(5.0 rnA ~ 10 ~ 3.0 A, T J = +25°C)
(5.0 rnA ~ 10 ~ 3.0 A)

Re9l0ad

Quiescent Current
(5.0 rnA ~ 10 ~ 3.0 A, T J = +25°C)
(5.0 rnA ~ 10 ~ 3.0 A)

Typ

Vo

Line Regulation (Note 2)
(7.2 Vdc ~ Yin ~ 35 Vdc, 10 = 5.0 rnA, T J = +25°C;
7.2 Vdc ~ Yin ~ 35 Vdc, 10 = 1.0 A, TJ = +25'C;
8.0 Vdc ~ Yin ~ 12 Vdc, 10 = 3.0 A, TJ = +25°C;
7.5 Vdc ~ Yin ~ 20 Vdc, 10 = 1.0 A)

Thermal Regulation
(Pulse = 10 ms, P = 20 W, TA = +25°C)

MC78T05C

Min

-

Regtherm

IB

-

I

mV

mV

%VOfW
rnA

-

3.5
4.0

-

3.5
4.0

Quiescent Current Change
(7.2 Vdc ~ Yin ~ 35 Vdc, 10 = 5.0 rnA, T J = +25°C;
5.0 rnA ~ 10 ~ 3.0 A, TJ = +25°C;
7.5 Vdc ~ Yin ~ 20 Vdc, 10 = 1.0 A)

AlB

-

0.3

1.0

-

0.3

1.0

rnA

Ripple Rejection
(8.0 Vdc ~ Yin ~ 18 Vdc, f = 120 Hz,
10 = 2.0 A, TJ = 25°C)

RR

62

75

-

62

75

-

dB

Yin-YO

-

2.2

2.5

-

2.2

2.5

Output Noise Voltage
(10 Hz ~ f ~ 100 kHz, TJ = +25°C)

Vn

-

10

-

-

10

-

jJ.VNO

Output Resistance (f = 1.0 kHz)

RO

-

2.0

-

-

20

-

mQ

-

1.5

-

A

Dropout Voltage (10 = 3.0 A, TJ = +25°C)

Short Circuit Current Limit
(Vin = 35 Vdc, T J = +25°C)

ISC

Peak Output Current (TJ = +25°C)

Imax

Average Temperature Coefficient of Output Voltage
(10=5.0 rnA)

TCVO

Vdc

-

1.5

-

-

5.0

-

-

5.0

-

A

0.2

-

-

0.2

-

mV/'C

NOTES: 1. Although power dissipation is internally limited, specifications apply only for Po ~ Pmax , Pmax = 25 W.
2. Line and load regulation are specified at constant junction temperature. Changes in Vo due to heating effects must be taken into
account separately. Pulse testing with low duty cycle is used.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-153

..

MC78TOO Series
MC78T08C
ELECTRICAL CHARACTERICISTICS (Vin = 13 V, 10 = 3.0 A, DoC :s; TJ :s; 125°C, Po :s; Pmax [Note 1], unless otherwise noted.)
MC78T08C
Characteristics

lEI

Symbol

Output Voltage
(5.0 rnA :s; 10 :s; 3.0 A, TJ = +25°C)
(5.0 rnA :s; 10 :s; 3.0 A;
5.0 rnA :s; 10 :s; 2.0 A, 10.4 Vdc:s; Vin :s; 23 Vdc)
Line Regulation (Note 2)
(10.3 Vdc:S; Vin :s; 35 Vdc, 10 = 5.0 rnA, TJ = +25°C
10.3 Vdc:s; Vin :s; 35 Vdc, 10 = 1.0 A, TJ = +25°C
11 Vdc:s; Vin:S; 17 Vdc, 10 = 3.0 A, TJ = +25°C
10.7 Vdc:s; Vin:S; 23 Vdc, 10 = 1.0 A)

Regline

Load Regulation (Note 2)
(5.0 rnA :s; 10 :s; 3.0 A, TJ
(5.0 rnA :s; 10 :s; 3.0 A)

Regload

=+25°C)

Thermal Regulation
(Pulse = 10 ms, P = 20 W, TA

Min

Typ

Max

7.7
7.6

8.0
8.0

8.3
8.4

-

4.0

35

-

10
15

30
80

Regtherm

-

=+25°C)

0.002

0.03

Quiescent Current
(5.0 rnA :s; 10 :s; 3.0 A, TJ = +25°C)
(5.0 rnA :s; 10 :s; 3.0 A)

Ie

-

5.0
6.0

Unit
Vdc

Vo

mV

mV

O/OVQIW
rnA

-

3.5
4:0

Quiescent Current Change
(10.3 Vdc:S; Vin :s; 35 Vdc, 10 = 5.0 rnA, TJ = +25°C;
5.0 mA:S; 10:S; 3.0 A, TJ = +25°C;
10.7 Vdc:s; Vin:S; 23 Vdc, 10 = 1.0 A)

die

-

0.3

1.0

rnA

Ripple Rejection
(11 Vdc:s; Vin :s; 21 Vdc, I

RR

60

71

-

de

Vin-VO

-

2.2

2.5

Vdc

Vn

-

10

-

JlVNO

RO

-

2.0

ISC

1.5

-

mQ

-

Imax

-

5.0

-

A

TCVO

-

0.3

-

mVrC

= 120 Hz, 10 = 2.0 A, TJ = 25°C)
Dropout Voltage (10 = 3.0 A, TJ = +25°C)
Output Noise Voltage
(10 Hz:s; I:s; 100 kHz, TJ

=+25°C)

Output Resistance (I = 1.0 kHz)
Short Circuit Current Limit
(Vin = 35 Vdc, TJ = +25°C)
Peak Output Current (TJ = +25°C)
Average Temperature Coefficient 01 Output Voltage (10

= 5.0 rnA)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-154

A

MC78TOO Series
MC78T12AC,C
ELECTRICAL CHARACTERICISTICS (Vin

= 17 V,

10 = 3.0 A, O'C ,,; TJ ,,; 125°C, PO"; P max [Note 1], unless otherwise noted.)
MC78T12AC

Characteristics
Output Voltage
(5.0 mA ,,; 10 ,,; 3.0 A, TJ =+25'C)
(5.0 mA ,,; 10 ,,; 3.0 A,
5.0 mA,,; 10 ,,; 2.0 A, 14.5 Vdc"; Yin ,,; 27Vdc)

Typ

Max

Min

Typ

Max

11.75
11.5

12
12

12.25
12.5

11.5
11.4

12
12

12.5
12.6

-

6.0

45

-

6.0

45

-

10
15

30
80

-

-

10
15

30
80

-

0.001

0.01

-

0.002

0.03

-

3.5
4.0

5.0
6.0

-

3.5
4.0

5.0
6.0

AIS

-

0.3

1.0

-

0.3

1.0

mA

RR

57

67

-

57

67

-

dS

Regline

Load Regulation (Note 2)
(5.0 mA ,,; 10 ,,; 3.0 A, TJ
(5.0 mA ,,; 10 ,,; 3.0 A)

Regload

Thermal Regulation
(Pulse = 10 ms, P = 20 W, TA
Quiescent Current
(5.0 mA,,; 10"; 3.0 A, TJ
(5.0 mA,,; 10 ,,; 3.0 A)

Regtherm

=+25°C)

Quiescent Current Change
(14.5 Vdc"; Yin ,,; 35 Vdc, 10 = 5.0 mA, T J
5.0 mA,,; 10 ,,; 3.0 A, T J = +25'C;
14.9 Vdc,,; Vin"; 27 Vdc, 10 = 1.0 A)
Ripple Rejection
(15 Vdc ,,; Yin ,,; 25 Vdc, f = 120 Hz,
10 =2.0 A, TJ = 25°C)

mV

mV

%VOfW

mA

IS

= +25°C)

Unit
Vdc

Vo

Line Regulation (Note 2)
(14.5 Vdc"; Yin ,,; 35 Vdc, 10 = 5.0 mA, T J = +25'C;
14.5 Vdc"; Yin ,,; 35 Vdc, 10 = 1.0 A, TJ = +25°C;
16 Vdc ,,; Yin ,,; 22 Vdc, 10 = 3.0 A, T J = +25°C;
14.9 Vdc"; Vin"; 27 Vdc, 10 = 1.0 A)

=+25°C)

MC78T12C

Min

Symbol

=+25°C;

Yin-YO

-

2.2

2.5

-

2.2

2.5

Output Noise Voltage
(10Hz,,; I,,; 100 kHz, TJ = +25'C)

Vn

-

10

-

-

10

-

!J.VIVO

Output Resistance (I = 1 .0 kHz)

RO

-

2.0

-

-

20

-

mQ

Short Circuit Current Limit
(Vin = 35 Vdc, T J = +25°C)

ISC

-

1.5

-

-

1.5

-

A

Imax

-

5.0

-

-

A

TCVO

0.5

-

-

5.0

-

0.5

-

mV/'C

Dropout Voltage (10 = 3.0 A, TJ = +25'C)

Peak Output Current (TJ

=+25°C)

Average Temperature Coefficient
01 Output Voltage (10 = 5.0 mAl

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-155

Vdc

D

I

MC78TOO Series
MC78T15AC,C
ELECTRICAL CHARACTERICISTICS (Vin = 20 V, 10 = 3.0 A, O°C S; TJ S; 125°C, Po S; Pmax [Note 1), unless otherwise noted.)

MC78T15AC
Characteristics

lEI

Symbol

Output Voltage
(5.0 rnA S; 10 S; 3.0 A, TJ = +25°C)
(5.0 rnA S; 10 S; 3.0 A;
5.0 rnA S; 10 S; 2.0 A, 17.5 Vde S; Yin S; 30Vde)

Regline

Load Regulation (Note 2)
(5.0 rnA S; 10 S; 3.0 A, TJ = +25°C)
(5.0 rnA S; 10 S; 3.0 A)

Regload

Quiescent Current
(5.0 rnA S; 10 S; 3.0 A, TJ = +25°C)
(5.0 rnA S; 10 S; 3.0 A)

Typ

Max

Min

Typ

Max

14.7
14.4

15
15

15.3
15.6

14.4
14.25

15
15

15.6
15.75

-

7.5

55

-

7.5

55

-

10
15

30
80

-

10
15

30
80

-

0.001

0.01

-

0.002

0.03

Regtherm
IS

-

5.0
6.0

-

3.5
4.0

5.0
6.0

Unit
Vde

Vo

Line Regulation (Note 2)
(17.6 Vde s; Yin s; 40 Vde, 10 = 5.0 rnA, TJ = +25°C;
17.6 Vde s; Yin s; 40 Vde, 10 = 1.0 A, TJ = +25°C;
20 Vdc S; Yin S; 26 Vdc, 10 = 3.0 A, TJ = +25°C;
18 Vdc S; Yin s;30 Vdc, 10 = 1.0 A)

Thermal Regulation
(Pulse = 10 ms, P = 20 W, TA = +25°C)

MC78T15C

Min

mV

mV

%VoJW
rnA

-

3.5
4.0

Quiescent Current Change
(17.6 Vde S; Yin S; 40 Vdc, 10 = 5.0 rnA, TJ = +25°C;
5.0 rnA S; 10 S; 3.0 A, TJ = +25°C;
18 Vdc S; Yin S;30 Vde, 10 = 1.0 A)

diS

-

0.3

1.0

-

0.3

1.0

rnA

Ripple Rejection
(18.5 Vde S; Yin S; 28.5 Vde, 1= 120 Hz,
10 = 2.0 A, TJ = 25°C)

RR

55

65

-

55

65

-

dS

Dropout Vo~age (10 = 3.0 A, TJ = +25°C)

Yin-YO

-

2.2

2.5

2.5

Vdc

Vn

-

10

-

-

2.2

Output Noise Voltage
(10 Hz S;1s; 100 kHz, TJ = +25°C)

10

-

IlVNO

Output Resistance (I = 1.0 kHz)

RO

-

2.0

-

-

20

-

mQ

Short Circuit Current Limit
(Vin = 40 Vdc, TJ = +25°C)

ISC

-

1.0

-

-

1.0

-

A

Imax

-

5.0

-

-

5.0

-

A

TCVO

-

0.6

-

-

0.6

-

mVioC

Peak Output Current (TJ = +25°C)
Average Temperature Coefficient 01 Output Voltage
(10= 5.0 rnA)
'0

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-156

MC78TOO Series
VOLTAGE REGULATOR PERFORMANCE
The performance of a voltage regulator is specified by its
immunity to changes in load, input voltage, power dissipation,
and temperature. Line and load regulation are tested with a
pulse of short duration « 100115) and are strictly a function of
electrical gain. However, pulse widths of longer duration (> 1.0
ms) are sufficient to affect temperature gradients across the
die. These temperature gradients can cause a change in the
output voltage, in addition to changes caused by line and load
regulation. Longer pulse widths and thermal gradients make
it desirable to specify thermal regulation.
Thermal regulation is defined as the change in output
voltage caused by a change in dissipated power for a specified
time, and is expressed as a percentage output voltage change
per watt. The change in dissipated power can be caused by

a change in either the input voltage or the load current.
Thermal regulation is a function of Ie layout and die attach
techniques, and usually occurs within 10 ms of a change in
power dissipation. After 10 ms, additional changes in the
output voltage are due to the temperature coefficient of the
device.
Figure 1 shows the line and thermal regulation response of
a typical MC78T05AC to a 20 W input pulse. The variation of
the output voltage due to line regulation is labeled Aand the
thermal regulation component is labeled A. Figure 2 shows
the load and thermal regulation response of a typical
MC78T05AC to a 20 W load pulse. The output voltage
variation due to load regulation is labeled A and the thermal
regulation component is labeled A.

Figure 1. MC78T05AC Line and Thermal Regulation

Figure 2. MC78T05AC Load and Thermal Regulation

2:

2:

o
I-~

o
I-~

z

z

>-0

1r~

1r
>-0
~

~~

6~f
>'-'

~~

6~

~g

2:0

- a:
oa:

o

~!z
Ow

-::>
(..)

t, TIME (2.0 ms/DIV)

t, TIME (2.0 ms/DIV)

CD = Re9line = 2.4 mV
® = Regtherm = 0.0015%VQIW

Vout = 5.0 V
Yin = 8.0V ~ 18V ~8.0V
lout = 2.0A

Vout=5.0V
Yin = 15
lout = 0 A ~ 2.0 A ~ 0 A

'1'
R
44 V
~ = egload = . m

® = Regtherm = 0.0015%VQIW

Schematic Diagram
01ll.0k

L

A

J

l

1.0k

02

J

022

Inpu

,~021

020 ('

6.7V
16k

024,.- 100 _f' 025

1=

W

...9!I

OS 09

300

04

~ 6.4'\.

~05

5.6k

~

019

10pF
02

06

or.

2.0k

5.0VO

300

50

520

~
2.6~~h-vv ..r
6.0k

017

Ilr~~
018

r? 6'~~014

'" 027

13

0.12

200

Oulp ul

;.-

"

~k
013

026
""

016

~010

01

200 Too

r---'

3.6k

03

l

1.0k

:,..

015

1~2.Sk

Gnd
~

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-157

..
I

MC78TOO Series
Figure 3. Temperature Stability

Figure 4. Output Impedance

1.02
I I I I
Vin- Vout=10V_
lout = 100mA

-50

Vout=5.0V
Vin=7.5V
_lout=1.0A
co=o
_
T =25°C

r"- .....

V
./

.98
-90

_

-10
30
70
110
TJ, JUNCTION TEMPERATURE (OC)

150

10-4
1.0

190

z

~

80

-t

§

w

/"

:s

"'"\ \

§w

lout = 1.SA
Vout=5.0V
Vin = 10V
Co=O
TJ = 25°C

ii:I
a: 60
~

0..
0..

li:
r£ 40

-I

a:

20
1.0

I

z

ii:I
a:

tOM

10M 100M

10

80

~

60 I - -

li:
r£

r--

0..
0..

\
~

a:

\

100 1.0k 10k lOOk
t, FREQUENCY (Hz)

4.0

tOM

10M

40
30
0.01

100M

I

TJ = 25°C

,

/II

w

a:

1.0

'"
o

rt

o

a:

=>
0

IZ
W

0

TJI=~oCI
I

4.0

en
w

I I
II -I I I ITJ = 125°C

2.0

11 .. 1 .1. I !

0

m

TJ = O°C
TJ = 25°C
TJ = 125°C
20
30
Vin, INPUT VOLTAGE (Vdc)

1.0

II

o

40

0.01

Vin-Vout = 5.0 V

II
0.1
1.0
lout, OUTPUT CURRENT (A)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-158

I

I' TJ = 25°C
3.0

5

10

10

0.1
1.0
lout, OUTPUT CURRENT (A)

IZ
W

i'TJ = 125°C

J

~

U 1111

5.0

(1.

3.0

Vout = 5.0 V
Vin=10V
Co=O
t= 120Hz
TJ = 25°C

Figure 8. Quiescent Current versus
Output Current

TJ =O°C '-..

a
!Z 2.0

a

1.0k
10k lOOk
t, FREQUENCY (Hz)

iC

Figure 7. Quiescent Current versus
Input Voltage

!Z

100

100

L

0

<
.§.

./

lout = 50 mA

iC

:s

/

--

Figure 6. Ripple Rejection versus
Output Current

Figure 5. Ripple Rejection versus Frequency
100

10

/'

TI

" , II

I I II
10

MC78TOO Series
Figure 10. Peak Output Current

Figure 9. Dropout Voltage
2.5

I-

--

g
!z

~ 6.0

=>

lout = 0.5 A

tWo = 50 mV

<.>

--

!3

..........

o

~

5 4.0
'"LiS
0-.

2.0

1;j

-10
30
70
110
TJ, JUNCTION TEMPERATURE (0C)

150

190

!:§

0.8
Vout=5.0V
lout = 150 mA
CO=O
TJ = 25°C

!3 is

5~

0.4

0.2
~ ~ 0

.3 <.> 0

10

20
t, TIME (IlS)

30

'.

Yin = 10V
CO=O
TJ = 25°C

~

TJ=O°C TJ = 25°C._
TJ = 125°C
40

,1\

\

f

IV
I

1\

I

\

\

10

40

20
t, TIME (IlS)

30

40

Figure 14. Maximum Average Power
Dissipation for MC78TOOCT, ACT

Figure 13. Maximum Average Power
Dissipation for MC78TOOCK, ACK

50
75
100
TA, AMBIENT TEMPERATURE (0C)

0-..

..

10
20
30
Yin-YO, INPUT-OUTPUT VOLTAGE (Vdc)

0.2

g:~
~ -0. 1

~

~ ~ 0.5

"
:>

!:§

~
20

§::2
-. <.>

.......

C)

f-f--

-SCi

~

~

........... 1'0............

II

II

0.3

w

~ ~ 0.6

..........

Figure 12. Load Transient Response

Figure 11. Line Transient Response
w
C)

~

E

o
-50

~

a:

r- r- I-- lout = 1.0 A
r- r-=r::t-

r-

0.5
-90

8.0

I II
IOUI = 3.0 A

125

50
75
100
TA. AMBIENT TEMPERATURE (0C)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3·159

125

lEI

MC78TOO Series
APPLICATIONS INFORMATION
Design Considerations
The MC78TOO,A Series of fixed voltage regulators are
designed with Thermal Overload Protection that shuts down
the circuit when subjected to an excessive power overload
condition, Internal Short Circuit Protection that limits the
maximum current the circuit will pass, and Output Transistor
Safe-Area Compensation that reduces the output short circuit
current as the voltage across the pass transistor is increased.
In many low current applications, compensation capacitors
are not required. However, it is recommended that the
regulator input be bypassed with a capacitor if the regulator is

n

connected to the power supply filter with long wire lengths, or
if the output load capacitance is large. An input bypass
capacitor should be selected to provide good high frequency
characteristics to insure stable operation under all load
conditions. A 0.33 IlF or larger tantalum, mylar, or other
capacitor having low intemal impedance at high frequencies
should be chosen. The bypass capacitor should be mounted
with the shortest possible leads directly across the regulator's
input terminals. Normally good construction techniques
should be used to minimize ground loops and lead resistance
drops since the regulator has no external sense lead.

Figure 16. Adjustable Output Regulator

Figure 15. Current Regulator

Input

0.331l F

MC78T05,A

I

~

~

X
L

Output
R
•

~

Constant
Current to
Grounded Load

The MC78T05 regulator can also be used as a current source when
connected as above. In order to minimize dissipation the MC78T05
is chosen in this application. Resistor R determines the current
as follows:
5.0V
IO=R +IB

MC1741

,',IB '" 0.7 mA over line, load and Temperature changes
IB'" 3.5 mA
For example, a 2 A current source would require Rto be a 2.5 n, lOW
resistor and the output voltage compliance would be the input voltage
less 7.0 V.

VO,8.0Vt020V
Vin - Va;' 2.5V
The addition of an operational amplifier allows adjustment to higher
or intermediate values while retaining regulation characteristics. The
minimum voltage obtainable with this arrangement is 3.0 V greater
than the regulator voltage.

Figure 18. Current Boost With
Short Circuit Protection

Figure 17. Current Boost Regulator
2N4398 or Equiv

2N4398
or Equiv.

Input

R

1-<>----00< 10k

1.0k

1--<.,............ Output

MJ2955
or Equiv.

R

J

O.IIlF

xx = 2 digits of type number indicating voltage.
xx = 2 digits of type number indicating voltage.
The circuit of Figure 17 can be modified to provide supply protection
against short circuits by adding a short circuit sense resistor, RSC, and
an additional PNP transistor. The current sensing PNP must be able to
handle the short circu~ current of the three-terminal regulator.
Therefore, an eight-ampere power transistor is specified.

The MC78TOO,A series can be current boosted with a PNP transistor.
The 2N4398 provides current to 15 A. Resistor R in conjuction with the
VBE of the PNP determines when the pass transistor begins conducting;
this circuit is not short circuit proof. Input-output differential voltage
minimum is increased by the VBE of the pass transistor.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-160

MC7900
Series

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Three-Terminal Negative Voltage
Regulators

..

THREE-TERMINAL
NEGATIVE FIXED
VOLTAGE REGULATORS

The MC7900 Series of fixed output negative voltage regulators are intended as
complements to the popular MC7800 Series devices. These negative regulators
are available in the same seven-voltage options as the MC7800 devices. In
addition, one extra voltage option commonly employed in MECL systems is also
available in the negative MC7900 Series.
Available in fixed output voltage options from -5.0 V to -24 V, these regulators
employ current limiting, thermal shutdown, and safe-area compensation making them remarkably rugged under most operating conditions. With adequate
heat-sinking they can deliver output currents in excess of 1.0 A.
• No External Components Required
• Internal Thermal Overload Protection

I

TSUFFIX
PLASTIC PACKAGE
CASE 221A

Pin 1. Ground
2. Input
3. Output

2

3

• Internal Short Circuit Current Limiting
• Output Transistor Safe-Area Compensation

Heatsink surface connected to Pin 2

• Available in 2% Voltage Tolerance (See Ordering Information)

STANDARD APPLICATION

Schematic Diagram
Gnd

Input U J : C 7 9 X X Output

Cin*
O.33JlF

r---j--ffi

Vo

CO"
1.0JlF

A common ground is required between the input
and the output voltages. The input voltage must
remain typically 2.0 V above more negative even
during the high point of the input ripple voltage.
XX = these two digits of the type number indicate
voltage .

• = Cin is required if regulator is located an
0.3

appreciable distance from power supply
filter.

•• =

Co improve stability and transient response.

ORDERING INFORMATION
Device

Output Voltage
Tolerance

Tested Operating
Junction Temp. Range

4%

MC79XXCT
MC79XXACr

2%

MC79XXBT#

4%

TJ
TJ

= 0° to +125°C

Package
Plastic Power

= -40° to +125°C
DEVICE TYPE/NOMINAL OUTPUT VOLTAGE

XX indicates nominal voltage
• 2% output voltage tolerance available in 5, 12 and 15 V devices.
# Automotive temperature range selections are available with special test conditions
and additional tests in 5, 12 and 15 V devices. Contact your local Motorola sales
office for information

MC7905
MC7905.2
MC7906
MC7908

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-161

5.0V
5.2V
6.0V
8.0V

MC7912
MC7915
MC7918
MC7924

12V
15V
28 V
24 V

MC7900 Series
MAXIMUM RATINGS (TA = +25'C, unless otherwise noted.)
Symbol

Value

Unit

VI

-35
-40

Vdc

= +25'C

PD
1/RSJC

Internally Limited
15.4

mW/'C

= +95'C (See Figure 1)

PD
1/RSJC

Internally Limited
200

mW/'C

Tstg

-65 to +150

'C

TJ

+150

'C

Rating
Input Voltage (-5.0 V;:, Vo ;:'-18 V)
(24 V)
Power Dissipation
Plastic Package
TA = +25'C
Derate above TA
TC = +25'C
Derate above TC

Storage Junction Temperature Range
Junction Temperature

W

W

THERMAL CHARACTERISTICS
Symbol

Max

Unit

Thermal Resistance, Junction to Ambient

Characteristics

RSJA

65

'CIW

Thermal Resistance, Junction to Case

RSJC

5.0

'C/W

MC7905C ELECTRICAL CHARACTERICISTICS (VI

= -1 0 V,

10 = 500 rnA, O'C < TJ < + 125'C, unless otherwise noted.)

Characteristics

Symbol

Output Voltage (TJ = +25'C)

Vo

Line Regulation (Note 1)
(TJ = +25'C, 10 = 100 rnA)
-7.0 Vdc <: VI <: -25 Vdc
-8.0 Vdc;:, VI;:' -12 Vdc

Dropout Voltage
10 = 1.0 A, TJ

-4.8

Vdc
mV

-

7.0
2.0

50
25

-

35
8.0

100
50

11
4.0

100
50

mV

-

-

= +25'C)

Vo

-4.75

liB

-

-

-

-5.25

Vdc

4.3

8.0

rnA

-

1.3
0.5

rnA

~IIB

Input Bias Current Change
-7.0 Vdc;:' VI <: -25 Vdc
5.0 rnA ,; 10 ,; 1.5 A

= +25'C,

Unit

Regload

Output Voltage
-7.0 Vdc <: VI <:-20 Vdc, 5.0 rnA,; 10'; 1.0 A, p,; 15 W

Ripple Rejection (10

Max
-5.2

-

Load Regulation (TJ = +25'C) (Note 1)
5.0 rnA ,; 10 ,; 1.5 A
250 rnA ,; 10 ,; 750 rnA

Output Noise Voltage (TA

Typ
-5.0

Regline

(TJ = +25'C, 10 = 500 rnA)
-7.0 Vdc <: VI <: -25 Vdc
-8.0 Vdc <: VI <:-12 Vdc

Input Bias Current (TJ

Min

10Hz'; 1 ,; 100 kHz)

-

40

-

RR

70

-

dB

VI-VO

-

2.0

-

Vdc

~VO/~T

-

-1.0

-

mV/'C

eon

= 20 rnA, 1 = 120 Hz)

IlV

= +25'C

Average Temperature Coefficient 01 Output Voltage
10 = 5.0 rnA, O'C ';TJ'; + 125'C

NOTES: 1. Load and line regulation are specilled at constant Junction temperature. Changes In Vo due to heating effects must be taken Into
account separately. Pulse testing with low duty cycle is used.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-162

MC7900 Series
MC7905AC ELECTRICAL CHARACTERICISTICS (VI = -1 0 V, 10 = 500 mA, O°C < TJ < + 125°C, unless otherwise noted.)
Characteristics
Output Voltage (TJ

=+25°C)

Line Regulation (Note 1)
-8.0 Vdc;" VI;" -12 Vdc;
-8.0 Vdc;" VI ;" -12 Vdc;
-7.5 Vdc ;" VI ;" -25 Vdc;
-7.0 Vdc ;" VI ;" -20 Vdc;
Load Regulation (Note 1)
5.0 mA " 10" 1.5 A, TJ
250 mA " iO " 750 mA
5.0 mA S; 10" 1.0 A

Symbol

Min

Typ

Max

Unit

Vo

-4.9

-5.0

-5.1

Vdc

2.0
7.0
7.0
6.0

25
50
50
50

11
4.0
9.0

100
50
100

mV

Regline

10 = 1.0 A, TJ = 25°C
10 = 1.0 A
10 = 500 mA
10 = 1.0 A, TJ = +25°C

-

mV

Regload

=+25°C

-

-

Output Voltage
-7.5 Vdc ;" VI ;" -20 Vdc, 5.0 mA" 10 " 1.0 A, p" 15 W

Vo

-4.80

Input Bias Current

liB

-

-

Input Bias Current Change
-7.5 Vdc;" VI ;" -25 Vdc
5.0 mA " 10" 1.0 A
5.0 mA" 10 S; 1.5 A, TJ = 25°C

=+25°C, 10Hz" 1 "
Ripple Rejection (iO = mA, 1 = 120 Hz)

Dropout Voltage
10 = 1.0 A. TJ

100 kHz)

-5.20

Vdc

4.4

8.0

mA

1.3
0.5
0.5

mA

LlIIB

Output Noise Voltage (TA

-

-

-

eon

-

40

-

RR

-

70

-

dB

VI-VO

-

2.0

-

Vdc

LlVoJLlT

-

-1.0

-

mvrc

~V

=+25°C

Average Temperature Coefficient 01 Output Voltage
10 = 5.0 A, O°C S;TJ" +125°C

MC7905.2C ELECTRICAL CHARACTERICISTICS (VI

=-1 0 V, 10 = 500 mA, O°C < TJ < +125°C, unless otherwise noted.)

Characteristics
Output Voltage (TJ

=+25°C)

Line Regulation (Note 1)
(TJ = +25°C, 10 = 100 mAl
-7.2 Vdc;" VI ;" -25 Vdc
-8.0 Vdc;" VI ;"-12 Vdc

Symbol

Min

Typ

Max

Unit

Vo

-5.0

-5.2

-5.4

Vdc
mV

Regline

-

(TJ = +25°C, 10 = 500 mAl
-7.2 Vdc ;" VI ;" -25 Vdc
-8.0 Vdc;" VI;,,-12 Vdc

-

-

Load Regulation (TJ = +25°C) (Note 1)
5.0 mA " 10 " 1.5 A
250 mA " 10 " 750 mA

37
8.5

105
52

12
4.5

105
52

mV

-

Vo

=+25°C)

-4.95

-

-5.45

Vdc
mA

-

4.3

8.0

-

-

1.3
0.5

eon

-

42

-

~V

RR

-

68

-

dB

VI-VO

-

2.0

-

Vdc

LlVO/LlT

-

-1.0

-

mV/oC

liB

Input Bias Current Change
-7.2 Vdc;" VI ;" -25 Vdc
5.0 mA " 10 " 1.5 A

mA

LlIIB

=+25°C, 10Hz S; 1 "
Ripple Rejection (Io = 20 mA, 1 = 120 Hz)

Output Noise Voltage (TA

52
27

Re9ioad

Output Voltage
-7.2 Vdc ;" VI ;" -20 Vdc, 5.0 mA " 10 " 1.0 A, p" 15 W
Input Bias Current (TJ

8.0
2.2

100 kHz)

Dropout Voltage

10 = 1.0 A, TJ = +25°C
Average Temperature Coefficient 01 Output Voltage

10 = 5.0 mA, O°C" TJ" +125°C

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-163

MC7900 Series
MC79D6C ELECTRICAL CHARACTERICISTICS (VI =-11 V, 10 = 500 mA, DoC  6.18

8.0

YO, OUTPUT VOLTAGE M

Figure 5. Output Voltage as a Function
of Junction Temperature

~

6.0

- -Vin=-ll V _
VD = -6.0V
10=20rnA I

zw

a:

"\

gs

\
\

4.8

'-'

~

=±

::: 4.6
=>
a.

150

...... r--.,.

'" ""

..........

~

g; 4.4

\

4.2
25
50
75
100
125
TJ, JUNCTION TEMPERATURE (0G)

"

175

o

25

..........

1 J
~

50
75
100
TJ, JUNCTION TEMPERATURE (0G)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-168

"

Vin=-ll V_
VO= -6.0 V
10=20rnA -

125

MC7900 Series

APPLICATIONS INFORMATION
Design Considerations
The MC7900 Series of fixed voltage regulators are
designed with Thermal overload Protection that shuts down
the circuit when subjected to an excessive power overload
condition. Internal Short Circuit Protection that limits the
maximum current the circuit will pass, and Output Transistor
Safe-Area Compensation that reduces the output short circuit
current as the voltage across the pass transistor is increased.
In many low current applications, compensation capacitors
are not required. However, it is recommended that the
regulator input be bypassed with a capacitor if the regulator is
connected to the power supply filter with long wire lengths,

r

or if the output load capacitance is large. An input bypass
capacitor should be selected to provide good high-frequency
characteristics to insure stable operation under all load
conditions. A 0.33 IlF or larger tantalum, mylar, or other
capacitor having low internal impedance at high frequencies
should be chosen. The bypass capacitor should be mounted
with the shortest possible leads directly across the regulators
input terminals. Normally good construction techniques
should be used to minimize ground loops and lead resistance
drops since the regulator has no external sense lead.
Bypassing the output is also recommended.
Figure 8. Current Boost Regulator
(-5.0V @ 4.0A, with 5.0A Current Limiting)

Figure 7. Current Regulator

-20V
Input

-r+ 1.01lF

-tOV

0.56
Input _ ......./\,/\./V--.-~

p l 010 = 200 mA
MC7905 .
R
_-

?

-5.0V

Jr--:-:-------..- Output

VO~10V

-r+ 1.0llF

Gnd ••~.....
--------<
.....
- - - -..... Gnd
The MC7905, -5.0 V regulator can be used as a constant current
source when connected as above. The output current is the sum of
resistor R current and quiescent bias current as follows.

1.0llF

Gnd

_------+'---._---'1.__ Gnd

'Mounted on common heatsink, Motorola MS-l 0 or equivalent.

5.0 V
IO=R +18
The quiescent current for this regulator is typically 4.3 rnA. The
5.0 V regulator was chosen to minimize dissipation and to allow the
output voltage to operate to within 6.0 V below the input voltage.

When a boost transistor is used, short circuit currents are equal to
the sum of the series pass and regulator limits, which are measured
at 3.2 A and 1.8 A respectively in this case. Series pass limiting is
approximately equal to 0.6 V/RSC. Operation beyond this point to the
peak current capability of the MC7905C is possible if the regulator is
mounted on a heat sink; otherwise thermal shutdown will occur when
the additional load current is picked up by the regulator.

Figure 9. Operational Amplifier Supply

DEFINITIONS

(±15@ 1.0 A)
+15V
Output

Line Regulation - The change in output voltage for a
change in the input voltage. The measurement is made under
conditions of low dissipation or by using pulse techniques
such that the average chip temperature is not significantly
affected.

lN4001
or Equiv
Gnd

Load Regulation - The change in output voltage for a
change in load current at constant chip temperature.

+20V
Input
0.331l F
Gnd

Maximum Power Dissipation - The maximum total device
dissipation for which the regulator will operate within
specifications.
-20V
Input

Input Bias Current - That part of the input current that is not
delivered to the load.

-15V
Output

The MC7815and MC7915positiveand negative regulators maybe
connected as shown to obtain a dual power supply for operational
amplifiers. A clamp diode should be used althe output of the MC7815
to prevent potential latch-up problems whenever the output of the
positive regulator (MC7815) is drawn below ground with an output
current greater than 200 rnA.

Output Noise Voltage - The rms AC voltage at the output,
with constant load and no input ripple, measured over a
specified frequency range.
Long Term Stability - Output voltage stability under
accelerated life test conditions with the maximum rated
voltage listed in the devices' electrical characteristics and
maximum power dissipation.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-169

..

MC79LOO,A
Series

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

lEI

Three-Terminal Low Current
Negative Voltage Regulators

THREE-TERMINAL LOW
CURRENT NEGATIVE FIXED
VOLTAGE REGULATORS

The MC79LOO Series negative voltage regulators are inexpensive,
easy-to-use devices suitable for numerous applications requiring up t01 00 mAo
Like the higher powered MC7900 Series negative regulators, this series features
thermal shutdown and current limiting, making them remarkably rugged. In most
applications, no external components are required for operation.
The MC79LOO devices are useful for on-card regulation or any other
application where a regulated negative voltage at a modest current level is
needed. These regulators offer substantial advantage over the common
resistor/zener diode approach.
• No External Components Required

PSUFFIX
PLASTIC PACKAGE
CASE 29

Pin I. Ground
2. Input
3. Output

• Internal Short Circuit Current Limiting
• Internal Thermal Overload Protection
• LowCost
• Complementary Positive Regulators Offered (MC78LOO Series)

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SOP-8)

• Available in Either ±5% (AC) or ±1 0% (C) Selections

PIN I. Vout
2. Vin
3. Vin
4. NC

Representative Circuit Schematic

R5

RI

RI8

~ ~

Gnd

R9

~Q4

t'" Q8

RI7

"

Q14"'1

/I

RI6

" Q9
~.

R4

R3

J.

I

R2
ZI

SOP-8 is an internally modified SO-8 Package Pins
2, 3, 6, and 7 are electrically common to the die
attach flag. This internal lead frame modification
decreases package thermal resistance and
increases power dissipation capability when
appropriately mounted on a printed circuit board.
SOP-8 conforms to all external dimensions of the
standard SO-8 Package.

QIO

kQ5

R7

>--( QI

5.GND
6. Vin
7. Vin
8. NC

:ok

r

T
Q6 t1C
RIO

RII

Device No.
5%

Nominal
Voltage

MC79L05C
MC79LI2C
MC79LI5C
MC79L18C
MC79L24C

MC79L05AC
MC79L12AC
MC79LI5AC
MC79L18AC
MC79L24AC

-5.0
-12
-15
-18
-24

Output

~rH:
1 '~14

~7

Device No.
±10%

QI3

Q2 QII

RI5

ORDERING INFORMATION
Device

Testing Operating
Temperature Range

Package

MC79LXXACD'

sop·s

MC79LXXACP

Plastic Power

TJ = 0° to +t25°C
Input

MC79LXXCP

Plastic Power

MC79LXXABD'

# Automotive temperature range selections are available with special test conditions
and additional tests in 5, 12 and 15 V devices. Contact your local Motorola sales
office for information.

MC79LXXABP'

Plastic Power

xx indicates nominal voltage
•Available in 5, 12 and 15 V devices

MOTOROLA LlNEARIiNTERFACE ICs DEVICE DATA

3-170

SOP·S
TJ = -40° to +125°C

MC79LOO,A Series
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Rating
Input Voltage (-5 V)
(-12, -15, -18 V)
(-24 V)
Storage Temperature Range
Junction Temperature

Symbol

Value

Unit

VI

-30
-35
-40

Vdc

Tst~

-65 to +150

°C

TJ

+150

°C

MC79L05C, AC SERIES ELECTRICAL CHARACTERICISTICS (VI =-10 V, 10 = 40 rnA, CI = 0.33 ~F, Co = 0.1
O°C < T J < + 125°C, unless otherwise noted).
MC79L05C
Characteristics

..

~F,

I

MC79L05AC, AB

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

Output Voltage (TJ = +25°C)

Va

-4.6

-5.0

-5.4

-4.8

-5.0

-5.2

Vdc

Input Regulation
(TJ = +25°C)
-7.0 Vdc" VI ,,-20 Vdc
-8.0 Vdc" VI ,,-20 Vdc

Regline

Load Regulation
TJ = +25°C, 1.0 mA,; 10'; 100 mA
1.0 mA ,; 10 ,; 40 mA

Re9l0ad

mV

-

-

200
150

-

-

150
100

-

-

60
30

-

-

-

60
30

-

-5.5
-5.5

-

-5.25
-5.25

-

-

6.0
5.5

-

-

6.0
5.5

-

1.5
0.2

-

-

1.5
0.1

40

-

-

40

-

~V

mV

Output Voltage
-7.0 Vdc" VI" -20 Vdc, 1.0 mA,; 10'; 40 mA
VI =-10 Vdc, 1.0 mA,; 10'; 70 mA
Input Bias Current
(TJ = +25°C)
(TJ = +125°C)
Input Bias Current Change
-8.0 Vdc " VI " -20 Vdc
1.0 mA,; 10 ';40 mA
Output Noise Voltage
(TA = +25°C, 10 Hz,; f,; 100 kHz)

Va

Vn

-

Ripple Rejection
(-8.0" VI" -18 Vdc, f = 120 Hz, TJ = +25°C)

RR

40

49

-

41

49

-

dB

-

1.7

-

-

1.7

-

Vdc

Dropout Voltage
10 = 40 mA, TJ = +25°C

Vdc
-4.5
-4.5

-4.75
-4.75

mA

liB

mA

liB

lVI-Vol

MC79L12C, AC ELECTRICAL CHARACTERICISTICS (VI = -19 V, 10 = 40 rnA, CI = 0.33 ~F, Co = 0.1

~F,

O°C < T J < + 125°C, unless otherwise noted).
MC79L12C
Characteristics

MC79L12AC, AB

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

Output Voltage (TJ = +25°C)

Va

-11.1

-12

-12.9

-11.5

-12

-12.5

Vdc

Input Regulation
(TJ = +25°C)
-14.5 Vdc" VI ,,-27 Vdc
-16 Vdc" VI ,,-27 Vdc

Regline

Load Regulation
TJ = +25°C, 1.0 mA,; 10'; 100 mA
1.0 mA,; 10 ,;40 mA
Output Voltage
-14.5 Vdc" VI" -27 Vdc, 1.0 mA,; 10'; 40 mA
VI =-19 Vdc, 1.0 mA,; 10'; 70 mA
Input Bias Current
(TJ = +25°C)
(TJ = +125°C)
Input Bias Current Change
-16 Vdc" VI ,,-27 Vdc
1.0 mA ,; 10 ,; 40 mA

Regload

mV

-

250
200

-

-

-

-

250
200

-

-

100
50

-

-

100
50

-

-13.2
-13.2

-

-12.6
-12.6

-

-

6.5
6.0

-

-

6.5
6.0

-

1.5
0.2

-

1.5
0.2

80

-

-

80

-

~V

-

mV

Vdc

Va
-10.8
-10.8

-11.4
-11.4

mA

liB

-

mA

liB

Output Noise Voltage
(TA = +25°C, 10 Hz,; f,; 100 kHz)

Vn

-

Ripple Rejection
(-15'; VI'; -25 Vdc, f = 120 Hz, TJ = +25°C)

RR

36

42

-

37

42

-

dB

lVI-Vol

-

1.7

-

-

1.7

-

Vdc

Dropout Voltage
10 = 40 mA, TJ = +25°C

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-171

MC79LOO,A Series
MC79L 15C, AC ELECTRICAL CHARACTERICISTICS (VI = -23 V, 10 = 40 mA, CI = 0.33 ~F, Co = 0.1
O'C < TJ < + 125'C, unless otherwise noted).
MC79L15C
Characteristics
Output Voltage (TJ = +25'C)
Input Regulation
(TJ = +25'C)
-17.5 Vdc" VI ,,-30 Vdc
-20 Vdc " VI " -JO Vdc
Load Regulation
TJ = +25'C, 1.0 rnA ~ 10 ~ 100 rnA
1.0 rnA,; 10 ,;40 rnA

~F,

MC79L15AC, AB

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

Vo

-13.8

-15

-16.2

-14.4

-15

-15.6

Vdc
mV

Regline
300
250

-

-

-

-

-

150
75

-

-

150
75

-

-16.5
-16.5

-14.25
-14.25

-

-15.75
-15.75

-

-

6.5
6.0

-

-

-

-

6.5
6.0

-

-

1.5
0.2

-

1.5
0.1

90

-

~V

-

-

-

-

-

-

-

-

300
250
mV

Regload

Output Voltage
-17.5 Vdc" VI ,,-Vdc, 1.0 rnA,; 10'; 40 mA
VI = -23 Vdc, 1.0 rnA ~ 10 ~ 70 rnA

Vo

Input Bias Current .
(TJ = +25'C)
(TJ = +125'C)
Input Bias Current Change
-20 Vdc " VI " -30 Vdc
1 .0 rnA ,; 10 ,; 40 rnA

liB

Vdc
-13.5
-13.5

rnA

~IIB

rnA

Output Noise Voltage
(TA = +25'C, 10 Hz,; f,; 100 kHz)

VN

-

90

-

-

Ripple Rejection
(-18.5'; VI ,; -28.5 Vdc, f = 120 Hz)

RR

33

39

-

34

39

-

dB

-

1.7

-

-

1.7

-

Vdc

Dropout Voltage
10 = 40 rnA, TJ = +25'C

lVI-Vol

MC79L18C, AC ELECTRICAL CHARACTERICISTICS (VI = -27 V, 10 = 40 mA, CI = 0.33 ~F, Co = 0.1
O'C < TJ < + 125'C, unless otherwise noted).
MC79L18C
Characteristics

~F,

MC79L18AC

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

Output Voltage (TJ = +25'C)

Vo

-16.6

-18

-19.4

-17.3

-18

-18.7

Vdc

Input Regulation
(TJ = +25'C)
-20.7 Vdc " VI " -33 Vdc
-21.4 Vdc" VI ,,-33 Vdc
-22 Vdc" VI ,,-33 Vdc
-21 Vdc" VI ,,-33 Vdc

Regline

Load Regulation
TJ = +25'C, 1.0 rnA ~ 10
1.0 rnA ,; 10 ,; 40 rnA

rnV

-

-

-

-

-

-

-

325
275
-

-

-

-

-

170
85

100 rnA

-16.2
-16.2

-

-19.8
-19.8

-

-

6.5
6.0

-

-

-

-

1.5
0.2

-

-

-

325
275

-

-

170
85

-17.1

-

-18.9

-

-

-17.1

-

-18.9

-

-

6.5
6.0

-

-

1.5
0.1

rnV

Regload
~

-

Output Voltage
-20.7 Vdc" VI ,,-33 Vdc, 1.0 rnA,; 10,;40 rnA
-21.4 Vdc" VI ,,-33 Vdc, 1.0 rnA,; 10 ,; 40 rnA
VI =-27 Vdc, 1.0 rnA ~ 10'; 70 rnA

Vo

Input Bias Current
(TJ = +25'C)
(TJ = +125'C)

liB

Inpul Bias Current Change
-21 Vdc" VI ,,-33 Vdc
-27 Vdc" VI ,,-33 Vdc
1.0 rnA ~ 10 ,;40 mA

liB

Oulput Noise Voltage
(TA = +25'C, 10 Hz,; f,; 100 kHz)

Vn

-

150

-

-

150

-

~V

Ripple Rejeclion
(-23'; VI'; -33 Vdc, f = 120 Hz, TJ = +25'C)

RR

32

46

-

33

48

-

dB

-

1.7

-

-

1.7

-

Vdc

Dropout Voltage
10 = 40 rnA, TJ = +25'C

Vdc

rnA

-

rnA

-

lVI-VOl

-

-

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-172

MC79LOO,A Series
MC79L24C, AC ELECTRICAL CHARACTERICISTICS (VI = -33 V, 10 = 40 rnA, CI = 0.33 llF, Co = 0.1 llF,
DoC < TJ < +125°C, unless otherwise noted).
MC79L24C
Characteristics
Output Voltage (TJ - +25°C)
Input Regulation
(TJ = +25°C)
-27 Vdc ~ VI ~ -B8 Vdc
-27.5 Vdc ~ VI ~ -B8 Vdc
-28 Vdc ~ VI ~-B8 Vdc
Load Regulation
TJ = +25°C, 1.0 rnA" 10" 100 rnA
1.0 rnA" 10,,40 rnA
Output Voltage
-27Vdc ~ VI ~-38 V, 1.0 rnA" 10 ,,40 rnA
-28 Vdc ~ VI ~-38 Vdc, 1.0 rnA" 10 ,,40 rnA
VI =-33 Vdc, 1.0 rnA" 10,,70 rnA
Input Bias Current
(TJ = +25°C)
(TJ = +125°C)
Input Bias Current Change
-28 Vdc ~ VI ~ -38 Vdc
1.0 rnA" 10 ,,40 rnA
Output Noise Voltage
(TA = +25°C, 10 Hz" f" 100 kHz)
Ripple Rejection
(-29 " VI ,,-B5 Vdc, f = 120 Hz, TJ = +25°C)
Dropout Voltage
10 = 40 rnA, TJ = +25°C

Symbol
Vo

Min
-22.1

Typ
-24

MC79L24AC
Max
-25.9

Min
-23

Typ
-24

Max
-25

mV

Regline

Regload

Unit
Vdc

-

-

-

-

350
300

-

-

350

-

-

-

200
100

-

-

200
100

-

-

-

-22.8

-

-25.2

-26.4
-26.4

-22.8

-

-25.2

-

-

6.5
6.0

-

1.5
0.1

200

-

l1V

-

300
rnV

Vdc

Vo

-21.4
-21.4
liB

-

-

-

-

rnA

-

-

6.5
6.0

-

-

1.5
0.2

Vn

-

200

-

-

RR

30

43

-

31

47

-

dB

lVI-Vol

-

1.7

-

-

1.7

-

Vdc

dilB

-

-

rnA

-

APPLICATIONS INFORMATION
Design Considerations
The MC79LOO Series of fixed voltage regulators are
designed with Thermal Overload Protections that shuts down
the circuit when subjected to an excessive power overload
condition, Internal Short Circuit Protection that limits the
maximum current the circuit will pass.
In many low current applications, compensation capacitors
are not required. However, it is recommended that the
regulator input be bypassed with a capacitor if the regulator is
connected to the power supply filter with long wire length, or
if the output load capacitance is large. An input bypass

capacitor should be selected to provide good high-frequency
characteristics to insure stable operation under all load
conditions. A 0.33 l1F or larger tantalum, mylar, or other
capacitor having low internal impedance at high frequencies
should be chosen. The bypass capacitor should be mounted
with the shortest possible leads directly across the regulator's
input terminals. Normally good construction techniques
should be used to minimize ground loops and lead resistance
drops since the regulator has no external sense lead.
Bypassing the output is also recommended.

Figure 1. Positive and Negative Regulator

Figure 2. Standard Application
Inpul 0-......:)-1 MC79LXX H)-_-o Output

+VI 0-_--1
f-......- - o +Vo
'----.--'

CO"

CI*

0.3311FT

'-----+----'

O.I11F

A common ground is required between the input and the output voltages. The input
voltage must remain typically 2.0 V above the output voltage even during the low
point on the ripple voltage.

* = CI is required if regulator is located an appreciable distance from the power
supplyfiHer

.. = Co improves stability and transient response.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-173

..

MC79LOO,A Series
TYPICAL CHARACTERISTICS
(TA = +25°C, unless otherwise noted.)
Figure 4. Dropout Voltage versus
Junction Temperature

Figure 3. Dropout Characteristics
8.0

~
w 6.0

(!)

MC~L05d
Vo = -5.0 V

a:;~

TJ = 25°C

LL

13

10=70mA

-2.0

r--

4.0

!5

..&: V

10=1.0mA

15o

~

\

!5~

~K

10=~

~ -1.5

D-w

~~
~>

10=100mA

I - - 10=jOm

-1.0

J
-2.0

-4.0
-6.0
VI, INPUT VOLTAGE M

I-

Figure 5. Input Bias Current versus
Ambient Temperature

25

5.0

14.0 .........
!z

~ 3.8

.........

a:
~

1

....

~ 3.6

w
a:
a:

......... ......

~ 3.4

~

MC79L05C

~
CD
..........

-VO=-5.0V
=3.0 -10=40mA
CD

~

J
25

- --

/

3.0

50
75
100
TA, AMBIENT TEMPERATURE (OC)

I-

2.0

~

r-...

~

"..,.,

IE

1.0

o

125

o

-5.0

-10

-15
-20
-25
-30
V" INPUT VOLTAGE M

10,000

0

1,000

No Heat Sink

~

en
en

I"'-'-

is

a:

~

100

0

D-

; : RaJA = 200°C/W
t- PD(max) to 25°C = 625 mW

C

D-

10

25

50

~

D-

Figure 7. Maximum Average Power Dissipation
versus Ambient Temperature - TO-92 Type Package

§""
.§..
z

125

MC79L05C
VO=-5.0V
10= OmA

<.)

.........

~ 3.2 -VI=-10V

50
75
100
TJ, JUNCTION TEMPERATURE (0C)

~~

z

:$

-

4.0

I-

I""--..

I

Figure 6. Input Bias Current versus
Input Voltage

4.2

D-

avp = 2%1 of VOl

o
o

-10

-0.8

!.
=1.0mA

defined when

-0.5

o
o

I

I- Dropout 01 Regulation is

~

~2.0

~

-

is

~

!5

-2.5

75
100
125
TA, AMBIENT TEMPERATURE (OC)

\

"

150

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3·174

-35

-40

MC79MOO
Series

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Three-Terminal Negative Voltage
Regulators

THREE-TERMINAL
NEGATIVE FIXED
VOLTAGE REGULATORS

The MC79MOO Series of fixed output negative voltage regulators are intended
as complements to the popular MC7aMOO Series devices.
Available in fixed output voltage options of -5.0, -12 and -15 V, these
regulators employ current limiting, thermal shutdown, and safe-area
compensation - making them remarkably rugged under most operating
conditions. With adequate heat-sinking they can deliver output currents in excess
of 0.5 A.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

• No External Components Required
TSUFFIX
PLASTIC PACKAGE
CASE 221A

• Internal Thermal Overload Protection
• Internal Short Circuit Current Limiting
• Output Transistor Safe-Area Compensation

Pin 1. Ground
2. Input
3. Output

Equivalent Schematic Diagram
Gnd

Heatsink surface connected to Pin 2

"
DTSUFFIX
PLASTIC PACKAGE
CASE 369A
(DPAK)

STANDARD APPLICATION

0.3
~--~--~~--------~~

3

DT-1 SUFFIX
PLASTIC PACKAGE
CASE 369
(DPAK)

__--------. .----~=---~OVI
In pu t I X l C 7 9 X X Output
Cin'

O.331lF

CO"

1.OIlF

ORDERING INFORMATION
Device

Output
Voltage

Testing Operating
Junction Temp. Range

DPAK

MC79MOSCDT, CDT-1
MC79MOSCT

-S.OV

-12 V

DPAK
Plastic Power

xx =

these two digits of the type number indicate
voltage.

•=

Cin is required if regulator is located an
appreciable distance from power supply filter.

DPAK

MC79M1SCDT, CDT-1
MC79M1SCT

A common ground is required between the input
and the output voltages. The input voltage must
remain typically 1.1 V more negative even during
the high point of the input ripple voltage.

Plastic Power
0° to +12SoC

MC79M12CDT, CDT-1
MC79M12CT

Package

-1S V

Plastic Power

*' =

Co improvestabilityandtransientresponse.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-175

..

MC79MOO Series
MAXIMUM RATINGS (TA = +25"C, unless otherwise noted.)
Rating
Input Voltage
Power Dissipation
Plastic Package, T-Suffix
TA = +25"C
Derate above TC = +25"C
TC = +25"C
Derate above TC = +95"C
Storage Junction Temperature Range
Junction Temperature

Symbol

Value

Unit

VI

-35

Vdc

Po
1/RSJA
Po
1/RSJC

Internally Limited
14.2
Internally Limited
200

W
mW/"C
W

Tstg

-65 to +150

"C

TJ

+150

"C

mWrC

THERMAL CHARACTERISTICS
Symbol

Value

Unit

Thermal Resistance, Junction to Ambient

RSJA

65

"CIW

Thermal Resistance, Junction to Case

RSJC

5.0

"CIW

Rating

MC79M05C ELECTRICAL CHARACTERICISTICS (VI = -1 0 V, 10 = 350 mA, O"C < TJ < + 125"C, unless otherwise noted.)
Characteristics
Output Voltage (TJ = +25"C)

Symbol

Min

Typ

Max

Unit

Vo

--4.8

-5.0

-5.2

Vdc

-

7.0
2.0

50
30

-

30

100

mV

-

-5.25

Vdc
mA

Line Regulation (TJ = +25"C) (Note 1)
-7.0 Vdc ~ VI ~ -25 Vdc
-8.0 Vdc ~ VI ~ -18 Vdc

Regline

Load Regulation (TJ = +25"C) (Note 1)
5.0 mA $ 10 $ 500 mA

Regload

Output Voltage
-7.0 Vdc ~ VI

Vo
~

mV
-

--4.75

-25 Vdc, 5.0 mA $ 10 $ 350 mA

Input Bias Current (TJ = +25"C)

liB

Input Bias Current Change
-8.0 Vdc ~ VI ~ -25 Vdc, 10 = 350 mA
5.0 mA $10 $350 mA, VI =-10 V

-

4.3

8.0

-

-

0.4
0.4

mA

ililB

Output Noise Voltage (TA = +25"C, 10 Hz $ f $ 100 kHz)

Vn

-

40

-

Ripple Rejection (f = 120 Hz)

RR

54

66

-

dB

Dropout Voltage
10 = 500 mA, TJ = +25"C

VI-VO

-

1.1

-

Vdc

ilVoIilT

-

0.2

-

mVrC

Average Temperature Coefficient of Output Voltage
10 = 5.0 mA, O"C $ TJ $ +125"C

IlV

NOTES: 1. Load and line regulation are specified at constant temperature. Change In Vo due to heating effects must be taken Into account
separately. Pulse testing with low duty cycle is used.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-176

MC79MOO Series
MC79M12C ELECTRICAL CHARACTERICISTICS (VI ~ -19 V, 10 ~ 350 mA, O'C < TJ < + 125'C, unless otherwise noted.)
Characteristics
Output Voltage (TJ ~ +25'C)

Symbol

Min

Typ

Max

Unit

Vo

-·11.5

-12

-12.5

Vdc

-

5.0
3.0

80
50

-

30

240

Line Regulation (TJ ~ +25'C) (Note 1)
-14.5 Vdc ~ VI ~ -30 Vdc
-15 Vdc ~ VI ~ -25 Vdc

Regline

Load Regulation (TJ ~ +25'C) (Note 1)
5.0 mA ,; 10 ,; 500 mA

Regload

Output Voltage
-14.5 Vdc ~ VI

~

+25'C)

Output Noise Voltage (TA
~

~

-

-12.6

404

8.0

Vdc

+25'C, 10Hz'; f ,; 100 kHz)

mA
mA

L1IIB

120 Hz)
~

-

liB

Input Bias Current Change
-14.5 Vdc ~ VI ~ -30 Vdc, 10 ~ 350 mA
5.0 mA,; 10'; 350 mA, VI ~ -19 V

Dropout Voltage
10 ~ 500 mA, TJ

-1104

-30 Vdc, 5.0 mA,; 10 ,; 350 mA

Input Bias Current (TJ

Ripple Rejection (f

mV

-

-

004
004

Vn

-

75

-

RR

54

60

-

dB

VI-VO

-

1.1

-

Vdc

L1VO/LIT

-

-0.8

-

mV/'C

IlV

+25'C

Average Temperature Coefficient of Output Voltage
10 ~ 5.0 mA, O'C,; TJ'; +125'C

MC79M15C ELECTRICAL CHARACTERICISTICS (VI ~ -23 V, 10 ~ 350 mA, O'C < TJ < +125'C, unless otherwise noted.)
Characteristics
Output Voltage (TJ

~

+25'C)

Symbol

Min

Typ

Max

Unit

Vo

-14.4

-15

-15.6

Vdc

-

5.0
3.0

80
50

-

30

240

mV

-

-15.75

Vdc

-

4.4

8.0

mA

-

-

-

004
004

Vn

-

90

-

RR

54

60

-

dB

VI-VO

-

1.1

-

Vdc

L1VO/LIT

-

-1.0

-

mV/'C

Line Regulation (TJ ~ +25'C) (Note 1)
-17.5 Vdc ~ VI ~ -30 Vdc
-18 Vdc ~ VI ~ -28 Vdc

Regline

Load Regulation (TJ ~ +25'C) (Note 1)
5.0 mA ,; 10 ,; 500 mA

Regload

Output Voltage
-17.5 Vdc ~ VI

Vo
~-30

Input Bias Current (TJ

~

+25'C)

~

Dropout Voltage
10 ~ 500 mA, TJ

~

mA

L1IIB

+25'C, 10Hz,; f ,; 100 kHz)

120 Hz)
~

-14.25

liB

Input Bias Current Change
-17.5 Vdc ~ VI ~ -30 Vdc, 10 ~ 350 mA
5.0 mA,; 10'; 350 mA, VI ~ -23 V

Ripple Rejection (I

mV

Vdc, 5.0 mA,; 10'; 350 mA

Output Noise Voltage (TA

..
I

Vo
~

mV

IlV

+25'C

Average Temperature Coefficient of Output Voltage
10 ~ 5.0 mA, O'C ,; TJ ,; + 125'C

NOTES: 1. Load and line regulation are specified at constant temperature. Change in Vo due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-177

MOTOROLA

MC33267

SEMICONDUCTOR-----TECHNICAL DATA

LOW DROPOUT
REGULATOR with
POWER-UP RESET

Advance Information
Low Dropout Regulator
The MC33267 is a positive fixed 5.0 V regulator that is specifically designed
to maintain proper voltage regulation with an extremely low input-to-output
voltage differential. This device is capable of supplying output currents in
excess of 500 mA and contains internal current limiting and thermal shutdown
protection. Also featured is an on-chip power-up reset circuit that is ideally
suited for use in microprocessor based systems. Whenever the regulator output
voltage is below nominal, the reset output is held low. A programmable time
delay is initiated after the regulator has reached its nominal level and upon
timeout, the reset output is released.
Due to the low dropout voltage specifications, the MC33267 is ideally suited
for use in battery powered industrial and consumer equipment where an
extension of useful battery life is desirable. This device is contained in an
economical five lead TO-220 type package.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

TSUFFIX
PLASTIC PACKAGE
CASE 314D

• Low Input-to-Output Voltage Differential
• Output Current in Excess of 500 mA
• On-Chip Power-Up-Reset Circuit with Programmable Delay
• Internal Current Limiting with Thermal Shutdown
• Economical Five Lead TO-220 Type Package

TV SUFFIX
PLASTIC PACKAGE
CASE 314B
(LEAD FORMED)

PIN CONNECTIONS
Simplified Block Diagram

Input

o

r-----------------------, Output
15
I
I Reset

3.01

R

(

12
=1

0.03

R

I
I Delay
l4
200
I
I
-f 1.25V
.=:. ___________ .JI

Pin 1. Vee Input
2. Reset
3. Ground
4. Delay
5. Output

R

+---"IVv----i-0

(Heatsink surface connected to Pin 3)

ORDERING INFORMATION

3

Device

Temperature
Range
- 40° to +105'C

MC33267TV

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-178

Package
Plastic Pov

MC33267T

Plastic P01

MC33267
MAXIMUM RATINGS
Rating
Input Voltage Range
Delay Voltage Range
Delay Sink Current
Reset Voltage Range
Reset Sink Current
Power Dissipation and Thermal Characteristics
TffV Suffix, Plastic Package, Case 314
TA= 25°C
Thermal Resistance Junction-to-Ambient
TffV Suffix, Plastic Package, Case 314
TC = 90°C
Thermal Resistance Junction-to-Case
Operating Junction Temperature Range
Storage Temperature Range

Symbol

Value

Unit

Vin

-20 to + 40

Vdc

VDLYR

-0.3toVO

V

IDLY(sink)

25

rnA

VRR

- 0.3 to +15

V

IR(sink)

50

rnA

PD
SJA

2.0
62.5

W
°CfW

PD
SJC

15
4.0

W
°CfW

TJ

- 40 to +150

°C

Tstg

-55 to +150

°C

..

ELECTRICAL CHARACTERISTICS (Vin = 14.4 V, 10 = 5.0 rnA, Co = 100 ~F, CO(ESR) " 0.3 Q, TJ = 25°C, Note 1,
unless otherwise noted.)
Characteristic

Symbol

Output Voltage (10 = 5.0 rnA to 500 rnA, Yin = 6.0 V to 28 V)
TJ = 25°C
TJ = _40° to +125°C

Min

Typ

Max

4.95
4.9

5.05

5.15
5.2

V

Vo

-

Line Regulation (Vin = 6.0 V to 26 V)

Regline

-

3.0

50

Load Regulation (10 = 5.0 rnA to 500 rnA)

Regload

-

1.0

50

Bias Current
10= OmA
10= 150mA
10 = 500 rnA
10 = 500 rnA, Vin = 6.2 V

IB

Ripple Rejection (I = 120 Hz, Yin = 7.0 V to 17 V,
10 = 350 rnA, Co = 100 ~F)

RR

Dropout Voltage (10 = 500 rnA)
Delay Comparator Threshold (VO Decreasing)
Delay Pin Source Current
Reset Comparator Threshold
Reset Sink Saturation (lsink = 10 rnA)
Reset Off-State Leakage (VCE = 5.0 V)

mV
rnA

-

-

12
22
100
120

20
40
200
300

60

80

-

dB

-

0.58

0.8

V

Vth(DLY)

4.8

VO-0.15

VO-0.08

V

IDLY(source)

12

20

28

~

Vth(R)

3.6

3.8

4.0

V

0.2

0.8

V

0.3

10

~

IR(leak}

-

NOTE: 1. Low duty cycle pulse techniques are used dunng test to maintain lunctlon temperature as close to ambient as possible.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-179

mV

Vin-VO

VCE(sat)

..

Unit

MC33267
Figure 1. Typical Application Circuit

Input

r-----------------------------,

I

I Output

Vo

3.0t
R
Reset
rll-{2)-~-O Output

0.03
R

I
I
I
I Delay

R
Delay

200

I
L ____________ _
Ground

t.25V

-

I4
I
I
I

+

:::c CDlY

~--------------~
3

~
~

_ Sink Only
- Positive True logic

APPLICATION CIRCUIT INFORMATION
The MC33267 is a low dropout, positive fixed 5.0 V,
500 mA regulator. Protection features include output current
limiting and thermal shutdown. System protection consists
of an on-chip power-up microprocessor reset circuit.
A typical applications circuit is shown in Figure 1. The input
bypass capacitor (Cin) is recommended if the regulator is located an appreciable distance (~4") from the supply input
filter. This will reduce the circuit's sensitivity to the input line
impedance at high frequencies.
These regulators are not internally compensated and thus
require an external output capacitor (CO) for stability. The recommended capacitance is 100 JlF with an equivalent series
resistance (ESR) of less than 0.3 n. A minimum capacitance
of 33 IlF with a maximum ESR of 3.0 n can be used in applications where space is a premium, however, these limits
must be obseNed over the entire operating temperature
range of the regulator circuit.
With economical electrolytic capacitors, cold temperature
operation can pose a serious stability problem. As the

electrolyte freezes, around - 30°C, the capacitance will
decrease and the ESR will increase drastically, causing the
circuit to oscillate. Quality electrolytic capacitors with
extended temperature ranges of - 40°C to + 85°C and - 55°C
to +1 05°C are readily available. It is suggested that oven
testing of the entire circuit be performed with maximum load,
minimum input voltage, and minimum ambient temperature.
Figure 2 shows the reset circuit timing relationship. Note
that whenever the regulator's output is less than 4.9 V, the
delay capacitor (CDLy) is immediately discharged, and the
reset output is held in a low state. As the regulator's output
voltage increases beyond 4.97 V, the delay comparator will
allow the 20 JlA current source to charge CDLy. The reset
output will go to a high state when CDLY crosses the 3.8 V
threshold of the reset comparator. The reset delay time is
controlled by the value selected for CDLy. The required
system reset time is governed by the microprocessor and
usually a reset signal which lasts several machine cycles
is sufficient.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-180

MC33267
Figure 2. Timing Waveforms

4.70V
3.S0V

Delay Capacitor
(Pin 4)

------=-=I

-r-----......

5.05V - Regulator Output
(Pin5)

~-------

1--------

I
I
I

I
1
1

I

1

--1----

I

--~--

==~===-

iii

UJ

1

1

I

1

1

1

1

1

1

I

1

I

I

1

-i--- t

': -----r-!-----ij
tDLY

j ---

"I

14

tDLY

"I

Figure 4. Output Voltage versus Input Voltage
6.0

RL= 10 ktoVO
T _ 25°C

5.0

I
I
I

r- TJ = 25°C

5.0

C!l

!:§
a

!:§

I-

a.

I-

3.0

R[ =10Q

::>

a

tu

2.0

-?

1.0

~

2.0

a

-? 1.0

UJ

a:

3.0

'3

R = 00

en

§Z

I

II

o
o

2.0

4.0
Yin. INPUT VOLTAGE M

6.0

o
o

S.O

500
Yin = 4.95 V
TJ = 25°C

UJ

C!l

!:§

./'

600

a

I-

aa.
aa:

c
;:.-

200

..,-V

o
o

V

..,. V
100


0

~

300

6.0

z 300
UJ
a:
a:

'"
.ffi

200

4.0
Yin. INPUT VOLTAGE M

.s
I-

/'

400

0

-?

,/

./'

>

::>

2.0

Figure 6. Bias Current versus Input Voltage

Figure 5. Dropout Voltage versus Output Current
SOO

l

./' V

//
"'4 RL=10Q

RL= 00

~ 4.0

4.0

>

::>

I

I

Figure 3. Reset Output versus Input Voltage
~

----

1

14

6.0

..

--~----_I_-_r:----.l----

O.4SV

Reset Output
(Pin2)

150mV

400

500

600

200
R =10Q I--100

o

- 20

RL=oo
-10

10

20

Yin. INPUT VOLTAGE M

10. OUTPUT CURRENT (rnA)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-181

30

40

MOTOROLA

MC33269

SEMICONDUCTOR-----TECHNICAL DATA

Advance Information

III

Low Dropout Positive Voltage
Regulator Series

800mA
LOW DROPOUT
THREE-TERMINAL
VOLTAGE REGULATOR

The MC33269 series are low dropout, medium current, positive voltage
regulators specifically designed for use in low input voltage applications. These
devices offer the circuit designer an economical solution for precision voltage
regulation, while keeping power losses to a minimum.
The regulator consists of a 1.0 V dropout composite PNP-NPN pass
transistor, current limiting, and thermal shutdown.
• 3.3 V, 5.0 V, 12 V, and Adjustable Versions

DSUFFIX

PLASTIC PACKAGE
CASE 751
(SOP-8)

• Space Saving DPAK and SOP-8 Power Package
• 1.0 V Dropout
• Output Current in Excess of 800 mA

DTSUFFIX

PLASTIC PACKAGE
CASE 369A
(DPAK)

• Thermal Protection
• Short Circuit Protection
• Output Trimmed to 1.0% Tolerance
• No Minimum Load Required with the Fixed Voltage Output Devices

PIN CONNECTIONS

Vin l4

5J NC

(Top View)

Simplified Block Diagrams

W

1. GndlAdj

2. Vout

Fixed Output Version

T

3. Vin
4. Vout

MC33269

(Top View)

ifut

~ Gnd

ORDERING INFORMATION
Ambient
Temperature
Range
Device
Package
MC33269DT-3.3
DPAK
MC33269D-3.3
SOP-8
DPAK
MC33269DT-5.0
MC33269D-5.0
SOP-8
-40°10 +125°C
MC33269DT-12
DPAK
MC33269D-12
SOP-8
MC33269DT-ADJ
DPAK
MC33269D-ADJ
SOP-8

Adjustable Version
Vin

~

MC33269

Vout "
;;;:;

Adj

":"

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-182

MC33269
MAXIMUM RATINGS
Rating

Symbol

Value

Unit

Yin

20

V

Po
RSJA

Internally Limited
See Figure 2

mW
'CfW

Po
RSJA

Internally Limited
See Figure 1

mW
'CfW

TJ

-40 to +150

'c

Tstg

-55to+150

'C

Power Supply Input Voltage
Power Dissipation and Thermal Characteristics
DT Suffix, Plastic Package, Case 369-A
TA = 25'C, Derate Above TA = 25'C
Thermal Resistance, Junction-to-Air
o Suffix, Plastic Package, Case 751
TA = 25'C, Derate Above TA = 25'C
Thermal Resistance, Junction-to-Air
Operating Junction Temperature Range
Storage Temperature

ELECTRICAL CHARACTERISTICS (CO = 10 ~F, TA = 25'C, for minimax values TJ = - 40'C to + 125'C, unless otherwise noted.)
Characteristic

Symbol

Output Voltage (lout = 10 mA, TJ = 25'C)
- 3.3 Suffix
(VCC=5.3 V)
- 5.0 Suffix
(VCC = 7.0V)
-12 Suffix
(VCC = 14 V)
Output Voltage (Line, Load, and Temperature)
-3.3 Suffix
(VCC = 4.6 to 20 V, lout = 10 to 800 mAl
- 5.0 Suffix
(VCC = 6.35 to 20 V, lout = 10 to 800 mAl
-12 Suffix
(VCC = 13.5 to 20 V, lout = 10 to 800 mAl

Vout

Reference Voltage (lout = lamA, Yin - Vout = 2.0 V, TJ = 25'C)
Adjustable
Reference Voltage (Line, Load, and Temperature)
Adjustable

Vref

Line Regulation
(TJ = 25'C, lout = lamA, Yin = [Vout + 1.5 Vj to Yin = 20 V)

Regline

Load Regulation
(TJ = 25'C, lout = lamA to 800 mAl

Re9l0ad

Dropout Voltage (lout = 500 mAl

Min

Typ

Max

3.27
4.95
11.88

3.3
5.0
12

3.33
5.05
12.12

3.23
4.9
11.76

3.3
5.0
12

3.37
5.1
12.24

1.235

1.25

1.265

1.225

1.25

1.275

V

V

%

Current Limit
Quiescent Current
Fixed Output

-

-

0.3

-

-

0.5
1.25

%

-

1.0

RR

55

-

-

dB

ILimit

800

-

-

mA

-

5.5

8.0

-

-

Yin - Vout

Ripple Rejection (10 Vp_p , 120 Hz Sinewave; lout = 500 mAl

mA

ILoad

Adjustment Pin Current

a

8.0

-

-

-

-

120

IAdj

MOTOROLA LlNEARIiNTERFACE ICs DEVICE DATA
3-183

V

mA

IQ

Minimum Required Load Current
Fixed Output
Adjustable

Unit

~A

MC33269
Internal Schematic

J¥'

J¥'

I'-

I'-

I¥ I¥
I'- I'--

I¥

J¥'

~

I'--

Y
I'-

~

~t~

t

~
'--

'k~

~,

i1:
r

I;:

.v.. V

u::

V

r

~~

I¥
I'-

q~

r..

x

~r-r:

r..

fro"

y
~

.~

Vou

t---

~

~

H:

~

J.

_'L

Trim Unks
'---- t--

VAdj

~

~
?1
IIIl

_I... ..I..

II

80

I

----'l:,-J-i-i

120 ~!\~I--I-L--r~l'--~9.0~m"'-m

I

1\

\

70

o

~

ffi
c::

80 \

\

:lic::

t

'r-...
........... I--

50

--'

2.0oz

Copper

(1
U 'U

w

~

:li

'"

°OL-~1~0-~20--3~0--4LO-~50--~60-~70

40

L, LENGTH OF COPPER FLAGS
(mm)

o

1
10

20
L, LENGTH OF COPPER (mm)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-184

I

-l--

t

~

60

. . . . . .-

I

P.C. Board Heatsink Example

30

1
40

MC33269
Figure 3. Dropout Voltage versus
Output Load Current

Figure 4. Transient Load Regulation

1.5
TJ = 25°C

~
w 1.3

c

(!)

!:3

E

'"

~ 1.1
f:::J
aD..
aa:

0.9

c

~

::;

<
CD

o

ffi
a:

0.7

a:

.5

>

<
o

:::J

(.)

0.5

o

200

400

600

800

1000

5
go
:::J

20ms/DIV

a
cS

10, OUTPUT LOAD CURRENT (rnA)

Figure 5. MC34269-3.3 Ripple Rejection
versus Frequency

Figure 6. MC34269-5.0 Ripple Rejection
versus Frequency

70

70

-

iil

:a

f'.
r-

a

60

~

r-...

z

a

~

Vin = 6.3
IL= 800 rnA
TA = 25°C

"

50
Vin = B.OV
IL =800 rnA

13
a: 40 r- TA=25°C
~

D..
D..

12

0

a:
a:

20
0.1

1.0

10

:a

a
~
a:

60

a

50

z

>=

40

Figure 8. MC34269-ADJ Ripple Rejection
versus Frequency
70
iil

:a

a
z

r-

>=

(.)

w

13
a:

"

~

30
20
0.1

a

\

Vin = 15V
IL = BOO rnA
TA = 25°C

D..
D..

a:
a:

100

Figure 7. MC34269-12 Ripple Rejection
versus Frequency

~

60

'I"-

~
a:

w

12

10

t, FREQUENCY (kHz)

r-.....1'-

(.)

13
a:

1.0

t, FREQUENCY (kHz)

70
iil

30
20
0.1

100

.... 1'

1.0

10
t, FREQUENCY (kHz)

~

D..
D..

12

a:
a:

100

50

Vin =8.0V
Vout = 5.0V
40 ,--- IL = 800 rnA
CAdj =22I1F
TA= 25°C

30
20
0.1

IIII
1.0

10

t, FREQUENCY (kHz)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-185

100

MC33269
APPLICATIONS INFORMATION
Figures 9 through 13 are typical application circuits. The
output current capability of the regulator is in excess of 800
mA, with a typical dropout voltage less than 1.0 V. Internal
protective features include current and thermal limiting.
The MC33269 requires an external capacitor of at least
10 IlF with an ESR of less than 10 Q for stability over temperature. With economical electrolytic capacitors, cold temperature operation can pose a stability problem. As temperature
decreases, the capacitance also decreases and the ESR
increases, which could cause the circuit to oscillate. Tantalum capacitors may be a better choice if small size is a
requirement. Also, the capacitance and ESR of a tantalurn

capacitor is more stable over temperature. An input capacitor
is not necessary for stability, however, it will improve the overall performance of the part. Applications should be tested
over all operating conditions to insure stability.
Internal thermal limiting circuitry is provided to protect the
integrated circuit in the event that the maximum junction temperature is exceeded. When activated, typically at 170°C,
the output is disabled. There is no hysteresis built into the
thermal limiting circuit. As a result, if the device is overheating, the output will appear to be oscillating. This feature is
provided to prevent catastrophic failures from accidental
device overheating.

Figure 9. Typical Fixed Output Application

Figure 10. Typical Adjustable Output Application
Vout
MC33269

I
tOIlF

An input capacitor is not necessary for stability, however it
will improve the overall performance.

Figure 11. Current Regulator
RS

'CAdj is optional, however it will improve the ripple rejection.

lout

The MC34269-ADJ develops a t .25 V reference voltage
between the output and the adjuslterminal. Resistor Rt, oper·
ates with constant current to flow through it and resistor R2.
This current should be set such that the Adjust Pin current
causes negligible drop across resistor R2. The total current
with minimum load should be greater than 8.0 mAo

MC33269

I

Adj ' - - - - - - '

Figure 13. Digitally Controlled Voltage Regulator

Figure 12. Battery Backed-Up Power Supply

Vout

Vout

10IlF

R2 sets the maximum output voltage. Each transistor reduces
the output voltage when turned on.

The Schottky diode on the ground leg of the upper regulator
shifts its output voltage higher by the forward voltage drop of
the diode. This will cause the lower device to remain off until
the input voltage is removed.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-186

MC34023
MC33023

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Advance Information
High Speed Single-Ended
PWM Controller
The MC34023 series are high speed, fixed frequency, single-ended pulse width
modulator controllers optimized for high frequency operation. They are
specifically designed for Off-Line and DC-to-DC converter applications offering
the designer a cost-effective solution with minimal external components. These
integrated circuits feature an oscillator, a temperature compensated reference, a
wide bandwidth error amplifier, a high speed current sensing comparator, and a
high current totem pole output ideally suited for driving power MOSFET.
Also included are protective features consisting of input and reference
undervoltage lockouts each with hysteresis, cycle-by-cycle current limiting, and
a latch for single pulse metering.
The flexibility of this series allows it to be easily configured for either current
mode or voltage mode control.

PSUFFIX
PLASTIC PACKAGE
CASE 648

DWSUFFIX
PLASTIC PACKAGE
CASE 751G
(SO-16ll

PIN CONNECTIONS
Error Amp

Inverting Input
Error Amp
Noninverting Input
Error Amp Output

vre!
2

VCC
Output

3

• 50 ns Propagation Delay to Output

Vc

• High Current Totem Pole Output

Power Ground

• Wide Bandwidth Error Amplifier
• Fully-Latched Logic with Double Pulse Suppression

Ground
9 Current UmiV
- , ' - - _ - ' - Shutdown
[Top Viewl

• Latching PWM for Cycle-By-Cycle Current Limiting
• Soft-Start Control with Latched Overcurrent Reset
• Input Undervoltage Lockout with Hysteresis
• Low Start-Up Current (400 ~ Typ)
• Internally Trimmed Reference with Undervoltage Lockout

•

• 90% Maximum Duty Cycle (Externally Adjustable)

1. NC
2. Error Amp Inverting Input
3. Error Amp Noninverting Input
FN SUFFIX
4. EnorAmpOutput
PLASTIC PACKAGE
~: ~~Ck
CASE 775

• Precision Trimmed Oscillator
• Voltage or Current Mode Operation to 1.0 MHz
• Designed Replacement for the UC3823
Simplified Block Diagram

r--------------------,
16(2011
Vr.f 0-+---------_.-1
1r l_ _ _ _ _- - ,
Clock 40(5_

115(191

5(7)1

11.

12.
13.
14.
15.
16.
17.

RT

CT

7.
B.
9.
10.

lB.
19.
20.

6(BII

RT

CT
Ramp
Soft·Start
NC
Current Umit/S.D.
Ground
IUM Ref
Power Gnd
NC
Vc
Output
VCC
Vref

PIN CONNECTIONS
1

11

7(91 1
Ramp 0-1---------+1
Enor Amp 3(41 1
Oulput o-i-----,

[Top Viewl

Latching
PWMand
Steering
Flip Flop

2(31 1

I
I

111 (141
'--------;-1-0 IUM Ref
9(121
SofI-Start
(+--------'>--------'-oIUMI
IL _ _ _ _ _ _ _ _ _ _
I
Shutdown
________ J

'-----..J!1
~

10(131
Ground
Pin numbers in parenthesis (I are for FN suffix, PLCC package.

ORDERING INFORMATION
Device

MC34023P

Package

0° to +70°C

Plastic DIP

SO-16l

MC34023FN

PlCC

MC33023DW

SO-16l

MC33023P
MC33023FN

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-187

Temperature Range

MC34023DW

-40° to + 105°C

Plastic DIP
PlCC

MC34023, MC33023
MAXIMUM RATINGS
Rating
Power Supply Voltage

Symbol

Value

Unit
V

VCC

30

Output Driver Supply Voltage

Vc

20

Output Current, Source or Sink (Note 1)
DC
Pulsed (0.5 ~s)

10

Current Sense, Soft-Start, Ramp, and Error Amp Inputs

Vin

- 0.3 to +7.0

V

Error Amp Output and Solt-Start Sink Current

10

10

mA

ICO

5.0

mA

PD
RaJA

862
145

mW
'C/W

PD
RaJA

1.25
100

W
'C/W

PD
RaJA

1.73
72

W
'C/W

Operating Junction Temperature

TJ

+150

'c

Operating Ambient Temperature (Note 2)
MC34023
MC33023

TA

o to +70

Storage Temperature Range

Tstg

Clock and RT Output Current
Power Dissipation and Thermal Characteristics
SO-16L Package (Case 751G)
Maximum Power Dissipation@TA=25'C
Thermal Resistance Junction to Air
DIP Package (Case 648)
Maximum Power Dissipation@TA= 25'C
Thermal Resistance Junction to Air
PLCC Package (Case 775)
Maximum Power Dissipation @ TA = 25'C
Thermal Resistance Junction to Air

V
A

0.5
2.0

'C
- 40 to + 105
-55to+150

'c

ELECTRICAL CHARACTERISTICS (VCC = 15 V, RT = 3.65 kQ, CT = 1.0 nF, lor typical values TA = 25'C, lor min/max values TA is the
operating ambient temperature range that applies [Note 2], unless otherwise noted.)
Characteristics

I

Symbol

Min

Typ

Vrel

5.05

5.1

5.15

V

2.0

15

mV

Max

Unit

REFERENCE SECTION
Relerence Output Voltage (10 = 1.0 mA, TJ = 25'C)
Line Regulation (VCC = 10 V to 30 V)

Re9line

-

Load Regulation (10 = 1.0 mA to 10 mAl

Re9l0ad

-

2.0

15

Temperature Stability

TS

-

0.2

-

Total Output Variation over Line, Load, and Temperature

Vrel

Output Noise Voltage (I = 10Hz to 10kHz, TJ = 25'C)

Vn

Long Term Stability (TA = 125'C lor 1000 Hours)
Output Short Circuit Current

-

4.45

5.25

S

-

5.0

ISC

-30

-65

-100

losc

380
370

400
400

420
430

50

mV
mV/'C
V

-

~V

-

mV
mA

OSCILLATOR SECTION
Frequency
TJ = 25'C
Line (VCC = 10 V to 30 V) and Temperature (TA = Tlow to Thigh)

kHz

Frequency Change with Voltage (VCC = 10 V to 30 V)

t'!.loscll!"v

-

0.2

1.0

%

Frequency Change with Temperature (TA = Tlow to Thigh)

t'!.losc/t'!. T

-

2.0

-

%

Sawtooth Peak Voltage

VOSC(P)

2.6

2.8

3.0

V

Sawtooth Valley Voltage

VOSC(V)

0.7

1.0

1.25

V

VOH
VOL

3.9

4.5
2.3

Clock Output Voltage
High State
Low State

V

-

NOTES: 1. Maximum package power dissipation limits must be observed.
2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
Tlow = O'C for MC34023
Thigh = +70'C for MC34023
= - 40'C for MC33023
= +105'C for MC33023

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-188

2.9

MC34023, MC33023
ELECTRICAL CHARACTERISTICS (VCC = 15 V, RT = 3.65 kil, CT = 1.0 nF, for typical values TA = 25°C, for minimax values TA is the
operating ambient temperature range that applies [Note 2], unless otherwise noted.)
Symbol

Characteristics

Min

Typ

Max

Unit

ERROR AMPLIFIER SECTION
Input Offset Voltage

VIO

15

mV

liB

-

-

Input Bias Current

0.6

3.0

I1A

Input Offset Current

110

-

0.1

1.0

~A

AVOL

60

95

-

dB

-

MHz

Open-Loop Voltage Gain (VO = 1.0 V to 4.0 V)
Gain Bandwidth Product (TJ = 25°C)

BW

4.0

8.3

Common Mode Rejection Ratio (VCM = 1.5 V to 5.5 V)

CMRR

75

95

Power Supply Rejection Ratio (VCC = 10 V to 30 V)

PSRR

85

Output Current, Source (VO = 4.0 V)
Sink (VO = 1.0 V)
Output Voltage Swing, High State (IO = -0.5 rnA)
Low State (Io = 1 rnA)
Slew Rate

dB

110

-

ISource
ISink

0.5
1.0

3.0
3.6

-

rnA

VOH
VOL

4.5
0

4.75
0.4

5.0
1.0

SR

6.0

12

-

dB

V
V/~

PWM COMPARATOR SECTION
Ramp Input Bias Current

liB

Duty Cycle, Maximum
Minimum
Zero Duty Cycle Threshold Voltage Pin 3(4) (Pin 7(9) = 0 V)
Propagation Delay (Ramp Input to Output, TJ = 25°C)

-

-

D-

o

40

9

:Z
w

20

D-

o

.:J

~
<

0

RT=3.6k
CT= 1.0 nF

600

o

5-'
~

I'\.

~

\

400

107

105

104

1000

150kHz

o

-25

-55

0

125

:i!:1.28
w

~

hase"-

loOk
10k
lOOk
I. FREQUENCY (Hz)

100

1.3

Vcc=115V
Pin 7(9) = OV

45~ ~

~ain

100

o
25
50
75
TA. AMBIENT TEMPERATURE (DC)

Figure 4. PWM Comparator Zero Duty Cycle
Threshold Voltage versus Temperature

~

'"""'" '" "-

Rrl= 36 k
Cr=1.0nF

200

-§

120

z

400kHz

VCC=15V

IE
a:
'\.

-

~ 800

Figure 3. Error Amp Open-Loop Gain and
Phase versus Frequency
6l

Rr=1.2k
Cr= 1.0 nF

z

lose. OSCILLATOR FREQUENCY (Hz)

:s

1.0 MHz

o

~\

1. 100 n
2.47 nF
3.22 nF
4.10nF
5.4.7 nF
6.2.2 nF
7.1.0nF
8.470 pF
9.220 pF

47~00

VCC=15V
TA=25°C

~7

D-

~

"-.

1.0M

90~
w

~

0

~ 1.26
~

::::l

c

fE 1.24
w

N

V'

as t1.22

135

10M

1.2
- 55

--

-

-25

0

-...........

25

~

~

roo

TA. AMBIENT TEMPERATURE (DC)

Figure 6. Error Amp Large Signal
Transient Response

Figure 5. Error Amp Small Signal
Transient Response

2.55 V

3.0V

2.5 V

2.5 V

2.45 V

2.0 V
O.lI1S1DIV

O.lI1S1DIV

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-190

125

MC34023, MC33023
Figure 7. Reference Voltage Change
versus Source Current

§.

T4-.

;;;§.

w - 5.0

C!l

Z


:t:

w
u
z
w
a:
w
u.
w
a:

-20

'"
W
U

-25

w
a:

li
:>

-30

Z

64.8
64.4

- ---

~

w

a:
10

20
30
40
ISource. SOURCE CURRENT (rnA)

t:>

50

CJJ

64
- 55

-25

Figure 12. Shutdown Comparator Threshold
versus Temperature

Figure 11. Current Limit Comparator Offset
Voltage versus Temperature
100

1.50
_

§.

t:u

ff
u.

~

VCC;15V
Pin 11(14); 1.1 V

20

:::J

VCC;15V

z

1.46

C
I::J
:t:
CJJ
I-

1.42

w

1.38

s:0

0

!::
::;;

125

Vref LINE REGULATION 1.0 rnA -10 rnA
2rns/DIV

Vref LINE REGULATION 10 V - 24 V
2 rns/DIV

60

100

Figure 10. Reference Load Regulation

Figure 9. Reference Line Regulation

;;;-

0
25
50
75
TA. AMBIENTTEMPERATURE (0C)

- r---

Z

-20

a:
a:

I-

::J

u

Z

w

a:
w
>
0

a: -60
a:

::J

u

-100

-5
5

-25

25
50
75
TA. AMBIENT TEMPERATURE (OC)

100

125

1.34
1.30
- 55

-25

0
25
50
75
TA. AMBIENTTEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-191

.......... ......

100

125

MC34023, MC33023
Figure 13. Soft-Start Charge Current
versus Temperature

<"

10

i

o

I

~
I-

Figure 14. Output Saturation Voltage
versus Load Current
w

Vee=15V

9.5

=> 9.0
o
w

~

8.5

~

8.0

/'

V

-

............

j$

'"ti::

15o

7.5

J

~

ir 7.0

_u

-55

§?
~ -2.0

~
~
'"
5

-~

0
~
00
~
TA. AMBIENT TEMPERATURE (0C)

100

2.0

/
V

1.0

Source Saturation
(load to Ground)

-

o

-

G~Und -

~

o

125

v6e

Vee = 1 5 V - 80 !1s Pulsed load
120Hz Rate
TA = 25°C

:..J

............

I
I

..........

~-1.0

0.2

0.4

_

~

Sink Saluralion _
(load to Vee)

0.6

0.8

10. OUTPUT LOAD CURRENT (A)

Figure 15. Drive Output Rise and Fall Time

Figure 16. Drive Output Rise and Fall Time

OUTPUT RISE & FALL TIME 1.0 nF LOAD
50nsJDIV

OUTPUT RISE & FALL TIME 10.0 nF LOAD
50 ns/DiV

Figure 17. Supply Voltage versus Supply Current
30
_

J

Rr=3.65kn
Cr=I.0nF
Vee Increasing
Vee Decreasing

o

o

4.0

8.0
12
Vee. SUPPLY VOLTAGE M

16

20

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-192

1.0

MC34023, MC33023
Figure 18. Representative Block Diagram
VCC

Vin

11(14)

1---/0 Current UmH Reference
19(12)
+-----/0 Current UmillShutdown

Pin numbers in parenthesis ( ) are for FN suffix, PLCC package.

Figure 19. Current Limit Operating Waveforms

Ctock

Soft-Start Outpull
Compensation Ramp
PWM
Comparator

~,-----,nL--------,nL--------,n,-----,n,------,n,------,n
-~-71-"-L--_-~~/1-::::;-,--=--=-~-~----::::::1---:;;;~-

-------' '---------' '---------' '---------'~

Output

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-193

~

L

/
MC34023, MC33023
OPERATING DESCRIPTION
The MC33023 and MC34023 series are high speed, fixed
frequency, single-ended pulse width modulator controllers
optimized for high frequency operation. They are specifically
designed for Off-Line and DC-to-DC converter applications
offering the designer a cost effective solution with minimal
external components. A representative block diagram is
shown in Figure 18.
Oscillator
The oscillator frequency is programmed by the values
selected for the timing components RT and CT. The RT pin
is set to a temperature compensated 3.0 V. By selecting the
value of RT, the charge current is set through a current mirror
for the timing component (CT). This charge current runs
continuously through CT. The discharge current is ratioed to
be 10 times the charge current, which yields the maximum
duty cycle of 90%. CT is charged to 2.8 V and discharged
to 1.0 V. During the discharge of CT, the oscillator generates
an internal blanking pulse that resets the PWM Latch, inhibits
the outputs, and toggles the steering flip-flop. The threshold
voltages on the oscillator comparator is trimmed to guarantee
an oscillator accuracy of 5.0% at 25°C.
Additional dead time can be added by externally
increasing the charge current to CT. This changes the charge
to discharge ratio of CT which is set internally to Ichargef10
Icharge. The new charge to discharge ratio will be:
% Deadtime =

ladditional + Icharge
10 (Icharge)

A bidirectional clock pin is provided for synchronization
or for master/slave operation. When synchronizing the
MC34023 to an external clock source, the. oscillator should
be set about 10% less than the external clock frequency. If
master/slave operation of more than one MC34023 is
desired, the master IC should have the desired RT, CTvalues.
The clock pin of the master is connected to the clock pin
on the slave(s). The RT pin on the slave(s) should be
connected to Vref and the CT pin should be connected to
ground. If the master IC is not close to the slave IC(s), the
clock pin should be buffered. Refer to Figures 27, 28, and
29 for some application hints.
Error Amplifier
A fully compensated Error Amplifier is provided. It features
a typical DC voltage gain of 95 dB and a unity gain bandwidth
of 5.5 MHz with 75 degrees of phase margin (Figure 3).
Typical application circuits will have the noninverting input
tied to the reference. The inverting input will typically be
connected to a feedback voltage generated from the output
of the switching power supply. The Error Amplifier Output is
provided for external loop compensation.
Soft-Start Latch
Soft-Start is accomplished in conjunction with an external
capacitor. The Soft-Start capacitor is charged by an internal
10 IlA current source. This capacitor clamps the output of

the error amplifier to less than its normal output voltage, thus
limiting the duty cycle. The time it takes for a capacitor to
reach full charge is given by:
t = (4.5 • 105)CSoft-Start
A Soft-Start latch is incorporated to prevent erratic
operation of this circuitry. Two conditions can cause the SoftStart circuit to latch so that the Soft-Start capacitor stays
discharged. The first condition is activation of an
undervoltage lockout of either VCC or Vref. The second
condition is when current sense input exceeds 1.4 V. Since
this latch is "set dominant", it cannot be reset until either of
these signals is removed and, the voltage at CSoft-Start is less
than 1.0 V.
PWM Comparator and Latch
A PWM circuit typically compares an error voltage with
a ramp signal. The outcome of this comparison determines
the state of the output. In voltage mode operation the ramp
signal is the voltage ramp of the timing capacitor. In current
mode operation the ramp signal is the voltage ramp induced
in a current sensing element. The ramp input of the PWM
comparator is pinned out so that the user can decide which
mode of operation best suits the application requirements.
The ramp input has a 1.25 V offset such that whenever the
voltage at this pin exceeds the error amplifier output voltage
minus 1.25 V, the PWM comparator will cause the PWM latch
to set, disabling the outputs. Once the PWM latch is set, only
a blanking pulse by the oscillator can reset it, thus initiating
the next cycle.
Current Limiting and Shutdown
A pin is provided to perform current limiting and shutdown
operations. Two comparators are connected to the input of
this pin. The reference voltage for the current limit comparator
is not set internally. A pin is provided so the user can set
the voltage. When the voltage at the current limit input pin
exceeds the externally set voltage, the PWM latch is set,
disabling the output. In this way cycle-by-cycle current
limiting is accomplished. If a current limit resistor is used in
series with the power devices, the value of the resistor is
found by:
R
_ ILimit Reference Voltage
Ipk(switch)
Sense -

If the voltage at this pin exceeds 1.4 V, the second
comparator is activated. This comparator sets a latch which,
in turn, causes the soft start capacitor to be discharged. In
this way a "hiccup" mode of recovery is possible in the case
of output short circuits. If a current limit resistor is used in
series with the output devices, the peak current at which the
controller will enter a "hiccup" mode is given by:
1.4 V
Ishutdown = - - RSense

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-194

MC34023, MC33023
Undervoltage Lockout
There are two undervoltage lockout circuits within the IC.
The first senses VCC and the second Vref. During power-up,
VCC must exceed 9.2 V and Vref must exceed 4.0 before
the outputs can be enabled and the Soft-Start latch released.
If VCC falls below 8.4 V or Vref falls below 3.6 V, the outputs
are disabled and the soft start latch is activated. When the
UVLO is active, the part is in a low current standby mode
allowing the IC to have an off-line bootstrap start-up circuit.
Typical start-up current is 400 !lA.
Output
The MC34023 has a high current totem pole output
specifically designed for direct drive of power MOSFETs.
They are capable of up to ±2.0 A peak drive current with a
typical rise and fall time of 30 ns driving a 1.0 nF load.
Separate pins for Vc and Power Ground are provided.
With proper implementation, a significant reduction of
switching transient noise imposed on the control circuitry is
possible. The separate Vc supply input also allows the
designer added flexibility in tailoring the drive voltage
independent of VCC.
Reference
A 5.1 V bandgap reference is pinned out and is trimmed
to an initial accuracy of ±1.0% at 25°C. This reference has
short circuit protection and can source in excess of 10 rnA
for powering additional control system circuitry.
Design Considerations
Do not attempt to construct the converter on
wire-wrap or plug-in prototype boards. With high
frequency, high power, switching power supplies it is
imperative to have separate current loops for the signal paths
and for the power paths. The printed circuit layout should
contain a ground plane with low current signal and high
current switch and output grounds returning on separate
paths back to the input filter capacitor. Shown in Figure 35
is a printed circuit layout of the application circuit. Note how
the power and ground traces are run. All bypass capacitors
and snubbers should be connected as close as possible to
the specific part in question. The PC board lead lengths must
be less than 0.5 inches for effective bypassing for snubbing.
Instabilities
In current mode control, an instability can be encountered
at any given duty cycle. The instability is caused by the
current feedback loop. It has been shown that the instability
is caused by a double pole at half the switching frequency.
If an external ramp (Se) is added to the on-time ramp (Sn)
of the current-sense waveform, stability can be achieved (see
Figure 20).
One must be careful not to add too much ramp
compensation. If too much is added the system will start
to perform like a voltage mode regulator. All benefits of
current mode control will be lost. Figure 25 is an example
of one way in which external ramp compensation can
be implemented.

Figure 20. Ramp Compensation
Ramp Compensation

,

Ramp Compensation
Se

A simple equation can be used to calculate the amount
of external ramp necessary to add that will achieve stability
in the current loop. For the following equations, the calculated
values for the application circuit in Figure 34 are also shown.
Se = Vseda(max) - 0.18)Ai
L
where: Vsec = minimum voltage at the input of
the output inductor
a(max) = maximum duty cycle
Ai = gain of the current sense network
(see Figures 23, 24, and 25)
L = output inductor
7(0.8 - 0.18)0.075
1.8 ~
= 18 _ 104

For the application circuit: Se =

As a sanity check, the modulator gain of the circuit can
be calculated by:
mc1 = 1 + SetSn
di
Sn=di Ai
where:

di = output inductor slope
dt = maximum on time
Ai = gain of the current sense network
(see Figures 25, 26, 27).

For the application circuit:
Sn =
mc1

~6
0.8 -10

=1 +

18 - 104
22.5 _10 4

= 1.8

This can be compared against the maximum modulator gain
necessary to make the system immune to audio
susceptibility tests:
2-a
.
mc2 = - - ,where: a = max duty cycle
2a'
a' = 1-max duty cycle
2-0.8
For the application circuit: mc2 = 2(0.2) = 3, mc2 should
be larger than mc1.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-195

0.075 = 22.5 _10 4

MC34023, MC33023
PIN FUNCTION DESCRIPTION
Pin
DIP/SOle

PLCC

Function

Description

1

2

Error Amp Inverting Input

This pin is usually used for feedback from the output of the power supply.

2

3

Error Amp Noninverting Input

This pin is used to provide a reference in which an error signal can be
produced on the output of the error amp. Usually this is connected to Vref,
however an external reference can also be used.

3

4

Error Amp Output

This pin is provided for compensating the error amp for poles and zeros
encountered in the power supply system, mostly the output LC filter.

4

5

Clock

5

7

RT

The value of RT sets the charge current through timing Capacitor, CT.

6

8

CT

In conjunction with RT, the timing Capacitor sets the switching frequency.
Because this part is a push-pull output, each output runs at one-half the
frequency set at this pin.

7

9

Ramp Input

For voltage mode operation this pin is connected to CT. For current mode
operation this pin is connected through a filter to the current
sensing element.

8

10

Soft-Start

9

12

Current LimiVShutdown

This is a bidirectional pin used for synchronization.

A capacitor at this pin sets the Soft-Start time.
This pin has two functions. First, it provides cycle-by-cycle current limiting.
Second, if the current is excessive, this pin will reinitiate a
Soft-Start cycle.

10

13

Ground

This pin is the ground for the control circuitry.

11

14

Current Limit Reference Input

This is a high current dual totem pole output.

12

15

Power Ground

This is a separate power ground return that is connected back to the
power source. It is used to reduce the effects of switching transient noise
on the control circuitry.

13

17

Vc

This is a separate power source connection for the outputs that is
connected back to the power source input. With a separate power
source connection, it can reduce the effects of switching transient noise
on the control circuitry.
This is a high current dual totem pole output.

14

18

Output

15

19

VCC

This pin is the positive supply of the control IC.

16

20

Vref

This is a 5.0 V reference. It is usually connected to the noninverting input
of the error amplifier.

Figure 21. Voltage Mode Operation

Figure 22. Current Mode Operation

t.25V

Output Voltage
Feedback Input

Output Vottage
Feedback Input
In voltage mode operation. the control range on the output of the Error
Amplilier from 0% to 90% duty cycle is from 2.25 V to 4.05 V.

In current mode control, an RC filter should be placed at the ramp input
to filter the leading edge spike caused by turn·on of a power MOSFET.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-196

MC34023, MC33023
Figure 24. Primary Side Current Sensing

Figure 23. Resistive Current Sensing

!

IS ense

______ J

The addition of an RC fitter will eliminate instability caused by the leading
edge spike on the current waveform. This sense signal can also be used at
the ramp input pin for current mode control. For ramp compensation it is
necessary to know the gain of the current feedback loop. If a transformer is
used, the gain can be calculated by:

The addition of an RC filter will eliminate instability caused by the leading
edge spike on the current waveform. This sense signal can also be used at
the ramp input pin for current mode control. For ramp compensation it is
necessary to know the gain of the current feedback loop. The gain can be
calculated by:
Rw
Ai = turns ratio

A- = RSense
I

turns ratio

Figure 25A. Slope Compensation (Noise Sensitive)
4(S)Q-L-_ _ _ _ _ _-,

Current Sense
A1
7(9):
1.2SV
Information ()'IN\I--+--''-'<~
A2
3(4) :
This method of slope compensation is easy to implement, however, it is noise
sensitive. Capacitor C1 provides AC coupling. The oscillator signal is added to the
current signal by a voltage divider consisting of resistors R1 and R2'

Figure 258. Slope Compensation (Noise Immune)
Output

Current Sense
Transformer
Aw

Output

Af

Aamp
Input
Ramp
Input
7(9):

7(9):

1.2SV

~Q.;------.J~

1.2SV

-lCtII-+--3(~

O-....
AM--'VI."rCM-X
...
_

Curren! Sense
Aeslstor

riJ
Af

M

Ct

3(~

When only one output, this method of slope compensation can be used and it is relatively noise immune. Resistor RM and capacitor CM provide the added
slope necessary. By choosing RM and CM with a larger time constant than the switching frequency, you can assume that its charge is linear. First choose CM,
then RM can be adjusted to achieve the required slope. The diode provides a reset pulse the ramp inputs at the end of every cycle. The charge current 1M can
be calculated by 1M = CMSe' Then RM can be calculated by RM = VCcllM

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-197

MC34023, MC33023
Figure 27. External Clock Synchronization

Figure 26. Dead Time Addition

5.0V -

Vrel

ROT

OV

4(5)

JlJL

-.=..='-'=--------------------'--0 tUMI

L __________

~

_________

1
~

Shutdown

MC34025FN

PLCC

MC33025DW

SO-ISL

MC33025P

10(13)
Ground
Pin numbers in parenthesis () are lor FN suffix. PLCC package.

MC33025FN

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-203

-40° to + 105°C

Plastic DIP
PLCC

MC34025, MC33025
MAXIMUM RATINGS
Rating
Power Supply Voltage

Symbol

Value

Unit

VCC

30

V

Output Driver Supply Voltage

Vc

20

V

Output Current, Source or Sink (Note 1)
DC
Pulsed (0.5 I1S)

10

Current Sense, Soft-Start, Ramp, and Error Amp Inputs

Yin

-0.3to +7.0

V

Error Amp Output and Soft-Start Sink Current

10

10

mA

ICO

5.0

mA

Po
RaJA

862
145

mW
°C/W

Po
RaJA

1.25
100

W
°C/W

Po
RaJA

1.73
72

W
°C/W

Operating Junction Temperature

TJ

+150

°C

Operating Ambient Temperature (Note 2)
MC34025
MC33025

TA

o to +70

Clock and RT Output Current
Power Dissipation and Thermal Characteristics
SO-16 Package (Case 751G)
Maximum Power Dissipation@TA=25°C
Thermal Resistance, Junction-to-Air
DIP Package (Case 648)
Maximum Power Dissipation @ TA = 25°C
Thermal Resistance, Junction-to-Air
PLCC Package (Case 775)
Maximum Power Dissipation @ TA = 25°C
Thermal Resistance, Junction-to-Air

Storage Temperature Range

A
0.5
2.0

°C

-40 to + 105
-55 to +150

Tstg

°C

ELECTRICAL CHARACTERISTICS (VCC = t 5 V, RT = 3.65 kn, CT = 1.0 nF, lor typical values TA = 25°C, for min/max values TA is the
operating ambient temperature range that applies [Note 2], unless otherwise noted.)
Characteristics

I

I

Symbol

Min

Typ

Vref

5.05

5.1

5.15

V

2.0

15

mV

Max

Unit

REFERENCE SECTION
Relerence Output Voltage (10 = 1.0 rnA, T J = 25°C)
Line Regulation (VCC = 10 V to 30 V)

Regline

Load Regulation (10 = 1.0 rnA to lOrnA)

Regload

Temperature Stability

TS

Total Output Variation over Line, Load, and Temperature

Vrel

Output Noise Voltage (I = 10Hz to 10kHz, T J = 25°C)

Vn

Long Term Stability (TA = 125°C lor 1000 Hours)

S

Output Short Circuit Current

-

2.0

15

mV

0.2

-

mY/DC

-

4.95

-

50

-

5.0

5.25

V

-

I1V

-

mV

ISC

-30

-65

-100

mA

losc

380
370

400
400

420
430

Frequency Change with Voltage (VCC = 10 V to 30V)

I!.losc/I!.V

-

0.2

1.0

%

Frequency Change with Temperature (TA = Tlow to Thigh)

I!.losdl!.T

-

2.0

-

%

VOH
VOL

3.9

-

-

4.5
2.3

2.9

Sawtooth Peak Voltage

Vp

2.6

2.8

3.0

V

Sawtooth Valley Voltage

Vv

0.7

1.0

1.25

V

OSCILLATOR SECTION
Frequency
TJ = 25°C
Line (VCC = 10 V to 30 V) and Temperature (TA = Tlow to Thigh)

kHz

Clock Output Voltage
High State
Low State

V

NOTES: 1. Maximum package power dissipation limits must be observed.
2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.

TIOW:

~o;o~~~~~i:°3~025

Thigh:

:ig~?6~~~~g~~~~5

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-204

MC34025, MC33025
ELECTRICAL CHARACTERISTICS (VCC = 15 V, RT = 3.65 kQ, CT = 1.0 nF, for typical values TA
TA is the operating ambient temperature range that applies [Note 21, unless otherwise noted.)

= 25°C, for minimax values

Characteristics

ERROR AMPLIFIER SECTION
Input Offset Voltage

VIO

15

mV

liB

-

-

Input Bias Current

0.6

3.0

l!A

Input Offset qurrent

110

-

0.1

1.0

l!A

AVOL

60

95

GBW

4.0

8.3

-

CMRR

75

95

PSRR

85

110

ISource
ISink

0.5
1.0

3.0
3.6

-

VOH
VOL

4.5
0

4.75
0.4

5.0
1.0

SR

6.0

12

liB

-

= 1.0 V to 4.0 V)
Gain Bandwidth Product (TJ = 25°C)
Common Mode Rejection Ratio (VCM = 1.5 V to 5.5 V)
Power Supply Rejection Ratio (VCC = 10 V to 30 V)
Output Current, Source (VO = 4.0 V)
Sink (VO = 1.0 V)
Output Voltage Swing, High State (10 =- 0.5 mAl
Low State (10 = ·1 mAl
Open-Loop Voltage Gain (VO

Slew Rate

-

dB
MHz
dB
dB
mA
V
V/l!S

PWM COMPARATOR SECTION
Ramp Input Bias Current
Duty Cycle
Maximum
Minimum
Zero Duty Cycle Threshold Voltage Pin 3(4) (Pin 7(9) = 0 V)
Propagation Delay (Ramp Input to Output, TJ = 25°C)

-0.5

-5.0

DC(max)
DC(min)

80

90

-

-

-

0

Vth

1.1

tPLH(in/out)

-

l!A

%

1.25

1.4

V

60

100

ns

SOFT-START SECTION
Charge Current (VSoft-Start = 0.5 V)
Discharge Current (VSoft-Start = 1.5 V)

CURRENT SENSE SECTION
Input Bias Current (Pin 7(9)

= 0 V to 4.0 V)

Propagation Delay (Current LimiVShutdown to Output, T J

= 25°C)

-

-

15

l!A

Vth
Vth

0.9
1.25

1.0
1.40

1.10
1.55

V

tPLH(in/out)

-

50

80

ns

0.4
2.2

V

13
12

0.25
1.2
13.5
13

VOL(UVLO)

-

0.25

1.0

V

IL

-

100

500

l!A

tr

-

30

60

ns

tf

-

30

60

ns

liB

Current Limit Comparator Threshold
Shutdown Comparator Threshold

OUTPUT SECTION
Output Voltage, Low State (ISink = 20 mAl
(lSink = 200 mAl
High State (ISource = 20 mAl
(lSource = 200 mAl

VOL
VOH

= 6.0 V, ISink = 0.5 mAl
= 20 V)
Output Voltage Rise Time (CL = 1.0 nF, TJ = 25°C)
Output Voltage Fall Time (CL = 1.0 nF, T J = 25°C)
Output Voltage with UVLO Activated (VCC

Output Leakage Current (VC

-

-

UNDERVOLTAGE LOCKOUT SECTION
Start-Up Threshold (VCC Increasing)
UVLO Hysteresis

TOTAL DEVICE
Power Supply Current
Start-Up
Operating

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-205

-

MC34025, MC33025
Figure 1. Timing Resistor versus
Oscillator Frequency

Figure 2. Oscillator Frequency versus Temperature

lOOk

1200
i~ f'lils

II"li

9:
~

!,

II:

ffl
II:

10k

~
~

F

t=-

Il:

1.0k

Cr=
1.I00nF
2. 47 nF
3.22 nF
4.10nF
5. 4.7 nF
6. 2.2 nF
7.1.0nF
8.470 pF
9.220 pF

470
100

4

,r\

• VCC=15V
, TA=25DC

\i:'li

,\
'\.

i

"N'

:I:

I'\.

W

800

IE
II:

600

§

r\~

ED

:z

~
W

I'\.

\

rd\

400

o

200

5
en

\

~

60

0

40

!:!i
9

zW

50kHz
-~

'\: ...........

~
<

0
~
~
~
TA. AMBIENTTEMPERATURE (DC)

100

125

Figure 4. PWM Comparator Zero Duty Cycle
Threshold Voltage versus Temperature

"-

2:1.28
452: ~
w ~
~ (.") 1.26

~ain

~

ll.

~

0

..:.

CT= 1.0nF

1.3

20

ll.

I

1000
104
105
106
lose. OSCILLATOR FREQUENCY (Hz)

Phase"\..

ll.

Rr= 3.6 k
Cr=1.0nF

-

Rr =36k

-§

100 ~

80

400 kHz

o

5-'

120

0

RT=I.2k
CT=1.0nF

VCC=15V

Figure 3. Error Amp Open-Loop Gain and
Phase versus Frequency
:5!.

1.0 MHz
1000

0

100

1.0k
10k
lOOk
I. FREQUENCY (Hz)

~ 1.24
V"
~ ~

90!B

~
~ 135cr.-

1.0M

5

VCC=15V
Pin 7(9) = OV

:£il.22
1.2
-55

10M

---25

-.......

0
25
50
75
TA. AMBIENT TEMPERATURE (DC)

Figure 6. Error Amp Large Signal
Transient Response

Figure 5. Error Amp Small Signal
Transient Response

2.55 V

3.0 V

2.5 V

2.5V

2.45 V

2.0 V
O.II1SJDIV

O.ll1sJDIV

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-206

100

125

MC34025, MC33025
Figure 7. Reference Voltage Change
versus Source Current

~
w

~

o

l-h

-5.0
Vee=15V

\
125°C \

CJ

-15

~

-20

g

I

!z
w

66

G

65.6

II:
II:

~55°C

!::

~ 65.2

,

\ 25°C

u
Ii:
c
:I:

rn
w

64.8

u

"Iii -30

ffi

64.4

~

64

II:

-25

:$"

VCC = 15V

:::J

-10

w

!:§

1

Figure 8. Reference Short Circuit Current
versus Temperature

10

0

C)

20
30
40
ISource• SOURCE CURRENT (mA)

50

!!?

-

-55

Figure 9. Reference Line Regulation

25


E

'"

'"

Vrel UNE REGULATION 1.0 mA - 10 mA
2msJDIV

Figure 11. Current Limit Comparator Threshold
versus Temperature
100.----,----,---,----,----,---,---,

~

60 f_ Vee 15 V

+----+---+----f----+_--I

~
:::I

-2Or---~r_--+----+----+_--~----r_--~

~

1.50
~

z

:;:

1.46

VCC= 15V

0

It
c

!z
w

Figure 12. Shutdown Comparator Threshold
versus Temperature

c
20f----+--~----~--+_--~--_+--~

!::

~~--~f_--1_--_+----+_--~----f---1

G

....

:::J
:I:

1.42

w

1.38

w

1.34

rn
....
Z

II:
II:
:::J
U
II:

>
0

-100 L..._....l.._---L_ _I..-_...L.-_....L.._.....L.__---l
-55

125

c

:>

Vret UNE REGULATION 10 V - 24 V
2 msJDlV

t:u

100

Figure 10. Reference Load Regulation


r

Z
m
>
~

c.J

z--f

100pF

1(2) I

5.4k

47k
I
8(10)1

s:

o
w

100

~
to)

TO.Oll

-=-

m
~ :D
~
()
m

I

iI

Ol

r~
-=-

.J

~1.4vl
~
I

91

220pF

s:
ow

Shutdown

L---------w~~-----------J

w

0CII

o
to)

0

m

<
0

UI
Pin numbers in parenthesis ( ) are FN suffix, PLCC package.

m

0

~
»

Tl- Primary16 turns #48 AWG (1300 strands Iitz wire)
Secondary: 4 turns center tapped 0.003" (2 layers) copper foil
Bootstrap: 1 turn added to each secondary output #36 AWG
Core: Philips 3F3 part #4312 0204124
Bobbin Philips part #4322 021 3525
Coilcraft P3269-A
Ll - 2 turns #48 AWG (1300 strands lilz wire)
Core: Philips 3F3 part #EP10-3F3
Bobbin: Philips part #EPl OPCBl-8
L= 1.81lH
Coilcral! P3270-A
L2 - 7 turns #18 AWG, 1/2" diameter air core
Coilcral! P3271-A
Heatsinks - Power FET: AAVID Heatsink #533902B02554 with clip
Output Recitfiers: AAVID Heatsink #533402B02552 with clip
Insulators - All power devices are insulated with Berquist Sil-Pad 1500
ill - 10 (1.0 1lF) ceramic capacitors in parallel
5 (1.5 0) resistors in parallel
@ _ 2( 1.0 IlF) ceramic capacitors in parallel

®_

Test
Line Regulation

Results

Condition
Vin = 40 V to 56 V, 10 = 15 A

14 mV = ± 0.275%

Load Regulation

Vin = 48 V, 10 = 8.0 V to 15 A

54 mV =±1.0%

Output Ripple

Vin = 48 V, 10 = 15 A

50 mVp-p

Efficiency

Vin = 48 V, 10 = 15 A

71.2%

MC34025, MC33025

•

I-

Figure 37. PC Board With Components

6.5"-----------------1
.. 1
(Top View)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-217

MC34025, MC33025

•

Figure 38. PC Board Without Components

III

(Top View)

•

14
.---------------

6.5" -------------------t~1
(Bottom View)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-218

•

MOTOROLA

MC34060

SEMICONDUCTOR-----TECHNICAL DATA

Switch mode Pulse Width
Modulation Control Circuit

SWITCHMODE
PULSE WIDTH MODULATION
CONTROL CIRCUIT

The MC34060 is a low cost fixed frequency, pulse width modulation control
circuit designed primarily for single ended SWITCHMODE power supply control.
This device features:
• Complete Pulse Width Modulation Control Circuitry
• On-Chip Oscillator With Master or Slave Operation
• On-Chip Error Amplifiers
• On-Chip 5.0 V Reference
• Adjustable Dead Time Control
• Uncommitted Output Transistor for 200 mA Source or Sink

PSUFFIX
PLASTIC PACKAGE
CASE 646

MAXIMUM RATINGS (Full operating ambient temperature range applies.)
Rating

Symbol

Value

Unit

VCC

42

V

Vc

42

V

Collector Output Current

IC

250

rnA

Amplifier Input Voltage

Vin

VCC+0.3

V

Power Dissipation @ TA';; 45°C

PD

1000

mW

Power Supply Voltage
Collector Output Voltage

Operating Junction Temperature

TJ

125

°C

Operating Ambient Temperature Range

TA

Ot070

°C

Tstg

-55 to 125

°C

Storage Temperature Range

Characteristics

Symbol

Value

Unit

Thermal Resistance, Junction-to-Ambient

RaJA

80

°C/W

1/RaJA

12.5

mW/oC

TA

45

°C

Derating Ambient Temperature

Noninv

Noninv
Input

Input
Inv
Input

Inv
Input
3

1--_ _-'

Dead-Time
Control

THERMAL CHARACTERISTICS

Power Derating Factor

PIN CONNECTIONS

Compen PWM
Comp Input

VCC

Ground

7

1-------'

[Top View)

ORDERING INFORMATION
Device
MC34060P

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-219

..

I

SILICON MONOLITHIC
INTEGRATED CIRCUIT

Ten;raerature
ange

Package

0° to+70°C

Plastic DIP

MC34060
RECOMMENDED OPERATING CONDITIONS
Condition
Power Supply Voltage
Collector Output Voltage

Symbol

Min

Typ

Max

Unit

VCC

7.0

15

40

V

-

30

40

V
mA

Vc

-

-

200

-

VCC-2

V

-

0.3

mA

10

mA

500

kil

Collector Output Current

IC

Amplifier Input Voltage

Vin

Current Into Feedback Terminal

Ifb

Reference Output Current

Iref

-

-

RT

1.8

47

Timing Capacitor

CT

0.00047

0.001

10

j.LF

Oscillator Frequency

fosc

1.0

25

200

kHz

5.0

5.25

V

Timing Resistor

-D.3

-

ELECTRICAL CHARACTERISTICS VCC = 15 V, CT = 0.01 j.LF, RT = 12 kil, unless olherwise noted.
For typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies.
Characteristics
REFERENCE SECTION
Reference Voltage
(10 = 1.0 mAl

Vref

4.75

Input Regulation.
(VCC = 7.0 V to 40 V)

Regline

-

2.0

25

mV

Output Regulation
(10 = 1.0 mA to 10 mAl

Regload

-

3.0

15

mV

ISC

15

35

75

mA

Collector Off-State Current
(VCC = 40 V, VCE = 40 V)

IC{oft)

-

2.0

100

j.LA

Emitter Off-State Current
(VCC = 40 V, Vc = 40 V, VE = 0 V)

IE{oft)

-

-

-100

j.LA

Vsat{C)

-

1.1

1.3

Vsat{E)

-

1.5

2.5

-

100
100

200
200

-

25
40

100
100

Short Circuit Output Current
(Vref = 0 V)
OUTPUT SECTION

Collector-Emitter Saturation Voltage
Common-Emitter
(VE = 0 V, IC = 200 mAl
Emitter-Follower
(Vc = 15 V, IE = -200 mAl

V

Output Voltage Rise Time (TA = 25°C)
Common-Emitter (See Figure 12)
Emitter-Follower (See Figure 13)

tr

Output Voltage Fall Time (TA = 25°C)
Common-Emitter (See Figure 12)
Emitter-Follower (See Figure 13)

tf

ns

ns

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-220

MC34060
ELECTRICAL CHARACTERISTICS VCC = 15 V, CT = 0.01IlF, RT = 12 kQ, unless otherwise noted.
For typical values TA = 25°C, for minimax values TA is the operating ambient temperature range that applies.
Characteristics

ERROR AMPLIFIER SECTIONS
Input Offset Voltage
(VO[Pin 3] = 2.5 V)

Via

-

2.0

10

mV

Input Offset Current
(VC[Pin 3] = 2.5 V)

110

-

5.0

250

nA

Input Bias Current
(VO[Pin 3] = 2.5 V)

liB

-

-D.1

-1.0

IlA

Input Common Mode Voltage Range
(VCC = 40 V, TA = 25°C)

VICR

-D.3to
VCC-2.0

-

-

V

Open-Loop Voltage Gain
(liVO = 3.0 V, Va = 0.5 V to 3.5 V, RL = 2.0 !ill)

AVOL

70

95

-

dB

Unity-Gain Crossover Frequency
(Va = 0.5 V to 3.5 V, RL = 2.0 kQ)

fc

-

350

-

kHz

Phase Margin at Unity-Gain
(Va = 0.5 V to 3.5 V, RL = 2.0 kQ)

<\lm

-

65

-

deg.

Common Mode Rejection Ratio
(VCC =40V)

CMRR

65

90

-

dB

Power Supply Rejection Ratio
(t.VCC = 33 V, Vo = 2.5 V, RL = 2.0 !ill)

PSRR

-

100

-

dB

Output Sink Current
(VO[Pin 3] = 0.7 V)

10-

0.3

0.7

-

mA

Output Source Current
(VO[Pin 3] = 3.5 V)

10+

-2.0

-4.0

-

mA

VTH

-

3.5

4.5

V

11-

0.3

0.7

-

mA

Frequency
(CT = 0.001 IlF, RT = 47 kQ)

losc

-

25

-

kHz

Frequency Deviation of Frequency'
(CT = 0.001 IlF, RT = 47 kQ)

oiosc

-

3.0

-

%

Frequency Change with Voltage
(VCC = 7.0 V to 40 V, TA = 25°C)

t.fosdt.V)

-

0.1

-

%

Frequency Change with Temperature
(t.TA =Tlow to Thigh)
(CT = 0.01 IlF, RT = 12 kQ)

t.fosdt.T)

-

-

12

PWM COMPARATOR SECTION (Test circuit Figure 11)
Input Threshold Voltage
(Zero Duty Cycle)
Input Sink Current
(V[Pin 3] = 0.7 V)

OSCILLATOR SECTION

%

N-

'Standard deviation is a measure 01 the statistical distribution about the mean as derived Irom the formula; cr =

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-221

l: (xn -x)2
~
N-1

..

MC34060
ELECTRICAL CHARACTERISTICS VCC = 15 V, CT= O.OII1F, RT = 12 kQ, unless otherwise noted. For typical values TA = 25°C, for mini
max values TA is the operating ambient temperature range that applies.
Characteristics

DEAD-TIME CONTROL SECTION (Test circuit Figure 11)
Input Bias Current (Pin 4)
(Vin = 0 V to 5.25 V)

IIB(DT)

Maximum Output Duty Cycle
(Vin = 0 V, CT = 0.01 I1F, RT = 12 kn)
(Vin = 0 V, CT = 0.001 I1F, RT = 47 kn)

DC max

-

-2.0

-10

-

96
92

100
100

-

2.8

3.3

-

-

%
90

Input Threshold Voltage (Pin 4)
(Zero Duty Cycle)
(Maximum Duty Cycle)

IJ.A

V

VTH
0

TOTAL DEVICE
Standby Supply Current
(Pin 6 at Vref, all other inputs and outputs open)
(VCC = 15 V)
(VCC=40V)

mA

ICC

Average Supply Current
(VIPin 4] = 2.0 V, CT = 0.001, RT = 47 kn). See Figure 11.

IS

-

5.5
7.0

10
15

-

7.0

-

mA

Figure 1. Block Diagram

Reference
Regulator

Oscillator

r----t...:1.::.2-0 Ref Out

L--------rl~O~~~OVCC
Dead-Time
Control

I
I
I
I

Gnd

L
Error Amp
1

3
Feedback/P.W.M.
Comparator Input

13

14

Error Amp
2

-'t

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-222

MC34060
Description
The MC34060 is a fixed-frequency pulse width modulation control circuit, incorporating the primary building blocks required for
the control of a switching power supply (see Figure 1). An internal-linear sawtooth oscillator is frequency- programmable by two
external components, RT and Cr. The approximate oscillator frequency is determined by:
fosc '" _1_.1_
RToCT

For more information refer to Figure 3.
Output pulse width modulation is accomplished by comparison of the positive sawtooth waveform across capacitor CT to either
of two control signals. The output is enabled only during that portion of time when the sawtooth voltage is greater than the control
signals. Therefore, an increase in control-signal amplitude causes a corresponding linear decrease of output pulse width. (Refer
to the Timing Diagram shown in Figure 2.)

Figure 2. Timing Diagram

CapacilorCT

I

I

I

I

I

Feedbac~P.W.M. ~ A-!1 ~
Comparator

I

~ /1

I

I

I

1,/~l/1
___

~zLJzL1Z~Z

Dead-TIme Control

OutputQl,
Emitter

I

I

I

I

I

In Inn

I

~

I

I

I

U U

APPLICATIONS INFORMATION
The control signals are external inputs that can be fed into
the dead-time control, the error amplifier inputs, or the
feed-back input. The dead-time control comparator has an
effective 120 mV input offset which limits the minimum output
dead time to approximately the first 4% of the sawtooth-cycle
time. This would result in a maximum duty cycle of 96%.
Additional dead time may be imposed on the output by setting
the dead time-control input to a fixed voltage, ranging between
o Vto 3.3 V.

The MC34060 has an internal 5.0 V reference capable of
sourcing up to 10 mA of load currents for external bias circuits.
The reference has an internal accuracy of ±5% with a typical
thermal drift of less than 50 mV over an operating temperature
range of 0° to +70°C.

The pulse width modulator comparator provides a means
for the error amplifiers to adjustthe output pulse width from the
maximum percent on-time, established by the dead time
control input, down to zero, as the voltage at the feedback pin
varies from 0.5 V to 3.5 V. Both error amplifiers have a common
mode input range from -0.3 V to (V CC -2 V), and may be used
to sense power supply output voltage and current. The
error-amplifier outputs are active high and are ORed together
at the noninverting input of the pulse-width modulator
comparator. With this configuration, the amplifier that
demands minimum output on time, dominates control of the
loop.

g100k

Figure 3. Oscillator Frequency
versus Timing Resistance
300 k
Vc

z

w

6w

10k

CT-O.Ol

c::
u..
c::

o

5 1.Ok

0.1

~F

...J

C3
en

o

" 100

..9

30
1.0 k 2.0 k

1.0 uF
5.0 k 10k 20 k

50 k 100 k 200 k 500 k 1.0 M

RT. TIMING RESISTANCE (0)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-223

15V

O.OOt

t;

MC34060

--

OJ 100

~ 90
~ 80
~ 70

~

"-

"""-

60

-40

"""-

"""-

~

.........

"""-

10

o

1.0

10

100

"-

"""-

100 k

lB

o

16 f--

<5

t::J

.'.'!

_

VCC=15V
V(PIN 4) = OV

uI 14

a:

-60 ~

=<

~
-100~

~

~ 12

V

10

-

CT= 0.00111

~ 8.0

-120~
-140

~
6.0
w

-160

o

CD

10 k

1.0 k

iJ)

II III

~

=>

-80

8

........

:.:: 30
o. 20
<>:

~ 20

-20

,AVOL

40

:2:

20

I
VCC=15V !J.VO=3.0V
RL=2. kQ -

~
a. 50
o

9

Figure 5. Percent Dead-Time versus
Oscillator Frequency

Figure 4. Open-Loop Voltage Gain and
Phase versus Frequency

a.

-180
1M

V
I-°1.Q1

f-'

4.0

;fi.

2.0
100

1.0k
10k
lose, OSCILLATOR FREQUENCY (Hz)

I, FREQUENCY (Hz)

1.9

100

~

~

60

0

z
w
a:
w
a.

w

1

=>
f-

~

~CC ~ 15 V

"'

~ BO

w

~
(.)

40

eT = 0.001
RT = 47 k

"-

20

o

13

1.7

~

1.5

"" ,

~

en

1.4

- f--

V

f--

/

~1.3

1.0
2.0
DEAD-TIME CONTROL VOLTAGE

~

~

>

"'

1.2

1.1
3.0

3.5

o

50

1.3

I

1.1

> 1.0
z

V

0

~ 0.9
=>
~ O.B
a:

.,.... ...........

en,

~ 0.7
~

~

/

-

B.O

I
"..

",....., V

«
.s

7.0

w
a: 5.0
a:
~
c..
c..

en
2.0
6
(.)

0.6

1.0
50

1/

3.0

=>

...........

V
o

I

=> 4.0
(.)

100
150
200
IC, COLLECTOR CURRENT (rnA)

o
o

250

/

/

/
5.0

10

15
20
25
Vee, SUPPLY VOLTAGE

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-224

./

--

6.0

fZ

>
0.5

250

200

Figure 9. Standby-Supply Current
versus Supply Voltage

VCC=15V -

(!l

100
150
IE, EMITIER CURRENT (rnA)

M

Figure 8. Common-Emitter Configuration
Output-Saturation Voltage versus
Collector Current
~ 1.2
w

J

Vec=15V -

~
z 1.6
o
=>

"-

o

I

1.B

(!l

~

(.)

13
0

100 k

Figure 7. Emitter-Follower Configuration
Output-Saturation Voltage versus
Emitter Current

Figure 6. Percent Duty Cycle versus
Dead-Time Control Voltage

...J

~

M

30

35

40

MC34060
Figure 11. Dead-Time and Feedback Control

Figure 10. Error Amplifier Characteristics

'----O-----j

+

vCC = 15V ...._ _ _-,

Error Amplifier
Under Test

Feedback
Terminal
(Pin 3)

lime

{

Inpe~~

0 - - - - - 1 Feedback
~-'V\I'v----l RT
CT

(+)}

,-----+---<.....,

r---()----1+

(-)
(+)

Other Error
Amplifier

2W

Cf------,iI---o Output
E

Error

(-)

Vref

150n

vcc

0 - - - - - 1 Dead1i

Ref
Out

50kQ

Gnd

Figure 12. Common-Emitter Configuration
and Waveform

Figure 13. Emitter-Follower Configuration
and Waveform

RL
6Sn

Vc
Output
Transistor

Output
Transistor

CL
15pF

r

90%

Vc

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-225

CL
15pF

MC34060
Figure 14. Error Amplifier Sensing Techniques
Vo

To Output
Voltage 01
System

Vrel

3
Vrel

Error
Amp

Error
Amp

2
R2

Rt
Positive Output Voltage

Negative Output Voltage

Rt
VO=Vrel(t + R2 )

Vo = -Vrel (t

Rt

Vrel
Q

DT
RT
6

CT
5

Output

Q

R2

Max % OnTime~92-

Rt

Vrel

4

47k

O,OOtl

+R; )

Figure 16. Soft-Start Circuit

Figure 15. Dead-Time Control Circuit

Oulput

To Output
VoHage 01
Vo System

Rt

DT

4

R2

(

t60 )
t + :~

Figure 17. Slaving Two or More Control Circuits
Vrel

Master

L----;J---j

CT

Slave
(Additional
Circuits)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-226

Cs

MC34060

Figure 18. Step-Down Converter with Soft-Start
and Output Current Limiting

150~H

8.0Vto 40V

@2.0A

--

Tip 32

Vou
~

5.0V/1.0A
47
4.7k
10
0.01

~E-

75

VCC

1

'------- +
2

1.0M

3

+

14

SO/50
0.01J:-

;::0;

13

,-!3-

C~

Comp
MC34060

Gnd

Vret
DT

CT

10/:1~
150

+

MR850

1000
6.3V

E~

-

4.7k

4.7k

~

+

7

-<

RT
6

0.001

4.7k

47k

~I"

390
0.1

TEST

CONDITIONS

RESULTS

Line Regulation

Vin

~

8.0 V to 40 V. 10 ~ 1.0 A

Load Regulation

Vin

~

12 V, 10

Output Ripple

Vin ~ 12 V, 10 ~ 1.0 A

75 mV pop PAR.D.

Short Circuit Current

Vin ~ 12 V, RL ~ 0.1 Q

1.6A

Efficiency

Vin

~

~

1.0 mA to 1.0 A

12 V, 10 ~ 1.0 A

25mV

0.5%

3.0mV

0.06%

73%

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-227

MC34060

Figure 19. Step-Up Converter

150!1H@4.0A

--

8.0Vto26V

20!1H@1.0A

MR850

=

Vout

*

28VI
0.5A
22k
10
0.05

~t-

~+
2

4.7k

50/35V

2.7M

3

+

14

VCC

C~

Comp

,

E

12

Gnd -

Vref

Dr
4.7k

r

470/35V

-13-

3.9k

+

+

MC34060

+

CT

4

8
7

300

~-i~

f--,.li P111

0.1

RT
6
470

0.001
47k
390
v

TEST

CONDITIONS

RESULTS

Line Regulation

Yin

= 8.0 V to 26 V, 10 = 0.5 A

40mV

0.14%

Load Regulation

Yin

= 12 V, 10 = 1.0 mA to 0.5 A

5.0mV

0.18%

Output Ripple

Yin

= 12 V, 10 = 0.5A

24 mV p.p PAR.D.

Efficiency

Yin

= 12 V, 10 = 0.5 A

75%

• Optional circuit to minimize output ripple

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-228

*
470/35v

MC34060

Figure 20. Step-Up/Down Voltage Inverting Converter with
Soft-Start and Current Limiting

=8.0Vta40V

Tip32C

MR851

....

--

Vau

20~H

-15VI
0.2 5A

'
@1.0A

47
30k
10
O.Ot

~f-<
7.5k

~+
2

1.0M

3

+
50150V T'

14

~

0.01

13

75

VCC

C~

-

11150~H
@2.0A

MC34060

+

~ Vref

Gnd

DT

CT

l.J

+

+

~

RT
6

10/1f~
0.0:1

4.7k

3.3k

330/16V

E~

-

10k

47k

.

Camp

47k

r~

820
1.0

~

TEST

CONDITIONS

RESULTS

Line Regulation

Vin = 8.0 V to 40 V, to = 250 mA

52mV

0.35%

Load Regulation

Vin = 12 V, 10 = 1 mA to 250 mA

47mV

0.32%

Output Ripple

Vin = 12 V, 10 = 250 mA

Short Circuit Current

Vin=12V,RL=0.IQ

Efficiency

Vin = 12 V, 10 = 250 mA

10 mV pop PAR.O.
330 mA
86%

* Optional circuit to minimize output ripple

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-229

330116V

Figure 21. 33 W OH-Line Flyback Converter with SoH-Start and Primary Power Limiting
lN4003

IJ

.

s::

§
::c
):

o
r

1.0A

[

.

~b~

...

~

~

lN4001

~

l.-.-

47/25V

+lN4742

;

+
180/200V

'--

~

2.2M

f

7.5k ~ ~ lN4687

~

m
~ ::c
~
o
m

10/25V

13

-

12

Vret

E 8

Dr

HE--<
o.o;r
r 7iJ
TEST

1.5k

~r

+

4

Vout
5.0k

•

l000/25V
+
l000/25V ;

12/0.75A

+I

+.1.
10/35V

La

T

-v

COlt mon

,+t 10/35V
.75A

MC34060

14

8.2k

o

~

lN4934

-

z

-t

0

C 9

3 Comp

6.8k

5.0V/3.0A

-v

+

2
33k
0.D1

... I

22;10V +f I00/1OV+T

.

.::l

Ll

lN5824

Vce

1

»

c
m
<
C5
m
c
~
)Ii

8

10

Z

~

3·

22k

L-

m

w

,- n
f

~3e:

Tl

*.:r

T2

10

Cr

:1

0.001

+If--rt
MPS
AS5

Gnd ~
RT

200

6

47k

~

47

wound

r

wound
'larwound

1.0

11k

CONDITIONS

2.7k

RESULTS

Line Regulation 5.0 V

Vin = 95 Vac to 135 Vac. 10 = 3.0 A

20mV

0.40%

Line Regulation ±12 V

Vin = 95 Vac to 135 Vac. 10 = ±0.75 A

52mV

0.26%

Load Regulation 5.0 V

Vin = 115 Vac. 10 = 1.0 A to 4.0 A

476mV

9.5%

Load Regulation ±12 V

Vin = 115 Vac.lo =± 0.4A to ±0.9 A

300mV

2.5%

Output Ripple 5.0 V

Vin = 115 Vac.lo = 3.0 A

45 mV pop P.A.R.D.

Output Ripple ±12 V

Vin = 115 Vac. 10 = ±O.75 A

75 mV pop P.A.R.D.

Efficiency

Vin = 115 Vac. 105.0 V = 3.0 A
10±12 = ±O.75 A

74%

s::

o
w
o
o

en

27k

lN4148

l~t~5

MC34060A
MC35060A
MC33060A

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Precision Switch mode Pulse Width
Modulator Control Circuits

PRECISION SWITCHMODE
PULSE WIDTH MODULATOR
CONTROL CIRCUITS

The MC35060AlMC34060AlMC33060A are low cost fixed frequency, pulse
width modulation control circuits designed primarily for single ended
SWITCH MODE power supply control.
The MC34060A is specified over the commercial operating temperature range
of 0° to +70°C. The MC35060A is specified over the full military temperature range
of -55° to + 125°C, and the MC33060A is specified over an automotive
temperature range of -40° to +85°C.
• Complete Pulse Width Modulation Control Circuitry

SILICON MONOLITHIC
INTEGRATED CIRCUIT

• On-Chip Oscillator with Master or Slave Operation
• On-Chip Error Amplifiers
• On-Chip 5.0 V Reference, 1.5% Accuracy
• Adjustable Dead-TIme Control

PSUFFIX
PLASTIC PACKAGE
CASE 646

• Uncommitted Output Transistor Rated to 200 mA Source or Sink
• Undervoltage Lockout
• Available in Surface Mount Package

DSUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)

PIN CONNECTIONS

Noninv
Input

+
Error
Amp

Inv
Input
Compen/PWM
Comp Input

14

Noninv
Input

t3

Inv
Input
LSUFFIX
CERAMIC PACKAGE
CASE 632

Vref

OeadTime
Control

N.C.

CT

VCC

ORDERING INFORMATION

Oscillator
RT

C

Device

E

MC34060AP

MC34060AD
Ground

7

MC33060AD

Temperature
Range

SO-14
0° to +70°C

-40° to +85°C

MC33060AP

(Top View)

MC34060AL

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-231

Package

Plastic DIP
SO-14
Plastic DIP

-55° to + 125°C

Ceramic DIP

..

MC34060A, MC35060A, MC33060A
MAXIMUM RATINGS (Full operating ambient temperature range applies, unless otherwise noted.)
Symbol

Rating
Power Supply Voltage

MC35060A

I MC33060A

MC34060A

Unit

VCC

42

Collector Output Voltage

Vc

42

V
V

Collector Output Current (Note 1)

IC

500

rnA

Amplifier Input Voltage Range

Vin

-0.3 to +42

V

Power Dissipation@ TA"; 45°C

Po

1000

mW

Operating Junction Temperature
Plastic Package
Ceramic Package

TJ

°C

-

125

-

150

Storage Temperature Range
Plastic Package
Ceramic Package

°C

Tstg

-

-55 to +125

-

-65 to +150

Operating Ambient Temperature Range

..

TA

-55 to +125

oto +70

J -40 to +85

°C

NOTES: 1. Maximum thermalllmJ!s must be observed.

THERMAL CHARACTERISTICS

Characteristics
Thermal Resistance, Junction to Ambient
Derating Ambient Temperature

o Suffix

Symbol

L Suffix
Ceramic
Package

P Suffix
Plastic
Package

Plastic
Package

Unit

RaJA

100

80

120

°CIW

TA

50

45

45

°C

RECOMMENDED OPERATING CONDITIONS
MC35060A/MC34060AlMC33060A
ConditionlValue
Power Supply Voltage

Symbol

Min

Typ

Max

VCC

7.0

15

40

V

30

40

V

200

rnA

Collector Output Current

IC

-

Amplifier Input Voltage

Vin

-0.3

Current Into Feedback Terminal

Ifb

Collector Output Voltage

Vc

-

Unit

VCC-2

V

0.3

rnA

10

rnA

Reference Output Current

Irel

-

-

Timing Resistor

RT

1.8

47

500

k.Q

Timing Capacitor

CT

0.00047

0.001

10

I1F

1.0

25

200

kHz

-0.3

-

5.3

V

Oscillator Frequency

losc

-

PWM Input Voltage (Pins 3 and 4)

-

ELECTRICAL CHARACTERISTICS (VCC = 15 V, CT = 0.01 I1F, RT = 12 k.Q, unless otherwise noted.
For typical values TA = 25°C, for minimax values TA is the operating ambient temperature range that applies, unless otherwise noted.)

Characteristics

REFERENCE SECTION
Reference Voltage (10 = 1.0 rnA, TA 25°C)
TA = Tlowto Thigh- MC34060A
- MC33060A, MC35060A

Vrel

4.925
4.9
4.85

5.0

-

6.075
5.1
5.1

V

Line Regulation
(VCC = 7.0 V to 40 V, 10 = 10 rnA))

Regline

-

2.0

25

mV

Load Regulation
(10= 1.0 rnA to 10 rnA)

Regload

-

2.0

15

mV

15

35

75

rnA

Short Circuit Output Current
(Vref=OV)

ISC

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-232

MC34060A, MC35060A, MC33060A
ELECTRICAL CHARACTERISTICS (VCC = 15 V, CT = 0.01 IlF, RT = 12 kQ, unless otherwise noted.
For typical values TA = 25°C, for minimax values TA is the operating ambient temperature range that applies, unless otherwise noted.)

Characteristics

OUTPUT SECTION
Collector Off-State Current
(VCC = 40 V, VCE = 40 V)

IC(off)

-

2.0

100

IlA

Emitter Off-State Current
(VCC = 40 V, VCE = 40 V, VE = 0 V)

IE(off)

-

-

-100

!!A

Vsat(C)

-

1.1

1.5

V

Vsat(E)

-

1.5

2.5

-

100
100

200
200

-

40
40

100
100

Collector-Emitter Saturation Voltage (Note 2)
Common-Emitter
(VE = 0 V, IC = 200 rnA)
Emitter-Follower
(VC = 15 V, IE = -200 rnA)
Output Voltage Rise Time (TA = 25°C)
Common-Emitter (See Figure 12)
Emitter-Follower (See Figure 13)

tr

Output Voltage Fall Time (TA = 25°C)
Common-Emitter (See Figure 12
Emitter-Follower (See Figure 13)

tr

ns

-

ns

-

ERROR AMPLIFIER SECTION
Input Offset Voltage
(VO[Pin 3] = 2.5 V)

VIO

-

2.0

10

mV

Input Offset Current
(VqPin 3] = 2.5 V)

110

-

5.0

250

nA

Input Bias current
(VO[Pin 3] = 2.5 V)

liB

-

-0.1

-2.0

IlA

o

Input Common Mode Voltage Range
(VCC =40 V)
Inverting Input Voltage Range
Open-Loop Voltage Gain
(AVO = 3.0 V, Vo = 0.5 V to 3.5 V, RL = 2.0 Jill)

VICR

to
VCC-2.0

-

-

V

VIR(INV)

-0.3 to
VCC-2.0

-

-

V

AVOL

70

95

-

dB

Unity-Gain Crossover Frequency
(VO = 0.5 V to 3.5 V, RL = 2.0 kO)

Ic

-

600

-

kHz

Phase Margin at Unity-Gain
(VO = 0.5 V to 3.5 V, RL = 2.0 kO)

m

-

65

-

deg.

Common Mode Rejection Ratio
(VCC = 40 V, Yin = 0 V to 38 V))

CMRR

65

90

-

dB

Power Supply Rejection Ratio
(AVCC = 33 V, Vo = 2.5 V, RL = 2.0 Jill)

PSRR

-

100

-

dB

Output Sink Current
(VO[Pin 3] = 0.7 V)

10-

0.3

0.7

-

rnA

Output Source Current
(VO[Pin 3] = 3.5 V)

10+

-2.0

-4.0

-

rnA

NOTES:

2.

Low duty cycle techniques are used during test to maintain junction temperature as close to ambient temperatures as possible.
Tlow :

j~:g :~; ~g~~g~g~

= O°C for MC34060A

:~~~~~~~~~~~~~~~A

Thigh :
= +70°C for MC34060A

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-233

..

MC34060A, MC35060A, MC33060A
ELECTRICAL CHARACTERISTICS (VCC = 15 V, CT = 0.01 IlF, RT = 12 kQ, unless otherwise noted.
For typical values TA = 25'C, for min/max values TA is the operating ambient temperature range that applies, unless otherwise noted.)

Characteristics

PWM COMPARATOR SECTION (Test circuit Figure 11)
Input Threshold Voltage
(Zero Du!y Cycle)

VTH

Input Sink Current
(V[Pin 3] = 0.7 V)

II

-

3.5

4.5

0.3

0.7

-

V

mA

DEAD·TIME CONTROL SECTION (Test circuit Figure 11)
Input Bias Current (Pin 4)
(Vin = a V to 5.25 V)

IIB(DT)

Maximum Output Duty Cycle
(Vin = a V, CT = 0.01 IlF, RT = 12 kQ)
(Vin = 0 V, CT = 0.001 IlF, RT = 47 kQ)

DC max

-

-1.0

-10

100

-

96
92

-

2.8

3.3

-

-

%
90

Input Threshold Voltage (Pin 4)
(Zero Duty Cycle)
(Maximum Duty Cycle)

IlA

V

VTH

a

OSCILLATOR SECTION
Frequency
(CT = 0.01 IlF, RT = 12 kQ, TA = 25'C)
TA = Tlow to Thigh - MC34060A
- MC33060A, MC35060A
(CT = 0.001 IlF, RT = 47 kQ)

kHz

fosc
9.7
9.5
9.0

10.5

11.3
11.5
11.5

-

-

-

25

-

crfosc

-

1.5

-

%

Frequency Change with Voltage
(VCC = 7.0 V to 40 V)

L\.fosdL\.V)

-

0.5

2.0

%

Frequency Change with Temperature
(L\.TA =Tlow to Thigh)
(CT = 0.01 IlF, RT = 12 kQ)

Ll.fosdL\.T)

-

4.0

-

Standard Deviation of Frequency'
(CT = 0.001 IlF, RT = 47 kQ)

%

-

-

UNDERVOLTAGE LOCKOUT SECTION
Turn-On Threshold (VCC increasing, Iref = 1.0 mAl
Hysteresis

TOTAL DEVICE
Standby Supply Current
(Pin 6 at Vref, all other inputs and outputs open)
(VCC = 15 V)
(VCC =40 V)

mA

ICC

-

Average Supply Current
(V[Pin 4] = 2.0 V, CT = 0.001 IlF, RT = 47 kQ). See Figure 11.

IS

-

5.5
7.0

10
15

-

7.0

-

'Standard deviation is a measure of the statistical distribution about the mean as derived from the formula; cr =

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-234

1

N

L (Xn -x)2
n-1
N-1

mA

MC34060A, MC35060A, MC33060A
Figure 1. Block Diagram

f---+.!-"--~-oVcc

R
Ref Out
Dead·Time o--'T----+---+---I
Control

I

.---'-'"--0----' Collector

Comparator

I
I
_ I

14

3
Feedback/PWM
Comparator Input

Error Amp
1

Error Amp

2

Description
The MC34060Al35060Al33060A is a fixed-frequency pulse width modulation control circuit, incorporating the primary building
blocks required for the control of a switching power supply (see Figure 1). An internal-linear sawtooth oscillator is
frequency-programmable by two external components, RT and CT The approximate oscillator frequency is determined by:
fosc '" _1_.2_
RToCT
For more information refer to Figure 3.

Output pulse width modulation is accomplished by comparison of the positive sawtooth waveform across capacitor CT to either
of two control signals. The output is enabled only during that portion of time when the sawtooth voltage is greater than the control
signals. Therefore, an increase in control-signal amplitude causes a corresponding linear decrease of output pulse width. (Refer
to the Timing Diagram shown in Figure 2.)
Figure 2_ Timing Diagram
CapacitorCT

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

~~:=~,L!,az4z4/1z1
Dead-Time Control

OutputQl,
Emitter

InUnniLJ1JlJU
U
U U
APPLICATIONS INFORMATION

The control signals are external inputs that can be fed into
the dead-time control, the error amplifier inputs, or the
feed-back input. The dead-time control comparator has an
effective 120 mV input offset which limits the minimum output
dead time to approximately the first 4% of the sawtooth-cycle
time. This would result in a maximum duty cycle of 96%.
Additional dead time may be imposed on the output by setting
the dead time-control inpulto a fixed voltage, ranging between
o Vto 3.3 V.
The pulse width modulator comparator provides a means
forthe error amplifiers to adjustthe output pulse width from the
maximum percent on-time, established by the dead time
control input, down to zero, as the voltage at the feedback pin

varies from 0.5 Vto 3.5 V. Both error amplifiers have acommon
mode input range from -0.3 V to (VCC -2.0 V), and may be
used to sense power supply output voltage and current. The
error-amplifier outputs are active high and are ORed together
at the noninverting input of the pulse-width modulator
comparator. With this configuration, the amplifier that
demands minimum output on time, dominates control of
the loop.
The MC34060AlMC35060Al33060A has an internal 5.0 V
reference capable of sourcing up to 10 mA of load currents for
external bias circuits. The reference has an internal accuracy
of ±5% with a typical thermal drift of less than 50 mV over an
operating temperature range of 0° to +70°C.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-235

MC34060A, MC35060A, MC33060A
Figure 3. Oscillator Frequency
versus Timing Resistance

g

Figure 4. Open-Loop Voltage Gain and Phase
versus Frequency
_

500 k
VCC-15V

>-

~100k

~ 100
w 90

0.001 F

UJ

::J

 TIMING RESISTANCE (Q)

18

0

16

~ 80

uj

14

w
...J

0

;:;:

12

LiS

10

Cl
Cl
f-

zw

8.0

W
0..
f-"
Cl

4.0

I

2.0
0
500

Cl
f-

w

1.8
1.7

z

1.6

~

1.5

>
0

c::

::J

~ 1.4
en.
~ 1.3

40


z
0

./

1.6

..... /

1.4

~
c:: 1.2
::J

~ 1.0
en.
~ 0.8
!;!1

w 0.6

~ 1.2

V V

."........

."........

........ V

V

0

>

1.1

-160
-180
1.0M

r........

w
c.. 20

10k
lOOk
fose, OSCILLATOR FREQUENCY (Hz)



o

0.4
100

200
300
IE, EMITTER CURRENT (rnA)

400

500

o

100

200
300
400
IC, COLLECTOR CURRENT (rnA)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-236

500

MC34060A, MC35060A, MC33060A
Figure 10. Undervoltage Lockout Thresholds
versus Reference Load Current

Figure 9. Standby Supply Current
versus Supply Voltage
~

10.0

9o

9.0

(f)

':[ 8.0

!z

7.0

~

6.0

w

6.0

:r:
w
~

>>=>

(

~

=>
~ 5.0

u

~

w

g

4.0
=>
(f)
3.0

L

82.0

1.0

o

o

5.5
~
TurnO~ ~

5.0

l-- ~

~
f3 4.5 ~
~w

C!l

I
I
I

f.--

Turn Off

o
z

=>

5.0

10

15
20
25
30
Vee, SUPPLY VOLTAGE M

35

4.0

t

40

o

5.0

10
15
20
25
30
IL, REFERENCE LOAO CURRENT (rnA)

35

Figure 12. Dead-Time and Feedback Control

Figure 11. Error Amplifier Characteristics

Vee = 15V . -_ _ _---,

Error Amplifier
Under Test
II t

0------1
{

1500

DeadTime

2W

Inpe~ts 0------1 Feedback
Feedback
Terminal
(Pin 3)

.---"A'V----j

ef-----O Output

RT
eT

E

(t) }
(-)
Error

~.",8ro'

,-------+-~(t)

H

Ref
Out

50kO

Amplifier

Gnd

Figure 14. Emitter-Follower Configuration
and Waveform

Figure 13. Common-Emitter Configuration
and Waveform

Output
Transistor

Ve

Output
Transistor

I

90%
Ve

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-237

eL
15pF

40

MC34060A, MC35060A, MC33060A
Figure 15. Error Amplifier Sensing Techniques
Va

To Output
Voltage 01
System

Vrel

.---0----1 +
3
Vrel

Error
Amp

2

Error
Amp

R2

RI
Positive Output Voltage
Va = Vre!!1 +

Negative Output Voltage

RI

R2 )

Figure 16. Dead-Time Control Circuit

Output

AT
6

CT
5

o.oo~

Output

0

R2

Max%OnTime~92-

RI

Vre!

Dr4

0

47k

Figure 17. Soft-Start Circuit

RI

Vrel

To Output
Voltage of
Va System

RI
Va = -Vrel (I + R2 )

Dr

4
R2

(

160 )
1+ :~

Figure 18. Slaving Two or More Control Circuits
Vrel

Master

,----""Vrel

5
'----.")-j

CT

Slave
(Additional
Circuits)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3·238

Cs

MC34060A, MC35060A, MC33060A

Figure 19. Step-Down Converter with Soft-Start
and Output Current Limiting

15011H@2.0A
8.0Vta 40V

--

Tip 32

Vau
5.0V/1.0A

47
4.7k
10

~t-

1

~+

2
1.0M

3

+

14

50/50 ;:
0.01-b
~~

13

4.7k

75

VCC

0.01

~

C~

Camp
MC34060A

7
Gnd ----<

Vref

1O/:i~
150

4.7k

~ ~

E~

-

Dr

4.7k

+

MR850

+

RT

CT

J1

6

0.001

~r

47k

390
0.1

Test
Line Regulation
Load Regulation
Output Ripple
Short Circuit Current
Efficiency

Conditions

= 8.0 V to 40 V, 10 = 1.0 A
Vin = 12 V, 10 = 1.0 mA to 1.0 A
Vin = 12 V, 10 = 1.0 A
Vin = 12 V, RL = 0.1 n
Vin = 12 V, 10 = 1.0 A
Vin

Results
25mV

0.5%

3.0mV

0.06%

75 mV p.p PAR.D.
1.6 A
73%

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-239

1000
6.3V

MC34060A, MC35060A, MC33060A

Figure 20. Step-Up Converter

150IlH@4.0A

Yin = B.OV to 26V

MR850

=

•

You
~

28VJ
O.SA
22k
10
0.05

~t-

~+
2

4.7k

50/35V

2.7M

3

+

14

Vee

e~

Comp
+

+

MC34060A

300

470/35V

8
E 1--'7'-----1L---.Jr-'''''·,!\.-...-J lip 111

3.9k

Gnd RT
4.7k 4

0.001

Th

r---l~
0.1

6

470
47k

390

Test

Conditions

Results

Line Regulation

Yin = 8.0 V to 26 V, 10 = 0.5 A

40mV 0.14%

Load Regulation

Vin = 12 V, 10 = 1.0 rnA to 0.5 A

5.0mV 0.18%

Output Ripple

Vin = 12 V,IO = 0.5A

24 mV pop P.A.R.D.

Efficiency

Vin = 12 V,IO= 0.5A

75%

• Optional circuit to minimize output ripple

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-240

•

~70/35V

MC34060A, MC35060A, MC33060A

Figure 21. Step-Up/Down Voltage Inverting Converter
with Soft-Start and Current Limiting

Vin =8.0V to 40V

Vou

Tip 32C,.-_-----_M-tR..8_51_--..-_---'===
20J.lH *
@1.0A

~

47

-15V/
0.25A

30k
10

L+

0.01

~t7.5k
+

75

VCC

C~

+-----v\l\r----._ _---=2'-j _
1.0M

3
L-----._+__----"-1
+--_ _1-_ _+_+__.:..14'-1

Comp

50/50V r

+

Gnd

1

10k

05
0.001

4

L--~_-jl t--_---v47V1k~_---v4·Vl7k~___
3.3k

':::::' 330/16V

':::::'* 330/16V

+

+

E~

12
-Vref

10/16V

150J.lH
II @2.0A

MC34060A

0.01 ;::'
13
...--If----j -

.2-.

6

r

47k

820
1.0

Test

Conditions

Line Regulation

Vin

= 8.0 V to 40 V,

Load Regulation

Vin

= 12 V,

10 = 1.0 to 250 mA

Output Ripple

Vin

= 12 V,

10 = 250 mA

Short Circuit Current

Vin

= 12 V, RL = 0.1

Efficiency

Vin

= 12 V,

..

10 = 250 mA

Q

10 = 250 mA

Results

52mV

0.35%

47mV

0.32%

10 mV p-p PAR.D.
330mA
86%

• Optional circuit to minimize output npple

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-241

Figure 22. 33 W Off·Line Flyback Converter with Soft·Start and Primary Power Limiting
T2

lN4003

L,

lN5824

5.0V/3.0A

f"Y""1"Y">

---0

--""

3 each
0.0047 Ul./CSA

1,11771J

~Tl

s::

r

115Vac

~

N

.j>.

I\J

z--I

lN4001

47/25V

lJ

TI

.~ .~

\4)

12/0.75A

~~-+-n

Common

--~--~~---4--~~
+
I... +

1000/25V

I..

1 I~VCC

180/200V

I

~

I

_rrTn_

~ 1N4937 1N4934

10/35V
(

-12/0.75A

C I9

.-::.
o
C»
o
)>

2.2M
Comp

t20%

MC34060A

I

13

'Optional R.F.I. RRer
12

~

rw

(5
en

VHot 25k
pout
5.0k

<
m

o.ol[

(5
0

Vrel
DT

~

T1 T2 -

6

HMo.ooA.
10

o
w

Gndh
RT
I
I

Cr

_

1.5k

~

200
47k

1.0

11k
2.7k
,J

Test

Conditions

47

r

27k

lN4148

~
»

s:

E 8

1 _

s:

o
w

2

m
)l;!
()
m
m

~

10

+

L2

lN4934

22k

JJ

0

O

n

•

lN4742

d
JJ
>
r
Z
m
>
w

'----

1.0A 015Q
Cold

0

lN4934

Q

'-r

0

13/200
'T' Vac

Results

Line Regulation 5.0 V

Yin = 95 Vac to 135 Vac, 10 = 3.0 A

20mV 0.40%

Line Regulation t12 V

Yin = 95 Vac to 135 Vac, 10 = ±O.75 A

52 mV 0.26%

Load Regulation 5.0 V

Yin = 115 Vac, 10 = 1.0 A to 4.0 A

476mV 9.5%
300mV

2.5%

Load Regulation t12 V

Yin = 115 Vac, 10 = t 0.4 A to to.9 A

Output Ripple 5.0 V

Yin = 115 Vac, 10 = 3.0 A

45 mV pop P.A.R.D.

Output Ripple t12 V

Yin = 115 Vac, 10 =to.75 A

75 mV pop P.A.R.D.

Efficiency

Yin = 115 Vac, 105.0 V = 3.0 A
10 t12 V =±O.75 A

74%

Coilcrait W2961
Core: Coilcraft 11-464-16,
0.025" gap in each leg.
Bobbin: Coilcrait 37-573
Windings:
Primary, 2 each, 75 turns #26 Awg Bifilar wound
Feedback: 15 turns #26 Awg
Secondary, 5.0 V, 6 turns #22 Awg Bifilar wound
Secondary, 2 each, 14 turns #24 Awg Bifilar wound
L1 - Coilcraft Z7156, 15 J.lH @ 5.0 A
12, L.3 - COilcraft Z7157, 25 I1H @ 1.0 A

c.n
o
C»
o
}>

s:
ow
w

o
C»
o

»

MC34063A
MC35063A
MC33063A

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

DC-to-DC Converter Control
Circuits

DC-TO-DC CONVERTER
CONTROL CIRCUITS

The MC34063A!35063A!33063A is a series of monolithic control circuits
containing the primary functions required for DC-to-DC converters. These
devices consist of an internal temperature compensated reference, comparator,
controlled duty cycle oscillator with an active current limit circuit, driver and high
current output switch. This series was specifically designed to be incorporated in
Step-Down and Step-Up and Voltage-Inverting applications with a minimum
number of external components. Refer to Application Note AN920 R2 for
additional design information.
• Operation from 3.0 V to 40 V Input

SILCON MONOLITHIC
INTEGRATED CIRCUIT

P1 SUFFIX
PLASTIC PACKAGE
CASE 626

• Low Standby Current
• Current Limiting

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

• Output Switch Current to 1.5 A
• Output Voltage Adjustable
• Frequency Operation to 100 kHz
• Precision 2% Reference

USUFFIX
CERAMIC PACKAGE
CASE 693

Functional Block Diagram

I

Drive 8
Collector 0.::.1--------------,

PIN CONNECTIONS

Switch
Collector

Switch
Collector

Driver
Collector

Switch
Emitter

Ipk Sense

liming
Capacitor
Ipk 7
Sense 0-'-1--+---,

VCC

'-----11--'-"--0

o!l

VCC
Comparator
Inverting
Input

Switch
Emitter

(Top View}

liming
CapacHor

ORDERING INFORMATION
Device

Temperature
Range

MC34063AD
MC34063APl

Comparator
Inverting 0"-'---------'
Input
L __

MC35063AU

SO-8
0° to +70°C
Plastic DIP
-55° to + 125°C

MC33063AD

(Bottom View)

Package

Ceramic DIP
SO-8

-40° to +85°C
MC33063APl

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-243

Plastic DIP

MC34063A, MC35063A, MC33063A
MAXIMUM RATINGS
Symbol

Value

Unit

Power Supply Voltage

Rating

VCC

40

Vdc

Comparator Input Voltage Range

VIR

-0.3 to +40

Vdc

VC(switch)

40

Vdc

VE(switch)

40

Vdc

VCE(switch)

40

Vdc

VC(driver)

40

Vdc

IC(driver)

100

mA

ISW

1.5

A

PD
RaJA

1.25
100

W
"C/W

PD
RaJA

1.25
100

W
"C/W

PD
RaJA

625
160

mW
°CIW

Operating Junction Temperature

TJ

+150

°C

Operating Ambient Temperature Range
MC35063A
MC33063A
MC34063A

TA

Storage Temperature Range

Tstg

Switch Collector Voltage
Switch Emitter Voltage (VPin 1 = 40 V)
Switch Collector to Emitter Voltage
Driver Collector Voltage
Driver Collector Current (Note 1)
Switch Current
Power Dissipation and Thermal Characteristics
Ceramic Package, U Suffix
TA = +25"C
Thermal Resistance
Plastic Package, P Suffix
TA = +25"C
Thermal Resistance
SOIC Package, D Suffix
TA = +25"C
Thermal Resistance

ELECTRICAL CHARACTERICISTICS (VCC

°C
-55 to +125
-40 to +85
o to +70
-65 to +150

= 5.0 V, TA = Tlow to Thi

°C

h [Note 2J, unless otherwise specified.)

Characteristics

OSCILLATOR
Frequency
(VPin 5

fosc

24

33

42

kHz

Ichg

24

33

42

IlA

Idischg

140

200

260

IlA

Discharge to Charge Current Ratio
(Pin 7 to VCC, TA = 25°C)

Idischg/lchg

5.2

6.2

7.5

-

Current Limit Sense Voltage
(Ichg = Idischg, TA = 25"C)

Vlpk(sense)

250

300

350

mV

= 0 V, CT = 1.0 nF, TA = 25°C)

Charge Current
(VCC = 5.0 V to 40 V, TA

= 25°C)

Discharge Current
(VCC = 5.0 V to 40 V, TA

= 25°C)

NOTES: 1. MaXimum package power dissipation limits must be observed.
2. Tlow = -55°C for MC35063A
Thigh = +125°C for MC35063A
-40°C for MC33063A
+85"C for MC33063A
O°C for MC34063A
+70°C for MC34063A

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-244

MC34063A, MC35063A, MC33063A
ELECTRICAL CHARACTERICISTICS -

Continued (VCC = 5.0 V; TA = Tlow to Thi h. unless otherwise specified.)

Characteristics

Typ

OUTPUT SWITCH (Note 3)
Saturation Voltage. Darlington Connection
(lsw = 1 .0 A. Pins 1. 8 connected)

VCE(sat)

-

1.0

1.3

V

Saturation Voltage
(lsw = 1.0 A. RPin 8 = 82 n to VCC. Forced ~ = 20)

VCE(sat)

-

0.45

0.7

V

50

120

-

-

-

0.01

100

llA

1.25

-

1.275
1.29

DC Current Gain
(lsw = 1.0 A. VCE = 5.0 V. TA = 25°C)

hFE

Collector Oil-State Current
(VCE=40 V)

IC(oll)

COMPARATOR
Threshold Voltage
(TA = 25°C)
(TA = Trow to Thigh)

V

Vth
1.225
1.21

Threshold Voltage Line Regulation
(VCC = 3.0 V to 40 V)
Input Bias Current
(Vin = a V)

Regline

-

1.4

5.0

mV

liB

-

-40

-400

nA

ICC

-

2.5

4.0

rnA

TOTAL DEVICE

ISupply
Current
(VCC = 5.0 V to 40 V. CT = 1.0 nF. Pin 7 = VCC.
VPin 5 > Vth. Pin 2 = Gnd. Remaining pins open)

NOTES: 3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible.
4. If the output switch is driven into hard saturation (non-Darlington configuration) at low switch currents (S 300 rnA) and high driver
currents (~30 rnA). it may take up to 2.0 !lS to come out of saturation. This condition will shorten the "oil" time atfrequencies ~ 30 kHz.
and is magnified at high temperatures. This condition does not occur with a Darlington configuration. since the output switch cannot
saturate. If a non-Darlington configuration is used. the following output drive condition is recommended.
Forced ~ of output switch = IC. outpuU(IC. driver-7.0 mAO) ~ 10
*The 100 n resistor in the emitter of the driver device requires about 7.0 rnA before the output switch conducts.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-245

MC34063A, MC35063A, MC33063A
Figure 1. Output Switch On-Off Time versus
Oscillator Timing Capacitor

Figure 2. Timing Capacitor Waveform

~ 1000

!!il

E
u..
~

o

:r

~5

o~

'9c
o

500 ~ VCC=5.0V
I- Pin7 =VCC
200
~ Pin 5 = Gnd
100 1= TA=25°C

50

ton

20
.."

10
5.0
1.0

'off

.....

2.0
0.01

0.02

0.05 0.1

0.2

0.5 1.0

2.0

5.0 10

10IlS/DIV

Or. OSCILLATOR TIMING CAPACITOR (nF)

Figure 4. Common Emitter Configuration Output
Switch Saturation Voltage versus
Collector Current

Figure 3. Emitter Follower Configuration Output
Saturation Voltage versus Emitter Current
1.8

2:
w

C!l

!:§
0

>
z

0

~
a:

::>

!;;:

----- --

1.7

-

1.6
1.5
1.4

.!!l.

w

-f,?

1.2
1.1
1.0

w

~

L

o

0.2

0.4

0.6
0.8
1.0
1.2
IE, EMITIER CURRENT (A)

0.8

0

0.7

>
z

0

0.6 t-- VCC = 5.0 V
Pins 7 = VCC
Pins 2, 3, 5 = Gnd
TA = 25°C
sej Note 3 I
0.2

'jg

W

~ 0.1

o
o

1.6

Figure 5. Current Limit Sense Voltage
versus Temperature
~

400

!:§

380

w

360
340

§?
CI)

ii:i
t:::

320
300

:;;

ffi
a:

260

~
~

220

0..

:>

0.2

---r

".,.......

"..

....- .......
Forced

P= 20

."..-

0.4
0.6
0.8
1.0
1.2
IC, COLLECTOR CURRENT(A)

1.4

1.6

3.2
2.8

_ VCC=5.0V
Ichg = Idischg

- r--

280

~
o

-T

--r-

f.-- -Darlinaton Connection

Figure 6. Standby Supply Current versus
Supply Voltage

CI)

::J

--- -

~ 0.5 t-a:
::> 0.4 I-!;;:
CI)
0.3 I--

J
1.4

0.9

C!l

!:§

VCC =5.0V
Pins 1,7,8 = VCC
Pins3,5=Gnd
TA= 25°C
See Note 3

1.3

CI)

1ij

1.0

2:

2.4

ffi
a:

2.0

§

1.6

o

-...r--

(

~ 1.2

0..

CT= 1.0nF
Pin7=VcC- f - - Pin 2 = Gnd

~ 0.8

8 0.4

240
200
-55

1

_
-25

0
25
50
75
TA, AMBIENTTEMPERATURE (OC)

100

o
o

125

5.0

10

15
20
25
30
VCC, SUPPLY VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-246

35

40

MC34063A, MC35063A, MC33063A
Figure 7. Step-Up Converter
170!1H
l

180

1N5819

Rsc
0.22

Vino-+-_~
12V

+
J100

1.0!1H
Vou1
It----J\/'v'\.------------+-+---O 28V/175mA ~ Vout
47k
100
R1 2.2k
330'J Co

I

Optional Fmer
Test

Results

Conditions

line Regulation

Yin = 8.0 V to 16 V, 10 = 175 rnA

Load Regulation

Yin = 12 V, 10 = 75 rnA to 175 rnA

10 rnV = ±O.017%

Output Ripple

Vin= 12V,10= 175 rnA

400rnVp-p

Efficiency

Yin = 12 V, 10 = 175 rnA

89.2%

Yin = 12V,I0 = 175 rnA

40rnVp-p

Output Ripple With Optional Filter

30 rnV = ±0.05%

Figure 8. External Current Boost Connection for IC Peak Greater than 1.5 A
External NPN Switch

External NPN Saturated Switch
(Refer to Note 4)

r----------,
8

Rsc

Rsc

1

I
I
I
71
I
I
I
61

L __________ J

L __________

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-247

J

MC34063A, MC35063A, MC33063A
Figure 9. Step-Down Converter

Rsc
0.33
Vin

25V

II

I
I
I
I

+
lOOT

=

220llH

5

I

L ____________

~

1~~

=

R2

Vout
f-----""'VIr---------+-+----O 5.0V/500mA ~ Vout
a~
100
Rl 1.2k
470rCO

1

Optional Filter
Test

Conditions

Results

Line Regulation

Vin = 15 V to 25 V. 10 = 500 mA

12 rnV= ±0.12%

Load Regulation

Vin = 25 V.IO = 50 rnA to 500 rnA

3.0 rnV = ±0.03%

Output Ripple

Vin = 25 V. 10 = 500 rnA

Short Circuit Current

Vin = 25 V. RL = 0.1

Efficiency

Yin = 25 V. 10 = 500 rnA

82.5%

Output Ripple With Optional Filter

Vin = 25 V. 10 = 500 rnA

40 rnVp-p

120rnVp-p

n

1.lA

Figure 10. External Current Boost Connections for IC Peak Greater than 1.5 A
External NPN Switch

External PNP Saturated Switch

81
I
I
7

Rsc

I
I
I

Vin

6!

I-------.---O 12VJ100mA ~ Vout
1000

'J+

+J 100

Optional Filter
Test

Conditions

Results

= 4.5 V to 6.0 V, 10 = 100 rnA
=5.0 V,IO = 10 rnA to 100 rnA
Vin = 5.0 V, 10 = 100 rnA
Vin = 5.0 V, RL = 0.1 n
Vin = 5.0 V, 10 = 100 rnA
Vin = 5.0 V, 10 = 100 rnA

=±0.012%

Line Regulation

Vin

3.0 rnV

Load Regulation

Vin

0.022 rnV =±D.09%

Output Ripple
Short Circuit Current
Efficiency
Output Ripple With Optional Filter

500 rnVp-p
910 rnA
64.5%
70 rnVp-p

Figure 12. External Current Boost Connections for IC Peak Greater Than 1.5 A
External NPN Switch

External PNP Saturated Switch

L _ _ _ _ _ _ _ _ _ .J

L _ _ _ _ _ _ _ _ _ .J

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-249

MC34063A, MC35063A, MC33063A
Figure 13. Printed Circuit Board and Component Layout
(Circuits of Figure 7, 9, 11)

2.500"

[fop view, copper foil as seen through the board from the component side)

'Optional Filter.
Top View, Component Side

INDUCTOR DATA
Converter

Inductance

(~H)

TurnslWire

Step-Up

170

Step-Down

220

38 Turns of #22 AWG
48 Turns of #22 AWG

Voltage-Inverting

88

28 Turns of #22 AWG

All inductors are wound on Magnetics Inc. 55117 toroidal core.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-250

MC34063A, MC35063A, MC33063A
Figure 14. Design Formula Table
Calculation

Vout+VF-Vin(min)

tonltof!

_1_
fmin

_I_
fmin

I
fmin

4.8 x 10-5 ton

4.8 x 10-5 ton

4.8 x 10-5 ton

210ut(max)

(~
toll

(Vin(min)-Vsat )
Ipk(switch)

Co
~

ton(max)

loutton

Vin+Vsat

210ut(max)

210ut(max)

+1 )

0.3/lpk(switch)

L(min)

IVoutl+VF

Vin(min)-Vsar-Vout

Ipk(switch)

RSC

Vout+VF

Vin(min)-Vsat
(ton + toll) max
CT

Voltage·lnverting

Step·Down

Step·Up

0.3/lpk(switch)

0.3I1pk(switch)
(

Vin(min)-Vsar-Vou~
Ipk(switch)

ton(max)

(Vin(min)-Vsat )
Ipk(switch)

Ipk(switch)(ton+toll)
~

Vripple(p-p)

(~+1)
toll

8Vripple(p-p)

ton (max)

loutton
Vripple(p-p)

V sat ~ Saturation voltage of the output sWitch.
VF ~ Forward voltage drop of the output rectifier.
The following power supply characteristics must be chosen:
Yin - Nominal input voltage.
(1 + R2)
Vout - Desired output voltage, IVoutl = 1.25
Rl
lout - Desired output current.
Imln - Minimum desired output switching frequency at the selected values 01 Viri and 10.
Vrlpple(p-p) - Desired peak-to-peak output ripple voltage. In practice, the calculated capacitor value will need to be increased due to its
equivalent series resistance and board layout. The ripple voltage should be keptto a low value since it will directly allect the line
and load regulation.
NOTE:

For further information refer to Application Note AN920 Rev. 2.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-251

MOTOROLA

MC34064
MC33064

SEMICONDUCTOR-----TECHNICAL DATA

Advance Information

UNDERVOLTAGE
SENSING CIRCUIT

Undervoltage Sensing Circuit
The MC34064 is an undervoltage sensing circuit specifically designed for
use as a reset controller in microprocessor-based systems. It offers the
designer an economical solution for low voltage detection with a single external
resistor. The MC34064 features a trimmed-in-package bandgap reference, and
a comparator with precise thresholds and built-in hystereSiS to prevent erratic
reset operation. The open collector reset output is capable of sinking in excess
of 10 mA, and operation is guaranteed down to 1.0 V input with low standby
current. These devices are packaged in 3-pin TO-226AA and 8-pin surface
mount packages.
Applications include direct monitoring of the 5.0 V MPU/logic power supply
used in appliance, automotive, consumer and industrial equipment.
• Trimmed-In-Package Temperature Compensated Reference
• Comparator Threshold of 4.6 V at 25°C
• Precise Comparator Thresholds Guaranteed Over Temperature
• Comparator HystereSis Prevents Erratic Reset
• Reset Output Capable of Sinking in Excess of 10 mA
• Internal Clamp Diode for Discharging Delay Capacitor
• Guaranteed Reset Operation with 1.0 V Input

SILICON MONOLITHIC
INTEGRATED CIRCUIT

PSUFFIX
PLASTIC PACKAGE
CASE 29
(TO-226AA)

PIN 1. RESET
2. Input
3. Ground

• Low Standby Current
• Economical TO-226M and SO-8 Surface Mount Packages

DSUFFIX
PLASTIC PACKAGE
CASE 751
(50-8)

PIN 1. RESET
2. Input
3. N.C.
4. Ground
5. N.C.
6. N.C.
7. N.C.
8. N.C.

Representative Block Diagram
Input

r

2 (2)
-------------'R~~

I

1 1 (1)

I

I
I
I
I
I
I
I
I
I

I
I
I
I
I
I
I
I
_ _ _ _ _ _ _ _ _ ...1I
a (4)

~

V--

ORDERING INFORMATION
Device

8inkOnly
= Positive True logic

ange

MC34064D-5
MC34064P-5

Pin numbers adjacent to terminals are for the a-pin TO-226AA package.
Pin numbers in parenthesis are for the 0 suffix 80-8 package.

Te~erature

Package
50-8

0° to +70°C
TO-226AA

MC33064D-5

50-8
-40° to +85°C

MC33064P-5

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-252

TO-226AA

MC34064, MC33064
MAXIMUM RATINGS
Rating

Symbol

Value

Unit

Power Input Supply Voltage

Vin

-1.0to 10

V

Reset Output Voltage

Vo

10

V

ISink

Internally
Limited

mA

Clamp Diode Forward Current, Pin 1 to 2 (Note 1)

IF

100

rnA

Power Dissipation and Thermal Characteristics
P Suffix, Plastic Package
Maximum Power Dissipation @ TA =25"C
Thermal Resistance, Junction to Air
D Suffix, Plastic Package
Maximum Power Dissipation @TA =25"C
Thermal Resistance Junction to Air

PD
RaJA

625
200

mW
"CIW

PD
RaJA

625
200

"CIW

Operating Junction Temperature

TJ

+150

"C

Operating Ambient Temperature
MC34064
MC33064

TA

Reset Output Sink Current (Note 1)

..

mW

"C

o to +70
-40 to +85

Storage Temperature Range

Tstg

-65 to +150

"C

ELECTRICAL CHARACTERICISTICS (For typical values TA = 25"C, for minimax values TA is the operating ambient temperature range
that applies [Notes 2 and 3].)
Characteristics

COMPARATOR
Threshold Voltage
High State Output (Vin Increasing)
Low State Output (Vin Decreasing)
Hysteresis

V
VIH
VIL
VH

4.5
4.5
0.01

4.61
4.59
0.02

4.7
4.7
0.05

-

0.46
0.15

1.0
0.4
0.1

RESET OUTPUT
Output Sink Saturation
(Vin = 4.0 V, ISink = 8.0 mAl
(Vin = 4.0 V, ISink = 2.0 rnA)
(Vin = 1.0 V, ISink = 0.1 rnA)
Output Sink Current (Vin, Reset

V

VOL

= 4.0 V)

Output Off-State Leakage (Vin, Reset

= 5.0 V)

Clamp Diode Forward Voltage, Pin 1 to 2 (IF

= 10 rnA)

-

ISink

10

27

60

mA

IOH

-

0.02

0.5

J.lA

VF

0.6

0.9

1.2

V

TOTAL DEVICE
Operating Input Voltage Range
Quiescent Input Current (Vin

= 5.0 V)

NOTES: 1. Maximum package power dissipation limits must be observed.
2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
3. Tlow =
O"C for MC34064
Thigh = +70"C for MC34064
-40"C for MC33064
+85"C for MC33064

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-253

MC34064, MC33064
Figure 2. RESET Output Voltage versus
Input Voltage

Figure 1. RESET Output Voltage versus
Input Voltage
10

5.0 .---.----.---,,--,...----,---,,----,--,

r-.RL =10kl0Vin
TA=25°C

2:

/"

w

Cl

I!i

g
~

--t====t:==:t====t:===1=:::::j

r- RL = 10 k 10 Vin
TA = 25°C
4.0 1--+--+----1I---I----i----1I-----1----t

/"

8.0
6.0

/'

2:

/'

t!l
~

"

4.0

3.0 1--+--+----11--1----1----11----1----1

~

~ 2.0 1--+--+----1I---I----i----1I-----1----t

§

o
02.0

o 1.0 1--+--+----11--1----1----11----1----1

>

>

I

oIA
o

2.0

4.0
6.0
Vin. INPUT VOLTAGE M

8.0

OL-__

Figure 3. Comparator Threshold Voltage
versus Temperature
4.630

~~

4.560

10

__

4.580

~

__

w

~

!j

~

9

4.620

ULrThJhold
H' h State Ou1pu1

4.610

/

;
$
.....
~ 4.590
~

/'"

4.570
-55

~

. . . r----.

~

-25

~

Lower Threshold
Low
Output

Statj

-........

~

100

Vin=4.0V

) TA'=250C

2:

i!5

~

1.5

TA=85°C

V

j;

:i

1.0

~

0.5

~

o

>

,

0.6

~V

./V

,,/
,/'

V

0.4

~

TA=+25°C

.5

+85°(

125

Figure 5. RESET Output Saturation versus
Sink Curren
2.0

0.2

o
o

-

~

..dIV

10

\

+850

1.1
-40°C

~
2.0

4.0
6.0
Vin. INPUT VOLTAGE M

8.0

Figure 6. RESET Delay Time

t-

~=-400C-

20
30
ISink. SINK CURRENT (rnA)

<

Y r\

/. ,/'/ I-'
~

"

~

4.640

.......... I
/
./

0.8

;;!;

"'-

0
25
50
75
TA. AMBIENT TEMPERATURE (OC)

__

~~
TA= +25°C
I
......
~ "V,
_40°f'
,~

II:

G
.....

/'"

4.580

L_~L-~

1.0

.1

4.600

__

Figure 4. Input Current versus Input Voltage

RL= 10ktoVin

2:

~

4.600
4.620
Vin. INPUT VOLTAGE M

40
200 nsJDlV

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA
3-254

10

MC34064, MC33064
Figure 7. Clamp Diode Forward Current
versus Voltage
80

I
f- Vin=OV

/

TA = 25°C
:[ 60

!z
w
II:
II:

=>
u 40

i

~ 20

V

Ii.

o

V

/

J

V

./

o

0.4

0.8
1.2
VR FORWARD VOLTAGE M

1.6

Figure 8. Low Voltage Microprocessor Reset

+

R

, -2 (2)- - - - - - ,

Power
Supply

I
I
I
I

Microprocessor
CircuH

11(1)

I
I
I

l

CDlY

A time delayed reset can be accomplished wHh the
addHion of CDlY. For systems with extremely fast
power supply rise times «500 ns) His recommended
that the RCDlY time constant be greater than 5.0 I1s.
tDlY = RCDlY In (1 _

Vt~(~PU))
Vln

Figure 9. Low Voltage Microprocessor Reset with Additional Hysteresis

TEST DATA

,--

lin+
Power
Supply

VH
(mV)

2(2)

Microprocessor
CircuH

I
I
I

VH~RL

I

':\.Vth(lower) ~ 340 RH x 10-6

4.6RH

-

+0.02

Where: RH';; 150 0
Rl<:1.5n,';;10kn

Comparator hysteresis can be increased wHh the addition of resistor RH. The hysteresis equation has been sim·
plified and does not account forthe change of input current lin as VCC crosses the comparator threshold (Figure
4). An increase of the lower threshold d Vth(lower) will be observed due to lin which is typically 340!1A at 4.59 V.
The equations are accurate to ±10% wHh RH less than 150n and Rlbetween 1.5 kOand 10 kO.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-255

lI.Vth
(mV)

RH
(0)

RL
(kO)

20

0

0

0

51

3.4

10

1.5
4.7

40

6.8

20

81

6.8

20

1.5

71

10

30

2.7

112

10

30

1.5

100

16

47

2.7

164

16

47

1.5

190

34

100

2.7

327

34

100

1.5

276

51

150

2.7

480

51

150

1.5

MC34064, MC33064
Figure 10. Voltage Monitor

Figure 11. Solar Powered Battery Charger
+

I.Ok

-J,

/
/
/

!.@

I.-___-___~~~~;~~-*~

Power
Supply

I

I

Solar
Cells

~L:::::t==--.J
Figure 12. Low Power Switching Regulator
25~H

Vin = 11.50-______- .________......__..,
to14.5V

VO=5.0V
lo=50mA

4.7k

I

--

I

I t(I)

I
I
I

I
I
..J

L

Test

Conditions

Line Regulation

Vin= 11.5Vto 14.5V,10=50rnA 35rnV

Load Regulation

Yin = 12.6 V,IO = 0 rnA to 50 rnA

12rnV

Output Ripple

Yin = 12.6 V, 10 = 50 rnA

60rnVp_p

Efficiency

Yin = 12.6 V, 10 = 50 rnA

77%

Figure 13. MOSFET Low Voltage Gate Drive Protection

J~

4.6V-A

Results

o-__+ _________'V2\1170~---_4p_....J

9.

MTP3055EL

!.@---

I.-------~~~I~~
I

1 1 (1)

I

I

~L:::::t==-~J
Overheating olthe logic level power MOSFET dueto insufficient gate voltage can be prevented wnh the above
circun. When the input signal is below the 4.6 Vthreshold olthe MC34064, ns output grounds the gate of the
L2 MOSFET.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-256

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

MC34065-H,L
MC33065-H,L

Advance Information

High Performance Dual Channel
Current Mode Controller
The MC34065-H,L series are high performance, fixed frequency, dual current
mode controllers. They are specifically designed for off-line and DC-to-DC
converter applications offering the designer a cost effective solution with minimal
external components. These integrated circuits feature a unique oscillator for
precise duty cycle limit and frequency control, a temperature compensated
reference, two high gain error amplifiers, two current sensing comparators, Drive
Output 2 Enable pin, and two high current totem pole outputs ideally suited for
driving power MOSFETs.
Also included are protective features consisting of input and reference
undervoltage lockouts each with hysteresis, cycle-by-cycle current limiting, and
a latch for single pulse metering of each output. These devices are available in
dual-in-line and surface mount packages.
The MC34065-H has UVLO thresholds of 14 V (on) and 10 V (off), ideally suited
for off-line converters. The MC34065-L is tailored for lower voltage applications
having UVLO thresholds of 8.4 V (on) and 7.8 V (off).
• Unique Oscillator for Precise Duty Cycle Limit and Frequency Control
• Current Mode Operation to 500 kHz

HIGH PERFORMANCE
DUAL CHANNEL
CURRENT MODE CONTROLLER
SILICON MONOLITHIC
INTEGRATED CIRCUIT

I

PSUFFIX
PLASTIC PACKAGE
CASE 648

DWSUFFIX
PLASTIC PACKAGE
CASE 751G
(SOP-8+8L)

• Automatic Feed Forward Compensation
• Separate Latching PWMs for Cycle-8y-Cycle Current Limiting
• Internally Trimmed Reference with Undervoltage Lockout
• Drive Output 2 Enable Pin
• Two High Current Totem Pole Outputs

PIN CONNECTIONS

• Input Undervoltage Lockout with Hysteresis
• Low Start-Up and Operating Current

Vee

Sync Input

Vrel
Drive Output 2 Enable

Simplified Block Diagram

Voltage Feedback 1 4

Vee

Voltage Feedback 2

Compensation 1 5

Compensation 2

Current Sense 1 6
Drive Output 1 7

Drive Output 2

(Top View)
Drive Output 1

ORDERING INFORMATION

Voltage
Feedback 1 4
Compensation 1

ot--t....:..:::!:..:...J

"------+-,0

Current Sense 1

Device

Temperature
Range

MC34065DW-H
MC34065DW-L

. Drive Oulpul 0+--+--1
214

MC34065P-H

I

Enable

Plastic DIP

MC34065P-L

Voltage
Feedback213

Compensation 2

Package
SOP-8+BL

D· to +70·C

MC33065DW-H
MC33065DW-L

O't'--"!!!I:.!...I

12

MC33065P-H
MC33065P-L

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA
3-257

SOP-8+8L
- 40· to +B5·C

II

Plastic DIP

MC34065-H,L, MC33065-H,L
MAXIMUM RATINGS
Rating

Symbol

Value

VCC

20

V

400

rnA

Output Energy (Capacitive Load per Cycle)

10
W

5.0

j.tJ

Current Sense, Enable, and Voltage Feedback Inputs

Yin

-0.3to +5.5

V

Sync Input
High State (Voltage)
Low State (Reverse Current)

VIH
IlL

+5.5
-5.0

V
rnA

Error Amp Output Sink Current

Power Supply Voltage
Output Current, Source or Sink (Note 1)

Unit

10

10

rnA

Power Dissipation and Thermal Characteristics
DW Suffix, Plastic Package Case 751G
Maximum Power Dissipation@TA=25°C
Thermal Resistance Junction to Air

PD
RaJA

862
145

mW
°C/W

P Suffix, Plastic Package Case 648
Maximum Power Dissipation @ TA = 25°C
Thermal Resistance Junction to Air

PD
RaJA

1.25
100

mW
°C/W

Operating Junction Temperature

TJ

+150

°C

Operating Ambient Temperature (Note 3) MC34065
MC33065

TA

oto +70

°C

Storage Temperature Range

Tstg

-40to +85
-65to+150

°C

ELECTRICAL CHARACTERICISTICS(VCC = 15 V [Note 2], RT = 8.2 kQ, CT = 3.3 nF, for typical values TA = 25°C, for minimax values
TA is the operating ambient temperature range that applies to [Note 3].)

L

I

Characteristics

Symbol

I

Min

I

Typ

Max

Unit

4.85

5.0

5.13

V

2.0

20

mV

3.0

25

mV

REFERENCE SECTION
Reference Output Voltage (10 = 1.0 rnA, TJ = 25°C)

Vref
Regload

-

Total Output Variation over Line, Load, and Temperature

Vref

4.8

-

Output Short Circuit Current

ISC

30

46.5
45

Line Regulation (VCC = 11 V to 20 V)

Regline

Load Regulation (10 = 1.0 rnA to 10 rnA, VCC = 20 V)

5.15

V

100

-

rnA

49
49

51.5
53

-

0.2

1.0

%

46

49.5

%

OSCILLATOR AND PWM SECTIONS
Total Frequency Variation over Line and Temperature
VCC = 11 V to 20 V, TA = Tlow to Thigh

kHz

fosc
MC34065
MC33065

Frequency Change with Voltage (VCC = 11 V to 20 V)

t.fosdt.V

Duty Cycle at each Output

Maximum
Minimum

Sync Input Current
High State (Vin = 2.4 V)
Low State (Vin = 0.8 V)

DC max
DCmin

-

-

52
0

IIH
IlL

-

170
80

250
160

VFB

2.45

!LA

ERROR AMPLIFIERS
Voltage Feedback Input (VO = 2.5 V)

Input Bias Current (VFB = 5.0 V)

liB

-

2.5

2.55

V

-0.1

-1.0

!LA

AVOL
BW

65

100

-

dB

Unity Gain Bandwidth (TJ = 25°C)

0.7

1.0

MHz

Power Supply Rejection Ratio (VCC = 11 V to 20 V)

PSRR

60

90

-

Open-Loop Voltage Gain (VO = 2.0 V to 4.0 V)

Output Current
Source (VO = 3.0 V, VFB = 2.3 V)
Sink (VO = 1.2 V, VFB = 2.7 V)
Output Voltage Swing
High State (RL = 15 k to ground, VFB = 2.3 V)
Low State (RL = 15 k to Vref, VFB = 2.7 V)

Isource
Isink

0.45
2.0

1.0
12

-

VOH
VOL

5.0

6.2
0.8

-

dB
rnA

-

V

-

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-258

1.1

MC34065-H,L, MC33065-H,L
ELECTRICAL CHARACTERICISTICS(VCC = 15 V [Note 2), RT = 8.2 k!l, CT = 3.3 nF, for typical values TA = 25°C, for minimax values
TA is the operating ambient temperature range that applies to [Note 3).)

I

Characteristics

Symbol

I

Min

I

Typ

Max

Unit
VN

CURRENT SENSE SECTION
Current Sense Input Voltage Gain (Notes 4 and 5)

AV

2.75

3.0

3.25

Maximum Current Sense Input Threshold (Note 4)

Vth

0.9

1.0

1.1

V

Input Bias Current

liB

-

-2.0

-10

tPLN(ln/Out)

-

I1A

150

300

ns

VIH
VIL

3.5
0

-

-

Vrel
1.5

V

liB

100

250

400

I1A

0.3
2.4
13.3
11.2

0.5
3.0

V

Propagation Delay (Current Sense Input to Output)

2 ENABLE PIN

DRIVE OUTPUT

Enable Pin Voltage -

High State (Output 2 Enabled)
Low State (Output 2 Disabled)

Low State Input Current (VIL = 0 V)
DRIVE OUTPUTS
Output Voltage -

Low State (Isink = 20 rnA)
(Isink = 200 rnA)
High State (lsource = 20 rnA)
(Isource = 200 rnA)

-

Output Voltage with UVLO Activated (VCC = 6.0 V, ISink = 1.0 rnA)

VOL

-

VOH

1.6
12.8
10

VOL(UVLO)

Output Voltage Rise Time (CL = 1.0 nF)

tr

Output Voltage Fall Time (CL = 1.0 nF)

tf

-

12.3

-

0.1

1.1

V

50

150

ns

50

150

ns

7.8
13

8.4
14

9.0
15

7.2
9.0

7.8
10

8.4
11

UNDERVOLTAGE LOCKOUT SECTION
Start-Up Threshold (VCC Increasing)
-LSuffix
-H Suffix

V

Vth

Minimum Operating Voltage After Turn-On (VCC Decreasing)
-LSuffix
-H Suffix

V

VCC(min)

TOTAL DEVICE
Power Supply Current
Start-Up
-L Suffix (VCC = 6.0 V)
-H Suffix (VCC = 12 V)
Operating (Note 2)

-

NOTES: 1. MaXimum package power diSSipation limits must be observed.
2. Adjust

AV Compensation
5. Comparator gain is defined as AV "" IIV Current Sense

Figure 1_ Timing Resistor versus
Oscillator Frequency

\

~

a: 12 1\

~
en

\

w
a: 10

\

C!l

:z

':E 8.0

i=

,.:

a: 6.0
4.0

\

\

\

10k

,

\

\

,,

\

\

500 pF\

II

.

1.0 nF

5.0nF\

er= \1
10 nF "
vee = 15 v\.
TA = 25°e

\ \

1,\
11\1

\

\

\

,

\

0.8
1.0
25

t~~g~ : !~g:g l~~ ~~~g~~

~~: ~ ~~}8rf~~~~CJ6g~g65

14 3.3 nF-\.

0.4
0.6
20

4. This parameter IS measured at the latch tnp POint With VFB "" 0 V

Vee above the start-up threshold before setting to 15 V.

3. Low duty cycle pulse techniques are used during test to maintain junction temperature
as close to ambient as possible:

16

rnA

ICC

" 1\\
LL \

1\
\

""

2.2 nF \

\

\

\.

\

'\

£:
::;;
=>

22~ p~
1\ I
\ I

\

~

48

::;;

46

~l~

~

44

Output 1

~
=>
c 42

\

:--..

~

'\. ,Output 2

~

330pF

\
\

50

11~P~\

\

\

Figure 2. Maximum Output Duty Cycle
versus Oscillator Frequency

~

_ Vee = 15V

Rr = 4.0 kto 16 k

-TA=25°
cS 40 -CL=
15pF

r....

"

c

1'\

'\.

'\.

"

30k 50k
lOOk
300k 500k
IOSC, OSCILLATOR FREQUENCY (Hz)

38
1.0M

10k

lOOk
300k 500k
30k SOk
IOSC, OSCILLATOR FREQUENCY (Hz)

MOTOROLA LlNEARIiNTERFACE ICs DEVICE DATA
3-259

1.0M

II
I

MC34065-H,L, MC33065-H,L
Figure 3. Error Amp Small-Signal
Transient Response

Figure 4. Error Amp Large-Signal
Transient Response

2.55

III

3.0V

0::
0

2.50

>"
E
0

'"

2.45

2.50 V

2.0V
1.0J.lS/DIV

1.0IlS/DIV

Figure 5. Error Amp Open-Loop Gain and
Phase versus Frequency
10

100

~ SO
w
(!)

13

"'"

r-....

60

.....,

~
0..
40
o

"'" .'-I"'"
'-

:Z 20

w

0..

"'"II"..f'... r--..

I"..

.::.

0



---

en·

~

4.0

-

2.0

1;;
':It'

0 ~

o

tll

90%-

TA = 25°C

!;(

5e..
5

VCC=15V
80 !-l5 Pulsed load
120 Hz Rate

1

.......... ~

~

is -4.0

Figure 12. Output Waveform

I- TA = -55°C

....--

~

,..-

Sink Saturation
(load to VCC)
I ,
I
100
200
300
400
10. OUTPUT LOAD CURRENT (rnA)

--r

10%-

TA=25°C- Gnd-

100ns/DIV

Figure 14. Supply Current versus Supply Voltage

Figure 13. Output Cross Conduction Current

!:§

32

~

5

~

c

f=!2;

:>

5~

~

":'a:

~

0::>

c

>0

c-.r

~

we..
C)e..

~~
~8
1--

1r
5o
9'"

.§.
I-

:z

24

w
a:
a:

~
'">

::>
0

:>

en

-

16

0

~

Ci

::>

~

.B 8.0

-LSuffix

c..
c..

o
o

100ns/DIV

RT=10k
Gr = 3.3 nF
VFB=OV
_
Current Sense = 0 V
TA= 25°C

<'

I

il!
i
4.0

8.0
12
16
Vcc. SUPPLY VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-261

-HSuffix

I

20

MC34065-H,L, MC33065-H,L
OPERATING DESCRIPTION
The MC34065-H,L series are high performance, fixed
frequency, dual channel current mode controllers specifically
designed for Off-Line and DC-to-DC converter applications.
These devices offer the designer a cost effective solution with
minimal external components where independent regulation
oftwo power converters is required. The Representative Block
Diagram is shown in Figure 15. Each channel contains a high
gain error amplifier, current sensing comparator, pulse width
modulator latch, and totem pole output driver. The oscillator,
reference regulator, and undervoltage lock-out circuits are
common to both channels.
Oscillator
The unique oscillator configuration employed features
precise frequency and duty cycle control. The frequency is
programmed by the values selected for the timing
components RT and CT. Capacitor CT is charged and
discharged by an equal magnitude internal current source and
sink, generating a symmetrical 50 percent duty cycle
waveform at Pin 2. The oscillator peak and valley thresholds
are 3.5 V and 1.6 V respectively. The source/sink current
magnitude is controlled by resistor RT. For proper operation
over temperature it must be in the range of 4.0 kn to 16 kn as
shown in Figure 1.
As CT charges and discharges, an internal blanking pulse
is generated that alternately drives the center inputs of the
upper and lower NOR gates high. This, in conjunction with a
precise amount of delay time introduced into each channel,
produces well defined non-overlapping output duty cycles.
Output 2 is enabled while CT is charging, and Output 1 is
enabled during the discharge. Figure 2 shows the Maximum
Output Duty Cycle versus Oscillator Frequency. Note that
even at 500 kHz, each output is capable of approximately 44%
on-time, making this controller suitable for high frequency
power conversion applications.
In many noise sensitive applications it may be desirable to
frequency-lock the converter to an external system clock. This
can be accomplished by applying a clock signal as shown in
Figure 17. For reliable locking, the free-running oscillator
frequency should be set about 10% less than the clock
frequency. Referring to the timing diagram shown in Figure 16,
the rising edge of the clock signal applied to the Sync input,
terminates charging of CT and Drive Output 2 conduction. By
tailoring the clock waveform symmetry, accurate duty cycle
clamping of either output can be achieved. A circuit method for
this, and multi unit synchronization, is shown in Figure 18.
Error Amplifier
Each channel contains a fully-compensated Error Amplifier
with access to the inverting input and output. The amplifier
features a typical DC voltage gain of 100 dB, and a unity gain
bandwidth of 1.0 MHz with 71 0 of phase rnargin (Figure 5). The
noninverting input is internally biased at 2.5 V and is not
pinned out. The converter output voltage is typically divided
down and monitored by the inverting input through a resistor
divider. The maximum input bias current is -1.0 J.lA which will
cause an output voltage error that is equal to the product of the
input bias current and the equivalent input divider source
resistance.

The Error Amp output (Pin 5, 12) is provided for external loop
compensation. The output voltage is offset by two diode drops
(~1.4 V) and divided by three before it connects to the inverting
input of the Current Sense Comparator. This guarantees that
no pulses appear at the Drive Output (Pin 7,10) when the error
amplifier output is at its lowest state (VoLl. This occurs when
the power supply is operating and the load is removed, or at
the beginning of a soft-start interval (Figures 20, 21).
The minimum allowable Error Amp feedback resistance is
limited by the amplifier's source current (0.5 mAl and the
output voltage (VOH) required to reach the comparator's 1.0 V
clamp level with the inverting input at ground. This condition
happens during initial system startup or when the sensed
output is shorted:
R . _ 3.0 (1.0 V) + 1.4 V
f(mln) 0.5 mA

= 8800 n

Current Sense Comparator and PWM Latch
The MC34065 operates as a current mode controller,
whereby output switch conduction is initiated by the oscillator
and terminated when the peak inductor current reaches the
threshold level established by the Error Amplifier output. Thus
the error signal controls the peak inductor current on a
cycle-by-cycle basis. The Current Sense Comparator-PWM
Latch configuration used ensures that only a single pulse
appears at the Drive Output during any given oscillator cycle.
The inductor current is converted to a voltage by inserting a
ground-referenced sense resistor RS in series with the source
of output switch Q1. This voltage is monitored by the Current
Sense Input (Pin 6, 11) and compared to a level derived from
the Error Amp output. The peak inductor current under normal
operating conditions is controlled by the voltage at Pin 5, 12
where:
V(Pin 5,12) -1.4 V
Ipk ~
3 RS
Abnormal operating conditions occur when the power
supply output is overloaded or if output voltage sensing is lost.
Under these conditions, the Current Sense Comparator
threshold will be internally clamped to 1.0 V. Therefore the
maximum peak switch current is:
1.0 V
I
pk(max)= ~
When designing a high power switching regulator it may be
desirable to reduce the internal clamp voltage in orderto keep
the power dissipation of RS to a reasonable level. A simple
method to adjust this voltage is shown in Figure 19. The two
external diodes are used to compensate the internal diodes,
yielding a constant clamp voltage over temperature. Erratic
operation due to noise pickup can result if there is an
excessive reduction of the Ipk(max) clamp voltage.
A narrow spike on the leading edge of the current waveform
can usually be observed and may cause the power supply to
exhibit an instability when the output is lightly loaded. This
spike is due to the power transformer interwinding
capacitance and output rectifier recovery time. The addition of
an RC filter on the Current Sense input with a time constant
that approximates the spike duration will usually eliminate the
instability, refer to Figure 24.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-262

MC34065-H,L, MC33065-H,L
Undervoltage Lockout

Drive Outputs and Drive Ground

Two Undervoltage Lockout comparators have been
incorporated to guarantee that the IC is fully functional before
the output stages are enabled. The positive power supply
terminal (VCC) and the reference output (Vref) are each
monitored by separate comparators. Each has built-in
hysteresis to prevent erratic output behavior as their
respective thresholds are crossed. The VCC comparator
upper and lower thresholds are 14 V/10 V for -H suffix, and
8.4 V/7.6 V for -L suffix. The Vref comparator upper and lower
thresholds are 3.6 V/3.4 V respectively. The large hysteresis
and low start-up current of the -H suffix version makes it ideally
suited in off-line converter applications where efficient
bootstrap start-up techniques are required (Figure 28). The-L
suffix version is intended for lower voltage DC-to-DC converter
applications. The minimum operating voltage for the -H suffix
is 11 V and 8.2 V for the -L suffix.

Each section contains a single totem-pole output stage that
is specifically designed for direct drive of power MOSFETs.
The Drive Outputs are capable of up to ±400 rnA peak current
with a typical rise and fall time of SO ns with a 1.0 nF load.
Additional internal circuitry has been added to keep the
outputs in a sinking mode whenever an Undervoltage Lockout
is active. This characteristic eliminates the need for an
external pull-down resistor. The totem-pole output has been
optimized to minimize cross-conduction current in high speed
operation. The addition of two 10 n resistors, one in series with
the source output transistor and one in series with the sink
output transistor, reduces the cross-conduction current to
minimal levels, as shown in Figure 13.
Although the Drive Outputs were optimized for MOSFETs,
they can easily supply the negative base current required by
bipolar NPN transistors for enhanced turn-off (Figure 2S).

Figure 15. Representative Block Diagram

,-=_____-+-_---,
Vee

I" -

-

-

-

-

16

II
01
RT

II

Voltage Feedback 1

Compensation 1

RS

02

Current Sense 2
Compensation 2

Q-L------'
12L
Gnd

- _;ij - - - __ I
DriveGnd

9

'='

~
~

11

= Sink Only
Positive True Logic

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-263

RS

a

I

MC3406S-H,L, MC3306S-H,L
Figure 16_ Timing Diagram
I

I

I

rLJLL

Sync Input

~~--~~--~~--~~--~-,--,--,-

I

I

I

I

I

I

I

I

I

I

CapacitorCT

lEI

Latch 1
"SeF Input

Compensation 1 ~'--_ _Current Sense 1
Latch 1
"Reser Input

Drive Output 1

,

DriveOutpul
Enable
Lalch2
"Sef Input

I

I

I

I

I

I

I

I

I

I

I '- I

I

Compensation'~

Current Sense'

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

Latch 2
"Reser Input

Drive Output 2

The outputs do not contain internal current limiting, therefore
an external series resistor may be required to prevent the peak
output current from exceeding the ±400 mA maximum rating.
The sink saturation (VoLl is less than 0.75 V at 50 mAo
A separate Drive Ground pin is provided and, with proper
implementation, will significantly reduce the level of sWitching
transient noise imposed on the control circuitry. This becomes
particularly useful when reducing the Ipk(max) clamp level.
Figure 23 shows the proper ground connections required for
current sensing power MOSFET applications.
Drive Output 2 Enable Pin

This input is used to enable Drive Output 2. Drive Output 1
can be used to control circuitry that must run continuously
such as volatile memory and the system clock, or a remote
controlled receiver, while Drive Output 2 controls the high
power circuitry that is occasionally turned off.
Reference

Design Considerations
Do not attempt to construct the converter on wire-wrap
or plug-in prototype boards. High frequency circuit layout
techniques are imperative to prevent pulse-width jitter. This is
usually caused by excessive noise pick-up imposed on the
Current Sense or Voltage Feedback inputs. Noise immunity
can be improved by lowering circuit impedances at these
points. The printed circuit layout should contain a ground
plane with low current signal and high current switch and
output grounds returning on separate paths back to the input
filter capacitor. Ceramic bypass capacitors (0.1 ~F) connected
directly to VCC and Vref may be required depending upon
circuit layout. This provides a low impedance path for filtering
the high frequency noise. All high current loops should be kept
as short as possible using heavy copper runs to minimize
radiated EM!. The Error Amp compensation circuitry and the
converter output voltage-divider should be located close to the
IC and as far as possible from the power switch and other
noise generating components.

The 5.0 V bandgap reference is trimmed to ±2.0% tolerance
at TJ = 25°C. The reference has short circuit protection and is
capable of providing in excess of 30 mA for powering any
additional control system circuitry.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-264

MC34065-H,L, MC33065-H,L

Figure 18. External Duty Cycle Clamp and
Multi Unit Synchronization

Figure 17. External Clock Synchronization

1----------

v",I----------

a

220pF

Externa/

Sync

Input

...fUL

1.08

,~--­

IRA + RBle

The external diode clamp is required if the negative Sync current
is greater than -5.0 rnA.

RB
Dmax Drive Output 1 = RA + RS

To additional MC34065s

RA

Dmax Drive Oulpul2 = - RA + RS

PIN DESCRIPTION
Pin#

Function

Description

1

Sync Input

A narrow rectangular waveform applied to this input will synchronize the oscillator. A DC voltage
within the range of 2.4 V to 5.5 V will inhibit the oscillator.

2

CT

nming capacitor CT connects from this pin to ground setting the free-running oscillator frequency
range.

3

RT

Resistor RT connects from this pin to ground precisely setting the charge current for CT. RT must be
between 4.0 k and 16 k.

4

Voltage Feedback 1

This pin is the inverting input of Error Amplifier 1. It is normally connected to the switching power
supply output through a resistor divider.

5

Compensation 1

This pin is the output of Error Amplifier 1 and is made available for loop compensation.

6

Current Sense 1

A voltage proportional to the inductor current is connected to this input. PWM 1 uses this information
to terminate conduction of output switch 01.

7

Drive Output 1

This pin directly drives the gate of a power MOSFET 01. Peak currents up to 400 mA are sourced
and sunk by this pin.

8

Gnd

This pin is the control circuitry ground return and is connected back to the source ground.

9

Drive Gnd

This pin is a separate power ground return that is connected back to the power source. It is used to
reduce the effects of switching transient noise on the control circuitry.

10

Drive Output 2

This pin directly drives the gate of a power MOSFET 02. Peak currents up to 400 mA are sourced
and sunk by this pin.

11

Current Sense 2

A voltage proportional to inductor current is connected to this input. PWM 2 uses this information to
terminate conduction of output switch 02.

12

Compensation 2

This pin is the output of Error Amplifier 2 and is made available for loop compensation.

13

Voltage Feedback 2

This pin is the inverting input of Error Amplifier 2. It is normally connected to the switching power
supply output through a resistor divider.

14

Drive Output 2 Enable

A logic low at this input disables Drive Output 2.

15

Vref

This is the 5.0 V reference output. It can provide bias for any additional system circuitry.

16

VCC

This pin is the positive supply of the contrellC. The minimum operating voltage range after start-up is
11 V to 15.5 V for the -H suffix, 8.2 V to 9.5 V for the -L suffix.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-265

I

MC34065-H,L, MC33065-H,L
Figure 19. Adjustable Reduction of Clamp Level

Figure 20. Soft-Start Circuit

vee

Vref

15

II[

lEI

ISoft-Start '" 2100 C in ~F

\' , Ipklmax) -

RS

Velamp

r INhere:OsVClampS
RS
1.0V

Figure 21. Adjustable Reduction of Clamp Level
with Soft-Start
Vee

Figure 22. MOSFET Parasitic Oscillations
Vee

QI

RS

VClamp""

~1.67 )
-.1 +
RI

ISoft-8tart=ln

I

Figure 23. Current Sensing Power MOSFET
Vee

RS
Series gate resistor Rg may be needed to damp high frequency parasitic
oscillations caused by the MOSFET input capacitance and any series
wiring inductance in the gate-source circuit. Rg will decrease the MOSFET
switching speed. Schottky diode Dl is required if circuit ringing drives the
output pin below ground.

Figure 24. Current Waveform Spike Suppression

Vin

Vee

Power Ground to
Input Source Return

VPin 6 _ RS Ipk 'DSlonl
'DMlon) t RS

Control Circuitry Ground
10 Pin 8

If: SENSEFET ~ MTPIONIOM
RS ~200
Then: VPin 6 = O.0751 pk

Virtually lossless current sensing can be achieved with the implementation of a
SENSEFET power switch. For proper operation during over current conditions, a
reduction afthe 'pk(max} clamp level must be implemented. Reterta Figures 19 and 21.

,-,,--~-+---,-,-'--+O_ _~-0..
RS
The addition of the RC filter will eliminate instability caused by the leading
edge spike on the current waveform.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-266

MC3406S-H,L, MC3306S-H,L
Figure 25. Bipolar Transistor Drive

Figure 26. Isolated MOSFET Drive

16

~ h~moval
---;.:

Charge

..

II[

Cl

The totem-pole outputs can furnish negative base current for enhanced
transistor turn-off, with the addition of capacitor Ct.

Figure 27. Dual Charge Pump Converter

16

+

f'

+Vo '" 2.0 Vee

12k

Output Load Regulation

-f.-

10 (mA)

0
1.0
5.0
10
50

+VO(V) -VO(V)

28.43
27.72
27.04
26.20
20.52

The capacitor's equivalent series resistance must limit the Drive Output current to 400 rnA. An additional series resistor may be required
when using tantalum or other low ESR capacitors. The positive output can provide excellent line and load regulation by connecting the
R2/R1 resistor divider as shown.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-267

-13.89
-12.90
-12.25
-11.44
-5.80

MC34065-H,L, MC33065-H,L
Figure 28.125 Watt Off-Line Converter
10eold

56k

3.OA

MUR110

75k

T2

L1

MURll0

'---~-----------------r----~~N

~==~------f---~~-t_oRTN

~~~-,~~t-------~-o1~~

__---+~__--~~-t-o ~:
16.2k

F==--f-------+-+OVre!
L.:..:.:.>=c..J
15

71L _ _ _~=:::I

Osc Deadtime
Osc RC 0 0 - - - - - - 1

rtO Gnd

-k-i

4

Drive Output B

Vre!
Error Amp Out

CSolI-Start

Error Amp
Inverting Input
Error Amp
Noninverting Input

Fault Input

Osc Control '?2t----,+L.,-r---.-J
Current 3 I

Enable/UVLO
Adjust
(Top View)

One-Shot RC n+---H
16 1

I
I

ORDERING INFORMATION
Device

Temperature Range

SO-16

MC34066DW
MC34066P

Package

0' to +70'C
Plastic DIP

MC33066DW

SO-16
-40' to +85'C

MC33066P

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-270

Plastic DIP

MC34066, MC33066
MAXIMUM RATINGS
Rating

Symbol

Value

Unit

VCC

20

V

Power Input Supply Voltage

..

A

Drive Output Current, Source or Sink (Note 1)
Continuous
Pulsed (0.5 !is, 25% Duty Cycle)

10

Error Amplifier, Fault, One-Shot, Oscillator, and
Soft-Start Inputs

Vin

-1.0 to +6.0

V

Vin(UVLO)

-1.0 to VCC

V

PD
RSJA

862
145

mW
'C/W

PD
RSJA

1.25
100

'CIW

Operating Junction Temperature

TJ

+150

'C

Operating Ambient Temperature
MC34066
MC33066

TA

UVLO Adjust Input

0.3
1.5

I

Power Dissipation and Thermal Characteristics
DW Suffix Package SO-16 Case 751G
Maximum Power Dissipation @ TA ~ 25'C
Thermal Resistance, Junction to Air
P Suffix Package Case 648
Maximum Power Dissipation @ TA ~ 25'C
Thermal Resistance Junction to Air

W

'c
a to +70
-40 to +85

Storage Temperature Range

Tstg

-65 to +150

'c

ELECTRICAL CHARACTERICISTICS (VCC ~ 12 V [Note 2], ROSC ~ 95.3 k, RDT ~ a n, RVFO ~ 5.62 k, COSC ~ 300 pF, RT ~ 14.3 k, CT ~
300 pF, CL ~ 1.0 nF, for typical values TA ~ 25'C, for min/max values TA is the operating ambienttemperature range that applies [Note 3]. unless
otherwise noted.)
Characteristics

REFERENCE SECTION
Reference Output Voltage (10 ~ a mA, TA ~ 25'C)

Vref

Line Regulation (VCC ~ 10 V to 18 V)

Regline

Load Regulation (10 ~ a mA to lamA)

Regload

Total Output Variation Over Line, Load, and Temperature

Vref

5.0

5.1

5.2

V

-

1.0

20

mV

-

1.0

20

mV

4.9

-

5.3

mV

Output Short Circuit Current

10

25

100

190

mA

Reference Undervoltage Lockout Threshold

Vth

3.8

4.3

4.8

V

Input Offset Voltage (V CM ~ 1.5 V)

VIO

-

1.0

10

mV

Input Bias Current (VCM ~ 1.5 V)

liB

-

0.2

1.0

!lA

110

-

a

0.5

!iA

ERROR AMPLIFIER

Input Offset Current (V CM ~ 1.5 V)
Open-Loop Voltage Gain (VCM ~ 1.5 V, Vo ~ 2.0 V)

AVOL

70

100

-

dB

Gain Bandwidth Product (f ~ 100 kHz)

GBW

2.5

4.2

-

MHz

Input Common Mode Rejection Ratio (VCM ~ 1.5 V to 5.0 V)

CMRR

70

95

-

dB

Power Supply Rejection Ratio (VCC ~ 10 V to 18 V, f ~ 120 Hz)

PSRR

80

100

-

dB

VOH
VOL

2.1

2.5
0.4

2.9
0.6

V

Output Voltage Swing
High State with Respect to Pin 3 (ISource ~ 2.0 mAl
Low State with Respect to Ground (lSink ~ 1.0 mAl

-

NOTES: 1. Maximum package power dissipation limits must be observed.
2. Adjust V CC above the Start-Up threshold before setting to 12 V.
3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
Tlow ~
O'C for MC34066
Thigh ~ +70'C for MC34066
-40'C for MC33066
+85'C for MC33066

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-271

MC34066, MC33066
ELECTRICAL CHARACTERICISTICS (Continued) (VCC = 12 V [Note 2], ROSC = 95.3 k, RDT = 0 n, RVFO = 5.62 k, COSC = 300 pF, RT
= 14.3 k, CT = 300 pF, CL = 1.0 nF, for typical values TA = 25°C, for minimax values TA is the operating ambient temperature range that applies
[Note 3], unless otherwise noted.)
Characteristics

OSCILLATOR
Frequency (Error Amp Output Low)
TA = 25°C
Total Variation (VCC = 10 Vto 18 V, TA = TLow to THigh)

fOSC(low)

Frequency (Error Amp Output High)
TA = 25°C
Total Variation (VCC = 10 V to 18 V, TA = TLow to THigh)

fOSC(high)

Oscillator Control Input Voltage, Pin 3 (ISink = 0.5 mA, TA = 25°C)

Yin

Output Deadtime (Error Amp Output High)
RDT=On
RDT= 1.0 k

DT

kHz
90
85

100

900
850

1000

1.3

1.4

1.5

70
700

100
800

1.5

1.57
1.6

-

110
115
kHz

600

-

1100
1150
V
ns

ONE-SHOT
Drive Output On-Time (RDT = 1.0 k)
TA = 25°C
Total Variation (VCC = 10 V to 18 V, TA = TLow to THigh)

ItS

tON

I

1.43
1.4

-

DRIVE OUTPUTS
Output Voltage
Low State (ISink = 20 mAl
(ISink = 200 mAl
High State (ISource = 20 mAl
(ISource = 200 mAl

V
VOL

-

VOH

1.2
2.0

9.5
9.0

0.8
1.5
10.3
9.8

-

VOL(UVLO)

-

0.8

1.2

V

Output Voltage Rise Time (CL = 1.0 nF)

tr

-

20

50

ns

Output Voltage Fall Time (CL = 1.0 nF)

tf

-

20

50

ns

0.95

1.0

1.05

V

-

-2.0

-10

ItA

60

100

ns

14.8
8.0

16
9.0

17.2
10

8.0
7.6

9.0
8.6

10
9.6

Output Voltage with UVLO Activated (VCC = 6.0 V, ISink = 1.0 mAl

FAULT COMPARATOR
Input Threshold

Vth

Input Bias Current (VPin 10 = 0 V)

liB

Propagation Delay to Drive Outputs (100 mV Overdrive)

tPLH(IN/OUT)

SOFT-START
Capacitor Charge Current (VPin 11 = 2.5 V)
Capacitor Discharge Current (VPin 11 = 2.5 V)

UNDERVOLTAGE LOCKOUT
Start-Up Threshold, VCC Increasing
Enabie/UVLO Adjust Pin Open
Enabie/UVLO Adjust Pin Connected to VCC

Vth(UVLO)

Minimum Operating Voltage After Turn-On
Enabie/UVLO Adjust Pin Open
Enabie/UVLO Adjust Pin Connected to VCC

VCC(min)

V

V

Enabie/UVLO Adjust Shutdown Threshold Voltage

Vth(Enable)

6.0

Enabie/UVLO Adjust Input Current (Pin 9 = OV)

lin(Enable)

-

TOTAL DEVICE
Power Supply Current (Enabie/UVLO Adjust Pin Open)
Start-Up (VCC = 13.5 V)
Operating (fOSC = 100 kHz, Note 2)
NOTES: 2. Adjust VCC above the Start-Up threshold before setting to 12 V.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-272

7.0
-0.2

-1.0

V
mA

MC34066, MC33066
Figure 1. MC34066 Functional Block Diagram

r----------------------------------,

I
I
I
I
I5

I
I
Enablel o-~..-v~H4--j
UVLO Adjust 9

U
-= I

Vrel
Gnd

I
I
I
I

>_-+I-f'l Drive

ROSC

114 OutputA

I

'UVLO + Fault'

Fault
Comparator

losci

'Faulr

1

1.0V!
Error Amp
Output '---{}---i-.....==-:-.,
Error Amp
Noninverting Input
Error Amp
Inverting Input
Amplifier
CSolI·Start
_________
~

Drive
Output B
Drive
Gnd

10

i
I
I
I
I

i

~

________________________ J

INTRODUCTION

As power supply designers have strived to increase power
conversion efficiency and reduce passive component size,
high frequency resonant mode power converters have
emerged as attractive alternatives to conventional
square-wave control. When compared to square-wave
converters, resonant mode control offers several benefits
including lower switching losses, higher efficiency, lower EMI
emission, and smaller size. This integrated circuit has been
developed to support new trends in power supply design. The
MC34066 Resonant Mode Controller is a high performance
bipolar IC dedicated to variable frequency power control at
frequencies exceeding 1.0 MHz. This integrated circuit
provides the features, performance and flexibility for a wide
variety of resonant mode power supply applications.
The primary purpose of the control chip is to supply precise
pulses to the gates of external power MOSFETs at a repetition
rate regulated by a feedback control loop. The MC34066 can
be operated in any of three modes as follows: 1) fixed on-time,
variable frequency; 2) fixed off-time, variable frequency; and
3) combinations of 1 and 2 that change from fixed on-time to
fixed off-time as the frequency increases. Additional features
of the IC ensure that system start-up and fault conditions are
administered in a safe, controlled manner.

A simplified block diagram of the IC is shown on the first
page of this data sheet, which identifies the main functional
blocks and the block-to-block interconnects. Figure 1 is a
detailed functional diagram which accurately represents the
internal circuitry. The various functions can be divided into two
sections. The first section includes the primary control path
which produces precise output pulses at the desired
frequency Oscillator, a One-Shot, a pulse Steering Flip-Flop,
a pair of power MOSFET Drivers, and a wide bandwidth Error
Amplifier. The second section provides several peripheral
support functions including a voltage reference, undervoltage
lockout, Soft-Start circuit, and a fault detector.
PRIMARY CONTROL PATH

The output pulse width and repetition rate are regulated
through the interaction of the variable frequency Oscillator,
One-Shot timer and Error Amplifier. The Oscillator triggers the
One-Shot which generates a pulse that is alternately steered
to a pair of totem-pole output drivers by a toggle Flip-Flop. The
Error Amplifier monitors the output of the regulator and
modulates the frequency of the Oscillator. High-speed
Schottky logic is used throughout the primary control channel
to minimize delays and enhance high frequency
characteristics.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-273

MC34066, MC33066
Oscillator
The characteristics of the variable frequency Oscillator are
crucial for precise controller performance at high operating
frequencies. In addition to triggering the One-Shot timer and
initiating the output pulse, the Oscillator also determines the
initial voltage for the One-Shot capacitor and defines the
minimum deadtime between output pulses. The Oscillator is
designed to operate at frequencies exceeding 1.0 MHz. The
Error Amplifier can control the oscillator frequency over a
1000:1 frequency range, and both the minimum and maximum
frequencies are easily and accurately programmed by the
proper selection of external components. The Oscillator also
includes an adjustable deadtime feature for applications
requiring additional time between output pulses.
The functional diagram of the Oscillator and One-Shot timer
is shown in Figure 2. The oscillator capacitor COSC is initially
charged by transistor 01 through the optional deadtime
resistor ROT When COSC exceeds the 4.9 V upper threshold
of the oscillator comparator, the base of 01 is pulled low
allowing COSC to discharge through the external resistors and
the internal Current Mirror. When the voltage on COSC falls
below the comparator's 3.6 V lower threshold, 01 turns on and
again charges COSC.
Figure 2. Oscillator and One-Shot Timer
vcc

COSC, which corresponds to the maximum oscillator
frequency, is given by Equation 1.

l

tdchg(min) = (ROT + ROSC)Coscln

5'~

2. 5 ROSC +
RVFO
(1)
2. 5 ROSC + 3.6
RVFO

The minimum oscillator frequency will result when the IOSC
current is zero, and COSC is discharged through the external
resistors ROSC and ROT. This occurs when the Error Amplifier
output voltage is less than the two diode drops required to bias
the input of the Current Mirror. The maximum oscillator
discharge time is given by Equation 2.
tdchg(max) = (ROT + ROSC) Coscin

(~)
3.6

(2)

The outputs of the controllC are off whenever the oscillator
capacitor COSC is being charged by transistor 01. The
minimum time between output pulses (deadtime) can be
programmed by controlling the charge time of COSC. Resistor
ROT reduces the current delivered by 01 to COSC, thus
increasing the charge time and output deadtime. Varying ROT
from 0 Q to 1000 Q will increase the output deadtime from
80 ns to 680 ns with COSC equal to 300 pF. The general
expression for the oscillator charge time is give by Equation 3.

Osc Oeadtime

5.1-3.6)
tchg(max) = R OT COSC In ( - - - + 80 ns
5.1-4.9

(3)

The minimum and maximum oscillator frequencies are
programmed by the proper selection of resistor ROSC and
RVFO. After selecting ROT for the desired deadtime, the
minimum frequency is programmed by ROSC using Equations
2 and 3 in Equation 4:

1
f

lose

i

'UVLO +Fault'

= tdchg(max) + tchg

(4)

OSC(min)

The maximum oscillator frequency is set by resistor RVFO in
a similar fashion using Equations 1 and 3 in Equation 5:

1

= tdchg(min) + tchg

(5)

fOSC(max)

Error Amp
Output

IfROTiszeroohms,COscchargesfrom3.6Vt05.1 Vinless
than 50 ns. The high slew rate of COSC and the propagation
delay of the comparator make it difficult to control the peak
Voltage. This accuracy issue is overcome by clamping the
base of 01 through diode 02 to a voltage reference. The peak
voltage of the oscillator waveform is thereby precisely set at
5.1 V.
The frequency of the Oscillator is modulated by varying the
current IOSC flowing through RVFO into the Osc Control
Current pin. The control current drives a unity gain Current
Mirrorwhich pulls an identical currentfrom the COSC capacitor.
As IOSC increases, COSC discharges faster thus decreasing
the Oscillator period and increasing the frequency. The
maximum frequency occurs when the Error Amplifier output is
at the upper clamp level, nominally 2.5 V above the voltage at
the Osc Control Current pin. The minimum discharge time for

The value chosen for resistor ROT will affect the peak
voltage of the oscillator waveform. As ROT is increased from
zero, the time required to charge COSC becomes large with
respect to the propagation delay through the oscillator
comparator. Consequently, the overshoot of the upper
threshold is reduced and the peak voltage on the oscillator
waveform drops from 5.1 V to 4.9 V. The best frequency
accuracy is achieved when ROT is zero ohms.
One-Shot Timer
The One-Shot capacitor CT is charged concurrently with the
oscillator capacitor by transistor 01, as shown in Figure 2. The
One-Shot period begins when the oscillator comparator turns
off 01, allowing CT to discharge. The period ends when
resistor RT discharges CT to the threshold of the One-Shot
comparator. Oischarging CT from an initial voltage of 5.1 V to
a threshold voltage of 3.6 V results in the One-Shot period
given by Equation 6.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-274

MC34066, MC33066
Figure 3. Timing Waveforms

ROT"O

fc(1"'--

tdchg > tOne·Shot ---11>11>-1"1141- tdchg < tOne-Shot ~

5.1 V

Ell

COSC

5.1 V

n n

toni

I I

JULJ
ILJl

AOUTI
~ ton

I I

--l

toft jj

BOUT

ROT = 1.0 k

I'"

tdchg > tOne-Shot
--

5.tV- 4.9V- -

-

-

1>1<11
-

tdchg i tchg i-t---

-l>i

tdChg--ll>i

tchg I tdchg\/

toft

fc- ton

~

BOUT _ _ _ _ _ _ _-1

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-275

MC34066, MC33066

tos = RT CT In

lEI

(~:~) = 0.348 RT CT

Output Section
(6)

Errors in the threshold voltage and propagation delays
through the output drivers will affect the One-Shot period. To
guarantee accuracy, the output pulse of the control ship is
trimmed to within 5% of 1.5 /-Ls with nominal values of RT
and CT.
The outputs of the Oscillator and One-Shot comparators are
OR'd together to produce the pulse 'ton,' which drives the
Flip-Flop and output drivers. The output pulse 'ton' is initiated
by the Oscillator, but either the oscillator comparator or the
One-Shot comparator can terminate the pulse. When the
oscillator discharge time exceeds the one-shot period, the
complete one-shot period is delivered to the output section. If
the oscillator discharge time is less than the one-shot period,
then the oscillator comparator terminates the pulse
prematurely and retriggers the One-Shot. The waveforms on
the left side of Figure 3 correspond to nonretriggered
operation with constant on-time and variable off-times. The
right side of Figure 3 represents retriggered operation with
variable on-time and constant off-time.

The pulse, 'ton,' generated by the Oscillator and One-Shot
timer is gated to dual totem pole output drives by the Steering
Flip-Flop shown in Figure 5. Positive transitions of 'ton' toggle
the Flip-Flop, which causes the pulses to alternate between
Output A and Output B. The flip-flop is reset by the
undeNoltage lockout circuit during start-up to guarantee that
the first pulse appears at Output A.
The totem-pole output drives are ideally suited for driving
power MOSFETs and are capable of sourcing and sinking
1.5 A. Rise and fall times are typically 20 ns when driving a
1.0 nF load. High source/sink capability in a totem-pole
driver normally increases the risk of high cross conduction
current during output transitions. The MC34066 utilizes a
unique design that virtually eliminates cross conduction, thus
controlling the chip power dissipation at high frequencies. A
separate ground terminal is provided for the output drivers to
isolate the sensitive analog circuitry from large
transient currents.
Figure 5. Steering Flip-Flop and Output Drivers
VCC

Error Amplifier
A fully accessible high performance Error Amplifier is
provided for feedback control olthe power supply system. The
Error Amplifier is internally compensated and features DC
open-loop gain greater than 70 dB, input offset voltage less
than 10 mV and guaranteed minimum gain-bandwidth product
of 2.5 MHz. The input common mode range extends from
1.5 V to 5.1 V, which includes the reference voltage. For
common mode voltages below 1.5 V, the Error Amplifier output
is forced low providing minimum oscillator frequency.
The Oscillator Control Current pin is biased by the Error
Amplifier output voltage through RVFO as illustrated in Figure
4. The output swing of the Error Amplifier is restricted by a
clamp circuit to limit the maximum oscillator frequency. The
clamp circuit limits the voltage across RVFO to 2.5 V,
thus limiting IOSC to 2.5 V/RVFO. Oscillator accuracy is
improved by trimming the clamp voltage to obtain the
fOSC(high) specification of 1.0 MHz with nominal value
external components.
Figure 4. Error Amplifier and Clamp
Ose Control I
Current ~-e---

Error Amp
Output L-<>-...I-*-_~
Error Amp
Noninverting Input
Error Amp
Inverting Input
I Error
I Amplifier

Error Amp
Output Clamp

'EAClamp'

Drivers

I
I
I
I

'---l....,r,

Drive
Output A
Drive
OutputB
Drive
Gnd

'Fault'

PERIPHERAL SUPPORT FUNCTIONS
The MC34066 Resonant Controller provides a number of
support and protection functions including a precision voltage
reference, undeNoltage lockout comparators, soft-start
circuitry, and a fault detector. These peripheral circuits ensure
that the power supply can be turned on and off in a safe,
controlled manner and that the system will be quickly disabled
when a fault condition occurs.
Undervoltage Lockout and Voltage Reference
Separate undeNoltage lockout comparators sense the
input VCC voltage and the regulated reference voltage as
illustrated in Figure 6. When VCC increases to the upper
threshold voltage, the VCC UVLO comparator enables the
Reference Regulator. After the Vref output of the Reference
Regulator rises to 4.2 V, the Vref UVLO comparator switches
the 'UVLO' signal to a logic zero state enabling the primary
control path. Reducing VCC to the lower threshold voltage
causes the VCC UVLO comparator to disable the Reference
Regulator. The Vref UVLO comparator then switches the
'UVLO' output to a logic one state disabling the controller.

L ________ _
MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-276

MC34066, MC33066
Figure 6. Undervoltage Lockout and Reference

1--------------------------1
I
I
I
I

Vee 15

15

Vref

~Gnd

:f 4.2V/4.0V
The Enabie/UVLO Adjust terminal allows the power supply
designer to select the VCC UVLO threshold voltages. When
this pin is open, the comparator switches the controller on at
16 V and off at 9.0 V. If this pin is connected to the VCC terminal,
the upper and lower thresholds are reduced to 9.0 V and 8.6 V,
respectively. Forcing the Enabie/UVLO Adjust pin low will pull
the VCC UVLO comparator input low (through an internal
diode) turning off the controller.
The Reference Regulator provides a precise 5.1 V
reference to internal circuitry and can deliver up to 10 mA to
external loads. The reference is trimmed to better than 2%
initial accuracy and includes active short circuit protection.
Fault Detector
The high-speed Fault Comparator and Latch illustrated in
Figure 7 can protect a power supply from destruction under
fault conditions. The Fault Input pin connects to the input of the
Fault Comparator. If this input exceeds the 1.0 V threshold of
the comparator, the Fault Latch is set and two logic signals
simultaneously disable the primary control path. The signal
labeled 'Fault' at the output of the Fault Comparator is
connected directly to the output drivers. This direct path
reduces the propagation delay from the Fault Input to the A
and B outputs to typically 70 ns. The Fault Latch output is OR'd
with 'UVLO' output from the Vref UVLO comparatorto produce
the logic output labeled 'UVLO + Fault.' This signal disables
the Oscillator and One-Shot by forCing both the COSC and CT
capacitors to be continually charged.
Figure 7. Fault Detector and Soft·Start
'UVLO + Fault' 'UVLO'

'Fault'

111

-------------------IJ
The Fault Latch is reset during start-up by a logic one at the
'UVLO' outputofthe Vref UVLO comparator. The latch can also

I
I
I

be reset after start-up by pulling the Enabie/UVLO Adjust pin
momentarily low to disable the Reference Regulator.
Soft-Start Circuit
The Soft-Start circuit shown in Figure 7 forces the variable
frequency Oscillator to start at the minimum frequency and
ramp upward until regulated by the feedback control loop. The
external capacitor at the CSoft-Start terminal is initially
discharged by the 'UVLO + Fault' signal. The low voltage on
the capacitor pass through the Soft-Start Buffer to hold the
Error Amplifier output low. After 'UVLO + Fault' switches to a
logic zero, the soft-start capacitor is charged by a 9.0 !lA
current source. The buffer allows the Error Amplifier output to
follow the soft-start capacitor until it is regulated by the Error
Amplifier inputs (or reaches the 2.5 V clamp). The soft-start
function is generally applicable to controllers operating below
resonance and can be disabled by simply opening the
CSoft-Start terminal.
APPLICATIONS
The MC34066 can be used for the control of series, parallel
or higher order half/full bridge resonant converters. The IC is
designed to provide control in discontinuous conduction mode
(OCM) or continuous conduction mode (CCM) or a
combination of the two. For example, in a parallel resonant
converter (PRC) operating in the OCM, the IC is programmed
to operate in fixed on-time, variable frequency mode of
operation. For a PRC operating in the CCM, the IC can be
programmed to operate in the variable frequency mode with
a fixed off-time.
When operating with a wide input voltage range, such as a
universal input power supply, a PRC can operate in the OCM
for high input voltage and in the CCM for low input voltage. In
this particular case, on-time is programmed corresponding to
OCM. The deadtime of the chip is programmed to provide the
desired off-time in the CCM. The frequency range is chosen to
cover the complete frequency range from the OCM to the
CCM. When programmed as such, the controller will operate
in the fixed on-time, variable frequency mode at low
frequencies. At the frequency which causes the Oscillator to
retrigger the One-Shot, the control law changes to variable
frequency with fixed off-time. At higher frequencies the supply
will operate in the CCM with this control law.
Although the IC is designed and optimized for double ended
push-pull type converters, it can also be used for single ended
applications, such as forward and flyback resonant
converters.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-277

-=1

MC34067
MC33067

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Advance Information

High Performance
Resonant Mode Controller
The MC34067 series of high performance zero voltage switch resonant
mode controllers are designed for Off-Line and DC-to-DC converter
applications that utilize frequency modulated constant off-time or constant
dead-time control. These integrated circuits feature a variable frequency
oscillator, a precise retriggerable one-shot timer, temperature compensated
reference, high gain wide bandwidth error amplifier, steering flip-flop, and dual
high current totem pole outputs ideally suited for driving power MOSFETs.
Also included are protective features consisting of a high speed fault
comparator and latch, programmable soft-start circuitry, input undervoltage
lockout with selectable thresholds, and reference undervoltage lockout.
These devices are available in dual-in-line and surface mount packages.
• Zero Voltage Switch Resonant Mode Operation

HIGH PERFORMANCE
ZERO VOLTAGE SWITCH
RESONANT MODE
CONTROLLER
SILICON MONOLITHIC
INTEGRATED CIRCUIT

PSUFFIX
PLASTIC PACKAGE
CASE 648

_
16

• Variable Frequency Oscillator with a Control Range Exceeding 1000:1
• Precision One-Shot Timer for Controlled Off-Time
• Internally Trimmed Bandgap Reference
• 4.0 MHz Error Amplifier
• Dual High Current Totem Pole Outputs

OW SUFFIX
PLASTIC PACKAGE
CASE 751G
(SO-16L)

• Selectable Undervoltage Lockout Thresholds with Hysteresis
• Enable Input
• Programmable Soft-Start Circuitry
• Low Start-Up Current for Off-Line Operation

Simplified Block Diagram

15

PIN CONNECTIONS

r---------------------,

I
I

vee
Enable! 9

Ose Charge

One-Shot RC

OseRC

VCC

Ose Control Current

Drive Output A

UVLOAdjus1 11-l-_ _~====;-"
OscCharge 0

PowerGnd

~~~~

Drive Output 8

Vrel
Error Amp Out

CSoft-Start

Inverting Input

Fautt Input

Noninverting Input

Enable/UVLO
Adjust
(Top View)

Error Amp 6
Ompu1 0-11---,
Noninverting 8
Inpu1
Inverting Inpu1 7

ORDERING INFORMATION

11

Soft·Start o,r---------i-=:So:::.ft.::S'=-art:..J
Device

MC34067DW
MC34067P
MC33067DW
MC33067P

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-278

Temperature
Range

010 + 70°C
- 40° 10 + 85°C

Package

SO-16L
Plastic DIP
SO-16L
PlaslicDIP

MC34067, MC33067
MAXIMUM RATINGS
Rating

Symbol

Value

Unit
V

Power Supply Voltage

VCC

20

Drive Output Current, Source or Sink (Note 1)
Continuous
Pulsed (0.5 I-lS, 25% Duty Cycte

to

0.3
1.5

Error Amplifier, Fault, One-Shot, Oscillator and
Soit-Start Inputs

Yin

-1.0to + 6.0

V

Vin(UVLO)

-1.0to VCC

V

Po
RaJA

862
145

mW
°CIW

Po
RaJA

1.25
100

W
°CIW

Operating Junction Temperature

TJ

+ 150

°C

Operating Ambient Temperature
MC34067
MC33067

TA

UVLO Adjust Input

A

Power Dissipation and Thermal Characteristics
OW Suffix, Plastic Package SO-16L Case 751 G
TA = 25°C
Thermal Resistance, Junction-to-Air
P Suffix, Plastic Package Case 648
TA = 25°C
Thermal Resistance, Junction-to-Air

°C
Oto + 70
-40to+85

Storage Temperature

Tstg

-55to+150

°C

ELECTRICAL CHARACTERISTICS (VCC = 12 V [Note 2], ROSC= 18.2 k, RVFO = 2940, COSC = 300 pF, RT = 2370 k, CT = 300 pF,
CL = 1.0 nF. For typical values TA = 25°C, for minimax values TA is the operating ambient temperature range that applies [Note 3], unless
otherwise noted.)
Characteristic

Symbol

Min

Typ

Max

Vref

5.0

5.1

5.2

V

1.0

20

mV

1.0

20

mV

Unit

REFERENCE SECTION
Reference Output Voltage (10 = 0 rnA, TJ = 25°C)
Line Regulation (VCC = 10 TO 18 V)

Regline

Load Regulation (10 = 0 rnA to 10 rnA)

Regload

-

Vref

4.9

-

5.3

V

Output Short Circuit Current

10

25

100

190

rnA

Reference Undervoltage Lockout Threshold

Vth

3.8

4.3

4.8

V

Total Output Variation Over Line, Load, and Temperature

ERROR AMPLIFIER
VIO

-

1.0

10

mV

Input Bias Current (VCM = 1.5 V)

liB

-

0.2

1.0

Input Offset Current (VCM = 1.5 V)

110

-

0

0.5

I-lA
I-lA

-

Input Offset Voltage (VCM = 1.5 V)

Open-Loop Voltage Gain (VCM = 1.5 V, Vo = 2.0 V)

AVOL

70

100

Gain Bandwidth Product (f = 100 kHz)

GBW

3.0

5.0

Input Common Mode Rejection Ratio (VCM = 1.5 to 5.0 V)

CMR

70

95

Power Supply Rejection Ratio (VCC = 10 to 18 V, f = 120 Hz)

PSR

80

100

Output Voltage Swing
High State
Low State

VOH
VOL

2.8

3.2
0.6

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-279

-

-

0.8

dB
MHz
dB
dB
V

MC34067, MC33067
ELECTRICAL CHARACTERISTICS (VCC = 12 V [Note 2J, ROSC= 18.2 k, RVFO = 2940, COSC = 300 pF, RT = 2370 k, CT = 300 pF,
CL = 1.0 nF. For typical values TA = 25°C, lor minimax values TA is the operating ambienttemperature range that applies [Note 3J, unless
otherwise noted.)
Characteristic

Symbol

Min

Frequency (Error Amp Output High)
TA = 25°C
Total Variation (VCC = 10 to 18 V, TA = TL6w to THigh

fOSC(low)

Frequency (Error Amp Output Low)
TA = 25°C
Total Variation (VCC = 10 to 18 V, TA = how to THigh

IOSC(high)

I

Typ

Max

500
490

525

540
550

1900
1850

2050

OSCILLATOR
kHz

-

kHz

Oscillator Control Input Voltage, Pin 3 @ 25°C

-

2150
2200

Yin

-

2.5

-

VOL

-

1.2
2.0

VOH

9.5
9.0

0.8
1.5
10.3
9.7

V

ONE-SHOT
Drive Output Off-Time
TA = 25°C
Total Variation (VCC = 10 to 18 V, TA = TLow to THigh
DRIVE OUTPUTS
Output Voltage
Low State (ISink = 20 mAl
(ISink = 200 mAl
High State (ISource = 20 mAl
(ISource = 200 mAl

V

-

-

VOL(UVLO)

-

0.8

1.2

V

Output Voltage Rise Time (CL = 1.0 nF)

tr

-

20

50

ns

Output Voltage Fall Time (CL = 1.0 nF)

tf

-

15

50

ns

Output Voltage with UVLO Activated (VCC = 6.0 V, ISink = 1.0 mAl

FAULT COMPARATOR
Input Threshold
Input Bias Current (VPin 10 =

a V)

Propagation Delay to Drive Outputs (100 mV Overdrive)

Vth

0.93

liB

-

tpLH(lniOut)

1.0
-2.0

1.07
-10

60

100

V

~
ns

SOFT-START
Capacitor Charge Current (VPin 11 = 2.5 V)
Capacitor Discharge Current (VPin 11 = 2.5 V)
UNDERVOLTAGE LOCKOUT
Start-Up Threshold, VCC Increasing
Enabie/UVLO Adjust Pin Open
Enabie/UVLO Adjust Pin Connected to VCC

Vth(UVLO)

14.8
8.0

16
9.0

17.2
10

Minimum Operating Voltage After Turn-On
Enabie/UVLO Adjust Pin Open
Enabie/UVLO Adjust Pin Connected to VCC

VCC(min)

8.0
7.6

9.0
8.6

10
9.6

Enabie/UVLO Adjust Shutdown Threshold Voltage

Vth(Enable)

6.0

Enabie/UVLO Adjust Input Current (Pin 9 = 0 V)

lin(Enable)

-

V

V

7.0
-0.2

TOTAL DEVICE
Power Supply Current (Enabie/UVLO Adjust Pin Open)
Start-Up (VCC = 13.5 V)
Operating (IOSC = 500 kHz, Note 2)
NOTES: 1. Maximum package power dissipation limits must be observed.
2. Adjust VCC above the Start-Up threshold before setting to 12 V.
3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
Tlow = DoC for the MC34067
Thigh= + 70'C for MC34067
= - 40°C for the MC33067
= + 85'C for MC33067

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-280

-

V

-1.0

mA

MC34067, MC33067
Figure 1. Oscillator Timing Resistor
versus Discharge Time

Sl

500

~

en
w

COSC = 200 pF /

400

a:

~

/

300

V /

~

;::

gs

S
..J

&l

o

(;)

en

r:P

V

/

200

/ /

/

3500

/C SC=300pF V

/

a:

Figure 2. Oscillator Frequency versus
Oscillator Control Current

/

/

~ 3000 _

./

./
./

>(;)

/'

RVFO=~
RT=~

./

2500

~u.

2000

~

1500

20
40
60
80
tdischg, OSCILLATOR DISCHARGE TIME (j!s)

/'

~
(3
en

1000

o

./

60

w

ga:

0.30

~
z
o 0.25

~

~
a:
:::> 0.20
0.15

0.05

-

~

f,.---

o

~

-'

~

50

z
:q;

40

........

(!)

w

(!)

~

0

>

30
20

a.
0

9

10

Z
w

a.
0

..:.
0

.("

-10
- 20
10 k

Gain

"

........

........

(;F300 pF
10

Jcc ~ j2~1

50

Vo = 2.0V
RL = 100 k
T = 25°C

60
70

(!)

13 (;)~
w w
ffi
(!)

UJ

t§

0
-10

0

rw
100 k
1.0M
I, FREQUENCY (Hz)

iE
~
en 0

-30

l00~ ffi

-40

90

(;T- 500p

V

y.

~1

a:

lSi

120
10M

0.6
1.0
3.0
tos, ONE·SHOT PERIOD (J.1s)

.Jre-'
IJ50~

~

r

./

/

./

II'

.-.. r-... l"""f"'o..

II'

'Vr 1=5.0V

/

6.0

I'....

10

,

........

I"

VCC= 12V
RL=~

~

"-

'Vrel at TA = 25°C

/

"-

I

tt -50 r-- I- 'yrel 15.0 y

a:
'§
~

- 55

- 25

o
25
50
75
TA, AMBIENT TEMPERATURE (0G)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-281

One·Shot Period is Measured
at the Drive Outputs.

~

/
0.3

en w

y

V

V

Figure 6. Reference Output Voltage Change
versus Temperature

~
w

~ ~

Ph~

1/

3.0
0.1

3.0

9.

Margin
= 64°

II

~

BOw >-20

~ ........

/

/
/

a:

~

\

1
1 1
V
CF 200 F II'

;::
...:. 400

0.5
1.0
1.5
2.0
2.5
10SC, OSCILLATOR CONTROL CURRENT (rnA)

:s!..

30 20

VCC=12V
COSC = 500 pF
ROSC=100k
TA=25°C

a:

V

Figure 5. Open-Loop Voltage Gain and Phase
versus Frequency
ii'i'

c-

[3

/

!;;:
en

>~

2000

Figure 4. One-Shot Timing Resistor
versus Period

(!)

0.10

V

400
BOO
1200
1600
10SC, OSCILLATOR CONTROL CURRENT (rnA)

100

?; 0.35

~
o

/

/

Figure 3. Error Amp Output Saturation Voltage
versus Oscillator Control Current

~

~

.,/f' COSC = 300 pF

a:

VCC = 12V

./

iiJ

:::>

COSC = 500 pF

CF 500 pF
// V
100
TA = 25°C
//./
Oscillator Discharge Time is Measured at the Drive Outputs.
o lIP'"

o

VCC=12V
TA = 25°C
ROSC = lB.2 k

N

100

125

MC34067, MC33067
Figure 7. Reference Voltage Change
versus Source Current

i

w

....... ~

C!:J

~
~

I'"--

...........

-to

C!:J

t§

,

~-40'~

........ r-..

TA = - 20'C

\

",

~ -20

T =-125'C

~

~
a - 30

Figure 8. Drive Output Saturation Voltage
versus Load Current

r\

-2.0

I

~

.......

'---

~

3.0

5

2.0

~
a
tg

VCy=12y

0

20
40
60
80
Iref' REFERENCE SOURCE CURRENT (rnA)

<1

V6c= Ikv
80 !is Pulsed Load
120 Hz Rate

-

TA - - 40'

~

en

z
w
cr:: - 40
~
w
cr:: -50

Sour6e Salu~alion (Load 10 Ground) -

TA = 25'C

~ -3.0 -

\

w

>

;::;
~
z

(,)

~

1/
Vee

~
~ -1.0

100

>

1.0

0

TA--40'C
TA - 25'C

.6

P'"

Source Saturation
(Load to Veel

o

0.2

~

w

3.2

C!:J

t§

90%

~
z
a

~

::::J

!;;;:

2.4

./

1.6

;::

~

V

/

Ii:

-----

0.8

CC -12V
Pin 10 = Vref
TA=2r C

u.

aen

10%

o

20 ns/DIV

Figure 11. Operating Frequency
versus Supply Current

¥

/'

/'

/'

zw

~

@ 800
/"

o

30

::::J

12

6
(,)

w

m

w

I

'i/,

B.O

4.0 -

-

Enable/UVLO
Adjust Pin
10Vq:::
4.0

90

ICC, INPUT SUPPLY CURRENT (rnA)

I I
I I
I,
I

I

B.O
12
VCC, SUPPLY VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-282

Enable/UVLO
Adjust Pin
Open

I

~

en

w

I

zw

c..
n.
=>

./
~

I

16

(,)

./

400

TA =25'C

cr::
cr::

...... 1"

s:

10

20

.§.
I-

/'

(,)

2.0
4.0
6.0
8.0
Idchg, CAPACITOR DISCHARGE CURRENT (rnA)

Figure 12. Supply Current versus Supply Voltage

./

CL=I.0nF
1600 I - - TA =25'C
;:- 1200

o

24

~ce=12VI

1.0

~

en

I--

\

0.4
0.6
0.8
10, OUTPUT LOAD CURRENT (A)

Figure 10. Soft-Start Saturation Voltage
versus Capacitor Discharge Current

Figure 9. Drive Output Waveform

2000

Gnd - I - -

16

20

MC34067, MC33067
Figure 13. MC34067 Representative Block Diagram

r--T----------------------------,

~

I

15 1

~~I
UVLO Adjust

I

I
I
I

°g-+I---1>-J\,f\I'v--,--t---*----1+--->--<>-----l
I

ROSC

Error Amp Output ~
Noninverting Input
Inverting Input 7
Soft·Start

~
1 - - - - * - + - - - - - - - - - - j r Q Vrel
1 5

~==~

I
I
I
I
1I
I

OSC Charge

I
I
I
I

~~

D

I
I
I

I

Ql

1-----+0 Fault Input
I 10

I

I
I
I
I

I
I Error Amp

~ L-----------=----J~~-------------J
11

Timing Diagram

-I -T--

-~---------~I-

I

I
One·Shot
1

O~A
OutputB

U
I
I
I

I
I
I

I
I

I
I

I
1

Ii
I

1

1

1

I

1

-~

1

I

-+-

1

1

=T=========~=~1S!==
INNf".1

I
1

I
1

I

LJ1illl

~+I----~~I
I
1
1
1
1

I tos

I

-+---- ---- -+-

I

tos:

1
1

1
1

1
1
1
1

1
I

I
1
1
1

I
1
1
I

1

1

litosl

1
1

1

1
I

1
1
1
1

tos!

Error Amp output high, minimum lose current

Error Amp output low, maximum lose current

occurring at minimum input voltage. maximum load.

occurring at maximum input voltage, minimum load.

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA

3-283

MC34067, MC33067
OPERATING DESCRIPTION
Introduction
As power supply designers have strived to increase power
conversion efficiency and reduce passive component size,
high frequency resonant mode power converters have
emerged as attractive alternatives to conventional pulsewidth modulated control. When compared to pulse-width
modulated converters, resonant mode control offers several
benefits including lower switching losses, higher efficiency,
lower EMI emission, and smaller size. A new integrated circuit has been developed to support this trend in power supply
design. The MC34067 Resonant Mode Controller is a high
performance bipolar IC dedicated to variable frequency power control at frequencies exceeding 1.0 MHz. This integrated
circuit provides the features and performance specifically for
zero voltage switching resonant mode power supply applications.
The primary purpose of the control chip is to provide a
fixed off-time to the gates of external power MOSFETs at
a repetition rate regulated by a feedback control loop. Additional features of the IC ensure that system start-up and fault
conditions are administered in a safe, controlled manner.
A simplified block diagram of the IC is shown on the front
page, which identifies the main functional blocks and the
block-to-block interconnects. Figure 13 is a detailed functional diagram which accurately represents the internal circuitry.
The various functions can be divided into two sections. The
first section includes the primary control path which produces
precise output pulses at the desired frequency. Included in
this section are a variable frequency Oscillator, a One-Shot,
a pulse Steering Flip-Flop, a pair of power MOSFET Drivers,
and a wide bandwidth Error Amplifier. The second section
provides several peripheral support functions including a
voltage reference, undervoltage lockout, Soft-Start circuit,
and a fault detector.
Primary Control Path
The output pulse width and repetition rate are regulated
through the interaction of the variable frequency Oscillator,
One-Shot timer and Error Amplifier. The Oscillator triggers
the One-Shot which generates a pulse that is alternately
steered to a pair of totem pole output drivers by a toggle
Flip-Flop. The Error Amplifier monitors the output of the
regulator and modulates the frequency of the Oscillator.
High speed Schottky logic is used throughout the primary
control channel to minimize delays and enhance high frequency characteristics.
Oscillator
The characteristics of the variable frequency Oscillator are
crucial for precise controller performance at high operating
frequencies. In addition to triggering the One-Shot timer and

initiating the output deadtime, the oscillator also determines
the initial voltage for the one-shot capacitor. The Oscillator
is designed to operate at frequencies exceeding 1.0 MHz.
The Error Amplifier can control the oscillator frequency over
a 1000:1 frequency range, and both the minimum and maximum frequencies are easily and accurately programmed by
the proper selection of external components.
The functional diagram of the Oscillator and One-Shot timer is shown in Figure 14. The oscillator capacitor (COSC) is
initially charged by transistor Ql. When COSC exceeds the
4.9 V upper threshold of the oscillator comparator, the base
of Ql is pulled low allowing COSC to discharge through the
external resistor, (ROSC), and the oscillator control current,
(lOSC). When the voltage on COSC falls below the comparator's 3.6 V lower threshold, Ql turns on and again charges
COSC·
COSC charges from 3.6 V to 5.1 V in less than 50 ns. The
high slew rate of COSC and the propagation delay of the comparator make it difficult to control the peak voltage. This accuracy issue is overcome by clamping the base of Ql through
a diode to a voltage reference. The peak voltage of the oscillator waveform is thereby precisely set at 5.1 V.

Figure 14. Oscillator and One-Shot Timer

The frequency of the Oscillator is modulated by varying
the currentflowing out of the Oscillator Control Current (IOSC)
pin. The IOSC pin is the output of a voltage regulator. The
input of the voltage regulator is tied to the variable frequency
oscillator. The discharge current of the Oscillator increases
by increasing the current out of the IOSC pin. Resistor RVFO
is used in conjunction with the Error Amp output to change
the IOSC current. Maximum frequency occurs when the Error
Amplifier output is at its low state with a saturation voltage
of 0.1 Vat 1.0 mAo

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-284

MC34067, MC33067
The minimum oscillator frequency will result when the
10SC current is zero, and COSC is discharged through the
external resistor (ROSC). This occurs when the Error Amplifier output is at its high state of 2.5 V. The minimum and maximum oscillator frequencies are programmed by the proper
selection of resistor ROSC and RVFO. The minimum frequency is programmed by ROSC using Equation 1:

-1__ tPD
i(min)

t(max)-70 ns

ROSC =

=

(1)

cosc en (5.1 )
0.348 cosc
3.6
where tPD is the internal propagation delay.
The maximum oscillator frequency is set by the current
through resistor RVFO. The current required to discharge
COSC at the' maximum oscillator frequency can be calculated
by Equation 2:
I (max)

= C OSC

5.1 - 3.6

1 5C

=.

t

OSCJ(max)

(2)

i(max)
The discharge current through ROSC must also be known
and can be calculated by Equation 3:

5.1-3.6

I;

(-

R~~SJ

Errors in the threshold voltage and propagation delays
through the output drivers will affect the One-Shot period.
To guarantee accuracy, the output pulse of the control chip
is trimmed to within 5% of 250 ns with nominal values of
RT and CT·
The outputs of the Oscillator and One-Shot comparators
are OR'd together to produce the pulse tos, which drives
the Flip-Flop and output drivers. The output pulse (tOS) is
initiated by the Oscillator and terminated by the One-Shot
comparator. With zero-voltage resonant mode converters,
the oscillator discharge time should never be set less than
the one-shot period.
Error Amplifier
A fully accessible high performance Error Amplifier is provided for feedback control of the power supply system. The
Error Amplifier is internally compensated and features DC
open loop gain greater than 70 dB, input offset voltage of
less than 10 mV and a guaranteed minimum gain-bandwidth
product of 2.5 MHz. The input common mode range extends
from 1.5 V to 5.1 V, which includes the reference voltage.
Figure 15. Error Amplifier and Clamp

Oscillator
Control Current

(3)
ROSC

(
- J(min)

1.5
=--1;

R~SCCosc

)
10SC.

ROSC

3
RVFO
6

8
Noninverting Input 0-+---1

Resistor RVFO can now be calculated by Equation 4:
2.5- VEAsat
RVFO =

(4)

Inverting Input 7
Error
Amp

I(max) - IROSC
One-Shot Timer
The One-Shot is designed to disable both outputs
simultaneously providing a dead time before either output
is enabled. The One-Shot capacitor (CT) is charged
concurrently with the oscillator capacitor by transistor 01,
as shown in Figure 14. The one-shot period begins when
the oscillator comparator turns off 01, allowing CT to
discharge. The period ends when resistor RT discharges CT
to the threshold of the One-Shot comparator. The lower
threshold of the One-Shot is 3.6 V. By choosing CT, RT can
by solved by Equation 5:

RT

=

tos
CT en

Error Amp
Charge

Error Amp Output

tos

(§J.)
3.6

= ----'''-''-0.348 CT

(5)

When the Error Amplifier output is coupled to the 10SC
pin by RVFO, as illustrated in Figure 15, it provides the Oscillator Control Current, 10SC. The output swing of the Error
Amplifier is restricted by a clamp circuit to improve its transient recovery time.
Output Section
The pulse(tos), generated by the Oscillator and One-Shot
timer is gated to dual totem-pole output drives by the Steering
Flip-Flop shown in Figure 16. Positive transitions of tos
toggle the Flip-Flop, which causes the pulses to alternate
between Output A and Output B. The flip-flop is reset by the
undervoltage lockout circuit during start-up to guarantee that
the first pulse appears at Output A.

MOTOROLA qNEAR/INTERFACE ICs DEVICE DATA

3-285

MC34067, MC33067
Figure 16. Steering Flip-Flop and Output Drivers
VOE

''''~-I-l"l

Power Ground

13

The totem-pole output drivers are ideally suited for driving
power MOSFETs and are capable of sourcing and sinking
1.5 A. Rise and fall times are typically 20 ns when driving
a 1.0 nF load. High source/sink capability in a totem-pole
driver normally increases the risk of high cross conduction
current during output transitions. The MC34067 utilizes a
unique design that virtually eliminates cross conduction, thus
controlling the chip power dissipation at high frequencies.
A separate power ground pin is provided to isolate the sensitive analog circuitry from large transient currents.

PERIPHERAL SUPPORT FUNCTIONS
The MC34067 Resonant Controller provides a number of
support and protection functions including a precision voltage

reference, undervoltage lockout comparators, soft-start circuitry, and a fault detector. These peripheral circuits ensure
that the power supply can be turned on and off in a controlled
manner and that the system will be quickly disabled when
a fault condition occurs.
Undervoltage Lockout and Voltage Reference
Separate undervoltage lockout comparators sense the input VCC voltage and the regulated reference voltage as illustrated in Figure 17. When VCC increases tothe upper threshold voltage, the VCC UVLO comparator enables the
Reference Regulator. After the Vref output of the Reference
Regulator rises to 4.2 V, the Vref UVLO comparator switches
the UVLO signal to a logic zero state enabling the primary
control path. Reducing VCC to the lower threshold voltage
causes the VCC UVLO comparator to disable the Reference
Regulator. The Vref UVLO comparator then switches the
UVLO output to a logic one state disabling the controller.
The Enable/UVLO Adjust pin allows the power supply designer to select the VCC UVLO threshold voltages. When this
pin is open, the comparator switches the controller on at 16 V
and off at 9.0 V. If this pin is connected to the VCC terminal,
the upper and lower thresholds are reduced to 9.0 V and
8.6 V, respectively. Forcing the Enable/UVLO Adjust pin low
will pull the VCC UVLO comparator input low (through an
internal diode) turning off the controller.
The Reference Regulator provides a precise 5.1 V
reference to internal circuitry and can deliver up to 10
rnA to external loads. The reference is trimmed to better than 2% initial accuracy and includes active short
circuit protection.

Figure 17. Undervoltage Lockout and Reference

1------------------------------1
+
1

Vee
15

1
1
1
1
1
1

50k
Enable I
UVLO Adjust 0g>--l--t-"Mr-t"--t----4--i

f-~+---+_----t_OVref

5
VrefUVLO

WLO

l

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-286

4.214.0V

MC34067, MC33067
Fault Detector
The high speed Fault Comparator and Latch illustrated
in Figure 18 can protect a power supply from destruction
under fault conditions. The Fault Input pin connects to the
input of the Fault Comparator. If this input exceeds the 1.0
V threshold of the comparator, the Fault Latch is set and
two logic signals simultaneously disable the primary control
path.
Figure 18. Fault Detector and Soft-Start
UVLO
Fault

The signal labeled "Fault" at the output of the Fault Comparator is connected directly to the output drivers. This direct path

reduces the propagation delay from the Fault Input to the
A and B outputs to typically 70 ns. The Fault Latch output
is OR'd with the UVLO output from the Vref UVLO comparator
to produce the logic output labeled "UVLO+Fault". This signal
disables the Oscillator and One-Shot byforcing both the COSC
and CT capacitors to be continually charged.
The Fault Latch is reset during start-up by a logic "1" at
the UVLO output of the Vref UVLO comparator. The latch
can also be reset after start-up by pulling the Enable!
UVLO Adjust pin momentarily low to disable the Reference
Regulator.
Soft-Start Circuit
The Soft-Start circuit shown in Figure 18 forces the variable frequency Oscillator to start at the maximum frequency
and ramp downward until regulated by the feedback control
loop. The external capacitor atthe CSoft-Start terminal is initially discharged by the UVLO+Fault signal. The low voltage
on the capacitor passes through the Soft-Start Buffer to hold
the Error Amplifier output low. After UVLO+Fault switches
to a logic zero, the soft-start capacitor is charged by a
9.0 J.lA current source. The buffer allows the Error Amplifier
output to follow the soft-start capacitor until it is regulated
by the Error Amplifier inputs. The soft-start function is generally applicable to controllers operating below resonance and
can be disabled by simply opening the CSoft-Start terminal.

APPLICATIONS INFORMATION
The MC34067 is specifically designed for zero voltage
switching (ZVS) quasi-resonant converter (aRC)
applications. The IC is optimized for double-ended push-pull
or bridge type converters operating in continuous conduction
mode. Operation of this type of ZVS with resonant properties
is similar to standard push-pull or bridge circuits in that the
energy is transferred during the transistor on-time. The
difference is that a series resonant tank is usually introduced
to shape the voltage across the power transistor prior to
turn-on. The resonant tank in this topology is not used to
deliver energy to the output as is the case with zero current
switch topologies. When the power transistor is enabled the
voltage across it should already be zero, yielding minimal
switching loss. Figure 19 shows a timing diagram for a
half-bridge ZVS aRC. An application circuit is shown in
Figure 20. The circuit built is a DC to DC half-bridge
converter delivering 75 W to the output from a 48 V source.
When building a zero voltage switch (ZVS) circuit, the
objective is to waveshape the power transistor's voltage
waveform so that the voltage across the transistor is zero
when the device is turned on. The purpose of the control
IC is to allow a resonant tank to waveshape the voltage
across the power transistor while still maintaining

regulation. This is accomplished by maintaining a fixed
dead time and by varying the frequency; thus the effective
duty cycle is changed.
Primary side resonance can be used with ZVS circuits.
In the application circuit, the elements that make the resonant tank are the primary leakage inductance of the transformer (LLJ and the average output capacitance (COSS) of
a power MOSFET (CR). The desired resonant frequency for
the application circuit is calculated by Equation 6:

1
fr =

In the application circuit, the operating voltage is low and
the value of COSS versus Drain Voltage is known. Because
the COSS of a MOSFET changes with drain voltage, the value
of the CR is approximated as the average COSS of the MOSFET. For the application circuit the average COSS can be calculated by Equation 7:
CR =

{2* COSS measured at

-t

Vin

(7)

The MOSFET chosen fixes CR and that LL is adjusted
to achieve the desired resonant frequency.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-287

(6)

21t-J LL2CR

MC34067, MC33067
However, the desired resonant frequency is less critical
than the leakage inductance. Figure 19 shows the primary
current ramping toward its peak value during the resonant
transition. During this time, there is circulating current
, flowing through the secondary inductance, which effectively
makes the primary inductance appear shorted. Therefore,
the current through the primary will ramp to its peak value
at a rate controlled by the leakage inductance and the applied
voltage. Energy is not transferred to the secondary during
this stage, because the primary current has not overcome
the circulating current in the secondary. The larger the

leakage inductance, the longer it takes for the primary current
to slew. The practical effect of this is to lower the duty cycle,
thus reducing the operating range.
The maximum duty cycle is controlled by the leakage
inductance, not by the MC34067. The One-Shot in the
MC34067 only assures that the power switch is turned on
under a zero voltage condition. Adjust the one-shot period
so that the output switch is activated while the primary
current is slewing but before the current changes polarity.
The resonant stage should then be designed to be as long
as the time for the primary current to go to zero amps.

Figure 19_ Application Timing Diagram

Cose
One-Shot

Output A

OutputB

I
I
II
I
I

1-

II I
III
II I
III

I
I
II
II
II

ii

III
t-;----11 I
I I
I I

Output Diode
Voltage

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-288

Figure 20_ Application Circuit
Vce

17------------------------:

,.~
MTP33~J f

1
1

-=-

1

500pl

51,O.5W
/V"v--,

T1,'

~.

VFa

+

:.:

s::

T2

It--l-=-

@
:JJ

o

s;:

lN5819x4

3:

r

o

Z

m

(,.)

»

3.9k

~

Z

C.:>

-i

1


Z
~

F

.....

!;

....

......

r...

W

c..

10

2. nF

1.0 nF \ 500 pF

200 pF I\100p,1

20
50
100
200
IOSC. OSCILLATOR FREQUENCY (kHZ)

"""

500

~
w

~

1.0
5.0

C>

..............
4.0

fE

~
w

C!:>

o

Ph

~ -8.0

~

100

.x;

125

-20
1.0 k

10k

lOOk
loOM
I. FREQUENCY (Hz)

Figure 6. Error Amp Large-Signal
Transient Response

1.05 V

1.5V

;:::
Cl

>:
E

1.0V

0

""
0.95 V

0.5V

1.0 ~s/DIV

0.5~s/DIV

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-294

w
135~

-9"

l'i~

Figure 5. Error Amp Small-Signal
Transient Response

1.0V

'"'"

'\l\

..J

..........

C!:>

90 ~
:c
c..

r-::: r--r-

o

.......

~

45 ~
w

w
c..

0
25
50
75
TA. AMBIENT TEMPERATURE ('C)

500

e.
w

I'e

Z

I'-....

'"o

~

g

I'........

-4.0

-25

40

>
c.. 20
o

...........

VCC = 10V
Vo = 1.25 V
RL==
TA = 25'C

........

!:§

(3

20
50
100
200
IOSC. OSCILLATOR FREQUENCY (kHZ)

60

z

...........

0

0::

o

-55

m

:s.

..........

:::>

ow

10

VCC=10V

TA =25'C
I .( I I

Figure 4. Error Amp Open-Loop Gain and
Phase versus Frequency

I
VCC=10V
Rr= 25.5 k
CT= 390 pF

~ B.O

V

.....
V

2.0

Figure 3. Oscillator Frequency Change
versus Temperature

C!:>

~

./

./

0::

b

10 k
5.0

..J

./

./

~ 5.0

50 k

Cr= 5.0 nF \

~

100pF

/

20

!3o

20 k

ifi

t 200 pF

/

f-

,.:.

0::

Cl

r...

......

2.0 nF~ i=1.0nr500P

::;; 50 CT-5.0n.F1
;::;:

180
10M

MC34129, MC33129
Figure 7. Error Amp Open-Loop DC Gain
versus Load Resistance
1D

2: 1.0

90

:E.

:;;:
C!l

w

80

!:30

/

>

a.
0

70

o.

~
~ 0.8
>
~
::>

!;;:




200

400

/1

0

o

500

ISink, OUTPUT SINK CURRENT (llA)

Figure 11.1.25 V Reference Output Voltage
Change versus Source Current

w

0

~

!:3

"\..

\

-12

-16

Iba:

-20

~
Q;

->
<]

........

-.....

~

\
\

!:;

o

1\.,
\

2.0
4.0
6.0
8.0
Iref, REFERENCE OUTPUT SOURCE CURRENT (mA)

TA=-40°C-i

~ -16
:z
w
a:
~ -20
~

\

Q;

10

->
<]

VCC~10V
~

\

\

\

r- 25~c\-- 85°c-\ \

, ,
\

-24

0

0.4
0.8
1.2
1.6
Iref, REFERENCE OUTPUT SOURCE CURRENT (mA)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-295

'\.

i"'o..
1\

\

\

5 -12

\
0

\

~ -8.0

..

-24

1"1-

!:3

::--.. +25°C
+ 5°C' ~

T =-40°C\

o

w

....;;:

16

8.0
12
VCC, SUPPLY VOLTAGE M

-r-.;::: r--

C!l

~ =::::"...

~ -8.0

0

w -4.0

...........

C!l

~

~
'-'

VCC=10V

~

w -4.0

C!l

I

4.0

Figure 12. 2.5 V Reference Output Voltage
Change versus Source Current

:[

w

~

I.

Vn~I.25V, RL =00

I,

w

'-'

100

8.0

Vref 2.5 V, RL = 2.5 k

~

0.2

!--

.t

TA = 25°C

w

!:;

/

2.0
4.0
6.0
ISink, OUTPUT SINK CURRENT (rnA)

C!l

~ 0.4

o

o

2: 3.2

I

::>

~

.... ~

-- -

.,./

I

Figure 10. Reference Output Voltage versus
Supply Voltage

VCC=10V
Pins810 9
Pins 2, 5, 7,10,1210 Gnd
TA = 25°C

C!l

!:3

I

.1.

..,....

5

Figure 9. SoH-Start Buffer Output Saturation
versus Sink Current

w

I

~ 0.6

I

9

:Z
w
a.

V

I
I
VCC=10V
Pins8109,61010
Pins 2, 5, 7 10 Gnd
TA = 25°C

w

v

:z
C!l

Figure 8. Error Amp Output Saturation
versus Sink Current

2.0

MC34129, MC33129
Figure 13. 1.25 V Reference Output Voltage
versus Temperature

~

w

t!)

'Vref' 1.225 V

~
w

~

~

-4.0

6~

-6.0

/

/

li

r-...

/

/
/

/

ifi -8.0
a:
If
>

-

.........

~

:l!

/

./

-2.0

VCC,IOV
RL'~

/

-55

-25



o
V IV

~ -1.0

!:i

(Load to Ground)

=>

~ 3.0

!5

5
a

Sink Saturation
(Load to VCC)

2.0
1.0

o

~

-~

o

-55

0
25
50
75
TA, AMBIENT TEMPERATURE (0C)

10

.........

BOO

1.0iJ.SIDIV

Figure 17. Supply Current versus Supply Voltage
10

.~

I

RT,25.5 k
Cp390pF
.§. B.O TA,25°C

-IS

Drive
Gnd
Sync/Inhibit Input

I

Ramp Input

32k

RS

_ _ _ ...J

L

~

Sink Only

~ = Positive True Logic

Figure 19. Timing Diagram
600 j.lS Delay

Synctlnhibft Input

+
_____nJLfUL

Capacitor Cr

~

latch
'Set'lnput

UL
l~

Latch
'Reset" Input

J-'------JIL...--L~L...----'L-------'Lt_____~

Drive Output

r---rL

Start/Run

20 V -

Output

14.3 V _

-------------------...,

J

'--------------------------1:.
MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-299

MC34129, MC33129
Fault TImer

Drive Output and Drive Ground

This unique circuit prevents sustained operating in a lockout
condition. This can occur with conventional switching control
ICs when operating from a power source with a high series
impedance. If the power required by the load is greater than
that available from the source, the input voltage will collapse,
causing the lockout condition. The Fault Timer provides
automatic recovery when this condition is detected. Under
normal operating conditions, the output of the PWM
Comparator will reset the Latch and discharge the internal
Fault Timer capacitor on a cycle-by-cycle basis. Under
operating conditions where the required power into the load is
greater than that available from the source (Vin), the Ramp
Input voltage (plus offset) will not reach the comparator
threshold level (Pin 11), and the output of the PWM
Comparator will remain low. If this condition persists for more
thatSOO J1S, the Fault Timer will active, discharging CSolI-Start
and initiating a soli-start cycle. The power supply will operate
in a skip cycle or hiccup mode until either the load power or
source impedance is reduced. The minimum fault timeout is
200 jis, which limits the useful switching frequency to a
minimum of 5.0 kHz.

The MC34129 contains a single totem-pole output stage
that was specifically designed for direct drive of power
MOSFETs. It is capable of up to ±1.0 A peak drive current and
has a typical fall time of 30 ns with a 500 pF load. The
totem-pole stage consists of an NPN transistor for turn-on
drive and a high speed SCR for turn-off. The SCR design
requires less average supply current (ICC) when compared to
conventional switching control ICs that use an all NPN
totem-pole. The SCR accomplishes this during turn-off of the
MOSFET, by utilizing the gate charge as regenerative on-bias,
whereas the conventional all transistor design requires
continuous base current. Conversion efficiency in low power
applications is greatly enhanced with this reduction of ICC. The
SCR's low-state holding current (lH) is typically 225 jiA. An
internal 225 kll pull-down resistor is included to shunt the
Drive Output off-state leakage to ground when the
Undervoltage Lockout is active. A separate Drive Ground is
provided to reduce the effects of switching transient noise
imposed on the Ramp Input. This feature becomes particularly
useful when the Ipk(max) clamp level is reduced. Figure 24
shows the proper implementation of the MC34129 with a
current sensing power MOSFET.

Start/Run Comparator
A bootstrap start-up circuit is included to improve system
efficiency when operating from a high input voltage. The
output of the Start/Run Comparator controls the state of an
external transistor. A typical application is shown in Figure 21.
While CSolI-Start is charging, start-up bias is supplied to Vce
(Pin 14) from Vin through transistor 02. When
CSolI-Start reaches the 1.95 V clamp level, the Start-Run
output switches low (VCC = 50 mV), turning off 02. Operating
bias is now derived from the auxiliary bootstrap winding of the
transformer, and all drive power is efficiently converted down
from Vin. The start time must be long enough for the power
supply output to reach regulation. This will ensure that there is
sufficient bias voltage at the auxiliary bootstrap winding for
sustained operation.
tStart =

1.95 V CSolI-Start
.
1.0 jiA
= 1.95 CSolI-Start In jiF

The Start/Run Comparator has 350 mV of hysteresis. The
output off-state is clamped to VCC + 7.S V by the internal zener
and PNP transistor base-emitter junction.

Undervoltage Lockout
The Undervoltage Lockout comparator holds the Drive
Output and CSolI-Start pins in the low state when VCC is less
than 3.S V. This ensures that the MC34129 is fully functional
before the output stage is enabled and a soli-start cycle
begins. A built-in hysteresis of 350 mV prevents erratic output
behavior as VCC crosses the comparator threshold voltage. A
14.3 V zener is connected as a shunt regulator from VCC to
ground. Its purpose is to protect the MOSFET gate from
excessive drove voltage during system start-up. An external
9.1 V zener is required when driving low threshold MOSFETs.
Refer to Figure 21. The minimum operating voltage range of
the IC is 4.2 V to 12 V.
References
The 1.25 V bandgap reference is trimmed to ±2.0%
tolerance at TA = 25°C. It is intended to be used in conjunction
with the Error Amp. The 2.50 V reference is derived from the
1.25 V reference by an internal op amp with a fixed gain of 2.0.
It has an outpullolerance of±5.0% at TA = 25°C and its primary
purpose is to supply charging current to the oscillator
timing capacitor.
For further information, please refer to AN976.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-300

MC34129, MC33129
Figure 20. External Duty Cycle Clamp
and Multi Unit Synchronization

Figure 21. Bootstrap Start-Up

r- -- - --- -- - - - - -

~
i 1

5.0V

5

1

'13

..

1

-

asc

To Addi!ional
MC34129's
1

_

1

L _ _ .:... _ _ _ _ _ _ _ _ _ _ _ ..J
The extemal9.1 V zener is required when dtMng low threshold MOSFETs.

Figure 22. Discrete Step Reduction of Clamp Level

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _1

Figure 23. Adjustable Reduction of Clamp Level

AS

---------------~

-1201lA

1.25

Ipk(max( =

(~

1.675 - (VFID1J +VFID211

AS

It

1.25 V
R1 +R2

>1.0mA

-0.275

Then: Ipk(maxl- ---cA,.--S---

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-301

+1)

MC34129, MC33129
Figure 24. Current Sensing Power MOSFET

Figure 25. Current Waveform Spike Suppression

AS . I,. . 'DS(onl
'DM(on)HS
It SENSEFET =MTP1ON10M
AS =200

lJ1L)!!

Then: VAS' O.075lp1<

______ .J

~
13 _______ J /'t

Power Ground:
Tolnpul Source

A

C

,~
AS

.../'L

Return

The addition of the RC filler wi. eHminate instabMity caused by the
leading edge spike on the aJRent waveform.

ConIroICireuliryGround:
To Pin 7

VirIuaIlylosslesscurrentsensing can beadlieved wilhih.lnplementalion 010
SENSEFET power __

Figure 27. Bipolar Transistor Drive

Figure 26. MOSFET Parasitic Oscillations

+Rz=:'a

o
-

I

I
I

Base Charge
Aemoval

11

_______ .JI

AS

I

_______ .J
SerIosga1oresistorRaWindampanyhighlrequencyparaslllcoscilalionsc:ausedbyihe
MOSFETinpuicapdanceendany seriosWiring indUCianCO lnihegolMOurtO_iI.

The ID1em·poIo ouIpui can lurrish negative bose cuOen\ Ie, enhanced
IransiSlOrllln-oII,wilhlheadlllionolcapacilorC1.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-302

AS

MC34129, MC33129
Figure 28. Non-Isolated 725 mW Flyback Regulator

r------------------------,-

r-_-.--'-:-O Yin =lOV 10 ~V

/13

1

1
1

121

...-....+ 0 5V/125mA
0.1

~_+OGnd

'-1+-........0

24k

470pF

T

-5V/20mA

T1: Coilcraft 'G6807-A

JL 0--=-0+------.
128kHz
Sync

1
1 _ _ _ _=
L
____________________ 1

J

Test

Conditions

10

Prim"" = 90T '28 AWG
Second"" ±5V = 26T '30 AW
Gap = 0.05 n, for lp of 600 ~H
Core = Ferroxcube 813E187-3C8

Bobbin =Ferroxcube E187PCB1-8

Results

Line Regulation 5 V

Vin = 20 V to 40 V, lout 5 V = 125 rnA, lout -5 V = 20 rnA

.1.= 1.0 rnV

Load Regulation 5 V

Vin = 30 V, lout 5 V = 0 rnA to 150 rnA, lout -5 V = 20 rnA

.1.= 2.0 rnV

Output Ripple 5 V

Vin = 30 V, iout 5 V = 125 rnA, lout-5 V = 20 rnA

150 rnVp-p

Efficiency

Vin = 30 V, lout 5 V = 125 rnA, iout-5 V = 20 rnA

77%

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-303

MC34129, MC33129
Figure 29. Isolated 2.0 W Flyback Regulator
Tl: Primary '" 35T #32 AWG

Feedback =12T #32 AWG
Secondary ±5 V =7T #32 AWG
Gap" 0.004", for L.p of 180 J-lH
Core =Ferroxcube 813E187·3CB
Bobbin:= Ferroxcube E187PCBl-8

0.1
Gnd

24k
128kHz

Sync

IL

0.(12.7k
,-

6
--

IL

__

1

2

___

_
~

_______________ J

2-"D5

MOCS007

Test
Line Regulation 5 V
Load Regulation 5 V
Output Ripple 5 V
Efficiency

Conditions
Yin
Yin
Yin
Yin

= 20 V to 40 V, lout 5 V = 380 rnA, lout -5 V = 20 rnA
= 30 V, lout 5 V = 100 rnA to 380 rnA, lout-5 V = 20 rnA
- 30 V, lout 5 V - 380 rnA, lout -5 V - 20 rnA
= 30 V, lout 5 V = 380 rnA, lout -5 V = 20 rnA

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-304

Results
1 rnV

~=

~=15rnV

150 rnVp-p
73%

MC34129, MC33129
Figure 30. Isolated 3.0 W Flyback Regulator with Secondary Side Sensing

5I6OmA

100
0.1

Retum

41

~

11: PrimaJ'f=22TI18AWG
Second"'Y =22T '18 AWG

0+---'"
1L

___

~

Test

_______________

J1

Conditions

Line Regulation

Vin = 8 V to 12 V, lout 600 rnA

ljJ=50~H

Core = FellOl

~ 0.8

-

~
w

1/

S
cc
cc

Figure 4. Logic Input Threshold Voltage
versus Temperature

o

-

I-\. ........

o

2.0

V

~

V
10

~

w

;::

2S

40

5
~

-

~

a.

0

200

r-....

0

-

-

V

I
J

/'

cc0

\
\

cc
a. 120
f=>
a.
f-

=>
0

80

;::
40

5

Vth{lower)-

~

S-

-1.6
-1.2
-0.8
-0.4
0
Vin, INPUT OVERDRIVE VOLTAGE BELOW LOWER THRESHOLD M

1E

\

I'

w

2S

0

-

...........

100

125

--

_ VCC=12V
CL = 1.0nF
TA = 25'C

Vth(upper)
0
1.0
2.0
3.0
4.0
Yin, INPUT OVERDRIVE VOLTAGE ABOVE UPPER THRESHOLD M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-308

...... r-...

..........

0
25
50
75
TA, AMBIENT TEMPERATURE ('C)

Overdrive Voltage is with Respect
to the Logic Input Lower Threshold

z

120
80

f'...

Figure 6. Drive Output High-to-Low Propagation
Delay versus Logic Input Overdrive Voltage

I:>,
~

-25

~ 160
(!l

~

o

~

............

Cl

to the Logic Input Lower Threshold

cc
g:

'"'" ........

...........

Lower Threshold
High State Output
1
1

1.0
-55

12

(!l

o

Upper Threshold _
Low State Output

>

4.0
6.0
8.0
Vin, INPUT VOLTAGE M

t- VCC=12~_ Overdrive Voltage is with Respect

CL = 1.0 nF
~ 160 I- TA = 25'C

r-....
......
r---...

cc

200

z
o

............

:c
:: 1.4
=>
a.
Z
-- 1.2
:;

"' Figure 5. Drive Output Low-to-High Propagation
-;:
Delay versus Logic Overdrive Voltage
Cl

............
............

[!jl.6

....... i""

0.4

2.0

>
9 18.
o

V

I
VCC=12V-

............

MC34151, MC33151
Figure 8. Drive Output Clamp Voltage
versus Clamp Current

Figure 7. Propagation Delay
~ 3.0

13

90%

2.0

.,.

~

a.

::!E

:su

1.0

~

I-

OJ

c.
E

10%

"'"

0

50ns/DIV

Figure 9. Drive Output Saturation Voltage
versus Load Current
~

0

-

~ -1.0

'-'
o

>
-2.0
z

'-

r-

o

~ -3.0

OJ

~ 3.0
~
a.
~
o

2.0
1.0

1ii

>

o

~

Gn~.1

o

0.2

....

-;-

- -

I-

-

Sink Saturation
~_nd~
(Load to VCC)

0.4

0.6
0.8
1.0
10. OUTPUT LOAD CURRENT (A)

+

1.2

I
o

0.2

I

0.4
0.6
0.8
1.0
to. OUTPUT LOAD CURRENT (A)

1.2

1.4

•

0

I_VCC=12V~~
-0.5 :.- Source Saturation
__
r-Isourqe = 10 mA
-0.7 _ (Load tOI Ground) VCC=~ -0.9
Isourge = 400 mA
~ -1.1

l\l
13

120 Hz Rale
TA=25'C

-,.....

Low State Clamp
(Drive Output Driven Below Ground)

Figure 10. Drive Output Saturation Voltage
versus Temperature

Saluration VCC = 12 V
VC~J. Source
(Load 10 Ground) 80 Ils Pulsed Load

w

I J.I 1

I

>

-1.0

I I I I
I I I I

~

~

I I I

VCC= 12V
80llS Pulsed Load
120 Hz Rate
TA = 25'C

VCrl

0

1=
OJ

-

~

High Stale Clamp
(Drive OUlput Driven Above v~ i""'"

w

(!l

1.4

~
a:
OJ 1.9
!;;:
en 1.7

5
o

1.5
1.0
0.8

}

0.6

~

o

~

Isink = 400 mA

Isin~ = 10 rnA

_ Sink Saturation
(Load to Vccl
-25

Gnd,

t

0
25
50
75
TA. AMBIENT TEMPERATURE ('C)

Figure 12. Drive Output Fall Time

90%

90%

10%

10%

10ns/DIV

10ns/DIV

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-309

~~

I

~

-55

Figure 11. Drive Output Rise Time

I

~~

100

125

MC34151, MC33151
Figure 13. Drive Output Rise and Fall Time
versus Load Capacitance

.,.s 80

I

,I

Figure 14. Supply Current versus Drive Output
Load Capacitance
80

I

I-VCC=12V
:::;;
VIN = OVto5.0V
F 60 f- TA = 25°C
w

::l

w
a:

~

IZ

~

if
en

1
:::>
(.')

.V V'

.:.. 20

i

o

--.-

I::

-

0.1

~

:::>
~

~

(.')

BO

w

a:
a:
:::>
(.') 40
~

0..
0..

:::>

en
- 20

8

o
10k

-

k

~.

/

/

"

..::;-

/

.;'

~

.

........ V

z

l'

f=~ ~I-'

Lo I, I
1 V
1
glc nputs at CC
Low State Drive OutpuV

6.0

w

a:
a:

V

:::>
(.')

~ 4.0

0..
0..

'/4

.z::J

:::>

en

~

1/

1/

TA = 25°C
.§.

c:;

2,0

#

!:?

----

100
f, INPUT FREQUENCY (Hz)

L

t

10

Figure 16. Supply Current versus Supply Voltage

I-

II ;

11;'= 00 kHz

1.0
Cl,. OUTPUT LOAD CAPACITANCE (nF)

<-

I
211

/

V

B.O

1/

/
1/

I

I0.1

Figure 15. Supply Current versus Input Frequency

160
!2:

20

o

10

/

f= 0 HzL

!:?

1.0
Cl,. OUTPUT LOAD CAPACITANCE (nF)

Both Logic Inputs Driven
OVto5.0V,
50% Duty Cycle
Both Drive Outputs Loaded
TA = 25°C
1-VCC= 18 V, CL=2.5 nF
2-VCC = 12V, CL = 2.5 nF
3-VCC= lBV, CL = 1.0 nF
4- VCC = 12 V, CL = 1.0 nF

40

0..
0..

~

tf'~

o

60

W

a:
a:

~

40

VCC = 12V
Both Logic Inputs Driven
OVto5.0V
50% Duty Cycle
Both Drive Outputs Loaded
TA = 25°C

VA

......:. ~

V

....... V'

V

----

Logic Inputs Grounded
High State Drive Outputs

V
o -d.
o

1.0M

4,0

B,O
12
VCC, SUPPLY VOLTAGE M

16

APPLICATIONS INFORMATION
Description

Output Stage

The MC34151 is a dual inverting high speed driver
specifically designed to interface low current digital circuitry
with power MOSFETs. This device is constructed with
Schottky clamped Bipolar Analog technology which offers a
high degree of performance and ruggedness in hostile
industrial environments.

Each totem pole Drive Output is capable of sourcing and
sinking up to 1.5 A with a typical 'on' resistance of 2.4 Q at
1.0 A. The low 'on' resistance allows high output currents to be
attained at a lower VCC than with comparative CMOS drivers.
Each output has a 100 kQ pull-down resistor to keep the
MOSFET gate low when VCC is less than 1.4 V. No over
current or thermal protection has been designed into the
device, so output shorting to VCC or ground must be avoided.
Parasitic inductance in series with the load will cause the
driver outputs to ring above VCC during the turn-on transition,
and below ground during the turn-off transition. With CMOS
drivers, this mode of operation can cause a destructive output
latch-up condition. The MC34151 is immune to output
latch-up. The Drive Outputs contain an internal diode to VCC
for clamping positive voltage transients. When operating with
VCC at 18 V, proper power supply bypassing must be
observed to prevent the output ringing from exceeding the
maximum 20 V device rating. Negative output transients are
clamped by the internal NPN pull-up transistor. Since full
supply voltage is applied across the NPN pull-up during the
negative output transient, power dissipation at high

Input Stage
The Logic Inputs have 170 mV of hysteresis with the input
threshold centered at 1.67 V. The input thresholds are
insensitive to VCC making this device directly compatible with
CMOS and LSTTL logic families over its entire operating
voltage range. Input hysteresis provides fast output switching
that is independent of the input signal transition time,
preventing output oscillations as the input thresholds are
crossed. The inputs are designed to accept a signal amplitude
ranging from ground to Vcc. This allows the output of one
channel to directly drive the input of a second channel for
master-slave operation. Each input has a 30 kQ pull-down
resistor so that an unconnected open input will cause the
associated Drive Output to be in a known high state.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-310

MC34151, MC33151
frequencies can become excessive. Figures 19, 20, and 21
show a method of using external Schottky diode clamps to
reduce driver power dissipation.
Undervoltage Lockout
An undervoltage lockout with hysteresis prevents erratic
system operation at low supply voltages. The UVLO forces the
Drive Outputs into a low state as VCC rises from 1.4 V to the
5.8 V upper threshold. The lower UVLO threshold is 5.3 V,
yielding about 500 mV of hysteresis.

curve of gate voltage versus gate charge for the Motorola
MTM15N50. Note that there are three distinct slopes to the
curve representing different input capacitance values. To
completely switch the MOSFET 'on', the gate must be brought
to 10 V with respectto the source. The graph shows that a gate
charge Qg of 110 nC is required when operating the MOSFET
with a drain to source voltage VDS of 400 V.
Figure 17. Gate-To-Source Voltage versus Gate Charge

2:

Power Dissipation

16
MTM15N50

w

Circuit performance and long term reliability are enhanced
with reduced die temperature. Die temperature increase is
directly related to the power that the integrated circuit must
dissipate and the total thermal resistance from the junction to
ambient. The formula for calculating the junction temperature
with the package in free air is:
TJ = TA + PD (RaJA)
where:
TJ = Junction Temperature
TA = Ambient Temperature
PD = Power Dissipation
RaJA = Thermal Resistance Junction to Ambient
There are three basic components that make up total power
to be dissipated when driving a capacitive load with respect to
ground. They are:
PD = PQ + Pc + PT
where:
PQ = Quiescent Power Dissipation
Pc = Capacitive Load Power Dissipation
PT = Transition Power Dissipation
The quiescent power supply current depends on the supply
voltage and duty cycle as shown in Figure 16. The device's
quiescent power dissipation is:
PQ = VCC ( ICCL (1-D) + ICCH (DV
where:

ICCL = Supply Current with Low State Drive
Outputs
ICCH = Supply Current with High State Drive
Outputs
D = Output Duty Cycle
The capacitive load power dissipation is directly related to
the load capacitance value, frequency, and Drive Output
voltage swing. The capacitive load power dissipation per
driver is:
PC= VCC (VOH - VoLl CL f
where:
VOH = High State Drive Output Voltage
VOL = Low State Drive Output Voltage
CL = Load Capacitance
f = frequency
When driving a MOSFET, the calculation of capacitive load
power Pc is somewhat complicated by the changing gate to
source capacitance CGS as the device switches. To aid in this
calculation, power MOSFET manufacturers provide gate
charge information on their data sheets. Figure 17 shows a

/

i- 1O=15A

(!)

./

1:3 12 I- TA = 25°C

§?

VOS=100V

w

a?
:>

~ B.O

o

I-;-

/

w

~
en

(!)

>

4.0

v:

//

//

VOS =400V

/>"
/B.9 F

/

I 2.0nF

8Q
CGS= ~8VGS

II

I

40

80
Qg, GATE CHARGE (nC)

120

I

160

The capacitive load power dissipation is directly related to the
required gate charge, and operating frequency. The
capacitive load power dissipation per driver is:
PC(MOSFET) = Vc Qg f
The flat region from 10 nC to 55 nC is caused by the
drain-to-gate Miller capacitance, occuring while the MOSFET
is in the linear region dissipating substantial amounts of power.
The high output current capability of the MC34151 is able to
quickly deliver the required gate charge for fast power efficient
MOSFET switching. By operating the MC34151 at a higher
VCC, additional charge can be provided to bring the
gate above 10 V. This will reduce the 'on' resistance of the
MOSFET at the expense of higher driver dissipation at a given
operating frequency.
The transition power dissipation is due to extremely short
simultaneous conduction of internal circuit nodes when the
Drive Outputs change state. The transition power dissipation
per driver is approximately:
PT = VCC (1.08 VCC CL f-8 x 10-4)
PT must be greater than zero.
Switching time characterization of the MC34151 is
performed with fixed capacitive loads. Figure 13 shows that for
small capacitance loads, the switching speed is limited by
transistor turn-on/off time and the slew rate of the internal
nodes. For large capacitance loads, the switching speed is
limited by the maximum output current capability of the
integrated circuit.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-311

V"/

MC34151, MC33151
LAYOUT CONSIDERATIONS
High frequency printed circuit layout techniques are
imperative to prevent excessive output ringing and overshoot.
Do not attempt to construct the driver circuit on wire-wrap
or plug-In prototype boards. When driving large capacitive
loads, the printed circuit board must contain a low inductance
ground plane to minimize the voltage spikes induced by the
high ground ripple currents. All high current loops should be
kept as short as possible using heavy copper runs to provide
a low impedance high frequency path. For optimum drive

performance, it is recommended that the initial circuit design
contains dual power supply bypass capacitors connected with
short leads as close to the Vee pin and ground as the layout
will permit. Suggested capacitors are a low inductance O.lIlF
ceramic in parallel with a 4.71lF tantalum. Additional bypass
capacitors may be required depending upon Drive Output
loading and circuit layout.
Proper printed circuit board layout is' extremely critical
and cannot be over emphasized.

Figure 18. Enhanced System Performance with
Common Switching Regulators

Figure 19. MOSFET Parasitic Oscillations

Vee

Series gate resistor Rg may be needed to damp high frequency parasnic
oscillations caused by the MOSFET input capacitance and any series
wiring inductance in the gate·source circuit. Rg will decrease the
MOSFET switching speed. Schottky diode D1 can reduce the driver's
power dissipation due to excessive ringing, by preventing the output pin
from being driven below ground.

The MC34151 greaHy enhances the drive capabilnies of common switching
regulators and eMOSmL logic devices.

Figure 20. Direct Transformer Drive

Figure 21. Isolated MOSFET Drive

I
I

+

Isolation
Boundary

.1.

':~II

I

Output Schottky diodes are recommended when driving inductive loads at
high frequencies. The diodes reduce the driver's power dissipation by
preventing the output pins from being driven above Vee and below ground.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-312

J

lati
I

MC34151, MC33151
Figure 23. Bipolar Transistor Drive

Figure 22. Controlled MOSFET Drive

IB

~~eCharge
I ~B~emoval
-----+-1
I
I

In noise sensitive applications, both conducted and radiated EMI can
be reduced significantly by controlling the MOSFET's tum-on and
tum-off times.

The totem-pole outputs can furnish negative base current for enhanced
transistor tum-off, with the addition of capacitor Cl.

Figure 24. Dual Charge Pump Converter
VCC= 15V

4.7

6.8 10
lN5819
H--'---o-TL-_WY-_--l_If-'-J.----*----......
+-O + Vo ~ 2.0 VCC

7,--+l

471

330pF

I
Output Load Regulation

The capacho(s equivalent series resistance limhs the Drive Output Current
to 1.5 A. An additional series resistor may be required when using tantalum
or other low ESR capacitors.

'0 (mA)

+VO(V)

-VO(V)

0
1.0
10
20
30
50

27.7
27.4
26.4
25.5
24.6
22.6

-13.3
-12.9
-11.9
-11.2
-10.5
-9.4

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-313

MOTOROLA

MC34152
MC33152

SEMICONDUCTOR-----TECHNICAL DATA

High Speed Dual MOSFET Drivers
The MC341521MC33152 is a dual noninverting monolithic high speed driver
specifically designed for applications that require low current digital signals to
drive large capacitive loads with high slew rates. This device features low input
current making it CMOS/LSTTL logic compatible, input hysteresis for fast
output switching that is independent of input transition time, and two high
current totem pole outputs ideally suited for driving power MOSFETs. Also
included is an undervoltage lockout with hysteresis to prevent system erratic
operation at low supply voltages.
Typical applications include switching power supplies, DC-to-DC converters,
capacitor charge pump voltage doublers/inverters, and motor controllers.
This device is available in dual-in-line and surface mount packages.
• Two Independent Channels with 1.5 A Totem Pole Outputs
• Output Rise and Fall Times of 15 ns with 1000 pF Load
• CMOS/LSTTL Compatible Inputs with Hysteresis
• Undervoltage Lockout with HystereSiS
• Low Standby Current
• Efficient High Frequency Operation
• Enhanced System Performance with Common Switching Regulator
ControllCs

HIGH SPEED
DUAL MOSFET DRIVERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT

.~

PSUFFIX
PLASTIC PACKAGE
CASE 626

1

DSUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)

B~
1

PIN CONNECTIONS
Block Diagram
N.C.

Vcc
I-

I
I
I

------,
+

Logic Input A

7 Drive Output A

6 VCC

I
I

Logic Input B 4

5 Drive Output B

(Top View)

I Drive Output A

+

++--+0

Logic O+----<~-I
Input A 2

I
+

Drive Output B
+-t---'Lo

Logic Cl-r---+----I

ORDERING INFORMATION

InputB 4

I

-=

L -

-

-~3-

-

Device

I

MC34152D

_-_.J

Temperature
Range
0° to +70°C

MC34152P
MC33152D
MC33152P

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-314

Package
SO-8
Plastic DIP

- 40° to +85°C

SO-8
Plastic DIP

MC34152, MC33152
MAXIMUM RATINGS
Symbol

Value

Power Supply Voltage

Rating

VCC

20

V

logic Inputs (Note 1)

Yin

--{).3to +VCC

V

10
10(clamp)

1.5
1.0

PD
RaJA

0.56
180

W
°CIW

PD
RaJA

1.0
100

W
°CIW

Drive Outputs (Note 2)
Totem Pole Sink or Source Current
Diode Clamp Current (Drive Output to VCC)
Power Dissipation and Thermal Characteristics
D Suffix Package, SO-8 Case 751
Maximum Power Dissipation@TA = 50°C
Thermal Resistance, Junction-to-Air
P Suffix 8-Pin Package, Case 626
Maximum Power Dissipation@TA=50°C
Thermal Resistance, Junction-to-Air
Operating Junction Temperature
Operating Ambient Temperature

MC34152
MC33152

Storage Temperature Range

Unit

..

A

I

TJ

+150

°C

TA

Oto+70
-40 to +85

°C

Tstg

-65 to +150

°C

ELECTRICAL CHARACTERISTICS (VCC = 12 V, lor typical values TA = 25°C, lor minimax values TA is the operating ambient temperature
range that applies [Note 3], unless otherwise noted.)

I

Characteristics

Symbol

Min

Typ

Max

Input Threshold Voltage
High State logic 1
low State logic 0

VIH
Vil

2.6

-

1.75
1.58

0.9

Input Current
High State (VIH = 2.6 V)
low State (Vil = 0.8 V)

IIH
III

-

100
20

300
100

-

0.8
1.1
1.8
11.2
11.1
10.8

1.2
1.5
2.5

100

-

Unit

lOGIC INPUTS
V

IlA

DRIVE OUTPUT
Output Voltage
low State (Isink = 10 rnA)
(Isink = 50 rnA)
(Isink = 400 rnA)
High State (Isource = 10 rnA)
(Isource = 50 rnA)
(Isource = 400 rnA)

VOL

VOH

Output Pull-Down Resistor

RpD

10.5
10.4
10

-

V

kn

SWITCHING CHARACTERISTICS (TA = 25°C)
Propagation Delay (Cl = 1.0 nF)
logic Input to:
Drive Output Rise (10% Input to 10% Output)
Drive Output Fall (90% Input to 90% Output)
Drive Output Rise Time (10% to 90%)
Drive Output Fall Time (90% to 10%)

ns
tPlH (IN/OUT)
tpHlClNlOUT)

-

55
40

120
120

Cl= 1.0nF
Cl= 2.5 nF

tr

-

14
36

30

Cl = 1.0 nF
Cl= 2.5 nF

tl

-

-

15
32

-

-

6.0
10.5

8.0
15

ns

30

ns

TOTAL DEVICE
Power Supply Current
Standby (logic Inputs Grounded)
Operating (Cl = 1.0 nF Drive Outputs 1 and 2, I = 100 kHz)

ICC

Operating Voltage

VCC

6.5

NOTES: 1. For optimum swltchmg speed, the maximum input voltage should be limited to 10 Vor Vee. whichever is less.
2. Maximum package power dissipation limits must be observed.
3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
Tlow. O°C for MC34152
Thigh. +70°C for MC34152
'" --40"C for MC331S2

.. +85"C for MC33152

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-315

rnA

-

18

V

MC34152, MC33152
Figure 1. Switching Characteristics Test Circuit

Figure 2. Switching Waveform Definitions

12V

logic Input
tr.tf,.,10ns

Figure 4. Logic Input Threshold Voltage
versus Temperature

Figure 3. Logic Input Current versus Input Voltage
2.4

I

2.2

I

- VCC=12V
2.0 - TA= 25°C

I'

/

1 1.6
:z
w
a:

a

1/

1.2

I-

",

~

'§0.4

o

-

".,.

:.,..,.. I'""

o

V"

2.0

4.0

6.0

r- VCC=12V_
r- Cl=I.0nF
0160
TA = 25°C
~
~120
g:
~
:z

8.0

10

12

jj§4O

,

Overdrive Voltage is with Respect
to the logic Input lower Threshold

I

I

,. , /

V

/

~

3"

1.6

............

............

1

.............

............

r-...

1

......

.............
lower Threshold
High State Output

Upper Threshold _
low State Output

.............

........

..........

i=

1.4

~~

1.2

-$

1.0

!

Figure 6. Drive Output Low to High Propagation
Delay versus Logic Input Overdrive Voltage

-55

~ 200
~

i!5

~

160

-25

\

"

o
25
50
75
TA. AMBIENT TEMPERATURE (OC)

100

125

\

~ 120

!5
0..

........
..........

Overdrive Voltage is with Respect VCC=12L
10 the logic Input Upper Threshold Cl= 1.0nF
TA=25°C -

\
\

0..

§

........

...........

"-

80

~ 40

-...

!§

o

80
C

9

............

if

lao
w

1.8

VCC=12V -

...............

Vin. INPUT VOLTAGE M

Figure 5. Drive Output High to Low Propagation
Delay versus Logic Input Overdrive Voltage

~200

!:J
~

i

/

~ 0.8

2.0

~

/

I-

~

I--

Vth(lowerr--"
-1.6
-1.2
-0.8
-0.4·
0
Vin. INPUT OVERDRIVE VOLTAGE BELOW lOWER THRESHOLD M

Vlh(upper

1
2
3
4
Vin. INPUT OVERDRIVE VOLTAGE ABOVE UPPER THRESHOLD M

0..

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-316

MC34152, MC33152
Figure 8. Drive Output Clamp Voltage
versus Clamp Current

Figure 7. Propagation Delay

2:

3.0

High State Clamp (Drive
Output Driven Above VCc!,....-

w

(!)

t§

90%

2.0

0

>

....... ~

a.

::;;

::s

1.0

...
...

<.>
:::J

a.

".~

-

~.

I

I

I

..

VCC=12V
BO I!S Pulsed Load
120 Hz Rate
TA = 25°C

f
Vcel

0

I

:::J

0

-

I

c.
E
os

10%

'-

~

-1.0
50 ns/DIV

o

Low State Clamp (Drive
Output Driven Below Ground)

Gnd

I
0.2

I
0.6

0.4

O.B

1.0

1.2

1.4

10, OUTPUT CLAMP CURRENT (A)

Figure 9. Drive Output Saturation Voltage
versus Load Current

2:

VCCJ-

w
~ -1.0

1"""-1-0.

t::l

§!

:z

Source Saturation VCC= 12V
(Load to Ground) BO itS Pulsed Load
120 Hz Rate
-..!A= 25°C

---

-2.0

o

~ -3.0

r--I-.

:::J

!i;: 3.0
en
~
a. 2.0
~

o

I-"'""

1.0

o

o

0.2

Figure 10. Drive Output Saturation Voltage
versus Temperature

=-r--

2:

.1 ~ Source Saturation
w -0.5 I- (Load to Ground)
t§ -0.7 r- VCC= 12
(!)

~
:::J

5i
o

Gid,

0.4
0.6
O.B
1.0
10, OUTPUT CLAMP CURRENT (A)

}
t.2

1.4

I
Isource = 400 rnA"

~ -1.1

~
Sink Saturation
(Load to VCC)

Iisource~'"
I.

§! -0.9

~

.....

•

VCC'"

I
T

1.9

Isink = 400 rnA1.7
1.5
~~
I
1.0
Isink = 10 mA_
O.B
Sink Saturation r--- Gnd...,
0.6
~ (Load to Vccl
t
I
0_55
-25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (DC)

'"
'"

Figure 11. Drive Output Rise Time

Figure 12. Drive Output Fall Time

90%

90%

10%

10%

10 ns/DIV

10 ns/DIV

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3·317

MC34152, MC33152
Figure 13. Drive Output Rise and Fall Time
versus Load Capacitance

Figure 14. Supply Current versus Drive Output
Load Capacitance

80

80

1 ,I 1
-VCC=12V
w
:::;;
VIN=OVlo5.0V
;:: 60 - TA = 25°C

:[

.

:::I

~.

if

w
'"a:

5

IZ

.~

It~

..: 20

IV'

c..>
~

"

0.1

"'-

c..>

1.0
CL OUTPUT LOAD CAPACITANCE (nF)

80
Both Logic Inputs Driven
OVto5,OV,
50% Duty Cycle
Both Drive Outputs loaded
TA=25°C
l-VCC= 18V, CL= 2.5nF
2- VCC = 12V, CL = 2.5 nF
3- VCC = 18V, CL = 1.0 nF
4-VCC= 12V, CL = 1.0nF

0,1

.§. 60

!z
w
II:
II:

:::>
c..> 40
~

"-

":::>

'"- 20
8

o

--

10k

-

~~

~

...

I

/.

'

/

;

/ /

4

I
/

21/

,/

~ i-""

100
t, INPUT FREQUENCY (Hz)

I

/

t=~~

1,0
CL OUTPUT LOAD CAPACITANCE (nF)

TA = 25°C
.§.

logic Inputs at VCC
Low State Drive outpu,V"

z 6,0

I-

l'

W

II:
II:

V

:::>
c..>
~ 4,0

""-

.7l

:::>

/~

'"c:; 2,0

i--"

10

Figure 16. Supply Current versus Supply Voltage

:;(

/

1/

00 Hzlt

8,0

II

I

J

/ t=

,...., V

-- -

20

o

10

/

t= 0 kHZ/

.9

Figure 15. Supply Current versus Input Frequency

:;(

40

"":::>

~tr

--- o

60

W
II:
II:
:::J

~

40

!3a
"i

.§.

/

VCC=12V
Both logic Inputs Driven
OVto5.0V
50% Duty Cycle
Both Drive Outputs loaded
TA=25°C

:;(

.9

v:. ~

....

,/'

....... ~

./
~

logic Inputs Grounded
High State Drive Outputs

#

..d. 7

o
o

1.0M

4,0

8.0
12
VCC, SUPPLY VOLTAGE M

16

APPLICATIONS INFORMATION
Description
The MC34152 is a dual non inverting high speed driver
specifically designed to interface low current digital circuitry
with power MOSFETs. This device is constructed with
Schottky clamped Bipolar Analog technology which offers a
high degree of performance and ruggedness in hostile
industrial environments.
Input Stage
The Logic Inputs have 170 mV of hysteresis with the input
threshold centered at 1.67 V. The input thresholds are
insensitive to VCC making this device directly compatible with
CMOS and LSTTL logic families over its entire operating
voltage range. Input hysteresis provides fast output switching
that is independent of the input signal transition time,
preventing output oscillations as the input thresholds are
crossed. The inputs are designed to accept a signal amplitude
ranging from ground to Vcc. This allows the output of one
channel to directly drive the input of a second channel for
master-slave operation. Each input has a 30 kQ pull-down
resistor so that an unconnected open input will cause the
associated Drive Output to be in a known low state.

Output Stage
Each totem pole Drive Output is capable of sourcing and
sinking up to 1.5 A with a typical 'on' resistance of 2.4 n at
1.0 A. The low 'on' resistance allows high output currents to be
attained at a lower Vee than with comparative CMOS drivers.
Each output has a 100 kn pull-down resistor to keep the
MOSFET gate low when VCC is less than 1.4 V. No over
current or thermal protection has been designed into the
device, so output shorting to VCC or ground must be avoided.
Parasitic inductance in series with the load will cause the
driver outputs to ring above Vee during the turn-on transition,
and below ground during the turn-off transition. With CMOS
drivers, this mode of operation can cause a destructive output
latch-Up condition. The MC34152 is immune to output
latCh-Up. The Drive Outputs contain an internal diode to VCC
for clamping positive voltage transients. When operating with
VCC at 18 V, proper power supply bypassing must be
observed to prevent the output ringing from exceeding the
maximum 20 V device rating. Negative output transients are
clamped by the internal NPN pull-up transistor. Since full
supply voltage is applied across the NPN pull-up during the
negative output transient, power dissipation at high

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-318

MC34152, MC33152
frequencies can become excessive. Figures 19, 20, and 21
show a method of using external Schottky diode clamps to
reduce driver power dissipation.
Undervoltage Lockout
An undervoltage lockout with hysteresis prevents erratic
system operation at low supply voltages. The UVLO forces the
Drive Outputs into a low state as VCC rises from 1.4 V to the
5.8 V upper threshold. The lower UVLO threshold is 5.3 V,
yielding about 500 mV of hysteresis.

charge information on their data sheets. Figure 17 shows a
curve of gate voltage versus gate charge for the Motorola
MTM15N50. Note that there are three distinct slopes to the
curve representing different input capacitance values. To
completely switch the MOSFET 'on,' the gate must be brought
to 10 V with respectto the source. Thegraph shows that a gate
charge Qg of 110 nC is required when operating the MOSFET
with a drain to source voltage VDS of 400 V.
Figure 17. Gale-la-Source Voltage
versus Gale charge

Power Dissipation
Circuit performance and long term reliability are enhanced
with reduced die temperature. Die temperature increase is
directly related to the power that the integrated circuit must
dissipate and the total thermal resistance from the junction to
ambient. The formula for calculating the junction temperature
with the package in free air is:

MTM15B50
10= 15A
TA = 25°C

/
VOS=100V

TJ =
TA =
Po =
RaJA =

I
/2.0 nF

80
120
0 9, GATE CHARGE (nC)

160

PC(MOSFET) = VCC Qg f

PQ = VCC (ICCL [1-0] + ICCH [0])
ICCL = Supply Current with Low State Drive
Outputs
ICCH = Supply Current with High State Drive
Outputs
o = Output Duty Cycle

The capacitive load power dissipation is directly related to
the load capacitance value, frequency, and Drive Output
voltage swing. The capacitive load power dissipation per
driver is:
Pc = VCC (VOH - VoLl CL f
VOH =
VOL =
CL =
f=

40

The capacitive load power dissipation is directly related to the
required gate charge, and operating frequency. The capacitive load power dissipation per driver is:

PQ = Quiescent Power Dissipation
Pc = Capacitive Load Power Dissipation
PT = Transition Power Dissipation

The quiescent power supply current depends on the supply
voltage and duty cycle as shown in Figure 16. The device's
quiescent power dissipation is:

where:

flO

CGS=~-

1/

Po = PQ + Pc + pT

where:

Vos =400V

~ Va.9nF

Junction Temperature
Ambient Temperature
Power Dissipation
Thermal Resistance Junction to Ambient

There are three basic components that make up total power
to be dissipated when driving a capacitive load with respect to
ground. They are:

where:

//

V/"

TJ = TA + Po (RaJA)
where:

V/

./V/

The flat region from 10 nC to 55 nC is caused by the
drain-to-gate Millercapacitance, occurring while the MOSFET
is in the linear region dissipating substantial amounts of power.
The high output current capability of the MC34152 is able to
quickly deliver the required gate charge for fast power efficient
MOSFET switching. By operating the MC34152 at a higher
VCC, additional charge can be provided to bring the gate
above 10 V. This will reduce the 'on' resistance ofthe MOSFET
at the expense of higher driver dissipation at a given
operating frequency.
The transition power dissipation is due to extremely short
simultaneous conduction of internal circuit nodes when the
Drive Outputs change state. The transition power dissipation
per driver is approximately:
PT Z VCC (1.08 VCC CL f - 8 x 10-4)
PT must be greater than zero.

High State Drive Output Voltage
Low State Drive Output Voltage
Load Capacitance
Frequency

When driving a MOSFET, the calculation of capacitive load
power Pc is somewhat complicated by the changing gate to
source capacitance CGS as the device switches. To aid in this
calculation, power MOSFET manufacturers provide gate

Switching time characterization of the MC34152 is
performed with fixed capacitive loads. Figure 13 shows thallor
small capacitance loads, the switching speed is limited by
transistor turn-on/off time and the slew rate of the internal
nodes. For large capacitance loads, the switching speed is
limited by the maximum output current capability of the
integrated circuit.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-319

..

MC34152, MC33152
LAYOUT CONSIDERATIONS
performance, it is recommended that the initial circuit design
contains dual power supply bypass capacitors connected with
short leads as close to the Vee pin and ground as the layout
will permit. Suggested capacitors are a low inductance 0.1 ~F
ceramic in parallel with a 4.7 ~F tantalum. Additional bypass
capacitors may be required depending upon Drive Output
loading and circuit layout.
Proper printed circuit board layout is extremely critical
and cannot be over emphasized.

High frequency printed circuit layout techniques are
imperative to prevent excessive output ringing and overshoot.
Do not attempt to construct the driver circuit on wire-wrap
or plug-in prototype boards. When driving large capacitive
loads, the printed circuit board must contain a low inductance
ground plane to minimize the voltage spikes induced by the
high ground ripple currents. All high current loops should be
kept as short as possible using heavy copper runs to provide
a low impedance high frequency path. For optimum drive
Figure 18. Enhanced System Performance with
Common Switching Regulators

Figure 19. MOSFET Parasitic Oscillations

Vee

I
I
I
I
I
I

L-

1

-.J

Series gate resistor Rg may be needed to damp high frequency
parasitic oscillations caused by the MOSFET input capacitance and
any series wiring inductance in the gate-source circuit. Rg will
decrease the MOSFET switching speed. Schottky diode Dl can
reduce the driver's power dissipation due to excessive ringing, by
preventing the output pin from being driven below ground.

The MC34152 greatly enhances the drive capabilities of common
switching regulators and CMOSITTL logic devices.

Figure 21_ Isolated MOSFET Drive

Figure 20. Direct Transformer Drive

Isolation
Boundary

J

~~III~
.1.

I

Output Schottky diodes are recommended when driving inductive
loads at high frequencies. The diodes reduce the driver's power
dissipation by preventing the output pins from being driven above VCC
and below ground.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-320

MC34152, MC33152

Figure 23. Bipolar Transistor Drive

Figure 22. Controlled MOSFET Drive

..

;~B

o
Rg(on)

Base
Charge
Removal

-----+-1

I
I

Rg(off)

The totem-pole outputs can furnish negative base
cu rrentfor enh anced transistortu rn-off, with the additio n
of capacitor C1.

In noise sensitive applications, both conducted and radiated
EMI can be reduced significantly by controlling the MOSFET's
turn-on and turn-off times.

Figure 24. Dual Charge Pump Converter
VCC = 15V

H--r<>--....II/I/V--J Fic--<>-I~-t--o + Vo = 2 .0Vec

6.B

10

1N5B19

I.-+~
-Vo=-Vec
L
___ J

=

100k

471-

Output Load Regulation

Thecapacilor's equivalent series resistance Ii mits the Drive Output Current
to 1 .5 A. An additional series resistor may be required when using tantalum
or other low ESR capacitors.

10 (mA)

+VO(V)

-VO(V)

0
1.0
10
20
30
50

27.7
27.4
26.4
25.5
24.6
22.6

-13.3
-12.9
-11.9
-11.2
-10.5
-9.4

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-321

MOTOROLA

MC34160
MC33160

SEMICONDUCTOR-----TECHNICAL DATA

Advance Information

Microprocessor Voltage Regulator
and Supervisory Circuit

MICROPROCESSOR
VOLTAGE REGULATOR!
SUPERVISORY CIRCUIT
SILICON MONOLITHIC
INTEGRATED CIRCUIT

The MC34160 Series is a voltage regulator and supervisory circuit containing
many of the necessary monitoring functions required in microprocessor based
systems. It is specifically designed for appliance and industrial applications,
offering the designer a cost effective solution with minimal external components.
These integrated circuits feature a 5.0 V/1 00 rnA regulator with short circuit current
limiting, pinned out 2.6 V bandgap reference, low voltage reset comparator, power
warning comparator with programmable hysteresis, and an uncommitted
comparator ideally suited for microprocessor line synchronization.
Additional features include a chip disable input for low standby current, and
internal thermal shutdown for over temperature protection.
These devices are contained in a 16 pin dual-in-line heat tab plastic package for
improved thermal conduction.
• 5.0 V Regulator Output Current in Excess of 100 rnA
• Internal Short Circuit Current Limiting
• Pinned Out 2.6 V Reference
• Low Voltage Reset Comparator
• Power Warning Comparator with Programmable Hysteresis
• Uncommitted Comparator
• Low Standby Current
• Internal Thermal Shutdown Protection

PSUFFIX
PLASTIC PACKAGE
CASE 64BC

PIN CONNECTIONS

Comp. Inv. In

1

Vre!

Camp. Noninv. In

• Heat Tab Power Package

Chip Disable

N.C.

Gnd{ 4

Representative Block Diagram
VCC r - - - - - - - - - - - - - - - ---, RegulalorOulpul

Comp.Oul
Reset

7

Power Warning

8

111

I Reset

17
I Reference Output

9

Power Sense

(Top View)

r-------~----~----+O

ORDERING INFORMATION
Device

Temperature
Range

Package

MC34160P
MC33160P

0° 10 +70°C
-40° 10 +B5°C

PlaslicDIP
PlaslicDIP

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-322

MC34160, MC33160
MAXIMUM RATINGS
Rating
Power Supply Voltage
Chip Disable Input Voltage (Pin 15, Note 1)

Symbol

Value

Unit

VCC

40

V
V
rnA

VCD

-0.3 to VCC

Comparator Input Current (Pin 1, 2, 9)

lin

-2.0 to +2.0

Comparator Output Voltage (Pin 6, 7, 8)

Vo

40

V

Comparator Output Sink Current (Pin 6, 7, 8)

ISink

10

rnA

Power Dissipation and Thermal Characteristics
Maximum Power Dissipation @TA = 70°C
Thermal Resistance Junction to Air
Thermal Resistance Junction to Case (Pin 4, 5, 12, 13)

PD
RaJA
RaJC

1000
80
15

mW
°CfW
°CfW

Operating Junction Temperature

TJ

+150

°C

Operating Ambient Temperature
MC34160
MC33160

TA

oto +70

°C

-40 to +85

Storage Temperature Range

Tstg

-65 to +150

°C

ELECTRICAL CHARACTERICISTICS (VCC =30 V, 10 = 10 rnA, Irel = 100 ~A) For typical values TA
operating ambient temperature range that applies [Notes 2 and 3], unless otherwise noted.)

=25°C, lor min/max values TA is the

Characteristics
REGULATOR SECTION
Total Output Variation (VCC = 7.0 V to 40 V,
10 = 1.0 rnA to 100 rnA, TA = Tlow to Thigh

Vo

= 7.0 V to 40 V, TA = 25°C)
= 1.0 V to 100 rnA, TA = 25°C)

4.75

5.0

5.25

V

Line Regulation (VCC

Regline

-

5.0

40

mV

Load Regulation (10

Regload

-

20

50

mV

RR

50

6.5

-

dB

Vrel

2.47

2.6

Ripple Rejection
(VCC = 25 V to 35 V, 10 = 40 rnA, I

= 120 Hz, TA = 25°C)

REFERENCE SECTION
Total Output Variation (VCC = 7.0 to 40 V,
10 = 0.1 rnA to 2.0 rnA, TA = Tlow to Thigh

= 5.0 V to 40 V, TA = 25°C)
= 0.1 rnA to 2.0 rnA, TA = 25°C)

2.73

V

Line Regulation (VCC

Regline

-

2.0

20

mV

Load Regulation (10

Regload

-

4.0

30

mV

(VO-o·11)
(VO-o·18
0.07

(VO-0.05)

RESET COMPARATOR
Threshold Voltage
High State Output (Pin 11 Increasing)
Low State Output (Pin 11 Decreasing)
Hysteresis

VIH
VIL
VH

=4.5 V, ISink = 2.0 rnA)
Output Off-State Leakage (VOH =40 V)
Output Sink Saturation (VCC

4.55
0.02

V

-

VOL

-

-

0.4

V

10H

-

-

4.0

~

NOTES: 1. The maximum voltage range is -0.3 V to VCC or +35 V, whichever is less.
2. Tlow =
O°C lor MC34160
Thigh = 70°C lor MC34160
-40°C lor MC33160
85°C lor MC33160
2. Low duty cycle pulse testing techniques are used during test to maintain junction temperature as close to ambient as possible.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-323

MC34160, MC33160
ELECTRICAL CHARACTERICISTICS (continued) (VCC = 30 V. 10 = 10 rnA. Iref = 100 1lA) For typical values TA = 25°C. for minImax
values TA is the operating ambient temperature range that applies [Notes 2 and 3]. unless otherwise noted.)

I

I

Characteristics

I

Symbol

Min

I

Typ

Max

Unit

POWER WARNING COMPARATOR
Input Offset Voltage

VIO

-

1.2

10

mV

Input Bias Current (VPin 9 = 3.0 V)

liB

-

-

0.5

Input Hysteresis Current (VPin 9 = Vref - 100 niV)
RPin10=24k
RPin 10 = 00

IH

IlA
IlA

40
4.5

50
7.5

SO
11

0.13

0.4

V

4.0

IlA

Output Sink Saturation (ISink = 2.0 rnA)

VOL

-

Output Off-State Leakage (VOH = 40 V)

10H

-

-

UNCOMMITTED COMPARATOR

-

-

20

mV

IH

140

200

2S0

mV

Input Bias Current (VPin 1. 2 = 2.S V)

liB

-

-

-1.0

IlA

Input Common Mode Voltage Range

VICR

O.Sto 5.0

-

Output Sink Saturation (lSink = 2.0 rnA)

VOL

-

0.13

0.4

V

Output Off-State Leakage (VOH = 40 V)

10H

-

-

4.0

IlA

-

Input Offset Voltage (Output Transition Low to High)

VIO

Input Hysteresis Voltage (Output Transition High to Low)

-

V

TOTAL DEVICE
Chip Disable Threshold Voltage (Pin 15)
High State (Chip Disabled)
Low State (Chip Enabled)

VIH
VIL

2.5

-

-

Chip Disable Input Current (Pin 15)
High State (Vin = 2.5 V)
Low State (Vin = 0.8 V)

IIH
IlL

-

-

-

-

100
30

Chip Disable Input Resistance (Pin 15)

Rin

50

100

-

7.0 to 40
5.0 to 40

-

-

-

0.18
1.5

0.35
3.0

Operating Voltage Range
Vo (Pin 11) Regulated
Vref (Pin 1S) Regulated

VCC

Power Supply Current
Standby (Chip Disable High State)
Operating (Chip Disable Low State)

ICC

Figure

-

iw

~
!!l

-4.0

g

-- --

r--.

~

w

\



o If''''
o

BO

l3

~ 60

_V , /
..b---: ::.......... f-""""...........
TA = -40'C
TA = B5'C.___ ~
~.....-:::;:. P::.. ~

:::J

Printed circuil board heatsink example

o

/./
TA = 25'C

':;
~

0:

:;;:

--

w

()

~ 40

en
en
w

0:

"-

-.L
T~~~

4.0
6.0
ISink, SINK CURRENT (rnA)

i-l--i '-

---r----...

---II--

3.0mm
Graphsrepresentsymmetricallayoul

I

10

0:
W

s:
o

:::J

::;;

~

1.0 ::;;

I

20
30
L, LENGTH OF COPPER (mm)

Ci

2.0 ~

PO(max) for TA = 70'C

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-325

en
en

3.0

r-

I

B.O

o

4.0 ~

Co per

........ R8JA

o

I

2.0

5.0 ~
:z

40

a

50

c..

MC34160, MC33160
PIN FUNCTION DESCRIPTION
Pin No.

Function

Description

1

Comparator Inverting
Input

This is the Uncommitted Comparator Inverting input. It is typically connected to a resistor divider
to monitor a voltage.

2

Comparator Noninverting
Input

This is the Uncommitted Comparator Noninverting input. It is typically connected to a reference
voltage.

3

N.C.

No connection. This pin is not internally connected.

4,5,
12,13

Gnd

These pins are the control circuit grounds and are connected to the source and load ground
returns. They are part of the IC lead frame and can be used for heatsinking.

6

Comparator Output

This is the Uncommitted Comparator output. It is an open collector sink-only output requiring a
pull-up resistor.

7

Reset

This is the Reset Comparator output. It is an open collector sink-only output requiring a pull-up
resistor.

8

Power Warning

This is the Power Warning Comparator output. It is an open collector sink-only output requiring a
pu II-up resistor.

9

Power Sense

This is the Power Warning Comparator non inverting input. It is typically connected to a resistor
divider to monitor the input power source voltage.

10

Hysteresis Adjust

The Power Warning Comparator hysteresis is programmed by a resistor connected from this pin
to ground.

11

Regulator Output

This is the 5.0 V Regulator output.

14

VCC

This pin is the positive supply input of the control IC.

15

Chip Disable

This input is used to switch the IC into a standby mode turning off all outputs.

16

Vref

This is the 2.6 V Reference output. It is intended to be used in conjunction with the Power Warning
and Uncommitted comparators.

OPERATING DESCRIPTION
The MC34160 series is a monolithic voltage regulator and
supervisory circuit containing many of the necessary
monitoring functions required in microprocessor based
systems. It is specifically designed for appliance and industrial
applications, offering the designer a cost effective solution with
minimal external components. These devices are specified for
operation over an input voltage of 7.0 V to 40 V, and with a
junction temperature of -40 to +150°C. A typical
microprocessor application is shown in Figure 9.
0

Regulator
The 5.0 V regulator is designed to source in excess of
100 mA output current and is short circuit protected. The
output has a guaranteed tolerance of ±5.0% over line, load,
and temperature. Internal thermal shutdown circuitry is
included to limit the maximum junction temperature to a safe
level. When activated, typically at 170°C, the regulator output
turns off.
In specific situations a combination of input and output
bypass capacitors may be required for regulator stability. If the
regulator is located an appreciable distance (~4") from the
supply filter, an input bypass capacitor (Cin) of 0.33 !IF or
greater is suggested. Output capacitance values of less than
5.0 nF may cause regulator instability at light load (~ 1.0 mAl
and cold temperature. An output bypass capacitor of 0.1 !IF or
greater is recommended to ensure stability under all load
conditions. The capacitors selected must provide good high
frequency characteristics.

Good construction techniques should be used to minimize
ground loops and lead resistance drops since the regulator
does not have external sense inputs.

Reference
The 2.6 V bandgap reference is short circuit protected and
has a guaranteed output tolerance of ±5.0% over line, load,
and temperature. It is intended to be used in conjunction with
the Power Warning and Uncommitted comparator. The
reference can source in excess of 2.0 mA and sink a maximum
of 10 !lA. For additional current sinking capability, an external
load resistor to ground must be used.
Reference biasing is internally derived from either VCC or
VO, allowing proper operation if either drops below nominal.

Chip Disable
This input is used to switch the IC into a standby mode.
When activated, internal biasing for the entire die is removed
causing all outputs to turn off. This reduces the power supply
current (ICC) to less than 0.3 mAo

Comparators
Three separate comparators are incorporated for voltage
monitoring. Their outputs can provide diagnostic information
to the microprocessor, preventing system malfunctions.
The Reset Comparator Inverting Input is internally
connected to the 2.6 V reference while the Noninverting Input

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-326

MC34160, MC33160
monitors Va. The Reset Output is active low when Va falls
approximately 180 mV below its regulated voltage. To prevent
erratic operation when crossing the comparator threshold,
70 mV of hysteresis is provided.
The Power Warning Comparator is typically used to detect
an impending loss of system power. The Inverting Input is
internally connected to the reference, fixing the threshold at
2.6 V. The input power source Vin is monitored by the
Noninverting Input through the R1/R2 divider (Figure 9). This
inputfeatures an adjustable 10 IlA to 50 IlA current sink IH that
is programmed by the value selected for resistor RH. A default
current of 6.5 IlA is provided if RH is omitted. When the
comparator input falls below 2.6 V, the current sink is activated.
This produces hysteresis if Vin is monitored through a
series resistor (R1). The comparator thresholds are defined
as follows:
Vth(lower) = Vref( 1 +
Vth(upper) = Vref( 1 +

~) -liB R1

~)

The base input normally connects to a voltage reference while
the emitter input connects to the voltage to be monitored. The
transistor limits the negative excursion on the emitter input to
- 0.7 V below the base input by supply currentfrom VCC. This
clamp current will prevent forward biasing the IC substrate.
Zener diodes are connected to the comparator inputs to
enhance the ICs electrostatic discharge capability. Resistors
R1 and Rin must limit the input current to a maximum
of±2.0 mAo
Each comparator output consists of an open collector NPN
transistor capable of sinking 2.0 mA with a saturation voltage
less than 0.4 V, and standing off 40 V with minimal leakage.
Internal bias for the Reset and Power Warning Comparators
is derived from either VCC or the regulator output to ensure
functionality when either is below nominal.

Heat Tab Package

+ IH R1

The nominal hysteresis current IH equals 1.2 V/RH
(Figure 4).
The Uncommitted Comparator can be used to synchronize
the microprocessor with the ac line signal for timing functions,
or for synchronous load switching. It can also be connected as
a line loss detector as shown in Figure 10. The comparator
contains 200 mV of hysteresis preventing erractic output
behavior when crossing the input threshold.
The Power Warning and Uncommitted Comparators each
have a transistor base-emitter connected across their inputs.

The MC34160 is contained in a 16 lead plastic dual-in-line
package in which the die is mounted on a special Heat Tab
copper alloy lead frame. This tab consists of the four center
ground pins that are specifically designed to improve thermal
conduction from the die to the surrounding air. The pictorial in
Figure 8 shows a simple but effective method of utilizing the
printed circuit board medium as a heat dissipator by soldering
these tabs to an adequate area of copper foil. This permits the
use of standard board layout and mounting practices while
having the ability to more than halve the junction to air thermal
resistance. The example and graph are for a symmetrical
layout on a single sided board with one ounce per square
foot copper.

Figure 9. Typical Microprocessor Application
~~-------'-----------+~--------DVO
i:>--HJ~4------oMPUReset

r>-__-----+o--H~+--O Power Warning

2.6V

~~011

APA
I

>---------------.-0--+---+----0
Rin

1

I

I

L- =- - - - - - - -Ai2,-13 -

- - - -

6

J

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-327

~

Une Sync.

Lfl.JlJ"
_ Sink Only

~ - Positive True Logic

III

MC34160, MC33160
Figure 10. Line Loss Detector Application
Vin o-----~>---':O-+--<~___+___ih

~~---~-----+O~~~-~VO

1~---i~~4_--~MPUAesm

g~~bll O-----O--l-~

f-----..---"--------K:r---_--___t_-l---Q Power Warning
PoinlA

~

2.6V

Pin6~-2.6V
AOLY

Pin8~
2

1

I
I

Uncommitted
Comparator

g

I
=
IL_________

~

I
_______ I

6

~

= 4,5,12,13

~ __

Sink Only

~- - PosUive True logic

~

COLY

Figure 11. Time Delayed Microprocessor Reset

~~----------+~----~VO

g~~ble JL o----o+------j-{)-----------.~___t_<4_---oMPUAesm

~

Sink Only

~ = Positive True Logic

6.2k

IDLY"" AOLY COLY

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-328

MC34161
MC33161

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Advance Information

UNIVERSAL VOLTAGE
MONITOR

Universal Voltage Monitor
The MC34161, MC33161 series are universal voltage monitors intended for
use in a wide variety of voltage sensing applications. These devices offer the
circuit designer an economical solution for positive and negative voltage
detection. The circuit consists of two comparator channels each with hysteresis,
a unique Mode Select Input for channel programming, a pinned out 2.54 V
reference, and two open collector outputs capable of sinking in excess of 10 mAo
Each comparator channel can be configured as either inverting or non inverting
by the Mode Select Input. This allows over, under, and window detection of
positive and negative voltages. The minimum supply voltage needed for these
devices to be fully functional is 2.0 V for positive voltage senSing and 4.0 V for
negative voltage sensing.
Applications include direct monitoring of positive and negative voltages used
in appliance, automotive, consumer, and industrial equipment.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

PSUFFIX
PLASTIC PACKAGE
CASE 626

• Unique Mode Sleet Input Allows Channel Programming
• Over, Under, and Window Voltage Detection

DSUFFIX

• Positive and Negative Voltage Detection

PLASTIC PACKAGE
CASE 751
(50-8)

• Fully Functional at 2.0 V for Positve Voltage Sensing and 4.0 V for
Negative Voltage Sensing
• Pinned Out 2.54 V Reference with Current Limit Protection
• Low Standby Current
• Open Collector Outputs for Enhanced Device Flexibility

PIN CONNECTIONS
Simplified Block Diagram

Vee

Vref

(Positive Voltage Window Detector Application)

Vee

Input 1
Input 2

Output 1

Gnd

Output 2

8

-------,

~----~--~~

:

\\

[TOP VIEW)

I
I
I
I6

Vs

I
2 I
"'--0-1---1 +

I + _IT >--t------jL---"
II .I..
-= 1.27V

3

I
I
I~

ORDERING INFORMATION

1.27V

L~ - - - -

-=

I
I
I

Device

-It------ J

MC34161D

Temperature
Range
0° to +70°C

MC34161P
MC33161D
MC33161P

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-329

Package
50-8
Plastic DIP

-40° to +85°C

50-8
Plastic DIP

•

MC34161, MC33161
MAXIMUM RATINGS
Rating

Symbol

Value

VCC

40

V

Yin

-1.0 to +40

V

Comparator Output Sink Current (Pins 5 and 6. Note 1)

ISink

20

mA

Comparator Output Voltage

Vout

40

V

Power Dissipation and Thermal Characteristics (Note 1)
P Suffix. Plastic Package Case 626
Maximum Power Dissipation@TA= 70"C
Thermal Resistance. Junction to Air
o Suffix. Plastic Package SO-8 Case 751
Maximum Power Dissipation @ TA = 70"C
Thermal Resistance. Junction to Air

Po
RaJA

800
100

mW
"CfW

Po
RaJA

450
178

mW
"CfW

TJ

+150

"C

TA

o to +70

"C

Power Supply Input Voltage
Comparator Input Voltage Range

Operating Junction Temperature
Operating Ambient Temperature (Note 3)

MC34161
MC33161

Storage Temperature Range

Unit

- 40 to +85
Tstg

- 55 to +150

"C

ELECTRICAL CHARACTERISTICS (VCC = 5.0 V. for typical values TA = 25"C. for min/max values TA is the operating ambient temperature
range that applies [Notes 2 and 3]. unless otherwise noted.)

I

I

Characteristics

Symbol

Min

Typ

Max

Unit

Vth

1.245
1.235

1.27

1.295
1.295

V

COMPARATOR INPUTS
Threshold Voltage. Yin Increasing

(TA = 25"C)
(TA = T min to T max)

-

-

7.0

15

mV

Threshold Hysteresis. Yin Decreasing

VH

15

25

35

mV

Threshold Difference IVth1 - Vth21

VD

-

1.0

15

mV

1.27

1.32

V

Threshold Voltage Variation (V CC = 2.0 V to 40 V)

t.Vth

Reference to Threshold Difference (Vref - Vin1). (Vref - Vin2)

VRTD

1.20

liB

-

40
85

200
400

nA

Output Sink Saturation Voltage (ISink = 2.0 mAl
(ISink = 10 mAl
(ISink = 0.25 mAo VCC = 1.0 V)

VOL

-

0.05
0.22
0.02

0.3
0.6
0.2

V

Off-State Leakage Current (VOH = 40 V)

10H

-

0

1.0

j.1A

Input Bias Current

(Vin = 1.0 V)
(Vin = 1.5 V)

MODE SELECT INPUT
Mode Select Threshold Voltage (Figure 5)

Channel 1
Channel 2

COMPARATOR OUTPUTS

REFERENCE OUTPUT
Output Voltage (10 = 0 mAo TA = 25"C)

Vref

Load Regulation (10 = 0 mA to 2.0 mAl

Regload

Line Regulation (VCC = 4.0 V to 40 V)

Regline

Total Output Variation over Line. Load. and Temperature

t.Vref

Short Circuit Current

2.48

2.54

2.60

V

-

0.6

15

mV

-

5.0

15

mV

2.45

-

2.60

V

ISC

-

8.5

30

mA

ICC

-

450
560

700
900

j.1A

VCC

2.0
4.0

40
40

V

TOTAL DEVICE
Power Supply Current (VMode. Vin1. Vin2 = Gnd)

(VCC= 5.0 V)
(VCC =40V)

Operating Voltage Range (Positive Sensing)
(Negative Sensing)
NOTES:

1.

2.
3.

MaXimum package power diSSipation must be observed.

Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
= O°C for MC34161
Thigh = 70DC for MC34161
-4QoC for MC33161
85°C for MC33161

Tlow

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-330

-

I

MC34161, MC33161
Figure 2. Comparator Input Bias Current
Versus Input Voltage

Figure 1. Comparator Input Threshold Voltage
6.0

2:

500

VCC=5.0V
RL=10ktoVCC
5.0 TA= 25'C

1
W

13

a:
a:

4.0

~

::l

'"co

3.0

~

I-- TA=25'C

~100

r-- \-40'C

/

1.23

1.24
1.25
1.26
1.27
Vin, tNPUT VOLTAGE M

1.28

1.29

3600

.1

_ VCC=5.0V
TA = 25'C

~

c
z

o

'- .......

if.

1800

.........

5

~ 1200

o

Rl = 1.8k, R2 =4.7 k
6.0 I- RL=10ktoVCC
Refer to Fiaur 16

w

0

13
0

"

4.0

Q.

S0

2.0

>

3

4.0
6.0
PERCENT OVERDRtVE (%)

8.0

A

10

2:

6.0

o

13

~

I-

~O

I

I

I

5.0

I

140

I

~TA=-85'C
2.0

4.0

a

I

t--

-s 1.0

~

0.5

I

I

1.0

1.5

w

--TA= 85'C
TA= -40'6......
TA=25'C

2.5

I

3.0

g

I

1

15
10

:::iE

~5.0
:::iE

3.5

VMode, MODE SELECT INPUT VOLTAGE M

0

o

-

.......-

L

./

1.0
2.0
3.0
4.0
VMode, MODE SELECT INPUT VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-331

.......-

I

I-

~ 25

;;;

III

2.0

8.0

V

30

~

A =85'C
TA = 25'C
'fA = -40''c

.-'"

TA= 25'C

a:

t; 20

~ 2.0

6.0

ii] 35 _ VCC = 5.0V

3.0

irl
z

o
o

"./' TA=-40'C
TA= -25'C

I

l-

VCC=5.0V
Rl = 10ktoVCC

4.0

V

Figure 6. Mode Select Input Current
versus Input Voltage

Channell Threshold

Channel 2 Threshold

V

/'

VCC, SUPPLY VOLTAGE M

Figure 5. Mode Select Thresholds
w

5.0

0

2

2.0

4.0

Undervoltage Detector

I- Programmed to trip at 4.5 V

2:

4

o

2.0
3.0
Vin, INPUT VOLTAGE M

I::l

:<:

~600

~.

1

......

.=J

./

>

\

..

Figure 4. Output Voltage versus Supply Voltage

I::l

r--

/

8.0

1. VMode = Gnd, Output Falhng
2. VMode = VCC, Output Rising
3. VMode = VCC, Output Falling
4. V ode = Gnd, Output Rising

w 3000

~ 2400

~

1

V
1.0

Figure 3. Output Propagation Delay Time
versus Percent Overdrive

/

V

;;;

r-- TA=85'C

I

1.22

200

5
c..

TA=85'C_
TA= 25'C
1.0
TA=-40'C-

o

~

/"

:$

2.0

S

i!!

300

u

5
~
o

Iw

400 -

IZ

w

o

I

VCC=5.0V
VMode= Gnd
TA = 25'C

5.0

MC34161, MC33161
Figure 8. Reference Voltage
versus Ambient Temperature

Figure 7. Reference Voltage
versus Supply Voltage
~

2.8

--

2.610

w

(!)

~ 2.4
w

;:;
'-'

~

2.578

0

(!)

>

2.0

>=>
>- 2.546
=>
0
w
(.)
z 2.514
w
a:
w
u..
w
a: 2.482

0

0..

>

w 1.6
z
w
a: 1.2
w
u..
w
a: 0.8
(.)

:$ 0.4

o

,

VMode= Gnd
TA=2r C

o

10

40

20
30
VCC, SUPPLY VOLTAGE (V)

'" 2.450

>-

Vref Typ - 2.54 V

......... ~

w

l

~

:r:

-2.0

(.)

l""- i'--

~ -4.0
!:::i

i'

r-.

(.)

vCC= 5.0V
VMode = Gnd

§;
~ -6.0
z
w
a:
~
w
a:_ -8.0

1n

'""
.::::

(.)

0
..,.

~

0

1

::<

.s
z>-

0.6

0.4

-

'S
0

>

8.0
4.0
12
lout, OUTPUT SINK CURRENT (rnA)

8.0

w

a:
a:
=>

(.)

~

0.4

0..
0..

.1

1.6

-

1

~ !--

!z
w
a:
a:
=>
(.)

i'.... VMode - Vref

A3. :::;;;-

~

Pinl=1.5V Pin 2 = Gnd

V

&:

=>
en
>=>
0..

=>
en

0
(.)

0.2
~C

1

20
30
VCC, SUPPLY VOLTAGE M

1.2

0.8

~

/

/'

i-"'"

II

VCC = 5.0V r-VMode = Gnd
I-TA = l5°C

-_ 0.4
(.)
(.)

0

40

4.0
8.0
12
lout, OUTPUT SINK CURRENT (rnA)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-332

-

f,.---

Z

,I.

measured at Pm 8
A = 25°C

10

16

Figure 12. Supply Current
versus Output Sink Current

1

VMode = VCC
Pins 2, 3 = Gnd

VMode= Gnd
Pins 2, 3 - 1.5 V~

125

VCC =5.0V
VMode = Gnd

Figure 11. Supply Current versus
Supply Voltage

I,

100

0

1n

'""
.::::

2.0
3.0
4.0
5.0
6.0
7.0
Iref, REFERENCE SOURCE CURRENT (rnA)

0.8

---+-

~ 0.3
a:
=>
~
en 0.2
>=>
0..
>=> 0.1
0

(.)

I
1.0

0
25
50
75
TA, AMBIENT TEMPERATURE (OC)

z

I

o

r--

>

.......

.::::"

>'§ -10

VCC = 5.0V
VMode = Gnd

Figure 10. Output Saturation Voltage
versus Output Sink Current

(!)

w

1

-25

-55

~ 0.5
w

-

(!)

-

I - - Vref Min = 2.48 V

Figure 9. Reference Voltage Change
versus Source Current

:[

--

Vref Max - 2.60 V

16

MC34161, MC33161
Figure 13. MC34161 Representative Block Diagram

Vcc

..

-------,

I
I
I
L ______________I
I
Mode Select 0 - 1 - - - - -___------1
I
7
I
.--_L-----,

Vref Q-j-----1
1 I

Output 1

16

1+

:~ 1.27V
j-----

I
I
I
I
1+
I~

I

-::-1

I

-----------1
_
Channel 2 I
I

-=-

1.27V

I

L=----"Gn¥------J

Figure 14. Truth Table
Mode Select
Pin7

Input 1
Pin 2

Output 1
Pin6

Input 2

Output 2

Pin3

PinS

Comments

GND

0
1

0
1

0
1

0
1

Channels 1 & 2: Noninverting

Vref

0
1

0
1

0
1

1
0

Channel 1: Noninverting
Channel 2: Inverting

VCC (>2.0 V)

0
1

1
0

0
1

1
0

Channels 1 & 2: Inverting

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-333

MC34161, MC33161
FUNCTIONAL DESCRIPTION
Introduction

Reference

To be competitive in today's electronic equipment market,
new circuits must be designed to increase system reliability
with minimal incremental cost. The circuit designer can take a
significant step toward attaining these goals by implementing
economical circuitry that continuously monitors critical circuit
voltages and provides a fault signal in the event of an
out-of-tolerance condition. The MC34161, MC33161 series
are universal voltage monitors intended for use in a wide
variety of voltage sensing applications. The main objectives of
this series was to configure a device that can be used in as
many voltage sensing applications as possible while
minimizing cost. The flexibility objective is achieved by the
utilization of a unique Mode Select input that is used in
conjunction with traditional circuit building blocks. The cost
objective is achieved by processing the device on a standard
Bipolar Analog flow, and by limiting the package to eight pins.
The device consists of two comparator channels each with
hysteresis, a mode select input for channel programming, a
pinned out reference, and two open collector outputs. Each
comparator channel can be configured as either inverting or
noninverting by the Mode Select input. This allows a single
device to perform over, under, and window detection of
positive and negative voltages. A detailed description of each
section of the device is given below with the representative
block diagram shown in Figure 13.

The 2.54 V reference is pinned out to provide a means for
the input comparators to sense negative voltages, as well as
a means to program the Mode Select input for window
detection applications. The reference is capable of sourcing in
excess of 2.0 mA output current and has built-in short circuit
protection. The output voltage has a guaranteed tolerance of
±2.4% at room temperature.
The 2.54 V reference is derived by gaining up the internal
1.27 V reference by a factor of two. With a power supply
voltage of 4.0 V, the 2.54 V reference is in full regulation,
allowing the device to accurately sense negative voltages.
Mode Select Circuit
The key feature that allows this device to be flexible is the
Mode Select input. This input allows the user to program each
of the channels for various types of voltage sensing
applications. Figure 14 shows that the Mode Select input has
three defined states. These states determine whether
Channel 1 and/or Channel 2 operate in the inverting or
noninverting mode. The Mode Select thresholds are shown in
Figure 5. The input circuitry forms a tristate switch with
thresholds at 0.63 V and Vref + 0.23 V. The mode select input
current is 10 I1A when connected to the reference output, and
42l1A when connected to a VCC of 5.0 V, refer to Figure 6.
Output Stage

Input Comparators
The input comparators of each channel are identical, each
having an upper threshold voltage of 1.27 V ±2.0% with 25 mV
of hysteresis. The hysteresis is provided to enhance output
switching by preventing oscillations as the comparator
thresholds are crossed. The comparators have an input bias
current of 60 nA at their threshold which approximates a
21.2 Mn resistor to ground. This high impedance minimizes
loading of the external voltage divider for well defined trip
points. For all positive voltage sensing applications, both
comparator channels are fully functional at a VCC of 2.0 V. In
order to provide enhanced device ruggedness for hostile
industrial environments, additional circuitry was designed into
the inputs to prevent device latch-up as well as to suppress
electrostatic discharges (ESD).

The output stage uses a positive feedback base boost
circuit for enhanced sink saturation, while maintaining a
relatively low device standby current. Figure 10 shows that the
sink saturation voltage is about 0.2 V at 8.0 mA over
temperature. By combining the low output saturation
characteristics with low voltage comparator operation, this
device is capable of sensing positive voltages at a VCC of
1.0 V. These characteristics are important in undervoltage
sensing applications where the output must stay in a low state
as VCC approaches ground. Figure 4 shows the Output
Voltage versus Supply Voltage in an undervoltage sensing
application. Note that as VCC drops below the programmed
4.5 V trip pOint, the output stays in a well defined active low
state until VCC drops below 1.0 V.

APPLICATIONS
The following circuit figures illustrate the flexibility of this
device. Included are voltage sensing applications for over,
under, and window detectors, as well as three unique
configurations. Many of the voltage detection circuits are
shown with the open collector outputs of each channel
connected together driving a light emitting diode (LED). This
'ORed' connection is shown for ease of explanation and it is
only required for window detection applications. Note that

many of the voltage detection circuits are shown with a dashed
line output connection. This connection gives the inverse
function of the solid line connection. For example, the solid line
output connection of Figure 15 has the LED 'ON' when input
voltage Vs is above trip voltage V2, for overvoltage detection.
The dashed line output connection has the LED 'ON' when Vs
is below trip voltage V2, for undervoltage detection.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-334

MC34161, MC33161
Figure 15. Dual Postive Overvoltage Detector

..

InputVs

I

Gnd ____________~----------~I~--~

Ii

I

Output
vee - - - - - - - i
Voltage
LED 'ON'
Pins 5, 6 Gnd
'--_ _ _ _--'

The above figure shows the MC34161 configured as a dual positive overvollage detector. As the input voltage increases from ground, the LED will turn 'ON' when
VSI orVS2 exceeds V2. With the dashed line output connection, the circuit becomes a dual positive undervollage detector. As the input vollage decreases from the
peak towards ground, the LED will turn 'ON' when VSI or VS2 falls below VI·
For a specific trip voltage, the required resistor ratio is:

For known resistor values, the vollage trip points are:

Figure 16. Dual Postive Undervoltage Detector

InputVs

Gnd
Output
Vee
Voltage
Pins 5, 6 Gnd

I

LED 'ON'

r--

'----_I

The above figure shows the MC34161 configured as a dual positive undervoltage detector. As the input vollage decreases towards ground, the LED will turn 'ON'
when VSI or VS2 falls below VI. With the dashed line output connection, the circuit becomes a dual positive overvollage detector. As the input vollage increases from
ground, the LED will tum 'ON' when VSI or VS2 exceeds V2·
For a specific trip vollage, the required resistor ratio is:

For known resistor values, the vollage trip points are:

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-335

MC34161, MC33161
Figure 17. Dual Negative Overvoltage Detector

Gnd

Input-Vs

Output Vee
Voltage
Pins 5,6 Gnd

I
I
I
LED 'ON'
r-L---------,I

The above figure shows the MC34161 configured as a dual negative overvoltage detector. As the input voltage increases from ground, the LED will turn 'ON' when
or -v S2 exceeds V2· With the dashed line output connection, the circuit becomes a dual negative undervoltage detector. As the input voltage decreases from
the peak towards ground, the LED will turn 'ON' when -VSI or-VS2 falls below VI'

-vSI

For known resistor values, the voltage trip points are:

For a specific trip voltage, the required resistor ratio is:
Rt
V2 - Vth + V H
R;=Vth-VH-Vref

Figure 18. Dual Negative Undervoltage Detector

R2

Gnd

Rl
-VSl

Input-Vs

R2
Rl

Output Vee
Voltage
Pins 5, 6 Gnd

-VS2

The above figure shows the MC34161 configured as a dual negative undervoltage detector. As the input voltage decreases towards ground, the LED will turn 'ON'
when -VSI or -VS2 falls below VI' With the dashed line output connection, the circuit becomes a dual negative overvoltage detector. As the input voltage increases
from ground. the LED will turn 'ON' when -VSI or-VS2 exceeds V2.
For known resistor values, the voltage trip points are:

For a specific trip voltage, the required resistor ratio is:
Rt
V2 - Vth + VH
R; = Vth - V H - V,ef

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-336

MC34161, MC33161
Figure 19. Postive Voltage Window Detector

I
I
CH2
InputVs

Va

--1=-- [T-VHus2

CHI V2 - - Vl--

VCC

Output

1

--

I 51

I
I

~

Gnd

f

-l----f------'!f1---i--r

I

Gnd

Voltage
Pins 5, 6

\\1

V4--J----

I
I

I

I

I

I

H

I

I

I ~D 'ON' I 'OFF' I

LED 'OFF'

I

.r-T"-"-- ---

I
I
I
I

LED 'ON'

al
1~1.27V

15
_

'=1

L ____ R'-_ ___ ..J

II::t
I

4Q=--=----------.J

The above figure shows the MC34161 configured as a positive voltage window detector. This is accomplished by connecting channell as an undervoltage detector.
and channel 2 as an overvoltage detector. When the input voltage Vs falls out of the window established by VI and V4, the LED will turn 'ON'. As the input voltage
falls within the window, Vs increasing from ground and exceeding V2, orVS decreasing from the peak towards ground and falling below V3, the LED will turn 'OFF'.
With the dashed line output connection. the LED will turn 'ON' when the input voltage Vs is within the window.
For a specific trip voltage, the required resistor ratio is:

For known resistor values, the voltage trip pOints are:
V3 = (Vth2 - V H2)(R 2 :f R3 + 1)

VI = (Vth1 - V Ht )( R f :3 R2 + 1)

V 3(Vth2 - V H2)

R2

- VHf)

R3
Rl

x Vth2 _ 1
V2 x Vthf

R3
Rl

'R,= V 1(Vth1
~

= V4

Rl

= V 3(V f

- V th1 + V H1 )
V 1(Vth2 - V H2 )

= V4 (V2 -

V thf )
V 2 x Vth2

Figure 20. Negative Voltage Window Detector

I
I

\\1

_____L______ _

Gnd ~-----~511--------

CH2 V l Input-Vs

CHI

V2--r

--1------

Va--I--

-

V4
Output

Voltage
Pins 5, 6

Vcc
Gnd

f

VHys2

----

~

T

I

LED 'OFF'

I

I SO
H

I
I

'ON'

I
I
I
I

I

--I-'1iv~-I

.r--r-..r-..,.-- ....

I
I

I

'OFF'

I

al

LED 'ON'
Rl

I

-VS

15

1~1.27V
_
'=1
L ____ R'-_ ___ ..J

II:..J:t

4Q=--=-------

The above figure shows the MC34161 configured as a negative voltage window detector. When the input voltage -vS falls out olthe window established by VIand
V4, the LED will tum ·ON'. As the input voltage falls within the window. -VS increasing from ground and exceeding V2, or -VS decreasing from the peak towards ground
and falling below V3, the LED will turn 'OFF'. With the dashed line output connection, the LED will turn 'ON' when the input voltage -VS is within the window.
For a specific trip voltage, the required resistor ratio is:

For known resistor values. the voltage trip points are:

Rl

Rl (Vth2 - V ref)
VI =
R2 + R3
+ Vth2

R2 + R3

R 1(Vth2 - V H2 - V r• f )
V2 =
R2 + R3
+ Vth2 - VH2

Rl

V r• f

V2 - Vth2 + V H2

R2 + R3 = Vth2

(R 1 + R2)(Vthl - V ref)
V3 =
R3
+Vthl

V4 =

V 1 -Vth2

= Vth2 -

V H2

V ref

R3
Vthf - V r.f
Rl + R2 = V3 - Vth1

(R 1 + R2)(Vth1 - V H1 - V r• f)
R3
+Vthl-VHl

R3
Vthf - VHf - V r.,
Rl + R2 = V4 +V H1
Vth1

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-337

..
I

Figure 19. Postive Voltage Window Detector

J____ -=--.........
--1=-- [T--

V4 _ _
CH2

VH""2

V3

InputVs

V2 - - -

CH1

V1 -

-+---1--

--

---~r1---i--r
I

I

I

I

;. -1- - - - - - ; 1
~ LED 'OFF'

I

I

Gnd - - ' - - - - - - - - ' I - - - \ S S

I

Output
Voltage

Vcc

Pins 5, 6

Gnd

I

I ~D 'ON' I 'OFF'

H

I

R3

I

I LED 'ON'
I

The above figure shows the MC34161 configured as a positive voltage window detector. This is accomplished by connecting channel 1 as an undervoltage detector,
and channel 2 as an overvoltage detector. When the input voltage VS falls out of the window established by V1 and V4, the LED will tum 'ON'. As the input voltage
falls within the window, Vsincreasing from ground and exceeding V2, or VS decreasing from the peak towards ground and failing below V3, the LED will tum 'OFF'.
With the dashed line output connection, the LED will turn 'ON' when the input voltage Vs is within the window.
For known resistor values, the voltage trip points are:

For a specific trip voltage, the required resistor ratio is:
1h2 ~= VVS(V
(V
-

Va = (Vlh2 - V H2)(R 2 :1 Ra + 1)

VI = (Vth1 - V HI )( RI :a R2 + 1)

RI

I

1h1

~= VS(V I

V H2)
V HI )

RI

- V thl + V HI )
V I (Vth2 - V H2)

V4(V2 - V thl )
Rs
"R,= V2 x V th2

R2
V4 x Vth2
-=----1
RI
V2 x Vthl

Figure 20. Negative Voltage Window Detector

_____L ______ _
--l------

Gnd :---------.,,.....-lS, S
...
------CH2 V1Input-Vs

VHys2

V2--:CH1

V3--I--

-

I

----

--r--~-VCC
I
T

I

I

I
I

k

I

I

V4

Output
Voltage
Pins 5, 6

~

Gnd

LED 'OFF'

I

I \0 'ON' I 'OFF' I LED 'ON'

The above figure shows the MC34161 configured as a negative voltage window detector. When the input voltage -VS falls out of the window established by Viand
V4, the LED will turn 'ON'. Astheinputvoltagefallswithinthewindow,-V S increasing from ground and exceeding V2,or-VSdecreasingfrom th epeaktowardsground
and falling below V3, the LED will turn 'OFF'. With the dashed line output connection, the LED will turn 'ON' when the input voltage -VS is within the window.
For known resistor values, the voltage trip pOints are:

For a specific trip voltage, the required resistor ratio is:

R I (V1h2 - Vref)
VI =
R2 + Rs
+ Vth2

RI
R2 + Rs

RI (Vth2 - V H2 - V ref)
V2 =
R2 + Rs
+ Vth2 - VH2

RI

- V ref

V2 - Vth2 + V H2

R2 + Rs = Vth2

(R I + R2)(Vthl - V r• f)
Va =
Rs
+ Vthl

V4 =

VI - Vth2

= Vth2

V H2

V ref

Rs
Vthl - V ref
RI + R2 = Vs - Vthl
Rs

(R I + R2)(Vthl - V HI - Vref)
Rs
+Vthl-VHI

RI + R2

Vthl - V HI - V ref

=

V4 +V HI

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-338

Vthl

MC34161, MC33161
Figure 21. Positive and Negative Overvoltage Detector

InputVS2
Gnd--------------------------~------

R4
-VSI
R3
Output
Voltage
Pins 5, 6

Vee ------------;

R2

LED 'ON'

VS2

Gnd

RI

The above figure shows the MC34161 configured as a positive and negative overvoltage detector. As the input voltage increases from ground, the LED will turn 'ON'
when either -V5 1 exceeds V2, or V52 exceeds V4. With the dashed line output connection, the circuit becomes a positive and negative undervoltage detector. As the
input voltage decreases from the peak towards ground, the LED will turn 'ON' when either V52 falls below V3, or -V51 falls below VI.
For known resistor values, the voltage trip points are:

R3
VI = R.;(V1h1 - Vr.f)

For a specific trip voltage, the required resistor ratio is:

+ Vthl

V3 = (Vth2 -

R3
V2 = R.;(Vlhl - VH1 - Vref) + Vth1 - VH1

V4

VH2)(~ + 1)

= Vth2(:~ + 1)

R3
(VI - Vth1 )
R.; = (Vth1
Vref)

~=~-1
Rl

Vth2

R3
(V2 - Vth1 + VH1 )
R.; = (Vth1 - VH1 - Vr• f)

R2

V3
Vth2 - VH2 - 1

R;' =

Figure 22. Positive and Negative Undervoltage Detector

l
1

\\1

InputVSI

Input-VS2

1

..

VSI

VHys2

----1----.1:.------_ ______~I

I

Output Vee
Voltage
Pins5,6 Gnd

~

....

R.t

LED 'ON'

1

R3

1
1

1
I

R2

1

RI

1

15

31

1~1.27V

_

-=

1

liT
..-

L ____ R="____ ..J
I
4Q=--=-------.....l

-VS2

The above figure shows the MC34161 configured as a positive and negative undervoltage detector. As the input voltage decreases toward ground, the LED will turn
'ON' when either V51 falls below VI, or-V52 falls below V3' With the dashed line output connection, the circuit becomes a positive and negative overvoltage detector.
As the input voltage increases from the ground, the LED will turn 'ON' when either V51 exceeds V2, or -V51 exceeds VI'
For known resistor values, the voltage trip points are:
VI = (Vth1 -

VH1)(~ + 1)

V2 = Vthl(:: + 1)

For a specific trip voltage, the required resistor ratio is:

Rl
V3 = R;(Vth - Vref) + Vth2

~=~-1
R3

Vth1

Rl
V4 = R;(Vth - VH2 - Vref) + Vth2 - VH2

~=

___V_l_ _

R3

Vth1 - VH1

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-339

Rl
V4 + VH2 - Vth2
R2 = Vth2 VH2 Vref

1

Rl
V3 - Vth2
R2 = Vth2 - Vref

MC34161, MC33161
Figure 23. Overvoltage Detector with Audio Alarm

InpulVs

Gnd
Output
Voltage
Pins 5, 6

Vee
Gnd

eT~

RB

The above figure shows the MC34 t 61 configured as an overvoltage detector with an audio alarm. Channell monitors input voltage Vs while channel 2 is connected
as a simple RC oscillator. As the input voltage increases from ground, the output of channell allows the oscillator to turn 'ON' when Vs exceeds V2'
For known resistor values, the voltage trip points are:
Vt

= (Vth

-

For a specific trip voltage, the required resistor ratio is:

VH)(~ + I) V2 = Vth(~ + I)
Figure 24. Microprocessor Reset with Time Delay

\\
InpulVs

I
I
I

Gnd
Output
Voltage
Pin5

vee

Output
Voltage
Pin 6

Vee

I

Gnd

---..I IDLY
I

RESET lED 'ON'

Gnd

RDlY

I

l.-

31

I

1~1.27V

I

15
-=1

L--- 4f-----1

I

The above figure shows the MC34161 configured as a microprocessor reset with a time delay. Channel 2 monitors input voltage Vs while channel t performs the time
delay function. As the input voltage decreases towards ground, the output of channel 2 quickly discharges COLY when VS falls below VI. As the input vollage increases
from ground, the output of channel 2 allows ROLY to charge COLywhen Vs exceeds V2·
For known resistor values, the voltage trip points are:
Vt

= (Vth

-

VH)(~ + I)

V2

= Vth(~ +

For a specific trip voltage, the required resistor ratio is:

I)

For known ROLY COLY values, the reset time delay is:

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-340

MC34161, MC33161
Figure 25. Automatic AC Line Voltage Selector
r-----------------------------------------------.----4~~B+

75k

Input
92 Vacio
276Vac

75k

__

---4i-~

RTN

tOk

tOOk
L6M

1+
to I ~L27V
3

L ___ _

~

15
I
I

____ -.J

4

The above circuit shows the MC34161 configured as an automatic line voltage selector. The IC controls the triac, enabling the circuit to function
as a fullwave voltage doubler or a fullwave bridge. Channell senses the negative half cycles of the AC line voltage. If the line voltage is less
than150 V, the circuit will switch from bridge mode to voltage doubling mode after a presettime delay. The delay is controlled by the 100 kQ resistor
and the 10 flF capacitor. If the line voltage is greater than 150 V, the circuit will immediately return to fullwave bridge mode.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-341

..
I

3.0A

MC34161, MC33161
Figure 26. Step-Down Converter

Vo

Yin
12V

5.0V/250mA

•
O.005T

Test

Conditions

Line Regulation

Yin = 9.5 Vto 24 V, 10 = 250 rnA

Results
40rnV=±O.1%

Load Regulation

Yin = 12 V, 10 = 0.25 rnA to 250 rnA

2.0 rnV = ±0.2%

Output Ripple

Yin = 12 V, 10 = 250 rnA

50 rnVp-p

Efficiency

Vin = 12 V, 10 = 250 rnA

87.8%

The above figure shows the MC34161 configured as a step-down converter. Channell monitors the output voltage while Channel 2
performs the oscillator function. Upon initial power-up. the converters output voltage will be below nominal. and the output of Channel
1 will allow the oscillator to run. The external switch transistor will eventually pump·up the output capacitor until its voltage exceeds the
inputthreshold of Channell. The output of Channell will then switch low and disable the oscillator. The oscillator will commence operation when the output voltage falls below the lower threshold of Channell.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-342

MC34163
MC33163

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Advance Information
Power Switching Regulators

POWER SWITCHING
REGULATORS

The MC34163 series are monolithic power switching regulators that contain the
primary functions required for DC-to-DC converters. This series is specifically
designed to be incorporated in step-up, step-down, and voltage-inverting
applications with a minimum number of external components.
These devices consist of two high gain voltage feedback comparators,
temperature compensated reference, controlled duty cycle oscillator, driver with
bootstrap capability for increased efficiency, and a high current output switch.
Protective features consist of cycle-by-cycle current limiting, and internal thermal
shutdown. Also included is a low voltage indicator output designed to interface
with microprocessor based systems.
These devices are contained in a 16 pin dual-in-line heat tab plastic package
for improved thermal conduction.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

• Output Switch Current in Excess of 3.0 A
• Operation from 2.5 V to 40 V Input
• Low Standby Current
• Precision 2% Reference
• Controlled Duty Cycle Oscillator
• Driver with Bootstrap Capability for Increased Efficiency

PSUFFIX

• Cycle-by-Cycle Current Limiting

PLASTIC PACKAGE
CASE 648C

• Internal Thermal Shutdown Protection
• Low Voltage Indicator Output for Direct Microprocessor Interface
• Heat Tab Power Package

Simplified Block Diagram
PIN CONNECTIONS
Driver
Collector

Ipk Sense

II
I-

VCC

LVI Output
Voltage Feedback 2
Voltage Feedback 1

Collector

Timing
Capacitor

G_

Goof
Voltage
Feedback 1

Gnd

t

Timing Capacitor

VCC
Ipk Sense _'--_--1"""- Driver Collector
(Top View)

Emitter

Voltage
Feedback 2

Bootstrap
Input

LVI Output

(Bottom View)

ORDERING INFORMATION
Temperature
Range

Package

MC34163P

0° to +70°C

16 Plastic DIP

MC33163P

- 40° to + 85°C

16 Plastic DIP

Device

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-343

MC34163, MC33163
MAXIMUM RATINGS
Rating
Power Supply Voltage

lEI

Symbol

Value

Unit
V
V

VCC

40

Switch Collector Voltage Range

VC(switch)

-1.0to+40

Switch Emitter Voltage Range

VE(switch)

- 2.0 to VC(switch)

V
V
A

Switch Collector to Emitter Voltage

VCE(switch)

40

Switch Current (Note 1)

ISW

3.4

Driver Collector Voltage

VC(driver)

-1.0 to +40

V

Driver Collector Current

IC(driver)

150

rnA

Bootstrap Input Current Range (Note 1)

IBS

-100 to +100

rnA

Vlpk(sense)

(VCC-7.0) to (VCC+ 1.0)

V

Vin

-1.0to+7.0

V

Low Voltage Indicator Output Voltage Range

VC(LVI)

-1.0to+40

V

Low Voltage Indicator Output Sink Current

IC(LVI)

10

rnA

Po
RaJA
RaJC

1.56
80
15

W
°CIW
°CIW

Operating Junction Temperature

TJ

+150

°C

Operating Ambient Temperature (Note 3)
MC34163
MC33163

TA

Current Sense Input Voltage Range
Feedback and TIming Capacitor Input Voltage Range

Power Dissipation and Thermal Characteristics
P Suffix Package Case 648C
Maximum Power Dissipation @ TA = 25°C
Thermal Resistance Junction-to-Air
Thermal Resistance Junction-to-Case
(Pins 4. 5. 12. 13)

Storage Temperature Range

°C
o to +70
-40 to + 85

Tstg

-65to+150

°C

ELECTRICAL CHARACTERISTICS (VCC = 15 V. Pin 16 = VCC. CT = 620 pF. lor typical values TA = 25°C. lor minImax values TA is
the operating ambient temperature range that applies (Note 3). unless otherwise noted.)
Characteristic

Symbol

Min

Typ

Max

Unit

46
45

50

-

54
55

Ichg

-

225

-

IlA

Idischg

-

25

-

IlA

Ichglldischg

8.0

9.0

10

-

Sawtooth Peak Voltage

VOSC(P)

-

1.25

-

V

Sawtooth Valley Voltage

VOSC(V)

-

0.55

-

V

4.9

5.05
0.008

OSCILLATOR
Frequency
TA=25°C
Total Variation over VCC = 2.5 V to 40 V. and Temperature

kHz

IOSC

Charge Current
Discharge Current
Charge to Discharge Current Ratio

FEEDBACK COMPARATOR 1
Threshold Voltage
TA = 25°C
Line Regulation (VCC = 2.5 V to 40 V, TA = 25°C)
Total Variation over Line. and Temperature

Vth(FB1)

Input Bias Current (VFB1 = 5.05 V)

IIB(FB1)

4.85

-

%N

-

5.2
0.03
5.25

V

100

200

I1A

1.25
0.008

1.275
0.03
1.287

%N

0.4

IlA

V

FEEDBACK COMPARATOR 2
Threshold Voltage
TA = 25°C
Line Regulation (VCC = 2.5 V to 40 V. TA = 25°C)
Total Variation over Line. and Temperature

Vth(FB2)
1.225

-

Input Bias Current (VFB2 = 1.25 V)

IIB(FB2)

1.213

-

-0.4

0

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-344

V
V

MC34163, MC33163
ELECTRICAL CHARACTERISTICS (VCC

= 15 V.

Pin 16

= Vcc. CT = 620 pF. for typical values TA = 25"C. for minimax values TA is the

operating ambient temperature range that applies (Note 3). unless otherwise noted.)
Characteristic

Min

Typ

Max

230

250
-

270

-

1.0

20

-

-

0.6
1.0

1.0
1.4

0.02

100

IlA

Isource(DRV)

0.5

2.0

4.0

mA

Vz

VCC + 6.0

VCC + 7.0

VCC + 9.0

V

Vth

1.07

1.125

1.18

Symbol

Unit

CURRENT LIMIT COMPARATOR
Threshold Voltage
TA = 25"C
Total Variation over VCC

mV

Vth(lpksense)

= 2.5 V to 40 V. and Temperature

Input Bias Current (Vlpk(sense)

= 15 V)

IIB(sense)

IlA

DRIVER AND OUTPUT SWITCH (Note 2)
Sink Saturation Voltage (lsw = 2.5 A. Pins 14. 15 grounded)
Non-Darlington Connection (RPin 9 = 110 Q to VCC. ISWIlDRV
Darlington Connection (Pins 9. 10. 11 connected)
Collector Oft-State Leakage Current (VCE

V

VCE(sat)

= 20)

= 40 V)

IC(oft)

= VCC + 5.0 V)
Bootstrap Input Zener Clamp Voltage (IZ = 25 mAl

Bootstrap Input Current Source (VBS

LOW VOLTAGE INDICATOR
Input Threshold (VFB2 Increasing)

VOL(LVI)

0.15

0.4

V

IOH

-

0.01

5.0

IlA

VH

= 2.0 mAl
Output Oft-State Leakage Current (VOH = 15 V)

Output Sink Saturation Voltage (lsink

V

-

Input Hysteresis (VFB2 Decreasing)

-

15

mV

TOTAL DEVICE
Standby Supply Current (VCC = 2.5 V to 40 V. Pin 8
Pins 6. 14. 15 = Gnd. remaining pins open)

= VCC.

NOTES: 1. Maximum package power dissipation limits must be observed.
2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
3. Tlow = O"C for MC34163
Thigh = + 70"C for MC34163
= - 40"C for MC33163
= + 85"C for MC33163

2:

Figure 1. Output Switch On-Off Time
versus Oscillator Timing Capacitor
100

w
::;;

;::
u..
u..

o
:2:
o

::c
~
§

en

10

VCC-15V
TA 25"C
1}ton. ROT - =
2) ton. ROT = 20 k
3) ton. loft. ROT = 10k
4) toft. ROT = 20 k
5)toff. R r-'Y~

V

0-

L

f-

:::>

o

15
0;-

Ji

",

1.0 .../
0.1

w
z

(!J

V

./ " ,

",

",

",'"

./

2.

Oscillator Frequency Change
versus Temperature

2.0

I
.1
VCC=15V
CT=620pF

«
::c
(.)

11
~

",

./

V

>(.)
z
w

./

k-'"

L

""'4
Y
.Y

/'

:::>
0

../

121

w

L

u.. -2.0

0:

" "-

/

0:

3

f-

:::>

Figure

~

0

..... r--..

5 -4.0

V

-'

t5
en
0

6
en
0-6.0

II
1.0

10

:;j

- 55

-~

0

~

~

~

TA. AMBIENT TEMPERATURE ("C)

Cr. OSCILLATOR TIMING CAPACITOR (nF)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-345

-

'"I""'
100

125

MC34163, MC33163
Figure 3. Feedback Comparator 1 Input Bias
Current versus Temperature
140

•

:;c-

aIW

~

100

3::

80

~

-55

-~

~

0

............
..........
~

~

=>

~

'"

..........

2.8

~
a::

a
~
3::

i'...

2.4

"-

2.0

1~

-~

i8

1220

It
.;

w
~

g

-

0

z

~

~

-0.8

~

~
~

'" ""- ""-

0
~
~
75
TA, AMBIENT TEMPERATURE (OC)

...........

~
b
51

11.6
w

-

-

~

--- --

0
~
50
75
TA, AMBIENT TEMPERATURE (OC)

100

125

7.6
IZ=25 1mA
7.4

7.2

7.0

6.8

./

/'

-~

./

./

./

./

0
~
50
~
TA, AMBIENT TEMPERATURE (OC)

./

100

1~

1.2 ...--,...--,...----;,...----;,...----;---,---,---,

EmiHer Sourcing Current to Gnd
Pins 7, 8, 10, 11 = VCC
Pins4,5, 12, 13=Gnd
TA = ~OC, (Note 2)

Non-llootslrapped, Pin 16 = Vp<:

o

VIIIMin=l~mV

Figure 8. Output Swhch Sink Saturation
versus Collector Current

Darlingt~n ConIi~uration I

I

.J?

-2.0

I

-

I

U)

/

Figure 6. Bootstrap Input Zener Clamp
Yoltage versus Temperature

-55

125

I

VIII lYP = 12~ mV

I

3::

100

BooIsIrapped, Pin 16 = Vcc + 5.0 V

=> -1.2
0

1

V

ffi

I'..

w
~

-55

VIII Max = 1275 mV

(,)

vi-r/'
iV

Q -0.4

---

...

Figure 7. Output Switch Source Saturetlon
versus Emitter Current
~

....--

~

I
VCC=I,5v
Pin 16=VCC+5.OV

"'" "

1240

-

VCC=15V

N',2OO

roo

Figure 5. Bootstrap Input Current
Source versus Temperature

~

IS
.."

TA, AMBIENT TEMPERATURE (OC)

1

1260

i!:
N

!!!

60

1300

9 1280

i

"' "

a>

...5

!:§
o

VCC=15V
VFBl = 5.05 V -

""

120

Z

a::
a::
=>
(,)

!!!

~

Figure 4. Feedback Comparator 2 Threshold
Yoltage versus Temperature

~

I
0.8
1.6
2.4
IE, EMITTER CURRENT (A)

-

I---.
0.8
1.6
2.4
IC, COUEcrOR CURRENT (A)

3.2

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-346

3.2

MC34163, MC33163
Figure 9. Output Switch Negative Emitter
Voltage versus Temperature

-- - -

I - nd/

Ic-1OjlJ\

~ -0.4

w

(!J

!:i0
>

--- --

t-- 0.8

a:
w

1=

~

~

u.:w

~

> -1.6

- 2.0
- 55

f.---

~ 0.4

254

~

>

:::>

252

..,/"

o

:c

S3
a:

250

/

:c
f-

t

en

;.,,0.1

100

~

Co

-'"

:>

......

/
246
- 55

/

~
...J

125

>

0

=<
~

. /V

6.0
2.0
4.0
Isink, OUTPUT SINK CURRENT (mA)

1.6

I\..

f-

z
w 1.4

a:
a:

:::>

"-"-

<.:>

en 1.2

/"

«
co

:::>
0..

~

<.:>

-~

0
~
W
~
TA, AMBIENT TEMPERATURE (0G)

1.0

"

"'" I'-..

100

0.6
- 55

125

-25

0
25
50
75
TA, AMBIENT TEMPERATURE (0G)

.s 6.4 i"-.....
~
a:
a:

w

13

4.0

::;

~115

o

20

30

~

5.6

:::>

en

c:, 4.8

~

I

~

<.:>

........... 1-....

..........

I

10

. . . i'-..

0..
0..

Pins 7, 8, 16 ~ Vee
Pins 4, 6, 14 ~ Gnd
Remaining Pins Open
TA~2re

j

12~

Vee
V
Pins 7, 8, 16 ~ Vee
Pins 4, 6, 14 ~ Gnd
Remaining Pins Open

=<

2.0

100

Figure 14. Standby Supply Current
versus Temperature

6.0

o

--

.........
.............

7.2

0..
0..

0<.:>

1-

fQ

:::>

en

"-

~

W

:::>

~ee ~ 151v

Vlpk (Sense) ~ 15 V -

~
lii 0.8

a:
a:

::;

.

f-

/

8.0

Figure 12. Current Limit Comparator Input Bias
Current versus Temperature

8.0

fZ

V

o 0V

Figure 13. Standby Supply Current
versus Supply Voltage

=<
.s

L..--"

l....---

0..

V

248

..... .....,..

f-

0
~
w
~
TA, AMBIENT TEMPERATURE (0G)

9

L

~
en

:::>

Pins 7, 8, 9,10, 16 ~ Vee Pins 4, 6 ~ Gnd
Pin 14 Driven Negative

..

25°C

./

o

(!J

!:io

~

~ 0.2

Vee~15V

w

~ 15 V I

o
~
a: 0.3

Figure 11. Current Limit Comparator Threshold
Voltage versus Temperature

i

Vee
TA

!:i
z

Vee~15V

-~

0.5

(!J

le~10m~

-1.2

Figure 10. Low Voltage Indicator Output Sink
Saturation Voltage versus Sink Current

40

Vee, SUPPLY VOLTAGE M

4.0
- 55

-25

0
25
50
75
TA, AMBIENT TEMPERATURE (0G)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-347

100

12~

MC34163, MC33163
~

Figure 15. Minimum Operating Supply
Voltage versus Temperature

•

roo-

.............

.,............,
PIn 16=Vee

-~

-

Pins 7.8 = Vee
Pins 4.14 = Gnd
Pin9=1.ok01015V
Pinl0=loo01015V

.............
Pin 16 Open

-

a:

;;;: 100

Cr=&20pF

f'.....

§

~

0

100

3.0~

~

2.0

40

I

20

1.0

~

125

10

20
30
l, LENGTH OF COPPER (mm)

40

o

50

Figure 17. Representative Block Diagram

Ipk Sense
RSC
Veeo---+----i

Tuni~q;:

l!

ROr~

nnr
Voltage Feedback 2

~

i;.Y""
(Bottom View)

Figure 18. Typical Operating Waveforms

1

ComparelOr Output

o

____~'--_-'~'--_L

1.25V

Tnnilg Cepacitor Cy

0.55 V
t

0scIe Output 1

o

n

-l I-- 91 --l

n

~--~

n

n

n'-----

'----~ '----~

On
Output Switch

011
Nominal Output
Voltage Level

Output Voltage

~~~~
I-

Start-Up

~

~

:::;;

TA. AMBIENT TEMPERATURE (OC)

Shutd~

~

~

~ 60

~

r--

~

50

4.0

~

..............

....

z
80

Z

...............

---

5.0 ;[

~

...............

"""'-

Figure 16. Thermal Resistance and Maximum
Power Dissipation versus P.C.B. Copper Length

.2...

-I-

Quiescent Operation

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-348

-I

= Sink Only

Poshive True Logic

~

~

MC34163, MC33163
INTRODUCTION
The MC34163 series are monolithic power switching
regulators optimized for DC-to-DC converter applications.
The combination of features in this series enables the system
designer to directly implement step-up, step-down, and
voltage-inverting converters with a minimum number of
external components. Potential applications include cost
sensitive consumer products as well as equipment for
the automotive, computer, and industrial markets. A
Representative Block Diagram is shown in Figure 17.
Operating Description
The MC34163 operates as a fixed on-time, variable
off-time voltage mode ripple regulator. In general, this mode
of operation is sornewhat analogous to a capacitor charge
pump and does not require dominant pole loop
compensation for converter stability. The Typical Operating
Waveforms are shown in Figure 18. The output voltage
waveform shown is for a step-down converter with the ripple
and phasing exaggerated for clarity. During initial converter
start-up, the feedback comparator senses that the output
voltage level is below nominal. This causes the output switch
to turn on and off at a frequency and duty cycle controlled
by the oscillator, thus pumping up the output filter capacitor.
When the output voltage level reaches nominal, the feedback
comparator sets the latch, immediately terminating switch
conduction. The feedback comparator will inhibit the switch
until the load current causes the output voltage to fall below
nominal. Under these conditions, output switch conduction
can be inhibited for a partial oscillator cycle, a partial cycle
plus a complete cycle, multiple cycles, or a partial cycle plus
multiple cycles.
Oscillator
The oscillator frequency and on-time of the output switch
are programmed by the value selected for timing capacitor
CT. Capacitor CT is charged and discharged by a 9 to 1
ratio internal current source and sink, generating a negative
going sawtooth waveform at Pin 6. As CT charges, an
internal pulse is generated at the oscillator output. This
pulse is connected to the NOR gate center input,
preventing output switch conduction, and to the AND gate
upper input, allowing the latch to be reset if the comparator
output is low. Thus, the output switch is always disabled
during ramp-up and can be enabled by the comparator
output only at the start of ramp-down. The oscillator peak
and valley thresholds are 1.25 V and 0.55 V, respectively,
with a charge current of 225 ~A and a discharge current of
25 ~A, yielding a maximum on-time duty cycle of 90%. A
reduction of the maximum duty cycle may be required for
specific converter configurations. This can be accomplished
with the addition of an external dead-time resistor (RDT)
placed across CT. The resistor increases the discharge

current which reduces the on-time of the output switch. A
graph of the Output Switch On-Off Time versus Oscillator
Timing Capacitance for various values of RDT is shown in
Figure 1. Note that the maximum output duty cycle, tonlton
+ toff, remains constant for values of CT greater than 0.2 nF.
The converter output can be inhibited by clamping CT to
ground with an external NPN small-signal transistor.
Feedback and Low Voltage Indicator Comparators
Output voltage control is established by the Feedback
comparator. The inverting input is internally biased at 1.25 V
and is not pinned out. The converter output voltage is typically
divided down with two external resistors and monitored by the
high impedance noninverting input at Pin 2. The maximum
input bias current is ±0.4 ~A, which can cause an output
voltage error that is equal to the product of the input bias
current and the upper divider resistance value. For
applications that require 5.0 V, the converter output can be
directly connected to the non inverting input at Pin 3. The high
impedance input, Pin 2, must be grounded to prevent noise
pickup. The internal resistor divider is selfor a nominal voltage
of 5.05 V. The additional 50 mV compensates for a 1.0%
voltage drop in the cable and connector from the converter
output to the load. The Feedback comparator's output state
is controlled by the highest voltage applied to either of the two
noninverting inputs.
The Low Voltage Indicator (LVI) comparator is designed for
use as a reset controller in microprocessor-based systems.
The inverting input is internally biased at 1.125 V, which sets
the non inverting input thresholds to 90% of nominal. The LVI
comparator has 15 mV of hysteresis to prevent erratic reset
operation. The Open Collector output is capable of sinking in
excess of 6.0 mA (see Figure 10). An external resistor (RLVI)
and capacitor (CDLY) can be used to program a reset delay
time (tDLY) by the formula shown below, where Vth(MPU) is the
microprocessor reset input threshold. Refer to Figure 19.
tDLY = RLVI CDLY In (

Current Limit Comparator,
Latch and Thermal Shutdown
With a voltage mode ripple converter operating under
normal conditions, output switch conduction is initiated by
the oscillator and terminated by the Voltage Feedback
comparator. Abnormal operating conditions occur when the
converter output is overloaded or when feedback voltage
sensing is lost. Under these conditions, the Current Limit
comparator will protect the Output Switch.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-349

1)
1- Vth(MPU)
Vout

MC34163, MC33163
The switch current is converted to a voltage by inserting
a fractional ohm resistor, RSC, in series with VCC and output
switch transistor Q2. The voltage drop across RSC is
monitored by the Current Sense comparator. If the voltage
drop exceeds 250 mV with respect to VCC, the comparator
will set the latch and terminate output switch conduction on
a cycle-by-cycle basis. This Comparator/Latch configuration
ensures that the Output Switch has only a single on-time
during a given oscillator cycle. The calculation for a value
of RSC is:
RSC =

0.25V
Ipk(switch)

Figures 11 and 12 show that the Current Sense
comparator threshold is tightly controlled over temperature
and has a typical input bias current of 1.0 ~A. The
propagation delay from the comparator input to the Output
Switch is typically 200 ns. The parasitic inductance
associated with RSC and the circuit layout should be
minimized. This will prevent unwanted voltage spikes that
may falsely trip the Current Limit comparator.
Internal thermal shutdown circuitry is provided to protect
the IC in the event that the maximum junction temperature
is exceeded. When activated, typically at 170°C, the Latch
is forced into the "Set" state, disabling the Output Switch.
This feature is provided to prevent catastrophic failures from
accidental device overheating. It is not intended to be used
as a replacement for proper heatsinking.
Driver and Output Switch
To aid in system deSign flexibility and conversion
efficiency, the driver current source and collector, and output
switch collector and emitter are pinned out separately. This
allows the designer the option of driving the output switch
into saturation with a selected force gain or driving it near
saturation when connected as a Darlington. The output
switch has a typical current gain of 70 at 2.5 A and is
designed to switch a maximum of 40 V collector to emitter,
with up to 3.4 A peak collector current. The minimum value
for RSC is:
RSC(min) =

g:~~v

=

0.0735 Q

should not be used. If the emitter is allowed to go sufficiently
negative, collector current will flow, causing additional device
heating and reduced conversion efficiency.
Figure 9 shows that by clamping the emitter to 0.5 V, the
collector current will be in the range 10 J.lA over temperature.
A 1N5822 or equivalent Schottky barrier rectifier is
recommended to fulfill these requirements.
A bootstrap input is provided to reduce the output switch
saturation voltage in step-down and vOltage-inverting
converter applications. This input is connected through a
series resistor and capacitor to the switch emitter and is used
to raise the internal 2.0 mA bias current source above VCC.
An internal zener limits the bootstrap input voltage to VCC
+ 7.0 V. The capacitor's equivalent series resistance must
limit the zener current to less than 100 mAo An additional
series resistor may be required when using tantalum or other
low ESR capacitors. The equation below is used to calculate
a minimum value bootstrap capacitor based on a minimum
zener voltage and an upper limit current source.
CB(min)

=

~t
I ~V

=

4.0 mA

ton
4.0V

=

0.001l0n

Parametric operation of the MC34163 is guaranteed over
a supply voltage range of 2.5 V to 40 V. When operating
below 3.0 V, the Bootstrap Input should be connected to VCC.
Figure 15 shows that functional operation down to 1.7 V at
room temperature is possible.
Package
The MC34163 is contained in a heatsinkable 16-lead
plastic dual-in-line package in which the die is mounted on
a special heat tab copper alloy lead frame. This tab consists
of the four center ground pins that are specifically designed
to improve thermal conduction from the die to the circuit
board. Figure 16 shows a simple and effective method of
utilizing the printed circuit board medium as a heat
dissipater by soldering these pins to an adequate area of
copper foil. This permits the use of standard layout and
mounting practices while having the ability to halve the
junction to air thermal resistance. This example is for a
symmetrical layout on a single-sided board with two ounce
per square foot of copper.

APPLICATIONS
When configured for step-down or voltage-inverting
applications, as in Figures 19 and 23, the inductor will forward
bias the output rectifier when the switch turns off. Rectifiers
with a high forward voltage drop or long turn-on delay time

The following converter applications show the simplicity
and flexibility of this circuit architecture. Three main
converter topologies are demonstrated with actual test data
shown below each of the circuit diagrams.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-350

MC34163, MC33163
Figure 19. Step-Down Converter

Low Vohage
Indicator Output o-+- 5.05V/3.0

'f
Test

Condition

Line Regulation

Vin = 8.0 V to 24 V, 10 = 3.0 A

eo

A

Results
6.0 mV = ± 0.06%

Load Regulation

Vin = 12 V, 10 = 0.6 A to 3.0 A

2.0 mV = ± 0.02%

Output Ripple

Vin = 12 V, 10 = 3.0 A

36mVp·p

Short Circuit Current

Vin = 12 V, RL=O.1

Efficiency, Without Bootstrap

Vin=12V,10=3.0A

76.7%

Efficiency, With Bootstrap

Vin = 12 V, 10 = 3.0 A

81.2%

n

3.3A

Figure 20. External Current Boost Connections for Ipk(switch) Greater Than 3.4 A
Figure 2OA. External NPN Switch

Figure 20B. External PNP Saturated Switch

(BOHam View)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-351

MC34163, MC33163
Figure 21. Step-Up Converter
L

II 180!lH
Coilcraft
L0451-A

lN5822

Low Voltage
Indicator D-h---i
Output

Rl

~~~~==:]==~~--'=====~-J...--=----o
::r::+ Co
28V/600mA
7

Test
Line Regulation

Vout

(Bottom View)

2.2k

330

Results

Condition
Yin

= 9.0 V to 16 V, 10 = 0.6 A

30 mV

= ± 0.05%
= ± 0.09%

Load Regulation

Yin

= 12 V, 10 = 0.1 A to 0.6 A

50 mV

Output Ripple

Yin

= 12 V, 10 = 0.6 A

140 mVp-p

Efficiency

Yin

= 12 V, 10 = 0.6 A

88.1%

Figure 22. External Current Boost Connections for Ipk(switch) Greater Than 3.4 A
Figure 22A. External NPN Switch

Figure 22B. External PNP Saturated Switch

(Bottom View)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-352

MC34163, MC33163
Figure 23. Voltage-Inverting Converter

CT
470pF

R2
B.2k

HMr----

V

I-

::::>

c- 4.0
I-

V

V

/'

V

10

/'
2:

!:i
g

V

6.0

f'"

I-

::::>

c- 4.0
I-

V

/'

V

V

::::>
0

-? 2.0
o .A
o

r--

w

CJ

/'

::::>
0

8.0

RL = 82 k to Vin
TA=25°C

-? 2.0
2.0

4.0

6.0

8.0

o .A
o

10

2.0

4.0

6.0

Vin, INPUT VOLTAGE M

Vin, INPUT VOLTAGE M

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA

3-358

8.0

10

MC34164, MC33164
Figure 3. MC3X164-3 Reset Output
Voltage versus Input Voltage

Figure 4. MC3X164-5 Reset Output
Voltage versus Input Voltage

5.0
~
w

5.0

4.0

!:§
§;

!:§

3.0

6

3.0

a

>

l-

2.0

=>
a.
l=>

2.0

>

1.0

a
6

a

>

..

C!l

l-

=>
a.
l=>

4.0

~
w

C!l

1.0

I

RL = 82 k to Vin
TA=25°C

RL=82ktoVin _
TA = 25°C

o

2.62

2.66

2.70

2.74

o

2.78

4.22

4.26

Vin, INPUT VOLTAGE M

Figure 5. MC3X164-3 Comparator Threshold
Voltage versus Temperature
2.76
~
w

C!l

;:!i
:...J

2.72

a

>

9a

2.68

:J:

--

~
w

2.60
- 50

-

o

- 25

25

50

75

<-'"
I-

40

w

30

a:

:I:

1-.S

4.24

-

r- Lower Threshold
Low State Output

>

100

4.20
-50

125

o

-25

25

50

--

75

.........

100

125

TA, AMBIENT TEMPERATURE (OCI

TA, AMBIENTTEMPERATURE (0C)

Figure 7. MC3X164-31nput Current
versus Input Voltage

Figure 8. MC3X164-51nput Current
versus Input Voltage

TA = 25°~ "-

V
/'V
~V V

Z

=>

'-'

50

V

V /"

<-'"
!z
w

[Y

~

a:
a:

(/L

~

=>
a.

A=70°C

_V

2.0

4.0

.S

6.0

./

../

20

»'=0°

~

./
8.0

10

Vin, INPUT VOLTAGE M

10

o
o

-

I'-"

../

L.o/ ~
~~

2.0

4.0

~,.,....

"/ .........

:....-::' /

"

6.0

Vin, INPUT VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-359

//

TA=25°C "-

30

=>

I-

~

10

40

'-'

A = O°C .....:: V ....... i-"'""

20

o
o

W

-

LowerT reshold
Low State Output

50

.S

4.28

Iupper Threshold l
High State Output

-

=>
a.

§;
9
a

a:

I-

4.32

:J:

:J:

a:
a:

C!l

t3

~

2.64

4.31

4.36

T~resholdi

iUPper
High State Output

W

<=

4.34

Figure 6. MC3X164-5 Comparator Threshold
Voltage versus Temperature



!;:c

'"::::>
150

I-

..:.0

Figure 10. MC3X164-5 Reset Output
Saturation versus Sink Current

2.0 - TA=25°(

'I "

z
0

I'TA=25°C

1.0

'"::::>

.A ~

!(((

o

I-

::::>
0

..:.0

TA = 70°C

4.0

<"

I-

z
w

24

-

8.0

12

16

P'

TA=O~~ V

o~
o

20

~

,..

1((/I'1A = 70°C
4.0

8.0

12

16

Figure 12. Reset Delay Time
(MC3X164-5 Shown)

/

lov

Vin
j - TA = 25°C

I
90%

/

16

5.0V
4.0V

/

~

/

a:

8.0

Ii.

o
o

TA= O°C

Figure 11. Clamp Diode Forward Current
versus Voltage

a:

12

1.0

\l

l/

ISink. SINK CURRENT (rnA)

a:
a:
Q

~fI'

VSink. SINK CURRENT (rnA)

::::>
0

2.0

>

32

.§.

TA=70°C
TA = 25°C

g:

~~

o

~

!;:c

:')( ~

~~

3.0

::::>

TA=IO°C

TA=O~~ P'"

>

I - Vln,:Res)= 4 V

~

./'
0.4

0.8

1.2

1.6

5.0 IlS/DIV

VF, FORWARD VOLTAGE M

Figure 13. Low Voltage Microprocessor Reset

+
Power
Supply

R

2 (2)

r
I
I
I
I
I
I
IL

--------.,

Reset
Microprocessor
Circuh
It (1)
I
CDLY
-=I
I
I
_ _ _ _ _ _ _ _ _ .JI
tDLY = RCDlY In ( 1 _
3(4)
Vm

..L
I

Vt~(MPU»)

A time delayed reset can be accomplished with the addition of CDlY. For systems with
extremely fast power supply rise times « 500 ns) it is recommended that the RCDlYtime
constant be greater than 5.0 I!s. Vth(MPUl is the microprocessor reset input threshold.

MOTOROLA LlNEARIINTERFACE ICs DEVICE DATA
3-360

20

MC34164, MC33164
Figure 14. Low Voltage Microprocessor Reset With Additional Hysteresis
(MC3X164-5 Shown)
Test Data

+
Power
Supply

lin.

r

I +-----_---1<. .H - 0 -......- - - - !
I
Reset
I
I
I
4.3 RH
I
VH ~ - - RL
IL _ _ _ _ _ _ _ _ _ ..l
MC3X164·5

Microprocessor
Circuit

+ 0.06

<'>Vth(lower) ~ 10 RH x 10 - 6

3 (4)

where: RH ,;; 1.0 kO
43 kQ " RL " 4.3 kO

VH
(mV)

<,>Vth
(mV)

RH
(0)

RL
(kO)

60
103

0
1.0

0
100

43

123
160

1.0
1.0

100
100

6.8
4.3

155
199

2.2
2.2

220
220

10
6.8

280
262

2.2
4.7

220
470

4.3
10

306
357

4.7
4.7

470
470

8.2
6.8

421

4.7
4.7

470
470

5.6

530

10

4.3

Comparator hysteresis can be increased with the addition of resistor RH. The hysteresis equation has been simplified and does not account
forthe change of input current lin as Vin crosses the comparator threshold (Figure 8). An increase of the lower threshold <'>Vth(lower) will be
observed due to lin which is typically 10 IlA at 4.3 V. The equations are accurate to ±1 0% with RH less than 1.0 kO and RL between 4.3 kO
and 43 kO.

Figure 15. Voltage Monitor

Figure 16. Solar Powered Battery Charger
+,--~-------j--t-C>---'~~
I
1 (I)
I
I
I
I
IL _ _ _ _ _ _ _ _ _ ..l

~------~~~--~

Solar
Cells
_ _ _ _ _ _ _ _ _ ..l

3 (4)

3 (4)

Figure 17. MOSFET Low Voltage Gate Drive Protection Using the MC3X164·5
VCC

J

RL

A _o-_....,.____---"\2M70~--....,.......,1.MTP3055EL

4.3V _

2 (2)

r

I
I
I
I
I
I
IL

~------~~~~

_ _ _ _ _ _ _ _ _ ..l

Overheating of the logic level power MOSFET due to
insufficient gate voltage can be prevented with the
above circuit. When the input signal is below the 4.3
volt threshold of the MC3X164-5, its output grounds
the gate of the L2 MOSFET.

3 (4) MC3X164·5

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-361

II

MC34166
MC33166

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

•

Advance Information
Power Switching Regulator

POWER SWITCHING
REGULATOR

The MC34166, MC33166 series are high performance fixed frequency power
switching regulators that contain the primary functions required for DC-to-DC
converters. This series was specifically designed to be incorporated in stepdown and voltage-inverting configurations with a minimum number of external
components and can also be used cost effectively in step-up applications.
These devices consist of an internal temperature compensated reference,
fixed frequency oscillator with on-chip timing components, latching pulse width
modulator for single pulse metering, high gain error amplifier, and a high current
output switch.
Protective features consist of cycle-by-cycle current limiting, undervoltage
lockout, and thermal shutdown. Also included is a low power standby mode that
reduces power supply current to 36 /.LA.

SILICON MONOLITHIC
INTEGRATED CIRCUIT

• Output Switch Current in Excess of 3.0 A
• Fixed Frequency Oscillator (72 kHz) with On-Chip Timing
• Provides 5.05 V Output Without External Resistor Divider
TSUFFIX
PLASTIC PACKAGE
CASE 314D

• Precision 2.0% Reference
• 0% to 95% Output Duty Cycle
• Cycle-by-Cycle Current Limiting
• Undervoltage Lockout with Hysteresis
• Internal Thermal Shutdown
• Operation from 7.5 V to 40 V
• Standby Mode Reduces Power Supply Current to 36 /.LA
• Economical Five Lead TO-220 Package

Simplified Block Diagram
(Step Down Application)

-------------------1
IUrnit

+

4
+i--1'-t-O--+

PIN CONNECTIONS
Pin 1. Voltage Feedback Input
2. Switch Output
3. Ground
4. Input VoltageNcc
5. Compensation/Standby
(Heatsink surface connected to Pin 3)

I---l...()........~+-DVO

L-fl-------3

1

5

______ J

J 5.05V/3.0A

~-~f--~-~

ORDERING INFORMATION
Device

Temperature
Range

Package

MC34166T

0' to + 70'C

Plastic Power

MC33166T

- 40' to + 85'C

Plastic Power

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-362

MC34166, MC33166
MAXIMUM RATINGS
Unit

Symbol

Value

VCC

40

V

VO(switch)

-1.5 to + Vin

V

VFB. VComp

-1.0 to + 7.0

V

PD
8JC
PD
8JA

34.7
2.3
1.9
65

Operating Junction Temperature

TJ

+150

Operating Ambient Temperature (Note 3)
MC34166
MC33166

TA

Rating
Power Supply Input Voltage
Switch Output Voltage Range
Voltage Feedback and Compensation Input Voltage Range
Power Dissipation and Thermal Characteristics (Note 1)
Maximum Power Dissipation @TC=70'C
Thermal Resistance Junction to Case
Maximum Power Dissipation@TA=25'C
Thermal Resistance Junction-to-Air

..

W
'CIW

W

I

'CIW

'c

o to + 70

'C

-40 to + 85

Storage Temperature Range

-65 to +150

Tstg

ELECTRICAL CHARACTERISTICS (VCC = 12 V. for typical values TA = 25'C. for

'C

minimax values TA is the operating ambient

temperature range that applies [Note 2. 3]. unless otherwise noted.)
Characteristic

Symbol

Min

Typ

Max

4.95
4.85

5.05

5.15
5.2

Unit

OSCILLATOR
Frequency (VCC = 7.5 V to 40 V)
TA = 25'C
TA = Tlow to Thi h
ERROR AMPLIFIER
Voltage Feedback Input Threshold
TA=25'C
TA = Tlow to Thigh

VFB(th)

Line Regulation (VCC = 7.5 V to 40 V. TA = 25'C)

Regline

V

-

liB

-

Power Supply Rejection Ratio (VCC = 10 V to 20 V. f = 120 Hz)

PSRR

60

80

-

Output Voltage Swing
High State (lSource = 7511A. VFB = 4.5 V)
Low State (ISink = 0.4 mAo VFB = 5.5 V)

VOH
VOL

4.2

-

4.9
1.6

1.9

VOH

-

(VCC-1.5)

(VCC-1.8)

V

Isw(off)

-

0

100

I1A

4.3

5.3

Input Bias Current (VFB = VFB(th) + 0.15 V)

0.03

0.078

'ioN

0.15

1.0

I1A
dB
V

PWM COMPARATOR
Duty Cycle
Maximum (VFB = 0 V)
Minimum (VCom = 1.9 V)
SWITCH OUTPUT
Output Voltage High State (VCC = 7.5 V. ISource = 3.0 A)
Off-State Leakage (VCC = 40 V. Pin 2 = Gnd)
Current Limit Threshold

Ipk(switch)

Switching Times (VCC = 40 V. Ipk = 3.0 A. L = 37511H. TA = 25'C)
Output Voltage Rise Time
Output Voltage Fall Time

tr
tf

3.3

-

100
50

UNDERVOLTAGE LOCKOUT
Start-Up Threshold (VCC Increasing. TA = 25'C)
Hysteresis (VCC Decreasing. TA = 25'C)
TOTAL DEVICE
Power Supply Current (TA = 25'C )
Standby (VCC = 12 V. VComp < 0.15 V)
Operating (VCC = 40 V. Pin 1 = Gnd for maximum duty cycle)
NOTES: I. Maximum package power dissipation limits must be observed to prevent thermal shutdown activation.
2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
3. Tlow = O'C for MC34166
Thigh = + 70'C for MC34166
-40'C for MC33166
= +85'CforMC33166

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-363

A
ns

200
100

MC34166, MC33166

2:
9
0
:I:

5.25

en
w
a:

m

'"::>

II-

- --

f- VCc! 12V
5.17

~

"-

;;!;

""
t.')

5.09 i"""

..:
c
w
5.01 i"""
w
u.
w

'"

§;
:2
~

u.

>

100

VFB(~) Max = 5! 15 v

r--r

~ 60

~

I

4.~5 V
I
I

o

25
50
75
TA, AMBIENT TEMPERATURE ('C)

100

CD

100

z

iIiw
130

80

"-

40

(!)

>
0

I

-

I""

ain
~

60

~ 20

o

-55

:Z
w

20

..::.

.......

~

\

§;
z
o

loOk

10k
lOOk
t, FREQUENCY (Hz)

loOM

"-

!3

VCC= 12
VFB= 5.5V
TA~25'CI

0.4

180
10M

:;;'

0

o

0.4

0.8
1.2
1.6
ISink, OUTPUT SINK CURRENT (rnA)

100

/

VCC= 12V
80 I-~
TA = 25'C
t.')

t.')

""

a:

0

c

60

V

I-

............

::>

"I-

t-....

::>
0

[7

40

7

:I:

~

-8

~

0

~

/

20

V

c.S
-55

c
-25

o

/

~

::>

............ r-.,
..........

0-12

2.0

!r-I--

W

...J

-4

f--

Figure 6. Switch Output Duty Cycle
versus Compensation Voltage

~

/'

f--

10

:I:



4

::>
0

125

!;(

o~

..:

en

~ 1.2

~

ffl

z

~
C3

1.6

en 0.8

(!)

w
a:
u.

t§

Figure 5. Oscillator Frequency Change
versus Temperature

~
zw

100

--

2.0

en

150 .e.

,~

100

a:

~

120

0

- 20
10

~

(!)

fil
e.

60
90

>

w

30

"Phase _

.......

0

o
~
00
ro
TA, AMBIENT TEMPERATURE ('C)

-25

w

.......

"-

..:

2:

w

I'"""--.

..,

"""-

Figure 4. Error Amp Output Saturation
versus Sink Current

""

.......

......

~

.......... .......

9

........ .......

z

125

VCC=12V
vcomfl = 3.25 V
RL= OOk
TA=25'C

~

VCC=12V _
VFB= VFB( h)

'" 40

Figure 3. Error Amp Open-Loop Gain and
Phase versus Frequency
:!;!.

""'- ....... I'--....

t.')

VFB(t ) Min =

- 25

"-

~
w
a:

VFB(t l ) Typ = 5:05 V

4.93

4.85
- 55

r\.

:[ 80

I

~

(!)

13

Figure 2. Voltage Feedback Input Bias
Current versus Temperature

Figure 1. Voltage Feedback Input Threshold
versus Temperature

25
50
75
100
TA, AMBIENT TEMPERATURE ('C)

125

o

1.5

1/
2.0

2.5
3.0
3.5
4.0
VComp, COMPENSATION VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-364

4.5

MC34166, MC33166

is

~
:::>

!;;:
en

0

o

V~C/'

-

-0.5

--

r-

~ -1.0
:::>
o
~ -1.5
:::>

5~

Figure 8. Negative Switch Output Voltage
versus Temperature

Figure 7. Switch Output Source Saturation
versus Source Current

~

~

w -0.2

TA=125oC -

r-

-r---.

C!l

!:§

0-0.4

>
~

- ""

~

.......

:J:

~ -2.5

1ii -3.0

~

0

1.0
2.0
3.0
4.0
ISource, SWITCH OUTPUT SOURCE CURRENT (A)

r- Pins 1, 3 = Gnd

-0.6

:..---

a -0.8

--

j

-1.0 I"""
-1.2

-55

5.0

4.5

..............

F
!:::

a:
a:
u

I
Co

~

.............. ......

~
~

z

en
u
u

40

-...........

6.0
5.5

r--.

0
~
~
m
TA, AMBIENT TEMPERATURE (0C)

100

10

1~

.,;'

/

4.5

-~

20
30
Vcc, SUPPLY VOLTAGE M

40

Figure 12. Operating Supply Current
versus Supply Voltage
40

............ ......

Thre~hold
..... r-.......Sta~.Up
~~C Increasing

--......... -

<"

....§..z

""""'-l

Tur~.Off Thre~hold -

-- --

0
~
~
m
TA, AMBIENT TEMPERATURE (0C)

30

w

a:
a:
:::>
u

r--....

V C Decreasing

5.0

6" 4.0
~ -55

/

.,,-V

./

/"
-~

:::>

~

~

Figure 11. Undervoltage Lockout
Thresholds versus Temperature
6.5

/'r'

80

:::>

..............

3.9
-55

_ Pin 2 Open
TA=25°C

a.
a.

.... r--......,

4.1

~

~
9
w
C!l
!:§

a:
a:
:::>
u

..............

~

~
ffl

<"

r.......

4.3

:J:

125

Pin4=Vcc I

...zw

w

:::>

100

r- Pins 1, 3, 5 = Gnd

~ 120

:;

::J

-

~

160
Vccl= 12V I
Pinsl,2,3=Gnd -

:J:

!z

Isw= lOrnA

r--

Figure 10. Standby Supply Current
versus Supply Voltage

4.7

9o

ffl
a:

....-

:..----:01-"'"
Is = 100IJA -

o
25
50
75
TA, AMBIENT TEMPERATURE (oC)

-25

Figure 9. Switch Output Current Limit
Threshold versus Temperature

g

--

Pin 2 Driven Negative

~

~

Gnd l )"

I

r- Pin 5 = 2.0V

5

.....

-2.0

I
r- Vcc212V

I

20

~

a.
a.

Pin4=Vcc
Pinsl,3=Gnd Pins 2, 5 Open
TAi25°C I -

:::>

en

r-.....

100

c3
E
125

10

o ./
o

10

20
30
Vcc, SUPPLY VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-365

40

MC34166, MC33166
Figure 13. MC34166 Representative Block Diagram

r------------------------,

I

t-----,--+-1:>-~

InputVoltageNcc

ICin

~

1001lA

I
I
I
I
I
I
I
I
I Voltage
I Feedback

III

Input

Vo
L ______

R2

~ ______ _

1"3-

Gnd

Compensation

Sink Only
Poshive True Logic

1

Figure 14. Timing Diagram

4.1V-Timing Capacitor CT - Compensation _ _

--I~r---4~_J

2.3V-On _ _
Swhch Output

011--

,

,

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-366

Rl

+co

MC34166, MC33166
INTRODUCTION
The MC34166, MC33166 series are monolithic power
switching regulators that are optimized for DC-to-DC
converter applications. These devices operate as fixed
frequency, voltage mode regulators containing all the active
functions required to directly implement step-down and
voltage-inverting converters with a minimum number of
external components. They can also be used cost effectively
in step-up converter applications. Potential markets include
automotive, computer, industrial, and cost sensitive
consumer products. A description of each section of the
device is given below with the representative block diagram
shown in Figure 13.

Oscillator
The oscillator frequency is internally programmed to 72 kHz
by capacitor CT and a trimmed current source. The charge to
discharge ratio is controlled to yield a 95% maximum duty
cycle at the Switch Output. During the discharge of CT, the
oscillator generates an internal blanking pulse that holds the
inverting input of the AND gate high, disabling the output
switch transistor. The nominal oscillator peak and valley
thresholds are 4.1 V and 2.3 V respectively.

Pulse Width Modulator
The Pulse Width Modulator consists of a comparator with
the oscillator ramp voltage applied to the noninverting input,
while the error amplifier output is applied into the inverting
input. Output switch conduction is initiated when CT is
discharged to the oscillator valley voltage. As CT charges to a
voltage that exceeds the error amplifier output, the latch
resets, terminating output transistor conduction for the
duration of the oscillator ramp-up period. This PWM/Latch
combination prevents multiple output pulses during a given
oscillator clock cycle. Figures 6 and 14 illustrate the switch
output duty cycle versus the compensation voltage.

Current Sense
The MC34166 series utilizes cycle-by-cycle current limiting
as a means of protecting the output switch transistor from
overstress. Each on-cycle is treated as a separate situation.
Current limiting is implemented by monitoring the output
switch transistor current buildup during conduction, and upon
sensing an overcurrent condition, immediately turning off the
switch for the duration of the oscillator ramp-up period.
The collector current is converted to a voltage by an internal
trimmed resistor and compared against a reference by the
Current Sense comparator. When the current limit threshold is
reached, the comparator resets the PWM latch. The current
limit threshold is typically set at 4.3 A. Figure 9 illustrates
switch output current limit threshold versus temperature.

Error Amplifier and Reference
A high gain Error Amplifier is provided with access to the
inverting input and output. This amplifier features a typical DC
voltage gain of 80 dB, and a unity gain bandwidth of 600 kHz
with 70 degrees of phase margin (Figure 3). The noninverting
input is biased to the internal 5.05 V reference and is not
pinned out. The reference has an accuracy of ± 2.0% at room
temperature. To provide 5.0 V at the load, the reference is
programmed 50 mV above 5.0 V to compensate for a 1.0%
voltage drop in the cable and connector from the converter

output. If the converter design requires an output voltage
greater than 5.05 V, resistor R1 must be added to form a
divider network at the feedback input as shown in Figures 13
and 18. The equation for determining the output voltage with
the divider network is:
Vout = 5.05

External loop compensation is required for converter
stability. A simple low-pass filter is formed by connecting a
resistor (R2) from the regulated output to the inverting input,
and a series resistor-capacitor (RF, CF) between Pins 1 and 5.
The compensation network component values shown in
each of the applications circuits were selected to provide
stability over the tested operating conditions. The step-down
converter (Figure 18) is the easiest to compensate for
stability. The step-up (Figure 20) and voltage-inverting
(Figure 22) configurations operate as continuous conduction
flyback converters, and are more difficult to compensate. The
simplest way to optimize the compensation network is to
observe the response of the output voltage to a step load
change, while adjusting RF and CF for critical damping. The
final circuit should be verified for stability under four boundary
conditions. These conditions are minimum and maximum
input voltages, with minimum and maximum loads.
By clamping the voltage on the error amplifier output (Pin
5) to less than 150 mV, the internal circuitry will be placed into
a low power standby mode, reducing the power supply
current to 36 IlA with a 12 V supply voltage. Figure 10
illustrates the standby supply current versus supply voltage.
The Error Amplifier output has a 100 IlA current source
pull-up that can be used to implement soft-start. Figure 17
shows the current source charging capacitor CSS through a
series diode. The diode disconnects CSS from the feedback
loop when the 1.0 M resistor charges it above the operating
range of Pin 5.
Switch Output
The output transistor is designed to switch a maximum of
40 V, with a minimum peak collector current of 3.3 A. When
configured for step-down or voltage-inverting applications, as
in Figures 18 and 22, the inductor will forward bias the output
rectifier when the switch turns off. Rectifiers with a high
forward voltage drop or long turn-on delay time should not be
used. If the emitter is allowed to go sufficiently negative,
collector current will flow, causing additional device heating
and reduced conversion efficiency. Figure 8 shows that by
clamping the emitter to 0.5 V, the collector current will be in
the range of 100 IlA over temperature. A 1N5822 or
equivalent Schottky barrier rectifier is recommended to fulfill
these requirements.

Undervoltage Lockout
An Undervoltage Lockout comparator has been
incorporated to guarantee that the integrated circuit is fully
functional before the output stage is enabled. The internal
5.05 V reference is monitored by the comparator which
enables the output stage when VCC exceeds 5.9 V. To
prevent erratic output switching as the threshold is crossed,
0.9 V of hysteresis is provided.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-367

(~~ + 1)

..

MC34166, MC33166

lEI

Thermal Protection
Internal Thermal Shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated, typically at 170°C,
the latch is forced into a 'reset' state, disabling the output
switch. This feature is provided to prevent catastrophic
failures from accidental device overheating. It is not

intended to be used as a substitute for proper
heatsinking. The MC34166 is contained in a heatsinkable
5-lead TO-220 type package. The tab of the package is
common with the center pin (Pin 3) and is normally connected
to ground.

DESIGN CONSIDERATIONS
Do not attempt to construct a converter on wire-wrap
or plug-in prototype boards. Special care should be taken
to separate ground paths from signal currents and ground
paths from load currents. All high current loops should be
kept as short as possible using heavy copper runs to
minimize ringing and radiated EMI. For best operation, a tight

component layout is recommended. Capacitors CIN, CO, and
all feedback components should be placed as close to the IC
as physically possible. It is also imperative that the Schottky
diode connected to the Switch Output be located as close to
the IC as possible.

Figure 16. Over Voltage Shutdown Circuit

Figure 15_ Low Power Standby Circuit

I = Standby Mode

VShuldown = VZener + 0.7

Figure 17. Soft-Start Circuit

100flA

Compensation
D2

1.0M

J: Css

ISoft-Slart ~ 35,000 Css

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-368

MC34166, MC33166
Figure 18. Step-Down Converter
Yin
12V

01

lN5822

R2
t-..-I-C>--..-'VVIr---+---Q

6.8k

------f~------3

Test

Load Regulation
Output Ripple
Short Circuit Current
Efficiency

Vo

5.05V/3.0A

5

0.1

Line Regulation

Co +
2200I

68k

Condition

=8.0 V to 36 V, 10 = 3.0 A
Yin = 12 V, 10 = 0.25 A to 3.0 A
Vin = 12 V, 10 = 3.0 A
Vin = 12 V, RL = O. t n
Vin = 12 V, 10 =3.0 A
Yin

Results
5.0 mV =± 0.05%
2.0 mV =± 0.02%
10 mV p_p
4.3A
82.8%

L = Coilcraft M1496-A or ELMACO CHKl 050, 42 turns of #16 AWG on Magnetics Inc. 58350-A2 core.
Heatsink = AAVID Engineering Inc. 59038, or 59308.
The Step-Down Converter application is shown in Figure 18. The output switch transistorOl interrupts the input voltage, generating a squarewave althe LCO filter input.
The filter averages the squarewaves, producing a DC output voltage that can be set to any level between Vin and Vref by controlling the percent conduction time of at
to that of the total oscillator cycle time. If the converter design requires an output voltage greater than 5.05 V, resistor Rl must be added to form a divider network at
the feedback input.

Figure 19. Step-Down Converter Printed Circuit Board and Component Layout

I"

~I

3.0"

z

~
0
C

ci.
w

lI./)

rD

~

M

U

:2

®
(Bottom View)

I
1
,

"l

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-369

(Top View)

MC34166, MC33166
Figure 20. Step-Up/Down Converter
Yin

r------------------------,

12V

I

Dl
lN5822

D2
lN5822

------f~------3

Co

6.8k

+

1000I

Vo

28V/0.6A

5

0.47

Rl

4.7k

1.5k
'Gate resistor RG. zener diode 03. and diode 04 are required only when Vin is greater than 20 V.

Condition

Test
Line Regulation
Load Regulation
Output Ripple
Short Circuit Current
Efficiency

= 8.0 V to 24 V, 10 = 0.6 A
Yin = 12 V, 10 = 0.1 A to 0.6 A
Yin = 12 V, 10 = 0.6 A
Yin = 12 V, RL = 0.1 n
Yin = 12 V, 10 = 0.6 A
Yin

Results
23 mV
3.0 mV

= ± 0.41%
= ± 0.005%

100 mV p _p
4.0A
82.8%

L = COlleraft M1496-A or ELMACO CHK1050, 42 turns of #16 AWG on Magnetics Inc. 58350-A2 core.
Heatsink = AAVIO Engineering Inc.
MC34166: 59038, or 59308
MTP3055EL: 59258
Figure 20 shows that the MC34166 can be configured as a step-up/down converter with the addition 01 an external power MOSFET. Energy is stored in the inductor
during the on-time of transistors 01 and 02' Ouring the off-time, the energy is transferred, with respecttoground, to the outputfiltercapacitor and load. Thiscircuit configuration has two significant advantages over the basic step-up converter circuit. The first advantage is that output short-circuit protection is provided by the MC34166,
since 01 is directly in series with Vin and the load. Second, the output voltage can be programmed to be less than Vin. Notice that during the off-time, the inductorlorward
biases diodes 01 and 02, transferring its energy with respecttoground ratherthanwith respectto Vin. When operating with Vin greater than 20 V, agate protection network
is required for the MOSFET. The network consists of components Rg , 03, and 04.

Figure 21. Step-Up/Down Converter Printed Circuit Board and Component Layout

I-

-I

3.45"

I
(Bottom View)

(Top View)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-370

MC34166, MC33166
Figure 22. Voltage-Inverting Converter
Vin

r------------------------,

12V

I

DI
IN5822

RI

1-r-l-o----'lMr-...,---+-o Vo
2.4k

+I

-12V/1.0A

_ Co

- 2200

0.47

Condition

Test
Line Regulation
Load Regulation
Output Ripple
Short Circuit Current
Efficiency

4.7k

= 8.0 V to 24 V, 10 = 1.0 A
Yin = 12 V, 10 = 0.1 A to 1.0 A
Yin = 12 V, 10 = 1.0 A
Yin = 12 V, RL = 0.1 n
Yin = 12 V, 10 = 1.0 A
Yin

R2
3.3k

0.047

Results
3.0 mV
4.0 mV

= ± 0.01%
= ± 0.017%

80 mVp•p
3.74 A
81.2%

L = COllcraft M1496-A or ELMACO CHK1050, 42 turns of #16 AWG on Magnetics Inc. 58350-A2 core.
Heatsink = AAVID Engineering Inc. 59038, or 59308.
Two potential problems arise when designing the standard voltage-inverting converter with the MC34166. First, the Switch Output emitter is limited to-1.5 V with respect
to the ground pin and second, the Error Amplifier's noninverting input is internally committed to the reference and is not pinned out. 80th of these problems are resolved
by connecting the IC ground pin to the converter's negative output as shown in Figure 22. This keeps the emitter of Q1 positive with respect to the ground pin and has
the effect of reversing the Error Amplifier inputs. Note that the voltage drop across R1 is equal to 5.05 V when the output is in regulation.

Figure 23. Voltage-Inverting Converter Printed Circuit Board and Component Layout

-I

3.0"

(BoHom View)

(Top View)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-371

MC34166, MC33166
Figure 24. Triple Output Converter

r------------------------,I

Yin
24V

IN5822

I

T1
V02

I
I

12V/300mA

I

I
I

6.8k

I--H-o------'\NIr--+~_o

l_____ ,~------,

1000

0.1

Test

:t

VOl

5.05V/2.DA

68k

Condition

Results

Line Regulation

5.0V
12V
-12V

Yin = 15 V to 30 V, 101 = 2.0 A, 102 = 300 mA, 103 = 100 mA

4.0 mV = ± 0.04%
450 mV = ±1.9%
350 mV = ±1.5%

Load Regulation

5.0 V
12V
-12V

Yin = 24 V, 101 = 500 mA to 2.0 A, 102 = 300 mA, 103 = 100 mA
Yin = 24 V, 101 = 2.0 A, 102 = 100 mA to 300 mA, 103 = 100 mA
Yin = 24 V, 101 = 2.0 A, 102 = 300 mA, 103 = 30 mA to 100 mA

2.0 mV = ± 0.02%
420 mV = ±1.7%
310 mV = ±1.3%

Output Ripple

5.0 V
12V
-12V

Yin = 24 V, 101 = 2.0 A, 102 = 300 mA, 103 = 100 mA

50 mVp-p
25 mVp-p
10 mVp •p

Short Circuit Current

5.0 V
12V
-12V

Yin = 24 V, RL = 0.1 Q

4.3 A
1.83A
1.47A

Yin = 24 V, 101 = 2.0 A, 102 = 300 mA, 103 = 100 mA

83.3%

Efficiency

TOTAL

T1 = Primary: Coilcraft M1496·A or ELMACO CHKI050, 42 turns 01#16 AWG on Magnetics Inc. 58350·A2 core.
Secondary: V02 - 65 turns 01 #26 AWG
V03 - 96 turns 01 #28 AWG
Heatsink = AAVID Engineering Inc. 5903B, or 5930B.
Multiple auxiliary outputs can easily be derived by winding secondaries on the main output inductor to form a transformer. The secondaries must be connected
so that the energy Is delivered to the auxiliary outputs when the Switch Output turns off. During the off·time, the voltage across the primary winding is regulated
by the feedback loop, yielding a constant Volts/Tum ratio. The number of turns for any given secondary voltage can be calculated by the following equation:
# TURNS(SEC)

=

VO(SECI + VF(SECI
( VO(PRIl + VF(PRII)
#TURNS(PRI)

Note that the 12 V winding is stacked on top of the 5.0 V output. This reduced the number of secondary turns and improves lead regulation. For best auxiliary
regulation, the auxiliary outputs should be less than 33% of the total output power.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-372

MC34166, MC33166
Figure 25. Negative Input/Positive Output Regulator

Vo
~--~'WIr':'._A,lrv·Ok\r_~ Faster

~-------

------3~--

Test

5
Condition

Results

Low Speed Line Regulation

Yin = 12 V to 24 V

1760 RPM ±1%

High Speed Line Regulation

Yin = 12 V to 24 V

3260 RPM±6%

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-373

Vo

+ 36V/0.25A

MC34166, MC33166

Figure 27. Off-Line Preconverter

MC34166
Step-Down

OUtput 1

Converter

MC34166
Slep-Down

Converter

MC34166
Step-Down

Converter

T1 = Core and Bobbin - Coilcraft PT3595
Primary - 104lums #26 AWG
Base Drive - 31urns #26 AWG
Secondaries -16tums .16 AWG
Total Gap - 0.002"

Output 2

OUtput 3

T2= Core-TDKT6xl.5x3H5C2
14 turns center lapped #30 AWG

Heatsink = AAVID Engineering Inc.
MC34166 and MJEI3005 - 5903B
MBR20100CT - 5925B

The MC34166 can be used cost effectively in off·line applications even though His limited to a maximum input voltage of 40 V. Figure 27 shows a simple
and efficient method for converting the AC line voltage down to 24 V. This preconverter has a total power rating of 125 W with a conversion efficiency of 90%.
TransformerT 1 provides output isolation from the AC line and isolation between each olthe secondaries. The circuit seH-osciliates at50 kHz and is controlled
by the saturation characteristics of T2. Multiple MC34166 post regulators can be used to provide accurate independently regulated outputs for a distributed
power system.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-374

MC34167
MC33167

MOTOROLA

SEMICONDUCTOR-----TECHNICAL DATA

Advance Information
Power Switching Regulator

POWER SWITCHING
REGULATOR

The MC34167, MC33167 series are high performance fixed frequency power
switching regulators that contain the primary functions required for DC-to-DC
converters. This series was specifically designed to be incorporated in step-down
and voltage-inverting configurations with a minimum number of external
components and can also be used cost effectively in step-up applications.
These devices consist of an internal temperature compensated reference,
fixed frequency oscillator with on-chip timing components, latching pulse width
modulator for single pulse metering, high gain error amplifier, and a high current
output switch.
Protective features consist of cycle-by-cycle current limiting, undervoltage
lockout, and thermal shutdown. Also included is a low power standby mode that
reduces power supply current to 36 /lAo
• Output Switch Current in Excess of 5.0 A
• Fixed Frequency Oscillator (72 kHz) with On-Chip Timing
• Provides 5.05 V Output Without External Resistor Divider
• Precision 2.0% Reference
• 0% to 95% Output Duty Cycle
• Cycle-by-Cycle Current Limiting
• Undervoltage Lockout with Hysteresis
• Internal Thermal Shutdown
• Operation from 7.5 V to 40 V
• Standby Mode Reduces Power Supply Current to 36 /lA
• Economical Five Lead TO-220 Package

TSUFFIX
PLASTIC PACKAGE
CASE 3140

o
Simplified Block Diagram
(Step Down Application)

PIN CONNECTIONS
Pin 1. Voltage Feedback Input
2. Switch Output
3. Ground
4. Input VoltageNCC
5. Compensation/Standby
(Heatsink surface connected to Pin 3)

1----'--0-...-.-+-o VO

J 5.05V/5.0A

ORDERING INFORMATION

Temperature
Range

Package

MC34167T

0° to + lO°C

Plastic Power

MC3316lT

- 40° to + 85°C

Plastic Power

Device

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-375

..
I

SILICON MONOLITHIC
INTEGRATED CIRCUIT

MC34167, MC33167
MAXIMUM RATINGS
Rating

Symbol

Value

VCC

40

V

VO(switch)

- 2.0 to + Vin

V

VFB,VComp

-1.0 to + 7.0

V

PD
BJC
PD
BJA

34.7
2.3
1.9
65

Operating Junction Temperature

TJ

+150

Operating Ambient Temperature (Note 3)
MC34167
MC33167

TA

Power Supply Input Voltage
Switch Output Voltage Range
Voltage Feedback and Compensation Input Voltage Range
Power Dissipation and Thermal Characteristics (Note 1)
Maximum Power Dissipation @TC = 70'C
Thermal Resistance Junction to Case (Pin 3)
Maximum Power Dissipation @TA = 25'C
Thermal Resistance Junction-to-Air

Unit

W

'CIW
W

'CIW

'c
'c

Oto+ 70
-40 to + B5

Storage Temperature Range

ELECTRICAL CHARACTERISTICS (VCC = 12 V, for typical values TA = 25'C, for
temperature range that applies [Note 2, 3J, unless otherwise noted.)
Characteristic

'c

-65to+150

Tstg

Symbol

minimax values TA is the operating ambient
Min

Typ

Max

4.95
4.B5

5.05

5.15
5.20

Unit

OSCILLATOR
Frequency (VCC = 7.5 V to 40 V)
TA = 25'C
TA = Tlow to Thi h
ERROR AMPLIFIER
Voltage Feedback Input Threshold
TA = 25'C
TA = Tlow to Thigh

VFB(th)

= 7.5 V to 40 V, TA = 25'C)
Input Bias Current (VFB = VFB(th) + 0.15 V)

Regline

-

0.03

0.07B

%N

liB

-

0.15

1.0

I1A
dB

Line Regulation (VCC

V

-

Power Supply Rejection Ratio (VCC = 10 V to 20 V)

PSRR

60

80

-

Output Voltage Swing
High State (lSource = 7511A, VFB = 4.7 V)
Low State (ISink = 0.4 mA, VFB = 5.5 V)

VOH
VOL

4.2

4.9
1.6

1.9

Vsat

-

(VCC -1.5)

(VCC-l.B)

V

0

100

I1A

6.5

7.5

V

-

PWM COMPARATOR
Duty Cycle (VCC = 20 V)
Maximum (VFB = 0 V)
Minimum (VComp = 1.9 V)
SWITCH OUTPUT
Output Voltage Source Saturation (VCC = 7.5 V, ISource = 5.0 A)
Off-State Leakage (VCC = 40 V, Pin 2 = Gnd)

Isw(off)

Current Limit Threshold (VCC = 7.5 V)

Ipk(switch)

5.5

tr
tf

-

-

100
50

UNDERVOLTAGE LOCKOUT
Start-Up Threshold (VCC Increasing, TA = 25'C)
Hysteresis (VCC Decreasing, TA = 25'C)
TOTAL DEVICE
Power Supply Current (TA = 25'C )
Standby (VCC = 12 V, VComp < 0.15 V)
Operating (VCC = 40 V, Pin 1 = Gnd for maximum duty cycle)
NOTES: 1. Maximum package power dissipation limits must be observed to prevent thermal shutdown activation.
2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
3.TIOW:

~';o;~~~~6~6~67

Thigh:

A
ns

Switching limes (VCC = 40 V, Ipk = 5.0 A, L = 22511H, TA = 25°C)
Output Voltage Rise lime
Output Voltage Fail lime

:~~:g:~~~g~~~~~

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-376

200
100

MC34167, MC33167
Figure 1. Voltage Feedback Input Threshold
versus Temperature

~

9a

:J:

5.25

-

en
- VCC! 12V
w
a:
:J:
..... 5.17
.....
:::l

c..
~

""
'"cw

w 5.01
u..
w
(!)

!:ia

-

100

VFB(I~) Max = 5~ 15 V

r--r

....- ~

5.09

i.....

I

~ 4.85
-55

o
25
50
75
TA. AMBIENT TEMPERATURE (0C)

a;- 100
z

:;;:

80

(!)

w

(!)

!:i
a

"- S'

100

60

>
c..
a

40

:Z
w

20

1'0..........
.......
..........

I

.......

9

.......

c..

...:.

~
<

~

w

30

o

- 55

60

_

0

.......

- 20
10

100

90

120

.......

\

'"

1.0 k

10 k
100 k
t. FREQUENCY (Hz)

1.0M

t[
a:

.......

a

en

~ 0.8
en
~

~

ffl

~

150 -&
180
10M

z
~

~

VCC = 1211
VFB= 5.5V
TA 1=25°C1

a~ 0.4

J

o

o

0.4

0.8
1.2
1.6
ISink. OUTPUT SINK CURRENT (mA)

VCC=12V
~ 80 I-- TA= 25°C

i!:
:::l
c

a

5

.....
c..
.....

/

a 40

:::l

...........

/

:J:

~

~

-25

o

25
50
75
TA. AMBIENT TEMPERATURE (OC)

100

2.0

125

o

1.5

/.-

/
2.0

2.5
3.0
3.5
4.0
VComp. COMPENSATION VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-377

~"

~

en 20
c5
c

a

0-12
-55

-

/

60

:::l

r-....

13en - 8.0

i--

/

~

c..>

..........

-

l,- I--

~

...................

-4.0

125

Figure 6. Switch Output Duty Cycle
versus Compensation Voltage

~

/'

a:

~

r
.2

Ql

VCCL2V -

0

100

--

100

@

ff:

~ 1.6
~

4.0

~
z

0
25
50
75
TA. AMBIENTTEMPERATURE (OC)

~ 2.0
w

Figure 5. Oscillator Frequency Change
versus Temperature

W
:::l

- 25

(!)

ffi
e.
w

(!)

c..>
~

./

~ 20

I

.......... ......... Phase

----

Figure 4. Error Amp Output Saturation
versus Sink Current

I
.......

.......

z

125

VCC = 12V
VComp = 3.25 V
RL = 100 k
TA = 25°C

ain

.......

....

Figure 3. Error Amp Open-Loop Gain and
Phase versus Frequency
:Eo

............

S
'" 40
~
c..

-

VFB(t ) Min = 4. 95 V

-25

VCC=12V _
VFB = VFB(Ih)

en

I
I

u..

r".....

c..>

1

>

"

§ 60

I

~

I'\.

80

ii]
a:

VFB(t l )Typ = 5:05 v

4.93

>

Figure 2. Voltage Feedback Input Bias
Current versus Temperature

4.5

..
I

MC34167, MC33167

~

0

I

vdc )"

~
=> - 0.5

!;;:

en

III

Figure 8. Negative Switch Output Voltage
versus Temperature

Figure 7. Switch Output Source Saturation
versus Source Current

~

"'"-

~ -1.0
=>
o
en -1.5

-

~

w -0.2 r-VCC

-

A=25°

--.

i'oo..

!:;

I""""--...

:=

is -2.0

:==> - 0.6
o

.............

is - 0.8

~

:%'

~

,....

L---

:%'
0

2.0
4.0
6.0
ISource• SWITCH OUTPUT SOURCE CURRENT (A)

-1.2
- 55

8.0

7.2

:z:

fB
a:
~

6.8

....

:z

:!E

::;

!z

6.4

a:
a:
=>

..........

Co

.............
6.0

5.6
- 55

-~

~

fB
a:
~

0
~
~
~
TA. AMBIENT TEMPERATURE (0C)

6.5

~

6.0

-....

u

9

5.5

w

.......

Cl

!:§

~
~
:z

~

100

5.0
4.5

6" 4.0
~ -55

-~

V

40

V

,/

/

V
./

o ./
o

".

10

30

~

40

Vcc. SUPPLY VOLTAGE M

Figure 12. Operating Supply Current
versus Supply Voltage

i--..

slah.up Thr~shold

«
.§.
....
:z

~

-r--

w
a:
a:
=>
u

Tur~.Off Thre~hol;' r--.....

-

V C Decreasing

"""-

~

Il.
Il.

100

I

30
20
Pin 4 =VCC
Pins 1. 3 = Gnd
Pins 2. 5 Open
TA= ~5°C I

en

""""- r-

0
~
~
~
TA. AMBIENT TEMPERATURE (OC)

40

=>
u

9

=>

~

=>
en
u
u

125

~C Increasing

r--..

125

50

!:;

§1

100

./

80

Il.
Il.

Figure 11. Undervoltage Lockout
Thresholds versus Temperature

~

:z:

Pin41=Vcc I
- Pins 1. 3. 5 = Gnd
_ Pin 2 Open
120
TA = 25°C

~

:2

1

-- -

w

a:
a:
=>
u

r-........

w

u

«
.=!,

...............

.........

-

160

I
_
Pins 1. 2. 3 = Gnd

....

Is!,,= lOO IlA

Figure 10. Standby Supply Current
versus Supply Voltage

V~CI=12V

...............

I....-~r-

o
25
50
75
TA. AMBIENT TEMPERATURE (OC)

-25

Figure 9. Switch Output Current Limit
Threshold versus Temperature

g
9o

-

Isw=10mA

~3i -1.0

~ -2.5
en
1U - 3.0

--

C!l
I-- Pin 5 = 2.0 V
!:§
0-0.4 r- Pins 1. 3 = Gnd
Pin 2 Driven Negative
>

.........

!:;

Gnd l )"

I

J12V

10

o ./
o

125

10

20
30
Vcc. SUPPLY VOLTAGE M

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-378

40

MC34167, MC33167
Figure 13. MC34167 Representative Block Diagram

r-----------------------Tl
!

I

1 - -......+-<)--+ Input VoHageNcc

I

:J Cin

I Switch
I Output

*
tOOIlA

I
I
I
I
I
I
I
I
+ I VoHage
I Feedback

II L

tnput

_I

L----;;;,r=----c;.__ '--5_-_c.HF_-_-_-.. . ~
~_.':
+
tp--_
RIIJFIr.J
__

+

-

= SinkOnty
Positive True Logic

Figure 14. Timing Diagram

4.tV--Timing CapacHor CT - - -

-;+--HI-J

2.3V--On ___
Switch Output

011 ___

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-379

_ Rt

R2

..

I

~~~~--~~-+-oVO

~

Compensation ___

JLfL

:JCO

MC34167, MC33167
INTRODUCTION

lEI

The MC34167, MC33167 series are monolithic power
switching regulators that are optimized for DC-to-DC
converter applications. These devices operate as fixed
frequency, voltage mode regulators containing all the active
functions required to directly implement step-down and
voltage-inverting converters with a minimum number of
external components. They can also be used cost effectively
in step-up converter applications. Potential markets include
automotive, computer, industrial, and cost sensitive
consumer products. A description of each section of the
device is given below with the representative block diagram
shown in Figure 13.
Oscillator
Theoscillatorfrequency is internally programmed to 72 kHz
by capacitor CT and a trimmed current source. The charge to
discharge ratio is controlled to yield a 95% maximum duty
cycle at the Switch Output. During the discharge of CT, the
oscillator generates an internal blanking pulse that holds the
inverting input of the AND gate high, disabling the output
switch transistor. The nominal oscillator peak and valley
thresholds are 4.1 V and 2.3 V respectively.
Pulse Width Modulator
The Pulse Width Modulator consists of a comparator with
the oscillator ramp voltage applied to the non inverting input,
while the error amplifier output is applied into the inverting
input. Output switch conduction is initiated when CT is
discharged to the oscillator valley Voltage. As CT charges to a
voltage that exceeds the error amplifier output, the latch
resets, terminating output transistor conduction for the
duration of the oscillator ramp-up period. This PWM/Latch
combination prevents multiple output pulses during a given
oscillator clock cycle. Figures 6 and 14 illustrate the switch
output duty cycle versus the compensation voltage.
Current Sense
The MC34167 series utilizes cycle-by-cycle current limiting
as a means of protecting the output switch transistor from
overstress. Each on-cycle is treated as a separate situation.
Current limiting is implemented by monitoring the output
switch transistor current buildup during conduction, and upon
sensing an overcurrent condition, immediately turning off the
switch for the duration of the oscillator ramp-up period.
The collector current is converted to a voltage by an internal
trimmed resistor and compared against a reference by the
Current Sense comparator. When the current limit threshold is
reached, the comparator resets the PWM latch. The current
limit threshold is typically set at 6.5 A. Figure 9 illustrates
switch output current limit threshold versus temperature.
Error Amplifier and Reference
A high gain Error Amplifier is provided with access to the
inverting input and output. This amplifier features a typical DC
voltage gain of 80 dB, and a unity gain bandwidth of 600 kHz
with 70 degrees of phase margin (Figure 3). The noninverting
input is biased to the internal 5.05 V reference and is not
pinned out. The reference has an accuracy of ± 2.0% at room
temperature. To provide 5.0 V at the load, the reference is
programmed 50 mV above 5.0 V to compensate for a 1.0%
voltage drop in the cable and connector from the converter

output. If the converter design requires an output voltage
greater than 5.05 V, resistor Rl must be added to form a
divider network at the feedback input as shown in Figures 13
and 18. The equation for determining the output voltage with
the divider network is:
Vout = 5.05

(:~ + 1)

External loop compensation is required for converter
stability. A simple low-pass filter is formed by connecting a
resistor (R2) from the regulated output to the inverting input,
and a series resistor-capacitor (RF, CF) between Pins 1 and 5.
The compensation network component values shown in
each of the applications circuits were selected to provide
stability over the tested operating conditions. The step-down
converter (Figure 18) is the easiest to compensate for
stability. The step-up (Figure 20) and voltage-inverting
(Figure 22) configurations operate as continuous conduction
flyback converters, and are more difficult to compensate. The
simplest way to optimize the compensation network is to
observe the response of the output voltage to a step load
change, while adjusting RF and CF for critical damping. The
final circuit should be verified for stability under four boundary
conditions. These conditions are minimum and maximum
input voltages, with minimum and maximum loads.
By clamping the voltage on the error amplifier output (Pin
5) to less than 150 mV, the internal circuitry will be placed into
a low power standby mode, reducing the power supply
current to 36 flA with a 12 V supply Voltage. Figure 10
illustrates the standby supply current versus supply voltage.
The Error Amplifier output has a 100 IlA current source
pull-up that can be used to implement soft-start. Figure 17
shows the current source charging capaCitor CSS through a
series diode. The diode disconnects CSS from the feedback
loop when the 1.0 M resistor charges it above the operating
range of Pin 5.
Switch Output
The output transistor is designed to switch a maximum of
40 V, with a minimum peak collector current of 5.5 A. When
configured for step-down or voltage-inverting applications, as
in Figures 18 and 22, the inductor will forward bias the output
rectifier when the switch turns off. Rectifiers with a high
forward voltage drop or long turn-on delay time should not be
used. If the emitter is allowed to go sufficiently negative,
collector current will flow, causing additional device heating
and reduced conversion efficiency. Figure 8 shows that by
clamping the emitter to 0.5 V, the collector current will be in
the range of 100 flA over temperature. A 1N5825 or
equivalent Schottky barrier rectifier is recommended to fulfill
these requirements.
Undervoltage Lockout
An Undervoltage Lockout comparator has been
incorporated to guarantee that the integrated circuit is fully
functional before the output stage is enabled. The internal
reference voltage is monitored by the comparator which
enables the output stage when VCC exceeds 5.9 V. To
prevent erratic output switching as the threshold is crossed,
0.9 V of hysteresis is provided.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-380

MC34167, MC33167
Thermal Protection
Internal Thermal Shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated, typically at 170 c C,
the latch is forced into a 'reset' state, disabling the output
switch. This feature is provided to prevent catastrophic fail-

ures from accidental device overheating. It is not intended
to be used as a substitute for proper heatsinking. The
MC34167 is contained in a 5-lead TO-220 type package. The
tab of the package is common with the center pin (Pin 3) and
is normally connected to ground.

DESIGN CONSIDERATIONS
Do not attempt to construct a converter on wire-wrap
or plug-in prototype boards. Special care should be taken
to separate ground paths from signal currents and ground
paths from load currents. All high current loops should be
kept as short as possible using heavy copper runs to minimize ringing and radiated EMI. For best operation, a tight

component layout is recommended. Capacitors Cin, CO, and
all feedback components should be placed as close to the IC
as physically possible. It is also imperative that the Schottky
diode connected to the Switch Output be located as close to
the IC as possible.

Figure 16. Over Voltage Shutdown Circuit

Figure 15. Low Power Standby Circuit

I = Standby Mode

VShutdown = VZener + 0.7

Figure 17. Soft-Start Circuit

tooJ,JA

Compensation

5

D2

R1

Isoft.start ~ 35,000 Css

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-381

MC34167, MC33167
Figure 18. Step-Down Converter

r------------------------,

Yin
12V

I

°1

lN5825

R2

~~~~-V~--_+--_oVo

6.8k

------f~------3

5.05V/5.0A

5

Test

0.1

68k

Condition

line Regulation

Co +
4700~

Yin = 10 Vt036V, 10 = 5.0 A

Results
4.0 mV = ± 0.039%

Load Regulation

Yin = 12 V, 10 = 0.25 A to 5.0 A

1.0 mV =±0.01%

Output Ripple

Yin = 12 V, 10 = 5.0 A

20 mVp•p

Short Circuit Current

Yin = 12 V, RL = 0.1

Efficiency

Yin = 12 V, 10 = 5.0 A
Yin = 24 V, 10 = 5.0 A

n

6.5A
78.9%
82.6%

L = Coilcraft M1496·A or ELMACO CHKl 050, 42 turns of #16 AWG on Magnetics Inc. 58350-A2 core.
Heatsink = AAVID Engineering Inc. 5903B, or 5930B.
The Step-Down Converter application is shown in Figure 18. The output switch transistor Ql interrupts the input voltage, generating a squarewave at the LCO lilter input.
The filter averages the squarewaves, producing a DC output voltage that can be setto any level between Vin and Vref by controlling the percent conduction time of Ql
to that of the total oscillator cycle time. If the converter deSign requires an output voltage greater than 5.05 V, resistor Rl must be added to form a divider network at
the feedback input.

Figure 19. Step-Down Converter Printed Circuit Board and Component Layout
3.0"

"I

[Top View)

(BoHom View)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-382

MC34167, MC33167
Figure 20. Step-Up/Down Converter
Vin
12V

r------------------------,
I

i ~ 'RG
~ 620

i

°4

lN4148:

[

I

~--rq
03:(
lN967A -.l..

02
MTP3055EL

~

°2

lN5822

------f~------3

6.8k

Co

+

2200I

Vo
28V/0.9A

5
0.47

Rl

4.7k

1.5k
*Gate resistor RG. zener diode 03. and diode D4 are required only when Vin is greater than 20 V.

Condition

Test
Line Regulation
Load Regulation
Output Ripple
Short Circuit Current
Efficiency

= 10 V to 24 V, 10 = 0.9 A
Yin = 12 V, 10 = 0.1 A to 0.9 A
Yin = 12 V, 10 = 0.9 A
Yin = 12 V, RL = 0.1 Q
Yin = 12 V, 10 = 0.9 A
Yin = 24 V, 10 = 0.9 A

Yin

Results
10 mV
30 mV

= ± 0.017%
= ± 0.053%

140 mV p _p
6.0A
80.1%
87.8%

L = Coilcraft M1496-A or ELMACO CHK1050, 42 turns of #16 AWG on Magnetics Inc. 58350-A2 core.
Heatsink = AAVIO Engineering Inc.
MC34167: 59036, or 59306
MTP3055EL: 59256
Figure 20 shows that the MC34167 can be configured as a step-up/down converter with the addition of an external power MOSFET. Energy is stored in the inductor
during the on-time of transistors 01 and Q2- During the off-time, the energy is transferred, with respect to ground, to the output filter capacitor and load. This circuitconfiguration has two significant advantages over the basic step-up converter circuit. The first advantage is that output short circuit protection is provided by the MC34167,
since Q1 is directly in series with Vin and the load. Second, the output voltage can be programmed to be less than Vin. Notice that during the off-time, the inductorforward
biases diodes D1 and 02, transferring its energy with respect to ground ratherthan with respect to Vin. When operating with Vingreaterthan 20 V, agate protection network
is required for the MOSFET. The network consists of components R g , 03, and 04.

Figure 21. Step-Up/Down Converter Printed Circuit Board and Component Layout

I~

-I

3.45"

I
(Bottom View)

(Top View)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-383

MC34167, MC33167
Figure 22. Voltage-Inverting Converter
Yin
12V

r------------------------,
I

DI
IN5825

2.4k

+I

Vo
-12V/I.7A

_ Co
- 4700

L _____ _

5
0.47

4.7k

R2

0.047

3.3k

Test

Condition

Line Regulation

Yin = 10 V to 24 V, 10 = 1.7 A

Results
15 mV = ± 0.61%

Load Regulation

Vin=12V,10=0.1 Atol.7A

4.0 mV = ± 0.020%

Output Ripple

Vin = 12 V, 10 = 1.7 A

78mV p _p

Short Circuit Current

Vin=12V,RL=0.1

Efficiency

Yin = 12 V, 10 = 1.7 A
Vin = 24 V, 10 = 1.7 A

n

5.7 A
79.5%
86.2%

L = COllcraft M1496-A or ELMACO CHK1050, 421urns of #16 AWG on Magnelics Inc. 58350-A2 core.
Healsink = AAVID Engineering Inc. 5903B. or 5930B.
Two polential problems arise when designing the standard voltage-inverting converter with the MC34167. First, the Switch Output emitter is limited to-l.5 V with respect
to the ground pin and second, the Error Amplifier's noninverting input is internally committed to the reference and is not pinned out. Both of these problems are resolved
by connecting the IC ground pin to the converter's negative output as shown in Figure 22. This keeps the emitter of 01 positive with respect to the ground pin and has
the effect of reversing the Error Amplifier inputs. Note that the voltage drop across Rl is equal to 5.05 V when the output is in regulation.

Figure 23. Voltage-Inverting Converter Printed Circuit Board and Component Layout

-I

3.0"
Ol

c
'E
Q)
c>

d;
Ol
ll!0
>
!O
:;t

I')

u

::i!

@
(Bottom View)

1
1
,

CI!

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-384

(Top View)

MC34167, MC33167

Figure 24. Triple Output Converter

r------------------------,

Yin
24V

I

lN5825
MURll0

V02

12V/250mA

I
I
I
L______
I

f

6.8k

1000

_ _______ _

3

Val
5.0V/3.0A

I--.-I--C)--~_vv'v_--++---O

I

______ ....:.-1

5
0.1

Test

68k

Results

Condition

Line Regulation

5.0 V
12V
-12 V

Yin = 15 V to 30 V, 101 = 3.0 A, 102 = 250 mA, 103 = 200 mA

3.0 mV = ± 0.029%
572 mV = ± 2.4%
711 mV = ± 2.9%

Load Regulation

5.0 V
12 V
-12V

Yin = 24 V, 101 = 30 mA to 3.0 A, 102 = 250 mA, 103 = 200 mA
Yin = 24 V, 101 = 3.0 A, 102 = 100 mA to 250 mA, 103 = 200 mA
Yin = 24 V, 101 = 3.0 A, 102 = 250 mA, 103 = 75 mA to 200 mA

1.0 mV = ± 0.009%
409 mV = ±1 .5%
528 mV = ± 2.0%

Output Ripple

5.0 V
12V
-12V

Yin = 24 V, 101 = 3.0 A, 102 = 250 mA, 103 = 200 mA

75 mV p_p
20 mV p_p
20 mVp _p

Short Circuit Current

5.0 V
12 V
-12V

Yin = 24 V, RL = 0.1

6.5A
2.7 A
2.2A

Efficiency

TOTAL

Q

Yin = 24 V, 101 = 3.0 A, 102 = 250 mA, 103 = 200 mA

84.2%

Tl =

Primary: Coilcraft M1496-A or ELMACO CHK1050, 42 turns of#16 AWG on Magnetics Inc. 58350-A2 core.
Secondary: V02- 69 turns of #26 AWG
V03 - 104 turns of #28 AWG
Heatsink = AAVID Engineering Inc. 59038, or 59308.

Multiple auxiliary outputs can easily be derived by winding secondaries on the main output inductor to form a transformer. The secondaries must be connected
so that the energy is delivered to the auxiliary outputs when the Switch Output turns off. During the off-time, the voltage across the primary winding is regulated
by the feedback loop, yielding a constant VoltsiTurn ratio. The number of turns for any given secondary voltage can be calculated by the following equation:

_ VO(SEC) + VF(SEC)
# TURNS(SEC) - (VO(PRI)+VF(PRI))
#TURNS(PRI)
Note that the 12 V winding is stacked on top of the 5.0 V output. This reduced the number of secondary turns and improves lead regulation. For best auxiliary
regulation, the auxiliary outputs should be less than 33% of the total output power.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-385

MC34167, MC33167
Figure 25. Negative Input/Positive Output Regulator

Vo =

L...t-o--+---t---,

(s.os

fu)
7
R2'
-I{)

Vo

+ 36V/0.3A

6.ak

1

_I

_ _ _ _ _ _ ...:....l

s

3

0.22

470k

___

0.002

Vino--+--_ _ _ _ _ _ _~==::i!:====~
__l---'
-12V
+~ 1000 'Gate resistor RG. zener diode 03. and diode 04 are required only when Vin is greater than 20 V.
Test

Condition

Results

Line Regulation

Yin =-10 V to-20 V, 10 = 0.3 A

266 mV = ± 0.38%

Load Regulation

Yin =-12 V, 10 = 0.03 A to 0.3 A

7.90 mV =±1.1%

Output Ripple

Yin =-12 V, 10 = 0.3 A

100 mV p•p

Efficiency

78.4%
Yin =-12V, 10 = 0.3A
L = ELMACO CHKI 050, 42 turns of #16 AWG on MagnetIcs Inc. 58350·A2 core.
Heatsink = MVIO Engineering Inc. 5903B or 5930B

Figure 26, Variable Motor Speed Control with EMF Feedback Sensing

r------------------------,
1
+
~~
1

1

sDk

L------------t----
in
;;'-0.5
-0.5

<..>

r
I

V "" ~
~~

---

/

~

9
o
ili
~
F
w

~

w
CI)

!z

VPin2=VF8

Figure 2. Current Sense Input Threshold
versus Multiplier Input
0.16

~

3.5

~

0.12

~!.>~~
~

g

-8.0

~ -12

\

(!J

0

53w

~

.:,

V

0

>

0

-25

25

50

75

100

125

-20
10

100

1.0 k

10 k

2.55 V

3.0V

2.5V

2.5V

2.45 V

2.0V

Figure 7. Error Amp Output Saturation
versus Sink Current

(!J

~

4.0

VCC= 12V
VFB = 2.7 V
TA = 25'C

V
./

>

0

3.0

~

a:

::::>

!;;: 2.0

en
f-

::::>

c-

f-

::::>
0

1.0

j

./

......

L

~
120 w

.e:

150
180
10M

Figure 8. Restart Time Delay versus Temperature
525

0

z

en
en
w

1.0 ~s/DlV

0.5~s/DIV

w

c-

Figure 6. Error Amp Large Signal
Transient Response

Figure 5. Error Amp Small Signal
Transient Response

~

:J:

t, FREQUENCY (Hz)

TA, AMBIENT TEMPERATURE ('G)

5.0

Phase

1.0 M

100 k

!C..
w
en

«

90

1,\

«

al

u. 16
~ - -55

6
60

~~

o

30

V

V

V

1475

'\.

~
w

./

Cl

w 425
:;;
t=

~

i'!

t3
a:
~

375

""

""'-.
.............

r'......

VCC = 12V

..............
..............

325

m

>"'

0.5

1.0

1.5

2.0

275
-55

-25

0

25

50

75

TA, AMBIENT TEMPERATURE ('G)

ISink, OUTPUT SINK CURRENT (mA)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-391

~

100

125

MC34261, MC33261
Figure 10. Output Saturation Voltage
versus Load Current

Figure 9. Zero Current Detector Input Threshold
Voltage Change versus Temperature

:> 40
§.
C!:I

o~ 20

~

w

tlj -2.0

...... ~

!:i

Upper ThreSh;(Vin Increasing)

~

9o

~

:I:

~ -4.0

~ t--

.............

ffl

!E
I-

!:i
o

VCC=12V

C!:I

-20

- r-...........

LowerT reshold
(Vin Derasing)
-40
-55

o

-25

W

~

~

~
100

--- --

"---

_ Source Saturation
(Load to Ground)

-

o
~

g; -6.0

J

!o:
en

!3
0..
5

4.0

I

Sink Saturation
(Load to VCC;)

~ 2.0
1ii

......r

>'"

Gnd"

------

125

TA. AMBIENT TEMPERATURE (OC)

w

Figure 11. Drive Output Waveform

VCC=12V
80 itS Pulsed Load
120 Hz Rate

Vccl'

~

w

C!:I

!:i0

-

-

....-...

--

----

I"

80
160
240
10. OUTPUT LOAD CURRENT (rnA)

320

Figure 12. Drive Output Cross Conduction

>

90%

>
e;

l-

::>

>-

0..

I-

0

::>
0

ori

-?
IZ

;;::

W

a:
a:

~
E

::>
0

10%

0

~

~

0..
0..

::>

en
0
0

100ns/DIV

Figure 14. Undervoltage Lockout Thresholds
versus Temperature

Figure 13. Supply Current versus Supply Voltage
16

12

a:
a:
~

8.0

w

10

C!:I

!:i

~ 9.0

/'

~

0..
0..

0..
0..

VFB = OV
Current Sense = 0 V
Multiplier = 0 V
CL=1.0nF
f=50kHz
TA = 25°C

::>

en

8 4.0
o
o

Start-Up Threshol
(VCC Increasing)

~

J

!z
w
0

11

I

<-

§. 12

::>

100 ns/DIV

10

20

30

::>

en 8.0
o·
~

Minimum Operating Threshold
(VCC Decreasing)

7.0

40

6.0
-55

VCC. SUPPLY VOLTAGE M

-25

0
25
50
75
TA. AMBIENT TEMPERATURE (OC)

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-392

100

125

MC34261, MC33261
FUNCTIONAL DESCRIPTION

Introduction
Most electronic ballasts and switching power supplies use
a bridge rectifier and a filter capacitor to derive raw DC voltage from the utility AC line. This simple rectifying circuit draws
power from the line when the instantaneous AC voltage exceeds the capacitor's voltage. This occurs near the line voltage peak and results in a high charge current spike. Since
power is only taken near the line voltage peaks, the resulting
spikes of current are extremely nonsinusoidal with a high
content of harmonics. This results in a poor power factor
condition where the apparent input power is much higher
than the real power.
The MC34261, MC33261 are high performance, critical
conduction, current mode power factor controllers specifically
designed for use in off-line active preconverters. These devices provide the necessary features required to significantly
enhance poor power factor loads by keeping the AC line current sinusoidal and in phase with the line voltage. With proper
control of the preconverter, almost any complex load can be
made to appear resistive to the AC line, thus significantly reducing the harmonic current content.
Operating Description
The MC34261, MC33261 contains many of the building
blocks and protection features that are employed in modern
high performance current mode power supply controllers.
There are, however, two areas where there is a major difference when compared to popular devices such as the
UC3842 series. Referring to the block diagram in Figure 15,
note that a multiplier has been added to the current sense
loop and that this device does not contain an oscillator. A
description of each of the functional blocks is given below.
Error Amplifier
A fully compensated Error Amplifier with access to the
inverting input and output is provided. It features a typical
DC voltage gain of 85 dB, and a unity gain bandwidth of
1.0 MHz with 58° of phase margin (Figure 4). The non inverting input is internally biased at 2.5 V ±2.0% and is not
pinned out. The output voltage of the power factor converter is typically divided down and monitored by the inverting
input. The maximum input bias current is -1.0 ~ which
can cause an output voltage error that is equal to the
product of the input bias current and the value of the upper divider resistor R2. The Error Amp Output is internally
connected to the Multiplier and is pinned out (Pin 2) for
external loop compensation. Typically, the bandwidth is set
below 20 Hz, so that the Error Amp output voltage is relatively constant over a given AC line cycle. The output
stage consists of a 500 IlA current source pull-up with a
Darlington transistor pull-down. It is capable of swinging
from 2.1 V to 5.7 V, assuring that the Multiplier can be
driven over its entire dynamic range.
Multiplier
A single quadrant, two input multiplier is the critical element that enables this device to control power factor. The
AC haversines are monitored at Pin 3 with respect to

ground while the Error Amp output at Pin 2 is monitored with
respect to the Voltage Feedback Input threshold. A graph
of the Multiplier transfer curve is shown in Figure 1. Note
that both inputs are extremely linear over a wide dynamic
range, 0 V to 3.2 V for the Multiplier input (Pin 3), and 2.5
V to 4.0 V for the Error Amp output (Pin 2). The Multiplier
output controls the Current Sense Comparator threshold
(Pin 4) as the AC voltage traverses sinusoidally from zero
to peak line. This has the effect of forcing the MOSFET
peak current to track the input line voltage, thus making the
preconverter load appear to be resistive.
Pin 4 Threshold z 0.62(VPin 2 - VFB)VPin 3
Zero Current Detector
The MC34261 operates as a critical conduction current
mode controller, whereby output switch conduction is initiated
by the Zero Current Detector and terminated when the peak
inductor current reaches the threshold level established by
the Multiplier output. The Zero Current Detector initiates the
next on-time by setting the RS Latch at the instant the inductor current reaches zero. This critical conduction mode of operation has two significant benefits. First, since the MOSFET
cannot turn on until the inductor current reaches zero, the
output rectifier's reverse recovery time becomes less critical
allowing the use of an inexpensive rectifier. Second, since
there are no deadtime gaps between cycles, the AC line current is continuous thus limiting the peak switch to twice the
average input current.
The Zero Current Detector indirectly senses the inductor
current by monitoring when the auxiliary winding voltage falls
below 1.6 V. To prevent false tripping, 110 mV of hysteresis
is provided. The Zero Current Detector input is internally protected by two clamps. The upper 6.7 V clamp prevents input
overvoltage breakdown while the lower 0.7 V clamp prevents
substrate injection. Device destruction can result if this input
is shorted to ground. An external resistor must be used in
series with the auxiliary winding to limit the current through
the clamps.
Current Sense Comparator and RS Latch
The Current Sense Comparator RS Latch configuration
ensures that only a single pulse appears at the Drive Output
during a given cycle. The inductor current is converted to
a voltage by inserting a ground referenced sense resistor
Rg in series with the source of output switch Ql. This voltage
is monitored by the Current Sense Input and compared to
the Multiplier output voltage. The peak inductor current is
controlled by the threshold voltage of Pin 4 where:
Pin
Ipk

Threshold
Rg

With the component values shown in Figure 16, the
Current Sense Comparator threshold, at the peak of the
haversine varies from 1.1 V at gO Vac to 100 mV at 268
Vac. The Current Sense Input to Drive Output propagation delay is typically 200 ns.

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-393

~

..

MC34261, MC33261
Timer
A watchdog timer function was added to the IC to eliminate
the need for an external oscillator when used in stand alone
applications. The Timer provides a means to automatically
start or restart the preconverter ifthe Drive Output has been off
for more than 400 itS after the inductor current reaches zero.

III

is desirable if external circuitry is used to delay the start-up of
the preconverter.
Output
The MC34261/MC33261 contain a single totem pole output
stage specifically designed for direct drive of power
MOSFETs. The Drive Output is capable of up to ±500 mA peak
current with a typical rise and fall time of 50 ns with a 1.0 nF
load. Additional internal circuitry has been added to keep the
Drive Output in a sinking mode whenever the Undervoltage
Lockout is active. This characteristic eliminates the need for
an external gate pull-down resistor. The totem pole output has
been optimized to minimize cross conduction current during
high speed operation. The addition of two 10 n resistors, one
in series with the source output transistor and one in series
with the sink output transistor, reduces the cross conduction
current, as shown in Figure 12. A 16 V clamp has been
incorporated into the output stage to limit the high state VOH.
This prevents rupture olthe MOSFET gate when VCC exceeds
20V.

Undervoltage Lockout
An Undervoltage Lockout comparator guarantees that the
IC is fully functional before enabling the output stage. The
positive power supply terminal (VCC) is monitored by the
UVLO comparator with the upper threshold set at 10 V and the
lower threshold at 8.0 V (Figure 14). In the standby mode, with
VCC at 7.0 V, the required supply current is less than 0.5 mA
(Figure 13). This hysteresis and low start-up current allow the
implementation of efficient bootstrap start-up techniques,
making these devices ideally suited for wide input range off
line preconverter applications. An internal 36 V clamp has
been added from VCC to ground to protectthe IC and capacitor
C5 from an overvoltage condition. This feature

Table 1_ Design Equations
Calculation

Formula

Required Converter Output Power
Peak Inductor Current

Inductance

Notes

PO=VOIO

Calculate the maximum required output power.

I
2V2PO
L(pk)- - - ll VaC (LL)

Calculated at the minimum required AC line lor
regulation. Let the elliciency n = 0.95.

2t (

J} - vac) Vac2

Let the switching cycle t = 20 liS.

L =
Vo VaC(LL) IL(pk)

Switch Oil-Time

In theory the on-time ton is constant. In practice ton tends
to increase at the AC line zero crossings due to the
charge on capacitor C6.

2POL
Ion=-llVac2

Switch On-Time

Ion

toll =

Vo

V2 Vac 1Sin 01
Switching Frequency

1= _ _
1_
ton + loll

Peak Switch Current

VCS
Rg=-IL(pk)

VM=

Multiplier Input Voltage

Vac

-1

The minimum switching frequency occurs at peak AC
line and increases as toll decreases.
Set the current sense threshold VCS to 1.0 V for
universal input (85 Vac to 265 Vac) operation and
to 0.5 V for fixed input (92 Vac to 138 Vac, or 184
to 276 Vac) operation.

V2

( : ; + 1)
Converter Output Voltage

Vo = Vrel (

BW=
Error Amplilier Bandwidth

:~

The off-time loll is greatest at peak AC line and
approaches zero at the AC line zero crossings.
Theta (0) represents the angle of
the AC line voltage.

+ 1) - liB R1
1

R1 R2
211 R1 + R2 C1

Set the multiplier input voltage VM to 3.0 V at high
line. Empirically adjust VM for the lowest distortion
over the AC line range while guaranteeing start-up at
minimum line.
The liB R1 error term can be minimized with a divider
current in excess of 100 IIA.
The bandwidth is typically set to 20 Hz lor minimum output ripple over the AC line haversine.

The following converter characteristics must be chosen:
Vo - Desired output voltage
10 - Desired output current
Vac - AC RMS line voltage
Vac(LL) - AC RMS low line voltage

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA
3-394

MC34261, MC33261

Figure 15. 80 W Power Factor Controller

..

lOOk

lN4934
06

R8
~-------------------,

MC34261

8

+100

~C5

2.2M
R7
X

-=-

0.1
R9

1.0nF
C3

0.68
Cl

Power Factor Controller Test Data
DC Output

AC Line Input
Current Harmonic Distortion (%)
Vrms

Pin

PF

THD

2

3

5

7

VO(p·pl

Vo

10

Po

n(%)

90

85.6

-0.998

2.4

0.11

0.52

1.3

0.67

10.0

230

0.350

80.5

94.0

100

85.1

-0.997

5.0

0.13

1.7

2.4

1.4

10.1

230

0.350

80.5

94.6

110

84.8

-0.997

5.3

0.12

2.5

2.6

1.5

10.2

230

0.350

80.5

94.9

120

84.5

-0.997

5.8

0.12

3.2

2.7

1.4

10.2

230

0.350

80.5

95.3

130

84.2

-0.996

6.6

0.12

4.0

2.8

1.5

10.2

230

0.350

80.5

95.6

138

84.1

-0.995

7.2

0.13

4.5

3.0

1.6

10.2

230

0.350

80.5

95.7

This data was taken with the test set·up shown in Figure 17.
T

Goilcralt N2881·A
Primary: 62 turns of # 22 AWG
Secondary: 5 turns of # 22 AWG
Gore: Goilcralt PT2510, EE 25
Gap: 0.072" total for a primary inductance of 320 I1H
Heatsink = AAVID Engineering Inc. 59038, or 59308
=

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-395

MC34261, MC33261

Figure 16. 175 W Universal Input Power Factor Controller
lOOk
RS

lN4934
D6

rMC342s1 -----------------, s

•

I ~100
I -=- Cs

330 ~

.::r::
-=-

O.SmA

0.1
Rg

1.0nF

Ca

Multiplier

3

L-f-----------

10k

Rl

'--_--11-_----'

0.68
Cl

Power Factor Controller Test Data
AC Line Input

DC Output

Current Harmonic Distortion (%)
Vrms

Pin

PF

THO

2

3

5

7

Vo(p-p)

Vo

10

Po

n(%)

90

187.5

-0.998

2.0

0.10

0.98

0.90

0.78

8.0

400.7

0.436

174.7

93.2

120

184.6

-0.997

1.8

0.09

1.3

1.3

0.93

8.0

400.7

0.436

174.7

94.6

138

183.6

-0.997

2.3

0.05

1.6

1.5

1.0

8.0

400.7

0.436

174.7

95.2

180

181.0

-0.995

4.3

0.16

2.5

2.0

1.2

8.0

400.6

0.436

174.7

95.6

240

179.3

-0.993

6.0

0.08

3.7

2.7

1.4

8.0

400.6

0.436

174.7

97.4

268

178.6

-0.992

6.7

0.16

2.8

3.7

1.7

8.0

400.6

0.436

174.7

97.8

This data was taken with the test set-up shown in Figure 17.
T = Coilcraft N28BO-A

Primary: 78 turns 01 # 16 AWG
Secondary: 6 turns 01 # 18 AWG
Core: Coilcraft PT421S. EE 42-15
Gap: 0.104" total lor a primary inductance 01 870 I'H
Heatslnk = AAVID Engineering Inc. 59038

MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA

3-396

MC34261, MC33261

Figure 17. Power Factor Test Set-Up

AC POWER ANALYZER

I

PM 1000

.•
'-:;_-:;-.
VA

c::::>

o

1

PF Vrms Arms
c::::>

c::::>

2

3

5

c::::>

c::::>

11

13

C)

Vc!

?
?
?
Ac! Ainst FREQ HARM

c::::>

0

?

7

..

---;.c-"'.-----'."

W
c::::>

-9-

9

0

Earth

An RFI filter is required for best performance when connecting the preconverter directly to the AC line. Commercially available

two stage filters such as the Delta Electronics 03DPCG5 work excellent. The simple single stage test filter shown above can
easily be constructed with a common mode transformer. Transformer (T) is a Coilcraft CMT3-28-2 with 28 mH minimum
inductance and a 2.0 A maximum current rating.

Start-up overshoot can be eliminated with the addition of a Soft-Start circuit.

Figure 18. Soft-Start Circuit

To Va

....
+-+-'VV\,-