1994_Siliconix_Analog_Integrated_Circuits 1994 Siliconix Analog Integrated Circuits
User Manual: 1994_Siliconix_Analog_Integrated_Circuits
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Analog Integrated Circuits
Data Book
1994
Siliconix
AMemberoftheTEMIC Group
Siliconix
AMember of the TBMIC Group
Sillconb: incorporated reserves the right to make changes in the circuitry or specifications at any time
without notice and assumes no responsibility for the use of any circuits described herein and makes no
representations that they are free from patent infringement.
Warning Regarding Life Support Applications
Siliconix products are not sold for applications in any medical equipment intended for use as a component of
any life support system unless a specific written agreement pertaining to such intended use is executed
between the manufacturer and Siliconix. Such agreement will require the equipment manufacturer either to
contract for additional reliability testing of the Siliconix parts and/or to commit to undertake such testing as
a part of its manufacturing process. In addition, such manufacturer must agree to indemnify and hold
Siliconix harmless from any claims arising out of the use of the Siliconix parts in life support equipment.
Stresses listed under '\<\I)solute Maximum Ratings" may be applied (one at a time) to devices without
resulting in permanent damage. This is a stress rating only and not subject to production testing. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
©1994 Siliconix incorporated
Printed in U.S.A
Siliconix
AMember ofthcTBMIC Group
About Siliconix
Siliconix is a leading manufacturer of semiconductor products for the computer, communications,
automotive, industrial, and hi-reI markets. The company's products bridge the interface gap between
real-world analog signals and the digitally operated microprocessor, providing both discrete and
integrated solutions to
•
sense, convert, and control signals at a system's input
• regulate and manage the system's power supplies
• provide useful signals and power at the output.
As a member of TEMIC, the microelectronics enterprise of Daimler-Benz, Siliconix has expanded its
worldwide presence and is further equipped to serve its customers on an international scale by sharing the
technologies and applications expertise of its sister companies and by taking advantage of a combined
international sales network.
In keeping with this global perspective, the company has aggressively pursued world-class standards of
cycle time, yields, and average outgoing quality in its manufacturing facilities in the United States and
Asia. Siliconix' continuous improvement efforts have resulted in dramatic improvements for each of
these areas and in numerous quality awards from its customers. The company has pursued international
quality certifications as well, and received ISO 9001 certification for its Santa Clara facilities in
November 1993. Our booklet "Making Continuous Improvement A Way of Business" tells more about
our commitment to quality. You can request a copy by calling (800) 554-5565.
The Company's manufacturing operations include wafer fabrication, assembly, and product testing. All
wafer fabrication is done in Santa Clara, where the facilities include a four-inch wafer fab and a Class 1,
six-inch wafer fab. High-volume assembly and product testing for plastic- and ceramic-packaged products
are handled in the Company's facilities in Thiwan, the Philippines, and China.
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Siliconix
AMembcr oltho TBMIC Group
Table of Contents
General Information
Alpha-Numeric Index ................................................................................ i
About This Data Book ............................................................................... ii
Ordering Information ............................................................................... iii
Section 1: Analog Switches
About Analog Switches
Selector Guide
DG129: Dual DPST JFET Analog Switch ............................................................. 1-1
DGI80!DGI81!DGI82: High-Speed Drivers with Dual SPST JFET Switches ............................... 1-4
DGI83!DGI84!DG185: High-Speed Drivers with Dual DPST JFET Switches .............................. 1-11
DGI86!DGI87!DGI88: High-Speed Drivers with SPDT JFET Switches .................................. 1-18
DGI89!DGI90!DGI91: High-Speed Drivers with Dual SPDT JFET Switches .............................. 1-25
DG200A: Monolithic Dual SPST CMOS Analog Switch ................................................ 1-32
DG201A/DG202: Monolithic Quad SPST CMOS Analog Switches ....................................... 1-37
DG201B!DG202B: Improved Quad CMOS Analog Switches ............................................ 1-44
DG201HS: High-Speed Quad SPST CMOS Analog Switch ............................................. 1-52
DG211!DG212: Low Cost Monolithic Quad SPST CMOS Analog Switches ............................... 1-60
DG211B!DG212B: Improved Quad CMOS Analog Switches ............................................ 1-68
DG221: Quad SPST CMOS Analog Switch with Latches ............................................... 1-75
DG243: General Purpose Monolithic Dual SPDT CMOS Analog Switch .................................. 1-81
DG271: High-Speed Quad Monolithic SPST CMOS Analog Switch ...................................... 1-85
DG300A/DG301A/DG302A/DG303A: CMOS Analog Switches ......................................... 1-90
DG304A/DG305A/DG306A/DG307A: CMOS Analog Switches ......................................... 1-99
DG308A/DG309: Quad MonolithicSPST CMOS Analog Switches ...................................... 1-107
DG308B!DG309B: Improved Quad CMOS Analog Switches ................................... ,........ 1-112
DG381A/DG384A/DG387A/DG390A: CMOSAnalogSwitches ........................................ 1-119
DG401!DG403!DG405: Low-Power, High-Speed CMOS Analog Switches ................................ 1-127
DG411!DG412!DG413: Precision Monolithic Quad SPST CMOS Analog Switches ........................ 1-137
DG417!DG418!DG419: Precision CMOS Analog Switches ............................................. 1-146
DG421!DG423!DG425: Low-Power, High-Speed, Latchable CMOS Analog Switches ...................... 1-155
DG441!DG442: Quad SPST CMOS Analog Switches ................................................. 1-163
DG444!DG445: Quad SPST CMOS Analog Switches ................................................. 1-171
DG540!DG541!DG542: WidebandNideo "T" Switches .............................................. 1-179
DG601: High-Speed Quad CMOS Analog Switch .................................................... 1-189
DG611!DG612!DG613: High-Speed, Low-Glitch D/CMOS Analog Switches ............................. 1-200
DG641!DG642!DG643: Low On-Resistance WidebandNideo Switches .................................. 1-208
DG5043: Monolithic General Purpose CMOS Analog Switch .......................................... 1-218
DG5143: Low-Power, High-Speed CMOS Analog Switch .............................................. 1-221
Table of Contents
Silicanix
AMcmbcr of the TBMIC Group
Section 2: Analog Multiplexers
About Analog Multiplexers
Selector Guide
DG406/DG407: 16-Channel/DuaI8-Channel High Performance CMOS Analog Multiplexers ................. 2-1
DG408/DG409: 8-Channel/DuaI4-Channel High Performance CMOS Analog Multiplexers ................. 2-11
DG428/DG429: Sinile, 8-Channel/DifferentiaI4-Channel Latchable Analog Multiplexers .................... 2-22
DG458/DG459: Fault Protected Single 8-Channel/Differential 4-Channel Analog Multiplexers ..... . . . . . . . . .. 2-34
DG485: Octal Analog Switch Array ................................................................. 2-42
DG506A/DG507A: Single 16-Channel/Differential 8-Channel CMOS Analog Multiplexers .................. 2-52
DGS08A/DG509A: Single 8-Channel/DifferentiaI4-Channel CMOS Analog Multiplexers ................... 2-60
DG528/DG529: Latchable Single 8-Channel/Differential 4-Channel Analog Multiplexers. . . . . . . . . . . . . . . . . . .. 2-70
DG534/DG538: 4-/8-Channel Wideband Video Multiplexers ............................................ 2-79
DG534A/DGS38A: 4-/8-Channel Wideband Video Multiplexers ......................................... 2-86
DG535/DGS36: 16-Channel Wideband Video Multiplexers ........................ : ................... 2-102
DG884: 8 X 4 Wideband Video Crosspoint Array .................................................... 2-113
DG894: Component Video Selector .......... ',' .................................................... 2-126
Section 3: WidebandNideo Amplifiers
About WidebandNideo Amplifiers
Selector Guide
'Si581: Unity-Gain Video Buffer .............................................. ~ ...................... 3-1
Si582: Wideband Low-Gain Amplifier ............................................. : . . . . . .. . . . . . . . . . .. 3-8
Si584: Quad Unity-Gain Video Buffer ............................................................... 3-16
Section 4: Voltage Converters
About Voltage Converters
Selector Guide
Si7660: Switched-Capacitor Voltage Converter. . .. . . .. . . . .. . .. . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . .. . . . .. . .. 4-1
Si7661: Switched-Capacitor Voltage Converter.. . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . .. 4-7
Section 5: Appendix
,Application Notes ............................................................................... 5-1
Reliability Report ..................................................................... .,......... 5-2
Package Information . ........................................................................... 5-5
Military Information
Military Conversion Thble .................................... ~ ................................. 5-11
Process Option Flows ......•................................................................... 5-12
Cross Reference . ............................................................................... 5-14
Section 6: Sales Offices .....................................................................
6-1
General Information
Siliconix
Alpha/Numeric Index
AMcmbcr of tho TBMIC Group
Standard Parts
DG129 ............ 1-1
DG180 ............ 1-4
DGI81 ............ 1-4
DG182 ............ 1-4
DG183 ........... 1-11
DG184 ........... 1-11
DG185 ........... 1-11
DG186 ........... 1-18
DG187 ........... 1-18
DG188 ........... 1-18
DG189 ........... 1-25
DG190 ........... 1-25
DGI91 ........... 1-25
DG200A ......... 1-32
DG201A ......... 1-37
DG20lB ......... 1-44
DG201HS ........ 1-52
DG202 ........... 1-37
DG202B ......... 1-44
DG211 ........... 1-60
DG21lB ......... 1-68
DG212 ........... 1-60
DG212B ......... 1-68
DG221 ........... 1-75
DG243 ........... 1-81
DG271 ........... 1-85
DG300A ......... 1-90
DG301A ......... 1-90
DG302A ......... 1-90
DG303A ......... 1-90
DG304A ......... 1-99
DG305A ......... 1-99
DG306A ......... 1-99
DG307A ......... 1-99
DG308A ........ 1-107
DG308B ........ 1-112
DG309 .......... 1-107
DG309B ........ 1-112
DG381A . ....... 1-119
DG384A . ....... 1-119
DG387A . ....... 1-119
DG390A . ...... , 1-119
DG401 .......... 1-127
DG403 .......... 1-127
DG405 .......... 1-127
DG406 ............ 2-1
DG407 ............ 2-1
DG408 ........... 2-11
DG409 ........... 2-11
DG411 .......... 1-137
DG412 .......... 1-137
DG413 .......... 1-137
DG417 .......... 1-146
DG418 .......... 1-146
DG419 .......... 1-146
DG421 .......... 1-155
DG423 .......... 1-155
DG425 .......... 1-155
DG428 ....•...... 2-22
DG429 ........... 2-22
DG441 .......... 1-163
DG442 .......... 1-163
DG444 .......... 1-171
DG445 .......... 1-171
DG458 ........... 2-34
DG459 ........... 2-34
DG485 ........... 2-42
DG506A ......... 2-52
DG507A ......... 2-52
DGS08A ......... 2-60
DG509A ......... 2-60
DG528 ........... 2-70
DG529 ........... 2-70
DG534 ........... 2-79
DG534A . ........ 2-86
DGS35 .......... 2-102
DGS36 .......... 2-102
DG538 ........... 2-79
DG538A . ........ 2-86
DG540 .......... 1-179
DG541 .......... 1-179
DG542 .......... 1-179
DG601 .......... 1-189
DG611 .......... 1-200
DG612 .......... 1-200
DG613 .......... 1-200
DG641 .......... 1-208
DG642 .......... 1-208
DG643 .......... 1-208
DG884 .......... 2-113
DG894 .......... 2-126
DGS043 ......... 1-218
DG5143 ......... 1-221
Si581 ............. 3-1
Si582 ............. 3-8
Si584 ............ 3-16
Si7660 ............ 4-1
Si7661 ............ 4-7
Military Parts
5962-8671602M ... 1-85
5962-9204101M .. 1-163
JM38510/11106B .. 1-18
JM38510/l1607B .. 1-99
5962-8767301CA ... 1-4
5962-9204102M .. 1-163
JM38510/11107B .. 1-25
JM38510/11608B .. 1-99
5962-8768901VA .. 2-70
7705301E .. .. .. ... 1-37
JM38510/11108B .. 1-25
JM38510!1230lB .. 1-32
5962-9068901M ... 1-25
781401CA ......... 1-1
JM38510/1160lB .. 1-90
5962-9073101M .. 1-137
JM3851O/1110lB ... 1-4
JM38510/11602B .. 1-90
5962-9073102M .. 1-137
JM3851O!11102B ... 1-4
JM38510!11603B .. 1-90
5962-9073103M .. 1-137
JM38510!11103B .. 1-11
JM38510!11604B .. 1-90
JM38510/19003B .. 2-52
5962-920401M .... 2-11
JM38510/11104B .. 1-11
JM38510/11605B .. 1-99
JM38510/19007B .. 2-60
5962-920402M .... 2-11
JM38510!11105B .. 1-18
JM38510!11606B .. 1-99
JM38510/19008B .. 2-60
JM38510/12302B .. 1-37
JM38510!1900lB .. 2-52
Siliconix
AMembor of the TBMICGt'OUP
About This Data Book
The products detailed in this data book include analog switches and multiplexers, wideband video
switches, multiplexers, crosspoints, buffers, amplifiers, and voltage converters. These products are
designed for applications in the industrial, instrumentation, computer peripherals, communications,
automotive, and military markets. Siliconix serves· these markets with products of unequaled
performance, quality and reliability through the use of its leading design, processing, packaging, and
testing technologies.
The
electrical
The product specifications listed in this data book are arranged in a simplified format.
tables and performance curves contain detailed information, simplifying the tasks of design and
component engineers. Each of the data sheets is controlled by the Siliconix Quality Assurance
organization, which guarantees all stated limits.
For More Information
To request additional literature please call 1-800-554-5565. Literature and samples can also be requested
from our sales representatives. See the sales office listings in Section 6.
Customer service representatives are available during normal West Coast business hours to provide
information on orders placed with the factory.
For Thchnical Support
In addition to the individual data sheets, which provide Application Hints, Siliconix offers a number of
Applications Notes and Thchnical Articles to help you with your designs. Please refer to the Application
Note listing in Section 5, and use our FaxBack system 408-970-5600 to obtain copies.
ii
Siliconix
Ordering Information
AMcmber of the TBMIC Group
Integrated Circuits Nomenclature
DG
506
T
Device Family
A
c
J
-4
T
Device Number
Device Revision (when used)
Operating Tem
Packa e
Process 0 tion
Device Family
Package
(1 or2 Letters)
(1 Letter)
DG Si -
J
Analog Switches and Analog Multiplexers
Siliconix Integrated Circuits
Device Number
(3- or 4-Digit Numbers)
A
K
L
M
N
P
R
Operating Temperature Range
W
Y
Z
Metal Can
Dual-In-Line Package - Plastic DIP
Dual-In-Line Package - Ceramic DIP
Flat Package
CerQuad J-Leaded Chip Carrier
Plastic J-Leaded Chip Carrier - PLCC
Dual-In-Line Package - Sidebraze
,Dual-In-Line Package - Sidebraze
Wide-Body Small-Outline Package (SOIC)
Narrow-Body Small-Outline Package (SOIC)
Leadless Chip Carrier - Lce
(1 Letter)
A
B
C
D
E
-55 to 125°C
-25 to 85°C
oto 70°C
-40 to 85°C
-40 to 105°C
Process Option
/883- Processing to the current
revision ofMIL-SID-883,
Level B. Compliant Non-JAN
-4 - Ruggedized Plastic Flow
All possible combinations of device types, temperature ranges, package types and MIL-883 process options are not necessarily available. Consult
individual data book pages or sales office for complete information.
iii
Silicanix
Ordering Information
AMcmber altho TBMIC Group
Military Nomenclature
t:r "r L
MIL·M·38510
BE C
UJAN"CertificationM_a_rk___
Military Designator
LeadFinish
A - Solder Dip
C - Gold Plate
m
Detan Specllication (Slash Sheet)
/111 - DG181 Series
/116 - DG300A Series
1123 - DG200A Series
1190 - DG506 Series
Device'JYpe _ _ _ _ _ _ _ _ _ _ _ _ _ _ _.....J
/111
/116
1123
/190
01 - DG181
Ol-DG182
03 -DGl84
04-DG185
01 - DG300A
02 -DG301A
03 -DG302A
04-DG303A
1....-_ _ _ _ _ _
05-DG187
06 - DG188
07-DG190
08 - DG191
05 -DG304A
06-DG305A
07-DG306A
08 -DG307A
01 - DG200A
02 - DG201A
01 - DGS06A
03 - DG507A
07 - DGS08A
08 - DG509A
Case Outline
C - 14-Pin Sidebraze
E -16-Pin Sidebraze
I - 10-Pin Metal Can
X -14-Pin Flatpack' or
28-Pin Sidebraze
DeviceClass
S - Class S
B -ClassB
'Package Designator for Flatpack Package
Changed 5/92 from "0" to "X"
Standard Military Drawing
5692
Federal Stock Class Designation.
Drawing
Number
{
~,
-
90731
RHA Designator
- = NonRHA
Pan Number - - - - - - - - - - - - - '
77052 - DGS08
90569 - DG401
90689- DG189
77053 - DG201
90731 - DG411
78014 - DG129
thruDG413
86716 - DG271
87673 - DG180
91552 - DG542
87689 - DG528
92041 - DG441/442
89763 - DG403
92042 - DG408/409
89961 - DG405
01 M
L
E A
Lead Finish
A - Solder Dip
C - Gold Plate
Case Out1ine
C -14-Pin Dual-In-Line
E - 16-Pin Dual-In-Line
I - 10-Pin Metal Can
F -Flatpack
X - 14-Pin Flatpack
V -18-Pin Dual-In-Line
2 -LCC
1....-_ _ _
• Applicable where documented by specification
L-_ _ _ _ _
iv
Device Class Designator*
M - Non-JAN class B
B or S - MIL-M-38510 certification and
qualification
Q or V - MIL-I-38535 certification and
qualification
Dash No.
Analog Switches . .
Siliconix
AMcmbcr of tho TBMIC Group
About Analog Switches
Siliconix is the world's leading supplier of high-performance, precision solid-state analog switches. For more
than twenty years, we've combined new technologies with our experience and expertise to produce new families
of leading-edge products.
Our DG4XX and DG6XX families of analog switches and multiplexers are one way Siliconix maintains its high
reputation for innovation. These new devices can be used to upgrade existing products or to open new doors to
high-performance analog switching. The DG4XX family includes all the most popular functions-SPST, SPDT,
and DPST-in single and dual switch configurations, along with several SPST quads. Packaging options include
both plastic and ceramic DIP, mini DIP, PLCC, and plastic SOIC packages for surface-mount assembly. These
are available in both industrial ( -40 to 86 0 C) and military ( - 55 to 125 0 C) temperature ranges. The growing
DG6XX series goes even further, giving you theJastest switching times and lowest on-resistance available.
The DG641/DG642, for example, are the industry's first analog switches with on-resistance below 10 g,
while the DG611/612/613 achieve switching speeds of 15 ns.
The DG2xx, DG3xx, and DG5XX families provide adequate performance for many applications. Siliconix
also offers its popular JFET (DGI8X) family of switches. Single-supply operation, charge injection
optimization, and a wide range of packaging options, including small outline and PLCC, are additional benefits.
CMOS
Since CMOS analog switches are parallel combinations of p- and n-channel MOSFETh, the effective
on-resistance is a combination of the PMOS and NMOS resistance curves (Figure 2). This gives a fairly
constant on-resistance over the entire analog voltage range. New CMOS switches also have the advantage of
very low quiescent supply current because, other than for channel leakage, no current flows in the driver except
when a control input transition occurs.
On
Ideal
v+
v+
v+
v+
Real
Analog Switch
So-;---t--'-r"WIr-1-'--+--..,...--oD
v-
S O--r---t--'-1-cr a....,r'--t---r--O D
vFigure 1. Comparison of the "Ideal" Switch to a Solid-State Analog Switch
Siliconix
AMcmbcr ofthe TBMIC Group
Metal-Gate and Silicon-Gate CMOS
Both metal- and silicon-gate technologies are incorporated into our CMOS processes, but each is used with
separate product lines. The mature metal-gate process is used for our DG2XX, DG3XX, and DGSXXfamilies.
Our newer silicon-gate process (DG4XX family) is recommended for applications needing state-of-the-art
performance and versatility.
Figure 3 gives a comparison of on-resistance curves for a JFET (DGI80), aD/CMOS (DG642), a metal-gate
CMOS (DG20IA), and a silicon-gate CMOS (DG400) analog switch.
D/CMOS "T" Switches
Siliconix manufactures analog switches and multiplexers for wideband/video applications using double-diffused
MaS (DMOS) technology. DMOS FETh are n-channel enhancement-mode MOSFETh which exhibit very low
capacitance and on-resistance compared to conventional CMOS devices. The result is wide bandwidth switches
which feature crosstalk and off-isolation performance as high as 100 dB at S MHz and 3 dB bandwidths in excess of
SOO MHz. These devices are ideal for broadcast video, digital data routing, high-end workstation networks and
imaging applications from medical to military. The DGS4x family of widebandlvideo "T" switches includes the
DGS40, DGS4I and DGS42 devices. The DG6IX family of high-speed non-T switches boast IS-ns switching times.
The DG64X family offers very low on-resistance.
Important Switch Parameters
Each switch family in the Siliconix product line has a set of optimized characteristics that make it suitable for
certain types of applications. ~everal major specifications should be compared and prioritized before seiecting
an analog switch for a particular circuit.
,
,
PMOS
\
\
\
1000
NMOS
\
,
-----~~'
,,
........
;'
....,;',
I
I
I
I
DCMOS (DG642)
I
100
~
10
'~~----~
-
o
+15
VA - Analog Signal Voltage (V)
Figure 2. Graph of CMOS Switch Resistance
vs. Analog Signal
JFET(DG~80)
~
v+ 15V
v- = -15V
TA= 25 D C
Effective Parallel Resistance
-15
~
DG411
;'
"
i-= CMOS (DG201A)
1=
r--
-15
-10
-5
5
10
o
VA - Analog Signal Voltage (V)
15
Figure 3. On-Resistance for Several Analog
Switch Technologies
..
Silicanix
AMcmbcr ortb TBMIC Group
On-Resistance (rn8(on»)
This specification is the dc resistance of the channel when the analog switch is in the on state. The on-resistance
of an analog switch depends upon the device type and the analog signal magnitude. Although the resistance may
vary across the entire analog signal range, the worst case is normally specified on the data sheet.
Switching Speed
Switching speed is the elapsed time from the application of the control signal on the input pin to the appearance
(or disappearance) of the analog signal at the output. Switching speed can be affected by the load on the analog
switch. Each ~ata sheet shows a switching time test circuit with a standard load for comparison purposes.
Switch Current
The amount of current that can be fed through the switch channel is sometimes important. For example, the
DG411 can handle up to 100 rnA of pulsed current or 30 rnA of continuous current, while the DG180 can handle
up to 200 rnA of continuous current.
Break-Before-Make vs. Make-Before-Break
For most analog switch applications, break-before-make switching is desired. Because it is often necessary to
disconnect one signal source before connecting another to avoid source crosstalk.
However,
make-before-break switching is critical in some control circuits, such as the feedback resistor gain selector for
programmable gain op amps, to avoid opening the loop.
Electrostatic Discharge Sensitivity (ESDS)
Electrostatic discharge is the transfer of charge that occurs when an object makes contact with a device at a
different potential. The standard MIL-883C, method 3015, classifies three levels of voltage protection that a
device must withstand on all pins. Class 1 devices are protected to 1999 V, Class 2 from 2000 to 3999 V, and Class
3 protection is greater than 4000 V. Beginning with DG411 series, most of our new devices have Class 2 ratings
and are marked accordingly.
Charge Injection
Charge injection is the transfer of charge to a load from the driver to the FET channels during switching. In a
sample-and-hold circuit, charge injection is critical as the charge added or subtracted from the holding
capacitor is seen as an offset error. The lower the charge injection the better. The DG4XX family, especially
the DG441 and DG411 series, are designed for balanced (linear and crossing near zero) charge injection. The
DG601 and DG611 use internal compensation to minimize the charge injection seen by applications sensitive to
this parameter.
Silicanix
AMcmbcr of the TBMIC Group
Power Supplies and Power Consumption
A bipolar supply means positive and negative voltages are used, while single supply means the negative supply is
grounded. Most analog designs use bipolar supplies, but a growing number of designers are turning to
single-supply operation to save board space and cost. Most of our devices work well with bipolar supplies, but
not all function properly in the single supply mode. The DG4XX family for analog switches and multiplexers
not only functions superbly in a single-supply mode, but it is fully characterized and specified with V + at 12 V
and V- at GND. The less the power consumed by a device within a system the better. Some members of the
DG4XX family draw under 1 tJA of supply current compared to the milliamperes required by previous products.
Interfacing
The two most common logic families are TIL and CMOS. The standard logic levels for both families are
displayed in Table 1. Not all analog switches are compatible with both types of logic. Refer to the functional
diagram section for each data sheet to determine the required logic levels.
Microprocessor compatibility is a growing concern when designing with analog switches. Standard analog
switches require a constant control signal present on the input to hold the switch in the desired position (on or
off). This could tie up a microprocessor control system unless external latches are added to control the switch.
The DG42X series has incorporated these latches, complete with control logic, on board to minimize parts
count and ease interface to microprocessor-based control systems.
Thble 1. Logic Levels for TIL and CMOS Compatibility
Logic
TIL
CMOS
0
s 0.8 V
s l.5V
1
'" 2.4V
'" (Vee - 1.5 V)
..
Analog Switch Selector Guide
Max
Max
Max
rn~on)
( )
~.........
DG417
DG418
35
35
2-Channel SPST
DG180
DG181
D0401
Functional
ConfiguratioD
1-Channel SPST
........<
.........
_...J
........<
.........
_...J
4-Channel SPST
........-r'
.........
_...J
........-r'
.........
_...J
........-r'
.........
_...J
........-r'
.........
_...J
Max Power
~
Supply Range
Max
On-Chip
Logic
CODsumptioD
(V)
Regulator
(mW)
Package
Comments
Page
60
60
44
44
-
0.035
0.035
J,K, Y
J,K, Y
8-Pin Package
8-Pin Package
1-146
1-146
400
150
150
N/A
N/A
80
36
36
44
A,p,X
A,p,X
J,K,Z
JFET
JFET
-
120
120
0.035
1-4
1-4
1-127
0.25
1
1
250
300
250
80
8
30
44
44
44
J,K
A,J,K,P
A,J, K,P
Latches
-
0.035
7.65
03
50
70
75
1
2
1
300
1000
250
10
-10
N/A
44
44
36
7.65
60
120
J
A,J,K
A,p,X
-
DG641
DG411
DG412
15
35
35
10
0.25
0.25
70
175
175
-19
5
5
21
44
44
108
0.035
0.035
J,Y
J,K, Y,Z
J,K, Y,Z
D0413
DG601
DG271
35
35
50
0.25
4
1
175
45
65
5
13
9
44
22
44
Yes
Yes
0.035
180
225
J,K, Y,Z
J,K, Y,Z
J,K, Y,Z
High Speed
High Speed
1-lF
1-189
1-85
DG20lHS
DG540
DG541
50
60
60
1
10
10
50
70
70
5
-25
-25
44
21
21
Yes
Yes
Yes
240
108
108
J,K, Y,Z
J,N,P
J,p,Y
High Speed
Video
Video
1-52
1-179
1-179
DG611
DG612
DG613
60
60
60
0.25
0.25
0.25
35
35
35
1
1
1
21
21
21
-
-0.018
0.018
0.018
J,K, Y,Z
J,K, Y,Z
J,K, Y,Z
Glitchless, High Speed
Glitchless, High Speed
Glitchless, High Speed
1-200
1-200
1-163
DG20lB
DG202B
DG211B
85
85
85
0.5
0.5
0.5
300
300
300
1
1
1
44
44
44
Yes
Yes
0.765
0.765
0.3.5
J,K, Y
J,K, Y
J,Y
-
1-44
1-44
1-68
DG212B
DG308B
DG309B
DG441
85
85
85
85
0.5
0.5
0.5
0.5
300
200
200
250
1
1
1
1
44
44
44
44
-
0.35
.0.03
.0.03
1.5
J,Y
J,K, Y
J,K, Y
J,K, Y
00442
00444
OG445
85
85
85
0.5
0.5
0.5
250
250
250
1
1
1
44
44
44
1.5
0.035
0.035
J,K, Y
J,Y
J,Y
1m
toN
(ns)
0.25
0.25
175
175
10
30
35
10
1
0.25
D0421
DG300A
DG304A
35
50
50
DG381A
DGZOOA
DG182
Part
Number
-
1YP
-
Yes
Yes
-
-
-
Yes
Yes
-
-
-
,...
JFET
Video
-
-
-
General Purpose
. General Purpose
General Purpose
General Purpose
-
-
1-155
1-90
1-99
1-119
1-32
1-4
1-208
1-137
1-137
1-68
1-200
1-200
1-163
1-163
1-171
1-171
Analog Switch Selector Guide (Cont'd)
4-Channel SPST
........
.......,.-('
_..J
Max
Max
l'J)s~QII)
~ )
IS(ol!)
(riA)
(ns)
toN
Q~
(p
On-Chip
Logic
Regulator
Max Power
Consumption
(mW)
Package
Comments
Page
DG221
DG308A
DG309
90
100
100
1
1
1
550
200
200
20
-10
-10
44
44
44
Yes
37.5
0.3
0.3
J,K, Y
J,K, Y
J,Y
Latches
1-75
1-107
1-107
DG201A
DG202
DG211
DG212
175
175
175
175
1
1
5
5
600
600
1000
1000
20
20
3
3
44
44
44
44
Yes
Yes
60
60
20.4
20.4
J,K, Y,Z
J,K
J,Y
J,Y
-
DG642
DG186
DG301A
8
10
50
10
10
1
100
400
300
-40
N/A
8
21
38
44
Yes
108
73
0.3
J,Y
A,P
A,J,K,Z
Video
JFET
DG187
DG419
DG305A
30
35
50
1
0.25
1
150
175
250
N/A
60
30
3B
-
A,p,X
J,K, Y
A,K,P
JFET
B-Pin Package
50
75
1
1
300
250
10
N/A
44
38
7.65
73
A,J,K
A,p,X
JFET
1-119
1-18
DG189
DG643
DG190
10
15
30
10
10
1
400
70
150
N/A
-19
N/A
36
21
36
-
73
0.035
0.3
DG387A
DG188
120
108
120
P
J,Y
p,X
JFET
Video
JFET
1-25
1-208
1-25
DG403
DG423
DG243
35
35
50
0.25
0.25
1
150
250
500
60
60
60
44
44
44
-
0.035
0.035
0.45
J,K, Y,Z
J,K,N
J,N
Latches
Latches
1-127
1-155
1-81
DG303A
DG307A
DG390A
50
50
50
1
1
1
300
250
300
8
30
10
44
44
44
-
7.65
0.3
7.65
J, K, p,Z
J, K, P, Z
J,K
DG5043
DG5143
DG542
50
50
60
75
1
0.5
10
1200
200
100
250
30
60
-25
N/A
44
44
21
36
-
9
0.035
108
120
J
J,K
J,p,Y
p,X
Part
Number
Functional
C 60 dB @ 1 MHz
• Make-Before-Break
• Minimizes Standby Power
Requirements
• Better Radiation Tolerance
• Less Distortion
• Higher Frequency Switching
• Smooth Closed Loop Response
•
•
•
•
Battery Powered Systems
Aerospace Control Systems
Low Distortion Circuits
High Frequency Switching Circuits
Description
The DG129 is a dual double-pole single-throw analog
switch for use in instrumentation, control, and audio
communication systems. It is ideally suited for applications
requiring a constant on-resistance over the entire analog
range.
On-resistance for the DG129 is 20 g (typical), and on-leakage
is < 2 nA With all switches off, total power consumption is
< 750 JLW. These switches have make-before-break action
and due to the processing are relatively radiation tolerant. An
enable pin (VR) simplifies interfacing with microprocessor, or
other logic.
Each device contains four junction field-effect transistors
(JFEll) to achieve constant on-resistance. Level-shifting
drivers enable low-level inputs (0.8 to 2.5 V) to control the
on-off state of each switch. With logic "0" atthe driverinput
the switches will be off. With a logic "I" at the input the
switches will be on. In the on-state each switch will conduct
current in either direction, and in the off-state each switch
will block voltages up to 20 V peak-to-peak.
Functional Block Diagram and Pin Configuration
Four spsr Switches per Package
Dual-In-Line
~
D2
S4
..
'fruth Table
IN2
Logic
Switch
0
OFF
ON
VNC
V+
D3
VR(ENABLE)
~
INl
Dl
Sl
lbpView
Not Recommended for New Designs
Logic "0" :s 0.8 V
Logic "1" .. 2.5 V
Switches Shown for Logic "1" Input
Ordering Information
Temp lbange
-55 to 125°C
Package
14-Pin Sidebraze
P-32167-Rev. B (11/15/93)
l'art NUlIIIIer
DG129AP/883
781401CA
1-1
Silicanix
DG129·
AMember of tho TBMIC Group
Absolute Maximum Ratings
V+toV- ........................................... 36V
V+toVO·.·····.···.·.··.· •. ··.··.··.·······.···.·.·36V
VoorVstoV- •..••......•.......................... 36V
VotoVs ..•.................•..................... ±22V
V+toVR······.· .. ···.···········.···.·.··.·.··.··.·25V
VRtoV- ...........................................• 25V
VINtoV- ...............................•........... 30V
V+ toVIN ........................................... 25V
VINtoVR ......................... :' ................ ±6V
Current (any terminal) ...............1................ 30 rnA
Storage Thmperture . . . . . . . . . . . . . . . . . . . . . . . . . . .. -65 to 150'C
Power Dissipation'
14-Pin DIP" ....•.................................. 825 mW
Notes:
a. All leads welded or soldered to PC Board.
b. Derate 11 mWrC above 75'C
Specifications 8
Thst Conditions
Unless Otherwise Specified
V+=12V,V-=-18V,
VR = OV,VIN = 0.8 Vor2.5vf
Thmpb
Mind
VANALOG
Full
-10
roS(on)
Is= -10mA, Vo = 10V
Room
Full
Symbol
Parameter
ASuft"1X
-55 to 125'C
I
'JYpe
I
Maxd Unit
Switch
Analog Signal Range
Drain-Source On-Resistance
10
V
20
30
60
n
-1
-100
0.03
1
100
1
100
Source-Off Leakage Current
Is(off)
VS= ±10V,Vo= :FlOV
Room
Full
Drain-Off Leakage Current
IO(off)
Vo = ±10V, Vs = :FlOV
Room
Full
1
-100
0.02
Channel-On Leakage Current
IO(on)
Vo=Vs=-10V
Room
Full
-2
-100
-0.03
Input Current with Input Voltage High
IJNH
VIN = 2.5 V
Room
Full
15
60
120
Input Current with Input Voltage Low
IJNL
VIN= 0.8 V
Room
Full
0.005
0.1
2
Thm-OnTIme
!oN
!oFF
See Figure 1
Room
0.5
0.6
Room
1.1
1.6
Room
2.4
nA
Input
Thrn-Offnme
Source-Off Capacitance
Cs(off)
Drain-Off Capacitance
CO(off)
Channel-On Capacitance
CO(on)
OIRR
Off-Isolation
f=lMHz
Vo, Vs=O
RL-75n,f -lMHz
Room
2.4
Room
2.8
Room
>60
flA
!'8
pF
dB
Supply
Positive Supply Current
1+
Negative Supply Current
l-
Reference Supply Current
IR
Positive Supply Current
1+
Negative Supply Current
1-
Reference Supply Current
IR
Room
One Channel On
VIN =2.5V
2.5
Room
-1.8
-1.6
Room
1.4
1.1
Room
-25
-0.5
Room
-25
-0.5
Room
All Channel Off
BothVIN=OV
0.6
3
rnA
25
flA
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25'C, Full = -55 to 125'C.
c. 'tYpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
1-2
P-32167-Rev. B (11/15/93)
Not Recommended for New Designs
Siliconix
DG129
AMcmber aftho TeMIC Group
Test Circuits
Switch output waveform shown forVs = constant with logic input waveform as shown. Note that Vs may be + or - as per switcbing time test circuit. Vo
is the steady state output with switch on. Peedthrough via gate capacitance may result in spikes at leading and trailing edge of output waveform.
+12 V
V+
Logic
Input
Switch
Input
3V
3V
tr <10ns
tf <10ns
50%
OV
Vs
OV
90%
Switch
Output OV
-
Logic "1" = Switch On
CL (includes fixture and stray capacitance)
Vo=Vs
tON
RL + lllS(on)
Figure 1. Switching TlI1le
Application Hints
V+
Positive Supply
Voltage
(V)
VNegative Supply
Voltage
VB.
Reference
Voltage
(V)
(V)
12
-18
15
-15
7
VIN
iAlllic Input
Voltage
VSorVD
ADalog Voltage
VlN.U(mIn)!VINl.{IIIIIX)
(V)
Rauge
0
2.5/0.8
-10 to 10
0
2.5/0.8
-7 to 13
-12
0
2.5/0.8
-5t05
5
-15
0
2.5/0.8
-7t03
5
-10
0
2.5/0.8
-2t03
Not Recommended for New Designs
P-32167-Rev. B (11/15,93)
..
(V)
1-3
Siliconix
DG180/181/182
AMemberofthe'I'BMICGroUP
High-Speed Drivers with Dual SPST JFET Switches
Features
Benefits·
Applications
• Constant On·Resistance Over Entire
Analog Range
• Low Leakage
• Low Crosstalk
• Rad Hardness
•
•
•
•
•
•
•
•
•
•
Low Distortion
Eliminates Large Signal Errors
High Precision
High Bandwidth Capability
Fault Protection
Andio Switching
Video Switching
Sample/Hold
Guidance and Control Systems
Aerospace
Description
The DG180/181/182 are preCISIon dual single-pole, on-resiStance include audio switching, video switching, and
single·throw (SPST) analog switches designed to pnwide data acquisition.
accurate switching of video and audio signals. This series is
ideally suited for applications requiring a. constan\ .
on·resistance over the entire analog range.
To alV.b.lev¢ faSt and a<:eurate. switch performance, each
device ooD:1pri~ foUt 'n·cha~l JFET transistors and a
The major difference in the devices is the on·re~iatance . TIL oontpatible bipolatdrlver. In the on state, each switch
(DG180-10 Q, DG181-30 Q, DG182--7S Q). Reduced ronducts current equally well in either direction. In the off
errors are achieved through low leakage cunent (lD(on) to.D.ditioD, the switches will block up to 20 V peak·to·peak,
< 2 nA). Applications which benefit from the flat WET with feedthrough' of less than -60 dB at 10 MHz.
Functional Block Diagram and Pin Configuration
Dual·ln·Line
Metal Can
Flat Package
~
S1
D1
L.......u-
NC
1
14
S2
2
13
D2
3
12
NC
NC
4
11
NC
IN1
5
10
IN2
V+
6
9
VL
7
8
V-·
VR
D1
IN2
IN1
V-
ThpView
Refer to JAN38510 Information, Military Section
. VL
ThpView
ThpView
Ordering Information - DG180/181/182
TeJllpRange
Padaige
DG180BA
10-Pin Metal Can
-25 to 85°C
14-Pin Sidebraze
10·Pin Metal Can
-55 to 125°C
14·Pin Sidebraze
14·Pin Flat Pack
1-4
·COmmon to Substrate and Case
Part Number
DG181BA
DG182BA
DG180BP
DG181BP
DG182BP
DG180AA/883,5962-8767301lA
DG181AA/883, JM38510/11101BlA
DG182AA/883, JM38510/11102BlA
DG180AP/883,5962-8767301CA
DG181AP/883, JM38510/11101BCA
DG182AP/883, JM38510/11102BCA
5962-8767301XA
JM38510/11101BXA
JM38510/11102BXA
lruth Thble
Logic
o
Switeh
ON
OFF
Logic"O" s 0.8 V
Logic "I" .. 2.0 V
SWitches Shown for Logic "I" Input
P·32167-Rev. B (11/15/93)
Siliconix
DG180/181/182
AMcmbcr altho TBMIC Group
Absolute Maximum Ratings
V+toV- ........•.••.••••..•.............•......... 36V
V+toVo ..•.......••..•..............•............. 33V
VotoV- .............••.•........•..........•..•.... 33V
Vo toVo ......••.••.............................. ±22V
VL toV- ..........•..•.........•..•.•.............. 36V
VLtOVIN ...........•.•.............................. 8V
VLtOVR •........•..••............................... 8V
VINtoVR .......•..•......•.......................... 8V
VR to V- ...................................•..•..... 27V
VRtoVIN ..............................•.........•... 2V
Current (S or D) DG180 ..................•......... 200 rnA
Current (S or D) DG181, DG182 •........•.....••..•.. 30 rnA
Current (All Other Pins) . • • • • • . . • • . . . . . . . . • • • • • . . . . . .. 30 rnA
Storage Thmperature . . . . . . . . . . . . . . . . . . . . . . . . • .• -6S to lS0·C
Power Dissipation"
10-Pin Metal eanb ...•......•.•.•......•.••......... 4S0 mW
14-Pin Sidebrazec •••••••••••.••••••.••.•••••.••••.• 825 mW
14-Pin Flat Packd •••••••••.••.••••••.••.•••••••••••• 900 mW
Notes:
a. All leads welded or soldered to PC Board.
b. Derate 6 mW/·C above 7S·C
c. Derate 11 mWrC above 7S·C
d. Deratel0mWrCabove7S·C
Speci6cations a for DG180
Test Conditions
Unless Otherwise Specified
Parameter
ASuIf'lX
-SS to 125·C
I
BSuflix
-25 to ss·C
I
V+=lSV,V- = -lSV,VL=SV
VR = Ov, VIN = 2 V, 0.8 V£
Thmpb
VANALOG
Full
l'DS(on)
Is = -10mA, Vo = -7.SV
Room
Fun
7.5
10
20
Vs = ±10V, Vo = :FlOV
V+ = 10V,V- = -20V
Room
Hot
O.OS
10
1000
IS
300
Vs = ±7.S V, Vo = 'fo7.5V
Room
Hot
O.OS
10
1000
lS
300
Vs- ±10V,Vo- 'fol0V
V+ = 10V,V- = -20V
Room
Hot
0.04
10
1000
IS
300
Vs = ±7.S V, Vo = 'fo7.SV
Room
Hot
0.03
10
1000
IS
300
Symbol
'JYpc
Mind
Maxd
Mind
IS
-7.5
Marl
Unit
lS
V
IS
25
0
Analog Switeh
Analog Signal Range·
Drain-Source
On-Resistance
Source Off
Leakage Current
IS(off)
-7.5
Drain Off
Leakage Current
IO(af!)
Channel On
Leakage Current
Io(on)
VO=Vs= ±7.SV
Room
Hot
-0.1
loss
2 ms Pulse Duration
Room
300
Input Current with
Input Voltage High
IINH
VIN=5V
Room
Hot
<0.01
Input Current with
Input Voltage Low
IINL
VIN=OV
Full
-30
Ion
Iocr
See Switching TIme Thst Circuit
Room
240
400
600
Room
140
200
250
Vs - -Sv,Io - 0
Room
21
Vo = -5 V, Is = 0
Room
17
Vo-Vs-OV
Room
17
Room
>5S
Saturation Drain Current
-2
nA
-10
-200
-200
rnA
..
Digital Input
10
20
10
20
I1A
-250
-250
Dynantlc Cbaraeteristics
111m-On TIme
Thru-OffTune
Source-Off Capacitance
CS(off)
Drain-Off Capacitance
CO(off)
Channel-On Capacitance
CO(on)
OIRR
Off Isolation
f=lMHz
f -lMHz,RL -7S0
ns
pF
dB
Power Supplies
Positive Supply Current
I+
Room
0.6
Negative Supply Current
1-
Room
-2.7
Logic Supply Current
IL
Room
3
Reference Supply Current
IR
Room
-1
P-32167-Rev. B (11/1S/93)
VIN = Ov, or SV
1.S
1.5
-S
-5
4.S
4.5
-2
rnA
-2
1-5
Siliconix
DG180/181/182
AMember of tho TBMIC Group
Specificationsa for DG181
Test Conditions
Unless Otherwise Specified
ASuff"1X
-55 to 125·C
I
B Suffix
-25 to 8S·C
I
V+ = 15 V, V- = -15 V, VL = 5V
VR = OV,VIN = 2 V,0.8VC
Tempb
VANALOG
Full
fDS(on)
IS = -10mA, VD = -7.5 V
Room
Full
18
30
60
Vs = :I: 10 V, VD = :nov
V+ = 10 V, V- = -20V
Room
Hot
0.05
1
100
5
100
Vs= :l:7.5V,VD= ;:7.5 V
Room
Hot
0,07
1
100
5
100
Vs = :l:10V,VD = ;:10V
V+ = 10V,V- = -20V
Room
Hot
0.5
1
100
5
100
Vs = :l:7.5V,VD = ;:7.5V
Room
Hot
0.6
1
100
5
100
ID(on)
VD=VS= :l:7.5V
Room
Hot
-0.02
Input Current with
Input Voltage High
IINH
VIN= SV
Room
Hot
<0.01
Input Current with
Input Voltage Low
IJNL
VIN=OV
Full
-30
Room
85
150
180
Room
95
130
150
Parameter
Symbol
type
Mind
Mud
Mind
15
-7.5
Maxd
Unit
15
V
50
75
r.!
Allalog Swltcl!
Analog Sigoal Rangee
Drain-Source
On-Resistance
Source Off
Leakage Current
Drain Off
Leakage Current
Channel On
Leakage Current
Is(off)
ID(ofl)
-7.5
-2
-200
nA
-10
-200
Dlgitallllput
10
20
10
20
I1A
-250
-250
DynaMic Charatterlstlcs
Thm-OnTIme
ton
Thm-OffTIme
!off
Source-Off Capacitance
~ofl)
Drain-Off Capacitance
CD(off)
Channel-On Capacitance
CD(on)
Off Isolation
OIRR
See Switching TIme 'lest Circuit
f=lMHz
Vs = -5V,ID = 0
Room
9
VD= -SV,Is=O
Room
6
VD=VS=OV
Room
14
Room
>50
f= 1 MHz, RL = 75r.!
ns
pF
dB
Power Supplies
Positive Supply Current
1+
Room
0.6
Negative Supply Current
1-
Room
-2.7
Logic Supply Current
IL
Room
3.1
Reference Supply Current
IR
Room
-1
VIN = OV,orSV
1-6
1.5
-5
1.5
-5
mA
4.5
-2
4.5
-2
P-32167-Rev. B (11/15/93)
Siliconix
DG180/181/182
A Member o( the TBMtC Group
Specifications a for DG182
Test Conditions
Unless Otherwise Specified
ASulTlX
-55 to 125'C
I
B Suffix
-25 to 85'C
I
V+ = 15V,V- = -15V,VL= 5V
VR = Ov, VIN = 2V, 0.8 yf
Tempb
VANALOG
Full
I'])S(on)
Is = -10 rnA, Vn = -7.5 V
Room
Full
35
75
150
Vs = ±10V, Vn = :nov
V+ = 10 V, V- = -20V
Room
Hot
0.05
1
100
5
100
Vs = ±10V, Vn = :HOV
Room
Hot
0.07
1
100
5
100
Vs= ±10V,Vn= :HOV
V+ = 10V,V- = -20V
Room
Hot
0.4
1
100
5
100
Vs= ±10V,Vn= :HOV
Room
Hot
0.5
1
100
5
100
In(on)
Vn=Vs=±10V
Room
Hot
-0.02
Input Current with
Input Voltage High
IJNH
VIN=5V
Room
Hot
<0.01
Input Current with
Input Voltage Low
IJNL
VIN=OV
Full
-30
Room
120
250
300
Room
100
130
150
Vs = -5 V, In = 0
Room
9
Vn = -5V,Is = 0
Room
6
Vn=Vs=OV
Room
14
Room
>50
Parameter
Symbol
'JYpc
Mind
Maxd
Mind
15
-10
Maxd
Unit
15
V
100
150
n
Analog Switch
Analog Signal Rangee
Drain·Source
On-Resistance
Source Off
Leakage Current
Drain Off
Leakage Current
Channel On
Leakage Current
IS(off)
In(off)
-10
nA
-10
-200
-2
-200
Digitallnput
10
20
10
20
!LA
-250
-250
Dynamic Cbaracteristics
1IIrn-On Tune
ton
1IIrn-Off Time
toff
Source-Off Capacitance
CS(off)
Drain-Off Capacitance
Cn(off)
Channel-On Capacitance
Cn(on)
Off Isolation
OIRR
See Switching Time Test Circuit
f=lMHz
f= 1 MHz, RL = 75 n
ns
pF
dB
Power Supplies
Positive Supply Current
1+
Room
0.6
Negative Supply Current
1-
Room
-2.7
Logic Supply Current
IL
Room
3.1
Reference Supply Current
IR
Room
-1
VIN = OV, or 5V
1.5
-5
1.5
-5
4.5
-2
4.5
rnA
-2
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25'C, Full = as determined by the operating temperature suffIX.
c. 'iypical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
P-32167-Rev. B (11/15/93)
1-7
Silicanix
DG180/181/182
AMcmbcr of the TBMIC Group
lYPicaJ Characteristics
Supply Current vs. Temperature
lIN vs. VIN and Temperature
5
4
100
,I
~
VINL=O
VINH = 5V
80
~
I"'-' ........ i"'--.
IL I - r--... 1'000.. ........ ........
........
3
........
......... ~
60
--
-IR
1
_
IINL
"
........-1-
2
1
40
......
r-.....
..........
20
1+
r- IINH
o
o
-55 -35 -15
5
25
45
65
85 105 125
-55 -35 -15
5
Thmperature ("g
230
DG182
-
.;".t"'"
10
~~
[::r-J
f==
g
~
~
:e
DG180
9
I-I--
VD- 7.5 V
Is=-lOmA
0
25
50
75
I
I
I
,/
150
1/
-
1/
./
-'
- "'#>
#>
F-
5
110
V
lO
IJ'"
g
100
~
90
9
80
:e
/ / /
70
ID(on)
~
"7
A"1. . .
0.1
25
45
65
ID(off) f-~
85
Thmperature (og
1-8
..
tON •.,.
1"
-. --
~.
~.
1-
tOFF
~
~
25
,
45
65
85 105 125
Switching TIme vs. VD and Temperature (DG181/182)
130
120 I-- -
1
./
Thmperature ("g
V+ 10V
V
-20V
- VL 5V
c- VR=O
lS(off)
~
--
90
-55 -35 -15
100 125
==
=
..
..".
./
170
130
Leakage vs. Temperature (DG180)
....
105 125
......r_
,/
Thmperature ("g
100
85
I
190
110
-50 -25
65
I---VD=7.5V
210 I I-- - - VD = -7.5 V
~
1.0"""
IDGl~l
45
Switching TIme vs. VD and Temperature (DG180)
l"J>S(on) vs. Temperature
100
~
25
Thmperature (og
105
125
VD = 7.5 V
I - - - VD = -7.5 V
./'
-
. / ./'I~#>
1/
1/
./..
."
60 -:;r
...,.;
..,
--
1/
,
50
-55 -35 -15
_.--, , . .--1-
- 1'--
tOFF
~
I-'
5
25
45
65
85 105 125
Thmperature (og
P-32167-Rev. B (11/15/93)
Silicanix
DG180/181/182
AMember ofthe TBMIC Group
1Ypical Characteristics (Cont'd)
ID(olr) vs. Thmperature (DGI81/182)
Capacitance vs. YD orYs (DGI80)
30
100
10V,V
10 V, Vs
=V+
-VD
20V
10V
26
_f~B~HzI
,
10
"- ~of1
22
-
BSuff",
~
~
""""'"
1/ASuff",
18
:: ~
14
0.1
--
--
......
10
45
65
85
Thmperature (0C)
105
-8
o
8
-4
4
VD or Vs - Drain or Source Voltage (V)
125
Off Isolation vs. Frequency
Capacitance VS. YD or Ys (DGI81/182)
100
.~
18 '- VINL = 0.8 V
VINH = 2V
16 _ f=lMHz
90
.I 1CD(on)
80
14
12
10
8
6
70
~
&:i'
60
0
50
~
-- .......
f!l
CS(off),_
........ 1"-000..
-r-
.1
20
Capacitance is measured from test terminal
to common.
10
o
-10 -8 -6 -4 -2
0
2
4
6
8
10
VD or Vs - Drain or Source Voltage (V)
II
I~G1Jl!~8~ 1
.111
........
I'
....
DG180
........
rr-
"-
...
40
30
CD(off) -
4
2
Ci(Off) I
I...,..000o'
25
20
_I
-r
CD(on)
V+ = 15 V, V- = -lSV
VR=0,VL=5V
RL=75r.!
o riINI
loS
"
...
ililiti I IIIII
s
lOS
f - Frequency (Hz)
Schematic Diagram (1YPical Channel)
V+
S
IN
D
VP-32167-Rev. B (11/15/93)
Figure I.
1-9
Bilicanix
DG180/181/182
AMcmber of the 'll!MIC Group
Test Circuits
Feedthrough due to charge injection may result in spikes at the leading and trailing edge of the output waveform.
+5V
+15V
tOw. Vs = -3V
1, <10ns
3V
Logic
Input
toN: Vs=3V
I{ <10ns
OV
Vo
3V
OV
-
-
Switch
Output
CL (includes fIXture and stray capacitance)
RL
VOUT = Vs x RL + rDS(on)
-3V
Figure 2.
:~,v
---------..::lI~O%
Switching Tune
Application Hints a
VlI(
v..
VR
Voltage
(V)
Logic Supply
Voltage
(V)
Reference Supply
Voltage
(V)
15h
-15
5
GND
2.0/0.8
-7.5 to 15
10
-20
5
GND
2.0/0.8
-12.5 to 10
12
-12
5
GND
2.0/0.8
-4.5 to 12
15h
-15
GND
2.0/0.8
-10to15
10
-20
GND
2.0/0.8
-15 to 10
12
-12
GND
2.0/0.8
-7 to 12
V+
V-
Positive Supply
Negative Supply
Switch
Voltage
(V)
DG180
DG181
DG182
Logic Input
Voltage
5
5
5
VOOl(mtn)/
.V~mas)
Vs
Analog Voltage
Range
(V)
Notes:
a. Application Hints are for DESIGN AID ONLY, not guaranteed and not subject to production testing.
b. Electrical Parameter Chart based on V + = 15 V, VL = 5 V, VR = GND
1-10
P-32167-Rev. B (11/15/93)
Siliconix
DG183/184/185
AMember oCthe TBMIC Group
High-Speed Drivers with Dual DPST JFET Switches
Features
Benefits
Applications
• Constant On-Resistance Over Entire
Analog Range
• Low Leakage
• Low Crosstalk
• Break-Before-Make Switching
• Rad Hardness
•
•
•
•
•
•
•
•
•
•
•
Low Distortion
Eliminates Large Signal Errors
High Precision
Improved Channel Isolation
Eliminates Inadvertent Shorting
Between Channels
• Fault Protection
Audio Switching
Precision Switching
Video Switching
Video Routing
SamplelHold
Aerospace
Description
The DG183/184/185 are precislOn dual double~pole,
single-throw (DPST) analog switches designed to provide
accurate switching of video and audio signals. Tills series is
ideally suited for applications requiring a constant
on-resistance over the entire analGg range.
The major difference in the dl'lvices is the on-resistance
(DG183-10 Q, DGl84-----30 Q, DG185-75 Q). Reduced
errors are achieved through low leakage current (ID(on)
< 2 nA). Applications which benefit from the flat JFET
on-resistance include audio switching, video switching, and
data acquisition.
To achieve fast and accurate switch performance, each
device comprises four n-channel JFET transistors and a
TTL compatible bipolar driver. In the on state, each switch
conducts current equally well in either direction. In the off
condition, the switches will block up to 20 V peak-to-peak,
with feedthrough of less than -60 dB at 10 MHz.
Functional Block Diagram and Pin Configuration
Dual-In-Line
Dl
Flat Package
Sl
14
S3
D4
2
13
D3
Dz
3
12
Dl
S4
NC
IN!
D3
V-
Sz
4
11
Sl
S3
VR
lNz
5
10
INl
9
VL
V+
VL
6
S4
7
8
V-*
VR
D4
V+
NC
INz
Dz
Sz
ThpView
Refer to JAN38510 Information, Military Section
'Common to Substrate and Case
ThpView
Ordering Information - DG183/184/18S
Package
TeDlpRange
Part NUDlber
DG183BP
-25 to 8S'C
16-Pm Sidebraze
16-Pin Sidebraze
-SSto 12S'C
14-Pin Flat Pack
P-32167-Rev. B (11/15/93)
DG184BP
DG18SBP
DG183AP/883
DG184AP
DG184AP/883. JM38S10/11103BEA
DG18SAP/883. JM38S10/11104BEA
JM38SlO/11103BXA
JM38510/11104BXA
'Iruth 11tble
wgle
Switcll
o
OFF
ON
Logic ·0" :S 0.8 V
Logic "I" '" 2.0 V
Switches Shown for Logic "I" Input
1-11
Siliconix
DG183/184/185
AMcmbcr of tho 'I'BMIC Group
Absolute Maximum Ratings
V+toV- .........•.•.••.........•.................. 36V
V+toVD ...........•.......................•......• 33V
VDtoV- .•...•..•..••.•..•...•...•..•............... 33V
VD toVD ....•......•............................. ±22V
VL toV- ........................................... 36V
VLtoVIN ............................................ sv
VLtoVR ..................................•..•....... SV
VINtoVR ................... '......................... SV
VRtoV- .........•..•......•....................•... 27V
VRtoVIN ............................................ 2V
Current (S or D) D01S3 .......•.....•...•.......... ZOO rnA
Current (S or D) 00184, DG1SS ..........•........... 30 rnA
Current (All Other Pins) . . . . . . . . . . . . . . . . . . • . . . . . . . . . .. 30 rnA
Storage'Thmperature . . • . . . . . . . . . • . . . . . . . . . . . . •• -65 to lS0'C
Power Dissipation"
16-Pin Sidebrazeb ••..•.••.••••••.•••••.•••••••••••• 900 mW
14-Pin Flat Pack" .......................•......•.... 900 mW
Notes:
a. All leads welded or soldered to PC Board.
b. Derate12mW/'Cabove7S'C
c. Derate 10 mWI'C above 7S'C
Specifications a for DG183
Thst Conditions
Unless Otherwise Specified
Parameter
Analog Signal Range"
Symbol
V+ = lSV,V- = -15 V, VL= SV
VR = Ov, VIN = O.S Vor2vr
CDS(oo)
Source Off
Leakage Current
IS(off)
Drain Off
Leakage Current
ID(off)
Channel On
Leakage Current
Saturation Drain Current
Tempb
lYPc
Is = -10mA, VD = -7.5 V
Room
Mind
-7.5
I
B Suff"1X
-ZS to SS'C
Marl
Mind
15
-7.5
I
Maxd
Unit
15
V
7.5
10
20
15
ZS
n
Full
VANALOG
Drain-Source
On-Resistance
ASuff"1X
-55 tolZS'C
Full
Vs - ±10V,VD - 'FI0V
V+ = 10 V, V- = -2OV
Room
Hot
0.05
10
1000
15
300
Vs= ±7.5V,VD= 'F7.SV
Room
Hot
0.05
10
1000
15
300
Vs- ±lOV,VD - 'FI0V
V+ = 10 V, V- = -20V
Room
Hot
0.04
10
1000
15
300
Vs = ±7.5 V, VD = 'F7.5V
Room
Hot
0.03
10
1000
15
300
ID(oo)
VD=Vs=±7.5V
Room
Hot
0.1
IDSS
2 ms Pulse Duration
Room
300
Input Current with
Input Voltage High
IJNH
VIN=SV
Room
Hot
<0.01
Input Current with
Input Voltage Low
IlNL
VIN=OV
Full
-30
Room
240
400
600
Room
140
200
220
Vs - -SV,ID - 0
Room
21
VD= -SV,Is=O
Room
17
VD-VS-OV
Room
17
Room
>55
-2
-200
nA
10
-ZOO
rnA
Dlgltallaput
10
10
20
20
!lA
-ZSO
-ZSO
DynaIl1lc Characteristics
Thrn-On TIme
ton
Thm-OffTIme
toff
Source-Off Capacitance
CS(off)
Drain-Off Capacitance
Cn(off)
Channel-On Capacitance
CD(on)
OIRR
Off Isolation
See Switching TIme 'Thst Circuit
f=lMHz
f -1 MHz,RL-7Sn
ns
pF
dB
Powel' Supplies
Positive Supply Current
1+
Room
0.6
Negative Supply Current
1-
Room
-2.7
Logic Supply Current
IL
Room
3.1
Reference Supply Current
IR
Room
-1
1-12
VIN = Ov,or SV
1.S
1.5
-s
-s
4.5
-2
4.5
rnA
-2
P-32167-Rev. B (11/15/93)
Silicanix
DG183/184/185
AMcmbcr of the 'I'BMIC Group
Specifications a for DG184
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ = 15V,V- = -15V,VL=5V
VR = Ov, VIN = 0.8 Vor2yf
A SuffIX
-55 to 125°C
Tempb
'JYpc
Mind
I
BSuffix
-25 to 85°C
Maxd
Mind
15
-7.5
I
Maxd
Unit
Analog Switch
Analog Signal Range"
-7.5
VANALOG
Fun
15
V
rnS(on)
Is = -10 rnA, Vn = -7.5 V
Room
Fun
22
30
60
50
75
0
Vs= ±lOV,Vn= 'FlOV
V+ = 10 V, V- = -20V
Room
Hot
0.06
1
100
5
100
Vs= ±7.5V, Vn= 'F7.5V
Room
Hot
0.05
1
100
5
100
Vs= ±10V,Vn= 'F10V
V+ = 10 V, V- = -20V
Room
Hot
0.4
1
100
5
100
Vs= ±7.5V,Vn= 'F7.5V
Room
Hot
0.3
1
100
5
100
In(on)
Vn=Vs=±7.5V
Room
Hot
-0.02
Input Current with
Input Voltage High
IINH
VIN=5V
Room
Hot
<0.01
Input Current with
Input Voltage Low
IINL
VIN=OV
Fun
-30
Room
85
150
180
Room
95
130
150
Drain-Source
On-Resistance
Source Off
Leakage Current
Drain Off
Leakage Current
Channel On
Leakage Current
IS(off)
In(off)
-2
-200
nA
-10
-200
Digitallnplit
10
20
10
20
IlA
-250
-250
Dynamic Characteristics
'furn-On Tune
'fum-Off TIme
Ion
See Switching TIme Thst Circuit
Iocr
Source-Off Capacitance
~off)
Drain-Off Capacitance
Cn(off)
Channel-On Capacitance
Cn(on)
Off Isolation
OIRR
f=lMHz
Vs = -5V,In = 0
Room
9
Vn = -5 V, Is = 0
Room
6
Vn=Vs=OV
Room
14
Room
>50
f= 1 MHz,RL = 750
os
pF
dB
l>ower Supplles
Positive Supply Current
1+
Room
0.6
Negative Supply Current
1-
Room
-2.7
Logic Supply Current
IL
Room
3.1
Reference Supply Current
IR
Room
-1
P-32167-Rev. B (11/15/93)
VIN = Ov, or 5V
3
3
mA
4.5
-2
D
-5.5
-5.5
4.5
-2
1-13
Siliconix
DG183/184/185
AMember of the TaMIC Group
Specificationsa for DG185
Test Conditions
Unless Otherwise Specified
ASuflix
-55 to 125°C
I
B SuffIX
-25toB5°C
I
V+ = 15V,V- = -15 V, VL = 5V
VR = Ov, VIN = 0.8 Vor2 yf
Thmpb
VANAWG
Full
roS(on)
IS = -lOrnA, VD = -7.5 V
Room
Full
35
75
150
Vs = ±10V, VD = :FlOV
V+=10V,V-=-20V
Room
Hot
0.05
1
100
5
100
Vs= ±lOV,VD= =F10V
Room
Hot
0.07
1
100
5
100
Vs= ±10V,VD= 'F1OV
V+ = 10 V, V- = -20 V
Room
Hot
0.4
1
100
5
100
Vs = ±10V, VD = =F10V
Room
Hot
0.3
1
100
5
100
ID(on)
VD=VS= ±10V
Room
Hot
-0.03
Input Current with
Input Voltage High
IJNH
VIN= 5V
Room
Hot
<0.01
Input Current with
Input Voltage Low
IJNL
VIN=OV
Full
-30
Room
120
250
300
Room
100
130
150
Vs=-5V,ID=0
Room
9
VD = -5V,Is = 0
Room
6
VD=VS=OV
Room
14
Room
>50
Parameter
Symbol
'JYpc
Mind
Max55
f - 1 MHz, RL - 75 Q
ns
pF
dB
Power Supplies
Positive Supply Current
1+
Room
Negative Supply Current
1-
Room
Logic Supply Current
IL
Reference Supply Current
IR
P-32167-Rev. C (11115193)
VlN = OY, or 5V
0.8
-3
Room
Room
0.8
-3
3.2
-2
3.2
rnA
-2
1-19
D
Bilicanix
DG186/187/188
A Mcmbcr oltho TsMIC Group
Specitications8 for DG187
A Suff"1X
-55 to 125'C
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ = 15 V, V- = -15V,VL = 5V
VR = OV,VIN = 0.8 or2V£
Tempb
1YP"
Mind
I
B Sutlix
-25 to 85'C
Mud
Mind
15
-7.5
I
Maxd
Unit
AIlalogSwitch
Analog Signal Range·
-7.5
VANALOG
Full
15
V
'DS(on)
Is = -10mA, VD = -7.5V
Room
Full
22
30
60
50
75
g
Vs= :!:10V,VD= 'F10V
V+ = 10 V, V- = -20V
Room
Hot
0.06
1
100
5
100
Vs = :!:7.5V,VD = 'F7.5V
Room
Hot
0.13
1
100
5
100
Vs= :!:10V,VD= 'F10V
V+ = 10 V, V- = -20V
Room
Hot
0.04
1
100
5
100
Vs = :!:7.5V,VD = 'F7.5V
Room
Hot
0.03
1
100
5
100
ID(on)
VD=VS= :!:7.5V
Room
Hot
-0.02
Input Current with
Input Voltage High
IINH
VIN=5V
Room
Hot
<0.01
Input Current with
Input Voltage Low
IINL
VIN=OV
Full
-30
Room
85
150
180
Room
95
130
150
Drain-Source
On·Resistance
Source Off
Leakage Current
Drain Off
Leakage Current
Channel On
Leakage Current
IS(off)
ID(off)
-2
-200
nA
-10
-200
Digital Input
10
20
10
20
p.A
-250
-250
Dynamk Characteristics.
Thrn-On Tune
ton
Thrn-OffTIme
!off
Source-Off Capacitance
Drain-Off Capacitance
See Switching TIme Thst Circuit
CS(off)
CD(off)
Channel-On Capacitance
CD(oo)
Off Isolation
OIRR
f=lMHz
os
Vs = -5V,ID = 0
Room
9
VD = -5 V, Is = 0
Room
6
VD=VS=OV
Room
14
Room
>50
f -1 MHz,RL -75 g
pF
dB
Power Snpl'lies
Positive Supply Current
1+
Negative Supply Current
1-
Logic Supply Current
IL
Room
Reference Supply Current
IR
Room
0.8
Room
Room
-3
-3
VIN = OV, or 5V
1-20
0.8
3.2
-2
mA
3.2
-2
P-32167-Rev. C (11/15/93)
Siliconix
DG186/187/188
AMember of the TBMlC Group
Specifications a for DG188
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ = lSV, V- = -lSV, VL = SV
VR = ov, VIN = 0.8 or2 yf
ASuff"1X
-55 to 125'C
Tempb
'JYpc
Mind I Maxd
B Suff"1X
-25 to 85'C
Mind
IM~
Unit
Analog Switch
Analog Signal Rangee
-10
15
V
Room
Full
35
75
150
100
150
£2
Vs= ±10V,Vo= :nov
V+ = 10 V, V- = -20V
Room
Hot
0.05
1
100
5
100
Vs= ±lOV,Vo= :FlOV
Room
Hot
0.07
1
100
5
100
Vs = ±lOV,Vo = :nov
V+ = 10V,V- = -20V
Room
Hot
0.04
1
100
5
100
Vs = ±1OV, Vo = :FlOV
Room
Hot
0.50
1
100
5
100
IO(on)
Vo=Vs= ±lOV
Room
Hot
-0.03
Input Current with
Input Voltage High
IJNH
VIN=5V
Room
Hot
<0.01
Input Current with
Input Voltage Low
IINL
VIN=OV
Full
-30
Source Off
Leakage Current
Drain Off
Leakage Current
Channel On
Leakage Current
Full
VANALOG
rns(on)
IS(off)
IO(off)
15
-10
Is = -lOrnA, Vo = -7.5 V
Drain-Source
On-Resistance
-2
-200
nA
-10
-200
Digital Input
10
20
10
20
!lA
-250
-250
Dynamic Characteristics
Thrn-On TIme
ton
Thrn-Off TIme
torr
Source-Off
Capacitance
CS(off)
Drain-Off
Capacitance
CO(off)
Channel-On
Capacitance
CO(on)
Off Isolation
OIRR
Room
120
250
300
Room
100
130
150
Vs=-5V, Io=0
Room
9
Vo = -5 V, Is = 0
Room
6
Vo=Vs=OV
Room
14
Room
>50
See Switching TIme 'Thst Circuit
f=lMHz
f=lMHz,RL= 75£2
ns
pF
dB
Power Supplies
Positive Supply
Current
I+
Negative Supply
Current
1-
Room
-3
D
0.8
0.8
Room
-3
mA
VIN = OV, or5V
Logic Supply
Current
IL
Room
Reference Supply
Current
IR
Room
3.2
3.2
-2
-2
Notes:
Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25'C, Full = as determined by the operating temperature suffIX.
.
C. 1Ypical values are for DESIGN AID ONLY, not guaranteed nor SUbject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not SUbject to production test.
f. VIN = input voltage to perform proper function.
a.
P-32167-Rev. C (11/15193)
1-21
Siliconix
DG186/187/188
AMcmbcr of the TBMIC Group
1YPical Characteristics
Supply Current vs. Temperature
lIN vs. VIN and Temperature
5
100
IVJNL1=0 I _
4
---
~
3
80
.....
~ ~~
r---. :--... ....... .......
--
2
IL f - -
'"
60
........-1-
--
-IR
VINH= 5V
IJNL
"""""" "'" t'...
.........
.....
~ IINH
o
o
-55 -35 -15
5
25
45
65
85 105 125
-55 -35 -15
5
230
-
DG18l,..-
~
VI
~~
IDG1817
t::rI
f==
210
~
I
:[
~
~
DG186
B
1
-50 -25
0
25
65
I
I
50
75
I
85
105 125
I
150
r---
1/
V
V
.
,.
-- .
.~
.........
F-
:,; ... 1""
-
~
90
-55 -35 -15
100 125
/
/
1-
110
".
./
170
130
Vo= -7.5 V
Is= -10mA
I
r-- _ Vo = 7.5 V
r-- __ Vo = -7.5 V
r--
190
~
-
45
Switching Time vs. Vo and Temperature (DG186)
rnS(on) vs. Temperature
100
f==
25
Thmperature (0C)
Thmperature ("C)
5
Thmperature (0C)
~
25
45
"
......,..,
to~ ...
- .. - -
-
tOFF
-
65
85 105 125
Thmperature (0C)
Leakage vs. Temperature (DG186)
Switching Time vs. Vn and Temperature (DG187/188)
100
130
V+ 10V
V - 20V
VL-5V
VR=O
120 --Vo=7.5V
110
/
10
:[
lSi of!)
1
IO(on) ~
/f
-'
V / /
-'
lOCo!!)
"
25
45
65
85
Thmperature (0C)
105
-
-
- - Vo = -7.5 V
-
~
90
~
80
60
125
l/'
./tON
100
",
l/'
-
./
"..
70 ~
VA.....
0.1
1-22
~
20
1+
10
.......
40
t::""
.L:.
,. -L
~ i-"""
50
-55 -35 -15
5
IL
"
-"
.!J.~
.""1
-- -
~
25
45
65
-ttOFF
85
105 125
Thmperature (0C)
P-32167-Rev. C (11/15/93)
Silicanix
DG186/187/188
AMember of the TBMIC Group
'JYpical Characteristics (Cont'd)
ID(olY) vs. Temperature (DG1871188)
Capacitance vs. VD or Vs (DG186)
100
30
f- f=lMHz
10V,V
10 V, Vs
V+
Vo
20V
10V
26
~
10
r--...
22
~
-
BSufflX
i...oo""
,.
1/
.."
1/ASufflX
18
== ~
.-
r--...
.....
Ci(Off)I
10
45
85
65
Thmperature ('C)
o
4
8
-4
Vo or Vs - Drain or Source Voltage (V)
125
105
-8
Off Isolation vs. Frequency
Capacitance vs. VD or Vs (DG187/188)
20
100
~1NL ,! 0.8 \,
18 ,... VJNH=2V
~
f=lMHz
16
90
.I 1-
80
CO(on)
14
(i;'
e
Q
{$
12
10
8
6
70
~
--
iii'
60
0
50
~
'-
f!l
CS(off),_
!"". I--...
.1
T-
Capacitance is measured from test terminal
to common.
o
0
2
4
6
8
:-.
DG186
~
""
.... ~
40
o
-10 -8 -6 -4 -2
:,
I111
II
II ~G1l7l8~ I.
........
30 - V+ = 15 V, V- = -15V
_ VR=0,VL=5V
20
RL= 75'-1
10
IITlriSI IIII
CO(off) -
4
2
_I
CO(on)
14
..,..,.
0.1
25
~ofl
10
VD or V S - Drain or Source Voltage (V)
"
I"
~
'~INI i
loS
1()6
f - Frequency (Hz)
Schematic Diagram ('JYpical Channel)
D
S
IN
D
Figure 1.
P-32167-Rev. C (11/15/93)
1-23
Siliconix
DG186/187/188
AMombcr of the TBUfC Group
Test Circuits
Feedthrough due to charge injection may result in spikes at the leading and trailing edge of the output waveform.
+5V
+15 V
tON: Vs=3V
toFF' Vs = -3 V
V+
VL
VSl
VS2
Logic
Input
Sl
Ir <10ns
tf <10ns
3V
OV
Vo
S2
3V
OV
Switch
Output
-3V
CL (includes flXlure and slray capacitance)
:~,v
---------"'I"~O%
RL
Figure 2.
Switching Tune
Application Hints a
VlN'
Logic Input
Voltage
V-
VL
VR
Negative Supply
Voltage
(V)
Logic Supply
Voltage
(V)
Reference Supply
Voltage
(V)
VINB(mln)i
Switch
V+
Positive Supply
Voltage
(V)
15b
-15
5
GND
2.0/0.8
-7.5 10 15
DG186
DG187
10
-20
5
GND
2.0/0.8
-12.5 to 10
12
-12
5
GND
2.0/0.8
-4.5 to 12
15b
-15
GND
2.0/0.8
-10 to 15
10
-20
GND
2.0/0.8
-15 to 10
12
-12
GND
2.0/0.8
-71012
DG188
5
5
5
V~mu)
Vs
Analog Voltage
Range
(V)
Notes:
a. Application Hints are for DESIGN AID ONLY, not guaranteed and not subject to production testing.
b. Electric:al Parameter Chart hased on V+ = 15 V, VL = 5 V, VR = GND
1-24
P-32167-Rev. C (11/15/93)
Siliconix
DG189/190/191
AMembor of the TeMIC Group
High-Speed Drivers with Dual SPDT JFET Switches
Features
Benefits
Applications
• Constant On-Resistance Over Entire
Analog Range
• Low Leakage
• Low Crosstalk
• Rad Hardness
•
•
•
•
•
•
•
•
•
•
Low Distortion
Eliminates Large Signal Errors
High Precision
lligh Bandwidth Capability
Fault Protection
Audio Switching
Video Switching
SamplelHold
Guidance and Control Systems
Aerospace
Description
The DG189/190/191 are preclSlon dual single-pole,
double-throw (SPD1) analog switches designed to provide
accurate switching of video and audio signals. This series is
ideally suited for applications requiring a constant
on-resistance over the entire analog range.
on-re$ktance inc1ude-a:udiOswitching, video switching, and
data acquisition.
To achieve f~st al\d accurate awitch performance, each
device comprises four n.channel JFET transistors and a
TIL compatible bipolar driver. The driver is designed to
. achieve break-before-make switching action, eliminating
the inadvertent shorting between channels and the
The major different» in the devices is dle oli-resistance crosstalk which would result. In the on state, each switch
(DG189-10 0, DGl90-30 0, 00191-75 0). Reduced conducts current equally well in either direction. In the off
errors are achieved through low leakage current (ID(on) condition, the switches will block up to 20 V peak-to-peak,
< 2 nA). Applications which benefit from the flat JFET with feedthrough of less than -60 dB at 10 MHz.
Functional Block Diagram and Pin Configuration
Dual-In-Line
D1
NC
Flat Package
S1
S4
1
14
S3
IN1
D4
2
13
D3
D2
3
12
D1
S2
4
11
S1
~
D3
V-
S3
VR
IN2
S
10
IN1
V+
VL
6
9
7
8
V-·
VR
S4
VL
D4
V+
NC
IN2
D2
S2
ThpView
D
Refer to JAN38S10 Information, Military Section
·Common to Substrate and Case
ThpView
'&npRange
-2S to 85°C
Ordering Information - DG189/190/191
PaCkAge
Part Number
16-Pin Sidebraze
16-Pin Sidebraze
-55 to 12S°C
14-Pin Flat Pack
P-32167-Rev. B (11/lS/93)
DG189BP
DG190BP
DG191BP
DG189AP/883,5962-9068901MEA
DG190AP/883, JM38510/11107BEA
DG191AP/883, JM385lO/11108BEA
JM38510/11107BXA
JM38510/11108BXA
o
SWitches Shown for Logic "1" Input
1-25
Siliconix
DG189/190/191
AMcm'bcr of the TBMIC Group
Absolute Maximum Ratings
V+ toV- ........................................... 36V
v+ toVn ........................................... 33V
VntoV- ............................................ 33V
Vn toVn ......................................... ±22V
VL toV- ........................................... 36V
VLtoVIN ............................................ BV
VLtoVR ............................................. BV
VlNtoVR ............................................ BV
VRtoV- ............................................ 27V
VRtoVIN ............................................ 2V
Current(SorD)DG1B9 ...................•........ 200rnA
Current(SorD)DG190,DG191 ...................... 30rnA
Current (All Other Pins) .............................. 30 rnA
Storage Thmperature . . . . . . . . . . . . . . . . . . . . . . . . . .. -65 to 150'C
Power Dissipation"
16-Pin Sidebrazeb .................................. 900 mW
14-Pin Flat Pack" ................................... 900 mW
Notes:
a. All leads welded or soldered to PC Board.
b. Derate12mW/'Cabove75'C
c. Derate 10 mW/'Cabove 75'C
Specificationsa for DG189
Thst Conditions
Unless Otherwise Specified
Parameter
Symbol
ASuft-'x
-55 to 125'C
V+ = 15V,V- = -15V,VL=5V
VR = OV,VIN = 0.8Vor2 yf
Tempb
1YP"
Mind
I
B Suft"1X
-25 to 85'C
Max55
0.6
-2
-200
nA
10
-200
rnA
Dlgitllllnput
10
20
10
20
(.lA
-250
-250
Dynantlc Characteristics
Thm-OnTIme
Ion
Thrn-Off TIme
toff
Source-Off Capacitance
CS(off)
Drain-Off Capacitance
Cn(off)
Channel-On Capacitance
Cn(on)
OIRR
Off Isolation
See Switching TIme lest Circuit
f= 1 MHz
f - 1 MHz, RL - 75 g
ns
pF
dB
Power Supplies
Positive Supply Current
I+
Room
Negative Supply Current
1-
Room
Logic Supply Current
IL
Reference Supply Current
IR
1-26
VIN = OV, or5V
2.7
Room
3.1
Room
-1
1.5
-5
1.5
5
4.5
-2
4.5
rnA
-2
P-32167-Rev. B (11115193)
Silicanix
DG189/190/191
AMember aftho TBMIC Group
Specificationsa for DG190
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ = lSV,V- = -15 V, VL= SV
VR = Ov, VIN = O.B Vor2 yf
ASutlb:
-55 to 125·C
Tempb
'JYpc
Mind
I
B Sutllx
-25 to BS·C
Maxd
Mind
15
-7.5
I
Maxd
Unit
Analog Switch
Analog Signal Range"
-7.5
VANALOG
Full
15
V
roS(on)
Is = -10 rnA, Vo = -7.5 V
Room
Full
18
30
60
SO
75
g
Vs= ±10V,Vo= :FlOV
V+ = 10 V, V- = -20V
Room
Hot
0.06
1
100
5
100
Vs= ±7.S V, Vo= 'F7.SV
Room
Hot
0.1
1
100
5
100
Vs= ±10V,Vo= 'FI0V
V+ = 10 V, V- = -20V
Room
Hot
0.05
1
100
5
100
Vs= ±7.5V,Vo= 'F7.5V
Room
Hot
0.06
1
100
5
100
10(on)
Vo=Vs= ±7.5V
Room
Hot
-0.02
Input Current with
Input Voltage High
IJNH
VIN=SV
Room
Hot
<0.01
Input Current with
Input Voltage Low
IJNL
VIN=OV
Full
-30
Drain-Source
On-Resistance
Source Off
Leakage Current
Drain Off
Leakage Current
Channel On
Leakage Current
IS(ol!)
10(01!)
-2
-200
nA
-10
-200
Digital Input
10
20
10
20
f1A
-250
-250
Dynamic Characteristics
Thrn-On TIme
ton
Thrn-Off TIme
lolf
Source-Off Capacitance
See Switching TIme Thst Circuit
CS(of!)
Drain-Off Capacitance
CO(ofl)
Channel-On Capacitance
CO(on)
Off Isolation
OIRR
f=lMHz
Room
BS
150
IBO
Room
95
130
150
Vs = -5 V, 10 = 0
Room
9
Vo = -SV,ls = 0
Room
6
Vo=Vs=OV
Room
14
Room
>50
f = 1 MHz, RL = 75 g
ns
pF
dB
Power Supplies
Positive Supply Current
1+
Room
0.6
Negative Supply Current
1-
Room
-2.7
Logic Supply Current
IL
Room
3.1
Reference Supply Current
IR
Room
-1
P-32167-Rev. B (11/15193)
VIN = OV, or SV
1.5
1.5
-5
-5
4.5
-2
D
rnA
4.5
-2
1-27
Siliconix
DG189/190/191
AMember of the TEMIC Group
Specificationsa for DG191
Thst Conditions
Unless Otherwise Specified
ASuflh:
-55 to 125°C
I
BSufnx
-25 to 85°C
I
V+ = 15 V, V- = -15 V, VL = 5V
VR = Ov, VIN = 0.8 Vor2 yf
Tempb
VANALOG
Full
15
V
'OS(on)
Is = -10mA, VD = -7.5 V
Room
Full
35
75
150
100
150
Q
Vs = ±10V,VD = :HOV
V+ = 10 V, V- = -20V
Room
Hot
0.05
1
100
5
100
Vs= ±10V,VD= 'F10V
Room
Hot
0.07
1
100
5
100
Vs= ±10V,VD= 'F10V
V+ = 10 V, V- = -20V
Room
Hot
0.04
1
100
5
100
Vs= ±lOV,VD= 'F10V
Room
Hot
0.05
1
100
5
100
ID(on)
VD=VS= ±10V
Room
Hot
-0.03
Input Current with
Input Voltage High
IJNH
VIN =5V
Room
Hot
<0.01
Input Current with
Input Voltage Low
IJNL
VIN = OV
Full
-30
Room
120
250
300
Room
100
130
150
Parameter
Symbol
lYPc
Mind
Maxd
Mind
15
-10
Maxd
Unit
Analog Switch
Analog Signal Range"
Drain-Source
On-Resistance
Source Off
Leakage Current
Drain Off
Leakage Current
Channel On
Leakage Current
IS(off)
ID(off)
-10
nA
-10
-2
-200
-200
Digitallnput
10
20
10
20
JlA
-250
-250
Dynamic Characteristics
111m-On TIme
ton
111m-Off TIme
to!!
Source-Off Capacitance
CS(off)
Drain-Off Capacitance
CD(o!f)
Channel-On Capacitance
CD(on)
OffIsolation
OIRR
See Switching TIme 'lbst Circuit
f= 1 MHz
Vs = -5V,ID = 0
Room
9
VD = -5V,Is = 0
Room
6
VD =Vs=OV
Room
14
Room
>50
f = 1 MHz, RL = 75 Q
ns
pF
dB
Power Supplies
Positive Supply Current
I+
Room
0.6
Negative Supply Current
1-
Room
-2.7
Logic Supply Current
IL
Room
3.1
Reference Supply Current
IR
Room
-1
VIN = Ov, or 5V
1.5
-5
1.5
-5
rnA
4.5
-2
4.5
-2
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25°C, Full = as determined by the operating temperature suffIX.
c. lYpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
1-28
P-32167-Rev. B (11/15/93)
Siliconix
DG189/190/191
AMember of the TBMIC Group
1Ypical Characteristics
Supply Current vs. Temperature
lIN vs. VIN and Temperature
5
100
~
.1
1
VINL=O
VINH=5V
4
]:
.!i
£.
..!.
80
~
:0- r--
.... ~
3
r-...... i"-o..
2
--
IL
.......
-
........
........ .....
60
IINL
rs;
....... ........-1-
..J
.....
........
40
.......
_
.........
-IR
20
1+
r-
o
IINH
o
-55 -35 -15
5
25
45
65
85 105 125
-55 -35 -15
5
Thmperature (0C)
== DG191
--
~
",
.......
IDG1910
:::r-r
==
~ I"""
-
--
DG189
230
210
g
~
:t;
9
-
Vo= -7.5V
Is= -lOrnA
170
150
130
-
0
25
50
75
I
I
1
65
85
......
l/
105 125
- -"." --
..,
to~ ..
",
- -.. ~
,
... .
~
-
tOFF
.......
~
-"'-
Jt'
......r_
./
./
~
./
I"""
~
F-
90
-55 -35 -15
100 125
1
r- _ Vo=7.5V
r- __ Vo= -7.5 V
r-
190
110
-50 -25
45
Switching Time vs. Vo and Temperature (DG189)
rnS(on) vs. Temperature
100
25
Thmperature ("C)
5
25
45
65
85 105 125
Thmperature (0C)
Thmperature (0C)
Leakage vs. Temperature (DG189)
Switching Time vs. Vo and Temperature (DG190/191)
100
130
F=V+=10V
V
20V
5V
r VR=O
f::
120 I - - VO=7.5V
Vo = -7.5 V
110 f--
r- --
r- VL
/
10
IS of!)
1
Io(on) ~
,"'
VA". . .
./I~
0.1
25
45
65
V VV
L
IO(off)
85
105
Thmperature ("C)
P-32167-Rev. B (11/15/93)
,
~
100
~
90
~
80
~
70 ~
-
60
125
~
..,.;
./
......... I~..
.- .........., "
.." .,
. . -1./
- -... - -
IL
.,
50
-55 -35 -15
~
~"
5
toFF
~
t-"
25
45
65
85 105 125
Thmperature (0C)
1-29
..
Silicanix
DG 189/190/191
AMember of the TBMIC Group
1Ypical Characteristics (Cont'd)
In(o!!) vs. Temperature (DGI90/191)
Capacitance vs. Yn or Ys (DGI89)
30
100
V+-lOV,V
10 V, Vs
Vn
20V
10V
26
10
22
.,.
f- BSufflx
""
~
/
18
ASufflx == ~
_I
CD(on)
.-
......
14
Ci(O!f)I
10
25
~O!l
.....
..... ~
JI'
.--
i"""
0.1
_f~H.~HzI
45
65
85
Thmperature CC)
125
105
4
8
-4
o
VD or VS - Drain or Source Voltage (V)
-8
011 Isolation vs. Frequency
Capacitance vs. Yn or Ys (DGI90/191)
20
18
f-
100
~INL ~ 0.8 \,
VINH = 2V
90
J I-
16 f- f=lMHz
80
CD(on)
14
12
10
8
6
70
i'-...
........
~
......
0
~
CS(o!f),_
_I
TCD(o!f) -
r"- i"--..
Capacitance is measured from test terminal
to common.
0
2
4
6
60
DG189
I'.....
50
40
['\.
i"'~
I'
~
i
o
-10 -8 -6 -4 -2
i'
i'"
30 - V+ = 15 V, V- = -15V
f- VR=0,VL=5V
20
RL=75Q
10
f-iINI 1IIIriSI IIIII
4
2
,
IIII
II
II ~G1Jo/l9ll .
........
8
10
f - Frequency (Hz)
VD or Vs - Drain or Source Voltage (V)
Schematic Diagram (1YPical Channel)
S
IN
D
Figure 1.
1-30
P-32167-Rev. B (11/15/93)
Siliconix
DG189/190/191
A Member of the TBMIC Group
Test Circuits
Feedthrough due to charge injection may result in spikes at the leading and trailing edge of the output waveform.
+5V
+15 V
tON: VS=3V
tOFF: Vs = -3 V
V+
VL
VSl
VS2
Logic
Input
tr <10ns
tf <10ns
3V
OV
Sl
Vo
S3
3V
r
OV
OFF
Switch
Output
____________________
-3V
CL (includes fIXture and stray capacitance)
RL
Figure 2.
~
OV
90%
Switching Tune
Application Hints a
VIN
Switch
D0189
D0190
DG191
V+
Positive Supply
Voltage
V-
VL
VII;
Negative Supply
Voltage
Logic Supply
Voltage
Reference Supply
Voltage
(V)
(V)
(V)
(V)
15b
-15
10
-20
12
-12
15b
-15
10
12
Logic Input
Voltage
Vs
Vnm(llllnv
V~as)
AnaIDg Voltage
Range
GND
2.0/0.8
-7.5 to 15
5
GND
2.0/0.8
-12.5 to 10
5
GND
2.0/0.8
-4.5 to 12
5
GND
2.0/0.8
-10 to 15
-20
5
GND
2.0/0.8
-15 to 10
-12
5
GND
2.0/0.8
-7 to 12
5
(V)
Notes:
a. Application Hints are for DESIGN AID ONLY, not guaranteed and not sUbject to production testing.
b. Electrical Parameter Chart based on V+ = 15 V, VL = 5 V, VR = GND
P-32167-Rev. B (11/15/93)
1-31
-
Siliconix
DG200A
AMcmber afthe TBMIC Group
Monolithic Dual SPST CMOS Analog Switch
Features
Benefits
Applications
• ± 15 v Input Signal Range
• Wide Dynamic Range
• Simple Interfacing
• Reduced External Compon~nt Count
•
•
•
•
• 44-V Maximum Supply Ranges
• On-Resistance: 45 g
• TIL and CMOS Compatibility
Servo Control Switching
Programmable Gain Amplifiers
Audio Switching
Programmable Filters
Description
The DG200A is a dual, single-pole, single-tbrilW analog
switch designed to provide general purpose switching of
analog signals. This device is ideally suited for designs
requiring a wide analog voltage range coupled with low
on-resistance.
. .
,
Each switcll c9ruiuctS equally well in both directions when
..on, a~d blocks up to 30 V peak-to-peak when off. In the on
'condition, this ~-dirootional switch introduces no offset
·!Yt)ltage Qf its oWn.
.'
The DG200A is desiglled on Sil.ii»nb( impt-
Ov, 2.4 V o-+I;;;;N",,2'-1~>-
DffIsolation = 20 log
Figure 3.
P-32167-Rev. B (11/15/93)
I~~ I
Off Isolation
C= RFbypass
XTALK Isolation = 20 log
Figure 4.
Cbannel-to-Cbannel Crosstalk
1-41
Siliconix
DG201N202
AMembcr of the TBMIC Group
Test Circuits (Cont'd)
+15V
Vo
V+
S
/
Vo
I
_
INX
lOOOpF
CL
t
I1VO
L
T
ONI
OFF
~
11Vo = measured voltage error due to charge injection
The charge injection in coulombs is I1Q = CL x 11Vo
Figure S. Charge Injection
Application Hints a
V+
Positive Supply
Voltage
VNegative Supply
Voltage
VIN IAglc: Illput
Voltage
VINH(min)fVlNL(lIUIX)
VsorVn
Analog Voltage
Range
(V)
tv)
tv)
(V)
15
-15
2.4/0.8
-15 to 15
10
-12
2.4/0.8
-12to12
12
-10
2.2/0.6
-101010
8b
-8
2.0/0.5
-8t08
Notes:
a. Application Hints are for DESIGN AID ONLY, not guaranteed and not subject 10 production testing.
b. Operation below :l: 8 V is not recommended.
Applications
Logic Input
Low = Sample
Higb = Hold
VIN
5.1Mn
+---+-oVOUT
V-
30pF
Acquisition TIme
Aperature TIme
Sample 10 Hold Offset
Droop Rate
DG201A
-15V
=2S11"
= 111"
=SmV
=5mV/s
Figure 6. Sample-and-Hold
1-42
P-32167-Rev. B (11/15/93)
Silicanix
DG201A/202
AMembcr oltho TBMIC Group
Applications (Cont'd)
160 ,.---,-----,----,,..---...,----,--.....,
fC4
120
Select
~
"0
fc3
TIL
80
I
Select
d
.;
t!l
Control
fC2
i~
Select
fCI
Select
0
V- DG201A GND
-40 '--_-'-_-'-_ _'-----',."._..;a._-'"'
10
100
1k
10 k
100 k 1 M
-15V
Frequency - Hz
AL (Voltage Gain Below Bre"fFrequency)
-15V
>------4---0
VOUT
=
~
= 100 (40 dB)
fc(BreakFrequency) = 2ltR3CX
1
fL (Unity Gain Frequency) = 2ltRICX
Max Attenuation = J"])S(on) "'" -40 dB
10k
Figure 7.
Active Low Pass Filter with Digitally Selected Break Frequency
+15 V
DG200A
..
V+
Vmlo-r----~~-~r ...~--~~
Vm2o-~-----Q1A-'--+_~
+15V
DG202
RpI
lOOn
-15V
0 - - - - -......... > __-J
Gain 2 (xl0) 0-----1---1 ~_ _....J
Gain 1 (xl)
Gain = Rp+RG
Ra
Gain 3 (x100)
Gain 4 (xlOOO)
RG3
lOOn
o-----+-~~ > __-J
o-----+_-----C:-----I
Logic High = Switch On
-15V
Figure 8.
P-32167-Rev. B (11/15/93)
A Precision Amplifier with Digitally Programable Input and Gains
1-43
Silicanix
DG201B/202B
AMember aftho TBMtC Group
Improved Quad CMOS Analog Switches
Features
Benefits
Applications
• ± 22-V Supply Voltage Rating
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
TIL and CMOS Compatible Logic
Low On-Resistance-IDS(on): 45 C
LowLeakage-ID(on): 20pA
Single Supply Operation Possible
Extended Temperature Range
Fast Switching-toN: 120 ns
Low Glitching-Q: 1 pC
Wide Analog Signal Range
Simple Logic Interface
Higher Accuracy
Minimum uansients
Reduced Power Consumption
Superior to DG201A/202
Industrial Instrumentation
Test Equipment
Communications Systems
Disk Drives
Computer Peripherals
Portable Instruments
Sample-and-Hold Circuits
Description
The DG20lB!202B analog switches are highly improved
versions of the industry-standard DG201A/202. These
devices are fabricated in Siliconix' proprietary silicon gate
CMOS process, resulting in lower on-resi~tance, lower
leakage, higher speed, and lower power' consumption.
These quad single-pole single-throw switches are designed
for a wide variety of applications in telecommunications,
instrumentation, process control, computer peripherals,
etc. An improved charge injection compensation design
minimizes switching transients. The DG201B andDG202B
can handle up to ±22-V input signals, and have an
improved continuous current rating of30 mA. An epitaxial
layer prevents latchup.
All devices feature true bi-directional performance in the
on condition, and will block signals to the supply voltages in
the off condition.
The DG20lB is a normally closed switch and the DG202B
is a normally open switch. (See 'ftuth Thble.)
Fu.!!diom!l Block Diagram and Pin Configuration
'fruth Thble
DG201B
Logie
DGlOIB
oo201B
0
ON
OFF
1
OFF
ON
Logic "0" :s 0.8 V
Logic"l" '" 2.4 V
Switches Shown for Logic "1" Input
IN1
D1
S1
v-
V+
GND
NC
Ordering Information
lhmpRange
Package
Part Number
DG201BDJ
16-Pin Plastic DIP
DG202BDJ
DG20lBDK
-40 to 85°C
16-Pin CerDIP
16-Pin Narrow SOIC
ThpView
DG202BDK
DG201BDY
DG202BDY
DG201BAK
DG201BAK/883
-55 to 125°C
16-Pin CerDIP
DG202BAK
DG202BAK/883
1-44
P-32167-Rev. A (11/15/93)
Siliconix
DG201Bj202B
AMcmbcr of the TaMIC Group
Absolute Maximum Ratings
Voltages Referenced to VV+ ................................................. 44 V
GND ............................................... 25V
Digital Inputsavs, Vo ............... (V-) -2Vto (V+) +2 V
or 30 rnA, whichever occurs first
Current, Any Thrminal ............................... 30 rnA
Peak Current, S or D
(Pulsed at 1 ms, 10% duty cycle max) .................. 100 rnA
Storage Thmperature
(AI<, DK SuffIX)
-65 to 150'C
(OJ, DY SuffIX) ........ -65 to 125'C
Power Dissipation (Package)b
16-Pin Plastic DIPC ................................. 470 mW
16-PinNarrowSOICd ............................... 640mW
16-Pin CerDIPC .................................... 900 mW
Notes:
a. Signals on Sx, Dx, or INx exceedingV+ orV- will be clamped by
internal diodes. Limit fOJWard diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate6.5mW!"Cabove75'C
d. Derate7.6mW!"Cabove75'C
e. Derate 12 mW/'C above 75'C
Specifications a
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ = 15 V, V- = -15V
VIN = 2.4 V, 0.8 yf
ASuff'1X
-55 to 125'C
Tempb
'JYpc
Mind
I
Maxd
D Suff'1X
-40 to 85'C
Mindj Maxd
Unit
Analog Switch
Analog Signal Rangee
Drain-Source On-Resistance
roS(on) Match
-15
VANALOG
Full
roS(on)
Room
Full
45
Room
2
Vo = ±10V,Is = 1 rnA
AroS(on)
15
-15
85
100
15
V
85
100
0
Source Off Leakage Current
IS(olf)
Vs = ±14 V,Vo = '1'14 V
Room
Full
±0.D1
-0.5
-20
0.5
20
-0.5
-5
0.5
5
Drain Off Leakage Current
IO(olf)
Vo = ±14V,Vs = '1'14 V
Room
Full
±0.01
-0.5
-20
0.5
20
-0.5
-5
0.5
5
0.5
40
-0.5
-10
0.5
10
Drain On Leakage Current
IO(on)
Vs =Vo = 14V
Room
Full
±0.02
-0.5
-40
nA
Digital Conn-Ill
Input Voltage High
VINH
Full
Input Voltage Low
VINL
Full
Input Current
Input Capacitance
IlNHor
IINL
VlNHorVINL
2.4
0.8
0.8
-1
Full
Room
CIN
2.4
1
-1
1
5 .
V
[.lA
pF
Dynantlc Characteristics
Thrn-On TIme
Thrn-Off TIme
Charge Injection
toN
Vs=2V
See Switching TIme Thst Circuit
tOFF
Q
CL = 1000pF, Vg = OV,Rg = 00
Room
Full
120
300
300
Room
Full
6S
200
200
Room
1
Room
5
Source-Off Capacitance
CS(olf)
Drain-Off Capacitance
CO(olf)
Room
S
Channel On Capacitance
CD(on)
Vo = Vs = OV,f= 1 MHz
Room
16
Off Isolation
OIRR
90
XTALK
CL = IS pF, RL = 500
Vs = 1 VRMS, f = 100 kHz
Room
Channel-to-Channel Crosstalk
Room
95
P-32167-Rev. A (11/15/93)
Vs=OV,f=lMHz
ns
pC
pF
dB
1-45
..
Siliconix
DG201B/202B
AMembcr of the TBMIC Group
Speciticationsa
Thst Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ =15V,V- = -15V
VIN = 2.4 V, O.B vi
A Suffix
-55 to 125°C
Thmpb
lJpc
Mind
I
Maxd
DSufllx
-40 to B5°C
Mind.1 Maxd
Unit
Power Supply
Room
Full
50
100
Positive Supply Current
1+
Negative Supply Current
1-
Room
Full
-1
-5
Power Supply Range for
Continuous Operation
VOP
Full
±4.5
VIN = 00r5V
50
100
f.IA
-1
-5
±22
±4.5
±22
V
Specitications a for Single Supply
Thst Conditions
Unless Otherwise Specified
ASutrlX
-55 to 125°C
I
D Suffix
-40 to B5°C
I
V+=12V,V-=OV
VIN = 2.4 V, O.B vi
Thmpb
VANALOG
Full
roS(on)
VD = 3V,BV,Is = 1 rnA
Room
Full
90
160
200
Thrn-On TIme
toN
120
300
300
tOFF
Vs=BV
See Switching TIme 'lest Circuit
Room
Thrn-Off TIme
Room
60
200
200
Room
4
Parameter
Symbol
lJpc
Mind
Maxd
Mind
12
0
Maxd
Unit
12
V
160
200
n
Analog Switch
Analog Signal Rangee
Drain-Source
On-Resistance
Charge Injection
Q
CL = 1 np, Vgen= 6V, Rgen =
on
0
ns
pC
Power Supply
Room
Full
50
100
Positive Supply Current
1+
Negative Supply Current
1-
Room
Full
-1
-5
Power Supply Range for
Continuous Operation
VOP
Full
+4.5
VIN = 00r5V
50
100
f.IA
-1
-5
+25
+4.5
+25
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25°C, Full = as determined by the operating temperature sufrlX.
c. 'JYpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
1-46
P-32167-Rev. A (11/15/93)
V
Siliconix
DG201B/202B
AMcmbcr of tho 'IBMtC Group
lYPical Characteristics
rnS(on) vs. Vn and Power Supply Voltages
110
100
I'
V
80
70
J
±5V
50
~
I"
~
I
~
r--
"'"
30
9!
60
J
50
±10V - f - -
"
I '\
I
l/~~IV
-
.,
20
175
9!
150
J
125
/
V..,
75
50
~
~
.-.
--
r-.
-W
-5
o
5
Vo - Drain Voltage (V)
10
15
Input Switching Threshold vs. Supply Voltage
2.5 r----r--r--..-----,r----r---.--,----,
E
1\ 7V
- - :...
100
............
21--I---I---1I--!--+--1--I---I
r
J
-55'C " .
-15
20
V~ =5~
f
II
.-
~~
~
25:t
40
o
16
..... 125'C,.
10
rnS(on) vs. Vn and Single Power Supply Voltages
250
200
"ss:c
"". / .....
...- ......
20
I I
/'
//'1
30
±20V
10
-20 -16 -12 -8 -4 0 4 8 12
Vo - Drain Voltage (V)
225
,
70
I
I
60
40
,
_ V+=15V
90
V- = -15V
80
1\
1
90
9!
rnS(on) vs. Vn and Temperature
100
1
C/7~:"'~'j~':~~!'.~.,':'E'~',..~.~t;·~·"::. cl:,·'7'! ~"
1.5
~
10V
~12V
1
-"'''''''':::: .......... ~V
0.5 1--+--f--+-----1I---+-+--f--l
25
o
OL---'---'-----'L-----'---'-------'--'----'
o
2
4
6
B
W
U
U
±4
M
VD - Drain Voltage (V)
Leakage Currents vs. Analog Voltage
80
<-
60 I - V- = -22V
TA= 25'C
40
5
~ 20
t:
a
0
I
..e-20
.....;
.J+ =2~V
I
I
IS(off» 10 off)
~I"""
i""" ID(on)
±6
±B ±10 ±12 ±14 ±16 ±18 ±20
V+, V-Positive and Negative Supplies (V)
Leakage Currents vs. Temperature
1nA
I
--- -
j
V"
100pA
I
- ISOff),IO(:;~
.£I
D
,o-V+-15V
_ V = 15V
Vs, VD ±14V
~
::; WpA
-40
-60
-so
-20 -15 -10 -5
0
5
Thmperature CC)
P·32167-Rev. A (11/15/93)
10
15
20
1pA
-55 -35 -15
5
25
45
65
85
105 125
Thmperature CC)
1-47
Siliconix
DG201B/202B
AMembcroftheTBMICGroup
lYPical Characteristics (Cont'd)
Switching Time VS. Power Supply Voltage
Switching Time VB. Single Supply Voltage
500
v~Jv -
400
g
~co
j
~
.\
'1
g
,
300
~"
\
200
-
~
2
4
6
8
V+
30
f
... ton
100
o
400
-
300
200
100
10
12
14
16
18
o
20
I
o
o
110
~V-iA'
~:tJ
-15
-10
io-""'"
V
~~
~
V+=12V
v-=ov
o
5
±8
±12
±16
±2O
10
~
90
~
80
11IV+~lWII
V- =-lSV
'""
II
"'
70
I I I I I
-5
Ioff
Off Isolation vs. Frequency
120
100
k
±4'
-
Ion
V +. V-Positive and Negative Supplies (V)
Qs QD - Charge Injection VS. Analog Voltage
•
V+ =15V
o
Positive Supply (V)
10
".......
~
~
20
G'
,s,
\
I
II
i'oo..
RL=50Q
I'~-
:1111111111111111111111
15
lOOk
10k
1M
10M
f - Frequency (Hz)
VANALOG - Analog Voltage (V)
Supply Current vs. Switching Frequency
4
3
2
1
....
o
1k
10k
v
lOOk
1M
f - Frequency (Hz)
1-48
P-32167-Rev. A (11/15/93)
Siliconix
DG201B/202B
AMombcr althe TBMtC Group
Schematic Diagram (lYPical Channel)
V+
Sx
VV+
INX
Dx
GND
vFigure 1.
Test Circuits
+15V
V+
Vs= +2V
Logic
S
Vo
Input
3V
OV
tr <20ns
<20ns
50%
tf
RL I C L
lW
35pF
3V
-
-
Switch
Output Vo
Figure 2. Switching Tune
+15 V
+15 V
~~C_--+
v+
~----++--t---CTI
/
son
"'---1-+-7--1-0 Vo
Ov, 2.4 V 0 - 1 - - [ >
ov, 2.4 V
Off Isolation = ZOlog
I~: I
Figure 3. Off Isolation
P-32l67-Rev. A (11/15193)
0-t=IN;.o2""-i~>
C =RFbypass
XTALK Isolation = 20 log
Figure 4. Channel-to-Channel Crosstalk
1-49
Bilicanix
DG201B/202B
AMemberoftheTBMICGroup
Test Circuits (Cont'd)
+15 V
AVo
Vo
V+
s
I
Vo
I
_
INx
lOOOpF
CL
L
T*
ONI
OFF
~
AVo = measured voltage error due to charge injection
The charge injection in coulombs is Q = CLX AVO
Figure 5. Charge Injection
Applications
+15 V
'-----rlt~:t,
-+--------,
-<]I-----t---------t---o
Logic Input
!.ow = S~mp!e
High = Hold
+l5V
VIN
+---+00
V-
DG201B
30pF
-l5V
Aquisition TIme
Aperature TIme
Sample to Hold Offset
Droop Rate
=2Sf1S
=1f1S
=5mV
=5mV/s
Figure 6.
1-50
Sample-and-Hold
P-32167-Rev. A (11/lS/93)
VOUT
Siliconix
DG201B/202B
AMember of tho TBMIC Group
Applications (Cont'd)
160 ,.....--..,.--....,----,...---,--,.----.
fC4
120
Select
TIL
Control
I---!---+---+--j--+--I
fC3
Select
fC2
Select
fCI
o
Select
I---l--~ioo;.
V- DG201B GND
-40 '--_-'-_---'-_ _'-----'_ _
10
-15V
100
1k
""""'_~
10 k
100 kiM
f - Frequency (Hz)
At. (Voltage Gain Below Br"'f Frequency)
-15V
>-----.....--0
Your
~ ~
= 100 (40 dB)
fc(BreakFrequency) = ~
1
fL (Unity Gain Frequency) = 23tRICX
Max Attenuation = IDS(on) "'" -40 dB
10k.Q
Figure 7. Active Low Pass Filter with Digitally Selected Break Frequency
+5V
+15 V
30pF
Vrnlo-~--~~L---~~----I
Vrn2 o-~----~" ...------'
+15 V
CHO-I--t
DG202B
RFI
RFI
RFI
18 k.Q
9.9 k.Q
100 k.Q
RGl
2 k&l
RG2
100 C
100 C
III
-15V
Gain 1 (xl) O - - - - - I H
Gain= RF+RG
RG
>----'
Ra3
Gain 2 (xlO) o-----t----n~---J
Gain 3 (xlOO) 0-------+------1 >--~
Gain 4 (xlOOO) o-------+----------n~---'
Logic High
~
Switch On
-15V
Figure 8. A Precision Amplifier with Digitally Programable Input and Gains
P-32167-Rev. A (11/15/93)
1-51
Siliconix
DG201HS
A Mcmbcr of the TBMIC Group
High-Speed Quad SPST CMOS Analog Switch
Features
Benefits
Applications
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Fast Switching-tON: 38 ns
Low On-Resistance: 25 g
Low Leakage: 100 pA
Low Charge Injection
TIL/CMOS Logic Compatible'
Single Supply Compatibility
High Current Rating: -30 rnA
Faster Throughput
Higher Accuracy
Reduced Pedestal Error
Upgrades Existing Designs
Simple Interfacing
Replaces Hl201HS, ADG20lHS
Data Acquisition
Hi-ReI Systems
Sample-and-Hold Circuits'
Communication Systems
Automatic Test Equipment
Integrator Reset Circuits
Choppers ,
Gain Switching
Avionics
Description
The DG201HS is an improved monolithic device
containing four independent analog switches. It is designed
to provide high speed, low error switching of analog signals.
Combining low on-resistance (25 Q) with high speed (tON:
38 ns), the DG201HS is ideally suited for high speed data
'
acquisition requirements.
To achieve high voltage ratings and superior switching
performance, the DG201HS is built on a proprietary
high-voltage silicon-gate process. An epitaxial layer
prevents latchup.
Each switch conducts equally well in both directions when
on, and blocks input voltages to the supply values, when off.
Functional Block Diagram and Pin Configuration
Dual-In-Line and SOlC
"'1
.u'l
LCC
-.T,... '""T_
.1'11_
&.I."~
n_
~~
IN2
D1
D2
~
S1
~
V+
V-
V+
NC
NC
GND
NC
NC
S3
S3
54
D3
IN4
D4 IN4 NC IN3 D3
1bpVic:w
Ordering Information
'IempBange
-40 to 85·C
-55 to 12S·C
1-52
Package
Part NUl!lbeJ: ,
16-Pin Plastic DIP
DG201HSDJ
16-Pin Narrow SOIC
'ftuth Thble '
DG20lHSDY
o
ON
16-Pin CerDIP
DG201HSAKI883
1
OFF
LCC-20
DG201HSAZ}883
Logic ''0'' :S 0.8 V
Logic "1" '" 2.4 V
Switches Shown for Logic "1" Input
P-32167-Rev. A (11/15/93)
Siliconix
DG201HS
AMcmbcr oCtbo TBMIC Group
Absolute Maximum Ratings
V+toV- ........................................... 44V
GNDtoV- ..........•............................... 25V
Digital Inputs' Vs, Vo .•............. (V-) -4 V to (V+) +4 V
16-Pin CerDlpd ..............•..................... 900 mW
16-PinNarrowBodySOICC ......................... 600mW
lCC-20d .......................................... 900 mW
or 30 rnA, whichever occurs first
Continuous Current (Any Thrminal) .................... 30 rnA
Current, S or 0 (Pulsed 1 ms, 10% duty cycle) ........... 100 rnA
Storage Thmperature
(ASufflX) .. . . . . . . . . . . .. -65 to lS0'C
(0 SuffIX) . . . . . . . . . . . . .. -65 to 12S'C
Power Dissipation (Package)b
16-Pin Plastic DIP" ................................. 470 mW
Notes:
a. Signals on Sx, Ox, or INx exceeding V + or V-will be clamped by
internal diodes. Umit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC board.
c. Derate 6 mWI'C above 75°C.
d. Derate 12 mWI'C above 75°C.
e. Derate 7.6 mWI'C above 7S'C.
Specificationsa
ASuIIix
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
-55 to 125°C
V+ = 15 v, V- = -15V
VIN = 3 V, 0.8 yf
Tempb
Is = -10 rnA, Vo = :!:8.5V
V+ = 13.5 V, V- = -13.5 V
Room
Full
lYPc
Mind
I
D Sullix
-40 to 85°C
Max In(o~
IV+ = 15V,\r- I= -15V
[IIIIIII~
-55 -35 -15
0 -20
15
F--+-+--+-+--il--+-+--+---I
~~-~~-~-~~-~~-~
-55 -35 -15
5
25
45
65
85 105 125
Thmperature (0C)
P-32167-Rev. B (11/15/93)
Silicanix
DG211/212
AMcmber oftheTBMIc Group
1Ypical Characteristics (Cont'd)
Switching Time vs. Negative Supply Voltage
Charge Injection vs. Analog Voltage
550
70
V+ =15V I
VL=5V
500 I - TA= 25°C
g
~
~
400
.1.
,-- V+ = 15V
V- = 15V
SO '-- VL=5V
TA = 25°C
40
60
"
450
.1
tON
U'
~
0
30
QD
20
10
1'-
0
toFF
350
Qs
~
~
l.---'
-10
-20
300
o
-10
-5
-30
-15
-15
V - - Negative Supply (V)
f=~MHz
I
-10
-5
o
15
-
5
€
-t
./
I
o
-15
l...-- ~
ICD(off) or CS(off
6
10
V+ = 15V
V- = -15V
TA = 25°C
6
24
12
5
-r----r----.----''--r-:;..:;...;...---,
7
I
ICD(on
o
Input Switching Threshold vs. Logic Supply Voltage
TA = 25°C
18
-5
VANALOG - Analog Voltage (V)
Capacitance vs. VD or Vs
30
-10
4
3
2
o
5
10
15
~----~------~----~------~
o
5
VD or VS - Drain or Source Voltage (V)
10
15
20
..
VL - Logic Supply (V)
OtT Isolation vs. Frequency
Channel-to-Channel Crosstalk vs. Frequency
160
160
140
120
120
$'
~
0
f!l
1-'"""+--",Oc-+-----"'~----I-----I-----4
100
80
60
60
1----+----+--.:3io,.-I---'~
40
40
1---+----+----1---
20
w I--+--~--r-~-~I-~
O ........UWLL.l..LWIII..JU-UJUL..J....LJWLL....L..l.JJIW........LWIU
1k
10k
lOOk
1M
f - Frequency (Hz)
P-32167-Rev. B (11/15/93)
10M
100M
100
1k
10k
lOOk
1M
10M
100M
f - Frequency (Hz)
1-63
Siliconix
DG211/212
AMember of the TBMIC Group
Schematic Diagram (lYPical Channel)
V+o-------------~----~~----~--------------------------~_,
r---r--"""t-t--+-o s
GNDo-~>--"'"
.....--I~-....--+--oD
V-o--------+--------~~----~--------------~--------~
Figure 1.
Test Circuits
Vo is the steady state output with the switch ou. Feedthrough via switch capacitance may result.in spikes at the leadiug and trailing edge of the
output waveform.
+5V
+15V
Logic
Input
3V
Ir <2Ons
tf <2On8
50%
OV
v
2V
Switch
Input
Vs
Switch
Output
,,·U
V-
6
-15V
CL (includes fIXture and stray capacitance)
Vo=Vs
Figure 2.
Switching TIlDe
+5V
+5V
RL
RL+ l'JJS(on)
+15V
+15 V
son
Vo
OV,2.4 V
NC
OV,2.4 V
C=RFbypass
-15V
Figure 3. Off Isolation vs. Frequency
1-64
C= RFbypass
XTALK Isolation = 20 log
~
IN2
I~: I
Figure 4.
V
RL
-15V
Crosstalk vs. Frequency
P-32167-Rev. B (11/15/93)
Silicanix
DG211/212
AMem'ber oftbe TSMIC Group
Applications Hints a
logic transition voltage from the normal 1.6 V of TIL to
zero volts by connecting the VLpin to the GND pin. In this
mode of operation the input offset voltage between INx
and VL (= GND) measures less than ± 500 mV.
Some applications of the DG211 or DG212 will find the
logic control inputs INx driven from the output of
comparators or op-amps with nearly plus to minus 15-V
transitions. In these applications the user can shift the input
(V)
VNegative Supply
Voltage
(V)
VL
Logic Supply
Voltage
(V)
20
-20
15
-15
12
-12
10
Bb
-10
10
V+
Positive Supply
Voltage
VIN
Logic Input
Voltage
VINllCmm)NlNLCmax)
VsorVD
Analog Voltage
Range
(V)
(V)
5
2.4/O.B
-20 to 20
5
5
2.4/O.B
-15 to 15
2.4/O.B
-12 to 12
2.4/O.B
-10 to 10
-B
5
5
2.4/O.B
-BtoB
-10
10
5/2
-10 to 10
Notes:
a. Application Hints are for DESIGN AID ONLY, not guaranteed and not subject to production testing.
Operation below ± B V is not recommended.
b.
Applications
+5V +15V
+5V
..
Precision Altenuator
,..
VJN(max) =
Vee
Data Bus
D3
D2
Dl
Do
Qo
9Mr.l
Ql
900W
74175
QUAD Q2
150 V
90W
D
FF
Processor
System Bus
R eLK
Q3
9W
INPUT 0 - - - - - - - - '
DG211 or
DG212
~)L.---.....I
an
Your
-15V
Figure s. Microprocessor Contiolled Analog Signal Attenuator
P-32167-Rev. B (11/15193)
1-65
Siliconix
DG211/212
AMember ofthe'nM[C Group
Applications (Cont'd)
VIN 0 - - - - - - - 1
~------~---------------o Vour
+5V
Rl
GAJNlo--~-+_--t
Gain error is determined only by the
resistor tolerance. Op amp offset and
CMRR will limit accuracy of circuit.
90kn
Av=l
Vour
GAJN20-_~-+_--t
VIN
Av=10
(with SW4 closed)
GAJN40-----+----t
Av = 100
R4
DG211 or DG212
1kn
FIgure 6. Precision-Weighted Resistor Programmable-Gain Amplifier
+5V
+15 V
y
Y
v+
Logic Input
Low = Sample
High = Hold
t----t-OVour
Aquisition TIme
Aperature TIme
Sample to Hold Offset
Droop Rate
=25""
=1""
=SmV
'=5mV/s
FIgure 7.
1-66
DG211 Sample-and-Hold
P-32167-Rev. B (11/15/93)
Siliconix
DG211/212
AMcmbcr ofthc TBMIC Group
Applications (Cont'd)
+15V
VI
+5V
VL
DG212
+5V
IN!
74C04
74C04
J
Q
CLK
KCLR
R
IhMM74C73
J
Q
CLK
KCLR
-
-
IN4
0
-
IN!
1b
Scope
-
r-------------------,I
I
+l5V
Channell Amplifier
(Identical to 2, 3, 4)
I
..
I
I
+15 V
I
I
100 k.Q
I--~ 1MQ
I
Position
I
100k.Q
I
I
I R
-15V
I (See Below)
IL _
_ __________________ J
Al is op amp with suitable bandwidth, slew rate, etc., for desired signals.
R is added for extra gain according to formula: Voltage Gain = 1 + 100 k.Q
R
Figure 8.
P-32167-Rev. B (11/15/93)
The "Scope Extender" Which Displays 4-Channels Simultaneously on a Single
nee Scope
1-67
Siliconix
DG211B/212B
AMember of tho TsMIC Group
Improved Quad CMOS Analog Swtiches
Features
Benefits
Applications
• ± 22-V Supply Voltage Rating
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
TIL and CMOS Compatible Logic
Low On-Resistance-rDS(on): 50 g
Low Leakage-ID(on): 20pA
Single Supply Operation Possible
Extended Temperature Range
Fast Switching-tON: 120 ns
Low Glitching-Q: 1 pC
Wide Analog Signal Range
Simple Logic Interface
Higher Accuracy
Minimum 'fransients
Reduced Power Consumption
.superior to DG2111212
Industrial Instrumentation
Test Equipment
Communications Systems
Disk Drives
Computer Peripherals
Portable Instruments
Sample-and-Hold Circuits
Description
The DG211B/212B analog switches are highly improved
versions of the industry-standard DG211/212. These
devices are fabricated in Siliconix' proprietary silicon gate
CMOS process, resulting in lower on-resistance, lower
leakage, higher speed, and lower power consumption.
These quad single-pole single-throw switches are designed
for a wide variety of applications in telecommunications,
instrumentation, process control, computer peripherals,
::t::. 1'..n ;~pro'!ed ch~!ge injection r.omren~ation design
minimizes switching transients. TheDG211BandDG212B
can handle up to ± 22 V; and have an improved continuous
current rating of 30 mAo An epitaxial layer prevents
latchup.
All devices feature true bi-directional performance in the
on condition, and will block signals to the supply levels in
the off condition.
The DG211B is a normally closed switch and the DG212B
is a normally open switch. (See Truth Table.)
Functional Block Diagram and Pin Configuration
'Jruth Table
DUal-In-Une and SOIC
INl
Logk
IN2
Dl
D2
DGZllB
»ClUB
0
ON
OFF
1
OFF
ON
~
Logic "0" s o.s V
Logic "1" 2: 2.4 V
V-
V+
Switches Shown for Logic "1" Input
GND
VL
Sl
Ordering Information
S4
S3
D4
D3
IN4
IN3
teDlP Rangel
Padalge
Part NUDlbe.l'
DG211BDJ
16-Pin Plastic DIP
DG212BDJ
-40toS5'C
'lbpView
1-68
DG211BDY
16-PinNarrowSOIC
DG212BDY
P-32167-Rev. A (11/15/93)
Siliconix
DG211B/212B
AMember of the TEMIC Group
Absolute Maximum Ratings
Voltages Referenced to VV+ ................................................. 44V
GND ............................................... 25V
Digital Inputs'Vs, VD ............... (V-) -2 Vto (V+) +2 V
or 30 rnA, whichever occurs first
Current, Any Thrminal ............................... 30 rnA
Peak Current, S or D
(Pulsed at 1 ms, 10% duty cycle max) .................. 100 rnA
Storage Thmperature . . . . . . . . . . . . . . . . . . .. . . . .. .. -65 to 125°C
Power Dissipation (Package)b
16-PinPlasticDIP" ................................. 470mW
16-Pin Narrow SDICd ............................... 640mW
Notes:
a. Signals on Sx, DX, or INx exceeding V+ or V-will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6.5 mWrC above 75°C
d. Derate 7.6 mWrC above 75°C
Specifications
D SutrlX
-40 to 85°C
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ = 15V,V- = -15V
VL = 5 V, VIN = 2.4 V, 0.8 yo
Temp"
MJnc
Full
-15
I
'JYpb
I
Max"
Unit
15
V
Analog Switch
Analog Sigoal Ranged
Drain-Source On-Resistance
roS(on) Match
VANALOG
roS(on)
VD = ±10V,Is = 1 rnA
AroS(on)
Room
Full
45
Room
2
85
100
Source Off Leakage Current
IS(off)
Vs= ±14V,VD = 'f14V
Room
Full
-0.5
-5
±0.01
0.5
5
Drain Off Leakage Current
ID(off)
VD = ±14 V,Vs = '1'14 V
Room
Full
-0.5
-5
±0.01
OS
Drain On Leakage Current
ID(on)
Vs = VD = 14 V
Room
Full
-0.5
-10
±0.02
2.4
5
n
nA
0.5
10
Digital Control
Input Voltage High
VINH
Full
Input Voltage Low
VINL
FuU
Input Current
Input Capacitance
IINHor IINL
VINH or VINL
Full
Room
CIN
0.8
-1
1
V
vA
pF
5
Dynamic Charallteristills
Thrn-On TIme
tON
Thrn-Off TIme
Charge Injection
Room
300
tOFF
Vs=2V
See Figure 2
Room
200
Q
CL= l000pF, Vg = Ov,Rg = on
Room
1
Room
5
Source-Off Capacitance
Cs(or!)
Drain·Off Capacitance
CD(or!)
Channel On Capacitance
Off Isolation
Channel-to-Channel Crosstalk
P-32167-Rev. A (11/15/93)
Vs=OV,f=IMHz
Room
5
CD(on)
VD = Vs = OV,f= 1 MHz
Room
16
DIRR
CL = 15 pF,RL = 50n
Vs = 1 VRMS. f = 100 kHz
Room
90
Room
95
XTALK
ns
pC
pF
dB
1-69
..
Siliconix
DG211B/212B
AMcmbcr of the TBMIC Group
Specifications
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ = 15 V, V- = -15V
VL = 5 V, VIN = 2.4 V, O.S yo
D Suffix
-40 to S5'C
Temp"
Mine
J
1)pb
JMax"
Unit
Power Supply
I+
Negative Supply Current
1-
Room
Full
IL
Room
Full
VOP
Full
VIN = 00r5V
Logic Supply Current
Power Supply Range for
Continuous Operation
10
50
Room
Full
Positive Supply Current
-10
-50
fIA
10
50
±22
V
Max"
Unit
12
V
±4
Specifications for Single Supply
D Suff"1X
-40 to 85'C
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+=12V,V-=OV
VL = 5V, VIN = 2.4 V, O.S yo
Temp"
Mine
Full
o
I
1)pb
I
Analog Switch
Analog Signal Ranged
VANALOG
Drain-Source On-Resistance
VD = 3V,SV,Is = 1 rnA
Dynamic Chal'aeter1sti~
Thrn-On TIme
tON
Thrn-OffTIme
tOFF
Charge Injection
Q
VS=SV
See Figure 2
CL= 1 nF, Vgcn= 6 V, Rsen =
on
Room
300
Room
200
Room
4
ns
pC
Power Supply
Room
Full
Positive Supply Current
I+
Negative Supply Current
1-
Room
Full
IL
Room
Full
VOP
Full
VIN = 00r5V
Logic Supply Current
Power Supply Range for
Continuous Operation
10
50
-10
-50
fIA
10
50
+4
+44
V
Notes:
a. Room = 25'C, Full = as determined by the operating temperature suffIX.
b. 'JYpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Guaranteed by design, not subject to production test.
e. VIN = input voltage to perform proper function.
1-70
P-32167-Rev. A (11/15/93)
Siliconix
DG211B/212B
A Member oftbe TEMIC Group
'JYpicaJ Characteristics
IllS(on) vs. Vn and Power Supply Voltages
110
CI
13c
;;l
.:a
~
.-
A
100
A
90
:/'
80
70
~
60
0
til
"
50
.§
40
=
~
I
i
g
30
1\
If ,
,. "'"...."'" <-
~
±5V
225
200
-j
-
<±IOIV
~
175
~
125
til
100
0
"0
.~
~
150
75
I
50
J
25
I /
50
I-' ./~15IV
-15
20
:....
~12V
E
15V
10
0
L
-10
10
15
~~
ID(~
...~
V
i--f--'"
--
IS(off).ID off) -
V
-20
1"""'---
V
-30
6
8
10
12
14
-20 -15 -10 -5
16
VD - Drain Voltage (V)
30
F V+
1= V r
15V
15V
Vs, VD - ±14 V
..... V
()
.2:
:::
"~
0
u"
I
10pA
~
V+ = 15V
0 - V- = -15VI"""'"
0
25
45
65
Thmperature CC)
P·32167-Rev. A (11/15/93)
/
I
V
5
10
15
20
..
Qs Qn - Cbarge Injection vs. Analog Voltage
•
10
-10
-20
1pA
-55 -35 -15
5
20
~ 100pA
IS(off).ID(off)
0
VANALOG - Analog Voltage (V)
Leakage Current vs. Temperature
.:j
-5
o
5
VD - Drain Voltage (V)
---
-40
024
E
-10
V+ =22V
30 I - V- = -22V
TA=25'C
20
.:j
o
InA
-
-55'C __
.........
Leakage Currents vs. Analog Voltage
I
--
~
40
":::
8
~10V
-&:- ,.
85'C
.-...
~~
25'~
1"'000..
o
16
125'C~
i'..
10
\\ 7V
~:-
I--""'"
20
I I
"I,
lL ~
30
±20V
~
.2:
d
/
V-
40
V~ =5~
,
I \
I
V/\
60
Ills (on) vs. Vn and Single Power Supply Voltages
250
j
/'
70
10
-20 -16 -12 -8 -4 0 4 8 12
VD - Drain Voltage (V)
CI
V- = -15V
80
r"
20
I- V+=15V
90
'/
I>:
0
rnS(on) vs. Vn and Temperature
100
85
105 125
-
V
~ f-~
V+=12V
V-=OV
/
-30
-15
-10
-5
o
5
10
15
VANALOG - Analog Voltage (V)
1-71
Siliconix
DG211B/212B
AMcm'bcr ofthel'BMlc Group
'JYpical Characteristics (Cont'd)
Off Isolation vs. Frequency
120
110
100
iii'
90
~
80
:I~+;+~N"I
V- = -15V
,~
IIII
,~
~
il l
I
RL=50Q
70
1' ....
60
50
40
10k
1M
lOOk
10M
f - Frequency (Hz)
Schematic Diagram (1Ypical Channel)
V+
Sx
1Nx
GND
V-
;
~
t
Level
v-
Shift!
y v+
Drive
lJ~
t
9
o Dx
Figure 1.
Test Circuits
+15V
V+
VS=+2V
o-f-"-S_ _- Vo
3V
OV
50%
Ir <20ns
tf <20 no
3V
Switch
Output Vo
Vo=VS
RL + 1'])S(0I1)
Figure 2.
1-72
Switching TIme
P-32167-Rev. A (11/15/93)
Siliconix
DG211B/212B
AMcmbcr ottbcTBMIC Group
Test Circuits (Cont'd)
+15 V
+15V
,..::----+t-+---01 ....---++If--t_-o
500
Va
NCO-+-----~~~--~~--~-o Va
Ov, 2.4 V O--fI::.N;.o2_C>-
Off Isolation = 20 log
Figure 3.
I~~ I
C= RFbypass
-15V
XTALK Isolation = 20 log
Off Isolation
Figure 4.
Channel-to-Channel Crosstalk
+15V
Va
V+
Rg
S
/
Vo
I
1Nx
l000pF
CL
t
AVo
L
T
ONI
OFF
~
AVo = measured voltage error due to charge injection
The charge injection in coulombs is Q = CLX AVo
Figure 5.
Charge Injection
Applications
+ 5V
+15V
D
Logic Input
Low = Sample
High = Hold
+15V
50pF
2000
+---+-0 VOUT
11000PF
30pF
-15V
Aquisition TIme
Aperature TIme
Sample to Hold Offset
Droop Rate
= 25lls
=11lS
=5mV
=5mV/s
P-32167-Rev. A (11/15193)
Figure 6.
Sample-and-Hold
1-73
Siliconix
DG211B/212B
AMember oftbe TBMIC Group
Applications (Cont'd)
+15Y
fC4
Select
TIL
160
,----r---,-----,----,--.,-----.
120
I--+--+--+----I---!---I
80
I---+--"'Io.---t--+--+--I
!g
fo
Select
I
.~
Control
".t 40 I-'iii~+or-~~",,;;;;~~-.t---+-~
fez
Select
~
fCl
Select
o
I----I---=p~
Y_ DG211B GND
-40
10
AL (Yoltage Gain Below Breat' Frequency) =
-15Y
>------'---0
Rl =10kn
100
1k
10k
Frequency - Hz
YOUT
R3
Ri:
lOOk
1M
= 100 (40 dB)
fc(BreakFrequency) = :btR3CX
1
fr. (Unity Gain Frequency) = :btRICX
Max Attenuation = l'DS(on) ... -40 dB
lOkn
Figure 7.
+5Y
Active Low Pass Filter with Digitally Selected Break Frequency
+15Y
30pF
Yrnlo-~--~~L---~~--~
Yrn2o-+---~"
...._ _- - l
+15Y
CH
DG212B
Rpl
18kn
Rpl
9.9kn
Rpl
lookn
RGI
2kn
RG2
100'-1
RG3
100'-1
-15Y
Gain = Rp+RG
RG
Gain 1 (xl) 0------11-1 >--~
Gain 2 (xlO) o-----+---C_----J
Gain 3 (xlOO) 0-------11----1;1>----'
Gain 4 (xl0oo) o-----+------D_----J
Logic High = Switch On
-15Y
Figure 8.
1-74
A Precision Amplifier with Digitally Programable Input and Gains
P-32167-Rev. A (11/15193)
Silicanix
DG221
AMember of the TBMIC Group
Quad SPST CMOS Analog Switch with Latches
Features
Benefits
Applications
•
•
•
•
•
• Compatible with Most ,..P Buses
• Allows Wide Power Supply Tolerance
Without Affecting TIL Compatibility
• Reduced Power Consumption
• Allows Flexibility of Design
•
•
•
•
•
•
Accepts lS0-ns Write Pulse Width
S-V On-Chip Regulator
Built on PLUS-40 Process
Latches Are 'fiansparent with WR Low
Low On-Resistance: 60 Q
!,P Based Systems
Automatic Test Equipment
Communication Systems
Data Acquisition Systems
Medical Instrumentation
Factory Automation
Description
The DG221 is a monolithic quad single-pole, single-throw
analog switch designed for precision switching applications
in communication, instrumentation and process control
systems. Featuring independent onboard latches and a
common WR pin, each DG221 can be memory mapped,
and addressed as a single data byte for simultaneous
switching.
Designed on the Siliconix PLUS-40 CMOS process, the
DG221 combines low power and low on-resistance (60 Q
typical) while handling continuous currents up to 20 rnA.
An epitaxial layer prevents latchup.
The device features true bidirectional performance in the
on condition. These switches guarantee a rail-to-rail
blocking capability (44 V max), in the off condition.
Functional Block Diagram and Pin Configuration
Four Latchable SPST Switches per Package
'!ruth Table
Dual-In·Une and SOIC
INx
WR
0
0
ON
1
0
OFF
V-
V+
X
1
GND
III
Control data latched-in,
switches on or off as selected
by last INx
I
X
Switch
Maintains previous state
Logic "0" s 0.8 V
Logic"1"" 2.4 V
Switches Shown for Logic "1" Input
Ordering Information
1bpView
P·32167-Rev. B (11/15/93)
Pan Number
Temp Range
Pac:kage
O'Cto70'C
16-Pin Plastic DIP
DG221CJ
-40'C to 8S'C
16-Pin Narrow SOlC
DG221DY
-S5'C to 125'C
16-Pin CerDIP
DG221AK/883
1-75
Silicanix
DG221
AMembcr of tho TBMIC Group
Absolute Maximum Ratings
Voltages Referenced to vv+ .•...............•...•...............•....•....•. 44V
GND •....•.•....•.•....•....•.....•.....•..•....... ZSV
Digital Inputsa, Vs. VD ............... (V-) -2 Vto (V+) +2V
or 20 rnA, whichever occurs first
Continuous Current (Any Thrminal) .................... 30 rnA
Continuous Current, S or D ...•...•..•.•..•....... :... 20 rnA
Peak Current, S or D (Pulsed 1 ms, 10% duty cycle) ....... 70 rnA
Storage Thmperature:
(AK Suffix) •........... -65 to 150°C
(CJ and DY SuffIX) •.•••• -65 to 1ZSoC
Power Dissipation (Package)b
16-Pin CerDIPC ...................................• 900 mW
16·Pin PlasticDIpd ................................. 470 mW
16-Pin SOlO' ....•....•.•..........•..............• 600 mW
Notes:
a. Signals on SX, Dx. or INX exceeding V + or V-will be clamped by
intemal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate 12 mWrC above 75°C
d. Derate 6.5 mWrC above zsoC
e. Derate 7.7 mW/oC above 75°C
. Speciticationsa
ASufl"IX
-55 to 1ZSoC
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+=15Y,V-=-15V .
VIN = 2.4 Y, O.Sf V, WR: = 0
Thmpb
Is = -lOrnA, VD = ±10V
'JYpc
Mind
I
DSuflix
-40 to S5°C
Mud
Mind
15
-15
I
Mud
Unit
Analog Switch
Analog Signal Range"
-15
15
V
90
135
g
VANALOG
Full
Drain-Source
On·Resistance
lDS(on)
Room
Full
60
Source Off
Leakage Current
IS(off)
Room
Full
±0.01
-1
-100
1
100
-5
-100
5
100
Drain Off
Leakage Current
ID(off)
Room
Full
±0.02
-1
-100
1
100
-5
-100
5
100
±0.01
-1
-200
1
200
-5
5
200
Drain On
Leakage Current
Vs=±14Y,VD='F14V
ID(on)
VS=VD=±14V
Room
Full
90
135
-200
nA
Digital Control
Input Current
VIN = OVor = 2.4 V
Thm-OnTIme
toN
Thm-OffTIme
tow
Thm-On TIme Write
See Figure 2
toN,WR
See Figure 3
Room
550
550
Room
340
340
Room
550
550
340
toFBWR
Room
Write Pulse Width
tw
Room
120
150
150
Input Setup TIme
ts
Room
130
180
180
Input Hold TIme
tH
FulI
0
20
20
Room
20
Room
8
Thm-OffTIme Write
Charge Injection
Q
Source-Off Capacitance
Cscoff)
Drain-Off Capacitance
CD(off)
Channel-On Capacitance
CD(on)
Off Isolation
OIRR
Interchannel Crosstalk
XTALK
1-76
See Figure 4
CL=1000pF
VGBN=OY,RGBN=Og
f= 1 MHz, Vs. VD =OV
Vs = 1 Vp-~f= 100kHz
CL=15p ,RL=IW
Room
9
Room
29
Room
70
Room
90
340
ns
pC
pF
dB
P-32167-Rev. B (11/15/93)
Siliconix
DG221
A Member of the TBMIC Group
Specificationsa
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+=15V,V-=-15V
VIN = 2.4 V, 0.8r V, WR = 0
ASull"1x
-55 to lZS'C
Tempb
'JYpc
Mind
I
Maxd
D SutTa
-40 to 85'C
Mind
I
Maxd
Unit
Power Supplies
Positive Supply Current
Negative Supply Current
All Channels On or Off
VIN = OVor2.4 V
rnA
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = ZS'c, Full = as determined by the operating temperature suffIx.
c. 1Ypical values are for DESIGN AID ONLY. not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. is used in this data sheet.
e. Guaranteed by design. not subject to production test.
f. VIN = input voltage to perform proper function.
Schematic Diagram (1YPical Channel)
V+
S
GND
INx
Level
Shift!
Drive
WR
D
0
V-
Figure 1.
P-32167-Rev. B (11/15/93)
1-77
Silicanix
DG221
AMemberoftheTBMICGroUp
Test Circuits
+lSV
V+
Logic
Input
Switch
Input
Switch
Output
3V
Ir < 10ns
OV
tf < 10ns
Vs
Vo
CL (includes fixture and stray capacitance)
Vo=Vs
Figure z.
Switching Tune
3V
WIt"
Vo
OV
3V
IN
OV
Vs
Your
Vo
toN,WR ...,
CL (includes fixture and stray capacitance)
Vo=Vs
RL
t-
-+j
r-
+ 1'])5(on)
Figure 3.
Wit Switching Tune
3V
IN
3V
tH = Hold TIme
L
ts=S~Tune
tw = WIt" Pulse Width
The latches are level sensitive. When Wit is held low the latches are transparent and the switches
respond to the digital inputs. The digital inputs are latched on the rising edge of WR:.
Figure 4. WR Setup Conditions
1-78
P·32167-Rev. B (11/15/93)
Siliconix
DG221
AMcmbcr ofthc TBMIC Group
Test Circuits (Cont'd)
+15V
V+
Rg
I
Vo
S
Vo
CL
I1000 PF
INx
t
AVO
L
T
OFFI
ON
~
AVO = measured voltage error due to charge injection
The charge injection in coulombs is Q = CLX AVO
Figure 5. Charge Injection
+15V
~I-C_--+
i-'!-----f.+-+--01 "--++.1-_-0 Vo
OffIsolation = 20 log
C= RFbypass
XTALKIsolation = 20 log
I~~ I
C=RFbypass
Figure 6.
Figure 7.
Off Isolation
..
Channel-to-Channel Crosstalk
Application Hints a
Positive Supply
Voltage
(V)
lITegadve Supply
Voltoge
(V)
GN'D
WR
VlN
Logie Input
Voltage
VlNB(mln)iVlNl.{1II8lI)
(V)
(V)
(V)
(V)
v+
v-
VS~VJ)
Analog Voltage
Range
15
-15
0
2.4/0.8
2.4/0.8
-15 to 15
20
-20
0
2.4/0.8
2.4/0.8
-20 to 20
10
-10
0
2.4/0.8
2.4/0.8
-10 to 10
10
-5
0
2.4/0.8
2.4/0.8
-StoW
Notes:
a. Application Hints are for DESIGN AID ONLY, not guaranteed and not subject to production testing.
P-32167-Rev. B (11/15/93)
1-79
Siliconix
DG221
AMcmber ofthc 1'BMICGrOUP
Applications
+15V
9MQ
V+
DG221
900kn
IN2
90kn
Data Bus
:>
IN3
9kn
1kn
GND
V-
-15V
The TL081 is used as an output buffer while
the voltage divider provides attenuation.
Figure 8.
tAP-Controlled Analog Signal Attenuator
Output Attenuation for Figure 8
1l-uth Thble
On
Wi
1N1
IN}
IN3
IN4
0
All
0
0
1
1
1
0.1
0
None
0
1
0
1
1
0.01
1
0
1
0
1
1
0
1
0.001
1
1
0
2
0
1
1
1
0
0.0001
1
0
1
0
3
1
1
0
0
4
1N1
INz
IN3
1N4
WRa
0
0
0
0
1
1
1
1
0
1
1
1
0
1
1
Switch
Gain
Notes:
a. WR may be held at "0" for temporary operation similar to DG201J'{s. With WR at "0" SWl will remain on as long as INl is held at "0".
1-80
P-32167-Rev. B (11115/93)
Siliconix
DG243
AMember of the TBMIC Group
General Purpose
Monolithic Dual SPDT CMOS Analog Switch
Features
Benefits
Applications
•
•
•
•
•
• LowPower
• Reduced Switching Noise
• Reduced Need for Buffers
•
•
•
•
•
PLUS-40 Process
Make-Before-Break Operation
Full Rail-ta-Rail Analog Signal Range
'Ihle TIL Compatibility
LowrDS(on): 300
Programmable Gain Amplifiers
Analog Multiplexing
SelVo Control Systems
Programmable Filters
Audio Switching
Description
The DG243 is a monolithic dual SPDT analog switch
designed for general switching applications in
communication, instrumentation, and process control
systems. Featuring make-before-break action, the DG243
is used in closed loop systems to switch gain or bandwidth
networks without opening the loop.
The DG243 is designed on the Siliconix PLUS-40 CMOS
process to combine low power dissipation with a high
breakdown voltage rating of 44 V. An epitaxial layer
prevents latchup.
Each switch conducts equally well in both directions when
on, and blocks up to 30 V peak-to-peak when off.
Functional Block Diagram and Pin Configuration
Dual-In-Line
1ruth Table
Dl
Sl
Logie
SWbSW~
SW~,SW4
NC
INl
0
OFF
ON
03
V-
1
ON
OFF
S3
GNO
S4
VL
04
V+
NC
IN2
~
02
D
Logic "0" s 0.8 V
Logic "1" '" 2.0 V
Switches Shown for Logic "1" Input
Ordering Information
Teml'Range
Package
0·Cto70·C
16-Pin Plastic DIP
OG243CJ
ThpView
P-32167-Rev. A (11/15/93)
1-81
Siliconix
DG243
AMember of the Tl3MIC Group
Absolute Maximum Ratings
V+toV- ........................................... 44V
GNDtoV- .......................................... 25V
VL ................................. (GND - 0.3 V) to 44 V
DigitalInputs'Vg, VD ............. (V-) -2Vto(V+ plus2V)
or 30 rnA, whichever occurs first
Current (Any 1l:rminal) Continuous .................... 30 rnA
Current, S or 0 (Pulsed 1 ms 10% duty) .....•.......... 100 rnA
Storage 1l:mperature .......................... -65 to 125'C
Power Dissipation (Package)b
16-PinPlasticDIPC ................................. 450mW
Notes:
a. Signals on Sx, Ox, or INx exceeding V + or V-will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate6mWI'Cabove75'C
Specifications
e
Test Conditions
Unless Otherwise Specified
Parameter
Sufllx
Ot070'C
V+ = 15V,V- = -15V
VL = 5V,VIN = 2.0 V, 0.8 V"
Temp"
Mine
VANALOG
Full
-15
rnS(on)
Is = -lOrnA, VD = ±10V
Room
Full
Symbol
I I
'Jypb
Max"
Unit
15
V
30
50
75
r.l
Analog Switch
Analog Signal Ranged
Drain-Source On-Resistance
IS(off)
Switch Off Leakage Current
VD= ±14V,Vs= =F14V
ID(off)
Channel On Leakage Current
ID(on)
VD=VS= ±14V
Room
Full
-1
-100
±0.3
1
100
Room
Full
-1
-100
±0.3
1
100
Room
Full
-2
-200
±0.5
2
200
nA
Digital Control
Input Current with V!!" Low
VIN=0.8V
Input Current with VIN High
Dynamic Characteristics
1I1rn-Onnme
toN
1I1rn-Offnme
toFF
Charge Injection
Q
Off Isolation Reject Ratio
OIRR
Crosstalk (Channel-to-Channel)
XTALK
RL = 1 W, CL = 35 pF, See Figure 2
CL = 1000 pF, VGEN = Ov, RGEN = 0 r.l
RL = 75r.l,f= 1 MHz
Source-Off Capacitance
CS(of!)
Drain-Off Capacitance
CD(of!)
Room
250
700
Room
390
1200
Room
60
Room
75
Room
89
Room
15
Room
17
CD + S(on)
Room
45
Positive Supply Current
I+
Room
Negative Supply Current
1-
Room
Logic Supply Current
IL
Room
IGND
Room
Channel-On Capacitance
f=lMHz,Vs=OV
ns
pC
dB
pF
Power Supplies
All Channels On or Off
Ground Current
180
-300
100
-300
300
-150
300
~
-140
Notes:
a. Room = 25'C, Full = as determined by the operating temperature suffIX.
b.
e.
d.
e.
1»pical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
Guaranteed by design, not subject to production test.
VIN = input voltage to perform proper function.
1-82
P-32167-Rev. A (11115193)
Siliconix
DG243
AMember oftheTBMIC Group
Schematic Diagram (1YPical Channel)
V+
r---~----~+-~_OS
GND
INx
L----+----~
__~_OD
VFigure 1.
Test Circuits
Va is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing edge of the
output waveform.
+5V
Logic
Input
Switch
Input
Switch
Output
+15 V
3V
50%
OV
t, < 20ns
tf < 20ns
Vs
Va
CL (includes fixture and stray capacitance)
Vo=Vs
Figure 2.
+5V
RL
RL+ I'J)S(on)
III
Switching Tune
+15 V
Va
Figure 3.
P-32167-Rev. A (11115193)
Charge Injection
1-83
Silicanix
DG243
AMember oltho ~MIC Group
Applications
The make-before-break operation of the DG243 provides
simple transient suppression in these two important
applications.
occurring at the inverting input of the op amp.
Consequently, these transients are not amplified to VOU'F
Figure 4 takes advantage of the make-before-break
Figure 3 shows a minimum amount of glitching during operation of the DG243 by shorting transition current to
changes of gain states. The relatively low impedance of the real ground instead of virtual ground. The best results are
gain setting resistors (10 kg, 1 kg, and 100 g) shunt the obtained by selecting an op amp with the proper offset
injected charge-to-ground minimizing transient effects voltage specification.
Sl
VINl
.n
Your
INl
~
VIN2
'U
IN
DG243
J!igure 4. Minimizing Giitches in Audio Swiiching
Your
High Speed Op Amp
10kn
lkn
.n o-r::IN,:.ol_r>1l:l.DG243
VIN ---------------------
vour~
10012
Clean transitions no glitches due to op amp open loop.
J!igure 5. Make-Before-Break Improves uansient Response in Programmable Gain Amplifiers
1-84
P-32167-Rev. A (11/lS/93)
Siliconix
DG271
AMemberofthc TBMIC Group
High-Speed Quad Monolithic SPST CMOS
Analog Switch
Features
Benefits
Applications
•
•
•
•
•
• Fast Settling Times
• Reduced Switching Glitches
• High Precision
•
•
•
•
•
Fast Switching tON: 55 ns
Low Charge Injection: 9 pC
Low rDS(on): 32 Q
TIL Compatible
Low Leakage: 50 pA
High Speed Switching
Sample/Holds
Digital Filters
Op Amp Gain Switching
Flight Control Systems
Description
The DG271 high speed quad single-pole single-throw
analog switch is intended for applications that require low
on-resistance, low leakage currents, and fast switching
speeds.
Built on Siliconix' proprietary high voltage silicon gate
process to achieve superior on/off performance, each
switch conducts equally well in both directions when on,
and blocks up to the supply voltage when off. An epitaxial
layer prevents latchup.
Functional Block Diagram and Pin Configuration
Dual-In·Line and SOIC
IN1
IN2
D1
D2
S1
S2
v-
v+
GND
NC
S4
S3
D4
D3
IN4
IN3
D
D4 IN4 NC IN3 D3
ThpView
Top View
Ordering Information
Temp Range
Package
Part Number
o t070·C
16·Pin Plastic DIP
DG271CJ
-40t085·e
16-Pin Narrow sOle
DG271DY
DG271AK
16-Pin CerDIP
DG271AK/883
5962·8671602MEA
-55 to 125·C
DG271AZ/883
LCC-20
P-32167-Rev. B (11/15193)
'ftuth Thble
Switch
o
ON
OFF
Logic "0" s: 0.8 V
Logic"l" '" 2 V
Switches Shown for Logic "1" Input
5962-8671602M2A
1-85
Silicanix
DG271
AMomber of tho TSMIC Group
Absolute Maximum Ratings
V+toV- ........................................... 44V
GNDtoV- .......................................... 2SV
Digital Inputs" Vs. VD ............. (V-) -2 V to (V+) +2 V or
20 rnA, whichever occurs first
Current, Any Thrminal Except S or D ................... 30 rnA
Continuous Current, S or D ........................... 20 rnA
Peak Current, S or D
(Pulsed at 1 ms, 10% duty cycle max) .................. 100 mA
Storage Thmperature
(AI(, AZ, DY Su(ftx) . . . .. -65 to 150'C
(CJ SuffIX) ............. -65 to 125'C
Power Dissipation (Package)b
16-Pin Plastic DIP" .....•........................... 470 mW
16-PinPlasticNarrowSOICd ......................... 600mW
16-Pin CerDIP" ...............•.................... 900 mW
LCC-2of •........•............•................... 750 mW
Notes:
a. Signals on Sx. Dx, or INx exceeding V + or V-will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6.5 mWI'C above 75'C
d. Derate 7.6 mW/'C above 75'C
e. Derate 12 mWI'C above 75'C
f. Derate 10 mWI'C above 75'C
Specificationsa
Test Conditions
Unless Otherwise Specified
Parameter
ASutr.x
-55 to 12S'C
I
C, DSutrlX
Ot070'C
-40 to 85'C
I
V+ = 15V,V- = -15V
VJN = 2 V, 0.8 yf
Tempb
VANALOG
Full
roS(on)
Is= 1 rnA, VD = ±10V
Room
Full
32
Room
Full
±0.05
-1
-100
1
100
-1
-100
1
100
Room
Full
±0.05
-1
-100
1
100
-1
-100
1
100
Vs=VD=±14V
Room
Full
±0.05
-1
-200
1
200
-1
-200
1
200
VJN=2 V
Room
Full
0.010
-1
-10
VJN= 15 V
Room
Full
0.010
VJN= 0 V
Room
Full
0.010
Room
Full
55
65
80
65
80
Room
Full
SO
65
80
65
80
Room
9
Symbol
1)pc
Mind
Mud
Mind
15
-15
Mud
Unit
15
V
SO
75
C
Analog Switch
Analog Signal Range<
Drain-Source On-Resistance
IS(ofl)
Switch Off Leakage Current
VD= ±14V,Vs= 'l'14V
ID(ofl)
Channel On Leakage Current
ID(on) +
Is(on)
-15
SO
75
nA
Digital Contr4l)
Input Current with Voltage High
Input Current with Voltage Low
IJNH
IINL
-1
-10
1
10
-1
-10
1
10
tJA
-1
-10
Dynamic Claaraeteristlcs
Thrn-OnTIme
Thrn-OffTIme
Charge Injection
1-86
toN
Vs= ±10V
See Figure 2
toFF
Q
CL = loopF, Vgen = OV
Rgen = OC
ns
pC
P-32167-Rev. B (11115/93)
Siliconix
DG271
AMember ofthc TBMIC Group
Specifications a
Test Conditions
Unless Otherwise
Specified
Parameter
V+ = 15V,V- = -15V
VIN = 2 V, O.S yf
Symbol
C, D Suff'1X
Ot07O·C
-40 to S5·C
ASuff'1X
-55 tol2S·C
1YPc
Tempb
Mind
I
Maxd
Mind
I
Max d
Unit
Dynamic Characteristics (Cont'd)
Source Off Capacitance
CS(off)
Drain Off Capacitance
CO(off)
Channel On Capacitance
Co (on)
Off Isolation
OIRR
Vs = OV,VIN = 5V
f=lMHz
Room
6
Room
S
Vo =VS = OV,VIN = OV
Room
24
Room
75
Room
95
Room
Full
4.3
Room
Full
-3.4
RL = 50r.l,f= 1 MHz
Crosstalk
XTALK
pF
dB
Supply
I+
Positive Supply Current
7.5
7.5
11
11
rnA
All Channels On or Off
1-
Negative Supply Current
-6
-10
-6
-10
Notes:
a. Refer to PROCESS OPTION FLOWCHAKT (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25·C, Full = as determined by the operating temperature suffix.
c. 1}rpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
1Ypical Characteristics
Leakage Currents vs. Analog Voltage
1
OJ
~
i
~
o
j
.~
Q
o
so
~
.e:
~
60
40 1--+-....j,oO!=--.j....::~-~-+--d--l
1
J
i
-50
~ -100
1
1
IO(off) or lS(off)
/'
.-
I
// ".(
rl~
TA= 2S·C
20
-15
-10
-5
o
5
10
Vo - Drain Voltage (V)
P-32167-Rev. B (11/15/93)
15
--
i..--""
IO(on)
-150
-15
-I
-10
-5
o
5
1
10
15
VANALOG - Analog Voltage (V)
1-87
Siliconix·
DG271
AMember of the TaMIe Group
'fYpical Characteristics (Cont'd)
Input Switching Threshold
2.5
Supply Current vs. Switching Frequency
8
7
2.0
6
~
;l:'
1.5
5
,£
1.0
4
3
1+
...... ~
1-
.".
1'10"
0.5
2
0
1
0
±10
±5
±15
1k
±20
Switching Frequency (Hz)
Leakage Currents vs. Temperature
lllS(on) vs. VD and Temperature
~
1M
lOOk
10k
V+, V-Positive and Negative Supplies M
10nA
70
CI
~
.j
..
60
50
P:
0
40
~
~
30
'01
IS
I
!
a
-15
-10
o
-5
5
10
15
Thmperature (0C)
Vo - Drain Voltage (V)
Switching Times vs. Temperature
90
80 I-
J+=~5)
V- = -15V
70
t(on)~
50
L
~
",
~
",
I(oy
V
40
~
,
V
~
~
\
160
-;;;-
S
140
\
"S
t.:::
120
J
100,
~
\
\
80
60
".
30
-55 -35 -15
-y~
\
" "I(on)
"
I'...
"'.....
""i'-...
~
"""'--
~
r-
40
5
25
45
65
Thmperature (0C)
1-88
/'
V
l,;1
60
Switching Times vs. Power Supply Voltage
180
85
105 125
±4
±6
±8
±1O ±12 ±14 ±16 ±18 ±20
V + - Positive Supply (V)
P-32167-Rev. B (11/15193)
Silicanix
DG271
AMember oltbo TsMIC Group
Schematic Diagram (1Ypical Channel)
V+
r------!r---....,.-I-+--o s
GND
INx
L--~I---...--+--OD
V-
Figure 1.
Test Circuits
+15V
V+
5V
. 5V
LogIc
Ir <20ns
Input OV
tf <20 os
Switch
Input Vs
-1V;;:=;==+=:r-
D
Switch V
Output a
CL (includes fixture and stray capacitance)
Vo=Vs
RL
RL+ l'DS(on)
Figure 2. Switching Tune
P-32167-Rev. B (11/15/93)
1-89
Siliconix
DG300N301N302N303A
AMember of the TsMICGf'oup
CMOS Analog Switches
Features
•
•
•
•
•
•
Analog Signal Range: ± 15 V
Fast Switching-tON: 150 ns
Low On-Resistance-rns(on): 30 g
Single Supply Operation
Latch-up Proof
CMOS Compatible
Benefits
Applications
• Full Rail-ta-Rail Analog Signal Range
• Low Signal Error
• Low Power Dissipation
• Low Level Switching Circuits
• Programmable Gain Amplifiers
• Portable and Battery Powered Systems
Description
The DG300A-DG303A' family of monolithic CMOS
switches feature three switch configuration optioll.$ (SPST,
SPDT, and DPST) for precision applications in
communications, instrumentation and process cantro!,
where low leakage switching combined with low power
consumption are required.
Designed on the Siliconix PLUS-40 CMOS process, these
switches are latch-up proof.andaredesigned to block up to
30 V peak-to-peak when off. An epitaxial layer prevents
latchup.
In the on condition the switches conduct equally well in
both dire<:ti[)ns (with no offset voltage) and minimize error
C(lnditiQns with their loW" On·resistan~.
Featuring low power comumption (3.5 mW typ) these
switches are idealfor batterypowered applications, without
sacrificing
switching
speed.
Designed
for
break-before-make switching action, these devices are
CMOS and quasi TTL compatible. Single supply operation
is allowed by connecting the V - rail to 0 V.
Functional Block Diagram and Pin Configuration
Dual-In-Line
DG300A
V
Metal Can
NC
v+
D1
D2
NC
NC
Sl
S2
NC
NC
IN1
IN2
GND
v-
V+ (Substrate and Case)
GND
ThpView
ThpView
Ordering Information - DG300A
Temp Range
Pac:kage
o t070'C
14-Pin Plastic DIP
DG300ACJ
Logic
Switch
14-Pin CerDIP
DG300ABK
o
OFF
10-Pin Metal Can
DG300ABA
-25 to 85'C
Part Number
'Iruth Thble
ON
DG300AAK
14-P"m CerDIP
-55 to 125'C
JM38510/1160lBCA
14-Pin Sidebraze
10-PinMetalCan
1-90
DG300AAK/883
Logic "0" :s 0.8 V
Logic "1" ~ 4 V
Switches Shown for Logic "1" Input
JM38510/1160lBCC
DG300AAA/883
JM38510/1160lBIA
P-32167-Rev. A (11/15/93)
Siliconix
DG300N301N302N303A
AMemoorofthe TBMIC Group
Functional Block Diagram and Pin Configuration (Cont'd)
Dual-In-Line
DG301A
Metal Can
V+ (Substrate and Case)
NC
V+
D2
NC
NC
NC
IN
NC
GND
VGND
ThpView
ThpView
Ordering Information - DG301A
Temp Range
Package
Pan Numbllr
o t070·C
-ZSt085·C
'Iruth Table
14-Pin Plastic DIP
DG301ACJ
Logic
SWI
SW1
14-Pin CerDIP
DG301ABK
0
10-Pin Metal Can
DG301ABA
1
OFF
ON
ON
OFF
DG301AAK
Logic "0" :s 0.8 V
Logic "1" '" 4 V
Switches Shown for Logic "1" Input
DG301AAK/883
14-Pin CerDIP
JM3851O/11602BCA
-55 to 1ZS·C
14-Pin Sidebraze
JM38510/11602BCC
10-Pin Metal Can
DG301AAA/883
DG301AAA
JM38510/11602BIA
..
DG302A
'Iruth Table
Dual-In-Line
Logic
o
NC
V+
S3
S4
D3
D4
D1
D2
S1
Sz
IN1
IN2
V-
GND
Top View
OFF
ON
Logic ''0'' :s 0.8 V
Logic "1" '" 4 V
Switches Shown for Logic "1" Input
Ordering Information - DG302A
TemllRange
Package
Ot070·C
14-Pin Plastic DIP
DG302AAK
-55 to 1ZS·C
14-Pin CerDIP
DG302AAK/883
JM38510/11603BCA
14-Pin Sidebraze
P-32167-Rev. A (11/15/93)
Pan Number
DG302ACJ
JM38510/11603BCC
1-91
Siliconix
DG300A/301A/302A/303A
AMcmber of the TSMIC Group
Functional Block Diagram and Pin Configuration (Cont'd)
'fiuth 'Thble
DG303A
Dual-In-Line
NC
V+
S3
S4
D3
D4
Dl
D2
Sl
~
Logie:
SWbSW~
0
OFF
ON
1
ON
OFF
SW3,SW4
Logic "0" '" 0.8 V
Logic "1" '" 4 V
Switches Shown for Logic "I" Input
Ordering Information - DG303A
Pan N\IIIlber
Thml'Range
Padlage
14-Pin Plastic DIP
INl
IN2
Ot070'C
GND
V-
-2St085'C
DG303ACT
DG303ABK
DG303AAK
14-Pin CerDIP
ThpView
-55 to 12S'C
DG303AAK1883
JM38510/11604BCA
14-Pin Sidebraze
JM38510/11604BCC
Dot-inf1'1O!
...Alu!l~lnt
.............
_ Mov;'nnlm
... ., ... ....,....... _ ..... ......
_ ........
.a..,~
~_
Voltages Referenced to VV+ _................................................ 44V
GND ............................................... 2SV
Digital Inputsa, Vs, VD ............. (V-) -2 Vto(V+) +2Vor
30 rnA, whichever occurs ftrst
Current, Any Thnninal Except S or D ................... 30 rnA
Continuous Current, S or D ........................... 30 rnA
(Pulsed at 1 IDS, 10% duty cycle max) .................. 100 rnA
Storage Thmperature
1-92
(A & B Suffix) . . . . . . . . .. -65 to 150'C
(C SuffIX) .. .. .. .. .. .... -65 to 12S'C
Power Dissipationb
14-PinPlasticDIPC ................................. 470mW
14-PinCerDIpd .................................... 82SmW
100Pin Metal Can° .................................. 450mW
Notes:
a. Signals onSx, Ox, or INX exceeding V+ or V- will be clamped by
internal diodes. Umit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6.5 mwrc above 2S'C
d. Derate11mWrCabove75'C
e. Derate6mWrCabove75'C
P-32167-Rev. A (11/15/93)
Silicanix
DG300N301N302N303A
A Member oCthe TBMIC Group
Specifications a
Test Conditions
Unless Otherwise Specu.ed
ASufr.x
-55 to 125'C
I
B. C Suff"1X
I
V+ = 15V,V- = -15V
VIN = 0.8 V orVIN = 4 yf
Tempb
VANALOG
Full
Drain-Source On-Resistance
rOS(on)
Vo = ±1OV, Is = -lOrnA
Room
Full
30
Source Off Leakage Current
IS(ofl)
Room
Hot
±0.1
-1
-100
1
100
-5
-100
5
100
IO(ofl)
Room
Hot
±0.1
-1
-100
1
100
-5
-100
5
100
10(on)
Vo=Vs= ±14V
Room
Hot
±0.1
-1
-100
1
100
-5
-100
5
100
VIN =5V
Room
Full
-0.001
-1
-1
VIN = 15V
Room
Full
0.001
VIN= OV
Room
Full
-0.001
Parameter
Symbol
'JYpc
Mind
Max d
Mind
15
-15
Maxd
Unit
15
V
50
75
g
Analog Switch
Analog Signal Rangee
Vs= ±14V,Vo= 'F14V
Drain Off Leakage Current
Drain On Leakage Current
-15
50
75
nA
Digital Control
Input Current with
Input Voltage High
Input Current with
Input Voltage Low
IINH
IINL
-1
1
1
-1
-1
1
J1A
-1
Dynamic Characteristics
Thrn-On Time
tON
Thrn-Off Time
tOFF
Break-Before-Make Time
Charge Injection
Room
150
300
Room
130
250
tOPEN
DG301A!303A Only
See Figure 3
Room
50
Q
CL = 1 nF, Rgen = OQ, Vgen = OV
See Figure 4
Room
8
Source-Off Capacitance
CS(ofl)
Drain-Off Capacitance
CO(ofl)
Channel-On Capacitance
CO(on)
Input Capacitance
Cut
Off-Isolation
OIRR
Crosstalk (Channel-to-Channel)
XTALK
See Figure 2
Vs,Vo=OV,f=lMHz
f=lMHz
I
I
Room
14
Room
14
Room
40
VIN= OV
Room
6
VIN= 15V
Room
7
Room
62
Room
74
Room
Full
0.23
Room
Full
-0.001
Room
Full
0.001
Room
Full
-0.001
VIN = Ov, RL = 1 kQ
Vs = 1 Vnns. f= 500kHz
ns
pC
pF
dB
Power Supplies
Positive Supply Current
1+
Negative Supply Curreut
1-
Positive Supply Current
1+
VIN = 4 V (One Input)
All Others = 0 V
VIN = 0.8 V (All Inputs)
Negative Supply Current
1-
0.5
1
1
10
100
-10
-100
rnA
-100
-10
-100
100
J1A
-100
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
Room = 25'C, Full = as determined by the operating temperature suffIX.
lYpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
Guaranteed by design, not subject to production test.
VIN = input voltage to perform proper function.
b.
c.
d.
e.
f.
P-32167-Rev. A (11/15/93)
1-93
..
Siliconix
DG300N301N302N303A
AMembcr ofthc TBMIC Group
lYpical Characteristics
l'DS(on)
vs. VD and Power Supply
roS(on) VS. VD and Temperature
60 r--'=~~~~--r--'---'
V+ =15V
V- = -15V
50 1---~-~--+---r----1I---,
90 ,-----=;="-----r=----.--.:.r-"----,
70 /--_---1_ _--+.....-1--\1
40 1-~~-~---t--I--4--~
50
I----t---t---w
±20V
-15
-5
5
15
2S
-10
Vo - Drain Voltage (V)
roS(on)
Cl
,.
V- =OV
TA=2S'C
7.5V/ ,
V
500
-
~
-
"-
110V
\
_\
~
........
'15V
~
~N "
-!"
20V
co
o
Vo - Drain Voltage (V)
~" ~~
,
5
11 j
10
15
V+ - Positive Supply (V)
Input Switching Threshold
5 r-_.-v_s_._PoTs_It_w_e_S,u~pp~l~y_~,ol_ta~g~e,-_-,
Charge Injection VS. Analog Voltage
I
V- = -15V
TA=2S'C
V+ = 15)
40 I - V- = -15V
CL=lnF
4
I--I---+----t----+----t-~
30
3
I---+----+--+--~-~--,
t-
20
10
o
/
-15
I
-10
"" \.
'r-.. - -
-5
o
If
./
5
Vs - Source Voltage (V)
1-94
-
I'\.
'00 ~ ~G~t,,:
taPEN
o
50
15
iFF \
300
"'c.:..t
V
10
V- = -15V
TA=2S'C
VINH = 4 V
VINL=OV
\
400
M
J
5
Switching Time and Break-BeCore-Make Time
vs. Positive Supply Voltage
vs. VD and Power Supply Voltage
100
o
-5
Vo - Drain Voltage (V)
10
15
o
5
10
15
V+ - Positive Supply (V)
P-32167-Rev. A (11/15/93)
Silicanix
DG300A/301A/302A/303A
AMcmbcr of the TBMIC Group
lYPical Characteristics (Cont'd)
Supply Current vs. Temperature
-120
500
........ ~
400
.........
300
..!.
£
Off Isolation and Crosstalk vs. Frequency
-
-r--.
r-.... r-.... ......
_ Y+ =15Y
200
Y- = -15Y
YIN = 4 Y(One Input)
(All Other =
100 -
-100
.........
1+-
~r---..
III
Crosstalk
~
-80
'\"'
iii'
~
OffIsolation "
-60
a V)
a
r--
1-
-40
105 125
-20
10k
Y+ = +15Y
Y- = -15Y
mlill
5
-100
-55 -35 -15
5
25
45
65
85
Rn
f - Frequency (Hz)
Supply Curents vs. Switehing Frequency
15
10M
1M
lOOk
Thmperature (DC)
Leakage vs. Temperature
l00nA
LI=11~V"
~-.-'r--r~r--r~r--r--r-~
-Y-=-15Y
10nA
10
t:l
....
..!.
£
5
I"+~~
....'"
~
Ft,
o
10k
1k
lOOk
1 nA
1=--+-+--+--1
10pA ~-L-£~~_~~~-L_~~_~
-55 -35 -15 5
25' 45 65 85 105 125
1M
f - Frequency (Hz)
Switching Time vs. Power Supply Yoltage
400
350
:[
"S
t=:
Switehing Time vs. Temperature
400
-J+=15~
Y- = -15Y
350
300
300
250
250
200
150
""'--
~
............. 10...
toN f - - topp-
~
.....
100
50
g
~
t=:
200
150
100
50
r---
v'+=~5yl
Y- = -15Y
Ys=3Y
- J..,....oo
~
--
~
",-
.,---- r--- --ItON I
--- b+-t:
~
topp'- r---
o
o
±10
..
Thmperature (DC)
±12
±14
±16
±18
Supply Voltage (V)
P-32167-Rev. A (11/15/93)
±20
±22
-55 -35 -15
5
25
45
65
85 105 125
Thmperature (DC)
1-95
Siliconix
DG300N301N302N303A
AMem'bcr of tho TBMIC Group
Schematic Diagram (lYpical Channel)
V+O---------~----~----------~----------1_------------------------~~
...--......P---_--+-+--oS
Level
Shift!
Drive
GNDo----+----------~--------~
L----+----4----r--oD
V-o----+------------------------~--------~--------------~~--------~
Figure 1.
Test Circuits
+1SV
Logic "1" = Switch On
Vs = 3 V
V+
o-+-"-s____--",--'V\R,.,s,-I-,\,.,R",7
L.
75k,Q
67k.Q
Voltage gain of the instrumentation amplifier is:
Ay = 1 +
Figure 6.
1-98
2R 2'
R1
(In the circuit shown,AY1 = 10.4,AY2 = 101)
-15V
Low Power Instrumentation Amplifier with Digitally Selectable Inputs and Gain
P-32167-Rev. A (11/15193)
Siliconix
DG304A/305A/306A/307A
AMembcr ofthe TBMIC Group
CMOS Analog Switches
Features
Benefits
Applications
• ± lS-V Input Range
•
•
•
•
• Low Level Switching Circuits
• Porgrammable Gain Amplifiers
• Portable and Battery Powered Systems
•
•
•
•
•
Fast Switching-toN: 110 ns
LOWrDS(on): 30 Q
Single Supply Operation
CMOS Logic Levels
Micropower: 30 n W
Full Rail-to-Rail Analog Signal Range
Low Signal Error
Wide Dynamic Range
Low Power Dissipation
Description
The DG304A through DG307A series of monolithic
CMOS switches were designed for applications in
communications, instrumentation and process control.
This series is well suited for applications requiring fast
switching and nearly flat on-resistance over the entire
analog range.
applications, without sacrificing switching speed.
Break-before-make switching action is guaranteed, and an
epitaxial layer prevents latchup. Single supply operation
(for positive switch voltages) is allowed by connecting the
V- rail to Ov.
Designed on the Siliconix PLUS-40 CMOS process to
achieve low power consumption and excellent on/off switch
performance, these switches are ideal for battery powered
Each switch conducts equally well in both directions when
on, and blocks up to the supply voltage when off. These
switches are CMOS input compatible.
Functional Block Diagram and Pin Configuration
DG304A
Dual-In-Line
MetaiCao
V + (Substrate and Case)
NC
V+
Dl
D2
NC
NC
Sl
S2
NC
NC
INl
IN2
GND
V-
..
GND
ThpView
ThpView
Ordering Information - DG304A
Temp Range
Package
-0 to 70'C
14-Pin Plastic DIP
Part Number
DG304ACJ
DG304AAK/883
14-Pin eerDIP
-55 to 125'C
JM38510/11605BCA
10-PinCan
JM38510/ll605BIA
14-Pin Sidebraze
JM38510/11605BCC
P-32167-Rev. A (11/15/93)
1ruth Table
Logic
Switch
o
OFF
ON
Logic ''0'' s 3.5 V
Logic "1" '" 11 V
Switches Shown for Logic "1" Input
1-99
Silicanix
DG304A/305A/306A/307A
AMember of the TBMIC Group
Functional Block Diagram and Pin Configuration (Cont'd)
DG30SA
Dual-In-Line
Metal Can
V + (Substrate and Case)
NC
V+
Dl
D2
, NC
NC
~
S!
NC
NC
IN
NC
GND
VGND
ThpVi~
ThpView
Ordering Information - DG30SA
Temp Range
Package
Part Number
14-Pin CerDIP
JM3851O/11605BCA
10-PinCan
-55 to 125°C
14-Pin Sidebraze
1i'uthTable
Logic
SWi
DG305AAA
0
OFF
ON
JM3851O/11606BIC
1
ON
OFF
SW.;
Logic "0" S 3.5 V
Logic"1" .. 11 V
JM38510/11606BCA
Switches Shown far Logic "1" Input
DG306A
1i'uth Table
Dual-In-Line
NC
V+
S3
S4
Logic
Switch
o
OFF
ON
D3
D4
Logic"O" S 3.5V
Logic "1" .. 11 V
Dl
D2
Switches Shown for Logic "1" Input
SI
S2
IN!
Ordering Information - 306A
IN2
GND
V-
Temp Range
package
-Ota70°C
14-Pin Plastic DIP
PBrtNumber
DG306ACJ
DG306AAK,1883
ThpView
-55 to 125°C
14-Pin CerDIP
14-Pin Sidebraze
1-100
JM38510/11607BCA
JM38510/l1607BCC
P-32167-Rev. A (11{15{93)
Siliconix
DG304N305N306N307A
AMember oftbeTBMIC Group
Functional Block Diagram and Pin Configuration (Cont'd)
DG307A
Four SPST Switches per Package
Dual-In-Line
NC
S3
'fruth Thble
V+
Logic
SWt.SW1
S4
0
OFF
ON
1
ON
OFF
SW3,SW4
D3
D4
D1
D2
Logic "0" s 3.S V
Logic "I" .. 11 V
S1
Sz
Switches Shown for Logic "I" Input
IN1
IN2
GND
V-
OrderiDg Information - 307A
ThpView
ThmpRaDge
J!ackage
Ot070·C
14-Pin Plastic DIP
-25 to 85·C
Part NlQIlber
DG307ACJ
DG307ABK
DG307AAK
14-Pin CerDIP
-55 to 125·C
DG307AAK/883
JM3851O/11608BCA
14-Pin Sidebraze
JM3851O(1l608BCC
Absolute Maximum Ratings
Voltages Referenced to VV+ ................................................. 44V
GND ............................................... 25V
Digital Inputs·, Vs, VD ............. (V-) -2 Vto(V+) +2Vor
30 rnA, whichever occurs first
Current, Any Thnninal Except S or D ................... 30 rnA
Continuous Current, S or D ........................... 30 rnA
(Pulsed at 1 ms, 10% duty cycle max) .................. 100 rnA
Storage Thmperature
(AAA, AAK, ABK SuffIX)
-65 to 150·C
(ACJ SuffIX) . . . . . .. . . ... -65 to 125·C
P-32167-Rev. A (11/lS193)
Power Dissipationb
14-PinPlasticDIPC ................................. 470mW
14-Pin CerDIpd .................................... 825 mW
10-Pin Metal Can" .................................. 450 mW
Notes:
a. Signals on Sx, DX, or INX exceeding V + or V-will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. DeratellmWrCabove7S·C
d. Derate 6.5 mwrc above 25·C
e. Derate 6 mW/·C above 75·C
1-101
..
Siliconix
DG304A!305A!306A!307A
AMcmber of the TBMIC Group
Specifications a
Test Conditions
Unless Otherwise Specified
ASufllx
-55 to 125°C
I
B, CSuffix
-25 to 85°C
Ot070°C
V+ = 15 V, V- = -15V
VIN = 3.5 Vor 11 yf
Thmpb
VANALOG
Full
Drain-Source On-Resistance
CDS(on)
VD= ±10V,Is=10mA
Room
Full
30
Source Off Leakage Current
IS(ofl)
Vs = ±14 V,VD = '1'14 V
Room
Full
±0.1
-1
-100
1
100
-5
-100
5
100
Drain Off Leakage Current
ID(ofl)
Vs = ±14 V,VD = '1'14 V
Room
Full
±0.1
-1
-100
1
100
-5
-100
5
100
Drain On Leakage Current
ID(on)
VD=VS= ±14V
Room
Full
±0.1
-2
-200
2
200
-5
-200
5
200
Room
-0.001
-1
-1
Parameter
Symbol
1)pc
Mind
Maxd
Mind IMaxd
Unit
Analog Switch
Analog Signal Rangee
-15
-15
15
50
75
15
V
50
75
Q
nA
Dlgital Control
Input Current
with Input Voltage High
Input Current
with Input Voltage Low
VIN=5V
IJNH
IJNL
Full
-1
VIN= 15V
Room
Full
0.001
1
1
VIN=OV
Room
Full
-0.001
Room
110
250
Room
70
150
1
-1
-1
J1A
-1
Dynamic. Characteristics
Thrn-OnTIme
Thm-OffTIme
Break-Before-Make TIme
Charge Injection
tON
tOFF
tOPEN
DG305A!307A ONLY
~p.p. Fignre3
Room
50
Q
CL=lnF,Rgen=O
Vgen = 0 V, See Figure 4
Room
30
Room
14
Room
14
Room
40
L VIN=OV
Room
6
VIN=15V
Room
7
Room
62
Room
74
Room
Full
0.001
Room
Full
-0.001
Source-Off Capacitance
CS(ofl)
Drain-Off Capacitance
CD(ofl)
Channel-On Capacitance
CD(on)
Input Capacitance
See Figure 2
CIN
Off-Isolation
OIRR
Crosstalk (Channel-to-Channel)
XTALK
f=lMHz,Vs=OV
VS,VD=OV
f=lMHz
I
VIN = OV,RL = lkQ
Vs = 1 V"""f= 500kHz
us
pC
pF
dB
Power Supplies
Positive Supply Current
1+
10
100
100
VIN = 15 V or 0 V (All Inputs)
Negative Supply Current
1-
-10
-100
-100
J1A
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25°C, Full = as determined by the operating temperature suff",.
c. lYpica1 values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not SUbject to production test.
f. VIN = input voltage to perform proper function.
1-102
P-32167-Rev. A (11/15/93)
Siliconix
DG304N305N306N307A
AMember of the TEMIC Group
1Ypicai Characteristics
rnS(on) vs. VD and
100
01
~
~
g
.0
:!:5V
VI
./
40
V"
.~
I
i
20
j
I'U
60
0
A
~-
~
~'
"'10 V . /
@
"'15 V
I'"
.-
i.---
:!:20V
g
a
-20
-15 -10
-5
l
I
!
e
0
5
80
g
,
~
r-60
15
10
20
40
20
o
/ I"'.I~,..
-
~
o
Leakage Currents vs. Analog Voltage
~,.,...
-10
L
,e.
,.!il -20
...."'
..-..
-"
L5V
+20V_
5
10
15
20
Vn - Drain Voltage (V)
I or lIS(of I
o c--.IID(off)
<'
T~= 25:C V- =OV
+r:(
1/
1/
VD - Drain Voltage (V)
10
+ Power Supply Voltage
A
100
j
80
@
"
'".0
rnS(on) vs. VD and
01
.!!l
~
± Power Supply
T~=25!C
_
Input Switching Threshold vs. V + and VSupply Voltages
10
9
~
I- TA = 25!C
---+------l--~
L"
8
L
7
..J.- i""'"
:~
IL.: .. :.,
6
In on)
.... '.
:.
:.
5
I
I
4
3
-30
2
....yr-"
I----+~--oo:::....---;---t-----I
-40
-15 -12 -9 -6 -3
3
0
9
12
o
15
o
:!:5
240
V- = -15V
TA = 25"C
VINH= 15V
VINL=OV
:\
200
\
!: 160
~
§
-
200
\
!
~
120
"- ~
§
'tOFF
"
80
o
V + - Positive Supply Voltage (V)
P-32167-Rev. A (11/15/93)
"" ""
120
..
15
I
"
-
toN
............
.....
r--
toFF
80
~
10
:!:20
V+ = 15V
TA=2S"C
VINH= 15V
VINL= OV
.....
160
40
5
I
~
\. tON
40
:!:15
Switching Time vs. Negative Supply Voltage
Switching Time vs. Positive Supply Voltage
240
:!:10
V +. V-Positive & Negative Supplies (V)
Vn or Vs - Drain or Source Voltage (V)
o
-5
-10
-15
V- - Negative Supply Voltage (V)
1-103
Siliconix
DG304N305N306N307A
AMcmbcr of the TBMIC Group
'fYpical Characteristics (Cont'd)
Supply Currents vs. Toggle Frequency
8
~JJUijll
RL= 00
CL=O
6
~Vs=Open
.
4
'I
2
/1
o
1k
10k
1M
lOOk
f - Frequency (Hz)
Schematic Diagram (1Ypical Channel)
V+o-------~------~----------~--------~----------------------~~
...-----,,..---_-I--+--oS
VLevel
Shift!
Drive
V+
Y
'----t--~-tt-O
D
Figure 1.
Test Circuits
+15V
Logic "1" = Switch On
V+
Vs = 3 V O'-'l-s----<:'1 ......;;;D-t--...,.____.......--o Vo
Logic
Input
VINH
ov--~
15V
OV---+J
,
Switch
Output
CL (includes fIXture and stray capacitance)
Vo=Vs
RL
RL + l'J)S(oo)
Figure 2.
1-104
toN
Switching TlDle
P-32167-Rev. A (11/15/93)
Siliconix
DG304N305N306N307A
AMcmbcr of the TEMIC Group
Test Circuits (Cont'd)
+15 V
Logic "1" = Switch On
Logic
V+
Input OV _ _V_INH_...J150%
\'-_ _ __
VSl =3V
Switch VS1-----;:::==~~-50%
Val
Output
oV
---""--_-oJ
VS2 :;:;:==~I---I-:-;::::=
Switch
VOl
Output
CL (includes fixture and stray capacitance)
Figure 3.
Break-Before-Make SPDT (DG305A, DG307A)
+15 V
V+
I1V
/
o
Va -~I
Va
INX----,
ON \
Figure 4.
'--
OFF
I
r=
ON
Charge Injection
..
Application Hints a
V+
Positive Supply
Voltage
VNegative Supply
Voltage
(V)
(V)
15
20
-15
15
0
-20
GND
Voltage
(V)
0
0
0
VIN
Logic Input
Voltage
VlNlJ(mln)/VlNL(IIIIUt)
VsorVp
Analog Voltage
Range
(V)
(V)
11/3.5
11/3.5
-15 to 15
11/3.5
Oto15
-20 to 20
Notes:
a Application Hints are for DESIGN AID ONLY, not guaranteed and not subjcctto production testing.
P-32167-Rev. A (11/15/93)
i-lOS
Siliconix
DG304N305N306N307A
AMembcr ofthc TBMIC Group
Applications
+15 V
-15V
1Ok,Q
Your
+15V
-15V
10k,Q
10k,Q
100 k,Q
r
I
I
L
Al
Ao
DG304A
Figure 5.
Binary
Input
Gain
11
10
01
00
1
10
100
1000
Low Power Binary to Ion Gain Low Frequency Amplifier
+15V -15V
VINl o---+--~1
+15V
..-+t------1
>-_-oVour
CMOS Logic
Input Select O--l~;:>-------T;
High=VINl
CMOS Logic
Gain Select O--1~»---T----T-t-1
High = lOx
Ix
lOx
DG307A
GND
20 k,Q
Figure 6.
1-106
180 k,Q
Low Power Nan-Inverting Amplifier with Digitally Selectable Inputs and Gain
p-32167-Rev. A (11/15/93)
Siliconix
DG308A/DG309
AMember o[the TEMIC Group
Quad Monolithic SPST CMOS Analog Switches
Features
Benefits
Applications
• ± lS-V Analog Input Range
•
•
•
•
•
• Portable and Battery Powered
Instrumentation
• Communication Systems
• Computer Peripherals
• High-Speed MUltiplexing
•
•
•
•
Low On-Resistance: 60 Q
Fast Switching: 130 ns
Low Power Dissipation: 30 n W
CMOS Logic Compatible
Full Rail-ta-Rail Analog Signal Range
Low Signal Error
Wide Dynamic Range
Single or Dual Supply Capability
Static Protected Logic Inputs
Description
The DG308A and DG309 are quad single-pole single-throw
analog switches designed for high speed switching
applications in communications, instrumentation, and
process control. This series is well suited for applications
requiring a low on-resistance over the entire analog range.
Featuring low on-resistance (60 Q) and fast switching
(130 ns), the DG308A is supplied in the "normally open"
configuration while DG309 is supplied "normally closed".
Input thresholds are high voltage CMOS compatible.
Designed with the Siliconix PLUS-40 CMOS process to
combine low power dissipation with a high breakdown
voltage rating of 44 V, each switch conducts equally well in
both directions when on, and blocks up to the supply voltage
when off. An epitaxial layer prevents latch up.
Functional Block Diagram and Pin Configuration
Four SPST Switches per Package
'Iruth Thble
Dual-In-Line
Logic
DG308A
IN2
0
OFF
ON
01
02
1
ON
OFF
S1
S2
IN1
V-
V+
GND
Ne
S4
Logic "0" s 3.5 V
Logic "I" '" 11 V
Switches Shown for Logic "1" Input
Ordering Information
S3
Temp Range
04
03
IN4
IN3
..
DG309
Package
Part Number
DG308ACJ
Oto70'e
16-Pin Plastic DIP
-40 to 85'e
16-Pin Narrow sOle
-55 to 125'e
16-Pin CerDIP
DG309CJ
DG308ADY
'lbpView
DG309DY
DG308AAK
DG308AAK/883
DG309AK!883
P-32167-Rev. B (11/15193)
1-107
Silicanix
DG308NDG309
AMember of the 1'BMICGrOUP
Absolute Maximum Ratings
Voltages Referenced to v-
v+ .................................................
Power Dissipationb
16-Pin Plastic DIP" ................................. 470 mW
16-PinNarrowSOIC" ............................... 600mW
16-Pin Cerdipd ..................................... 900 mW
44V
GND ............................................... ZSV
Digitaiinputs·, Vs, VD ............. (V-) -2Vto(V+) +2Vor
20 rnA, whichever occurs first
Notes:
a. Signals on Sx, Dx, or INx exceeding V + or V-will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate12mWrCabove75·C
d. Derate6.5mWrCaboveZS·C
e. Derate 7.6 mWrC above 75·C
Current, Any 'Thrminal Except S or D ................... 30 mA
Continuous Current, S or D ................•....•..... 20 mA
(Pulsed atl ms, 10% duty cycle max) ................... 70 mA
Storage'Thmperature
(AKSufflX) ............ -65 to 150·C
(CJ and DY SuffIX) ...... -65 to lZS·C
Specifications a
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
ASuftix
-55 to lZSoC
V+ = 15V,V- = -15V
VIN = 3.5 V or 11 yf
Thmpb
'JYpc
Mind
I
C, D SufI"1X
Maxd
Mind
15
-15
I
Maxd
Unit
15
V
100
125
Q
Analog Switch
Analog Signal RangeC
-15
VANALOG
Full
Drain-Source
On-Resistance
roS(on)
VD = ±10V,Is = lmA
Room
Full
60
Source Off Leakage
Current
IS(off)
Vs= ±14V,VD= '1'14 V
Room
Full
±0.1
-1
-100
1
100
-5
-100
5
100
Drain Off Leakage
Current
ID(of!)
VD = ±14 V,Vs = '1'14 V
Room
Full
±0.1
-1
-100
1
100
-5
-100
5
100
Room
Full
±0.1
-1
-100
1
100
-5
5
200
Di:"~hi
Or.. T
Current
_.
..... ~~
VD = vs =
--
±14 V
100
150
1-200 I
nA
Digital Control
Input Current with
Input Voltage High
IJNH
VIN=15V
Full
0.001
Input Current with
Input Voltage Low
IJNL
VIN = OV
Full
-0.001
Input Capacitance
CIN
Room
8
Room
130
200
200
Room
90
150
150
1
1
I1A
-1
-1
pF
Dynamic Characteristics
Thrn-On TIme
toN
Thrn-OffTime
tOFF
Charge Injection
Q
Source-Off Capacitance
Cs(off)
Drain-Off Capacitance
CD(o!!)
Channel-On Capacitance
CD(on)
Off-Isolation!
OIRR
1-108
See Figure 2
CL= 0.01 "F,Rgen = OQ, Vgcn = OV
f = 140kHz, Vs, VD = OV
RL = 75, Vs = 2 Vp-p.f= 500kHz
Room
-10
Room
11
Room
8
Room
27
Room
78
ns
pC
pF
dB
P-32167-Rev. B (11/15/93)
Siliconix
DG308A/DG309
AMember of tho TeMIC Group
Specitications a
Test Conditions
Unless Otherwise Specified
Parameter
V+=15V,V-=-15V
VIN = 3.5 V or 11 yf
Symbol
Tempb
lYPc
Room
Full
0.001
Room
Full
-0.001
ASufI'1X
-55 to 125'C
C, D SufI'1X
Mind I Max d
Mind_I Maxd
Unit
PQwer Supplies
1+
Positive Supply Current
All Channels On or Off
VIN=OVor15V
10
100
j.tA
1-
Negative Supply Current
10
100
-10
-100
-100
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25'C, Full = as determined by the operating temperature suffIx.
c. 'Jypical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative valuy is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
1Ypical Characteristics
~
Cl
!
0
~
150
r- TA'=
~
I
i
~
±5V
~
~
J
f\
90
--
60
30
g
o
-20
1/
~ ,..
-5
g
-
ell
5
0
~
I
J
10
15
20
o
IrU~
1'/
-I--1o
+1 V
,
-
-'
+iOV
5
10
15
Leakage Currents vs. Analog Voltage
Input Switching Threshold
vs. V+ and V- Supply Voltages
20
III
10
=ds,c
TA=25'C
8
---
0
-20
50
/
l
TA 25's(on) vs. Vn and Power Supply Voltage
l'J>s(on) vs. Vn and Power Supply
,...
~
~
-
-
ID(plf)
"""':
~
",.
6
~
I (on).4
21---~.e::---+---+----i
-30
-15-12 -9 -6
-3
0
3
6
9
12
VD or V S - Drain or Source Voltage (V)
P-32167-Rev. B (11/15/93)
15
o
~----~------~------~----~
o
±5
±10
±15
±20
V +, V-Positive & Negative Supplies (V)
1-109
Silicanix
DG308NDG309
AMcmber of the TBMIC Group
1Ypical Characteristics (Cont'd)
Supply Currents vs. Switching Frequency
(All Inputs Active)
Input Switching Threshold vs. Positive
Supply Voltage
8 '---'---.-~~--~---'r--'
1000
± 15 V Supplies
TA=ZS"C
7
800
1
600
£
400
V-=OV
TA=ZS"C
61---+----+----+---+-----:
5
I----j----+--+----:..t
4 t--t--+-~
..!.
3 t---t---1'f'r.!I'!!!!
I~~
~ Iii
200
OL-_L-_L-_L-_L-_L------'
o
5
10
15
100
1k
10k
lOOk
1M
V+
f - Frequency (Hz)
- Positive Supply Voltage (V)
Schematic Diagram (1Ypical Channel)
V+O--------~----~----------~--------_;r_----------------------r_I
......---..,,.....--,--;-+--0-
VIN
S
Level
Shift!
Drive
GND
D
V-
Figure 1.
1-110
P-32167-Rev. B (11/15/93)
Siliconix
DG308A/DG309
AMember orthe TEMIC Group
Test Circuits
+15V
V+
Switch
Input
Vs=3V
S
D
Vo
tr <20ns
t! <20ns
INJ
Logic
Input
50%
0
Switch
Output
Logic
Input
Switch
Output
o Vo
tON
CL (includes fixture and stray capacitance)
Vo =Vs
Vs
RL + rOS(on)
Figure 2. Switching Time
Applications
Single Supply Operation
The DG308A and DG309 will switch positive analog signals
while using a single positive supply. This will allow use in
many applications where only one supply is available. The
trade-offs or performance given up while using single
supplies are: 1) increased rDS(on) and 2) slower switching
speed. As stated in the absolute maximum ratings section
of the data sheet, the analog voltage should not go above or
below the supply voltages which in single supply operation
are V+ and Ov.
D
P-32167-Rev. B (11115/93)
1-111
Siliconix
DG308B/309B
AMember of the TBMIC Group
Improved Quad CMOS Analog Switches
Features
Benefits
Applications
• ± 22-V Supply Voltage Rating
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
CMOS Compatible Logic
Low On-Resistance-IDS(on): 45 g
LowLeakage-ID(on): 20pA
Single Supply Operation Possible
Extended Temperature Range
Fast Switching-toN: < 200 DB
Low Glitching-Q: 1 pC
Wide Analog Signal Range
Simple Logic Interface
Higher Accuracy
Minimum 1tansients
Reduced Power Consumption
Superior to DG308A/309
Industrial Instrumentation
Test Equipment
Communications Systems
Disk Drives
Computer Peripherals
Portable Instruments
Sample-and-Hold Circuits
Description
The DG308B!309B analog switches are highly improved
versions of the industry-standard DG308A!309. These
devices are fabricated in Siliconix' proprietary silicon gate
CMOS process, resulting in lower on-resistance, lower
leakage, higher speed, and lower power consumption.
These quad single-pole single-throw switches are designed
for a wide variety of applications in telecommunications,
instrumentation, process control, computer peripherals,
etc. An improved charge injection compensation design
minimizes switching transients. The DG308B and DG309B
can handle up to ± 22-V input signals. An epitaxial layer
prevents latchup.
All devices feature true bi-directional performance in the
on condition, and will block signals to the supply levels in
the off condition.
The DG308B is a normally open switch and the DG309B is
a normally closed switch. (See Truth Thble.)
Functional Block Diagram and Pin Configuration
Truti::tThoie
Logie
DG308B
0
OFF
ON
1
ON
OFF
DG308B
Dual-In-line
Logic ''0'' :s 3.5V
Logic"1" ~ 11 V
INI
IN2
Dl
D2
Sl
S2
V-
V+
GND
NC
S4
S3
D4
D3
IN4
IN3
Switches Shown for DG308B Logic "1" Input
Ordering Information
ThmpRsnge
1-112
J>artNumher
Package
DG308BDJ
16-Pin Plastic DIP
-40 to 85°C
16-Pin Narrow SOIC
DG309BDJ
DG308BDY
DG309BDY
DG308BAK
-55 to 125°C
'lbpView
DG309B
16-Pin CerDIP
DG308BAK/883
DG309BAK
DG309BAK/883
P-32167-Rev. A (11115/93)
Silicanix
DG308B/309B
AMember altha 1'BMICGroup
Absolute Maximum Ratings
Voltages Referenced to VV+ ................................................. 44V
GND ............................................... 2SV
Digitallnputs'Vs, VD ............... (V-) -2 Vto (V+) +2V
or 30 rnA, whichever occurs first
Current. Any Thrminal ............................... 30 rnA
Peak Current, S or D
(Pulsed at 1 ms. 10% duty cycle max) .................. 100 mA
Storage Thmperature
(AIC, SurflX) . . . . . . . . . . .. -65 to 150"C
(DJ. DY SurflX) .......• -65 to 12S"C
Power Dissipation (Package)b
16-PinPlasticDIPC ................................. 470mW
16-Pin Narrow SOICd ............................... 640mW
16-Pin CerDII'" .................................... 900 mW
Notes:
a. Signals on Sx. Dx. or INx exceedingV+ orV- will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6.5 mWrC above 75"C
d. Derate 7.6 mWrCabove 75"C
e. Derate12mW/"Cabove75"C
Specificationsa
A Suffix
-55 to 125"C
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ = 15 V, V- = -15V
VIN = 11 V, 3.5 yf
Tempb
'JYpc
Mind
DSutllx
-40 to 85"C
I
Maxd Mind
I
Maxd
Unit
15
V
85
100
0
Analog Switch
Analog Signal Rangee
Drain-Source On-Resistance
rnS(on) Match
Source Ofr Leakage Current
VANALOG
Full
rnS(on)
Room
Full
VD = ±10V,ls = 1 rnA
-15
ArnS(on)
Room
2
IS(ofl)
Vs = ±14 V,VD = '1'14 V
Room
Full
±0.01
-0.5
±0.01
±0.02
Drain Orf Leakage Current
ID(of!)
VD= ±14V,Vs= 'F14V
Room
Full
Drain On Leakage Current
ID(on)
Vs =VD = 14V
Room
Full
15
-15
85
100
45
%
-20
0.5
20
-0.5
-5
0.5
5
-0.5
-20
0.5
20
-0.5
-5
0.5
5
-0.5
-40
0.5
40
-0.5
-10
0.5
10
nA
Digital Contrlll
Input Voltage High
Input Voltage Low
Input Current
Input Capacitance
VINH
Full
VINL
Full
IlNHor
IINL
VlNHorVINL
11
3.5
3.5
-1
Full
Room
CIN
11
1
-1
1
5
V
!lA
pF
Dynamic Characterlsti~s
Thrn-OnTlffie
tON
Thrn-OffTlffie
tOFF
Charge Injection
Q
Vs = 3 V, See Figure 2
CL = 1000pF, Vg = OV,Rg = 00
Room
200
200
Room
150
150
Room
1
Room
5
Source-Off Capacitance
CS(ofl)
Drain-Off Capacitance
CD(of!)
Room
5
Channel On Capacitance
CD(on)
VD=Vs=OV,f=lMHz
Room
16
Off Isolation
OIRR
90
XTALK
CL = 15 pF,RL= 500
Vs = 1 VRMS, f = 100 kHz
Room
Channel-ta-Channel Crosstalk
Room
95
P-32167-Rev. A (11/15/93)
Vs=OV,f=lMHz
os
pC
pF
dB
1-113
Siliconix
DG308B/309B
AMcmber of the TEMIC Group
Specifications a
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ = 15 V, V- = -15V
VIN = 11 V, 3.5 yf
ASuff'1X
-55 to 125'C
Tempb
'JYpc
Mind
I
Maxd
D Suffix
-40 to 85'C
Mind
I
Maxd
Unit
Power Supply
Room
Full
1
5
Positive Supply Current
1+
Negative Supply Current
1-
Room
Full
-1
-5
Power Supply Range for
Continuous Operation
VOP
Full
±4
VIN = Oor15V
1
5
!LA
-1
-5
±22
±22
±4
V
Specifications a for Single Supply
Thst Conditions
Unless Otherwise Specified
Parameter
ASuftix
-55 to 125'C
V+ = 12 V, V- =OV
VIN = 11 V, 3.5 yf
Thmpb
VANALOG
Full
toS(on)
VD = 3V,SV,Is = 1mA
Room
Full
Symbol
'JYpc
Mind
I
D Suff'1X
-40 to 85'C
Max<'
Mind
12
0
I
Maxd
Unit
Analog Switch
Analog Signal Rangee
Drain-Source
On-Resistance
Thrn-On Time
tON
Thrn-Off Time
toFF
Charge Injection
Q
0
12
V
160
200
160
200
r.!
Room
300
300
Room
200
200
90
Vs = S V, See Figure 2
CL = 1 nF, Vgen= 6 V, Rgen = Or.!
Room
4
ns
pC
Power Supply
Positive Supply Current
Room
Full
1+
VIN = 00r12 V
1
5
1
5
Negative Supply Current
1-
Room
Full
-1
-5
Power Supply Range for
Continuous Operation
VOP
Full
4
!LA
-1
-5
44
4
44
V
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25'C, Full = as determined by the operating temperature suffIX.
c. 1)tpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
1-114
P-32167-Rev. A (11/15/93)
Siliconix
DG308B/309B
AMomber ofcbc TBMIC Group
'IYpical Characteristics
l"J>s(on) vs. VD and Power Supply Voltages
110
CI
100
~
j
90
.~
80
~
A
I'
@
60
'"
50
0
~
.~
40
Q
J
CI
~
§
~
i""'"
g
"
<-
lI\
c-----
I
-
±10V
-c-----
I
J "\
~ ./~5IV
I I
16
.~
/'
70
~
d
a
"
"./
V""
60
~
50
1
30
20
I
J
o
-15
20
30 f-
~
125
r5l
100
'i§
75
Q
I
50
J
25
V~-5~
-
<-
/
-'- /
~
~
-
~
a
:,...
~
lOV
~12V
~........::
I
. . . . .:V
~
,!;-
-10
6
8
10
ID(on)~
~
0
-10 ~
./
-20
,
".....
""
-
IS(oflp ID(off) -
'7
U
U
M
-20 -15 -10 -5
0
5
10
15
20
..
Analog Voltage
Leakage Currents vs. Temperature
30
Qs Qn - Charge Injection vs. Analog Voltage
•
1=
v+ 15V
V - 15V
r Vs, VD ±14V
f:
IS(oflp ID(~
20
.,'
100pA
I
~
,:j
15
V~
VD - Drain Voltage (V)
8
10
-40
024
a
.........
--.
-30
o
InA
.-.
-5
o
5
VD - Drain Voltage (V)
10
~
\\ 7V
-SS'C _I"""
=2Jv
V- = -22V
20 f- TA=25'C
6
150
...........
./'00
Leakage Currents vs. Analog Voltage
225
~
.-.
~~
10
40
I
II
8S'C
25·7::
r--.
~
Q
125'C_
1"'000.
r--.....
40
1±20~
..." "
V- = -lSV
80
l"J>s(on) vs. VD and Single Power Supply Voltages
250
175
d
±5V -
20
..
~
a
j
r- V+=lSV
90
~
10
-20 -16 -12 -8 -4 0 4 8 12
VD - Drain Voltage (V)
200
.~
CI
I
30
I
A
1\
'I ,
I
70
0
roSton) vs. VD and Temperature
100
g
"
10
d
,
V+ =15V
0 I- V- = -IS V........
-20
1pA
-55 -35 -15
5
25
45
65
Thmperature ('q
P-32167-Rev. A (11/15/93)
/
I
0 -10
10pA
85
105 125
.......
V
~~
i"'"
~
V+=12V
V-=OV
/
-30
-15
-10
-S
o
S
10
15
Analog Voltage (V)
1-115
Biliconix
DG308B/309B
A Member of the TBurc Group
1Jpical Characteristics (Cont'd)
Off Isolation vs. Frequenl:)'
120
110
100
[
g
"-
90
80
IV+ =15V
V..:= -15V
I
"-
"-
70
RL= 50g
"-
60
"-
50
40
10k
1M
lOOk
"'
10M
f - Frequency (Hz)
Schematic Diagram (1Jpical Channel)
V+
Sx
v-
.V+
f
Logic 12V
Input
ODx
Ir <2005
tf
<2005
OV
Switch Vo
Output
Figure 2.
1-116
Switching Tune
P-32167-Rev. A (11/15/93)
Siliconix
DG308B/309B
AMombcr of1;ho TBMIC Group
Test Circuits (Cont'd)
+15V
+15V
~---+r-+-----01
...---+-f-3---r---O
50Q
Vo
Ov, 15 V o-t---I>-
50Q
~
NCo-t------o~~--~~--~_o
Vo
50Q
Ov, 15 V o-+I;;.N",-2-1
OffIsolation = 20 log
Figure 3.
I~: I
C= RFbypass
XTALK Isolation = 20 log
Off Isolation
Figure 4.
Channel-ta-Channel Crosstalk
+15 V
V+
Rg
I
Vo
s
Vo
I
INx
1000pF
CL
ONI
~
AVO
L
T
OFF
~
AVO = measured voltage error due to charge injection
The charge injection in coulombs is Q = CLX AVO
Figure s.
Charge Injection
Applications
+5V
+15V
30pF
D
Vmlo-t-----~~L-----~~--~__;
Vm2o-r----o~~-----J
+15V
DG308B
CH
-15V Gain1(x1)o-----H>------'
Gain= Rp+RG
Gain 2 (xlO) o - - - - - r - -..U-------'
Gain 3 (x100) 0----------1------/
Ra
> ____..1
Gain 4 (xlOOO) o----------t----------I
~------'
Logic High = Switch On
-15V
Figure 7. APrecision Amplifier with Digitally Programmable Inputs and Gains
P-32167-Rev. A (11/15/93)
1-117
Siliconix
DG308B/309B
AMember of the TBMIC Group
Applications (Cont'd)
Logic Input
Low = Sample
High = Hold
50pF
ZOOQ
t---+oyOUT
11000PF
Aquisition TIme
Aperature TIme
Sample to Hold Offset
Droop Rate
= 25 115
=1115
=5mY
=5mY/~
Figure 8. Sample-and-Hold
y
+15Y
160
120
1--+---+--1---\---+--1
I 80
1--+-..!IooIo.--I---+--+----\
fC4
Select
~
fc3
TIT..
Select
"'--'---"----'--'---'--'11
.~
Control
~
fC2
Select
H
" 40
1""'i~+i~"""fiOi::-....;ro..::~...---+--l
~
fel
o /--+---''''''"-.
Select
Y_ DG309B GND
-40
L-_..L-_-'-_..J..._.s.._.;:!IiI._~
10
100
-15Y
1k
10 k
100 k
1M
Frequency - Hz
AI. (Yoltage Gain Below Brea:: Frequency) =
-15Y
>-------4--0
YOUT
~
= 100 (40 dB)
fc(BreakFrequency) = 2ltR3CX
fr. (Unity Gain Frequency) =
1
2ltRlCX
Max Attenuation = fJ)S(on) "" -40 dB
10kQ
Figure 9. Active Low Pass Filter with Digitally Selected Break Frequency
1-118
P-32167-Rev. A (11/15/93)
Silicanix
DG381A/384A/387A/390A
AMcmbcr of the TBMIC Group
CMOS Analog Switches
Features
Benefits
Applications
• ± 15-V Input Range
• Full Rail-to-Rail Analog Signal Range
• Minimizes Signal Error
• Low Power Dissipation
• Low Level Switching Circuits
• Programmable Gain Amplifiers
• Portable and Battery Powered Sytems
• LowrDS(on): 30 Q
• Single Supply Operation
• Pin and Function Compatible with the
JFET DG1BO Family
Description
The DG381A-DG390A series of monolithic CMOS are ideal for battery powered applications, without
analog switches was designed for applications in sacrificing switching speed_ Break-before-make switching
instrumentation, communications, and process control. action is guaranteed, and an epitaxial layer prevents
Thisseriesissuitedforapplicationsrequiringfastswitching latchup. Single supply operation is allowed by connecting
and nearly flat on-resistance over the entire voltage range. the V-rail to 0 V.
Designed on Siliconix' PLUS-40 CMOS process, these
devices achieve low power consumption (3.5 mW typical)
and excellent on/off switch performance. These switches
Each switch conducts equally well in both directions when
on, and blocks up to the supply voltage when off. These
switches are CMOS and quasi TTL logic compatible.
Functional Block Diagram and Pin Configuration
DG381A
'Ii-uth Table
Logic
Dual-In-Line
Switch
o
ON
OFF
Logic "0" :s 0.8 V
Logic "1" '" 4 V
Switches Shown for Logic "1" Input
Ordering Information - DG381A
Temp JUnge
Pa.clIage
Oto70·C
14-Pin Plastic DIP
-55 to 125·C
14-Pin CerDIP
PartNwnhw:
DG381ACJ
DG381AAK/883
ThpView
P-32167-Rev. B (11/15/93)
1-119
Siliconix
DG381N384N387N390A
AMember of tho TBMIC Group
Functional Block Diagram and Pin Configuration (Cont'd)
DG384A
Dual-In-Line
1I.-uthThbie
Logic
Switeh
o
OFF
S1
1N1
ON
V-
Logic ''0'' :s 0.8 V
Logic "I" ~ 4 V
GND
Switches Shown for Logic "1" Inpul
NC
S4
V+
NC
1N2
~
Ordering Information - DG384A
Part Number
ThmpRange
Package
01070'C
16-Pin Plastic DIP
-55 to 125'C
16-Pin CerDIP
DG384ACJ
DG384AAK/883
ThpView
DG387A
Dual-In-Line
NC
NC
~
CJ
1I.-uthThbie
~
13
NC
NC
D1
D2
S1
~
IN
NC
V+
V-
NC
GND
o
OFF
ON
1
ON
Ol'l'
Logic "0" :s 0.8 V
Logic"l" '" 4 V
Switches Shown for Logic "1" Inpul
Ordering Information - DG387A
Temp Range
Package
01070'C
14-Pin PlaslicDIP
ThpView
-55 10 125'C
PsrtNumber
DG387ACJ
14-Pin CerDIP
DG387AAK/883
10-Pin Melal can
DG387AAA/883
Meta/Can
D2
NC
V-
IN
NC
ThpView
1-120
P-32167-Rev. B (11/15193)
Silicanix
DG381A/384A/387A/390A
AMcmbor ohho TBMIC Gt-oup
Functional Block Diagram and Pin Configuration (Cont'd)
DG390A
Dual-In-Line
'Iruth Thble
Dl
Sl
NC
INl
D3
V-
S3
GND
S4
NC
D4
V+
NC
IN2
D2
~
Logic
SW1'SW~
0
OFF
ON
1
ON
OFF
SW3,SW4
Logic "0" :s 0.8 V
Logic"l" '" 4 V
Switches Shown for Logic "1" Input
Ordering Information - DG390A
'lbpView
Temp Range
PaCkage
Ot070°C
16-Pin Plastic DIP
Part NUDlber
DG390ACJ
DG390ABK
-25 to 85°C
16-Pin CerDiP
-55 to 125°C
DG390AAK
DG390AAK/883
Absolute Maximum Ratings
Power Dissipationb
14-PinPlasticDlpd ..........................•...... 470mW
14-Pin CerDIPC ..................•................. 825 mW
10-Pin Metal Can" ••............................••.. 450 mW
Notes:
a. Signals on Sx, Dx, or INx exceeding V + or V - will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate 11 mW/oC above 75°C
d. Derate 6.5 mW/"C above 25°C
e. Derate6mW/"Cabove75°C
Voltages Referenced to VV+ .........•....•.......•..•...•.•...............•. 44 V
GND .......•.....•...........................•..... 25V
Digital Inputs", Vs. VD ............. (V-) -2 V to (V+) +2Vor
30 rnA, whichever occurs first
Current, Any Thrminal Except S or D ................... 30 rnA
Continuous Current, S or D ........................... 30 rnA
(Pulsed at 1 ms, 10% duty cycle max) ....•............. 100 rnA
Storage Thmperature
(AM, AAK, ACK Suffix). -65 to 150°C
(ACJ SuffIX) . . . . . . . . • . .. -65 to 125°C
Specificationsa
Test Conditions
Unless Otherwise Specified
Parameter
ASutrlX
-55 to 125°C
V+ = 15 V, V- = -15V
VIN = 0.8Vor4
Tempb
VANALOG
Full
lDS(on)
VD = *10V, Is = -10 rnA
Room
Full
30
±O.l
Symbol
vr
lYPc
Mind I Maxd
B,CSutrlX
Ot070°C
-25 to 85°C
Mind IMaxd Unit
Analog Switch
Analog Signal Range·
Drain-Source
On-Resistance
-15
Source Off Leakage
Current
IS(off)
Vs= ±14V,VD= 'F14V
Room
Hot
Drain Off Leakage
Current
ID(of!)
Vs= ±14V,VD= 'F14V
Room
Hot
±0.1
Drain On Leakage
Current
ID(on)
VD=VS= ±14V
Room
Hot
±0.1
P-32167-Rev. B (11115/93)
15
-15
50
75
V
50
75
C
-s
S
100
-s
S
100
-s
5
100
-1
-100
1
100
-100
-1
-100
1
100
-100
-11
1
100
-100
-100
15
nA
1-121
-
Silicanix
DG381A/384A/387A/390A
AMember ofthe TBMIC Group
Specitications a
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
A Sufl"1X
-55 to 12S·C
V+ = lSV, V- = -lSV
VIN = 0.8 Vor4 Vi
Tempb
VIN =SV
Room
Full
VIN= lSV
Room
Full
VIN=OV
Room
Full
lYP"
Mind
-0.0
01
-1
-1
I
Mud
B, CSufllx
Ot070·C
-25 to 8S·C
Mind
I
Mud
Unit
Digital Control
Input Current with Input
Voltage High
Input Current with Input
Voltage Low
-1
IJNH
IINL
0.001
-0.0
01
1
1
1
-1
-1
I1A
-1
Dynamic Characteristics
Thrn-OnTIme
tON
Thrn-OffTIme
tOFF
Break-Before-Make
TIme
Room
150
300
Room
130
250
tOPEN
See Figure 3
Room
50
Q
CL - 0.01 J1F, Rgen - 00 Vgen - OV
Room
10
Room
14
Room
14
Room
40
Room
6
Charge Injection
Source-Off Capacitance
CS(off)
Drain-Off Capacitance
CD(off)
Channel-On Capacitance
CD(on)
Input Capacitance
Off-Isolation
Corn••talk
(Channel-ta-Channel)
CIN
See Figure 2
f= 1MHz;Vs. VD = OV
f=lMHz
I VIN= OV
I VIN= lSV
OIRR
'"
TALK
VIN = Ov, RL = 1 kQ
Vs = 1 V="f= 500kHz
Room
7
Room
62
Ream.
74
Room
Full
0.23
Room
Full
-0.0
01
Room
Full
0.001
ns
pC
pF
dB
Power SuppUes
Positive Supply Current
1+
Negative Supply Current
1-
Positive Supply Current
1+
VIN = 4 V (One Input)
(All Others = 0)
VIN = 0.8 V (All Inputs)
Negative Supply Current
1-
Room
Full
-0.0
01
0.5
1.0
-10
-100
1
-100
10
100
-10
-100
rnA
100
I1A
-100
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 2S·C, Full = as determined by the operating temperature suffIX.
Co
'I)lpical values are for DESIGN AID ONLY. not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. is used in this data sheet.
e. Guaranteed by design. not subject to production test.
f. VIN = input voltage to perform proper function.
1-122
P-32167-Rev. B (11/15/93)
Silicanix
DG381A/384A/387A/390A
AMem'bcrofthe 'I'BMIC Group
1Ypical Characteristics
rDS(on) vs. VD and Power Supply
100
V+ = 15V
V- = -15V
50 r---4----+--~----~--~--~
80
.~
~
.-
0
~
60
40
Q
I
20
!
e
-ru
t
A
0
til
.~
I
40
--
:!:10V~
+15V
~
:!:20V
o
-5
0
5
10
15
20
-10
500
]:
/
I \.
~
-5
l/
./
o
5
10
Input Switching Threshold
vs. Positive Supply Voltage
400
300
3 r---~--~---r---+--~--~
~
..!.
£
1 r---+----r---+----~--4---~
10
V + - Positive Supply Voltage (V)
P-32167-Rev. B (11/15/93)
~
DG301/303 Only
5
500
~--~--+---~---+---4----4
5
~"
"""r---- tOPENI
10
15
..
Supply Current vs. Temperature
r---.---.----r~~~~--__,
o
.......
V + - Positive Supply Voltage (V)
V- =Oto-15V
TA=15'C
4
toN I
o0
15
toFF
\
~ ~
200
100
\
\
300
]
,
-10
V- = -15V
TA=15'C \
VINH = 4 V
VINL=OV
400
VS - Source Voltage (V)
5
15
Switching Time and Break-Before-Make
Time vs. Positive Supply Voltage
V+ =15V
V- = -15V
CL=lnF
-15
10
Charge Injection vs. Analog Voltage (Vs)
20
o
5
VD - Drain Voltage (V)
30
10
o
-5
VD - Drain Voltage (V)
50
40
I---:::I.::----l---l--+--r---J
./ ~'
",
-20 -15 -10
o
l"JlS(on) vs. VD and Temperature
.-----F=,..--=:.....,----r-----.-----,
_ TA=25'C
CI
j
60
15
r-.... ......
-
........ ..........
1-0-..
--...
V+ = 15V
200 I- V- = -15V
VIN = 4 V(One Input)
(All Other = OV)
100 I-
'r---1-
o
-100
-55 -35 -15
1+-
5
15
45
65
85
105 115
Thmperature (. C)
1-123
Siliconix
DG381N384N387N390A
AMember ofthe TBMIC Group
1)pical Characteristic (Cont'd)
120
Supply Curents VB. Switching Frequency
Off Isolation and Crosstalk vs. Frequency
li
-
....
100
15
~+1=111~~1I
_ V-=-15V
Crosstalk
,,,
~
80
10
Off Isolation
60
5
40
20
r-
V+ = 15V
V- = -15V
+I
ilill ~
Rn7~1111
lOOk
10k
1M
rill
o
1k
10M
~
a
1M
f - Frequency (Hz)
Switching Time vs. Power Supply Voltage
Leakage vs. Temperature
400
V+ = 15V
V- = -15V
Vs, VD = ± 14 V --+----l-+-:oI"-I~1<:l
10nA
lOOk
10k
f - Frequency (Hz)
100nA
~
~
I
InA
.E
....
..
350
f--
V+~15V I
V- = -15V
300
:[
250
~
200
S
150
:e
I'~
lOOpA
':1o
--
-
toN
tOFF-
1 1 1 1 1
j
L-_L-_~_-L_-L_~_~
-55 -35 -15
5
25
45
65
85
105 125
10
Switching Time vs. Temperature
250
20Q
150
100
50
Cl
~
.".,...
~
- -
" , . i""'"
-- --l,...-
~ i-"
~,,-
tON -
---
-
t-r-:: --
25
45
65
Thmperature (DC)
1-124
130
~
..
110
~
90
..
'2
70
}
toFF -
~
Q
1
50
!
30
~
5
18
,
85 105 125
150
i
.iIl
0
o
-55 -35 -15
16
20
22
170 ll>S(on) VB. Analog and Positive Supply Voltage
.J+
= 15v I
350 f- V- = -15V
Vs=3V
300
14
V+, V- Positive and Negative Supplies (V)
Thmperature (DC)
400
12
I
~_I=JVI
TA=25 DC
'vi =15J
'I
"
I
~
....
.... V
i-'" ",.
-- "
v+ = 10V
""
~
v+ =15V
l.o01ooo..
10
o
2
4
6
8
10
12
14
V+, V-Positive and Negative Supplies (V)
P-32167-Rev. B (11/15/93)
Silicanix
DG381N384N387N390A
AMem'ber of the TBMJC Group
Schematic Diagram (lYpical Channel)
V+O---------1_-----1------------~----------1_------------------------~~
,......-.....,p---_-+-+--OS
VLevel
Shift/
Drive
V+
GND
0---+------+--------1
L--~I--"",,"--+--oD
V-o--""""--------------------~---------+----------------+--------~
Figure 1.
Test Circuits
+15 V
Logic "1" = Switch On
V+
Logic
Input
Vs = 3 v o-+-'S'--____01 ~,.--_----_ _o Vo
50%
VINH
OV-----J
5V
oV
-------1-'
Switch
Output
CL (includes fIXture and stray capacitance)
RL
VO=Vs
RL + lDS(on)
tON
Figure 2. Switching Tune
+15 V
Logic "1" = Switch On
Logic
V+
Input 0 V _ _V_INH_..Jf50%
\\.._______
VSI = 3V
Switch VSI------;:::==:::::;---Output
RU TCLl
RL2TCL2
;00~3PF
300~3PF
Switch
Output
oV
VOl
--".:....----'
VS2 ~==~-r-----r----:;:::::=
V02
CL (includes fIXture and stray capacitance)
Figure 3. Break-Before-Make SPDT (DG301A, DG303A)
P-32167-Rev. B (11/15/93)
1-125
..
Siliconix
DG381N384N387N390A
AMember of the TBMIC Group
Test Circuits (Cont'd)
+15V
l
V+
Vo
Vg
IINo
~
\
faN
r-
Vo
1Nx
ON
OFF
Figure 4. Cbarge Injection
Applications
The DG381A series of analog switches will switch positive
analog signals while using a single positive supply. This
allows their use in applications where only one supply is
available. The trade-offs or performance given up while
using single supplies are: 1) increased fDS(on), 2) slower
switching speed. Typical curves for aid in designing with
single supplies are supplied (see 1YPical Characteristics).
The analog voltage should not go above or below the supply
..1 n,.
vonages WIDen In SIngll:: up~raliUll all; v.,.. allu u v.
•
..
•
...
...
'1"7 •
~.
In the integrator of Figure 4, RD controls the discharge rate
of the capacitor so that the pulsed or continuous current
ratings are not exceeded. During reset SW1 is closed and
SWzisopen.OpeningSWzwithSW1alsoopenwillholdthe
integrator output at its present value.
7
c
RD
Reset
o---t--c~J
Start/Stop
o---t--c~J
DG381A
R
Figure 5. Integrator with Reset and Start/Stop
1-126
P-3Z167-Rev. B (11115/93)
Siliconix
DG401j403j405
A Member of the TBMIC Group
Low-Power, High-Speed CMOS Analog Switches
Features
Benefits
Applications
• 44-V Supply Max Rating
• ± 15-V Analog Signal Range
• On-Resistance-rDS(on): 20 Q
• Low Leakage-ID(on): 40 pA
• Fast Switching-tON: 100 ns
• Ultra Low Power Requirements-PD: 0.35 IlW
• TIL, CMOS Compatible
• Single Supply Capability
•
•
•
•
•
•
•
•
•
•
Wide Dynamic Range
Low Signal Errors and Distortion
Break-Before-Make Switching Action
Simple Interfacing
Audio and Video Switching
Sample-and-Hold Circuits
Battery Operation
Test Equipment
Hi-Rei Systems
PBX,PABX
Description
The DG401/403/405 monolithic analog switches were
designed to provide precision, high performance switching
of analog signals. Combining low power (0.35 f.lW, typ) with
high speed (tON: 100 ns, typ), the DG401 series is ideally
suited for portable and battery powered industrial and
military applications.
Built on the Siliconix proprietary high-voltage silicon-gate
process to achieve high voltage rating and superior
switch on/off performance,
break-before-make is
guaranteed for the SPDT configurations. An epitaxial layer
prevents latchup.
Each switch conducts equally well in both directions when on,
and blocks up to 30 V peak-to-peak when off. On-resistance
is very tIat over the full ± 15-V analog range, rivaling JFEf
performance without the inherent dynamic range limitations.
The three devices in this series are differentiated by the
type of switch action as shown in the functional block
diagrams.
Functional Block Diagrams and Pin Configurations
LCC
NC Dl NC Sl INl
Dual-In-Line and SOIC
DG401
DG401
Dl
Sl
NC
INl
NC
V-
NC
GND
NC
VL
NC
V+
NC
IN2
D2
S2
NC
Ordering Information - DG401
Package
-40 to 85"C
16-Pin Plastic DIP
-55 to 125°C
16-Pin CerDIP
LCC-20
P-32167-Rev. C (11/15/93)
NC
GND
NC
NC
NC
VL
NC
V+
NC D2 NC ~ IN2
ThpView
ThpView
Temp Range
V-
Tho SPST Switches per Package
'Iruth Table
ParlNumber
DG40lDJ
DG401AK
DG401AK/883
DG401AZ!883
, Logic
o
Switch
OFF
ON
Logic "0" s 0.8 V
Logic "1" 2: 2.4 V
Switches Shown for Logic "1" Input
1-127
..
Siliconix
DG401/403/405
AMcmber of tho TBMIC Group
Functional Block Diagrams and Pin Configurations (Cont'd)
LCC
Dual-In-Line and SOIC
DG403
NC Dj NC
DG403
Dj
Sj
NC
INj
D3
V-
D3
S3
GND
S3
S4
VL
D4
V+
S4
NC
IN2
D4
D2
~
-40 to 8S·C
Logic
16-Pin Narrow SOIC
DG403DY
DG403AK
LCC-20
D1
DG403AZ/883
CJ
0
SWl>SWZ
OFF
SW3,SW4
ON
1
ON
OFF
LOgIc "0" :$ 0.8 V
Logic "I" '" 2.4 V
Switches Shown for Logic "I" Input
DG403AKJ883
LCC
Dual-In-Line and SOIC
DG40S
'Iruth Table
DG403DJ
-55 to 125·C
DG40S
NC D! NC
.
IN!
D3
V-
S3
GND
S4
VL
D3
D4
V+
NC
IN2
D2
~
-55 to lZS·C
4
21
1
:WI
1:.1.
~
Y
___
L __ .J
NC
IN2
Tho DPST Switches per Package
Part Number
'Iruth Table
Logic
Switch
16-Pin Narrow SOIC
DG405DY
o
OFF
DG405AK
DG40SAKJ883
DG40SAZ/883
V-
GND
DG405DJ
16-Pin CerDIP
18
S3
16-Pin Plastic DIP
LCC-20
1-128
3
NC D2 NC S2
ThpView
Ordering Information - DG40S
-40 to 85·C
IN!
NC
ThpView
Package
S!
Kev~
<;:
NC
Temp Range
IN2
Part Number
16-Pin Plastic DIP
16-Pin CerDIP
NC D2 NC S2
ThpView
Tho SPDT Switches per Package
Ordering Information - DG403
Package
IN!
NC
ThpView
Temp Range
Sj
ON
Logic "0" :$ 0.8 V
Logic "I" '" 2.4 V
Switches Shown for Logic "I" Input
P-32167-Rev. C (11/15/93)
Siliconix
DG401/403/405
AMcmbcr O[thcTeMlC Group
Absolute Maximum Ratings
V+toV- ..............•........................•... 44V
GNDtoV- ....•....•.................•.............. 25V
VL .•....•................... (GND - 0.3 V) to(V+) +0.3 V
Digital InputsaVs, VD .....•....... (V-) -2Vto(V+ plus2V)
or 30 rnA, whichever occurs first
Current (Any Thrminal) Continuous .................... 30 rnA
Current, S or D (Pulsed 1 ms 10% duty) ................ 100 rnA
Storage Temperature
(AX, AZ SuffIX) . . . . . . . .. -65 to 150'C
(DJ, DY SuffIX) ......... -65 to 125'C
Power Dissipation (Package)b
16-Pin Plastic DIP< ................................. 450 mW
16-Pin CerDIpd .................................... 900 mW
16-Pin Salce ..................•......•............ 600 mW
LCC20f ........................................•. 900mW
Notes:
a. Signals on Sx, Dx, or INx exceeding V + or V-will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6 mWI'C above 75'C
d. Derate12mWI'Cabove75'C
e. Derate 7.6 mWI'C above 75'C
f. Derate 13 mWI'C above 75'C
Specifications a
Test Conditions
Unless Otherwise Specified
Parameter
ASuflb:
-55 to 125'C
I
D Suffix
-40 to 85'C
I
V+=15Y,V-=-15V
VL = 5 Y, VIN = 2.4 Y, 0.8 yf
Tempb
tnS(on)
Is = -lOrnA, VD = ±10V
V+ = 13.5 Y, V- = -13.5V
Room
Full
20
35
45
45
55
6.tnS(on)
Is = -lOrnA, VD = ±5Y, OV
V+ = 16.5Y,V- = -16.5V
Room
Full
3
3
5
3
5
Room
Hot
-0.01
Room
Hot
-0.01
Symbol
lYPc
Mind
Maxd
Mind
15
-15
Maxd
Unit
15
V
Analog Switch
Analog Signal Range'
Drain-Source On-Resistance
6. Drain-Source
On-Resistance
IS(off)
Switch Off Leakage Current
V+ = 16.5, V- = -16.5 V
VD = ±15.5Y, Vs = :f15.5V
ID(off)
Channel On
Leakage Current
-15
Full
VANALOG
-0.25
0.25
-20
20
-0.5
-5
0.5
5
-0.25
-20
0.25
20
-0.5
-5
0.5
5
-0.4
-40
0.4
40
-1
1
-10
10
ID(on)
V+ = 16.5 Y, V- = -16.5 V
Vs = VD = ±15.5V
Room
Hot
-0.04
Input Current VIN Low
In.
VIN under test = 0.8 V
All Other = 2.4 V
Full
0.005
-1
1
-1
1
Input Current VIN High
1m
VIN 'Inder test = 2.4 V
All Other = 0.8 V
Full
0.005
-1
1
-1
1
RL= 300n, CL = 35 pF
See Figure 2
Room
100
150
150
Room
60
100
100
n
nA
Digital Control
(!A
Dynamic Characteristics
111m-On TIme
tON
111m-Off TIme
tOFF
Break-Before-Make
TIme Delay (DG403)
tD
RL = 300n, CL = 35pF
Room
12
Charge Injection
Q
CL = 10,000 pF
Vgen = OY,Rgen = on
Room
60
Room
72
Room
90
Off Isolation Reject Ratio
OIRR
Channel-ta-Channel Crosstalk
XTALK
P-32167-Rev. C (11115193)
RL = 100n,CL = 5 pF
f=lMHz
5
os
5
pC
dB
1-129
..
Siliconix
DG401/403/405
A Member aftho TBMIC Group
Specificationsa
Test Conditions
Unless Otherwise Specified
V+ = 15 V, V- = -15V
VL = 5V, VIN = 2.4 V,0.8V£
Tempb
1YP"
CS(off)
Room
12
CO(off)
Room
12
CO, Cs(on)
Room
39
Positive Supply Current
1+
Room
Full
0,01
Negative Supply Current
1-
Room
Full
-0.01
Logic Supply Current
IL
Room
Full
0.01
IGNO
Room
Full
-0.01
Parameter
Symbol
D Sulllx
-40 to 85°C
ASuftix
-55 to 125°C
Mind JMaxd
Mind
I
Maxd
Unit
Dynamic Characteristics (Cont'd)
Source Off Capacitance
Drain Off Capacitance
Channel On Capacitance
f=lMHz,Vs=OV
pF
Power Supplies
Ground Current
V+ = 16.5 V, V- = -16.5V
VIN = 00r5V
1
5
1
5
-1
-5
-1
-5
1
5
1
5
!LA
-1
-5
-1
-5
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25°C, Full = as determined by the operating temperature suffIX.
c. 'IYpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by desigu, not subject to production test.
f. VIN = input voltage to perform proper function.
'J.Ypical Characteristics
Input Switching Threshold vs. Supply Voltages
Input Switching Threshold vs. Logic Supply Voltage
10
3.5
1V+~15~ I
8 -
3.0
V- = -15V
TA=25°C
~
6
.oOII!i!
4
I
",
I
.,~"
2
DG403 SW3,4
€
2.0
~
1.5
1.0
0.5
o
o
024
6
8
W U "
VL - Logic Supply (V)
1-130
2.5
H
W
W
(V+) 5
(V-) -5
10
-10
15
-15
W
-10
25
-5
30
0
35
0
40
o
P-32167-Rev. C (11/15/93)
Siliconix
DG401/403/405
AMember of the TEMIC Group
1YPical Characteristics (Cont'd)
I"])S(oo)
35
VS.
VD and Temperature
rDS(oo)
VS.
Vn and Power Supply Voltage
40
V+ = 15 V, V- = -15V
VL=5V
30 I'-"'~+---+-__j---I---+----l
30
~----+_----+_----+_----+_--~
25
20 I'-"''''''-:+---+---I---I---t_-I
15
±22V
10'--__--'-____-'-____-'-____'--__--'
-55'C
10 '--_-'-_--'-_ _
_ _.1....-_-'-_--'
-15 -10
-5
5
o
10
15
-25
-5
-15
VD - Drain Voltage (V)
5
15
I"])S(oo) VS. VD and Power Supply Voltage
(V- = OV)
70
.----..--..,....---'--=--T'---.-----,
60
~~--~----+_----+_----+_--~
Charge Injection vs. Analog Voltage
200
f- V+=15V,V-=-15V
180
VL=5V
/
160
TA=25'C
I
140
50 ~-__j~~-+--1-----t---__j
CL= 10k P/
120
IT
.e;
0
15V
~ V"
80
60
A
40
~
____
o
~
____
5
~
____
10
~
____
15
~
__
20
o
~
25
r~
F
1nA
~
§
-10
1pA
o
-5
5
10
15
..
Vs - Source Voltage (V)
Leakage Current VS. Analog Voltage
90
t+=115VI
V-=-15V
VL=5V
VD= ±14V
60
§
ID(o!!)
100pA
10pA
~oopF
.......... ""-
:::::: ~
-15
Leakage Current VS. Temperature
10nA
L.
.........-: ~
VD - Drain Voltage (V)
100nA
~
L,....--
1//1kpF
·100
20
10
26
VD - Drain Voltage (V)
~
~
~
~
O.lpA
-55 -35 -15
~
h ~
~ID(on)
30
<"
.e;
0
~
-30
-'"
-60
-90
-120
--
-
t- ID(o!!).IS(off)
~~
~ I"""
ID(on)
I
V+ =15V,V- = -15V
VL = 5V, TA = 25'C
ForlD(ofip Vs = OV
ForlS(ofip VD = OV
-
-150
5
25
45
65
Temperature ('C)
P-32167-Rev. C (11/15/93)
~~
85
105 125
-15
-10
-5
o
5
10
15
VD or VS - Drain or Source Voltage (V)
1-131
Siliconix
DG401/403/405
AMcmbcr orthcTBMIC Group
'fYpical Characteristics (Cont'd)
Switching Time vs. Thmperature*
100 n e--r-ir--r--r--r-i---.-.----,
240
210
V+ = 15 V, V- = -15 V, VL = 5V
-tON --tOFF
10n
180
S
.::
1 n 1=--t-----1f--I--t--+-::w:..4--+---!
£
£
100 p 1=--t-----1f--I--b!!I~-+--+-+---!
~
~
,":
150
~
90
120
60
10.0 P I.-....~~"+-t--+-+--f--+----i
Vs= -10V
--::t=;:=
~~-n~~~~~~~Vs=10V
30
1 P L.....-1----.J'----'--_'---L._L--'-_..I.---1
-55 -35 -15
5
25
45
65
85
o
105 125
-55 -35 -15 5
TA - Thmperature ('C)
200
Switching Time vs. Power Supply Voltage*
180
\,.~
120
-=-
§
100
~
80
270 240
~ Vs=5V
140
-;;;-
Vs=5V
l
.... .' ,.
;'-Vs= -5V
,~""
~
-
g
,r
1--1--
60 - V s = - 5 V
J
!
40
2:
~
120
±10
±15
65
90
-15V
-5V
OV
r-
\.
,\.,
1\' .............
\. ...........
~\c
,
±20
'\
~~,:
60
VL=5V
85
105 125
Vs=5V
r-
""- ~O':.~
.--
r?
~~-15V
3~ IL--_-..L__--'-__. IO_N_---..JI'-O_FF_J-'
.
;O_N_-_--'--It_oFF_--11
±5
180
150
L . I_ _- ' -_ _' - - _ - _. . . .
o
OV
-5V
-15V
210
§
I
!
45
Switchhig Time vs. Positive Supply Voltage*
300
1
160
25
TA - Thmperature ('C)
±25
v +. V-Positive and Negative Supplies (V)
'Refer to Figure 2 for test conditions.
o
5
10
v+
-t
--t
15
20
25
- Positive Supply (V)
Schematic Diagram (lYpical Channel)
V+o-----~-~-~------~---------~------------------~~
. . - - - _ -......--1-+--oS
Level
Shift!
Drive
GNDo--------+-----~--
_____~
'----ir-----+--o D
V-o-------~----------
______ ______
~
_4--------------~------~
Figure 1.
1-132
P-32167-Rev. C (11/15193)
Silicanix
DG401/403/405
AMcmbcr oftbc TBMIC Group
Test Circuits
Vo is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing edge of the
output waveform.
+5V
+l5V
3V
CL (includes fIxture and stray capacitance)
Vo=VS
Logic
Input
OV
Switch
Input'
Vs
50%
Switch
Output
OV
Switch
Input'
-Vs
tr <20ns
tf <20 ns
Vo
'VS = 10 V for toN. Vs = -lOVfor tOFF
Note: Logic input waveform is inverted for switches that
have the opposite logic sense control
RL + rDS(on)
Figure 2. Switching Tune
+5V
+l5V
Logic
Input
3VJ
50%
OV
VSl
VOl
VSl
Switch
Output
OV
VS2
VOl
Switch
Output
OV
t
-
CL (includes fIXture and stray capacitance)
Figure 3. Break-Before·Make
+5V
+15 V
Rg
Vo
IlOnF
CL
Vo - - _ . /
I N - -........
On
Off
On
Figure 4. Charge Injection
P-32l67-Rev. C (11/15/93)
1-133
Siliconix
DG401/403/405
AMcmber oltho TBMIC Group
Test Circuits (Cont'd)
+5V
+15V
+5V
r:-----Ho-+----<01 ....--++If--t_-O
Vo
+15V
~---~~~-----t+I~..J
~_+-+_INL ..J
DG403
Channel
Select
-
Figure 9.
Slope
Select
-15V
Stereo Source Selector
Figure 10. Dual Slope Integrator
Band-Pass Switched Capacitor Filter:
Single-pole double-throw switches are a common element
for switched capacitor networks and filters. The fast
switching times and low leakage of the DG403 allow for
higher clock rates and consequently higher filter operating
frequencies.
+5V +15V
VL
..
SI
S3
IN2....J
e;n
~
S2
S4
-
I
..n..r
IN1....J
Clock
GND
-
DG463
V-
-15V
>-.,.-'--0
"out
Figure 11. Band-Pass Switched Capacitor Filter
P-32167-Rev. C (11/15/93)
1-135
Siliconix
DG401/403/405
AMember of the 'nIMICGroup
Applications (Cont'd)
Peak Detector:
A3 acting as a comparator provides the logic drive for
operating SW1. The output of A2 is fed back to A3 and
goes negative, turning SWl off. The system will therefore
store the most positive analog input experienced.
compared to the analog input ein. If ein > eout the output
of A3 is high keeping SW1 closed. This allows Cl to charge
up to the analog input voltage. When ein goes below eout A3
Reset
...,
Rl
>-........--oCOut
- - - em
---
Figure 12. Positive Peak Detector
1-136
P-32167-Rev. C (11/15/93)
Siliconix
DG411/412/413
AMcmber of the TBMIC Group
Precision Monolithic Quad SPST CMOS Analog Switches
Features
Benefits
Applications
• 44-V Supply Max Rating
•
•
•
•
•
•
•
•
•
• ± lS-V Analog Signal Range
• On-Resistance-rnS(on): 25 g
•
•
•
•
Fast Switching-tON: 110 ns
Ultra Low Power-Pn: 0.351LW
TIL, CMOS Compatible
Single Supply Capability
Widest Dynamic Range
Low Signal Errors and Distortion
Break-Before-Make Switching Action
Simple Interfacing
Precision Automatic Test Equipment
Precision Data Acquisition
Communication Systems
Battery Powered Systems
Computer Peripherals
Description
The DG411 series of monolithic quad analog switches was
designed to provide high speed, low error switching of
precision analog signals. Combining low power (0.35 11W)
with high speed (tON: 110 ns), the DG411 family is ideally
suited for portable and battery powered industrial and
military applications.
To achieve high-voltage ratings and superior switching
performance, the DG411 series was built on Siliconix's high
voltage silicon gate process. An epitaxial layer prevents
latchup.
Each switch conducts equally well in both directions when
on, and blocks input voltages up to the supply levels
when off.
The DG411 and DG412 respond to opposite control logic
as shown in the Truth Thble. The DG413 has two normally
open and two normally closed switches.
Functional Block Diagram and Pin Configuration
DG411/412
LCC
DG411/412
Dual-In-Line and sorc
D1 IN1 NC IN2 D2
IN1
IN2
D1
D2
S1
S1
~
V-
V+
NC
NC
GND
NC
V-
V+
GND
VL
S4
S3
D4
D3
IN4
IN3
S2
S3
S4
D4 IN4 NC IN3 D3
lbpView
lbpView
1ruthTable
Ordering Information - DG411/412
Temp Range
-40 to 85°C
-40 to 85°C
Part Number
Package
16-Pin Plastic DIP
16-Pin Narrow sorc
16-Pin CerDIP
-55 to 125°C
LCC-20
P32167-Rev. B (11/15/93)
Logic
DG411
DG412
DG411DJ
0
ON
OFF
DG412DJ
1
OFF
ON
DG411DY
DG412DY
DG411AK, DG411AK/883, 5962-9073101MEA
Logic "0" s 0.8 V
Logic "1" '" 2.4 V
Switches Shown for DG411 Logic "1" Input
DG412AK, DG412AK/883, 5962-9073102MEA
DG411AZ1883, 5962-9073101M2A
DG412AZ1883,5962-9073102M2A
1-137
Silicanix
DG411/412/413
AMcmbcr of the TBMIC Group
DG413
DG413
LCC
D1 IN!
D2
~
S1
V-
V+
NC
NC
GND
NC
S4
S3
D4 IN4 NC IN3 D3
ThpView
'fruth Table
Ordering Information - DG413
Thmpllange
-40 to 8S·C
-S5 to 125·C
Locie
SWltSW4
16-Pin Plastic DIP
DG4130J
0
OFF
ON
16-Pin Narrow SOIC
DG413DY
1
ON
OFF
Part Number
Package
16-Pin CerDIP
LCC-20
SWz,SW,
DG413AK, DG413AK1883. S962-9073103MEA
DG413AZ1883. S962-9073103M2A
Logic "0" s 0.8 V
Logic "1" '" 2.4 V
Switches Shown for DG411 Logic "1" Input
Absolute Maximum Ratings
V+toV- .................•......................... 44V
GNDtoV- .................•......................•. 25V
VL •........................•..•• (GND -0.3 V) (V+) +0.3 V
Digital Inputsa• Vs. VD ............... (V-) -2Vto (V+) +2V
or 30 rnA, whichever occurs first
Continuous Current (Any Thnninal) .................... 30 rnA
Current, S or D (Pulsed 1 ms; 10% Duty Cycle) .......... 100 rnA
Storage Thmperature
(AK, AZ Suffix) . . . . . . . .. -65 to 1S0·C
(OJ. DY Suffix) .... . . . .. -65 to 125·C
Power Dissipation (Package)b
16-PinPlasticDIPC ...•..............•.............. 470mW
1-138
16-PinNarrowSOIcd .•............................. 600mW
16-PinCerDIpc .................................... 900mW
LCC-20" .....•.•.....•..............•••........... 900mW
Notes:
a. Signals on Sx. Dx. or INx exceeding V + or V - will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. A1lleads welded or soldered to PC Board.
c. Derate6mWf·Cabove25·C
d. Derate 7.6 mWrC above 75·C
e. Derate12mWf·Cabove7S·C
P-32167-Rev. B (11115193)
Silicanix
DG411/412/413
A Member of the TEMIC Group
Specifications a
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
ASumx
-55 to 125'C
I
D Suff"1X
-40 to 85'C
I
V+=15V,V-=-15V
VL = 5 V, VIN = 2.4 V, 0.8 yf
Tempb
V+ = 13.5 V, V- = -13.5 V
Is = -lOrnA, VD = ±8.5V
Room
Full
25
Room
Full
±0.1
-0.25
-20
0.25
20
-0.25
-5
0.25
5
Room
Full
±0.1
-0.25
-20
0.25
20
-0.25
-5
0.25
5
Room
Full
±0.1
-0.4
-40
0.4
40
-0.4
0.4
-to
to
Room
Full
110
175
240
175
220
Room
Full
100
145
160
145
160
25
'JYpc
Mind
Maxd
Mind
15
-15
Maxd
Unit
15
V
Analog Switch
Analog Signal Rangee
Drain-Source On-Resistance
1'])5(00)
IS(off)
Switch Off Leakage Current
V+ = 16.5, V- = -16.5V
VD= ±15.5V, Vs= 'F15.5V
ID(off)
Channel On Leakage Current
ID(on)
-15
Full
VANALOG
V+ = 16.5 V, V- = -16.5 V
Vs = VD = ±15.5V
35
45
35
45
°
nA
Digital Control
Input Current, VIN Low
VIN Underlest = 0.8 V
Input Current, VIN High
VIN Under10st = 2.4 V
Dynamic Characteristics
Thrn-On'TIme
tON
RL = 3000, CL = 35pF
Vs = ± 10 V See Figure 2
Thrn-Off'TIme
Break-Before-Make 'TIme Delay
Charge Injection
tOFF
tD
DG413 Only, Vs = lOV
RL = 3000, CL = 35 pF
Room
Q
Vg = Ov, Rg = 00, CL = 10nF
Room
5
Room
68
Room
85
Room
9
Off Isolatione
OIRR
Channel-to-Channel Crosstalk"
XTALK
RL = 500, CL = 5 pF, f = 1 MHz
Source Off Capacitancec
CS(off)
Drain Off Capacitancee
CD(off)
Channel On Capacitancee
pC
dB
Room
9
CD(on)
Room
35
Positive Supply Current
1+
Room
Full
0.0001
Negative Supply Current
1-
Room
Full
-0.0001
Logic Supply Current
IL
Room
Full
0.0001
IGND
Room
Full
-0.0001
f=1MHz
os
pF
..
Power Supplies
Ground Current
P32167-Rev. B (11/15/93)
V+ = 16.5, V- = -16.5 V
VIN=00r5V
1
5
-1
-5
1
5
-1
-5
1
5
-1
-5
1
5
tu\
-1
-5
1-139
Silicanix
DG411/412/413
AMember of the TBMIC Group
Speci6cations a for Unipolar Supplies
A Suffix
-55 to 125'C
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
I
D SUff"1X
-40toS5'C
I
V+=12V,V-=OV
VL = 5 V, VIN = 2.4 V, O.B vt
Tempb
12
12
V
V+ = 10.BV, ls = -lOrnA
VD=3V,BV
Room
Full
40
BO
100
SO
100
Q
Room
Hot
175
250
400
250
315
Room
Hot
95
125
140
125
140
'fYpc
Mind
Maxd
Mind
Maxd
Unit
Analog Switch
Aoalog Signal Range"
Full
VANALOG
Drain-Source On-Resistance
rns(on)
Dynamic Characteristics
Thrn-OnTIme
tON
Thrn-OffTIme
RL = 300Q, CL = 35pF
VS = B V, ~ee Figure 2
IOFF
Break-Before-Make
TIme Delay
tD
DG413 Only
Vs = BV,RL = 300Q, CL = 35 pF
Room
25
Charge Injection
Q
Vg = 6 V, Rg = 0 Q, CL = 10 nF
Room
25
ns
pC
Power Supplies
Positive Supply Current
I+
Room
Hot
0.0001
Negative Supply Current
1-
Room
Hot
-0.0001
Logic Supply Current
IL
Room
Hot
0.0001
IGND
Room
Hot
-0.0001
1
5
1
5
-1
-5
-1
-5
!lA
V+ = 13.5, VIN = Oor 5V
Ground Current
1
5
1
5
-1
-5
-1
-5
l'4ULCI!I.
a.
b.
c.
d.
e.
f.
Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
Room = 25'C, Full = as determined by the operating temperature suffIX.
'iYPical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
Guaranteed by design, not subject to production test.
VIN = input voltage to perform proper function.
'JYpical Characteristics
On-Resistance vs. VD and
Unipolar Supply Voltage
On-Resistance vs. VD and Power Supply Voltage
50
45
TA~ 25'~
40
I
35
20
15
All
±15V......
I'"
1\
,-....,...
~
~
r--.. ...
;-
~
......... .:::
200
~
±10V
!
~±12V
",
~
~-
150
100
±20V
10
50
5
o
0
-20 -15 -10
-5
0
5
10
VD - Drain Voltage (V)
1-140
..
250
±ISV
30
25
300
±5~ A
_I
15
20
I
I
V~=5Iv
I
\ V+ =3V
VL=3V
I
I-
I
V+ =5V
~
I
1\
/
B~
,-
;".-
-
024
6
I
12V _
B
10
12
15V
"
M
20V
U
20
VD - Drain Voltage (V)
P-32167-Rev. B (11/15193)
Siliconix
DG411/412/413
AMem'ber oftbcTBMlc Group
lYPical Characteristics (Cont'd)
Leakage Current vs. Analog Voltage
40
I
30 20 _
I
OJ
V+ =15V
V- = -15V
VL=5V
10 -TA 25°C
~
,e;
~
"'
-20
-
k
~
./
-30
-40
-50
/'
..,,- ~
ID(on)
-
.~
./
t:l
I
-60
-15
~o
j
",
IS(off)
,
j
...-!
ID(of£)
-
0
-10
In, Is Leakages vs. Temperature
VD or Vs -
J
o
-5
-10
35 r--~~-r~-'--T---r--'
V+ = 15V
V- = -15V
30 I-:::....."""'--t--+-- VL = 5V
10
5
5
~_~_~
-15
15
Charge Inje~tion vs. Analog Voltage
40
0
-40
-60
,
#
20
CL= InF
-20
A r
i'o...
-10
~
I
I
120 r- V+ = 15V
V- = -15V
100 I- VL=5V
./
V/ ..............
G'
,e;
:.o"'CL=10nF
0
Y
60
/
40
20
0
o
-60
5
10
-15
15
#
~
~ //
~ '//
-40
-5
U
./
~
'"
CL=lnF
A~
o
-5
-10
5
10
15
..
VD - Drain Voltage (V)
Input Swit~hing Threshold vs. Supply Voltage
Switching Time vs. Thmperature
240
210
3.0
1-~+=I15VI
V- = -15V
180 r- VL=5V
Vs=10V
2.5
150
-- -
toN _
2.0
120
---
1.5
90 I"""""
1.0
I-"":
.---- ~
tOFF
60
0.5
0
(V+) 5
(V-)-5
15
/. 'I'
-20
3.5 ,---.,--,--....--,-----.---.---,
~
10
CL= 10nF
80
V s - Source Voltage (V)
~
_ _~_~
5
Charge Injection vs. Analog Voltage
r--V
-15
o
140
V+ I=15V I
80 -V-=-15V
VL=5V
60
0
~_-L
VD - Drain Voltage (V)
Drain or Source Voltage (V)
100
G'
,e;
__
-5
-10
30
o
10
-10
P32167-Rev. B (11/15/93)
15
-15
20
-10
25
-5
30
0
35
0
40
0
-55 -35 -15
5
25
45
65
85
105 125
Thmperature (0C)
1-141
Silicanix
DG411/412/413
AMcmber afthe TBMIC Group
1YPical Characteristics (Cont'd)
Operating Voltage Range
so
Supply Current vs. Input Switching Frequency
lOOmA
42
V+ = 15V
-15V
VL=5V
- - =lSW
4 SW --!-----!7fIC--ri--",.'-!
v- =
10mA
40
_ =
1mA
€
30
+
>
20
10
:
j
VL=
C
Compatible
W~tlbe
1011A
lIlA
VIN = 0.8 V, 2.4 V
100nA
2
o
1DOIIA
10nA
o
-10
-20
-30
-40
10
100
1k
10 k
100 k
1M
10 M
f - Frequency (Hz)
V - - Negative Supply (V)
Schematic Diagram (1YPical Channel)
VT~~·-,--~-~------~~--------~------------------------~-;
,.---...I"--..,..-+-+--<>S
VL
VIN
Level
Shift!
Drive
GND
D
V-
Figure 1.
1·142
P-32167-Rev. B (11/15/93)
Siliconix
DG411/412/413
AMember of the TEMlC Group
Test Circuits
+5V
+15V
3V
Logic
Input
tr <20ns
tf <20 ns
50%
OV
Vo
SWitch
Input·
Switch
Output
Switch
Input·
CL (includes fixture and stray capacitance)
Vs
Vo
90%
-
OV
Vo
-Vs
·VS = 10VfortoN, Vs = -lOVfortoFF
VO=VS
Note: Logic input waveform is inverted for switches that
have the opposite logic sense control
RL + J'DS(on)
Figure 2. Switching Tune
+5V
+15V
Logic
Input
VSl
VL
Sl
V+
Dl
t
V02
D2
~
j-50%
OV
VSl
VOl
VOl
INl
VS2
3V
-
RLl~CLl
35pF
300'-1
-
SWitch
Output
OV
VS2
V02
SWitch
Output
OV
..
CL (includes fIXture and stray capacitance)
Figure 3. Break-Before-Make (DG413)
+5V
+15 V
INX~
Vo
CL
I10nF
INX dependent on switch configuration Input polarity determined by
sense of switch.
Figure 4. Charge Injection
P32167-Rev. B (11/15/93)
1-143
Siliconix
DG411/412/413
AMembcr of the TBMIC Group
Test Circuits (Cont'd)
+5V
+15 V
+5V
+15 V
Vo
,
-15V
XTALKIsolation = 20 log
I I
Off Isolation = 20 log
Vo
Vs
C = RFBypass
C= RFbypass
Figure 6.
Figure 5. Crosstalk
+5V
Off Isolation
+15V
Meter
HP4192A
Imp::d:mce
Analyzer
or Equivalent
Figure 7. Source/Drain Capacitances
Applications
Single Supply Operation:
TheDG411/412/413 can be operated with unipolar supplies
from 5 V to 44 V. These devices are characterized and
tested for unipolar supply operation at 12 V to facilitate the
majority of applications. In single supply operation, V + is
1-144
tied to VL and V- is tied to 0 V. See Input Switching
Threshold vs. Supply Voltage'curve for VL versus input
threshold requirments.
P-32167-Rev. B (11/15/93)
Silicanix
DG411/412/413
A Member of the TBMlc Group
Applications (Cont'd)
Summing Amplifier
Whendrivingahighimpedance,highcapacitanceJoadsuch
as shown in Figure 8, where the inputs to the summing
amplifier have some noise filtering, it is necessary to have
shunt switches for rapid discharge of the filter capacitor,
thus preventing offsets from occurring at the output.
Rj
R2
VlNl
r
Cl
R3
Rs
R4
VIN2
VOUT
r
C2
R6
-=-
Figure 8. Summing Amplifier
..
P32167-Rev. B (11/15/93)
1-145
Siliconix
DG417/418/419
AMember of the TBMIC Group
Precision CMOS Analog Switches
Features
Benefits
Applications
• ± 15-V Analog Signal Range
•
•
•
•
•
•
•
•
•
•
•
•
•
On-Resistance--rOS(on): 20 g
Fast Switching Action-tON: 100 ns
Ultra Low Power Requirements-Po: 35 n W
TIL and CMOS Compatible
MiniDIP and SOlC Packaging
• 44-V Supply Max Rating
•
•
•
•
•
Wide Dynamic Range
Low Signal Errors and Distortion
Break-Before-Make Switching Action
Simple Interfacing
Reduced Board Space
Improved Reliability
Precision Test Equipment
Precision Instrumentation
Battery Powered Systems
Sample-and-Hold Circuits
Military Radios
Guidance and Control Systems
Hard Disk Drives
Description
The DG417/418/419 monolithic CMOS analog switches
were designed to provide high performance switching of
analog signals. Combining low power, low leakages, high
speed, low on-resistance and small physical size, the DG417
series is ideally suited for portable and battery
powered industrial and military applications requiring high
performance and efficient use of board space.
To achieve high-voltage ratings and superior switching
performance, the DG417 series is built on Siliconix's high
voltage silicon gate (HVSG) process. Break-before-make is
guaranteed for the DG419, which is an SPDT
configuration. An epitaxial layer prevents latchup.
Each switch conducts equally well in both directions when
on, and blocks up to the power supply level when off.
The DG417 and DG418 respond to opposite control logic
levels as shown in the Truth Table.
Functional Block Diagram and Pin Configuration
Dual-In-Line and sOle
DG417
Dual-In-Line and sOle
DG419
I
D
D
S
L
v-
v-
Ne
GND
GND
IN
v+
v+
. ThpView
ThpView
1l:uth Thble -DG417/418
1l:uth Thble -
DG419
Logic
DG417
DG418
Logic
SWl
SWz
0
1
ON
OFF
OFF
ON
o
ON
OFF
OFF
ON
Logic "0" = S 0.8 V, Logic "1" = 2: 2.4 V
Switch Shown for DG417 Logic "1" Input
Ordering Information Temp Range
Package
8-Pin Plastic MiniDIP
-40 to 85 0 e
8-Pin Narrow sOle
-55 to 125°e
1-146
v
8-Pin CerDIP
Logic "0" = ::S 0.8 V, Logic "1" = 2: 2.4 V
Switches Shown for DG419 Logic "1" Input
DG417/418
Part Number
DG417DJ
DG418DJ
DG417DY
Ordering Information Temp Range
-40 to 85°e
-55 to 125°e
Package
DG419
Part Number
8-Pin Plastic MiniDIP
DG419DJ
8-Pin Narrow sale
DG419DY
8-Pin CerDIP
DG419AK, DG419AK!883
DG418DY
DG417AK, DG417AK!883
DG418AK, DG418AK!883
P-32167-Rev. e (11/15/93)
Siliconix
DG417/418/419
AMember of the TeMIC Group
Absolute Maximum Ratings
Voltages Referenced to VV+ ................................................. 44V
GND ............................................... 25V
Power Dissipation (Package)b
8-Pin Plastic MiniDiPC .............................. 400 mW
8-Pin Narrow SOICd ................................ 400 mW
8-PinCerDIpc ..................................... 6oomW
VL ........................... (GND -0.3 V) to (V+) + 0.3 V
Digital InputsaVs, VD ............... (V-) -2 Vto (V+) + 2 V
or 30 rnA, whichever occurs first
Current, (Any Thrminal) Continuous .................... 30 rnA
Current (S or D) Pulsed 1 ms, 10% duty cycle ........... 100 rnA
Storage Thmperature
(AK SuffIX) ............ -65 to 150'C
(DJ, DY SuffIX) .... . . . .. -65 to 125'C
Notes:
a. Signals on Sx, Dx, or INx exceeding V+ or V-will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6 mWI'C above 75'C
d. Derate 6.5 mWI'C above 25'C
e. Derate12mWI'Cabove75'C
Specificationsa
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+=15V,V-=-15V
VL = 5 V, VIN = 2.4 V, 0.8 yf
Tempb
Is = -lOrnA, VD = ±12.5V
V+ = 13.5 V, V- = -13.5 V
Room
Full
'JYpc
A Suffix
-55 to 125'C
DSufflX
-40 to 85'C
Mind IMaxd
Mind IMaxd
Unit
Analog Switch
Analog Signal RaogeC
rnS(on)
V+ = 16.5 V; V- = -16.5 V
VD = :fl5.5V, Vs = ±15.5V
ID(on)
V+ = 16.5 V, V- = -16.5 V
Vs = VD = ±15.5V
-15
15
3S
45
0.1
0.25
-20
0.25
20
0.25
-5
0.25
S
DG417
DG418
Room
Full
0.1
-0.25
-20
0.25
20
0.25
-5
0.25
5
DG419
Room
Full
-0.1
-0.75
-60
0.75
60
-0.75
-12
0.75
12
DG417
DG418
Room
Full
-0.4
-0.4
-40
0.4
40
-0.4
-10
0.4
10
DG419
Room
Full
0.4
-0.75
-60
0.75
60
0.75
-12
0.75
12
DG417
DG418
Room
Full
100
175
250
175
250
DG417
DG418
Room
Full
60
145
210
145
210
175
250
175
250
ID(off)
Channel On
Leakage Current
15
35
45
20
Room
Full
IS(off)
Switch Off
Leakage Current
-15
Full
VANALOG
Drain-Source
On·Resistance
V
°
nA
Digital Control
Input Current, VIN Low
..
Input Current, VIN High
Dynamic Characteristics
Thrn-On TIme
tON
Thrn-OffTIme
tOFF
RL= 3000, CL = 35 pF
Vs = ±10V
See Switching Tune Thst Circuit
"Iransition TIme
tTRANs
RL - 3000, CL - 35 pF
VS1= ±10V,VS2= :flOV
DG419
Room
Full
tD
RL - 3000, CL - 35 pF
VSl = VS2 = ±lOV
DG419
Room
13
Q
CL = 10 nF, Vgen - 0 V, Rgen = 0 g
Room
60
Room
8
DG417
DG418
Room
8
DG417
DG418
Room
30
DG419
Room
35
Break-Before-Make
TIme Delay
Charge Injection
Source Off Capacitance
CS(off)
Drain Off Capacitance
CD(off)
f=lMHz,Vs=OV
Channel On
Capacitance
P32167-Rev. C (11/15193)
CD(on)
5
ns
5
pC
pF
1-147
Siliconix
DG417/418/419
AMemberofthc1'EMICGrOUP
Specificationsa
Test Conditions
Unless Otherwise Specified
Parameter
V+ = 15V,V- = -15V
VL = 5 V, VIN = 2.4 V, 0.8 vi
Symbol
Thmpb
lYPc
Room
Full
0.001
Room
Full
-0.001
Room
Full
0.001
Room
Full
-0.0001
ASufI"lX
-55 to 125°C
D SufI"lX
-40 to 85°C
Mind I Max
30
+
20
1.0
10
0.5
0
(V+) 5
(V-) -5
2
0
10
-10
P32167-Rev. C (11/15/93)
15
-15
20
-10
25
-5
30
0
35
0
40
0
~~~~~~~~=j0
.=
CMOS Compatible
-10
-20
-30
Negative Supply V - (V)
Voltages Used for Production Thsting
-40
1-149
Siliconix
DG417/418/419
AMembcr oltho TaNIO Group
1)rpical Characteristics (Cont'd)
Switching Time vs. Temperature
120
V~ = ~5V, ~- = 1-15~
I
100 r- VL = 5V,VIN = 3 V Pulse
!
80
~
60
~
--
~~
40
i-""'"
"","""
tolJ.;oo
.,.".
/
~"I oo"\.,..,l
120
100
DG419
Source 1
-
80
60
20
20
V+ = 15V
V- = -15V
VL=5V
-
o
o
0
20
40
60
80
100 120
100
I
I
1k
10 k
Thmperature (0C)
Switching Time vs. Supply Voltages
70
_
V-=OV
VL=5V
VIN=3V
_
I
~
-
............ ~
I
i"-.....
100
!
90
~
80
~
I
________________
_L_~~_~_-L_
L-_~
±10
±11
±12
±13
±14
rr-
±15
V- =OV
VL=5V
VIN =3V
I
70
I
10
±16
11
12
I---+---+--,tt.'-II---+----::r--l
10 ttA I----t--:::;~-+----+-~~t--__t
1 ttA
100 nA
!--:JIC-_+--+--:~_+---I---l
L-_....L___~-L_ _~_ _L-.._
100
1k
10k
lOOk
f - Frequency (Hz)
1-150
13
14
15
16
V+ Supply Voltage (V)
Supply Current vs. Temperature
1ttA
V~ = 161.5v,~- =1-16.~V
VL=5V,VIN=OV
100nA
1M
_J
10M
~
/
I I
10nA
~
-
.......... r.........toN
_J
Power Supply Currents vs. Switching Frequency
10mA r--~~--r--~-~r-~_.
V+ = 15 V, V- = -15V
VL = 5V, VIN = 5V,50% D Cycle
1mA r----t---+---;-~~I--__t
.:!I
100 M
~
Supply Voltage (V)
100 ttA
10 M
"" ........ .........
110
~IITH-II
40
1M
Switching Time vs. V+
130
120
............. .....
100 k
",
f - Frequency (Hz)
80
"
<:::
40
-55 -40 -20
,
'"
-
Source 2
-
toFF
Crosstalk and ott Isolation vs. Frequency
140
I+.I~ ~
1nA
., V l/
...~
l/ ~GND
lOpA
~
.......
1pA
I'"
VV
V
~
.:!I 100pA
~
O.lpA
-55 -40 -20
0
20
40
60
80 100 120
Thmperature (0C)
P·32167-Rev. C (11/15/93)
Siliconix
DG417/418/419
A Mcmber olthe TBMlc Group
Schematic Diagram (1Ypical Channel)
V+O-------~--~--~--------4r--------~----------------------~,
S
VL
VLevel
Shift!
Drive
VIN
V+
GND
D
V-
Figure 1.
Test Circuits
Vo is the steady state output with the switch on.
+5V
+15V
3V
Logic
Input
50%
tr <20ns
tf <20 os
OV
CL (includes fIXture and stray capacitance)
Switch
Input
Vs
Switch
Output
OV
Note: Logic input waveform is inverted for switches that have
the opposite logic seose.
Vo=VS
Figure Z. Switching Tune (DG417/418)
+5V
+15 V
Logic
Input
VSl
VS2
VL
SI
3V~
\.
tr <20ns
tf <20ns
OV
S2
VSl =VS2
Switch
Output
VoOv~90%
_
tD
CL (includes fIXture and stray capacitance)
Figure 3. Break-Before-Make (DG419)
P32167-Rev. C (11/15/93)
1-151
..
Siliconix
DG417/418/419
AMcmbecoftbc TeMIC Group
Test Circuits (Cont'd)
+5V
+lSV
3V
Logk
Input
tr <20ns
tf <20ns
50%
OV
VSl
VOl
Switch
Output
VS2
CL (includes frxture and stray capacitance)
Vo=VS
Figure 4.
'lIansition Tune (DG419)
~Vo
+15 V
+5V
Vo
Rg
Vo
INx
OFF
CL
IlOnF
Vg
OFF
·ON
Q=dVOXCL
-15V
Figure 5.
+5V
Charge Injection
+15 V
+5V
J2
+15V
v+
50g
~
Vo
RL
XTALK Isolation = 20 log
C= RFbypass
Figure 6.
1-152
Crosstalk (DG419)
-15V
Off Isolation = 20 log
Figure 7.
I~: I
Off Isolation
P-32167-Rev. C (11/15193)
Siliconix
DG417/418/419
A Member of the TEMIC Group
Test Circuits (Cont'd)
+5V
+15V
Va
Figure 8.
+5V
-
-15V
Insertion Loss
+15V
+15V
NC
ov, 2.4 V
~~---''''''---
Meter
Meter
HP4192A
Impedance
Analyzer
or EqUIvalent
HP4192A
Impedance
Aitalyzer
or EqUIvalent
Ov, 2.4 V
f;lMHz
f;lMHz
-
-15V
Figure 9.
-
-15V
SourcelDrain Capacitances
Applications
..
Switched Signal Powers Analog Switch
The analog switch in Figure 10 derives power from its input
signal, provided the input signal amplitude exceeds 4 V and
its frequency exceeds 1 kHz.
Input
This circuit is useful when signals have to be routed to either
of two remote loads. On1y three conductors are required:
one for the signal to be switched, one for the control signal
and a common return.
A positive input pulse turns on the clamping diode Dl and
charges C1 . The charge stored on C1 is used to power the
chip; operation is satisfactory because the switch requires
less than 1 f.lA of stand-by supply current. Loading of the
signal source is imperceptible. The DG419's on-resistance
is a low 100 Q for a 5-V input signal.
P32167-Rev. C (11/15/93)
D
S1
o--'-¥'....,..-<:>-r- -'---"-1----,.--0
VOUT
S2
RU
IN
Control 0--+--1
lOkQ
RLl
10kQ
Figure 10. Switched Signal Powers
Remote SPDT Analog Switch
1-153
Siliconix
DG417/418/419
AMcmber of tho TBMIC Group
Applications (Cont'd)
Micropower UPS 1hlnsfer Switch
really needed. In the stand-by mode, hundreds of IlA are
sufficient to retain memory data.
When Vee drops to 3.3 V, the DG417 changes states,
closing SW1 and connecting the backup cell, as shown in
Figure 11. Dl prevents current from leaking back towards
the rest of the circuit. Current consumption by the CMOS
analog switch is aronnd 100 pA; this ensures that most of
the power available is applied to the memory, where it is
When the S-V supply comes back up, the resistor divider
senses the presence of at least 3.5 V, and causes a new
change of state in the analog switch, restoring normal
operation.
V+ SW1 VL
D
Vee
(5 V)
__~St-__~__,
+
DG417
l-_--l_~=+==_
.l3VLiCell
I
___IJI~-.J
GND
V-
Figure 11. Micropower UPS Circuit
Programmable Gain Amplifier
GaAs FET Driver
The DG419, as shown in Figure 12, allows accurate gain
selection in a small package. Switching into virtual ground
reduces distortion caused by toS(on) variation as a function
of analog signal amplitude.
The DG419, as shown in Figure 13 may be used as a GaAs
FET driver. It translates a TTL control signal into -8-V, O-V
level outputs to drive the gate.
+5V
DG419
RZ
Your
GND
V-
-BV
Figure 12. Programmable Gain Amplifier
1-154
Figure 13. GaAs FET Driver
P-32167-Rev. e (11/15/93)
Silicanix
DG421j423j425
AMember oCthe TeMIC Group
Low-Power, High-Speed,
Latchable CMOS Analog Switches
Features
Benefits
Applications
•
•
•
•
•
• tlP Compatible
•
•
•
•
•
•
Latched Control Inputs
Rail-to-Rail Analog Input Range
On-Resistance: 25 Q
Fast Switching Action-toN: 170 ns
Micropower Requirements--PD: 35 nW
• TIL and CMOS Logic Compatible
• Low Leakage: 40 pA
•
•
•
•
•
Wide Dynamic Range
Reduced Component Count
Low Signal Errors and Distortion
Break-Before-Make Switching Action
Battery-Compatible Operation
Data Bus Switching
Sample-and-Hold Circuits
Programmable Filters
IlP Controlled Analog Systems
Portable Instruments
Telecommunication Systems
Description
The DG421/423/425 are monolithic analog switches
featuring latchable logic inputs to simplify interfacing with
microprocessors. This series combines fast switching speed
(tON: 170 ns, typ), and Iowan-resistance (rOS(on): 25 Q,
typ) making it ideally suited for battery powered industrial
and military applications that require microprocessor
compatible analog switches.
The DG421 has two normally open switches (SPST). The
DG423 has two single-pole, double-throw (SPDT) pairs.
The DG425 has two normally open pairs (DPST).
To achieve high-voltage ratings and superior switching
performance, the DG421 series is built on Siliconix's high
voltage silicon gate CMOS process. Break-before-make is
guaranteed for the DG423. An epitaxial layer prevents
latchup.
Each switch conducts equally well in both directions when
on and blocks input voltages up to the supply rail voltages
when off.
The input data latches become transparent when WR is set
low. When WR goes high the latches store the logic control
data. A Iowan RS resets all switches to their default state
(all inputs low).
Functional Block Diagram and Pin Configuration
Dual-In-Line
DG421
Dual-In-Line
DG425
SI
Dl
WR
INl
WR
INl
NC
v-
D3
v-
NC
GND
S3
GND
NC
VL
S4
VL
NC
Dl
SI
v+
D4
v+
RS
IN2
RS
IN2
D2
S2
D2
S2
ThpView
D
ThpView
'ftuth Table - DG421/DG425
WR
0
P-32167-Rev. C (11/15/93)
RS
INx
Switch
0
OFF
Logic "0" :s 0.8 V
Logic "I" ~ 2.4 V
ON
SWitches Shown for Logic "1" Input
1-155
Silicanix
DG421/423/425
AMcmber of the TBMIC Group
Functional Block Diagram and Pin Configuration
(
DG423
PLCC
Dual-In-Line
VGND
NC
VL
V+
I~
S ~ ;;
i
ThpView
ThpView
Truth Table - DG423
WR.
RS
1Nx
SWloSWl
SW3,SW4
0
1
0
OFF
ON
1
ON
OFF
Logic "0" s O.B V
Logic "1" '" 2.4 V
Switches Shown for Logic "1" Input
Ordering Information - DG421/423/425
Temp Range
-40 to B5'
Package
16-Pin Plastic DIP
1Nx
RS
WR.
DG421DJ
X
1
0
X
1
J
Control data ,latched-in, switches
on or off as selected by last INx
X
0
X
X
1..
X
All latches reset, switches on or off
as when INx = 0, WR = 0, RS = 1
DG423DJ
DG425DJ
20-PinPLCC
Latch Operation Truth Table
Part Number
DG423DN
Latcb/Switeh X
'1tan~parent
latch operation
Absolute Maximum Ratings
Voltages Referenced to VV+ ................................................. 44V
GND ............................................... 25V
VL ............................ (GND -0.3 V) to (V+) +0.3 V
Digital Inputs" Vs, Vo .......... V- minus 2 V to (V+ plus 2 V)
or 30 rnA, whichever occurs first
Continuous Current (Any Terminal) .................... 40 rnA
Current, S or D (Pulsed 1 ms, 10% duty) ............... 100 rnA
Storage Thmperature. . . . . . . . . . . . . . . . . . . . . . . . . .. -65 to 125'C
1-156
Power Dissipation (Package)b
16-Pin Plastic DIPC ........ : ........................ 470 mW
20-PinPLCCd ..................................... BOOmW
Notes:
a. Signals on Sx, Dx, or INx exceeding V + or V - will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate6mWI'Cabove75'C
d. Derate 10 mWI'C above 75'C
P-32167-Rev. C (11/15/93)
Siliconix
DG421/423/425
A Member of the TBMIC Group
Specifications
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
D SuffIX
-40 to 85'C
V+ = 15'1, V- = -15V
VL = 5 V, VIN = 2.4 V, 0.8 yc
Tempa
Mine
Full
-15
Is - -lOrnA, VD - ±8.5V
V+ = 13.5 V, V- = -13.5 V
Room
Full
I
'JYpb
I
Max"
Unit
Analog Switch
Analog Signal Ranged
15
V
25
35
45
e
±0.01
0.25
5
±0.01
0.25
5
±0.04
0.4
10
Room
Full
170
250
300
tOFF
Room
Full
140
200
200
tww
Room
Full
200
200
Room
Full
100
100
Room
Full
60
100
5
VANALOG
Drain-Source On-Resistance
s(on) VS.
~
Cl
TAI=
50
~
25'~
I
Cl
±5V
1\
40
V
=
0i!C:
30
--
!
20
I
J
I"""
±15V __
I'
I
-5
-
~
±20V
0
5
60
a
§
50
'"C:
40
I
30
'Qe
10
15
J
"
1/\
70
=
0
.,.
"'-
10
-20 -15 -10
'\
~ /'\.
1"'''''''
Q
~C:
I
100... ±7.5V J
c5l
j
f'JI
.11l
~
C:
a
§
l'])S(on) VS. Vn and Power
Vn and Power Supply Voltage
20
I
I
-
7
--
I
'1
\ 10~
,15V_
I-...
~
-
o
20
~75
-
,A
i-"'"
)
."
TA=2S'C
V-=OV
\ IV
\
+
I
Supply Voltage
20V
5
10
.J
~
20
15
VD - Drain Voltage (V)
VD - Drain Voltage (V)
Leakage Currents VS. Analog Voltage
Supply Currents VS. Switching Frequency
4
<'
-e:
3
-50
oJ
2
~
I
-100 f--:;J~--+--I,..--+---+--I
_'" r I I I I I I
-15
-10
-5
o
5
10
15
: 1111111!!~+)11111111111
1k
~
~
10k
lOOk
1M
f - Frequency (Hz)
VANALOG - Analog Voltage (V)
Input Switching Theshold
+ and V-Supply Voltages
VS. V
2.5
r-----.----~--'-.o....!.-.....-''-----......,
2.0
f-----l-----1-~
1.5
1.0 f - - - 4
0.5 f - - - + - - - - - 1 - - - + - - - - I
OL---..I..---.....I...----1----I
o
±10
±15
±20
±5
V+. V- Positive and Negative Supplies (V)
1-158
P-32167-Rev. C (11/15/93)
Silicanix
DG421/423/425
A Member of the TBMIC Group
Schematic Diagram (1Ypical Channel)
V+
r---r----t"--;--t--o
S
INX
Level
Shift!
Drive
Latch
.....- - t - -......---t--o D
VFigure 1.
Test Circuits
+5V
+15V
3V
Vo
Logic
Input
OV
Switch
Input·
Vs
50%
Switch
Output
OV
Switch
Input·
-Vs
tr <20ns
tf <20ns
Vo
CL (includes fIXture and stray capacitance)
VO=Vs
·Vs = 10Vfor tON, Vs = -10 V for tOFF
RL + IDS(on)
Note: Logic input waveform is inverted for switches that
have the opposite logic sense control
Figure 2.
P·32167-Rev. C (11/15/93)
Switching Tune
1-159
Siliconix
DG421/423/425
AMember of the TBMIC Group
Test Circuits (Cont'd)
+5V
+l5V
Logic
Input
lOV
lOV
V+
VL
Sl
VOl
Switch 1
Output
I
.J
-
VOl
V02
D2
V-
50%
OV
Dl
S2
3VJ 1-
RL2~CL2 -=- -
OV
RLl;GCLl
3000 35pF
Switch 2
Output
3000 35 pF
CL (includes fIXture and stray capacitance)
-
Figure 3. Break-Before-Make
+5V
+15 V
Rg
Va
CL
IlonF
Figure 4.
+5V
Va - - - - /
IN-----,.
On
On
Off
Charge Injection
+l5V
+5V
+l5V
Va
-=- -=XTALK Isolation = 20 log
I~~ I
-l5V
Off Isolation = 20 log
I~~ I
C = RFbypass
Figure S.
1-160
Crosstalk
Figure 6.
Off Isolation
P-32l67-Rev. C (11/15/93)
Siliconix
DG421/423/425
AMember ofthe TeMIC Group
Test Circuits (Cont'd)
+5V
+15V
3:
E
--A
f
3V _ _ _ _ t
INx
Meter
HP4192A
Impedance
Analyzer
or EqUivalent
0------"
3V
O~
RS
r;:==
Switch
Output
Figure 7.
ww
~
two
20%
k=
80%
..~
Vo-------------=-I~
80%
- --
0
SourceIDrain Capacitances
Figure 8.
Latch Tuning
Applications
Figure 9 shows a circuit configured to increase the effective
resolution of the 12-bit DAC to 13 bits. The circuit operates
with a sign plus magnitude code. A sign bit of "0" connects
R3 to GND, giving 12-bit resolution per quadrant.
R2
RS
20kn
CL
20 kn
33pF
DG423
VREF
Analog Common
Sign Bit
12-Bit Plus Sign Magnitude Code Table
Digital Input
Sign
Bit
MSB
0
1111
1111
0
0000
1
0000
1
1111
Figure 9.
P-32167-Rev. C (11/15/93)
Analog Output
LSB
(Your)
1111
+(4095/4096)VIN
0000
0000
OVol1s
0000
0000
OVol1s
1111
1111
+(4095/4096)VIN
12-Bit PIuS Sign Magnitude D/A Converter
1-161
Siliconix
DG421/423/425
AMember of the TBMIC Group
Applications
When switch 81 of Figure 10 is closed, the op amp is placed
in the familiar unity-gain non-inverting configuration.
When switch 82 is closed and 81 is open the gain is given by:
The microprocessor system WR must gate the decoder
output to ensure proper timing.
Av = 1 + RI
Rz
+5V
Address
Decoder
74HC138
VoUT
+15V
-15V
Figure 10. Bus-Controlled Precision Gain-Ranging Circuit
Figure 11 shows a balanced-line microphone input stage
that provides selection or summing between two
balanced-line microphones
and
also
performs
differential-to-single-ended conversion. Either MIC A or
MIC B can be selected, and neither and/or both may be
summed at the output. This configuration uses "virtual
ground" switching, a method which minimizes distortion
resuiting from the anaiog swhch on-resisianoo muuuiatiull.
The actual voltage swings experienced by the analog switch
barely exceed 1 V for a 15-V full-scale range input.
500Q
~c~
A
+
500Q
>--'---0 Your
500Q
Do
wc~
B
+
500Q
DG42S
500Q
DI
Output
Dl
D2
0
0
None
0
1
MICA
1
0
500Q
MICB
MICAandMICB
Figure 11_ Bus-Controlled Selector for Balanced-Line Microphones
1-162
P-32167-Rev. C (11/15/93)
Siliconix
DG441/442
A Member of the 1BMlc Group
Quad SPST CMOS Analog Switches
Features
Benefits
Applications
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Low On-Resistance: 50 Q
Low Leakage: 80 pA
Low Power Consumption: 0.2 mW
Fast Switching Action-toN: 150 ns
Low Charge Injection-Q: -1 pC
DG201A!DG202 Upgrades
TIL/CMOS-Compatible Logic
Single Supply Capability
Less Signal Errors and Distortion
Reduced Power Supply Requirements
Faster Throughput
Improved Reliability
Reduced Pedestal Errors
Simplifies Retrofit
Simple Interfacing
Audio Switching
Battery Powered Systems
Data Acquisition
Hi-ReI Systems
Sample-and-Hold Circuits
Communication Systems
Automatic Test Equipment
Medical Instruments
Description
The DG441/442 monolithic quad analog switches are
designed to provide high speed, low error switching of
analog and audio signals. The DG441 has a normally closed
function. The DG442 has a normally open function.
Combining low on-resistance (50 Q, typ.) with high speed
(tON 150 ns, typ.), the DG441/442 are ideally suited for
upgrading DG201N202 sockets. Charge injection has been
minimized on the drain for use in sample-and-hold circuits.
To achieve high voltage ratings and superior switching
performance, the DG441/442 are built on Siliconix's
high-voltage silicon-gate process. An epitaxial layer
prevents latchup.
Each switch conducts equally well in both directions when
on, and blocks input voltages to the supply levels when off.
Functional Block Diagram and Pin Configuration
DG441
DG441
..
Dual-In-Line and sOle
LCC
IN!
IN2
D!
D2
D! IN! NC IN2 D2
~
Sl
Sl
S2
v-
v+
v-
v+
NC
NC
GND
NC
GND
NC
S4
S3
D4
D3
IN4
IN3
S4
S3
D4 IN4 NC IN3 D3
ThpView
ThpView
P-32167-Rev. E (11/15/93)
1-163
Siliconix
DG441/442
AMember ofthe TBMIC Group
Ordering Information and Truth Table
Ordering Information
'ThmpRange
lruthThble
Logic
00441
OG442
DG44IDJ
0
ON
OFF
DG442DJ
1
OFF
ON
Part Number
Package
16-Pin Plastic DIP
-40 to 85'C
16-Pin Narrow SOIC
DG44IDY
Logic "0" oS 0.8 V
Logic "1" '" 2.4 V
Switches Shown for DG441 Logic "1" Input
DG442DY
DG441AK
DG441AK/883
5962-9204101MEA
16-Pin CerDIP
DG442AK
-55 to 12S'C
DG442AK/883
5962-9204102MEA
5962-9204101M2A
LCC-20
5962-9204102M2A
Absolute Maximum Ratings
V+toV- ........................................... 44V
GNDtoV- .......................................... 2SV
DigitalInputsaVs.Vo ............... (V-)-2Vto(V+)+2V
or 30 rnA, whichever occurs first
Continuous Current (Any Thrminal) .................... 30 rnA
Current, S or D (Pulsed 1 ms. 10% duty cycle) ........... 100 rnA
Storage Thmperature
(AK SuffIX) ............ -65 to 150'C
(Dj, DY SuiiIx) ....... .. -u.) tu 125<'C
Power DisSipation (Package)b
16-Pin Plastic DIP" .....•........•.................. 450 mW
16-PinCerDIPd ...•...........•.•......•.........•. 900mW
16-PinNarrowBodySOIcd ................•...•..... 900mW
LCC-2od ....•..•........•........................ 1200 mW
Notes:
a. Signals on Sx, Dx. or INx exceeding V + or V-will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6 mWI'C above 75'C
d. Derate12mWI'Cabove2S'C
Specificationsa for Dual Supplies
ASuff"1X
-55 to 12S'C
Thst Conditions
Unless Otherwise Specified
Parameter
Symbol
I
D Suff"1X
-40 to 85'C
I
V+ =15V,V- = -15V
VIN = 2.4 V, 0.8 vi
Thmpb
Is = -lOrnA, Vo = :!:8.5V
V+ =13.5 V, V- = -13.5 V
Room
Full
50
Room
Full
±0.01
-0.5
-20
0.5
20
-0.5
-5
0.5
5
Room
Full
±0.01
-0.5
-20
0.5
20
-0.5
-5
0.5
5
Room
Full
±0.08
-0.5
-40
0.5
40
-0.5
-10
0.5
10
'Jypc
Mind
Mud
Mind
15
-15
Mud
Unit
15
V
85
100
g
Analog Switch
Analog Signal Range"
Drain-Source
On-Resistance
roS(on)
IS(off)
Switch Off Leakage Current
V+ = 16.5. V- = -16.5 V
Vo = ±15.5 V, Vs = 'f15.5V
IO(of!)
Channel On
Leakage Current
1-164
IO(on)
-15
Full
VANALOG
V+
=16.5 V, V- = -16.5V
Vs =Vo = :!:15.5V
85
100
nA
P-32167-Rev. E (11/15/93)
Siliconix
DG441/442
AMcmbcr of the TeMIC Group
Specificationsa for Dual Supplies (Cont'd)
Test Conditions
Unless Otherwise Specified
ASu/I'tx
-55 to 125'C
I
DSu/I'tx
-40 to 85'C
I
Symbol
V+ = 15V,V- = -15V
VIN = 2.4 V, 0.8 yf
Tempb
'IYpc
Mind
Input Current VIN Low
IlL
VIN under test = 0.8 V
All Other = 2.4 V
Full
-0.01
Input Current VIN High
IIH
VIN under test = 2.4 V
All Other = 0.8 V
Full
0.01
Room
150
250
Room
90
120
120
Room
110
210
210
Room
-1
Room
60
Room
100
Parameter
Max d
Mind
Maxd
-500
500
-500
500
-500
500
-500
500
Unit
Digital Control
nA
Dynamic Characteristics
1I1rn-On Time
1I1rn-Off Time
tON
IDG441
IDG442
Charge Injectione
OffIsolatione
Crosstalk"
(Channel-to-Channel)
tOFF
Q
RL = 1 ill, CL = 35 pF
Vs = ±10 V, See Figure 2
CL=lnF, Vs=OV
Vgen=OV,Rgen=OQ
OIRR
XTALK
Source Off Capacitancec
CS(off)
Drain Off Capacitancec
CO(off)
Channel On Capacitancec
CO(on)
RL = 50 Q, CL = 5 pF
f= 1 MHz
f= 1 MHz
VANALOG = OV
Room
4
Room
4
Room
16
Full
15
250
ns
pC
dB
pF
Power Supplies
Positive Supply Current
Negative Supply Current
Ground Current
I+
1-
V+ = 16.5 V, V- = -16.5 V
VIN=00r5V
IGND
100
Room
Full
-0.0001
-1
-5
Full
-15
-100
100
-1
-5
-100
)1A
..
Specifications a for Single Supply
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
ASuftlx
-55 to 125'C
I
D Suftlx
-40 to 85'C
I
V+=12V,V-=OV
VIN = 2.4 V, 0.8 yf
Tempb
Is = -10 rnA, Vo = 3 V, 8 V
V+ = 10.8 V
Room
Full
100
RL = 1 ill, CL = 35 pF
Vs = 8 V, See Figure 2
Room
300
450
450
Room
60
200
200
Room
2
'IYPc
Mind
Maxd
Mind
12
0
Maxd
Unit
12
V
160
200
Q
Analog Switch
Analog Signal Rangee
Drain-Source
On-Resistance
Full
VANALOG
roS(on)
0
160
200
Dynamic Characteristics
1I1rn-On Time
tON
1I1rn-Off Time
toFF
Charge Injection
P-32167-Rev. E (11/15/93)
Q
CL=lnF,
Vgen=6Y,Rgen=OQ
ns
pC
1-165
Silicanix
DG441/442
AMcmbcrofthc1'BMICGrOUP
Speciticationsa for Single Supply3 (Cont'd)
Test Conditions
Unless Otherwise Specified
Parameter
ASuJrlX
-55 to 125°C
DSuJrlX
-40 to S5°C
I
V+ = 12 V, V- =OV
VIN = 2.4 V, O.S vf
Tempb
Fun
15
V+ = 16.5 v, V- = -16.SV
VIN = OorSV
Room
Full
-0.0001
-1
-100
-1
-100
Full
-15
-100
-100
Symbol
lYPc
Mind
Mud
I
Mind
Mud
Unit
Power Supplies
1+
Positive Supply Current
1-
Negative Supply Current
Ground Current
IGND
100
100
J.lA.
Notes:
a. Refer to PROCESS OPTION FLOWCHARr (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25°C, Full = as determined by the operating temperature suffIX.
c. lYpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
1)pical Characteristics
~
1"))S(on) vs. Vo and Temperature
100
~
OJ
OJ
~
~
j
j
80
.!!l
~
~
...'"=
..
0
~
60
Cl
~
.2
-5
0
5
10
15
20
V~ = 15VI V- = -15V
---- r--- .--.
----- l-r-- I
...".
...............
SO
40
Q
I
20
II
-20 -15 -10
60
jO
!
J
70
-r
.~
Q
I
so
......
r
I
200
150
100
so
o
I
J
,...
-
V~ =~V
1\
O°C
-.iooe
10
-55°C
I
I
-10
-5
-
I
o
5
10
15
rns(on) vs. VD and Temperature
(Single lZ-V Supply)
I
J+=lsv
-
~~V 12V
r-
15V
rv
4
8
12
Vo - Drain Voltage (V)
1-166
::;:::::::
~ r"\SV
~~
o
25°C
Vo - Drain Voltage (V)
1"))S(oo) vs. Vo and
Unipolar Power Supply Voltage
250
-'"
85°C
-..;;:~
Vo - Drain Voltage (V)
300
r--~
~-
0
-15
125°e
16
20
2
4
6
8
10
12
Vo - Drain Voltage (V)
P-32167-Rev. E (11/15/93)
Siliconix
DG441/442
A Memoor oflbe TBMIC Group
1YPical Characteristics (Cont'd)
Crosstalk and 011' Isolation vs. Frequency
140
-........
"
120
100
40
"" '"
80
60
Charge Injection vs. Source Voltage
50
~osstalk
'"
30
~
V+ = 15V
20 r-- V- = -15V
Ref.l0dBm
,e,
1k
10k
lOOk
-10
o
-5
5
10
VS - Source Voltage (V)
f - Frequency (Hz)
Switching Threshold vs. Supply Voltage
2.4
- - V+=12V
V- =OV
./
1-
-30
-10
10M
1M
",
",
/
....
'
./
i"""
0
-20
./
./
10
0
o
100
V+ = 15V
V-=-15V
20
U'
OffIsolati~
40
J
CL = 1 nF
Source/Drain Leakage Currents
20
I
I
-
IS(ol1 .IO(o!f)
0
1.6
~
~
/::'. :.;.; J:
: :.,
.. ..
<'
,e,
:~;. ,::'
~
L/
0.8 ioI'F---l--t--t--+--+---I--t--J
".
-20
/
-40
10(Y
....'"
-60
-80
o
I-""
V'"
V
V+ = 15V
V- = -15V
ForI(o!f).VD= -Vs
-100
o
±10
±5
±15
-15
±20
V+. V- Positive and Negative Supplies (V)
~
i"'"
-10
-5
o
5
10
15
..
Vo or Vs - Drain or Source Voltage (V)
Source/Drain Leakage Currents
(Single 12-V Supply)
10
I
I
IS(o!f).IO(of
0
<'
,e,
-10
IS(on
~
....'"
-20
-30
V
.""
+ I:,"V
-
V
V+ = 12V
V- =OV
For 10. Vs = 0
For Is. Vo = 0
-40
o
V
V
2
4
6
I
I
8
10
Vo or Vs - Drain or Source Voltage (V)
P-32167-Rev. E (11/15/93)
12
V - - Negative Supply (V)
1-167
Siliconix
DG441/442
A Member of the TBMIC Group
TYpical Characteristics (Cont'd)
Switching Time vs. Power Supply Voltage
160
--
140
r---
tON
120
80
Switching Time vs. Power Supply Voltage
500
~-Jv
400
.........
~ ~ON
300
.........
I,
..........
60
200
~OFF
.......... r--
-r--
-
100
40
toFF
20
o
±10
±12
±14
±16
±18
±20
±22
8
10
12
Supply Voltage (V)
14
16
18
20
22
Vs - Source Voltage (V)
Schematic Diagram (TYPical Channel)
V+O-~----~----------~----~---------4~-----------------------4~,
....--.....,p---_t"--i-+--OS
INX
o--r----"k~==l
V-
Level
Shift!
Drive
V+
Figure 1.
Test Circuits
+15 V
Logic
Input
3V
50%
V+
±lOV
S
OV
Vo
3V
Vs
Switch
Output
OV
Note:
Figure 2.
tOFF
Switch
Input
CL (includes fIxture and stray capacitance)
1-168
t, <20ns
tf <20ns
50%
Vo
80%
--
80%
Logic input waveform is inverted for DG442.
Switching Time
P·32167-Rev. E (l1f15193)
Siliconix
DG441/442
AMember aftha TaMIC Group
Test Circuits (Cont'd)
+15V
~________~ ~vo
Vo
V+
Vo
INX--~
ON
OFF
(DG441)
OFF
OFF
OFF
INx----/
(DG442)
Figure 3.
Charge Injection
c = 1 "F tantalum in parallel with 0.01 "F ceramic
+15V
C
+15V
~
c
+-----l~
v+
r=---------+-i---+-----S2
NCO-+------O~~--~~--~_o
0'1, 2.4 V
Vo
0-..,.I=N.;.,2'-1~>L-~;;;..--_,-...... C
-15V
~
XTALK Isolation =
20 log
C = RFhypass
Figure 4.
Offlsolation = 20 log
I~: I
Crosstalk
Figure 5.
I~: I
..
Off Isolation
+15V
C
V+
~
;---+-0.
Meter
HP4192A
Impedance
0'1,2.4 V
Analyzer
or EqUIvalent
-15V
Figure 6.
P-32167-Rev. E (11/15/93)
Source/Drain Capacitances
1-169
Silicanix
DG441/442
AMembcr olthc TBMIC;: Group
Applications
J+UV
+15V
RL
DG442 V+
p=3A
+15 V o---I-o-PL..+-.
~VN0300
IN
10 kr.I
+15V
VIN
+15 V
VOUT
_...1
IN 0 - - - - - - - ' -15V
0= LoadOCC
1 = Load On
Figure 7. Power MOSFET Driver
VIN
Figure 8.
...,..,[;»----.. . .-----0
o-~-_-:..-_-_-_-_-
!+15V
V+
H = Sample
L=Hold
Open Loop Sample-and-Hold
VOUT
Gain error is determined only by the resistor
tolerance. 00 amo offset and CMRR will
limit accuracY of circuit.
GAlNl
Av=l
With SW4 Closed
GAlN2
Av=lO
VOUT
VIN
Rl + R2 +R3 +R4
R4
= 100
GAlN3
Ay=20
GAlN4
Ay= 100
DG441 or DG442
-15V
Figure 9. Precision-Weighted Resistor Programmable-Gain Amplifier
1-170
P-32167-Rev. E (11/15/93)
Siliconix
DG444/445
A Member of the TeMIC Group
Quad SPST CMOS Analog Switches
Features
•
•
•
•
•
•
•
Low On-Resistance: 50 g
Low Leakage: 80 pA
Low Power Consumption: 22 n W
Fast Switching Action-toN: 120 ns
Low Charge Injection
DG211/DG212 Upgrades
TIL/CMOS Logic Compatible
Benefits
Applications
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Low Signal Errors and Distortion
Reduced Power Supply Requirements
Faster Throughput
hnproved Reliability
Reduced Pedestal Errors
Simple Interfacing
Audio Switching
Battery Powered Systems
Data Acquisition
Sample-and-Hold Circuits
Telecommunication Systems
Automatic Test Equipment
Single Supply Circuits
Hard Disk Drives
Description
The DG444/DG445 monolithic quad analog switches are To achieve high-voltage ratings and superior switching
designed to provide high speed, low error switching of performance, the DG444/DG445 are built on Siliconix's
analog signals. The DG444 has a normally closed function. high-voltage silicon-gate process. An epitaxial layer
The DG445 has a normally open function. Combining low prevents latchup.
power (22 nW, typ) with high speed (tON: 120 ns, typ),
the DG444/DG445 are ideally suited for upgrading
DG211/212 sockets. Charge injection has been minimized Each switch conducts equally well in both directions when
on the drain for use in sample-and-hold circuits.
on, and blocks input voltages to the supply levels when off.
Functional Block Diagram and Pin Configuration
DG444
Dual-In-Line and SOIC
'D:uth Thble
INl
IN2
Dl
D2
Sl
~
Logic
00444
00445
0
ON
OFF
OFF
ON
1
-
Logic ''0'' s 0.8 V, Logic "1" 2: 2.4 V
Switches Shown for DG444 Logic "1" Input
v-
v+
GND
VL
Ordering Information
S4
S3
D4
D3
IN4
IN3
Temp Range
Package
Part Nwnber
DG444DJ
16-Pin Plastic DIP
-40·C to 8S·C
16-Pin Narrow sOle
DG44SDJ
DG444DY
DG44SDY
ThpView
P-32167-Rev. D (11/1S93)
1-171
Siliconix
DG444/445
AMember of the TBMJC Group
Absolute Maximum Ratings
V+toV- ........................................... 44V
GNDtoV- ....................•..................... 25V
VL· .......................... (GND -0.3 V) to (V+) + 0.3 V
DigitalInputs·VS,VD ............... (V-)-2Vto(V+)+2V
or 30 rnA, whichever oCcurs first
Continuous Current (Any Thrminal) ............•....... 30 mA
Current, S or D (Pulsed 1 ms, 10% duty cycle) ........... 100 mA
Storage Thmperature . . . . . . . . . . . . . . . . . . . . . . . . . .. -65 to 125°C
Power Dissipation (Package)b
16-Pin Plastic DIP< ................................. 450 mW
16-PinNarrowBodySOIcd ...•..........•........... 600mW
Notes:
a. Signals on Sx, Ox, or INx exceeding V + or V-will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. AlI leads welded or soldered to PC Board.
c. Derate 6 mWrCabove 75°C
d. Derate 12 mW/oC above 75°C
Specifications for Dual Supplies
lest Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ = 15 V, V- = -15V
VL = 5V, VIN = 2.4 V,O.SV"
D Surra
-40toS5°C
Temp"
Mine
Fun
-15
IlYPb I Mar
Unit
Analog Switch
Analog Signal Ranged
Drain-Source On-Resistance
VANALOG
roS(on)
lS(off)
Switch Off Leakage Current
Is = -lOrnA, VD = ±S.5V
V+ = 13.5V,V- = -13.5 V
V+ = 16.5, V- = -16.5V
VD= ±15.5V,Vs= :;:15.5V
ID(ofl)
Room
Fun
15
V
50
S5
100
n
Room
Fun
-0.5
-5
:1:0.01
0.5
5
Room
Fun
-0.5
-5
:1:0.01
0.5
5
ID(on)
V+ = 16.5 V, V- = -16.5 V
Vs = VD = ±15.5V
Room
Fun
-0.5
-10
:1:0.08
0.5
10
Input Current VIN Low
In.
VIN under test = 0.8 V
All Other = 2.4 V
Fun
-500
-0.01
500
Input Current VIN High
1m
VIN under test = 2.4 V
All Other = O.S V
Fun
-500
0.01
500
Room
120
250
IDG441
Room
110
140
IDG442
Room
160
210
Room
-1
Channel On Leakage Current
nA
Digital Control
nA
Dynamic Characteristics
Then-On Tune
Thrn-Off TIme
Charge Injectione
tON
tOFF
Q
OffIsolatione
OIRR
Crosstalk (Channel-to-Channel)d
XTALK
CL=lnF, Vs=OV
Vgen = OV, Rgen = on
RL = 50n,CL = 5 pF,f= 1 MHz
Source Off Capacitance
CS(ofl)
Drain Off Capacitance
CD(ofl)
Channel On Capacitance
CD(on)
1-172
RL = 1 k&l, CL = 35 pF
Vs = ±10V, See Figure 2
f=IMHz
VANALOG=OV
Room
60
Room
100
Room
4
Room
4
Room
16
ns
pC
dB
pF
P-32167-Rev. D (11/1593)
Siliconix
DG444/445
AMcmber afthc TBMIC Group
Specifications for Dual Supplies (Cont'd)
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+=lSV,V-=-lSV
VL = S V, VIN = 2.4 V, O.B ve
DSutrlX
-40 to BS'C
Tempa
Minc
IlYPb I Mar
Unit
Power Supplies
Room
Full
Positive Supply Current
1+
Negative Supply Current
1-
Logic Supply Current
IL
Room
Full
IGND
Room
Full
Ground Current
V+ = 16.5 V, V- = -16.5 V
VIN=OorSV
Room
Full
0.001
-1
-S
-0.0001
0.001
-1
-S
1
S
1
S
"A
-0.001
Specifications for Unipolar Supplies
Test Conditions
Unless Otherwise Specified
Parameter
D SuffIX
-40 to BS'C
V+=12V,V-=OV
VL = S V, VIN = 2.4 V, O.B yo
Tempa
Minc
Full
0
Is = -lOrnA, VD = 3 V,B V
V+ = 1O.B V, VL = S.2S V
Room
Full
100
RL= 1 kQ,CL= 3SpF,Vs = BV
See Figure 2
Room
300
450
Room
60
200
Q
CL=lnF, Vgen=6V,Rgen=OQ
Room
2
1+
V+ = 13.2 V, VIN = Oar 5V
Room
Full
0.001
Symbol
IlYP I Mar
b
Unit
Analog Switch
Analog Signal Ranged
Drain-Source On-Resistanced
VANALOG
rns(on)
12
V
160
200
Q
Dynamic Characteristics
Thrn-On TIme
tON
Thrn-OffTIme
toFF
Charge Injection
ns
pC
Power Supplies
Positive Supply Current
Negative Supply Current
1-
VIN=00r5V
Room
Full
Logic Supply Current
IL
VL = S.2SV, VIN = 0 or 5V
Room
Full
IGND
VIN=00r5V
Room
Full
Ground Current
-1
-5
-0.0001
0.001
-1
-S
1
5
1
5
flA
-0.001
Notes:
a. Room = 2S'C, Full = as determined by the operating temperature suffIX.
b. 1Ypical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Guaranteed by design, not subject to production test.
e. VIN = input voltage to perform proper function.
P-32167-Rev. D (11/1593)
1-173
..
Siliconix
DG444/445
AMember of the TBMIC Group
lYPical Characteristics
1"])S(oo)
80
OJ
vs. VD and Temnperature
~
j
~..
60
....... .....
----...:--
0
~
40
rn
of!..
30
Cl
20
=
0
-120
--
-100
- ----
50
~-
25°C
Jo
~
[
-""
-10
50
-40
I
-20
o
-5
5
15
10
V+ = 15V
V-=-15V
Ref.10dBm
L -__- L____
100
1k
~
__
10k
~
____- L__
lOOk
~
1M
10M
VD - Drain Voltage (V)
f - Frequency (Hz)
Charge Injection vs. Source Voltage
Switching Threshold vs. Supply Voltage
t
J
40 I-- CL= 1nF
4
30
20
.e
-60
o
-15
U
-80
-40°C
I
10
~
85°C
oo~-
I
Crosstak and Off Isolation vs. Frequency
-140
V+I= 15V I
70 r-- V- = -15V
V+ = 15V
V- = -15V
10
I l/
0
0
.Yr-
-10
,;'
/
V
3
. /V
~
V+ =12V
--
_Jtllllvn I
-20
-10
-5
0
5
10
Vs - Source Voltage (V)
-20
I
I
IS(oft ,ID(off)
-
<'
.e
ID(on) ..,.
,El -40
.....'"
-60
-80
V
V
V"
-15
V
,., ..,. /
-10
-5
10
-
I
IS(off» ID(of
<'
.e
-10
IS(on
.....'" -20
I
I
I
o
5
10
VD or Vs - Drain or Source Voltage (V)
-30
-
I
0
,El
V+ =15V
V- = -15V
ForI(off» VD = -Vs
-100
1-174
Source/Drain Leakage Currents
(Single 12-V Supply)
Source/Drain Leakage Currents
20
0
± VSUPPLY (V)
/'
+I~V
,;'
"'"
V+ =12V
V-=OV
ForID, Vs = OV
ForIs, VD = 0 V
-40
15
o
V
V
2
4
6
-1
1
8
10
-
12
VD or Vs - Drain or Source Voltage (V)
P-32167-Rev. D (11/1593)
Siliconix
DG444/445
AMember of the TBM[C Group
'tYpical Characteristics (Cont'd)
50
160
~
~~
40
30
5V - CMOS
140
120
100
- v-
Switching Time vs. Power Supply Voltage
-
tON
_-;r
........
,-
..?
-- --~--
~--...:'
80 ~
tOFF,-
-
tON
60
~
40
DG444-
tOFF
DG445---
20
-10
-20
v- -
-30
-40
-50
:dO
±12
±14
Negative Supply (V)
±16
±18
±20
±22
± VSUPPLY (V)
500
Supply Current vs. Temperature
1001lA
10 IlA
400
lIlA
j
300
.£
10nA
.,J
1nA
.!.-
200
/' ~V
~~
100pA
V VIL
lOpA
12
v+
14
16
18
20
1pA
-55
22
V-
20
vi
I
",..... ~
-
~
-
, CS(off}> ,CD(Off) ,
-15
25
50
75
I
V- = -15V
100
125
..
-
tON
120
!:
5
V+~15V
140
,/
10
o
0
Switching Time vs. Input Voltage
160
~
CS(on) + CD(on)
15
-25
Thmperature (0C)
15
-15V
I
I
~V
- Positive Supply (V)
25 Source/Drain Capacitance vs. Analog Voltage
vJ ==
t--
./
/' ,? .......-(1-)
100
10
/
I+,IGND
100nA
100 ~
80
60
~ i'oo. tON
-- ~--- kf~:;- -I
40 I-
DG444DG445---
20
-10
-5
o
5
10
VANALOG - Analog Voltage (V)
P-32167-Rev. D (11/1593)
15
2
3
4
5
Input Voltage (V)
1-175
Siliconix
DG444/445
A Member of the TBMIC Group
Schematic Diagram (1YPical Channel)
V+o---~--------~----~--------~----------~------------------------~~
_--_-_--l-4---oS
VLevel
Shift!
Drive
V+
GNDo---~----------~-----------J
L----+----L---~--OD
V-o---+-------------------------~--------~----------------~--------~
Figure 1.
Test Circuits
+5 V,
+15V
3V
Logic,
Input
VL
±10V
.v
S
V+
D
I
-.l
~- I
GND
v-
b
50%
tr <20ns
If <20ns
OV
Vo
RL
1ll.!
I
CL
35pF
-L
-
-
Switch
Input
Vs
Vo
ov:t.!~
Switch
Output
-15V
Note:
CL (includes fIXture and stray capacitance)
Figure 2.
+5V
50%
- "-
80%
Logic input waveform is inverted for DG445.
Switching Tune
+15V
Vo
Vo
INX-------.
OFF
(DG444)
INX
OFF
ON
OFF
OFF
(DG445)
Figure 3.
1-176
Charge Injection
P-32167-Rev. D (llf1593)
Siliconix
DG444/445
AMember of the TBMIC Group
Test Circuits (Cont'd)
+5V
+15V
c = 1 "F tantalum in parallel with 0.01 "F ceramic
C
~
+5V
r------~r+--+_------<01
o-+------o~~--~~~~_o
+15V
...-----+-8I--t---o
Vo
-15V
OffIsolation = 20 log
XTALK Isolation = 20 log
C = RFbypass
1
VoS
V
Figure 4.
Vo
1
~~
1
1
Crosstalk
Figure S.
Off Isolation
Meter
oV; 2.4 V
HP4192A
Impedance
Analyzer
or EqUivalent
""--''-----'''--
f=lMHz
-15V
Figure 6.
Source/Drain Capacitances
III
Applications
+5V
+15V
+15V
+15 V
---+----~-----oVOUT~
10kQ
Figure 7. Level Shifter
P-32167-Rev. D (11/1593)
1-177
Siliconix
DG444/445
AMombcr oftheT'BMIc Group
Applications (Cont'd)
VIN 0 - - - - - - 1
VOUT
Gain error is determined only by the resistor
tolerance. Op amp offset and CMRR will
limit accuracy of circuit.
With SW4 Closed:
GAlN2
hJ=10
~
Rl+R2+R3+~
= 100
GAlN3
hJ=20
GAlN4
Av = 100
DG444 or DG445
-15V
Figure 8. Precision-Weighted Resistor Programmable-Gain Amplifier
+5V
+15V
Logic Input
-c~,,---+-----_-o Low = Sample
High = Hold
DG444
VOUT
Figure 9.
1-178
Precision Sample-and-Hold
P-32167-Rev. D (11/1593)
Siliconix
DG540/541/542
AMembcr oftbc TBMIC Group
WidebandNideo "T" Switches
Features
Benefits
Applications
Wide Bandwidth: 500 MHz
Low Crosstalk: -85 dB
High Off-Isolation: -80 dB @ 5 MHz
"Tn Switch Configuration
• TTL Logic Compatible
• Fast Switching-toN: 45 ns
• LOWl"DS(on): 30n
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Flat Frequency Response
High Color Fidelity
Low Insertion Loss
Improved System Performance
Reduced Board Space
Reduced Power Consumption
Improved Data Throughput
RF and Video Switching
RGB Switching
Local and Wide Area Networks
Video Routing
Fast Data Acquisition
• ATE
• Radar/FLR Systems
• Video Multiplexing
Description
The DG540/541/542 are high performance monolithic
wideband/video switches designed for switching RF, video
and digital signals. By utilizing a "T" switch configuration
on each channel, these devices achieve exceptionally low
crosstalk and high off-isolation. The crosstalk and
off-isolation of the DG540 are further improved by the
introduction of extra GND pins between signal pins.
To achieve TTL compatibility, low channel capacitances
and fast switching times, the DG540 family is built on the
Siliconix proprietary D/CMOS process. Each switch
conducts equally well in both directions when on.
Functional Block Diagrams and Pin Configurations
DG540
Dual-In·Line
IN1
IN2
D1
D2
GND
GND
~
Sl
GND
GND
GND
..
~
GND
S4
S3
GND
V+
GND
GND
S4
18
S3
v-
v+
v-
8
S3
GND
D4
D3
IN4
IN3
6'Z'7:Q~
....;;:;
t!l
'lbpView
'lbpView
Ordering Information - DGS40
Temp Range
-40 to 85·C
Package
Part Number
20-Pin Plastic DIP
DG540DJ
20-PinPLCC
DG540DN
DG540AP
-55 to 12S·C
20-Pin Sidebraze
DG540AP/883
1l:uth Thble
Logic
Switdt
o
OFF
ON
Logic "0" s 0.8 V
Logic "1" .. 2 V
Switches Shown for Logic "I" Input
P-32167-Rev. C (11/15/93)
1-179
Siliconix
DG540/541/542
AMcmber oftheTBMlC Group
Functional Block Diagrams and Pin Configurations (Cont'd)
DGS41
1ruth Table - DGS41
Dual-In-Line and SOIC
Logic
Switch
o
OFF
IN2
D2
ON
Logic "0" s 0.8 V
Logic"1" .,: 2 V
S2
V-
V+
GND
Switches Shown for Logic "1" Input
GND
Ordering Information - DGS41
-40 to 85'C
ThpView
DGS42
P~Number
Package
Temp Range
-55 to 125'C
16-Pin Plastic DIP
DG541DJ
16-Pin Narrow SOIC
DG541DY
DG541AP
16-Pin Sidebraze
DG541AP/883
1ruth Table - DGS42
Dual-In-Line and SOIC
,Logic.
SWl'SWZ
0
OFF
ON
1
ON
OFF
SW3tSW4
Logic ''0'' s 0.8 V
Logic "1" 2: 2 V
Switches ~hown for Logic "1" Input
Ordering Information - DGS42
Temp Range
-40 to 85'C
-55 to 125'C
P~Number
Package
16-Pin Plastic DIP
DG5420J
16-Pin Narrow SOIC
DG542DY
16-Pin Sidebraze
DG542AP
DG542AP/883
Absolute Maximum ,Ratings
V+ to V- , .................................. -03 Vto 21 V
V+toGND ................................. -0.3Vt021V
V- toGND ................................ -19Vto +0.3 V
Digitallnputs .....•.............. (V-) -O.3Vto(V+) +0.3 V
or 20 rnA, whichever occurs first
Vs, VD .......................... (V-) -0.3Vto(V-) +14 V
or 20 rnA, whichever occurs first
Continuous Current '(Any Thrminal) .................... 20 rnA
Current, S or D (Pulsed 1 ms, 10% duty cycle max) ..•..... 40 rnA
Storage Thmperature
(AP Suffix) . . . . . . . . . . . .. -65 to 150'C
(OJ, DN,.DY Suffixes) ... -65 to 125'C
1-180
Power Dissipation (Package)a
16-PinPlasticDlpb .................................
20-Pin Plastic DIP< ............•.......•............
16-PinNarrowBodySOIcd ..........................
20-PinpLCcd .....................................
16-, 20-Pin Sidebraze DIP< ...................... ; . . . .
470mW
800 mW
640mW
800mW
900 mW
Notes:
a. All leads welded or soldered to PC Board.
b.
c.
d.
e.
Derate 6.5 mWI'C"above 25'C
Derate7mW/'Cabove25'C
Derate10mWI'Cabove75'C
Derate 12 mWf'Cabove 75'C
P-32167-Rev. C (1lf15f93)
Siliconix
DG540/541/542
AMcmber altho TBMIC Group
Specifications a
A SuffIX
-55 to 125'C
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ = 15 V, V- = -3V
VINH = 2 V, VINL = 0.8
VANALOG
V- = -5V,V+ = 12V
vr
Tempb
'lYPc
Mind
I
D Suffixes
-40 to 85'C
Maxd
Mind
8
-5
I
Maxd
Unit
Analog Swit~h
Analog Signal Range
Drain-Source On-Resistance
rns(on) Match
rns(on)
Is = -lOrnA, VD = OV
drns(on)
-5
8
V
Room
Full
30
60
100
60
75
Q
Room
2
6
6
Full
Source orr Leakage Current
IS(off)
Vs=0V,VD=10V
Room
Full
-0.05
-10
-500
10
500
-10
-100
10
100
Drain orr Leakage Current
ID(off)
Vs = 10 V, VD = OV
Room
Full
-0.05
-10
-500
10
500
-10
-100
10
100
Channel On Leakage Current
ID(on)
VS=VD=OV
Room
Full
-0.05
-10
-1000
10
1000
-10
-100
10
100
nA
Digital Control
Input Voltage High
Input Voltage Low
VINH
Full
VINL
Full
2
2
0.8
0.8
-1
-20
1
20
-1
-20
lIN
VIN = GND orV+
Room
Full
0.05
On State Input Capacitance"
CS(on)
VS=VD=OV
Room
14
20
20
Off State Input Capacitance"
CS(off)
Vs=OV
Room
2
4
4
orr State Output Capacitance"
CD(off)
VD=OV
Room
2
4
4
BW
RL = 50 Q, See Figure 5
Input Current
1
20
V
(1A.
Dynaml~ Charaeteristl~s
Bandwidth
ThrnOnTIme
RL= 1 kQ,CL = 35pF
50% to 90%
See Figure 2
ThrnOrrTIme
Charge Injection
orr Isolation
All Hostile Crosstalk
P-32167-Rev. C (1lf15/93)
500
Room
Full
45
70
130
70
130
DG542
Room
Full
55
100
160
100
160
DG540
DG541
Room
Full
20
50
85
50
85
DG542
Room
Full
25
60
85
60
85
Room
-25
DG540
Room
-80
DG541
Room
-60
DG542
Room
-75
Roo1)1
-85
tOFF
Q
OIRR
XTALK(AH)
CL = 1000pF, Vs = OV
See Figure 3
RIN = 75 Q, RL = 75 Q
f = 5 MHz, See Figure 4
MHz
Room
DG540
DG541
tON
RIN = 10Q, RL = 7SQ
f = 5 MHz, See Figure 6
pF
os
pC
dB
1-181
..
Siliconix
DG540/541/542
AMember altho TBMIC Group
Specificationsa
Test Conditions
Unless Otherwise Specified
Parameter
V+ = 15 v, V- = -3V
VINH = 2 V, VINL = 0.8 Vi
Symbol
ASuff'1X
-55 to lZS·C
Tempb
lYPc
Room
Full
3.5
Room
Full
-3.2
Mind
D Suff'lXes
-40 to 8S·C
I
Max
o
12
10
-55 -25
0
25
50
75
100
125
-1
0
'Thmperature ('C)
-2
-3
-4
-5
-6
V - - Negative Supply (V)
Schematic Diagram (1Ypical Channel)
Figure 1.
Test Circuits
+15V
tr <20ns
tf <20ns
3V
V+
Va
Logic
Input
Switch
Input
Vs
Switch
Output
0
90%
tON
CL (includes fIXture and stray capacitance)
Vo=Vs
RL
RL + roS(on)
Figure 2.
1-184
Switching Tune
P-32167-Rev. C (11/15/93)
Siliconix
DG540/541/542
AMember of the TBMIC Group
Test Circuits (Cont'd)
+15 V
lNo
V+
I
Vo
s
Vo
CL
I1000 PF
1Nx ON
i
L
T
\
(ON
OFF
AVO = measured voltage error due to charge injection
The charge injection in coulombs is AQ = CLX AVo
Figure 3.
Charge Injection
+15 V
+15V
...c-
v+
Vo
C
V+
S
D
Vo
1
1
_I
Rg = Sag
Ov, 2.4 V
RL
sag
-
-3V
-3V
OffIsolation = 20 log
C = RFBypass
Figure 4.
Off Isolation
Figure 5.
Bandwidth
+15V
V+
S
109
2.4 V
Q-
D
Vo
RL
75g
1Nx
S2
D2
S3
D3
S4
D4
-
RL
RL
-
XrALK(AH) =
Figure 6.
P-32167-Rev. C (11/15/93)
Vour
20 loglO VIN
All Hostile Crosstalk
1-185
Silicanix
DG540/541/542
AMcmber ofthc TeMIC Group
Applications
Device Description
The DG540/541/542 family of wideband switches offers
true bidirectional switching of high frequency analog or
digital signals with minimum signal crosstalk, low insertion
loss, and negligible non-linearity distortion and group
delay.
Built on the Siliconix D/CMOS process, these "T" switches
provide excellent off-isolation with a bandwidth of around
500 MHz (350 MHz for DG541). Silicon-gate D/CMOS
processing also yields fast switching speeds.
An on-chip regulator circuit maintains TTL input
compatibility over the whole operating supply voltage
range, easing control logic interfacing.
Circuit layout is facilitated by the interchangeability of
source and drain terminals.
Frequency Response
A single switch on-channel exhibits both resistance
[rns(on)] and capacitance [CS(on»). This RC combination
has an attenuation effect on the analog signal - which is
frequency dependent (like an RC low-pass filter). The
- 3-dB bandwidth of the DG540 is typically 500 MHz (into
50 Q). This measured figure of 500 MHz illustrates that
....1.. _ _ ....: ......:1.. ...:1..... __ ... 1
........ __ ...... + 1..", ..", ................ _+ .... A t..". n
t.U.... "".I.L'-'ll "'UaU.LU...... .....a.J..I. .LI.UL U .....
......". ---I-.fO) Sync Out
75:.f. I
RGB Source Select
"="
I
~
V
10054l
I
-3V
Figure 9.
1-188
RGB Selector Using Two DG542s
P·32167-Rev. C (11/15/93)
Siliconix
DG601
A Member of the TEMIC Group
High-Speed Quad CMOS Analog Switch
Features
Benefits
Applications
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Fast Switching Action-tON: 30 ns
Low On-Resistance-rDS(on): 20 Q
Single-Supply Operation
Low Charge Injection
TIL and CMOS Logic Compatible
Improved Data Throughput
Reduced Switching Errors
Simplified Power Supply
Reduced Switching Transients
Simplified Interfacing
High Reliability
Hard Disk Drives
Fast Sample-and-Hold Circuits
Precision Instrumentation
Computer Peripherals
Low Noise Op Amp Gain Switching
High-ReI Systems
Description
The DG601 is a high performance quad SPST CMOS
analog switch intended for applications where fast
switching, low charge injection and low on-resistance are
required. The DG601 features single-supply operation,
and is TTL-compatible with either a single 12-V supply, a
single 5-V supply, or with ± 5-V supplies.
Applications for the DG601 include 12-V systems requiring
TTL or 5-V logic levels, such as disk drives and other
computer peripherals. The fast switching time and low
charge injection make the DG601 ideal for high speed data
acquisition applications such as sample and hold amplifiers,
channel selection and gain ranging.
The DG601 is built on the Siliconix proprietary PolyMOS
process, allowing low parasitic capacitance to facilitate high
speed switching.
Functional Block Diagram and Pin Configuration
LCC
Dual-In-Line and SOlC
D1 IN1 NC IN2 D2
IN1
IN2
D1
D2
Sj
S2
V-
V+
GND
NC
S4
S3
D4
D3
IN4
IN3
Sj
S2
V-
V+
NC
NC
GND
NC
..
S3
S4
D4 IN4 NC IN3 D3
Top View
Top View
1\"uth Table
Ordering Information
Temp Range
40 to 85'C
Package
Part Number
16-Pin Plastic DIP
DG60lDJ
16-Pin Narrow SOlC
DG60lDY
LQgic
0
Switch
ON
OFF
DG601AK
16-Pin CerDIP
-55 to 125'C
LCC-20
P-32167-Rev. C (11/15/93)
DG601AK/883
Logic "0" :S 0.8 V
Logic "1" ;;, 2.4 V
DG601AZ/883
Switches Shown for Logic "1" Input
1-189
Siliconix
DG601
AMombcr of tho TBMIC Group
Absolute Maximum Ratings
Voltages Referenced to vv+ ................................................. 22V
GND ............................................... 13V
Digital Inputs', Vs, Vo ........... (V-) -2Vto (V+) plus 2Vor
30 rnA, whichever occurs first
Current (any terminal) ............................... 30 mA
Current S or D (Pulsed 1 ms at 10% duty cycle) .......... 100 mA
Storage Thmperature
(AK, KZ Suffixes) . . . . . .. -65 to 150'C
(OJ, DY Suffixes) ....... -65 to 125'C
Power Dissipation (Package)b
16-PinPlasticOJPC ................................. 470mW
16-PinSOIcd ...................................... 9OOmW
16-Pin CerDIPC .................................... 900 mW
LCC-20" ......................................... 1200mW
Notes:
a. Signals on Sx, Dx, or INx exceeding V + or V - will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. Ail leads welded or soldered to PC Board.
c. Derate 6.5 mW
above ZS'C
d. Derate7.7mWrCaboveZS'C
e. Derate 12 mW/'C above 75'C
rc
Speciticationsa for Single 12-V Supply
ASuOlx
-55 to1ZS'C
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+=12v,V-=OV
VIN = 2.4 V, 0.8
vr
Tempb
'IYPc
Mind
I
D Suff"1X
-40 to 85'C
Mud
Mind
12
0
I
Mud
Unit
12
V
Analog Switch
Analog Signal Rangee
Drain-Source On-Resistance
On-Resistance Matchingg
Full
roS(on)
Room
Full
20
35
50
Room
Full
2.2
6
10
Room
Full
±0.01
-4
-100
4
100
-4
-100
4
100
Room
Full
±0.01
-4
-100
4
100
-4
-100
4
100
Room
Full
±0.1
-4
-200
4
200
-4
-200
4
200
V+ = 10.8'1, IS = 10mA
Vo = 2'1, 10V
ilroS(on)
lS(off)
Switch Off Leakage Current
IO(off)
Channel On Leakage Current
0
VANALOG
IO(on)
V+ = 13.2'1, V- = OV
Vo = 12.2 V, 1 V
Vs = 1 V, 12.2V
V+=13.2v,V-=OV
Vs, VD = 1 V, 12.2 V
6
10
n
nA
Digital ContNI
Input Current with VIN Low
VIN Under lest = 0 V
Input Current with VIN High
VIN Under lest = 5 V
Dynamic Characteristics
Thrn-On Time
tON
30
45
45
tOFF
RL = 3oon, CL = 35 pF
See Figure 2
Room
Thrn-Off Time
Room
14
30
30
Q
CL = 1,000pF, VYjin = 6 V
Rgen = 0 n, See igure 3
Room
13
RL= 50n,CL= 5pF
f=lMHz
Room
69
Room
88
Room
8
Charge Injection
Off Isolation Reject Ratio
OIRR
Crosstalk
XTALK
Source Off Capacitance
CS(of!)
Drain Off Capacitance
Channel On Capacitance
CO(of!)
f= 1 MHz, Vs = 6V
CD(on)
Room
8
Room
20
Room
Full
2.2
Room
Full
-2.1
ns
pC
dB
pF
Power Supplies
Positive Supply Current
1+
Negative Supply Current
1-
1-190
V+ = 13.2'1, V- =OV
VIN=OVor5V
4
6
-4
-6
4
6
-4
-6
mA
P-32167-Rev. C (11/15193)
Siliconix
DG601
A Member of the TEMIC Group
Specifications a for Dual Supplies
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ = SV,V- = -SV
VIN = 2.4 V, O.S yf
A Suffix
-55 to 12S'C
Tempb
l)'pc
Mind
I
DSuffix
-40 toSS'C
Maxd
Mind
5
-5
I
Maxd
Unit
5
V
Analog Switch
Analog Signal Rangee
Drain-Source On-Resistance
On-Resistance Matchingg
-5
VANALOG
Full
roS(on)
Room
Full
27
40
60
40
60
Room
Full
2
6
10
6
10
V+ = 4.5 V, V- = -4.5 V
Is = -10 mA, VD = ±3.5V
lIrDS(on)
Room
0.01
Room
0,01
ID(on)
V+ -5.5V,V- -5.5V
Vs=VD=±4.5V
Room
0.1
Input Current with VIN Low
IlL
VIN Under Test = 0 V
All Other = 5 V
Room
-10
Input Current with VIN High
IIH
VIN Under'Thst - 5 V
All Other = 0 V
Room
10
Room
34
Room
20
Room
11
Switch orr Leakage Current
Channel On Leakage Current
lS(off)
ID(off)
V+ = 5.5 V, V- = -5.5 V
VD = '1'4.5 V, Vs = ±4.5 V
0
nA
Digital Control
pA
Dynamic Characteristics
Thm-On TIme
tON
Thm-OffTIme
tOFF
RL = 3000, CL = 35 pF
See Figure 2
Q
Vgen - 0 V, Rgen - 00
CL = 1 nF, See Figure 3
Charge Injection
Source Orf Capacitance
CS(off)
Drain Off Capacitance
CD(off)
Channel On Capacitance
CD(on)
f = 1 MHz, Vs = 0 V
Room
8
Room
8
Room
21
ns
pC
pF
Power Supplies
Positive Supply Current
V+ = 5.5 V, V- = -5.5V
VIN = OVorSV
Negative Supply Current
rnA
..
Specifications a for Single 5-V Supply
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ =5V,V- =OV
VIN = 2.4 V, 0.8 yf
ASu01x
-55 to 125'C
Tempb
l)'pc
Mind
I
DSufrlX
-40 to 85'C
Maxd
Mind
5
0
I
Maxd
Unit
5
V
Analog Switch
Analog Signal Rangee
Drain-Source On-Resistance
On-Resistance Matchingg
VANALOG
Full
roS(on)
Room
Full
50
100
140
100
140
Room
Full
2
10
15
10
15
IS(off)
V+=5.5V
VD = 1 V, Vs = 4.5 V
Room
±0.01
ID(off)
V+-5.5V
VD=4.SV,Vs=lV
Room
±0.01
ID(on)
Vs
Room
±0.1
Switch Off Leakage Current
Channel On Leakage Current
P-32167-Rev. C (11/15/93)
V + = 4.5 V, Is = -10 rnA
VD = 2 V, 3.5 V
AroS(on)
0
V+ - 5.5 V
= VD = 4.5 V, 1 V
0
nA
1-191
Siliconix
DG601
AMember of the TBMICGroup
Specifications a for Single 5-V Supply (Cont'd)
Test Conditions
Unless Otherwise Specified
Parameter
V+ =SV,V-= -SV
VIN = 2.4 V, 0.8 vI
Symbol
ASuff"1X
-ss to 125'C
Tempb
lYPc
Mind
I
Maxd
D Suffix
-40 to 8S'C
Mind
I
Maxd
Unit
Digital Control
Input Current with VIN Low
VINUnderThst = OV
Input Current with VIN High
VIN Under Thst - S V
pA
Dynamic Characteristics
Thrn-OnTIme
toN
Thrn-OffTIme
tOFF
Charge Injection
RL = 300n, CL = 3S pF
See Figure 2
~en - 2.5 V, Rgen = 0 n
Q
L = 1 nF, See Figure 3
Source Off Capacitance
CS(olf)
Drain Off Capacitance
CD(olf)
Channel On Capacitance
CD(on)
f= 1 MHz, Vs = 2.5 V
Room
32
Room
25
Room
6
Room
8
Room
8
Room
22
ns
pC
pF
Power Supplies
Positive Supply Current
rnA
V+ = S.5V, VIN = OVorSV
Negative Supply Current
Notes:
Refer to PROCESS OPTION FLOWCHARr (Section S of the 1994 Data Book or FaxBack number 7103).
Room = 25'C, Full = as determined by the operating temperature suffIX.
lYpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
The a)gebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
Guaranteed by design, not subject to production test.
VIN = input voltage to perform proper function.
II.rnS(cn) compares on-resistance at the specified VD values.
a.
b.
c.
d.
e.
f.
g.
'tYpical Characteristics
Supply Current vs. Switching Frequency
16
12
8
1
J
-40'C - + - - {
o
I
o
2
4
6
8
VD - Drain Voltage.{V}
1-192
4
1+
0
"'"
11111
11111
-4
1-
-8
1111111
V+ =12V
V-=OV
All Switches Thggling
111111111 111111111
-12
-16
10
12
i'"
1k
10k
1M
lOOk
10M
f - Frequency (Hz)
P-32167-Rev. C (l1/1S/93)
Siliconix
DG601
AMember ofthe 'Il!MlC Group
lYpical Characteristics (Cont'd)
Leakage Current vs. Temperature
lOOnA
10nA
== V+
12V
Ov,
VANALOG IV
-v
§
./
./
InA
"
~ IOOpA
(3
./
g
40
..
30
~
20
F<
~
10(on)
.'1
lOpA
IpA
./
f- ~
40
80
o
CO~
20
15
10
r
..-""
~
1\...,
-20
I"'---
....
CO(off). CS(of
<'
.e:
!
4
6
8
10
./
12
Off·lsolation and Crosstalk vs. Frequency
t'--r-
80
~
Off-Isolation
........
/
o
60
o
6
I
I
8
10
12
2.4 -V-=OV
€
g"
2.0
t'-I"r-
~
-=a.
1.6
.s
V+ =12V
V- =OV
RL=50Q
1.2
,....-:
"
0.8
JV~~IVprJ
lk
4
2
1 .1
I
40
20 -
V+ = 12V
V-=OV -
Switching Threshold vs.
Unipolar Power Supply Voltage
2.8
Ig!~sst~IJ
...........
Is +O(on)
VANALOG - Analog Voltage (V)
120
IIIII
'"
/
'I
VANALOG - Analog Voltage (V)
100
~
./
",
-120
-180
2
./
-100
-160
o
./
./
-80
-
I
-60
-140
o
.....:-r
I
10(off).IS(off)
-40
-
V
120
80
Leakage Current vs. Analog Voltage
20
~
I.
40
Temperature (0C)
Capacitance vs. Analog Voltage
V+ 12V
25 f-V-=OV
-
o
-55-40
120
Temperature (0C)
30
./
IOFF
o
O.IpA
o
~
ION
,....-
I-'
10
1/ 10(off). lS(off)
-55-40
~+=12VI
50 I- V-=OV
Vs=2V
...
e
~~
Switching Time vs. Temperature
60
10k
0.4
lOOk
f - Frequency (Hz)
P-32167-Rev. C (11/15/93)
1M
10M
5
7
8
9
10
11
12
V + - Positive Supply (V)
1·193
Siliconix
DG601
AMemberoftho TBMIC Group
'IYPicaJ Characteristics (Cont'd)
Input Current vs. Input Voltage
30
~
V+ 12V
20 I- V- =OV
<'
~
I
'Ci
~
u"
4
0
/
'iii
"- -10
oS
~
V
~
-
r--.. 1-00..
3
~
10
Supply Currents vs. Temperature
5
2
1
~
"
U
V
~~
1
1-
-2
-5
-30
0
2
4
6
8
10
o
-55-40
12
Input Voltage (V)
~
28
24
36
j
32
~
24
~
20
..
16
~
12
~I
8
J
o
2
4
6
8
8
4
-5 -4 -3 -2 -1
10
!
40
F"
30
~
:ag
~
4
to.:,.... ~
~
I20
r10
~
----------- -------
o
-55-40
tOFF
2
3
4
5
3
2
1
'Ci
"t:
a
Supply Currents vs. Temperature
r- ~+=5V
I
V- = -5V
r- ~
1+
-
I
0
-1
-2
-3
r-
-4
-5
o
40
Thmperature (0C)
1-194
5
=5~
V+
V- = -5V
Vs=2V
-
0
VD - Drain Voltage (V)
Switching Time vs. Temperature
50
vs. Vo and Temperature
12
Vs - Source Voltage (V)
60
120
80
28
..
0
16
0
rnS(on)
40
CI
.l!l
20
~
40
Thmperature (0C)
32
U
- r---
------
0
-1
-3 I""
-4
-20
V+l12V V-=OV _
80
120
-55-40
o
80
40
120
Thmperature ("C)
P·32167-Rev. C (11/15/93)
Siliconix
DG601
AMcmbcr ofthc TBMIC Group
lYpical Characteristics (Cont'd)
80 r--._rn~S(~On~)_V_S·TV~D_aTn_d_1eTm~perr_m_urre__r-~
CI
~
g
70
50
50
§
40
!=
30
"
30
~
~
20
Q
.~'"
Q
g
"e
.."
20
I
J
r- _
60
~.
0
Switching Time vs. Temperature
60
~
V+=5~
V- =OV
Vs=2V
40
.."
f- ~
0
2
3
4
5
o
-55 -40
Vo - Drain Voltage (V)
2
1
I
U
0
"---
-1
i,..-
-2
V+l5V
16 --V=OV
14
-- I+
-3
-55 -40
o
10
8
~
40
/
//
./ /
12
---1-
120
Charge Injection vs. VS
18
IV+ =5V I
V-=OV
r--
80
40
Thmperature ("C)
Supply Currents vs. Temperature
3
-
tOFF
o
0
V
~
10
10
/"
--tON
6
4
CL=10n./
.......
...........
'-..
_.....
/
../'"
V
CL= 1n
2
3
2
o
80
120
Thmperature (0C)
o
4
5
Vs - Source Voltage (V)
Schematic Diagram (lYpical Channel)
V+
r---~----r-+--r--oS
..
GND
INX
L..----+----'----r--OD
VFigure 1
P-32167-Rev. C (11/15/93)
1-195
Siliconix
DG601
AMemberofthe TBMlC Group
Test Circuits
Logic
Input
V+
Vs = 2 V o-+-"S _ _-~
NCo-~--~~--~~~--o
I1nF
CL
Va
1 V; 4 V 0-+I:;.N",,2-1
XTALK Isolation = 20 log
-3V
C= RFbypass
Figure 3. Charge Injection
P·32167-Rev. C (11/15/93)
Figure 4. Crosstalk
1-205
..
Siliconix
DG611/612/613
A Member of the TBMIC Group
Applications
High-Speed Sample-and-Hold
In a fast sample-and-hold application, the analog switch
characteristics are critical. A fast switch reduces aperture
uncertainty. A low charge injection eliminates offset (step)
errors. A low leakage reduces droop errors. The SiS81, a
fast input buffer, helps to shorten acquisition and settling
times. A low leakage, low dielectric absorption hold
capacitor must be used. Polycarbonate, polystyrene and
polypropylene are good choices. The JFET output buffer
reduces droop due to its low input bias current. (See
FigureS.)
+SV
+12V
Output Buffer
D
Analog
Input
±5 V Output
toND
5 V Control o---f~IN'-!...f~
l'
V.DG611
--1-
CHOID
650 pF Polystyrene
Figure 5. High-Speed Sample-and-Hold
Pixel-Rate Switch
Windows, picture-in-picture, title overlays are
economically generated using a high-speed analog switch
such as the DG613. For this application the two video
sources mustbe synclocked. The giitch-iess anaiogswhciI
eliminates halos. (See Figure 6.)
+5V
+12V
Output Buffer
D
Background
Composite
Output
250Q
TItles
250Q
I
I
I
5 V Control o-+--H~.J
~DG613
-SV
Figure 6.
1-206
A Pixel-Rate Switch Creates TItle Overlays
P-32167-Rev. C (11/15/93)
Siliconix
DG611/612/613
AMember oftbeTBMlC Group
Applications (Cont'd)
GaAs FET Drivers
Figure 7 illustrates a high-speed GaAs FET driver. To turn
the GaAs PET on 0 V are applied to its gate via S1> whereas
to turn it off, -8 V are applied via S2. This high-speed,
low-power driver is especially suited for applications that
require a large number of RF switches, such as phased
array radars.
+5V
O!
-
RF
IN
GaAs
RF
OUT
I
IN!
.J
't2DG613
S2
5Vn
02
I
IN2
.J
GNO
V-
-8V
Figure 7.
A High-Speed GaAs PET Driver that Saves Power
III
P-32167-Rev. C (11/15/93)
1-207
Siliconix
DG641/642/643
AMember'ofthc TBMIC Group
Low On-Resistance WidebandNideo Switches
Features
Benefits'
Applications
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Wide Bandwidth: 500 MHz
Low Crosstalk at 5 MHz: -85 dB
Low rDS(on): 5 Q, DG642
T1LLogicCompatible
Fast Switching: tON 50 ns
Single Supply Compatibility
High Current: 100 rnA, DG642
High Precision
Improved Frequency Response
Low Insertion Loss
Improved System Performance
Reduced Board Space
Low Power Consumption
RF and Video Switching
RGB Switching
Video Routing
Cellular Communications
• AlE
• Radar!FUR Systems
• Satellite Receivers
• Programmable Filters
Description
The DG641/642/643 are high performance monolithic
video switches designed for switching wide bandwidth
analog and digital signals. DG641 is a quad SPST, DG642
is a single SPDT, and DG643 is .a dual SPDT function.
These devices have exceptionally low on-resistances (5 Q
typ-DG642), low capacitance and high current handling
capability.
To achieve TTL cpmpatibility, low channel capacitances
and fast switching times, the DG641!642/643 are built on
the SiliconiX proprietary D/CMOS process. Each switch
conducts equally well in both directions when on, and
blocks up to 14 V pop when off. An epitaxial layer prevents
latchup.
Functional Block Diagram and Pin Configuration
DG641
lruthThble
Dual-In-Line and SOIC
INl
IN2
Dl
D2
Sl
Sz
V-
S4
S3
D3
IN4
IN3
o
OFF
ON
Switches Shown for Logic "1" Input
GND
D4
Switch
Logic "0" :s; 0.8 V
Logic "1" .. 2.4 V
V+
GND
Logie
Ordering Information - DG641
Temp Range
-40 to 85°C
Pan Number
Package
16-Pin Plastic DIP
DG64IDJ
16-Pin Narrow SOIC
DG64IDY
ThpView
1-208
P-32167-Rev. C (11/15/93)
Siliconix
DG641/642/643
AMember oftbe TEMIC Group
Functional Block Diagram and Pin Configuration
DG642
Dual-In-Line and sorc
'fruth Table
Sl
IN
Logic
SWl
Dl
V+
0
OFF
ON
V-
D2
1
ON
OFF
GND
S2
SW2
Logic "0" s 0.8 V
Logic "1"
~
2.4 V
Switches Shawn for Logic "1" Input
ThpView
Ordering Information - DG642
Package
Temp Range
-40 to 85°C
DG643
Dual-In-Line and SOIC
GND
Part Number
8-Pin Plastic DIP
DG642DJ
8-Pin Narrow SOlC
DG642DY
'fruth Table
Logic
SW1,SWl
0
OFF
ON
1
ON
OFF
GND
SW3,SW4
Logic "0" s 0.8 V
Logic "1" '" 2.4 V
Switches Shown for Logic "1" Input
V-
Ordering Information - DG643
GND
GND
ThmpRange
-40 to 85°C
ThpView
Package
Part Number
16-Pin Plastic DIP
DG643DJ
16-Pin Narrow SOlC
DG643DY
Absolute Maximum Ratings
V+taV- .................................. -0.3Vta21 V
V+ to GND ................................. -0.3 Vta21 v
V- to GND ................................ -19 V to +0.3 V
Digital Inputs. . . . . . . . . . . . . .. . . . .. (V -) -0.3 V to (V+) +0.3 V
or 20 rnA, whichever occurs first
Vs,Vo .......................... (V-)-0.3Vta(V-)+14V
or 20 rnA, whichev~r occurs first
Continuous Current (Any Thrminal Except S or D) ........ 20 rnA
Continuous Current S or D: DG641{643 ................ 75 rnA
DG642 .................. 100 rnA
Current, S or D (Pulsed 1 ms, 10% duty cycle max)
DG641{643 ............... 200 rnA
DG642 .................. 300 rnA
P-32167-Rev. C (11/15/93)
Storage Thmperature . . . . . . . . . . . . . . . . . . . . . . . . . .. -65 to 125°C
Power Dissipation (Package)b
8-Pin Plastic DIP and Narrow SOlO' ................... 300 mW
16-Pin Plastic DIpd ................................ , 470 mW
16-PinNarrowSOIO' ............................... 600mW
Notes:
a. Signals on Sx, DX, or INx exceeding V+ or V-will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate 7.6 mwrc above 75°C
d. Derate 6 mwrc above 75°C
e. Derate 10 mW/"C above 75°C
1-209
Silicanix
DG641/642/643
AMcmber aftho TBMIC Group
Specifications for DG641 and DG643
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
Limits
-40 to8S·C
1
V+ = lS V, V- = -3V
VINH = 2.4 V, VINL = 0.8 yo
Temp"
Mine
V- = -SV,V+ =12V
Full
-S
8
V- =GND, V+ =12V
Full
0
8
l1YPb
Max"
Unit
Analog Switch
Analog Signal Ranged
Drain-Source On-Resistance
rnS(on) Match
VANALOG
rnS(on)
Is = -lOrnA, VD = OV
l1rns(on)
Room
Full
8
lS
20
Room
1
2
Source Off Leakage Current
lS(off)
Vs=0V,VD=10V
Room
Full
-10
-100
-0.02
10
100
Drain Orf Leakage Current
ID(off)
Vs = 10V,VD = OV
Room
Full
-10
-100
-0.02
10
100
Channel On Leakage Current
ID(on)
VS=VD=OV
Room
Full
-10
-100
-0.1
10
100
VINH
Full
2.4
VINL
Full
V
Q
nA
Digital Control
Input Voltage High
V
Input Voltage Low
-1
-20
O.OS
1
20
Room
10
20
Room
4
12
VD=OV
Room
4
12
RL - 50 Q, See Figure 6
Room
500
Room
Full
SO
70
140
Room
Full
28
SO
8S
lIN
VIN = GND orV+
Room
Full
On State Input Capacitanced
Cs(on)
VS=VD=OV
Off State Input Capacitanced
CS(off)
Vs=OV
Off State Output Capacitanced
CD(off)
BW
Input Current
0.8
IlA
Dynamic Characteristics
Bandwidth
Thrn On TIme
tON
Thrn Off TIme
toFF
RL = 1 ill, CL = 3S pF, See Figure 2
Charge Injection
Off Isolation
pF
MHz
ns
Q
CL = 1000 pF, VD - 0 V, See Figure 3
Room
-19
OIRR
RIN = 7SQ,RL= 7SQ,f=SMHz
See Figure 4
Room
-60
XTALK(AH)
RIN = 10Q,RL = 7S Q,f= SMHz
See Figure S
Room
-87
Room
Full
3.5
pC
dB
All Hostile Crosstalk
Power Supplies
Positive Supply Current
1+
Negative Supply Current
1-
6
9
rnA
VIN = OVorVIN =SV
Room
Full
-6
-9
-3
Notes:
a. Room = 2S·C, Full = as determined by the operating temperature suffIX.
1Ypical values are for DESIGN AID ONLY, aot guaranteed nor subject to production testing.
The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
Guaranteed by design, not subject to production test.
VIN = input voltage to perform proper function.
b.
c.
d.
e.
1-210
P-32167-Rev. C (11/15/93)
Siliconix
DG641/642/643
AMember of the TBMIC Group
Specifications for DG642
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
Limits
-40t08S'C
I
V+ = lSV,V- = -3V
VINH = 2.4 V, VINL = 0.8 ve
Temps
Mine
V- = -SV,V+ = 12V
Full
-5
8
V- = GND, V+ = 12V
Full
0
8
l1YPb
Max"
Unit
Analog Switch
Analog Signal Ranged
Drain-Source On-Resistance
f])S(on) Match
VANALOG
f])S(on)
Is = -lOrnA, Vo = OV
Af])S(on)
Room
Full
5
8
9
Room
0.5
1
Source Off Leakage Current
IS(o!1)
Vs = OV,Vo = 10V
Room
Full
-10
-200
-0.04
10
200
Drain Off Leakage Current
IO(o!1)
Vs = 10V,Vo = OV
Room
Full
-10
-200
-0.04
10
200
Channel On Leakage Current
IO(on)
Vs=Vo=OV
Room
Full
-10
-200
-0.2
10
200
2.4
V
g
nA
Digital Control
Input Voltage High
VINH
Full
Input Voltage Low
VINL
Full
0.8
-1
lIN
VIN = GND orV+
Room
Full
On State Input Capacitanced
CS(on)
Vs=Vo =OV
Room
19
40
Off State Input Capacitanced
CS(o!1)
Vs=OV
Room
8
20
Ofr State Output Capacitanced
CO(o!1)
Vo=OV
Room
8
20
BW
RL = SO g, See Figure 6
Room
500
Room
Full
60
100
160
Room
Full
40
60
100
CL = 1000 pF, Vo = 0 V, See Figure 3
Room
-40
RIN = 75 g, RL = 75 g, f= 5 MHz
See Figure 4
Room
-63
RIN = 109, RL = 75g,[ = 5 MHz
See Figure 5
Room
-85
Room
Full
3.5
Input Current
0.05
-20
1
20
V
!lA
Dynamic Characteristics
Bandwidth
ThrnOnTIme
tON
ThrnOffTIme
tOFF
RL = 1 ill, CL = 35 pF, See Figure 2
Charge Injection
Q
Ornsolation
All Hostile Crosstalk
XTALK(AH)
pF
MHz
ns
pC
dB
Power Supplies
Positive Supply Current
I+
VIN = OVorVIN = SV
Negative Supply Current
1-
Room
Full
-6
-9
6
9
-3
rnA
Notes:
a. Room = 2S'C, Full = as determined by the operating temperature suffIX.
b. 1»pical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Guaranteed by design, not subject to production test.
e. VIN = input voltage to perform proper function.
P-32167-Rev. C (11f15/93)
1-211
•
Siliconix
DG641/642/643
AMember of the TBMIC Group
1Ypical Characteristics
Supply Current vs. Temperature
~
5
1"--100..
4
~
3
"""
...
t:
0
U
-1
r- r- I--.
I-
-3
-4
i-""'"
-5 ~
J
./
100pA
~
i-- ~
10pA
.....-
/'
1pA
"... ~
-55 -35 -15 5
./
1nA
~
IGND
-2
/
10nA
1+
2
]:
Leakages vs. Thmperature
100nA
6
25
45
65
O.lpA
-55
85 105 125
-25
Temperature ('C)
e.
j
j
=
0
§
e.
j
V+ = 15V
V- = -3V
30
.i!\
125
9
11
V+ = 15V
'V-=-3V
15
~
=
20
§
r5l"
.~
0
Q
e
I
I
!
!
e
10
e
-3
-1
3
5
7
9
-1
11
VD - Drain Voltage (V)
3
On Capacitance
20
18
Off Isolation
-100
.\
\
-90
-80
~
\
14
"-
12
6
7
-110
16
10
5
VD - Drain Voltage (V)
22
1"-..
o
2
'~"
DG642
"i---
-70
-60
-50
-40
~G641/643
~ 100..
...... ;;:::~
DG6411643
~
ID~
......
-30
-20
-10
4
6
8
(VD) - (V-)
1-212
100
0
"
'"
.S
u
75
DG642
1»8(on) vs. Drain Voltage
20
0
~
50
25
Thmperature ('C)
DG6411643
1»8(00) vs. Drain Voltage
40
0
10
12
10
100
f - Frequency (MHz)
P-32167-Rev. C (11/15/93)
Silicanix
DG641/642/643
AMemoor oftbc TBMIC Group
lYpical Characteristics
110
100
All Hostile Crosstalk
~
90
~
Charge Injection vs. Vn
0
I
~ ....
...
f"-
.L1/6431.
-10
I
80
~
70
.e. -20 r....
G642'" ~
60
cLL 1JOOP~
IT
f"'=::::::
0
50
-
~
....... ~
DG641/643
-
40
-30
30
DG642
20
10
1
10
-40
-3
100
-2 -1
0
1
2
3
4
5
6
f - Frequency (MHz)
VD - Drain Voltage (V)
Switching Times vs. Temperature
Operating Supply Voltage Range
7
8
90
./
80
70
./
60
.e,
i'"
i'"
/
toN..;' "
50
./
40
30
./
- ~r
~
20
10
14 t----,.i---i' Operating
0: Voltage
I - - t - - - ; Area
t"""'"
10
-25
0
25
50
75
°
_0
t-
o
-55
".-"+--1-11-1
_!--1-i--J
100
125
:.::
~--~--~--~~--~--~~~
o
-1
Temperature (0C)
-2
-3
-4
-5
-6
V - - Negative Supply (V)
Schematic Diagram (lYpical Channel)
V+o-----~------~--------~~----
D
__
s
GND
IN
o-----t---l~-~=c>--_i .x>---I
D
V-o-----~------------~------~------~~
Figure 1.
P-32167-;-Rev. C (11/15/93)
1-213
Si6canix
DG641/642/643
AMember of the TBMIC Group
Test Circuits
+15 V
Ir <20ns
3V
V+
tf <20ns
Logic
Input
3V
Switch
o---I_J
Output
Figure 2. Switching Tune
+15V
t
I avo
Vo
V+
INx
ON
\
L
t
OFF
F
avo = measured voltage error due to charge injection
The charge injection in coulombs is Q = CL X aVo
Figure 3. Charge Injection
+l5V
~---~~-+----01·---+~~~~
-
Vo
-3V
Off Isolation = 20 log
I~: I
Figure 4. Off Isolation
1-214
P-32167-Rev: C (1l/1S/93)
Siliconix
DG641/642/643
A Member oftbe TEMIC Group
Test Circuits
DG642
VOUT
VOUT
RIN
100
Signal
Generator
750
-
"0"
(b)
VOUT
XTALK(AH) = 20
Figure S.
log10 -V
All Hostile Crosstalk - XTALK(AH)
Vom
Signal
Generator
500
Figure 6.
Bandwidth
Applications
Device Description
The DG641/642/643 switches offer true bidirectional
switching of high frequency analog or digital signals with
minimum signal crosstalk, low insertion loss, and negligible
non-linearity distortion and group delay.
Built on the Siliconix D/CMOS process, these switches
provide excellent off-isolation with a bandwidth of around
500 MHz. The silicon-gate D/CMOS processing also yields
fast switching speeds.
An on-chip regulator circuit maintains TIL input
compatibility over the whole operating supply voltage
range shown, easing control logic interfacing.
P-32167-Rev. C (11/15/93)
Circuit layout is facilitated by the interchangeability of
source and drain terminals.
Frequency Response
A single switch on-channel exhibits both resistance
[rOS(on)] and capacitance [CS(on)]' This RC combination
has an attenuation effect on the analog signal - which is
frequency dependent (like an RC low-pass filter). The
-3 dB bandwidth of the DG641/642j643 is typically
500 MHz (into 50 Q).
.
1-215
..
Siliconix
DG641/642/643
AMember ofthc TBMIC Group
Applications (Cont'd)
Power Supplies
Power supply flexibility is a useful feature of the
DG641/642/643 series. It can be operated from a single
positive supply (V +) if required (V - connected to
ground).
3. Capacitors should be of a suitable type with good high
frequency characteristics - tantalum bead and/or
ceramic disc types are adequate.
+15 V
+
Note that the analog signal must not exceed V-by more
than -0.3 V to prevent forward biasing the substrate p-n
junction. The use of a V-supply has a number of
advantages:
CII I
v+
SI
1. It allows flexibility in analog signal handling, i.e., with
V- = -5 V and V+ = 12Vj up to ±5-Vacsignalscan
be controlled.
2. The value of on capacitance [CS(on)] maybe reduced. A
property known as 'the body-effect' on the DMOS
switch devices causes various parametric effects to
occur. One of these effects is the reduction in CS(on) for
an increasing V body-source. Note however that to
increase V - normally requires V + to be reduced
(since V+ to V- = 21 V max.). A reduction in V+
causes an increase in rOS(on), hence a compromise has
to be achieved. It is also useful to note that tests
indicate that optimum video linearity performance
(e.g., differential phase and gain) occurs when V- is
around -3 V.
3. V - eliminates the need to bias the analog signal using
potential dividers and large coupling capacitors.
Decoupling
It is an established rf design practice to incorporate
C2
~
01
02
DG64X
S3
03
04
S4
V-
GNOs
CI = 10 "FThntalum
y = 0.1 "F Ceramic
-3V
Figure 7.
Supply Decoupling
Board Layout
PCB layout rules for good high frequency performance
must also be observed to achieve the performance boasted
by these analog switches. Some tips for minimizing stray
effects are:
1.
Use extensive ground planes on double sided PCB,
separating adjacent signal paths. Multilayer PCB is
even better.
sufficient bypass capacitors in the circuit to decouple the
power supplies to all active devices in the circuit. The
dynamic performance of the DG641/642/643 series is
adversely affected bypoor decoupling of power supply pins.
Also, of even more significance, since the substrate of the
device is connected to the negative supply, adequate
decoupling of this pin is essential. Suitable decoupling
capacitors are 1- to 10-!.lFtantalum bead, plus 10- to 100-nF
ceramic or polyester.
3. Careful arrangement of ground connections is also very
important. Star connected system grounds eliminate
signal current, flowing through ground path parasitic
resistance, from coupling between channels.
Rules:
Figure 8 shows a 4-channel video multiplexer using a
DG641.
1. De~upling capacitors should be incorporated on all
power supply pins (V +, V -). (See Figure 7).
2. They should be mounted as close as possible to the
device pins.
1-216
2. Keep signal paths as short as practically possible, with
all channel paths of near equal length.
In Figure 9, two coax cables terminated on 75 Q bring two
video signals to the DG642 switch. The two drains tied
together lower the on-state capacitance. An Si582 video
amplifier drives a double terminated 75-Q cable. The
double terminated coax cable eliminates line reflections.
P-32167-Rev. C (11/15/93)
Siliconix
DG641/642/643
AMember oftbe TBMIC Group
Applications (Cont'd)
+15 V
CHI
75Q
75Q
250Q
250Q
-3V
TTL Channel Select
Figure 8.
4 by 1 Video Multiplexing Using the DG641
+15 V
V+
CHI
VOUT
7SQ
DG642
-:- 75 Q
V-
250Q
TTL Channel Select
Figure 9.
-3V
2-Channel Video Selector Using the DG642
..
fc SELECT o-_--1I-I_N,::.2-l
S2
1/zDG643
CHI
CH2
CHSELECT
DI
RI
D
INI
..J
~------~--o VOUT
I/zDG643
1
fc=~
Figure 10. Active Low Pass Filter with Selectable Inputs and Break Frequencies
P-32167-Rev. C (11/15/93)
1-217
Siliconix
DG5043
AMember ofthe 'I'BMIC Group
Monolithic General Purpose CMOS Analog Switch
Features
Benefits
Applications
• ± 15-V Input Range
•
•
•
•
• Audio Switching
• Instrumentation
• Battery Powered Systems
• On-Resistance: <50 Q
• Break-Before-Make Switching
• TIL and CMOS Compatible
Improved Signal Headroom
Reduced Switching Errors
No Shorting of Inputs
Simple Interfacing
Description
The DG5043 solid state analog switch is recommended for
general purpose applications in instrumentation, and
process controL Built on the SiliconixPLUS-40 high voltage
CMOS process, this device provides ease-of-use and
performance advantages to the system designer_ Key
performance features of the DG5043 are l-/.Is switching,
low power supply requirements, and break-before-make
switching. Each switch conducts equally well in either
direction, when on, and blocks up to 30 V peak-to-peak
when off. Off leakage current is l-nA maximum. An
epitaxial layer prevents latch up. For new designs, DG403
is recommended.
Functional Block Diagram and Pin Configuration
Dual-In-Line
1ruth Table
D!
S!
NC
IN!
D3
V-
S3
GND
S4
VL
D4
V+
NC
IN2
Logic
SWl,SWZ
SW3 ,SW4
0
1
OFF
ON
ON
OFF
Logic "0" = :s 0.8 V
Logic "1" = ~ 2 V
Switches shown for Logic "1" input.
Ordering Information
Temp Range
Package
Part Number
oto 70·C
16-Pin Plastic DIP
DG5043CJ
Sz
D2
ThpView
Absolute Maximum Ratings
V+toV- ........................................... 44V
GNDtoV- .......................................... 25V
Power Dissipation (Package)b
16-PinPlasticDIPC ................................. 470mW
VL ................................. (GND - 0.3 V) to 44 V
Digital InputsaVs. Vn ............. (V-) -2 Vto (V+ plus 2V)
or 30 rnA, whichever occurs first
Curreut (Auy Thrminal) Coutinuous .................... 30 rnA
Current, S or D (Pulsed 1 ms 10% duty) ................ 100 rnA
Storage Thmperature . . . . . . . . . . . . . . . . . . . . . . . . . .. -65 to 125·C
1-218
P-32167-Rev. A (11/15/93)
Notes:
a. Signals on Sx. Dx. or INx exceeding V + or V-will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate6mWrCabove75·C
Not Recommended for New Designs
Siliconix
DG5043
A Member oftbe TBMIC Group
Specifications
Test Conditions
Unless Otherwise Specified
Parameter
CSutrIx
Oto70"C
V+ = 15 V, V- = -15V
VL = 5V, VIN = 2 V, 0.8 ve
Temp"
Mine
VANALOG
Full
-15
'OS(on)
Is = -lOrnA, Vo = ±10V
Room
Full
Symbol
IlYP I Max"
b
Unit
Analog Switch
Analog Signal Ranged
Drain-Source On-Resistance
Switch Off Leakage Current
Channel On Leakage Current
Vs=Vo = 14V
Room
Full
-1
-100
Vs=Vo = -14V
Room
Full
-100
Vs=Vo = 14V
Room
Full
Vs=Vo = -14V
Room
Full
IS(oll)
10(on)
15
V
50
75
n
1
100
-1
1
100
2
200
nA
-2
-200
Digital Control
Input Current with VIN Low
VIN Under Thst = 0.8 V
Input Current with VIN High
VIN Under Thst = 2 V
Dynamic Characteristics
Thrn-On TIme
tON
1200
tOFF
Vs = ±10V, RL = 1 ill, CL = 35 pF
See Figure 1
Room
Thrn-OffTIme
Room
700
Charge Injectiond
Q
CL = 10 nF, Vgen = Ov, Rgen = on
Room
30
Off Isolationd
OIRR
RL = 75 n, CL = 5 pF, f = 1 MHz
Room
75
Crosstalk (Channel-to-Channel)d
XTALK
RL= 75n, Vs = 2 Vp_Bf= 1 MHz
Room
89
Source Off Capacitance
CS(oll)
Room
15
Drain Off Capacitanced
CO(off)
Room
17
Channel On Capacitanced
CO(on)
Room
45
Vo = Vs = OV,f= 1 MHz
ns
pC
dB
pF
Power Supplies
Positive Supply Current
1+
Negative Supply Current
1-
Logic Supply Current
IL
Ground Current
Full
VIN = 00r2.4 V
VIN = o or 2.4 V
IGND
Full
300
-300
Full
Full
300
I1A
-300
Notes:
a. Room = 25"C, Full = as determined by the operating temperature suffIx.
b. lYpieal values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Guaranteed by design, not subject to production test.
e. VIN = input voltage to perform proper function.
Not Recommended for New Designs
P-32167-Rev. A (11/15193)
1-219
III
Siliconix
DG5043
AMember of the TBMIC Group
Test Circuits
+5V
+15V
Logic 3V
Input
Logic "0" = SW On
IN!
tr <20ns
tf <20ns
50%
tOFF ....
Switch
Output Vs
Switch
Output
0
CL (includes fIXture and stray capacitance)
tON
Figure 1.
+5V
+15V
VL
S
Rg
Va
CL
Il0nF
Vg
-
Va
P-32167-Rev. A (11/15/93)
,
I
INx
OFF \
ON
t
t
I!No
JOFF
Q=CLx AVo
Figure 2.
1-220
Switching Time
Charge Injection
Not Recommended for New Designs
Siliconix
DG5143
AMember of the TBMIC Group
Low-Power, High-Speed CMOS Analog Switch
Features
Benefits
Applications
• ± 15-V Input Range
•
•
•
•
•
•
•
•
•
• On-Resistance: 50 Q
• Fast Switching Action-toN: 100 ns
• LowPower-PD: <350 IlW
• TIL and CMOS Compatible
Improved Signal Headroom
Low Signal Errors
Break-Before-Make Switching Action
Reduced Power Consumption
Simple Interfacing
Audio Switching
Precision Switching
High-Speed Switching
Battery Powered Systems
Description
The DG5143 solid state analog switch is built on the
Siliconix proprietary high-voltage silicon gate process to
achieve high voltage rating and superior switch time onloff
performance.
Break-before-make switching action
guarantees that an on-channel will be turned off before the
off-channel can turn on. The DG5143 features ultra-low
power supply requirements and TTL and CMOS
compatibility.
Each switch conducts equally well in both directions when
on and blocks input voltages to the supply values when off.
This switch is ideal for battery powered industrial
applications with a maximum power supply current of lilA.
An expitaxiallayer prevents latchup.
Functional Block Diagram and Pin Configuration
Dual-In-Line
01
..
lruthTable
Logic
SWhSW2
SW3,SW4
0
OFF
1
ON
ON
OFF
Sl
NC
IN1
03
V-
S3
GNO
S4
VL
04
V+
NC
IN2
Logic "0" s 0.8 V
Logic "1" ., 2.4 V
Switches Shown for Logic "1" Input
02
S2
Ordering Information
Temp Range
Package
Part Number
Oto70'C
16-Pin Plastic DIP
DG5143CJ
Top View
P-32167-Rev. A (11/15/93)
1-221
Siliconix
DG5143
AMemberofthe TBMIC Group
Absolute Maximum Ratings
(V+) - (V-) ...................................... < 36V
Continuous Current, Any Thrminal ..................... 30 rnA
(V+) - (VD)· ...................................... < 30V
Peak Current, S or D (pulsed alms, 10% duty cycle max) . 100 rnA
(VD) - (V-)' ...................................... < 30V
Storage Thmperature ............................. -65 to 125'
(VD)-(VS)· ..................................... < ±22V
Power Dissipation (Package)b
16-PinPlasticDIP .................................. 450mW
Notes:
a. Signals on Sx, Dx, or INx exceeding V + or V-will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
(VL)-(V-) ....................................... <33V
(VL) - (VIN) ....................................... < 30 V
VL ................................................ <20V
VIN' .............................................. < 20V
Specifications
Test Conditions
Unless Otherwise Specified
Parameter
CSufilX
Ot070'C
V+ = 15 V, V- = -15V,VL = 5V
VIN = 2.4 V, 0.8 ve
temp'
Mine
VANALOG
Full
-15
rns(on)
VD =±10V, Is = -lOrnA
Room
Full
Symbol
l1YPb
I
Max"
Unit
15
V
Analog Switch
Analog Signal Ranged
Drain-Source On-Resistance
IS(off)
Switch Off Leakage Current
VD = 'flO V, Vs = ±lOV
ID(o!!)
Channel On Leakage Current
ID(on)
Vs = VD = -10to 10V
75
100
Room
Full
-5
-20
5
20
Room
Full
-5
-20
5
20
Room
Full
-2
-40
2
40
°
nA
Digital Control
Input Current with VIN Low
Input Current with VIN High
Dynamic Characteristics
Thrn-On Time
tON
Thrn-Off Time
tOFF
Break-Before-Make
Charge Injectiond
RL = 3000, CL = 35pF
See Figure 1
tON-tOFF
Q
CL = 10,000 pF, Vgen = 0 V, Rgen = 0
°
Room
175
Room
150
Room
5
Room
Off Isolationd
OIRR
RL = 1000, CL oS 5 pF,f= 1 MHz
Room
Channel-to-Channel Crosstalkd
XTALK
Any Other Channel Switches
RL = 1000, CL S 5 pF, f= 1 MHz
Room
150
ns
pC
-50
-50
dB
Power Supplies
Positive Supply Current
1+
Room
Negative Supply Current
1-
.Room
Logic Supply Current
IL
Ground Current
IGND
VIN=OVor5V
Switch Duty Cycle <10%
10
-10
10
Room
Room
ItA
-10
Notes:
a. Room = 25'C, Full = as determined by the operating temperature suffIX.
b. 'l}>pica\ values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Guaranteed by design, not subject to production test.
e. VIN = input voltage to perform proper function.
1-222
P-32167-Rev. A (11/15/93)
Silicanix
DG5143
AMem'bcr of the TBMIC Group
Test Circuits
+5V
+15V
3V
V+
VS1
VS2
S1
D1
S2
D2
Vs=10VfortoN
Vs = -10VfortOFF
VOl
V02
RLlJCLl
RL2 JCL2 ;000-=-35 pF
3000
-
-
-
35pF
-
Logic
Input
OV
Switch
Input
Vs
Switch
Output
OV
Switch
Input
-Vs
tr <20ns
tr<20ns
CL (includes fIXture and stray capacitance)
Figure 1. Switching Time
..
P-32167-Rev. A (11/15193)
1-223
Biliconix
A Member oftho TBMIC Group
1-224
General Information
Analog Switches
Analog Multiplexers _
WidebandlVideo Amplifiers
Voltage Converters
Appendix
Worldwide Sales Offices and Distributors
Siliconix
AMember of the TEMIC Group
About Analog Multiplexers
Analog multiplexers represent a higher level of integration than analog switches. They have many (4, 8, 16, or
more) inputs with only one or two common outputs. Multiplexers are used where it is necessary to transfer
information from many input channels to a common output, most often when only one transmission line is
available for all data transfer between various points. The transmitted signals are in either analog or digital
form. Siliconix multiplexers handle analog signals, passing bipolar voltages or currents, which are often
obtained from transducers. The analog signals represent physical phenomena such as temperature, pressure,
velocity, and flow speech. Typical applications include data acquisition, industrial process control, aircraft
systems monitoring, medical electronics, telemetry, and telecommunications.
Differential vs. Single-Ended Multiplexing
When is it better to select a differential multiplexer versus a single-ended configuration? Figures 1 and 2
demonstrate both options. Single-ended multiplexing, as shown in Figure 1, applies to systems that have signal
sources which are close to full-scale range and referenced to a common point (usually ground). Another case is
where different signal sources with small signal amplitude (mV range) are generated by transducers.
Instrumentation amplifiers can be used to precondition the signals and provide a common reference. This step
reduces feedthrough errors and losses while tailoring each signal source to a desired voltage (or current) to
obtain the maximum resolution available in an AID or D/A converter or other device driven by the multiplexers.
Differential multiplexing (Figure 2) is utilized for low-level switching and in noisy environments. It can tolerate
switching transients or some mismatch without a significant degradation of signal accuracy. Major
considerations are switch matching (rDS(on), I(off)' and capacitance), common-mode rejection, and the system's
tolerance to switching transients introduced by the break-before-make switching sequence.
o------&§b
10------&
10------& 1"'-_ _
1
0------&
1
~o------&I
Output
1
,
N 0------&
Output A
70------& 1
1,"'-_--1
Ixyxi
Figure 1. Single-Ended MUltiplexing
I
I
,Output B
I.
~o-----:b
1
0------&
~
rn
Figure 2. Differential Multiplexing
Siliconix
AMcmbcr or the TBMIC Group
The DG4XX series of Siliconix multiplexers is designed to reduce switching errors, glitching, and power
consumption while providing improved data throughput and increased ruggedness. For data acquisition, hi-rei,
and battery operated systems, the rugged DG406/407 and DG408/409 multiplexers are the answer for designs
requiring low on-resistance, low charge injection, fast transition time, and single-supply capability.
Other DG4XX family members include the DG428 and DG429, which have on-chip address and control latches
to simplify design in microprocessor-based applications, as well as the DG485 octal analog switch array for
low-power multiplexing in serial control applications.
n/CMOS WidebandNideo Multiplexers
The DG535 and DG536 are 16-channel wideband/video multiplexers which use the SiliconixD/CMOS process
to combine wideband DMOS "T" switches with high-density, high-speed CMOS logic and switch drivers to
form monolithic wideband/video multiplexing systems. These devices include on-board latches to hold the
address selection data and all of the necessary control logic to facilitate connection into larger arrays, matrices,
and multiplexers. The DG534 and DG538 are 4- and 8- channel wideband/video multiplexers which, like the
DG535 and DG536, feature address latches and control logic with the addition of data feedback and TTL
compatibility. They make excellent wideband/video crosspoints, routers, and multiplexers, reducing board
space, power dissipation, component count, and cost, while simplifying system design and improving reliability.
For detailed information on these products, please refer to the individual data sheets and to application notes
AN501 and AN502.
Crosspoints
The DG884 is the first monolithic wideband/video crosspoint switch available for commercial use. Any of eight
video inputs can simultaneously be routed to any of our outputs. This highly integrated device offers a major
reduction of the physical size and component count needed to implement a video switching matrix. The DG884
uses double-diffused DMOS switching elements to maintain low capacitance and low levels of crosstalk among
signal paths.
Double-diffused CMOS latches, chip select, reset, readback, and disable functions are all included on the chip
to ease system design, save power, and improve system reliability.
Factors Affecting Systems Performance
In any multiplexer application, the following factors should be considered:
1. System Attenuation: Includes loss in the analog signal caused by the multiplexer and the transmission path.
This is a frequency dependent factor.
2. Channellsolation: At low frequencies, this is principally a function of channel off-leakage currents, and at
high frequencies, it is a function of device and system capacitance.
3. Crosstalk: There are several sources of crosstalk, including overlap between switching channels, off-switch
capacitance, inter-switch capacitance, stray circuit capacitance, and distortion in the transmission medium.
..
Siliconix
AMembor of tho TBMrc Group
4. Noise: There are several sources of noise, including thermal or J ohnsonnoise generated in any resistance
components, crosstalk, leakages, switching transients, as well as thermal EMFs and transmission path
pickup.
5. Switching Rote: This is important in sampling system where it determines the maximum bandwidth frequency
of the multiplexers (via the sampling theorem) and defines crosstalk errors.
6. Settling Time: Although settling time is a function for the source and load impedances, the multiplexer's
contribution is directly related to the rDS(on) x CS(on) time constant and to the charge injection of the
multiplexer.
Glossary of Terms
Bandwidth
The "3 dB down" point of the frequency response characteristic.
Crosspoint Switch
A two-dimensional array of analog switches or analog multiplexers that allows for the routing of signals from
any input to any output.
Crosstalk
A measure of how much of an unwanted signal appears on a given analog channel due to spurious capacitive or
inductive coupling from another channel.
DlCMOS
Semiconductor process that combines DMOS FE'Th and CMOS logic on a monolithic chip.
Differential Gain
Expressed as a percentage, this is a form of distortion that appears as changes in the amplitude of the
chrominance (color) signal as a function of luminance (brightness) amplitude.
Differential Multiplexer
An analog multiplexer that selects both the high and the low side of each signal. It can be thought of as two
single-ended multiplexers operating in tandem.
Differential Phase
Measured in degrees, this is the phase shift of the color subcarrier resulting from changes in luminance level.
DMOS (Double-Diffused MOS)
A type of field-effect transistor featuring low on-resistance and low capacitance.
Input Capacitance
The capacitive load that the input terminal of an analog switch presents to the signal source. It is specified for
two conditions, with the switch on or off.
Siliconix
AMember of tho TBMIC Group
Insertion Loss
Expressed in dB, this is a measure of the signal loss caused by the impedance of the analog switch at a given
frequency.
Off-Isolation
A measure of how much of the signal applied to an "open" switch appears at its output due to parasitic
components such as gate-to-channel capacitance and lead inductance.
On-resistance
The dc input-to-output resistance of an analog switch channel when the switch is turned on.
Output Capacitance
The capacitive load that the output of an off switch adds to the output node.
PLCC Package (Plastic Leaded Chip Carrier)
A surface-mount package characterized for its small size and reliable lead-to-printed circuit board mechanical
interface
Readback
A feature that allows for the inspection of the control latch contents in a multiplexer or crosspoint switch.
Single-Ended Multiplexer
An array of analog switches that selects one of several analog input signals.
"T" Switch
An analog switch configuration consisting of two series switches and a shunt switch to ground. It is used to
improve dramatically the off-isolation of the array.
Video Amplifier
An amplifier, typically with a gain of2, which is normally used at the output of a video multiplexer or crosspoint
to drive a length of double-terminated coaxial cable.
Video Buffer
A current amplifier that is used is to preserve signal quality by eliminating the capacitive loading effect to
several video multiplexer inputs on a common signal source. This is normally a unity gain buffer.
Wideband
A relative term that is used in this book to refer to a frequency spectrum that is more than 2 MHz wide.
-
Analog Multiplexer Selector Guide
Max
Max
l'J)~on)
IS(on)
Typical
'lransitiou
Time
Charge
Injection
(nA)
Analog
Range
(V)
(pC)
On-Chip
Logic
Regulator
Max Power
Consumption
(mW)
(fts)
Pacl\age
Commeuts
Page
0.3
-70
-
595
J,N,P
Video, Latches
2-86
-5 to 10
-5 to 10
±15
0.3
0.3
0.25
-70
-70
20
Yes
595
595
0.9
J,N,P
J,N,P
J,K, Y,Z
Video, Latches
Video, Latches
High Speed
2-86
2-86
2-11
1
10
10
2
±15
±15
±15
-9.5 tol0
0.25
1.0
1.0
0.5
4
20
4
1.58
58.5
60
3
J,K,N
J,K, Y
J,K
J,K,Z
Latchable, High Speed
-
Yes
Yes
Yes
Yes
Latchable
Fault Protected
2-22
2-60
2-70
2-34
90
100
100
20
1
1
-5 to 10
±15
±15
0.3
0.2
0.25
-70
20
4
Yes
Yes
59.5
0.9
1.58
J,N,P
J,K, Y
J,K,N
Video, Latches
High Speed
Latchable, High Speed
2-86
2-11
2-22
DG50SA
DG528
DG458
400
400
1200
10
10
2
±15
±15
-95 to 10
1.0
1.0
0.5
20
4
59.5
60
3
J,K, Y,Z
J,K
J,K,Z
-
-
Yes
Yes
Yes
Latchable
Fault Protected
2-60
2-70
2-34
8-Channel
Differential
DG407
DG507A
100
400
1
5
±15
±15
0.3
1.0
15
20
Yes
Yes
0.5
58.5
J,K,N,Z
J,K,R
High Speed
DG535
DG536
DG406
DG506A
90
90
100
400
10
10
1
10
OtolO
Otol0
±15
±15
0.3
0.3
0.3
1.0
-35
-35
20
20
-
16-Channel
Single-Ended
Yes
Yes
0.75
0.75
0.47
58.5
J,P
M,N
J,K,N,Z
J,K,N,R,Z
Low Power, Video
Low Power, Video
Low Power, Fast
-
2-102
2-102
2-1
2-52
Specials
DG485
DG884
DG894
85
90
100
20
20
10
±15
-5 t08
-5t08
0.2
0.3
0.2
17
-100
-
-
Yes
0.11
925
136
J,N,Z
M,N
J,W
8-Ch, Serial Control
8x4 Video Crosspoint
RGB Video Mux
2-42
2-113
2-126
Functional
Configuratilm
Part No.
2-Channel
Differential
DG534A
90
20
-5 to 10
DG534A
DG538A
DG409
90
90
100
20
20
1
DG429
DG509A
DG529
DG459
100
400
400
1200
DG538A
DG408
DG428
4-Channel
Differential
8-Channel
Single-Ended
J = Plastic DIP
R = Sidebraze
C)
K= CerDIP
W = SOICWid.,.Body
M=CLCC
Y=SOIC
N=PLCC
Z=LCC
P = Sidebraze
-
-
-
2-1
2-52
Siliconix
DG406/407
AMcmber of the TBMIC Group
16-Channel/DuaI8-Channel
High Performance CMOS Analog Multiplexers
Features
Benefits
Applications
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Low On-Resistance-rDS(on): 50 Q
Low Charge Injection-Q: 15 pC
Fast Transition Time-tTRANs: 200 ns
LowPower: 0.2mW
Single Supply Capability
44-V Supply Max Rating
Higher Accuracy
Reduced Glitching
Improved Data Throughput
Reduced Power Consumption
Increased Ruggedness
Superior to DG506/507A
Wide Supply Ranges: ± 5 V to ± 20 V
Data Acquisition Systems
Audio Signal Routing
Medical Instrumentation
ATE Systems
Battery Powered Systems
High-Rei Systems
Single Supply Systems
Description
The DG406 is a 16-channel single-ended analog
multiplexer designed to connect one of sixteen inputs to a
common output as determined by a 4-bit binary address.
The DG407 selects one of eight differential inputs to a
common differential output. Break-before-make switching
action protects against momentary shorting of inputs.
Applications for the DG406/407 include high speed data
acquisition, audio signal switching and routing, ATE
systems, and avionics. High performance and low power
dissipation make them ideal for battery operated and
remote instrumentation applications. For additional
application information, see application note AN206.
An on channel conducts current equally well in both
directions. In the off state each channel blocks voltages up
. to the power supply rails. An enable (EN) function allows
the user to reset the multiplexer/demultiplexer to all
switches off for stacking several devices. All control inputs,
address (Ax) and enable (EN) are TIL compatible over the
full specified operating temperature range.
Designed in the 44-V silicon-gate CMOS process, the
absolute maximum voltage rating is extended to 44 volts,
allowing operation with ±20-V supplies. Additionally
single (12-V) supply operation is allowed. An epitaxiallayer
prevents latchup.
Functional Block Diagrams and Pin Configurations
Dual-In·Line
DG406
Dual·ln-Line
DG407
v+
D
NC
NC
v-
SI6
S7
SSb
S7.
SIS
S6
S7b
S6.
SI4
Ss
S6b
SS.
SI3
S4
SSb
SI2
S3
Sl1
S2
SID
SI
v+
D.
v-
Ss
SS.
S4.
S3.
S2.
S2b
SI.
S9
EN
SIb
EN
GND
NC
Ao
Ao
Al
A3
A2
GND
NC
NC
ThpView
P·32167-Rev. C (11/15/93)
B
Al
A2
ThpView
2-1
Siliconix
DG406/407
AMembcr of the TBMIC Group
Functional Block Diagrams and Pin Configurations (Cont'd)
PLCCandLCC
DG406
PLCC and LCC
DG407
J~~~o~","
J
~ cf ~
~~~«<~
'lbpView
ThpView
'fruth Thble - DG407
'fruth Thble - DG406
i\1
Al
At
At!
EN
On Switch
AZ
Al
Au
EN
On Switch Pair
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
None
1
2
3
4
5
6
7
8
9
X
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
None
1
2
3
4
5
6
7
8
1
1
1
1
1
1
Ordering Information - DG406
1emp RallJle
Package
-40 to 85°C
28-Pin Plastic DIP
28-PinPLCC
-55 to 125°C
2-2
Logic "0"
Logic"!"
X
10
11
12
13
14
15
16
Part Number
DG406DJ
DG406DN
28-Pin CerDIP
DG406AK/883
LCC-28
DG406AZJ883
VAL s 0.8 V
VAH '" 2.4V
Don't Care
Ordering Information - DG407
Temp RallJle
-40 to 85°C
-55 to 125°C
Package
Part Number
28-Pin Plastic DIP
DG407DJ
28-PinPLCC
DG407DN
28-Pin CerDIP
DG407AK/883
LCC-28
DG407AZJ883
P-32167-Rev. C (11/15/93)
Siliconix
DG406/407
AMcmbcrofthc'I'BM1CGrOUP
Absolute Maximum Ratings
Voltages Referenced to V-
Power Dissipation (Package)b
28-PinPlasticDIP" ................................. 625mW
28-Pin CerDIpd ..•................................... 1.2 W
28-Pin Plastic PLCC" ................................ 450 mW
LCC-28e ...................................•....... 1.35 W
Notes:
a. Signals on Sx, Dx or INx exceeding V+ orV- will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads soldered or welded to PC board.
c. Derate6mWI"Cabove75"C
d. Derate 12 mWrC above 75"C
e. Derate 13.5 mWrC above 75"C
V+ ................................................. 44V
GND ............................................... 25V
Digital Inputsa, Vs, Vo ............. (V-) -2 V to (V+) +2 Vor
20 rnA, whichever oocurs first
Current (Any Thrminal,) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 30 rnA
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle Max) ................. 100 rnA
Storage Thmperature
(AK, AZ SuffIX) . . . . . . . .. -65 to 150"C
(OJ, DN SuffIX) . . . . . . . .. -65 to 125"C
Specifications a
Test Conditions
Unless Otherwise Specified
Parameter
ASntrlX
-55 to 125"C
I
DSntrlX
-40 to S5"C
I
V+ =15V;V- = -15V
VAL = O.S V; VAll = 2.4
vr
Tempb
1YPc
'OS(on)
Vo = :!:10V;Is- -lOrnA
Sequence Each Switch On
Full
Room
Full
50
8'OS(on)
Vo = :!:lOV
Room
5
Room
Full
0.01
-0.5
-50
0.5
50
-0.5
-5
0.5
5
VEN=OV
DG406
Vo = ±10V; Vs = :FlOV
Room
Full
0.04
-1
-200
1
200
1
-40
1
40
DG407
Room
Full
0.04
1
-100
1
100
1
-20
1
20
DG406
Room
Full
0.04
-1
-200
1
200
-1
-40
1
40
DG407
Room
Full
0.04
-1
-100
1
100
-1
-20
1
20
Symbol
Mind
Maxd
Mind
15
100
125
-15
Maxd
Unit
15
100
125
V
Analog Switch
Analog Signal Rangee
Drain-Source
On-Resistance
'OS(on) Matching Between
Channels&
VANALOG
Source Off
Leakage Current
IS(off)
Drain Off Leakage Current
IO(of!)
Drain On Leakage Current
IO(on)
Vs=Vo=:!:10V
Sequence Each Switch On
-15
0
%
nA
Digital ContrClI
Logic High Input Voltage
Logic Low Input Voltage
VINH
VINL
Logic High Input Current
IAll
Logic Low Input Current
IAL
Logic Input Capacitance
em
f=lMHz
Room
7
Transition Time
tTRANS
See Figure 2
Room
Full
200
Break-Before-Make
Interval
toPEN
See Figure 4
Room
Full
50
Room
Full
150
200
400
200
400
Room
Full
70
150
300
150
300
Full
Full
2.4
VA = 2.4 V; 15V
Full
-1
1
-1
1
VEN - OV; 2.4 V; VA = OV
Full
-1
1
-1
1
2.4
0.8
0.8
V
tlA
pF
Dynamic Characteristics
Enable Thrn-On Time
tON(BN)
Enable Thrn-OffTime
tOFF(BN)
See Figure 3
Charge Injection
Off Isolation·
P-32167-Rev. C (11115193)
300
400
25
10
300
400
25
10
ns
Q
CL -1 nF,Vs - OV;R, - 00
Room
15
pC
OIRR
VEN - OV; RL -1 W, f -100kHz
Room
-69
dB
2-3
•
Siliconix
DG406/407
AMcmber of the TBMIC Group
Specifications a
Test Conditions
Unless Otherwise Specir.ed
Parameter
Symbol
V+ = 15V,V- = -15V
VAL = O.S V, VAH = 2.4 yf
Tempb
'lYPc
Room
Room
S
130
ASufr.x
D Sutr.x
-55 to 125°C
-40 to S5°C
Mind
I
Maxd
Mind
I
Maxd
Unit
DyuaJllic Characteristics (CQIU'd)
Source Off Capacitance
CS(off)
Drain Off Capacitance
CD(off)
VEN =
ov, Vs = ov, f= 1 MHz
VEN = OV,VD = OV
f=lMHz
Drain On Capacitance
CD(on)
DG407
Room
65
DG406
Room
140
DG407
Room
70
Room
Full
13
pF
PQwer Supplies
Positive Supply Current
1+
VEN =VA = Oor5V
Negative Supply Current
1-
Room
Full
-0.01
Positive Supply Current
1+
Room
Full
50
Negative Supply Current
1-
Room
Full
-0.01
VEN = 2.4 V, VA = OV
30
75
-1
-10
30
75
-1
-10
100
500
-1
-10
i!A
100
200
-1
-10
Specifications a for Single Supply
Test Conditions
Unless Otherwise Specrued
Parameter
Symbol
V+ = 12V,V- =OV
VAL = 0.8 V, VAH = 2.4 yf
Tempb
'lYPc
A Suffix
D Sutr"1X
-55 to 125°C
-40toS5°C
Mind IMaxd
Mind IMaxd
Unit
Anawg Switc:h
Analog Signal Range"
Drain-Source
On-Resistance
I"DS(on) Matching Between
Channelsg
VANALOG
Full
l"DS(on)
Room
90
Room
5
Room
0.01
DG406
Room
0.04
DG407
Room
0.04
DG406
Room
0.04
DG407
Room
0.04
IS(off)
Drain Off Leakage Current
ID(off)
Drain On Leakage Current
ID(on)
12
120
0
12
V
120
Q
VD = 3 V, 10 V; Is = - 1 rnA
Sequence Each Switch On
AI"DS(on)
SourccOff
Leakage Current
0
VEN=OV
VD = lOV or 0.5 V
Vs = 0.5Vor 10V
Vs=VD=±10V
Sequence Each Switch On
%
nA
DyuaJllie Characteristics
Switching 11me of
Multiplexer
tTRANS
VSl = SV,Vss = OV,VIN = 2.4 V
Room
300
450
450
Enable 'fum-On 11me
toN(EN)
Room
250
600
600
Enable Thrn-Off11me
tOFF(EN)
VINH = 2.4 V, VINL = OV
VSl = 5V
Room
150
300
300
Q
CL = 1 nF, Vs= 6V,Rs = 0
Room
20
Charge Injection
2-4
ns
pC
P-32167-Rev. C (11/15/93)
Silicanix
DG406/407
AMcmbcr of the TBMICGrOUP
Specifications a for Single Supply
A Suffix
-55 to 125°C
Test Conditions
Unless Otherwise Specified
I
V+~12V,V-~OV
Parameter
VAL ~ 0.8 V, VAH ~ 2.4 yf
Symbol
Tempb
'I)tp.
Room
Full
13
Room
Full
-0.01
Maxd
Mind
D Sull"'"
-40 to 85°C
Mind
I
Maxd
Unit
Power Supplies
Positive Supply Current
I+
VEN = OVor 5V, VA = OVor 5V
1-
Negative Supply Current
30
75
30
75
-1
-5
JlA.
-1
-5
Notes:
a. Refer to PROCESS OPTION FLOWCHARI' (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25°C, Full = as determined by the operating temperature suffIX.
c. 1Jpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. ArOS(on) = --1
HP4192A
Impedance
Analyzer
or EqUivalent
RL
v-15V
Channel {
Select
Vo
D
Ao
-
Sl
I
I
Rg = 509
II<&!
-
Insertion Loss = 20 log
f=1MHz
Iv~:1
Figure 9.
Figure S. Insertion Loss
Source Drain Capacitance
Application Hints
Overvoltage Protection
A very convenient form of overvoltage protection consists
of adding two small signal diodes (lN4148, 1N914 type) in
series with the supply pins (see Figure 10). This
arrangement effectively blocks the flow of reverse currents.
It also floats the supply pin above or below the normal V +
or V - value. In this case the overvoltage signal actually
becomes the power supply of the Ie. From the point of view
of the chip, nothing has changed, as long as the difference
VS - (V -) doesn't exceed +44 V. The addition of these
diodes will reduce the analog signal range to 1 V below V +
and 1 V above V-, but it preserves the low channel
resistance and low leakage characteristics.
V+
1N4I48
Sx
---I--oD
DG40S
1N4148
VFigure 10. Overvoltage Protection Using Blocking Diodes
2-20
P-32I67-Rev. C (11/15193)
Silicanix
DG408/409
A Member of the TBM Ie Group
Applications
Dilferential4-Cbannel Seqnential Multiplexer/Demultiplexer
8-Cbannel Sequential Multiplexer/Demultiplexer
+15V
V+
SI
S2
S3
S4
S5
S6
S7
S8
Analog
Inputs
(Outputs)
NC
+15V
-15V
S3a
S4a
Da
GND V-
DG408
D
Differential
Analog
Inputs
(Outputs)
Analog
Output
(Input)
Differential
Analog
Outputs
(Inputs)
DG409
SIb
Szb
S3b
Ao Al A2 EN
+15V
Clock
In
-15V
Db
EN
DM7493 QB
BIN
AIN
Qc
QD
NC
rOl
Clock
In
J
Q
'hMM74C73
CLK
K
Q
J
Q
V,MM74C73
CLK
NC
Q
K
NC
CLEAR
0----1------------'
Enable In
(MUX On-Off Control)
6
Reset Enable
Figure 11.
III
P-32167-Rev. C (11/15/93)
2-21
Siliconix
DG428/429
AMember of the TBMIC Group
Single 8-ChannellDifferential 4-Channel Latchable
Analog Multiplexers
Features
Benefits
Applications
• Low rns(on): 55 Q
• Low Charge Injection: 1 pC
• On-Board TTL Compatible
Address Latches
• High Speed-tTRANs: 160 ns
• Break-Before-Make
• Low Power Consumption: 0.3 mW
•
•
•
•
•
•
•
•
•
•
•
Improved System Accuracy
Microprocessor Bus Compatible
Easily Interfaced
Reduced Crosstalk
High Throughput
Improved Reliability
Data Acquisition Systems
Automatic Test Equipment
Avionics and Military Systems
Communication Systems
Microprocessor Controlled Analog
Systems
• Medical Instrumentation
Description
The DG428/DG429 analog multiplexers have on-chip
address and control latches to simplify design in
microprocessor based applications. Break-before-make
switching action protects against momentary crosstalk of
adjacent input signals.
switches off for stacking several devices. All control inputs,
address (Ax) and enable (EN) are TTL compatible over the
full specified operating temperature range.
The DG428 selects one of eight single-ended inputs to a
common output, while the DG429 selects one of four
differential inputs to a common differential output.
The silicon-gate CMOS process enables operation over a
wide range of supply voltages. The absolute maximum
voltage rating is extended to 44 V. Additionally, single
supply operation is also allowed and an epitaxial layer
preventslatchup.
An on channel conducts current equally well in both
directions. In the off state each channel blocks voltages up
to the power supply rails. An enable (EN) function allows
the user to reset the multiplexer/demultiplexer to all
On-board TTL-compatible address latches simplify the
digital interface design and reduce board space in
bus-controlled systems such as data acquisition systems,
process controls, avionics, and ATE.
Functional Block Diagrams and Pin Configurations
DG428
DG428
Dual-In·Line
WR
RS
Ao
A1
EN
A2
v-
GND
S1
v+
~
S5
S3
S6
S4
S7
D
S8
18
A2
GND
v+
S5
~
~Q~J:J)
ThpView
Top View
2-22
P·32167-Rev. C (11/15/93)
Silicanix
DG428/429
AMember olthe TBMIC Group
Functional Block Diagrams and Pin Configurations (Cont'd)
DG429
DG429
Dual-In-Line
WR
RS
Ao
A1
EN
GND
EN
GND
V-
V+
V-
VDD
Sla
Slb
Sla
Slb
S2a
S2b
S3a
S3b
*
S2b
S3a
S3b
S4a
S4b
Da
Db
::
'"
a
~
U
Z
;;
.c
~
'"
ThpView
ThpView
'ftuth Thble - DG428
8-Channel Single-Ended Multiplexer
A2
At
I Ao I IWR I I
RS
EN
'ftuth Tahle - DG429
Dilferential4-Channel Multiplexer
On Switch
Latching
X
Reset
X
I
I
X
X
X
lSi
1
Maintains previous
switch condition
X
X
X
X
0
None (latches cleared)
X
X
X
0
0
0
0
1
0
0
1
1
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
EN
RS
On Switch
-40 to 85°C
-55 to lZSoC
P-32l67-Rev_ C (11/15/93)
X
I
I
X
X
lSi
1
Maintains previous
switch condition
X
X
X
0
None (latches cleared)
1
1
1
1
1
None
1
2
3
4
'ftansparent Operation
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
Ordering Information 'Thmp Range
X
Reset
'ftansparent Operation
1
I IWR I
Ao
At
Latching
None
1
2
3
4
X
0
1
0
1
0
1
1
1
1
0
0
0
0
0
..
5
Logic "0"
Logic"!"
6
7
8
DG428
X
VAL
s
0_8V
VAH;;' 2.4 V
Don't Care
Ordering Information -
Package
Part Number
l8-Pin Plastic DIP
DG428DJ
20-PinPLCC
DG428DN
l8-Pin CerDIP
X
0
0
1
1
DG428AK
DG428AK/883
Temp Range
-40 to 85°C
-55 to IZSoC
DG429
Package
FartNumber
l8-Pin Plastic DIP
DG429DJ
20-PinPLCC
DG429DN
18-Pin CerDIP
DG429AK
DG429AK/883
2-23
Silicanix
DG428/429
AMcmbcr of the TBMIC Group
Absolute Maximum Ratings
Voltage Referenced to vv+ ................................................. 44V
Power Dissipation (Package)b
18-PinPlasticDIPC ................................. 470mW
18-PinCerDIpd .................................... 900mW
20-PinPLCCC ..................................... 800mW
GND ............................................... 25V
DigitalInputsa, Vs, Vo ............. (V-) -2 Vto (V+) +2 Vor
30 InA, whichever occurs first
Current (Any Thrminal) .............................. 30 mA
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle Max) ................. 100 mA
Storage Thmperature
(AK Suffix) ............ -65 to 150'C
(DJ, DN SuffIX) . . . . . . . .. -65 to 125'C
Notes:
a. Signals on Sx, Dx or INxexceedingV+ or V- will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads soldered or welded to PC board.
c. Derate 6.3 mWrC above 75'C.
d. Derate 12 mWrC above 75'c'
e. Derate 10 mWrC above 75°C,
Specificationsa
Test Conditions
Unless Otherwise Specified
Parameter
A Sull"lX
D Sull"lX
-40 to 85°C
-55 to 125°C
V+ =15V,V- = -15V
WR = O,RS = 2,4 V
VIN = 2,4 V, 0.8
Tempb
roS(on)
Vo = ±10 V, VAL - 0.8 V
Is= -1 InA, VAH=2,4V
Room
Full
55
AroS(on)
-10V < Vs < lOV
Is= -lmA
Room
5
IS(off)
Vs = ±10V, Vo - :FlOV
VEN=OV
Room
Full
±0.03
-0.5
-50
0.5
50
-0.5
-50
0.5
50
DG428
Room
Full
±0.07
-1
-100
1
100
-1
-100
1
100
DG429
Room
Full
±0.05
-1
-50
1
50
-1
-50
1
50
DG428
Room
Full
±0.07
-1
-100
1
100
-1
-100
1
100
DG429
Room
Full
±0.05
-1
-50
1
50
-1
-50
1
50
VA=2.4V
Full
0.01
1
1
VA -15V
Full
0.01
1
1
Full
-0.01
Symbol
vr
'JYpc
Mind
I
Mart
Mind
15
-15
I
Maxd
Unit
15
V
100
125
Q
Analog Switch
Analog Signal Range"
Drain-Source On-Resistance
Greatest Change in roS(on)
Between Channelsg
Source Off Leakage Current
Drain Off
Leakage Current
Drain On
Leakage Current
IO(off)
IO(on)
-15
Full
VANALOG
Vo = ±10V
Vs = :FlOV
VEN=OV
VS=VD= ±10V
VEN= 2,4 V
VAL = 0.8 V, VAH = 2,4 V
100
125
%
nA
Digital Control
Logic Input Current
Input Voltage High
IAH
Logic Input Current
Input Voltage Low
IAL
VEN - 0V,2.4 V, VA = OV
RS=OV,WR=OV
Logic Input Capacitance
em
f-1MHz
Room
8
'nansition TIme
tTRANS
See Figure 5
Room
Full
150
Break-Before-Make Interval
!oPEN
See Figure 4
Full
30
90
-1
I1A
-1
pF
Dynamic CharacteristiCB
250
300
10
250
300
10
ns
Enable and Write
Thrn-OnTIme
!oN(EN,WR)
See Figures 6 and 7
Room
Full
Enable and Reset
Thrn-OffTIme
!oFF(EN, RS)
See Figures 6 and 8
Room
Full
55
Charge Injection
Q
VGEN - OV,RGEN - OQ
CL = 1 nF, See Figure 9
Room
1
pC
OIRR
VEN - OV,RL - 300Q,CL = 15 pF
Vs = 7VRMs,f= 100kHz
Room
-75
dB
Off Isolation
2-24
150
225
150
225
150
300
150
300
P-32167-Rev. C (11/15/93)
Siliconix
DG428/429
AMcmbcr of the TBMIC Group
Specifications a (Cont'd)
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
ASufrIX
-55 to 125'C
V+=15V,V-=-15V
WR=0,RS=2.4V
VIN = 2.4 V, 0.8 yf
Tempb
Vs = OV,VEN = Ov, f= 1 MHz
'JYpc
Mind
I
Maxd
DSufrIX
-40 to 85'C
Mind
I
Maxd
Unit
Dynamic Characteristics (Cont'd)
Source Off Capacitance
Drain Off Capacitance
Drain On Capacitance
CS(off)
CO(off)
Vo = OV,VEN =OV
f=lMHz
CO(on)
Room
11
DG428
Room
40
DG429
Room
20
DG428
Room
54
DG429
Room
34
pF
MinimUm Input Timing Requirements
Write Pulse Width
tw
Ax, EN Data Set Up time
Is
Ax, EN Data Hold 'TIme
tH
Reset Pulse Width
tRS
See Figure 2
Vs = 5 V, See Figure 3
Full
100
100
Full
100
100
Full
10
10
Full
100
100
ns
Power SuplJIies
Positive Supply Current
Negative Supply Current
1+
1-
VEN = OV,VA=O,RS = 5V
Room
20
Room
-0.00
1
100
100
-5
J1A
-5
Specitications a for Single Supply
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+=12V,V-=OV
WR = O,RS = 2.4 V
VIN = 2.4 V, 0.8 yf
ASufrlX
-55 to 125'C
Thmpb
'JYpc
D Suffix
-40 to 8S'C
Mind
Maxd
Mind
Maxd
Unit
0
12
0
12
V
150
g
Analog Switth
Analog Signal Range·
Drain-Source
On-Resistance
IDS(on} Matchg
Full
VANALOG
lDS(on)
Vo - +10V, VAL - 0.8 V
Is = -500 f1A, VAH = 2.4 V
Room
ll.1DS(on)
-10V
:::':::,'
1
0.5
0
5
25
45
65
Thmperature (CO)
2-28
~
.a
85 105 125
0
±5
±10
±15
±20
VSUPPLY - Supply Voltage (V)
P·32167-Rev. C (11/15/93)
Siliconix
DG428/429
A Membcr of the TBMIC Group
Schematic Diagram (lYpical Channel)
v+
GND
D
Level
Shift
AX
Decode!
Drive
Latches
WR
o---~~------~
v+
CLK
1
1
1
1
1
1
1--
RESET
RS o-------~~--~
v-o--------4-----------------------4--------~------~~----------~
v-
Figure 1.
Detailed Description
The internal structure of the DG428/DG429 includes a 5-V
logic interface with input protection circuitry followed by a
latch, level shifter, decoder and finally the switch
constructed with parallel n- and p-channel MOSFETs (see
Figure 1).
The input protection on the logic lines Ao, At> A2, EN and
control lines WR, RS shown in Figure 1 minimizes
susceptibility to ESD that may be encountered during
handling and operational transients.
The logic interface is a CMOS logic input with its supply
voltage from an internal +5 V reference voltage. The
output of the input inverter feeds the data input of a D type
latch. The level sensitive D latch continuously places the
Dx input signal on the Ox output when the WR input is low,
resulting in transparent latch operation. As soon as WR
returns high the latch holds the data last present on the Dn
P·32167-Rev. C (11I15{93)
input, subject to the
Requirements" table.
"Minimum
Input
Timing
Following the latches the On signals are level shifted and
decoded to provide proper drive levels for the CMOS
switches. This level shifting ensures full on/off switch
opera tion for any analog signal level between the V + and
V - supply rails.
The EN pin is used to enable the address latches during the
WR pulse. It can be hard wired to the logic supply or to V +
if one of the channels will always be used (except during a
reset) or it can be tied to address decoding circuitry for
memory mapped operation. The RS pin is used as a master
reset. All latches are cleared regardless of the state of any
other latch or control line. The WR pin is used to transfer
the state of the address control lines to their latches, except
during a reset or when EN is low (see Truth Tables).
2-29
•
Siliconix
DG428/429
AMembeT of the TEMIC Group
Timing Diagrams
3V
RS
OV
Vo ----------------------~
Switch
80%
Output
OV
Figure 2.
Figure 3.
Test Circuits
+15V
+2.4 V
V+
RS
EN
Ir <20ns
<20ns
Logic
+5V
All S and D.
"'\: tf
Input
1-
DG428
DG429
. - - , - ' Ao, A]. (A2)
GND
Db. D 1--o___-0 Vo
V-
WR
Vs
Switch
Output
Vo
OV
1\ r
I--.\ "-J
O%
tOPEN
Figure 4. Break-Before-Make
+15V
RS
EN
Ao
Al
A2
GND
- -
V+
Sl
Sz-S7
DG428 '
Ss
WR
V-
-
Logic
Vo
D
- -
Input
Switch
tr <20ns
tf <20ns
3V
50%
OV
Vs]
Output
+15V
Vo
OV
V+
Vss
SsON
Vo
Figure s. nansition Tune
2-30
P-32167-Rev. C (11/lS/93)
Siliconix
DG428/429
AMember of the TBMICGrOUP
Test Circuits (Cont'd)
+lSV
+2.4 V
-SV
Sl
S2 - S8
Vo
I
-
-
-
-
35pF
Logic
Input
tr <20ns
tf <20ns
3V
50%
OV
- +15 V
+2.4 V
Switch
Output
Vo
V+
RS
EN
Ao
-SV
Slb
DG429
Sl. - S4",D.
~b - S4b
90%
Vo
Vo
Figure 6.
Enable tONltOFF TIme
+15V
+5V
+2.4 V
.------1RS
DG428
DG429
•
3V
WR
Remaining
Switches
50%
OV
Vo
1-.__---.--0 Vo
Switch
Output
20%
OV
Figure 7.
P-32167-Rev. C (11115193)
Write 'furn-On TIme tON(WR)
2-31
Siliconix
DG428/429
AMcmber of the TBMIC Group
Test Circuits (Cont'd)
+15V
V+
3V
+5V
RS
50%
ov
-tOFF(RS)
Vo
i-"?--........O Vo
Switch
Output
OV
Figure 8.
Reset Thm-OffTIme tOFF(RS)
RS
2.4 V
+15V
....-----1
Rg
~
OFF
ON
~
V+
Ao. AI. (A2)
S
OFF
EN..:::.::J
, LlVo
VO~
Vo
T
LlVo is the measured voltage error due to
charge injection. The charge in coulombs is
Q =CLxLlVO
Figure 9. Charge Injection
Applications
Bus Interfacing
The DG428/DG429 minimize the amount of interface
hardware between a microprocessor system bus and the
analog system being controlled or measured. The internal
TTL compatible latches give these multiplexers write-only
memory, that is, they can be programmed to stay in a
particular switch state (e.g., switch 1 on) until the
microprocessor determines it is necessary to tum different
switches on or tum all switches off (see Figure 10).
2-32
The input latches become transparent when WR is held
low; therefore, these multiplexers operate by direct
command of the coded switch state on A2, At. Ao. In this
mode the DG428 is identical to the popular DG408. The
same is true of the DG429 versus the popular DG409.
During system power-up, RS would be low, maintaining all
eight switches in the off state. After RS returned high the
DG428 maintains all switches in the off state.
P-32167-Rev. C (11/15/93)
Siliconix
or
A Member
DG428/429
the TBMIC Group
Applications (Cont'd)
When the system program performs a write operation to
the address assigned to the DG428, the address decoder
provides a CS active low signal which is gated with the
WRITE (WR) control signal. At this time the data on the
DATA BUS (that will determine which switch to close) is
stabilizing. When the WR signal returns to the high state,
(positive edge) the input latches ofthe DG428 save the data
from the DATA BUS. The coded informa tion in the Ao, At.
Data Bus
Processor
System
Bus
>
A2 and EN latches is decoded and the appropriate switch
is turned on.
The EN latch allows all switches to be turned off under
program control. This becomes useful when two or more
DG428s are cascaded to build 16-line and larger
multiplexers.
-
An, Al, A2, EN
DG428
RS
WR
V-
D
Analog
Output
-15V
Figure 10. Bus Interface
P-32167-Rev. C (11/15/93)
2-33
Siliconix
DG458/459
AMember of the TBMIC Group
Fault Protected Single 8-Channel/DifTerential 4-Channel
Analog Multiplexers
Features
Benefits
Applications
-
-
-
Fault and OvelVoltage Protection
All Channels Off When Power Off
Latchup-Proof
FastSwitching-TA: 200ns
Break-Before-Make Switching
Low On-Resistance: 180 Q
Low Power Consumption: 3 mW
TIL and CMOS Compatible Inputs
Improved Ruggedness
Power Loss Protection
Prevents Adjacent Channel Crosstalk
Standard Logic Interface
Superior Accuracy
Fast Settling TIme
Data Acquisition Systems
Industrial Process Control Systems
Avionics Test Equipment
High-ReI Control Systems
Telemetry
Description
The DG458 and DG459 are 8-channel single-ended and
4-channel differential analog multiplexers, respectively,
incorporating fault protection. A series n-p-n MOSFET
structure provides device and signal-source protection in
the event of power loss or overvoltages. Under fault
conditions the multiplexer input (or output) appears as an
open circuit and only a few nanoamperes ofleakage current
will flow. This protects not only the multiplexer and the
circuitry following it, but also protects the sensors or signal
sources which drive the multiplexer.
The DG458 and DG459 can withstand continuous
overvoltage inputs up to ±35V. AlldigitalinputshaveTfL
compatible logic thresholds. Break-before-make operation
prevents channel-to-channel interference.
The DG458 and DG459 are improved pin-compatible
replacements for HI-508N509A and MAX358/359
multiplexers.
Functional Block Diagrams and Pin Configurations
Dual·In·Line
DG458
A1
Au
A1
EN
A2
EN
GND
v-
GND
v-
v+
Sl
v+
Sl.
Slb
~
Ss
~
S2b
S3
S6
S3.
~b
S4
S7
S4.
S4b
D
S8
D.
Db
Au
ThpView
2-34
Dual·In·Line
DG459
ThpView
P·32167-Rev. C (11/15/93)
Silicanix
DG458/459
AMember o[thc TBMtc Group
'fruth Tables and Ordering Information
'Iruth Table - DG4S8
'Iruth Table - DG4S9
Az
Al
Ao
EN
On Switch
Al
Ao
EN
OnSwit~h
X
X
X
0
None
X
X
0
None
0
0
0
1
1
0
0
1
1
0
0
1
1
2
0
1
1
2
0
1
0
1
3
1
0
1
3
0
1
1
1
4
1
1
1
4
1
0
0
1
5
1
0
1
1
6
1
1
0
1
7
1
1
1
1
8
Logic "0"
Logic "1"
X
VAL s 0.8V
VAH '" 2.4V
Don't Care
Ordering Information
Temp
Range
Package
Part Number
DG458DJ
-40 to 85'C
16-Pin Plastic DIP
DG459DJ
DG458AK/883
16-Pin CerDIP
-55 to 12S'C
DG459AK/883
DG458AZ/883
LCC-20
DG459AZ/883
'Block DIagram and Pm ConfiguratIOn not shown.
III
Absolute Maximum Ratings
V+toV- ........................................... 44V
V+ toGND .......................................... 22V
V-toGND ........................................ -2SV
VEN, VA Digital Input ................ (V-) -4 Vto(V+) +4 V
Vs, Analog Input Overvoltage
with Power On .................... (V-) -20Vto(V+) +20V
Vs, Analog Input Overvoltage
with Power Off. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -35 V to + 35 V
Continuous Current, S or D ........................... 20 rnA
Peak Current, S or D
(Pulsed all ms, 10% Duty Cycle Max) .................. 40 rnA
P-32167-Rev. C (11/15/93)
Storage Thmperature
(AKSuffix) ............ -65 to 150'C
(DJ Suffix) .. .. .. .. .. ... -65 to 12S'C
Power Dissipation (Package)'
16-PinPlasticDIpb ................................. 600mW
16-Pin CerDIPC ................................... 1000 mW
LCC-2od ......................................... 1000mW
Notes:
a. All leads soldered or welded to PC board.
b. Derate 6.3 mW/,C above 25'C,
c. Derate 12 mW/,C above 75'C.
d. Derate 10 mWI'C above 75'C.
2-35
Siliconix
DG458/459
AMcmber ofthc'I'BMIC Group
Specificationsa
A SuffIX
Test Conditions
Unless Otherwise Specllied
Parameter
-55 to 125·C
D SuffIX
-40 to BS·C
V+ = 15V,V- = -lSV
VAL = 0.8 V, VAH = 2.4
Tempb
10
V
VD = ± 9.5 V, Is = -400 IlA
Room
Full
0.45
1.2
1.5
1.5
loB
IcQ
Vo - ±Sv, IS - -400 IlA
Room
IBO
400
400
Q
dIDS(on)
Vo = 0 V, Is = -4oollA
Room
6
IS(off)
VEN-OV
Vs= ±1OV,Vo= 'l'10V
Room
Full
0.03
0.5
-SO
0.5
50
-1
-20
1
20
DG4SB
Room
Full
0.1
-1
-200
1
200
-1
-SO
1
SO
DG4S9
Room
Full
0.1
-1
-100
1
100
-2
-25
2
25
-SO
SO
-20
20
Symbol
vr
lYPc
Mind JMaxd Mind JMaxd
Unit
Analog Switch
Analog Signal Rangell
Drain-Source On-Resistance
IDS(on) Matching Between
Channelsh
Source Off Leakage Current
lDS(on)
Drain Off
Leakage Current
IO(off)
Differential Off Drain
Leakage Current
IOIFF
Drain On
Leakage Current
-10
Full
VANALOO
VEN=OV
VO= ±10V
Vs = 'l'10V
10
-10
%
nA
IO(on)
Room
DG459 Only
DG4SB
Room
Full
0.1
-2
-200
2
200
-5
-SO
5
SO
DG4S9
Room
Full
0.05
-2
-100
2
100
-25
-s
5
25
Vs= ±33V,VD=OV
See Figure 1
Room
0.02
Vs- ±25V,Vo- ±10V,
See Figure 1
Room
0.005
-5
5
-10
10
Vs= ±25V,Vsups=OV
Vo = Ao, Al,A2,EN = OV
Room
0.001
-2
2
-5
5
Vs=VD=±10V
Fault
Output Leakage Current
(with Overvoltage)
IO(off)
Input Leakage Current
(with Overvoltage)
Input Leakage Current
(with Power Supplies Off)
IS(off)
nA
IlA
lligital Control
O.B
Input Low Threshold
VAL
Full
Input Low Threshold
VAL
Full
2.4
0.8
Logic Input Control
IA
VA - 2.4 VorO.BV
Full
-1
tA
See Figure 2
Room
200
toPEN
See Figure 3
Room
45
Room
Full
140
250
500
250
500
Room
Full
SO
250
500
250
500
2.4
1
-1
1
V
IlA
Ilynamic Characteristics
11'ansition'lime
Break-Before-Make TIlDe
Enable 11Irn-On 'lime
toN(EN)
See Figure 4
Enable Thrn-Off'lime
toFF(EN)
500
10
500
10
ns
1b 0.1 %
Room
0.5
1b 0.01%
Room
1.5
""
OIRR
VEN = OV,RL = 1 IcQ,CL = 15 pF
Vs = 3VRMS,f= 100kHz
Room
90
dB
Logic Input Capacitance
em
f-1MHz
Room
5
Source Off Capacitance
CS(off)
Settling 'lime
Off Isolation
ts
Drain Off Capacitance
CO(ol!)
Drain On Capacitance
CO(on)
2-36
Room
5
DG4SB
Room
15
DG4S9
Room
10
DG4SB
Room
40
DG459
Room
35
pF
P-32167-Rev. C (11115/93)
Siliconix
DG458/459
AMember oftbc TEMIC Group
Specifications a
Test Conditions
Unless Otherwise Specified
Parameter
V+ = 15 v, V- = -15V
VAL = 0.8 V, VAH = 2.4 yf
Symbol
ASutrlX
-55 to 125°C
Tempb
'JYpc
Room
Full
0.05
Room
Full
-0.01
Mind
I
D Suffix
-40 to 85°C
Max d
Mind
I
Maxd
Unit
Power Supplies
Positive Supply Current
1+
Negative Supply Current
1-
VEN = 5.0 or 0 V, VA = OV
Power Supply Range for
Continuous Operation
Room
0.1
0.2
-0.1
-0.2
±4.5
0.1
0.2
rnA
-0.1
-0.2
±18
±4.5
±18
V
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25°C, Full = as determined by the operating temperature suffIX.
c. 'IYpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. When the analog signal exceeds the + 13.5 V or -12 V, f])S(on) starts to rise until only leakage currents flow.
rDS(on) MAX - rDS(on) MIN)
h. arDS(on) = (
rDS(on) AVE
x 100%
TYpical Characteristics
,
Off-Channel Leakage Currents vs. Input Voltage
1 rnA
V~ = 15v '
",......
100 flI\
V- = -15V
10 flI\
Input Leakage vs. Input Voltage
1 rnA
~+~V_I=O~
100 flI\
,,'
"t::
8
i
'"
10 flI\
'"
~
1fl1\
100nA
10nA
I
-
_
InA
100pA
10pA
"
U
I
:.I
I
I-- Operating Range -
~
',,-
-
I
1pA
-50 -40 -30 -20 -10 0
I
r-10 20
VS - Source Voltage (V)
P-32167-Rev. C (11/15/93)
30
§
il
100nA
~
InA
'"I
I
-
40 50
1fl1\
10nA
~ I-- Operating Range -
--l
I
I
100pA
10pA
""
I
•
I
I
'-
1pA
-50 -40 -30 -20 -10 0
-
L
~
10 20
1
30
40 50
VS - Source Voltage (V)
'2-37
Siliconix
DG458/459
AMembcrofthe'I'BMlcGroUP
'iYpical Characteristics (Cont'd)
Output Leakage vs. Off-Channel Overvoltage
1nA
~+ llSt
~
I
j
V- = -15V
~
~
100pA
1pA
~
1/
h
I
1600 !---!l--I--Il-l-+-........c-f'+-f+--I+--I
/'
.~ 10pA
o
,
l"J>s(on) vs. Input Voltage
2000 .---,..-"'-::-T"-a-,.....":"'--.rr-::"""---,.,--,
V
J
0.1pA
-50 -40 -30 -20 -10 0
10
20
30 40
o
50
Vs - Source Voltage (V)
1"»S(on) vs. VD and Temperature
700
~
c:
600
J
t""
25
V+ = 15V
V- = -15V
20
<'
6
500
"~
300
.~
200
~
400
0
0
ell
Q
I
.~~
1\'\
1250~
I-
O°C
~+-'\
-~.~'('"/ ~
.....
~
i
...l
~
"~
100
J
85°C
25°C
'/
-10-7.5 -5.0 -2.5
0
2.5
I
I
5.0
7.5
V~ =15V
V- = -15V
20
10
~
s
..""
0
~ -10
-15
l.."..ooo'
-
"'"
~
I
--
ID(off)
""""'"
IO(on)
V'
-20
-25
10
-15 -12-9 -6
-3
0
3
6
9
12 15
Vo or VS - Drain or Source Voltage (V)
Leakage Currents vs. Temperature
Switching Times (tTRANS. toN. tOFF)
vs. ±VSUPPUES
240
10 on)
200
h
~~
~
:Y
ID(off)
~
~~
25
I
Vo - Drain Voltage (V)
V+ 15V
V- = 15V
Vs, VD = ±10V -
0.10
15
Is~
15
~~
.£' -s I
",-,
10
...."'
10
leakage Current vs. Vs. VD
I
-55°C -
o
5
Vs - Source Voltage (V)
;::::
g
"e
p
IS(off)
160
120
VJN=2V
80
toFF(EN)
0.01 ~
-55 -35 -15
40
5
25
45
65
Thmperature (oq
2-38
85
105 125
±5
±10
±15
±20
V+, V- Positive and Negative Supplies (V)
P-32167-Rev. C (11/15/93)
Siliconix
DG458/459
AMcmbcr afthc TBMICGroUP
lYpical Characteristics (Cont'd)
Switching Times vs. temperature
280 r--r-r-......:r-.----,--":--,--.,---,
240
-10
200
U
~
160
.~
F
120
"e
QINJvs. Vs
0
V+ = 1JV
_ V-=-15V
.!:: -20
=
:s
-30
k
-40
80
40
5
2S
45
65
85
CL
-60
-10
105 125
-5
-100
-90
iii'
:!!..
IIv+ ~i5V II
V- = -15V
RL= lkr.!
~ '\~
2.0
J~ 1-..- ~
~
~
-70 I - -60
"
Crosstalk
' \ Off Isolation
,~
10k
1.0
i'
-50
lOOk
~
± VSUPPIJES
-
--
t--
-
~~
0.5
f'.r-.
1M
10
2.5
~
-80
5
Logic Input Switching Threshold vs.
3.0
Off Isolation and XTALK vs. Frequency
i'o..
o
v s - Source Voltage (V)
Thmperature ('C)
-110
10nF -
-,
~~~-~~-~~-~~~
-55 -35 -15
---./
.--
CL= 1nF
.............
-50
tOFF(EN)
o
.....
o
10M
2.5
f - Frequency (Hz)
5
7.5
10
12.5 15
17.5 20
V+. V- Positive and Negative Supplies (V)
Schematic Diagram (lYPical Channel)
V+
GND
III
D
AX o-~~-----~
EN
Level
Shift
Decode!
Drive
0---+----1
1
1
1
1
1
1
1--
vFigure 1.
P-32167-Rev. C (11/15/93)
2-39
Siliconix
DG458/459
AMember of the TBMIC Group
Test Circuits
+15V
V+
s"
±Vs
V-
I
VD
-15V
Figure 2.
Analog Input Overvoltage
+15V
+2.4 V
EN
v+
3V--
Logic
Input
Slb
50%
•
A2
OV
DG458 SSb
Vo
Switch
Output
Vo
+5V
90%
-5V
. . tA
Figure 3. rransition Tune
+15 V
V+
EN
+2.4 V
Sl> Ss
Logic
Input
+5V
3V
OV
~-S7
~/
L
DG458
DJ>,D
V-
Vo
Switch
Output
50%+
Vo
ov
-
-
Figure 4.
2-40
-r
----tJ~
toPEN
Break-Before-Make Tune
P·32167-Rev. C (11/15/93)
Siliconix
DG458/459
A Member of the 'Il!MIC Group
Test Circuits (Cont'd)
+15 V
Enable 3V
Input
50%
OV
Vs
Switch
Output
Va
Va
50'-1
OV
tON(BN)-'
- Figure S. Enable Delay
Detailed Description
The Sillconix DG458 and DG459 multiplexers are fully
fault- and overvoltage-protected for continuous input
voltages up to ± 35 V whether or not voltage is applied to
the power supply pins (V+, V-). These multiplexers are
built on a high-voltage junction-isolated silicon-gate
CMOS process. Two n-channel and one p-channel
MOSFEI's are connected in series to form each channel
(Figure 17).
Within the normal analog signal range ( ± 10 V), the rDS(on)
variation as a function of analog signal voltage is
comparable to that of the classic parallel N-MOS and
P-MOS switches.
When the analog signal approaches or exceeds either
supply rail, even for an on-channel, one of the three series
MOSFETh gets cut-off, providing inherent protection
against overvoltages even if the multiplexer power supply
voltages are lost. This protection is good up to the
breakdown voltage of the respective series MOSFETs.
Under fault conditions only sub microamp leakage currents
can flow in or out ofthe multiplexer. This not only provides
protection for the multiplexer and succeeding circuitry, but
it allows normal, undisturbed operation of all other
channels. Additionally, in case of power loss to the
multiplexer, the loading caused on the transducers and
signal sources is insignificant, therefore redundant
multiplexers can be used on critical applications such as
telemetry and avionics.
-15V
~
:P~
-~v
f
overv~ft~~ 0SJ.1I~~ilr;- I1F ~;!ltage
1 n
/'F/F F \
01
S
n-Channel
MOSFET
i. On
G
-.:-
Overvoltage
G
-.:-
n-Channel
MOSFET
i. Off
G
-.:-
p-Channel
MOSFET
is Off
-15V
tn fr
02
+15 V
03
+35 V
Overvoltage
\
n-Channel
MOSFET
i. Off
p-Channel
MOSFET
i.Off
(.) Overvoltage with Multiplexer Power Olr
Figure 6.
P-32167-Rev. C (11/15/93)
n-Channel / '
MOSFET
i. On
+15V
(b) Overvoltage with Multiplexer Power On
Overvoltage Protection
2-41
..
Silicanix
DG485
AMem.'ber of the 'lBMIC Group
Octal Analog Switch Array
Features
Benefits
Applications
• Low On-Resistance: 55 g
• Rail-to-Rail Analog Input Range
- Low Signal Distortion
- Devices Can Be Chained for System
Expansion
- Reduced Board Space
- Reduced Switch Errors
- Reduced Power Supply
Requirements
- Simple Interfacing
- Audio Switching and Routing
- Audio 'Thleconferencing
_ Data Acquisition and Industrial
Process Control
- Battery Powered Remote Systems
- Automotive, Avionics and ATE
Systems
-
Serial Interface
Low-Power-PD: 35 nW
TIL and CMOS Compatible
Any Combination of 8 SPST to the
Output
- High Speed-toN: 170 ns
- Summing Amplifiers
Description
The DG485 is an analog switch array consisting of eight
SPST switches connected to a common output. This device
may be used as an 8-channel multiplexer in serial control
applications. Any, all or none of the eight switches may be
closed at any given time. Combining low on-resistance
(rnS(on) 55 g, typ.) and fast switching (toN: 170 ns, typ.),
the DG485 is ideally suited for data acquisition, process
control, communication, and avionic applications.
(via LD) at any point into an octal latch which in turn
controls all switches. RS resets the shift register, forcing all
latch inputs to a low condition (all switches off). 'The serial
input (DIN) and serial output (DOUT) allow daisy chaining
of multiple arrays for large systems.
Contro~ data is input serially into the shift register with each
clock pulse. The shift register contents can be latched-in
Each channel conducts equallywell in either direction when
on and blocks up to rail-to-rail voltages when off.
Built on the Siliconix high voltage silicon gate process the
DG485 has a wide 44-V power supply voltage rating. An
epitaxial layer prevents latchup.
Functional Block Diagrams and Pin Configurations
Dual-In-line
LD
RS
VL
GND
S4
D
D
S]
Ss
Ss
S:l
Sjj
%
S7
Sl
S7
V+
Sa
DIN
V-
CLK
Dour
Sa
8
~ ~ g .:.
o
.~
lbpView
lbpView
2-42
P-32167-Rev. C (11/15/93)
Siliconix
DG485
AMember of the TBMIC Group
1i"uth Tables and Ordering Information
RS
1
1
eLK·
f
f
DIN
D1
Dn
0
0
D n_1
1
1
Dn_1
LD*
f
f
1
~
X
D1
Dn (No Change)
0
X
X
0
0
~
Dn
Ln
SWn
0
0
OFF
1
1
ON
Dn
l.".
(No Change)
*LD Input Level TI-iggered
'CLK Input Edge TI-Iggered
Ordering Information
Thmp Range
-40 to 85'C
-55 to 125'C
Package
Part Number
18-Pin Plastic DIP
DG48501
20-PinPLCC
DG485DN
LCC-20
DG485AZ/883
Absolute Maximum Ratings
Voltages Referenced to VV+ ____ ............................................. 44V
GND ................. _............................. 25V
Digital Inputs'Vs, VD ............... (V-) -2 Vto (V+) + 2 V
or 30 rnA, whichever occurs first
Continuous Current (Any Thrminal) .. _....... _. . . . . . . .. 30 rnA
Current, S or D (Pulsed 1 ms, 10% duty cycle) ........... 100 rnA
Storage Thmperature
(AZ SuffIX) .... _..... '.. -65 to 150'C
(01, DN SuffIX) . . . . . . • .. -65 to 125'C
P-32167-Rev. C (11/15/93)
Power Dissipation (Package)b
18-Pin Plastic DIP" ................................ _ 470 mW
2O-PinPLCC,LCcd ................................ 800mW
Notes:
a. Signals on Sx, Dx or INx exceeding V + or V-will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads soldered or welded to PC board.
c. Derate 6 mWrC above 75'C.
d. Derate 10 mWrC above 75'C.
2-43
..
Siliconix
DG485
AMcmber of the TBMIC Group
Specificationsa
Thst Conditions
Unless Otherwise Specified
Parameter
Symbol
A Suffix
-55 to 125"C
V+ = 15 V, V- = -15V
VL = 5 V, VIN = 2.4 V, 0.8 yf
Thmpb
V+ = 13.5 V, V- = -13.5 V
Is = -smA, VD = ±10V
Room
Full
55
Room
6
Room
Full
0.01
Room
Full
0.1
V± = ±16.5VVS=VD= ±15.5V
One Switch At A TIme
Room
Full
0.11
V± = ±16.5V,Vs=VD= ±15.5V
All Switches On
Room
0.2
'JYpc
Mind
I
D SuffIX
-40 to 85"C
Maxd
Mind
15
-15
I
Maxd
Unit
15
V
85
125
Q
Analog Switcll
Analog Signal Range"
Drain-Source On-Resistance
Delta Drain-Source
On-Resistancel!
l'DS(on)
dI'DS(on)
lS(off)
Switch Off Leakage Current
V+ = 16.5 V, V- = -16.5V
VD= 'f15.5V, Vs= ±15.5V
ID(off)
Channel On Leakage Current
ID(on)
-15
Full
VANALOG
85
125
%
-20
-1
1
20
-1
-10
1
10
-10
-200
10
200
-10
-SO
10
SO
-20
-500
20
500
-20
-SO
20
SO
nA
Input
Input Current with VIN Low
IlL
VIN Under lest = 0.8 V
All Other = 2.4 V
Room
Full
-0.0001
-1
-5
1
5
-1
-5
1
5
Input CUrrent with VIN High
1m
VIN Under lest = 2.4 V
All Other = 0.8 V
Room
Full
0.0001
-1
-5
1
5
-1
-5
1
5
Output Voltage
with VIN Low - DOUT
VOL
10 = 1.6 mA, V+ = 4.5V
Full
0.25
Output Voltage
with VIN High - DOUT
VOH
10 = -801'1\ V+ = 16.5 V
VL=4.75V
Full
4.4
Thrn-On Tune
tON
Vs= ±10V
See Figures 1, 8
Room
Full
170
200
275
200
275
Thrn-Off TIme
tOFF
Vs= ±10V
See Figures 2, 3, 8
Room
Full
150
200
275
200
276
Data Setup TIme
tDs
Data Hold TIme
J1A
SIIl'ial Data Output
0.4
0.4
V
2.7
2.7
Dynamic Charal1teristlcs
Room
Full
40
60
40
60
tDH
Room
Full
40
60
40
60
LOAD Hold TIme
tLH
Room
Full
100
150
100
150
RESET Hold Tune
tRH
Room
Full
100
150
100
150
Room
Full
40
60
40
60
See Figures 4, 8
ImSB'i't to CLOCK t
Charge Injection
Off Isolation"
2-44
Delay
See Figures 5, 8
tDRc
ns
Q
Vs = OV,CL = 1,000pF
Any One Channel
Room
17
pC
OIRR
RL= 50Q,CL= 5pF,f -lMHz
See Figure 9
Room
-75
dB
P-32167-Rev. C (11/15/93)
Siliconix
DG485
AMember of the TEMIC Group
Specificationsa
A SuffIX
-55 to 125'C
D SuffIX
-40toS5'C
Mind I Maxd
Mind IMaxd
Test Conditions
Unless Otherwise Specified
Parameter
V+ = 15V;V- = -15V
VL = 5 V; VIN = 2.4 V; O.S yf
Symbol
Tempb
'Jypc
Unit
Dynamic Characteristics (Cont'd)
Maximum Clock Frequency
feLK
Room
10
Source Off Capacitancee
Cs(or!)
Room
7
Drain Ofr Capacitancee
CD(ofl)
Room
43
Vgen = OV; Rgen = 0 n, f = 1 MHz
One Channel On
Room
53
On-State Capacitancee
CD(on)
Vgen = OV;R~en = On,f= 1 MHz
All hannels On
Room
122
Room
Full
0.001
Room
Full
-0.001
Room
Full
0.001
Room
Full
-0.001
Vgen = OV; Rgen = On,f= 1 MHz
MHz
pF
Powel! Supplies
Positive Supply Current
1+
Negative Supply Current
1-
Logic Supply Current
IL
Ground Current
V+ = 16.5 V; V- = -16.5V
VIN = OorSV; VL = 5.25 V
Dour Open
IGND
3
10
3
10
-3
-10
-3
-10
3
10
t!A
3
10
-3
-10
-3
-10
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25'C, Full = as determined by the operating temperature sufftx.
c. 1Jpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
rDS(o.) MAX - rDS(o.) MIN)
g. For each VD : ArDS(o.) = (
rDS(o.) AVE
lYpical Characteristics
Supply Currents vs. Temperature
1t!Ar-~~~r--r-'--~~--r-~
100nA
V+ = 15V
V- = -lSV
VL=5V
CI
~
j
~
100 pA 1--+--+--:II5I!~-\---If+-I--+--+--I
10 pA
f--h~'F-
I
0.1 pA '---'-_"----'-_-'----''----'-_.J---'-_-'
-50 -30 -10 10 30 50 70 90 110 130
'Thmperature ('C)
P-32167-Rev. C (11/15/93)
120
1--+--1--+--::-11--+-+--1---1
100
1--+--I--+f---IF--1
so 1--+--+-:31'11:---\--+--+--+--1
! 60~~~
Q
1pA~~~~~1--t--r-i--t--l
140
!
40FP
20 1---,--,-
E!
-20 -15 -10
-5
0
5
10
15
20
VD - Drain Voltage (V)
2-45
•
Siliconix
DG485
A:Membcr of tho TBMIC Group
'fYpicaJ Characteristics (Cont'd)
1'))s(on) vs. Vn and Unipolar Power Supply Voltage
400
~
CI
J-
~
.~
300
~
250
1\
200
.~
~
150
Q
100
J
~
~
I 1\.v+=jV
c5
§
CI
-
=Iov I
VL=5V
I = -5mA
350
~ .......
8V
~
' ...... wv
I
12V
15V
-"
50
o
1
o
2
4
6
8
wnw
20
.;
30
M U
g
1>;'
e
1'
60
r5l
I
~
70
40
=
W
-----
90
80
50
Q
1'))s(on) vs. Vn and Temperature
100
=
~
0
I
II
~
<.5
20
1'1
0
+
....'"
....1'1
....'"
...... ......
1_
-55°C
I
o
~l
-w
o
-5
V+ =15V
l00nA _ V- = -15V
VL=5V
10nA _ V orvr= -14V
....'"
.E
-20
~
l00pA
~
-
IDlon)
IpA
"
~~/ ~
10pA
-40
L-_....I-_-'-_ _L-_-'-_-'-_--'
o
-5
5
10
O.OlpA
-50 -30 -10 10
15
30
r--.""
-100
OIRR
~
1.0 ,.,;;z......cl-+---+-..;;::;-......~~~--..c:=_l
0.5 I_-+--+-+--F=-.~--_..I::==-I_-+-_l
9
W n
n
W
V+, V-Positive and Negative Supplies (V)
70
~
.....
.....
-80
90
no
DO
-40 -20
~f\I
1'""
-60
o
D
50
.
-120
2.5
8
r-
RF Characteristics
-140
567
~~
V
Thmperature (og
VD or Vs - Drain or Source Voltage (V)
o
~ """
~(O"
::;;;;0'"
O.lpA
-10
15
Channel On/Off Leakage Currents
vs. Temperature
1J.tA
V+ =15V
V- = -15V
VL=5V
-15
10
5
VD - Drain Voltage (V)
-60
2-46
....J..o""'"
25°C-
"""-
InA
-80
,.,.."",..
v+ =15V
20 - V- = -15V
VL=5V
10
- Is= -5mA
-15
Channel On/Off Leakage Currents
vs. Analog Voltage
40
lrC-
~
-............ -.
VD - Drain Voltage (V)
60
..........
V+ =15V
V-=-15V
VL=5V .
-liiIT~rTm
lk
10k
lOOk
1M
10M
f - Frequency (Hz)
P-32167-Rev. C (11/15/93)
Siliconix
DG485
AMembcr ofthe 'n!MlC G!'OUp
lYPicaJ Characteristics (Cont'd)
Supply Currents vs. Switching Frequency
lOmA
lmA
t-
V+ ='lSV
V- = -15V
VL= 5V
Ji=3V
j
lool1A
.1
1011A
lIlA
loonA
~
~io"
~
V+
1..-" ....
In
I.;"
~
IL
140
"
~ 120
A
~
r:f
./
CD(on
100
(All Channels On) -
J
80
(Channell On Only)
40
10k
lOOk
-15
1M
f - Frequency (Hz)
V+ I=1SV I
60 f- V- = -15V
VL=5V
CD(ofl)
_.--'
45
/
o
30
-
20
Cs(yff)
o
-10
o
-5
5
15
10
10
/
/
/~
2S
/
15
-15
5
V+ I=15V I
V- = -15V
VL=5V
CL=lnF
35
~
10
o
-5
Charge Injection vs. Analog Voltage
55
J
~ '-
-10
VANALOG - Analog Voltage (V)
Source/Drain all' Capacitance
vs. Analog Voltage
70
/
CD~on)
60
1k
..
~"
r
r:l
i""""
100
40
I
VL=5V
10nA
50
~15V
-v- = -15V
160
i"'"
,1.;""" ,
,
r- 11
Source/Drain On Capacitance
vs. Analog Voltage
180
-
5
-5
15
"""'--' /
.-15
VANALOG - Analog Voltage (V)
/
-10
~
~
-5
o
5
10
15
Vs - Source Voltage (V)
Timing Diagrams
LD
OV
Vs---
VD
OV
..
3V
3V
LD
OV
VD
OV
Repeat for All Channels
tON
tOFF
Figure 1. toN from LD
Figure 2. toFF from LD
3V
5O%"'::::.K
RS
ov
Vs
VD
OV
toFF
Figure 3. tOFFfromRS
P-32167-Rev. C (11/15/93)
2-47
Silicanix
DG485
AMember of tho TBMIC Group
Timing Diagrams (Cont'd)
CLOCK
DATA____________________________J~__~------'I'--------------------------
Figure 4.
Data Setup and Hold Tune
LOAD
tRH
,
tDRC
Figure 5. Timing Relationships
RS
~.-----------------~ur------------------------------------
DIN
CLK
LD
Sl
~
~
----~------~----~~~--------____
S-------L-______
______
~
S4
Ss
________
-r----~~
______
~~~
____
S6
S]
Sg
________________
~rI~
________________
~~
Dour
Sl - Sg and Dour are expected output with the drain connected high. The sources require pull-down of 1 kn
Figure 6.
2-48
P-32167-Rev. C (11/15/93)
Siliconix
DG485
AMembcr of the TBMIC Group
Schematic Diagram (lYpical Channel)
V+ O-----------r_----~--------~----~r_----_,
..----------......0
Sl
~--~--~--+--o
D
-------;
DIN
o--t-------\
Level
Octal
Latch
Dn
Shift!
Drive
Shift
Register
CLK
o--t-------\
D8
CLK
LD
Dam
LD
o--t------~ b---------~
o-~~----~
~~
__________- J
-L..------O GND
V-
o-~------------------------------~
Figure 7.
Test Circuits
+15V
+5V
Vs O-----t---I
•
Dt---~--....,
D
S7 DG485
50g
Sa
.------------i
....------1
CLK
IIII
LD
- II
I
I
I
,""",S8'-1II---<:I"O"""...J
50gi
L.._ _ _......
-15V
Figure 8.
Switching Tune Test Circuit
P-32167-Rev. C (11/15/93)
Figure 9.
Adjacent Input Crosstalk
2-49
Silicanix
DG485
AMcmber orthe TBMtc Group
Test Circuits
VO
DG485
-
50Q
S2
50Q
~
50Q
i
I.II
~
I
I
I
........&-1
SgIf
I
Figure 10. Off Isolation
Applications
C~
LD
{
j
L
I
\
tLOGIC
\'----'/
tLOGIC(MIN): 80nsat25·C
150nsatl25·C
X~-...\,----,/
..J.::
I
r-cjl-\
<1>= for CLK and LD inputs of the same frequency.
The recommended phase delay ofLD from CLKis
Vz tLOGIC to tLOGIC:
\,--'-
tLOGIC
V+ = 15V
V- = -15V
GND=OV
....I
I
Figure 11.
DG485
VREF
DG48S
CLK
Figure 12. Multi-Function Circuit Provides Input
Selection, Gain Ranging and Filtering with
Figure.13. Serial DAC Circuit
OneDG485
2-50
P-32167-Rev. C (11115/93)
Siliconix
DG485
AMember ofthe TBMIC Group
Applications (Cont'd)
Rp
R
>--+'--oVOUI'
DG485
DG485
Figure 14. Summing Node Mixer
Figure 15. Multiplexing, Sampling Application
DG485
I
Switch Array
I
I
OcmlLatch
8085
SODI----------------------~--D~rn~1
I
ALEI---i
IDamB~
tID_O_UI''---t-_ _O ThNext
SIR
LD
CLK
D
I
Switch
Array
RS
8212
1(8)1
1-(~8)--------'
WR
'--:-Ad~d:-res-s~B:-U-S")
•
Decoder
8205
1
1--_ _ _ _ _ _ _ _--1
ruSI---------------------------~
Figure 16. Direct Serial Interface (8085)
P·32167-Rev. C (11/15/93)
2-51
Siliconix
DG506N507A
AMember of the TBMlC Group
Single 16-Channel/Differential 8-Channel CMOS
Analog Multiplexers
Features
•
•
•
•
•
•
Low On-Resistance: 240 g
TTL and CMOS Logic Compatible
Low Power: 30mW
Break-Before-Make Switching
44-V Power Supply Rating
Transition Time: 600 ns
Benefits
Applications
•
•
•
•
•
•
•
•
•
Easily Interfaced
Low Power Consumption
Low System Crosstalk
Wide Analog Signal Range
Communication Systems
ATE
Data Acquisition Systems
Audio Signal Routing and Multiplexing
Medical Instrumentation
Description
The DG506A, a 16-channel single-ended analog vultag,es up to the power supply rails, normally 30 V
multiplexer, is designed to connect one of sixteen inputs to peak-ta-peak. An enable (EN) function allows for device
a common output as determined by a 4-bit binary address selection when several multiplexers are used. All control
(Ao, At> A2, A3)' The DG507A, a differentia18-channel inputs, address (Ax) and enable (EN) are TTL or CMOS
analog multiplexer, is designed to connect one of eight compatible over the full specified operating temperature
differential inputs to a common differential outputs as range.
determined by its 3-bit binary address (All, Ai> Ai) logic.
Break-before-make switching action protects against The DG506N507A are fabricated in the SiliconixPLUS-40
process, which includes improved ESD protection for
momentary shorting of the input signals.
ruggedness. An epitaxial layer prevents latch up.
A channel in the on state conducts current equally well in
both directions. In the off state each channel blocks
For widebandlvideo
recommended.
multiplexing,
the
DG536
is
Functional Block Diagrams and Pin Configurations
DGS06A
Dual-In-Line
DGS07A
v+
D
NC
v-
NC
Dual-In-Line
v+
Da
Db
v-
NC
SSa
SSb
EN
GND
Ao
NC
GND
NC
AZ
ThpView
2-52
EN
NC
AZ
ThpView
P-32167-Rev. B (11!15!93)
Siliconix
DG506A!507A
AMember of the TBMlC Group
Functional Block Diagrams and Pin Configurations
'fruth Table -
DG506A
'fruth Table -
A3
A2
AJ
Ao
EN
OnSwitdt
Al
Al
X
X
0
X
X
0
0
0
1
0
1
X
0
0
X
0
1
None
1
2
1
1
0
0
1
0
1
1
3
4
0
0
0
1
1
0
1
1
1
5
6
7
1
1
1
1
1
0
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
0
Ao
On Switch
X
0
1
0
1
None
0
1
0
1
1
1
1
1
1
1
1
1
0
1
1
1
1
8
0
0
0
1
1
1
0
0
9
10
Logic "0"
Logic"!"
1
0
1
0
1
1
1
1
1
1
1
0
0
1
0
1
0
1
0
1
X
1
1
1
1
Ordering Information Temp Range
1
11
1
12
1
1
1
1
13
14
15
16
DG506A
Package
28-Pin Plastic DIP
ParlNumber
DG506ACJ
1
2
1
1
0
1
1
DG507A
EN
3
4
5
6
7
8
VAL :S O.8V
VAH"" 2.4 V
Don't Care
Ordering Information -
DG507 A
lllmp Range
Package
Ot070'C
28-Pin Plastic DIP
ParlNumber
DG507ACJ
Ot070'C
28-Pin eerDlP
-25 to 85'C
-40 to 85'C
28-PinPLCC
28-Pin eerDlP
-55 to 125'C
28-Pin Sidebraze
LCC20·
DG506ACK
DG506ABK
DG506ADN
DG506AAK
28-Pin eerDlP
-55 to 125'C
28-Pin Sidebraze
28-PinLCC
DG507AAK
DG507AAK/883
JM38510/19003BXC
DG507AAZ!883
DG506AAK/883
JM38510/19001BXC
DG506AAZ!883
·Block Diagram and Pin Configuration not shown.
..
Absolute Maximum Ratings
Voltage Referenced to VV+ ................................................. 44V
GND ............................................... 25V
Digitaiinputs', Vs, Vo ............. (V-) -2Vto (V+) +2 Vor
20 rnA, whichever occurs first
Current (Any Thrmina!, Except S or D) .................. 30 rnA
Continuous Current, S or D ........................... 20 rnA
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle Max) .................. 40 rnA
Storage Thmperature
(eerDIP) ........•... " -65 to 150'C
(Plastic DIP) ........... -65 to 125'C
P-32167-Rev. B (11/15193)
Power Dissipation (Package)b
28-PinPlasticDIPC ................................. 625mW
28-Pin eerDlP and Sidebraze ....•. , ..... , .........•. 1200 mW
28-PinPLCC" ....•.•............................. 1200mW
LCC20,28d ••••.•.••..••.•..•••••••.•..•.••••••.. 1000mW
Notes:
a. Signals on Sx, DX or INx exceeding V+ or V- will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads soldered or welded to PC board.
c. Derate 8.3 mWI'C above 75'C.
d. Derate 14 mWI'C above 75'C.
2-53
Silicanix
DG506N507A
AMember oftho TBMIC Group
Speciticationsa
Test Conditions
Unless Otherwise Specified
ASuff"1X
-55 to 125'C
I
B, C, D Suffix
Oto70'C
-25 to 85'C
-40 to 85'C
I
V+ = 15 V, V- = -15V
VIN = 2.4 V, 0.8
Tempb
VANALOG
Full
COSton)
VD = ±10V, Is = -200 tu\
Room
Full
240
odCOS(on)
-10V'
1.0
0.5
±20V
I
0
10
0
20
Charge Injection vs. Analog Voltage
16
_
o
300
.!!l
.i
10
\
J
,
.-.'
"-
~
0
V
250
5
150
4
t:l
100
2
e
..
"-
./
200
§
'".
6
V+ = 15V
r- V- = -15V
~50
j
V- = -15V
8
!
-- "
..... ~
-55'C
.--'
-10
-5
o
5
10
V+I=15V I
r- V- = -15V
o
-15
15
-10
0
-
o
5
10
15
..
Crosstalk vs. Frequency
-20
"""I'"
r-
IJ1 ~1~~vl I
j
..... '"
-80
-4
-100
-6
..... '"
Plastic
..... '"
-60
1'0
CerDrt'"
~I'"
iii'
~
111111111
V- = -15V
ref.O.OdBm
-40
~ ......
-2
-5
Vn - Drain Voltage (V)
0
1+
2
'"
50
Supply Current vs. Switching Frequency
.£
./
zd,c
........
V s - Source Voltage (V)
I..!.
125'C
I
-15
4
r-.....
V
·Of
o
6
±20
vs. VD and Temperature
l'DS(on)
CI
12
g
±15
400
1 .1
V+=15V
14
±1O
±5
V+, V- Positive and Negative Supplies (V)
VD - Drain Voltage (V)
'"
..... '"
'"
-120
10k
lOOk
f - Frequency (Hz)
P-32167-Rev. B (11/15/93)
1M
1k
10k
lOOk
1M
10M
f - Frequency (Hz)
2-55
Siliconix
DG506A!507A
AMcmber ofthe1'EMlc Group
lYPical Characteristics (Cont'd)
Off Isolation vs. Frequency
0
IJ1~1~~vl
II
I
0
Plastic
~
-60
j
.... ~
-80
-100
g
i'i"
-40
i>:
i>:
900
1111111
CerDIP
-20 f- V- = -15V
ref. 0 dBm
iQ
::!..
Switching Time vs. Thmperature
1000
~
~~
vl=l~v
10k
lOOk
1M
V
600
500
,/
, .... ~
,/
....
"
",-
Switching Time vs. Positive Supply Voltage
100nA
1000
800
j
700
5
600
~
500
I\.
]
..........
..........
400
300
tRANS~
14
12
.1 tOPEN 1--:
~
..::i
16
18
20
I
1nA
lOpA
1pA
<'
.e
-5
-10
,/
/
./
/
~'
,"
,,"i '
~
/
/
5
~
~
25
1/
/
,/
/.S(off)
45
65
85
105 125
Thmperature (0C)
20
V-=-15V
Vs= -VD
TA=25°C
,...--..,::..>=.,.=--,;---=;--.::.,----,
-
0
IS(off)
k---""~
~
J
<'
.e
-15 -10
-20
..£I
-40
-60
-15
-5
o
-80
5
Vs - Source Voltage (V)
2-56
/
V+ I=15V I
0
..:'
85 105 125
ID on),ID(off) /
O.lpA
-55 -35 -15
22
IS(oll) vs. Analog Voltage
15
5
65
J+=~5VI
V+ - Positive Supply (V)
10 -
45
/
Leakages vs. Thmperature
1>l, 100pA
200
10
25
",
lOnA _ V- = -15V
VD= ±14V
"" ---
"
Thmperature (0C)
1100
,S
~~
1/~
200
-55 -35 -15
10M
f - Frequency (Hz)
900
-;/
,....,
./
700
300
1k
tRANS
800
400
-120
I
V- = -15V
10
15
-15 -10
-5
0
5
10
15
VD - Drain Voltage (V)
P-32167-Rev. B (11/15/93)
Silicanix
DG506A/507A
AMcmber aftho TBMIC Group
Schematic Diagram (lYPical Channel)
V+
...------,-0 SI
--------1
GND
V+
V-
AX
V+
EN
D
V-
Figure 1.
Test Circuits
+15V
+2.4 V
V+
EN
SI
A3
S:! - SI5
Az
Al DGS06A S16
Ao
GND
-
-
V-
D
Vo
Logic
Input
tr <20ns
tf <20ns
3V
50%
OV
I
-
-
35PF
Switch
Output
Vo
VSI
OV
•
+15 V
Vss
+2.4 V
V+
EN
SIb
DGS07A
Az
Al
Sa ON
Sab
Ao
V-
Db
Vo
• = SI. - Sa .. S2b - S7b. D.
Figure 2. uansition TIme
P-32167-Rev. B (11115/93)
2-57
Bilicanix
DG506A/507A
AMembcr of the TBMIC Group
Test Circuits (Cont'd)
+15 V
r----1r-i A3
V+
SI
A2
At
~ - S16
-5V
1-----,
Ao DGS06A
D t----;p--....,..--o Vo
lk
Logic
Input
3V:j
tr <20ns
50%
tr<20ns
ov
toN(EN)
+15V
OV-----,
Switch
Output
V+
-5V
Sib
Vo
SI. - SS.
~b - SSb 1----,
Vo
DGS07A
,--""'-"1 EN
lk
-
r
Vo
35PF
Figure 3. Enable Switching Tune
+15 V
+2.4 V
EN
Logic
V+
Input
+5V
,
DGS06A
DGS07A
'V-i
50%
OV
D,DbI-'t-_--o Vo
Switch
Output
Vo
Figure 4.
2-58
Break-Before;.Make Interva1
P-32167-Rev. B (11/15/93)
Silicanix
DG506N507A
AMember oftbe TBMIC Group
Application Hints a
v+
v-
Positive Supply
Voltage
(V)
VIN
Logi~IDput
VSorVD
Negative Supply
Voltage
(V)
Voltage
VINH(m1n)/VINL(JJUU<)
Analog Voltage
Range
(V)
(V)
15b
-15
2.4/0.8
-15 to 15
-12 to 12
-10 to 10
-8t08
12
-12
10
-10
2.4/0.8
2.2/0.6
8°
-8
2.0/0.5
Notes:
a. Application Hints are for DESIGN AID ONLY, not guaranteed and not subject to production testing.
Electrical Parameter Chart based on V+ = 15 V, V - = -15 V.
Operation below ± 8 V is not recommended due to shift in VINL(MAX).
b.
c.
Applications
+V
Overvoltage Protection
V+ S Vgs V-
A very convenient form of overvoltage protection consists
of adding two small signal diodes (lN4148, IN914 type) in
series with the supply pins (see Figure 5). This arrangement
effectively blocks the flow of reverse currents. It also floats
the supply pin above or below the normal V + or V - value.
In this case the overvoltage signal actually becomes the
power supply of the Ie. From the point of view of the chip,
nothing has changed, as long as the difference between V S
and the V-rail doesn't exceed +44 V. The addition of
these diodes will reduce the analog signal range to 1 V
below V+ and 1 V above V-, but it preserves the low
channel resistance and low leakage characteristics.
+V
DGS06A
DGS07A
Figure 5.
Channell
Channel 2
1N4148
Overvoltage Protection Using Blocking Diodes
D
Channel 16
S/H
Channel 17
Channel 18
ND
Data
Bus
D
Channel 32
Controller
Figure 6.
P-32167-Rev. B (11/15/93)
A 32-Channel Data Acquisition System
2-59
•
Siliconix
DG508A/509A
A Member of tho TBMIC Group
Single 8-Channel/Differential 4-Channel
CMOS Analog Multiplexers
Features
Benefits
Applications
• Low On-Resistance: 240 Q
• TfL and CMOS Logic Compatible
• Low Power: 30 mW
• Break-Before-Make Switching
• 44-V Power Supply Rating
• Transition Time: 600 ns
•
•
•
•
• Communication Systems
Easily Interfaced
Low Power Consumption
Low System Crosstalk
Wide Analog Signal Range
•
•
•
•
ATE
Data Acquisition Systems
Audio Signal Routing and Multiplexing
Medical Instrumentation
Description
The DGS08A, an 8-channel single-ended analog
multiplexer, is designed to connect one of eight inputs to a'
common output as determined by a 3-bit binary address'
(Ao, Al, A2)·
selection when several multiplexers are used All control
inputs, address (Ax) and enable (EN) are TTL or CMOS
compatible over the full specified operating temperature
range.,
The DGS09A, a dual 4-channel analog multiplexer, is
designed to connect ~:me of four differential inputs 'to a
common output as determined' by its 2-bit binary address
(Ao, Al) logic. Break-before-make switching action
protects against momentary, ~orting of the input signals.
Fabricated in the Siliconix Plus-40 process, the absolute
maximum voltage rating is extended to 44 V, allowing
increased operating headroom for standard ±lS-V signal
swings and operation with ±20-V supplies. An epitaxial
layer prevents latch up.
A channel in the on state conducts current equally well in
both directions. In the off state each channel blocks
voltages up to the power supply rails, normally 30 V
peak-to-peak. An enable (EN) function allows for device
For applications requiring address data latching, the
DGS28/S29 is recommended. DG408/409 is recommended
for higher precision applications. For widebandlvideo
routing and multiplexing, the DGS38A is recommended.
Functional Block Diagrams and Pin Configurations
DGS08A
Dual-In·Line and SOIC
LCC
EN
Ao
At
EN
A2
v-
GND
v+
St
S2
Ss
S3
~
S4
S7
D
Sa
v-
GND
St
v+
NC
NC
S2
Ss
S3
S6
S4
ThpView
2-60
Ao NC At A2
D
NC Sa
ThpView
S7
P-32167-Rev, A (11/15/93)
Siliconix
DG508N509A
A Member of the TBMIC Group
Functional Block Diagrams and Pin Configurations (Cont'd)
Ordering Information - DGS08A
ThmpRange
Package
oto 70°C
16-Pin Plastic DIP
16-Pin CerDIP
16-Pin Narrow SOIC
25 to 85°C
40 to 85°C
16-Pin CerDIP
LCC-20
16-Pin Sidebraze
-55 to 125·C
16-Pin Flat Pack
16-Pin Sidebraze
DG509A
'fruth Table -
Part Number
DGS08A
Ao
EN
On Switch
X
0
1
0
0
1
1
1
None
1
2
3
1
1
0
1
1
1
4
5
A2
Al
DG508ACJ
DG508ABK
DG508ADY
DGS08AAK
X
0
0
X
0
0
0
1
DGS08AAK/883
0
1
1
0
0
1
1
0
1
1
1
DG508AAZ1883
770520lEA
770520lEC
7705201 FA
1
1
1
7705201FC
JM38510/19007BEA
LogicUO"
Logic Ul"
JM38510/19007BEC
X
6
7
8
VAL s 0.8 V
VAH '" 2.4 V
Don't Care
LeC
EN Ao NC Al GND
Dual-In-Line and SOIC
Ao
Al
EN
GND
V-
V+
Sla
Slb
S2a
S2b
S3a
S3b
S4a
S4b
Da
Db
V-
V+
Sla
Slb
NC
NC
S2.
~
S3a
S3b
D. NC Db S4b
'ThpView
S4a
'ThpView
Ordering Information - DGS09A
Temp Range
Package
Ot070·C
-2S t08S·C
-40 to 8S·C
16-Pin Plastic DIP
16-Pin CerDIP
16-Pin Narrow SOIC
16-Pin CerDIP
-55 to 125·C
LCC-20
16-Pin Sidebraze
P-32167-Rev. A (11115/93)
Part Number
DGS09ACJ
DGS09ABK
DGS09ADY
DGS09AAK
DGS09AAK/883
'fruth Thble -
Al
X
0
0
1
1
DGS09A
Ao
EN
On Switch
X
0
1
0
0
1
1
1
None
1
2
3
1
1
•
4
DGS09AAZ/883
Logic "0"
VAL s 0.8 V
JM38S10/190OSBEA
JM38S10/19008BEC
Logic"!"
X
VAH '" 2.4 V
Don't Care
2-61
Siliconix
DG508N509A
AMcm.ber of the TBMIC GrQUP
Absolute Maximum Ratings
Voltage Referenced to V -
,
Power Dissipation (Package}b
16-Pin Plastic DI}'C .................................
16-PinNarrowSOICC ...............................
16-Pin CerDIpd ...... : .............................
LCC20d ..........................................
v+ ................................................. 44V
GND .. , ............................................ 25V
Digitallnputsa, Vs, Vo ........... :. (V-) -2Vto (V+) +2Vor
20 rnA, whichever occurs first
Current (Any'Thrminal, Except S or D) . . • . . • . . • . . • . . . . .. 30 rnA
Continuous Currenl, S or D ................ :.......... 20 rnA
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle Max) .................. 40 rnA
Slorage'Thmperature
(K SuffIX) . . . . • • . . . . . . .. -65 to 150'C
(1 and Y SuffIX) ....•.. " -65 to 125'C
470 mW
600mW
900 mW
900mW
Noles:
a. Signals onSX, DXorlNxexceedingV+ or V- will be clamped by
internal diodes. Limit forward diode current 10 maximum current
ratings.
b. All leads soldered or welded to PC board.
c. Derate 63 mWI'C above 75'C.
d. Derate 12 mWI'C above 75'C.
Speci6cationsa
lest Conditions
Unless Otherwise Specified
Parameter
A Suffix
D SuffIX
-5510 125'C
-401oS5'C
I
I
V+ = 15 V, V- = -15V
VIN = 2.4 V, O.S yf
lempb
VANALOG
Full
roS(on)
Vo = :1:10 V, Is = -200 fAA
Room
Full
240
AroS(on)
-10V--~
AX
Decodel
Drive
I
I
I
I
I
I
~--------~----~,
V-
V+
EN
D
V-
Test Circuits
+15 V
Al
Ao
DGSOSA
S8
t f <20ns
D J---t---1~-o Vo
Logic
Input
tf
3V
<20ns
50%
IMQ
Switch
+15V
Output
Vo
r--..,..-j Al
V+
SI
±lOV
Ao Sla - S4.. Da 1----.,
:flOV
-
Figure 2.
2-66
"fransition Time
P-32167-Rev. A (11/15193)
Siliconix
DG508N509A
AMcmbcr orthe TBMIC Group
Test Circuits (Cont'd)
+15V
V+
-5V
...-_---1 EN
DGS08A
Logic
Inpul
Vo
I
son
Ir <20ns
If <20 ns
3V
50%
OV
35pF
OV
Swilch
OUlpUI
Vo
+15V
Vo
V+
r-_----1EN
Sl. - S4.. D.
S2b - S4b
DGS09A
Vo
Figure 3. Enable Switching Tune
+15V
+2.4 V
V+
EN
AIlS and D.
DG508A
DG509A
r---,.....--t A 2
Db. D
GND
V-
+5V
I---r--"""""-o Vo
Figure 4.
-
1Switch
OUlpUI
Vo
P-32167-Rev. A (11/15/93)
Ir <20ns
-\: 1[<20ns
Logic
Inpul
VS---~~ ~80%
oV
--l I-'-J
IOPEN
Break-Befare-Make Interval
2-67
Siliconix
DG508N509A
AMember ofthe TBMIC Group
Test Circuits (Cont'd)
+15V
V+
Logic 3
Input OV
~VVV---------~Sx
.-------f EN
OFF
OFF
D 1-.,--0 Vo
~o
Switch
Output
11Vo is the measured voltage due to charge transfer error Q,
when the channel turns off.
Q=CLxI1Vo
Figure s.
Charge Injection
+15V
+15V
VIN
VIN
s~
Sf
s~
S~
D
1\0
A1
A2
GND
-
RL
lkn
V-
EN
-
-
OffIsolation
Figure 6.
S1
= 20 log
IV;:
-
D
-
GND
EN
RL
1kQ
V-
-
-15V
I
-
-
Crosstalk = 20 log
IV;: I
Figure 7. Crosstalk
+15V
+15V
V+
V+
S1
I
I
D
Vo
A1
A2
Off Isolation
1\0
Al
A2
GND
Ao
Vo
-
Vo
Meter
S8 1-0--<>---1
Channel {
Select
HP4192A
Impedance
Ailalyzc:r
or EquIValent
EN
RL
1kQ
V-
-15V
-=-
Insertion Loss = 20 log
Figure 8. Insertion Loss
2-68
V+
S1
V+
f=1MHz
IVOlJTI
VIN
Figure 9.
Source Drain Capacitance
P-32167-Rev. A (11/15193)
Siliconix
DG508A!509A
A Member of the TEMIC Group
Applications
(V)
(V)
VIN
Logic Input
Voltage
VlNH(mlnj/VINL(max)
(V)
15
10
12
Sb
-15
-12
-10
-S
2.4/0.S
2.4/0.S
2.4/0.6
2.4/0.4
VNegative Supply
Voltage
V+
Positive Supply
Voltage
VsorVn
Analog Voltage
Range
-15 to 15
-12 to 12
-10 to 10
-8 toS
(V)
Notes:
a. Application Hints are for DESIGN AID ONLY, not guaranteed and not subject to production testing.
b. Operation below ± S V is not recommended.
+15V
Overvoitage Protection
A very convenient form of overvoltage protection consists
of adding two small signal diodes (lN4148, IN914 type) in
series with the supply pins (see Figure 11). This
arrangement effectively blocks the flow of reverse currents.
It also floats the supply pin above or below the normal V +
or V - value. In this case the overvoltage signal actually
becomes the power supply of the Ie. From the point of view
of the chip, nothing has changed, as long as the difference
between Vs and the V- rail doesn't exceed +44 V. The
addition of these diodes will reduce the analog signal range
to 1 VbelowV+ and 1 V above V-, but it preserves the low
channel resistance and low leakage characteristics.
V+
S
Vg
S
v-
1N4148
DGS08A v+
Internal
Junction
D
1N4148
-15V
Figure 10. Overvoltage Protection Using Blocking Diodes
-15V
+15V
Analog
Inf,uts
(Ou puts)
SI
{
I
I
I
I
Al
+5V
OCK
IN 0 - -
DG508A
D
-15V
+15V
Analog
Output
(Input)
Differential~
Analog
Da
Differential
Analog
Outpnt
(Input)
DG509A
Inputs
(Outputs)
A2 EN
EN
+5V
DM7493
J
QA
NC
Q
CLOCK
1/2 MM74C73
IN 0--+--1 CLK
J
Q
1/2MM74C73
'---+--i CLK
NC
Q
K
NC
CLEAR
ENABLE
IN o--+----------------~
(Multiplexer On·Off Control)
Figure 11. 8-Channel Sequential Multiplexer!
Demultiplexer
P-32167-Rev. A (11/15/93)
E~~lCE·o--~--~-------~----~
Figure 12. Differential 4-Channel Sequential Multiplexer!
Demultiplexer
2-69
•
Siliconix
DG528/529
AMcmbcr of the 'Il!MICGroup
Latchable Single 8-Channel/Differential 4-Channel
Analog Multiplexers
Features
Benefits
Applications
•
•
•
•
•
•
•
•
•
•
•
•
•
Low I'DS(on): 270 g
44-V Power Supply Rating
On-Board Address Latches
Break-Before-Make
Low Leakage-ID(on): 30 pA
Improved System Accuracy
Microporcessor Bus Compatible
Easily Interfaced
Reduced Crosstalk
Data Acquisition Systems
Automatic 'Thst Equipment
Avionics and Military Systems
Medical Instrumentation
Description
The DG528 is an 8-channel single-ended analog
multiplexer designed to connect one of eight inputs to a
common output as determined by a 3-bit binary address
(Ao, At. A2)· DG529, a 4-channel dual analog multiplexer,
is designed to connect one of four differential inputs to a
common differential output as determined by its 2-bit
binary address (Ao, AI) logic.
These analog multiplexers have on-chip address and
control latches to simplify design in microprocessor based
applications. Break-before-make switching action protects
against momentary shorting of the input signals. The
DG528/529 are built on the improved PLUS-40 CMOS
process. A buried layer prevents latchup.
The on chip TTL-compatible address latches simplify
digital interface design and reduce board space in data
acquisition systems, proce~s controls, avionics, and ATE.
Functional Block Diagrams and Pin Configurations
DG528
DG529
DG528
Dual-In-Line
Dual-In-Line
WR
RS
An
EN
v-
WR:
RS
Al
An
Al
A2
EN
EN
GND
GND
v-
v+
SI
S2
Ss
Latches
4
18
A2
GND
v-
v+
SI
v+
SI.
SIb
S2
Ss
S6
Sza
S2b
S3
De(:()dersJDrillelll-
S3
S6
S3.
S3b
S4
S7
S4.
S4b
D.
Db
D
S8
-<
-40
~
'±20V
-10
-5
o
5101520
-60
-15
-10
-5
o
5
10
VD - Drain Voltage (V)
VANALOG - Analog Voltage (V)
Input Switching Threshold vs.
V+ and V- Supply Voltages
Supply Currents vs. Toggle Frequency
15
2.5
lIB
4
2.0
@
~
;:t'
..,:,,:,.:: .. ,,:,:,:"::""
3
1.5
1+
2
1.0
~
,/
1/
Ii
./
./
1-
.J.I.+t
0.5
IIII
0
IIII
o
0
'±5
'±10
'±15
V+, V- Positive and Negative Supplies (V)
P-32167-Rev. C (11/15/93)
'±20
lk
10k
lOOk
1M
Thggle Frequency (Hz)
2-73
Siliconix
DG528/529
AMember of the TBMIC Group
Schematic Diagram
V+o---~------~--------------~------.------,
GND
r--T
r----l
I
I
I
_...1
v+
EN <>r-JovV\r--;-!Lot""
S1
I
I
I
v-
v+
......---+'......-+-oD
......----------+---------------~
v-o---+-------~------~------
Figure 1.
Detailed Description
The internal structure of the DG528/DG529 includes a 5-V
logic interface with input protection circuitry followed by a
latch, level shifter, decoder and finally the switch
constructed with parallel n- and p-channel MOSFETh (see
Figure 1).
Following the latches the Qx signals are level shifted and
decoded to provide proper drive levels for the CMOS
switches. This level shifting insures full on/off switch
operation for any analog signal present between the V +
and V-supply rails.
The logic interface circuit compares the TTL input signal
against a TTL threshold reference voltage. The output of
the comparator feeds the data input of a D type latch. The
level sensitive D latch continuo~places the Dx input
signal on the Qx output when the WR input is low, resulting
in transparentlatch operation. As soon as Wit returns high,
the latches hold the data last present on the Dx input,
subject to the minimum input timing requirements.
The EN pin is used to enable the address latches during the
WR pulse. It can be hard-wired to the logic supply or to V +
if one of the channels will always be used (except during a
reset) or it can be tied to addr~ decoding circuitry for
memory mapped operation. The RS pin is used as a master
reset. All latches are cleared re~less of the state of any
other latch or control line. The WR pin is used to transfer
the state of the address control lines to their latches, except
during a reset or when EN is low (see Truth Thbles).
Timing Diagrams
3Vl§
RSo'
50%
'~reh
Output
Figure 2.
2-74
d
tR~FF(RS)---k
Vo--------------------
0--:....---------
:%
Figure 3.
P-32167-Rev. C (11/15/93)
Silicanix
DG528/529
AMembcr ofthcTBMIC Group
Test Circuits
+15 V
-t
1lr <20ns
A1ISandD.
Logic
Input
+5V
DGSl8
DGSl9
...--_-1 A{), AI, (A2)
Db, D 1--_-_._0 Vo
GND WR
V-
Vs
Switch
Output
Vo
Figure 4.
t[<20ns
OV
Break-Before-Make
+15V
lr <20ns
Vo
Logic
Input
tf <20ns
3V
50%
OV
- -
-
-
Switch
Output
Vo
+15V
+2.4 V
VSI
OV
-
V+
VS8
tTRANS
SION
SsON
Vo
Figure S. lransition Tune
P-32167-Rev. C (11/15/93)
2-75
Siliconix
DG528/529
AMember of tho 1'BMICGrOUP
Test Circuits (Cont'd)
+15V
+2.4 V
Logic
Input
tr <20ns
3V
50%
tc <20ns
+15V
Switch
Output
Vo
V+
+2.4 V
RS
-5V
,.....,..-----1 EN
Sla -S4.,Da
S2b - S4b
DGS29
Al
D
WR
V- b I-t"-....,...--o Vo
L......,r----,---r--:-J
GND
Figure 6.
Enable tON/tOFF TIme
+15V
+2.4 V
-
EN
V+
AQ,Al,(A2)
+5V
Sl or Slb
3V
WR
Remaining
Switches
RS
DGS28
DG529
Db,D
V-
-
Vo
Vo
--"r50%
OV
Switch
Output
20%
OV
-
-
-
-
-
Figure 7.
2-76
Write Thrn-On TIme toN(WR)
P-32167-Rev. C (11/15/93)
Silicanix
DG528/529
AMember of the 'I'ElMlC Group
Test Circuits (Cont'd)
+15V
3V
+5V
+2.4 V
RS
Remaining
Switches
DGS28
DG529
50%
OV
-tOFF(RS)
Vo
Vo
Switch
Output
OV
Figure 8.
Reset Thrn-OffTIme tOFF(RS)
+15 V
±15V
Analog
Inputs
V+
>~Al.
____
D_at_a_B_us_ _ _
Processor
System
Bus
A2.
DGS28
RESETO--------I RS
D
Analog
Output
V-
•
-15V
Figure 9.
Bus Interface
Applications
Bus Interfacing
The DG528/DG529 minimize the amount of interface
hardware between a microprocessor system bus and the
analog system being controlled or measured. The internal
TTL compatible latches give these multiplexers write-only
P-32167-Rev. C (11/15193)
memory, that is, they can be programmed to stay in a
particular switch state (e.g., switch Ion) until the
microprocessor determines it is necessary to turn different
switches on or turn all switches off (see Figure 9).
2-77
Silcanix
DG528/529
AMombor of tho 1'8MIC Group
Applications (Cont'd)
The input latches become transparent when WR is held
low; therefore, these multiplexers operate by direct
command of the coded switch state on A2, AI> Ao. In this
mode the DG528 is identical to the popular DG508A. The
same is true of the DG529 versus the popular DG509A.
During system power-up, RS would be low, maintaining all
eight switches in the off state. After RS returned high the
DG528 maintains all switches in the off state. When the
system program performs a write operation to the address
assigned to the DG528, the address decoder provides a CS
active low signal which is gated with the WRITE (WR)
control signal. At this time the data on the DATA BUS (that
will determine which switch to close) is stabilizing. When
the WR signal returns to the high state, (positive edge) the
input latches of theDG528 save the data from the DATA
BUS. The coded information in the Ao, Ai> A2 and EN
latches is decoded and the appropriate switch is turned on.
The EN latch allows all switches to be turned off under
program control. This becomes useful when two or more
DG528s are cascaded to build 16-line and larger
multiplexers.
Application Hints 8
Vm
Positive Supply
v-
Negative Supply
LogicJnput
Voltage
Analog Voltage
Voltage
Vo~
VlNB(mln)/VlNL(max)
Rallge
(V)
(V)
(V)
tv>
20
-20
2.4/0.8
:1:20
15b
-15
2.4/0.8
:1:15
8e
-8 (min)
2.4/0.8
:1:8
v+
VSOl'VIJ
Notes:
a. Application Hints are for DESIGN AID ONLY. not guaranteed and not subject to production testing.
Electrical Parameter Chart based on V+ = 15 V, VL = 5 V, VR = GND.
e. Operation below :I: 8 V is not recommended.
b.
2-78
P-32167-Rev. C (11/15193)
Silicanix
DG534/538
AMembcr of the TBMIC Group
4-/8-Channel Wideband Video Multiplexers
Features
Benefits
Applications
• Wide Bandwidth: 500 MHz
• Very Low Crosstalk: -97 dB @ 5 MHz
• On-Board TIL-Compatible Latches
with Readback
• Optional Negative Supply
•
•
•
•
•
•
• Wideband Signal Routing and
Multiplexing
• Low I'DS(on): 45 g
Improved System Bandwidth
Improved Channel Off-Isolation
Simplified Logic Interfacing
Allows Bipolar Signal Swings
Reduced Insertion Loss
Allows Differential Signal Switching
• Video Switchers
• ATE Systems
• Infrared Imaging
Description
The DG534 is a digitally selectable 4-channel or dual
2-channel multiplexer. The DG538 is an 8-channel or dual
4-channel multiplexer. On-chip TTL-compatible address
decoding logic and latches with data readback are included
to simplify the interface to a microprocessor data bus. The
low on-resistance and low capacitance of the these devices
make them ideal for wideband data multiplexing and video
and audio signal routing in channel selectors and crosspoint
arrays. An optional negative supply pin allows the handling
of bipolar signals without dc biasing.
The DG534/DG538 are built on a D/CMOS process that
combines n-channelDMOS switchingFETh with low-power
CMOS control logic, drivers and latches. The lowcapacitance DMOS PETs are in a "T" configuration to
achieve extremely high levels of off isolation. Crosstalk is
reduced to -97 dB at 5 MHz by including a ground line
between each adjacent signal path.
The DG534A!DG538A are recommended for new designs.
Functional Block Diagrams and Pin Configurations
DGS34DJ
DGS34DN
Dual-In-Line
GND
NC
DA
DB
V+
V-
SAl
SBl
GND
GND
SA2
SB2
4/2
VL
RS
1/0
WR
EN
Al
Ao
PLCC
SAl
GND
SA2
4/2
•
7 1-;---,
I~
.( <' ffi Ig
Top View
ThpView
Not Recommended for New Designs
P-32167-Rev. A (11/15/93)
2-79
Silicanix
DG534/538
AMember of the TBMIC Group
Functional Block Diagrams and Pin Configurations (Cont'd)
DG538DJ
DG538DN
Dual-In-Line
GND
PLCC
~toc~~>J'
GND
GND
SB2
GND
GND
GND
SB2
GND
GND
SID
GND
GND
GND
SB4
VL
Ito
EN
I~ I~
.( .( < ~ IS
1bpView
A2
1bpView
Truth Tables and Ordering Information
Ordering Information - DGS34
ThmpRange
Package
-40 to 85°C
20-Pin Plastic DIP
20-PinPLCC
-55 to 125°C
2O-Pin Sidebraze
Iruth Thble -
i/o
At
Ao
DG534DJ
X
X
X
X
DG534DN
X
X
X
DG534AP
X
X
X
DG534AP/883
0
0
0
0
0
1
0
0
1
0
1
0
X
1
0
0
1
X
Part Number
1
Noteb
DGS34
RS
4/2a
I
1
1
Maintains previous state
X
X
0
X
None (latches cleared)
0
0
X
None
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
SAl
SA2
EN WR
0
0
0
0
0
1
LOgIc "0"
Logic "1"
0
0
0
1
1
Notec
On Switch
DAandDB
maybe
connected
externally
SBl
SB2
SAl and SBl
Latches
'fransparent
SA2and SB2
VAL S O.SV
VAH '" 2V
Don't Care
X
Notes:
a. Connect D A and DB together externally for single-ended operation.
b. With I/O high, An pin becomes output and reflects latch contents. See timing
diagrams for more detail.
c. 412 can be either "I" or "0" but should not change during these operations.
2-80
P-32167-Rev. A (1l/lS/93)
Not Recommended for New Designs
Siliconix
DG534/538
AMember of the 'fBMICGroup
Truth Tables and Ordering Information (Cont'd)
Ordering Information - DG538
ThmpRange
-40 to 85°C
-55 to 125°C
Package
28-Pin Plastic DIP
28-PinPLCC
28-Pin Sidebraze
'Il-uth Table -
Part Number
iJo A2 Al Au
EN
WR RS
DG538
B/4a
On Switch
DG538DJ
X
X
X
X
X
j'
1
1
Maintains previous state
DG538DN
X
X
X
X
X
X
0
X
DG538AP
DG538AP{883
X
X
X
X
0
1
X
None (latches cleared)
None
0
0
0
0
0
0
1
0
0
1
0
1
1
0
1
1
0
0
1
1
1
0
1
1
0
1
1
0
0
0
1
0
1
1
0
0
0
0
0
0
0
0
0
1
1
0
0
1
0
0
0
0
1
1
X
1
1
0
0
X
0
0
X
0
1
X
0
1
1
0
1
1
Noteb
1
1
1
1
1
1
0
1
0
1
1
1
0
1
0
0
1
1
Logic "0"
Logic"!"
X
1
1
SAl
SAl
SA3
SA4
0
SBt
0
0
0
SB2
Sm
SB4
1
1
1
1
Notec
DAandDB
should be
connected
externally
Latches
Transparent
SAt and SBI
SAlandSB2
SA3and SB3
SA4andSB4
VAL s 0.8 V
VAH" 2V
Don't Care
Notes:
a. Connect DA and DB together externally for single-ended operation.
b. With flO high, An pin becomes output and reflects latch contents. See timing
diagrams for more detail.
c. 8/4 can be either "I" or ''0'' but should not change during these operations.
Absolute Maximum Ratings
V+ toGND ................................ -0.3Vto+21 v
V+toV- ................................. -0.3Vto+21 v
v- toGND ................................
-10Vto +0.3 V
VL ..................................... OVto(V+) + 0.3 V
DigitalInputs .................... (V-) -0.3 V to (V+) + 0.3 V
or 20 rnA, whichever occurs first
VS,VD ......................... (V-)-0.3Vto(V-)+14V
or 20 rnA, whichever occurs first
Current (any terminal) Continuous ..................... 20 rnA
Current(S or D) Pulsed 1ms 10% Duty ................. , 40 rnA
Not Recommended for New Designs
Storage Thmperature
(A SuffIX) .. .. .. .. .. .... -65 to 150°C
(D SuffIX) .............. -65 to 125°C
Power Dissipation (Package)a
PlasticDlpb ....................................... 625 mW
PLCC" ........................................... 450 mW
Sidebrazed ....................................... 1200 mW
Notes:
a. All leads soldered or welded to PC board.
b. Derate 8.3 mwrc above 75°C.
c. Derate6mWrCabove75°C,
d. Derate 16 mWrC above 75°c'
P-32167-Rev. A (11/15193)
2-81
Silicanix
DG534/538
AMcmbcr of the TBMIC Group
Speciticationsa
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ =15V,V- = -3V,VL=5V
WR = O.BV,RS,EN= 2V
VANALOG
V- = -5V
ASuff"1X
-55 to 125°C
Thmpb
lYPc
Mind IMaxd
D Suffix
-40 toB5°C
Mind
I
Maxd
Unit
B
V
Analog Switch
Analog Signal Rangel!
Drain-Source
On-Resistance
Resistance Match
Between Channels
roS(on)
~roS(on)
-5
Full
Room
Full
Is = -lOrnA, Vs = OV
VAIL = O.B V, VAllI = 2 V
Sequence Each Switch On
45
B
-5
90
120
90
120
9
9
Q
Room
-5
-5
-50
5
50
-50
5
50
0.1
-20
-500
20
500
-20
-100
20
100
0.1
-20
-1000
20
1000
-20
-200
20
200
Source Off
Leakage Current
ISCoff)
Vs = BV,VD = OV,EN = O.BV
Room
FuI\
0.05
Drain Off
Leakage Current
ID(off)
Vs = OV,VD = BV,EN = 0.8 V
Room
Full
Drain On
Leakage Current
ID(on)
Vs=VD=BV
Room
Full
nA
Digital Control
Input Voltage High
VAllI
Full
Input Voltage Low
VAIL
Full
Address Input Current
IAI
Address Output Current
lAO
2
2
O.B
-1
-10
O.B
VAI=0V,or2Vor5V
Room
Full
-0.1
VAO = 2.7 V
Room
-300
VAO=O.4V
Room
300
PLCC
Room
28
40
40
45
1
10
-1
-10
V
1
10
j.IA
Dynamic Characteristics
On State Input
Capacitance!!
CS(on)
Off State Input
Capacitance!!
CS(off)
Off State Output
Capacitance!!
CD(off)
'Il'ansition 1ime
Break-Before-Make
Interval
DIP
Room
31
45
PLCC
Room
3
5
DIP
Room
4
4
5
10
B
PLCC
Room
6
DIP
Room
B
tTRANS
Room
Full
170
tOPEN
Room
Full
BO
EN, WRThrn On 1ime
tON
Room
Full
1BO
300
500
300
500
EN, ThrnOff1ime
toFF
Room
Full
95
175
300
175
300
Charge Injection
Chip Disabled Crosstalkf
Adjacent Input Crosstalkf
2-82
Qi
XTALK(CD)
Room
-70
RL= 75Q,f= 5 MHz
EN=O.BV
PLCC
Room
-75
DIP
Room
-65
RJN = 10Q,RL = 10kQ
f=5MHz
PLCC
Room
-97
DIP
Room
-B7
RJN = 75Q,RL=75Q
f=5MHz
PLCC
Room
-BO
DIP
Room
-70
XTALK(Al)
P-32167-Rev. A (11115193)
pF
10
300
500
50
25
300
500
50
25
ns
pC
dB
Not Recommended for New Designs
Siliconix
DG534/538
AMember of the TEMICGroup
Specificationsa
A Suff"1X
-55 to 12S'C
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+ = 1SV,V- = -3V,VL= 5V
WR = O.BV,RS,EN= 2V
Tempb
'IYPc
RIN = 10g,RL= 10k.Q
f=SMHz
PLCC
Room
-77
DIP
Room
-72
RIN = 75 g, RL = 75 g
f=SMHz
PLCC
Room
-77
DIP
Room
-72
RIN = 100, RL = 10k.Q
f=SMHz
Room
-B4
RIN=RL=7S0
f=SMHz
Room
-B4
RL=50g
Room
500
Room
Full
0.6
Room
Full
0.6
Mind
I
Maxd
DSuffix
-40 to BS'C
Mind
I
Maxd
Unit
Dynamic Characteristics (Cont'd)
All Hostile Crosstalk
Differential Crosstalk
Bandwidth
XTALK(AH)
XTALK(DIFF)
BW
dB
MHz
Power Supplies
Positive Supply Current
1+
Any One Channel Selected with
Address Inputs at GND or V +
Negative Supply Current
1-
-l.B
-2
2
5
rnA
-l.B
-2
Full
10
21
10
Full
-5.5
0
-5.5
0
V+toGND
Full
10
21
10
21
IL
Full
tRW
Full
SO
SO
tMPW
Full
200
200
Data Valid to Strobe
tnw
Full
100
100
AQ,AJ,EN
Data Valid after Strobe
twn
Full
SO
SO
Address Bus Tri-StateC
Functional Check of
Maximum Operating
Supply Voltage Range
Logic Supply Current
V+toV-
2
5
V- toGND
Functional lest Only
sao
150
21
500
V
J.IA.
Timing
Reset to Write
WR,RS
Minimum Pulse Width
Ao. AJ, EN
See Figure 1
ns
tAZ
Room
2S
Address Bus Output
tAO
Room
95
Address Bus Input
tAl
Room
110
•
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25'C, Full = as determined by the operating temperature suffIX.
c. '!ypical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d.· The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Defined by system bus requirements.
f. Each individual pin shown as GND must be grounded.
g. Guaranteed by design, not subject to production test.
Not Recommended for New Designs
P-32167-Rev. A (11/15/93)
2-83
Siliconix
DG534/538
AMember of tho TBMIC Group
Control Circuitry
EN
An
Xc
Latch
,
At
At
r
I
I
I
I
I
I
I
I
I
I
I
,
A2
r
I
I
I
I
I
I
I
I
I
I
I
vREF
8/4
-,
I
I
I
__ J
v+ I/O
v-
EN
At
• Decode section includes delay circuitry in AND gating to ensure proper break-before-make operation.
•• 1Ypical all digital inputs.
2-84
P-32167-Rev. A (11/15/93)
Not Recommended for New Designs
Silicanix
DG534/538
AMcmbcr of the TeM IC Group
Output Timing Requirements
WR
-r-~
l-tDw-:~1
3V
OV
3V
Ao, Al, A2, EN
X
Don't Care
OV
Write Data
X
Don't Care
Writing Data to Device
WR
Ao, Al, A2, EN
3V
OV
3V
Don't Care
OV
RS 3V
OV
Don't Care
Delay Time Required after Reset before Write
WR
3V --------------------------------------------------------------------OV
3V ----------------~
Driven Bus
OV ________________
-J
I/O 3V
HiZ
HiZ
Device Data' Out
Driven Bus
____________________~----J
OV
Reading Data From Device
• Enable must be latched high to read data, otherwise BUS is high Z. V - s -3 V required for readbaek functionality.
Figure 1.
Applications
To protect against latchup VL must not exceed V + by more
than 0.3 V. This is easily achieved by generating VL from
V + using a Zener or a resistor divider network as shown in
Figure 2. When an external VL is available the alternative
simple protection circuit shown in Figure 3 should be nsed
to prevent triggering the parasitic SCR during power up.
The DG53XA does not require these protection diodes.
,------------1r---<> +15 V
-VL
l8kQ
I
6.8kQ
5.1 V
VREF
7kQ
+15 V
*'
IN914
V+
I
I
I
-.-I
Figure 2.
+5V
--,
V+
DGS34
•
lOkQ
I=1mA
DGS34
GND
VL Generated from V +
Not Recommended for New Designs
Figure 3.
External Diodes Prevent Latchup
P-32l67-Rev. A (11/15/93)
2-85
Siliconix
DG534A/538A
AMcm'bcr of the TBMIC Group
4-/8-Channel Wideband Video Multiplexers
Features
Benefits
Applications
• Wide Bandwidth: 500 MHz
• Vel)' Low Crosstalk: -97 dB @ 5 MHz
• On-Board TIL-Compatible Latches
with Readback
• Optional Negative Supply
•
•
•
•
•
•
•
• Wideband Signal Routing and
Multiplexing
• Low I'J)S(on): 45 Q
• Single-Ended or Differential Operation
• Latch-up Proof
Improved System Bandwidth
Improved Channel Off-Isolation
Simplified Logic Interfacing
High-Speed Readback
Allows Bipolar Signal Swings
Reduced Insertion Loss
Allows Differential Signal Switching
• Video Switchers
• ATE Systems
• Infrared Imaging
• Ultrasound Imaging
Description
The DG534A is a digitally selectable' 4-channel or dual
2-channel multiplexer. The DG538A is an 8-channel or
dual 4-channel multiplexer. On-chip TTL-compatible
address decoding logic and latches with data readback are
included to simplify the interface to a microprocessor data
bus. The low on-resistance and low capacitance of the these
devices make them ideal for wideband data multiplexing
and video and audio signal routing in channel selectors and
crosspoint arrays. An optional negative supply pin allows
the handling of bipolar signals without dc biasing.
The DG534A1DG538A are built on a DlCMOS process
that combines n-channel DMOS switching FEll; with
low-power CMOS control logic, drivers and latches. The
low-capacitance DMOS FETs are connected in a "T"
configuration to achieve extremely high levels of off
isolation. Crosstalk is reduced to -97 dB at 5 MHz by
including a ground line between adjacent signal paths. An
epitaxial layer prevents latch-up.
For more information refer to Siliconix Applications Note
AN502.
Functional Block Diagrams and Pin Configurations
DG534ADJ
DG534ADN
Dual-In-Line
GND
NC
DA
DB
V+
V-
SAl
SBI
GND
GND
SA2
SB2
4/2
VL
RS
I/O
WR
EN
Al
Ao
SAl
GND
ThpView
2-86
P-32167-Rev. C (11/15/93)
Siliconix
DG534N538A
AMember of the TeMlc Group
Functional Block Diagrams and Pin Configurations (Cont'd)
DG538ADJ
DG538ADN
Dual-In-Line
DB
PLCC
V-
. > ..
Q
I
ower SUlJplles
Positive Supply Current
l+
Any One Channel Selected with
Address Inputs at GND or 5 V
Negative Supply Current
1V+toV-
2
5
-1.8
-2
2
5
rnA
-1.8
-2
Full
10
21
10
Full
-5.5
0
-5.s
0
V+toGND
Full
10
21
10
21
IL
Full
150
tRW
Room
Full
-22
tMPW
Room
Full
60
tDW
Room
Full
20
-20
Data Valid after Strobe
two
Room
Full
Address Bus 1'H-Statee
tAZ
Room
2S
Address Bus Output
tAO
Room
95
Address Bus Input
tAl
Room
110
Functional Check of
Maximum Operating
Supply Voltage Range
V-toGND
Logic Supply Current
Functional 'lest Only
500
21
500
V
!lA
Timllig
Reset to Write
WR,RS
Minimum Pulse Width
Ao,Al,BN
Data Valid to Strobe
Ao,Al,BN
See Figure 1
50
50
200
200
100
100
50
50
os
Notes:
a Refer to PROCESS OPTION FLOWCHAKf (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 2S.C, Full = as determined by the operating temperature suffIX.
Co
'JYpieal values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
' .
e. Defined by system bus requirements.
f. Each individual pin shown as GND must be grounded.
g. Guaranteed by design, not subject to production test.
2-90
P-32167-Rev. C (11115/93)
SiliconiX
DG534N538A
AMcmbcr of the Tl!MICGrol.lP
Control Circuitry
---===t-1~~~~
---
------
--- ---
8/4
•
v-
EN
A1
*'!Ypical all Readback (Ax.EN)pms
.
P-32167- Rev. C (11/15/93)
2-91
Siliconix
DG534N538A
A Momber of tho TBMtC Group
lYPicaJ Characteristics
Supply Currents vs. Temperature
1.0
!
fit:
"
~
.........
0.6
-;.t-
0.2
I
-0.2
I~
-0.6
-1.0
10nA
-I-- r-
"
ID(on)
3
- -
I--' I--'
..,.' --~
V
100nA
l1nA
IL
I
U
V+ = 15V
V-=-3V _
VL=5V
-
Leakage vs. Temperature
lIlA
1.4
100pA
10pA
1pA
-1.4
-40
-20
0
20
40
60
-40
80 100 120
-20
0
Thmperature (0C)
20
40
60
80 100 120
Thmperature ("C)
Address, EN Output Current vs. Temperature
8
~
OJ
(Source)
0
!
]
VAo-0.4V
~
-8
~
60
~
50
0
-16
".,..
-24
l/
--
0
20
Supplies
50
100
Full
10
16.5
10
Full
200
200
Full
100
100
Full
50
50
50
100
J1A
16.5
V
Mlnbnum Input Timing Requirements
Strobe Pulse Width
tsw
Ao, Al, A2, A3 CS, CS, EN
Data Valid to Strobe
tDW
Ao, AJ, A2, A3 CS, CS, EN
See Figure 1
two
Data Valid after Strobe
ns
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
b. Room = 25'C, Full = as determined by the operating temperature suffIX.
c. '!ypical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VA = input voltage to perform proper function.
1YPical Characteristics
l"J>s(on) vs. Vn and Temperature
400
~
Cl
360
~
g
320
.iIl
~0
j
.~
~
I
J
-
V~ = +15 v!
GND=OV
I
280
200
40
2
4
~
150
.~
90
I
60
...................-55·C _
i
30
6
Vn - Drain Voltage (V)
P-32167-Rev. B (11/15193)
~
8
8V
0
~
g
I
o
210
180
~
10
•
270 r- GND=OV
TA=25'C
240
I
. / /J
25·s,. "/
~
80
j
rl
)
160
120
Cl
.! S2
through S16) to a common output (D) under the control of
a 4-bit binary address (Ao to A3). The specificinput channel
selected for each address is given in the Truth Table.
All four address inputs have on-chip data latches which are
controlled by the Strobe (ST) input. These latches are
transparent when Strobe is high but they maintain the
chosen address when Strobe goes low. To facilitate easy
microprocessor control in large matrices a choice of three
independent logic inputs (EN, CS and CS) are provided on
chip. These inputs are gated together (see Figure 11) and
only when EN = CS = 1 and CS = 0 can an output switch
be selected. This necessary logic condition is then
latched-in when Strobe (ST) goes low.
A - - Signal
Signal
IN
OUT
Signal
GND
Figure 12. "T" Switch Arrangement
The two second level series switches further improve
crosstalk and help to minimize output capacitance.
The DIS output can be used to signal external circuitry.
DIS is a high impedance to GND when no channel is
selected and a low impedance to GND when anyone
channel is selected.
cs
O----J
The DG535/536 have extensive applications where any high
frequency video or digital signals are switched or routed.
Exceptional crosstalk and bandwidth performance is
achieved by using n-channel DMOS FETs for the ''T'' and
series switches.
EN O - - - - - J
~o_--------------~
Figure 11. CS, CS, EN, ST Control Logic
Break-before-make switching prevents momentary
shorting when changing from one input to another.
The devices feature a two-level switch arrangement
whereby two banks of eight switches (first level) are
connected via two series switches (second level) to a
common DRAIN output.
In order to improve crosstalk all sixteen first level switches
are configured as "T" switches (see Figure 12).
With this method SW2 operates out of phase with SWl and
SW3. In the on condition SWl and SW3 are closed withSW2
open whereas in the off condition SWl and SW3 are open
and SW2 closed. In the off condition the input to SW3 is
effectively the isolation leakage of SWI working into the
on-resistance of SW2 (typically 200 Q).
P·32167-Rev. B (11/15/93)
Figure 13. Cross-Section of a Single DMOS Switch
It can clearly be seen from Figure 13 that there exists a PN
junction between the substrate and the drain/source
terminals.
Should a signal which is negative with respect to the
substrate (GND pin) be connectl Az, A3 - High impedance
1
1
0
1
1
0
X
X
1
1
Actions
An, AI> Az, A3 become outputs and reflect the contents of the Current Event latches.
Bo.
Bl determine which Current Event latches are being read
All crosspoints opened (but data in Next Event latches is preserved)
All other states are not recommended.
2-114
P-32167-Rev. E (11/15/93)
Siliconix
DG884
A Member of the TBMIC Group
"fruth Tables (Cont'd)
WR
Bl
0
0
Bo
0
1
A3
Az
Al
Ao
Next Event Latches
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
IN! to OUT! Loaded
IN2 to OUT! Loaded
IN3 to OUT! Loaded
IN4 to OUT! Loaded
INS to OUT! Loaded
IN6 to OUT! Loaded
IN? to OUT! Loaded
INs to OUTI Loaded
0
X
X
X
Thrn Off OUT! Loaded
0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
IN! to OUT2 Loaded
IN2 to OUT2 Loaded
IN3 to OUT2 Loaded
IN4100UT2Loaded
INstoOUT2Loaded
IN6 toOUT2Loaded
IN?toOUTzLoaded
INs to OUTz Loaded
X
X
X
Thrn OffOUT2 Loaded
0
0
0
0
1
1
0
1
0
1
0
1
0
1
IN! 10 OUT3 Loaded
IN2 to OUT3 Loaded
IN3 to OUT3 Loaded
IN4 to OUT3 Loaded
INs to OUT3 Loaded
IN6 to OUT3 Loaded
IN? 10 OUT3 Loaded
INS to OUT3 Loaded
1
1
0
0
1
0
1
0
0
1
1
0
0
1
1
0
X
X
X
Thrn OffOUT3 Loaded
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
IN! to OUT4Loaded
IN2 10 OUT4Loaded
IN3 to OUT4 Loaded
IN4 to OUT4 Loaded
INs to OUT4 Loaded
IN6 to OUT4 Loaded
IN?loOUT4Loaded
INs to OUT4 Loaded
0
X
X
X
Thrn OffOUT4 Loaded
1
1
1
Note:
1
When WR = 0 Next Event latches are transparent. Each crosspoint is addressed individually, e.g., to connect INI to OUT! thru OUT4
requires AQ, A!, A2 = 0 to be latched with each combination ofBo, BI. When RS = 0, all four DIS outputs pull low simultaneously.
Absolute Maximum Ratings
V+ toGND ................................. -0.3Vt021 V
V+toV- .................................. -0.3Vt021V
V-toGND ................................. -lOVtoO.3V
VLtoGND ............................ OVto(V+)+ 0.3V
Digital Inputs .................... (V -) - 0.3 V to (VL) + 0.3 V
or 20 rnA, whichever occurs first
Vs, Vn ......................... (V-) - 0.3 Vto (V-) + 14 V
or 20 rnA, whichever occurs first
CURRENT (any terminal) Continuous .................. 20 rnA
CURRENT (S or D) Pulsed 1 ms 10% duty . . . . . . . . . . . . .. 40 rnA
P-32167-Rev. E (11/15193)
Storage Thmperature
(A SuffIX) . . . . . . . . . . . . .. -65 to 150"C
(D SuffIX) . . . . . . . . . . . . .. -65 to 125"C
Operating Temperature (ASufflX) .............. -55 to 125"C
(D Suffix) . . . . . .. . . . . . . .. -40 to 85"C
Power Dissipation (Package)"
44-PinQuadJLeadPLCCb .......................... 450mW
44-Pin Quad J Lead Hermetic CLCO' ................. 1200 mW
Notes:
a. All leads soldered or welded to PC board.
b. Derate 6 mWrC above 75"C.
c. Derate16mWrCabove75"C.
2-115
•
Siliconix
DG884
AMomber of the TBMIC Group
Specifications a
Test Conditions
Unless Otherwise Specified
ASufTlX
-55 to 12S'C
V+ = 15 V, V- = -3V
Parameter
Symbol
--Y.!,..= 5 V, RS :' 2.0 V
SALVO, CS, \YR, I/O = O.B V
VANALOG
V- = -5V
Tempb
'JYpc
Mind
I
D Suffix
-40 to BS'C
Maxd
Mind
B
-5
I
Maxd
Unit
B
V
Analog Switch
Analog Signal Range"
Drain-Source On-Resistance
Resistance Match
Between Channels
roS(on)
aroS(on)
-5
Full
45
Is = -lOrnA, VD = OV
VAllI = 2.0 V, VAIL = O.B V
Sequence Each Switch On
Room
Full
90
120
90
120
Room
3
9
9
e
Source Off Leakage Current
lS(off)
Vs = BV,VD = Ov,itS = O.BV
Room
Full
-20
-200
20
200
-20
-200
20
200
Drain Off Leakage Current
ID(off)
Vs = OV,VD = BV,itS = O.BV
Room
Full
-20
-200
20
200
-20
-200
20
200
Thtal Switch On
Leakage Current
ID(on)
VS=VD=BV
Room
Full
-20
-2000
20
2000
-20
-200
20
200
2
nA
Digital Input/Output
Input Voltage High
VAllI
Full
Input Voltage Low
VAIL
Full
Address Input Current
Address Output Current
illS Pin Sink Current
IAI
VAl = OVor2VorSV
Room
Full
0.1
lAO
VAO = 2.7 V, See Truth Thble
Room
-600
VAO = 0.4 V, See Truth Thble
Room
1500
Room
1.5
Room
30
Ims
2
O.B
-1
1
-10
10
O.B
-1
-10
-200
500
V
1
10
-200
(l.A
500
rnA
Dynamic Characteristics
1 In to lOut, See Figure 11
On State Input Capacitancee
CS(on)
Off State Input Capacitance"
CS(off)
1 In to 4 Out, See Figure 11
See Figure 11
40
Room
120
Room
B
20
160
10
20
20
Off State Output Capacitance·
CD(off)
Room
Transition TIme
tTRANs
Room
Break-Before-Make Interval
tOPEN
Full
10
10
SAL"VO, WR Thrn On TIme
toN
Room
Full
300
300
SALVO, WJ{Thrn Off TIme
toFf
Charge Injection
See Figure 5
RL= 1 ke,CL = 35 pF
50% Control to 90% Output
See Figure 3
500
175
Room
Full
ns
175
300
See Figure 6
Room
-100
Matrix Disabled Crosstalk
XTALK(DIS)
RIN =RL= 7Se
f = 5 MHz, See Figure 10
Room
-82
Adjacent Input Crosstalk
XTALK(Al)
RIN = 10e, RL = 10ke
f = 5 MHz, See Figure 9
Room
-85
All Hostile Crosstalk
XTALK(AH)
RIN = 10e,RL = lOke
f = 5 MHz, See Figure 8
Room
-66
BW
RL = 50 e, See Figure 7
Room
300
2-116
20
300
Q
Bandwidth
pF
pC
dB
MHz
P-32167-Rev. E (11115/93)
Siliconix
DG884
AMcmbcr of the TeMIC Group
Specificationsa
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V+=15V,V-=-3V
VL = 5V, RS = 2.0V
SALVO, CS, WR, 1/0 = 0.8 V
ASuiTlX
-55 to 125°C
Tempb
'lYPc
Room
Full
1.5
Room
Full
-1.5
Mind
I
Maxd
D SuiTlX
-40 to 85°C
Mind
I
Maxd
Unit
Power Supplies
Positive Supply Current
1+
Negative Supply Current
1-
Digital GND Supply Current
IDG
Full
-275
IL
Full
200
Logic Supply Current
V+toVFunctional Operating Supply
Voltage Rangee
V-toGND
V+toGND
All Inputs At GND or 2 V
RS=2V
See Operating Voltage Range
(1Ypica1 Characteristics)
page 2-118
3
6
3
6
rnA
-3
-3
-5
-5
-750
-750
500
500
Full
13
20
13
Full
-5.5
0
-5.5
0
Full
10
20
10
20
IlA
20
V
Minbnum Input Timing Requirements
Address Write TIme
tAW
Full
20
50
50
Minimum WR Pulse Width
twp
Full
50
100
100
Write Address TIme
tWA
Full
-10
10
10
Chip Select Write TIme
tew
Full
50
100
100
Write Chip Select TIme
twe
Full
25
75
75
Minimum SALVO Pulse Width
tsp
Full
50
100
100
SALVO Write TIme
tsw
Full
-to
to
Write SALVO TIme
tws
Room
20
Input Output TIme
tIO
Room
150
200
200
Address Output TIme
tAO
Room
150
200
200
Chip Select Output TIme
teo
Room
150
200
Chip Select Address TIme
teA
Room
60
Reset to SALVO
tRs
Full
1/0 Address Input TIme
See Figure 1
tlA
Room
10
50
us
200
100
50
50
50
Notes:
a. Refer to PROCESS OPTION FLOWCHART (Section 5 of the 1994 Data Book or FaxBack number 7103).
Room = 25°C, Full = as determined by the operating temperature suffIX.
c. 1Ypica1 values are for DESIGN AID ONLY, not guaranteed nor SUbject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
•
b.
P-32167-Rev. E (11/15/93)
2-117
Siliconix
DG884
AMember of the TsMICGrOUP
'IYPical Characteristics
Adjacent Input Crosstalk
120
100
..,5'I
Matrix Disabled Crosstalk
120
100
......... r-...
r--....
.......
...
~
80
~
1
........
60
80
...... ~
..........
60
40
....
40
20
20
10
100
10
1
f - Frequency (MHz)
All Hostile Crosstalk
100
80
21
..... ......
19
r--...
,
100
f - Frequency (MHz)
,
~
.?;>
c..
c..
17
·il"
15
Operating Voltage Area
............
i'-.....
bl
...
~
I
I'... r--......
......
Operating Voltage Area
13
+
>
20
11
o
10
100
9
o
-2
-1
-3
-4
-5
-6
V - - Negative Supply (V)
f - Frequency (MHz)
Timing Diagrams and Parameter Definitions
Symbol
Parameter
TAW
TWA
Twp
Address to Write
Write to Address
Tcw
Twc
Tsp
Chip Select to WR
Minimum time chip select must be valid before a WR pulse
WI( to Chip Select
Minimum time chip select must remain valid after WR pulse
Tws
Tsw
TIA
2-118
WRPuise
SALVO Pulse
Desc:ription
Minimum time address must be valid before WR goes higb
Minimum time address must remain valid after WR pulse goes high
Minimum time of WR pulse width to write address into Next Event latches
Minimum time of SALVO pulse width
WR to SALVO
Minimum time from WR pulse to SALVO to load new address
SALVOtoWR
Minimum time from SALVO pulse to WR to load current address
1/0 to Address In
Minimum time 1/0 must be valid before address applied
P-32167-Rev. E (11/15/93)
Siliconix
DG884
AMember ofthe TBMIC Group
Timing Diagrams and Parameter Definitions (Cont'd)
Symb!ll
Parameter
TRS
TIO
TAO
Teo
TCA
RStoSALVO
Add"",
Address
,\a-A,
Minimum time address Bx must be valid until address Ax output valid
CStoOutput
Minimum time CS must be valid until Ax output is valid
Minimum time CS must be valid before address applied ialO is high
CS to Address In
'ESlor
Bo-BL
Minimum time 'flO must be valid before address output valid
I/O to Output
Address to Output
~,___________
Pk_~_t_rin~g_~_~_OO~_A
__________- ,
Device A
esfor
DeviceB
Descripti!lD
Minimum time RS must be valid before SALVO pulse
I
~t~-I
Presetting Device B
*. _ _
-rMIr--:-~~
Select: Output 1
n
_ _
Input
I
se_lcct
__
In.:..Pu_t-.;
Select Output 2
Select Input
tJ..J
lio
L
I
I
I I
I
twp !-'"""''-I-- tA"w
I tWA II II
I I-- tA'w
i'WAv
I . I
I I
r-----i
I
tw, I~ I t,w ---...I
b+I l.- tew --I
' - - twc ----'~
I L_-"I'-.. 1
I _ tew ----'I
II
I
I
---.......:
I•
r----l
""10;
res
--------------------------------~'~~-~-~-~-Qxwfu--ool_-a-,~--Y__
-n-m__
-.~-__
-M-,-~--~-am__--.~-t~--D-t!!--~-e-.~--m__
-ga-__
-eu-w-~--~7~1--------
__
__
I
!..2W
tw,
_-.! . - L
~
___
I
t,p
I
II
<' ~
I I
--t .... t--
Figure 1. Input Tuning Requirements
~...________In
__
~rr_~~lm~g~DM
__oo~
__
A ______~~
CSCor
Device A
I
I
Csfar
DeviceB
I
j-
ICO
JI
Addreu
DO-Bl
LatcllN
lCA
I
I
I
1---1
~~~~ _o_U~~_UI__-_-_-_-_-_-_-_-_-_-_-_-_~~::::::::::~~::::OU::tN:::::~~_-_-_-_-_-_-~~~~:_:_:_:_:_:_~:_:_:_~~::::~------_____
WR
~ ------------------rl--------------------------------------------------------~---------' - - 110
-----,
I~----------------------------------------~
liO~
Figure 2.
P-32167--Revoo E (11/15/93)
Output Tuning Requirements
2-119
•
Silicanix
DG884
AMember of the TBMIC Group
Test Circuits
-3V
lV
5V
15V
3V
Vo
INl
GND
SALVO
DGND
MpFl
lW
DG884
IN2 - INs
-
/
AQ,A},A2 OV
OUTl
-
SALVO
Ao, Al,A2
Bo Bl I/O es WR A3 RS
3V
50%
OV
I
I
:Ii
lV
Vo
1
90%
I I
H
ION
-
-
-3V
3V
5V
IOFF
Figure 3. SALVO Turn On/Off Tune
15V
3V
Vo
INl
lV
DGND
lW
DG884
/
AQ,Al,A2 OV
OUTl
GND
35 PF
IN2 - INs
-
I
-
WR
3V
50%
OV
Vo
lV
I
I
:II
1
90%
90%
I I
H
tON
-3V
5V
15V
3V
INl
Vo
OUTl
GND
AQ,A},A2 OV
Vo
DGND
DG884
INs
IN2 - IN7
-
toFF
Figure 4. WR Tum On/Off Time
-
lV
90%
lW
WR
AQ,A},A2
Bo Bl I/Oes SALVO A3 RS
-
f
50%
: "LJ.90%
I I
I
I
I
I" I
",
1.----1
I
tTRANS
tSBM
I
-
2-120
3V
Figure 5. rransition Tune and Break-Before-Make Interval
P-32167-Rev. E (11/15/93)
Siliconix
DG884
AMember oflhc TeMIC Group
Test Circuits
-3V
l5V
5V
-3V
r----i INI
I
t---IDGND
-==------'
, - - - - - - 1 INa
Vo
t---fGND
DG884
A3
Vo
GND
DGND
35pF
DG884
WR
WR
An,
AI,
A2 Be BI I/o
l5V
5V
An- A3
cs SALVO RS
Be BI liD
cs SALVO WR RS
5V
5V
Figure 7.
Figure 6. Charge Injection
Anyone input to anyone .---------------11""""0 Vo
output-all remaining
Outputs
inputs connected to
remaining outputs
-3 dB Bandwidth
Any input or output pin to
adjacent input or output pin
RIN
10C
RIN
10C
Inputs t--Cl--+--+--I---+-
Signal
v
Signal
Generator N
75C
Generator
XrALK(AH) =
20 logto
75C
VOUT
V-
AII crosspoints open
r--
(
Outputs
--,.:;--.,
~
RIN
10C
= 20 loglo
Vn + 1
or 20 loglo
-v;;-
Figure 9. Adjacent Input Crosstalk
:i~
Vo
•
75
Inputs
Meter
HP4l92A
Impedance
Analyzer
or Equivalent
-
5V
"0" = Off-State
"1" == On-State
V
N
V
-v:n_1
XrALK(AI)
Figure 8. All Hostile Crosstalk
Signal
Generator
75C
Vn+l
XrALK(D1S)
VOUT
= 20 loglo V-3V 15V
Figure 10. Matrix Disabled Crosstalk
P·32167-Rev. E (11/15/93)
Figure 11. On-State and Off-State Capacitances
2-121
Siliconix
DG884
AMomber oftheTBMIC Group
Pin Description
Pin
Symbol
1, 3, 4, 6, 8, 10, 12,
14, 16, 18, 20, 41, 43
GND
39
DGND
26
V+
Positive Supply Voltage
21
V-
Negative Supply Voltage
Logic Supply Voltage-generally 5 V
Desd.'iption
Analog Signal Ground
Digital Ground
38
VL
5, 7, 9, 11, 13, 15,
17,19
INl to INs
2, 40, 42, 44
OUI'ltoOUI'4
29
iiO
Determines whether data is being written into the Next Event latches or read from the Current Event latches
30
CS
Chip Select-a logic input
31,32, 22, 24
Ao, Al,A'b A3
27,28
Bo,Bl
35
Wi'{
36
SALVO
37
RS
22, 23, 24, 25
DISl toDI~
8 Analog Input Channels
4 Analog Output Channels
IN Address-logic inputs or outputs as defined by I/O pin, select one of eight IN channels
OUI' Address-logic inputs, select one of four OUI' channels
Write command that latches Ao, Ah A'b A3 into the Next Event latches
Master write command, that in one action, transfers all the data from Next Event latches into Current Event
latches
Reset-a low will clear the Current Event latches
Open drain disable outputs-these outputs pull low when the corresponding OUI' channel is off
Device Description
The DG884 is the world's first monolithic wideband
crosspoint array that operates from dc to > 100 MHz. The
DG884 offers the ability to route anyone of eight input
signals to anyone of four OUT pins. Any input can be
routed to one, two, three or four OUTs simultaneously with
no risk of shorting inputs together (guaranteed by design).
Each crosspoint is configured as a "T" switch in which
DMOS FETh are used due to their excellent low resistance
and low capacitance characteristics. Each OUT line has a
series switch that minimizes capacitive loading when the
OUT is off.
Interfacing
The DG884 was designed to allow complex matrices to be
developed while maintaining a simple control interface.
The status of the I/o pin determines whether the DG884 is
being written to or read from (see Figures 1 and 2).
In order to WRITE to an individual latch, CS and I/o need
to be low, while RS, WR and SALVO must be high. The IN
to OUT path is selected by using address Ao through A3 to
define the IN line and address Bo and Bl to define the OUT
line. That is, The IN defined by Ao throUghA3 is electrically
2-122
connected to the OUT defined by Bo, Bl' This chosen path
is loaded into the Next Event latches when WR goes low
and returns high again. This operation is repeated up to
three more times if other crosspoint connections need to be
changed.
Upon completing all crosspoint connections that are to be
changed in a single device, other DG884s can be similarly
preset by taking the CS pin low on the appropriate device.
When all DG884s are preset, the Current Event latches are
simultaneously changed by a single SALVO command
applied to all devices. In this manner the crosspoint
configuration of any number of devices can be
simultaneously updated.
DIS Outputs
Four open drain disable OUTs are provided to control
external line drivers or to provide visual or electrical
signaling. For example, any or all of the DIS OUTs can
directly interface with a Siliconix Si582 Video Amplifier to
place it into a high impedance, low-power standby mode
when the corresponding OUT is not being used. (See
Figure 15). The DIS outputs are low and sink to V-when
corresponding OUT is open or RS is low.
P-32167-Rev. E (11/15/93)
Siliconix
DG884
AMcmber o{tho TBMIC Group
Device Description (Cont'd)
Reset
Readback
The reset function (RS) allows the resetting of all
crosspoints to a known state (open). At power up, the reset
facility may be used to guarantee that all switches are open.
It should be noted that RS clears the Current Event latches,
but the Next Event latches remain unchanged. This useful
facility allows the user to return the matrix to its previous
state (prior to reset) by simply applying the SALVO
command. Alternatively, the user can reprogram the Next
Event latches, and then apply the SALVO command to
reconfigure the matrix to a new state.
The 110 facility enables the user to write data to the Next
Event latches or to read the contents of the Current Event
latches. This feature permits the central controller to
periodically monitor the state of the matrix. If a power loss
to the controller occurs, the readback feature helps the
matrix to recover rapidly. It also offers a means to perform
PC board diagnostics both in production and in system
operation.
8 Analog Inputs
OUTt
flO
OUT2
4
RS
o-~4-~------~~~-----------4--~
~o-~~------~~~
fiM
At o--t-r----------~~~
A
Iii""
~~
to.
Z
7
-
~~
'til!
@'L:
Ii,,"
9
OUT3
00
3
Bo
Bt
0--+-+-01-..,--,
o--t-r-tH
CSC:=!=~~===~L~
OUT4
WR 0
DIS3
Mux 3 Decoder
Open Drain
Output
•
SALVO o-------------------------------------~
One of Four Blocks of Logic/Latches Shown
Figure 12. Control Circuitry
P-32167-Rev. E (11/15/93)
2-123
Silicanix
DG884
A Member of tho TBMIC Group
Applications
WR
SALVO
1Wo-Si584
Quad Unity·Gain Buffersr-_ _...JL-_...JL-_ _- - ,
SiS8l
DlSj
f2
1m2
I
DG884
I
I
I
I
I
INs
IDS3
DIS4
@---+--1
RESET
Note: ])JS outputs are used to power down the Si582 amplifiers.
Figure 13. Fully Buffered 8 X 4 Crosspoint
Power Supplies and Decoupling
A useful feature of the DG884 is its power supply flexibility.
It can be operated from dual supplies, or a single positive
supply (V-connected to 0 V) if required. Allowable
operating voltage ranges are shown in Operating Voltage
Range (IYpical Characteristics) graph, page 2-118.
Note that the analog signal must not go below V-by more
than 0.3 V (see absolute maximum ratings). However, the
addition of a V - pin has a number of advantages:
1) It allows flexibility in analog signal handling, i.e. with
V- = -5 V andV+ = 15 V; up to ±5Vacsignaiscan
be accepted.
2) The value of on-capacitance (CS(on» may be reduced
by increasing the value of V -. It is useful to note that
optimum video differential phase and gain occur when
V- is -3 V. Note that V+ has no effect on CS(oo).
3) V-eliminates the need to bias an ac analog signal using
potential dividers and large decoupling capacitors.
It is established RF design practice to incorporate sufficient
bypass capacitors in the circuit to decouple the power
supplies to all active devices in the circuit. The dynamic
performance of the DG884 is adversely affected by poor
decoupling of power supply pins. Also, since the substrate
of the device is connected to the negative supply, proper
decoupling of this pin is essential.
Rules:
1) Decoupling capacitors should be incorporated on all
power supply pins (V +, V -, VL ).
2-124
2) They should be mounted as close as possible to the
device pins.
3) Capacitors should have good high frequency
characteristics-tantalum bead and/or monolithic
ceramic disc types are suitable.
Recommended decoupling capacitors are 1- to 10-I1F
tantalum bead, in parallel with 1oo-nF monolithic ceramic.
4) Additional high frequency protection may be
provided by 51-g carbon film resistors connected in
series with the power supply pins (see Figure 14).
+
~-¥l
V+
DG884
Cl = 111FThotaium
~ = 100 of Ceramic
Figure 14. DG884 Power Supply Decoupling
P-32167-Rev. E (11/15/93)
Biliconix
DG884
A Member of the TBMlC Group
Applications (Cont'd)
The VL pin permits interface to various logic types. The
device is primarily designed to be TTL or CMOS logic
compatible with +5 V applied to VL. The actual logic
threshold can be raised simply by increasing VL.
A typical switching threshold versus VL is shown in
Figure 15.
5
./
"tl
"0
""il
4
~
3
.3,
2
.~
,/
:>
/
1
o ./
o
V
Layout
,V
The PLCC package pinout is optimized so that large
crosspoint arrays can be easily implemented with a
minimum number of PCB layers (see Figure 16). Crosstalk
is minimized and off-isolation is optimized by having
ground pins located adjacent to each input and output
signal pins. Optimum off-isolation and low crosstalk
performance can only be achieved by the proper use of RF
layout techniques: avoid sockets, use ground planes, avoid
ground loops, bypass the power supplies with high
frequency type capacitors (low ESR, low ESL), use
striplines to maintain transmission line impedance
matching.
/
oS
/'
2
4
6
8
10 12 14
VL - Logic Supply (V)
16
18
Figure IS. Switching Threshold Voltage vs. VL
These devices feature an address readback facility whereby
the last address written to the device may be read by the
(;--(;---
~
I
Out
Bus
I
When the I/O assigns the address output condition, the Ax
address pins can sink or source current for logic low and
high, respectively. Note that VL is the logic high output
condition. This point must be respected if VL is varied for
input logic threshold shifting.
Note: Even though these devices are designed to be latchup
resistant, V L must not exceed V + by more than 0.3 V in
operation or during power supply on/off sequencing.
6
~
system. This allows improved status monitoring and hand
shaking without additional external components.
For additional information please refer to Application
Note AN504.
~
OJ
J'Q
~
~
I
Out
Bus
I
OJ
J'Q
~
"tl
;e
----
In
Bus
--t>
In
Bus
----
•
---)
----
In
Bus
In
Bus
--- -
----
9
Out
Bus
9
Out
Bus
Figure 16. 16 X 8 Expandable Crosspoint Matrix Using DG884
P·32167-Rev. E (11/15/93)
2-125
Siliconix
DG894
AMember of tho TsMIC Group
Component Video Selector
Feature\S
Benefits
Applications
• Wide Bandwidth: 200 MHz
• Very Low Crosstalk: -70 dB at 5 MHz
• CMOS Compatible
• J2c Bus Compatible
• Fast Switching-tON: <200 ns
•
•
•
•
•
• Component Video Switching:
RGB + SYNC, S-VHS, Y-C, etc.
Low Insertion Loss
Improved System Performance
Reduced Power Consumption
Easily Interfaced
Future System Expansion via I2C Bus
• AudioNideo Routing
• Digital TV
• ATE
• J2c Bus AudioNideo Systems
• SCART Video Switching
• Lowl'])s(on): 44Q
• Single Supply Capability
Description
The DG894 is a monolithic video selector designed for
switching a variety of component video signals. The low
on-resistance and low capacitance of the DG894 make it
ideal for video/audio signal routing. Switch control can be
through direct CMOS addressing or through the two-wire
IZCbus.
.
The DG894 is built on the Siliconix proprietary D/CMOS
process that combines n-channel DMOS switching FE'Th
with low-power CMOS control logic and drivers.
Low-capacitance DMOS FEIS are used to achieve high
levels of off isolation at low cost.
Functional Block Diagram and Pin Configuration
Dual-In-Line and SOIC
'Iruth Thble
VDD
Y1
GND
SMO
Sm.
Yo
0
0
12c Bus Operation. Address Ao = "1"
VDD
0
1
1
0
12c Bus Operation. Address Ao = "0"
Cour
Your
SMa
SCL
Vss
SDA
0
1
1
1
1
0
0
0
0
1
1
1
0
1
0
1
1
1
1
Raur
SDA
1
1
Gour
SEL
1
SCL
Fundioll/Switth On
0
1
All switches off
0
Yo. Co
Y1,C1
1
Y20~
0
R1. Glo B1. F1
R20 G20 B20 F2
1
0
R1. G1. B1. Flo Y1. C1
R20 G:u B20 F20 Y20 ~
1
Bour
FBour
Ordering Information
FB2
Temp Range
-40 to BS·C
Part Number
Pacltaae
28-Pin Plastic DIP
DG894DJ
28-Pin Wide Body SOIC
DGB94DW
1bpView
2-126
P-32167-Rev. C (1l/lS/93)
Siliconix
DG894
AMember of the TeMic Group
Absolute Maximum Ratings
V+ toGND ................................. -0.3Vto19V
V+toV- .................................. -0.3Vto19V
V- toGND ................................. -10Vto 0.3 V
Digital Inputs .................... GND -0.3 V to (V+) +0.3 V
or 20 rnA, whichever occurs first
Signal Inputs .............................. V ss -0.3 V to 8 V
or 20 rnA, whichever occurs first
Continuous Current (Any Thrminal) .................... 20 rnA
Current (Any Thrminal) Pulsed 1 ms, 10% Duty Cycle Max . 40 rnA
Storage Thmperature . . . . . . . . . . . . . . . . .. . . .. . . ... -65 to 125°C
Power Dissipation (Package)'
28-PinPlasticDIP .................................. 625mW
28-Pin Wide Body SOIC ............................. 450 mW
Notes:
a. All leads welded or soldered to PC board.
Specifications
Limits
-40 to 85°C
Test Conditions
Unless Otherwise Specified
Parameter
Symhol
VDD = 12 V, Vss = -5 V
VINH = 3 V, VINL = 1.5 yo
Temp'
Mine
l1YPb
I
Max"
Unit
Analog Switch
Analog Signal Ranged
Drain-Source On-Resistance
Resistance Match Between Channels
VANALOG
roS(on)
VDD = 12 V, Vss = GND
Full
0
4
VDD = 12 V, Vss = -5V
Full
-2
2
Is = -lOrnA, VD = OV
Aros(on)
V
Room
Full
44
51
Room
10
100
150
Source Off Leakag" Curr"nt
IS(off)
VS=4V,VD=OV
Room
Full
-10
-100
-0.05
10
100
Drain Off Leakage Current
ID(off)
VD =4 V,Vs = OV
Room
Full
-10
-100
-0.05
10
100
Thtal Switch On Leakage Current
ID(on)
VD=Vs=4V
Room
Full
-10
-100
-0.07
10
100
VINH
Full
3
VINL
Full
2.55
Vth
Room
2.55
Q
nA
Input
Input Voltage High
Input Voltage Low
Input Threshold
Thmp Coefficient of Input Threshold
Input Current
Output Voltage Low
2.55
1.5
Ilvrc
-200
TCth
Full
lIN
VIN = GND or VDD
Room
Full
VOL
Pin 21, During Acknowledge, IOL = 3 rnA
Room
Cut
Pin21,22
Room
3
10
CS(on)
VS=VD=OV
Room
10
15
-1
-20
0.05
V
1
20
f1.A
0.4
V
Dynamic
Input Capacitanced
On State Input Capacitanced
Off State Input Capacitanced
CS(off)
Vs=OV
Room
4
8
Off State Output Capacitanced
CD(olf)
VD=OV
Room
4
8
Bandwidthd
BW
RL = 50 Q, See Figure 1
Room
1I1rnOnl1me
ioN
200
1I1rn Offl1me
tOFF
RL = 1 kQ, CL = 35 pF, 50% to 90%
Vss = -5 V, 0 v, Vs = 3 V, See Figure 1
Room
Room
180
RIN = 10Q,RL = 1 kQ
f = 5 MHz, See Figure 2 and 3
200
FSCL(MAX)
Full
Component Crosstalk
XTALK(CO)
Room
-85
Channel Crosstalk
XTALK(CH)
Room
-85
P-32167-Rev. C (11/15/93)
MHz
500
SCL Max Clock Frequency
100
pF
ns
kHz
dB
2-127
--
Silicanix
DG894
AMcmbcr of tho TBMIC Group
Specifications
Test Conditions
Unless Otherwise Specified
VDD = 12V,Vss = -SV
VINH = 3 V, VINL = 1.5 yo
Symbol
Parameter
Limits
-40 to 85°C
Temp"
Mine
IlYP I
Max"
3
4
8
10
b
Unit
Supply Vctltage
Room
Full
1+
Positive Supply Current
All Control Inputs 0 V, S V
-8
-10
Room
Full
1-
Negative Supply Current
mA
-2.5
-3.0
Notes:
a. Room = ZS°c, Full = as determined by the operating temperature suffIX.
b. 1Ypical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Guaranteed by design, not subject to production test.
e. VIN = input voltage to perform proper function.
m
Purchase of Siliconix DG894 components conveys a license to use them in the I2c system as defined by Philips.
lYpical Characteristics
~
Cl
j
l'J>s(on) vs. Drain Voltage
200
180 -
V+~12V I
160 -
V- = -SV
Is= -10mA
~
j
~
'"
0
V+ =12V
V-=OV
Is= -lOmA
180
160
---11----+----,,.
.!!l
.!!l
~0
l'])S(on) vs. Drain Voltage
200
~
Cl
~0
140
120
/)
100
8SOC
~
o§
80
Q
I
-
60
J
6
.~
)(j,
20
-4
-2
.....V/ 1/
Q
I
!
§
I
o
2
4
VD - Drain Voltage (V)
6
120
100
ell
~ --"'" ~40OC
40
106
ZSOC
~
140
80
25°C
60
40
20
8
2
4
6
VD - Drain Voltage (V)
0
tON vs. Bipolar Supply Voltage
c----r~-;-~__;.._'O":"":'T--=-r--_.,
8
tOFF vs. Bipolar Supply Voltage
4S.S
l
8S C
'" ~
43:S
100
V- = -SV
See Figure 1
94
:[
!
88
82
39.5
....
r--.
3S.S
10.8
11.2
11.6
12.0
12.4
12.8
V+ - Positive Supply (V)
13.2
10.8
~
zsoC
37.5
76
2-128
41.5
11.2
~
~
11.6
12.0
12.4
12.8
V + - Positive Supply (V)
13.2
P-32167-Rev. C (11115/93)
Siliconix
DG894
AMomber aftho TBMIC Group
1Ypical Characteristics (Cont'd)
tON vs. Unipolar Supply Voltage
r----r"-'--,--=--,--:..::....:r---=r----.
108
tOFF vs. Unipolar Supply Voltage
57
V- =OV
I
T54 I-- V- = OV
See Figure 1
100
92
51
84
48
76
45
68
42
r-:.;:85!C
~
r-- r-- "--
"'"
25°C
--
-40°C
10.8
11.2
11.6
12.0
12.4
12.8
13.2
10.8
11.2
V + - Positive Supply (V)
SDA Output Current vs. Supply Voltage
10
V
V
r--
10
-OV _
VOL=OAV
TA=25°C
r--
8
6
JpecllcatlOn
·fi .
Minimum Limit
--
-::::r-~
11.2
11.6
12.0
12.4
12.8
-40
13.2
-20
0
Component Crosstalk
120
110
70
~
20
~
'" "'- "'-
60
40
60
80
100
'Thmperature (0C)
VSUPPLY(V)
80
I
J
~OV
o
10.8
!l3
13.2
2
o
90
12.8
Specification
Minimum Limit
4
2
100
12.4
V+=12V
VOL = 0.4 V
6
4
12.0
SDA Output Current vs. Temperature
12
5V
8
11.6
V + - Positive Supply (V)
-
110
-
100
90
!l3
.......
Channel Crosstalk
120
VDS= +12 V
Vss = -5V
RIN= 109
RL= lkg
See Ftgure 2
80
70
.......
~
VDD = +12V
Vss= -5V
RIN=10g
RL= lkQ
See Ftgure3
'"'
.... r--.,
......
•
-
.... I'--r-.
60
......... i'o.
50
50
40
40
2
3
4
5
f - Frequency (MHz)
P·32167-Rev. C (11/15/93)
10
2
3
4
5
10
f - Frequency (MHz)
2-129
Siliconix
DG894
AMcmber ofthc'DIMIC Group
Test Circuits
+12V
5V
V+
Vs
Logic
Input
Vo
3V
Switch
Input
Vs
Switch
Output
OV
CL (includes fIXture and stray capacitance)
Vo=Vs
Figure 1. Switching Tune
,-------t-=BL--o----'-----.,.---'I-.,.....-o Baur
..-_ _-+.;;.FB:;.l!.....;o--:L._ _ _+-+-+-o FBaur
e.g., Y or C
Your
...---i--''------<:..-lL......,..+"t""O or
Cour
e.g., YlorCl
e.g',Y20r~
10n
10n
lOn
an
N
VOUT
XrALK(CO) =
20 \oglo VIN
XrALK(CH)
Figure 2. Component Crosstalk
Your
= 20 \0810 V IN
Figure 3. Channel Crosstalk
+12 V
V+
s
D
~----+---~~--~-1-0
Vo
Rg =75n
-
-5V
Figure 4. Bandwidth
2-130
P-32167-Rev. C (11115193)
Siliconix
DG894
AMember ofthe TBMIC Group
Operating Voltage Range
20
18
16
o.
Data Sheet Thst Conditions
Operating
Voltage
Area
14
12
~
j
~
-'.,.
.,.='
"
10
til
8
:~"
6
4
2
~
I
t
0
-0.0
V- - Negative Supply Voltage (V)
Figure 5.
Pin Description
Symbol
YO,Yl, Y2
Co,Cl,y
Rl, R2, GJ, Gz, BJ, Bz, FBJ, FB2
Description
An analog channel input, typically luminance.
An analog channel input, typically chrominance.
An analog channel input, typically "red", "green", ''blue'' or "fast blanking", as appropriate.
GND
Analog and digital ground.
VDD
Positive supply voltage'
Vss
Negative supply voltage
YOUT,CoUT
ROUT,GOUT,BoUT,FBoUT
An analog channel output, typically luminance or chrominance, as appropriate
•
An analog channel output, typically "red", "green", ''blue'' or "fast blanking", as appropriate.
SMO
A low selects serial mode (12C) operation. A high selects CMOS operation.
SDA
Serial data lineb
SCL
Serial clock lineh
SEL
CMOS control line or 12C addressc select line
Notes:
a. Both VDD pins (Pin 1 and Pin 26) must be connected for proper operation.
b. SDA and SCL pins become CMOS control inputs when SMO = High.
c. The SEL pin, in 12C bus operation (i.e., with SMO low), is the least significant bit of the device address. This allows two devices to operate on the
same lZC bus, yet retain independent control.
P-32167-Rev. C (11/15/93)
2-131
Siliconix
DG894
AMombcr of tho TBMlC Group
Applications
12C Bus Operation-RGB Switching
Figure 6 shows an inexpensive RGB + stereo selector. The
two audio channels are switched via the C, Y terminals. The
Si584 quad video buffer drives four 75-Q output lines.
Left1
Right1
-SV
+12V
Vss
VDD
Y1
YOUT
C1
CoUT
Left
Right
R1
G1
B1
SYNC1
+SV
Left2
Right2
~
7Sn
ROUT
R2
ROUT
GOUT
G2
GOUT
BOUT
B2
BOUT
FBOUT
SYNC2
SYNCoUT
+SV
SI584
SMO
t
SEL
-SV
: Conlrol Logia.
I
I
SDA
SCL
GND
Channel
Select
Figure 6.
2-132
P-32167-Rev. C (11115/93)
Siliconix
DG894
AMcmbcr altho TBMIC Group
Applications (Cont'd)
SCL--------~~----------~------~--~~--------------------------~
SDA----~--~~------~--_4------~~--_+--------------------__,
Figure 7.
Characteristics of the I 2C Bus
total bus capacitance
The I 2C Bus interface is ideally suited for communication
between different ICs or modules. Its salient features are:
supply voltage (Figure 7).
Data 'fraosfer 00 the I 2C Bus
• '!\vo wire bidirectional serial bus
- Serial data (SDA) and serial clock (SCL) lines
•
Multi-master system (built-in arbitration for
multi-master systems)
•
Devices have independent clocks
• Master and slave devices can be receivers and/or
transmitters.
•
Each device has a unique address.
•
Maximum bus clock rate of 100 kHz.
•
Any number of interfaces may be connected to the
bus
If the bus is not being used, both SDA and SCL lines must
be left high.
Every byte put onto the SDAline should be eight bits long
(MSB first), followed by an acknowledge bit, which is
generated by the receiving device.
Each data transfer is initiated with a start condition and
ended with a stop condition. The first byte after a start
condition is always the address byte. If this is the device's
own address, the device will generate an acknowledge by
pulling the SDA line low during the ninth clock pulse, then
accept the data in subsequent bytes until another start or
stop condition is detected.
Limited only by total capacitance of 400 pF
Each pin on bus limited to 10-pF capacitance
Input levels:
= 1.5 V (fixed supply operation)
= 3 V (fixed supply operation)
= 0.3 VDD (wide range supply operation)
= 0.7 VDD (wide range supply operation)
VIL max
VIH min
VIL max
VIH min
System Configuration
The eight bit of the address byte is the read/write bit (high
= read from addressed device, low = write to the addressed
device) so, for the DG894, the address is only considered
valid if the R/W bit is low.
Data bytes are always acknowledged during the ninth clock
pulse by the addressed device. Note that during the
acknowledge period the transmitting device must leave the
SDA line high.
Premature termination of the data transfer is allowed by
generating a stop condition at any time. When this
happens, the DG894 will remain in the state defined by the
last complete data byte transmitted.
Rp value depends on:
number of devices on bus
SDA
SCL
Start Condition
Stop Condition
Figure 8. STARr and STOP Conditions
P-32167-Rev. C (11/15/93)
2-133
•
Silicanix
DG894
AMembcr of the. TBMIC Group
Applications (Cont'd)
r-,
,,
,
~'----''--
,
,
-
MSB
i
L~.J
byte complete, interrupt within receiver
r-\
r-\
\...J 1 \...J 2 \ . . _ - -
-
-
/\
' rr
'---t""' ,
->---..J
. acknowledgement
signal from receiver
,
,
,
,
clock line held low while interrupts are serviced ,
,
acknowledgement
signal from receiver
"
SCL"'""t"'-""'h
i
r-,
---"'\
r--v-Y-
SOA'""T\'
;8~
ACK
Start Condition
Ls.!9.J
Stop Condition
Figure 9.
Data 'fransfer on the Pc Bus
Timing Specifications of the I 2C Bus
I 2C Bus Protocol
fc
The DG894 is a slave receiver type of I 2C interface and has
four allocated addresses, two of which are user
programmable through the SEL pin. Additional addresses
may be obtained by a metal mask option for users requiring
more than two DG894s on the same I 2C bus. Contact
Siliconix marketing for further information.
bus load conditions for timing specifications are as
follows:
4 kQ pull-up resistors to +5 V; 200 pF capacitor to ground.
All values are referred to VIH = 3 V, VIL = 1.5 V. .
Parameter
SCL Clock Frequency
SymbQI
Min
Max
Unit
fscl
-
100
kHz
tBUP
4.7
-
Start Condition Set-up TIme
tSU;STA
4.7
-
Bus Free Before Start
Start Condition Hold TIme
tlID;STA
4
-
SCL and SOA Low Period
tLOw
4.7
SCL and SOA High Period
tHIGH
4
-
tr
tf
-
1.0
Data Set-Up TIme (WRITE)
tSU;DAT
0.25
-
Data Hold TIme (WRIlE)
tlID;DAT
O·
-
SCL and SOA Rise Tune
SCL and SOAFaiI TIme
After the correct address has been sent, only one data byte
is needed to define the switch configuration. Subsequent
data put onto the bus will update the switches until a STOP
condition (or another START condition) signals that the
device is no longer being addressed. The switches will then
remain in their last configuration as long as power is
maintained to the chip.
liS
0.3
• A transmItter must mternally prOVIde at lease a hold tlllle to
bridge the undefined region (max 300 ns) of the falling edge of
theSCL.
Power on Reset
A power on reset function is provided on the DG894 to turn
all switches off following power up if the I 2C mode is
selected. In the CMOS control mode, the switches are
selected according to the state of the control inputs.
SDA
,,
,
,
, ,
'sro'
,,
,,
,
SCL _-I-_.L---I_+.&.._""""-
L.;_~
,
,tlID;STA
L.SI.A.J
tlID;DAT
Figure 10.
2-134
Pc Bus TJD;ling Diagram
P-32167-Rev. C (11/15/93)
Silicanix
DG894
AMcmbcr of the TEMIC Group
Applications (Cont'd)
Minimum Bit Stream to Set Up DG894 Switches
ISTA I 1 I 1 I 0 I 1 I 1 I Al I Ao I R/W I ACK I X
...
..1------ Address Byte
-----t.1
x
x
I D4 I D3 I Dz I DI I Do IACK I STO I
1
.....1------ Data Byte
-----.~I
STA = START CONDITION
Al = 2...CE!ogrammable to "1" with metal mask change)
Ao = SEL. Address bit set by use (address is inverse of SEL logic level)
R/W = READ/WRITE bit (must be "0", only WRITE mode allowed for DG894)
ACK = Acknowledge bit ("0") generated by DG894
D4 = 0 - - R2, G 2, B2, and FB2 switches off
D4 = 1 - - R2, G 2, B2, and FB2 switches on
D3 = 0 - - Rh Gh Bl, and FBl switches off
D3 = 1 - - Rh Gh Bl, and FBl switches on
D2 = 0 - - Y2, y, switches off
D2 = 1 - - Y 2, C 2, switches on
Dl = 0 - - Y h C h switches off
Dl = 1 - - Y h Cl, switches on
Do = 0 - - Yo and Co switches off
Do = 1 - - Yo and Co switches on
STO = STOP CONDITION
•
P-32l67-Rev. C (11/15/93)
2-135
Silicanix
AMcmbcroftheTBMICGrOUP
2-136
General Information
Analog Switches
Analog Multiplexers
WidebandNideo Amplifiers •
Voltage Converters
Appendix
Worldwide Sales Offices and Distributors
Bilicanix
AMember altho TBMIC Group
About Siliconix WidebandNideo Amplifiers
The Siliconix family of wideband/video amplifiers works together to provide complete system solutions
for such applications as video and data communication, signal switching and routing, and
high-resolution workstation buffering. Our Si581 and Si584 unity-gain buffers, as well as the Si582
low-gain amplifier, improve linearity and transmission accuracy, while providing reduced power
consumption, flat frequency response, and high color fidelity. With the Si582 amplifier at the output of
a switching matrix, the Si581/Si584 buffers at the input, and our wideband multiplexers and switches
(DG534A, DG535, DG536, DG538A, DG54X, DG61X, DG64X, DG884, or DG894) at the core, we
now provide a complete system solution for broadband distribution and back-terminated line-driving
applications.
Video Amplifiers
Part Number
Min
-3 dB
Bandwidth
(MHz)
Max
Offset Voltge
(mY)
Min
Slew Rate
(Vlfls)
Si581
400
8
500
2
J,Y
Unity Gain Video Buffer
Si582
150
5
430
4.5
J,Y
Video Amplifier with Disable
3-8
Si584
135
5
200
6
J,Y
Quad Video Buffer
3-16
J ; Plastic DIP
Y;SOIC
II
Max
Settling Time
(ns}
Package
COnIlguration
Page
3-1
Siliconix
Si581
AMcmbcr of the TeMIC Group
Unity-Gain Video Buffer
Features
•
•
•
•
•
•
-3 dB-Bandwidth: 730 MHz
Low Differential Gain: 0.1 %
Low Differential Phase: 0.01·
LowPower-PD: 150mW
Fast Settling: 0.2% in 5 ns
Low Distortion: -65 dBc at 20 MHz
Benefits
Applications
•
•
•
•
•
•
•
•
•
•
•
•
Flat Frequency Response
High Color Fidelity
Reduces Power Consumption
Increases Data Throughput
Improved Linearity
Improved Transmission Accuracy
Video Signal Routing
Telecommunications
Digital Video
Broadcast Quality Video Systems
HDTV Systems
Line Drivers
Description
The Si581 is a monolithic closed-loop unity-gain video buffer
with a very wide -3-dB bandwidth (730 MHz). Its unique
design offers a high-transparency, high-performance
alternative to conventional discrete, hybrid and open-loop
buffers.
The Si581 features low power dissipation (150 mW,
typical), fast settling (0.2% in 5 ns), without signal
degradation. Distortion is typically -65 dBc at 20 MHz,
gain flatness is less than 0.4 dB from dc to 50 MHz. These
performance specifications allow the designer to improve
system bandwidth while reducing power dissipation, board
space and design complexity. The output is protected
against short circuits to ground.
The Si581 uses a complementary bipolar IC process to
achieve excellent high frequency performance. All
performance is specified and rated for operation with
± 5-V supplies, reducing power consumption compared
with traditional ± 15-V designs.
Functional Block Diagrams and Pin Configurations
Dual·In·Line and sorc
V+
VoUT
NC
NC
NC
NC
VIN
V-
Ordering Information
Templlange
-40 to 85·C
Pru:kage
Part NumbeJ:
8-Pin Plastic DIP
Si581DJ
8-Pin Narrow sorc
Si581DY
ThpView
Absolute Maximum Ratings
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 7 V
Input Voltage Range ............................. V-to V +
Output Short Oreuit Duration. . . . . . . . . . . . . . . . . . . .. Continuous
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 70 rnA
P-32167-Rev. B (11/15193)
Storage Thmperature . • . . . . . . . . . . . . . . . . . . . . . . . .. -65 to 150'C
Lead Thmperature (Soldering lOs) ................•.... 300'C
Junction Thmperature: Tr ............................ 175'C
3-1
Siliconix
Si581
AMember of tho TBMIC Group
Specifications
Test Conditions
Unless Otherwise Specified
Parameter
DSuffix
-40 to B5°C
Symbol
V+ = 5V,V- = -5V
RL = 100 0, Rs = 500
Temp"
Mine
SSBW
VOUT<0.5Vp_p
Room
Full
400
300
MSBW
VOUT = <1 V!>'p
IlYP IMax"
b
Unit
Frequency Domainh
-3-dB Bandwidthd
LSBW
Gain Flatness Peaking'" g
GFPH
Gain Flatness Roll Off"
GFRH
Linear Phase Deviatione
LPD
' VOUT = 5Vp_p
Differential Gain
RL= 1500
Vc.mer = 280mV
DG
f= 4.43 MHz
Vc.mer = 280mV
MHz
90
0
0.5
0.8
Room
Full
0
O.B
Room
Full
0.7
f - 3.5BMHz
Room
0,01
f-4.43MHz
Room
0,01
RL-1500
Room
0.1
RL=lW
Room
0.Q7
de to 200 MHz
DP
450
55
50
Room
Full
VOUT <0.5 Vp_p, de to 200 MHz
Differential Phase
Room
Room
Full
730
dB
1.2
1.5
2
deg
%
Time Domaind , h
tRS
VIN = 0.5 V Step
Input Rise/Fall time = 300 ps
Room
Full
0.4
1
1.4
tRL
VIN-5VStep
Input Rise/Fall time s 1 os
Room
Full
4.5
7.5
8.5
tsp
Th ±0.2 %, VIN = 2 V Step
5
10
Rise and Fall TIme
Settling TIme ,
Slew Rate
Full
Room
Full
SR
500
450
BOO
os
VI""
Distortion and Noise
2nd Harmonic Distortiong
HD2
3rd Harmonic Distortiong
HD3
Equivalent Input Noise F100rd
SNF
Equivalent Input Integrated Noised
INV
Room
Full
-65
-55
-48
Full
-65
-55
f >100 kHz
Room
Full
-158
-155
-154
dBm
(1Hz)
100kHz < f <200 MHz
Room
Full
40
57
63
l1V
VIN = 2 Vp_p, fIN = 20 MHz
dBe
Stati~dc
0.96
0.95
GA
Room
Full
Integral Endpoint Linearityd
ILIN
Room
Full
0.2
0.4
O.B
%FS
Input Offset Voltagef
VIa
Room
Full
2
8
16
mV
DVIO
Room
Full
20
IBN
Room
Full
Input Bias Current
Average Thmperature Coefficientd
DIBN
Room
Full
Power Supply Rejection RatioS
PSRR
Full
Small Signal Gaind
Input Offset Voltage
Average Thmperature Coeffieientd
Input Bias Currentf
Supply Currentf
3-2
1+
± 2 V Full Scale
No Load
Full
0.97
VN
-
l1V/oC
±20
±50
±100
!1A
200
-
700
nN°C
20
rnA
100
45
50
15
dB
P-32167-Rev. B (11/15/93)
Siliconix
Si581
AMember ofthe TSMIC Group
Specifications
DSufflX
-40 to BS·C
Test Conditions
Unless Otherwise Specified
Parameter
V+ =SV,V- = -SV
RL = 1000, Rs = 500
Symbol
Temp"
Mine
100
SO
IlYPb IMax"
Unit
Miscellaneousd
160
Input Resistance
RIN
Room
Full
Input Capacitance
CIN
Room
Full
1.6
Output Impedance
Ro
Room
Full
Aldc
Output Voltage Range
Vo
Room
Full
Output Current
10
Room
Full
k.Q
2.2
2.5
pF
2
3
3.5
0
3.2
-3
±4
3.2
3
V
SO
±70
-45
50
45
rnA
Notes:
a. Room = ZS·c, Full = -40 to BS·C.
b. "JYpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Guaranteed by design, not subject to production test.
e. Gain flatness tests are performed from 0.1 MHz to 200 MHz.
f. Parameter is 100% tested at 2S·C and sample tested at BS·C.
g. Parameter is sample tested at ZS·C.
h. AC performance is very dependent on layout. Specifications apply only in a 50-0 microstrip environment.
lYPicaJ Characteristics: VSUP
-
± 5 V, RL - 100 Q, Rs - 50 Q
Forward Gain and Phase
I
~
""""
-1
.1::
"gp
::;;
-2
-
r-..
, ,
0
I
...... r--.
100
200
'"
....
300
f - Frequency (MHz)
P-32167-Rev. B (11115/93)
-
vo=o.sVp-p -
........ 1"-0.. Phase
-3
o
Gain Flatness and Phase Deviation
J
"
Magnitude
-- .... ~kagnLe'-
0
iii'
I
~
iii'
0
~
1"""'-0 r-....
400
-0.2
500
-45'
-90'
-135'
...,
[
"
~
.g
+2'
+1'
-0.4
.1::
1-
r---!hase
0
'"""
-1'
0.6
-O.B
-lBO'
r-,VOj1,p-p
0
SO
100.
150
~
c:
"
":\
200
-2'
ZSO
f - Frequency (MHz)
3-3
•
Bilicanix
Si581
AMomberoftheTsMICGrOUP
lYPicaJ Characteristics: VSUP
= ± 5 V, RL = 100 Q, Rs = 50 Q (Cont'd)
Reverse Gain and Phase
Input Impedance
lOOk
""""""",-
0
-20
Pi"
::!-
"
"0
__ I.Phase1
r-- __
I
I
r~
45'
0
Magnitude
-45'
;;J1
§:
"
N
tl
'/
-60
-
/
o
zoo
100
400
300
100
1
500
-40'
1\
"
""
,cz,.
-60'
-80'
-100'
1
10
1000
100
f - FrequencY (MHz)
Output Impedance
Recommended Rs vs. Load Capacitance
60
LZo
~~
70'
50
30
-;s
o
-ZO'
.......
f - Frequency (MHz)
40
20·
lk
10
V,O=j Vpr - I--
J
-80
rJ)
10k
90'
!'1.,....0- .,,-
-40
I
135'
II
,
/
a" 'I
20
50'
V
V
30'
IZol _
30 i---i--+-'IdH-+-Hi+I---,--,.-+-++++H
.... '"
o ~
5361l
10'
o
20
f---f--HH--PkIftt---+-+-++++t+I
-10'
-10
1
10
100
100
1000
Integral Nonlinearity
0.75
~
I
_
-
I
0
IlvRL=l;':
RL=200o
\\
o
-0.25
I
RL=~kQl
0.25
~
Frequency Response vs. RL
2
1EndpoInts
I. 1 I
= ±2V
0.50
,~
I~
-
~
.
til
i't ~
--
RL = 2000
1--0..
....... ......
1"'--0
......
l'...
..... 11oob-
~
~
I\.
-4
_\ sob
\
-6
-5 -4 -3 -2 -1
0
VJN (V)
1
2
3
4
5
\
~
\
\
\
~
-8
-0.50
3-4
-2
I
J. I
VJN = 0.5 Vp-p
~I_
i"\
1
1000
CL(pF)
f - Frequency (MHz)
200
400
600
800
1000
f - Frequency (MHz)
P-32167-Rev. B (11/15/93)
Siliconix
Si581
AMember ofthe THule Group
= ± 5 V, RL
lYpical Characteristics: VSUP
Forward Gain vs. CL with Recommended Rs
RL=2ooQ
Vo = 0.5 V p-p
0
iXi'
-2
"
·a""E
-3
~
"
~
"'" \ 1\
~"\
,
-4
\
~OPF
_\
100pF ~
-5
Small Signal Pulse Response
0.4
o
50
150
100
,-
0.2
€
0.1
-0.2
-0.3
-
V'
~
250
TIme (1 ns/Div)
Large Signal Pulse Response
Long-Term Settling Time
4
0.2
I I(
2
~
g
I
-
tIl
,
\
Output
-1
-3
-0.1
~
,,-
0
~
lil
OIl
-4
\.
~
10-8
10-4
RL~ 10dQ 1
I
I
-40
.!
I I
-30
II
3rd Harmonic Distortion
RL=I1OOIQ 1
1_
SlewLimiled~
-40
"C'
"0'
-50
Vo-4Vp-p
0
I
B -60
I
I
Vo - 2V p_p
.!35 dB~
1
Forward Gain vs. RL
1
For Frequencies <70 MHz
~
~
±-
"'-i'..
30
E
£
§
oS"
10
o
50
100
~
"
........ ....... """'"
-1
!'\.
'0
" .....r-...
20
o
1oonl -
0
40
150
.~
....... ......
200
250
f - Frequency (MHz)
l
-2
~I
,'" ~1~
1\..
'I
son I'..
'\
-3
_ Vo=l Vp-p
o
100
200
I
300
f - Frequency (MHz)
,
"
400
500
Applications
The SiS81 provides the accuracy of a closed-loop amplifier
plus unmatched dynamic performance.
with any high-frequency device, a good PCB layout is
required for optimum performance. This is especially
important for a device as fast as the SiS81 which has a
typical bandwidth of 730 MHz.
where additional isolation from high-frequency
(>400 MHz) resonances of the power supply is needed.
AJ;
To minimize capacitive feedthrough, the pins which are not
connected internally (pins 2, 3, 6, and 7) should be
connected to the ground plane. Input and output traces
should be laid out as transmission lines with the
appropriate termination resistors very near the SiS81. On
a 0.06S-inch epoxy PCB material, a SO-Q transmission line
(commonly called stripline) can be constructed by using a
trace width of 0.1" over a complete ground plane.
Figure 1 shows recommended power supply bypassing. The
ferrite beads are optional and are recommended only
3-6
Parasitic or load capacitance directly on the output of the
SiS81 will introduce additional phase shift in the device,
which can lead to decreased phase margin and frequency
response peaking. A small series resistor before the
capacitance effectively decouples this effect. The typical
characteristic curves illustrate the required resistor value
and the resulting performance vs. capacitance.
Precision resistors with low parasitic reactances were used
to develop the data sheet specifications. Precision carbon
composition resistors or standard spirally-trimmed metal
film resistors will work, though they will cause a
degradation of ac performance due to their reactive nature
at high frequencies.
P-32167-Rev. B (11115193)
Siliconix
Si581
AMembcr oltho TBM[C Group
Applications (Cont'd)
+5 V O---t---l
+
C3
6.8 J1F I
VIN
Cl
IO.01J1F
O---t------.!4
VOUT
ROUT
ROUT is chosen for desired output impedance
(SiS8l ROUT = 20)
RIN is chosen for desired input impedance
C2
-SV
Ferrite
Bead (Optional)
Figure 1.
From Camera 1
+
O.OlJ1F
o--~--'
Recommended Decoupling
SAl
.."..
750
DA
DG534
.."..
DB
From Camera 4
SiS81
---I.,....---I.
~_
~
To Video Monitor
750 .."..
SB2
('r
Control
Figure 2.
P-32167-Rev. B (llI1Sm)
Four Camera High-Defmition Closed Circuit TV System
'3-7
Silicanix
Si582
AMcm'oorofthc1'BMICG!'OUP
Wideband Video Amplifier
Features
•
•
•
•
•
•
•
-3-dB Bandwidth: 100 MHz
Low Differential Gain: 0.01 %
Low Differential Phase: 0.01·
± 1 to ± 8 Oosed-Loop Gain Range
LowPower-PD: 160mW
Fast Settling: 0.05% in 12 ns
Low Distortion: -60 dBc at 20 MHz
• DISABLE Function
Benefits
Applications
•
•
•
•
•
•
•
•
•
•
•
Flat Frequency Response
High Color Fidelity
Reduces Power Consumption
Increases Data Throughput
Improved Linearity
Improved 1ransmission Accuracy
Coaxial Cable Drivers
Video Signal Routing
Thlecommunications
Digital Video
Broadcast Quality Video Systems
• HDTV Systems
• SmallSize
• Automatic Power-Down
Description
The Si582 is a monolithic video amplifier with a -3-dB
bandwidth of 100 MHz. Its unique current-feedback design
offers a high-transparency, high-performance alternative
to conventional discrete, hybrid and other video amplifiers.
The Si582 features wide bandwidth, low power dissipation
(150 mW; typ) and fast settling (0.05% in 12 ns). Distortion
is typically -60 dBc at 20 MHz, gain flatness is less than
0.3 dB from dc to 40 MHz. These performance
specifications allow the designer to improve system
bandwidth while reducing power dissipation, board space
and design complexity. The wide bandwidth combined with
a 50-rnA output current at a gain of 2 provides an excellent
high performance solution for video distribution and line
driving applications. In addition, digital transmission
systems will benefit from its superior pulse response. The
output is protected against short circuits to ground.
The Si582 uses a complementary bipolar Ie process to
achieve excellent high frequency performance. All
parameters are specified and rated for operation with
± 5 V supplies, reducing power consumption compared
with traditional ± 15 V designs.
Functional Block Diagrams and Pin Configurations
Dual-In-Line and SDIC
Offset Adjust
Ordering Information
IN-
Teml' Bange
IN+
-40 to 8S·C
V-
PartNmnlJer
PlICbge
8-Pin Plastic DIP
SiS82DJ
8-Pin Narrow SDIC
SiS82DY
ThpView
Absolute Maximum Ratings
Supply Voltage. . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . .. ± 7 V
Input Voltage Range ........•.................... V- to V+
Output Short Circuit Duration. . . . . . . . . . . . . . . . . . . .. Continuous
Output Current . . . . • . . . . . . . . . . • . . . . . . . . . . . . . . . . . . . .. 70 rnA
CornrnonModeInputVoltage .......•.............. V-toV+
3-8
Differential Input Voltage .•.•....................•...... S V
Disable Input Voltage .•...•.••.•..............••.. V-to V+
Storage Thrnperature . . . . . . • . . . . . . . . . . . . . . . . . . .. -6S to 1S0·C
Lead Thrnperature (Soldering lOs) ..................... 300·C
Junction Thrnperature: Tl ..............•............. 17S·C
P-32167-Rev. B (11/1S/93)
Siliconix
Si582
AMembcr oftha TBMIC Group
Specifications
D Suffix
Test Conditions
Unless Otherwise Specified
Parameter
-40 to 85°C
Symbol
V+=5V,V-=-5V
RL = lOOn, RF = 25on,Av = 2
Temp"
Mine
SSBW
VOUT = ,,0.5 Vp_p
Room
Full
150
120
MSBW
VOUT - ,,2 Vp_p
Room
LSBW
VOUT = 5Vp-p,Av - 5
l'lYPb I Max"
Unit
Frequency Domainb
-3 dB Bandwidthd
Gain Flatness Peakingf, h
Full
200
MHz
100
35
50
GFPL
de to 40 MHz
Room
0
0.3
GFPH
>40 MHz
Room
Full
0
0.5
0_7
de to 75 MHz
Room
Full
0_6
1
1.3
Room
Full
0_2
1
1_2
Room
Full
0_01
0_02
0_1
Room
Full
0_01
0_04
0_05
2_4
Gain Flatness Roll Oftll
GFR
Linear Phase Deviation
LPD
Differential Phase
DP
Differential Gain
DG
VOUT SO.5Vp_p
de to 75 MHz
Av = 2, RF = 250n,RL= 150n
1 Vpop Video Signal, 3.58 MHz
dB
deg
%
Time Domain1, h
Rise and Fall 'TImed
Settling 'TIme"
Slew Rated
tRS
VIN = 0.5 V Step
Full
1_6
tRL
VIN - 5 V Step
Full
6.5
10
ts
Th ± 0_05 %, VIN = 2 V Step
Full
12
15
SR
AV=2
Full
SRl
Av=-2
Full
1600
Room
Full
-60
-45
-40
Full
-60
-50
154
-153
dBm
(1Hz)
IlV
430
ns
700
V/flS
Distortion and Noise
2nd Harmonic Distortionf, h
HDz
3rd Harmonic Distortionf , h
HD3
Equivalent Input Noise Floord
SNF
f > 100 kHz, 50 n on Input
Room
Full
157
Equivalent Input Integrated Noised
INV
100 kHz < f <200 MHz
Room
Full
40
57
54
VIN = 2 Vp_p. fIN = 20 MHz
dBc
Switching (DiJable)
Thrn On TIme
tON
ThrnOffTIme
tOFF
Off Isolation"
OI
Full
100
200
ns
Th 50 dB Attenuation @ 10 MHz
Full
0_2
1
fIN =
Full
-55
flS
dB
Full
250
10 MHz, DISABLE = "0"
Current to Disable
Current to Enable
Disable Drive Voltage
Voltage to Enable
lOIS
Full
-59
200
-80
-60
1
0.5
DISABLE = "0", lOIS - 250 \lA
Full
~="1"
Room
Full
3_2
4
2_6
VIO
Room
Full
-5
±2
DVIO
Room
Full
-40
IBN
Room
Full
-20
-36
VDISL
VDISH
\lA
V
Static,de
Input Offset Voltagef
Input Offset Voltage Average
Thmperature Coefficientd
Input Bias Current Non-invertingf
P-32167-Rev_ B (11/15/93)
-9
5
9
±20
10
mV
40
Ilvrc
20
36
\lA
3-9
Biliconix
Si582
AMember ofthe TBMIC Group
Specifications
Test Conditions
Unless Olhenris. Specified
Parameter
D Suff"1X
-40 to 85°C
V+=5V,V-=-SV
RL= 100 C,Rp= 250C,AV =2
Temp"
Mine
DIBN
Room
Full
-200
IBI
Room
Full
-20
-36
DIBI
Room
Full
Power Supply Rejection Rati08
PSRR
Full
Common Mode Rejection Ratio
CMRR
Full
Symbol
I I
'JYpb
Max"
Unit
200
oN°C
20
36
\.'A
200
oN°C
static, de (Cont'd)
Input Bias Current Non-inverting
Thmperature Coefficientd
Input Bias Current Invertingf
Input Bias Current Inverting
Thmperature Coefficientd
Supply Currentf
1+
100
±1O
±50
-200
45
45
dB
No Load
Full
16
18
Disabled, No Load
Full
4
6
rnA
MisceUaneous
Room
Full
100
200
kn
Non-inverting Input Resistance
RJN
Non-inverting Input Capacitance
CIN
Full
0.5
2
pF
Output Impedance
Ro
Aldc
Full
0.1
0.2
0
Output Voltage Range
Vo
No Load
Room
Full
-3.2
-3
±3.S
3.2
3
CMIR
Room
Full
-2
-1.2
±2.1
2
1.2
10
Room
Full
-50
±70
50
35
Common Mode Input Range
For Rated Performance
Output Currentd
50
-35
V
rnA
Notes:
a. Room = 25°C, Full = -40 to 85°c'
b. 'JYpical values are for DESIGN AID ONLY, not guaranteed nor SUbject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Guaranteed by design, not subject to production testing.
e. Gain flatness tests are performed from 0.1 MHz to 50 MHz, and specifications are guaranteed from dc to 50 MHz.
f. Parameter is 100% tested at 25°C and sample tested at 85°c'
g. Parameter is sample tested at 25°C.
h. Ac performance is very dependent on layout. SpeclrlClltions apply only in a 50-0 microstrip environment.
'IYpical Characteristics
Non-Inverting Frequency Response
0
........
"\
-2
iQ
"
}
=8 "
-4
........ 1'-0..
"
-6
f'Av
i"- 1000.
Av=8
I
-8
20
40
{_
0
........
-r-
- "'"
A~=:l
~
-2
0
2,
[
(D
Av
~ r- io-~
~
o
3-10
A~
A
:::!-
.g
-
1-- ....
Inverting Frequency Response
-45'
1
......r-
r-
-90'
~
'g
"
}
- ...
60 80 100 120 140 160 180 200
f - Frequency (MHz)
......; ........
-4
........ ~
I\.
..::!!!II
-6
-
Av
\
Av=-2
-8
o
20 40
Al=L
""
-
..... ~ ......... r-...
........
~
Av=-2~
-I
'- " ,
Av=-8
-135'
-180'
:""
~
~
k"-
o
1
-90'
r-o
-135'
',.."
~
-45'
-180'
60 80 100 120 140 160 180 200
f - Frequency (MHz)
P-32167-Rev. B (11/15/93)
Siliconix
Si582
A Member of the TBMIC Group
'fYpicaJ Characteristics
Frequency Response for Various RLS
0
IR
......::: ~
-2
iii'
~
"
"C
.~
:;p
~
--. -
RL= 100
-4
-6
1~
1
RLI=~
-
~
I
-45·
{
20 40
60
~ ~
SOil
-40
a" .§
t!l
-60 I-+-+++++I+--++-IH-l.!om'--H-H++H+--I
-90·
RL=~
-135·
-80
-180·
I I
o
o
RL=lk.Q
~..L
RL = 100
-8
-20
11~
I
Forward and Reverse Gain During Disable
o
Av=2
-100
80 100 120 140 160 180 200
~-'-
lOOk
_ _ _-'--J...J...LJ..Ll"----'-..J....I..lJ.J.JJl...--'
1M
10M
100M
f - Frequency (MHz)
-30
f - Frequency (Hz)
p• '
50
i~toI1Jri~1
-40
iii'
~
e
2nd
-50
=
.~
c5
~
-60
V
i-"
-70
-80
' / ""
i-'"
V
n",
2-Tone, 3rd Order Intermodulation Intercept
2nd and 3rd Harmonic Distortion
_ iv
45
~
~
L
,. V'1~
la
j
/
/3rd
-
SOg
"-
40
......
35
" "-
30
I I
25
10
o
100
10
f - Frequency (MHz)
Equivalent Input Noise
"-
"
'"
30
-
......
PSRR
40
30
1k
25 pAjIHZ
lOOk
1M
f - Frequency (Hz)
P·32167-Rev. B (11/15/93)
-
Voltage
2.4 nVjIHZ
10k
50
-
I
10M
20
Av=2
60
"'" -"""
I
10
100M
"
~R
50
Non·Inverting Current ~
40
CMRR and PSRR
60
Inverting Current
, " 3 5 PAl 1HZ
I
100
20
f - Frequency (MHz)
100
~
.......
10
100
1k
10 k
100 kIM
10 M
f - Frequency (Hz)
3-11
Siliconix
Si582
AMember ofthe TBMIC Group
1YPical Characteristics
Pulse Response
Settling Time
0.20
A)=2
h
I'
~
I
I
,
\
~
0.15
...
t
\
0.10
~
0.05
~
II
I
I
2 V Output Step - I RL= 1000
h-J = 2
- I-
~
0
.g
'E -0.05
"
CIl
I"
Av= -2
-0.10
"
-0.15
-0.20
0
10
Long-Term Settling Time
0.20
II
-
0.10
~
...
~
.ff
il
0.05
o
""
-0.05
CIl
-0.10
""'"
f-'" ~
30
40
SO
Settling Time vs. Load Capacitance
SO
I I
2 V Output Step - I RL=1000
h-J = 2
-
0.15
20
TIme (ns)
2ns/Div
-
40
g
~
30
~
""
t
20
10
-0.15
-0.20
10- 10
so
0
10-8
10-6
10-4
10-2
10
100
CL(pF)
Recommended Rs vs. Load Capacitance
Enable/Disable Response
On
40
/
30
i'
Off
'"
"-I"-
""
10
o
10
100
CL(PF)
3-12
DIS Input, Pin 8 (5 V/Div)
I
~
20
1000
TIme (s)
""'-
Output, Pin 6
(400mV/Div) -
I I i
RL=1000
1000
200ns/Div
P-32167-Rev. B (1l11S!93)
Siliconix
Si582
AMembor of tho TBMIC Group
'lYpical Characteristics
Differential Gain and Phase (4.43 MHz)
Differential Gain and Phase (3.58 MHz)
0.05
7SQ
0.20
~
0.03
.
0.02
0.15
:3
..!l
~
1>'
~
l'"
~
0.10
is
0.01
0.05
0.25
Av=2
VOUT
0.04
"5
0.05
0.25
Av=2
"
'8
1
7SQ
Vour
0.04
0.20
0.03
0.15
0.02
0.10
0.01
0.05
~
=
'0;
(!l
."il.,
~
~
is
t1
Si
~
[
'"Cl="
'8
"
'eI
"
~
0
2
3
4
Number of 150·Q Loads
2
3
Number of 150·Q Loads
Applications
Setting Loop Gain
The Si582 uses a current feedback topology instead of the
more common voltage feedback, meaning that the closed
loop bandwidth and settling time are relatively
independent of closed loop gain.
Optimum bandwidth is achieved with a feedback resistor of
220 to 270 Q. Closed loop gain is then set by a suitable
choice of input resistor value. Figure 1 shows the
connections for inverting and non-inverting gains.
Feedback resistors greater than 270 Q may be used, but at
the expense of bandwidth. Values lower than 220 Q will
cause amplitude peaking in the passband. For example, a
feedback resistor value of 100 Q will create a peak of
approximately 4 dB as roll-off is approached.
Under no circumstances should the output be connected
directly to the inverting input in the hope of achieving unity
gain. This will cause the device to oscillate and draw
significant current from the power supply. Unity gain may
be achieved with a 220- to 270-Q resistor in the feedback
path with no input resistor. Similarly, capacitive feedback
should not be used with the Si582.
Offset Correction
Since the two inputs to the Si582 are quite different
internally, the noise and offset performance differs from
that of a differential input op-amp. The two input bias
currents are umelated, so that the technique of bias current
error cancellation by matching of the inverting and
non-inverting input resistances is ineffective.
P·32167-Rev. B (11/15/93)
The equation for output offset is shown in Figure 1, and is
the algebraic sum of the equivalent input voltage and
current sources which influence dc operation. Pin 1 may be
used to correct for the ± 10-mV offset by connecting as
shown in Figure 1. When not used, pin lshould be bypassed
to signal ground with a O.l-I.lF low inductance capacitor.
Disable Operation
The disable function of the Si582 is obtained by taking pin 8
to ground. A minimum current of 250 I.lAneeds to be sunk,
and a maximum voltage of 0.5 V is required for full disable.
When the disable function is not required, pin 8 may be left
open or could be tied to the +5-V rail.
Disabling the amplifier reduces power supply current and
places the output and inverting input pins in a high
impedance state (200 kQ II 0.5 pF)
PCB Layout and Supply Bypassing
The Si582 bandwidth and pulse response are dependent
upon good layout and decoupling techniques. Ground
plane construction is recommended to preserve as Iowa
ground impedance as possible. Power supply decoupling
components should be mounted close to the package and
should have good high frequency characteristics to preserve
the excellent pulse performance of the device. Figure 2
shows the recommended decoupling circuit. The 10-I.lF
capacitor should be Tantalum or other low ESR/ESL type.
For the O.l-I.lF capacitor, multi-layer ceramic capacitors are
recommended. A low value resistor in series with the 10-I.lF
capacitor's ground lead may be required to reduce output
pulse ringing.
3-13
Biliconix
Si582
A Membcr of the TBMIC Group
Applications
Rp
RIN
v~T·
VIN
220r.!
Ri
(Optional)
-
.
22Qr.!
-sv
-
VIN
Inverting
Ay=Rp/R1N
Ri (Optional)
Non-Inverting
Ay=l + Rp/RG
Output Offset = ±IBN x Rs(l + Rp/RIN)±
VIO(l + Rp/RIN) ±lm.Rp
Where:
IBI = Inverting Input Bias Current
IBN = Non-Inverting Input Bias Current
Rs = Non-Inverting Pin Resistance
VIC = Input Offset Voltage
Ri sets the impedance
Figure 1. Si582 Gain Circuits
DGS34A
220r.!
+sV
220r.!
Output
:>---t-o
lOr.!
O.Il'F
SOr.!
Ladder
Network
I
Figure 1. Decoupling the Si582
Figure 3. 4-Step Wideband Digitally Controlled Attenuator
Digitally Controlled Attenuator
Figure 3 shows the Si582 in a wideband, digitally controlled
attenuator circuit employing the DG534A, a 4 to 1
D/CMOS multiplexer. The Si581 buffers the input and
drives the 50-Q ladder attenuator. laps are chosen to suit
3-14
the application, i.e., O.l-dB or 1-dBsteps. The secondSi582
buffers the multiplexer for good linearity and, at a gain of
two, provides "lossless" cable termination at the output.
P-32167-Rev. B (11/15193)
Silicanix
Si582
AMember o!the TBMIC Group
Applications
250IJ.
250IJ.
Figure 4.
Differential Amplifier
250IJ.
250IJ.
250IJ.
RIN = 750
Figure 5.
Differential Line Receiver
4 each Si582
Line Drivers
Input Buffers
OUT!
IN!
I
I
I
I
I
I
I
I
I
I
I
I
I
I
IN!
75IJ.
Si584
DIS!
-=-
250IJ.
DG884
0:-
8x4
Crosspoint
0:-
OUT2
DIS2
•
OUT3
Si584
-=-
DI~
IN8
OUT4
IN8
750
DIS4
0
-=-
Control
Figure 6.
P-32167-Rev. B (11/15/93)
50 MHz 8 x 4 Video Crosspoint Switch
3-15
Siliconix
Si584
AMembcr ofthe TBMIC Group
Quad Unity-Gain Video Buffer
Features
Benefits
Applications
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
- 3-dB Bandwidth: 120 MHz
30-MHz Gain Flatness: 0.1 dB
High Channel Isolation: 62 dB @ 10 MHz
Low Differential Gain-O.08%
Low Differential Phase-O.1 0
Low Power-PD: 30 mW/Channel
Fast Settling: 0.1% in 10ns
Low Distortion: -58 dBc @ 20 MHz
Flat Frequency Response
High Color Fidelity
Improved Transmission Accuracy
Reduces Power Consumption
Increases Data Throughput
Improved Linearity
Small Size
Video Signal Routing
Telecommunications
Digital Video
Broadcast Quality Video Systems
HDTV Systems
Description
The Si584 is a monolithic closed-loop quad video buffer
with a wide -3-dB bandwidth (120 MHz). Its unique
design, optimized for high quality video switching, offers a
high-performance alternative to conventional discrete,
hybrid and open-loop buffers.
designer to improve system bandwidth while reducing
system power consumption, board space and design
complexity. The outputs are protected against short
circuits to ground.
The Si584 features wide bandwidth, low power
consumption, fast settling (0.1 % in 10 ns), without signal
degradation. Third harmonic distortion is typically
-58 dBc at 20 MHz, gain flatness is typically 0.1 dB from
dc to 30 MHz. These performance specifications allow the
The Si584 is built on an advanced complementary bipolar
process to achieve excellent high frequency performance.
All performance is specified and rated for operation with
± 5-V supplies, reducing power consumption compared
with traditional ± lS-V designs.
Functional Block Diagrams and Pin Configurations
Dual-In-Line and SDIC
VOUT!
+Vcc
VOUT2
NC
VOUT3
Ordering Information
ThmpRange
-40 to 85'C
Pac:kage
Part Number
14-Pin Plastic DIP
Si584DJ
14-Pin Narrow SOIC
Si584DY
-Vee
VOUf4
Top View
Absolute Maximum Ratings
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 7 V
Input Voltage Range .........................•... V-to V +
Output Current . . . . • . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . .. 35 rnA
3-16
Storage Thmperature . . . . . . • • . . . . . . . . . . . . . • . . . .. -65 to 150'C
Lead Thmperature (Soldering lOs) .......•............. 300'C
Junction Thmperature: TJ ............................ 175'C
P-32167-Rev. B (11/15/93)
Siliconix
Si584
AMember of the TBMIC Group
Specifications
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
DSunlx
-40 to 85'C
V+ =5V,V- = -5V
RL= 1oon,Rs= son
Tempa
Mine
s
Room
Full
135
120
l1YPb
I
Max"
Unit
Frequency Domlling
SSBW
- 3 dB Bandwidthf
VOUT =
0.5Vp-p
MSBW
Vour-1 Vp-p
LSBW
Vour- 2Vp-p
GFPL
Gain Flatness Peakingf
Full
70
95
Room
Full
0
0.2
0.3
>30 MHz
Room
Full
0
0.4
0.7
Your S O.5Vp.p
XTALK
f= 10 MHz
Room
62
tRS!
VIN = 0.5 V Step
Room
Full
1.8
2.8
3.0
Room
Full
5
7
8
Room
Full
10
15
20
Room
Full
3
10
15
Rise and Fall TIme
tRs2
VIN = 2 V Step
Settling TIme
MHz
120
0.1 to 30 MHz
GFPH
Crosstalk
Room
200
ts
Overshoot
OS
Slew Rate
SR
Room
Full
200
180
450
GA
Room
Full
0.96
0.95
0.97
VIN = 0.5 V Step
dB
ns
%
V/IJS
Static, de
Small Signal Gaind
VN
Integral Endpoint Linearityd
IUN
Room
0.4
0.6
%
Output Offset Voltagee
VIO
Room
Full
±0.5
±5
±8.2
mV
DVIO
Room
Full
±9
±40
,.VI'C
IB
Room
Full
±1
±5
±10
JlA
PSRR
Room
Full
Input Offset Voltage Average
Thmperature Coefficiente
Input Bias Currente
Power Supply Rejection RatioC
Supply Current, ThtaiC
1+
± 1 V Full Scale
No Load
48
46
Room
Full
56
12
dB
16.5
17
rnA
MisceUaneous
1.5
Input Resistance
RIN
Room
Full
Input Capacitance
CIN
Room
Full
1.8
3
3.5
pF
Output Impedance
Ro
At de
Room
Full
2.5
3.5
5
n
Output Voltage Range
Vo
No Load
Room
Full
±3.8
±3.6
±4
10
Room
Full
±20
±12
±ZS
2nd Harmonic Distortionf
HD2
Room
Full
-50
-38
-36
3rd Harmonic Distortionf
HD3
Room
Full
-58
-50
-45
Equivalent Input Noise Floord
SNF
Room
Full
-155
-153
-152
Output Current, per Bufferd
VIN = 2 V p-p, fIN = 20 MHz
P-32167-Rev. B (11/15/93)
f > 100 kHz, 50 n on Input
1
0.3
Mn
V
rnA
dBc
dBm
(1Hz)
3-17
•
Siliconix'
Si584
AMembcr of tho TBMIC Group
Specifications
Thst Conditions
Unless Otherwise Specified
Parameter
D Suffix
-40 to 85·C
V+=5V,V-=-5V
RL = 1ooC,Rg = SOC
Symbol
Mine
Thmp"
I
l1YPb
Max"
Unit
Performance Dmillg a DG884 CroupoJm Switchd,.
2nd Harmonic Distortion
HDz
3rd Harmonic Distortion
HD3
VIN=2~
liN = 5
See Thst Load
See Figure 1
Room
-60
Room
58
dBc
Differential Phase
DP
0.1
DG
f = 3.58 or
4.43 MHz
Room
Differential Gain
Room
0.08
%
XTALK(AH)
f= 10 MHz
Room
-54
dB
Crosstalk (All Hostile)
deg
Notes:
a. Room = 25·C, Full = -40 to 85·C.
b. 'JYpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Guaranteed by design, not subject to production test.
e. Parameter is 100% tested at 2S·C and sample tested at 85·C.
f. Parameter is sample tested at 25·C.
g. AC performance is very dependent on layout. Specifications apply only in a 50-0 micros trip environment.
lYPicaJ Characteristics: TA
= 25°C, Vee -
± 5 V, RL
Gain and Phase vs. Load
Output Impedance
Vo =O.SVpp
i
~["..
,
-2
......
RL=SOC "
I -......-..
"
-a
-4
lkQ I--
'- ~ 1OO~
~ ........ ....
"
SOC
-6
I
60
120
180
0
[
-
240
"
O·
'" -
lOOC..!::::::
I I
o
2S
...... ....... ......
1kQ
Phase
30
r--.....
N
.9
~
LZo
20
L
15
10
-45·
5
-135·
0
-180·
-5
-
.t:'l
r-.....
-80·
-85·
LZi
.......... r--.
l\-
20·
f '- Frequency (MHz)
3-18
°
10·
1'1'"
O·
100
-90·
&:i'
40
~
30
~
""'
300
1\
~
20
-95·
10
10
40·
30· N
~
f'.
10
60·
SO·
50
IZII
1'1"-
~
PSRR VS. Frequency
60
I\-
100
V
10
1"""' ....
.......
~
f - Frequency (MHz)
Input Impedance vs. Frequency
10k
V
""
II
70·
'""it
300
f - Frequency (MHz)
lOOk
80·
35
Gain
0
= 100 Q
100
300
10k
lOOk
10M
1M
100M
f - Frequency (Hz)
P-32167-Rev. B (11/15/93)
Siliconix
Si584
AMemberofthe TEMIC Group
'fYpicaJ Characteristics: TA = 25°C, Vee = ± 5 V, RL = 100 g (Cont'd)
Forward Gain YS. CL with Recommended Rs
I
! I
Recommended Its YS, Load Capacitance
:¥
100
I
80
I II
II
I
I
975Q
I
I III
Vour = 0.5 Vp-p
Vo
'I2OO~ t~~ IS3~Q
50Q _
Rs
0
~,
iiQ
~
60
'"
"- ~
40
'
.......
::l
;::l -0.5
200Q
RL=100Q
-0,15
-2,00
i\
-1,0
o
20
40
60
Time (10 ns/DiY)
P-32167-Rev, B (11/15/93)
80
100
-1.0
-0,6
-0,2 0
0,2
0,6
1,0
VIN(V)
3-19
Siliconix
Si584
AMcmbcr oftb TSMIC Group
1Ypical Characteristics: TA
= 25°C, Vee = ±5 V, RL = 100 Q (Cont'd)
Output Current vs. Temperature
'JYpical de Errors vs. Temperature
100
3.5
90
3.0
80
2.5
1
~
8
ia
0
70
60
Source__
50
i--""
40
30
20
10
.-- i--""
o
,.,-
-
--
i--""
i--"'"
Sin~i"'"
-~
~
2.0
~
1.0
~
~ I-'
'il
t:!
0
"- t\..
"
1.5
0.5
0.40
0.36
........ .......
-20 0
20
60
Voltage
3.9 nV/1HZ
,
0
100
0.12
-20 0
===
~
]
2nd 1000
-55
-65
I
0.1
2nd 200 0
10M
r- ~~WEROur_
~ ~OO
500-
...
-
"- ~
24
'r'(
K.~ ~
!;'
I
I
~
IJ
/ / [I
2ndiwi
T Oiii
3rd1W
100
All-Hostile Crosstalk Isolation
105
95
85
~
.~
-=
""g
~
~
~
..... ro;:
75
~
6S
RL=lW
55
RL= 1000
45
35
""~i'
25
~
15
20
o
140
10
~
~
22
0.04
f - Frequency (MHz)
2-Tone, 3rd Order Intermodulation Intercept
26
~
- 1/11
100M
30
1'.....
100
-"" ~
1 1
f - Frequency (Hz)
r:--
~
RL
3rd2000
-85
1M
60
3rd 1000
I
.J
lOOk
20
...
-45
-75
10k
a~
o---C>l0 = 2 Vp-p
f==
Current
0.9 pA/1HZ
1k
ei'
2nd and 3rd Harmonic Distortion
-35
~
100
0.08
I:1j
Thmperature ("C)
B
.iIl
5
10
20
30
f - Frequency (MHz)
3-20
0.16
........ r-....
........
i
o
-60
140
.~
~
~
. . . i'...
'0'
~
f
........ ...............
0.20
-0.5
Equivalent Input Noise
I
~B
-1.0
10
±.,
0.24
Vos ........ ~
Thmperature (0C)
e
!g
0.28
~
-1.5
-60
28
0.32
~
40
50
lOOk
1M
10M
100M
f - Frequency (Hz)
P-32167-Rev. B (11/15/93)
Siliconix
Si584
AMember of the 'I'BMIC Group
Test Circuit
VIN
R
R
R
R
R
Figure 1. Test Load
Applications
Operation
The Si584 is a quad unity gain buffer that offers high-speed
and low-power operation. Its closed loop topology provides
higher accuracy than that normally found in open loop
designs. The Si584 was designed to optimize differential
gain and phase when driving the distribute"d capacitance of
a video multiplexer or crosspoint such as the DG884.
+5V
Ferrite
Bead
(optional)
Board Layout and Crosstalk
High frequency designs demand good PC board layout for
best performance. A ground plane and power supply
bypassing with high-frequency ceramic capacitors adjacent
to the power supply pins are essential. Second harmonic
distortion can be improved by ensuring equal current
return paths for both the positive and negative supplies.
This is accomplished by connecting one side of the bypass
capacitors at the same point in the ground plane while
keeping the supply sides within 0.1" of the Si584 supply
pins.
Crosstalk is strongly dependent on board layout. Closely
spaced signal traces on the board will degrade crosstalk due
to capacitive coupling. A grounded guard trace between
signal traces will reduce crosstalk by reducing intertrace
capacitance. For this same reason it is recommended that
unused pins (2, 4, 6, 11) be connected to the ground plane.
VIN
0----._1"'•. . ;3•....;5.:,..7-;
14.12.10.8 ROUT
>"";"";'--''--''--'V\I\r-o VOUT
RIN
-5V
Figure 2. Decoupling the Si584
'~-Hostile"
crosstalk is measured by driving three of the
four buffers simultaneously while observing the fourth,
undriven, channel.
Unused Buffers
It is recommended that the inputs of any unused buffers be
tied to ground through 50-0 resistors.
P·32167-Rev. B (11/15/93)
Minimum Parts Count SO-MHz Video Switcher
Figure 3 illustrates a fully buffered 8 x 4 video switching
matrix capable of handling 80-MHz signals with only four
ICs. At the heart of this circuit is the DG884 crosspoint.
U1 and U2 buffer all eight inputs while U4 can drive a
second level of switching elements.
3-21
Silicanix
Si584
AMcmbcrofthe'D3JoucGroup
Applications (Cont'd)
It is worth noting that every time a video signal is processed
by an active or passive component, its bandwidth is subject
to a reduction due to each individual processing element's
own bandwidth. That is why, even when switching
baseband video, it is better to use a broadband switcher in
order to preserve signal quality and fidelity.
For lower bandwidth applications one Si584 output can
drive up to four DG884 inputs. This is useful when building
larger matrices ( 8 x 8, 8 x 16, etc.).
Providing the receiving end is properly terminated, the
Si584 can also be used as a cable driver for short distances.
When driving long cables that mayor may not be properly
terminated it is better to use a back terminated cable driver
with a 6-dB gain. This driving method reduces transmission
line reflections. The Si582 is recommended for this type of
application.
Inputs
IN1
Video 1
Outputs
I
I
I
I
I
Video A
-
IN4
Video 4
VideoB
DG884
Crosspoint
VideoC
U3
VideoS
-
INS
I
I
I
I
I
VideoS
VideoD
-
INS
Control
Figure 3.
3-22
Minimum Parts Count 80 MHz 8 X 4 Video Switching Matrix
P·32167-Rev. B (11/15/93)
An2J.llog
t~hiV.D:tcllil~s
Analog 1\1hl1ln11:ftlPH~xer§
'VViidebmmd/Virileo AmpHificlr§
Voltage Converters
AppCJlldhix
Worldwide Sales Offices and Distributors
m
Siliconix
AMombcr of the TBMIC Group
About Siliconix Voltage Converters
Siliconix presently supplies three types of power conversion circuits: charge pump voltage converters,
high-voltage switchmode regulators, and high-voltage switchmode controllers.
Our family oflow-cost switched capacitor voltage converters are used in applications where a single dc
supply is available. These monolithic products feature high conversion efficiency, minimum noise and
distortion, and minimum space requirements. They can be configured for voltage inversion or voltage
doubling, and require only a few external components (typically two electrolytic capacitors). A typical
application would be negative rail generation in a circuit with a battery supply.
The Si7660 is a voltage converter that inverts or boosts input voltages from the 1.5- to 10-V range. It
features power conversion efficiencies up to 98%. The Si7661 is a higher-voltage version of the Si7660
intended for input voltages from 7.5 V to 20 V.
The high-voltage switchmode regulators and controllers made by Siliconix employ high-performance
D/CMOS power IC technology to combine CMOS current-mode controllers with high-voltage input
regulation and output switching. This design allows Siliconix to build extremely high efficiency
switchmode power supply circuits that can run directly from high-voltage inputs such as PBX or ISDN
phone lines, or 100-VAC power lines.
The data sheets for Si91xx family of switchmode regulators and controllers may be found in the Siliconix
Power Products Data Book.
Voltage Converters
Max
Supply Current
Min
Supply Voltage
Max
Supply Voltage
Part Number
(mA)
(V)
Si7660
0.175
1.5
Si7661
2
4.5
Min
Output Voltage
Max
Output Voltage
(V)
(V)
(V)
10
-10
20
J,Y
4-1
20
-20
40
J
4-7
-----
J = Plastic DIP
Y= sOle
II
-
Package
------- -
- -
Page
Silicanix
Si7660
AMember ofthoTBMlC Group
Switched-Capacitor Voltage Converter
Features
Benefits
Applications
• 99.7% Open Circuit Voltage
Conversion Efficiency
• 98% Power Efficiency
• Operating Voltage Range of 1.5 to 10 V
• Requires Only Two Capacitors
• Inexpensive Negative Supply from
Positive Supply
• Easy to Use
• Minimum Parts Count
• SmaIl Size
• No Diode Drop at Output
• LowCost
• Conversion of S-V Logic Supply to
± S-V Supplies
• Negative Supply for Dynamic RAMs
• RS-232 Power Supply
• Negative Supplies for Analog Circuits
• Data Acquisition Systems
• Hand-Held Instruments
• High-Side Load Switches
Description
The Si7660 is a monolithic CMOS switched-capacitor
voltage converter that inverts (VaUT = - VIN), doubles
(VaUT = 2 VIN), divides (VaUT = VIN/2), or multiplies
(VaUT = ±n VIN) an input voltage. Operation with no
external diode is guaranteed over the full temperature
range for input voltages ranging from loS V to 10 V.
The Si7660 combines low quiescent current with high
efficiency and reliability. Included on chip are an oscillator,
control circuitry and four power MOS switches. An
epitaxial layer prevents latchup.
The oscillator, when unloaded, runs at a nominal 12 kHz.
The OSC pin may be used to change the running frequency.
The LV pin should be tied to ground to improve lowvoltage
operation (V + :5 3.5 V). For V + > 3.5 V, the LV pin
should be left disconnected.
1YPical applications include generating a -S-V supply from
a S-V logic supply to power analog circuits, generating 6 V
from a 3-V lithium cell, or 3 V from a single 1.S-V cell.
For additional information please refer to Applications
NoteAN401.
Functional Block Diagram and Pin Configuration
Dual-In-Line and sOle
Ordering Information
NC
v+
CAP+
ase
LV
GND
CAP-
VOUT
Temp Range
Package
Part Nwnber
oto 70°C
8-Pin Plastic MiniDlP
Si7660CJ
8-Pin Plastic MiniDlP
Si7660DJ
8-PinNarrowSOIC
Si7660DY
-40t085°e
III
ThpView
P-32167-Rev. B (11108/93)
4-1
Silicanix
Si7660
AMember of the TBMIC Group
Absolute Maximum Ratings
SupplyVoltage(V+ toGND orGND toVOUT) ............ 11 V
Oscillator Input Voltage:
(V+ < 5.5 V) .................... -0.3 Vto (V+) +0.3 V
(V+>5.5V) ............... (V+)-5.5Vto(V+)+0.3V
LV ............................ No connection for V+ > 3.5 V
Storage Thmperature . . . . . . . . . . . . . . . . . . . . . . . . . .. -65 to 125'C
Power Dissipation:'
8-PinPlasticDIpb .................................. 300mW
8-Pin SOICb ....................................... 300 mW
Notes:
a. All leads soldered or welded to PC board.
b. Derate 10 mWI"C above 75'C
Specifications
Thst Conditions
Unless Otherwise Specified
Limits
I 'JYpc I
Symbol
V+ = 5'\1, Case = Od
Temp'
Minb
Supply Voltage Range Low
V+L
RL = 10k,Q, LV = GND
Full
1.5
3.5
Supply Voltage Range High
V+H
RL = 10k,Q,LV = Open
Full
3
10
Parameter
Maxb
Unit
Input
1+
Supply Current
RL =
Full
100
175
f1A
V+ = 5 '\1, LV = Open, 10 = 20mA
Room
Full
.55
100
120
Q
V+ -2'\1,LV - GND,Io - 3mA
Full
RL - 5 k,Q
Room
95
98
Room
99
99.9
00,
LV = Open
V
Output
Output Source Resistance
ROUT
Power Conversion Efficiency
PEl
Voltage Conversion Efficiency
VOUTEl
RL=
00
300
%
Dynamic
Oscillator Frequencyd
Room
12
kHz
V+ = 2'\1,LV= GND
Room
1
MQ
V+-5V
Room
100
k,Q
fose
Oscillator Impedance
Zose
Notes:
a. Room = 25'C, Full = as determined by the operating temperature suffIX.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. 1Ypical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. For Case> 1000 pF, Cl and 02 should be increased to lOO!-lR Cl = Pump Capacitor, 02 = Reservoir Capacitor.
1Ypical Characteristics
Power Conversion Efficiency vs. OSC Frequency
100
95
[
.ie
~
".
,.-
IL=lmA
1\
\.
50
90
........
10--"
85
80
Output Resistance as a Function of Supply Voltage
100
/
",.~
IL= 15mA
/
"""
-
r--. .......
20
-
......
75
70
10
100
1000
OSC Frequency (Hz)
4-2
10000
o
2
4
6
8
Input Voltage (V)
P-32167-Rev. B (11108/93)
10
Silicanix
Si7660
AMcmber oCthe TBMIC Group
'IYpical Characteristics (Cont'd)
Inverting Output Voltage vs. Output Current
Output Source Resistance vs. Temperature
100
r-
i
L Jm1
c:
~
,
60
g
40
I-- ~ i-""""
-
I---'"
20
0
~
80
".
-1
V
Y
.....,., ....L
~
./
V+=~
..........V+=5V
_
~
E
E:
-2
-'
-3
-4
o
-5
-60 -40 -20 0
20
40
60 80
100 120 140
o
E:
~
~
-~
-4
~
I--
-.....-
~
....".,.
.....- ~
.....~
-~
-6
I--
o
i..--"
~
I--
20
LV
60
40
~
"""'"
~ __ I"""
-8
-10
./
V" ,. V
- - -"...
-----
-2
E
./
20
30
I
I
40
50
60
Supply Current vs. Temperature
- l v 15V 16J
I I
V /
",
".
1/ /
/
~
/'
I/'"
Output Current (rnA)
140
vl=~v
/
LV=GND -
10
Inverting Output Voltage vs. Output Current
0
",
... /
TA - Thmperature (0C)
2
L
L
.,.... ./~
---
~
r--
~.5V..I ;--- ~.5V /
r - vl = 1 . 5 J /
....
,
120
7V
<'
8V
9V
/
_L
I
I- V+=5V
RL= 00
C
100
"i'..
~
j
~
,
....... i'oo..
./
80
lOV
....
60
Open
80
100
40
-60 -40 -20
0
20
40 60
80 100 120 140
Output Current (rnA)
TA - Temperature (0C)
Oscillation Frequency as a
Function of External OSC Capacitance
Unloaded Oscillation Frequency as a
Function of Temperature
10k
30
r-...
1k
-
~
~"'"
V+=5-VSupply
V+ =2-VSupply
25
-
20
15
""
""
100
10
10
100
OSC Capacitance (pF)
P-32167-Rev. B (11/08/93)
1k
i\.
"i'.
"-
5
'"'\.'\.
10
\
10k
o
-60 -40 -20
..... 5-VSupply
i'. ......
....... r--..
.......
2-VSupply
1
1·1
0
20
•
- -......
40 60 80 100 120 140
TA - Temperature (0C)
4-3
Siliconix
Si7660
AMcmbcr of the TBMlC Group
lYpical Characteristics (Cont'd)
Doubler Output Voltage vs. Output Current
20
~+ I 10~
16
st
12
-
8
......
4
"I"""'"
6~
I
-r-
-t r J
e
o
4V
o
u 4
-10
-20
I
-40
-30
-50
Output Current rnA
Schematic Diagram
r------~-----4~-----~--~----------_O
V+(8)
r - - - - - - - - - - O CAP+ (2)
.--------0
CAP- (4)
'---t--O VOUT (5)
GND
(3)
Figure 1.
Test Circuit
1+
1
8~----'----1---~
...----12
7
3
6
'-----14
5
- - - - - - - , Case
~
_
-
V+
lour
-L
-r
-L
Vour=VIN
~
10JlF
I
+
Figure 2.
4-4
P-32167-Rev. B (11/08/93)
Siliconix
Si7660
AMemberofthe TBMIC Group
Applications
There are many applications where a low current supply
made with a charge pump does just as well as a
conventional, fully regulated negative supply or dc-to-dc
converter module. The Si7660 contains all the circuitry
necessary to make a charge pump for voltage inversion,
doubling, division, multiplication, etc. Only two external
capacitors are needed and they may be inexpensive
electrolytics. Since the output resistance is in the tens of
ohms, heavy load currents will reduce the output voltage
and eventually may cause the device to go into shutdown.
the device can be exceeded. The maximum recommended
capacitor size is 1000 J.lF.
A previous version of the Si7660 required a diode in series
with Pin 5 when operating above 6.5 V. The current Si7660
does not require this diode, but will work in existing circuits
which have the diode.
Figure 4 shows a circuit that will produce two output
voltages utilizing both of the Si7660 features (i.e. inversion
and doubling). The combined output current must be
limited so the maximum device dissipation is not exceeded.
If the output ripple of the Si7660 is too great for a particular
application, the value of the pump (Cb Figure 3) and
reservoir (C2, Figure 3) capacitors can be increased to
reduce this effect. However, it is important to note that
increasing the capacitor size can lead to surge currents at
turn-on. If the current is too great, the power dissipation of
Two Si7660s can be paralleled to reduce the effective
output resistance of the converter. The output voltage at a
given current is increased since the voltage drop is halved
when the devices are connected as shown in Figure 6.
V+
Si7660
2
Vour= -(VIN - VFDX)
Your t---t----,--()
V+
8
7
Si7660
Cj
lO"F
-
3
5
4
::c.
Vour
C2
10"F
-
~
Figure 3. Basic Inverter Circuit
VIN
+15V
Si7660
V+
Cj
Cj
D2
Vour
+
tI.
V+
CAP+
Dj
CAP+
vour = (2 VIN) - (VFDI + VFD2)
Figure 4. Combination InverterlDoubler Circuit
VIN
Si7660
D2
~------~~--~~--O
Si7660
V+
CAP+
+
+23.6 V
C3
CAPVour
GND
Your = VIN
CAPVour
GND
+~
Figure 5. Creating +23.6 V from +15 V and +5 V
P-32167-Rev. B (11/08193)
~
Figure 6. Paralleling Two Si7660s to Reduce
the Effective Output Resistance
4-5
III
Siliconix
Si7660
AMcmberofthe TBMIC Group
Applications (Cont'd)
Battery Splitter
High Precision Voltage Divider
To obtain supplies from a single battery or power supply,
the circuit shown in Figure 7 offers a simple solution. It
generates symmetrical ± output voltages equal to one-half
the input voltage. Both output voltages are referenced to
Pin 3 (output common). To improve low voltage operation,
Pin 6 should be connected to Pin 3 when the input voltage
is less than 3.5 V.
A high precision voltage divider is shown in Figure 8.
Increasing the load current beyond 100 nA will cause a
small loss in accuracy.
4.5 V
8
VB
9V
+
2
7
Required for VB <3.5 V
Cl
- lOIlF
3
6
...,/
4
5
Si7660
-4.5 V
+
Output
3VSVBSllV
Figure 7.
Common
Battery Splitter
8
,..----12
VIN(3Vtoll V)
7
Si7660
36...,
1..--+--14
VIN
2
____ ~-..J
±O.OO2%
-
-tr
...l..
C:z
lOIlF
RequiredforV+ <3.5V
Figure 8. High Precision Voltage Divider
4-6
P-32167-Rev. B (11/08193)
Silicanix
Si7661
AMember of the TEMIC Group
Switched-Capacitor Voltage Converter
Features
Benefits
Applications
• Wide Operating Supply Voltage Range:
4.5Vt020V
• 99.7% Open Circuit Voltage Conversion
Efficiency
• 95% Power Conversion Efficiency
• Inexpensive Negative Supply
Generation
• Easy to Use, Requires Only Two
External Capacitors
• Minimum Parts Count
• Small Size
•
•
•
•
•
•
Conversion of +l2-V to ± 12-V Supplies
RS-232 Power Supply
Negative Supplies for Analog Circuits
Data Acquisition Systems
Handheld Instruments
High-Side Load Switches
Description
The Si7661 is a monolithic CMOS power supply circuit
which offers unique performance advantages over
previously available devices. The Si7661 performs a supply
voltage conversion from positive to negative for an input
range of +4.5 V to +20 V, resulting in a complementary
output voltage of -4.5 V to -20 V with the addition of only
two capacitors.
oscillator, voltage level translator, four power MOS
switches, and a logic network. This logic network senses the
most negative voltage in the device and ensures that the
output n-channel switch substrates are not forward-biased.
An epitaxial layer prevents latchup.
The oscillator, when unloaded, runs at a nominal frequency
of 10 kHz for an input supply voltage of 4.5 to 20 V. The
"OSC" terminal may be connected to an external capacitor
to lower the frequency or it may be driven by an external
clock.
Typical applications for the Si7661 are data acquisition and
microprocessor based systems, where a +5- to +20-V
supply is available for the digital functions, and an
additional -5- to -20-V supply is required for analog
devices, such as op amps. The Si7661 is also ideally suited
for providing low current, -5-V body bias supply for
dynamic RAMs.
The "LV" terminal may be tied to GROUND to bypass the
internal regulator and improve low voltage (LV) operation.
At high voltages (+8 to +20 V), the "LV" pin should be left
disconnected.
Contained on the chip are a voltage regulator, RC
For applications information refer to AN401.
Functional Block Diagram and Pin Configuration
Dual-In-Line
NC
Ordering Information
V+
asc
CAP+
GND
LV
CAP-
VOUT
ThmpRange
Oto70·C
-40to8S·C
Paclmge
8-Pin Plastic MiniDIP
Part Number
Si7661CJ
Si7661DJ
ThpView
P-32167-Rev. B (l1/1S/93)
4-7
Silicanix
Si7661
AMember aftbe TBMIC Group
Absolute Maximum Ratings
Supply Voltage (V+ to GND or GND to VOUT) ............ 22 V
Oscillator Input Voltage
V+ BV ......................... (V+) -BVto(V+) +0.2V
LV .............................. NoconnectionforV+ >9V
Storage Thmperature . . . . . . .. . . . . . . . . . . . . . . . .. .. -65 to 125°C
Power Dissipation:'
8-PinPlasticMiniDIpb .............................. 500mW
Notes:
a. All leads welded or soldered to PC board.
b. Derate 6.6 mWI'C above 25°C.
Specifications
Thst Conditions
Unless Otherwise Specified
Limits
I 1YP" I
Symbol
V+ = 15 V, Case = Od
Tempa
Minb
Supply Voltage Range Low
V+L
RL= 10kQ,LV= GND
Full
4.5
9
Supply Voltage Range High
V+H
RL = 10 kQ, LV - Open
Full
8
20
V+ - 4.5 V, RL - co,LV - GND
Full
100
200
!lA
V+ = 15V,RL = co, LV = Open
Full
0.7
2
rnA
V+ = 4.5 V, LV = GND,IOUl' = 3 rnA
Room
35
Room
30
100
r.!
Parameter
Maxb
Unit
Input
1+
Supply Corrent
V
Output
Output Source Resistance
RoUl'
V + = 15 V, LV = Open, IoUI' = 20 rnA
120
Full
Power Conversion Efficiency
PEF
V+ -15V, RL - 2kr.l
Room
Voltage Conversion Efficiency
VEF
V+ =15V,RL= co
Room
92
97
%
99.7
Dynamic
Oscillator Frequencyd
fose
Oscillator Impedance
Zose
V+ = 15V
Room
10
kHz
V+ - 4.5 V, LV - GND
Room
1
Mr.!
V+ -15V
Room
100
kr.l
Notes:
a. Room = 25°C, Full = as determined by the operating temperature suffIX.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. lYpical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. For Case> 1000 pF, Cl 'and ~ should be increased to 100 I'F. Cl = Pump Capacitor, ~ = Reservoir Capacitor.
1Ypical Characteristics
Output Source Resistance as a
Function of Supply Voltage
130
V+ =5V . /
70
'\
50
4-8
90
~
70
30
110
\~
90
g
i:>:
130
\
110
Ci'
Output Source Resistance as a
Function of Thmperature
o
4
lOUT = 3 rnA
50
~=~OrnA
30
8
12
Supply Voltage (V)
16
20
V
10
-55
I"'"
-25
-
~
5
.£
~ ~~15V
I
35
65
Thmperature (0C)
95
125
P-32167-Rev. B (11/15/93)
Siliconix
Si7661
AMember of the TBMIC Group
1Ypical Characteristics (Cont'd)
Output Voltage-LV
0
=GND
-2
~
V::'~!--
-4
-4
~
~
~
Output Voltage-LV = Open
0
j
-6
-~
-~
-8
-12
-10
60
40
80
o
100
90
I
20
80
\\
70
60
-55
r\.
-25
""""'" I\..
~
5
65
35
~
10
125
95
'"
100
V+ 15V TA=25"C -
10
100
1000
10000
Power Efficiency vs. Oscillator Frequency
,,~
"- .....
8
95
.......
~
6
4
_
80
100
10
2
20V
Cose - Oscillator Capacitance (pF)
Unloaded Oscillator Frequency
as a Function of Temperature
12
~
16V
18V
"' l\.
100
Temperature ('C)
14
~
~
14V
Frequency of Oscillation as a
Function of External Oscillator Capacitance
1k
"- ......
40
--
~
12V
10k
I
50
16
60
40
RL= 00
LV=GND
V+ =4.5V
\
~
10V
Output Current (mA)
Supply Current vo. Temperature
100
i"'"
~
Output Current (rnA)
j
I"'"'"
-20
20
0
~
,.. //
,.."""" . /
,..
,.. . /
-16
-8
<'
.:,
-- -
,,/
-- ---
r--.
i
90
~~
V+ = 15V
lOUT = 1mA
Cl =y.= lO"F
25
50
Thmperature ('C)
P-32167-Rev. B (11/l5/93)
- ......
85 f- TA=25'C
I I
o
,... i-'"
~
V+ =15V
-25
~
75
100
125
80
100
'I I I I'll
1k
10k
fose - Oscillator Frequency (Hz)
4-9
Siliconix
Si7661
AMembcr ofthe TBMIC Group
Schematic Diagram
r-----------~--------~------------~----~--------------------_oV+(8)
,---------------------0 CAP+ (2)
r - - - - - - - o CAP- (4)
L-~__<)
VOUT(5)
GND
, (3)
Figure 1.
Test Circuit
l+
V+
8
7
6
-------,
Case
~ ...L
-r
...L
5
lOUT
RL
L--<>
-
VOUT
Figure 2.
Applications
The Si766!'contains all the circuitry necessary to make a
charge pump for voltage inversion, doubling, division,
multiplication, etc. Only two external capacitors are
needed and they may be inexpensive electrolytics. Since
the output resistance is in the tens of ohms, heavy load
currents will reduce the output voltage and eventually may
cause the device to go into shutdown.
4-10
There are many applications where a low current supply
made with a charge pump does just as well as a
conventional, fully regulated negative supply or dc-to-dc
converter module. Some examples are negative power
supplies for microprocessors, dynamic RAMs, or data
acquisition systems. In addition, the extended input
voltage range of the Si7661 lends itself for use as a negative
generator for most op-amp applications.
P-32167-Rev. B (11/15/93)
Siliconix
Si7661
AMember of the TeMrc Group
Applications (Cont'd)
If the output ripple of the Si7661 is too great for a particular
application, the value of the pump (C h Figure 3) and
reservoir (Cz) capacitors can be increased to reduce this
effect. However, it is important to note that increasing the
capacitor size can lead to surge currents at turn-on. If the
current is too great, the power dissipation of the device can
be exceeded, causing destruction of the device. The
maximum recommended capacitor size is 1000 1-lF.
When an external clock is used to drive the Si7661 a 1-kQ
resistor should be used between the clock source and the
OSC input (Pin 7) as shown in Figure 4.
Figure 5 shows a regulator that will operate with much less
than 1-V drop between V+ and VOUT at large output
currents. Most three-terminal voltage regulators would
exhibit a drop of a volt or more under these conditions.
v+
v+
8
8
7
Z
Si7661
3
6
4
5
Z
Cl
10"F
Your
7
Si7661
3
6
4
5
-
Your
Cz
~
~ 10"F
~ 10"F
Figure 3.
Gate
Basic Inverter Circuit
Figure 4.
Driving the Si7661 with an External Clock
8~--~------------------~-O v+
z
Si7661
7
3
4
•
VN0300
Vz'
'The Zener voltage sets the output of the regulator.
VOUT
Figure s. Low Loss Regulator Circuit
P·3Z167-Rev. B (11/15/93)
4-11
Siliconix
Si7661
AMember ofthc TBMIC Group
Applications (Cont'd)
Battery Splitter
High Precision Voltage Divider
To obtain supplies from a single battery or power supply,
the circuit shown in Figure 6 offers a simple solution. It
generates symmetrical ± output voltages equal to one-half
the input voltage. Both output voltages are referenced to
Pin 3 (output common). Th improve low-voltage operation,
Pin 6 should be connected to Pin 3 when the input voltage
is less than 9 V.
A high precision voltage divider is shown in Figure 7.
Increasing the load current beyond 100 nA will cause a
small loss in accuracy.
1
2
Cl
- lOI1F
3
6
4
S
--
VB
12V
6V
8
+
7
Si7661
Required for VB <9 V
...,/
-6V
+
Output
4.5 V S VB S 22V
Figure 6.
Common
Battery Splitter
1
8
r-----~2
7
Si7661
V+(3Vto18V)
36...,
~--+-~4
Y..±.
2
±O.002%
:c.
~
s~L-~
I
I
___ , __ .J
lOI1F
RequiredforV+ <6V
Figure 7. High Precision Voltage Divider
4-12
P·32167-Rev. B (11/1S/93)
~:&1 f
"
L-_ _
'_
Appendix
II
Siliconix
Application Notes
AMember oftho TBMICGroUP
The following literature is designed to help you use Siliconix products in your applications. Call our FaxBack
system (408-970-5600) to have the document sent to you immediately via facsimile, or to order a copy to be sent
by mail, call 800-554-5565.
Application
FaxBack
Code Number
Note Number
Analog Switches and Multiplexers
Title
TAlOl
AN203
AN204
9201
9203
9204
AN205
AN206
9205
Serially·Controlled Eight·Channel Analog Switch Array Simplifies Signal Conditioning and Routing
Overvoltage Protection for CMOS Switches and Multiplexers
9206
9207
DG406 Multiplexer Optimizes Medical Simulator
15·ns DG611 Switch Family Combines Benefits of CMOS and DMOS 'Thchnologies
9301
DMOS FET Analog Switches and Switch Arrays
9101
9102
9103
9104
9105
An Introduction to FE1k
FETBiasing
The FET Constant·Current Source
AN207
High·Performance Multiplexing with the DG408
Silicon·Gate Switching Functions Optimize Data Acquisition Front Ends
DMOS
AN301
JFETs
AN101
AN102
AN103
AN104
AN105
SPICE Parameters for Select JFE1k
FE1k As Voltage·Controlled Resistors
LITTLE FOOT'" MOSFET.
AN804
Low-PowerFETs
8804
Designing with Complementary Power MOSFE1k in Surface·Mount (SO.8) Packages
Low·Voltage Motor Drive Designs Using N-Channel Dual MOSFETS in Surface-Mount Packages
Thermal Characteristics of Siliconix's LITTLE FOOT Family of Surface·Mount MOSFE1k
P-Channel MOSFE1k, the Best Choice for High-Side Switching
AN901
Power MOSFETs
8901
Depletion-Mode MOSFE1k Expand Circuit Opportunities
8601
Unclamped Inductive Switching Rugged MOSFE1k for Rugged Environments
AN701
AN702
AN703
AN704
8701
8702
8703
8704
A I-Watt Flyback Converter Using the Si9100
AN705
8705
The Si9910 Adaptive Power MOSFET Driver Improves Performance in High-Voltage Half-Bridge
Applications
AN706
8706
Motor Drive Circuits Using the D469A
AN707
AN708
8707
8708
Designing Low-Power Off-Line Flyback Converters Using the Si9120 Switchmode Controller IC
AN709
8709
AN710
8710
AN711
AN712
VideoIC.
8711
8712
AN801
AN802
AN803
AN601
8801
8802
8803
PowerIC.
Efficient ISDN Power Converters Using the Si9100
Desigoing DC/DC Converters with the Si9110 Switchmode Controller
Desigoing DCIDC Converters to Meet CCITT Specifications for ISDN 'Thrminals
Low-Power Universal-Input Power Supply Achieves High Efficiency
Desigoing with the Si9976DY N-Channel Half-Bridge Driver and LITTLE FOOT Dual MOSFE1k
High-Efficiency Buck Converter for Notebook Computers
HDD Servo Desigo Using the Si9990CS
A High-Voltage Half-Bridge Using the Si9901 with the Si9911 or Si9914
ANSOI
9501
AN502
9502
The DG535/536 Wideband Multiplexers Suit a Wide Variety of Applications
Microprocessor-Compatible Multiplexers Facilitate Video Switching Designs
ANS03
9503
9504
Si581 Wideband Buffer Applications
Video Crosspoint Switch Simplifies Large Matrix Designs
9401
Theory and Applications of the Si7660 and Si7661 Voltage Converters
ANS04
II
Voltage Converters
AN401
(11/15/93)
5-1
Siliconix
Reliability Information
Introduction
Reliability at Siliconix is ensured with two primary
programs: the Reliability Qualification Program and the
Reliability Monitoring Program. Siliconix publishes this
data by product family and it can be obtained by request
through your local sales office.
Qualification Program
Qualification programs of accelerated stress testing are
developed for the introduction of new devices (die
qualifications), packages, major process changes, new
materials or suppliers, new manufacturing equipment, and
new manufacturing locations.
AMemberoftheTBMICGroUP
summarized in general outline form as a flow chart in
Figure I and with operating life data in Thble 3.
Accelerated Reliability
Accelerated tests were developed to shorten the time
reqUired for reliability testing. The life cycle of a
component is accelerated by applying stress that is more
severe than that encountered under normal operating
conditions. This acceleration is produced by elevating
temperatures, increasing humidity or pressure, alternating
hot and cold temperature, switching power on and off, or
some combination of these conditions. The test results are
used to predict normal operating performance. In the
sections below we present a brief description of each stress.
A qualification starts after a qualification test plan is
developed. This plan specifies the following:
Summary of Tests
• Purpose and scope
High Temperature Operating Life
•
Device or geometry types and packages being
qualified
•
Process and assembly specs involved
• Test vehicles and location
• Tests and stresses
•
Duration of each stress
•
Sample sizes
•
Acceptance criteria
•
Number of lots required
Monitoring Program
The Reliability Monitoring Program, which includes
accelerated life tests, is designed to continuously monitor
product reliability. The program furnishes up-to-date
failure-rate and failure-mechanism data which can be used to
predict and improve long-term reliability performance. The
Monitoring Program covers a wide range of teclmologies and
product lines manufactured by Siliconix. In order to
accomplish this, products are grouped by similar technologies.
For example, components built in the same wafer fab, using
the same manufacturing processes, having similar complexity,
functionality, and package types are grouped into a
technology family. One component or more representing
each teChnology group is monitored according to a quarterly
schedule. An internal Reliability Performance Monitor report
is issued monthly and is reviewed by all engineering groups to
ensure improvement of product reliability.
The short-term and long-term monitor tests are outlined in
Tables I and 2. Also, the Reliability Monitor Program is
5-2
The high-temperature operating life accelerated test,
commonly referred to as "burn-in," is performed at
typically 125·e and 150·e under electrical bias.
The steady state and dynamic life tests determine the ability
of a product to survive a host of potential failure modes,
surface inversion, dielectric breakdown, and'electromigration
being typical examples.
Temperature Cycling Test
'Thmperature cycling exploits the differences in thermal
coefficients of expansion between silicon and the other
materials used in die fabrication and packaging. Each cycle
consists of IO-minute exposures at -65°e and 150·e with
a I-minute transfer at room temperature between the
temperature extremes. This test reveals potential
weaknesses in die and package materials and construction
and in the integration of the die and package.
Thermal Shock Test
The purpose of the thermal shock test is similar to that of
temperature cycling. This stress is more extreme, however,
due to the fact that the ambient medium is liquid and not
air, and the transition time is much shorter than for
temperature cycling.
Each cycle consists of a 5-minute exposure at -65·e and
l50·e with a maximum lO-second transfer time between
the temperature extremes.
(11115193)
Siliconix
Reliability Information
AMember of the TBMIC Group
Bias Humidity Test
Pressure Pot Test
The bias humidity test is used to test plastic packaged
devices for the effects of moisture penetration while
electrical potentials are applied. The components are
placed in a biased condition and then are subjected for
1000 hours to a temperature of 85°C and a relative
humidity 85%. This test confirms package integrity.
In the pressure pot test, water vapor is forced into
non-hermetic packages via micro gaps in the package-lead
seal. Water is then carried to the die surface via capillary
action of the bond wires. Electrical leakage may result.
External contamination of the package or lead finish may
be transported to the die or may directly cause corrosion of
the leads.
Table 1. Short-Term Reliability Monitor
'l'e~t
Condition
Sample Size
'l'estPoints
Static Operating Life
Dynamic Operating Life
121 'c, 15 PSIG
Pressure Pot
Thenna1 Shock
168 hours
125'C or 150'C
50
48 hours (Plastic)
Uquid to liquid. -65'C to 150'C
100 cycles
Solderability
MIL·SID·883D, M2OO3
Lead Integrity
MIL·SID-883D, M2004
(245'C ±5'C)
UdThrque
MIL-SID-883D, M2024
Marking Permanency
MIL-SID-883D, M2015
16 leads
Salt Atmosphere
MIL-SID-883D, M1009
15 leads
ESD, Human Body Model
MIL-SID-883D, M3015
12 leads
15 leads
(Hennetic)
24 hours (Hermetic)
Table 2. Long-Tenn Reliability Monitor
Test
Condition
Sample Size
ThstPoints
Static Operating Life
Dynamic Operating Life
125'C or 150'C
0, 168, 1000 hours
50
Biased Humidity (Plastic)
85'C, 85% relative humidity
Thmperature Cycling
Air-ta-air -65'C to 150'C
Power Cycling
11 TJ = 100'C
0, 500, 1000 hours
0, 250, 1000 cycles
30
0, 2000, 6000 cycles
Table 3.
High Thmperatul"e Operating Life
Technology
Number of Units
•
l"ITs8
Equivalent Device Hours
at S5~C and 1.0 eV
at 60% CLb
Metal-Gate, HVMG
5605
4,618,752,555
0.43
Silicon-Gate, HVSG
4787
3,569,237,924
0.25
Notes:
a. 1 failure per billion device hours
b. Confidence Level
(11/15/93)
5-3
Silicanix
Reliability Information
AMembcr of tho TBMIC Group
Failure Analysis
Record Results and Failure
Mechanisms in Worldwide
Database
Customer Reliability
Reports and Summaries
Internal Reliability
Monitor Report
Figure 1. Reliability Monitor Flow (Short- and Long-Term Monitors)
5-4
(11/15/93)
Silicanix
Package Information
AMember of the TBMlC Group
CerDIP
8· to l6·Pin
CerQuad
28· and 44·Pin
o
Flatpak
14- and l6·Pin
LCC
20· to 28·Pin
PLCC
20· to 44·Pin
Plastic DIP
8· to2O·Pin
SOIC
8· to l6·Pin
Sidebraze Ceramic
14· to 24·Pin
TO·lOO Metal Can
Wide.Body SOIC
16· to 28·Pin
10·Pin
(11/15/93)
•
5-5
Siliconix
Package Information
AMember of the TBMICGroup
• CerDlp, 8· to 16·Pin
MUHlneters
Min
Max
MIn
e
5.08
4.06
1.27
2.16
1.14
1.65
0.51
0.38.
0.20
0.30
9.40
10.16
19.05
19.56
19.05
19.56
6.60
7.62
7.62
8.26
2.54BSC
7.62BSC
3.81
5.08
3.18
3.81
0.51
1.14
0.64
1.52
1.65
2.41
0.38
1.14
O·
IS·
0.160
0.200
0.050
0.085
0.045
0.065
0.015
0.020
0.008
0.012
0.370
0.400
0.750
0.770
0.750
0.770
0.260
0.300
0.300
0.325
O.l00BSC
0.300BSC
0.150
0.200
0.125
0.150
0.020
0.045
0.025
0.060
0.065
0.095
0,015
0.045
O·
IS·
DiIIl
MUHmeters
Min
Max
Inches
Min
Max
A
Al
b
bl
D-l8
D·44
Drl8
Dl-44
E·l8
E·44
e
L
4.20
4.83
2.29
3.04
0.66
0.81
0.46
0.56
12.32
12.57
17.40
17.65
11.63
11.23
16.31
16.71
9.91
10.92
14.99
16.00
1.27BSC
0.51 I
0.165
0.190
0.090
0.120
0.026
0.032
0.018
0.022
0.485
0.495
0.685
0.695
0.442
0.458
0.642
0.658
0.390
0.430
0.590
0.630
0.050BSC
0.020 I
Dim
A
Al
b
bl
C
D-8
D-14
D-16
E
El
e
el
L
Ll
Lz
S-8
S-14
S-16
Inches
Max
• CerQuad Package, 28· and 44·Pin
D-SQUARE
- j j-L
1
0
L_
te
-1
5-6
DI-SQUARE
~
=f1
E
_J
~~AI
-
-
(11/15/93)
Silicanix
AMembor oltho TBMIC Gt'oup
Package Information
• Flat Package, 14- and 16-Pin
MllJilneters
Min
Max
Inches
Min
Max
e
L
S
SI
2.03
2.54
0.66
1.14
0.38
0.48
0.20
0.38
0.10
0.15
8.64
9.14
9.91
10.41
6.10
6.60
6.60
7.11
4.45
4.95
0.76
1.27
1.27BSC
7.62 I 8.89
- I 1.14
0.13 I
-
0.080
0.100
0.026
0.045
0.015
0.019
0.008
0.015
0.004
0.006
0.340
0.360
0.390
0.410
0.240
0.260
0.260
0.280
0.175
0.195
0.030
0.050
0.050BSC
0.300 I 0.350
I 0.045
0.005 I
Diln
MnUlneters
Min
Max
Inches
Min
Max
2.24
1.37
1.63
2.54
0.56
0.71
8.69
9.09
11.23
11.63
1.27BSC
1.14 I 1.40
1.96 I 2.36
0.054
0.088
0.064
0.100
0.022
0.028
0.342
0.358
0.442
0.458
0.050BSC
0.045 I 0.055
0.077 ~ 0.093
Pial
A
Al
b
bI
e
D-14
D-16
E-14
E-16
EI
Ez
• LCC, 20- to 28-Pin
A
Al
B
D-%O
D-%8
e
L
LI
•
(11/15/93)
5-7
Siliconix
Package Information
AMembcr of the TSMIC Group
• PLCC, 20· to 44·Pin
---I
e
D1 - SQUARE ' - -
01--==-1
Dhn
Millilneters
Min
Max
Inches
Min
Max
A
A1
b
b1
D-20
D-28
D-44
D1-2O
D1-28
D1"44
Dz-20
Dz-28
Dz-44
e
L
4.20
4.57
2.29
3.04
0.66
0.81
0.33
0.55
9.78
10.03
12.57
12.32
17.40
17.65
8.89
9.04
11.58
11.43
16.51
16.66
7.37
8.38
10.92
9.91
14.99
16.00
1.27BSC
0.51 I
0.165
0.180
0.090
0.120
0.026
0.032
0.013
0.021
0.385
0.395
0.485
0.495
0.685
0.695
0.350
0.356
0.450
0.456
0.650
0.656
0.290
0.330
0.390
0.430
0.630
0.590
0.050BSC
0.020 I
-
Dhn
MllIhneters
Min
Max
Inches
Min
Max
3.81
0.38
1.27
0.89
0.38
0.20
9.65
17.27
18.93
24.89
5.59
7.62
2.29
7.37
2.79
1.02
1.02
0.38
1.02
O'
0.150
0.015
0.050
0.035
0.015
0.008
0.380
0.680
0.745
0.980
0.220
0.300
0.090
0.290
0.110
0.040
0.040
0.015
0.040
0.200
0.050
0.080
0.065
0.020
0.012
0.460
0.760
0.840
1.060
0.280
0.325
0.110
0.310
0.150
0.080
0.080
0.060
0.080
O'
15·
• Plastic DIP, 8· to 20·Pin
O
1
2
A
A1
Az
b
b1
ff
E
~
E1
!
•
t
1
A
~
*
L
[\
\
r
"
IJ
c
5-8
D-8
D-14
D-16
D 20
E
E1
e
f-e1---i
ct
~
\\
\I
\
eY
L
5-8
5 14
S-16
5-20
e
5.08
1.27
2.03
1.65
0.51
0.30
11.68
19.30
21.33
26.92
7.11
8.26
2.79
7.87
3.81
2.03
2.03
1.52
2.03
15·
(11/15/93)
Siliconix
AMember ofthc TeMIC Group
Package Information
• SOIC, 8- to 16-Pin
Millimeters
Min
Max
Inchell
Min
Max
e
1.35
1.75
0.20
0.10
0.35
0.45
0.18
0.23
5.00
4.69
8.55
8.75
9.80
10.00
3.50
4.05
1.27 BSe
5.70 I 6.30
0.60 I 0.80
O·
8·
0.053
0.069
0.004
0.008
0.014
0.018
0.007
0.009
0.185
0.196
0.336
0.344
0.385
0.393
0.140
0.160
0.050BSC
0.224
0.248
0.024
0.031
O·
8·
Dim
Millimeters
MiJi
Max
lJichell
Min
Max
2.67
4.44
0.97
1.52
0.53
0.38
0.30
0.20
17.53
19.55
21.08
19.56
24.89
26.16
29.97
31.24
7.12
7.87
8.25
7.37
2.54BSe
7.62BSe
3.18
4.44
0.64
1.39
0.25
0.77
2.41
0.51
1.65
0.77
1.65
0.77
2.41
0.105
0.175
0.038
0.060
Om5
0.021
0.008
0.012
0.690
0.770
0.770
0.830
0.890
1.030
1.180
1.230
0.280
0310
0.290
0325
0.100BSC
0.300BSe
0.125
0.175
0.025
0.055
0.010
0.030
0.095
0.020
0.065
0.030
0.065
0.030
0.095
Dhu
A
Al
B
C
D·S
D·14
D·16
E
"
H
L
• Sidebraze Ceramic, 14- to 24-Pin
A
b
bl
c
D-14
D-16
D-10
D-14
E
EI
"
"I
L
LI
Q
S-14
S 16
S 10
S-14
•
(11/15/93)
5·9
Package Information
Silicanix
A Member ofihe 'IBMIC Group
• TO-100 Metal Can, 10-Pin
Millimeters
n=~
D 0 Dl
;----
,
-f-
I L,------- -
--
--
--
--
-
1
T
0h
Md
Dim
Min
A
Al
lifb
lifD
0Dl
E
e
el
j
k
L
4.19
4.70
1.02
0.41
0.53
8.51
9.40
7.75
8.51
0.25
1.02
5.84BSC
2.92BSC
0.72 I 0.86
0.74 I 1.14
12.70
-
Dim
Min
A
Al
b
e
D-16
D 20
D-24
D 28
2.15
2.90
0.10
0.30
0.45
035
0.23
0.28
9.95
10.75
13.30
12.50
15.85
15.05
18.40
17.60
7.25
8.00
127BSC
9.80
10.60
0.60
0.80
0°
8°
-
In<:bes
Max
Mill
0.165
0.185
0.040
0.016
0.021
0.335
0.370
0.305
0.335
0.010
0.040
0.230BSC
0.115BSC
0.028 I 0.034
0.029 I 0.045
0.500
-
• Wide-Body SOIC, 16- to 28-Pin
Millimeters
E
e
H
L
e
5-10
Md
Inches
Miil
Max:
0.085
0.114
0.004
0.012
0,018
0.014
0.009
0.011
0.392
0.423
0.492
0.524
0.624
0.593
0.693
0.724
0.285
0315
0.050BSC
0.386
0.417
0.024
0.031
0°
8°
(11115/93)
Military Information
Siliconix
AMcmber ofthcTBMIC Group
Conversion Table
Original "DG"
Part No.
DG180 Series to MIL-M-38510
This family consists of silicon,
break-before-make, multi-chip analog
switches with drivers.
DG200 Series to MIL-M-38510
This family consists of monolithic, silicon,
CMOS negative logic analog switches.
DG300 Series to MIL-M-38510
This family consists of silicon, CMOS,
monolithic, analog switches with drivers.
DG506 Series to MIL-M-38510
This family consists of monolithic, silicon,
CMOS/analog logic microcircuit.
(11/15/93)
JAN Part No.
JM38510/1110lBCC
JM38510/1110lBCA
JM3851O/1110lBIC
JM3851O/1110lBIA
JM38510/1110lBXA
DG187AP/883
DG187AP/883
DG187AN883
DG187AN883
DG187AL/883
JM38510/11105BCC
JM38510/11105BCA
JM3851O/11105BIC
JM3851O/11105BIA
JM3851O/11105BXA
DG182AP/883
DG182AP/883
DG182AN883
DG182AN883
DG182AL/883
JM38510/11102IlCC
JM38510/11102BCA
JM3851O/11102BIC
JM3851O/11102BIA
JM38510/11102BXA
DG188AP/883
DG188AP/883
DG188AA/883
DG188AA/883
DG188AL/883
JM38510/11106BCC
JM38510/11106BCA
JM38510/11106BIC
JM38510/11106BIA
JM38510/11106BXA
DG184AP/883
DG184AP/883
DG184AL/883
JM38510/11103BEC
JM38510/11103BEA
JM38510/11103BXA
DG190AP/883
DG190AP/883
DG190AL/883
JM38510/11107BEC
JM38510/11107BEA
JM38510/11107BXA
DG185AP/883
DG185AP/883
DG185AL/883
JM38510/11104BEC
JM3851O/11104BEA
JM38510/11104BXA
DG191AP/883
DG191AP/883
DG191AL/883
JM3851O/11108BEC
JM38510/11108BEA
JM38510/11108BXA
DG200AAP/883
DG200AAK/883
DG200AAN883
DG200AAN883
JM38510/1230lBCC
JM38510/1230lBCA
JM38510/1230lBIC
JM38510/1230lBIA
DG201AAP/883
DG201AAK/883
JM38510/1202BCC
JM38510/12302BEA
DG300AAP/883
DG300AAK/883
DG300AAN883
JM38510/1160lBCC
JM38510/1160lBCA
JM38510/1160lBIA
DG304AAP/883
DG304AAK/883
DG304AAN883
JM3851O/11605BCC
JM38510/11605BCA
JM38510/11605BIA
DG301AAP/883
DG301AAK/883
DG301AAN883
JM38510/11602BCC
JM38510/11602BCA
JM38510/11602BIA
DG305AAP/883
DG305AAK/883
DG305AAN883
JM38510/11606BCC
JM38510/11606BCA
JM3851O/11606BIA
DG302AAP/883
DG302AAK/883
JM38510/11603BCC
JM38510/11603BCA
DG306AAP/883
DG306AAK/883
JM38510/11607BCC
JM38510/11607BCA
DG303AAP/883
DG303AAK/883
JM38510/11604BCC
JM385io/11604BCA
DG307AAP/883
DG307AAK/883
JM38510/11608BCC
JM38510/11608BCA
DG506AAR/883
DG507AAR/883
DG508AAP/883
DG508AAP/883
DG509AAP/883
DG509AAP/883
JM38510/1900lBXC
JM38510/19003BXC
JM38510/19007BEA
JM3851O/19007BEC
JM38510/19008BEA
JM38510/19008BEC
Part No.
Standard Military Drawings
Original "DO"
Part No.
DG181AP/883
DG181AP/883
DG181AN883
DG181AN883
DG181AL/883
Basic"DG"
The following analog switches and
multiplexers consists of monolithic, silicon
CMOS except for the DG180, DG189, and
DG129 parts which are silicon, multichip with
bipolar driver.
JAN Part No.
DG129AP
DG180AL
DG180AP
DG180AA
DG189AP
DG201AAZ
DG201AAK
DG201AAP
DG201AAL
DG201AAL
DG271AZ
DG271AK
DG401AZ
DG401AK
DG403AK
DG405AZ
DG405AK
DG408AK
DG408AZ
Standard Military
Orawing Part No.
7801401CA
8767301AA
8767301CA
8767301IA
5962-9068901MEA
77053012A
770530lEA
770530lEC
7705301FA
7705301FC
5962-86716022A
5692-897630lEA
5962-90569012A
5962-9056901EA
5692-8976301EA
5962-89961012A
5962-8996101EA
5962-9204201MEA
5962-9204201M2A
Basic"DG"
Part No
DG409AK
DG409AZ
DG411AZ
DG411AK
DG412AZ
DG412AK
DG413AZ
DG413AK
DG441AK
DG441AZ
DG442AK
DG442AZ
DG508AAP
DGS08AAP
DG508AAL
DG528AK
DG542AP
Standard Military
Drawing Part No.
5962-9204202MEA
5962-9204202M2A
5962-9073101M2A
5962-9073101MEA
5962-9073102M2A
5962-9073102MEA
5962-9073103M2A
5962-9073103MEA
5962-9204101MEA
5962-9204101M2A
5962-9204102MEA
5962-9204102M2A
770520lEA
7705201EC
7705201FA
5692-8768901VA
5962-9155201MEA
5-11
II
Military Information
Siliconix
AMember of tho TBMlc Group
Process Option Flows
Thst and Condition
U.S. Build
u.s. Build
Only if SpecU1elJli
Dr
Parts Marked'l883 Dr
SMD, as Applieablec
QMLOffshore Build
Method~
Description
MIL-STD-883
1l'aceabilily to W/L
SEM
'Spate Rated
Extended Hi.Relb
CIaSlBS/S
JAN Devices
SMDand/883
Compliant Non-JAN
Method SOO4/SOOS
Ruggedized Plastic:
X
X
X
N/A
.4 Flow
X
N/A
N/A
N/A
Internal Visual
2010
Condition A
ConditionB
ConditionB
ConditionB
Die Shear
2019
X
N/A
N/A
N/A
Bond Strength
CertIData
2011
X
N/A
N/A
N/A
Stab Bake
1008·C
X
X
X
X
ThmpCycle
1010-C
X
X
X
X
Centrifuge
200l-E
X
X
X
N/A
PIND
202O-A
X
N/A
N/A
N/A
Fine Leak
1014-Aor-B
X
X
X
N/A
N/A
Gross Leak
1014-C
X
X
X
1st Electrical
per spec
X
X
X
X
Bum-In
101S-Aor-C
72hrs-A
160 hrs per SIS
160 hrs -A or -C
160 hrs. -A or-C
perspecd
Static2S°C
PDAperSlS
Static2S°C
PDA=S%
Static2S°C
PDA=S%
101S-Aor-C
240 hrs Dyn. (Min.)
perSIS
N/A
N/A
Static"
Static2S°C
PDA=5%
N/A
N/A
N/A
Functional"
Functional2S°C
PDA = 3% (datalog)
perSIS
N/A
N/A
Min. Thmp.
X
X
X
X
. Max.Thmp.
X
X
X
X
Interim Electrical
Post Burn-In
Bum-In
Interim Electrical
Post Burn-In
Final Electrical
Fine Leak
1014-Aor-B
X
N/A
N/A
N/A
Gross Leak
1014-C
X
N/A
N/A
N/A
X-Ray
2012
X
N/A
N/A
N/A
QCIA
5005
perspecd
X
X
-55,25, 12S°C
QCIB
5005
X
X
X
N/A
aClc
5005
N/A
X
X
N/A
QCID
5005
X
X
X
N/A
External Vtsual
2009
X
X
X
X
Deltas Option
Option
X
N/A
N/A
Solder Dip Option
Option
Option
Option
N/A
Notcs:
a. On U. S. builds, unless otherwise specified by 38510 or drawing. paris may be assembled offshore.
b. Space Rated Extended Hi-ReI process option avallable uod.. customer seD only.
c. Parts not qualified for /883 or SMD must not be marked as such. Aspecial now for non-compliant. non-JAN product can be genecated as custom. Contact marketing
for details.
d. Per spec is a refereoce to customer SCD.
e. PDA applies 10 both burn-ins.
5-12
(11/15/93)
Military Information
Siliconix
AMcmber altho TeMICGroup
Process Option Flows for Chip/Wafer
Standard Die/Chip with
Element Evaluation
Standard Die/Chip
Standard Die/Wafet' Form
Die ship element evaluation non-compliant!
non-JAN subgroup 1 and 3 performed in-line
Die ship
No canned sample
Die
Wafer form
Wafer probe
Static 25·C (min) per device spec
Internal visual Method 2010 condo B
Wafer probe
Static 25·C (min) per device spec
Internal visual Method 2010 condo B
Wafer probe
Static25·C (min) per device spec
Internal visual Method 2010 condo B
Canned sample:·
Method 2008 MIL S1D 883
Class B device
Subgroup 1 (55-1010)
Internal visual Method 2010 condo B
Subgroup 2 (55-10/1)
Final electrical Static @2S·Cmin/max oper.
temp. (per device spec)
Subgroup 3 (5 Die min)
(5/5 = 1010 or 20/1 wires)
Non-Destructive Thst
Method 2023 wire bond eval.
Method 2011 (cer! and data)
Die prep process
• SEM available
III
(11/15/93)
5-13
Siliconix
Cross Reference
AMcmbcr of the TBMIC Group
Siliconix Part Number (Direct Replacement) Suggestions are baSed' on the similarity of m~chanical and electrical characteristics, as
reported in the manufacturer's published data. Interchangeability is not guaranteed. Before
selecting a device as a substitute, the specifications should be carefully compared.
Siliconix Approximate Replacement
Irulostry
ParlNumber
Sl&onix
ParlNlIIDber
Suggestions are based on the similarity of electrical characteristics, as reported in the
manufacturer's published data. Interchangeablity is not guaranteed, as these parts may have
different pin configurations. Before selecting a device as a substitute, the specifications
should be carefully compared. For devices not shown in this guide, or for additional
information, the user should contact the nearest Siliconix sales office.
Approximate
Replacement
8100609EA
5962·905690lEA
8100610EA
5962·905690lEA
8100611EA
5962·899610lEA
8100612EA
5962·8916301EA
8100613EA
8100614EA
5962·8916301EA
5962·8916301EA
AD200DlAA
DG200AAA
AD200DlAP
AD200DlBA
DG200AAK
DG200ABA
AD200DlCJ
DG200ACJ
AD200DIPB
DG200ABK
DG411AK
AD20lDlAP
AD20lDIBP
DG411AK
DG411DJ
AD20lDICJ
AD302DlAP
DG302AAK
AD302DIBP
DG302AAK
AD302D1CJ
DG302ACJ
AD303DlAP
DG303AAK
AD303D1BP
DG303AAK
AD303D1CJ
DG303ACJ
AD7506DK
DG506ABK
AD7506JN
DGS06ACJ
AD7506JQ
DG506ACK
AD7506KN
AD1506KQ
DGS06ACJ
DGS06ABK
AD7506SD
DG506AAK
AD7506SQ
DG506AAK
AD75061E
AD7506TQ
DGS06AAZ/883
DG506AAK
AD7501IN
AD75071Q
DG507ACJ
DG507ABK
AD7507KN
AD7507KQ
DGS07ACJ
AD750700
DG507AAK
AD75071E
AD7507TQ
DG507AAZJ883
DGS07ABK
DGS07AAK
AD7509KD
DGS09ABK
AD7509KN
DG509ACJ
AD7509SD
DG509AAK
ADG200AA
ADG200AA/883
DG200AAA
ADG200AP
DG200AAN883
DG200AAK
ADG200AP/883
ADG200BA
DG200AAK/883
DG200ABA
ADG200BP
DG200ABK
ADG200CJ
DG200ACJ
ADG201ABQ
ADG201AKN
5-14
DG441AK
DG20lABK
DG44lDJ
DG201ACJ
Page
1·121
1·121
1·121
1·121
1·121
1-127
1-32
1·32
1·32
1-32
1-32
1-137
1·131
1-131
1-90
1-90
1-90
1-90
1-90
1-90
2-52
2-52
2-52
2-52
2-52
2-52
2-52
2-52
2-52
2-52
2-52
2-52
2-52
2-52
2-52
2-52
2-60
2-60
2-60
1-32
1-32
1-32
1-32
1·32
1-32
1-32
1-163
1-31
1-163
1-37
lndostry
Sl&onb:
ParlN_er
Part NlIIDber
ADG201AKR
ADG201tUE
ADG201PUE/883B
ADG201JITQ
ADG201PJQ/883
ADG201CJ
ADG20lHSAQ
ADG201HSKN
ADG20lHSKR
ADG20lHSSQ
ADG201HSlE
ADG20lHSlE/883B
ADG201HSTQ
ADG201HSTQJ883B
ADG202ABQ
ADG202AKN
ADG202AKR
ADG202J'JQ
ADG202JITQ/883B
ADG211AKN
ADG21lAKR
ADG212AKN
Page
DG44lDY
1-163
DG201ADY
1-37
5962·9204101M2A
1-163
DG201AAZ/883
1-37
5962-920410IM2A
1-163
DG201AAZ/883
1-37
DG441AK
1-163
DG20lAAK
1-31
DG441AK/883
1-163
DG20lAAK/883
1-31
DG44lDJ
1-163
DG20lACJ
1·37
1-52
DG201HSAK883
DG271AK
:'
DG201HSAK883
ADG201HSBQ
ADG201HSJN
Approxhnate
Replacement
DG271AK
1-85
1-52
1-85
1-52
DG20lHSDJ
DG271CJ
1-85
DG201HSDJ
DG271CJ
1-52
DG20lHSDY
DG271DY
1-52
1-52
DG20lHSAK883
DG271AK
1-85
DG201HSAZ883
1-52
DG271AZ/883
1-85
DG21IAZ/883
1-85
DG271AK
1-85
1-52
DG20lHSAZ883
DG201HSAK883
1-52
DG201HSAK883
1-52
DG271AK/883
1-85
DG442AK
1-163
DG202AK
1-37
DG442DJ
1-163
DG202CJ
1-31
DG442DY
1-163
DG442AK
1-163
DG202AK
1-31
DG442AK/883
1-163
DG202AK/883
1-37
DG444DJ
1-171
DG411DJ
1-131
DG211CJ
1-60
DG444DY
1-171
DG411DY
1-137
DG211DY
1-60
DG445DJ
1-171
DG412DJ
1-137
DG212CJ
1-60
(11/15/93) .
Siliconix
Cross Reference
AMembcr oftheTBMIC Group
Industry
P&rtNumber
Siliconlx
Part Number
Approximate
Replacement
lndustry
Page
Pan Number
Siliconlx
Part Number
Approximate
Rep/a_ent
Page
DG445DY
1-171
DG412DY
1-137
DG212DY
1-60
ADG221BQ
DG221AK/883
1-75
ADG221KN
DG221CJ
1-75
ADG221KR
ADG221TQ
DG221DY
1-75
DG221AK/883
1-75
ADG408BN
DG408DJ
2-11
ADG408BR
ADG408TQ
DG408DY
2-11
DG408AK
2-11
ADG409BN
DG409DJ
2-11
ADG509AKR
ADG409BR
ADG409TQ
DG409DY
2-11
ADG509ATE
DG409AK
2-11
ADG411BN
DG411DJ
1-137
ADG509~
ADG411BR
ADG411TQ
DG411DY
DG411AK
1-137
1-137
ADG528ABQ
ADG412BN
DG412DJ
1-137
ADG412BR
ADG412TQ
DG412DY
1-137
DG412AK
1-137
ADG44lBN
ADG441BQ
DG44lDJ
1-163
DG44lAK
1-163
ADGS28ATQ
ADG441BR
ADG44ITQ
DG441DY
DG441AK
1-163
1-163
ADG529ABQ
ADG442BN
DG442DJ
1-163
ADG442BQ
DG442AK
DG442DY
1-163
ADG442BR
ADG442TQ
DG442AK
1-163
ADG444BN
ADG444BQ
DG444DJ
1-171
1-171
AH0126D
DG129AP/883
1-1
ADG444BR
ADG444TQ
DG444DY
1-171
AH0126D/883
DG129AP/883
1-1
1-1
ADG445BN
ADG445BQ
DG445DJ
ADG445BR
ADG44STQ
DG445DY
ADG212AKR
ADG506ABQ
ADG506AKN
ADG506AKP
ADG506ATE
ADG506~
ADG507ABQ
ADG507AKN
ADG507AKP
ADGS07ATE
ADGS07ATQ
ADG508ABQ
ADGS08AKN
(11/15/93)
ADG508AKR
ADG508ATE
ADG508ATQ
ADG509ABQ
ADG509AKN
ADG528AKN
ADG528AKP
ADG529AKN
1-163
DG44lAK
ADG529~
2-60
DG508ADY
DG408DY
2-11
DG508AAZ/883
2-60
DG508AAK
2-60
DG408AK
2-11
DG509ABK
2-60
DG409AK
2-11
DG509ACJ
2-60
DG409DJ
2-11
DG509ADY
2-60
DG409DY
2-11
DG509AAZ/883
2-60
DG509AAK
2-60
DG409AK
2-11
DG528BK
2-70
DG428AK
2-22
DG528CJ
2-70
DG428DJ
2-22
DG528DN
2-70
DG528AK
2-70
DG428AK
2-22
DG529BK
2-70
DG429AK
2-22
DG529CJ
2-70
DG429DJ
2-22
DG529AK/883
2-70
DG429AK
2-22
1-171
AH0129D
DGl29AP/883
1-171
AH0129D/883
DGl29AP/883
1-1
DG442AK
1-171
AH0154/883
DGl29AP/883
1-1
1-171
1-171
AH0154D
DGl29AP/883
DG442AK
CDG20lAK
DG541AP
1-1
1-179
DG506ABK
2-52
CDG201BJ
DG541AP
1-179
DG406AK/883
2-1
CDG201BK
DG541AP
1-179
DGS06ACJ
2-52
CDG211CJ
DG541AP
DG441AK
DG406DJ
2-1
CDG306AK
DG541AP
1-179
1-179
DG506ADN
2-52
CDG308BJ
DG406DN
2-1
1-179
1-179
DGS06AAZ/883
2-52
CDG308BK
CDG308CJ
DG541DJ
DG541AP
DG541DJ
1-179
DG406AZ/883
2-1
DG506AAK
2-52
DG406AK/883
2-1
DG507ABK
2-52
DG407AK/883
2-1
DG507ACJ
2-52
DG407DJ
2-1
DG407DN
2-1
CDG308BJ
DG541AP
1-179
CLCllOAJP
Si581DJ
3-1
CLCllOAJE
Si581DY
3-1
CLC1l4AJP
Si584DJ
CLC114AJE
CLC410AJP
Si584DY
Si582DJ
3-16
3-16
CLC410AJE
Si582DY
DG200AAP/883
DG200AAK/883
1-32
DG200ABP
DG200ABK
1-32
3-8
3-8
DG507AAZ/883
2-52
DG200AK
DG200AAK
1-32
DG407AZ/883
2-1
2-52
DG200AAK
DG200AAK/883
1-32
DG507AAK
DG200AP
DG200AP/883
DG407AK/883
2-1
DG200BA
DG200ABA
1-32
DG508ABK
2-60
DG200BK
DG200ABK
1-32
DG408AK
2-11
DG200BP
DG200ABK
1-32
DG508ACJ
2-60
DG200CA
DG200ABA
1-32
DG408DJ
2-11
DG200CJ
DG200ACJ
1-32
1-32
5-15
..
Silicanix
Cross Reference
Industry
PaliNumber
DG201AAK
DG201AAKIHR
DG201ACJ-2
DG201ACSE
DG201ACY
DG201AK
DG201AK/883
DG201BK
DG201CJ
DG202AK
DG202BK
DG202BSE
DG202CJ
DG202CJ-2
DG202CK
DG202CSE
DG202DY
DG211CJ-2
DG211CSE
DG211CY
DG211DY
DG212CJ
DG212CSE
DG212CY
DG212DY
DG221AK
5-16
SlJiconix
PaliNumber
Appt'OXimau
Replacement
AMember of the TBMIC Group
Page
Industry
Part NlUDber
SlIlconlx
Part Number '
Approximau
Replacement
Page
DG441AK
1-163
DG221CK
DG221AK/883
1-75
DG201AAK
1-37
DG221CY
DG22IDY
1-75
DG441AK/883
1-163
DG271AK-2
DG271AK/883
1-85
DG201AAKJ883
1-37
DG271BK
DG271AK
1-85
DG44IDJ
1-163
DG271CK
DG271AK
1-85
DG201ACJ
1-37
DG281AN883
DG181AN883
1-4
DG441DY
1-163
DG281AP/883
DG18IAP/883
1-4
DG284AP/883
DG184AP/883
1-11
DG287AP/883
DG187AP/883
1-18
DG201ADY
1-37
DG44IDY
1-163
DG201ADY
1-37
DG441AK
1-163
DG201AAK
1-37
DG441AK/883
1-163
DG201AAK/883
1-37
DG441AK
1-163
DG201ABK
1-37
DG44IDJ
DG290AP/883
DG190AP/883
1-25
DG300AA
DG300AAN883
1-90
DG300AAA
DG300AAN883
1-90
DG300AAA-2
DG300AAN883
1-90
DG300AAA/HR
DG300AAN883
1-90
DG300AAK-2
DG300AAK/883
1-90
DG300AAKIHR
DG300AAK/883
1-90
DG300ACA
DG300ABA
1-90
1-163
DG300ACK
DG300ABK
1-90
DG201ACJ
1-37
DG300AK
DG300AAK
1-90
DG442AK
1-163
DG300BA
DG300ABA
1-90
DG202AK
1-37
DG300BK
DG300ABK
1-90
DG442AK
1-163
DG300CJ
DG300ACJ
1-90
DG202AK
1-37
DG300CK
DG300ABK
1-90
DG442DY
1-163
DG301AA
DG301AAA
1-90
DG212DY
1-60
DG301AAA-2
DG301AAN883
1-90
DG442DJ
1-163
DG301AAA/HR
DG301AAN883
1-90
DG202CJ
1-37
DG301AAK-2
DG301AAK!883
1-90
DG442DJ
1-163
DG30lAAKlHR
DG301AAK/883
1-90
DG202CJ
1-37
DG30lACA
DG30lABA
1-90
DG442AK
1-163
DG30lACK
DG301ABK
1-90
DG202AK
1-37
DG301AK
DG301AAK
1-90
DG442DY
1-163
DG212DY
1-60
DG301BA
DG301ABA
1-90
DG301BK
DG301ABK
1-90
DG301CJ
DG301ACJ
1-90
DG301CK
DG301ABK
1-90
DG302AAK-2
DG302AAKJ883
1-90
DG302AAK!HR
DG302AAKJ883
1-90
DG302ABK
DG302AAK
1-90
DG302ACK
DG302AAK
1-90
DG302AK
DG302AAK
1-90
DG302BK
DG302AAK
1-90
1-90
DG442DY
1-163
DG212DY
1-60
DG444DJ
1-171
DG411DJ
1-137
DG211CJ
1-60
DG444DY
1-171
DG411DY
1-137
DG211DY
1-60
DG302CJ
DG302ACJ
DG444DY
1-171
DG302CK
DG302AAK
1-90
DG41lDY
1-137
DG303AAK-2
DG303AAK/883
1-90
DG21lDY
1-60
DG303AAK!HR
DG303AAKJ883
1-90
DG444DY
1-171
DG303ACK
DG303ABK
1-90
DG4llDY
1-137
DG303AK
DG303AAK
1-90
DG44SDJ
1-171
DG303BK
DG303ABK
1-90
DG412DJ
1-137
DG303CJ
DG303ACJ
1-90
DG212CJ
1-60
DG303CK
DG303ABK
1-90
DG44SDY
1-171
DG304AAK
DG304AAK/883
1-99
DG412DY
1-137
DG304AAK-2
DG304AAK/883
1-99
DG212DY
1-60
DG304AAKIHR
DG304AAK/883
1-99
DG44SDY
1-171
DG304ACK
DG304AAK/883
1-99
DG412DY
1-137
DG304AK
DG304AAK/883
1-99
DG212DY
1-60
DG304BK
DG304AAK/883
1-99
DG44SDY
1-171
DG304CJ
DG304ACJ
1-99
DG412DY
1-137
DG304CK
DG304AAK/883
1-99
DG221AK/883
1-75
DG30SAA
DG30SAAA
1-99
DG30SAAA-2
DG30SAAA
1-99
(11/15193)
Siliconix
Cross Reference
A Member of the TeMIC Group
Industry
Pa!1Nmnber
D030SABA
SiJieonlx
Pal1NUlnbet
D030SAAA
Approximate
~pJ.«I\J.nt
Industry
Page
1-99
Part NUllJber
DGS04SAK-2
S1Iieonlx
Pal1 NUlIlbeJ'
Approximate
RepJa«/ll.nt
Page
DG40SAK/883
1-127
D030SACA
DG30SAAA
1-99
DGS04SAK/883
DG40SAK/883
1-127
DG306AAK
DG306AAK/883
1-99
DGS04SCJ
DG40S01
1-127
DG306AAK/HR
DG306AAK/883
1-99
DGS04SCK
DG40SAK
1-127
DG306ABK
DG306AAK/883
1-99
DGS06AAK/883
2-S2
DG306ACK
DG306AAK/883
1-99
DG406AK/883
2-1
DG306AK
DG306AAK/883
1-99
DG306BK
DG306AAK/883
1-99
DG306CJ
D0306ACJ
1-99
DG306CK
DG306AAK/883
1-99
DG307AAK-2
D0307AAK/883
1-99
D0307AAK/HR
DG307AAK/883
1-99
DG307ACK
DG307ABK
1-99
DG307AK
DG307AAK
1-99
DG307BK
D0307ABK
1-99
DG307CJ
DG307ACJ
1-99
DG307CK
DG307ABK
1-99
DG308AAK-2
D0308AAK/883
1-107
DG308AAK/HR
D0308AAK/883
1-107
DG308ACY
DG308ADY
1-107
D0309CK
DG309CJ
1-107
DG381CJ
DG381ACJ
1-119
DG384AAK/HR
DG384AAK/883
1-119
DG387M
D0387AAA/883
1-119
DG387AAA
DG387AAA/883
1-119
DG387AAA-2
D0387AAA/883
1-119
DG387AANHR
DG387AAA/883
1-119
DG387AAK
D0387AAK/883
1-119
DG387AAK-2
DG387AAK/883
1-119
DG387AAK/HR
DG387AAK/883
1-119
DG387ABA
DG387AAA/883
1-119
DG387ABK
DG387AAK/883
1-119
DG387ACA
DG387AAA/883
1-119
DG387ACK
D0387AAK/883
1-119
DGS06AAK-2
DGS06AAR-2
DGS06AAR/883
DGS06ACJ-2
DGS06ACN
DGS06AAK/883
2-S2
DG406AK/883
2-1
DGS06AAK/883
2-S2
DG406AK/883
2-1
DGS06ACJ
2-S2
DG40601
2-1
DGS06ADN
2-S2
DG406DN
2-1
DGS06ABK
2-S2
DG406AK/883
2-1
DGS06ADJ
DG40601
2-1
DGS06ADJ-2
DG40601
2-1
DGS06ACR
DGS01AAK-2
DGS01AAK/HR
DGS01AAR
DG501AAR-2
DG501AAR/883
DG501ACJ-2
DG501ACK
DGS01AAK/883
2-S2
DG407AK/883
2-1
DGS01AAK/883
2-S2
DG407AK/883
2-1
DGS07AAK
2-S2
DG401AK/883
2-1
DGS01AAK/883
2-S2
DG401AK/883
2-1
DGS01AAK/883
2-52
DG401AK/883
2-1
DG501ACJ
2-52
DG40101
2-1
DG501ABK
2-52
DG401AK/883
2-1
DG501ABK
2-52
D0387AK
D0387AAA/883
1-119
DG501ACR
DG401AK/883
2-1
DG387BA
D0387AAA/883
1-119
DG501ADJ
DG401DJ
2-1
D0387BK
DG387AAK/883
1-119
DG501ADJ-2
DG40101
2-1
DG387CA
DG387AAA/883
1-119
DG508AAK/883
2-60
DG408AK/883
2-11
DG5OSAAK/883
2-60
D0387CJ
DG387ACJ
1-119
D0387CK
DG387AAK/883
1-119
DG403AK/883
1-127
DG390AAK/883
1-119
D0390AAK/8S3
DG390AAK/HR
DG390AAK/883
1-119
DG401CJ
DG40lDJ
1-127
DG403CJ
DG40301
1-127
DG403CK
DG403AK
1-127
DG40SCK
DG40SDJ
DG40SAK
1-127
DGS041AK
DG401AK
1-121
DGS041AK-2
DG40lAK/883
1-121
DGS041AK/8S3
DG401AK/883
1-127
DGS041CJ
DG40lDJ
1-121
DGS041CK
DG401AK
1-121
DGS043AK
DGS043AK-2
DG403AK
1-127
DG403AK/883
1-121
DGS043AK/883
DG403AK/883
1-121
DGS043CJ
1-218
DG40SCJ
DGS043CJ
1-127
DG40301
1-121
DGS043CK
DG403AK
1-127
DGS04SAK
DG40SAK
1-121
(11/15/93)
DG508AAK-2
DG508AAK/HR
DGSOSACJ-2
DG508ACWE
DG408AK/883
2-11
DG50SACJ
2-60
DG408DJ
2-11
DGS08ADY
2-60
DG40SDY
2-11
DGS08ADJ
DG40801
2-11
DG508ADJ-2
DG40801
2-11
DG508ADY
2-60
DG508AEWE
DG509AAK-2
DG509AAK/HR
DG509ACJ-2
DG509ACWE
DG408DY
2-11
DG509AAK/883
2-60
DG409AK/883
2-11
DG409AK/883
2-11
DG509AAK/883
2-60
DGS09ACJ
2-60
DG409DJ
2-11
DGS09ADY
2-60
DG409DY
2-11
5-17
II
Siliconix
Cross Reference
lIIdliStry
.Part Number
SlIIemrlr
Part Numbel-
Approsimate
ReplaeemOllt
AMember of the TBMIC Group
l'age
DGS09ADJ
DG40901
2-11
DGS141AK
DG401AK
DGS14lAK1883
1-127 '
1-127
DGS141CJ
DG401AKJ883
D040101
DGS141CK
D0401AK
DGS143AKJ883
D0403AKJ883
DG5143AKE
lIIdIiStry
Part Number
SlIIemrlr
Part NUmber
Approsimate
Replacement
l'age
DGM187AK
D0187API883
1-18
DGM187AK/883B
D0187API883
1-18
DGMI87AK/HR
DGM187BA
D0187API883
D0187BA
1-18
1-18
1-127
DGM187BK
D0187BP
1-127
DGM187CJ
D0403AK
1-127
DGM188AA
1-127
1-18
DG387ACJ
1-119
D0188AN883
DG188AN883
1-18
1-18
DGS143CJ
1-221
DGM188AN883B
D040301
1-127
D0188AN883
1-18
DG5143CK
DG403AK
1-127 '
DGM188AAiHR
DGM188AK
D0188AP/883
DG514SAK
DG405AK
1-127
DG405AKJ883
1-127
DG188AP/883
DG188BA
1-18
1-18
DGS145AKJ883
DGMI88AK/HR
DGM188BA
DG5145CJ
DG405DJ
DGM188BK
DGM188CJ
DG188BP
DGS143CJ
1-18
1-18
DGS14SCK
DG405AK
1-127
1-127
DGS28CWN
DG428DN
2-22
DGM189AK/883B
DG189API883
1-119
1-25
DG528CJ
2-70
DG428DJ
2-22
DGM190AK
DGM190AK/883B
D0190AP/883
DG190API883
1-25
1-25
DGS2801
DG387ACJ
DGS28DK
DG528BK
2-70
DGMI90AK/l1R
D0190API883
1-25
DGS28EWN
DG529CK
D0428DN
DGS29BK
2-22
DGM190BK
DG190BP
1-25
2-70
DGM190CJ
DG40301
DGS29CWN
D0429DN
2-22
DGM191AK
D0191API883
1-127
1-25
DGS29CJ
2-70
DGM191AKJ883B
DG191API883
1-25
DG429DJ
2-22
DGM191AKJHR
1-25
DGS29DK
DGS29BK
2-70
DGMI91BK
DGI91AP/883
DG191BP
DGS29EWN
D0429DN
2-22
DGM191CJ
DG40301
1-127
DGMI81AA
D0181AN883
1-4
DGP201AAK
DG441AK
1-163
DGM181AN883B
D0181AN883
1-4
DGP201AAK/883
DG441AKJ883
DGM181AAiHR
DGM181AK
D0181AA/883
D0181AP/883
1-4
1-4
DGP201ADJ
DGP201ADY
D04410J
1-163
1-163
DGM181AK/883B
D0181AP/883
1-4
DGP303AAK
DG441DY
DG403AK
1-127
DGM181AKJHR
D0181AP/883
1-4
DGP303AAK/883
DGM181BA
DGM181BK
DG181BA
1-4
D0181BP
1-4
DGP303ADJ
DGP303ADY
1-119
DGPS08AAK
DGS2901
DGM181CJ
DG381ACJ
1-127
2-11
1-127
DG408AK
1-4
1-4
DGPS09AAK/883
DG409AKJ883
2-11
DGI82AP/883
1-4
DGP509ADJ
D0182BA
DGI82BP
1-4
2-11
2-11
1-4
1-119
DGP509ADY
Hll-0200-2
HII-0200-4
DG409DJ
D0409DY
DG200AAK
DG200ABK
1-32
1-32
D0184AP/883
1-11
HIl-0200-5
DG200ABK
1-32
D040SAK
1-127
HIl-0200-8
DG200AAK/883
1-32
DG40SAKJ883
1-127
HIl-02001883
DG200AAK/883
1-32
DG184AP/883
1-11
Hll-0201-2
DG201AAK
1-37
DG40SAK/883
1-127
Hll-0201-4
DG20lABK
1-37
D0184AP/883
1-11
DG20lACK
1-37
DG40SAK
1-127
Hll-0201-S
HII-0201-8
DG20lAAK/883
1-37
DGMI82AAIHR
DGMI82AK
DG182AN883
DGI82AP/883
DGMI82AKIHR
DGM182BA
DGM182BK
DGM182CJ
DG381ACJ
HIl-0201HS-2
D0184BP
1-11
DGM184CJ
DG405DJ
1-127
DGM18SAK
DG185AP/883
1-11
r
Hll-0201H5-4
DGM185AK/883B
DGMI85AK/HR
D018SAP/883
DG185AP/883
1-11
1-11
Hll-0201H5-5
DGM18SBK
1-11
DGM185CJ
DG185BP
DG40S01
1-127
DGM187AA
D0187AN883
1-18
DGM187AA/883B
DGM187AA,IHR
D0187AA/883
1-18
D0187AN883
1-18
5-18
DG403DY
DG408AKJ883
1-4
1-4
DGM184BK
1-127
DG40801
DG409AK
DG182AN883
DGMI84AK/HR
DG403AK/883
DG40301
DGP508AAK/883
DG182AA/883
DGMI82AN883B
DGM184AKJ883B
1-163
DGPS08ADJ
DGPS09AAK
DGMI82AA
DGM184AK
1-25
HII-020lH5-8
HIl-020lHSI883
2-11
2-11
2-11
DG201HSAK883
1-52
DG271AK
1-85
DG271AK
1-85
DG201HSAK883
1-52
DG201HSAK883
1-52
DG271AK
DG20lHSAK883
1-85
1-52
DG271AKJ883
1-85
DG271AK/883
~-8S
DG201HSAK883
1-52
(11/15193)
Silicanix
Cross Reference
AMember of the TEMIC Group
Industry
Part Number
HIl-0300-2
SlIkonlx
Part Number
DG300AAK
Approximate
Replacement
Page
1-90
HIl-0300-S
DG300ABK
1-90
HIl-0300-8
DG300AAK/883
1-90
Industry
Part Number
HI1-0S08-8
Hll-OS08/883
Silleonlx
Part Nlnllber
Approximate
Replacement
DG408AK/883
Page
2-11
D0508AAK/883
2-60
DG408AK/883
2-11
D0508AAK/883
2-60
Hll-0301-2
DG301AAK
1-90
HIl-0301-S
DG301ABK
1-90
HIl-OS08A-2
DG4S8AK/883
2-34
Hll-0301-8
DG301AAK/883
1-90
Hll-OSOSA-S
DG4S8AK/883
2-34
HIl-0302-2
DG302AAK
1-90
Hll-OS08A-8
DG4S8AK/883
2-34
HIl-0302-S
DG302AAK
1-90
HIl-0302-8
DG302AAK/883
1-90
HIl-0303-2
DG303AAK
1-90
HIl-0303-S
DG303ABK
1-90
HIl-0303-8
DG303AAK/883
1-90
HI1-0304-2
DG304AAK/883
1-99
HIl-0304-S
DG304AAK/883
1-99
HIl-0304-8
DG304AAK/883
1-99
HIl-030S-2
DG301AAK
1-90
Hll-030S-S
DG301ABK
1-90
HIl-030S-8
JM38S10/11606BCA
1-99
HIl-0306-2
DG306AAK/883
1-99
Hll-0306-S
DG306AAK/883
1-99
HI1-0306-8
DG306AAK/883
1-99
Hll-0307-2
DG307AAK
1-99
HIl-0307-S
DG307ABK
1-99
HIl-0307-8
DG307AAK/883
1-99
DG40SAK/883
1-127
DG384AAK/883
1-119
Hll-0384-8
Hll-OS09-2
HIl-OS09-4
Hll-OS09-S
Hll-0509-8
DG409AK
2-11
D0509AAK
2-60
DG409AK
2-11
DGS09ABK
2-60
DG409AK
2-11
DGS09ACK
2-60
DG409AK/883
2-11
DG509AAK/883
2-60
DG409AK/883
2-11
DGS09AAK/883
2-60
HIl-0509A-2
DG459AK/883
2-34
HI1-0509A-5
DG459AK/883
2-34
HI1-0509A-8
DG459AK/883
2-34
HIl-5041-2
DG401AK
1-127
HIl-5041-5
DG401AK
1-127
HIl-5041-8
DG401AK/883
1-127
HIl-5043-2
DG403AK
1-127
HIl-5043-5
DG403AK
1-127
HIl-S043-8
DG403AK/883
1-127
HIl-5045-2
DG40SAK
1-127
HIl-504S-S
DG40SAK
1-127
HI1-S045-8
DG40SAK/883
1-127
HI2-0200-2
DG200AAA
1-32
HI2-0200-4
DG200ABA
1-32
H12-0200-S
DG200ABA
1-32
H12-0200-8
DG200AAN883
1-32
H12-0200/883
DG200AAA/883
1-32
HI2-0300-2
DG300AAA/883
1-90
Hll-0509/883
Hll-0387-2
DG387AAK/883
1-119
Hll-0387-S
DG387AAK/883
1-119
Hll-0387-8
DG387AAK/883
1-119
DG403AK/883
1-127
DG390AAK/883
1-119
DG406AK/883
2-1
DGS06AAK
2-S2
DG406AK/883
2-1
DGS06ABK
2-S2
DG406AK/883
2-1
HI2-0300-5
DG300ABA
1-90
DGS06ACK
2-S2
HI2-0300-8
DG300AAN883
1-90
DG406AK/883
2-1
HI2-0301-2
DG30lAAA
1-90
DGS06AAK/883
2-S2
HI2-0301-S
DG301ABA
1-90
DG406AK/883
2-1
HI2-0301-8
2-S2
HI2-0304-2
DG30lAAA/883
JM38510/11605BlA
1-90
DGS06AAK/883
DG407AK/883
2-1
HI2-0304-5
JM38510/1160SBlA
1-99
DGS07AAK
2-S2
HI2-0304-8
JM38510/1160SBlA
1-99
DG407AK/883
2-1
DG30SAAA
1-99
DGS07ABK
2-S2
DG30lAAA
1-90
DG407AK/883
2-1
DGS07ABK
2-S2
DG407AK/883
2-1
DGS07AAK/883
2-S2
DG407AK/883
2-1
D0507AAK/883
2-S2
DG408AK
Hll-0390-8
HIl-OS06-2
HIl-OS06-4
HIl-OS06-S
HIl-OS06-8
Hll-OS06/883
Hll-OS07-2
Hll-OS07-4
HI1-0S07-S
HIl-OS07-8
Hll-OS07/883
HIl-OS08-2
HI1-0S08-4
HI1-0S08-S
(11115/93)
HI2-030S-2
1-99
JM38S10/1l606BlA
1-99
DG30SAAA
1-99
DG301ABA
1-90
DG301AAN883
1-90
JM38S10/11606BlA
1-99
H12-0387-2
DG387AAN883
1-119
2-11
H12-0387-8
DGS08AAK
2-60
HI3-0200-5
DG387AAN883
DG200ACJ
1-32
DG408AK
2-11
HI3-0201-S
DG20lAC1
1-37
DGS08ABK
2-60
HI3-020lHS-4
DG20lHSDJ
1-52
DG408AK
2-11
D0508ACK
2-60
HI2-0305-2
HI2-0305-5
HI2-0305-8
HI3-0201HS-S
1-119
DG20lHSDJ
1-52
DG271C1
1-85
5-19
•
Siliconix
Cross Reference
Jnd'll8try
PaJtNumb...
SlIkonlx
Approximate
Part NllDlber
Replacement
AMember of the TBMIC Group
lbd'll8try
Page
Part NIIDIh...
smeonlx
Part NllDlber
Approximate
Replacement
Page
HI3-0300-5
DG300ACJ
1-90
IH182MJD
DG182AP
1-4
HJ3-0301-5
HJ3-0302-5
DG301ACJ
1-90
IH182MIW
DG182AA
1-4
1-90
1-90
IH184CJE
IH184MJE
DG184BP
DG184AP
1-11
HJ3-0303-5
DG302ACJ
DG303ACJ
HJ3-0304-5
DG304ACJ
1-99
IH185CJE
DG185BP
1-11
HJ3-0305-5
DG301ACJ
1-90
IH18SMJE
DG185AP/883
HJ3-0306-5
DG306ACJ
1-99
IH187CIW
DG187BA
1-11
1-18
HJ3-0307-5
DG307ACJ
1-99
IH187MJD
DG187AP
1-18
HJ3-0381-5
HJ3-0387-5
DG381ACJ
DG387ACJ
1-119
1-119
IH187MIW
IH188CJD
DG187AA
DG187BP
1-18
HJ3-0390-5
DG403DJ
1-127
IH188CIW
DG188BA
1-18
1-18
DG188AP/883
1-18
1-11
DG406DJ
2-1
DG506ACJ
2-52
IH188MJD
IH188MIW
DG188AA
1-18
DG407DJ
2-1
IH190CJE
DG190BP
1-25
DG507ACJ
2-52
1-25
2-11
DG508ACJ
2-60
IH190MJE
IH191CJE
IH5041CJE
DG190AP
DG408DJ
DG191BP
DG40lDJ
1-25
1-127
HI3-0508A-4
DG458DJ
2-34
IH5041CPE
DG40lDJ
1-127
HJ3-0508A-5
DG458DJ
2-34
IH5041MJE
DG401AK
1-127
DG409DJ
2-11
IH5041MJE/883B
DG401AK/883
1-127
DG509ACJ
2-60
IH5041MJE/HR
DG401AK/883
1-127
HJ3-0509A-4
DG459DJ
IH5043CJE
HJ3-0509A-5
DG459DJ
2-34
2-34
DG403AK
DG5043CJ
1-127
1-218
HI3-5041-5
DG401DJ
1-127
HJ3-0506-5
HI3-0507-5
HJ3-0508-5
HI3-0509-5
DG5043CJ
1-218
DG403DJ
1-127
HJ3-5045-5
DG405DJ
1-127
HI4-020l/883
DG201AAZ;883
1-37
HI3-5043-5
HI4-020lHS/883
DG201HSAZ883
1-52
DG271AZ!883
1-85
IH5043CPE
IH5043CY
DG403DY
1-127
IH5043MJE
DG403AK
1-127
IH5043MJE/883B
DG403AK/883
1-127
IH5045CJE
DG405AK
1-127
IH5045CPE
DG405DJ
DG405AK
1-127
DG405AK/883
1-127
1-127
IH504SMJE/HR
DG405AK/883
1-127
IH5108CJE
DG458AK/883
2-34
IH5108CPE
DG458DJ
2-34
IH51081IE
DG458AK/883
2-34
DG458AK/883
DG458AK/883
2-34
2-34
IH504SMJE
IH5045MJE/883B
DG406AZ!883
2-1
DG506AAZ;883
2-52
DG407AZ!883
2-1
DG507AAZ/883
2-52
DG408AZ/883
2-11
IH5108MJE
IH5108MJE/883B
DG508AAZ;883
2-60
IH5141CJE
DG401AK
DG458AZ/883
2-34
IH5141CPE
DG40lDJ
1-127
1-127
DG409AZ!883
2-11
IH5141MJE
DG401AK
1-127
DG509AAZ;883
2-60
IH5141MJE/883B
DG401AK/883
HI4-0509A/883
HI4P0506-5
DG459AZ!883
DG506ADN
2-34
IH5142MTE
DG403AK
IH5142MJE/883B
DG403AK/883
HI9P0201-5
DG201ADY
1-37
IH5143CJE
DG403AK
HI9P0201-9
DG201ADY
1-37
IH5143CPE
DG403DJ
1-127
DG20lHSDY
1-52
IH5143MJE
DG403AK
1-127
1-85
IH5143MJE/883B
DG403AK/883
1-52
HJ4-0506/883
HI4-0507/883
HJ4-0508/883
HI4-0508A/883
HI4-0509/883
HI9P0201HS-5
DG271DY
DG20lHSDY
1-127
1-127
1-127
1-127
1-127
DG405AK
1-127
DG405AK/883
1-127
1-127
1-85
IH5144MJE
IH5144MJE/883B
HJ9P0508-5
HI9P0508-9
DG508ADY
2-60
IH5145CJE
DG405AK
DG508ADY
2-60
1-127
DG509ADY
2-60
IH5145CPE
IH514SMJE
DG405DJ
HI9P0509-5
DG405AK
1-127
HJ9P0509-9
DG509ADY
2-60
1-127
Si7660DY
Si7660CJ
4-1
IH514SMJE/883B
IH5208CJE
DG405AK/883
ICL7660CBA
HI9P020lHS-9
DG271DY
ICL7662CPA
IH181CJD
Si7661CJ
4-1
4-7
IH52081IE
DG459AK/883
2-34
2-34
2-34
DG181BP
1-4
IH5208MJE
DG459AK/883
2-34
IH181CIW
1-4
IH5208MJE/883B
DG459AK/883
2-34
IH18lM'IW
DG181BA
DG181AA
IH182CJD
DG182BP
1-4
IH182CIW
DG182BA
1-4
ICL7660CPA
5-20
1-4
IH5208CPE
DG459AK/883
DG459DJ
IH6108CJE
DG408AK
2-11
DGS08ACK
2-60
(11/15/93)
Siliconix
Cross Reference
AMember Qfthc TBMIC Group
Industry
PaI'tNumber
IH6108CPE
IH6108MJE
SiIieonix
Part Number
Approximate
Replacement
Page
1-127
MAX303ESE
DG403DY
1-127
MAX303EJE
DG403AK
1-127
MAX303MLP
DG403AZ/883
1-127
1-127
DG508ACJ
2-60
DG408AK
2-11
DGS08AAK
2-60
IH6116MJI/883B
siIieonix
Part Number
DG403DJ
MAX303EPE
IH6116MJI
IH6208MJE
Industry
Part Number
2-11
IH6116CPI
IH6208CPE
Page
DG408DJ
IH6116CJI
IH6208CJE
Approximate
Replacement
DG406AK
2-1
MAX303MJE
DG403AK
DGS06AAK
2-52
MAX30SCPE
DG40SDJ
1-127
DG406DJ
2-1
MAX30SCSE
DG405DY
1-127
DG506ACJ
2-52
MAX30SEPE
DG40SDJ
1-127
DG406AK
2-1
MAX30SESE
DG405DY
1-127
DG506AAK
2-52
MAX30SEJE
DG40SAK
1-127
DG406AK/883
2-1
MAX30SMLP
DG405AZ/883
1-127
DG506AAKJ883
2-52
MAX30SMJE
DG40SAK
1-127
MAX306CJ
DG406DJ
2-1
MAX306DJ
DG406DJ
2-1
MAX306DN
DG406DN
2-1
MAX306DK
DG406AK
2-1
MAX306AK
DG406AK
2-1
MAX307CJ
DG407DJ
2-1
DG409AK
2-11
DG509ACK
2-60
DG409DJ
2-11
DG509ACJ
2-60
DG409AK
2-11
DG509AAK
2-60
MAX307DJ
DG407DJ
DG409AK/883
2-11
MAX307DN
DG407DN
2-60
MAX307DK
DG407AK
DG407AK
2-1
MAX307AK
DG407AK
DG507AAK
2-52
MAX308EPE
DG408DJ
2-1
2-1
2-1
2-1
2-11
DG407DJ
2-1
MAX308ESE
DG408DY
2-11
DG507ACJ
2-52
MAX308EJE
DG408AK
2-11
DG407AK
2-1
MAX308MJE
DG408AK
2-11
DG507AAK
2-52
MAX309EPE
DG409DJ
2-11
DG407AK/883
2-1
MAX309ESE
DG409DY
2-11
DGS07AAKJ883
2-52
MAX309EJE
DG409AK
2-11
JM38S10/11601BCA
1-90
MAX309MJE
DG409AK
2-11
JM38510/11602BCC
JM38S10/11602BCA
1-90
MAX317CPA
DG417DJ
1-146
JM38S10/11603BCC
JM38SlO/11603BCA
1-90
MAX317CSA
DG417DY
1-146
JM38S10/11604BCC
JM38S10/11604BCA
1-90
MAX317EPA
DG417DJ
1-146
JM38S10/1160SBCC
JM38S10/1160SBCA
1-99
MAX317ESA
DG417DY
1-146
JM38510/11606BCC
JM38510/11606BCA
1-99
MAX317EJA
DG417AK
1-146
JM38S10/11607BCC
JM38S10/11607BCA
1-99
MAX317MJA
DG417AK
1-146
JM38S10/11608BCC
JM38510/11608BCA
1-99
MAX318CPA
DG418DJ
1-146
JM38S10/1230lBCC
JM38S10/12301BCA
1-32
MAX318CSA
DG418DY
1-146
JM38S10/12302BEC
JM38S10/12302BEA
1-37
MAX318EPA
DG418DJ
1-146
1-146
IH6208MJE/883B
DG509AAKJ883
IH6216CJI
IH6216CPI
IH6216MJI
IH6216MJI/883B
JM38510/1160lBCC
LF11201AD
DG411AK
1-137
MAX318ESA
DG418DY
LF11201N
DG411DJ
1-137
MAX318EJA
DG418AK
1-146
LF11202D
DG412AK
1-137
MAX318MJA
DG418AK
1-146
LF1220lD
DG411AK
1-137
MAX319CPA
DG419DJ
1-146
LF12202D
DG412AK
1-137
MAX319CSA
DG419DY
1-146
LF12202N
DG412DJ
1-137
MAX319EPA
DG419DJ
1-146
LF1320lD
DG411AK
1-137
MAX319ESA
DG419DY
1-146
LF13201N
DG411DJ
1-137
MAX319EJA
DG419AK
1-146
LF13202D
DG412AK
1-137
MAX319MJA
DG419AK
1-146
LF13202N
DG412DJ
1-137
MAX331MJE
DG441AK
1-163
LTC1044CJ8
Si7660CJ
4-1
MAX332MJE
DG442AK
1-163
MAX301CPE
DG40lDJ
1-127
MAX3S1CPE
DG411DJ
1-137
MAX301CSE
DG40lDY
1-127
MAX3S1CSE
DG411DY
1-137
MAX30lEPE
DG401DJ
1-127
MAX3SlEPE
DG411DJ
1-137
MAX301ESE
DG401DY
1-127
MAX3S1ESE
DG411DY
1-137
MAX301EJE
DG401AK
1-127
MAX351EJE
DG411AK
1-137
MAX301MLP
DG401AZ/883
1-127
MAX3S1MJE
DG411AK
1-137
MAX30lMJE
DG401AK
1-127
MAX3S2CPE
DG412DJ
1-137
MAX303CPE
DG403DJ
1-127
MAX3S2CSE
DG412DY
1-137
MAX303CSE
DG403DY
1-127
MAX352EPE
DG412DJ
1-137
MAX352ESE
DG412DY
1-137
(11/15/93)
5-21
II
Siliconix
Cross Reference
Incllislry
PartN....er
MAX3S2EJE
Sl&mtiJr
PartN_bel-
Approximate
Bepl&eelllent
DG412AK
AMcmber oftbc TBMIC Group
Page
Incllislry
PartNumher
SlIleonlx
PartN_be~
1-137
MP303DJBP
DG303AAK
Approximate
Beplaeement
Page
1-90
MAX352MJE
DG412AK
1-137
MP303DJCJ
DG303ACJ
1-90
MAX3S3CPE
DG413DJ
1-137
MP7S06JD
DG506ACK
2-52
MAX3S3CSE
DG413DY
1-137
MP7506JN
DG506ACJ
2-52
MAX3S3EPE
DG413DJ
1-137
MP7506KD
DGS06ACK
2-52
MAX3S3ESE
DG413DY
1-137
MP7506KN
DGS06ACJ
2-52
MAX353EJE
DG413AK
1-137
MP7506SD
DG506AAK
2-52
MAX3S3MJE
DG413AK
1-137
MP7506ID
DGS06AAK
2-52
MAX358CJE
MAX3S8CPE
DG4S8AK/883
DG4S8DJ
2-34
MP7507JD
DG507AAK
2-52
2-34
MP7507JN
DGS07ACJ
2-52
MAX3S8CPE-2
DG458DJ
2-34
MP7507KD
DG507AAK
2-52
MAX3S8EJE
DG4S8AK/883
2-34
MP7507KN
DG507ACJ
2-S2
MAX3S8EPE
DG4S8DJ
2-34
MP7507SD
DGS07AAK
2-S2
MAX3S8MJE
DG4S8AK/883
2-34
MP7507ID
DGS07AAK
MAX3S8MJEJ883
DG4S8AK/883
2-34
MP7508KD
DGS08ABK
2-60
2-S2
MAX3S8MJEJHR
DG458AK/883
2-34
MP7S08KN
DGS08ACJ
MAX358MLP
DG458AZ/883
2-34
MP7S08SD
DGS08AAK
2-60
2-60
MAX359CJE
DG459AK/883
2-34
MP7S09KD
DG509ABK
2-60
MAX359CPE
DG459DJ
2-34
MP7S09KN
DG509ACJ
2-60
MAX359CPE-2
DG459DJ
2-34
MP7S09SD
DGS09AAK
2-60
MAX359EJE
DG459AK/883
2-34
MUX08BQ
DG408AK
2-11
MAX359EPE
DG459DJ
2-34
MUX08FP
DG408DJ
2-11
MAX359JJE
DG459AK/883
2-34
MUX08FQ
DG408AK
2-11
MAX359MJE
DG459AK/883
2-34
MUX16BT
DGS06AAK
2-52
MAX359MJEj883
DG459AK/883
2-34
MUX16Ff
DGS06ABK
2-S2
MAX359MJEJHR
DG459AK/883
2-34
MUX24BQ
DG409AK
2-11
MAX359MLP
DG459AZ/883
2-34
MUX24FP
DG409DJ
2-11
MAX361CPE
1-163
MUX24FQ
DG409AK
2-11
MAX361CSE
DG44lDJ
DG441DY
1-163
MUX28BT
DG507AAK
2-52
MAX361EPE
DG44lDJ
1-163
MUX28Ff
DGS07ABK
2-S2
MAX361ESE
DG441DY
1-163
Sl7661CA
Si7661CJ
4-7
MAX36lEJE
DG441AK
1-163
SWOIBQ
DGZOlAAK
1-37
MAX36lMJE
DG441AK
1-163
SW01BQ883
DG20lAAK/883
1-37
MAX362CPE
DG442DJ
1-163
SWOlFQ
DG20lABK
1-37
MAX362CSE
DG442DY
1-163
SW02BQ
DG202AK
1-37
MAX362EPE
DG442DJ
1-163
SW02BQ883
DG202AK/883
1-37
MAX362ESE
DG442DY
1-163
SW02FQ
DG202AK
1-37
MAX362EJE
DG442AK
1-163
SW05BK
DG200AAA
1-32
MAX362MJE
DG442AK
1-163
SW05BK883
DG200AAA/883
1-32
MAX364CPE
DG444DJ
1-171
SW05BY
DG200AAK
1-32
MAX364CSE
DG444DY
1-171
SW05BY883
DG200AAK/883
1-32
MAX364EPE
DG444DJ
1-171
SWOSPK
DGZOOABA
1-32
MAX364ESE
DG444DY
1-171
SWOSFY
DGZOOABK
1-32
MAX365CPE
DG445DJ
1-171
SW05GP
DG202CJ
1-37
MAX365CSE
DG445DY
1-171
SW201BQ
DG411AK
1-137
MAX365EPE
DG445DJ
1-171
SW20IBQ883
DG411AK/883
1-137
MAX36SESE
DG445DY
1-171
SWZOlFQ
DG411AK
1-137
MP200DIAA
DGZOOAAA
1-32
SWZOlGP
DG411DJ
1-137
MP200DIAP
DG200AAK
1-32
SW202BQ
DG412AK
1-137
MP200DIBA
DG200ABA
1-32
SW202BQ883
DG412AK/883
1-137
MP200DICJ
DG200ACJ
1-32
SW202FQ
DG412AK
1-137
MP200DIPB
DG200ABK
1-32
SW202GP
DG412DJ
1-137
MP20lDJBP
DG411AK
1-137
TSC7660c0A
Si7660DY
4-1
MP201DICJ
DG411DJ
1-137
TSC7660CPA
Si7660CJ
4-1
DG411AK
1-137
MP20ADlAP
MP302DlAP
DG30ZAAK
1-90
MP302DIBP
DG30ZAAK
1-90
MP302DICJ
DG30ZACJ
1-90
MP303DIAP
DG303AAK
1-90
5-22
This Cross Reference material is accurate to the best knowledge and
belief of Siliconix. Since individual circuit design and layout can
influence device performance, the purchaser must be responsible for
the u1tinlate selection and determination of interchangeability_
(11/15/93)
General Information
Analog Switches
Analog Multiplexers
WidebandNideo Amplifiers
Voltage Converters
Appendix
Worldwide Sales Offices and Distributors
a
Silicanix
AMcmbcroftbe TBMIC Group
u.s. Sales Offices
EASTERN
Huntsville, AI. (35824)
'lEMIC
125 Eectronics Boulevard, Ste. C·l
'IEL: (205) 461-7894n895
FAX: (205)461-7928
"!toy, MI (48084)
'lEMIC
'!toy'1Cchnica1 Center
Continental FI81a
27011l'oy Center Drive, Ste. 100
'IEL: (810) 244-1400
FAX: (810) 244-0848
Nashua, NH (03062)
'lEMIC
Hoffman Esta.." IL (60195)
'lEMIC
1030 W.
Road, Sfe. 101
'IEL: (708) 490-0374
FAX; (708) 490-1499
20 Heatber Court
'IEL: (603) 886-9603
FAX; (603) 886-9603
Annapoils,MD (21403)
'lEMIC
1419 Forest Drive, Ste. 103
'IEL: (410)269-1898
FAX; (410) 974-8170
Annandale, NJ (08801)
'lEMIC
1322 Route 31 North
'IEL: (908) 735-6100
FAX; (908) 735-2258
Hi_,
Ossining, NY (10562)
'lEMIC
74 Revolutionary Road
'IEL: (914) 945-0618
FAX; (914) 945-0769
While Plain" NY (10605)
'I1!MIC
12Ro1andDrlvc
TIlL: (914) 997-1265
FAX; (914) 997-1277
WESTERN
Santa Clara, CA(95OS6)
'I1!MIC c/o SiIiconixhlc.
2201 Laurelwood Road
P.O. Box 54951
TIlL: (408) 970-5700
FAX: (408) 970-3950
Irvin" CA(92619-1084)
'I1!MIC
P.O_ _ 51084
TIlL:
FAX:
(714) 552-4080
(714) 552-4181
Ashevill., NC (28801)
'lEMIC
46 Haywood. Street, Ste. 337
'IEL: (704) 252-9827
FAX; (704) 252-5083
Houston (77027)
'I1!MIC
2100 West Loop Southt Stc. 800
TIlL: (713) 297-8871
FAX: (713) 297-8872
u.S. Sales Representatives
ALABAMA
CONNECTICUT
ILLINOIS
MASSACIlUSETTS
HuntMll. (35803)
Rep. Inc.
llS3S Gilleland Road
TIlL: (20S) 881-9270
FAX; (205) 882-6692
Wallingford (06492)
'Jechnology Sales, Inc.
237 Hall Avenue
TIlL- (203) 269-8853
FAX; (203) 269-2099
HoffmanEstates (60195)
V!c:tory Sales
1030 W. Higgins Road, 510.101
'IEL: (708) 490-0300
FAX; (708) 490-1499
Waltham (02154)
'l!clmology Sales, Inc.
ALASKA
DELAWARE
INDIANA
See Washington
See New Jersey (Soutbem)
ARIZONA
1I>mpc (85283)
Quadrcp Southern
40 W. Baselirlo Road, Sto. 112
TIlL: (602) 839-2102
FAX: (602) 839-2126
DISTRICT OF COLUMBIA
See Maryl8.D.d
MICHIGAN
Indianapolis (46250)
V!c:tory Sales
8041 Knuc Road
TIlL: (317) 577-4786
FAX: (317)577-4789
CALIFORNIA (Northern)
San Jose (95134)
Quadrcp, Inc.
2635 N. Frrst Street, Ste. 116
'IEL: (408) 432-3300
FAX; (408) 432-3428
(612)9~904
IOWA
FAX;
Cedar Rapids (52402)
Stan Clothier Company
1930 Strcet AndrcwsNE
'IEL: (319) 393-1576
FAX; (319)393-7317
MISSISSIPPI
400 Fairway Drive Sto. 107
'IEL: (305) 426-8944
(305) 570-8568
Largo (34643)
Irvine (92718)
Quadrep Southern, Inc.
15215 Alton Parkway, Ste. 200
TIlL: (714) 727-4222
FAX: (714) 727-4033
Stan Clothier
9600 W. 76th Street, Stc. A
Deerfield Beach (33441)
Sec 10xas (Arlington)
San Diego (92130)
Quadrcp Southern, Inc.
11995 El Camino Boa!, Sm_ 305
TIlL: (619) 755-1188
FAX: (619) 793-9269
PdenPrairie (55344)
FLORIDA
FAX:
CALIFORNIA (Southern)
Sec 1EMIC Sales Offices, "!toy, MI
MINNESOTA
'IEL: (612) 944-3456
MEC
ARKANSAS
332 Second Avenue
TIlL: (617) 890-5700
(617)890-3913
FAX:
MEC
10637 Harborside Drive North
'IEL: (813) 393-5011
FAX; (813) 393-5202
WIll..r Park (32789)
MEC
1305 Raintrec 1'1800
TIlL: (407) 740-0023
FAX: (407) 740-0083
GEORGIA
"IIIckor(30084)
&p,Inc.
1944 NorthiakoParkway
TIlL: (404) 938-4358
FAX; (404) 938-0194
HAWAII
KANSAS
Len... (66215)
Stan Clotbler Co.
13000 W. 87th Street Parkway, Ste. lOS
'IEL: (913) 492-2124
FAX: (913) 492-1855
KENTUCKY
SeoIndlana
See Alabama
MISSOURI
Saint Charles (63303)
Stan Clothier Company
3910 Old. Highway 94, South, Ste. 116
'IEL: (314) 928-8078
FAX; (314) 447-5214
MONTANA
See Washington
NEBRASKA
SccMWouri
NEVADA (Except Clark County)
LOUISIANA
See Califronia (Northern)
SccArUngtoD., 'l8xas
NEVADA (Clark County)
MAINE
ScoArizona
NEW IIAMPSHIRE
Sec Califorala (Northern)
Sec Massachusetts
COWRADO
IDAHO
MARYLAND
NEW JERSEY
Littleton (80122)
Quadrcp, Inc.
7891 S_ Garfield Way
'IEL: (303) 771-6886
FAX; (303) 771-6887
Boi.. (83702)
Thwson (21204)
ArbotckAssoaates, Inc.
100W_JoppaRoad
TIlL: (410) 825-0775
FAX; (410)337-2781
NEW MEXICO
Q.R-CrOWD
1524 w.Hays
TIlL: (208) 344-9588
FAX; (208) 344-9550
•
Sec Massachusetts
Sec New York (Metro/LL)
SceArizona
6-1
Siliconix
AMombor oltho TBMIC Group
u.s. Sales Representatives (Cont'd)
NEWYORK (Upstate)
OREGON
SOUTH DAKOTA
UTAH
Fairport (14450)
'lbcImoiogy Sale~ Inc
920 PeriDtonHills Office Park
TEL: (716) 223·7500
FAX: (716) 223·5526
Portland (97224)
OR. Crown, Inc.
17020 Sw. Upper BoonesFerryRoad,
S... 202
'IE[.: (503) 620-8320
FAX: (503) 639-4023
See Minnesota
,See. ColOrado
NEWYORK (Metro/L.I.)
Babylon (11702)
Al:trorcp Incorporated
103 Cooper Street
TEL: (516) 422-2500
FAX: (516) 422-2504
PENNSYLVANIA (Western)
NORTH CAROLINA
Sec New York (Mctro/LL)
Morrisville (27560)
See IndIana
PUERTO RICO
'IE[.:
San German (00683-0121)
-:mclmology Sales. Inc.
PO Box 122, Edificio RaIi, S1o. 216
'IE[.: (809) 892-4745
FAX: (809) 892-1128
2500 Ga-.y Ccntre Blvd., S... 400
(919) 469·9997
(919) 481·3879
NORTH DAKOTA
See Minnesota
OIDO
SceIndiana
Jefferson City (37760)
RHODE ISLAND
Sec Massachusens
OKLAHOMA
SOUTH CAROLINA
Sec 'II>lIas (ArUngtnn)
Sec Unnessee
See Massac:husetts
Rep. Inc.
VIRGINIA
P.O.Box490
1908 Branner Avenue
(615) 475·9011J9013
FAX: (615) 475-6340
'
WASHINGTON
TEXAS
BeUevue (98005)
O.R. Crown. Inc.
'J75 118thAve., 8.£,810.110
'IE[.:
PENNSYLVANIA (Eastern)
Rep. Inc.
FAX:
VERMONT
TENNESSEE
Sec Maryland
'IE[.:
(206) 453·5100
(206) 646-8775
ArUngton (76006)
Ion Associates, Inc.
2221 E. Lamar, 810. 250
'IE[.: (817) 695-8000
FAX: (817) 695-8010
FAX:
Austin (787S9)
WISCONSIN
Ion Associates, Inc.
4412 Splocwood SprinpRoad, S... 202
(512) 794·9006
FAX: (512) 794-9008
'IE[.:
WEST VIRGINIA
SecMlIlJ'Iand
Brookfield (53005)
VictcnySalos
405 N. Calhoun Road, Sto. 208
(414) 789-5770
FAX: (414) 789-5760
'IE[.:
Houston (77014)
Ion Associates, Inc.
14347-A 'Ibney Ch... Blvd.
'IE[.: (713) 537-7717
FAX: (713) 537·5612
WYOMING
Sec Colorado
Canadian Sales Representatives
Brompton, Ontario (L6T lK2)
Eectronics Sales Professionals (ESP) Inc.
27 Anno Court
'IE[.: (416) 458-1103
FAX: (416) 458-4469
British Columbia
See Washington
Montreal, Quebec (H2B lZ2)
North Gower, Ontario (K0A2111)
Scarborough, Ontario (MIV 31'6)
Electronics Sale, Professionals (ESP) Inc.
Ecctronics Sales Professionals (ESP) Inc.
5936'IblrdUneRoad NorthRR #3
'IE[.: (613) 489-3379
FAX: (613) 489-2778
Electronics Sales Professionals (ESP) Inc.
2102 Place Bloane-Brule
'IE[.:
FAX:
Chip Distributor
FLORIDA
Orlando (32810)
Chip Supply, Inc.
7725 N. Orange Blossom ')tail
(407)298-7100
'lWX: (810) SSO-Ol03
FAX: (407) 290-0164
'IE[.:
6-2
(514)388-6596
(514) 388-8402
60 Wildemcss Drive
'IE[.:
FAX:
(416) 321·9693
(416) 321·9794
Silicanix
AMembcr ofthe TEMfC Group
U. S. Distributors
ALABAMA
Huntsville (35816)
Future Electronics Corp.
4825 University Square, Ste, 12
TEL: (205) 830·2322
FAX: (205) 830·6664
Huntsville (35801)
Marshall Industries
3313 Memorial Parkway Soutb, Ste. 150
TEL: (205) 881·9235
FAX: (20S) 881·1490
Huntsville (35816)
Pioneer 1£cb.
4835 University Square, Ste, 5
TEL:
FAX:
(205) 837·9300
(205) 837·9358
ARIZONA
Phoenix (85034)
Future Electronics Corp.
4636E University Drive, Ste. 245
TEL: (602) 968·7140
FAX: (602) 968·0334
Phoenix (85044)
Marsballlndustries
9830 S. 51st Street, Ste.Bt21
TEL: (602) 496·0290
FAX: (602) 893·9029
Pboenix(85040)
Wyle Laboratories-EMG
4141 E Raymond Street, Ste. 1
TEL' (602) 437·2088
FAX: (602) 437·2124
Thmpc (85281)
Bell Industries
140 S. Lindon Lane #102
TEL: (602) 966·3600
(800) 525·6666
FAX: (602) 967·6584
Thmpc (85281)
HanllltonIHallmark
1626 S. Edward Drive
(800) 332·8638
FAX: (800) 257·0568
CALIFORNIA
Agoura Hills (91301)
Bell Industries
30101 Agoura Court, Ste. 118
TEL: (818) 865·7900
(800) 525·6666
FAl(, (818) 991·7695
Agoura Hills (91301)
Pioneer Std.
5126 Clareton Dnve, Ste.160
TEL: (818) 865·5800
FAX: (818) 865·5814
Calabasas (91302-1959)
Marshall Industries
El Moote (91731)
Marshall Corporate
9320 1elstar Avenue
TEL: (818) 307·6000
FAX: (818)307·6297
San Diego (92123)
Hamllton/Hallmark - #02
4545 Viewridge Avenue
TEL: (619) 571·7540
FAX: (619) 277·6136
Thornton (80241)
Wyle Distribution Group
451 E. 124th Avenue
TEL: (303) 457·9953
FAX: (303) 457·4831
Irvine (92718)
Bell Industries
220 1echnology Drive, Ste. 100
TEL: (714) 727-4500
(800) 525·6666
FAX: (714) 453-4610
San Diego (92123)
Marshall Industries
5961 Kearny Villa Road
TEL: (619) 627-4140
FAX: (619) 627-4163
CONNECTICUT
Irvin. (92714)
Future Electronics Corp.
1692 Browning Ave.
TEL: (714)250-4141
FAX: (714) 250·4185
Irvine (92718)
Marshall Industnes
1 Morgan
TEL: (714) 859·5050
FAX: (714) 581·5255
Irvine (92718)
Pioneer Std.
2171CchnologyDrive,Ste.l10
TEL: (714) 753·5090
FAl(, (714) 753·5074
Irvine (92714)
Wyle Laboratories·EMG
17872 Cowan Avenue
TEL: (714) 863·9953
1WX: (910) 595·1572
FAX: (714) 863·0473
Los Angeles (90049)
Bell Industries
11812 San Vmcente Blvd., Ste. 300
TEL: (310) 826-2355
(800) 525·6666
FAX: (310) 826·1534
Milpitas (95035)
Marshall Industries
336 Los Caches Street
TEL: (408) 942-4600
FAX: (408) 262·1224
Rancho Cordova (95670)
Marshall Industries
3039 Kilgore Ave. Ste.140
TEL: (916) 635·9700
FAX: (916) 635·6044
Rancho Cordova (95742)
Wyle Distribution Group
Sacramento Division
2951 Sunrise Blvd., Ste. 175
TEL: (916) 638·5282
FAX: (916) 638·1491
Reseda (91335)
JANDevices
6925 Canby,Bldg.l09
TEL: (818) 708·1100
FAX: (818)708·7436
26637 Agoura Road
TEL:
FAX:
(818) 878·7000
(818) 880·6846
Calabasas (91302)
Wylc Laboratories
26010 MureauRoad, Ste. 150
TEL' (818) 880·9000
FAX: (818) 8BO·551O
Chatsworth (91311)
Future Electronics Corp.
9301 Oakdale Ave., Ste. 210
TEL: (818) 772·6240
FAX: (818) 772·6247
San Diego (92123)
Wyle Laboratories-EMG
9525 Chesapeake Drive
TEL: (619) 565·9171
FAX: (619) 565·6512
San Jose (95131)
Hamilton/Hallmark - #03
2105 Lundy Avenue
TEL: (408) 435·3500
FAl(, (408) 435·3720
San Jose (95131-1326)
Future Electronics Corp.
2220 O"Thole Avenue
TEL: (408)434·1122
FAX: (408) 433-0822
San Jose (95134)
Pioneer1ech.
134 Rio Robles
TEL: (408) 954·9100
FAX: (408) 954·9113
San Jose (95119)
Zeus Electronics
6276 San Ignacio Ave., Ste. E
TEL: (408) 629-4789
FAX: (408) 629-4792
Santa Clara (95052)
Wyle Distribution Group
3000 Bowers Avenue
TEL: (408) 727-2500
1WX: (910)379-6480
FAX: (408) 727-5896
Sunnyvale (94089)
Bell Industries
1161 No. Fairoaks Avenue
TEL: (408) 734·8570
(800) 525·6666
FAX: (408) 734·8875
Cheshire (06410)
Future Electronics Corp.
Westgate Office Center
700 West Johnson Ave.
TEL: (203) 250·0083
FAX: (203) 250·0081
Cheshire (06410)
Hamilton/Hallmark - #21
125 Commerce Court, Unit 6
'IEL: (203) 797·2800
FAl(, (203) 272·1704
Shelton (06484)
Pioneer Std.
2 'Rap Falls Road
TEL: (203) 929·5600
FAX: (203) 929·9791
Meriden (06413)
Bell Industries
1064 E. Main Street
TEL: (203) 639·6000
(800) 525-6666
FAX: (203) 639·6005
Wallingford (06492)
Marshall Industries
20 Sterling Drive
Barnes Industrial. Park
TEL: (203) 265·3822
FAl(, (203) 284·9285
FLORIDA
Altamonte Springs (32701)
Bell Industries
650 S. North Lake Blvd., Ste. 400
TEL: (407) 339·0078
(800) 525·6666
FAX: (407)339·0139
Altamonte Sprinp: (32701)
Future Eectronics Corp.
650 S. Northlake Blvd.
TEL: (407) 767-8414
FAX: (407)834.9318
Woodland Hill, (91367)
Hamilton IAwet - #48
21150 Califa Street
TEL: (818) 594-0404
FAl(, (818) 594·8234
Altamonte Springs (32701)
Marshall Industries
380 S.Northlake Blvd., Ste. 1024
TEL: (407)767-8585
FAX: (407) 767·8676
Yorba Unda (92686)
Zeus Electronics
22700 Savi Ranch Pkwy.
TEL: (714) 921·9000
FAX: (714) 921·2715
Altamonte Springs (32701)
Pioneer 1Cch.
337 South Northlake Blvd. #1000
TEL: (407) 834·9090
FAX: (407) 834·0865
COLORADO
Rocklin (95677)
Bell Industries
4311 Anthony Ct , Ste. 100
TEL: (916) 652-0418
(800) 525·6666
FAl(, (916) 652-0403
Lakewood (80215)
Future Electronics Corp.
12600 W. Colfax Avenue, Ste. BUD
TEL: (303) 232·2008
(800) 950-3532
FAX: (303) 232·2009
Rocklin (95765)
Hamilton/Hallmark - #35
580 Menlo Drive, Ste. 2
TEL: (916) 624-9781
FAX: (916) 961·0922
Denver (80222)
Bell Industries
1873 S. Bellaire Street, Ste.l00
TEL: (303) 691·9270
(BOO) 525·6666
FAX: (303) 691·9036
Deerfield Beach (33442)
Pioneer'Jech.
674 S. Mllitary'Rail
TEL: (305) 428-8877
FAl(, (305) 481·2950
Fort Lauderdale (33309)
Hamiltoo/Hallmark, - #17
3350 N.W. 53rd Street, Ste. 105
TEL: (305) 484-5016
FAX: (305) 484-4740
Fort Lauderdale (33309)
Marshall Industries
2700 W. Cypress Creek Road, Ste. D114
TEL: (305) 977·4880
FAl(, (305) 977-4887
Costa Mesa (92626)
Hamilton!Hallmark - #29
3170 Pullman Street
TEL: (714) 641-4100
FAX: (714) 641-4122
San Diego (92123)
Bell Industries
5520 Ruffin Road, Ste. 209
TEL: (619) 576·3924
(800) 525·6666
FAX: (619) 492·9826
Englewood (80111)
Hamilton/Hallmark - #06
12503 E. Euclid Drive, Ste. 20
TEL: (303) 799·7800
FAl(, (303) 790-4991
Lake Mary (32746)
Zeus Eectronics
37 Skyline Drive, Bldg. D, Ste. 3101
TEL: (407)333·3055
FAX: (407)333.9681
Culve< CHy (90230)
Hamilton Corporate
10950 W. Washington Blvd.
TEL: (310) 558·2000
FAX: (310) 558-2076
San Diego (92122)
Future Electronics Corp.
5151 Shoreham Place, Ste. 220
TEL: (619) 625·2800
FAl(, (619) 625·2810
Thornton (80241)
Marshall Industries
12351 N. Grant Street, Ste A
TEL: (303) 451-8444
FAX: (303) 457·2899
Largo (34641)
Future Electronics
2200 1M1 Pines Drive. Ste. 108
TEL: (813) 530-1222
FAX: (813) 538-9598
6-3
Siliconix
AMember of the TBMIC Group
U. S. Distributors (Cont'd)
GEORGIA
IOWA
Peabody (01960)
Duluth (30136)
HamiltonIHallmark - #15
3425 Corporate Way
1E[., (404) 447-7500
FAX, (404) 625-5490
Cedar Rapids (52402)
HamUton/Hallmark - #44
1E[.,
2335·A Blairsferry N.E.
FAX,
1E[.,
(319) 393-0033
w;m;, (600) 332-4757
FAX,
(319) 393-7050
Hamiiton/Hallmark - #18
10 M Centennial Drive
(506) 532-3701
(506) 532-9302
Wilmington (01877)
Zeus Electronics
Duluth (30136)
25 Upton Dnve
Pioneer Thcb
42S0C Rivergreen Parkway
1E[.,
1E[.,
FAX,
(404) 623-1003
(404) 623-0665
Norcross (30071)
Bell Industries
3000 Business Park Drive #D
1E[., (404) 446-7167
(600) 525-6666
FAX, (404) 446-7264
Norcross (30071)
Future Electronics Corp.
4960 Peachtree Ind., Blvd., Ste. 230
1E[., (404) 441-7676
FAX: (404) 441-7560
Norcross (30093)
Marshall Industries
5300 Oakbrook Pkwy., Ste. 140
1E[., (404) 923-5750
FAX, (404) 923-2743
ILLINOIS
Addison (60101)
Pioneer Std.
2171 Thiecutive Drive, Ste. 200
1E[., (708) 495-9660
FAX, (706) 495-9631
KANSAS
Lenexa (66219)
HantlltonlHallmark - #58
15313 W. 95th
1E[.' (913) 668-1055
FAX: (913) 541-7951
Lenexa (66214)
Marshall Industries
10413 W. 84th '!efface
1E[.,
FAX'
(913) 492-3121
(913) 492-6205
Overland Park (66212)
Future Electronics Corp.
8826 Santa Fe Drive, Ste.150
1E[., (913) 649-1531
FAX, (913) 649-1766
KENTUCKY
Lexington (40511-1001)
HamiltonlHallmark
1847 Mercer Road, Ste. G
lELo (606) 259-1475
FAX, (606) 266-4936
MARYLAND
Bensenville (60106)
HamiltonlHallmark - #10
1130Thorndale Avenue
1E[., (706) 660-7760
FAX, (706) 773-7969
Columbia (21046)
Bell Industries
8945 Guilford Road, Ste. 130
1E[., (410) 290-5100
(600) 525-6666
FAX, (410) 290-8006
Elk Grove Vtilage (60007)
Bell Industries
870 Cambridge Drive
1E[., (706) 640-1910
(600) 525-6666
FAX, (706) 640-1926
Columbia (21046)
Future Electronics Corp.
6716 Alex:an.der Bell Drive, Ste. 101
1E[., (41)290-0600
FAX, (410) 290-0326
Hoffman Estates (60195)
Future Electronics Corp.
3150 W. Inggins Road, Ste. 160
1E[., (706) SS2-1255
w;m;, (600) 933-9641
FAX, (706) 490-9290
Schaumburg (60173)
Marshall Industries
50E. Commerce Drive, Unit I
1E[., (708) 490-0755
FAX, (706) 490-0569
INDIANA
Fort Wayne (46603)
Bell Industries
3433 E. Wasbnigton Blvd.
1E[., (219) 422-4300
(600) 525-6666
FAX, (219) 423-3420
Indianapolis (46268)
Bell Industries
P.o. Box 6885
5230 W. 79th Street
1E[., (317) 675-6200
(600) 525-6666
FAX: (317) 675-6219
Indianapolis (46268)
HamiitonlHallmark - #28
4275 W. 96th Street
1E[., (317) 872-SS75
FAX, (317) 676-7165
Indianapolis (46240)
Pioneer Std.
9350 N. Priority Way West Drive
1E[., (317) 573-0660
w;m;, (600) 332-5503 (IN)
w;m;, (600) 426-9126 (II, KY)
FAX, (317) 573-0979
6-4
Columbia (21046-2101)
Hamilton/Hallmark - #12
10240 Old Columbia Road
1E[., (410) 966-9600
FAX, (410) 361-2036
Gaithersburg (20877)
Pioneer'Thch.
9100 Gaither Road
1E[., (301) 921-0660
FAX, (301) 921-4255
Silver Springs (20904)
Marshall Industries
2221 Broad Birch Drive, Ste. G
1E[., (301) 622-1116
FAX, (301) 622-0451
MASSACHUSETTS
Andover (01810)
Bell Industries
100 Burtt Road, Suite 106
1E[.' (506) 474-6660
(800) 525-6666
FAX, (506) 474-6902
Bolton (01740)
Future Electronics Corp.
41 Main Street
1E[., (506) 779-3000
FAX, (506) 779-5143
Burlington (01803)
Wyle
15 Third Ave.
1E[., (617) 272-7300
FAX, (617) 272-6609
Lexington (02173)
Pioneer Std.
44 Hartwell Ave.
1E[., (617) 661-9200
FAX, (617) 663-1547
FAX,
(506) 656-4776
(506) 694-2199
Wilmington (01887)
Marshall Industries
33 Upton Drive
1E[., (506) 656-0610
FAX' (506) 657-5931
MICHIGAN
Grand Rapids (49512)
Future Electronics Corp.
4505 Broadmoor SE
(616) 698-6800
w;m;, (800) 334-6606
FAX, (616) 696-6621
1E[.,
Gt"andRapids (49512)
Pioneer Std.
4594 Broadmoor Ave. SE, Ste. 235
1E[., (616) 696-1601
FAX, (616) 696-1631
livonia (48150)
Future Electronics Corp.
35200 Schoolcraft Road, Ste. 106
1E[., (313) 261-5270
FAX, (313) 261-6175
NEW HAMPSHIRE
See Massachusetts
NEW JERSEY
Fairfield (07004)
Bell Industries
271 Route 46 West, Ste. F202-203
1E[.,
FAX,
(201) 227-6060
(600) 525-6666
(201) 227-2626
Fairlield (07006)
Marshall Industries
101 Fairfield Road
(201) 662-0320
(201) 662-0095
1E[.,
FAX,
Fairfield (07006)
Pioneer Std.
14 ''/>I.' Madison Road
1E[.,
FAX,
(201) 575-3510
(201) 575-3454
Marlton (08053)
Future Electronics Corp.
12E. Stow Road, Ste. 200,Bldg. 12
1E[., (609) 596-4060
FAX, (609) 596-4266
Mt, Laurel (06054)
Marshall Industries
158 Gaither Drive, Unit 100
lELo (609) 234-9100 (NJ)
1E[., (215) 627-1920 (PA)
FAX, (609) 776-1619
NEW MEXICO
livonia (48150)
Marshall Industries
31067 Schoolcraft Road
1E[., (313) 525-5650
FAX, (313) 525-5655
Albuquerque (87123)
Bell Industries
11728 LinnN.E.
1E[., (505) 292-2700
(600) 525-6666
FAX, (505) 275-2619
Plymouth (46270)
Pioneer Std.
44190 Plymouth Oaks Drive
TEL, (313) 416-2157
FAX: (313) 416-2415
Albuquerque (87109-3147)
HamiltonlHallmark - #22
7801 Academy Road NE-Bldg. 2, Ste.102
1E[., (505) 345-0001
1WX, (910) 989-0614
FAX: (505) 628-0360
N"", (40375)
Hamilton/Hallmark - #66
41650 Gru"denbrook, Ste. 100
1E[., (313) 347-4271
FAX, (313) 347-4021
NEW YORK
MINNESOTA
Binghamton (13905)
PIoneer Std.
1249 Front Street, #201
1E[., (607) 722-9300
FAX, (607) 722-9562
Bloomington (55341)
HamiltonlHa1lmark - #63
9401 James Avenue South, Ste. 140
1E[., (612) 661-2600
FAX, (612) SSI-9461
Endicott (13760)
Marshall Industries
100 Marshall Drive
1E[., (607) 796-1611
FAX, (607) 797-7031
Eden Prairie (55344)
Future Electronics Corp.
10025 Vdlley View Road, Ste. 196
1E[., (612) 944-2200
FAX, (612) 944-2520
Fairport (14450)
Pioneer Std.
840 Fairport Park
lELo (716) 361-7070
FAX, (716) 361-5955
Eden Prairie (55344)
Pioneer Std.
7625 Golden Wangle Drive
1E[., (612) 944-3355
FAX, (612) 944-3794
Hauppauge (11788)
Future Electronics Corp.
801 Motor Parkway
1E[., (516) 234-4000
FAX, (516) 234-6163
Plymouth (55447)
Marshall Industries
3955 Annapolis Lane
1E[., (612) 559-2211
FAX, (612) 559-8321
MISSOURI
Earth City (63045)
Hamilton/Hallmark - #05
3783 Rider 'nail South
1E[., (314) 291-5350
FAX' (314) 291-0362
Saint Louis (63141)
Future Electronics Corp.
12125 Woodcrest Executive Drive,
Ste.220
1E[., (314) 469-6605
w;m;, (600) 727-6605
FAX, (314) 469-7226
Hauppauge (11788)
Hamilton!Hallmark - #20
933 Motor Parkway
1E[., (516) 434-7470
FAX, (516) 434-7491
Port Chester (10573)
Zeus Electronics
100 Midland Avenue
1E[., (914) 937-7400
FAX, (914) 937-2553
Rochester (14623)
Future Electronics Corp.
333 Metro Park
1E[., (716) 272-1120
FAX, (716) 272-7182
Rochester (14623)
HamiltonJHa11mark - #61
1057 E. Henrietta Road
1E[., (716) 475-9130
FAX, (716) 475-9119
Siliconix
AMember of the TBMIC Group
U. S. Distributors (Cont'd)
NEW YORK (Cont'd)
Worthington (43085)
HamUtonlHailmark - #79
Rochester (14624)
777 Dcarboran Lane, Ste. L
Marshalllndustries
1250 Scottsville Road
1EL: (614) 888-3313
W,m;: (800) 767-0392
FAX: (614) 888-0767
1EL: (716) 235-7620
'JWX: (510) 253-5526
FAX: (716) 235-0052
OKLAHOMA
Syracuse (13212-4513)
Future Eectromcs Corp.
Thba (74146)
200 Salina Meadows Pkwy • 5te 130
1EL_ (315) 451-2371
FAX_ (315) 451-7258
HaDllltonlHallmark - #46
5411 S 12Sth East Avenue, Ste. 30S
Woodbury (11797)
Pioneer Std.
60 Crossways Park W.
1EL: (516) 921-8700
FAX: (516) 921-2143
1ELFAX:
(918) 252-7297
(918) 254-6207
Thlsa (74146)
Pioneer
9717 E 42nd Street, Ste. 105
1EL: (918) 665-7840
FAX:
(918) 665-1891
NORTH CAROLINA
Concord (28026)
Future Eectronics
OREGON
Beaverton (97005)
Bell Industries
9275 S.w. NImbus
Charlotte Motor Speedway, Ste 314
P.O. Box 600
1EL: (704) 455-9030
FAX- (704) 455-9173
1EL:
Mornsville (27560)
FAX:
Pioneer'lecb.
2200 Gateway Center Blvd., 5te. 215
1EL- (919) 460-1530
FAX- (919) 460-1540
Ral';gh (27604)
Future Eectronics Corp.
S225 Capitol
1 North Commerce Center
1EL: (919) 790-7111
FAX: (919)790-9022
Raleigh (27604)
HamiltonlHailmark - #24
3510 Spring Forrest Road
1EL: (919) 878-0819. X210
FAX: (919) 954-0940
Raleigh (27604)
Marshall Industries
5224 Greens Dairy Road
1EL: (919) 878-9882
FAX: (919) 872-2431
OHIO
Cleveland (44105)
Fioneer Std.
4800E.131stStreet
1EL: (216) 587-3600
FAX: (216) 587-3906
Dayton (45459)
Bell Industries
446 Wmdsor Park Drive
1EL:
FAX:
(513) 434-8231
(800) 525-6666
(513) 434-8103
Dayton (45459)
HamiIton/Hallm.u-k - #64
7760 Washington Village Drive
1EL: (513) 439-6721
FAX:
(513) 439-6705
Dayton (45414)
Marshall Industries
3520 Park Center Drive
(513) 898-4480
FAX: (513) 898-9835
1EL:
Dayton (45424)
Pioneer Std.
4433 Interpoint Blvd.
1EL:
FAX:
(513) 236-9900
(513) 236-8133
Mayfield Heights (44124)
Future Electronics Corp.
6009 E Lander Haven Drive
'IEL: (216) 449-6996
FAX:
(216) 449-8987
Solon (44139)
Marsballlndustrles
30700 Bainbridge Road Unit A
1EL: (216) 248-1788
FAX: (216) 248-2312
(503) 644-3444
(800) 525-6666
(503) 520-1948
Beaverton (97006)
Future Electronics Corp.
Cornell Oaks Corp. Center
15236N.w. Greenbner
1EL: (503) 645-9454
FAX:
(503) 645-1559
Beaverton (97005)
HamiltonJHallmark - #27
9750 SW N"tmbus Ave.
1EL_ (503) 526-6200
W,m;: (800) 962-8648
FAX_ (503) 641-5939
Beaverton (97005)
Marshall Industries
9705 S.W Gemini
1EL: (503) 644-5050
FAX: (503) 646-8256
Beaverton (97005)
Wyle Laboratories-EMG
9640 Sunshine Ct.
Bldr.G-ZOO
1EL: (503) 643-7900
FAX: (503) 646-5466
PENNsYLVANIA
Ho"ham (19044)
Ploneer'1Z:ch
500 Enterpnse Road
Keith \<)JJey Busmess Center
1EL: (215) 674-4000
'JWX: (510) 665-6778
FAX: (215) 674-3107
l'lttsburgh (15205)
Marshall Electronics
401 PBrlcwa)'Vlew Dnve
1EL: (412)788-0441
FAX: (412) 788-0447
l'ittsburgh (15238)
Pioneer Std.
259 Kappa Drive
1EL:
FAX:
(412) 782-2300
(412) 963-8255
1l"evosc (19053)
Bell Industries
2S56 Metropolitan Dnve
1EL: (215) 953-2800
(800) 525-6666
FAX: (215) 364-4927
Austm (78727)
HamiltonlHallmark - #26
12211 '1echnoiogyBlvd.
1EL:
FAX-
(512) 258-8848
(512) 258-37n
Austm (78758)
PlODeer Std.
1826 D Kramer Lane
1EL- (512) 835-4000
FAX- (512) 835-9829
Austin (78759)
Wyle Distribution
4030 W. Braker l.ane, Ste. 420
1EL: (512) 345-8853
FAX:
(512) 345-9330
Dallas (75244)
PioneerStd
13765 Beta Road
1EL: (214) 386-7300
FAX: (214) 490-6419
Houston (77082)
Future Electronics Corp
11271 Richmond Ave., Ste.l06
1EL:
FAX:
(713) 556-8696
(713) 589-7069
Houston (71063)
Hami.lton/Hallmark - #11
8000 West Glen
1EL:
FAX:
(713) 781-6100
(713) 953-8420
Houston (77040)
Marshall Industries
10681 Haddington
1EL- (713) 467-1666
FAX: (713) 467-9805
Houston (77099)
PIoneer Std.
10530 Rockley Road, Ste. 100
1EL: (713) 495-4700
FAX: (713) 495-5642
Houston (71099)
WyJe Distnbution
11001 S. Willcrest, #100
1EL: (713) 879-9953
FAX: (713) 879-6540
Richardson (75081)
Bell Industries
1701 Greenville Avenue, Ste. 306
1EL: (214) 690-0486
(800) 525-6666
FAX: (214) 690-0467
RIchardson (75081)
Future Electronics Corp.
1850 N. Greenville Avenue, Ste. 146
1EL: (214) 437-2437
FAX- (214) 669-2347
Richardaon (75081)
Marshall Industries
1551 N. Glenville Drive
1EL: (214) 705-0604
FAX:
(214) 705-0675
Richardson (75081)
Wyle Distribution
1810 N. Greenville Avenue
1EL: (214) 235-9953
FAX- (214) 644-5064
Carrollton (75006)
Zeus Electronics
3220 Commander Drive
1EL: (214)380-4330
FAX: (214) 447-2222
UTAH
Midvale (84047)
Bell Industries
6912 South 18$ West, Ste B
TEXAS
Austin (78759)
Future Electronics
9020 IT Capital of1Cxas Hwy. N.
1EL- (512) 502-0991
(800) 678-0991
FAX: (512) 502-0740
"IEL.
FAX:
(801) 561-9691
(800) 525-6666
(801) 255-2477
Salt Lake City (84106)
Future Electronics Corp.
3450 South mgbJand Drive, Ste. 301
1EL: (801) 467-4448
FAX: (801) 467-3604
Salt Lake CIty (84121)
HamiltonIHallmark - #09
1100 E. 6600 S, Ste. 120
1EL:
FAX:
(801) 266-Z022
(801) 263-0104
Salt Lake CIty (84119-1552)
Marshall Industries
2355 S_ 1070 W #D
lEI.: (801) 48S-!551
FAX: (801) 487-0936
Wost Valley CIty (84119)
Wyle Laboratones-EMG
1325 W. 2200 S., Ste. E
'IEL: (801) 974-9953
FAX_
(801) 972-2524
WASHINGTON
Bellevue (98004)
Ben Industries
1715 114thAve_. SE. Ste_ 208
1EL: (206) 646-8750
(800) 525-6666
FAX: (Z06) 646-8559
Bellevue (98007)
Ploneer'Thch.
2800 156th Avenue, S.E.
1EL: (206) 644-7500
FAX:
(Z06) 644-7300
Bothell (98011)
Future Eectronics Corp.
19102 N_ Creek Pkwy_. Ste_ 118
1EL: (Z06) 489-3400
FAX: (Z06) 489-3411
Bothell (98011)
Marshall Industries
11715N. CreekPkwy, South, Ste.112
1EL:
FAX:
(206) 486-5747
(Z06) 486-6964
Rodmond (98052)
Hamilton!Hallmark - #07
8630 154th Avenue, N.E.
lEI.: (206) 881-6697
FAX: (206) 867-0159
Rodmond (98052)
Wylc Distribution Group
15385 NE 90th Street
1EL: (206) 881-1150
FAX:
(206) 881-1567
WISCONSIN
Brookfield (53005)
Ploneer Standard
120 Bishops Way. Ste. 163
1EL: (414) 784-3480
FAX:
(414) 784-8Z07
Milwaukee (53214)
Marsh Eedronies, Inc.
1563 South lOIst Street
1EL: (414) 475-6000
FAX:
(414) nl-2847
New Berlln (53146)
HamUton!Hallmark, #57
2440 S. 179th Street
1EL: (414) 780-7200
FAX: (414) 780-7ZOI
Waukesha (53186)
Bell Industries
W. 226 N. 900 Eastmound Drive
1EL: (414) 547-8879
FAX:
(800) 525-6666
(414) 547-6547
Waukesha (53186)
Future Electronics Corp.
20875 Crossroads CU., Ste. 200
lEI.: (414) 786-1884
FAX: (414) 786-0744
Orem (84058)
Waukesha (53186)
Wyle Laboratories·EMG
973 S. 700E.
1EL: (800) 414-4144
FAX: (801) 226-0210
Marshall Industries
20900 Swenson Drive
1EL: (414) 797-8400
FAX: (414) 797-8270
6-5
Siliconix
AMember of the TaM[C Group
Canadian Distributors
ALBERTA
Calgary (TIY 685)
Future Electronics Corp
3833-29th Street N.E
lEl.: (403) 250-5550
FAX:
(403) 291-7054
Edmonton (T6ESN9)
Future Electronics Corp.
4606 97th Street
lEl.: (403) 438-2858
FAX:
(403) 434~12
BRITISH COLUMBIA
Burnaby (V5A4N6)
_couver (VSK 4X7)
Future Eectronics
1695 BOundaryRoad
lEl.: (604) 294-1166
FAX: (604) 294-1206
MANITOBA
Wmnipeg (R3H ON8)
Future Electronics Corp.
106 KingPdward Court
1EL: (204) 786-TIll
FAX:
(204) 783-8133
Mississausa (lAV 1W5)
Future Electronics Corp.
593S Abport Road, Ste.200
1EL: (416) 612-9200
FAX: (416) 612-9185
Mississausa (LST 21.1)
HamilloD/Hallmark - #59
151 Superior Blvd.
1EL: (416)564-6060
FAX: (416) 564-6033
Ottawa (K2C 3P2)
Future Electronics
Baxter Centro
1050 Baxter Road
(613) 821>8313
FAX: (613) 820-3271
lEl.:
ONTARIO
QUEBEC
Brompton (1.60 5G3)
Pointo Claire (H9R SCI)
Future Electronics
HamilloD/Hallmark - #45
Marshall Industries
8610 Commen::e Ct.
1EL: (604) 437-6667
FAX: (604) 294-1206
4 Paget - Unit 10-11
(416) 458-8046
FAX' (416) 458-1613
lEl.:
Pointe Claire (H9R 5P7)
Marshall Industries
148 Brunswick. Blvd.
lEl.: (514) 694-8142
FAX:
(514) 694-6989
Quebec (G2B5G5)
Future Electronics Corp.
1000 Avenue Street Jean-Baptiste, Ste.IOO
1EL: (418) 877-6666
FAX:
(418) 877-6671
Saint Laurent (H4S IP8)
HamilloD/Hallmark - #65
2795RueHalpern
1EL: (514) 335-1000
1LX: (610) 421-3731
FAX' (514) 335-2381
237 Hymus Boulevard
1EL: (514) 694-7710
1LX: 05-823599
FAX:
(514) 695-3707
European Saies/Representatives/Distributors
AUSTRIA
Bacher Electronics GmbH
Eilnorgasse6
1223Wien
lEl.: (43) 0222 81602215
1LX: 131532
FAX:
(43)0222863211201
FRANCE
AIm..
48 RUe de l!Aubepine
D.P.I02
92164 ANIONY CEDEX
1EL: (33) I 40-96-54-00
FAX: (33) I 46-66-60-28
EBV Elektronik
Diefenbachg:assc3S/6
l1S0Wien
1EL: (43) 0222 8941774
FAX:
(43)02228941775
Arraw E1ectroniquc
73-79 Rue des Solets
SilicS8S
94663Rungis
1EL: (33) 149-78-49-78
BELGIUM
FAX:
Diode
KeibetgU
Minervastraat, 14/B2
EBV EI.ktronik
16, rue de Gablce
77436 CHAMPS SUR MARNE
1EL: (33) 1 64-68-86-00
FAX: (33) 164-68-27-67
1930 Zaventem
1EL: (32) 2 7254660
FAX:
(32) 2 7254511
EBV Elektronik
Excelsiorlaan 3S
1930 Za'JCotem
1EL: (32) 02 7209936
FAX: (32) 02 7208152
SonetechCY
Limhutg Styrun, 243
B-1810Wemmel
1EL: (32) 2 4600707
FAX:
(33) 149-78-05-96
(32) 2 4601200
DENMARK
L TJ: Mutticomposants
16 Avenue des Andes
Zade Courtaboeuf
BP16
91941 Les tnis CedexA
lEl.: (33) 1 64-46-02-00
1LX: 603351
FAX: (33) 1 64-46-95-95
SCAiB
80 Rue d'Arcucil
94523 Rungis Cedcx
lEl.: (33) 146-87-23-13
1LX: 20467F
TEMIC
AEG DanskAktieselskab
FAX:
RosI:UdeveJ 8-10
TEMIC
3, Avenue du Centre
DK-2620 Albertslund
1EL: (45) 42648S22
FAX:
(45) 42 64"949
(33) 1 45-60-55-49
B.P.309
78054 Saint-Quentin-en.Yvelines
1EL: (33) 1 30-60-70-00
FINLAND
FAX:
(33) 1 30-64-06-93
Galedius '1Ahinik OK
p.o. Box 12S
Magistralsporten 4A
SF-00241 Helsinld
1EL: (358) 014 821TI
FAX: (358) 014 82 189
In' Components Group
Distribution GmbH & Co
P.O. Box 25 ('ll'opajakatu s)
PL34
00581HcIsinld
1EL: (358) 0-739100
FAX: (358) 0-712414
6-6
GERMANY
AIfrcd Neye Enateehnik GmbH
Ahnenweg 2 - 40219 DIlsseldorf
1EL:
FAX:
(49) 211 303010
(49) 211 3030130
AIfrcd Neye Enateehnik GmbH
Rheinstrasse 24 - 64283 Darmstadt
(49) 615126446
FAX: (49) 6151 294171
1EL:
EBV Elektronik GmbH
AIfrcd Neye Enateehnik GmbH
Breitwiesenstrasse 25 - 70565 Stuttgart
1EL:
Postfach - 70507 Stuttgart
(49) 711 7889770
FAX: (49) 711 7889744
lEl.'
AIfrcd Neye Enateehnik
Bucberstrasse 100 - 90408 Numberg
1EL: (49) 911 34750
FAX:
(49) 911 347530
AIfrcd Neye Enateehnik GmbH
Henschehing 5 - 85SS! Kirchheim/M\\nchen
1EL: (49) 89 9099990
FAX:
(49) 89 90999940
Alfred Neye Enatecbnik GmbH
Max-Stromeier Strasse 3 - 78467 Konstanz
1EL: (49) 7531 67181
FAX:
(49) 7531 67260
Alfred Neye Eaatec:hnik GmbH
Leoingrader Str&sse 15 - 01069 Dresden
1EL: (49) 3754873341
FAX:
(49) 3754872588
CEO Ditronic GmbH
Iulius-H61der-Strasse 42 - 70597 Stuttgart
Postfacb 700159 - 70571 Slnttgart
lEl.: (49) 0711 720010
PAX: (49) 0711 7200132
CEO Ditronic GmbH
Bernbacherstrasse 9
90768 Furth
1EL: (49) 911 752216
FAX: (49) 911 7520064
CEO Ditronic GmbH
EbertshelmerStrasse 12 - 67280 OUirbeim
1EL: (49) 6359 83201
FAX:
AIfrcd N.,. Enateehnik GmbH
Scb1I1erstrasse 14 - 254S1 Quickborn
Postfach 1246 - 25443 Qulckbom
1EL: (49) 4106 6120
FAX: (49)4106612223
AIfrcd N.,. Enateehnik GmbH
Hildesheimer Strassc 31 - 30169 Hannover
lEl.: (49) Sl1 816038
FAX:
(49) 511 816048
EBV Elektronik GmbH
Hans PinselSlr. 4 - 88S40Haar
Postfach 1109 - 85529 Hoar
D-8013 Hoar
1EL: (49) 089 460960
FAX: (49) 089 464488
(49) 6359 83201
Distron
Beheimstrasse 3 - 10585 Berlin
postfach 100208 - 10562 Berlin
1EL: (49) 030 3421041/44
PAX'
(49) 030 3419003
EBV EI.ktronik GmbH
Boblinger Strasse 13 - 71229 Leonberg
1EL: (49)7152300090
FAX: (49) 715275958
Weimarstr48
7000 Stuttgart 1
(49) 0711 619100
'ILX: 722271
FAX: (49) 07512 75958
EBV Eektronik. GmbH
Viersener Strasse 24 - 41462 Neuss
lEl.: (49) 2132530072
FAX:
(49) 2131 59300087
EBV E1ektronik GmbH
In der Meineworth 21 - 30938 Burgwedel
P",tCach 1355 - 30929 BUIgWedel
lEl.: (49) 5139 808070
FAX: (49)51395199
EBV Elektroruk GmbH
Schenckstrasse 99 - 60489 Frankfurt 99
1EL: (49) 069 785037
FAX'
(49) 069 7894458
Elkose GmbH EJektronik Vbrtrieb
11TMultlkomponent GmbH
E1ektronik Vbrtrleb
Bahnjofstrasse 44 - 71696 MOgliDgen
Postfach 1246 - 71693 Mog1ingen
1EL: (49) 071414870
FAX: (49) 07141 487210
Ing. Buro Rainer KOnig
Konigsberger Strasse 16A - 12207 Berlin
Postfach420 -12174BerUn
1EL:
FAX:
(49)307689090
(49)307738363
Spoerlc Electronic
Kackertstrasse 10 - 52072 Aachcn
(49) 241 889690
FAX: (49) 241 81162
lEl.'
SpoerJe Electronic
Rudower Strasse 27~29 - 12351 Berlin
Postfach 47645 - 12315 Berlm
lEl.: (49) 30 606011
1LX: 186029
FAX: (49)306014057
Spocrle Electronic
Hildcbrandstrasse 11- 44319 Dortmund
Postfach 130362 - 44313 Dortmund
lEl.: (49) 231 218010
1LX: 822S55
FAX: (49) 231 2180167
Siliconix
AMember althe TsM(C Group
European Sales/Representatives/Distributors (Cont'd)
GERMANY (Cont'd)
Spoerlc Electronic
1m Gefierth 11a - 63303 Dreieich
Postfach 102140 - 63267 Dreieich
TIlL:
n.x:
FAX:
(49) 6103 3040
417983
(49) 6103 304201
Spoerlc Electronic
Hans-Bunte-Strasse 2 - 79108 Frelburg
Postfach 5607 - 79023 Frciburg
lEL: (49) 761 510450
!LX: 7721994
FAX:
(49)761502233
Spoerlc Electronic
Rodeweg 18 - 37081 Gouingen
Postfach 3352 - 37023 G6ttingen
TIlL:
(49) 551 9040
!LX: 96733
FAX: (49) 551 90446/48
Spoerlc Electronic
Wiosbergring 42 - 22525 Hamburg
Postfach 540824 - 22508 Hamburg
lEL: (40) 40 8531340
=:
FAX:
2164536
(49) 40 85313491
Spocrle Electronic
Roscherstrassc 31 - 04105 Lelpng
lEL: (49)3415647201
FAX:
(49) 341 5852087
Spoerle Electronic
Fohringer Allee 17 - 85774 Unterfohring
Fostfach 1155 - 85765 Unterfohring
lEL: (49) 89 959990
FAX-
(49) 89 9509999/97
Spoerle Electromc Rathsbergstrasse 17 90411 Numberg
lEL: (49) 911 521560
FAX:
(40) 911 5215635
Spocrle Electronic
Hopfigheimer Strasse 5 - 74321
Bietigbeim-Bissingen
Postfach 1727 - 74307 Bietigbeim-Bissingen
lEL: (49) 7142 70030
FAX:
ESCO ltaliana Spa
V. I.e Casiraghi 355
20099 Sesta S. Gtovanni, Milan
lEL: (39) 224 09 241
FAX:
(39) 224 09 255
InteSl
Deutsche rrrlndustries
Vialc Ml1anofion, ElS
1·20094 Assago, Milan
lEL: (39) 282 47 01
FAX: (39) 282 42 631
'IEMIC
Via Stephenson 94
20157 Milano
lEL: (39) 2 33 2121
FAX:
(39) 233212201
NETHERLANDS
EBV
Planetenbaan 2
3606 AI<. Maarssenbroek
lEL: (31) 03465-62353
FAX:
(31) 03465-64277
DIODE COMPONENTS BV
Postbus 7139
5605 JC Eindhoven
Dc Run 1120
5503 LA Veldhoven
TIlL:
FAX:
(31) 40-545430
(31)40-535540
DIODE COMPOSANl1l BY
Coltbaan.17
3439 NG Nieuwegc
TIlL:
FAX:
(31) 3402-91234
(31)3402-46764/35924
'Iheresienstrasse 2
D·74072HeUbronn
postfacb 35 35
D·7402SlIcilbronn
(49) 0713167-0
(49) 0713167-2100
Sucursal Espana
Calle Marla Thbau, 6
28049 Madrid
(34) 91 358 8608
FAX: (34) 913589430
lEL:
'IEMIC
Principe de 'krgara, 112
Apartado235
28002 Madrid
TIlL: (34) I 562 76 00
FAX: (34) 1 562 75 14
SWEDEN
I1TMuphkomponcntAB
Ankdammsgatan 32
5-171 26 Soma
lEL: (46) 08 830 020
FAX:
(46) 08 271 303
'IEMICNordicA/S
KavalJerivagen 24, Rissne
P.O. Box2042
17202 Sundbybcrg, Sweden
lEL: (46) 8 733-0090
FAX: (46) 8 733-0558
'Ilrs Elektronik AD
Arrendevageo 36
P.O.Box3027
16303 Spanga
TIlL:
FAX:
(46) 8 36 2970
(46) 8 761 3065
SWITZERLAND
AbalecAG.
Grabenstrasse 9
8952 Schlieren
lEL: 1-730-0455
FAX:
1-730-9801
EBV Elektronik
Vorstadstr.37
8953 Dienkon
lEL: 1-7401090
FAX:
1-7415110
Future Electronics
Payl. Road - Colnbrook
Berkshire SL3 DEl
TIlL: (44) 0753 687 000
FAX: (44) 0753 689 100
HB Electronics Ltd.
I.e.ver Street - Bolton
LancsBL36B1
TIlL: (44) 0204 255 44
63478
FAX: (44) 0204 384911
'ILX:
Macro-Marketing Ltd.
Burnham laDe
Slough. Berkshire SLl 6lN
lEL: (44) 0628 604422
'ILX: 847945
FAX- (44) 0628 666873
MEMEC Ireland Ltd_
BlockH - Lock Quay
Clare Street - Limerick
SPOERLEEI.JlCIRONIC
FAX:
TIlL:
FAX:
lEL:
(47)22161610
(47)22257317
8032ZIlrich
(41) 1-3868686
(41) 1-3832379
FAX:
FABRIMEX
DIS1RlBUllON AG
En Untr1nehmender
TIlL:
FAX:
(39) 02 9522227
Cambridge CBS OND
TIlL: (44) 0223 812598
FAX: (44) 0223 812686
8. rue des Pccbeurs
1400 Yverdon-Ies--Bains
(41)24-219222
(41) 24-218141
TURKEY
SPAIN
ADM Electronica SA
MenorcaNo.3
28009 Madrid
lEL: (34) I 409 47 25
FAX: (34) I 409 69 03
(10) 353 61411842
(10) 353 61 411 888
Kircbenwcg 5
1200 Ltsbon
lEL: (351) 11-520101
FAX: (351) 11-520004
FAX:
SwaOham Bulbeck,
lEL:
1-201S9Milan
lEL: (39) 2 668 02 788
FAX: (39) 2 668 02 919
lEL: (39) 02 95343600
!LX: 330869
BCD Microelectronics Ltd
:3 Station Road
Rep of Ireland
SPOERLE EI.JlCIRONIC
Milano
Abercom Electronics Ltd
PardOVllD
Philip, Linlithgow Eil49 6QZ
lEL: (44) 506 834 222
!LX: 77994
FAX: (44) 506 834 554
Ein Untrtnehmen der
RedJ.s Logar
Rua Bernardo Lima
Nr. 27-1qIzda
20060 Cassina de Pecchi
Abacus Eectronics Ltd..
Abacus House
Bone Lane
Ncwbury, Berks RG14 SSP
lEL: (44) 0635-36222
!LX: 847589
FAX: (44) 0635-38670
'ThhonicA/S
P.O. Box 140 - Kalbakken
Kakkelovnskroken 1
N.()902 Oslo 9
Canel Electronica Srl
Vial. Dcgli Anigian.lli 6
Don In", GIuseppe Dc Mlco
S_PA
Via Vittorio ~neto 8
UNITED KINGDOM
FABRIMEX
DIS1RlBUllON AG
PORTUGAL
ITALY
EBV Eektron.ik ~rtriebs GmbH
NORWAY
(40) 7142 700360
1EMIC 1ELEFUNKEN microelectronic
TIlL:
FAX:
EBVEektronik
Via C. Frova 34
20092 CiniscUo Balsamo,Ml1an
TIlL: (39) 2 66017111
FAX: (39) 2 66017020
ERDAEektronikAS.
San \b TIc AS.
Keskin Kalem Sow 15
Microm.ark
159Boyn ValleyRoad
Maidenhead
Berkshire SL6 4DT
TIlL:
FAX:
(44) 0628 76176
(44) 0628 783799
ROMAKIECLtd_
Riversvale
Honeysuclde Lane
Headley laDe
Graysbol. Han' - GU 35 8JA
TIlL: (44) 831 5065 57
FAX: (44)428721943
TEMICUKLtd_
Istanbul
lEL: (90) 1144-21-68
Easthampstead Road
Bracknell
Berkshiro RG12 1LX
lEL: (44) 344 485757
FAX:
FAX:
80300 EscnlOpi
(90) 127 50540
(44) 344 427371
6-7
Silicanix
AMcmber of the TBMIC Group
Asia Pacific and Rest of the World
ARGENTINA
INDIA
KOREA
SINGAPORE
VEL S.R.L
Virrey CevaUosl43
Amspec (S) Pte Ltd
Chugtl8m. Electronics Ltd.
Rm. 903. Hosung Bldg.
1EMIC
AEGBuUding
2S "DuDpines Street 92, #02-00
1852
"IEL: (65) 788-6668
FAX: (65) 788-3383
SalesFAX: (65) 788.()Q31
1077 Buenos Aires
1EL: (54) 140-1025, (54) 1 45·7140,
FAX:
(54) 145·7163
(54) 1440-1533, (54) 145·2551
AUSTRALIA
IRH Components
1-5 Carter Street
Lidcombo 2141
NSWAustralia
1EL: (61) 2·3641766
FAX:
BRAZIL
2629 'll>rminal Blvd.
Mt View,CA94043
"IEL: (415) 967·8818
1LX: 345545
FAX: (415) 967-8836
UNIAoDigi!al
Rua ']bas, 622
Brooklin Novo - 04557
S.Paula -SP
1EL: (55) 11 533'()967
1EL: (55) 11241-8052
(55) 11 533-6780
HONG KONG
1EMICHongKongllmlted
Suite 1701, World Finance Centre
South 1bwct, Barbour City
19 Canton Road, 'Dimsbatsui
Kowloon
1EL: (852) 3789 789
FAX:
(852) 3755733
Willas - Arroy (Holdin!!,,) Lid.
Unitl,24IF
Wyler Center Phase 2
200 1lIi lln Poi Road
Kwai CbungN.'I:
Kowloon
1EL: (852) 4183700
FAX:
6-8
(852) 4816992
#44-22, Yoido-Dong
Youngdcungpo-Ku
Seoul
1EL:
FAX:
(82) 2·7820412
(82) 2-7853643
Spectra InnovationsInc.
780 Montague EIprossway, Sic. 208
San Jose. California 95131-1316
MALAYSIA
U.SA
Scan Components (M) Sdn. Bhd.
"IEL: (408) 954-8474
FAX:
(408) 954-8399
(61) 2-6471545 (DO charge)
1n1eCtra
FAX:
213 Henderson Road
#Ol-'J1 Hend.""" Industrial Park
Singapore 0315
1EL: (65) 2710016
FAX: (65) 2714112
ISRAEL
761·B,1al .. SultanAzlan Shah
11900 SungaiNibong
:reDang
1EL: (60) 4-835136
FAX: (60) 4·836320
1li....
4. Hayctzira Street
Ind. Zone - POB 2436
MEXICO
~ANA431oo
TEMIC Mexlcana
1EL: (972) 9 917 277
c/o AEG Mexicana SA de C.V.
Prot Calle 16No.S3
San Pedro de los Pinos
FAX:
(972) 9 982 616
JAPAN
1EMIC1ap. .
c:/oAEGJapanUd.
Sbuwa No.2 Kamiya-Cho
3-18-19'lbranomon
Minato-Ku, 'lOkyo lOS
1EL: (81) 3·5562-3321
FAX:
(81) 3·5562-3316
Nippon Siliconix, inc.
1-1 Uobisaiwal-Cbo,
2-Cbomo CbIyoda·Ku
1bkyo 100
"IEL (81) 3 3506-3696
1LX: 1·23548
FAX: (81)33506.3499
01180 M..Ioo, D.R
1EL: (52) 5n 77 88 33
FAX: (52) 5n 72 88 53
Arlington (76006)
Ion Associates Inc.
2221 E. Lamar, Ste.lSO
"IEL: (817) 695-8000
FAX:
(817) 695-8010
Ion Associatel Inc.
Valle de Los Pinos #7
Frace Wlc Del Paraiso
'Ilanincpantia, EdoDe Mexico
54060
1EL: (521) 5·398-3190
FAX:
(521) 5·398-3274
QuadRep Marketing (S) Ftc. Ltd
1 Marine Parade Central
#12-05 ParkwayBui1dcrs' Centre
1544
1EL: (65) 3461933
FAX:
(65) 3461911
Scan 'll>obnology (S) Pte Ltd
50 KallangBahru #04-01/03
Kallang Basin Industrial Estate
1233
1EL: (65) 2942112
FAX: (65) 2961685
SOUTH AFRICA
Ill_olink (l"IY) Ltd.
EO, Box 1020
Capotown8000
1EL: (27) 21·5350
TIX: 5·27320
FAX: (21) 419-6256
TAIWAN
1EMIC
6/F Room B, No. 297, Sec '2
Ho-l'in East Road
'nUpei City,R.O.C.
1EL: (886) 2755.6108
FAX: (886) 2 755-4777
Djnamar -WW.. Co. Ltd.
13th Floor, 186 Nanking East
Section 4
PUERTO RICO
'Ddpei 10570, R.O.C.
1EL: (886) 02 5775670
1·1 Ucbisaiwai-Cho 2 Chrome
MEClCaribo
FAX:
Cbiyocla·Ku,lbkyo 100
"IEL lbkJ'o: (81) 3·3506·3492
1LX: 1·23548
FAXlbkJ'o: (81) 3·3506-3499
P.O. Box5038
eoguasOO726
"IEL: (809) 746-9897
FAX: (809) 746-9441
Sec Scan 'lCc:hnology. Singapore
lOMEN Ecctronics Corp.
(886) 02 5775867
THAILAND
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