2102141 001_B_9489_Flexible_Disk_Drive_Technical_Manual_Dec1979 001 B 9489 Flexible Disk Drive Technical Manual Dec1979
2102141-001_B_9489_Flexible_Disk_Drive_Technical_Manual_Dec1979 2102141-001_B_9489_Flexible_Disk_Drive_Technical_Manual_Dec1979
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1
B9489
FLEXIBLE DISK DRIVE
TECHNICAL
MANUAL
INTRODUCTION
AND
OPERATION
2
FUNCTIONAL
DETAIL
3
. CIRCUIT
4
ADJUSTMENTS
5
MAINTENANCE
PROCEDURES
6
INSTALLATION
PROCEDURES
7
8
9
Burroughs
10
m
A
FIELD ENGINEERING
FIELD ENGINEERING PROPRIETARY DATA.
The information contained in this document is proprietary to Burroughs Corporation. The information
or this document is not to be reproduced. shown, or disclosed outside Burroughs Corporation without
written permission of the Patent Division.
This material is furnished for Burroughs Field Engineering Personnel. and is not furnished to customers
.
except under special License Agreement..
THIS DOCUMENT IS THE PROPERTY OF AND SHALL BE RETURNED TO BURROUGHS
CORPORATION. BURROUGHS PLACE, DETROIT~ MICHIGAN 48232.
F.E. Dist.
Code~
Printed In U.s. America
December 1979
(\
B
c
For Library Binder 424
Form 2102141-001
Burroughs believes that the information described in this
manual is accurate and reliable, and much care has been
taken in its preparation. However, no responsibility, financial
or otherwise, is accepted for any consequences arising out of
the use of this material. The information contained herein is
subject to change. Revisions may be issued to advise of such
changes and/or additions.
Correspondence regarding this document should be addressed directly
to Technical Documentation Department, Technical Information Organization, Burroughs Machines limited, Cumbernauld, Glasgow, Scotland,
G680LN.
ii
PUBLICATION
CHANGE
NOTICE
Bu.rronghs
2102141-002
peN No.: ___________
- - - - - - - - - Date: _ _J_an_ua_ry_l_9_80_ _ _ _ __
Publication Title: B 9489 Flexible Disk Drive Technical Manual
Other Affected
Publications:~N_on_e_ _ _ _ _~~_~_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _~
____N_o_n_e_____________________________________________________________________
Super~des:
Description
This Publication Change Notice proVides additional information regarding the Preventive Maintenance Guide.
Remove the following pages :
Add the following pages :
iii & iv
5-1 & 5-2
iii & iv
5-1 & 5-2
Retain this PCN as a record of changes made to the basic publication.
FIELD ENGINEERING PROPRIETARY DATA
The information contained in this document is proprietary to Burroughs Corporation. The information or
this document is not to be reproduced, shown, or disclosed outside Burroughs Corporation without written
permission of the Patent Division.
This material is furnished for Burroughs Field Engineering Personnel, and is not furnished to customers
except under special License Agreement.
THIS DOCUMENT IS THE PROPERTY OF AND SHALL BE RETURNED TO
BURROUGHS CORPORATION, BURROUGHS PLACE, DETROIT, MICHIGAN 48232.
F.E. DiSI.,
Code
SO
For Library Binder 424
1...._ _ _ _ __
Printed in U.S. America
iii
Form 2102141
PUBLICATION
CHANGE
NOTICE
Bu.rrou.ghs
peN No.: _ _2102141-001
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
Date: __De_c_e_m_b_er_19_7......;9_ _ _ _ __
Publication Title: _..4:B!:...I9~4.:.:;8~9....!iFll..t.e:...!X1.!:t.·b~1~e...t:::D~isk~Dt;::;,jnu.·vue~t~e~c!.!:ihnwi~cal~Mwan~u_alk....__ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
Super~des:
___N
__o_ne______________________________________________________________________
Description
this Publication Change Notice provides Section 4, Adjustments
Remove the following:
Insert the following:
Title
A Page
v thru vi
4-1 thru 4-2
ii
iii thru viii
Title
4-1 thru 4-10
Retain this PCN as a record of changes made to the basic publication.
FIELD ENGINEERING PROPRIETARY DATA
The information contained in this document is proprietary to Burroughs Corporation. The information or
this document is not to be reproduced, shown, or disclosed outside Burroughs Corporation without written
permission of the Patent Division.
This material is furnished for Burroughs Field Engineering Personnel, and is not furnished to customer.
except under special License Agreement.
THIS DOCUMENT IS THE PROPERTY OF AND SHALL BE RETURNED TO
BURROUGHS CORPORATION, BURROUGHS PLACE, DETROIT, MICHIGAN 48232.
F.E. DiSI.,
C()de~.
BD
For Library Binder 424
_____..I
Printed in U.S. America
Form 2102141-001
iii
Burroughs - B 9489 Flexible Disk Drive Teclmical Manual
LIST OF EFFECTIVE PAGES
iv
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Title
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2-1 thru 2-25
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3-10
4-1 thru 4-10
5-1
5-2
5-3 thru 5-4
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1-1 thru 1-12
2-1 thru 2-25
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3-1 thru 3-9
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4-1 thru 4-10
5-1 thru 5-4
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Burroughs - B9489 Flexible Disk Drive Technical Mariual
TABLE OF CONTENTS
Section 1
INTRODUCTION AND OPERATION
General Description. •
Configurations.
Applications .
Major Assemblies.
Motor and Spindle
Receiver. . • . .
Stepper Motor and Leadscrew. . .
Carriage. . .
Pressure Pads . .
Magnetic Heads
Recording Mode .
Printed Circuit Board
Operation . . . . .
Flexible Disk (Mini-Disk)
Sector Configuration. .
Data Configuration
Recording Mode . . . . . .
Functions
Seek . .
Write. . .
Read . .
Physical and Electrical Characteristics •
Physical. . . . . .
Electrical . . . . .
Recording Characteristics
Format. .
Data Access.
Flexible Disk .
Jacket . . .
Disk Handling. . .
Operating Procedures . . . .
Indicators and Control. .
Electrical Interconnections, Host to
Master Interface. . . . . . .
Master DC Supplies. . . . ...
Master Drive to Slave Drive Interface
Line Power and Grounding. . . . .
Section 2
.FUNCTIONAL DETAIL
Positioner . . . .
. • •
General Description. . . • .
Mechanics ,; • . . . • . .
..•.
Carriage. . .
Magnetic Heads . • .
Electronics..
.•••
File OP. . .
Address Latches .
Address 00 Detector. .
Illegal Address. . . • . .
Current Address Counter and Comparator
2102141-001
Page
1.... 1
1-2
1-2
1-3
1-3
1-3
1-3
1-4
1-4
1-4
1-4
1-5
1-5
1-5
1-5
1-6
1-6
1-7
1-7
1-7
1-7
1-7
1-7
1-7
1-7
1-7
1-7
1-8
1-8
1-8
1-9
1-9
1-9
1-10
1-10
1-10
2-1
2-1
2-1
2-2
2-2
2-2
2~3
2-4
2':"'"4
2-4
2-4
Section 2 (Continued)
. Stepper Motor Drivers .
Stepper Motor Register.
Stepper Motor.
••.• • •
Positioner Clock. .
Clock Control. .
Direction Control. .
Position Settled .
Head Select. . . . .
Head Load Solenoids and Tiler .
Index and Sector Pulses. .
Write. . . . .
General. . . .
Write Clock. . • . .
Write Data Encode .
Unit Selection. . .
Write Inhibit • . .
Write and Erase Drivers. .
Read Head Select. . . . . •
Read Channel. .
. • • •
Digital Fi Iter. •
. . • •
Data Decode .
General. . •
Selection . . .
Standardizer and PLL •
PLL . . . . . •
Read Enable Delay .
Read Clock.
Data Window
Section 3
CIRCUIT DETAIL
General. . .
Section 4
ADJUSTMENTS
Introduction . .
Special Tools . .
Align me n t Pisk
. . • .
B 80 Hex Keyboard Collated Table • •
Alignment Track Selection using B 80 MTR
Alignment Meter Operating Instructions
Adjustments • . • • • . • . •
Backlash Nut Adjustment.. . • . .
Track to Track Alignment Che ck
Track to Track Alignment Adjustment.
Circumferential Alignment . . . •
Track 00 Adjustment • . • • • .
Phase Locked Loop and Data Windows.
DTM ·1000 or BDM 1250
DTM 1000 .
. .
BDM 1250. . . . . . . . . .
Section 5
MAINTENANCE PROCEDURES
Removal and Replacement Procedures. .
Page
2-6
2-6
2-8
2-8
2-9
2-9
2-9
2-11
2-11
2-11
2-15
2-15
2-16
2-16
2-18
2-18
2-18
2-18
2-18
2-21
2-21
2-21
2-21
2-23
2-23
2-23
2-25
2-25
3-1
4-1
4-1
4-1
4-1
4-1
4-2
4-2
4-2
4-3
4-3
4-5
4-7
4-7
4-8
4-9
4-9
5-1
v
Burroughs - B9489 Flexible Disk Drive Technical Manual
TABLE OF CONTENTS (Continued)
Section 5 (Continued)
Fascia . . .
Receiver. . . . • . .
Stepper Motor and Carriage .
Head Solenoids
I..arnps . . . . . . . . . . .
Pressure Pads . . ..'
Drive Belt . .
Page
5-1
5-1
5-1
5-2
5-2
5-2
5-2
page
Section 5 (Continued)
Preventive Maintenance Fuide. . . . .
Fault Finding. . . . . .
Recovery of Conta~inated Disks.
Certified Disks. . . . . . . . . .
Section 6
INSTALLATION PROCEDURES
Installation Procedures. . .
5-2
5-2
5-2
5-2
6-1
LIST OF ILLUSTRATIONS
Figure
Page
Figure
2-16
2-17
2-18
2-19
2-20
2-21
2-22
Read Block Diagram.
Read Channel Test Points .
Schematic - Read Channel
PLL/Data Relationship.
Data Decode Timing.
Schematic - Read Data Decode .
Worst Case Peak Shift
2-21
2-21
2-22
2-23
2-23
2-24
2-25
3-1
3-2
3-3
3-4
3-5
Logic Example
SN7400 QJ.lad 2-Input NAND Gate .
SN7402 Quad 2-Input NOR Gate
SN7404 HEX Inverter
~
SN7405 HEX Inverter with Open
Collector Output
SN7410 Triple 3-Input NAND Gate.
SN7420 Dual 4-Input NAND Gate .
SN7426 Quad 2-Input High Input
Voltage Interface NAND Gate with Open
Collector Output
SN7438 Quad 2-Input Interface NAND
Gate with Open Collector Output .
SN74132 Quad 2-Input NAND Gate
-Schmitt Triggers
SN7427 Triple 3-Input NOR Gate
SN75452 Dual NAND Driver .
SN7474 Dual D-type Flip Flop
ITT96015D Retriggerable Monostable
Multivibrator.
9602 Dual Retriggerable, Resettable,
Monostable Multivibrator.
8284 Hexadecimal Up/Down Counter.
9308 Dual 4-Bit Latch .
9322 Quad 2-Input Multiplexor .
9324 5-Bit Comparator.
733 Differential Amplifier.
3-1
3-2
I-I
1-2
1-3
1-4
1-5
1-6
1-7
1-8
1-9
1-10
1-11
1-12
1-13
1-14
1-15
1-16
1-17
Complete Unit.
Master/Slave Configuration.
Major Assemblies.
Stepper Motor and Leadscrew.
Carriage Assembly
Diagrammatic Recording Head
Magnetic Head Layout .
Head Schematic
Track Format (Upper Side)
Track Format (Lower Side)
Sector Configuration
Encoding Comparison
Disk.
Jacket
Operator Controls
Common Electronics
Block Diagram.
1-1
1-2
1-2
1-3
1-4
1-4
1-5
1-5
1-5
1-5
1-6
1-6
1-8
1-8
1-9
1-11
1-12
2-1
2-2 .
2-3
2-4
Positioner Mechanics (Top View)
Carriage (Side View) .
Positioner Electronics Block Diagram .
Schematic - Address Counter/
Comparator
Schematic - Positioner Clock and
Stepper Motor Drivers.
,
Stepper Motor.
Positioner Clock Start-Up .
Schematic - Head Load Control.
Schematic - Index/Sector J:lulses.
Index and Sector Generation.
Write Block Diagram.
Write Timing
Schematic - Write Data Encoder.
Schematic - External Interface Logic.
Schematic - Write Driver .
2-1
2-2
2-3
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
vi
3-6
3-7
3-8
3-9
3-10
2-5
2-7
2-8
2-8
2-12
2-13
2-14
2-15
2-16
2-17
2-19
2-20
3-11
3-12
3-13
3-14
3-15
3-16
3-17
3-18
3-19
3-20
Page
.'
3-~
3-2
3-3
3-3
.3-3
3-3
3-4
3-4
3-4
3-4
3-5
3-5
3-5
3-6
3-6
3-6
3-6
3-7
Burroughs - B 9489 Flexible Disk Drive Technical Manual
LIST OF ILLUSTRATIONS (Continued)
Figure
3-21
3-22
3-23
3-24
3-25
3-26
3-27
I
4--1
4--2
Page
Figure
710 High Speed Differential Comparator
7496 5-Bit Shift Register
NE 562B Phase Locked Loop.
TIL 31 or 1A48B Photo Emissive Diode
TIL 81 or 2B50B Silicon Photo Transistor
Delay Une 300ns .
High Power Transistor 2N6055 or
TIP640.
3-7
3-7
3-8
3-9
3-9
3-9
4--3
4--4
Backlash Nut Adjustment.
Locking Plate Clearance
4--2
4--3
3-9
Page
4--6
4--5
4--6
4--7
4--8
Oscilloscope Wave Form
Component Layout Showing the Position of Recommended Test Point
Correct Waveform
Incorrect Waveforms
Unstable Waveforms
Data Window Adjustment .
5-1
5-2
5-3
Stepper Motor and Carriage Assembly .
50/60Hz Conversion.
Connection Block Diagram.
5-1
5-·2
5-4
4--6
4--8
4--8
4--8
4--9
LIST OF TABLES
Page
Table
1-1
1-2
2-1
3-1
4--1
4--2
5-1
2102141-001
Logic Interface Between Host System
and Master Drive . . . . .
DC Supplies to the Master Drive. .
Stepper Truth Table. .
Index of Modules.
PCB Test Points
1-9
1-10
2-6
3-1
4--1
I
4-2
5-3
vii
Burroughs - B9489 Flexible Oisk Drive Technical Manual
Sec. 1 Page 1
SECTION 1
INTRODUCTION AND OPERATION
GENERAL DESCRIPTION
The A/B 9489 Flexible Disk Drive provides a storage
capacity of 1 megabyte per disk. The disks are removable,
allowing unlimited off-line storage and easy transportation
of data between sites.
The disks are made from flexible mylar and are
coated with iron oxide on both sides. A protective envelope shields the disk from contamination. Data is recorded on both sides of the disk by two heads, one for
each side. The heads are mounted on a carriage that is
movable, so that the heads are positioned to one of the
88 concentric tracks on the disk. Movement of the
carriage is controlled by a stepper motor connec.ted to a
lead screw.
Writing or reading is accomplished with the head
that is in contact with the disk. To ensure contact, a pressUte pad presses· the disk against the head from the opposite
side of the disk. In order to reduce wear, the pressure pads
are retracted if the unit is not in use. Only one pressure
pad can be active at any time.
Each disk has 2 recording sides with 88 tracks on
each side. Each track contains 32 sectors with 180 bytes
of information in each sector.
Figure 1-1. Complete unit
For Form 2102141
Page 2
Burroughs - B9489 Flexible Disk Drive Technical Manual
Introduction and Operation
CONFIGURATIONS
APPLICATIONS
Two units of the Flexible Disk Drive are available:
Master Unit (A/B 9489-1)
Slave Unit (A/B 9489-2)
The master unit is connected to the system controller
(10 Control, Device Dependent Port) and contains additional electronics common to both units. The slave unit, if required, cannot function alone and connects to the master
unit. The slave unit obtains DC power from the master
unit.
MINI DISK UNITS
SYSTEM
.I
1/0 CABLE
I/O
CONTROL
SLAVE
MASTER
I
~
~
I
I
I
I
POWER
SUPPLY
DC
AC
A/B 9489-1
A/B 9489-2
I
I
I
I
I
Random access makes the unit ideal for memory
expansion of small computer systems where programs and
software need to be read into memory at frequent intervals.
In such a system the master disk would be used to contain
system software and program and the slave would be used
to record users files such as inventory, payroll, and accounting information.
In this application, the systems disk is a semipermanent fixture while the user selects the second disk
according to the programs required to run. Other uses are
as follows:
Software/program transportation.
Collection of diagnostic information.
Data collection.
I
Figure 1-2. Master/Slave Configuration
STEPPER MOTOR
Each sector of the disk ( 180 bytes) has a unique
address consisting of a side track and sector number. Any
sector can be accessed by moving the head to the correct
track and then waiting until the correct sector arrives under
the head. This enables any sector to be accessed independently and is known as RANDOM ACCESS. Random
access permits selective reading or writing of records within
a file without having to read or write the entire file (as is the
case with magnetic tape).
MOTOR
UPPER PRESSURE
PAD SOLENOID
MAGNETIC HEADS
AND PRESSURE PADS
INDEX/SECTOR
TRANSDUCER
WRITE LOCKOUT
TRANSDUCER
Figure 1-3. Major Assemblies
Burroughs - B9489 Flexible Disk prive Technical Manual
Sec. 1 Page 3
Introduction and Operation
MAJOR ASSEMBLIES (Refer to figure 1-3).
4.
MOTOR AND SPINDLE
5.
The ac motor (115Vac) drives the spindle at 370
rpm via a pulley and self tensioning belt. The purpose of
the spindle is to rotate the disk and it is cone shaped to
center the disk as the disk is engaged with the spindle.
Conversion from 50Hz to 60Hz is achieved by reversing
the pulley on the motor shaft.
RECEIVER
The receiver accepts and holds the disk in the unit.
It has two positions, up when the door is open, and down
when the door is closed. When the door is open and the
receiver is up, disks may be inserted or extracted. When
the door is closed and the receiver down, the disk is not
accessable to the operator and is in use by the unit.
The receiver operates as follows:
1.
2.
3.
Accepts the disk when it is inserted.
Lowers the disk when the door is closed.
Engages the disk with the spindle by means of
the annulus.
6.
7.
8.
The index/sector transducer provides timing
pulses for use of the controller.
.
The write inhibit transducer detects, disks
which are wri te protected.
Provides a mounting for the upper pressure
pad solenoid.
Swi~ches the motor ON when the receiver
lowers and OFF when the receiver lifts.
Lifts the upper head clear of the disk when in
the up position to enable easy insertion and
extraction of the disk.
STEPPER MOTOR AND LEADSCREW
The purpose of the stepper motor and lead screw is
to move the carriage to the required track. The stepper
motor is three phase (3 windings) with 15 degrees per step.
If the windings are energised in the correct sequence the
motor will step in one direction and if the sequence is reversed, the motor will step in the other direction. The lead
screw is an integral part of the motor and is a "Three Start
Leadscrew". Each step of the motor corresponds to a
1/64 inch movement of the carriage.
Figure 1-4. Stepper Motor and Leadscrew
For Form 2102141
Page 4
Burroughs - B9489 Flexible Disk Drive Technical Manual
Introduction and Operation
CARRIAGE
The purpose of the carriage is to hold the heads in
the correct position. The carriage is threaded on the lead
screw so that as the lead screw rotates, the carriage moves
towards, or away from, the spindle. An alignment rod
prevents rotation of the carriage with the lead screw.
The backlash nut ensures that all play between the
leadscrew and carriage is taken up in the direction of the
spindle.
The vane interrupts the track 00 transducer when
the carriage is situated at track 00. This is used to calibrate
the electronics when a disk is first inserted and each time
track 00 is accessed.
The lower magnetic head is bonded to the body of
the carriage. The upper magnetic head is bonded to an arm
which can move vertically. This arm is lifted when the receiver is raised to allow the disk to pass between the heads.
When the receiver is lowered, the arm is returned to its
position by spring tension.
PRESSURE PADS
The magnetic head pressure pads are mounted on
the carriage and press the disk against the head to ensure
good contact. A force of 11 grams is provided by the
torsion springs. The pressure pads are only active when
their respective solenoids are selected. Only one solenoid
can be picked at any time. (A function of the electronics).
When a head is selected, the pressure pad solenoid on the
opposite side of the disk is energised, allowing the pressure
pad to push the disk against the selected head. 5 revolu-
tions after the read or write operation the pressure pad is,
disengaged if no further commands are received. This
reduces disk and head wear.
MAGNETIC HEADS
The magnetic heads contain 2 windings, one for
writing and reading and'one for erase. Writing is achieved
by passing current through the write/read winding. When
current passes through the winding, a magnetic flux flows
in the core. In the area of the gap the region of least reluctance to the magnetic flux is through the disk. Flux
passing through the disk magnetises it permanently, completelysaturating it. (refer to figure 1-6). By reversing the
current in the winding, the direction of magnetisation is
reversed. A change in direction of magnetisation is known
as a "flux reversal."
By writing flux reversals in a specific pattern, data
can be recorded.
RECORDING MODE (Refer to the paragraph)
During read, the flux reversals passing under the head
flow through the core and induce a current in the winding.
The induced current is amplified' and decoded into the
original data. Read is non-destructive and the data can be
read repeatedly.
The purpose of the erase winding is to magnetise a
band on each side of the data. This erases any flux left from
previous writing operations and provides a "guard band".
If old data was allowed in this position a slight misposition
of the head would pick up both sets of data and result in
errors.
WINDING _ _~"
MAGNETIC
CORE
FLUX
MAGNETIC
COATI NG
DISK MOVEMENT
Figure 1-5. Carriage Assembly
DISK
Figure 1-6. Diagrammatic Recording Head
1
Burroughs - B9489 Flexible
Dis~
Drive Technical Manual
Sec. 1 Page 5
Introduction and Operation
Refer to figure 1-7 The recorded data is approximately 0.0104 inch wide with a guard band of 0.0052
inch on each side. This type of head is known as a single
gap, tunnel erase head.
The cores are mounted in a ceramic shoe for long
life. Figure 1-8 is an electrical schematic of the magnetic
head.
PRINTED CIRCUIT BOARD
The master printed circuit board contains the
following:
Interface electronics
1.
2.
Positioner electronics
3.
Index/Sector pulses
Write encoding
4.
5.
Write amplifier
Read amplifier
6.
Read decoding
7.
Write lockout
8.
The slave printed circuit board contains the following:
1.
Positioner electronics
2.
Write amplifier
3.
Write lockout
4.
Read amplifier
5.
Index/Sector pulses
OPERATION
. FLEXIBLE DISK (MINI-DISK)
Data is recorded on the flexible disk on 88 concentric
tracks. The lower magnetic head is offset relative to the
upper magnetic head in order to make space for the pressure pads and the distance of the tracks from the center of
the disk is different on the upper and lower surface. (refer
to figures 1-9 and 1-10).
The two tracks in line with the heads at anyone
time (one on the upper surface and one on the lower) is
known as a CYLINDER.
Sector Configuration
Each track contains 32 sectors with 180 bytes of
data per sector. The sectors are marked by holes on the
disk (refer to figure 1-9)". A transducer detects these
holes as the disk rotates and applies pulses to the controller. The sectors are numbered 0 to 31 and sector 0 is
marked by an index hole immediately preceding the sector
mark. The index hole is located midway between the sector
31 and sector 0 holes.
DIRECTION OF DISK MOTION
)IIIr
--l---BBDJ~~~~ifi~
0.0104
INCHES
NOMINAL
CORE
:
--r---
CORE
GAP
120~INCH
DATA
I
DJ--!~;;~BAND
ERASE
GAPS
f- --- -
ERASE
WINDING
READ/WRITE -..-,-.....,....-.,-WINDING
CENTER
TAP
- .0052
Figure 1-7. Magnetic Head Layout
Figure 1-9. Track Format (Upper Side)
Figure 1-8. Head Schematic
Figure 1-10. Track Format (Lower Side)
For Form 2102141
Page 6
Burroughs - B9489 flexible Disk Drive technical Manual
Introduction and Operation
Data configuration
The data within one sector consists of the following:
(refer to figure 1-11).
1.
2.
3.
4.
5.
6.
Preamble (32 bytes of zeros)
Sync byte (2 bytes)
Address (2 bytes)
Data (180 bytes)
Parity byte (1 byte)
Postamble (remainder of sector, bytes of zeros)
Recording Mode
The recording mode used is Miller Frequency Mode
(M.F.M.) A comparison of the various recording medes i~
illustrated in figure 1-12. M.F .M. is a self clocking mode
(that is, it does not require a separate clock track) and it
enables approximately twice as much data to be stored for
the same flux-change density.
M.F .M. consists of a flux-change at the edge of a
data cell for a zero and a flux change in the centre of a
cell for a one. If a zero follows a one, a fluxchange is not
recorded. This is recognised and corrected during read and.
the fluxchange density is minimised.
POST AMBLE
180 DATA BYTES
T:rl' !
BIT~
3 BITS ZERO
PARITY BYTE
MOD 2 SUM OF
CORRESPONDING BITS
OFALL DATA BYTES
SECTOR ADDRESS
ONE BIT HEAD ADDRESS
7 BIT CYLINDER ADDRESS
Figure 1-11. Sector Configuration
o
0
1 10
0
o
0.0.0
I
t
RZ
I
NRZ
I
I
I
NRZl
~~~~
_ _":"---L._"':'-~
I
I
I
I
I
I
I
I
I
PE
DFM
MFM
Figure 1-12. Encocling Comparison
I
t
Burroughs - B9489 Flexible Disk Drive Technical Manual
Sec. 1 Page 7
Introduction and Operation
FUNCTIONS
The Seek function is the command from the controller to the unit to move the heads to a new track. The
seek function sequence is as follows:
1.
2.
3.
4.
A new track address is applied to units.
A seek pulse is applied from the controller to
the master or slave.
The carriage moves to a new track and settles.
The POSITION SETTLE signal is applied to
the controller.
POSITION SETTLE is the signal that a write or read
operation may begin. Overlapping seek is permitted and
consists of performing a seek on one unit while a seek is in
progress on the other unit.
The read operation ends when READ ENABLE from
the controller goes false. READ ENABLE is made true
shortly after a sector pulse so that the Phase Locked Loop
can lock in on the preamble prior to the address and data.
READ ENABLE is made false at the end of the sector.
PHYSICAL AND ELECTRICAL CHARACTERISTICS
Physical
Length
Width
Height
Weight
Shipping weight
17.25 inch
10 inch
5.62 inch
201bs.
231bs.
(43.8 cm)
(25.4 cm)
(14.3 cm)
( 9.07 kg)
(10.43 kg)
Electrical
Write
A write is initiated from the controller by making
WRITE ENABLE true. If the Write lockout hole on the
disk jacket is covered, the WRITE ENABLE signal enables
the write and erase drivers on the selected drive.
NRZ data (WRITE OAT A) is supplied to the drive
in synchronisation with the OAT A CLOCK which is
generated in the disk drive.
The NRZ data is converted to M.F .M. in the common
electronics (see figure 1-16).
AC Power
120V + 6%
-10%
50-60Hz
0.3 A per unit
DC Power
+ 5V ± 10%
2.0 A per master unit
1.8 A per slave unit
+ 12V ± 10% 0.3 A per unit
- 12V ± 10% 0.3 A per unit
+ 24V ± 10% 2.25A per unit
Heat dissipation 75W
RECORDING CHARACTERISTICS
The MFM data is then transferred to the selected
unit where it controls the direction of current flowing
through the head.
The erase coils are also energised to provide a "guard
band" of erased disk on either side of the data written.
The formatting of the data into preamble, address
data, parity bits etc. is a function of the controller.
As the disk passes over the selected head, the flux
reversals induce an alternating current into the coil of the
head. This is amplified, filtered for noise and digitised.
The digitised read information from the selected unit
is applied to the common electronics portion of the PCB.
On receiving READ ENABLE from the controller an
oscillator locks onto the data providing a data sampling
window and a READ CLOCK. The purpose of this oscillator (phase locked loop) is to enable translation from
MFM to NRZ.
The READ OAT A is then applied to the host, synchronised with READ CLOCK.
Format
Number of cylinders per disk.
Number of sides per disk
Number of tracks per disk
Sectors per track
Sectors per cylinder
Sectors per disk
Data bytes per Sector
Data bytes per Surface
Data bytes per disk.
Tracks per inch
Bit density (Bits per inch)
Recording mode
88
2
176
32
64
5,632
180
506,880
1,013,760
64
4,774 max.
M.F.M.
Data access
Disk rotation speed
Average latency
Track to track
Maximum access time
Data transfer rate
370 rpm
80ms
47 ms
516 ms
375 K bits/second
For Form 2102141
Page 8
Burroughs - B9489 Flexible Disk Drive Technical Manual
Introduction and Operation
FLEXIBLE DISK
2.
The flexible disks are made from Mylar, or a similar
material, 0.003 inch thick. The disk is coated with a 110
microinch thick layer of iron oxide/polymer. Figure 1-13
illustrates the dimensions of the disk.
3.
4.
5.
Jacket
6..
Figure 1-14 illustrates the dimensions of the disk
jacket. The inside of the jacket is covered with cleaning
tissue to keep the disk clean.
7.
8.
Disk Handling
9.
The disk should be used under the following environmental conditions:
Temperature:
50°F to 125°F (10°C to 51.6°C)
Humidity:
8% to 80%
10.
11.
12.
The disk should be stored under the following conditions:
Temperature:
30°F to 125°F (_1°C to 5 1. 6°C)
Humidity:
5% to 90% No moisture to be
present on the disk.
13.
14.
The following procedures and precautions should
always be observed in order to avoid damaging the disk.
if
15.
Always keep the disk in the envelope in the
ten pack box.
Always return the empty envelope to the ten
pack box.
Treat the disk as fragile and easily damaged.
Use a felt tip pen to write on the disk label (a
pencil or ball point pen will damage the disk).
DO NOT touch the magnetically coated (brown)
surfaces.
DO NOT leave the disk lying around on work
surfaces.
DO NOT put objects, including papers, on top
of the disk.
DO NOT expose .the disk to temperatures
above 125°F (51.6°C).
DO NOT allow the disk to become contaminated by tea, coffee, cigarette ash or similar
contamination.
DO NOT put a contaminated disk into a drive.
DO NOT attempt to load a disk into a drive
that is switched off. Damage to the center hole
may result.
DO NOT expose a disk to magnetic fields in
excess of 50 oersteds. Always remember that
tools can become magnetised.
DO NOT fit labels other than those supplied
in the ten pack box.
DO NOT handle the center hole of the disk.
Always put the disk back in the envelope when
out of the drive.
INDEX HOLE HALFWAY
~bl~~EN TWO SECTOR
/
25
\-
8.00 INCHES
32 SECTOR HOLES
0.05 INCH DIAMETER
SECTOR/INDEX HOLE
.
WRITE LOCKOUT HOLE
0.30 INCHES DIAMETER
0.057 INCHES
Figure 1-13. Disk
Figure 1-14. Jacket
Sec. 1 Page 9
Burroughs - B9489 Flexible Disk Drive Technical Manual
Introduction and Operation
OPERATING PROCEDURES
Table 1-1. Logic Interface Between Host System And
Master Drive
Indicators and Control (refer to figure 1-15)
Door Release Bar
Depressing the release bar unlatches the door and
receiver for disk insertion. Closing the door securely automatically latches it shut.
Write Enable Indicator
When the Write Enable (red) indicator is illuminated
it indicates that the disk in the unit can be written on and
that old data will be destroyed. When the red indicator is
out it indicates that the disk caEnot be written on and data
is protected.
File Operational Indicator (File Op.)
When the File Op (blue) indicator is illuminated it
indicates that a disk is inserted, up to speed and is in an
operational state.
Disk Insertion
1.
2.
3.
4.
5.
Ensure that the power is ON.
Press blue Door Release Bar to open the door.
Remove disk from envelope.
Insert the disk into the drive, head access slot
first, with the label away from the release bar
(see figure 1-14 and 1-15).
When the disk is correctly inserted close the
door. When the blue File Op indicator is
illuminated the unit is ready.
NOTE:
If the disk is inserted the wrong way, the File
Op. indicator will not illuminate.
SIGNAL
PIN
-"--
GROUND
PIN
42
47
'11
15
17
50
49
13
6
7
43"
46
44
45
4
40
39
34
36
35
37
41
2
32
30
-12
31
16
33
48
14
25
8
26
29
27
28
5
23
22
18
20
19
21
24
3
Cabinet Select/
Unit Select/
Head Select/
Address-1/
Address-2/
Address-4/
From Host System
Address-8/
Address-16/
Address-32/
Address-64/
Seek/
Write Enable/
Write Data/
Read Enable/
Read Data/
File Operational/
Positioner Settled/
Write Inhibit/
Index/
From Disk Drive
Sector/
Illegal Address/
Seek Incomplete/
Data Clock/
DOOR
~"
Disk Extraction
1.
2.
3.
4.
5.
Wait until the system has completed processing
with the disk.
Press Door Release Bar on the unit.
Extract the disk.
Immediately return the disk to its envelope.
Close the door of unit.
ELECTRICAL INTERCONNECTIONS
HOST TO MASTER INTERFACE
Table 1-1 contains the logic interface signals between
the host system and the master drive. Each signal line is
formed into a twisted pair with its ground return.
CABINET SELECT / - is used to select one of the two
drive cabinets. When CABINET SELECT I is set to logic 1
cabinet 0 is selected. When CABINET SELECT/is set to
logic 0 cabinet 1 is selected.
III I IIIl
J
DOOR RELEASE BAR
WRITE ENABLE INDICATOR·
(RED)
FILE OPERATIONAL INDICATOR
(BLUE)
Figure 1-15. Operator Controls
For Form 2102141
Page 10
Burroughs - B9489 Flexible Disk Drive TeGhnical Manual
Introduction and Operation
UNIT SELECT/ - is used to select either the master drive
or the slave drive. When UNIT SELECT/ is set to logic 1
the master drive is selected. When UNIT SELECT/is set to
logic 0 the slave drive is selected.
HEAD SELECT/ - is used to select one of the two heads.
When HEAD SELECT/is set to logic 1 side 0 of the disk
is selected. When HEAD SELECT/ is set to logic 0 side 1
of the disk is selected.
ADDRESS-I/ through ADDRESS-64/ - select the
cylinder address. The cylinder address is coded in binary.
When ADDRESS-I/ is set to logic 0 and all the other
ADDRESS signals are set to logic 1 cylinder 01 is addressed.
SEEK/ - is used to start a positioner movement to the
address selected by ADDRESS-I/ through ADDRESS-64/.
This signal also causes selection and mechanical loading of
the head selected by HEAD SELECT /. The positioner movement and head selection are started by SEEK/ changing
from logic 0 to logic 1.
SECTO R/ - signal pulses to logic 0 when a sector hole on
the disk is detected.
ILLEGAL ADDRESS/ - is set to logic 0 if the ADDRESS/
lines exceed decimal 87 when SEEK/ changes from logic 0
to logic 1.
SEEK INCOMPLETE/ -. is not used and is always set to
logic 1.
DAT A ·CLOCK/ - isused to strobe the data on the WRITE
DA T A/ and READ OAT A/ signal lines.
MASTER DC SUPPLIES
Table 1-2 contains the DC supplies to the master
drive. Each supply line is formed into a twisted pair with
its return. All DC returns are connected together on the
master drive.
Table 1-2. DC Supplies To The Master Drive
PIN
WRITE DATA/ - is the data tobe written onto the disk.
When WRITE DATA/ is set to logic 1 a data 0 is written
onto the disk. When WRITE DAT A/ is set to logic 0 a data
1 is written onto the disk.
READ DATA/ - is the data being read from the disk. A
data 0 bit from the disk will set READ DATA/ to logic 1.
A data 1 bit from the disk will set READ DAT A/ to logic O.
FILE OPERATIONAL/ - is set to logic 0 if a disk is in
the drive, the disk is rotating within 10% of full speed and
the positioner has recalibrated to track 00. If FILE OPERATIONAL/ is set to logic 1 all signals from the drive are
invalid.
POSITIONER SETTLED/ - is set to logic 1 when:
1.
2.
3.
FILE OPERATIONAL/ is set to logic 1,
The positioner is in motion after a SEEK/
signal, or,
A head solenoid is in motion after a SEEK/
signal.
WRITE INHIBIT/ - is set to Logic 0 if the disk in the unit
selected is write protected.
INDEX/ - signal pulses to logic 0 when the index hole on
the disk is detected.
+24V
+24V Return
±12V Return
-12V
+12V
+24V
+ 5V Return
+5V
-12V
1
2
3
4
5
6
7
8
9
WRITE ENABLE/ - is used to enable writing data onto
the disk. When WRITE ENABLE/ is set to logic 0 data is
written onto the disk.
READ ENABLE/ - is used to enable reading data from
the disk. When READ ENABLE/ is set to logic 0 data is
read from the disk.
LINE
MASTER DRIVE TO SLAVE DRIVE INTERFACE
All DC, ground and logic signals are transferred from
master drive to slave drive on one 40-way cable.
Figure 1-16 shows the master drive to slave drive
interface. READ OAT A and WRITE DATA are both encoded in M.F.M.
LINE POWER AND GROUNDING
The host system must provide line power to both
the master drive and the slave drive.
Pin
1.
2.
3.
4.
Not Connected
Not Connected
Line
Neutral
A ground stud is provided adjacent to the line
connector.
CAUTION
ON EACH DRIVE THIS GROUND STUD MUST
BE CONNECTED TO THE HOST SYSTEM.
Burroughs - B9489 Flexible Disk Drive Technical Manual
Sec. 1 Page 11
Introduction and Operation
+12V +24 +5 GND -12V
FROM
CONTROLLER
ADD1/
ADD2/
ADD4/
ADDS/
ADD16!
ADD 32/
ADD64!
SEEK/
WRITE ENABLE!
UNIT SELECT/
HD SELECT!
CAB SELECT/
READ ENABLE/
WRITE DATAl
...,
N
....,
ILL ADDI
FILEOP/
WRITE INHIBIT/
RD EN/
ILL ADD
FILE OP
WRITE INHIBIT
POSITION SETTLED
SECTOR/
INDEX/
MFM RD
SLAVE CONNECTED
ADD 1 THRU 64
SEEK
WRITE ENABLE
UNIT SELECT
MFM WRITE
READ ENABLE
HEAD SELECT
VOLTAGES
RD EN/
ILL ADD
FILE OP
WRITE INHIBIT
POSITION SETTLED
SECTORI
INDEX I
MFM READ
FROM
SLAVE
TO
SLAVE
FROM
MASTER
POSN SETTLED/
TO
CONTROLLER
ADD 1 THRU 64
SEEK
WRITE ENABLE
UNIT SELECT
MFM WRITE
RD ENABLE
HD SELECT
SECTOR/
tNDEX/
SEEK INCOMPLETE/
DATA CLOCKI
RD DATA/
z
~
C
C
~
W
a: w w
~
(.)
0
-J
(.)
l- I- w
I-
a: a:~ a:
~
2
~
z ~ N
a:
C ~
W
a:
~
(.)
Z
0
a: ~
<
C
C
C
..J
(.)
2
c a:
2
a:
LL
TO
MASTER
C
LL
~
XTAL
OSCILL
CLOCK
WRITE
ENCODf
DATA AND
CLOCK
DECODE
PHASE LOCKED
LOOP
Figure 1-16. Common Electronics
For Form 2102141
r - ' - - ' - - --'---'--'
• EXTER'NAll
ADD 1 - - - - - - t
ADD 2 - - - - 1
POSITIONER
LOGIC
ADDRESS
OU
POSITIONER
DRIVE
I
.
CHASSIS
ADD4----I
ADD 8 - - - - - - t
ADD 1 6 - - - - i
SEEK
ADD 3 2 - - - - t
SECTOR
ADD 6 4 - - - - t
HD.SELT----t
POS SETTD
SECTOR - - - - 1
R
E
C
E
INDEX
I
V
E
INDEX - - - - - I
IND /SEC
AND
UP SPEED
LOGIC
R
S
A
N
o
REV
COUNTER
SEEK RD EN
WRT EN
HD SELT
POSITIONER SECTION
T
RD EN - - - - I
WRTEN-----I
WIH------4
WRT DATA ----4
M
I
T
T
DATA CLK
DATA CLK
R
S
CLOCK
SELECTOR
CRYSTAL
OSC
---1
t-----\\-RTN
ILL ADD
RD DATA---I
t-----\\-RTN
UNIT SELT
I/O
RD DATA
r-------,
I
I------t
I
SOLENOID
______ -.JI
MFM
MFM
DECODER
ENCODER
I
I
II..
II..
DIGITAL
FILTER
I.
'-'
jRo"'-W-R--r-S-EC--rI-O-N-' - - .
WRT
DRIVER
I
.J
----.----._--.---.----. __ .----.
R
C-O-M-M-ON-EL-EC-T-R-O-N IC
-S-S-EC-T-IO-N-',
A
N
S r-_W_R_T_D_A_T_A_______________~I
E
FILE OP----f
PRESS PAD
LOGIC
HD SELT
HD
SELT
RD
AMP
----:~~~~-~.:~~~-.:::::---~----~------.--.~
Burroughs - B9489 Flexible Disk Drive Technical Manual
Sec. 2 Page 1
SECTION 2
FUNCTIONAL DETAIL
POSITIONER
GENERAL DESCRIPTION
Positioning the leads to any of the 88 cylinders is achieved
by a carriage mounted on a lead ~crew/stepper motor
assembly. Rotation of the stepper motor one step moves
the heads 1/64 inch along the radius of the disk onto the
next track. Normally, a SEEK involves a number of steps in
either direction.
There is no "Home Position" similar to other Disk Cartridge
drives. The carriage is always at one of the 88 cylinder
positions whether a disk is in the drive or not.
When a disk is inserted and up to speed, the carriage moves
to track 00 and the electronics is calibrated with the positioner. This is achieved by use of the track 00 transducer
and the vane attached to the carriage (see figure 2-1).
Whenever a new track is needed, the new address and a
SEEK pulse is sent to the unit from the controller. The new
address is compared with the present address and the
stepper motor is driven forwards if the new address is
higher and backwards if the address is lower. When the
track requirement has been reached a delay is started which
permits the carriage to settle. At the end of this delay,
POSITION SETTLED is sent to the controller infonning it
that read/write operations can start.
MECHANICS
The carriage is threaded onto the lead screw and is entirely
supported by the lead screw (see figure 2-1). The carriage
is prevented from rotating with the lead screw by the
alignment rod and the yoke in the lateral arm of the
carriage. Play between the lead screw and the carriage is
taken up towards the spindle by the backlash nut. The
stepper motor/lead screw is mounted on an accurately
machined surface of the base casting to make sure that the
heads will always travel on a true radius.
-oIfH-+----TRACK 00 TRANSDUCER
ALIGNMENT ROD
LOWER MAGNETIC
~~-------4~-----LATERALARM
LEAD
SCREW
ARM
CARRIAGE BLOCK
STEPPER
·MOTOR
BASE CASTING
Figure 2-1. Positioner Mechanics. (top view)
For Form 2102141
Page 2
Burroughs - B9489 Flexible Disk Drive Technical Manual
Functional Detail
CARRIAGE
The carriage block contains the lower head which is
fixed in position with adhesive. This is factory set in order
to make sure that cores are parallel with the tangent of the
track at the point of contact. The upper head is similarly
set in the upper arm, but, for easy insertion of the· disk the
ann is mounted on a leaf spring. This permits the upper ann
to be lifted by the receiver to give clearance for the disk to
pass between the heads. The upper arm is held in position
by a key on the under surface engaging a slot in the upper
extension of the carriage block. The upper head can be
adjusted in relation to the lower head along the disk radius.
Both heads can be adjusted by turning the stepper motor
on its mounting.
A vane fitted to the lateral arm is aligned with the track 00
transducer when the carriage is at track 00.
MAGNETIC HEADS
The magnetic heads are offset in relation to each other, .
with the lower head nearer the spindle than the upper
head, to give the space needed for the pressure pads (see
figure 2-2.) The pressure pads are on opposite sides of the
disk from the heads and press the disk on to the heads.
ELECTRONICS
Refer to the block diagram figure 2-3.
The positioner electronics contains the sections which
follow:
1. File Operational (File Op) - Gives an indication to
the controller when the unit is ready for use.
2. Address Latches - Contains the new track address
from the controller, gated in with SEEK.
CARRIAGE
BLOCK
Figure 2-2. Carriage (side view)
Sec. 2 Page 3
Burroughs - B9489 Flexible Disk Drive Technical Manual
Functional Detail
3. Illegal Address - Gives an indication if the address
latches contain an addr~ss great~r than 87.
to the controller and the operator that the unit is ready for
operation (refer to figure 2-4).
4. Current Address Counter - An 8-bit up/ down
counter that always contains the present track
address of the carriage/heads.
Initial conditions are:
1. There is no disk in the unit.
2. The carriage is away from track 00.
S. Comparator - Compares new address with present
address.
The track 00 transducer signal is low giving a high on IC2S,
pin S. The up-to-speed (UTSF) signal is low providing a low
on IC2S, pin 1. This causes pin 3 to be high and pin 6 to
be low holding the File Op latch reset. IC13 pin 6 is low
giving a low File Op signal to the common electronics. The
File Op indicator is not illuminated.
6. Stepper motor driver - Self explanatory.
7. Stepper motor register - Energizes the coils of the
stepper motor, in sequence, via the stepper motor
drivers.
When the disk is inserted and the receiver is lowe,red, the
disk turns and index/sector pulses are generated. When the
correct disk speed is detected (see up-to-speed) UTSF
goes high placing a high on IC2S pin 10. Pin 9 is high from
ILL ADD/. The high on pin 9 causes IC24 pin 6 to go high
to enable the positioner clock. Count Down is also enabled
so that the carriage will step backwards. When track 00 is
reached, IC2S pin 5 goes low setting the File Op flip-flop,
to stop any further clock pulses and therefore carriage
movement. The File Op lamp illuminates, the heads are on
track 00 and, if the unit is selected, the FILE OP signal is
applied to the controller via the multiplexor chip IC67
(figure 2-4).
8. Positioner Clock - Controls the step rate of the
stepper motor.
9. Clock Control - Causes stepping to start and stop.
10. Direction Control- Determines whether the carriage
will step forward or backward.
11. Position settle circuitry - Gives an indication to the
controller when the heads have settled on the new
track at the end of a SEEK.
FILE OP
The purpose of the File Op circuit, is to give information
ILLEGAL
ILLEGAL
ADDREssr---------------------------------------------------------------------ADDR~SS
SEEK
A
1
2
ADDRESS:
18
32
84
D
0
R
E
L
A
T
C
S H
S
C
0
M
P
A
R
A
T
0
A
_ _-----jl--~
UPTOSPEED _ _-I FILE
TRACK 00
TRANSDUCER---t OP
C
0
U
N
T
E
R
DIRECTION~+-U-P----1 STEPPER
CONTROL
POS
CLOCK
DOWN
MOTOR
REGISTER
POS N
SETTLED
DRIVER
TRANS1S"Ji
TO
STEPPER
MOTOR
t---------------------------- SETTLED
PO 51 TI ON
~------------------------------~-----------FILEOP
FilE OP
>--------INDICATOR
Figure 2-3. Positioner Electronics Block Diagram
For Form 2102141
Page 4
Burroughs - B9489 Flexible Disk Drive Technical Manual
Functioilal Detail
ADDRESS LATCHES
'.
An overlapping seek is a seek initiated on a master or slave
while a seek is in progress on the other. Each drive has an
address latch to enable overlapping seeks to be performed.
This consists of a dual 4 bit latch integrated circuit. The
address lines are sent to both master and slave, but, the
seek pulse is gated only to the unit selected. (Refer to
figure 2-4).
The seek pulse is gated with WRT EN/and Unit Select to
become a negative pulse on TP 8/2. The leading (negative)
edge of the pulse gates the new address at the input of the
address latches onto the output of the address latches.
When the disk is removed, UTSF goes low and causes a low
on pins 1 and 13 of IC46 to reset the address latches.
ADDRESS 00 DETECTOR
When the address latches contain 00 (all outputs are low)
IC36,41 and 26 decode a high at IC36 pin 4 and low at
IC26 pin 3. This signal is used to force a recalibration
of the carriage onto track 00.
and down as the carriage steps towards or away from the
spindle.
Calibration of the counter and carriage occurs when a disk
is first inserted and subsequently whenever track 00 is
seeked. This permits software recovery if the counter and
carriage become mis-calibrated.
The counter consists of two hexadecimal up/down counters connected in series. When the Carry In (pin 2), Set
(pin 12), Reset (pin 13) and Count Enable (pin 1) are high,
the counter will count whenever the clock pulse goes low.'
The direction of count is controlled by the Up/Down signal.
A high will cause the counter to count up and a low will
cause it to count down. The Carry Out (pin 3) goes high
at count IS when counting up and count 0 when counting
down. Since the carry out from the Least Significant Bits
(LSB) counter is connected to the carry in of the MSB
counter, IC29 counts 1 for every 16 clock pulses to
continue the count.
The counter is reset (whenever the carriage vane cuts the
track 00 transducer) by the foll?wing path: IC45 pin 12
high, pin 11 low, IC13 pin 4 high, ICll pin 8 low, IC29
pin 13 and IC30 pin 13 low. Counting is enabled when
File Op goes high.
ILLEGAL ADDRESS
The mini disk has 88 tracks, numbered 00 to 87. Any
address received that is higher than 87 is "Illegal". If this
occurs, the signal "ILLEGAL ADD" is returned to the
controller and carriage movement is inhibited. IC28 pin 6
goes low for addresses between 88 and 95, and IC18 pin
11 goes low for addresses of 96 or higher. (Refer to figure
2-4).
The leading edge of the seek pulse clocks the new address
into the address latch. If the address is illegal, IC 16 pin 2
goes high and the trailing edge (positive) of the seek pulse
clocks flip-flop IC 16 to set illegal address flip-flop. This
signal goes to the common electronics of the master unit
where it is gated to the controller by UNIT SELECT
through multiplexor ICI6.
The purpose of the address comparator is to compare the
contents of the address latch with the current address
counter. The comparator has three output signals:
1. A> B. This signal occurs when the new address
is higher than the current address and the
carriage movement must be toward the
spindle.
2. A < B. This signal occurs when the new address is
lower than the current address and the
carriage movement must be away from the
spindle.
3. A=B.
Carriage movement is inhibited by a low on IC26 pin 8, a
high on IC25 pin 8 and a low on IC12 pin 13 which stops
clock pulses from reaching the stepper motor register.
CURRENT ADDRESS COUNTER AND COMPARATOR
The purpose of the Current Address Counter is to give
information to the address comparator of the cylinder that
the heads are currently situated on. The counter steps up
This signal occurs at the end of a seek when
the carriage has moved to the new track
position and the current address counter has
counted up or down with each step until it
is equal to the address latches.
The comparator consists of two 5-bit comparators
connected in series. Comparison is enabled when the File
Op flip-flop sets and pins 1 of IC37 and 38 go low. Before
comparison is enabled. A > B, A < B and A = Bare all low.
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Burroughs - B9489 Flexible Disk Drive Technical Manual
Page 6
Functional Detail
STEPPER MOTOR DRIVERS
Refer to figure 2-5.
The stepper motor has 3 windings which are energized one
at a time, in sequence. A winding is energized when the
high-power Darlington transistor is switched on by a high
at TP 7/5, 7/4 or 7/3. Selection is done by the stepper
motor register and gates IC43. In order to limit the heat
rise of the unit, power is removed from the motor when
Position Settled signal goes TRUE, this is done by pins 11,
2 and 5 being made high.
The heads are held in position by the friction of the
carriage.
Diodes 16, 17 and 18 and, the diodes internal to the
transistors, provide protection from the high back-EMFs
caused by the inductance of the motor coils.
STEPPER MOTOR REGISTER
The Stepper Motor Register energizes each of the three
stepper motor windings. in sequence. Both flip-flops start in
a reset state at track 00. This state is made sure by a low to
the reset inputs when SET TRACK 00/ goes low. With
each clock pulse, the register counts up or down 1 place
depending on the signal, COUNT UP or COUNT DOWN.
Table 2-1 gives a truth table for the counter and drivers
for every track.
Table 2-1. Stepper Truth Table
IC35
pin9
IC35
pin 8
IC35
pin 5
IC35
pin 6
TP 7/5
TP 7/3
TP 7/4
Trafk
IC35
pin9
IC35
pin 8
IC35
pin 5
0
1
2
0
1
0
1
0
1
0
0
1
1
1
1
0
0
0
1
0
0
0
1
45
46
47
0
1
0
1
0
1
0
0
1
3
4
5
0
1
0
1
1
1
0
0
1
48
49
50
0
0
0
0
6
7
8
0
1
0
9
10
11
0
1
0
12
13
14
Track
0
IC35
pin 6
TP 7/5
TP 7/3
TP 7/4
1
1
'0
1
0
0
0
1
0
0
0
1
0
0
1
1
1
0
1
0
0
0
1
0
0
0
1
1
1
1
0
0
0
0
1
0
0
1
0
1
1
0
1
0
0
1
1
1
0
1
0
0
0
1
0
0
0
1
51
52
53·
0
1
0
1
0
1
0
0
1
1
1
0
1
0
0
0
1
0
0
0
1
1
0
1
0
0
1
1
1
0
1
0
0
0
1
0
0
0
1
54
55
56
0
1
0
1
0
1
0
0
1
1
1
0
1
0
0
0
1
0
0
0
1
0
1
0
1
0
1
0
0
1
1
1
0
1
0
0
0
1
0
0
0
1
57
58
59
0
1
0
1
0
1
0
0
1
1
1
0
1
0
0
0
1
0
0
0
1
15
16
17
0
1
0
1
0
1
0
0
1
1
1
0
1
0
0
0
1
0
0
0
1
60
61
62
0
1
0
1
0
1
0
0
1
1
1
0
1
d
0
0
1
0
0
0
1
18
19
20
0
1
0
0
1
1
1
0
1
0
1
63
64
65
0
1
0
1
0
1
0
0
1
1
0
1
0
0
0
0
1
0
1
1
0
1
0
0
0
1
0
0
0
1
21
22
23
0
1
0
1
0
1
0
0
1
1
1
0
1
0
0
0
1
0
0
0
1
66
67
68
0
0
0
1
1
1
0
1
0
0
0
1
0
0
0
0
1
0
1
24
25
26
0
1
0
1
0
0
1
1
1
0
1
0
0
0
69
70
71
0
1
0
1
0
1
0
0
1
1
0
0
0
1
0
1
0
0
0
1
0
0
0
1
27
28
29
0
0
1
0
1
0
0
1
1
1
0
1
0
0
0
1
0
0
0
1
72
73
74
0
1
0
1
0
1
0
0
1
1
1
0
1
0
0
0
1
0
0
0
1
30
31
32
0
1
0
1
0
1
0
0
1
1
1
0
1
0
0
0
1
75
76
77
0
a
0
1
0
0
1
0
1
0
0
1
1
1
0
1
0
0
0
1
0
0
0
1
33
34
35
0
1
0
1
0
1
0
1
0
0
0
1
0
0
0
1
78
79
80
0
1
0
1
0
1
0
0
1
1
1
0
1
0
0
0
1
0
a
1
1
1
0
36
37
38
0
1
0
1
0
1-
0
0
1
1
1
0
1
0
0
0
1
0
0
0
1
81
82
83
0
1
0
1
0
1
0
0
1
1
1
0
1
0
0
0
1
0
0
0
1
39
40
41
0
1
0
1
0
1
0
0
1
1
1
0
1
0
0
0
84
85
86
0
1
0
1
0
1
0
0
1
1
1
0
1
0
0
0
. 1
0'
0
0
1
0
0
1
42
43
44
0
1
0
1
0
1
0
0
1
1
1
0
0
0
1
0
0
87
0
1
0
1
1
0
0
1
1
0
1
0
1
0
1
1
0
1
1
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0
1
0
1
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Page 8
Burroughs - 119489 Flexible Disk Drive Technical Manual
Functional Detail
STEPPER MOTOR
The stepper motor is made up of a stator with 12 poles,
and a rotor with 8 poles (see figure 2-6). There are 3 coils,
phase 1,2 and 3 (~1, ({f2, 03). When the 01 coil is energized
with +24 volts, a magnetic field is set up between the poles
marked "1". The rotor will align itself to the position
which gives the least reluctance to the magnetic flux that is
teeth A, B, C and 0 will align with the" 1" poles. The
magnetic flux flows from A to B and from C to D. Any
attempt to turn the rotor will be resisted by the magnetic
force of alignment.
If ~1 is de-energized and ({f2 energized the rotor will rotate
ISO counter-clockwise so that teeth E, F, G and H align
with the ({f2 poles. This is one step. Energizing 03 will step
the rotor another 1SO CCW so that A, B, C and D align
with the ~3 poles. Continuous energizing of the phases in
the sequence 1-2-3, 1-2-3 will step the motor counter clockwise 1SO per step. Similarly energizing in the sequence
3-2-1,3-2-1 will step the rotor clockwise 150 per step.
In the Flexible Disk Drive application the stepper motor is
used in slew mode so that the rotor does not settle between
each step. The next phase is energized as soon as the
rotor is approaching the last phase. In order to achieve
this, the positioner clock is ramped, that is, it starts at 6.8 ms
between pulses and is increased to 4.5 ms between pulses.
This permits time for the carriage to accelerate from stationery to full speed without lOOSing step. This corresponds to
147 steps/sec and 222 steps/sec.
POSITIONER CLOCK (Refer to figure 2-5).
The pOSitioner clock gives clock pulses to advance the
stepper motor and current address counter. The frequency
~1 ORANGE
~2 RED
fZj3 BROWN
COMMON
BlACk
is ramped from 147 steps/sec to 222 steps/sec to pennit
for the extra time needed for acceleration of the rotor
and carriage.
.
The clock is made up of two multivibrators (IC39 and
IC40) connected to trigger each other. When the
POSITIONER CLOCK ENABLE signal goes high, IC39 is
triggered generating an 800 ns Positioner Clock pulse at
pin 8 (TP 6/5). The trailing edge of this pulse triggers IC40
which generates a positive pulse at pin 8. The trailing edge
of the pulse from IC40 triggers IC39. The process continues
until POSITIONER CLOCK ENABLE goes low and
inhibits IC39 from being triggered.
The time interval between pulses is determined by the
period of IC40 which in turn is determined by capacitor
C5 1, resistors R75 and R76 and transistor Q8. At the
beginning of a carriage movement the stepper must be conditioned to run slow. This is done by A=B being high from
a previous seek or UTSF / being high before a disk is
inserted. The high at IC42 pin 13 or 9 causes a high at lC42
pin 10 which switches transistor Q8 off. The period of IC40
is therefore regulated by capacitor C5 1 and resistor R75
to 6.8ms.
Carriage movement can be start~d by inserting a disk or a
seek pulse. When a disk is inserted and is up to speed,
UTSF/ goes low. A = B is also low at this time due to the
comparator output being disabled (refer to the comparator
description). With both inputs low IC42 pin 11 goes high
and pin 10 goes low causing transistor Q8 to switch on.
Capacitor C45 causes transistor Q8 to switch on gradually
bringing resistor R76 into parallel with resistor R75 so that
the period of IC40 changes from 6.8ms to 4.5 ms. The same
process occurs when seeking a new track, UTSF / is already
low and A = B goes low after the seek pulse. IC42 forms a
positive OR gate or negative AND gate. Figure 2-7 illustrates the voltage at the collector of transistor Q8 and the
POS CLK signal, the rise time of transistor Q8 's collector is
25ms.
A=8
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POS CLK
(TPC/5)
4.2ms
5.5ms
4.5ms
4.2ms
NOTE: STEPPER MOTORS SHOULD NOT BE
DISASSEMBLED SINCE THE ACCURACY
OF THE STOPS WILL BE REDUCED.
Figure 2-6. Stepper Motor
Figure 2-7 Positioner Clock Start-Up
Sec. 2 Page 9
Burroughs - B9489 Flexible Disk prive Technical Manual
Functional Detail
CLOCK CONTROL.
Refer to figures 2-4 and 2-S~
The POS CLK EN signal is made high from the negative OR
action of IC12 piri 8, in the conditions which follow:
1. When A =B is low. This occurs when a new track
address has been latched into the address latches and
is not equal to the present address of the carriage.
When A = B clock pulses are stopped.
2. When File Op. Flip Flop is reset. This occurs from
the time a unit is powered on until the disk is
inserted and the heads settled on track 00.
3. UTSF I and Track 00. This occurs if the disk is
extracted and the carriage is 011 track 00. It causes
the carriage to step away from track 00 so that the
calibration sequence occurs correctly on the next
disk insertion.
POS CLK EN enables the positioner clock to produce POS
eLK pulses. POS CLK pulses are passed to the stepper
motor register via IC 12 pin 12. This gate prevents clock
pulses reaching the stepper, stopping carriage movement,
under the conditions which follow:
1. UTSF going Low. This occurs if the disk speed drops
or the disk is extracted.
2. Illegal address and File Op. When the address latches
contain an address greater than 87.
This is overridden by IC24 pin 4 permitting a Clock pulse if
UTSF goes low while the carriage is on track 00.
DIRECTION CONTROL
The direction control circuit conditions the stepper motor
register and the present address register to step in the
correct direction. Two signals are produced: COUNT UP
and COUNT DOWN
COUNT UP is produced by the conditions which follow:
controller that the heads are settled on their new position
and the pressure pad is engaged so that read or write
operations may start.
Refer to figure 2-S.
PSK/ triggers IC33.
Positioner clock pulses, ClK f/J, retrigger IC33. Since the
period between clock pulses (4.5ms) is much shorter than
the period of the timer (sOms) the timer never times out
but is constantly retriggered. This occurs until the desired
track is reached and the CLK f/J pulses are stopped. 50ms
after the last CLK f/J pulse, pin 6 goes high removing power
from the steppe,r motor drivers and making the signal
POS TIME OUT I high.
POS TIME OUTI is gated with File Op. and Head Load
timeout to become the signal POS SETT. This signal
goes to the common electronics where it will be gated onto
the interface if this unit is selected. (UNIT SEL).
POSITIONER FLOW CHARTS
The charts which follow are intended to show the sequence
of events during, Startup, Seek, Recalibrate and Disk
extraction. On the left hand side of the flow chart the
action is described, on the right hand side measurement
criteria is provided.
START UP
INITIAL CONDITION~
Motor is stopped
Disk not turning
No Index/Sector pulses
TP 5/4, 8/4, 8/5
Up to speed 'is low
TP 8/9 low
Address latches reset
IC46 outputs low
File op low
IC13 pin 6 low
File op indicator not lit
Visual
Comparison disabled
IC37 and 38 pin 1 low
Illegal address F F reset
IC16 pin 1 low
Positioner is away from track 00
TP 6/6 high
1. A greater than B. This occurs when the new address
is higher than the present address.
POS CLK EN true
IC25 pin 6 low; TP 6/2 high
COUNT DOWN true
IC 24 pin 8 high
2. UTSF1* and Track 00. This occurs if the disk is extracted when the heads are on track 00. This causes the
heads to step out beyond track 00 so that the
calibration occurs correctly on the next disk
inserted.
Counter conditioned down
IC28 pin 6 low (TP 8/3)
TR 00 decoded
inhibiting pulses to counter
IC26 pin 3 low
IC24 pin 3 high
Clock running slow
6.8 mS pulses TP6/5
COUNT DOWN is produced by the conditions which follow:
1. A less than B. This occurs if the new address is
lower than the present address, that is, the carriage
must move away from the spindle.
2. File Op. low. This occurs from power up or when a
disk is removed until a disk is inserted and the heads
have reached track 00.
POSITION SETTLED
The Position Settled signal gives information to the-
OPERATOR INSERTS DISK AND CLOSES DOOR
Motor Sw transfers
Disk turns
Index & sector pulses occur
TO 5/4, 8/4, 8/5 pulses
When disk up to speed UTSF sets
TP 8/9 high
CLK " pulses enabled
IC258 low IC12 pin 13 high.
TP 5/6 pulsing.
Stepper register counts down
Stepper moves rearward
Pos Set timer triggered
IC33 pin 6 low
For Form 2102141
Page 10
Borroughs - B9489 Flexible Disk Drive Technical Manual
Functional Detail
TP 6/6·lo~
Positioner reaches TROO
TR 00 transducer activated.
1
Counter and register reset
ICII pin 8 low
File op FF set
IC25 pin 3 low, pin 6 high
Clock pulse occurs
File op indicator lit
Visual
Comparison enabled
IC38 & 37 pin 1 low
Counter counts up or down 1
position
A
= 8 is true
TP6/3 high
POS ClK EN false
TP 6/2 low
Further clock pulses inhibited
Carriage stops at TR 00
Pulse on 6/5 and 516
Stepper register counts 1 up or
down
If A
=8
Carriage moves 1 track
is still low
Wait next clock pulse
POSITION REACHED
50 mS after last ClK pulse POS
TIME OUTI goes high
IC33 pin 6 high
Stepper motor coils de-energised
POS SET true
A
=8
high
TP 6/3 high
POS ClK EN false
TP 6/2 low
No further clock pulses
Carriage stops,
coils energised
IC44 pin 12 high
50 mS after last clock POS TIME
OUT I goes high
END
SEEK
Stepper coils de-energised
INITIAL CONDITIONS
If HEAD LOAD TIME out
complete POS SET true
FilE op true
Indicator lit
A=8
TP 6/3 high
POS SET true
IC44 pin 12 high
POS ClK EN false
TP 6/2 low
SEEK PULSE
1C45 outputs hold new
address
Illegal address decoded if address
87
IC18 pin 8 high
IC44 pin 12 high
END
RECALl8RATION
Seek Track 00
IC26 pin 3 low
track 00 decode
A <8 because A = 00
TP 8/1 high
COUNT DOWN high
IC24 pin·8 high
TP 8/3 low
New address put on input of IC46
Leading edge of SEEK clocks new
address in
IC33 pin 6 high
=8
is low
TP 6/3 low
POS ClK EN true
TP 6/2 high
Clock pulses occur
1 J..LS pulse. TP 6/5
Stepper motor register
counts down
Stepper moves
rearward
1C43, 11, 1,2 and 5 low
TR 00 transducer is
activated
TP 6/6 low
If new head, solenoid energised.
HD lD timer fired
IC12 pin 4 low for 115 mS
Counter and Stepper
motor reg reset
A ... 8 low
TP 6/3 low
A'" 8 true
TP 6/3 high
POS ClK EN true
TP 6/2 high
POS ClK EN false
TP 6/2 low
If A) 8, COUNT UP high
COUNT DOWN low
Counter conditioned up
If TP 6/1 HI, TP 8/3 high
IC24 pin 8 low
TP 8/3 high
Further Clk pulses
inhibited
Stepper stops at
track 00
If A (8, COUNT DOWN high
If TP 811 high, TP 8/3 low
IC24 pin 8 high
50 mS after last clock
IC33 pin 6 times out
P~S
Trailing edge of SEEK does
following:
1. clock ILLEGAL ADD FF
IC16 pin 5 high if address is
illegal
2. clock HD ADD FF
IC32 pin 9 low if upper
head, high if lower head
3. trigger
pas TIME OUT Timer
IC33 pin 6 low
Stepper motor coil energised
COUNTUPlow
Counter conditioned down
1
A
SET high
IC44 pin 12 high
Note: Counter is inhibited from couting down by
IC24 pin 1 low. This holds A <9 true until
Track 00 transucer Is cut.
-
Burroughs - B9489 Flexible Disk Drive Technical Manual
Sec. 2 Page 11
Functional Detail
HEAD SELECT
The purpose of the Head Select circuitry is to enable the
selected head by connecting its center tap to ground and to
select the corr~ct pressure pad solenoid to press the disk
against the head.
Refer to figure 2-4
The signal Hhead select" is sent to both master and slave
units, going onto flip-flop IC32 pin 12. If the unit is
selected and a write is not in progress, a seek pulse will
clock IC~2 pin 11. This will set the flip flop in the same
state as head select. This signal is named HD ADD.
Refer to figure 2-15.
If HD ADD is high, Q 1 is switched on ~onnecting the
center tap of the lower head to ground. If HD ADD is low,
Q2 is switched on connecting the center tap of the upper
head to ground.
Refer to figure 2-8.
Gates IC17 pins 8 and 12 control the energizing of the
upper or lower solenoids.
If HD ADD is high and the disk is up to speed and the
conditions for energizing are satisfied then TP 7/2 is low
and Q 12 switched on energizing the upper solenoid.
If HD ADD is low and the disk is up to speed and the condition for energizing are met, Q13 is switched on energizing
the lower solenoid.
HEAD LOAD SOLENOIDS AND TIMER
For correct operation of the recording head, the disk must
be pressed against the head with a pressure of approximately 11 grams. This makes sure that the head gap is in
good contact with the disk. This is made with a spring
loaded pressure pad on the opposite side of the disk. The
heads are offset to accomodate the pressure pads.
Energizing the solenoid lowers the pad onto the disk.
De-energizing the solenoid lifts the pad off the disk.
In order to lengthen the life of the media, the pressure pad
is disengaged 5 revolutions after the end of Read or the
end of Write, whichever is latest. In order to re-engage the
pad a SEEK pulse or RD EN or WRT EN is needed.
Refer to schematic, figure 2-8.
Before a disk is inserted, and until the disk is up to speed,
UTSF is low disabling gates IC17 pins 10 and 2. Neither
solenoid can be energized. UTSF / being high at this time
sets all the flip-flops in the 5 bit shift register IC 19 (data
inputs pins 2, 3, 4, 6 and 7 are high and preset enable is
high) UTSF being low resets flip-flop IC22 causing a high
on pin 4 of ICII. If RD EN and WRT EN are false, pin 5
ICll is also high placing a high on 'Serial in' of ICI9.
INDEX is connected to the clock input pin 1, therefore,
on each revolution the data is shifted one position and
'Serial in' is shifted in. Pin 10 output will stay high keeping
the solenoids de-energized until a SEEK occurs.
A SEEK pulse sets flip-flop IC22 causing pin 6 to go low,
this causes a low on the clear input of ICI9, resetting all flipflops and making pin 10 low. This enables pins 11 and 13
ofIC17. The solenoid to be energized is selected by HD
ADD, high makes IC 17 pin 8 low energizing the upper
solenoid, low makes IC 17 pin 12 low energizing the lower
solenoid.
Flip-flop IC22 stays set until either a read or write operation
is performed.
RDEN/ or WRTEN/ going low causes a high on pin 3
IC22 resetting the flip-flop.
Pin 4 IC22 goes high. At the end of the Read or Write pin
5 also goes high placing high onto pin 9 serial in. This high
gets shifted into the register on each index pulse.
Unless a new SEEK pulse is given IC19 pin 10 will go high
after 5 revolutions, de-energizing the solenoid.
The solenoid takes a maximum of 60ms to pick. Therefore,
as an indication to the controller that a Read or Write
should not be attempted POSITION SETTLED is made
false for 60ms following the energizing of either solenoid.
IC 15 and inverters IC 14 pins 2 and 4 form an exclusive 0 R
gate with ,a high out of IC 15 pin 11 to trigger IC23 when
either TP 712 or TP 7/1 goes low. C54 delays the waveform
at TP 7/1 to make sure of a trigger pulse when switching
heads.
The negative 60ms pulse appearing on TP SIS goes to IC12
pin 4 (see schematic, figure 2-4) causing POSITION
SETTLED to go low for 60ms.
INDEX AND SECTOR PULSES
The purpose of sector pulses is to supply the controller
with timing pulses corresponding to the beginning of each
sector of information.
There are 32 sector pulses for each revolution of the disk.
The sector pulses are equally timed 5ms apart. One revolution of the disk takes 165ms (370 rpm).
The index pulse informs the controller that the next sector
pulse marks the beginning of Sector No.1. Index occurs
midway between Sector No. 32 and Sector No.1. Index
pulses occur every 165 ms. The index pulse is also used in
the drive to detect when the disk is up to speed, and also
to disengage the head pressure pad 5 revolutions after
Reading or Writing in complete.
Index and Sector pulses are generated by holes punched in
the disk allowing infra-red light to fallon a photo sensitive
transistor as the disk rotates. There are 33 holes in the disk,
32 evenly spaced for sector and one extra midway between
2 sector holes for index.
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Burroughs - B9489 Flexible Disk Drive Technical Manual
Functional Detail
Discrimination of the index pulse is performed by the
electronics.
SECTOR/ pulses TP 8/4. Pulses occurring during the 4ms
are decoded as INDEX/ pulses TP 8/5.
Refer to figure 2-9 and figure 2-10.
UP TO SPEED (refer to figure 2-9)
As the disk rotates and a hole passes between the light
source and the photo sensitive transistor, light falls on the
transistor making the output fall towards OV. At approx.
+O.9V the schmitt trigger IC45 fires causing TP 6/4 to go
high triggering IC21.
When the unit is powered on, UTSF is held reset for 300ms
minimum by C48 holding a low on IC22 pin 13. This is to
prevent the flip-flop being set by spurious pulses occurring
as the unit is powered on.'
IC21 is an adjustable delay to delay Index and Sector pulses.
Its purpose is to compensate for mechanical tolerances
between the index/sector transducer and the magnetic
heads. The delay is adjusted with the aid of the alignment
disk so that the index and sector pulses occur at .th~ same
time relative to the data regardless of which drive the disk
is read on.
At the end of the delay, pulse standardizer ICI0 pin 10 is
fired.
The negati~e edge of the standardized pulse fires the 4ms
timer.
Pulses on TP 5/4 occurring outside the 4ms are decoded as
JE-
5mS
When a disk is inserted and the receiver lowered, the drive
motor is switched on and the disk starts to turn. The leading
edge of the first index pulse clocks IC22, however, because
IC31 has not been triggered yet, the flip-flop is held reset
by a low from IC31 pin 8 to IC22 pin 13. The trailing edge
of the index pulse triggers IC31. While IC31 is timing out,
the reset is removed from IC22 therefore if the next index
pulse occurs within 225ms, UTSF is set. If the next index
pulse occurs after 225ms, le31 times out, holding IC22
reset.
During normal operation, index pulses occur 160ms apart,
thus IC31 is constantly retriggered and never times out. If
however, the speed of the disk drops and the index pulse
takes longer than 225ms IC31 times out resetting IC22
with a low on pin 13.
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Figure 2-10. Index and Sector Generation
Burroughs - B9489 Flexible Disk Drive Technical Manual
Sec. 2 Page 15
Functional Detail
~
GENERAL.
The unit writes' data, Bit serial, MSB first onto the
selected unit and surface when the signal WRT EN goes
true. When the unit is not reading, the write clock is sent
to the controller for its internal use. When writing is
required, the controller supplies data on the WRT DATA
line in bit serial NRZ, syncronized to the write clock.
Formatting of the preamble, sync bytes, address, data,
parity and postamble is a function of the controller or host
system. In the drive unit, the NRX data has to be
converted to MFM, sent to either the master or slave, and
written on the disk. In addition, during Write, the erase
current must be switched on to erase a "guard band' on each
side. of the data.
This prevents noise pick up from previously recorded data
in the event of a slight head misposition when reading the
data back. Writing over previously recorded data destroys
the old data due to the fact that the disk is saturated with
magnetic flux. Refer to figure 2-11 for a block diagram of
the Write function.
RDEN/._ _ _ _ _--,
CLOCK
TO CONTROLLER
WRTOATA _____________________________+--------------------------------------~
SELECTION
(NRZ)
FROM
CONTROLLER
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Figure 2-11. Write Block Diagram
For Form 2102141
Page 16
Burroughs - B9489 Flexible Disk Drive Technical Manual
Functional Detail
cell for a zero and a pulse at the center of a cell for a one~
Where a zero follows a one, the zero pulse at the beginning
of the cell is omitted. Gate IC46 pin 8 gates the 'ones' bits.
Gate IC48 pin 6 gates the 'zero' bits.
'.
WRITE CLOCK
Refer to Figure 2-13 and timing diagram 2-12.
The Xtal clock runs continuously at a frequency of 1500
KHz. When RD EN is not true, that is, when not Reading,
clock pulses are permitted to clock flip-flop IC47, dividing
the frequency to 750 KHz. This signal goes to the phase
lock loop circuitry to maintain the PLL syncronized. It
also clocks IC54 which is a divider giving a 375 KHz WRT
CLK signal on TP 9/2.
Refer to schematic figure 2-14. Whenever the unit is not
Whenever the unit is not reading, WRT CLK pulses are
gated through IC52 to become DATA CLK to the controller.
WRITE DATA ENCODE
Refer to figure 2-12 and 2-13.
MFM WRT pulses consist of a pulse at the beginning of a
NRZ data is clocked into flip-flop IC49 pin 5 on the leading
edges of each WRT CLK'pulse. This is shifted into IC49 pin
8 on the following clock pulse. Thus, the second FF always
contains the state of the previous bit written, ~ones time'
is when TP10/2 is low and TP 9/2 is low. If data is high at
this time (TP 9/1) a pulse will be permitted through IC48
pin 8 and IC53 pin 8, 'zeros time' is when TP 10/2 is low .
and TP 9/2 is high. If data is low at this time IC48 pin 4 is
high. Providing that the previous bit was not a one, IC49
pin 8 will be high permitting a zeros pulse through IC48
pin 6 to TP 9/4.
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75KHz
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Page 18
Burroughs - B9489 Flexible Disk Drive Technical Manual
Functional Detail
This allows the higher current to flow through Q4 and thus
UNIT SELECTION
, through Q5.
Refer to figure 2-14.
.
MFM WRT pulses are gated to the master unit if UNIT SEL!
For cylinder address 32 or greater, ADD32 or ADD64 wIll
is false through IC62 pin 3, and to the slave if UNIT SEL! is
true through IC62 pin 11.
be true.
Refer to figure 2-4.
WRT EN is gated with UNIT SELECT, POSITION
SETTLED, and WRITE INHIBIT! to become WRT EN! to
the write and erase drivers.
WRITE INHIBIT
Refer to figure 2-4.
In order to prevent writing on a disk, the operator can
remove the covering from the WRITE INHIBIT hole on the
disk envelope. This allows light to fall on the photo sensitive
transistor when the disk is inserted in the unit. TP 8!6 goes
high and IC28 pin 13 goes low preventing WRT EN from
reaching the write and erase drivers.
WRITE AND ERASE DRIVERS
Refer to figure 2-15.
When WRT EN! goes false, the reset is removed from
IC2 and gates IC3 pins 5 and 10 are enabled. IC2 pin 6 is
true making IC3 pin 8 false. This switches on Q6. This
causes current to flow from ground through Q 1 or Q2
(depending upon HD ADD) through half of the recording
head, through Q6 and the current source Q5 to +12 volts.
This will magnetize the disk media in one direction
The positive going edge of the first MFM WRT
pulse will set the flip flop IC2. This switches off Q6 and
switches on Q7. This causes current to flow from ground,
through Q 1 or Q2, through the other half of the recording
head, through Q7 and Q5 to +12 volts. This will magnetize
the disk in the opposite direction.
The positive going edge of each MFM WRT pulse
will complement IC2 changing the direction of magnetization of the disk. This will continue until WRT EN! goes
true. WRT EN! going true will reset IC2 and disable gate
IC3 pins 5 and 10. IC3 pins 6 and 8 will go true switching
off Q6 and Q7.
Q5 is the current source for write drivers. Q4 and Q5
are identical transistors with identical emitter resistors. The
current flow through Q4 will cause an identical current
flow through Q5. Therefore by varying the current in Q4
the current in Q5 is varied. For any cylinder address below
32 both ADD64 and ADD32 will be false. This causes the
output of gate IC3 to go false. The collector load for Q4
is then R19 to ground.
This permits the output of gate IC3 to float. R19 then
forms part of the collector load of Q4, thus reducing the
current flow through Q4 and Q5.
At the same time as data is being written the erase winding
is energized. This is to erase any old information at the
edge of the new data and so provide a guard band. When
WRT EN/ goes false Q3 is switched on. Current then flows
from ground through Q 1 or Q2, through the selected erase
winding, through Q3 to +12 volts. C 1 causes a delay to the
switch on a switch off of Q3 to compensate for the distance between the information gap and the erase gap in the
head.
READ HEAD SELECT
Refer to figure 2-15.
When the unit is not writing (WRT EN/) Q6 and Q7 are
switched off. The diodes D9 and DID prevent the capacitance of Q6 and Q7 affecting the input to the read amplifiers. The diode also prevents any feedback on the read
amplifier circuit which could be caused by pickup in the
emitter circuit of Q4 and Q5.
The centre connection of one of the heads is connected to
ground through either Q 1 or Q2. This is determined by the
logic level of HD ADD. When the center connection is
connected to ground, the diodes 07 and 06 or D9 and D8
an~ forward biased. The small AC voltage induced in the
read head is passed through the forward biased diodes to
the read amplifier.
READ CHANNEL
Refer to figure 2-16 and 2-18.
The output of the read head is taken to pins 1 and 2 of
IC4. The resistors R27 and R28 and the diodes 011 and
012 form the clamp to prevent overloading the read channel
during write operations. The gain of IC4 is 100. Following
IC4 is a low pass filter to reject noise above 500 KHz.
Reference figure 2-17.
The signal TP14 is the positive output of IC4.
The delay line DLI differentiates this signal to produce a
Signal with zero crossing times corresponding to the peaks
of Signal TP 14. This differentiated signal is amplified by
IC7 and appears at TPI6. IC8 is a comparator which
produces a square wave output from the signal at TP16.
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Burroughs - 89489 Flexible Disk Drive Technical Manual
Sec. 2 Page 21
Functional Detail
DIGITAL FILTER
. Refer to figure 2-16 and 2-18.
The purpose of the digital filter is to eliminate noise from
the read signal and to produce MFM RD pulses of a standard pulse width. The gates IC6 perform and EX NOR
between the comparator output and the latch output. The
output of IC6 pin 8, R37 and C8 form a ramp generator.
The transistors Q 16, Q 15 and Q 17 are the pulse standerdizer.
A change in logic level at IC8 pin 7 will cause IC6 pin 8 to
float (Open Collector Output). The capacitor C8 will
charge causing the voltage on the base,ofQl6 to rise. When
this voltage reaches approximately 5.5 volts, Q16 will
switch on. When Q16 switches on, a negative pulse is
applied to the base of Q15. This causes a positive pulse at
the collector of Q 15 which is inverted by Q 17 to form
the signal MFM RD.
The flip-flop IC5 complements on the positive edge of the
MFM RD pulses. When IC5 complements, IC6 pin 8 goes
low and should stay low until the next change of logic
level at IC8 pin 7. A noise pulse at the output of IC8 will
cause IC6 pin 8 to float for the duration of the noise pulse.
The noise pulse will be too short to permit C8 to charge to
5.5 volts. Therefore Q16 will not be switched on and the
noise will have no effect on MFM RD.
common electronics is to select the required MFM RD
(master or slave) and decode the information from MFM
to NRZ, also producing a data clock for use by the Control
to, strobe in the NRZ data into the registers/memories.
SELECTION
Refer to schematic 2-14.
Selection of the Read Data either from the master unit or
the slave is achieved by multiplexor chip IC65.
Depending on UNIT SELECT, IC65 will permit the signal
from pin 13 (slave) or pin 14(master) to go to the data
decoder.
t-
o
r\.'
j
~
~
~
-rv:
It
V
7
-~
The signal MFM RD is sent to the common electronics
from the master unit and the slave. The function of the
~
1l-
LON PASS
FILTER
,~
J
f0-
ri-
V
•
-
-- - -
I'
I
...
...
-r
r
'"
lI\. ''OJ
I
~o
" ""
V
......
I-
"'!
I-
1-.
-
3.TP20
.....
-~
u~
-II
J . J
J
J .
4.IC6
PINS
-
,..-.
,
,..
2.IC7
PIN7
~
,....-
r
r
r
,.~
S.MFM
RD
l-
DIGITAL FILTER
MMFM RD
II
I
•• "t
t
I
I
I
... ,
• 0, 0: l-
l.TP14
rv rv
..
V
J FJ ,J
J
~
f-.
II'
DIFF.
V rv
I-
.... ...
~
I"
0"
e
-
r-
•
I-
A
~'~ JT'
w
.... ~
I"
..
~~
,
....
a.
GENERAL
"w
~.
~
l-
l-
DATA DECODE.
I
t"
00'
•
I
I'
••
I
I
•••
I
.1-
X-NOR
RAMP
GEN
I!-
,..
I-
~.
.'
Figure 2-16. Read Block Diagram
I
•
r.-.. 'r nr. ~ri,..-.1~
~
~
... .
I"
I
I
••
,
~
.... ..
• 0.0: ~
,
,
•
I"
~
~
6.ICS
PINS
.... ... .
Figure 2-17. Read Channel Test Points
For Form 2102141
ov
08
6-2V
+12V
EJ
OV
RI"
+12V
lel4
H2
O·')JF
EI
130'l:zw
OV
RS2
J2
130 Ii2W
+Sv
024
R40
JI
II<
6-2V
J2
TPI6
J2
+SV
+12V
OV
+5V
+12V
R53
J2
CN
4-CI OATA 'A'
+SV
csl
R31
FI
41<7
IK
FI
82pF
...
tI
..,..,c
als
R43
F2
IK
'T.I
~.
+sv
0
c
~
A
FI
~
,
<1l
c:
N
-
"
~
R35
GI
11<2
!XI
en
(")
'~
o·
RSIJ2
R46
F2
II<
I
~
(II
+Sv
Cii
til
~
...<:
t:
....
-12V
(II
+SV
-12V
e.
S
(II
RSS J2
R29 E2
-I2V
""J
e.
~
ov
(j
::r
C)
::s
::s
"
Cii
><
(5
'<1l='
.....
51
C)
Q.
'T.I
c:
::s
(")
.....
o·
::s
ov
<1l
3C)
.....
01
(")
::J'
co(
CIS
J2
O·'J,JF
02
OoIJJF
::s
n
e:
ov
3:
C)
IC~
G-SN7426
J - SN7474
U -1.IA133C
710C
,,-JJA
18789057
14473607
20100582
11272077 '
XSTR·
A -TYPE AK
11095924
DI()OFS
A - TYPE 25
C -IN7S::;
20052981
11263241
OV
OV
::s
c:
e:.
017
A
GI
OV
TP21 JI
MMFIIA
Ro
I-C3
Sec. 2 Page 23
Burroughs - B9489 Flexible Disk Drive Technical Manual
Functional Detail
STANDARDIZER AND P.L.L.
Refer to schematic 2-21."
Approx. 100 microseconds after a sector pulse, READ
ENABLE goes true from the controller permitting MFM RD
pulses to trigger timer IC57 pin 6.
The purpose of this timer is to standardize the length of the
read pulses. TPll/7 therefore has a 350 ns pulse occurring
approximately 150 ns after each peak. This pulse train
feeds onto pin 12 of the phase-locked-loop.
P.L.L.
The purpose of the phase-locked-loop is to provide a
reliable source of timing pulses for use on decoding data
and deriving the read clock.
, 2 .61lS -.;
J!1l.350~S
I
TP11/
h33~
~
~:fA
!
;TRANSITION IN CENTRE!
~ OF DATA PULSE
I
-,
TP111
TP 11/1
DATA
I,
Refer to figure 2-21.
The phase-locked-loop compares its frequency with the
input data pulses and adjusts itself so that the output transition occurs midpoint of the input pulse. The speed of
correction is determined by Rl12 and C80.
READ ENABLE DELAY
Before RD EN goes true, the low level resets the RD
DATA flip-flop via IC50 pin 2 low, pin 3 high, pin 6 low.
When RD EN goes true, it triggers timer IC57 pin 12.
This causes the RD DATA flip-flop to be reset for a further
400 fJSecs via a low pulse on IC50 pin 1 causing a low on
IC56 pin 13.
This prevents data reaching the controller while the
PLL locks up onto the preamble data. C64 maintains the
reset from the time RD EN goes high to the time when the
timer output goes low.
Figure 2-19. P.L.L./Data Relationship
o
The P.L.L. consists of an oscillator running at two times the
maximum data rate and locked onto the data pulses
coming from the disk. If the disk speeds up theP.L.L.
frequency increases, if the ,data rate slows down the P.L.L.
frequency decreases. The natural frequency is 750 KHz,
this is adjusted with RV4. The natural frequency can be
varied by the data by ± 6%.
o
o
1-,.66.5 =ffi
1:"50".
I~--------------~
I
0
~
~
0
~
~----------------------~~--------------~
I
I
Pll
750 Khz
50% MARK SPACE
TP1014
750 Khz
50% MK/SP,
TP11!8
Plli
IC 54
PIN 5
375 Khz
50% MK/SP.
375 Khz
25% MK/SP.
RD ClK
IC60 PIN13
TP 11/1
TP11/2
______---'~h.,:'i::£ ~
l
I I' -rrL..------ln
1·05~S
~--~
I
I
~
~
~'-______. .~
l
n,-----,nl...------InL-------In IL
375Khz
39%MK/SP.
______~~~n~____
I
RD DATA
TP 10/6
_ _ _-----',:
I
I'-____
RDDATA(NRZ)
Figure 2-20. Data Decode Timing
For Form 2102141
READ
ENABLE
DELAY
+5V
IiIV3
P3
+SV'_ _""Vr:rv-..,
I
+5V
I
SK
RS2
+sv
L~.·.,,"'.,..
R97
as
IK
I_AI~F" RD
I-AI RD EN
TP
10/6
"3
tor)
+SV'-..JVIJ'V-'"
IK
~.
...
TP
11\4
P3
R91
N2
<11
N
I
N
f(S3
IC
J>.-SU74oo
El-SN7402
J-SN7474
u- 9602
14473516
26004911
14473607
14477047
1V-NE~~2e
18791798
r- ..Aw• ....". :OV 04
,
RD eLK I-A7
i --""
~\
+12V
«!RS4 C762200PF
R4
~
R3<.......~---t
RII6
RV4
68
1\2W
5K
RS
RII4
OS
681\2W
Rill C78
P4
P4
XSTP'
A-AK
11095924
IK
o.lJJF
C12P4
ClODES
A-TYF':::2S
0-7574
20052981
10806206
TP
11\6
16
~~--~----~--~--~~-~
4
61
W
Q4
TPI9 >--"V\~
P4
RI13
PS
IIC
+5V
Pl
3
PHASE LOCKED LOOP
0
RI02
04
:lK
RIOI
03
IK8
CI02
03
O.I~F
~IOO
03
2K
Burroughs - B9489 Flexible Disk Drive Technical Manual
Sec. 2 Page 25
Functional Detail
READ CLOCK
The Read Clock is generated from the 'PLL, divider IC54
and gate IC60 pins 11, 12, 13. When RD EN goes true,
timer IC57 pin 10 goes true for 400 pS. Data pulses
occurring during this time will produce a low on IC50 pin
8 which presets flip-flop IC54. This ensures the correct
phase of clock, since it is known that RD EN occurs during
the preamble and the preamble consists of zeros.
Refer to Data Decode Timing Figure 2-20.
Read clock consists of a 666 pS pulse every 2.66 iJ,S.
DATA WINDOW
The purpose of the data window is to'provide a timing
pulse for each bit cell.
MFM read pulses occurring during this period are taken as
zeros and any pulses occurring outside are taken as ones.
The mark/space ratio of the data window waveform is 39%,
that is, 39% of the time is spent looking for zeros and 61 %
looking for ones.
This is to counteract the effect of peak shift affecting the
'ones' when a 'zero' pulse is omitted following a 'one' (see
figure 2-22). Peak shift is caused by the effect of pulse
crowding.
Flip-flop IC56 pin 5 is reset on the edge of every 'zero
time' (TPII/2 high) and is set by a data pulse occurring
during the 'ones time' (TPI1/2Iow). Note that the flip-flop
is reset every zero time regardless of whether a data pulse
occurred at that time, therefore correcting the lack of a
zero pulse following a one which is characteristic of a MFM
recording.
TPII/3 therefore has a pulse occurring on each one bit.
Flip-flop IC56 pin 9 converts this to NRZ (see figure 2-21).
o
WHITE
o
cu~
~---.....I
READ BACK
VOLTAGE
I
I
~I.I"""-
~l
PEAK SHIFT
I
I
I~
I
Figure 2-22. Worst Case Peak Shift
For Form 2102141
Sec. 3 Page
Burroughs - B9489 Flexible Disk Drive Technical Manual
SECTION 3
CIRCUIT DETAIL
GENERAL
The type of logic used in the B9489 is Transistor-toTransistor logic (TTL). The high level is +2 to +5 volts and
the low level is +0.8 volts to 0 volts. Normally TRUE is
considered as high and FALSE is low however there are
exceptions, particularly on the interface, where a low is
TRUE and a high is FALSE. Such signals are generally
marked (/) next to the signal name indicating that the
function is active when the signal is low. On the card
schematic a negation symbol (0) is used to indicate when a
low activates a function. Figure 3-1 illustrates a typical
exception.
Table 3-1 contains a listing of modules used in the
Mini Disk Drive the listing is referenced to illustrations,
figure 3-2 through 3-28, in this section which provide a
logic diagram of the modules.
t
The IC in figure 3-1 is triggered by a low on A or a
high on B and is reset by a low on C.
.'Table 3-1. Index of Modules
FIGURE
PART NO. VENDOR NO.
NO.
-~
3-2
3-3
3-4
3-5
14473516
2600 4911
14473532
26001685
3-6
3-7
3-8
14473540
14473565
18789057
3-9
14473581
3-10
26006726
3-11 26004929
3-12 18794313
3-13 14473608
3-14 1901 7102
9601
..1
A
1
B
)
«
c
RESET
3-15
14477047
3-16
18788042
3-17
3-18
3-19
3-20
3-21
14467062
14473797
18788034
20100582
11272077
3-22
3-23
3-24
18791764
18791798
3-25
3-26
3-27
Figure ~-1. Logic Example
DESCRIPTION
18792127
18794628
Quad 2-lnput NAND Gate
Quad 2-lnput NOR Gate
Hex Inverter
Hex Inverter with Open
Collector Output
SN 7410
Triple 3-lnput NAND Gate
Dual 4-lnput NAND Gate
SN 7420
Quad 2-lnput High Input
SN 7426
Voltage Interface NAND Gate
SN 7438
Quad 2-lnput Interface
NAN 0 Gate with Open Collector Output
SN 74132
Quad 2-lnput NAND Gate
Schmitt Triggers
Triple 3-lnput NOR Gate
SN 7427
SN 75452
Dual NAND Driver
Dual 0-Type Flip-Flops
SN 7474
ITT 9601 50 Retriggerable Monostable
Multivibrator
Dual Retriggerable Mono9602
stable Muttivibrator with
Reset
Hexadecimal Up/Down
8284
Counter
9308
Dual 4-Bit Latch
Dual 2-lnput Multiplexor
9322
5-Bit Comparator
9324
Differential Amplifier
733
High Speed Differential Com710
pactor
5-Bit Shift Register
7496
Phase Locked Loop
NE 562B
TIL 31 or
Photo Emissive Diode
1A48B
TIL 81 or
Silicon Photo Transistor
2B50B
Delay Line 300 ns
2N 6055 or
High PO\l\ler Transistor
TIP 640
SN
SN
SN
SN
7400
7402
7404
7405
-"For Form 2102141
Page 2
. Burroughs - B9489 Flexible Disk Drive Technical Manual
Circuit Detail
PIN DESIGNATION
6MB
SCHEMATIC
TRUTH TABLE
:=1 )-c
A
HI
OR:
HI
LO
LO
:=[>-c
C
B
HI
LO
HI
LO
LO
ttl
HI
HI
Figure 3-2. SN7400 Quad 2-Input NAND Gate
PIN DESIGNATION
PIN DESIGNATION
Vee
GRD
SCHEMATIC
TRUTH TABLE
OR:
:~
)-c
A
LO
HI
LO
·HI
B
LO
LO
HI
HI
SCHEMATIC
C
HI
LO
LO
LO
Figure 3-3. SN7402 Quad 2-Input NOR Gate
A
TRUTH TABLE
-----B
A
B
HI
LO
LO
HI
Figure 3-4. SN7404 HEX Inverter
Sec. 3 Page 3
Burroughs - B9489 Flexible Disk Drive Technical Manual
Qrcuit Detail
PIN
PIN DESIGNATION
DE~IGNATlO~
A
A
i3___rE
B
HI
LO
LO
Floating
B
TRUTH TABLE
C 0
B
A
HI
HI HI HI
SCHEMATIC
TRUTH TABLE
SCHEMATIC
OR:
~D~"'-----.
~
.-=:[__.
/
Figure 3-5. SN7405 HEX Inverter with
Open Collector Ou tpu t
PIN DESIGNATION
LO
HI
HI
HI
LO
E ALL HI
ANY LO
HI
LO
HI
HI
LO
= LO
HI
HI
HI
LO
HI
LO
E
LO
HI
HI
HI
HI
HI
HI
HI
HI
LO
LO
=
Figure 3-7. SN7420 Dual4-Input NAND Gate
PIN DESIGNATION
Vee
7
TRUTH TABLE
SCHEMATIC
OR:
A
HI
LO
HI
HI
LO
ALL HI
ANY LO
SCHEMATIC
B
HI
HI
LO
HI
LO
C
HI
HI
HI
LO
LO.
=LO
= HI
Figure 3-6. SN7410 Triple 3-Input NAND Gate
0
LO
HI
HI
HI
HI
:=1
)-c
:==t=>-.c
OR: _
A
GRD
TRUTH TABLE
C
B
HI
HI
LO
HI
LO
FLOATING
LO
HI
FLOATING
LO
LO
FLOATING
Figure 3-8. SN7426 Quad 2-Input High Input
Voltage Interface NAND Gate with
open collector output.
For Form 2102141
Burroughs - B9489 Flexible Disk Drive T~chnical Manual
Page 4
Circuit Detail
PIN DESGNATION
PIN DESIGNATION
. 7
7
GRD
SCHEMATIC
TRUTH TABLE
A
B
C
HI
HI
LO
OR:
HI
LO
Floating
-
LO
HI
Floating
LO
LO
Floating
A=D-.
B
C
SCHEMATIC
i=L>-D
- GRD
TRUTH TABLE
,iB
A
C
D
HI
HI
HI
LO
HI
LO
LO
LO
LO
LO
HI
LO
HI
LO
HI
LO
LO
LO
LO
LO
Figure 3-9. SN7438 Quad 2-Input Interface NAND
.
Gate with Open Collector Output
Figure 3-11. SN7427 Tripple 3-Input NOR Gate
PIN DESIGNATION
PIN DESIGNATION
SCHEMATIC
GRD
TRUTH TABLE
A
B
C
HI
HI
,LO
HI
LO
HI
LO
HI
HI
LO
LO
HI
There is no "Greyarea" with Schmitt triggers, the output goes low
as soon as both inputs are above approx +1.7V and goes high if
any input goes below approx +O.9V.
Figure 3-10. SN74132 Quad 2-Input NAND
Gate Sclunitt Triggers
TRUTH TABLE
-.SCHEMATIC
A
B
C
HI
HI
LO
HI
HI
LO
LO
HI
to
LO
HI
HI
The 75452 is used to illuminate indicator lamps. Each circuit can.
sink 300mA to ground when either or both inputs are low.
Figure 3-12. SN7S4S2 Dual NAND Driver
Burroughs - B9489 Flexible Disk Drive Technical Manual
Sec. 3 Page 5
Circuit Detail
rl~Vcc
PIN DESIGNATION
I
I
I
I
I
I
11
SET
R
13
8
0
DATA
CLOCK
9601
A
B
C
6
6
D
a
13
RESET
OV PIN 7
+5V PIN14
A Iowan "reset" resets the flip flop.
A Iowan "set" sets the flip flop.
The flip flop is triggered as the clock goes high, setting if Data is
high, resetting if data is low.
SN7474 Dual D-type Flip Flop.
The multivibrator is triggered by (A + B) *C *0.
If the multivibrator is triggered, a high pulse occurs at Q and a low
pulse occurs at Q for a period of time depending on Rand C. If the
timer is retriggered while it is timing out from a previous operation,
the timer retriggers to give the full period pulse starting from the
time of the second trigger. This may be disabled by joining Q to C
or D. This prevents retriggering until the timer has timed out.
ITT9601 50 Retriggerable monostable multivibrator
Figure 3-13. SN7474 Dual D-type Flip Flop
Figure 3-14. ITT9601SD Retriggerable
. Monostable Multivibrator
C
R
rl~+Vcc
14
6
10
o
9602
9602
A
B
ii
RESET-----'
+5V PIN 16
OV PIN 8
The multivibrator is triggered by a leading edge on A or a trailing edge on B. When triggered,
a high pulse occurs on Q and a low pulse occurs on Q. for a period of time depending on
Rand C.
An input pulse occuring before the timer has timed out will cause the timer to retrigger and
become TR UE for the full period again.
.
The timer may be cut short and reset at any time by applying a low to "reset".
Figure 3-1 S. 9602 Dual Retriggerable, Resettable, Monostable
MuItivibrator.
For Form 2102141
Burroughs - B9489 Flexible Disk Drive Technical Manual
Page 6
Circuit Detail
+5V
SET
12
CARRY IN
COUNT
ENABLE
CLOCK
2
4
01
02
04
08
08
A1
A2
B1
B2
C1
C2
01
02
CARRY OUT
The Hexadecimal up/down counter counts 0 through 15 and the
output is.l, 2,4 and 8 bits.
The "set" line going low sets the counter to 15.
The "reset" line going low resets the counter to O.
With "Carry In", "Set", "Reset" and "Count Enable" high,
counting will occur on the trailing edge of each clock pulse.
The direction of counting is controlled by the signal up/down. High
counts up, low counts down.
A high carry out is provided at 15 when counting up and at 0 when
counting down.
To count more than 4 bits, 2 counters can be placed in series with
the carryout of the first counter connected to the carry in of the
second.
Figure 3-16. 8284 Hexadecimal Up/Down
Counter
ENABLE 1
ENABLE2
A1
B1
C1
01
9
BO
9322
7
CO
4
2
DO
If "Enable" goes low the "1" inputs 0 R "2" inputs may be gated
to the "0" outputs depending on the "select" line. HIGH "select"
gates the"l ", LOW "select" gates the "2" inputs to the Output.
Figure 3-18. 9322 Quad 2-Input Multiplexor
ENABLE
A1
13
A2
12
B1
B2
B4
B8
B16
A4 11
A8 10 9324
A16---..;;,.9-t
16
18 9308
20
22
AO
15
ENABLE
SELECT
RESET
10
11
13
14
6
5
3
~--A>B
t----A
Both Enable 1 and Enable 2 must be low to latch the "2"
outputs in the same state as their respective "1" inputs. If either
"Enable" goes high the outputs are unaffected by the inputs.
A Iowan" Reset" resets the 4 latches to low regardless of the .
enable lines.
Figure 3-17. 9308 Dual 4-bit Latch
<
Figure 3-19. 9324 5-Bit Comparator
Sec. 3 Page 7
Burroughs - B9489 Flexible Disk'Drive Technical Manual
Circuit Detail
v+
PACKAGE
A
OUTPUT
C
NON INVERTING
INPUT
B
D
Differences in voltage AB are amplified and appear across Cand D.
Gains between 10 and 400 are possible by selecting resistances to
be connected between pins 4 and 9 and pins 10 and 3.
The 733 is selected for its gain stability, wide band with and low
phase distortion.
The 710 is used for comparing the read voltage against a
threshold. When the non-inverting input is more positive than the
inverting input the output goes high (+3V). When the noninverting input is more negative than the inverting input, the
output goes low (-0.5V).
Figure 3-21. 710 High Speed Differential Comparator
Figure 3-20. 733 Differential Amplifier
9
16
CLEAR
A2
82
C2
SERIAL
OV
02
E2
INPUT
8
CLOCK
1
A1
81
Vee
PRESET
ENABLE 8
--
The 7496 can be used as a serial to parallel converter, a parallel to serial converter or a 5 bit storage
register.
A LOW on "Clear" will reset the flip flops so that A thru E2 are low provh.:ad that "Preset enable" is
low.
The flip flops can be preset by applying an input to A1 thru Eland then making "Preset enable" high,
provided "clear" is high. A high in sets the flip flop, a low in leaves it in its previous state.
Clear and Preset functions are independent of the clock.
The leading edge of a clock pulse will make the A2 output equal to the serial in~iut, B2 = prtlvious A2,
C2 = previous B2, 02 = previous C2 and E2 = previous 02. Previous F..? is lost. When used in this mcdp,
"clear" must be high and "preset enable" must be low.
Figure 3-22. 7496 S-Bit Shift Regh,;'e .
For Form 2102141
Page 8
Burroughs - B9489 Flexible Disk Drive Technical Manual
Circuit Detail
Y+
16
LOW PASS
FILTER
14
DE-EMPHASIS
13
INPUT 1c>-_1_2~
PHASE
INPUT 2 0 - _1_1 ~ COMP.
CaMP
INPUTS
DEMODULATED
L.P.
"">----1--~ OUTPUT
9
FILTER
15
2
YCO OUTPUTS ~_3-+-_...",
LIMITER
~.C.O.
4
8
5
6
'--tt--'
BIAS OUT
Y-
TIMING
TRACKING RANGE
CONTROL
The purpose of the Phase Locked Loop is to provide an oscillator whose output Frequency is 2 times
the frequency of bits being read off the disk and is locked onto the data, that is the oscillator must
respond to variation in speed of the bits from the disk. This is used to generate clock pulses, data
windows etc, during read.
Refer to the block diagram. The IC contains 2 sections:
1. Voltage controlled oscillator (V.C.O).
The centre frequency of the oscillator is determined by the capacitance and voltage between
pins 5 and 6. It can be further modified up to ±15% internally by the output of the Phase
Comparator via the limiter.
2. Phase Comparator.
Only 2 inputs of the phase comparator are used the other 2 being AC coupled to general. One
input has data bits, the other is wired externally to the output of the V.C.O. The phase
compensator adjusts the speed of the V.C.O. so that the V.C.O. transitions occur in the centre
of the data input as illustrated in the timing diagram.
I :
rtl
DATA
(PIN 12) - - - - I I
m
I
~I
I '---------'
I '-------------
I
;-1_ _-,
v.c.o.
(PIN15)
The speed of response is determined by the components across the low pass filter, pins 14 & 13.
De-emphasis input and demodulated output are not used in the mini disk application. The tracking
range control is tied to one value.
Pin 1 provides a bias voltage of +8V regulated output.
Figure 3-23. NE 562B Phase Locked Loop
Burroughs - B9489 Flexible Disk Drive Technical Manual
Sec. 3 Page 9
Circuit Detail
~NODE
NO
CONNECTION ~
----4(11
I_N
300ns
~
The delay line is an LC Network which delays any input pulse or
AC waveform by 300 nano seconds.
I
I
I
CATHODE
I
When forward biased, this diode emits infra-red radiation. Forward
voltage drop is 1.8 volts max, forward current is 100 Ma. (approx).
I
IN
J---+---+------,r.-----'--
Figure 3-24. TIL 31 or lA48B Photo
Emissive Diode.
OUT~--~~--~--------~------~
,
I
I
COLLECTOR
-.)j
BASE
~
300ns
Figure 3-26. Delay line 300ns
EMITTER
EMITTER
This device is a Silicon phototransistor. A lens in the cap of the
device provides for high sensitivity.
+5V
BASE
COLLECTOR
,r-----------,
I
BASE l)-":'"___----t
I
I
I
I
I
,
When the infra-red light source shines on the lens, the transistor
switches on giving alow level into the circuit. With~no li~ht the
transistor is off, giving a high level in.
Figure 3-2S. TIL 81 or 2BSOB Silicon Photo Transistor
I
I
1...
I __________ _
I
__ J
EMITTER
This device is a high power Darlington NPN
transistor for switching unclamped inductive loads.
Figure 3-27. High Power Transistor 2N60S5
or TIP 640
For Form 2102141
Burroughs B9489 Flexible Disk Drive Technical Manual
SECTION 4
ADJUSTM'ENTS
INTRODUCTION
This section contains the test and adjustment procedures for the 9489 1 M BYTE Mini Disk Drive
Unit. Some adjustments may be carried out using an
oscilloscope, DTM 1000 or BDM 1250
as detailed.
\
All adjustments are· factory set and ideally should
NOT require re-adjustment unless parts have been
disturbed or replaced. Verify that any adjustment is
absolutely necessary before doing so.
B 80 HEX KEYBOARD COLLATED
TABLE
Certain options of the B 80 MTR require binary
input for cylinder addresses and data.
This binary data may be entered 4 bits at a time
by using the right-hand numeric keyboard on the
B 80 console, as follows:
Table 4-1.
SPECIAL TOOLS
The following special tools are required:
1880
1880
1880
1880
7883.
7917
7909
7891
Alignment Disk.
Alignment Meter.
Stepper Motor Adjusting Tool.
Upper Head Adjusting Tool.
ALIGNMENT DISK
The alignment disk absorbs moisture from or releases moisture to the atmosphere depending upon
the relative humidity of the atmosphere. This affects
the accuracy of the alignment disk. For this reason,
the alignment disk is written in a controlled environment (50% RH and 70· F or 20· C). The disk is
sealed in a special container until required for use.
Once the container is opened the alignment disk is
only accurate for 6 minutes. Track to track alignment
of the lower head must be performed within 6 minutes. After this time the alignment disk is known as
an "alignment check disk" and may be used for all
other adjustments requiring an "alignment check
disk" .
If the alignment disk is opened in a controlled environment (45 % ± 5% RH and 68· F ± 5· F or
20· C ± 0.5· C) and never removed from that envi-
ronment the 6 minutes time limit does not apply and
the alignment disk may be used to perform track to
track alignment of the lower head for a maximum of
5 times. It may also be used to perform all adjustments requiring an alignment check disk.
2102141-001
KEY SYMBOL
0
1
·2
3
4
5
6
7
8
9
00
000
C
RE
M
BINARY INPUT
HEX EQUIVALENT
0000
0
1
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
2
3
4
5
6
7
8
9
A
B
C
D
E
F
ALIGNMENT 1;RACK SELECTION
USING B 80 MTR
1. Select option 06 by depressing control keys PKS
and PKI5.
2. When the MTR asks for the cylinder address,
enter the required code from the table 4-2 using
\ the console right-hand key board.
3. MTR option 06 continuously seeks between two
addresses. When each cylinder address is indexed twice the mini-disk heads will remain at
that address and the stepper motor will have
seek pulses applied to it.
4-t
Burroughs B 9489 Flexible Disk Drive Tecl.mical Manual
Adjustments
Table 4-2.
ALIGNMENT
KEY SYMBOLS
TRACK
HEAD 0
HEAD 1
0
1
2
0/0/0/0
0/0/4/0
0/0/8/0
0/1/4/0
0/0/2/0
0/0/6/0
0/0/00/0
0/1/5/0
on/M/O
0/8/00/0
0/9/6/0
0/00/2/0·
O/OO/M/O
0/000/00/0
0/C/6/0
0/RE/2/0.
O/RE/M/O
5
31
34
37
40
43
46.
49
52
55
61
0/00/0/0
For a full description of the meter operation see
the media package supplied with the meter.
1. Check that the meter is set for the correct supply voltage and power up by connecting the line
cord.
2. Allow the meter to stabilize for one hour.
3. Check the operation of the meter as follows.
a. Connect the head plug to the calibrated socket and observe that the tri-bits present indicator is illuminated continously and that the
meter is reading zero.
(If the meter does not read zero, adjust the set
zero control until the meter reading is zero).
b. Switch the meter range to X10.
c. Switch the calibrator offset to 0.001 inch.
d. Move the calibrator switch to right and then
left. Check that the meter swings both ways
and reads 100 ± 10 each time.
e. Switch meter range to Xl.
f. Switch calibrator offset to 100 JJ inches.
g. Move the calibrator switch to right then left.
Check that the meter swings both ways and
reads 100 ± 10 each time.
Adjustments
Backlash Nut Adjustment
This adjustment should only be required when the
carriage block is removed or replaced.
The backlash nut pre-loads the carriage block
against the lead screw of the positioner. If the backlash nut is set too slack, the positioner will have too
much backlash. If the backlash nut is set too tight,
the positioner will have too much friction. Either of
these conditions can cause mispositioning of the
heads.
HEAD 0
HEAD 1
0000
0040
0080
0020
0060
0140
OOAO
0150
07EO
OSAO
0960
OAOO
0A20
OAEO
OBAO
0C60
0020
OOEO
0/./4/0
Alignment Meter Operating
Instructions
4-2
HEX EQUIVALENT
OF40
The clearance between the backlash nut and the
rear bush of the carriage block must be 0.03 to 0.06
inches.
Refer to figure 4-1.
LOCK ING
PLATE
-'---.JiF==:i1
REAR
BUSH
OF
--'...-----I-~..J.I.I.~_I_--........;;.__P-
BACKLASH
NUT
CARR lAG E
BLOCK
.030" (0.75mm)MIN.
.0611.5mm) MAX
Figure 4-1. Backlash Nut Adjustment
Adjustment
1. Loosen the locking plate adjusting screw and
slide the locking plate clear of the backlash nut.
2. Turn the backlash nut until there is a clearance
of 0.03 - 0.06 inches between the backlash nut
and the" rear bush of the carriage "block.
3.Insert the locking plate into a notch on the" backlash nut.
4.Check the clearance between the locking plate
and "the bottom of the notch.
Burroughs B 9489 Flexible Disk 'Drive Teclmical Manual
Adjustments
5. The mInImum clearance between the locking
plate and the bottom of the notch should be
0.02 inches. If not repeat steps 1 to 4 inclusive.
Refer to figure 4-2.
6. Tighten the locking plate retaining screw.
7. Carry out the track to track alignment adjustment.
Check
Refer to Track to Track Alignment Check.
.1. Check the alignment meter calibration as detailed under "Alignment Meter Operating Instructions" .
2. Connect. the alignment meter head lead into the
lower head socket (CONN 6) of the unit.
3. Insert an alignment check disk into the unit with
the label away from the blue release bar.
4. Seek track 00 Head 1. (Refer to Alignment
Track Selection using B SO MTR).
5. Seek track 43 head 1 and continue sending seeks
to this address (Refer to Alignment Track Selection using B SO MTR).
6,.Note the meter reading. (If it is greater than
1500u inches then head 1 should be realigned as
described under 'Track to Track Alignment
Adjustment).
7. Remove the alignment check disk.
S. Connect the alignment meter head lead into the
upper socket (Conn' 7) of the unit.
9. Re-insert the alignment check disk with the label towards the blue release bar.
10. Seek track 00 head O. (Refer to Alignment
Track Selection using B 80 MTR).
11. Seek track 61 head 0 and continue sending
, seeks to this address. (Refer to Alignment
Track Selection using B SO MTR).
12. The meter reading should be within + 500 Il
inches of that noted in Step 6 and of the
opposite polarity.
13. If the meter reading is outside this range then
Head 0 must be realigned as described under
"Track to Track Alignment Adjustment".
14. Return the alignment check disk to its storage
envelope.
15. Reconnect the head leads onto the PCB.
NOTE
Too much backlash will result in a noisy
positioner, especially on single track
seeks. Too much friction will cause the
positioner to miss steps and/or buzz on
track. After this adjustment the track to
track alignment must be re-adjusted ..
BACKLASH
NUT
LOCKING
PLATE
Figure 4-2. Locking Plate Clearance
Track to Track Alignment Check
When checking or performing track to track alignment the stepper motor must have pulses applied to
it. These pulses ensure that the lead screw is electrically detented and will rotate when the stepper motor
is rotated. In order to pulse the stepper motor, the
drive must have seek pulses applied continuously.
(For B SO use, the MTR Option 06 must be used.
This option continuously seeks between two addresses. If the same address is indexed twice, the
mini-disk heads will' remain at that address and the
stepper motor will have pulses applied).
Track to Track Alignment
Adjustment
.
This adjustment should only be required if one or
more of the following are performed __ 1. The carriage block is removed or replaced.
It is important not to connect or disconnect head
2.
3.
4.
5.
leads while the alignment disk is in the unit otherwise
degradation of the media will result.
If the tri-bit present indicator is flashing
on and off it is due to either:
2102141-001
stepper motor is removed or replaced.
upper head is removed or replaced.
spindle is removed or replaced.
backlash nut is adjusted.
Track to Track Alignment
, NOTE 1
1. Disk insertion error, or
2. Bad alignment disk, or
3. Pressure pad incorrectly aligned.
The
The
The
The
'or
To overcome friction in the carriage block/lead
screw/stepper motor, it is advisable to seek track 00
and back to the alignment track each time the
stepper motor or upper head arm is moved. This is
achieved by grounding TP5/4 and then removing the
ground. (The up to speed signal UTSF goes low
4-3
Burroughs 8 9489 Flexible Disk Drive Technical Manual
Adjustments
while the ground is applied. When the ground is removed the drive will recalibrate to track (0). (However, the B 80 MTR is designed to loop on the
failing instruction and will continue to send seek
pulses to the selected address. The first time the
ground is applied the B 80 will print a failure code).
The stepper motor adjustments can be more easily
performed if there is grease on the face of the
stepper motor in contact with the base plate. This
will be required on some older units and on all units
when a new stepper motor is fitted.
The steps requiring the use of the alignment disk
unit must be performed within 6 minutes of opening
the alignment disk package.
.
Adjustment
Refer to Track to Track Alignment.
1. Adjust the backlash nut as described under
"Backlash Nut Adjustment".
.
2. The drive must be allowed to stabilize for 1 hour.
Insert a disk, initialize it and then seek between tracks
00 and 8S for 1 hour. During this time the alignment
meter must be switched on to allow it to stabilize.
The alignment disk must be allowed to temperature
stabilize by keeping it sealed in its container in the
same room as the unit.
3. Check the alignment meter calibration as described under "Alignment Meter Instructions".
Head 1 Adjustment .
(Using Alignment Check Disk).
4. Connect the alignment meter head lead into the
lower socket (Conn 6) of the unit.
5. Install the stepper motor adjusting tool (PIN
1880 7909) onto the body of the stepper motor.
(This can be done easily by removing the tool
handle first).
6. Insert the alignment check disk (NOT the sealed
disk) into the unit with the label away from the
blue release bar.
7: Seek track 00, Head 1. (Refer to Alignment
Track Selection using B 80 MTR).
.
8. Seek track 43, head 1 and continue sending
seeks to this address; (Refer to Alignment
Track Selection using B 80 MTR).
9. Slacken off the stepper motor clamp screws sufficiently to be just able to rotate the motor body
when using the stepper motor adjusting tool.
10. Rotate the stepper motor in either direction
(that is, clockwise and counter clockwise) until
the tri-bits present indicator illuminates.
;"
11. Looking from the rear of the unit, rotate the
.stepper motor clockwise until the tri-bits present indicator is exting~ished.
4-4
12. Rotate the stepper motor slowly counter-clockwise until the tri-bits present indicator illuminates (the light must remain on continuously, and not flashing). Refer to Notes 1 and 2.
13. Continue rotating the stepper motor until· a
reading of ± 140 IJ inches is obtained on the
alignment meter. Frequently seek track 00 and
back to track 43 while making this adjustment.
14. Tighten the stepper motor clamp screws progressively to 10 Ib inches.
15. Seek to track 00 and then back to track 43,
Head 1. (Refer to Alignment Track Selection
using B 80 MTR).
16. Check that the tri-bits present indicator is iIIu..;
minated and that a meter reading of ± 140 IJ
is obtained.
17. Repeat steps 15 and 16 several times and ensure that the conditions in step 16 are met
every time. (If not repeat steps 7 to 17 inclusive).
18. Remove the stepper motor adjusting tool and
the alignment check disk.
NOTE 2
When a seek is performed to track 00
and back to track 43 the tri-bits present
indicator may not light. If the indicator
does not light, the track 00 transducer
requires adjustment. Proceed as follows:
a. Seek track 00, Head 1
b. Seek track 43, Head 1
c. Rotate the stepper motor until the tri-b~ts
present indicator lights.
d. Clamp the stepper motor and adjust the track
00 transducer as described "Under Track 00
Adjustment" .
e. After adjusting the track 00 transducer carry
out the "track to track alignment adjustment"
from step 6.
Head 0 Adjustment (Using Alignment Check
Disk)
19. Fit the upper head adjusting tool PIN 1880
7891. (Turn adjusting screw into the upper
head arm to allow recalibration when disk is
put into the drive).
20. Connect the alignment meter head lead into
the upper head socket (CONN. 7) of the unit.
21. Slacken the two upper head arm retaining
screws nearest to the head. (The screws should
be slackened just sufficiently to allow the upper head arm to be moved with finger pressure).
22. Insert the alignment check disk (not the sealed
disk) with the label towards the blue release
bar.
Burroughs B 9489 Flexible Disk Drive Teclmical Manual
Adjustments
23. Seek track 00, Head _0. (Refer to Alignment
Track Selection using B 80 MTR).
24. Seek track 61, Head
and continue sending
seeks to this address. (Refer to Alignment
Track Selection using B 80 MTR).
25. Move the upper head arm backwards and forwards by hand until the tri-bits present indicator is illuminated.
26. Move the upper head arm towards the rear of
the unit until the tri-bits present indicator is extinguished.
27. Using the upper head adjusting tool (P/N 1880
7891) move the upper head arm SLOWLY towards the front of the unit until the tri:-bits
present indicator is illuminated. (The light
must remain on continuously·, and not flashing).
28. Continue moving the upper head arm until a
meter reading of ± 140 Il inches is obtained.
(Frequently seek track 00 and back to track 61
whilst making this adjustment).
29. Tighten the two retaining screws progressively
to 6lb inches.
30. Seek track 00 and back to track 61, Head 0
(Refer to Alignment Track Selection using
B 80 MTR).
31. Check that the tri-bits present indicator is illuminated and that a meter reading of ± 140 Il
inches is obtained.
32. Repeat steps 30 and 31 several times and ensure that the conditions in step 31 are met
every time. If not repeat steps 22 to 32 inclusive.
33. Remove the alignment check disk and upper
head adjusting tool.
34. Reconnect the head leads onto the PCB.
°
NOTE
The upper head is now aligned to the
lower head within 300 Il inches. Before·
continuing with the sealed alignment
disk carry out a circumferential alignment check.
NOTE
The lower head must now be accurately
aligned usirig the ,sealed alignment disk
(P/N 1880 7883). Ensure that you are
ready to perform the adjustment before
opening the sealed package. Once the
package has been opened the alignment
must be performed within 6 minutes.
Head 1 Fine Adjustplent (Using Sealed
Alignment Disk) .
35.· Connect the alignment meter ·head iead into
the lower head socket (CONN. 6) of the unit.
36. Install the stepper motor adjusting tool (P/N
1880 7909) onto the body of the stepper motor.
2102141-001
37~· .Remove
thtt alignment disk from its sealed
. container and insert it into the unit with the label away from the. blue release bar.
38. Carry out steps 7 to 17 inclusive within 6 minutes
39. Remove the alignment disk. (This disk may
now be· used as an alignment. check disk and
the. label should be marked with a felt tipped
pen to that effect).
40. Remove the stepper motor adjusting tool.
41. Reconnect the head leads onto the PCB.
42. Carry out a circumferential alignment.
Circumferential Alignment
This adjustment compensates for the mechanical
tolerance between the index/sector transducer and
the recording heads. (The procedure sets the interval
between the start of an accurately recorded data
burst and the next sector output from the index/sector decode circuit).
This adjustment should only be required if
1.
2.
3.
4.
5.
6.
7.
The carriage block is replaced.
The upper head is replaced.
The stepper motor is replaced.
The spindle is replaced.
The backlash nut. is adjusted.
Head 0 has been adjusted.
The,index/sector transducer or light source is
moved· or replaced.
8. Any part of the index/sector delay monos table
Circuit is replaced.
Adjustment: Oscilloscope
I.Insert the alignment check disk (NOT a sealed
disk) with the label towards the release bar.
~.Set the oscilloscope up as follows:
.
I
CHANNEL A
50 m VOLT/DIV - AC Coupled
CHANNEL B
I 2 VOLT/DIV - DC Coupled
ADD MODE
TIMEBASE
2Q.... secldiv
EXTERNAL TRIGGER
TP 15 (DATA)
3. Connect the oscilloscope as follows
CHANNEL
TEST POINT
A
8
TP 15
TPS/4(SECTOR)
4.Seek track 40, head 0 (refer to Alignment Track
Selection using B 80 MTR).
The waveform displayed. should be as shown in
figure 4-3.
4-S
Burroughs B 9489 Flexible Disk Drive Technical Manual
Adjustments
5. Seek track 40, head 1 (refer to Alignment Track
Selection using B 80 MTR). The waveform displayed should be as shown in figure 4-3.
6. The waveforms from both heads should be equidistant about 156 usee and within the range 150
+ 24 II sec.
"7. Adjust RV1 until the sector pulse is 150 ± 24
II sec from the start of the data burst for each
head.
8. If the adjustments for steps 4 to 7 cannot be
achieved then the upper head arm should be
realigned as detailed under Track to Track
Alignment.
DATA BURST
SECTOR PULSE
150::t 24
,.as
3. Set up the DTM 1000 as follows
PROBE
B
1C6 Pin 4 (location Kl)
+ve
TPS/4 (Sector) (location J7)
+ve
FUNCI10N:"INTERVAL BC"
",
4. Seek track 40, head 0 and note the meter reading (refer to Alignment Track Selection using
B 80 MTR)~
5. Seek track 40, head 1 and note the meter reading (refer to Alignment Track Selection using
B 80 MTR).
,
6. Adjust RVI until the meter readings obtained
from both heads are equidistant about 150"sec
and within the range of 150 ± 24 JA sec.
7. If the adjustment for steps 4 to 6 cannot be
achieved then the" upper head arm should be
realigned as detailed under Track to Track
Alignment.
NOTE
To aid future circumferential alignment
adjustments using the DTM 1000 or
BOM 1250 it is recommended that a
test point be soldered on the track leading from Capacitor C18, at the point
marked X, between resistor R150 and
diode 027 (refer to figure 4-4). A 30K
ohm jumper resistor can then be connected between this test point and the
+5 volt line as per step 2 of the adjustment procedure. For the test point use
tin lead post PIN 1878 5238.
Figure 4-3. OsdUoscope Wave Forms
Adjustment: DTM 1000
1. Insert the "alignment check disk (NOT a sealed
disk) with the label towards the release bar.
2. Connect a 30 K ohm jumper resistor from +5
volts to the test point at the ICS end of
Capacitor C18. Refer to figure 4-4.
PIN 1878 5238)
Adjustment: 80M 1250
1. Insert the alignment check disk (NOT a sealed
disk) with the label towards the release bar.
2. Connect a 30K ohm jumper resistor from + 5
volts to the test point at the IC8 end of
capacitor C18. (Refer to figure 4-4).
3. Set up the BOM 1250 as follows
D27
.-IL5~
. . ._ - , . ,
A§§
H
PROBE
TEST POINT
SLOPE
B
C
IC6 Pin 4 (location Kl)
TPS/4 (Sector) (Location J7)
FUNCI10N: "TIME B-..C"
+ve
+ve
j.
Figure 4-4. Component Layout Showing the
Position of Recommended Test Point
4-6
SLOPE
C
..
SOt.DER ADDITIONAL TEST POINT
AT POSITION MARKED X
(USE TIN LEAD POST
TEST POINT
•
4. Seek track 40, head 0 and note
ing (refer to Alignment Track
B 80 MTR).
5. Seek track 40, head 1 and note
ing (refer to Alignment Track
B 80 MTR).
-
the meter readSelection using
the meter readSelection using
Burtoughs B 9489 Flexible Disk Drive Technical Manual
Adjustments
6. Adjust'RVI until the mete~ readings obtained
from both heads are equidistant about 150 p. sec
and within the range 150 ± 24 II. sec.
7., If the adjustment for steps 4 to 6 cannot be
achieved then the upper head arm should be
realigned as detailed under Track to Track
Alignment.
Track 00 Adjustment:
The track 00 transducer defines the position- of
track 00. One phase of the stepper motor is assigned
as the track 00 phase. Any incorrect adjustment of
the track 00 transducer will cause a position error
which is a multiple of 3 tracks away from- the required 'track.
The adjustment should only be required if:
1.
2.
3.
4.
5.
6.
7.
8.
The carriage block is replaced.
The upper head is replaced.
The lower head is realigned.
The stepper motor is replaced.
The spindle is replaced.
The backlash nut is adjusted.
The track 00 transducer PCB is replaced.
Any par~ of the track 00 circuit is replaced.
NOTE
If any of the items (1) through (6) are
performed, the Track to Track Alignment must be checked before adjusting
the track 00 transducer.
NOTE
When making any adjustments make
sure that the vane can pass through the
transducer without touching. it.
Adjustment
1. Check the alignment meter calibration as detailed under "Alignment Meter Operating Instructionsn •
2. Connect the alignment meter head lead into the
lower head socket. (Conn. 6) of the unit.
3. Insert an alignment check disk into the unit with
the label away from the blue release bar.
4. Seek Track 43, Head 1 (refer to Alignment
Track' Selection using B 80 MTR).
5. Check that the tri-bits present indicator is illuminated. If tri-bits are present go to step 9. If
tri-bits are not present go to step 6.
6. Seek the following tracks until tri-bits are present - 46, 40, 49, 37, 52, 34, 55, 31 (refer to
Alignment Track Selection using B 80 MTR).
Loosen the mounting screws of the track 00
transducer PCB. If tri-bits are present at a track
higher than 43 move the track 00 transducer
PCB towards the spindle. If tri-bits are present
at a track lower than 43, move the track 00
transducer PCB away from the spindle.
2102141-001
7. Tighten the mounting screws.
8. Seek Track 00 (refer to Alignment Track Selection using B 80 MTR) and then go to step 4.
9. Alternately seek between track 02 and track 01
(refer to Alignment Track Selection using B 80
MTR).
10. DTM 1()()() or BDM 1250.
Set uP. the DTM 1()()() or BDM 1250 as follows:
PROBE
A
TEST POINT
SLOPE
TP 6/6
-VE
FUNCfION: WIDTH
Oscilloscope
Set up the oscilloscope as follows:
PROBE
TEST POINT
SLOPE
A
AMPLITUDE
T1MEBASE
TRIGGER
TP 6/6
-VE
2 VOLT/DIV
0,5 ms/DIV
CHANNEL A
11. Check for a negative going pulse width of between 2.5 ms to 3.0 ms at TP 6/6.
a. If the pulse width is less than 2.5ms loosen
the PCB mounting screws and move the PCB
by a small amount towards the spindle.
b. If the pulse width is greater than 3ms loosen
the PCB mounting screws and move the PCB
by a small amount away from the spindle.
12. Tighten the PCB mounting screws.,
13. Seek from track 00 to track 43 at least five
times, checking for tri-bits at track 43 each .
time (refer to Alignment Track Selection using
B 80 MTR).
14. If the tri-bit present indicator does not illuminate at track 43, then repeat the adjustment
procedure.
Phase Locked Loop and Data
Windows
'. These adjustments are required to provide the correct RD CLK, and data windows for data decoding.
NOTE
These adjustments are required if any
of the components on sheet 2 of the
master drive Test and Field documents
are replaced (except IC 53, Ie 57 and
their related components).
NOTE
On units below SIN B200450-018 the
value of 05 must be changed before
adjusting the PLL. Replace C75 with a
1()()() pF capacitor PIN 1877 1618.
4-7
Burroughs B 9489 Flexible Disk Drive Te~lmica1 Manual
Adj ustments
NOTE
On units below SIN B205950-018 (Glenrothes) and SIN 15165236 (Guadalajara)
LIN 2141-010 must be fitted after the
replacement of the phase locked loop
(PLL) IC, before the adjustments can
be carried out.
5. Adjust RV4 until the waveform shown in figure
4-5 becomes unstable as shown in figure 4-7(a).
6. Counting the number of turns, adjust RV4 until
the waveform becomes unstable as shown in figure 4-7(b).
7. Adjust RV4 in the opposite direction by the
number of turns divided by 2. The \ waveform
should be as shown in figure 4-5 with RV4 adjusted to its mid-range position.
Phase Locked Loop Adjustment
Oscilloscope
1. Insert the alignment check disk (NOT a sealed
disk) with the label towards the release bar, into
the master drive.
2. Seek track 05, either head and read continuously. (Refer to Alignment Track Sele~tion using
B 80 MTR).
3. Connect the oscilloscope as follows:
PROBE
I
A
I
TEST POINT
CHANNEL A
IC61 (PLL) end of C75 •
1 Volt/div
TIMEBASE
S msec/div
EXTERNAL TRIGGER
TP 81S (Index)
.
(b)
(a)
Figure 4-7. Unstable Waveforms
OTM 1000 or 80M 1250
1. Connect the DTM 1000 or BDM 1250 up as fol-
lows
• NOTE
Fitting a chip-clip to IC61 may cause a
slight change in its operating characteristics.
PROBE
TEST POINT
A
TP 11/1 (PLL OUTPUT)
FUNCTION: FREQUENCY
4. The waveform should be as shown in figure 45.IIncorrect waveforms ~e shown in figure 4-6.
2. Connect test point TP 21 (MFM RD) to 0
Volts.
3. Adjust RV4 until a meter reading of 415 ±
10kHz is obtained.
Data Window Adjustment
L
Figure 4-5. Corred Waveform
Oscilloscope
1. Disconnect the Master/Slave inter-connecting cable
(connector 2) at the Master Drive Unit.
2. Connect jumper leads to the following points on the
master board
TO.
FROM
PIN 11 (CONN 2)
PIN 31 (CONN 2)
TP 10/2
PIN 16 (CONN 2)
3. Set up the Oscilloscope as follows:
I
CHANNEL A
CHANNELB
I
ADD MODE
TIMEBASE
INTERNAL TRIGGER
2 VOLT/DIV
2 VOLT/DIV
I
I
DC COUPLED
DC COUPLED
O.S",S/DIV
4. Connect the oscilloscope as follows:
Figure 4-6. Incorred Wavefonns
4-8
PROBE
TEST POINT
SLOPE
A
B
TP 11/2
TP I1n
+VE
+VE
5. Select drive 2 (slave) using the MTR or disk
exercizer.
Burroughs B 9489 Flexib~ Disk Drive Technical Manual
Adjustments
6. Adjust RV2 until the pulse .width at test point
TP 11/2 is 1.24 ± O.l,.s.
'. .
7. Adjust RV3 until the leading edge of the pulse
at test point TP 11/7 occurs - midway along the
pulse on test point TP 11/2 (figure 4--8(a».
NOTE
For boards with artwork revision K, invert Channel B to obtain the same displayas in figure 4-8(b). Adjust RV3 until the lagging edge of the pulse at test
point TP 11/7 occurs midway along the
pulse on test point TP 11/2
8. Remove all jumper 'leads and reconnect the
master/slave inter-connecting cable (connector
2) ..
DTM 1000
1. Disconnect the Master/slave inter-connecting cable (Connector 2) at the· Master drive unit.
2. Connect jumper leads to the following points on
the master board.
FROM
, TO
PIN 11 (CONN 2)
TP 10/2
(a)
PIN 31 (CONN 2)
PIN 16 (CONN 2)
3. Select Drive 2 (Slave) using the MTR or Disk
Exerciser.
4. Set up the DTM 1000 as follows:
PROBE
A
1
I
1
TEST POINT
TP 11/2
FUNCTION: "WIDm"
I
SLOPE
+VE
5. Adjust RV2 until a meter reading of 1.24
O.l"S is obtained.
6. Set up the DTM 1000 as follows:
PROBE
TEST POINT
SLOPE
B
C
TP 11/2
TP 11n
FUNCTION: "INTERVAL BC"
+VE
+VE
±
7. Adjust RV3 until a meter reading of 0.62 ±
0.05~S is obtained.
8. Remove all jumper leads and re-connect the
master/slave interconnecting cable (connector
2).
(b)
80M 1250
1. Disconnect the Master/Slave inter-connecting
cable (connector 2) at the Master Drive Unit.
2. Connect jumper leads to the following points on
the Master Board.
FROM
TO
PIN 11 (CONN 2)
TP 10/2
1.24 to.1 #'I
Figure 4-8. Data Window Adjustment
2102141-001
PIN 31 (CONN 2)
PIN 16 (CONN 2)
3. Select Drive 2 (Slave) using the MTR or disk
exerciser.
4 Set U1P the BDM 1250 as foIIows:
PROBE
TEST POINT
1
SLOPE
A
TP 11/2
FUNCTION: "WIDTH"
I
+VE
5. Adjust RV2 until a meter reading of 1.24 +
O.l"S is obtained.
4-9
Burroughs B 9489 Flexible Disk Drive Techilical Manual
Adjustments
. 6. Set up the BDM 1250 as follows:
PROBE
TEST POINT
SLOPE
B
TP 11/2
TP lin
FUNCTION: "TIME B+C"
+VE
+VE
C
4-10
7. Adjust RV3 until a meter reading of 0.62
O.051'S is .obtained.
±
8. Remove all jumper leads and re-connect the
master/slave interconnecting cable (connector
2).
Burroughs - B 9489 Flexible Disk Drive Technical Manual
Sec. 5 Page 1
SECTION 5
MAINTENANCE PROCEDURES
REMOVAL AND REPLACEMENT PROCEDURES
pressure pad.
Fit head lifting plate.
FASCIA
Removal
STEPPER MOTOR AND CARRIAGE
Remove nuts securing the four corners of the fascia
to the baseplate. Gently remove fascia from baseplate.
Removal
Replacement
Fascia door and receiver open. Carefully refit fascia
to baseplate. Fit the nuts securing the four corners of the
fascia to the baseplate.
RECEIVER
Disconnect stepper motor from PCB.
Remove backlash nut locating plate.
Remove screw and washer from the end of the lead
screw.
Remove the three screws securing the stepper motor.
Carefully screw the lead screw out of the carriage and
backlash nut.
Replacement
Removal
Remove fascia.
Remove head-lifting plate.
Remove pressure pad lifting arm from pressure pad
solenoid.
Release receiver from pivot pins.
Replacement
Fit receiver on to pivot pins.
Fit pressure pad lifting arm onto pressure pad solenoid.
When the pressure pad solenoid is energized there
should be clearance between the lifting arm and the
Locate carriage onto guide rail.
Fit lead screw through casing
Place carriage onto lead screw.
Screw backlashsnut onto lead screw.
Fit compression spring onto lead screw.
Screw lead screw into carriage block.
Compress the spring by one full turn of the backlash
nut.
Fit locking plate.
Fit screw and washer into end of lead screw.
Connect stepper motor to PCB.
Perform head adjustments.
STEPPER MOTOR
LOCKING PLATE
GUIDE RAIL
Figure 5-1. Stepper Motor and Carriage Assembly
Form 2102141-002
Page 2
Burroughs - B 9489 Flexible Disk Drive Technical Manual
Maintenance Procedures
HEAD SOLENOIDS
FAULT FINDING
These can be removed after removal of the receiver.
Faults are traced to the failed component using the
MTR procedures.
LAMPS
RECOVERY OF CONTAMINATED DISKS
Removal
Press together the sides of the lamp cover and remove.
The lamps are removed using extractor tool, part number
16229825.
Contaminants may cause loss of data bits by damaging
the surface of the disk. A contaminated disk may transfer
the contamination to the drive and affect its ability to
transfer data correctly.
If a disk has been mishandled and contamination has
occurred, the following procedure may be followed:
Replacement
Push the lamp into the holder.
Push on the lamp cover.
1.
Remove the contamination from the disk.
If the contamination is a liquid, swab-up with a
folded tissue, using as little force as possible.
If the contamination is a powder (such as
cigarette ash or dust) carefully shake it off.
2.
Load the "cleaned" disk into a drive and copy
the data onto a new disk.
3.
The "cleaned" disk must be thrown away.
PRESSURE PADS
The pressure pads can be removed or replaced by
spreading the pressure pad arms over the pivot pin.
DRIVE BELT
This is always fitted with the soft side next to the
pulley.
To convert from 50Hz to 60Hz or from 60Hz to 50Hz
remove the motor pulley and refit as shown in figure 5-2.
Every 1500 hours running time or 1 year whichever
comes earlier, replace pressure pads and motor drive belt.
Lubrication is not required for any part.
Cleaning of disks should not be necessary if the
handling procedures (section 1 page 8) are followed.
CERTIFIED DISKS
PREVENTIVE MAINTENANCE GUIDE
I
If the contamination has reached the recording
surface, cleaning is unlikely to remove all the contamination.
It is important to use Burroughs certified disks.
Non-certified disks may have too much peak-shift
and cause read errors.
MOTOR
MOTOR
PUllEY
PUllEY
50Hz
60Hz
Figure 5-2. 50/60Hz Conversion
Burroughs - B 9489 Flexible
Dis~
Drive Technical Manual
Sec. 5 Page 3
Table 5-1. PCB Test Points
NAME
DESCRIPTION
TEST POINT
+24V
J3 PINS 1,6
+12V
+5V
-12V
J3 PIN 5
J3 PIN S
+24V GND
J3 PIN 2
J3 PIN 7
J3 PINS 4,9
+6V GND
±12V GND
CYLINDER ADDRESS LINES 1 THRU 64
J3 PIN 3
PQS
AB
ADDRESS COMPARATOR OUTPUT
CABSELT
CABINET SELECT
TP6/3
TP 6/1
PQS
CLKIa
COUNTDOWN
COUNT UP
DATACLK
CLOCK PHASE
COUNT DOWN
ADD1
thru
ADD 64
FILE OP
FILE OP IND
HDADD
HD.LD.T.O.
HD SELT.
COUNT UP
DATA CLOCK
FILE OPERATIONAL
FILE OPERATIONAL INDICATOR
HEAD ADDRESS
HEAD LOAD TIME OUT
HEAD ·SELECT
TP 5/6
IC24 PIN a
IC24 PIN 11
TP 10/7
IC13 PIN 6
IC27 PIN 5
1C32 PIN 9
TP5/6
PQa
IC16 PIN 5
ILL ADD
INDEX
ILLEGAL ADDRESS
INDEX PULSES
LOWER SOL
MFMRD
MFMWRT
POS CLK
LOWER PRESSURE PAD SOLENOID
MILLER FREQUENCY MODE READ
MILLER FREQUENCY MODE WRITE
POSITIONER CLOCK
POS CLK EN
POSN SETT
POSITIONER CLOCK ENABLE
POSITIONER SETTLED
TP 6/2
1C44 PIN 12
POS STOP
POS. TIME OUT
POSITIONER STOP
ICPIN
PSK
POSITIONER TIME OUT
POSITIONER SEEK
1C33 PIN 6
TPa/2
RDCLK
RDDATA
READ CLOCK
READ DATA
IC60 PIN 13
TP 10/6
TP 10/5
RDEN
RTN
READ ENABLE
TPS/5
Q 13
TP 1/2
TP9/4
IC39 PIN a
RETURN LINE FOR INTERFACE
SIGNALS
PQS
SECTOR
SEEK
SECTOR PULSES
SEEK COMMAND
TPS/4
PQa
SEEK INC.
SET TKoo
SEEK INCOMPLETE
POSITIONER AT TRACK 00
NOT USED
IC11 PIN a
SiMla 1
SiMla 2
STEPPER MOTOR PHASE 1
STEPPER MOTOR PHASE 2
STEPPER MOTOR PHASE 3
WRITE INHIBIT
WRITE INHIBIT INDICATOR
WRITE CLOCK
WRITE DATA
WRITE ENABLE
UNIT SELECT
TP 7/S
TP 7/7
TP 7/6
S/M~3
WIH
WIHIND
WRTCLK
WRTDATA
WRTEN
UNITSELT
UPPER SOL
UTSF
XDSEC
XDSEC RTN
XD TKoo
XDTKoo RTN
XDWIH
XDWIH RTN
750 KHz
--
UPPER PRESSURE PAD SOLENOID
UP TO SPEED FLlp·FLOP
SECTOR TRANSDUCER
SECTOR TRANSDUCER RETURN
TRACK 00 TRANSDUCER
TRACK 00 T~ANSDUCER RETURN
WRITE INHIBIT TRANSDUCER
.' WRITE INHIBIT TRANSDUCER RETURN
TPa/6
1C27 PIN 3
TP9/2
PQa
PQS
PQS
Q12
TP5/3
J4 TP 6/4
J4
J4 TP6/6
J4
J4 TP a/6
J4
TP 10/2
For Form 2102141
Page 4
Technical
Manual
Burroughs - B 9489 Flexible DIsk Drive
\
.
Maintenance Procedures
r---- . .
I
~--
--.- --------------------------------------.,.
~.-----_
S:~~C <..:--"'I'":--~ :~~ I
MASTER UNIT
INDEXI
-----I SECTOR
TRANSDUCER
DC
POWER
FROM
SYSTEM
TRACK
00
TRANSDUCER
COMMON
WRITE
INHIBIT
TRANSDUCER
ELECTRONICS
FILE OP
INDICATOR
WRITE INHIBIT
INDICATOR
STEPPER
MOTOR
"'-----4
UPPER HEAD
SOLENOID
LOWER HEAD
SOLENOID
L ___________________________________________ J
r------ --- ------------------------------------,
SLAVE UNIT
INDEXI
SECTOR
TRANSDUCER
TRACK
00
TRANSDUCER
SLAVE
ELECTRONICS
FILE OP
INDICATOR
WRITE INHIBIT
INDICATOR
I
VE
~~_-+_ _~rxH, MDRO'TOR
I
~'::M <...:
110VAC
......
l11l.
STEPPER
MOTOR
~----1
LOWER HEA
SOLENOID
_1- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ -
-
-
_ _ _ _ _ _ _ _ _ _ _ _ _ _ ..1
Figure 5-3. Connection Block Diagram
Burroughs - B 9489 Flexible Disk Drive Technical Manual
Sec. 6 Page 1
SECTION 6
INSTALLATION PROCEDURES
INST ALLATION PROCEDURES
Unpack the unit and check for any damage. Check
the following items:
The motor pulley should be set for the correct mains
frequency (see section 5).
The drive belt should be fitted with the soft side
nearest to the pulleys.
The spring should be fitted correctly to the pressure
pad arm.
The pressure pad arm should be on the correct side of
the solenoid lever.
All plugs should be correctly fitted.
All PCB mounting screws should be tight ..
For a master unit connect the lIb cable, DC power
cable and AC power cable to the host system.
For a slave unit connect the 40 way cable from
master to slave and connect the AC power cable to the
host system.
Check all power supply voltages to be within
± 10%.
Perform host system confidence tests.
For Form 2102141
Burroughs
FIELD ENGINEERING
REV
NO.R2141 (000)
RELIABILITY
STYLE/MODEL
IMPROVEMENT
T.I.O. GLENROTHES NOTICE
*
DATE
INDEX
TOP
1
OF
1
TOP UNIT NO.
ORIGINATOR:
*
PAGE
A/B 9489
UNIT
SEE
BELOW.
28 February 1978
NUMBERS
1878 9347
1881 2651
1879 4503
1881 0192
1881 2644
1881 0184
DATE
TITLE
001
11-29-76
A.C. CONNCETOR.
002
11-29-76
INDICATOR LAMP FAILURE.
RIN NO.
003 (REV)
5- 1-77
MAINTENANCE TEST ROUTINE.
004
6-29-77
HEAD BONDING.
005
9-26-77
INDEX TO DATA BURST
ADJUSTMENT.
006
10-26-77
007
2-28-78
008
I
F .E. Dist
BS
Codc.L...--_ _.....
Printed in U.S. America
2 .... 28-78
o
TRIBIT ALIGNMENT METER
DOCUMENTATION.
HEAD LEAD RELIABILITY
HAZARD.
MODIFIED ANNULUS AND STUD.
THIS CHANGE IS A RESULT OF FIELD REPORTING
FOR LIBRARY BINDER
34 3A
FOR F.E. TECHNICAL MANUAL FORM
_2_1_0_2_1_4_1_ _ __
This package includes RIN 2141-001 thru -008
Bu~roughs
SYSTEM SEAlES
B.D.S.
RELIABILITV
STYLE4M~Di~
FIELD ENGINEERING
B9 8 -
IMPROVEMENT
cr.I~I.~.T8~:GLENROTHES '..
I
STOSINPlALL. TIME
~~lTJ~FBi&I9~7-018
O. H
~
E
TlTb
A. • Connec tor for Mini-Disk
o
2
R2141-001
1 OF 2
T°'i~~hT ~~S4
NOTICE
TYPE OF CHANGE
FUNCTIONAL
No.
PAGE
UNl[ W1ffi/Jlli.l~NI-DISK
DAT
29 November '76
0 IMPROVED RfLiABlllTY
(j IMPROVED MAINTAINABI'LiTY
INSTALLATION IS MANDATORY
PREREQUISITE:
None.
CONDITION:
Shock hazard when the unit is disconnected from the host system.
CORRECTION:
Install AC Power cable and connector provided by this. RIN.
PARTS REgUIRED:
Part Number
Descri:etion
guantity
U.S. Unit List Price
1881 1547
AC Power Cable
1
$11.179
1446 9738
Female Connector
1
$ 0.545
1877 7599
Pin
3
$ 0.09
PROCEDURE:
1.
Ensure that power is removed from the host system.
2.
Remove the AC cable from theAC Terminal Block··{B9489 Illustrated Parts
Catalog, Form 2102158, item C Plate 5).
3.
Install the AC Power Cable (1881 1547) as follows (Refer to Figure 1).
Install the ground wire (Green) on the stud between the terminal block and
the base casting.
Install the live wire (Black) in TB3.
Install the neutral wire (White) in TB4.
F.E. DiSI.,
Code ....._BL
_ __
Printed," U. K.
o THIS
CHANGE: tS· A RESULT OF FIELD REPORTING
FOR LIBRARY BINDER
343
FOR F.E. TECHNICAL MAt'IUAL FORM __2_10_2_1_4_1_ _ __
,"'- 'R2141-001
Page 2 of 2
STEP MOTOR
TB3
••
••
--+ ••
TB4
---+ • •
EARTH STUD
BASE CASTING.
Figure 1
4.
Install one pin (1877 7599) onto each of the wires on the AC Cable
from the host system.
5.
Install the p.ins into the female connector (1446 9738) as shown in Fig. 2.
BLACK
GREEN
WHITE
Figure 2
6.
Connect the AC power cable connector to the female connector.
IMPROVEMENT
I
STO INSTALL. TIME
STYLE/MODEL
B9489-1/2
NOTICE
2
UNIT DfSCRIPTION
UNITS AFfECTEO
1 MBYTE MINI DISK
B202000-018
HR.
TITLE
INDICATOR LAMP FAILURE.
o
10F
1818 9354
0.5
TYPE OF CHANGE
FUNCTIONAL
R2141-002
PAGE
TOP UNIT NO.
'..
I.T.I.O.GLENROTHES.
B.D.S.
RELIABILITV
FIELD ENGINEERING
ORIGINATOR:
No.
SYSTEM SERIES
B~rroui\hs
o
DATE
29 November .•. 1976
~ IMPROVED RELIABILITY
IMPROVED MAINTAINABILITY
PREREQUISITE
None.
CONDITION
Early failure of indioator lamps.
CAUSE
Exoessive voltage applied to lamps.
CORRECTION
Install 220.n. resistors in series with lamps in plaoe of 130.n.. resistors at
R85
and
R86.
PARTS REQUIRED
PART NUMBER
DESCRIPrION
1816 6110
220'.n.!
W
QTY.
2%
2
U. S. UNIT LIST PRIQE
$
0.494
Resistor.
Upda te the sohema.tio as shown in figure 1.
F.E.Dist.~
CodeL...:::..J
Prin'" in U.S. America
o THIS CHANGE IS A RESULT OF FIELD REPORTING
FOR LIBRARY BINDER
343
2102141
FOR F.E. TECHNICAL MANUAL FORM _ _ _ _ _ _ __
--
N
.N
•~
--
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0
0
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,~
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....... oJ'
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1-0 ... SE.EK
-
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te.
CLIC~7_A7
1.- SN7.00 1••73516
2600.9t1
C - SN740. 1.4735'32
E - SN7410 ~.735.0
B F - SN7420 14.73565
J - SN7474 14473607
I( - SN74132 26006726
L - SH754S2 18794313
P 8294 18798042
A9308 1• .1&67062
T9324 1878803.
e - SN1402
2
~
13
~
-<
~TN
'-AI POs. TI ...£ OUTJ
f)-CI HO. LO. T,o.
-147 XO noo
~. 87 )(0 nee
,-AI pes elK
A
8
B'
TP5I5
____
~
__
~
____________________
... ILL 1400._ OJ
~
_____________-_____
H~O~A~O~04-~
~TN
H7
"'A
;OK
8.1&
L-_____+~------_-------------+-------------U~p-=-OS.-S-!::.~..! 1_ 03
I
+5VJI
_ _ _ _ _ _ _ _ _ _ .. __ -----1
6
9-07
P'!;.K/
I
L-----~~~--------------------~~------------------~--7-e~9-07
-+__+------------------+------------~\·.:..:..·~;.T.:.....Ol.~ t- :: 7,9-C1
+-_r___________+-________-.:W::.:I.:..:H-=-:'._~,. iO-A7
L.-_ _ _ _
I..-_ _ _ _ _
~81
~A~
II
I(
G7
-
A XOWIM
ltD WIM
.
,...
.__. _-s---
...
W!I~ 1-03
B80
RELIABILITY
FIELD ENGINEERING
IMPROVEMENT
PAGE
STYh~/r~g>!t/2
R2141-003 Rev
1
OF .
1
TOP UNIT NO.
OR~NATOR:
I
No.
SYSTEM SER IES
B~rroughs
0 GLENROTHES
I
STD INSTALL. TIME
1 878 9354
NOTICE
UNIT Df:;CRIPTlON
tJNITS AFFECTED
0.5 HRS
ALL
1 MBYTE MINI DISK
TITLE
DATE
MAINTENANCE TEST ROUTINE
TYPE OF CHANGE
FUNCTIONAL
o
PREREQUISITE
1 May 1977
~
o
IMPROVED MAINTAINABILITY
There are no special requirements.
../ CONDITION
1)
Unab Ie to run MTR wi thout dummy head.
J
1)
Assemble dummy head.
CORRECTION
IMPROVED RfLiABILlTV
REgUlREMENTS
Part Number
PAR~S
1268 1847
1881 4194
1879 5047
Description
Resistor 10 ohm
Connector
Terminal
Quantitl
iw
U.S. Unit List Price
3
1
4
$0.25
$4.021
$0.19
PROCEDURE
1)
A dummy head is required.
2)
This should be assembled using the parts listed in Parts Requirements.
3)
Assemble the resistors and the terminals into the connector as shown in Fig. 1.
RESISTORS.
'.
CONNECTOR.
Figure 1.
~ Note: MTR Procedures are released (Form 2011300).
F.E.
DiS"1
Code
BL
1 - ._ _ __
Printed In U.K.
o
THIS CHANGE IS A RESULT OFFIELD REPORTING
343
FOR LIBRARY BINDER
2102141
FOR F.E. TECHNICAL MANUAL FORM _ _ _ _ _ _ __
SYSTEM SERIES
BurrouJahs
OF
6'
TOP UNIT NO.
ORIGINATOR:
T.I.O. GLENROTHES.
STD. INSTALL. TIME
2 HRS. APPROX.
NOTICE
*
~ UNITS AFFECTEO
*
SEE BELOW
UNIT DfSCRIPTION
1 MB MINI-DISK DRIVE
SEE BELOW
DATE
HEAD BONDING
29 June 1977
TYPE OF CHANGE
FUNCTIONAL
o
o
*
1
AlB 9489
IMPROVEMENT
2141-004
PAGE
STYLE/MODEL
FIELD ENGINEERING
TITLE
NOR
B-80
RELIABILITY
o
IMPROVED MAINTAINiABILITY
IMPROVED RELIABILITY
TOP UNIT NOS.
. 1881 2651
1881 0192
1881 0184
1878 9347
1879 4503
1881 2644
. **
UNITS AFFECTED
All units below SIN 206685-018. This RIN does not affect these
units below SIN 203500-018 which have been returned to G1enrothes
for rework under the update program.
The change can be
identified by examining the point where the head is joined to
the carriage block.
If there is an extra fillet of white
adhesive present, then there is no need to fit this RIN. If
you have any doubt, then please contact your local Technical
Support Group.
THIS
PREREQUISITE:
RIN
IS
MANDATORY
NONE
CONDITION:
The head becomes detached from the carriage block.
CAUSE:
Adhesive failure.
CORRECTION:
Add an extra fillet of epoxy adhesive to the back
of the head.
TOOLS REQUIRED: Cloths , cleaning material.
F.E. Dist. rns--l
CodeL..:-=----.J
Prin1ld in
u.s. AmeriCII
o THIS CHANGE IS
A. RESULT OF FIELD REPORTING
343
FOR LIBRARY BINDER
FOR F.E. TECHNICAL MANUAL FORM _ _2_1_0_2_1_41_ _ __
R 2141-004 .
Page 2 of 6
PARTS REQUIRED
PART NO.
DESCRIPTION
lSSl 7S17
Head Bonding Kit
U.S.LIST PRICE
1
$ 2S.11
NOTE:
1.
The kit consists of the following individual items:
2.
- Dual compartment sachet containing adhesive and
hardener.
- Disposable plastic syringe.
- Cleaning wad.
The adhesive has a shelf life of approx. 6 months.
3.
4.
5.
6.
7.
After installation, it is necessary to allow a
period of 6 hours in a warm atmosphere for
adhesive to harden.
You should therefore plan
the work last thing in the evening.
The mini-disk
can then be left overnight in the BSO with power
switched on.
The utmost care must be taken not to allow
any adhesive to contaminate adjacent areas.
Do not ~se excess adhesive as it may run into the
pad arm mechanism.
The majority of time required for this RIN is for
removing/replacing the minidisk in the BSO. If
therefore, the B80 has 2 minidisk drives, the
RIN should be installed on both drives at the
same time.
The kit contains sufficient material for 4 drives.
INSTALLATION:
1.
Remove minidisk drives from the BSO.
2.
Remove the metal cover and the printed circuit
board from the minidisk drives.
3.
The adhesive sachet"has 2 compartments.
One compartment contains the adhesive and the
other the hardener.
The adhesive and hardener
are separated from each other by the plastic
clip. See figure 1 for details.
.
R 2141-004
Page 3
of 6
INSTALLATION
4.
Pullout the plastic clip~
Thoroughly mix the
adhesive and hardener by squeezing and kneading the
sachet for at least 3 minutes.
5.
Remove the plastic tube which covers the syringe
nozzle. Install the nozzle onto the syringe.
6.
Remove the plunger from the s.yringe. Cut a
corner off the sachet, and squeeze the adhesive
mixture into the syringe barr,el.
7.
Replace the syringe plunger. Gently squeeze the
plunger over a cloth until adhesive starts to
ooze from the nozzle. Wipe the nozzle clean.
8.
Rotate the stepper motor lead screw until the
back of the upper head can be accessed through the
chassis.
9.
Taking the utmost care, squeeze the adhesive from
the syringe to make a continuous strip where the
back of the head meets the carriage block. See
figures2 thru 5 for details.
DO NOT USE EXCESS
ADHESIVE
10. Use the cleaning wad to remove any spots of
adhesive from adjacent areas. "
11. Turn the unit over, and repeat steps 8 thru 10
for the lower head.
12. Make a final inspection to ensure the adhesive
has not contaminated adj~c~nt surfaces.
13. Replace the metal cover and printed circuit board.
14. Follow steps 8 thru 13 for the other mini disk drive.
15. Re-inst'all drives into the BSO.
16. Power up the B80 and leave for at least 6 hours for
the adhesive to harden.
(This may conveniently
be done overnight).
R 2141-004
Page 4 of 6
Figure 1. Removing Separator Clip from Sachet
R 2141-004
Page 5 of 6
CA.... IAGE ASSV AT ITS POSITION
FULLV lACK F ..OM SPINDLE
Figure 2. Applying Adhesive to Upper Head
Figure 3. Upper Head - Adhesive Fillet in Place
R 2141-004
Page 6 of 6
CARRIAGE ASSY AT ITS POSITION
NEAR TO SPINDLE
Figure 4. Applying Adhesive to Lower Head
ADHESIVE FILLET
COIL SPRING
FREe FROM EPOXY
HEAD ON HEAD ARM
FREE FAO'" EI'OXV
Figure 5.
Lower Head - Adhesive Fillet in Place
Burroughs
FIELD ENGINEERING
RELIABILITV
IMPROVEMENT
SYSTEM SERIES
B 80
STYLE/MODEL
A/B 9489
TOP UN'I T NO.
NO~2141
PAGE
- 005
1 OF 3
ORla~~N
TIME
No.
PAGE
STYL~MO~Et I
L2141-001
B 48 - -2
1 OF
TOP UNIT NO.
1878 9354
UNll ?~S~IBt~ MINI-DISK DRIVE
5
DATE 8 May 1977
TlfM-ROVEMENT TO READ CHANNEL
INSTALLATION IS MANDATORY
Units affected - B200198-0l8 thru B200800-018.
NOTE
Some units will be returned to Glenrothes plant for rework that will
incorporate this change. 'Reworked units will have a coloured label applied
to the ID label. Consult your local technical support group before applying
this LIN.
PREREQUISITE
Printed Circuit Board Artwork must be revision G H or J for Master
Board and revision G or J for Slave Board.
CONDITION
CAUSE
Intermittent read errors.
Incorrect frequency response of read amplifier.
CORRECTION
Make the following changes to the read amplifier.
PARTS REQUIREMENTS
Part Number
1103 0046
1876 5008
1877 2392
Description
Quantity
200 uH Choke
2
470 ohms lw 2% Resistor
620 pF Capacitor
2
1
U.S. Unit List
Price
$5.90
$0.224
$1.658
PROCEDURE
1)
F.E. Dist
I
Identify the artwork revision of the PCB. The revision letter is shown
after the part number for the artwork. The pIN for the artwork for Master
PCBs is 1879 4792. This~.tched on the PCB at Ll. The pIN for the artwork
for Slave PCBs is 1879 4800. This is etched on the PCB at L1. For Master
PCB revision H or J and Slave PCB revision J go to Step 2.
For Master PCB revision G go to Step 9.
For Slave PCB revision G to to Step 11.
Code ......- - - - 'I
Printed in U.K.
BS
D
THIS CHANGE IS A RESULT OF FIELD REPORTING
2102141
FOR LIBRARY BINDER 3.....4..;,.3_
FOR F.E. TECHNICAL MANUAL FORM _ _ _ _ _ _ __
LIN L 2141-001
Page 2 of 5
Revision H and J Master and Revision J Slave
2.
Cut two tracks and add two wires as shown in Figure 1.
ADD WIRE
FIGURE
3.
1.
Remove the following components.
R53, R54, R154, R155, TP16, TP17, C17, C13.
Retain C13 (51OpF) for future use.
4.
Fit two 470 .n. resistors (PiN 1876 5008) as shown in Figure 2.
5.
Fit two 200 uH Chokes (PiN 1103 0046) as shown in Figure 2.
6.
Fit the 510pF Capacitor (removed in Step 3) in the C17 position.
__...",Ad
C19
FIT 200 uH CHOKE
FIT
470
FIT 510 pF
CAPACITOR
FIT 200 u,., CHOKE
FIGURE
2.
LIN L2141-001
Page 3 or 5
1.
Fit the 620 pF Capaoitor (pIN 1811 2392) in the C 13 position.
8.
Update the sohematios as shown in Figure 3.
R48
H2
IK5
RSI J2
It
CN
FIGURE 3.
REVISION G MASTER
9.
Remove R53, R54, R51, R58, R154, R155, C13, C16, C11 C18 as shown in
rigure 4.
Retain C13 (510pF) ror future use.
R53
R54
FIGURE 4.
LIN 12141-001
Page 4 of 5
10.
Go to Step 12.
~SION
G SLAVE
11. Remove C13, C16, C18, R53, R54, R57, R58, TP16, TP17.
Retain TP16, TP17, R57, R58, C13, C16, C18 for future use.
12. Cut four tracks and add two wires as shown in Figure 5.
FIGURE
5.
13.
Fit two 470 A resistors PIN 1876 5008 in the R53, R54 positions
as shown in Figure 6.
14.
Fit the two test points (TP16, TP17) in the right hand holes of the
C16 and C18 positions (The holes nearest to I/C8)
These test points will now be called the C16 and C18 pins.
15 •
Fit a 2 kAresistor (R57 removed in Step 11) between R57 righ"thand hole (hole nearest to I/C8) and the c16 pin.
16.
Fit a 2K.Il.. resistor (R58 removed in Step 11) between R58 righthand hole (hole nearest to I/C8 and the C18 Pin.
LIN 12141-001
Page
5 of 5
17.
Fit a 0.1 uF Capacitor (C16 removed in Step 11) between the
R57 left hand hole .(nearest to I/C 7) and the C16 Pin.
18.
Fit a 0.1 uF Capacitor (C18 removed in Step 11) between the
R58 left hand hole (nearest to I/c 7) an~ the C18 pin.
19 • . Fit a 510 pF Capacitor (C13 removed in Step 11) in the C17
position.
20.
Fit a 200 uH choke (piN 1103 0046) between the C16 left-hand
hole (nearest to I/c 7 ) and the TP16 hole. Keep the choke
leads as short as possible.
21 •
Fit a 200 uH choke (piN 1103 0046) between the C18 left-hand
hole (nearest to I/C7 ) and the TP17 hole.
FIT C16 0.1uF
FIT R155 470
FIT R57 2K4
FIT 200uH CHOKE
ABOVE
R155
FIT 200uH CHO
ABOVE R154
FIT R154
470A
~==--F---
-----fJ 0
0
FIT C18 O. 1uF
FIT R58 2K.n.
0 ~-
IT C17
510pF
FIGURE 6.
22.
Fit a 620pF capacitor (1877 2392) in the C13 position.
23.
Update the schematics as shown in figure 3.
Burroughs
FIELD ENGINEERING
°r±11~AJ£~NROTHES
STD. INSTALL. TIME
Less than 1.5 Hrs
No.
.LOGIC
IMPROVEMENT
·NOTICE
UNITS AFFECTED
* See below
I
T~~ROVED MAINTAINABILITY
SYSTEM SERIES
BDS
PAGE
STYLE/MODEL
B9489-1/2
TOP UNIT NO.
1878 9354
UNIT DESCRIPTION
1 .M BYTE MINI-DISK
DATE
L2141-002
1 OF 2
8
~ay
1977
INSTALLATION IS MANDATORY
* Units
affected - up to serial number B200l97-0l8
NOTE
Some units will be returned to Glenrothes plant for rework that will.
InCOrporate this change. Reworked units will have a coloured label applied to
the ID label. Cons·ul t your local technical support group before applying this
LIN.
PREREQUISITE
Unit must NOT be one of those listed at the end of this LIN.
PCB artwork must be revision DE or F.
CONDITION
Difficulty in maintainirig the unit due to the large amount of rework
on the PCB.
CORRECTION
Install a new PCB.
PARTS REQUIREMENTS
Part Number
1881 3840 or
1881 3857
1881 1448
Description
Quantity
u.S. Unit List Price
1
$1212.39
$ 832.93
$ 757.46
Master PCB
Slave PCB
Carriage Assy
1
1
PROCEDURE
1)
Check that the artwork revision (etched at location Ll) is DE or F.
2)
Install the new PCB.
3)
Perform circumferential alignment as shown in ATI 130405.
4)
Check PLL and data window adjustments.
and should not require adjustment).
5)
If read errors occur replace the carriage assembly and perform all
adjustments.
0
I
·BS.
I
CodeL...-_ _---'
F.E. 0 ist
Printed in U. K.
(Note:
these are factory pre-set
THIS CHANGE IS A RESULT OF FIELD REPORTING
343
FOR LIBRARY BINDER
2102141
FOR F.E. TECHNICAL MANUAL FORM _ _ _ _ _ _ __
L2141-002
l Page
If the unit is one' of
t~ose
B200006-018
B200008-018
B200017-018
B200065-018
B200066-018
B200071-018
B200085-018
B200087-018
B200094-018
B200095-018
B200100-018
B200101-018
B200103-e18
B200105-018
B200110-018
listed below
2 of 2
DO"NOT install this LIN.
B200118-018
B200120-018
B200124-018
B200125-018
B200133-018
B200134-018
B200147-018
B200148-018
B200151-018
B200154-018
B200156-018
B200163-018
B200171-018
B200187-018
BMG branches with one of these units should contact T.I.O. Central for
further instructions. International branches with one of these units should
contact I.T.I.O. Glenrothes for further instructions.
T.I.O. CENTRAL
Burroughs Corporation,
World Headquarters,
DEl'ROIT
MICHIGAN.
I.T.I.O.
Burroughs Machines Ltd.,
Viewfield Industrial Estate,
Glenrothes,
Fife,
SCOTLAND.
SYSTEM SERIES
Burroughs
B80
LOGIC
FIELD ENGINEERING
IMPROVEMENT·
STYLE4M~DE7
B9 8 -1 -2
NO.L2141-003
PAGE
1
OF
6
TOP UNIT NO.
ORIGINATOR:
ITIO GLENROTHES
I
STD. INSTALL. TIME
1878 9354
NOTICE
UNIT DESCRIPTION
UNITS AFFECTED
0.75 Hr
*
1 M BYTE MINI-DISK
See below
DATE
TITLE
SWITCHED FILTER
8 May 1977
INSTALLATION IS MANDATORY
* Units
affected - B200198-018 thru B201400-018.
- 15163006-8 thru 15163057-1.
NOTE
Some units will be returned to G1enrothes plant for rework that will
InCOrporate this change. Reworked units will have a coloured label applied to
the ID label. Consult your local technical support group before applying this
LIN.
PREREQUISITE
CONDITION
CAUSE
L2141-001., L2141-002.
Intermittent read errors at outer tracks.
Incorrect frequency response of the read amplifier.
CORRECTION
Install a switched filter. This filter lowers the cut-off frequency
of the read amplifier at addresses 0 thru 31.
PARTS REQUIREMENTS
Part Number
1877 1287
1269 9377
Description
Quantity
2200 pF Capacitor
Wire solid 20 gauge
2
3 ft
U.S. Unit List Price
$2.70
$0.08/ft
PROCEDURE/
F.E.g~~~L-I_B_S__1 0
Printed in U.K.
THIS CHANGE IS A RESULT OF FI:ELD REPORTING
FOR LIBRARY BINDER
343_
2102141
FOR F.E. TECHNICAL MANUAL FORM _ _ _ _ _ _ __
L2l4l-003
PAGE
2 of 6
PROCEDURE.
1.
Identify the artwork revision level of the circuit
board. This is shown at location Ll. For revisions
Hand J go to Step 2.
For revision G go to Step 12.
2.
Remove the.non ground end of R57 from the PCB and
connect it to the CIG lead as shown in Fiqure 1.
3•
Remove the
connect it
and
1.
R58
NEW CAPACITORS MOUNTED THRU PADS
PREVIOUSLY OCCUPIED BY R57 and R58
FIGURE
,
1.
2200pF
CAPACITOR
CIG or CI8
~
JUMPER.
FIGURE· 2.
4./
L 2141-003
PAGE
3 of
4.
Refer to Figures 1 and 2. Install a 2200pF
Capacitor (PIN 1877 12,87) vertically into the
hole vacated by R57 in step 2.
5.
Connect the other lead of the 2200 pF capacitor
to the lead of C16.
6.
Install a 2200 pF capacitor (PIN 1877 1287)
vertically into the hole vacated by R58 in
Step 3.
7.
Connect the other lead of the 2200pF Capacitor
to the lead of C18.
8.
Install the followinq jumpers.
9.
ICI
Pin 12
to IC20
Pin 12.
ICI
Pin 10
to IC20
Pin
6
9.
Install the following jumpers
IC20 pin 10 to IC20 Pin 12
IC20 pin 9 to IC20 Pin 13
(Refer to Figure 3)
CAPACITOR
70
6
~8
IC 1 PIN 10
0
:=u
CA .,)111-
LQ:
IC 1 PIN 12
r=0
2OCJ-0-04++-+--- T=p=---111 L
GB
C6
9 C3 6\2
f5 6 ""' 130 f}:w
'05.
~51r24
E
6
.
DZ
OP IND'. -A6
,._.-----
IO-A7 XD WIM ~-~-~
IO-A7 XD WIH RTN
7-AI POS. TIME OUTI
9-Cl Hr>. LO. To O.
~-A7 XO TKOO
10-87 XOTKCO RTN
~
TP
L.-J'TPS/S
IJ8
r
e~
"'
~'~3
r-".24
A
TP__
1018797530
84 5 \6""-
f-<1fs C6
_________________~____~ .. _
B
______-r____r-__________________________
MILL ADO.,.:. 03
~
_______________ _____
~
~H~0~A~O~D4_C6,9_07
~---------r--r---------------------------+--------------------__---P~:~K~/7-e~9-D7
M ~os S;.;.TT 1-03
B4
~----------~~-r-------------------------------+--------------------------\~1~~T-=[~{4-C1.9-C7
R81
H7
~... y .
10K
7-AI POS ClK
8
, ? . ;.. - •
---i--- ----
6
'-87
P~S CLk EN 7 '_
W:H 1:';;/ IO-A?
./
'"
r+_ _-.-;.::I...U!.....-A'....,IJ
.
'l-~G7
8
4I1"'2r...S
9 44
~7 G1
..--.......
I:%! D"_ _-6+_ _ _ _C
_..O
;...N....,T_U__.P 7- ,
_U
I
130 "2 W
... WIH 1-03
+5V
I
- 5 ..
h
•. _ . · • •
, .
f-
.
HS
H--~--+----+""'_~H-+
c
[
CURRENT
AOD~e:SS
COUNTER
5 II
13 \ G7
..,86
~~
~.
~
I L~r~s~~"""\66 I
4
FJ
~r-
F - SN7420 .4473565
14473~07
K - SN74132 26000726
L - SN7S452 18794313
J - SN7474
6.3
4
1.2
.,
rI
4 H3
13
l.19n~8
GS
26004911
.44l13S32
'-CI
'~
r
,
4~::!
3
37
T 0
z~~'03B3 ~~'~?:t
A
~
P
J6 ()~
A;~ D7 ~·.u r-
II 38 15
.1
,
2
\
SYSTEM SERIES
Burroughs
LOGIC
Bao
STYLE/MODEL
FIELD ENGINEERING
IMPROVEMENT
PAGE
1
ALB 9489-2
OF
2
TOP UNIT NO.
ORIGINATOR:
TIO GLENROTHES
STD. INSTALL TIME
0.5
No. L2141-006
HOURS
·NOTICE
I * SEE BELOW
1879 4503
UNlf DESCRIPTION
UNITS AFFECTED
1 M BYTE MINIDISK DRIVE (SLAVE)
TITLE
DATE
MISSING ARTWORK ON REV K SLAVE BOARDS
19 September 1977
INSTALLATION IS MANDATORY
*
UNITS AFFECTED -
All slave units with P.C.B.
artwork revision K.
PREREQUISITE:
P.C.B. artwork must be revision K.
CONDITION:
Errors during recalibration.
CAUSE:
Missing capacitor ground (ClOO, location CS).
CORRECTION:
Add the necessary grounding link.
TOOLS REQUIRED:
Soldering iron
Wire cutters.
PARTS REQUIRED:
Part Number
Description
1269 9377
26 A.W.G. Wire
Q18
U.S.List Price
2 ins
$0.02
C34
ADD GROUND LINK
FIGURE 1
F.E.
g~~~11.-_B_s__10
Printed in U.K.
COMPONENT SIDE REWORK
THIS CHANGE IS A RESULT OF FIELD REPORTING
2102141
FOR LIBRARY BINDER
343~
FOR F.E. TECHNICAL MANUAL FORM _ _ _ _ _ _ __
L2141-006
Page 2 of 2
PROCEDURE
1)
Remove the slave unit from the B-80.
2)
On component side, location C5, add a jumper wire between the end of
C100 nearest IC 23 and the ground at C34. (Refer Figure 1)
3)
Replace drive in the B-80 and run an operational check.
B 00 only
LOGIC
I
0.5 HR.
OF
2
TOP UNIT NO.
T.I.O. GLENROTHES
TITLE
1
B9489
IMPROVEMENT
OR IGI NATOR:
I
PAGE
STYLE/MODEL
FIELD ENGINEERING
STD. INSTALl. TIME
No. L2141-007
SYSTE~ SERIES
.Burroughs
NOTICE
*
UN IT DESCR IPTION
UNITS AFFECTED
1 MB MINI DISK DRIVE UNIT
ALL
INCREASED VALUE FOR READ ENABLE
DELAY(G~I
5159)
DATE
12 May 1978
INSTALLATION IS MANDATORY
This LIN need not be removed if Drive Units are
fitted to a B80 System.
NOTE:-
*
subse~uent1y
TOP UNIT NUMBERS
1878 9347
1879 4503
1881 0184
1881 2644
1881 2651
1881 0192
PREREQUISITE:
None.
CONDITION:
The present value of Read Enable Delay (43 us)
is insufficient to allow the Phase Locked Loop to
lock-on.
CORRECTION:
The Read Enable Delay is increased from its nominal
value of 43 us to 150 us
PARTS REQUIREMENTS:
PART
NU~1BER
1876 5487
DESCRITPION
Resistor 47K,\W
QTY.
U.S. UNIT LIST PRICE
1
$ 0.251
INSTRUCTIONS:1.
Switch off the power to the-Host System.
2.
Remove the disk drive unit from the Host System.
3.
Remove the master board from the drive unit.
4. /
t;;l D
F.E. Dist.
Code~
PrintH in U.S. Americll
THIS CHANGE IS A RESULT OF FIELD REPORTING
FOR LIBRARY BINDER 343
FOR F.E. TECHNICAL MANUAL FORM
2102141
----------------
LIN L2141-007'
Page 2 of 2
INSTRUCTIONS
cont.
4.
Replace resistor R 93 at location 2Q with a 47K
ohm resistor.
5.
Refit the master board to the drive unit.
6.
Refit the disk drive unit to the Host System.
7.
Switch on the power to the Host System.
8.
Carry out an operational check of the System.
9.
Amend the schematics to reflect the change.
+ 5V
, 1 '
C 71
o .OlllF
I~
If!
R 93
47K
14
57
10
N
Q2
12
FIGURE
1:
9
READ ENABLE DELAY
(15,O llS )
SYSTEM SER I ES
Burroughs
B 800 - Only
LOGIC
FIELD ENGINEERING
IMPROVEMENT
1
B 9489
OF
2
-
TOP UNIT NO.
ORIGINATOR:
T.I.O. GLENROTHES
I
STD. INSTALL. TIME
NOTICE
UNITS AFFECTED
0.5 HR.
TITLE
No. L2141-008
PAGE
STYLE/MODEL
ALL
*
UN IT DESCR IPTION
1 MB MINI DISK DRIVE - UNIT.
._-
DATE
INDEX/SECTOR PULSE DURATION (G.C.I. 4986)
30 May 1978
INSTALLATION IS MANDATORY
NOTE:-
*
This LIN need not be removed if Drive units are
subsequently fitted to a BSO system.
TOP UNIT NUMBERS
1878 9347
1879 4503
1881 0184
1881 2644
1881 2651
1881 0192
PREREQUISITE:
None.
CONDITION:-
The present value for the Index/Sector pulse
duration is too long.
CORRECTION:-
The Index/Sector pulse duration is decreased
from its nominal value of 1.8 ~s to 1 ~s.
PARTS
REQUlREMENTS:U.S. UNIT
LIST PRICE
DESCRIPTION
PART NUMBER
RESISTOR 10K,
1876 5321
\W
1
$ 0.269
INSTRUCTIONS:/
F.E. Dist
Code
I BS
Printed in U.K.
T~IS
CHANGE IS A RESULT OF FIELD REPORTING
FOR LIBRARY BINDER
34 3A
2102141
FOR F.E. TECHNICAL MANUAL FORM _ _ _ _ _ _ __
L2141-008
Page 2 of 2
INSTRUCTIONS:
1.
Switch off the power to the Host System.
2.
Remove the disk drive unit from the Host System.
3.
Remove the P.C.B. from the drive unit.
4.
Replace resistor R62 at location A4 with a
10K ohm resistor.
5.
Refit the P.C.B. to the drive unit.
6.
Refit the disk drive unit to the Host System.
7.
Switch on the power to the Host System.
8.
Carry out an operational check of the System.
9.
Amend the schematics to reflect the change.
+SV
R62
10K
C29
270Pf
15 14
11
10
10
N
A3
13
FIGURE 1:
INDEX/SECTOR 1 ys PULSE GENERATOR.
SYSTEM SERIES
Burroughs
T~P
T.I.O. GLENROTHES
TITLE
B9.489
IMPROVEMENT
ORIGINATOR:
OF
3
UNIT NO.
UN IT DESCR IPTION
UNITS AFFECTED
**
ERRORS AFTER WRITE
READ
1
NOTICE
I
1 HOUR
PAGE
STYLE/MODEL
FI ELD ENGINEERING
STD. INSTALL. TIME
NO.L 2141-009
B80, B800
LOGIC
1 M BYTE MINI DISK DRIVE UNIT
DATE
(G.C.I. 4720)
21 NOVEMBER 78
INSTALLATION IS MANDATORY
*
1878 9347
1881 2644
1881 0192
TOP UNIT NOS.
**
UNITS AFFECTED
1879 4503
1881 2651
1881 0184
BELOW SER NO.
207000
(GLENROTHES UNITS)
BELOW SER NO.
15165236 (GUADALAJARA UNITS)
PREREQUISITE:
Revision'K' circuit board, level 10 and below.
CONDITION:
Errors in read after write.
CAUSE:
The erase current decay is generating noise on
read data.
CORRECTION:
Modify the circuit to reduce the write enable
delay and to limit the rate of decay of the
erase current.
PARTS REQUIRED
PART NUMBER
Resistor 330 ohms, 2%
Resistor 3.3K, 2%
Capacitor 0.47~F,10% 35V
1876 4969
1876 5206
1877 1030
UNIT
LISTPRICE
DESCRIPTION
$0.34
$0.34
$1.87
1
1
1
PROCEDURE
A.
Remove the circuit board from the Master and/or the Slave Unit
and pe.rform the following changes on the board(s).
1.
Remove the capacitor C11S, from location C1.
2.
Remove the capacitor Cl16, from location C1.
3./
F.E. Dist
I
BS
ID
L..-___
Code.
.
THIS CHANGE IS A RESULT OF FIELD REPORTING
343
FOR LIBRARY BINDER _
_
FOR F.E. TECHNICAL MANUAL FORM
2102141
--------
LIN L2141-009
Page 2 of 3
PROCEOURE cont.
A.
3.
Remove the diode 01, from location Bl.
4.
Remove the resistor R16l, from location A6.
5.
Install the resistor R16l,P/N 1876 5206,at Location A6 ..
6.
Install the resistor R165,P/N 1876 4969, at Location
(in place of 01)
7.
Install the capacitor ·el17, PIN 1877 1030, from TP-l
to OV (Ground)
B.
Replace the circuit board in the Master and/or, the Slave
Unit.
C.
Perform an operational check of the system.
O.
Update page 4 and/or Page 2 of the Master and/or Slave
Logic schematic as shown on Page 3 •
B.L
7
t
3
4
· t ••
_ ---..--a..r _ _ _ _ _ _ _ - ;
R681
~12V4-----~--------~AA~--------------------~--~----------------~
10<
Rl AI
270
A
~?17c:.:.:.C·
C
9~
G
S''''-;.t~~~
J --
R2~
'I.
HEAD SELECT
AI <...
IK r
'----~-..
·OV
~:r.
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A - TYl-'5. N~ il":''; ;:-;'24
C - i'YP[ AT 11;"0 C'~~2
RS 01
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C -. ~;~7S·~·"s. lI2·-;' 2;:~:
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f
i
f
CIS:
I-C3 M MFM WRT
o·
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1
II
~!
....
i
at
.1
6-C 7 LATCH 64
t:J~ ,
10
IK2
6-C7 LATCH 32
~
______________________.________________
~_________________________________________
,.,t
r
.-
NOTE
*=ON
INDICATES GRID REFERENCE
CIRCUIT BOARD
WRITE DRIVER
:;
~
.;..t
b.~~:ri~:~~~~::~':::':~: :~-;'-l--;:-.:-:--.~"-:-:;;~.~~;;:::;2";;~~;:='~:1
J
TPI8 ON REV L, PCB ONLY
LATCH6~1
- - . - - - - - ~ -~I
-
i
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'.-1'1
~1~2________-+__~________________________________________________________________________________~l~A~7C~H~~2f 5-~7 ~
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TPI3
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B9489/1
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BurJ'ou~nsQ
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jSCH. tMSTER 8D. MDD_
!--,-;-;:-. --I~~L:::i;j/::i~'~~~i.J
,
SYSTEM'SERIES
Burroughs
B80, B800
LOGIC
PAGE
STYLE/MODEL
FIELD ENGINEERING
IMPROVEMENT
No. L2141-010
1
B 9489
OF
3
TOP UNIT NO.
ORIGINATOR:
T.I.O.GLENROTHES
STD. INSTALL. TIME
I**
NOTICE
*
UNIT DESCRIPTION
UNITS AFFECTED
1 HOUR
TITLE
1 M BYTE MINIDISK DRIVE UNIT
TO ALLOW USE OF UNSELECTED PHASE LOCKED LOOP I.C
DATE
7 August 1978
INSTALLATION IS MANDATORY
*
TOP UNIT NOS.
1878 9347
1881 2644
1881 0192
*
UNITS AFFECTED:
Below Sere No. 205950 (Glenrothes Units)
1879 4503
1881 2651
1881 0184
Below Sere No. 15165236 (Guadalajara Units)
PREREQUISITE:
Revision 'K' circuit board, level 10 and below.
CONDITION
Difficult to adjust the Phase Locked Loop and
Data Window.
CAUSE:
Unselected phase locked loop integrated circuit.
CORRECTION:
Modify the circuit to allow the replacement of
the phase locked loop integrated circuit.
PARTS REQUIRED:
PART NUMBER
Resistor 2K, 2% ~W
Resistor 24K,2% ~W
Capacitor 39pF, 5% 500V
Capacitor 390pF,5% 500V
Capacitor 620pF,5% 300V
5156
5412
2087
2335
2392
1876
1876
1877
1877
1877
DESCRIPTION
QTY.
1
1
1
1
1
UNIT LIST
PRICE $
$
$
$
$
$
0.34
0.34
0.68
1.36
1.70
PROCEDURE:
A.
Check the Phase Locked Loop and Data Window adjustment
as per A.T.I. 130405. (REV)
B.
Remove the circuit board from the Master Unit and perform
the following changes on the board.
1. Remove the resistor Rll2 from location P4.
2./
F.E. Dist. ~
Code~
Printed in U.S. America
0
THIS CHANGE IS A RESULT OF FIELD REPORTING
FOR LIBRARY BINDER 343_
FOR F .E. TECHNICAL MANUAL FORM .......
2_l_0_2;..;1__4_l~_ _ __
LIN L2141-010
Page 2 of 3
PROCEDURE cont.
B.
2.
Remove the capacitor C76 from Location P5.
3.
Remove the resistor R99 from Location Q3.
Remove the capacitor C68 from Location P2.
4.
5.
6.
7.
8.
9.
Install the resistor Rl12, PIN 1876 5156 at Location P4.
Install the capacitor C76, PIN 1877 2335 at Location P5.
Install the resistor R99, PIN 1876 5412 at Location Q3.
Install the capacitor C68, PIN 1877 2392 at Location P2.
Install the capacitor C69, PIN 1877 2087 at Location P2.
(between pins 1 and 2 of I.C. 55. )
C.
Replace the circuit board in the Master Unit.
D.
Perform the Phase Locked Loop (P.L.L.) and Data Window
adjustments as per A.T.I. 130405. (REV).
E.
Update page 2 of the Logic Schematic as shown on page 3 of 3
l'Il'J L~
2,.:.111-010
(
l.TE
1St
,.
------~~--,---~------~------~------~-------CR~E~Ano----~~------~------~--------~----~~~____~______~__~~w_~_ _~
ENABLE
DELAY
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e
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+ SV--"X\{'v--,
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